capstone-sys-0.11.0/CHANGELOG.md010066400017500001750000000056331363403562200142700ustar0000000000000000# Changelog All notable changes to this project will be documented in this file. The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). ## [0.11.0] - 2020-03-16 ### Changed - Upgraded bundled capstone to from [0cc60fb9 to 154f91a5](https://github.com/aquynh/capstone/compare/0cc60fb9...154f91a5) ## [0.10.0] - 2019-04-17 ### Changed - Upgraded bundled capstone to release 4.0 ### Removed - Capstone doc and IDE folders ## [0.9.1] - 2018-09-20 ### Changed - Upgraded bundled capstone to release [3.0.5](https://github.com/aquynh/capstone/releases/tag/3.0.5) (Git commit [a31b5328 to db19431d](https://github.com/aquynh/capstone/compare/a31b5328...db19431d)). ## [0.9.0] - 2018-07-08 ### Changed - Upgraded bundled capstone from [7e004bd4 to a31b5328](https://github.com/aquynh/capstone/compare/7e004bd4...a31b5328), which incorporates upstream Capstone PR [#1171](https://github.com/aquynh/capstone/pull/1171) - Always use `cc` crate to build Capstone ### Removed - Features affecting build: `use_system_capstone`, `build_capstone_cmake`, `build_capstone_cc` - The old build features were never used and complicated the code/documentation ## [0.8.0] - 2018-06-02 ### Added - Documented FreeBSD support ### Changed - Upgraded bundled capstone from [8308ace3 to 7e004bd4](https://github.com/aquynh/capstone/compare/8308ace3...7e004bd4), which incorporates upstream Capstone PRs [#1022](https://github.com/aquynh/capstone/pull/1022) and [#1029](https://github.com/aquynh/capstone/pull/1029) ### Removed - Unicode characters from README ## [0.7.0] - 2018-03-25 ### Added - Added support for Windows with `cc` crate - Explicitly document supported platforms ### Changed - Changed method bindgen uses to create enum types (depends on type; see API documentation) - Updated bindgen version ## [0.6.0] - 2017-10-22 ### Added - Added support for Mac OS - Added more CI tests ## [0.5.0] - 2017-08-31 ### Added - Add documentation for some types and function ### Changed - Use Rust unions instead of `bindgen` unions - Depend on necessary packages only - Use pre-generated bindings by default (instead of running `bindgen`) ### Removed - Dependency [0.11.0]: https://github.com/capstone-rust/capstone-rs/compare/capstone-sys-v0.10.0...capstone-sys-v0.11.0 [0.10.0]: https://github.com/capstone-rust/capstone-rs/compare/capstone-sys-v0.9.1...capstone-sys-v0.10.0 [0.9.1]: https://github.com/capstone-rust/capstone-sys/compare/v0.9.0...v0.9.1 [0.9.0]: https://github.com/capstone-rust/capstone-sys/compare/v0.8.0...v0.9.0 [0.8.0]: https://github.com/capstone-rust/capstone-sys/compare/v0.7.0...v0.8.0 [0.7.0]: https://github.com/capstone-rust/capstone-sys/compare/v0.6.0...v0.7.0 [0.6.0]: https://github.com/capstone-rust/capstone-sys/compare/v0.5.0...v0.6.0 [0.5.0]: https://github.com/capstone-rust/capstone-sys/releases/tag/v0.5.0 capstone-sys-0.11.0/Cargo.toml.orig010066400017500001750000000017131363403563700153470ustar0000000000000000[package] name = "capstone-sys" version = "0.11.0" authors = ["m4b ", "tmfink "] description = "System bindings to the capstone disassembly library" build = "build.rs" keywords = ["disassemble"] categories = ["external-ffi-bindings"] links = "capstone" license = "MIT" readme = "README.md" repository = "https://github.com/capstone-rust/capstone-rs/tree/master/capstone-sys" edition = "2018" exclude = [ "/capstone/docs/**", "/capstone/msvc/**", "/capstone/xcode/**", ] [badges] travis-ci = { repository = "capstone-rust/capstone-sys" } [dependencies] libc = { version = "0.2.59", default-features = false } [build-dependencies] bindgen = { optional = true, version = "0.53.0" } regex = { optional = true, version = "1.3.1" } cc = "1.0" [features] # use pre-generated bindings instead of dynamically with bindgen default = [] use_bindgen = ["bindgen", "regex"] # Dynamically generate bindings with bindgen capstone-sys-0.11.0/Cargo.toml0000644000000025551363403655500116600ustar00# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO # # When uploading crates to the registry Cargo will automatically # "normalize" Cargo.toml files for maximal compatibility # with all versions of Cargo and also rewrite `path` dependencies # to registry (e.g., crates.io) dependencies # # If you believe there's an error in this file please file an # issue against the rust-lang/cargo repository. If you're # editing this file be aware that the upstream Cargo.toml # will likely look very different (and much more reasonable) [package] edition = "2018" name = "capstone-sys" version = "0.11.0" authors = ["m4b ", "tmfink "] build = "build.rs" links = "capstone" exclude = ["/capstone/docs/**", "/capstone/msvc/**", "/capstone/xcode/**"] description = "System bindings to the capstone disassembly library" readme = "README.md" keywords = ["disassemble"] categories = ["external-ffi-bindings"] license = "MIT" repository = "https://github.com/capstone-rust/capstone-rs/tree/master/capstone-sys" [dependencies.libc] version = "0.2.59" default-features = false [build-dependencies.bindgen] version = "0.53.0" optional = true [build-dependencies.cc] version = "1.0" [build-dependencies.regex] version = "1.3.1" optional = true [features] default = [] use_bindgen = ["bindgen", "regex"] [badges.travis-ci] repository = "capstone-rust/capstone-sys" capstone-sys-0.11.0/Cargo.toml.orig0000644000000017131363403655500126120ustar00[package] name = "capstone-sys" version = "0.11.0" authors = ["m4b ", "tmfink "] description = "System bindings to the capstone disassembly library" build = "build.rs" keywords = ["disassemble"] categories = ["external-ffi-bindings"] links = "capstone" license = "MIT" readme = "README.md" repository = "https://github.com/capstone-rust/capstone-rs/tree/master/capstone-sys" edition = "2018" exclude = [ "/capstone/docs/**", "/capstone/msvc/**", "/capstone/xcode/**", ] [badges] travis-ci = { repository = "capstone-rust/capstone-sys" } [dependencies] libc = { version = "0.2.59", default-features = false } [build-dependencies] bindgen = { optional = true, version = "0.53.0" } regex = { optional = true, version = "1.3.1" } cc = "1.0" [features] # use pre-generated bindings instead of dynamically with bindgen default = [] use_bindgen = ["bindgen", "regex"] # Dynamically generate bindings with bindgen capstone-sys-0.11.0/LICENSE010066400017500001750000000020411343144727300134560ustar0000000000000000MIT License Copyright (c) 2016 Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. capstone-sys-0.11.0/README.md010066400017500001750000000035001363403506500137260ustar0000000000000000# capstone-sys Low-level, unsafe Rust bindings for the [`Capstone`][capstone] disassembly library. [capstone]: https://github.com/aquynh/capstone [![Crates.io Badge](https://img.shields.io/crates/v/capstone-sys.svg)](https://crates.io/crates/capstone-sys) [![Travis CI Badge](https://travis-ci.org/capstone-rust/capstone-sys.svg?branch=master)](https://travis-ci.org/capstone-rust/capstone-sys) [![Appveyor CI Badge](https://ci.appveyor.com/api/projects/status/github/capstone-rust/capstone-sys?svg=true&branch=master)](https://ci.appveyor.com/project/tmfink/capstone-sys) **[API Documentation](https://docs.rs/capstone-sys/)** **NOTE**: We recommend against using this crate directly. Instead, consider using [capstone-rs](https://github.com/capstone-rust/capstone-rs), which provides a high-level, "Rusty" interface. ## Requirements * Rust version >= 1.36.0 * A toolchain capable of compiling Capstone - We build the bundled Capstone with the [`cc` crate](https://github.com/alexcrichton/cc-rs) [Rust unions]: https://doc.rust-lang.org/stable/reference/items/unions.html ### Supported Platforms | Platform | Supported | | -------------------------- | -- | | `x86_64-apple-darwin` | X | | `i686-apple-darwin` | X | | `x86_64-pc-windows-msvc` | X | | `x86_64-pc-windows-gnu` | X | | `i686-pc-windows-msvc` | X | | `i686-pc-windows-gnu` | X | | `x86_64-unknown-linux-gnu` | X | | `i686-unknown-linux-gnu` | X | | `x86_64-unknown-freebsd` | X | ## Features You can specify the following [features](https://doc.rust-lang.org/cargo/reference/manifest.html#the-features-section) in `Cargo.toml`: * `use_bindgen`: instead of using the pre-generated Capstone bindings, dynamically generate bindings with [`bindgen`][bindgen]. [bindgen]: https://github.com/rust-lang-nursery/rust-bindgen capstone-sys-0.11.0/build.rs010066400017500001750000000300611363403424600141160ustar0000000000000000//! The following environment variables affect the build: //! //! * `UPDATE_CAPSTONE_BINDINGS`: setting indicates that the pre-generated `capstone.rs` should be //! updated with the output bindgen //! //! # Bindgen enum mapping //! //! Bindgen can convert C enums in several ways: //! //! 1. **"Rustified" enum**: Bindgen creates a Rust enum, which provides the most "type safety" and //! reduces the chance of confusing variants for a different type. For variants whose //! discriminant values are not distinct, bindgen defines constants. //! 2. **"Constified" enum**: Bindgen defines constants for each enum variant. //! 3. **"Constified" enum module**: Bindgen defines constants for each enum variant in a separate //! module. //! //! # Rationale for enum types //! //! Rustified enum: these have distinct variant discriminants //! //! * `cs_arch` //! * `cs_op_type` //! * `cs_opt_type` //! //! Constified enum module: //! //! * `cs_err`: avoid undefined behavior in case an error is instantiated with an invalid value; the //! compiler could make false assumptions that the value is only within a certain range. //! * `cs_group_type`/`ARCH_insn_group`: each architecture adds group types to the `cs_group_type`, //! so we constify to avoid needing to transmute. //! * `cs_mode`: used as a bitmask; when values are OR'd together, they are not a valid discriminant //! value //! * `cs_opt_value`/`ARCH_reg`: variant discriminants are not unique //! //! Bitfield enum: fields are OR'd together to form new values //! * `cs_mode` #[cfg(feature = "use_bindgen")] extern crate bindgen; extern crate cc; #[cfg(feature = "use_bindgen")] extern crate regex; #[cfg(feature = "use_bindgen")] use { regex::Regex, std::{fs::File, io::Write}, }; use std::env; use std::fs::copy; use std::path::PathBuf; include!("common.rs"); const CAPSTONE_DIR: &'static str = "capstone"; /// Indicates how capstone library should be linked #[allow(dead_code)] enum LinkType { Dynamic, Static, } /// Build capstone using the cc crate fn build_capstone_cc() { use std::fs::DirEntry; fn read_dir_and_filter bool>(dir: &str, filter: F) -> Vec { use std::fs::read_dir; read_dir(dir) .expect("Failed to read capstone source directory") .into_iter() .map(|e| e.expect("Failed to read capstone source directory")) .filter(|e| filter(e)) .map(|e| { format!( "{}/{}", dir, e.file_name().to_str().expect("Invalid filename") ) }) .collect() } fn find_c_source_files(dir: &str) -> Vec { read_dir_and_filter(dir, |e| { let file_type = e.file_type() .expect("Failed to read capstone source directory"); let file_name = e.file_name().into_string().expect("Invalid filename"); file_type.is_file() && (file_name.ends_with(".c") || file_name.ends_with(".C")) }) } fn find_arch_dirs() -> Vec { read_dir_and_filter(&format!("{}/{}", CAPSTONE_DIR, "arch"), |e| { let file_type = e.file_type() .expect("Failed to read capstone source directory"); file_type.is_dir() }) } let mut files = find_c_source_files(CAPSTONE_DIR); for arch_dir in find_arch_dirs().into_iter() { files.append(&mut find_c_source_files(&arch_dir)); } let use_static_crt = { let target_features = env::var("CARGO_CFG_TARGET_FEATURE").unwrap_or(String::new()); target_features.split(",").any(|f| f == "crt-static") }; cc::Build::new() .files(files) .include(format!("{}/{}", CAPSTONE_DIR, "include")) .define("CAPSTONE_USE_SYS_DYN_MEM", None) .define("CAPSTONE_HAS_ARM", None) .define("CAPSTONE_HAS_ARM64", None) .define("CAPSTONE_HAS_EVM", None) .define("CAPSTONE_HAS_M680X", None) .define("CAPSTONE_HAS_M68K", None) .define("CAPSTONE_HAS_MIPS", None) .define("CAPSTONE_HAS_POWERPC", None) .define("CAPSTONE_HAS_SPARC", None) .define("CAPSTONE_HAS_SYSZ", None) .define("CAPSTONE_HAS_TMS320C64X", None) .define("CAPSTONE_HAS_X86", None) .define("CAPSTONE_HAS_XCORE", None) .flag_if_supported("-Wno-unused-function") .flag_if_supported("-Wno-unused-parameter") .flag_if_supported("-Wno-unknown-pragmas") .flag_if_supported("-Wno-sign-compare") .flag_if_supported("-Wno-return-type") .flag_if_supported("-Wno-implicit-fallthrough") .flag_if_supported("-Wno-missing-field-initializers") .static_crt(use_static_crt) .compile("capstone"); } /// Search for header in search paths #[cfg(feature = "use_bindgen")] fn find_capstone_header(header_search_paths: &Vec, name: &str) -> Option { for search_path in header_search_paths.iter() { let potential_file = search_path.join(name); if potential_file.is_file() { return Some(potential_file); } } None } /// Gets environment variable value. Panics if variable is not set. fn env_var(var: &str) -> String { env::var(var).expect(&format!("Environment variable {} is not set", var)) } /// Parse generated bindings and impl from_insn_id() for all architectures /// instructions enum declaration. #[cfg(feature = "use_bindgen")] fn impl_insid_to_insenum(bindings: &str) -> String { let mut impl_arch_enum = String::new(); impl_arch_enum.push_str("use core::convert::From;\n"); for cs_arch in ARCH_INCLUDES { let arch = cs_arch.cs_name(); // find architecture instructions enum declaration let re_enum_def = Regex::new(&format!("pub enum {}_insn (?s)\\{{.*?\\}}", arch)) .expect("Unable to compile regex"); let cap_enum_def = &re_enum_def .captures(&bindings) .expect("Unable to capture group")[0]; // find instructions and their id let re_ins_ids = Regex::new(&format!( "{}_INS_(?P[A-Z0-9_]+) = (?P\\d+)", &arch.to_uppercase() )) .expect("Unable to compile regex"); impl_arch_enum.push_str(&format!( "impl From for {}_insn {{\n fn from(id: u32) -> Self {{\n match id {{\n", &arch )); // fill match expression for cap_ins_id in re_ins_ids.captures_iter(&cap_enum_def) { impl_arch_enum.push_str(&format!( "{} => {}_insn::{}_INS_{},\n", &cap_ins_id["id"], &arch, &arch.to_uppercase(), &cap_ins_id["ins"] )); } // if id didn't match, return [arch]_INS_INVALID. // special case for m680x which has 'INVLD' variant instead of 'INVALID' match arch { "m680x" => { impl_arch_enum.push_str(&format!( "_ => {}_insn::{}_INS_INVLD,", &arch, &arch.to_uppercase() )); } _ => { impl_arch_enum.push_str(&format!( "_ => {}_insn::{}_INS_INVALID,", &arch, &arch.to_uppercase() )); } } impl_arch_enum.push_str("}\n}\n}\n"); } impl_arch_enum } /// Create bindings using bindgen #[cfg(feature = "use_bindgen")] fn write_bindgen_bindings( header_search_paths: &Vec, update_pregenerated_bindings: bool, pregenerated_bindgen_header: PathBuf, pregenerated_bindgen_impl: PathBuf, out_bindings_path: PathBuf, out_impl_path: PathBuf, ) { let mut builder = bindgen::Builder::default() .rust_target(bindgen::RustTarget::Stable_1_19) .size_t_is_usize(true) .use_core() .ctypes_prefix("libc") .header( find_capstone_header(header_search_paths, "capstone.h") .expect("Could not find header") .to_str() .unwrap(), ) .disable_name_namespacing() .prepend_enum_name(false) .generate_comments(true) .layout_tests(false) // eliminate test failures on platforms with different pointer sizes .impl_debug(true) .constified_enum_module("cs_err|cs_group_type|cs_opt_value") .bitfield_enum("cs_mode|cs_ac_type") .rustified_enum(".*"); // Whitelist cs_.* functions and types let pattern = String::from("cs_.*"); builder = builder .whitelist_function(&pattern) .whitelist_type(&pattern); // Whitelist types with architectures for arch in ARCH_INCLUDES { // .*(^|_)ARCH(_|$).* let arch_type_pattern = format!(".*(^|_){}(_|$).*", arch.cs_name); let const_mod_pattern = format!("^{}_(reg|insn_group)$", arch.cs_name); builder = builder .whitelist_type(&arch_type_pattern) .constified_enum_module(&const_mod_pattern); } let bindings = builder.generate().expect("Unable to generate bindings"); // Write bindings to $OUT_DIR/bindings.rs bindings .write_to_file(&out_bindings_path) .expect("Unable to write bindings"); // Parse bindings and impl fn to cast u32 to _insn, write output to file let bindings_impl_str = impl_insid_to_insenum(&bindings.to_string()); let mut bindings_impl = File::create(&out_impl_path).expect("Unable to open file"); bindings_impl .write_all(bindings_impl_str.as_bytes()) .expect("Unable to write file"); if update_pregenerated_bindings { copy(out_bindings_path, pregenerated_bindgen_header) .expect("Unable to update capstone bindings"); copy(out_impl_path, pregenerated_bindgen_impl).expect("Unable to update capstone bindings"); } } fn main() { #[allow(unused_assignments)] let mut link_type: Option = None; // C header search paths let mut header_search_paths: Vec = Vec::new(); build_capstone_cc(); header_search_paths.push([CAPSTONE_DIR, "include", "capstone"].iter().collect()); link_type = Some(LinkType::Static); match link_type.expect("Must specify link type") { LinkType::Dynamic => { println!("cargo:rustc-link-lib=dylib=capstone"); } LinkType::Static => { println!("cargo:rustc-link-lib=static=capstone"); } } // If UPDATE_CAPSTONE_BINDINGS is set, then updated the pre-generated capstone bindings let update_pregenerated_bindings = env::var("UPDATE_CAPSTONE_BINDINGS").is_ok(); if update_pregenerated_bindings { assert!( cfg!(feature = "use_bindgen"), concat!( "Setting UPDATE_CAPSTONE_BINDINGS only makes ", "sense when enabling feature \"use_bindgen\"" ) ); } let pregenerated_bindgen_header: PathBuf = [ env_var("CARGO_MANIFEST_DIR"), "pre_generated".into(), BINDINGS_FILE.into(), ] .iter() .collect(); let pregenerated_bindgen_impl: PathBuf = [ env_var("CARGO_MANIFEST_DIR"), "pre_generated".into(), BINDINGS_IMPL_FILE.into(), ] .iter() .collect(); let out_bindings_path = PathBuf::from(env_var("OUT_DIR")).join(BINDINGS_FILE); let out_impl_path = PathBuf::from(env_var("OUT_DIR")).join(BINDINGS_IMPL_FILE); // Only run bindgen if we are *not* using the bundled capstone bindings #[cfg(feature = "use_bindgen")] write_bindgen_bindings( &header_search_paths, update_pregenerated_bindings, pregenerated_bindgen_header, pregenerated_bindgen_impl, out_bindings_path, out_impl_path, ); // Otherwise, copy the pregenerated bindings #[cfg(not(feature = "use_bindgen"))] { copy(&pregenerated_bindgen_header, &out_bindings_path) .expect("Unable to update capstone bindings"); copy(&pregenerated_bindgen_impl, &out_impl_path) .expect("Unable to update capstone bindings"); } } capstone-sys-0.11.0/capstone/.appveyor.yml010066400017500001750000000004121363402546700167350ustar0000000000000000version: 4.0-{build} os: - Visual Studio 2015 before_build: - call "C:\Program Files (x86)\Microsoft Visual Studio 14.0\VC\vcvarsall.bat" amd64 build_script: - mkdir build - cd build - cmake -DCMAKE_BUILD_TYPE=RELEASE -G "NMake Makefiles" .. - nmake capstone-sys-0.11.0/capstone/.editorconfig010066400017500001750000000003611363403403300167340ustar0000000000000000root = true [*] end_of_line = lf insert_final_newline = true [*.{py,pyx,pxd}] indent_style = space indent_size = 4 # Follow Linux kernel coding style [*.{c,h,cpp,hpp,inc}] indent_style = tab indent_size = 8 [Makefile] indent_style = tab capstone-sys-0.11.0/capstone/.gitattributes010066400017500001750000000000431363402546700171620ustar0000000000000000/arch/**/*.inc linguist-language=C capstone-sys-0.11.0/capstone/.github/workflows/fuzz.yml010066400017500001750000000011351363403403300213750ustar0000000000000000name: CIFuzz on: [pull_request] jobs: Fuzzing: runs-on: ubuntu-latest steps: - name: Build Fuzzers uses: google/oss-fuzz/infra/cifuzz/actions/build_fuzzers@master with: oss-fuzz-project-name: 'capstone' dry-run: false - name: Run Fuzzers uses: google/oss-fuzz/infra/cifuzz/actions/run_fuzzers@master with: oss-fuzz-project-name: 'capstone' fuzz-seconds: 600 dry-run: false - name: Upload Crash uses: actions/upload-artifact@v1 if: failure() with: name: artifacts path: ./out/artifacts capstone-sys-0.11.0/capstone/.gitignore010066400017500001750000000032501363403403300162470ustar0000000000000000.DS_Store # Object files *.o *.ko # Gcc dependency-tracking files *.d # Libraries *.lib *.a # Shared objects (inc. Windows DLLs) *.dll *.so *.so.* *.dylib # Executables *.exe *.out *.app # python bindings/python/build/ bindings/python/capstone.egg-info/ *.pyc # java bindings/java/capstone.jar # ocaml bindings/ocaml/*.cmi bindings/ocaml/*.cmx bindings/ocaml/*.cmxa bindings/ocaml/*.mli bindings/ocaml/test bindings/ocaml/test_arm bindings/ocaml/test_arm64 bindings/ocaml/test_basic bindings/ocaml/test_mips bindings/ocaml/test_x86 bindings/ocaml/test_detail bindings/ocaml/test_ppc bindings/ocaml/test_sparc bindings/ocaml/test_systemz bindings/ocaml/test_xcore bindings/ocaml/test_m680x # test binaries tests/test_basic tests/test_detail tests/test_iter tests/test_arm tests/test_arm64 tests/test_mips tests/test_x86 tests/test_ppc tests/test_skipdata tests/test_sparc tests/test_systemz tests/test_xcore tests/*.static tests/test_customized_mnem tests/test_m68k tests/test_tms320c64x tests/test_m680x tests/test_evm # regress binaries suite/regress/invalid_read_in_print_operand # vim tmp file *.swp *~ capstone.pc # local files _* # freebsd ports: generated file with "make makesum" command packages/freebsd/ports/devel/capstone/distinfo # VisualStudio **/.vs/ ProjectUpgradeLog.log Debug/ Release/ ipch/ build*/ *.sdf *.opensdf *.suo *.user *.backup *.VC.db *.VC.opendb # CMake build directories build*/ # Xcode xcode/Capstone.xcodeproj/xcuserdata xcode/Capstone.xcodeproj/project.xcworkspace/xcuserdata # suite/ test_arm_regression test_arm_regression.o fuzz_harness test_iter_benchmark fuzz_bindisasm fuzz_disasm capstone_get_setup *.s cstool/cstool # android android-ndk-* capstone-sys-0.11.0/capstone/.travis.yml010066400017500001750000000046761363403403300164050ustar0000000000000000language: cpp sudo: false before_install: - export LD_LIBRARY_PATH=`pwd`/tests/:$LD_LIBRARY_PATH before_script: - wget https://github.com/groundx/capstonefuzz/raw/master/corpus/corpus-libFuzzer-capstone_fuzz_disasmnext-latest.zip - unzip -q corpus-libFuzzer-capstone_fuzz_disasmnext-latest.zip -d suite/fuzz script: - ./make.sh - make check - if [[ "$TRAVIS_OS_NAME" == "linux" ]]; then cp libcapstone.so.* bindings/python/libcapstone.so; fi - if [[ "$TRAVIS_OS_NAME" == "osx" ]]; then cp libcapstone.*.dylib bindings/python/libcapstone.dylib; fi - if [[ "$NOPYTEST" != "true" ]]; then cd bindings/python && make check; fi compiler: - clang - gcc os: - linux - osx matrix: include: - name: xenial gcc os: linux dist: xenial compiler: gcc addons: apt: packages: - libcmocka-dev - name: bionic gcc (ARM64) arch: arm64 os: linux dist: bionic compiler: gcc addons: apt: packages: - libcmocka-dev - unzip - name: bionic gcc (System Z) arch: s390x os: linux dist: bionic compiler: gcc addons: apt: packages: - libcmocka-dev - name: xenial clang os: linux dist: xenial compiler: clang addons: apt: packages: - libcmocka-dev - name: fuzza env: ASAN_OPTIONS=detect_leaks=0 CXXFLAGS="-DFUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION -fsanitize=address" CFLAGS="-DFUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION -fsanitize=address" LDFLAGS="-fsanitize=address" NOPYTEST=true compiler: clang os: linux - name: fuzzm env: CXXFLAGS="-DFUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION -fsanitize=memory" CFLAGS="-DFUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION -fsanitize=memory" LDFLAGS="-fsanitize=memory" NOPYTEST=true compiler: clang os: linux - name: fuzzu env: CXXFLAGS="-DFUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION -fsanitize=undefined" CFLAGS="-DFUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION -fsanitize=undefined -fno-sanitize-recover=undefined,integer" LDFLAGS="-fsanitize=undefined" NOPYTEST=true compiler: clang os: linux capstone-sys-0.11.0/capstone/CMakeLists.txt010066400017500001750000000457671363403403300170420ustar0000000000000000cmake_minimum_required(VERSION 2.6) project(capstone) set(VERSION_MAJOR 4) set(VERSION_MINOR 0) set(VERSION_PATCH 2) if(POLICY CMP0042) # http://www.cmake.org/cmake/help/v3.0/policy/CMP0042.html cmake_policy(SET CMP0042 NEW) endif(POLICY CMP0042) if (POLICY CMP0048) # use old policy to honor version set using VERSION_* variables to preserve backwards # compatibility. change OLD to NEW when minimum cmake version is updated to 3.* and # set VERSION using project(capstone VERSION 4.0.0). # http://www.cmake.org/cmake/help/v3.0/policy/CMP0048.html cmake_policy (SET CMP0048 OLD) endif() # to configure the options specify them in in the command line or change them in the cmake UI. # Don't edit the makefile! option(CAPSTONE_BUILD_STATIC_RUNTIME "Embed static runtime" ON) option(CAPSTONE_BUILD_STATIC "Build static library" ON) option(CAPSTONE_BUILD_SHARED "Build shared library" ON) option(CAPSTONE_BUILD_DIET "Build diet library" OFF) option(CAPSTONE_BUILD_TESTS "Build tests" ON) option(CAPSTONE_BUILD_CSTOOL "Build cstool" ON) option(CAPSTONE_USE_DEFAULT_ALLOC "Use default memory allocation functions" ON) option(CAPSTONE_ARCHITECTURE_DEFAULT "Whether architectures are enabled by default" ON) set(SUPPORTED_ARCHITECTURES ARM ARM64 M68K MIPS PPC SPARC SYSZ XCORE X86 TMS320C64X M680X EVM) set(SUPPORTED_ARCHITECTURE_LABELS ARM ARM64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM) list(LENGTH SUPPORTED_ARCHITECTURES count) math(EXPR count "${count}-1") # create options controlling whether support for a particular architecture is needed foreach(i RANGE ${count}) list(GET SUPPORTED_ARCHITECTURES ${i} supported_architecture) list(GET SUPPORTED_ARCHITECTURE_LABELS ${i} supported_architecture_label) option("CAPSTONE_${supported_architecture}_SUPPORT" "${supported_architecture_label} support" ${CAPSTONE_ARCHITECTURE_DEFAULT}) endforeach(i) # propagate architecture support variables to preprocessor foreach(supported_architecture ${SUPPORTED_ARCHITECTURES}) set(option_name "CAPSTONE_${supported_architecture}_SUPPORT") if(${option_name}) message("Enabling ${option_name}") add_definitions("-D${option_name}") endif() endforeach(supported_architecture) option(CAPSTONE_X86_REDUCE "x86 with reduce instruction sets to minimize library" OFF) option(CAPSTONE_X86_ATT_DISABLE "Disable x86 AT&T syntax" OFF) option(CAPSTONE_OSXKERNEL_SUPPORT "Support to embed Capstone into OS X Kernel extensions" OFF) if (MSVC) set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /MT") set(CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} /MTd") endif () enable_testing() if (CAPSTONE_BUILD_DIET) add_definitions(-DCAPSTONE_DIET) endif () if (CAPSTONE_USE_DEFAULT_ALLOC) add_definitions(-DCAPSTONE_USE_SYS_DYN_MEM) endif () if (CAPSTONE_X86_REDUCE) add_definitions(-DCAPSTONE_X86_REDUCE) endif () if (CAPSTONE_X86_ATT_DISABLE) add_definitions(-DCAPSTONE_X86_ATT_DISABLE) endif () ## sources set(SOURCES_ENGINE cs.c MCInst.c MCInstrDesc.c MCRegisterInfo.c SStream.c utils.c ) set(HEADERS_ENGINE cs_priv.h LEB128.h MathExtras.h MCDisassembler.h MCFixedLenDisassembler.h MCInst.h MCInstrDesc.h MCRegisterInfo.h SStream.h utils.h ) set(HEADERS_COMMON include/capstone/arm64.h include/capstone/arm.h include/capstone/capstone.h include/capstone/evm.h include/capstone/mips.h include/capstone/ppc.h include/capstone/x86.h include/capstone/sparc.h include/capstone/systemz.h include/capstone/xcore.h include/capstone/m68k.h include/capstone/tms320c64x.h include/capstone/m680x.h include/capstone/platform.h ) set(TEST_SOURCES test_basic.c test_detail.c test_skipdata.c test_iter.c) ## architecture support if (CAPSTONE_ARM_SUPPORT) add_definitions(-DCAPSTONE_HAS_ARM) set(SOURCES_ARM arch/ARM/ARMDisassembler.c arch/ARM/ARMInstPrinter.c arch/ARM/ARMMapping.c arch/ARM/ARMModule.c ) set(HEADERS_ARM arch/ARM/ARMAddressingModes.h arch/ARM/ARMBaseInfo.h arch/ARM/ARMDisassembler.h arch/ARM/ARMGenAsmWriter.inc arch/ARM/ARMGenDisassemblerTables.inc arch/ARM/ARMGenInstrInfo.inc arch/ARM/ARMGenRegisterInfo.inc arch/ARM/ARMGenSubtargetInfo.inc arch/ARM/ARMInstPrinter.h arch/ARM/ARMMapping.h arch/ARM/ARMMappingInsn.inc arch/ARM/ARMMappingInsnOp.inc ) set(HEADERS_ARM arch/ARM/ARMAddressingModes.h arch/ARM/ARMBaseInfo.h arch/ARM/ARMDisassembler.h arch/ARM/ARMGenAsmWriter.inc arch/ARM/ARMGenDisassemblerTables.inc arch/ARM/ARMGenInstrInfo.inc arch/ARM/ARMGenRegisterInfo.inc arch/ARM/ARMGenSubtargetInfo.inc arch/ARM/ARMInstPrinter.h arch/ARM/ARMMapping.h ) set(TEST_SOURCES ${TEST_SOURCES} test_arm.c) endif () if (CAPSTONE_ARM64_SUPPORT) add_definitions(-DCAPSTONE_HAS_ARM64) set(SOURCES_ARM64 arch/AArch64/AArch64BaseInfo.c arch/AArch64/AArch64Disassembler.c arch/AArch64/AArch64InstPrinter.c arch/AArch64/AArch64Mapping.c arch/AArch64/AArch64Module.c ) set(HEADERS_ARM64 arch/AArch64/AArch64AddressingModes.h arch/AArch64/AArch64BaseInfo.h arch/AArch64/AArch64Disassembler.h arch/AArch64/AArch64GenAsmWriter.inc arch/AArch64/AArch64GenDisassemblerTables.inc arch/AArch64/AArch64GenInstrInfo.inc arch/AArch64/AArch64GenRegisterInfo.inc arch/AArch64/AArch64GenSubtargetInfo.inc arch/AArch64/AArch64InstPrinter.h arch/AArch64/AArch64Mapping.h arch/AArch64/AArch64MappingInsn.inc ) set(HEADERS_ARM64 arch/AArch64/AArch64AddressingModes.h arch/AArch64/AArch64BaseInfo.h arch/AArch64/AArch64Disassembler.h arch/AArch64/AArch64GenAsmWriter.inc arch/AArch64/AArch64GenDisassemblerTables.inc arch/AArch64/AArch64GenInstrInfo.inc arch/AArch64/AArch64GenRegisterInfo.inc arch/AArch64/AArch64GenSubtargetInfo.inc arch/AArch64/AArch64InstPrinter.h arch/AArch64/AArch64Mapping.h ) set(TEST_SOURCES ${TEST_SOURCES} test_arm64.c) endif () if (CAPSTONE_MIPS_SUPPORT) add_definitions(-DCAPSTONE_HAS_MIPS) set(SOURCES_MIPS arch/Mips/MipsDisassembler.c arch/Mips/MipsInstPrinter.c arch/Mips/MipsMapping.c arch/Mips/MipsModule.c ) set(HEADERS_MIPS arch/Mips/MipsDisassembler.h arch/Mips/MipsGenAsmWriter.inc arch/Mips/MipsGenDisassemblerTables.inc arch/Mips/MipsGenInstrInfo.inc arch/Mips/MipsGenRegisterInfo.inc arch/Mips/MipsGenSubtargetInfo.inc arch/Mips/MipsInstPrinter.h arch/Mips/MipsMapping.h arch/Mips/MipsMappingInsn.inc ) set(HEADERS_MIPS arch/Mips/MipsDisassembler.h arch/Mips/MipsGenAsmWriter.inc arch/Mips/MipsGenDisassemblerTables.inc arch/Mips/MipsGenInstrInfo.inc arch/Mips/MipsGenRegisterInfo.inc arch/Mips/MipsGenSubtargetInfo.inc arch/Mips/MipsInstPrinter.h arch/Mips/MipsMapping.h ) set(TEST_SOURCES ${TEST_SOURCES} test_mips.c) endif () if (CAPSTONE_PPC_SUPPORT) add_definitions(-DCAPSTONE_HAS_POWERPC) set(SOURCES_PPC arch/PowerPC/PPCDisassembler.c arch/PowerPC/PPCInstPrinter.c arch/PowerPC/PPCMapping.c arch/PowerPC/PPCModule.c ) set(HEADERS_PPC arch/PowerPC/PPCDisassembler.h arch/PowerPC/PPCGenAsmWriter.inc arch/PowerPC/PPCGenDisassemblerTables.inc arch/PowerPC/PPCGenInstrInfo.inc arch/PowerPC/PPCGenRegisterInfo.inc arch/PowerPC/PPCGenSubtargetInfo.inc arch/PowerPC/PPCInstPrinter.h arch/PowerPC/PPCMapping.h arch/PowerPC/PPCMappingInsn.inc arch/PowerPC/PPCPredicates.h ) set(HEADERS_PPC arch/PowerPC/PPCDisassembler.h arch/PowerPC/PPCGenAsmWriter.inc arch/PowerPC/PPCGenDisassemblerTables.inc arch/PowerPC/PPCGenInstrInfo.inc arch/PowerPC/PPCGenRegisterInfo.inc arch/PowerPC/PPCGenSubtargetInfo.inc arch/PowerPC/PPCInstPrinter.h arch/PowerPC/PPCMapping.h arch/PowerPC/PPCPredicates.h ) set(TEST_SOURCES ${TEST_SOURCES} test_ppc.c) endif () if (CAPSTONE_X86_SUPPORT) add_definitions(-DCAPSTONE_HAS_X86) set(SOURCES_X86 arch/X86/X86Disassembler.c arch/X86/X86DisassemblerDecoder.c arch/X86/X86IntelInstPrinter.c arch/X86/X86Mapping.c arch/X86/X86Module.c ) set(HEADERS_X86 arch/X86/X86BaseInfo.h arch/X86/X86Disassembler.h arch/X86/X86DisassemblerDecoder.h arch/X86/X86DisassemblerDecoderCommon.h arch/X86/X86InstPrinter.h arch/X86/X86Mapping.h arch/X86/X86GenAsmWriter.inc arch/X86/X86GenAsmWriter_reduce.inc arch/X86/X86GenAsmWriter1.inc arch/X86/X86GenAsmWriter1_reduce.inc arch/X86/X86GenDisassemblerTables.inc arch/X86/X86GenDisassemblerTables_reduce.inc arch/X86/X86GenInstrInfo.inc arch/X86/X86GenInstrInfo_reduce.inc arch/X86/X86GenRegisterInfo.inc arch/X86/X86MappingInsn.inc arch/X86/X86MappingInsn_reduce.inc arch/X86/X86MappingInsnOp.inc arch/X86/X86MappingInsnOp_reduce.inc ) if (NOT CAPSTONE_BUILD_DIET) set(SOURCES_X86 ${SOURCES_X86} arch/X86/X86ATTInstPrinter.c) endif () set(TEST_SOURCES ${TEST_SOURCES} test_x86.c test_customized_mnem.c) endif () if (CAPSTONE_SPARC_SUPPORT) add_definitions(-DCAPSTONE_HAS_SPARC) set(SOURCES_SPARC arch/Sparc/SparcDisassembler.c arch/Sparc/SparcInstPrinter.c arch/Sparc/SparcMapping.c arch/Sparc/SparcModule.c ) set(HEADERS_SPARC arch/Sparc/Sparc.h arch/Sparc/SparcDisassembler.h arch/Sparc/SparcGenAsmWriter.inc arch/Sparc/SparcGenDisassemblerTables.inc arch/Sparc/SparcGenInstrInfo.inc arch/Sparc/SparcGenRegisterInfo.inc arch/Sparc/SparcGenSubtargetInfo.inc arch/Sparc/SparcInstPrinter.h arch/Sparc/SparcMapping.h arch/Sparc/SparcMappingInsn.inc ) set(TEST_SOURCES ${TEST_SOURCES} test_sparc.c) endif () if (CAPSTONE_SYSZ_SUPPORT) add_definitions(-DCAPSTONE_HAS_SYSZ) set(SOURCES_SYSZ arch/SystemZ/SystemZDisassembler.c arch/SystemZ/SystemZInstPrinter.c arch/SystemZ/SystemZMapping.c arch/SystemZ/SystemZModule.c arch/SystemZ/SystemZMCTargetDesc.c ) set(HEADERS_SYSZ arch/SystemZ/SystemZDisassembler.h arch/SystemZ/SystemZGenAsmWriter.inc arch/SystemZ/SystemZGenDisassemblerTables.inc arch/SystemZ/SystemZGenInstrInfo.inc arch/SystemZ/SystemZGenRegisterInfo.inc arch/SystemZ/SystemZGenSubtargetInfo.inc arch/SystemZ/SystemZInstPrinter.h arch/SystemZ/SystemZMapping.h arch/SystemZ/SystemZMappingInsn.inc arch/SystemZ/SystemZMCTargetDesc.h ) set(TEST_SOURCES ${TEST_SOURCES} test_systemz.c) endif () if (CAPSTONE_XCORE_SUPPORT) add_definitions(-DCAPSTONE_HAS_XCORE) set(SOURCES_XCORE arch/XCore/XCoreDisassembler.c arch/XCore/XCoreInstPrinter.c arch/XCore/XCoreMapping.c arch/XCore/XCoreModule.c ) set(HEADERS_XCORE arch/XCore/XCoreDisassembler.h arch/XCore/XCoreGenAsmWriter.inc arch/XCore/XCoreGenDisassemblerTables.inc arch/XCore/XCoreGenInstrInfo.inc arch/XCore/XCoreGenRegisterInfo.inc arch/XCore/XCoreInstPrinter.h arch/XCore/XCoreMapping.h arch/XCore/XCoreMappingInsn.inc ) set(TEST_SOURCES ${TEST_SOURCES} test_xcore.c) endif () if (CAPSTONE_M68K_SUPPORT) add_definitions(-DCAPSTONE_HAS_M68K) set(SOURCES_M68K arch/M68K/M68KDisassembler.c arch/M68K/M68KInstPrinter.c arch/M68K/M68KModule.c ) set(HEADERS_M68K arch/M68K/M68KDisassembler.h ) set(TEST_SOURCES ${TEST_SOURCES} test_m68k.c) endif () if (CAPSTONE_TMS320C64X_SUPPORT) add_definitions(-DCAPSTONE_HAS_TMS320C64X) set(SOURCES_TMS320C64X arch/TMS320C64x/TMS320C64xDisassembler.c arch/TMS320C64x/TMS320C64xInstPrinter.c arch/TMS320C64x/TMS320C64xMapping.c arch/TMS320C64x/TMS320C64xModule.c ) set(HEADERS_TMS320C64X arch/TMS320C64x/TMS320C64xDisassembler.h arch/TMS320C64x/TMS320C64xGenAsmWriter.inc arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc arch/TMS320C64x/TMS320C64xGenInstrInfo.inc arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc arch/TMS320C64x/TMS320C64xInstPrinter.h arch/TMS320C64x/TMS320C64xMapping.h ) set(TEST_SOURCES ${TEST_SOURCES} test_tms320c64x.c) endif () if (CAPSTONE_M680X_SUPPORT) add_definitions(-DCAPSTONE_HAS_M680X) set(SOURCES_M680X arch/M680X/M680XDisassembler.c arch/M680X/M680XInstPrinter.c arch/M680X/M680XModule.c ) set(HEADERS_M680X arch/M680X/M680XInstPrinter.h arch/M680X/M680XDisassembler.h arch/M680X/M680XDisassemblerInternals.h ) set(TEST_SOURCES ${TEST_SOURCES} test_m680x.c) endif () if (CAPSTONE_EVM_SUPPORT) add_definitions(-DCAPSTONE_HAS_EVM) set(SOURCES_EVM arch/EVM/EVMDisassembler.c arch/EVM/EVMInstPrinter.c arch/EVM/EVMMapping.c arch/EVM/EVMModule.c ) set(HEADERS_EVM arch/EVM/EVMDisassembler.h arch/EVM/EVMInstPrinter.h arch/EVM/EVMMapping.h arch/EVM/EVMMappingInsn.inc ) set(TEST_SOURCES ${TEST_SOURCES} test_evm.c) endif () if (CAPSTONE_OSXKERNEL_SUPPORT) add_definitions(-DCAPSTONE_HAS_OSXKERNEL) endif () set(ALL_SOURCES ${SOURCES_ENGINE} ${SOURCES_ARM} ${SOURCES_ARM64} ${SOURCES_MIPS} ${SOURCES_PPC} ${SOURCES_X86} ${SOURCES_SPARC} ${SOURCES_SYSZ} ${SOURCES_XCORE} ${SOURCES_M68K} ${SOURCES_TMS320C64X} ${SOURCES_M680X} ${SOURCES_EVM} ) set(ALL_HEADERS ${HEADERS_COMMON} ${HEADERS_ENGINE} ${HEADERS_ARM} ${HEADERS_ARM64} ${HEADERS_MIPS} ${HEADERS_PPC} ${HEADERS_X86} ${HEADERS_SPARC} ${HEADERS_SYSZ} ${HEADERS_XCORE} ${HEADERS_M68K} ${HEADERS_TMS320C64X} ${HEADERS_M680X} ${HEADERS_EVM} ) include_directories("${PROJECT_SOURCE_DIR}/include") ## properties # version info set_property(GLOBAL PROPERTY VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH}) ## targets if (CAPSTONE_BUILD_STATIC) add_library(capstone-static STATIC ${ALL_SOURCES} ${ALL_HEADERS}) set_property(TARGET capstone-static PROPERTY OUTPUT_NAME capstone) set(default-target capstone-static) endif () # Force static runtime libraries if (CAPSTONE_BUILD_STATIC_RUNTIME) FOREACH(flag CMAKE_C_FLAGS_RELEASE CMAKE_C_FLAGS_RELWITHDEBINFO CMAKE_C_FLAGS_DEBUG CMAKE_C_FLAGS_DEBUG_INIT CMAKE_CXX_FLAGS_RELEASE CMAKE_CXX_FLAGS_RELWITHDEBINFO CMAKE_CXX_FLAGS_DEBUG CMAKE_CXX_FLAGS_DEBUG_INIT) if (MSVC) STRING(REPLACE "/MD" "/MT" "${flag}" "${${flag}}") SET("${flag}" "${${flag}} /EHsc") endif (MSVC) ENDFOREACH() endif () if (CAPSTONE_BUILD_SHARED) add_library(capstone-shared SHARED ${ALL_SOURCES} ${ALL_HEADERS}) set_property(TARGET capstone-shared PROPERTY OUTPUT_NAME capstone) set_property(TARGET capstone-shared PROPERTY COMPILE_FLAGS -DCAPSTONE_SHARED) if (MSVC) set_target_properties(capstone-shared PROPERTIES IMPORT_SUFFIX _dll.lib) else() set_target_properties(capstone-shared PROPERTIES VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH} SOVERSION ${VERSION_MAJOR}) endif () if(NOT DEFINED default-target) # honor `capstone-static` for tests first. set(default-target capstone-shared) add_definitions(-DCAPSTONE_SHARED) endif () endif () if (CAPSTONE_BUILD_TESTS) foreach (TSRC ${TEST_SOURCES}) STRING(REGEX REPLACE ".c$" "" TBIN ${TSRC}) add_executable(${TBIN} "tests/${TSRC}") target_link_libraries(${TBIN} ${default-target}) add_test(NAME "capstone_${TBIN}" COMMAND ${TBIN}) endforeach () if (CAPSTONE_ARM_SUPPORT) set(ARM_REGRESS_TEST test_arm_regression.c) STRING(REGEX REPLACE ".c$" "" ARM_REGRESS_BIN ${ARM_REGRESS_TEST}) add_executable(${ARM_REGRESS_BIN} "suite/arm/${ARM_REGRESS_TEST}") target_link_libraries(${ARM_REGRESS_BIN} ${default-target}) add_test(NAME "capstone_${ARM_REGRESS_BIN}" COMMAND ${ARM_REGRESS_BIN}) endif() # fuzz target built with the tests add_executable(fuzz_disasm suite/fuzz/onefile.c suite/fuzz/fuzz_disasm.c) target_link_libraries(fuzz_disasm ${default-target}) endif () source_group("Source\\Engine" FILES ${SOURCES_ENGINE}) source_group("Source\\ARM" FILES ${SOURCES_ARM}) source_group("Source\\ARM64" FILES ${SOURCES_ARM64}) source_group("Source\\Mips" FILES ${SOURCES_MIPS}) source_group("Source\\PowerPC" FILES ${SOURCES_PPC}) source_group("Source\\Sparc" FILES ${SOURCES_SPARC}) source_group("Source\\SystemZ" FILES ${SOURCES_SYSZ}) source_group("Source\\X86" FILES ${SOURCES_X86}) source_group("Source\\XCore" FILES ${SOURCES_XCORE}) source_group("Source\\M68K" FILES ${SOURCES_M68K}) source_group("Source\\TMS320C64x" FILES ${SOURCES_TMS320C64X}) source_group("Source\\M680X" FILES ${SOURCES_M680X}) source_group("Source\\EVM" FILES ${SOURCES_EVM}) source_group("Include\\Common" FILES ${HEADERS_COMMON}) source_group("Include\\Engine" FILES ${HEADERS_ENGINE}) source_group("Include\\ARM" FILES ${HEADERS_ARM}) source_group("Include\\ARM64" FILES ${HEADERS_ARM64}) source_group("Include\\Mips" FILES ${HEADERS_MIPS}) source_group("Include\\PowerPC" FILES ${HEADERS_PPC}) source_group("Include\\Sparc" FILES ${HEADERS_SPARC}) source_group("Include\\SystemZ" FILES ${HEADERS_SYSZ}) source_group("Include\\X86" FILES ${HEADERS_X86}) source_group("Include\\XCore" FILES ${HEADERS_XCORE}) source_group("Include\\M68K" FILES ${HEADERS_M68K}) source_group("Include\\TMS320C64x" FILES ${HEADERS_TMS320C64X}) source_group("Include\\M680X" FILES ${HEADERS_MC680X}) source_group("Include\\EVM" FILES ${HEADERS_EVM}) ### test library 64bit routine: include("GNUInstallDirs") ## installation install(FILES ${HEADERS_COMMON} DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/capstone) configure_file(capstone.pc.in ${CMAKE_BINARY_DIR}/capstone.pc @ONLY) if (CAPSTONE_BUILD_STATIC) install(TARGETS capstone-static RUNTIME DESTINATION bin LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}) endif () if (CAPSTONE_BUILD_SHARED) install(TARGETS capstone-shared RUNTIME DESTINATION bin LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}) endif () if (CAPSTONE_BUILD_SHARED AND CAPSTONE_BUILD_CSTOOL) FILE(GLOB CSTOOL_SRC cstool/*.c) add_executable(cstool ${CSTOOL_SRC}) target_link_libraries(cstool ${default-target}) install(TARGETS cstool DESTINATION bin) install(FILES ${CMAKE_BINARY_DIR}/capstone.pc DESTINATION ${CMAKE_INSTALL_LIBDIR}/pkgconfig) endif () capstone-sys-0.11.0/capstone/COMPILE.TXT010066400017500001750000000133441363403403300157550ustar0000000000000000This documentation explains how to compile, install & run Capstone on MacOSX, Linux, *BSD & Solaris. We also show steps to cross-compile for Microsoft Windows. To natively compile for Windows using Microsoft Visual Studio, see COMPILE_MSVC.TXT. To compile using CMake, see COMPILE_CMAKE.TXT. To compile using XCode on MacOSX, see xcode/README.md. To compile for Windows CE (a.k.a, Windows Embedded Compact), see windowsce/COMPILE.md. *-*-*-*-*-* Capstone requires no prerequisite packages, so it is easy to compile & install. (0) Tailor Capstone to your need. Out of all archtitectures supported by Capstone, if you just need several selected archs, choose the ones you want to compile in by editing "config.mk" before going to next steps. By default, all architectures are compiled. The other way of customize Capstone without having to edit config.mk is to pass the desired options on the commandline to ./make.sh. Currently, Capstone supports 8 options, as followings. - CAPSTONE_ARCHS: specify list of architectures to compiled in. - CAPSTONE_USE_SYS_DYN_MEM: change this if you have your own dynamic memory management. - CAPSTONE_DIET: use this to make the output binaries more compact. - CAPSTONE_X86_REDUCE: another option to make X86 binary smaller. - CAPSTONE_X86_ATT_DISABLE: disables AT&T syntax on x86. - CAPSTONE_STATIC: build static library. - CAPSTONE_SHARED: build dynamic (shared) library. - CAPSTONE_DEBUG: enable debug build supporting assert(). By default, Capstone uses system dynamic memory management, both DIET and X86_REDUCE modes are disable, and builds all the static & shared libraries. To avoid editing config.mk for these customization, we can pass their values to make.sh, as followings. $ CAPSTONE_ARCHS="arm aarch64 x86" CAPSTONE_USE_SYS_DYN_MEM=no CAPSTONE_DIET=yes CAPSTONE_X86_REDUCE=yes ./make.sh NOTE: on commandline, put these values in front of ./make.sh, not after it. For each option, refer to docs/README for more details. (1) Compile from source On *nix (such as MacOSX, Linux, *BSD, Solaris): - To compile for current platform, run: $ ./make.sh - On 64-bit OS, run the command below to cross-compile Capstone for 32-bit binary: $ ./make.sh nix32 (2) Install Capstone on *nix To install Capstone, run: $ sudo ./make.sh install For FreeBSD/OpenBSD, where sudo is unavailable, run: $ su; ./make.sh install Users are then required to enter root password to copy Capstone into machine system directories. Afterwards, run ./tests/test* to see the tests disassembling sample code. NOTE: The core framework installed by "./make.sh install" consist of following files: /usr/include/capstone/arm.h /usr/include/capstone/arm64.h /usr/include/capstone/capstone.h /usr/include/capstone/evm.h /usr/include/capstone/m680x.h /usr/include/capstone/m68k.h /usr/include/capstone/mips.h /usr/include/capstone/mos65xx.h /usr/include/capstone/platform.h /usr/include/capstone/ppc.h /usr/include/capstone/sparc.h /usr/include/capstone/systemz.h /usr/include/capstone/tms320c64x.h /usr/include/capstone/x86.h /usr/include/capstone/xcore.h /usr/lib/libcapstone.a /usr/lib/libcapstone.so (for Linux/*nix), or /usr/lib/libcapstone.dylib (OSX) (3) Cross-compile for Windows from *nix To cross-compile for Windows, Linux & gcc-mingw-w64-i686 (and also gcc-mingw-w64-x86-64 for 64-bit binaries) are required. - To cross-compile Windows 32-bit binary, simply run: $ ./make.sh cross-win32 - To cross-compile Windows 64-bit binary, run: $ ./make.sh cross-win64 Resulted files libcapstone.dll, libcapstone.dll.a & tests/test*.exe can then be used on Windows machine. (4) Cross-compile for iOS from Mac OSX. To cross-compile for iOS (iPhone/iPad/iPod), Mac OSX with XCode installed is required. - To cross-compile for ArmV7 (iPod 4, iPad 1/2/3, iPhone4, iPhone4S), run: $ ./make.sh ios_armv7 - To cross-compile for ArmV7s (iPad 4, iPhone 5C, iPad mini), run: $ ./make.sh ios_armv7s - To cross-compile for Arm64 (iPhone 5S, iPad mini Retina, iPad Air), run: $ ./make.sh ios_arm64 - To cross-compile for all iDevices (armv7 + armv7s + arm64), run: $ ./make.sh ios Resulted files libcapstone.dylib, libcapstone.a & tests/test* can then be used on iOS devices. (5) Cross-compile for Android To cross-compile for Android (smartphone/tablet), Android NDK is required. NOTE: Only ARM and ARM64 are currently supported. $ NDK=/android/android-ndk-r10e ./make.sh cross-android arm or $ NDK=/android/android-ndk-r10e ./make.sh cross-android arm64 Resulted files libcapstone.so, libcapstone.a & tests/test* can then be used on Android devices. (6) Compile on Windows with Cygwin To compile under Cygwin gcc-mingw-w64-i686 or x86_64-w64-mingw32 run: - To compile Windows 32-bit binary under Cygwin, run: $ ./make.sh cygwin-mingw32 - To compile Windows 64-bit binary under Cygwin, run: $ ./make.sh cygwin-mingw64 Resulted files libcapstone.dll, libcapstone.dll.a & tests/test*.exe can then be used on Windows machine. (7) By default, "cc" (default C compiler on the system) is used as compiler. - To use "clang" compiler instead, run the command below: $ ./make.sh clang - To use "gcc" compiler instead, run: $ ./make.sh gcc (8) To uninstall Capstone, run the command below: $ sudo ./make.sh uninstall (9) Language bindings So far, Python, Ocaml & Java are supported by bindings in the main code. Look for the bindings under directory bindings/, and refer to README file of corresponding languages. Community also provide bindings for C#, Go, Ruby, NodeJS, C++ & Vala. Links to these can be found at address http://capstone-engine.org/download.html capstone-sys-0.11.0/capstone/COMPILE_CMAKE.TXT010066400017500001750000000113221363403403300166470ustar0000000000000000This documentation explains how to compile Capstone with CMake, focus on using Microsoft Visual C as the compiler. To compile Capstone on *nix, see COMPILE.TXT. To compile Capstone on Windows using Visual Studio, see COMPILE_MSVC.TXT. *-*-*-*-*-* This documentation requires CMake & Windows SDK or MS Visual Studio installed on your machine. Get CMake for free from http://www.cmake.org. (0) Tailor Capstone to your need. Out of archtitectures supported by Capstone, if you just need several selected archs, run "cmake" with the unwanted archs disabled (set to 0) as followings. - CAPSTONE_ARM_SUPPORT: support ARM. Run cmake with -DCAPSTONE_ARM_SUPPORT=0 to remove ARM. - CAPSTONE_ARM64_SUPPORT: support ARM64. Run cmake with -DCAPSTONE_ARM64_SUPPORT=0 to remove ARM64. - CAPSTONE_M680X_SUPPORT: support M680X. Run cmake with -DCAPSTONE_M680X_SUPPORT=0 to remove M680X. - CAPSTONE_M68K_SUPPORT: support M68K. Run cmake with -DCAPSTONE_M68K_SUPPORT=0 to remove M68K. - CAPSTONE_MIPS_SUPPORT: support Mips. Run cmake with -DCAPSTONE_MIPS_SUPPORT=0 to remove Mips. - CAPSTONE_PPC_SUPPORT: support PPC. Run cmake with -DCAPSTONE_PPC_SUPPORT=0 to remove PPC. - CAPSTONE_SPARC_SUPPORT: support Sparc. Run cmake with -DCAPSTONE_SPARC_SUPPORT=0 to remove Sparc. - CAPSTONE_SYSZ_SUPPORT: support SystemZ. Run cmake with -DCAPSTONE_SYSZ_SUPPORT=0 to remove SystemZ. - CAPSTONE_XCORE_SUPPORT: support XCore. Run cmake with -DCAPSTONE_XCORE_SUPPORT=0 to remove XCore. - CAPSTONE_X86_SUPPORT: support X86. Run cmake with -DCAPSTONE_X86_SUPPORT=0 to remove X86. - CAPSTONE_TMS320C64X_SUPPORT: support TMS320C64X. Run cmake with -DCAPSTONE_TMS320C64X_SUPPORT=0 to remove TMS320C64X. - CAPSTONE_EVM_SUPPORT: support EVM. Run cmake with -DCAPSTONE_EVM_SUPPORT=0 to remove EVM. - CAPSTONE_ARCHITECUTRE_DEFAULT: Whether architectures are enabled by default. Set this of OFF with -DCAPSTONE_ARCHITECUTRE_DEFAULT=OFF to dissable all architectures by default. You can then enable them again with one of the CAPSTONE__SUPPORT options. By default, all architectures are compiled in. Besides, Capstone also allows some more customization via following macros. - CAPSTONE_USE_SYS_DYN_MEM: change this to OFF to use your own dynamic memory management. - CAPSTONE_BUILD_DIET: change this to ON to make the binaries more compact. - CAPSTONE_X86_REDUCE: change this to ON to make X86 binary smaller. - CAPSTONE_X86_ATT_DISABLE: change this to ON to disable AT&T syntax on x86. By default, Capstone use system dynamic memory management, and both DIET and X86_REDUCE modes are disabled. To use your own memory allocations, turn ON both DIET & X86_REDUCE, run "cmake" with: -DCAPSTONE_USE_SYS_DYN_MEM=0 -DCAPSTONE_BUILD_DIET=1 -DCAPSTONE_X86_REDUCE=1 For each option, refer to docs/README for more details. (1) CMake allows you to generate different generators to build Capstone. Below is some examples on how to build Capstone on Windows with CMake. (*) You can let CMake select a generator for you. Do: mkdir build cd build cmake .. This last command is also where you can pass additional CMake configuration flags using `-D=`. Then to build use: cmake --build . --config Release (*) To build Capstone using Nmake of Windows SDK, do: mkdir build cd build ..\nmake.bat After this, find the samples test*.exe, capstone.lib & capstone.dll in the same directory. (*) To build Capstone using Visual Studio, choose the generator accordingly to the version of Visual Studio on your machine. For example, with Visual Studio 2013, do: mkdir build cd build cmake -G "Visual Studio 12" .. After this, find capstone.sln in the same directory. Open it with Visual Studio and build the solution including libraries & all test as usual. (2) You can make sure the prior steps successfully worked by launching one of the testing binary (test*.exe). (3) You can also enable just one specific architecture by passing the architecture name to either the cmake.sh or nmake.bat scripts. e.g.: ../cmake.sh x86 Will just target the x86 architecture. The list of available architectures is: ARM, ARM64, M68K, MIPS, PowerPC, Sparc, SystemZ, XCore, x86, TMS320C64x, M680x, EVM, MOS65XX. (4) You can also create an installation image with cmake, by using the 'install' target. Use: cmake --build . --config Release --target install This will normally install an image in a default location (`C:\Program Files` on Windows), so it's good to explicitly set this location when configuring CMake. Use: `-DCMAKE_INSTALL_PREFIX=image` for instance, to put the installation in the 'image' subdirectory of the build directory. capstone-sys-0.11.0/capstone/COMPILE_MSVC.TXT010066400017500001750000000112271363403403300166030ustar0000000000000000This documentation explains how to compile Capstone on Windows using Microsoft Visual Studio version 2010 or newer. To compile Capstone on *nix, see COMPILE.TXT To compile Capstone with CMake, see COMPILE_CMAKE.TXT *-*-*-*-*-* Capstone requires no prerequisite packages with default configurations, so it is easy to compile & install. Open the Visual Studio solution "msvc/capstone.sln" and follow the instructions below. NOTE: This requires Visual Studio 2010 or newer versions. If you wish to embed Capstone in a kernel driver, Visual Studio 2017 or newer versions, and Windows Driver Kit 10 or newer versions are required. (0) Tailor Capstone to your need. Out of 9 archtitectures supported by Capstone (Arm, Arm64, M68K, Mips, PPC, Sparc, SystemZ, X86 & XCore), if you just need several selected archs, choose the ones you want to compile in by opening Visual Studio solution "msvc\capstone.sln", then directly editing the projects "capstone_static" & "capstone_dll" for static and dynamic libraries, respectively. This must be done before going to the next steps. In VisualStudio interface, modify the preprocessor definitions via "Project Properties" -> "Configuration Properties" -> "C/C++" -> "Preprocessor" to customize Capstone library, as followings. - CAPSTONE_HAS_ARM: support ARM. Delete this to remove ARM support. - CAPSTONE_HAS_ARM64: support ARM64. Delete this to remove ARM64 support. - CAPSTONE_HAS_M68K: support M68K. Delete this to remove M68K support. - CAPSTONE_HAS_MIPS: support Mips. Delete this to remove Mips support. - CAPSTONE_HAS_POWERPC: support PPC. Delete this to remove PPC support. - CAPSTONE_HAS_SPARC: support Sparc. Delete this to remove Sparc support. - CAPSTONE_HAS_SYSZ: support SystemZ. Delete this to remove SystemZ support. - CAPSTONE_HAS_X86: support X86. Delete this to remove X86 support. - CAPSTONE_HAS_XCORE: support XCore. Delete this to remove XCore support. By default, all 9 architectures are compiled in. Besides, Capstone also allows some more customization via following macros. - CAPSTONE_USE_SYS_DYN_MEM: delete this to use your own dynamic memory management. - CAPSTONE_DIET_NO: rename this to "CAPSTONE_DIET" to make the binaries more compact. - CAPSTONE_X86_REDUCE_NO: rename this to "CAPSTONE_X86_REDUCE" to make X86 binary smaller. - CAPSTONE_X86_ATT_DISABLE_NO: rename this to "CAPSTONE_X86_ATT_DISABLE" to disable AT&T syntax on x86. By default, Capstone use system dynamic memory management, and both DIET and X86_REDUCE modes are disable. For each option, refer to docs/README for more details. (1) Compile from source on Windows with Visual Studio - Choose the configuration and the platform you want: Release/Debug & Win32/Win64. - Build only the libraries, or the libraries along with all the tests. - "capstone_static_winkernel" is for compiling Capstone for a driver and "test_winkernel" is a test for a driver, and those are excluded from build by default. To compile them, open the Configuration Manager through the [Build] menu and check "Build" check boxes for those project. (2) You can make sure the prior steps successfully worked by launching one of the testing binary (test*.exe). The testing binary for a driver "test_winkernel.sys" is made up of all tests for supported architectures configured with the step (0) along side its own tests. Below explains a procedure to run the test driver and check test results. On the x64 platform, the test signing mode has to be enabled to install the test driver. To do it, open the command prompt with the administrator privileges and type the following command, and then restart the system to activate the change: >bcdedit /set testsigning on Test results from the test driver is sent to kernel debug buffer. In order to see those results, download DebugView and run it with the administrator privileges, then check [Capture Kernel] through the [Capture] menu. DebugView: https://technet.microsoft.com/en-us/sysinternals/debugview.aspx To install and uninstall the driver, use the 'sc' command. For installing and executing test_winkernel.sys, execute the following commands with the administrator privileges: >sc create test_winkernel type= kernel binPath= [SC] CreateService SUCCESS >sc start test_winkernel [SC] StartService FAILED 995: The I/O operation has been aborted because of either a thread exit or an application request. To uninstall the driver, execute the following commands with the administrator privileges: >sc delete test_winkernel >bcdedit /deletevalue testsigning capstone-sys-0.11.0/capstone/CREDITS.TXT010066400017500001750000000051421363402546700157720ustar0000000000000000This file credits all the contributors of the Capstone engine project. Key developers ============== 1. Nguyen Anh Quynh - Core engine - Bindings: Python, Ruby, OCaml, Java, C# 2. Tan Sheng Di - Bindings: Ruby 3. Ben Nagy - Bindings: Ruby, Go 4. Dang Hoang Vu - Bindings: Java Beta testers (in random order) ============================== Pancake Van Hauser FX of Phenoelit The Grugq, The Grugq <-- our hero for submitting the first ever patch! Isaac Dawson, Veracode Inc Patroklos Argyroudis, Census Inc. (http://census-labs.com) Attila Suszter Le Dinh Long Nicolas Ruff Gunther Alex Ionescu, Winsider Seminars & Solutions Inc. Snare Daniel Godas-Lopez Joshua J. Drake Edgar Barbosa Ralf-Philipp Weinmann Hugo Fortier Joxean Koret Bruce Dang Andrew Dunham Contributors (in no particular order) ===================================== (Please let us know if you want to have your name here) Ole André Vadla Ravnås (author of the 100th Pull-Request in our Github repo, thanks!) Axel "0vercl0k" Souchet (@0vercl0k) & Alex Ionescu: port to MSVC. Daniel Pistelli: Cmake support. Peter Hlavaty: integrate Capstone for Windows kernel drivers. Guillaume Jeanne: Ocaml binding. Martin Tofall, Obsidium Software: Optimize X86 performance & size + x86 encoding features. David Martínez Moreno & Hilko Bengen: Debian package. Félix Cloutier: Xcode project. Benoit Lecocq: OpenBSD package. Christophe Avoinne (Hlide): Improve memory management for better performance. Michael Cohen & Nguyen Tan Cong: Python module installer. Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package. Felix Gröbert (Google): fuzz testing harness. Xipiter LLC: Capstone logo redesigned. Satoshi Tanda: Support Windows kernel driver. Tang Yuhang: cstool. Andrew Dutcher: better Python setup. Ruben Boonen: PowerShell binding. David Zimmer: VB6 binding. Philippe Antoine: Integration with oss-fuzz and various fixes. Bui Dinh Cuong: Explicit registers accessed for Arm64. Vincent Bénony: Explicit registers accessed for X86. Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package. Felix Gröbert (Google): fuzz testing harness. Daniel Collin & Nicolas Planel: M68K architecture. Pranith Kumar: Explicit registers accessed for Arm64. Xipiter LLC: Capstone logo redesigned. Satoshi Tanda: Support Windows kernel driver. Koutheir Attouchi: Support for Windows CE. Fotis Loukos: TMS320C64x architecture. Wolfgang Schwotzer: M680X architecture. Philippe Antoine: Integration with oss-fuzz and various fixes. Stephen Eckels (stevemk14ebr): x86 encoding features capstone-sys-0.11.0/capstone/ChangeLog010066400017500001750000000454521363402546700160560ustar0000000000000000This file details the changelog of Capstone. --------------------------------- Version 4.0.1: January 10th, 2019 [ Core ] - Fix some issues for packaging (Debian, Gentoo). - Better support for building with Mingw. - cstool has new option -s to turn on skipdata mode. - cstool -v now report build settings of the core. - Add suite/capstone_get_setup.c so users can integrate with their own code to retrieve Capstone settings at build time. [ Arm ] - Fix 4.0 regression: the `tbh [r0, r1, lsl #1]` instruction sets the operand.shift.value back again (see #1317) - Remove ARM_REG_PC group for BX instruction. [ X86 ] - Fix: endbr32 and endbr64 instructions are now properly decoded in both CS_MODE_32 and CS_MODE_64 (#1129) [ M680X ] - Fix some issues reported by clang-analyzer (#1329). [ Python ] - Fix skipdata setup. - Add getter/setter for skipdata_mnem, skipdata_callback. --------------------------------- Version 4.0: December 18th, 2018 [ Core ] - New APIs: cs_regs_access() - Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM. - Various updates & bugfixes for all architectures. - Add 4 new architectures: EVM, M68K, M680X & TMS320C64x. - Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE. - Add new error types: CS_ERR_X86_MASM. [ X86 ] - Add XOP code condition type in x86_xop_cc. - Add some info on encoding to cs_x86 in cs_x86_encoding. - Add register flags update in cs_x86.{eflags, fpu_flags} - Change cs_x86.disp type from int32_t to int64_t. - Add new groups: X86_GRP_VM & X86_GRP_FPU. - Lots of new instructions (AVX) [ ARM64 ] - Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS. [ Mips ] - Add mode CS_MODE_MIPS2. [ PPC ] - Change cs_ppc_op.imm type from int32_t to int64_t. - Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX. - Lots of new instructions (QPX among them) [ Sparc ] - Change cs_sparc_op.imm type from int32_t to int64_t. [ Binding ] - New bindings: PowerShell & VB6 --------------------------------- Version 3.0.5: July 18th, 2018 [ Core ] - Fix the include path for Android builds when building cstool. - Add posibility to disable universal build for Mac OS. - cstool: Separate instruction bytes by spaces. - Fix code path of pkg-config in Cmake. - Update XCode project for XCode 9.1. - Add Cortex-M support to cstool. - Cmake forces to be build using MT with MSVC. - Better support for Mac OS kernel. [ X86 ] - Fix some issues in handling EVEX & VEX3 instructions. - Fix immediate operand for AND instruction in ATT mode. - Fix ATT syntax when imm operand is 0. - Better handle XACQUIRE/XRELEASE. - Fix imm operand of RETF. [ ARM ] - Fix an integer overlow bug. [ ARM64 ] - Bug fix for incorrect operand type in certain load/store instructions. [ Mips ] - Mode CS_MODE_MIPS32R6 automatically sets CS_MODE_32 [ PPC ] - Fix endian check. [ Sparc ] - Fix an integer overlow bug. [ SystemZ ] - Fix an integer overlow bug. [ Python binding ] - Raise error on accessing irrelevant data fields if skipdata & detail modes are enable. --------------------------------- Version 3.0.5-rc3: July 31st, 2017 [ Core ] - Fix compilation for MacOS kernel extension - cstool to support armbe and arm64be modes - Add nmake.bat for Windows build - Fix an integer overflow for Windows kernel driver - Support to embedded Capstone into MacOS kernel - cstool: fix mips64 mode - Fix a compiling error in MS Visual Studio 2015 - Install pkgconfig file with CMake build - Fix SOVERSION property of CMake build - Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc - Fix MingW build - Better handle CMake installation for Linux 64bit [ X86 ] - Support BND prefix of Intel MPX extension - Correct operand size for CALL/JMP in 64bit mode with prefix 0x66 - LOCK NOP is a valid instruction - Fix ATT syntax for instruction with zero offset segment register - LES/LDS are invalid in 64bit mode - Fix number of operands for some MOV instructions [ ARM ] - Fix POP reg to update SP register - Update flags for UADD8 instruction [ ARM64 ] - Better performance with new lookup table - Handle system registers added in ARMv8.1/2 [ Java binding ] - Better handle input with invalid code [ Visual Basic binding ] - New binding --------------------------------- Version 3.0.5-rc2: March 2nd, 2017 [ Core ] - Fix build for Visual Studio 2012 - Fix X86_REL_ADDR macro - Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA - Better support for embedding Capstone into Windows kernel drivers - Support to embedded Capstone into MacOS kernel - Support MacOS 10.11 and up - Better support for Cygwin - Support build packages for FreeBSD & DragonflyBSD - Add a command-line tool "cstool" - Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc [ X86 ] - Some random 16-bit code can be handled wrongly. - Remove abundant operand type X86_OP_FP - Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL - Add X86_REG_EFLAGS for STC and STD - Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT - Rename registers ST0-ST7 to be consistent with asm output [ ARM ] - Properly handle IT instruction - Fix LDRSB - Fix writeback for LDR - Fix Thumb BigEndian setup [ ARM64 ] - Fix arith extender - Fix writeback for LDR - Rename enum arm64_mrs_reg to arm64_sysreg [ PowerPC ] - Print 0 offset for memory operand [ Sparc ] - Fix POPC instruction [ Python binding ] - Better PyPy support - Add __version__ - Better support for Python 3 - Fix CS_SKIPDATA_CALLBACK prototype - Cast skipdata function inside binding to simplify the API [ Java binding ] - Better handle input with invalid code [ PowerShell ] - New binding --------------------------------- Version 3.0.4: July 15th, 2015 [ Library ] - Improve cross-compile for Android using Android NDK. - Support cross-compile for AArch64 Android (with Linux GCC). - Removed osxkernel_inttypes.h that is incompatible with BSD license. - Make it possible to compile with CC having a space inside (like "ccache gcc"). [ X86 ] - Fix a null pointer dereference bug on handling code with special prefixes. - Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax. - Print immediate operand in positive form in some algorithm instructions. - Properly decode some SSE instructions. [ PowerPC ] - Fixed a memory corruption bug. - Fixed a memory corruption bug for the engine built in DIET mode. [ Mips ] - Fixed instruction ID of SUBU instruction. - Fixed a memory corruption bug. [ Arm ] - Fixed a memory corruption bug on IT instruction. [ XCore ] - Fixed a memory corruption bug when instruction has a memory operand. [ Python ] - Support Virtualenv. - setup.py supports option --user if not in a virtualenv to allow for local usage. - Properly handle the destruction of Cs object in the case the shared library was already unloaded. --------------------------------- Version 3.0.3: May 08th, 2015 [ Library ] - Support to embed into Mac OS X kernel extensions. - Now it is possible to compile Capstone with older C compilers, such as GCC 4.8 on Ubuntu 12.04. - Add "test_iter" to MSVC project. [ X86 ] - All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support $1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of "rcll %edx"). - CMPXCHG16B is a valid instruction with LOCK prefix. - Fixed a segfault on the input of 0xF3. [ Arm ] - BLX instruction modifies PC & LR registers. [ Sparc ] - Improved displacement decoding for sparc banching instructions. [ Python binding ] - Fix for Cython so it can properly initialize. - X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type. - Properly support compile with Cygwin & install binding (setup.py). --------------------------------- Version 3.0.2: March 11th, 2015 [ Library ] - On *nix, only export symbols that are part of the API (instead of all the internal symbols). [ X86 ] - Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding. - Fix implicit registers read/written & instruction groups of some instructions. - More flexible on the order of prefixes, so better handle some tricky instructions. - REPNE prefix can go with STOS & MOVS instructions. - Fix a compilation bug for X86_REDUCE mode. - Fix operand size of instructions with operand PTR [] [ Arm ] - Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode). - Fix a bug on handling the If-Then block. [ Mips ] - Sanity check for the input size for MIPS64 mode. [ MSVC ] - Compile capstone.dll with static runtime MSVCR built in. [ Python binding ] - Fix a compiling issue of Cython binding with gcc 4.9. --------------------------------- Version 3.0.1: February 03rd, 2015 [ X86 ] - Properly handle LOCK, REP, REPE & REPNE prefixes. - Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions. - Print LJUMP/LCALL without * as prefix for Intel syntax. - Handle REX prefix properly for segment/MMX related instructions (x86_64). - Instruction with length > 15 is consider invalid. - Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP. - Handle some tricky code for some X86_64 instructions with REX prefix. - Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg - MOV32ms & MOV32sm should reference word rather than dword. [ Arm64 ] - BL & BLR instructions do not read SP register. - Print absolute (rather than relative) address for instructions B, BL, CBNZ, ADR. [ Arm ] - Instructions ADC & SBC do not update flags. - BL & BLX do not read SP, but PC register. - Alias LDR instruction with operands [sp], 4 to POP. - Print immediate operand of MVN instruction in positive hexadecimal form. [ PowerPC ] - Fix some compilation bugs when DIET mode is enable. - Populate SLWI/SRWI instruction details with SH operand. [ Python binding ] - Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes. - Fixed a memory leak for Cython disasm functions when we immaturely quit the enumeration of disassembled instructions. - Fix a NULL memory access issue when SKIPDATA & Detail modes are enable at the same time. - Fix a memory leaking bug when when we stop enumeration over the disassembled instructions prematurely. - Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx). --------------------------------- Version 3.0: November 19th, 2014 [ API ] - New API: cs_disasm_iter & cs_malloc. See docs/README for tutorials. - Renamed cs_disasm_ex to cs_disasm (cs_disasm_ex is still supported, but marked obsolete to be removed in future) - Support SKIPDATA mode, so Capstone can jump over unknown data and keep going from the next legitimate instruction. See docs/README for tutorials. - More details provided in cs_detail struct for all architectures. - API version was bumped to 3.0. [ Bindings ] - Python binding supports Python3 (besides Python2). - Support Ocaml binding. - Java: add close() method to be used to deinitialize a Capstone object when no longer use it. [ Architectures ] - New architectures: Sparc, SystemZ & XCore. - Important bugfixes for Arm, Arm64, Mips, PowerPC & X86. - Support more instructions for Arm, Arm64, Mips, PowerPC & X86. - Always expose absolute addresses rather than relative addresses (Arm, Arm64, Mips, PPC, Sparc, X86). - Use common instruction operand types REG, IMM, MEM & FP across all architectures (to enable cross-architecture analysis). - Use common instruction group types across all architectures (to enable cross-architecture analysis). [ X86 ] - X86 engine is mature & handles all the malware tricks (that we are aware of). - Added a lot of new instructions (such as AVX512, 3DNow, etc). - Add prefix symbols X86_PREFIX_REP/REPNE/LOCK/CS/DS/SS/FS/GS/ES/OPSIZE/ADDRSIZE. - Print immediate in positive form & hexadecimal for AND/OR/XOR instructions. - More friendly disassembly for JMP16i (in the form segment:offset) [ Mips ] - Engine added supports for new hardware modes: Mips32R6 (CS_MODE_MIPS32R6) & MipsGP64 (CS_MODE_MIPSGP64). - Removed the ABI-only mode CS_MODE_N64. - New modes CS_MODE_MIPS32 & CS_MODE_MIPS64 (to use instead of CS_MODE_32 & CS_MODE_64). [ ARM ] - Support new mode CS_MODE_V8 for Armv8 A32 encodings. - Print immediate in positive form & hexadecimal for AND/ORR/EOR/BIC instructions [ ARM64 ] - Print immediate in hexadecimal for AND/ORR/EOR/TST instructions. [ PowerPC ] - Do not print a dot in front of absolute address. [ Other features ] - Support for Microsoft Visual Studio (so enable Windows native compilation). - Support CMake compilation. - Cross-compile for Android. - Build libraries/tests using XCode project - Much faster, while consuming less memory for all architectures. --------------------------------- Version 2.1.2: April 3rd, 2014 This is a stable release to fix some bugs deep in the core. There is no update to any architectures or bindings, so bindings version 2.1 can be used with this version 2.1.2 just fine. [ Core changes] - Support cross-compilation for all iDevices (iPhone/iPad/iPod). - X86: do not print memory offset in negative form. - Fix a bug in X86 when Capstone cannot handle short instruction. - Print negative number above -9 without prefix 0x (arm64, mips, arm). - Correct the SONAME setup for library versioning (Linux, *BSD, Solaris). - Set library versioning for dylib of OSX. --------------------------------- Version 2.1.1: March 13th, 2014 This is a stable release to fix some bugs deep in the core. There is no update to any architectures or bindings, so bindings version 2.1 can be used with this version 2.1.1 just fine. [ Core changes] - Fix a buffer overflow bug in Thumb mode (ARM). Some special input can trigger this flaw. - Fix a crash issue when embedding Capstone into OSX kernel. This should also enable Capstone to be embedded into other systems with limited stack memory size such as Linux kernel or some firmwares. - Use a proper SONAME for library versioning (Linux). --------------------------------- Version 2.1: March 5th, 2014 [ API changes ] - API version has been bumped to 2.1. - Change prototype of cs_close() to be able to invalidate closed handle. See http://capstone-engine.org/version_2.1_API.html for more information. - Extend cs_support() to handle more query types, not only about supported architectures. This change is backward compatible, however, so existent code do not need to be modified to support this. - New query type CS_SUPPORT_DIET for cs_support() to ask about diet status of the engine. - New error code CS_ERR_DIET to report errors about newly added diet mode. - New error code CS_ERR_VERSION to report issue of incompatible versions between bindings & core engine. [ Core changes ] - On memory usage, Capstone uses about 40% less memory, while still faster than version 2.0. - All architectures are much smaller: binaries size reduce at least 30%. Especially, X86-only binary reduces from 1.9MB to just 720KB. - Support "diet" mode, in which engine size is further reduced (by around 40%) for embedding purpose. The price to pay is that we have to sacrifice some non-critical data fields. See http://capstone-engine.org/diet.html for more details. [ Architectures ] - Update all 5 architectures to fix bugs. - PowerPC: - New instructions: FMR & MSYNC. - Mips: - New instruction: DLSA - X86: - Properly handle AVX-512 instructions. - New instructions: PSETPM, SALC, INT1, GETSEC. - Fix some memory leaking issues in case of prefixed instructions such as LOCK, REP, REPNE. [ Python binding ] - Verify the core version at initialization time. Refuse to run if its version is different from the core's version. - New API disasm_lite() added to Cs class. This light API only returns tuples of (address, size, mnemonic, op_str), rather than list of CsInsn objects. This improves performance by around 30% in some benchmarks. - New API version_bind() returns binding's version, which might differ from the core's API version if the binding is out-of-date. - New API debug() returns information on Cython support, diet status & archs compiled in. - Fixed some memory leaking bugs for Cython binding. - Fix a bug crashing Cython code when accessing @regs_read/regs_write/groups. - Support diet mode. [ Java binding ] - Fix some memory leaking bugs. - New API version() returns combined version. - Support diet mode. - Better support for detail option. [ Miscellaneous ] - make.sh now can uninstall the core engine. This is done with: $ sudo ./make.sh uninstall ---------------------------------- Version 2.0: January 22nd, 2014 Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes. [ API changes ] - API version has been bumped to 2.0 (see cs_version() API) - New API cs_strerror(errno) returns a string describing error code given in its only argument. - cs_version() now returns combined version encoding both major & minor versions. - New option CS_OPT_MODE allows to change engine’s mode at run-time with cs_option(). - New option CS_OPT_MEM allows to specify user-defined functions for dynamically memory management used internally by Capstone. This is useful to embed Capstone into special environments such as kernel or firware. - New API cs_support() can be used to check if this lib supports a particular architecture (this is necessary since we now allow to choose which architectures to compile in). - The detail option is OFF by default now. To get detail information, it should be explicitly turned ON. The details then can be accessed using cs_insn.detail pointer (to newly added structure cs_detail) [ Core changes ] - On memory usage, Capstone uses much less memory, but a lot faster now. - User now can choose which architectures to be supported by modifying config.mk before compiling/installing. [ Architectures ] - Arm - Support Big-Endian mode (besides Little-Endian mode). - Support friendly register, so instead of output sub "r12,r11,0x14", we have "sub ip,fp,0x14". - Arm64: support Big-Endian mode (besides Little-Endian mode). - PowerPC: newly added. - Mips: support friendly register, so instead of output "srl $2,$1,0x1f", we have "srl $v0,$at,0x1f". - X86: bug fixes. [ Python binding ] - Python binding is vastly improved in performance: around 3 ~ 4 times faster than in 1.0. - Cython support has been added, which can further speed up over the default pure Python binding (up to 30% in some cases) - Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list) to return succesfully disassembled instructions. This improves the performance and reduces memory usage. [ Java binding ] - Better performance & bug fixes. [ Miscellaneous ] - Fixed some installation issues with Gentoo Linux. - Capstone now can easily compile/install on all *nix, including Linux, OSX, {Net, Free, Open}BSD & Solaris. ---------------------------------- [Version 1.0]: December 18th, 2013 - Initial public release. capstone-sys-0.11.0/capstone/HACK.TXT010066400017500001750000000042721363402546700154060ustar0000000000000000Capstone source is organized as followings. . <- core engine + README + COMPILE.TXT etc ├── arch <- code handling disasm engine for each arch │   ├── AArch64 <- ARM64 (aka ARMv8) engine │   ├── ARM <- ARM engine │   ├── EVM <- Ethereum engine │   ├── M680X <- M680X engine │   ├── M68K <- M68K engine │   ├── Mips <- Mips engine │   ├── PowerPC <- PowerPC engine │   ├── Sparc <- Sparc engine │   ├── SystemZ <- SystemZ engine │   ├── TMS320C64x <- TMS320C64x engine │   ├── X86 <- X86 engine │   └── XCore <- XCore engine ├── bindings <- all bindings are under this dir │   ├── java <- Java bindings + test code │   ├── ocaml <- Ocaml bindings + test code │   └── python <- Python bindings + test code ├── contrib <- Code contributed by community to help Capstone integration ├── cstool <- Cstool ├── docs <- Documentation ├── include <- API headers in C language (*.h) ├── msvc <- Microsoft Visual Studio support (for Windows compile) ├── packages <- Packages for Linux/OSX/BSD. ├── windows <- Windows support (for Windows kernel driver compile) ├── suite <- Development test tools - for Capstone developers only ├── tests <- Test code (in C language) └── xcode <- Xcode support (for MacOSX compile) Follow instructions in COMPILE.TXT for how to compile and run test code. Note: if you find some strange bugs, it is recommended to firstly clean the code and try to recompile/reinstall again. This can be done with: $ ./make.sh $ sudo ./make.sh install Then test Capstone with cstool, for example: $ cstool x32 "90 91" At the same time, for Java/Ocaml/Python bindings, be sure to always use the bindings coming with the core to avoid potential incompatibility issue with older versions. See bindings//README for detail instructions on how to compile & install the bindings. capstone-sys-0.11.0/capstone/LEB128.h010066400017500001750000000020701363402546700152770ustar0000000000000000//===- llvm/Support/LEB128.h - [SU]LEB128 utility functions -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file declares some utility functions for encoding SLEB128 and // ULEB128 values. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_SUPPORT_LEB128_H #define CS_LLVM_SUPPORT_LEB128_H #include "include/capstone/capstone.h" /// Utility function to decode a ULEB128 value. static inline uint64_t decodeULEB128(const uint8_t *p, unsigned *n) { const uint8_t *orig_p = p; uint64_t Value = 0; unsigned Shift = 0; do { Value += (uint64_t)(*p & 0x7f) << Shift; Shift += 7; } while (*p++ >= 128); if (n) *n = (unsigned)(p - orig_p); return Value; } #endif // LLVM_SYSTEM_LEB128_H capstone-sys-0.11.0/capstone/LICENSE.TXT010066400017500001750000000032271363402546700157610ustar0000000000000000This is the software license for Capstone disassembly framework. Capstone has been designed & implemented by Nguyen Anh Quynh See http://www.capstone-engine.org for further information. Copyright (c) 2013, COSEINC. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the developer(s) nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. capstone-sys-0.11.0/capstone/LICENSE_LLVM.TXT010066400017500001750000000064031363402546700166120ustar0000000000000000============================================================================== LLVM Release License ============================================================================== University of Illinois/NCSA Open Source License Copyright (c) 2003-2013 University of Illinois at Urbana-Champaign. All rights reserved. Developed by: LLVM Team University of Illinois at Urbana-Champaign http://llvm.org Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal with the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimers. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimers in the documentation and/or other materials provided with the distribution. * Neither the names of the LLVM Team, University of Illinois at Urbana-Champaign, nor the names of its contributors may be used to endorse or promote products derived from this Software without specific prior written permission. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE SOFTWARE. ============================================================================== Copyrights and Licenses for Third Party Software Distributed with LLVM: ============================================================================== The LLVM software contains code written by third parties. Such software will have its own individual LICENSE.TXT file in the directory in which it appears. This file will describe the copyrights, license, and restrictions which apply to that code. The disclaimer of warranty in the University of Illinois Open Source License applies to all code in the LLVM Distribution, and nothing in any of the other licenses gives permission to use the names of the LLVM Team or the University of Illinois to endorse or promote products derived from this Software. The following pieces of software have additional or alternate copyrights, licenses, and/or restrictions: Program Directory ------- --------- Autoconf llvm/autoconf llvm/projects/ModuleMaker/autoconf llvm/projects/sample/autoconf Google Test llvm/utils/unittest/googletest OpenBSD regex llvm/lib/Support/{reg*, COPYRIGHT.regex} pyyaml tests llvm/test/YAMLParser/{*.data, LICENSE.TXT} ARM contributions llvm/lib/Target/ARM/LICENSE.TXT md5 contributions llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h capstone-sys-0.11.0/capstone/MCDisassembler.h010066400017500001750000000004361363402546700173030ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_MCDISASSEMBLER_H #define CS_MCDISASSEMBLER_H typedef enum DecodeStatus { MCDisassembler_Fail = 0, MCDisassembler_SoftFail = 1, MCDisassembler_Success = 3, } DecodeStatus; #endif capstone-sys-0.11.0/capstone/MCFixedLenDisassembler.h010066400017500001750000000024051363402546700207200ustar0000000000000000//===-- llvm/MC/MCFixedLenDisassembler.h - Decoder driver -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Fixed length disassembler decoder state machine driver. //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_MC_MCFIXEDLENDISASSEMBLER_H #define CS_LLVM_MC_MCFIXEDLENDISASSEMBLER_H // Disassembler state machine opcodes. enum DecoderOps { MCD_OPC_ExtractField = 1, // OPC_ExtractField(uint8_t Start, uint8_t Len) MCD_OPC_FilterValue, // OPC_FilterValue(uleb128 Val, uint16_t NumToSkip) MCD_OPC_CheckField, // OPC_CheckField(uint8_t Start, uint8_t Len, // uleb128 Val, uint16_t NumToSkip) MCD_OPC_CheckPredicate, // OPC_CheckPredicate(uleb128 PIdx, uint16_t NumToSkip) MCD_OPC_Decode, // OPC_Decode(uleb128 Opcode, uleb128 DIdx) MCD_OPC_SoftFail, // OPC_SoftFail(uleb128 PMask, uleb128 NMask) MCD_OPC_Fail // OPC_Fail() }; #endif capstone-sys-0.11.0/capstone/MCInst.c010066400017500001750000000062071363403403300155650ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #if defined(CAPSTONE_HAS_OSXKERNEL) #include #include #else #include #include #endif #include #include "MCInst.h" #include "utils.h" #define MCINST_CACHE (ARR_SIZE(mcInst->Operands) - 1) void MCInst_Init(MCInst *inst) { unsigned int i; for (i = 0; i < 48; i++) { inst->Operands[i].Kind = kInvalid; } inst->Opcode = 0; inst->OpcodePub = 0; inst->size = 0; inst->has_imm = false; inst->op1_size = 0; inst->writeback = false; inst->ac_idx = 0; inst->popcode_adjust = 0; inst->assembly[0] = '\0'; inst->xAcquireRelease = 0; } void MCInst_clear(MCInst *inst) { inst->size = 0; } // do not free @Op void MCInst_insert0(MCInst *inst, int index, MCOperand *Op) { int i; for(i = inst->size; i > index; i--) //memcpy(&(inst->Operands[i]), &(inst->Operands[i-1]), sizeof(MCOperand)); inst->Operands[i] = inst->Operands[i-1]; inst->Operands[index] = *Op; inst->size++; } void MCInst_setOpcode(MCInst *inst, unsigned Op) { inst->Opcode = Op; } void MCInst_setOpcodePub(MCInst *inst, unsigned Op) { inst->OpcodePub = Op; } unsigned MCInst_getOpcode(const MCInst *inst) { return inst->Opcode; } unsigned MCInst_getOpcodePub(const MCInst *inst) { return inst->OpcodePub; } MCOperand *MCInst_getOperand(MCInst *inst, unsigned i) { return &inst->Operands[i]; } unsigned MCInst_getNumOperands(const MCInst *inst) { return inst->size; } // This addOperand2 function doesnt free Op void MCInst_addOperand2(MCInst *inst, MCOperand *Op) { inst->Operands[inst->size] = *Op; inst->size++; } bool MCOperand_isValid(const MCOperand *op) { return op->Kind != kInvalid; } bool MCOperand_isReg(const MCOperand *op) { return op->Kind == kRegister; } bool MCOperand_isImm(const MCOperand *op) { return op->Kind == kImmediate; } bool MCOperand_isFPImm(const MCOperand *op) { return op->Kind == kFPImmediate; } /// getReg - Returns the register number. unsigned MCOperand_getReg(const MCOperand *op) { return op->RegVal; } /// setReg - Set the register number. void MCOperand_setReg(MCOperand *op, unsigned Reg) { op->RegVal = Reg; } int64_t MCOperand_getImm(MCOperand *op) { return op->ImmVal; } void MCOperand_setImm(MCOperand *op, int64_t Val) { op->ImmVal = Val; } double MCOperand_getFPImm(const MCOperand *op) { return op->FPImmVal; } void MCOperand_setFPImm(MCOperand *op, double Val) { op->FPImmVal = Val; } MCOperand *MCOperand_CreateReg1(MCInst *mcInst, unsigned Reg) { MCOperand *op = &(mcInst->Operands[MCINST_CACHE]); op->Kind = kRegister; op->RegVal = Reg; return op; } void MCOperand_CreateReg0(MCInst *mcInst, unsigned Reg) { MCOperand *op = &(mcInst->Operands[mcInst->size]); mcInst->size++; op->Kind = kRegister; op->RegVal = Reg; } MCOperand *MCOperand_CreateImm1(MCInst *mcInst, int64_t Val) { MCOperand *op = &(mcInst->Operands[MCINST_CACHE]); op->Kind = kImmediate; op->ImmVal = Val; return op; } void MCOperand_CreateImm0(MCInst *mcInst, int64_t Val) { MCOperand *op = &(mcInst->Operands[mcInst->size]); mcInst->size++; op->Kind = kImmediate; op->ImmVal = Val; } capstone-sys-0.11.0/capstone/MCInst.h010066400017500001750000000102061363403403300155640ustar0000000000000000//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the declaration of the MCInst and MCOperand classes, which // is the basic representation used to represent low-level machine code // instructions. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_MCINST_H #define CS_MCINST_H #include "include/capstone/capstone.h" typedef struct MCInst MCInst; typedef struct cs_struct cs_struct; typedef struct MCOperand MCOperand; /// MCOperand - Instances of this class represent operands of the MCInst class. /// This is a simple discriminated union. struct MCOperand { enum { kInvalid = 0, ///< Uninitialized. kRegister, ///< Register operand. kImmediate, ///< Immediate operand. kFPImmediate, ///< Floating-point immediate operand. } MachineOperandType; unsigned char Kind; union { unsigned RegVal; int64_t ImmVal; double FPImmVal; }; }; bool MCOperand_isValid(const MCOperand *op); bool MCOperand_isReg(const MCOperand *op); bool MCOperand_isImm(const MCOperand *op); bool MCOperand_isFPImm(const MCOperand *op); bool MCOperand_isInst(const MCOperand *op); /// getReg - Returns the register number. unsigned MCOperand_getReg(const MCOperand *op); /// setReg - Set the register number. void MCOperand_setReg(MCOperand *op, unsigned Reg); int64_t MCOperand_getImm(MCOperand *op); void MCOperand_setImm(MCOperand *op, int64_t Val); double MCOperand_getFPImm(const MCOperand *op); void MCOperand_setFPImm(MCOperand *op, double Val); const MCInst *MCOperand_getInst(const MCOperand *op); void MCOperand_setInst(MCOperand *op, const MCInst *Val); // create Reg operand in the next slot void MCOperand_CreateReg0(MCInst *inst, unsigned Reg); // create Reg operand use the last-unused slot MCOperand *MCOperand_CreateReg1(MCInst *inst, unsigned Reg); // create Imm operand in the next slot void MCOperand_CreateImm0(MCInst *inst, int64_t Val); // create Imm operand in the last-unused slot MCOperand *MCOperand_CreateImm1(MCInst *inst, int64_t Val); /// MCInst - Instances of this class represent a single low-level machine /// instruction. struct MCInst { unsigned OpcodePub; uint8_t size; // number of operands bool has_imm; // indicate this instruction has an X86_OP_IMM operand - used for ATT syntax uint8_t op1_size; // size of 1st operand - for X86 Intel syntax unsigned Opcode; MCOperand Operands[48]; cs_insn *flat_insn; // insn to be exposed to public uint64_t address; // address of this insn cs_struct *csh; // save the main csh uint8_t x86opsize; // opsize for [mem] operand // (Optional) instruction prefix, which can be up to 4 bytes. // A prefix byte gets value 0 when irrelevant. // This is copied from cs_x86 struct uint8_t x86_prefix[4]; uint8_t imm_size; // immediate size for X86_OP_IMM operand bool writeback; // writeback for ARM // operand access index for list of registers sharing the same access right (for ARM) uint8_t ac_idx; uint8_t popcode_adjust; // Pseudo X86 instruction adjust char assembly[8]; // for special instruction, so that we dont need printer unsigned char evm_data[32]; // for EVM PUSH operand uint8_t xAcquireRelease; // X86 xacquire/xrelease }; void MCInst_Init(MCInst *inst); void MCInst_clear(MCInst *inst); // do not free operand after inserting void MCInst_insert0(MCInst *inst, int index, MCOperand *Op); void MCInst_setOpcode(MCInst *inst, unsigned Op); unsigned MCInst_getOpcode(const MCInst*); void MCInst_setOpcodePub(MCInst *inst, unsigned Op); unsigned MCInst_getOpcodePub(const MCInst*); MCOperand *MCInst_getOperand(MCInst *inst, unsigned i); unsigned MCInst_getNumOperands(const MCInst *inst); // This addOperand2 function doesnt free Op void MCInst_addOperand2(MCInst *inst, MCOperand *Op); #endif capstone-sys-0.11.0/capstone/MCInstrDesc.c010066400017500001750000000010171363402546700165530ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "MCInstrDesc.h" /// isPredicate - Set if this is one of the operands that made up of /// the predicate operand that controls an isPredicable() instruction. bool MCOperandInfo_isPredicate(const MCOperandInfo *m) { return m->Flags & (1 << MCOI_Predicate); } /// isOptionalDef - Set if this operand is a optional def. /// bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m) { return m->Flags & (1 << MCOI_OptionalDef); } capstone-sys-0.11.0/capstone/MCInstrDesc.h010066400017500001750000000120771363402546700165700ustar0000000000000000//===-- llvm/MC/MCInstrDesc.h - Instruction Descriptors -*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file defines the MCOperandInfo and MCInstrDesc classes, which // are used to describe target instructions and their operands. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_MC_MCINSTRDESC_H #define CS_LLVM_MC_MCINSTRDESC_H #include "capstone/platform.h" //===----------------------------------------------------------------------===// // Machine Operand Flags and Description //===----------------------------------------------------------------------===// // Operand constraints enum MCOI_OperandConstraint { MCOI_TIED_TO = 0, // Must be allocated the same register as. MCOI_EARLY_CLOBBER // Operand is an early clobber register operand }; /// OperandFlags - These are flags set on operands, but should be considered /// private, all access should go through the MCOperandInfo accessors. /// See the accessors for a description of what these are. enum MCOI_OperandFlags { MCOI_LookupPtrRegClass = 0, MCOI_Predicate, MCOI_OptionalDef }; /// Operand Type - Operands are tagged with one of the values of this enum. enum MCOI_OperandType { MCOI_OPERAND_UNKNOWN, MCOI_OPERAND_IMMEDIATE, MCOI_OPERAND_REGISTER, MCOI_OPERAND_MEMORY, MCOI_OPERAND_PCREL }; /// MCOperandInfo - This holds information about one operand of a machine /// instruction, indicating the register class for register operands, etc. /// typedef struct MCOperandInfo { /// RegClass - This specifies the register class enumeration of the operand /// if the operand is a register. If isLookupPtrRegClass is set, then this is /// an index that is passed to TargetRegisterInfo::getPointerRegClass(x) to /// get a dynamic register class. int16_t RegClass; /// Flags - These are flags from the MCOI::OperandFlags enum. uint8_t Flags; /// OperandType - Information about the type of the operand. uint8_t OperandType; /// Lower 16 bits are used to specify which constraints are set. The higher 16 /// bits are used to specify the value of constraints (4 bits each). uint32_t Constraints; /// Currently no other information. } MCOperandInfo; //===----------------------------------------------------------------------===// // Machine Instruction Flags and Description //===----------------------------------------------------------------------===// /// MCInstrDesc flags - These should be considered private to the /// implementation of the MCInstrDesc class. Clients should use the predicate /// methods on MCInstrDesc, not use these directly. These all correspond to /// bitfields in the MCInstrDesc::Flags field. enum { MCID_Variadic = 0, MCID_HasOptionalDef, MCID_Pseudo, MCID_Return, MCID_Call, MCID_Barrier, MCID_Terminator, MCID_Branch, MCID_IndirectBranch, MCID_Compare, MCID_MoveImm, MCID_Bitcast, MCID_Select, MCID_DelaySlot, MCID_FoldableAsLoad, MCID_MayLoad, MCID_MayStore, MCID_Predicable, MCID_NotDuplicable, MCID_UnmodeledSideEffects, MCID_Commutable, MCID_ConvertibleTo3Addr, MCID_UsesCustomInserter, MCID_HasPostISelHook, MCID_Rematerializable, MCID_CheapAsAMove, MCID_ExtraSrcRegAllocReq, MCID_ExtraDefRegAllocReq, MCID_RegSequence, MCID_ExtractSubreg, MCID_InsertSubreg }; /// MCInstrDesc - Describe properties that are true of each instruction in the /// target description file. This captures information about side effects, /// register use and many other things. There is one instance of this struct /// for each target instruction class, and the MachineInstr class points to /// this struct directly to describe itself. typedef struct MCInstrDesc { unsigned short Opcode; // The opcode number unsigned char NumOperands; // Num of args (may be more if variable_ops) unsigned char NumDefs; // Num of args that are definitions unsigned short SchedClass; // enum identifying instr sched class unsigned char Size; // Number of bytes in encoding. unsigned Flags; // Flags identifying machine instr class uint64_t TSFlags; // Target Specific Flag values char ImplicitUses; // Registers implicitly read by this instr char ImplicitDefs; // Registers implicitly defined by this instr const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands uint64_t DeprecatedFeatureMask;// Feature bits that this is deprecated on, if any // A complex method to determine is a certain is deprecated or not, and return // the reason for deprecation. //bool (*ComplexDeprecationInfo)(MCInst &, MCSubtargetInfo &, std::string &); unsigned char ComplexDeprecationInfo; // dummy field, just to satisfy initializer } MCInstrDesc; bool MCOperandInfo_isPredicate(const MCOperandInfo *m); bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m); #endif capstone-sys-0.11.0/capstone/MCRegisterInfo.c010066400017500001750000000067451363402546700172720ustar0000000000000000//=== MC/MCRegisterInfo.cpp - Target Register Description -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file implements MCRegisterInfo functions. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "MCRegisterInfo.h" /// DiffListIterator - Base iterator class that can traverse the /// differentially encoded register and regunit lists in DiffLists. /// Don't use this class directly, use one of the specialized sub-classes /// defined below. typedef struct DiffListIterator { uint16_t Val; const MCPhysReg *List; } DiffListIterator; void MCRegisterInfo_InitMCRegisterInfo(MCRegisterInfo *RI, const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, uint16_t (*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const char *Strings, const uint16_t *SubIndices, unsigned NumIndices, const uint16_t *RET) { RI->Desc = D; RI->NumRegs = NR; RI->RAReg = RA; RI->PCReg = PC; RI->Classes = C; RI->DiffLists = DL; RI->RegStrings = Strings; RI->NumClasses = NC; RI->RegUnitRoots = RURoots; RI->NumRegUnits = NRU; RI->SubRegIndices = SubIndices; RI->NumSubRegIndices = NumIndices; RI->RegEncodingTable = RET; } static void DiffListIterator_init(DiffListIterator *d, MCPhysReg InitVal, const MCPhysReg *DiffList) { d->Val = InitVal; d->List = DiffList; } static uint16_t DiffListIterator_getVal(DiffListIterator *d) { return d->Val; } static bool DiffListIterator_next(DiffListIterator *d) { MCPhysReg D; if (d->List == 0) return false; D = *d->List; d->List++; d->Val += D; if (!D) d->List = 0; return (D != 0); } static bool DiffListIterator_isValid(DiffListIterator *d) { return (d->List != 0); } unsigned MCRegisterInfo_getMatchingSuperReg(const MCRegisterInfo *RI, unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC) { DiffListIterator iter; if (Reg >= RI->NumRegs) { return 0; } DiffListIterator_init(&iter, (MCPhysReg)Reg, RI->DiffLists + RI->Desc[Reg].SuperRegs); DiffListIterator_next(&iter); while(DiffListIterator_isValid(&iter)) { uint16_t val = DiffListIterator_getVal(&iter); if (MCRegisterClass_contains(RC, val) && Reg == MCRegisterInfo_getSubReg(RI, val, SubIdx)) return val; DiffListIterator_next(&iter); } return 0; } unsigned MCRegisterInfo_getSubReg(const MCRegisterInfo *RI, unsigned Reg, unsigned Idx) { DiffListIterator iter; const uint16_t *SRI = RI->SubRegIndices + RI->Desc[Reg].SubRegIndices; DiffListIterator_init(&iter, (MCPhysReg)Reg, RI->DiffLists + RI->Desc[Reg].SubRegs); DiffListIterator_next(&iter); while(DiffListIterator_isValid(&iter)) { if (*SRI == Idx) return DiffListIterator_getVal(&iter); DiffListIterator_next(&iter); ++SRI; } return 0; } const MCRegisterClass* MCRegisterInfo_getRegClass(const MCRegisterInfo *RI, unsigned i) { //assert(i < getNumRegClasses() && "Register Class ID out of range"); if (i >= RI->NumClasses) return 0; return &(RI->Classes[i]); } bool MCRegisterClass_contains(const MCRegisterClass *c, unsigned Reg) { unsigned InByte = Reg % 8; unsigned Byte = Reg / 8; if (Byte >= c->RegSetSize) return false; return (c->RegSet[Byte] & (1 << InByte)) != 0; } capstone-sys-0.11.0/capstone/MCRegisterInfo.h010066400017500001750000000113271363402546700172670ustar0000000000000000//=== MC/MCRegisterInfo.h - Target Register Description ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file describes an abstract interface used to get information about a // target machines register file. This information is used for a variety of // purposed, especially register allocation. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_MC_MCREGISTERINFO_H #define CS_LLVM_MC_MCREGISTERINFO_H #include "capstone/platform.h" /// An unsigned integer type large enough to represent all physical registers, /// but not necessarily virtual registers. typedef uint16_t MCPhysReg; typedef const MCPhysReg* iterator; typedef struct MCRegisterClass { iterator RegsBegin; const uint8_t *RegSet; uint32_t NameIdx; uint16_t RegsSize; uint16_t RegSetSize; uint16_t ID; uint16_t RegSize, Alignment; // Size & Alignment of register in bytes int8_t CopyCost; bool Allocatable; } MCRegisterClass; /// MCRegisterDesc - This record contains information about a particular /// register. The SubRegs field is a zero terminated array of registers that /// are sub-registers of the specific register, e.g. AL, AH are sub-registers /// of AX. The SuperRegs field is a zero terminated array of registers that are /// super-registers of the specific register, e.g. RAX, EAX, are /// super-registers of AX. /// typedef struct MCRegisterDesc { uint32_t Name; // Printable name for the reg (for debugging) uint32_t SubRegs; // Sub-register set, described above uint32_t SuperRegs; // Super-register set, described above // Offset into MCRI::SubRegIndices of a list of sub-register indices for each // sub-register in SubRegs. uint32_t SubRegIndices; // RegUnits - Points to the list of register units. The low 4 bits holds the // Scale, the high bits hold an offset into DiffLists. See MCRegUnitIterator. uint32_t RegUnits; /// Index into list with lane mask sequences. The sequence contains a lanemask /// for every register unit. uint16_t RegUnitLaneMasks; } MCRegisterDesc; /// MCRegisterInfo base class - We assume that the target defines a static /// array of MCRegisterDesc objects that represent all of the machine /// registers that the target has. As such, we simply have to track a pointer /// to this array so that we can turn register number into a register /// descriptor. /// /// Note this class is designed to be a base class of TargetRegisterInfo, which /// is the interface used by codegen. However, specific targets *should never* /// specialize this class. MCRegisterInfo should only contain getters to access /// TableGen generated physical register data. It must not be extended with /// virtual methods. /// typedef struct MCRegisterInfo { const MCRegisterDesc *Desc; // Pointer to the descriptor array unsigned NumRegs; // Number of entries in the array unsigned RAReg; // Return address register unsigned PCReg; // Program counter register const MCRegisterClass *Classes; // Pointer to the regclass array unsigned NumClasses; // Number of entries in the array unsigned NumRegUnits; // Number of regunits. uint16_t (*RegUnitRoots)[2]; // Pointer to regunit root table. const MCPhysReg *DiffLists; // Pointer to the difflists array const char *RegStrings; // Pointer to the string table. const uint16_t *SubRegIndices; // Pointer to the subreg lookup // array. unsigned NumSubRegIndices; // Number of subreg indices. const uint16_t *RegEncodingTable; // Pointer to array of register // encodings. } MCRegisterInfo; void MCRegisterInfo_InitMCRegisterInfo(MCRegisterInfo *RI, const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, uint16_t (*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const char *Strings, const uint16_t *SubIndices, unsigned NumIndices, const uint16_t *RET); unsigned MCRegisterInfo_getMatchingSuperReg(const MCRegisterInfo *RI, unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC); unsigned MCRegisterInfo_getSubReg(const MCRegisterInfo *RI, unsigned Reg, unsigned Idx); const MCRegisterClass* MCRegisterInfo_getRegClass(const MCRegisterInfo *RI, unsigned i); bool MCRegisterClass_contains(const MCRegisterClass *c, unsigned Reg); #endif capstone-sys-0.11.0/capstone/Makefile010066400017500001750000000330371363403403300157250ustar0000000000000000# Capstone Disassembly Engine # By Nguyen Anh Quynh , 2013-2014 include config.mk include pkgconfig.mk # package version include functions.mk # Verbose output? V ?= 0 OS := $(shell uname) ifeq ($(OS),Darwin) LIBARCHS ?= x86_64 PREFIX ?= /usr/local endif ifeq ($(PKG_EXTRA),) PKG_VERSION = $(PKG_MAJOR).$(PKG_MINOR) else PKG_VERSION = $(PKG_MAJOR).$(PKG_MINOR).$(PKG_EXTRA) endif ifeq ($(CROSS),) RANLIB ?= ranlib else ifeq ($(ANDROID), 1) CC = $(CROSS)/../../bin/clang AR = $(CROSS)/ar RANLIB = $(CROSS)/ranlib STRIP = $(CROSS)/strip else CC = $(CROSS)gcc AR = $(CROSS)ar RANLIB = $(CROSS)ranlib STRIP = $(CROSS)strip endif ifneq (,$(findstring yes,$(CAPSTONE_DIET))) CFLAGS ?= -Os CFLAGS += -DCAPSTONE_DIET else CFLAGS ?= -O3 endif ifneq (,$(findstring yes,$(CAPSTONE_X86_ATT_DISABLE))) CFLAGS += -DCAPSTONE_X86_ATT_DISABLE endif CFLAGS += -fPIC -Wall -Wwrite-strings -Wmissing-prototypes -Iinclude ifeq ($(CAPSTONE_USE_SYS_DYN_MEM),yes) CFLAGS += -DCAPSTONE_USE_SYS_DYN_MEM endif ifeq ($(CAPSTONE_HAS_OSXKERNEL), yes) CFLAGS += -DCAPSTONE_HAS_OSXKERNEL SDKROOT ?= $(shell xcodebuild -version -sdk macosx Path) CFLAGS += -mmacosx-version-min=10.5 \ -isysroot$(SDKROOT) \ -I$(SDKROOT)/System/Library/Frameworks/Kernel.framework/Headers \ -mkernel \ -fno-builtin endif PREFIX ?= /usr DESTDIR ?= ifndef BUILDDIR BLDIR = . OBJDIR = . else BLDIR = $(abspath $(BUILDDIR)) OBJDIR = $(BLDIR)/obj endif INCDIR ?= $(PREFIX)/include UNAME_S := $(shell uname -s) LIBDIRARCH ?= lib # Uncomment the below line to installs x86_64 libs to lib64/ directory. # Or better, pass 'LIBDIRARCH=lib64' to 'make install/uninstall' via 'make.sh'. #LIBDIRARCH ?= lib64 LIBDIR = $(DESTDIR)$(PREFIX)/$(LIBDIRARCH) BINDIR = $(DESTDIR)$(PREFIX)/bin LIBDATADIR = $(LIBDIR) # Don't redefine $LIBDATADIR when global environment variable # USE_GENERIC_LIBDATADIR is set. This is used by the pkgsrc framework. ifndef USE_GENERIC_LIBDATADIR ifeq ($(UNAME_S), FreeBSD) LIBDATADIR = $(DESTDIR)$(PREFIX)/libdata endif ifeq ($(UNAME_S), DragonFly) LIBDATADIR = $(DESTDIR)$(PREFIX)/libdata endif endif INSTALL_BIN ?= install INSTALL_DATA ?= $(INSTALL_BIN) -m0644 INSTALL_LIB ?= $(INSTALL_BIN) -m0755 LIBNAME = capstone DEP_ARM = DEP_ARM += $(wildcard arch/ARM/ARM*.inc) LIBOBJ_ARM = ifneq (,$(findstring arm,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_ARM LIBSRC_ARM += $(wildcard arch/ARM/ARM*.c) LIBOBJ_ARM += $(LIBSRC_ARM:%.c=$(OBJDIR)/%.o) endif DEP_ARM64 = DEP_ARM64 += $(wildcard arch/AArch64/AArch64*.inc) LIBOBJ_ARM64 = ifneq (,$(findstring aarch64,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_ARM64 LIBSRC_ARM64 += $(wildcard arch/AArch64/AArch64*.c) LIBOBJ_ARM64 += $(LIBSRC_ARM64:%.c=$(OBJDIR)/%.o) endif DEP_M68K = DEP_M68K += $(wildcard arch/M68K/M68K*.inc) DEP_M68K += $(wildcard arch/M68K/M68K*.h) LIBOBJ_M68K = ifneq (,$(findstring m68k,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_M68K LIBSRC_M68K += $(wildcard arch/M68K/M68K*.c) LIBOBJ_M68K += $(LIBSRC_M68K:%.c=$(OBJDIR)/%.o) endif DEP_MIPS = DEP_MIPS += $(wildcard arch/Mips/Mips*.inc) LIBOBJ_MIPS = ifneq (,$(findstring mips,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_MIPS LIBSRC_MIPS += $(wildcard arch/Mips/Mips*.c) LIBOBJ_MIPS += $(LIBSRC_MIPS:%.c=$(OBJDIR)/%.o) endif DEP_PPC = DEP_PPC += $(wildcard arch/PowerPC/PPC*.inc) LIBOBJ_PPC = ifneq (,$(findstring powerpc,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_POWERPC LIBSRC_PPC += $(wildcard arch/PowerPC/PPC*.c) LIBOBJ_PPC += $(LIBSRC_PPC:%.c=$(OBJDIR)/%.o) endif DEP_SPARC = DEP_SPARC += $(wildcard arch/Sparc/Sparc*.inc) LIBOBJ_SPARC = ifneq (,$(findstring sparc,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_SPARC LIBSRC_SPARC += $(wildcard arch/Sparc/Sparc*.c) LIBOBJ_SPARC += $(LIBSRC_SPARC:%.c=$(OBJDIR)/%.o) endif DEP_SYSZ = DEP_SYSZ += $(wildcard arch/SystemZ/SystemZ*.inc) LIBOBJ_SYSZ = ifneq (,$(findstring systemz,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_SYSZ LIBSRC_SYSZ += $(wildcard arch/SystemZ/SystemZ*.c) LIBOBJ_SYSZ += $(LIBSRC_SYSZ:%.c=$(OBJDIR)/%.o) endif # by default, we compile full X86 instruction sets X86_REDUCE = ifneq (,$(findstring yes,$(CAPSTONE_X86_REDUCE))) X86_REDUCE = _reduce CFLAGS += -DCAPSTONE_X86_REDUCE -Os endif DEP_X86 = DEP_X86 += arch/X86/X86GenAsmWriter$(X86_REDUCE).inc DEP_X86 += arch/X86/X86GenAsmWriter1$(X86_REDUCE).inc DEP_X86 += arch/X86/X86GenDisassemblerTables$(X86_REDUCE).inc DEP_X86 += arch/X86/X86GenInstrInfo$(X86_REDUCE).inc DEP_X86 += arch/X86/X86GenRegisterInfo.inc DEP_X86 += arch/X86/X86MappingInsn$(X86_REDUCE).inc DEP_X86 += arch/X86/X86MappingInsnOp$(X86_REDUCE).inc DEP_X86 += arch/X86/X86ImmSize.inc LIBOBJ_X86 = ifneq (,$(findstring x86,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_X86 LIBOBJ_X86 += $(OBJDIR)/arch/X86/X86DisassemblerDecoder.o LIBOBJ_X86 += $(OBJDIR)/arch/X86/X86Disassembler.o LIBOBJ_X86 += $(OBJDIR)/arch/X86/X86IntelInstPrinter.o # assembly syntax is irrelevant in Diet mode, when this info is suppressed ifeq (,$(findstring yes,$(CAPSTONE_DIET))) ifeq (,$(findstring yes,$(CAPSTONE_X86_ATT_DISABLE))) LIBOBJ_X86 += $(OBJDIR)/arch/X86/X86ATTInstPrinter.o endif endif LIBOBJ_X86 += $(OBJDIR)/arch/X86/X86Mapping.o LIBOBJ_X86 += $(OBJDIR)/arch/X86/X86Module.o endif DEP_XCORE = DEP_XCORE += $(wildcard arch/XCore/XCore*.inc) LIBOBJ_XCORE = ifneq (,$(findstring xcore,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_XCORE LIBSRC_XCORE += $(wildcard arch/XCore/XCore*.c) LIBOBJ_XCORE += $(LIBSRC_XCORE:%.c=$(OBJDIR)/%.o) endif DEP_TMS320C64X = DEP_TMS320C64X += $(wildcard arch/TMS320C64x/TMS320C64x*.inc) LIBOBJ_TMS320C64X = ifneq (,$(findstring tms320c64x,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_TMS320C64X LIBSRC_TMS320C64X += $(wildcard arch/TMS320C64x/TMS320C64x*.c) LIBOBJ_TMS320C64X += $(LIBSRC_TMS320C64X:%.c=$(OBJDIR)/%.o) endif DEP_M680X = DEP_M680X += $(wildcard arch/M680X/*.inc) DEP_M680X += $(wildcard arch/M680X/M680X*.h) LIBOBJ_M680X = ifneq (,$(findstring m680x,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_M680X LIBSRC_M680X += $(wildcard arch/M680X/*.c) LIBOBJ_M680X += $(LIBSRC_M680X:%.c=$(OBJDIR)/%.o) endif DEP_EVM = DEP_EVM += $(wildcard arch/EVM/EVM*.inc) LIBOBJ_EVM = ifneq (,$(findstring evm,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_EVM LIBSRC_EVM += $(wildcard arch/EVM/EVM*.c) LIBOBJ_EVM += $(LIBSRC_EVM:%.c=$(OBJDIR)/%.o) endif LIBOBJ = LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_ARM64) $(LIBOBJ_M68K) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_SPARC) $(LIBOBJ_SYSZ) $(LIBOBJ_X86) $(LIBOBJ_XCORE) $(LIBOBJ_TMS320C64X) $(LIBOBJ_M680X) $(LIBOBJ_EVM) LIBOBJ += $(OBJDIR)/MCInst.o ifeq ($(PKG_EXTRA),) PKGCFGDIR = $(LIBDATADIR)/pkgconfig else PKGCFGDIR ?= $(LIBDATADIR)/pkgconfig ifeq ($(PKGCFGDIR),) PKGCFGDIR = $(LIBDATADIR)/pkgconfig endif endif API_MAJOR=$(shell echo `grep -e CS_API_MAJOR include/capstone/capstone.h | grep -v = | awk '{print $$3}'` | awk '{print $$1}') VERSION_EXT = IS_APPLE := $(shell $(CC) -dM -E - < /dev/null 2> /dev/null | grep __apple_build_version__ | wc -l | tr -d " ") ifeq ($(IS_APPLE),1) # on MacOS, do not build in Universal format by default MACOS_UNIVERSAL ?= no ifeq ($(MACOS_UNIVERSAL),yes) CFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) LDFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) endif EXT = dylib VERSION_EXT = $(API_MAJOR).$(EXT) $(LIBNAME)_LDFLAGS += -dynamiclib -install_name lib$(LIBNAME).$(VERSION_EXT) -current_version $(PKG_MAJOR).$(PKG_MINOR).$(PKG_EXTRA) -compatibility_version $(PKG_MAJOR).$(PKG_MINOR) AR_EXT = a # Homebrew wants to make sure its formula does not disable FORTIFY_SOURCE # However, this is not really necessary because 'CAPSTONE_USE_SYS_DYN_MEM=yes' by default ifneq ($(HOMEBREW_CAPSTONE),1) ifneq ($(CAPSTONE_USE_SYS_DYN_MEM),yes) # remove string check because OSX kernel complains about missing symbols CFLAGS += -D_FORTIFY_SOURCE=0 endif endif else CFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) LDFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) $(LIBNAME)_LDFLAGS += -shared # Cygwin? IS_CYGWIN := $(shell $(CC) -dumpmachine 2>/dev/null | grep -i cygwin | wc -l) ifeq ($(IS_CYGWIN),1) EXT = dll AR_EXT = lib # Cygwin doesn't like -fPIC CFLAGS := $(CFLAGS:-fPIC=) # On Windows we need the shared library to be executable else # mingw? IS_MINGW := $(shell $(CC) --version 2>/dev/null | grep -i "\(mingw\|MSYS\)" | wc -l) ifeq ($(IS_MINGW),1) EXT = dll AR_EXT = lib # mingw doesn't like -fPIC either CFLAGS := $(CFLAGS:-fPIC=) # On Windows we need the shared library to be executable else # Linux, *BSD EXT = so VERSION_EXT = $(EXT).$(API_MAJOR) AR_EXT = a $(LIBNAME)_LDFLAGS += -Wl,-soname,lib$(LIBNAME).$(VERSION_EXT) endif endif endif ifeq ($(CAPSTONE_SHARED),yes) ifeq ($(IS_MINGW),1) LIBRARY = $(BLDIR)/$(LIBNAME).$(VERSION_EXT) else ifeq ($(IS_CYGWIN),1) LIBRARY = $(BLDIR)/$(LIBNAME).$(VERSION_EXT) else # *nix LIBRARY = $(BLDIR)/lib$(LIBNAME).$(VERSION_EXT) CFLAGS += -fvisibility=hidden endif endif ifeq ($(CAPSTONE_STATIC),yes) ifeq ($(IS_MINGW),1) ARCHIVE = $(BLDIR)/$(LIBNAME).$(AR_EXT) else ifeq ($(IS_CYGWIN),1) ARCHIVE = $(BLDIR)/$(LIBNAME).$(AR_EXT) else ARCHIVE = $(BLDIR)/lib$(LIBNAME).$(AR_EXT) endif endif PKGCFGF = $(BLDIR)/$(LIBNAME).pc .PHONY: all clean install uninstall dist all: $(LIBRARY) $(ARCHIVE) $(PKGCFGF) ifeq (,$(findstring yes,$(CAPSTONE_BUILD_CORE_ONLY))) @V=$(V) CC=$(CC) $(MAKE) -C cstool ifndef BUILDDIR $(MAKE) -C tests $(MAKE) -C suite/fuzz else $(MAKE) -C tests BUILDDIR=$(BLDIR) $(MAKE) -C suite/fuzz BUILDDIR=$(BLDIR) endif $(call install-library,$(BLDIR)/tests/) endif ifeq ($(CAPSTONE_SHARED),yes) $(LIBRARY): $(LIBOBJ) ifeq ($(V),0) $(call log,LINK,$(@:$(BLDIR)/%=%)) @$(create-library) else $(create-library) endif endif $(LIBOBJ): config.mk *.h include/capstone/*.h $(LIBOBJ_ARM): $(DEP_ARM) $(LIBOBJ_ARM64): $(DEP_ARM64) $(LIBOBJ_M68K): $(DEP_M68K) $(LIBOBJ_MIPS): $(DEP_MIPS) $(LIBOBJ_PPC): $(DEP_PPC) $(LIBOBJ_SPARC): $(DEP_SPARC) $(LIBOBJ_SYSZ): $(DEP_SYSZ) $(LIBOBJ_X86): $(DEP_X86) $(LIBOBJ_XCORE): $(DEP_XCORE) $(LIBOBJ_TMS320C64X): $(DEP_TMS320C64X) $(LIBOBJ_M680X): $(DEP_M680X) $(LIBOBJ_EVM): $(DEP_EVM) ifeq ($(CAPSTONE_STATIC),yes) $(ARCHIVE): $(LIBOBJ) @rm -f $(ARCHIVE) ifeq ($(V),0) $(call log,AR,$(@:$(BLDIR)/%=%)) @$(create-archive) else $(create-archive) endif endif $(PKGCFGF): ifeq ($(V),0) $(call log,GEN,$(@:$(BLDIR)/%=%)) @$(generate-pkgcfg) else $(generate-pkgcfg) endif install: $(PKGCFGF) $(ARCHIVE) $(LIBRARY) mkdir -p $(LIBDIR) $(call install-library,$(LIBDIR)) ifeq ($(CAPSTONE_STATIC),yes) $(INSTALL_DATA) $(ARCHIVE) $(LIBDIR) endif mkdir -p $(DESTDIR)$(INCDIR)/$(LIBNAME) $(INSTALL_DATA) include/capstone/*.h $(DESTDIR)$(INCDIR)/$(LIBNAME) mkdir -p $(PKGCFGDIR) $(INSTALL_DATA) $(PKGCFGF) $(PKGCFGDIR) mkdir -p $(BINDIR) $(INSTALL_LIB) cstool/cstool $(BINDIR) uninstall: rm -rf $(DESTDIR)$(INCDIR)/$(LIBNAME) rm -f $(LIBDIR)/lib$(LIBNAME).* rm -f $(PKGCFGDIR)/$(LIBNAME).pc rm -f $(BINDIR)/cstool clean: rm -f $(LIBOBJ) rm -f $(BLDIR)/lib$(LIBNAME).* $(BLDIR)/$(LIBNAME).pc rm -f $(PKGCFGF) [ "${ANDROID}" = "1" ] && rm -rf android-ndk-* || true $(MAKE) -C cstool clean ifeq (,$(findstring yes,$(CAPSTONE_BUILD_CORE_ONLY))) $(MAKE) -C tests clean $(MAKE) -C suite/fuzz clean rm -f $(BLDIR)/tests/lib$(LIBNAME).$(EXT) endif ifdef BUILDDIR rm -rf $(BUILDDIR) endif ifeq (,$(findstring yes,$(CAPSTONE_BUILD_CORE_ONLY))) $(MAKE) -C bindings/python clean $(MAKE) -C bindings/java clean $(MAKE) -C bindings/ocaml clean endif TAG ?= HEAD ifeq ($(TAG), HEAD) DIST_VERSION = latest else DIST_VERSION = $(TAG) endif dist: git archive --format=tar.gz --prefix=capstone-$(DIST_VERSION)/ $(TAG) > capstone-$(DIST_VERSION).tgz git archive --format=zip --prefix=capstone-$(DIST_VERSION)/ $(TAG) > capstone-$(DIST_VERSION).zip TESTS = test_basic test_detail test_arm test_arm64 test_m68k test_mips test_ppc test_sparc TESTS += test_systemz test_x86 test_xcore test_iter test_evm TESTS += test_basic.static test_detail.static test_arm.static test_arm64.static TESTS += test_m68k.static test_mips.static test_ppc.static test_sparc.static TESTS += test_systemz.static test_x86.static test_xcore.static test_m680x.static TESTS += test_skipdata test_skipdata.static test_iter.static test_evm.static check: $(TESTS) fuzztest fuzzallcorp test_%: ./tests/$@ > /dev/null && echo OK || echo FAILED FUZZ_INPUTS = $(shell find suite/MC -type f -name '*.cs') fuzztest: ./suite/fuzz/fuzz_disasm $(FUZZ_INPUTS) fuzzallcorp: ifneq ($(wildcard suite/fuzz/corpus-libFuzzer-capstone_fuzz_disasmnext-latest),) ./suite/fuzz/fuzz_bindisasm suite/fuzz/corpus-libFuzzer-capstone_fuzz_disasmnext-latest/ > fuzz_bindisasm.log || (tail -1 fuzz_bindisasm.log; false) else @echo "Skipping tests on whole corpus" endif $(OBJDIR)/%.o: %.c @mkdir -p $(@D) ifeq ($(V),0) $(call log,CC,$(@:$(OBJDIR)/%=%)) @$(compile) else $(compile) endif ifeq ($(CAPSTONE_SHARED),yes) define install-library $(INSTALL_LIB) $(LIBRARY) $1 $(if $(VERSION_EXT), cd $1 && \ rm -f lib$(LIBNAME).$(EXT) && \ ln -s lib$(LIBNAME).$(VERSION_EXT) lib$(LIBNAME).$(EXT)) endef else define install-library endef endif define create-archive $(AR) q $(ARCHIVE) $(LIBOBJ) $(RANLIB) $(ARCHIVE) endef define create-library $(CC) $(LDFLAGS) $($(LIBNAME)_LDFLAGS) $(LIBOBJ) -o $(LIBRARY) endef define generate-pkgcfg mkdir -p $(BLDIR) echo 'Name: capstone' > $(PKGCFGF) echo 'Description: Capstone disassembly engine' >> $(PKGCFGF) echo 'Version: $(PKG_VERSION)' >> $(PKGCFGF) echo 'libdir=$(LIBDIR)' >> $(PKGCFGF) echo 'includedir=$(INCDIR)/capstone' >> $(PKGCFGF) echo 'archive=$${libdir}/libcapstone.a' >> $(PKGCFGF) echo 'Libs: -L$${libdir} -lcapstone' >> $(PKGCFGF) echo 'Cflags: -I$${includedir}' >> $(PKGCFGF) endef capstone-sys-0.11.0/capstone/MathExtras.h010066400017500001750000000335011363402546700165250ustar0000000000000000//===-- llvm/Support/MathExtras.h - Useful math functions -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains some functions that are useful for math stuff. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_SUPPORT_MATHEXTRAS_H #define CS_LLVM_SUPPORT_MATHEXTRAS_H #if defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) #include "windowsce/intrin.h" #elif defined(_MSC_VER) #include #endif #ifndef __cplusplus #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #define inline /* inline */ #endif #endif // NOTE: The following support functions use the _32/_64 extensions instead of // type overloading so that signed and unsigned integers can be used without // ambiguity. /// Hi_32 - This function returns the high 32 bits of a 64 bit value. static inline uint32_t Hi_32(uint64_t Value) { return (uint32_t)(Value >> 32); } /// Lo_32 - This function returns the low 32 bits of a 64 bit value. static inline uint32_t Lo_32(uint64_t Value) { return (uint32_t)(Value); } /// isUIntN - Checks if an unsigned integer fits into the given (dynamic) /// bit width. static inline bool isUIntN(unsigned N, uint64_t x) { return x == (x & (~0ULL >> (64 - N))); } /// isIntN - Checks if an signed integer fits into the given (dynamic) /// bit width. //static inline bool isIntN(unsigned N, int64_t x) { // return N >= 64 || (-(INT64_C(1)<<(N-1)) <= x && x < (INT64_C(1)<<(N-1))); //} /// isMask_32 - This function returns true if the argument is a sequence of ones /// starting at the least significant bit with the remainder zero (32 bit /// version). Ex. isMask_32(0x0000FFFFU) == true. static inline bool isMask_32(uint32_t Value) { return Value && ((Value + 1) & Value) == 0; } /// isMask_64 - This function returns true if the argument is a sequence of ones /// starting at the least significant bit with the remainder zero (64 bit /// version). static inline bool isMask_64(uint64_t Value) { return Value && ((Value + 1) & Value) == 0; } /// isShiftedMask_32 - This function returns true if the argument contains a /// sequence of ones with the remainder zero (32 bit version.) /// Ex. isShiftedMask_32(0x0000FF00U) == true. static inline bool isShiftedMask_32(uint32_t Value) { return isMask_32((Value - 1) | Value); } /// isShiftedMask_64 - This function returns true if the argument contains a /// sequence of ones with the remainder zero (64 bit version.) static inline bool isShiftedMask_64(uint64_t Value) { return isMask_64((Value - 1) | Value); } /// isPowerOf2_32 - This function returns true if the argument is a power of /// two > 0. Ex. isPowerOf2_32(0x00100000U) == true (32 bit edition.) static inline bool isPowerOf2_32(uint32_t Value) { return Value && !(Value & (Value - 1)); } /// CountLeadingZeros_32 - this function performs the platform optimal form of /// counting the number of zeros from the most significant bit to the first one /// bit. Ex. CountLeadingZeros_32(0x00F000FF) == 8. /// Returns 32 if the word is zero. static inline unsigned CountLeadingZeros_32(uint32_t Value) { unsigned Count; // result #if __GNUC__ >= 4 // PowerPC is defined for __builtin_clz(0) #if !defined(__ppc__) && !defined(__ppc64__) if (!Value) return 32; #endif Count = __builtin_clz(Value); #else unsigned Shift; if (!Value) return 32; Count = 0; // bisection method for count leading zeros for (Shift = 32 >> 1; Shift; Shift >>= 1) { uint32_t Tmp = Value >> Shift; if (Tmp) { Value = Tmp; } else { Count |= Shift; } } #endif return Count; } /// CountLeadingOnes_32 - this function performs the operation of /// counting the number of ones from the most significant bit to the first zero /// bit. Ex. CountLeadingOnes_32(0xFF0FFF00) == 8. /// Returns 32 if the word is all ones. static inline unsigned CountLeadingOnes_32(uint32_t Value) { return CountLeadingZeros_32(~Value); } /// CountLeadingZeros_64 - This function performs the platform optimal form /// of counting the number of zeros from the most significant bit to the first /// one bit (64 bit edition.) /// Returns 64 if the word is zero. static inline unsigned CountLeadingZeros_64(uint64_t Value) { unsigned Count; // result #if __GNUC__ >= 4 // PowerPC is defined for __builtin_clzll(0) #if !defined(__ppc__) && !defined(__ppc64__) if (!Value) return 64; #endif Count = __builtin_clzll(Value); #else #ifndef _MSC_VER unsigned Shift; if (sizeof(long) == sizeof(int64_t)) { if (!Value) return 64; Count = 0; // bisection method for count leading zeros for (Shift = 64 >> 1; Shift; Shift >>= 1) { uint64_t Tmp = Value >> Shift; if (Tmp) { Value = Tmp; } else { Count |= Shift; } } } else #endif { // get hi portion uint32_t Hi = Hi_32(Value); // if some bits in hi portion if (Hi) { // leading zeros in hi portion plus all bits in lo portion Count = CountLeadingZeros_32(Hi); } else { // get lo portion uint32_t Lo = Lo_32(Value); // same as 32 bit value Count = CountLeadingZeros_32(Lo)+32; } } #endif return Count; } /// CountLeadingOnes_64 - This function performs the operation /// of counting the number of ones from the most significant bit to the first /// zero bit (64 bit edition.) /// Returns 64 if the word is all ones. static inline unsigned CountLeadingOnes_64(uint64_t Value) { return CountLeadingZeros_64(~Value); } /// CountTrailingZeros_32 - this function performs the platform optimal form of /// counting the number of zeros from the least significant bit to the first one /// bit. Ex. CountTrailingZeros_32(0xFF00FF00) == 8. /// Returns 32 if the word is zero. static inline unsigned CountTrailingZeros_32(uint32_t Value) { #if __GNUC__ >= 4 return Value ? __builtin_ctz(Value) : 32; #else static const unsigned Mod37BitPosition[] = { 32, 0, 1, 26, 2, 23, 27, 0, 3, 16, 24, 30, 28, 11, 0, 13, 4, 7, 17, 0, 25, 22, 31, 15, 29, 10, 12, 6, 0, 21, 14, 9, 5, 20, 8, 19, 18 }; // Replace "-Value" by "1+~Value" in the following commented code to avoid // MSVC warning C4146 // return Mod37BitPosition[(-Value & Value) % 37]; return Mod37BitPosition[((1 + ~Value) & Value) % 37]; #endif } /// CountTrailingOnes_32 - this function performs the operation of /// counting the number of ones from the least significant bit to the first zero /// bit. Ex. CountTrailingOnes_32(0x00FF00FF) == 8. /// Returns 32 if the word is all ones. static inline unsigned CountTrailingOnes_32(uint32_t Value) { return CountTrailingZeros_32(~Value); } /// CountTrailingZeros_64 - This function performs the platform optimal form /// of counting the number of zeros from the least significant bit to the first /// one bit (64 bit edition.) /// Returns 64 if the word is zero. static inline unsigned CountTrailingZeros_64(uint64_t Value) { #if __GNUC__ >= 4 return Value ? __builtin_ctzll(Value) : 64; #else static const unsigned Mod67Position[] = { 64, 0, 1, 39, 2, 15, 40, 23, 3, 12, 16, 59, 41, 19, 24, 54, 4, 64, 13, 10, 17, 62, 60, 28, 42, 30, 20, 51, 25, 44, 55, 47, 5, 32, 65, 38, 14, 22, 11, 58, 18, 53, 63, 9, 61, 27, 29, 50, 43, 46, 31, 37, 21, 57, 52, 8, 26, 49, 45, 36, 56, 7, 48, 35, 6, 34, 33, 0 }; // Replace "-Value" by "1+~Value" in the following commented code to avoid // MSVC warning C4146 // return Mod67Position[(-Value & Value) % 67]; return Mod67Position[((1 + ~Value) & Value) % 67]; #endif } /// CountTrailingOnes_64 - This function performs the operation /// of counting the number of ones from the least significant bit to the first /// zero bit (64 bit edition.) /// Returns 64 if the word is all ones. static inline unsigned CountTrailingOnes_64(uint64_t Value) { return CountTrailingZeros_64(~Value); } /// CountPopulation_32 - this function counts the number of set bits in a value. /// Ex. CountPopulation(0xF000F000) = 8 /// Returns 0 if the word is zero. static inline unsigned CountPopulation_32(uint32_t Value) { #if __GNUC__ >= 4 return __builtin_popcount(Value); #else uint32_t v = Value - ((Value >> 1) & 0x55555555); v = (v & 0x33333333) + ((v >> 2) & 0x33333333); return (((v + (v >> 4)) & 0xF0F0F0F) * 0x1010101) >> 24; #endif } /// CountPopulation_64 - this function counts the number of set bits in a value, /// (64 bit edition.) static inline unsigned CountPopulation_64(uint64_t Value) { #if __GNUC__ >= 4 return __builtin_popcountll(Value); #else uint64_t v = Value - ((Value >> 1) & 0x5555555555555555ULL); v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL); v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL; return (uint64_t)((v * 0x0101010101010101ULL) >> 56); #endif } /// Log2_32 - This function returns the floor log base 2 of the specified value, /// -1 if the value is zero. (32 bit edition.) /// Ex. Log2_32(32) == 5, Log2_32(1) == 0, Log2_32(0) == -1, Log2_32(6) == 2 static inline unsigned Log2_32(uint32_t Value) { return 31 - CountLeadingZeros_32(Value); } /// Log2_64 - This function returns the floor log base 2 of the specified value, /// -1 if the value is zero. (64 bit edition.) static inline unsigned Log2_64(uint64_t Value) { return 63 - CountLeadingZeros_64(Value); } /// Log2_32_Ceil - This function returns the ceil log base 2 of the specified /// value, 32 if the value is zero. (32 bit edition). /// Ex. Log2_32_Ceil(32) == 5, Log2_32_Ceil(1) == 0, Log2_32_Ceil(6) == 3 static inline unsigned Log2_32_Ceil(uint32_t Value) { return 32-CountLeadingZeros_32(Value-1); } /// Log2_64_Ceil - This function returns the ceil log base 2 of the specified /// value, 64 if the value is zero. (64 bit edition.) static inline unsigned Log2_64_Ceil(uint64_t Value) { return 64-CountLeadingZeros_64(Value-1); } /// GreatestCommonDivisor64 - Return the greatest common divisor of the two /// values using Euclid's algorithm. static inline uint64_t GreatestCommonDivisor64(uint64_t A, uint64_t B) { while (B) { uint64_t T = B; B = A % B; A = T; } return A; } /// BitsToDouble - This function takes a 64-bit integer and returns the bit /// equivalent double. static inline double BitsToDouble(uint64_t Bits) { union { uint64_t L; double D; } T; T.L = Bits; return T.D; } /// BitsToFloat - This function takes a 32-bit integer and returns the bit /// equivalent float. static inline float BitsToFloat(uint32_t Bits) { union { uint32_t I; float F; } T; T.I = Bits; return T.F; } /// DoubleToBits - This function takes a double and returns the bit /// equivalent 64-bit integer. Note that copying doubles around /// changes the bits of NaNs on some hosts, notably x86, so this /// routine cannot be used if these bits are needed. static inline uint64_t DoubleToBits(double Double) { union { uint64_t L; double D; } T; T.D = Double; return T.L; } /// FloatToBits - This function takes a float and returns the bit /// equivalent 32-bit integer. Note that copying floats around /// changes the bits of NaNs on some hosts, notably x86, so this /// routine cannot be used if these bits are needed. static inline uint32_t FloatToBits(float Float) { union { uint32_t I; float F; } T; T.F = Float; return T.I; } /// MinAlign - A and B are either alignments or offsets. Return the minimum /// alignment that may be assumed after adding the two together. static inline uint64_t MinAlign(uint64_t A, uint64_t B) { // The largest power of 2 that divides both A and B. // // Replace "-Value" by "1+~Value" in the following commented code to avoid // MSVC warning C4146 // return (A | B) & -(A | B); return (A | B) & (1 + ~(A | B)); } /// NextPowerOf2 - Returns the next power of two (in 64-bits) /// that is strictly greater than A. Returns zero on overflow. static inline uint64_t NextPowerOf2(uint64_t A) { A |= (A >> 1); A |= (A >> 2); A |= (A >> 4); A |= (A >> 8); A |= (A >> 16); A |= (A >> 32); return A + 1; } /// Returns the next integer (mod 2**64) that is greater than or equal to /// \p Value and is a multiple of \p Align. \p Align must be non-zero. /// /// Examples: /// \code /// RoundUpToAlignment(5, 8) = 8 /// RoundUpToAlignment(17, 8) = 24 /// RoundUpToAlignment(~0LL, 8) = 0 /// \endcode static inline uint64_t RoundUpToAlignment(uint64_t Value, uint64_t Align) { return ((Value + Align - 1) / Align) * Align; } /// Returns the offset to the next integer (mod 2**64) that is greater than /// or equal to \p Value and is a multiple of \p Align. \p Align must be /// non-zero. static inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align) { return RoundUpToAlignment(Value, Align) - Value; } /// abs64 - absolute value of a 64-bit int. Not all environments support /// "abs" on whatever their name for the 64-bit int type is. The absolute /// value of the largest negative number is undefined, as with "abs". static inline int64_t abs64(int64_t x) { return (x < 0) ? -x : x; } /// \brief Sign extend number in the bottom B bits of X to a 32-bit int. /// Requires 0 < B <= 32. static inline int32_t SignExtend32(uint32_t X, unsigned B) { return (int32_t)(X << (32 - B)) >> (32 - B); } /// \brief Sign extend number in the bottom B bits of X to a 64-bit int. /// Requires 0 < B <= 64. static inline int64_t SignExtend64(uint64_t X, unsigned B) { return (int64_t)(X << (64 - B)) >> (64 - B); } /// \brief Count number of 0's from the most significant bit to the least /// stopping at the first 1. /// /// Only unsigned integral types are allowed. /// /// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are /// valid arguments. static inline unsigned int countLeadingZeros(int x) { int i; const unsigned bits = sizeof(x) * 8; unsigned count = bits; if (x < 0) { return 0; } for (i = bits; --i; ) { if (x == 0) break; count--; x >>= 1; } return count; } #endif capstone-sys-0.11.0/capstone/README.md010066400017500001750000000041671363403403300155460ustar0000000000000000Capstone Engine =============== [![Build Status](https://travis-ci.org/aquynh/capstone.svg?branch=v4)](https://travis-ci.org/aquynh/capstone) [![Build status](https://ci.appveyor.com/api/projects/status/a4wvbn89wu3pinas/branch/v4?svg=true)](https://ci.appveyor.com/project/aquynh/capstone/branch/v4) Capstone is a disassembly framework with the target of becoming the ultimate disasm engine for binary analysis and reversing in the security community. Created by Nguyen Anh Quynh, then developed and maintained by a small community, Capstone offers some unparalleled features: - Support multiple hardware architectures: ARM, ARM64 (ARMv8), Ethereum VM, M68K, Mips, PPC, Sparc, SystemZ, TMS320C64X, M680X, XCore and X86 (including X86_64). - Having clean/simple/lightweight/intuitive architecture-neutral API. - Provide details on disassembled instruction (called “decomposer” by others). - Provide semantics of the disassembled instruction, such as list of implicit registers read & written. - Implemented in pure C language, with lightweight bindings for D, Clojure, F#, Common Lisp, Visual Basic, PHP, PowerShell, Emacs, Haskell, Perl, Python, Ruby, C#, NodeJS, Java, GO, C++, OCaml, Lua, Rust, Delphi, Free Pascal & Vala (ready either in main code, or provided externally by the community). - Native support for all popular platforms: Windows, Mac OSX, iOS, Android, Linux, \*BSD, Solaris, etc. - Thread-safe by design. - Special support for embedding into firmware or OS kernel. - High performance & suitable for malware analysis (capable of handling various X86 malware tricks). - Distributed under the open source BSD license. Further information is available at http://www.capstone-engine.org Compile ------- See COMPILE.TXT file for how to compile and install Capstone. Documentation ------------- See docs/README for how to customize & program your own tools with Capstone. Hack ---- See HACK.TXT file for the structure of the source code. License ------- This project is released under the BSD license. If you redistribute the binary or source code of Capstone, please attach file LICENSE.TXT with your products. capstone-sys-0.11.0/capstone/RELEASE_NOTES010066400017500001750000000000001363402546700162330ustar0000000000000000capstone-sys-0.11.0/capstone/SPONSORS.TXT010066400017500001750000000011751363402546700161650ustar0000000000000000* Version 4.0.1 - January 10th, 2019 Release 4.0.1 was sponsored by the following companies (in no particular order). - NowSecure: https://www.nowsecure.com - Verichains: https://verichains.io - Vsec: https://vsec.com.vn ----------------------------------- * Version 4.0 - December 18th, 2018 Capstone 4.0 version marks 5 years of the project! This release was sponsored by the following companies (in no particular order). - Thinkst Canary: https://canary.tools - NowSecure: https://www.nowsecure.com - ECQ: https://e-cq.net - Senrio: https://senr.io - GracefulBits: https://gracefulbits.com - Catena Cyber: https://catenacyber.fr capstone-sys-0.11.0/capstone/SStream.c010066400017500001750000000071451363402546700160230ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include #if defined(CAPSTONE_HAS_OSXKERNEL) #include #include #include #else #include #include #endif #include #include #include "SStream.h" #include "cs_priv.h" #include "utils.h" #ifdef _MSC_VER #pragma warning(disable: 4996) // disable MSVC's warning on strcpy() #endif void SStream_Init(SStream *ss) { ss->index = 0; ss->buffer[0] = '\0'; } void SStream_concat0(SStream *ss, const char *s) { #ifndef CAPSTONE_DIET unsigned int len = (unsigned int) strlen(s); memcpy(ss->buffer + ss->index, s, len); ss->index += len; ss->buffer[ss->index] = '\0'; #endif } void SStream_concat(SStream *ss, const char *fmt, ...) { #ifndef CAPSTONE_DIET va_list ap; int ret; va_start(ap, fmt); ret = cs_vsnprintf(ss->buffer + ss->index, sizeof(ss->buffer) - (ss->index + 1), fmt, ap); va_end(ap); ss->index += ret; #endif } // print number with prefix # void printInt64Bang(SStream *O, int64_t val) { if (val >= 0) { if (val > HEX_THRESHOLD) SStream_concat(O, "#0x%"PRIx64, val); else SStream_concat(O, "#%"PRIu64, val); } else { if (val <- HEX_THRESHOLD) { if (val == LONG_MIN) SStream_concat(O, "#-0x%"PRIx64, (uint64_t)val); else SStream_concat(O, "#-0x%"PRIx64, (uint64_t)-val); } else SStream_concat(O, "#-%"PRIu64, -val); } } void printUInt64Bang(SStream *O, uint64_t val) { if (val > HEX_THRESHOLD) SStream_concat(O, "#0x%"PRIx64, val); else SStream_concat(O, "#%"PRIu64, val); } // print number void printInt64(SStream *O, int64_t val) { if (val >= 0) { if (val > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, val); else SStream_concat(O, "%"PRIu64, val); } else { if (val <- HEX_THRESHOLD) { if (val == LONG_MIN) SStream_concat(O, "-0x%"PRIx64, (uint64_t)val); else SStream_concat(O, "-0x%"PRIx64, (uint64_t)-val); } else SStream_concat(O, "-%"PRIu64, -val); } } // print number in decimal mode void printInt32BangDec(SStream *O, int32_t val) { if (val >= 0) SStream_concat(O, "#%u", val); else if (val == INT_MIN) SStream_concat(O, "#-%u", val); else SStream_concat(O, "#-%u", (uint32_t)-val); } void printInt32Bang(SStream *O, int32_t val) { if (val >= 0) { if (val > HEX_THRESHOLD) SStream_concat(O, "#0x%x", val); else SStream_concat(O, "#%u", val); } else { if (val <- HEX_THRESHOLD) { if (val == INT_MIN) SStream_concat(O, "#-0x%x", (uint32_t)val); else SStream_concat(O, "#-0x%x", (uint32_t)-val); } else SStream_concat(O, "#-%u", -val); } } void printInt32(SStream *O, int32_t val) { if (val >= 0) { if (val > HEX_THRESHOLD) SStream_concat(O, "0x%x", val); else SStream_concat(O, "%u", val); } else { if (val <- HEX_THRESHOLD) { if (val == INT_MIN) SStream_concat(O, "-0x%x", (uint32_t)val); else SStream_concat(O, "-0x%x", (uint32_t)-val); } else SStream_concat(O, "-%u", -val); } } void printUInt32Bang(SStream *O, uint32_t val) { if (val > HEX_THRESHOLD) SStream_concat(O, "#0x%x", val); else SStream_concat(O, "#%u", val); } void printUInt32(SStream *O, uint32_t val) { if (val > HEX_THRESHOLD) SStream_concat(O, "0x%x", val); else SStream_concat(O, "%u", val); } /* int main() { SStream ss; int64_t i; SStream_Init(&ss); SStream_concat(&ss, "hello "); SStream_concat(&ss, "%d - 0x%x", 200, 16); i = 123; SStream_concat(&ss, " + %ld", i); SStream_concat(&ss, "%s", "haaaaa"); printf("%s\n", ss.buffer); return 0; } */ capstone-sys-0.11.0/capstone/SStream.h010066400017500001750000000014351363402546700160240ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SSTREAM_H_ #define CS_SSTREAM_H_ #include "include/capstone/platform.h" typedef struct SStream { char buffer[512]; int index; } SStream; void SStream_Init(SStream *ss); void SStream_concat(SStream *ss, const char *fmt, ...); void SStream_concat0(SStream *ss, const char *s); void printInt64Bang(SStream *O, int64_t val); void printUInt64Bang(SStream *O, uint64_t val); void printInt64(SStream *O, int64_t val); void printInt32Bang(SStream *O, int32_t val); void printInt32(SStream *O, int32_t val); void printUInt32Bang(SStream *O, uint32_t val); void printUInt32(SStream *O, uint32_t val); // print number in decimal mode void printInt32BangDec(SStream *O, int32_t val); #endif capstone-sys-0.11.0/capstone/TODO010066400017500001750000000006531363402546700147660ustar0000000000000000Issues to be solved in next versions [Core] - X86 can already handle all the malware tricks we are aware of. If you find any such instruction sequence that Capstone disassembles wrongly or fails completely, please report. Fixing this issue is always the top priority of our project. - More optimization for better performance. [Bindings] - OCaml binding is working, but still needs to support the core API better. capstone-sys-0.11.0/capstone/arch/AArch64/AArch64AddressingModes.h010066400017500001750000000150231363402546700226350ustar0000000000000000//===- AArch64AddressingModes.h - AArch64 Addressing Modes ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the AArch64 addressing mode implementation stuff. // //===----------------------------------------------------------------------===// #ifndef CS_AARCH64_ADDRESSINGMODES_H #define CS_AARCH64_ADDRESSINGMODES_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MathExtras.h" /// AArch64_AM - AArch64 Addressing Mode Stuff //===----------------------------------------------------------------------===// // Shifts // typedef enum AArch64_AM_ShiftExtendType { AArch64_AM_InvalidShiftExtend = -1, AArch64_AM_LSL = 0, AArch64_AM_LSR, AArch64_AM_ASR, AArch64_AM_ROR, AArch64_AM_MSL, AArch64_AM_UXTB, AArch64_AM_UXTH, AArch64_AM_UXTW, AArch64_AM_UXTX, AArch64_AM_SXTB, AArch64_AM_SXTH, AArch64_AM_SXTW, AArch64_AM_SXTX, } AArch64_AM_ShiftExtendType; /// getShiftName - Get the string encoding for the shift type. static inline const char *AArch64_AM_getShiftExtendName(AArch64_AM_ShiftExtendType ST) { switch (ST) { default: return NULL; // never reach case AArch64_AM_LSL: return "lsl"; case AArch64_AM_LSR: return "lsr"; case AArch64_AM_ASR: return "asr"; case AArch64_AM_ROR: return "ror"; case AArch64_AM_MSL: return "msl"; case AArch64_AM_UXTB: return "uxtb"; case AArch64_AM_UXTH: return "uxth"; case AArch64_AM_UXTW: return "uxtw"; case AArch64_AM_UXTX: return "uxtx"; case AArch64_AM_SXTB: return "sxtb"; case AArch64_AM_SXTH: return "sxth"; case AArch64_AM_SXTW: return "sxtw"; case AArch64_AM_SXTX: return "sxtx"; } } /// getShiftType - Extract the shift type. static inline AArch64_AM_ShiftExtendType AArch64_AM_getShiftType(unsigned Imm) { switch ((Imm >> 6) & 0x7) { default: return AArch64_AM_InvalidShiftExtend; case 0: return AArch64_AM_LSL; case 1: return AArch64_AM_LSR; case 2: return AArch64_AM_ASR; case 3: return AArch64_AM_ROR; case 4: return AArch64_AM_MSL; } } /// getShiftValue - Extract the shift value. static inline unsigned AArch64_AM_getShiftValue(unsigned Imm) { return Imm & 0x3f; } //===----------------------------------------------------------------------===// // Extends // /// getArithShiftValue - get the arithmetic shift value. static inline unsigned AArch64_AM_getArithShiftValue(unsigned Imm) { return Imm & 0x7; } /// getExtendType - Extract the extend type for operands of arithmetic ops. static inline AArch64_AM_ShiftExtendType AArch64_AM_getExtendType(unsigned Imm) { // assert((Imm & 0x7) == Imm && "invalid immediate!"); switch (Imm) { default: // llvm_unreachable("Compiler bug!"); case 0: return AArch64_AM_UXTB; case 1: return AArch64_AM_UXTH; case 2: return AArch64_AM_UXTW; case 3: return AArch64_AM_UXTX; case 4: return AArch64_AM_SXTB; case 5: return AArch64_AM_SXTH; case 6: return AArch64_AM_SXTW; case 7: return AArch64_AM_SXTX; } } static inline AArch64_AM_ShiftExtendType AArch64_AM_getArithExtendType(unsigned Imm) { return AArch64_AM_getExtendType((Imm >> 3) & 0x7); } static inline uint64_t ror(uint64_t elt, unsigned size) { return ((elt & 1) << (size-1)) | (elt >> 1); } /// decodeLogicalImmediate - Decode a logical immediate value in the form /// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the /// integer value it represents with regSize bits. static inline uint64_t AArch64_AM_decodeLogicalImmediate(uint64_t val, unsigned regSize) { // Extract the N, imms, and immr fields. unsigned N = (val >> 12) & 1; unsigned immr = (val >> 6) & 0x3f; unsigned imms = val & 0x3f; unsigned i; // assert((regSize == 64 || N == 0) && "undefined logical immediate encoding"); int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); // assert(len >= 0 && "undefined logical immediate encoding"); unsigned size = (1 << len); unsigned R = immr & (size - 1); unsigned S = imms & (size - 1); // assert(S != size - 1 && "undefined logical immediate encoding"); uint64_t pattern = (1ULL << (S + 1)) - 1; for (i = 0; i < R; ++i) pattern = ror(pattern, size); // Replicate the pattern to fill the regSize. while (size != regSize) { pattern |= (pattern << size); size *= 2; } return pattern; } /// isValidDecodeLogicalImmediate - Check to see if the logical immediate value /// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits) /// is a valid encoding for an integer value with regSize bits. static inline bool AArch64_AM_isValidDecodeLogicalImmediate(uint64_t val, unsigned regSize) { unsigned size; unsigned S; int len; // Extract the N and imms fields needed for checking. unsigned N = (val >> 12) & 1; unsigned imms = val & 0x3f; if (regSize == 32 && N != 0) // undefined logical immediate encoding return false; len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); if (len < 0) // undefined logical immediate encoding return false; size = (1 << len); S = imms & (size - 1); if (S == size - 1) // undefined logical immediate encoding return false; return true; } //===----------------------------------------------------------------------===// // Floating-point Immediates // static inline float AArch64_AM_getFPImmFloat(unsigned Imm) { // We expect an 8-bit binary encoding of a floating-point number here. union { uint32_t I; float F; } FPUnion; uint8_t Sign = (Imm >> 7) & 0x1; uint8_t Exp = (Imm >> 4) & 0x7; uint8_t Mantissa = Imm & 0xf; // 8-bit FP iEEEE Float Encoding // abcd efgh aBbbbbbc defgh000 00000000 00000000 // // where B = NOT(b); FPUnion.I = 0; FPUnion.I |= ((uint32_t)Sign) << 31; FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30; FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25; FPUnion.I |= (Exp & 0x3) << 23; FPUnion.I |= Mantissa << 19; return FPUnion.F; } //===--------------------------------------------------------------------===// // AdvSIMD Modified Immediates //===--------------------------------------------------------------------===// static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType10(uint8_t Imm) { static const uint32_t lookup[16] = { 0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff, 0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff, 0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff }; return lookup[Imm & 0x0f] | ((uint64_t)lookup[Imm >> 4] << 32); } #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64BaseInfo.c010066400017500001750000001013121363402546700212400ustar0000000000000000//===-- AArch64BaseInfo.cpp - AArch64 Base encoding information------------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file provides basic encoding and assembly information for AArch64. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_ARM64 #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable:4996) // disable MSVC's warning on strcpy() #pragma warning(disable:28719) // disable MSVC's warning on strcpy() #endif #include "../../utils.h" #include #include #include "AArch64BaseInfo.h" const char *A64NamedImmMapper_toString(const A64NamedImmMapper *N, uint32_t Value, bool *Valid) { unsigned i; for (i = 0; i < N->NumPairs; ++i) { if (N->Pairs[i].Value == Value) { *Valid = true; return N->Pairs[i].Name; } } *Valid = false; return 0; } // compare s1 with lower(s2) // return true if s1 == lower(f2), and false otherwise static bool compare_lower_str(const char *s1, const char *s2) { bool res; char *lower = cs_strdup(s2), *c; for (c = lower; *c; c++) *c = (char)tolower((int) *c); res = (strcmp(s1, lower) == 0); cs_mem_free(lower); return res; } uint32_t A64NamedImmMapper_fromString(const A64NamedImmMapper *N, char *Name, bool *Valid) { unsigned i; for (i = 0; i < N->NumPairs; ++i) { if (compare_lower_str(N->Pairs[i].Name, Name)) { *Valid = true; return N->Pairs[i].Value; } } *Valid = false; return (uint32_t)-1; } bool A64NamedImmMapper_validImm(const A64NamedImmMapper *N, uint32_t Value) { return Value < N->TooBigImm; } // return a string representing the number X // NOTE: caller must free() the result itself to avoid memory leak static char *utostr(uint64_t X, bool isNeg) { char Buffer[22]; char *BufPtr = Buffer+21; char *result; Buffer[21] = '\0'; if (X == 0) *--BufPtr = '0'; // Handle special case... while (X) { *--BufPtr = X % 10 + '0'; X /= 10; } if (isNeg) *--BufPtr = '-'; // Add negative sign... result = cs_strdup(BufPtr); return result; } static const A64NamedImmMapper_Mapping SysRegPairs[] = { {"pan", A64SysReg_PAN}, {"uao", A64SysReg_UAO}, {"osdtrrx_el1", A64SysReg_OSDTRRX_EL1}, {"osdtrtx_el1", A64SysReg_OSDTRTX_EL1}, {"teecr32_el1", A64SysReg_TEECR32_EL1}, {"mdccint_el1", A64SysReg_MDCCINT_EL1}, {"mdscr_el1", A64SysReg_MDSCR_EL1}, {"dbgdtr_el0", A64SysReg_DBGDTR_EL0}, {"oseccr_el1", A64SysReg_OSECCR_EL1}, {"dbgvcr32_el2", A64SysReg_DBGVCR32_EL2}, {"dbgbvr0_el1", A64SysReg_DBGBVR0_EL1}, {"dbgbvr1_el1", A64SysReg_DBGBVR1_EL1}, {"dbgbvr2_el1", A64SysReg_DBGBVR2_EL1}, {"dbgbvr3_el1", A64SysReg_DBGBVR3_EL1}, {"dbgbvr4_el1", A64SysReg_DBGBVR4_EL1}, {"dbgbvr5_el1", A64SysReg_DBGBVR5_EL1}, {"dbgbvr6_el1", A64SysReg_DBGBVR6_EL1}, {"dbgbvr7_el1", A64SysReg_DBGBVR7_EL1}, {"dbgbvr8_el1", A64SysReg_DBGBVR8_EL1}, {"dbgbvr9_el1", A64SysReg_DBGBVR9_EL1}, {"dbgbvr10_el1", A64SysReg_DBGBVR10_EL1}, {"dbgbvr11_el1", A64SysReg_DBGBVR11_EL1}, {"dbgbvr12_el1", A64SysReg_DBGBVR12_EL1}, {"dbgbvr13_el1", A64SysReg_DBGBVR13_EL1}, {"dbgbvr14_el1", A64SysReg_DBGBVR14_EL1}, {"dbgbvr15_el1", A64SysReg_DBGBVR15_EL1}, {"dbgbcr0_el1", A64SysReg_DBGBCR0_EL1}, {"dbgbcr1_el1", A64SysReg_DBGBCR1_EL1}, {"dbgbcr2_el1", A64SysReg_DBGBCR2_EL1}, {"dbgbcr3_el1", A64SysReg_DBGBCR3_EL1}, {"dbgbcr4_el1", A64SysReg_DBGBCR4_EL1}, {"dbgbcr5_el1", A64SysReg_DBGBCR5_EL1}, {"dbgbcr6_el1", A64SysReg_DBGBCR6_EL1}, {"dbgbcr7_el1", A64SysReg_DBGBCR7_EL1}, {"dbgbcr8_el1", A64SysReg_DBGBCR8_EL1}, {"dbgbcr9_el1", A64SysReg_DBGBCR9_EL1}, {"dbgbcr10_el1", A64SysReg_DBGBCR10_EL1}, {"dbgbcr11_el1", A64SysReg_DBGBCR11_EL1}, {"dbgbcr12_el1", A64SysReg_DBGBCR12_EL1}, {"dbgbcr13_el1", A64SysReg_DBGBCR13_EL1}, {"dbgbcr14_el1", A64SysReg_DBGBCR14_EL1}, {"dbgbcr15_el1", A64SysReg_DBGBCR15_EL1}, {"dbgwvr0_el1", A64SysReg_DBGWVR0_EL1}, {"dbgwvr1_el1", A64SysReg_DBGWVR1_EL1}, {"dbgwvr2_el1", A64SysReg_DBGWVR2_EL1}, {"dbgwvr3_el1", A64SysReg_DBGWVR3_EL1}, {"dbgwvr4_el1", A64SysReg_DBGWVR4_EL1}, {"dbgwvr5_el1", A64SysReg_DBGWVR5_EL1}, {"dbgwvr6_el1", A64SysReg_DBGWVR6_EL1}, {"dbgwvr7_el1", A64SysReg_DBGWVR7_EL1}, {"dbgwvr8_el1", A64SysReg_DBGWVR8_EL1}, {"dbgwvr9_el1", A64SysReg_DBGWVR9_EL1}, {"dbgwvr10_el1", A64SysReg_DBGWVR10_EL1}, {"dbgwvr11_el1", A64SysReg_DBGWVR11_EL1}, {"dbgwvr12_el1", A64SysReg_DBGWVR12_EL1}, {"dbgwvr13_el1", A64SysReg_DBGWVR13_EL1}, {"dbgwvr14_el1", A64SysReg_DBGWVR14_EL1}, {"dbgwvr15_el1", A64SysReg_DBGWVR15_EL1}, {"dbgwcr0_el1", A64SysReg_DBGWCR0_EL1}, {"dbgwcr1_el1", A64SysReg_DBGWCR1_EL1}, {"dbgwcr2_el1", A64SysReg_DBGWCR2_EL1}, {"dbgwcr3_el1", A64SysReg_DBGWCR3_EL1}, {"dbgwcr4_el1", A64SysReg_DBGWCR4_EL1}, {"dbgwcr5_el1", A64SysReg_DBGWCR5_EL1}, {"dbgwcr6_el1", A64SysReg_DBGWCR6_EL1}, {"dbgwcr7_el1", A64SysReg_DBGWCR7_EL1}, {"dbgwcr8_el1", A64SysReg_DBGWCR8_EL1}, {"dbgwcr9_el1", A64SysReg_DBGWCR9_EL1}, {"dbgwcr10_el1", A64SysReg_DBGWCR10_EL1}, {"dbgwcr11_el1", A64SysReg_DBGWCR11_EL1}, {"dbgwcr12_el1", A64SysReg_DBGWCR12_EL1}, {"dbgwcr13_el1", A64SysReg_DBGWCR13_EL1}, {"dbgwcr14_el1", A64SysReg_DBGWCR14_EL1}, {"dbgwcr15_el1", A64SysReg_DBGWCR15_EL1}, {"teehbr32_el1", A64SysReg_TEEHBR32_EL1}, {"osdlr_el1", A64SysReg_OSDLR_EL1}, {"dbgprcr_el1", A64SysReg_DBGPRCR_EL1}, {"dbgclaimset_el1", A64SysReg_DBGCLAIMSET_EL1}, {"dbgclaimclr_el1", A64SysReg_DBGCLAIMCLR_EL1}, {"csselr_el1", A64SysReg_CSSELR_EL1}, {"vpidr_el2", A64SysReg_VPIDR_EL2}, {"vmpidr_el2", A64SysReg_VMPIDR_EL2}, {"sctlr_el1", A64SysReg_SCTLR_EL1}, {"sctlr_el12", A64SysReg_SCTLR_EL12}, {"sctlr_el2", A64SysReg_SCTLR_EL2}, {"sctlr_el3", A64SysReg_SCTLR_EL3}, {"actlr_el1", A64SysReg_ACTLR_EL1}, {"actlr_el2", A64SysReg_ACTLR_EL2}, {"actlr_el3", A64SysReg_ACTLR_EL3}, {"cpacr_el1", A64SysReg_CPACR_EL1}, {"cpacr_el12", A64SysReg_CPACR_EL12}, {"hcr_el2", A64SysReg_HCR_EL2}, {"scr_el3", A64SysReg_SCR_EL3}, {"mdcr_el2", A64SysReg_MDCR_EL2}, {"sder32_el3", A64SysReg_SDER32_EL3}, {"cptr_el2", A64SysReg_CPTR_EL2}, {"cptr_el3", A64SysReg_CPTR_EL3}, {"hstr_el2", A64SysReg_HSTR_EL2}, {"hacr_el2", A64SysReg_HACR_EL2}, {"mdcr_el3", A64SysReg_MDCR_EL3}, {"ttbr0_el1", A64SysReg_TTBR0_EL1}, {"ttbr0_el12", A64SysReg_TTBR0_EL12}, {"ttbr0_el2", A64SysReg_TTBR0_EL2}, {"ttbr0_el3", A64SysReg_TTBR0_EL3}, {"ttbr1_el1", A64SysReg_TTBR1_EL1}, {"ttbr1_el12", A64SysReg_TTBR1_EL12}, {"ttbr1_el2", A64SysReg_TTBR1_EL2}, {"tcr_el1", A64SysReg_TCR_EL1}, {"tcr_el12", A64SysReg_TCR_EL12}, {"tcr_el2", A64SysReg_TCR_EL2}, {"tcr_el3", A64SysReg_TCR_EL3}, {"vttbr_el2", A64SysReg_VTTBR_EL2}, {"vtcr_el2", A64SysReg_VTCR_EL2}, {"dacr32_el2", A64SysReg_DACR32_EL2}, {"spsr_el1", A64SysReg_SPSR_EL1}, {"spsr_el12", A64SysReg_SPSR_EL12}, {"spsr_el2", A64SysReg_SPSR_EL2}, {"spsr_el3", A64SysReg_SPSR_EL3}, {"elr_el1", A64SysReg_ELR_EL1}, {"elr_el12", A64SysReg_ELR_EL12}, {"elr_el2", A64SysReg_ELR_EL2}, {"elr_el3", A64SysReg_ELR_EL3}, {"sp_el0", A64SysReg_SP_EL0}, {"sp_el1", A64SysReg_SP_EL1}, {"sp_el2", A64SysReg_SP_EL2}, {"spsel", A64SysReg_SPSel}, {"nzcv", A64SysReg_NZCV}, {"daif", A64SysReg_DAIF}, {"currentel", A64SysReg_CurrentEL}, {"spsr_irq", A64SysReg_SPSR_irq}, {"spsr_abt", A64SysReg_SPSR_abt}, {"spsr_und", A64SysReg_SPSR_und}, {"spsr_fiq", A64SysReg_SPSR_fiq}, {"fpcr", A64SysReg_FPCR}, {"fpsr", A64SysReg_FPSR}, {"dspsr_el0", A64SysReg_DSPSR_EL0}, {"dlr_el0", A64SysReg_DLR_EL0}, {"ifsr32_el2", A64SysReg_IFSR32_EL2}, {"afsr0_el1", A64SysReg_AFSR0_EL1}, {"afsr0_el12", A64SysReg_AFSR0_EL12}, {"afsr0_el2", A64SysReg_AFSR0_EL2}, {"afsr0_el3", A64SysReg_AFSR0_EL3}, {"afsr1_el1", A64SysReg_AFSR1_EL1}, {"afsr1_el12", A64SysReg_AFSR1_EL12}, {"afsr1_el2", A64SysReg_AFSR1_EL2}, {"afsr1_el3", A64SysReg_AFSR1_EL3}, {"esr_el1", A64SysReg_ESR_EL1}, {"esr_el12", A64SysReg_ESR_EL12}, {"esr_el2", A64SysReg_ESR_EL2}, {"esr_el3", A64SysReg_ESR_EL3}, {"fpexc32_el2", A64SysReg_FPEXC32_EL2}, {"far_el1", A64SysReg_FAR_EL1}, {"far_el12", A64SysReg_FAR_EL12}, {"far_el2", A64SysReg_FAR_EL2}, {"far_el3", A64SysReg_FAR_EL3}, {"hpfar_el2", A64SysReg_HPFAR_EL2}, {"par_el1", A64SysReg_PAR_EL1}, {"pmcr_el0", A64SysReg_PMCR_EL0}, {"pmcntenset_el0", A64SysReg_PMCNTENSET_EL0}, {"pmcntenclr_el0", A64SysReg_PMCNTENCLR_EL0}, {"pmovsclr_el0", A64SysReg_PMOVSCLR_EL0}, {"pmselr_el0", A64SysReg_PMSELR_EL0}, {"pmccntr_el0", A64SysReg_PMCCNTR_EL0}, {"pmxevtyper_el0", A64SysReg_PMXEVTYPER_EL0}, {"pmxevcntr_el0", A64SysReg_PMXEVCNTR_EL0}, {"pmuserenr_el0", A64SysReg_PMUSERENR_EL0}, {"pmintenset_el1", A64SysReg_PMINTENSET_EL1}, {"pmintenclr_el1", A64SysReg_PMINTENCLR_EL1}, {"pmovsset_el0", A64SysReg_PMOVSSET_EL0}, {"mair_el1", A64SysReg_MAIR_EL1}, {"mair_el12", A64SysReg_MAIR_EL12}, {"mair_el2", A64SysReg_MAIR_EL2}, {"mair_el3", A64SysReg_MAIR_EL3}, {"amair_el1", A64SysReg_AMAIR_EL1}, {"amair_el12", A64SysReg_AMAIR_EL12}, {"amair_el2", A64SysReg_AMAIR_EL2}, {"amair_el3", A64SysReg_AMAIR_EL3}, {"vbar_el1", A64SysReg_VBAR_EL1}, {"vbar_el12", A64SysReg_VBAR_EL12}, {"vbar_el2", A64SysReg_VBAR_EL2}, {"vbar_el3", A64SysReg_VBAR_EL3}, {"rmr_el1", A64SysReg_RMR_EL1}, {"rmr_el2", A64SysReg_RMR_EL2}, {"rmr_el3", A64SysReg_RMR_EL3}, {"contextidr_el1", A64SysReg_CONTEXTIDR_EL1}, {"contextidr_el12", A64SysReg_CONTEXTIDR_EL12}, {"contextidr_el2", A64SysReg_CONTEXTIDR_EL2}, {"tpidr_el0", A64SysReg_TPIDR_EL0}, {"tpidr_el2", A64SysReg_TPIDR_EL2}, {"tpidr_el3", A64SysReg_TPIDR_EL3}, {"tpidrro_el0", A64SysReg_TPIDRRO_EL0}, {"tpidr_el1", A64SysReg_TPIDR_EL1}, {"cntfrq_el0", A64SysReg_CNTFRQ_EL0}, {"cntvoff_el2", A64SysReg_CNTVOFF_EL2}, {"cntkctl_el1", A64SysReg_CNTKCTL_EL1}, {"cntkctl_el12", A64SysReg_CNTKCTL_EL12}, {"cnthctl_el2", A64SysReg_CNTHCTL_EL2}, {"cntp_tval_el0", A64SysReg_CNTP_TVAL_EL0}, {"cntp_tval_el02", A64SysReg_CNTP_TVAL_EL02}, {"cnthp_tval_el2", A64SysReg_CNTHP_TVAL_EL2}, {"cntps_tval_el1", A64SysReg_CNTPS_TVAL_EL1}, {"cntp_ctl_el0", A64SysReg_CNTP_CTL_EL0}, {"cnthp_ctl_el2", A64SysReg_CNTHP_CTL_EL2}, {"cnthv_ctl_el2", A64SysReg_CNTHVCTL_EL2}, {"cnthv_cval_el2", A64SysReg_CNTHV_CVAL_EL2}, {"cnthv_tval_el2", A64SysReg_CNTHV_TVAL_EL2}, {"cntps_ctl_el1", A64SysReg_CNTPS_CTL_EL1}, {"cntp_cval_el0", A64SysReg_CNTP_CVAL_EL0}, {"cntp_cval_el02", A64SysReg_CNTP_CVAL_EL02}, {"cnthp_cval_el2", A64SysReg_CNTHP_CVAL_EL2}, {"cntps_cval_el1", A64SysReg_CNTPS_CVAL_EL1}, {"cntv_tval_el0", A64SysReg_CNTV_TVAL_EL0}, {"cntv_tval_el02", A64SysReg_CNTV_TVAL_EL02}, {"cntv_ctl_el0", A64SysReg_CNTV_CTL_EL0}, {"cntv_ctl_el02", A64SysReg_CNTV_CTL_EL02}, {"cntv_cval_el0", A64SysReg_CNTV_CVAL_EL0}, {"cntv_cval_el02", A64SysReg_CNTV_CVAL_EL02}, {"pmevcntr0_el0", A64SysReg_PMEVCNTR0_EL0}, {"pmevcntr1_el0", A64SysReg_PMEVCNTR1_EL0}, {"pmevcntr2_el0", A64SysReg_PMEVCNTR2_EL0}, {"pmevcntr3_el0", A64SysReg_PMEVCNTR3_EL0}, {"pmevcntr4_el0", A64SysReg_PMEVCNTR4_EL0}, {"pmevcntr5_el0", A64SysReg_PMEVCNTR5_EL0}, {"pmevcntr6_el0", A64SysReg_PMEVCNTR6_EL0}, {"pmevcntr7_el0", A64SysReg_PMEVCNTR7_EL0}, {"pmevcntr8_el0", A64SysReg_PMEVCNTR8_EL0}, {"pmevcntr9_el0", A64SysReg_PMEVCNTR9_EL0}, {"pmevcntr10_el0", A64SysReg_PMEVCNTR10_EL0}, {"pmevcntr11_el0", A64SysReg_PMEVCNTR11_EL0}, {"pmevcntr12_el0", A64SysReg_PMEVCNTR12_EL0}, {"pmevcntr13_el0", A64SysReg_PMEVCNTR13_EL0}, {"pmevcntr14_el0", A64SysReg_PMEVCNTR14_EL0}, {"pmevcntr15_el0", A64SysReg_PMEVCNTR15_EL0}, {"pmevcntr16_el0", A64SysReg_PMEVCNTR16_EL0}, {"pmevcntr17_el0", A64SysReg_PMEVCNTR17_EL0}, {"pmevcntr18_el0", A64SysReg_PMEVCNTR18_EL0}, {"pmevcntr19_el0", A64SysReg_PMEVCNTR19_EL0}, {"pmevcntr20_el0", A64SysReg_PMEVCNTR20_EL0}, {"pmevcntr21_el0", A64SysReg_PMEVCNTR21_EL0}, {"pmevcntr22_el0", A64SysReg_PMEVCNTR22_EL0}, {"pmevcntr23_el0", A64SysReg_PMEVCNTR23_EL0}, {"pmevcntr24_el0", A64SysReg_PMEVCNTR24_EL0}, {"pmevcntr25_el0", A64SysReg_PMEVCNTR25_EL0}, {"pmevcntr26_el0", A64SysReg_PMEVCNTR26_EL0}, {"pmevcntr27_el0", A64SysReg_PMEVCNTR27_EL0}, {"pmevcntr28_el0", A64SysReg_PMEVCNTR28_EL0}, {"pmevcntr29_el0", A64SysReg_PMEVCNTR29_EL0}, {"pmevcntr30_el0", A64SysReg_PMEVCNTR30_EL0}, {"pmccfiltr_el0", A64SysReg_PMCCFILTR_EL0}, {"pmevtyper0_el0", A64SysReg_PMEVTYPER0_EL0}, {"pmevtyper1_el0", A64SysReg_PMEVTYPER1_EL0}, {"pmevtyper2_el0", A64SysReg_PMEVTYPER2_EL0}, {"pmevtyper3_el0", A64SysReg_PMEVTYPER3_EL0}, {"pmevtyper4_el0", A64SysReg_PMEVTYPER4_EL0}, {"pmevtyper5_el0", A64SysReg_PMEVTYPER5_EL0}, {"pmevtyper6_el0", A64SysReg_PMEVTYPER6_EL0}, {"pmevtyper7_el0", A64SysReg_PMEVTYPER7_EL0}, {"pmevtyper8_el0", A64SysReg_PMEVTYPER8_EL0}, {"pmevtyper9_el0", A64SysReg_PMEVTYPER9_EL0}, {"pmevtyper10_el0", A64SysReg_PMEVTYPER10_EL0}, {"pmevtyper11_el0", A64SysReg_PMEVTYPER11_EL0}, {"pmevtyper12_el0", A64SysReg_PMEVTYPER12_EL0}, {"pmevtyper13_el0", A64SysReg_PMEVTYPER13_EL0}, {"pmevtyper14_el0", A64SysReg_PMEVTYPER14_EL0}, {"pmevtyper15_el0", A64SysReg_PMEVTYPER15_EL0}, {"pmevtyper16_el0", A64SysReg_PMEVTYPER16_EL0}, {"pmevtyper17_el0", A64SysReg_PMEVTYPER17_EL0}, {"pmevtyper18_el0", A64SysReg_PMEVTYPER18_EL0}, {"pmevtyper19_el0", A64SysReg_PMEVTYPER19_EL0}, {"pmevtyper20_el0", A64SysReg_PMEVTYPER20_EL0}, {"pmevtyper21_el0", A64SysReg_PMEVTYPER21_EL0}, {"pmevtyper22_el0", A64SysReg_PMEVTYPER22_EL0}, {"pmevtyper23_el0", A64SysReg_PMEVTYPER23_EL0}, {"pmevtyper24_el0", A64SysReg_PMEVTYPER24_EL0}, {"pmevtyper25_el0", A64SysReg_PMEVTYPER25_EL0}, {"pmevtyper26_el0", A64SysReg_PMEVTYPER26_EL0}, {"pmevtyper27_el0", A64SysReg_PMEVTYPER27_EL0}, {"pmevtyper28_el0", A64SysReg_PMEVTYPER28_EL0}, {"pmevtyper29_el0", A64SysReg_PMEVTYPER29_EL0}, {"pmevtyper30_el0", A64SysReg_PMEVTYPER30_EL0}, {"lorc_el1", A64SysReg_LORC_EL1}, {"lorea_el1", A64SysReg_LOREA_EL1}, {"lorn_el1", A64SysReg_LORN_EL1}, {"lorsa_el1", A64SysReg_LORSA_EL1}, // Trace registers {"trcprgctlr", A64SysReg_TRCPRGCTLR}, {"trcprocselr", A64SysReg_TRCPROCSELR}, {"trcconfigr", A64SysReg_TRCCONFIGR}, {"trcauxctlr", A64SysReg_TRCAUXCTLR}, {"trceventctl0r", A64SysReg_TRCEVENTCTL0R}, {"trceventctl1r", A64SysReg_TRCEVENTCTL1R}, {"trcstallctlr", A64SysReg_TRCSTALLCTLR}, {"trctsctlr", A64SysReg_TRCTSCTLR}, {"trcsyncpr", A64SysReg_TRCSYNCPR}, {"trcccctlr", A64SysReg_TRCCCCTLR}, {"trcbbctlr", A64SysReg_TRCBBCTLR}, {"trctraceidr", A64SysReg_TRCTRACEIDR}, {"trcqctlr", A64SysReg_TRCQCTLR}, {"trcvictlr", A64SysReg_TRCVICTLR}, {"trcviiectlr", A64SysReg_TRCVIIECTLR}, {"trcvissctlr", A64SysReg_TRCVISSCTLR}, {"trcvipcssctlr", A64SysReg_TRCVIPCSSCTLR}, {"trcvdctlr", A64SysReg_TRCVDCTLR}, {"trcvdsacctlr", A64SysReg_TRCVDSACCTLR}, {"trcvdarcctlr", A64SysReg_TRCVDARCCTLR}, {"trcseqevr0", A64SysReg_TRCSEQEVR0}, {"trcseqevr1", A64SysReg_TRCSEQEVR1}, {"trcseqevr2", A64SysReg_TRCSEQEVR2}, {"trcseqrstevr", A64SysReg_TRCSEQRSTEVR}, {"trcseqstr", A64SysReg_TRCSEQSTR}, {"trcextinselr", A64SysReg_TRCEXTINSELR}, {"trccntrldvr0", A64SysReg_TRCCNTRLDVR0}, {"trccntrldvr1", A64SysReg_TRCCNTRLDVR1}, {"trccntrldvr2", A64SysReg_TRCCNTRLDVR2}, {"trccntrldvr3", A64SysReg_TRCCNTRLDVR3}, {"trccntctlr0", A64SysReg_TRCCNTCTLR0}, {"trccntctlr1", A64SysReg_TRCCNTCTLR1}, {"trccntctlr2", A64SysReg_TRCCNTCTLR2}, {"trccntctlr3", A64SysReg_TRCCNTCTLR3}, {"trccntvr0", A64SysReg_TRCCNTVR0}, {"trccntvr1", A64SysReg_TRCCNTVR1}, {"trccntvr2", A64SysReg_TRCCNTVR2}, {"trccntvr3", A64SysReg_TRCCNTVR3}, {"trcimspec0", A64SysReg_TRCIMSPEC0}, {"trcimspec1", A64SysReg_TRCIMSPEC1}, {"trcimspec2", A64SysReg_TRCIMSPEC2}, {"trcimspec3", A64SysReg_TRCIMSPEC3}, {"trcimspec4", A64SysReg_TRCIMSPEC4}, {"trcimspec5", A64SysReg_TRCIMSPEC5}, {"trcimspec6", A64SysReg_TRCIMSPEC6}, {"trcimspec7", A64SysReg_TRCIMSPEC7}, {"trcrsctlr2", A64SysReg_TRCRSCTLR2}, {"trcrsctlr3", A64SysReg_TRCRSCTLR3}, {"trcrsctlr4", A64SysReg_TRCRSCTLR4}, {"trcrsctlr5", A64SysReg_TRCRSCTLR5}, {"trcrsctlr6", A64SysReg_TRCRSCTLR6}, {"trcrsctlr7", A64SysReg_TRCRSCTLR7}, {"trcrsctlr8", A64SysReg_TRCRSCTLR8}, {"trcrsctlr9", A64SysReg_TRCRSCTLR9}, {"trcrsctlr10", A64SysReg_TRCRSCTLR10}, {"trcrsctlr11", A64SysReg_TRCRSCTLR11}, {"trcrsctlr12", A64SysReg_TRCRSCTLR12}, {"trcrsctlr13", A64SysReg_TRCRSCTLR13}, {"trcrsctlr14", A64SysReg_TRCRSCTLR14}, {"trcrsctlr15", A64SysReg_TRCRSCTLR15}, {"trcrsctlr16", A64SysReg_TRCRSCTLR16}, {"trcrsctlr17", A64SysReg_TRCRSCTLR17}, {"trcrsctlr18", A64SysReg_TRCRSCTLR18}, {"trcrsctlr19", A64SysReg_TRCRSCTLR19}, {"trcrsctlr20", A64SysReg_TRCRSCTLR20}, {"trcrsctlr21", A64SysReg_TRCRSCTLR21}, {"trcrsctlr22", A64SysReg_TRCRSCTLR22}, {"trcrsctlr23", A64SysReg_TRCRSCTLR23}, {"trcrsctlr24", A64SysReg_TRCRSCTLR24}, {"trcrsctlr25", A64SysReg_TRCRSCTLR25}, {"trcrsctlr26", A64SysReg_TRCRSCTLR26}, {"trcrsctlr27", A64SysReg_TRCRSCTLR27}, {"trcrsctlr28", A64SysReg_TRCRSCTLR28}, {"trcrsctlr29", A64SysReg_TRCRSCTLR29}, {"trcrsctlr30", A64SysReg_TRCRSCTLR30}, {"trcrsctlr31", A64SysReg_TRCRSCTLR31}, {"trcssccr0", A64SysReg_TRCSSCCR0}, {"trcssccr1", A64SysReg_TRCSSCCR1}, {"trcssccr2", A64SysReg_TRCSSCCR2}, {"trcssccr3", A64SysReg_TRCSSCCR3}, {"trcssccr4", A64SysReg_TRCSSCCR4}, {"trcssccr5", A64SysReg_TRCSSCCR5}, {"trcssccr6", A64SysReg_TRCSSCCR6}, {"trcssccr7", A64SysReg_TRCSSCCR7}, {"trcsscsr0", A64SysReg_TRCSSCSR0}, {"trcsscsr1", A64SysReg_TRCSSCSR1}, {"trcsscsr2", A64SysReg_TRCSSCSR2}, {"trcsscsr3", A64SysReg_TRCSSCSR3}, {"trcsscsr4", A64SysReg_TRCSSCSR4}, {"trcsscsr5", A64SysReg_TRCSSCSR5}, {"trcsscsr6", A64SysReg_TRCSSCSR6}, {"trcsscsr7", A64SysReg_TRCSSCSR7}, {"trcsspcicr0", A64SysReg_TRCSSPCICR0}, {"trcsspcicr1", A64SysReg_TRCSSPCICR1}, {"trcsspcicr2", A64SysReg_TRCSSPCICR2}, {"trcsspcicr3", A64SysReg_TRCSSPCICR3}, {"trcsspcicr4", A64SysReg_TRCSSPCICR4}, {"trcsspcicr5", A64SysReg_TRCSSPCICR5}, {"trcsspcicr6", A64SysReg_TRCSSPCICR6}, {"trcsspcicr7", A64SysReg_TRCSSPCICR7}, {"trcpdcr", A64SysReg_TRCPDCR}, {"trcacvr0", A64SysReg_TRCACVR0}, {"trcacvr1", A64SysReg_TRCACVR1}, {"trcacvr2", A64SysReg_TRCACVR2}, {"trcacvr3", A64SysReg_TRCACVR3}, {"trcacvr4", A64SysReg_TRCACVR4}, {"trcacvr5", A64SysReg_TRCACVR5}, {"trcacvr6", A64SysReg_TRCACVR6}, {"trcacvr7", A64SysReg_TRCACVR7}, {"trcacvr8", A64SysReg_TRCACVR8}, {"trcacvr9", A64SysReg_TRCACVR9}, {"trcacvr10", A64SysReg_TRCACVR10}, {"trcacvr11", A64SysReg_TRCACVR11}, {"trcacvr12", A64SysReg_TRCACVR12}, {"trcacvr13", A64SysReg_TRCACVR13}, {"trcacvr14", A64SysReg_TRCACVR14}, {"trcacvr15", A64SysReg_TRCACVR15}, {"trcacatr0", A64SysReg_TRCACATR0}, {"trcacatr1", A64SysReg_TRCACATR1}, {"trcacatr2", A64SysReg_TRCACATR2}, {"trcacatr3", A64SysReg_TRCACATR3}, {"trcacatr4", A64SysReg_TRCACATR4}, {"trcacatr5", A64SysReg_TRCACATR5}, {"trcacatr6", A64SysReg_TRCACATR6}, {"trcacatr7", A64SysReg_TRCACATR7}, {"trcacatr8", A64SysReg_TRCACATR8}, {"trcacatr9", A64SysReg_TRCACATR9}, {"trcacatr10", A64SysReg_TRCACATR10}, {"trcacatr11", A64SysReg_TRCACATR11}, {"trcacatr12", A64SysReg_TRCACATR12}, {"trcacatr13", A64SysReg_TRCACATR13}, {"trcacatr14", A64SysReg_TRCACATR14}, {"trcacatr15", A64SysReg_TRCACATR15}, {"trcdvcvr0", A64SysReg_TRCDVCVR0}, {"trcdvcvr1", A64SysReg_TRCDVCVR1}, {"trcdvcvr2", A64SysReg_TRCDVCVR2}, {"trcdvcvr3", A64SysReg_TRCDVCVR3}, {"trcdvcvr4", A64SysReg_TRCDVCVR4}, {"trcdvcvr5", A64SysReg_TRCDVCVR5}, {"trcdvcvr6", A64SysReg_TRCDVCVR6}, {"trcdvcvr7", A64SysReg_TRCDVCVR7}, {"trcdvcmr0", A64SysReg_TRCDVCMR0}, {"trcdvcmr1", A64SysReg_TRCDVCMR1}, {"trcdvcmr2", A64SysReg_TRCDVCMR2}, {"trcdvcmr3", A64SysReg_TRCDVCMR3}, {"trcdvcmr4", A64SysReg_TRCDVCMR4}, {"trcdvcmr5", A64SysReg_TRCDVCMR5}, {"trcdvcmr6", A64SysReg_TRCDVCMR6}, {"trcdvcmr7", A64SysReg_TRCDVCMR7}, {"trccidcvr0", A64SysReg_TRCCIDCVR0}, {"trccidcvr1", A64SysReg_TRCCIDCVR1}, {"trccidcvr2", A64SysReg_TRCCIDCVR2}, {"trccidcvr3", A64SysReg_TRCCIDCVR3}, {"trccidcvr4", A64SysReg_TRCCIDCVR4}, {"trccidcvr5", A64SysReg_TRCCIDCVR5}, {"trccidcvr6", A64SysReg_TRCCIDCVR6}, {"trccidcvr7", A64SysReg_TRCCIDCVR7}, {"trcvmidcvr0", A64SysReg_TRCVMIDCVR0}, {"trcvmidcvr1", A64SysReg_TRCVMIDCVR1}, {"trcvmidcvr2", A64SysReg_TRCVMIDCVR2}, {"trcvmidcvr3", A64SysReg_TRCVMIDCVR3}, {"trcvmidcvr4", A64SysReg_TRCVMIDCVR4}, {"trcvmidcvr5", A64SysReg_TRCVMIDCVR5}, {"trcvmidcvr6", A64SysReg_TRCVMIDCVR6}, {"trcvmidcvr7", A64SysReg_TRCVMIDCVR7}, {"trccidcctlr0", A64SysReg_TRCCIDCCTLR0}, {"trccidcctlr1", A64SysReg_TRCCIDCCTLR1}, {"trcvmidcctlr0", A64SysReg_TRCVMIDCCTLR0}, {"trcvmidcctlr1", A64SysReg_TRCVMIDCCTLR1}, {"trcitctrl", A64SysReg_TRCITCTRL}, {"trcclaimset", A64SysReg_TRCCLAIMSET}, {"trcclaimclr", A64SysReg_TRCCLAIMCLR}, // GICv3 registers {"icc_bpr1_el1", A64SysReg_ICC_BPR1_EL1}, {"icc_bpr0_el1", A64SysReg_ICC_BPR0_EL1}, {"icc_pmr_el1", A64SysReg_ICC_PMR_EL1}, {"icc_ctlr_el1", A64SysReg_ICC_CTLR_EL1}, {"icc_ctlr_el3", A64SysReg_ICC_CTLR_EL3}, {"icc_sre_el1", A64SysReg_ICC_SRE_EL1}, {"icc_sre_el2", A64SysReg_ICC_SRE_EL2}, {"icc_sre_el3", A64SysReg_ICC_SRE_EL3}, {"icc_igrpen0_el1", A64SysReg_ICC_IGRPEN0_EL1}, {"icc_igrpen1_el1", A64SysReg_ICC_IGRPEN1_EL1}, {"icc_igrpen1_el3", A64SysReg_ICC_IGRPEN1_EL3}, {"icc_seien_el1", A64SysReg_ICC_SEIEN_EL1}, {"icc_ap0r0_el1", A64SysReg_ICC_AP0R0_EL1}, {"icc_ap0r1_el1", A64SysReg_ICC_AP0R1_EL1}, {"icc_ap0r2_el1", A64SysReg_ICC_AP0R2_EL1}, {"icc_ap0r3_el1", A64SysReg_ICC_AP0R3_EL1}, {"icc_ap1r0_el1", A64SysReg_ICC_AP1R0_EL1}, {"icc_ap1r1_el1", A64SysReg_ICC_AP1R1_EL1}, {"icc_ap1r2_el1", A64SysReg_ICC_AP1R2_EL1}, {"icc_ap1r3_el1", A64SysReg_ICC_AP1R3_EL1}, {"ich_ap0r0_el2", A64SysReg_ICH_AP0R0_EL2}, {"ich_ap0r1_el2", A64SysReg_ICH_AP0R1_EL2}, {"ich_ap0r2_el2", A64SysReg_ICH_AP0R2_EL2}, {"ich_ap0r3_el2", A64SysReg_ICH_AP0R3_EL2}, {"ich_ap1r0_el2", A64SysReg_ICH_AP1R0_EL2}, {"ich_ap1r1_el2", A64SysReg_ICH_AP1R1_EL2}, {"ich_ap1r2_el2", A64SysReg_ICH_AP1R2_EL2}, {"ich_ap1r3_el2", A64SysReg_ICH_AP1R3_EL2}, {"ich_hcr_el2", A64SysReg_ICH_HCR_EL2}, {"ich_misr_el2", A64SysReg_ICH_MISR_EL2}, {"ich_vmcr_el2", A64SysReg_ICH_VMCR_EL2}, {"ich_vseir_el2", A64SysReg_ICH_VSEIR_EL2}, {"ich_lr0_el2", A64SysReg_ICH_LR0_EL2}, {"ich_lr1_el2", A64SysReg_ICH_LR1_EL2}, {"ich_lr2_el2", A64SysReg_ICH_LR2_EL2}, {"ich_lr3_el2", A64SysReg_ICH_LR3_EL2}, {"ich_lr4_el2", A64SysReg_ICH_LR4_EL2}, {"ich_lr5_el2", A64SysReg_ICH_LR5_EL2}, {"ich_lr6_el2", A64SysReg_ICH_LR6_EL2}, {"ich_lr7_el2", A64SysReg_ICH_LR7_EL2}, {"ich_lr8_el2", A64SysReg_ICH_LR8_EL2}, {"ich_lr9_el2", A64SysReg_ICH_LR9_EL2}, {"ich_lr10_el2", A64SysReg_ICH_LR10_EL2}, {"ich_lr11_el2", A64SysReg_ICH_LR11_EL2}, {"ich_lr12_el2", A64SysReg_ICH_LR12_EL2}, {"ich_lr13_el2", A64SysReg_ICH_LR13_EL2}, {"ich_lr14_el2", A64SysReg_ICH_LR14_EL2}, {"ich_lr15_el2", A64SysReg_ICH_LR15_EL2}, // Statistical profiling registers {"pmblimitr_el1", A64SysReg_PMBLIMITR_EL1}, {"pmbptr_el1", A64SysReg_PMBPTR_EL1}, {"pmbsr_el1", A64SysReg_PMBSR_EL1}, {"pmscr_el1", A64SysReg_PMSCR_EL1}, {"pmscr_el12", A64SysReg_PMSCR_EL12}, {"pmscr_el2", A64SysReg_PMSCR_EL2}, {"pmsicr_el1", A64SysReg_PMSICR_EL1}, {"pmsirr_el1", A64SysReg_PMSIRR_EL1}, {"pmsfcr_el1", A64SysReg_PMSFCR_EL1}, {"pmsevfr_el1", A64SysReg_PMSEVFR_EL1}, {"pmslatfr_el1", A64SysReg_PMSLATFR_EL1} }; static const A64NamedImmMapper_Mapping CycloneSysRegPairs[] = { {"cpm_ioacc_ctl_el3", A64SysReg_CPM_IOACC_CTL_EL3} }; // result must be a big enough buffer: 128 bytes is more than enough void A64SysRegMapper_toString(const A64SysRegMapper *S, uint32_t Bits, char *result) { int dummy; uint32_t Op0, Op1, CRn, CRm, Op2; char *Op0S, *Op1S, *CRnS, *CRmS, *Op2S; unsigned i; // First search the registers shared by all for (i = 0; i < ARR_SIZE(SysRegPairs); ++i) { if (SysRegPairs[i].Value == Bits) { strcpy(result, SysRegPairs[i].Name); return; } } // Next search for target specific registers // if (FeatureBits & AArch64_ProcCyclone) { if (true) { for (i = 0; i < ARR_SIZE(CycloneSysRegPairs); ++i) { if (CycloneSysRegPairs[i].Value == Bits) { strcpy(result, CycloneSysRegPairs[i].Name); return; } } } // Now try the instruction-specific registers (either read-only or // write-only). for (i = 0; i < S->NumInstPairs; ++i) { if (S->InstPairs[i].Value == Bits) { strcpy(result, S->InstPairs[i].Name); return; } } Op0 = (Bits >> 14) & 0x3; Op1 = (Bits >> 11) & 0x7; CRn = (Bits >> 7) & 0xf; CRm = (Bits >> 3) & 0xf; Op2 = Bits & 0x7; Op0S = utostr(Op0, false); Op1S = utostr(Op1, false); CRnS = utostr(CRn, false); CRmS = utostr(CRm, false); Op2S = utostr(Op2, false); //printf("Op1S: %s, CRnS: %s, CRmS: %s, Op2S: %s\n", Op1S, CRnS, CRmS, Op2S); dummy = cs_snprintf(result, 128, "s3_%s_c%s_c%s_%s", Op1S, CRnS, CRmS, Op2S); (void)dummy; cs_mem_free(Op0S); cs_mem_free(Op1S); cs_mem_free(CRnS); cs_mem_free(CRmS); cs_mem_free(Op2S); } static const A64NamedImmMapper_Mapping TLBIPairs[] = { {"ipas2e1is", A64TLBI_IPAS2E1IS}, {"ipas2le1is", A64TLBI_IPAS2LE1IS}, {"vmalle1is", A64TLBI_VMALLE1IS}, {"alle2is", A64TLBI_ALLE2IS}, {"alle3is", A64TLBI_ALLE3IS}, {"vae1is", A64TLBI_VAE1IS}, {"vae2is", A64TLBI_VAE2IS}, {"vae3is", A64TLBI_VAE3IS}, {"aside1is", A64TLBI_ASIDE1IS}, {"vaae1is", A64TLBI_VAAE1IS}, {"alle1is", A64TLBI_ALLE1IS}, {"vale1is", A64TLBI_VALE1IS}, {"vale2is", A64TLBI_VALE2IS}, {"vale3is", A64TLBI_VALE3IS}, {"vmalls12e1is", A64TLBI_VMALLS12E1IS}, {"vaale1is", A64TLBI_VAALE1IS}, {"ipas2e1", A64TLBI_IPAS2E1}, {"ipas2le1", A64TLBI_IPAS2LE1}, {"vmalle1", A64TLBI_VMALLE1}, {"alle2", A64TLBI_ALLE2}, {"alle3", A64TLBI_ALLE3}, {"vae1", A64TLBI_VAE1}, {"vae2", A64TLBI_VAE2}, {"vae3", A64TLBI_VAE3}, {"aside1", A64TLBI_ASIDE1}, {"vaae1", A64TLBI_VAAE1}, {"alle1", A64TLBI_ALLE1}, {"vale1", A64TLBI_VALE1}, {"vale2", A64TLBI_VALE2}, {"vale3", A64TLBI_VALE3}, {"vmalls12e1", A64TLBI_VMALLS12E1}, {"vaale1", A64TLBI_VAALE1} }; const A64NamedImmMapper A64TLBI_TLBIMapper = { TLBIPairs, ARR_SIZE(TLBIPairs), 0, }; static const A64NamedImmMapper_Mapping ATPairs[] = { {"s1e1r", A64AT_S1E1R}, {"s1e2r", A64AT_S1E2R}, {"s1e3r", A64AT_S1E3R}, {"s1e1w", A64AT_S1E1W}, {"s1e2w", A64AT_S1E2W}, {"s1e3w", A64AT_S1E3W}, {"s1e0r", A64AT_S1E0R}, {"s1e0w", A64AT_S1E0W}, {"s12e1r", A64AT_S12E1R}, {"s12e1w", A64AT_S12E1W}, {"s12e0r", A64AT_S12E0R}, {"s12e0w", A64AT_S12E0W} }; const A64NamedImmMapper A64AT_ATMapper = { ATPairs, ARR_SIZE(ATPairs), 0, }; static const A64NamedImmMapper_Mapping DBarrierPairs[] = { {"oshld", A64DB_OSHLD}, {"oshst", A64DB_OSHST}, {"osh", A64DB_OSH}, {"nshld", A64DB_NSHLD}, {"nshst", A64DB_NSHST}, {"nsh", A64DB_NSH}, {"ishld", A64DB_ISHLD}, {"ishst", A64DB_ISHST}, {"ish", A64DB_ISH}, {"ld", A64DB_LD}, {"st", A64DB_ST}, {"sy", A64DB_SY} }; const A64NamedImmMapper A64DB_DBarrierMapper = { DBarrierPairs, ARR_SIZE(DBarrierPairs), 16, }; static const A64NamedImmMapper_Mapping DCPairs[] = { {"zva", A64DC_ZVA}, {"ivac", A64DC_IVAC}, {"isw", A64DC_ISW}, {"cvac", A64DC_CVAC}, {"csw", A64DC_CSW}, {"cvau", A64DC_CVAU}, {"civac", A64DC_CIVAC}, {"cisw", A64DC_CISW} }; const A64NamedImmMapper A64DC_DCMapper = { DCPairs, ARR_SIZE(DCPairs), 0, }; static const A64NamedImmMapper_Mapping ICPairs[] = { {"ialluis", A64IC_IALLUIS}, {"iallu", A64IC_IALLU}, {"ivau", A64IC_IVAU} }; const A64NamedImmMapper A64IC_ICMapper = { ICPairs, ARR_SIZE(ICPairs), 0, }; static const A64NamedImmMapper_Mapping ISBPairs[] = { {"sy", A64DB_SY}, }; const A64NamedImmMapper A64ISB_ISBMapper = { ISBPairs, ARR_SIZE(ISBPairs), 16, }; static const A64NamedImmMapper_Mapping PRFMPairs[] = { {"pldl1keep", A64PRFM_PLDL1KEEP}, {"pldl1strm", A64PRFM_PLDL1STRM}, {"pldl2keep", A64PRFM_PLDL2KEEP}, {"pldl2strm", A64PRFM_PLDL2STRM}, {"pldl3keep", A64PRFM_PLDL3KEEP}, {"pldl3strm", A64PRFM_PLDL3STRM}, {"plil1keep", A64PRFM_PLIL1KEEP}, {"plil1strm", A64PRFM_PLIL1STRM}, {"plil2keep", A64PRFM_PLIL2KEEP}, {"plil2strm", A64PRFM_PLIL2STRM}, {"plil3keep", A64PRFM_PLIL3KEEP}, {"plil3strm", A64PRFM_PLIL3STRM}, {"pstl1keep", A64PRFM_PSTL1KEEP}, {"pstl1strm", A64PRFM_PSTL1STRM}, {"pstl2keep", A64PRFM_PSTL2KEEP}, {"pstl2strm", A64PRFM_PSTL2STRM}, {"pstl3keep", A64PRFM_PSTL3KEEP}, {"pstl3strm", A64PRFM_PSTL3STRM} }; const A64NamedImmMapper A64PRFM_PRFMMapper = { PRFMPairs, ARR_SIZE(PRFMPairs), 32, }; static const A64NamedImmMapper_Mapping PStatePairs[] = { {"spsel", A64PState_SPSel}, {"daifset", A64PState_DAIFSet}, {"daifclr", A64PState_DAIFClr}, {"pan", A64PState_PAN}, {"uao", A64PState_UAO} }; const A64NamedImmMapper A64PState_PStateMapper = { PStatePairs, ARR_SIZE(PStatePairs), 0, }; static const A64NamedImmMapper_Mapping MRSPairs[] = { {"mdccsr_el0", A64SysReg_MDCCSR_EL0}, {"dbgdtrrx_el0", A64SysReg_DBGDTRRX_EL0}, {"mdrar_el1", A64SysReg_MDRAR_EL1}, {"oslsr_el1", A64SysReg_OSLSR_EL1}, {"dbgauthstatus_el1", A64SysReg_DBGAUTHSTATUS_EL1}, {"pmceid0_el0", A64SysReg_PMCEID0_EL0}, {"pmceid1_el0", A64SysReg_PMCEID1_EL0}, {"midr_el1", A64SysReg_MIDR_EL1}, {"ccsidr_el1", A64SysReg_CCSIDR_EL1}, {"clidr_el1", A64SysReg_CLIDR_EL1}, {"ctr_el0", A64SysReg_CTR_EL0}, {"mpidr_el1", A64SysReg_MPIDR_EL1}, {"revidr_el1", A64SysReg_REVIDR_EL1}, {"aidr_el1", A64SysReg_AIDR_EL1}, {"dczid_el0", A64SysReg_DCZID_EL0}, {"id_pfr0_el1", A64SysReg_ID_PFR0_EL1}, {"id_pfr1_el1", A64SysReg_ID_PFR1_EL1}, {"id_dfr0_el1", A64SysReg_ID_DFR0_EL1}, {"id_afr0_el1", A64SysReg_ID_AFR0_EL1}, {"id_mmfr0_el1", A64SysReg_ID_MMFR0_EL1}, {"id_mmfr1_el1", A64SysReg_ID_MMFR1_EL1}, {"id_mmfr2_el1", A64SysReg_ID_MMFR2_EL1}, {"id_mmfr3_el1", A64SysReg_ID_MMFR3_EL1}, {"id_mmfr4_el1", A64SysReg_ID_MMFR4_EL1}, {"id_isar0_el1", A64SysReg_ID_ISAR0_EL1}, {"id_isar1_el1", A64SysReg_ID_ISAR1_EL1}, {"id_isar2_el1", A64SysReg_ID_ISAR2_EL1}, {"id_isar3_el1", A64SysReg_ID_ISAR3_EL1}, {"id_isar4_el1", A64SysReg_ID_ISAR4_EL1}, {"id_isar5_el1", A64SysReg_ID_ISAR5_EL1}, {"id_aa64pfr0_el1", A64SysReg_ID_A64PFR0_EL1}, {"id_aa64pfr1_el1", A64SysReg_ID_A64PFR1_EL1}, {"id_aa64dfr0_el1", A64SysReg_ID_A64DFR0_EL1}, {"id_aa64dfr1_el1", A64SysReg_ID_A64DFR1_EL1}, {"id_aa64afr0_el1", A64SysReg_ID_A64AFR0_EL1}, {"id_aa64afr1_el1", A64SysReg_ID_A64AFR1_EL1}, {"id_aa64isar0_el1", A64SysReg_ID_A64ISAR0_EL1}, {"id_aa64isar1_el1", A64SysReg_ID_A64ISAR1_EL1}, {"id_aa64mmfr0_el1", A64SysReg_ID_A64MMFR0_EL1}, {"id_aa64mmfr1_el1", A64SysReg_ID_A64MMFR1_EL1}, {"id_aa64mmfr2_el1", A64SysReg_ID_A64MMFR2_EL1}, {"lorid_el1", A64SysReg_LORID_EL1}, {"mvfr0_el1", A64SysReg_MVFR0_EL1}, {"mvfr1_el1", A64SysReg_MVFR1_EL1}, {"mvfr2_el1", A64SysReg_MVFR2_EL1}, {"rvbar_el1", A64SysReg_RVBAR_EL1}, {"rvbar_el2", A64SysReg_RVBAR_EL2}, {"rvbar_el3", A64SysReg_RVBAR_EL3}, {"isr_el1", A64SysReg_ISR_EL1}, {"cntpct_el0", A64SysReg_CNTPCT_EL0}, {"cntvct_el0", A64SysReg_CNTVCT_EL0}, // Trace registers {"trcstatr", A64SysReg_TRCSTATR}, {"trcidr8", A64SysReg_TRCIDR8}, {"trcidr9", A64SysReg_TRCIDR9}, {"trcidr10", A64SysReg_TRCIDR10}, {"trcidr11", A64SysReg_TRCIDR11}, {"trcidr12", A64SysReg_TRCIDR12}, {"trcidr13", A64SysReg_TRCIDR13}, {"trcidr0", A64SysReg_TRCIDR0}, {"trcidr1", A64SysReg_TRCIDR1}, {"trcidr2", A64SysReg_TRCIDR2}, {"trcidr3", A64SysReg_TRCIDR3}, {"trcidr4", A64SysReg_TRCIDR4}, {"trcidr5", A64SysReg_TRCIDR5}, {"trcidr6", A64SysReg_TRCIDR6}, {"trcidr7", A64SysReg_TRCIDR7}, {"trcoslsr", A64SysReg_TRCOSLSR}, {"trcpdsr", A64SysReg_TRCPDSR}, {"trcdevaff0", A64SysReg_TRCDEVAFF0}, {"trcdevaff1", A64SysReg_TRCDEVAFF1}, {"trclsr", A64SysReg_TRCLSR}, {"trcauthstatus", A64SysReg_TRCAUTHSTATUS}, {"trcdevarch", A64SysReg_TRCDEVARCH}, {"trcdevid", A64SysReg_TRCDEVID}, {"trcdevtype", A64SysReg_TRCDEVTYPE}, {"trcpidr4", A64SysReg_TRCPIDR4}, {"trcpidr5", A64SysReg_TRCPIDR5}, {"trcpidr6", A64SysReg_TRCPIDR6}, {"trcpidr7", A64SysReg_TRCPIDR7}, {"trcpidr0", A64SysReg_TRCPIDR0}, {"trcpidr1", A64SysReg_TRCPIDR1}, {"trcpidr2", A64SysReg_TRCPIDR2}, {"trcpidr3", A64SysReg_TRCPIDR3}, {"trccidr0", A64SysReg_TRCCIDR0}, {"trccidr1", A64SysReg_TRCCIDR1}, {"trccidr2", A64SysReg_TRCCIDR2}, {"trccidr3", A64SysReg_TRCCIDR3}, // GICv3 registers {"icc_iar1_el1", A64SysReg_ICC_IAR1_EL1}, {"icc_iar0_el1", A64SysReg_ICC_IAR0_EL1}, {"icc_hppir1_el1", A64SysReg_ICC_HPPIR1_EL1}, {"icc_hppir0_el1", A64SysReg_ICC_HPPIR0_EL1}, {"icc_rpr_el1", A64SysReg_ICC_RPR_EL1}, {"ich_vtr_el2", A64SysReg_ICH_VTR_EL2}, {"ich_eisr_el2", A64SysReg_ICH_EISR_EL2}, {"ich_elsr_el2", A64SysReg_ICH_ELSR_EL2}, // Statistical profiling registers {"pmsidr_el1", A64SysReg_PMSIDR_EL1}, {"pmbidr_el1", A64SysReg_PMBIDR_EL1} }; const A64SysRegMapper AArch64_MRSMapper = { NULL, MRSPairs, ARR_SIZE(MRSPairs), }; static const A64NamedImmMapper_Mapping MSRPairs[] = { {"dbgdtrtx_el0", A64SysReg_DBGDTRTX_EL0}, {"oslar_el1", A64SysReg_OSLAR_EL1}, {"pmswinc_el0", A64SysReg_PMSWINC_EL0}, // Trace registers {"trcoslar", A64SysReg_TRCOSLAR}, {"trclar", A64SysReg_TRCLAR}, // GICv3 registers {"icc_eoir1_el1", A64SysReg_ICC_EOIR1_EL1}, {"icc_eoir0_el1", A64SysReg_ICC_EOIR0_EL1}, {"icc_dir_el1", A64SysReg_ICC_DIR_EL1}, {"icc_sgi1r_el1", A64SysReg_ICC_SGI1R_EL1}, {"icc_asgi1r_el1", A64SysReg_ICC_ASGI1R_EL1}, {"icc_sgi0r_el1", A64SysReg_ICC_SGI0R_EL1} }; const A64SysRegMapper AArch64_MSRMapper = { NULL, MSRPairs, ARR_SIZE(MSRPairs), }; #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64BaseInfo.h010066400017500001750000001530561363402546700212610ustar0000000000000000//===-- AArch64BaseInfo.h - Top level definitions for AArch64- --*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains small standalone helper functions and enum definitions for // the AArch64 target useful for the compiler back-end and the MC libraries. // As such, it deliberately does not include references to LLVM core // code gen types, passes, etc.. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_AARCH64_BASEINFO_H #define CS_LLVM_AARCH64_BASEINFO_H #include #include #ifndef __cplusplus #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #define inline /* inline */ #endif #endif inline static unsigned getWRegFromXReg(unsigned Reg) { switch (Reg) { case ARM64_REG_X0: return ARM64_REG_W0; case ARM64_REG_X1: return ARM64_REG_W1; case ARM64_REG_X2: return ARM64_REG_W2; case ARM64_REG_X3: return ARM64_REG_W3; case ARM64_REG_X4: return ARM64_REG_W4; case ARM64_REG_X5: return ARM64_REG_W5; case ARM64_REG_X6: return ARM64_REG_W6; case ARM64_REG_X7: return ARM64_REG_W7; case ARM64_REG_X8: return ARM64_REG_W8; case ARM64_REG_X9: return ARM64_REG_W9; case ARM64_REG_X10: return ARM64_REG_W10; case ARM64_REG_X11: return ARM64_REG_W11; case ARM64_REG_X12: return ARM64_REG_W12; case ARM64_REG_X13: return ARM64_REG_W13; case ARM64_REG_X14: return ARM64_REG_W14; case ARM64_REG_X15: return ARM64_REG_W15; case ARM64_REG_X16: return ARM64_REG_W16; case ARM64_REG_X17: return ARM64_REG_W17; case ARM64_REG_X18: return ARM64_REG_W18; case ARM64_REG_X19: return ARM64_REG_W19; case ARM64_REG_X20: return ARM64_REG_W20; case ARM64_REG_X21: return ARM64_REG_W21; case ARM64_REG_X22: return ARM64_REG_W22; case ARM64_REG_X23: return ARM64_REG_W23; case ARM64_REG_X24: return ARM64_REG_W24; case ARM64_REG_X25: return ARM64_REG_W25; case ARM64_REG_X26: return ARM64_REG_W26; case ARM64_REG_X27: return ARM64_REG_W27; case ARM64_REG_X28: return ARM64_REG_W28; case ARM64_REG_FP: return ARM64_REG_W29; case ARM64_REG_LR: return ARM64_REG_W30; case ARM64_REG_SP: return ARM64_REG_WSP; case ARM64_REG_XZR: return ARM64_REG_WZR; } // For anything else, return it unchanged. return Reg; } // // Enums corresponding to AArch64 condition codes // The CondCodes constants map directly to the 4-bit encoding of the // condition field for predicated instructions. typedef enum A64CC_CondCode { // Meaning (integer) Meaning (floating-point) A64CC_EQ = 0, // Equal Equal A64CC_NE, // Not equal Not equal, or unordered A64CC_HS, // Unsigned higher or same >, ==, or unordered A64CC_LO, // Unsigned lower or same Less than A64CC_MI, // Minus, negative Less than A64CC_PL, // Plus, positive or zero >, ==, or unordered A64CC_VS, // Overflow Unordered A64CC_VC, // No overflow Ordered A64CC_HI, // Unsigned higher Greater than, or unordered A64CC_LS, // Unsigned lower or same Less than or equal A64CC_GE, // Greater than or equal Greater than or equal A64CC_LT, // Less than Less than, or unordered A64CC_GT, // Signed greater than Greater than A64CC_LE, // Signed less than or equal <, ==, or unordered A64CC_AL, // Always (unconditional) Always (unconditional) A64CC_NV, // Always (unconditional) Always (unconditional) // Note the NV exists purely to disassemble 0b1111. Execution is "always". A64CC_Invalid } A64CC_CondCode; inline static const char *getCondCodeName(A64CC_CondCode CC) { switch (CC) { default: return NULL; // never reach case A64CC_EQ: return "eq"; case A64CC_NE: return "ne"; case A64CC_HS: return "hs"; case A64CC_LO: return "lo"; case A64CC_MI: return "mi"; case A64CC_PL: return "pl"; case A64CC_VS: return "vs"; case A64CC_VC: return "vc"; case A64CC_HI: return "hi"; case A64CC_LS: return "ls"; case A64CC_GE: return "ge"; case A64CC_LT: return "lt"; case A64CC_GT: return "gt"; case A64CC_LE: return "le"; case A64CC_AL: return "al"; case A64CC_NV: return "nv"; } } inline static A64CC_CondCode getInvertedCondCode(A64CC_CondCode Code) { // To reverse a condition it's necessary to only invert the low bit: return (A64CC_CondCode)((unsigned)Code ^ 0x1); } /// Instances of this class can perform bidirectional mapping from random /// identifier strings to operand encodings. For example "MSR" takes a named /// system-register which must be encoded somehow and decoded for printing. This /// central location means that the information for those transformations is not /// duplicated and remains in sync. /// /// FIXME: currently the algorithm is a completely unoptimised linear /// search. Obviously this could be improved, but we would probably want to work /// out just how often these instructions are emitted before working on it. It /// might even be optimal to just reorder the tables for the common instructions /// rather than changing the algorithm. typedef struct A64NamedImmMapper_Mapping { const char *Name; uint32_t Value; } A64NamedImmMapper_Mapping; typedef struct A64NamedImmMapper { const A64NamedImmMapper_Mapping *Pairs; size_t NumPairs; uint32_t TooBigImm; } A64NamedImmMapper; typedef struct A64SysRegMapper { const A64NamedImmMapper_Mapping *SysRegPairs; const A64NamedImmMapper_Mapping *InstPairs; size_t NumInstPairs; } A64SysRegMapper; extern const A64SysRegMapper AArch64_MSRMapper; extern const A64SysRegMapper AArch64_MRSMapper; extern const A64NamedImmMapper A64DB_DBarrierMapper; extern const A64NamedImmMapper A64AT_ATMapper; extern const A64NamedImmMapper A64DC_DCMapper; extern const A64NamedImmMapper A64IC_ICMapper; extern const A64NamedImmMapper A64ISB_ISBMapper; extern const A64NamedImmMapper A64PRFM_PRFMMapper; extern const A64NamedImmMapper A64PState_PStateMapper; extern const A64NamedImmMapper A64TLBI_TLBIMapper; enum { A64AT_Invalid = -1, // Op0 Op1 CRn CRm Op2 A64AT_S1E1R = 0x43c0, // 01 000 0111 1000 000 A64AT_S1E2R = 0x63c0, // 01 100 0111 1000 000 A64AT_S1E3R = 0x73c0, // 01 110 0111 1000 000 A64AT_S1E1W = 0x43c1, // 01 000 0111 1000 001 A64AT_S1E2W = 0x63c1, // 01 100 0111 1000 001 A64AT_S1E3W = 0x73c1, // 01 110 0111 1000 001 A64AT_S1E0R = 0x43c2, // 01 000 0111 1000 010 A64AT_S1E0W = 0x43c3, // 01 000 0111 1000 011 A64AT_S12E1R = 0x63c4, // 01 100 0111 1000 100 A64AT_S12E1W = 0x63c5, // 01 100 0111 1000 101 A64AT_S12E0R = 0x63c6, // 01 100 0111 1000 110 A64AT_S12E0W = 0x63c7 // 01 100 0111 1000 111 }; enum A64DBValues { A64DB_Invalid = -1, A64DB_OSHLD = 0x1, A64DB_OSHST = 0x2, A64DB_OSH = 0x3, A64DB_NSHLD = 0x5, A64DB_NSHST = 0x6, A64DB_NSH = 0x7, A64DB_ISHLD = 0x9, A64DB_ISHST = 0xa, A64DB_ISH = 0xb, A64DB_LD = 0xd, A64DB_ST = 0xe, A64DB_SY = 0xf }; enum A64DCValues { A64DC_Invalid = -1, // Op1 CRn CRm Op2 A64DC_ZVA = 0x5ba1, // 01 011 0111 0100 001 A64DC_IVAC = 0x43b1, // 01 000 0111 0110 001 A64DC_ISW = 0x43b2, // 01 000 0111 0110 010 A64DC_CVAC = 0x5bd1, // 01 011 0111 1010 001 A64DC_CSW = 0x43d2, // 01 000 0111 1010 010 A64DC_CVAU = 0x5bd9, // 01 011 0111 1011 001 A64DC_CIVAC = 0x5bf1, // 01 011 0111 1110 001 A64DC_CISW = 0x43f2 // 01 000 0111 1110 010 }; enum A64ICValues { A64IC_Invalid = -1, // Op1 CRn CRm Op2 A64IC_IALLUIS = 0x0388, // 000 0111 0001 000 A64IC_IALLU = 0x03a8, // 000 0111 0101 000 A64IC_IVAU = 0x1ba9 // 011 0111 0101 001 }; enum A64ISBValues { A64ISB_Invalid = -1, A64ISB_SY = 0xf }; enum A64PRFMValues { A64PRFM_Invalid = -1, A64PRFM_PLDL1KEEP = 0x00, A64PRFM_PLDL1STRM = 0x01, A64PRFM_PLDL2KEEP = 0x02, A64PRFM_PLDL2STRM = 0x03, A64PRFM_PLDL3KEEP = 0x04, A64PRFM_PLDL3STRM = 0x05, A64PRFM_PLIL1KEEP = 0x08, A64PRFM_PLIL1STRM = 0x09, A64PRFM_PLIL2KEEP = 0x0a, A64PRFM_PLIL2STRM = 0x0b, A64PRFM_PLIL3KEEP = 0x0c, A64PRFM_PLIL3STRM = 0x0d, A64PRFM_PSTL1KEEP = 0x10, A64PRFM_PSTL1STRM = 0x11, A64PRFM_PSTL2KEEP = 0x12, A64PRFM_PSTL2STRM = 0x13, A64PRFM_PSTL3KEEP = 0x14, A64PRFM_PSTL3STRM = 0x15 }; enum A64PStateValues { A64PState_Invalid = -1, A64PState_SPSel = 0x05, A64PState_DAIFSet = 0x1e, A64PState_DAIFClr = 0x1f, A64PState_PAN = 0x4, A64PState_UAO = 0x3 }; typedef enum A64SE_ShiftExtSpecifiers { A64SE_Invalid = -1, A64SE_LSL, A64SE_MSL, A64SE_LSR, A64SE_ASR, A64SE_ROR, A64SE_UXTB, A64SE_UXTH, A64SE_UXTW, A64SE_UXTX, A64SE_SXTB, A64SE_SXTH, A64SE_SXTW, A64SE_SXTX } A64SE_ShiftExtSpecifiers; typedef enum A64Layout_VectorLayout { A64Layout_Invalid = -1, A64Layout_VL_8B, A64Layout_VL_4H, A64Layout_VL_2S, A64Layout_VL_1D, A64Layout_VL_16B, A64Layout_VL_8H, A64Layout_VL_4S, A64Layout_VL_2D, // Bare layout for the 128-bit vector // (only show ".b", ".h", ".s", ".d" without vector number) A64Layout_VL_B, A64Layout_VL_H, A64Layout_VL_S, A64Layout_VL_D } A64Layout_VectorLayout; inline static const char *A64VectorLayoutToString(A64Layout_VectorLayout Layout) { switch (Layout) { case A64Layout_VL_8B: return ".8b"; case A64Layout_VL_4H: return ".4h"; case A64Layout_VL_2S: return ".2s"; case A64Layout_VL_1D: return ".1d"; case A64Layout_VL_16B: return ".16b"; case A64Layout_VL_8H: return ".8h"; case A64Layout_VL_4S: return ".4s"; case A64Layout_VL_2D: return ".2d"; case A64Layout_VL_B: return ".b"; case A64Layout_VL_H: return ".h"; case A64Layout_VL_S: return ".s"; case A64Layout_VL_D: return ".d"; default: return NULL; // never reach } } enum A64SysRegROValues { A64SysReg_MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000 A64SysReg_DBGDTRRX_EL0 = 0x9828, // 10 011 0000 0101 000 A64SysReg_MDRAR_EL1 = 0x8080, // 10 000 0001 0000 000 A64SysReg_OSLSR_EL1 = 0x808c, // 10 000 0001 0001 100 A64SysReg_DBGAUTHSTATUS_EL1 = 0x83f6, // 10 000 0111 1110 110 A64SysReg_PMCEID0_EL0 = 0xdce6, // 11 011 1001 1100 110 A64SysReg_PMCEID1_EL0 = 0xdce7, // 11 011 1001 1100 111 A64SysReg_MIDR_EL1 = 0xc000, // 11 000 0000 0000 000 A64SysReg_CCSIDR_EL1 = 0xc800, // 11 001 0000 0000 000 A64SysReg_CLIDR_EL1 = 0xc801, // 11 001 0000 0000 001 A64SysReg_CTR_EL0 = 0xd801, // 11 011 0000 0000 001 A64SysReg_MPIDR_EL1 = 0xc005, // 11 000 0000 0000 101 A64SysReg_REVIDR_EL1 = 0xc006, // 11 000 0000 0000 110 A64SysReg_AIDR_EL1 = 0xc807, // 11 001 0000 0000 111 A64SysReg_DCZID_EL0 = 0xd807, // 11 011 0000 0000 111 A64SysReg_ID_PFR0_EL1 = 0xc008, // 11 000 0000 0001 000 A64SysReg_ID_PFR1_EL1 = 0xc009, // 11 000 0000 0001 001 A64SysReg_ID_DFR0_EL1 = 0xc00a, // 11 000 0000 0001 010 A64SysReg_ID_AFR0_EL1 = 0xc00b, // 11 000 0000 0001 011 A64SysReg_ID_MMFR0_EL1 = 0xc00c, // 11 000 0000 0001 100 A64SysReg_ID_MMFR1_EL1 = 0xc00d, // 11 000 0000 0001 101 A64SysReg_ID_MMFR2_EL1 = 0xc00e, // 11 000 0000 0001 110 A64SysReg_ID_MMFR3_EL1 = 0xc00f, // 11 000 0000 0001 111 A64SysReg_ID_MMFR4_EL1 = 0xc016, // 11 000 0000 0010 110 A64SysReg_ID_ISAR0_EL1 = 0xc010, // 11 000 0000 0010 000 A64SysReg_ID_ISAR1_EL1 = 0xc011, // 11 000 0000 0010 001 A64SysReg_ID_ISAR2_EL1 = 0xc012, // 11 000 0000 0010 010 A64SysReg_ID_ISAR3_EL1 = 0xc013, // 11 000 0000 0010 011 A64SysReg_ID_ISAR4_EL1 = 0xc014, // 11 000 0000 0010 100 A64SysReg_ID_ISAR5_EL1 = 0xc015, // 11 000 0000 0010 101 A64SysReg_ID_A64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000 A64SysReg_ID_A64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001 A64SysReg_ID_A64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000 A64SysReg_ID_A64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001 A64SysReg_ID_A64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100 A64SysReg_ID_A64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101 A64SysReg_ID_A64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000 A64SysReg_ID_A64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001 A64SysReg_ID_A64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000 A64SysReg_ID_A64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001 A64SysReg_ID_A64MMFR2_EL1 = 0xC03A, // 11 000 0000 0111 010 A64SysReg_LORC_EL1 = 0xc523, // 11 000 1010 0100 011 A64SysReg_LOREA_EL1 = 0xc521, // 11 000 1010 0100 001 A64SysReg_LORID_EL1 = 0xc527, // 11 000 1010 0100 111 A64SysReg_LORN_EL1 = 0xc522, // 11 000 1010 0100 010 A64SysReg_LORSA_EL1 = 0xc520, // 11 000 1010 0100 000 A64SysReg_MVFR0_EL1 = 0xc018, // 11 000 0000 0011 000 A64SysReg_MVFR1_EL1 = 0xc019, // 11 000 0000 0011 001 A64SysReg_MVFR2_EL1 = 0xc01a, // 11 000 0000 0011 010 A64SysReg_RVBAR_EL1 = 0xc601, // 11 000 1100 0000 001 A64SysReg_RVBAR_EL2 = 0xe601, // 11 100 1100 0000 001 A64SysReg_RVBAR_EL3 = 0xf601, // 11 110 1100 0000 001 A64SysReg_ISR_EL1 = 0xc608, // 11 000 1100 0001 000 A64SysReg_CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 A64SysReg_CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 // Trace registers A64SysReg_TRCSTATR = 0x8818, // 10 001 0000 0011 000 A64SysReg_TRCIDR8 = 0x8806, // 10 001 0000 0000 110 A64SysReg_TRCIDR9 = 0x880e, // 10 001 0000 0001 110 A64SysReg_TRCIDR10 = 0x8816, // 10 001 0000 0010 110 A64SysReg_TRCIDR11 = 0x881e, // 10 001 0000 0011 110 A64SysReg_TRCIDR12 = 0x8826, // 10 001 0000 0100 110 A64SysReg_TRCIDR13 = 0x882e, // 10 001 0000 0101 110 A64SysReg_TRCIDR0 = 0x8847, // 10 001 0000 1000 111 A64SysReg_TRCIDR1 = 0x884f, // 10 001 0000 1001 111 A64SysReg_TRCIDR2 = 0x8857, // 10 001 0000 1010 111 A64SysReg_TRCIDR3 = 0x885f, // 10 001 0000 1011 111 A64SysReg_TRCIDR4 = 0x8867, // 10 001 0000 1100 111 A64SysReg_TRCIDR5 = 0x886f, // 10 001 0000 1101 111 A64SysReg_TRCIDR6 = 0x8877, // 10 001 0000 1110 111 A64SysReg_TRCIDR7 = 0x887f, // 10 001 0000 1111 111 A64SysReg_TRCOSLSR = 0x888c, // 10 001 0001 0001 100 A64SysReg_TRCPDSR = 0x88ac, // 10 001 0001 0101 100 A64SysReg_TRCDEVAFF0 = 0x8bd6, // 10 001 0111 1010 110 A64SysReg_TRCDEVAFF1 = 0x8bde, // 10 001 0111 1011 110 A64SysReg_TRCLSR = 0x8bee, // 10 001 0111 1101 110 A64SysReg_TRCAUTHSTATUS = 0x8bf6, // 10 001 0111 1110 110 A64SysReg_TRCDEVARCH = 0x8bfe, // 10 001 0111 1111 110 A64SysReg_TRCDEVID = 0x8b97, // 10 001 0111 0010 111 A64SysReg_TRCDEVTYPE = 0x8b9f, // 10 001 0111 0011 111 A64SysReg_TRCPIDR4 = 0x8ba7, // 10 001 0111 0100 111 A64SysReg_TRCPIDR5 = 0x8baf, // 10 001 0111 0101 111 A64SysReg_TRCPIDR6 = 0x8bb7, // 10 001 0111 0110 111 A64SysReg_TRCPIDR7 = 0x8bbf, // 10 001 0111 0111 111 A64SysReg_TRCPIDR0 = 0x8bc7, // 10 001 0111 1000 111 A64SysReg_TRCPIDR1 = 0x8bcf, // 10 001 0111 1001 111 A64SysReg_TRCPIDR2 = 0x8bd7, // 10 001 0111 1010 111 A64SysReg_TRCPIDR3 = 0x8bdf, // 10 001 0111 1011 111 A64SysReg_TRCCIDR0 = 0x8be7, // 10 001 0111 1100 111 A64SysReg_TRCCIDR1 = 0x8bef, // 10 001 0111 1101 111 A64SysReg_TRCCIDR2 = 0x8bf7, // 10 001 0111 1110 111 A64SysReg_TRCCIDR3 = 0x8bff, // 10 001 0111 1111 111 // GICv3 registers A64SysReg_ICC_IAR1_EL1 = 0xc660, // 11 000 1100 1100 000 A64SysReg_ICC_IAR0_EL1 = 0xc640, // 11 000 1100 1000 000 A64SysReg_ICC_HPPIR1_EL1 = 0xc662, // 11 000 1100 1100 010 A64SysReg_ICC_HPPIR0_EL1 = 0xc642, // 11 000 1100 1000 010 A64SysReg_ICC_RPR_EL1 = 0xc65b, // 11 000 1100 1011 011 A64SysReg_ICH_VTR_EL2 = 0xe659, // 11 100 1100 1011 001 A64SysReg_ICH_EISR_EL2 = 0xe65b, // 11 100 1100 1011 011 A64SysReg_ICH_ELSR_EL2 = 0xe65d // 11 100 1100 1011 101 }; enum A64SysRegWOValues { A64SysReg_DBGDTRTX_EL0 = 0x9828, // 10 011 0000 0101 000 A64SysReg_OSLAR_EL1 = 0x8084, // 10 000 0001 0000 100 A64SysReg_PMSWINC_EL0 = 0xdce4, // 11 011 1001 1100 100 // Trace Registers A64SysReg_TRCOSLAR = 0x8884, // 10 001 0001 0000 100 A64SysReg_TRCLAR = 0x8be6, // 10 001 0111 1100 110 // GICv3 registers A64SysReg_ICC_EOIR1_EL1 = 0xc661, // 11 000 1100 1100 001 A64SysReg_ICC_EOIR0_EL1 = 0xc641, // 11 000 1100 1000 001 A64SysReg_ICC_DIR_EL1 = 0xc659, // 11 000 1100 1011 001 A64SysReg_ICC_SGI1R_EL1 = 0xc65d, // 11 000 1100 1011 101 A64SysReg_ICC_ASGI1R_EL1 = 0xc65e, // 11 000 1100 1011 110 A64SysReg_ICC_SGI0R_EL1 = 0xc65f // 11 000 1100 1011 111 }; enum A64SysRegValues { A64SysReg_Invalid = -1, // Op0 Op1 CRn CRm Op2 A64SysReg_PAN = 0xc213, // 11 000 0100 0010 011 A64SysReg_UAO = 0xc214, // 11 000 0100 0010 100 A64SysReg_OSDTRRX_EL1 = 0x8002, // 10 000 0000 0000 010 A64SysReg_OSDTRTX_EL1 = 0x801a, // 10 000 0000 0011 010 A64SysReg_TEECR32_EL1 = 0x9000, // 10 010 0000 0000 000 A64SysReg_MDCCINT_EL1 = 0x8010, // 10 000 0000 0010 000 A64SysReg_MDSCR_EL1 = 0x8012, // 10 000 0000 0010 010 A64SysReg_DBGDTR_EL0 = 0x9820, // 10 011 0000 0100 000 A64SysReg_OSECCR_EL1 = 0x8032, // 10 000 0000 0110 010 A64SysReg_DBGVCR32_EL2 = 0xa038, // 10 100 0000 0111 000 A64SysReg_DBGBVR0_EL1 = 0x8004, // 10 000 0000 0000 100 A64SysReg_DBGBVR1_EL1 = 0x800c, // 10 000 0000 0001 100 A64SysReg_DBGBVR2_EL1 = 0x8014, // 10 000 0000 0010 100 A64SysReg_DBGBVR3_EL1 = 0x801c, // 10 000 0000 0011 100 A64SysReg_DBGBVR4_EL1 = 0x8024, // 10 000 0000 0100 100 A64SysReg_DBGBVR5_EL1 = 0x802c, // 10 000 0000 0101 100 A64SysReg_DBGBVR6_EL1 = 0x8034, // 10 000 0000 0110 100 A64SysReg_DBGBVR7_EL1 = 0x803c, // 10 000 0000 0111 100 A64SysReg_DBGBVR8_EL1 = 0x8044, // 10 000 0000 1000 100 A64SysReg_DBGBVR9_EL1 = 0x804c, // 10 000 0000 1001 100 A64SysReg_DBGBVR10_EL1 = 0x8054, // 10 000 0000 1010 100 A64SysReg_DBGBVR11_EL1 = 0x805c, // 10 000 0000 1011 100 A64SysReg_DBGBVR12_EL1 = 0x8064, // 10 000 0000 1100 100 A64SysReg_DBGBVR13_EL1 = 0x806c, // 10 000 0000 1101 100 A64SysReg_DBGBVR14_EL1 = 0x8074, // 10 000 0000 1110 100 A64SysReg_DBGBVR15_EL1 = 0x807c, // 10 000 0000 1111 100 A64SysReg_DBGBCR0_EL1 = 0x8005, // 10 000 0000 0000 101 A64SysReg_DBGBCR1_EL1 = 0x800d, // 10 000 0000 0001 101 A64SysReg_DBGBCR2_EL1 = 0x8015, // 10 000 0000 0010 101 A64SysReg_DBGBCR3_EL1 = 0x801d, // 10 000 0000 0011 101 A64SysReg_DBGBCR4_EL1 = 0x8025, // 10 000 0000 0100 101 A64SysReg_DBGBCR5_EL1 = 0x802d, // 10 000 0000 0101 101 A64SysReg_DBGBCR6_EL1 = 0x8035, // 10 000 0000 0110 101 A64SysReg_DBGBCR7_EL1 = 0x803d, // 10 000 0000 0111 101 A64SysReg_DBGBCR8_EL1 = 0x8045, // 10 000 0000 1000 101 A64SysReg_DBGBCR9_EL1 = 0x804d, // 10 000 0000 1001 101 A64SysReg_DBGBCR10_EL1 = 0x8055, // 10 000 0000 1010 101 A64SysReg_DBGBCR11_EL1 = 0x805d, // 10 000 0000 1011 101 A64SysReg_DBGBCR12_EL1 = 0x8065, // 10 000 0000 1100 101 A64SysReg_DBGBCR13_EL1 = 0x806d, // 10 000 0000 1101 101 A64SysReg_DBGBCR14_EL1 = 0x8075, // 10 000 0000 1110 101 A64SysReg_DBGBCR15_EL1 = 0x807d, // 10 000 0000 1111 101 A64SysReg_DBGWVR0_EL1 = 0x8006, // 10 000 0000 0000 110 A64SysReg_DBGWVR1_EL1 = 0x800e, // 10 000 0000 0001 110 A64SysReg_DBGWVR2_EL1 = 0x8016, // 10 000 0000 0010 110 A64SysReg_DBGWVR3_EL1 = 0x801e, // 10 000 0000 0011 110 A64SysReg_DBGWVR4_EL1 = 0x8026, // 10 000 0000 0100 110 A64SysReg_DBGWVR5_EL1 = 0x802e, // 10 000 0000 0101 110 A64SysReg_DBGWVR6_EL1 = 0x8036, // 10 000 0000 0110 110 A64SysReg_DBGWVR7_EL1 = 0x803e, // 10 000 0000 0111 110 A64SysReg_DBGWVR8_EL1 = 0x8046, // 10 000 0000 1000 110 A64SysReg_DBGWVR9_EL1 = 0x804e, // 10 000 0000 1001 110 A64SysReg_DBGWVR10_EL1 = 0x8056, // 10 000 0000 1010 110 A64SysReg_DBGWVR11_EL1 = 0x805e, // 10 000 0000 1011 110 A64SysReg_DBGWVR12_EL1 = 0x8066, // 10 000 0000 1100 110 A64SysReg_DBGWVR13_EL1 = 0x806e, // 10 000 0000 1101 110 A64SysReg_DBGWVR14_EL1 = 0x8076, // 10 000 0000 1110 110 A64SysReg_DBGWVR15_EL1 = 0x807e, // 10 000 0000 1111 110 A64SysReg_DBGWCR0_EL1 = 0x8007, // 10 000 0000 0000 111 A64SysReg_DBGWCR1_EL1 = 0x800f, // 10 000 0000 0001 111 A64SysReg_DBGWCR2_EL1 = 0x8017, // 10 000 0000 0010 111 A64SysReg_DBGWCR3_EL1 = 0x801f, // 10 000 0000 0011 111 A64SysReg_DBGWCR4_EL1 = 0x8027, // 10 000 0000 0100 111 A64SysReg_DBGWCR5_EL1 = 0x802f, // 10 000 0000 0101 111 A64SysReg_DBGWCR6_EL1 = 0x8037, // 10 000 0000 0110 111 A64SysReg_DBGWCR7_EL1 = 0x803f, // 10 000 0000 0111 111 A64SysReg_DBGWCR8_EL1 = 0x8047, // 10 000 0000 1000 111 A64SysReg_DBGWCR9_EL1 = 0x804f, // 10 000 0000 1001 111 A64SysReg_DBGWCR10_EL1 = 0x8057, // 10 000 0000 1010 111 A64SysReg_DBGWCR11_EL1 = 0x805f, // 10 000 0000 1011 111 A64SysReg_DBGWCR12_EL1 = 0x8067, // 10 000 0000 1100 111 A64SysReg_DBGWCR13_EL1 = 0x806f, // 10 000 0000 1101 111 A64SysReg_DBGWCR14_EL1 = 0x8077, // 10 000 0000 1110 111 A64SysReg_DBGWCR15_EL1 = 0x807f, // 10 000 0000 1111 111 A64SysReg_TEEHBR32_EL1 = 0x9080, // 10 010 0001 0000 000 A64SysReg_OSDLR_EL1 = 0x809c, // 10 000 0001 0011 100 A64SysReg_DBGPRCR_EL1 = 0x80a4, // 10 000 0001 0100 100 A64SysReg_DBGCLAIMSET_EL1 = 0x83c6, // 10 000 0111 1000 110 A64SysReg_DBGCLAIMCLR_EL1 = 0x83ce, // 10 000 0111 1001 110 A64SysReg_CSSELR_EL1 = 0xd000, // 11 010 0000 0000 000 A64SysReg_VPIDR_EL2 = 0xe000, // 11 100 0000 0000 000 A64SysReg_VMPIDR_EL2 = 0xe005, // 11 100 0000 0000 101 A64SysReg_CPACR_EL1 = 0xc082, // 11 000 0001 0000 010 A64SysReg_CPACR_EL12 = 0xe882, // 11 101 0001 0000 010 A64SysReg_SCTLR_EL1 = 0xc080, // 11 000 0001 0000 000 A64SysReg_SCTLR_EL12 = 0xe880, // 11 101 0001 0000 000 A64SysReg_SCTLR_EL2 = 0xe080, // 11 100 0001 0000 000 A64SysReg_SCTLR_EL3 = 0xf080, // 11 110 0001 0000 000 A64SysReg_ACTLR_EL1 = 0xc081, // 11 000 0001 0000 001 A64SysReg_ACTLR_EL2 = 0xe081, // 11 100 0001 0000 001 A64SysReg_ACTLR_EL3 = 0xf081, // 11 110 0001 0000 001 A64SysReg_HCR_EL2 = 0xe088, // 11 100 0001 0001 000 A64SysReg_SCR_EL3 = 0xf088, // 11 110 0001 0001 000 A64SysReg_MDCR_EL2 = 0xe089, // 11 100 0001 0001 001 A64SysReg_SDER32_EL3 = 0xf089, // 11 110 0001 0001 001 A64SysReg_CPTR_EL2 = 0xe08a, // 11 100 0001 0001 010 A64SysReg_CPTR_EL3 = 0xf08a, // 11 110 0001 0001 010 A64SysReg_HSTR_EL2 = 0xe08b, // 11 100 0001 0001 011 A64SysReg_HACR_EL2 = 0xe08f, // 11 100 0001 0001 111 A64SysReg_MDCR_EL3 = 0xf099, // 11 110 0001 0011 001 A64SysReg_TTBR0_EL1 = 0xc100, // 11 000 0010 0000 000 A64SysReg_TTBR0_EL12 = 0xe900, // 11 101 0010 0000 000 A64SysReg_TTBR0_EL2 = 0xe100, // 11 100 0010 0000 000 A64SysReg_TTBR0_EL3 = 0xf100, // 11 110 0010 0000 000 A64SysReg_TTBR1_EL1 = 0xc101, // 11 000 0010 0000 001 A64SysReg_TTBR1_EL12 = 0xe901, // 11 101 0010 0000 001 A64SysReg_TTBR1_EL2 = 0xe101, // 11 100 0010 0000 001 A64SysReg_TCR_EL1 = 0xc102, // 11 000 0010 0000 010 A64SysReg_TCR_EL12 = 0xe902, // 11 101 0010 0000 010 A64SysReg_TCR_EL2 = 0xe102, // 11 100 0010 0000 010 A64SysReg_TCR_EL3 = 0xf102, // 11 110 0010 0000 010 A64SysReg_VTTBR_EL2 = 0xe108, // 11 100 0010 0001 000 A64SysReg_VTCR_EL2 = 0xe10a, // 11 100 0010 0001 010 A64SysReg_DACR32_EL2 = 0xe180, // 11 100 0011 0000 000 A64SysReg_SPSR_EL1 = 0xc200, // 11 000 0100 0000 000 A64SysReg_SPSR_EL12 = 0xea00, // 11 101 0100 0000 000 A64SysReg_SPSR_EL2 = 0xe200, // 11 100 0100 0000 000 A64SysReg_SPSR_EL3 = 0xf200, // 11 110 0100 0000 000 A64SysReg_ELR_EL1 = 0xc201, // 11 000 0100 0000 001 A64SysReg_ELR_EL12 = 0xea01, // 11 101 0100 0000 001 A64SysReg_ELR_EL2 = 0xe201, // 11 100 0100 0000 001 A64SysReg_ELR_EL3 = 0xf201, // 11 110 0100 0000 001 A64SysReg_SP_EL0 = 0xc208, // 11 000 0100 0001 000 A64SysReg_SP_EL1 = 0xe208, // 11 100 0100 0001 000 A64SysReg_SP_EL2 = 0xf208, // 11 110 0100 0001 000 A64SysReg_SPSel = 0xc210, // 11 000 0100 0010 000 A64SysReg_NZCV = 0xda10, // 11 011 0100 0010 000 A64SysReg_DAIF = 0xda11, // 11 011 0100 0010 001 A64SysReg_CurrentEL = 0xc212, // 11 000 0100 0010 010 A64SysReg_SPSR_irq = 0xe218, // 11 100 0100 0011 000 A64SysReg_SPSR_abt = 0xe219, // 11 100 0100 0011 001 A64SysReg_SPSR_und = 0xe21a, // 11 100 0100 0011 010 A64SysReg_SPSR_fiq = 0xe21b, // 11 100 0100 0011 011 A64SysReg_FPCR = 0xda20, // 11 011 0100 0100 000 A64SysReg_FPSR = 0xda21, // 11 011 0100 0100 001 A64SysReg_DSPSR_EL0 = 0xda28, // 11 011 0100 0101 000 A64SysReg_DLR_EL0 = 0xda29, // 11 011 0100 0101 001 A64SysReg_IFSR32_EL2 = 0xe281, // 11 100 0101 0000 001 A64SysReg_AFSR0_EL1 = 0xc288, // 11 000 0101 0001 000 A64SysReg_AFSR0_EL12 = 0xea88, // 11 101 0101 0001 000 A64SysReg_AFSR0_EL2 = 0xe288, // 11 100 0101 0001 000 A64SysReg_AFSR0_EL3 = 0xf288, // 11 110 0101 0001 000 A64SysReg_AFSR1_EL1 = 0xc289, // 11 000 0101 0001 001 A64SysReg_AFSR1_EL12 = 0xea89, // 11 101 0101 0001 001 A64SysReg_AFSR1_EL2 = 0xe289, // 11 100 0101 0001 001 A64SysReg_AFSR1_EL3 = 0xf289, // 11 110 0101 0001 001 A64SysReg_ESR_EL1 = 0xc290, // 11 000 0101 0010 000 A64SysReg_ESR_EL12 = 0xea90, // 11 101 0101 0010 000 A64SysReg_ESR_EL2 = 0xe290, // 11 100 0101 0010 000 A64SysReg_ESR_EL3 = 0xf290, // 11 110 0101 0010 000 A64SysReg_FPEXC32_EL2 = 0xe298, // 11 100 0101 0011 000 A64SysReg_FAR_EL1 = 0xc300, // 11 000 0110 0000 000 A64SysReg_FAR_EL12 = 0xeb00, // 11 101 0110 0000 000 A64SysReg_FAR_EL2 = 0xe300, // 11 100 0110 0000 000 A64SysReg_FAR_EL3 = 0xf300, // 11 110 0110 0000 000 A64SysReg_HPFAR_EL2 = 0xe304, // 11 100 0110 0000 100 A64SysReg_PAR_EL1 = 0xc3a0, // 11 000 0111 0100 000 A64SysReg_PMCR_EL0 = 0xdce0, // 11 011 1001 1100 000 A64SysReg_PMCNTENSET_EL0 = 0xdce1, // 11 011 1001 1100 001 A64SysReg_PMCNTENCLR_EL0 = 0xdce2, // 11 011 1001 1100 010 A64SysReg_PMOVSCLR_EL0 = 0xdce3, // 11 011 1001 1100 011 A64SysReg_PMSELR_EL0 = 0xdce5, // 11 011 1001 1100 101 A64SysReg_PMCCNTR_EL0 = 0xdce8, // 11 011 1001 1101 000 A64SysReg_PMXEVTYPER_EL0 = 0xdce9, // 11 011 1001 1101 001 A64SysReg_PMXEVCNTR_EL0 = 0xdcea, // 11 011 1001 1101 010 A64SysReg_PMUSERENR_EL0 = 0xdcf0, // 11 011 1001 1110 000 A64SysReg_PMINTENSET_EL1 = 0xc4f1, // 11 000 1001 1110 001 A64SysReg_PMINTENCLR_EL1 = 0xc4f2, // 11 000 1001 1110 010 A64SysReg_PMOVSSET_EL0 = 0xdcf3, // 11 011 1001 1110 011 A64SysReg_MAIR_EL1 = 0xc510, // 11 000 1010 0010 000 A64SysReg_MAIR_EL12 = 0xed10, // 11 101 1010 0010 000 A64SysReg_MAIR_EL2 = 0xe510, // 11 100 1010 0010 000 A64SysReg_MAIR_EL3 = 0xf510, // 11 110 1010 0010 000 A64SysReg_AMAIR_EL1 = 0xc518, // 11 000 1010 0011 000 A64SysReg_AMAIR_EL12 = 0xed18, // 11 101 1010 0011 000 A64SysReg_AMAIR_EL2 = 0xe518, // 11 100 1010 0011 000 A64SysReg_AMAIR_EL3 = 0xf518, // 11 110 1010 0011 000 A64SysReg_VBAR_EL1 = 0xc600, // 11 000 1100 0000 000 A64SysReg_VBAR_EL12 = 0xee00, // 11 101 1100 0000 000 A64SysReg_VBAR_EL2 = 0xe600, // 11 100 1100 0000 000 A64SysReg_VBAR_EL3 = 0xf600, // 11 110 1100 0000 000 A64SysReg_RMR_EL1 = 0xc602, // 11 000 1100 0000 010 A64SysReg_RMR_EL2 = 0xe602, // 11 100 1100 0000 010 A64SysReg_RMR_EL3 = 0xf602, // 11 110 1100 0000 010 A64SysReg_CONTEXTIDR_EL1 = 0xc681, // 11 000 1101 0000 001 A64SysReg_CONTEXTIDR_EL12 = 0xee81, // 11 101 1101 0000 001 A64SysReg_CONTEXTIDR_EL2 = 0xe681, // 11 100 1101 0000 001 A64SysReg_TPIDR_EL0 = 0xde82, // 11 011 1101 0000 010 A64SysReg_TPIDR_EL2 = 0xe682, // 11 100 1101 0000 010 A64SysReg_TPIDR_EL3 = 0xf682, // 11 110 1101 0000 010 A64SysReg_TPIDRRO_EL0 = 0xde83, // 11 011 1101 0000 011 A64SysReg_TPIDR_EL1 = 0xc684, // 11 000 1101 0000 100 A64SysReg_CNTFRQ_EL0 = 0xdf00, // 11 011 1110 0000 000 A64SysReg_CNTVOFF_EL2 = 0xe703, // 11 100 1110 0000 011 A64SysReg_CNTKCTL_EL1 = 0xc708, // 11 000 1110 0001 000 A64SysReg_CNTKCTL_EL12 = 0xef08, // 11 101 1110 0001 000 A64SysReg_CNTHCTL_EL2 = 0xe708, // 11 100 1110 0001 000 A64SysReg_CNTHVCTL_EL2 = 0xe719, // 11 100 1110 0011 001 A64SysReg_CNTHV_CVAL_EL2 = 0xe71a, // 11 100 1110 0011 010 A64SysReg_CNTHV_TVAL_EL2 = 0xe718, // 11 100 1110 0011 000 A64SysReg_CNTP_TVAL_EL0 = 0xdf10, // 11 011 1110 0010 000 A64SysReg_CNTP_TVAL_EL02 = 0xef10, // 11 101 1110 0010 000 A64SysReg_CNTHP_TVAL_EL2 = 0xe710, // 11 100 1110 0010 000 A64SysReg_CNTPS_TVAL_EL1 = 0xff10, // 11 111 1110 0010 000 A64SysReg_CNTP_CTL_EL0 = 0xdf11, // 11 011 1110 0010 001 A64SysReg_CNTHP_CTL_EL2 = 0xe711, // 11 100 1110 0010 001 A64SysReg_CNTPS_CTL_EL1 = 0xff11, // 11 111 1110 0010 001 A64SysReg_CNTP_CVAL_EL0 = 0xdf12, // 11 011 1110 0010 010 A64SysReg_CNTP_CVAL_EL02 = 0xef12, // 11 101 1110 0010 010 A64SysReg_CNTHP_CVAL_EL2 = 0xe712, // 11 100 1110 0010 010 A64SysReg_CNTPS_CVAL_EL1 = 0xff12, // 11 111 1110 0010 010 A64SysReg_CNTV_TVAL_EL0 = 0xdf18, // 11 011 1110 0011 000 A64SysReg_CNTV_TVAL_EL02 = 0xef18, // 11 101 1110 0011 000 A64SysReg_CNTV_CTL_EL0 = 0xdf19, // 11 011 1110 0011 001 A64SysReg_CNTV_CTL_EL02 = 0xef19, // 11 101 1110 0011 001 A64SysReg_CNTV_CVAL_EL0 = 0xdf1a, // 11 011 1110 0011 010 A64SysReg_CNTV_CVAL_EL02 = 0xef1a, // 11 101 1110 0011 010 A64SysReg_PMEVCNTR0_EL0 = 0xdf40, // 11 011 1110 1000 000 A64SysReg_PMEVCNTR1_EL0 = 0xdf41, // 11 011 1110 1000 001 A64SysReg_PMEVCNTR2_EL0 = 0xdf42, // 11 011 1110 1000 010 A64SysReg_PMEVCNTR3_EL0 = 0xdf43, // 11 011 1110 1000 011 A64SysReg_PMEVCNTR4_EL0 = 0xdf44, // 11 011 1110 1000 100 A64SysReg_PMEVCNTR5_EL0 = 0xdf45, // 11 011 1110 1000 101 A64SysReg_PMEVCNTR6_EL0 = 0xdf46, // 11 011 1110 1000 110 A64SysReg_PMEVCNTR7_EL0 = 0xdf47, // 11 011 1110 1000 111 A64SysReg_PMEVCNTR8_EL0 = 0xdf48, // 11 011 1110 1001 000 A64SysReg_PMEVCNTR9_EL0 = 0xdf49, // 11 011 1110 1001 001 A64SysReg_PMEVCNTR10_EL0 = 0xdf4a, // 11 011 1110 1001 010 A64SysReg_PMEVCNTR11_EL0 = 0xdf4b, // 11 011 1110 1001 011 A64SysReg_PMEVCNTR12_EL0 = 0xdf4c, // 11 011 1110 1001 100 A64SysReg_PMEVCNTR13_EL0 = 0xdf4d, // 11 011 1110 1001 101 A64SysReg_PMEVCNTR14_EL0 = 0xdf4e, // 11 011 1110 1001 110 A64SysReg_PMEVCNTR15_EL0 = 0xdf4f, // 11 011 1110 1001 111 A64SysReg_PMEVCNTR16_EL0 = 0xdf50, // 11 011 1110 1010 000 A64SysReg_PMEVCNTR17_EL0 = 0xdf51, // 11 011 1110 1010 001 A64SysReg_PMEVCNTR18_EL0 = 0xdf52, // 11 011 1110 1010 010 A64SysReg_PMEVCNTR19_EL0 = 0xdf53, // 11 011 1110 1010 011 A64SysReg_PMEVCNTR20_EL0 = 0xdf54, // 11 011 1110 1010 100 A64SysReg_PMEVCNTR21_EL0 = 0xdf55, // 11 011 1110 1010 101 A64SysReg_PMEVCNTR22_EL0 = 0xdf56, // 11 011 1110 1010 110 A64SysReg_PMEVCNTR23_EL0 = 0xdf57, // 11 011 1110 1010 111 A64SysReg_PMEVCNTR24_EL0 = 0xdf58, // 11 011 1110 1011 000 A64SysReg_PMEVCNTR25_EL0 = 0xdf59, // 11 011 1110 1011 001 A64SysReg_PMEVCNTR26_EL0 = 0xdf5a, // 11 011 1110 1011 010 A64SysReg_PMEVCNTR27_EL0 = 0xdf5b, // 11 011 1110 1011 011 A64SysReg_PMEVCNTR28_EL0 = 0xdf5c, // 11 011 1110 1011 100 A64SysReg_PMEVCNTR29_EL0 = 0xdf5d, // 11 011 1110 1011 101 A64SysReg_PMEVCNTR30_EL0 = 0xdf5e, // 11 011 1110 1011 110 A64SysReg_PMCCFILTR_EL0 = 0xdf7f, // 11 011 1110 1111 111 A64SysReg_PMEVTYPER0_EL0 = 0xdf60, // 11 011 1110 1100 000 A64SysReg_PMEVTYPER1_EL0 = 0xdf61, // 11 011 1110 1100 001 A64SysReg_PMEVTYPER2_EL0 = 0xdf62, // 11 011 1110 1100 010 A64SysReg_PMEVTYPER3_EL0 = 0xdf63, // 11 011 1110 1100 011 A64SysReg_PMEVTYPER4_EL0 = 0xdf64, // 11 011 1110 1100 100 A64SysReg_PMEVTYPER5_EL0 = 0xdf65, // 11 011 1110 1100 101 A64SysReg_PMEVTYPER6_EL0 = 0xdf66, // 11 011 1110 1100 110 A64SysReg_PMEVTYPER7_EL0 = 0xdf67, // 11 011 1110 1100 111 A64SysReg_PMEVTYPER8_EL0 = 0xdf68, // 11 011 1110 1101 000 A64SysReg_PMEVTYPER9_EL0 = 0xdf69, // 11 011 1110 1101 001 A64SysReg_PMEVTYPER10_EL0 = 0xdf6a, // 11 011 1110 1101 010 A64SysReg_PMEVTYPER11_EL0 = 0xdf6b, // 11 011 1110 1101 011 A64SysReg_PMEVTYPER12_EL0 = 0xdf6c, // 11 011 1110 1101 100 A64SysReg_PMEVTYPER13_EL0 = 0xdf6d, // 11 011 1110 1101 101 A64SysReg_PMEVTYPER14_EL0 = 0xdf6e, // 11 011 1110 1101 110 A64SysReg_PMEVTYPER15_EL0 = 0xdf6f, // 11 011 1110 1101 111 A64SysReg_PMEVTYPER16_EL0 = 0xdf70, // 11 011 1110 1110 000 A64SysReg_PMEVTYPER17_EL0 = 0xdf71, // 11 011 1110 1110 001 A64SysReg_PMEVTYPER18_EL0 = 0xdf72, // 11 011 1110 1110 010 A64SysReg_PMEVTYPER19_EL0 = 0xdf73, // 11 011 1110 1110 011 A64SysReg_PMEVTYPER20_EL0 = 0xdf74, // 11 011 1110 1110 100 A64SysReg_PMEVTYPER21_EL0 = 0xdf75, // 11 011 1110 1110 101 A64SysReg_PMEVTYPER22_EL0 = 0xdf76, // 11 011 1110 1110 110 A64SysReg_PMEVTYPER23_EL0 = 0xdf77, // 11 011 1110 1110 111 A64SysReg_PMEVTYPER24_EL0 = 0xdf78, // 11 011 1110 1111 000 A64SysReg_PMEVTYPER25_EL0 = 0xdf79, // 11 011 1110 1111 001 A64SysReg_PMEVTYPER26_EL0 = 0xdf7a, // 11 011 1110 1111 010 A64SysReg_PMEVTYPER27_EL0 = 0xdf7b, // 11 011 1110 1111 011 A64SysReg_PMEVTYPER28_EL0 = 0xdf7c, // 11 011 1110 1111 100 A64SysReg_PMEVTYPER29_EL0 = 0xdf7d, // 11 011 1110 1111 101 A64SysReg_PMEVTYPER30_EL0 = 0xdf7e, // 11 011 1110 1111 110 // Trace registers A64SysReg_TRCPRGCTLR = 0x8808, // 10 001 0000 0001 000 A64SysReg_TRCPROCSELR = 0x8810, // 10 001 0000 0010 000 A64SysReg_TRCCONFIGR = 0x8820, // 10 001 0000 0100 000 A64SysReg_TRCAUXCTLR = 0x8830, // 10 001 0000 0110 000 A64SysReg_TRCEVENTCTL0R = 0x8840, // 10 001 0000 1000 000 A64SysReg_TRCEVENTCTL1R = 0x8848, // 10 001 0000 1001 000 A64SysReg_TRCSTALLCTLR = 0x8858, // 10 001 0000 1011 000 A64SysReg_TRCTSCTLR = 0x8860, // 10 001 0000 1100 000 A64SysReg_TRCSYNCPR = 0x8868, // 10 001 0000 1101 000 A64SysReg_TRCCCCTLR = 0x8870, // 10 001 0000 1110 000 A64SysReg_TRCBBCTLR = 0x8878, // 10 001 0000 1111 000 A64SysReg_TRCTRACEIDR = 0x8801, // 10 001 0000 0000 001 A64SysReg_TRCQCTLR = 0x8809, // 10 001 0000 0001 001 A64SysReg_TRCVICTLR = 0x8802, // 10 001 0000 0000 010 A64SysReg_TRCVIIECTLR = 0x880a, // 10 001 0000 0001 010 A64SysReg_TRCVISSCTLR = 0x8812, // 10 001 0000 0010 010 A64SysReg_TRCVIPCSSCTLR = 0x881a, // 10 001 0000 0011 010 A64SysReg_TRCVDCTLR = 0x8842, // 10 001 0000 1000 010 A64SysReg_TRCVDSACCTLR = 0x884a, // 10 001 0000 1001 010 A64SysReg_TRCVDARCCTLR = 0x8852, // 10 001 0000 1010 010 A64SysReg_TRCSEQEVR0 = 0x8804, // 10 001 0000 0000 100 A64SysReg_TRCSEQEVR1 = 0x880c, // 10 001 0000 0001 100 A64SysReg_TRCSEQEVR2 = 0x8814, // 10 001 0000 0010 100 A64SysReg_TRCSEQRSTEVR = 0x8834, // 10 001 0000 0110 100 A64SysReg_TRCSEQSTR = 0x883c, // 10 001 0000 0111 100 A64SysReg_TRCEXTINSELR = 0x8844, // 10 001 0000 1000 100 A64SysReg_TRCCNTRLDVR0 = 0x8805, // 10 001 0000 0000 101 A64SysReg_TRCCNTRLDVR1 = 0x880d, // 10 001 0000 0001 101 A64SysReg_TRCCNTRLDVR2 = 0x8815, // 10 001 0000 0010 101 A64SysReg_TRCCNTRLDVR3 = 0x881d, // 10 001 0000 0011 101 A64SysReg_TRCCNTCTLR0 = 0x8825, // 10 001 0000 0100 101 A64SysReg_TRCCNTCTLR1 = 0x882d, // 10 001 0000 0101 101 A64SysReg_TRCCNTCTLR2 = 0x8835, // 10 001 0000 0110 101 A64SysReg_TRCCNTCTLR3 = 0x883d, // 10 001 0000 0111 101 A64SysReg_TRCCNTVR0 = 0x8845, // 10 001 0000 1000 101 A64SysReg_TRCCNTVR1 = 0x884d, // 10 001 0000 1001 101 A64SysReg_TRCCNTVR2 = 0x8855, // 10 001 0000 1010 101 A64SysReg_TRCCNTVR3 = 0x885d, // 10 001 0000 1011 101 A64SysReg_TRCIMSPEC0 = 0x8807, // 10 001 0000 0000 111 A64SysReg_TRCIMSPEC1 = 0x880f, // 10 001 0000 0001 111 A64SysReg_TRCIMSPEC2 = 0x8817, // 10 001 0000 0010 111 A64SysReg_TRCIMSPEC3 = 0x881f, // 10 001 0000 0011 111 A64SysReg_TRCIMSPEC4 = 0x8827, // 10 001 0000 0100 111 A64SysReg_TRCIMSPEC5 = 0x882f, // 10 001 0000 0101 111 A64SysReg_TRCIMSPEC6 = 0x8837, // 10 001 0000 0110 111 A64SysReg_TRCIMSPEC7 = 0x883f, // 10 001 0000 0111 111 A64SysReg_TRCRSCTLR2 = 0x8890, // 10 001 0001 0010 000 A64SysReg_TRCRSCTLR3 = 0x8898, // 10 001 0001 0011 000 A64SysReg_TRCRSCTLR4 = 0x88a0, // 10 001 0001 0100 000 A64SysReg_TRCRSCTLR5 = 0x88a8, // 10 001 0001 0101 000 A64SysReg_TRCRSCTLR6 = 0x88b0, // 10 001 0001 0110 000 A64SysReg_TRCRSCTLR7 = 0x88b8, // 10 001 0001 0111 000 A64SysReg_TRCRSCTLR8 = 0x88c0, // 10 001 0001 1000 000 A64SysReg_TRCRSCTLR9 = 0x88c8, // 10 001 0001 1001 000 A64SysReg_TRCRSCTLR10 = 0x88d0, // 10 001 0001 1010 000 A64SysReg_TRCRSCTLR11 = 0x88d8, // 10 001 0001 1011 000 A64SysReg_TRCRSCTLR12 = 0x88e0, // 10 001 0001 1100 000 A64SysReg_TRCRSCTLR13 = 0x88e8, // 10 001 0001 1101 000 A64SysReg_TRCRSCTLR14 = 0x88f0, // 10 001 0001 1110 000 A64SysReg_TRCRSCTLR15 = 0x88f8, // 10 001 0001 1111 000 A64SysReg_TRCRSCTLR16 = 0x8881, // 10 001 0001 0000 001 A64SysReg_TRCRSCTLR17 = 0x8889, // 10 001 0001 0001 001 A64SysReg_TRCRSCTLR18 = 0x8891, // 10 001 0001 0010 001 A64SysReg_TRCRSCTLR19 = 0x8899, // 10 001 0001 0011 001 A64SysReg_TRCRSCTLR20 = 0x88a1, // 10 001 0001 0100 001 A64SysReg_TRCRSCTLR21 = 0x88a9, // 10 001 0001 0101 001 A64SysReg_TRCRSCTLR22 = 0x88b1, // 10 001 0001 0110 001 A64SysReg_TRCRSCTLR23 = 0x88b9, // 10 001 0001 0111 001 A64SysReg_TRCRSCTLR24 = 0x88c1, // 10 001 0001 1000 001 A64SysReg_TRCRSCTLR25 = 0x88c9, // 10 001 0001 1001 001 A64SysReg_TRCRSCTLR26 = 0x88d1, // 10 001 0001 1010 001 A64SysReg_TRCRSCTLR27 = 0x88d9, // 10 001 0001 1011 001 A64SysReg_TRCRSCTLR28 = 0x88e1, // 10 001 0001 1100 001 A64SysReg_TRCRSCTLR29 = 0x88e9, // 10 001 0001 1101 001 A64SysReg_TRCRSCTLR30 = 0x88f1, // 10 001 0001 1110 001 A64SysReg_TRCRSCTLR31 = 0x88f9, // 10 001 0001 1111 001 A64SysReg_TRCSSCCR0 = 0x8882, // 10 001 0001 0000 010 A64SysReg_TRCSSCCR1 = 0x888a, // 10 001 0001 0001 010 A64SysReg_TRCSSCCR2 = 0x8892, // 10 001 0001 0010 010 A64SysReg_TRCSSCCR3 = 0x889a, // 10 001 0001 0011 010 A64SysReg_TRCSSCCR4 = 0x88a2, // 10 001 0001 0100 010 A64SysReg_TRCSSCCR5 = 0x88aa, // 10 001 0001 0101 010 A64SysReg_TRCSSCCR6 = 0x88b2, // 10 001 0001 0110 010 A64SysReg_TRCSSCCR7 = 0x88ba, // 10 001 0001 0111 010 A64SysReg_TRCSSCSR0 = 0x88c2, // 10 001 0001 1000 010 A64SysReg_TRCSSCSR1 = 0x88ca, // 10 001 0001 1001 010 A64SysReg_TRCSSCSR2 = 0x88d2, // 10 001 0001 1010 010 A64SysReg_TRCSSCSR3 = 0x88da, // 10 001 0001 1011 010 A64SysReg_TRCSSCSR4 = 0x88e2, // 10 001 0001 1100 010 A64SysReg_TRCSSCSR5 = 0x88ea, // 10 001 0001 1101 010 A64SysReg_TRCSSCSR6 = 0x88f2, // 10 001 0001 1110 010 A64SysReg_TRCSSCSR7 = 0x88fa, // 10 001 0001 1111 010 A64SysReg_TRCSSPCICR0 = 0x8883, // 10 001 0001 0000 011 A64SysReg_TRCSSPCICR1 = 0x888b, // 10 001 0001 0001 011 A64SysReg_TRCSSPCICR2 = 0x8893, // 10 001 0001 0010 011 A64SysReg_TRCSSPCICR3 = 0x889b, // 10 001 0001 0011 011 A64SysReg_TRCSSPCICR4 = 0x88a3, // 10 001 0001 0100 011 A64SysReg_TRCSSPCICR5 = 0x88ab, // 10 001 0001 0101 011 A64SysReg_TRCSSPCICR6 = 0x88b3, // 10 001 0001 0110 011 A64SysReg_TRCSSPCICR7 = 0x88bb, // 10 001 0001 0111 011 A64SysReg_TRCPDCR = 0x88a4, // 10 001 0001 0100 100 A64SysReg_TRCACVR0 = 0x8900, // 10 001 0010 0000 000 A64SysReg_TRCACVR1 = 0x8910, // 10 001 0010 0010 000 A64SysReg_TRCACVR2 = 0x8920, // 10 001 0010 0100 000 A64SysReg_TRCACVR3 = 0x8930, // 10 001 0010 0110 000 A64SysReg_TRCACVR4 = 0x8940, // 10 001 0010 1000 000 A64SysReg_TRCACVR5 = 0x8950, // 10 001 0010 1010 000 A64SysReg_TRCACVR6 = 0x8960, // 10 001 0010 1100 000 A64SysReg_TRCACVR7 = 0x8970, // 10 001 0010 1110 000 A64SysReg_TRCACVR8 = 0x8901, // 10 001 0010 0000 001 A64SysReg_TRCACVR9 = 0x8911, // 10 001 0010 0010 001 A64SysReg_TRCACVR10 = 0x8921, // 10 001 0010 0100 001 A64SysReg_TRCACVR11 = 0x8931, // 10 001 0010 0110 001 A64SysReg_TRCACVR12 = 0x8941, // 10 001 0010 1000 001 A64SysReg_TRCACVR13 = 0x8951, // 10 001 0010 1010 001 A64SysReg_TRCACVR14 = 0x8961, // 10 001 0010 1100 001 A64SysReg_TRCACVR15 = 0x8971, // 10 001 0010 1110 001 A64SysReg_TRCACATR0 = 0x8902, // 10 001 0010 0000 010 A64SysReg_TRCACATR1 = 0x8912, // 10 001 0010 0010 010 A64SysReg_TRCACATR2 = 0x8922, // 10 001 0010 0100 010 A64SysReg_TRCACATR3 = 0x8932, // 10 001 0010 0110 010 A64SysReg_TRCACATR4 = 0x8942, // 10 001 0010 1000 010 A64SysReg_TRCACATR5 = 0x8952, // 10 001 0010 1010 010 A64SysReg_TRCACATR6 = 0x8962, // 10 001 0010 1100 010 A64SysReg_TRCACATR7 = 0x8972, // 10 001 0010 1110 010 A64SysReg_TRCACATR8 = 0x8903, // 10 001 0010 0000 011 A64SysReg_TRCACATR9 = 0x8913, // 10 001 0010 0010 011 A64SysReg_TRCACATR10 = 0x8923, // 10 001 0010 0100 011 A64SysReg_TRCACATR11 = 0x8933, // 10 001 0010 0110 011 A64SysReg_TRCACATR12 = 0x8943, // 10 001 0010 1000 011 A64SysReg_TRCACATR13 = 0x8953, // 10 001 0010 1010 011 A64SysReg_TRCACATR14 = 0x8963, // 10 001 0010 1100 011 A64SysReg_TRCACATR15 = 0x8973, // 10 001 0010 1110 011 A64SysReg_TRCDVCVR0 = 0x8904, // 10 001 0010 0000 100 A64SysReg_TRCDVCVR1 = 0x8924, // 10 001 0010 0100 100 A64SysReg_TRCDVCVR2 = 0x8944, // 10 001 0010 1000 100 A64SysReg_TRCDVCVR3 = 0x8964, // 10 001 0010 1100 100 A64SysReg_TRCDVCVR4 = 0x8905, // 10 001 0010 0000 101 A64SysReg_TRCDVCVR5 = 0x8925, // 10 001 0010 0100 101 A64SysReg_TRCDVCVR6 = 0x8945, // 10 001 0010 1000 101 A64SysReg_TRCDVCVR7 = 0x8965, // 10 001 0010 1100 101 A64SysReg_TRCDVCMR0 = 0x8906, // 10 001 0010 0000 110 A64SysReg_TRCDVCMR1 = 0x8926, // 10 001 0010 0100 110 A64SysReg_TRCDVCMR2 = 0x8946, // 10 001 0010 1000 110 A64SysReg_TRCDVCMR3 = 0x8966, // 10 001 0010 1100 110 A64SysReg_TRCDVCMR4 = 0x8907, // 10 001 0010 0000 111 A64SysReg_TRCDVCMR5 = 0x8927, // 10 001 0010 0100 111 A64SysReg_TRCDVCMR6 = 0x8947, // 10 001 0010 1000 111 A64SysReg_TRCDVCMR7 = 0x8967, // 10 001 0010 1100 111 A64SysReg_TRCCIDCVR0 = 0x8980, // 10 001 0011 0000 000 A64SysReg_TRCCIDCVR1 = 0x8990, // 10 001 0011 0010 000 A64SysReg_TRCCIDCVR2 = 0x89a0, // 10 001 0011 0100 000 A64SysReg_TRCCIDCVR3 = 0x89b0, // 10 001 0011 0110 000 A64SysReg_TRCCIDCVR4 = 0x89c0, // 10 001 0011 1000 000 A64SysReg_TRCCIDCVR5 = 0x89d0, // 10 001 0011 1010 000 A64SysReg_TRCCIDCVR6 = 0x89e0, // 10 001 0011 1100 000 A64SysReg_TRCCIDCVR7 = 0x89f0, // 10 001 0011 1110 000 A64SysReg_TRCVMIDCVR0 = 0x8981, // 10 001 0011 0000 001 A64SysReg_TRCVMIDCVR1 = 0x8991, // 10 001 0011 0010 001 A64SysReg_TRCVMIDCVR2 = 0x89a1, // 10 001 0011 0100 001 A64SysReg_TRCVMIDCVR3 = 0x89b1, // 10 001 0011 0110 001 A64SysReg_TRCVMIDCVR4 = 0x89c1, // 10 001 0011 1000 001 A64SysReg_TRCVMIDCVR5 = 0x89d1, // 10 001 0011 1010 001 A64SysReg_TRCVMIDCVR6 = 0x89e1, // 10 001 0011 1100 001 A64SysReg_TRCVMIDCVR7 = 0x89f1, // 10 001 0011 1110 001 A64SysReg_TRCCIDCCTLR0 = 0x8982, // 10 001 0011 0000 010 A64SysReg_TRCCIDCCTLR1 = 0x898a, // 10 001 0011 0001 010 A64SysReg_TRCVMIDCCTLR0 = 0x8992, // 10 001 0011 0010 010 A64SysReg_TRCVMIDCCTLR1 = 0x899a, // 10 001 0011 0011 010 A64SysReg_TRCITCTRL = 0x8b84, // 10 001 0111 0000 100 A64SysReg_TRCCLAIMSET = 0x8bc6, // 10 001 0111 1000 110 A64SysReg_TRCCLAIMCLR = 0x8bce, // 10 001 0111 1001 110 // GICv3 registers A64SysReg_ICC_BPR1_EL1 = 0xc663, // 11 000 1100 1100 011 A64SysReg_ICC_BPR0_EL1 = 0xc643, // 11 000 1100 1000 011 A64SysReg_ICC_PMR_EL1 = 0xc230, // 11 000 0100 0110 000 A64SysReg_ICC_CTLR_EL1 = 0xc664, // 11 000 1100 1100 100 A64SysReg_ICC_CTLR_EL3 = 0xf664, // 11 110 1100 1100 100 A64SysReg_ICC_SRE_EL1 = 0xc665, // 11 000 1100 1100 101 A64SysReg_ICC_SRE_EL2 = 0xe64d, // 11 100 1100 1001 101 A64SysReg_ICC_SRE_EL3 = 0xf665, // 11 110 1100 1100 101 A64SysReg_ICC_IGRPEN0_EL1 = 0xc666, // 11 000 1100 1100 110 A64SysReg_ICC_IGRPEN1_EL1 = 0xc667, // 11 000 1100 1100 111 A64SysReg_ICC_IGRPEN1_EL3 = 0xf667, // 11 110 1100 1100 111 A64SysReg_ICC_SEIEN_EL1 = 0xc668, // 11 000 1100 1101 000 A64SysReg_ICC_AP0R0_EL1 = 0xc644, // 11 000 1100 1000 100 A64SysReg_ICC_AP0R1_EL1 = 0xc645, // 11 000 1100 1000 101 A64SysReg_ICC_AP0R2_EL1 = 0xc646, // 11 000 1100 1000 110 A64SysReg_ICC_AP0R3_EL1 = 0xc647, // 11 000 1100 1000 111 A64SysReg_ICC_AP1R0_EL1 = 0xc648, // 11 000 1100 1001 000 A64SysReg_ICC_AP1R1_EL1 = 0xc649, // 11 000 1100 1001 001 A64SysReg_ICC_AP1R2_EL1 = 0xc64a, // 11 000 1100 1001 010 A64SysReg_ICC_AP1R3_EL1 = 0xc64b, // 11 000 1100 1001 011 A64SysReg_ICH_AP0R0_EL2 = 0xe640, // 11 100 1100 1000 000 A64SysReg_ICH_AP0R1_EL2 = 0xe641, // 11 100 1100 1000 001 A64SysReg_ICH_AP0R2_EL2 = 0xe642, // 11 100 1100 1000 010 A64SysReg_ICH_AP0R3_EL2 = 0xe643, // 11 100 1100 1000 011 A64SysReg_ICH_AP1R0_EL2 = 0xe648, // 11 100 1100 1001 000 A64SysReg_ICH_AP1R1_EL2 = 0xe649, // 11 100 1100 1001 001 A64SysReg_ICH_AP1R2_EL2 = 0xe64a, // 11 100 1100 1001 010 A64SysReg_ICH_AP1R3_EL2 = 0xe64b, // 11 100 1100 1001 011 A64SysReg_ICH_HCR_EL2 = 0xe658, // 11 100 1100 1011 000 A64SysReg_ICH_MISR_EL2 = 0xe65a, // 11 100 1100 1011 010 A64SysReg_ICH_VMCR_EL2 = 0xe65f, // 11 100 1100 1011 111 A64SysReg_ICH_VSEIR_EL2 = 0xe64c, // 11 100 1100 1001 100 A64SysReg_ICH_LR0_EL2 = 0xe660, // 11 100 1100 1100 000 A64SysReg_ICH_LR1_EL2 = 0xe661, // 11 100 1100 1100 001 A64SysReg_ICH_LR2_EL2 = 0xe662, // 11 100 1100 1100 010 A64SysReg_ICH_LR3_EL2 = 0xe663, // 11 100 1100 1100 011 A64SysReg_ICH_LR4_EL2 = 0xe664, // 11 100 1100 1100 100 A64SysReg_ICH_LR5_EL2 = 0xe665, // 11 100 1100 1100 101 A64SysReg_ICH_LR6_EL2 = 0xe666, // 11 100 1100 1100 110 A64SysReg_ICH_LR7_EL2 = 0xe667, // 11 100 1100 1100 111 A64SysReg_ICH_LR8_EL2 = 0xe668, // 11 100 1100 1101 000 A64SysReg_ICH_LR9_EL2 = 0xe669, // 11 100 1100 1101 001 A64SysReg_ICH_LR10_EL2 = 0xe66a, // 11 100 1100 1101 010 A64SysReg_ICH_LR11_EL2 = 0xe66b, // 11 100 1100 1101 011 A64SysReg_ICH_LR12_EL2 = 0xe66c, // 11 100 1100 1101 100 A64SysReg_ICH_LR13_EL2 = 0xe66d, // 11 100 1100 1101 101 A64SysReg_ICH_LR14_EL2 = 0xe66e, // 11 100 1100 1101 110 A64SysReg_ICH_LR15_EL2 = 0xe66f, // 11 100 1100 1101 111 // Statistical profiling registers A64SysReg_PMSIDR_EL1 = 0xc4cf, // 11 000 1001 1001 111 A64SysReg_PMBIDR_EL1 = 0xc4d7, // 11 000 1001 1010 111 A64SysReg_PMBLIMITR_EL1 = 0xc4d0, // 11 000 1001 1010 000 A64SysReg_PMBPTR_EL1 = 0xc4d1, // 11 000 1001 1010 001 A64SysReg_PMBSR_EL1 = 0xc4d3, // 11 000 1001 1010 011 A64SysReg_PMSCR_EL1 = 0xc4c8, // 11 000 1001 1001 000 A64SysReg_PMSCR_EL12 = 0xecc8, // 11 101 1001 1001 000 A64SysReg_PMSCR_EL2 = 0xe4c8, // 11 100 1001 1001 000 A64SysReg_PMSICR_EL1 = 0xc4ca, // 11 000 1001 1001 010 A64SysReg_PMSIRR_EL1 = 0xc4cb, // 11 000 1001 1001 011 A64SysReg_PMSFCR_EL1 = 0xc4cc, // 11 000 1001 1001 100 A64SysReg_PMSEVFR_EL1 = 0xc4cd, // 11 000 1001 1001 101 A64SysReg_PMSLATFR_EL1 = 0xc4ce // 11 000 1001 1001 110 }; // Cyclone specific system registers enum A64CycloneSysRegValues { A64SysReg_CPM_IOACC_CTL_EL3 = 0xff90 }; enum A64TLBIValues { A64TLBI_Invalid = -1, // Op0 Op1 CRn CRm Op2 A64TLBI_IPAS2E1IS = 0x6401, // 01 100 1000 0000 001 A64TLBI_IPAS2LE1IS = 0x6405, // 01 100 1000 0000 101 A64TLBI_VMALLE1IS = 0x4418, // 01 000 1000 0011 000 A64TLBI_ALLE2IS = 0x6418, // 01 100 1000 0011 000 A64TLBI_ALLE3IS = 0x7418, // 01 110 1000 0011 000 A64TLBI_VAE1IS = 0x4419, // 01 000 1000 0011 001 A64TLBI_VAE2IS = 0x6419, // 01 100 1000 0011 001 A64TLBI_VAE3IS = 0x7419, // 01 110 1000 0011 001 A64TLBI_ASIDE1IS = 0x441a, // 01 000 1000 0011 010 A64TLBI_VAAE1IS = 0x441b, // 01 000 1000 0011 011 A64TLBI_ALLE1IS = 0x641c, // 01 100 1000 0011 100 A64TLBI_VALE1IS = 0x441d, // 01 000 1000 0011 101 A64TLBI_VALE2IS = 0x641d, // 01 100 1000 0011 101 A64TLBI_VALE3IS = 0x741d, // 01 110 1000 0011 101 A64TLBI_VMALLS12E1IS = 0x641e, // 01 100 1000 0011 110 A64TLBI_VAALE1IS = 0x441f, // 01 000 1000 0011 111 A64TLBI_IPAS2E1 = 0x6421, // 01 100 1000 0100 001 A64TLBI_IPAS2LE1 = 0x6425, // 01 100 1000 0100 101 A64TLBI_VMALLE1 = 0x4438, // 01 000 1000 0111 000 A64TLBI_ALLE2 = 0x6438, // 01 100 1000 0111 000 A64TLBI_ALLE3 = 0x7438, // 01 110 1000 0111 000 A64TLBI_VAE1 = 0x4439, // 01 000 1000 0111 001 A64TLBI_VAE2 = 0x6439, // 01 100 1000 0111 001 A64TLBI_VAE3 = 0x7439, // 01 110 1000 0111 001 A64TLBI_ASIDE1 = 0x443a, // 01 000 1000 0111 010 A64TLBI_VAAE1 = 0x443b, // 01 000 1000 0111 011 A64TLBI_ALLE1 = 0x643c, // 01 100 1000 0111 100 A64TLBI_VALE1 = 0x443d, // 01 000 1000 0111 101 A64TLBI_VALE2 = 0x643d, // 01 100 1000 0111 101 A64TLBI_VALE3 = 0x743d, // 01 110 1000 0111 101 A64TLBI_VMALLS12E1 = 0x643e, // 01 100 1000 0111 110 A64TLBI_VAALE1 = 0x443f // 01 000 1000 0111 111 }; bool A64Imms_isLogicalImmBits(unsigned RegWidth, uint32_t Bits, uint64_t *Imm); const char *A64NamedImmMapper_toString(const A64NamedImmMapper *N, uint32_t Value, bool *Valid); uint32_t A64NamedImmMapper_fromString(const A64NamedImmMapper *N, char *Name, bool *Valid); bool A64NamedImmMapper_validImm(const A64NamedImmMapper *N, uint32_t Value); void A64SysRegMapper_toString(const A64SysRegMapper *S, uint32_t Bits, char *result); #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64Disassembler.c010066400017500001750000001377521363402546700222100ustar0000000000000000//===- AArch64Disassembler.cpp - Disassembler for AArch64 ISA -------------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the functions necessary to decode AArch64 instruction // bitpatterns into MCInsts (with the help of TableGenerated information from // the instruction definitions). // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_ARM64 #include // DEBUG #include #include "../../cs_priv.h" #include "../../utils.h" #include "AArch64Disassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" #include "AArch64BaseInfo.h" #include "AArch64AddressingModes.h" // Forward declare these because the autogenerated code will reference them. // Definitions are further down. static DecodeStatus DecodeFPR128RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFPR128_loRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPR64spRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPR32spRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeQQRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeQQQRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeQQQQRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDDRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFixedPointScaleImm32(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFixedPointScaleImm64(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder); static DecodeStatus DecodePCRelLabel19(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMemExtend(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMRSSystemRegister(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMSRSystemRegister(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThreeAddrSRegInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMoveImmInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeUnsignedLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSignedLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeExclusiveLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodePairLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddSubERegInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLogicalImmInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeModImmInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeModImmTiedInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAdrInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeBaseAddSubImm(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeUnconditionalBranch(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSystemPStateInstruction(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeTestAndBranch(MCInst *Inst, uint32_t insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeFMOVLaneInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVecShiftR64Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftR64ImmNarrow(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftR32Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftR32ImmNarrow(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftR16Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftR16ImmNarrow(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftR8Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftL64Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftL32Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftL16Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static DecodeStatus DecodeVecShiftL8Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder); static bool Check(DecodeStatus *Out, DecodeStatus In) { switch (In) { default: // never reach return true; case MCDisassembler_Success: // Out stays the same. return true; case MCDisassembler_SoftFail: *Out = In; return true; case MCDisassembler_Fail: *Out = In; return false; } // llvm_unreachable("Invalid DecodeStatus!"); } // Hacky: enable all features for disassembler static uint64_t getFeatureBits(int feature) { // enable all features return (uint64_t)-1; } #define GET_SUBTARGETINFO_ENUM #include "AArch64GenSubtargetInfo.inc" #include "AArch64GenDisassemblerTables.inc" #define GET_INSTRINFO_ENUM #include "AArch64GenInstrInfo.inc" #define GET_REGINFO_ENUM #define GET_REGINFO_MC_DESC #include "AArch64GenRegisterInfo.inc" #define Success MCDisassembler_Success #define Fail MCDisassembler_Fail #define SoftFail MCDisassembler_SoftFail static DecodeStatus _getInstruction(cs_struct *ud, MCInst *MI, const uint8_t *code, size_t code_len, uint16_t *Size, uint64_t Address, MCRegisterInfo *MRI) { uint32_t insn; DecodeStatus result; size_t i; if (code_len < 4) { // not enough data *Size = 0; return MCDisassembler_Fail; } if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, arm64)+sizeof(cs_arm64)); for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm64.operands); i++) MI->flat_insn->detail->arm64.operands[i].vector_index = -1; } if (MODE_IS_BIG_ENDIAN(ud->mode)) insn = (code[3] << 0) | (code[2] << 8) | (code[1] << 16) | ((uint32_t) code[0] << 24); else insn = ((uint32_t) code[3] << 24) | (code[2] << 16) | (code[1] << 8) | (code[0] << 0); // Calling the auto-generated decoder function. result = decodeInstruction(DecoderTable32, MI, insn, Address, MRI, 0); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); *Size = 0; return MCDisassembler_Fail; } bool AArch64_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info) { DecodeStatus status = _getInstruction((cs_struct *)ud, instr, code, code_len, size, address, (MCRegisterInfo *)info); return status == MCDisassembler_Success; } static const unsigned FPR128DecoderTable[] = { AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4, AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9, AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14, AArch64_Q15, AArch64_Q16, AArch64_Q17, AArch64_Q18, AArch64_Q19, AArch64_Q20, AArch64_Q21, AArch64_Q22, AArch64_Q23, AArch64_Q24, AArch64_Q25, AArch64_Q26, AArch64_Q27, AArch64_Q28, AArch64_Q29, AArch64_Q30, AArch64_Q31 }; static DecodeStatus DecodeFPR128RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = FPR128DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static DecodeStatus DecodeFPR128_loRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { if (RegNo > 15) return Fail; return DecodeFPR128RegisterClass(Inst, RegNo, Addr, Decoder); } static const unsigned FPR64DecoderTable[] = { AArch64_D0, AArch64_D1, AArch64_D2, AArch64_D3, AArch64_D4, AArch64_D5, AArch64_D6, AArch64_D7, AArch64_D8, AArch64_D9, AArch64_D10, AArch64_D11, AArch64_D12, AArch64_D13, AArch64_D14, AArch64_D15, AArch64_D16, AArch64_D17, AArch64_D18, AArch64_D19, AArch64_D20, AArch64_D21, AArch64_D22, AArch64_D23, AArch64_D24, AArch64_D25, AArch64_D26, AArch64_D27, AArch64_D28, AArch64_D29, AArch64_D30, AArch64_D31 }; static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = FPR64DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned FPR32DecoderTable[] = { AArch64_S0, AArch64_S1, AArch64_S2, AArch64_S3, AArch64_S4, AArch64_S5, AArch64_S6, AArch64_S7, AArch64_S8, AArch64_S9, AArch64_S10, AArch64_S11, AArch64_S12, AArch64_S13, AArch64_S14, AArch64_S15, AArch64_S16, AArch64_S17, AArch64_S18, AArch64_S19, AArch64_S20, AArch64_S21, AArch64_S22, AArch64_S23, AArch64_S24, AArch64_S25, AArch64_S26, AArch64_S27, AArch64_S28, AArch64_S29, AArch64_S30, AArch64_S31 }; static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = FPR32DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned FPR16DecoderTable[] = { AArch64_H0, AArch64_H1, AArch64_H2, AArch64_H3, AArch64_H4, AArch64_H5, AArch64_H6, AArch64_H7, AArch64_H8, AArch64_H9, AArch64_H10, AArch64_H11, AArch64_H12, AArch64_H13, AArch64_H14, AArch64_H15, AArch64_H16, AArch64_H17, AArch64_H18, AArch64_H19, AArch64_H20, AArch64_H21, AArch64_H22, AArch64_H23, AArch64_H24, AArch64_H25, AArch64_H26, AArch64_H27, AArch64_H28, AArch64_H29, AArch64_H30, AArch64_H31 }; static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = FPR16DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned FPR8DecoderTable[] = { AArch64_B0, AArch64_B1, AArch64_B2, AArch64_B3, AArch64_B4, AArch64_B5, AArch64_B6, AArch64_B7, AArch64_B8, AArch64_B9, AArch64_B10, AArch64_B11, AArch64_B12, AArch64_B13, AArch64_B14, AArch64_B15, AArch64_B16, AArch64_B17, AArch64_B18, AArch64_B19, AArch64_B20, AArch64_B21, AArch64_B22, AArch64_B23, AArch64_B24, AArch64_B25, AArch64_B26, AArch64_B27, AArch64_B28, AArch64_B29, AArch64_B30, AArch64_B31 }; static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = FPR8DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned GPR64DecoderTable[] = { AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_XZR }; static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = GPR64DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static DecodeStatus DecodeGPR64spRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = GPR64DecoderTable[RegNo]; if (Register == AArch64_XZR) Register = AArch64_SP; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned GPR32DecoderTable[] = { AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WZR }; static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = GPR32DecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static DecodeStatus DecodeGPR32spRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = GPR32DecoderTable[RegNo]; if (Register == AArch64_WZR) Register = AArch64_WSP; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned VectorDecoderTable[] = { AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4, AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9, AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14, AArch64_Q15, AArch64_Q16, AArch64_Q17, AArch64_Q18, AArch64_Q19, AArch64_Q20, AArch64_Q21, AArch64_Q22, AArch64_Q23, AArch64_Q24, AArch64_Q25, AArch64_Q26, AArch64_Q27, AArch64_Q28, AArch64_Q29, AArch64_Q30, AArch64_Q31 }; static DecodeStatus DecodeVectorRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = VectorDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned QQDecoderTable[] = { AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16, AArch64_Q16_Q17, AArch64_Q17_Q18, AArch64_Q18_Q19, AArch64_Q19_Q20, AArch64_Q20_Q21, AArch64_Q21_Q22, AArch64_Q22_Q23, AArch64_Q23_Q24, AArch64_Q24_Q25, AArch64_Q25_Q26, AArch64_Q26_Q27, AArch64_Q27_Q28, AArch64_Q28_Q29, AArch64_Q29_Q30, AArch64_Q30_Q31, AArch64_Q31_Q0 }; static DecodeStatus DecodeQQRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = QQDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned QQQDecoderTable[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17, AArch64_Q16_Q17_Q18, AArch64_Q17_Q18_Q19, AArch64_Q18_Q19_Q20, AArch64_Q19_Q20_Q21, AArch64_Q20_Q21_Q22, AArch64_Q21_Q22_Q23, AArch64_Q22_Q23_Q24, AArch64_Q23_Q24_Q25, AArch64_Q24_Q25_Q26, AArch64_Q25_Q26_Q27, AArch64_Q26_Q27_Q28, AArch64_Q27_Q28_Q29, AArch64_Q28_Q29_Q30, AArch64_Q29_Q30_Q31, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1 }; static DecodeStatus DecodeQQQRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = QQQDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned QQQQDecoderTable[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18, AArch64_Q16_Q17_Q18_Q19, AArch64_Q17_Q18_Q19_Q20, AArch64_Q18_Q19_Q20_Q21, AArch64_Q19_Q20_Q21_Q22, AArch64_Q20_Q21_Q22_Q23, AArch64_Q21_Q22_Q23_Q24, AArch64_Q22_Q23_Q24_Q25, AArch64_Q23_Q24_Q25_Q26, AArch64_Q24_Q25_Q26_Q27, AArch64_Q25_Q26_Q27_Q28, AArch64_Q26_Q27_Q28_Q29, AArch64_Q27_Q28_Q29_Q30, AArch64_Q28_Q29_Q30_Q31, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2 }; static DecodeStatus DecodeQQQQRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = QQQQDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned DDDecoderTable[] = { AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4, AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8, AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12, AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15, AArch64_D15_D16, AArch64_D16_D17, AArch64_D17_D18, AArch64_D18_D19, AArch64_D19_D20, AArch64_D20_D21, AArch64_D21_D22, AArch64_D22_D23, AArch64_D23_D24, AArch64_D24_D25, AArch64_D25_D26, AArch64_D26_D27, AArch64_D27_D28, AArch64_D28_D29, AArch64_D29_D30, AArch64_D30_D31, AArch64_D31_D0 }; static DecodeStatus DecodeDDRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = DDDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned DDDDecoderTable[] = { AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16, AArch64_D15_D16_D17, AArch64_D16_D17_D18, AArch64_D17_D18_D19, AArch64_D18_D19_D20, AArch64_D19_D20_D21, AArch64_D20_D21_D22, AArch64_D21_D22_D23, AArch64_D22_D23_D24, AArch64_D23_D24_D25, AArch64_D24_D25_D26, AArch64_D25_D26_D27, AArch64_D26_D27_D28, AArch64_D27_D28_D29, AArch64_D28_D29_D30, AArch64_D29_D30_D31, AArch64_D30_D31_D0, AArch64_D31_D0_D1 }; static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = DDDDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static const unsigned DDDDDecoderTable[] = { AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17, AArch64_D15_D16_D17_D18, AArch64_D16_D17_D18_D19, AArch64_D17_D18_D19_D20, AArch64_D18_D19_D20_D21, AArch64_D19_D20_D21_D22, AArch64_D20_D21_D22_D23, AArch64_D21_D22_D23_D24, AArch64_D22_D23_D24_D25, AArch64_D23_D24_D25_D26, AArch64_D24_D25_D26_D27, AArch64_D25_D26_D27_D28, AArch64_D26_D27_D28_D29, AArch64_D27_D28_D29_D30, AArch64_D28_D29_D30_D31, AArch64_D29_D30_D31_D0, AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2 }; static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) { unsigned Register; if (RegNo > 31) return Fail; Register = DDDDDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return Success; } static DecodeStatus DecodeFixedPointScaleImm32(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { // scale{5} is asserted as 1 in tblgen. Imm |= 0x20; MCOperand_CreateImm0(Inst, 64 - Imm); return Success; } static DecodeStatus DecodeFixedPointScaleImm64(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { MCOperand_CreateImm0(Inst, 64 - Imm); return Success; } static DecodeStatus DecodePCRelLabel19(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { int64_t ImmVal = Imm; // Sign-extend 19-bit immediate. if (ImmVal & (1 << (19 - 1))) ImmVal |= ~((1LL << 19) - 1); MCOperand_CreateImm0(Inst, ImmVal); return Success; } static DecodeStatus DecodeMemExtend(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, (Imm >> 1) & 1); MCOperand_CreateImm0(Inst, Imm & 1); return Success; } static DecodeStatus DecodeMRSSystemRegister(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, Imm); // Every system register in the encoding space is valid with the syntax // S____, so decoding system registers always succeeds. return Success; } static DecodeStatus DecodeMSRSystemRegister(MCInst *Inst, unsigned Imm, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, Imm); return Success; } static DecodeStatus DecodeFMOVLaneInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { // This decoder exists to add the dummy Lane operand to the MCInst, which must // be 1 in assembly but has no other real manifestation. unsigned Rd = fieldFromInstruction(Insn, 0, 5); unsigned Rn = fieldFromInstruction(Insn, 5, 5); unsigned IsToVec = fieldFromInstruction(Insn, 16, 1); if (IsToVec) { DecodeFPR128RegisterClass(Inst, Rd, Address, Decoder); DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder); } else { DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder); DecodeFPR128RegisterClass(Inst, Rn, Address, Decoder); } // Add the lane MCOperand_CreateImm0(Inst, 1); return Success; } static DecodeStatus DecodeVecShiftRImm(MCInst *Inst, unsigned Imm, unsigned Add) { MCOperand_CreateImm0(Inst, Add - Imm); return Success; } static DecodeStatus DecodeVecShiftLImm(MCInst *Inst, unsigned Imm, unsigned Add) { MCOperand_CreateImm0(Inst, (Imm + Add) & (Add - 1)); return Success; } static DecodeStatus DecodeVecShiftR64Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm, 64); } static DecodeStatus DecodeVecShiftR64ImmNarrow(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm | 0x20, 64); } static DecodeStatus DecodeVecShiftR32Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm, 32); } static DecodeStatus DecodeVecShiftR32ImmNarrow(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm | 0x10, 32); } static DecodeStatus DecodeVecShiftR16Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm, 16); } static DecodeStatus DecodeVecShiftR16ImmNarrow(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm | 0x8, 16); } static DecodeStatus DecodeVecShiftR8Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftRImm(Inst, Imm, 8); } static DecodeStatus DecodeVecShiftL64Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftLImm(Inst, Imm, 64); } static DecodeStatus DecodeVecShiftL32Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftLImm(Inst, Imm, 32); } static DecodeStatus DecodeVecShiftL16Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftLImm(Inst, Imm, 16); } static DecodeStatus DecodeVecShiftL8Imm(MCInst *Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { return DecodeVecShiftLImm(Inst, Imm, 8); } static DecodeStatus DecodeThreeAddrSRegInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); unsigned Rm = fieldFromInstruction(insn, 16, 5); unsigned shiftHi = fieldFromInstruction(insn, 22, 2); unsigned shiftLo = fieldFromInstruction(insn, 10, 6); unsigned shift = (shiftHi << 6) | shiftLo; switch (MCInst_getOpcode(Inst)) { default: return Fail; case AArch64_ADDWrs: case AArch64_ADDSWrs: case AArch64_SUBWrs: case AArch64_SUBSWrs: // if shift == '11' then ReservedValue() if (shiftHi == 0x3) return Fail; // Deliberate fallthrough case AArch64_ANDWrs: case AArch64_ANDSWrs: case AArch64_BICWrs: case AArch64_BICSWrs: case AArch64_ORRWrs: case AArch64_ORNWrs: case AArch64_EORWrs: case AArch64_EONWrs: { // if sf == '0' and imm6<5> == '1' then ReservedValue() if (shiftLo >> 5 == 1) return Fail; DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder); break; } case AArch64_ADDXrs: case AArch64_ADDSXrs: case AArch64_SUBXrs: case AArch64_SUBSXrs: // if shift == '11' then ReservedValue() if (shiftHi == 0x3) return Fail; // Deliberate fallthrough case AArch64_ANDXrs: case AArch64_ANDSXrs: case AArch64_BICXrs: case AArch64_BICSXrs: case AArch64_ORRXrs: case AArch64_ORNXrs: case AArch64_EORXrs: case AArch64_EONXrs: DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder); break; } MCOperand_CreateImm0(Inst, shift); return Success; } static DecodeStatus DecodeMoveImmInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); unsigned imm = fieldFromInstruction(insn, 5, 16); unsigned shift = fieldFromInstruction(insn, 21, 2); shift <<= 4; switch (MCInst_getOpcode(Inst)) { default: return Fail; case AArch64_MOVZWi: case AArch64_MOVNWi: case AArch64_MOVKWi: if (shift & (1U << 5)) return Fail; DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder); break; case AArch64_MOVZXi: case AArch64_MOVNXi: case AArch64_MOVKXi: DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); break; } if (MCInst_getOpcode(Inst) == AArch64_MOVKWi || MCInst_getOpcode(Inst) == AArch64_MOVKXi) MCInst_addOperand2(Inst, MCInst_getOperand(Inst, 0)); MCOperand_CreateImm0(Inst, imm); MCOperand_CreateImm0(Inst, shift); return Success; } static DecodeStatus DecodeUnsignedLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rt = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); unsigned offset = fieldFromInstruction(insn, 10, 12); switch (MCInst_getOpcode(Inst)) { default: return Fail; case AArch64_PRFMui: // Rt is an immediate in prefetch. MCOperand_CreateImm0(Inst, Rt); break; case AArch64_STRBBui: case AArch64_LDRBBui: case AArch64_LDRSBWui: case AArch64_STRHHui: case AArch64_LDRHHui: case AArch64_LDRSHWui: case AArch64_STRWui: case AArch64_LDRWui: DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDRSBXui: case AArch64_LDRSHXui: case AArch64_LDRSWui: case AArch64_STRXui: case AArch64_LDRXui: DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDRQui: case AArch64_STRQui: DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDRDui: case AArch64_STRDui: DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDRSui: case AArch64_STRSui: DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDRHui: case AArch64_STRHui: DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDRBui: case AArch64_STRBui: DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder); break; } DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); //if (!Dis->tryAddingSymbolicOperand(Inst, offset, Addr, Fail, 0, 4)) MCOperand_CreateImm0(Inst, offset); return Success; } static DecodeStatus DecodeSignedLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { bool IsLoad; bool IsIndexed; bool IsFP; unsigned Rt = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); int64_t offset = fieldFromInstruction(insn, 12, 9); // offset is a 9-bit signed immediate, so sign extend it to // fill the unsigned. if (offset & (1 << (9 - 1))) offset |= ~((1LL << 9) - 1); // First operand is always the writeback to the address register, if needed. switch (MCInst_getOpcode(Inst)) { default: break; case AArch64_LDRSBWpre: case AArch64_LDRSHWpre: case AArch64_STRBBpre: case AArch64_LDRBBpre: case AArch64_STRHHpre: case AArch64_LDRHHpre: case AArch64_STRWpre: case AArch64_LDRWpre: case AArch64_LDRSBWpost: case AArch64_LDRSHWpost: case AArch64_STRBBpost: case AArch64_LDRBBpost: case AArch64_STRHHpost: case AArch64_LDRHHpost: case AArch64_STRWpost: case AArch64_LDRWpost: case AArch64_LDRSBXpre: case AArch64_LDRSHXpre: case AArch64_STRXpre: case AArch64_LDRSWpre: case AArch64_LDRXpre: case AArch64_LDRSBXpost: case AArch64_LDRSHXpost: case AArch64_STRXpost: case AArch64_LDRSWpost: case AArch64_LDRXpost: case AArch64_LDRQpre: case AArch64_STRQpre: case AArch64_LDRQpost: case AArch64_STRQpost: case AArch64_LDRDpre: case AArch64_STRDpre: case AArch64_LDRDpost: case AArch64_STRDpost: case AArch64_LDRSpre: case AArch64_STRSpre: case AArch64_LDRSpost: case AArch64_STRSpost: case AArch64_LDRHpre: case AArch64_STRHpre: case AArch64_LDRHpost: case AArch64_STRHpost: case AArch64_LDRBpre: case AArch64_STRBpre: case AArch64_LDRBpost: case AArch64_STRBpost: DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); break; } switch (MCInst_getOpcode(Inst)) { default: return Fail; case AArch64_PRFUMi: // Rt is an immediate in prefetch. MCOperand_CreateImm0(Inst, Rt); break; case AArch64_STURBBi: case AArch64_LDURBBi: case AArch64_LDURSBWi: case AArch64_STURHHi: case AArch64_LDURHHi: case AArch64_LDURSHWi: case AArch64_STURWi: case AArch64_LDURWi: case AArch64_LDTRSBWi: case AArch64_LDTRSHWi: case AArch64_STTRWi: case AArch64_LDTRWi: case AArch64_STTRHi: case AArch64_LDTRHi: case AArch64_LDTRBi: case AArch64_STTRBi: case AArch64_LDRSBWpre: case AArch64_LDRSHWpre: case AArch64_STRBBpre: case AArch64_LDRBBpre: case AArch64_STRHHpre: case AArch64_LDRHHpre: case AArch64_STRWpre: case AArch64_LDRWpre: case AArch64_LDRSBWpost: case AArch64_LDRSHWpost: case AArch64_STRBBpost: case AArch64_LDRBBpost: case AArch64_STRHHpost: case AArch64_LDRHHpost: case AArch64_STRWpost: case AArch64_LDRWpost: DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDURSBXi: case AArch64_LDURSHXi: case AArch64_LDURSWi: case AArch64_STURXi: case AArch64_LDURXi: case AArch64_LDTRSBXi: case AArch64_LDTRSHXi: case AArch64_LDTRSWi: case AArch64_STTRXi: case AArch64_LDTRXi: case AArch64_LDRSBXpre: case AArch64_LDRSHXpre: case AArch64_STRXpre: case AArch64_LDRSWpre: case AArch64_LDRXpre: case AArch64_LDRSBXpost: case AArch64_LDRSHXpost: case AArch64_STRXpost: case AArch64_LDRSWpost: case AArch64_LDRXpost: DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDURQi: case AArch64_STURQi: case AArch64_LDRQpre: case AArch64_STRQpre: case AArch64_LDRQpost: case AArch64_STRQpost: DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDURDi: case AArch64_STURDi: case AArch64_LDRDpre: case AArch64_STRDpre: case AArch64_LDRDpost: case AArch64_STRDpost: DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDURSi: case AArch64_STURSi: case AArch64_LDRSpre: case AArch64_STRSpre: case AArch64_LDRSpost: case AArch64_STRSpost: DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDURHi: case AArch64_STURHi: case AArch64_LDRHpre: case AArch64_STRHpre: case AArch64_LDRHpost: case AArch64_STRHpost: DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_LDURBi: case AArch64_STURBi: case AArch64_LDRBpre: case AArch64_STRBpre: case AArch64_LDRBpost: case AArch64_STRBpost: DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder); break; } DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); MCOperand_CreateImm0(Inst, offset); IsLoad = fieldFromInstruction(insn, 22, 1) != 0; IsIndexed = fieldFromInstruction(insn, 10, 2) != 0; IsFP = fieldFromInstruction(insn, 26, 1) != 0; // Cannot write back to a transfer register (but xzr != sp). if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) return SoftFail; return Success; } static DecodeStatus DecodeExclusiveLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rt = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); unsigned Rt2 = fieldFromInstruction(insn, 10, 5); unsigned Rs = fieldFromInstruction(insn, 16, 5); unsigned Opcode = MCInst_getOpcode(Inst); switch (Opcode) { default: return Fail; case AArch64_STLXRW: case AArch64_STLXRB: case AArch64_STLXRH: case AArch64_STXRW: case AArch64_STXRB: case AArch64_STXRH: DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder); // FALLTHROUGH case AArch64_LDARW: case AArch64_LDARB: case AArch64_LDARH: case AArch64_LDAXRW: case AArch64_LDAXRB: case AArch64_LDAXRH: case AArch64_LDXRW: case AArch64_LDXRB: case AArch64_LDXRH: case AArch64_STLRW: case AArch64_STLRB: case AArch64_STLRH: DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_STLXRX: case AArch64_STXRX: DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder); // FALLTHROUGH case AArch64_LDARX: case AArch64_LDAXRX: case AArch64_LDXRX: case AArch64_STLRX: DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); break; case AArch64_STLXPW: case AArch64_STXPW: DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder); // FALLTHROUGH case AArch64_LDAXPW: case AArch64_LDXPW: DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder); break; case AArch64_STLXPX: case AArch64_STXPX: DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder); // FALLTHROUGH case AArch64_LDAXPX: case AArch64_LDXPX: DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder); break; } DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); // You shouldn't load to the same register twice in an instruction... if ((Opcode == AArch64_LDAXPW || Opcode == AArch64_LDXPW || Opcode == AArch64_LDAXPX || Opcode == AArch64_LDXPX) && Rt == Rt2) return SoftFail; return Success; } static DecodeStatus DecodePairLdStInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rt = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); unsigned Rt2 = fieldFromInstruction(insn, 10, 5); int32_t offset = fieldFromInstruction(insn, 15, 7); bool IsLoad = fieldFromInstruction(insn, 22, 1) != 0; unsigned Opcode = MCInst_getOpcode(Inst); bool NeedsDisjointWritebackTransfer = false; // offset is a 7-bit signed immediate, so sign extend it to // fill the unsigned. if (offset & (1 << (7 - 1))) offset |= ~((1LL << 7) - 1); // First operand is always writeback of base register. switch (Opcode) { default: break; case AArch64_LDPXpost: case AArch64_STPXpost: case AArch64_LDPSWpost: case AArch64_LDPXpre: case AArch64_STPXpre: case AArch64_LDPSWpre: case AArch64_LDPWpost: case AArch64_STPWpost: case AArch64_LDPWpre: case AArch64_STPWpre: case AArch64_LDPQpost: case AArch64_STPQpost: case AArch64_LDPQpre: case AArch64_STPQpre: case AArch64_LDPDpost: case AArch64_STPDpost: case AArch64_LDPDpre: case AArch64_STPDpre: case AArch64_LDPSpost: case AArch64_STPSpost: case AArch64_LDPSpre: case AArch64_STPSpre: DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); break; } switch (Opcode) { default: return Fail; case AArch64_LDPXpost: case AArch64_STPXpost: case AArch64_LDPSWpost: case AArch64_LDPXpre: case AArch64_STPXpre: case AArch64_LDPSWpre: NeedsDisjointWritebackTransfer = true; // Fallthrough case AArch64_LDNPXi: case AArch64_STNPXi: case AArch64_LDPXi: case AArch64_STPXi: case AArch64_LDPSWi: DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder); break; case AArch64_LDPWpost: case AArch64_STPWpost: case AArch64_LDPWpre: case AArch64_STPWpre: NeedsDisjointWritebackTransfer = true; // Fallthrough case AArch64_LDNPWi: case AArch64_STNPWi: case AArch64_LDPWi: case AArch64_STPWi: DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder); break; case AArch64_LDNPQi: case AArch64_STNPQi: case AArch64_LDPQpost: case AArch64_STPQpost: case AArch64_LDPQi: case AArch64_STPQi: case AArch64_LDPQpre: case AArch64_STPQpre: DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder); DecodeFPR128RegisterClass(Inst, Rt2, Addr, Decoder); break; case AArch64_LDNPDi: case AArch64_STNPDi: case AArch64_LDPDpost: case AArch64_STPDpost: case AArch64_LDPDi: case AArch64_STPDi: case AArch64_LDPDpre: case AArch64_STPDpre: DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder); DecodeFPR64RegisterClass(Inst, Rt2, Addr, Decoder); break; case AArch64_LDNPSi: case AArch64_STNPSi: case AArch64_LDPSpost: case AArch64_STPSpost: case AArch64_LDPSi: case AArch64_STPSi: case AArch64_LDPSpre: case AArch64_STPSpre: DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder); DecodeFPR32RegisterClass(Inst, Rt2, Addr, Decoder); break; } DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); MCOperand_CreateImm0(Inst, offset); // You shouldn't load to the same register twice in an instruction... if (IsLoad && Rt == Rt2) return SoftFail; // ... or do any operation that writes-back to a transfer register. But note // that "stp xzr, xzr, [sp], #4" is fine because xzr and sp are different. if (NeedsDisjointWritebackTransfer && Rn != 31 && (Rt == Rn || Rt2 == Rn)) return SoftFail; return Success; } static DecodeStatus DecodeAddSubERegInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd, Rn, Rm; unsigned extend = fieldFromInstruction(insn, 10, 6); unsigned shift = extend & 0x7; if (shift > 4) return Fail; Rd = fieldFromInstruction(insn, 0, 5); Rn = fieldFromInstruction(insn, 5, 5); Rm = fieldFromInstruction(insn, 16, 5); switch (MCInst_getOpcode(Inst)) { default: return Fail; case AArch64_ADDWrx: case AArch64_SUBWrx: DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder); break; case AArch64_ADDSWrx: case AArch64_SUBSWrx: DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder); break; case AArch64_ADDXrx: case AArch64_SUBXrx: DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder); break; case AArch64_ADDSXrx: case AArch64_SUBSXrx: DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder); break; case AArch64_ADDXrx64: case AArch64_SUBXrx64: DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder); break; case AArch64_SUBSXrx64: case AArch64_ADDSXrx64: DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder); break; } MCOperand_CreateImm0(Inst, extend); return Success; } static DecodeStatus DecodeLogicalImmInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); unsigned Datasize = fieldFromInstruction(insn, 31, 1); unsigned imm; if (Datasize) { if (MCInst_getOpcode(Inst) == AArch64_ANDSXri) DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); else DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder); imm = fieldFromInstruction(insn, 10, 13); if (!AArch64_AM_isValidDecodeLogicalImmediate(imm, 64)) return Fail; } else { if (MCInst_getOpcode(Inst) == AArch64_ANDSWri) DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder); else DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder); imm = fieldFromInstruction(insn, 10, 12); if (!AArch64_AM_isValidDecodeLogicalImmediate(imm, 32)) return Fail; } MCOperand_CreateImm0(Inst, imm); return Success; } static DecodeStatus DecodeModImmInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); unsigned cmode = fieldFromInstruction(insn, 12, 4); unsigned imm = fieldFromInstruction(insn, 16, 3) << 5; imm |= fieldFromInstruction(insn, 5, 5); if (MCInst_getOpcode(Inst) == AArch64_MOVID) DecodeFPR64RegisterClass(Inst, Rd, Addr, Decoder); else DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder); MCOperand_CreateImm0(Inst, imm); switch (MCInst_getOpcode(Inst)) { default: break; case AArch64_MOVIv4i16: case AArch64_MOVIv8i16: case AArch64_MVNIv4i16: case AArch64_MVNIv8i16: case AArch64_MOVIv2i32: case AArch64_MOVIv4i32: case AArch64_MVNIv2i32: case AArch64_MVNIv4i32: MCOperand_CreateImm0(Inst, (cmode & 6) << 2); break; case AArch64_MOVIv2s_msl: case AArch64_MOVIv4s_msl: case AArch64_MVNIv2s_msl: case AArch64_MVNIv4s_msl: MCOperand_CreateImm0(Inst, cmode & 1 ? 0x110 : 0x108); break; } return Success; } static DecodeStatus DecodeModImmTiedInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); unsigned cmode = fieldFromInstruction(insn, 12, 4); unsigned imm = fieldFromInstruction(insn, 16, 3) << 5; imm |= fieldFromInstruction(insn, 5, 5); // Tied operands added twice. DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder); DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder); MCOperand_CreateImm0(Inst, imm); MCOperand_CreateImm0(Inst, (cmode & 6) << 2); return Success; } static DecodeStatus DecodeAdrInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); int64_t imm = fieldFromInstruction(insn, 5, 19) << 2; imm |= fieldFromInstruction(insn, 29, 2); // Sign-extend the 21-bit immediate. if (imm & (1 << (21 - 1))) imm |= ~((1LL << 21) - 1); DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); //if (!Dis->tryAddingSymbolicOperand(Inst, imm, Addr, Fail, 0, 4)) MCOperand_CreateImm0(Inst, imm); return Success; } static DecodeStatus DecodeBaseAddSubImm(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { unsigned Rd = fieldFromInstruction(insn, 0, 5); unsigned Rn = fieldFromInstruction(insn, 5, 5); unsigned Imm = fieldFromInstruction(insn, 10, 14); unsigned S = fieldFromInstruction(insn, 29, 1); unsigned Datasize = fieldFromInstruction(insn, 31, 1); unsigned ShifterVal = (Imm >> 12) & 3; unsigned ImmVal = Imm & 0xFFF; if (ShifterVal != 0 && ShifterVal != 1) return Fail; if (Datasize) { if (Rd == 31 && !S) DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder); else DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); } else { if (Rd == 31 && !S) DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder); else DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder); DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder); } //if (!Dis->tryAddingSymbolicOperand(Inst, Imm, Addr, Fail, 0, 4)) MCOperand_CreateImm0(Inst, ImmVal); MCOperand_CreateImm0(Inst, 12 * ShifterVal); return Success; } static DecodeStatus DecodeUnconditionalBranch(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { int64_t imm = fieldFromInstruction(insn, 0, 26); // Sign-extend the 26-bit immediate. if (imm & (1 << (26 - 1))) imm |= ~((1LL << 26) - 1); // if (!Dis->tryAddingSymbolicOperand(Inst, imm << 2, Addr, true, 0, 4)) MCOperand_CreateImm0(Inst, imm); return Success; } static DecodeStatus DecodeSystemPStateInstruction(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { uint32_t op1 = fieldFromInstruction(insn, 16, 3); uint32_t op2 = fieldFromInstruction(insn, 5, 3); uint32_t crm = fieldFromInstruction(insn, 8, 4); bool ValidNamed; uint32_t pstate_field = (op1 << 3) | op2; MCOperand_CreateImm0(Inst, pstate_field); MCOperand_CreateImm0(Inst, crm); A64NamedImmMapper_toString(&A64PState_PStateMapper, pstate_field, &ValidNamed); return ValidNamed ? Success : Fail; } static DecodeStatus DecodeTestAndBranch(MCInst *Inst, uint32_t insn, uint64_t Addr, const void *Decoder) { uint32_t Rt = fieldFromInstruction(insn, 0, 5); uint32_t bit = fieldFromInstruction(insn, 31, 1) << 5; uint64_t dst = fieldFromInstruction(insn, 5, 14); bit |= fieldFromInstruction(insn, 19, 5); // Sign-extend 14-bit immediate. if (dst & (1 << (14 - 1))) dst |= ~((1LL << 14) - 1); if (fieldFromInstruction(insn, 31, 1) == 0) DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder); else DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); MCOperand_CreateImm0(Inst, bit); //if (!Dis->tryAddingSymbolicOperand(Inst, dst << 2, Addr, true, 0, 4)) MCOperand_CreateImm0(Inst, dst); return Success; } void AArch64_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(AArch64RegDesc, 420, RA, PC, AArch64MCRegisterClasses, 43, AArch64RegUnitRoots, 66, AArch64RegDiffLists, AArch64RegStrings, AArch64SubRegIdxLists, 53, AArch64SubRegIdxRanges, AArch64RegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, AArch64RegDesc, 420, 0, 0, AArch64MCRegisterClasses, 43, 0, 0, AArch64RegDiffLists, 0, AArch64SubRegIdxLists, 53, 0); } #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64Disassembler.h010066400017500001750000000006671363402546700222070ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_AARCH64_DISASSEMBLER_H #define CS_AARCH64_DISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" void AArch64_init(MCRegisterInfo *MRI); bool AArch64_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64GenAsmWriter.inc010066400017500001750000015446621363402546700224740ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 2694U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 2687U, // BUNDLE 2704U, // LIFETIME_START 2674U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 6182U, // ABSv16i8 553920550U, // ABSv1i64 1074272294U, // ABSv2i32 1611405350U, // ABSv2i64 2148538406U, // ABSv4i16 2685671462U, // ABSv4i32 3222804518U, // ABSv8i16 3759937574U, // ABSv8i8 17049662U, // ADCSWr 17049662U, // ADCSXr 17048298U, // ADCWr 17048298U, // ADCXr 537400863U, // ADDHNv2i64_v2i32 571748634U, // ADDHNv2i64_v4i32 1074796063U, // ADDHNv4i32_v4i16 1108881690U, // ADDHNv4i32_v8i16 1644179738U, // ADDHNv8i16_v16i8 1612453407U, // ADDHNv8i16_v8i8 2147489464U, // ADDPv16i8 2684884664U, // ADDPv2i32 537663160U, // ADDPv2i64 1610884792U, // ADDPv2i64p 3222279864U, // ADDPv4i16 1075058360U, // ADDPv4i32 1612191416U, // ADDPv8i16 3759937208U, // ADDPv8i8 17049674U, // ADDSWri 0U, // ADDSWrr 17049674U, // ADDSWrs 17049674U, // ADDSWrx 17049674U, // ADDSXri 0U, // ADDSXrr 17049674U, // ADDSXrs 17049674U, // ADDSXrx 17049674U, // ADDSXrx64 272671U, // ADDVv16i8v 2147756319U, // ADDVv4i16v 2684627231U, // ADDVv4i32v 3221498143U, // ADDVv8i16v 3758369055U, // ADDVv8i8v 17048359U, // ADDWri 0U, // ADDWrr 17048359U, // ADDWrs 17048359U, // ADDWrx 17048359U, // ADDXri 0U, // ADDXrr 17048359U, // ADDXrs 17048359U, // ADDXrx 17048359U, // ADDXrx64 2147488551U, // ADDv16i8 17048359U, // ADDv1i64 2684883751U, // ADDv2i32 537662247U, // ADDv2i64 3222278951U, // ADDv4i16 1075057447U, // ADDv4i32 1612190503U, // ADDv8i16 3759936295U, // ADDv8i8 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 553920403U, // ADR 50603811U, // ADRP 33567598U, // AESDrr 33567656U, // AESErr 4852U, // AESIMCrr 4860U, // AESMCrr 17049680U, // ANDSWri 0U, // ANDSWrr 17049680U, // ANDSWrs 17049680U, // ANDSXri 0U, // ANDSXrr 17049680U, // ANDSXrs 17048425U, // ANDWri 0U, // ANDWrr 17048425U, // ANDWrs 17048425U, // ANDXri 0U, // ANDXrr 17048425U, // ANDXrs 2147488617U, // ANDv16i8 3759936361U, // ANDv8i8 17049553U, // ASRVWr 17049553U, // ASRVXr 16935U, // B 67380710U, // BFMWri 67380710U, // BFMXri 0U, // BICSWrr 17049668U, // BICSWrs 0U, // BICSXrr 17049668U, // BICSXrs 0U, // BICWrr 17048303U, // BICWrs 0U, // BICXrr 17048303U, // BICXrs 2147488495U, // BICv16i8 84423407U, // BICv2i32 84947695U, // BICv4i16 85209839U, // BICv4i32 85471983U, // BICv8i16 3759936239U, // BICv8i8 2147488704U, // BIFv16i8 3759936448U, // BIFv8i8 2181052603U, // BITv16i8 3793500347U, // BITv8i8 17641U, // BL 2107319U, // BLR 2107279U, // BR 21688U, // BRK 2181051810U, // BSLv16i8 3793499554U, // BSLv8i8 27247U, // Bcc 100936257U, // CBNZW 100936257U, // CBNZX 100936242U, // CBZW 100936242U, // CBZX 17049144U, // CCMNWi 17049144U, // CCMNWr 17049144U, // CCMNXi 17049144U, // CCMNXr 17049316U, // CCMPWi 17049316U, // CCMPWr 17049316U, // CCMPXi 17049316U, // CCMPXr 2107924U, // CLREX 553920604U, // CLSWr 553920604U, // CLSXr 6236U, // CLSv16i8 1074272348U, // CLSv2i32 2148538460U, // CLSv4i16 2685671516U, // CLSv4i32 3222804572U, // CLSv8i16 3759937628U, // CLSv8i8 553921084U, // CLZWr 553921084U, // CLZXr 6716U, // CLZv16i8 1074272828U, // CLZv2i32 2148538940U, // CLZv4i16 2685671996U, // CLZv4i32 3222805052U, // CLZv8i16 3759938108U, // CLZv8i8 2147489643U, // CMEQv16i8 5995U, // CMEQv16i8rz 17049451U, // CMEQv1i64 553920363U, // CMEQv1i64rz 2684884843U, // CMEQv2i32 1074272107U, // CMEQv2i32rz 537663339U, // CMEQv2i64 1611405163U, // CMEQv2i64rz 3222280043U, // CMEQv4i16 2148538219U, // CMEQv4i16rz 1075058539U, // CMEQv4i32 2685671275U, // CMEQv4i32rz 1612191595U, // CMEQv8i16 3222804331U, // CMEQv8i16rz 3759937387U, // CMEQv8i8 3759937387U, // CMEQv8i8rz 2147488636U, // CMGEv16i8 4988U, // CMGEv16i8rz 17048444U, // CMGEv1i64 553919356U, // CMGEv1i64rz 2684883836U, // CMGEv2i32 1074271100U, // CMGEv2i32rz 537662332U, // CMGEv2i64 1611404156U, // CMGEv2i64rz 3222279036U, // CMGEv4i16 2148537212U, // CMGEv4i16rz 1075057532U, // CMGEv4i32 2685670268U, // CMGEv4i32rz 1612190588U, // CMGEv8i16 3222803324U, // CMGEv8i16rz 3759936380U, // CMGEv8i8 3759936380U, // CMGEv8i8rz 2147489972U, // CMGTv16i8 6324U, // CMGTv16i8rz 17049780U, // CMGTv1i64 553920692U, // CMGTv1i64rz 2684885172U, // CMGTv2i32 1074272436U, // CMGTv2i32rz 537663668U, // CMGTv2i64 1611405492U, // CMGTv2i64rz 3222280372U, // CMGTv4i16 2148538548U, // CMGTv4i16rz 1075058868U, // CMGTv4i32 2685671604U, // CMGTv4i32rz 1612191924U, // CMGTv8i16 3222804660U, // CMGTv8i16rz 3759937716U, // CMGTv8i8 3759937716U, // CMGTv8i8rz 2147488916U, // CMHIv16i8 17048724U, // CMHIv1i64 2684884116U, // CMHIv2i32 537662612U, // CMHIv2i64 3222279316U, // CMHIv4i16 1075057812U, // CMHIv4i32 1612190868U, // CMHIv8i16 3759936660U, // CMHIv8i8 2147489878U, // CMHSv16i8 17049686U, // CMHSv1i64 2684885078U, // CMHSv2i32 537663574U, // CMHSv2i64 3222280278U, // CMHSv4i16 1075058774U, // CMHSv4i32 1612191830U, // CMHSv8i16 3759937622U, // CMHSv8i8 4995U, // CMLEv16i8rz 553919363U, // CMLEv1i64rz 1074271107U, // CMLEv2i32rz 1611404163U, // CMLEv2i64rz 2148537219U, // CMLEv4i16rz 2685670275U, // CMLEv4i32rz 3222803331U, // CMLEv8i16rz 3759936387U, // CMLEv8i8rz 6342U, // CMLTv16i8rz 553920710U, // CMLTv1i64rz 1074272454U, // CMLTv2i32rz 1611405510U, // CMLTv2i64rz 2148538566U, // CMLTv4i16rz 2685671622U, // CMLTv4i32rz 3222804678U, // CMLTv8i16rz 3759937734U, // CMLTv8i8rz 2147490013U, // CMTSTv16i8 17049821U, // CMTSTv1i64 2684885213U, // CMTSTv2i32 537663709U, // CMTSTv2i64 3222280413U, // CMTSTv4i16 1075058909U, // CMTSTv4i32 1612191965U, // CMTSTv8i16 3759937757U, // CMTSTv8i8 6348U, // CNTv16i8 3759937740U, // CNTv8i8 272763U, // CPYi16 537143675U, // CPYi32 1074014587U, // CPYi64 1610885499U, // CPYi8 17048098U, // CRC32Brr 17048106U, // CRC32CBrr 17048575U, // CRC32CHrr 17050039U, // CRC32CWrr 17050123U, // CRC32CXrr 17048558U, // CRC32Hrr 17050017U, // CRC32Wrr 17050092U, // CRC32Xrr 17048888U, // CSELWr 17048888U, // CSELXr 17048323U, // CSINCWr 17048323U, // CSINCXr 17049971U, // CSINVWr 17049971U, // CSINVXr 17048544U, // CSNEGWr 17048544U, // CSNEGXr 20524U, // DCPS1 20889U, // DCPS2 20938U, // DCPS3 29235U, // DMB 2719U, // DRPS 29324U, // DSB 553654070U, // DUPv16i8gpr 1610618678U, // DUPv16i8lane 554178358U, // DUPv2i32gpr 537401142U, // DUPv2i32lane 554440502U, // DUPv2i64gpr 1074534198U, // DUPv2i64lane 554702646U, // DUPv4i16gpr 1054518U, // DUPv4i16lane 554964790U, // DUPv4i32gpr 538187574U, // DUPv4i32lane 555226934U, // DUPv8i16gpr 1578806U, // DUPv8i16lane 555489078U, // DUPv8i8gpr 1612453686U, // DUPv8i8lane 0U, // EONWrr 17049150U, // EONWrs 0U, // EONXrr 17049150U, // EONXrs 17049538U, // EORWri 0U, // EORWrr 17049538U, // EORWrs 17049538U, // EORXri 0U, // EORXrr 17049538U, // EORXrs 2147489730U, // EORv16i8 3759937474U, // EORv8i8 2724U, // ERET 17049585U, // EXTRWrri 17049585U, // EXTRXrri 2147490026U, // EXTv16i8 3759937770U, // EXTv8i8 0U, // F128CSEL 17048340U, // FABD32 17048340U, // FABD64 2684883732U, // FABDv2f32 537662228U, // FABDv2f64 1075057428U, // FABDv4f32 553920549U, // FABSDr 553920549U, // FABSSr 1074272293U, // FABSv2f32 1611405349U, // FABSv2f64 2685671461U, // FABSv4f32 17048436U, // FACGE32 17048436U, // FACGE64 2684883828U, // FACGEv2f32 537662324U, // FACGEv2f64 1075057524U, // FACGEv4f32 17049772U, // FACGT32 17049772U, // FACGT64 2684885164U, // FACGTv2f32 537663660U, // FACGTv2f64 1075058860U, // FACGTv4f32 17048358U, // FADDDrr 2684884663U, // FADDPv2f32 537663159U, // FADDPv2f64 1074013879U, // FADDPv2i32p 1610884791U, // FADDPv2i64p 1075058359U, // FADDPv4f32 17048358U, // FADDSrr 2684883750U, // FADDv2f32 537662246U, // FADDv2f64 1075057446U, // FADDv4f32 17049315U, // FCCMPDrr 17048473U, // FCCMPEDrr 17048473U, // FCCMPESrr 17049315U, // FCCMPSrr 17049450U, // FCMEQ32 17049450U, // FCMEQ64 2164533098U, // FCMEQv1i32rz 2164533098U, // FCMEQv1i64rz 2684884842U, // FCMEQv2f32 537663338U, // FCMEQv2f64 2684884842U, // FCMEQv2i32rz 3222017898U, // FCMEQv2i64rz 1075058538U, // FCMEQv4f32 3759413098U, // FCMEQv4i32rz 17048443U, // FCMGE32 17048443U, // FCMGE64 2164532091U, // FCMGEv1i32rz 2164532091U, // FCMGEv1i64rz 2684883835U, // FCMGEv2f32 537662331U, // FCMGEv2f64 2684883835U, // FCMGEv2i32rz 3222016891U, // FCMGEv2i64rz 1075057531U, // FCMGEv4f32 3759412091U, // FCMGEv4i32rz 17049779U, // FCMGT32 17049779U, // FCMGT64 2164533427U, // FCMGTv1i32rz 2164533427U, // FCMGTv1i64rz 2684885171U, // FCMGTv2f32 537663667U, // FCMGTv2f64 2684885171U, // FCMGTv2i32rz 3222018227U, // FCMGTv2i64rz 1075058867U, // FCMGTv4f32 3759413427U, // FCMGTv4i32rz 2164532098U, // FCMLEv1i32rz 2164532098U, // FCMLEv1i64rz 2684883842U, // FCMLEv2i32rz 3222016898U, // FCMLEv2i64rz 3759412098U, // FCMLEv4i32rz 2164533445U, // FCMLTv1i32rz 2164533445U, // FCMLTv1i64rz 2684885189U, // FCMLTv2i32rz 3222018245U, // FCMLTv2i64rz 3759413445U, // FCMLTv4i32rz 2369258U, // FCMPDri 553920234U, // FCMPDrr 2368417U, // FCMPEDri 553919393U, // FCMPEDrr 2368417U, // FCMPESri 553919393U, // FCMPESrr 2369258U, // FCMPSri 553920234U, // FCMPSrr 17048887U, // FCSELDrrr 17048887U, // FCSELSrrr 553920541U, // FCVTASUWDr 553920541U, // FCVTASUWSr 553920541U, // FCVTASUXDr 553920541U, // FCVTASUXSr 553920541U, // FCVTASv1i32 553920541U, // FCVTASv1i64 1074272285U, // FCVTASv2f32 1611405341U, // FCVTASv2f64 2685671453U, // FCVTASv4f32 553920751U, // FCVTAUUWDr 553920751U, // FCVTAUUWSr 553920751U, // FCVTAUUXDr 553920751U, // FCVTAUUXSr 553920751U, // FCVTAUv1i32 553920751U, // FCVTAUv1i64 1074272495U, // FCVTAUv2f32 1611405551U, // FCVTAUv2f64 2685671663U, // FCVTAUv4f32 553920740U, // FCVTDHr 553920740U, // FCVTDSr 553920740U, // FCVTHDr 553920740U, // FCVTHSr 1074533828U, // FCVTLv2i32 2148799940U, // FCVTLv4i16 2685145352U, // FCVTLv4i32 3222540552U, // FCVTLv8i16 553920615U, // FCVTMSUWDr 553920615U, // FCVTMSUWSr 553920615U, // FCVTMSUXDr 553920615U, // FCVTMSUXSr 553920615U, // FCVTMSv1i32 553920615U, // FCVTMSv1i64 1074272359U, // FCVTMSv2f32 1611405415U, // FCVTMSv2f64 2685671527U, // FCVTMSv4f32 553920767U, // FCVTMUUWDr 553920767U, // FCVTMUUWSr 553920767U, // FCVTMUUXDr 553920767U, // FCVTMUUXSr 553920767U, // FCVTMUv1i32 553920767U, // FCVTMUv1i64 1074272511U, // FCVTMUv2f32 1611405567U, // FCVTMUv2f64 2685671679U, // FCVTMUv4f32 553920628U, // FCVTNSUWDr 553920628U, // FCVTNSUWSr 553920628U, // FCVTNSUXDr 553920628U, // FCVTNSUXSr 553920628U, // FCVTNSv1i32 553920628U, // FCVTNSv1i64 1074272372U, // FCVTNSv2f32 1611405428U, // FCVTNSv2f64 2685671540U, // FCVTNSv4f32 553920775U, // FCVTNUUWDr 553920775U, // FCVTNUUWSr 553920775U, // FCVTNUUXDr 553920775U, // FCVTNUUXSr 553920775U, // FCVTNUv1i32 553920775U, // FCVTNUv1i64 1074272519U, // FCVTNUv2f32 1611405575U, // FCVTNUv2f64 2685671687U, // FCVTNUv4f32 1611142770U, // FCVTNv2i32 2685408882U, // FCVTNv4i16 1645490510U, // FCVTNv4i32 2719494478U, // FCVTNv8i16 553920644U, // FCVTPSUWDr 553920644U, // FCVTPSUWSr 553920644U, // FCVTPSUXDr 553920644U, // FCVTPSUXSr 553920644U, // FCVTPSv1i32 553920644U, // FCVTPSv1i64 1074272388U, // FCVTPSv2f32 1611405444U, // FCVTPSv2f64 2685671556U, // FCVTPSv4f32 553920783U, // FCVTPUUWDr 553920783U, // FCVTPUUWSr 553920783U, // FCVTPUUXDr 553920783U, // FCVTPUUXSr 553920783U, // FCVTPUv1i32 553920783U, // FCVTPUv1i64 1074272527U, // FCVTPUv2f32 1611405583U, // FCVTPUv2f64 2685671695U, // FCVTPUv4f32 553920740U, // FCVTSDr 553920740U, // FCVTSHr 553920168U, // FCVTXNv1i64 1611142824U, // FCVTXNv2f32 1645490564U, // FCVTXNv4f32 17049759U, // FCVTZSSWDri 17049759U, // FCVTZSSWSri 17049759U, // FCVTZSSXDri 17049759U, // FCVTZSSXSri 553920671U, // FCVTZSUWDr 553920671U, // FCVTZSUWSr 553920671U, // FCVTZSUXDr 553920671U, // FCVTZSUXSr 17049759U, // FCVTZS_IntSWDri 17049759U, // FCVTZS_IntSWSri 17049759U, // FCVTZS_IntSXDri 17049759U, // FCVTZS_IntSXSri 553920671U, // FCVTZS_IntUWDr 553920671U, // FCVTZS_IntUWSr 553920671U, // FCVTZS_IntUXDr 553920671U, // FCVTZS_IntUXSr 1074272415U, // FCVTZS_Intv2f32 1611405471U, // FCVTZS_Intv2f64 2685671583U, // FCVTZS_Intv4f32 17049759U, // FCVTZSd 17049759U, // FCVTZSs 553920671U, // FCVTZSv1i32 553920671U, // FCVTZSv1i64 1074272415U, // FCVTZSv2f32 1611405471U, // FCVTZSv2f64 2684885151U, // FCVTZSv2i32_shift 537663647U, // FCVTZSv2i64_shift 2685671583U, // FCVTZSv4f32 1075058847U, // FCVTZSv4i32_shift 17049879U, // FCVTZUSWDri 17049879U, // FCVTZUSWSri 17049879U, // FCVTZUSXDri 17049879U, // FCVTZUSXSri 553920791U, // FCVTZUUWDr 553920791U, // FCVTZUUWSr 553920791U, // FCVTZUUXDr 553920791U, // FCVTZUUXSr 17049879U, // FCVTZU_IntSWDri 17049879U, // FCVTZU_IntSWSri 17049879U, // FCVTZU_IntSXDri 17049879U, // FCVTZU_IntSXSri 553920791U, // FCVTZU_IntUWDr 553920791U, // FCVTZU_IntUWSr 553920791U, // FCVTZU_IntUXDr 553920791U, // FCVTZU_IntUXSr 1074272535U, // FCVTZU_Intv2f32 1611405591U, // FCVTZU_Intv2f64 2685671703U, // FCVTZU_Intv4f32 17049879U, // FCVTZUd 17049879U, // FCVTZUs 553920791U, // FCVTZUv1i32 553920791U, // FCVTZUv1i64 1074272535U, // FCVTZUv2f32 1611405591U, // FCVTZUv2f64 2684885271U, // FCVTZUv2i32_shift 537663767U, // FCVTZUv2i64_shift 2685671703U, // FCVTZUv4f32 1075058967U, // FCVTZUv4i32_shift 17049898U, // FDIVDrr 17049898U, // FDIVSrr 2684885290U, // FDIVv2f32 537663786U, // FDIVv2f64 1075058986U, // FDIVv4f32 17048394U, // FMADDDrrr 17048394U, // FMADDSrrr 17050100U, // FMAXDrr 17049087U, // FMAXNMDrr 2684884729U, // FMAXNMPv2f32 537663225U, // FMAXNMPv2f64 1074013945U, // FMAXNMPv2i32p 1610884857U, // FMAXNMPv2i64p 1075058425U, // FMAXNMPv4f32 17049087U, // FMAXNMSrr 2684627285U, // FMAXNMVv4i32v 2684884479U, // FMAXNMv2f32 537662975U, // FMAXNMv2f64 1075058175U, // FMAXNMv4f32 2684884802U, // FMAXPv2f32 537663298U, // FMAXPv2f64 1074014018U, // FMAXPv2i32p 1610884930U, // FMAXPv2i64p 1075058498U, // FMAXPv4f32 17050100U, // FMAXSrr 2684627340U, // FMAXVv4i32v 2684885492U, // FMAXv2f32 537663988U, // FMAXv2f64 1075059188U, // FMAXv4f32 17049126U, // FMINDrr 17049079U, // FMINNMDrr 2684884720U, // FMINNMPv2f32 537663216U, // FMINNMPv2f64 1074013936U, // FMINNMPv2i32p 1610884848U, // FMINNMPv2i64p 1075058416U, // FMINNMPv4f32 17049079U, // FMINNMSrr 2684627276U, // FMINNMVv4i32v 2684884471U, // FMINNMv2f32 537662967U, // FMINNMv2f64 1075058167U, // FMINNMv4f32 2684884744U, // FMINPv2f32 537663240U, // FMINPv2f64 1074013960U, // FMINPv2i32p 1610884872U, // FMINPv2i64p 1075058440U, // FMINPv4f32 17049126U, // FMINSrr 2684627294U, // FMINVv4i32v 2684884518U, // FMINv2f32 537663014U, // FMINv2f64 1075058214U, // FMINv4f32 67404282U, // FMLAv1i32_indexed 67404282U, // FMLAv1i64_indexed 2718446074U, // FMLAv2f32 571224570U, // FMLAv2f64 2718446074U, // FMLAv2i32_indexed 571224570U, // FMLAv2i64_indexed 1108619770U, // FMLAv4f32 1108619770U, // FMLAv4i32_indexed 67405921U, // FMLSv1i32_indexed 67405921U, // FMLSv1i64_indexed 2718447713U, // FMLSv2f32 571226209U, // FMLSv2f64 2718447713U, // FMLSv2i32_indexed 571226209U, // FMLSv2i64_indexed 1108621409U, // FMLSv4f32 1108621409U, // FMLSv4i32_indexed 1074014586U, // FMOVDXHighr 553920890U, // FMOVDXr 117713274U, // FMOVDi 553920890U, // FMOVDr 553920890U, // FMOVSWr 117713274U, // FMOVSi 553920890U, // FMOVSr 553920890U, // FMOVWSr 556276090U, // FMOVXDHighr 553920890U, // FMOVXDr 117971322U, // FMOVv2f32_ns 118233466U, // FMOVv2f64_ns 118757754U, // FMOVv4f32_ns 17048257U, // FMSUBDrrr 17048257U, // FMSUBSrrr 17049035U, // FMULDrr 17049035U, // FMULSrr 17050139U, // FMULX32 17050139U, // FMULX64 17050139U, // FMULXv1i32_indexed 17050139U, // FMULXv1i64_indexed 2684885531U, // FMULXv2f32 537664027U, // FMULXv2f64 2684885531U, // FMULXv2i32_indexed 537664027U, // FMULXv2i64_indexed 1075059227U, // FMULXv4f32 1075059227U, // FMULXv4i32_indexed 17049035U, // FMULv1i32_indexed 17049035U, // FMULv1i64_indexed 2684884427U, // FMULv2f32 537662923U, // FMULv2f64 2684884427U, // FMULv2i32_indexed 537662923U, // FMULv2i64_indexed 1075058123U, // FMULv4f32 1075058123U, // FMULv4i32_indexed 553919443U, // FNEGDr 553919443U, // FNEGSr 1074271187U, // FNEGv2f32 1611404243U, // FNEGv2f64 2685670355U, // FNEGv4f32 17048401U, // FNMADDDrrr 17048401U, // FNMADDSrrr 17048264U, // FNMSUBDrrr 17048264U, // FNMSUBSrrr 17049041U, // FNMULDrr 17049041U, // FNMULSrr 553919369U, // FRECPEv1i32 553919369U, // FRECPEv1i64 1074271113U, // FRECPEv2f32 1611404169U, // FRECPEv2f64 2685670281U, // FRECPEv4f32 17049724U, // FRECPS32 17049724U, // FRECPS64 2684885116U, // FRECPSv2f32 537663612U, // FRECPSv2f64 1075058812U, // FRECPSv4f32 553921058U, // FRECPXv1i32 553921058U, // FRECPXv1i64 553919002U, // FRINTADr 553919002U, // FRINTASr 1074270746U, // FRINTAv2f32 1611403802U, // FRINTAv2f64 2685669914U, // FRINTAv4f32 553919658U, // FRINTIDr 553919658U, // FRINTISr 1074271402U, // FRINTIv2f32 1611404458U, // FRINTIv2f64 2685670570U, // FRINTIv4f32 553920007U, // FRINTMDr 553920007U, // FRINTMSr 1074271751U, // FRINTMv2f32 1611404807U, // FRINTMv2f64 2685670919U, // FRINTMv4f32 553920106U, // FRINTNDr 553920106U, // FRINTNSr 1074271850U, // FRINTNv2f32 1611404906U, // FRINTNv2f64 2685671018U, // FRINTNv4f32 553920297U, // FRINTPDr 553920297U, // FRINTPSr 1074272041U, // FRINTPv2f32 1611405097U, // FRINTPv2f64 2685671209U, // FRINTPv4f32 553921066U, // FRINTXDr 553921066U, // FRINTXSr 1074272810U, // FRINTXv2f32 1611405866U, // FRINTXv2f64 2685671978U, // FRINTXv4f32 553921101U, // FRINTZDr 553921101U, // FRINTZSr 1074272845U, // FRINTZv2f32 1611405901U, // FRINTZv2f64 2685672013U, // FRINTZv4f32 553919406U, // FRSQRTEv1i32 553919406U, // FRSQRTEv1i64 1074271150U, // FRSQRTEv2f32 1611404206U, // FRSQRTEv2f64 2685670318U, // FRSQRTEv4f32 17049745U, // FRSQRTS32 17049745U, // FRSQRTS64 2684885137U, // FRSQRTSv2f32 537663633U, // FRSQRTSv2f64 1075058833U, // FRSQRTSv4f32 553920726U, // FSQRTDr 553920726U, // FSQRTSr 1074272470U, // FSQRTv2f32 1611405526U, // FSQRTv2f64 2685671638U, // FSQRTv4f32 17048237U, // FSUBDrr 17048237U, // FSUBSrr 2684883629U, // FSUBv2f32 537662125U, // FSUBv2f64 1075057325U, // FSUBv4f32 23145U, // HINT 22720U, // HLT 21258U, // HVC 137115759U, // INSvi16gpr 153892975U, // INSvi16lane 137377903U, // INSvi32gpr 691026031U, // INSvi32lane 136853615U, // INSvi64gpr 1227372655U, // INSvi64lane 137640047U, // INSvi8gpr 1765029999U, // INSvi8lane 29329U, // ISB 36885U, // LD1Fourv16b 3710997U, // LD1Fourv16b_POST 45077U, // LD1Fourv1d 3981333U, // LD1Fourv1d_POST 53269U, // LD1Fourv2d 3727381U, // LD1Fourv2d_POST 61461U, // LD1Fourv2s 3997717U, // LD1Fourv2s_POST 69653U, // LD1Fourv4h 4005909U, // LD1Fourv4h_POST 77845U, // LD1Fourv4s 3751957U, // LD1Fourv4s_POST 86037U, // LD1Fourv8b 4022293U, // LD1Fourv8b_POST 94229U, // LD1Fourv8h 3768341U, // LD1Fourv8h_POST 36885U, // LD1Onev16b 4235285U, // LD1Onev16b_POST 45077U, // LD1Onev1d 4505621U, // LD1Onev1d_POST 53269U, // LD1Onev2d 4251669U, // LD1Onev2d_POST 61461U, // LD1Onev2s 4522005U, // LD1Onev2s_POST 69653U, // LD1Onev4h 4530197U, // LD1Onev4h_POST 77845U, // LD1Onev4s 4276245U, // LD1Onev4s_POST 86037U, // LD1Onev8b 4546581U, // LD1Onev8b_POST 94229U, // LD1Onev8h 4292629U, // LD1Onev8h_POST 38769U, // LD1Rv16b 4761457U, // LD1Rv16b_POST 46961U, // LD1Rv1d 4507505U, // LD1Rv1d_POST 55153U, // LD1Rv2d 4515697U, // LD1Rv2d_POST 63345U, // LD1Rv2s 5048177U, // LD1Rv2s_POST 71537U, // LD1Rv4h 5318513U, // LD1Rv4h_POST 79729U, // LD1Rv4s 5064561U, // LD1Rv4s_POST 87921U, // LD1Rv8b 4810609U, // LD1Rv8b_POST 96113U, // LD1Rv8h 5343089U, // LD1Rv8h_POST 36885U, // LD1Threev16b 5546005U, // LD1Threev16b_POST 45077U, // LD1Threev1d 5816341U, // LD1Threev1d_POST 53269U, // LD1Threev2d 5562389U, // LD1Threev2d_POST 61461U, // LD1Threev2s 5832725U, // LD1Threev2s_POST 69653U, // LD1Threev4h 5840917U, // LD1Threev4h_POST 77845U, // LD1Threev4s 5586965U, // LD1Threev4s_POST 86037U, // LD1Threev8b 5857301U, // LD1Threev8b_POST 94229U, // LD1Threev8h 5603349U, // LD1Threev8h_POST 36885U, // LD1Twov16b 3973141U, // LD1Twov16b_POST 45077U, // LD1Twov1d 4243477U, // LD1Twov1d_POST 53269U, // LD1Twov2d 3989525U, // LD1Twov2d_POST 61461U, // LD1Twov2s 4259861U, // LD1Twov2s_POST 69653U, // LD1Twov4h 4268053U, // LD1Twov4h_POST 77845U, // LD1Twov4s 4014101U, // LD1Twov4s_POST 86037U, // LD1Twov8b 4284437U, // LD1Twov8b_POST 94229U, // LD1Twov8h 4030485U, // LD1Twov8h_POST 6131733U, // LD1i16 6397973U, // LD1i16_POST 6139925U, // LD1i32 6668309U, // LD1i32_POST 6148117U, // LD1i64 6938645U, // LD1i64_POST 6156309U, // LD1i8 7208981U, // LD1i8_POST 38775U, // LD2Rv16b 5285751U, // LD2Rv16b_POST 46967U, // LD2Rv1d 4245367U, // LD2Rv1d_POST 55159U, // LD2Rv2d 4253559U, // LD2Rv2d_POST 63351U, // LD2Rv2s 4523895U, // LD2Rv2s_POST 71543U, // LD2Rv4h 5056375U, // LD2Rv4h_POST 79735U, // LD2Rv4s 4540279U, // LD2Rv4s_POST 87927U, // LD2Rv8b 5334903U, // LD2Rv8b_POST 96119U, // LD2Rv8h 5080951U, // LD2Rv8h_POST 36947U, // LD2Twov16b 3973203U, // LD2Twov16b_POST 53331U, // LD2Twov2d 3989587U, // LD2Twov2d_POST 61523U, // LD2Twov2s 4259923U, // LD2Twov2s_POST 69715U, // LD2Twov4h 4268115U, // LD2Twov4h_POST 77907U, // LD2Twov4s 4014163U, // LD2Twov4s_POST 86099U, // LD2Twov8b 4284499U, // LD2Twov8b_POST 94291U, // LD2Twov8h 4030547U, // LD2Twov8h_POST 6131795U, // LD2i16 6660179U, // LD2i16_POST 6139987U, // LD2i32 6930515U, // LD2i32_POST 6148179U, // LD2i64 7462995U, // LD2i64_POST 6156371U, // LD2i8 6422611U, // LD2i8_POST 38781U, // LD3Rv16b 7645053U, // LD3Rv16b_POST 46973U, // LD3Rv1d 5818237U, // LD3Rv1d_POST 55165U, // LD3Rv2d 5826429U, // LD3Rv2d_POST 63357U, // LD3Rv2s 7931773U, // LD3Rv2s_POST 71549U, // LD3Rv4h 8202109U, // LD3Rv4h_POST 79741U, // LD3Rv4s 7948157U, // LD3Rv4s_POST 87933U, // LD3Rv8b 7694205U, // LD3Rv8b_POST 96125U, // LD3Rv8h 8226685U, // LD3Rv8h_POST 37317U, // LD3Threev16b 5546437U, // LD3Threev16b_POST 53701U, // LD3Threev2d 5562821U, // LD3Threev2d_POST 61893U, // LD3Threev2s 5833157U, // LD3Threev2s_POST 70085U, // LD3Threev4h 5841349U, // LD3Threev4h_POST 78277U, // LD3Threev4s 5587397U, // LD3Threev4s_POST 86469U, // LD3Threev8b 5857733U, // LD3Threev8b_POST 94661U, // LD3Threev8h 5603781U, // LD3Threev8h_POST 6132165U, // LD3i16 8495557U, // LD3i16_POST 6140357U, // LD3i32 8765893U, // LD3i32_POST 6148549U, // LD3i64 9036229U, // LD3i64_POST 6156741U, // LD3i8 9306565U, // LD3i8_POST 37341U, // LD4Fourv16b 3711453U, // LD4Fourv16b_POST 53725U, // LD4Fourv2d 3727837U, // LD4Fourv2d_POST 61917U, // LD4Fourv2s 3998173U, // LD4Fourv2s_POST 70109U, // LD4Fourv4h 4006365U, // LD4Fourv4h_POST 78301U, // LD4Fourv4s 3752413U, // LD4Fourv4s_POST 86493U, // LD4Fourv8b 4022749U, // LD4Fourv8b_POST 94685U, // LD4Fourv8h 3768797U, // LD4Fourv8h_POST 38787U, // LD4Rv16b 5023619U, // LD4Rv16b_POST 46979U, // LD4Rv1d 3983235U, // LD4Rv1d_POST 55171U, // LD4Rv2d 3991427U, // LD4Rv2d_POST 63363U, // LD4Rv2s 4261763U, // LD4Rv2s_POST 71555U, // LD4Rv4h 4532099U, // LD4Rv4h_POST 79747U, // LD4Rv4s 4278147U, // LD4Rv4s_POST 87939U, // LD4Rv8b 5072771U, // LD4Rv8b_POST 96131U, // LD4Rv8h 4556675U, // LD4Rv8h_POST 6132189U, // LD4i16 6922717U, // LD4i16_POST 6140381U, // LD4i32 7455197U, // LD4i32_POST 6148573U, // LD4i64 9560541U, // LD4i64_POST 6156765U, // LD4i8 6685149U, // LD4i8_POST 26485304U, // LDARB 26485801U, // LDARH 26486665U, // LDARW 26486665U, // LDARX 553920315U, // LDAXPW 553920315U, // LDAXPX 26485358U, // LDAXRB 26485855U, // LDAXRH 26486787U, // LDAXRW 26486787U, // LDAXRX 553920258U, // LDNPDi 553920258U, // LDNPQi 553920258U, // LDNPSi 553920258U, // LDNPWi 553920258U, // LDNPXi 553920190U, // LDPDi 604276414U, // LDPDpost 604276414U, // LDPDpre 553920190U, // LDPQi 604276414U, // LDPQpost 604276414U, // LDPQpre 553920974U, // LDPSWi 604277198U, // LDPSWpost 604277198U, // LDPSWpre 553920190U, // LDPSi 604276414U, // LDPSpost 604276414U, // LDPSpre 553920190U, // LDPWi 604276414U, // LDPWpost 604276414U, // LDPWpre 553920190U, // LDPXi 604276414U, // LDPXpost 604276414U, // LDPXpre 1150583359U, // LDRBBpost 76841535U, // LDRBBpre 26485311U, // LDRBBroW 26485311U, // LDRBBroX 26485311U, // LDRBBui 1150584728U, // LDRBpost 76842904U, // LDRBpre 26486680U, // LDRBroW 26486680U, // LDRBroX 26486680U, // LDRBui 100935576U, // LDRDl 1150584728U, // LDRDpost 76842904U, // LDRDpre 26486680U, // LDRDroW 26486680U, // LDRDroX 26486680U, // LDRDui 1150583856U, // LDRHHpost 76842032U, // LDRHHpre 26485808U, // LDRHHroW 26485808U, // LDRHHroX 26485808U, // LDRHHui 1150584728U, // LDRHpost 76842904U, // LDRHpre 26486680U, // LDRHroW 26486680U, // LDRHroX 26486680U, // LDRHui 100935576U, // LDRQl 1150584728U, // LDRQpost 76842904U, // LDRQpre 26486680U, // LDRQroW 26486680U, // LDRQroX 26486680U, // LDRQui 1150583446U, // LDRSBWpost 76841622U, // LDRSBWpre 26485398U, // LDRSBWroW 26485398U, // LDRSBWroX 26485398U, // LDRSBWui 1150583446U, // LDRSBXpost 76841622U, // LDRSBXpre 26485398U, // LDRSBXroW 26485398U, // LDRSBXroX 26485398U, // LDRSBXui 1150583933U, // LDRSHWpost 76842109U, // LDRSHWpre 26485885U, // LDRSHWroW 26485885U, // LDRSHWroX 26485885U, // LDRSHWui 1150583933U, // LDRSHXpost 76842109U, // LDRSHXpre 26485885U, // LDRSHXroW 26485885U, // LDRSHXroX 26485885U, // LDRSHXui 100936149U, // LDRSWl 1150585301U, // LDRSWpost 76843477U, // LDRSWpre 26487253U, // LDRSWroW 26487253U, // LDRSWroX 26487253U, // LDRSWui 100935576U, // LDRSl 1150584728U, // LDRSpost 76842904U, // LDRSpre 26486680U, // LDRSroW 26486680U, // LDRSroX 26486680U, // LDRSui 100935576U, // LDRWl 1150584728U, // LDRWpost 76842904U, // LDRWpre 26486680U, // LDRWroW 26486680U, // LDRWroX 26486680U, // LDRWui 100935576U, // LDRXl 1150584728U, // LDRXpost 76842904U, // LDRXpre 26486680U, // LDRXroW 26486680U, // LDRXroX 26486680U, // LDRXui 26485324U, // LDTRBi 26485821U, // LDTRHi 26485405U, // LDTRSBWi 26485405U, // LDTRSBXi 26485892U, // LDTRSHWi 26485892U, // LDTRSHXi 26487260U, // LDTRSWi 26486752U, // LDTRWi 26486752U, // LDTRXi 26485344U, // LDURBBi 26486775U, // LDURBi 26486775U, // LDURDi 26485841U, // LDURHHi 26486775U, // LDURHi 26486775U, // LDURQi 26485413U, // LDURSBWi 26485413U, // LDURSBXi 26485900U, // LDURSHWi 26485900U, // LDURSHXi 26487268U, // LDURSWi 26486775U, // LDURSi 26486775U, // LDURWi 26486775U, // LDURXi 553920343U, // LDXPW 553920343U, // LDXPX 26485366U, // LDXRB 26485863U, // LDXRH 26486794U, // LDXRW 26486794U, // LDXRX 0U, // LOADgot 17049003U, // LSLVWr 17049003U, // LSLVXr 17049558U, // LSRVWr 17049558U, // LSRVXr 17048395U, // MADDWrrr 17048395U, // MADDXrrr 2181050875U, // MLAv16i8 2718446075U, // MLAv2i32 2718446075U, // MLAv2i32_indexed 3255841275U, // MLAv4i16 3255841275U, // MLAv4i16_indexed 1108619771U, // MLAv4i32 1108619771U, // MLAv4i32_indexed 1645752827U, // MLAv8i16 1645752827U, // MLAv8i16_indexed 3793498619U, // MLAv8i8 2181052514U, // MLSv16i8 2718447714U, // MLSv2i32 2718447714U, // MLSv2i32_indexed 3255842914U, // MLSv4i16 3255842914U, // MLSv4i16_indexed 1108621410U, // MLSv4i32 1108621410U, // MLSv4i32_indexed 1645754466U, // MLSv8i16 1645754466U, // MLSv8i16_indexed 3793500258U, // MLSv8i8 168043698U, // MOVID 721425586U, // MOVIv16b_ns 168563890U, // MOVIv2d_ns 1795691698U, // MOVIv2i32 1795691698U, // MOVIv2s_msl 1796215986U, // MOVIv4i16 1796478130U, // MOVIv4i32 1796478130U, // MOVIv4s_msl 723260594U, // MOVIv8b_ns 1796740274U, // MOVIv8i16 84157629U, // MOVKWi 84157629U, // MOVKXi 1795434146U, // MOVNWi 1795434146U, // MOVNXi 1795435093U, // MOVZWi 1795435093U, // MOVZXi 0U, // MOVaddr 0U, // MOVaddrBA 0U, // MOVaddrCP 0U, // MOVaddrEXT 0U, // MOVaddrJT 0U, // MOVaddrTLS 0U, // MOVi32imm 0U, // MOVi64imm 201599116U, // MRS 137179U, // MSR 141275U, // MSRpstate 17048258U, // MSUBWrrr 17048258U, // MSUBXrrr 2147489228U, // MULv16i8 2684884428U, // MULv2i32 2684884428U, // MULv2i32_indexed 3222279628U, // MULv4i16 3222279628U, // MULv4i16_indexed 1075058124U, // MULv4i32 1075058124U, // MULv4i32_indexed 1612191180U, // MULv8i16 1612191180U, // MULv8i16_indexed 3759936972U, // MULv8i8 1795691679U, // MVNIv2i32 1795691679U, // MVNIv2s_msl 1796215967U, // MVNIv4i16 1796478111U, // MVNIv4i32 1796478111U, // MVNIv4s_msl 1796740255U, // MVNIv8i16 5076U, // NEGv16i8 553919444U, // NEGv1i64 1074271188U, // NEGv2i32 1611404244U, // NEGv2i64 2148537300U, // NEGv4i16 2685670356U, // NEGv4i32 3222803412U, // NEGv8i16 3759936468U, // NEGv8i8 6353U, // NOTv16i8 3759937745U, // NOTv8i8 0U, // ORNWrr 17049189U, // ORNWrs 0U, // ORNXrr 17049189U, // ORNXrs 2147489381U, // ORNv16i8 3759937125U, // ORNv8i8 17049548U, // ORRWri 0U, // ORRWrr 17049548U, // ORRWrs 17049548U, // ORRXri 0U, // ORRXrr 17049548U, // ORRXrs 2147489740U, // ORRv16i8 84424652U, // ORRv2i32 84948940U, // ORRv4i16 85211084U, // ORRv4i32 85473228U, // ORRv8i16 3759937484U, // ORRv8i8 2149060822U, // PMULLv16i8 228070797U, // PMULLv1i64 244846806U, // PMULLv2i64 3759674765U, // PMULLv8i8 2147489240U, // PMULv16i8 3759936984U, // PMULv8i8 101070321U, // PRFMl 26621425U, // PRFMroW 26621425U, // PRFMroX 26621425U, // PRFMui 26621455U, // PRFUMi 537400862U, // RADDHNv2i64_v2i32 571748633U, // RADDHNv2i64_v4i32 1074796062U, // RADDHNv4i32_v4i16 1108881689U, // RADDHNv4i32_v8i16 1644179737U, // RADDHNv8i16_v16i8 1612453406U, // RADDHNv8i16_v8i8 553920698U, // RBITWr 553920698U, // RBITXr 6330U, // RBITv16i8 3759937722U, // RBITv8i8 2107559U, // RET 0U, // RET_ReallyLR 553918951U, // REV16Wr 553918951U, // REV16Xr 4583U, // REV16v16i8 3759935975U, // REV16v8i8 553918540U, // REV32Xr 4172U, // REV32v16i8 2148536396U, // REV32v4i16 3222802508U, // REV32v8i16 3759935564U, // REV32v8i8 4566U, // REV64v16i8 1074270678U, // REV64v2i32 2148536790U, // REV64v4i16 2685669846U, // REV64v4i32 3222802902U, // REV64v8i16 3759935958U, // REV64v8i8 553920805U, // REVWr 553920805U, // REVXr 17049543U, // RORVWr 17049543U, // RORVXr 1644179766U, // RSHRNv16i8_shift 537400917U, // RSHRNv2i32_shift 1074796117U, // RSHRNv4i16_shift 571748662U, // RSHRNv4i32_shift 1108881718U, // RSHRNv8i16_shift 1612453461U, // RSHRNv8i8_shift 537400854U, // RSUBHNv2i64_v2i32 571748624U, // RSUBHNv2i64_v4i32 1074796054U, // RSUBHNv4i32_v4i16 1108881680U, // RSUBHNv4i32_v8i16 1644179728U, // RSUBHNv8i16_v16i8 1612453398U, // RSUBHNv8i16_v8i8 2182623330U, // SABALv16i8_v8i16 2718708931U, // SABALv2i32_v2i64 3256104131U, // SABALv4i16_v4i32 1108095074U, // SABALv4i32_v2i64 1645490274U, // SABALv8i16_v4i32 3793237187U, // SABALv8i8_v8i16 2181050862U, // SABAv16i8 2718446062U, // SABAv2i32 3255841262U, // SABAv4i16 1108619758U, // SABAv4i32 1645752814U, // SABAv8i16 3793498606U, // SABAv8i8 2149060764U, // SABDLv16i8_v8i16 2685146379U, // SABDLv2i32_v2i64 3222541579U, // SABDLv4i16_v4i32 1074532508U, // SABDLv4i32_v2i64 1611927708U, // SABDLv8i16_v4i32 3759674635U, // SABDLv8i8_v8i16 2147488538U, // SABDv16i8 2684883738U, // SABDv2i32 3222278938U, // SABDv4i16 1075057434U, // SABDv4i32 1612190490U, // SABDv8i16 3759936282U, // SABDv8i8 35141315U, // SADALPv16i8_v8i16 1117533891U, // SADALPv2i32_v1i64 2181576387U, // SADALPv4i16_v2i32 2718709443U, // SADALPv4i32_v2i64 3256104643U, // SADALPv8i16_v4i32 3792713411U, // SADALPv8i8_v4i16 1578707U, // SADDLPv16i8_v8i16 1083971283U, // SADDLPv2i32_v1i64 2148013779U, // SADDLPv4i16_v2i32 2685146835U, // SADDLPv4i32_v2i64 3222542035U, // SADDLPv8i16_v4i32 3759150803U, // SADDLPv8i8_v4i16 272700U, // SADDLVv16i8v 2147756348U, // SADDLVv4i16v 2684627260U, // SADDLVv4i32v 3221498172U, // SADDLVv8i16v 3758369084U, // SADDLVv8i8v 2149060780U, // SADDLv16i8_v8i16 2685146409U, // SADDLv2i32_v2i64 3222541609U, // SADDLv4i16_v4i32 1074532524U, // SADDLv4i32_v2i64 1611927724U, // SADDLv8i16_v4i32 3759674665U, // SADDLv8i8_v8i16 1612190133U, // SADDWv16i8_v8i16 537663936U, // SADDWv2i32_v2i64 1075059136U, // SADDWv4i16_v4i32 537661877U, // SADDWv4i32_v2i64 1075057077U, // SADDWv8i16_v4i32 1612192192U, // SADDWv8i8_v8i16 17049656U, // SBCSWr 17049656U, // SBCSXr 17048293U, // SBCWr 17048293U, // SBCXr 17049061U, // SBFMWri 17049061U, // SBFMXri 17048517U, // SCVTFSWDri 17048517U, // SCVTFSWSri 17048517U, // SCVTFSXDri 17048517U, // SCVTFSXSri 553919429U, // SCVTFUWDri 553919429U, // SCVTFUWSri 553919429U, // SCVTFUXDri 553919429U, // SCVTFUXSri 17048517U, // SCVTFd 17048517U, // SCVTFs 553919429U, // SCVTFv1i32 553919429U, // SCVTFv1i64 1074271173U, // SCVTFv2f32 1611404229U, // SCVTFv2f64 2684883909U, // SCVTFv2i32_shift 537662405U, // SCVTFv2i64_shift 2685670341U, // SCVTFv4f32 1075057605U, // SCVTFv4i32_shift 17049904U, // SDIVWr 17049904U, // SDIVXr 17049904U, // SDIV_IntWr 17049904U, // SDIV_IntXr 67404510U, // SHA1Crrr 553919463U, // SHA1Hrr 67405278U, // SHA1Mrrr 67405488U, // SHA1Prrr 1108619265U, // SHA1SU0rrr 2719232056U, // SHA1SU1rr 67403864U, // SHA256H2rrr 67404790U, // SHA256Hrrr 2719232010U, // SHA256SU0rr 1108619329U, // SHA256SU1rrr 2147488572U, // SHADDv16i8 2684883772U, // SHADDv2i32 3222278972U, // SHADDv4i16 1075057468U, // SHADDv4i32 1612190524U, // SHADDv8i16 3759936316U, // SHADDv8i8 2149060797U, // SHLLv16i8 2685146487U, // SHLLv2i32 3222541687U, // SHLLv4i16 3758887101U, // SHLLv4i32 1315005U, // SHLLv8i16 538449271U, // SHLLv8i8 17048896U, // SHLd 2147489088U, // SHLv16i8_shift 2684884288U, // SHLv2i32_shift 537662784U, // SHLv2i64_shift 3222279488U, // SHLv4i16_shift 1075057984U, // SHLv4i32_shift 1612191040U, // SHLv8i16_shift 3759936832U, // SHLv8i8_shift 1644179748U, // SHRNv16i8_shift 537400901U, // SHRNv2i32_shift 1074796101U, // SHRNv4i16_shift 571748644U, // SHRNv4i32_shift 1108881700U, // SHRNv8i16_shift 1612453445U, // SHRNv8i8_shift 2147488435U, // SHSUBv16i8 2684883635U, // SHSUBv2i32 3222278835U, // SHSUBv4i16 1075057331U, // SHSUBv4i32 1612190387U, // SHSUBv8i16 3759936179U, // SHSUBv8i8 67404954U, // SLId 2181051546U, // SLIv16i8_shift 2718446746U, // SLIv2i32_shift 571225242U, // SLIv2i64_shift 3255841946U, // SLIv4i16_shift 1108620442U, // SLIv4i32_shift 1645753498U, // SLIv8i16_shift 3793499290U, // SLIv8i8_shift 17048857U, // SMADDLrrr 2147489609U, // SMAXPv16i8 2684884809U, // SMAXPv2i32 3222280009U, // SMAXPv4i16 1075058505U, // SMAXPv4i32 1612191561U, // SMAXPv8i16 3759937353U, // SMAXPv8i8 272787U, // SMAXVv16i8v 2147756435U, // SMAXVv4i16v 2684627347U, // SMAXVv4i32v 3221498259U, // SMAXVv8i16v 3758369171U, // SMAXVv8i8v 2147490298U, // SMAXv16i8 2684885498U, // SMAXv2i32 3222280698U, // SMAXv4i16 1075059194U, // SMAXv4i32 1612192250U, // SMAXv8i16 3759938042U, // SMAXv8i8 21246U, // SMC 2147489551U, // SMINPv16i8 2684884751U, // SMINPv2i32 3222279951U, // SMINPv4i16 1075058447U, // SMINPv4i32 1612191503U, // SMINPv8i16 3759937295U, // SMINPv8i8 272741U, // SMINVv16i8v 2147756389U, // SMINVv4i16v 2684627301U, // SMINVv4i32v 3221498213U, // SMINVv8i16v 3758369125U, // SMINVv8i8v 2147489324U, // SMINv16i8 2684884524U, // SMINv2i32 3222279724U, // SMINv4i16 1075058220U, // SMINv4i32 1612191276U, // SMINv8i16 3759937068U, // SMINv8i8 2182623356U, // SMLALv16i8_v8i16 2718708954U, // SMLALv2i32_indexed 2718708954U, // SMLALv2i32_v2i64 3256104154U, // SMLALv4i16_indexed 3256104154U, // SMLALv4i16_v4i32 1108095100U, // SMLALv4i32_indexed 1108095100U, // SMLALv4i32_v2i64 1645490300U, // SMLALv8i16_indexed 1645490300U, // SMLALv8i16_v4i32 3793237210U, // SMLALv8i8_v8i16 2182623480U, // SMLSLv16i8_v8i16 2718709168U, // SMLSLv2i32_indexed 2718709168U, // SMLSLv2i32_v2i64 3256104368U, // SMLSLv4i16_indexed 3256104368U, // SMLSLv4i16_v4i32 1108095224U, // SMLSLv4i32_indexed 1108095224U, // SMLSLv4i32_v2i64 1645490424U, // SMLSLv8i16_indexed 1645490424U, // SMLSLv8i16_v4i32 3793237424U, // SMLSLv8i8_v8i16 272768U, // SMOVvi16to32 272768U, // SMOVvi16to64 537143680U, // SMOVvi32to64 1610885504U, // SMOVvi8to32 1610885504U, // SMOVvi8to64 17048813U, // SMSUBLrrr 17048603U, // SMULHrr 2149060830U, // SMULLv16i8_v8i16 2685146516U, // SMULLv2i32_indexed 2685146516U, // SMULLv2i32_v2i64 3222541716U, // SMULLv4i16_indexed 3222541716U, // SMULLv4i16_v4i32 1074532574U, // SMULLv4i32_indexed 1074532574U, // SMULLv4i32_v2i64 1611927774U, // SMULLv8i16_indexed 1611927774U, // SMULLv8i16_v4i32 3759674772U, // SMULLv8i8_v8i16 6187U, // SQABSv16i8 553920555U, // SQABSv1i16 553920555U, // SQABSv1i32 553920555U, // SQABSv1i64 553920555U, // SQABSv1i8 1074272299U, // SQABSv2i32 1611405355U, // SQABSv2i64 2148538411U, // SQABSv4i16 2685671467U, // SQABSv4i32 3222804523U, // SQABSv8i16 3759937579U, // SQABSv8i8 2147488602U, // SQADDv16i8 17048410U, // SQADDv1i16 17048410U, // SQADDv1i32 17048410U, // SQADDv1i64 17048410U, // SQADDv1i8 2684883802U, // SQADDv2i32 537662298U, // SQADDv2i64 3222279002U, // SQADDv4i16 1075057498U, // SQADDv4i32 1612190554U, // SQADDv8i16 3759936346U, // SQADDv8i8 67405009U, // SQDMLALi16 67405009U, // SQDMLALi32 67405009U, // SQDMLALv1i32_indexed 67405009U, // SQDMLALv1i64_indexed 2718708945U, // SQDMLALv2i32_indexed 2718708945U, // SQDMLALv2i32_v2i64 3256104145U, // SQDMLALv4i16_indexed 3256104145U, // SQDMLALv4i16_v4i32 1108095090U, // SQDMLALv4i32_indexed 1108095090U, // SQDMLALv4i32_v2i64 1645490290U, // SQDMLALv8i16_indexed 1645490290U, // SQDMLALv8i16_v4i32 67405223U, // SQDMLSLi16 67405223U, // SQDMLSLi32 67405223U, // SQDMLSLv1i32_indexed 67405223U, // SQDMLSLv1i64_indexed 2718709159U, // SQDMLSLv2i32_indexed 2718709159U, // SQDMLSLv2i32_v2i64 3256104359U, // SQDMLSLv4i16_indexed 3256104359U, // SQDMLSLv4i16_v4i32 1108095214U, // SQDMLSLv4i32_indexed 1108095214U, // SQDMLSLv4i32_v2i64 1645490414U, // SQDMLSLv8i16_indexed 1645490414U, // SQDMLSLv8i16_v4i32 17048584U, // SQDMULHv1i16 17048584U, // SQDMULHv1i16_indexed 17048584U, // SQDMULHv1i32 17048584U, // SQDMULHv1i32_indexed 2684883976U, // SQDMULHv2i32 2684883976U, // SQDMULHv2i32_indexed 3222279176U, // SQDMULHv4i16 3222279176U, // SQDMULHv4i16_indexed 1075057672U, // SQDMULHv4i32 1075057672U, // SQDMULHv4i32_indexed 1612190728U, // SQDMULHv8i16 1612190728U, // SQDMULHv8i16_indexed 17048964U, // SQDMULLi16 17048964U, // SQDMULLi32 17048964U, // SQDMULLv1i32_indexed 17048964U, // SQDMULLv1i64_indexed 2685146500U, // SQDMULLv2i32_indexed 2685146500U, // SQDMULLv2i32_v2i64 3222541700U, // SQDMULLv4i16_indexed 3222541700U, // SQDMULLv4i16_v4i32 1074532556U, // SQDMULLv4i32_indexed 1074532556U, // SQDMULLv4i32_v2i64 1611927756U, // SQDMULLv8i16_indexed 1611927756U, // SQDMULLv8i16_v4i32 5081U, // SQNEGv16i8 553919449U, // SQNEGv1i16 553919449U, // SQNEGv1i32 553919449U, // SQNEGv1i64 553919449U, // SQNEGv1i8 1074271193U, // SQNEGv2i32 1611404249U, // SQNEGv2i64 2148537305U, // SQNEGv4i16 2685670361U, // SQNEGv4i32 3222803417U, // SQNEGv8i16 3759936473U, // SQNEGv8i8 17048593U, // SQRDMULHv1i16 17048593U, // SQRDMULHv1i16_indexed 17048593U, // SQRDMULHv1i32 17048593U, // SQRDMULHv1i32_indexed 2684883985U, // SQRDMULHv2i32 2684883985U, // SQRDMULHv2i32_indexed 3222279185U, // SQRDMULHv4i16 3222279185U, // SQRDMULHv4i16_indexed 1075057681U, // SQRDMULHv4i32 1075057681U, // SQRDMULHv4i32_indexed 1612190737U, // SQRDMULHv8i16 1612190737U, // SQRDMULHv8i16_indexed 2147489100U, // SQRSHLv16i8 17048908U, // SQRSHLv1i16 17048908U, // SQRSHLv1i32 17048908U, // SQRSHLv1i64 17048908U, // SQRSHLv1i8 2684884300U, // SQRSHLv2i32 537662796U, // SQRSHLv2i64 3222279500U, // SQRSHLv4i16 1075057996U, // SQRSHLv4i32 1612191052U, // SQRSHLv8i16 3759936844U, // SQRSHLv8i8 17049171U, // SQRSHRNb 17049171U, // SQRSHRNh 17049171U, // SQRSHRNs 1644179764U, // SQRSHRNv16i8_shift 537400915U, // SQRSHRNv2i32_shift 1074796115U, // SQRSHRNv4i16_shift 571748660U, // SQRSHRNv4i32_shift 1108881716U, // SQRSHRNv8i16_shift 1612453459U, // SQRSHRNv8i8_shift 17049232U, // SQRSHRUNb 17049232U, // SQRSHRUNh 17049232U, // SQRSHRUNs 1644179824U, // SQRSHRUNv16i8_shift 537400976U, // SQRSHRUNv2i32_shift 1074796176U, // SQRSHRUNv4i16_shift 571748720U, // SQRSHRUNv4i32_shift 1108881776U, // SQRSHRUNv8i16_shift 1612453520U, // SQRSHRUNv8i8_shift 17049847U, // SQSHLUb 17049847U, // SQSHLUd 17049847U, // SQSHLUh 17049847U, // SQSHLUs 2147490039U, // SQSHLUv16i8_shift 2684885239U, // SQSHLUv2i32_shift 537663735U, // SQSHLUv2i64_shift 3222280439U, // SQSHLUv4i16_shift 1075058935U, // SQSHLUv4i32_shift 1612191991U, // SQSHLUv8i16_shift 3759937783U, // SQSHLUv8i8_shift 17048894U, // SQSHLb 17048894U, // SQSHLd 17048894U, // SQSHLh 17048894U, // SQSHLs 2147489086U, // SQSHLv16i8 2147489086U, // SQSHLv16i8_shift 17048894U, // SQSHLv1i16 17048894U, // SQSHLv1i32 17048894U, // SQSHLv1i64 17048894U, // SQSHLv1i8 2684884286U, // SQSHLv2i32 2684884286U, // SQSHLv2i32_shift 537662782U, // SQSHLv2i64 537662782U, // SQSHLv2i64_shift 3222279486U, // SQSHLv4i16 3222279486U, // SQSHLv4i16_shift 1075057982U, // SQSHLv4i32 1075057982U, // SQSHLv4i32_shift 1612191038U, // SQSHLv8i16 1612191038U, // SQSHLv8i16_shift 3759936830U, // SQSHLv8i8 3759936830U, // SQSHLv8i8_shift 17049155U, // SQSHRNb 17049155U, // SQSHRNh 17049155U, // SQSHRNs 1644179746U, // SQSHRNv16i8_shift 537400899U, // SQSHRNv2i32_shift 1074796099U, // SQSHRNv4i16_shift 571748642U, // SQSHRNv4i32_shift 1108881698U, // SQSHRNv8i16_shift 1612453443U, // SQSHRNv8i8_shift 17049223U, // SQSHRUNb 17049223U, // SQSHRUNh 17049223U, // SQSHRUNs 1644179814U, // SQSHRUNv16i8_shift 537400967U, // SQSHRUNv2i32_shift 1074796167U, // SQSHRUNv4i16_shift 571748710U, // SQSHRUNv4i32_shift 1108881766U, // SQSHRUNv8i16_shift 1612453511U, // SQSHRUNv8i8_shift 2147488464U, // SQSUBv16i8 17048272U, // SQSUBv1i16 17048272U, // SQSUBv1i32 17048272U, // SQSUBv1i64 17048272U, // SQSUBv1i8 2684883664U, // SQSUBv2i32 537662160U, // SQSUBv2i64 3222278864U, // SQSUBv4i16 1075057360U, // SQSUBv4i32 1612190416U, // SQSUBv8i16 3759936208U, // SQSUBv8i8 3254792534U, // SQXTNv16i8 553920121U, // SQXTNv1i16 553920121U, // SQXTNv1i32 553920121U, // SQXTNv1i8 1611142777U, // SQXTNv2i32 2685408889U, // SQXTNv4i16 1645490518U, // SQXTNv4i32 2719494486U, // SQXTNv8i16 3223066233U, // SQXTNv8i8 3254792571U, // SQXTUNv16i8 553920154U, // SQXTUNv1i16 553920154U, // SQXTUNv1i32 553920154U, // SQXTUNv1i8 1611142810U, // SQXTUNv2i32 2685408922U, // SQXTUNv4i16 1645490555U, // SQXTUNv4i32 2719494523U, // SQXTUNv8i16 3223066266U, // SQXTUNv8i8 2147488556U, // SRHADDv16i8 2684883756U, // SRHADDv2i32 3222278956U, // SRHADDv4i16 1075057452U, // SRHADDv4i32 1612190508U, // SRHADDv8i16 3759936300U, // SRHADDv8i8 67404965U, // SRId 2181051557U, // SRIv16i8_shift 2718446757U, // SRIv2i32_shift 571225253U, // SRIv2i64_shift 3255841957U, // SRIv4i16_shift 1108620453U, // SRIv4i32_shift 1645753509U, // SRIv8i16_shift 3793499301U, // SRIv8i8_shift 2147489116U, // SRSHLv16i8 17048924U, // SRSHLv1i64 2684884316U, // SRSHLv2i32 537662812U, // SRSHLv2i64 3222279516U, // SRSHLv4i16 1075058012U, // SRSHLv4i32 1612191068U, // SRSHLv8i16 3759936860U, // SRSHLv8i8 17049501U, // SRSHRd 2147489693U, // SRSHRv16i8_shift 2684884893U, // SRSHRv2i32_shift 537663389U, // SRSHRv2i64_shift 3222280093U, // SRSHRv4i16_shift 1075058589U, // SRSHRv4i32_shift 1612191645U, // SRSHRv8i16_shift 3759937437U, // SRSHRv8i8_shift 67404288U, // SRSRAd 2181050880U, // SRSRAv16i8_shift 2718446080U, // SRSRAv2i32_shift 571224576U, // SRSRAv2i64_shift 3255841280U, // SRSRAv4i16_shift 1108619776U, // SRSRAv4i32_shift 1645752832U, // SRSRAv8i16_shift 3793498624U, // SRSRAv8i8_shift 2149060796U, // SSHLLv16i8_shift 2685146486U, // SSHLLv2i32_shift 3222541686U, // SSHLLv4i16_shift 1074532540U, // SSHLLv4i32_shift 1611927740U, // SSHLLv8i16_shift 3759674742U, // SSHLLv8i8_shift 2147489130U, // SSHLv16i8 17048938U, // SSHLv1i64 2684884330U, // SSHLv2i32 537662826U, // SSHLv2i64 3222279530U, // SSHLv4i16 1075058026U, // SSHLv4i32 1612191082U, // SSHLv8i16 3759936874U, // SSHLv8i8 17049515U, // SSHRd 2147489707U, // SSHRv16i8_shift 2684884907U, // SSHRv2i32_shift 537663403U, // SSHRv2i64_shift 3222280107U, // SSHRv4i16_shift 1075058603U, // SSHRv4i32_shift 1612191659U, // SSHRv8i16_shift 3759937451U, // SSHRv8i8_shift 67404302U, // SSRAd 2181050894U, // SSRAv16i8_shift 2718446094U, // SSRAv2i32_shift 571224590U, // SSRAv2i64_shift 3255841294U, // SSRAv4i16_shift 1108619790U, // SSRAv4i32_shift 1645752846U, // SSRAv8i16_shift 3793498638U, // SSRAv8i8_shift 2149060748U, // SSUBLv16i8_v8i16 2685146365U, // SSUBLv2i32_v2i64 3222541565U, // SSUBLv4i16_v4i32 1074532492U, // SSUBLv4i32_v2i64 1611927692U, // SSUBLv8i16_v4i32 3759674621U, // SSUBLv8i8_v8i16 1612190117U, // SSUBWv16i8_v8i16 537663913U, // SSUBWv2i32_v2i64 1075059113U, // SSUBWv4i16_v4i32 537661861U, // SSUBWv4i32_v2i64 1075057061U, // SSUBWv8i16_v4i32 1612192169U, // SSUBWv8i8_v8i16 36915U, // ST1Fourv16b 3711027U, // ST1Fourv16b_POST 45107U, // ST1Fourv1d 3981363U, // ST1Fourv1d_POST 53299U, // ST1Fourv2d 3727411U, // ST1Fourv2d_POST 61491U, // ST1Fourv2s 3997747U, // ST1Fourv2s_POST 69683U, // ST1Fourv4h 4005939U, // ST1Fourv4h_POST 77875U, // ST1Fourv4s 3751987U, // ST1Fourv4s_POST 86067U, // ST1Fourv8b 4022323U, // ST1Fourv8b_POST 94259U, // ST1Fourv8h 3768371U, // ST1Fourv8h_POST 36915U, // ST1Onev16b 4235315U, // ST1Onev16b_POST 45107U, // ST1Onev1d 4505651U, // ST1Onev1d_POST 53299U, // ST1Onev2d 4251699U, // ST1Onev2d_POST 61491U, // ST1Onev2s 4522035U, // ST1Onev2s_POST 69683U, // ST1Onev4h 4530227U, // ST1Onev4h_POST 77875U, // ST1Onev4s 4276275U, // ST1Onev4s_POST 86067U, // ST1Onev8b 4546611U, // ST1Onev8b_POST 94259U, // ST1Onev8h 4292659U, // ST1Onev8h_POST 36915U, // ST1Threev16b 5546035U, // ST1Threev16b_POST 45107U, // ST1Threev1d 5816371U, // ST1Threev1d_POST 53299U, // ST1Threev2d 5562419U, // ST1Threev2d_POST 61491U, // ST1Threev2s 5832755U, // ST1Threev2s_POST 69683U, // ST1Threev4h 5840947U, // ST1Threev4h_POST 77875U, // ST1Threev4s 5586995U, // ST1Threev4s_POST 86067U, // ST1Threev8b 5857331U, // ST1Threev8b_POST 94259U, // ST1Threev8h 5603379U, // ST1Threev8h_POST 36915U, // ST1Twov16b 3973171U, // ST1Twov16b_POST 45107U, // ST1Twov1d 4243507U, // ST1Twov1d_POST 53299U, // ST1Twov2d 3989555U, // ST1Twov2d_POST 61491U, // ST1Twov2s 4259891U, // ST1Twov2s_POST 69683U, // ST1Twov4h 4268083U, // ST1Twov4h_POST 77875U, // ST1Twov4s 4014131U, // ST1Twov4s_POST 86067U, // ST1Twov8b 4284467U, // ST1Twov8b_POST 94259U, // ST1Twov8h 4030515U, // ST1Twov8h_POST 147507U, // ST1i16 262246451U, // ST1i16_POST 151603U, // ST1i32 279031859U, // ST1i32_POST 155699U, // ST1i64 295817267U, // ST1i64_POST 159795U, // ST1i8 312602675U, // ST1i8_POST 37280U, // ST2Twov16b 3973536U, // ST2Twov16b_POST 53664U, // ST2Twov2d 3989920U, // ST2Twov2d_POST 61856U, // ST2Twov2s 4260256U, // ST2Twov2s_POST 70048U, // ST2Twov4h 4268448U, // ST2Twov4h_POST 78240U, // ST2Twov4s 4014496U, // ST2Twov4s_POST 86432U, // ST2Twov8b 4284832U, // ST2Twov8b_POST 94624U, // ST2Twov8h 4030880U, // ST2Twov8h_POST 147872U, // ST2i16 279024032U, // ST2i16_POST 151968U, // ST2i32 295809440U, // ST2i32_POST 156064U, // ST2i64 329372064U, // ST2i64_POST 160160U, // ST2i8 262271392U, // ST2i8_POST 37329U, // ST3Threev16b 5546449U, // ST3Threev16b_POST 53713U, // ST3Threev2d 5562833U, // ST3Threev2d_POST 61905U, // ST3Threev2s 5833169U, // ST3Threev2s_POST 70097U, // ST3Threev4h 5841361U, // ST3Threev4h_POST 78289U, // ST3Threev4s 5587409U, // ST3Threev4s_POST 86481U, // ST3Threev8b 5857745U, // ST3Threev8b_POST 94673U, // ST3Threev8h 5603793U, // ST3Threev8h_POST 147921U, // ST3i16 346132945U, // ST3i16_POST 152017U, // ST3i32 362918353U, // ST3i32_POST 156113U, // ST3i64 379703761U, // ST3i64_POST 160209U, // ST3i8 396489169U, // ST3i8_POST 37346U, // ST4Fourv16b 3711458U, // ST4Fourv16b_POST 53730U, // ST4Fourv2d 3727842U, // ST4Fourv2d_POST 61922U, // ST4Fourv2s 3998178U, // ST4Fourv2s_POST 70114U, // ST4Fourv4h 4006370U, // ST4Fourv4h_POST 78306U, // ST4Fourv4s 3752418U, // ST4Fourv4s_POST 86498U, // ST4Fourv8b 4022754U, // ST4Fourv8b_POST 94690U, // ST4Fourv8h 3768802U, // ST4Fourv8h_POST 147938U, // ST4i16 295801314U, // ST4i16_POST 152034U, // ST4i32 329363938U, // ST4i32_POST 156130U, // ST4i64 413258210U, // ST4i64_POST 160226U, // ST4i8 279048674U, // ST4i8_POST 26485317U, // STLRB 26485814U, // STLRH 26486716U, // STLRW 26486716U, // STLRX 17049437U, // STLXPW 17049437U, // STLXPX 553919101U, // STLXRB 553919598U, // STLXRH 553920528U, // STLXRW 553920528U, // STLXRX 553920285U, // STNPDi 553920285U, // STNPQi 553920285U, // STNPSi 553920285U, // STNPWi 553920285U, // STNPXi 553920305U, // STPDi 604276529U, // STPDpost 604276529U, // STPDpre 553920305U, // STPQi 604276529U, // STPQpost 604276529U, // STPQpre 553920305U, // STPSi 604276529U, // STPSpost 604276529U, // STPSpre 553920305U, // STPWi 604276529U, // STPWpost 604276529U, // STPWpre 553920305U, // STPXi 604276529U, // STPXpost 604276529U, // STPXpre 1150583379U, // STRBBpost 76841555U, // STRBBpre 26485331U, // STRBBroW 26485331U, // STRBBroX 26485331U, // STRBBui 1150584806U, // STRBpost 76842982U, // STRBpre 26486758U, // STRBroW 26486758U, // STRBroX 26486758U, // STRBui 1150584806U, // STRDpost 76842982U, // STRDpre 26486758U, // STRDroW 26486758U, // STRDroX 26486758U, // STRDui 1150583876U, // STRHHpost 76842052U, // STRHHpre 26485828U, // STRHHroW 26485828U, // STRHHroX 26485828U, // STRHHui 1150584806U, // STRHpost 76842982U, // STRHpre 26486758U, // STRHroW 26486758U, // STRHroX 26486758U, // STRHui 1150584806U, // STRQpost 76842982U, // STRQpre 26486758U, // STRQroW 26486758U, // STRQroX 26486758U, // STRQui 1150584806U, // STRSpost 76842982U, // STRSpre 26486758U, // STRSroW 26486758U, // STRSroX 26486758U, // STRSui 1150584806U, // STRWpost 76842982U, // STRWpre 26486758U, // STRWroW 26486758U, // STRWroX 26486758U, // STRWui 1150584806U, // STRXpost 76842982U, // STRXpre 26486758U, // STRXroW 26486758U, // STRXroX 26486758U, // STRXui 26485337U, // STTRBi 26485834U, // STTRHi 26486763U, // STTRWi 26486763U, // STTRXi 26485351U, // STURBBi 26486781U, // STURBi 26486781U, // STURDi 26485848U, // STURHHi 26486781U, // STURHi 26486781U, // STURQi 26486781U, // STURSi 26486781U, // STURWi 26486781U, // STURXi 17049444U, // STXPW 17049444U, // STXPX 553919109U, // STXRB 553919606U, // STXRH 553920535U, // STXRW 553920535U, // STXRX 537400855U, // SUBHNv2i64_v2i32 571748625U, // SUBHNv2i64_v4i32 1074796055U, // SUBHNv4i32_v4i16 1108881681U, // SUBHNv4i32_v8i16 1644179729U, // SUBHNv8i16_v16i8 1612453399U, // SUBHNv8i16_v8i8 17049650U, // SUBSWri 0U, // SUBSWrr 17049650U, // SUBSWrs 17049650U, // SUBSWrx 17049650U, // SUBSXri 0U, // SUBSXrr 17049650U, // SUBSXrs 17049650U, // SUBSXrx 17049650U, // SUBSXrx64 17048238U, // SUBWri 0U, // SUBWrr 17048238U, // SUBWrs 17048238U, // SUBWrx 17048238U, // SUBXri 0U, // SUBXrr 17048238U, // SUBXrs 17048238U, // SUBXrx 17048238U, // SUBXrx64 2147488430U, // SUBv16i8 17048238U, // SUBv1i64 2684883630U, // SUBv2i32 537662126U, // SUBv2i64 3222278830U, // SUBv4i16 1075057326U, // SUBv4i32 1612190382U, // SUBv8i16 3759936174U, // SUBv8i8 33567585U, // SUQADDv16i8 604275553U, // SUQADDv1i16 604275553U, // SUQADDv1i32 604275553U, // SUQADDv1i64 604275553U, // SUQADDv1i8 1107833697U, // SUQADDv2i32 1644966753U, // SUQADDv2i64 2182099809U, // SUQADDv4i16 2719232865U, // SUQADDv4i32 3256365921U, // SUQADDv8i16 3793498977U, // SUQADDv8i8 21263U, // SVC 17049022U, // SYSLxt 419702938U, // SYSxt 436212968U, // TBLv16i8Four 436212968U, // TBLv16i8One 436212968U, // TBLv16i8Three 436212968U, // TBLv16i8Two 4196144360U, // TBLv8i8Four 4196144360U, // TBLv8i8One 4196144360U, // TBLv8i8Three 4196144360U, // TBLv8i8Two 17050183U, // TBNZW 17050183U, // TBNZX 452999686U, // TBXv16i8Four 452999686U, // TBXv16i8One 452999686U, // TBXv16i8Three 452999686U, // TBXv16i8Two 4212931078U, // TBXv8i8Four 4212931078U, // TBXv8i8One 4212931078U, // TBXv8i8Three 4212931078U, // TBXv8i8Two 17050167U, // TBZW 17050167U, // TBZX 0U, // TCRETURNdi 0U, // TCRETURNri 2107995U, // TLSDESCCALL 0U, // TLSDESC_BLR 2147487770U, // TRN1v16i8 2684882970U, // TRN1v2i32 537661466U, // TRN1v2i64 3222278170U, // TRN1v4i16 1075056666U, // TRN1v4i32 1612189722U, // TRN1v8i16 3759935514U, // TRN1v8i8 2147488072U, // TRN2v16i8 2684883272U, // TRN2v2i32 537661768U, // TRN2v2i64 3222278472U, // TRN2v4i16 1075056968U, // TRN2v4i32 1612190024U, // TRN2v8i16 3759935816U, // TRN2v8i8 2182623338U, // UABALv16i8_v8i16 2718708938U, // UABALv2i32_v2i64 3256104138U, // UABALv4i16_v4i32 1108095082U, // UABALv4i32_v2i64 1645490282U, // UABALv8i16_v4i32 3793237194U, // UABALv8i8_v8i16 2181050868U, // UABAv16i8 2718446068U, // UABAv2i32 3255841268U, // UABAv4i16 1108619764U, // UABAv4i32 1645752820U, // UABAv8i16 3793498612U, // UABAv8i8 2149060772U, // UABDLv16i8_v8i16 2685146386U, // UABDLv2i32_v2i64 3222541586U, // UABDLv4i16_v4i32 1074532516U, // UABDLv4i32_v2i64 1611927716U, // UABDLv8i16_v4i32 3759674642U, // UABDLv8i8_v8i16 2147488544U, // UABDv16i8 2684883744U, // UABDv2i32 3222278944U, // UABDv4i16 1075057440U, // UABDv4i32 1612190496U, // UABDv8i16 3759936288U, // UABDv8i8 35141323U, // UADALPv16i8_v8i16 1117533899U, // UADALPv2i32_v1i64 2181576395U, // UADALPv4i16_v2i32 2718709451U, // UADALPv4i32_v2i64 3256104651U, // UADALPv8i16_v4i32 3792713419U, // UADALPv8i8_v4i16 1578715U, // UADDLPv16i8_v8i16 1083971291U, // UADDLPv2i32_v1i64 2148013787U, // UADDLPv4i16_v2i32 2685146843U, // UADDLPv4i32_v2i64 3222542043U, // UADDLPv8i16_v4i32 3759150811U, // UADDLPv8i8_v4i16 272708U, // UADDLVv16i8v 2147756356U, // UADDLVv4i16v 2684627268U, // UADDLVv4i32v 3221498180U, // UADDLVv8i16v 3758369092U, // UADDLVv8i8v 2149060788U, // UADDLv16i8_v8i16 2685146416U, // UADDLv2i32_v2i64 3222541616U, // UADDLv4i16_v4i32 1074532532U, // UADDLv4i32_v2i64 1611927732U, // UADDLv8i16_v4i32 3759674672U, // UADDLv8i8_v8i16 1612190141U, // UADDWv16i8_v8i16 537663943U, // UADDWv2i32_v2i64 1075059143U, // UADDWv4i16_v4i32 537661885U, // UADDWv4i32_v2i64 1075057085U, // UADDWv8i16_v4i32 1612192199U, // UADDWv8i8_v8i16 17049067U, // UBFMWri 17049067U, // UBFMXri 17048524U, // UCVTFSWDri 17048524U, // UCVTFSWSri 17048524U, // UCVTFSXDri 17048524U, // UCVTFSXSri 553919436U, // UCVTFUWDri 553919436U, // UCVTFUWSri 553919436U, // UCVTFUXDri 553919436U, // UCVTFUXSri 17048524U, // UCVTFd 17048524U, // UCVTFs 553919436U, // UCVTFv1i32 553919436U, // UCVTFv1i64 1074271180U, // UCVTFv2f32 1611404236U, // UCVTFv2f64 2684883916U, // UCVTFv2i32_shift 537662412U, // UCVTFv2i64_shift 2685670348U, // UCVTFv4f32 1075057612U, // UCVTFv4i32_shift 17049910U, // UDIVWr 17049910U, // UDIVXr 17049910U, // UDIV_IntWr 17049910U, // UDIV_IntXr 2147488579U, // UHADDv16i8 2684883779U, // UHADDv2i32 3222278979U, // UHADDv4i16 1075057475U, // UHADDv4i32 1612190531U, // UHADDv8i16 3759936323U, // UHADDv8i8 2147488442U, // UHSUBv16i8 2684883642U, // UHSUBv2i32 3222278842U, // UHSUBv4i16 1075057338U, // UHSUBv4i32 1612190394U, // UHSUBv8i16 3759936186U, // UHSUBv8i8 17048865U, // UMADDLrrr 2147489616U, // UMAXPv16i8 2684884816U, // UMAXPv2i32 3222280016U, // UMAXPv4i16 1075058512U, // UMAXPv4i32 1612191568U, // UMAXPv8i16 3759937360U, // UMAXPv8i8 272794U, // UMAXVv16i8v 2147756442U, // UMAXVv4i16v 2684627354U, // UMAXVv4i32v 3221498266U, // UMAXVv8i16v 3758369178U, // UMAXVv8i8v 2147490304U, // UMAXv16i8 2684885504U, // UMAXv2i32 3222280704U, // UMAXv4i16 1075059200U, // UMAXv4i32 1612192256U, // UMAXv8i16 3759938048U, // UMAXv8i8 2147489558U, // UMINPv16i8 2684884758U, // UMINPv2i32 3222279958U, // UMINPv4i16 1075058454U, // UMINPv4i32 1612191510U, // UMINPv8i16 3759937302U, // UMINPv8i8 272748U, // UMINVv16i8v 2147756396U, // UMINVv4i16v 2684627308U, // UMINVv4i32v 3221498220U, // UMINVv8i16v 3758369132U, // UMINVv8i8v 2147489330U, // UMINv16i8 2684884530U, // UMINv2i32 3222279730U, // UMINv4i16 1075058226U, // UMINv4i32 1612191282U, // UMINv8i16 3759937074U, // UMINv8i8 2182623364U, // UMLALv16i8_v8i16 2718708961U, // UMLALv2i32_indexed 2718708961U, // UMLALv2i32_v2i64 3256104161U, // UMLALv4i16_indexed 3256104161U, // UMLALv4i16_v4i32 1108095108U, // UMLALv4i32_indexed 1108095108U, // UMLALv4i32_v2i64 1645490308U, // UMLALv8i16_indexed 1645490308U, // UMLALv8i16_v4i32 3793237217U, // UMLALv8i8_v8i16 2182623488U, // UMLSLv16i8_v8i16 2718709175U, // UMLSLv2i32_indexed 2718709175U, // UMLSLv2i32_v2i64 3256104375U, // UMLSLv4i16_indexed 3256104375U, // UMLSLv4i16_v4i32 1108095232U, // UMLSLv4i32_indexed 1108095232U, // UMLSLv4i32_v2i64 1645490432U, // UMLSLv8i16_indexed 1645490432U, // UMLSLv8i16_v4i32 3793237431U, // UMLSLv8i8_v8i16 272774U, // UMOVvi16 537143686U, // UMOVvi32 1074014598U, // UMOVvi64 1610885510U, // UMOVvi8 17048821U, // UMSUBLrrr 17048610U, // UMULHrr 2149060838U, // UMULLv16i8_v8i16 2685146523U, // UMULLv2i32_indexed 2685146523U, // UMULLv2i32_v2i64 3222541723U, // UMULLv4i16_indexed 3222541723U, // UMULLv4i16_v4i32 1074532582U, // UMULLv4i32_indexed 1074532582U, // UMULLv4i32_v2i64 1611927782U, // UMULLv8i16_indexed 1611927782U, // UMULLv8i16_v4i32 3759674779U, // UMULLv8i8_v8i16 2147488610U, // UQADDv16i8 17048418U, // UQADDv1i16 17048418U, // UQADDv1i32 17048418U, // UQADDv1i64 17048418U, // UQADDv1i8 2684883810U, // UQADDv2i32 537662306U, // UQADDv2i64 3222279010U, // UQADDv4i16 1075057506U, // UQADDv4i32 1612190562U, // UQADDv8i16 3759936354U, // UQADDv8i8 2147489108U, // UQRSHLv16i8 17048916U, // UQRSHLv1i16 17048916U, // UQRSHLv1i32 17048916U, // UQRSHLv1i64 17048916U, // UQRSHLv1i8 2684884308U, // UQRSHLv2i32 537662804U, // UQRSHLv2i64 3222279508U, // UQRSHLv4i16 1075058004U, // UQRSHLv4i32 1612191060U, // UQRSHLv8i16 3759936852U, // UQRSHLv8i8 17049180U, // UQRSHRNb 17049180U, // UQRSHRNh 17049180U, // UQRSHRNs 1644179774U, // UQRSHRNv16i8_shift 537400924U, // UQRSHRNv2i32_shift 1074796124U, // UQRSHRNv4i16_shift 571748670U, // UQRSHRNv4i32_shift 1108881726U, // UQRSHRNv8i16_shift 1612453468U, // UQRSHRNv8i8_shift 17048901U, // UQSHLb 17048901U, // UQSHLd 17048901U, // UQSHLh 17048901U, // UQSHLs 2147489093U, // UQSHLv16i8 2147489093U, // UQSHLv16i8_shift 17048901U, // UQSHLv1i16 17048901U, // UQSHLv1i32 17048901U, // UQSHLv1i64 17048901U, // UQSHLv1i8 2684884293U, // UQSHLv2i32 2684884293U, // UQSHLv2i32_shift 537662789U, // UQSHLv2i64 537662789U, // UQSHLv2i64_shift 3222279493U, // UQSHLv4i16 3222279493U, // UQSHLv4i16_shift 1075057989U, // UQSHLv4i32 1075057989U, // UQSHLv4i32_shift 1612191045U, // UQSHLv8i16 1612191045U, // UQSHLv8i16_shift 3759936837U, // UQSHLv8i8 3759936837U, // UQSHLv8i8_shift 17049163U, // UQSHRNb 17049163U, // UQSHRNh 17049163U, // UQSHRNs 1644179755U, // UQSHRNv16i8_shift 537400907U, // UQSHRNv2i32_shift 1074796107U, // UQSHRNv4i16_shift 571748651U, // UQSHRNv4i32_shift 1108881707U, // UQSHRNv8i16_shift 1612453451U, // UQSHRNv8i8_shift 2147488471U, // UQSUBv16i8 17048279U, // UQSUBv1i16 17048279U, // UQSUBv1i32 17048279U, // UQSUBv1i64 17048279U, // UQSUBv1i8 2684883671U, // UQSUBv2i32 537662167U, // UQSUBv2i64 3222278871U, // UQSUBv4i16 1075057367U, // UQSUBv4i32 1612190423U, // UQSUBv8i16 3759936215U, // UQSUBv8i8 3254792542U, // UQXTNv16i8 553920128U, // UQXTNv1i16 553920128U, // UQXTNv1i32 553920128U, // UQXTNv1i8 1611142784U, // UQXTNv2i32 2685408896U, // UQXTNv4i16 1645490526U, // UQXTNv4i32 2719494494U, // UQXTNv8i16 3223066240U, // UQXTNv8i8 1074271121U, // URECPEv2i32 2685670289U, // URECPEv4i32 2147488564U, // URHADDv16i8 2684883764U, // URHADDv2i32 3222278964U, // URHADDv4i16 1075057460U, // URHADDv4i32 1612190516U, // URHADDv8i16 3759936308U, // URHADDv8i8 2147489123U, // URSHLv16i8 17048931U, // URSHLv1i64 2684884323U, // URSHLv2i32 537662819U, // URSHLv2i64 3222279523U, // URSHLv4i16 1075058019U, // URSHLv4i32 1612191075U, // URSHLv8i16 3759936867U, // URSHLv8i8 17049508U, // URSHRd 2147489700U, // URSHRv16i8_shift 2684884900U, // URSHRv2i32_shift 537663396U, // URSHRv2i64_shift 3222280100U, // URSHRv4i16_shift 1075058596U, // URSHRv4i32_shift 1612191652U, // URSHRv8i16_shift 3759937444U, // URSHRv8i8_shift 1074271159U, // URSQRTEv2i32 2685670327U, // URSQRTEv4i32 67404295U, // URSRAd 2181050887U, // URSRAv16i8_shift 2718446087U, // URSRAv2i32_shift 571224583U, // URSRAv2i64_shift 3255841287U, // URSRAv4i16_shift 1108619783U, // URSRAv4i32_shift 1645752839U, // URSRAv8i16_shift 3793498631U, // URSRAv8i8_shift 2149060804U, // USHLLv16i8_shift 2685146493U, // USHLLv2i32_shift 3222541693U, // USHLLv4i16_shift 1074532548U, // USHLLv4i32_shift 1611927748U, // USHLLv8i16_shift 3759674749U, // USHLLv8i8_shift 2147489136U, // USHLv16i8 17048944U, // USHLv1i64 2684884336U, // USHLv2i32 537662832U, // USHLv2i64 3222279536U, // USHLv4i16 1075058032U, // USHLv4i32 1612191088U, // USHLv8i16 3759936880U, // USHLv8i8 17049521U, // USHRd 2147489713U, // USHRv16i8_shift 2684884913U, // USHRv2i32_shift 537663409U, // USHRv2i64_shift 3222280113U, // USHRv4i16_shift 1075058609U, // USHRv4i32_shift 1612191665U, // USHRv8i16_shift 3759937457U, // USHRv8i8_shift 33567577U, // USQADDv16i8 604275545U, // USQADDv1i16 604275545U, // USQADDv1i32 604275545U, // USQADDv1i64 604275545U, // USQADDv1i8 1107833689U, // USQADDv2i32 1644966745U, // USQADDv2i64 2182099801U, // USQADDv4i16 2719232857U, // USQADDv4i32 3256365913U, // USQADDv8i16 3793498969U, // USQADDv8i8 67404308U, // USRAd 2181050900U, // USRAv16i8_shift 2718446100U, // USRAv2i32_shift 571224596U, // USRAv2i64_shift 3255841300U, // USRAv4i16_shift 1108619796U, // USRAv4i32_shift 1645752852U, // USRAv8i16_shift 3793498644U, // USRAv8i8_shift 2149060756U, // USUBLv16i8_v8i16 2685146372U, // USUBLv2i32_v2i64 3222541572U, // USUBLv4i16_v4i32 1074532500U, // USUBLv4i32_v2i64 1611927700U, // USUBLv8i16_v4i32 3759674628U, // USUBLv8i8_v8i16 1612190125U, // USUBWv16i8_v8i16 537663920U, // USUBWv2i32_v2i64 1075059120U, // USUBWv4i16_v4i32 537661869U, // USUBWv4i32_v2i64 1075057069U, // USUBWv8i16_v4i32 1612192176U, // USUBWv8i8_v8i16 2147487782U, // UZP1v16i8 2684882982U, // UZP1v2i32 537661478U, // UZP1v2i64 3222278182U, // UZP1v4i16 1075056678U, // UZP1v4i32 1612189734U, // UZP1v8i16 3759935526U, // UZP1v8i8 2147488147U, // UZP2v16i8 2684883347U, // UZP2v2i32 537661843U, // UZP2v2i64 3222278547U, // UZP2v4i16 1075057043U, // UZP2v4i32 1612190099U, // UZP2v8i16 3759935891U, // UZP2v8i8 3254792536U, // XTNv16i8 1611142779U, // XTNv2i32 2685408891U, // XTNv4i16 1645490520U, // XTNv4i32 2719494488U, // XTNv8i16 3223066235U, // XTNv8i8 2147487776U, // ZIP1v16i8 2684882976U, // ZIP1v2i32 537661472U, // ZIP1v2i64 3222278176U, // ZIP1v4i16 1075056672U, // ZIP1v4i32 1612189728U, // ZIP1v8i16 3759935520U, // ZIP1v8i8 2147488141U, // ZIP2v16i8 2684883341U, // ZIP2v2i32 537661837U, // ZIP2v2i64 3222278541U, // ZIP2v4i16 1075057037U, // ZIP2v4i32 1612190093U, // ZIP2v8i16 3759935885U, // ZIP2v8i8 0U }; static const uint32_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // ABSv16i8 0U, // ABSv1i64 0U, // ABSv2i32 0U, // ABSv2i64 0U, // ABSv4i16 0U, // ABSv4i32 0U, // ABSv8i16 0U, // ABSv8i8 1U, // ADCSWr 1U, // ADCSXr 1U, // ADCWr 1U, // ADCXr 265U, // ADDHNv2i64_v2i32 273U, // ADDHNv2i64_v4i32 521U, // ADDHNv4i32_v4i16 529U, // ADDHNv4i32_v8i16 785U, // ADDHNv8i16_v16i8 777U, // ADDHNv8i16_v8i8 1033U, // ADDPv16i8 1289U, // ADDPv2i32 265U, // ADDPv2i64 0U, // ADDPv2i64p 1545U, // ADDPv4i16 521U, // ADDPv4i32 777U, // ADDPv8i16 1801U, // ADDPv8i8 25U, // ADDSWri 0U, // ADDSWrr 33U, // ADDSWrs 41U, // ADDSWrx 25U, // ADDSXri 0U, // ADDSXrr 33U, // ADDSXrs 41U, // ADDSXrx 2049U, // ADDSXrx64 0U, // ADDVv16i8v 0U, // ADDVv4i16v 0U, // ADDVv4i32v 0U, // ADDVv8i16v 0U, // ADDVv8i8v 25U, // ADDWri 0U, // ADDWrr 33U, // ADDWrs 41U, // ADDWrx 25U, // ADDXri 0U, // ADDXrr 33U, // ADDXrs 41U, // ADDXrx 2049U, // ADDXrx64 1033U, // ADDv16i8 1U, // ADDv1i64 1289U, // ADDv2i32 265U, // ADDv2i64 1545U, // ADDv4i16 521U, // ADDv4i32 777U, // ADDv8i16 1801U, // ADDv8i8 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 0U, // ADR 0U, // ADRP 0U, // AESDrr 0U, // AESErr 0U, // AESIMCrr 0U, // AESMCrr 49U, // ANDSWri 0U, // ANDSWrr 33U, // ANDSWrs 57U, // ANDSXri 0U, // ANDSXrr 33U, // ANDSXrs 49U, // ANDWri 0U, // ANDWrr 33U, // ANDWrs 57U, // ANDXri 0U, // ANDXrr 33U, // ANDXrs 1033U, // ANDv16i8 1801U, // ANDv8i8 1U, // ASRVWr 1U, // ASRVXr 0U, // B 2369U, // BFMWri 2369U, // BFMXri 0U, // BICSWrr 33U, // BICSWrs 0U, // BICSXrr 33U, // BICSXrs 0U, // BICWrr 33U, // BICWrs 0U, // BICXrr 33U, // BICXrs 1033U, // BICv16i8 0U, // BICv2i32 0U, // BICv4i16 0U, // BICv4i32 0U, // BICv8i16 1801U, // BICv8i8 1033U, // BIFv16i8 1801U, // BIFv8i8 1041U, // BITv16i8 1809U, // BITv8i8 0U, // BL 0U, // BLR 0U, // BR 0U, // BRK 1041U, // BSLv16i8 1809U, // BSLv8i8 0U, // Bcc 0U, // CBNZW 0U, // CBNZX 0U, // CBZW 0U, // CBZX 10497U, // CCMNWi 10497U, // CCMNWr 10497U, // CCMNXi 10497U, // CCMNXr 10497U, // CCMPWi 10497U, // CCMPWr 10497U, // CCMPXi 10497U, // CCMPXr 0U, // CLREX 0U, // CLSWr 0U, // CLSXr 0U, // CLSv16i8 0U, // CLSv2i32 0U, // CLSv4i16 0U, // CLSv4i32 0U, // CLSv8i16 0U, // CLSv8i8 0U, // CLZWr 0U, // CLZXr 0U, // CLZv16i8 0U, // CLZv2i32 0U, // CLZv4i16 0U, // CLZv4i32 0U, // CLZv8i16 0U, // CLZv8i8 1033U, // CMEQv16i8 2U, // CMEQv16i8rz 1U, // CMEQv1i64 2U, // CMEQv1i64rz 1289U, // CMEQv2i32 2U, // CMEQv2i32rz 265U, // CMEQv2i64 2U, // CMEQv2i64rz 1545U, // CMEQv4i16 2U, // CMEQv4i16rz 521U, // CMEQv4i32 2U, // CMEQv4i32rz 777U, // CMEQv8i16 2U, // CMEQv8i16rz 1801U, // CMEQv8i8 2U, // CMEQv8i8rz 1033U, // CMGEv16i8 2U, // CMGEv16i8rz 1U, // CMGEv1i64 2U, // CMGEv1i64rz 1289U, // CMGEv2i32 2U, // CMGEv2i32rz 265U, // CMGEv2i64 2U, // CMGEv2i64rz 1545U, // CMGEv4i16 2U, // CMGEv4i16rz 521U, // CMGEv4i32 2U, // CMGEv4i32rz 777U, // CMGEv8i16 2U, // CMGEv8i16rz 1801U, // CMGEv8i8 2U, // CMGEv8i8rz 1033U, // CMGTv16i8 2U, // CMGTv16i8rz 1U, // CMGTv1i64 2U, // CMGTv1i64rz 1289U, // CMGTv2i32 2U, // CMGTv2i32rz 265U, // CMGTv2i64 2U, // CMGTv2i64rz 1545U, // CMGTv4i16 2U, // CMGTv4i16rz 521U, // CMGTv4i32 2U, // CMGTv4i32rz 777U, // CMGTv8i16 2U, // CMGTv8i16rz 1801U, // CMGTv8i8 2U, // CMGTv8i8rz 1033U, // CMHIv16i8 1U, // CMHIv1i64 1289U, // CMHIv2i32 265U, // CMHIv2i64 1545U, // CMHIv4i16 521U, // CMHIv4i32 777U, // CMHIv8i16 1801U, // CMHIv8i8 1033U, // CMHSv16i8 1U, // CMHSv1i64 1289U, // CMHSv2i32 265U, // CMHSv2i64 1545U, // CMHSv4i16 521U, // CMHSv4i32 777U, // CMHSv8i16 1801U, // CMHSv8i8 2U, // CMLEv16i8rz 2U, // CMLEv1i64rz 2U, // CMLEv2i32rz 2U, // CMLEv2i64rz 2U, // CMLEv4i16rz 2U, // CMLEv4i32rz 2U, // CMLEv8i16rz 2U, // CMLEv8i8rz 2U, // CMLTv16i8rz 2U, // CMLTv1i64rz 2U, // CMLTv2i32rz 2U, // CMLTv2i64rz 2U, // CMLTv4i16rz 2U, // CMLTv4i32rz 2U, // CMLTv8i16rz 2U, // CMLTv8i8rz 1033U, // CMTSTv16i8 1U, // CMTSTv1i64 1289U, // CMTSTv2i32 265U, // CMTSTv2i64 1545U, // CMTSTv4i16 521U, // CMTSTv4i32 777U, // CMTSTv8i16 1801U, // CMTSTv8i8 0U, // CNTv16i8 0U, // CNTv8i8 75U, // CPYi16 75U, // CPYi32 75U, // CPYi64 75U, // CPYi8 1U, // CRC32Brr 1U, // CRC32CBrr 1U, // CRC32CHrr 1U, // CRC32CWrr 1U, // CRC32CXrr 1U, // CRC32Hrr 1U, // CRC32Wrr 1U, // CRC32Xrr 10497U, // CSELWr 10497U, // CSELXr 10497U, // CSINCWr 10497U, // CSINCXr 10497U, // CSINVWr 10497U, // CSINVXr 10497U, // CSNEGWr 10497U, // CSNEGXr 0U, // DCPS1 0U, // DCPS2 0U, // DCPS3 0U, // DMB 0U, // DRPS 0U, // DSB 0U, // DUPv16i8gpr 75U, // DUPv16i8lane 0U, // DUPv2i32gpr 75U, // DUPv2i32lane 0U, // DUPv2i64gpr 75U, // DUPv2i64lane 0U, // DUPv4i16gpr 75U, // DUPv4i16lane 0U, // DUPv4i32gpr 75U, // DUPv4i32lane 0U, // DUPv8i16gpr 75U, // DUPv8i16lane 0U, // DUPv8i8gpr 75U, // DUPv8i8lane 0U, // EONWrr 33U, // EONWrs 0U, // EONXrr 33U, // EONXrs 49U, // EORWri 0U, // EORWrr 33U, // EORWrs 57U, // EORXri 0U, // EORXrr 33U, // EORXrs 1033U, // EORv16i8 1801U, // EORv8i8 0U, // ERET 18689U, // EXTRWrri 18689U, // EXTRXrri 2569U, // EXTv16i8 2825U, // EXTv8i8 0U, // F128CSEL 1U, // FABD32 1U, // FABD64 1289U, // FABDv2f32 265U, // FABDv2f64 521U, // FABDv4f32 0U, // FABSDr 0U, // FABSSr 0U, // FABSv2f32 0U, // FABSv2f64 0U, // FABSv4f32 1U, // FACGE32 1U, // FACGE64 1289U, // FACGEv2f32 265U, // FACGEv2f64 521U, // FACGEv4f32 1U, // FACGT32 1U, // FACGT64 1289U, // FACGTv2f32 265U, // FACGTv2f64 521U, // FACGTv4f32 1U, // FADDDrr 1289U, // FADDPv2f32 265U, // FADDPv2f64 0U, // FADDPv2i32p 0U, // FADDPv2i64p 521U, // FADDPv4f32 1U, // FADDSrr 1289U, // FADDv2f32 265U, // FADDv2f64 521U, // FADDv4f32 10497U, // FCCMPDrr 10497U, // FCCMPEDrr 10497U, // FCCMPESrr 10497U, // FCCMPSrr 1U, // FCMEQ32 1U, // FCMEQ64 3U, // FCMEQv1i32rz 3U, // FCMEQv1i64rz 1289U, // FCMEQv2f32 265U, // FCMEQv2f64 3U, // FCMEQv2i32rz 3U, // FCMEQv2i64rz 521U, // FCMEQv4f32 3U, // FCMEQv4i32rz 1U, // FCMGE32 1U, // FCMGE64 3U, // FCMGEv1i32rz 3U, // FCMGEv1i64rz 1289U, // FCMGEv2f32 265U, // FCMGEv2f64 3U, // FCMGEv2i32rz 3U, // FCMGEv2i64rz 521U, // FCMGEv4f32 3U, // FCMGEv4i32rz 1U, // FCMGT32 1U, // FCMGT64 3U, // FCMGTv1i32rz 3U, // FCMGTv1i64rz 1289U, // FCMGTv2f32 265U, // FCMGTv2f64 3U, // FCMGTv2i32rz 3U, // FCMGTv2i64rz 521U, // FCMGTv4f32 3U, // FCMGTv4i32rz 3U, // FCMLEv1i32rz 3U, // FCMLEv1i64rz 3U, // FCMLEv2i32rz 3U, // FCMLEv2i64rz 3U, // FCMLEv4i32rz 3U, // FCMLTv1i32rz 3U, // FCMLTv1i64rz 3U, // FCMLTv2i32rz 3U, // FCMLTv2i64rz 3U, // FCMLTv4i32rz 0U, // FCMPDri 0U, // FCMPDrr 0U, // FCMPEDri 0U, // FCMPEDrr 0U, // FCMPESri 0U, // FCMPESrr 0U, // FCMPSri 0U, // FCMPSrr 10497U, // FCSELDrrr 10497U, // FCSELSrrr 0U, // FCVTASUWDr 0U, // FCVTASUWSr 0U, // FCVTASUXDr 0U, // FCVTASUXSr 0U, // FCVTASv1i32 0U, // FCVTASv1i64 0U, // FCVTASv2f32 0U, // FCVTASv2f64 0U, // FCVTASv4f32 0U, // FCVTAUUWDr 0U, // FCVTAUUWSr 0U, // FCVTAUUXDr 0U, // FCVTAUUXSr 0U, // FCVTAUv1i32 0U, // FCVTAUv1i64 0U, // FCVTAUv2f32 0U, // FCVTAUv2f64 0U, // FCVTAUv4f32 0U, // FCVTDHr 0U, // FCVTDSr 0U, // FCVTHDr 0U, // FCVTHSr 0U, // FCVTLv2i32 0U, // FCVTLv4i16 0U, // FCVTLv4i32 0U, // FCVTLv8i16 0U, // FCVTMSUWDr 0U, // FCVTMSUWSr 0U, // FCVTMSUXDr 0U, // FCVTMSUXSr 0U, // FCVTMSv1i32 0U, // FCVTMSv1i64 0U, // FCVTMSv2f32 0U, // FCVTMSv2f64 0U, // FCVTMSv4f32 0U, // FCVTMUUWDr 0U, // FCVTMUUWSr 0U, // FCVTMUUXDr 0U, // FCVTMUUXSr 0U, // FCVTMUv1i32 0U, // FCVTMUv1i64 0U, // FCVTMUv2f32 0U, // FCVTMUv2f64 0U, // FCVTMUv4f32 0U, // FCVTNSUWDr 0U, // FCVTNSUWSr 0U, // FCVTNSUXDr 0U, // FCVTNSUXSr 0U, // FCVTNSv1i32 0U, // FCVTNSv1i64 0U, // FCVTNSv2f32 0U, // FCVTNSv2f64 0U, // FCVTNSv4f32 0U, // FCVTNUUWDr 0U, // FCVTNUUWSr 0U, // FCVTNUUXDr 0U, // FCVTNUUXSr 0U, // FCVTNUv1i32 0U, // FCVTNUv1i64 0U, // FCVTNUv2f32 0U, // FCVTNUv2f64 0U, // FCVTNUv4f32 0U, // FCVTNv2i32 0U, // FCVTNv4i16 0U, // FCVTNv4i32 0U, // FCVTNv8i16 0U, // FCVTPSUWDr 0U, // FCVTPSUWSr 0U, // FCVTPSUXDr 0U, // FCVTPSUXSr 0U, // FCVTPSv1i32 0U, // FCVTPSv1i64 0U, // FCVTPSv2f32 0U, // FCVTPSv2f64 0U, // FCVTPSv4f32 0U, // FCVTPUUWDr 0U, // FCVTPUUWSr 0U, // FCVTPUUXDr 0U, // FCVTPUUXSr 0U, // FCVTPUv1i32 0U, // FCVTPUv1i64 0U, // FCVTPUv2f32 0U, // FCVTPUv2f64 0U, // FCVTPUv4f32 0U, // FCVTSDr 0U, // FCVTSHr 0U, // FCVTXNv1i64 0U, // FCVTXNv2f32 0U, // FCVTXNv4f32 1U, // FCVTZSSWDri 1U, // FCVTZSSWSri 1U, // FCVTZSSXDri 1U, // FCVTZSSXSri 0U, // FCVTZSUWDr 0U, // FCVTZSUWSr 0U, // FCVTZSUXDr 0U, // FCVTZSUXSr 1U, // FCVTZS_IntSWDri 1U, // FCVTZS_IntSWSri 1U, // FCVTZS_IntSXDri 1U, // FCVTZS_IntSXSri 0U, // FCVTZS_IntUWDr 0U, // FCVTZS_IntUWSr 0U, // FCVTZS_IntUXDr 0U, // FCVTZS_IntUXSr 0U, // FCVTZS_Intv2f32 0U, // FCVTZS_Intv2f64 0U, // FCVTZS_Intv4f32 1U, // FCVTZSd 1U, // FCVTZSs 0U, // FCVTZSv1i32 0U, // FCVTZSv1i64 0U, // FCVTZSv2f32 0U, // FCVTZSv2f64 1U, // FCVTZSv2i32_shift 1U, // FCVTZSv2i64_shift 0U, // FCVTZSv4f32 1U, // FCVTZSv4i32_shift 1U, // FCVTZUSWDri 1U, // FCVTZUSWSri 1U, // FCVTZUSXDri 1U, // FCVTZUSXSri 0U, // FCVTZUUWDr 0U, // FCVTZUUWSr 0U, // FCVTZUUXDr 0U, // FCVTZUUXSr 1U, // FCVTZU_IntSWDri 1U, // FCVTZU_IntSWSri 1U, // FCVTZU_IntSXDri 1U, // FCVTZU_IntSXSri 0U, // FCVTZU_IntUWDr 0U, // FCVTZU_IntUWSr 0U, // FCVTZU_IntUXDr 0U, // FCVTZU_IntUXSr 0U, // FCVTZU_Intv2f32 0U, // FCVTZU_Intv2f64 0U, // FCVTZU_Intv4f32 1U, // FCVTZUd 1U, // FCVTZUs 0U, // FCVTZUv1i32 0U, // FCVTZUv1i64 0U, // FCVTZUv2f32 0U, // FCVTZUv2f64 1U, // FCVTZUv2i32_shift 1U, // FCVTZUv2i64_shift 0U, // FCVTZUv4f32 1U, // FCVTZUv4i32_shift 1U, // FDIVDrr 1U, // FDIVSrr 1289U, // FDIVv2f32 265U, // FDIVv2f64 521U, // FDIVv4f32 18689U, // FMADDDrrr 18689U, // FMADDSrrr 1U, // FMAXDrr 1U, // FMAXNMDrr 1289U, // FMAXNMPv2f32 265U, // FMAXNMPv2f64 0U, // FMAXNMPv2i32p 0U, // FMAXNMPv2i64p 521U, // FMAXNMPv4f32 1U, // FMAXNMSrr 0U, // FMAXNMVv4i32v 1289U, // FMAXNMv2f32 265U, // FMAXNMv2f64 521U, // FMAXNMv4f32 1289U, // FMAXPv2f32 265U, // FMAXPv2f64 0U, // FMAXPv2i32p 0U, // FMAXPv2i64p 521U, // FMAXPv4f32 1U, // FMAXSrr 0U, // FMAXVv4i32v 1289U, // FMAXv2f32 265U, // FMAXv2f64 521U, // FMAXv4f32 1U, // FMINDrr 1U, // FMINNMDrr 1289U, // FMINNMPv2f32 265U, // FMINNMPv2f64 0U, // FMINNMPv2i32p 0U, // FMINNMPv2i64p 521U, // FMINNMPv4f32 1U, // FMINNMSrr 0U, // FMINNMVv4i32v 1289U, // FMINNMv2f32 265U, // FMINNMv2f64 521U, // FMINNMv4f32 1289U, // FMINPv2f32 265U, // FMINPv2f64 0U, // FMINPv2i32p 0U, // FMINPv2i64p 521U, // FMINPv4f32 1U, // FMINSrr 0U, // FMINVv4i32v 1289U, // FMINv2f32 265U, // FMINv2f64 521U, // FMINv4f32 27665U, // FMLAv1i32_indexed 27921U, // FMLAv1i64_indexed 1297U, // FMLAv2f32 273U, // FMLAv2f64 27665U, // FMLAv2i32_indexed 27921U, // FMLAv2i64_indexed 529U, // FMLAv4f32 27665U, // FMLAv4i32_indexed 27665U, // FMLSv1i32_indexed 27921U, // FMLSv1i64_indexed 1297U, // FMLSv2f32 273U, // FMLSv2f64 27665U, // FMLSv2i32_indexed 27921U, // FMLSv2i64_indexed 529U, // FMLSv4f32 27665U, // FMLSv4i32_indexed 75U, // FMOVDXHighr 0U, // FMOVDXr 0U, // FMOVDi 0U, // FMOVDr 0U, // FMOVSWr 0U, // FMOVSi 0U, // FMOVSr 0U, // FMOVWSr 0U, // FMOVXDHighr 0U, // FMOVXDr 0U, // FMOVv2f32_ns 0U, // FMOVv2f64_ns 0U, // FMOVv4f32_ns 18689U, // FMSUBDrrr 18689U, // FMSUBSrrr 1U, // FMULDrr 1U, // FMULSrr 1U, // FMULX32 1U, // FMULX64 35849U, // FMULXv1i32_indexed 36105U, // FMULXv1i64_indexed 1289U, // FMULXv2f32 265U, // FMULXv2f64 35849U, // FMULXv2i32_indexed 36105U, // FMULXv2i64_indexed 521U, // FMULXv4f32 35849U, // FMULXv4i32_indexed 35849U, // FMULv1i32_indexed 36105U, // FMULv1i64_indexed 1289U, // FMULv2f32 265U, // FMULv2f64 35849U, // FMULv2i32_indexed 36105U, // FMULv2i64_indexed 521U, // FMULv4f32 35849U, // FMULv4i32_indexed 0U, // FNEGDr 0U, // FNEGSr 0U, // FNEGv2f32 0U, // FNEGv2f64 0U, // FNEGv4f32 18689U, // FNMADDDrrr 18689U, // FNMADDSrrr 18689U, // FNMSUBDrrr 18689U, // FNMSUBSrrr 1U, // FNMULDrr 1U, // FNMULSrr 0U, // FRECPEv1i32 0U, // FRECPEv1i64 0U, // FRECPEv2f32 0U, // FRECPEv2f64 0U, // FRECPEv4f32 1U, // FRECPS32 1U, // FRECPS64 1289U, // FRECPSv2f32 265U, // FRECPSv2f64 521U, // FRECPSv4f32 0U, // FRECPXv1i32 0U, // FRECPXv1i64 0U, // FRINTADr 0U, // FRINTASr 0U, // FRINTAv2f32 0U, // FRINTAv2f64 0U, // FRINTAv4f32 0U, // FRINTIDr 0U, // FRINTISr 0U, // FRINTIv2f32 0U, // FRINTIv2f64 0U, // FRINTIv4f32 0U, // FRINTMDr 0U, // FRINTMSr 0U, // FRINTMv2f32 0U, // FRINTMv2f64 0U, // FRINTMv4f32 0U, // FRINTNDr 0U, // FRINTNSr 0U, // FRINTNv2f32 0U, // FRINTNv2f64 0U, // FRINTNv4f32 0U, // FRINTPDr 0U, // FRINTPSr 0U, // FRINTPv2f32 0U, // FRINTPv2f64 0U, // FRINTPv4f32 0U, // FRINTXDr 0U, // FRINTXSr 0U, // FRINTXv2f32 0U, // FRINTXv2f64 0U, // FRINTXv4f32 0U, // FRINTZDr 0U, // FRINTZSr 0U, // FRINTZv2f32 0U, // FRINTZv2f64 0U, // FRINTZv4f32 0U, // FRSQRTEv1i32 0U, // FRSQRTEv1i64 0U, // FRSQRTEv2f32 0U, // FRSQRTEv2f64 0U, // FRSQRTEv4f32 1U, // FRSQRTS32 1U, // FRSQRTS64 1289U, // FRSQRTSv2f32 265U, // FRSQRTSv2f64 521U, // FRSQRTSv4f32 0U, // FSQRTDr 0U, // FSQRTSr 0U, // FSQRTv2f32 0U, // FSQRTv2f64 0U, // FSQRTv4f32 1U, // FSUBDrr 1U, // FSUBSrr 1289U, // FSUBv2f32 265U, // FSUBv2f64 521U, // FSUBv4f32 0U, // HINT 0U, // HLT 0U, // HVC 0U, // INSvi16gpr 83U, // INSvi16lane 0U, // INSvi32gpr 83U, // INSvi32lane 0U, // INSvi64gpr 83U, // INSvi64lane 0U, // INSvi8gpr 83U, // INSvi8lane 0U, // ISB 0U, // LD1Fourv16b 0U, // LD1Fourv16b_POST 0U, // LD1Fourv1d 0U, // LD1Fourv1d_POST 0U, // LD1Fourv2d 0U, // LD1Fourv2d_POST 0U, // LD1Fourv2s 0U, // LD1Fourv2s_POST 0U, // LD1Fourv4h 0U, // LD1Fourv4h_POST 0U, // LD1Fourv4s 0U, // LD1Fourv4s_POST 0U, // LD1Fourv8b 0U, // LD1Fourv8b_POST 0U, // LD1Fourv8h 0U, // LD1Fourv8h_POST 0U, // LD1Onev16b 0U, // LD1Onev16b_POST 0U, // LD1Onev1d 0U, // LD1Onev1d_POST 0U, // LD1Onev2d 0U, // LD1Onev2d_POST 0U, // LD1Onev2s 0U, // LD1Onev2s_POST 0U, // LD1Onev4h 0U, // LD1Onev4h_POST 0U, // LD1Onev4s 0U, // LD1Onev4s_POST 0U, // LD1Onev8b 0U, // LD1Onev8b_POST 0U, // LD1Onev8h 0U, // LD1Onev8h_POST 0U, // LD1Rv16b 0U, // LD1Rv16b_POST 0U, // LD1Rv1d 0U, // LD1Rv1d_POST 0U, // LD1Rv2d 0U, // LD1Rv2d_POST 0U, // LD1Rv2s 0U, // LD1Rv2s_POST 0U, // LD1Rv4h 0U, // LD1Rv4h_POST 0U, // LD1Rv4s 0U, // LD1Rv4s_POST 0U, // LD1Rv8b 0U, // LD1Rv8b_POST 0U, // LD1Rv8h 0U, // LD1Rv8h_POST 0U, // LD1Threev16b 0U, // LD1Threev16b_POST 0U, // LD1Threev1d 0U, // LD1Threev1d_POST 0U, // LD1Threev2d 0U, // LD1Threev2d_POST 0U, // LD1Threev2s 0U, // LD1Threev2s_POST 0U, // LD1Threev4h 0U, // LD1Threev4h_POST 0U, // LD1Threev4s 0U, // LD1Threev4s_POST 0U, // LD1Threev8b 0U, // LD1Threev8b_POST 0U, // LD1Threev8h 0U, // LD1Threev8h_POST 0U, // LD1Twov16b 0U, // LD1Twov16b_POST 0U, // LD1Twov1d 0U, // LD1Twov1d_POST 0U, // LD1Twov2d 0U, // LD1Twov2d_POST 0U, // LD1Twov2s 0U, // LD1Twov2s_POST 0U, // LD1Twov4h 0U, // LD1Twov4h_POST 0U, // LD1Twov4s 0U, // LD1Twov4s_POST 0U, // LD1Twov8b 0U, // LD1Twov8b_POST 0U, // LD1Twov8h 0U, // LD1Twov8h_POST 0U, // LD1i16 0U, // LD1i16_POST 0U, // LD1i32 0U, // LD1i32_POST 0U, // LD1i64 0U, // LD1i64_POST 0U, // LD1i8 0U, // LD1i8_POST 0U, // LD2Rv16b 0U, // LD2Rv16b_POST 0U, // LD2Rv1d 0U, // LD2Rv1d_POST 0U, // LD2Rv2d 0U, // LD2Rv2d_POST 0U, // LD2Rv2s 0U, // LD2Rv2s_POST 0U, // LD2Rv4h 0U, // LD2Rv4h_POST 0U, // LD2Rv4s 0U, // LD2Rv4s_POST 0U, // LD2Rv8b 0U, // LD2Rv8b_POST 0U, // LD2Rv8h 0U, // LD2Rv8h_POST 0U, // LD2Twov16b 0U, // LD2Twov16b_POST 0U, // LD2Twov2d 0U, // LD2Twov2d_POST 0U, // LD2Twov2s 0U, // LD2Twov2s_POST 0U, // LD2Twov4h 0U, // LD2Twov4h_POST 0U, // LD2Twov4s 0U, // LD2Twov4s_POST 0U, // LD2Twov8b 0U, // LD2Twov8b_POST 0U, // LD2Twov8h 0U, // LD2Twov8h_POST 0U, // LD2i16 0U, // LD2i16_POST 0U, // LD2i32 0U, // LD2i32_POST 0U, // LD2i64 0U, // LD2i64_POST 0U, // LD2i8 0U, // LD2i8_POST 0U, // LD3Rv16b 0U, // LD3Rv16b_POST 0U, // LD3Rv1d 0U, // LD3Rv1d_POST 0U, // LD3Rv2d 0U, // LD3Rv2d_POST 0U, // LD3Rv2s 0U, // LD3Rv2s_POST 0U, // LD3Rv4h 0U, // LD3Rv4h_POST 0U, // LD3Rv4s 0U, // LD3Rv4s_POST 0U, // LD3Rv8b 0U, // LD3Rv8b_POST 0U, // LD3Rv8h 0U, // LD3Rv8h_POST 0U, // LD3Threev16b 0U, // LD3Threev16b_POST 0U, // LD3Threev2d 0U, // LD3Threev2d_POST 0U, // LD3Threev2s 0U, // LD3Threev2s_POST 0U, // LD3Threev4h 0U, // LD3Threev4h_POST 0U, // LD3Threev4s 0U, // LD3Threev4s_POST 0U, // LD3Threev8b 0U, // LD3Threev8b_POST 0U, // LD3Threev8h 0U, // LD3Threev8h_POST 0U, // LD3i16 0U, // LD3i16_POST 0U, // LD3i32 0U, // LD3i32_POST 0U, // LD3i64 0U, // LD3i64_POST 0U, // LD3i8 0U, // LD3i8_POST 0U, // LD4Fourv16b 0U, // LD4Fourv16b_POST 0U, // LD4Fourv2d 0U, // LD4Fourv2d_POST 0U, // LD4Fourv2s 0U, // LD4Fourv2s_POST 0U, // LD4Fourv4h 0U, // LD4Fourv4h_POST 0U, // LD4Fourv4s 0U, // LD4Fourv4s_POST 0U, // LD4Fourv8b 0U, // LD4Fourv8b_POST 0U, // LD4Fourv8h 0U, // LD4Fourv8h_POST 0U, // LD4Rv16b 0U, // LD4Rv16b_POST 0U, // LD4Rv1d 0U, // LD4Rv1d_POST 0U, // LD4Rv2d 0U, // LD4Rv2d_POST 0U, // LD4Rv2s 0U, // LD4Rv2s_POST 0U, // LD4Rv4h 0U, // LD4Rv4h_POST 0U, // LD4Rv4s 0U, // LD4Rv4s_POST 0U, // LD4Rv8b 0U, // LD4Rv8b_POST 0U, // LD4Rv8h 0U, // LD4Rv8h_POST 0U, // LD4i16 0U, // LD4i16_POST 0U, // LD4i32 0U, // LD4i32_POST 0U, // LD4i64 0U, // LD4i64_POST 0U, // LD4i8 0U, // LD4i8_POST 4U, // LDARB 4U, // LDARH 4U, // LDARW 4U, // LDARX 3588U, // LDAXPW 3588U, // LDAXPX 4U, // LDAXRB 4U, // LDAXRH 4U, // LDAXRW 4U, // LDAXRX 43268U, // LDNPDi 51460U, // LDNPQi 59652U, // LDNPSi 59652U, // LDNPWi 43268U, // LDNPXi 43268U, // LDPDi 69444U, // LDPDpost 330052U, // LDPDpre 51460U, // LDPQi 77636U, // LDPQpost 338244U, // LDPQpre 59652U, // LDPSWi 85828U, // LDPSWpost 346436U, // LDPSWpre 59652U, // LDPSi 85828U, // LDPSpost 346436U, // LDPSpre 59652U, // LDPWi 85828U, // LDPWpost 346436U, // LDPWpre 43268U, // LDPXi 69444U, // LDPXpost 330052U, // LDPXpre 4U, // LDRBBpost 4161U, // LDRBBpre 92417U, // LDRBBroW 100609U, // LDRBBroX 89U, // LDRBBui 4U, // LDRBpost 4161U, // LDRBpre 92417U, // LDRBroW 100609U, // LDRBroX 89U, // LDRBui 0U, // LDRDl 4U, // LDRDpost 4161U, // LDRDpre 108801U, // LDRDroW 116993U, // LDRDroX 97U, // LDRDui 4U, // LDRHHpost 4161U, // LDRHHpre 125185U, // LDRHHroW 133377U, // LDRHHroX 105U, // LDRHHui 4U, // LDRHpost 4161U, // LDRHpre 125185U, // LDRHroW 133377U, // LDRHroX 105U, // LDRHui 0U, // LDRQl 4U, // LDRQpost 4161U, // LDRQpre 141569U, // LDRQroW 149761U, // LDRQroX 113U, // LDRQui 4U, // LDRSBWpost 4161U, // LDRSBWpre 92417U, // LDRSBWroW 100609U, // LDRSBWroX 89U, // LDRSBWui 4U, // LDRSBXpost 4161U, // LDRSBXpre 92417U, // LDRSBXroW 100609U, // LDRSBXroX 89U, // LDRSBXui 4U, // LDRSHWpost 4161U, // LDRSHWpre 125185U, // LDRSHWroW 133377U, // LDRSHWroX 105U, // LDRSHWui 4U, // LDRSHXpost 4161U, // LDRSHXpre 125185U, // LDRSHXroW 133377U, // LDRSHXroX 105U, // LDRSHXui 0U, // LDRSWl 4U, // LDRSWpost 4161U, // LDRSWpre 157953U, // LDRSWroW 166145U, // LDRSWroX 121U, // LDRSWui 0U, // LDRSl 4U, // LDRSpost 4161U, // LDRSpre 157953U, // LDRSroW 166145U, // LDRSroX 121U, // LDRSui 0U, // LDRWl 4U, // LDRWpost 4161U, // LDRWpre 157953U, // LDRWroW 166145U, // LDRWroX 121U, // LDRWui 0U, // LDRXl 4U, // LDRXpost 4161U, // LDRXpre 108801U, // LDRXroW 116993U, // LDRXroX 97U, // LDRXui 3585U, // LDTRBi 3585U, // LDTRHi 3585U, // LDTRSBWi 3585U, // LDTRSBXi 3585U, // LDTRSHWi 3585U, // LDTRSHXi 3585U, // LDTRSWi 3585U, // LDTRWi 3585U, // LDTRXi 3585U, // LDURBBi 3585U, // LDURBi 3585U, // LDURDi 3585U, // LDURHHi 3585U, // LDURHi 3585U, // LDURQi 3585U, // LDURSBWi 3585U, // LDURSBXi 3585U, // LDURSHWi 3585U, // LDURSHXi 3585U, // LDURSWi 3585U, // LDURSi 3585U, // LDURWi 3585U, // LDURXi 3588U, // LDXPW 3588U, // LDXPX 4U, // LDXRB 4U, // LDXRH 4U, // LDXRW 4U, // LDXRX 0U, // LOADgot 1U, // LSLVWr 1U, // LSLVXr 1U, // LSRVWr 1U, // LSRVXr 18689U, // MADDWrrr 18689U, // MADDXrrr 1041U, // MLAv16i8 1297U, // MLAv2i32 27665U, // MLAv2i32_indexed 1553U, // MLAv4i16 28945U, // MLAv4i16_indexed 529U, // MLAv4i32 27665U, // MLAv4i32_indexed 785U, // MLAv8i16 28945U, // MLAv8i16_indexed 1809U, // MLAv8i8 1041U, // MLSv16i8 1297U, // MLSv2i32 27665U, // MLSv2i32_indexed 1553U, // MLSv4i16 28945U, // MLSv4i16_indexed 529U, // MLSv4i32 27665U, // MLSv4i32_indexed 785U, // MLSv8i16 28945U, // MLSv8i16_indexed 1809U, // MLSv8i8 0U, // MOVID 0U, // MOVIv16b_ns 0U, // MOVIv2d_ns 4U, // MOVIv2i32 4U, // MOVIv2s_msl 4U, // MOVIv4i16 4U, // MOVIv4i32 4U, // MOVIv4s_msl 0U, // MOVIv8b_ns 4U, // MOVIv8i16 0U, // MOVKWi 0U, // MOVKXi 4U, // MOVNWi 4U, // MOVNXi 4U, // MOVZWi 4U, // MOVZXi 0U, // MOVaddr 0U, // MOVaddrBA 0U, // MOVaddrCP 0U, // MOVaddrEXT 0U, // MOVaddrJT 0U, // MOVaddrTLS 0U, // MOVi32imm 0U, // MOVi64imm 0U, // MRS 0U, // MSR 0U, // MSRpstate 18689U, // MSUBWrrr 18689U, // MSUBXrrr 1033U, // MULv16i8 1289U, // MULv2i32 35849U, // MULv2i32_indexed 1545U, // MULv4i16 37129U, // MULv4i16_indexed 521U, // MULv4i32 35849U, // MULv4i32_indexed 777U, // MULv8i16 37129U, // MULv8i16_indexed 1801U, // MULv8i8 4U, // MVNIv2i32 4U, // MVNIv2s_msl 4U, // MVNIv4i16 4U, // MVNIv4i32 4U, // MVNIv4s_msl 4U, // MVNIv8i16 0U, // NEGv16i8 0U, // NEGv1i64 0U, // NEGv2i32 0U, // NEGv2i64 0U, // NEGv4i16 0U, // NEGv4i32 0U, // NEGv8i16 0U, // NEGv8i8 0U, // NOTv16i8 0U, // NOTv8i8 0U, // ORNWrr 33U, // ORNWrs 0U, // ORNXrr 33U, // ORNXrs 1033U, // ORNv16i8 1801U, // ORNv8i8 49U, // ORRWri 0U, // ORRWrr 33U, // ORRWrs 57U, // ORRXri 0U, // ORRXrr 33U, // ORRXrs 1033U, // ORRv16i8 0U, // ORRv2i32 0U, // ORRv4i16 0U, // ORRv4i32 0U, // ORRv8i16 1801U, // ORRv8i8 1033U, // PMULLv16i8 0U, // PMULLv1i64 0U, // PMULLv2i64 1801U, // PMULLv8i8 1033U, // PMULv16i8 1801U, // PMULv8i8 0U, // PRFMl 108801U, // PRFMroW 116993U, // PRFMroX 97U, // PRFMui 3585U, // PRFUMi 265U, // RADDHNv2i64_v2i32 273U, // RADDHNv2i64_v4i32 521U, // RADDHNv4i32_v4i16 529U, // RADDHNv4i32_v8i16 785U, // RADDHNv8i16_v16i8 777U, // RADDHNv8i16_v8i8 0U, // RBITWr 0U, // RBITXr 0U, // RBITv16i8 0U, // RBITv8i8 0U, // RET 0U, // RET_ReallyLR 0U, // REV16Wr 0U, // REV16Xr 0U, // REV16v16i8 0U, // REV16v8i8 0U, // REV32Xr 0U, // REV32v16i8 0U, // REV32v4i16 0U, // REV32v8i16 0U, // REV32v8i8 0U, // REV64v16i8 0U, // REV64v2i32 0U, // REV64v4i16 0U, // REV64v4i32 0U, // REV64v8i16 0U, // REV64v8i8 0U, // REVWr 0U, // REVXr 1U, // RORVWr 1U, // RORVXr 65U, // RSHRNv16i8_shift 1U, // RSHRNv2i32_shift 1U, // RSHRNv4i16_shift 65U, // RSHRNv4i32_shift 65U, // RSHRNv8i16_shift 1U, // RSHRNv8i8_shift 265U, // RSUBHNv2i64_v2i32 273U, // RSUBHNv2i64_v4i32 521U, // RSUBHNv4i32_v4i16 529U, // RSUBHNv4i32_v8i16 785U, // RSUBHNv8i16_v16i8 777U, // RSUBHNv8i16_v8i8 1041U, // SABALv16i8_v8i16 1297U, // SABALv2i32_v2i64 1553U, // SABALv4i16_v4i32 529U, // SABALv4i32_v2i64 785U, // SABALv8i16_v4i32 1809U, // SABALv8i8_v8i16 1041U, // SABAv16i8 1297U, // SABAv2i32 1553U, // SABAv4i16 529U, // SABAv4i32 785U, // SABAv8i16 1809U, // SABAv8i8 1033U, // SABDLv16i8_v8i16 1289U, // SABDLv2i32_v2i64 1545U, // SABDLv4i16_v4i32 521U, // SABDLv4i32_v2i64 777U, // SABDLv8i16_v4i32 1801U, // SABDLv8i8_v8i16 1033U, // SABDv16i8 1289U, // SABDv2i32 1545U, // SABDv4i16 521U, // SABDv4i32 777U, // SABDv8i16 1801U, // SABDv8i8 0U, // SADALPv16i8_v8i16 0U, // SADALPv2i32_v1i64 0U, // SADALPv4i16_v2i32 0U, // SADALPv4i32_v2i64 0U, // SADALPv8i16_v4i32 0U, // SADALPv8i8_v4i16 0U, // SADDLPv16i8_v8i16 0U, // SADDLPv2i32_v1i64 0U, // SADDLPv4i16_v2i32 0U, // SADDLPv4i32_v2i64 0U, // SADDLPv8i16_v4i32 0U, // SADDLPv8i8_v4i16 0U, // SADDLVv16i8v 0U, // SADDLVv4i16v 0U, // SADDLVv4i32v 0U, // SADDLVv8i16v 0U, // SADDLVv8i8v 1033U, // SADDLv16i8_v8i16 1289U, // SADDLv2i32_v2i64 1545U, // SADDLv4i16_v4i32 521U, // SADDLv4i32_v2i64 777U, // SADDLv8i16_v4i32 1801U, // SADDLv8i8_v8i16 1033U, // SADDWv16i8_v8i16 1289U, // SADDWv2i32_v2i64 1545U, // SADDWv4i16_v4i32 521U, // SADDWv4i32_v2i64 777U, // SADDWv8i16_v4i32 1801U, // SADDWv8i8_v8i16 1U, // SBCSWr 1U, // SBCSXr 1U, // SBCWr 1U, // SBCXr 18689U, // SBFMWri 18689U, // SBFMXri 1U, // SCVTFSWDri 1U, // SCVTFSWSri 1U, // SCVTFSXDri 1U, // SCVTFSXSri 0U, // SCVTFUWDri 0U, // SCVTFUWSri 0U, // SCVTFUXDri 0U, // SCVTFUXSri 1U, // SCVTFd 1U, // SCVTFs 0U, // SCVTFv1i32 0U, // SCVTFv1i64 0U, // SCVTFv2f32 0U, // SCVTFv2f64 1U, // SCVTFv2i32_shift 1U, // SCVTFv2i64_shift 0U, // SCVTFv4f32 1U, // SCVTFv4i32_shift 1U, // SDIVWr 1U, // SDIVXr 1U, // SDIV_IntWr 1U, // SDIV_IntXr 529U, // SHA1Crrr 0U, // SHA1Hrr 529U, // SHA1Mrrr 529U, // SHA1Prrr 529U, // SHA1SU0rrr 0U, // SHA1SU1rr 529U, // SHA256H2rrr 529U, // SHA256Hrrr 0U, // SHA256SU0rr 529U, // SHA256SU1rrr 1033U, // SHADDv16i8 1289U, // SHADDv2i32 1545U, // SHADDv4i16 521U, // SHADDv4i32 777U, // SHADDv8i16 1801U, // SHADDv8i8 4U, // SHLLv16i8 4U, // SHLLv2i32 4U, // SHLLv4i16 4U, // SHLLv4i32 5U, // SHLLv8i16 5U, // SHLLv8i8 1U, // SHLd 1U, // SHLv16i8_shift 1U, // SHLv2i32_shift 1U, // SHLv2i64_shift 1U, // SHLv4i16_shift 1U, // SHLv4i32_shift 1U, // SHLv8i16_shift 1U, // SHLv8i8_shift 65U, // SHRNv16i8_shift 1U, // SHRNv2i32_shift 1U, // SHRNv4i16_shift 65U, // SHRNv4i32_shift 65U, // SHRNv8i16_shift 1U, // SHRNv8i8_shift 1033U, // SHSUBv16i8 1289U, // SHSUBv2i32 1545U, // SHSUBv4i16 521U, // SHSUBv4i32 777U, // SHSUBv8i16 1801U, // SHSUBv8i8 65U, // SLId 65U, // SLIv16i8_shift 65U, // SLIv2i32_shift 65U, // SLIv2i64_shift 65U, // SLIv4i16_shift 65U, // SLIv4i32_shift 65U, // SLIv8i16_shift 65U, // SLIv8i8_shift 18689U, // SMADDLrrr 1033U, // SMAXPv16i8 1289U, // SMAXPv2i32 1545U, // SMAXPv4i16 521U, // SMAXPv4i32 777U, // SMAXPv8i16 1801U, // SMAXPv8i8 0U, // SMAXVv16i8v 0U, // SMAXVv4i16v 0U, // SMAXVv4i32v 0U, // SMAXVv8i16v 0U, // SMAXVv8i8v 1033U, // SMAXv16i8 1289U, // SMAXv2i32 1545U, // SMAXv4i16 521U, // SMAXv4i32 777U, // SMAXv8i16 1801U, // SMAXv8i8 0U, // SMC 1033U, // SMINPv16i8 1289U, // SMINPv2i32 1545U, // SMINPv4i16 521U, // SMINPv4i32 777U, // SMINPv8i16 1801U, // SMINPv8i8 0U, // SMINVv16i8v 0U, // SMINVv4i16v 0U, // SMINVv4i32v 0U, // SMINVv8i16v 0U, // SMINVv8i8v 1033U, // SMINv16i8 1289U, // SMINv2i32 1545U, // SMINv4i16 521U, // SMINv4i32 777U, // SMINv8i16 1801U, // SMINv8i8 1041U, // SMLALv16i8_v8i16 27665U, // SMLALv2i32_indexed 1297U, // SMLALv2i32_v2i64 28945U, // SMLALv4i16_indexed 1553U, // SMLALv4i16_v4i32 27665U, // SMLALv4i32_indexed 529U, // SMLALv4i32_v2i64 28945U, // SMLALv8i16_indexed 785U, // SMLALv8i16_v4i32 1809U, // SMLALv8i8_v8i16 1041U, // SMLSLv16i8_v8i16 27665U, // SMLSLv2i32_indexed 1297U, // SMLSLv2i32_v2i64 28945U, // SMLSLv4i16_indexed 1553U, // SMLSLv4i16_v4i32 27665U, // SMLSLv4i32_indexed 529U, // SMLSLv4i32_v2i64 28945U, // SMLSLv8i16_indexed 785U, // SMLSLv8i16_v4i32 1809U, // SMLSLv8i8_v8i16 75U, // SMOVvi16to32 75U, // SMOVvi16to64 75U, // SMOVvi32to64 75U, // SMOVvi8to32 75U, // SMOVvi8to64 18689U, // SMSUBLrrr 1U, // SMULHrr 1033U, // SMULLv16i8_v8i16 35849U, // SMULLv2i32_indexed 1289U, // SMULLv2i32_v2i64 37129U, // SMULLv4i16_indexed 1545U, // SMULLv4i16_v4i32 35849U, // SMULLv4i32_indexed 521U, // SMULLv4i32_v2i64 37129U, // SMULLv8i16_indexed 777U, // SMULLv8i16_v4i32 1801U, // SMULLv8i8_v8i16 0U, // SQABSv16i8 0U, // SQABSv1i16 0U, // SQABSv1i32 0U, // SQABSv1i64 0U, // SQABSv1i8 0U, // SQABSv2i32 0U, // SQABSv2i64 0U, // SQABSv4i16 0U, // SQABSv4i32 0U, // SQABSv8i16 0U, // SQABSv8i8 1033U, // SQADDv16i8 1U, // SQADDv1i16 1U, // SQADDv1i32 1U, // SQADDv1i64 1U, // SQADDv1i8 1289U, // SQADDv2i32 265U, // SQADDv2i64 1545U, // SQADDv4i16 521U, // SQADDv4i32 777U, // SQADDv8i16 1801U, // SQADDv8i8 65U, // SQDMLALi16 65U, // SQDMLALi32 28945U, // SQDMLALv1i32_indexed 27665U, // SQDMLALv1i64_indexed 27665U, // SQDMLALv2i32_indexed 1297U, // SQDMLALv2i32_v2i64 28945U, // SQDMLALv4i16_indexed 1553U, // SQDMLALv4i16_v4i32 27665U, // SQDMLALv4i32_indexed 529U, // SQDMLALv4i32_v2i64 28945U, // SQDMLALv8i16_indexed 785U, // SQDMLALv8i16_v4i32 65U, // SQDMLSLi16 65U, // SQDMLSLi32 28945U, // SQDMLSLv1i32_indexed 27665U, // SQDMLSLv1i64_indexed 27665U, // SQDMLSLv2i32_indexed 1297U, // SQDMLSLv2i32_v2i64 28945U, // SQDMLSLv4i16_indexed 1553U, // SQDMLSLv4i16_v4i32 27665U, // SQDMLSLv4i32_indexed 529U, // SQDMLSLv4i32_v2i64 28945U, // SQDMLSLv8i16_indexed 785U, // SQDMLSLv8i16_v4i32 1U, // SQDMULHv1i16 37129U, // SQDMULHv1i16_indexed 1U, // SQDMULHv1i32 35849U, // SQDMULHv1i32_indexed 1289U, // SQDMULHv2i32 35849U, // SQDMULHv2i32_indexed 1545U, // SQDMULHv4i16 37129U, // SQDMULHv4i16_indexed 521U, // SQDMULHv4i32 35849U, // SQDMULHv4i32_indexed 777U, // SQDMULHv8i16 37129U, // SQDMULHv8i16_indexed 1U, // SQDMULLi16 1U, // SQDMULLi32 37129U, // SQDMULLv1i32_indexed 35849U, // SQDMULLv1i64_indexed 35849U, // SQDMULLv2i32_indexed 1289U, // SQDMULLv2i32_v2i64 37129U, // SQDMULLv4i16_indexed 1545U, // SQDMULLv4i16_v4i32 35849U, // SQDMULLv4i32_indexed 521U, // SQDMULLv4i32_v2i64 37129U, // SQDMULLv8i16_indexed 777U, // SQDMULLv8i16_v4i32 0U, // SQNEGv16i8 0U, // SQNEGv1i16 0U, // SQNEGv1i32 0U, // SQNEGv1i64 0U, // SQNEGv1i8 0U, // SQNEGv2i32 0U, // SQNEGv2i64 0U, // SQNEGv4i16 0U, // SQNEGv4i32 0U, // SQNEGv8i16 0U, // SQNEGv8i8 1U, // SQRDMULHv1i16 37129U, // SQRDMULHv1i16_indexed 1U, // SQRDMULHv1i32 35849U, // SQRDMULHv1i32_indexed 1289U, // SQRDMULHv2i32 35849U, // SQRDMULHv2i32_indexed 1545U, // SQRDMULHv4i16 37129U, // SQRDMULHv4i16_indexed 521U, // SQRDMULHv4i32 35849U, // SQRDMULHv4i32_indexed 777U, // SQRDMULHv8i16 37129U, // SQRDMULHv8i16_indexed 1033U, // SQRSHLv16i8 1U, // SQRSHLv1i16 1U, // SQRSHLv1i32 1U, // SQRSHLv1i64 1U, // SQRSHLv1i8 1289U, // SQRSHLv2i32 265U, // SQRSHLv2i64 1545U, // SQRSHLv4i16 521U, // SQRSHLv4i32 777U, // SQRSHLv8i16 1801U, // SQRSHLv8i8 1U, // SQRSHRNb 1U, // SQRSHRNh 1U, // SQRSHRNs 65U, // SQRSHRNv16i8_shift 1U, // SQRSHRNv2i32_shift 1U, // SQRSHRNv4i16_shift 65U, // SQRSHRNv4i32_shift 65U, // SQRSHRNv8i16_shift 1U, // SQRSHRNv8i8_shift 1U, // SQRSHRUNb 1U, // SQRSHRUNh 1U, // SQRSHRUNs 65U, // SQRSHRUNv16i8_shift 1U, // SQRSHRUNv2i32_shift 1U, // SQRSHRUNv4i16_shift 65U, // SQRSHRUNv4i32_shift 65U, // SQRSHRUNv8i16_shift 1U, // SQRSHRUNv8i8_shift 1U, // SQSHLUb 1U, // SQSHLUd 1U, // SQSHLUh 1U, // SQSHLUs 1U, // SQSHLUv16i8_shift 1U, // SQSHLUv2i32_shift 1U, // SQSHLUv2i64_shift 1U, // SQSHLUv4i16_shift 1U, // SQSHLUv4i32_shift 1U, // SQSHLUv8i16_shift 1U, // SQSHLUv8i8_shift 1U, // SQSHLb 1U, // SQSHLd 1U, // SQSHLh 1U, // SQSHLs 1033U, // SQSHLv16i8 1U, // SQSHLv16i8_shift 1U, // SQSHLv1i16 1U, // SQSHLv1i32 1U, // SQSHLv1i64 1U, // SQSHLv1i8 1289U, // SQSHLv2i32 1U, // SQSHLv2i32_shift 265U, // SQSHLv2i64 1U, // SQSHLv2i64_shift 1545U, // SQSHLv4i16 1U, // SQSHLv4i16_shift 521U, // SQSHLv4i32 1U, // SQSHLv4i32_shift 777U, // SQSHLv8i16 1U, // SQSHLv8i16_shift 1801U, // SQSHLv8i8 1U, // SQSHLv8i8_shift 1U, // SQSHRNb 1U, // SQSHRNh 1U, // SQSHRNs 65U, // SQSHRNv16i8_shift 1U, // SQSHRNv2i32_shift 1U, // SQSHRNv4i16_shift 65U, // SQSHRNv4i32_shift 65U, // SQSHRNv8i16_shift 1U, // SQSHRNv8i8_shift 1U, // SQSHRUNb 1U, // SQSHRUNh 1U, // SQSHRUNs 65U, // SQSHRUNv16i8_shift 1U, // SQSHRUNv2i32_shift 1U, // SQSHRUNv4i16_shift 65U, // SQSHRUNv4i32_shift 65U, // SQSHRUNv8i16_shift 1U, // SQSHRUNv8i8_shift 1033U, // SQSUBv16i8 1U, // SQSUBv1i16 1U, // SQSUBv1i32 1U, // SQSUBv1i64 1U, // SQSUBv1i8 1289U, // SQSUBv2i32 265U, // SQSUBv2i64 1545U, // SQSUBv4i16 521U, // SQSUBv4i32 777U, // SQSUBv8i16 1801U, // SQSUBv8i8 0U, // SQXTNv16i8 0U, // SQXTNv1i16 0U, // SQXTNv1i32 0U, // SQXTNv1i8 0U, // SQXTNv2i32 0U, // SQXTNv4i16 0U, // SQXTNv4i32 0U, // SQXTNv8i16 0U, // SQXTNv8i8 0U, // SQXTUNv16i8 0U, // SQXTUNv1i16 0U, // SQXTUNv1i32 0U, // SQXTUNv1i8 0U, // SQXTUNv2i32 0U, // SQXTUNv4i16 0U, // SQXTUNv4i32 0U, // SQXTUNv8i16 0U, // SQXTUNv8i8 1033U, // SRHADDv16i8 1289U, // SRHADDv2i32 1545U, // SRHADDv4i16 521U, // SRHADDv4i32 777U, // SRHADDv8i16 1801U, // SRHADDv8i8 65U, // SRId 65U, // SRIv16i8_shift 65U, // SRIv2i32_shift 65U, // SRIv2i64_shift 65U, // SRIv4i16_shift 65U, // SRIv4i32_shift 65U, // SRIv8i16_shift 65U, // SRIv8i8_shift 1033U, // SRSHLv16i8 1U, // SRSHLv1i64 1289U, // SRSHLv2i32 265U, // SRSHLv2i64 1545U, // SRSHLv4i16 521U, // SRSHLv4i32 777U, // SRSHLv8i16 1801U, // SRSHLv8i8 1U, // SRSHRd 1U, // SRSHRv16i8_shift 1U, // SRSHRv2i32_shift 1U, // SRSHRv2i64_shift 1U, // SRSHRv4i16_shift 1U, // SRSHRv4i32_shift 1U, // SRSHRv8i16_shift 1U, // SRSHRv8i8_shift 65U, // SRSRAd 65U, // SRSRAv16i8_shift 65U, // SRSRAv2i32_shift 65U, // SRSRAv2i64_shift 65U, // SRSRAv4i16_shift 65U, // SRSRAv4i32_shift 65U, // SRSRAv8i16_shift 65U, // SRSRAv8i8_shift 1U, // SSHLLv16i8_shift 1U, // SSHLLv2i32_shift 1U, // SSHLLv4i16_shift 1U, // SSHLLv4i32_shift 1U, // SSHLLv8i16_shift 1U, // SSHLLv8i8_shift 1033U, // SSHLv16i8 1U, // SSHLv1i64 1289U, // SSHLv2i32 265U, // SSHLv2i64 1545U, // SSHLv4i16 521U, // SSHLv4i32 777U, // SSHLv8i16 1801U, // SSHLv8i8 1U, // SSHRd 1U, // SSHRv16i8_shift 1U, // SSHRv2i32_shift 1U, // SSHRv2i64_shift 1U, // SSHRv4i16_shift 1U, // SSHRv4i32_shift 1U, // SSHRv8i16_shift 1U, // SSHRv8i8_shift 65U, // SSRAd 65U, // SSRAv16i8_shift 65U, // SSRAv2i32_shift 65U, // SSRAv2i64_shift 65U, // SSRAv4i16_shift 65U, // SSRAv4i32_shift 65U, // SSRAv8i16_shift 65U, // SSRAv8i8_shift 1033U, // SSUBLv16i8_v8i16 1289U, // SSUBLv2i32_v2i64 1545U, // SSUBLv4i16_v4i32 521U, // SSUBLv4i32_v2i64 777U, // SSUBLv8i16_v4i32 1801U, // SSUBLv8i8_v8i16 1033U, // SSUBWv16i8_v8i16 1289U, // SSUBWv2i32_v2i64 1545U, // SSUBWv4i16_v4i32 521U, // SSUBWv4i32_v2i64 777U, // SSUBWv8i16_v4i32 1801U, // SSUBWv8i8_v8i16 0U, // ST1Fourv16b 0U, // ST1Fourv16b_POST 0U, // ST1Fourv1d 0U, // ST1Fourv1d_POST 0U, // ST1Fourv2d 0U, // ST1Fourv2d_POST 0U, // ST1Fourv2s 0U, // ST1Fourv2s_POST 0U, // ST1Fourv4h 0U, // ST1Fourv4h_POST 0U, // ST1Fourv4s 0U, // ST1Fourv4s_POST 0U, // ST1Fourv8b 0U, // ST1Fourv8b_POST 0U, // ST1Fourv8h 0U, // ST1Fourv8h_POST 0U, // ST1Onev16b 0U, // ST1Onev16b_POST 0U, // ST1Onev1d 0U, // ST1Onev1d_POST 0U, // ST1Onev2d 0U, // ST1Onev2d_POST 0U, // ST1Onev2s 0U, // ST1Onev2s_POST 0U, // ST1Onev4h 0U, // ST1Onev4h_POST 0U, // ST1Onev4s 0U, // ST1Onev4s_POST 0U, // ST1Onev8b 0U, // ST1Onev8b_POST 0U, // ST1Onev8h 0U, // ST1Onev8h_POST 0U, // ST1Threev16b 0U, // ST1Threev16b_POST 0U, // ST1Threev1d 0U, // ST1Threev1d_POST 0U, // ST1Threev2d 0U, // ST1Threev2d_POST 0U, // ST1Threev2s 0U, // ST1Threev2s_POST 0U, // ST1Threev4h 0U, // ST1Threev4h_POST 0U, // ST1Threev4s 0U, // ST1Threev4s_POST 0U, // ST1Threev8b 0U, // ST1Threev8b_POST 0U, // ST1Threev8h 0U, // ST1Threev8h_POST 0U, // ST1Twov16b 0U, // ST1Twov16b_POST 0U, // ST1Twov1d 0U, // ST1Twov1d_POST 0U, // ST1Twov2d 0U, // ST1Twov2d_POST 0U, // ST1Twov2s 0U, // ST1Twov2s_POST 0U, // ST1Twov4h 0U, // ST1Twov4h_POST 0U, // ST1Twov4s 0U, // ST1Twov4s_POST 0U, // ST1Twov8b 0U, // ST1Twov8b_POST 0U, // ST1Twov8h 0U, // ST1Twov8h_POST 0U, // ST1i16 0U, // ST1i16_POST 0U, // ST1i32 0U, // ST1i32_POST 0U, // ST1i64 0U, // ST1i64_POST 0U, // ST1i8 0U, // ST1i8_POST 0U, // ST2Twov16b 0U, // ST2Twov16b_POST 0U, // ST2Twov2d 0U, // ST2Twov2d_POST 0U, // ST2Twov2s 0U, // ST2Twov2s_POST 0U, // ST2Twov4h 0U, // ST2Twov4h_POST 0U, // ST2Twov4s 0U, // ST2Twov4s_POST 0U, // ST2Twov8b 0U, // ST2Twov8b_POST 0U, // ST2Twov8h 0U, // ST2Twov8h_POST 0U, // ST2i16 0U, // ST2i16_POST 0U, // ST2i32 0U, // ST2i32_POST 0U, // ST2i64 0U, // ST2i64_POST 0U, // ST2i8 0U, // ST2i8_POST 0U, // ST3Threev16b 0U, // ST3Threev16b_POST 0U, // ST3Threev2d 0U, // ST3Threev2d_POST 0U, // ST3Threev2s 0U, // ST3Threev2s_POST 0U, // ST3Threev4h 0U, // ST3Threev4h_POST 0U, // ST3Threev4s 0U, // ST3Threev4s_POST 0U, // ST3Threev8b 0U, // ST3Threev8b_POST 0U, // ST3Threev8h 0U, // ST3Threev8h_POST 0U, // ST3i16 0U, // ST3i16_POST 0U, // ST3i32 0U, // ST3i32_POST 0U, // ST3i64 0U, // ST3i64_POST 0U, // ST3i8 0U, // ST3i8_POST 0U, // ST4Fourv16b 0U, // ST4Fourv16b_POST 0U, // ST4Fourv2d 0U, // ST4Fourv2d_POST 0U, // ST4Fourv2s 0U, // ST4Fourv2s_POST 0U, // ST4Fourv4h 0U, // ST4Fourv4h_POST 0U, // ST4Fourv4s 0U, // ST4Fourv4s_POST 0U, // ST4Fourv8b 0U, // ST4Fourv8b_POST 0U, // ST4Fourv8h 0U, // ST4Fourv8h_POST 0U, // ST4i16 0U, // ST4i16_POST 0U, // ST4i32 0U, // ST4i32_POST 0U, // ST4i64 0U, // ST4i64_POST 0U, // ST4i8 0U, // ST4i8_POST 4U, // STLRB 4U, // STLRH 4U, // STLRW 4U, // STLRX 4609U, // STLXPW 4609U, // STLXPX 3588U, // STLXRB 3588U, // STLXRH 3588U, // STLXRW 3588U, // STLXRX 43268U, // STNPDi 51460U, // STNPQi 59652U, // STNPSi 59652U, // STNPWi 43268U, // STNPXi 43268U, // STPDi 69444U, // STPDpost 330052U, // STPDpre 51460U, // STPQi 77636U, // STPQpost 338244U, // STPQpre 59652U, // STPSi 85828U, // STPSpost 346436U, // STPSpre 59652U, // STPWi 85828U, // STPWpost 346436U, // STPWpre 43268U, // STPXi 69444U, // STPXpost 330052U, // STPXpre 4U, // STRBBpost 4161U, // STRBBpre 92417U, // STRBBroW 100609U, // STRBBroX 89U, // STRBBui 4U, // STRBpost 4161U, // STRBpre 92417U, // STRBroW 100609U, // STRBroX 89U, // STRBui 4U, // STRDpost 4161U, // STRDpre 108801U, // STRDroW 116993U, // STRDroX 97U, // STRDui 4U, // STRHHpost 4161U, // STRHHpre 125185U, // STRHHroW 133377U, // STRHHroX 105U, // STRHHui 4U, // STRHpost 4161U, // STRHpre 125185U, // STRHroW 133377U, // STRHroX 105U, // STRHui 4U, // STRQpost 4161U, // STRQpre 141569U, // STRQroW 149761U, // STRQroX 113U, // STRQui 4U, // STRSpost 4161U, // STRSpre 157953U, // STRSroW 166145U, // STRSroX 121U, // STRSui 4U, // STRWpost 4161U, // STRWpre 157953U, // STRWroW 166145U, // STRWroX 121U, // STRWui 4U, // STRXpost 4161U, // STRXpre 108801U, // STRXroW 116993U, // STRXroX 97U, // STRXui 3585U, // STTRBi 3585U, // STTRHi 3585U, // STTRWi 3585U, // STTRXi 3585U, // STURBBi 3585U, // STURBi 3585U, // STURDi 3585U, // STURHHi 3585U, // STURHi 3585U, // STURQi 3585U, // STURSi 3585U, // STURWi 3585U, // STURXi 4609U, // STXPW 4609U, // STXPX 3588U, // STXRB 3588U, // STXRH 3588U, // STXRW 3588U, // STXRX 265U, // SUBHNv2i64_v2i32 273U, // SUBHNv2i64_v4i32 521U, // SUBHNv4i32_v4i16 529U, // SUBHNv4i32_v8i16 785U, // SUBHNv8i16_v16i8 777U, // SUBHNv8i16_v8i8 25U, // SUBSWri 0U, // SUBSWrr 33U, // SUBSWrs 41U, // SUBSWrx 25U, // SUBSXri 0U, // SUBSXrr 33U, // SUBSXrs 41U, // SUBSXrx 2049U, // SUBSXrx64 25U, // SUBWri 0U, // SUBWrr 33U, // SUBWrs 41U, // SUBWrx 25U, // SUBXri 0U, // SUBXrr 33U, // SUBXrs 41U, // SUBXrx 2049U, // SUBXrx64 1033U, // SUBv16i8 1U, // SUBv1i64 1289U, // SUBv2i32 265U, // SUBv2i64 1545U, // SUBv4i16 521U, // SUBv4i32 777U, // SUBv8i16 1801U, // SUBv8i8 0U, // SUQADDv16i8 0U, // SUQADDv1i16 0U, // SUQADDv1i32 0U, // SUQADDv1i64 0U, // SUQADDv1i8 0U, // SUQADDv2i32 0U, // SUQADDv2i64 0U, // SUQADDv4i16 0U, // SUQADDv4i32 0U, // SUQADDv8i16 0U, // SUQADDv8i8 0U, // SVC 129U, // SYSLxt 0U, // SYSxt 0U, // TBLv16i8Four 0U, // TBLv16i8One 0U, // TBLv16i8Three 0U, // TBLv16i8Two 0U, // TBLv8i8Four 0U, // TBLv8i8One 0U, // TBLv8i8Three 0U, // TBLv8i8Two 137U, // TBNZW 137U, // TBNZX 0U, // TBXv16i8Four 0U, // TBXv16i8One 0U, // TBXv16i8Three 0U, // TBXv16i8Two 0U, // TBXv8i8Four 0U, // TBXv8i8One 0U, // TBXv8i8Three 0U, // TBXv8i8Two 137U, // TBZW 137U, // TBZX 0U, // TCRETURNdi 0U, // TCRETURNri 0U, // TLSDESCCALL 0U, // TLSDESC_BLR 1033U, // TRN1v16i8 1289U, // TRN1v2i32 265U, // TRN1v2i64 1545U, // TRN1v4i16 521U, // TRN1v4i32 777U, // TRN1v8i16 1801U, // TRN1v8i8 1033U, // TRN2v16i8 1289U, // TRN2v2i32 265U, // TRN2v2i64 1545U, // TRN2v4i16 521U, // TRN2v4i32 777U, // TRN2v8i16 1801U, // TRN2v8i8 1041U, // UABALv16i8_v8i16 1297U, // UABALv2i32_v2i64 1553U, // UABALv4i16_v4i32 529U, // UABALv4i32_v2i64 785U, // UABALv8i16_v4i32 1809U, // UABALv8i8_v8i16 1041U, // UABAv16i8 1297U, // UABAv2i32 1553U, // UABAv4i16 529U, // UABAv4i32 785U, // UABAv8i16 1809U, // UABAv8i8 1033U, // UABDLv16i8_v8i16 1289U, // UABDLv2i32_v2i64 1545U, // UABDLv4i16_v4i32 521U, // UABDLv4i32_v2i64 777U, // UABDLv8i16_v4i32 1801U, // UABDLv8i8_v8i16 1033U, // UABDv16i8 1289U, // UABDv2i32 1545U, // UABDv4i16 521U, // UABDv4i32 777U, // UABDv8i16 1801U, // UABDv8i8 0U, // UADALPv16i8_v8i16 0U, // UADALPv2i32_v1i64 0U, // UADALPv4i16_v2i32 0U, // UADALPv4i32_v2i64 0U, // UADALPv8i16_v4i32 0U, // UADALPv8i8_v4i16 0U, // UADDLPv16i8_v8i16 0U, // UADDLPv2i32_v1i64 0U, // UADDLPv4i16_v2i32 0U, // UADDLPv4i32_v2i64 0U, // UADDLPv8i16_v4i32 0U, // UADDLPv8i8_v4i16 0U, // UADDLVv16i8v 0U, // UADDLVv4i16v 0U, // UADDLVv4i32v 0U, // UADDLVv8i16v 0U, // UADDLVv8i8v 1033U, // UADDLv16i8_v8i16 1289U, // UADDLv2i32_v2i64 1545U, // UADDLv4i16_v4i32 521U, // UADDLv4i32_v2i64 777U, // UADDLv8i16_v4i32 1801U, // UADDLv8i8_v8i16 1033U, // UADDWv16i8_v8i16 1289U, // UADDWv2i32_v2i64 1545U, // UADDWv4i16_v4i32 521U, // UADDWv4i32_v2i64 777U, // UADDWv8i16_v4i32 1801U, // UADDWv8i8_v8i16 18689U, // UBFMWri 18689U, // UBFMXri 1U, // UCVTFSWDri 1U, // UCVTFSWSri 1U, // UCVTFSXDri 1U, // UCVTFSXSri 0U, // UCVTFUWDri 0U, // UCVTFUWSri 0U, // UCVTFUXDri 0U, // UCVTFUXSri 1U, // UCVTFd 1U, // UCVTFs 0U, // UCVTFv1i32 0U, // UCVTFv1i64 0U, // UCVTFv2f32 0U, // UCVTFv2f64 1U, // UCVTFv2i32_shift 1U, // UCVTFv2i64_shift 0U, // UCVTFv4f32 1U, // UCVTFv4i32_shift 1U, // UDIVWr 1U, // UDIVXr 1U, // UDIV_IntWr 1U, // UDIV_IntXr 1033U, // UHADDv16i8 1289U, // UHADDv2i32 1545U, // UHADDv4i16 521U, // UHADDv4i32 777U, // UHADDv8i16 1801U, // UHADDv8i8 1033U, // UHSUBv16i8 1289U, // UHSUBv2i32 1545U, // UHSUBv4i16 521U, // UHSUBv4i32 777U, // UHSUBv8i16 1801U, // UHSUBv8i8 18689U, // UMADDLrrr 1033U, // UMAXPv16i8 1289U, // UMAXPv2i32 1545U, // UMAXPv4i16 521U, // UMAXPv4i32 777U, // UMAXPv8i16 1801U, // UMAXPv8i8 0U, // UMAXVv16i8v 0U, // UMAXVv4i16v 0U, // UMAXVv4i32v 0U, // UMAXVv8i16v 0U, // UMAXVv8i8v 1033U, // UMAXv16i8 1289U, // UMAXv2i32 1545U, // UMAXv4i16 521U, // UMAXv4i32 777U, // UMAXv8i16 1801U, // UMAXv8i8 1033U, // UMINPv16i8 1289U, // UMINPv2i32 1545U, // UMINPv4i16 521U, // UMINPv4i32 777U, // UMINPv8i16 1801U, // UMINPv8i8 0U, // UMINVv16i8v 0U, // UMINVv4i16v 0U, // UMINVv4i32v 0U, // UMINVv8i16v 0U, // UMINVv8i8v 1033U, // UMINv16i8 1289U, // UMINv2i32 1545U, // UMINv4i16 521U, // UMINv4i32 777U, // UMINv8i16 1801U, // UMINv8i8 1041U, // UMLALv16i8_v8i16 27665U, // UMLALv2i32_indexed 1297U, // UMLALv2i32_v2i64 28945U, // UMLALv4i16_indexed 1553U, // UMLALv4i16_v4i32 27665U, // UMLALv4i32_indexed 529U, // UMLALv4i32_v2i64 28945U, // UMLALv8i16_indexed 785U, // UMLALv8i16_v4i32 1809U, // UMLALv8i8_v8i16 1041U, // UMLSLv16i8_v8i16 27665U, // UMLSLv2i32_indexed 1297U, // UMLSLv2i32_v2i64 28945U, // UMLSLv4i16_indexed 1553U, // UMLSLv4i16_v4i32 27665U, // UMLSLv4i32_indexed 529U, // UMLSLv4i32_v2i64 28945U, // UMLSLv8i16_indexed 785U, // UMLSLv8i16_v4i32 1809U, // UMLSLv8i8_v8i16 75U, // UMOVvi16 75U, // UMOVvi32 75U, // UMOVvi64 75U, // UMOVvi8 18689U, // UMSUBLrrr 1U, // UMULHrr 1033U, // UMULLv16i8_v8i16 35849U, // UMULLv2i32_indexed 1289U, // UMULLv2i32_v2i64 37129U, // UMULLv4i16_indexed 1545U, // UMULLv4i16_v4i32 35849U, // UMULLv4i32_indexed 521U, // UMULLv4i32_v2i64 37129U, // UMULLv8i16_indexed 777U, // UMULLv8i16_v4i32 1801U, // UMULLv8i8_v8i16 1033U, // UQADDv16i8 1U, // UQADDv1i16 1U, // UQADDv1i32 1U, // UQADDv1i64 1U, // UQADDv1i8 1289U, // UQADDv2i32 265U, // UQADDv2i64 1545U, // UQADDv4i16 521U, // UQADDv4i32 777U, // UQADDv8i16 1801U, // UQADDv8i8 1033U, // UQRSHLv16i8 1U, // UQRSHLv1i16 1U, // UQRSHLv1i32 1U, // UQRSHLv1i64 1U, // UQRSHLv1i8 1289U, // UQRSHLv2i32 265U, // UQRSHLv2i64 1545U, // UQRSHLv4i16 521U, // UQRSHLv4i32 777U, // UQRSHLv8i16 1801U, // UQRSHLv8i8 1U, // UQRSHRNb 1U, // UQRSHRNh 1U, // UQRSHRNs 65U, // UQRSHRNv16i8_shift 1U, // UQRSHRNv2i32_shift 1U, // UQRSHRNv4i16_shift 65U, // UQRSHRNv4i32_shift 65U, // UQRSHRNv8i16_shift 1U, // UQRSHRNv8i8_shift 1U, // UQSHLb 1U, // UQSHLd 1U, // UQSHLh 1U, // UQSHLs 1033U, // UQSHLv16i8 1U, // UQSHLv16i8_shift 1U, // UQSHLv1i16 1U, // UQSHLv1i32 1U, // UQSHLv1i64 1U, // UQSHLv1i8 1289U, // UQSHLv2i32 1U, // UQSHLv2i32_shift 265U, // UQSHLv2i64 1U, // UQSHLv2i64_shift 1545U, // UQSHLv4i16 1U, // UQSHLv4i16_shift 521U, // UQSHLv4i32 1U, // UQSHLv4i32_shift 777U, // UQSHLv8i16 1U, // UQSHLv8i16_shift 1801U, // UQSHLv8i8 1U, // UQSHLv8i8_shift 1U, // UQSHRNb 1U, // UQSHRNh 1U, // UQSHRNs 65U, // UQSHRNv16i8_shift 1U, // UQSHRNv2i32_shift 1U, // UQSHRNv4i16_shift 65U, // UQSHRNv4i32_shift 65U, // UQSHRNv8i16_shift 1U, // UQSHRNv8i8_shift 1033U, // UQSUBv16i8 1U, // UQSUBv1i16 1U, // UQSUBv1i32 1U, // UQSUBv1i64 1U, // UQSUBv1i8 1289U, // UQSUBv2i32 265U, // UQSUBv2i64 1545U, // UQSUBv4i16 521U, // UQSUBv4i32 777U, // UQSUBv8i16 1801U, // UQSUBv8i8 0U, // UQXTNv16i8 0U, // UQXTNv1i16 0U, // UQXTNv1i32 0U, // UQXTNv1i8 0U, // UQXTNv2i32 0U, // UQXTNv4i16 0U, // UQXTNv4i32 0U, // UQXTNv8i16 0U, // UQXTNv8i8 0U, // URECPEv2i32 0U, // URECPEv4i32 1033U, // URHADDv16i8 1289U, // URHADDv2i32 1545U, // URHADDv4i16 521U, // URHADDv4i32 777U, // URHADDv8i16 1801U, // URHADDv8i8 1033U, // URSHLv16i8 1U, // URSHLv1i64 1289U, // URSHLv2i32 265U, // URSHLv2i64 1545U, // URSHLv4i16 521U, // URSHLv4i32 777U, // URSHLv8i16 1801U, // URSHLv8i8 1U, // URSHRd 1U, // URSHRv16i8_shift 1U, // URSHRv2i32_shift 1U, // URSHRv2i64_shift 1U, // URSHRv4i16_shift 1U, // URSHRv4i32_shift 1U, // URSHRv8i16_shift 1U, // URSHRv8i8_shift 0U, // URSQRTEv2i32 0U, // URSQRTEv4i32 65U, // URSRAd 65U, // URSRAv16i8_shift 65U, // URSRAv2i32_shift 65U, // URSRAv2i64_shift 65U, // URSRAv4i16_shift 65U, // URSRAv4i32_shift 65U, // URSRAv8i16_shift 65U, // URSRAv8i8_shift 1U, // USHLLv16i8_shift 1U, // USHLLv2i32_shift 1U, // USHLLv4i16_shift 1U, // USHLLv4i32_shift 1U, // USHLLv8i16_shift 1U, // USHLLv8i8_shift 1033U, // USHLv16i8 1U, // USHLv1i64 1289U, // USHLv2i32 265U, // USHLv2i64 1545U, // USHLv4i16 521U, // USHLv4i32 777U, // USHLv8i16 1801U, // USHLv8i8 1U, // USHRd 1U, // USHRv16i8_shift 1U, // USHRv2i32_shift 1U, // USHRv2i64_shift 1U, // USHRv4i16_shift 1U, // USHRv4i32_shift 1U, // USHRv8i16_shift 1U, // USHRv8i8_shift 0U, // USQADDv16i8 0U, // USQADDv1i16 0U, // USQADDv1i32 0U, // USQADDv1i64 0U, // USQADDv1i8 0U, // USQADDv2i32 0U, // USQADDv2i64 0U, // USQADDv4i16 0U, // USQADDv4i32 0U, // USQADDv8i16 0U, // USQADDv8i8 65U, // USRAd 65U, // USRAv16i8_shift 65U, // USRAv2i32_shift 65U, // USRAv2i64_shift 65U, // USRAv4i16_shift 65U, // USRAv4i32_shift 65U, // USRAv8i16_shift 65U, // USRAv8i8_shift 1033U, // USUBLv16i8_v8i16 1289U, // USUBLv2i32_v2i64 1545U, // USUBLv4i16_v4i32 521U, // USUBLv4i32_v2i64 777U, // USUBLv8i16_v4i32 1801U, // USUBLv8i8_v8i16 1033U, // USUBWv16i8_v8i16 1289U, // USUBWv2i32_v2i64 1545U, // USUBWv4i16_v4i32 521U, // USUBWv4i32_v2i64 777U, // USUBWv8i16_v4i32 1801U, // USUBWv8i8_v8i16 1033U, // UZP1v16i8 1289U, // UZP1v2i32 265U, // UZP1v2i64 1545U, // UZP1v4i16 521U, // UZP1v4i32 777U, // UZP1v8i16 1801U, // UZP1v8i8 1033U, // UZP2v16i8 1289U, // UZP2v2i32 265U, // UZP2v2i64 1545U, // UZP2v4i16 521U, // UZP2v4i32 777U, // UZP2v8i16 1801U, // UZP2v8i8 0U, // XTNv16i8 0U, // XTNv2i32 0U, // XTNv4i16 0U, // XTNv4i32 0U, // XTNv8i16 0U, // XTNv8i8 1033U, // ZIP1v16i8 1289U, // ZIP1v2i32 265U, // ZIP1v2i64 1545U, // ZIP1v4i16 521U, // ZIP1v4i32 777U, // ZIP1v8i16 1801U, // ZIP1v8i8 1033U, // ZIP2v16i8 1289U, // ZIP2v2i32 265U, // ZIP2v2i64 1545U, // ZIP2v4i16 521U, // ZIP2v4i32 777U, // ZIP2v8i16 1801U, // ZIP2v8i8 0U }; #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 's', 'h', 'a', '1', 's', 'u', '0', 9, 0, /* 9 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '0', 9, 0, /* 20 */ 'l', 'd', '1', 9, 0, /* 25 */ 't', 'r', 'n', '1', 9, 0, /* 31 */ 'z', 'i', 'p', '1', 9, 0, /* 37 */ 'u', 'z', 'p', '1', 9, 0, /* 43 */ 'd', 'c', 'p', 's', '1', 9, 0, /* 50 */ 's', 't', '1', 9, 0, /* 55 */ 's', 'h', 'a', '1', 's', 'u', '1', 9, 0, /* 64 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '1', 9, 0, /* 75 */ 'r', 'e', 'v', '3', '2', 9, 0, /* 82 */ 'l', 'd', '2', 9, 0, /* 87 */ 's', 'h', 'a', '2', '5', '6', 'h', '2', 9, 0, /* 97 */ 's', 'a', 'b', 'a', 'l', '2', 9, 0, /* 105 */ 'u', 'a', 'b', 'a', 'l', '2', 9, 0, /* 113 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', '2', 9, 0, /* 123 */ 's', 'm', 'l', 'a', 'l', '2', 9, 0, /* 131 */ 'u', 'm', 'l', 'a', 'l', '2', 9, 0, /* 139 */ 's', 's', 'u', 'b', 'l', '2', 9, 0, /* 147 */ 'u', 's', 'u', 'b', 'l', '2', 9, 0, /* 155 */ 's', 'a', 'b', 'd', 'l', '2', 9, 0, /* 163 */ 'u', 'a', 'b', 'd', 'l', '2', 9, 0, /* 171 */ 's', 'a', 'd', 'd', 'l', '2', 9, 0, /* 179 */ 'u', 'a', 'd', 'd', 'l', '2', 9, 0, /* 187 */ 's', 's', 'h', 'l', 'l', '2', 9, 0, /* 195 */ 'u', 's', 'h', 'l', 'l', '2', 9, 0, /* 203 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', '2', 9, 0, /* 213 */ 'p', 'm', 'u', 'l', 'l', '2', 9, 0, /* 221 */ 's', 'm', 'u', 'l', 'l', '2', 9, 0, /* 229 */ 'u', 'm', 'u', 'l', 'l', '2', 9, 0, /* 237 */ 's', 'q', 'd', 'm', 'l', 's', 'l', '2', 9, 0, /* 247 */ 's', 'm', 'l', 's', 'l', '2', 9, 0, /* 255 */ 'u', 'm', 'l', 's', 'l', '2', 9, 0, /* 263 */ 'f', 'c', 'v', 't', 'l', '2', 9, 0, /* 271 */ 'r', 's', 'u', 'b', 'h', 'n', '2', 9, 0, /* 280 */ 'r', 'a', 'd', 'd', 'h', 'n', '2', 9, 0, /* 289 */ 's', 'q', 's', 'h', 'r', 'n', '2', 9, 0, /* 298 */ 'u', 'q', 's', 'h', 'r', 'n', '2', 9, 0, /* 307 */ 's', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0, /* 317 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0, /* 327 */ 't', 'r', 'n', '2', 9, 0, /* 333 */ 'f', 'c', 'v', 't', 'n', '2', 9, 0, /* 341 */ 's', 'q', 'x', 't', 'n', '2', 9, 0, /* 349 */ 'u', 'q', 'x', 't', 'n', '2', 9, 0, /* 357 */ 's', 'q', 's', 'h', 'r', 'u', 'n', '2', 9, 0, /* 367 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', '2', 9, 0, /* 378 */ 's', 'q', 'x', 't', 'u', 'n', '2', 9, 0, /* 387 */ 'f', 'c', 'v', 't', 'x', 'n', '2', 9, 0, /* 396 */ 'z', 'i', 'p', '2', 9, 0, /* 402 */ 'u', 'z', 'p', '2', 9, 0, /* 408 */ 'd', 'c', 'p', 's', '2', 9, 0, /* 415 */ 's', 't', '2', 9, 0, /* 420 */ 's', 's', 'u', 'b', 'w', '2', 9, 0, /* 428 */ 'u', 's', 'u', 'b', 'w', '2', 9, 0, /* 436 */ 's', 'a', 'd', 'd', 'w', '2', 9, 0, /* 444 */ 'u', 'a', 'd', 'd', 'w', '2', 9, 0, /* 452 */ 'l', 'd', '3', 9, 0, /* 457 */ 'd', 'c', 'p', 's', '3', 9, 0, /* 464 */ 's', 't', '3', 9, 0, /* 469 */ 'r', 'e', 'v', '6', '4', 9, 0, /* 476 */ 'l', 'd', '4', 9, 0, /* 481 */ 's', 't', '4', 9, 0, /* 486 */ 'r', 'e', 'v', '1', '6', 9, 0, /* 493 */ 's', 'a', 'b', 'a', 9, 0, /* 499 */ 'u', 'a', 'b', 'a', 9, 0, /* 505 */ 'f', 'm', 'l', 'a', 9, 0, /* 511 */ 's', 'r', 's', 'r', 'a', 9, 0, /* 518 */ 'u', 'r', 's', 'r', 'a', 9, 0, /* 525 */ 's', 's', 'r', 'a', 9, 0, /* 531 */ 'u', 's', 'r', 'a', 9, 0, /* 537 */ 'f', 'r', 'i', 'n', 't', 'a', 9, 0, /* 545 */ 'c', 'r', 'c', '3', '2', 'b', 9, 0, /* 553 */ 'c', 'r', 'c', '3', '2', 'c', 'b', 9, 0, /* 562 */ 'd', 'm', 'b', 9, 0, /* 567 */ 'l', 'd', 'a', 'r', 'b', 9, 0, /* 574 */ 'l', 'd', 'r', 'b', 9, 0, /* 580 */ 's', 't', 'l', 'r', 'b', 9, 0, /* 587 */ 'l', 'd', 't', 'r', 'b', 9, 0, /* 594 */ 's', 't', 'r', 'b', 9, 0, /* 600 */ 's', 't', 't', 'r', 'b', 9, 0, /* 607 */ 'l', 'd', 'u', 'r', 'b', 9, 0, /* 614 */ 's', 't', 'u', 'r', 'b', 9, 0, /* 621 */ 'l', 'd', 'a', 'x', 'r', 'b', 9, 0, /* 629 */ 'l', 'd', 'x', 'r', 'b', 9, 0, /* 636 */ 's', 't', 'l', 'x', 'r', 'b', 9, 0, /* 644 */ 's', 't', 'x', 'r', 'b', 9, 0, /* 651 */ 'd', 's', 'b', 9, 0, /* 656 */ 'i', 's', 'b', 9, 0, /* 661 */ 'l', 'd', 'r', 's', 'b', 9, 0, /* 668 */ 'l', 'd', 't', 'r', 's', 'b', 9, 0, /* 676 */ 'l', 'd', 'u', 'r', 's', 'b', 9, 0, /* 684 */ 'f', 's', 'u', 'b', 9, 0, /* 690 */ 's', 'h', 's', 'u', 'b', 9, 0, /* 697 */ 'u', 'h', 's', 'u', 'b', 9, 0, /* 704 */ 'f', 'm', 's', 'u', 'b', 9, 0, /* 711 */ 'f', 'n', 'm', 's', 'u', 'b', 9, 0, /* 719 */ 's', 'q', 's', 'u', 'b', 9, 0, /* 726 */ 'u', 'q', 's', 'u', 'b', 9, 0, /* 733 */ 's', 'h', 'a', '1', 'c', 9, 0, /* 740 */ 's', 'b', 'c', 9, 0, /* 745 */ 'a', 'd', 'c', 9, 0, /* 750 */ 'b', 'i', 'c', 9, 0, /* 755 */ 'a', 'e', 's', 'i', 'm', 'c', 9, 0, /* 763 */ 'a', 'e', 's', 'm', 'c', 9, 0, /* 770 */ 'c', 's', 'i', 'n', 'c', 9, 0, /* 777 */ 'h', 'v', 'c', 9, 0, /* 782 */ 's', 'v', 'c', 9, 0, /* 787 */ 'f', 'a', 'b', 'd', 9, 0, /* 793 */ 's', 'a', 'b', 'd', 9, 0, /* 799 */ 'u', 'a', 'b', 'd', 9, 0, /* 805 */ 'f', 'a', 'd', 'd', 9, 0, /* 811 */ 's', 'r', 'h', 'a', 'd', 'd', 9, 0, /* 819 */ 'u', 'r', 'h', 'a', 'd', 'd', 9, 0, /* 827 */ 's', 'h', 'a', 'd', 'd', 9, 0, /* 834 */ 'u', 'h', 'a', 'd', 'd', 9, 0, /* 841 */ 'f', 'm', 'a', 'd', 'd', 9, 0, /* 848 */ 'f', 'n', 'm', 'a', 'd', 'd', 9, 0, /* 856 */ 'u', 's', 'q', 'a', 'd', 'd', 9, 0, /* 864 */ 's', 'u', 'q', 'a', 'd', 'd', 9, 0, /* 872 */ 'a', 'n', 'd', 9, 0, /* 877 */ 'a', 'e', 's', 'd', 9, 0, /* 883 */ 'f', 'a', 'c', 'g', 'e', 9, 0, /* 890 */ 'f', 'c', 'm', 'g', 'e', 9, 0, /* 897 */ 'f', 'c', 'm', 'l', 'e', 9, 0, /* 904 */ 'f', 'r', 'e', 'c', 'p', 'e', 9, 0, /* 912 */ 'u', 'r', 'e', 'c', 'p', 'e', 9, 0, /* 920 */ 'f', 'c', 'c', 'm', 'p', 'e', 9, 0, /* 928 */ 'f', 'c', 'm', 'p', 'e', 9, 0, /* 935 */ 'a', 'e', 's', 'e', 9, 0, /* 941 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 9, 0, /* 950 */ 'u', 'r', 's', 'q', 'r', 't', 'e', 9, 0, /* 959 */ 'b', 'i', 'f', 9, 0, /* 964 */ 's', 'c', 'v', 't', 'f', 9, 0, /* 971 */ 'u', 'c', 'v', 't', 'f', 9, 0, /* 978 */ 'f', 'n', 'e', 'g', 9, 0, /* 984 */ 's', 'q', 'n', 'e', 'g', 9, 0, /* 991 */ 'c', 's', 'n', 'e', 'g', 9, 0, /* 998 */ 's', 'h', 'a', '1', 'h', 9, 0, /* 1005 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0, /* 1013 */ 's', 'h', 'a', '2', '5', '6', 'h', 9, 0, /* 1022 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0, /* 1031 */ 's', 'q', 'd', 'm', 'u', 'l', 'h', 9, 0, /* 1040 */ 's', 'q', 'r', 'd', 'm', 'u', 'l', 'h', 9, 0, /* 1050 */ 's', 'm', 'u', 'l', 'h', 9, 0, /* 1057 */ 'u', 'm', 'u', 'l', 'h', 9, 0, /* 1064 */ 'l', 'd', 'a', 'r', 'h', 9, 0, /* 1071 */ 'l', 'd', 'r', 'h', 9, 0, /* 1077 */ 's', 't', 'l', 'r', 'h', 9, 0, /* 1084 */ 'l', 'd', 't', 'r', 'h', 9, 0, /* 1091 */ 's', 't', 'r', 'h', 9, 0, /* 1097 */ 's', 't', 't', 'r', 'h', 9, 0, /* 1104 */ 'l', 'd', 'u', 'r', 'h', 9, 0, /* 1111 */ 's', 't', 'u', 'r', 'h', 9, 0, /* 1118 */ 'l', 'd', 'a', 'x', 'r', 'h', 9, 0, /* 1126 */ 'l', 'd', 'x', 'r', 'h', 9, 0, /* 1133 */ 's', 't', 'l', 'x', 'r', 'h', 9, 0, /* 1141 */ 's', 't', 'x', 'r', 'h', 9, 0, /* 1148 */ 'l', 'd', 'r', 's', 'h', 9, 0, /* 1155 */ 'l', 'd', 't', 'r', 's', 'h', 9, 0, /* 1163 */ 'l', 'd', 'u', 'r', 's', 'h', 9, 0, /* 1171 */ 'c', 'm', 'h', 'i', 9, 0, /* 1177 */ 's', 'l', 'i', 9, 0, /* 1182 */ 'm', 'v', 'n', 'i', 9, 0, /* 1188 */ 's', 'r', 'i', 9, 0, /* 1193 */ 'f', 'r', 'i', 'n', 't', 'i', 9, 0, /* 1201 */ 'm', 'o', 'v', 'i', 9, 0, /* 1207 */ 'b', 'r', 'k', 9, 0, /* 1212 */ 'm', 'o', 'v', 'k', 9, 0, /* 1218 */ 's', 'a', 'b', 'a', 'l', 9, 0, /* 1225 */ 'u', 'a', 'b', 'a', 'l', 9, 0, /* 1232 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 9, 0, /* 1241 */ 's', 'm', 'l', 'a', 'l', 9, 0, /* 1248 */ 'u', 'm', 'l', 'a', 'l', 9, 0, /* 1255 */ 't', 'b', 'l', 9, 0, /* 1260 */ 's', 'm', 's', 'u', 'b', 'l', 9, 0, /* 1268 */ 'u', 'm', 's', 'u', 'b', 'l', 9, 0, /* 1276 */ 's', 's', 'u', 'b', 'l', 9, 0, /* 1283 */ 'u', 's', 'u', 'b', 'l', 9, 0, /* 1290 */ 's', 'a', 'b', 'd', 'l', 9, 0, /* 1297 */ 'u', 'a', 'b', 'd', 'l', 9, 0, /* 1304 */ 's', 'm', 'a', 'd', 'd', 'l', 9, 0, /* 1312 */ 'u', 'm', 'a', 'd', 'd', 'l', 9, 0, /* 1320 */ 's', 'a', 'd', 'd', 'l', 9, 0, /* 1327 */ 'u', 'a', 'd', 'd', 'l', 9, 0, /* 1334 */ 'f', 'c', 's', 'e', 'l', 9, 0, /* 1341 */ 's', 'q', 's', 'h', 'l', 9, 0, /* 1348 */ 'u', 'q', 's', 'h', 'l', 9, 0, /* 1355 */ 's', 'q', 'r', 's', 'h', 'l', 9, 0, /* 1363 */ 'u', 'q', 'r', 's', 'h', 'l', 9, 0, /* 1371 */ 's', 'r', 's', 'h', 'l', 9, 0, /* 1378 */ 'u', 'r', 's', 'h', 'l', 9, 0, /* 1385 */ 's', 's', 'h', 'l', 9, 0, /* 1391 */ 'u', 's', 'h', 'l', 9, 0, /* 1397 */ 's', 's', 'h', 'l', 'l', 9, 0, /* 1404 */ 'u', 's', 'h', 'l', 'l', 9, 0, /* 1411 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 9, 0, /* 1420 */ 'p', 'm', 'u', 'l', 'l', 9, 0, /* 1427 */ 's', 'm', 'u', 'l', 'l', 9, 0, /* 1434 */ 'u', 'm', 'u', 'l', 'l', 9, 0, /* 1441 */ 'b', 's', 'l', 9, 0, /* 1446 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 9, 0, /* 1455 */ 's', 'm', 'l', 's', 'l', 9, 0, /* 1462 */ 'u', 'm', 'l', 's', 'l', 9, 0, /* 1469 */ 's', 'y', 's', 'l', 9, 0, /* 1475 */ 'f', 'c', 'v', 't', 'l', 9, 0, /* 1482 */ 'f', 'm', 'u', 'l', 9, 0, /* 1488 */ 'f', 'n', 'm', 'u', 'l', 9, 0, /* 1495 */ 'p', 'm', 'u', 'l', 9, 0, /* 1501 */ 's', 'h', 'a', '1', 'm', 9, 0, /* 1508 */ 's', 'b', 'f', 'm', 9, 0, /* 1514 */ 'u', 'b', 'f', 'm', 9, 0, /* 1520 */ 'p', 'r', 'f', 'm', 9, 0, /* 1526 */ 'f', 'm', 'i', 'n', 'n', 'm', 9, 0, /* 1534 */ 'f', 'm', 'a', 'x', 'n', 'm', 9, 0, /* 1542 */ 'f', 'r', 'i', 'n', 't', 'm', 9, 0, /* 1550 */ 'p', 'r', 'f', 'u', 'm', 9, 0, /* 1557 */ 'r', 's', 'u', 'b', 'h', 'n', 9, 0, /* 1565 */ 'r', 'a', 'd', 'd', 'h', 'n', 9, 0, /* 1573 */ 'f', 'm', 'i', 'n', 9, 0, /* 1579 */ 's', 'm', 'i', 'n', 9, 0, /* 1585 */ 'u', 'm', 'i', 'n', 9, 0, /* 1591 */ 'c', 'c', 'm', 'n', 9, 0, /* 1597 */ 'e', 'o', 'n', 9, 0, /* 1602 */ 's', 'q', 's', 'h', 'r', 'n', 9, 0, /* 1610 */ 'u', 'q', 's', 'h', 'r', 'n', 9, 0, /* 1618 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 9, 0, /* 1627 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 9, 0, /* 1636 */ 'o', 'r', 'n', 9, 0, /* 1641 */ 'f', 'r', 'i', 'n', 't', 'n', 9, 0, /* 1649 */ 'f', 'c', 'v', 't', 'n', 9, 0, /* 1656 */ 's', 'q', 'x', 't', 'n', 9, 0, /* 1663 */ 'u', 'q', 'x', 't', 'n', 9, 0, /* 1670 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 9, 0, /* 1679 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 9, 0, /* 1689 */ 's', 'q', 'x', 't', 'u', 'n', 9, 0, /* 1697 */ 'm', 'o', 'v', 'n', 9, 0, /* 1703 */ 'f', 'c', 'v', 't', 'x', 'n', 9, 0, /* 1711 */ 's', 'h', 'a', '1', 'p', 9, 0, /* 1718 */ 'f', 'a', 'd', 'd', 'p', 9, 0, /* 1725 */ 'l', 'd', 'p', 9, 0, /* 1730 */ 's', 'a', 'd', 'a', 'l', 'p', 9, 0, /* 1738 */ 'u', 'a', 'd', 'a', 'l', 'p', 9, 0, /* 1746 */ 's', 'a', 'd', 'd', 'l', 'p', 9, 0, /* 1754 */ 'u', 'a', 'd', 'd', 'l', 'p', 9, 0, /* 1762 */ 'f', 'c', 'c', 'm', 'p', 9, 0, /* 1769 */ 'f', 'c', 'm', 'p', 9, 0, /* 1775 */ 'f', 'm', 'i', 'n', 'n', 'm', 'p', 9, 0, /* 1784 */ 'f', 'm', 'a', 'x', 'n', 'm', 'p', 9, 0, /* 1793 */ 'l', 'd', 'n', 'p', 9, 0, /* 1799 */ 'f', 'm', 'i', 'n', 'p', 9, 0, /* 1806 */ 's', 'm', 'i', 'n', 'p', 9, 0, /* 1813 */ 'u', 'm', 'i', 'n', 'p', 9, 0, /* 1820 */ 's', 't', 'n', 'p', 9, 0, /* 1826 */ 'a', 'd', 'r', 'p', 9, 0, /* 1832 */ 'f', 'r', 'i', 'n', 't', 'p', 9, 0, /* 1840 */ 's', 't', 'p', 9, 0, /* 1845 */ 'd', 'u', 'p', 9, 0, /* 1850 */ 'l', 'd', 'a', 'x', 'p', 9, 0, /* 1857 */ 'f', 'm', 'a', 'x', 'p', 9, 0, /* 1864 */ 's', 'm', 'a', 'x', 'p', 9, 0, /* 1871 */ 'u', 'm', 'a', 'x', 'p', 9, 0, /* 1878 */ 'l', 'd', 'x', 'p', 9, 0, /* 1884 */ 's', 't', 'l', 'x', 'p', 9, 0, /* 1891 */ 's', 't', 'x', 'p', 9, 0, /* 1897 */ 'f', 'c', 'm', 'e', 'q', 9, 0, /* 1904 */ 'l', 'd', '1', 'r', 9, 0, /* 1910 */ 'l', 'd', '2', 'r', 9, 0, /* 1916 */ 'l', 'd', '3', 'r', 9, 0, /* 1922 */ 'l', 'd', '4', 'r', 9, 0, /* 1928 */ 'l', 'd', 'a', 'r', 9, 0, /* 1934 */ 'b', 'r', 9, 0, /* 1938 */ 'a', 'd', 'r', 9, 0, /* 1943 */ 'l', 'd', 'r', 9, 0, /* 1948 */ 's', 'r', 's', 'h', 'r', 9, 0, /* 1955 */ 'u', 'r', 's', 'h', 'r', 9, 0, /* 1962 */ 's', 's', 'h', 'r', 9, 0, /* 1968 */ 'u', 's', 'h', 'r', 9, 0, /* 1974 */ 'b', 'l', 'r', 9, 0, /* 1979 */ 's', 't', 'l', 'r', 9, 0, /* 1985 */ 'e', 'o', 'r', 9, 0, /* 1990 */ 'r', 'o', 'r', 9, 0, /* 1995 */ 'o', 'r', 'r', 9, 0, /* 2000 */ 'a', 's', 'r', 9, 0, /* 2005 */ 'l', 's', 'r', 9, 0, /* 2010 */ 'm', 's', 'r', 9, 0, /* 2015 */ 'l', 'd', 't', 'r', 9, 0, /* 2021 */ 's', 't', 'r', 9, 0, /* 2026 */ 's', 't', 't', 'r', 9, 0, /* 2032 */ 'e', 'x', 't', 'r', 9, 0, /* 2038 */ 'l', 'd', 'u', 'r', 9, 0, /* 2044 */ 's', 't', 'u', 'r', 9, 0, /* 2050 */ 'l', 'd', 'a', 'x', 'r', 9, 0, /* 2057 */ 'l', 'd', 'x', 'r', 9, 0, /* 2063 */ 's', 't', 'l', 'x', 'r', 9, 0, /* 2070 */ 's', 't', 'x', 'r', 9, 0, /* 2076 */ 'f', 'c', 'v', 't', 'a', 's', 9, 0, /* 2084 */ 'f', 'a', 'b', 's', 9, 0, /* 2090 */ 's', 'q', 'a', 'b', 's', 9, 0, /* 2097 */ 's', 'u', 'b', 's', 9, 0, /* 2103 */ 's', 'b', 'c', 's', 9, 0, /* 2109 */ 'a', 'd', 'c', 's', 9, 0, /* 2115 */ 'b', 'i', 'c', 's', 9, 0, /* 2121 */ 'a', 'd', 'd', 's', 9, 0, /* 2127 */ 'a', 'n', 'd', 's', 9, 0, /* 2133 */ 'c', 'm', 'h', 's', 9, 0, /* 2139 */ 'c', 'l', 's', 9, 0, /* 2144 */ 'f', 'm', 'l', 's', 9, 0, /* 2150 */ 'f', 'c', 'v', 't', 'm', 's', 9, 0, /* 2158 */ 'i', 'n', 's', 9, 0, /* 2163 */ 'f', 'c', 'v', 't', 'n', 's', 9, 0, /* 2171 */ 'f', 'r', 'e', 'c', 'p', 's', 9, 0, /* 2179 */ 'f', 'c', 'v', 't', 'p', 's', 9, 0, /* 2187 */ 'm', 'r', 's', 9, 0, /* 2192 */ 'f', 'r', 's', 'q', 'r', 't', 's', 9, 0, /* 2201 */ 's', 'y', 's', 9, 0, /* 2206 */ 'f', 'c', 'v', 't', 'z', 's', 9, 0, /* 2214 */ 'r', 'e', 't', 9, 0, /* 2219 */ 'f', 'a', 'c', 'g', 't', 9, 0, /* 2226 */ 'f', 'c', 'm', 'g', 't', 9, 0, /* 2233 */ 'r', 'b', 'i', 't', 9, 0, /* 2239 */ 'h', 'l', 't', 9, 0, /* 2244 */ 'f', 'c', 'm', 'l', 't', 9, 0, /* 2251 */ 'c', 'n', 't', 9, 0, /* 2256 */ 'n', 'o', 't', 9, 0, /* 2261 */ 'f', 's', 'q', 'r', 't', 9, 0, /* 2268 */ 'c', 'm', 't', 's', 't', 9, 0, /* 2275 */ 'f', 'c', 'v', 't', 9, 0, /* 2281 */ 'e', 'x', 't', 9, 0, /* 2286 */ 'f', 'c', 'v', 't', 'a', 'u', 9, 0, /* 2294 */ 's', 'q', 's', 'h', 'l', 'u', 9, 0, /* 2302 */ 'f', 'c', 'v', 't', 'm', 'u', 9, 0, /* 2310 */ 'f', 'c', 'v', 't', 'n', 'u', 9, 0, /* 2318 */ 'f', 'c', 'v', 't', 'p', 'u', 9, 0, /* 2326 */ 'f', 'c', 'v', 't', 'z', 'u', 9, 0, /* 2334 */ 'a', 'd', 'd', 'v', 9, 0, /* 2340 */ 'r', 'e', 'v', 9, 0, /* 2345 */ 'f', 'd', 'i', 'v', 9, 0, /* 2351 */ 's', 'd', 'i', 'v', 9, 0, /* 2357 */ 'u', 'd', 'i', 'v', 9, 0, /* 2363 */ 's', 'a', 'd', 'd', 'l', 'v', 9, 0, /* 2371 */ 'u', 'a', 'd', 'd', 'l', 'v', 9, 0, /* 2379 */ 'f', 'm', 'i', 'n', 'n', 'm', 'v', 9, 0, /* 2388 */ 'f', 'm', 'a', 'x', 'n', 'm', 'v', 9, 0, /* 2397 */ 'f', 'm', 'i', 'n', 'v', 9, 0, /* 2404 */ 's', 'm', 'i', 'n', 'v', 9, 0, /* 2411 */ 'u', 'm', 'i', 'n', 'v', 9, 0, /* 2418 */ 'c', 's', 'i', 'n', 'v', 9, 0, /* 2425 */ 'f', 'm', 'o', 'v', 9, 0, /* 2431 */ 's', 'm', 'o', 'v', 9, 0, /* 2437 */ 'u', 'm', 'o', 'v', 9, 0, /* 2443 */ 'f', 'm', 'a', 'x', 'v', 9, 0, /* 2450 */ 's', 'm', 'a', 'x', 'v', 9, 0, /* 2457 */ 'u', 'm', 'a', 'x', 'v', 9, 0, /* 2464 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0, /* 2472 */ 's', 's', 'u', 'b', 'w', 9, 0, /* 2479 */ 'u', 's', 'u', 'b', 'w', 9, 0, /* 2486 */ 'c', 'r', 'c', '3', '2', 'c', 'w', 9, 0, /* 2495 */ 's', 'a', 'd', 'd', 'w', 9, 0, /* 2502 */ 'u', 'a', 'd', 'd', 'w', 9, 0, /* 2509 */ 'l', 'd', 'p', 's', 'w', 9, 0, /* 2516 */ 'l', 'd', 'r', 's', 'w', 9, 0, /* 2523 */ 'l', 'd', 't', 'r', 's', 'w', 9, 0, /* 2531 */ 'l', 'd', 'u', 'r', 's', 'w', 9, 0, /* 2539 */ 'c', 'r', 'c', '3', '2', 'x', 9, 0, /* 2547 */ 'f', 'm', 'a', 'x', 9, 0, /* 2553 */ 's', 'm', 'a', 'x', 9, 0, /* 2559 */ 'u', 'm', 'a', 'x', 9, 0, /* 2565 */ 't', 'b', 'x', 9, 0, /* 2570 */ 'c', 'r', 'c', '3', '2', 'c', 'x', 9, 0, /* 2579 */ 'c', 'l', 'r', 'e', 'x', 9, 0, /* 2586 */ 'f', 'm', 'u', 'l', 'x', 9, 0, /* 2593 */ 'f', 'r', 'e', 'c', 'p', 'x', 9, 0, /* 2601 */ 'f', 'r', 'i', 'n', 't', 'x', 9, 0, /* 2609 */ 'c', 'b', 'z', 9, 0, /* 2614 */ 't', 'b', 'z', 9, 0, /* 2619 */ 'c', 'l', 'z', 9, 0, /* 2624 */ 'c', 'b', 'n', 'z', 9, 0, /* 2630 */ 't', 'b', 'n', 'z', 9, 0, /* 2636 */ 'f', 'r', 'i', 'n', 't', 'z', 9, 0, /* 2644 */ 'm', 'o', 'v', 'z', 9, 0, /* 2650 */ '.', 't', 'l', 's', 'd', 'e', 's', 'c', 'c', 'a', 'l', 'l', 32, 0, /* 2664 */ 'h', 'i', 'n', 't', 32, 0, /* 2670 */ 'b', '.', 0, /* 2673 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 2686 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 2693 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 2703 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 2718 */ 'd', 'r', 'p', 's', 0, /* 2723 */ 'e', 'r', 'e', 't', 0, }; #endif // Emit the opcode for the instruction. uint64_t Bits1 = OpInfo[MCInst_getOpcode(MI)]; uint64_t Bits2 = OpInfo2[MCInst_getOpcode(MI)]; uint64_t Bits = (Bits2 << 32) | Bits1; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 4095)-1); #endif // Fragment 0 encoded into 6 bits for 40 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 63); switch ((Bits >> 12) & 63) { default: // unreachable. case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, DRPS, ERET return; break; case 1: // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... printVRegOperand(MI, 0, O); break; case 2: // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPv2i64p, ADDSWri, ADDSWrs, ... printOperand(MI, 0, O); break; case 3: // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... printVRegOperand(MI, 1, O); break; case 4: // B, BL printAlignedLabel(MI, 0, O); return; break; case 5: // BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, SMC, SVC printHexImm(MI, 0, O); return; break; case 6: // Bcc printCondCode(MI, 0, O); SStream_concat0(O, "\t"); printAlignedLabel(MI, 1, O); return; break; case 7: // DMB, DSB, ISB printBarrierOption(MI, 0, O); return; break; case 8: // FMLAv1i32_indexed, FMLAv1i64_indexed, FMLSv1i32_indexed, FMLSv1i64_ind... printOperand(MI, 1, O); break; case 9: // LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,... printTypedVectorList(MI, 0, O, 16, 'b', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 10: // LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L... printTypedVectorList(MI, 1, O, 16, 'b', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 11: // LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv... printTypedVectorList(MI, 0, O, 1, 'd', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 12: // LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw... printTypedVectorList(MI, 1, O, 1, 'd', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 13: // LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw... printTypedVectorList(MI, 0, O, 2, 'd', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 14: // LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw... printTypedVectorList(MI, 1, O, 2, 'd', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 15: // LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw... printTypedVectorList(MI, 0, O, 2, 's', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 16: // LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw... printTypedVectorList(MI, 1, O, 2, 's', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 17: // LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw... printTypedVectorList(MI, 0, O, 4, 'h', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 18: // LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw... printTypedVectorList(MI, 1, O, 4, 'h', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 19: // LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw... printTypedVectorList(MI, 0, O, 4, 's', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 20: // LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw... printTypedVectorList(MI, 1, O, 4, 's', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 21: // LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw... printTypedVectorList(MI, 0, O, 8, 'b', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 22: // LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw... printTypedVectorList(MI, 1, O, 8, 'b', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 23: // LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw... printTypedVectorList(MI, 0, O, 8, 'h', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 24: // LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw... printTypedVectorList(MI, 1, O, 8, 'h', MRI); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 25: // LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,... printTypedVectorList(MI, 1, O, 0, 'h', MRI); printVectorIndex(MI, 2, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 3, O); break; case 26: // LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST printTypedVectorList(MI, 2, O, 0, 'h', MRI); printVectorIndex(MI, 3, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 4, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 27: // LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,... printTypedVectorList(MI, 1, O, 0, 's', MRI); printVectorIndex(MI, 2, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 3, O); break; case 28: // LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST printTypedVectorList(MI, 2, O, 0, 's', MRI); printVectorIndex(MI, 3, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 4, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 29: // LD1i64, LD2i64, LD3i64, LD4i64, ST1i64_POST, ST2i64_POST, ST3i64_POST,... printTypedVectorList(MI, 1, O, 0, 'd', MRI); printVectorIndex(MI, 2, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 3, O); break; case 30: // LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST printTypedVectorList(MI, 2, O, 0, 'd', MRI); printVectorIndex(MI, 3, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 4, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 31: // LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_... printTypedVectorList(MI, 1, O, 0, 'b', MRI); printVectorIndex(MI, 2, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 3, O); break; case 32: // LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST printTypedVectorList(MI, 2, O, 0, 'b', MRI); printVectorIndex(MI, 3, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 4, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 33: // MSR printMSRSystemRegister(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 34: // MSRpstate printSystemPStateField(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 35: // PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi printPrefetchOp(MI, 0, O); break; case 36: // ST1i16, ST2i16, ST3i16, ST4i16 printTypedVectorList(MI, 0, O, 0, 'h', MRI); printVectorIndex(MI, 1, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 37: // ST1i32, ST2i32, ST3i32, ST4i32 printTypedVectorList(MI, 0, O, 0, 's', MRI); printVectorIndex(MI, 1, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 38: // ST1i64, ST2i64, ST3i64, ST4i64 printTypedVectorList(MI, 0, O, 0, 'd', MRI); printVectorIndex(MI, 1, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 39: // ST1i8, ST2i8, ST3i8, ST4i8 printTypedVectorList(MI, 0, O, 0, 'b', MRI); printVectorIndex(MI, 1, O); SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 2, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; } // Fragment 1 encoded into 6 bits for 41 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 63); switch ((Bits >> 18) & 63) { default: // unreachable. case 0: // ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDv16i8, AESDrr, AESErr, AESIM... SStream_concat0(O, ".16b, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); break; case 1: // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPv2i64p, ADDSWri, ADDSWrs, ... SStream_concat0(O, ", "); break; case 2: // ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BICv2i32, CLSv2i32, C... SStream_concat0(O, ".2s, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); break; case 3: // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE... SStream_concat0(O, ".2d, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); break; case 4: // ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BICv4i16, CLSv4i16, C... SStream_concat0(O, ".4h, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); break; case 5: // ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDv4i32, BICv4i32, CLSv4i32, C... SStream_concat0(O, ".4s, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); break; case 6: // ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDv8i16, BICv8i16, CLSv8i16, C... SStream_concat0(O, ".8h, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); break; case 7: // ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8... SStream_concat0(O, ".8b, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); break; case 8: // BLR, BR, CLREX, RET, TLSDESCCALL return; break; case 9: // FCMPDri, FCMPEDri, FCMPESri, FCMPSri SStream_concat0(O, ", #0.0"); arm64_op_addFP(MI, 0.0); return; break; case 10: // FMOVXDHighr, INSvi64gpr, INSvi64lane SStream_concat0(O, ".d"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); printVectorIndex(MI, 2, O); SStream_concat0(O, ", "); break; case 11: // INSvi16gpr, INSvi16lane SStream_concat0(O, ".h"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H); printVectorIndex(MI, 2, O); SStream_concat0(O, ", "); break; case 12: // INSvi32gpr, INSvi32lane SStream_concat0(O, ".s"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); printVectorIndex(MI, 2, O); SStream_concat0(O, ", "); break; case 13: // INSvi8gpr, INSvi8lane SStream_concat0(O, ".b"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_B); printVectorIndex(MI, 2, O); SStream_concat0(O, ", "); break; case 14: // LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L... printPostIncOperand2(MI, 3, O, 64); return; break; case 15: // LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD... printPostIncOperand2(MI, 3, O, 32); return; break; case 16: // LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw... printPostIncOperand2(MI, 3, O, 16); return; break; case 17: // LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1... printPostIncOperand2(MI, 3, O, 8); return; break; case 18: // LD1Rv16b_POST, LD1Rv8b_POST printPostIncOperand2(MI, 3, O, 1); return; break; case 19: // LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,... printPostIncOperand2(MI, 3, O, 4); return; break; case 20: // LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST printPostIncOperand2(MI, 3, O, 2); return; break; case 21: // LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS... printPostIncOperand2(MI, 3, O, 48); return; break; case 22: // LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST... printPostIncOperand2(MI, 3, O, 24); return; break; case 23: // LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ... SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 24: // LD1i16_POST, LD2i8_POST printPostIncOperand2(MI, 5, O, 2); return; break; case 25: // LD1i32_POST, LD2i16_POST, LD4i8_POST printPostIncOperand2(MI, 5, O, 4); return; break; case 26: // LD1i64_POST, LD2i32_POST, LD4i16_POST printPostIncOperand2(MI, 5, O, 8); return; break; case 27: // LD1i8_POST printPostIncOperand2(MI, 5, O, 1); return; break; case 28: // LD2i64_POST, LD4i32_POST printPostIncOperand2(MI, 5, O, 16); return; break; case 29: // LD3Rv16b_POST, LD3Rv8b_POST printPostIncOperand2(MI, 3, O, 3); return; break; case 30: // LD3Rv2s_POST, LD3Rv4s_POST printPostIncOperand2(MI, 3, O, 12); return; break; case 31: // LD3Rv4h_POST, LD3Rv8h_POST printPostIncOperand2(MI, 3, O, 6); return; break; case 32: // LD3i16_POST printPostIncOperand2(MI, 5, O, 6); return; break; case 33: // LD3i32_POST printPostIncOperand2(MI, 5, O, 12); return; break; case 34: // LD3i64_POST printPostIncOperand2(MI, 5, O, 24); return; break; case 35: // LD3i8_POST printPostIncOperand2(MI, 5, O, 3); return; break; case 36: // LD4i64_POST printPostIncOperand2(MI, 5, O, 32); return; break; case 37: // LDARB, LDARH, LDARW, LDARX, LDAXRB, LDAXRH, LDAXRW, LDAXRX, LDRBBpost,... SStream_concat0(O, ", ["); set_mem_access(MI, true); break; case 38: // PMULLv1i64, PMULLv2i64 SStream_concat0(O, ".1q, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1Q); printVRegOperand(MI, 1, O); break; case 39: // SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v... SStream_concat0(O, ".1d, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); break; case 40: // ST1i16_POST, ST1i32_POST, ST1i64_POST, ST1i8_POST, ST2i16_POST, ST2i32... SStream_concat0(O, "], "); set_mem_access(MI, false); break; } // Fragment 2 encoded into 5 bits for 28 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 24) & 31); switch ((Bits >> 24) & 31) { default: // unreachable. case 0: // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... printVRegOperand(MI, 1, O); break; case 1: // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSWri, ADDSWrs, ADDSWrx, ADD... printOperand(MI, 1, O); break; case 2: // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... printVRegOperand(MI, 2, O); break; case 3: // ADRP printAdrpLabel(MI, 1, O); return; break; case 4: // BFMWri, BFMXri, FMLAv1i32_indexed, FMLAv1i64_indexed, FMLSv1i32_indexe... printOperand(MI, 2, O); break; case 5: // BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv... printHexImm(MI, 2, O); printShifter(MI, 3, O); return; break; case 6: // CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P... printAlignedLabel(MI, 1, O); return; break; case 7: // FMOVDi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_ns, FMOVv4f32_ns printFPImmOperand(MI, 1, O); return; break; case 8: // INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr printOperand(MI, 3, O); return; break; case 9: // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane printVRegOperand(MI, 3, O); break; case 10: // MOVID, MOVIv2d_ns printSIMDType10Operand(MI, 1, O); return; break; case 11: // MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl... printHexImm(MI, 1, O); break; case 12: // MRS printMRSSystemRegister(MI, 1, O); return; break; case 13: // PMULLv1i64 SStream_concat0(O, ".1d, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); printVRegOperand(MI, 2, O); SStream_concat0(O, ".1d"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); return; break; case 14: // PMULLv2i64 SStream_concat0(O, ".2d, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); printVRegOperand(MI, 2, O); SStream_concat0(O, ".2d"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); return; break; case 15: // ST1i16_POST, ST2i8_POST printPostIncOperand2(MI, 4, O, 2); return; break; case 16: // ST1i32_POST, ST2i16_POST, ST4i8_POST printPostIncOperand2(MI, 4, O, 4); return; break; case 17: // ST1i64_POST, ST2i32_POST, ST4i16_POST printPostIncOperand2(MI, 4, O, 8); return; break; case 18: // ST1i8_POST printPostIncOperand2(MI, 4, O, 1); return; break; case 19: // ST2i64_POST, ST4i32_POST printPostIncOperand2(MI, 4, O, 16); return; break; case 20: // ST3i16_POST printPostIncOperand2(MI, 4, O, 6); return; break; case 21: // ST3i32_POST printPostIncOperand2(MI, 4, O, 12); return; break; case 22: // ST3i64_POST printPostIncOperand2(MI, 4, O, 24); return; break; case 23: // ST3i8_POST printPostIncOperand2(MI, 4, O, 3); return; break; case 24: // ST4i64_POST printPostIncOperand2(MI, 4, O, 32); return; break; case 25: // SYSxt printSysCROperand(MI, 1, O); SStream_concat0(O, ", "); printSysCROperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); return; break; case 26: // TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB... printTypedVectorList(MI, 1, O, 16, 'b', MRI); SStream_concat0(O, ", "); printVRegOperand(MI, 2, O); break; case 27: // TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB... printTypedVectorList(MI, 2, O, 16, 'b', MRI); SStream_concat0(O, ", "); printVRegOperand(MI, 3, O); break; } // Fragment 3 encoded into 6 bits for 42 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 29) & 63); switch ((Bits >> 29) & 63) { default: // unreachable. case 0: // ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ... SStream_concat0(O, ".16b"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); return; break; case 1: // ABSv1i64, ADR, CLSWr, CLSXr, CLZWr, CLZXr, DUPv16i8gpr, DUPv2i32gpr, D... return; break; case 2: // ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV... SStream_concat0(O, ".2s"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); return; break; case 3: // ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64... SStream_concat0(O, ".2d"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); return; break; case 4: // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FCVTLv4i16, NEGv4i16, REV32v... SStream_concat0(O, ".4h"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); return; break; case 5: // ABSv4i32, ADDVv4i32v, CLSv4i32, CLZv4i32, FABSv4f32, FCVTASv4f32, FCVT... SStream_concat0(O, ".4s"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); return; break; case 6: // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FCVTLv8i16, NEGv8i16, REV32v... SStream_concat0(O, ".8h"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); return; break; case 7: // ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv... SStream_concat0(O, ".8b"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); return; break; case 8: // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSWri, ADDSWrs, ADDSWrx, ADDSXri, ADDS... SStream_concat0(O, ", "); break; case 9: // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... SStream_concat0(O, ".2d, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); break; case 10: // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... SStream_concat0(O, ".4s, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); break; case 11: // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG... SStream_concat0(O, ".8h, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); break; case 12: // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,... SStream_concat0(O, ".16b, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); break; case 13: // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... SStream_concat0(O, ".2s, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); break; case 14: // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv... SStream_concat0(O, ".4h, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); break; case 15: // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... SStream_concat0(O, ".8b, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); break; case 16: // CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz SStream_concat0(O, ".16b, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); arm64_op_addImm(MI, 0.0); return; break; case 17: // CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz SStream_concat0(O, ", #0"); arm64_op_addImm(MI, 0); return; break; case 18: // CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz SStream_concat0(O, ".2s, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); arm64_op_addImm(MI, 0); return; break; case 19: // CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz SStream_concat0(O, ".2d, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); arm64_op_addImm(MI, 0); return; break; case 20: // CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz SStream_concat0(O, ".4h, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); arm64_op_addImm(MI, 0); return; break; case 21: // CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz SStream_concat0(O, ".4s, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); arm64_op_addImm(MI, 0); return; break; case 22: // CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz SStream_concat0(O, ".8h, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); arm64_op_addImm(MI, 0); return; break; case 23: // CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz SStream_concat0(O, ".8b, #0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); arm64_op_addImm(MI, 0); return; break; case 24: // CPYi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1... SStream_concat0(O, ".h"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H); break; case 25: // CPYi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, UMOVvi3... SStream_concat0(O, ".s"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); break; case 26: // CPYi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64 SStream_concat0(O, ".d"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); break; case 27: // CPYi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to64... SStream_concat0(O, ".b"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_B); break; case 28: // FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i32rz, FCMGEv1i64rz, FCMGTv1i32rz, ... SStream_concat0(O, ", #0.0"); arm64_op_addFP(MI, 0.0); return; break; case 29: // FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz SStream_concat0(O, ".2s, #0.0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); arm64_op_addFP(MI, 0.0); return; break; case 30: // FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz SStream_concat0(O, ".2d, #0.0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); arm64_op_addFP(MI, 0.0); return; break; case 31: // FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz SStream_concat0(O, ".4s, #0.0"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); arm64_op_addFP(MI, 0.0); return; break; case 32: // LDARB, LDARH, LDARW, LDARX, LDAXRB, LDAXRH, LDAXRW, LDAXRX, LDXRB, LDX... SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 33: // LDAXPW, LDAXPX, LDNPDi, LDNPQi, LDNPSi, LDNPWi, LDNPXi, LDPDi, LDPDpos... SStream_concat0(O, ", ["); set_mem_access(MI, true); break; case 34: // LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo... SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 3, O); return; break; case 35: // MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ... printShifter(MI, 2, O); return; break; case 36: // SHLLv16i8 SStream_concat0(O, ".16b, #8"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); arm64_op_addImm(MI, 8); return; break; case 37: // SHLLv2i32 SStream_concat0(O, ".2s, #32"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); arm64_op_addImm(MI, 32); return; break; case 38: // SHLLv4i16 SStream_concat0(O, ".4h, #16"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); arm64_op_addImm(MI, 16); return; break; case 39: // SHLLv4i32 SStream_concat0(O, ".4s, #32"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); arm64_op_addImm(MI, 32); return; break; case 40: // SHLLv8i16 SStream_concat0(O, ".8h, #16"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); arm64_op_addImm(MI, 16); return; break; case 41: // SHLLv8i8 SStream_concat0(O, ".8b, #8"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); arm64_op_addImm(MI, 8); return; break; } // Fragment 4 encoded into 5 bits for 18 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 35) & 31); switch ((Bits >> 35) & 31) { default: // unreachable. case 0: // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSXrx64, ADDXrx64, ADDv1i64, ASRVWr, A... printOperand(MI, 2, O); break; case 1: // ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2... printVRegOperand(MI, 2, O); break; case 2: // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BITv16i8, BITv8i... printVRegOperand(MI, 3, O); break; case 3: // ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri printAddSubImm(MI, 2, O); return; break; case 4: // ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI... printShiftedRegister(MI, 2, O); return; break; case 5: // ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx printExtendedRegister(MI, 2, O); return; break; case 6: // ANDSWri, ANDWri, EORWri, ORRWri printLogicalImm32(MI, 2, O); return; break; case 7: // ANDSXri, ANDXri, EORXri, ORRXri printLogicalImm64(MI, 2, O); return; break; case 8: // BFMWri, BFMXri, LDPDpost, LDPDpre, LDPQpost, LDPQpre, LDPSWpost, LDPSW... printOperand(MI, 3, O); break; case 9: // CPYi16, CPYi32, CPYi64, CPYi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan... printVectorIndex(MI, 2, O); return; break; case 10: // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane printVectorIndex(MI, 4, O); return; break; case 11: // LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui printUImm12Offset2(MI, 2, O, 1); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 12: // LDRDui, LDRXui, PRFMui, STRDui, STRXui printUImm12Offset2(MI, 2, O, 8); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 13: // LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui printUImm12Offset2(MI, 2, O, 2); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 14: // LDRQui, STRQui printUImm12Offset2(MI, 2, O, 16); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 15: // LDRSWui, LDRSui, LDRWui, STRSui, STRWui printUImm12Offset2(MI, 2, O, 4); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 16: // SYSLxt printSysCROperand(MI, 2, O); SStream_concat0(O, ", "); printSysCROperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); return; break; case 17: // TBNZW, TBNZX, TBZW, TBZX printAlignedLabel(MI, 2, O); return; break; } // Fragment 5 encoded into 5 bits for 19 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 40) & 31); switch ((Bits >> 40) & 31) { default: // unreachable. case 0: // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDv1i64, ASRVWr, ASRVXr, CMEQv1i64, CMG... return; break; case 1: // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... SStream_concat0(O, ".2d"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); return; break; case 2: // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... SStream_concat0(O, ".4s"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); return; break; case 3: // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG... SStream_concat0(O, ".8h"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); return; break; case 4: // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,... SStream_concat0(O, ".16b"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); return; break; case 5: // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... SStream_concat0(O, ".2s"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); return; break; case 6: // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv... SStream_concat0(O, ".4h"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); return; break; case 7: // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... SStream_concat0(O, ".8b"); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); return; break; case 8: // ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64 printArithExtend(MI, 3, O); return; break; case 9: // BFMWri, BFMXri, CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi... SStream_concat0(O, ", "); break; case 10: // EXTv16i8 SStream_concat0(O, ".16b, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); printOperand(MI, 3, O); return; break; case 11: // EXTv8i8 SStream_concat0(O, ".8b, "); arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); printOperand(MI, 3, O); return; break; case 12: // FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_indexed, FMLSv1i32_ind... SStream_concat0(O, ".s"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); break; case 13: // FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind... SStream_concat0(O, ".d"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); break; case 14: // LDAXPW, LDAXPX, LDTRBi, LDTRHi, LDTRSBWi, LDTRSBXi, LDTRSHWi, LDTRSHXi... SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 15: // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STPDpost,... SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 16: // LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, LDRHpre, LDRQpre, LDRSBWpre, LDR... SStream_concat0(O, "]!"); set_mem_access(MI, false); return; break; case 17: // MLAv4i16_indexed, MLAv8i16_indexed, MLSv4i16_indexed, MLSv8i16_indexed... SStream_concat0(O, ".h"); arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H); break; case 18: // STLXPW, STLXPX, STXPW, STXPX SStream_concat0(O, ", ["); set_mem_access(MI, true); printOperand(MI, 3, O); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; } // Fragment 6 encoded into 5 bits for 21 unique commands. //printf("Frag-6: %"PRIu64"\n", (Bits >> 45) & 31); switch ((Bits >> 45) & 31) { default: // unreachable. case 0: // BFMWri, BFMXri printOperand(MI, 4, O); return; break; case 1: // CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr... printCondCode(MI, 3, O); return; break; case 2: // EXTRWrri, EXTRXrri, FMADDDrrr, FMADDSrrr, FMSUBDrrr, FMSUBSrrr, FNMADD... printOperand(MI, 3, O); return; break; case 3: // FMLAv1i32_indexed, FMLAv1i64_indexed, FMLAv2i32_indexed, FMLAv2i64_ind... printVectorIndex(MI, 4, O); return; break; case 4: // FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32_indexed, FMULXv2i64... printVectorIndex(MI, 3, O); return; break; case 5: // LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi printImmScale(MI, 3, O, 8); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 6: // LDNPQi, LDPQi, STNPQi, STPQi printImmScale(MI, 3, O, 16); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 7: // LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi printImmScale(MI, 3, O, 4); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 8: // LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP... printImmScale(MI, 4, O, 8); break; case 9: // LDPQpost, LDPQpre, STPQpost, STPQpre printImmScale(MI, 4, O, 16); break; case 10: // LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S... printImmScale(MI, 4, O, 4); break; case 11: // LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW printMemExtend(MI, 3, O, 'w', 8); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 12: // LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX printMemExtend(MI, 3, O, 'x', 8); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 13: // LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW printMemExtend(MI, 3, O, 'w', 64); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 14: // LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX printMemExtend(MI, 3, O, 'x', 64); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 15: // LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW printMemExtend(MI, 3, O, 'w', 16); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 16: // LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX printMemExtend(MI, 3, O, 'x', 16); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 17: // LDRQroW, STRQroW printMemExtend(MI, 3, O, 'w', 128); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 18: // LDRQroX, STRQroX printMemExtend(MI, 3, O, 'x', 128); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 19: // LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW printMemExtend(MI, 3, O, 'w', 32); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; case 20: // LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX printMemExtend(MI, 3, O, 'x', 32); SStream_concat0(O, "]"); set_mem_access(MI, false); return; break; } // Fragment 7 encoded into 1 bits for 2 unique commands. //printf("Frag-7: %"PRIu64"\n", (Bits >> 50) & 1); if ((Bits >> 50) & 1) { // LDPDpre, LDPQpre, LDPSWpre, LDPSpre, LDPWpre, LDPXpre, STPDpre, STPQpr... SStream_concat0(O, "]!"); set_mem_access(MI, false); return; } else { // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STPDpost,... return; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo, int AltIdx) { // assert(RegNo && RegNo < 420 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrsNoRegAltName[] = { /* 0 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, /* 13 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, /* 26 */ 'b', '1', '0', 0, /* 30 */ 'd', '1', '0', 0, /* 34 */ 'h', '1', '0', 0, /* 38 */ 'q', '1', '0', 0, /* 42 */ 's', '1', '0', 0, /* 46 */ 'w', '1', '0', 0, /* 50 */ 'x', '1', '0', 0, /* 54 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, /* 70 */ 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', 0, /* 86 */ 'b', '2', '0', 0, /* 90 */ 'd', '2', '0', 0, /* 94 */ 'h', '2', '0', 0, /* 98 */ 'q', '2', '0', 0, /* 102 */ 's', '2', '0', 0, /* 106 */ 'w', '2', '0', 0, /* 110 */ 'x', '2', '0', 0, /* 114 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, /* 130 */ 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', 0, /* 146 */ 'b', '3', '0', 0, /* 150 */ 'd', '3', '0', 0, /* 154 */ 'h', '3', '0', 0, /* 158 */ 'q', '3', '0', 0, /* 162 */ 's', '3', '0', 0, /* 166 */ 'w', '3', '0', 0, /* 170 */ 'x', '3', '0', 0, /* 174 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', 0, /* 189 */ 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', 0, /* 204 */ 'b', '0', 0, /* 207 */ 'd', '0', 0, /* 210 */ 'h', '0', 0, /* 213 */ 'q', '0', 0, /* 216 */ 's', '0', 0, /* 219 */ 'w', '0', 0, /* 222 */ 'x', '0', 0, /* 225 */ 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, /* 239 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, /* 253 */ 'b', '1', '1', 0, /* 257 */ 'd', '1', '1', 0, /* 261 */ 'h', '1', '1', 0, /* 265 */ 'q', '1', '1', 0, /* 269 */ 's', '1', '1', 0, /* 273 */ 'w', '1', '1', 0, /* 277 */ 'x', '1', '1', 0, /* 281 */ 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, /* 297 */ 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', 0, /* 313 */ 'b', '2', '1', 0, /* 317 */ 'd', '2', '1', 0, /* 321 */ 'h', '2', '1', 0, /* 325 */ 'q', '2', '1', 0, /* 329 */ 's', '2', '1', 0, /* 333 */ 'w', '2', '1', 0, /* 337 */ 'x', '2', '1', 0, /* 341 */ 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, /* 357 */ 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', 0, /* 373 */ 'b', '3', '1', 0, /* 377 */ 'd', '3', '1', 0, /* 381 */ 'h', '3', '1', 0, /* 385 */ 'q', '3', '1', 0, /* 389 */ 's', '3', '1', 0, /* 393 */ 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', 0, /* 407 */ 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', 0, /* 421 */ 'b', '1', 0, /* 424 */ 'd', '1', 0, /* 427 */ 'h', '1', 0, /* 430 */ 'q', '1', 0, /* 433 */ 's', '1', 0, /* 436 */ 'w', '1', 0, /* 439 */ 'x', '1', 0, /* 442 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, /* 457 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, /* 472 */ 'b', '1', '2', 0, /* 476 */ 'd', '1', '2', 0, /* 480 */ 'h', '1', '2', 0, /* 484 */ 'q', '1', '2', 0, /* 488 */ 's', '1', '2', 0, /* 492 */ 'w', '1', '2', 0, /* 496 */ 'x', '1', '2', 0, /* 500 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, /* 516 */ 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', 0, /* 532 */ 'b', '2', '2', 0, /* 536 */ 'd', '2', '2', 0, /* 540 */ 'h', '2', '2', 0, /* 544 */ 'q', '2', '2', 0, /* 548 */ 's', '2', '2', 0, /* 552 */ 'w', '2', '2', 0, /* 556 */ 'x', '2', '2', 0, /* 560 */ 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, /* 573 */ 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', 0, /* 586 */ 'b', '2', 0, /* 589 */ 'd', '2', 0, /* 592 */ 'h', '2', 0, /* 595 */ 'q', '2', 0, /* 598 */ 's', '2', 0, /* 601 */ 'w', '2', 0, /* 604 */ 'x', '2', 0, /* 607 */ 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, /* 623 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, /* 639 */ 'b', '1', '3', 0, /* 643 */ 'd', '1', '3', 0, /* 647 */ 'h', '1', '3', 0, /* 651 */ 'q', '1', '3', 0, /* 655 */ 's', '1', '3', 0, /* 659 */ 'w', '1', '3', 0, /* 663 */ 'x', '1', '3', 0, /* 667 */ 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, /* 683 */ 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', 0, /* 699 */ 'b', '2', '3', 0, /* 703 */ 'd', '2', '3', 0, /* 707 */ 'h', '2', '3', 0, /* 711 */ 'q', '2', '3', 0, /* 715 */ 's', '2', '3', 0, /* 719 */ 'w', '2', '3', 0, /* 723 */ 'x', '2', '3', 0, /* 727 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, /* 739 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, /* 751 */ 'b', '3', 0, /* 754 */ 'd', '3', 0, /* 757 */ 'h', '3', 0, /* 760 */ 'q', '3', 0, /* 763 */ 's', '3', 0, /* 766 */ 'w', '3', 0, /* 769 */ 'x', '3', 0, /* 772 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, /* 788 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, /* 804 */ 'b', '1', '4', 0, /* 808 */ 'd', '1', '4', 0, /* 812 */ 'h', '1', '4', 0, /* 816 */ 'q', '1', '4', 0, /* 820 */ 's', '1', '4', 0, /* 824 */ 'w', '1', '4', 0, /* 828 */ 'x', '1', '4', 0, /* 832 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, /* 848 */ 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', 0, /* 864 */ 'b', '2', '4', 0, /* 868 */ 'd', '2', '4', 0, /* 872 */ 'h', '2', '4', 0, /* 876 */ 'q', '2', '4', 0, /* 880 */ 's', '2', '4', 0, /* 884 */ 'w', '2', '4', 0, /* 888 */ 'x', '2', '4', 0, /* 892 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, /* 904 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, /* 916 */ 'b', '4', 0, /* 919 */ 'd', '4', 0, /* 922 */ 'h', '4', 0, /* 925 */ 'q', '4', 0, /* 928 */ 's', '4', 0, /* 931 */ 'w', '4', 0, /* 934 */ 'x', '4', 0, /* 937 */ 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, /* 953 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, /* 969 */ 'b', '1', '5', 0, /* 973 */ 'd', '1', '5', 0, /* 977 */ 'h', '1', '5', 0, /* 981 */ 'q', '1', '5', 0, /* 985 */ 's', '1', '5', 0, /* 989 */ 'w', '1', '5', 0, /* 993 */ 'x', '1', '5', 0, /* 997 */ 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, /* 1013 */ 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', 0, /* 1029 */ 'b', '2', '5', 0, /* 1033 */ 'd', '2', '5', 0, /* 1037 */ 'h', '2', '5', 0, /* 1041 */ 'q', '2', '5', 0, /* 1045 */ 's', '2', '5', 0, /* 1049 */ 'w', '2', '5', 0, /* 1053 */ 'x', '2', '5', 0, /* 1057 */ 'D', '2', '_', 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, /* 1069 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, /* 1081 */ 'b', '5', 0, /* 1084 */ 'd', '5', 0, /* 1087 */ 'h', '5', 0, /* 1090 */ 'q', '5', 0, /* 1093 */ 's', '5', 0, /* 1096 */ 'w', '5', 0, /* 1099 */ 'x', '5', 0, /* 1102 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, /* 1118 */ 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', 0, /* 1134 */ 'b', '1', '6', 0, /* 1138 */ 'd', '1', '6', 0, /* 1142 */ 'h', '1', '6', 0, /* 1146 */ 'q', '1', '6', 0, /* 1150 */ 's', '1', '6', 0, /* 1154 */ 'w', '1', '6', 0, /* 1158 */ 'x', '1', '6', 0, /* 1162 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, /* 1178 */ 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', 0, /* 1194 */ 'b', '2', '6', 0, /* 1198 */ 'd', '2', '6', 0, /* 1202 */ 'h', '2', '6', 0, /* 1206 */ 'q', '2', '6', 0, /* 1210 */ 's', '2', '6', 0, /* 1214 */ 'w', '2', '6', 0, /* 1218 */ 'x', '2', '6', 0, /* 1222 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, /* 1234 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, /* 1246 */ 'b', '6', 0, /* 1249 */ 'd', '6', 0, /* 1252 */ 'h', '6', 0, /* 1255 */ 'q', '6', 0, /* 1258 */ 's', '6', 0, /* 1261 */ 'w', '6', 0, /* 1264 */ 'x', '6', 0, /* 1267 */ 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, /* 1283 */ 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', 0, /* 1299 */ 'b', '1', '7', 0, /* 1303 */ 'd', '1', '7', 0, /* 1307 */ 'h', '1', '7', 0, /* 1311 */ 'q', '1', '7', 0, /* 1315 */ 's', '1', '7', 0, /* 1319 */ 'w', '1', '7', 0, /* 1323 */ 'x', '1', '7', 0, /* 1327 */ 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, /* 1343 */ 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', 0, /* 1359 */ 'b', '2', '7', 0, /* 1363 */ 'd', '2', '7', 0, /* 1367 */ 'h', '2', '7', 0, /* 1371 */ 'q', '2', '7', 0, /* 1375 */ 's', '2', '7', 0, /* 1379 */ 'w', '2', '7', 0, /* 1383 */ 'x', '2', '7', 0, /* 1387 */ 'D', '4', '_', 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, /* 1399 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, /* 1411 */ 'b', '7', 0, /* 1414 */ 'd', '7', 0, /* 1417 */ 'h', '7', 0, /* 1420 */ 'q', '7', 0, /* 1423 */ 's', '7', 0, /* 1426 */ 'w', '7', 0, /* 1429 */ 'x', '7', 0, /* 1432 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, /* 1448 */ 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', 0, /* 1464 */ 'b', '1', '8', 0, /* 1468 */ 'd', '1', '8', 0, /* 1472 */ 'h', '1', '8', 0, /* 1476 */ 'q', '1', '8', 0, /* 1480 */ 's', '1', '8', 0, /* 1484 */ 'w', '1', '8', 0, /* 1488 */ 'x', '1', '8', 0, /* 1492 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, /* 1508 */ 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', 0, /* 1524 */ 'b', '2', '8', 0, /* 1528 */ 'd', '2', '8', 0, /* 1532 */ 'h', '2', '8', 0, /* 1536 */ 'q', '2', '8', 0, /* 1540 */ 's', '2', '8', 0, /* 1544 */ 'w', '2', '8', 0, /* 1548 */ 'x', '2', '8', 0, /* 1552 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, /* 1564 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, /* 1576 */ 'b', '8', 0, /* 1579 */ 'd', '8', 0, /* 1582 */ 'h', '8', 0, /* 1585 */ 'q', '8', 0, /* 1588 */ 's', '8', 0, /* 1591 */ 'w', '8', 0, /* 1594 */ 'x', '8', 0, /* 1597 */ 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, /* 1613 */ 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', 0, /* 1629 */ 'b', '1', '9', 0, /* 1633 */ 'd', '1', '9', 0, /* 1637 */ 'h', '1', '9', 0, /* 1641 */ 'q', '1', '9', 0, /* 1645 */ 's', '1', '9', 0, /* 1649 */ 'w', '1', '9', 0, /* 1653 */ 'x', '1', '9', 0, /* 1657 */ 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, /* 1673 */ 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', 0, /* 1689 */ 'b', '2', '9', 0, /* 1693 */ 'd', '2', '9', 0, /* 1697 */ 'h', '2', '9', 0, /* 1701 */ 'q', '2', '9', 0, /* 1705 */ 's', '2', '9', 0, /* 1709 */ 'w', '2', '9', 0, /* 1713 */ 'x', '2', '9', 0, /* 1717 */ 'D', '6', '_', 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, /* 1729 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, /* 1741 */ 'b', '9', 0, /* 1744 */ 'd', '9', 0, /* 1747 */ 'h', '9', 0, /* 1750 */ 'q', '9', 0, /* 1753 */ 's', '9', 0, /* 1756 */ 'w', '9', 0, /* 1759 */ 'x', '9', 0, /* 1762 */ 'w', 's', 'p', 0, /* 1766 */ 'w', 'z', 'r', 0, /* 1770 */ 'x', 'z', 'r', 0, /* 1774 */ 'n', 'z', 'c', 'v', 0, }; static const uint16_t RegAsmOffsetNoRegAltName[] = { 1713, 170, 1774, 1763, 1762, 1766, 1770, 204, 421, 586, 751, 916, 1081, 1246, 1411, 1576, 1741, 26, 253, 472, 639, 804, 969, 1134, 1299, 1464, 1629, 86, 313, 532, 699, 864, 1029, 1194, 1359, 1524, 1689, 146, 373, 207, 424, 589, 754, 919, 1084, 1249, 1414, 1579, 1744, 30, 257, 476, 643, 808, 973, 1138, 1303, 1468, 1633, 90, 317, 536, 703, 868, 1033, 1198, 1363, 1528, 1693, 150, 377, 210, 427, 592, 757, 922, 1087, 1252, 1417, 1582, 1747, 34, 261, 480, 647, 812, 977, 1142, 1307, 1472, 1637, 94, 321, 540, 707, 872, 1037, 1202, 1367, 1532, 1697, 154, 381, 213, 430, 595, 760, 925, 1090, 1255, 1420, 1585, 1750, 38, 265, 484, 651, 816, 981, 1146, 1311, 1476, 1641, 98, 325, 544, 711, 876, 1041, 1206, 1371, 1536, 1701, 158, 385, 216, 433, 598, 763, 928, 1093, 1258, 1423, 1588, 1753, 42, 269, 488, 655, 820, 985, 1150, 1315, 1480, 1645, 102, 329, 548, 715, 880, 1045, 1210, 1375, 1540, 1705, 162, 389, 219, 436, 601, 766, 931, 1096, 1261, 1426, 1591, 1756, 46, 273, 492, 659, 824, 989, 1154, 1319, 1484, 1649, 106, 333, 552, 719, 884, 1049, 1214, 1379, 1544, 1709, 166, 222, 439, 604, 769, 934, 1099, 1264, 1429, 1594, 1759, 50, 277, 496, 663, 828, 993, 1158, 1323, 1488, 1653, 110, 337, 556, 723, 888, 1053, 1218, 1383, 1548, 401, 567, 733, 898, 1063, 1228, 1393, 1558, 1723, 6, 231, 449, 615, 780, 945, 1110, 1275, 1440, 1605, 62, 289, 508, 675, 840, 1005, 1170, 1335, 1500, 1665, 122, 349, 182, 727, 892, 1057, 1222, 1387, 1552, 1717, 0, 225, 442, 607, 772, 937, 1102, 1267, 1432, 1597, 54, 281, 500, 667, 832, 997, 1162, 1327, 1492, 1657, 114, 341, 174, 393, 560, 564, 730, 895, 1060, 1225, 1390, 1555, 1720, 3, 228, 445, 611, 776, 941, 1106, 1271, 1436, 1601, 58, 285, 504, 671, 836, 1001, 1166, 1331, 1496, 1661, 118, 345, 178, 397, 415, 580, 745, 910, 1075, 1240, 1405, 1570, 1735, 19, 245, 464, 631, 796, 961, 1126, 1291, 1456, 1621, 78, 305, 524, 691, 856, 1021, 1186, 1351, 1516, 1681, 138, 365, 197, 739, 904, 1069, 1234, 1399, 1564, 1729, 13, 239, 457, 623, 788, 953, 1118, 1283, 1448, 1613, 70, 297, 516, 683, 848, 1013, 1178, 1343, 1508, 1673, 130, 357, 189, 407, 573, 577, 742, 907, 1072, 1237, 1402, 1567, 1732, 16, 242, 460, 627, 792, 957, 1122, 1287, 1452, 1617, 74, 301, 520, 687, 852, 1017, 1182, 1347, 1512, 1677, 134, 361, 193, 411, }; static const char AsmStrsvreg[] = { /* 0 */ 'v', '1', '0', 0, /* 4 */ 'v', '2', '0', 0, /* 8 */ 'v', '3', '0', 0, /* 12 */ 'v', '0', 0, /* 15 */ 'v', '1', '1', 0, /* 19 */ 'v', '2', '1', 0, /* 23 */ 'v', '3', '1', 0, /* 27 */ 'v', '1', 0, /* 30 */ 'v', '1', '2', 0, /* 34 */ 'v', '2', '2', 0, /* 38 */ 'v', '2', 0, /* 41 */ 'v', '1', '3', 0, /* 45 */ 'v', '2', '3', 0, /* 49 */ 'v', '3', 0, /* 52 */ 'v', '1', '4', 0, /* 56 */ 'v', '2', '4', 0, /* 60 */ 'v', '4', 0, /* 63 */ 'v', '1', '5', 0, /* 67 */ 'v', '2', '5', 0, /* 71 */ 'v', '5', 0, /* 74 */ 'v', '1', '6', 0, /* 78 */ 'v', '2', '6', 0, /* 82 */ 'v', '6', 0, /* 85 */ 'v', '1', '7', 0, /* 89 */ 'v', '2', '7', 0, /* 93 */ 'v', '7', 0, /* 96 */ 'v', '1', '8', 0, /* 100 */ 'v', '2', '8', 0, /* 104 */ 'v', '8', 0, /* 107 */ 'v', '1', '9', 0, /* 111 */ 'v', '2', '9', 0, /* 115 */ 'v', '9', 0, }; static const uint16_t RegAsmOffsetvreg[] = { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, }; const uint16_t *RegAsmOffset; const char *AsmStrs; switch(AltIdx) { default: // llvm_unreachable("Invalid register alt name index!"); case AArch64_NoRegAltName: AsmStrs = AsmStrsNoRegAltName; RegAsmOffset = RegAsmOffsetNoRegAltName; break; case AArch64_vreg: AsmStrs = AsmStrsvreg; RegAsmOffset = RegAsmOffsetvreg; break; } //int i; //for (i = 0; i < sizeof(RegAsmOffsetNoRegAltName)/2; i++) // printf("%s = %u\n", AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[i], i + 1); //printf("*************************\n"); //for (i = 0; i < sizeof(RegAsmOffsetvreg)/2; i++) // printf("%s = %u\n", AsmStrsvreg+RegAsmOffsetvreg[i], i + 1); //printf("-------------------------\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS, MCRegisterInfo *MRI) { // printf(">>>> Method: %u, opIdx: %x\n", PrintMethodIdx, OpIdx); switch (PrintMethodIdx) { default: // llvm_unreachable("Unknown PrintMethod kind"); break; case 0: printAddSubImm(MI, OpIdx, OS); break; case 1: printShifter(MI, OpIdx, OS); break; case 2: printArithExtend(MI, OpIdx, OS); break; case 3: printLogicalImm32(MI, OpIdx, OS); break; case 4: printLogicalImm64(MI, OpIdx, OS); break; case 5: printVRegOperand(MI, OpIdx, OS); break; case 6: printHexImm(MI, OpIdx, OS); break; case 7: printInverseCondCode(MI, OpIdx, OS); break; case 8: printVectorIndex(MI, OpIdx, OS); break; case 9: printTypedVectorList(MI, OpIdx, OS, 16, 'b', MRI); break; case 10: printTypedVectorList(MI, OpIdx, OS, 1, 'd', MRI); break; case 11: printTypedVectorList(MI, OpIdx, OS, 2, 'd', MRI); break; case 12: printTypedVectorList(MI, OpIdx, OS, 2, 's', MRI); break; case 13: printTypedVectorList(MI, OpIdx, OS, 4, 'h', MRI); break; case 14: printTypedVectorList(MI, OpIdx, OS, 4, 's', MRI); break; case 15: printTypedVectorList(MI, OpIdx, OS, 8, 'b', MRI); break; case 16: printTypedVectorList(MI, OpIdx, OS, 8, 'h', MRI); break; case 17: printTypedVectorList(MI, OpIdx, OS, 0, 'h', MRI); break; case 18: printTypedVectorList(MI, OpIdx, OS, 0, 's', MRI); break; case 19: printTypedVectorList(MI, OpIdx, OS, 0, 'd', MRI); break; case 20: printTypedVectorList(MI, OpIdx, OS, 0, 'b', MRI); break; case 21: printPrefetchOp(MI, OpIdx, OS); break; case 22: printSysCROperand(MI, OpIdx, OS); break; } } static bool AArch64InstPrinterValidateMCOperand( MCOperand *MCOp, unsigned PredicateIndex) { switch (PredicateIndex) { default: // llvm_unreachable("Unknown MCOperandPredicate kind"); case 1: { return (MCOperand_isImm(MCOp) && MCOperand_getImm(MCOp) != ARM64_CC_AL && MCOperand_getImm(MCOp) != ARM64_CC_NV); } } } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case AArch64_ADDSWri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) { // (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) AsmString = "cmn $\x02, $\xFF\x03\x01"; break; } return NULL; case AArch64_ADDSWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) AsmString = "cmn $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) AsmString = "cmn $\x02, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "adds $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDSWrx: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) AsmString = "cmn $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) AsmString = "cmn $\x02, $\x03$\xFF\x04\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) AsmString = "adds $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDSXri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) { // (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) AsmString = "cmn $\x02, $\xFF\x03\x01"; break; } return NULL; case AArch64_ADDSXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) AsmString = "cmn $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) AsmString = "cmn $\x02, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "adds $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDSXrx: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) AsmString = "cmn $\x02, $\x03$\xFF\x04\x03"; break; } return NULL; case AArch64_ADDSXrx64: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) AsmString = "cmn $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) AsmString = "cmn $\x02, $\x03$\xFF\x04\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) AsmString = "adds $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDWri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0) AsmString = "mov $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0) AsmString = "mov $\x01, $\x02"; break; } return NULL; case AArch64_ADDWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "add $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDWrx: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) AsmString = "add $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) AsmString = "add $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDXri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0) AsmString = "mov $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0) AsmString = "mov $\x01, $\x02"; break; } return NULL; case AArch64_ADDXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "add $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ADDXrx64: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) AsmString = "add $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) AsmString = "add $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ANDSWri: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1)) { // (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2) AsmString = "tst $\x02, $\xFF\x03\x04"; break; } return NULL; case AArch64_ANDSWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) AsmString = "tst $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh) AsmString = "tst $\x02, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "ands $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ANDSXri: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1)) { // (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2) AsmString = "tst $\x02, $\xFF\x03\x05"; break; } return NULL; case AArch64_ANDSXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) AsmString = "tst $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh) AsmString = "tst $\x02, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "ands $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ANDWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "and $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ANDXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "and $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_BICSWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "bics $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_BICSXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "bics $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_BICWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "bic $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_BICXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "bic $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_BICv2i32: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (BICv2i32 V64:$Vd, imm0_255:$imm, 0) AsmString = "bic $\xFF\x01\x06.2s, $\xFF\x02\x07"; break; } return NULL; case AArch64_BICv4i16: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (BICv4i16 V64:$Vd, imm0_255:$imm, 0) AsmString = "bic $\xFF\x01\x06.4h, $\xFF\x02\x07"; break; } return NULL; case AArch64_BICv4i32: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (BICv4i32 V128:$Vd, imm0_255:$imm, 0) AsmString = "bic $\xFF\x01\x06.4s, $\xFF\x02\x07"; break; } return NULL; case AArch64_BICv8i16: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (BICv8i16 V128:$Vd, imm0_255:$imm, 0) AsmString = "bic $\xFF\x01\x06.8h, $\xFF\x02\x07"; break; } return NULL; case AArch64_CLREX: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (CLREX 15) AsmString = "clrex"; break; } return NULL; case AArch64_CSINCWr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_WZR && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) AsmString = "cset $\x01, $\xFF\x04\x08"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) AsmString = "cinc $\x01, $\x02, $\xFF\x04\x08"; break; } return NULL; case AArch64_CSINCXr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) AsmString = "cset $\x01, $\xFF\x04\x08"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) AsmString = "cinc $\x01, $\x02, $\xFF\x04\x08"; break; } return NULL; case AArch64_CSINVWr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_WZR && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) AsmString = "csetm $\x01, $\xFF\x04\x08"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) AsmString = "cinv $\x01, $\x02, $\xFF\x04\x08"; break; } return NULL; case AArch64_CSINVXr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) AsmString = "csetm $\x01, $\xFF\x04\x08"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) AsmString = "cinv $\x01, $\x02, $\xFF\x04\x08"; break; } return NULL; case AArch64_CSNEGWr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08"; break; } return NULL; case AArch64_CSNEGXr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { // (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08"; break; } return NULL; case AArch64_DCPS1: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (DCPS1 0) AsmString = "dcps1"; break; } return NULL; case AArch64_DCPS2: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (DCPS2 0) AsmString = "dcps2"; break; } return NULL; case AArch64_DCPS3: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (DCPS3 0) AsmString = "dcps3"; break; } return NULL; case AArch64_EONWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "eon $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_EONXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "eon $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_EORWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "eor $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_EORXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "eor $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_EXTRWrri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift) AsmString = "ror $\x01, $\x02, $\x04"; break; } return NULL; case AArch64_EXTRXrri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift) AsmString = "ror $\x01, $\x02, $\x04"; break; } return NULL; case AArch64_HINT: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (HINT { 0, 0, 0 }) AsmString = "nop"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { // (HINT { 0, 0, 1 }) AsmString = "yield"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { // (HINT { 0, 1, 0 }) AsmString = "wfe"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 3) { // (HINT { 0, 1, 1 }) AsmString = "wfi"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4) { // (HINT { 1, 0, 0 }) AsmString = "sev"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 5) { // (HINT { 1, 0, 1 }) AsmString = "sevl"; break; } return NULL; case AArch64_INSvi16gpr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src) AsmString = "mov $\xFF\x01\x06.h$\xFF\x02\x09, $\x03"; break; } return NULL; case AArch64_INSvi16lane: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { // (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2) AsmString = "mov $\xFF\x01\x06.h$\xFF\x02\x09, $\xFF\x03\x06.h$\xFF\x04\x09"; break; } return NULL; case AArch64_INSvi32gpr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src) AsmString = "mov $\xFF\x01\x06.s$\xFF\x02\x09, $\x03"; break; } return NULL; case AArch64_INSvi32lane: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { // (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2) AsmString = "mov $\xFF\x01\x06.s$\xFF\x02\x09, $\xFF\x03\x06.s$\xFF\x04\x09"; break; } return NULL; case AArch64_INSvi64gpr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src) AsmString = "mov $\xFF\x01\x06.d$\xFF\x02\x09, $\x03"; break; } return NULL; case AArch64_INSvi64lane: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { // (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2) AsmString = "mov $\xFF\x01\x06.d$\xFF\x02\x09, $\xFF\x03\x06.d$\xFF\x04\x09"; break; } return NULL; case AArch64_INSvi8gpr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src) AsmString = "mov $\xFF\x01\x06.b$\xFF\x02\x09, $\x03"; break; } return NULL; case AArch64_INSvi8lane: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { // (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2) AsmString = "mov $\xFF\x01\x06.b$\xFF\x02\x09, $\xFF\x03\x06.b$\xFF\x04\x09"; break; } return NULL; case AArch64_ISB: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (ISB 15) AsmString = "isb"; break; } return NULL; case AArch64_LD1Fourv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #64"; break; } return NULL; case AArch64_LD1Fourv1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #32"; break; } return NULL; case AArch64_LD1Fourv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #64"; break; } return NULL; case AArch64_LD1Fourv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #32"; break; } return NULL; case AArch64_LD1Fourv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #32"; break; } return NULL; case AArch64_LD1Fourv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #64"; break; } return NULL; case AArch64_LD1Fourv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x10, [$\x01], #32"; break; } return NULL; case AArch64_LD1Fourv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x11, [$\x01], #64"; break; } return NULL; case AArch64_LD1Onev16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #16"; break; } return NULL; case AArch64_LD1Onev1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #8"; break; } return NULL; case AArch64_LD1Onev2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #16"; break; } return NULL; case AArch64_LD1Onev2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #8"; break; } return NULL; case AArch64_LD1Onev4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #8"; break; } return NULL; case AArch64_LD1Onev4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #16"; break; } return NULL; case AArch64_LD1Onev8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x10, [$\x01], #8"; break; } return NULL; case AArch64_LD1Onev8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x11, [$\x01], #16"; break; } return NULL; case AArch64_LD1Rv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x0A, [$\x01], #1"; break; } return NULL; case AArch64_LD1Rv1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x0B, [$\x01], #8"; break; } return NULL; case AArch64_LD1Rv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x0C, [$\x01], #8"; break; } return NULL; case AArch64_LD1Rv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x0D, [$\x01], #4"; break; } return NULL; case AArch64_LD1Rv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x0E, [$\x01], #2"; break; } return NULL; case AArch64_LD1Rv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x0F, [$\x01], #4"; break; } return NULL; case AArch64_LD1Rv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x10, [$\x01], #1"; break; } return NULL; case AArch64_LD1Rv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) AsmString = "ld1r $\xFF\x02\x11, [$\x01], #2"; break; } return NULL; case AArch64_LD1Threev16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #48"; break; } return NULL; case AArch64_LD1Threev1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #24"; break; } return NULL; case AArch64_LD1Threev2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #48"; break; } return NULL; case AArch64_LD1Threev2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #24"; break; } return NULL; case AArch64_LD1Threev4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #24"; break; } return NULL; case AArch64_LD1Threev4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #48"; break; } return NULL; case AArch64_LD1Threev8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x10, [$\x01], #24"; break; } return NULL; case AArch64_LD1Threev8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x11, [$\x01], #48"; break; } return NULL; case AArch64_LD1Twov16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #32"; break; } return NULL; case AArch64_LD1Twov1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #16"; break; } return NULL; case AArch64_LD1Twov2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #32"; break; } return NULL; case AArch64_LD1Twov2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #16"; break; } return NULL; case AArch64_LD1Twov4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #16"; break; } return NULL; case AArch64_LD1Twov4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #32"; break; } return NULL; case AArch64_LD1Twov8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x10, [$\x01], #16"; break; } return NULL; case AArch64_LD1Twov8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) AsmString = "ld1 $\xFF\x02\x11, [$\x01], #32"; break; } return NULL; case AArch64_LD1i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) AsmString = "ld1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2"; break; } return NULL; case AArch64_LD1i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) AsmString = "ld1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4"; break; } return NULL; case AArch64_LD1i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) AsmString = "ld1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8"; break; } return NULL; case AArch64_LD1i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) AsmString = "ld1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1"; break; } return NULL; case AArch64_LD2Rv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x0A, [$\x01], #2"; break; } return NULL; case AArch64_LD2Rv1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x0B, [$\x01], #16"; break; } return NULL; case AArch64_LD2Rv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x0C, [$\x01], #16"; break; } return NULL; case AArch64_LD2Rv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x0D, [$\x01], #8"; break; } return NULL; case AArch64_LD2Rv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x0E, [$\x01], #4"; break; } return NULL; case AArch64_LD2Rv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x0F, [$\x01], #8"; break; } return NULL; case AArch64_LD2Rv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x10, [$\x01], #2"; break; } return NULL; case AArch64_LD2Rv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) AsmString = "ld2r $\xFF\x02\x11, [$\x01], #4"; break; } return NULL; case AArch64_LD2Twov16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x0A, [$\x01], #32"; break; } return NULL; case AArch64_LD2Twov2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x0C, [$\x01], #32"; break; } return NULL; case AArch64_LD2Twov2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x0D, [$\x01], #16"; break; } return NULL; case AArch64_LD2Twov4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x0E, [$\x01], #16"; break; } return NULL; case AArch64_LD2Twov4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x0F, [$\x01], #32"; break; } return NULL; case AArch64_LD2Twov8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x10, [$\x01], #16"; break; } return NULL; case AArch64_LD2Twov8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) AsmString = "ld2 $\xFF\x02\x11, [$\x01], #32"; break; } return NULL; case AArch64_LD2i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) AsmString = "ld2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4"; break; } return NULL; case AArch64_LD2i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) AsmString = "ld2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8"; break; } return NULL; case AArch64_LD2i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) AsmString = "ld2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16"; break; } return NULL; case AArch64_LD2i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) AsmString = "ld2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2"; break; } return NULL; case AArch64_LD3Rv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x0A, [$\x01], #3"; break; } return NULL; case AArch64_LD3Rv1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x0B, [$\x01], #24"; break; } return NULL; case AArch64_LD3Rv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x0C, [$\x01], #24"; break; } return NULL; case AArch64_LD3Rv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x0D, [$\x01], #12"; break; } return NULL; case AArch64_LD3Rv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x0E, [$\x01], #6"; break; } return NULL; case AArch64_LD3Rv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x0F, [$\x01], #12"; break; } return NULL; case AArch64_LD3Rv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x10, [$\x01], #3"; break; } return NULL; case AArch64_LD3Rv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) AsmString = "ld3r $\xFF\x02\x11, [$\x01], #6"; break; } return NULL; case AArch64_LD3Threev16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x0A, [$\x01], #48"; break; } return NULL; case AArch64_LD3Threev2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x0C, [$\x01], #48"; break; } return NULL; case AArch64_LD3Threev2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x0D, [$\x01], #24"; break; } return NULL; case AArch64_LD3Threev4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x0E, [$\x01], #24"; break; } return NULL; case AArch64_LD3Threev4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x0F, [$\x01], #48"; break; } return NULL; case AArch64_LD3Threev8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x10, [$\x01], #24"; break; } return NULL; case AArch64_LD3Threev8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) AsmString = "ld3 $\xFF\x02\x11, [$\x01], #48"; break; } return NULL; case AArch64_LD3i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) AsmString = "ld3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6"; break; } return NULL; case AArch64_LD3i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) AsmString = "ld3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12"; break; } return NULL; case AArch64_LD3i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) AsmString = "ld3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24"; break; } return NULL; case AArch64_LD3i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) AsmString = "ld3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3"; break; } return NULL; case AArch64_LD4Fourv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x0A, [$\x01], #64"; break; } return NULL; case AArch64_LD4Fourv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x0C, [$\x01], #64"; break; } return NULL; case AArch64_LD4Fourv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x0D, [$\x01], #32"; break; } return NULL; case AArch64_LD4Fourv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x0E, [$\x01], #32"; break; } return NULL; case AArch64_LD4Fourv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x0F, [$\x01], #64"; break; } return NULL; case AArch64_LD4Fourv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x10, [$\x01], #32"; break; } return NULL; case AArch64_LD4Fourv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) AsmString = "ld4 $\xFF\x02\x11, [$\x01], #64"; break; } return NULL; case AArch64_LD4Rv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x0A, [$\x01], #4"; break; } return NULL; case AArch64_LD4Rv1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x0B, [$\x01], #32"; break; } return NULL; case AArch64_LD4Rv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x0C, [$\x01], #32"; break; } return NULL; case AArch64_LD4Rv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x0D, [$\x01], #16"; break; } return NULL; case AArch64_LD4Rv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x0E, [$\x01], #8"; break; } return NULL; case AArch64_LD4Rv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x0F, [$\x01], #16"; break; } return NULL; case AArch64_LD4Rv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x10, [$\x01], #4"; break; } return NULL; case AArch64_LD4Rv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) AsmString = "ld4r $\xFF\x02\x11, [$\x01], #8"; break; } return NULL; case AArch64_LD4i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) AsmString = "ld4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8"; break; } return NULL; case AArch64_LD4i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) AsmString = "ld4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16"; break; } return NULL; case AArch64_LD4i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) AsmString = "ld4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32"; break; } return NULL; case AArch64_LD4i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) AsmString = "ld4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4"; break; } return NULL; case AArch64_LDNPDi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDNPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDNPQi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDNPSi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDNPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDNPWi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDNPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDNPXi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDNPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDPDi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDPQi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDPSWi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDPSWi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldpsw $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDPSi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDPWi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDPXi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (LDPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "ldp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_LDRBBroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrb $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRBBui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRBroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRBroX FPR8:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRBui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRBui FPR8:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRDroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRDroX FPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRDui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRDui FPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRHHroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrh $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRHHui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRHroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRHroX FPR16:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRHui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRHui FPR16:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRQroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRQui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRQui FPR128:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRSBWroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrsb $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRSBWui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrsb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRSBXroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrsb $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRSBXui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrsb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRSHWroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrsh $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRSHWui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrsh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRSHXroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrsh $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRSHXui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrsh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRSWroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldrsw $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRSWui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldrsw $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRSroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRSroX FPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRSui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRSui FPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRWroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRWui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRWui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDRXroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "ldr $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_LDRXui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDRXui GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRBi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRHi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRSBWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrsb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRSBXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrsb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRSHWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrsh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRSHXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrsh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRSWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtrsw $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDTRXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldtr $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURBBi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldurb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURBi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURBi FPR8:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURDi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURDi FPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURHHi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldurh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURHi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURHi FPR16:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURQi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURQi FPR128:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURSBWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldursb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURSBXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldursb $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURSHWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldursh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURSHXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldursh $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURSWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldursw $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURSi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURSi FPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_LDURXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (LDURXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "ldur $\x01, [$\x02]"; break; } return NULL; case AArch64_MADDWrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_WZR) { // (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) AsmString = "mul $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_MADDXrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) AsmString = "mul $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_MOVKWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 16) { // (MOVKWi GPR32:$Rd, movk_symbol_g1:$sym, 16) AsmString = "movk $\x01, $\x02"; break; } return NULL; case AArch64_MOVKXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 48) { // (MOVKXi GPR64:$Rd, movk_symbol_g3:$sym, 48) AsmString = "movk $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 32) { // (MOVKXi GPR64:$Rd, movk_symbol_g2:$sym, 32) AsmString = "movk $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 16) { // (MOVKXi GPR64:$Rd, movk_symbol_g1:$sym, 16) AsmString = "movk $\x01, $\x02"; break; } return NULL; case AArch64_MSUBWrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_WZR) { // (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) AsmString = "mneg $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_MSUBXrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) AsmString = "mneg $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_NOTv16i8: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) { // (NOTv16i8 V128:$Vd, V128:$Vn) AsmString = "mvn $\xFF\x01\x06.16b, $\xFF\x02\x06.16b"; break; } return NULL; case AArch64_NOTv8i8: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1)) { // (NOTv8i8 V64:$Vd, V64:$Vn) AsmString = "mvn $\xFF\x01\x06.8b, $\xFF\x02\x06.8b"; break; } return NULL; case AArch64_ORNWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0) AsmString = "mvn $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh) AsmString = "mvn $\x01, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "orn $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ORNXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0) AsmString = "mvn $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh) AsmString = "mvn $\x01, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "orn $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ORRWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0) AsmString = "mov $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "orr $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ORRXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0) AsmString = "mov $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "orr $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ORRv16i8: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (ORRv16i8 V128:$dst, V128:$src, V128:$src) AsmString = "mov $\xFF\x01\x06.16b, $\xFF\x02\x06.16b"; break; } return NULL; case AArch64_ORRv2i32: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (ORRv2i32 V64:$Vd, imm0_255:$imm, 0) AsmString = "orr $\xFF\x01\x06.2s, $\xFF\x02\x07"; break; } return NULL; case AArch64_ORRv4i16: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (ORRv4i16 V64:$Vd, imm0_255:$imm, 0) AsmString = "orr $\xFF\x01\x06.4h, $\xFF\x02\x07"; break; } return NULL; case AArch64_ORRv4i32: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (ORRv4i32 V128:$Vd, imm0_255:$imm, 0) AsmString = "orr $\xFF\x01\x06.4s, $\xFF\x02\x07"; break; } return NULL; case AArch64_ORRv8i16: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (ORRv8i16 V128:$Vd, imm0_255:$imm, 0) AsmString = "orr $\xFF\x01\x06.8h, $\xFF\x02\x07"; break; } return NULL; case AArch64_ORRv8i8: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (ORRv8i8 V64:$dst, V64:$src, V64:$src) AsmString = "mov $\xFF\x01\x06.8b, $\xFF\x02\x06.8b"; break; } return NULL; case AArch64_PRFMroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "prfm $\xFF\x01\x16, [$\x02, $\x03]"; break; } return NULL; case AArch64_PRFMui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0) AsmString = "prfm $\xFF\x01\x16, [$\x02]"; break; } return NULL; case AArch64_PRFUMi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0) AsmString = "prfum $\xFF\x01\x16, [$\x02]"; break; } return NULL; case AArch64_RET: if (MCInst_getNumOperands(MI) == 1 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_LR) { // (RET LR) AsmString = "ret"; break; } return NULL; case AArch64_SBCSWr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SBCSWr GPR32:$dst, WZR, GPR32:$src) AsmString = "ngcs $\x01, $\x03"; break; } return NULL; case AArch64_SBCSXr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (SBCSXr GPR64:$dst, XZR, GPR64:$src) AsmString = "ngcs $\x01, $\x03"; break; } return NULL; case AArch64_SBCWr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SBCWr GPR32:$dst, WZR, GPR32:$src) AsmString = "ngc $\x01, $\x03"; break; } return NULL; case AArch64_SBCXr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (SBCXr GPR64:$dst, XZR, GPR64:$src) AsmString = "ngc $\x01, $\x03"; break; } return NULL; case AArch64_SBFMWri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { // (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) AsmString = "asr $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (SBFMWri GPR32:$dst, GPR32:$src, 0, 7) AsmString = "sxtb $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (SBFMWri GPR32:$dst, GPR32:$src, 0, 15) AsmString = "sxth $\x01, $\x02"; break; } return NULL; case AArch64_SBFMXri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 63) { // (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) AsmString = "asr $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (SBFMXri GPR64:$dst, GPR64:$src, 0, 7) AsmString = "sxtb $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (SBFMXri GPR64:$dst, GPR64:$src, 0, 15) AsmString = "sxth $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { // (SBFMXri GPR64:$dst, GPR64:$src, 0, 31) AsmString = "sxtw $\x01, $\x02"; break; } return NULL; case AArch64_SMADDLrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) AsmString = "smull $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SMSUBLrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) AsmString = "smnegl $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_ST1Fourv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0A, [$\x01], #64"; break; } return NULL; case AArch64_ST1Fourv1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0B, [$\x01], #32"; break; } return NULL; case AArch64_ST1Fourv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0C, [$\x01], #64"; break; } return NULL; case AArch64_ST1Fourv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0D, [$\x01], #32"; break; } return NULL; case AArch64_ST1Fourv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0E, [$\x01], #32"; break; } return NULL; case AArch64_ST1Fourv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0F, [$\x01], #64"; break; } return NULL; case AArch64_ST1Fourv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x10, [$\x01], #32"; break; } return NULL; case AArch64_ST1Fourv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x11, [$\x01], #64"; break; } return NULL; case AArch64_ST1Onev16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0A, [$\x01], #16"; break; } return NULL; case AArch64_ST1Onev1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0B, [$\x01], #8"; break; } return NULL; case AArch64_ST1Onev2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0C, [$\x01], #16"; break; } return NULL; case AArch64_ST1Onev2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0D, [$\x01], #8"; break; } return NULL; case AArch64_ST1Onev4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0E, [$\x01], #8"; break; } return NULL; case AArch64_ST1Onev4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0F, [$\x01], #16"; break; } return NULL; case AArch64_ST1Onev8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x10, [$\x01], #8"; break; } return NULL; case AArch64_ST1Onev8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x11, [$\x01], #16"; break; } return NULL; case AArch64_ST1Threev16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0A, [$\x01], #48"; break; } return NULL; case AArch64_ST1Threev1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0B, [$\x01], #24"; break; } return NULL; case AArch64_ST1Threev2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0C, [$\x01], #48"; break; } return NULL; case AArch64_ST1Threev2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0D, [$\x01], #24"; break; } return NULL; case AArch64_ST1Threev4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0E, [$\x01], #24"; break; } return NULL; case AArch64_ST1Threev4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0F, [$\x01], #48"; break; } return NULL; case AArch64_ST1Threev8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x10, [$\x01], #24"; break; } return NULL; case AArch64_ST1Threev8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x11, [$\x01], #48"; break; } return NULL; case AArch64_ST1Twov16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0A, [$\x01], #32"; break; } return NULL; case AArch64_ST1Twov1d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0B, [$\x01], #16"; break; } return NULL; case AArch64_ST1Twov2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0C, [$\x01], #32"; break; } return NULL; case AArch64_ST1Twov2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0D, [$\x01], #16"; break; } return NULL; case AArch64_ST1Twov4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0E, [$\x01], #16"; break; } return NULL; case AArch64_ST1Twov4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) AsmString = "st1 $\xFF\x02\x0F, [$\x01], #32"; break; } return NULL; case AArch64_ST1Twov8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) AsmString = "st1 $\xFF\x02\x10, [$\x01], #16"; break; } return NULL; case AArch64_ST1Twov8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) AsmString = "st1 $\xFF\x02\x11, [$\x01], #32"; break; } return NULL; case AArch64_ST1i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) AsmString = "st1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2"; break; } return NULL; case AArch64_ST1i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) AsmString = "st1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4"; break; } return NULL; case AArch64_ST1i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) AsmString = "st1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8"; break; } return NULL; case AArch64_ST1i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) AsmString = "st1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1"; break; } return NULL; case AArch64_ST2Twov16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) AsmString = "st2 $\xFF\x02\x0A, [$\x01], #32"; break; } return NULL; case AArch64_ST2Twov2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) AsmString = "st2 $\xFF\x02\x0C, [$\x01], #32"; break; } return NULL; case AArch64_ST2Twov2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) AsmString = "st2 $\xFF\x02\x0D, [$\x01], #16"; break; } return NULL; case AArch64_ST2Twov4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) AsmString = "st2 $\xFF\x02\x0E, [$\x01], #16"; break; } return NULL; case AArch64_ST2Twov4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) AsmString = "st2 $\xFF\x02\x0F, [$\x01], #32"; break; } return NULL; case AArch64_ST2Twov8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) AsmString = "st2 $\xFF\x02\x10, [$\x01], #16"; break; } return NULL; case AArch64_ST2Twov8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) AsmString = "st2 $\xFF\x02\x11, [$\x01], #32"; break; } return NULL; case AArch64_ST2i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) AsmString = "st2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4"; break; } return NULL; case AArch64_ST2i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) AsmString = "st2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8"; break; } return NULL; case AArch64_ST2i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) AsmString = "st2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16"; break; } return NULL; case AArch64_ST2i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) AsmString = "st2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2"; break; } return NULL; case AArch64_ST3Threev16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) AsmString = "st3 $\xFF\x02\x0A, [$\x01], #48"; break; } return NULL; case AArch64_ST3Threev2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) AsmString = "st3 $\xFF\x02\x0C, [$\x01], #48"; break; } return NULL; case AArch64_ST3Threev2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) AsmString = "st3 $\xFF\x02\x0D, [$\x01], #24"; break; } return NULL; case AArch64_ST3Threev4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) AsmString = "st3 $\xFF\x02\x0E, [$\x01], #24"; break; } return NULL; case AArch64_ST3Threev4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) AsmString = "st3 $\xFF\x02\x0F, [$\x01], #48"; break; } return NULL; case AArch64_ST3Threev8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) AsmString = "st3 $\xFF\x02\x10, [$\x01], #24"; break; } return NULL; case AArch64_ST3Threev8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) AsmString = "st3 $\xFF\x02\x11, [$\x01], #48"; break; } return NULL; case AArch64_ST3i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) AsmString = "st3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6"; break; } return NULL; case AArch64_ST3i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) AsmString = "st3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12"; break; } return NULL; case AArch64_ST3i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) AsmString = "st3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24"; break; } return NULL; case AArch64_ST3i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) AsmString = "st3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3"; break; } return NULL; case AArch64_ST4Fourv16b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) AsmString = "st4 $\xFF\x02\x0A, [$\x01], #64"; break; } return NULL; case AArch64_ST4Fourv2d_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) AsmString = "st4 $\xFF\x02\x0C, [$\x01], #64"; break; } return NULL; case AArch64_ST4Fourv2s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) AsmString = "st4 $\xFF\x02\x0D, [$\x01], #32"; break; } return NULL; case AArch64_ST4Fourv4h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) AsmString = "st4 $\xFF\x02\x0E, [$\x01], #32"; break; } return NULL; case AArch64_ST4Fourv4s_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) AsmString = "st4 $\xFF\x02\x0F, [$\x01], #64"; break; } return NULL; case AArch64_ST4Fourv8b_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) AsmString = "st4 $\xFF\x02\x10, [$\x01], #32"; break; } return NULL; case AArch64_ST4Fourv8h_POST: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { // (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) AsmString = "st4 $\xFF\x02\x11, [$\x01], #64"; break; } return NULL; case AArch64_ST4i16_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) AsmString = "st4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8"; break; } return NULL; case AArch64_ST4i32_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) AsmString = "st4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16"; break; } return NULL; case AArch64_ST4i64_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) AsmString = "st4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32"; break; } return NULL; case AArch64_ST4i8_POST: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) AsmString = "st4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4"; break; } return NULL; case AArch64_STNPDi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STNPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "stnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STNPQi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) AsmString = "stnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STNPSi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STNPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "stnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STNPWi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STNPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "stnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STNPXi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STNPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "stnp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STPDi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "stp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STPQi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) AsmString = "stp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STPSi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "stp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STPWi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) AsmString = "stp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STPXi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (STPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) AsmString = "stp $\x01, $\x02, [$\x03]"; break; } return NULL; case AArch64_STRBBroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "strb $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRBBui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRBBui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "strb $\x01, [$\x02]"; break; } return NULL; case AArch64_STRBroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRBroX FPR8:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRBui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRBui FPR8:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STRDroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRDroX FPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRDui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRDui FPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STRHHroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "strh $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRHHui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRHHui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "strh $\x01, [$\x02]"; break; } return NULL; case AArch64_STRHroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRHroX FPR16:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRHui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRHui FPR16:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STRQroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRQui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRQui FPR128:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STRSroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRSroX FPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRSui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRSui FPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STRWroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRWui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRWui GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STRXroX: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) AsmString = "str $\x01, [$\x02, $\x03]"; break; } return NULL; case AArch64_STRXui: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STRXui GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "str $\x01, [$\x02]"; break; } return NULL; case AArch64_STTRBi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "sttrb $\x01, [$\x02]"; break; } return NULL; case AArch64_STTRHi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "sttrh $\x01, [$\x02]"; break; } return NULL; case AArch64_STTRWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "sttr $\x01, [$\x02]"; break; } return NULL; case AArch64_STTRXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "sttr $\x01, [$\x02]"; break; } return NULL; case AArch64_STURBBi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURBBi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "sturb $\x01, [$\x02]"; break; } return NULL; case AArch64_STURBi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURBi FPR8:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_STURDi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURDi FPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_STURHHi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURHHi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "sturh $\x01, [$\x02]"; break; } return NULL; case AArch64_STURHi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURHi FPR16:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_STURQi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURQi FPR128:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_STURSi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURSi FPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_STURWi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURWi GPR32:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_STURXi: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (STURXi GPR64:$Rt, GPR64sp:$Rn, 0) AsmString = "stur $\x01, [$\x02]"; break; } return NULL; case AArch64_SUBSWri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) { // (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) AsmString = "cmp $\x02, $\xFF\x03\x01"; break; } return NULL; case AArch64_SUBSWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0) AsmString = "cmp $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) AsmString = "cmp $\x02, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0) AsmString = "negs $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) AsmString = "negs $\x01, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "subs $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBSWrx: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) AsmString = "cmp $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) AsmString = "cmp $\x02, $\x03$\xFF\x04\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) AsmString = "subs $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBSXri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) { // (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) AsmString = "cmp $\x02, $\xFF\x03\x01"; break; } return NULL; case AArch64_SUBSXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0) AsmString = "cmp $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) AsmString = "cmp $\x02, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0) AsmString = "negs $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) AsmString = "negs $\x01, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "subs $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBSXrx: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) AsmString = "cmp $\x02, $\x03$\xFF\x04\x03"; break; } return NULL; case AArch64_SUBSXrx64: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) AsmString = "cmp $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) AsmString = "cmp $\x02, $\x03$\xFF\x04\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) AsmString = "subs $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBWrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0) AsmString = "neg $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { // (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) AsmString = "neg $\x01, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) AsmString = "sub $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBWrx: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) AsmString = "sub $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { // (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) AsmString = "sub $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBXrs: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0) AsmString = "neg $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { // (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) AsmString = "neg $\x01, $\x03$\xFF\x04\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) AsmString = "sub $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SUBXrx64: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) AsmString = "sub $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { // (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) AsmString = "sub $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_SYSxt: if (MCInst_getNumOperands(MI) == 5 && MCOperand_getReg(MCInst_getOperand(MI, 4)) == AArch64_XZR) { // (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) AsmString = "sys $\x01, $\xFF\x02\x17, $\xFF\x03\x17, $\x04"; break; } return NULL; case AArch64_UBFMWri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { // (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) AsmString = "lsr $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (UBFMWri GPR32:$dst, GPR32:$src, 0, 7) AsmString = "uxtb $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (UBFMWri GPR32:$dst, GPR32:$src, 0, 15) AsmString = "uxth $\x01, $\x02"; break; } return NULL; case AArch64_UBFMXri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 63) { // (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) AsmString = "lsr $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (UBFMXri GPR64:$dst, GPR64:$src, 0, 7) AsmString = "uxtb $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (UBFMXri GPR64:$dst, GPR64:$src, 0, 15) AsmString = "uxth $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { // (UBFMXri GPR64:$dst, GPR64:$src, 0, 31) AsmString = "uxtw $\x01, $\x02"; break; } return NULL; case AArch64_UMADDLrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) AsmString = "umull $\x01, $\x02, $\x03"; break; } return NULL; case AArch64_UMOVvi32: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) { // (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx) AsmString = "mov $\x01, $\xFF\x02\x06.s$\xFF\x03\x09"; break; } return NULL; case AArch64_UMOVvi64: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) { // (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx) AsmString = "mov $\x01, $\xFF\x02\x06.d$\xFF\x03\x09"; break; } return NULL; case AArch64_UMSUBLrrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { // (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) AsmString = "umnegl $\x01, $\x02, $\x03"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '[') { SStream_concat0(OS, "["); set_mem_access(MI, true); } else if (*c == ']') { SStream_concat0(OS, "]"); set_mem_access(MI, false); } else if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS, MRI); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc010066400017500001750000030141151363402546700243120ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * AArch64 Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static const uint8_t DecoderTable32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 3, // Inst{28-26} ... /* 3 */ MCD_OPC_FilterValue, 2, 86, 4, // Skip to: 1117 /* 7 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 10 */ MCD_OPC_FilterValue, 0, 132, 0, // Skip to: 146 /* 14 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 17 */ MCD_OPC_FilterValue, 0, 77, 0, // Skip to: 98 /* 21 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 24 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 47 /* 28 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 31 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 39 /* 35 */ MCD_OPC_Decode, 147, 15, 0, // Opcode: STXRB /* 39 */ MCD_OPC_FilterValue, 1, 150, 158, // Skip to: 40641 /* 43 */ MCD_OPC_Decode, 191, 14, 0, // Opcode: STLXRB /* 47 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 70 /* 51 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 54 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 62 /* 58 */ MCD_OPC_Decode, 171, 8, 0, // Opcode: LDXRB /* 62 */ MCD_OPC_FilterValue, 1, 127, 158, // Skip to: 40641 /* 66 */ MCD_OPC_Decode, 171, 7, 0, // Opcode: LDAXRB /* 70 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 84 /* 74 */ MCD_OPC_CheckField, 15, 1, 1, 113, 158, // Skip to: 40641 /* 80 */ MCD_OPC_Decode, 185, 14, 0, // Opcode: STLRB /* 84 */ MCD_OPC_FilterValue, 6, 105, 158, // Skip to: 40641 /* 88 */ MCD_OPC_CheckField, 15, 1, 1, 99, 158, // Skip to: 40641 /* 94 */ MCD_OPC_Decode, 165, 7, 0, // Opcode: LDARB /* 98 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 119 /* 102 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 105 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 112 /* 109 */ MCD_OPC_Decode, 95, 1, // Opcode: ANDWrs /* 112 */ MCD_OPC_FilterValue, 1, 77, 158, // Skip to: 40641 /* 116 */ MCD_OPC_Decode, 111, 1, // Opcode: BICWrs /* 119 */ MCD_OPC_FilterValue, 3, 70, 158, // Skip to: 40641 /* 123 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 126 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 133 /* 130 */ MCD_OPC_Decode, 64, 1, // Opcode: ADDWrs /* 133 */ MCD_OPC_FilterValue, 1, 56, 158, // Skip to: 40641 /* 137 */ MCD_OPC_CheckField, 22, 2, 0, 50, 158, // Skip to: 40641 /* 143 */ MCD_OPC_Decode, 65, 2, // Opcode: ADDWrx /* 146 */ MCD_OPC_FilterValue, 1, 131, 0, // Skip to: 281 /* 150 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 153 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 192 /* 157 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 160 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 168 /* 164 */ MCD_OPC_Decode, 198, 14, 3, // Opcode: STNPWi /* 168 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 176 /* 172 */ MCD_OPC_Decode, 178, 7, 3, // Opcode: LDNPWi /* 176 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 184 /* 180 */ MCD_OPC_Decode, 210, 14, 3, // Opcode: STPWpost /* 184 */ MCD_OPC_FilterValue, 3, 5, 158, // Skip to: 40641 /* 188 */ MCD_OPC_Decode, 193, 7, 3, // Opcode: LDPWpost /* 192 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 231 /* 196 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 199 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 207 /* 203 */ MCD_OPC_Decode, 209, 14, 3, // Opcode: STPWi /* 207 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 215 /* 211 */ MCD_OPC_Decode, 192, 7, 3, // Opcode: LDPWi /* 215 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 223 /* 219 */ MCD_OPC_Decode, 211, 14, 3, // Opcode: STPWpre /* 223 */ MCD_OPC_FilterValue, 3, 222, 157, // Skip to: 40641 /* 227 */ MCD_OPC_Decode, 194, 7, 3, // Opcode: LDPWpre /* 231 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 254 /* 235 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 238 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 246 /* 242 */ MCD_OPC_Decode, 137, 9, 1, // Opcode: ORRWrs /* 246 */ MCD_OPC_FilterValue, 1, 199, 157, // Skip to: 40641 /* 250 */ MCD_OPC_Decode, 130, 9, 1, // Opcode: ORNWrs /* 254 */ MCD_OPC_FilterValue, 3, 191, 157, // Skip to: 40641 /* 258 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 261 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 268 /* 265 */ MCD_OPC_Decode, 50, 1, // Opcode: ADDSWrs /* 268 */ MCD_OPC_FilterValue, 1, 177, 157, // Skip to: 40641 /* 272 */ MCD_OPC_CheckField, 22, 2, 0, 171, 157, // Skip to: 40641 /* 278 */ MCD_OPC_Decode, 51, 2, // Opcode: ADDSWrx /* 281 */ MCD_OPC_FilterValue, 2, 136, 0, // Skip to: 421 /* 285 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 288 */ MCD_OPC_FilterValue, 0, 77, 0, // Skip to: 369 /* 292 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 295 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 318 /* 299 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 302 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 310 /* 306 */ MCD_OPC_Decode, 148, 15, 0, // Opcode: STXRH /* 310 */ MCD_OPC_FilterValue, 1, 135, 157, // Skip to: 40641 /* 314 */ MCD_OPC_Decode, 192, 14, 0, // Opcode: STLXRH /* 318 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 341 /* 322 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 325 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 333 /* 329 */ MCD_OPC_Decode, 172, 8, 0, // Opcode: LDXRH /* 333 */ MCD_OPC_FilterValue, 1, 112, 157, // Skip to: 40641 /* 337 */ MCD_OPC_Decode, 172, 7, 0, // Opcode: LDAXRH /* 341 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 355 /* 345 */ MCD_OPC_CheckField, 15, 1, 1, 98, 157, // Skip to: 40641 /* 351 */ MCD_OPC_Decode, 186, 14, 0, // Opcode: STLRH /* 355 */ MCD_OPC_FilterValue, 6, 90, 157, // Skip to: 40641 /* 359 */ MCD_OPC_CheckField, 15, 1, 1, 84, 157, // Skip to: 40641 /* 365 */ MCD_OPC_Decode, 166, 7, 0, // Opcode: LDARH /* 369 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 392 /* 373 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 376 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 384 /* 380 */ MCD_OPC_Decode, 168, 2, 1, // Opcode: EORWrs /* 384 */ MCD_OPC_FilterValue, 1, 61, 157, // Skip to: 40641 /* 388 */ MCD_OPC_Decode, 163, 2, 1, // Opcode: EONWrs /* 392 */ MCD_OPC_FilterValue, 3, 53, 157, // Skip to: 40641 /* 396 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 399 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 407 /* 403 */ MCD_OPC_Decode, 168, 15, 1, // Opcode: SUBWrs /* 407 */ MCD_OPC_FilterValue, 1, 38, 157, // Skip to: 40641 /* 411 */ MCD_OPC_CheckField, 22, 2, 0, 32, 157, // Skip to: 40641 /* 417 */ MCD_OPC_Decode, 169, 15, 2, // Opcode: SUBWrx /* 421 */ MCD_OPC_FilterValue, 3, 90, 0, // Skip to: 515 /* 425 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 428 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 442 /* 432 */ MCD_OPC_CheckField, 22, 2, 3, 11, 157, // Skip to: 40641 /* 438 */ MCD_OPC_Decode, 187, 7, 3, // Opcode: LDPSWpost /* 442 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 465 /* 446 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 449 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 457 /* 453 */ MCD_OPC_Decode, 186, 7, 3, // Opcode: LDPSWi /* 457 */ MCD_OPC_FilterValue, 3, 244, 156, // Skip to: 40641 /* 461 */ MCD_OPC_Decode, 188, 7, 3, // Opcode: LDPSWpre /* 465 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 486 /* 469 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 472 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 479 /* 476 */ MCD_OPC_Decode, 89, 1, // Opcode: ANDSWrs /* 479 */ MCD_OPC_FilterValue, 1, 222, 156, // Skip to: 40641 /* 483 */ MCD_OPC_Decode, 107, 1, // Opcode: BICSWrs /* 486 */ MCD_OPC_FilterValue, 3, 215, 156, // Skip to: 40641 /* 490 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 493 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 501 /* 497 */ MCD_OPC_Decode, 159, 15, 1, // Opcode: SUBSWrs /* 501 */ MCD_OPC_FilterValue, 1, 200, 156, // Skip to: 40641 /* 505 */ MCD_OPC_CheckField, 22, 2, 0, 194, 156, // Skip to: 40641 /* 511 */ MCD_OPC_Decode, 160, 15, 2, // Opcode: SUBSWrx /* 515 */ MCD_OPC_FilterValue, 4, 188, 0, // Skip to: 707 /* 519 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 522 */ MCD_OPC_FilterValue, 0, 123, 0, // Skip to: 649 /* 526 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 529 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 552 /* 533 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 536 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 544 /* 540 */ MCD_OPC_Decode, 149, 15, 0, // Opcode: STXRW /* 544 */ MCD_OPC_FilterValue, 1, 157, 156, // Skip to: 40641 /* 548 */ MCD_OPC_Decode, 193, 14, 0, // Opcode: STLXRW /* 552 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 575 /* 556 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 559 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 567 /* 563 */ MCD_OPC_Decode, 145, 15, 0, // Opcode: STXPW /* 567 */ MCD_OPC_FilterValue, 1, 134, 156, // Skip to: 40641 /* 571 */ MCD_OPC_Decode, 189, 14, 0, // Opcode: STLXPW /* 575 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 598 /* 579 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 582 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 590 /* 586 */ MCD_OPC_Decode, 173, 8, 0, // Opcode: LDXRW /* 590 */ MCD_OPC_FilterValue, 1, 111, 156, // Skip to: 40641 /* 594 */ MCD_OPC_Decode, 173, 7, 0, // Opcode: LDAXRW /* 598 */ MCD_OPC_FilterValue, 3, 19, 0, // Skip to: 621 /* 602 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 605 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 613 /* 609 */ MCD_OPC_Decode, 169, 8, 0, // Opcode: LDXPW /* 613 */ MCD_OPC_FilterValue, 1, 88, 156, // Skip to: 40641 /* 617 */ MCD_OPC_Decode, 169, 7, 0, // Opcode: LDAXPW /* 621 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 635 /* 625 */ MCD_OPC_CheckField, 15, 1, 1, 74, 156, // Skip to: 40641 /* 631 */ MCD_OPC_Decode, 187, 14, 0, // Opcode: STLRW /* 635 */ MCD_OPC_FilterValue, 6, 66, 156, // Skip to: 40641 /* 639 */ MCD_OPC_CheckField, 15, 1, 1, 60, 156, // Skip to: 40641 /* 645 */ MCD_OPC_Decode, 167, 7, 0, // Opcode: LDARW /* 649 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 670 /* 653 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 656 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 663 /* 660 */ MCD_OPC_Decode, 98, 1, // Opcode: ANDXrs /* 663 */ MCD_OPC_FilterValue, 1, 38, 156, // Skip to: 40641 /* 667 */ MCD_OPC_Decode, 113, 1, // Opcode: BICXrs /* 670 */ MCD_OPC_FilterValue, 3, 31, 156, // Skip to: 40641 /* 674 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 677 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 684 /* 681 */ MCD_OPC_Decode, 68, 1, // Opcode: ADDXrs /* 684 */ MCD_OPC_FilterValue, 1, 17, 156, // Skip to: 40641 /* 688 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 691 */ MCD_OPC_FilterValue, 0, 10, 156, // Skip to: 40641 /* 695 */ MCD_OPC_CheckField, 13, 2, 3, 3, 0, // Skip to: 704 /* 701 */ MCD_OPC_Decode, 70, 2, // Opcode: ADDXrx64 /* 704 */ MCD_OPC_Decode, 69, 2, // Opcode: ADDXrx /* 707 */ MCD_OPC_FilterValue, 5, 141, 0, // Skip to: 852 /* 711 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 714 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 753 /* 718 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 721 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 729 /* 725 */ MCD_OPC_Decode, 199, 14, 3, // Opcode: STNPXi /* 729 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 737 /* 733 */ MCD_OPC_Decode, 179, 7, 3, // Opcode: LDNPXi /* 737 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 745 /* 741 */ MCD_OPC_Decode, 213, 14, 3, // Opcode: STPXpost /* 745 */ MCD_OPC_FilterValue, 3, 212, 155, // Skip to: 40641 /* 749 */ MCD_OPC_Decode, 196, 7, 3, // Opcode: LDPXpost /* 753 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 792 /* 757 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 760 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 768 /* 764 */ MCD_OPC_Decode, 212, 14, 3, // Opcode: STPXi /* 768 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 776 /* 772 */ MCD_OPC_Decode, 195, 7, 3, // Opcode: LDPXi /* 776 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 784 /* 780 */ MCD_OPC_Decode, 214, 14, 3, // Opcode: STPXpre /* 784 */ MCD_OPC_FilterValue, 3, 173, 155, // Skip to: 40641 /* 788 */ MCD_OPC_Decode, 197, 7, 3, // Opcode: LDPXpre /* 792 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 815 /* 796 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 799 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 807 /* 803 */ MCD_OPC_Decode, 140, 9, 1, // Opcode: ORRXrs /* 807 */ MCD_OPC_FilterValue, 1, 150, 155, // Skip to: 40641 /* 811 */ MCD_OPC_Decode, 132, 9, 1, // Opcode: ORNXrs /* 815 */ MCD_OPC_FilterValue, 3, 142, 155, // Skip to: 40641 /* 819 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 822 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 829 /* 826 */ MCD_OPC_Decode, 54, 1, // Opcode: ADDSXrs /* 829 */ MCD_OPC_FilterValue, 1, 128, 155, // Skip to: 40641 /* 833 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 836 */ MCD_OPC_FilterValue, 0, 121, 155, // Skip to: 40641 /* 840 */ MCD_OPC_CheckField, 13, 2, 3, 3, 0, // Skip to: 849 /* 846 */ MCD_OPC_Decode, 56, 2, // Opcode: ADDSXrx64 /* 849 */ MCD_OPC_Decode, 55, 2, // Opcode: ADDSXrx /* 852 */ MCD_OPC_FilterValue, 6, 193, 0, // Skip to: 1049 /* 856 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 859 */ MCD_OPC_FilterValue, 0, 123, 0, // Skip to: 986 /* 863 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 866 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 889 /* 870 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 873 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 881 /* 877 */ MCD_OPC_Decode, 150, 15, 0, // Opcode: STXRX /* 881 */ MCD_OPC_FilterValue, 1, 76, 155, // Skip to: 40641 /* 885 */ MCD_OPC_Decode, 194, 14, 0, // Opcode: STLXRX /* 889 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 912 /* 893 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 896 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 904 /* 900 */ MCD_OPC_Decode, 146, 15, 0, // Opcode: STXPX /* 904 */ MCD_OPC_FilterValue, 1, 53, 155, // Skip to: 40641 /* 908 */ MCD_OPC_Decode, 190, 14, 0, // Opcode: STLXPX /* 912 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 935 /* 916 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 919 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 927 /* 923 */ MCD_OPC_Decode, 174, 8, 0, // Opcode: LDXRX /* 927 */ MCD_OPC_FilterValue, 1, 30, 155, // Skip to: 40641 /* 931 */ MCD_OPC_Decode, 174, 7, 0, // Opcode: LDAXRX /* 935 */ MCD_OPC_FilterValue, 3, 19, 0, // Skip to: 958 /* 939 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 942 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 950 /* 946 */ MCD_OPC_Decode, 170, 8, 0, // Opcode: LDXPX /* 950 */ MCD_OPC_FilterValue, 1, 7, 155, // Skip to: 40641 /* 954 */ MCD_OPC_Decode, 170, 7, 0, // Opcode: LDAXPX /* 958 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 972 /* 962 */ MCD_OPC_CheckField, 15, 1, 1, 249, 154, // Skip to: 40641 /* 968 */ MCD_OPC_Decode, 188, 14, 0, // Opcode: STLRX /* 972 */ MCD_OPC_FilterValue, 6, 241, 154, // Skip to: 40641 /* 976 */ MCD_OPC_CheckField, 15, 1, 1, 235, 154, // Skip to: 40641 /* 982 */ MCD_OPC_Decode, 168, 7, 0, // Opcode: LDARX /* 986 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 1009 /* 990 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 993 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1001 /* 997 */ MCD_OPC_Decode, 171, 2, 1, // Opcode: EORXrs /* 1001 */ MCD_OPC_FilterValue, 1, 212, 154, // Skip to: 40641 /* 1005 */ MCD_OPC_Decode, 165, 2, 1, // Opcode: EONXrs /* 1009 */ MCD_OPC_FilterValue, 3, 204, 154, // Skip to: 40641 /* 1013 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 1016 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1024 /* 1020 */ MCD_OPC_Decode, 172, 15, 1, // Opcode: SUBXrs /* 1024 */ MCD_OPC_FilterValue, 1, 189, 154, // Skip to: 40641 /* 1028 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 1031 */ MCD_OPC_FilterValue, 0, 182, 154, // Skip to: 40641 /* 1035 */ MCD_OPC_CheckField, 13, 2, 3, 4, 0, // Skip to: 1045 /* 1041 */ MCD_OPC_Decode, 174, 15, 2, // Opcode: SUBXrx64 /* 1045 */ MCD_OPC_Decode, 173, 15, 2, // Opcode: SUBXrx /* 1049 */ MCD_OPC_FilterValue, 7, 164, 154, // Skip to: 40641 /* 1053 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 1056 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 1078 /* 1060 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 1063 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 1070 /* 1067 */ MCD_OPC_Decode, 92, 1, // Opcode: ANDSXrs /* 1070 */ MCD_OPC_FilterValue, 3, 143, 154, // Skip to: 40641 /* 1074 */ MCD_OPC_Decode, 163, 15, 1, // Opcode: SUBSXrs /* 1078 */ MCD_OPC_FilterValue, 1, 135, 154, // Skip to: 40641 /* 1082 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 1085 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 1092 /* 1089 */ MCD_OPC_Decode, 109, 1, // Opcode: BICSXrs /* 1092 */ MCD_OPC_FilterValue, 3, 121, 154, // Skip to: 40641 /* 1096 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 1099 */ MCD_OPC_FilterValue, 0, 114, 154, // Skip to: 40641 /* 1103 */ MCD_OPC_CheckField, 13, 2, 3, 4, 0, // Skip to: 1113 /* 1109 */ MCD_OPC_Decode, 165, 15, 2, // Opcode: SUBSXrx64 /* 1113 */ MCD_OPC_Decode, 164, 15, 2, // Opcode: SUBSXrx /* 1117 */ MCD_OPC_FilterValue, 3, 236, 110, // Skip to: 29517 /* 1121 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 1124 */ MCD_OPC_FilterValue, 0, 165, 2, // Skip to: 1805 /* 1128 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 1131 */ MCD_OPC_FilterValue, 0, 47, 1, // Skip to: 1438 /* 1135 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ... /* 1138 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1150 /* 1142 */ MCD_OPC_CheckPredicate, 0, 71, 154, // Skip to: 40641 /* 1146 */ MCD_OPC_Decode, 173, 14, 4, // Opcode: ST4Fourv8b /* 1150 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1162 /* 1154 */ MCD_OPC_CheckPredicate, 0, 59, 154, // Skip to: 40641 /* 1158 */ MCD_OPC_Decode, 169, 14, 4, // Opcode: ST4Fourv4h /* 1162 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1174 /* 1166 */ MCD_OPC_CheckPredicate, 0, 47, 154, // Skip to: 40641 /* 1170 */ MCD_OPC_Decode, 167, 14, 4, // Opcode: ST4Fourv2s /* 1174 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1186 /* 1178 */ MCD_OPC_CheckPredicate, 0, 35, 154, // Skip to: 40641 /* 1182 */ MCD_OPC_Decode, 187, 13, 4, // Opcode: ST1Fourv8b /* 1186 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1198 /* 1190 */ MCD_OPC_CheckPredicate, 0, 23, 154, // Skip to: 40641 /* 1194 */ MCD_OPC_Decode, 183, 13, 4, // Opcode: ST1Fourv4h /* 1198 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1210 /* 1202 */ MCD_OPC_CheckPredicate, 0, 11, 154, // Skip to: 40641 /* 1206 */ MCD_OPC_Decode, 181, 13, 4, // Opcode: ST1Fourv2s /* 1210 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1222 /* 1214 */ MCD_OPC_CheckPredicate, 0, 255, 153, // Skip to: 40641 /* 1218 */ MCD_OPC_Decode, 177, 13, 4, // Opcode: ST1Fourv1d /* 1222 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1234 /* 1226 */ MCD_OPC_CheckPredicate, 0, 243, 153, // Skip to: 40641 /* 1230 */ MCD_OPC_Decode, 151, 14, 5, // Opcode: ST3Threev8b /* 1234 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1246 /* 1238 */ MCD_OPC_CheckPredicate, 0, 231, 153, // Skip to: 40641 /* 1242 */ MCD_OPC_Decode, 147, 14, 5, // Opcode: ST3Threev4h /* 1246 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1258 /* 1250 */ MCD_OPC_CheckPredicate, 0, 219, 153, // Skip to: 40641 /* 1254 */ MCD_OPC_Decode, 145, 14, 5, // Opcode: ST3Threev2s /* 1258 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1270 /* 1262 */ MCD_OPC_CheckPredicate, 0, 207, 153, // Skip to: 40641 /* 1266 */ MCD_OPC_Decode, 219, 13, 5, // Opcode: ST1Threev8b /* 1270 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 1282 /* 1274 */ MCD_OPC_CheckPredicate, 0, 195, 153, // Skip to: 40641 /* 1278 */ MCD_OPC_Decode, 215, 13, 5, // Opcode: ST1Threev4h /* 1282 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 1294 /* 1286 */ MCD_OPC_CheckPredicate, 0, 183, 153, // Skip to: 40641 /* 1290 */ MCD_OPC_Decode, 213, 13, 5, // Opcode: ST1Threev2s /* 1294 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 1306 /* 1298 */ MCD_OPC_CheckPredicate, 0, 171, 153, // Skip to: 40641 /* 1302 */ MCD_OPC_Decode, 209, 13, 5, // Opcode: ST1Threev1d /* 1306 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1318 /* 1310 */ MCD_OPC_CheckPredicate, 0, 159, 153, // Skip to: 40641 /* 1314 */ MCD_OPC_Decode, 203, 13, 6, // Opcode: ST1Onev8b /* 1318 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 1330 /* 1322 */ MCD_OPC_CheckPredicate, 0, 147, 153, // Skip to: 40641 /* 1326 */ MCD_OPC_Decode, 199, 13, 6, // Opcode: ST1Onev4h /* 1330 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 1342 /* 1334 */ MCD_OPC_CheckPredicate, 0, 135, 153, // Skip to: 40641 /* 1338 */ MCD_OPC_Decode, 197, 13, 6, // Opcode: ST1Onev2s /* 1342 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 1354 /* 1346 */ MCD_OPC_CheckPredicate, 0, 123, 153, // Skip to: 40641 /* 1350 */ MCD_OPC_Decode, 193, 13, 6, // Opcode: ST1Onev1d /* 1354 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 1366 /* 1358 */ MCD_OPC_CheckPredicate, 0, 111, 153, // Skip to: 40641 /* 1362 */ MCD_OPC_Decode, 129, 14, 7, // Opcode: ST2Twov8b /* 1366 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 1378 /* 1370 */ MCD_OPC_CheckPredicate, 0, 99, 153, // Skip to: 40641 /* 1374 */ MCD_OPC_Decode, 253, 13, 7, // Opcode: ST2Twov4h /* 1378 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 1390 /* 1382 */ MCD_OPC_CheckPredicate, 0, 87, 153, // Skip to: 40641 /* 1386 */ MCD_OPC_Decode, 251, 13, 7, // Opcode: ST2Twov2s /* 1390 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 1402 /* 1394 */ MCD_OPC_CheckPredicate, 0, 75, 153, // Skip to: 40641 /* 1398 */ MCD_OPC_Decode, 235, 13, 7, // Opcode: ST1Twov8b /* 1402 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 1414 /* 1406 */ MCD_OPC_CheckPredicate, 0, 63, 153, // Skip to: 40641 /* 1410 */ MCD_OPC_Decode, 231, 13, 7, // Opcode: ST1Twov4h /* 1414 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 1426 /* 1418 */ MCD_OPC_CheckPredicate, 0, 51, 153, // Skip to: 40641 /* 1422 */ MCD_OPC_Decode, 229, 13, 7, // Opcode: ST1Twov2s /* 1426 */ MCD_OPC_FilterValue, 43, 43, 153, // Skip to: 40641 /* 1430 */ MCD_OPC_CheckPredicate, 0, 39, 153, // Skip to: 40641 /* 1434 */ MCD_OPC_Decode, 225, 13, 7, // Opcode: ST1Twov1d /* 1438 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1446 /* 1442 */ MCD_OPC_Decode, 197, 14, 3, // Opcode: STNPSi /* 1446 */ MCD_OPC_FilterValue, 2, 83, 1, // Skip to: 1789 /* 1450 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ... /* 1453 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1465 /* 1457 */ MCD_OPC_CheckPredicate, 0, 12, 153, // Skip to: 40641 /* 1461 */ MCD_OPC_Decode, 163, 14, 8, // Opcode: ST4Fourv16b /* 1465 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1477 /* 1469 */ MCD_OPC_CheckPredicate, 0, 0, 153, // Skip to: 40641 /* 1473 */ MCD_OPC_Decode, 175, 14, 8, // Opcode: ST4Fourv8h /* 1477 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1489 /* 1481 */ MCD_OPC_CheckPredicate, 0, 244, 152, // Skip to: 40641 /* 1485 */ MCD_OPC_Decode, 171, 14, 8, // Opcode: ST4Fourv4s /* 1489 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1501 /* 1493 */ MCD_OPC_CheckPredicate, 0, 232, 152, // Skip to: 40641 /* 1497 */ MCD_OPC_Decode, 165, 14, 8, // Opcode: ST4Fourv2d /* 1501 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1513 /* 1505 */ MCD_OPC_CheckPredicate, 0, 220, 152, // Skip to: 40641 /* 1509 */ MCD_OPC_Decode, 175, 13, 8, // Opcode: ST1Fourv16b /* 1513 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1525 /* 1517 */ MCD_OPC_CheckPredicate, 0, 208, 152, // Skip to: 40641 /* 1521 */ MCD_OPC_Decode, 189, 13, 8, // Opcode: ST1Fourv8h /* 1525 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1537 /* 1529 */ MCD_OPC_CheckPredicate, 0, 196, 152, // Skip to: 40641 /* 1533 */ MCD_OPC_Decode, 185, 13, 8, // Opcode: ST1Fourv4s /* 1537 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1549 /* 1541 */ MCD_OPC_CheckPredicate, 0, 184, 152, // Skip to: 40641 /* 1545 */ MCD_OPC_Decode, 179, 13, 8, // Opcode: ST1Fourv2d /* 1549 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1561 /* 1553 */ MCD_OPC_CheckPredicate, 0, 172, 152, // Skip to: 40641 /* 1557 */ MCD_OPC_Decode, 141, 14, 9, // Opcode: ST3Threev16b /* 1561 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1573 /* 1565 */ MCD_OPC_CheckPredicate, 0, 160, 152, // Skip to: 40641 /* 1569 */ MCD_OPC_Decode, 153, 14, 9, // Opcode: ST3Threev8h /* 1573 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1585 /* 1577 */ MCD_OPC_CheckPredicate, 0, 148, 152, // Skip to: 40641 /* 1581 */ MCD_OPC_Decode, 149, 14, 9, // Opcode: ST3Threev4s /* 1585 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 1597 /* 1589 */ MCD_OPC_CheckPredicate, 0, 136, 152, // Skip to: 40641 /* 1593 */ MCD_OPC_Decode, 143, 14, 9, // Opcode: ST3Threev2d /* 1597 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1609 /* 1601 */ MCD_OPC_CheckPredicate, 0, 124, 152, // Skip to: 40641 /* 1605 */ MCD_OPC_Decode, 207, 13, 9, // Opcode: ST1Threev16b /* 1609 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 1621 /* 1613 */ MCD_OPC_CheckPredicate, 0, 112, 152, // Skip to: 40641 /* 1617 */ MCD_OPC_Decode, 221, 13, 9, // Opcode: ST1Threev8h /* 1621 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 1633 /* 1625 */ MCD_OPC_CheckPredicate, 0, 100, 152, // Skip to: 40641 /* 1629 */ MCD_OPC_Decode, 217, 13, 9, // Opcode: ST1Threev4s /* 1633 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 1645 /* 1637 */ MCD_OPC_CheckPredicate, 0, 88, 152, // Skip to: 40641 /* 1641 */ MCD_OPC_Decode, 211, 13, 9, // Opcode: ST1Threev2d /* 1645 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1657 /* 1649 */ MCD_OPC_CheckPredicate, 0, 76, 152, // Skip to: 40641 /* 1653 */ MCD_OPC_Decode, 191, 13, 10, // Opcode: ST1Onev16b /* 1657 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 1669 /* 1661 */ MCD_OPC_CheckPredicate, 0, 64, 152, // Skip to: 40641 /* 1665 */ MCD_OPC_Decode, 205, 13, 10, // Opcode: ST1Onev8h /* 1669 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 1681 /* 1673 */ MCD_OPC_CheckPredicate, 0, 52, 152, // Skip to: 40641 /* 1677 */ MCD_OPC_Decode, 201, 13, 10, // Opcode: ST1Onev4s /* 1681 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 1693 /* 1685 */ MCD_OPC_CheckPredicate, 0, 40, 152, // Skip to: 40641 /* 1689 */ MCD_OPC_Decode, 195, 13, 10, // Opcode: ST1Onev2d /* 1693 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 1705 /* 1697 */ MCD_OPC_CheckPredicate, 0, 28, 152, // Skip to: 40641 /* 1701 */ MCD_OPC_Decode, 247, 13, 11, // Opcode: ST2Twov16b /* 1705 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 1717 /* 1709 */ MCD_OPC_CheckPredicate, 0, 16, 152, // Skip to: 40641 /* 1713 */ MCD_OPC_Decode, 131, 14, 11, // Opcode: ST2Twov8h /* 1717 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 1729 /* 1721 */ MCD_OPC_CheckPredicate, 0, 4, 152, // Skip to: 40641 /* 1725 */ MCD_OPC_Decode, 255, 13, 11, // Opcode: ST2Twov4s /* 1729 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 1741 /* 1733 */ MCD_OPC_CheckPredicate, 0, 248, 151, // Skip to: 40641 /* 1737 */ MCD_OPC_Decode, 249, 13, 11, // Opcode: ST2Twov2d /* 1741 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 1753 /* 1745 */ MCD_OPC_CheckPredicate, 0, 236, 151, // Skip to: 40641 /* 1749 */ MCD_OPC_Decode, 223, 13, 11, // Opcode: ST1Twov16b /* 1753 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 1765 /* 1757 */ MCD_OPC_CheckPredicate, 0, 224, 151, // Skip to: 40641 /* 1761 */ MCD_OPC_Decode, 237, 13, 11, // Opcode: ST1Twov8h /* 1765 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 1777 /* 1769 */ MCD_OPC_CheckPredicate, 0, 212, 151, // Skip to: 40641 /* 1773 */ MCD_OPC_Decode, 233, 13, 11, // Opcode: ST1Twov4s /* 1777 */ MCD_OPC_FilterValue, 43, 204, 151, // Skip to: 40641 /* 1781 */ MCD_OPC_CheckPredicate, 0, 200, 151, // Skip to: 40641 /* 1785 */ MCD_OPC_Decode, 227, 13, 11, // Opcode: ST1Twov2d /* 1789 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 1797 /* 1793 */ MCD_OPC_Decode, 195, 14, 3, // Opcode: STNPDi /* 1797 */ MCD_OPC_FilterValue, 5, 184, 151, // Skip to: 40641 /* 1801 */ MCD_OPC_Decode, 196, 14, 3, // Opcode: STNPQi /* 1805 */ MCD_OPC_FilterValue, 1, 165, 2, // Skip to: 2486 /* 1809 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 1812 */ MCD_OPC_FilterValue, 0, 47, 1, // Skip to: 2119 /* 1816 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ... /* 1819 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1831 /* 1823 */ MCD_OPC_CheckPredicate, 0, 158, 151, // Skip to: 40641 /* 1827 */ MCD_OPC_Decode, 137, 7, 4, // Opcode: LD4Fourv8b /* 1831 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1843 /* 1835 */ MCD_OPC_CheckPredicate, 0, 146, 151, // Skip to: 40641 /* 1839 */ MCD_OPC_Decode, 133, 7, 4, // Opcode: LD4Fourv4h /* 1843 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1855 /* 1847 */ MCD_OPC_CheckPredicate, 0, 134, 151, // Skip to: 40641 /* 1851 */ MCD_OPC_Decode, 131, 7, 4, // Opcode: LD4Fourv2s /* 1855 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1867 /* 1859 */ MCD_OPC_CheckPredicate, 0, 122, 151, // Skip to: 40641 /* 1863 */ MCD_OPC_Decode, 231, 5, 4, // Opcode: LD1Fourv8b /* 1867 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1879 /* 1871 */ MCD_OPC_CheckPredicate, 0, 110, 151, // Skip to: 40641 /* 1875 */ MCD_OPC_Decode, 227, 5, 4, // Opcode: LD1Fourv4h /* 1879 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1891 /* 1883 */ MCD_OPC_CheckPredicate, 0, 98, 151, // Skip to: 40641 /* 1887 */ MCD_OPC_Decode, 225, 5, 4, // Opcode: LD1Fourv2s /* 1891 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1903 /* 1895 */ MCD_OPC_CheckPredicate, 0, 86, 151, // Skip to: 40641 /* 1899 */ MCD_OPC_Decode, 221, 5, 4, // Opcode: LD1Fourv1d /* 1903 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1915 /* 1907 */ MCD_OPC_CheckPredicate, 0, 74, 151, // Skip to: 40641 /* 1911 */ MCD_OPC_Decode, 243, 6, 5, // Opcode: LD3Threev8b /* 1915 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1927 /* 1919 */ MCD_OPC_CheckPredicate, 0, 62, 151, // Skip to: 40641 /* 1923 */ MCD_OPC_Decode, 239, 6, 5, // Opcode: LD3Threev4h /* 1927 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1939 /* 1931 */ MCD_OPC_CheckPredicate, 0, 50, 151, // Skip to: 40641 /* 1935 */ MCD_OPC_Decode, 237, 6, 5, // Opcode: LD3Threev2s /* 1939 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1951 /* 1943 */ MCD_OPC_CheckPredicate, 0, 38, 151, // Skip to: 40641 /* 1947 */ MCD_OPC_Decode, 151, 6, 5, // Opcode: LD1Threev8b /* 1951 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 1963 /* 1955 */ MCD_OPC_CheckPredicate, 0, 26, 151, // Skip to: 40641 /* 1959 */ MCD_OPC_Decode, 147, 6, 5, // Opcode: LD1Threev4h /* 1963 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 1975 /* 1967 */ MCD_OPC_CheckPredicate, 0, 14, 151, // Skip to: 40641 /* 1971 */ MCD_OPC_Decode, 145, 6, 5, // Opcode: LD1Threev2s /* 1975 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 1987 /* 1979 */ MCD_OPC_CheckPredicate, 0, 2, 151, // Skip to: 40641 /* 1983 */ MCD_OPC_Decode, 141, 6, 5, // Opcode: LD1Threev1d /* 1987 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1999 /* 1991 */ MCD_OPC_CheckPredicate, 0, 246, 150, // Skip to: 40641 /* 1995 */ MCD_OPC_Decode, 247, 5, 6, // Opcode: LD1Onev8b /* 1999 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 2011 /* 2003 */ MCD_OPC_CheckPredicate, 0, 234, 150, // Skip to: 40641 /* 2007 */ MCD_OPC_Decode, 243, 5, 6, // Opcode: LD1Onev4h /* 2011 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 2023 /* 2015 */ MCD_OPC_CheckPredicate, 0, 222, 150, // Skip to: 40641 /* 2019 */ MCD_OPC_Decode, 241, 5, 6, // Opcode: LD1Onev2s /* 2023 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 2035 /* 2027 */ MCD_OPC_CheckPredicate, 0, 210, 150, // Skip to: 40641 /* 2031 */ MCD_OPC_Decode, 237, 5, 6, // Opcode: LD1Onev1d /* 2035 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 2047 /* 2039 */ MCD_OPC_CheckPredicate, 0, 198, 150, // Skip to: 40641 /* 2043 */ MCD_OPC_Decode, 205, 6, 7, // Opcode: LD2Twov8b /* 2047 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 2059 /* 2051 */ MCD_OPC_CheckPredicate, 0, 186, 150, // Skip to: 40641 /* 2055 */ MCD_OPC_Decode, 201, 6, 7, // Opcode: LD2Twov4h /* 2059 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 2071 /* 2063 */ MCD_OPC_CheckPredicate, 0, 174, 150, // Skip to: 40641 /* 2067 */ MCD_OPC_Decode, 199, 6, 7, // Opcode: LD2Twov2s /* 2071 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 2083 /* 2075 */ MCD_OPC_CheckPredicate, 0, 162, 150, // Skip to: 40641 /* 2079 */ MCD_OPC_Decode, 167, 6, 7, // Opcode: LD1Twov8b /* 2083 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 2095 /* 2087 */ MCD_OPC_CheckPredicate, 0, 150, 150, // Skip to: 40641 /* 2091 */ MCD_OPC_Decode, 163, 6, 7, // Opcode: LD1Twov4h /* 2095 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 2107 /* 2099 */ MCD_OPC_CheckPredicate, 0, 138, 150, // Skip to: 40641 /* 2103 */ MCD_OPC_Decode, 161, 6, 7, // Opcode: LD1Twov2s /* 2107 */ MCD_OPC_FilterValue, 43, 130, 150, // Skip to: 40641 /* 2111 */ MCD_OPC_CheckPredicate, 0, 126, 150, // Skip to: 40641 /* 2115 */ MCD_OPC_Decode, 157, 6, 7, // Opcode: LD1Twov1d /* 2119 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2127 /* 2123 */ MCD_OPC_Decode, 177, 7, 3, // Opcode: LDNPSi /* 2127 */ MCD_OPC_FilterValue, 2, 83, 1, // Skip to: 2470 /* 2131 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ... /* 2134 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2146 /* 2138 */ MCD_OPC_CheckPredicate, 0, 99, 150, // Skip to: 40641 /* 2142 */ MCD_OPC_Decode, 255, 6, 8, // Opcode: LD4Fourv16b /* 2146 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 2158 /* 2150 */ MCD_OPC_CheckPredicate, 0, 87, 150, // Skip to: 40641 /* 2154 */ MCD_OPC_Decode, 139, 7, 8, // Opcode: LD4Fourv8h /* 2158 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 2170 /* 2162 */ MCD_OPC_CheckPredicate, 0, 75, 150, // Skip to: 40641 /* 2166 */ MCD_OPC_Decode, 135, 7, 8, // Opcode: LD4Fourv4s /* 2170 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2182 /* 2174 */ MCD_OPC_CheckPredicate, 0, 63, 150, // Skip to: 40641 /* 2178 */ MCD_OPC_Decode, 129, 7, 8, // Opcode: LD4Fourv2d /* 2182 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 2194 /* 2186 */ MCD_OPC_CheckPredicate, 0, 51, 150, // Skip to: 40641 /* 2190 */ MCD_OPC_Decode, 219, 5, 8, // Opcode: LD1Fourv16b /* 2194 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 2206 /* 2198 */ MCD_OPC_CheckPredicate, 0, 39, 150, // Skip to: 40641 /* 2202 */ MCD_OPC_Decode, 233, 5, 8, // Opcode: LD1Fourv8h /* 2206 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 2218 /* 2210 */ MCD_OPC_CheckPredicate, 0, 27, 150, // Skip to: 40641 /* 2214 */ MCD_OPC_Decode, 229, 5, 8, // Opcode: LD1Fourv4s /* 2218 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 2230 /* 2222 */ MCD_OPC_CheckPredicate, 0, 15, 150, // Skip to: 40641 /* 2226 */ MCD_OPC_Decode, 223, 5, 8, // Opcode: LD1Fourv2d /* 2230 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 2242 /* 2234 */ MCD_OPC_CheckPredicate, 0, 3, 150, // Skip to: 40641 /* 2238 */ MCD_OPC_Decode, 233, 6, 9, // Opcode: LD3Threev16b /* 2242 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 2254 /* 2246 */ MCD_OPC_CheckPredicate, 0, 247, 149, // Skip to: 40641 /* 2250 */ MCD_OPC_Decode, 245, 6, 9, // Opcode: LD3Threev8h /* 2254 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 2266 /* 2258 */ MCD_OPC_CheckPredicate, 0, 235, 149, // Skip to: 40641 /* 2262 */ MCD_OPC_Decode, 241, 6, 9, // Opcode: LD3Threev4s /* 2266 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 2278 /* 2270 */ MCD_OPC_CheckPredicate, 0, 223, 149, // Skip to: 40641 /* 2274 */ MCD_OPC_Decode, 235, 6, 9, // Opcode: LD3Threev2d /* 2278 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 2290 /* 2282 */ MCD_OPC_CheckPredicate, 0, 211, 149, // Skip to: 40641 /* 2286 */ MCD_OPC_Decode, 139, 6, 9, // Opcode: LD1Threev16b /* 2290 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 2302 /* 2294 */ MCD_OPC_CheckPredicate, 0, 199, 149, // Skip to: 40641 /* 2298 */ MCD_OPC_Decode, 153, 6, 9, // Opcode: LD1Threev8h /* 2302 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 2314 /* 2306 */ MCD_OPC_CheckPredicate, 0, 187, 149, // Skip to: 40641 /* 2310 */ MCD_OPC_Decode, 149, 6, 9, // Opcode: LD1Threev4s /* 2314 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 2326 /* 2318 */ MCD_OPC_CheckPredicate, 0, 175, 149, // Skip to: 40641 /* 2322 */ MCD_OPC_Decode, 143, 6, 9, // Opcode: LD1Threev2d /* 2326 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 2338 /* 2330 */ MCD_OPC_CheckPredicate, 0, 163, 149, // Skip to: 40641 /* 2334 */ MCD_OPC_Decode, 235, 5, 10, // Opcode: LD1Onev16b /* 2338 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 2350 /* 2342 */ MCD_OPC_CheckPredicate, 0, 151, 149, // Skip to: 40641 /* 2346 */ MCD_OPC_Decode, 249, 5, 10, // Opcode: LD1Onev8h /* 2350 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 2362 /* 2354 */ MCD_OPC_CheckPredicate, 0, 139, 149, // Skip to: 40641 /* 2358 */ MCD_OPC_Decode, 245, 5, 10, // Opcode: LD1Onev4s /* 2362 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 2374 /* 2366 */ MCD_OPC_CheckPredicate, 0, 127, 149, // Skip to: 40641 /* 2370 */ MCD_OPC_Decode, 239, 5, 10, // Opcode: LD1Onev2d /* 2374 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 2386 /* 2378 */ MCD_OPC_CheckPredicate, 0, 115, 149, // Skip to: 40641 /* 2382 */ MCD_OPC_Decode, 195, 6, 11, // Opcode: LD2Twov16b /* 2386 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 2398 /* 2390 */ MCD_OPC_CheckPredicate, 0, 103, 149, // Skip to: 40641 /* 2394 */ MCD_OPC_Decode, 207, 6, 11, // Opcode: LD2Twov8h /* 2398 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 2410 /* 2402 */ MCD_OPC_CheckPredicate, 0, 91, 149, // Skip to: 40641 /* 2406 */ MCD_OPC_Decode, 203, 6, 11, // Opcode: LD2Twov4s /* 2410 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 2422 /* 2414 */ MCD_OPC_CheckPredicate, 0, 79, 149, // Skip to: 40641 /* 2418 */ MCD_OPC_Decode, 197, 6, 11, // Opcode: LD2Twov2d /* 2422 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 2434 /* 2426 */ MCD_OPC_CheckPredicate, 0, 67, 149, // Skip to: 40641 /* 2430 */ MCD_OPC_Decode, 155, 6, 11, // Opcode: LD1Twov16b /* 2434 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 2446 /* 2438 */ MCD_OPC_CheckPredicate, 0, 55, 149, // Skip to: 40641 /* 2442 */ MCD_OPC_Decode, 169, 6, 11, // Opcode: LD1Twov8h /* 2446 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 2458 /* 2450 */ MCD_OPC_CheckPredicate, 0, 43, 149, // Skip to: 40641 /* 2454 */ MCD_OPC_Decode, 165, 6, 11, // Opcode: LD1Twov4s /* 2458 */ MCD_OPC_FilterValue, 43, 35, 149, // Skip to: 40641 /* 2462 */ MCD_OPC_CheckPredicate, 0, 31, 149, // Skip to: 40641 /* 2466 */ MCD_OPC_Decode, 159, 6, 11, // Opcode: LD1Twov2d /* 2470 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 2478 /* 2474 */ MCD_OPC_Decode, 175, 7, 3, // Opcode: LDNPDi /* 2478 */ MCD_OPC_FilterValue, 5, 15, 149, // Skip to: 40641 /* 2482 */ MCD_OPC_Decode, 176, 7, 3, // Opcode: LDNPQi /* 2486 */ MCD_OPC_FilterValue, 2, 227, 3, // Skip to: 3485 /* 2490 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 2493 */ MCD_OPC_FilterValue, 0, 197, 1, // Skip to: 2950 /* 2497 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 2500 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2518 /* 2504 */ MCD_OPC_CheckPredicate, 0, 245, 148, // Skip to: 40641 /* 2508 */ MCD_OPC_CheckField, 21, 1, 0, 239, 148, // Skip to: 40641 /* 2514 */ MCD_OPC_Decode, 174, 14, 12, // Opcode: ST4Fourv8b_POST /* 2518 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 2536 /* 2522 */ MCD_OPC_CheckPredicate, 0, 227, 148, // Skip to: 40641 /* 2526 */ MCD_OPC_CheckField, 21, 1, 0, 221, 148, // Skip to: 40641 /* 2532 */ MCD_OPC_Decode, 170, 14, 12, // Opcode: ST4Fourv4h_POST /* 2536 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 2554 /* 2540 */ MCD_OPC_CheckPredicate, 0, 209, 148, // Skip to: 40641 /* 2544 */ MCD_OPC_CheckField, 21, 1, 0, 203, 148, // Skip to: 40641 /* 2550 */ MCD_OPC_Decode, 168, 14, 12, // Opcode: ST4Fourv2s_POST /* 2554 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 2572 /* 2558 */ MCD_OPC_CheckPredicate, 0, 191, 148, // Skip to: 40641 /* 2562 */ MCD_OPC_CheckField, 21, 1, 0, 185, 148, // Skip to: 40641 /* 2568 */ MCD_OPC_Decode, 188, 13, 12, // Opcode: ST1Fourv8b_POST /* 2572 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 2590 /* 2576 */ MCD_OPC_CheckPredicate, 0, 173, 148, // Skip to: 40641 /* 2580 */ MCD_OPC_CheckField, 21, 1, 0, 167, 148, // Skip to: 40641 /* 2586 */ MCD_OPC_Decode, 184, 13, 12, // Opcode: ST1Fourv4h_POST /* 2590 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 2608 /* 2594 */ MCD_OPC_CheckPredicate, 0, 155, 148, // Skip to: 40641 /* 2598 */ MCD_OPC_CheckField, 21, 1, 0, 149, 148, // Skip to: 40641 /* 2604 */ MCD_OPC_Decode, 182, 13, 12, // Opcode: ST1Fourv2s_POST /* 2608 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 2626 /* 2612 */ MCD_OPC_CheckPredicate, 0, 137, 148, // Skip to: 40641 /* 2616 */ MCD_OPC_CheckField, 21, 1, 0, 131, 148, // Skip to: 40641 /* 2622 */ MCD_OPC_Decode, 178, 13, 12, // Opcode: ST1Fourv1d_POST /* 2626 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 2644 /* 2630 */ MCD_OPC_CheckPredicate, 0, 119, 148, // Skip to: 40641 /* 2634 */ MCD_OPC_CheckField, 21, 1, 0, 113, 148, // Skip to: 40641 /* 2640 */ MCD_OPC_Decode, 152, 14, 13, // Opcode: ST3Threev8b_POST /* 2644 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 2662 /* 2648 */ MCD_OPC_CheckPredicate, 0, 101, 148, // Skip to: 40641 /* 2652 */ MCD_OPC_CheckField, 21, 1, 0, 95, 148, // Skip to: 40641 /* 2658 */ MCD_OPC_Decode, 148, 14, 13, // Opcode: ST3Threev4h_POST /* 2662 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 2680 /* 2666 */ MCD_OPC_CheckPredicate, 0, 83, 148, // Skip to: 40641 /* 2670 */ MCD_OPC_CheckField, 21, 1, 0, 77, 148, // Skip to: 40641 /* 2676 */ MCD_OPC_Decode, 146, 14, 13, // Opcode: ST3Threev2s_POST /* 2680 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 2698 /* 2684 */ MCD_OPC_CheckPredicate, 0, 65, 148, // Skip to: 40641 /* 2688 */ MCD_OPC_CheckField, 21, 1, 0, 59, 148, // Skip to: 40641 /* 2694 */ MCD_OPC_Decode, 220, 13, 13, // Opcode: ST1Threev8b_POST /* 2698 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 2716 /* 2702 */ MCD_OPC_CheckPredicate, 0, 47, 148, // Skip to: 40641 /* 2706 */ MCD_OPC_CheckField, 21, 1, 0, 41, 148, // Skip to: 40641 /* 2712 */ MCD_OPC_Decode, 216, 13, 13, // Opcode: ST1Threev4h_POST /* 2716 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 2734 /* 2720 */ MCD_OPC_CheckPredicate, 0, 29, 148, // Skip to: 40641 /* 2724 */ MCD_OPC_CheckField, 21, 1, 0, 23, 148, // Skip to: 40641 /* 2730 */ MCD_OPC_Decode, 214, 13, 13, // Opcode: ST1Threev2s_POST /* 2734 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 2752 /* 2738 */ MCD_OPC_CheckPredicate, 0, 11, 148, // Skip to: 40641 /* 2742 */ MCD_OPC_CheckField, 21, 1, 0, 5, 148, // Skip to: 40641 /* 2748 */ MCD_OPC_Decode, 210, 13, 13, // Opcode: ST1Threev1d_POST /* 2752 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 2770 /* 2756 */ MCD_OPC_CheckPredicate, 0, 249, 147, // Skip to: 40641 /* 2760 */ MCD_OPC_CheckField, 21, 1, 0, 243, 147, // Skip to: 40641 /* 2766 */ MCD_OPC_Decode, 204, 13, 14, // Opcode: ST1Onev8b_POST /* 2770 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 2788 /* 2774 */ MCD_OPC_CheckPredicate, 0, 231, 147, // Skip to: 40641 /* 2778 */ MCD_OPC_CheckField, 21, 1, 0, 225, 147, // Skip to: 40641 /* 2784 */ MCD_OPC_Decode, 200, 13, 14, // Opcode: ST1Onev4h_POST /* 2788 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 2806 /* 2792 */ MCD_OPC_CheckPredicate, 0, 213, 147, // Skip to: 40641 /* 2796 */ MCD_OPC_CheckField, 21, 1, 0, 207, 147, // Skip to: 40641 /* 2802 */ MCD_OPC_Decode, 198, 13, 14, // Opcode: ST1Onev2s_POST /* 2806 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 2824 /* 2810 */ MCD_OPC_CheckPredicate, 0, 195, 147, // Skip to: 40641 /* 2814 */ MCD_OPC_CheckField, 21, 1, 0, 189, 147, // Skip to: 40641 /* 2820 */ MCD_OPC_Decode, 194, 13, 14, // Opcode: ST1Onev1d_POST /* 2824 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 2842 /* 2828 */ MCD_OPC_CheckPredicate, 0, 177, 147, // Skip to: 40641 /* 2832 */ MCD_OPC_CheckField, 21, 1, 0, 171, 147, // Skip to: 40641 /* 2838 */ MCD_OPC_Decode, 130, 14, 15, // Opcode: ST2Twov8b_POST /* 2842 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 2860 /* 2846 */ MCD_OPC_CheckPredicate, 0, 159, 147, // Skip to: 40641 /* 2850 */ MCD_OPC_CheckField, 21, 1, 0, 153, 147, // Skip to: 40641 /* 2856 */ MCD_OPC_Decode, 254, 13, 15, // Opcode: ST2Twov4h_POST /* 2860 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 2878 /* 2864 */ MCD_OPC_CheckPredicate, 0, 141, 147, // Skip to: 40641 /* 2868 */ MCD_OPC_CheckField, 21, 1, 0, 135, 147, // Skip to: 40641 /* 2874 */ MCD_OPC_Decode, 252, 13, 15, // Opcode: ST2Twov2s_POST /* 2878 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 2896 /* 2882 */ MCD_OPC_CheckPredicate, 0, 123, 147, // Skip to: 40641 /* 2886 */ MCD_OPC_CheckField, 21, 1, 0, 117, 147, // Skip to: 40641 /* 2892 */ MCD_OPC_Decode, 236, 13, 15, // Opcode: ST1Twov8b_POST /* 2896 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 2914 /* 2900 */ MCD_OPC_CheckPredicate, 0, 105, 147, // Skip to: 40641 /* 2904 */ MCD_OPC_CheckField, 21, 1, 0, 99, 147, // Skip to: 40641 /* 2910 */ MCD_OPC_Decode, 232, 13, 15, // Opcode: ST1Twov4h_POST /* 2914 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 2932 /* 2918 */ MCD_OPC_CheckPredicate, 0, 87, 147, // Skip to: 40641 /* 2922 */ MCD_OPC_CheckField, 21, 1, 0, 81, 147, // Skip to: 40641 /* 2928 */ MCD_OPC_Decode, 230, 13, 15, // Opcode: ST1Twov2s_POST /* 2932 */ MCD_OPC_FilterValue, 43, 73, 147, // Skip to: 40641 /* 2936 */ MCD_OPC_CheckPredicate, 0, 69, 147, // Skip to: 40641 /* 2940 */ MCD_OPC_CheckField, 21, 1, 0, 63, 147, // Skip to: 40641 /* 2946 */ MCD_OPC_Decode, 226, 13, 15, // Opcode: ST1Twov1d_POST /* 2950 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2958 /* 2954 */ MCD_OPC_Decode, 207, 14, 3, // Opcode: STPSpost /* 2958 */ MCD_OPC_FilterValue, 2, 251, 1, // Skip to: 3469 /* 2962 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 2965 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2983 /* 2969 */ MCD_OPC_CheckPredicate, 0, 36, 147, // Skip to: 40641 /* 2973 */ MCD_OPC_CheckField, 21, 1, 0, 30, 147, // Skip to: 40641 /* 2979 */ MCD_OPC_Decode, 164, 14, 16, // Opcode: ST4Fourv16b_POST /* 2983 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 3001 /* 2987 */ MCD_OPC_CheckPredicate, 0, 18, 147, // Skip to: 40641 /* 2991 */ MCD_OPC_CheckField, 21, 1, 0, 12, 147, // Skip to: 40641 /* 2997 */ MCD_OPC_Decode, 176, 14, 16, // Opcode: ST4Fourv8h_POST /* 3001 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 3019 /* 3005 */ MCD_OPC_CheckPredicate, 0, 0, 147, // Skip to: 40641 /* 3009 */ MCD_OPC_CheckField, 21, 1, 0, 250, 146, // Skip to: 40641 /* 3015 */ MCD_OPC_Decode, 172, 14, 16, // Opcode: ST4Fourv4s_POST /* 3019 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 3037 /* 3023 */ MCD_OPC_CheckPredicate, 0, 238, 146, // Skip to: 40641 /* 3027 */ MCD_OPC_CheckField, 21, 1, 0, 232, 146, // Skip to: 40641 /* 3033 */ MCD_OPC_Decode, 166, 14, 16, // Opcode: ST4Fourv2d_POST /* 3037 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 3055 /* 3041 */ MCD_OPC_CheckPredicate, 0, 220, 146, // Skip to: 40641 /* 3045 */ MCD_OPC_CheckField, 21, 1, 0, 214, 146, // Skip to: 40641 /* 3051 */ MCD_OPC_Decode, 176, 13, 16, // Opcode: ST1Fourv16b_POST /* 3055 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 3073 /* 3059 */ MCD_OPC_CheckPredicate, 0, 202, 146, // Skip to: 40641 /* 3063 */ MCD_OPC_CheckField, 21, 1, 0, 196, 146, // Skip to: 40641 /* 3069 */ MCD_OPC_Decode, 190, 13, 16, // Opcode: ST1Fourv8h_POST /* 3073 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 3091 /* 3077 */ MCD_OPC_CheckPredicate, 0, 184, 146, // Skip to: 40641 /* 3081 */ MCD_OPC_CheckField, 21, 1, 0, 178, 146, // Skip to: 40641 /* 3087 */ MCD_OPC_Decode, 186, 13, 16, // Opcode: ST1Fourv4s_POST /* 3091 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 3109 /* 3095 */ MCD_OPC_CheckPredicate, 0, 166, 146, // Skip to: 40641 /* 3099 */ MCD_OPC_CheckField, 21, 1, 0, 160, 146, // Skip to: 40641 /* 3105 */ MCD_OPC_Decode, 180, 13, 16, // Opcode: ST1Fourv2d_POST /* 3109 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 3127 /* 3113 */ MCD_OPC_CheckPredicate, 0, 148, 146, // Skip to: 40641 /* 3117 */ MCD_OPC_CheckField, 21, 1, 0, 142, 146, // Skip to: 40641 /* 3123 */ MCD_OPC_Decode, 142, 14, 17, // Opcode: ST3Threev16b_POST /* 3127 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 3145 /* 3131 */ MCD_OPC_CheckPredicate, 0, 130, 146, // Skip to: 40641 /* 3135 */ MCD_OPC_CheckField, 21, 1, 0, 124, 146, // Skip to: 40641 /* 3141 */ MCD_OPC_Decode, 154, 14, 17, // Opcode: ST3Threev8h_POST /* 3145 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 3163 /* 3149 */ MCD_OPC_CheckPredicate, 0, 112, 146, // Skip to: 40641 /* 3153 */ MCD_OPC_CheckField, 21, 1, 0, 106, 146, // Skip to: 40641 /* 3159 */ MCD_OPC_Decode, 150, 14, 17, // Opcode: ST3Threev4s_POST /* 3163 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 3181 /* 3167 */ MCD_OPC_CheckPredicate, 0, 94, 146, // Skip to: 40641 /* 3171 */ MCD_OPC_CheckField, 21, 1, 0, 88, 146, // Skip to: 40641 /* 3177 */ MCD_OPC_Decode, 144, 14, 17, // Opcode: ST3Threev2d_POST /* 3181 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 3199 /* 3185 */ MCD_OPC_CheckPredicate, 0, 76, 146, // Skip to: 40641 /* 3189 */ MCD_OPC_CheckField, 21, 1, 0, 70, 146, // Skip to: 40641 /* 3195 */ MCD_OPC_Decode, 208, 13, 17, // Opcode: ST1Threev16b_POST /* 3199 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 3217 /* 3203 */ MCD_OPC_CheckPredicate, 0, 58, 146, // Skip to: 40641 /* 3207 */ MCD_OPC_CheckField, 21, 1, 0, 52, 146, // Skip to: 40641 /* 3213 */ MCD_OPC_Decode, 222, 13, 17, // Opcode: ST1Threev8h_POST /* 3217 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 3235 /* 3221 */ MCD_OPC_CheckPredicate, 0, 40, 146, // Skip to: 40641 /* 3225 */ MCD_OPC_CheckField, 21, 1, 0, 34, 146, // Skip to: 40641 /* 3231 */ MCD_OPC_Decode, 218, 13, 17, // Opcode: ST1Threev4s_POST /* 3235 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 3253 /* 3239 */ MCD_OPC_CheckPredicate, 0, 22, 146, // Skip to: 40641 /* 3243 */ MCD_OPC_CheckField, 21, 1, 0, 16, 146, // Skip to: 40641 /* 3249 */ MCD_OPC_Decode, 212, 13, 17, // Opcode: ST1Threev2d_POST /* 3253 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 3271 /* 3257 */ MCD_OPC_CheckPredicate, 0, 4, 146, // Skip to: 40641 /* 3261 */ MCD_OPC_CheckField, 21, 1, 0, 254, 145, // Skip to: 40641 /* 3267 */ MCD_OPC_Decode, 192, 13, 18, // Opcode: ST1Onev16b_POST /* 3271 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 3289 /* 3275 */ MCD_OPC_CheckPredicate, 0, 242, 145, // Skip to: 40641 /* 3279 */ MCD_OPC_CheckField, 21, 1, 0, 236, 145, // Skip to: 40641 /* 3285 */ MCD_OPC_Decode, 206, 13, 18, // Opcode: ST1Onev8h_POST /* 3289 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 3307 /* 3293 */ MCD_OPC_CheckPredicate, 0, 224, 145, // Skip to: 40641 /* 3297 */ MCD_OPC_CheckField, 21, 1, 0, 218, 145, // Skip to: 40641 /* 3303 */ MCD_OPC_Decode, 202, 13, 18, // Opcode: ST1Onev4s_POST /* 3307 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 3325 /* 3311 */ MCD_OPC_CheckPredicate, 0, 206, 145, // Skip to: 40641 /* 3315 */ MCD_OPC_CheckField, 21, 1, 0, 200, 145, // Skip to: 40641 /* 3321 */ MCD_OPC_Decode, 196, 13, 18, // Opcode: ST1Onev2d_POST /* 3325 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 3343 /* 3329 */ MCD_OPC_CheckPredicate, 0, 188, 145, // Skip to: 40641 /* 3333 */ MCD_OPC_CheckField, 21, 1, 0, 182, 145, // Skip to: 40641 /* 3339 */ MCD_OPC_Decode, 248, 13, 19, // Opcode: ST2Twov16b_POST /* 3343 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 3361 /* 3347 */ MCD_OPC_CheckPredicate, 0, 170, 145, // Skip to: 40641 /* 3351 */ MCD_OPC_CheckField, 21, 1, 0, 164, 145, // Skip to: 40641 /* 3357 */ MCD_OPC_Decode, 132, 14, 19, // Opcode: ST2Twov8h_POST /* 3361 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 3379 /* 3365 */ MCD_OPC_CheckPredicate, 0, 152, 145, // Skip to: 40641 /* 3369 */ MCD_OPC_CheckField, 21, 1, 0, 146, 145, // Skip to: 40641 /* 3375 */ MCD_OPC_Decode, 128, 14, 19, // Opcode: ST2Twov4s_POST /* 3379 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 3397 /* 3383 */ MCD_OPC_CheckPredicate, 0, 134, 145, // Skip to: 40641 /* 3387 */ MCD_OPC_CheckField, 21, 1, 0, 128, 145, // Skip to: 40641 /* 3393 */ MCD_OPC_Decode, 250, 13, 19, // Opcode: ST2Twov2d_POST /* 3397 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 3415 /* 3401 */ MCD_OPC_CheckPredicate, 0, 116, 145, // Skip to: 40641 /* 3405 */ MCD_OPC_CheckField, 21, 1, 0, 110, 145, // Skip to: 40641 /* 3411 */ MCD_OPC_Decode, 224, 13, 19, // Opcode: ST1Twov16b_POST /* 3415 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 3433 /* 3419 */ MCD_OPC_CheckPredicate, 0, 98, 145, // Skip to: 40641 /* 3423 */ MCD_OPC_CheckField, 21, 1, 0, 92, 145, // Skip to: 40641 /* 3429 */ MCD_OPC_Decode, 238, 13, 19, // Opcode: ST1Twov8h_POST /* 3433 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 3451 /* 3437 */ MCD_OPC_CheckPredicate, 0, 80, 145, // Skip to: 40641 /* 3441 */ MCD_OPC_CheckField, 21, 1, 0, 74, 145, // Skip to: 40641 /* 3447 */ MCD_OPC_Decode, 234, 13, 19, // Opcode: ST1Twov4s_POST /* 3451 */ MCD_OPC_FilterValue, 43, 66, 145, // Skip to: 40641 /* 3455 */ MCD_OPC_CheckPredicate, 0, 62, 145, // Skip to: 40641 /* 3459 */ MCD_OPC_CheckField, 21, 1, 0, 56, 145, // Skip to: 40641 /* 3465 */ MCD_OPC_Decode, 228, 13, 19, // Opcode: ST1Twov2d_POST /* 3469 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 3477 /* 3473 */ MCD_OPC_Decode, 201, 14, 3, // Opcode: STPDpost /* 3477 */ MCD_OPC_FilterValue, 5, 40, 145, // Skip to: 40641 /* 3481 */ MCD_OPC_Decode, 204, 14, 3, // Opcode: STPQpost /* 3485 */ MCD_OPC_FilterValue, 3, 227, 3, // Skip to: 4484 /* 3489 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 3492 */ MCD_OPC_FilterValue, 0, 197, 1, // Skip to: 3949 /* 3496 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 3499 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3517 /* 3503 */ MCD_OPC_CheckPredicate, 0, 14, 145, // Skip to: 40641 /* 3507 */ MCD_OPC_CheckField, 21, 1, 0, 8, 145, // Skip to: 40641 /* 3513 */ MCD_OPC_Decode, 138, 7, 12, // Opcode: LD4Fourv8b_POST /* 3517 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 3535 /* 3521 */ MCD_OPC_CheckPredicate, 0, 252, 144, // Skip to: 40641 /* 3525 */ MCD_OPC_CheckField, 21, 1, 0, 246, 144, // Skip to: 40641 /* 3531 */ MCD_OPC_Decode, 134, 7, 12, // Opcode: LD4Fourv4h_POST /* 3535 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 3553 /* 3539 */ MCD_OPC_CheckPredicate, 0, 234, 144, // Skip to: 40641 /* 3543 */ MCD_OPC_CheckField, 21, 1, 0, 228, 144, // Skip to: 40641 /* 3549 */ MCD_OPC_Decode, 132, 7, 12, // Opcode: LD4Fourv2s_POST /* 3553 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 3571 /* 3557 */ MCD_OPC_CheckPredicate, 0, 216, 144, // Skip to: 40641 /* 3561 */ MCD_OPC_CheckField, 21, 1, 0, 210, 144, // Skip to: 40641 /* 3567 */ MCD_OPC_Decode, 232, 5, 12, // Opcode: LD1Fourv8b_POST /* 3571 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 3589 /* 3575 */ MCD_OPC_CheckPredicate, 0, 198, 144, // Skip to: 40641 /* 3579 */ MCD_OPC_CheckField, 21, 1, 0, 192, 144, // Skip to: 40641 /* 3585 */ MCD_OPC_Decode, 228, 5, 12, // Opcode: LD1Fourv4h_POST /* 3589 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 3607 /* 3593 */ MCD_OPC_CheckPredicate, 0, 180, 144, // Skip to: 40641 /* 3597 */ MCD_OPC_CheckField, 21, 1, 0, 174, 144, // Skip to: 40641 /* 3603 */ MCD_OPC_Decode, 226, 5, 12, // Opcode: LD1Fourv2s_POST /* 3607 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 3625 /* 3611 */ MCD_OPC_CheckPredicate, 0, 162, 144, // Skip to: 40641 /* 3615 */ MCD_OPC_CheckField, 21, 1, 0, 156, 144, // Skip to: 40641 /* 3621 */ MCD_OPC_Decode, 222, 5, 12, // Opcode: LD1Fourv1d_POST /* 3625 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 3643 /* 3629 */ MCD_OPC_CheckPredicate, 0, 144, 144, // Skip to: 40641 /* 3633 */ MCD_OPC_CheckField, 21, 1, 0, 138, 144, // Skip to: 40641 /* 3639 */ MCD_OPC_Decode, 244, 6, 13, // Opcode: LD3Threev8b_POST /* 3643 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 3661 /* 3647 */ MCD_OPC_CheckPredicate, 0, 126, 144, // Skip to: 40641 /* 3651 */ MCD_OPC_CheckField, 21, 1, 0, 120, 144, // Skip to: 40641 /* 3657 */ MCD_OPC_Decode, 240, 6, 13, // Opcode: LD3Threev4h_POST /* 3661 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 3679 /* 3665 */ MCD_OPC_CheckPredicate, 0, 108, 144, // Skip to: 40641 /* 3669 */ MCD_OPC_CheckField, 21, 1, 0, 102, 144, // Skip to: 40641 /* 3675 */ MCD_OPC_Decode, 238, 6, 13, // Opcode: LD3Threev2s_POST /* 3679 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 3697 /* 3683 */ MCD_OPC_CheckPredicate, 0, 90, 144, // Skip to: 40641 /* 3687 */ MCD_OPC_CheckField, 21, 1, 0, 84, 144, // Skip to: 40641 /* 3693 */ MCD_OPC_Decode, 152, 6, 13, // Opcode: LD1Threev8b_POST /* 3697 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 3715 /* 3701 */ MCD_OPC_CheckPredicate, 0, 72, 144, // Skip to: 40641 /* 3705 */ MCD_OPC_CheckField, 21, 1, 0, 66, 144, // Skip to: 40641 /* 3711 */ MCD_OPC_Decode, 148, 6, 13, // Opcode: LD1Threev4h_POST /* 3715 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 3733 /* 3719 */ MCD_OPC_CheckPredicate, 0, 54, 144, // Skip to: 40641 /* 3723 */ MCD_OPC_CheckField, 21, 1, 0, 48, 144, // Skip to: 40641 /* 3729 */ MCD_OPC_Decode, 146, 6, 13, // Opcode: LD1Threev2s_POST /* 3733 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 3751 /* 3737 */ MCD_OPC_CheckPredicate, 0, 36, 144, // Skip to: 40641 /* 3741 */ MCD_OPC_CheckField, 21, 1, 0, 30, 144, // Skip to: 40641 /* 3747 */ MCD_OPC_Decode, 142, 6, 13, // Opcode: LD1Threev1d_POST /* 3751 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 3769 /* 3755 */ MCD_OPC_CheckPredicate, 0, 18, 144, // Skip to: 40641 /* 3759 */ MCD_OPC_CheckField, 21, 1, 0, 12, 144, // Skip to: 40641 /* 3765 */ MCD_OPC_Decode, 248, 5, 14, // Opcode: LD1Onev8b_POST /* 3769 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 3787 /* 3773 */ MCD_OPC_CheckPredicate, 0, 0, 144, // Skip to: 40641 /* 3777 */ MCD_OPC_CheckField, 21, 1, 0, 250, 143, // Skip to: 40641 /* 3783 */ MCD_OPC_Decode, 244, 5, 14, // Opcode: LD1Onev4h_POST /* 3787 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 3805 /* 3791 */ MCD_OPC_CheckPredicate, 0, 238, 143, // Skip to: 40641 /* 3795 */ MCD_OPC_CheckField, 21, 1, 0, 232, 143, // Skip to: 40641 /* 3801 */ MCD_OPC_Decode, 242, 5, 14, // Opcode: LD1Onev2s_POST /* 3805 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 3823 /* 3809 */ MCD_OPC_CheckPredicate, 0, 220, 143, // Skip to: 40641 /* 3813 */ MCD_OPC_CheckField, 21, 1, 0, 214, 143, // Skip to: 40641 /* 3819 */ MCD_OPC_Decode, 238, 5, 14, // Opcode: LD1Onev1d_POST /* 3823 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 3841 /* 3827 */ MCD_OPC_CheckPredicate, 0, 202, 143, // Skip to: 40641 /* 3831 */ MCD_OPC_CheckField, 21, 1, 0, 196, 143, // Skip to: 40641 /* 3837 */ MCD_OPC_Decode, 206, 6, 15, // Opcode: LD2Twov8b_POST /* 3841 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 3859 /* 3845 */ MCD_OPC_CheckPredicate, 0, 184, 143, // Skip to: 40641 /* 3849 */ MCD_OPC_CheckField, 21, 1, 0, 178, 143, // Skip to: 40641 /* 3855 */ MCD_OPC_Decode, 202, 6, 15, // Opcode: LD2Twov4h_POST /* 3859 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 3877 /* 3863 */ MCD_OPC_CheckPredicate, 0, 166, 143, // Skip to: 40641 /* 3867 */ MCD_OPC_CheckField, 21, 1, 0, 160, 143, // Skip to: 40641 /* 3873 */ MCD_OPC_Decode, 200, 6, 15, // Opcode: LD2Twov2s_POST /* 3877 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 3895 /* 3881 */ MCD_OPC_CheckPredicate, 0, 148, 143, // Skip to: 40641 /* 3885 */ MCD_OPC_CheckField, 21, 1, 0, 142, 143, // Skip to: 40641 /* 3891 */ MCD_OPC_Decode, 168, 6, 15, // Opcode: LD1Twov8b_POST /* 3895 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 3913 /* 3899 */ MCD_OPC_CheckPredicate, 0, 130, 143, // Skip to: 40641 /* 3903 */ MCD_OPC_CheckField, 21, 1, 0, 124, 143, // Skip to: 40641 /* 3909 */ MCD_OPC_Decode, 164, 6, 15, // Opcode: LD1Twov4h_POST /* 3913 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 3931 /* 3917 */ MCD_OPC_CheckPredicate, 0, 112, 143, // Skip to: 40641 /* 3921 */ MCD_OPC_CheckField, 21, 1, 0, 106, 143, // Skip to: 40641 /* 3927 */ MCD_OPC_Decode, 162, 6, 15, // Opcode: LD1Twov2s_POST /* 3931 */ MCD_OPC_FilterValue, 43, 98, 143, // Skip to: 40641 /* 3935 */ MCD_OPC_CheckPredicate, 0, 94, 143, // Skip to: 40641 /* 3939 */ MCD_OPC_CheckField, 21, 1, 0, 88, 143, // Skip to: 40641 /* 3945 */ MCD_OPC_Decode, 158, 6, 15, // Opcode: LD1Twov1d_POST /* 3949 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 3957 /* 3953 */ MCD_OPC_Decode, 190, 7, 3, // Opcode: LDPSpost /* 3957 */ MCD_OPC_FilterValue, 2, 251, 1, // Skip to: 4468 /* 3961 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 3964 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3982 /* 3968 */ MCD_OPC_CheckPredicate, 0, 61, 143, // Skip to: 40641 /* 3972 */ MCD_OPC_CheckField, 21, 1, 0, 55, 143, // Skip to: 40641 /* 3978 */ MCD_OPC_Decode, 128, 7, 16, // Opcode: LD4Fourv16b_POST /* 3982 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4000 /* 3986 */ MCD_OPC_CheckPredicate, 0, 43, 143, // Skip to: 40641 /* 3990 */ MCD_OPC_CheckField, 21, 1, 0, 37, 143, // Skip to: 40641 /* 3996 */ MCD_OPC_Decode, 140, 7, 16, // Opcode: LD4Fourv8h_POST /* 4000 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 4018 /* 4004 */ MCD_OPC_CheckPredicate, 0, 25, 143, // Skip to: 40641 /* 4008 */ MCD_OPC_CheckField, 21, 1, 0, 19, 143, // Skip to: 40641 /* 4014 */ MCD_OPC_Decode, 136, 7, 16, // Opcode: LD4Fourv4s_POST /* 4018 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 4036 /* 4022 */ MCD_OPC_CheckPredicate, 0, 7, 143, // Skip to: 40641 /* 4026 */ MCD_OPC_CheckField, 21, 1, 0, 1, 143, // Skip to: 40641 /* 4032 */ MCD_OPC_Decode, 130, 7, 16, // Opcode: LD4Fourv2d_POST /* 4036 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 4054 /* 4040 */ MCD_OPC_CheckPredicate, 0, 245, 142, // Skip to: 40641 /* 4044 */ MCD_OPC_CheckField, 21, 1, 0, 239, 142, // Skip to: 40641 /* 4050 */ MCD_OPC_Decode, 220, 5, 16, // Opcode: LD1Fourv16b_POST /* 4054 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 4072 /* 4058 */ MCD_OPC_CheckPredicate, 0, 227, 142, // Skip to: 40641 /* 4062 */ MCD_OPC_CheckField, 21, 1, 0, 221, 142, // Skip to: 40641 /* 4068 */ MCD_OPC_Decode, 234, 5, 16, // Opcode: LD1Fourv8h_POST /* 4072 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 4090 /* 4076 */ MCD_OPC_CheckPredicate, 0, 209, 142, // Skip to: 40641 /* 4080 */ MCD_OPC_CheckField, 21, 1, 0, 203, 142, // Skip to: 40641 /* 4086 */ MCD_OPC_Decode, 230, 5, 16, // Opcode: LD1Fourv4s_POST /* 4090 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 4108 /* 4094 */ MCD_OPC_CheckPredicate, 0, 191, 142, // Skip to: 40641 /* 4098 */ MCD_OPC_CheckField, 21, 1, 0, 185, 142, // Skip to: 40641 /* 4104 */ MCD_OPC_Decode, 224, 5, 16, // Opcode: LD1Fourv2d_POST /* 4108 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 4126 /* 4112 */ MCD_OPC_CheckPredicate, 0, 173, 142, // Skip to: 40641 /* 4116 */ MCD_OPC_CheckField, 21, 1, 0, 167, 142, // Skip to: 40641 /* 4122 */ MCD_OPC_Decode, 234, 6, 17, // Opcode: LD3Threev16b_POST /* 4126 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 4144 /* 4130 */ MCD_OPC_CheckPredicate, 0, 155, 142, // Skip to: 40641 /* 4134 */ MCD_OPC_CheckField, 21, 1, 0, 149, 142, // Skip to: 40641 /* 4140 */ MCD_OPC_Decode, 246, 6, 17, // Opcode: LD3Threev8h_POST /* 4144 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 4162 /* 4148 */ MCD_OPC_CheckPredicate, 0, 137, 142, // Skip to: 40641 /* 4152 */ MCD_OPC_CheckField, 21, 1, 0, 131, 142, // Skip to: 40641 /* 4158 */ MCD_OPC_Decode, 242, 6, 17, // Opcode: LD3Threev4s_POST /* 4162 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 4180 /* 4166 */ MCD_OPC_CheckPredicate, 0, 119, 142, // Skip to: 40641 /* 4170 */ MCD_OPC_CheckField, 21, 1, 0, 113, 142, // Skip to: 40641 /* 4176 */ MCD_OPC_Decode, 236, 6, 17, // Opcode: LD3Threev2d_POST /* 4180 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 4198 /* 4184 */ MCD_OPC_CheckPredicate, 0, 101, 142, // Skip to: 40641 /* 4188 */ MCD_OPC_CheckField, 21, 1, 0, 95, 142, // Skip to: 40641 /* 4194 */ MCD_OPC_Decode, 140, 6, 17, // Opcode: LD1Threev16b_POST /* 4198 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 4216 /* 4202 */ MCD_OPC_CheckPredicate, 0, 83, 142, // Skip to: 40641 /* 4206 */ MCD_OPC_CheckField, 21, 1, 0, 77, 142, // Skip to: 40641 /* 4212 */ MCD_OPC_Decode, 154, 6, 17, // Opcode: LD1Threev8h_POST /* 4216 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 4234 /* 4220 */ MCD_OPC_CheckPredicate, 0, 65, 142, // Skip to: 40641 /* 4224 */ MCD_OPC_CheckField, 21, 1, 0, 59, 142, // Skip to: 40641 /* 4230 */ MCD_OPC_Decode, 150, 6, 17, // Opcode: LD1Threev4s_POST /* 4234 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 4252 /* 4238 */ MCD_OPC_CheckPredicate, 0, 47, 142, // Skip to: 40641 /* 4242 */ MCD_OPC_CheckField, 21, 1, 0, 41, 142, // Skip to: 40641 /* 4248 */ MCD_OPC_Decode, 144, 6, 17, // Opcode: LD1Threev2d_POST /* 4252 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 4270 /* 4256 */ MCD_OPC_CheckPredicate, 0, 29, 142, // Skip to: 40641 /* 4260 */ MCD_OPC_CheckField, 21, 1, 0, 23, 142, // Skip to: 40641 /* 4266 */ MCD_OPC_Decode, 236, 5, 18, // Opcode: LD1Onev16b_POST /* 4270 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 4288 /* 4274 */ MCD_OPC_CheckPredicate, 0, 11, 142, // Skip to: 40641 /* 4278 */ MCD_OPC_CheckField, 21, 1, 0, 5, 142, // Skip to: 40641 /* 4284 */ MCD_OPC_Decode, 250, 5, 18, // Opcode: LD1Onev8h_POST /* 4288 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 4306 /* 4292 */ MCD_OPC_CheckPredicate, 0, 249, 141, // Skip to: 40641 /* 4296 */ MCD_OPC_CheckField, 21, 1, 0, 243, 141, // Skip to: 40641 /* 4302 */ MCD_OPC_Decode, 246, 5, 18, // Opcode: LD1Onev4s_POST /* 4306 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 4324 /* 4310 */ MCD_OPC_CheckPredicate, 0, 231, 141, // Skip to: 40641 /* 4314 */ MCD_OPC_CheckField, 21, 1, 0, 225, 141, // Skip to: 40641 /* 4320 */ MCD_OPC_Decode, 240, 5, 18, // Opcode: LD1Onev2d_POST /* 4324 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 4342 /* 4328 */ MCD_OPC_CheckPredicate, 0, 213, 141, // Skip to: 40641 /* 4332 */ MCD_OPC_CheckField, 21, 1, 0, 207, 141, // Skip to: 40641 /* 4338 */ MCD_OPC_Decode, 196, 6, 19, // Opcode: LD2Twov16b_POST /* 4342 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 4360 /* 4346 */ MCD_OPC_CheckPredicate, 0, 195, 141, // Skip to: 40641 /* 4350 */ MCD_OPC_CheckField, 21, 1, 0, 189, 141, // Skip to: 40641 /* 4356 */ MCD_OPC_Decode, 208, 6, 19, // Opcode: LD2Twov8h_POST /* 4360 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 4378 /* 4364 */ MCD_OPC_CheckPredicate, 0, 177, 141, // Skip to: 40641 /* 4368 */ MCD_OPC_CheckField, 21, 1, 0, 171, 141, // Skip to: 40641 /* 4374 */ MCD_OPC_Decode, 204, 6, 19, // Opcode: LD2Twov4s_POST /* 4378 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 4396 /* 4382 */ MCD_OPC_CheckPredicate, 0, 159, 141, // Skip to: 40641 /* 4386 */ MCD_OPC_CheckField, 21, 1, 0, 153, 141, // Skip to: 40641 /* 4392 */ MCD_OPC_Decode, 198, 6, 19, // Opcode: LD2Twov2d_POST /* 4396 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 4414 /* 4400 */ MCD_OPC_CheckPredicate, 0, 141, 141, // Skip to: 40641 /* 4404 */ MCD_OPC_CheckField, 21, 1, 0, 135, 141, // Skip to: 40641 /* 4410 */ MCD_OPC_Decode, 156, 6, 19, // Opcode: LD1Twov16b_POST /* 4414 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 4432 /* 4418 */ MCD_OPC_CheckPredicate, 0, 123, 141, // Skip to: 40641 /* 4422 */ MCD_OPC_CheckField, 21, 1, 0, 117, 141, // Skip to: 40641 /* 4428 */ MCD_OPC_Decode, 170, 6, 19, // Opcode: LD1Twov8h_POST /* 4432 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 4450 /* 4436 */ MCD_OPC_CheckPredicate, 0, 105, 141, // Skip to: 40641 /* 4440 */ MCD_OPC_CheckField, 21, 1, 0, 99, 141, // Skip to: 40641 /* 4446 */ MCD_OPC_Decode, 166, 6, 19, // Opcode: LD1Twov4s_POST /* 4450 */ MCD_OPC_FilterValue, 43, 91, 141, // Skip to: 40641 /* 4454 */ MCD_OPC_CheckPredicate, 0, 87, 141, // Skip to: 40641 /* 4458 */ MCD_OPC_CheckField, 21, 1, 0, 81, 141, // Skip to: 40641 /* 4464 */ MCD_OPC_Decode, 160, 6, 19, // Opcode: LD1Twov2d_POST /* 4468 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 4476 /* 4472 */ MCD_OPC_Decode, 181, 7, 3, // Opcode: LDPDpost /* 4476 */ MCD_OPC_FilterValue, 5, 65, 141, // Skip to: 40641 /* 4480 */ MCD_OPC_Decode, 184, 7, 3, // Opcode: LDPQpost /* 4484 */ MCD_OPC_FilterValue, 4, 155, 1, // Skip to: 4899 /* 4488 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 4491 */ MCD_OPC_FilterValue, 0, 117, 1, // Skip to: 4868 /* 4495 */ MCD_OPC_ExtractField, 13, 9, // Inst{21-13} ... /* 4498 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4516 /* 4502 */ MCD_OPC_CheckPredicate, 0, 39, 141, // Skip to: 40641 /* 4506 */ MCD_OPC_CheckField, 31, 1, 0, 33, 141, // Skip to: 40641 /* 4512 */ MCD_OPC_Decode, 245, 13, 20, // Opcode: ST1i8 /* 4516 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4534 /* 4520 */ MCD_OPC_CheckPredicate, 0, 21, 141, // Skip to: 40641 /* 4524 */ MCD_OPC_CheckField, 31, 1, 0, 15, 141, // Skip to: 40641 /* 4530 */ MCD_OPC_Decode, 161, 14, 21, // Opcode: ST3i8 /* 4534 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 4558 /* 4538 */ MCD_OPC_CheckPredicate, 0, 3, 141, // Skip to: 40641 /* 4542 */ MCD_OPC_CheckField, 31, 1, 0, 253, 140, // Skip to: 40641 /* 4548 */ MCD_OPC_CheckField, 10, 1, 0, 247, 140, // Skip to: 40641 /* 4554 */ MCD_OPC_Decode, 239, 13, 22, // Opcode: ST1i16 /* 4558 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 4582 /* 4562 */ MCD_OPC_CheckPredicate, 0, 235, 140, // Skip to: 40641 /* 4566 */ MCD_OPC_CheckField, 31, 1, 0, 229, 140, // Skip to: 40641 /* 4572 */ MCD_OPC_CheckField, 10, 1, 0, 223, 140, // Skip to: 40641 /* 4578 */ MCD_OPC_Decode, 155, 14, 23, // Opcode: ST3i16 /* 4582 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 4631 /* 4586 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4589 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4607 /* 4593 */ MCD_OPC_CheckPredicate, 0, 204, 140, // Skip to: 40641 /* 4597 */ MCD_OPC_CheckField, 31, 1, 0, 198, 140, // Skip to: 40641 /* 4603 */ MCD_OPC_Decode, 241, 13, 24, // Opcode: ST1i32 /* 4607 */ MCD_OPC_FilterValue, 1, 190, 140, // Skip to: 40641 /* 4611 */ MCD_OPC_CheckPredicate, 0, 186, 140, // Skip to: 40641 /* 4615 */ MCD_OPC_CheckField, 31, 1, 0, 180, 140, // Skip to: 40641 /* 4621 */ MCD_OPC_CheckField, 12, 1, 0, 174, 140, // Skip to: 40641 /* 4627 */ MCD_OPC_Decode, 243, 13, 25, // Opcode: ST1i64 /* 4631 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 4680 /* 4635 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4638 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4656 /* 4642 */ MCD_OPC_CheckPredicate, 0, 155, 140, // Skip to: 40641 /* 4646 */ MCD_OPC_CheckField, 31, 1, 0, 149, 140, // Skip to: 40641 /* 4652 */ MCD_OPC_Decode, 157, 14, 26, // Opcode: ST3i32 /* 4656 */ MCD_OPC_FilterValue, 1, 141, 140, // Skip to: 40641 /* 4660 */ MCD_OPC_CheckPredicate, 0, 137, 140, // Skip to: 40641 /* 4664 */ MCD_OPC_CheckField, 31, 1, 0, 131, 140, // Skip to: 40641 /* 4670 */ MCD_OPC_CheckField, 12, 1, 0, 125, 140, // Skip to: 40641 /* 4676 */ MCD_OPC_Decode, 159, 14, 27, // Opcode: ST3i64 /* 4680 */ MCD_OPC_FilterValue, 128, 2, 14, 0, // Skip to: 4699 /* 4685 */ MCD_OPC_CheckPredicate, 0, 112, 140, // Skip to: 40641 /* 4689 */ MCD_OPC_CheckField, 31, 1, 0, 106, 140, // Skip to: 40641 /* 4695 */ MCD_OPC_Decode, 139, 14, 28, // Opcode: ST2i8 /* 4699 */ MCD_OPC_FilterValue, 129, 2, 14, 0, // Skip to: 4718 /* 4704 */ MCD_OPC_CheckPredicate, 0, 93, 140, // Skip to: 40641 /* 4708 */ MCD_OPC_CheckField, 31, 1, 0, 87, 140, // Skip to: 40641 /* 4714 */ MCD_OPC_Decode, 183, 14, 29, // Opcode: ST4i8 /* 4718 */ MCD_OPC_FilterValue, 130, 2, 20, 0, // Skip to: 4743 /* 4723 */ MCD_OPC_CheckPredicate, 0, 74, 140, // Skip to: 40641 /* 4727 */ MCD_OPC_CheckField, 31, 1, 0, 68, 140, // Skip to: 40641 /* 4733 */ MCD_OPC_CheckField, 10, 1, 0, 62, 140, // Skip to: 40641 /* 4739 */ MCD_OPC_Decode, 133, 14, 30, // Opcode: ST2i16 /* 4743 */ MCD_OPC_FilterValue, 131, 2, 20, 0, // Skip to: 4768 /* 4748 */ MCD_OPC_CheckPredicate, 0, 49, 140, // Skip to: 40641 /* 4752 */ MCD_OPC_CheckField, 31, 1, 0, 43, 140, // Skip to: 40641 /* 4758 */ MCD_OPC_CheckField, 10, 1, 0, 37, 140, // Skip to: 40641 /* 4764 */ MCD_OPC_Decode, 177, 14, 31, // Opcode: ST4i16 /* 4768 */ MCD_OPC_FilterValue, 132, 2, 45, 0, // Skip to: 4818 /* 4773 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4776 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4794 /* 4780 */ MCD_OPC_CheckPredicate, 0, 17, 140, // Skip to: 40641 /* 4784 */ MCD_OPC_CheckField, 31, 1, 0, 11, 140, // Skip to: 40641 /* 4790 */ MCD_OPC_Decode, 135, 14, 32, // Opcode: ST2i32 /* 4794 */ MCD_OPC_FilterValue, 1, 3, 140, // Skip to: 40641 /* 4798 */ MCD_OPC_CheckPredicate, 0, 255, 139, // Skip to: 40641 /* 4802 */ MCD_OPC_CheckField, 31, 1, 0, 249, 139, // Skip to: 40641 /* 4808 */ MCD_OPC_CheckField, 12, 1, 0, 243, 139, // Skip to: 40641 /* 4814 */ MCD_OPC_Decode, 137, 14, 33, // Opcode: ST2i64 /* 4818 */ MCD_OPC_FilterValue, 133, 2, 234, 139, // Skip to: 40641 /* 4823 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4826 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4844 /* 4830 */ MCD_OPC_CheckPredicate, 0, 223, 139, // Skip to: 40641 /* 4834 */ MCD_OPC_CheckField, 31, 1, 0, 217, 139, // Skip to: 40641 /* 4840 */ MCD_OPC_Decode, 179, 14, 34, // Opcode: ST4i32 /* 4844 */ MCD_OPC_FilterValue, 1, 209, 139, // Skip to: 40641 /* 4848 */ MCD_OPC_CheckPredicate, 0, 205, 139, // Skip to: 40641 /* 4852 */ MCD_OPC_CheckField, 31, 1, 0, 199, 139, // Skip to: 40641 /* 4858 */ MCD_OPC_CheckField, 12, 1, 0, 193, 139, // Skip to: 40641 /* 4864 */ MCD_OPC_Decode, 181, 14, 35, // Opcode: ST4i64 /* 4868 */ MCD_OPC_FilterValue, 1, 185, 139, // Skip to: 40641 /* 4872 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 4875 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 4883 /* 4879 */ MCD_OPC_Decode, 206, 14, 3, // Opcode: STPSi /* 4883 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 4891 /* 4887 */ MCD_OPC_Decode, 200, 14, 3, // Opcode: STPDi /* 4891 */ MCD_OPC_FilterValue, 2, 162, 139, // Skip to: 40641 /* 4895 */ MCD_OPC_Decode, 203, 14, 3, // Opcode: STPQi /* 4899 */ MCD_OPC_FilterValue, 5, 169, 3, // Skip to: 5840 /* 4903 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 4906 */ MCD_OPC_FilterValue, 0, 131, 3, // Skip to: 5809 /* 4910 */ MCD_OPC_ExtractField, 13, 9, // Inst{21-13} ... /* 4913 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4931 /* 4917 */ MCD_OPC_CheckPredicate, 0, 136, 139, // Skip to: 40641 /* 4921 */ MCD_OPC_CheckField, 31, 1, 0, 130, 139, // Skip to: 40641 /* 4927 */ MCD_OPC_Decode, 177, 6, 36, // Opcode: LD1i8 /* 4931 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4949 /* 4935 */ MCD_OPC_CheckPredicate, 0, 118, 139, // Skip to: 40641 /* 4939 */ MCD_OPC_CheckField, 31, 1, 0, 112, 139, // Skip to: 40641 /* 4945 */ MCD_OPC_Decode, 253, 6, 37, // Opcode: LD3i8 /* 4949 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 4973 /* 4953 */ MCD_OPC_CheckPredicate, 0, 100, 139, // Skip to: 40641 /* 4957 */ MCD_OPC_CheckField, 31, 1, 0, 94, 139, // Skip to: 40641 /* 4963 */ MCD_OPC_CheckField, 10, 1, 0, 88, 139, // Skip to: 40641 /* 4969 */ MCD_OPC_Decode, 171, 6, 38, // Opcode: LD1i16 /* 4973 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 4997 /* 4977 */ MCD_OPC_CheckPredicate, 0, 76, 139, // Skip to: 40641 /* 4981 */ MCD_OPC_CheckField, 31, 1, 0, 70, 139, // Skip to: 40641 /* 4987 */ MCD_OPC_CheckField, 10, 1, 0, 64, 139, // Skip to: 40641 /* 4993 */ MCD_OPC_Decode, 247, 6, 39, // Opcode: LD3i16 /* 4997 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 5046 /* 5001 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 5004 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5022 /* 5008 */ MCD_OPC_CheckPredicate, 0, 45, 139, // Skip to: 40641 /* 5012 */ MCD_OPC_CheckField, 31, 1, 0, 39, 139, // Skip to: 40641 /* 5018 */ MCD_OPC_Decode, 173, 6, 40, // Opcode: LD1i32 /* 5022 */ MCD_OPC_FilterValue, 1, 31, 139, // Skip to: 40641 /* 5026 */ MCD_OPC_CheckPredicate, 0, 27, 139, // Skip to: 40641 /* 5030 */ MCD_OPC_CheckField, 31, 1, 0, 21, 139, // Skip to: 40641 /* 5036 */ MCD_OPC_CheckField, 12, 1, 0, 15, 139, // Skip to: 40641 /* 5042 */ MCD_OPC_Decode, 175, 6, 41, // Opcode: LD1i64 /* 5046 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 5095 /* 5050 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 5053 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5071 /* 5057 */ MCD_OPC_CheckPredicate, 0, 252, 138, // Skip to: 40641 /* 5061 */ MCD_OPC_CheckField, 31, 1, 0, 246, 138, // Skip to: 40641 /* 5067 */ MCD_OPC_Decode, 249, 6, 42, // Opcode: LD3i32 /* 5071 */ MCD_OPC_FilterValue, 1, 238, 138, // Skip to: 40641 /* 5075 */ MCD_OPC_CheckPredicate, 0, 234, 138, // Skip to: 40641 /* 5079 */ MCD_OPC_CheckField, 31, 1, 0, 228, 138, // Skip to: 40641 /* 5085 */ MCD_OPC_CheckField, 12, 1, 0, 222, 138, // Skip to: 40641 /* 5091 */ MCD_OPC_Decode, 251, 6, 43, // Opcode: LD3i64 /* 5095 */ MCD_OPC_FilterValue, 6, 127, 0, // Skip to: 5226 /* 5099 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ... /* 5102 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5133 /* 5106 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5109 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5121 /* 5113 */ MCD_OPC_CheckPredicate, 0, 196, 138, // Skip to: 40641 /* 5117 */ MCD_OPC_Decode, 135, 6, 6, // Opcode: LD1Rv8b /* 5121 */ MCD_OPC_FilterValue, 1, 188, 138, // Skip to: 40641 /* 5125 */ MCD_OPC_CheckPredicate, 0, 184, 138, // Skip to: 40641 /* 5129 */ MCD_OPC_Decode, 251, 5, 10, // Opcode: LD1Rv16b /* 5133 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5164 /* 5137 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5140 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5152 /* 5144 */ MCD_OPC_CheckPredicate, 0, 165, 138, // Skip to: 40641 /* 5148 */ MCD_OPC_Decode, 131, 6, 6, // Opcode: LD1Rv4h /* 5152 */ MCD_OPC_FilterValue, 1, 157, 138, // Skip to: 40641 /* 5156 */ MCD_OPC_CheckPredicate, 0, 153, 138, // Skip to: 40641 /* 5160 */ MCD_OPC_Decode, 137, 6, 10, // Opcode: LD1Rv8h /* 5164 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5195 /* 5168 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5171 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5183 /* 5175 */ MCD_OPC_CheckPredicate, 0, 134, 138, // Skip to: 40641 /* 5179 */ MCD_OPC_Decode, 129, 6, 6, // Opcode: LD1Rv2s /* 5183 */ MCD_OPC_FilterValue, 1, 126, 138, // Skip to: 40641 /* 5187 */ MCD_OPC_CheckPredicate, 0, 122, 138, // Skip to: 40641 /* 5191 */ MCD_OPC_Decode, 133, 6, 10, // Opcode: LD1Rv4s /* 5195 */ MCD_OPC_FilterValue, 3, 114, 138, // Skip to: 40641 /* 5199 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5202 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5214 /* 5206 */ MCD_OPC_CheckPredicate, 0, 103, 138, // Skip to: 40641 /* 5210 */ MCD_OPC_Decode, 253, 5, 6, // Opcode: LD1Rv1d /* 5214 */ MCD_OPC_FilterValue, 1, 95, 138, // Skip to: 40641 /* 5218 */ MCD_OPC_CheckPredicate, 0, 91, 138, // Skip to: 40641 /* 5222 */ MCD_OPC_Decode, 255, 5, 10, // Opcode: LD1Rv2d /* 5226 */ MCD_OPC_FilterValue, 7, 127, 0, // Skip to: 5357 /* 5230 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ... /* 5233 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5264 /* 5237 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5240 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5252 /* 5244 */ MCD_OPC_CheckPredicate, 0, 65, 138, // Skip to: 40641 /* 5248 */ MCD_OPC_Decode, 229, 6, 5, // Opcode: LD3Rv8b /* 5252 */ MCD_OPC_FilterValue, 1, 57, 138, // Skip to: 40641 /* 5256 */ MCD_OPC_CheckPredicate, 0, 53, 138, // Skip to: 40641 /* 5260 */ MCD_OPC_Decode, 217, 6, 9, // Opcode: LD3Rv16b /* 5264 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5295 /* 5268 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5271 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5283 /* 5275 */ MCD_OPC_CheckPredicate, 0, 34, 138, // Skip to: 40641 /* 5279 */ MCD_OPC_Decode, 225, 6, 5, // Opcode: LD3Rv4h /* 5283 */ MCD_OPC_FilterValue, 1, 26, 138, // Skip to: 40641 /* 5287 */ MCD_OPC_CheckPredicate, 0, 22, 138, // Skip to: 40641 /* 5291 */ MCD_OPC_Decode, 231, 6, 9, // Opcode: LD3Rv8h /* 5295 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5326 /* 5299 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5302 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5314 /* 5306 */ MCD_OPC_CheckPredicate, 0, 3, 138, // Skip to: 40641 /* 5310 */ MCD_OPC_Decode, 223, 6, 5, // Opcode: LD3Rv2s /* 5314 */ MCD_OPC_FilterValue, 1, 251, 137, // Skip to: 40641 /* 5318 */ MCD_OPC_CheckPredicate, 0, 247, 137, // Skip to: 40641 /* 5322 */ MCD_OPC_Decode, 227, 6, 9, // Opcode: LD3Rv4s /* 5326 */ MCD_OPC_FilterValue, 3, 239, 137, // Skip to: 40641 /* 5330 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5333 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5345 /* 5337 */ MCD_OPC_CheckPredicate, 0, 228, 137, // Skip to: 40641 /* 5341 */ MCD_OPC_Decode, 219, 6, 5, // Opcode: LD3Rv1d /* 5345 */ MCD_OPC_FilterValue, 1, 220, 137, // Skip to: 40641 /* 5349 */ MCD_OPC_CheckPredicate, 0, 216, 137, // Skip to: 40641 /* 5353 */ MCD_OPC_Decode, 221, 6, 9, // Opcode: LD3Rv2d /* 5357 */ MCD_OPC_FilterValue, 128, 2, 14, 0, // Skip to: 5376 /* 5362 */ MCD_OPC_CheckPredicate, 0, 203, 137, // Skip to: 40641 /* 5366 */ MCD_OPC_CheckField, 31, 1, 0, 197, 137, // Skip to: 40641 /* 5372 */ MCD_OPC_Decode, 215, 6, 44, // Opcode: LD2i8 /* 5376 */ MCD_OPC_FilterValue, 129, 2, 14, 0, // Skip to: 5395 /* 5381 */ MCD_OPC_CheckPredicate, 0, 184, 137, // Skip to: 40641 /* 5385 */ MCD_OPC_CheckField, 31, 1, 0, 178, 137, // Skip to: 40641 /* 5391 */ MCD_OPC_Decode, 163, 7, 45, // Opcode: LD4i8 /* 5395 */ MCD_OPC_FilterValue, 130, 2, 20, 0, // Skip to: 5420 /* 5400 */ MCD_OPC_CheckPredicate, 0, 165, 137, // Skip to: 40641 /* 5404 */ MCD_OPC_CheckField, 31, 1, 0, 159, 137, // Skip to: 40641 /* 5410 */ MCD_OPC_CheckField, 10, 1, 0, 153, 137, // Skip to: 40641 /* 5416 */ MCD_OPC_Decode, 209, 6, 46, // Opcode: LD2i16 /* 5420 */ MCD_OPC_FilterValue, 131, 2, 20, 0, // Skip to: 5445 /* 5425 */ MCD_OPC_CheckPredicate, 0, 140, 137, // Skip to: 40641 /* 5429 */ MCD_OPC_CheckField, 31, 1, 0, 134, 137, // Skip to: 40641 /* 5435 */ MCD_OPC_CheckField, 10, 1, 0, 128, 137, // Skip to: 40641 /* 5441 */ MCD_OPC_Decode, 157, 7, 47, // Opcode: LD4i16 /* 5445 */ MCD_OPC_FilterValue, 132, 2, 45, 0, // Skip to: 5495 /* 5450 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 5453 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5471 /* 5457 */ MCD_OPC_CheckPredicate, 0, 108, 137, // Skip to: 40641 /* 5461 */ MCD_OPC_CheckField, 31, 1, 0, 102, 137, // Skip to: 40641 /* 5467 */ MCD_OPC_Decode, 211, 6, 48, // Opcode: LD2i32 /* 5471 */ MCD_OPC_FilterValue, 1, 94, 137, // Skip to: 40641 /* 5475 */ MCD_OPC_CheckPredicate, 0, 90, 137, // Skip to: 40641 /* 5479 */ MCD_OPC_CheckField, 31, 1, 0, 84, 137, // Skip to: 40641 /* 5485 */ MCD_OPC_CheckField, 12, 1, 0, 78, 137, // Skip to: 40641 /* 5491 */ MCD_OPC_Decode, 213, 6, 49, // Opcode: LD2i64 /* 5495 */ MCD_OPC_FilterValue, 133, 2, 45, 0, // Skip to: 5545 /* 5500 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 5503 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5521 /* 5507 */ MCD_OPC_CheckPredicate, 0, 58, 137, // Skip to: 40641 /* 5511 */ MCD_OPC_CheckField, 31, 1, 0, 52, 137, // Skip to: 40641 /* 5517 */ MCD_OPC_Decode, 159, 7, 50, // Opcode: LD4i32 /* 5521 */ MCD_OPC_FilterValue, 1, 44, 137, // Skip to: 40641 /* 5525 */ MCD_OPC_CheckPredicate, 0, 40, 137, // Skip to: 40641 /* 5529 */ MCD_OPC_CheckField, 31, 1, 0, 34, 137, // Skip to: 40641 /* 5535 */ MCD_OPC_CheckField, 12, 1, 0, 28, 137, // Skip to: 40641 /* 5541 */ MCD_OPC_Decode, 161, 7, 51, // Opcode: LD4i64 /* 5545 */ MCD_OPC_FilterValue, 134, 2, 127, 0, // Skip to: 5677 /* 5550 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ... /* 5553 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5584 /* 5557 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5560 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5572 /* 5564 */ MCD_OPC_CheckPredicate, 0, 1, 137, // Skip to: 40641 /* 5568 */ MCD_OPC_Decode, 191, 6, 7, // Opcode: LD2Rv8b /* 5572 */ MCD_OPC_FilterValue, 1, 249, 136, // Skip to: 40641 /* 5576 */ MCD_OPC_CheckPredicate, 0, 245, 136, // Skip to: 40641 /* 5580 */ MCD_OPC_Decode, 179, 6, 11, // Opcode: LD2Rv16b /* 5584 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5615 /* 5588 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5591 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5603 /* 5595 */ MCD_OPC_CheckPredicate, 0, 226, 136, // Skip to: 40641 /* 5599 */ MCD_OPC_Decode, 187, 6, 7, // Opcode: LD2Rv4h /* 5603 */ MCD_OPC_FilterValue, 1, 218, 136, // Skip to: 40641 /* 5607 */ MCD_OPC_CheckPredicate, 0, 214, 136, // Skip to: 40641 /* 5611 */ MCD_OPC_Decode, 193, 6, 11, // Opcode: LD2Rv8h /* 5615 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5646 /* 5619 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5622 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5634 /* 5626 */ MCD_OPC_CheckPredicate, 0, 195, 136, // Skip to: 40641 /* 5630 */ MCD_OPC_Decode, 185, 6, 7, // Opcode: LD2Rv2s /* 5634 */ MCD_OPC_FilterValue, 1, 187, 136, // Skip to: 40641 /* 5638 */ MCD_OPC_CheckPredicate, 0, 183, 136, // Skip to: 40641 /* 5642 */ MCD_OPC_Decode, 189, 6, 11, // Opcode: LD2Rv4s /* 5646 */ MCD_OPC_FilterValue, 3, 175, 136, // Skip to: 40641 /* 5650 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5653 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5665 /* 5657 */ MCD_OPC_CheckPredicate, 0, 164, 136, // Skip to: 40641 /* 5661 */ MCD_OPC_Decode, 181, 6, 7, // Opcode: LD2Rv1d /* 5665 */ MCD_OPC_FilterValue, 1, 156, 136, // Skip to: 40641 /* 5669 */ MCD_OPC_CheckPredicate, 0, 152, 136, // Skip to: 40641 /* 5673 */ MCD_OPC_Decode, 183, 6, 11, // Opcode: LD2Rv2d /* 5677 */ MCD_OPC_FilterValue, 135, 2, 143, 136, // Skip to: 40641 /* 5682 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ... /* 5685 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5716 /* 5689 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5692 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5704 /* 5696 */ MCD_OPC_CheckPredicate, 0, 125, 136, // Skip to: 40641 /* 5700 */ MCD_OPC_Decode, 153, 7, 4, // Opcode: LD4Rv8b /* 5704 */ MCD_OPC_FilterValue, 1, 117, 136, // Skip to: 40641 /* 5708 */ MCD_OPC_CheckPredicate, 0, 113, 136, // Skip to: 40641 /* 5712 */ MCD_OPC_Decode, 141, 7, 8, // Opcode: LD4Rv16b /* 5716 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5747 /* 5720 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5723 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5735 /* 5727 */ MCD_OPC_CheckPredicate, 0, 94, 136, // Skip to: 40641 /* 5731 */ MCD_OPC_Decode, 149, 7, 4, // Opcode: LD4Rv4h /* 5735 */ MCD_OPC_FilterValue, 1, 86, 136, // Skip to: 40641 /* 5739 */ MCD_OPC_CheckPredicate, 0, 82, 136, // Skip to: 40641 /* 5743 */ MCD_OPC_Decode, 155, 7, 8, // Opcode: LD4Rv8h /* 5747 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5778 /* 5751 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5754 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5766 /* 5758 */ MCD_OPC_CheckPredicate, 0, 63, 136, // Skip to: 40641 /* 5762 */ MCD_OPC_Decode, 147, 7, 4, // Opcode: LD4Rv2s /* 5766 */ MCD_OPC_FilterValue, 1, 55, 136, // Skip to: 40641 /* 5770 */ MCD_OPC_CheckPredicate, 0, 51, 136, // Skip to: 40641 /* 5774 */ MCD_OPC_Decode, 151, 7, 8, // Opcode: LD4Rv4s /* 5778 */ MCD_OPC_FilterValue, 3, 43, 136, // Skip to: 40641 /* 5782 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5785 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5797 /* 5789 */ MCD_OPC_CheckPredicate, 0, 32, 136, // Skip to: 40641 /* 5793 */ MCD_OPC_Decode, 143, 7, 4, // Opcode: LD4Rv1d /* 5797 */ MCD_OPC_FilterValue, 1, 24, 136, // Skip to: 40641 /* 5801 */ MCD_OPC_CheckPredicate, 0, 20, 136, // Skip to: 40641 /* 5805 */ MCD_OPC_Decode, 145, 7, 8, // Opcode: LD4Rv2d /* 5809 */ MCD_OPC_FilterValue, 1, 12, 136, // Skip to: 40641 /* 5813 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 5816 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5824 /* 5820 */ MCD_OPC_Decode, 189, 7, 3, // Opcode: LDPSi /* 5824 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 5832 /* 5828 */ MCD_OPC_Decode, 180, 7, 3, // Opcode: LDPDi /* 5832 */ MCD_OPC_FilterValue, 2, 245, 135, // Skip to: 40641 /* 5836 */ MCD_OPC_Decode, 183, 7, 3, // Opcode: LDPQi /* 5840 */ MCD_OPC_FilterValue, 6, 191, 1, // Skip to: 6291 /* 5844 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 5847 */ MCD_OPC_FilterValue, 0, 153, 1, // Skip to: 6260 /* 5851 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 5854 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 5897 /* 5858 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5861 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5879 /* 5865 */ MCD_OPC_CheckPredicate, 0, 212, 135, // Skip to: 40641 /* 5869 */ MCD_OPC_CheckField, 31, 1, 0, 206, 135, // Skip to: 40641 /* 5875 */ MCD_OPC_Decode, 246, 13, 52, // Opcode: ST1i8_POST /* 5879 */ MCD_OPC_FilterValue, 1, 198, 135, // Skip to: 40641 /* 5883 */ MCD_OPC_CheckPredicate, 0, 194, 135, // Skip to: 40641 /* 5887 */ MCD_OPC_CheckField, 31, 1, 0, 188, 135, // Skip to: 40641 /* 5893 */ MCD_OPC_Decode, 140, 14, 53, // Opcode: ST2i8_POST /* 5897 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 5940 /* 5901 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5904 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5922 /* 5908 */ MCD_OPC_CheckPredicate, 0, 169, 135, // Skip to: 40641 /* 5912 */ MCD_OPC_CheckField, 31, 1, 0, 163, 135, // Skip to: 40641 /* 5918 */ MCD_OPC_Decode, 162, 14, 54, // Opcode: ST3i8_POST /* 5922 */ MCD_OPC_FilterValue, 1, 155, 135, // Skip to: 40641 /* 5926 */ MCD_OPC_CheckPredicate, 0, 151, 135, // Skip to: 40641 /* 5930 */ MCD_OPC_CheckField, 31, 1, 0, 145, 135, // Skip to: 40641 /* 5936 */ MCD_OPC_Decode, 184, 14, 55, // Opcode: ST4i8_POST /* 5940 */ MCD_OPC_FilterValue, 2, 51, 0, // Skip to: 5995 /* 5944 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5947 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 5971 /* 5951 */ MCD_OPC_CheckPredicate, 0, 126, 135, // Skip to: 40641 /* 5955 */ MCD_OPC_CheckField, 31, 1, 0, 120, 135, // Skip to: 40641 /* 5961 */ MCD_OPC_CheckField, 10, 1, 0, 114, 135, // Skip to: 40641 /* 5967 */ MCD_OPC_Decode, 240, 13, 56, // Opcode: ST1i16_POST /* 5971 */ MCD_OPC_FilterValue, 1, 106, 135, // Skip to: 40641 /* 5975 */ MCD_OPC_CheckPredicate, 0, 102, 135, // Skip to: 40641 /* 5979 */ MCD_OPC_CheckField, 31, 1, 0, 96, 135, // Skip to: 40641 /* 5985 */ MCD_OPC_CheckField, 10, 1, 0, 90, 135, // Skip to: 40641 /* 5991 */ MCD_OPC_Decode, 134, 14, 57, // Opcode: ST2i16_POST /* 5995 */ MCD_OPC_FilterValue, 3, 51, 0, // Skip to: 6050 /* 5999 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6002 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6026 /* 6006 */ MCD_OPC_CheckPredicate, 0, 71, 135, // Skip to: 40641 /* 6010 */ MCD_OPC_CheckField, 31, 1, 0, 65, 135, // Skip to: 40641 /* 6016 */ MCD_OPC_CheckField, 10, 1, 0, 59, 135, // Skip to: 40641 /* 6022 */ MCD_OPC_Decode, 156, 14, 58, // Opcode: ST3i16_POST /* 6026 */ MCD_OPC_FilterValue, 1, 51, 135, // Skip to: 40641 /* 6030 */ MCD_OPC_CheckPredicate, 0, 47, 135, // Skip to: 40641 /* 6034 */ MCD_OPC_CheckField, 31, 1, 0, 41, 135, // Skip to: 40641 /* 6040 */ MCD_OPC_CheckField, 10, 1, 0, 35, 135, // Skip to: 40641 /* 6046 */ MCD_OPC_Decode, 178, 14, 59, // Opcode: ST4i16_POST /* 6050 */ MCD_OPC_FilterValue, 4, 101, 0, // Skip to: 6155 /* 6054 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 6057 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6100 /* 6061 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6064 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6082 /* 6068 */ MCD_OPC_CheckPredicate, 0, 9, 135, // Skip to: 40641 /* 6072 */ MCD_OPC_CheckField, 31, 1, 0, 3, 135, // Skip to: 40641 /* 6078 */ MCD_OPC_Decode, 242, 13, 60, // Opcode: ST1i32_POST /* 6082 */ MCD_OPC_FilterValue, 1, 251, 134, // Skip to: 40641 /* 6086 */ MCD_OPC_CheckPredicate, 0, 247, 134, // Skip to: 40641 /* 6090 */ MCD_OPC_CheckField, 31, 1, 0, 241, 134, // Skip to: 40641 /* 6096 */ MCD_OPC_Decode, 136, 14, 61, // Opcode: ST2i32_POST /* 6100 */ MCD_OPC_FilterValue, 1, 233, 134, // Skip to: 40641 /* 6104 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6107 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6131 /* 6111 */ MCD_OPC_CheckPredicate, 0, 222, 134, // Skip to: 40641 /* 6115 */ MCD_OPC_CheckField, 31, 1, 0, 216, 134, // Skip to: 40641 /* 6121 */ MCD_OPC_CheckField, 12, 1, 0, 210, 134, // Skip to: 40641 /* 6127 */ MCD_OPC_Decode, 244, 13, 62, // Opcode: ST1i64_POST /* 6131 */ MCD_OPC_FilterValue, 1, 202, 134, // Skip to: 40641 /* 6135 */ MCD_OPC_CheckPredicate, 0, 198, 134, // Skip to: 40641 /* 6139 */ MCD_OPC_CheckField, 31, 1, 0, 192, 134, // Skip to: 40641 /* 6145 */ MCD_OPC_CheckField, 12, 1, 0, 186, 134, // Skip to: 40641 /* 6151 */ MCD_OPC_Decode, 138, 14, 63, // Opcode: ST2i64_POST /* 6155 */ MCD_OPC_FilterValue, 5, 178, 134, // Skip to: 40641 /* 6159 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 6162 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6205 /* 6166 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6169 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6187 /* 6173 */ MCD_OPC_CheckPredicate, 0, 160, 134, // Skip to: 40641 /* 6177 */ MCD_OPC_CheckField, 31, 1, 0, 154, 134, // Skip to: 40641 /* 6183 */ MCD_OPC_Decode, 158, 14, 64, // Opcode: ST3i32_POST /* 6187 */ MCD_OPC_FilterValue, 1, 146, 134, // Skip to: 40641 /* 6191 */ MCD_OPC_CheckPredicate, 0, 142, 134, // Skip to: 40641 /* 6195 */ MCD_OPC_CheckField, 31, 1, 0, 136, 134, // Skip to: 40641 /* 6201 */ MCD_OPC_Decode, 180, 14, 65, // Opcode: ST4i32_POST /* 6205 */ MCD_OPC_FilterValue, 1, 128, 134, // Skip to: 40641 /* 6209 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6212 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6236 /* 6216 */ MCD_OPC_CheckPredicate, 0, 117, 134, // Skip to: 40641 /* 6220 */ MCD_OPC_CheckField, 31, 1, 0, 111, 134, // Skip to: 40641 /* 6226 */ MCD_OPC_CheckField, 12, 1, 0, 105, 134, // Skip to: 40641 /* 6232 */ MCD_OPC_Decode, 160, 14, 66, // Opcode: ST3i64_POST /* 6236 */ MCD_OPC_FilterValue, 1, 97, 134, // Skip to: 40641 /* 6240 */ MCD_OPC_CheckPredicate, 0, 93, 134, // Skip to: 40641 /* 6244 */ MCD_OPC_CheckField, 31, 1, 0, 87, 134, // Skip to: 40641 /* 6250 */ MCD_OPC_CheckField, 12, 1, 0, 81, 134, // Skip to: 40641 /* 6256 */ MCD_OPC_Decode, 182, 14, 67, // Opcode: ST4i64_POST /* 6260 */ MCD_OPC_FilterValue, 1, 73, 134, // Skip to: 40641 /* 6264 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6267 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6275 /* 6271 */ MCD_OPC_Decode, 208, 14, 3, // Opcode: STPSpre /* 6275 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 6283 /* 6279 */ MCD_OPC_Decode, 202, 14, 3, // Opcode: STPDpre /* 6283 */ MCD_OPC_FilterValue, 2, 50, 134, // Skip to: 40641 /* 6287 */ MCD_OPC_Decode, 205, 14, 3, // Opcode: STPQpre /* 6291 */ MCD_OPC_FilterValue, 7, 245, 3, // Skip to: 7308 /* 6295 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 6298 */ MCD_OPC_FilterValue, 0, 207, 3, // Skip to: 7277 /* 6302 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 6305 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6348 /* 6309 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6312 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6330 /* 6316 */ MCD_OPC_CheckPredicate, 0, 17, 134, // Skip to: 40641 /* 6320 */ MCD_OPC_CheckField, 31, 1, 0, 11, 134, // Skip to: 40641 /* 6326 */ MCD_OPC_Decode, 178, 6, 68, // Opcode: LD1i8_POST /* 6330 */ MCD_OPC_FilterValue, 1, 3, 134, // Skip to: 40641 /* 6334 */ MCD_OPC_CheckPredicate, 0, 255, 133, // Skip to: 40641 /* 6338 */ MCD_OPC_CheckField, 31, 1, 0, 249, 133, // Skip to: 40641 /* 6344 */ MCD_OPC_Decode, 216, 6, 69, // Opcode: LD2i8_POST /* 6348 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 6391 /* 6352 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6355 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6373 /* 6359 */ MCD_OPC_CheckPredicate, 0, 230, 133, // Skip to: 40641 /* 6363 */ MCD_OPC_CheckField, 31, 1, 0, 224, 133, // Skip to: 40641 /* 6369 */ MCD_OPC_Decode, 254, 6, 70, // Opcode: LD3i8_POST /* 6373 */ MCD_OPC_FilterValue, 1, 216, 133, // Skip to: 40641 /* 6377 */ MCD_OPC_CheckPredicate, 0, 212, 133, // Skip to: 40641 /* 6381 */ MCD_OPC_CheckField, 31, 1, 0, 206, 133, // Skip to: 40641 /* 6387 */ MCD_OPC_Decode, 164, 7, 71, // Opcode: LD4i8_POST /* 6391 */ MCD_OPC_FilterValue, 2, 51, 0, // Skip to: 6446 /* 6395 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6398 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6422 /* 6402 */ MCD_OPC_CheckPredicate, 0, 187, 133, // Skip to: 40641 /* 6406 */ MCD_OPC_CheckField, 31, 1, 0, 181, 133, // Skip to: 40641 /* 6412 */ MCD_OPC_CheckField, 10, 1, 0, 175, 133, // Skip to: 40641 /* 6418 */ MCD_OPC_Decode, 172, 6, 72, // Opcode: LD1i16_POST /* 6422 */ MCD_OPC_FilterValue, 1, 167, 133, // Skip to: 40641 /* 6426 */ MCD_OPC_CheckPredicate, 0, 163, 133, // Skip to: 40641 /* 6430 */ MCD_OPC_CheckField, 31, 1, 0, 157, 133, // Skip to: 40641 /* 6436 */ MCD_OPC_CheckField, 10, 1, 0, 151, 133, // Skip to: 40641 /* 6442 */ MCD_OPC_Decode, 210, 6, 73, // Opcode: LD2i16_POST /* 6446 */ MCD_OPC_FilterValue, 3, 51, 0, // Skip to: 6501 /* 6450 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6453 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6477 /* 6457 */ MCD_OPC_CheckPredicate, 0, 132, 133, // Skip to: 40641 /* 6461 */ MCD_OPC_CheckField, 31, 1, 0, 126, 133, // Skip to: 40641 /* 6467 */ MCD_OPC_CheckField, 10, 1, 0, 120, 133, // Skip to: 40641 /* 6473 */ MCD_OPC_Decode, 248, 6, 74, // Opcode: LD3i16_POST /* 6477 */ MCD_OPC_FilterValue, 1, 112, 133, // Skip to: 40641 /* 6481 */ MCD_OPC_CheckPredicate, 0, 108, 133, // Skip to: 40641 /* 6485 */ MCD_OPC_CheckField, 31, 1, 0, 102, 133, // Skip to: 40641 /* 6491 */ MCD_OPC_CheckField, 10, 1, 0, 96, 133, // Skip to: 40641 /* 6497 */ MCD_OPC_Decode, 158, 7, 75, // Opcode: LD4i16_POST /* 6501 */ MCD_OPC_FilterValue, 4, 101, 0, // Skip to: 6606 /* 6505 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 6508 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6551 /* 6512 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6515 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6533 /* 6519 */ MCD_OPC_CheckPredicate, 0, 70, 133, // Skip to: 40641 /* 6523 */ MCD_OPC_CheckField, 31, 1, 0, 64, 133, // Skip to: 40641 /* 6529 */ MCD_OPC_Decode, 174, 6, 76, // Opcode: LD1i32_POST /* 6533 */ MCD_OPC_FilterValue, 1, 56, 133, // Skip to: 40641 /* 6537 */ MCD_OPC_CheckPredicate, 0, 52, 133, // Skip to: 40641 /* 6541 */ MCD_OPC_CheckField, 31, 1, 0, 46, 133, // Skip to: 40641 /* 6547 */ MCD_OPC_Decode, 212, 6, 77, // Opcode: LD2i32_POST /* 6551 */ MCD_OPC_FilterValue, 1, 38, 133, // Skip to: 40641 /* 6555 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6558 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6582 /* 6562 */ MCD_OPC_CheckPredicate, 0, 27, 133, // Skip to: 40641 /* 6566 */ MCD_OPC_CheckField, 31, 1, 0, 21, 133, // Skip to: 40641 /* 6572 */ MCD_OPC_CheckField, 12, 1, 0, 15, 133, // Skip to: 40641 /* 6578 */ MCD_OPC_Decode, 176, 6, 78, // Opcode: LD1i64_POST /* 6582 */ MCD_OPC_FilterValue, 1, 7, 133, // Skip to: 40641 /* 6586 */ MCD_OPC_CheckPredicate, 0, 3, 133, // Skip to: 40641 /* 6590 */ MCD_OPC_CheckField, 31, 1, 0, 253, 132, // Skip to: 40641 /* 6596 */ MCD_OPC_CheckField, 12, 1, 0, 247, 132, // Skip to: 40641 /* 6602 */ MCD_OPC_Decode, 214, 6, 79, // Opcode: LD2i64_POST /* 6606 */ MCD_OPC_FilterValue, 5, 101, 0, // Skip to: 6711 /* 6610 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 6613 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6656 /* 6617 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6620 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6638 /* 6624 */ MCD_OPC_CheckPredicate, 0, 221, 132, // Skip to: 40641 /* 6628 */ MCD_OPC_CheckField, 31, 1, 0, 215, 132, // Skip to: 40641 /* 6634 */ MCD_OPC_Decode, 250, 6, 80, // Opcode: LD3i32_POST /* 6638 */ MCD_OPC_FilterValue, 1, 207, 132, // Skip to: 40641 /* 6642 */ MCD_OPC_CheckPredicate, 0, 203, 132, // Skip to: 40641 /* 6646 */ MCD_OPC_CheckField, 31, 1, 0, 197, 132, // Skip to: 40641 /* 6652 */ MCD_OPC_Decode, 160, 7, 81, // Opcode: LD4i32_POST /* 6656 */ MCD_OPC_FilterValue, 1, 189, 132, // Skip to: 40641 /* 6660 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6663 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6687 /* 6667 */ MCD_OPC_CheckPredicate, 0, 178, 132, // Skip to: 40641 /* 6671 */ MCD_OPC_CheckField, 31, 1, 0, 172, 132, // Skip to: 40641 /* 6677 */ MCD_OPC_CheckField, 12, 1, 0, 166, 132, // Skip to: 40641 /* 6683 */ MCD_OPC_Decode, 252, 6, 82, // Opcode: LD3i64_POST /* 6687 */ MCD_OPC_FilterValue, 1, 158, 132, // Skip to: 40641 /* 6691 */ MCD_OPC_CheckPredicate, 0, 154, 132, // Skip to: 40641 /* 6695 */ MCD_OPC_CheckField, 31, 1, 0, 148, 132, // Skip to: 40641 /* 6701 */ MCD_OPC_CheckField, 12, 1, 0, 142, 132, // Skip to: 40641 /* 6707 */ MCD_OPC_Decode, 162, 7, 83, // Opcode: LD4i64_POST /* 6711 */ MCD_OPC_FilterValue, 6, 23, 1, // Skip to: 6994 /* 6715 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ... /* 6718 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 6787 /* 6722 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6725 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6756 /* 6729 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6732 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6744 /* 6736 */ MCD_OPC_CheckPredicate, 0, 109, 132, // Skip to: 40641 /* 6740 */ MCD_OPC_Decode, 136, 6, 14, // Opcode: LD1Rv8b_POST /* 6744 */ MCD_OPC_FilterValue, 1, 101, 132, // Skip to: 40641 /* 6748 */ MCD_OPC_CheckPredicate, 0, 97, 132, // Skip to: 40641 /* 6752 */ MCD_OPC_Decode, 252, 5, 18, // Opcode: LD1Rv16b_POST /* 6756 */ MCD_OPC_FilterValue, 1, 89, 132, // Skip to: 40641 /* 6760 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6763 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6775 /* 6767 */ MCD_OPC_CheckPredicate, 0, 78, 132, // Skip to: 40641 /* 6771 */ MCD_OPC_Decode, 192, 6, 15, // Opcode: LD2Rv8b_POST /* 6775 */ MCD_OPC_FilterValue, 1, 70, 132, // Skip to: 40641 /* 6779 */ MCD_OPC_CheckPredicate, 0, 66, 132, // Skip to: 40641 /* 6783 */ MCD_OPC_Decode, 180, 6, 19, // Opcode: LD2Rv16b_POST /* 6787 */ MCD_OPC_FilterValue, 1, 65, 0, // Skip to: 6856 /* 6791 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6794 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6825 /* 6798 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6801 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6813 /* 6805 */ MCD_OPC_CheckPredicate, 0, 40, 132, // Skip to: 40641 /* 6809 */ MCD_OPC_Decode, 132, 6, 14, // Opcode: LD1Rv4h_POST /* 6813 */ MCD_OPC_FilterValue, 1, 32, 132, // Skip to: 40641 /* 6817 */ MCD_OPC_CheckPredicate, 0, 28, 132, // Skip to: 40641 /* 6821 */ MCD_OPC_Decode, 138, 6, 18, // Opcode: LD1Rv8h_POST /* 6825 */ MCD_OPC_FilterValue, 1, 20, 132, // Skip to: 40641 /* 6829 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6832 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6844 /* 6836 */ MCD_OPC_CheckPredicate, 0, 9, 132, // Skip to: 40641 /* 6840 */ MCD_OPC_Decode, 188, 6, 15, // Opcode: LD2Rv4h_POST /* 6844 */ MCD_OPC_FilterValue, 1, 1, 132, // Skip to: 40641 /* 6848 */ MCD_OPC_CheckPredicate, 0, 253, 131, // Skip to: 40641 /* 6852 */ MCD_OPC_Decode, 194, 6, 19, // Opcode: LD2Rv8h_POST /* 6856 */ MCD_OPC_FilterValue, 2, 65, 0, // Skip to: 6925 /* 6860 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6863 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6894 /* 6867 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6870 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6882 /* 6874 */ MCD_OPC_CheckPredicate, 0, 227, 131, // Skip to: 40641 /* 6878 */ MCD_OPC_Decode, 130, 6, 14, // Opcode: LD1Rv2s_POST /* 6882 */ MCD_OPC_FilterValue, 1, 219, 131, // Skip to: 40641 /* 6886 */ MCD_OPC_CheckPredicate, 0, 215, 131, // Skip to: 40641 /* 6890 */ MCD_OPC_Decode, 134, 6, 18, // Opcode: LD1Rv4s_POST /* 6894 */ MCD_OPC_FilterValue, 1, 207, 131, // Skip to: 40641 /* 6898 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6901 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6913 /* 6905 */ MCD_OPC_CheckPredicate, 0, 196, 131, // Skip to: 40641 /* 6909 */ MCD_OPC_Decode, 186, 6, 15, // Opcode: LD2Rv2s_POST /* 6913 */ MCD_OPC_FilterValue, 1, 188, 131, // Skip to: 40641 /* 6917 */ MCD_OPC_CheckPredicate, 0, 184, 131, // Skip to: 40641 /* 6921 */ MCD_OPC_Decode, 190, 6, 19, // Opcode: LD2Rv4s_POST /* 6925 */ MCD_OPC_FilterValue, 3, 176, 131, // Skip to: 40641 /* 6929 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 6932 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6963 /* 6936 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6939 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6951 /* 6943 */ MCD_OPC_CheckPredicate, 0, 158, 131, // Skip to: 40641 /* 6947 */ MCD_OPC_Decode, 254, 5, 14, // Opcode: LD1Rv1d_POST /* 6951 */ MCD_OPC_FilterValue, 1, 150, 131, // Skip to: 40641 /* 6955 */ MCD_OPC_CheckPredicate, 0, 146, 131, // Skip to: 40641 /* 6959 */ MCD_OPC_Decode, 128, 6, 18, // Opcode: LD1Rv2d_POST /* 6963 */ MCD_OPC_FilterValue, 1, 138, 131, // Skip to: 40641 /* 6967 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 6970 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6982 /* 6974 */ MCD_OPC_CheckPredicate, 0, 127, 131, // Skip to: 40641 /* 6978 */ MCD_OPC_Decode, 182, 6, 15, // Opcode: LD2Rv1d_POST /* 6982 */ MCD_OPC_FilterValue, 1, 119, 131, // Skip to: 40641 /* 6986 */ MCD_OPC_CheckPredicate, 0, 115, 131, // Skip to: 40641 /* 6990 */ MCD_OPC_Decode, 184, 6, 19, // Opcode: LD2Rv2d_POST /* 6994 */ MCD_OPC_FilterValue, 7, 107, 131, // Skip to: 40641 /* 6998 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ... /* 7001 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 7070 /* 7005 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7008 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7039 /* 7012 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7015 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7027 /* 7019 */ MCD_OPC_CheckPredicate, 0, 82, 131, // Skip to: 40641 /* 7023 */ MCD_OPC_Decode, 230, 6, 13, // Opcode: LD3Rv8b_POST /* 7027 */ MCD_OPC_FilterValue, 1, 74, 131, // Skip to: 40641 /* 7031 */ MCD_OPC_CheckPredicate, 0, 70, 131, // Skip to: 40641 /* 7035 */ MCD_OPC_Decode, 218, 6, 17, // Opcode: LD3Rv16b_POST /* 7039 */ MCD_OPC_FilterValue, 1, 62, 131, // Skip to: 40641 /* 7043 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7046 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7058 /* 7050 */ MCD_OPC_CheckPredicate, 0, 51, 131, // Skip to: 40641 /* 7054 */ MCD_OPC_Decode, 154, 7, 12, // Opcode: LD4Rv8b_POST /* 7058 */ MCD_OPC_FilterValue, 1, 43, 131, // Skip to: 40641 /* 7062 */ MCD_OPC_CheckPredicate, 0, 39, 131, // Skip to: 40641 /* 7066 */ MCD_OPC_Decode, 142, 7, 16, // Opcode: LD4Rv16b_POST /* 7070 */ MCD_OPC_FilterValue, 1, 65, 0, // Skip to: 7139 /* 7074 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7077 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7108 /* 7081 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7084 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7096 /* 7088 */ MCD_OPC_CheckPredicate, 0, 13, 131, // Skip to: 40641 /* 7092 */ MCD_OPC_Decode, 226, 6, 13, // Opcode: LD3Rv4h_POST /* 7096 */ MCD_OPC_FilterValue, 1, 5, 131, // Skip to: 40641 /* 7100 */ MCD_OPC_CheckPredicate, 0, 1, 131, // Skip to: 40641 /* 7104 */ MCD_OPC_Decode, 232, 6, 17, // Opcode: LD3Rv8h_POST /* 7108 */ MCD_OPC_FilterValue, 1, 249, 130, // Skip to: 40641 /* 7112 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7115 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7127 /* 7119 */ MCD_OPC_CheckPredicate, 0, 238, 130, // Skip to: 40641 /* 7123 */ MCD_OPC_Decode, 150, 7, 12, // Opcode: LD4Rv4h_POST /* 7127 */ MCD_OPC_FilterValue, 1, 230, 130, // Skip to: 40641 /* 7131 */ MCD_OPC_CheckPredicate, 0, 226, 130, // Skip to: 40641 /* 7135 */ MCD_OPC_Decode, 156, 7, 16, // Opcode: LD4Rv8h_POST /* 7139 */ MCD_OPC_FilterValue, 2, 65, 0, // Skip to: 7208 /* 7143 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7146 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7177 /* 7150 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7153 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7165 /* 7157 */ MCD_OPC_CheckPredicate, 0, 200, 130, // Skip to: 40641 /* 7161 */ MCD_OPC_Decode, 224, 6, 13, // Opcode: LD3Rv2s_POST /* 7165 */ MCD_OPC_FilterValue, 1, 192, 130, // Skip to: 40641 /* 7169 */ MCD_OPC_CheckPredicate, 0, 188, 130, // Skip to: 40641 /* 7173 */ MCD_OPC_Decode, 228, 6, 17, // Opcode: LD3Rv4s_POST /* 7177 */ MCD_OPC_FilterValue, 1, 180, 130, // Skip to: 40641 /* 7181 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7184 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7196 /* 7188 */ MCD_OPC_CheckPredicate, 0, 169, 130, // Skip to: 40641 /* 7192 */ MCD_OPC_Decode, 148, 7, 12, // Opcode: LD4Rv2s_POST /* 7196 */ MCD_OPC_FilterValue, 1, 161, 130, // Skip to: 40641 /* 7200 */ MCD_OPC_CheckPredicate, 0, 157, 130, // Skip to: 40641 /* 7204 */ MCD_OPC_Decode, 152, 7, 16, // Opcode: LD4Rv4s_POST /* 7208 */ MCD_OPC_FilterValue, 3, 149, 130, // Skip to: 40641 /* 7212 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7215 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7246 /* 7219 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7222 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7234 /* 7226 */ MCD_OPC_CheckPredicate, 0, 131, 130, // Skip to: 40641 /* 7230 */ MCD_OPC_Decode, 220, 6, 13, // Opcode: LD3Rv1d_POST /* 7234 */ MCD_OPC_FilterValue, 1, 123, 130, // Skip to: 40641 /* 7238 */ MCD_OPC_CheckPredicate, 0, 119, 130, // Skip to: 40641 /* 7242 */ MCD_OPC_Decode, 222, 6, 17, // Opcode: LD3Rv2d_POST /* 7246 */ MCD_OPC_FilterValue, 1, 111, 130, // Skip to: 40641 /* 7250 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7253 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7265 /* 7257 */ MCD_OPC_CheckPredicate, 0, 100, 130, // Skip to: 40641 /* 7261 */ MCD_OPC_Decode, 144, 7, 12, // Opcode: LD4Rv1d_POST /* 7265 */ MCD_OPC_FilterValue, 1, 92, 130, // Skip to: 40641 /* 7269 */ MCD_OPC_CheckPredicate, 0, 88, 130, // Skip to: 40641 /* 7273 */ MCD_OPC_Decode, 146, 7, 16, // Opcode: LD4Rv2d_POST /* 7277 */ MCD_OPC_FilterValue, 1, 80, 130, // Skip to: 40641 /* 7281 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 7284 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7292 /* 7288 */ MCD_OPC_Decode, 191, 7, 3, // Opcode: LDPSpre /* 7292 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 7300 /* 7296 */ MCD_OPC_Decode, 182, 7, 3, // Opcode: LDPDpre /* 7300 */ MCD_OPC_FilterValue, 2, 57, 130, // Skip to: 40641 /* 7304 */ MCD_OPC_Decode, 185, 7, 3, // Opcode: LDPQpre /* 7308 */ MCD_OPC_FilterValue, 8, 171, 21, // Skip to: 12859 /* 7312 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 7315 */ MCD_OPC_FilterValue, 0, 36, 6, // Skip to: 8891 /* 7319 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 7322 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7353 /* 7326 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7329 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7341 /* 7333 */ MCD_OPC_CheckPredicate, 0, 24, 130, // Skip to: 40641 /* 7337 */ MCD_OPC_Decode, 202, 15, 84, // Opcode: TBLv8i8One /* 7341 */ MCD_OPC_FilterValue, 1, 16, 130, // Skip to: 40641 /* 7345 */ MCD_OPC_CheckPredicate, 0, 12, 130, // Skip to: 40641 /* 7349 */ MCD_OPC_Decode, 247, 9, 85, // Opcode: SADDLv8i8_v8i16 /* 7353 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 7428 /* 7357 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7360 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 7416 /* 7364 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 7367 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 7404 /* 7371 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 7374 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 7392 /* 7378 */ MCD_OPC_CheckPredicate, 0, 235, 129, // Skip to: 40641 /* 7382 */ MCD_OPC_CheckField, 18, 1, 1, 229, 129, // Skip to: 40641 /* 7388 */ MCD_OPC_Decode, 151, 2, 86, // Opcode: DUPv2i32lane /* 7392 */ MCD_OPC_FilterValue, 1, 221, 129, // Skip to: 40641 /* 7396 */ MCD_OPC_CheckPredicate, 0, 217, 129, // Skip to: 40641 /* 7400 */ MCD_OPC_Decode, 155, 2, 87, // Opcode: DUPv4i16lane /* 7404 */ MCD_OPC_FilterValue, 1, 209, 129, // Skip to: 40641 /* 7408 */ MCD_OPC_CheckPredicate, 0, 205, 129, // Skip to: 40641 /* 7412 */ MCD_OPC_Decode, 161, 2, 88, // Opcode: DUPv8i8lane /* 7416 */ MCD_OPC_FilterValue, 1, 197, 129, // Skip to: 40641 /* 7420 */ MCD_OPC_CheckPredicate, 0, 193, 129, // Skip to: 40641 /* 7424 */ MCD_OPC_Decode, 169, 10, 89, // Opcode: SHADDv8i8 /* 7428 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 7446 /* 7432 */ MCD_OPC_CheckPredicate, 0, 181, 129, // Skip to: 40641 /* 7436 */ MCD_OPC_CheckField, 16, 6, 32, 175, 129, // Skip to: 40641 /* 7442 */ MCD_OPC_Decode, 184, 9, 90, // Opcode: REV64v8i8 /* 7446 */ MCD_OPC_FilterValue, 3, 58, 0, // Skip to: 7508 /* 7450 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7453 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 7496 /* 7457 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 7460 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7472 /* 7464 */ MCD_OPC_CheckPredicate, 0, 149, 129, // Skip to: 40641 /* 7468 */ MCD_OPC_Decode, 160, 2, 91, // Opcode: DUPv8i8gpr /* 7472 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7484 /* 7476 */ MCD_OPC_CheckPredicate, 0, 137, 129, // Skip to: 40641 /* 7480 */ MCD_OPC_Decode, 154, 2, 91, // Opcode: DUPv4i16gpr /* 7484 */ MCD_OPC_FilterValue, 4, 129, 129, // Skip to: 40641 /* 7488 */ MCD_OPC_CheckPredicate, 0, 125, 129, // Skip to: 40641 /* 7492 */ MCD_OPC_Decode, 150, 2, 91, // Opcode: DUPv2i32gpr /* 7496 */ MCD_OPC_FilterValue, 1, 117, 129, // Skip to: 40641 /* 7500 */ MCD_OPC_CheckPredicate, 0, 113, 129, // Skip to: 40641 /* 7504 */ MCD_OPC_Decode, 170, 11, 89, // Opcode: SQADDv8i8 /* 7508 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 7539 /* 7512 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7515 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7527 /* 7519 */ MCD_OPC_CheckPredicate, 0, 94, 129, // Skip to: 40641 /* 7523 */ MCD_OPC_Decode, 212, 15, 92, // Opcode: TBXv8i8One /* 7527 */ MCD_OPC_FilterValue, 1, 86, 129, // Skip to: 40641 /* 7531 */ MCD_OPC_CheckPredicate, 0, 82, 129, // Skip to: 40641 /* 7535 */ MCD_OPC_Decode, 253, 9, 93, // Opcode: SADDWv8i8_v8i16 /* 7539 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 7557 /* 7543 */ MCD_OPC_CheckPredicate, 0, 70, 129, // Skip to: 40641 /* 7547 */ MCD_OPC_CheckField, 21, 1, 1, 64, 129, // Skip to: 40641 /* 7553 */ MCD_OPC_Decode, 228, 12, 89, // Opcode: SRHADDv8i8 /* 7557 */ MCD_OPC_FilterValue, 6, 33, 0, // Skip to: 7594 /* 7561 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7564 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7576 /* 7568 */ MCD_OPC_CheckPredicate, 0, 45, 129, // Skip to: 40641 /* 7572 */ MCD_OPC_Decode, 186, 18, 89, // Opcode: UZP1v8i8 /* 7576 */ MCD_OPC_FilterValue, 1, 37, 129, // Skip to: 40641 /* 7580 */ MCD_OPC_CheckPredicate, 0, 33, 129, // Skip to: 40641 /* 7584 */ MCD_OPC_CheckField, 16, 5, 0, 27, 129, // Skip to: 40641 /* 7590 */ MCD_OPC_Decode, 173, 9, 90, // Opcode: REV16v8i8 /* 7594 */ MCD_OPC_FilterValue, 7, 13, 0, // Skip to: 7611 /* 7598 */ MCD_OPC_CheckPredicate, 0, 15, 129, // Skip to: 40641 /* 7602 */ MCD_OPC_CheckField, 21, 1, 1, 9, 129, // Skip to: 40641 /* 7608 */ MCD_OPC_Decode, 100, 89, // Opcode: ANDv8i8 /* 7611 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 7642 /* 7615 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7618 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7630 /* 7622 */ MCD_OPC_CheckPredicate, 0, 247, 128, // Skip to: 40641 /* 7626 */ MCD_OPC_Decode, 204, 15, 94, // Opcode: TBLv8i8Two /* 7630 */ MCD_OPC_FilterValue, 1, 239, 128, // Skip to: 40641 /* 7634 */ MCD_OPC_CheckPredicate, 0, 235, 128, // Skip to: 40641 /* 7638 */ MCD_OPC_Decode, 168, 13, 85, // Opcode: SSUBLv8i8_v8i16 /* 7642 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 7660 /* 7646 */ MCD_OPC_CheckPredicate, 0, 223, 128, // Skip to: 40641 /* 7650 */ MCD_OPC_CheckField, 21, 1, 1, 217, 128, // Skip to: 40641 /* 7656 */ MCD_OPC_Decode, 195, 10, 89, // Opcode: SHSUBv8i8 /* 7660 */ MCD_OPC_FilterValue, 10, 46, 0, // Skip to: 7710 /* 7664 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7667 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7679 /* 7671 */ MCD_OPC_CheckPredicate, 0, 198, 128, // Skip to: 40641 /* 7675 */ MCD_OPC_Decode, 227, 15, 89, // Opcode: TRN1v8i8 /* 7679 */ MCD_OPC_FilterValue, 1, 190, 128, // Skip to: 40641 /* 7683 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 7686 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7698 /* 7690 */ MCD_OPC_CheckPredicate, 0, 179, 128, // Skip to: 40641 /* 7694 */ MCD_OPC_Decode, 236, 9, 90, // Opcode: SADDLPv8i8_v4i16 /* 7698 */ MCD_OPC_FilterValue, 1, 171, 128, // Skip to: 40641 /* 7702 */ MCD_OPC_CheckPredicate, 0, 167, 128, // Skip to: 40641 /* 7706 */ MCD_OPC_Decode, 199, 18, 95, // Opcode: XTNv8i8 /* 7710 */ MCD_OPC_FilterValue, 11, 52, 0, // Skip to: 7766 /* 7714 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7717 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 7754 /* 7721 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 7724 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 7742 /* 7728 */ MCD_OPC_CheckPredicate, 0, 141, 128, // Skip to: 40641 /* 7732 */ MCD_OPC_CheckField, 17, 1, 1, 135, 128, // Skip to: 40641 /* 7738 */ MCD_OPC_Decode, 132, 11, 96, // Opcode: SMOVvi16to32 /* 7742 */ MCD_OPC_FilterValue, 1, 127, 128, // Skip to: 40641 /* 7746 */ MCD_OPC_CheckPredicate, 0, 123, 128, // Skip to: 40641 /* 7750 */ MCD_OPC_Decode, 135, 11, 97, // Opcode: SMOVvi8to32 /* 7754 */ MCD_OPC_FilterValue, 1, 115, 128, // Skip to: 40641 /* 7758 */ MCD_OPC_CheckPredicate, 0, 111, 128, // Skip to: 40641 /* 7762 */ MCD_OPC_Decode, 204, 12, 89, // Opcode: SQSUBv8i8 /* 7766 */ MCD_OPC_FilterValue, 12, 27, 0, // Skip to: 7797 /* 7770 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7773 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7785 /* 7777 */ MCD_OPC_CheckPredicate, 0, 92, 128, // Skip to: 40641 /* 7781 */ MCD_OPC_Decode, 214, 15, 98, // Opcode: TBXv8i8Two /* 7785 */ MCD_OPC_FilterValue, 1, 84, 128, // Skip to: 40641 /* 7789 */ MCD_OPC_CheckPredicate, 0, 80, 128, // Skip to: 40641 /* 7793 */ MCD_OPC_Decode, 174, 13, 93, // Opcode: SSUBWv8i8_v8i16 /* 7797 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 7815 /* 7801 */ MCD_OPC_CheckPredicate, 0, 68, 128, // Skip to: 40641 /* 7805 */ MCD_OPC_CheckField, 21, 1, 1, 62, 128, // Skip to: 40641 /* 7811 */ MCD_OPC_Decode, 206, 1, 89, // Opcode: CMGTv8i8 /* 7815 */ MCD_OPC_FilterValue, 14, 46, 0, // Skip to: 7865 /* 7819 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7822 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7834 /* 7826 */ MCD_OPC_CheckPredicate, 0, 43, 128, // Skip to: 40641 /* 7830 */ MCD_OPC_Decode, 206, 18, 89, // Opcode: ZIP1v8i8 /* 7834 */ MCD_OPC_FilterValue, 1, 35, 128, // Skip to: 40641 /* 7838 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 7841 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7853 /* 7845 */ MCD_OPC_CheckPredicate, 0, 24, 128, // Skip to: 40641 /* 7849 */ MCD_OPC_Decode, 193, 15, 99, // Opcode: SUQADDv8i8 /* 7853 */ MCD_OPC_FilterValue, 16, 16, 128, // Skip to: 40641 /* 7857 */ MCD_OPC_CheckPredicate, 0, 12, 128, // Skip to: 40641 /* 7861 */ MCD_OPC_Decode, 241, 9, 100, // Opcode: SADDLVv8i8v /* 7865 */ MCD_OPC_FilterValue, 15, 71, 0, // Skip to: 7940 /* 7869 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7872 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 7928 /* 7876 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 7879 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 7916 /* 7883 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 7886 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 7904 /* 7890 */ MCD_OPC_CheckPredicate, 0, 235, 127, // Skip to: 40641 /* 7894 */ MCD_OPC_CheckField, 18, 1, 1, 229, 127, // Skip to: 40641 /* 7900 */ MCD_OPC_Decode, 252, 16, 101, // Opcode: UMOVvi32 /* 7904 */ MCD_OPC_FilterValue, 1, 221, 127, // Skip to: 40641 /* 7908 */ MCD_OPC_CheckPredicate, 0, 217, 127, // Skip to: 40641 /* 7912 */ MCD_OPC_Decode, 251, 16, 96, // Opcode: UMOVvi16 /* 7916 */ MCD_OPC_FilterValue, 1, 209, 127, // Skip to: 40641 /* 7920 */ MCD_OPC_CheckPredicate, 0, 205, 127, // Skip to: 40641 /* 7924 */ MCD_OPC_Decode, 254, 16, 97, // Opcode: UMOVvi8 /* 7928 */ MCD_OPC_FilterValue, 1, 197, 127, // Skip to: 40641 /* 7932 */ MCD_OPC_CheckPredicate, 0, 193, 127, // Skip to: 40641 /* 7936 */ MCD_OPC_Decode, 190, 1, 89, // Opcode: CMGEv8i8 /* 7940 */ MCD_OPC_FilterValue, 16, 26, 0, // Skip to: 7970 /* 7944 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 7947 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7959 /* 7951 */ MCD_OPC_CheckPredicate, 0, 174, 127, // Skip to: 40641 /* 7955 */ MCD_OPC_Decode, 203, 15, 102, // Opcode: TBLv8i8Three /* 7959 */ MCD_OPC_FilterValue, 1, 166, 127, // Skip to: 40641 /* 7963 */ MCD_OPC_CheckPredicate, 0, 162, 127, // Skip to: 40641 /* 7967 */ MCD_OPC_Decode, 39, 103, // Opcode: ADDHNv8i16_v8i8 /* 7970 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 7988 /* 7974 */ MCD_OPC_CheckPredicate, 0, 151, 127, // Skip to: 40641 /* 7978 */ MCD_OPC_CheckField, 21, 1, 1, 145, 127, // Skip to: 40641 /* 7984 */ MCD_OPC_Decode, 146, 13, 89, // Opcode: SSHLv8i8 /* 7988 */ MCD_OPC_FilterValue, 18, 27, 0, // Skip to: 8019 /* 7992 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 7995 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8007 /* 7999 */ MCD_OPC_CheckPredicate, 0, 126, 127, // Skip to: 40641 /* 8003 */ MCD_OPC_Decode, 151, 1, 90, // Opcode: CLSv8i8 /* 8007 */ MCD_OPC_FilterValue, 33, 118, 127, // Skip to: 40641 /* 8011 */ MCD_OPC_CheckPredicate, 0, 114, 127, // Skip to: 40641 /* 8015 */ MCD_OPC_Decode, 213, 12, 95, // Opcode: SQXTNv8i8 /* 8019 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 8037 /* 8023 */ MCD_OPC_CheckPredicate, 0, 102, 127, // Skip to: 40641 /* 8027 */ MCD_OPC_CheckField, 21, 1, 1, 96, 127, // Skip to: 40641 /* 8033 */ MCD_OPC_Decode, 174, 12, 89, // Opcode: SQSHLv8i8 /* 8037 */ MCD_OPC_FilterValue, 20, 27, 0, // Skip to: 8068 /* 8041 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8044 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8056 /* 8048 */ MCD_OPC_CheckPredicate, 0, 77, 127, // Skip to: 40641 /* 8052 */ MCD_OPC_Decode, 213, 15, 104, // Opcode: TBXv8i8Three /* 8056 */ MCD_OPC_FilterValue, 1, 69, 127, // Skip to: 40641 /* 8060 */ MCD_OPC_CheckPredicate, 0, 65, 127, // Skip to: 40641 /* 8064 */ MCD_OPC_Decode, 206, 9, 105, // Opcode: SABALv8i8_v8i16 /* 8068 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 8086 /* 8072 */ MCD_OPC_CheckPredicate, 0, 53, 127, // Skip to: 40641 /* 8076 */ MCD_OPC_CheckField, 21, 1, 1, 47, 127, // Skip to: 40641 /* 8082 */ MCD_OPC_Decode, 244, 12, 89, // Opcode: SRSHLv8i8 /* 8086 */ MCD_OPC_FilterValue, 22, 33, 0, // Skip to: 8123 /* 8090 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8093 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8105 /* 8097 */ MCD_OPC_CheckPredicate, 0, 28, 127, // Skip to: 40641 /* 8101 */ MCD_OPC_Decode, 193, 18, 89, // Opcode: UZP2v8i8 /* 8105 */ MCD_OPC_FilterValue, 1, 20, 127, // Skip to: 40641 /* 8109 */ MCD_OPC_CheckPredicate, 0, 16, 127, // Skip to: 40641 /* 8113 */ MCD_OPC_CheckField, 16, 5, 0, 10, 127, // Skip to: 40641 /* 8119 */ MCD_OPC_Decode, 249, 1, 90, // Opcode: CNTv8i8 /* 8123 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 8141 /* 8127 */ MCD_OPC_CheckPredicate, 0, 254, 126, // Skip to: 40641 /* 8131 */ MCD_OPC_CheckField, 21, 1, 1, 248, 126, // Skip to: 40641 /* 8137 */ MCD_OPC_Decode, 252, 11, 89, // Opcode: SQRSHLv8i8 /* 8141 */ MCD_OPC_FilterValue, 24, 27, 0, // Skip to: 8172 /* 8145 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8148 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8160 /* 8152 */ MCD_OPC_CheckPredicate, 0, 229, 126, // Skip to: 40641 /* 8156 */ MCD_OPC_Decode, 201, 15, 106, // Opcode: TBLv8i8Four /* 8160 */ MCD_OPC_FilterValue, 1, 221, 126, // Skip to: 40641 /* 8164 */ MCD_OPC_CheckPredicate, 0, 217, 126, // Skip to: 40641 /* 8168 */ MCD_OPC_Decode, 156, 15, 103, // Opcode: SUBHNv8i16_v8i8 /* 8172 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 8190 /* 8176 */ MCD_OPC_CheckPredicate, 0, 205, 126, // Skip to: 40641 /* 8180 */ MCD_OPC_CheckField, 21, 1, 1, 199, 126, // Skip to: 40641 /* 8186 */ MCD_OPC_Decode, 221, 10, 89, // Opcode: SMAXv8i8 /* 8190 */ MCD_OPC_FilterValue, 26, 46, 0, // Skip to: 8240 /* 8194 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8197 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8209 /* 8201 */ MCD_OPC_CheckPredicate, 0, 180, 126, // Skip to: 40641 /* 8205 */ MCD_OPC_Decode, 234, 15, 89, // Opcode: TRN2v8i8 /* 8209 */ MCD_OPC_FilterValue, 1, 172, 126, // Skip to: 40641 /* 8213 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 8216 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8228 /* 8220 */ MCD_OPC_CheckPredicate, 0, 161, 126, // Skip to: 40641 /* 8224 */ MCD_OPC_Decode, 230, 9, 99, // Opcode: SADALPv8i8_v4i16 /* 8228 */ MCD_OPC_FilterValue, 1, 153, 126, // Skip to: 40641 /* 8232 */ MCD_OPC_CheckPredicate, 0, 149, 126, // Skip to: 40641 /* 8236 */ MCD_OPC_Decode, 199, 3, 95, // Opcode: FCVTNv4i16 /* 8240 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 8258 /* 8244 */ MCD_OPC_CheckPredicate, 0, 137, 126, // Skip to: 40641 /* 8248 */ MCD_OPC_CheckField, 21, 1, 1, 131, 126, // Skip to: 40641 /* 8254 */ MCD_OPC_Decode, 239, 10, 89, // Opcode: SMINv8i8 /* 8258 */ MCD_OPC_FilterValue, 28, 27, 0, // Skip to: 8289 /* 8262 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8265 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8277 /* 8269 */ MCD_OPC_CheckPredicate, 0, 112, 126, // Skip to: 40641 /* 8273 */ MCD_OPC_Decode, 211, 15, 107, // Opcode: TBXv8i8Four /* 8277 */ MCD_OPC_FilterValue, 1, 104, 126, // Skip to: 40641 /* 8281 */ MCD_OPC_CheckPredicate, 0, 100, 126, // Skip to: 40641 /* 8285 */ MCD_OPC_Decode, 218, 9, 85, // Opcode: SABDLv8i8_v8i16 /* 8289 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 8307 /* 8293 */ MCD_OPC_CheckPredicate, 0, 88, 126, // Skip to: 40641 /* 8297 */ MCD_OPC_CheckField, 21, 1, 1, 82, 126, // Skip to: 40641 /* 8303 */ MCD_OPC_Decode, 224, 9, 89, // Opcode: SABDv8i8 /* 8307 */ MCD_OPC_FilterValue, 30, 46, 0, // Skip to: 8357 /* 8311 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8314 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8326 /* 8318 */ MCD_OPC_CheckPredicate, 0, 63, 126, // Skip to: 40641 /* 8322 */ MCD_OPC_Decode, 213, 18, 89, // Opcode: ZIP2v8i8 /* 8326 */ MCD_OPC_FilterValue, 1, 55, 126, // Skip to: 40641 /* 8330 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 8333 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8345 /* 8337 */ MCD_OPC_CheckPredicate, 0, 44, 126, // Skip to: 40641 /* 8341 */ MCD_OPC_Decode, 159, 11, 90, // Opcode: SQABSv8i8 /* 8345 */ MCD_OPC_FilterValue, 1, 36, 126, // Skip to: 40641 /* 8349 */ MCD_OPC_CheckPredicate, 0, 32, 126, // Skip to: 40641 /* 8353 */ MCD_OPC_Decode, 159, 3, 108, // Opcode: FCVTLv4i16 /* 8357 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 8375 /* 8361 */ MCD_OPC_CheckPredicate, 0, 20, 126, // Skip to: 40641 /* 8365 */ MCD_OPC_CheckField, 21, 1, 1, 14, 126, // Skip to: 40641 /* 8371 */ MCD_OPC_Decode, 212, 9, 109, // Opcode: SABAv8i8 /* 8375 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 8393 /* 8379 */ MCD_OPC_CheckPredicate, 0, 2, 126, // Skip to: 40641 /* 8383 */ MCD_OPC_CheckField, 21, 1, 1, 252, 125, // Skip to: 40641 /* 8389 */ MCD_OPC_Decode, 249, 10, 105, // Opcode: SMLALv8i8_v8i16 /* 8393 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 8410 /* 8397 */ MCD_OPC_CheckPredicate, 0, 240, 125, // Skip to: 40641 /* 8401 */ MCD_OPC_CheckField, 21, 1, 1, 234, 125, // Skip to: 40641 /* 8407 */ MCD_OPC_Decode, 78, 89, // Opcode: ADDv8i8 /* 8410 */ MCD_OPC_FilterValue, 34, 27, 0, // Skip to: 8441 /* 8414 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 8417 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8429 /* 8421 */ MCD_OPC_CheckPredicate, 0, 216, 125, // Skip to: 40641 /* 8425 */ MCD_OPC_Decode, 207, 1, 90, // Opcode: CMGTv8i8rz /* 8429 */ MCD_OPC_FilterValue, 33, 208, 125, // Skip to: 40641 /* 8433 */ MCD_OPC_CheckPredicate, 0, 204, 125, // Skip to: 40641 /* 8437 */ MCD_OPC_Decode, 169, 5, 90, // Opcode: FRINTNv2f32 /* 8441 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 8459 /* 8445 */ MCD_OPC_CheckPredicate, 0, 192, 125, // Skip to: 40641 /* 8449 */ MCD_OPC_CheckField, 21, 1, 1, 186, 125, // Skip to: 40641 /* 8455 */ MCD_OPC_Decode, 247, 1, 89, // Opcode: CMTSTv8i8 /* 8459 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 8477 /* 8463 */ MCD_OPC_CheckPredicate, 0, 174, 125, // Skip to: 40641 /* 8467 */ MCD_OPC_CheckField, 21, 1, 1, 168, 125, // Skip to: 40641 /* 8473 */ MCD_OPC_Decode, 191, 8, 109, // Opcode: MLAv8i8 /* 8477 */ MCD_OPC_FilterValue, 38, 27, 0, // Skip to: 8508 /* 8481 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 8484 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8496 /* 8488 */ MCD_OPC_CheckPredicate, 0, 149, 125, // Skip to: 40641 /* 8492 */ MCD_OPC_Decode, 175, 1, 90, // Opcode: CMEQv8i8rz /* 8496 */ MCD_OPC_FilterValue, 33, 141, 125, // Skip to: 40641 /* 8500 */ MCD_OPC_CheckPredicate, 0, 137, 125, // Skip to: 40641 /* 8504 */ MCD_OPC_Decode, 164, 5, 90, // Opcode: FRINTMv2f32 /* 8508 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 8526 /* 8512 */ MCD_OPC_CheckPredicate, 0, 125, 125, // Skip to: 40641 /* 8516 */ MCD_OPC_CheckField, 21, 1, 1, 119, 125, // Skip to: 40641 /* 8522 */ MCD_OPC_Decode, 240, 8, 89, // Opcode: MULv8i8 /* 8526 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 8544 /* 8530 */ MCD_OPC_CheckPredicate, 0, 107, 125, // Skip to: 40641 /* 8534 */ MCD_OPC_CheckField, 21, 1, 1, 101, 125, // Skip to: 40641 /* 8540 */ MCD_OPC_Decode, 131, 11, 105, // Opcode: SMLSLv8i8_v8i16 /* 8544 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 8562 /* 8548 */ MCD_OPC_CheckPredicate, 0, 89, 125, // Skip to: 40641 /* 8552 */ MCD_OPC_CheckField, 21, 1, 1, 83, 125, // Skip to: 40641 /* 8558 */ MCD_OPC_Decode, 210, 10, 89, // Opcode: SMAXPv8i8 /* 8562 */ MCD_OPC_FilterValue, 42, 51, 0, // Skip to: 8617 /* 8566 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 8569 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8581 /* 8573 */ MCD_OPC_CheckPredicate, 0, 64, 125, // Skip to: 40641 /* 8577 */ MCD_OPC_Decode, 239, 1, 90, // Opcode: CMLTv8i8rz /* 8581 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 8593 /* 8585 */ MCD_OPC_CheckPredicate, 0, 52, 125, // Skip to: 40641 /* 8589 */ MCD_OPC_Decode, 186, 3, 90, // Opcode: FCVTNSv2f32 /* 8593 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 8605 /* 8597 */ MCD_OPC_CheckPredicate, 0, 40, 125, // Skip to: 40641 /* 8601 */ MCD_OPC_Decode, 215, 10, 110, // Opcode: SMAXVv8i8v /* 8605 */ MCD_OPC_FilterValue, 49, 32, 125, // Skip to: 40641 /* 8609 */ MCD_OPC_CheckPredicate, 0, 28, 125, // Skip to: 40641 /* 8613 */ MCD_OPC_Decode, 233, 10, 110, // Opcode: SMINVv8i8v /* 8617 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 8635 /* 8621 */ MCD_OPC_CheckPredicate, 0, 16, 125, // Skip to: 40641 /* 8625 */ MCD_OPC_CheckField, 21, 1, 1, 10, 125, // Skip to: 40641 /* 8631 */ MCD_OPC_Decode, 228, 10, 89, // Opcode: SMINPv8i8 /* 8635 */ MCD_OPC_FilterValue, 46, 37, 0, // Skip to: 8676 /* 8639 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 8642 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 8653 /* 8646 */ MCD_OPC_CheckPredicate, 0, 247, 124, // Skip to: 40641 /* 8650 */ MCD_OPC_Decode, 29, 90, // Opcode: ABSv8i8 /* 8653 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 8665 /* 8657 */ MCD_OPC_CheckPredicate, 0, 236, 124, // Skip to: 40641 /* 8661 */ MCD_OPC_Decode, 168, 3, 90, // Opcode: FCVTMSv2f32 /* 8665 */ MCD_OPC_FilterValue, 49, 228, 124, // Skip to: 40641 /* 8669 */ MCD_OPC_CheckPredicate, 0, 224, 124, // Skip to: 40641 /* 8673 */ MCD_OPC_Decode, 61, 110, // Opcode: ADDVv8i8v /* 8676 */ MCD_OPC_FilterValue, 47, 13, 0, // Skip to: 8693 /* 8680 */ MCD_OPC_CheckPredicate, 0, 213, 124, // Skip to: 40641 /* 8684 */ MCD_OPC_CheckField, 21, 1, 1, 207, 124, // Skip to: 40641 /* 8690 */ MCD_OPC_Decode, 47, 89, // Opcode: ADDPv8i8 /* 8693 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 8711 /* 8697 */ MCD_OPC_CheckPredicate, 0, 196, 124, // Skip to: 40641 /* 8701 */ MCD_OPC_CheckField, 21, 1, 1, 190, 124, // Skip to: 40641 /* 8707 */ MCD_OPC_Decode, 148, 11, 85, // Opcode: SMULLv8i8_v8i16 /* 8711 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 8729 /* 8715 */ MCD_OPC_CheckPredicate, 0, 178, 124, // Skip to: 40641 /* 8719 */ MCD_OPC_CheckField, 21, 1, 1, 172, 124, // Skip to: 40641 /* 8725 */ MCD_OPC_Decode, 171, 4, 89, // Opcode: FMAXNMv2f32 /* 8729 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 8747 /* 8733 */ MCD_OPC_CheckPredicate, 0, 160, 124, // Skip to: 40641 /* 8737 */ MCD_OPC_CheckField, 16, 6, 33, 154, 124, // Skip to: 40641 /* 8743 */ MCD_OPC_Decode, 142, 3, 90, // Opcode: FCVTASv2f32 /* 8747 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 8765 /* 8751 */ MCD_OPC_CheckPredicate, 0, 142, 124, // Skip to: 40641 /* 8755 */ MCD_OPC_CheckField, 21, 1, 1, 136, 124, // Skip to: 40641 /* 8761 */ MCD_OPC_Decode, 208, 4, 109, // Opcode: FMLAv2f32 /* 8765 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 8783 /* 8769 */ MCD_OPC_CheckPredicate, 0, 124, 124, // Skip to: 40641 /* 8773 */ MCD_OPC_CheckField, 21, 1, 1, 118, 124, // Skip to: 40641 /* 8779 */ MCD_OPC_Decode, 207, 2, 89, // Opcode: FADDv2f32 /* 8783 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 8801 /* 8787 */ MCD_OPC_CheckPredicate, 0, 106, 124, // Skip to: 40641 /* 8791 */ MCD_OPC_CheckField, 16, 6, 33, 100, 124, // Skip to: 40641 /* 8797 */ MCD_OPC_Decode, 144, 10, 90, // Opcode: SCVTFv2f32 /* 8801 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 8819 /* 8805 */ MCD_OPC_CheckPredicate, 0, 88, 124, // Skip to: 40641 /* 8809 */ MCD_OPC_CheckField, 21, 1, 1, 82, 124, // Skip to: 40641 /* 8815 */ MCD_OPC_Decode, 243, 4, 89, // Opcode: FMULXv2f32 /* 8819 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 8837 /* 8823 */ MCD_OPC_CheckPredicate, 0, 70, 124, // Skip to: 40641 /* 8827 */ MCD_OPC_CheckField, 21, 1, 1, 64, 124, // Skip to: 40641 /* 8833 */ MCD_OPC_Decode, 150, 9, 85, // Opcode: PMULLv8i8 /* 8837 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 8855 /* 8841 */ MCD_OPC_CheckPredicate, 0, 52, 124, // Skip to: 40641 /* 8845 */ MCD_OPC_CheckField, 21, 1, 1, 46, 124, // Skip to: 40641 /* 8851 */ MCD_OPC_Decode, 218, 2, 89, // Opcode: FCMEQv2f32 /* 8855 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 8873 /* 8859 */ MCD_OPC_CheckPredicate, 0, 34, 124, // Skip to: 40641 /* 8863 */ MCD_OPC_CheckField, 21, 1, 1, 28, 124, // Skip to: 40641 /* 8869 */ MCD_OPC_Decode, 181, 4, 89, // Opcode: FMAXv2f32 /* 8873 */ MCD_OPC_FilterValue, 63, 20, 124, // Skip to: 40641 /* 8877 */ MCD_OPC_CheckPredicate, 0, 16, 124, // Skip to: 40641 /* 8881 */ MCD_OPC_CheckField, 21, 1, 1, 10, 124, // Skip to: 40641 /* 8887 */ MCD_OPC_Decode, 147, 5, 89, // Opcode: FRECPSv2f32 /* 8891 */ MCD_OPC_FilterValue, 1, 85, 4, // Skip to: 10004 /* 8895 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ... /* 8898 */ MCD_OPC_FilterValue, 0, 64, 1, // Skip to: 9222 /* 8902 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 8905 */ MCD_OPC_FilterValue, 0, 162, 0, // Skip to: 9071 /* 8909 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 8912 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8924 /* 8916 */ MCD_OPC_CheckPredicate, 0, 233, 123, // Skip to: 40641 /* 8920 */ MCD_OPC_Decode, 178, 2, 111, // Opcode: EXTv8i8 /* 8924 */ MCD_OPC_FilterValue, 1, 225, 123, // Skip to: 40641 /* 8928 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 8931 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8943 /* 8935 */ MCD_OPC_CheckPredicate, 0, 214, 123, // Skip to: 40641 /* 8939 */ MCD_OPC_Decode, 153, 16, 85, // Opcode: UADDLv8i8_v8i16 /* 8943 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 8961 /* 8947 */ MCD_OPC_CheckPredicate, 0, 202, 123, // Skip to: 40641 /* 8951 */ MCD_OPC_CheckField, 16, 5, 0, 196, 123, // Skip to: 40641 /* 8957 */ MCD_OPC_Decode, 178, 9, 90, // Opcode: REV32v8i8 /* 8961 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 8973 /* 8965 */ MCD_OPC_CheckPredicate, 0, 184, 123, // Skip to: 40641 /* 8969 */ MCD_OPC_Decode, 159, 16, 93, // Opcode: UADDWv8i8_v8i16 /* 8973 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 8985 /* 8977 */ MCD_OPC_CheckPredicate, 0, 172, 123, // Skip to: 40641 /* 8981 */ MCD_OPC_Decode, 173, 18, 85, // Opcode: USUBLv8i8_v8i16 /* 8985 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 9016 /* 8989 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 8992 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9004 /* 8996 */ MCD_OPC_CheckPredicate, 0, 153, 123, // Skip to: 40641 /* 9000 */ MCD_OPC_Decode, 142, 16, 90, // Opcode: UADDLPv8i8_v4i16 /* 9004 */ MCD_OPC_FilterValue, 1, 145, 123, // Skip to: 40641 /* 9008 */ MCD_OPC_CheckPredicate, 0, 141, 123, // Skip to: 40641 /* 9012 */ MCD_OPC_Decode, 222, 12, 95, // Opcode: SQXTUNv8i8 /* 9016 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 9028 /* 9020 */ MCD_OPC_CheckPredicate, 0, 129, 123, // Skip to: 40641 /* 9024 */ MCD_OPC_Decode, 179, 18, 93, // Opcode: USUBWv8i8_v8i16 /* 9028 */ MCD_OPC_FilterValue, 7, 121, 123, // Skip to: 40641 /* 9032 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 9035 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9047 /* 9039 */ MCD_OPC_CheckPredicate, 0, 110, 123, // Skip to: 40641 /* 9043 */ MCD_OPC_Decode, 159, 18, 99, // Opcode: USQADDv8i8 /* 9047 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 9059 /* 9051 */ MCD_OPC_CheckPredicate, 0, 98, 123, // Skip to: 40641 /* 9055 */ MCD_OPC_Decode, 175, 10, 108, // Opcode: SHLLv8i8 /* 9059 */ MCD_OPC_FilterValue, 16, 90, 123, // Skip to: 40641 /* 9063 */ MCD_OPC_CheckPredicate, 0, 86, 123, // Skip to: 40641 /* 9067 */ MCD_OPC_Decode, 147, 16, 100, // Opcode: UADDLVv8i8v /* 9071 */ MCD_OPC_FilterValue, 1, 78, 123, // Skip to: 40641 /* 9075 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 9078 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9096 /* 9082 */ MCD_OPC_CheckPredicate, 0, 67, 123, // Skip to: 40641 /* 9086 */ MCD_OPC_CheckField, 21, 1, 1, 61, 123, // Skip to: 40641 /* 9092 */ MCD_OPC_Decode, 189, 16, 89, // Opcode: UHADDv8i8 /* 9096 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9114 /* 9100 */ MCD_OPC_CheckPredicate, 0, 49, 123, // Skip to: 40641 /* 9104 */ MCD_OPC_CheckField, 21, 1, 1, 43, 123, // Skip to: 40641 /* 9110 */ MCD_OPC_Decode, 149, 17, 89, // Opcode: UQADDv8i8 /* 9114 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 9132 /* 9118 */ MCD_OPC_CheckPredicate, 0, 31, 123, // Skip to: 40641 /* 9122 */ MCD_OPC_CheckField, 21, 1, 1, 25, 123, // Skip to: 40641 /* 9128 */ MCD_OPC_Decode, 228, 17, 89, // Opcode: URHADDv8i8 /* 9132 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 9150 /* 9136 */ MCD_OPC_CheckPredicate, 0, 13, 123, // Skip to: 40641 /* 9140 */ MCD_OPC_CheckField, 21, 1, 1, 7, 123, // Skip to: 40641 /* 9146 */ MCD_OPC_Decode, 173, 2, 89, // Opcode: EORv8i8 /* 9150 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 9168 /* 9154 */ MCD_OPC_CheckPredicate, 0, 251, 122, // Skip to: 40641 /* 9158 */ MCD_OPC_CheckField, 21, 1, 1, 245, 122, // Skip to: 40641 /* 9164 */ MCD_OPC_Decode, 195, 16, 89, // Opcode: UHSUBv8i8 /* 9168 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9186 /* 9172 */ MCD_OPC_CheckPredicate, 0, 233, 122, // Skip to: 40641 /* 9176 */ MCD_OPC_CheckField, 21, 1, 1, 227, 122, // Skip to: 40641 /* 9182 */ MCD_OPC_Decode, 211, 17, 89, // Opcode: UQSUBv8i8 /* 9186 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 9204 /* 9190 */ MCD_OPC_CheckPredicate, 0, 215, 122, // Skip to: 40641 /* 9194 */ MCD_OPC_CheckField, 21, 1, 1, 209, 122, // Skip to: 40641 /* 9200 */ MCD_OPC_Decode, 215, 1, 89, // Opcode: CMHIv8i8 /* 9204 */ MCD_OPC_FilterValue, 7, 201, 122, // Skip to: 40641 /* 9208 */ MCD_OPC_CheckPredicate, 0, 197, 122, // Skip to: 40641 /* 9212 */ MCD_OPC_CheckField, 21, 1, 1, 191, 122, // Skip to: 40641 /* 9218 */ MCD_OPC_Decode, 223, 1, 89, // Opcode: CMHSv8i8 /* 9222 */ MCD_OPC_FilterValue, 1, 48, 1, // Skip to: 9530 /* 9226 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ... /* 9229 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9247 /* 9233 */ MCD_OPC_CheckPredicate, 0, 172, 122, // Skip to: 40641 /* 9237 */ MCD_OPC_CheckField, 21, 1, 1, 166, 122, // Skip to: 40641 /* 9243 */ MCD_OPC_Decode, 163, 9, 103, // Opcode: RADDHNv8i16_v8i8 /* 9247 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9265 /* 9251 */ MCD_OPC_CheckPredicate, 0, 154, 122, // Skip to: 40641 /* 9255 */ MCD_OPC_CheckField, 21, 1, 1, 148, 122, // Skip to: 40641 /* 9261 */ MCD_OPC_Decode, 140, 18, 89, // Opcode: USHLv8i8 /* 9265 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 9296 /* 9269 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 9272 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9284 /* 9276 */ MCD_OPC_CheckPredicate, 0, 129, 122, // Skip to: 40641 /* 9280 */ MCD_OPC_Decode, 159, 1, 90, // Opcode: CLZv8i8 /* 9284 */ MCD_OPC_FilterValue, 33, 121, 122, // Skip to: 40641 /* 9288 */ MCD_OPC_CheckPredicate, 0, 117, 122, // Skip to: 40641 /* 9292 */ MCD_OPC_Decode, 220, 17, 95, // Opcode: UQXTNv8i8 /* 9296 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 9314 /* 9300 */ MCD_OPC_CheckPredicate, 0, 105, 122, // Skip to: 40641 /* 9304 */ MCD_OPC_CheckField, 21, 1, 1, 99, 122, // Skip to: 40641 /* 9310 */ MCD_OPC_Decode, 190, 17, 89, // Opcode: UQSHLv8i8 /* 9314 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 9332 /* 9318 */ MCD_OPC_CheckPredicate, 0, 87, 122, // Skip to: 40641 /* 9322 */ MCD_OPC_CheckField, 21, 1, 1, 81, 122, // Skip to: 40641 /* 9328 */ MCD_OPC_Decode, 240, 15, 105, // Opcode: UABALv8i8_v8i16 /* 9332 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9350 /* 9336 */ MCD_OPC_CheckPredicate, 0, 69, 122, // Skip to: 40641 /* 9340 */ MCD_OPC_CheckField, 21, 1, 1, 63, 122, // Skip to: 40641 /* 9346 */ MCD_OPC_Decode, 236, 17, 89, // Opcode: URSHLv8i8 /* 9350 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 9368 /* 9354 */ MCD_OPC_CheckPredicate, 0, 51, 122, // Skip to: 40641 /* 9358 */ MCD_OPC_CheckField, 16, 6, 32, 45, 122, // Skip to: 40641 /* 9364 */ MCD_OPC_Decode, 128, 9, 90, // Opcode: NOTv8i8 /* 9368 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 9386 /* 9372 */ MCD_OPC_CheckPredicate, 0, 33, 122, // Skip to: 40641 /* 9376 */ MCD_OPC_CheckField, 21, 1, 1, 27, 122, // Skip to: 40641 /* 9382 */ MCD_OPC_Decode, 160, 17, 89, // Opcode: UQRSHLv8i8 /* 9386 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 9404 /* 9390 */ MCD_OPC_CheckPredicate, 0, 15, 122, // Skip to: 40641 /* 9394 */ MCD_OPC_CheckField, 21, 1, 1, 9, 122, // Skip to: 40641 /* 9400 */ MCD_OPC_Decode, 200, 9, 103, // Opcode: RSUBHNv8i16_v8i8 /* 9404 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 9422 /* 9408 */ MCD_OPC_CheckPredicate, 0, 253, 121, // Skip to: 40641 /* 9412 */ MCD_OPC_CheckField, 21, 1, 1, 247, 121, // Skip to: 40641 /* 9418 */ MCD_OPC_Decode, 213, 16, 89, // Opcode: UMAXv8i8 /* 9422 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 9440 /* 9426 */ MCD_OPC_CheckPredicate, 0, 235, 121, // Skip to: 40641 /* 9430 */ MCD_OPC_CheckField, 16, 6, 32, 229, 121, // Skip to: 40641 /* 9436 */ MCD_OPC_Decode, 136, 16, 99, // Opcode: UADALPv8i8_v4i16 /* 9440 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 9458 /* 9444 */ MCD_OPC_CheckPredicate, 0, 217, 121, // Skip to: 40641 /* 9448 */ MCD_OPC_CheckField, 21, 1, 1, 211, 121, // Skip to: 40641 /* 9454 */ MCD_OPC_Decode, 230, 16, 89, // Opcode: UMINv8i8 /* 9458 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 9476 /* 9462 */ MCD_OPC_CheckPredicate, 0, 199, 121, // Skip to: 40641 /* 9466 */ MCD_OPC_CheckField, 21, 1, 1, 193, 121, // Skip to: 40641 /* 9472 */ MCD_OPC_Decode, 252, 15, 85, // Opcode: UABDLv8i8_v8i16 /* 9476 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 9494 /* 9480 */ MCD_OPC_CheckPredicate, 0, 181, 121, // Skip to: 40641 /* 9484 */ MCD_OPC_CheckField, 21, 1, 1, 175, 121, // Skip to: 40641 /* 9490 */ MCD_OPC_Decode, 130, 16, 89, // Opcode: UABDv8i8 /* 9494 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 9512 /* 9498 */ MCD_OPC_CheckPredicate, 0, 163, 121, // Skip to: 40641 /* 9502 */ MCD_OPC_CheckField, 16, 6, 32, 157, 121, // Skip to: 40641 /* 9508 */ MCD_OPC_Decode, 229, 11, 90, // Opcode: SQNEGv8i8 /* 9512 */ MCD_OPC_FilterValue, 15, 149, 121, // Skip to: 40641 /* 9516 */ MCD_OPC_CheckPredicate, 0, 145, 121, // Skip to: 40641 /* 9520 */ MCD_OPC_CheckField, 21, 1, 1, 139, 121, // Skip to: 40641 /* 9526 */ MCD_OPC_Decode, 246, 15, 109, // Opcode: UABAv8i8 /* 9530 */ MCD_OPC_FilterValue, 2, 27, 1, // Skip to: 9817 /* 9534 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ... /* 9537 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9555 /* 9541 */ MCD_OPC_CheckPredicate, 0, 120, 121, // Skip to: 40641 /* 9545 */ MCD_OPC_CheckField, 21, 1, 1, 114, 121, // Skip to: 40641 /* 9551 */ MCD_OPC_Decode, 240, 16, 105, // Opcode: UMLALv8i8_v8i16 /* 9555 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9573 /* 9559 */ MCD_OPC_CheckPredicate, 0, 102, 121, // Skip to: 40641 /* 9563 */ MCD_OPC_CheckField, 21, 1, 1, 96, 121, // Skip to: 40641 /* 9569 */ MCD_OPC_Decode, 182, 15, 89, // Opcode: SUBv8i8 /* 9573 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 9604 /* 9577 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 9580 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9592 /* 9584 */ MCD_OPC_CheckPredicate, 0, 77, 121, // Skip to: 40641 /* 9588 */ MCD_OPC_Decode, 191, 1, 90, // Opcode: CMGEv8i8rz /* 9592 */ MCD_OPC_FilterValue, 33, 69, 121, // Skip to: 40641 /* 9596 */ MCD_OPC_CheckPredicate, 0, 65, 121, // Skip to: 40641 /* 9600 */ MCD_OPC_Decode, 154, 5, 90, // Opcode: FRINTAv2f32 /* 9604 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 9622 /* 9608 */ MCD_OPC_CheckPredicate, 0, 53, 121, // Skip to: 40641 /* 9612 */ MCD_OPC_CheckField, 21, 1, 1, 47, 121, // Skip to: 40641 /* 9618 */ MCD_OPC_Decode, 174, 1, 89, // Opcode: CMEQv8i8 /* 9622 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9640 /* 9626 */ MCD_OPC_CheckPredicate, 0, 35, 121, // Skip to: 40641 /* 9630 */ MCD_OPC_CheckField, 21, 1, 1, 29, 121, // Skip to: 40641 /* 9636 */ MCD_OPC_Decode, 201, 8, 109, // Opcode: MLSv8i8 /* 9640 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 9671 /* 9644 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 9647 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9659 /* 9651 */ MCD_OPC_CheckPredicate, 0, 10, 121, // Skip to: 40641 /* 9655 */ MCD_OPC_Decode, 231, 1, 90, // Opcode: CMLEv8i8rz /* 9659 */ MCD_OPC_FilterValue, 33, 2, 121, // Skip to: 40641 /* 9663 */ MCD_OPC_CheckPredicate, 0, 254, 120, // Skip to: 40641 /* 9667 */ MCD_OPC_Decode, 179, 5, 90, // Opcode: FRINTXv2f32 /* 9671 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 9689 /* 9675 */ MCD_OPC_CheckPredicate, 0, 242, 120, // Skip to: 40641 /* 9679 */ MCD_OPC_CheckField, 21, 1, 1, 236, 120, // Skip to: 40641 /* 9685 */ MCD_OPC_Decode, 152, 9, 89, // Opcode: PMULv8i8 /* 9689 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 9707 /* 9693 */ MCD_OPC_CheckPredicate, 0, 224, 120, // Skip to: 40641 /* 9697 */ MCD_OPC_CheckField, 21, 1, 1, 218, 120, // Skip to: 40641 /* 9703 */ MCD_OPC_Decode, 250, 16, 105, // Opcode: UMLSLv8i8_v8i16 /* 9707 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 9725 /* 9711 */ MCD_OPC_CheckPredicate, 0, 206, 120, // Skip to: 40641 /* 9715 */ MCD_OPC_CheckField, 21, 1, 1, 200, 120, // Skip to: 40641 /* 9721 */ MCD_OPC_Decode, 202, 16, 89, // Opcode: UMAXPv8i8 /* 9725 */ MCD_OPC_FilterValue, 10, 39, 0, // Skip to: 9768 /* 9729 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 9732 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 9744 /* 9736 */ MCD_OPC_CheckPredicate, 0, 181, 120, // Skip to: 40641 /* 9740 */ MCD_OPC_Decode, 195, 3, 90, // Opcode: FCVTNUv2f32 /* 9744 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 9756 /* 9748 */ MCD_OPC_CheckPredicate, 0, 169, 120, // Skip to: 40641 /* 9752 */ MCD_OPC_Decode, 207, 16, 110, // Opcode: UMAXVv8i8v /* 9756 */ MCD_OPC_FilterValue, 49, 161, 120, // Skip to: 40641 /* 9760 */ MCD_OPC_CheckPredicate, 0, 157, 120, // Skip to: 40641 /* 9764 */ MCD_OPC_Decode, 224, 16, 110, // Opcode: UMINVv8i8v /* 9768 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 9786 /* 9772 */ MCD_OPC_CheckPredicate, 0, 145, 120, // Skip to: 40641 /* 9776 */ MCD_OPC_CheckField, 21, 1, 1, 139, 120, // Skip to: 40641 /* 9782 */ MCD_OPC_Decode, 219, 16, 89, // Opcode: UMINPv8i8 /* 9786 */ MCD_OPC_FilterValue, 14, 131, 120, // Skip to: 40641 /* 9790 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 9793 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9805 /* 9797 */ MCD_OPC_CheckPredicate, 0, 120, 120, // Skip to: 40641 /* 9801 */ MCD_OPC_Decode, 254, 8, 90, // Opcode: NEGv8i8 /* 9805 */ MCD_OPC_FilterValue, 33, 112, 120, // Skip to: 40641 /* 9809 */ MCD_OPC_CheckPredicate, 0, 108, 120, // Skip to: 40641 /* 9813 */ MCD_OPC_Decode, 177, 3, 90, // Opcode: FCVTMUv2f32 /* 9817 */ MCD_OPC_FilterValue, 3, 100, 120, // Skip to: 40641 /* 9821 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ... /* 9824 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9842 /* 9828 */ MCD_OPC_CheckPredicate, 0, 89, 120, // Skip to: 40641 /* 9832 */ MCD_OPC_CheckField, 21, 1, 1, 83, 120, // Skip to: 40641 /* 9838 */ MCD_OPC_Decode, 138, 17, 85, // Opcode: UMULLv8i8_v8i16 /* 9842 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9860 /* 9846 */ MCD_OPC_CheckPredicate, 0, 71, 120, // Skip to: 40641 /* 9850 */ MCD_OPC_CheckField, 21, 1, 1, 65, 120, // Skip to: 40641 /* 9856 */ MCD_OPC_Decode, 164, 4, 89, // Opcode: FMAXNMPv2f32 /* 9860 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 9878 /* 9864 */ MCD_OPC_CheckPredicate, 0, 53, 120, // Skip to: 40641 /* 9868 */ MCD_OPC_CheckField, 16, 6, 33, 47, 120, // Skip to: 40641 /* 9874 */ MCD_OPC_Decode, 151, 3, 90, // Opcode: FCVTAUv2f32 /* 9878 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9896 /* 9882 */ MCD_OPC_CheckPredicate, 0, 35, 120, // Skip to: 40641 /* 9886 */ MCD_OPC_CheckField, 21, 1, 1, 29, 120, // Skip to: 40641 /* 9892 */ MCD_OPC_Decode, 201, 2, 89, // Opcode: FADDPv2f32 /* 9896 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 9914 /* 9900 */ MCD_OPC_CheckPredicate, 0, 17, 120, // Skip to: 40641 /* 9904 */ MCD_OPC_CheckField, 16, 6, 33, 11, 120, // Skip to: 40641 /* 9910 */ MCD_OPC_Decode, 174, 16, 90, // Opcode: UCVTFv2f32 /* 9914 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 9932 /* 9918 */ MCD_OPC_CheckPredicate, 0, 255, 119, // Skip to: 40641 /* 9922 */ MCD_OPC_CheckField, 21, 1, 1, 249, 119, // Skip to: 40641 /* 9928 */ MCD_OPC_Decode, 251, 4, 89, // Opcode: FMULv2f32 /* 9932 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 9950 /* 9936 */ MCD_OPC_CheckPredicate, 0, 237, 119, // Skip to: 40641 /* 9940 */ MCD_OPC_CheckField, 21, 1, 1, 231, 119, // Skip to: 40641 /* 9946 */ MCD_OPC_Decode, 228, 2, 89, // Opcode: FCMGEv2f32 /* 9950 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 9968 /* 9954 */ MCD_OPC_CheckPredicate, 0, 219, 119, // Skip to: 40641 /* 9958 */ MCD_OPC_CheckField, 21, 1, 1, 213, 119, // Skip to: 40641 /* 9964 */ MCD_OPC_Decode, 192, 2, 89, // Opcode: FACGEv2f32 /* 9968 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 9986 /* 9972 */ MCD_OPC_CheckPredicate, 0, 201, 119, // Skip to: 40641 /* 9976 */ MCD_OPC_CheckField, 21, 1, 1, 195, 119, // Skip to: 40641 /* 9982 */ MCD_OPC_Decode, 174, 4, 89, // Opcode: FMAXPv2f32 /* 9986 */ MCD_OPC_FilterValue, 15, 187, 119, // Skip to: 40641 /* 9990 */ MCD_OPC_CheckPredicate, 0, 183, 119, // Skip to: 40641 /* 9994 */ MCD_OPC_CheckField, 21, 1, 1, 177, 119, // Skip to: 40641 /* 10000 */ MCD_OPC_Decode, 157, 4, 89, // Opcode: FDIVv2f32 /* 10004 */ MCD_OPC_FilterValue, 2, 181, 6, // Skip to: 11725 /* 10008 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 10011 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 10042 /* 10015 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10018 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10030 /* 10022 */ MCD_OPC_CheckPredicate, 0, 151, 119, // Skip to: 40641 /* 10026 */ MCD_OPC_Decode, 198, 15, 112, // Opcode: TBLv16i8One /* 10030 */ MCD_OPC_FilterValue, 1, 143, 119, // Skip to: 40641 /* 10034 */ MCD_OPC_CheckPredicate, 0, 139, 119, // Skip to: 40641 /* 10038 */ MCD_OPC_Decode, 242, 9, 112, // Opcode: SADDLv16i8_v8i16 /* 10042 */ MCD_OPC_FilterValue, 1, 90, 0, // Skip to: 10136 /* 10046 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10049 */ MCD_OPC_FilterValue, 0, 71, 0, // Skip to: 10124 /* 10053 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 10056 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 10112 /* 10060 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 10063 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 10100 /* 10067 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 10070 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 10088 /* 10074 */ MCD_OPC_CheckPredicate, 0, 99, 119, // Skip to: 40641 /* 10078 */ MCD_OPC_CheckField, 19, 1, 1, 93, 119, // Skip to: 40641 /* 10084 */ MCD_OPC_Decode, 153, 2, 113, // Opcode: DUPv2i64lane /* 10088 */ MCD_OPC_FilterValue, 1, 85, 119, // Skip to: 40641 /* 10092 */ MCD_OPC_CheckPredicate, 0, 81, 119, // Skip to: 40641 /* 10096 */ MCD_OPC_Decode, 157, 2, 114, // Opcode: DUPv4i32lane /* 10100 */ MCD_OPC_FilterValue, 1, 73, 119, // Skip to: 40641 /* 10104 */ MCD_OPC_CheckPredicate, 0, 69, 119, // Skip to: 40641 /* 10108 */ MCD_OPC_Decode, 159, 2, 115, // Opcode: DUPv8i16lane /* 10112 */ MCD_OPC_FilterValue, 1, 61, 119, // Skip to: 40641 /* 10116 */ MCD_OPC_CheckPredicate, 0, 57, 119, // Skip to: 40641 /* 10120 */ MCD_OPC_Decode, 149, 2, 116, // Opcode: DUPv16i8lane /* 10124 */ MCD_OPC_FilterValue, 1, 49, 119, // Skip to: 40641 /* 10128 */ MCD_OPC_CheckPredicate, 0, 45, 119, // Skip to: 40641 /* 10132 */ MCD_OPC_Decode, 164, 10, 112, // Opcode: SHADDv16i8 /* 10136 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 10154 /* 10140 */ MCD_OPC_CheckPredicate, 0, 33, 119, // Skip to: 40641 /* 10144 */ MCD_OPC_CheckField, 16, 6, 32, 27, 119, // Skip to: 40641 /* 10150 */ MCD_OPC_Decode, 179, 9, 117, // Opcode: REV64v16i8 /* 10154 */ MCD_OPC_FilterValue, 3, 70, 0, // Skip to: 10228 /* 10158 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10161 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 10216 /* 10165 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 10168 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 10180 /* 10172 */ MCD_OPC_CheckPredicate, 0, 1, 119, // Skip to: 40641 /* 10176 */ MCD_OPC_Decode, 148, 2, 118, // Opcode: DUPv16i8gpr /* 10180 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 10192 /* 10184 */ MCD_OPC_CheckPredicate, 0, 245, 118, // Skip to: 40641 /* 10188 */ MCD_OPC_Decode, 158, 2, 118, // Opcode: DUPv8i16gpr /* 10192 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 10204 /* 10196 */ MCD_OPC_CheckPredicate, 0, 233, 118, // Skip to: 40641 /* 10200 */ MCD_OPC_Decode, 156, 2, 118, // Opcode: DUPv4i32gpr /* 10204 */ MCD_OPC_FilterValue, 8, 225, 118, // Skip to: 40641 /* 10208 */ MCD_OPC_CheckPredicate, 0, 221, 118, // Skip to: 40641 /* 10212 */ MCD_OPC_Decode, 152, 2, 119, // Opcode: DUPv2i64gpr /* 10216 */ MCD_OPC_FilterValue, 1, 213, 118, // Skip to: 40641 /* 10220 */ MCD_OPC_CheckPredicate, 0, 209, 118, // Skip to: 40641 /* 10224 */ MCD_OPC_Decode, 160, 11, 112, // Opcode: SQADDv16i8 /* 10228 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 10259 /* 10232 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10235 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10247 /* 10239 */ MCD_OPC_CheckPredicate, 0, 190, 118, // Skip to: 40641 /* 10243 */ MCD_OPC_Decode, 208, 15, 120, // Opcode: TBXv16i8One /* 10247 */ MCD_OPC_FilterValue, 1, 182, 118, // Skip to: 40641 /* 10251 */ MCD_OPC_CheckPredicate, 0, 178, 118, // Skip to: 40641 /* 10255 */ MCD_OPC_Decode, 248, 9, 112, // Opcode: SADDWv16i8_v8i16 /* 10259 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 10277 /* 10263 */ MCD_OPC_CheckPredicate, 0, 166, 118, // Skip to: 40641 /* 10267 */ MCD_OPC_CheckField, 21, 1, 1, 160, 118, // Skip to: 40641 /* 10273 */ MCD_OPC_Decode, 223, 12, 112, // Opcode: SRHADDv16i8 /* 10277 */ MCD_OPC_FilterValue, 6, 33, 0, // Skip to: 10314 /* 10281 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10284 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10296 /* 10288 */ MCD_OPC_CheckPredicate, 0, 141, 118, // Skip to: 40641 /* 10292 */ MCD_OPC_Decode, 180, 18, 112, // Opcode: UZP1v16i8 /* 10296 */ MCD_OPC_FilterValue, 1, 133, 118, // Skip to: 40641 /* 10300 */ MCD_OPC_CheckPredicate, 0, 129, 118, // Skip to: 40641 /* 10304 */ MCD_OPC_CheckField, 16, 5, 0, 123, 118, // Skip to: 40641 /* 10310 */ MCD_OPC_Decode, 172, 9, 117, // Opcode: REV16v16i8 /* 10314 */ MCD_OPC_FilterValue, 7, 89, 0, // Skip to: 10407 /* 10318 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10321 */ MCD_OPC_FilterValue, 0, 71, 0, // Skip to: 10396 /* 10325 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 10328 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 10384 /* 10332 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 10335 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 10372 /* 10339 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 10342 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 10360 /* 10346 */ MCD_OPC_CheckPredicate, 0, 83, 118, // Skip to: 40641 /* 10350 */ MCD_OPC_CheckField, 19, 1, 1, 77, 118, // Skip to: 40641 /* 10356 */ MCD_OPC_Decode, 214, 5, 121, // Opcode: INSvi64gpr /* 10360 */ MCD_OPC_FilterValue, 1, 69, 118, // Skip to: 40641 /* 10364 */ MCD_OPC_CheckPredicate, 0, 65, 118, // Skip to: 40641 /* 10368 */ MCD_OPC_Decode, 212, 5, 122, // Opcode: INSvi32gpr /* 10372 */ MCD_OPC_FilterValue, 1, 57, 118, // Skip to: 40641 /* 10376 */ MCD_OPC_CheckPredicate, 0, 53, 118, // Skip to: 40641 /* 10380 */ MCD_OPC_Decode, 210, 5, 123, // Opcode: INSvi16gpr /* 10384 */ MCD_OPC_FilterValue, 1, 45, 118, // Skip to: 40641 /* 10388 */ MCD_OPC_CheckPredicate, 0, 41, 118, // Skip to: 40641 /* 10392 */ MCD_OPC_Decode, 216, 5, 124, // Opcode: INSvi8gpr /* 10396 */ MCD_OPC_FilterValue, 1, 33, 118, // Skip to: 40641 /* 10400 */ MCD_OPC_CheckPredicate, 0, 29, 118, // Skip to: 40641 /* 10404 */ MCD_OPC_Decode, 99, 112, // Opcode: ANDv16i8 /* 10407 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 10438 /* 10411 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10414 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10426 /* 10418 */ MCD_OPC_CheckPredicate, 0, 11, 118, // Skip to: 40641 /* 10422 */ MCD_OPC_Decode, 200, 15, 125, // Opcode: TBLv16i8Two /* 10426 */ MCD_OPC_FilterValue, 1, 3, 118, // Skip to: 40641 /* 10430 */ MCD_OPC_CheckPredicate, 0, 255, 117, // Skip to: 40641 /* 10434 */ MCD_OPC_Decode, 163, 13, 112, // Opcode: SSUBLv16i8_v8i16 /* 10438 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 10456 /* 10442 */ MCD_OPC_CheckPredicate, 0, 243, 117, // Skip to: 40641 /* 10446 */ MCD_OPC_CheckField, 21, 1, 1, 237, 117, // Skip to: 40641 /* 10452 */ MCD_OPC_Decode, 190, 10, 112, // Opcode: SHSUBv16i8 /* 10456 */ MCD_OPC_FilterValue, 10, 46, 0, // Skip to: 10506 /* 10460 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10463 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10475 /* 10467 */ MCD_OPC_CheckPredicate, 0, 218, 117, // Skip to: 40641 /* 10471 */ MCD_OPC_Decode, 221, 15, 112, // Opcode: TRN1v16i8 /* 10475 */ MCD_OPC_FilterValue, 1, 210, 117, // Skip to: 40641 /* 10479 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 10482 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10494 /* 10486 */ MCD_OPC_CheckPredicate, 0, 199, 117, // Skip to: 40641 /* 10490 */ MCD_OPC_Decode, 231, 9, 117, // Opcode: SADDLPv16i8_v8i16 /* 10494 */ MCD_OPC_FilterValue, 1, 191, 117, // Skip to: 40641 /* 10498 */ MCD_OPC_CheckPredicate, 0, 187, 117, // Skip to: 40641 /* 10502 */ MCD_OPC_Decode, 194, 18, 126, // Opcode: XTNv16i8 /* 10506 */ MCD_OPC_FilterValue, 11, 73, 0, // Skip to: 10583 /* 10510 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10513 */ MCD_OPC_FilterValue, 0, 54, 0, // Skip to: 10571 /* 10517 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 10520 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 10558 /* 10524 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 10527 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 10545 /* 10531 */ MCD_OPC_CheckPredicate, 0, 154, 117, // Skip to: 40641 /* 10535 */ MCD_OPC_CheckField, 18, 1, 1, 148, 117, // Skip to: 40641 /* 10541 */ MCD_OPC_Decode, 134, 11, 127, // Opcode: SMOVvi32to64 /* 10545 */ MCD_OPC_FilterValue, 1, 140, 117, // Skip to: 40641 /* 10549 */ MCD_OPC_CheckPredicate, 0, 136, 117, // Skip to: 40641 /* 10553 */ MCD_OPC_Decode, 133, 11, 128, 1, // Opcode: SMOVvi16to64 /* 10558 */ MCD_OPC_FilterValue, 1, 127, 117, // Skip to: 40641 /* 10562 */ MCD_OPC_CheckPredicate, 0, 123, 117, // Skip to: 40641 /* 10566 */ MCD_OPC_Decode, 136, 11, 129, 1, // Opcode: SMOVvi8to64 /* 10571 */ MCD_OPC_FilterValue, 1, 114, 117, // Skip to: 40641 /* 10575 */ MCD_OPC_CheckPredicate, 0, 110, 117, // Skip to: 40641 /* 10579 */ MCD_OPC_Decode, 194, 12, 112, // Opcode: SQSUBv16i8 /* 10583 */ MCD_OPC_FilterValue, 12, 28, 0, // Skip to: 10615 /* 10587 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10590 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10603 /* 10594 */ MCD_OPC_CheckPredicate, 0, 91, 117, // Skip to: 40641 /* 10598 */ MCD_OPC_Decode, 210, 15, 130, 1, // Opcode: TBXv16i8Two /* 10603 */ MCD_OPC_FilterValue, 1, 82, 117, // Skip to: 40641 /* 10607 */ MCD_OPC_CheckPredicate, 0, 78, 117, // Skip to: 40641 /* 10611 */ MCD_OPC_Decode, 169, 13, 112, // Opcode: SSUBWv16i8_v8i16 /* 10615 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 10633 /* 10619 */ MCD_OPC_CheckPredicate, 0, 66, 117, // Skip to: 40641 /* 10623 */ MCD_OPC_CheckField, 21, 1, 1, 60, 117, // Skip to: 40641 /* 10629 */ MCD_OPC_Decode, 192, 1, 112, // Opcode: CMGTv16i8 /* 10633 */ MCD_OPC_FilterValue, 14, 47, 0, // Skip to: 10684 /* 10637 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10640 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10652 /* 10644 */ MCD_OPC_CheckPredicate, 0, 41, 117, // Skip to: 40641 /* 10648 */ MCD_OPC_Decode, 200, 18, 112, // Opcode: ZIP1v16i8 /* 10652 */ MCD_OPC_FilterValue, 1, 33, 117, // Skip to: 40641 /* 10656 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 10659 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10671 /* 10663 */ MCD_OPC_CheckPredicate, 0, 22, 117, // Skip to: 40641 /* 10667 */ MCD_OPC_Decode, 183, 15, 126, // Opcode: SUQADDv16i8 /* 10671 */ MCD_OPC_FilterValue, 16, 14, 117, // Skip to: 40641 /* 10675 */ MCD_OPC_CheckPredicate, 0, 10, 117, // Skip to: 40641 /* 10679 */ MCD_OPC_Decode, 237, 9, 131, 1, // Opcode: SADDLVv16i8v /* 10684 */ MCD_OPC_FilterValue, 15, 34, 0, // Skip to: 10722 /* 10688 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10691 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10710 /* 10695 */ MCD_OPC_CheckPredicate, 0, 246, 116, // Skip to: 40641 /* 10699 */ MCD_OPC_CheckField, 16, 4, 8, 240, 116, // Skip to: 40641 /* 10705 */ MCD_OPC_Decode, 253, 16, 132, 1, // Opcode: UMOVvi64 /* 10710 */ MCD_OPC_FilterValue, 1, 231, 116, // Skip to: 40641 /* 10714 */ MCD_OPC_CheckPredicate, 0, 227, 116, // Skip to: 40641 /* 10718 */ MCD_OPC_Decode, 176, 1, 112, // Opcode: CMGEv16i8 /* 10722 */ MCD_OPC_FilterValue, 16, 27, 0, // Skip to: 10753 /* 10726 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10729 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10742 /* 10733 */ MCD_OPC_CheckPredicate, 0, 208, 116, // Skip to: 40641 /* 10737 */ MCD_OPC_Decode, 199, 15, 133, 1, // Opcode: TBLv16i8Three /* 10742 */ MCD_OPC_FilterValue, 1, 199, 116, // Skip to: 40641 /* 10746 */ MCD_OPC_CheckPredicate, 0, 195, 116, // Skip to: 40641 /* 10750 */ MCD_OPC_Decode, 38, 120, // Opcode: ADDHNv8i16_v16i8 /* 10753 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 10771 /* 10757 */ MCD_OPC_CheckPredicate, 0, 184, 116, // Skip to: 40641 /* 10761 */ MCD_OPC_CheckField, 21, 1, 1, 178, 116, // Skip to: 40641 /* 10767 */ MCD_OPC_Decode, 139, 13, 112, // Opcode: SSHLv16i8 /* 10771 */ MCD_OPC_FilterValue, 18, 38, 0, // Skip to: 10813 /* 10775 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 10778 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 10790 /* 10782 */ MCD_OPC_CheckPredicate, 0, 159, 116, // Skip to: 40641 /* 10786 */ MCD_OPC_Decode, 146, 1, 117, // Opcode: CLSv16i8 /* 10790 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 10802 /* 10794 */ MCD_OPC_CheckPredicate, 0, 147, 116, // Skip to: 40641 /* 10798 */ MCD_OPC_Decode, 205, 12, 126, // Opcode: SQXTNv16i8 /* 10802 */ MCD_OPC_FilterValue, 40, 139, 116, // Skip to: 40641 /* 10806 */ MCD_OPC_CheckPredicate, 1, 135, 116, // Skip to: 40641 /* 10810 */ MCD_OPC_Decode, 84, 126, // Opcode: AESErr /* 10813 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 10831 /* 10817 */ MCD_OPC_CheckPredicate, 0, 124, 116, // Skip to: 40641 /* 10821 */ MCD_OPC_CheckField, 21, 1, 1, 118, 116, // Skip to: 40641 /* 10827 */ MCD_OPC_Decode, 158, 12, 112, // Opcode: SQSHLv16i8 /* 10831 */ MCD_OPC_FilterValue, 20, 28, 0, // Skip to: 10863 /* 10835 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10838 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10851 /* 10842 */ MCD_OPC_CheckPredicate, 0, 99, 116, // Skip to: 40641 /* 10846 */ MCD_OPC_Decode, 209, 15, 134, 1, // Opcode: TBXv16i8Three /* 10851 */ MCD_OPC_FilterValue, 1, 90, 116, // Skip to: 40641 /* 10855 */ MCD_OPC_CheckPredicate, 0, 86, 116, // Skip to: 40641 /* 10859 */ MCD_OPC_Decode, 201, 9, 120, // Opcode: SABALv16i8_v8i16 /* 10863 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 10881 /* 10867 */ MCD_OPC_CheckPredicate, 0, 74, 116, // Skip to: 40641 /* 10871 */ MCD_OPC_CheckField, 21, 1, 1, 68, 116, // Skip to: 40641 /* 10877 */ MCD_OPC_Decode, 237, 12, 112, // Opcode: SRSHLv16i8 /* 10881 */ MCD_OPC_FilterValue, 22, 45, 0, // Skip to: 10930 /* 10885 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10888 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10900 /* 10892 */ MCD_OPC_CheckPredicate, 0, 49, 116, // Skip to: 40641 /* 10896 */ MCD_OPC_Decode, 187, 18, 112, // Opcode: UZP2v16i8 /* 10900 */ MCD_OPC_FilterValue, 1, 41, 116, // Skip to: 40641 /* 10904 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 10907 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10919 /* 10911 */ MCD_OPC_CheckPredicate, 0, 30, 116, // Skip to: 40641 /* 10915 */ MCD_OPC_Decode, 248, 1, 117, // Opcode: CNTv16i8 /* 10919 */ MCD_OPC_FilterValue, 8, 22, 116, // Skip to: 40641 /* 10923 */ MCD_OPC_CheckPredicate, 1, 18, 116, // Skip to: 40641 /* 10927 */ MCD_OPC_Decode, 83, 126, // Opcode: AESDrr /* 10930 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 10948 /* 10934 */ MCD_OPC_CheckPredicate, 0, 7, 116, // Skip to: 40641 /* 10938 */ MCD_OPC_CheckField, 21, 1, 1, 1, 116, // Skip to: 40641 /* 10944 */ MCD_OPC_Decode, 242, 11, 112, // Opcode: SQRSHLv16i8 /* 10948 */ MCD_OPC_FilterValue, 24, 28, 0, // Skip to: 10980 /* 10952 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10955 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10968 /* 10959 */ MCD_OPC_CheckPredicate, 0, 238, 115, // Skip to: 40641 /* 10963 */ MCD_OPC_Decode, 197, 15, 135, 1, // Opcode: TBLv16i8Four /* 10968 */ MCD_OPC_FilterValue, 1, 229, 115, // Skip to: 40641 /* 10972 */ MCD_OPC_CheckPredicate, 0, 225, 115, // Skip to: 40641 /* 10976 */ MCD_OPC_Decode, 155, 15, 120, // Opcode: SUBHNv8i16_v16i8 /* 10980 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 10998 /* 10984 */ MCD_OPC_CheckPredicate, 0, 213, 115, // Skip to: 40641 /* 10988 */ MCD_OPC_CheckField, 21, 1, 1, 207, 115, // Skip to: 40641 /* 10994 */ MCD_OPC_Decode, 216, 10, 112, // Opcode: SMAXv16i8 /* 10998 */ MCD_OPC_FilterValue, 26, 57, 0, // Skip to: 11059 /* 11002 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 11005 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11017 /* 11009 */ MCD_OPC_CheckPredicate, 0, 188, 115, // Skip to: 40641 /* 11013 */ MCD_OPC_Decode, 228, 15, 112, // Opcode: TRN2v16i8 /* 11017 */ MCD_OPC_FilterValue, 1, 180, 115, // Skip to: 40641 /* 11021 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 11024 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11036 /* 11028 */ MCD_OPC_CheckPredicate, 0, 169, 115, // Skip to: 40641 /* 11032 */ MCD_OPC_Decode, 225, 9, 126, // Opcode: SADALPv16i8_v8i16 /* 11036 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11048 /* 11040 */ MCD_OPC_CheckPredicate, 0, 157, 115, // Skip to: 40641 /* 11044 */ MCD_OPC_Decode, 201, 3, 126, // Opcode: FCVTNv8i16 /* 11048 */ MCD_OPC_FilterValue, 8, 149, 115, // Skip to: 40641 /* 11052 */ MCD_OPC_CheckPredicate, 1, 145, 115, // Skip to: 40641 /* 11056 */ MCD_OPC_Decode, 86, 117, // Opcode: AESMCrr /* 11059 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 11077 /* 11063 */ MCD_OPC_CheckPredicate, 0, 134, 115, // Skip to: 40641 /* 11067 */ MCD_OPC_CheckField, 21, 1, 1, 128, 115, // Skip to: 40641 /* 11073 */ MCD_OPC_Decode, 234, 10, 112, // Opcode: SMINv16i8 /* 11077 */ MCD_OPC_FilterValue, 28, 28, 0, // Skip to: 11109 /* 11081 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 11084 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11097 /* 11088 */ MCD_OPC_CheckPredicate, 0, 109, 115, // Skip to: 40641 /* 11092 */ MCD_OPC_Decode, 207, 15, 136, 1, // Opcode: TBXv16i8Four /* 11097 */ MCD_OPC_FilterValue, 1, 100, 115, // Skip to: 40641 /* 11101 */ MCD_OPC_CheckPredicate, 0, 96, 115, // Skip to: 40641 /* 11105 */ MCD_OPC_Decode, 213, 9, 112, // Opcode: SABDLv16i8_v8i16 /* 11109 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 11127 /* 11113 */ MCD_OPC_CheckPredicate, 0, 84, 115, // Skip to: 40641 /* 11117 */ MCD_OPC_CheckField, 21, 1, 1, 78, 115, // Skip to: 40641 /* 11123 */ MCD_OPC_Decode, 219, 9, 112, // Opcode: SABDv16i8 /* 11127 */ MCD_OPC_FilterValue, 30, 57, 0, // Skip to: 11188 /* 11131 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 11134 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11146 /* 11138 */ MCD_OPC_CheckPredicate, 0, 59, 115, // Skip to: 40641 /* 11142 */ MCD_OPC_Decode, 207, 18, 112, // Opcode: ZIP2v16i8 /* 11146 */ MCD_OPC_FilterValue, 1, 51, 115, // Skip to: 40641 /* 11150 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 11153 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11165 /* 11157 */ MCD_OPC_CheckPredicate, 0, 40, 115, // Skip to: 40641 /* 11161 */ MCD_OPC_Decode, 149, 11, 117, // Opcode: SQABSv16i8 /* 11165 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11177 /* 11169 */ MCD_OPC_CheckPredicate, 0, 28, 115, // Skip to: 40641 /* 11173 */ MCD_OPC_Decode, 161, 3, 117, // Opcode: FCVTLv8i16 /* 11177 */ MCD_OPC_FilterValue, 8, 20, 115, // Skip to: 40641 /* 11181 */ MCD_OPC_CheckPredicate, 1, 16, 115, // Skip to: 40641 /* 11185 */ MCD_OPC_Decode, 85, 117, // Opcode: AESIMCrr /* 11188 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 11206 /* 11192 */ MCD_OPC_CheckPredicate, 0, 5, 115, // Skip to: 40641 /* 11196 */ MCD_OPC_CheckField, 21, 1, 1, 255, 114, // Skip to: 40641 /* 11202 */ MCD_OPC_Decode, 207, 9, 120, // Opcode: SABAv16i8 /* 11206 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 11224 /* 11210 */ MCD_OPC_CheckPredicate, 0, 243, 114, // Skip to: 40641 /* 11214 */ MCD_OPC_CheckField, 21, 1, 1, 237, 114, // Skip to: 40641 /* 11220 */ MCD_OPC_Decode, 240, 10, 120, // Opcode: SMLALv16i8_v8i16 /* 11224 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 11241 /* 11228 */ MCD_OPC_CheckPredicate, 0, 225, 114, // Skip to: 40641 /* 11232 */ MCD_OPC_CheckField, 21, 1, 1, 219, 114, // Skip to: 40641 /* 11238 */ MCD_OPC_Decode, 71, 112, // Opcode: ADDv16i8 /* 11241 */ MCD_OPC_FilterValue, 34, 27, 0, // Skip to: 11272 /* 11245 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 11248 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 11260 /* 11252 */ MCD_OPC_CheckPredicate, 0, 201, 114, // Skip to: 40641 /* 11256 */ MCD_OPC_Decode, 193, 1, 117, // Opcode: CMGTv16i8rz /* 11260 */ MCD_OPC_FilterValue, 33, 193, 114, // Skip to: 40641 /* 11264 */ MCD_OPC_CheckPredicate, 0, 189, 114, // Skip to: 40641 /* 11268 */ MCD_OPC_Decode, 171, 5, 117, // Opcode: FRINTNv4f32 /* 11272 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 11290 /* 11276 */ MCD_OPC_CheckPredicate, 0, 177, 114, // Skip to: 40641 /* 11280 */ MCD_OPC_CheckField, 21, 1, 1, 171, 114, // Skip to: 40641 /* 11286 */ MCD_OPC_Decode, 240, 1, 112, // Opcode: CMTSTv16i8 /* 11290 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 11308 /* 11294 */ MCD_OPC_CheckPredicate, 0, 159, 114, // Skip to: 40641 /* 11298 */ MCD_OPC_CheckField, 21, 1, 1, 153, 114, // Skip to: 40641 /* 11304 */ MCD_OPC_Decode, 182, 8, 120, // Opcode: MLAv16i8 /* 11308 */ MCD_OPC_FilterValue, 38, 27, 0, // Skip to: 11339 /* 11312 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 11315 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 11327 /* 11319 */ MCD_OPC_CheckPredicate, 0, 134, 114, // Skip to: 40641 /* 11323 */ MCD_OPC_Decode, 161, 1, 117, // Opcode: CMEQv16i8rz /* 11327 */ MCD_OPC_FilterValue, 33, 126, 114, // Skip to: 40641 /* 11331 */ MCD_OPC_CheckPredicate, 0, 122, 114, // Skip to: 40641 /* 11335 */ MCD_OPC_Decode, 166, 5, 117, // Opcode: FRINTMv4f32 /* 11339 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 11357 /* 11343 */ MCD_OPC_CheckPredicate, 0, 110, 114, // Skip to: 40641 /* 11347 */ MCD_OPC_CheckField, 21, 1, 1, 104, 114, // Skip to: 40641 /* 11353 */ MCD_OPC_Decode, 231, 8, 112, // Opcode: MULv16i8 /* 11357 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 11375 /* 11361 */ MCD_OPC_CheckPredicate, 0, 92, 114, // Skip to: 40641 /* 11365 */ MCD_OPC_CheckField, 21, 1, 1, 86, 114, // Skip to: 40641 /* 11371 */ MCD_OPC_Decode, 250, 10, 120, // Opcode: SMLSLv16i8_v8i16 /* 11375 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 11393 /* 11379 */ MCD_OPC_CheckPredicate, 0, 74, 114, // Skip to: 40641 /* 11383 */ MCD_OPC_CheckField, 21, 1, 1, 68, 114, // Skip to: 40641 /* 11389 */ MCD_OPC_Decode, 205, 10, 112, // Opcode: SMAXPv16i8 /* 11393 */ MCD_OPC_FilterValue, 42, 53, 0, // Skip to: 11450 /* 11397 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 11400 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 11412 /* 11404 */ MCD_OPC_CheckPredicate, 0, 49, 114, // Skip to: 40641 /* 11408 */ MCD_OPC_Decode, 232, 1, 117, // Opcode: CMLTv16i8rz /* 11412 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 11424 /* 11416 */ MCD_OPC_CheckPredicate, 0, 37, 114, // Skip to: 40641 /* 11420 */ MCD_OPC_Decode, 188, 3, 117, // Opcode: FCVTNSv4f32 /* 11424 */ MCD_OPC_FilterValue, 48, 9, 0, // Skip to: 11437 /* 11428 */ MCD_OPC_CheckPredicate, 0, 25, 114, // Skip to: 40641 /* 11432 */ MCD_OPC_Decode, 211, 10, 137, 1, // Opcode: SMAXVv16i8v /* 11437 */ MCD_OPC_FilterValue, 49, 16, 114, // Skip to: 40641 /* 11441 */ MCD_OPC_CheckPredicate, 0, 12, 114, // Skip to: 40641 /* 11445 */ MCD_OPC_Decode, 229, 10, 137, 1, // Opcode: SMINVv16i8v /* 11450 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 11468 /* 11454 */ MCD_OPC_CheckPredicate, 0, 255, 113, // Skip to: 40641 /* 11458 */ MCD_OPC_CheckField, 21, 1, 1, 249, 113, // Skip to: 40641 /* 11464 */ MCD_OPC_Decode, 223, 10, 112, // Opcode: SMINPv16i8 /* 11468 */ MCD_OPC_FilterValue, 46, 38, 0, // Skip to: 11510 /* 11472 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 11475 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 11486 /* 11479 */ MCD_OPC_CheckPredicate, 0, 230, 113, // Skip to: 40641 /* 11483 */ MCD_OPC_Decode, 22, 117, // Opcode: ABSv16i8 /* 11486 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 11498 /* 11490 */ MCD_OPC_CheckPredicate, 0, 219, 113, // Skip to: 40641 /* 11494 */ MCD_OPC_Decode, 170, 3, 117, // Opcode: FCVTMSv4f32 /* 11498 */ MCD_OPC_FilterValue, 49, 211, 113, // Skip to: 40641 /* 11502 */ MCD_OPC_CheckPredicate, 0, 207, 113, // Skip to: 40641 /* 11506 */ MCD_OPC_Decode, 57, 137, 1, // Opcode: ADDVv16i8v /* 11510 */ MCD_OPC_FilterValue, 47, 13, 0, // Skip to: 11527 /* 11514 */ MCD_OPC_CheckPredicate, 0, 195, 113, // Skip to: 40641 /* 11518 */ MCD_OPC_CheckField, 21, 1, 1, 189, 113, // Skip to: 40641 /* 11524 */ MCD_OPC_Decode, 40, 112, // Opcode: ADDPv16i8 /* 11527 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 11545 /* 11531 */ MCD_OPC_CheckPredicate, 0, 178, 113, // Skip to: 40641 /* 11535 */ MCD_OPC_CheckField, 21, 1, 1, 172, 113, // Skip to: 40641 /* 11541 */ MCD_OPC_Decode, 139, 11, 112, // Opcode: SMULLv16i8_v8i16 /* 11545 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 11563 /* 11549 */ MCD_OPC_CheckPredicate, 0, 160, 113, // Skip to: 40641 /* 11553 */ MCD_OPC_CheckField, 21, 1, 1, 154, 113, // Skip to: 40641 /* 11559 */ MCD_OPC_Decode, 173, 4, 112, // Opcode: FMAXNMv4f32 /* 11563 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 11581 /* 11567 */ MCD_OPC_CheckPredicate, 0, 142, 113, // Skip to: 40641 /* 11571 */ MCD_OPC_CheckField, 16, 6, 33, 136, 113, // Skip to: 40641 /* 11577 */ MCD_OPC_Decode, 144, 3, 117, // Opcode: FCVTASv4f32 /* 11581 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 11599 /* 11585 */ MCD_OPC_CheckPredicate, 0, 124, 113, // Skip to: 40641 /* 11589 */ MCD_OPC_CheckField, 21, 1, 1, 118, 113, // Skip to: 40641 /* 11595 */ MCD_OPC_Decode, 212, 4, 120, // Opcode: FMLAv4f32 /* 11599 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 11617 /* 11603 */ MCD_OPC_CheckPredicate, 0, 106, 113, // Skip to: 40641 /* 11607 */ MCD_OPC_CheckField, 21, 1, 1, 100, 113, // Skip to: 40641 /* 11613 */ MCD_OPC_Decode, 209, 2, 112, // Opcode: FADDv4f32 /* 11617 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 11635 /* 11621 */ MCD_OPC_CheckPredicate, 0, 88, 113, // Skip to: 40641 /* 11625 */ MCD_OPC_CheckField, 16, 6, 33, 82, 113, // Skip to: 40641 /* 11631 */ MCD_OPC_Decode, 148, 10, 117, // Opcode: SCVTFv4f32 /* 11635 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 11653 /* 11639 */ MCD_OPC_CheckPredicate, 0, 70, 113, // Skip to: 40641 /* 11643 */ MCD_OPC_CheckField, 21, 1, 1, 64, 113, // Skip to: 40641 /* 11649 */ MCD_OPC_Decode, 247, 4, 112, // Opcode: FMULXv4f32 /* 11653 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 11671 /* 11657 */ MCD_OPC_CheckPredicate, 0, 52, 113, // Skip to: 40641 /* 11661 */ MCD_OPC_CheckField, 21, 1, 1, 46, 113, // Skip to: 40641 /* 11667 */ MCD_OPC_Decode, 147, 9, 112, // Opcode: PMULLv16i8 /* 11671 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 11689 /* 11675 */ MCD_OPC_CheckPredicate, 0, 34, 113, // Skip to: 40641 /* 11679 */ MCD_OPC_CheckField, 21, 1, 1, 28, 113, // Skip to: 40641 /* 11685 */ MCD_OPC_Decode, 222, 2, 112, // Opcode: FCMEQv4f32 /* 11689 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 11707 /* 11693 */ MCD_OPC_CheckPredicate, 0, 16, 113, // Skip to: 40641 /* 11697 */ MCD_OPC_CheckField, 21, 1, 1, 10, 113, // Skip to: 40641 /* 11703 */ MCD_OPC_Decode, 183, 4, 112, // Opcode: FMAXv4f32 /* 11707 */ MCD_OPC_FilterValue, 63, 2, 113, // Skip to: 40641 /* 11711 */ MCD_OPC_CheckPredicate, 0, 254, 112, // Skip to: 40641 /* 11715 */ MCD_OPC_CheckField, 21, 1, 1, 248, 112, // Skip to: 40641 /* 11721 */ MCD_OPC_Decode, 149, 5, 112, // Opcode: FRECPSv4f32 /* 11725 */ MCD_OPC_FilterValue, 3, 240, 112, // Skip to: 40641 /* 11729 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 11732 */ MCD_OPC_FilterValue, 0, 60, 2, // Skip to: 12308 /* 11736 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 11739 */ MCD_OPC_FilterValue, 0, 41, 1, // Skip to: 12040 /* 11743 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 11746 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11759 /* 11750 */ MCD_OPC_CheckPredicate, 0, 215, 112, // Skip to: 40641 /* 11754 */ MCD_OPC_Decode, 177, 2, 138, 1, // Opcode: EXTv16i8 /* 11759 */ MCD_OPC_FilterValue, 1, 206, 112, // Skip to: 40641 /* 11763 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ... /* 11766 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11778 /* 11770 */ MCD_OPC_CheckPredicate, 0, 195, 112, // Skip to: 40641 /* 11774 */ MCD_OPC_Decode, 148, 16, 112, // Opcode: UADDLv16i8_v8i16 /* 11778 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 11796 /* 11782 */ MCD_OPC_CheckPredicate, 0, 183, 112, // Skip to: 40641 /* 11786 */ MCD_OPC_CheckField, 16, 5, 0, 177, 112, // Skip to: 40641 /* 11792 */ MCD_OPC_Decode, 175, 9, 117, // Opcode: REV32v16i8 /* 11796 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 11808 /* 11800 */ MCD_OPC_CheckPredicate, 0, 165, 112, // Skip to: 40641 /* 11804 */ MCD_OPC_Decode, 154, 16, 112, // Opcode: UADDWv16i8_v8i16 /* 11808 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 11820 /* 11812 */ MCD_OPC_CheckPredicate, 0, 153, 112, // Skip to: 40641 /* 11816 */ MCD_OPC_Decode, 168, 18, 112, // Opcode: USUBLv16i8_v8i16 /* 11820 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 11851 /* 11824 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 11827 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11839 /* 11831 */ MCD_OPC_CheckPredicate, 0, 134, 112, // Skip to: 40641 /* 11835 */ MCD_OPC_Decode, 137, 16, 117, // Opcode: UADDLPv16i8_v8i16 /* 11839 */ MCD_OPC_FilterValue, 1, 126, 112, // Skip to: 40641 /* 11843 */ MCD_OPC_CheckPredicate, 0, 122, 112, // Skip to: 40641 /* 11847 */ MCD_OPC_Decode, 214, 12, 126, // Opcode: SQXTUNv16i8 /* 11851 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 11863 /* 11855 */ MCD_OPC_CheckPredicate, 0, 110, 112, // Skip to: 40641 /* 11859 */ MCD_OPC_Decode, 174, 18, 112, // Opcode: USUBWv16i8_v8i16 /* 11863 */ MCD_OPC_FilterValue, 7, 40, 0, // Skip to: 11907 /* 11867 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 11870 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11882 /* 11874 */ MCD_OPC_CheckPredicate, 0, 91, 112, // Skip to: 40641 /* 11878 */ MCD_OPC_Decode, 149, 18, 126, // Opcode: USQADDv16i8 /* 11882 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11894 /* 11886 */ MCD_OPC_CheckPredicate, 0, 79, 112, // Skip to: 40641 /* 11890 */ MCD_OPC_Decode, 170, 10, 117, // Opcode: SHLLv16i8 /* 11894 */ MCD_OPC_FilterValue, 16, 71, 112, // Skip to: 40641 /* 11898 */ MCD_OPC_CheckPredicate, 0, 67, 112, // Skip to: 40641 /* 11902 */ MCD_OPC_Decode, 143, 16, 131, 1, // Opcode: UADDLVv16i8v /* 11907 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 11919 /* 11911 */ MCD_OPC_CheckPredicate, 0, 54, 112, // Skip to: 40641 /* 11915 */ MCD_OPC_Decode, 162, 9, 120, // Opcode: RADDHNv8i16_v16i8 /* 11919 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 11950 /* 11923 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 11926 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11938 /* 11930 */ MCD_OPC_CheckPredicate, 0, 35, 112, // Skip to: 40641 /* 11934 */ MCD_OPC_Decode, 154, 1, 117, // Opcode: CLZv16i8 /* 11938 */ MCD_OPC_FilterValue, 1, 27, 112, // Skip to: 40641 /* 11942 */ MCD_OPC_CheckPredicate, 0, 23, 112, // Skip to: 40641 /* 11946 */ MCD_OPC_Decode, 212, 17, 126, // Opcode: UQXTNv16i8 /* 11950 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 11962 /* 11954 */ MCD_OPC_CheckPredicate, 0, 11, 112, // Skip to: 40641 /* 11958 */ MCD_OPC_Decode, 235, 15, 120, // Opcode: UABALv16i8_v8i16 /* 11962 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 11980 /* 11966 */ MCD_OPC_CheckPredicate, 0, 255, 111, // Skip to: 40641 /* 11970 */ MCD_OPC_CheckField, 16, 5, 0, 249, 111, // Skip to: 40641 /* 11976 */ MCD_OPC_Decode, 255, 8, 117, // Opcode: NOTv16i8 /* 11980 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 11992 /* 11984 */ MCD_OPC_CheckPredicate, 0, 237, 111, // Skip to: 40641 /* 11988 */ MCD_OPC_Decode, 199, 9, 120, // Opcode: RSUBHNv8i16_v16i8 /* 11992 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 12010 /* 11996 */ MCD_OPC_CheckPredicate, 0, 225, 111, // Skip to: 40641 /* 12000 */ MCD_OPC_CheckField, 16, 5, 0, 219, 111, // Skip to: 40641 /* 12006 */ MCD_OPC_Decode, 131, 16, 126, // Opcode: UADALPv16i8_v8i16 /* 12010 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 12022 /* 12014 */ MCD_OPC_CheckPredicate, 0, 207, 111, // Skip to: 40641 /* 12018 */ MCD_OPC_Decode, 247, 15, 112, // Opcode: UABDLv16i8_v8i16 /* 12022 */ MCD_OPC_FilterValue, 15, 199, 111, // Skip to: 40641 /* 12026 */ MCD_OPC_CheckPredicate, 0, 195, 111, // Skip to: 40641 /* 12030 */ MCD_OPC_CheckField, 16, 5, 0, 189, 111, // Skip to: 40641 /* 12036 */ MCD_OPC_Decode, 219, 11, 117, // Opcode: SQNEGv16i8 /* 12040 */ MCD_OPC_FilterValue, 1, 181, 111, // Skip to: 40641 /* 12044 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ... /* 12047 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12065 /* 12051 */ MCD_OPC_CheckPredicate, 0, 170, 111, // Skip to: 40641 /* 12055 */ MCD_OPC_CheckField, 21, 1, 1, 164, 111, // Skip to: 40641 /* 12061 */ MCD_OPC_Decode, 231, 16, 120, // Opcode: UMLALv16i8_v8i16 /* 12065 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 12096 /* 12069 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 12072 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12084 /* 12076 */ MCD_OPC_CheckPredicate, 0, 145, 111, // Skip to: 40641 /* 12080 */ MCD_OPC_Decode, 177, 1, 117, // Opcode: CMGEv16i8rz /* 12084 */ MCD_OPC_FilterValue, 33, 137, 111, // Skip to: 40641 /* 12088 */ MCD_OPC_CheckPredicate, 0, 133, 111, // Skip to: 40641 /* 12092 */ MCD_OPC_Decode, 156, 5, 117, // Opcode: FRINTAv4f32 /* 12096 */ MCD_OPC_FilterValue, 3, 27, 0, // Skip to: 12127 /* 12100 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 12103 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12115 /* 12107 */ MCD_OPC_CheckPredicate, 0, 114, 111, // Skip to: 40641 /* 12111 */ MCD_OPC_Decode, 224, 1, 117, // Opcode: CMLEv16i8rz /* 12115 */ MCD_OPC_FilterValue, 33, 106, 111, // Skip to: 40641 /* 12119 */ MCD_OPC_CheckPredicate, 0, 102, 111, // Skip to: 40641 /* 12123 */ MCD_OPC_Decode, 181, 5, 117, // Opcode: FRINTXv4f32 /* 12127 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 12145 /* 12131 */ MCD_OPC_CheckPredicate, 0, 90, 111, // Skip to: 40641 /* 12135 */ MCD_OPC_CheckField, 21, 1, 1, 84, 111, // Skip to: 40641 /* 12141 */ MCD_OPC_Decode, 241, 16, 120, // Opcode: UMLSLv16i8_v8i16 /* 12145 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 12190 /* 12149 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 12152 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 12164 /* 12156 */ MCD_OPC_CheckPredicate, 0, 65, 111, // Skip to: 40641 /* 12160 */ MCD_OPC_Decode, 197, 3, 117, // Opcode: FCVTNUv4f32 /* 12164 */ MCD_OPC_FilterValue, 48, 9, 0, // Skip to: 12177 /* 12168 */ MCD_OPC_CheckPredicate, 0, 53, 111, // Skip to: 40641 /* 12172 */ MCD_OPC_Decode, 203, 16, 137, 1, // Opcode: UMAXVv16i8v /* 12177 */ MCD_OPC_FilterValue, 49, 44, 111, // Skip to: 40641 /* 12181 */ MCD_OPC_CheckPredicate, 0, 40, 111, // Skip to: 40641 /* 12185 */ MCD_OPC_Decode, 220, 16, 137, 1, // Opcode: UMINVv16i8v /* 12190 */ MCD_OPC_FilterValue, 7, 27, 0, // Skip to: 12221 /* 12194 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 12197 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12209 /* 12201 */ MCD_OPC_CheckPredicate, 0, 20, 111, // Skip to: 40641 /* 12205 */ MCD_OPC_Decode, 247, 8, 117, // Opcode: NEGv16i8 /* 12209 */ MCD_OPC_FilterValue, 33, 12, 111, // Skip to: 40641 /* 12213 */ MCD_OPC_CheckPredicate, 0, 8, 111, // Skip to: 40641 /* 12217 */ MCD_OPC_Decode, 179, 3, 117, // Opcode: FCVTMUv4f32 /* 12221 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 12239 /* 12225 */ MCD_OPC_CheckPredicate, 0, 252, 110, // Skip to: 40641 /* 12229 */ MCD_OPC_CheckField, 21, 1, 1, 246, 110, // Skip to: 40641 /* 12235 */ MCD_OPC_Decode, 129, 17, 112, // Opcode: UMULLv16i8_v8i16 /* 12239 */ MCD_OPC_FilterValue, 9, 28, 0, // Skip to: 12271 /* 12243 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 12246 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 12258 /* 12250 */ MCD_OPC_CheckPredicate, 0, 227, 110, // Skip to: 40641 /* 12254 */ MCD_OPC_Decode, 153, 3, 117, // Opcode: FCVTAUv4f32 /* 12258 */ MCD_OPC_FilterValue, 48, 219, 110, // Skip to: 40641 /* 12262 */ MCD_OPC_CheckPredicate, 0, 215, 110, // Skip to: 40641 /* 12266 */ MCD_OPC_Decode, 170, 4, 139, 1, // Opcode: FMAXNMVv4i32v /* 12271 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 12289 /* 12275 */ MCD_OPC_CheckPredicate, 0, 202, 110, // Skip to: 40641 /* 12279 */ MCD_OPC_CheckField, 16, 6, 33, 196, 110, // Skip to: 40641 /* 12285 */ MCD_OPC_Decode, 178, 16, 117, // Opcode: UCVTFv4f32 /* 12289 */ MCD_OPC_FilterValue, 15, 188, 110, // Skip to: 40641 /* 12293 */ MCD_OPC_CheckPredicate, 0, 184, 110, // Skip to: 40641 /* 12297 */ MCD_OPC_CheckField, 16, 6, 48, 178, 110, // Skip to: 40641 /* 12303 */ MCD_OPC_Decode, 180, 4, 139, 1, // Opcode: FMAXVv4i32v /* 12308 */ MCD_OPC_FilterValue, 1, 169, 110, // Skip to: 40641 /* 12312 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 12315 */ MCD_OPC_FilterValue, 0, 43, 1, // Skip to: 12618 /* 12319 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 12322 */ MCD_OPC_FilterValue, 0, 93, 0, // Skip to: 12419 /* 12326 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 12329 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 12406 /* 12333 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 12336 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 12387 /* 12340 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 12343 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 12368 /* 12347 */ MCD_OPC_CheckPredicate, 0, 130, 110, // Skip to: 40641 /* 12351 */ MCD_OPC_CheckField, 19, 1, 1, 124, 110, // Skip to: 40641 /* 12357 */ MCD_OPC_CheckField, 11, 3, 0, 118, 110, // Skip to: 40641 /* 12363 */ MCD_OPC_Decode, 215, 5, 140, 1, // Opcode: INSvi64lane /* 12368 */ MCD_OPC_FilterValue, 1, 109, 110, // Skip to: 40641 /* 12372 */ MCD_OPC_CheckPredicate, 0, 105, 110, // Skip to: 40641 /* 12376 */ MCD_OPC_CheckField, 11, 2, 0, 99, 110, // Skip to: 40641 /* 12382 */ MCD_OPC_Decode, 213, 5, 141, 1, // Opcode: INSvi32lane /* 12387 */ MCD_OPC_FilterValue, 1, 90, 110, // Skip to: 40641 /* 12391 */ MCD_OPC_CheckPredicate, 0, 86, 110, // Skip to: 40641 /* 12395 */ MCD_OPC_CheckField, 11, 1, 0, 80, 110, // Skip to: 40641 /* 12401 */ MCD_OPC_Decode, 211, 5, 142, 1, // Opcode: INSvi16lane /* 12406 */ MCD_OPC_FilterValue, 1, 71, 110, // Skip to: 40641 /* 12410 */ MCD_OPC_CheckPredicate, 0, 67, 110, // Skip to: 40641 /* 12414 */ MCD_OPC_Decode, 217, 5, 143, 1, // Opcode: INSvi8lane /* 12419 */ MCD_OPC_FilterValue, 1, 58, 110, // Skip to: 40641 /* 12423 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ... /* 12426 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12438 /* 12430 */ MCD_OPC_CheckPredicate, 0, 47, 110, // Skip to: 40641 /* 12434 */ MCD_OPC_Decode, 184, 16, 112, // Opcode: UHADDv16i8 /* 12438 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 12450 /* 12442 */ MCD_OPC_CheckPredicate, 0, 35, 110, // Skip to: 40641 /* 12446 */ MCD_OPC_Decode, 139, 17, 112, // Opcode: UQADDv16i8 /* 12450 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 12462 /* 12454 */ MCD_OPC_CheckPredicate, 0, 23, 110, // Skip to: 40641 /* 12458 */ MCD_OPC_Decode, 223, 17, 112, // Opcode: URHADDv16i8 /* 12462 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 12474 /* 12466 */ MCD_OPC_CheckPredicate, 0, 11, 110, // Skip to: 40641 /* 12470 */ MCD_OPC_Decode, 172, 2, 112, // Opcode: EORv16i8 /* 12474 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 12486 /* 12478 */ MCD_OPC_CheckPredicate, 0, 255, 109, // Skip to: 40641 /* 12482 */ MCD_OPC_Decode, 190, 16, 112, // Opcode: UHSUBv16i8 /* 12486 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 12498 /* 12490 */ MCD_OPC_CheckPredicate, 0, 243, 109, // Skip to: 40641 /* 12494 */ MCD_OPC_Decode, 201, 17, 112, // Opcode: UQSUBv16i8 /* 12498 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 12510 /* 12502 */ MCD_OPC_CheckPredicate, 0, 231, 109, // Skip to: 40641 /* 12506 */ MCD_OPC_Decode, 208, 1, 112, // Opcode: CMHIv16i8 /* 12510 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 12522 /* 12514 */ MCD_OPC_CheckPredicate, 0, 219, 109, // Skip to: 40641 /* 12518 */ MCD_OPC_Decode, 216, 1, 112, // Opcode: CMHSv16i8 /* 12522 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 12534 /* 12526 */ MCD_OPC_CheckPredicate, 0, 207, 109, // Skip to: 40641 /* 12530 */ MCD_OPC_Decode, 133, 18, 112, // Opcode: USHLv16i8 /* 12534 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 12546 /* 12538 */ MCD_OPC_CheckPredicate, 0, 195, 109, // Skip to: 40641 /* 12542 */ MCD_OPC_Decode, 174, 17, 112, // Opcode: UQSHLv16i8 /* 12546 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 12558 /* 12550 */ MCD_OPC_CheckPredicate, 0, 183, 109, // Skip to: 40641 /* 12554 */ MCD_OPC_Decode, 229, 17, 112, // Opcode: URSHLv16i8 /* 12558 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 12570 /* 12562 */ MCD_OPC_CheckPredicate, 0, 171, 109, // Skip to: 40641 /* 12566 */ MCD_OPC_Decode, 150, 17, 112, // Opcode: UQRSHLv16i8 /* 12570 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 12582 /* 12574 */ MCD_OPC_CheckPredicate, 0, 159, 109, // Skip to: 40641 /* 12578 */ MCD_OPC_Decode, 208, 16, 112, // Opcode: UMAXv16i8 /* 12582 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 12594 /* 12586 */ MCD_OPC_CheckPredicate, 0, 147, 109, // Skip to: 40641 /* 12590 */ MCD_OPC_Decode, 225, 16, 112, // Opcode: UMINv16i8 /* 12594 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 12606 /* 12598 */ MCD_OPC_CheckPredicate, 0, 135, 109, // Skip to: 40641 /* 12602 */ MCD_OPC_Decode, 253, 15, 112, // Opcode: UABDv16i8 /* 12606 */ MCD_OPC_FilterValue, 15, 127, 109, // Skip to: 40641 /* 12610 */ MCD_OPC_CheckPredicate, 0, 123, 109, // Skip to: 40641 /* 12614 */ MCD_OPC_Decode, 241, 15, 120, // Opcode: UABAv16i8 /* 12618 */ MCD_OPC_FilterValue, 1, 115, 109, // Skip to: 40641 /* 12622 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ... /* 12625 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12643 /* 12629 */ MCD_OPC_CheckPredicate, 0, 104, 109, // Skip to: 40641 /* 12633 */ MCD_OPC_CheckField, 21, 1, 1, 98, 109, // Skip to: 40641 /* 12639 */ MCD_OPC_Decode, 175, 15, 112, // Opcode: SUBv16i8 /* 12643 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12661 /* 12647 */ MCD_OPC_CheckPredicate, 0, 86, 109, // Skip to: 40641 /* 12651 */ MCD_OPC_CheckField, 21, 1, 1, 80, 109, // Skip to: 40641 /* 12657 */ MCD_OPC_Decode, 160, 1, 112, // Opcode: CMEQv16i8 /* 12661 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 12679 /* 12665 */ MCD_OPC_CheckPredicate, 0, 68, 109, // Skip to: 40641 /* 12669 */ MCD_OPC_CheckField, 21, 1, 1, 62, 109, // Skip to: 40641 /* 12675 */ MCD_OPC_Decode, 192, 8, 120, // Opcode: MLSv16i8 /* 12679 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 12697 /* 12683 */ MCD_OPC_CheckPredicate, 0, 50, 109, // Skip to: 40641 /* 12687 */ MCD_OPC_CheckField, 21, 1, 1, 44, 109, // Skip to: 40641 /* 12693 */ MCD_OPC_Decode, 151, 9, 112, // Opcode: PMULv16i8 /* 12697 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 12715 /* 12701 */ MCD_OPC_CheckPredicate, 0, 32, 109, // Skip to: 40641 /* 12705 */ MCD_OPC_CheckField, 21, 1, 1, 26, 109, // Skip to: 40641 /* 12711 */ MCD_OPC_Decode, 197, 16, 112, // Opcode: UMAXPv16i8 /* 12715 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 12733 /* 12719 */ MCD_OPC_CheckPredicate, 0, 14, 109, // Skip to: 40641 /* 12723 */ MCD_OPC_CheckField, 21, 1, 1, 8, 109, // Skip to: 40641 /* 12729 */ MCD_OPC_Decode, 214, 16, 112, // Opcode: UMINPv16i8 /* 12733 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 12751 /* 12737 */ MCD_OPC_CheckPredicate, 0, 252, 108, // Skip to: 40641 /* 12741 */ MCD_OPC_CheckField, 21, 1, 1, 246, 108, // Skip to: 40641 /* 12747 */ MCD_OPC_Decode, 168, 4, 112, // Opcode: FMAXNMPv4f32 /* 12751 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 12769 /* 12755 */ MCD_OPC_CheckPredicate, 0, 234, 108, // Skip to: 40641 /* 12759 */ MCD_OPC_CheckField, 21, 1, 1, 228, 108, // Skip to: 40641 /* 12765 */ MCD_OPC_Decode, 205, 2, 112, // Opcode: FADDPv4f32 /* 12769 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 12787 /* 12773 */ MCD_OPC_CheckPredicate, 0, 216, 108, // Skip to: 40641 /* 12777 */ MCD_OPC_CheckField, 21, 1, 1, 210, 108, // Skip to: 40641 /* 12783 */ MCD_OPC_Decode, 255, 4, 112, // Opcode: FMULv4f32 /* 12787 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 12805 /* 12791 */ MCD_OPC_CheckPredicate, 0, 198, 108, // Skip to: 40641 /* 12795 */ MCD_OPC_CheckField, 21, 1, 1, 192, 108, // Skip to: 40641 /* 12801 */ MCD_OPC_Decode, 232, 2, 112, // Opcode: FCMGEv4f32 /* 12805 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 12823 /* 12809 */ MCD_OPC_CheckPredicate, 0, 180, 108, // Skip to: 40641 /* 12813 */ MCD_OPC_CheckField, 21, 1, 1, 174, 108, // Skip to: 40641 /* 12819 */ MCD_OPC_Decode, 194, 2, 112, // Opcode: FACGEv4f32 /* 12823 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 12841 /* 12827 */ MCD_OPC_CheckPredicate, 0, 162, 108, // Skip to: 40641 /* 12831 */ MCD_OPC_CheckField, 21, 1, 1, 156, 108, // Skip to: 40641 /* 12837 */ MCD_OPC_Decode, 178, 4, 112, // Opcode: FMAXPv4f32 /* 12841 */ MCD_OPC_FilterValue, 15, 148, 108, // Skip to: 40641 /* 12845 */ MCD_OPC_CheckPredicate, 0, 144, 108, // Skip to: 40641 /* 12849 */ MCD_OPC_CheckField, 21, 1, 1, 138, 108, // Skip to: 40641 /* 12855 */ MCD_OPC_Decode, 159, 4, 112, // Opcode: FDIVv4f32 /* 12859 */ MCD_OPC_FilterValue, 9, 131, 18, // Skip to: 17602 /* 12863 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 12866 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 12945 /* 12870 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 12873 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12891 /* 12877 */ MCD_OPC_CheckPredicate, 0, 112, 108, // Skip to: 40641 /* 12881 */ MCD_OPC_CheckField, 21, 1, 1, 106, 108, // Skip to: 40641 /* 12887 */ MCD_OPC_Decode, 244, 9, 85, // Opcode: SADDLv4i16_v4i32 /* 12891 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12909 /* 12895 */ MCD_OPC_CheckPredicate, 0, 94, 108, // Skip to: 40641 /* 12899 */ MCD_OPC_CheckField, 21, 1, 1, 88, 108, // Skip to: 40641 /* 12905 */ MCD_OPC_Decode, 150, 16, 85, // Opcode: UADDLv4i16_v4i32 /* 12909 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 12927 /* 12913 */ MCD_OPC_CheckPredicate, 0, 76, 108, // Skip to: 40641 /* 12917 */ MCD_OPC_CheckField, 21, 1, 1, 70, 108, // Skip to: 40641 /* 12923 */ MCD_OPC_Decode, 246, 9, 112, // Opcode: SADDLv8i16_v4i32 /* 12927 */ MCD_OPC_FilterValue, 3, 62, 108, // Skip to: 40641 /* 12931 */ MCD_OPC_CheckPredicate, 0, 58, 108, // Skip to: 40641 /* 12935 */ MCD_OPC_CheckField, 21, 1, 1, 52, 108, // Skip to: 40641 /* 12941 */ MCD_OPC_Decode, 152, 16, 112, // Opcode: UADDLv8i16_v4i32 /* 12945 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 13024 /* 12949 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 12952 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12970 /* 12956 */ MCD_OPC_CheckPredicate, 0, 33, 108, // Skip to: 40641 /* 12960 */ MCD_OPC_CheckField, 21, 1, 1, 27, 108, // Skip to: 40641 /* 12966 */ MCD_OPC_Decode, 166, 10, 89, // Opcode: SHADDv4i16 /* 12970 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12988 /* 12974 */ MCD_OPC_CheckPredicate, 0, 15, 108, // Skip to: 40641 /* 12978 */ MCD_OPC_CheckField, 21, 1, 1, 9, 108, // Skip to: 40641 /* 12984 */ MCD_OPC_Decode, 186, 16, 89, // Opcode: UHADDv4i16 /* 12988 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13006 /* 12992 */ MCD_OPC_CheckPredicate, 0, 253, 107, // Skip to: 40641 /* 12996 */ MCD_OPC_CheckField, 21, 1, 1, 247, 107, // Skip to: 40641 /* 13002 */ MCD_OPC_Decode, 168, 10, 112, // Opcode: SHADDv8i16 /* 13006 */ MCD_OPC_FilterValue, 3, 239, 107, // Skip to: 40641 /* 13010 */ MCD_OPC_CheckPredicate, 0, 235, 107, // Skip to: 40641 /* 13014 */ MCD_OPC_CheckField, 21, 1, 1, 229, 107, // Skip to: 40641 /* 13020 */ MCD_OPC_Decode, 188, 16, 112, // Opcode: UHADDv8i16 /* 13024 */ MCD_OPC_FilterValue, 2, 75, 0, // Skip to: 13103 /* 13028 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13031 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13049 /* 13035 */ MCD_OPC_CheckPredicate, 0, 210, 107, // Skip to: 40641 /* 13039 */ MCD_OPC_CheckField, 16, 6, 32, 204, 107, // Skip to: 40641 /* 13045 */ MCD_OPC_Decode, 181, 9, 90, // Opcode: REV64v4i16 /* 13049 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13067 /* 13053 */ MCD_OPC_CheckPredicate, 0, 192, 107, // Skip to: 40641 /* 13057 */ MCD_OPC_CheckField, 16, 6, 32, 186, 107, // Skip to: 40641 /* 13063 */ MCD_OPC_Decode, 176, 9, 90, // Opcode: REV32v4i16 /* 13067 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13085 /* 13071 */ MCD_OPC_CheckPredicate, 0, 174, 107, // Skip to: 40641 /* 13075 */ MCD_OPC_CheckField, 16, 6, 32, 168, 107, // Skip to: 40641 /* 13081 */ MCD_OPC_Decode, 183, 9, 117, // Opcode: REV64v8i16 /* 13085 */ MCD_OPC_FilterValue, 3, 160, 107, // Skip to: 40641 /* 13089 */ MCD_OPC_CheckPredicate, 0, 156, 107, // Skip to: 40641 /* 13093 */ MCD_OPC_CheckField, 16, 6, 32, 150, 107, // Skip to: 40641 /* 13099 */ MCD_OPC_Decode, 177, 9, 117, // Opcode: REV32v8i16 /* 13103 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 13182 /* 13107 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13110 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13128 /* 13114 */ MCD_OPC_CheckPredicate, 0, 131, 107, // Skip to: 40641 /* 13118 */ MCD_OPC_CheckField, 21, 1, 1, 125, 107, // Skip to: 40641 /* 13124 */ MCD_OPC_Decode, 167, 11, 89, // Opcode: SQADDv4i16 /* 13128 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13146 /* 13132 */ MCD_OPC_CheckPredicate, 0, 113, 107, // Skip to: 40641 /* 13136 */ MCD_OPC_CheckField, 21, 1, 1, 107, 107, // Skip to: 40641 /* 13142 */ MCD_OPC_Decode, 146, 17, 89, // Opcode: UQADDv4i16 /* 13146 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13164 /* 13150 */ MCD_OPC_CheckPredicate, 0, 95, 107, // Skip to: 40641 /* 13154 */ MCD_OPC_CheckField, 21, 1, 1, 89, 107, // Skip to: 40641 /* 13160 */ MCD_OPC_Decode, 169, 11, 112, // Opcode: SQADDv8i16 /* 13164 */ MCD_OPC_FilterValue, 3, 81, 107, // Skip to: 40641 /* 13168 */ MCD_OPC_CheckPredicate, 0, 77, 107, // Skip to: 40641 /* 13172 */ MCD_OPC_CheckField, 21, 1, 1, 71, 107, // Skip to: 40641 /* 13178 */ MCD_OPC_Decode, 148, 17, 112, // Opcode: UQADDv8i16 /* 13182 */ MCD_OPC_FilterValue, 4, 75, 0, // Skip to: 13261 /* 13186 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13189 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13207 /* 13193 */ MCD_OPC_CheckPredicate, 0, 52, 107, // Skip to: 40641 /* 13197 */ MCD_OPC_CheckField, 21, 1, 1, 46, 107, // Skip to: 40641 /* 13203 */ MCD_OPC_Decode, 250, 9, 93, // Opcode: SADDWv4i16_v4i32 /* 13207 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13225 /* 13211 */ MCD_OPC_CheckPredicate, 0, 34, 107, // Skip to: 40641 /* 13215 */ MCD_OPC_CheckField, 21, 1, 1, 28, 107, // Skip to: 40641 /* 13221 */ MCD_OPC_Decode, 156, 16, 93, // Opcode: UADDWv4i16_v4i32 /* 13225 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13243 /* 13229 */ MCD_OPC_CheckPredicate, 0, 16, 107, // Skip to: 40641 /* 13233 */ MCD_OPC_CheckField, 21, 1, 1, 10, 107, // Skip to: 40641 /* 13239 */ MCD_OPC_Decode, 252, 9, 112, // Opcode: SADDWv8i16_v4i32 /* 13243 */ MCD_OPC_FilterValue, 3, 2, 107, // Skip to: 40641 /* 13247 */ MCD_OPC_CheckPredicate, 0, 254, 106, // Skip to: 40641 /* 13251 */ MCD_OPC_CheckField, 21, 1, 1, 248, 106, // Skip to: 40641 /* 13257 */ MCD_OPC_Decode, 158, 16, 112, // Opcode: UADDWv8i16_v4i32 /* 13261 */ MCD_OPC_FilterValue, 5, 75, 0, // Skip to: 13340 /* 13265 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13268 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13286 /* 13272 */ MCD_OPC_CheckPredicate, 0, 229, 106, // Skip to: 40641 /* 13276 */ MCD_OPC_CheckField, 21, 1, 1, 223, 106, // Skip to: 40641 /* 13282 */ MCD_OPC_Decode, 225, 12, 89, // Opcode: SRHADDv4i16 /* 13286 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13304 /* 13290 */ MCD_OPC_CheckPredicate, 0, 211, 106, // Skip to: 40641 /* 13294 */ MCD_OPC_CheckField, 21, 1, 1, 205, 106, // Skip to: 40641 /* 13300 */ MCD_OPC_Decode, 225, 17, 89, // Opcode: URHADDv4i16 /* 13304 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13322 /* 13308 */ MCD_OPC_CheckPredicate, 0, 193, 106, // Skip to: 40641 /* 13312 */ MCD_OPC_CheckField, 21, 1, 1, 187, 106, // Skip to: 40641 /* 13318 */ MCD_OPC_Decode, 227, 12, 112, // Opcode: SRHADDv8i16 /* 13322 */ MCD_OPC_FilterValue, 3, 179, 106, // Skip to: 40641 /* 13326 */ MCD_OPC_CheckPredicate, 0, 175, 106, // Skip to: 40641 /* 13330 */ MCD_OPC_CheckField, 21, 1, 1, 169, 106, // Skip to: 40641 /* 13336 */ MCD_OPC_Decode, 227, 17, 112, // Opcode: URHADDv8i16 /* 13340 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 13383 /* 13344 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13347 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13365 /* 13351 */ MCD_OPC_CheckPredicate, 0, 150, 106, // Skip to: 40641 /* 13355 */ MCD_OPC_CheckField, 21, 1, 0, 144, 106, // Skip to: 40641 /* 13361 */ MCD_OPC_Decode, 183, 18, 89, // Opcode: UZP1v4i16 /* 13365 */ MCD_OPC_FilterValue, 2, 136, 106, // Skip to: 40641 /* 13369 */ MCD_OPC_CheckPredicate, 0, 132, 106, // Skip to: 40641 /* 13373 */ MCD_OPC_CheckField, 21, 1, 0, 126, 106, // Skip to: 40641 /* 13379 */ MCD_OPC_Decode, 185, 18, 112, // Opcode: UZP1v8i16 /* 13383 */ MCD_OPC_FilterValue, 7, 73, 0, // Skip to: 13460 /* 13387 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13390 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 13407 /* 13394 */ MCD_OPC_CheckPredicate, 0, 107, 106, // Skip to: 40641 /* 13398 */ MCD_OPC_CheckField, 21, 1, 1, 101, 106, // Skip to: 40641 /* 13404 */ MCD_OPC_Decode, 119, 89, // Opcode: BICv8i8 /* 13407 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13425 /* 13411 */ MCD_OPC_CheckPredicate, 0, 90, 106, // Skip to: 40641 /* 13415 */ MCD_OPC_CheckField, 21, 1, 1, 84, 106, // Skip to: 40641 /* 13421 */ MCD_OPC_Decode, 129, 1, 109, // Opcode: BSLv8i8 /* 13425 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 13442 /* 13429 */ MCD_OPC_CheckPredicate, 0, 72, 106, // Skip to: 40641 /* 13433 */ MCD_OPC_CheckField, 21, 1, 1, 66, 106, // Skip to: 40641 /* 13439 */ MCD_OPC_Decode, 114, 112, // Opcode: BICv16i8 /* 13442 */ MCD_OPC_FilterValue, 3, 59, 106, // Skip to: 40641 /* 13446 */ MCD_OPC_CheckPredicate, 0, 55, 106, // Skip to: 40641 /* 13450 */ MCD_OPC_CheckField, 21, 1, 1, 49, 106, // Skip to: 40641 /* 13456 */ MCD_OPC_Decode, 128, 1, 120, // Opcode: BSLv16i8 /* 13460 */ MCD_OPC_FilterValue, 8, 75, 0, // Skip to: 13539 /* 13464 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13467 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13485 /* 13471 */ MCD_OPC_CheckPredicate, 0, 30, 106, // Skip to: 40641 /* 13475 */ MCD_OPC_CheckField, 21, 1, 1, 24, 106, // Skip to: 40641 /* 13481 */ MCD_OPC_Decode, 165, 13, 85, // Opcode: SSUBLv4i16_v4i32 /* 13485 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13503 /* 13489 */ MCD_OPC_CheckPredicate, 0, 12, 106, // Skip to: 40641 /* 13493 */ MCD_OPC_CheckField, 21, 1, 1, 6, 106, // Skip to: 40641 /* 13499 */ MCD_OPC_Decode, 170, 18, 85, // Opcode: USUBLv4i16_v4i32 /* 13503 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13521 /* 13507 */ MCD_OPC_CheckPredicate, 0, 250, 105, // Skip to: 40641 /* 13511 */ MCD_OPC_CheckField, 21, 1, 1, 244, 105, // Skip to: 40641 /* 13517 */ MCD_OPC_Decode, 167, 13, 112, // Opcode: SSUBLv8i16_v4i32 /* 13521 */ MCD_OPC_FilterValue, 3, 236, 105, // Skip to: 40641 /* 13525 */ MCD_OPC_CheckPredicate, 0, 232, 105, // Skip to: 40641 /* 13529 */ MCD_OPC_CheckField, 21, 1, 1, 226, 105, // Skip to: 40641 /* 13535 */ MCD_OPC_Decode, 172, 18, 112, // Opcode: USUBLv8i16_v4i32 /* 13539 */ MCD_OPC_FilterValue, 9, 75, 0, // Skip to: 13618 /* 13543 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13546 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13564 /* 13550 */ MCD_OPC_CheckPredicate, 0, 207, 105, // Skip to: 40641 /* 13554 */ MCD_OPC_CheckField, 21, 1, 1, 201, 105, // Skip to: 40641 /* 13560 */ MCD_OPC_Decode, 192, 10, 89, // Opcode: SHSUBv4i16 /* 13564 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13582 /* 13568 */ MCD_OPC_CheckPredicate, 0, 189, 105, // Skip to: 40641 /* 13572 */ MCD_OPC_CheckField, 21, 1, 1, 183, 105, // Skip to: 40641 /* 13578 */ MCD_OPC_Decode, 192, 16, 89, // Opcode: UHSUBv4i16 /* 13582 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13600 /* 13586 */ MCD_OPC_CheckPredicate, 0, 171, 105, // Skip to: 40641 /* 13590 */ MCD_OPC_CheckField, 21, 1, 1, 165, 105, // Skip to: 40641 /* 13596 */ MCD_OPC_Decode, 194, 10, 112, // Opcode: SHSUBv8i16 /* 13600 */ MCD_OPC_FilterValue, 3, 157, 105, // Skip to: 40641 /* 13604 */ MCD_OPC_CheckPredicate, 0, 153, 105, // Skip to: 40641 /* 13608 */ MCD_OPC_CheckField, 21, 1, 1, 147, 105, // Skip to: 40641 /* 13614 */ MCD_OPC_Decode, 194, 16, 112, // Opcode: UHSUBv8i16 /* 13618 */ MCD_OPC_FilterValue, 10, 165, 0, // Skip to: 13787 /* 13622 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13625 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 13675 /* 13629 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13632 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13644 /* 13636 */ MCD_OPC_CheckPredicate, 0, 121, 105, // Skip to: 40641 /* 13640 */ MCD_OPC_Decode, 224, 15, 89, // Opcode: TRN1v4i16 /* 13644 */ MCD_OPC_FilterValue, 1, 113, 105, // Skip to: 40641 /* 13648 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 13651 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13663 /* 13655 */ MCD_OPC_CheckPredicate, 0, 102, 105, // Skip to: 40641 /* 13659 */ MCD_OPC_Decode, 233, 9, 90, // Opcode: SADDLPv4i16_v2i32 /* 13663 */ MCD_OPC_FilterValue, 1, 94, 105, // Skip to: 40641 /* 13667 */ MCD_OPC_CheckPredicate, 0, 90, 105, // Skip to: 40641 /* 13671 */ MCD_OPC_Decode, 196, 18, 95, // Opcode: XTNv4i16 /* 13675 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 13706 /* 13679 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 13682 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 13694 /* 13686 */ MCD_OPC_CheckPredicate, 0, 71, 105, // Skip to: 40641 /* 13690 */ MCD_OPC_Decode, 139, 16, 90, // Opcode: UADDLPv4i16_v2i32 /* 13694 */ MCD_OPC_FilterValue, 33, 63, 105, // Skip to: 40641 /* 13698 */ MCD_OPC_CheckPredicate, 0, 59, 105, // Skip to: 40641 /* 13702 */ MCD_OPC_Decode, 219, 12, 95, // Opcode: SQXTUNv4i16 /* 13706 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 13756 /* 13710 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13713 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13725 /* 13717 */ MCD_OPC_CheckPredicate, 0, 40, 105, // Skip to: 40641 /* 13721 */ MCD_OPC_Decode, 226, 15, 112, // Opcode: TRN1v8i16 /* 13725 */ MCD_OPC_FilterValue, 1, 32, 105, // Skip to: 40641 /* 13729 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 13732 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13744 /* 13736 */ MCD_OPC_CheckPredicate, 0, 21, 105, // Skip to: 40641 /* 13740 */ MCD_OPC_Decode, 235, 9, 117, // Opcode: SADDLPv8i16_v4i32 /* 13744 */ MCD_OPC_FilterValue, 1, 13, 105, // Skip to: 40641 /* 13748 */ MCD_OPC_CheckPredicate, 0, 9, 105, // Skip to: 40641 /* 13752 */ MCD_OPC_Decode, 198, 18, 126, // Opcode: XTNv8i16 /* 13756 */ MCD_OPC_FilterValue, 3, 1, 105, // Skip to: 40641 /* 13760 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 13763 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 13775 /* 13767 */ MCD_OPC_CheckPredicate, 0, 246, 104, // Skip to: 40641 /* 13771 */ MCD_OPC_Decode, 141, 16, 117, // Opcode: UADDLPv8i16_v4i32 /* 13775 */ MCD_OPC_FilterValue, 33, 238, 104, // Skip to: 40641 /* 13779 */ MCD_OPC_CheckPredicate, 0, 234, 104, // Skip to: 40641 /* 13783 */ MCD_OPC_Decode, 221, 12, 126, // Opcode: SQXTUNv8i16 /* 13787 */ MCD_OPC_FilterValue, 11, 75, 0, // Skip to: 13866 /* 13791 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13794 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13812 /* 13798 */ MCD_OPC_CheckPredicate, 0, 215, 104, // Skip to: 40641 /* 13802 */ MCD_OPC_CheckField, 21, 1, 1, 209, 104, // Skip to: 40641 /* 13808 */ MCD_OPC_Decode, 201, 12, 89, // Opcode: SQSUBv4i16 /* 13812 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13830 /* 13816 */ MCD_OPC_CheckPredicate, 0, 197, 104, // Skip to: 40641 /* 13820 */ MCD_OPC_CheckField, 21, 1, 1, 191, 104, // Skip to: 40641 /* 13826 */ MCD_OPC_Decode, 208, 17, 89, // Opcode: UQSUBv4i16 /* 13830 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13848 /* 13834 */ MCD_OPC_CheckPredicate, 0, 179, 104, // Skip to: 40641 /* 13838 */ MCD_OPC_CheckField, 21, 1, 1, 173, 104, // Skip to: 40641 /* 13844 */ MCD_OPC_Decode, 203, 12, 112, // Opcode: SQSUBv8i16 /* 13848 */ MCD_OPC_FilterValue, 3, 165, 104, // Skip to: 40641 /* 13852 */ MCD_OPC_CheckPredicate, 0, 161, 104, // Skip to: 40641 /* 13856 */ MCD_OPC_CheckField, 21, 1, 1, 155, 104, // Skip to: 40641 /* 13862 */ MCD_OPC_Decode, 210, 17, 112, // Opcode: UQSUBv8i16 /* 13866 */ MCD_OPC_FilterValue, 12, 75, 0, // Skip to: 13945 /* 13870 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13873 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13891 /* 13877 */ MCD_OPC_CheckPredicate, 0, 136, 104, // Skip to: 40641 /* 13881 */ MCD_OPC_CheckField, 21, 1, 1, 130, 104, // Skip to: 40641 /* 13887 */ MCD_OPC_Decode, 171, 13, 93, // Opcode: SSUBWv4i16_v4i32 /* 13891 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13909 /* 13895 */ MCD_OPC_CheckPredicate, 0, 118, 104, // Skip to: 40641 /* 13899 */ MCD_OPC_CheckField, 21, 1, 1, 112, 104, // Skip to: 40641 /* 13905 */ MCD_OPC_Decode, 176, 18, 93, // Opcode: USUBWv4i16_v4i32 /* 13909 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13927 /* 13913 */ MCD_OPC_CheckPredicate, 0, 100, 104, // Skip to: 40641 /* 13917 */ MCD_OPC_CheckField, 21, 1, 1, 94, 104, // Skip to: 40641 /* 13923 */ MCD_OPC_Decode, 173, 13, 112, // Opcode: SSUBWv8i16_v4i32 /* 13927 */ MCD_OPC_FilterValue, 3, 86, 104, // Skip to: 40641 /* 13931 */ MCD_OPC_CheckPredicate, 0, 82, 104, // Skip to: 40641 /* 13935 */ MCD_OPC_CheckField, 21, 1, 1, 76, 104, // Skip to: 40641 /* 13941 */ MCD_OPC_Decode, 178, 18, 112, // Opcode: USUBWv8i16_v4i32 /* 13945 */ MCD_OPC_FilterValue, 13, 75, 0, // Skip to: 14024 /* 13949 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 13952 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13970 /* 13956 */ MCD_OPC_CheckPredicate, 0, 57, 104, // Skip to: 40641 /* 13960 */ MCD_OPC_CheckField, 21, 1, 1, 51, 104, // Skip to: 40641 /* 13966 */ MCD_OPC_Decode, 200, 1, 89, // Opcode: CMGTv4i16 /* 13970 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13988 /* 13974 */ MCD_OPC_CheckPredicate, 0, 39, 104, // Skip to: 40641 /* 13978 */ MCD_OPC_CheckField, 21, 1, 1, 33, 104, // Skip to: 40641 /* 13984 */ MCD_OPC_Decode, 212, 1, 89, // Opcode: CMHIv4i16 /* 13988 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14006 /* 13992 */ MCD_OPC_CheckPredicate, 0, 21, 104, // Skip to: 40641 /* 13996 */ MCD_OPC_CheckField, 21, 1, 1, 15, 104, // Skip to: 40641 /* 14002 */ MCD_OPC_Decode, 204, 1, 112, // Opcode: CMGTv8i16 /* 14006 */ MCD_OPC_FilterValue, 3, 7, 104, // Skip to: 40641 /* 14010 */ MCD_OPC_CheckPredicate, 0, 3, 104, // Skip to: 40641 /* 14014 */ MCD_OPC_CheckField, 21, 1, 1, 253, 103, // Skip to: 40641 /* 14020 */ MCD_OPC_Decode, 214, 1, 112, // Opcode: CMHIv8i16 /* 14024 */ MCD_OPC_FilterValue, 14, 193, 0, // Skip to: 14221 /* 14028 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14031 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 14082 /* 14035 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 14038 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14050 /* 14042 */ MCD_OPC_CheckPredicate, 0, 227, 103, // Skip to: 40641 /* 14046 */ MCD_OPC_Decode, 203, 18, 89, // Opcode: ZIP1v4i16 /* 14050 */ MCD_OPC_FilterValue, 1, 219, 103, // Skip to: 40641 /* 14054 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 14057 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14069 /* 14061 */ MCD_OPC_CheckPredicate, 0, 208, 103, // Skip to: 40641 /* 14065 */ MCD_OPC_Decode, 190, 15, 99, // Opcode: SUQADDv4i16 /* 14069 */ MCD_OPC_FilterValue, 16, 200, 103, // Skip to: 40641 /* 14073 */ MCD_OPC_CheckPredicate, 0, 196, 103, // Skip to: 40641 /* 14077 */ MCD_OPC_Decode, 238, 9, 144, 1, // Opcode: SADDLVv4i16v /* 14082 */ MCD_OPC_FilterValue, 1, 40, 0, // Skip to: 14126 /* 14086 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 14089 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14101 /* 14093 */ MCD_OPC_CheckPredicate, 0, 176, 103, // Skip to: 40641 /* 14097 */ MCD_OPC_Decode, 156, 18, 99, // Opcode: USQADDv4i16 /* 14101 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 14113 /* 14105 */ MCD_OPC_CheckPredicate, 0, 164, 103, // Skip to: 40641 /* 14109 */ MCD_OPC_Decode, 172, 10, 108, // Opcode: SHLLv4i16 /* 14113 */ MCD_OPC_FilterValue, 48, 156, 103, // Skip to: 40641 /* 14117 */ MCD_OPC_CheckPredicate, 0, 152, 103, // Skip to: 40641 /* 14121 */ MCD_OPC_Decode, 144, 16, 144, 1, // Opcode: UADDLVv4i16v /* 14126 */ MCD_OPC_FilterValue, 2, 47, 0, // Skip to: 14177 /* 14130 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 14133 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14145 /* 14137 */ MCD_OPC_CheckPredicate, 0, 132, 103, // Skip to: 40641 /* 14141 */ MCD_OPC_Decode, 205, 18, 112, // Opcode: ZIP1v8i16 /* 14145 */ MCD_OPC_FilterValue, 1, 124, 103, // Skip to: 40641 /* 14149 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 14152 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14164 /* 14156 */ MCD_OPC_CheckPredicate, 0, 113, 103, // Skip to: 40641 /* 14160 */ MCD_OPC_Decode, 192, 15, 126, // Opcode: SUQADDv8i16 /* 14164 */ MCD_OPC_FilterValue, 16, 105, 103, // Skip to: 40641 /* 14168 */ MCD_OPC_CheckPredicate, 0, 101, 103, // Skip to: 40641 /* 14172 */ MCD_OPC_Decode, 240, 9, 139, 1, // Opcode: SADDLVv8i16v /* 14177 */ MCD_OPC_FilterValue, 3, 92, 103, // Skip to: 40641 /* 14181 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 14184 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14196 /* 14188 */ MCD_OPC_CheckPredicate, 0, 81, 103, // Skip to: 40641 /* 14192 */ MCD_OPC_Decode, 158, 18, 126, // Opcode: USQADDv8i16 /* 14196 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 14208 /* 14200 */ MCD_OPC_CheckPredicate, 0, 69, 103, // Skip to: 40641 /* 14204 */ MCD_OPC_Decode, 174, 10, 117, // Opcode: SHLLv8i16 /* 14208 */ MCD_OPC_FilterValue, 48, 61, 103, // Skip to: 40641 /* 14212 */ MCD_OPC_CheckPredicate, 0, 57, 103, // Skip to: 40641 /* 14216 */ MCD_OPC_Decode, 146, 16, 139, 1, // Opcode: UADDLVv8i16v /* 14221 */ MCD_OPC_FilterValue, 15, 75, 0, // Skip to: 14300 /* 14225 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14228 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14246 /* 14232 */ MCD_OPC_CheckPredicate, 0, 37, 103, // Skip to: 40641 /* 14236 */ MCD_OPC_CheckField, 21, 1, 1, 31, 103, // Skip to: 40641 /* 14242 */ MCD_OPC_Decode, 184, 1, 89, // Opcode: CMGEv4i16 /* 14246 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14264 /* 14250 */ MCD_OPC_CheckPredicate, 0, 19, 103, // Skip to: 40641 /* 14254 */ MCD_OPC_CheckField, 21, 1, 1, 13, 103, // Skip to: 40641 /* 14260 */ MCD_OPC_Decode, 220, 1, 89, // Opcode: CMHSv4i16 /* 14264 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14282 /* 14268 */ MCD_OPC_CheckPredicate, 0, 1, 103, // Skip to: 40641 /* 14272 */ MCD_OPC_CheckField, 21, 1, 1, 251, 102, // Skip to: 40641 /* 14278 */ MCD_OPC_Decode, 188, 1, 112, // Opcode: CMGEv8i16 /* 14282 */ MCD_OPC_FilterValue, 3, 243, 102, // Skip to: 40641 /* 14286 */ MCD_OPC_CheckPredicate, 0, 239, 102, // Skip to: 40641 /* 14290 */ MCD_OPC_CheckField, 21, 1, 1, 233, 102, // Skip to: 40641 /* 14296 */ MCD_OPC_Decode, 222, 1, 112, // Opcode: CMHSv8i16 /* 14300 */ MCD_OPC_FilterValue, 16, 73, 0, // Skip to: 14377 /* 14304 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14307 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 14324 /* 14311 */ MCD_OPC_CheckPredicate, 0, 214, 102, // Skip to: 40641 /* 14315 */ MCD_OPC_CheckField, 21, 1, 1, 208, 102, // Skip to: 40641 /* 14321 */ MCD_OPC_Decode, 36, 103, // Opcode: ADDHNv4i32_v4i16 /* 14324 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14342 /* 14328 */ MCD_OPC_CheckPredicate, 0, 197, 102, // Skip to: 40641 /* 14332 */ MCD_OPC_CheckField, 21, 1, 1, 191, 102, // Skip to: 40641 /* 14338 */ MCD_OPC_Decode, 160, 9, 103, // Opcode: RADDHNv4i32_v4i16 /* 14342 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 14359 /* 14346 */ MCD_OPC_CheckPredicate, 0, 179, 102, // Skip to: 40641 /* 14350 */ MCD_OPC_CheckField, 21, 1, 1, 173, 102, // Skip to: 40641 /* 14356 */ MCD_OPC_Decode, 37, 120, // Opcode: ADDHNv4i32_v8i16 /* 14359 */ MCD_OPC_FilterValue, 3, 166, 102, // Skip to: 40641 /* 14363 */ MCD_OPC_CheckPredicate, 0, 162, 102, // Skip to: 40641 /* 14367 */ MCD_OPC_CheckField, 21, 1, 1, 156, 102, // Skip to: 40641 /* 14373 */ MCD_OPC_Decode, 161, 9, 120, // Opcode: RADDHNv4i32_v8i16 /* 14377 */ MCD_OPC_FilterValue, 17, 75, 0, // Skip to: 14456 /* 14381 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14384 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14402 /* 14388 */ MCD_OPC_CheckPredicate, 0, 137, 102, // Skip to: 40641 /* 14392 */ MCD_OPC_CheckField, 21, 1, 1, 131, 102, // Skip to: 40641 /* 14398 */ MCD_OPC_Decode, 143, 13, 89, // Opcode: SSHLv4i16 /* 14402 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14420 /* 14406 */ MCD_OPC_CheckPredicate, 0, 119, 102, // Skip to: 40641 /* 14410 */ MCD_OPC_CheckField, 21, 1, 1, 113, 102, // Skip to: 40641 /* 14416 */ MCD_OPC_Decode, 137, 18, 89, // Opcode: USHLv4i16 /* 14420 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14438 /* 14424 */ MCD_OPC_CheckPredicate, 0, 101, 102, // Skip to: 40641 /* 14428 */ MCD_OPC_CheckField, 21, 1, 1, 95, 102, // Skip to: 40641 /* 14434 */ MCD_OPC_Decode, 145, 13, 112, // Opcode: SSHLv8i16 /* 14438 */ MCD_OPC_FilterValue, 3, 87, 102, // Skip to: 40641 /* 14442 */ MCD_OPC_CheckPredicate, 0, 83, 102, // Skip to: 40641 /* 14446 */ MCD_OPC_CheckField, 21, 1, 1, 77, 102, // Skip to: 40641 /* 14452 */ MCD_OPC_Decode, 139, 18, 112, // Opcode: USHLv8i16 /* 14456 */ MCD_OPC_FilterValue, 18, 127, 0, // Skip to: 14587 /* 14460 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14463 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 14494 /* 14467 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 14470 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14482 /* 14474 */ MCD_OPC_CheckPredicate, 0, 51, 102, // Skip to: 40641 /* 14478 */ MCD_OPC_Decode, 148, 1, 90, // Opcode: CLSv4i16 /* 14482 */ MCD_OPC_FilterValue, 33, 43, 102, // Skip to: 40641 /* 14486 */ MCD_OPC_CheckPredicate, 0, 39, 102, // Skip to: 40641 /* 14490 */ MCD_OPC_Decode, 210, 12, 95, // Opcode: SQXTNv4i16 /* 14494 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 14525 /* 14498 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 14501 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14513 /* 14505 */ MCD_OPC_CheckPredicate, 0, 20, 102, // Skip to: 40641 /* 14509 */ MCD_OPC_Decode, 156, 1, 90, // Opcode: CLZv4i16 /* 14513 */ MCD_OPC_FilterValue, 33, 12, 102, // Skip to: 40641 /* 14517 */ MCD_OPC_CheckPredicate, 0, 8, 102, // Skip to: 40641 /* 14521 */ MCD_OPC_Decode, 217, 17, 95, // Opcode: UQXTNv4i16 /* 14525 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 14556 /* 14529 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 14532 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14544 /* 14536 */ MCD_OPC_CheckPredicate, 0, 245, 101, // Skip to: 40641 /* 14540 */ MCD_OPC_Decode, 150, 1, 117, // Opcode: CLSv8i16 /* 14544 */ MCD_OPC_FilterValue, 33, 237, 101, // Skip to: 40641 /* 14548 */ MCD_OPC_CheckPredicate, 0, 233, 101, // Skip to: 40641 /* 14552 */ MCD_OPC_Decode, 212, 12, 126, // Opcode: SQXTNv8i16 /* 14556 */ MCD_OPC_FilterValue, 3, 225, 101, // Skip to: 40641 /* 14560 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 14563 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14575 /* 14567 */ MCD_OPC_CheckPredicate, 0, 214, 101, // Skip to: 40641 /* 14571 */ MCD_OPC_Decode, 158, 1, 117, // Opcode: CLZv8i16 /* 14575 */ MCD_OPC_FilterValue, 33, 206, 101, // Skip to: 40641 /* 14579 */ MCD_OPC_CheckPredicate, 0, 202, 101, // Skip to: 40641 /* 14583 */ MCD_OPC_Decode, 219, 17, 126, // Opcode: UQXTNv8i16 /* 14587 */ MCD_OPC_FilterValue, 19, 75, 0, // Skip to: 14666 /* 14591 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14594 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14612 /* 14598 */ MCD_OPC_CheckPredicate, 0, 183, 101, // Skip to: 40641 /* 14602 */ MCD_OPC_CheckField, 21, 1, 1, 177, 101, // Skip to: 40641 /* 14608 */ MCD_OPC_Decode, 168, 12, 89, // Opcode: SQSHLv4i16 /* 14612 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14630 /* 14616 */ MCD_OPC_CheckPredicate, 0, 165, 101, // Skip to: 40641 /* 14620 */ MCD_OPC_CheckField, 21, 1, 1, 159, 101, // Skip to: 40641 /* 14626 */ MCD_OPC_Decode, 184, 17, 89, // Opcode: UQSHLv4i16 /* 14630 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14648 /* 14634 */ MCD_OPC_CheckPredicate, 0, 147, 101, // Skip to: 40641 /* 14638 */ MCD_OPC_CheckField, 21, 1, 1, 141, 101, // Skip to: 40641 /* 14644 */ MCD_OPC_Decode, 172, 12, 112, // Opcode: SQSHLv8i16 /* 14648 */ MCD_OPC_FilterValue, 3, 133, 101, // Skip to: 40641 /* 14652 */ MCD_OPC_CheckPredicate, 0, 129, 101, // Skip to: 40641 /* 14656 */ MCD_OPC_CheckField, 21, 1, 1, 123, 101, // Skip to: 40641 /* 14662 */ MCD_OPC_Decode, 188, 17, 112, // Opcode: UQSHLv8i16 /* 14666 */ MCD_OPC_FilterValue, 20, 75, 0, // Skip to: 14745 /* 14670 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14673 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14691 /* 14677 */ MCD_OPC_CheckPredicate, 0, 104, 101, // Skip to: 40641 /* 14681 */ MCD_OPC_CheckField, 21, 1, 1, 98, 101, // Skip to: 40641 /* 14687 */ MCD_OPC_Decode, 203, 9, 105, // Opcode: SABALv4i16_v4i32 /* 14691 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14709 /* 14695 */ MCD_OPC_CheckPredicate, 0, 86, 101, // Skip to: 40641 /* 14699 */ MCD_OPC_CheckField, 21, 1, 1, 80, 101, // Skip to: 40641 /* 14705 */ MCD_OPC_Decode, 237, 15, 105, // Opcode: UABALv4i16_v4i32 /* 14709 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14727 /* 14713 */ MCD_OPC_CheckPredicate, 0, 68, 101, // Skip to: 40641 /* 14717 */ MCD_OPC_CheckField, 21, 1, 1, 62, 101, // Skip to: 40641 /* 14723 */ MCD_OPC_Decode, 205, 9, 120, // Opcode: SABALv8i16_v4i32 /* 14727 */ MCD_OPC_FilterValue, 3, 54, 101, // Skip to: 40641 /* 14731 */ MCD_OPC_CheckPredicate, 0, 50, 101, // Skip to: 40641 /* 14735 */ MCD_OPC_CheckField, 21, 1, 1, 44, 101, // Skip to: 40641 /* 14741 */ MCD_OPC_Decode, 239, 15, 120, // Opcode: UABALv8i16_v4i32 /* 14745 */ MCD_OPC_FilterValue, 21, 75, 0, // Skip to: 14824 /* 14749 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14752 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14770 /* 14756 */ MCD_OPC_CheckPredicate, 0, 25, 101, // Skip to: 40641 /* 14760 */ MCD_OPC_CheckField, 21, 1, 1, 19, 101, // Skip to: 40641 /* 14766 */ MCD_OPC_Decode, 241, 12, 89, // Opcode: SRSHLv4i16 /* 14770 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14788 /* 14774 */ MCD_OPC_CheckPredicate, 0, 7, 101, // Skip to: 40641 /* 14778 */ MCD_OPC_CheckField, 21, 1, 1, 1, 101, // Skip to: 40641 /* 14784 */ MCD_OPC_Decode, 233, 17, 89, // Opcode: URSHLv4i16 /* 14788 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14806 /* 14792 */ MCD_OPC_CheckPredicate, 0, 245, 100, // Skip to: 40641 /* 14796 */ MCD_OPC_CheckField, 21, 1, 1, 239, 100, // Skip to: 40641 /* 14802 */ MCD_OPC_Decode, 243, 12, 112, // Opcode: SRSHLv8i16 /* 14806 */ MCD_OPC_FilterValue, 3, 231, 100, // Skip to: 40641 /* 14810 */ MCD_OPC_CheckPredicate, 0, 227, 100, // Skip to: 40641 /* 14814 */ MCD_OPC_CheckField, 21, 1, 1, 221, 100, // Skip to: 40641 /* 14820 */ MCD_OPC_Decode, 235, 17, 112, // Opcode: URSHLv8i16 /* 14824 */ MCD_OPC_FilterValue, 22, 75, 0, // Skip to: 14903 /* 14828 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14831 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14849 /* 14835 */ MCD_OPC_CheckPredicate, 0, 202, 100, // Skip to: 40641 /* 14839 */ MCD_OPC_CheckField, 21, 1, 0, 196, 100, // Skip to: 40641 /* 14845 */ MCD_OPC_Decode, 190, 18, 89, // Opcode: UZP2v4i16 /* 14849 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14867 /* 14853 */ MCD_OPC_CheckPredicate, 0, 184, 100, // Skip to: 40641 /* 14857 */ MCD_OPC_CheckField, 16, 6, 32, 178, 100, // Skip to: 40641 /* 14863 */ MCD_OPC_Decode, 167, 9, 90, // Opcode: RBITv8i8 /* 14867 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14885 /* 14871 */ MCD_OPC_CheckPredicate, 0, 166, 100, // Skip to: 40641 /* 14875 */ MCD_OPC_CheckField, 21, 1, 0, 160, 100, // Skip to: 40641 /* 14881 */ MCD_OPC_Decode, 192, 18, 112, // Opcode: UZP2v8i16 /* 14885 */ MCD_OPC_FilterValue, 3, 152, 100, // Skip to: 40641 /* 14889 */ MCD_OPC_CheckPredicate, 0, 148, 100, // Skip to: 40641 /* 14893 */ MCD_OPC_CheckField, 16, 6, 32, 142, 100, // Skip to: 40641 /* 14899 */ MCD_OPC_Decode, 166, 9, 117, // Opcode: RBITv16i8 /* 14903 */ MCD_OPC_FilterValue, 23, 75, 0, // Skip to: 14982 /* 14907 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14910 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14928 /* 14914 */ MCD_OPC_CheckPredicate, 0, 123, 100, // Skip to: 40641 /* 14918 */ MCD_OPC_CheckField, 21, 1, 1, 117, 100, // Skip to: 40641 /* 14924 */ MCD_OPC_Decode, 249, 11, 89, // Opcode: SQRSHLv4i16 /* 14928 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14946 /* 14932 */ MCD_OPC_CheckPredicate, 0, 105, 100, // Skip to: 40641 /* 14936 */ MCD_OPC_CheckField, 21, 1, 1, 99, 100, // Skip to: 40641 /* 14942 */ MCD_OPC_Decode, 157, 17, 89, // Opcode: UQRSHLv4i16 /* 14946 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14964 /* 14950 */ MCD_OPC_CheckPredicate, 0, 87, 100, // Skip to: 40641 /* 14954 */ MCD_OPC_CheckField, 21, 1, 1, 81, 100, // Skip to: 40641 /* 14960 */ MCD_OPC_Decode, 251, 11, 112, // Opcode: SQRSHLv8i16 /* 14964 */ MCD_OPC_FilterValue, 3, 73, 100, // Skip to: 40641 /* 14968 */ MCD_OPC_CheckPredicate, 0, 69, 100, // Skip to: 40641 /* 14972 */ MCD_OPC_CheckField, 21, 1, 1, 63, 100, // Skip to: 40641 /* 14978 */ MCD_OPC_Decode, 159, 17, 112, // Opcode: UQRSHLv8i16 /* 14982 */ MCD_OPC_FilterValue, 24, 75, 0, // Skip to: 15061 /* 14986 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 14989 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15007 /* 14993 */ MCD_OPC_CheckPredicate, 0, 44, 100, // Skip to: 40641 /* 14997 */ MCD_OPC_CheckField, 21, 1, 1, 38, 100, // Skip to: 40641 /* 15003 */ MCD_OPC_Decode, 153, 15, 103, // Opcode: SUBHNv4i32_v4i16 /* 15007 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15025 /* 15011 */ MCD_OPC_CheckPredicate, 0, 26, 100, // Skip to: 40641 /* 15015 */ MCD_OPC_CheckField, 21, 1, 1, 20, 100, // Skip to: 40641 /* 15021 */ MCD_OPC_Decode, 197, 9, 103, // Opcode: RSUBHNv4i32_v4i16 /* 15025 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15043 /* 15029 */ MCD_OPC_CheckPredicate, 0, 8, 100, // Skip to: 40641 /* 15033 */ MCD_OPC_CheckField, 21, 1, 1, 2, 100, // Skip to: 40641 /* 15039 */ MCD_OPC_Decode, 154, 15, 120, // Opcode: SUBHNv4i32_v8i16 /* 15043 */ MCD_OPC_FilterValue, 3, 250, 99, // Skip to: 40641 /* 15047 */ MCD_OPC_CheckPredicate, 0, 246, 99, // Skip to: 40641 /* 15051 */ MCD_OPC_CheckField, 21, 1, 1, 240, 99, // Skip to: 40641 /* 15057 */ MCD_OPC_Decode, 198, 9, 120, // Opcode: RSUBHNv4i32_v8i16 /* 15061 */ MCD_OPC_FilterValue, 25, 75, 0, // Skip to: 15140 /* 15065 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15068 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15086 /* 15072 */ MCD_OPC_CheckPredicate, 0, 221, 99, // Skip to: 40641 /* 15076 */ MCD_OPC_CheckField, 21, 1, 1, 215, 99, // Skip to: 40641 /* 15082 */ MCD_OPC_Decode, 218, 10, 89, // Opcode: SMAXv4i16 /* 15086 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15104 /* 15090 */ MCD_OPC_CheckPredicate, 0, 203, 99, // Skip to: 40641 /* 15094 */ MCD_OPC_CheckField, 21, 1, 1, 197, 99, // Skip to: 40641 /* 15100 */ MCD_OPC_Decode, 210, 16, 89, // Opcode: UMAXv4i16 /* 15104 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15122 /* 15108 */ MCD_OPC_CheckPredicate, 0, 185, 99, // Skip to: 40641 /* 15112 */ MCD_OPC_CheckField, 21, 1, 1, 179, 99, // Skip to: 40641 /* 15118 */ MCD_OPC_Decode, 220, 10, 112, // Opcode: SMAXv8i16 /* 15122 */ MCD_OPC_FilterValue, 3, 171, 99, // Skip to: 40641 /* 15126 */ MCD_OPC_CheckPredicate, 0, 167, 99, // Skip to: 40641 /* 15130 */ MCD_OPC_CheckField, 21, 1, 1, 161, 99, // Skip to: 40641 /* 15136 */ MCD_OPC_Decode, 212, 16, 112, // Opcode: UMAXv8i16 /* 15140 */ MCD_OPC_FilterValue, 26, 165, 0, // Skip to: 15309 /* 15144 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15147 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 15197 /* 15151 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 15154 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15166 /* 15158 */ MCD_OPC_CheckPredicate, 0, 135, 99, // Skip to: 40641 /* 15162 */ MCD_OPC_Decode, 231, 15, 89, // Opcode: TRN2v4i16 /* 15166 */ MCD_OPC_FilterValue, 1, 127, 99, // Skip to: 40641 /* 15170 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 15173 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15185 /* 15177 */ MCD_OPC_CheckPredicate, 0, 116, 99, // Skip to: 40641 /* 15181 */ MCD_OPC_Decode, 227, 9, 99, // Opcode: SADALPv4i16_v2i32 /* 15185 */ MCD_OPC_FilterValue, 1, 108, 99, // Skip to: 40641 /* 15189 */ MCD_OPC_CheckPredicate, 0, 104, 99, // Skip to: 40641 /* 15193 */ MCD_OPC_Decode, 198, 3, 95, // Opcode: FCVTNv2i32 /* 15197 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 15228 /* 15201 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 15204 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15216 /* 15208 */ MCD_OPC_CheckPredicate, 0, 85, 99, // Skip to: 40641 /* 15212 */ MCD_OPC_Decode, 133, 16, 99, // Opcode: UADALPv4i16_v2i32 /* 15216 */ MCD_OPC_FilterValue, 33, 77, 99, // Skip to: 40641 /* 15220 */ MCD_OPC_CheckPredicate, 0, 73, 99, // Skip to: 40641 /* 15224 */ MCD_OPC_Decode, 223, 3, 95, // Opcode: FCVTXNv2f32 /* 15228 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 15278 /* 15232 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 15235 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15247 /* 15239 */ MCD_OPC_CheckPredicate, 0, 54, 99, // Skip to: 40641 /* 15243 */ MCD_OPC_Decode, 233, 15, 112, // Opcode: TRN2v8i16 /* 15247 */ MCD_OPC_FilterValue, 1, 46, 99, // Skip to: 40641 /* 15251 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 15254 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15266 /* 15258 */ MCD_OPC_CheckPredicate, 0, 35, 99, // Skip to: 40641 /* 15262 */ MCD_OPC_Decode, 229, 9, 126, // Opcode: SADALPv8i16_v4i32 /* 15266 */ MCD_OPC_FilterValue, 1, 27, 99, // Skip to: 40641 /* 15270 */ MCD_OPC_CheckPredicate, 0, 23, 99, // Skip to: 40641 /* 15274 */ MCD_OPC_Decode, 200, 3, 126, // Opcode: FCVTNv4i32 /* 15278 */ MCD_OPC_FilterValue, 3, 15, 99, // Skip to: 40641 /* 15282 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 15285 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15297 /* 15289 */ MCD_OPC_CheckPredicate, 0, 4, 99, // Skip to: 40641 /* 15293 */ MCD_OPC_Decode, 135, 16, 126, // Opcode: UADALPv8i16_v4i32 /* 15297 */ MCD_OPC_FilterValue, 33, 252, 98, // Skip to: 40641 /* 15301 */ MCD_OPC_CheckPredicate, 0, 248, 98, // Skip to: 40641 /* 15305 */ MCD_OPC_Decode, 224, 3, 126, // Opcode: FCVTXNv4f32 /* 15309 */ MCD_OPC_FilterValue, 27, 75, 0, // Skip to: 15388 /* 15313 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15316 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15334 /* 15320 */ MCD_OPC_CheckPredicate, 0, 229, 98, // Skip to: 40641 /* 15324 */ MCD_OPC_CheckField, 21, 1, 1, 223, 98, // Skip to: 40641 /* 15330 */ MCD_OPC_Decode, 236, 10, 89, // Opcode: SMINv4i16 /* 15334 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15352 /* 15338 */ MCD_OPC_CheckPredicate, 0, 211, 98, // Skip to: 40641 /* 15342 */ MCD_OPC_CheckField, 21, 1, 1, 205, 98, // Skip to: 40641 /* 15348 */ MCD_OPC_Decode, 227, 16, 89, // Opcode: UMINv4i16 /* 15352 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15370 /* 15356 */ MCD_OPC_CheckPredicate, 0, 193, 98, // Skip to: 40641 /* 15360 */ MCD_OPC_CheckField, 21, 1, 1, 187, 98, // Skip to: 40641 /* 15366 */ MCD_OPC_Decode, 238, 10, 112, // Opcode: SMINv8i16 /* 15370 */ MCD_OPC_FilterValue, 3, 179, 98, // Skip to: 40641 /* 15374 */ MCD_OPC_CheckPredicate, 0, 175, 98, // Skip to: 40641 /* 15378 */ MCD_OPC_CheckField, 21, 1, 1, 169, 98, // Skip to: 40641 /* 15384 */ MCD_OPC_Decode, 229, 16, 112, // Opcode: UMINv8i16 /* 15388 */ MCD_OPC_FilterValue, 28, 75, 0, // Skip to: 15467 /* 15392 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15395 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15413 /* 15399 */ MCD_OPC_CheckPredicate, 0, 150, 98, // Skip to: 40641 /* 15403 */ MCD_OPC_CheckField, 21, 1, 1, 144, 98, // Skip to: 40641 /* 15409 */ MCD_OPC_Decode, 215, 9, 85, // Opcode: SABDLv4i16_v4i32 /* 15413 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15431 /* 15417 */ MCD_OPC_CheckPredicate, 0, 132, 98, // Skip to: 40641 /* 15421 */ MCD_OPC_CheckField, 21, 1, 1, 126, 98, // Skip to: 40641 /* 15427 */ MCD_OPC_Decode, 249, 15, 85, // Opcode: UABDLv4i16_v4i32 /* 15431 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15449 /* 15435 */ MCD_OPC_CheckPredicate, 0, 114, 98, // Skip to: 40641 /* 15439 */ MCD_OPC_CheckField, 21, 1, 1, 108, 98, // Skip to: 40641 /* 15445 */ MCD_OPC_Decode, 217, 9, 112, // Opcode: SABDLv8i16_v4i32 /* 15449 */ MCD_OPC_FilterValue, 3, 100, 98, // Skip to: 40641 /* 15453 */ MCD_OPC_CheckPredicate, 0, 96, 98, // Skip to: 40641 /* 15457 */ MCD_OPC_CheckField, 21, 1, 1, 90, 98, // Skip to: 40641 /* 15463 */ MCD_OPC_Decode, 251, 15, 112, // Opcode: UABDLv8i16_v4i32 /* 15467 */ MCD_OPC_FilterValue, 29, 75, 0, // Skip to: 15546 /* 15471 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15474 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15492 /* 15478 */ MCD_OPC_CheckPredicate, 0, 71, 98, // Skip to: 40641 /* 15482 */ MCD_OPC_CheckField, 21, 1, 1, 65, 98, // Skip to: 40641 /* 15488 */ MCD_OPC_Decode, 221, 9, 89, // Opcode: SABDv4i16 /* 15492 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15510 /* 15496 */ MCD_OPC_CheckPredicate, 0, 53, 98, // Skip to: 40641 /* 15500 */ MCD_OPC_CheckField, 21, 1, 1, 47, 98, // Skip to: 40641 /* 15506 */ MCD_OPC_Decode, 255, 15, 89, // Opcode: UABDv4i16 /* 15510 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15528 /* 15514 */ MCD_OPC_CheckPredicate, 0, 35, 98, // Skip to: 40641 /* 15518 */ MCD_OPC_CheckField, 21, 1, 1, 29, 98, // Skip to: 40641 /* 15524 */ MCD_OPC_Decode, 223, 9, 112, // Opcode: SABDv8i16 /* 15528 */ MCD_OPC_FilterValue, 3, 21, 98, // Skip to: 40641 /* 15532 */ MCD_OPC_CheckPredicate, 0, 17, 98, // Skip to: 40641 /* 15536 */ MCD_OPC_CheckField, 21, 1, 1, 11, 98, // Skip to: 40641 /* 15542 */ MCD_OPC_Decode, 129, 16, 112, // Opcode: UABDv8i16 /* 15546 */ MCD_OPC_FilterValue, 30, 139, 0, // Skip to: 15689 /* 15550 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15553 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 15603 /* 15557 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 15560 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15572 /* 15564 */ MCD_OPC_CheckPredicate, 0, 241, 97, // Skip to: 40641 /* 15568 */ MCD_OPC_Decode, 210, 18, 89, // Opcode: ZIP2v4i16 /* 15572 */ MCD_OPC_FilterValue, 1, 233, 97, // Skip to: 40641 /* 15576 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 15579 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15591 /* 15583 */ MCD_OPC_CheckPredicate, 0, 222, 97, // Skip to: 40641 /* 15587 */ MCD_OPC_Decode, 156, 11, 90, // Opcode: SQABSv4i16 /* 15591 */ MCD_OPC_FilterValue, 1, 214, 97, // Skip to: 40641 /* 15595 */ MCD_OPC_CheckPredicate, 0, 210, 97, // Skip to: 40641 /* 15599 */ MCD_OPC_Decode, 158, 3, 108, // Opcode: FCVTLv2i32 /* 15603 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15621 /* 15607 */ MCD_OPC_CheckPredicate, 0, 198, 97, // Skip to: 40641 /* 15611 */ MCD_OPC_CheckField, 16, 6, 32, 192, 97, // Skip to: 40641 /* 15617 */ MCD_OPC_Decode, 226, 11, 90, // Opcode: SQNEGv4i16 /* 15621 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 15671 /* 15625 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 15628 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15640 /* 15632 */ MCD_OPC_CheckPredicate, 0, 173, 97, // Skip to: 40641 /* 15636 */ MCD_OPC_Decode, 212, 18, 112, // Opcode: ZIP2v8i16 /* 15640 */ MCD_OPC_FilterValue, 1, 165, 97, // Skip to: 40641 /* 15644 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 15647 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15659 /* 15651 */ MCD_OPC_CheckPredicate, 0, 154, 97, // Skip to: 40641 /* 15655 */ MCD_OPC_Decode, 158, 11, 117, // Opcode: SQABSv8i16 /* 15659 */ MCD_OPC_FilterValue, 1, 146, 97, // Skip to: 40641 /* 15663 */ MCD_OPC_CheckPredicate, 0, 142, 97, // Skip to: 40641 /* 15667 */ MCD_OPC_Decode, 160, 3, 117, // Opcode: FCVTLv4i32 /* 15671 */ MCD_OPC_FilterValue, 3, 134, 97, // Skip to: 40641 /* 15675 */ MCD_OPC_CheckPredicate, 0, 130, 97, // Skip to: 40641 /* 15679 */ MCD_OPC_CheckField, 16, 6, 32, 124, 97, // Skip to: 40641 /* 15685 */ MCD_OPC_Decode, 228, 11, 117, // Opcode: SQNEGv8i16 /* 15689 */ MCD_OPC_FilterValue, 31, 75, 0, // Skip to: 15768 /* 15693 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15696 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15714 /* 15700 */ MCD_OPC_CheckPredicate, 0, 105, 97, // Skip to: 40641 /* 15704 */ MCD_OPC_CheckField, 21, 1, 1, 99, 97, // Skip to: 40641 /* 15710 */ MCD_OPC_Decode, 209, 9, 109, // Opcode: SABAv4i16 /* 15714 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15732 /* 15718 */ MCD_OPC_CheckPredicate, 0, 87, 97, // Skip to: 40641 /* 15722 */ MCD_OPC_CheckField, 21, 1, 1, 81, 97, // Skip to: 40641 /* 15728 */ MCD_OPC_Decode, 243, 15, 109, // Opcode: UABAv4i16 /* 15732 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15750 /* 15736 */ MCD_OPC_CheckPredicate, 0, 69, 97, // Skip to: 40641 /* 15740 */ MCD_OPC_CheckField, 21, 1, 1, 63, 97, // Skip to: 40641 /* 15746 */ MCD_OPC_Decode, 211, 9, 120, // Opcode: SABAv8i16 /* 15750 */ MCD_OPC_FilterValue, 3, 55, 97, // Skip to: 40641 /* 15754 */ MCD_OPC_CheckPredicate, 0, 51, 97, // Skip to: 40641 /* 15758 */ MCD_OPC_CheckField, 21, 1, 1, 45, 97, // Skip to: 40641 /* 15764 */ MCD_OPC_Decode, 245, 15, 120, // Opcode: UABAv8i16 /* 15768 */ MCD_OPC_FilterValue, 32, 75, 0, // Skip to: 15847 /* 15772 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15775 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15793 /* 15779 */ MCD_OPC_CheckPredicate, 0, 26, 97, // Skip to: 40641 /* 15783 */ MCD_OPC_CheckField, 21, 1, 1, 20, 97, // Skip to: 40641 /* 15789 */ MCD_OPC_Decode, 244, 10, 105, // Opcode: SMLALv4i16_v4i32 /* 15793 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15811 /* 15797 */ MCD_OPC_CheckPredicate, 0, 8, 97, // Skip to: 40641 /* 15801 */ MCD_OPC_CheckField, 21, 1, 1, 2, 97, // Skip to: 40641 /* 15807 */ MCD_OPC_Decode, 235, 16, 105, // Opcode: UMLALv4i16_v4i32 /* 15811 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15829 /* 15815 */ MCD_OPC_CheckPredicate, 0, 246, 96, // Skip to: 40641 /* 15819 */ MCD_OPC_CheckField, 21, 1, 1, 240, 96, // Skip to: 40641 /* 15825 */ MCD_OPC_Decode, 248, 10, 120, // Opcode: SMLALv8i16_v4i32 /* 15829 */ MCD_OPC_FilterValue, 3, 232, 96, // Skip to: 40641 /* 15833 */ MCD_OPC_CheckPredicate, 0, 228, 96, // Skip to: 40641 /* 15837 */ MCD_OPC_CheckField, 21, 1, 1, 222, 96, // Skip to: 40641 /* 15843 */ MCD_OPC_Decode, 239, 16, 120, // Opcode: UMLALv8i16_v4i32 /* 15847 */ MCD_OPC_FilterValue, 33, 73, 0, // Skip to: 15924 /* 15851 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15854 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 15871 /* 15858 */ MCD_OPC_CheckPredicate, 0, 203, 96, // Skip to: 40641 /* 15862 */ MCD_OPC_CheckField, 21, 1, 1, 197, 96, // Skip to: 40641 /* 15868 */ MCD_OPC_Decode, 75, 89, // Opcode: ADDv4i16 /* 15871 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15889 /* 15875 */ MCD_OPC_CheckPredicate, 0, 186, 96, // Skip to: 40641 /* 15879 */ MCD_OPC_CheckField, 21, 1, 1, 180, 96, // Skip to: 40641 /* 15885 */ MCD_OPC_Decode, 179, 15, 89, // Opcode: SUBv4i16 /* 15889 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 15906 /* 15893 */ MCD_OPC_CheckPredicate, 0, 168, 96, // Skip to: 40641 /* 15897 */ MCD_OPC_CheckField, 21, 1, 1, 162, 96, // Skip to: 40641 /* 15903 */ MCD_OPC_Decode, 77, 112, // Opcode: ADDv8i16 /* 15906 */ MCD_OPC_FilterValue, 3, 155, 96, // Skip to: 40641 /* 15910 */ MCD_OPC_CheckPredicate, 0, 151, 96, // Skip to: 40641 /* 15914 */ MCD_OPC_CheckField, 21, 1, 1, 145, 96, // Skip to: 40641 /* 15920 */ MCD_OPC_Decode, 181, 15, 112, // Opcode: SUBv8i16 /* 15924 */ MCD_OPC_FilterValue, 34, 101, 0, // Skip to: 16029 /* 15928 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 15931 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15949 /* 15935 */ MCD_OPC_CheckPredicate, 0, 126, 96, // Skip to: 40641 /* 15939 */ MCD_OPC_CheckField, 16, 6, 32, 120, 96, // Skip to: 40641 /* 15945 */ MCD_OPC_Decode, 201, 1, 90, // Opcode: CMGTv4i16rz /* 15949 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15967 /* 15953 */ MCD_OPC_CheckPredicate, 0, 108, 96, // Skip to: 40641 /* 15957 */ MCD_OPC_CheckField, 16, 6, 32, 102, 96, // Skip to: 40641 /* 15963 */ MCD_OPC_Decode, 185, 1, 90, // Opcode: CMGEv4i16rz /* 15967 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 15998 /* 15971 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 15974 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15986 /* 15978 */ MCD_OPC_CheckPredicate, 0, 83, 96, // Skip to: 40641 /* 15982 */ MCD_OPC_Decode, 205, 1, 117, // Opcode: CMGTv8i16rz /* 15986 */ MCD_OPC_FilterValue, 33, 75, 96, // Skip to: 40641 /* 15990 */ MCD_OPC_CheckPredicate, 0, 71, 96, // Skip to: 40641 /* 15994 */ MCD_OPC_Decode, 170, 5, 117, // Opcode: FRINTNv2f64 /* 15998 */ MCD_OPC_FilterValue, 3, 63, 96, // Skip to: 40641 /* 16002 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 16005 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16017 /* 16009 */ MCD_OPC_CheckPredicate, 0, 52, 96, // Skip to: 40641 /* 16013 */ MCD_OPC_Decode, 189, 1, 117, // Opcode: CMGEv8i16rz /* 16017 */ MCD_OPC_FilterValue, 33, 44, 96, // Skip to: 40641 /* 16021 */ MCD_OPC_CheckPredicate, 0, 40, 96, // Skip to: 40641 /* 16025 */ MCD_OPC_Decode, 155, 5, 117, // Opcode: FRINTAv2f64 /* 16029 */ MCD_OPC_FilterValue, 35, 75, 0, // Skip to: 16108 /* 16033 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16036 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16054 /* 16040 */ MCD_OPC_CheckPredicate, 0, 21, 96, // Skip to: 40641 /* 16044 */ MCD_OPC_CheckField, 21, 1, 1, 15, 96, // Skip to: 40641 /* 16050 */ MCD_OPC_Decode, 244, 1, 89, // Opcode: CMTSTv4i16 /* 16054 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16072 /* 16058 */ MCD_OPC_CheckPredicate, 0, 3, 96, // Skip to: 40641 /* 16062 */ MCD_OPC_CheckField, 21, 1, 1, 253, 95, // Skip to: 40641 /* 16068 */ MCD_OPC_Decode, 168, 1, 89, // Opcode: CMEQv4i16 /* 16072 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16090 /* 16076 */ MCD_OPC_CheckPredicate, 0, 241, 95, // Skip to: 40641 /* 16080 */ MCD_OPC_CheckField, 21, 1, 1, 235, 95, // Skip to: 40641 /* 16086 */ MCD_OPC_Decode, 246, 1, 112, // Opcode: CMTSTv8i16 /* 16090 */ MCD_OPC_FilterValue, 3, 227, 95, // Skip to: 40641 /* 16094 */ MCD_OPC_CheckPredicate, 0, 223, 95, // Skip to: 40641 /* 16098 */ MCD_OPC_CheckField, 21, 1, 1, 217, 95, // Skip to: 40641 /* 16104 */ MCD_OPC_Decode, 172, 1, 112, // Opcode: CMEQv8i16 /* 16108 */ MCD_OPC_FilterValue, 36, 39, 0, // Skip to: 16151 /* 16112 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16115 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16133 /* 16119 */ MCD_OPC_CheckPredicate, 0, 198, 95, // Skip to: 40641 /* 16123 */ MCD_OPC_CheckField, 21, 1, 1, 192, 95, // Skip to: 40641 /* 16129 */ MCD_OPC_Decode, 178, 11, 105, // Opcode: SQDMLALv4i16_v4i32 /* 16133 */ MCD_OPC_FilterValue, 2, 184, 95, // Skip to: 40641 /* 16137 */ MCD_OPC_CheckPredicate, 0, 180, 95, // Skip to: 40641 /* 16141 */ MCD_OPC_CheckField, 21, 1, 1, 174, 95, // Skip to: 40641 /* 16147 */ MCD_OPC_Decode, 182, 11, 120, // Opcode: SQDMLALv8i16_v4i32 /* 16151 */ MCD_OPC_FilterValue, 37, 75, 0, // Skip to: 16230 /* 16155 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16158 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16176 /* 16162 */ MCD_OPC_CheckPredicate, 0, 155, 95, // Skip to: 40641 /* 16166 */ MCD_OPC_CheckField, 21, 1, 1, 149, 95, // Skip to: 40641 /* 16172 */ MCD_OPC_Decode, 185, 8, 109, // Opcode: MLAv4i16 /* 16176 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16194 /* 16180 */ MCD_OPC_CheckPredicate, 0, 137, 95, // Skip to: 40641 /* 16184 */ MCD_OPC_CheckField, 21, 1, 1, 131, 95, // Skip to: 40641 /* 16190 */ MCD_OPC_Decode, 195, 8, 109, // Opcode: MLSv4i16 /* 16194 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16212 /* 16198 */ MCD_OPC_CheckPredicate, 0, 119, 95, // Skip to: 40641 /* 16202 */ MCD_OPC_CheckField, 21, 1, 1, 113, 95, // Skip to: 40641 /* 16208 */ MCD_OPC_Decode, 189, 8, 120, // Opcode: MLAv8i16 /* 16212 */ MCD_OPC_FilterValue, 3, 105, 95, // Skip to: 40641 /* 16216 */ MCD_OPC_CheckPredicate, 0, 101, 95, // Skip to: 40641 /* 16220 */ MCD_OPC_CheckField, 21, 1, 1, 95, 95, // Skip to: 40641 /* 16226 */ MCD_OPC_Decode, 199, 8, 120, // Opcode: MLSv8i16 /* 16230 */ MCD_OPC_FilterValue, 38, 101, 0, // Skip to: 16335 /* 16234 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16237 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16255 /* 16241 */ MCD_OPC_CheckPredicate, 0, 76, 95, // Skip to: 40641 /* 16245 */ MCD_OPC_CheckField, 16, 6, 32, 70, 95, // Skip to: 40641 /* 16251 */ MCD_OPC_Decode, 169, 1, 90, // Opcode: CMEQv4i16rz /* 16255 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16273 /* 16259 */ MCD_OPC_CheckPredicate, 0, 58, 95, // Skip to: 40641 /* 16263 */ MCD_OPC_CheckField, 16, 6, 32, 52, 95, // Skip to: 40641 /* 16269 */ MCD_OPC_Decode, 228, 1, 90, // Opcode: CMLEv4i16rz /* 16273 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 16304 /* 16277 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 16280 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16292 /* 16284 */ MCD_OPC_CheckPredicate, 0, 33, 95, // Skip to: 40641 /* 16288 */ MCD_OPC_Decode, 173, 1, 117, // Opcode: CMEQv8i16rz /* 16292 */ MCD_OPC_FilterValue, 33, 25, 95, // Skip to: 40641 /* 16296 */ MCD_OPC_CheckPredicate, 0, 21, 95, // Skip to: 40641 /* 16300 */ MCD_OPC_Decode, 165, 5, 117, // Opcode: FRINTMv2f64 /* 16304 */ MCD_OPC_FilterValue, 3, 13, 95, // Skip to: 40641 /* 16308 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 16311 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16323 /* 16315 */ MCD_OPC_CheckPredicate, 0, 2, 95, // Skip to: 40641 /* 16319 */ MCD_OPC_Decode, 230, 1, 117, // Opcode: CMLEv8i16rz /* 16323 */ MCD_OPC_FilterValue, 33, 250, 94, // Skip to: 40641 /* 16327 */ MCD_OPC_CheckPredicate, 0, 246, 94, // Skip to: 40641 /* 16331 */ MCD_OPC_Decode, 180, 5, 117, // Opcode: FRINTXv2f64 /* 16335 */ MCD_OPC_FilterValue, 39, 39, 0, // Skip to: 16378 /* 16339 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16342 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16360 /* 16346 */ MCD_OPC_CheckPredicate, 0, 227, 94, // Skip to: 40641 /* 16350 */ MCD_OPC_CheckField, 21, 1, 1, 221, 94, // Skip to: 40641 /* 16356 */ MCD_OPC_Decode, 234, 8, 89, // Opcode: MULv4i16 /* 16360 */ MCD_OPC_FilterValue, 2, 213, 94, // Skip to: 40641 /* 16364 */ MCD_OPC_CheckPredicate, 0, 209, 94, // Skip to: 40641 /* 16368 */ MCD_OPC_CheckField, 21, 1, 1, 203, 94, // Skip to: 40641 /* 16374 */ MCD_OPC_Decode, 238, 8, 112, // Opcode: MULv8i16 /* 16378 */ MCD_OPC_FilterValue, 40, 75, 0, // Skip to: 16457 /* 16382 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16385 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16403 /* 16389 */ MCD_OPC_CheckPredicate, 0, 184, 94, // Skip to: 40641 /* 16393 */ MCD_OPC_CheckField, 21, 1, 1, 178, 94, // Skip to: 40641 /* 16399 */ MCD_OPC_Decode, 254, 10, 105, // Opcode: SMLSLv4i16_v4i32 /* 16403 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16421 /* 16407 */ MCD_OPC_CheckPredicate, 0, 166, 94, // Skip to: 40641 /* 16411 */ MCD_OPC_CheckField, 21, 1, 1, 160, 94, // Skip to: 40641 /* 16417 */ MCD_OPC_Decode, 245, 16, 105, // Opcode: UMLSLv4i16_v4i32 /* 16421 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16439 /* 16425 */ MCD_OPC_CheckPredicate, 0, 148, 94, // Skip to: 40641 /* 16429 */ MCD_OPC_CheckField, 21, 1, 1, 142, 94, // Skip to: 40641 /* 16435 */ MCD_OPC_Decode, 130, 11, 120, // Opcode: SMLSLv8i16_v4i32 /* 16439 */ MCD_OPC_FilterValue, 3, 134, 94, // Skip to: 40641 /* 16443 */ MCD_OPC_CheckPredicate, 0, 130, 94, // Skip to: 40641 /* 16447 */ MCD_OPC_CheckField, 21, 1, 1, 124, 94, // Skip to: 40641 /* 16453 */ MCD_OPC_Decode, 249, 16, 120, // Opcode: UMLSLv8i16_v4i32 /* 16457 */ MCD_OPC_FilterValue, 41, 75, 0, // Skip to: 16536 /* 16461 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16464 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16482 /* 16468 */ MCD_OPC_CheckPredicate, 0, 105, 94, // Skip to: 40641 /* 16472 */ MCD_OPC_CheckField, 21, 1, 1, 99, 94, // Skip to: 40641 /* 16478 */ MCD_OPC_Decode, 207, 10, 89, // Opcode: SMAXPv4i16 /* 16482 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16500 /* 16486 */ MCD_OPC_CheckPredicate, 0, 87, 94, // Skip to: 40641 /* 16490 */ MCD_OPC_CheckField, 21, 1, 1, 81, 94, // Skip to: 40641 /* 16496 */ MCD_OPC_Decode, 199, 16, 89, // Opcode: UMAXPv4i16 /* 16500 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16518 /* 16504 */ MCD_OPC_CheckPredicate, 0, 69, 94, // Skip to: 40641 /* 16508 */ MCD_OPC_CheckField, 21, 1, 1, 63, 94, // Skip to: 40641 /* 16514 */ MCD_OPC_Decode, 209, 10, 112, // Opcode: SMAXPv8i16 /* 16518 */ MCD_OPC_FilterValue, 3, 55, 94, // Skip to: 40641 /* 16522 */ MCD_OPC_CheckPredicate, 0, 51, 94, // Skip to: 40641 /* 16526 */ MCD_OPC_CheckField, 21, 1, 1, 45, 94, // Skip to: 40641 /* 16532 */ MCD_OPC_Decode, 201, 16, 112, // Opcode: UMAXPv8i16 /* 16536 */ MCD_OPC_FilterValue, 42, 179, 0, // Skip to: 16719 /* 16540 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 16543 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 16574 /* 16547 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16550 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16562 /* 16554 */ MCD_OPC_CheckPredicate, 0, 19, 94, // Skip to: 40641 /* 16558 */ MCD_OPC_Decode, 236, 1, 90, // Opcode: CMLTv4i16rz /* 16562 */ MCD_OPC_FilterValue, 2, 11, 94, // Skip to: 40641 /* 16566 */ MCD_OPC_CheckPredicate, 0, 7, 94, // Skip to: 40641 /* 16570 */ MCD_OPC_Decode, 238, 1, 117, // Opcode: CMLTv8i16rz /* 16574 */ MCD_OPC_FilterValue, 33, 27, 0, // Skip to: 16605 /* 16578 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16581 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 16593 /* 16585 */ MCD_OPC_CheckPredicate, 0, 244, 93, // Skip to: 40641 /* 16589 */ MCD_OPC_Decode, 187, 3, 117, // Opcode: FCVTNSv2f64 /* 16593 */ MCD_OPC_FilterValue, 3, 236, 93, // Skip to: 40641 /* 16597 */ MCD_OPC_CheckPredicate, 0, 232, 93, // Skip to: 40641 /* 16601 */ MCD_OPC_Decode, 196, 3, 117, // Opcode: FCVTNUv2f64 /* 16605 */ MCD_OPC_FilterValue, 48, 53, 0, // Skip to: 16662 /* 16609 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16612 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16624 /* 16616 */ MCD_OPC_CheckPredicate, 0, 213, 93, // Skip to: 40641 /* 16620 */ MCD_OPC_Decode, 212, 10, 100, // Opcode: SMAXVv4i16v /* 16624 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 16636 /* 16628 */ MCD_OPC_CheckPredicate, 0, 201, 93, // Skip to: 40641 /* 16632 */ MCD_OPC_Decode, 204, 16, 100, // Opcode: UMAXVv4i16v /* 16636 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 16649 /* 16640 */ MCD_OPC_CheckPredicate, 0, 189, 93, // Skip to: 40641 /* 16644 */ MCD_OPC_Decode, 214, 10, 131, 1, // Opcode: SMAXVv8i16v /* 16649 */ MCD_OPC_FilterValue, 3, 180, 93, // Skip to: 40641 /* 16653 */ MCD_OPC_CheckPredicate, 0, 176, 93, // Skip to: 40641 /* 16657 */ MCD_OPC_Decode, 206, 16, 131, 1, // Opcode: UMAXVv8i16v /* 16662 */ MCD_OPC_FilterValue, 49, 167, 93, // Skip to: 40641 /* 16666 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16669 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16681 /* 16673 */ MCD_OPC_CheckPredicate, 0, 156, 93, // Skip to: 40641 /* 16677 */ MCD_OPC_Decode, 230, 10, 100, // Opcode: SMINVv4i16v /* 16681 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 16693 /* 16685 */ MCD_OPC_CheckPredicate, 0, 144, 93, // Skip to: 40641 /* 16689 */ MCD_OPC_Decode, 221, 16, 100, // Opcode: UMINVv4i16v /* 16693 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 16706 /* 16697 */ MCD_OPC_CheckPredicate, 0, 132, 93, // Skip to: 40641 /* 16701 */ MCD_OPC_Decode, 232, 10, 131, 1, // Opcode: SMINVv8i16v /* 16706 */ MCD_OPC_FilterValue, 3, 123, 93, // Skip to: 40641 /* 16710 */ MCD_OPC_CheckPredicate, 0, 119, 93, // Skip to: 40641 /* 16714 */ MCD_OPC_Decode, 223, 16, 131, 1, // Opcode: UMINVv8i16v /* 16719 */ MCD_OPC_FilterValue, 43, 75, 0, // Skip to: 16798 /* 16723 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16726 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16744 /* 16730 */ MCD_OPC_CheckPredicate, 0, 99, 93, // Skip to: 40641 /* 16734 */ MCD_OPC_CheckField, 21, 1, 1, 93, 93, // Skip to: 40641 /* 16740 */ MCD_OPC_Decode, 225, 10, 89, // Opcode: SMINPv4i16 /* 16744 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16762 /* 16748 */ MCD_OPC_CheckPredicate, 0, 81, 93, // Skip to: 40641 /* 16752 */ MCD_OPC_CheckField, 21, 1, 1, 75, 93, // Skip to: 40641 /* 16758 */ MCD_OPC_Decode, 216, 16, 89, // Opcode: UMINPv4i16 /* 16762 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16780 /* 16766 */ MCD_OPC_CheckPredicate, 0, 63, 93, // Skip to: 40641 /* 16770 */ MCD_OPC_CheckField, 21, 1, 1, 57, 93, // Skip to: 40641 /* 16776 */ MCD_OPC_Decode, 227, 10, 112, // Opcode: SMINPv8i16 /* 16780 */ MCD_OPC_FilterValue, 3, 49, 93, // Skip to: 40641 /* 16784 */ MCD_OPC_CheckPredicate, 0, 45, 93, // Skip to: 40641 /* 16788 */ MCD_OPC_CheckField, 21, 1, 1, 39, 93, // Skip to: 40641 /* 16794 */ MCD_OPC_Decode, 218, 16, 112, // Opcode: UMINPv8i16 /* 16798 */ MCD_OPC_FilterValue, 44, 39, 0, // Skip to: 16841 /* 16802 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16805 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16823 /* 16809 */ MCD_OPC_CheckPredicate, 0, 20, 93, // Skip to: 40641 /* 16813 */ MCD_OPC_CheckField, 21, 1, 1, 14, 93, // Skip to: 40641 /* 16819 */ MCD_OPC_Decode, 190, 11, 105, // Opcode: SQDMLSLv4i16_v4i32 /* 16823 */ MCD_OPC_FilterValue, 2, 6, 93, // Skip to: 40641 /* 16827 */ MCD_OPC_CheckPredicate, 0, 2, 93, // Skip to: 40641 /* 16831 */ MCD_OPC_CheckField, 21, 1, 1, 252, 92, // Skip to: 40641 /* 16837 */ MCD_OPC_Decode, 194, 11, 120, // Opcode: SQDMLSLv8i16_v4i32 /* 16841 */ MCD_OPC_FilterValue, 45, 75, 0, // Skip to: 16920 /* 16845 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16848 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16866 /* 16852 */ MCD_OPC_CheckPredicate, 0, 233, 92, // Skip to: 40641 /* 16856 */ MCD_OPC_CheckField, 21, 1, 1, 227, 92, // Skip to: 40641 /* 16862 */ MCD_OPC_Decode, 201, 11, 89, // Opcode: SQDMULHv4i16 /* 16866 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16884 /* 16870 */ MCD_OPC_CheckPredicate, 0, 215, 92, // Skip to: 40641 /* 16874 */ MCD_OPC_CheckField, 21, 1, 1, 209, 92, // Skip to: 40641 /* 16880 */ MCD_OPC_Decode, 236, 11, 89, // Opcode: SQRDMULHv4i16 /* 16884 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16902 /* 16888 */ MCD_OPC_CheckPredicate, 0, 197, 92, // Skip to: 40641 /* 16892 */ MCD_OPC_CheckField, 21, 1, 1, 191, 92, // Skip to: 40641 /* 16898 */ MCD_OPC_Decode, 205, 11, 112, // Opcode: SQDMULHv8i16 /* 16902 */ MCD_OPC_FilterValue, 3, 183, 92, // Skip to: 40641 /* 16906 */ MCD_OPC_CheckPredicate, 0, 179, 92, // Skip to: 40641 /* 16910 */ MCD_OPC_CheckField, 21, 1, 1, 173, 92, // Skip to: 40641 /* 16916 */ MCD_OPC_Decode, 240, 11, 112, // Opcode: SQRDMULHv8i16 /* 16920 */ MCD_OPC_FilterValue, 46, 123, 0, // Skip to: 17047 /* 16924 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 16927 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 16956 /* 16931 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 16934 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 16945 /* 16938 */ MCD_OPC_CheckPredicate, 0, 147, 92, // Skip to: 40641 /* 16942 */ MCD_OPC_Decode, 26, 90, // Opcode: ABSv4i16 /* 16945 */ MCD_OPC_FilterValue, 49, 140, 92, // Skip to: 40641 /* 16949 */ MCD_OPC_CheckPredicate, 0, 136, 92, // Skip to: 40641 /* 16953 */ MCD_OPC_Decode, 58, 100, // Opcode: ADDVv4i16v /* 16956 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16974 /* 16960 */ MCD_OPC_CheckPredicate, 0, 125, 92, // Skip to: 40641 /* 16964 */ MCD_OPC_CheckField, 16, 6, 32, 119, 92, // Skip to: 40641 /* 16970 */ MCD_OPC_Decode, 251, 8, 90, // Opcode: NEGv4i16 /* 16974 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 17016 /* 16978 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 16981 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 16992 /* 16985 */ MCD_OPC_CheckPredicate, 0, 100, 92, // Skip to: 40641 /* 16989 */ MCD_OPC_Decode, 28, 117, // Opcode: ABSv8i16 /* 16992 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 17004 /* 16996 */ MCD_OPC_CheckPredicate, 0, 89, 92, // Skip to: 40641 /* 17000 */ MCD_OPC_Decode, 169, 3, 117, // Opcode: FCVTMSv2f64 /* 17004 */ MCD_OPC_FilterValue, 49, 81, 92, // Skip to: 40641 /* 17008 */ MCD_OPC_CheckPredicate, 0, 77, 92, // Skip to: 40641 /* 17012 */ MCD_OPC_Decode, 60, 131, 1, // Opcode: ADDVv8i16v /* 17016 */ MCD_OPC_FilterValue, 3, 69, 92, // Skip to: 40641 /* 17020 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 17023 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 17035 /* 17027 */ MCD_OPC_CheckPredicate, 0, 58, 92, // Skip to: 40641 /* 17031 */ MCD_OPC_Decode, 253, 8, 117, // Opcode: NEGv8i16 /* 17035 */ MCD_OPC_FilterValue, 33, 50, 92, // Skip to: 40641 /* 17039 */ MCD_OPC_CheckPredicate, 0, 46, 92, // Skip to: 40641 /* 17043 */ MCD_OPC_Decode, 178, 3, 117, // Opcode: FCVTMUv2f64 /* 17047 */ MCD_OPC_FilterValue, 47, 37, 0, // Skip to: 17088 /* 17051 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17054 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 17071 /* 17058 */ MCD_OPC_CheckPredicate, 0, 27, 92, // Skip to: 40641 /* 17062 */ MCD_OPC_CheckField, 21, 1, 1, 21, 92, // Skip to: 40641 /* 17068 */ MCD_OPC_Decode, 44, 89, // Opcode: ADDPv4i16 /* 17071 */ MCD_OPC_FilterValue, 2, 14, 92, // Skip to: 40641 /* 17075 */ MCD_OPC_CheckPredicate, 0, 10, 92, // Skip to: 40641 /* 17079 */ MCD_OPC_CheckField, 21, 1, 1, 4, 92, // Skip to: 40641 /* 17085 */ MCD_OPC_Decode, 46, 112, // Opcode: ADDPv8i16 /* 17088 */ MCD_OPC_FilterValue, 48, 75, 0, // Skip to: 17167 /* 17092 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17095 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17113 /* 17099 */ MCD_OPC_CheckPredicate, 0, 242, 91, // Skip to: 40641 /* 17103 */ MCD_OPC_CheckField, 21, 1, 1, 236, 91, // Skip to: 40641 /* 17109 */ MCD_OPC_Decode, 143, 11, 85, // Opcode: SMULLv4i16_v4i32 /* 17113 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17131 /* 17117 */ MCD_OPC_CheckPredicate, 0, 224, 91, // Skip to: 40641 /* 17121 */ MCD_OPC_CheckField, 21, 1, 1, 218, 91, // Skip to: 40641 /* 17127 */ MCD_OPC_Decode, 133, 17, 85, // Opcode: UMULLv4i16_v4i32 /* 17131 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17149 /* 17135 */ MCD_OPC_CheckPredicate, 0, 206, 91, // Skip to: 40641 /* 17139 */ MCD_OPC_CheckField, 21, 1, 1, 200, 91, // Skip to: 40641 /* 17145 */ MCD_OPC_Decode, 147, 11, 112, // Opcode: SMULLv8i16_v4i32 /* 17149 */ MCD_OPC_FilterValue, 3, 192, 91, // Skip to: 40641 /* 17153 */ MCD_OPC_CheckPredicate, 0, 188, 91, // Skip to: 40641 /* 17157 */ MCD_OPC_CheckField, 21, 1, 1, 182, 91, // Skip to: 40641 /* 17163 */ MCD_OPC_Decode, 137, 17, 112, // Opcode: UMULLv8i16_v4i32 /* 17167 */ MCD_OPC_FilterValue, 49, 39, 0, // Skip to: 17210 /* 17171 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17174 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17192 /* 17178 */ MCD_OPC_CheckPredicate, 0, 163, 91, // Skip to: 40641 /* 17182 */ MCD_OPC_CheckField, 21, 1, 1, 157, 91, // Skip to: 40641 /* 17188 */ MCD_OPC_Decode, 172, 4, 112, // Opcode: FMAXNMv2f64 /* 17192 */ MCD_OPC_FilterValue, 3, 149, 91, // Skip to: 40641 /* 17196 */ MCD_OPC_CheckPredicate, 0, 145, 91, // Skip to: 40641 /* 17200 */ MCD_OPC_CheckField, 21, 1, 1, 139, 91, // Skip to: 40641 /* 17206 */ MCD_OPC_Decode, 165, 4, 112, // Opcode: FMAXNMPv2f64 /* 17210 */ MCD_OPC_FilterValue, 50, 39, 0, // Skip to: 17253 /* 17214 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17217 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17235 /* 17221 */ MCD_OPC_CheckPredicate, 0, 120, 91, // Skip to: 40641 /* 17225 */ MCD_OPC_CheckField, 16, 6, 33, 114, 91, // Skip to: 40641 /* 17231 */ MCD_OPC_Decode, 143, 3, 117, // Opcode: FCVTASv2f64 /* 17235 */ MCD_OPC_FilterValue, 3, 106, 91, // Skip to: 40641 /* 17239 */ MCD_OPC_CheckPredicate, 0, 102, 91, // Skip to: 40641 /* 17243 */ MCD_OPC_CheckField, 16, 6, 33, 96, 91, // Skip to: 40641 /* 17249 */ MCD_OPC_Decode, 152, 3, 117, // Opcode: FCVTAUv2f64 /* 17253 */ MCD_OPC_FilterValue, 51, 20, 0, // Skip to: 17277 /* 17257 */ MCD_OPC_CheckPredicate, 0, 84, 91, // Skip to: 40641 /* 17261 */ MCD_OPC_CheckField, 29, 3, 2, 78, 91, // Skip to: 40641 /* 17267 */ MCD_OPC_CheckField, 21, 1, 1, 72, 91, // Skip to: 40641 /* 17273 */ MCD_OPC_Decode, 209, 4, 120, // Opcode: FMLAv2f64 /* 17277 */ MCD_OPC_FilterValue, 52, 39, 0, // Skip to: 17320 /* 17281 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17284 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17302 /* 17288 */ MCD_OPC_CheckPredicate, 0, 53, 91, // Skip to: 40641 /* 17292 */ MCD_OPC_CheckField, 21, 1, 1, 47, 91, // Skip to: 40641 /* 17298 */ MCD_OPC_Decode, 214, 11, 85, // Opcode: SQDMULLv4i16_v4i32 /* 17302 */ MCD_OPC_FilterValue, 2, 39, 91, // Skip to: 40641 /* 17306 */ MCD_OPC_CheckPredicate, 0, 35, 91, // Skip to: 40641 /* 17310 */ MCD_OPC_CheckField, 21, 1, 1, 29, 91, // Skip to: 40641 /* 17316 */ MCD_OPC_Decode, 218, 11, 112, // Opcode: SQDMULLv8i16_v4i32 /* 17320 */ MCD_OPC_FilterValue, 53, 39, 0, // Skip to: 17363 /* 17324 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17327 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17345 /* 17331 */ MCD_OPC_CheckPredicate, 0, 10, 91, // Skip to: 40641 /* 17335 */ MCD_OPC_CheckField, 21, 1, 1, 4, 91, // Skip to: 40641 /* 17341 */ MCD_OPC_Decode, 208, 2, 112, // Opcode: FADDv2f64 /* 17345 */ MCD_OPC_FilterValue, 3, 252, 90, // Skip to: 40641 /* 17349 */ MCD_OPC_CheckPredicate, 0, 248, 90, // Skip to: 40641 /* 17353 */ MCD_OPC_CheckField, 21, 1, 1, 242, 90, // Skip to: 40641 /* 17359 */ MCD_OPC_Decode, 202, 2, 112, // Opcode: FADDPv2f64 /* 17363 */ MCD_OPC_FilterValue, 54, 39, 0, // Skip to: 17406 /* 17367 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17370 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17388 /* 17374 */ MCD_OPC_CheckPredicate, 0, 223, 90, // Skip to: 40641 /* 17378 */ MCD_OPC_CheckField, 16, 6, 33, 217, 90, // Skip to: 40641 /* 17384 */ MCD_OPC_Decode, 145, 10, 117, // Opcode: SCVTFv2f64 /* 17388 */ MCD_OPC_FilterValue, 3, 209, 90, // Skip to: 40641 /* 17392 */ MCD_OPC_CheckPredicate, 0, 205, 90, // Skip to: 40641 /* 17396 */ MCD_OPC_CheckField, 16, 6, 33, 199, 90, // Skip to: 40641 /* 17402 */ MCD_OPC_Decode, 175, 16, 117, // Opcode: UCVTFv2f64 /* 17406 */ MCD_OPC_FilterValue, 55, 39, 0, // Skip to: 17449 /* 17410 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17413 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17431 /* 17417 */ MCD_OPC_CheckPredicate, 0, 180, 90, // Skip to: 40641 /* 17421 */ MCD_OPC_CheckField, 21, 1, 1, 174, 90, // Skip to: 40641 /* 17427 */ MCD_OPC_Decode, 244, 4, 112, // Opcode: FMULXv2f64 /* 17431 */ MCD_OPC_FilterValue, 3, 166, 90, // Skip to: 40641 /* 17435 */ MCD_OPC_CheckPredicate, 0, 162, 90, // Skip to: 40641 /* 17439 */ MCD_OPC_CheckField, 21, 1, 1, 156, 90, // Skip to: 40641 /* 17445 */ MCD_OPC_Decode, 252, 4, 112, // Opcode: FMULv2f64 /* 17449 */ MCD_OPC_FilterValue, 57, 39, 0, // Skip to: 17492 /* 17453 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17456 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17474 /* 17460 */ MCD_OPC_CheckPredicate, 0, 137, 90, // Skip to: 40641 /* 17464 */ MCD_OPC_CheckField, 21, 1, 1, 131, 90, // Skip to: 40641 /* 17470 */ MCD_OPC_Decode, 219, 2, 112, // Opcode: FCMEQv2f64 /* 17474 */ MCD_OPC_FilterValue, 3, 123, 90, // Skip to: 40641 /* 17478 */ MCD_OPC_CheckPredicate, 0, 119, 90, // Skip to: 40641 /* 17482 */ MCD_OPC_CheckField, 21, 1, 1, 113, 90, // Skip to: 40641 /* 17488 */ MCD_OPC_Decode, 229, 2, 112, // Opcode: FCMGEv2f64 /* 17492 */ MCD_OPC_FilterValue, 59, 20, 0, // Skip to: 17516 /* 17496 */ MCD_OPC_CheckPredicate, 0, 101, 90, // Skip to: 40641 /* 17500 */ MCD_OPC_CheckField, 29, 3, 3, 95, 90, // Skip to: 40641 /* 17506 */ MCD_OPC_CheckField, 21, 1, 1, 89, 90, // Skip to: 40641 /* 17512 */ MCD_OPC_Decode, 193, 2, 112, // Opcode: FACGEv2f64 /* 17516 */ MCD_OPC_FilterValue, 61, 39, 0, // Skip to: 17559 /* 17520 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17523 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17541 /* 17527 */ MCD_OPC_CheckPredicate, 0, 70, 90, // Skip to: 40641 /* 17531 */ MCD_OPC_CheckField, 21, 1, 1, 64, 90, // Skip to: 40641 /* 17537 */ MCD_OPC_Decode, 182, 4, 112, // Opcode: FMAXv2f64 /* 17541 */ MCD_OPC_FilterValue, 3, 56, 90, // Skip to: 40641 /* 17545 */ MCD_OPC_CheckPredicate, 0, 52, 90, // Skip to: 40641 /* 17549 */ MCD_OPC_CheckField, 21, 1, 1, 46, 90, // Skip to: 40641 /* 17555 */ MCD_OPC_Decode, 175, 4, 112, // Opcode: FMAXPv2f64 /* 17559 */ MCD_OPC_FilterValue, 63, 38, 90, // Skip to: 40641 /* 17563 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17566 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17584 /* 17570 */ MCD_OPC_CheckPredicate, 0, 27, 90, // Skip to: 40641 /* 17574 */ MCD_OPC_CheckField, 21, 1, 1, 21, 90, // Skip to: 40641 /* 17580 */ MCD_OPC_Decode, 148, 5, 112, // Opcode: FRECPSv2f64 /* 17584 */ MCD_OPC_FilterValue, 3, 13, 90, // Skip to: 40641 /* 17588 */ MCD_OPC_CheckPredicate, 0, 9, 90, // Skip to: 40641 /* 17592 */ MCD_OPC_CheckField, 21, 1, 1, 3, 90, // Skip to: 40641 /* 17598 */ MCD_OPC_Decode, 158, 4, 112, // Opcode: FDIVv2f64 /* 17602 */ MCD_OPC_FilterValue, 10, 165, 19, // Skip to: 22635 /* 17606 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 17609 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 17688 /* 17613 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17616 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17634 /* 17620 */ MCD_OPC_CheckPredicate, 0, 233, 89, // Skip to: 40641 /* 17624 */ MCD_OPC_CheckField, 21, 1, 1, 227, 89, // Skip to: 40641 /* 17630 */ MCD_OPC_Decode, 243, 9, 85, // Opcode: SADDLv2i32_v2i64 /* 17634 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17652 /* 17638 */ MCD_OPC_CheckPredicate, 0, 215, 89, // Skip to: 40641 /* 17642 */ MCD_OPC_CheckField, 21, 1, 1, 209, 89, // Skip to: 40641 /* 17648 */ MCD_OPC_Decode, 149, 16, 85, // Opcode: UADDLv2i32_v2i64 /* 17652 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17670 /* 17656 */ MCD_OPC_CheckPredicate, 0, 197, 89, // Skip to: 40641 /* 17660 */ MCD_OPC_CheckField, 21, 1, 1, 191, 89, // Skip to: 40641 /* 17666 */ MCD_OPC_Decode, 245, 9, 112, // Opcode: SADDLv4i32_v2i64 /* 17670 */ MCD_OPC_FilterValue, 3, 183, 89, // Skip to: 40641 /* 17674 */ MCD_OPC_CheckPredicate, 0, 179, 89, // Skip to: 40641 /* 17678 */ MCD_OPC_CheckField, 21, 1, 1, 173, 89, // Skip to: 40641 /* 17684 */ MCD_OPC_Decode, 151, 16, 112, // Opcode: UADDLv4i32_v2i64 /* 17688 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 17767 /* 17692 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17695 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17713 /* 17699 */ MCD_OPC_CheckPredicate, 0, 154, 89, // Skip to: 40641 /* 17703 */ MCD_OPC_CheckField, 21, 1, 1, 148, 89, // Skip to: 40641 /* 17709 */ MCD_OPC_Decode, 165, 10, 89, // Opcode: SHADDv2i32 /* 17713 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17731 /* 17717 */ MCD_OPC_CheckPredicate, 0, 136, 89, // Skip to: 40641 /* 17721 */ MCD_OPC_CheckField, 21, 1, 1, 130, 89, // Skip to: 40641 /* 17727 */ MCD_OPC_Decode, 185, 16, 89, // Opcode: UHADDv2i32 /* 17731 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17749 /* 17735 */ MCD_OPC_CheckPredicate, 0, 118, 89, // Skip to: 40641 /* 17739 */ MCD_OPC_CheckField, 21, 1, 1, 112, 89, // Skip to: 40641 /* 17745 */ MCD_OPC_Decode, 167, 10, 112, // Opcode: SHADDv4i32 /* 17749 */ MCD_OPC_FilterValue, 3, 104, 89, // Skip to: 40641 /* 17753 */ MCD_OPC_CheckPredicate, 0, 100, 89, // Skip to: 40641 /* 17757 */ MCD_OPC_CheckField, 21, 1, 1, 94, 89, // Skip to: 40641 /* 17763 */ MCD_OPC_Decode, 187, 16, 112, // Opcode: UHADDv4i32 /* 17767 */ MCD_OPC_FilterValue, 2, 39, 0, // Skip to: 17810 /* 17771 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17774 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17792 /* 17778 */ MCD_OPC_CheckPredicate, 0, 75, 89, // Skip to: 40641 /* 17782 */ MCD_OPC_CheckField, 16, 6, 32, 69, 89, // Skip to: 40641 /* 17788 */ MCD_OPC_Decode, 180, 9, 90, // Opcode: REV64v2i32 /* 17792 */ MCD_OPC_FilterValue, 2, 61, 89, // Skip to: 40641 /* 17796 */ MCD_OPC_CheckPredicate, 0, 57, 89, // Skip to: 40641 /* 17800 */ MCD_OPC_CheckField, 16, 6, 32, 51, 89, // Skip to: 40641 /* 17806 */ MCD_OPC_Decode, 182, 9, 117, // Opcode: REV64v4i32 /* 17810 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 17889 /* 17814 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17817 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17835 /* 17821 */ MCD_OPC_CheckPredicate, 0, 32, 89, // Skip to: 40641 /* 17825 */ MCD_OPC_CheckField, 21, 1, 1, 26, 89, // Skip to: 40641 /* 17831 */ MCD_OPC_Decode, 165, 11, 89, // Opcode: SQADDv2i32 /* 17835 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17853 /* 17839 */ MCD_OPC_CheckPredicate, 0, 14, 89, // Skip to: 40641 /* 17843 */ MCD_OPC_CheckField, 21, 1, 1, 8, 89, // Skip to: 40641 /* 17849 */ MCD_OPC_Decode, 144, 17, 89, // Opcode: UQADDv2i32 /* 17853 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17871 /* 17857 */ MCD_OPC_CheckPredicate, 0, 252, 88, // Skip to: 40641 /* 17861 */ MCD_OPC_CheckField, 21, 1, 1, 246, 88, // Skip to: 40641 /* 17867 */ MCD_OPC_Decode, 168, 11, 112, // Opcode: SQADDv4i32 /* 17871 */ MCD_OPC_FilterValue, 3, 238, 88, // Skip to: 40641 /* 17875 */ MCD_OPC_CheckPredicate, 0, 234, 88, // Skip to: 40641 /* 17879 */ MCD_OPC_CheckField, 21, 1, 1, 228, 88, // Skip to: 40641 /* 17885 */ MCD_OPC_Decode, 147, 17, 112, // Opcode: UQADDv4i32 /* 17889 */ MCD_OPC_FilterValue, 4, 75, 0, // Skip to: 17968 /* 17893 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17896 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17914 /* 17900 */ MCD_OPC_CheckPredicate, 0, 209, 88, // Skip to: 40641 /* 17904 */ MCD_OPC_CheckField, 21, 1, 1, 203, 88, // Skip to: 40641 /* 17910 */ MCD_OPC_Decode, 249, 9, 93, // Opcode: SADDWv2i32_v2i64 /* 17914 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17932 /* 17918 */ MCD_OPC_CheckPredicate, 0, 191, 88, // Skip to: 40641 /* 17922 */ MCD_OPC_CheckField, 21, 1, 1, 185, 88, // Skip to: 40641 /* 17928 */ MCD_OPC_Decode, 155, 16, 93, // Opcode: UADDWv2i32_v2i64 /* 17932 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17950 /* 17936 */ MCD_OPC_CheckPredicate, 0, 173, 88, // Skip to: 40641 /* 17940 */ MCD_OPC_CheckField, 21, 1, 1, 167, 88, // Skip to: 40641 /* 17946 */ MCD_OPC_Decode, 251, 9, 112, // Opcode: SADDWv4i32_v2i64 /* 17950 */ MCD_OPC_FilterValue, 3, 159, 88, // Skip to: 40641 /* 17954 */ MCD_OPC_CheckPredicate, 0, 155, 88, // Skip to: 40641 /* 17958 */ MCD_OPC_CheckField, 21, 1, 1, 149, 88, // Skip to: 40641 /* 17964 */ MCD_OPC_Decode, 157, 16, 112, // Opcode: UADDWv4i32_v2i64 /* 17968 */ MCD_OPC_FilterValue, 5, 75, 0, // Skip to: 18047 /* 17972 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 17975 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17993 /* 17979 */ MCD_OPC_CheckPredicate, 0, 130, 88, // Skip to: 40641 /* 17983 */ MCD_OPC_CheckField, 21, 1, 1, 124, 88, // Skip to: 40641 /* 17989 */ MCD_OPC_Decode, 224, 12, 89, // Opcode: SRHADDv2i32 /* 17993 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18011 /* 17997 */ MCD_OPC_CheckPredicate, 0, 112, 88, // Skip to: 40641 /* 18001 */ MCD_OPC_CheckField, 21, 1, 1, 106, 88, // Skip to: 40641 /* 18007 */ MCD_OPC_Decode, 224, 17, 89, // Opcode: URHADDv2i32 /* 18011 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18029 /* 18015 */ MCD_OPC_CheckPredicate, 0, 94, 88, // Skip to: 40641 /* 18019 */ MCD_OPC_CheckField, 21, 1, 1, 88, 88, // Skip to: 40641 /* 18025 */ MCD_OPC_Decode, 226, 12, 112, // Opcode: SRHADDv4i32 /* 18029 */ MCD_OPC_FilterValue, 3, 80, 88, // Skip to: 40641 /* 18033 */ MCD_OPC_CheckPredicate, 0, 76, 88, // Skip to: 40641 /* 18037 */ MCD_OPC_CheckField, 21, 1, 1, 70, 88, // Skip to: 40641 /* 18043 */ MCD_OPC_Decode, 226, 17, 112, // Opcode: URHADDv4i32 /* 18047 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 18090 /* 18051 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18054 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18072 /* 18058 */ MCD_OPC_CheckPredicate, 0, 51, 88, // Skip to: 40641 /* 18062 */ MCD_OPC_CheckField, 21, 1, 0, 45, 88, // Skip to: 40641 /* 18068 */ MCD_OPC_Decode, 181, 18, 89, // Opcode: UZP1v2i32 /* 18072 */ MCD_OPC_FilterValue, 2, 37, 88, // Skip to: 40641 /* 18076 */ MCD_OPC_CheckPredicate, 0, 33, 88, // Skip to: 40641 /* 18080 */ MCD_OPC_CheckField, 21, 1, 0, 27, 88, // Skip to: 40641 /* 18086 */ MCD_OPC_Decode, 184, 18, 112, // Opcode: UZP1v4i32 /* 18090 */ MCD_OPC_FilterValue, 7, 73, 0, // Skip to: 18167 /* 18094 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18097 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18115 /* 18101 */ MCD_OPC_CheckPredicate, 0, 8, 88, // Skip to: 40641 /* 18105 */ MCD_OPC_CheckField, 21, 1, 1, 2, 88, // Skip to: 40641 /* 18111 */ MCD_OPC_Decode, 146, 9, 89, // Opcode: ORRv8i8 /* 18115 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 18132 /* 18119 */ MCD_OPC_CheckPredicate, 0, 246, 87, // Skip to: 40641 /* 18123 */ MCD_OPC_CheckField, 21, 1, 1, 240, 87, // Skip to: 40641 /* 18129 */ MCD_OPC_Decode, 123, 109, // Opcode: BITv8i8 /* 18132 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18150 /* 18136 */ MCD_OPC_CheckPredicate, 0, 229, 87, // Skip to: 40641 /* 18140 */ MCD_OPC_CheckField, 21, 1, 1, 223, 87, // Skip to: 40641 /* 18146 */ MCD_OPC_Decode, 141, 9, 112, // Opcode: ORRv16i8 /* 18150 */ MCD_OPC_FilterValue, 3, 215, 87, // Skip to: 40641 /* 18154 */ MCD_OPC_CheckPredicate, 0, 211, 87, // Skip to: 40641 /* 18158 */ MCD_OPC_CheckField, 21, 1, 1, 205, 87, // Skip to: 40641 /* 18164 */ MCD_OPC_Decode, 122, 120, // Opcode: BITv16i8 /* 18167 */ MCD_OPC_FilterValue, 8, 75, 0, // Skip to: 18246 /* 18171 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18174 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18192 /* 18178 */ MCD_OPC_CheckPredicate, 0, 187, 87, // Skip to: 40641 /* 18182 */ MCD_OPC_CheckField, 21, 1, 1, 181, 87, // Skip to: 40641 /* 18188 */ MCD_OPC_Decode, 164, 13, 85, // Opcode: SSUBLv2i32_v2i64 /* 18192 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18210 /* 18196 */ MCD_OPC_CheckPredicate, 0, 169, 87, // Skip to: 40641 /* 18200 */ MCD_OPC_CheckField, 21, 1, 1, 163, 87, // Skip to: 40641 /* 18206 */ MCD_OPC_Decode, 169, 18, 85, // Opcode: USUBLv2i32_v2i64 /* 18210 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18228 /* 18214 */ MCD_OPC_CheckPredicate, 0, 151, 87, // Skip to: 40641 /* 18218 */ MCD_OPC_CheckField, 21, 1, 1, 145, 87, // Skip to: 40641 /* 18224 */ MCD_OPC_Decode, 166, 13, 112, // Opcode: SSUBLv4i32_v2i64 /* 18228 */ MCD_OPC_FilterValue, 3, 137, 87, // Skip to: 40641 /* 18232 */ MCD_OPC_CheckPredicate, 0, 133, 87, // Skip to: 40641 /* 18236 */ MCD_OPC_CheckField, 21, 1, 1, 127, 87, // Skip to: 40641 /* 18242 */ MCD_OPC_Decode, 171, 18, 112, // Opcode: USUBLv4i32_v2i64 /* 18246 */ MCD_OPC_FilterValue, 9, 75, 0, // Skip to: 18325 /* 18250 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18253 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18271 /* 18257 */ MCD_OPC_CheckPredicate, 0, 108, 87, // Skip to: 40641 /* 18261 */ MCD_OPC_CheckField, 21, 1, 1, 102, 87, // Skip to: 40641 /* 18267 */ MCD_OPC_Decode, 191, 10, 89, // Opcode: SHSUBv2i32 /* 18271 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18289 /* 18275 */ MCD_OPC_CheckPredicate, 0, 90, 87, // Skip to: 40641 /* 18279 */ MCD_OPC_CheckField, 21, 1, 1, 84, 87, // Skip to: 40641 /* 18285 */ MCD_OPC_Decode, 191, 16, 89, // Opcode: UHSUBv2i32 /* 18289 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18307 /* 18293 */ MCD_OPC_CheckPredicate, 0, 72, 87, // Skip to: 40641 /* 18297 */ MCD_OPC_CheckField, 21, 1, 1, 66, 87, // Skip to: 40641 /* 18303 */ MCD_OPC_Decode, 193, 10, 112, // Opcode: SHSUBv4i32 /* 18307 */ MCD_OPC_FilterValue, 3, 58, 87, // Skip to: 40641 /* 18311 */ MCD_OPC_CheckPredicate, 0, 54, 87, // Skip to: 40641 /* 18315 */ MCD_OPC_CheckField, 21, 1, 1, 48, 87, // Skip to: 40641 /* 18321 */ MCD_OPC_Decode, 193, 16, 112, // Opcode: UHSUBv4i32 /* 18325 */ MCD_OPC_FilterValue, 10, 165, 0, // Skip to: 18494 /* 18329 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18332 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 18382 /* 18336 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 18339 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18351 /* 18343 */ MCD_OPC_CheckPredicate, 0, 22, 87, // Skip to: 40641 /* 18347 */ MCD_OPC_Decode, 222, 15, 89, // Opcode: TRN1v2i32 /* 18351 */ MCD_OPC_FilterValue, 1, 14, 87, // Skip to: 40641 /* 18355 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 18358 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18370 /* 18362 */ MCD_OPC_CheckPredicate, 0, 3, 87, // Skip to: 40641 /* 18366 */ MCD_OPC_Decode, 232, 9, 90, // Opcode: SADDLPv2i32_v1i64 /* 18370 */ MCD_OPC_FilterValue, 1, 251, 86, // Skip to: 40641 /* 18374 */ MCD_OPC_CheckPredicate, 0, 247, 86, // Skip to: 40641 /* 18378 */ MCD_OPC_Decode, 195, 18, 95, // Opcode: XTNv2i32 /* 18382 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 18413 /* 18386 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 18389 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18401 /* 18393 */ MCD_OPC_CheckPredicate, 0, 228, 86, // Skip to: 40641 /* 18397 */ MCD_OPC_Decode, 138, 16, 90, // Opcode: UADDLPv2i32_v1i64 /* 18401 */ MCD_OPC_FilterValue, 33, 220, 86, // Skip to: 40641 /* 18405 */ MCD_OPC_CheckPredicate, 0, 216, 86, // Skip to: 40641 /* 18409 */ MCD_OPC_Decode, 218, 12, 95, // Opcode: SQXTUNv2i32 /* 18413 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 18463 /* 18417 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 18420 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18432 /* 18424 */ MCD_OPC_CheckPredicate, 0, 197, 86, // Skip to: 40641 /* 18428 */ MCD_OPC_Decode, 225, 15, 112, // Opcode: TRN1v4i32 /* 18432 */ MCD_OPC_FilterValue, 1, 189, 86, // Skip to: 40641 /* 18436 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 18439 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18451 /* 18443 */ MCD_OPC_CheckPredicate, 0, 178, 86, // Skip to: 40641 /* 18447 */ MCD_OPC_Decode, 234, 9, 117, // Opcode: SADDLPv4i32_v2i64 /* 18451 */ MCD_OPC_FilterValue, 1, 170, 86, // Skip to: 40641 /* 18455 */ MCD_OPC_CheckPredicate, 0, 166, 86, // Skip to: 40641 /* 18459 */ MCD_OPC_Decode, 197, 18, 126, // Opcode: XTNv4i32 /* 18463 */ MCD_OPC_FilterValue, 3, 158, 86, // Skip to: 40641 /* 18467 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 18470 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18482 /* 18474 */ MCD_OPC_CheckPredicate, 0, 147, 86, // Skip to: 40641 /* 18478 */ MCD_OPC_Decode, 140, 16, 117, // Opcode: UADDLPv4i32_v2i64 /* 18482 */ MCD_OPC_FilterValue, 33, 139, 86, // Skip to: 40641 /* 18486 */ MCD_OPC_CheckPredicate, 0, 135, 86, // Skip to: 40641 /* 18490 */ MCD_OPC_Decode, 220, 12, 126, // Opcode: SQXTUNv4i32 /* 18494 */ MCD_OPC_FilterValue, 11, 75, 0, // Skip to: 18573 /* 18498 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18501 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18519 /* 18505 */ MCD_OPC_CheckPredicate, 0, 116, 86, // Skip to: 40641 /* 18509 */ MCD_OPC_CheckField, 21, 1, 1, 110, 86, // Skip to: 40641 /* 18515 */ MCD_OPC_Decode, 199, 12, 89, // Opcode: SQSUBv2i32 /* 18519 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18537 /* 18523 */ MCD_OPC_CheckPredicate, 0, 98, 86, // Skip to: 40641 /* 18527 */ MCD_OPC_CheckField, 21, 1, 1, 92, 86, // Skip to: 40641 /* 18533 */ MCD_OPC_Decode, 206, 17, 89, // Opcode: UQSUBv2i32 /* 18537 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18555 /* 18541 */ MCD_OPC_CheckPredicate, 0, 80, 86, // Skip to: 40641 /* 18545 */ MCD_OPC_CheckField, 21, 1, 1, 74, 86, // Skip to: 40641 /* 18551 */ MCD_OPC_Decode, 202, 12, 112, // Opcode: SQSUBv4i32 /* 18555 */ MCD_OPC_FilterValue, 3, 66, 86, // Skip to: 40641 /* 18559 */ MCD_OPC_CheckPredicate, 0, 62, 86, // Skip to: 40641 /* 18563 */ MCD_OPC_CheckField, 21, 1, 1, 56, 86, // Skip to: 40641 /* 18569 */ MCD_OPC_Decode, 209, 17, 112, // Opcode: UQSUBv4i32 /* 18573 */ MCD_OPC_FilterValue, 12, 75, 0, // Skip to: 18652 /* 18577 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18580 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18598 /* 18584 */ MCD_OPC_CheckPredicate, 0, 37, 86, // Skip to: 40641 /* 18588 */ MCD_OPC_CheckField, 21, 1, 1, 31, 86, // Skip to: 40641 /* 18594 */ MCD_OPC_Decode, 170, 13, 93, // Opcode: SSUBWv2i32_v2i64 /* 18598 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18616 /* 18602 */ MCD_OPC_CheckPredicate, 0, 19, 86, // Skip to: 40641 /* 18606 */ MCD_OPC_CheckField, 21, 1, 1, 13, 86, // Skip to: 40641 /* 18612 */ MCD_OPC_Decode, 175, 18, 93, // Opcode: USUBWv2i32_v2i64 /* 18616 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18634 /* 18620 */ MCD_OPC_CheckPredicate, 0, 1, 86, // Skip to: 40641 /* 18624 */ MCD_OPC_CheckField, 21, 1, 1, 251, 85, // Skip to: 40641 /* 18630 */ MCD_OPC_Decode, 172, 13, 112, // Opcode: SSUBWv4i32_v2i64 /* 18634 */ MCD_OPC_FilterValue, 3, 243, 85, // Skip to: 40641 /* 18638 */ MCD_OPC_CheckPredicate, 0, 239, 85, // Skip to: 40641 /* 18642 */ MCD_OPC_CheckField, 21, 1, 1, 233, 85, // Skip to: 40641 /* 18648 */ MCD_OPC_Decode, 177, 18, 112, // Opcode: USUBWv4i32_v2i64 /* 18652 */ MCD_OPC_FilterValue, 13, 75, 0, // Skip to: 18731 /* 18656 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18659 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18677 /* 18663 */ MCD_OPC_CheckPredicate, 0, 214, 85, // Skip to: 40641 /* 18667 */ MCD_OPC_CheckField, 21, 1, 1, 208, 85, // Skip to: 40641 /* 18673 */ MCD_OPC_Decode, 196, 1, 89, // Opcode: CMGTv2i32 /* 18677 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18695 /* 18681 */ MCD_OPC_CheckPredicate, 0, 196, 85, // Skip to: 40641 /* 18685 */ MCD_OPC_CheckField, 21, 1, 1, 190, 85, // Skip to: 40641 /* 18691 */ MCD_OPC_Decode, 210, 1, 89, // Opcode: CMHIv2i32 /* 18695 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18713 /* 18699 */ MCD_OPC_CheckPredicate, 0, 178, 85, // Skip to: 40641 /* 18703 */ MCD_OPC_CheckField, 21, 1, 1, 172, 85, // Skip to: 40641 /* 18709 */ MCD_OPC_Decode, 202, 1, 112, // Opcode: CMGTv4i32 /* 18713 */ MCD_OPC_FilterValue, 3, 164, 85, // Skip to: 40641 /* 18717 */ MCD_OPC_CheckPredicate, 0, 160, 85, // Skip to: 40641 /* 18721 */ MCD_OPC_CheckField, 21, 1, 1, 154, 85, // Skip to: 40641 /* 18727 */ MCD_OPC_Decode, 213, 1, 112, // Opcode: CMHIv4i32 /* 18731 */ MCD_OPC_FilterValue, 14, 164, 0, // Skip to: 18899 /* 18735 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18738 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 18775 /* 18742 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 18745 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18757 /* 18749 */ MCD_OPC_CheckPredicate, 0, 128, 85, // Skip to: 40641 /* 18753 */ MCD_OPC_Decode, 201, 18, 89, // Opcode: ZIP1v2i32 /* 18757 */ MCD_OPC_FilterValue, 1, 120, 85, // Skip to: 40641 /* 18761 */ MCD_OPC_CheckPredicate, 0, 116, 85, // Skip to: 40641 /* 18765 */ MCD_OPC_CheckField, 16, 5, 0, 110, 85, // Skip to: 40641 /* 18771 */ MCD_OPC_Decode, 188, 15, 99, // Opcode: SUQADDv2i32 /* 18775 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 18806 /* 18779 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 18782 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18794 /* 18786 */ MCD_OPC_CheckPredicate, 0, 91, 85, // Skip to: 40641 /* 18790 */ MCD_OPC_Decode, 154, 18, 99, // Opcode: USQADDv2i32 /* 18794 */ MCD_OPC_FilterValue, 33, 83, 85, // Skip to: 40641 /* 18798 */ MCD_OPC_CheckPredicate, 0, 79, 85, // Skip to: 40641 /* 18802 */ MCD_OPC_Decode, 171, 10, 108, // Opcode: SHLLv2i32 /* 18806 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 18856 /* 18810 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 18813 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18825 /* 18817 */ MCD_OPC_CheckPredicate, 0, 60, 85, // Skip to: 40641 /* 18821 */ MCD_OPC_Decode, 204, 18, 112, // Opcode: ZIP1v4i32 /* 18825 */ MCD_OPC_FilterValue, 1, 52, 85, // Skip to: 40641 /* 18829 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 18832 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18844 /* 18836 */ MCD_OPC_CheckPredicate, 0, 41, 85, // Skip to: 40641 /* 18840 */ MCD_OPC_Decode, 191, 15, 126, // Opcode: SUQADDv4i32 /* 18844 */ MCD_OPC_FilterValue, 16, 33, 85, // Skip to: 40641 /* 18848 */ MCD_OPC_CheckPredicate, 0, 29, 85, // Skip to: 40641 /* 18852 */ MCD_OPC_Decode, 239, 9, 95, // Opcode: SADDLVv4i32v /* 18856 */ MCD_OPC_FilterValue, 3, 21, 85, // Skip to: 40641 /* 18860 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 18863 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18875 /* 18867 */ MCD_OPC_CheckPredicate, 0, 10, 85, // Skip to: 40641 /* 18871 */ MCD_OPC_Decode, 157, 18, 126, // Opcode: USQADDv4i32 /* 18875 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 18887 /* 18879 */ MCD_OPC_CheckPredicate, 0, 254, 84, // Skip to: 40641 /* 18883 */ MCD_OPC_Decode, 173, 10, 117, // Opcode: SHLLv4i32 /* 18887 */ MCD_OPC_FilterValue, 48, 246, 84, // Skip to: 40641 /* 18891 */ MCD_OPC_CheckPredicate, 0, 242, 84, // Skip to: 40641 /* 18895 */ MCD_OPC_Decode, 145, 16, 95, // Opcode: UADDLVv4i32v /* 18899 */ MCD_OPC_FilterValue, 15, 75, 0, // Skip to: 18978 /* 18903 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18906 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18924 /* 18910 */ MCD_OPC_CheckPredicate, 0, 223, 84, // Skip to: 40641 /* 18914 */ MCD_OPC_CheckField, 21, 1, 1, 217, 84, // Skip to: 40641 /* 18920 */ MCD_OPC_Decode, 180, 1, 89, // Opcode: CMGEv2i32 /* 18924 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18942 /* 18928 */ MCD_OPC_CheckPredicate, 0, 205, 84, // Skip to: 40641 /* 18932 */ MCD_OPC_CheckField, 21, 1, 1, 199, 84, // Skip to: 40641 /* 18938 */ MCD_OPC_Decode, 218, 1, 89, // Opcode: CMHSv2i32 /* 18942 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18960 /* 18946 */ MCD_OPC_CheckPredicate, 0, 187, 84, // Skip to: 40641 /* 18950 */ MCD_OPC_CheckField, 21, 1, 1, 181, 84, // Skip to: 40641 /* 18956 */ MCD_OPC_Decode, 186, 1, 112, // Opcode: CMGEv4i32 /* 18960 */ MCD_OPC_FilterValue, 3, 173, 84, // Skip to: 40641 /* 18964 */ MCD_OPC_CheckPredicate, 0, 169, 84, // Skip to: 40641 /* 18968 */ MCD_OPC_CheckField, 21, 1, 1, 163, 84, // Skip to: 40641 /* 18974 */ MCD_OPC_Decode, 221, 1, 112, // Opcode: CMHSv4i32 /* 18978 */ MCD_OPC_FilterValue, 16, 73, 0, // Skip to: 19055 /* 18982 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 18985 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 19002 /* 18989 */ MCD_OPC_CheckPredicate, 0, 144, 84, // Skip to: 40641 /* 18993 */ MCD_OPC_CheckField, 21, 1, 1, 138, 84, // Skip to: 40641 /* 18999 */ MCD_OPC_Decode, 34, 103, // Opcode: ADDHNv2i64_v2i32 /* 19002 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19020 /* 19006 */ MCD_OPC_CheckPredicate, 0, 127, 84, // Skip to: 40641 /* 19010 */ MCD_OPC_CheckField, 21, 1, 1, 121, 84, // Skip to: 40641 /* 19016 */ MCD_OPC_Decode, 158, 9, 103, // Opcode: RADDHNv2i64_v2i32 /* 19020 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 19037 /* 19024 */ MCD_OPC_CheckPredicate, 0, 109, 84, // Skip to: 40641 /* 19028 */ MCD_OPC_CheckField, 21, 1, 1, 103, 84, // Skip to: 40641 /* 19034 */ MCD_OPC_Decode, 35, 120, // Opcode: ADDHNv2i64_v4i32 /* 19037 */ MCD_OPC_FilterValue, 3, 96, 84, // Skip to: 40641 /* 19041 */ MCD_OPC_CheckPredicate, 0, 92, 84, // Skip to: 40641 /* 19045 */ MCD_OPC_CheckField, 21, 1, 1, 86, 84, // Skip to: 40641 /* 19051 */ MCD_OPC_Decode, 159, 9, 120, // Opcode: RADDHNv2i64_v4i32 /* 19055 */ MCD_OPC_FilterValue, 17, 75, 0, // Skip to: 19134 /* 19059 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19062 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19080 /* 19066 */ MCD_OPC_CheckPredicate, 0, 67, 84, // Skip to: 40641 /* 19070 */ MCD_OPC_CheckField, 21, 1, 1, 61, 84, // Skip to: 40641 /* 19076 */ MCD_OPC_Decode, 141, 13, 89, // Opcode: SSHLv2i32 /* 19080 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19098 /* 19084 */ MCD_OPC_CheckPredicate, 0, 49, 84, // Skip to: 40641 /* 19088 */ MCD_OPC_CheckField, 21, 1, 1, 43, 84, // Skip to: 40641 /* 19094 */ MCD_OPC_Decode, 135, 18, 89, // Opcode: USHLv2i32 /* 19098 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19116 /* 19102 */ MCD_OPC_CheckPredicate, 0, 31, 84, // Skip to: 40641 /* 19106 */ MCD_OPC_CheckField, 21, 1, 1, 25, 84, // Skip to: 40641 /* 19112 */ MCD_OPC_Decode, 144, 13, 112, // Opcode: SSHLv4i32 /* 19116 */ MCD_OPC_FilterValue, 3, 17, 84, // Skip to: 40641 /* 19120 */ MCD_OPC_CheckPredicate, 0, 13, 84, // Skip to: 40641 /* 19124 */ MCD_OPC_CheckField, 21, 1, 1, 7, 84, // Skip to: 40641 /* 19130 */ MCD_OPC_Decode, 138, 18, 112, // Opcode: USHLv4i32 /* 19134 */ MCD_OPC_FilterValue, 18, 127, 0, // Skip to: 19265 /* 19138 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19141 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 19172 /* 19145 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 19148 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19160 /* 19152 */ MCD_OPC_CheckPredicate, 0, 237, 83, // Skip to: 40641 /* 19156 */ MCD_OPC_Decode, 147, 1, 90, // Opcode: CLSv2i32 /* 19160 */ MCD_OPC_FilterValue, 33, 229, 83, // Skip to: 40641 /* 19164 */ MCD_OPC_CheckPredicate, 0, 225, 83, // Skip to: 40641 /* 19168 */ MCD_OPC_Decode, 209, 12, 95, // Opcode: SQXTNv2i32 /* 19172 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 19203 /* 19176 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 19179 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19191 /* 19183 */ MCD_OPC_CheckPredicate, 0, 206, 83, // Skip to: 40641 /* 19187 */ MCD_OPC_Decode, 155, 1, 90, // Opcode: CLZv2i32 /* 19191 */ MCD_OPC_FilterValue, 33, 198, 83, // Skip to: 40641 /* 19195 */ MCD_OPC_CheckPredicate, 0, 194, 83, // Skip to: 40641 /* 19199 */ MCD_OPC_Decode, 216, 17, 95, // Opcode: UQXTNv2i32 /* 19203 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 19234 /* 19207 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 19210 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19222 /* 19214 */ MCD_OPC_CheckPredicate, 0, 175, 83, // Skip to: 40641 /* 19218 */ MCD_OPC_Decode, 149, 1, 117, // Opcode: CLSv4i32 /* 19222 */ MCD_OPC_FilterValue, 33, 167, 83, // Skip to: 40641 /* 19226 */ MCD_OPC_CheckPredicate, 0, 163, 83, // Skip to: 40641 /* 19230 */ MCD_OPC_Decode, 211, 12, 126, // Opcode: SQXTNv4i32 /* 19234 */ MCD_OPC_FilterValue, 3, 155, 83, // Skip to: 40641 /* 19238 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 19241 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19253 /* 19245 */ MCD_OPC_CheckPredicate, 0, 144, 83, // Skip to: 40641 /* 19249 */ MCD_OPC_Decode, 157, 1, 117, // Opcode: CLZv4i32 /* 19253 */ MCD_OPC_FilterValue, 33, 136, 83, // Skip to: 40641 /* 19257 */ MCD_OPC_CheckPredicate, 0, 132, 83, // Skip to: 40641 /* 19261 */ MCD_OPC_Decode, 218, 17, 126, // Opcode: UQXTNv4i32 /* 19265 */ MCD_OPC_FilterValue, 19, 75, 0, // Skip to: 19344 /* 19269 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19272 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19290 /* 19276 */ MCD_OPC_CheckPredicate, 0, 113, 83, // Skip to: 40641 /* 19280 */ MCD_OPC_CheckField, 21, 1, 1, 107, 83, // Skip to: 40641 /* 19286 */ MCD_OPC_Decode, 164, 12, 89, // Opcode: SQSHLv2i32 /* 19290 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19308 /* 19294 */ MCD_OPC_CheckPredicate, 0, 95, 83, // Skip to: 40641 /* 19298 */ MCD_OPC_CheckField, 21, 1, 1, 89, 83, // Skip to: 40641 /* 19304 */ MCD_OPC_Decode, 180, 17, 89, // Opcode: UQSHLv2i32 /* 19308 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19326 /* 19312 */ MCD_OPC_CheckPredicate, 0, 77, 83, // Skip to: 40641 /* 19316 */ MCD_OPC_CheckField, 21, 1, 1, 71, 83, // Skip to: 40641 /* 19322 */ MCD_OPC_Decode, 170, 12, 112, // Opcode: SQSHLv4i32 /* 19326 */ MCD_OPC_FilterValue, 3, 63, 83, // Skip to: 40641 /* 19330 */ MCD_OPC_CheckPredicate, 0, 59, 83, // Skip to: 40641 /* 19334 */ MCD_OPC_CheckField, 21, 1, 1, 53, 83, // Skip to: 40641 /* 19340 */ MCD_OPC_Decode, 186, 17, 112, // Opcode: UQSHLv4i32 /* 19344 */ MCD_OPC_FilterValue, 20, 75, 0, // Skip to: 19423 /* 19348 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19351 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19369 /* 19355 */ MCD_OPC_CheckPredicate, 0, 34, 83, // Skip to: 40641 /* 19359 */ MCD_OPC_CheckField, 21, 1, 1, 28, 83, // Skip to: 40641 /* 19365 */ MCD_OPC_Decode, 202, 9, 105, // Opcode: SABALv2i32_v2i64 /* 19369 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19387 /* 19373 */ MCD_OPC_CheckPredicate, 0, 16, 83, // Skip to: 40641 /* 19377 */ MCD_OPC_CheckField, 21, 1, 1, 10, 83, // Skip to: 40641 /* 19383 */ MCD_OPC_Decode, 236, 15, 105, // Opcode: UABALv2i32_v2i64 /* 19387 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19405 /* 19391 */ MCD_OPC_CheckPredicate, 0, 254, 82, // Skip to: 40641 /* 19395 */ MCD_OPC_CheckField, 21, 1, 1, 248, 82, // Skip to: 40641 /* 19401 */ MCD_OPC_Decode, 204, 9, 120, // Opcode: SABALv4i32_v2i64 /* 19405 */ MCD_OPC_FilterValue, 3, 240, 82, // Skip to: 40641 /* 19409 */ MCD_OPC_CheckPredicate, 0, 236, 82, // Skip to: 40641 /* 19413 */ MCD_OPC_CheckField, 21, 1, 1, 230, 82, // Skip to: 40641 /* 19419 */ MCD_OPC_Decode, 238, 15, 120, // Opcode: UABALv4i32_v2i64 /* 19423 */ MCD_OPC_FilterValue, 21, 75, 0, // Skip to: 19502 /* 19427 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19430 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19448 /* 19434 */ MCD_OPC_CheckPredicate, 0, 211, 82, // Skip to: 40641 /* 19438 */ MCD_OPC_CheckField, 21, 1, 1, 205, 82, // Skip to: 40641 /* 19444 */ MCD_OPC_Decode, 239, 12, 89, // Opcode: SRSHLv2i32 /* 19448 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19466 /* 19452 */ MCD_OPC_CheckPredicate, 0, 193, 82, // Skip to: 40641 /* 19456 */ MCD_OPC_CheckField, 21, 1, 1, 187, 82, // Skip to: 40641 /* 19462 */ MCD_OPC_Decode, 231, 17, 89, // Opcode: URSHLv2i32 /* 19466 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19484 /* 19470 */ MCD_OPC_CheckPredicate, 0, 175, 82, // Skip to: 40641 /* 19474 */ MCD_OPC_CheckField, 21, 1, 1, 169, 82, // Skip to: 40641 /* 19480 */ MCD_OPC_Decode, 242, 12, 112, // Opcode: SRSHLv4i32 /* 19484 */ MCD_OPC_FilterValue, 3, 161, 82, // Skip to: 40641 /* 19488 */ MCD_OPC_CheckPredicate, 0, 157, 82, // Skip to: 40641 /* 19492 */ MCD_OPC_CheckField, 21, 1, 1, 151, 82, // Skip to: 40641 /* 19498 */ MCD_OPC_Decode, 234, 17, 112, // Opcode: URSHLv4i32 /* 19502 */ MCD_OPC_FilterValue, 22, 39, 0, // Skip to: 19545 /* 19506 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19509 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19527 /* 19513 */ MCD_OPC_CheckPredicate, 0, 132, 82, // Skip to: 40641 /* 19517 */ MCD_OPC_CheckField, 21, 1, 0, 126, 82, // Skip to: 40641 /* 19523 */ MCD_OPC_Decode, 188, 18, 89, // Opcode: UZP2v2i32 /* 19527 */ MCD_OPC_FilterValue, 2, 118, 82, // Skip to: 40641 /* 19531 */ MCD_OPC_CheckPredicate, 0, 114, 82, // Skip to: 40641 /* 19535 */ MCD_OPC_CheckField, 21, 1, 0, 108, 82, // Skip to: 40641 /* 19541 */ MCD_OPC_Decode, 191, 18, 112, // Opcode: UZP2v4i32 /* 19545 */ MCD_OPC_FilterValue, 23, 75, 0, // Skip to: 19624 /* 19549 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19552 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19570 /* 19556 */ MCD_OPC_CheckPredicate, 0, 89, 82, // Skip to: 40641 /* 19560 */ MCD_OPC_CheckField, 21, 1, 1, 83, 82, // Skip to: 40641 /* 19566 */ MCD_OPC_Decode, 247, 11, 89, // Opcode: SQRSHLv2i32 /* 19570 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19588 /* 19574 */ MCD_OPC_CheckPredicate, 0, 71, 82, // Skip to: 40641 /* 19578 */ MCD_OPC_CheckField, 21, 1, 1, 65, 82, // Skip to: 40641 /* 19584 */ MCD_OPC_Decode, 155, 17, 89, // Opcode: UQRSHLv2i32 /* 19588 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19606 /* 19592 */ MCD_OPC_CheckPredicate, 0, 53, 82, // Skip to: 40641 /* 19596 */ MCD_OPC_CheckField, 21, 1, 1, 47, 82, // Skip to: 40641 /* 19602 */ MCD_OPC_Decode, 250, 11, 112, // Opcode: SQRSHLv4i32 /* 19606 */ MCD_OPC_FilterValue, 3, 39, 82, // Skip to: 40641 /* 19610 */ MCD_OPC_CheckPredicate, 0, 35, 82, // Skip to: 40641 /* 19614 */ MCD_OPC_CheckField, 21, 1, 1, 29, 82, // Skip to: 40641 /* 19620 */ MCD_OPC_Decode, 158, 17, 112, // Opcode: UQRSHLv4i32 /* 19624 */ MCD_OPC_FilterValue, 24, 75, 0, // Skip to: 19703 /* 19628 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19631 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19649 /* 19635 */ MCD_OPC_CheckPredicate, 0, 10, 82, // Skip to: 40641 /* 19639 */ MCD_OPC_CheckField, 21, 1, 1, 4, 82, // Skip to: 40641 /* 19645 */ MCD_OPC_Decode, 151, 15, 103, // Opcode: SUBHNv2i64_v2i32 /* 19649 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19667 /* 19653 */ MCD_OPC_CheckPredicate, 0, 248, 81, // Skip to: 40641 /* 19657 */ MCD_OPC_CheckField, 21, 1, 1, 242, 81, // Skip to: 40641 /* 19663 */ MCD_OPC_Decode, 195, 9, 103, // Opcode: RSUBHNv2i64_v2i32 /* 19667 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19685 /* 19671 */ MCD_OPC_CheckPredicate, 0, 230, 81, // Skip to: 40641 /* 19675 */ MCD_OPC_CheckField, 21, 1, 1, 224, 81, // Skip to: 40641 /* 19681 */ MCD_OPC_Decode, 152, 15, 120, // Opcode: SUBHNv2i64_v4i32 /* 19685 */ MCD_OPC_FilterValue, 3, 216, 81, // Skip to: 40641 /* 19689 */ MCD_OPC_CheckPredicate, 0, 212, 81, // Skip to: 40641 /* 19693 */ MCD_OPC_CheckField, 21, 1, 1, 206, 81, // Skip to: 40641 /* 19699 */ MCD_OPC_Decode, 196, 9, 120, // Opcode: RSUBHNv2i64_v4i32 /* 19703 */ MCD_OPC_FilterValue, 25, 75, 0, // Skip to: 19782 /* 19707 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19710 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19728 /* 19714 */ MCD_OPC_CheckPredicate, 0, 187, 81, // Skip to: 40641 /* 19718 */ MCD_OPC_CheckField, 21, 1, 1, 181, 81, // Skip to: 40641 /* 19724 */ MCD_OPC_Decode, 217, 10, 89, // Opcode: SMAXv2i32 /* 19728 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19746 /* 19732 */ MCD_OPC_CheckPredicate, 0, 169, 81, // Skip to: 40641 /* 19736 */ MCD_OPC_CheckField, 21, 1, 1, 163, 81, // Skip to: 40641 /* 19742 */ MCD_OPC_Decode, 209, 16, 89, // Opcode: UMAXv2i32 /* 19746 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19764 /* 19750 */ MCD_OPC_CheckPredicate, 0, 151, 81, // Skip to: 40641 /* 19754 */ MCD_OPC_CheckField, 21, 1, 1, 145, 81, // Skip to: 40641 /* 19760 */ MCD_OPC_Decode, 219, 10, 112, // Opcode: SMAXv4i32 /* 19764 */ MCD_OPC_FilterValue, 3, 137, 81, // Skip to: 40641 /* 19768 */ MCD_OPC_CheckPredicate, 0, 133, 81, // Skip to: 40641 /* 19772 */ MCD_OPC_CheckField, 21, 1, 1, 127, 81, // Skip to: 40641 /* 19778 */ MCD_OPC_Decode, 211, 16, 112, // Opcode: UMAXv4i32 /* 19782 */ MCD_OPC_FilterValue, 26, 113, 0, // Skip to: 19899 /* 19786 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19789 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 19826 /* 19793 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 19796 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19808 /* 19800 */ MCD_OPC_CheckPredicate, 0, 101, 81, // Skip to: 40641 /* 19804 */ MCD_OPC_Decode, 229, 15, 89, // Opcode: TRN2v2i32 /* 19808 */ MCD_OPC_FilterValue, 1, 93, 81, // Skip to: 40641 /* 19812 */ MCD_OPC_CheckPredicate, 0, 89, 81, // Skip to: 40641 /* 19816 */ MCD_OPC_CheckField, 16, 5, 0, 83, 81, // Skip to: 40641 /* 19822 */ MCD_OPC_Decode, 226, 9, 99, // Opcode: SADALPv2i32_v1i64 /* 19826 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19844 /* 19830 */ MCD_OPC_CheckPredicate, 0, 71, 81, // Skip to: 40641 /* 19834 */ MCD_OPC_CheckField, 16, 6, 32, 65, 81, // Skip to: 40641 /* 19840 */ MCD_OPC_Decode, 132, 16, 99, // Opcode: UADALPv2i32_v1i64 /* 19844 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 19881 /* 19848 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 19851 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19863 /* 19855 */ MCD_OPC_CheckPredicate, 0, 46, 81, // Skip to: 40641 /* 19859 */ MCD_OPC_Decode, 232, 15, 112, // Opcode: TRN2v4i32 /* 19863 */ MCD_OPC_FilterValue, 1, 38, 81, // Skip to: 40641 /* 19867 */ MCD_OPC_CheckPredicate, 0, 34, 81, // Skip to: 40641 /* 19871 */ MCD_OPC_CheckField, 16, 5, 0, 28, 81, // Skip to: 40641 /* 19877 */ MCD_OPC_Decode, 228, 9, 126, // Opcode: SADALPv4i32_v2i64 /* 19881 */ MCD_OPC_FilterValue, 3, 20, 81, // Skip to: 40641 /* 19885 */ MCD_OPC_CheckPredicate, 0, 16, 81, // Skip to: 40641 /* 19889 */ MCD_OPC_CheckField, 16, 6, 32, 10, 81, // Skip to: 40641 /* 19895 */ MCD_OPC_Decode, 134, 16, 126, // Opcode: UADALPv4i32_v2i64 /* 19899 */ MCD_OPC_FilterValue, 27, 75, 0, // Skip to: 19978 /* 19903 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19906 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19924 /* 19910 */ MCD_OPC_CheckPredicate, 0, 247, 80, // Skip to: 40641 /* 19914 */ MCD_OPC_CheckField, 21, 1, 1, 241, 80, // Skip to: 40641 /* 19920 */ MCD_OPC_Decode, 235, 10, 89, // Opcode: SMINv2i32 /* 19924 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19942 /* 19928 */ MCD_OPC_CheckPredicate, 0, 229, 80, // Skip to: 40641 /* 19932 */ MCD_OPC_CheckField, 21, 1, 1, 223, 80, // Skip to: 40641 /* 19938 */ MCD_OPC_Decode, 226, 16, 89, // Opcode: UMINv2i32 /* 19942 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19960 /* 19946 */ MCD_OPC_CheckPredicate, 0, 211, 80, // Skip to: 40641 /* 19950 */ MCD_OPC_CheckField, 21, 1, 1, 205, 80, // Skip to: 40641 /* 19956 */ MCD_OPC_Decode, 237, 10, 112, // Opcode: SMINv4i32 /* 19960 */ MCD_OPC_FilterValue, 3, 197, 80, // Skip to: 40641 /* 19964 */ MCD_OPC_CheckPredicate, 0, 193, 80, // Skip to: 40641 /* 19968 */ MCD_OPC_CheckField, 21, 1, 1, 187, 80, // Skip to: 40641 /* 19974 */ MCD_OPC_Decode, 228, 16, 112, // Opcode: UMINv4i32 /* 19978 */ MCD_OPC_FilterValue, 28, 75, 0, // Skip to: 20057 /* 19982 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 19985 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20003 /* 19989 */ MCD_OPC_CheckPredicate, 0, 168, 80, // Skip to: 40641 /* 19993 */ MCD_OPC_CheckField, 21, 1, 1, 162, 80, // Skip to: 40641 /* 19999 */ MCD_OPC_Decode, 214, 9, 85, // Opcode: SABDLv2i32_v2i64 /* 20003 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20021 /* 20007 */ MCD_OPC_CheckPredicate, 0, 150, 80, // Skip to: 40641 /* 20011 */ MCD_OPC_CheckField, 21, 1, 1, 144, 80, // Skip to: 40641 /* 20017 */ MCD_OPC_Decode, 248, 15, 85, // Opcode: UABDLv2i32_v2i64 /* 20021 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20039 /* 20025 */ MCD_OPC_CheckPredicate, 0, 132, 80, // Skip to: 40641 /* 20029 */ MCD_OPC_CheckField, 21, 1, 1, 126, 80, // Skip to: 40641 /* 20035 */ MCD_OPC_Decode, 216, 9, 112, // Opcode: SABDLv4i32_v2i64 /* 20039 */ MCD_OPC_FilterValue, 3, 118, 80, // Skip to: 40641 /* 20043 */ MCD_OPC_CheckPredicate, 0, 114, 80, // Skip to: 40641 /* 20047 */ MCD_OPC_CheckField, 21, 1, 1, 108, 80, // Skip to: 40641 /* 20053 */ MCD_OPC_Decode, 250, 15, 112, // Opcode: UABDLv4i32_v2i64 /* 20057 */ MCD_OPC_FilterValue, 29, 75, 0, // Skip to: 20136 /* 20061 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20064 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20082 /* 20068 */ MCD_OPC_CheckPredicate, 0, 89, 80, // Skip to: 40641 /* 20072 */ MCD_OPC_CheckField, 21, 1, 1, 83, 80, // Skip to: 40641 /* 20078 */ MCD_OPC_Decode, 220, 9, 89, // Opcode: SABDv2i32 /* 20082 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20100 /* 20086 */ MCD_OPC_CheckPredicate, 0, 71, 80, // Skip to: 40641 /* 20090 */ MCD_OPC_CheckField, 21, 1, 1, 65, 80, // Skip to: 40641 /* 20096 */ MCD_OPC_Decode, 254, 15, 89, // Opcode: UABDv2i32 /* 20100 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20118 /* 20104 */ MCD_OPC_CheckPredicate, 0, 53, 80, // Skip to: 40641 /* 20108 */ MCD_OPC_CheckField, 21, 1, 1, 47, 80, // Skip to: 40641 /* 20114 */ MCD_OPC_Decode, 222, 9, 112, // Opcode: SABDv4i32 /* 20118 */ MCD_OPC_FilterValue, 3, 39, 80, // Skip to: 40641 /* 20122 */ MCD_OPC_CheckPredicate, 0, 35, 80, // Skip to: 40641 /* 20126 */ MCD_OPC_CheckField, 21, 1, 1, 29, 80, // Skip to: 40641 /* 20132 */ MCD_OPC_Decode, 128, 16, 112, // Opcode: UABDv4i32 /* 20136 */ MCD_OPC_FilterValue, 30, 113, 0, // Skip to: 20253 /* 20140 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20143 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 20180 /* 20147 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 20150 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20162 /* 20154 */ MCD_OPC_CheckPredicate, 0, 3, 80, // Skip to: 40641 /* 20158 */ MCD_OPC_Decode, 208, 18, 89, // Opcode: ZIP2v2i32 /* 20162 */ MCD_OPC_FilterValue, 1, 251, 79, // Skip to: 40641 /* 20166 */ MCD_OPC_CheckPredicate, 0, 247, 79, // Skip to: 40641 /* 20170 */ MCD_OPC_CheckField, 16, 5, 0, 241, 79, // Skip to: 40641 /* 20176 */ MCD_OPC_Decode, 154, 11, 90, // Opcode: SQABSv2i32 /* 20180 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20198 /* 20184 */ MCD_OPC_CheckPredicate, 0, 229, 79, // Skip to: 40641 /* 20188 */ MCD_OPC_CheckField, 16, 6, 32, 223, 79, // Skip to: 40641 /* 20194 */ MCD_OPC_Decode, 224, 11, 90, // Opcode: SQNEGv2i32 /* 20198 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 20235 /* 20202 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 20205 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20217 /* 20209 */ MCD_OPC_CheckPredicate, 0, 204, 79, // Skip to: 40641 /* 20213 */ MCD_OPC_Decode, 211, 18, 112, // Opcode: ZIP2v4i32 /* 20217 */ MCD_OPC_FilterValue, 1, 196, 79, // Skip to: 40641 /* 20221 */ MCD_OPC_CheckPredicate, 0, 192, 79, // Skip to: 40641 /* 20225 */ MCD_OPC_CheckField, 16, 5, 0, 186, 79, // Skip to: 40641 /* 20231 */ MCD_OPC_Decode, 157, 11, 117, // Opcode: SQABSv4i32 /* 20235 */ MCD_OPC_FilterValue, 3, 178, 79, // Skip to: 40641 /* 20239 */ MCD_OPC_CheckPredicate, 0, 174, 79, // Skip to: 40641 /* 20243 */ MCD_OPC_CheckField, 16, 6, 32, 168, 79, // Skip to: 40641 /* 20249 */ MCD_OPC_Decode, 227, 11, 117, // Opcode: SQNEGv4i32 /* 20253 */ MCD_OPC_FilterValue, 31, 75, 0, // Skip to: 20332 /* 20257 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20260 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20278 /* 20264 */ MCD_OPC_CheckPredicate, 0, 149, 79, // Skip to: 40641 /* 20268 */ MCD_OPC_CheckField, 21, 1, 1, 143, 79, // Skip to: 40641 /* 20274 */ MCD_OPC_Decode, 208, 9, 109, // Opcode: SABAv2i32 /* 20278 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20296 /* 20282 */ MCD_OPC_CheckPredicate, 0, 131, 79, // Skip to: 40641 /* 20286 */ MCD_OPC_CheckField, 21, 1, 1, 125, 79, // Skip to: 40641 /* 20292 */ MCD_OPC_Decode, 242, 15, 109, // Opcode: UABAv2i32 /* 20296 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20314 /* 20300 */ MCD_OPC_CheckPredicate, 0, 113, 79, // Skip to: 40641 /* 20304 */ MCD_OPC_CheckField, 21, 1, 1, 107, 79, // Skip to: 40641 /* 20310 */ MCD_OPC_Decode, 210, 9, 120, // Opcode: SABAv4i32 /* 20314 */ MCD_OPC_FilterValue, 3, 99, 79, // Skip to: 40641 /* 20318 */ MCD_OPC_CheckPredicate, 0, 95, 79, // Skip to: 40641 /* 20322 */ MCD_OPC_CheckField, 21, 1, 1, 89, 79, // Skip to: 40641 /* 20328 */ MCD_OPC_Decode, 244, 15, 120, // Opcode: UABAv4i32 /* 20332 */ MCD_OPC_FilterValue, 32, 75, 0, // Skip to: 20411 /* 20336 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20339 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20357 /* 20343 */ MCD_OPC_CheckPredicate, 0, 70, 79, // Skip to: 40641 /* 20347 */ MCD_OPC_CheckField, 21, 1, 1, 64, 79, // Skip to: 40641 /* 20353 */ MCD_OPC_Decode, 242, 10, 105, // Opcode: SMLALv2i32_v2i64 /* 20357 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20375 /* 20361 */ MCD_OPC_CheckPredicate, 0, 52, 79, // Skip to: 40641 /* 20365 */ MCD_OPC_CheckField, 21, 1, 1, 46, 79, // Skip to: 40641 /* 20371 */ MCD_OPC_Decode, 233, 16, 105, // Opcode: UMLALv2i32_v2i64 /* 20375 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20393 /* 20379 */ MCD_OPC_CheckPredicate, 0, 34, 79, // Skip to: 40641 /* 20383 */ MCD_OPC_CheckField, 21, 1, 1, 28, 79, // Skip to: 40641 /* 20389 */ MCD_OPC_Decode, 246, 10, 120, // Opcode: SMLALv4i32_v2i64 /* 20393 */ MCD_OPC_FilterValue, 3, 20, 79, // Skip to: 40641 /* 20397 */ MCD_OPC_CheckPredicate, 0, 16, 79, // Skip to: 40641 /* 20401 */ MCD_OPC_CheckField, 21, 1, 1, 10, 79, // Skip to: 40641 /* 20407 */ MCD_OPC_Decode, 237, 16, 120, // Opcode: UMLALv4i32_v2i64 /* 20411 */ MCD_OPC_FilterValue, 33, 73, 0, // Skip to: 20488 /* 20415 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20418 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 20435 /* 20422 */ MCD_OPC_CheckPredicate, 0, 247, 78, // Skip to: 40641 /* 20426 */ MCD_OPC_CheckField, 21, 1, 1, 241, 78, // Skip to: 40641 /* 20432 */ MCD_OPC_Decode, 73, 89, // Opcode: ADDv2i32 /* 20435 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20453 /* 20439 */ MCD_OPC_CheckPredicate, 0, 230, 78, // Skip to: 40641 /* 20443 */ MCD_OPC_CheckField, 21, 1, 1, 224, 78, // Skip to: 40641 /* 20449 */ MCD_OPC_Decode, 177, 15, 89, // Opcode: SUBv2i32 /* 20453 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 20470 /* 20457 */ MCD_OPC_CheckPredicate, 0, 212, 78, // Skip to: 40641 /* 20461 */ MCD_OPC_CheckField, 21, 1, 1, 206, 78, // Skip to: 40641 /* 20467 */ MCD_OPC_Decode, 76, 112, // Opcode: ADDv4i32 /* 20470 */ MCD_OPC_FilterValue, 3, 199, 78, // Skip to: 40641 /* 20474 */ MCD_OPC_CheckPredicate, 0, 195, 78, // Skip to: 40641 /* 20478 */ MCD_OPC_CheckField, 21, 1, 1, 189, 78, // Skip to: 40641 /* 20484 */ MCD_OPC_Decode, 180, 15, 112, // Opcode: SUBv4i32 /* 20488 */ MCD_OPC_FilterValue, 34, 101, 0, // Skip to: 20593 /* 20492 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20495 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 20526 /* 20499 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 20502 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20514 /* 20506 */ MCD_OPC_CheckPredicate, 0, 163, 78, // Skip to: 40641 /* 20510 */ MCD_OPC_Decode, 197, 1, 90, // Opcode: CMGTv2i32rz /* 20514 */ MCD_OPC_FilterValue, 33, 155, 78, // Skip to: 40641 /* 20518 */ MCD_OPC_CheckPredicate, 0, 151, 78, // Skip to: 40641 /* 20522 */ MCD_OPC_Decode, 174, 5, 90, // Opcode: FRINTPv2f32 /* 20526 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20544 /* 20530 */ MCD_OPC_CheckPredicate, 0, 139, 78, // Skip to: 40641 /* 20534 */ MCD_OPC_CheckField, 16, 6, 32, 133, 78, // Skip to: 40641 /* 20540 */ MCD_OPC_Decode, 181, 1, 90, // Opcode: CMGEv2i32rz /* 20544 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 20575 /* 20548 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 20551 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20563 /* 20555 */ MCD_OPC_CheckPredicate, 0, 114, 78, // Skip to: 40641 /* 20559 */ MCD_OPC_Decode, 203, 1, 117, // Opcode: CMGTv4i32rz /* 20563 */ MCD_OPC_FilterValue, 33, 106, 78, // Skip to: 40641 /* 20567 */ MCD_OPC_CheckPredicate, 0, 102, 78, // Skip to: 40641 /* 20571 */ MCD_OPC_Decode, 176, 5, 117, // Opcode: FRINTPv4f32 /* 20575 */ MCD_OPC_FilterValue, 3, 94, 78, // Skip to: 40641 /* 20579 */ MCD_OPC_CheckPredicate, 0, 90, 78, // Skip to: 40641 /* 20583 */ MCD_OPC_CheckField, 16, 6, 32, 84, 78, // Skip to: 40641 /* 20589 */ MCD_OPC_Decode, 187, 1, 117, // Opcode: CMGEv4i32rz /* 20593 */ MCD_OPC_FilterValue, 35, 75, 0, // Skip to: 20672 /* 20597 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20600 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20618 /* 20604 */ MCD_OPC_CheckPredicate, 0, 65, 78, // Skip to: 40641 /* 20608 */ MCD_OPC_CheckField, 21, 1, 1, 59, 78, // Skip to: 40641 /* 20614 */ MCD_OPC_Decode, 242, 1, 89, // Opcode: CMTSTv2i32 /* 20618 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20636 /* 20622 */ MCD_OPC_CheckPredicate, 0, 47, 78, // Skip to: 40641 /* 20626 */ MCD_OPC_CheckField, 21, 1, 1, 41, 78, // Skip to: 40641 /* 20632 */ MCD_OPC_Decode, 164, 1, 89, // Opcode: CMEQv2i32 /* 20636 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20654 /* 20640 */ MCD_OPC_CheckPredicate, 0, 29, 78, // Skip to: 40641 /* 20644 */ MCD_OPC_CheckField, 21, 1, 1, 23, 78, // Skip to: 40641 /* 20650 */ MCD_OPC_Decode, 245, 1, 112, // Opcode: CMTSTv4i32 /* 20654 */ MCD_OPC_FilterValue, 3, 15, 78, // Skip to: 40641 /* 20658 */ MCD_OPC_CheckPredicate, 0, 11, 78, // Skip to: 40641 /* 20662 */ MCD_OPC_CheckField, 21, 1, 1, 5, 78, // Skip to: 40641 /* 20668 */ MCD_OPC_Decode, 170, 1, 112, // Opcode: CMEQv4i32 /* 20672 */ MCD_OPC_FilterValue, 36, 39, 0, // Skip to: 20715 /* 20676 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20679 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20697 /* 20683 */ MCD_OPC_CheckPredicate, 0, 242, 77, // Skip to: 40641 /* 20687 */ MCD_OPC_CheckField, 21, 1, 1, 236, 77, // Skip to: 40641 /* 20693 */ MCD_OPC_Decode, 176, 11, 105, // Opcode: SQDMLALv2i32_v2i64 /* 20697 */ MCD_OPC_FilterValue, 2, 228, 77, // Skip to: 40641 /* 20701 */ MCD_OPC_CheckPredicate, 0, 224, 77, // Skip to: 40641 /* 20705 */ MCD_OPC_CheckField, 21, 1, 1, 218, 77, // Skip to: 40641 /* 20711 */ MCD_OPC_Decode, 180, 11, 120, // Opcode: SQDMLALv4i32_v2i64 /* 20715 */ MCD_OPC_FilterValue, 37, 75, 0, // Skip to: 20794 /* 20719 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20722 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20740 /* 20726 */ MCD_OPC_CheckPredicate, 0, 199, 77, // Skip to: 40641 /* 20730 */ MCD_OPC_CheckField, 21, 1, 1, 193, 77, // Skip to: 40641 /* 20736 */ MCD_OPC_Decode, 183, 8, 109, // Opcode: MLAv2i32 /* 20740 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20758 /* 20744 */ MCD_OPC_CheckPredicate, 0, 181, 77, // Skip to: 40641 /* 20748 */ MCD_OPC_CheckField, 21, 1, 1, 175, 77, // Skip to: 40641 /* 20754 */ MCD_OPC_Decode, 193, 8, 109, // Opcode: MLSv2i32 /* 20758 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20776 /* 20762 */ MCD_OPC_CheckPredicate, 0, 163, 77, // Skip to: 40641 /* 20766 */ MCD_OPC_CheckField, 21, 1, 1, 157, 77, // Skip to: 40641 /* 20772 */ MCD_OPC_Decode, 187, 8, 120, // Opcode: MLAv4i32 /* 20776 */ MCD_OPC_FilterValue, 3, 149, 77, // Skip to: 40641 /* 20780 */ MCD_OPC_CheckPredicate, 0, 145, 77, // Skip to: 40641 /* 20784 */ MCD_OPC_CheckField, 21, 1, 1, 139, 77, // Skip to: 40641 /* 20790 */ MCD_OPC_Decode, 197, 8, 120, // Opcode: MLSv4i32 /* 20794 */ MCD_OPC_FilterValue, 38, 127, 0, // Skip to: 20925 /* 20798 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20801 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 20832 /* 20805 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 20808 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20820 /* 20812 */ MCD_OPC_CheckPredicate, 0, 113, 77, // Skip to: 40641 /* 20816 */ MCD_OPC_Decode, 165, 1, 90, // Opcode: CMEQv2i32rz /* 20820 */ MCD_OPC_FilterValue, 33, 105, 77, // Skip to: 40641 /* 20824 */ MCD_OPC_CheckPredicate, 0, 101, 77, // Skip to: 40641 /* 20828 */ MCD_OPC_Decode, 184, 5, 90, // Opcode: FRINTZv2f32 /* 20832 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 20863 /* 20836 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 20839 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20851 /* 20843 */ MCD_OPC_CheckPredicate, 0, 82, 77, // Skip to: 40641 /* 20847 */ MCD_OPC_Decode, 226, 1, 90, // Opcode: CMLEv2i32rz /* 20851 */ MCD_OPC_FilterValue, 33, 74, 77, // Skip to: 40641 /* 20855 */ MCD_OPC_CheckPredicate, 0, 70, 77, // Skip to: 40641 /* 20859 */ MCD_OPC_Decode, 159, 5, 90, // Opcode: FRINTIv2f32 /* 20863 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 20894 /* 20867 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 20870 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20882 /* 20874 */ MCD_OPC_CheckPredicate, 0, 51, 77, // Skip to: 40641 /* 20878 */ MCD_OPC_Decode, 171, 1, 117, // Opcode: CMEQv4i32rz /* 20882 */ MCD_OPC_FilterValue, 33, 43, 77, // Skip to: 40641 /* 20886 */ MCD_OPC_CheckPredicate, 0, 39, 77, // Skip to: 40641 /* 20890 */ MCD_OPC_Decode, 186, 5, 117, // Opcode: FRINTZv4f32 /* 20894 */ MCD_OPC_FilterValue, 3, 31, 77, // Skip to: 40641 /* 20898 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 20901 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20913 /* 20905 */ MCD_OPC_CheckPredicate, 0, 20, 77, // Skip to: 40641 /* 20909 */ MCD_OPC_Decode, 229, 1, 117, // Opcode: CMLEv4i32rz /* 20913 */ MCD_OPC_FilterValue, 33, 12, 77, // Skip to: 40641 /* 20917 */ MCD_OPC_CheckPredicate, 0, 8, 77, // Skip to: 40641 /* 20921 */ MCD_OPC_Decode, 161, 5, 117, // Opcode: FRINTIv4f32 /* 20925 */ MCD_OPC_FilterValue, 39, 39, 0, // Skip to: 20968 /* 20929 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20932 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20950 /* 20936 */ MCD_OPC_CheckPredicate, 0, 245, 76, // Skip to: 40641 /* 20940 */ MCD_OPC_CheckField, 21, 1, 1, 239, 76, // Skip to: 40641 /* 20946 */ MCD_OPC_Decode, 232, 8, 89, // Opcode: MULv2i32 /* 20950 */ MCD_OPC_FilterValue, 2, 231, 76, // Skip to: 40641 /* 20954 */ MCD_OPC_CheckPredicate, 0, 227, 76, // Skip to: 40641 /* 20958 */ MCD_OPC_CheckField, 21, 1, 1, 221, 76, // Skip to: 40641 /* 20964 */ MCD_OPC_Decode, 236, 8, 112, // Opcode: MULv4i32 /* 20968 */ MCD_OPC_FilterValue, 40, 75, 0, // Skip to: 21047 /* 20972 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 20975 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20993 /* 20979 */ MCD_OPC_CheckPredicate, 0, 202, 76, // Skip to: 40641 /* 20983 */ MCD_OPC_CheckField, 21, 1, 1, 196, 76, // Skip to: 40641 /* 20989 */ MCD_OPC_Decode, 252, 10, 105, // Opcode: SMLSLv2i32_v2i64 /* 20993 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21011 /* 20997 */ MCD_OPC_CheckPredicate, 0, 184, 76, // Skip to: 40641 /* 21001 */ MCD_OPC_CheckField, 21, 1, 1, 178, 76, // Skip to: 40641 /* 21007 */ MCD_OPC_Decode, 243, 16, 105, // Opcode: UMLSLv2i32_v2i64 /* 21011 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21029 /* 21015 */ MCD_OPC_CheckPredicate, 0, 166, 76, // Skip to: 40641 /* 21019 */ MCD_OPC_CheckField, 21, 1, 1, 160, 76, // Skip to: 40641 /* 21025 */ MCD_OPC_Decode, 128, 11, 120, // Opcode: SMLSLv4i32_v2i64 /* 21029 */ MCD_OPC_FilterValue, 3, 152, 76, // Skip to: 40641 /* 21033 */ MCD_OPC_CheckPredicate, 0, 148, 76, // Skip to: 40641 /* 21037 */ MCD_OPC_CheckField, 21, 1, 1, 142, 76, // Skip to: 40641 /* 21043 */ MCD_OPC_Decode, 247, 16, 120, // Opcode: UMLSLv4i32_v2i64 /* 21047 */ MCD_OPC_FilterValue, 41, 75, 0, // Skip to: 21126 /* 21051 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21054 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21072 /* 21058 */ MCD_OPC_CheckPredicate, 0, 123, 76, // Skip to: 40641 /* 21062 */ MCD_OPC_CheckField, 21, 1, 1, 117, 76, // Skip to: 40641 /* 21068 */ MCD_OPC_Decode, 206, 10, 89, // Opcode: SMAXPv2i32 /* 21072 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21090 /* 21076 */ MCD_OPC_CheckPredicate, 0, 105, 76, // Skip to: 40641 /* 21080 */ MCD_OPC_CheckField, 21, 1, 1, 99, 76, // Skip to: 40641 /* 21086 */ MCD_OPC_Decode, 198, 16, 89, // Opcode: UMAXPv2i32 /* 21090 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21108 /* 21094 */ MCD_OPC_CheckPredicate, 0, 87, 76, // Skip to: 40641 /* 21098 */ MCD_OPC_CheckField, 21, 1, 1, 81, 76, // Skip to: 40641 /* 21104 */ MCD_OPC_Decode, 208, 10, 112, // Opcode: SMAXPv4i32 /* 21108 */ MCD_OPC_FilterValue, 3, 73, 76, // Skip to: 40641 /* 21112 */ MCD_OPC_CheckPredicate, 0, 69, 76, // Skip to: 40641 /* 21116 */ MCD_OPC_CheckField, 21, 1, 1, 63, 76, // Skip to: 40641 /* 21122 */ MCD_OPC_Decode, 200, 16, 112, // Opcode: UMAXPv4i32 /* 21126 */ MCD_OPC_FilterValue, 42, 155, 0, // Skip to: 21285 /* 21130 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21133 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 21164 /* 21137 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21140 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21152 /* 21144 */ MCD_OPC_CheckPredicate, 0, 37, 76, // Skip to: 40641 /* 21148 */ MCD_OPC_Decode, 234, 1, 90, // Opcode: CMLTv2i32rz /* 21152 */ MCD_OPC_FilterValue, 2, 29, 76, // Skip to: 40641 /* 21156 */ MCD_OPC_CheckPredicate, 0, 25, 76, // Skip to: 40641 /* 21160 */ MCD_OPC_Decode, 237, 1, 117, // Opcode: CMLTv4i32rz /* 21164 */ MCD_OPC_FilterValue, 33, 51, 0, // Skip to: 21219 /* 21168 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21171 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21183 /* 21175 */ MCD_OPC_CheckPredicate, 0, 6, 76, // Skip to: 40641 /* 21179 */ MCD_OPC_Decode, 208, 3, 90, // Opcode: FCVTPSv2f32 /* 21183 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 21195 /* 21187 */ MCD_OPC_CheckPredicate, 0, 250, 75, // Skip to: 40641 /* 21191 */ MCD_OPC_Decode, 217, 3, 90, // Opcode: FCVTPUv2f32 /* 21195 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 21207 /* 21199 */ MCD_OPC_CheckPredicate, 0, 238, 75, // Skip to: 40641 /* 21203 */ MCD_OPC_Decode, 210, 3, 117, // Opcode: FCVTPSv4f32 /* 21207 */ MCD_OPC_FilterValue, 3, 230, 75, // Skip to: 40641 /* 21211 */ MCD_OPC_CheckPredicate, 0, 226, 75, // Skip to: 40641 /* 21215 */ MCD_OPC_Decode, 219, 3, 117, // Opcode: FCVTPUv4f32 /* 21219 */ MCD_OPC_FilterValue, 48, 29, 0, // Skip to: 21252 /* 21223 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21226 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 21239 /* 21230 */ MCD_OPC_CheckPredicate, 0, 207, 75, // Skip to: 40641 /* 21234 */ MCD_OPC_Decode, 213, 10, 139, 1, // Opcode: SMAXVv4i32v /* 21239 */ MCD_OPC_FilterValue, 3, 198, 75, // Skip to: 40641 /* 21243 */ MCD_OPC_CheckPredicate, 0, 194, 75, // Skip to: 40641 /* 21247 */ MCD_OPC_Decode, 205, 16, 139, 1, // Opcode: UMAXVv4i32v /* 21252 */ MCD_OPC_FilterValue, 49, 185, 75, // Skip to: 40641 /* 21256 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21259 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 21272 /* 21263 */ MCD_OPC_CheckPredicate, 0, 174, 75, // Skip to: 40641 /* 21267 */ MCD_OPC_Decode, 231, 10, 139, 1, // Opcode: SMINVv4i32v /* 21272 */ MCD_OPC_FilterValue, 3, 165, 75, // Skip to: 40641 /* 21276 */ MCD_OPC_CheckPredicate, 0, 161, 75, // Skip to: 40641 /* 21280 */ MCD_OPC_Decode, 222, 16, 139, 1, // Opcode: UMINVv4i32v /* 21285 */ MCD_OPC_FilterValue, 43, 75, 0, // Skip to: 21364 /* 21289 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21292 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21310 /* 21296 */ MCD_OPC_CheckPredicate, 0, 141, 75, // Skip to: 40641 /* 21300 */ MCD_OPC_CheckField, 21, 1, 1, 135, 75, // Skip to: 40641 /* 21306 */ MCD_OPC_Decode, 224, 10, 89, // Opcode: SMINPv2i32 /* 21310 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21328 /* 21314 */ MCD_OPC_CheckPredicate, 0, 123, 75, // Skip to: 40641 /* 21318 */ MCD_OPC_CheckField, 21, 1, 1, 117, 75, // Skip to: 40641 /* 21324 */ MCD_OPC_Decode, 215, 16, 89, // Opcode: UMINPv2i32 /* 21328 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21346 /* 21332 */ MCD_OPC_CheckPredicate, 0, 105, 75, // Skip to: 40641 /* 21336 */ MCD_OPC_CheckField, 21, 1, 1, 99, 75, // Skip to: 40641 /* 21342 */ MCD_OPC_Decode, 226, 10, 112, // Opcode: SMINPv4i32 /* 21346 */ MCD_OPC_FilterValue, 3, 91, 75, // Skip to: 40641 /* 21350 */ MCD_OPC_CheckPredicate, 0, 87, 75, // Skip to: 40641 /* 21354 */ MCD_OPC_CheckField, 21, 1, 1, 81, 75, // Skip to: 40641 /* 21360 */ MCD_OPC_Decode, 217, 16, 112, // Opcode: UMINPv4i32 /* 21364 */ MCD_OPC_FilterValue, 44, 39, 0, // Skip to: 21407 /* 21368 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21371 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21389 /* 21375 */ MCD_OPC_CheckPredicate, 0, 62, 75, // Skip to: 40641 /* 21379 */ MCD_OPC_CheckField, 21, 1, 1, 56, 75, // Skip to: 40641 /* 21385 */ MCD_OPC_Decode, 188, 11, 105, // Opcode: SQDMLSLv2i32_v2i64 /* 21389 */ MCD_OPC_FilterValue, 2, 48, 75, // Skip to: 40641 /* 21393 */ MCD_OPC_CheckPredicate, 0, 44, 75, // Skip to: 40641 /* 21397 */ MCD_OPC_CheckField, 21, 1, 1, 38, 75, // Skip to: 40641 /* 21403 */ MCD_OPC_Decode, 192, 11, 120, // Opcode: SQDMLSLv4i32_v2i64 /* 21407 */ MCD_OPC_FilterValue, 45, 75, 0, // Skip to: 21486 /* 21411 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21414 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21432 /* 21418 */ MCD_OPC_CheckPredicate, 0, 19, 75, // Skip to: 40641 /* 21422 */ MCD_OPC_CheckField, 21, 1, 1, 13, 75, // Skip to: 40641 /* 21428 */ MCD_OPC_Decode, 199, 11, 89, // Opcode: SQDMULHv2i32 /* 21432 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21450 /* 21436 */ MCD_OPC_CheckPredicate, 0, 1, 75, // Skip to: 40641 /* 21440 */ MCD_OPC_CheckField, 21, 1, 1, 251, 74, // Skip to: 40641 /* 21446 */ MCD_OPC_Decode, 234, 11, 89, // Opcode: SQRDMULHv2i32 /* 21450 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21468 /* 21454 */ MCD_OPC_CheckPredicate, 0, 239, 74, // Skip to: 40641 /* 21458 */ MCD_OPC_CheckField, 21, 1, 1, 233, 74, // Skip to: 40641 /* 21464 */ MCD_OPC_Decode, 203, 11, 112, // Opcode: SQDMULHv4i32 /* 21468 */ MCD_OPC_FilterValue, 3, 225, 74, // Skip to: 40641 /* 21472 */ MCD_OPC_CheckPredicate, 0, 221, 74, // Skip to: 40641 /* 21476 */ MCD_OPC_CheckField, 21, 1, 1, 215, 74, // Skip to: 40641 /* 21482 */ MCD_OPC_Decode, 238, 11, 112, // Opcode: SQRDMULHv4i32 /* 21486 */ MCD_OPC_FilterValue, 46, 137, 0, // Skip to: 21627 /* 21490 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21493 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 21523 /* 21497 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21500 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 21511 /* 21504 */ MCD_OPC_CheckPredicate, 0, 189, 74, // Skip to: 40641 /* 21508 */ MCD_OPC_Decode, 24, 90, // Opcode: ABSv2i32 /* 21511 */ MCD_OPC_FilterValue, 33, 182, 74, // Skip to: 40641 /* 21515 */ MCD_OPC_CheckPredicate, 0, 178, 74, // Skip to: 40641 /* 21519 */ MCD_OPC_Decode, 248, 3, 90, // Opcode: FCVTZSv2f32 /* 21523 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 21554 /* 21527 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21530 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21542 /* 21534 */ MCD_OPC_CheckPredicate, 0, 159, 74, // Skip to: 40641 /* 21538 */ MCD_OPC_Decode, 249, 8, 90, // Opcode: NEGv2i32 /* 21542 */ MCD_OPC_FilterValue, 33, 151, 74, // Skip to: 40641 /* 21546 */ MCD_OPC_CheckPredicate, 0, 147, 74, // Skip to: 40641 /* 21550 */ MCD_OPC_Decode, 149, 4, 90, // Opcode: FCVTZUv2f32 /* 21554 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 21596 /* 21558 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21561 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 21572 /* 21565 */ MCD_OPC_CheckPredicate, 0, 128, 74, // Skip to: 40641 /* 21569 */ MCD_OPC_Decode, 27, 117, // Opcode: ABSv4i32 /* 21572 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 21584 /* 21576 */ MCD_OPC_CheckPredicate, 0, 117, 74, // Skip to: 40641 /* 21580 */ MCD_OPC_Decode, 252, 3, 117, // Opcode: FCVTZSv4f32 /* 21584 */ MCD_OPC_FilterValue, 49, 109, 74, // Skip to: 40641 /* 21588 */ MCD_OPC_CheckPredicate, 0, 105, 74, // Skip to: 40641 /* 21592 */ MCD_OPC_Decode, 59, 139, 1, // Opcode: ADDVv4i32v /* 21596 */ MCD_OPC_FilterValue, 3, 97, 74, // Skip to: 40641 /* 21600 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21603 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21615 /* 21607 */ MCD_OPC_CheckPredicate, 0, 86, 74, // Skip to: 40641 /* 21611 */ MCD_OPC_Decode, 252, 8, 117, // Opcode: NEGv4i32 /* 21615 */ MCD_OPC_FilterValue, 33, 78, 74, // Skip to: 40641 /* 21619 */ MCD_OPC_CheckPredicate, 0, 74, 74, // Skip to: 40641 /* 21623 */ MCD_OPC_Decode, 153, 4, 117, // Opcode: FCVTZUv4f32 /* 21627 */ MCD_OPC_FilterValue, 47, 37, 0, // Skip to: 21668 /* 21631 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21634 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 21651 /* 21638 */ MCD_OPC_CheckPredicate, 0, 55, 74, // Skip to: 40641 /* 21642 */ MCD_OPC_CheckField, 21, 1, 1, 49, 74, // Skip to: 40641 /* 21648 */ MCD_OPC_Decode, 41, 89, // Opcode: ADDPv2i32 /* 21651 */ MCD_OPC_FilterValue, 2, 42, 74, // Skip to: 40641 /* 21655 */ MCD_OPC_CheckPredicate, 0, 38, 74, // Skip to: 40641 /* 21659 */ MCD_OPC_CheckField, 21, 1, 1, 32, 74, // Skip to: 40641 /* 21665 */ MCD_OPC_Decode, 45, 112, // Opcode: ADDPv4i32 /* 21668 */ MCD_OPC_FilterValue, 48, 75, 0, // Skip to: 21747 /* 21672 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21675 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21693 /* 21679 */ MCD_OPC_CheckPredicate, 0, 14, 74, // Skip to: 40641 /* 21683 */ MCD_OPC_CheckField, 21, 1, 1, 8, 74, // Skip to: 40641 /* 21689 */ MCD_OPC_Decode, 141, 11, 85, // Opcode: SMULLv2i32_v2i64 /* 21693 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21711 /* 21697 */ MCD_OPC_CheckPredicate, 0, 252, 73, // Skip to: 40641 /* 21701 */ MCD_OPC_CheckField, 21, 1, 1, 246, 73, // Skip to: 40641 /* 21707 */ MCD_OPC_Decode, 131, 17, 85, // Opcode: UMULLv2i32_v2i64 /* 21711 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21729 /* 21715 */ MCD_OPC_CheckPredicate, 0, 234, 73, // Skip to: 40641 /* 21719 */ MCD_OPC_CheckField, 21, 1, 1, 228, 73, // Skip to: 40641 /* 21725 */ MCD_OPC_Decode, 145, 11, 112, // Opcode: SMULLv4i32_v2i64 /* 21729 */ MCD_OPC_FilterValue, 3, 220, 73, // Skip to: 40641 /* 21733 */ MCD_OPC_CheckPredicate, 0, 216, 73, // Skip to: 40641 /* 21737 */ MCD_OPC_CheckField, 21, 1, 1, 210, 73, // Skip to: 40641 /* 21743 */ MCD_OPC_Decode, 135, 17, 112, // Opcode: UMULLv4i32_v2i64 /* 21747 */ MCD_OPC_FilterValue, 49, 75, 0, // Skip to: 21826 /* 21751 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21754 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21772 /* 21758 */ MCD_OPC_CheckPredicate, 0, 191, 73, // Skip to: 40641 /* 21762 */ MCD_OPC_CheckField, 21, 1, 1, 185, 73, // Skip to: 40641 /* 21768 */ MCD_OPC_Decode, 193, 4, 89, // Opcode: FMINNMv2f32 /* 21772 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21790 /* 21776 */ MCD_OPC_CheckPredicate, 0, 173, 73, // Skip to: 40641 /* 21780 */ MCD_OPC_CheckField, 21, 1, 1, 167, 73, // Skip to: 40641 /* 21786 */ MCD_OPC_Decode, 186, 4, 89, // Opcode: FMINNMPv2f32 /* 21790 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21808 /* 21794 */ MCD_OPC_CheckPredicate, 0, 155, 73, // Skip to: 40641 /* 21798 */ MCD_OPC_CheckField, 21, 1, 1, 149, 73, // Skip to: 40641 /* 21804 */ MCD_OPC_Decode, 195, 4, 112, // Opcode: FMINNMv4f32 /* 21808 */ MCD_OPC_FilterValue, 3, 141, 73, // Skip to: 40641 /* 21812 */ MCD_OPC_CheckPredicate, 0, 137, 73, // Skip to: 40641 /* 21816 */ MCD_OPC_CheckField, 21, 1, 1, 131, 73, // Skip to: 40641 /* 21822 */ MCD_OPC_Decode, 190, 4, 112, // Opcode: FMINNMPv4f32 /* 21826 */ MCD_OPC_FilterValue, 50, 140, 0, // Skip to: 21970 /* 21830 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21833 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 21864 /* 21837 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21840 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21852 /* 21844 */ MCD_OPC_CheckPredicate, 0, 105, 73, // Skip to: 40641 /* 21848 */ MCD_OPC_Decode, 240, 2, 90, // Opcode: FCMGTv2i32rz /* 21852 */ MCD_OPC_FilterValue, 33, 97, 73, // Skip to: 40641 /* 21856 */ MCD_OPC_CheckPredicate, 0, 93, 73, // Skip to: 40641 /* 21860 */ MCD_OPC_Decode, 221, 17, 90, // Opcode: URECPEv2i32 /* 21864 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 21895 /* 21868 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21871 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21883 /* 21875 */ MCD_OPC_CheckPredicate, 0, 74, 73, // Skip to: 40641 /* 21879 */ MCD_OPC_Decode, 230, 2, 90, // Opcode: FCMGEv2i32rz /* 21883 */ MCD_OPC_FilterValue, 33, 66, 73, // Skip to: 40641 /* 21887 */ MCD_OPC_CheckPredicate, 0, 62, 73, // Skip to: 40641 /* 21891 */ MCD_OPC_Decode, 245, 17, 90, // Opcode: URSQRTEv2i32 /* 21895 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 21926 /* 21899 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21902 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21914 /* 21906 */ MCD_OPC_CheckPredicate, 0, 43, 73, // Skip to: 40641 /* 21910 */ MCD_OPC_Decode, 243, 2, 117, // Opcode: FCMGTv4i32rz /* 21914 */ MCD_OPC_FilterValue, 33, 35, 73, // Skip to: 40641 /* 21918 */ MCD_OPC_CheckPredicate, 0, 31, 73, // Skip to: 40641 /* 21922 */ MCD_OPC_Decode, 222, 17, 117, // Opcode: URECPEv4i32 /* 21926 */ MCD_OPC_FilterValue, 3, 23, 73, // Skip to: 40641 /* 21930 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 21933 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21945 /* 21937 */ MCD_OPC_CheckPredicate, 0, 12, 73, // Skip to: 40641 /* 21941 */ MCD_OPC_Decode, 233, 2, 117, // Opcode: FCMGEv4i32rz /* 21945 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 21957 /* 21949 */ MCD_OPC_CheckPredicate, 0, 0, 73, // Skip to: 40641 /* 21953 */ MCD_OPC_Decode, 246, 17, 117, // Opcode: URSQRTEv4i32 /* 21957 */ MCD_OPC_FilterValue, 48, 248, 72, // Skip to: 40641 /* 21961 */ MCD_OPC_CheckPredicate, 0, 244, 72, // Skip to: 40641 /* 21965 */ MCD_OPC_Decode, 192, 4, 139, 1, // Opcode: FMINNMVv4i32v /* 21970 */ MCD_OPC_FilterValue, 51, 39, 0, // Skip to: 22013 /* 21974 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 21977 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21995 /* 21981 */ MCD_OPC_CheckPredicate, 0, 224, 72, // Skip to: 40641 /* 21985 */ MCD_OPC_CheckField, 21, 1, 1, 218, 72, // Skip to: 40641 /* 21991 */ MCD_OPC_Decode, 216, 4, 109, // Opcode: FMLSv2f32 /* 21995 */ MCD_OPC_FilterValue, 2, 210, 72, // Skip to: 40641 /* 21999 */ MCD_OPC_CheckPredicate, 0, 206, 72, // Skip to: 40641 /* 22003 */ MCD_OPC_CheckField, 21, 1, 1, 200, 72, // Skip to: 40641 /* 22009 */ MCD_OPC_Decode, 220, 4, 120, // Opcode: FMLSv4f32 /* 22013 */ MCD_OPC_FilterValue, 52, 39, 0, // Skip to: 22056 /* 22017 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22020 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22038 /* 22024 */ MCD_OPC_CheckPredicate, 0, 181, 72, // Skip to: 40641 /* 22028 */ MCD_OPC_CheckField, 21, 1, 1, 175, 72, // Skip to: 40641 /* 22034 */ MCD_OPC_Decode, 212, 11, 85, // Opcode: SQDMULLv2i32_v2i64 /* 22038 */ MCD_OPC_FilterValue, 2, 167, 72, // Skip to: 40641 /* 22042 */ MCD_OPC_CheckPredicate, 0, 163, 72, // Skip to: 40641 /* 22046 */ MCD_OPC_CheckField, 21, 1, 1, 157, 72, // Skip to: 40641 /* 22052 */ MCD_OPC_Decode, 216, 11, 112, // Opcode: SQDMULLv4i32_v2i64 /* 22056 */ MCD_OPC_FilterValue, 53, 75, 0, // Skip to: 22135 /* 22060 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22063 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22081 /* 22067 */ MCD_OPC_CheckPredicate, 0, 138, 72, // Skip to: 40641 /* 22071 */ MCD_OPC_CheckField, 21, 1, 1, 132, 72, // Skip to: 40641 /* 22077 */ MCD_OPC_Decode, 204, 5, 89, // Opcode: FSUBv2f32 /* 22081 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22099 /* 22085 */ MCD_OPC_CheckPredicate, 0, 120, 72, // Skip to: 40641 /* 22089 */ MCD_OPC_CheckField, 21, 1, 1, 114, 72, // Skip to: 40641 /* 22095 */ MCD_OPC_Decode, 182, 2, 89, // Opcode: FABDv2f32 /* 22099 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22117 /* 22103 */ MCD_OPC_CheckPredicate, 0, 102, 72, // Skip to: 40641 /* 22107 */ MCD_OPC_CheckField, 21, 1, 1, 96, 72, // Skip to: 40641 /* 22113 */ MCD_OPC_Decode, 206, 5, 112, // Opcode: FSUBv4f32 /* 22117 */ MCD_OPC_FilterValue, 3, 88, 72, // Skip to: 40641 /* 22121 */ MCD_OPC_CheckPredicate, 0, 84, 72, // Skip to: 40641 /* 22125 */ MCD_OPC_CheckField, 21, 1, 1, 78, 72, // Skip to: 40641 /* 22131 */ MCD_OPC_Decode, 184, 2, 112, // Opcode: FABDv4f32 /* 22135 */ MCD_OPC_FilterValue, 54, 127, 0, // Skip to: 22266 /* 22139 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22142 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 22173 /* 22146 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 22149 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22161 /* 22153 */ MCD_OPC_CheckPredicate, 0, 52, 72, // Skip to: 40641 /* 22157 */ MCD_OPC_Decode, 220, 2, 90, // Opcode: FCMEQv2i32rz /* 22161 */ MCD_OPC_FilterValue, 33, 44, 72, // Skip to: 40641 /* 22165 */ MCD_OPC_CheckPredicate, 0, 40, 72, // Skip to: 40641 /* 22169 */ MCD_OPC_Decode, 142, 5, 90, // Opcode: FRECPEv2f32 /* 22173 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 22204 /* 22177 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 22180 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22192 /* 22184 */ MCD_OPC_CheckPredicate, 0, 21, 72, // Skip to: 40641 /* 22188 */ MCD_OPC_Decode, 246, 2, 90, // Opcode: FCMLEv2i32rz /* 22192 */ MCD_OPC_FilterValue, 33, 13, 72, // Skip to: 40641 /* 22196 */ MCD_OPC_CheckPredicate, 0, 9, 72, // Skip to: 40641 /* 22200 */ MCD_OPC_Decode, 189, 5, 90, // Opcode: FRSQRTEv2f32 /* 22204 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 22235 /* 22208 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 22211 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22223 /* 22215 */ MCD_OPC_CheckPredicate, 0, 246, 71, // Skip to: 40641 /* 22219 */ MCD_OPC_Decode, 223, 2, 117, // Opcode: FCMEQv4i32rz /* 22223 */ MCD_OPC_FilterValue, 33, 238, 71, // Skip to: 40641 /* 22227 */ MCD_OPC_CheckPredicate, 0, 234, 71, // Skip to: 40641 /* 22231 */ MCD_OPC_Decode, 144, 5, 117, // Opcode: FRECPEv4f32 /* 22235 */ MCD_OPC_FilterValue, 3, 226, 71, // Skip to: 40641 /* 22239 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 22242 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22254 /* 22246 */ MCD_OPC_CheckPredicate, 0, 215, 71, // Skip to: 40641 /* 22250 */ MCD_OPC_Decode, 248, 2, 117, // Opcode: FCMLEv4i32rz /* 22254 */ MCD_OPC_FilterValue, 33, 207, 71, // Skip to: 40641 /* 22258 */ MCD_OPC_CheckPredicate, 0, 203, 71, // Skip to: 40641 /* 22262 */ MCD_OPC_Decode, 191, 5, 117, // Opcode: FRSQRTEv4f32 /* 22266 */ MCD_OPC_FilterValue, 57, 39, 0, // Skip to: 22309 /* 22270 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22273 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22291 /* 22277 */ MCD_OPC_CheckPredicate, 0, 184, 71, // Skip to: 40641 /* 22281 */ MCD_OPC_CheckField, 21, 1, 1, 178, 71, // Skip to: 40641 /* 22287 */ MCD_OPC_Decode, 238, 2, 89, // Opcode: FCMGTv2f32 /* 22291 */ MCD_OPC_FilterValue, 3, 170, 71, // Skip to: 40641 /* 22295 */ MCD_OPC_CheckPredicate, 0, 166, 71, // Skip to: 40641 /* 22299 */ MCD_OPC_CheckField, 21, 1, 1, 160, 71, // Skip to: 40641 /* 22305 */ MCD_OPC_Decode, 242, 2, 112, // Opcode: FCMGTv4f32 /* 22309 */ MCD_OPC_FilterValue, 58, 39, 0, // Skip to: 22352 /* 22313 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22316 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22334 /* 22320 */ MCD_OPC_CheckPredicate, 0, 141, 71, // Skip to: 40641 /* 22324 */ MCD_OPC_CheckField, 16, 6, 32, 135, 71, // Skip to: 40641 /* 22330 */ MCD_OPC_Decode, 251, 2, 90, // Opcode: FCMLTv2i32rz /* 22334 */ MCD_OPC_FilterValue, 2, 127, 71, // Skip to: 40641 /* 22338 */ MCD_OPC_CheckPredicate, 0, 123, 71, // Skip to: 40641 /* 22342 */ MCD_OPC_CheckField, 16, 6, 32, 117, 71, // Skip to: 40641 /* 22348 */ MCD_OPC_Decode, 253, 2, 117, // Opcode: FCMLTv4i32rz /* 22352 */ MCD_OPC_FilterValue, 59, 39, 0, // Skip to: 22395 /* 22356 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22359 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22377 /* 22363 */ MCD_OPC_CheckPredicate, 0, 98, 71, // Skip to: 40641 /* 22367 */ MCD_OPC_CheckField, 21, 1, 1, 92, 71, // Skip to: 40641 /* 22373 */ MCD_OPC_Decode, 197, 2, 89, // Opcode: FACGTv2f32 /* 22377 */ MCD_OPC_FilterValue, 3, 84, 71, // Skip to: 40641 /* 22381 */ MCD_OPC_CheckPredicate, 0, 80, 71, // Skip to: 40641 /* 22385 */ MCD_OPC_CheckField, 21, 1, 1, 74, 71, // Skip to: 40641 /* 22391 */ MCD_OPC_Decode, 199, 2, 112, // Opcode: FACGTv4f32 /* 22395 */ MCD_OPC_FilterValue, 61, 75, 0, // Skip to: 22474 /* 22399 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22402 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22420 /* 22406 */ MCD_OPC_CheckPredicate, 0, 55, 71, // Skip to: 40641 /* 22410 */ MCD_OPC_CheckField, 21, 1, 1, 49, 71, // Skip to: 40641 /* 22416 */ MCD_OPC_Decode, 203, 4, 89, // Opcode: FMINv2f32 /* 22420 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22438 /* 22424 */ MCD_OPC_CheckPredicate, 0, 37, 71, // Skip to: 40641 /* 22428 */ MCD_OPC_CheckField, 21, 1, 1, 31, 71, // Skip to: 40641 /* 22434 */ MCD_OPC_Decode, 196, 4, 89, // Opcode: FMINPv2f32 /* 22438 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22456 /* 22442 */ MCD_OPC_CheckPredicate, 0, 19, 71, // Skip to: 40641 /* 22446 */ MCD_OPC_CheckField, 21, 1, 1, 13, 71, // Skip to: 40641 /* 22452 */ MCD_OPC_Decode, 205, 4, 112, // Opcode: FMINv4f32 /* 22456 */ MCD_OPC_FilterValue, 3, 5, 71, // Skip to: 40641 /* 22460 */ MCD_OPC_CheckPredicate, 0, 1, 71, // Skip to: 40641 /* 22464 */ MCD_OPC_CheckField, 21, 1, 1, 251, 70, // Skip to: 40641 /* 22470 */ MCD_OPC_Decode, 200, 4, 112, // Opcode: FMINPv4f32 /* 22474 */ MCD_OPC_FilterValue, 62, 114, 0, // Skip to: 22592 /* 22478 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22481 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22499 /* 22485 */ MCD_OPC_CheckPredicate, 0, 232, 70, // Skip to: 40641 /* 22489 */ MCD_OPC_CheckField, 16, 6, 32, 226, 70, // Skip to: 40641 /* 22495 */ MCD_OPC_Decode, 187, 2, 90, // Opcode: FABSv2f32 /* 22499 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 22530 /* 22503 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 22506 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22518 /* 22510 */ MCD_OPC_CheckPredicate, 0, 207, 70, // Skip to: 40641 /* 22514 */ MCD_OPC_Decode, 131, 5, 90, // Opcode: FNEGv2f32 /* 22518 */ MCD_OPC_FilterValue, 33, 199, 70, // Skip to: 40641 /* 22522 */ MCD_OPC_CheckPredicate, 0, 195, 70, // Skip to: 40641 /* 22526 */ MCD_OPC_Decode, 199, 5, 90, // Opcode: FSQRTv2f32 /* 22530 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22548 /* 22534 */ MCD_OPC_CheckPredicate, 0, 183, 70, // Skip to: 40641 /* 22538 */ MCD_OPC_CheckField, 16, 6, 32, 177, 70, // Skip to: 40641 /* 22544 */ MCD_OPC_Decode, 189, 2, 117, // Opcode: FABSv4f32 /* 22548 */ MCD_OPC_FilterValue, 3, 169, 70, // Skip to: 40641 /* 22552 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 22555 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22567 /* 22559 */ MCD_OPC_CheckPredicate, 0, 158, 70, // Skip to: 40641 /* 22563 */ MCD_OPC_Decode, 133, 5, 117, // Opcode: FNEGv4f32 /* 22567 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 22579 /* 22571 */ MCD_OPC_CheckPredicate, 0, 146, 70, // Skip to: 40641 /* 22575 */ MCD_OPC_Decode, 201, 5, 117, // Opcode: FSQRTv4f32 /* 22579 */ MCD_OPC_FilterValue, 48, 138, 70, // Skip to: 40641 /* 22583 */ MCD_OPC_CheckPredicate, 0, 134, 70, // Skip to: 40641 /* 22587 */ MCD_OPC_Decode, 202, 4, 139, 1, // Opcode: FMINVv4i32v /* 22592 */ MCD_OPC_FilterValue, 63, 125, 70, // Skip to: 40641 /* 22596 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22599 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22617 /* 22603 */ MCD_OPC_CheckPredicate, 0, 114, 70, // Skip to: 40641 /* 22607 */ MCD_OPC_CheckField, 21, 1, 1, 108, 70, // Skip to: 40641 /* 22613 */ MCD_OPC_Decode, 194, 5, 89, // Opcode: FRSQRTSv2f32 /* 22617 */ MCD_OPC_FilterValue, 2, 100, 70, // Skip to: 40641 /* 22621 */ MCD_OPC_CheckPredicate, 0, 96, 70, // Skip to: 40641 /* 22625 */ MCD_OPC_CheckField, 21, 1, 1, 90, 70, // Skip to: 40641 /* 22631 */ MCD_OPC_Decode, 196, 5, 112, // Opcode: FRSQRTSv4f32 /* 22635 */ MCD_OPC_FilterValue, 11, 193, 5, // Skip to: 24112 /* 22639 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 22642 */ MCD_OPC_FilterValue, 3, 39, 0, // Skip to: 22685 /* 22646 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22649 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22667 /* 22653 */ MCD_OPC_CheckPredicate, 0, 64, 70, // Skip to: 40641 /* 22657 */ MCD_OPC_CheckField, 21, 1, 1, 58, 70, // Skip to: 40641 /* 22663 */ MCD_OPC_Decode, 166, 11, 112, // Opcode: SQADDv2i64 /* 22667 */ MCD_OPC_FilterValue, 3, 50, 70, // Skip to: 40641 /* 22671 */ MCD_OPC_CheckPredicate, 0, 46, 70, // Skip to: 40641 /* 22675 */ MCD_OPC_CheckField, 21, 1, 1, 40, 70, // Skip to: 40641 /* 22681 */ MCD_OPC_Decode, 145, 17, 112, // Opcode: UQADDv2i64 /* 22685 */ MCD_OPC_FilterValue, 6, 20, 0, // Skip to: 22709 /* 22689 */ MCD_OPC_CheckPredicate, 0, 28, 70, // Skip to: 40641 /* 22693 */ MCD_OPC_CheckField, 29, 3, 2, 22, 70, // Skip to: 40641 /* 22699 */ MCD_OPC_CheckField, 21, 1, 0, 16, 70, // Skip to: 40641 /* 22705 */ MCD_OPC_Decode, 182, 18, 112, // Opcode: UZP1v2i64 /* 22709 */ MCD_OPC_FilterValue, 7, 73, 0, // Skip to: 22786 /* 22713 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22716 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22734 /* 22720 */ MCD_OPC_CheckPredicate, 0, 253, 69, // Skip to: 40641 /* 22724 */ MCD_OPC_CheckField, 21, 1, 1, 247, 69, // Skip to: 40641 /* 22730 */ MCD_OPC_Decode, 134, 9, 89, // Opcode: ORNv8i8 /* 22734 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 22751 /* 22738 */ MCD_OPC_CheckPredicate, 0, 235, 69, // Skip to: 40641 /* 22742 */ MCD_OPC_CheckField, 21, 1, 1, 229, 69, // Skip to: 40641 /* 22748 */ MCD_OPC_Decode, 121, 89, // Opcode: BIFv8i8 /* 22751 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22769 /* 22755 */ MCD_OPC_CheckPredicate, 0, 218, 69, // Skip to: 40641 /* 22759 */ MCD_OPC_CheckField, 21, 1, 1, 212, 69, // Skip to: 40641 /* 22765 */ MCD_OPC_Decode, 133, 9, 112, // Opcode: ORNv16i8 /* 22769 */ MCD_OPC_FilterValue, 3, 204, 69, // Skip to: 40641 /* 22773 */ MCD_OPC_CheckPredicate, 0, 200, 69, // Skip to: 40641 /* 22777 */ MCD_OPC_CheckField, 21, 1, 1, 194, 69, // Skip to: 40641 /* 22783 */ MCD_OPC_Decode, 120, 112, // Opcode: BIFv16i8 /* 22786 */ MCD_OPC_FilterValue, 10, 20, 0, // Skip to: 22810 /* 22790 */ MCD_OPC_CheckPredicate, 0, 183, 69, // Skip to: 40641 /* 22794 */ MCD_OPC_CheckField, 29, 3, 2, 177, 69, // Skip to: 40641 /* 22800 */ MCD_OPC_CheckField, 21, 1, 0, 171, 69, // Skip to: 40641 /* 22806 */ MCD_OPC_Decode, 223, 15, 112, // Opcode: TRN1v2i64 /* 22810 */ MCD_OPC_FilterValue, 11, 39, 0, // Skip to: 22853 /* 22814 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22817 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22835 /* 22821 */ MCD_OPC_CheckPredicate, 0, 152, 69, // Skip to: 40641 /* 22825 */ MCD_OPC_CheckField, 21, 1, 1, 146, 69, // Skip to: 40641 /* 22831 */ MCD_OPC_Decode, 200, 12, 112, // Opcode: SQSUBv2i64 /* 22835 */ MCD_OPC_FilterValue, 3, 138, 69, // Skip to: 40641 /* 22839 */ MCD_OPC_CheckPredicate, 0, 134, 69, // Skip to: 40641 /* 22843 */ MCD_OPC_CheckField, 21, 1, 1, 128, 69, // Skip to: 40641 /* 22849 */ MCD_OPC_Decode, 207, 17, 112, // Opcode: UQSUBv2i64 /* 22853 */ MCD_OPC_FilterValue, 13, 39, 0, // Skip to: 22896 /* 22857 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22860 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22878 /* 22864 */ MCD_OPC_CheckPredicate, 0, 109, 69, // Skip to: 40641 /* 22868 */ MCD_OPC_CheckField, 21, 1, 1, 103, 69, // Skip to: 40641 /* 22874 */ MCD_OPC_Decode, 198, 1, 112, // Opcode: CMGTv2i64 /* 22878 */ MCD_OPC_FilterValue, 3, 95, 69, // Skip to: 40641 /* 22882 */ MCD_OPC_CheckPredicate, 0, 91, 69, // Skip to: 40641 /* 22886 */ MCD_OPC_CheckField, 21, 1, 1, 85, 69, // Skip to: 40641 /* 22892 */ MCD_OPC_Decode, 211, 1, 112, // Opcode: CMHIv2i64 /* 22896 */ MCD_OPC_FilterValue, 14, 64, 0, // Skip to: 22964 /* 22900 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 22903 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22921 /* 22907 */ MCD_OPC_CheckPredicate, 0, 66, 69, // Skip to: 40641 /* 22911 */ MCD_OPC_CheckField, 29, 3, 2, 60, 69, // Skip to: 40641 /* 22917 */ MCD_OPC_Decode, 202, 18, 112, // Opcode: ZIP1v2i64 /* 22921 */ MCD_OPC_FilterValue, 1, 52, 69, // Skip to: 40641 /* 22925 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22928 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22946 /* 22932 */ MCD_OPC_CheckPredicate, 0, 41, 69, // Skip to: 40641 /* 22936 */ MCD_OPC_CheckField, 16, 5, 0, 35, 69, // Skip to: 40641 /* 22942 */ MCD_OPC_Decode, 189, 15, 126, // Opcode: SUQADDv2i64 /* 22946 */ MCD_OPC_FilterValue, 3, 27, 69, // Skip to: 40641 /* 22950 */ MCD_OPC_CheckPredicate, 0, 23, 69, // Skip to: 40641 /* 22954 */ MCD_OPC_CheckField, 16, 5, 0, 17, 69, // Skip to: 40641 /* 22960 */ MCD_OPC_Decode, 155, 18, 126, // Opcode: USQADDv2i64 /* 22964 */ MCD_OPC_FilterValue, 15, 39, 0, // Skip to: 23007 /* 22968 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 22971 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22989 /* 22975 */ MCD_OPC_CheckPredicate, 0, 254, 68, // Skip to: 40641 /* 22979 */ MCD_OPC_CheckField, 21, 1, 1, 248, 68, // Skip to: 40641 /* 22985 */ MCD_OPC_Decode, 182, 1, 112, // Opcode: CMGEv2i64 /* 22989 */ MCD_OPC_FilterValue, 3, 240, 68, // Skip to: 40641 /* 22993 */ MCD_OPC_CheckPredicate, 0, 236, 68, // Skip to: 40641 /* 22997 */ MCD_OPC_CheckField, 21, 1, 1, 230, 68, // Skip to: 40641 /* 23003 */ MCD_OPC_Decode, 219, 1, 112, // Opcode: CMHSv2i64 /* 23007 */ MCD_OPC_FilterValue, 17, 39, 0, // Skip to: 23050 /* 23011 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23014 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23032 /* 23018 */ MCD_OPC_CheckPredicate, 0, 211, 68, // Skip to: 40641 /* 23022 */ MCD_OPC_CheckField, 21, 1, 1, 205, 68, // Skip to: 40641 /* 23028 */ MCD_OPC_Decode, 142, 13, 112, // Opcode: SSHLv2i64 /* 23032 */ MCD_OPC_FilterValue, 3, 197, 68, // Skip to: 40641 /* 23036 */ MCD_OPC_CheckPredicate, 0, 193, 68, // Skip to: 40641 /* 23040 */ MCD_OPC_CheckField, 21, 1, 1, 187, 68, // Skip to: 40641 /* 23046 */ MCD_OPC_Decode, 136, 18, 112, // Opcode: USHLv2i64 /* 23050 */ MCD_OPC_FilterValue, 19, 39, 0, // Skip to: 23093 /* 23054 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23057 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23075 /* 23061 */ MCD_OPC_CheckPredicate, 0, 168, 68, // Skip to: 40641 /* 23065 */ MCD_OPC_CheckField, 21, 1, 1, 162, 68, // Skip to: 40641 /* 23071 */ MCD_OPC_Decode, 166, 12, 112, // Opcode: SQSHLv2i64 /* 23075 */ MCD_OPC_FilterValue, 3, 154, 68, // Skip to: 40641 /* 23079 */ MCD_OPC_CheckPredicate, 0, 150, 68, // Skip to: 40641 /* 23083 */ MCD_OPC_CheckField, 21, 1, 1, 144, 68, // Skip to: 40641 /* 23089 */ MCD_OPC_Decode, 182, 17, 112, // Opcode: UQSHLv2i64 /* 23093 */ MCD_OPC_FilterValue, 21, 39, 0, // Skip to: 23136 /* 23097 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23100 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23118 /* 23104 */ MCD_OPC_CheckPredicate, 0, 125, 68, // Skip to: 40641 /* 23108 */ MCD_OPC_CheckField, 21, 1, 1, 119, 68, // Skip to: 40641 /* 23114 */ MCD_OPC_Decode, 240, 12, 112, // Opcode: SRSHLv2i64 /* 23118 */ MCD_OPC_FilterValue, 3, 111, 68, // Skip to: 40641 /* 23122 */ MCD_OPC_CheckPredicate, 0, 107, 68, // Skip to: 40641 /* 23126 */ MCD_OPC_CheckField, 21, 1, 1, 101, 68, // Skip to: 40641 /* 23132 */ MCD_OPC_Decode, 232, 17, 112, // Opcode: URSHLv2i64 /* 23136 */ MCD_OPC_FilterValue, 22, 20, 0, // Skip to: 23160 /* 23140 */ MCD_OPC_CheckPredicate, 0, 89, 68, // Skip to: 40641 /* 23144 */ MCD_OPC_CheckField, 29, 3, 2, 83, 68, // Skip to: 40641 /* 23150 */ MCD_OPC_CheckField, 21, 1, 0, 77, 68, // Skip to: 40641 /* 23156 */ MCD_OPC_Decode, 189, 18, 112, // Opcode: UZP2v2i64 /* 23160 */ MCD_OPC_FilterValue, 23, 39, 0, // Skip to: 23203 /* 23164 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23167 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23185 /* 23171 */ MCD_OPC_CheckPredicate, 0, 58, 68, // Skip to: 40641 /* 23175 */ MCD_OPC_CheckField, 21, 1, 1, 52, 68, // Skip to: 40641 /* 23181 */ MCD_OPC_Decode, 248, 11, 112, // Opcode: SQRSHLv2i64 /* 23185 */ MCD_OPC_FilterValue, 3, 44, 68, // Skip to: 40641 /* 23189 */ MCD_OPC_CheckPredicate, 0, 40, 68, // Skip to: 40641 /* 23193 */ MCD_OPC_CheckField, 21, 1, 1, 34, 68, // Skip to: 40641 /* 23199 */ MCD_OPC_Decode, 156, 17, 112, // Opcode: UQRSHLv2i64 /* 23203 */ MCD_OPC_FilterValue, 26, 20, 0, // Skip to: 23227 /* 23207 */ MCD_OPC_CheckPredicate, 0, 22, 68, // Skip to: 40641 /* 23211 */ MCD_OPC_CheckField, 29, 3, 2, 16, 68, // Skip to: 40641 /* 23217 */ MCD_OPC_CheckField, 21, 1, 0, 10, 68, // Skip to: 40641 /* 23223 */ MCD_OPC_Decode, 230, 15, 112, // Opcode: TRN2v2i64 /* 23227 */ MCD_OPC_FilterValue, 30, 64, 0, // Skip to: 23295 /* 23231 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 23234 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23252 /* 23238 */ MCD_OPC_CheckPredicate, 0, 247, 67, // Skip to: 40641 /* 23242 */ MCD_OPC_CheckField, 29, 3, 2, 241, 67, // Skip to: 40641 /* 23248 */ MCD_OPC_Decode, 209, 18, 112, // Opcode: ZIP2v2i64 /* 23252 */ MCD_OPC_FilterValue, 1, 233, 67, // Skip to: 40641 /* 23256 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23259 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23277 /* 23263 */ MCD_OPC_CheckPredicate, 0, 222, 67, // Skip to: 40641 /* 23267 */ MCD_OPC_CheckField, 16, 5, 0, 216, 67, // Skip to: 40641 /* 23273 */ MCD_OPC_Decode, 155, 11, 117, // Opcode: SQABSv2i64 /* 23277 */ MCD_OPC_FilterValue, 3, 208, 67, // Skip to: 40641 /* 23281 */ MCD_OPC_CheckPredicate, 0, 204, 67, // Skip to: 40641 /* 23285 */ MCD_OPC_CheckField, 16, 5, 0, 198, 67, // Skip to: 40641 /* 23291 */ MCD_OPC_Decode, 225, 11, 117, // Opcode: SQNEGv2i64 /* 23295 */ MCD_OPC_FilterValue, 33, 38, 0, // Skip to: 23337 /* 23299 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23302 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 23319 /* 23306 */ MCD_OPC_CheckPredicate, 0, 179, 67, // Skip to: 40641 /* 23310 */ MCD_OPC_CheckField, 21, 1, 1, 173, 67, // Skip to: 40641 /* 23316 */ MCD_OPC_Decode, 74, 112, // Opcode: ADDv2i64 /* 23319 */ MCD_OPC_FilterValue, 3, 166, 67, // Skip to: 40641 /* 23323 */ MCD_OPC_CheckPredicate, 0, 162, 67, // Skip to: 40641 /* 23327 */ MCD_OPC_CheckField, 21, 1, 1, 156, 67, // Skip to: 40641 /* 23333 */ MCD_OPC_Decode, 178, 15, 112, // Opcode: SUBv2i64 /* 23337 */ MCD_OPC_FilterValue, 34, 52, 0, // Skip to: 23393 /* 23341 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 23344 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 23375 /* 23348 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23351 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23363 /* 23355 */ MCD_OPC_CheckPredicate, 0, 130, 67, // Skip to: 40641 /* 23359 */ MCD_OPC_Decode, 199, 1, 117, // Opcode: CMGTv2i64rz /* 23363 */ MCD_OPC_FilterValue, 3, 122, 67, // Skip to: 40641 /* 23367 */ MCD_OPC_CheckPredicate, 0, 118, 67, // Skip to: 40641 /* 23371 */ MCD_OPC_Decode, 183, 1, 117, // Opcode: CMGEv2i64rz /* 23375 */ MCD_OPC_FilterValue, 33, 110, 67, // Skip to: 40641 /* 23379 */ MCD_OPC_CheckPredicate, 0, 106, 67, // Skip to: 40641 /* 23383 */ MCD_OPC_CheckField, 29, 3, 2, 100, 67, // Skip to: 40641 /* 23389 */ MCD_OPC_Decode, 175, 5, 117, // Opcode: FRINTPv2f64 /* 23393 */ MCD_OPC_FilterValue, 35, 39, 0, // Skip to: 23436 /* 23397 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23400 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23418 /* 23404 */ MCD_OPC_CheckPredicate, 0, 81, 67, // Skip to: 40641 /* 23408 */ MCD_OPC_CheckField, 21, 1, 1, 75, 67, // Skip to: 40641 /* 23414 */ MCD_OPC_Decode, 243, 1, 112, // Opcode: CMTSTv2i64 /* 23418 */ MCD_OPC_FilterValue, 3, 67, 67, // Skip to: 40641 /* 23422 */ MCD_OPC_CheckPredicate, 0, 63, 67, // Skip to: 40641 /* 23426 */ MCD_OPC_CheckField, 21, 1, 1, 57, 67, // Skip to: 40641 /* 23432 */ MCD_OPC_Decode, 166, 1, 112, // Opcode: CMEQv2i64 /* 23436 */ MCD_OPC_FilterValue, 38, 65, 0, // Skip to: 23505 /* 23440 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 23443 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 23474 /* 23447 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23450 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23462 /* 23454 */ MCD_OPC_CheckPredicate, 0, 31, 67, // Skip to: 40641 /* 23458 */ MCD_OPC_Decode, 167, 1, 117, // Opcode: CMEQv2i64rz /* 23462 */ MCD_OPC_FilterValue, 3, 23, 67, // Skip to: 40641 /* 23466 */ MCD_OPC_CheckPredicate, 0, 19, 67, // Skip to: 40641 /* 23470 */ MCD_OPC_Decode, 227, 1, 117, // Opcode: CMLEv2i64rz /* 23474 */ MCD_OPC_FilterValue, 33, 11, 67, // Skip to: 40641 /* 23478 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23481 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23493 /* 23485 */ MCD_OPC_CheckPredicate, 0, 0, 67, // Skip to: 40641 /* 23489 */ MCD_OPC_Decode, 185, 5, 117, // Opcode: FRINTZv2f64 /* 23493 */ MCD_OPC_FilterValue, 3, 248, 66, // Skip to: 40641 /* 23497 */ MCD_OPC_CheckPredicate, 0, 244, 66, // Skip to: 40641 /* 23501 */ MCD_OPC_Decode, 160, 5, 117, // Opcode: FRINTIv2f64 /* 23505 */ MCD_OPC_FilterValue, 42, 52, 0, // Skip to: 23561 /* 23509 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 23512 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 23530 /* 23516 */ MCD_OPC_CheckPredicate, 0, 225, 66, // Skip to: 40641 /* 23520 */ MCD_OPC_CheckField, 29, 3, 2, 219, 66, // Skip to: 40641 /* 23526 */ MCD_OPC_Decode, 235, 1, 117, // Opcode: CMLTv2i64rz /* 23530 */ MCD_OPC_FilterValue, 33, 211, 66, // Skip to: 40641 /* 23534 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23537 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23549 /* 23541 */ MCD_OPC_CheckPredicate, 0, 200, 66, // Skip to: 40641 /* 23545 */ MCD_OPC_Decode, 209, 3, 117, // Opcode: FCVTPSv2f64 /* 23549 */ MCD_OPC_FilterValue, 3, 192, 66, // Skip to: 40641 /* 23553 */ MCD_OPC_CheckPredicate, 0, 188, 66, // Skip to: 40641 /* 23557 */ MCD_OPC_Decode, 218, 3, 117, // Opcode: FCVTPUv2f64 /* 23561 */ MCD_OPC_FilterValue, 46, 64, 0, // Skip to: 23629 /* 23565 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 23568 */ MCD_OPC_FilterValue, 32, 26, 0, // Skip to: 23598 /* 23572 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23575 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 23586 /* 23579 */ MCD_OPC_CheckPredicate, 0, 162, 66, // Skip to: 40641 /* 23583 */ MCD_OPC_Decode, 25, 117, // Opcode: ABSv2i64 /* 23586 */ MCD_OPC_FilterValue, 3, 155, 66, // Skip to: 40641 /* 23590 */ MCD_OPC_CheckPredicate, 0, 151, 66, // Skip to: 40641 /* 23594 */ MCD_OPC_Decode, 250, 8, 117, // Opcode: NEGv2i64 /* 23598 */ MCD_OPC_FilterValue, 33, 143, 66, // Skip to: 40641 /* 23602 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23605 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23617 /* 23609 */ MCD_OPC_CheckPredicate, 0, 132, 66, // Skip to: 40641 /* 23613 */ MCD_OPC_Decode, 249, 3, 117, // Opcode: FCVTZSv2f64 /* 23617 */ MCD_OPC_FilterValue, 3, 124, 66, // Skip to: 40641 /* 23621 */ MCD_OPC_CheckPredicate, 0, 120, 66, // Skip to: 40641 /* 23625 */ MCD_OPC_Decode, 150, 4, 117, // Opcode: FCVTZUv2f64 /* 23629 */ MCD_OPC_FilterValue, 47, 19, 0, // Skip to: 23652 /* 23633 */ MCD_OPC_CheckPredicate, 0, 108, 66, // Skip to: 40641 /* 23637 */ MCD_OPC_CheckField, 29, 3, 2, 102, 66, // Skip to: 40641 /* 23643 */ MCD_OPC_CheckField, 21, 1, 1, 96, 66, // Skip to: 40641 /* 23649 */ MCD_OPC_Decode, 42, 112, // Opcode: ADDPv2i64 /* 23652 */ MCD_OPC_FilterValue, 49, 39, 0, // Skip to: 23695 /* 23656 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23659 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23677 /* 23663 */ MCD_OPC_CheckPredicate, 0, 78, 66, // Skip to: 40641 /* 23667 */ MCD_OPC_CheckField, 21, 1, 1, 72, 66, // Skip to: 40641 /* 23673 */ MCD_OPC_Decode, 194, 4, 112, // Opcode: FMINNMv2f64 /* 23677 */ MCD_OPC_FilterValue, 3, 64, 66, // Skip to: 40641 /* 23681 */ MCD_OPC_CheckPredicate, 0, 60, 66, // Skip to: 40641 /* 23685 */ MCD_OPC_CheckField, 21, 1, 1, 54, 66, // Skip to: 40641 /* 23691 */ MCD_OPC_Decode, 187, 4, 112, // Opcode: FMINNMPv2f64 /* 23695 */ MCD_OPC_FilterValue, 50, 39, 0, // Skip to: 23738 /* 23699 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23702 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23720 /* 23706 */ MCD_OPC_CheckPredicate, 0, 35, 66, // Skip to: 40641 /* 23710 */ MCD_OPC_CheckField, 16, 6, 32, 29, 66, // Skip to: 40641 /* 23716 */ MCD_OPC_Decode, 241, 2, 117, // Opcode: FCMGTv2i64rz /* 23720 */ MCD_OPC_FilterValue, 3, 21, 66, // Skip to: 40641 /* 23724 */ MCD_OPC_CheckPredicate, 0, 17, 66, // Skip to: 40641 /* 23728 */ MCD_OPC_CheckField, 16, 6, 32, 11, 66, // Skip to: 40641 /* 23734 */ MCD_OPC_Decode, 231, 2, 117, // Opcode: FCMGEv2i64rz /* 23738 */ MCD_OPC_FilterValue, 51, 20, 0, // Skip to: 23762 /* 23742 */ MCD_OPC_CheckPredicate, 0, 255, 65, // Skip to: 40641 /* 23746 */ MCD_OPC_CheckField, 29, 3, 2, 249, 65, // Skip to: 40641 /* 23752 */ MCD_OPC_CheckField, 21, 1, 1, 243, 65, // Skip to: 40641 /* 23758 */ MCD_OPC_Decode, 217, 4, 120, // Opcode: FMLSv2f64 /* 23762 */ MCD_OPC_FilterValue, 53, 39, 0, // Skip to: 23805 /* 23766 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23769 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23787 /* 23773 */ MCD_OPC_CheckPredicate, 0, 224, 65, // Skip to: 40641 /* 23777 */ MCD_OPC_CheckField, 21, 1, 1, 218, 65, // Skip to: 40641 /* 23783 */ MCD_OPC_Decode, 205, 5, 112, // Opcode: FSUBv2f64 /* 23787 */ MCD_OPC_FilterValue, 3, 210, 65, // Skip to: 40641 /* 23791 */ MCD_OPC_CheckPredicate, 0, 206, 65, // Skip to: 40641 /* 23795 */ MCD_OPC_CheckField, 21, 1, 1, 200, 65, // Skip to: 40641 /* 23801 */ MCD_OPC_Decode, 183, 2, 112, // Opcode: FABDv2f64 /* 23805 */ MCD_OPC_FilterValue, 54, 65, 0, // Skip to: 23874 /* 23809 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 23812 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 23843 /* 23816 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23819 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23831 /* 23823 */ MCD_OPC_CheckPredicate, 0, 174, 65, // Skip to: 40641 /* 23827 */ MCD_OPC_Decode, 221, 2, 117, // Opcode: FCMEQv2i64rz /* 23831 */ MCD_OPC_FilterValue, 3, 166, 65, // Skip to: 40641 /* 23835 */ MCD_OPC_CheckPredicate, 0, 162, 65, // Skip to: 40641 /* 23839 */ MCD_OPC_Decode, 247, 2, 117, // Opcode: FCMLEv2i64rz /* 23843 */ MCD_OPC_FilterValue, 33, 154, 65, // Skip to: 40641 /* 23847 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23850 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23862 /* 23854 */ MCD_OPC_CheckPredicate, 0, 143, 65, // Skip to: 40641 /* 23858 */ MCD_OPC_Decode, 143, 5, 117, // Opcode: FRECPEv2f64 /* 23862 */ MCD_OPC_FilterValue, 3, 135, 65, // Skip to: 40641 /* 23866 */ MCD_OPC_CheckPredicate, 0, 131, 65, // Skip to: 40641 /* 23870 */ MCD_OPC_Decode, 190, 5, 117, // Opcode: FRSQRTEv2f64 /* 23874 */ MCD_OPC_FilterValue, 56, 39, 0, // Skip to: 23917 /* 23878 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23881 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23899 /* 23885 */ MCD_OPC_CheckPredicate, 1, 112, 65, // Skip to: 40641 /* 23889 */ MCD_OPC_CheckField, 21, 1, 1, 106, 65, // Skip to: 40641 /* 23895 */ MCD_OPC_Decode, 148, 9, 85, // Opcode: PMULLv1i64 /* 23899 */ MCD_OPC_FilterValue, 2, 98, 65, // Skip to: 40641 /* 23903 */ MCD_OPC_CheckPredicate, 1, 94, 65, // Skip to: 40641 /* 23907 */ MCD_OPC_CheckField, 21, 1, 1, 88, 65, // Skip to: 40641 /* 23913 */ MCD_OPC_Decode, 149, 9, 112, // Opcode: PMULLv2i64 /* 23917 */ MCD_OPC_FilterValue, 57, 20, 0, // Skip to: 23941 /* 23921 */ MCD_OPC_CheckPredicate, 0, 76, 65, // Skip to: 40641 /* 23925 */ MCD_OPC_CheckField, 29, 3, 3, 70, 65, // Skip to: 40641 /* 23931 */ MCD_OPC_CheckField, 21, 1, 1, 64, 65, // Skip to: 40641 /* 23937 */ MCD_OPC_Decode, 239, 2, 112, // Opcode: FCMGTv2f64 /* 23941 */ MCD_OPC_FilterValue, 58, 20, 0, // Skip to: 23965 /* 23945 */ MCD_OPC_CheckPredicate, 0, 52, 65, // Skip to: 40641 /* 23949 */ MCD_OPC_CheckField, 29, 3, 2, 46, 65, // Skip to: 40641 /* 23955 */ MCD_OPC_CheckField, 16, 6, 32, 40, 65, // Skip to: 40641 /* 23961 */ MCD_OPC_Decode, 252, 2, 117, // Opcode: FCMLTv2i64rz /* 23965 */ MCD_OPC_FilterValue, 59, 20, 0, // Skip to: 23989 /* 23969 */ MCD_OPC_CheckPredicate, 0, 28, 65, // Skip to: 40641 /* 23973 */ MCD_OPC_CheckField, 29, 3, 3, 22, 65, // Skip to: 40641 /* 23979 */ MCD_OPC_CheckField, 21, 1, 1, 16, 65, // Skip to: 40641 /* 23985 */ MCD_OPC_Decode, 198, 2, 112, // Opcode: FACGTv2f64 /* 23989 */ MCD_OPC_FilterValue, 61, 39, 0, // Skip to: 24032 /* 23993 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 23996 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24014 /* 24000 */ MCD_OPC_CheckPredicate, 0, 253, 64, // Skip to: 40641 /* 24004 */ MCD_OPC_CheckField, 21, 1, 1, 247, 64, // Skip to: 40641 /* 24010 */ MCD_OPC_Decode, 204, 4, 112, // Opcode: FMINv2f64 /* 24014 */ MCD_OPC_FilterValue, 3, 239, 64, // Skip to: 40641 /* 24018 */ MCD_OPC_CheckPredicate, 0, 235, 64, // Skip to: 40641 /* 24022 */ MCD_OPC_CheckField, 21, 1, 1, 229, 64, // Skip to: 40641 /* 24028 */ MCD_OPC_Decode, 197, 4, 112, // Opcode: FMINPv2f64 /* 24032 */ MCD_OPC_FilterValue, 62, 52, 0, // Skip to: 24088 /* 24036 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 24039 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 24070 /* 24043 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 24046 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 24058 /* 24050 */ MCD_OPC_CheckPredicate, 0, 203, 64, // Skip to: 40641 /* 24054 */ MCD_OPC_Decode, 188, 2, 117, // Opcode: FABSv2f64 /* 24058 */ MCD_OPC_FilterValue, 3, 195, 64, // Skip to: 40641 /* 24062 */ MCD_OPC_CheckPredicate, 0, 191, 64, // Skip to: 40641 /* 24066 */ MCD_OPC_Decode, 132, 5, 117, // Opcode: FNEGv2f64 /* 24070 */ MCD_OPC_FilterValue, 33, 183, 64, // Skip to: 40641 /* 24074 */ MCD_OPC_CheckPredicate, 0, 179, 64, // Skip to: 40641 /* 24078 */ MCD_OPC_CheckField, 29, 3, 3, 173, 64, // Skip to: 40641 /* 24084 */ MCD_OPC_Decode, 200, 5, 117, // Opcode: FSQRTv2f64 /* 24088 */ MCD_OPC_FilterValue, 63, 165, 64, // Skip to: 40641 /* 24092 */ MCD_OPC_CheckPredicate, 0, 161, 64, // Skip to: 40641 /* 24096 */ MCD_OPC_CheckField, 29, 3, 2, 155, 64, // Skip to: 40641 /* 24102 */ MCD_OPC_CheckField, 21, 1, 1, 149, 64, // Skip to: 40641 /* 24108 */ MCD_OPC_Decode, 195, 5, 112, // Opcode: FRSQRTSv2f64 /* 24112 */ MCD_OPC_FilterValue, 12, 165, 13, // Skip to: 27609 /* 24116 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 24119 */ MCD_OPC_FilterValue, 0, 66, 3, // Skip to: 24957 /* 24123 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 24126 */ MCD_OPC_FilterValue, 1, 171, 2, // Skip to: 24813 /* 24130 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 24133 */ MCD_OPC_FilterValue, 0, 91, 1, // Skip to: 24484 /* 24137 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 24140 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 24273 /* 24144 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24147 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 24240 /* 24151 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24154 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 24207 /* 24158 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 24161 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24174 /* 24165 */ MCD_OPC_CheckPredicate, 0, 88, 64, // Skip to: 40641 /* 24169 */ MCD_OPC_Decode, 205, 8, 145, 1, // Opcode: MOVIv2i32 /* 24174 */ MCD_OPC_FilterValue, 1, 79, 64, // Skip to: 40641 /* 24178 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 24181 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24194 /* 24185 */ MCD_OPC_CheckPredicate, 0, 68, 64, // Skip to: 40641 /* 24189 */ MCD_OPC_Decode, 154, 13, 146, 1, // Opcode: SSHRv8i8_shift /* 24194 */ MCD_OPC_FilterValue, 1, 59, 64, // Skip to: 40641 /* 24198 */ MCD_OPC_CheckPredicate, 0, 55, 64, // Skip to: 40641 /* 24202 */ MCD_OPC_Decode, 252, 12, 146, 1, // Opcode: SRSHRv8i8_shift /* 24207 */ MCD_OPC_FilterValue, 1, 46, 64, // Skip to: 40641 /* 24211 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 24214 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24227 /* 24218 */ MCD_OPC_CheckPredicate, 0, 35, 64, // Skip to: 40641 /* 24222 */ MCD_OPC_Decode, 151, 13, 147, 1, // Opcode: SSHRv4i16_shift /* 24227 */ MCD_OPC_FilterValue, 1, 26, 64, // Skip to: 40641 /* 24231 */ MCD_OPC_CheckPredicate, 0, 22, 64, // Skip to: 40641 /* 24235 */ MCD_OPC_Decode, 249, 12, 147, 1, // Opcode: SRSHRv4i16_shift /* 24240 */ MCD_OPC_FilterValue, 1, 13, 64, // Skip to: 40641 /* 24244 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 24247 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24260 /* 24251 */ MCD_OPC_CheckPredicate, 0, 2, 64, // Skip to: 40641 /* 24255 */ MCD_OPC_Decode, 149, 13, 148, 1, // Opcode: SSHRv2i32_shift /* 24260 */ MCD_OPC_FilterValue, 1, 249, 63, // Skip to: 40641 /* 24264 */ MCD_OPC_CheckPredicate, 0, 245, 63, // Skip to: 40641 /* 24268 */ MCD_OPC_Decode, 247, 12, 148, 1, // Opcode: SRSHRv2i32_shift /* 24273 */ MCD_OPC_FilterValue, 1, 236, 63, // Skip to: 40641 /* 24277 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24280 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 24425 /* 24284 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24287 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 24366 /* 24291 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 24294 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24307 /* 24298 */ MCD_OPC_CheckPredicate, 0, 211, 63, // Skip to: 40641 /* 24302 */ MCD_OPC_Decode, 142, 9, 149, 1, // Opcode: ORRv2i32 /* 24307 */ MCD_OPC_FilterValue, 1, 202, 63, // Skip to: 40641 /* 24311 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 24314 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24327 /* 24318 */ MCD_OPC_CheckPredicate, 0, 191, 63, // Skip to: 40641 /* 24322 */ MCD_OPC_Decode, 162, 13, 150, 1, // Opcode: SSRAv8i8_shift /* 24327 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 24340 /* 24331 */ MCD_OPC_CheckPredicate, 0, 178, 63, // Skip to: 40641 /* 24335 */ MCD_OPC_Decode, 132, 13, 150, 1, // Opcode: SRSRAv8i8_shift /* 24340 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 24353 /* 24344 */ MCD_OPC_CheckPredicate, 0, 165, 63, // Skip to: 40641 /* 24348 */ MCD_OPC_Decode, 183, 10, 151, 1, // Opcode: SHLv8i8_shift /* 24353 */ MCD_OPC_FilterValue, 3, 156, 63, // Skip to: 40641 /* 24357 */ MCD_OPC_CheckPredicate, 0, 152, 63, // Skip to: 40641 /* 24361 */ MCD_OPC_Decode, 175, 12, 151, 1, // Opcode: SQSHLv8i8_shift /* 24366 */ MCD_OPC_FilterValue, 1, 143, 63, // Skip to: 40641 /* 24370 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 24373 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24386 /* 24377 */ MCD_OPC_CheckPredicate, 0, 132, 63, // Skip to: 40641 /* 24381 */ MCD_OPC_Decode, 159, 13, 152, 1, // Opcode: SSRAv4i16_shift /* 24386 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 24399 /* 24390 */ MCD_OPC_CheckPredicate, 0, 119, 63, // Skip to: 40641 /* 24394 */ MCD_OPC_Decode, 129, 13, 152, 1, // Opcode: SRSRAv4i16_shift /* 24399 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 24412 /* 24403 */ MCD_OPC_CheckPredicate, 0, 106, 63, // Skip to: 40641 /* 24407 */ MCD_OPC_Decode, 180, 10, 153, 1, // Opcode: SHLv4i16_shift /* 24412 */ MCD_OPC_FilterValue, 3, 97, 63, // Skip to: 40641 /* 24416 */ MCD_OPC_CheckPredicate, 0, 93, 63, // Skip to: 40641 /* 24420 */ MCD_OPC_Decode, 169, 12, 153, 1, // Opcode: SQSHLv4i16_shift /* 24425 */ MCD_OPC_FilterValue, 1, 84, 63, // Skip to: 40641 /* 24429 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 24432 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24445 /* 24436 */ MCD_OPC_CheckPredicate, 0, 73, 63, // Skip to: 40641 /* 24440 */ MCD_OPC_Decode, 157, 13, 154, 1, // Opcode: SSRAv2i32_shift /* 24445 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 24458 /* 24449 */ MCD_OPC_CheckPredicate, 0, 60, 63, // Skip to: 40641 /* 24453 */ MCD_OPC_Decode, 255, 12, 154, 1, // Opcode: SRSRAv2i32_shift /* 24458 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 24471 /* 24462 */ MCD_OPC_CheckPredicate, 0, 47, 63, // Skip to: 40641 /* 24466 */ MCD_OPC_Decode, 178, 10, 155, 1, // Opcode: SHLv2i32_shift /* 24471 */ MCD_OPC_FilterValue, 3, 38, 63, // Skip to: 40641 /* 24475 */ MCD_OPC_CheckPredicate, 0, 34, 63, // Skip to: 40641 /* 24479 */ MCD_OPC_Decode, 165, 12, 155, 1, // Opcode: SQSHLv2i32_shift /* 24484 */ MCD_OPC_FilterValue, 1, 25, 63, // Skip to: 40641 /* 24488 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ... /* 24491 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 24722 /* 24495 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 24498 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 24631 /* 24502 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24505 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 24598 /* 24509 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24512 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 24565 /* 24516 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 24519 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24532 /* 24523 */ MCD_OPC_CheckPredicate, 0, 242, 62, // Skip to: 40641 /* 24527 */ MCD_OPC_Decode, 207, 8, 145, 1, // Opcode: MOVIv4i16 /* 24532 */ MCD_OPC_FilterValue, 1, 233, 62, // Skip to: 40641 /* 24536 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 24539 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24552 /* 24543 */ MCD_OPC_CheckPredicate, 0, 222, 62, // Skip to: 40641 /* 24547 */ MCD_OPC_Decode, 189, 10, 156, 1, // Opcode: SHRNv8i8_shift /* 24552 */ MCD_OPC_FilterValue, 1, 213, 62, // Skip to: 40641 /* 24556 */ MCD_OPC_CheckPredicate, 0, 209, 62, // Skip to: 40641 /* 24560 */ MCD_OPC_Decode, 138, 13, 157, 1, // Opcode: SSHLLv8i8_shift /* 24565 */ MCD_OPC_FilterValue, 1, 200, 62, // Skip to: 40641 /* 24569 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 24572 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24585 /* 24576 */ MCD_OPC_CheckPredicate, 0, 189, 62, // Skip to: 40641 /* 24580 */ MCD_OPC_Decode, 186, 10, 158, 1, // Opcode: SHRNv4i16_shift /* 24585 */ MCD_OPC_FilterValue, 1, 180, 62, // Skip to: 40641 /* 24589 */ MCD_OPC_CheckPredicate, 0, 176, 62, // Skip to: 40641 /* 24593 */ MCD_OPC_Decode, 135, 13, 159, 1, // Opcode: SSHLLv4i16_shift /* 24598 */ MCD_OPC_FilterValue, 1, 167, 62, // Skip to: 40641 /* 24602 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 24605 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24618 /* 24609 */ MCD_OPC_CheckPredicate, 0, 156, 62, // Skip to: 40641 /* 24613 */ MCD_OPC_Decode, 185, 10, 160, 1, // Opcode: SHRNv2i32_shift /* 24618 */ MCD_OPC_FilterValue, 1, 147, 62, // Skip to: 40641 /* 24622 */ MCD_OPC_CheckPredicate, 0, 143, 62, // Skip to: 40641 /* 24626 */ MCD_OPC_Decode, 134, 13, 161, 1, // Opcode: SSHLLv2i32_shift /* 24631 */ MCD_OPC_FilterValue, 1, 134, 62, // Skip to: 40641 /* 24635 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24638 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 24703 /* 24642 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24645 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24684 /* 24649 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 24652 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24665 /* 24656 */ MCD_OPC_CheckPredicate, 0, 109, 62, // Skip to: 40641 /* 24660 */ MCD_OPC_Decode, 143, 9, 149, 1, // Opcode: ORRv4i16 /* 24665 */ MCD_OPC_FilterValue, 1, 100, 62, // Skip to: 40641 /* 24669 */ MCD_OPC_CheckPredicate, 0, 96, 62, // Skip to: 40641 /* 24673 */ MCD_OPC_CheckField, 13, 1, 0, 90, 62, // Skip to: 40641 /* 24679 */ MCD_OPC_Decode, 184, 12, 156, 1, // Opcode: SQSHRNv8i8_shift /* 24684 */ MCD_OPC_FilterValue, 1, 81, 62, // Skip to: 40641 /* 24688 */ MCD_OPC_CheckPredicate, 0, 77, 62, // Skip to: 40641 /* 24692 */ MCD_OPC_CheckField, 13, 1, 0, 71, 62, // Skip to: 40641 /* 24698 */ MCD_OPC_Decode, 181, 12, 158, 1, // Opcode: SQSHRNv4i16_shift /* 24703 */ MCD_OPC_FilterValue, 1, 62, 62, // Skip to: 40641 /* 24707 */ MCD_OPC_CheckPredicate, 0, 58, 62, // Skip to: 40641 /* 24711 */ MCD_OPC_CheckField, 13, 1, 0, 52, 62, // Skip to: 40641 /* 24717 */ MCD_OPC_Decode, 180, 12, 160, 1, // Opcode: SQSHRNv2i32_shift /* 24722 */ MCD_OPC_FilterValue, 1, 43, 62, // Skip to: 40641 /* 24726 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 24729 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24748 /* 24733 */ MCD_OPC_CheckPredicate, 0, 32, 62, // Skip to: 40641 /* 24737 */ MCD_OPC_CheckField, 19, 3, 0, 26, 62, // Skip to: 40641 /* 24743 */ MCD_OPC_Decode, 206, 8, 145, 1, // Opcode: MOVIv2s_msl /* 24748 */ MCD_OPC_FilterValue, 1, 17, 62, // Skip to: 40641 /* 24752 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 24755 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24794 /* 24759 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24762 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24781 /* 24766 */ MCD_OPC_CheckPredicate, 0, 255, 61, // Skip to: 40641 /* 24770 */ MCD_OPC_CheckField, 19, 2, 0, 249, 61, // Skip to: 40641 /* 24776 */ MCD_OPC_Decode, 210, 8, 145, 1, // Opcode: MOVIv8b_ns /* 24781 */ MCD_OPC_FilterValue, 1, 240, 61, // Skip to: 40641 /* 24785 */ MCD_OPC_CheckPredicate, 0, 236, 61, // Skip to: 40641 /* 24789 */ MCD_OPC_Decode, 146, 10, 148, 1, // Opcode: SCVTFv2i32_shift /* 24794 */ MCD_OPC_FilterValue, 1, 227, 61, // Skip to: 40641 /* 24798 */ MCD_OPC_CheckPredicate, 0, 223, 61, // Skip to: 40641 /* 24802 */ MCD_OPC_CheckField, 19, 3, 0, 217, 61, // Skip to: 40641 /* 24808 */ MCD_OPC_Decode, 232, 4, 145, 1, // Opcode: FMOVv2f32_ns /* 24813 */ MCD_OPC_FilterValue, 3, 208, 61, // Skip to: 40641 /* 24817 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 24820 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 24879 /* 24824 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24827 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24866 /* 24831 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24834 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24853 /* 24838 */ MCD_OPC_CheckPredicate, 0, 183, 61, // Skip to: 40641 /* 24842 */ MCD_OPC_CheckField, 19, 1, 1, 177, 61, // Skip to: 40641 /* 24848 */ MCD_OPC_Decode, 194, 9, 156, 1, // Opcode: RSHRNv8i8_shift /* 24853 */ MCD_OPC_FilterValue, 1, 168, 61, // Skip to: 40641 /* 24857 */ MCD_OPC_CheckPredicate, 0, 164, 61, // Skip to: 40641 /* 24861 */ MCD_OPC_Decode, 191, 9, 158, 1, // Opcode: RSHRNv4i16_shift /* 24866 */ MCD_OPC_FilterValue, 1, 155, 61, // Skip to: 40641 /* 24870 */ MCD_OPC_CheckPredicate, 0, 151, 61, // Skip to: 40641 /* 24874 */ MCD_OPC_Decode, 190, 9, 160, 1, // Opcode: RSHRNv2i32_shift /* 24879 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 24938 /* 24883 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24886 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24925 /* 24890 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24893 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24912 /* 24897 */ MCD_OPC_CheckPredicate, 0, 124, 61, // Skip to: 40641 /* 24901 */ MCD_OPC_CheckField, 19, 1, 1, 118, 61, // Skip to: 40641 /* 24907 */ MCD_OPC_Decode, 133, 12, 156, 1, // Opcode: SQRSHRNv8i8_shift /* 24912 */ MCD_OPC_FilterValue, 1, 109, 61, // Skip to: 40641 /* 24916 */ MCD_OPC_CheckPredicate, 0, 105, 61, // Skip to: 40641 /* 24920 */ MCD_OPC_Decode, 130, 12, 158, 1, // Opcode: SQRSHRNv4i16_shift /* 24925 */ MCD_OPC_FilterValue, 1, 96, 61, // Skip to: 40641 /* 24929 */ MCD_OPC_CheckPredicate, 0, 92, 61, // Skip to: 40641 /* 24933 */ MCD_OPC_Decode, 129, 12, 160, 1, // Opcode: SQRSHRNv2i32_shift /* 24938 */ MCD_OPC_FilterValue, 15, 83, 61, // Skip to: 40641 /* 24942 */ MCD_OPC_CheckPredicate, 0, 79, 61, // Skip to: 40641 /* 24946 */ MCD_OPC_CheckField, 21, 1, 1, 73, 61, // Skip to: 40641 /* 24952 */ MCD_OPC_Decode, 250, 3, 148, 1, // Opcode: FCVTZSv2i32_shift /* 24957 */ MCD_OPC_FilterValue, 1, 128, 3, // Skip to: 25857 /* 24961 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 24964 */ MCD_OPC_FilterValue, 1, 233, 2, // Skip to: 25713 /* 24968 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 24971 */ MCD_OPC_FilterValue, 0, 168, 1, // Skip to: 25399 /* 24975 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 24978 */ MCD_OPC_FilterValue, 0, 207, 0, // Skip to: 25189 /* 24982 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 24985 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 25130 /* 24989 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 24992 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 25071 /* 24996 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 24999 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25012 /* 25003 */ MCD_OPC_CheckPredicate, 0, 18, 61, // Skip to: 40641 /* 25007 */ MCD_OPC_Decode, 241, 8, 145, 1, // Opcode: MVNIv2i32 /* 25012 */ MCD_OPC_FilterValue, 1, 9, 61, // Skip to: 40641 /* 25016 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25019 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25032 /* 25023 */ MCD_OPC_CheckPredicate, 0, 254, 60, // Skip to: 40641 /* 25027 */ MCD_OPC_Decode, 148, 18, 146, 1, // Opcode: USHRv8i8_shift /* 25032 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25045 /* 25036 */ MCD_OPC_CheckPredicate, 0, 241, 60, // Skip to: 40641 /* 25040 */ MCD_OPC_Decode, 244, 17, 146, 1, // Opcode: URSHRv8i8_shift /* 25045 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25058 /* 25049 */ MCD_OPC_CheckPredicate, 0, 228, 60, // Skip to: 40641 /* 25053 */ MCD_OPC_Decode, 236, 12, 150, 1, // Opcode: SRIv8i8_shift /* 25058 */ MCD_OPC_FilterValue, 3, 219, 60, // Skip to: 40641 /* 25062 */ MCD_OPC_CheckPredicate, 0, 215, 60, // Skip to: 40641 /* 25066 */ MCD_OPC_Decode, 153, 12, 151, 1, // Opcode: SQSHLUv8i8_shift /* 25071 */ MCD_OPC_FilterValue, 1, 206, 60, // Skip to: 40641 /* 25075 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25078 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25091 /* 25082 */ MCD_OPC_CheckPredicate, 0, 195, 60, // Skip to: 40641 /* 25086 */ MCD_OPC_Decode, 145, 18, 147, 1, // Opcode: USHRv4i16_shift /* 25091 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25104 /* 25095 */ MCD_OPC_CheckPredicate, 0, 182, 60, // Skip to: 40641 /* 25099 */ MCD_OPC_Decode, 241, 17, 147, 1, // Opcode: URSHRv4i16_shift /* 25104 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25117 /* 25108 */ MCD_OPC_CheckPredicate, 0, 169, 60, // Skip to: 40641 /* 25112 */ MCD_OPC_Decode, 233, 12, 152, 1, // Opcode: SRIv4i16_shift /* 25117 */ MCD_OPC_FilterValue, 3, 160, 60, // Skip to: 40641 /* 25121 */ MCD_OPC_CheckPredicate, 0, 156, 60, // Skip to: 40641 /* 25125 */ MCD_OPC_Decode, 150, 12, 153, 1, // Opcode: SQSHLUv4i16_shift /* 25130 */ MCD_OPC_FilterValue, 1, 147, 60, // Skip to: 40641 /* 25134 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25137 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25150 /* 25141 */ MCD_OPC_CheckPredicate, 0, 136, 60, // Skip to: 40641 /* 25145 */ MCD_OPC_Decode, 143, 18, 148, 1, // Opcode: USHRv2i32_shift /* 25150 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25163 /* 25154 */ MCD_OPC_CheckPredicate, 0, 123, 60, // Skip to: 40641 /* 25158 */ MCD_OPC_Decode, 239, 17, 148, 1, // Opcode: URSHRv2i32_shift /* 25163 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25176 /* 25167 */ MCD_OPC_CheckPredicate, 0, 110, 60, // Skip to: 40641 /* 25171 */ MCD_OPC_Decode, 231, 12, 154, 1, // Opcode: SRIv2i32_shift /* 25176 */ MCD_OPC_FilterValue, 3, 101, 60, // Skip to: 40641 /* 25180 */ MCD_OPC_CheckPredicate, 0, 97, 60, // Skip to: 40641 /* 25184 */ MCD_OPC_Decode, 148, 12, 155, 1, // Opcode: SQSHLUv2i32_shift /* 25189 */ MCD_OPC_FilterValue, 1, 88, 60, // Skip to: 40641 /* 25193 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25196 */ MCD_OPC_FilterValue, 0, 140, 0, // Skip to: 25340 /* 25200 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 25203 */ MCD_OPC_FilterValue, 0, 74, 0, // Skip to: 25281 /* 25207 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 25210 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 25222 /* 25214 */ MCD_OPC_CheckPredicate, 0, 63, 60, // Skip to: 40641 /* 25218 */ MCD_OPC_Decode, 115, 149, 1, // Opcode: BICv2i32 /* 25222 */ MCD_OPC_FilterValue, 1, 55, 60, // Skip to: 40641 /* 25226 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25229 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25242 /* 25233 */ MCD_OPC_CheckPredicate, 0, 44, 60, // Skip to: 40641 /* 25237 */ MCD_OPC_Decode, 167, 18, 150, 1, // Opcode: USRAv8i8_shift /* 25242 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25255 /* 25246 */ MCD_OPC_CheckPredicate, 0, 31, 60, // Skip to: 40641 /* 25250 */ MCD_OPC_Decode, 254, 17, 150, 1, // Opcode: URSRAv8i8_shift /* 25255 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25268 /* 25259 */ MCD_OPC_CheckPredicate, 0, 18, 60, // Skip to: 40641 /* 25263 */ MCD_OPC_Decode, 203, 10, 162, 1, // Opcode: SLIv8i8_shift /* 25268 */ MCD_OPC_FilterValue, 3, 9, 60, // Skip to: 40641 /* 25272 */ MCD_OPC_CheckPredicate, 0, 5, 60, // Skip to: 40641 /* 25276 */ MCD_OPC_Decode, 191, 17, 151, 1, // Opcode: UQSHLv8i8_shift /* 25281 */ MCD_OPC_FilterValue, 1, 252, 59, // Skip to: 40641 /* 25285 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25288 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25301 /* 25292 */ MCD_OPC_CheckPredicate, 0, 241, 59, // Skip to: 40641 /* 25296 */ MCD_OPC_Decode, 164, 18, 152, 1, // Opcode: USRAv4i16_shift /* 25301 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25314 /* 25305 */ MCD_OPC_CheckPredicate, 0, 228, 59, // Skip to: 40641 /* 25309 */ MCD_OPC_Decode, 251, 17, 152, 1, // Opcode: URSRAv4i16_shift /* 25314 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25327 /* 25318 */ MCD_OPC_CheckPredicate, 0, 215, 59, // Skip to: 40641 /* 25322 */ MCD_OPC_Decode, 200, 10, 163, 1, // Opcode: SLIv4i16_shift /* 25327 */ MCD_OPC_FilterValue, 3, 206, 59, // Skip to: 40641 /* 25331 */ MCD_OPC_CheckPredicate, 0, 202, 59, // Skip to: 40641 /* 25335 */ MCD_OPC_Decode, 185, 17, 153, 1, // Opcode: UQSHLv4i16_shift /* 25340 */ MCD_OPC_FilterValue, 1, 193, 59, // Skip to: 40641 /* 25344 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25347 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25360 /* 25351 */ MCD_OPC_CheckPredicate, 0, 182, 59, // Skip to: 40641 /* 25355 */ MCD_OPC_Decode, 162, 18, 154, 1, // Opcode: USRAv2i32_shift /* 25360 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25373 /* 25364 */ MCD_OPC_CheckPredicate, 0, 169, 59, // Skip to: 40641 /* 25368 */ MCD_OPC_Decode, 249, 17, 154, 1, // Opcode: URSRAv2i32_shift /* 25373 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25386 /* 25377 */ MCD_OPC_CheckPredicate, 0, 156, 59, // Skip to: 40641 /* 25381 */ MCD_OPC_Decode, 198, 10, 164, 1, // Opcode: SLIv2i32_shift /* 25386 */ MCD_OPC_FilterValue, 3, 147, 59, // Skip to: 40641 /* 25390 */ MCD_OPC_CheckPredicate, 0, 143, 59, // Skip to: 40641 /* 25394 */ MCD_OPC_Decode, 181, 17, 155, 1, // Opcode: UQSHLv2i32_shift /* 25399 */ MCD_OPC_FilterValue, 1, 134, 59, // Skip to: 40641 /* 25403 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ... /* 25406 */ MCD_OPC_FilterValue, 0, 226, 0, // Skip to: 25636 /* 25410 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 25413 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 25546 /* 25417 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25420 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 25513 /* 25424 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 25427 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 25480 /* 25431 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 25434 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25447 /* 25438 */ MCD_OPC_CheckPredicate, 0, 95, 59, // Skip to: 40641 /* 25442 */ MCD_OPC_Decode, 243, 8, 145, 1, // Opcode: MVNIv4i16 /* 25447 */ MCD_OPC_FilterValue, 1, 86, 59, // Skip to: 40641 /* 25451 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 25454 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25467 /* 25458 */ MCD_OPC_CheckPredicate, 0, 75, 59, // Skip to: 40641 /* 25462 */ MCD_OPC_Decode, 193, 12, 156, 1, // Opcode: SQSHRUNv8i8_shift /* 25467 */ MCD_OPC_FilterValue, 1, 66, 59, // Skip to: 40641 /* 25471 */ MCD_OPC_CheckPredicate, 0, 62, 59, // Skip to: 40641 /* 25475 */ MCD_OPC_Decode, 132, 18, 157, 1, // Opcode: USHLLv8i8_shift /* 25480 */ MCD_OPC_FilterValue, 1, 53, 59, // Skip to: 40641 /* 25484 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 25487 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25500 /* 25491 */ MCD_OPC_CheckPredicate, 0, 42, 59, // Skip to: 40641 /* 25495 */ MCD_OPC_Decode, 190, 12, 158, 1, // Opcode: SQSHRUNv4i16_shift /* 25500 */ MCD_OPC_FilterValue, 1, 33, 59, // Skip to: 40641 /* 25504 */ MCD_OPC_CheckPredicate, 0, 29, 59, // Skip to: 40641 /* 25508 */ MCD_OPC_Decode, 129, 18, 159, 1, // Opcode: USHLLv4i16_shift /* 25513 */ MCD_OPC_FilterValue, 1, 20, 59, // Skip to: 40641 /* 25517 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 25520 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25533 /* 25524 */ MCD_OPC_CheckPredicate, 0, 9, 59, // Skip to: 40641 /* 25528 */ MCD_OPC_Decode, 189, 12, 160, 1, // Opcode: SQSHRUNv2i32_shift /* 25533 */ MCD_OPC_FilterValue, 1, 0, 59, // Skip to: 40641 /* 25537 */ MCD_OPC_CheckPredicate, 0, 252, 58, // Skip to: 40641 /* 25541 */ MCD_OPC_Decode, 128, 18, 161, 1, // Opcode: USHLLv2i32_shift /* 25546 */ MCD_OPC_FilterValue, 1, 243, 58, // Skip to: 40641 /* 25550 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25553 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 25617 /* 25557 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 25560 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 25598 /* 25564 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 25567 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 25579 /* 25571 */ MCD_OPC_CheckPredicate, 0, 218, 58, // Skip to: 40641 /* 25575 */ MCD_OPC_Decode, 116, 149, 1, // Opcode: BICv4i16 /* 25579 */ MCD_OPC_FilterValue, 1, 210, 58, // Skip to: 40641 /* 25583 */ MCD_OPC_CheckPredicate, 0, 206, 58, // Skip to: 40641 /* 25587 */ MCD_OPC_CheckField, 13, 1, 0, 200, 58, // Skip to: 40641 /* 25593 */ MCD_OPC_Decode, 200, 17, 156, 1, // Opcode: UQSHRNv8i8_shift /* 25598 */ MCD_OPC_FilterValue, 1, 191, 58, // Skip to: 40641 /* 25602 */ MCD_OPC_CheckPredicate, 0, 187, 58, // Skip to: 40641 /* 25606 */ MCD_OPC_CheckField, 13, 1, 0, 181, 58, // Skip to: 40641 /* 25612 */ MCD_OPC_Decode, 197, 17, 158, 1, // Opcode: UQSHRNv4i16_shift /* 25617 */ MCD_OPC_FilterValue, 1, 172, 58, // Skip to: 40641 /* 25621 */ MCD_OPC_CheckPredicate, 0, 168, 58, // Skip to: 40641 /* 25625 */ MCD_OPC_CheckField, 13, 1, 0, 162, 58, // Skip to: 40641 /* 25631 */ MCD_OPC_Decode, 196, 17, 160, 1, // Opcode: UQSHRNv2i32_shift /* 25636 */ MCD_OPC_FilterValue, 1, 153, 58, // Skip to: 40641 /* 25640 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 25643 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 25662 /* 25647 */ MCD_OPC_CheckPredicate, 0, 142, 58, // Skip to: 40641 /* 25651 */ MCD_OPC_CheckField, 19, 3, 0, 136, 58, // Skip to: 40641 /* 25657 */ MCD_OPC_Decode, 242, 8, 145, 1, // Opcode: MVNIv2s_msl /* 25662 */ MCD_OPC_FilterValue, 1, 127, 58, // Skip to: 40641 /* 25666 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25669 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 25694 /* 25673 */ MCD_OPC_CheckPredicate, 0, 116, 58, // Skip to: 40641 /* 25677 */ MCD_OPC_CheckField, 19, 2, 0, 110, 58, // Skip to: 40641 /* 25683 */ MCD_OPC_CheckField, 12, 1, 0, 104, 58, // Skip to: 40641 /* 25689 */ MCD_OPC_Decode, 202, 8, 145, 1, // Opcode: MOVID /* 25694 */ MCD_OPC_FilterValue, 1, 95, 58, // Skip to: 40641 /* 25698 */ MCD_OPC_CheckPredicate, 0, 91, 58, // Skip to: 40641 /* 25702 */ MCD_OPC_CheckField, 12, 1, 0, 85, 58, // Skip to: 40641 /* 25708 */ MCD_OPC_Decode, 176, 16, 148, 1, // Opcode: UCVTFv2i32_shift /* 25713 */ MCD_OPC_FilterValue, 3, 76, 58, // Skip to: 40641 /* 25717 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 25720 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 25779 /* 25724 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25727 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 25766 /* 25731 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 25734 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 25753 /* 25738 */ MCD_OPC_CheckPredicate, 0, 51, 58, // Skip to: 40641 /* 25742 */ MCD_OPC_CheckField, 19, 1, 1, 45, 58, // Skip to: 40641 /* 25748 */ MCD_OPC_Decode, 142, 12, 156, 1, // Opcode: SQRSHRUNv8i8_shift /* 25753 */ MCD_OPC_FilterValue, 1, 36, 58, // Skip to: 40641 /* 25757 */ MCD_OPC_CheckPredicate, 0, 32, 58, // Skip to: 40641 /* 25761 */ MCD_OPC_Decode, 139, 12, 158, 1, // Opcode: SQRSHRUNv4i16_shift /* 25766 */ MCD_OPC_FilterValue, 1, 23, 58, // Skip to: 40641 /* 25770 */ MCD_OPC_CheckPredicate, 0, 19, 58, // Skip to: 40641 /* 25774 */ MCD_OPC_Decode, 138, 12, 160, 1, // Opcode: SQRSHRUNv2i32_shift /* 25779 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 25838 /* 25783 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25786 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 25825 /* 25790 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 25793 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 25812 /* 25797 */ MCD_OPC_CheckPredicate, 0, 248, 57, // Skip to: 40641 /* 25801 */ MCD_OPC_CheckField, 19, 1, 1, 242, 57, // Skip to: 40641 /* 25807 */ MCD_OPC_Decode, 169, 17, 156, 1, // Opcode: UQRSHRNv8i8_shift /* 25812 */ MCD_OPC_FilterValue, 1, 233, 57, // Skip to: 40641 /* 25816 */ MCD_OPC_CheckPredicate, 0, 229, 57, // Skip to: 40641 /* 25820 */ MCD_OPC_Decode, 166, 17, 158, 1, // Opcode: UQRSHRNv4i16_shift /* 25825 */ MCD_OPC_FilterValue, 1, 220, 57, // Skip to: 40641 /* 25829 */ MCD_OPC_CheckPredicate, 0, 216, 57, // Skip to: 40641 /* 25833 */ MCD_OPC_Decode, 165, 17, 160, 1, // Opcode: UQRSHRNv2i32_shift /* 25838 */ MCD_OPC_FilterValue, 15, 207, 57, // Skip to: 40641 /* 25842 */ MCD_OPC_CheckPredicate, 0, 203, 57, // Skip to: 40641 /* 25846 */ MCD_OPC_CheckField, 21, 1, 1, 197, 57, // Skip to: 40641 /* 25852 */ MCD_OPC_Decode, 151, 4, 148, 1, // Opcode: FCVTZUv2i32_shift /* 25857 */ MCD_OPC_FilterValue, 2, 66, 3, // Skip to: 26695 /* 25861 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 25864 */ MCD_OPC_FilterValue, 1, 171, 2, // Skip to: 26551 /* 25868 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 25871 */ MCD_OPC_FilterValue, 0, 91, 1, // Skip to: 26222 /* 25875 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 25878 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 26011 /* 25882 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 25885 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 25978 /* 25889 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 25892 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 25945 /* 25896 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 25899 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25912 /* 25903 */ MCD_OPC_CheckPredicate, 0, 142, 57, // Skip to: 40641 /* 25907 */ MCD_OPC_Decode, 208, 8, 145, 1, // Opcode: MOVIv4i32 /* 25912 */ MCD_OPC_FilterValue, 1, 133, 57, // Skip to: 40641 /* 25916 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25919 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25932 /* 25923 */ MCD_OPC_CheckPredicate, 0, 122, 57, // Skip to: 40641 /* 25927 */ MCD_OPC_Decode, 148, 13, 165, 1, // Opcode: SSHRv16i8_shift /* 25932 */ MCD_OPC_FilterValue, 1, 113, 57, // Skip to: 40641 /* 25936 */ MCD_OPC_CheckPredicate, 0, 109, 57, // Skip to: 40641 /* 25940 */ MCD_OPC_Decode, 246, 12, 165, 1, // Opcode: SRSHRv16i8_shift /* 25945 */ MCD_OPC_FilterValue, 1, 100, 57, // Skip to: 40641 /* 25949 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25952 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25965 /* 25956 */ MCD_OPC_CheckPredicate, 0, 89, 57, // Skip to: 40641 /* 25960 */ MCD_OPC_Decode, 153, 13, 166, 1, // Opcode: SSHRv8i16_shift /* 25965 */ MCD_OPC_FilterValue, 1, 80, 57, // Skip to: 40641 /* 25969 */ MCD_OPC_CheckPredicate, 0, 76, 57, // Skip to: 40641 /* 25973 */ MCD_OPC_Decode, 251, 12, 166, 1, // Opcode: SRSHRv8i16_shift /* 25978 */ MCD_OPC_FilterValue, 1, 67, 57, // Skip to: 40641 /* 25982 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 25985 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25998 /* 25989 */ MCD_OPC_CheckPredicate, 0, 56, 57, // Skip to: 40641 /* 25993 */ MCD_OPC_Decode, 152, 13, 167, 1, // Opcode: SSHRv4i32_shift /* 25998 */ MCD_OPC_FilterValue, 1, 47, 57, // Skip to: 40641 /* 26002 */ MCD_OPC_CheckPredicate, 0, 43, 57, // Skip to: 40641 /* 26006 */ MCD_OPC_Decode, 250, 12, 167, 1, // Opcode: SRSHRv4i32_shift /* 26011 */ MCD_OPC_FilterValue, 1, 34, 57, // Skip to: 40641 /* 26015 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26018 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 26163 /* 26022 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26025 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 26104 /* 26029 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 26032 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26045 /* 26036 */ MCD_OPC_CheckPredicate, 0, 9, 57, // Skip to: 40641 /* 26040 */ MCD_OPC_Decode, 144, 9, 149, 1, // Opcode: ORRv4i32 /* 26045 */ MCD_OPC_FilterValue, 1, 0, 57, // Skip to: 40641 /* 26049 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26052 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26065 /* 26056 */ MCD_OPC_CheckPredicate, 0, 245, 56, // Skip to: 40641 /* 26060 */ MCD_OPC_Decode, 156, 13, 168, 1, // Opcode: SSRAv16i8_shift /* 26065 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26078 /* 26069 */ MCD_OPC_CheckPredicate, 0, 232, 56, // Skip to: 40641 /* 26073 */ MCD_OPC_Decode, 254, 12, 168, 1, // Opcode: SRSRAv16i8_shift /* 26078 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26091 /* 26082 */ MCD_OPC_CheckPredicate, 0, 219, 56, // Skip to: 40641 /* 26086 */ MCD_OPC_Decode, 177, 10, 169, 1, // Opcode: SHLv16i8_shift /* 26091 */ MCD_OPC_FilterValue, 3, 210, 56, // Skip to: 40641 /* 26095 */ MCD_OPC_CheckPredicate, 0, 206, 56, // Skip to: 40641 /* 26099 */ MCD_OPC_Decode, 159, 12, 169, 1, // Opcode: SQSHLv16i8_shift /* 26104 */ MCD_OPC_FilterValue, 1, 197, 56, // Skip to: 40641 /* 26108 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26111 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26124 /* 26115 */ MCD_OPC_CheckPredicate, 0, 186, 56, // Skip to: 40641 /* 26119 */ MCD_OPC_Decode, 161, 13, 170, 1, // Opcode: SSRAv8i16_shift /* 26124 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26137 /* 26128 */ MCD_OPC_CheckPredicate, 0, 173, 56, // Skip to: 40641 /* 26132 */ MCD_OPC_Decode, 131, 13, 170, 1, // Opcode: SRSRAv8i16_shift /* 26137 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26150 /* 26141 */ MCD_OPC_CheckPredicate, 0, 160, 56, // Skip to: 40641 /* 26145 */ MCD_OPC_Decode, 182, 10, 171, 1, // Opcode: SHLv8i16_shift /* 26150 */ MCD_OPC_FilterValue, 3, 151, 56, // Skip to: 40641 /* 26154 */ MCD_OPC_CheckPredicate, 0, 147, 56, // Skip to: 40641 /* 26158 */ MCD_OPC_Decode, 173, 12, 171, 1, // Opcode: SQSHLv8i16_shift /* 26163 */ MCD_OPC_FilterValue, 1, 138, 56, // Skip to: 40641 /* 26167 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26170 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26183 /* 26174 */ MCD_OPC_CheckPredicate, 0, 127, 56, // Skip to: 40641 /* 26178 */ MCD_OPC_Decode, 160, 13, 172, 1, // Opcode: SSRAv4i32_shift /* 26183 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26196 /* 26187 */ MCD_OPC_CheckPredicate, 0, 114, 56, // Skip to: 40641 /* 26191 */ MCD_OPC_Decode, 130, 13, 172, 1, // Opcode: SRSRAv4i32_shift /* 26196 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26209 /* 26200 */ MCD_OPC_CheckPredicate, 0, 101, 56, // Skip to: 40641 /* 26204 */ MCD_OPC_Decode, 181, 10, 173, 1, // Opcode: SHLv4i32_shift /* 26209 */ MCD_OPC_FilterValue, 3, 92, 56, // Skip to: 40641 /* 26213 */ MCD_OPC_CheckPredicate, 0, 88, 56, // Skip to: 40641 /* 26217 */ MCD_OPC_Decode, 171, 12, 173, 1, // Opcode: SQSHLv4i32_shift /* 26222 */ MCD_OPC_FilterValue, 1, 79, 56, // Skip to: 40641 /* 26226 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ... /* 26229 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 26460 /* 26233 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 26236 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 26369 /* 26240 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26243 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 26336 /* 26247 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26250 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 26303 /* 26254 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 26257 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26270 /* 26261 */ MCD_OPC_CheckPredicate, 0, 40, 56, // Skip to: 40641 /* 26265 */ MCD_OPC_Decode, 211, 8, 145, 1, // Opcode: MOVIv8i16 /* 26270 */ MCD_OPC_FilterValue, 1, 31, 56, // Skip to: 40641 /* 26274 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 26277 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26290 /* 26281 */ MCD_OPC_CheckPredicate, 0, 20, 56, // Skip to: 40641 /* 26285 */ MCD_OPC_Decode, 184, 10, 174, 1, // Opcode: SHRNv16i8_shift /* 26290 */ MCD_OPC_FilterValue, 1, 11, 56, // Skip to: 40641 /* 26294 */ MCD_OPC_CheckPredicate, 0, 7, 56, // Skip to: 40641 /* 26298 */ MCD_OPC_Decode, 133, 13, 169, 1, // Opcode: SSHLLv16i8_shift /* 26303 */ MCD_OPC_FilterValue, 1, 254, 55, // Skip to: 40641 /* 26307 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 26310 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26323 /* 26314 */ MCD_OPC_CheckPredicate, 0, 243, 55, // Skip to: 40641 /* 26318 */ MCD_OPC_Decode, 188, 10, 175, 1, // Opcode: SHRNv8i16_shift /* 26323 */ MCD_OPC_FilterValue, 1, 234, 55, // Skip to: 40641 /* 26327 */ MCD_OPC_CheckPredicate, 0, 230, 55, // Skip to: 40641 /* 26331 */ MCD_OPC_Decode, 137, 13, 171, 1, // Opcode: SSHLLv8i16_shift /* 26336 */ MCD_OPC_FilterValue, 1, 221, 55, // Skip to: 40641 /* 26340 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 26343 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26356 /* 26347 */ MCD_OPC_CheckPredicate, 0, 210, 55, // Skip to: 40641 /* 26351 */ MCD_OPC_Decode, 187, 10, 176, 1, // Opcode: SHRNv4i32_shift /* 26356 */ MCD_OPC_FilterValue, 1, 201, 55, // Skip to: 40641 /* 26360 */ MCD_OPC_CheckPredicate, 0, 197, 55, // Skip to: 40641 /* 26364 */ MCD_OPC_Decode, 136, 13, 173, 1, // Opcode: SSHLLv4i32_shift /* 26369 */ MCD_OPC_FilterValue, 1, 188, 55, // Skip to: 40641 /* 26373 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26376 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 26441 /* 26380 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26383 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26422 /* 26387 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 26390 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26403 /* 26394 */ MCD_OPC_CheckPredicate, 0, 163, 55, // Skip to: 40641 /* 26398 */ MCD_OPC_Decode, 145, 9, 149, 1, // Opcode: ORRv8i16 /* 26403 */ MCD_OPC_FilterValue, 1, 154, 55, // Skip to: 40641 /* 26407 */ MCD_OPC_CheckPredicate, 0, 150, 55, // Skip to: 40641 /* 26411 */ MCD_OPC_CheckField, 13, 1, 0, 144, 55, // Skip to: 40641 /* 26417 */ MCD_OPC_Decode, 179, 12, 174, 1, // Opcode: SQSHRNv16i8_shift /* 26422 */ MCD_OPC_FilterValue, 1, 135, 55, // Skip to: 40641 /* 26426 */ MCD_OPC_CheckPredicate, 0, 131, 55, // Skip to: 40641 /* 26430 */ MCD_OPC_CheckField, 13, 1, 0, 125, 55, // Skip to: 40641 /* 26436 */ MCD_OPC_Decode, 183, 12, 175, 1, // Opcode: SQSHRNv8i16_shift /* 26441 */ MCD_OPC_FilterValue, 1, 116, 55, // Skip to: 40641 /* 26445 */ MCD_OPC_CheckPredicate, 0, 112, 55, // Skip to: 40641 /* 26449 */ MCD_OPC_CheckField, 13, 1, 0, 106, 55, // Skip to: 40641 /* 26455 */ MCD_OPC_Decode, 182, 12, 176, 1, // Opcode: SQSHRNv4i32_shift /* 26460 */ MCD_OPC_FilterValue, 1, 97, 55, // Skip to: 40641 /* 26464 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 26467 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26486 /* 26471 */ MCD_OPC_CheckPredicate, 0, 86, 55, // Skip to: 40641 /* 26475 */ MCD_OPC_CheckField, 19, 3, 0, 80, 55, // Skip to: 40641 /* 26481 */ MCD_OPC_Decode, 209, 8, 145, 1, // Opcode: MOVIv4s_msl /* 26486 */ MCD_OPC_FilterValue, 1, 71, 55, // Skip to: 40641 /* 26490 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 26493 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26532 /* 26497 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26500 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26519 /* 26504 */ MCD_OPC_CheckPredicate, 0, 53, 55, // Skip to: 40641 /* 26508 */ MCD_OPC_CheckField, 19, 2, 0, 47, 55, // Skip to: 40641 /* 26514 */ MCD_OPC_Decode, 203, 8, 145, 1, // Opcode: MOVIv16b_ns /* 26519 */ MCD_OPC_FilterValue, 1, 38, 55, // Skip to: 40641 /* 26523 */ MCD_OPC_CheckPredicate, 0, 34, 55, // Skip to: 40641 /* 26527 */ MCD_OPC_Decode, 149, 10, 167, 1, // Opcode: SCVTFv4i32_shift /* 26532 */ MCD_OPC_FilterValue, 1, 25, 55, // Skip to: 40641 /* 26536 */ MCD_OPC_CheckPredicate, 0, 21, 55, // Skip to: 40641 /* 26540 */ MCD_OPC_CheckField, 19, 3, 0, 15, 55, // Skip to: 40641 /* 26546 */ MCD_OPC_Decode, 234, 4, 145, 1, // Opcode: FMOVv4f32_ns /* 26551 */ MCD_OPC_FilterValue, 3, 6, 55, // Skip to: 40641 /* 26555 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 26558 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 26617 /* 26562 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26565 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26604 /* 26569 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26572 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26591 /* 26576 */ MCD_OPC_CheckPredicate, 0, 237, 54, // Skip to: 40641 /* 26580 */ MCD_OPC_CheckField, 19, 1, 1, 231, 54, // Skip to: 40641 /* 26586 */ MCD_OPC_Decode, 189, 9, 174, 1, // Opcode: RSHRNv16i8_shift /* 26591 */ MCD_OPC_FilterValue, 1, 222, 54, // Skip to: 40641 /* 26595 */ MCD_OPC_CheckPredicate, 0, 218, 54, // Skip to: 40641 /* 26599 */ MCD_OPC_Decode, 193, 9, 175, 1, // Opcode: RSHRNv8i16_shift /* 26604 */ MCD_OPC_FilterValue, 1, 209, 54, // Skip to: 40641 /* 26608 */ MCD_OPC_CheckPredicate, 0, 205, 54, // Skip to: 40641 /* 26612 */ MCD_OPC_Decode, 192, 9, 176, 1, // Opcode: RSHRNv4i32_shift /* 26617 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 26676 /* 26621 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26624 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26663 /* 26628 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26631 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26650 /* 26635 */ MCD_OPC_CheckPredicate, 0, 178, 54, // Skip to: 40641 /* 26639 */ MCD_OPC_CheckField, 19, 1, 1, 172, 54, // Skip to: 40641 /* 26645 */ MCD_OPC_Decode, 128, 12, 174, 1, // Opcode: SQRSHRNv16i8_shift /* 26650 */ MCD_OPC_FilterValue, 1, 163, 54, // Skip to: 40641 /* 26654 */ MCD_OPC_CheckPredicate, 0, 159, 54, // Skip to: 40641 /* 26658 */ MCD_OPC_Decode, 132, 12, 175, 1, // Opcode: SQRSHRNv8i16_shift /* 26663 */ MCD_OPC_FilterValue, 1, 150, 54, // Skip to: 40641 /* 26667 */ MCD_OPC_CheckPredicate, 0, 146, 54, // Skip to: 40641 /* 26671 */ MCD_OPC_Decode, 131, 12, 176, 1, // Opcode: SQRSHRNv4i32_shift /* 26676 */ MCD_OPC_FilterValue, 15, 137, 54, // Skip to: 40641 /* 26680 */ MCD_OPC_CheckPredicate, 0, 133, 54, // Skip to: 40641 /* 26684 */ MCD_OPC_CheckField, 21, 1, 1, 127, 54, // Skip to: 40641 /* 26690 */ MCD_OPC_Decode, 253, 3, 167, 1, // Opcode: FCVTZSv4i32_shift /* 26695 */ MCD_OPC_FilterValue, 3, 118, 54, // Skip to: 40641 /* 26699 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 26702 */ MCD_OPC_FilterValue, 1, 247, 2, // Skip to: 27465 /* 26706 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 26709 */ MCD_OPC_FilterValue, 0, 168, 1, // Skip to: 27137 /* 26713 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 26716 */ MCD_OPC_FilterValue, 0, 207, 0, // Skip to: 26927 /* 26720 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26723 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 26868 /* 26727 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26730 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 26809 /* 26734 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 26737 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26750 /* 26741 */ MCD_OPC_CheckPredicate, 0, 72, 54, // Skip to: 40641 /* 26745 */ MCD_OPC_Decode, 244, 8, 145, 1, // Opcode: MVNIv4i32 /* 26750 */ MCD_OPC_FilterValue, 1, 63, 54, // Skip to: 40641 /* 26754 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26757 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26770 /* 26761 */ MCD_OPC_CheckPredicate, 0, 52, 54, // Skip to: 40641 /* 26765 */ MCD_OPC_Decode, 142, 18, 165, 1, // Opcode: USHRv16i8_shift /* 26770 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26783 /* 26774 */ MCD_OPC_CheckPredicate, 0, 39, 54, // Skip to: 40641 /* 26778 */ MCD_OPC_Decode, 238, 17, 165, 1, // Opcode: URSHRv16i8_shift /* 26783 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26796 /* 26787 */ MCD_OPC_CheckPredicate, 0, 26, 54, // Skip to: 40641 /* 26791 */ MCD_OPC_Decode, 230, 12, 168, 1, // Opcode: SRIv16i8_shift /* 26796 */ MCD_OPC_FilterValue, 3, 17, 54, // Skip to: 40641 /* 26800 */ MCD_OPC_CheckPredicate, 0, 13, 54, // Skip to: 40641 /* 26804 */ MCD_OPC_Decode, 147, 12, 169, 1, // Opcode: SQSHLUv16i8_shift /* 26809 */ MCD_OPC_FilterValue, 1, 4, 54, // Skip to: 40641 /* 26813 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26816 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26829 /* 26820 */ MCD_OPC_CheckPredicate, 0, 249, 53, // Skip to: 40641 /* 26824 */ MCD_OPC_Decode, 147, 18, 166, 1, // Opcode: USHRv8i16_shift /* 26829 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26842 /* 26833 */ MCD_OPC_CheckPredicate, 0, 236, 53, // Skip to: 40641 /* 26837 */ MCD_OPC_Decode, 243, 17, 166, 1, // Opcode: URSHRv8i16_shift /* 26842 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26855 /* 26846 */ MCD_OPC_CheckPredicate, 0, 223, 53, // Skip to: 40641 /* 26850 */ MCD_OPC_Decode, 235, 12, 170, 1, // Opcode: SRIv8i16_shift /* 26855 */ MCD_OPC_FilterValue, 3, 214, 53, // Skip to: 40641 /* 26859 */ MCD_OPC_CheckPredicate, 0, 210, 53, // Skip to: 40641 /* 26863 */ MCD_OPC_Decode, 152, 12, 171, 1, // Opcode: SQSHLUv8i16_shift /* 26868 */ MCD_OPC_FilterValue, 1, 201, 53, // Skip to: 40641 /* 26872 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26875 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26888 /* 26879 */ MCD_OPC_CheckPredicate, 0, 190, 53, // Skip to: 40641 /* 26883 */ MCD_OPC_Decode, 146, 18, 167, 1, // Opcode: USHRv4i32_shift /* 26888 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26901 /* 26892 */ MCD_OPC_CheckPredicate, 0, 177, 53, // Skip to: 40641 /* 26896 */ MCD_OPC_Decode, 242, 17, 167, 1, // Opcode: URSHRv4i32_shift /* 26901 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26914 /* 26905 */ MCD_OPC_CheckPredicate, 0, 164, 53, // Skip to: 40641 /* 26909 */ MCD_OPC_Decode, 234, 12, 172, 1, // Opcode: SRIv4i32_shift /* 26914 */ MCD_OPC_FilterValue, 3, 155, 53, // Skip to: 40641 /* 26918 */ MCD_OPC_CheckPredicate, 0, 151, 53, // Skip to: 40641 /* 26922 */ MCD_OPC_Decode, 151, 12, 173, 1, // Opcode: SQSHLUv4i32_shift /* 26927 */ MCD_OPC_FilterValue, 1, 142, 53, // Skip to: 40641 /* 26931 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 26934 */ MCD_OPC_FilterValue, 0, 140, 0, // Skip to: 27078 /* 26938 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 26941 */ MCD_OPC_FilterValue, 0, 74, 0, // Skip to: 27019 /* 26945 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 26948 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 26960 /* 26952 */ MCD_OPC_CheckPredicate, 0, 117, 53, // Skip to: 40641 /* 26956 */ MCD_OPC_Decode, 117, 149, 1, // Opcode: BICv4i32 /* 26960 */ MCD_OPC_FilterValue, 1, 109, 53, // Skip to: 40641 /* 26964 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 26967 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26980 /* 26971 */ MCD_OPC_CheckPredicate, 0, 98, 53, // Skip to: 40641 /* 26975 */ MCD_OPC_Decode, 161, 18, 168, 1, // Opcode: USRAv16i8_shift /* 26980 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26993 /* 26984 */ MCD_OPC_CheckPredicate, 0, 85, 53, // Skip to: 40641 /* 26988 */ MCD_OPC_Decode, 248, 17, 168, 1, // Opcode: URSRAv16i8_shift /* 26993 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 27006 /* 26997 */ MCD_OPC_CheckPredicate, 0, 72, 53, // Skip to: 40641 /* 27001 */ MCD_OPC_Decode, 197, 10, 177, 1, // Opcode: SLIv16i8_shift /* 27006 */ MCD_OPC_FilterValue, 3, 63, 53, // Skip to: 40641 /* 27010 */ MCD_OPC_CheckPredicate, 0, 59, 53, // Skip to: 40641 /* 27014 */ MCD_OPC_Decode, 175, 17, 169, 1, // Opcode: UQSHLv16i8_shift /* 27019 */ MCD_OPC_FilterValue, 1, 50, 53, // Skip to: 40641 /* 27023 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 27026 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27039 /* 27030 */ MCD_OPC_CheckPredicate, 0, 39, 53, // Skip to: 40641 /* 27034 */ MCD_OPC_Decode, 166, 18, 170, 1, // Opcode: USRAv8i16_shift /* 27039 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 27052 /* 27043 */ MCD_OPC_CheckPredicate, 0, 26, 53, // Skip to: 40641 /* 27047 */ MCD_OPC_Decode, 253, 17, 170, 1, // Opcode: URSRAv8i16_shift /* 27052 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 27065 /* 27056 */ MCD_OPC_CheckPredicate, 0, 13, 53, // Skip to: 40641 /* 27060 */ MCD_OPC_Decode, 202, 10, 178, 1, // Opcode: SLIv8i16_shift /* 27065 */ MCD_OPC_FilterValue, 3, 4, 53, // Skip to: 40641 /* 27069 */ MCD_OPC_CheckPredicate, 0, 0, 53, // Skip to: 40641 /* 27073 */ MCD_OPC_Decode, 189, 17, 171, 1, // Opcode: UQSHLv8i16_shift /* 27078 */ MCD_OPC_FilterValue, 1, 247, 52, // Skip to: 40641 /* 27082 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 27085 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27098 /* 27089 */ MCD_OPC_CheckPredicate, 0, 236, 52, // Skip to: 40641 /* 27093 */ MCD_OPC_Decode, 165, 18, 172, 1, // Opcode: USRAv4i32_shift /* 27098 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 27111 /* 27102 */ MCD_OPC_CheckPredicate, 0, 223, 52, // Skip to: 40641 /* 27106 */ MCD_OPC_Decode, 252, 17, 172, 1, // Opcode: URSRAv4i32_shift /* 27111 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 27124 /* 27115 */ MCD_OPC_CheckPredicate, 0, 210, 52, // Skip to: 40641 /* 27119 */ MCD_OPC_Decode, 201, 10, 179, 1, // Opcode: SLIv4i32_shift /* 27124 */ MCD_OPC_FilterValue, 3, 201, 52, // Skip to: 40641 /* 27128 */ MCD_OPC_CheckPredicate, 0, 197, 52, // Skip to: 40641 /* 27132 */ MCD_OPC_Decode, 187, 17, 173, 1, // Opcode: UQSHLv4i32_shift /* 27137 */ MCD_OPC_FilterValue, 1, 188, 52, // Skip to: 40641 /* 27141 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ... /* 27144 */ MCD_OPC_FilterValue, 0, 226, 0, // Skip to: 27374 /* 27148 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 27151 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 27284 /* 27155 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 27158 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 27251 /* 27162 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 27165 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 27218 /* 27169 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 27172 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27185 /* 27176 */ MCD_OPC_CheckPredicate, 0, 149, 52, // Skip to: 40641 /* 27180 */ MCD_OPC_Decode, 246, 8, 145, 1, // Opcode: MVNIv8i16 /* 27185 */ MCD_OPC_FilterValue, 1, 140, 52, // Skip to: 40641 /* 27189 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 27192 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27205 /* 27196 */ MCD_OPC_CheckPredicate, 0, 129, 52, // Skip to: 40641 /* 27200 */ MCD_OPC_Decode, 188, 12, 174, 1, // Opcode: SQSHRUNv16i8_shift /* 27205 */ MCD_OPC_FilterValue, 1, 120, 52, // Skip to: 40641 /* 27209 */ MCD_OPC_CheckPredicate, 0, 116, 52, // Skip to: 40641 /* 27213 */ MCD_OPC_Decode, 255, 17, 169, 1, // Opcode: USHLLv16i8_shift /* 27218 */ MCD_OPC_FilterValue, 1, 107, 52, // Skip to: 40641 /* 27222 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 27225 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27238 /* 27229 */ MCD_OPC_CheckPredicate, 0, 96, 52, // Skip to: 40641 /* 27233 */ MCD_OPC_Decode, 192, 12, 175, 1, // Opcode: SQSHRUNv8i16_shift /* 27238 */ MCD_OPC_FilterValue, 1, 87, 52, // Skip to: 40641 /* 27242 */ MCD_OPC_CheckPredicate, 0, 83, 52, // Skip to: 40641 /* 27246 */ MCD_OPC_Decode, 131, 18, 171, 1, // Opcode: USHLLv8i16_shift /* 27251 */ MCD_OPC_FilterValue, 1, 74, 52, // Skip to: 40641 /* 27255 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 27258 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27271 /* 27262 */ MCD_OPC_CheckPredicate, 0, 63, 52, // Skip to: 40641 /* 27266 */ MCD_OPC_Decode, 191, 12, 176, 1, // Opcode: SQSHRUNv4i32_shift /* 27271 */ MCD_OPC_FilterValue, 1, 54, 52, // Skip to: 40641 /* 27275 */ MCD_OPC_CheckPredicate, 0, 50, 52, // Skip to: 40641 /* 27279 */ MCD_OPC_Decode, 130, 18, 173, 1, // Opcode: USHLLv4i32_shift /* 27284 */ MCD_OPC_FilterValue, 1, 41, 52, // Skip to: 40641 /* 27288 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 27291 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 27355 /* 27295 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 27298 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 27336 /* 27302 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 27305 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 27317 /* 27309 */ MCD_OPC_CheckPredicate, 0, 16, 52, // Skip to: 40641 /* 27313 */ MCD_OPC_Decode, 118, 149, 1, // Opcode: BICv8i16 /* 27317 */ MCD_OPC_FilterValue, 1, 8, 52, // Skip to: 40641 /* 27321 */ MCD_OPC_CheckPredicate, 0, 4, 52, // Skip to: 40641 /* 27325 */ MCD_OPC_CheckField, 13, 1, 0, 254, 51, // Skip to: 40641 /* 27331 */ MCD_OPC_Decode, 195, 17, 174, 1, // Opcode: UQSHRNv16i8_shift /* 27336 */ MCD_OPC_FilterValue, 1, 245, 51, // Skip to: 40641 /* 27340 */ MCD_OPC_CheckPredicate, 0, 241, 51, // Skip to: 40641 /* 27344 */ MCD_OPC_CheckField, 13, 1, 0, 235, 51, // Skip to: 40641 /* 27350 */ MCD_OPC_Decode, 199, 17, 175, 1, // Opcode: UQSHRNv8i16_shift /* 27355 */ MCD_OPC_FilterValue, 1, 226, 51, // Skip to: 40641 /* 27359 */ MCD_OPC_CheckPredicate, 0, 222, 51, // Skip to: 40641 /* 27363 */ MCD_OPC_CheckField, 13, 1, 0, 216, 51, // Skip to: 40641 /* 27369 */ MCD_OPC_Decode, 198, 17, 176, 1, // Opcode: UQSHRNv4i32_shift /* 27374 */ MCD_OPC_FilterValue, 1, 207, 51, // Skip to: 40641 /* 27378 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 27381 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27400 /* 27385 */ MCD_OPC_CheckPredicate, 0, 196, 51, // Skip to: 40641 /* 27389 */ MCD_OPC_CheckField, 19, 3, 0, 190, 51, // Skip to: 40641 /* 27395 */ MCD_OPC_Decode, 245, 8, 145, 1, // Opcode: MVNIv4s_msl /* 27400 */ MCD_OPC_FilterValue, 1, 181, 51, // Skip to: 40641 /* 27404 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 27407 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 27446 /* 27411 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 27414 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27433 /* 27418 */ MCD_OPC_CheckPredicate, 0, 163, 51, // Skip to: 40641 /* 27422 */ MCD_OPC_CheckField, 19, 2, 0, 157, 51, // Skip to: 40641 /* 27428 */ MCD_OPC_Decode, 204, 8, 145, 1, // Opcode: MOVIv2d_ns /* 27433 */ MCD_OPC_FilterValue, 1, 148, 51, // Skip to: 40641 /* 27437 */ MCD_OPC_CheckPredicate, 0, 144, 51, // Skip to: 40641 /* 27441 */ MCD_OPC_Decode, 179, 16, 167, 1, // Opcode: UCVTFv4i32_shift /* 27446 */ MCD_OPC_FilterValue, 1, 135, 51, // Skip to: 40641 /* 27450 */ MCD_OPC_CheckPredicate, 0, 131, 51, // Skip to: 40641 /* 27454 */ MCD_OPC_CheckField, 19, 3, 0, 125, 51, // Skip to: 40641 /* 27460 */ MCD_OPC_Decode, 233, 4, 145, 1, // Opcode: FMOVv2f64_ns /* 27465 */ MCD_OPC_FilterValue, 3, 116, 51, // Skip to: 40641 /* 27469 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 27472 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 27531 /* 27476 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 27479 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 27518 /* 27483 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 27486 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27505 /* 27490 */ MCD_OPC_CheckPredicate, 0, 91, 51, // Skip to: 40641 /* 27494 */ MCD_OPC_CheckField, 19, 1, 1, 85, 51, // Skip to: 40641 /* 27500 */ MCD_OPC_Decode, 137, 12, 174, 1, // Opcode: SQRSHRUNv16i8_shift /* 27505 */ MCD_OPC_FilterValue, 1, 76, 51, // Skip to: 40641 /* 27509 */ MCD_OPC_CheckPredicate, 0, 72, 51, // Skip to: 40641 /* 27513 */ MCD_OPC_Decode, 141, 12, 175, 1, // Opcode: SQRSHRUNv8i16_shift /* 27518 */ MCD_OPC_FilterValue, 1, 63, 51, // Skip to: 40641 /* 27522 */ MCD_OPC_CheckPredicate, 0, 59, 51, // Skip to: 40641 /* 27526 */ MCD_OPC_Decode, 140, 12, 176, 1, // Opcode: SQRSHRUNv4i32_shift /* 27531 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 27590 /* 27535 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 27538 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 27577 /* 27542 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 27545 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27564 /* 27549 */ MCD_OPC_CheckPredicate, 0, 32, 51, // Skip to: 40641 /* 27553 */ MCD_OPC_CheckField, 19, 1, 1, 26, 51, // Skip to: 40641 /* 27559 */ MCD_OPC_Decode, 164, 17, 174, 1, // Opcode: UQRSHRNv16i8_shift /* 27564 */ MCD_OPC_FilterValue, 1, 17, 51, // Skip to: 40641 /* 27568 */ MCD_OPC_CheckPredicate, 0, 13, 51, // Skip to: 40641 /* 27572 */ MCD_OPC_Decode, 168, 17, 175, 1, // Opcode: UQRSHRNv8i16_shift /* 27577 */ MCD_OPC_FilterValue, 1, 4, 51, // Skip to: 40641 /* 27581 */ MCD_OPC_CheckPredicate, 0, 0, 51, // Skip to: 40641 /* 27585 */ MCD_OPC_Decode, 167, 17, 176, 1, // Opcode: UQRSHRNv4i32_shift /* 27590 */ MCD_OPC_FilterValue, 15, 247, 50, // Skip to: 40641 /* 27594 */ MCD_OPC_CheckPredicate, 0, 243, 50, // Skip to: 40641 /* 27598 */ MCD_OPC_CheckField, 21, 1, 1, 237, 50, // Skip to: 40641 /* 27604 */ MCD_OPC_Decode, 154, 4, 167, 1, // Opcode: FCVTZUv4i32_shift /* 27609 */ MCD_OPC_FilterValue, 13, 221, 3, // Skip to: 28602 /* 27613 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 27616 */ MCD_OPC_FilterValue, 0, 80, 0, // Skip to: 27700 /* 27620 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 27623 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 27642 /* 27627 */ MCD_OPC_CheckPredicate, 0, 210, 50, // Skip to: 40641 /* 27631 */ MCD_OPC_CheckField, 10, 1, 0, 204, 50, // Skip to: 40641 /* 27637 */ MCD_OPC_Decode, 186, 8, 180, 1, // Opcode: MLAv4i16_indexed /* 27642 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 27661 /* 27646 */ MCD_OPC_CheckPredicate, 0, 191, 50, // Skip to: 40641 /* 27650 */ MCD_OPC_CheckField, 10, 2, 1, 185, 50, // Skip to: 40641 /* 27656 */ MCD_OPC_Decode, 150, 13, 181, 1, // Opcode: SSHRv2i64_shift /* 27661 */ MCD_OPC_FilterValue, 3, 176, 50, // Skip to: 40641 /* 27665 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 27668 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27681 /* 27672 */ MCD_OPC_CheckPredicate, 0, 165, 50, // Skip to: 40641 /* 27676 */ MCD_OPC_Decode, 190, 8, 182, 1, // Opcode: MLAv8i16_indexed /* 27681 */ MCD_OPC_FilterValue, 1, 156, 50, // Skip to: 40641 /* 27685 */ MCD_OPC_CheckPredicate, 0, 152, 50, // Skip to: 40641 /* 27689 */ MCD_OPC_CheckField, 11, 1, 0, 146, 50, // Skip to: 40641 /* 27695 */ MCD_OPC_Decode, 144, 18, 181, 1, // Opcode: USHRv2i64_shift /* 27700 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 27745 /* 27704 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 27707 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 27726 /* 27711 */ MCD_OPC_CheckPredicate, 0, 126, 50, // Skip to: 40641 /* 27715 */ MCD_OPC_CheckField, 10, 2, 1, 120, 50, // Skip to: 40641 /* 27721 */ MCD_OPC_Decode, 158, 13, 183, 1, // Opcode: SSRAv2i64_shift /* 27726 */ MCD_OPC_FilterValue, 3, 111, 50, // Skip to: 40641 /* 27730 */ MCD_OPC_CheckPredicate, 0, 107, 50, // Skip to: 40641 /* 27734 */ MCD_OPC_CheckField, 10, 2, 1, 101, 50, // Skip to: 40641 /* 27740 */ MCD_OPC_Decode, 163, 18, 183, 1, // Opcode: USRAv2i64_shift /* 27745 */ MCD_OPC_FilterValue, 2, 119, 0, // Skip to: 27868 /* 27749 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 27752 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27771 /* 27756 */ MCD_OPC_CheckPredicate, 0, 81, 50, // Skip to: 40641 /* 27760 */ MCD_OPC_CheckField, 10, 1, 0, 75, 50, // Skip to: 40641 /* 27766 */ MCD_OPC_Decode, 243, 10, 184, 1, // Opcode: SMLALv4i16_indexed /* 27771 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 27790 /* 27775 */ MCD_OPC_CheckPredicate, 0, 62, 50, // Skip to: 40641 /* 27779 */ MCD_OPC_CheckField, 10, 1, 0, 56, 50, // Skip to: 40641 /* 27785 */ MCD_OPC_Decode, 234, 16, 184, 1, // Opcode: UMLALv4i16_indexed /* 27790 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 27829 /* 27794 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 27797 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27810 /* 27801 */ MCD_OPC_CheckPredicate, 0, 36, 50, // Skip to: 40641 /* 27805 */ MCD_OPC_Decode, 247, 10, 182, 1, // Opcode: SMLALv8i16_indexed /* 27810 */ MCD_OPC_FilterValue, 1, 27, 50, // Skip to: 40641 /* 27814 */ MCD_OPC_CheckPredicate, 0, 23, 50, // Skip to: 40641 /* 27818 */ MCD_OPC_CheckField, 11, 1, 0, 17, 50, // Skip to: 40641 /* 27824 */ MCD_OPC_Decode, 248, 12, 181, 1, // Opcode: SRSHRv2i64_shift /* 27829 */ MCD_OPC_FilterValue, 3, 8, 50, // Skip to: 40641 /* 27833 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 27836 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27849 /* 27840 */ MCD_OPC_CheckPredicate, 0, 253, 49, // Skip to: 40641 /* 27844 */ MCD_OPC_Decode, 238, 16, 182, 1, // Opcode: UMLALv8i16_indexed /* 27849 */ MCD_OPC_FilterValue, 1, 244, 49, // Skip to: 40641 /* 27853 */ MCD_OPC_CheckPredicate, 0, 240, 49, // Skip to: 40641 /* 27857 */ MCD_OPC_CheckField, 11, 1, 0, 234, 49, // Skip to: 40641 /* 27863 */ MCD_OPC_Decode, 240, 17, 181, 1, // Opcode: URSHRv2i64_shift /* 27868 */ MCD_OPC_FilterValue, 3, 80, 0, // Skip to: 27952 /* 27872 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 27875 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27894 /* 27879 */ MCD_OPC_CheckPredicate, 0, 214, 49, // Skip to: 40641 /* 27883 */ MCD_OPC_CheckField, 10, 1, 0, 208, 49, // Skip to: 40641 /* 27889 */ MCD_OPC_Decode, 177, 11, 184, 1, // Opcode: SQDMLALv4i16_indexed /* 27894 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 27933 /* 27898 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 27901 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27914 /* 27905 */ MCD_OPC_CheckPredicate, 0, 188, 49, // Skip to: 40641 /* 27909 */ MCD_OPC_Decode, 181, 11, 182, 1, // Opcode: SQDMLALv8i16_indexed /* 27914 */ MCD_OPC_FilterValue, 1, 179, 49, // Skip to: 40641 /* 27918 */ MCD_OPC_CheckPredicate, 0, 175, 49, // Skip to: 40641 /* 27922 */ MCD_OPC_CheckField, 11, 1, 0, 169, 49, // Skip to: 40641 /* 27928 */ MCD_OPC_Decode, 128, 13, 183, 1, // Opcode: SRSRAv2i64_shift /* 27933 */ MCD_OPC_FilterValue, 3, 160, 49, // Skip to: 40641 /* 27937 */ MCD_OPC_CheckPredicate, 0, 156, 49, // Skip to: 40641 /* 27941 */ MCD_OPC_CheckField, 10, 2, 1, 150, 49, // Skip to: 40641 /* 27947 */ MCD_OPC_Decode, 250, 17, 183, 1, // Opcode: URSRAv2i64_shift /* 27952 */ MCD_OPC_FilterValue, 4, 61, 0, // Skip to: 28017 /* 27956 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 27959 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 27992 /* 27963 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 27966 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 27979 /* 27970 */ MCD_OPC_CheckPredicate, 0, 123, 49, // Skip to: 40641 /* 27974 */ MCD_OPC_Decode, 196, 8, 180, 1, // Opcode: MLSv4i16_indexed /* 27979 */ MCD_OPC_FilterValue, 3, 114, 49, // Skip to: 40641 /* 27983 */ MCD_OPC_CheckPredicate, 0, 110, 49, // Skip to: 40641 /* 27987 */ MCD_OPC_Decode, 200, 8, 182, 1, // Opcode: MLSv8i16_indexed /* 27992 */ MCD_OPC_FilterValue, 1, 101, 49, // Skip to: 40641 /* 27996 */ MCD_OPC_CheckPredicate, 0, 97, 49, // Skip to: 40641 /* 28000 */ MCD_OPC_CheckField, 29, 3, 3, 91, 49, // Skip to: 40641 /* 28006 */ MCD_OPC_CheckField, 11, 1, 0, 85, 49, // Skip to: 40641 /* 28012 */ MCD_OPC_Decode, 232, 12, 183, 1, // Opcode: SRIv2i64_shift /* 28017 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 28062 /* 28021 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28024 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28043 /* 28028 */ MCD_OPC_CheckPredicate, 0, 65, 49, // Skip to: 40641 /* 28032 */ MCD_OPC_CheckField, 10, 2, 1, 59, 49, // Skip to: 40641 /* 28038 */ MCD_OPC_Decode, 179, 10, 185, 1, // Opcode: SHLv2i64_shift /* 28043 */ MCD_OPC_FilterValue, 3, 50, 49, // Skip to: 40641 /* 28047 */ MCD_OPC_CheckPredicate, 0, 46, 49, // Skip to: 40641 /* 28051 */ MCD_OPC_CheckField, 10, 2, 1, 40, 49, // Skip to: 40641 /* 28057 */ MCD_OPC_Decode, 199, 10, 186, 1, // Opcode: SLIv2i64_shift /* 28062 */ MCD_OPC_FilterValue, 6, 99, 0, // Skip to: 28165 /* 28066 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28069 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28088 /* 28073 */ MCD_OPC_CheckPredicate, 0, 20, 49, // Skip to: 40641 /* 28077 */ MCD_OPC_CheckField, 10, 1, 0, 14, 49, // Skip to: 40641 /* 28083 */ MCD_OPC_Decode, 253, 10, 184, 1, // Opcode: SMLSLv4i16_indexed /* 28088 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28107 /* 28092 */ MCD_OPC_CheckPredicate, 0, 1, 49, // Skip to: 40641 /* 28096 */ MCD_OPC_CheckField, 10, 1, 0, 251, 48, // Skip to: 40641 /* 28102 */ MCD_OPC_Decode, 244, 16, 184, 1, // Opcode: UMLSLv4i16_indexed /* 28107 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28126 /* 28111 */ MCD_OPC_CheckPredicate, 0, 238, 48, // Skip to: 40641 /* 28115 */ MCD_OPC_CheckField, 10, 1, 0, 232, 48, // Skip to: 40641 /* 28121 */ MCD_OPC_Decode, 129, 11, 182, 1, // Opcode: SMLSLv8i16_indexed /* 28126 */ MCD_OPC_FilterValue, 3, 223, 48, // Skip to: 40641 /* 28130 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 28133 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28146 /* 28137 */ MCD_OPC_CheckPredicate, 0, 212, 48, // Skip to: 40641 /* 28141 */ MCD_OPC_Decode, 248, 16, 182, 1, // Opcode: UMLSLv8i16_indexed /* 28146 */ MCD_OPC_FilterValue, 1, 203, 48, // Skip to: 40641 /* 28150 */ MCD_OPC_CheckPredicate, 0, 199, 48, // Skip to: 40641 /* 28154 */ MCD_OPC_CheckField, 11, 1, 0, 193, 48, // Skip to: 40641 /* 28160 */ MCD_OPC_Decode, 149, 12, 185, 1, // Opcode: SQSHLUv2i64_shift /* 28165 */ MCD_OPC_FilterValue, 7, 80, 0, // Skip to: 28249 /* 28169 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28172 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28191 /* 28176 */ MCD_OPC_CheckPredicate, 0, 173, 48, // Skip to: 40641 /* 28180 */ MCD_OPC_CheckField, 10, 1, 0, 167, 48, // Skip to: 40641 /* 28186 */ MCD_OPC_Decode, 189, 11, 184, 1, // Opcode: SQDMLSLv4i16_indexed /* 28191 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 28230 /* 28195 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 28198 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28211 /* 28202 */ MCD_OPC_CheckPredicate, 0, 147, 48, // Skip to: 40641 /* 28206 */ MCD_OPC_Decode, 193, 11, 182, 1, // Opcode: SQDMLSLv8i16_indexed /* 28211 */ MCD_OPC_FilterValue, 1, 138, 48, // Skip to: 40641 /* 28215 */ MCD_OPC_CheckPredicate, 0, 134, 48, // Skip to: 40641 /* 28219 */ MCD_OPC_CheckField, 11, 1, 0, 128, 48, // Skip to: 40641 /* 28225 */ MCD_OPC_Decode, 167, 12, 185, 1, // Opcode: SQSHLv2i64_shift /* 28230 */ MCD_OPC_FilterValue, 3, 119, 48, // Skip to: 40641 /* 28234 */ MCD_OPC_CheckPredicate, 0, 115, 48, // Skip to: 40641 /* 28238 */ MCD_OPC_CheckField, 10, 2, 1, 109, 48, // Skip to: 40641 /* 28244 */ MCD_OPC_Decode, 183, 17, 185, 1, // Opcode: UQSHLv2i64_shift /* 28249 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 28294 /* 28253 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28256 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28275 /* 28260 */ MCD_OPC_CheckPredicate, 0, 89, 48, // Skip to: 40641 /* 28264 */ MCD_OPC_CheckField, 10, 1, 0, 83, 48, // Skip to: 40641 /* 28270 */ MCD_OPC_Decode, 235, 8, 187, 1, // Opcode: MULv4i16_indexed /* 28275 */ MCD_OPC_FilterValue, 2, 74, 48, // Skip to: 40641 /* 28279 */ MCD_OPC_CheckPredicate, 0, 70, 48, // Skip to: 40641 /* 28283 */ MCD_OPC_CheckField, 10, 1, 0, 64, 48, // Skip to: 40641 /* 28289 */ MCD_OPC_Decode, 239, 8, 188, 1, // Opcode: MULv8i16_indexed /* 28294 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 28377 /* 28298 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28301 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28320 /* 28305 */ MCD_OPC_CheckPredicate, 0, 44, 48, // Skip to: 40641 /* 28309 */ MCD_OPC_CheckField, 10, 1, 0, 38, 48, // Skip to: 40641 /* 28315 */ MCD_OPC_Decode, 142, 11, 189, 1, // Opcode: SMULLv4i16_indexed /* 28320 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28339 /* 28324 */ MCD_OPC_CheckPredicate, 0, 25, 48, // Skip to: 40641 /* 28328 */ MCD_OPC_CheckField, 10, 1, 0, 19, 48, // Skip to: 40641 /* 28334 */ MCD_OPC_Decode, 132, 17, 189, 1, // Opcode: UMULLv4i16_indexed /* 28339 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28358 /* 28343 */ MCD_OPC_CheckPredicate, 0, 6, 48, // Skip to: 40641 /* 28347 */ MCD_OPC_CheckField, 10, 1, 0, 0, 48, // Skip to: 40641 /* 28353 */ MCD_OPC_Decode, 146, 11, 188, 1, // Opcode: SMULLv8i16_indexed /* 28358 */ MCD_OPC_FilterValue, 3, 247, 47, // Skip to: 40641 /* 28362 */ MCD_OPC_CheckPredicate, 0, 243, 47, // Skip to: 40641 /* 28366 */ MCD_OPC_CheckField, 10, 1, 0, 237, 47, // Skip to: 40641 /* 28372 */ MCD_OPC_Decode, 136, 17, 188, 1, // Opcode: UMULLv8i16_indexed /* 28377 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 28422 /* 28381 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28384 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28403 /* 28388 */ MCD_OPC_CheckPredicate, 0, 217, 47, // Skip to: 40641 /* 28392 */ MCD_OPC_CheckField, 10, 1, 0, 211, 47, // Skip to: 40641 /* 28398 */ MCD_OPC_Decode, 213, 11, 189, 1, // Opcode: SQDMULLv4i16_indexed /* 28403 */ MCD_OPC_FilterValue, 2, 202, 47, // Skip to: 40641 /* 28407 */ MCD_OPC_CheckPredicate, 0, 198, 47, // Skip to: 40641 /* 28411 */ MCD_OPC_CheckField, 10, 1, 0, 192, 47, // Skip to: 40641 /* 28417 */ MCD_OPC_Decode, 217, 11, 188, 1, // Opcode: SQDMULLv8i16_indexed /* 28422 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 28467 /* 28426 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28429 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28448 /* 28433 */ MCD_OPC_CheckPredicate, 0, 172, 47, // Skip to: 40641 /* 28437 */ MCD_OPC_CheckField, 10, 1, 0, 166, 47, // Skip to: 40641 /* 28443 */ MCD_OPC_Decode, 202, 11, 187, 1, // Opcode: SQDMULHv4i16_indexed /* 28448 */ MCD_OPC_FilterValue, 2, 157, 47, // Skip to: 40641 /* 28452 */ MCD_OPC_CheckPredicate, 0, 153, 47, // Skip to: 40641 /* 28456 */ MCD_OPC_CheckField, 10, 1, 0, 147, 47, // Skip to: 40641 /* 28462 */ MCD_OPC_Decode, 206, 11, 188, 1, // Opcode: SQDMULHv8i16_indexed /* 28467 */ MCD_OPC_FilterValue, 13, 41, 0, // Skip to: 28512 /* 28471 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28474 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28493 /* 28478 */ MCD_OPC_CheckPredicate, 0, 127, 47, // Skip to: 40641 /* 28482 */ MCD_OPC_CheckField, 10, 1, 0, 121, 47, // Skip to: 40641 /* 28488 */ MCD_OPC_Decode, 237, 11, 187, 1, // Opcode: SQRDMULHv4i16_indexed /* 28493 */ MCD_OPC_FilterValue, 2, 112, 47, // Skip to: 40641 /* 28497 */ MCD_OPC_CheckPredicate, 0, 108, 47, // Skip to: 40641 /* 28501 */ MCD_OPC_CheckField, 10, 1, 0, 102, 47, // Skip to: 40641 /* 28507 */ MCD_OPC_Decode, 241, 11, 188, 1, // Opcode: SQRDMULHv8i16_indexed /* 28512 */ MCD_OPC_FilterValue, 14, 41, 0, // Skip to: 28557 /* 28516 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28519 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28538 /* 28523 */ MCD_OPC_CheckPredicate, 0, 82, 47, // Skip to: 40641 /* 28527 */ MCD_OPC_CheckField, 10, 2, 1, 76, 47, // Skip to: 40641 /* 28533 */ MCD_OPC_Decode, 147, 10, 181, 1, // Opcode: SCVTFv2i64_shift /* 28538 */ MCD_OPC_FilterValue, 3, 67, 47, // Skip to: 40641 /* 28542 */ MCD_OPC_CheckPredicate, 0, 63, 47, // Skip to: 40641 /* 28546 */ MCD_OPC_CheckField, 10, 2, 1, 57, 47, // Skip to: 40641 /* 28552 */ MCD_OPC_Decode, 177, 16, 181, 1, // Opcode: UCVTFv2i64_shift /* 28557 */ MCD_OPC_FilterValue, 15, 48, 47, // Skip to: 40641 /* 28561 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28564 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28583 /* 28568 */ MCD_OPC_CheckPredicate, 0, 37, 47, // Skip to: 40641 /* 28572 */ MCD_OPC_CheckField, 10, 2, 3, 31, 47, // Skip to: 40641 /* 28578 */ MCD_OPC_Decode, 251, 3, 181, 1, // Opcode: FCVTZSv2i64_shift /* 28583 */ MCD_OPC_FilterValue, 3, 22, 47, // Skip to: 40641 /* 28587 */ MCD_OPC_CheckPredicate, 0, 18, 47, // Skip to: 40641 /* 28591 */ MCD_OPC_CheckField, 10, 2, 3, 12, 47, // Skip to: 40641 /* 28597 */ MCD_OPC_Decode, 152, 4, 181, 1, // Opcode: FCVTZUv2i64_shift /* 28602 */ MCD_OPC_FilterValue, 14, 17, 3, // Skip to: 29391 /* 28606 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 28609 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 28654 /* 28613 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28616 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28635 /* 28620 */ MCD_OPC_CheckPredicate, 0, 241, 46, // Skip to: 40641 /* 28624 */ MCD_OPC_CheckField, 10, 1, 0, 235, 46, // Skip to: 40641 /* 28630 */ MCD_OPC_Decode, 184, 8, 190, 1, // Opcode: MLAv2i32_indexed /* 28635 */ MCD_OPC_FilterValue, 3, 226, 46, // Skip to: 40641 /* 28639 */ MCD_OPC_CheckPredicate, 0, 222, 46, // Skip to: 40641 /* 28643 */ MCD_OPC_CheckField, 10, 1, 0, 216, 46, // Skip to: 40641 /* 28649 */ MCD_OPC_Decode, 188, 8, 191, 1, // Opcode: MLAv4i32_indexed /* 28654 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 28699 /* 28658 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28661 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28680 /* 28665 */ MCD_OPC_CheckPredicate, 0, 196, 46, // Skip to: 40641 /* 28669 */ MCD_OPC_CheckField, 10, 1, 0, 190, 46, // Skip to: 40641 /* 28675 */ MCD_OPC_Decode, 210, 4, 190, 1, // Opcode: FMLAv2i32_indexed /* 28680 */ MCD_OPC_FilterValue, 2, 181, 46, // Skip to: 40641 /* 28684 */ MCD_OPC_CheckPredicate, 0, 177, 46, // Skip to: 40641 /* 28688 */ MCD_OPC_CheckField, 10, 1, 0, 171, 46, // Skip to: 40641 /* 28694 */ MCD_OPC_Decode, 213, 4, 191, 1, // Opcode: FMLAv4i32_indexed /* 28699 */ MCD_OPC_FilterValue, 2, 79, 0, // Skip to: 28782 /* 28703 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28706 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28725 /* 28710 */ MCD_OPC_CheckPredicate, 0, 151, 46, // Skip to: 40641 /* 28714 */ MCD_OPC_CheckField, 10, 1, 0, 145, 46, // Skip to: 40641 /* 28720 */ MCD_OPC_Decode, 241, 10, 192, 1, // Opcode: SMLALv2i32_indexed /* 28725 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28744 /* 28729 */ MCD_OPC_CheckPredicate, 0, 132, 46, // Skip to: 40641 /* 28733 */ MCD_OPC_CheckField, 10, 1, 0, 126, 46, // Skip to: 40641 /* 28739 */ MCD_OPC_Decode, 232, 16, 192, 1, // Opcode: UMLALv2i32_indexed /* 28744 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28763 /* 28748 */ MCD_OPC_CheckPredicate, 0, 113, 46, // Skip to: 40641 /* 28752 */ MCD_OPC_CheckField, 10, 1, 0, 107, 46, // Skip to: 40641 /* 28758 */ MCD_OPC_Decode, 245, 10, 191, 1, // Opcode: SMLALv4i32_indexed /* 28763 */ MCD_OPC_FilterValue, 3, 98, 46, // Skip to: 40641 /* 28767 */ MCD_OPC_CheckPredicate, 0, 94, 46, // Skip to: 40641 /* 28771 */ MCD_OPC_CheckField, 10, 1, 0, 88, 46, // Skip to: 40641 /* 28777 */ MCD_OPC_Decode, 236, 16, 191, 1, // Opcode: UMLALv4i32_indexed /* 28782 */ MCD_OPC_FilterValue, 3, 41, 0, // Skip to: 28827 /* 28786 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28789 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28808 /* 28793 */ MCD_OPC_CheckPredicate, 0, 68, 46, // Skip to: 40641 /* 28797 */ MCD_OPC_CheckField, 10, 1, 0, 62, 46, // Skip to: 40641 /* 28803 */ MCD_OPC_Decode, 175, 11, 192, 1, // Opcode: SQDMLALv2i32_indexed /* 28808 */ MCD_OPC_FilterValue, 2, 53, 46, // Skip to: 40641 /* 28812 */ MCD_OPC_CheckPredicate, 0, 49, 46, // Skip to: 40641 /* 28816 */ MCD_OPC_CheckField, 10, 1, 0, 43, 46, // Skip to: 40641 /* 28822 */ MCD_OPC_Decode, 179, 11, 191, 1, // Opcode: SQDMLALv4i32_indexed /* 28827 */ MCD_OPC_FilterValue, 4, 41, 0, // Skip to: 28872 /* 28831 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28834 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28853 /* 28838 */ MCD_OPC_CheckPredicate, 0, 23, 46, // Skip to: 40641 /* 28842 */ MCD_OPC_CheckField, 10, 1, 0, 17, 46, // Skip to: 40641 /* 28848 */ MCD_OPC_Decode, 194, 8, 190, 1, // Opcode: MLSv2i32_indexed /* 28853 */ MCD_OPC_FilterValue, 3, 8, 46, // Skip to: 40641 /* 28857 */ MCD_OPC_CheckPredicate, 0, 4, 46, // Skip to: 40641 /* 28861 */ MCD_OPC_CheckField, 10, 1, 0, 254, 45, // Skip to: 40641 /* 28867 */ MCD_OPC_Decode, 198, 8, 191, 1, // Opcode: MLSv4i32_indexed /* 28872 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 28917 /* 28876 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28879 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28898 /* 28883 */ MCD_OPC_CheckPredicate, 0, 234, 45, // Skip to: 40641 /* 28887 */ MCD_OPC_CheckField, 10, 1, 0, 228, 45, // Skip to: 40641 /* 28893 */ MCD_OPC_Decode, 218, 4, 190, 1, // Opcode: FMLSv2i32_indexed /* 28898 */ MCD_OPC_FilterValue, 2, 219, 45, // Skip to: 40641 /* 28902 */ MCD_OPC_CheckPredicate, 0, 215, 45, // Skip to: 40641 /* 28906 */ MCD_OPC_CheckField, 10, 1, 0, 209, 45, // Skip to: 40641 /* 28912 */ MCD_OPC_Decode, 221, 4, 191, 1, // Opcode: FMLSv4i32_indexed /* 28917 */ MCD_OPC_FilterValue, 6, 79, 0, // Skip to: 29000 /* 28921 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 28924 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28943 /* 28928 */ MCD_OPC_CheckPredicate, 0, 189, 45, // Skip to: 40641 /* 28932 */ MCD_OPC_CheckField, 10, 1, 0, 183, 45, // Skip to: 40641 /* 28938 */ MCD_OPC_Decode, 251, 10, 192, 1, // Opcode: SMLSLv2i32_indexed /* 28943 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28962 /* 28947 */ MCD_OPC_CheckPredicate, 0, 170, 45, // Skip to: 40641 /* 28951 */ MCD_OPC_CheckField, 10, 1, 0, 164, 45, // Skip to: 40641 /* 28957 */ MCD_OPC_Decode, 242, 16, 192, 1, // Opcode: UMLSLv2i32_indexed /* 28962 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28981 /* 28966 */ MCD_OPC_CheckPredicate, 0, 151, 45, // Skip to: 40641 /* 28970 */ MCD_OPC_CheckField, 10, 1, 0, 145, 45, // Skip to: 40641 /* 28976 */ MCD_OPC_Decode, 255, 10, 191, 1, // Opcode: SMLSLv4i32_indexed /* 28981 */ MCD_OPC_FilterValue, 3, 136, 45, // Skip to: 40641 /* 28985 */ MCD_OPC_CheckPredicate, 0, 132, 45, // Skip to: 40641 /* 28989 */ MCD_OPC_CheckField, 10, 1, 0, 126, 45, // Skip to: 40641 /* 28995 */ MCD_OPC_Decode, 246, 16, 191, 1, // Opcode: UMLSLv4i32_indexed /* 29000 */ MCD_OPC_FilterValue, 7, 41, 0, // Skip to: 29045 /* 29004 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29007 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29026 /* 29011 */ MCD_OPC_CheckPredicate, 0, 106, 45, // Skip to: 40641 /* 29015 */ MCD_OPC_CheckField, 10, 1, 0, 100, 45, // Skip to: 40641 /* 29021 */ MCD_OPC_Decode, 187, 11, 192, 1, // Opcode: SQDMLSLv2i32_indexed /* 29026 */ MCD_OPC_FilterValue, 2, 91, 45, // Skip to: 40641 /* 29030 */ MCD_OPC_CheckPredicate, 0, 87, 45, // Skip to: 40641 /* 29034 */ MCD_OPC_CheckField, 10, 1, 0, 81, 45, // Skip to: 40641 /* 29040 */ MCD_OPC_Decode, 191, 11, 191, 1, // Opcode: SQDMLSLv4i32_indexed /* 29045 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 29090 /* 29049 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29052 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29071 /* 29056 */ MCD_OPC_CheckPredicate, 0, 61, 45, // Skip to: 40641 /* 29060 */ MCD_OPC_CheckField, 10, 1, 0, 55, 45, // Skip to: 40641 /* 29066 */ MCD_OPC_Decode, 233, 8, 193, 1, // Opcode: MULv2i32_indexed /* 29071 */ MCD_OPC_FilterValue, 2, 46, 45, // Skip to: 40641 /* 29075 */ MCD_OPC_CheckPredicate, 0, 42, 45, // Skip to: 40641 /* 29079 */ MCD_OPC_CheckField, 10, 1, 0, 36, 45, // Skip to: 40641 /* 29085 */ MCD_OPC_Decode, 237, 8, 194, 1, // Opcode: MULv4i32_indexed /* 29090 */ MCD_OPC_FilterValue, 9, 79, 0, // Skip to: 29173 /* 29094 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29097 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29116 /* 29101 */ MCD_OPC_CheckPredicate, 0, 16, 45, // Skip to: 40641 /* 29105 */ MCD_OPC_CheckField, 10, 1, 0, 10, 45, // Skip to: 40641 /* 29111 */ MCD_OPC_Decode, 253, 4, 193, 1, // Opcode: FMULv2i32_indexed /* 29116 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 29135 /* 29120 */ MCD_OPC_CheckPredicate, 0, 253, 44, // Skip to: 40641 /* 29124 */ MCD_OPC_CheckField, 10, 1, 0, 247, 44, // Skip to: 40641 /* 29130 */ MCD_OPC_Decode, 245, 4, 193, 1, // Opcode: FMULXv2i32_indexed /* 29135 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 29154 /* 29139 */ MCD_OPC_CheckPredicate, 0, 234, 44, // Skip to: 40641 /* 29143 */ MCD_OPC_CheckField, 10, 1, 0, 228, 44, // Skip to: 40641 /* 29149 */ MCD_OPC_Decode, 128, 5, 194, 1, // Opcode: FMULv4i32_indexed /* 29154 */ MCD_OPC_FilterValue, 3, 219, 44, // Skip to: 40641 /* 29158 */ MCD_OPC_CheckPredicate, 0, 215, 44, // Skip to: 40641 /* 29162 */ MCD_OPC_CheckField, 10, 1, 0, 209, 44, // Skip to: 40641 /* 29168 */ MCD_OPC_Decode, 248, 4, 194, 1, // Opcode: FMULXv4i32_indexed /* 29173 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 29256 /* 29177 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29180 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29199 /* 29184 */ MCD_OPC_CheckPredicate, 0, 189, 44, // Skip to: 40641 /* 29188 */ MCD_OPC_CheckField, 10, 1, 0, 183, 44, // Skip to: 40641 /* 29194 */ MCD_OPC_Decode, 140, 11, 195, 1, // Opcode: SMULLv2i32_indexed /* 29199 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 29218 /* 29203 */ MCD_OPC_CheckPredicate, 0, 170, 44, // Skip to: 40641 /* 29207 */ MCD_OPC_CheckField, 10, 1, 0, 164, 44, // Skip to: 40641 /* 29213 */ MCD_OPC_Decode, 130, 17, 195, 1, // Opcode: UMULLv2i32_indexed /* 29218 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 29237 /* 29222 */ MCD_OPC_CheckPredicate, 0, 151, 44, // Skip to: 40641 /* 29226 */ MCD_OPC_CheckField, 10, 1, 0, 145, 44, // Skip to: 40641 /* 29232 */ MCD_OPC_Decode, 144, 11, 194, 1, // Opcode: SMULLv4i32_indexed /* 29237 */ MCD_OPC_FilterValue, 3, 136, 44, // Skip to: 40641 /* 29241 */ MCD_OPC_CheckPredicate, 0, 132, 44, // Skip to: 40641 /* 29245 */ MCD_OPC_CheckField, 10, 1, 0, 126, 44, // Skip to: 40641 /* 29251 */ MCD_OPC_Decode, 134, 17, 194, 1, // Opcode: UMULLv4i32_indexed /* 29256 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 29301 /* 29260 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29263 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29282 /* 29267 */ MCD_OPC_CheckPredicate, 0, 106, 44, // Skip to: 40641 /* 29271 */ MCD_OPC_CheckField, 10, 1, 0, 100, 44, // Skip to: 40641 /* 29277 */ MCD_OPC_Decode, 211, 11, 195, 1, // Opcode: SQDMULLv2i32_indexed /* 29282 */ MCD_OPC_FilterValue, 2, 91, 44, // Skip to: 40641 /* 29286 */ MCD_OPC_CheckPredicate, 0, 87, 44, // Skip to: 40641 /* 29290 */ MCD_OPC_CheckField, 10, 1, 0, 81, 44, // Skip to: 40641 /* 29296 */ MCD_OPC_Decode, 215, 11, 194, 1, // Opcode: SQDMULLv4i32_indexed /* 29301 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 29346 /* 29305 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29308 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29327 /* 29312 */ MCD_OPC_CheckPredicate, 0, 61, 44, // Skip to: 40641 /* 29316 */ MCD_OPC_CheckField, 10, 1, 0, 55, 44, // Skip to: 40641 /* 29322 */ MCD_OPC_Decode, 200, 11, 193, 1, // Opcode: SQDMULHv2i32_indexed /* 29327 */ MCD_OPC_FilterValue, 2, 46, 44, // Skip to: 40641 /* 29331 */ MCD_OPC_CheckPredicate, 0, 42, 44, // Skip to: 40641 /* 29335 */ MCD_OPC_CheckField, 10, 1, 0, 36, 44, // Skip to: 40641 /* 29341 */ MCD_OPC_Decode, 204, 11, 194, 1, // Opcode: SQDMULHv4i32_indexed /* 29346 */ MCD_OPC_FilterValue, 13, 27, 44, // Skip to: 40641 /* 29350 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29353 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29372 /* 29357 */ MCD_OPC_CheckPredicate, 0, 16, 44, // Skip to: 40641 /* 29361 */ MCD_OPC_CheckField, 10, 1, 0, 10, 44, // Skip to: 40641 /* 29367 */ MCD_OPC_Decode, 235, 11, 193, 1, // Opcode: SQRDMULHv2i32_indexed /* 29372 */ MCD_OPC_FilterValue, 2, 1, 44, // Skip to: 40641 /* 29376 */ MCD_OPC_CheckPredicate, 0, 253, 43, // Skip to: 40641 /* 29380 */ MCD_OPC_CheckField, 10, 1, 0, 247, 43, // Skip to: 40641 /* 29386 */ MCD_OPC_Decode, 239, 11, 194, 1, // Opcode: SQRDMULHv4i32_indexed /* 29391 */ MCD_OPC_FilterValue, 15, 238, 43, // Skip to: 40641 /* 29395 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 29398 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 29429 /* 29402 */ MCD_OPC_CheckPredicate, 0, 227, 43, // Skip to: 40641 /* 29406 */ MCD_OPC_CheckField, 29, 3, 2, 221, 43, // Skip to: 40641 /* 29412 */ MCD_OPC_CheckField, 21, 1, 0, 215, 43, // Skip to: 40641 /* 29418 */ MCD_OPC_CheckField, 10, 1, 0, 209, 43, // Skip to: 40641 /* 29424 */ MCD_OPC_Decode, 211, 4, 196, 1, // Opcode: FMLAv2i64_indexed /* 29429 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 29460 /* 29433 */ MCD_OPC_CheckPredicate, 0, 196, 43, // Skip to: 40641 /* 29437 */ MCD_OPC_CheckField, 29, 3, 2, 190, 43, // Skip to: 40641 /* 29443 */ MCD_OPC_CheckField, 21, 1, 0, 184, 43, // Skip to: 40641 /* 29449 */ MCD_OPC_CheckField, 10, 1, 0, 178, 43, // Skip to: 40641 /* 29455 */ MCD_OPC_Decode, 219, 4, 196, 1, // Opcode: FMLSv2i64_indexed /* 29460 */ MCD_OPC_FilterValue, 9, 169, 43, // Skip to: 40641 /* 29464 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29467 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 29492 /* 29471 */ MCD_OPC_CheckPredicate, 0, 158, 43, // Skip to: 40641 /* 29475 */ MCD_OPC_CheckField, 21, 1, 0, 152, 43, // Skip to: 40641 /* 29481 */ MCD_OPC_CheckField, 10, 1, 0, 146, 43, // Skip to: 40641 /* 29487 */ MCD_OPC_Decode, 254, 4, 197, 1, // Opcode: FMULv2i64_indexed /* 29492 */ MCD_OPC_FilterValue, 3, 137, 43, // Skip to: 40641 /* 29496 */ MCD_OPC_CheckPredicate, 0, 133, 43, // Skip to: 40641 /* 29500 */ MCD_OPC_CheckField, 21, 1, 0, 127, 43, // Skip to: 40641 /* 29506 */ MCD_OPC_CheckField, 10, 1, 0, 121, 43, // Skip to: 40641 /* 29512 */ MCD_OPC_Decode, 246, 4, 197, 1, // Opcode: FMULXv2i64_indexed /* 29517 */ MCD_OPC_FilterValue, 4, 191, 1, // Skip to: 29968 /* 29521 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 29524 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 29547 /* 29528 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ... /* 29531 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29539 /* 29535 */ MCD_OPC_Decode, 81, 198, 1, // Opcode: ADR /* 29539 */ MCD_OPC_FilterValue, 1, 90, 43, // Skip to: 40641 /* 29543 */ MCD_OPC_Decode, 82, 198, 1, // Opcode: ADRP /* 29547 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 29622 /* 29551 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29554 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29562 /* 29558 */ MCD_OPC_Decode, 62, 199, 1, // Opcode: ADDWri /* 29562 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 29570 /* 29566 */ MCD_OPC_Decode, 48, 199, 1, // Opcode: ADDSWri /* 29570 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 29579 /* 29574 */ MCD_OPC_Decode, 166, 15, 199, 1, // Opcode: SUBWri /* 29579 */ MCD_OPC_FilterValue, 3, 5, 0, // Skip to: 29588 /* 29583 */ MCD_OPC_Decode, 157, 15, 199, 1, // Opcode: SUBSWri /* 29588 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 29596 /* 29592 */ MCD_OPC_Decode, 66, 199, 1, // Opcode: ADDXri /* 29596 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 29604 /* 29600 */ MCD_OPC_Decode, 52, 199, 1, // Opcode: ADDSXri /* 29604 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 29613 /* 29608 */ MCD_OPC_Decode, 170, 15, 199, 1, // Opcode: SUBXri /* 29613 */ MCD_OPC_FilterValue, 7, 16, 43, // Skip to: 40641 /* 29617 */ MCD_OPC_Decode, 161, 15, 199, 1, // Opcode: SUBSXri /* 29622 */ MCD_OPC_FilterValue, 2, 197, 0, // Skip to: 29823 /* 29626 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29629 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 29659 /* 29633 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 29636 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 29650 /* 29640 */ MCD_OPC_CheckField, 22, 1, 0, 243, 42, // Skip to: 40641 /* 29646 */ MCD_OPC_Decode, 93, 200, 1, // Opcode: ANDWri /* 29650 */ MCD_OPC_FilterValue, 1, 235, 42, // Skip to: 40641 /* 29654 */ MCD_OPC_Decode, 214, 8, 201, 1, // Opcode: MOVNWi /* 29659 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 29674 /* 29663 */ MCD_OPC_CheckField, 22, 2, 0, 220, 42, // Skip to: 40641 /* 29669 */ MCD_OPC_Decode, 135, 9, 200, 1, // Opcode: ORRWri /* 29674 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 29705 /* 29678 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 29681 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 29696 /* 29685 */ MCD_OPC_CheckField, 22, 1, 0, 198, 42, // Skip to: 40641 /* 29691 */ MCD_OPC_Decode, 166, 2, 200, 1, // Opcode: EORWri /* 29696 */ MCD_OPC_FilterValue, 1, 189, 42, // Skip to: 40641 /* 29700 */ MCD_OPC_Decode, 216, 8, 201, 1, // Opcode: MOVZWi /* 29705 */ MCD_OPC_FilterValue, 3, 26, 0, // Skip to: 29735 /* 29709 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 29712 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 29726 /* 29716 */ MCD_OPC_CheckField, 22, 1, 0, 167, 42, // Skip to: 40641 /* 29722 */ MCD_OPC_Decode, 87, 200, 1, // Opcode: ANDSWri /* 29726 */ MCD_OPC_FilterValue, 1, 159, 42, // Skip to: 40641 /* 29730 */ MCD_OPC_Decode, 212, 8, 201, 1, // Opcode: MOVKWi /* 29735 */ MCD_OPC_FilterValue, 4, 20, 0, // Skip to: 29759 /* 29739 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 29742 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29750 /* 29746 */ MCD_OPC_Decode, 96, 200, 1, // Opcode: ANDXri /* 29750 */ MCD_OPC_FilterValue, 1, 135, 42, // Skip to: 40641 /* 29754 */ MCD_OPC_Decode, 215, 8, 201, 1, // Opcode: MOVNXi /* 29759 */ MCD_OPC_FilterValue, 5, 11, 0, // Skip to: 29774 /* 29763 */ MCD_OPC_CheckField, 23, 1, 0, 120, 42, // Skip to: 40641 /* 29769 */ MCD_OPC_Decode, 138, 9, 200, 1, // Opcode: ORRXri /* 29774 */ MCD_OPC_FilterValue, 6, 21, 0, // Skip to: 29799 /* 29778 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 29781 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 29790 /* 29785 */ MCD_OPC_Decode, 169, 2, 200, 1, // Opcode: EORXri /* 29790 */ MCD_OPC_FilterValue, 1, 95, 42, // Skip to: 40641 /* 29794 */ MCD_OPC_Decode, 217, 8, 201, 1, // Opcode: MOVZXi /* 29799 */ MCD_OPC_FilterValue, 7, 86, 42, // Skip to: 40641 /* 29803 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 29806 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29814 /* 29810 */ MCD_OPC_Decode, 90, 200, 1, // Opcode: ANDSXri /* 29814 */ MCD_OPC_FilterValue, 1, 71, 42, // Skip to: 40641 /* 29818 */ MCD_OPC_Decode, 213, 8, 201, 1, // Opcode: MOVKXi /* 29823 */ MCD_OPC_FilterValue, 3, 62, 42, // Skip to: 40641 /* 29827 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29830 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 29867 /* 29834 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 29837 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 29852 /* 29841 */ MCD_OPC_CheckField, 15, 1, 0, 42, 42, // Skip to: 40641 /* 29847 */ MCD_OPC_Decode, 130, 10, 202, 1, // Opcode: SBFMWri /* 29852 */ MCD_OPC_FilterValue, 4, 33, 42, // Skip to: 40641 /* 29856 */ MCD_OPC_CheckField, 15, 1, 0, 27, 42, // Skip to: 40641 /* 29862 */ MCD_OPC_Decode, 175, 2, 203, 1, // Opcode: EXTRWrri /* 29867 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 29887 /* 29871 */ MCD_OPC_CheckField, 21, 3, 0, 12, 42, // Skip to: 40641 /* 29877 */ MCD_OPC_CheckField, 15, 1, 0, 6, 42, // Skip to: 40641 /* 29883 */ MCD_OPC_Decode, 104, 204, 1, // Opcode: BFMWri /* 29887 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 29908 /* 29891 */ MCD_OPC_CheckField, 21, 3, 0, 248, 41, // Skip to: 40641 /* 29897 */ MCD_OPC_CheckField, 15, 1, 0, 242, 41, // Skip to: 40641 /* 29903 */ MCD_OPC_Decode, 160, 16, 202, 1, // Opcode: UBFMWri /* 29908 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 29939 /* 29912 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 29915 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 29924 /* 29919 */ MCD_OPC_Decode, 131, 10, 205, 1, // Opcode: SBFMXri /* 29924 */ MCD_OPC_FilterValue, 3, 217, 41, // Skip to: 40641 /* 29928 */ MCD_OPC_CheckField, 21, 1, 0, 211, 41, // Skip to: 40641 /* 29934 */ MCD_OPC_Decode, 176, 2, 206, 1, // Opcode: EXTRXrri /* 29939 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 29953 /* 29943 */ MCD_OPC_CheckField, 22, 2, 1, 196, 41, // Skip to: 40641 /* 29949 */ MCD_OPC_Decode, 105, 207, 1, // Opcode: BFMXri /* 29953 */ MCD_OPC_FilterValue, 6, 188, 41, // Skip to: 40641 /* 29957 */ MCD_OPC_CheckField, 22, 2, 1, 182, 41, // Skip to: 40641 /* 29963 */ MCD_OPC_Decode, 161, 16, 205, 1, // Opcode: UBFMXri /* 29968 */ MCD_OPC_FilterValue, 5, 218, 1, // Skip to: 30446 /* 29972 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 29975 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29983 /* 29979 */ MCD_OPC_Decode, 103, 208, 1, // Opcode: B /* 29983 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 30026 /* 29987 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 29990 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 29999 /* 29994 */ MCD_OPC_Decode, 133, 1, 209, 1, // Opcode: CBZW /* 29999 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30008 /* 30003 */ MCD_OPC_Decode, 131, 1, 209, 1, // Opcode: CBNZW /* 30008 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30017 /* 30012 */ MCD_OPC_Decode, 215, 15, 210, 1, // Opcode: TBZW /* 30017 */ MCD_OPC_FilterValue, 3, 124, 41, // Skip to: 40641 /* 30021 */ MCD_OPC_Decode, 205, 15, 210, 1, // Opcode: TBNZW /* 30026 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 30047 /* 30030 */ MCD_OPC_CheckField, 24, 2, 0, 109, 41, // Skip to: 40641 /* 30036 */ MCD_OPC_CheckField, 4, 1, 0, 103, 41, // Skip to: 40641 /* 30042 */ MCD_OPC_Decode, 130, 1, 211, 1, // Opcode: Bcc /* 30047 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 30055 /* 30051 */ MCD_OPC_Decode, 124, 208, 1, // Opcode: BL /* 30055 */ MCD_OPC_FilterValue, 5, 39, 0, // Skip to: 30098 /* 30059 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 30062 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30071 /* 30066 */ MCD_OPC_Decode, 134, 1, 212, 1, // Opcode: CBZX /* 30071 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30080 /* 30075 */ MCD_OPC_Decode, 132, 1, 212, 1, // Opcode: CBNZX /* 30080 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30089 /* 30084 */ MCD_OPC_Decode, 216, 15, 210, 1, // Opcode: TBZX /* 30089 */ MCD_OPC_FilterValue, 3, 52, 41, // Skip to: 40641 /* 30093 */ MCD_OPC_Decode, 206, 15, 210, 1, // Opcode: TBNZX /* 30098 */ MCD_OPC_FilterValue, 6, 43, 41, // Skip to: 40641 /* 30102 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 30105 */ MCD_OPC_FilterValue, 0, 30, 0, // Skip to: 30139 /* 30109 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ... /* 30112 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30121 /* 30116 */ MCD_OPC_Decode, 194, 15, 213, 1, // Opcode: SVC /* 30121 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30130 /* 30125 */ MCD_OPC_Decode, 209, 5, 213, 1, // Opcode: HVC /* 30130 */ MCD_OPC_FilterValue, 3, 11, 41, // Skip to: 40641 /* 30134 */ MCD_OPC_Decode, 222, 10, 213, 1, // Opcode: SMC /* 30139 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 30153 /* 30143 */ MCD_OPC_CheckField, 0, 5, 0, 252, 40, // Skip to: 40641 /* 30149 */ MCD_OPC_Decode, 127, 213, 1, // Opcode: BRK /* 30153 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 30168 /* 30157 */ MCD_OPC_CheckField, 0, 5, 0, 238, 40, // Skip to: 40641 /* 30163 */ MCD_OPC_Decode, 208, 5, 213, 1, // Opcode: HLT /* 30168 */ MCD_OPC_FilterValue, 5, 30, 0, // Skip to: 30202 /* 30172 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ... /* 30175 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30184 /* 30179 */ MCD_OPC_Decode, 142, 2, 213, 1, // Opcode: DCPS1 /* 30184 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30193 /* 30188 */ MCD_OPC_Decode, 143, 2, 213, 1, // Opcode: DCPS2 /* 30193 */ MCD_OPC_FilterValue, 3, 204, 40, // Skip to: 40641 /* 30197 */ MCD_OPC_Decode, 144, 2, 213, 1, // Opcode: DCPS3 /* 30202 */ MCD_OPC_FilterValue, 8, 122, 0, // Skip to: 30328 /* 30206 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ... /* 30209 */ MCD_OPC_FilterValue, 95, 11, 0, // Skip to: 30224 /* 30213 */ MCD_OPC_CheckField, 12, 9, 51, 53, 0, // Skip to: 30272 /* 30219 */ MCD_OPC_Decode, 143, 1, 214, 1, // Opcode: CLREX /* 30224 */ MCD_OPC_FilterValue, 159, 1, 11, 0, // Skip to: 30240 /* 30229 */ MCD_OPC_CheckField, 12, 9, 51, 37, 0, // Skip to: 30272 /* 30235 */ MCD_OPC_Decode, 147, 2, 214, 1, // Opcode: DSB /* 30240 */ MCD_OPC_FilterValue, 191, 1, 11, 0, // Skip to: 30256 /* 30245 */ MCD_OPC_CheckField, 12, 9, 51, 21, 0, // Skip to: 30272 /* 30251 */ MCD_OPC_Decode, 145, 2, 214, 1, // Opcode: DMB /* 30256 */ MCD_OPC_FilterValue, 223, 1, 11, 0, // Skip to: 30272 /* 30261 */ MCD_OPC_CheckField, 12, 9, 51, 5, 0, // Skip to: 30272 /* 30267 */ MCD_OPC_Decode, 218, 5, 214, 1, // Opcode: ISB /* 30272 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ... /* 30275 */ MCD_OPC_FilterValue, 31, 33, 0, // Skip to: 30312 /* 30279 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 30282 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 30297 /* 30286 */ MCD_OPC_CheckField, 16, 5, 3, 20, 0, // Skip to: 30312 /* 30292 */ MCD_OPC_Decode, 207, 5, 215, 1, // Opcode: HINT /* 30297 */ MCD_OPC_FilterValue, 4, 11, 0, // Skip to: 30312 /* 30301 */ MCD_OPC_CheckField, 19, 2, 0, 5, 0, // Skip to: 30312 /* 30307 */ MCD_OPC_Decode, 228, 8, 216, 1, // Opcode: MSRpstate /* 30312 */ MCD_OPC_CheckField, 19, 2, 1, 5, 0, // Skip to: 30323 /* 30318 */ MCD_OPC_Decode, 196, 15, 217, 1, // Opcode: SYSxt /* 30323 */ MCD_OPC_Decode, 227, 8, 218, 1, // Opcode: MSR /* 30328 */ MCD_OPC_FilterValue, 9, 16, 0, // Skip to: 30348 /* 30332 */ MCD_OPC_CheckField, 19, 2, 1, 5, 0, // Skip to: 30343 /* 30338 */ MCD_OPC_Decode, 195, 15, 219, 1, // Opcode: SYSLxt /* 30343 */ MCD_OPC_Decode, 226, 8, 220, 1, // Opcode: MRS /* 30348 */ MCD_OPC_FilterValue, 16, 17, 0, // Skip to: 30369 /* 30352 */ MCD_OPC_CheckField, 10, 11, 192, 15, 42, 40, // Skip to: 40641 /* 30359 */ MCD_OPC_CheckField, 0, 5, 0, 36, 40, // Skip to: 40641 /* 30365 */ MCD_OPC_Decode, 126, 221, 1, // Opcode: BR /* 30369 */ MCD_OPC_FilterValue, 17, 17, 0, // Skip to: 30390 /* 30373 */ MCD_OPC_CheckField, 10, 11, 192, 15, 21, 40, // Skip to: 40641 /* 30380 */ MCD_OPC_CheckField, 0, 5, 0, 15, 40, // Skip to: 40641 /* 30386 */ MCD_OPC_Decode, 125, 221, 1, // Opcode: BLR /* 30390 */ MCD_OPC_FilterValue, 18, 18, 0, // Skip to: 30412 /* 30394 */ MCD_OPC_CheckField, 10, 11, 192, 15, 0, 40, // Skip to: 40641 /* 30401 */ MCD_OPC_CheckField, 0, 5, 0, 250, 39, // Skip to: 40641 /* 30407 */ MCD_OPC_Decode, 168, 9, 221, 1, // Opcode: RET /* 30412 */ MCD_OPC_FilterValue, 20, 13, 0, // Skip to: 30429 /* 30416 */ MCD_OPC_CheckField, 0, 21, 224, 135, 124, 233, 39, // Skip to: 40641 /* 30424 */ MCD_OPC_Decode, 174, 2, 222, 1, // Opcode: ERET /* 30429 */ MCD_OPC_FilterValue, 21, 224, 39, // Skip to: 40641 /* 30433 */ MCD_OPC_CheckField, 0, 21, 224, 135, 124, 216, 39, // Skip to: 40641 /* 30441 */ MCD_OPC_Decode, 146, 2, 222, 1, // Opcode: DRPS /* 30446 */ MCD_OPC_FilterValue, 6, 54, 10, // Skip to: 33064 /* 30450 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 30453 */ MCD_OPC_FilterValue, 0, 41, 1, // Skip to: 30754 /* 30457 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 30460 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30469 /* 30464 */ MCD_OPC_Decode, 134, 8, 209, 1, // Opcode: LDRWl /* 30469 */ MCD_OPC_FilterValue, 2, 244, 0, // Skip to: 30717 /* 30473 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 30476 */ MCD_OPC_FilterValue, 0, 68, 0, // Skip to: 30548 /* 30480 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 30483 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 30497 /* 30487 */ MCD_OPC_CheckField, 12, 4, 0, 164, 39, // Skip to: 40641 /* 30493 */ MCD_OPC_Decode, 32, 223, 1, // Opcode: ADCWr /* 30497 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 30506 /* 30501 */ MCD_OPC_Decode, 134, 2, 224, 1, // Opcode: CSELWr /* 30506 */ MCD_OPC_FilterValue, 6, 147, 39, // Skip to: 40641 /* 30510 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 30513 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30522 /* 30517 */ MCD_OPC_Decode, 176, 8, 223, 1, // Opcode: LSLVWr /* 30522 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 30535 /* 30526 */ MCD_OPC_CheckPredicate, 2, 127, 39, // Skip to: 40641 /* 30530 */ MCD_OPC_Decode, 254, 1, 223, 1, // Opcode: CRC32Brr /* 30535 */ MCD_OPC_FilterValue, 5, 118, 39, // Skip to: 40641 /* 30539 */ MCD_OPC_CheckPredicate, 2, 114, 39, // Skip to: 40641 /* 30543 */ MCD_OPC_Decode, 255, 1, 223, 1, // Opcode: CRC32CBrr /* 30548 */ MCD_OPC_FilterValue, 1, 54, 0, // Skip to: 30606 /* 30552 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 30555 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 30564 /* 30559 */ MCD_OPC_Decode, 136, 2, 224, 1, // Opcode: CSINCWr /* 30564 */ MCD_OPC_FilterValue, 6, 89, 39, // Skip to: 40641 /* 30568 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 30571 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30580 /* 30575 */ MCD_OPC_Decode, 178, 8, 223, 1, // Opcode: LSRVWr /* 30580 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 30593 /* 30584 */ MCD_OPC_CheckPredicate, 2, 69, 39, // Skip to: 40641 /* 30588 */ MCD_OPC_Decode, 131, 2, 223, 1, // Opcode: CRC32Hrr /* 30593 */ MCD_OPC_FilterValue, 5, 60, 39, // Skip to: 40641 /* 30597 */ MCD_OPC_CheckPredicate, 2, 56, 39, // Skip to: 40641 /* 30601 */ MCD_OPC_Decode, 128, 2, 223, 1, // Opcode: CRC32CHrr /* 30606 */ MCD_OPC_FilterValue, 2, 70, 0, // Skip to: 30680 /* 30610 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 30613 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30628 /* 30617 */ MCD_OPC_CheckField, 21, 3, 6, 34, 39, // Skip to: 40641 /* 30623 */ MCD_OPC_Decode, 180, 16, 223, 1, // Opcode: UDIVWr /* 30628 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 30642 /* 30632 */ MCD_OPC_CheckField, 21, 3, 6, 19, 39, // Skip to: 40641 /* 30638 */ MCD_OPC_Decode, 101, 223, 1, // Opcode: ASRVWr /* 30642 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 30661 /* 30646 */ MCD_OPC_CheckPredicate, 2, 7, 39, // Skip to: 40641 /* 30650 */ MCD_OPC_CheckField, 21, 3, 6, 1, 39, // Skip to: 40641 /* 30656 */ MCD_OPC_Decode, 132, 2, 223, 1, // Opcode: CRC32Wrr /* 30661 */ MCD_OPC_FilterValue, 5, 248, 38, // Skip to: 40641 /* 30665 */ MCD_OPC_CheckPredicate, 2, 244, 38, // Skip to: 40641 /* 30669 */ MCD_OPC_CheckField, 21, 3, 6, 238, 38, // Skip to: 40641 /* 30675 */ MCD_OPC_Decode, 129, 2, 223, 1, // Opcode: CRC32CWrr /* 30680 */ MCD_OPC_FilterValue, 3, 229, 38, // Skip to: 40641 /* 30684 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 30687 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30702 /* 30691 */ MCD_OPC_CheckField, 21, 3, 6, 216, 38, // Skip to: 40641 /* 30697 */ MCD_OPC_Decode, 150, 10, 223, 1, // Opcode: SDIVWr /* 30702 */ MCD_OPC_FilterValue, 2, 207, 38, // Skip to: 40641 /* 30706 */ MCD_OPC_CheckField, 21, 3, 6, 201, 38, // Skip to: 40641 /* 30712 */ MCD_OPC_Decode, 187, 9, 223, 1, // Opcode: RORVWr /* 30717 */ MCD_OPC_FilterValue, 3, 192, 38, // Skip to: 40641 /* 30721 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 30724 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30739 /* 30728 */ MCD_OPC_CheckField, 21, 3, 0, 179, 38, // Skip to: 40641 /* 30734 */ MCD_OPC_Decode, 180, 8, 225, 1, // Opcode: MADDWrrr /* 30739 */ MCD_OPC_FilterValue, 1, 170, 38, // Skip to: 40641 /* 30743 */ MCD_OPC_CheckField, 21, 3, 0, 164, 38, // Skip to: 40641 /* 30749 */ MCD_OPC_Decode, 229, 8, 225, 1, // Opcode: MSUBWrrr /* 30754 */ MCD_OPC_FilterValue, 1, 224, 1, // Skip to: 31238 /* 30758 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 30761 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 30854 /* 30765 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 30768 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30783 /* 30772 */ MCD_OPC_CheckField, 21, 1, 0, 135, 38, // Skip to: 40641 /* 30778 */ MCD_OPC_Decode, 136, 15, 226, 1, // Opcode: STURBBi /* 30783 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 30798 /* 30787 */ MCD_OPC_CheckField, 21, 1, 0, 120, 38, // Skip to: 40641 /* 30793 */ MCD_OPC_Decode, 215, 14, 226, 1, // Opcode: STRBBpost /* 30798 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 30839 /* 30802 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 30805 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30814 /* 30809 */ MCD_OPC_Decode, 132, 15, 226, 1, // Opcode: STTRBi /* 30814 */ MCD_OPC_FilterValue, 1, 95, 38, // Skip to: 40641 /* 30818 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 30821 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30830 /* 30825 */ MCD_OPC_Decode, 217, 14, 227, 1, // Opcode: STRBBroW /* 30830 */ MCD_OPC_FilterValue, 3, 79, 38, // Skip to: 40641 /* 30834 */ MCD_OPC_Decode, 218, 14, 228, 1, // Opcode: STRBBroX /* 30839 */ MCD_OPC_FilterValue, 3, 70, 38, // Skip to: 40641 /* 30843 */ MCD_OPC_CheckField, 21, 1, 0, 64, 38, // Skip to: 40641 /* 30849 */ MCD_OPC_Decode, 216, 14, 226, 1, // Opcode: STRBBpre /* 30854 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 30947 /* 30858 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 30861 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30876 /* 30865 */ MCD_OPC_CheckField, 21, 1, 0, 42, 38, // Skip to: 40641 /* 30871 */ MCD_OPC_Decode, 155, 8, 226, 1, // Opcode: LDURBBi /* 30876 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 30891 /* 30880 */ MCD_OPC_CheckField, 21, 1, 0, 27, 38, // Skip to: 40641 /* 30886 */ MCD_OPC_Decode, 198, 7, 226, 1, // Opcode: LDRBBpost /* 30891 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 30932 /* 30895 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 30898 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30907 /* 30902 */ MCD_OPC_Decode, 146, 8, 226, 1, // Opcode: LDTRBi /* 30907 */ MCD_OPC_FilterValue, 1, 2, 38, // Skip to: 40641 /* 30911 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 30914 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30923 /* 30918 */ MCD_OPC_Decode, 200, 7, 227, 1, // Opcode: LDRBBroW /* 30923 */ MCD_OPC_FilterValue, 3, 242, 37, // Skip to: 40641 /* 30927 */ MCD_OPC_Decode, 201, 7, 228, 1, // Opcode: LDRBBroX /* 30932 */ MCD_OPC_FilterValue, 3, 233, 37, // Skip to: 40641 /* 30936 */ MCD_OPC_CheckField, 21, 1, 0, 227, 37, // Skip to: 40641 /* 30942 */ MCD_OPC_Decode, 199, 7, 226, 1, // Opcode: LDRBBpre /* 30947 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 31040 /* 30951 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 30954 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30969 /* 30958 */ MCD_OPC_CheckField, 21, 1, 0, 205, 37, // Skip to: 40641 /* 30964 */ MCD_OPC_Decode, 162, 8, 226, 1, // Opcode: LDURSBXi /* 30969 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 30984 /* 30973 */ MCD_OPC_CheckField, 21, 1, 0, 190, 37, // Skip to: 40641 /* 30979 */ MCD_OPC_Decode, 235, 7, 226, 1, // Opcode: LDRSBXpost /* 30984 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31025 /* 30988 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 30991 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31000 /* 30995 */ MCD_OPC_Decode, 149, 8, 226, 1, // Opcode: LDTRSBXi /* 31000 */ MCD_OPC_FilterValue, 1, 165, 37, // Skip to: 40641 /* 31004 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 31007 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31016 /* 31011 */ MCD_OPC_Decode, 237, 7, 229, 1, // Opcode: LDRSBXroW /* 31016 */ MCD_OPC_FilterValue, 3, 149, 37, // Skip to: 40641 /* 31020 */ MCD_OPC_Decode, 238, 7, 230, 1, // Opcode: LDRSBXroX /* 31025 */ MCD_OPC_FilterValue, 3, 140, 37, // Skip to: 40641 /* 31029 */ MCD_OPC_CheckField, 21, 1, 0, 134, 37, // Skip to: 40641 /* 31035 */ MCD_OPC_Decode, 236, 7, 226, 1, // Opcode: LDRSBXpre /* 31040 */ MCD_OPC_FilterValue, 3, 89, 0, // Skip to: 31133 /* 31044 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31047 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31062 /* 31051 */ MCD_OPC_CheckField, 21, 1, 0, 112, 37, // Skip to: 40641 /* 31057 */ MCD_OPC_Decode, 161, 8, 226, 1, // Opcode: LDURSBWi /* 31062 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31077 /* 31066 */ MCD_OPC_CheckField, 21, 1, 0, 97, 37, // Skip to: 40641 /* 31072 */ MCD_OPC_Decode, 230, 7, 226, 1, // Opcode: LDRSBWpost /* 31077 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31118 /* 31081 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 31084 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31093 /* 31088 */ MCD_OPC_Decode, 148, 8, 226, 1, // Opcode: LDTRSBWi /* 31093 */ MCD_OPC_FilterValue, 1, 72, 37, // Skip to: 40641 /* 31097 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 31100 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31109 /* 31104 */ MCD_OPC_Decode, 232, 7, 227, 1, // Opcode: LDRSBWroW /* 31109 */ MCD_OPC_FilterValue, 3, 56, 37, // Skip to: 40641 /* 31113 */ MCD_OPC_Decode, 233, 7, 228, 1, // Opcode: LDRSBWroX /* 31118 */ MCD_OPC_FilterValue, 3, 47, 37, // Skip to: 40641 /* 31122 */ MCD_OPC_CheckField, 21, 1, 0, 41, 37, // Skip to: 40641 /* 31128 */ MCD_OPC_Decode, 231, 7, 226, 1, // Opcode: LDRSBWpre /* 31133 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31142 /* 31137 */ MCD_OPC_Decode, 219, 14, 231, 1, // Opcode: STRBBui /* 31142 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 31151 /* 31146 */ MCD_OPC_Decode, 202, 7, 231, 1, // Opcode: LDRBBui /* 31151 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 31160 /* 31155 */ MCD_OPC_Decode, 239, 7, 231, 1, // Opcode: LDRSBXui /* 31160 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 31169 /* 31164 */ MCD_OPC_Decode, 234, 7, 231, 1, // Opcode: LDRSBWui /* 31169 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 31189 /* 31173 */ MCD_OPC_CheckField, 21, 1, 0, 246, 36, // Skip to: 40641 /* 31179 */ MCD_OPC_CheckField, 10, 6, 0, 240, 36, // Skip to: 40641 /* 31185 */ MCD_OPC_Decode, 30, 223, 1, // Opcode: ADCSWr /* 31189 */ MCD_OPC_FilterValue, 9, 232, 36, // Skip to: 40641 /* 31193 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31196 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 31217 /* 31200 */ MCD_OPC_CheckField, 21, 1, 0, 219, 36, // Skip to: 40641 /* 31206 */ MCD_OPC_CheckField, 4, 1, 0, 213, 36, // Skip to: 40641 /* 31212 */ MCD_OPC_Decode, 136, 1, 232, 1, // Opcode: CCMNWr /* 31217 */ MCD_OPC_FilterValue, 2, 204, 36, // Skip to: 40641 /* 31221 */ MCD_OPC_CheckField, 21, 1, 0, 198, 36, // Skip to: 40641 /* 31227 */ MCD_OPC_CheckField, 4, 1, 0, 192, 36, // Skip to: 40641 /* 31233 */ MCD_OPC_Decode, 135, 1, 233, 1, // Opcode: CCMNWi /* 31238 */ MCD_OPC_FilterValue, 2, 132, 0, // Skip to: 31374 /* 31242 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 31245 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31254 /* 31249 */ MCD_OPC_Decode, 140, 8, 212, 1, // Opcode: LDRXl /* 31254 */ MCD_OPC_FilterValue, 2, 167, 36, // Skip to: 40641 /* 31258 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31261 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 31317 /* 31265 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 31268 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31283 /* 31272 */ MCD_OPC_CheckField, 12, 4, 0, 147, 36, // Skip to: 40641 /* 31278 */ MCD_OPC_Decode, 128, 10, 223, 1, // Opcode: SBCWr /* 31283 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31292 /* 31287 */ MCD_OPC_Decode, 138, 2, 224, 1, // Opcode: CSINVWr /* 31292 */ MCD_OPC_FilterValue, 6, 129, 36, // Skip to: 40641 /* 31296 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ... /* 31299 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31308 /* 31303 */ MCD_OPC_Decode, 164, 9, 234, 1, // Opcode: RBITWr /* 31308 */ MCD_OPC_FilterValue, 1, 113, 36, // Skip to: 40641 /* 31312 */ MCD_OPC_Decode, 152, 1, 234, 1, // Opcode: CLZWr /* 31317 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 31358 /* 31321 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 31324 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31333 /* 31328 */ MCD_OPC_Decode, 140, 2, 224, 1, // Opcode: CSNEGWr /* 31333 */ MCD_OPC_FilterValue, 6, 88, 36, // Skip to: 40641 /* 31337 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ... /* 31340 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31349 /* 31344 */ MCD_OPC_Decode, 170, 9, 234, 1, // Opcode: REV16Wr /* 31349 */ MCD_OPC_FilterValue, 1, 72, 36, // Skip to: 40641 /* 31353 */ MCD_OPC_Decode, 144, 1, 234, 1, // Opcode: CLSWr /* 31358 */ MCD_OPC_FilterValue, 2, 63, 36, // Skip to: 40641 /* 31362 */ MCD_OPC_CheckField, 12, 12, 128, 24, 56, 36, // Skip to: 40641 /* 31369 */ MCD_OPC_Decode, 185, 9, 234, 1, // Opcode: REVWr /* 31374 */ MCD_OPC_FilterValue, 3, 225, 1, // Skip to: 31859 /* 31378 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 31381 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 31474 /* 31385 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31388 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31403 /* 31392 */ MCD_OPC_CheckField, 21, 1, 0, 27, 36, // Skip to: 40641 /* 31398 */ MCD_OPC_Decode, 139, 15, 226, 1, // Opcode: STURHHi /* 31403 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31418 /* 31407 */ MCD_OPC_CheckField, 21, 1, 0, 12, 36, // Skip to: 40641 /* 31413 */ MCD_OPC_Decode, 230, 14, 226, 1, // Opcode: STRHHpost /* 31418 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31459 /* 31422 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 31425 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31434 /* 31429 */ MCD_OPC_Decode, 133, 15, 226, 1, // Opcode: STTRHi /* 31434 */ MCD_OPC_FilterValue, 1, 243, 35, // Skip to: 40641 /* 31438 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 31441 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31450 /* 31445 */ MCD_OPC_Decode, 232, 14, 227, 1, // Opcode: STRHHroW /* 31450 */ MCD_OPC_FilterValue, 3, 227, 35, // Skip to: 40641 /* 31454 */ MCD_OPC_Decode, 233, 14, 228, 1, // Opcode: STRHHroX /* 31459 */ MCD_OPC_FilterValue, 3, 218, 35, // Skip to: 40641 /* 31463 */ MCD_OPC_CheckField, 21, 1, 0, 212, 35, // Skip to: 40641 /* 31469 */ MCD_OPC_Decode, 231, 14, 226, 1, // Opcode: STRHHpre /* 31474 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 31567 /* 31478 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31481 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31496 /* 31485 */ MCD_OPC_CheckField, 21, 1, 0, 190, 35, // Skip to: 40641 /* 31491 */ MCD_OPC_Decode, 158, 8, 226, 1, // Opcode: LDURHHi /* 31496 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31511 /* 31500 */ MCD_OPC_CheckField, 21, 1, 0, 175, 35, // Skip to: 40641 /* 31506 */ MCD_OPC_Decode, 214, 7, 226, 1, // Opcode: LDRHHpost /* 31511 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31552 /* 31515 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 31518 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31527 /* 31522 */ MCD_OPC_Decode, 147, 8, 226, 1, // Opcode: LDTRHi /* 31527 */ MCD_OPC_FilterValue, 1, 150, 35, // Skip to: 40641 /* 31531 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 31534 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31543 /* 31538 */ MCD_OPC_Decode, 216, 7, 227, 1, // Opcode: LDRHHroW /* 31543 */ MCD_OPC_FilterValue, 3, 134, 35, // Skip to: 40641 /* 31547 */ MCD_OPC_Decode, 217, 7, 228, 1, // Opcode: LDRHHroX /* 31552 */ MCD_OPC_FilterValue, 3, 125, 35, // Skip to: 40641 /* 31556 */ MCD_OPC_CheckField, 21, 1, 0, 119, 35, // Skip to: 40641 /* 31562 */ MCD_OPC_Decode, 215, 7, 226, 1, // Opcode: LDRHHpre /* 31567 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 31660 /* 31571 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31574 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31589 /* 31578 */ MCD_OPC_CheckField, 21, 1, 0, 97, 35, // Skip to: 40641 /* 31584 */ MCD_OPC_Decode, 164, 8, 226, 1, // Opcode: LDURSHXi /* 31589 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31604 /* 31593 */ MCD_OPC_CheckField, 21, 1, 0, 82, 35, // Skip to: 40641 /* 31599 */ MCD_OPC_Decode, 245, 7, 226, 1, // Opcode: LDRSHXpost /* 31604 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31645 /* 31608 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 31611 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31620 /* 31615 */ MCD_OPC_Decode, 151, 8, 226, 1, // Opcode: LDTRSHXi /* 31620 */ MCD_OPC_FilterValue, 1, 57, 35, // Skip to: 40641 /* 31624 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 31627 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31636 /* 31631 */ MCD_OPC_Decode, 247, 7, 229, 1, // Opcode: LDRSHXroW /* 31636 */ MCD_OPC_FilterValue, 3, 41, 35, // Skip to: 40641 /* 31640 */ MCD_OPC_Decode, 248, 7, 230, 1, // Opcode: LDRSHXroX /* 31645 */ MCD_OPC_FilterValue, 3, 32, 35, // Skip to: 40641 /* 31649 */ MCD_OPC_CheckField, 21, 1, 0, 26, 35, // Skip to: 40641 /* 31655 */ MCD_OPC_Decode, 246, 7, 226, 1, // Opcode: LDRSHXpre /* 31660 */ MCD_OPC_FilterValue, 3, 89, 0, // Skip to: 31753 /* 31664 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31667 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31682 /* 31671 */ MCD_OPC_CheckField, 21, 1, 0, 4, 35, // Skip to: 40641 /* 31677 */ MCD_OPC_Decode, 163, 8, 226, 1, // Opcode: LDURSHWi /* 31682 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31697 /* 31686 */ MCD_OPC_CheckField, 21, 1, 0, 245, 34, // Skip to: 40641 /* 31692 */ MCD_OPC_Decode, 240, 7, 226, 1, // Opcode: LDRSHWpost /* 31697 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31738 /* 31701 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 31704 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31713 /* 31708 */ MCD_OPC_Decode, 150, 8, 226, 1, // Opcode: LDTRSHWi /* 31713 */ MCD_OPC_FilterValue, 1, 220, 34, // Skip to: 40641 /* 31717 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 31720 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31729 /* 31724 */ MCD_OPC_Decode, 242, 7, 227, 1, // Opcode: LDRSHWroW /* 31729 */ MCD_OPC_FilterValue, 3, 204, 34, // Skip to: 40641 /* 31733 */ MCD_OPC_Decode, 243, 7, 228, 1, // Opcode: LDRSHWroX /* 31738 */ MCD_OPC_FilterValue, 3, 195, 34, // Skip to: 40641 /* 31742 */ MCD_OPC_CheckField, 21, 1, 0, 189, 34, // Skip to: 40641 /* 31748 */ MCD_OPC_Decode, 241, 7, 226, 1, // Opcode: LDRSHWpre /* 31753 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31762 /* 31757 */ MCD_OPC_Decode, 234, 14, 231, 1, // Opcode: STRHHui /* 31762 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 31771 /* 31766 */ MCD_OPC_Decode, 218, 7, 231, 1, // Opcode: LDRHHui /* 31771 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 31780 /* 31775 */ MCD_OPC_Decode, 249, 7, 231, 1, // Opcode: LDRSHXui /* 31780 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 31789 /* 31784 */ MCD_OPC_Decode, 244, 7, 231, 1, // Opcode: LDRSHWui /* 31789 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 31810 /* 31793 */ MCD_OPC_CheckField, 21, 1, 0, 138, 34, // Skip to: 40641 /* 31799 */ MCD_OPC_CheckField, 10, 6, 0, 132, 34, // Skip to: 40641 /* 31805 */ MCD_OPC_Decode, 254, 9, 223, 1, // Opcode: SBCSWr /* 31810 */ MCD_OPC_FilterValue, 9, 123, 34, // Skip to: 40641 /* 31814 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31817 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 31838 /* 31821 */ MCD_OPC_CheckField, 21, 1, 0, 110, 34, // Skip to: 40641 /* 31827 */ MCD_OPC_CheckField, 4, 1, 0, 104, 34, // Skip to: 40641 /* 31833 */ MCD_OPC_Decode, 140, 1, 232, 1, // Opcode: CCMPWr /* 31838 */ MCD_OPC_FilterValue, 2, 95, 34, // Skip to: 40641 /* 31842 */ MCD_OPC_CheckField, 21, 1, 0, 89, 34, // Skip to: 40641 /* 31848 */ MCD_OPC_CheckField, 4, 1, 0, 83, 34, // Skip to: 40641 /* 31854 */ MCD_OPC_Decode, 139, 1, 233, 1, // Opcode: CCMPWi /* 31859 */ MCD_OPC_FilterValue, 4, 62, 1, // Skip to: 32181 /* 31863 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 31866 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31875 /* 31870 */ MCD_OPC_Decode, 250, 7, 212, 1, // Opcode: LDRSWl /* 31875 */ MCD_OPC_FilterValue, 2, 190, 0, // Skip to: 32069 /* 31879 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 31882 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 31927 /* 31886 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 31889 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 31903 /* 31893 */ MCD_OPC_CheckField, 12, 4, 0, 38, 34, // Skip to: 40641 /* 31899 */ MCD_OPC_Decode, 33, 235, 1, // Opcode: ADCXr /* 31903 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31912 /* 31907 */ MCD_OPC_Decode, 135, 2, 236, 1, // Opcode: CSELXr /* 31912 */ MCD_OPC_FilterValue, 6, 21, 34, // Skip to: 40641 /* 31916 */ MCD_OPC_CheckField, 12, 4, 2, 15, 34, // Skip to: 40641 /* 31922 */ MCD_OPC_Decode, 177, 8, 235, 1, // Opcode: LSLVXr /* 31927 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 31958 /* 31931 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 31934 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31943 /* 31938 */ MCD_OPC_Decode, 137, 2, 236, 1, // Opcode: CSINCXr /* 31943 */ MCD_OPC_FilterValue, 6, 246, 33, // Skip to: 40641 /* 31947 */ MCD_OPC_CheckField, 12, 4, 2, 240, 33, // Skip to: 40641 /* 31953 */ MCD_OPC_Decode, 179, 8, 235, 1, // Opcode: LSRVXr /* 31958 */ MCD_OPC_FilterValue, 2, 32, 0, // Skip to: 31994 /* 31962 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 31965 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31980 /* 31969 */ MCD_OPC_CheckField, 21, 3, 6, 218, 33, // Skip to: 40641 /* 31975 */ MCD_OPC_Decode, 181, 16, 235, 1, // Opcode: UDIVXr /* 31980 */ MCD_OPC_FilterValue, 2, 209, 33, // Skip to: 40641 /* 31984 */ MCD_OPC_CheckField, 21, 3, 6, 203, 33, // Skip to: 40641 /* 31990 */ MCD_OPC_Decode, 102, 235, 1, // Opcode: ASRVXr /* 31994 */ MCD_OPC_FilterValue, 3, 195, 33, // Skip to: 40641 /* 31998 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 32001 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32016 /* 32005 */ MCD_OPC_CheckField, 21, 3, 6, 182, 33, // Skip to: 40641 /* 32011 */ MCD_OPC_Decode, 151, 10, 235, 1, // Opcode: SDIVXr /* 32016 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 32031 /* 32020 */ MCD_OPC_CheckField, 21, 3, 6, 167, 33, // Skip to: 40641 /* 32026 */ MCD_OPC_Decode, 188, 9, 235, 1, // Opcode: RORVXr /* 32031 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 32050 /* 32035 */ MCD_OPC_CheckPredicate, 2, 154, 33, // Skip to: 40641 /* 32039 */ MCD_OPC_CheckField, 21, 3, 6, 148, 33, // Skip to: 40641 /* 32045 */ MCD_OPC_Decode, 133, 2, 237, 1, // Opcode: CRC32Xrr /* 32050 */ MCD_OPC_FilterValue, 5, 139, 33, // Skip to: 40641 /* 32054 */ MCD_OPC_CheckPredicate, 2, 135, 33, // Skip to: 40641 /* 32058 */ MCD_OPC_CheckField, 21, 3, 6, 129, 33, // Skip to: 40641 /* 32064 */ MCD_OPC_Decode, 130, 2, 237, 1, // Opcode: CRC32CXrr /* 32069 */ MCD_OPC_FilterValue, 3, 120, 33, // Skip to: 40641 /* 32073 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 32076 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 32101 /* 32080 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 32083 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32092 /* 32087 */ MCD_OPC_Decode, 181, 8, 238, 1, // Opcode: MADDXrrr /* 32092 */ MCD_OPC_FilterValue, 1, 97, 33, // Skip to: 40641 /* 32096 */ MCD_OPC_Decode, 230, 8, 238, 1, // Opcode: MSUBXrrr /* 32101 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 32126 /* 32105 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 32108 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32117 /* 32112 */ MCD_OPC_Decode, 204, 10, 239, 1, // Opcode: SMADDLrrr /* 32117 */ MCD_OPC_FilterValue, 1, 72, 33, // Skip to: 40641 /* 32121 */ MCD_OPC_Decode, 137, 11, 239, 1, // Opcode: SMSUBLrrr /* 32126 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 32141 /* 32130 */ MCD_OPC_CheckField, 15, 1, 0, 57, 33, // Skip to: 40641 /* 32136 */ MCD_OPC_Decode, 138, 11, 235, 1, // Opcode: SMULHrr /* 32141 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 32166 /* 32145 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 32148 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32157 /* 32152 */ MCD_OPC_Decode, 196, 16, 239, 1, // Opcode: UMADDLrrr /* 32157 */ MCD_OPC_FilterValue, 1, 32, 33, // Skip to: 40641 /* 32161 */ MCD_OPC_Decode, 255, 16, 239, 1, // Opcode: UMSUBLrrr /* 32166 */ MCD_OPC_FilterValue, 6, 23, 33, // Skip to: 40641 /* 32170 */ MCD_OPC_CheckField, 15, 1, 0, 17, 33, // Skip to: 40641 /* 32176 */ MCD_OPC_Decode, 128, 17, 235, 1, // Opcode: UMULHrr /* 32181 */ MCD_OPC_FilterValue, 5, 122, 1, // Skip to: 32563 /* 32185 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 32188 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 32281 /* 32192 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32195 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32210 /* 32199 */ MCD_OPC_CheckField, 21, 1, 0, 244, 32, // Skip to: 40641 /* 32205 */ MCD_OPC_Decode, 143, 15, 226, 1, // Opcode: STURWi /* 32210 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32225 /* 32214 */ MCD_OPC_CheckField, 21, 1, 0, 229, 32, // Skip to: 40641 /* 32220 */ MCD_OPC_Decode, 250, 14, 226, 1, // Opcode: STRWpost /* 32225 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32266 /* 32229 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 32232 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32241 /* 32236 */ MCD_OPC_Decode, 134, 15, 226, 1, // Opcode: STTRWi /* 32241 */ MCD_OPC_FilterValue, 1, 204, 32, // Skip to: 40641 /* 32245 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 32248 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32257 /* 32252 */ MCD_OPC_Decode, 252, 14, 227, 1, // Opcode: STRWroW /* 32257 */ MCD_OPC_FilterValue, 3, 188, 32, // Skip to: 40641 /* 32261 */ MCD_OPC_Decode, 253, 14, 228, 1, // Opcode: STRWroX /* 32266 */ MCD_OPC_FilterValue, 3, 179, 32, // Skip to: 40641 /* 32270 */ MCD_OPC_CheckField, 21, 1, 0, 173, 32, // Skip to: 40641 /* 32276 */ MCD_OPC_Decode, 251, 14, 226, 1, // Opcode: STRWpre /* 32281 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 32374 /* 32285 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32288 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32303 /* 32292 */ MCD_OPC_CheckField, 21, 1, 0, 151, 32, // Skip to: 40641 /* 32298 */ MCD_OPC_Decode, 167, 8, 226, 1, // Opcode: LDURWi /* 32303 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32318 /* 32307 */ MCD_OPC_CheckField, 21, 1, 0, 136, 32, // Skip to: 40641 /* 32313 */ MCD_OPC_Decode, 135, 8, 226, 1, // Opcode: LDRWpost /* 32318 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32359 /* 32322 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 32325 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32334 /* 32329 */ MCD_OPC_Decode, 153, 8, 226, 1, // Opcode: LDTRWi /* 32334 */ MCD_OPC_FilterValue, 1, 111, 32, // Skip to: 40641 /* 32338 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 32341 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32350 /* 32345 */ MCD_OPC_Decode, 137, 8, 227, 1, // Opcode: LDRWroW /* 32350 */ MCD_OPC_FilterValue, 3, 95, 32, // Skip to: 40641 /* 32354 */ MCD_OPC_Decode, 138, 8, 228, 1, // Opcode: LDRWroX /* 32359 */ MCD_OPC_FilterValue, 3, 86, 32, // Skip to: 40641 /* 32363 */ MCD_OPC_CheckField, 21, 1, 0, 80, 32, // Skip to: 40641 /* 32369 */ MCD_OPC_Decode, 136, 8, 226, 1, // Opcode: LDRWpre /* 32374 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 32467 /* 32378 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32381 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32396 /* 32385 */ MCD_OPC_CheckField, 21, 1, 0, 58, 32, // Skip to: 40641 /* 32391 */ MCD_OPC_Decode, 165, 8, 226, 1, // Opcode: LDURSWi /* 32396 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32411 /* 32400 */ MCD_OPC_CheckField, 21, 1, 0, 43, 32, // Skip to: 40641 /* 32406 */ MCD_OPC_Decode, 251, 7, 226, 1, // Opcode: LDRSWpost /* 32411 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32452 /* 32415 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 32418 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32427 /* 32422 */ MCD_OPC_Decode, 152, 8, 226, 1, // Opcode: LDTRSWi /* 32427 */ MCD_OPC_FilterValue, 1, 18, 32, // Skip to: 40641 /* 32431 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 32434 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32443 /* 32438 */ MCD_OPC_Decode, 253, 7, 229, 1, // Opcode: LDRSWroW /* 32443 */ MCD_OPC_FilterValue, 3, 2, 32, // Skip to: 40641 /* 32447 */ MCD_OPC_Decode, 254, 7, 230, 1, // Opcode: LDRSWroX /* 32452 */ MCD_OPC_FilterValue, 3, 249, 31, // Skip to: 40641 /* 32456 */ MCD_OPC_CheckField, 21, 1, 0, 243, 31, // Skip to: 40641 /* 32462 */ MCD_OPC_Decode, 252, 7, 226, 1, // Opcode: LDRSWpre /* 32467 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32476 /* 32471 */ MCD_OPC_Decode, 254, 14, 231, 1, // Opcode: STRWui /* 32476 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 32485 /* 32480 */ MCD_OPC_Decode, 139, 8, 231, 1, // Opcode: LDRWui /* 32485 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 32494 /* 32489 */ MCD_OPC_Decode, 255, 7, 231, 1, // Opcode: LDRSWui /* 32494 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 32514 /* 32498 */ MCD_OPC_CheckField, 21, 1, 0, 201, 31, // Skip to: 40641 /* 32504 */ MCD_OPC_CheckField, 10, 6, 0, 195, 31, // Skip to: 40641 /* 32510 */ MCD_OPC_Decode, 31, 235, 1, // Opcode: ADCSXr /* 32514 */ MCD_OPC_FilterValue, 9, 187, 31, // Skip to: 40641 /* 32518 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32521 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 32542 /* 32525 */ MCD_OPC_CheckField, 21, 1, 0, 174, 31, // Skip to: 40641 /* 32531 */ MCD_OPC_CheckField, 4, 1, 0, 168, 31, // Skip to: 40641 /* 32537 */ MCD_OPC_Decode, 138, 1, 240, 1, // Opcode: CCMNXr /* 32542 */ MCD_OPC_FilterValue, 2, 159, 31, // Skip to: 40641 /* 32546 */ MCD_OPC_CheckField, 21, 1, 0, 153, 31, // Skip to: 40641 /* 32552 */ MCD_OPC_CheckField, 4, 1, 0, 147, 31, // Skip to: 40641 /* 32558 */ MCD_OPC_Decode, 137, 1, 241, 1, // Opcode: CCMNXi /* 32563 */ MCD_OPC_FilterValue, 6, 148, 0, // Skip to: 32715 /* 32567 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 32570 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32579 /* 32574 */ MCD_OPC_Decode, 153, 9, 242, 1, // Opcode: PRFMl /* 32579 */ MCD_OPC_FilterValue, 2, 122, 31, // Skip to: 40641 /* 32583 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32586 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 32642 /* 32590 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 32593 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32608 /* 32597 */ MCD_OPC_CheckField, 12, 4, 0, 102, 31, // Skip to: 40641 /* 32603 */ MCD_OPC_Decode, 129, 10, 235, 1, // Opcode: SBCXr /* 32608 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32617 /* 32612 */ MCD_OPC_Decode, 139, 2, 236, 1, // Opcode: CSINVXr /* 32617 */ MCD_OPC_FilterValue, 6, 84, 31, // Skip to: 40641 /* 32621 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ... /* 32624 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32633 /* 32628 */ MCD_OPC_Decode, 165, 9, 243, 1, // Opcode: RBITXr /* 32633 */ MCD_OPC_FilterValue, 1, 68, 31, // Skip to: 40641 /* 32637 */ MCD_OPC_Decode, 153, 1, 243, 1, // Opcode: CLZXr /* 32642 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 32683 /* 32646 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 32649 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32658 /* 32653 */ MCD_OPC_Decode, 141, 2, 236, 1, // Opcode: CSNEGXr /* 32658 */ MCD_OPC_FilterValue, 6, 43, 31, // Skip to: 40641 /* 32662 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ... /* 32665 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32674 /* 32669 */ MCD_OPC_Decode, 171, 9, 243, 1, // Opcode: REV16Xr /* 32674 */ MCD_OPC_FilterValue, 1, 27, 31, // Skip to: 40641 /* 32678 */ MCD_OPC_Decode, 145, 1, 243, 1, // Opcode: CLSXr /* 32683 */ MCD_OPC_FilterValue, 2, 12, 0, // Skip to: 32699 /* 32687 */ MCD_OPC_CheckField, 12, 12, 128, 24, 11, 31, // Skip to: 40641 /* 32694 */ MCD_OPC_Decode, 174, 9, 243, 1, // Opcode: REV32Xr /* 32699 */ MCD_OPC_FilterValue, 3, 2, 31, // Skip to: 40641 /* 32703 */ MCD_OPC_CheckField, 12, 12, 128, 24, 251, 30, // Skip to: 40641 /* 32710 */ MCD_OPC_Decode, 186, 9, 243, 1, // Opcode: REVXr /* 32715 */ MCD_OPC_FilterValue, 7, 242, 30, // Skip to: 40641 /* 32719 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 32722 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 32815 /* 32726 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32729 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32744 /* 32733 */ MCD_OPC_CheckField, 21, 1, 0, 222, 30, // Skip to: 40641 /* 32739 */ MCD_OPC_Decode, 144, 15, 226, 1, // Opcode: STURXi /* 32744 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32759 /* 32748 */ MCD_OPC_CheckField, 21, 1, 0, 207, 30, // Skip to: 40641 /* 32754 */ MCD_OPC_Decode, 255, 14, 226, 1, // Opcode: STRXpost /* 32759 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32800 /* 32763 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 32766 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32775 /* 32770 */ MCD_OPC_Decode, 135, 15, 226, 1, // Opcode: STTRXi /* 32775 */ MCD_OPC_FilterValue, 1, 182, 30, // Skip to: 40641 /* 32779 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 32782 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32791 /* 32786 */ MCD_OPC_Decode, 129, 15, 229, 1, // Opcode: STRXroW /* 32791 */ MCD_OPC_FilterValue, 3, 166, 30, // Skip to: 40641 /* 32795 */ MCD_OPC_Decode, 130, 15, 230, 1, // Opcode: STRXroX /* 32800 */ MCD_OPC_FilterValue, 3, 157, 30, // Skip to: 40641 /* 32804 */ MCD_OPC_CheckField, 21, 1, 0, 151, 30, // Skip to: 40641 /* 32810 */ MCD_OPC_Decode, 128, 15, 226, 1, // Opcode: STRXpre /* 32815 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 32908 /* 32819 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32822 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32837 /* 32826 */ MCD_OPC_CheckField, 21, 1, 0, 129, 30, // Skip to: 40641 /* 32832 */ MCD_OPC_Decode, 168, 8, 226, 1, // Opcode: LDURXi /* 32837 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32852 /* 32841 */ MCD_OPC_CheckField, 21, 1, 0, 114, 30, // Skip to: 40641 /* 32847 */ MCD_OPC_Decode, 141, 8, 226, 1, // Opcode: LDRXpost /* 32852 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32893 /* 32856 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 32859 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32868 /* 32863 */ MCD_OPC_Decode, 154, 8, 226, 1, // Opcode: LDTRXi /* 32868 */ MCD_OPC_FilterValue, 1, 89, 30, // Skip to: 40641 /* 32872 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 32875 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32884 /* 32879 */ MCD_OPC_Decode, 143, 8, 229, 1, // Opcode: LDRXroW /* 32884 */ MCD_OPC_FilterValue, 3, 73, 30, // Skip to: 40641 /* 32888 */ MCD_OPC_Decode, 144, 8, 230, 1, // Opcode: LDRXroX /* 32893 */ MCD_OPC_FilterValue, 3, 64, 30, // Skip to: 40641 /* 32897 */ MCD_OPC_CheckField, 21, 1, 0, 58, 30, // Skip to: 40641 /* 32903 */ MCD_OPC_Decode, 142, 8, 226, 1, // Opcode: LDRXpre /* 32908 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 32967 /* 32912 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 32915 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32930 /* 32919 */ MCD_OPC_CheckField, 21, 1, 0, 36, 30, // Skip to: 40641 /* 32925 */ MCD_OPC_Decode, 157, 9, 226, 1, // Opcode: PRFUMi /* 32930 */ MCD_OPC_FilterValue, 2, 27, 30, // Skip to: 40641 /* 32934 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 32937 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 32952 /* 32941 */ MCD_OPC_CheckField, 21, 1, 1, 14, 30, // Skip to: 40641 /* 32947 */ MCD_OPC_Decode, 154, 9, 244, 1, // Opcode: PRFMroW /* 32952 */ MCD_OPC_FilterValue, 3, 5, 30, // Skip to: 40641 /* 32956 */ MCD_OPC_CheckField, 21, 1, 1, 255, 29, // Skip to: 40641 /* 32962 */ MCD_OPC_Decode, 155, 9, 245, 1, // Opcode: PRFMroX /* 32967 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32976 /* 32971 */ MCD_OPC_Decode, 131, 15, 231, 1, // Opcode: STRXui /* 32976 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 32985 /* 32980 */ MCD_OPC_Decode, 145, 8, 231, 1, // Opcode: LDRXui /* 32985 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 32994 /* 32989 */ MCD_OPC_Decode, 156, 9, 231, 1, // Opcode: PRFMui /* 32994 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 33015 /* 32998 */ MCD_OPC_CheckField, 21, 1, 0, 213, 29, // Skip to: 40641 /* 33004 */ MCD_OPC_CheckField, 10, 6, 0, 207, 29, // Skip to: 40641 /* 33010 */ MCD_OPC_Decode, 255, 9, 235, 1, // Opcode: SBCSXr /* 33015 */ MCD_OPC_FilterValue, 9, 198, 29, // Skip to: 40641 /* 33019 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 33022 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 33043 /* 33026 */ MCD_OPC_CheckField, 21, 1, 0, 185, 29, // Skip to: 40641 /* 33032 */ MCD_OPC_CheckField, 4, 1, 0, 179, 29, // Skip to: 40641 /* 33038 */ MCD_OPC_Decode, 142, 1, 240, 1, // Opcode: CCMPXr /* 33043 */ MCD_OPC_FilterValue, 2, 170, 29, // Skip to: 40641 /* 33047 */ MCD_OPC_CheckField, 21, 1, 0, 164, 29, // Skip to: 40641 /* 33053 */ MCD_OPC_CheckField, 4, 1, 0, 158, 29, // Skip to: 40641 /* 33059 */ MCD_OPC_Decode, 141, 1, 241, 1, // Opcode: CCMPXi /* 33064 */ MCD_OPC_FilterValue, 7, 149, 29, // Skip to: 40641 /* 33068 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ... /* 33071 */ MCD_OPC_FilterValue, 0, 8, 6, // Skip to: 34619 /* 33075 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 33078 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 33087 /* 33082 */ MCD_OPC_Decode, 128, 8, 246, 1, // Opcode: LDRSl /* 33087 */ MCD_OPC_FilterValue, 2, 109, 5, // Skip to: 34480 /* 33091 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 33094 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 33153 /* 33098 */ MCD_OPC_ExtractField, 15, 6, // Inst{20-15} ... /* 33101 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33114 /* 33105 */ MCD_OPC_CheckPredicate, 3, 108, 29, // Skip to: 40641 /* 33109 */ MCD_OPC_Decode, 133, 10, 247, 1, // Opcode: SCVTFSWSri /* 33114 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33127 /* 33118 */ MCD_OPC_CheckPredicate, 3, 95, 29, // Skip to: 40641 /* 33122 */ MCD_OPC_Decode, 163, 16, 247, 1, // Opcode: UCVTFSWSri /* 33127 */ MCD_OPC_FilterValue, 49, 9, 0, // Skip to: 33140 /* 33131 */ MCD_OPC_CheckPredicate, 3, 82, 29, // Skip to: 40641 /* 33135 */ MCD_OPC_Decode, 226, 3, 248, 1, // Opcode: FCVTZSSWSri /* 33140 */ MCD_OPC_FilterValue, 51, 73, 29, // Skip to: 40641 /* 33144 */ MCD_OPC_CheckPredicate, 3, 69, 29, // Skip to: 40641 /* 33148 */ MCD_OPC_Decode, 255, 3, 248, 1, // Opcode: FCVTZUSWSri /* 33153 */ MCD_OPC_FilterValue, 1, 125, 2, // Skip to: 33794 /* 33157 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 33160 */ MCD_OPC_FilterValue, 0, 204, 1, // Skip to: 33624 /* 33164 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 33167 */ MCD_OPC_FilterValue, 0, 178, 1, // Skip to: 33605 /* 33171 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 33174 */ MCD_OPC_FilterValue, 0, 185, 0, // Skip to: 33363 /* 33178 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 33181 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33194 /* 33185 */ MCD_OPC_CheckPredicate, 3, 28, 29, // Skip to: 40641 /* 33189 */ MCD_OPC_Decode, 181, 3, 249, 1, // Opcode: FCVTNSUWSr /* 33194 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33207 /* 33198 */ MCD_OPC_CheckPredicate, 3, 15, 29, // Skip to: 40641 /* 33202 */ MCD_OPC_Decode, 190, 3, 249, 1, // Opcode: FCVTNUUWSr /* 33207 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 33220 /* 33211 */ MCD_OPC_CheckPredicate, 3, 2, 29, // Skip to: 40641 /* 33215 */ MCD_OPC_Decode, 137, 10, 250, 1, // Opcode: SCVTFUWSri /* 33220 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 33233 /* 33224 */ MCD_OPC_CheckPredicate, 3, 245, 28, // Skip to: 40641 /* 33228 */ MCD_OPC_Decode, 167, 16, 250, 1, // Opcode: UCVTFUWSri /* 33233 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33246 /* 33237 */ MCD_OPC_CheckPredicate, 3, 232, 28, // Skip to: 40641 /* 33241 */ MCD_OPC_Decode, 137, 3, 249, 1, // Opcode: FCVTASUWSr /* 33246 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33259 /* 33250 */ MCD_OPC_CheckPredicate, 3, 219, 28, // Skip to: 40641 /* 33254 */ MCD_OPC_Decode, 146, 3, 249, 1, // Opcode: FCVTAUUWSr /* 33259 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 33272 /* 33263 */ MCD_OPC_CheckPredicate, 3, 206, 28, // Skip to: 40641 /* 33267 */ MCD_OPC_Decode, 226, 4, 249, 1, // Opcode: FMOVSWr /* 33272 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33285 /* 33276 */ MCD_OPC_CheckPredicate, 3, 193, 28, // Skip to: 40641 /* 33280 */ MCD_OPC_Decode, 229, 4, 250, 1, // Opcode: FMOVWSr /* 33285 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 33298 /* 33289 */ MCD_OPC_CheckPredicate, 3, 180, 28, // Skip to: 40641 /* 33293 */ MCD_OPC_Decode, 203, 3, 249, 1, // Opcode: FCVTPSUWSr /* 33298 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 33311 /* 33302 */ MCD_OPC_CheckPredicate, 3, 167, 28, // Skip to: 40641 /* 33306 */ MCD_OPC_Decode, 212, 3, 249, 1, // Opcode: FCVTPUUWSr /* 33311 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 33324 /* 33315 */ MCD_OPC_CheckPredicate, 3, 154, 28, // Skip to: 40641 /* 33319 */ MCD_OPC_Decode, 163, 3, 249, 1, // Opcode: FCVTMSUWSr /* 33324 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 33337 /* 33328 */ MCD_OPC_CheckPredicate, 3, 141, 28, // Skip to: 40641 /* 33332 */ MCD_OPC_Decode, 172, 3, 249, 1, // Opcode: FCVTMUUWSr /* 33337 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 33350 /* 33341 */ MCD_OPC_CheckPredicate, 3, 128, 28, // Skip to: 40641 /* 33345 */ MCD_OPC_Decode, 230, 3, 249, 1, // Opcode: FCVTZSUWSr /* 33350 */ MCD_OPC_FilterValue, 25, 119, 28, // Skip to: 40641 /* 33354 */ MCD_OPC_CheckPredicate, 3, 115, 28, // Skip to: 40641 /* 33358 */ MCD_OPC_Decode, 131, 4, 249, 1, // Opcode: FCVTZUUWSr /* 33363 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 33422 /* 33367 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ... /* 33370 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33383 /* 33374 */ MCD_OPC_CheckPredicate, 3, 95, 28, // Skip to: 40641 /* 33378 */ MCD_OPC_Decode, 133, 3, 251, 1, // Opcode: FCMPSrr /* 33383 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 33396 /* 33387 */ MCD_OPC_CheckPredicate, 3, 82, 28, // Skip to: 40641 /* 33391 */ MCD_OPC_Decode, 132, 3, 252, 1, // Opcode: FCMPSri /* 33396 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 33409 /* 33400 */ MCD_OPC_CheckPredicate, 3, 69, 28, // Skip to: 40641 /* 33404 */ MCD_OPC_Decode, 131, 3, 251, 1, // Opcode: FCMPESrr /* 33409 */ MCD_OPC_FilterValue, 24, 60, 28, // Skip to: 40641 /* 33413 */ MCD_OPC_CheckPredicate, 3, 56, 28, // Skip to: 40641 /* 33417 */ MCD_OPC_Decode, 130, 3, 252, 1, // Opcode: FCMPESri /* 33422 */ MCD_OPC_FilterValue, 2, 81, 0, // Skip to: 33507 /* 33426 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 33429 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33442 /* 33433 */ MCD_OPC_CheckPredicate, 3, 36, 28, // Skip to: 40641 /* 33437 */ MCD_OPC_Decode, 228, 4, 253, 1, // Opcode: FMOVSr /* 33442 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33455 /* 33446 */ MCD_OPC_CheckPredicate, 3, 23, 28, // Skip to: 40641 /* 33450 */ MCD_OPC_Decode, 130, 5, 253, 1, // Opcode: FNEGSr /* 33455 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33468 /* 33459 */ MCD_OPC_CheckPredicate, 3, 10, 28, // Skip to: 40641 /* 33463 */ MCD_OPC_Decode, 168, 5, 253, 1, // Opcode: FRINTNSr /* 33468 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33481 /* 33472 */ MCD_OPC_CheckPredicate, 3, 253, 27, // Skip to: 40641 /* 33476 */ MCD_OPC_Decode, 163, 5, 253, 1, // Opcode: FRINTMSr /* 33481 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 33494 /* 33485 */ MCD_OPC_CheckPredicate, 3, 240, 27, // Skip to: 40641 /* 33489 */ MCD_OPC_Decode, 153, 5, 253, 1, // Opcode: FRINTASr /* 33494 */ MCD_OPC_FilterValue, 7, 231, 27, // Skip to: 40641 /* 33498 */ MCD_OPC_CheckPredicate, 3, 227, 27, // Skip to: 40641 /* 33502 */ MCD_OPC_Decode, 178, 5, 253, 1, // Opcode: FRINTXSr /* 33507 */ MCD_OPC_FilterValue, 6, 218, 27, // Skip to: 40641 /* 33511 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 33514 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33527 /* 33518 */ MCD_OPC_CheckPredicate, 3, 207, 27, // Skip to: 40641 /* 33522 */ MCD_OPC_Decode, 186, 2, 253, 1, // Opcode: FABSSr /* 33527 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33540 /* 33531 */ MCD_OPC_CheckPredicate, 3, 194, 27, // Skip to: 40641 /* 33535 */ MCD_OPC_Decode, 198, 5, 253, 1, // Opcode: FSQRTSr /* 33540 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 33553 /* 33544 */ MCD_OPC_CheckPredicate, 3, 181, 27, // Skip to: 40641 /* 33548 */ MCD_OPC_Decode, 155, 3, 254, 1, // Opcode: FCVTDSr /* 33553 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 33566 /* 33557 */ MCD_OPC_CheckPredicate, 3, 168, 27, // Skip to: 40641 /* 33561 */ MCD_OPC_Decode, 157, 3, 255, 1, // Opcode: FCVTHSr /* 33566 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33579 /* 33570 */ MCD_OPC_CheckPredicate, 3, 155, 27, // Skip to: 40641 /* 33574 */ MCD_OPC_Decode, 173, 5, 253, 1, // Opcode: FRINTPSr /* 33579 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33592 /* 33583 */ MCD_OPC_CheckPredicate, 3, 142, 27, // Skip to: 40641 /* 33587 */ MCD_OPC_Decode, 183, 5, 253, 1, // Opcode: FRINTZSr /* 33592 */ MCD_OPC_FilterValue, 7, 133, 27, // Skip to: 40641 /* 33596 */ MCD_OPC_CheckPredicate, 3, 129, 27, // Skip to: 40641 /* 33600 */ MCD_OPC_Decode, 158, 5, 253, 1, // Opcode: FRINTISr /* 33605 */ MCD_OPC_FilterValue, 1, 120, 27, // Skip to: 40641 /* 33609 */ MCD_OPC_CheckPredicate, 3, 116, 27, // Skip to: 40641 /* 33613 */ MCD_OPC_CheckField, 5, 5, 0, 110, 27, // Skip to: 40641 /* 33619 */ MCD_OPC_Decode, 227, 4, 128, 2, // Opcode: FMOVSi /* 33624 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 33657 /* 33628 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 33631 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33644 /* 33635 */ MCD_OPC_CheckPredicate, 3, 90, 27, // Skip to: 40641 /* 33639 */ MCD_OPC_Decode, 213, 2, 129, 2, // Opcode: FCCMPSrr /* 33644 */ MCD_OPC_FilterValue, 1, 81, 27, // Skip to: 40641 /* 33648 */ MCD_OPC_CheckPredicate, 3, 77, 27, // Skip to: 40641 /* 33652 */ MCD_OPC_Decode, 212, 2, 129, 2, // Opcode: FCCMPESrr /* 33657 */ MCD_OPC_FilterValue, 2, 120, 0, // Skip to: 33781 /* 33661 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 33664 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33677 /* 33668 */ MCD_OPC_CheckPredicate, 3, 57, 27, // Skip to: 40641 /* 33672 */ MCD_OPC_Decode, 238, 4, 130, 2, // Opcode: FMULSrr /* 33677 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33690 /* 33681 */ MCD_OPC_CheckPredicate, 3, 44, 27, // Skip to: 40641 /* 33685 */ MCD_OPC_Decode, 156, 4, 130, 2, // Opcode: FDIVSrr /* 33690 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 33703 /* 33694 */ MCD_OPC_CheckPredicate, 3, 31, 27, // Skip to: 40641 /* 33698 */ MCD_OPC_Decode, 206, 2, 130, 2, // Opcode: FADDSrr /* 33703 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 33716 /* 33707 */ MCD_OPC_CheckPredicate, 3, 18, 27, // Skip to: 40641 /* 33711 */ MCD_OPC_Decode, 203, 5, 130, 2, // Opcode: FSUBSrr /* 33716 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33729 /* 33720 */ MCD_OPC_CheckPredicate, 3, 5, 27, // Skip to: 40641 /* 33724 */ MCD_OPC_Decode, 179, 4, 130, 2, // Opcode: FMAXSrr /* 33729 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33742 /* 33733 */ MCD_OPC_CheckPredicate, 3, 248, 26, // Skip to: 40641 /* 33737 */ MCD_OPC_Decode, 201, 4, 130, 2, // Opcode: FMINSrr /* 33742 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 33755 /* 33746 */ MCD_OPC_CheckPredicate, 3, 235, 26, // Skip to: 40641 /* 33750 */ MCD_OPC_Decode, 169, 4, 130, 2, // Opcode: FMAXNMSrr /* 33755 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33768 /* 33759 */ MCD_OPC_CheckPredicate, 3, 222, 26, // Skip to: 40641 /* 33763 */ MCD_OPC_Decode, 191, 4, 130, 2, // Opcode: FMINNMSrr /* 33768 */ MCD_OPC_FilterValue, 8, 213, 26, // Skip to: 40641 /* 33772 */ MCD_OPC_CheckPredicate, 3, 209, 26, // Skip to: 40641 /* 33776 */ MCD_OPC_Decode, 139, 5, 130, 2, // Opcode: FNMULSrr /* 33781 */ MCD_OPC_FilterValue, 3, 200, 26, // Skip to: 40641 /* 33785 */ MCD_OPC_CheckPredicate, 3, 196, 26, // Skip to: 40641 /* 33789 */ MCD_OPC_Decode, 135, 3, 131, 2, // Opcode: FCSELSrrr /* 33794 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 33853 /* 33798 */ MCD_OPC_ExtractField, 15, 6, // Inst{20-15} ... /* 33801 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33814 /* 33805 */ MCD_OPC_CheckPredicate, 3, 176, 26, // Skip to: 40641 /* 33809 */ MCD_OPC_Decode, 132, 10, 132, 2, // Opcode: SCVTFSWDri /* 33814 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33827 /* 33818 */ MCD_OPC_CheckPredicate, 3, 163, 26, // Skip to: 40641 /* 33822 */ MCD_OPC_Decode, 162, 16, 132, 2, // Opcode: UCVTFSWDri /* 33827 */ MCD_OPC_FilterValue, 49, 9, 0, // Skip to: 33840 /* 33831 */ MCD_OPC_CheckPredicate, 3, 150, 26, // Skip to: 40641 /* 33835 */ MCD_OPC_Decode, 225, 3, 133, 2, // Opcode: FCVTZSSWDri /* 33840 */ MCD_OPC_FilterValue, 51, 141, 26, // Skip to: 40641 /* 33844 */ MCD_OPC_CheckPredicate, 3, 137, 26, // Skip to: 40641 /* 33848 */ MCD_OPC_Decode, 254, 3, 133, 2, // Opcode: FCVTZUSWDri /* 33853 */ MCD_OPC_FilterValue, 3, 76, 2, // Skip to: 34445 /* 33857 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 33860 */ MCD_OPC_FilterValue, 0, 164, 1, // Skip to: 34284 /* 33864 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 33867 */ MCD_OPC_FilterValue, 0, 138, 1, // Skip to: 34265 /* 33871 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 33874 */ MCD_OPC_FilterValue, 0, 157, 0, // Skip to: 34035 /* 33878 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 33881 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33894 /* 33885 */ MCD_OPC_CheckPredicate, 3, 96, 26, // Skip to: 40641 /* 33889 */ MCD_OPC_Decode, 180, 3, 134, 2, // Opcode: FCVTNSUWDr /* 33894 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33907 /* 33898 */ MCD_OPC_CheckPredicate, 3, 83, 26, // Skip to: 40641 /* 33902 */ MCD_OPC_Decode, 189, 3, 134, 2, // Opcode: FCVTNUUWDr /* 33907 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 33919 /* 33911 */ MCD_OPC_CheckPredicate, 3, 70, 26, // Skip to: 40641 /* 33915 */ MCD_OPC_Decode, 136, 10, 91, // Opcode: SCVTFUWDri /* 33919 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 33931 /* 33923 */ MCD_OPC_CheckPredicate, 3, 58, 26, // Skip to: 40641 /* 33927 */ MCD_OPC_Decode, 166, 16, 91, // Opcode: UCVTFUWDri /* 33931 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33944 /* 33935 */ MCD_OPC_CheckPredicate, 3, 46, 26, // Skip to: 40641 /* 33939 */ MCD_OPC_Decode, 136, 3, 134, 2, // Opcode: FCVTASUWDr /* 33944 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33957 /* 33948 */ MCD_OPC_CheckPredicate, 3, 33, 26, // Skip to: 40641 /* 33952 */ MCD_OPC_Decode, 145, 3, 134, 2, // Opcode: FCVTAUUWDr /* 33957 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 33970 /* 33961 */ MCD_OPC_CheckPredicate, 3, 20, 26, // Skip to: 40641 /* 33965 */ MCD_OPC_Decode, 202, 3, 134, 2, // Opcode: FCVTPSUWDr /* 33970 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 33983 /* 33974 */ MCD_OPC_CheckPredicate, 3, 7, 26, // Skip to: 40641 /* 33978 */ MCD_OPC_Decode, 211, 3, 134, 2, // Opcode: FCVTPUUWDr /* 33983 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 33996 /* 33987 */ MCD_OPC_CheckPredicate, 3, 250, 25, // Skip to: 40641 /* 33991 */ MCD_OPC_Decode, 162, 3, 134, 2, // Opcode: FCVTMSUWDr /* 33996 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 34009 /* 34000 */ MCD_OPC_CheckPredicate, 3, 237, 25, // Skip to: 40641 /* 34004 */ MCD_OPC_Decode, 171, 3, 134, 2, // Opcode: FCVTMUUWDr /* 34009 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 34022 /* 34013 */ MCD_OPC_CheckPredicate, 3, 224, 25, // Skip to: 40641 /* 34017 */ MCD_OPC_Decode, 229, 3, 134, 2, // Opcode: FCVTZSUWDr /* 34022 */ MCD_OPC_FilterValue, 25, 215, 25, // Skip to: 40641 /* 34026 */ MCD_OPC_CheckPredicate, 3, 211, 25, // Skip to: 40641 /* 34030 */ MCD_OPC_Decode, 130, 4, 134, 2, // Opcode: FCVTZUUWDr /* 34035 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 34094 /* 34039 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ... /* 34042 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34055 /* 34046 */ MCD_OPC_CheckPredicate, 3, 191, 25, // Skip to: 40641 /* 34050 */ MCD_OPC_Decode, 255, 2, 135, 2, // Opcode: FCMPDrr /* 34055 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 34068 /* 34059 */ MCD_OPC_CheckPredicate, 3, 178, 25, // Skip to: 40641 /* 34063 */ MCD_OPC_Decode, 254, 2, 136, 2, // Opcode: FCMPDri /* 34068 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 34081 /* 34072 */ MCD_OPC_CheckPredicate, 3, 165, 25, // Skip to: 40641 /* 34076 */ MCD_OPC_Decode, 129, 3, 135, 2, // Opcode: FCMPEDrr /* 34081 */ MCD_OPC_FilterValue, 24, 156, 25, // Skip to: 40641 /* 34085 */ MCD_OPC_CheckPredicate, 3, 152, 25, // Skip to: 40641 /* 34089 */ MCD_OPC_Decode, 128, 3, 136, 2, // Opcode: FCMPEDri /* 34094 */ MCD_OPC_FilterValue, 2, 88, 0, // Skip to: 34186 /* 34098 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 34101 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 34113 /* 34105 */ MCD_OPC_CheckPredicate, 3, 132, 25, // Skip to: 40641 /* 34109 */ MCD_OPC_Decode, 225, 4, 90, // Opcode: FMOVDr /* 34113 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 34125 /* 34117 */ MCD_OPC_CheckPredicate, 3, 120, 25, // Skip to: 40641 /* 34121 */ MCD_OPC_Decode, 129, 5, 90, // Opcode: FNEGDr /* 34125 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 34138 /* 34129 */ MCD_OPC_CheckPredicate, 3, 108, 25, // Skip to: 40641 /* 34133 */ MCD_OPC_Decode, 220, 3, 144, 1, // Opcode: FCVTSDr /* 34138 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 34150 /* 34142 */ MCD_OPC_CheckPredicate, 3, 95, 25, // Skip to: 40641 /* 34146 */ MCD_OPC_Decode, 167, 5, 90, // Opcode: FRINTNDr /* 34150 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 34162 /* 34154 */ MCD_OPC_CheckPredicate, 3, 83, 25, // Skip to: 40641 /* 34158 */ MCD_OPC_Decode, 162, 5, 90, // Opcode: FRINTMDr /* 34162 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 34174 /* 34166 */ MCD_OPC_CheckPredicate, 3, 71, 25, // Skip to: 40641 /* 34170 */ MCD_OPC_Decode, 152, 5, 90, // Opcode: FRINTADr /* 34174 */ MCD_OPC_FilterValue, 7, 63, 25, // Skip to: 40641 /* 34178 */ MCD_OPC_CheckPredicate, 3, 59, 25, // Skip to: 40641 /* 34182 */ MCD_OPC_Decode, 177, 5, 90, // Opcode: FRINTXDr /* 34186 */ MCD_OPC_FilterValue, 6, 51, 25, // Skip to: 40641 /* 34190 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 34193 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 34205 /* 34197 */ MCD_OPC_CheckPredicate, 3, 40, 25, // Skip to: 40641 /* 34201 */ MCD_OPC_Decode, 185, 2, 90, // Opcode: FABSDr /* 34205 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 34217 /* 34209 */ MCD_OPC_CheckPredicate, 3, 28, 25, // Skip to: 40641 /* 34213 */ MCD_OPC_Decode, 197, 5, 90, // Opcode: FSQRTDr /* 34217 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 34229 /* 34221 */ MCD_OPC_CheckPredicate, 3, 16, 25, // Skip to: 40641 /* 34225 */ MCD_OPC_Decode, 156, 3, 100, // Opcode: FCVTHDr /* 34229 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 34241 /* 34233 */ MCD_OPC_CheckPredicate, 3, 4, 25, // Skip to: 40641 /* 34237 */ MCD_OPC_Decode, 172, 5, 90, // Opcode: FRINTPDr /* 34241 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 34253 /* 34245 */ MCD_OPC_CheckPredicate, 3, 248, 24, // Skip to: 40641 /* 34249 */ MCD_OPC_Decode, 182, 5, 90, // Opcode: FRINTZDr /* 34253 */ MCD_OPC_FilterValue, 7, 240, 24, // Skip to: 40641 /* 34257 */ MCD_OPC_CheckPredicate, 3, 236, 24, // Skip to: 40641 /* 34261 */ MCD_OPC_Decode, 157, 5, 90, // Opcode: FRINTIDr /* 34265 */ MCD_OPC_FilterValue, 1, 228, 24, // Skip to: 40641 /* 34269 */ MCD_OPC_CheckPredicate, 3, 224, 24, // Skip to: 40641 /* 34273 */ MCD_OPC_CheckField, 5, 5, 0, 218, 24, // Skip to: 40641 /* 34279 */ MCD_OPC_Decode, 224, 4, 137, 2, // Opcode: FMOVDi /* 34284 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 34317 /* 34288 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 34291 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34304 /* 34295 */ MCD_OPC_CheckPredicate, 3, 198, 24, // Skip to: 40641 /* 34299 */ MCD_OPC_Decode, 210, 2, 138, 2, // Opcode: FCCMPDrr /* 34304 */ MCD_OPC_FilterValue, 1, 189, 24, // Skip to: 40641 /* 34308 */ MCD_OPC_CheckPredicate, 3, 185, 24, // Skip to: 40641 /* 34312 */ MCD_OPC_Decode, 211, 2, 138, 2, // Opcode: FCCMPEDrr /* 34317 */ MCD_OPC_FilterValue, 2, 111, 0, // Skip to: 34432 /* 34321 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 34324 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 34336 /* 34328 */ MCD_OPC_CheckPredicate, 3, 165, 24, // Skip to: 40641 /* 34332 */ MCD_OPC_Decode, 237, 4, 89, // Opcode: FMULDrr /* 34336 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 34348 /* 34340 */ MCD_OPC_CheckPredicate, 3, 153, 24, // Skip to: 40641 /* 34344 */ MCD_OPC_Decode, 155, 4, 89, // Opcode: FDIVDrr /* 34348 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 34360 /* 34352 */ MCD_OPC_CheckPredicate, 3, 141, 24, // Skip to: 40641 /* 34356 */ MCD_OPC_Decode, 200, 2, 89, // Opcode: FADDDrr /* 34360 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 34372 /* 34364 */ MCD_OPC_CheckPredicate, 3, 129, 24, // Skip to: 40641 /* 34368 */ MCD_OPC_Decode, 202, 5, 89, // Opcode: FSUBDrr /* 34372 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 34384 /* 34376 */ MCD_OPC_CheckPredicate, 3, 117, 24, // Skip to: 40641 /* 34380 */ MCD_OPC_Decode, 162, 4, 89, // Opcode: FMAXDrr /* 34384 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 34396 /* 34388 */ MCD_OPC_CheckPredicate, 3, 105, 24, // Skip to: 40641 /* 34392 */ MCD_OPC_Decode, 184, 4, 89, // Opcode: FMINDrr /* 34396 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 34408 /* 34400 */ MCD_OPC_CheckPredicate, 3, 93, 24, // Skip to: 40641 /* 34404 */ MCD_OPC_Decode, 163, 4, 89, // Opcode: FMAXNMDrr /* 34408 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 34420 /* 34412 */ MCD_OPC_CheckPredicate, 3, 81, 24, // Skip to: 40641 /* 34416 */ MCD_OPC_Decode, 185, 4, 89, // Opcode: FMINNMDrr /* 34420 */ MCD_OPC_FilterValue, 8, 73, 24, // Skip to: 40641 /* 34424 */ MCD_OPC_CheckPredicate, 3, 69, 24, // Skip to: 40641 /* 34428 */ MCD_OPC_Decode, 138, 5, 89, // Opcode: FNMULDrr /* 34432 */ MCD_OPC_FilterValue, 3, 61, 24, // Skip to: 40641 /* 34436 */ MCD_OPC_CheckPredicate, 3, 57, 24, // Skip to: 40641 /* 34440 */ MCD_OPC_Decode, 134, 3, 139, 2, // Opcode: FCSELDrrr /* 34445 */ MCD_OPC_FilterValue, 7, 48, 24, // Skip to: 40641 /* 34449 */ MCD_OPC_ExtractField, 10, 11, // Inst{20-10} ... /* 34452 */ MCD_OPC_FilterValue, 144, 1, 9, 0, // Skip to: 34466 /* 34457 */ MCD_OPC_CheckPredicate, 3, 36, 24, // Skip to: 40641 /* 34461 */ MCD_OPC_Decode, 221, 3, 140, 2, // Opcode: FCVTSHr /* 34466 */ MCD_OPC_FilterValue, 176, 1, 26, 24, // Skip to: 40641 /* 34471 */ MCD_OPC_CheckPredicate, 3, 22, 24, // Skip to: 40641 /* 34475 */ MCD_OPC_Decode, 154, 3, 141, 2, // Opcode: FCVTDHr /* 34480 */ MCD_OPC_FilterValue, 3, 13, 24, // Skip to: 40641 /* 34484 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 34487 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 34520 /* 34491 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 34494 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34507 /* 34498 */ MCD_OPC_CheckPredicate, 3, 251, 23, // Skip to: 40641 /* 34502 */ MCD_OPC_Decode, 161, 4, 142, 2, // Opcode: FMADDSrrr /* 34507 */ MCD_OPC_FilterValue, 1, 242, 23, // Skip to: 40641 /* 34511 */ MCD_OPC_CheckPredicate, 3, 238, 23, // Skip to: 40641 /* 34515 */ MCD_OPC_Decode, 236, 4, 142, 2, // Opcode: FMSUBSrrr /* 34520 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 34553 /* 34524 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 34527 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34540 /* 34531 */ MCD_OPC_CheckPredicate, 3, 218, 23, // Skip to: 40641 /* 34535 */ MCD_OPC_Decode, 135, 5, 142, 2, // Opcode: FNMADDSrrr /* 34540 */ MCD_OPC_FilterValue, 1, 209, 23, // Skip to: 40641 /* 34544 */ MCD_OPC_CheckPredicate, 3, 205, 23, // Skip to: 40641 /* 34548 */ MCD_OPC_Decode, 137, 5, 142, 2, // Opcode: FNMSUBSrrr /* 34553 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 34586 /* 34557 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 34560 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34573 /* 34564 */ MCD_OPC_CheckPredicate, 3, 185, 23, // Skip to: 40641 /* 34568 */ MCD_OPC_Decode, 160, 4, 143, 2, // Opcode: FMADDDrrr /* 34573 */ MCD_OPC_FilterValue, 1, 176, 23, // Skip to: 40641 /* 34577 */ MCD_OPC_CheckPredicate, 3, 172, 23, // Skip to: 40641 /* 34581 */ MCD_OPC_Decode, 235, 4, 143, 2, // Opcode: FMSUBDrrr /* 34586 */ MCD_OPC_FilterValue, 3, 163, 23, // Skip to: 40641 /* 34590 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 34593 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34606 /* 34597 */ MCD_OPC_CheckPredicate, 3, 152, 23, // Skip to: 40641 /* 34601 */ MCD_OPC_Decode, 134, 5, 143, 2, // Opcode: FNMADDDrrr /* 34606 */ MCD_OPC_FilterValue, 1, 143, 23, // Skip to: 40641 /* 34610 */ MCD_OPC_CheckPredicate, 3, 139, 23, // Skip to: 40641 /* 34614 */ MCD_OPC_Decode, 136, 5, 143, 2, // Opcode: FNMSUBDrrr /* 34619 */ MCD_OPC_FilterValue, 1, 139, 1, // Skip to: 35018 /* 34623 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 34626 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 34715 /* 34630 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 34633 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34648 /* 34637 */ MCD_OPC_CheckField, 21, 1, 0, 110, 23, // Skip to: 40641 /* 34643 */ MCD_OPC_Decode, 137, 15, 226, 1, // Opcode: STURBi /* 34648 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34663 /* 34652 */ MCD_OPC_CheckField, 21, 1, 0, 95, 23, // Skip to: 40641 /* 34658 */ MCD_OPC_Decode, 220, 14, 226, 1, // Opcode: STRBpost /* 34663 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34700 /* 34667 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 34670 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34685 /* 34674 */ MCD_OPC_CheckField, 21, 1, 1, 73, 23, // Skip to: 40641 /* 34680 */ MCD_OPC_Decode, 222, 14, 144, 2, // Opcode: STRBroW /* 34685 */ MCD_OPC_FilterValue, 3, 64, 23, // Skip to: 40641 /* 34689 */ MCD_OPC_CheckField, 21, 1, 1, 58, 23, // Skip to: 40641 /* 34695 */ MCD_OPC_Decode, 223, 14, 145, 2, // Opcode: STRBroX /* 34700 */ MCD_OPC_FilterValue, 3, 49, 23, // Skip to: 40641 /* 34704 */ MCD_OPC_CheckField, 21, 1, 0, 43, 23, // Skip to: 40641 /* 34710 */ MCD_OPC_Decode, 221, 14, 226, 1, // Opcode: STRBpre /* 34715 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 34804 /* 34719 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 34722 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34737 /* 34726 */ MCD_OPC_CheckField, 21, 1, 0, 21, 23, // Skip to: 40641 /* 34732 */ MCD_OPC_Decode, 156, 8, 226, 1, // Opcode: LDURBi /* 34737 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34752 /* 34741 */ MCD_OPC_CheckField, 21, 1, 0, 6, 23, // Skip to: 40641 /* 34747 */ MCD_OPC_Decode, 203, 7, 226, 1, // Opcode: LDRBpost /* 34752 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34789 /* 34756 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 34759 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34774 /* 34763 */ MCD_OPC_CheckField, 21, 1, 1, 240, 22, // Skip to: 40641 /* 34769 */ MCD_OPC_Decode, 205, 7, 144, 2, // Opcode: LDRBroW /* 34774 */ MCD_OPC_FilterValue, 3, 231, 22, // Skip to: 40641 /* 34778 */ MCD_OPC_CheckField, 21, 1, 1, 225, 22, // Skip to: 40641 /* 34784 */ MCD_OPC_Decode, 206, 7, 145, 2, // Opcode: LDRBroX /* 34789 */ MCD_OPC_FilterValue, 3, 216, 22, // Skip to: 40641 /* 34793 */ MCD_OPC_CheckField, 21, 1, 0, 210, 22, // Skip to: 40641 /* 34799 */ MCD_OPC_Decode, 204, 7, 226, 1, // Opcode: LDRBpre /* 34804 */ MCD_OPC_FilterValue, 2, 85, 0, // Skip to: 34893 /* 34808 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 34811 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34826 /* 34815 */ MCD_OPC_CheckField, 21, 1, 0, 188, 22, // Skip to: 40641 /* 34821 */ MCD_OPC_Decode, 141, 15, 226, 1, // Opcode: STURQi /* 34826 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34841 /* 34830 */ MCD_OPC_CheckField, 21, 1, 0, 173, 22, // Skip to: 40641 /* 34836 */ MCD_OPC_Decode, 240, 14, 226, 1, // Opcode: STRQpost /* 34841 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34878 /* 34845 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 34848 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34863 /* 34852 */ MCD_OPC_CheckField, 21, 1, 1, 151, 22, // Skip to: 40641 /* 34858 */ MCD_OPC_Decode, 242, 14, 146, 2, // Opcode: STRQroW /* 34863 */ MCD_OPC_FilterValue, 3, 142, 22, // Skip to: 40641 /* 34867 */ MCD_OPC_CheckField, 21, 1, 1, 136, 22, // Skip to: 40641 /* 34873 */ MCD_OPC_Decode, 243, 14, 147, 2, // Opcode: STRQroX /* 34878 */ MCD_OPC_FilterValue, 3, 127, 22, // Skip to: 40641 /* 34882 */ MCD_OPC_CheckField, 21, 1, 0, 121, 22, // Skip to: 40641 /* 34888 */ MCD_OPC_Decode, 241, 14, 226, 1, // Opcode: STRQpre /* 34893 */ MCD_OPC_FilterValue, 3, 85, 0, // Skip to: 34982 /* 34897 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 34900 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34915 /* 34904 */ MCD_OPC_CheckField, 21, 1, 0, 99, 22, // Skip to: 40641 /* 34910 */ MCD_OPC_Decode, 160, 8, 226, 1, // Opcode: LDURQi /* 34915 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34930 /* 34919 */ MCD_OPC_CheckField, 21, 1, 0, 84, 22, // Skip to: 40641 /* 34925 */ MCD_OPC_Decode, 225, 7, 226, 1, // Opcode: LDRQpost /* 34930 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34967 /* 34934 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 34937 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34952 /* 34941 */ MCD_OPC_CheckField, 21, 1, 1, 62, 22, // Skip to: 40641 /* 34947 */ MCD_OPC_Decode, 227, 7, 146, 2, // Opcode: LDRQroW /* 34952 */ MCD_OPC_FilterValue, 3, 53, 22, // Skip to: 40641 /* 34956 */ MCD_OPC_CheckField, 21, 1, 1, 47, 22, // Skip to: 40641 /* 34962 */ MCD_OPC_Decode, 228, 7, 147, 2, // Opcode: LDRQroX /* 34967 */ MCD_OPC_FilterValue, 3, 38, 22, // Skip to: 40641 /* 34971 */ MCD_OPC_CheckField, 21, 1, 0, 32, 22, // Skip to: 40641 /* 34977 */ MCD_OPC_Decode, 226, 7, 226, 1, // Opcode: LDRQpre /* 34982 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 34991 /* 34986 */ MCD_OPC_Decode, 224, 14, 231, 1, // Opcode: STRBui /* 34991 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 35000 /* 34995 */ MCD_OPC_Decode, 207, 7, 231, 1, // Opcode: LDRBui /* 35000 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 35009 /* 35004 */ MCD_OPC_Decode, 244, 14, 231, 1, // Opcode: STRQui /* 35009 */ MCD_OPC_FilterValue, 7, 252, 21, // Skip to: 40641 /* 35013 */ MCD_OPC_Decode, 229, 7, 231, 1, // Opcode: LDRQui /* 35018 */ MCD_OPC_FilterValue, 2, 240, 8, // Skip to: 37310 /* 35022 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 35025 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35034 /* 35029 */ MCD_OPC_Decode, 208, 7, 148, 2, // Opcode: LDRDl /* 35034 */ MCD_OPC_FilterValue, 2, 175, 5, // Skip to: 36493 /* 35038 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 35041 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 35060 /* 35045 */ MCD_OPC_CheckPredicate, 1, 216, 21, // Skip to: 40641 /* 35049 */ MCD_OPC_CheckField, 21, 3, 0, 210, 21, // Skip to: 40641 /* 35055 */ MCD_OPC_Decode, 154, 10, 149, 2, // Opcode: SHA1Crrr /* 35060 */ MCD_OPC_FilterValue, 1, 99, 0, // Skip to: 35163 /* 35064 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 35067 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 35144 /* 35071 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 35074 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 35125 /* 35078 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 35081 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 35106 /* 35085 */ MCD_OPC_CheckPredicate, 0, 176, 21, // Skip to: 40641 /* 35089 */ MCD_OPC_CheckField, 21, 3, 0, 170, 21, // Skip to: 40641 /* 35095 */ MCD_OPC_CheckField, 19, 1, 1, 164, 21, // Skip to: 40641 /* 35101 */ MCD_OPC_Decode, 252, 1, 150, 2, // Opcode: CPYi64 /* 35106 */ MCD_OPC_FilterValue, 1, 155, 21, // Skip to: 40641 /* 35110 */ MCD_OPC_CheckPredicate, 0, 151, 21, // Skip to: 40641 /* 35114 */ MCD_OPC_CheckField, 21, 3, 0, 145, 21, // Skip to: 40641 /* 35120 */ MCD_OPC_Decode, 251, 1, 151, 2, // Opcode: CPYi32 /* 35125 */ MCD_OPC_FilterValue, 1, 136, 21, // Skip to: 40641 /* 35129 */ MCD_OPC_CheckPredicate, 0, 132, 21, // Skip to: 40641 /* 35133 */ MCD_OPC_CheckField, 21, 3, 0, 126, 21, // Skip to: 40641 /* 35139 */ MCD_OPC_Decode, 250, 1, 152, 2, // Opcode: CPYi16 /* 35144 */ MCD_OPC_FilterValue, 1, 117, 21, // Skip to: 40641 /* 35148 */ MCD_OPC_CheckPredicate, 0, 113, 21, // Skip to: 40641 /* 35152 */ MCD_OPC_CheckField, 21, 3, 0, 107, 21, // Skip to: 40641 /* 35158 */ MCD_OPC_Decode, 253, 1, 153, 2, // Opcode: CPYi8 /* 35163 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 35182 /* 35167 */ MCD_OPC_CheckPredicate, 1, 94, 21, // Skip to: 40641 /* 35171 */ MCD_OPC_CheckField, 16, 8, 40, 88, 21, // Skip to: 40641 /* 35177 */ MCD_OPC_Decode, 155, 10, 253, 1, // Opcode: SHA1Hrr /* 35182 */ MCD_OPC_FilterValue, 3, 54, 0, // Skip to: 35240 /* 35186 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 35189 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35202 /* 35193 */ MCD_OPC_CheckPredicate, 0, 68, 21, // Skip to: 40641 /* 35197 */ MCD_OPC_Decode, 164, 11, 154, 2, // Opcode: SQADDv1i8 /* 35202 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35215 /* 35206 */ MCD_OPC_CheckPredicate, 0, 55, 21, // Skip to: 40641 /* 35210 */ MCD_OPC_Decode, 161, 11, 155, 2, // Opcode: SQADDv1i16 /* 35215 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35228 /* 35219 */ MCD_OPC_CheckPredicate, 0, 42, 21, // Skip to: 40641 /* 35223 */ MCD_OPC_Decode, 162, 11, 130, 2, // Opcode: SQADDv1i32 /* 35228 */ MCD_OPC_FilterValue, 7, 33, 21, // Skip to: 40641 /* 35232 */ MCD_OPC_CheckPredicate, 0, 29, 21, // Skip to: 40641 /* 35236 */ MCD_OPC_Decode, 163, 11, 89, // Opcode: SQADDv1i64 /* 35240 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 35259 /* 35244 */ MCD_OPC_CheckPredicate, 1, 17, 21, // Skip to: 40641 /* 35248 */ MCD_OPC_CheckField, 21, 3, 0, 11, 21, // Skip to: 40641 /* 35254 */ MCD_OPC_Decode, 157, 10, 149, 2, // Opcode: SHA1Prrr /* 35259 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 35277 /* 35263 */ MCD_OPC_CheckPredicate, 1, 254, 20, // Skip to: 40641 /* 35267 */ MCD_OPC_CheckField, 16, 8, 40, 248, 20, // Skip to: 40641 /* 35273 */ MCD_OPC_Decode, 159, 10, 126, // Opcode: SHA1SU1rr /* 35277 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 35296 /* 35281 */ MCD_OPC_CheckPredicate, 1, 236, 20, // Skip to: 40641 /* 35285 */ MCD_OPC_CheckField, 21, 3, 0, 230, 20, // Skip to: 40641 /* 35291 */ MCD_OPC_Decode, 156, 10, 149, 2, // Opcode: SHA1Mrrr /* 35296 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 35314 /* 35300 */ MCD_OPC_CheckPredicate, 1, 217, 20, // Skip to: 40641 /* 35304 */ MCD_OPC_CheckField, 16, 8, 40, 211, 20, // Skip to: 40641 /* 35310 */ MCD_OPC_Decode, 162, 10, 126, // Opcode: SHA256SU0rr /* 35314 */ MCD_OPC_FilterValue, 11, 54, 0, // Skip to: 35372 /* 35318 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 35321 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35334 /* 35325 */ MCD_OPC_CheckPredicate, 0, 192, 20, // Skip to: 40641 /* 35329 */ MCD_OPC_Decode, 198, 12, 154, 2, // Opcode: SQSUBv1i8 /* 35334 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35347 /* 35338 */ MCD_OPC_CheckPredicate, 0, 179, 20, // Skip to: 40641 /* 35342 */ MCD_OPC_Decode, 195, 12, 155, 2, // Opcode: SQSUBv1i16 /* 35347 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35360 /* 35351 */ MCD_OPC_CheckPredicate, 0, 166, 20, // Skip to: 40641 /* 35355 */ MCD_OPC_Decode, 196, 12, 130, 2, // Opcode: SQSUBv1i32 /* 35360 */ MCD_OPC_FilterValue, 7, 157, 20, // Skip to: 40641 /* 35364 */ MCD_OPC_CheckPredicate, 0, 153, 20, // Skip to: 40641 /* 35368 */ MCD_OPC_Decode, 197, 12, 89, // Opcode: SQSUBv1i64 /* 35372 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 35390 /* 35376 */ MCD_OPC_CheckPredicate, 1, 141, 20, // Skip to: 40641 /* 35380 */ MCD_OPC_CheckField, 21, 3, 0, 135, 20, // Skip to: 40641 /* 35386 */ MCD_OPC_Decode, 158, 10, 120, // Opcode: SHA1SU0rrr /* 35390 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 35408 /* 35394 */ MCD_OPC_CheckPredicate, 0, 123, 20, // Skip to: 40641 /* 35398 */ MCD_OPC_CheckField, 21, 3, 7, 117, 20, // Skip to: 40641 /* 35404 */ MCD_OPC_Decode, 194, 1, 89, // Opcode: CMGTv1i64 /* 35408 */ MCD_OPC_FilterValue, 14, 56, 0, // Skip to: 35468 /* 35412 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 35415 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 35428 /* 35419 */ MCD_OPC_CheckPredicate, 0, 98, 20, // Skip to: 40641 /* 35423 */ MCD_OPC_Decode, 187, 15, 156, 2, // Opcode: SUQADDv1i8 /* 35428 */ MCD_OPC_FilterValue, 96, 9, 0, // Skip to: 35441 /* 35432 */ MCD_OPC_CheckPredicate, 0, 85, 20, // Skip to: 40641 /* 35436 */ MCD_OPC_Decode, 184, 15, 157, 2, // Opcode: SUQADDv1i16 /* 35441 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 35455 /* 35446 */ MCD_OPC_CheckPredicate, 0, 71, 20, // Skip to: 40641 /* 35450 */ MCD_OPC_Decode, 185, 15, 158, 2, // Opcode: SUQADDv1i32 /* 35455 */ MCD_OPC_FilterValue, 224, 1, 61, 20, // Skip to: 40641 /* 35460 */ MCD_OPC_CheckPredicate, 0, 57, 20, // Skip to: 40641 /* 35464 */ MCD_OPC_Decode, 186, 15, 99, // Opcode: SUQADDv1i64 /* 35468 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 35486 /* 35472 */ MCD_OPC_CheckPredicate, 0, 45, 20, // Skip to: 40641 /* 35476 */ MCD_OPC_CheckField, 21, 3, 7, 39, 20, // Skip to: 40641 /* 35482 */ MCD_OPC_Decode, 178, 1, 89, // Opcode: CMGEv1i64 /* 35486 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 35504 /* 35490 */ MCD_OPC_CheckPredicate, 1, 27, 20, // Skip to: 40641 /* 35494 */ MCD_OPC_CheckField, 21, 3, 0, 21, 20, // Skip to: 40641 /* 35500 */ MCD_OPC_Decode, 161, 10, 120, // Opcode: SHA256Hrrr /* 35504 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 35522 /* 35508 */ MCD_OPC_CheckPredicate, 0, 9, 20, // Skip to: 40641 /* 35512 */ MCD_OPC_CheckField, 21, 3, 7, 3, 20, // Skip to: 40641 /* 35518 */ MCD_OPC_Decode, 140, 13, 89, // Opcode: SSHLv1i64 /* 35522 */ MCD_OPC_FilterValue, 18, 43, 0, // Skip to: 35569 /* 35526 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 35529 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 35542 /* 35533 */ MCD_OPC_CheckPredicate, 0, 240, 19, // Skip to: 40641 /* 35537 */ MCD_OPC_Decode, 208, 12, 159, 2, // Opcode: SQXTNv1i8 /* 35542 */ MCD_OPC_FilterValue, 97, 9, 0, // Skip to: 35555 /* 35546 */ MCD_OPC_CheckPredicate, 0, 227, 19, // Skip to: 40641 /* 35550 */ MCD_OPC_Decode, 206, 12, 255, 1, // Opcode: SQXTNv1i16 /* 35555 */ MCD_OPC_FilterValue, 161, 1, 217, 19, // Skip to: 40641 /* 35560 */ MCD_OPC_CheckPredicate, 0, 213, 19, // Skip to: 40641 /* 35564 */ MCD_OPC_Decode, 207, 12, 144, 1, // Opcode: SQXTNv1i32 /* 35569 */ MCD_OPC_FilterValue, 19, 54, 0, // Skip to: 35627 /* 35573 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 35576 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35589 /* 35580 */ MCD_OPC_CheckPredicate, 0, 193, 19, // Skip to: 40641 /* 35584 */ MCD_OPC_Decode, 163, 12, 154, 2, // Opcode: SQSHLv1i8 /* 35589 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35602 /* 35593 */ MCD_OPC_CheckPredicate, 0, 180, 19, // Skip to: 40641 /* 35597 */ MCD_OPC_Decode, 160, 12, 155, 2, // Opcode: SQSHLv1i16 /* 35602 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35615 /* 35606 */ MCD_OPC_CheckPredicate, 0, 167, 19, // Skip to: 40641 /* 35610 */ MCD_OPC_Decode, 161, 12, 130, 2, // Opcode: SQSHLv1i32 /* 35615 */ MCD_OPC_FilterValue, 7, 158, 19, // Skip to: 40641 /* 35619 */ MCD_OPC_CheckPredicate, 0, 154, 19, // Skip to: 40641 /* 35623 */ MCD_OPC_Decode, 162, 12, 89, // Opcode: SQSHLv1i64 /* 35627 */ MCD_OPC_FilterValue, 20, 14, 0, // Skip to: 35645 /* 35631 */ MCD_OPC_CheckPredicate, 1, 142, 19, // Skip to: 40641 /* 35635 */ MCD_OPC_CheckField, 21, 3, 0, 136, 19, // Skip to: 40641 /* 35641 */ MCD_OPC_Decode, 160, 10, 120, // Opcode: SHA256H2rrr /* 35645 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 35663 /* 35649 */ MCD_OPC_CheckPredicate, 0, 124, 19, // Skip to: 40641 /* 35653 */ MCD_OPC_CheckField, 21, 3, 7, 118, 19, // Skip to: 40641 /* 35659 */ MCD_OPC_Decode, 238, 12, 89, // Opcode: SRSHLv1i64 /* 35663 */ MCD_OPC_FilterValue, 23, 54, 0, // Skip to: 35721 /* 35667 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 35670 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35683 /* 35674 */ MCD_OPC_CheckPredicate, 0, 99, 19, // Skip to: 40641 /* 35678 */ MCD_OPC_Decode, 246, 11, 154, 2, // Opcode: SQRSHLv1i8 /* 35683 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35696 /* 35687 */ MCD_OPC_CheckPredicate, 0, 86, 19, // Skip to: 40641 /* 35691 */ MCD_OPC_Decode, 243, 11, 155, 2, // Opcode: SQRSHLv1i16 /* 35696 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35709 /* 35700 */ MCD_OPC_CheckPredicate, 0, 73, 19, // Skip to: 40641 /* 35704 */ MCD_OPC_Decode, 244, 11, 130, 2, // Opcode: SQRSHLv1i32 /* 35709 */ MCD_OPC_FilterValue, 7, 64, 19, // Skip to: 40641 /* 35713 */ MCD_OPC_CheckPredicate, 0, 60, 19, // Skip to: 40641 /* 35717 */ MCD_OPC_Decode, 245, 11, 89, // Opcode: SQRSHLv1i64 /* 35721 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 35739 /* 35725 */ MCD_OPC_CheckPredicate, 1, 48, 19, // Skip to: 40641 /* 35729 */ MCD_OPC_CheckField, 21, 3, 0, 42, 19, // Skip to: 40641 /* 35735 */ MCD_OPC_Decode, 163, 10, 120, // Opcode: SHA256SU1rrr /* 35739 */ MCD_OPC_FilterValue, 30, 56, 0, // Skip to: 35799 /* 35743 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 35746 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 35759 /* 35750 */ MCD_OPC_CheckPredicate, 0, 23, 19, // Skip to: 40641 /* 35754 */ MCD_OPC_Decode, 153, 11, 160, 2, // Opcode: SQABSv1i8 /* 35759 */ MCD_OPC_FilterValue, 96, 9, 0, // Skip to: 35772 /* 35763 */ MCD_OPC_CheckPredicate, 0, 10, 19, // Skip to: 40641 /* 35767 */ MCD_OPC_Decode, 150, 11, 161, 2, // Opcode: SQABSv1i16 /* 35772 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 35786 /* 35777 */ MCD_OPC_CheckPredicate, 0, 252, 18, // Skip to: 40641 /* 35781 */ MCD_OPC_Decode, 151, 11, 253, 1, // Opcode: SQABSv1i32 /* 35786 */ MCD_OPC_FilterValue, 224, 1, 242, 18, // Skip to: 40641 /* 35791 */ MCD_OPC_CheckPredicate, 0, 238, 18, // Skip to: 40641 /* 35795 */ MCD_OPC_Decode, 152, 11, 90, // Opcode: SQABSv1i64 /* 35799 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 35816 /* 35803 */ MCD_OPC_CheckPredicate, 0, 226, 18, // Skip to: 40641 /* 35807 */ MCD_OPC_CheckField, 21, 3, 7, 220, 18, // Skip to: 40641 /* 35813 */ MCD_OPC_Decode, 72, 89, // Opcode: ADDv1i64 /* 35816 */ MCD_OPC_FilterValue, 34, 15, 0, // Skip to: 35835 /* 35820 */ MCD_OPC_CheckPredicate, 0, 209, 18, // Skip to: 40641 /* 35824 */ MCD_OPC_CheckField, 16, 8, 224, 1, 202, 18, // Skip to: 40641 /* 35831 */ MCD_OPC_Decode, 195, 1, 90, // Opcode: CMGTv1i64rz /* 35835 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 35853 /* 35839 */ MCD_OPC_CheckPredicate, 0, 190, 18, // Skip to: 40641 /* 35843 */ MCD_OPC_CheckField, 21, 3, 7, 184, 18, // Skip to: 40641 /* 35849 */ MCD_OPC_Decode, 241, 1, 89, // Opcode: CMTSTv1i64 /* 35853 */ MCD_OPC_FilterValue, 36, 29, 0, // Skip to: 35886 /* 35857 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 35860 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35873 /* 35864 */ MCD_OPC_CheckPredicate, 0, 165, 18, // Skip to: 40641 /* 35868 */ MCD_OPC_Decode, 171, 11, 162, 2, // Opcode: SQDMLALi16 /* 35873 */ MCD_OPC_FilterValue, 5, 156, 18, // Skip to: 40641 /* 35877 */ MCD_OPC_CheckPredicate, 0, 152, 18, // Skip to: 40641 /* 35881 */ MCD_OPC_Decode, 172, 11, 163, 2, // Opcode: SQDMLALi32 /* 35886 */ MCD_OPC_FilterValue, 38, 15, 0, // Skip to: 35905 /* 35890 */ MCD_OPC_CheckPredicate, 0, 139, 18, // Skip to: 40641 /* 35894 */ MCD_OPC_CheckField, 16, 8, 224, 1, 132, 18, // Skip to: 40641 /* 35901 */ MCD_OPC_Decode, 163, 1, 90, // Opcode: CMEQv1i64rz /* 35905 */ MCD_OPC_FilterValue, 42, 68, 0, // Skip to: 35977 /* 35909 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 35912 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 35925 /* 35916 */ MCD_OPC_CheckPredicate, 0, 113, 18, // Skip to: 40641 /* 35920 */ MCD_OPC_Decode, 184, 3, 253, 1, // Opcode: FCVTNSv1i32 /* 35925 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 35937 /* 35929 */ MCD_OPC_CheckPredicate, 0, 100, 18, // Skip to: 40641 /* 35933 */ MCD_OPC_Decode, 185, 3, 90, // Opcode: FCVTNSv1i64 /* 35937 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 35951 /* 35942 */ MCD_OPC_CheckPredicate, 0, 87, 18, // Skip to: 40641 /* 35946 */ MCD_OPC_Decode, 206, 3, 253, 1, // Opcode: FCVTPSv1i32 /* 35951 */ MCD_OPC_FilterValue, 224, 1, 8, 0, // Skip to: 35964 /* 35956 */ MCD_OPC_CheckPredicate, 0, 73, 18, // Skip to: 40641 /* 35960 */ MCD_OPC_Decode, 233, 1, 90, // Opcode: CMLTv1i64rz /* 35964 */ MCD_OPC_FilterValue, 225, 1, 64, 18, // Skip to: 40641 /* 35969 */ MCD_OPC_CheckPredicate, 0, 60, 18, // Skip to: 40641 /* 35973 */ MCD_OPC_Decode, 207, 3, 90, // Opcode: FCVTPSv1i64 /* 35977 */ MCD_OPC_FilterValue, 44, 29, 0, // Skip to: 36010 /* 35981 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 35984 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35997 /* 35988 */ MCD_OPC_CheckPredicate, 0, 41, 18, // Skip to: 40641 /* 35992 */ MCD_OPC_Decode, 183, 11, 162, 2, // Opcode: SQDMLSLi16 /* 35997 */ MCD_OPC_FilterValue, 5, 32, 18, // Skip to: 40641 /* 36001 */ MCD_OPC_CheckPredicate, 0, 28, 18, // Skip to: 40641 /* 36005 */ MCD_OPC_Decode, 184, 11, 163, 2, // Opcode: SQDMLSLi32 /* 36010 */ MCD_OPC_FilterValue, 45, 29, 0, // Skip to: 36043 /* 36014 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 36017 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 36030 /* 36021 */ MCD_OPC_CheckPredicate, 0, 8, 18, // Skip to: 40641 /* 36025 */ MCD_OPC_Decode, 195, 11, 155, 2, // Opcode: SQDMULHv1i16 /* 36030 */ MCD_OPC_FilterValue, 5, 255, 17, // Skip to: 40641 /* 36034 */ MCD_OPC_CheckPredicate, 0, 251, 17, // Skip to: 40641 /* 36038 */ MCD_OPC_Decode, 197, 11, 130, 2, // Opcode: SQDMULHv1i32 /* 36043 */ MCD_OPC_FilterValue, 46, 79, 0, // Skip to: 36126 /* 36047 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 36050 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 36063 /* 36054 */ MCD_OPC_CheckPredicate, 0, 231, 17, // Skip to: 40641 /* 36058 */ MCD_OPC_Decode, 166, 3, 253, 1, // Opcode: FCVTMSv1i32 /* 36063 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 36075 /* 36067 */ MCD_OPC_CheckPredicate, 0, 218, 17, // Skip to: 40641 /* 36071 */ MCD_OPC_Decode, 167, 3, 90, // Opcode: FCVTMSv1i64 /* 36075 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 36089 /* 36080 */ MCD_OPC_CheckPredicate, 0, 205, 17, // Skip to: 40641 /* 36084 */ MCD_OPC_Decode, 246, 3, 253, 1, // Opcode: FCVTZSv1i32 /* 36089 */ MCD_OPC_FilterValue, 224, 1, 7, 0, // Skip to: 36101 /* 36094 */ MCD_OPC_CheckPredicate, 0, 191, 17, // Skip to: 40641 /* 36098 */ MCD_OPC_Decode, 23, 90, // Opcode: ABSv1i64 /* 36101 */ MCD_OPC_FilterValue, 225, 1, 8, 0, // Skip to: 36114 /* 36106 */ MCD_OPC_CheckPredicate, 0, 179, 17, // Skip to: 40641 /* 36110 */ MCD_OPC_Decode, 247, 3, 90, // Opcode: FCVTZSv1i64 /* 36114 */ MCD_OPC_FilterValue, 241, 1, 170, 17, // Skip to: 40641 /* 36119 */ MCD_OPC_CheckPredicate, 0, 166, 17, // Skip to: 40641 /* 36123 */ MCD_OPC_Decode, 43, 95, // Opcode: ADDPv2i64p /* 36126 */ MCD_OPC_FilterValue, 50, 55, 0, // Skip to: 36185 /* 36130 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 36133 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 36146 /* 36137 */ MCD_OPC_CheckPredicate, 0, 148, 17, // Skip to: 40641 /* 36141 */ MCD_OPC_Decode, 140, 3, 253, 1, // Opcode: FCVTASv1i32 /* 36146 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 36158 /* 36150 */ MCD_OPC_CheckPredicate, 0, 135, 17, // Skip to: 40641 /* 36154 */ MCD_OPC_Decode, 141, 3, 90, // Opcode: FCVTASv1i64 /* 36158 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 36172 /* 36163 */ MCD_OPC_CheckPredicate, 0, 122, 17, // Skip to: 40641 /* 36167 */ MCD_OPC_Decode, 236, 2, 253, 1, // Opcode: FCMGTv1i32rz /* 36172 */ MCD_OPC_FilterValue, 224, 1, 112, 17, // Skip to: 40641 /* 36177 */ MCD_OPC_CheckPredicate, 0, 108, 17, // Skip to: 40641 /* 36181 */ MCD_OPC_Decode, 237, 2, 90, // Opcode: FCMGTv1i64rz /* 36185 */ MCD_OPC_FilterValue, 52, 29, 0, // Skip to: 36218 /* 36189 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 36192 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 36205 /* 36196 */ MCD_OPC_CheckPredicate, 0, 89, 17, // Skip to: 40641 /* 36200 */ MCD_OPC_Decode, 207, 11, 164, 2, // Opcode: SQDMULLi16 /* 36205 */ MCD_OPC_FilterValue, 5, 80, 17, // Skip to: 40641 /* 36209 */ MCD_OPC_CheckPredicate, 0, 76, 17, // Skip to: 40641 /* 36213 */ MCD_OPC_Decode, 208, 11, 165, 2, // Opcode: SQDMULLi32 /* 36218 */ MCD_OPC_FilterValue, 54, 82, 0, // Skip to: 36304 /* 36222 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 36225 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 36238 /* 36229 */ MCD_OPC_CheckPredicate, 0, 56, 17, // Skip to: 40641 /* 36233 */ MCD_OPC_Decode, 142, 10, 253, 1, // Opcode: SCVTFv1i32 /* 36238 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 36250 /* 36242 */ MCD_OPC_CheckPredicate, 0, 43, 17, // Skip to: 40641 /* 36246 */ MCD_OPC_Decode, 143, 10, 90, // Opcode: SCVTFv1i64 /* 36250 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 36264 /* 36255 */ MCD_OPC_CheckPredicate, 0, 30, 17, // Skip to: 40641 /* 36259 */ MCD_OPC_Decode, 216, 2, 253, 1, // Opcode: FCMEQv1i32rz /* 36264 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 36278 /* 36269 */ MCD_OPC_CheckPredicate, 0, 16, 17, // Skip to: 40641 /* 36273 */ MCD_OPC_Decode, 140, 5, 253, 1, // Opcode: FRECPEv1i32 /* 36278 */ MCD_OPC_FilterValue, 224, 1, 8, 0, // Skip to: 36291 /* 36283 */ MCD_OPC_CheckPredicate, 0, 2, 17, // Skip to: 40641 /* 36287 */ MCD_OPC_Decode, 217, 2, 90, // Opcode: FCMEQv1i64rz /* 36291 */ MCD_OPC_FilterValue, 225, 1, 249, 16, // Skip to: 40641 /* 36296 */ MCD_OPC_CheckPredicate, 0, 245, 16, // Skip to: 40641 /* 36300 */ MCD_OPC_Decode, 141, 5, 90, // Opcode: FRECPEv1i64 /* 36304 */ MCD_OPC_FilterValue, 55, 28, 0, // Skip to: 36336 /* 36308 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 36311 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36324 /* 36315 */ MCD_OPC_CheckPredicate, 0, 226, 16, // Skip to: 40641 /* 36319 */ MCD_OPC_Decode, 239, 4, 130, 2, // Opcode: FMULX32 /* 36324 */ MCD_OPC_FilterValue, 3, 217, 16, // Skip to: 40641 /* 36328 */ MCD_OPC_CheckPredicate, 0, 213, 16, // Skip to: 40641 /* 36332 */ MCD_OPC_Decode, 240, 4, 89, // Opcode: FMULX64 /* 36336 */ MCD_OPC_FilterValue, 57, 28, 0, // Skip to: 36368 /* 36340 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 36343 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36356 /* 36347 */ MCD_OPC_CheckPredicate, 0, 194, 16, // Skip to: 40641 /* 36351 */ MCD_OPC_Decode, 214, 2, 130, 2, // Opcode: FCMEQ32 /* 36356 */ MCD_OPC_FilterValue, 3, 185, 16, // Skip to: 40641 /* 36360 */ MCD_OPC_CheckPredicate, 0, 181, 16, // Skip to: 40641 /* 36364 */ MCD_OPC_Decode, 215, 2, 89, // Opcode: FCMEQ64 /* 36368 */ MCD_OPC_FilterValue, 58, 30, 0, // Skip to: 36402 /* 36372 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 36375 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 36389 /* 36380 */ MCD_OPC_CheckPredicate, 0, 161, 16, // Skip to: 40641 /* 36384 */ MCD_OPC_Decode, 249, 2, 253, 1, // Opcode: FCMLTv1i32rz /* 36389 */ MCD_OPC_FilterValue, 224, 1, 151, 16, // Skip to: 40641 /* 36394 */ MCD_OPC_CheckPredicate, 0, 147, 16, // Skip to: 40641 /* 36398 */ MCD_OPC_Decode, 250, 2, 90, // Opcode: FCMLTv1i64rz /* 36402 */ MCD_OPC_FilterValue, 62, 30, 0, // Skip to: 36436 /* 36406 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 36409 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 36423 /* 36414 */ MCD_OPC_CheckPredicate, 0, 127, 16, // Skip to: 40641 /* 36418 */ MCD_OPC_Decode, 150, 5, 253, 1, // Opcode: FRECPXv1i32 /* 36423 */ MCD_OPC_FilterValue, 225, 1, 117, 16, // Skip to: 40641 /* 36428 */ MCD_OPC_CheckPredicate, 0, 113, 16, // Skip to: 40641 /* 36432 */ MCD_OPC_Decode, 151, 5, 90, // Opcode: FRECPXv1i64 /* 36436 */ MCD_OPC_FilterValue, 63, 105, 16, // Skip to: 40641 /* 36440 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 36443 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36456 /* 36447 */ MCD_OPC_CheckPredicate, 0, 94, 16, // Skip to: 40641 /* 36451 */ MCD_OPC_Decode, 145, 5, 130, 2, // Opcode: FRECPS32 /* 36456 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 36468 /* 36460 */ MCD_OPC_CheckPredicate, 0, 81, 16, // Skip to: 40641 /* 36464 */ MCD_OPC_Decode, 146, 5, 89, // Opcode: FRECPS64 /* 36468 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 36481 /* 36472 */ MCD_OPC_CheckPredicate, 0, 69, 16, // Skip to: 40641 /* 36476 */ MCD_OPC_Decode, 192, 5, 130, 2, // Opcode: FRSQRTS32 /* 36481 */ MCD_OPC_FilterValue, 7, 60, 16, // Skip to: 40641 /* 36485 */ MCD_OPC_CheckPredicate, 0, 56, 16, // Skip to: 40641 /* 36489 */ MCD_OPC_Decode, 193, 5, 89, // Opcode: FRSQRTS64 /* 36493 */ MCD_OPC_FilterValue, 3, 48, 16, // Skip to: 40641 /* 36497 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 36500 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 36525 /* 36504 */ MCD_OPC_CheckPredicate, 0, 37, 16, // Skip to: 40641 /* 36508 */ MCD_OPC_CheckField, 22, 2, 1, 31, 16, // Skip to: 40641 /* 36514 */ MCD_OPC_CheckField, 10, 2, 1, 25, 16, // Skip to: 40641 /* 36520 */ MCD_OPC_Decode, 147, 13, 166, 2, // Opcode: SSHRd /* 36525 */ MCD_OPC_FilterValue, 1, 66, 0, // Skip to: 36595 /* 36529 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 36532 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 36551 /* 36536 */ MCD_OPC_CheckPredicate, 0, 5, 16, // Skip to: 40641 /* 36540 */ MCD_OPC_CheckField, 10, 2, 1, 255, 15, // Skip to: 40641 /* 36546 */ MCD_OPC_Decode, 155, 13, 167, 2, // Opcode: SSRAd /* 36551 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 36570 /* 36555 */ MCD_OPC_CheckPredicate, 0, 242, 15, // Skip to: 40641 /* 36559 */ MCD_OPC_CheckField, 10, 1, 0, 236, 15, // Skip to: 40641 /* 36565 */ MCD_OPC_Decode, 206, 4, 168, 2, // Opcode: FMLAv1i32_indexed /* 36570 */ MCD_OPC_FilterValue, 3, 227, 15, // Skip to: 40641 /* 36574 */ MCD_OPC_CheckPredicate, 0, 223, 15, // Skip to: 40641 /* 36578 */ MCD_OPC_CheckField, 21, 1, 0, 217, 15, // Skip to: 40641 /* 36584 */ MCD_OPC_CheckField, 10, 1, 0, 211, 15, // Skip to: 40641 /* 36590 */ MCD_OPC_Decode, 207, 4, 169, 2, // Opcode: FMLAv1i64_indexed /* 36595 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 36620 /* 36599 */ MCD_OPC_CheckPredicate, 0, 198, 15, // Skip to: 40641 /* 36603 */ MCD_OPC_CheckField, 22, 2, 1, 192, 15, // Skip to: 40641 /* 36609 */ MCD_OPC_CheckField, 10, 2, 1, 186, 15, // Skip to: 40641 /* 36615 */ MCD_OPC_Decode, 245, 12, 166, 2, // Opcode: SRSHRd /* 36620 */ MCD_OPC_FilterValue, 3, 61, 0, // Skip to: 36685 /* 36624 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 36627 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 36660 /* 36631 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 36634 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36647 /* 36638 */ MCD_OPC_CheckPredicate, 0, 159, 15, // Skip to: 40641 /* 36642 */ MCD_OPC_Decode, 173, 11, 170, 2, // Opcode: SQDMLALv1i32_indexed /* 36647 */ MCD_OPC_FilterValue, 2, 150, 15, // Skip to: 40641 /* 36651 */ MCD_OPC_CheckPredicate, 0, 146, 15, // Skip to: 40641 /* 36655 */ MCD_OPC_Decode, 174, 11, 171, 2, // Opcode: SQDMLALv1i64_indexed /* 36660 */ MCD_OPC_FilterValue, 1, 137, 15, // Skip to: 40641 /* 36664 */ MCD_OPC_CheckPredicate, 0, 133, 15, // Skip to: 40641 /* 36668 */ MCD_OPC_CheckField, 22, 2, 1, 127, 15, // Skip to: 40641 /* 36674 */ MCD_OPC_CheckField, 11, 1, 0, 121, 15, // Skip to: 40641 /* 36680 */ MCD_OPC_Decode, 253, 12, 167, 2, // Opcode: SRSRAd /* 36685 */ MCD_OPC_FilterValue, 5, 66, 0, // Skip to: 36755 /* 36689 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 36692 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 36711 /* 36696 */ MCD_OPC_CheckPredicate, 0, 101, 15, // Skip to: 40641 /* 36700 */ MCD_OPC_CheckField, 10, 2, 1, 95, 15, // Skip to: 40641 /* 36706 */ MCD_OPC_Decode, 176, 10, 172, 2, // Opcode: SHLd /* 36711 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 36730 /* 36715 */ MCD_OPC_CheckPredicate, 0, 82, 15, // Skip to: 40641 /* 36719 */ MCD_OPC_CheckField, 10, 1, 0, 76, 15, // Skip to: 40641 /* 36725 */ MCD_OPC_Decode, 214, 4, 168, 2, // Opcode: FMLSv1i32_indexed /* 36730 */ MCD_OPC_FilterValue, 3, 67, 15, // Skip to: 40641 /* 36734 */ MCD_OPC_CheckPredicate, 0, 63, 15, // Skip to: 40641 /* 36738 */ MCD_OPC_CheckField, 21, 1, 0, 57, 15, // Skip to: 40641 /* 36744 */ MCD_OPC_CheckField, 10, 1, 0, 51, 15, // Skip to: 40641 /* 36750 */ MCD_OPC_Decode, 215, 4, 169, 2, // Opcode: FMLSv1i64_indexed /* 36755 */ MCD_OPC_FilterValue, 7, 138, 0, // Skip to: 36897 /* 36759 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 36762 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 36839 /* 36766 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 36769 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 36820 /* 36773 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 36776 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 36801 /* 36780 */ MCD_OPC_CheckPredicate, 0, 17, 15, // Skip to: 40641 /* 36784 */ MCD_OPC_CheckField, 19, 1, 1, 11, 15, // Skip to: 40641 /* 36790 */ MCD_OPC_CheckField, 10, 2, 1, 5, 15, // Skip to: 40641 /* 36796 */ MCD_OPC_Decode, 154, 12, 173, 2, // Opcode: SQSHLb /* 36801 */ MCD_OPC_FilterValue, 1, 252, 14, // Skip to: 40641 /* 36805 */ MCD_OPC_CheckPredicate, 0, 248, 14, // Skip to: 40641 /* 36809 */ MCD_OPC_CheckField, 10, 2, 1, 242, 14, // Skip to: 40641 /* 36815 */ MCD_OPC_Decode, 156, 12, 174, 2, // Opcode: SQSHLh /* 36820 */ MCD_OPC_FilterValue, 1, 233, 14, // Skip to: 40641 /* 36824 */ MCD_OPC_CheckPredicate, 0, 229, 14, // Skip to: 40641 /* 36828 */ MCD_OPC_CheckField, 10, 2, 1, 223, 14, // Skip to: 40641 /* 36834 */ MCD_OPC_Decode, 157, 12, 175, 2, // Opcode: SQSHLs /* 36839 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 36878 /* 36843 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 36846 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 36859 /* 36850 */ MCD_OPC_CheckPredicate, 0, 203, 14, // Skip to: 40641 /* 36854 */ MCD_OPC_Decode, 185, 11, 170, 2, // Opcode: SQDMLSLv1i32_indexed /* 36859 */ MCD_OPC_FilterValue, 1, 194, 14, // Skip to: 40641 /* 36863 */ MCD_OPC_CheckPredicate, 0, 190, 14, // Skip to: 40641 /* 36867 */ MCD_OPC_CheckField, 11, 1, 0, 184, 14, // Skip to: 40641 /* 36873 */ MCD_OPC_Decode, 155, 12, 172, 2, // Opcode: SQSHLd /* 36878 */ MCD_OPC_FilterValue, 2, 175, 14, // Skip to: 40641 /* 36882 */ MCD_OPC_CheckPredicate, 0, 171, 14, // Skip to: 40641 /* 36886 */ MCD_OPC_CheckField, 10, 1, 0, 165, 14, // Skip to: 40641 /* 36892 */ MCD_OPC_Decode, 186, 11, 171, 2, // Opcode: SQDMLSLv1i64_indexed /* 36897 */ MCD_OPC_FilterValue, 9, 172, 0, // Skip to: 37073 /* 36901 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 36904 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 37029 /* 36908 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 36911 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 36970 /* 36915 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 36918 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 36957 /* 36922 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 36925 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 36944 /* 36929 */ MCD_OPC_CheckPredicate, 0, 124, 14, // Skip to: 40641 /* 36933 */ MCD_OPC_CheckField, 19, 1, 1, 118, 14, // Skip to: 40641 /* 36939 */ MCD_OPC_Decode, 176, 12, 176, 2, // Opcode: SQSHRNb /* 36944 */ MCD_OPC_FilterValue, 1, 109, 14, // Skip to: 40641 /* 36948 */ MCD_OPC_CheckPredicate, 0, 105, 14, // Skip to: 40641 /* 36952 */ MCD_OPC_Decode, 177, 12, 177, 2, // Opcode: SQSHRNh /* 36957 */ MCD_OPC_FilterValue, 1, 96, 14, // Skip to: 40641 /* 36961 */ MCD_OPC_CheckPredicate, 0, 92, 14, // Skip to: 40641 /* 36965 */ MCD_OPC_Decode, 178, 12, 178, 2, // Opcode: SQSHRNs /* 36970 */ MCD_OPC_FilterValue, 3, 83, 14, // Skip to: 40641 /* 36974 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 36977 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 37016 /* 36981 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 36984 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 37003 /* 36988 */ MCD_OPC_CheckPredicate, 0, 65, 14, // Skip to: 40641 /* 36992 */ MCD_OPC_CheckField, 19, 1, 1, 59, 14, // Skip to: 40641 /* 36998 */ MCD_OPC_Decode, 253, 11, 176, 2, // Opcode: SQRSHRNb /* 37003 */ MCD_OPC_FilterValue, 1, 50, 14, // Skip to: 40641 /* 37007 */ MCD_OPC_CheckPredicate, 0, 46, 14, // Skip to: 40641 /* 37011 */ MCD_OPC_Decode, 254, 11, 177, 2, // Opcode: SQRSHRNh /* 37016 */ MCD_OPC_FilterValue, 1, 37, 14, // Skip to: 40641 /* 37020 */ MCD_OPC_CheckPredicate, 0, 33, 14, // Skip to: 40641 /* 37024 */ MCD_OPC_Decode, 255, 11, 178, 2, // Opcode: SQRSHRNs /* 37029 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 37048 /* 37033 */ MCD_OPC_CheckPredicate, 0, 20, 14, // Skip to: 40641 /* 37037 */ MCD_OPC_CheckField, 10, 1, 0, 14, 14, // Skip to: 40641 /* 37043 */ MCD_OPC_Decode, 249, 4, 179, 2, // Opcode: FMULv1i32_indexed /* 37048 */ MCD_OPC_FilterValue, 3, 5, 14, // Skip to: 40641 /* 37052 */ MCD_OPC_CheckPredicate, 0, 1, 14, // Skip to: 40641 /* 37056 */ MCD_OPC_CheckField, 21, 1, 0, 251, 13, // Skip to: 40641 /* 37062 */ MCD_OPC_CheckField, 10, 1, 0, 245, 13, // Skip to: 40641 /* 37068 */ MCD_OPC_Decode, 250, 4, 180, 2, // Opcode: FMULv1i64_indexed /* 37073 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 37118 /* 37077 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 37080 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 37099 /* 37084 */ MCD_OPC_CheckPredicate, 0, 225, 13, // Skip to: 40641 /* 37088 */ MCD_OPC_CheckField, 10, 1, 0, 219, 13, // Skip to: 40641 /* 37094 */ MCD_OPC_Decode, 209, 11, 181, 2, // Opcode: SQDMULLv1i32_indexed /* 37099 */ MCD_OPC_FilterValue, 2, 210, 13, // Skip to: 40641 /* 37103 */ MCD_OPC_CheckPredicate, 0, 206, 13, // Skip to: 40641 /* 37107 */ MCD_OPC_CheckField, 10, 1, 0, 200, 13, // Skip to: 40641 /* 37113 */ MCD_OPC_Decode, 210, 11, 182, 2, // Opcode: SQDMULLv1i64_indexed /* 37118 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 37163 /* 37122 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 37125 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 37144 /* 37129 */ MCD_OPC_CheckPredicate, 0, 180, 13, // Skip to: 40641 /* 37133 */ MCD_OPC_CheckField, 10, 1, 0, 174, 13, // Skip to: 40641 /* 37139 */ MCD_OPC_Decode, 196, 11, 183, 2, // Opcode: SQDMULHv1i16_indexed /* 37144 */ MCD_OPC_FilterValue, 2, 165, 13, // Skip to: 40641 /* 37148 */ MCD_OPC_CheckPredicate, 0, 161, 13, // Skip to: 40641 /* 37152 */ MCD_OPC_CheckField, 10, 1, 0, 155, 13, // Skip to: 40641 /* 37158 */ MCD_OPC_Decode, 198, 11, 179, 2, // Opcode: SQDMULHv1i32_indexed /* 37163 */ MCD_OPC_FilterValue, 13, 41, 0, // Skip to: 37208 /* 37167 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 37170 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 37189 /* 37174 */ MCD_OPC_CheckPredicate, 0, 135, 13, // Skip to: 40641 /* 37178 */ MCD_OPC_CheckField, 10, 1, 0, 129, 13, // Skip to: 40641 /* 37184 */ MCD_OPC_Decode, 231, 11, 183, 2, // Opcode: SQRDMULHv1i16_indexed /* 37189 */ MCD_OPC_FilterValue, 2, 120, 13, // Skip to: 40641 /* 37193 */ MCD_OPC_CheckPredicate, 0, 116, 13, // Skip to: 40641 /* 37197 */ MCD_OPC_CheckField, 10, 1, 0, 110, 13, // Skip to: 40641 /* 37203 */ MCD_OPC_Decode, 233, 11, 179, 2, // Opcode: SQRDMULHv1i32_indexed /* 37208 */ MCD_OPC_FilterValue, 14, 47, 0, // Skip to: 37259 /* 37212 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 37215 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 37240 /* 37219 */ MCD_OPC_CheckPredicate, 0, 90, 13, // Skip to: 40641 /* 37223 */ MCD_OPC_CheckField, 21, 1, 1, 84, 13, // Skip to: 40641 /* 37229 */ MCD_OPC_CheckField, 10, 2, 1, 78, 13, // Skip to: 40641 /* 37235 */ MCD_OPC_Decode, 141, 10, 184, 2, // Opcode: SCVTFs /* 37240 */ MCD_OPC_FilterValue, 1, 69, 13, // Skip to: 40641 /* 37244 */ MCD_OPC_CheckPredicate, 0, 65, 13, // Skip to: 40641 /* 37248 */ MCD_OPC_CheckField, 10, 2, 1, 59, 13, // Skip to: 40641 /* 37254 */ MCD_OPC_Decode, 140, 10, 166, 2, // Opcode: SCVTFd /* 37259 */ MCD_OPC_FilterValue, 15, 50, 13, // Skip to: 40641 /* 37263 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 37266 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 37291 /* 37270 */ MCD_OPC_CheckPredicate, 0, 39, 13, // Skip to: 40641 /* 37274 */ MCD_OPC_CheckField, 21, 1, 1, 33, 13, // Skip to: 40641 /* 37280 */ MCD_OPC_CheckField, 10, 2, 3, 27, 13, // Skip to: 40641 /* 37286 */ MCD_OPC_Decode, 245, 3, 184, 2, // Opcode: FCVTZSs /* 37291 */ MCD_OPC_FilterValue, 1, 18, 13, // Skip to: 40641 /* 37295 */ MCD_OPC_CheckPredicate, 0, 14, 13, // Skip to: 40641 /* 37299 */ MCD_OPC_CheckField, 10, 2, 3, 8, 13, // Skip to: 40641 /* 37305 */ MCD_OPC_Decode, 244, 3, 166, 2, // Opcode: FCVTZSd /* 37310 */ MCD_OPC_FilterValue, 3, 212, 8, // Skip to: 39574 /* 37314 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 37317 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 37406 /* 37321 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 37324 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37339 /* 37328 */ MCD_OPC_CheckField, 21, 1, 0, 235, 12, // Skip to: 40641 /* 37334 */ MCD_OPC_Decode, 140, 15, 226, 1, // Opcode: STURHi /* 37339 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37354 /* 37343 */ MCD_OPC_CheckField, 21, 1, 0, 220, 12, // Skip to: 40641 /* 37349 */ MCD_OPC_Decode, 235, 14, 226, 1, // Opcode: STRHpost /* 37354 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 37391 /* 37358 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 37361 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 37376 /* 37365 */ MCD_OPC_CheckField, 21, 1, 1, 198, 12, // Skip to: 40641 /* 37371 */ MCD_OPC_Decode, 237, 14, 185, 2, // Opcode: STRHroW /* 37376 */ MCD_OPC_FilterValue, 3, 189, 12, // Skip to: 40641 /* 37380 */ MCD_OPC_CheckField, 21, 1, 1, 183, 12, // Skip to: 40641 /* 37386 */ MCD_OPC_Decode, 238, 14, 186, 2, // Opcode: STRHroX /* 37391 */ MCD_OPC_FilterValue, 3, 174, 12, // Skip to: 40641 /* 37395 */ MCD_OPC_CheckField, 21, 1, 0, 168, 12, // Skip to: 40641 /* 37401 */ MCD_OPC_Decode, 236, 14, 226, 1, // Opcode: STRHpre /* 37406 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 37495 /* 37410 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 37413 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37428 /* 37417 */ MCD_OPC_CheckField, 21, 1, 0, 146, 12, // Skip to: 40641 /* 37423 */ MCD_OPC_Decode, 159, 8, 226, 1, // Opcode: LDURHi /* 37428 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37443 /* 37432 */ MCD_OPC_CheckField, 21, 1, 0, 131, 12, // Skip to: 40641 /* 37438 */ MCD_OPC_Decode, 219, 7, 226, 1, // Opcode: LDRHpost /* 37443 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 37480 /* 37447 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 37450 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 37465 /* 37454 */ MCD_OPC_CheckField, 21, 1, 1, 109, 12, // Skip to: 40641 /* 37460 */ MCD_OPC_Decode, 221, 7, 185, 2, // Opcode: LDRHroW /* 37465 */ MCD_OPC_FilterValue, 3, 100, 12, // Skip to: 40641 /* 37469 */ MCD_OPC_CheckField, 21, 1, 1, 94, 12, // Skip to: 40641 /* 37475 */ MCD_OPC_Decode, 222, 7, 186, 2, // Opcode: LDRHroX /* 37480 */ MCD_OPC_FilterValue, 3, 85, 12, // Skip to: 40641 /* 37484 */ MCD_OPC_CheckField, 21, 1, 0, 79, 12, // Skip to: 40641 /* 37490 */ MCD_OPC_Decode, 220, 7, 226, 1, // Opcode: LDRHpre /* 37495 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 37504 /* 37499 */ MCD_OPC_Decode, 239, 14, 231, 1, // Opcode: STRHui /* 37504 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 37513 /* 37508 */ MCD_OPC_Decode, 223, 7, 231, 1, // Opcode: LDRHui /* 37513 */ MCD_OPC_FilterValue, 8, 60, 1, // Skip to: 37833 /* 37517 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 37520 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 37539 /* 37524 */ MCD_OPC_CheckPredicate, 0, 41, 12, // Skip to: 40641 /* 37528 */ MCD_OPC_CheckField, 21, 1, 1, 35, 12, // Skip to: 40641 /* 37534 */ MCD_OPC_Decode, 143, 17, 154, 2, // Opcode: UQADDv1i8 /* 37539 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 37558 /* 37543 */ MCD_OPC_CheckPredicate, 0, 22, 12, // Skip to: 40641 /* 37547 */ MCD_OPC_CheckField, 16, 6, 33, 16, 12, // Skip to: 40641 /* 37553 */ MCD_OPC_Decode, 217, 12, 159, 2, // Opcode: SQXTUNv1i8 /* 37558 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 37577 /* 37562 */ MCD_OPC_CheckPredicate, 0, 3, 12, // Skip to: 40641 /* 37566 */ MCD_OPC_CheckField, 21, 1, 1, 253, 11, // Skip to: 40641 /* 37572 */ MCD_OPC_Decode, 205, 17, 154, 2, // Opcode: UQSUBv1i8 /* 37577 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 37596 /* 37581 */ MCD_OPC_CheckPredicate, 0, 240, 11, // Skip to: 40641 /* 37585 */ MCD_OPC_CheckField, 16, 6, 32, 234, 11, // Skip to: 40641 /* 37591 */ MCD_OPC_Decode, 153, 18, 156, 2, // Opcode: USQADDv1i8 /* 37596 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 37615 /* 37600 */ MCD_OPC_CheckPredicate, 0, 221, 11, // Skip to: 40641 /* 37604 */ MCD_OPC_CheckField, 16, 6, 33, 215, 11, // Skip to: 40641 /* 37610 */ MCD_OPC_Decode, 215, 17, 159, 2, // Opcode: UQXTNv1i8 /* 37615 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 37634 /* 37619 */ MCD_OPC_CheckPredicate, 0, 202, 11, // Skip to: 40641 /* 37623 */ MCD_OPC_CheckField, 21, 1, 1, 196, 11, // Skip to: 40641 /* 37629 */ MCD_OPC_Decode, 179, 17, 154, 2, // Opcode: UQSHLv1i8 /* 37634 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 37653 /* 37638 */ MCD_OPC_CheckPredicate, 0, 183, 11, // Skip to: 40641 /* 37642 */ MCD_OPC_CheckField, 21, 1, 1, 177, 11, // Skip to: 40641 /* 37648 */ MCD_OPC_Decode, 154, 17, 154, 2, // Opcode: UQRSHLv1i8 /* 37653 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 37672 /* 37657 */ MCD_OPC_CheckPredicate, 0, 164, 11, // Skip to: 40641 /* 37661 */ MCD_OPC_CheckField, 16, 6, 32, 158, 11, // Skip to: 40641 /* 37667 */ MCD_OPC_Decode, 223, 11, 160, 2, // Opcode: SQNEGv1i8 /* 37672 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 37691 /* 37676 */ MCD_OPC_CheckPredicate, 0, 145, 11, // Skip to: 40641 /* 37680 */ MCD_OPC_CheckField, 16, 6, 33, 139, 11, // Skip to: 40641 /* 37686 */ MCD_OPC_Decode, 193, 3, 253, 1, // Opcode: FCVTNUv1i32 /* 37691 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 37710 /* 37695 */ MCD_OPC_CheckPredicate, 0, 126, 11, // Skip to: 40641 /* 37699 */ MCD_OPC_CheckField, 16, 6, 33, 120, 11, // Skip to: 40641 /* 37705 */ MCD_OPC_Decode, 175, 3, 253, 1, // Opcode: FCVTMUv1i32 /* 37710 */ MCD_OPC_FilterValue, 50, 29, 0, // Skip to: 37743 /* 37714 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 37717 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 37730 /* 37721 */ MCD_OPC_CheckPredicate, 0, 100, 11, // Skip to: 40641 /* 37725 */ MCD_OPC_Decode, 149, 3, 253, 1, // Opcode: FCVTAUv1i32 /* 37730 */ MCD_OPC_FilterValue, 48, 91, 11, // Skip to: 40641 /* 37734 */ MCD_OPC_CheckPredicate, 0, 87, 11, // Skip to: 40641 /* 37738 */ MCD_OPC_Decode, 166, 4, 144, 1, // Opcode: FMAXNMPv2i32p /* 37743 */ MCD_OPC_FilterValue, 54, 29, 0, // Skip to: 37776 /* 37747 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 37750 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 37763 /* 37754 */ MCD_OPC_CheckPredicate, 0, 67, 11, // Skip to: 40641 /* 37758 */ MCD_OPC_Decode, 172, 16, 253, 1, // Opcode: UCVTFv1i32 /* 37763 */ MCD_OPC_FilterValue, 48, 58, 11, // Skip to: 40641 /* 37767 */ MCD_OPC_CheckPredicate, 0, 54, 11, // Skip to: 40641 /* 37771 */ MCD_OPC_Decode, 203, 2, 144, 1, // Opcode: FADDPv2i32p /* 37776 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 37795 /* 37780 */ MCD_OPC_CheckPredicate, 0, 41, 11, // Skip to: 40641 /* 37784 */ MCD_OPC_CheckField, 21, 1, 1, 35, 11, // Skip to: 40641 /* 37790 */ MCD_OPC_Decode, 224, 2, 130, 2, // Opcode: FCMGE32 /* 37795 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 37814 /* 37799 */ MCD_OPC_CheckPredicate, 0, 22, 11, // Skip to: 40641 /* 37803 */ MCD_OPC_CheckField, 21, 1, 1, 16, 11, // Skip to: 40641 /* 37809 */ MCD_OPC_Decode, 190, 2, 130, 2, // Opcode: FACGE32 /* 37814 */ MCD_OPC_FilterValue, 62, 7, 11, // Skip to: 40641 /* 37818 */ MCD_OPC_CheckPredicate, 0, 3, 11, // Skip to: 40641 /* 37822 */ MCD_OPC_CheckField, 16, 6, 48, 253, 10, // Skip to: 40641 /* 37828 */ MCD_OPC_Decode, 176, 4, 144, 1, // Opcode: FMAXPv2i32p /* 37833 */ MCD_OPC_FilterValue, 9, 89, 1, // Skip to: 38182 /* 37837 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 37840 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 37859 /* 37844 */ MCD_OPC_CheckPredicate, 0, 233, 10, // Skip to: 40641 /* 37848 */ MCD_OPC_CheckField, 21, 1, 1, 227, 10, // Skip to: 40641 /* 37854 */ MCD_OPC_Decode, 140, 17, 155, 2, // Opcode: UQADDv1i16 /* 37859 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 37878 /* 37863 */ MCD_OPC_CheckPredicate, 0, 214, 10, // Skip to: 40641 /* 37867 */ MCD_OPC_CheckField, 16, 6, 33, 208, 10, // Skip to: 40641 /* 37873 */ MCD_OPC_Decode, 215, 12, 255, 1, // Opcode: SQXTUNv1i16 /* 37878 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 37897 /* 37882 */ MCD_OPC_CheckPredicate, 0, 195, 10, // Skip to: 40641 /* 37886 */ MCD_OPC_CheckField, 21, 1, 1, 189, 10, // Skip to: 40641 /* 37892 */ MCD_OPC_Decode, 202, 17, 155, 2, // Opcode: UQSUBv1i16 /* 37897 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 37916 /* 37901 */ MCD_OPC_CheckPredicate, 0, 176, 10, // Skip to: 40641 /* 37905 */ MCD_OPC_CheckField, 16, 6, 32, 170, 10, // Skip to: 40641 /* 37911 */ MCD_OPC_Decode, 150, 18, 157, 2, // Opcode: USQADDv1i16 /* 37916 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 37935 /* 37920 */ MCD_OPC_CheckPredicate, 0, 157, 10, // Skip to: 40641 /* 37924 */ MCD_OPC_CheckField, 16, 6, 33, 151, 10, // Skip to: 40641 /* 37930 */ MCD_OPC_Decode, 213, 17, 255, 1, // Opcode: UQXTNv1i16 /* 37935 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 37954 /* 37939 */ MCD_OPC_CheckPredicate, 0, 138, 10, // Skip to: 40641 /* 37943 */ MCD_OPC_CheckField, 21, 1, 1, 132, 10, // Skip to: 40641 /* 37949 */ MCD_OPC_Decode, 176, 17, 155, 2, // Opcode: UQSHLv1i16 /* 37954 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 37973 /* 37958 */ MCD_OPC_CheckPredicate, 0, 119, 10, // Skip to: 40641 /* 37962 */ MCD_OPC_CheckField, 21, 1, 1, 113, 10, // Skip to: 40641 /* 37968 */ MCD_OPC_Decode, 151, 17, 155, 2, // Opcode: UQRSHLv1i16 /* 37973 */ MCD_OPC_FilterValue, 26, 15, 0, // Skip to: 37992 /* 37977 */ MCD_OPC_CheckPredicate, 0, 100, 10, // Skip to: 40641 /* 37981 */ MCD_OPC_CheckField, 16, 6, 33, 94, 10, // Skip to: 40641 /* 37987 */ MCD_OPC_Decode, 222, 3, 144, 1, // Opcode: FCVTXNv1i64 /* 37992 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 38011 /* 37996 */ MCD_OPC_CheckPredicate, 0, 81, 10, // Skip to: 40641 /* 38000 */ MCD_OPC_CheckField, 16, 6, 32, 75, 10, // Skip to: 40641 /* 38006 */ MCD_OPC_Decode, 220, 11, 161, 2, // Opcode: SQNEGv1i16 /* 38011 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 38029 /* 38015 */ MCD_OPC_CheckPredicate, 0, 62, 10, // Skip to: 40641 /* 38019 */ MCD_OPC_CheckField, 16, 6, 33, 56, 10, // Skip to: 40641 /* 38025 */ MCD_OPC_Decode, 194, 3, 90, // Opcode: FCVTNUv1i64 /* 38029 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 38048 /* 38033 */ MCD_OPC_CheckPredicate, 0, 44, 10, // Skip to: 40641 /* 38037 */ MCD_OPC_CheckField, 21, 1, 1, 38, 10, // Skip to: 40641 /* 38043 */ MCD_OPC_Decode, 230, 11, 155, 2, // Opcode: SQRDMULHv1i16 /* 38048 */ MCD_OPC_FilterValue, 46, 14, 0, // Skip to: 38066 /* 38052 */ MCD_OPC_CheckPredicate, 0, 25, 10, // Skip to: 40641 /* 38056 */ MCD_OPC_CheckField, 16, 6, 33, 19, 10, // Skip to: 40641 /* 38062 */ MCD_OPC_Decode, 176, 3, 90, // Opcode: FCVTMUv1i64 /* 38066 */ MCD_OPC_FilterValue, 50, 27, 0, // Skip to: 38097 /* 38070 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38073 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 38085 /* 38077 */ MCD_OPC_CheckPredicate, 0, 0, 10, // Skip to: 40641 /* 38081 */ MCD_OPC_Decode, 150, 3, 90, // Opcode: FCVTAUv1i64 /* 38085 */ MCD_OPC_FilterValue, 48, 248, 9, // Skip to: 40641 /* 38089 */ MCD_OPC_CheckPredicate, 0, 244, 9, // Skip to: 40641 /* 38093 */ MCD_OPC_Decode, 167, 4, 95, // Opcode: FMAXNMPv2i64p /* 38097 */ MCD_OPC_FilterValue, 54, 27, 0, // Skip to: 38128 /* 38101 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38104 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 38116 /* 38108 */ MCD_OPC_CheckPredicate, 0, 225, 9, // Skip to: 40641 /* 38112 */ MCD_OPC_Decode, 173, 16, 90, // Opcode: UCVTFv1i64 /* 38116 */ MCD_OPC_FilterValue, 48, 217, 9, // Skip to: 40641 /* 38120 */ MCD_OPC_CheckPredicate, 0, 213, 9, // Skip to: 40641 /* 38124 */ MCD_OPC_Decode, 204, 2, 95, // Opcode: FADDPv2i64p /* 38128 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 38146 /* 38132 */ MCD_OPC_CheckPredicate, 0, 201, 9, // Skip to: 40641 /* 38136 */ MCD_OPC_CheckField, 21, 1, 1, 195, 9, // Skip to: 40641 /* 38142 */ MCD_OPC_Decode, 225, 2, 89, // Opcode: FCMGE64 /* 38146 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 38164 /* 38150 */ MCD_OPC_CheckPredicate, 0, 183, 9, // Skip to: 40641 /* 38154 */ MCD_OPC_CheckField, 21, 1, 1, 177, 9, // Skip to: 40641 /* 38160 */ MCD_OPC_Decode, 191, 2, 89, // Opcode: FACGE64 /* 38164 */ MCD_OPC_FilterValue, 62, 169, 9, // Skip to: 40641 /* 38168 */ MCD_OPC_CheckPredicate, 0, 165, 9, // Skip to: 40641 /* 38172 */ MCD_OPC_CheckField, 16, 6, 48, 159, 9, // Skip to: 40641 /* 38178 */ MCD_OPC_Decode, 177, 4, 95, // Opcode: FMAXPv2i64p /* 38182 */ MCD_OPC_FilterValue, 10, 98, 1, // Skip to: 38540 /* 38186 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 38189 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 38208 /* 38193 */ MCD_OPC_CheckPredicate, 0, 140, 9, // Skip to: 40641 /* 38197 */ MCD_OPC_CheckField, 21, 1, 1, 134, 9, // Skip to: 40641 /* 38203 */ MCD_OPC_Decode, 141, 17, 130, 2, // Opcode: UQADDv1i32 /* 38208 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 38227 /* 38212 */ MCD_OPC_CheckPredicate, 0, 121, 9, // Skip to: 40641 /* 38216 */ MCD_OPC_CheckField, 16, 6, 33, 115, 9, // Skip to: 40641 /* 38222 */ MCD_OPC_Decode, 216, 12, 144, 1, // Opcode: SQXTUNv1i32 /* 38227 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 38246 /* 38231 */ MCD_OPC_CheckPredicate, 0, 102, 9, // Skip to: 40641 /* 38235 */ MCD_OPC_CheckField, 21, 1, 1, 96, 9, // Skip to: 40641 /* 38241 */ MCD_OPC_Decode, 203, 17, 130, 2, // Opcode: UQSUBv1i32 /* 38246 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 38265 /* 38250 */ MCD_OPC_CheckPredicate, 0, 83, 9, // Skip to: 40641 /* 38254 */ MCD_OPC_CheckField, 16, 6, 32, 77, 9, // Skip to: 40641 /* 38260 */ MCD_OPC_Decode, 151, 18, 158, 2, // Opcode: USQADDv1i32 /* 38265 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 38284 /* 38269 */ MCD_OPC_CheckPredicate, 0, 64, 9, // Skip to: 40641 /* 38273 */ MCD_OPC_CheckField, 16, 6, 33, 58, 9, // Skip to: 40641 /* 38279 */ MCD_OPC_Decode, 214, 17, 144, 1, // Opcode: UQXTNv1i32 /* 38284 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 38303 /* 38288 */ MCD_OPC_CheckPredicate, 0, 45, 9, // Skip to: 40641 /* 38292 */ MCD_OPC_CheckField, 21, 1, 1, 39, 9, // Skip to: 40641 /* 38298 */ MCD_OPC_Decode, 177, 17, 130, 2, // Opcode: UQSHLv1i32 /* 38303 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 38322 /* 38307 */ MCD_OPC_CheckPredicate, 0, 26, 9, // Skip to: 40641 /* 38311 */ MCD_OPC_CheckField, 21, 1, 1, 20, 9, // Skip to: 40641 /* 38317 */ MCD_OPC_Decode, 152, 17, 130, 2, // Opcode: UQRSHLv1i32 /* 38322 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 38341 /* 38326 */ MCD_OPC_CheckPredicate, 0, 7, 9, // Skip to: 40641 /* 38330 */ MCD_OPC_CheckField, 16, 6, 32, 1, 9, // Skip to: 40641 /* 38336 */ MCD_OPC_Decode, 221, 11, 253, 1, // Opcode: SQNEGv1i32 /* 38341 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 38360 /* 38345 */ MCD_OPC_CheckPredicate, 0, 244, 8, // Skip to: 40641 /* 38349 */ MCD_OPC_CheckField, 16, 6, 33, 238, 8, // Skip to: 40641 /* 38355 */ MCD_OPC_Decode, 215, 3, 253, 1, // Opcode: FCVTPUv1i32 /* 38360 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 38379 /* 38364 */ MCD_OPC_CheckPredicate, 0, 225, 8, // Skip to: 40641 /* 38368 */ MCD_OPC_CheckField, 21, 1, 1, 219, 8, // Skip to: 40641 /* 38374 */ MCD_OPC_Decode, 232, 11, 130, 2, // Opcode: SQRDMULHv1i32 /* 38379 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 38398 /* 38383 */ MCD_OPC_CheckPredicate, 0, 206, 8, // Skip to: 40641 /* 38387 */ MCD_OPC_CheckField, 16, 6, 33, 200, 8, // Skip to: 40641 /* 38393 */ MCD_OPC_Decode, 147, 4, 253, 1, // Opcode: FCVTZUv1i32 /* 38398 */ MCD_OPC_FilterValue, 50, 29, 0, // Skip to: 38431 /* 38402 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38405 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 38418 /* 38409 */ MCD_OPC_CheckPredicate, 0, 180, 8, // Skip to: 40641 /* 38413 */ MCD_OPC_Decode, 226, 2, 253, 1, // Opcode: FCMGEv1i32rz /* 38418 */ MCD_OPC_FilterValue, 48, 171, 8, // Skip to: 40641 /* 38422 */ MCD_OPC_CheckPredicate, 0, 167, 8, // Skip to: 40641 /* 38426 */ MCD_OPC_Decode, 188, 4, 144, 1, // Opcode: FMINNMPv2i32p /* 38431 */ MCD_OPC_FilterValue, 53, 15, 0, // Skip to: 38450 /* 38435 */ MCD_OPC_CheckPredicate, 0, 154, 8, // Skip to: 40641 /* 38439 */ MCD_OPC_CheckField, 21, 1, 1, 148, 8, // Skip to: 40641 /* 38445 */ MCD_OPC_Decode, 180, 2, 130, 2, // Opcode: FABD32 /* 38450 */ MCD_OPC_FilterValue, 54, 29, 0, // Skip to: 38483 /* 38454 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38457 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 38470 /* 38461 */ MCD_OPC_CheckPredicate, 0, 128, 8, // Skip to: 40641 /* 38465 */ MCD_OPC_Decode, 244, 2, 253, 1, // Opcode: FCMLEv1i32rz /* 38470 */ MCD_OPC_FilterValue, 33, 119, 8, // Skip to: 40641 /* 38474 */ MCD_OPC_CheckPredicate, 0, 115, 8, // Skip to: 40641 /* 38478 */ MCD_OPC_Decode, 187, 5, 253, 1, // Opcode: FRSQRTEv1i32 /* 38483 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 38502 /* 38487 */ MCD_OPC_CheckPredicate, 0, 102, 8, // Skip to: 40641 /* 38491 */ MCD_OPC_CheckField, 21, 1, 1, 96, 8, // Skip to: 40641 /* 38497 */ MCD_OPC_Decode, 234, 2, 130, 2, // Opcode: FCMGT32 /* 38502 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 38521 /* 38506 */ MCD_OPC_CheckPredicate, 0, 83, 8, // Skip to: 40641 /* 38510 */ MCD_OPC_CheckField, 21, 1, 1, 77, 8, // Skip to: 40641 /* 38516 */ MCD_OPC_Decode, 195, 2, 130, 2, // Opcode: FACGT32 /* 38521 */ MCD_OPC_FilterValue, 62, 68, 8, // Skip to: 40641 /* 38525 */ MCD_OPC_CheckPredicate, 0, 64, 8, // Skip to: 40641 /* 38529 */ MCD_OPC_CheckField, 16, 6, 48, 58, 8, // Skip to: 40641 /* 38535 */ MCD_OPC_Decode, 198, 4, 144, 1, // Opcode: FMINPv2i32p /* 38540 */ MCD_OPC_FilterValue, 11, 182, 1, // Skip to: 38982 /* 38544 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 38547 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 38565 /* 38551 */ MCD_OPC_CheckPredicate, 0, 38, 8, // Skip to: 40641 /* 38555 */ MCD_OPC_CheckField, 21, 1, 1, 32, 8, // Skip to: 40641 /* 38561 */ MCD_OPC_Decode, 142, 17, 89, // Opcode: UQADDv1i64 /* 38565 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 38583 /* 38569 */ MCD_OPC_CheckPredicate, 0, 20, 8, // Skip to: 40641 /* 38573 */ MCD_OPC_CheckField, 21, 1, 1, 14, 8, // Skip to: 40641 /* 38579 */ MCD_OPC_Decode, 204, 17, 89, // Opcode: UQSUBv1i64 /* 38583 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 38601 /* 38587 */ MCD_OPC_CheckPredicate, 0, 2, 8, // Skip to: 40641 /* 38591 */ MCD_OPC_CheckField, 21, 1, 1, 252, 7, // Skip to: 40641 /* 38597 */ MCD_OPC_Decode, 209, 1, 89, // Opcode: CMHIv1i64 /* 38601 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 38619 /* 38605 */ MCD_OPC_CheckPredicate, 0, 240, 7, // Skip to: 40641 /* 38609 */ MCD_OPC_CheckField, 16, 6, 32, 234, 7, // Skip to: 40641 /* 38615 */ MCD_OPC_Decode, 152, 18, 99, // Opcode: USQADDv1i64 /* 38619 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 38637 /* 38623 */ MCD_OPC_CheckPredicate, 0, 222, 7, // Skip to: 40641 /* 38627 */ MCD_OPC_CheckField, 21, 1, 1, 216, 7, // Skip to: 40641 /* 38633 */ MCD_OPC_Decode, 217, 1, 89, // Opcode: CMHSv1i64 /* 38637 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 38655 /* 38641 */ MCD_OPC_CheckPredicate, 0, 204, 7, // Skip to: 40641 /* 38645 */ MCD_OPC_CheckField, 21, 1, 1, 198, 7, // Skip to: 40641 /* 38651 */ MCD_OPC_Decode, 134, 18, 89, // Opcode: USHLv1i64 /* 38655 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 38673 /* 38659 */ MCD_OPC_CheckPredicate, 0, 186, 7, // Skip to: 40641 /* 38663 */ MCD_OPC_CheckField, 21, 1, 1, 180, 7, // Skip to: 40641 /* 38669 */ MCD_OPC_Decode, 178, 17, 89, // Opcode: UQSHLv1i64 /* 38673 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 38691 /* 38677 */ MCD_OPC_CheckPredicate, 0, 168, 7, // Skip to: 40641 /* 38681 */ MCD_OPC_CheckField, 21, 1, 1, 162, 7, // Skip to: 40641 /* 38687 */ MCD_OPC_Decode, 230, 17, 89, // Opcode: URSHLv1i64 /* 38691 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 38709 /* 38695 */ MCD_OPC_CheckPredicate, 0, 150, 7, // Skip to: 40641 /* 38699 */ MCD_OPC_CheckField, 21, 1, 1, 144, 7, // Skip to: 40641 /* 38705 */ MCD_OPC_Decode, 153, 17, 89, // Opcode: UQRSHLv1i64 /* 38709 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 38727 /* 38713 */ MCD_OPC_CheckPredicate, 0, 132, 7, // Skip to: 40641 /* 38717 */ MCD_OPC_CheckField, 16, 6, 32, 126, 7, // Skip to: 40641 /* 38723 */ MCD_OPC_Decode, 222, 11, 90, // Opcode: SQNEGv1i64 /* 38727 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 38745 /* 38731 */ MCD_OPC_CheckPredicate, 0, 114, 7, // Skip to: 40641 /* 38735 */ MCD_OPC_CheckField, 21, 1, 1, 108, 7, // Skip to: 40641 /* 38741 */ MCD_OPC_Decode, 176, 15, 89, // Opcode: SUBv1i64 /* 38745 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 38763 /* 38749 */ MCD_OPC_CheckPredicate, 0, 96, 7, // Skip to: 40641 /* 38753 */ MCD_OPC_CheckField, 16, 6, 32, 90, 7, // Skip to: 40641 /* 38759 */ MCD_OPC_Decode, 179, 1, 90, // Opcode: CMGEv1i64rz /* 38763 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 38781 /* 38767 */ MCD_OPC_CheckPredicate, 0, 78, 7, // Skip to: 40641 /* 38771 */ MCD_OPC_CheckField, 21, 1, 1, 72, 7, // Skip to: 40641 /* 38777 */ MCD_OPC_Decode, 162, 1, 89, // Opcode: CMEQv1i64 /* 38781 */ MCD_OPC_FilterValue, 38, 14, 0, // Skip to: 38799 /* 38785 */ MCD_OPC_CheckPredicate, 0, 60, 7, // Skip to: 40641 /* 38789 */ MCD_OPC_CheckField, 16, 6, 32, 54, 7, // Skip to: 40641 /* 38795 */ MCD_OPC_Decode, 225, 1, 90, // Opcode: CMLEv1i64rz /* 38799 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 38817 /* 38803 */ MCD_OPC_CheckPredicate, 0, 42, 7, // Skip to: 40641 /* 38807 */ MCD_OPC_CheckField, 16, 6, 33, 36, 7, // Skip to: 40641 /* 38813 */ MCD_OPC_Decode, 216, 3, 90, // Opcode: FCVTPUv1i64 /* 38817 */ MCD_OPC_FilterValue, 46, 27, 0, // Skip to: 38848 /* 38821 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38824 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 38836 /* 38828 */ MCD_OPC_CheckPredicate, 0, 17, 7, // Skip to: 40641 /* 38832 */ MCD_OPC_Decode, 248, 8, 90, // Opcode: NEGv1i64 /* 38836 */ MCD_OPC_FilterValue, 33, 9, 7, // Skip to: 40641 /* 38840 */ MCD_OPC_CheckPredicate, 0, 5, 7, // Skip to: 40641 /* 38844 */ MCD_OPC_Decode, 148, 4, 90, // Opcode: FCVTZUv1i64 /* 38848 */ MCD_OPC_FilterValue, 50, 27, 0, // Skip to: 38879 /* 38852 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38855 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 38867 /* 38859 */ MCD_OPC_CheckPredicate, 0, 242, 6, // Skip to: 40641 /* 38863 */ MCD_OPC_Decode, 227, 2, 90, // Opcode: FCMGEv1i64rz /* 38867 */ MCD_OPC_FilterValue, 48, 234, 6, // Skip to: 40641 /* 38871 */ MCD_OPC_CheckPredicate, 0, 230, 6, // Skip to: 40641 /* 38875 */ MCD_OPC_Decode, 189, 4, 95, // Opcode: FMINNMPv2i64p /* 38879 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 38897 /* 38883 */ MCD_OPC_CheckPredicate, 0, 218, 6, // Skip to: 40641 /* 38887 */ MCD_OPC_CheckField, 21, 1, 1, 212, 6, // Skip to: 40641 /* 38893 */ MCD_OPC_Decode, 181, 2, 89, // Opcode: FABD64 /* 38897 */ MCD_OPC_FilterValue, 54, 27, 0, // Skip to: 38928 /* 38901 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ... /* 38904 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 38916 /* 38908 */ MCD_OPC_CheckPredicate, 0, 193, 6, // Skip to: 40641 /* 38912 */ MCD_OPC_Decode, 245, 2, 90, // Opcode: FCMLEv1i64rz /* 38916 */ MCD_OPC_FilterValue, 33, 185, 6, // Skip to: 40641 /* 38920 */ MCD_OPC_CheckPredicate, 0, 181, 6, // Skip to: 40641 /* 38924 */ MCD_OPC_Decode, 188, 5, 90, // Opcode: FRSQRTEv1i64 /* 38928 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 38946 /* 38932 */ MCD_OPC_CheckPredicate, 0, 169, 6, // Skip to: 40641 /* 38936 */ MCD_OPC_CheckField, 21, 1, 1, 163, 6, // Skip to: 40641 /* 38942 */ MCD_OPC_Decode, 235, 2, 89, // Opcode: FCMGT64 /* 38946 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 38964 /* 38950 */ MCD_OPC_CheckPredicate, 0, 151, 6, // Skip to: 40641 /* 38954 */ MCD_OPC_CheckField, 21, 1, 1, 145, 6, // Skip to: 40641 /* 38960 */ MCD_OPC_Decode, 196, 2, 89, // Opcode: FACGT64 /* 38964 */ MCD_OPC_FilterValue, 62, 137, 6, // Skip to: 40641 /* 38968 */ MCD_OPC_CheckPredicate, 0, 133, 6, // Skip to: 40641 /* 38972 */ MCD_OPC_CheckField, 16, 6, 48, 127, 6, // Skip to: 40641 /* 38978 */ MCD_OPC_Decode, 199, 4, 95, // Opcode: FMINPv2i64p /* 38982 */ MCD_OPC_FilterValue, 12, 139, 1, // Skip to: 39381 /* 38986 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 38989 */ MCD_OPC_FilterValue, 25, 55, 0, // Skip to: 39048 /* 38993 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 38996 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39035 /* 39000 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 39003 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39022 /* 39007 */ MCD_OPC_CheckPredicate, 0, 94, 6, // Skip to: 40641 /* 39011 */ MCD_OPC_CheckField, 19, 1, 1, 88, 6, // Skip to: 40641 /* 39017 */ MCD_OPC_Decode, 143, 12, 173, 2, // Opcode: SQSHLUb /* 39022 */ MCD_OPC_FilterValue, 1, 79, 6, // Skip to: 40641 /* 39026 */ MCD_OPC_CheckPredicate, 0, 75, 6, // Skip to: 40641 /* 39030 */ MCD_OPC_Decode, 145, 12, 174, 2, // Opcode: SQSHLUh /* 39035 */ MCD_OPC_FilterValue, 1, 66, 6, // Skip to: 40641 /* 39039 */ MCD_OPC_CheckPredicate, 0, 62, 6, // Skip to: 40641 /* 39043 */ MCD_OPC_Decode, 146, 12, 175, 2, // Opcode: SQSHLUs /* 39048 */ MCD_OPC_FilterValue, 29, 55, 0, // Skip to: 39107 /* 39052 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 39055 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39094 /* 39059 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 39062 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39081 /* 39066 */ MCD_OPC_CheckPredicate, 0, 35, 6, // Skip to: 40641 /* 39070 */ MCD_OPC_CheckField, 19, 1, 1, 29, 6, // Skip to: 40641 /* 39076 */ MCD_OPC_Decode, 170, 17, 173, 2, // Opcode: UQSHLb /* 39081 */ MCD_OPC_FilterValue, 1, 20, 6, // Skip to: 40641 /* 39085 */ MCD_OPC_CheckPredicate, 0, 16, 6, // Skip to: 40641 /* 39089 */ MCD_OPC_Decode, 172, 17, 174, 2, // Opcode: UQSHLh /* 39094 */ MCD_OPC_FilterValue, 1, 7, 6, // Skip to: 40641 /* 39098 */ MCD_OPC_CheckPredicate, 0, 3, 6, // Skip to: 40641 /* 39102 */ MCD_OPC_Decode, 173, 17, 175, 2, // Opcode: UQSHLs /* 39107 */ MCD_OPC_FilterValue, 33, 55, 0, // Skip to: 39166 /* 39111 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 39114 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39153 /* 39118 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 39121 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39140 /* 39125 */ MCD_OPC_CheckPredicate, 0, 232, 5, // Skip to: 40641 /* 39129 */ MCD_OPC_CheckField, 19, 1, 1, 226, 5, // Skip to: 40641 /* 39135 */ MCD_OPC_Decode, 185, 12, 176, 2, // Opcode: SQSHRUNb /* 39140 */ MCD_OPC_FilterValue, 1, 217, 5, // Skip to: 40641 /* 39144 */ MCD_OPC_CheckPredicate, 0, 213, 5, // Skip to: 40641 /* 39148 */ MCD_OPC_Decode, 186, 12, 177, 2, // Opcode: SQSHRUNh /* 39153 */ MCD_OPC_FilterValue, 1, 204, 5, // Skip to: 40641 /* 39157 */ MCD_OPC_CheckPredicate, 0, 200, 5, // Skip to: 40641 /* 39161 */ MCD_OPC_Decode, 187, 12, 178, 2, // Opcode: SQSHRUNs /* 39166 */ MCD_OPC_FilterValue, 35, 55, 0, // Skip to: 39225 /* 39170 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 39173 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39212 /* 39177 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 39180 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39199 /* 39184 */ MCD_OPC_CheckPredicate, 0, 173, 5, // Skip to: 40641 /* 39188 */ MCD_OPC_CheckField, 19, 1, 1, 167, 5, // Skip to: 40641 /* 39194 */ MCD_OPC_Decode, 134, 12, 176, 2, // Opcode: SQRSHRUNb /* 39199 */ MCD_OPC_FilterValue, 1, 158, 5, // Skip to: 40641 /* 39203 */ MCD_OPC_CheckPredicate, 0, 154, 5, // Skip to: 40641 /* 39207 */ MCD_OPC_Decode, 135, 12, 177, 2, // Opcode: SQRSHRUNh /* 39212 */ MCD_OPC_FilterValue, 1, 145, 5, // Skip to: 40641 /* 39216 */ MCD_OPC_CheckPredicate, 0, 141, 5, // Skip to: 40641 /* 39220 */ MCD_OPC_Decode, 136, 12, 178, 2, // Opcode: SQRSHRUNs /* 39225 */ MCD_OPC_FilterValue, 37, 55, 0, // Skip to: 39284 /* 39229 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 39232 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39271 /* 39236 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 39239 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39258 /* 39243 */ MCD_OPC_CheckPredicate, 0, 114, 5, // Skip to: 40641 /* 39247 */ MCD_OPC_CheckField, 19, 1, 1, 108, 5, // Skip to: 40641 /* 39253 */ MCD_OPC_Decode, 192, 17, 176, 2, // Opcode: UQSHRNb /* 39258 */ MCD_OPC_FilterValue, 1, 99, 5, // Skip to: 40641 /* 39262 */ MCD_OPC_CheckPredicate, 0, 95, 5, // Skip to: 40641 /* 39266 */ MCD_OPC_Decode, 193, 17, 177, 2, // Opcode: UQSHRNh /* 39271 */ MCD_OPC_FilterValue, 1, 86, 5, // Skip to: 40641 /* 39275 */ MCD_OPC_CheckPredicate, 0, 82, 5, // Skip to: 40641 /* 39279 */ MCD_OPC_Decode, 194, 17, 178, 2, // Opcode: UQSHRNs /* 39284 */ MCD_OPC_FilterValue, 39, 55, 0, // Skip to: 39343 /* 39288 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 39291 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39330 /* 39295 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 39298 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39317 /* 39302 */ MCD_OPC_CheckPredicate, 0, 55, 5, // Skip to: 40641 /* 39306 */ MCD_OPC_CheckField, 19, 1, 1, 49, 5, // Skip to: 40641 /* 39312 */ MCD_OPC_Decode, 161, 17, 176, 2, // Opcode: UQRSHRNb /* 39317 */ MCD_OPC_FilterValue, 1, 40, 5, // Skip to: 40641 /* 39321 */ MCD_OPC_CheckPredicate, 0, 36, 5, // Skip to: 40641 /* 39325 */ MCD_OPC_Decode, 162, 17, 177, 2, // Opcode: UQRSHRNh /* 39330 */ MCD_OPC_FilterValue, 1, 27, 5, // Skip to: 40641 /* 39334 */ MCD_OPC_CheckPredicate, 0, 23, 5, // Skip to: 40641 /* 39338 */ MCD_OPC_Decode, 163, 17, 178, 2, // Opcode: UQRSHRNs /* 39343 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 39362 /* 39347 */ MCD_OPC_CheckPredicate, 0, 10, 5, // Skip to: 40641 /* 39351 */ MCD_OPC_CheckField, 21, 1, 1, 4, 5, // Skip to: 40641 /* 39357 */ MCD_OPC_Decode, 171, 16, 184, 2, // Opcode: UCVTFs /* 39362 */ MCD_OPC_FilterValue, 63, 251, 4, // Skip to: 40641 /* 39366 */ MCD_OPC_CheckPredicate, 0, 247, 4, // Skip to: 40641 /* 39370 */ MCD_OPC_CheckField, 21, 1, 1, 241, 4, // Skip to: 40641 /* 39376 */ MCD_OPC_Decode, 146, 4, 184, 2, // Opcode: FCVTZUs /* 39381 */ MCD_OPC_FilterValue, 13, 133, 0, // Skip to: 39518 /* 39385 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 39388 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 39401 /* 39392 */ MCD_OPC_CheckPredicate, 0, 221, 4, // Skip to: 40641 /* 39396 */ MCD_OPC_Decode, 141, 18, 166, 2, // Opcode: USHRd /* 39401 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 39414 /* 39405 */ MCD_OPC_CheckPredicate, 0, 208, 4, // Skip to: 40641 /* 39409 */ MCD_OPC_Decode, 160, 18, 167, 2, // Opcode: USRAd /* 39414 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 39427 /* 39418 */ MCD_OPC_CheckPredicate, 0, 195, 4, // Skip to: 40641 /* 39422 */ MCD_OPC_Decode, 237, 17, 166, 2, // Opcode: URSHRd /* 39427 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 39440 /* 39431 */ MCD_OPC_CheckPredicate, 0, 182, 4, // Skip to: 40641 /* 39435 */ MCD_OPC_Decode, 247, 17, 167, 2, // Opcode: URSRAd /* 39440 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 39453 /* 39444 */ MCD_OPC_CheckPredicate, 0, 169, 4, // Skip to: 40641 /* 39448 */ MCD_OPC_Decode, 229, 12, 167, 2, // Opcode: SRId /* 39453 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 39466 /* 39457 */ MCD_OPC_CheckPredicate, 0, 156, 4, // Skip to: 40641 /* 39461 */ MCD_OPC_Decode, 196, 10, 187, 2, // Opcode: SLId /* 39466 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 39479 /* 39470 */ MCD_OPC_CheckPredicate, 0, 143, 4, // Skip to: 40641 /* 39474 */ MCD_OPC_Decode, 144, 12, 172, 2, // Opcode: SQSHLUd /* 39479 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 39492 /* 39483 */ MCD_OPC_CheckPredicate, 0, 130, 4, // Skip to: 40641 /* 39487 */ MCD_OPC_Decode, 171, 17, 172, 2, // Opcode: UQSHLd /* 39492 */ MCD_OPC_FilterValue, 57, 9, 0, // Skip to: 39505 /* 39496 */ MCD_OPC_CheckPredicate, 0, 117, 4, // Skip to: 40641 /* 39500 */ MCD_OPC_Decode, 170, 16, 166, 2, // Opcode: UCVTFd /* 39505 */ MCD_OPC_FilterValue, 63, 108, 4, // Skip to: 40641 /* 39509 */ MCD_OPC_CheckPredicate, 0, 104, 4, // Skip to: 40641 /* 39513 */ MCD_OPC_Decode, 145, 4, 166, 2, // Opcode: FCVTZUd /* 39518 */ MCD_OPC_FilterValue, 14, 21, 0, // Skip to: 39543 /* 39522 */ MCD_OPC_CheckPredicate, 0, 91, 4, // Skip to: 40641 /* 39526 */ MCD_OPC_CheckField, 12, 4, 9, 85, 4, // Skip to: 40641 /* 39532 */ MCD_OPC_CheckField, 10, 1, 0, 79, 4, // Skip to: 40641 /* 39538 */ MCD_OPC_Decode, 241, 4, 179, 2, // Opcode: FMULXv1i32_indexed /* 39543 */ MCD_OPC_FilterValue, 15, 70, 4, // Skip to: 40641 /* 39547 */ MCD_OPC_CheckPredicate, 0, 66, 4, // Skip to: 40641 /* 39551 */ MCD_OPC_CheckField, 21, 1, 0, 60, 4, // Skip to: 40641 /* 39557 */ MCD_OPC_CheckField, 12, 4, 9, 54, 4, // Skip to: 40641 /* 39563 */ MCD_OPC_CheckField, 10, 1, 0, 48, 4, // Skip to: 40641 /* 39569 */ MCD_OPC_Decode, 242, 4, 180, 2, // Opcode: FMULXv1i64_indexed /* 39574 */ MCD_OPC_FilterValue, 4, 145, 2, // Skip to: 40235 /* 39578 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 39581 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 39590 /* 39585 */ MCD_OPC_Decode, 224, 7, 188, 2, // Opcode: LDRQl /* 39590 */ MCD_OPC_FilterValue, 2, 23, 4, // Skip to: 40641 /* 39594 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 39597 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 39610 /* 39601 */ MCD_OPC_CheckPredicate, 3, 12, 4, // Skip to: 40641 /* 39605 */ MCD_OPC_Decode, 135, 10, 189, 2, // Opcode: SCVTFSXSri /* 39610 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 39623 /* 39614 */ MCD_OPC_CheckPredicate, 3, 255, 3, // Skip to: 40641 /* 39618 */ MCD_OPC_Decode, 165, 16, 189, 2, // Opcode: UCVTFSXSri /* 39623 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 39636 /* 39627 */ MCD_OPC_CheckPredicate, 3, 242, 3, // Skip to: 40641 /* 39631 */ MCD_OPC_Decode, 228, 3, 190, 2, // Opcode: FCVTZSSXSri /* 39636 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 39649 /* 39640 */ MCD_OPC_CheckPredicate, 3, 229, 3, // Skip to: 40641 /* 39644 */ MCD_OPC_Decode, 129, 4, 190, 2, // Opcode: FCVTZUSXSri /* 39649 */ MCD_OPC_FilterValue, 32, 15, 0, // Skip to: 39668 /* 39653 */ MCD_OPC_CheckPredicate, 3, 216, 3, // Skip to: 40641 /* 39657 */ MCD_OPC_CheckField, 10, 6, 0, 210, 3, // Skip to: 40641 /* 39663 */ MCD_OPC_Decode, 183, 3, 191, 2, // Opcode: FCVTNSUXSr /* 39668 */ MCD_OPC_FilterValue, 33, 15, 0, // Skip to: 39687 /* 39672 */ MCD_OPC_CheckPredicate, 3, 197, 3, // Skip to: 40641 /* 39676 */ MCD_OPC_CheckField, 10, 6, 0, 191, 3, // Skip to: 40641 /* 39682 */ MCD_OPC_Decode, 192, 3, 191, 2, // Opcode: FCVTNUUXSr /* 39687 */ MCD_OPC_FilterValue, 34, 15, 0, // Skip to: 39706 /* 39691 */ MCD_OPC_CheckPredicate, 3, 178, 3, // Skip to: 40641 /* 39695 */ MCD_OPC_CheckField, 10, 6, 0, 172, 3, // Skip to: 40641 /* 39701 */ MCD_OPC_Decode, 139, 10, 192, 2, // Opcode: SCVTFUXSri /* 39706 */ MCD_OPC_FilterValue, 35, 15, 0, // Skip to: 39725 /* 39710 */ MCD_OPC_CheckPredicate, 3, 159, 3, // Skip to: 40641 /* 39714 */ MCD_OPC_CheckField, 10, 6, 0, 153, 3, // Skip to: 40641 /* 39720 */ MCD_OPC_Decode, 169, 16, 192, 2, // Opcode: UCVTFUXSri /* 39725 */ MCD_OPC_FilterValue, 36, 15, 0, // Skip to: 39744 /* 39729 */ MCD_OPC_CheckPredicate, 3, 140, 3, // Skip to: 40641 /* 39733 */ MCD_OPC_CheckField, 10, 6, 0, 134, 3, // Skip to: 40641 /* 39739 */ MCD_OPC_Decode, 139, 3, 191, 2, // Opcode: FCVTASUXSr /* 39744 */ MCD_OPC_FilterValue, 37, 15, 0, // Skip to: 39763 /* 39748 */ MCD_OPC_CheckPredicate, 3, 121, 3, // Skip to: 40641 /* 39752 */ MCD_OPC_CheckField, 10, 6, 0, 115, 3, // Skip to: 40641 /* 39758 */ MCD_OPC_Decode, 148, 3, 191, 2, // Opcode: FCVTAUUXSr /* 39763 */ MCD_OPC_FilterValue, 40, 15, 0, // Skip to: 39782 /* 39767 */ MCD_OPC_CheckPredicate, 3, 102, 3, // Skip to: 40641 /* 39771 */ MCD_OPC_CheckField, 10, 6, 0, 96, 3, // Skip to: 40641 /* 39777 */ MCD_OPC_Decode, 205, 3, 191, 2, // Opcode: FCVTPSUXSr /* 39782 */ MCD_OPC_FilterValue, 41, 15, 0, // Skip to: 39801 /* 39786 */ MCD_OPC_CheckPredicate, 3, 83, 3, // Skip to: 40641 /* 39790 */ MCD_OPC_CheckField, 10, 6, 0, 77, 3, // Skip to: 40641 /* 39796 */ MCD_OPC_Decode, 214, 3, 191, 2, // Opcode: FCVTPUUXSr /* 39801 */ MCD_OPC_FilterValue, 48, 15, 0, // Skip to: 39820 /* 39805 */ MCD_OPC_CheckPredicate, 3, 64, 3, // Skip to: 40641 /* 39809 */ MCD_OPC_CheckField, 10, 6, 0, 58, 3, // Skip to: 40641 /* 39815 */ MCD_OPC_Decode, 165, 3, 191, 2, // Opcode: FCVTMSUXSr /* 39820 */ MCD_OPC_FilterValue, 49, 15, 0, // Skip to: 39839 /* 39824 */ MCD_OPC_CheckPredicate, 3, 45, 3, // Skip to: 40641 /* 39828 */ MCD_OPC_CheckField, 10, 6, 0, 39, 3, // Skip to: 40641 /* 39834 */ MCD_OPC_Decode, 174, 3, 191, 2, // Opcode: FCVTMUUXSr /* 39839 */ MCD_OPC_FilterValue, 56, 15, 0, // Skip to: 39858 /* 39843 */ MCD_OPC_CheckPredicate, 3, 26, 3, // Skip to: 40641 /* 39847 */ MCD_OPC_CheckField, 10, 6, 0, 20, 3, // Skip to: 40641 /* 39853 */ MCD_OPC_Decode, 232, 3, 191, 2, // Opcode: FCVTZSUXSr /* 39858 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 39877 /* 39862 */ MCD_OPC_CheckPredicate, 3, 7, 3, // Skip to: 40641 /* 39866 */ MCD_OPC_CheckField, 10, 6, 0, 1, 3, // Skip to: 40641 /* 39872 */ MCD_OPC_Decode, 133, 4, 191, 2, // Opcode: FCVTZUUXSr /* 39877 */ MCD_OPC_FilterValue, 66, 9, 0, // Skip to: 39890 /* 39881 */ MCD_OPC_CheckPredicate, 3, 244, 2, // Skip to: 40641 /* 39885 */ MCD_OPC_Decode, 134, 10, 193, 2, // Opcode: SCVTFSXDri /* 39890 */ MCD_OPC_FilterValue, 67, 9, 0, // Skip to: 39903 /* 39894 */ MCD_OPC_CheckPredicate, 3, 231, 2, // Skip to: 40641 /* 39898 */ MCD_OPC_Decode, 164, 16, 193, 2, // Opcode: UCVTFSXDri /* 39903 */ MCD_OPC_FilterValue, 88, 9, 0, // Skip to: 39916 /* 39907 */ MCD_OPC_CheckPredicate, 3, 218, 2, // Skip to: 40641 /* 39911 */ MCD_OPC_Decode, 227, 3, 194, 2, // Opcode: FCVTZSSXDri /* 39916 */ MCD_OPC_FilterValue, 89, 9, 0, // Skip to: 39929 /* 39920 */ MCD_OPC_CheckPredicate, 3, 205, 2, // Skip to: 40641 /* 39924 */ MCD_OPC_Decode, 128, 4, 194, 2, // Opcode: FCVTZUSXDri /* 39929 */ MCD_OPC_FilterValue, 96, 15, 0, // Skip to: 39948 /* 39933 */ MCD_OPC_CheckPredicate, 3, 192, 2, // Skip to: 40641 /* 39937 */ MCD_OPC_CheckField, 10, 6, 0, 186, 2, // Skip to: 40641 /* 39943 */ MCD_OPC_Decode, 182, 3, 195, 2, // Opcode: FCVTNSUXDr /* 39948 */ MCD_OPC_FilterValue, 97, 15, 0, // Skip to: 39967 /* 39952 */ MCD_OPC_CheckPredicate, 3, 173, 2, // Skip to: 40641 /* 39956 */ MCD_OPC_CheckField, 10, 6, 0, 167, 2, // Skip to: 40641 /* 39962 */ MCD_OPC_Decode, 191, 3, 195, 2, // Opcode: FCVTNUUXDr /* 39967 */ MCD_OPC_FilterValue, 98, 15, 0, // Skip to: 39986 /* 39971 */ MCD_OPC_CheckPredicate, 3, 154, 2, // Skip to: 40641 /* 39975 */ MCD_OPC_CheckField, 10, 6, 0, 148, 2, // Skip to: 40641 /* 39981 */ MCD_OPC_Decode, 138, 10, 196, 2, // Opcode: SCVTFUXDri /* 39986 */ MCD_OPC_FilterValue, 99, 15, 0, // Skip to: 40005 /* 39990 */ MCD_OPC_CheckPredicate, 3, 135, 2, // Skip to: 40641 /* 39994 */ MCD_OPC_CheckField, 10, 6, 0, 129, 2, // Skip to: 40641 /* 40000 */ MCD_OPC_Decode, 168, 16, 196, 2, // Opcode: UCVTFUXDri /* 40005 */ MCD_OPC_FilterValue, 100, 15, 0, // Skip to: 40024 /* 40009 */ MCD_OPC_CheckPredicate, 3, 116, 2, // Skip to: 40641 /* 40013 */ MCD_OPC_CheckField, 10, 6, 0, 110, 2, // Skip to: 40641 /* 40019 */ MCD_OPC_Decode, 138, 3, 195, 2, // Opcode: FCVTASUXDr /* 40024 */ MCD_OPC_FilterValue, 101, 15, 0, // Skip to: 40043 /* 40028 */ MCD_OPC_CheckPredicate, 3, 97, 2, // Skip to: 40641 /* 40032 */ MCD_OPC_CheckField, 10, 6, 0, 91, 2, // Skip to: 40641 /* 40038 */ MCD_OPC_Decode, 147, 3, 195, 2, // Opcode: FCVTAUUXDr /* 40043 */ MCD_OPC_FilterValue, 102, 15, 0, // Skip to: 40062 /* 40047 */ MCD_OPC_CheckPredicate, 3, 78, 2, // Skip to: 40641 /* 40051 */ MCD_OPC_CheckField, 10, 6, 0, 72, 2, // Skip to: 40641 /* 40057 */ MCD_OPC_Decode, 223, 4, 195, 2, // Opcode: FMOVDXr /* 40062 */ MCD_OPC_FilterValue, 103, 15, 0, // Skip to: 40081 /* 40066 */ MCD_OPC_CheckPredicate, 3, 59, 2, // Skip to: 40641 /* 40070 */ MCD_OPC_CheckField, 10, 6, 0, 53, 2, // Skip to: 40641 /* 40076 */ MCD_OPC_Decode, 231, 4, 196, 2, // Opcode: FMOVXDr /* 40081 */ MCD_OPC_FilterValue, 104, 15, 0, // Skip to: 40100 /* 40085 */ MCD_OPC_CheckPredicate, 3, 40, 2, // Skip to: 40641 /* 40089 */ MCD_OPC_CheckField, 10, 6, 0, 34, 2, // Skip to: 40641 /* 40095 */ MCD_OPC_Decode, 204, 3, 195, 2, // Opcode: FCVTPSUXDr /* 40100 */ MCD_OPC_FilterValue, 105, 15, 0, // Skip to: 40119 /* 40104 */ MCD_OPC_CheckPredicate, 3, 21, 2, // Skip to: 40641 /* 40108 */ MCD_OPC_CheckField, 10, 6, 0, 15, 2, // Skip to: 40641 /* 40114 */ MCD_OPC_Decode, 213, 3, 195, 2, // Opcode: FCVTPUUXDr /* 40119 */ MCD_OPC_FilterValue, 112, 15, 0, // Skip to: 40138 /* 40123 */ MCD_OPC_CheckPredicate, 3, 2, 2, // Skip to: 40641 /* 40127 */ MCD_OPC_CheckField, 10, 6, 0, 252, 1, // Skip to: 40641 /* 40133 */ MCD_OPC_Decode, 164, 3, 195, 2, // Opcode: FCVTMSUXDr /* 40138 */ MCD_OPC_FilterValue, 113, 15, 0, // Skip to: 40157 /* 40142 */ MCD_OPC_CheckPredicate, 3, 239, 1, // Skip to: 40641 /* 40146 */ MCD_OPC_CheckField, 10, 6, 0, 233, 1, // Skip to: 40641 /* 40152 */ MCD_OPC_Decode, 173, 3, 195, 2, // Opcode: FCVTMUUXDr /* 40157 */ MCD_OPC_FilterValue, 120, 15, 0, // Skip to: 40176 /* 40161 */ MCD_OPC_CheckPredicate, 3, 220, 1, // Skip to: 40641 /* 40165 */ MCD_OPC_CheckField, 10, 6, 0, 214, 1, // Skip to: 40641 /* 40171 */ MCD_OPC_Decode, 231, 3, 195, 2, // Opcode: FCVTZSUXDr /* 40176 */ MCD_OPC_FilterValue, 121, 15, 0, // Skip to: 40195 /* 40180 */ MCD_OPC_CheckPredicate, 3, 201, 1, // Skip to: 40641 /* 40184 */ MCD_OPC_CheckField, 10, 6, 0, 195, 1, // Skip to: 40641 /* 40190 */ MCD_OPC_Decode, 132, 4, 195, 2, // Opcode: FCVTZUUXDr /* 40195 */ MCD_OPC_FilterValue, 174, 1, 15, 0, // Skip to: 40215 /* 40200 */ MCD_OPC_CheckPredicate, 3, 181, 1, // Skip to: 40641 /* 40204 */ MCD_OPC_CheckField, 10, 6, 0, 175, 1, // Skip to: 40641 /* 40210 */ MCD_OPC_Decode, 222, 4, 197, 2, // Opcode: FMOVDXHighr /* 40215 */ MCD_OPC_FilterValue, 175, 1, 165, 1, // Skip to: 40641 /* 40220 */ MCD_OPC_CheckPredicate, 3, 161, 1, // Skip to: 40641 /* 40224 */ MCD_OPC_CheckField, 10, 6, 0, 155, 1, // Skip to: 40641 /* 40230 */ MCD_OPC_Decode, 230, 4, 197, 2, // Opcode: FMOVXDHighr /* 40235 */ MCD_OPC_FilterValue, 5, 199, 0, // Skip to: 40438 /* 40239 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 40242 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 40331 /* 40246 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 40249 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40264 /* 40253 */ MCD_OPC_CheckField, 21, 1, 0, 126, 1, // Skip to: 40641 /* 40259 */ MCD_OPC_Decode, 142, 15, 226, 1, // Opcode: STURSi /* 40264 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40279 /* 40268 */ MCD_OPC_CheckField, 21, 1, 0, 111, 1, // Skip to: 40641 /* 40274 */ MCD_OPC_Decode, 245, 14, 226, 1, // Opcode: STRSpost /* 40279 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40316 /* 40283 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 40286 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40301 /* 40290 */ MCD_OPC_CheckField, 21, 1, 1, 89, 1, // Skip to: 40641 /* 40296 */ MCD_OPC_Decode, 247, 14, 198, 2, // Opcode: STRSroW /* 40301 */ MCD_OPC_FilterValue, 3, 80, 1, // Skip to: 40641 /* 40305 */ MCD_OPC_CheckField, 21, 1, 1, 74, 1, // Skip to: 40641 /* 40311 */ MCD_OPC_Decode, 248, 14, 199, 2, // Opcode: STRSroX /* 40316 */ MCD_OPC_FilterValue, 3, 65, 1, // Skip to: 40641 /* 40320 */ MCD_OPC_CheckField, 21, 1, 0, 59, 1, // Skip to: 40641 /* 40326 */ MCD_OPC_Decode, 246, 14, 226, 1, // Opcode: STRSpre /* 40331 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 40420 /* 40335 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 40338 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40353 /* 40342 */ MCD_OPC_CheckField, 21, 1, 0, 37, 1, // Skip to: 40641 /* 40348 */ MCD_OPC_Decode, 166, 8, 226, 1, // Opcode: LDURSi /* 40353 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40368 /* 40357 */ MCD_OPC_CheckField, 21, 1, 0, 22, 1, // Skip to: 40641 /* 40363 */ MCD_OPC_Decode, 129, 8, 226, 1, // Opcode: LDRSpost /* 40368 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40405 /* 40372 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 40375 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40390 /* 40379 */ MCD_OPC_CheckField, 21, 1, 1, 0, 1, // Skip to: 40641 /* 40385 */ MCD_OPC_Decode, 131, 8, 198, 2, // Opcode: LDRSroW /* 40390 */ MCD_OPC_FilterValue, 3, 247, 0, // Skip to: 40641 /* 40394 */ MCD_OPC_CheckField, 21, 1, 1, 241, 0, // Skip to: 40641 /* 40400 */ MCD_OPC_Decode, 132, 8, 199, 2, // Opcode: LDRSroX /* 40405 */ MCD_OPC_FilterValue, 3, 232, 0, // Skip to: 40641 /* 40409 */ MCD_OPC_CheckField, 21, 1, 0, 226, 0, // Skip to: 40641 /* 40415 */ MCD_OPC_Decode, 130, 8, 226, 1, // Opcode: LDRSpre /* 40420 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 40429 /* 40424 */ MCD_OPC_Decode, 249, 14, 231, 1, // Opcode: STRSui /* 40429 */ MCD_OPC_FilterValue, 5, 208, 0, // Skip to: 40641 /* 40433 */ MCD_OPC_Decode, 133, 8, 231, 1, // Opcode: LDRSui /* 40438 */ MCD_OPC_FilterValue, 7, 199, 0, // Skip to: 40641 /* 40442 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 40445 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 40534 /* 40449 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 40452 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40467 /* 40456 */ MCD_OPC_CheckField, 21, 1, 0, 179, 0, // Skip to: 40641 /* 40462 */ MCD_OPC_Decode, 138, 15, 226, 1, // Opcode: STURDi /* 40467 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40482 /* 40471 */ MCD_OPC_CheckField, 21, 1, 0, 164, 0, // Skip to: 40641 /* 40477 */ MCD_OPC_Decode, 225, 14, 226, 1, // Opcode: STRDpost /* 40482 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40519 /* 40486 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 40489 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40504 /* 40493 */ MCD_OPC_CheckField, 21, 1, 1, 142, 0, // Skip to: 40641 /* 40499 */ MCD_OPC_Decode, 227, 14, 200, 2, // Opcode: STRDroW /* 40504 */ MCD_OPC_FilterValue, 3, 133, 0, // Skip to: 40641 /* 40508 */ MCD_OPC_CheckField, 21, 1, 1, 127, 0, // Skip to: 40641 /* 40514 */ MCD_OPC_Decode, 228, 14, 201, 2, // Opcode: STRDroX /* 40519 */ MCD_OPC_FilterValue, 3, 118, 0, // Skip to: 40641 /* 40523 */ MCD_OPC_CheckField, 21, 1, 0, 112, 0, // Skip to: 40641 /* 40529 */ MCD_OPC_Decode, 226, 14, 226, 1, // Opcode: STRDpre /* 40534 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 40623 /* 40538 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 40541 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40556 /* 40545 */ MCD_OPC_CheckField, 21, 1, 0, 90, 0, // Skip to: 40641 /* 40551 */ MCD_OPC_Decode, 157, 8, 226, 1, // Opcode: LDURDi /* 40556 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40571 /* 40560 */ MCD_OPC_CheckField, 21, 1, 0, 75, 0, // Skip to: 40641 /* 40566 */ MCD_OPC_Decode, 209, 7, 226, 1, // Opcode: LDRDpost /* 40571 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40608 /* 40575 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ... /* 40578 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40593 /* 40582 */ MCD_OPC_CheckField, 21, 1, 1, 53, 0, // Skip to: 40641 /* 40588 */ MCD_OPC_Decode, 211, 7, 200, 2, // Opcode: LDRDroW /* 40593 */ MCD_OPC_FilterValue, 3, 44, 0, // Skip to: 40641 /* 40597 */ MCD_OPC_CheckField, 21, 1, 1, 38, 0, // Skip to: 40641 /* 40603 */ MCD_OPC_Decode, 212, 7, 201, 2, // Opcode: LDRDroX /* 40608 */ MCD_OPC_FilterValue, 3, 29, 0, // Skip to: 40641 /* 40612 */ MCD_OPC_CheckField, 21, 1, 0, 23, 0, // Skip to: 40641 /* 40618 */ MCD_OPC_Decode, 210, 7, 226, 1, // Opcode: LDRDpre /* 40623 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 40632 /* 40627 */ MCD_OPC_Decode, 229, 14, 231, 1, // Opcode: STRDui /* 40632 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 40641 /* 40636 */ MCD_OPC_Decode, 213, 7, 231, 1, // Opcode: LDRDui /* 40641 */ MCD_OPC_Fail, 0 }; static bool getbool(uint64_t b) { return b != 0; } static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { switch (Idx) { default: // llvm_unreachable("Invalid index!"); case 0: return getbool((Bits & AArch64_FeatureNEON)); case 1: return getbool((Bits & AArch64_FeatureCrypto)); case 2: return getbool((Bits & AArch64_FeatureCRC)); case 3: return getbool((Bits & AArch64_FeatureFPARMv8)); } } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, const void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ if (!Check(&S, DecodeExclusiveLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 1: \ if (!Check(&S, DecodeThreeAddrSRegInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 2: \ if (!Check(&S, DecodeAddSubERegInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 3: \ if (!Check(&S, DecodePairLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 4: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeDDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 5: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 6: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 7: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 9: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 11: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 12: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeDDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 13: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 15: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 16: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 18: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 19: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 20: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 21: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 22: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 23: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 25: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 33: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 34: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 37: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 38: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 39: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 40: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 41: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 42: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 43: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 44: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 45: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 46: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 47: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 48: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 49: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 50: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 51: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 52: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 53: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 54: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 55: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 56: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 57: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 58: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 59: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 60: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 61: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 62: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 63: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 64: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 65: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 66: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 67: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 68: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 69: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 70: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 71: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 10, 3) << 0; \ tmp |= fieldname(insn, 30, 1) << 3; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 72: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 73: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 74: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 75: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 2) << 0; \ tmp |= fieldname(insn, 30, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 76: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 77: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 78: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 79: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 80: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 81: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 30, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 82: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 83: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 30, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 84: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 85: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 86: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 87: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 88: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 89: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 90: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 91: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 92: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 93: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 94: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 95: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 96: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 97: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 98: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 99: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 100: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 101: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 102: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 103: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 104: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 105: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 106: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 107: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 108: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 109: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 110: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 111: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 112: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 113: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 114: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 115: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 116: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 117: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 118: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 119: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 120: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 121: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 122: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 123: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 124: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 125: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 126: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 127: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 128: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 129: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 130: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 131: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 132: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 133: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 134: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 135: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 136: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 137: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 138: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 139: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 140: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 141: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 142: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 143: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 144: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 145: \ if (!Check(&S, DecodeModImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 146: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 147: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 148: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 149: \ if (!Check(&S, DecodeModImmTiedInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 150: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 151: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 152: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 153: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 154: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 155: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 156: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR16ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 157: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 158: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR32ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 159: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 160: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR64ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 161: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 162: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 163: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 164: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 165: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 166: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 167: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 168: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 169: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 170: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 171: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 172: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 173: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 174: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR16ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 175: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR32ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 176: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR64ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 177: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 178: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 179: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 180: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 181: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 182: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 183: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 184: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 185: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 186: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 187: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 188: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 189: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 190: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 191: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 192: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 193: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 194: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 195: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 196: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 197: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 198: \ if (!Check(&S, DecodeAdrInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 199: \ if (!Check(&S, DecodeBaseAddSubImm(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 200: \ if (!Check(&S, DecodeLogicalImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 201: \ if (!Check(&S, DecodeMoveImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 202: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 10, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 203: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 204: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 10, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 205: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 10, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 206: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 207: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 10, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 208: \ if (!Check(&S, DecodeUnconditionalBranch(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 209: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 210: \ if (!Check(&S, DecodeTestAndBranch(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 211: \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 212: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 213: \ tmp = fieldname(insn, 5, 16); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 214: \ tmp = fieldname(insn, 8, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 215: \ tmp = fieldname(insn, 5, 7); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 216: \ if (!Check(&S, DecodeSystemPStateInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 217: \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 8, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 218: \ tmp = fieldname(insn, 5, 16); \ if (!Check(&S, DecodeMSRSystemRegister(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 219: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 8, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 220: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 16); \ if (!Check(&S, DecodeMRSSystemRegister(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 221: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 222: \ return S; \ case 223: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 224: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 225: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 226: \ if (!Check(&S, DecodeSignedLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 227: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 228: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 229: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 230: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 231: \ if (!Check(&S, DecodeUnsignedLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 232: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 233: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 234: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 235: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 236: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 237: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 238: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 239: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 240: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 241: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 242: \ tmp = fieldname(insn, 0, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 243: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 244: \ tmp = fieldname(insn, 0, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 245: \ tmp = fieldname(insn, 0, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 246: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 247: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 248: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 249: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 250: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 251: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 252: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 253: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 254: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 255: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 256: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 257: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 258: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 259: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 260: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 261: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 262: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 263: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 264: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 265: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 266: \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 267: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 268: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 269: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 270: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 271: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 272: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 273: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 274: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 275: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 276: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 277: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 278: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 279: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 280: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 281: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 282: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 283: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 284: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 285: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 286: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 287: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 288: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 289: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 290: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 291: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 292: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 293: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 294: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 295: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 296: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 297: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 298: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 299: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 300: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 301: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 302: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 303: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 304: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 305: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 306: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 307: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 308: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 309: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 310: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 1; \ tmp |= fieldname(insn, 21, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 311: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 1) << 2; \ tmp |= fieldname(insn, 20, 2) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 312: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 313: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 314: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 315: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 316: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 19); \ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 317: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 6); \ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 318: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 6); \ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 319: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 320: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 321: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 6); \ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 322: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 6); \ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 323: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 324: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 325: \ if (!Check(&S, DecodeFMOVLaneInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 326: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 327: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 328: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 329: \ tmp = fieldname(insn, 0, 5); \ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 1) << 0; \ tmp |= fieldname(insn, 15, 1) << 1; \ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \ { \ uint64_t Bits = getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction, uint32_t) DecodeToMCInst(decodeToMCInst, fieldFromInstruction, uint32_t) DecodeInstruction(decodeInstruction, fieldFromInstruction, decodeToMCInst, uint32_t) capstone-sys-0.11.0/capstone/arch/AArch64/AArch64GenInstrInfo.inc010066400017500001750000002224701363402546700224570ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { AArch64_PHI = 0, AArch64_INLINEASM = 1, AArch64_CFI_INSTRUCTION = 2, AArch64_EH_LABEL = 3, AArch64_GC_LABEL = 4, AArch64_KILL = 5, AArch64_EXTRACT_SUBREG = 6, AArch64_INSERT_SUBREG = 7, AArch64_IMPLICIT_DEF = 8, AArch64_SUBREG_TO_REG = 9, AArch64_COPY_TO_REGCLASS = 10, AArch64_DBG_VALUE = 11, AArch64_REG_SEQUENCE = 12, AArch64_COPY = 13, AArch64_BUNDLE = 14, AArch64_LIFETIME_START = 15, AArch64_LIFETIME_END = 16, AArch64_STACKMAP = 17, AArch64_PATCHPOINT = 18, AArch64_LOAD_STACK_GUARD = 19, AArch64_STATEPOINT = 20, AArch64_FRAME_ALLOC = 21, AArch64_ABSv16i8 = 22, AArch64_ABSv1i64 = 23, AArch64_ABSv2i32 = 24, AArch64_ABSv2i64 = 25, AArch64_ABSv4i16 = 26, AArch64_ABSv4i32 = 27, AArch64_ABSv8i16 = 28, AArch64_ABSv8i8 = 29, AArch64_ADCSWr = 30, AArch64_ADCSXr = 31, AArch64_ADCWr = 32, AArch64_ADCXr = 33, AArch64_ADDHNv2i64_v2i32 = 34, AArch64_ADDHNv2i64_v4i32 = 35, AArch64_ADDHNv4i32_v4i16 = 36, AArch64_ADDHNv4i32_v8i16 = 37, AArch64_ADDHNv8i16_v16i8 = 38, AArch64_ADDHNv8i16_v8i8 = 39, AArch64_ADDPv16i8 = 40, AArch64_ADDPv2i32 = 41, AArch64_ADDPv2i64 = 42, AArch64_ADDPv2i64p = 43, AArch64_ADDPv4i16 = 44, AArch64_ADDPv4i32 = 45, AArch64_ADDPv8i16 = 46, AArch64_ADDPv8i8 = 47, AArch64_ADDSWri = 48, AArch64_ADDSWrr = 49, AArch64_ADDSWrs = 50, AArch64_ADDSWrx = 51, AArch64_ADDSXri = 52, AArch64_ADDSXrr = 53, AArch64_ADDSXrs = 54, AArch64_ADDSXrx = 55, AArch64_ADDSXrx64 = 56, AArch64_ADDVv16i8v = 57, AArch64_ADDVv4i16v = 58, AArch64_ADDVv4i32v = 59, AArch64_ADDVv8i16v = 60, AArch64_ADDVv8i8v = 61, AArch64_ADDWri = 62, AArch64_ADDWrr = 63, AArch64_ADDWrs = 64, AArch64_ADDWrx = 65, AArch64_ADDXri = 66, AArch64_ADDXrr = 67, AArch64_ADDXrs = 68, AArch64_ADDXrx = 69, AArch64_ADDXrx64 = 70, AArch64_ADDv16i8 = 71, AArch64_ADDv1i64 = 72, AArch64_ADDv2i32 = 73, AArch64_ADDv2i64 = 74, AArch64_ADDv4i16 = 75, AArch64_ADDv4i32 = 76, AArch64_ADDv8i16 = 77, AArch64_ADDv8i8 = 78, AArch64_ADJCALLSTACKDOWN = 79, AArch64_ADJCALLSTACKUP = 80, AArch64_ADR = 81, AArch64_ADRP = 82, AArch64_AESDrr = 83, AArch64_AESErr = 84, AArch64_AESIMCrr = 85, AArch64_AESMCrr = 86, AArch64_ANDSWri = 87, AArch64_ANDSWrr = 88, AArch64_ANDSWrs = 89, AArch64_ANDSXri = 90, AArch64_ANDSXrr = 91, AArch64_ANDSXrs = 92, AArch64_ANDWri = 93, AArch64_ANDWrr = 94, AArch64_ANDWrs = 95, AArch64_ANDXri = 96, AArch64_ANDXrr = 97, AArch64_ANDXrs = 98, AArch64_ANDv16i8 = 99, AArch64_ANDv8i8 = 100, AArch64_ASRVWr = 101, AArch64_ASRVXr = 102, AArch64_B = 103, AArch64_BFMWri = 104, AArch64_BFMXri = 105, AArch64_BICSWrr = 106, AArch64_BICSWrs = 107, AArch64_BICSXrr = 108, AArch64_BICSXrs = 109, AArch64_BICWrr = 110, AArch64_BICWrs = 111, AArch64_BICXrr = 112, AArch64_BICXrs = 113, AArch64_BICv16i8 = 114, AArch64_BICv2i32 = 115, AArch64_BICv4i16 = 116, AArch64_BICv4i32 = 117, AArch64_BICv8i16 = 118, AArch64_BICv8i8 = 119, AArch64_BIFv16i8 = 120, AArch64_BIFv8i8 = 121, AArch64_BITv16i8 = 122, AArch64_BITv8i8 = 123, AArch64_BL = 124, AArch64_BLR = 125, AArch64_BR = 126, AArch64_BRK = 127, AArch64_BSLv16i8 = 128, AArch64_BSLv8i8 = 129, AArch64_Bcc = 130, AArch64_CBNZW = 131, AArch64_CBNZX = 132, AArch64_CBZW = 133, AArch64_CBZX = 134, AArch64_CCMNWi = 135, AArch64_CCMNWr = 136, AArch64_CCMNXi = 137, AArch64_CCMNXr = 138, AArch64_CCMPWi = 139, AArch64_CCMPWr = 140, AArch64_CCMPXi = 141, AArch64_CCMPXr = 142, AArch64_CLREX = 143, AArch64_CLSWr = 144, AArch64_CLSXr = 145, AArch64_CLSv16i8 = 146, AArch64_CLSv2i32 = 147, AArch64_CLSv4i16 = 148, AArch64_CLSv4i32 = 149, AArch64_CLSv8i16 = 150, AArch64_CLSv8i8 = 151, AArch64_CLZWr = 152, AArch64_CLZXr = 153, AArch64_CLZv16i8 = 154, AArch64_CLZv2i32 = 155, AArch64_CLZv4i16 = 156, AArch64_CLZv4i32 = 157, AArch64_CLZv8i16 = 158, AArch64_CLZv8i8 = 159, AArch64_CMEQv16i8 = 160, AArch64_CMEQv16i8rz = 161, AArch64_CMEQv1i64 = 162, AArch64_CMEQv1i64rz = 163, AArch64_CMEQv2i32 = 164, AArch64_CMEQv2i32rz = 165, AArch64_CMEQv2i64 = 166, AArch64_CMEQv2i64rz = 167, AArch64_CMEQv4i16 = 168, AArch64_CMEQv4i16rz = 169, AArch64_CMEQv4i32 = 170, AArch64_CMEQv4i32rz = 171, AArch64_CMEQv8i16 = 172, AArch64_CMEQv8i16rz = 173, AArch64_CMEQv8i8 = 174, AArch64_CMEQv8i8rz = 175, AArch64_CMGEv16i8 = 176, AArch64_CMGEv16i8rz = 177, AArch64_CMGEv1i64 = 178, AArch64_CMGEv1i64rz = 179, AArch64_CMGEv2i32 = 180, AArch64_CMGEv2i32rz = 181, AArch64_CMGEv2i64 = 182, AArch64_CMGEv2i64rz = 183, AArch64_CMGEv4i16 = 184, AArch64_CMGEv4i16rz = 185, AArch64_CMGEv4i32 = 186, AArch64_CMGEv4i32rz = 187, AArch64_CMGEv8i16 = 188, AArch64_CMGEv8i16rz = 189, AArch64_CMGEv8i8 = 190, AArch64_CMGEv8i8rz = 191, AArch64_CMGTv16i8 = 192, AArch64_CMGTv16i8rz = 193, AArch64_CMGTv1i64 = 194, AArch64_CMGTv1i64rz = 195, AArch64_CMGTv2i32 = 196, AArch64_CMGTv2i32rz = 197, AArch64_CMGTv2i64 = 198, AArch64_CMGTv2i64rz = 199, AArch64_CMGTv4i16 = 200, AArch64_CMGTv4i16rz = 201, AArch64_CMGTv4i32 = 202, AArch64_CMGTv4i32rz = 203, AArch64_CMGTv8i16 = 204, AArch64_CMGTv8i16rz = 205, AArch64_CMGTv8i8 = 206, AArch64_CMGTv8i8rz = 207, AArch64_CMHIv16i8 = 208, AArch64_CMHIv1i64 = 209, AArch64_CMHIv2i32 = 210, AArch64_CMHIv2i64 = 211, AArch64_CMHIv4i16 = 212, AArch64_CMHIv4i32 = 213, AArch64_CMHIv8i16 = 214, AArch64_CMHIv8i8 = 215, AArch64_CMHSv16i8 = 216, AArch64_CMHSv1i64 = 217, AArch64_CMHSv2i32 = 218, AArch64_CMHSv2i64 = 219, AArch64_CMHSv4i16 = 220, AArch64_CMHSv4i32 = 221, AArch64_CMHSv8i16 = 222, AArch64_CMHSv8i8 = 223, AArch64_CMLEv16i8rz = 224, AArch64_CMLEv1i64rz = 225, AArch64_CMLEv2i32rz = 226, AArch64_CMLEv2i64rz = 227, AArch64_CMLEv4i16rz = 228, AArch64_CMLEv4i32rz = 229, AArch64_CMLEv8i16rz = 230, AArch64_CMLEv8i8rz = 231, AArch64_CMLTv16i8rz = 232, AArch64_CMLTv1i64rz = 233, AArch64_CMLTv2i32rz = 234, AArch64_CMLTv2i64rz = 235, AArch64_CMLTv4i16rz = 236, AArch64_CMLTv4i32rz = 237, AArch64_CMLTv8i16rz = 238, AArch64_CMLTv8i8rz = 239, AArch64_CMTSTv16i8 = 240, AArch64_CMTSTv1i64 = 241, AArch64_CMTSTv2i32 = 242, AArch64_CMTSTv2i64 = 243, AArch64_CMTSTv4i16 = 244, AArch64_CMTSTv4i32 = 245, AArch64_CMTSTv8i16 = 246, AArch64_CMTSTv8i8 = 247, AArch64_CNTv16i8 = 248, AArch64_CNTv8i8 = 249, AArch64_CPYi16 = 250, AArch64_CPYi32 = 251, AArch64_CPYi64 = 252, AArch64_CPYi8 = 253, AArch64_CRC32Brr = 254, AArch64_CRC32CBrr = 255, AArch64_CRC32CHrr = 256, AArch64_CRC32CWrr = 257, AArch64_CRC32CXrr = 258, AArch64_CRC32Hrr = 259, AArch64_CRC32Wrr = 260, AArch64_CRC32Xrr = 261, AArch64_CSELWr = 262, AArch64_CSELXr = 263, AArch64_CSINCWr = 264, AArch64_CSINCXr = 265, AArch64_CSINVWr = 266, AArch64_CSINVXr = 267, AArch64_CSNEGWr = 268, AArch64_CSNEGXr = 269, AArch64_DCPS1 = 270, AArch64_DCPS2 = 271, AArch64_DCPS3 = 272, AArch64_DMB = 273, AArch64_DRPS = 274, AArch64_DSB = 275, AArch64_DUPv16i8gpr = 276, AArch64_DUPv16i8lane = 277, AArch64_DUPv2i32gpr = 278, AArch64_DUPv2i32lane = 279, AArch64_DUPv2i64gpr = 280, AArch64_DUPv2i64lane = 281, AArch64_DUPv4i16gpr = 282, AArch64_DUPv4i16lane = 283, AArch64_DUPv4i32gpr = 284, AArch64_DUPv4i32lane = 285, AArch64_DUPv8i16gpr = 286, AArch64_DUPv8i16lane = 287, AArch64_DUPv8i8gpr = 288, AArch64_DUPv8i8lane = 289, AArch64_EONWrr = 290, AArch64_EONWrs = 291, AArch64_EONXrr = 292, AArch64_EONXrs = 293, AArch64_EORWri = 294, AArch64_EORWrr = 295, AArch64_EORWrs = 296, AArch64_EORXri = 297, AArch64_EORXrr = 298, AArch64_EORXrs = 299, AArch64_EORv16i8 = 300, AArch64_EORv8i8 = 301, AArch64_ERET = 302, AArch64_EXTRWrri = 303, AArch64_EXTRXrri = 304, AArch64_EXTv16i8 = 305, AArch64_EXTv8i8 = 306, AArch64_F128CSEL = 307, AArch64_FABD32 = 308, AArch64_FABD64 = 309, AArch64_FABDv2f32 = 310, AArch64_FABDv2f64 = 311, AArch64_FABDv4f32 = 312, AArch64_FABSDr = 313, AArch64_FABSSr = 314, AArch64_FABSv2f32 = 315, AArch64_FABSv2f64 = 316, AArch64_FABSv4f32 = 317, AArch64_FACGE32 = 318, AArch64_FACGE64 = 319, AArch64_FACGEv2f32 = 320, AArch64_FACGEv2f64 = 321, AArch64_FACGEv4f32 = 322, AArch64_FACGT32 = 323, AArch64_FACGT64 = 324, AArch64_FACGTv2f32 = 325, AArch64_FACGTv2f64 = 326, AArch64_FACGTv4f32 = 327, AArch64_FADDDrr = 328, AArch64_FADDPv2f32 = 329, AArch64_FADDPv2f64 = 330, AArch64_FADDPv2i32p = 331, AArch64_FADDPv2i64p = 332, AArch64_FADDPv4f32 = 333, AArch64_FADDSrr = 334, AArch64_FADDv2f32 = 335, AArch64_FADDv2f64 = 336, AArch64_FADDv4f32 = 337, AArch64_FCCMPDrr = 338, AArch64_FCCMPEDrr = 339, AArch64_FCCMPESrr = 340, AArch64_FCCMPSrr = 341, AArch64_FCMEQ32 = 342, AArch64_FCMEQ64 = 343, AArch64_FCMEQv1i32rz = 344, AArch64_FCMEQv1i64rz = 345, AArch64_FCMEQv2f32 = 346, AArch64_FCMEQv2f64 = 347, AArch64_FCMEQv2i32rz = 348, AArch64_FCMEQv2i64rz = 349, AArch64_FCMEQv4f32 = 350, AArch64_FCMEQv4i32rz = 351, AArch64_FCMGE32 = 352, AArch64_FCMGE64 = 353, AArch64_FCMGEv1i32rz = 354, AArch64_FCMGEv1i64rz = 355, AArch64_FCMGEv2f32 = 356, AArch64_FCMGEv2f64 = 357, AArch64_FCMGEv2i32rz = 358, AArch64_FCMGEv2i64rz = 359, AArch64_FCMGEv4f32 = 360, AArch64_FCMGEv4i32rz = 361, AArch64_FCMGT32 = 362, AArch64_FCMGT64 = 363, AArch64_FCMGTv1i32rz = 364, AArch64_FCMGTv1i64rz = 365, AArch64_FCMGTv2f32 = 366, AArch64_FCMGTv2f64 = 367, AArch64_FCMGTv2i32rz = 368, AArch64_FCMGTv2i64rz = 369, AArch64_FCMGTv4f32 = 370, AArch64_FCMGTv4i32rz = 371, AArch64_FCMLEv1i32rz = 372, AArch64_FCMLEv1i64rz = 373, AArch64_FCMLEv2i32rz = 374, AArch64_FCMLEv2i64rz = 375, AArch64_FCMLEv4i32rz = 376, AArch64_FCMLTv1i32rz = 377, AArch64_FCMLTv1i64rz = 378, AArch64_FCMLTv2i32rz = 379, AArch64_FCMLTv2i64rz = 380, AArch64_FCMLTv4i32rz = 381, AArch64_FCMPDri = 382, AArch64_FCMPDrr = 383, AArch64_FCMPEDri = 384, AArch64_FCMPEDrr = 385, AArch64_FCMPESri = 386, AArch64_FCMPESrr = 387, AArch64_FCMPSri = 388, AArch64_FCMPSrr = 389, AArch64_FCSELDrrr = 390, AArch64_FCSELSrrr = 391, AArch64_FCVTASUWDr = 392, AArch64_FCVTASUWSr = 393, AArch64_FCVTASUXDr = 394, AArch64_FCVTASUXSr = 395, AArch64_FCVTASv1i32 = 396, AArch64_FCVTASv1i64 = 397, AArch64_FCVTASv2f32 = 398, AArch64_FCVTASv2f64 = 399, AArch64_FCVTASv4f32 = 400, AArch64_FCVTAUUWDr = 401, AArch64_FCVTAUUWSr = 402, AArch64_FCVTAUUXDr = 403, AArch64_FCVTAUUXSr = 404, AArch64_FCVTAUv1i32 = 405, AArch64_FCVTAUv1i64 = 406, AArch64_FCVTAUv2f32 = 407, AArch64_FCVTAUv2f64 = 408, AArch64_FCVTAUv4f32 = 409, AArch64_FCVTDHr = 410, AArch64_FCVTDSr = 411, AArch64_FCVTHDr = 412, AArch64_FCVTHSr = 413, AArch64_FCVTLv2i32 = 414, AArch64_FCVTLv4i16 = 415, AArch64_FCVTLv4i32 = 416, AArch64_FCVTLv8i16 = 417, AArch64_FCVTMSUWDr = 418, AArch64_FCVTMSUWSr = 419, AArch64_FCVTMSUXDr = 420, AArch64_FCVTMSUXSr = 421, AArch64_FCVTMSv1i32 = 422, AArch64_FCVTMSv1i64 = 423, AArch64_FCVTMSv2f32 = 424, AArch64_FCVTMSv2f64 = 425, AArch64_FCVTMSv4f32 = 426, AArch64_FCVTMUUWDr = 427, AArch64_FCVTMUUWSr = 428, AArch64_FCVTMUUXDr = 429, AArch64_FCVTMUUXSr = 430, AArch64_FCVTMUv1i32 = 431, AArch64_FCVTMUv1i64 = 432, AArch64_FCVTMUv2f32 = 433, AArch64_FCVTMUv2f64 = 434, AArch64_FCVTMUv4f32 = 435, AArch64_FCVTNSUWDr = 436, AArch64_FCVTNSUWSr = 437, AArch64_FCVTNSUXDr = 438, AArch64_FCVTNSUXSr = 439, AArch64_FCVTNSv1i32 = 440, AArch64_FCVTNSv1i64 = 441, AArch64_FCVTNSv2f32 = 442, AArch64_FCVTNSv2f64 = 443, AArch64_FCVTNSv4f32 = 444, AArch64_FCVTNUUWDr = 445, AArch64_FCVTNUUWSr = 446, AArch64_FCVTNUUXDr = 447, AArch64_FCVTNUUXSr = 448, AArch64_FCVTNUv1i32 = 449, AArch64_FCVTNUv1i64 = 450, AArch64_FCVTNUv2f32 = 451, AArch64_FCVTNUv2f64 = 452, AArch64_FCVTNUv4f32 = 453, AArch64_FCVTNv2i32 = 454, AArch64_FCVTNv4i16 = 455, AArch64_FCVTNv4i32 = 456, AArch64_FCVTNv8i16 = 457, AArch64_FCVTPSUWDr = 458, AArch64_FCVTPSUWSr = 459, AArch64_FCVTPSUXDr = 460, AArch64_FCVTPSUXSr = 461, AArch64_FCVTPSv1i32 = 462, AArch64_FCVTPSv1i64 = 463, AArch64_FCVTPSv2f32 = 464, AArch64_FCVTPSv2f64 = 465, AArch64_FCVTPSv4f32 = 466, AArch64_FCVTPUUWDr = 467, AArch64_FCVTPUUWSr = 468, AArch64_FCVTPUUXDr = 469, AArch64_FCVTPUUXSr = 470, AArch64_FCVTPUv1i32 = 471, AArch64_FCVTPUv1i64 = 472, AArch64_FCVTPUv2f32 = 473, AArch64_FCVTPUv2f64 = 474, AArch64_FCVTPUv4f32 = 475, AArch64_FCVTSDr = 476, AArch64_FCVTSHr = 477, AArch64_FCVTXNv1i64 = 478, AArch64_FCVTXNv2f32 = 479, AArch64_FCVTXNv4f32 = 480, AArch64_FCVTZSSWDri = 481, AArch64_FCVTZSSWSri = 482, AArch64_FCVTZSSXDri = 483, AArch64_FCVTZSSXSri = 484, AArch64_FCVTZSUWDr = 485, AArch64_FCVTZSUWSr = 486, AArch64_FCVTZSUXDr = 487, AArch64_FCVTZSUXSr = 488, AArch64_FCVTZS_IntSWDri = 489, AArch64_FCVTZS_IntSWSri = 490, AArch64_FCVTZS_IntSXDri = 491, AArch64_FCVTZS_IntSXSri = 492, AArch64_FCVTZS_IntUWDr = 493, AArch64_FCVTZS_IntUWSr = 494, AArch64_FCVTZS_IntUXDr = 495, AArch64_FCVTZS_IntUXSr = 496, AArch64_FCVTZS_Intv2f32 = 497, AArch64_FCVTZS_Intv2f64 = 498, AArch64_FCVTZS_Intv4f32 = 499, AArch64_FCVTZSd = 500, AArch64_FCVTZSs = 501, AArch64_FCVTZSv1i32 = 502, AArch64_FCVTZSv1i64 = 503, AArch64_FCVTZSv2f32 = 504, AArch64_FCVTZSv2f64 = 505, AArch64_FCVTZSv2i32_shift = 506, AArch64_FCVTZSv2i64_shift = 507, AArch64_FCVTZSv4f32 = 508, AArch64_FCVTZSv4i32_shift = 509, AArch64_FCVTZUSWDri = 510, AArch64_FCVTZUSWSri = 511, AArch64_FCVTZUSXDri = 512, AArch64_FCVTZUSXSri = 513, AArch64_FCVTZUUWDr = 514, AArch64_FCVTZUUWSr = 515, AArch64_FCVTZUUXDr = 516, AArch64_FCVTZUUXSr = 517, AArch64_FCVTZU_IntSWDri = 518, AArch64_FCVTZU_IntSWSri = 519, AArch64_FCVTZU_IntSXDri = 520, AArch64_FCVTZU_IntSXSri = 521, AArch64_FCVTZU_IntUWDr = 522, AArch64_FCVTZU_IntUWSr = 523, AArch64_FCVTZU_IntUXDr = 524, AArch64_FCVTZU_IntUXSr = 525, AArch64_FCVTZU_Intv2f32 = 526, AArch64_FCVTZU_Intv2f64 = 527, AArch64_FCVTZU_Intv4f32 = 528, AArch64_FCVTZUd = 529, AArch64_FCVTZUs = 530, AArch64_FCVTZUv1i32 = 531, AArch64_FCVTZUv1i64 = 532, AArch64_FCVTZUv2f32 = 533, AArch64_FCVTZUv2f64 = 534, AArch64_FCVTZUv2i32_shift = 535, AArch64_FCVTZUv2i64_shift = 536, AArch64_FCVTZUv4f32 = 537, AArch64_FCVTZUv4i32_shift = 538, AArch64_FDIVDrr = 539, AArch64_FDIVSrr = 540, AArch64_FDIVv2f32 = 541, AArch64_FDIVv2f64 = 542, AArch64_FDIVv4f32 = 543, AArch64_FMADDDrrr = 544, AArch64_FMADDSrrr = 545, AArch64_FMAXDrr = 546, AArch64_FMAXNMDrr = 547, AArch64_FMAXNMPv2f32 = 548, AArch64_FMAXNMPv2f64 = 549, AArch64_FMAXNMPv2i32p = 550, AArch64_FMAXNMPv2i64p = 551, AArch64_FMAXNMPv4f32 = 552, AArch64_FMAXNMSrr = 553, AArch64_FMAXNMVv4i32v = 554, AArch64_FMAXNMv2f32 = 555, AArch64_FMAXNMv2f64 = 556, AArch64_FMAXNMv4f32 = 557, AArch64_FMAXPv2f32 = 558, AArch64_FMAXPv2f64 = 559, AArch64_FMAXPv2i32p = 560, AArch64_FMAXPv2i64p = 561, AArch64_FMAXPv4f32 = 562, AArch64_FMAXSrr = 563, AArch64_FMAXVv4i32v = 564, AArch64_FMAXv2f32 = 565, AArch64_FMAXv2f64 = 566, AArch64_FMAXv4f32 = 567, AArch64_FMINDrr = 568, AArch64_FMINNMDrr = 569, AArch64_FMINNMPv2f32 = 570, AArch64_FMINNMPv2f64 = 571, AArch64_FMINNMPv2i32p = 572, AArch64_FMINNMPv2i64p = 573, AArch64_FMINNMPv4f32 = 574, AArch64_FMINNMSrr = 575, AArch64_FMINNMVv4i32v = 576, AArch64_FMINNMv2f32 = 577, AArch64_FMINNMv2f64 = 578, AArch64_FMINNMv4f32 = 579, AArch64_FMINPv2f32 = 580, AArch64_FMINPv2f64 = 581, AArch64_FMINPv2i32p = 582, AArch64_FMINPv2i64p = 583, AArch64_FMINPv4f32 = 584, AArch64_FMINSrr = 585, AArch64_FMINVv4i32v = 586, AArch64_FMINv2f32 = 587, AArch64_FMINv2f64 = 588, AArch64_FMINv4f32 = 589, AArch64_FMLAv1i32_indexed = 590, AArch64_FMLAv1i64_indexed = 591, AArch64_FMLAv2f32 = 592, AArch64_FMLAv2f64 = 593, AArch64_FMLAv2i32_indexed = 594, AArch64_FMLAv2i64_indexed = 595, AArch64_FMLAv4f32 = 596, AArch64_FMLAv4i32_indexed = 597, AArch64_FMLSv1i32_indexed = 598, AArch64_FMLSv1i64_indexed = 599, AArch64_FMLSv2f32 = 600, AArch64_FMLSv2f64 = 601, AArch64_FMLSv2i32_indexed = 602, AArch64_FMLSv2i64_indexed = 603, AArch64_FMLSv4f32 = 604, AArch64_FMLSv4i32_indexed = 605, AArch64_FMOVDXHighr = 606, AArch64_FMOVDXr = 607, AArch64_FMOVDi = 608, AArch64_FMOVDr = 609, AArch64_FMOVSWr = 610, AArch64_FMOVSi = 611, AArch64_FMOVSr = 612, AArch64_FMOVWSr = 613, AArch64_FMOVXDHighr = 614, AArch64_FMOVXDr = 615, AArch64_FMOVv2f32_ns = 616, AArch64_FMOVv2f64_ns = 617, AArch64_FMOVv4f32_ns = 618, AArch64_FMSUBDrrr = 619, AArch64_FMSUBSrrr = 620, AArch64_FMULDrr = 621, AArch64_FMULSrr = 622, AArch64_FMULX32 = 623, AArch64_FMULX64 = 624, AArch64_FMULXv1i32_indexed = 625, AArch64_FMULXv1i64_indexed = 626, AArch64_FMULXv2f32 = 627, AArch64_FMULXv2f64 = 628, AArch64_FMULXv2i32_indexed = 629, AArch64_FMULXv2i64_indexed = 630, AArch64_FMULXv4f32 = 631, AArch64_FMULXv4i32_indexed = 632, AArch64_FMULv1i32_indexed = 633, AArch64_FMULv1i64_indexed = 634, AArch64_FMULv2f32 = 635, AArch64_FMULv2f64 = 636, AArch64_FMULv2i32_indexed = 637, AArch64_FMULv2i64_indexed = 638, AArch64_FMULv4f32 = 639, AArch64_FMULv4i32_indexed = 640, AArch64_FNEGDr = 641, AArch64_FNEGSr = 642, AArch64_FNEGv2f32 = 643, AArch64_FNEGv2f64 = 644, AArch64_FNEGv4f32 = 645, AArch64_FNMADDDrrr = 646, AArch64_FNMADDSrrr = 647, AArch64_FNMSUBDrrr = 648, AArch64_FNMSUBSrrr = 649, AArch64_FNMULDrr = 650, AArch64_FNMULSrr = 651, AArch64_FRECPEv1i32 = 652, AArch64_FRECPEv1i64 = 653, AArch64_FRECPEv2f32 = 654, AArch64_FRECPEv2f64 = 655, AArch64_FRECPEv4f32 = 656, AArch64_FRECPS32 = 657, AArch64_FRECPS64 = 658, AArch64_FRECPSv2f32 = 659, AArch64_FRECPSv2f64 = 660, AArch64_FRECPSv4f32 = 661, AArch64_FRECPXv1i32 = 662, AArch64_FRECPXv1i64 = 663, AArch64_FRINTADr = 664, AArch64_FRINTASr = 665, AArch64_FRINTAv2f32 = 666, AArch64_FRINTAv2f64 = 667, AArch64_FRINTAv4f32 = 668, AArch64_FRINTIDr = 669, AArch64_FRINTISr = 670, AArch64_FRINTIv2f32 = 671, AArch64_FRINTIv2f64 = 672, AArch64_FRINTIv4f32 = 673, AArch64_FRINTMDr = 674, AArch64_FRINTMSr = 675, AArch64_FRINTMv2f32 = 676, AArch64_FRINTMv2f64 = 677, AArch64_FRINTMv4f32 = 678, AArch64_FRINTNDr = 679, AArch64_FRINTNSr = 680, AArch64_FRINTNv2f32 = 681, AArch64_FRINTNv2f64 = 682, AArch64_FRINTNv4f32 = 683, AArch64_FRINTPDr = 684, AArch64_FRINTPSr = 685, AArch64_FRINTPv2f32 = 686, AArch64_FRINTPv2f64 = 687, AArch64_FRINTPv4f32 = 688, AArch64_FRINTXDr = 689, AArch64_FRINTXSr = 690, AArch64_FRINTXv2f32 = 691, AArch64_FRINTXv2f64 = 692, AArch64_FRINTXv4f32 = 693, AArch64_FRINTZDr = 694, AArch64_FRINTZSr = 695, AArch64_FRINTZv2f32 = 696, AArch64_FRINTZv2f64 = 697, AArch64_FRINTZv4f32 = 698, AArch64_FRSQRTEv1i32 = 699, AArch64_FRSQRTEv1i64 = 700, AArch64_FRSQRTEv2f32 = 701, AArch64_FRSQRTEv2f64 = 702, AArch64_FRSQRTEv4f32 = 703, AArch64_FRSQRTS32 = 704, AArch64_FRSQRTS64 = 705, AArch64_FRSQRTSv2f32 = 706, AArch64_FRSQRTSv2f64 = 707, AArch64_FRSQRTSv4f32 = 708, AArch64_FSQRTDr = 709, AArch64_FSQRTSr = 710, AArch64_FSQRTv2f32 = 711, AArch64_FSQRTv2f64 = 712, AArch64_FSQRTv4f32 = 713, AArch64_FSUBDrr = 714, AArch64_FSUBSrr = 715, AArch64_FSUBv2f32 = 716, AArch64_FSUBv2f64 = 717, AArch64_FSUBv4f32 = 718, AArch64_HINT = 719, AArch64_HLT = 720, AArch64_HVC = 721, AArch64_INSvi16gpr = 722, AArch64_INSvi16lane = 723, AArch64_INSvi32gpr = 724, AArch64_INSvi32lane = 725, AArch64_INSvi64gpr = 726, AArch64_INSvi64lane = 727, AArch64_INSvi8gpr = 728, AArch64_INSvi8lane = 729, AArch64_ISB = 730, AArch64_LD1Fourv16b = 731, AArch64_LD1Fourv16b_POST = 732, AArch64_LD1Fourv1d = 733, AArch64_LD1Fourv1d_POST = 734, AArch64_LD1Fourv2d = 735, AArch64_LD1Fourv2d_POST = 736, AArch64_LD1Fourv2s = 737, AArch64_LD1Fourv2s_POST = 738, AArch64_LD1Fourv4h = 739, AArch64_LD1Fourv4h_POST = 740, AArch64_LD1Fourv4s = 741, AArch64_LD1Fourv4s_POST = 742, AArch64_LD1Fourv8b = 743, AArch64_LD1Fourv8b_POST = 744, AArch64_LD1Fourv8h = 745, AArch64_LD1Fourv8h_POST = 746, AArch64_LD1Onev16b = 747, AArch64_LD1Onev16b_POST = 748, AArch64_LD1Onev1d = 749, AArch64_LD1Onev1d_POST = 750, AArch64_LD1Onev2d = 751, AArch64_LD1Onev2d_POST = 752, AArch64_LD1Onev2s = 753, AArch64_LD1Onev2s_POST = 754, AArch64_LD1Onev4h = 755, AArch64_LD1Onev4h_POST = 756, AArch64_LD1Onev4s = 757, AArch64_LD1Onev4s_POST = 758, AArch64_LD1Onev8b = 759, AArch64_LD1Onev8b_POST = 760, AArch64_LD1Onev8h = 761, AArch64_LD1Onev8h_POST = 762, AArch64_LD1Rv16b = 763, AArch64_LD1Rv16b_POST = 764, AArch64_LD1Rv1d = 765, AArch64_LD1Rv1d_POST = 766, AArch64_LD1Rv2d = 767, AArch64_LD1Rv2d_POST = 768, AArch64_LD1Rv2s = 769, AArch64_LD1Rv2s_POST = 770, AArch64_LD1Rv4h = 771, AArch64_LD1Rv4h_POST = 772, AArch64_LD1Rv4s = 773, AArch64_LD1Rv4s_POST = 774, AArch64_LD1Rv8b = 775, AArch64_LD1Rv8b_POST = 776, AArch64_LD1Rv8h = 777, AArch64_LD1Rv8h_POST = 778, AArch64_LD1Threev16b = 779, AArch64_LD1Threev16b_POST = 780, AArch64_LD1Threev1d = 781, AArch64_LD1Threev1d_POST = 782, AArch64_LD1Threev2d = 783, AArch64_LD1Threev2d_POST = 784, AArch64_LD1Threev2s = 785, AArch64_LD1Threev2s_POST = 786, AArch64_LD1Threev4h = 787, AArch64_LD1Threev4h_POST = 788, AArch64_LD1Threev4s = 789, AArch64_LD1Threev4s_POST = 790, AArch64_LD1Threev8b = 791, AArch64_LD1Threev8b_POST = 792, AArch64_LD1Threev8h = 793, AArch64_LD1Threev8h_POST = 794, AArch64_LD1Twov16b = 795, AArch64_LD1Twov16b_POST = 796, AArch64_LD1Twov1d = 797, AArch64_LD1Twov1d_POST = 798, AArch64_LD1Twov2d = 799, AArch64_LD1Twov2d_POST = 800, AArch64_LD1Twov2s = 801, AArch64_LD1Twov2s_POST = 802, AArch64_LD1Twov4h = 803, AArch64_LD1Twov4h_POST = 804, AArch64_LD1Twov4s = 805, AArch64_LD1Twov4s_POST = 806, AArch64_LD1Twov8b = 807, AArch64_LD1Twov8b_POST = 808, AArch64_LD1Twov8h = 809, AArch64_LD1Twov8h_POST = 810, AArch64_LD1i16 = 811, AArch64_LD1i16_POST = 812, AArch64_LD1i32 = 813, AArch64_LD1i32_POST = 814, AArch64_LD1i64 = 815, AArch64_LD1i64_POST = 816, AArch64_LD1i8 = 817, AArch64_LD1i8_POST = 818, AArch64_LD2Rv16b = 819, AArch64_LD2Rv16b_POST = 820, AArch64_LD2Rv1d = 821, AArch64_LD2Rv1d_POST = 822, AArch64_LD2Rv2d = 823, AArch64_LD2Rv2d_POST = 824, AArch64_LD2Rv2s = 825, AArch64_LD2Rv2s_POST = 826, AArch64_LD2Rv4h = 827, AArch64_LD2Rv4h_POST = 828, AArch64_LD2Rv4s = 829, AArch64_LD2Rv4s_POST = 830, AArch64_LD2Rv8b = 831, AArch64_LD2Rv8b_POST = 832, AArch64_LD2Rv8h = 833, AArch64_LD2Rv8h_POST = 834, AArch64_LD2Twov16b = 835, AArch64_LD2Twov16b_POST = 836, AArch64_LD2Twov2d = 837, AArch64_LD2Twov2d_POST = 838, AArch64_LD2Twov2s = 839, AArch64_LD2Twov2s_POST = 840, AArch64_LD2Twov4h = 841, AArch64_LD2Twov4h_POST = 842, AArch64_LD2Twov4s = 843, AArch64_LD2Twov4s_POST = 844, AArch64_LD2Twov8b = 845, AArch64_LD2Twov8b_POST = 846, AArch64_LD2Twov8h = 847, AArch64_LD2Twov8h_POST = 848, AArch64_LD2i16 = 849, AArch64_LD2i16_POST = 850, AArch64_LD2i32 = 851, AArch64_LD2i32_POST = 852, AArch64_LD2i64 = 853, AArch64_LD2i64_POST = 854, AArch64_LD2i8 = 855, AArch64_LD2i8_POST = 856, AArch64_LD3Rv16b = 857, AArch64_LD3Rv16b_POST = 858, AArch64_LD3Rv1d = 859, AArch64_LD3Rv1d_POST = 860, AArch64_LD3Rv2d = 861, AArch64_LD3Rv2d_POST = 862, AArch64_LD3Rv2s = 863, AArch64_LD3Rv2s_POST = 864, AArch64_LD3Rv4h = 865, AArch64_LD3Rv4h_POST = 866, AArch64_LD3Rv4s = 867, AArch64_LD3Rv4s_POST = 868, AArch64_LD3Rv8b = 869, AArch64_LD3Rv8b_POST = 870, AArch64_LD3Rv8h = 871, AArch64_LD3Rv8h_POST = 872, AArch64_LD3Threev16b = 873, AArch64_LD3Threev16b_POST = 874, AArch64_LD3Threev2d = 875, AArch64_LD3Threev2d_POST = 876, AArch64_LD3Threev2s = 877, AArch64_LD3Threev2s_POST = 878, AArch64_LD3Threev4h = 879, AArch64_LD3Threev4h_POST = 880, AArch64_LD3Threev4s = 881, AArch64_LD3Threev4s_POST = 882, AArch64_LD3Threev8b = 883, AArch64_LD3Threev8b_POST = 884, AArch64_LD3Threev8h = 885, AArch64_LD3Threev8h_POST = 886, AArch64_LD3i16 = 887, AArch64_LD3i16_POST = 888, AArch64_LD3i32 = 889, AArch64_LD3i32_POST = 890, AArch64_LD3i64 = 891, AArch64_LD3i64_POST = 892, AArch64_LD3i8 = 893, AArch64_LD3i8_POST = 894, AArch64_LD4Fourv16b = 895, AArch64_LD4Fourv16b_POST = 896, AArch64_LD4Fourv2d = 897, AArch64_LD4Fourv2d_POST = 898, AArch64_LD4Fourv2s = 899, AArch64_LD4Fourv2s_POST = 900, AArch64_LD4Fourv4h = 901, AArch64_LD4Fourv4h_POST = 902, AArch64_LD4Fourv4s = 903, AArch64_LD4Fourv4s_POST = 904, AArch64_LD4Fourv8b = 905, AArch64_LD4Fourv8b_POST = 906, AArch64_LD4Fourv8h = 907, AArch64_LD4Fourv8h_POST = 908, AArch64_LD4Rv16b = 909, AArch64_LD4Rv16b_POST = 910, AArch64_LD4Rv1d = 911, AArch64_LD4Rv1d_POST = 912, AArch64_LD4Rv2d = 913, AArch64_LD4Rv2d_POST = 914, AArch64_LD4Rv2s = 915, AArch64_LD4Rv2s_POST = 916, AArch64_LD4Rv4h = 917, AArch64_LD4Rv4h_POST = 918, AArch64_LD4Rv4s = 919, AArch64_LD4Rv4s_POST = 920, AArch64_LD4Rv8b = 921, AArch64_LD4Rv8b_POST = 922, AArch64_LD4Rv8h = 923, AArch64_LD4Rv8h_POST = 924, AArch64_LD4i16 = 925, AArch64_LD4i16_POST = 926, AArch64_LD4i32 = 927, AArch64_LD4i32_POST = 928, AArch64_LD4i64 = 929, AArch64_LD4i64_POST = 930, AArch64_LD4i8 = 931, AArch64_LD4i8_POST = 932, AArch64_LDARB = 933, AArch64_LDARH = 934, AArch64_LDARW = 935, AArch64_LDARX = 936, AArch64_LDAXPW = 937, AArch64_LDAXPX = 938, AArch64_LDAXRB = 939, AArch64_LDAXRH = 940, AArch64_LDAXRW = 941, AArch64_LDAXRX = 942, AArch64_LDNPDi = 943, AArch64_LDNPQi = 944, AArch64_LDNPSi = 945, AArch64_LDNPWi = 946, AArch64_LDNPXi = 947, AArch64_LDPDi = 948, AArch64_LDPDpost = 949, AArch64_LDPDpre = 950, AArch64_LDPQi = 951, AArch64_LDPQpost = 952, AArch64_LDPQpre = 953, AArch64_LDPSWi = 954, AArch64_LDPSWpost = 955, AArch64_LDPSWpre = 956, AArch64_LDPSi = 957, AArch64_LDPSpost = 958, AArch64_LDPSpre = 959, AArch64_LDPWi = 960, AArch64_LDPWpost = 961, AArch64_LDPWpre = 962, AArch64_LDPXi = 963, AArch64_LDPXpost = 964, AArch64_LDPXpre = 965, AArch64_LDRBBpost = 966, AArch64_LDRBBpre = 967, AArch64_LDRBBroW = 968, AArch64_LDRBBroX = 969, AArch64_LDRBBui = 970, AArch64_LDRBpost = 971, AArch64_LDRBpre = 972, AArch64_LDRBroW = 973, AArch64_LDRBroX = 974, AArch64_LDRBui = 975, AArch64_LDRDl = 976, AArch64_LDRDpost = 977, AArch64_LDRDpre = 978, AArch64_LDRDroW = 979, AArch64_LDRDroX = 980, AArch64_LDRDui = 981, AArch64_LDRHHpost = 982, AArch64_LDRHHpre = 983, AArch64_LDRHHroW = 984, AArch64_LDRHHroX = 985, AArch64_LDRHHui = 986, AArch64_LDRHpost = 987, AArch64_LDRHpre = 988, AArch64_LDRHroW = 989, AArch64_LDRHroX = 990, AArch64_LDRHui = 991, AArch64_LDRQl = 992, AArch64_LDRQpost = 993, AArch64_LDRQpre = 994, AArch64_LDRQroW = 995, AArch64_LDRQroX = 996, AArch64_LDRQui = 997, AArch64_LDRSBWpost = 998, AArch64_LDRSBWpre = 999, AArch64_LDRSBWroW = 1000, AArch64_LDRSBWroX = 1001, AArch64_LDRSBWui = 1002, AArch64_LDRSBXpost = 1003, AArch64_LDRSBXpre = 1004, AArch64_LDRSBXroW = 1005, AArch64_LDRSBXroX = 1006, AArch64_LDRSBXui = 1007, AArch64_LDRSHWpost = 1008, AArch64_LDRSHWpre = 1009, AArch64_LDRSHWroW = 1010, AArch64_LDRSHWroX = 1011, AArch64_LDRSHWui = 1012, AArch64_LDRSHXpost = 1013, AArch64_LDRSHXpre = 1014, AArch64_LDRSHXroW = 1015, AArch64_LDRSHXroX = 1016, AArch64_LDRSHXui = 1017, AArch64_LDRSWl = 1018, AArch64_LDRSWpost = 1019, AArch64_LDRSWpre = 1020, AArch64_LDRSWroW = 1021, AArch64_LDRSWroX = 1022, AArch64_LDRSWui = 1023, AArch64_LDRSl = 1024, AArch64_LDRSpost = 1025, AArch64_LDRSpre = 1026, AArch64_LDRSroW = 1027, AArch64_LDRSroX = 1028, AArch64_LDRSui = 1029, AArch64_LDRWl = 1030, AArch64_LDRWpost = 1031, AArch64_LDRWpre = 1032, AArch64_LDRWroW = 1033, AArch64_LDRWroX = 1034, AArch64_LDRWui = 1035, AArch64_LDRXl = 1036, AArch64_LDRXpost = 1037, AArch64_LDRXpre = 1038, AArch64_LDRXroW = 1039, AArch64_LDRXroX = 1040, AArch64_LDRXui = 1041, AArch64_LDTRBi = 1042, AArch64_LDTRHi = 1043, AArch64_LDTRSBWi = 1044, AArch64_LDTRSBXi = 1045, AArch64_LDTRSHWi = 1046, AArch64_LDTRSHXi = 1047, AArch64_LDTRSWi = 1048, AArch64_LDTRWi = 1049, AArch64_LDTRXi = 1050, AArch64_LDURBBi = 1051, AArch64_LDURBi = 1052, AArch64_LDURDi = 1053, AArch64_LDURHHi = 1054, AArch64_LDURHi = 1055, AArch64_LDURQi = 1056, AArch64_LDURSBWi = 1057, AArch64_LDURSBXi = 1058, AArch64_LDURSHWi = 1059, AArch64_LDURSHXi = 1060, AArch64_LDURSWi = 1061, AArch64_LDURSi = 1062, AArch64_LDURWi = 1063, AArch64_LDURXi = 1064, AArch64_LDXPW = 1065, AArch64_LDXPX = 1066, AArch64_LDXRB = 1067, AArch64_LDXRH = 1068, AArch64_LDXRW = 1069, AArch64_LDXRX = 1070, AArch64_LOADgot = 1071, AArch64_LSLVWr = 1072, AArch64_LSLVXr = 1073, AArch64_LSRVWr = 1074, AArch64_LSRVXr = 1075, AArch64_MADDWrrr = 1076, AArch64_MADDXrrr = 1077, AArch64_MLAv16i8 = 1078, AArch64_MLAv2i32 = 1079, AArch64_MLAv2i32_indexed = 1080, AArch64_MLAv4i16 = 1081, AArch64_MLAv4i16_indexed = 1082, AArch64_MLAv4i32 = 1083, AArch64_MLAv4i32_indexed = 1084, AArch64_MLAv8i16 = 1085, AArch64_MLAv8i16_indexed = 1086, AArch64_MLAv8i8 = 1087, AArch64_MLSv16i8 = 1088, AArch64_MLSv2i32 = 1089, AArch64_MLSv2i32_indexed = 1090, AArch64_MLSv4i16 = 1091, AArch64_MLSv4i16_indexed = 1092, AArch64_MLSv4i32 = 1093, AArch64_MLSv4i32_indexed = 1094, AArch64_MLSv8i16 = 1095, AArch64_MLSv8i16_indexed = 1096, AArch64_MLSv8i8 = 1097, AArch64_MOVID = 1098, AArch64_MOVIv16b_ns = 1099, AArch64_MOVIv2d_ns = 1100, AArch64_MOVIv2i32 = 1101, AArch64_MOVIv2s_msl = 1102, AArch64_MOVIv4i16 = 1103, AArch64_MOVIv4i32 = 1104, AArch64_MOVIv4s_msl = 1105, AArch64_MOVIv8b_ns = 1106, AArch64_MOVIv8i16 = 1107, AArch64_MOVKWi = 1108, AArch64_MOVKXi = 1109, AArch64_MOVNWi = 1110, AArch64_MOVNXi = 1111, AArch64_MOVZWi = 1112, AArch64_MOVZXi = 1113, AArch64_MOVaddr = 1114, AArch64_MOVaddrBA = 1115, AArch64_MOVaddrCP = 1116, AArch64_MOVaddrEXT = 1117, AArch64_MOVaddrJT = 1118, AArch64_MOVaddrTLS = 1119, AArch64_MOVi32imm = 1120, AArch64_MOVi64imm = 1121, AArch64_MRS = 1122, AArch64_MSR = 1123, AArch64_MSRpstate = 1124, AArch64_MSUBWrrr = 1125, AArch64_MSUBXrrr = 1126, AArch64_MULv16i8 = 1127, AArch64_MULv2i32 = 1128, AArch64_MULv2i32_indexed = 1129, AArch64_MULv4i16 = 1130, AArch64_MULv4i16_indexed = 1131, AArch64_MULv4i32 = 1132, AArch64_MULv4i32_indexed = 1133, AArch64_MULv8i16 = 1134, AArch64_MULv8i16_indexed = 1135, AArch64_MULv8i8 = 1136, AArch64_MVNIv2i32 = 1137, AArch64_MVNIv2s_msl = 1138, AArch64_MVNIv4i16 = 1139, AArch64_MVNIv4i32 = 1140, AArch64_MVNIv4s_msl = 1141, AArch64_MVNIv8i16 = 1142, AArch64_NEGv16i8 = 1143, AArch64_NEGv1i64 = 1144, AArch64_NEGv2i32 = 1145, AArch64_NEGv2i64 = 1146, AArch64_NEGv4i16 = 1147, AArch64_NEGv4i32 = 1148, AArch64_NEGv8i16 = 1149, AArch64_NEGv8i8 = 1150, AArch64_NOTv16i8 = 1151, AArch64_NOTv8i8 = 1152, AArch64_ORNWrr = 1153, AArch64_ORNWrs = 1154, AArch64_ORNXrr = 1155, AArch64_ORNXrs = 1156, AArch64_ORNv16i8 = 1157, AArch64_ORNv8i8 = 1158, AArch64_ORRWri = 1159, AArch64_ORRWrr = 1160, AArch64_ORRWrs = 1161, AArch64_ORRXri = 1162, AArch64_ORRXrr = 1163, AArch64_ORRXrs = 1164, AArch64_ORRv16i8 = 1165, AArch64_ORRv2i32 = 1166, AArch64_ORRv4i16 = 1167, AArch64_ORRv4i32 = 1168, AArch64_ORRv8i16 = 1169, AArch64_ORRv8i8 = 1170, AArch64_PMULLv16i8 = 1171, AArch64_PMULLv1i64 = 1172, AArch64_PMULLv2i64 = 1173, AArch64_PMULLv8i8 = 1174, AArch64_PMULv16i8 = 1175, AArch64_PMULv8i8 = 1176, AArch64_PRFMl = 1177, AArch64_PRFMroW = 1178, AArch64_PRFMroX = 1179, AArch64_PRFMui = 1180, AArch64_PRFUMi = 1181, AArch64_RADDHNv2i64_v2i32 = 1182, AArch64_RADDHNv2i64_v4i32 = 1183, AArch64_RADDHNv4i32_v4i16 = 1184, AArch64_RADDHNv4i32_v8i16 = 1185, AArch64_RADDHNv8i16_v16i8 = 1186, AArch64_RADDHNv8i16_v8i8 = 1187, AArch64_RBITWr = 1188, AArch64_RBITXr = 1189, AArch64_RBITv16i8 = 1190, AArch64_RBITv8i8 = 1191, AArch64_RET = 1192, AArch64_RET_ReallyLR = 1193, AArch64_REV16Wr = 1194, AArch64_REV16Xr = 1195, AArch64_REV16v16i8 = 1196, AArch64_REV16v8i8 = 1197, AArch64_REV32Xr = 1198, AArch64_REV32v16i8 = 1199, AArch64_REV32v4i16 = 1200, AArch64_REV32v8i16 = 1201, AArch64_REV32v8i8 = 1202, AArch64_REV64v16i8 = 1203, AArch64_REV64v2i32 = 1204, AArch64_REV64v4i16 = 1205, AArch64_REV64v4i32 = 1206, AArch64_REV64v8i16 = 1207, AArch64_REV64v8i8 = 1208, AArch64_REVWr = 1209, AArch64_REVXr = 1210, AArch64_RORVWr = 1211, AArch64_RORVXr = 1212, AArch64_RSHRNv16i8_shift = 1213, AArch64_RSHRNv2i32_shift = 1214, AArch64_RSHRNv4i16_shift = 1215, AArch64_RSHRNv4i32_shift = 1216, AArch64_RSHRNv8i16_shift = 1217, AArch64_RSHRNv8i8_shift = 1218, AArch64_RSUBHNv2i64_v2i32 = 1219, AArch64_RSUBHNv2i64_v4i32 = 1220, AArch64_RSUBHNv4i32_v4i16 = 1221, AArch64_RSUBHNv4i32_v8i16 = 1222, AArch64_RSUBHNv8i16_v16i8 = 1223, AArch64_RSUBHNv8i16_v8i8 = 1224, AArch64_SABALv16i8_v8i16 = 1225, AArch64_SABALv2i32_v2i64 = 1226, AArch64_SABALv4i16_v4i32 = 1227, AArch64_SABALv4i32_v2i64 = 1228, AArch64_SABALv8i16_v4i32 = 1229, AArch64_SABALv8i8_v8i16 = 1230, AArch64_SABAv16i8 = 1231, AArch64_SABAv2i32 = 1232, AArch64_SABAv4i16 = 1233, AArch64_SABAv4i32 = 1234, AArch64_SABAv8i16 = 1235, AArch64_SABAv8i8 = 1236, AArch64_SABDLv16i8_v8i16 = 1237, AArch64_SABDLv2i32_v2i64 = 1238, AArch64_SABDLv4i16_v4i32 = 1239, AArch64_SABDLv4i32_v2i64 = 1240, AArch64_SABDLv8i16_v4i32 = 1241, AArch64_SABDLv8i8_v8i16 = 1242, AArch64_SABDv16i8 = 1243, AArch64_SABDv2i32 = 1244, AArch64_SABDv4i16 = 1245, AArch64_SABDv4i32 = 1246, AArch64_SABDv8i16 = 1247, AArch64_SABDv8i8 = 1248, AArch64_SADALPv16i8_v8i16 = 1249, AArch64_SADALPv2i32_v1i64 = 1250, AArch64_SADALPv4i16_v2i32 = 1251, AArch64_SADALPv4i32_v2i64 = 1252, AArch64_SADALPv8i16_v4i32 = 1253, AArch64_SADALPv8i8_v4i16 = 1254, AArch64_SADDLPv16i8_v8i16 = 1255, AArch64_SADDLPv2i32_v1i64 = 1256, AArch64_SADDLPv4i16_v2i32 = 1257, AArch64_SADDLPv4i32_v2i64 = 1258, AArch64_SADDLPv8i16_v4i32 = 1259, AArch64_SADDLPv8i8_v4i16 = 1260, AArch64_SADDLVv16i8v = 1261, AArch64_SADDLVv4i16v = 1262, AArch64_SADDLVv4i32v = 1263, AArch64_SADDLVv8i16v = 1264, AArch64_SADDLVv8i8v = 1265, AArch64_SADDLv16i8_v8i16 = 1266, AArch64_SADDLv2i32_v2i64 = 1267, AArch64_SADDLv4i16_v4i32 = 1268, AArch64_SADDLv4i32_v2i64 = 1269, AArch64_SADDLv8i16_v4i32 = 1270, AArch64_SADDLv8i8_v8i16 = 1271, AArch64_SADDWv16i8_v8i16 = 1272, AArch64_SADDWv2i32_v2i64 = 1273, AArch64_SADDWv4i16_v4i32 = 1274, AArch64_SADDWv4i32_v2i64 = 1275, AArch64_SADDWv8i16_v4i32 = 1276, AArch64_SADDWv8i8_v8i16 = 1277, AArch64_SBCSWr = 1278, AArch64_SBCSXr = 1279, AArch64_SBCWr = 1280, AArch64_SBCXr = 1281, AArch64_SBFMWri = 1282, AArch64_SBFMXri = 1283, AArch64_SCVTFSWDri = 1284, AArch64_SCVTFSWSri = 1285, AArch64_SCVTFSXDri = 1286, AArch64_SCVTFSXSri = 1287, AArch64_SCVTFUWDri = 1288, AArch64_SCVTFUWSri = 1289, AArch64_SCVTFUXDri = 1290, AArch64_SCVTFUXSri = 1291, AArch64_SCVTFd = 1292, AArch64_SCVTFs = 1293, AArch64_SCVTFv1i32 = 1294, AArch64_SCVTFv1i64 = 1295, AArch64_SCVTFv2f32 = 1296, AArch64_SCVTFv2f64 = 1297, AArch64_SCVTFv2i32_shift = 1298, AArch64_SCVTFv2i64_shift = 1299, AArch64_SCVTFv4f32 = 1300, AArch64_SCVTFv4i32_shift = 1301, AArch64_SDIVWr = 1302, AArch64_SDIVXr = 1303, AArch64_SDIV_IntWr = 1304, AArch64_SDIV_IntXr = 1305, AArch64_SHA1Crrr = 1306, AArch64_SHA1Hrr = 1307, AArch64_SHA1Mrrr = 1308, AArch64_SHA1Prrr = 1309, AArch64_SHA1SU0rrr = 1310, AArch64_SHA1SU1rr = 1311, AArch64_SHA256H2rrr = 1312, AArch64_SHA256Hrrr = 1313, AArch64_SHA256SU0rr = 1314, AArch64_SHA256SU1rrr = 1315, AArch64_SHADDv16i8 = 1316, AArch64_SHADDv2i32 = 1317, AArch64_SHADDv4i16 = 1318, AArch64_SHADDv4i32 = 1319, AArch64_SHADDv8i16 = 1320, AArch64_SHADDv8i8 = 1321, AArch64_SHLLv16i8 = 1322, AArch64_SHLLv2i32 = 1323, AArch64_SHLLv4i16 = 1324, AArch64_SHLLv4i32 = 1325, AArch64_SHLLv8i16 = 1326, AArch64_SHLLv8i8 = 1327, AArch64_SHLd = 1328, AArch64_SHLv16i8_shift = 1329, AArch64_SHLv2i32_shift = 1330, AArch64_SHLv2i64_shift = 1331, AArch64_SHLv4i16_shift = 1332, AArch64_SHLv4i32_shift = 1333, AArch64_SHLv8i16_shift = 1334, AArch64_SHLv8i8_shift = 1335, AArch64_SHRNv16i8_shift = 1336, AArch64_SHRNv2i32_shift = 1337, AArch64_SHRNv4i16_shift = 1338, AArch64_SHRNv4i32_shift = 1339, AArch64_SHRNv8i16_shift = 1340, AArch64_SHRNv8i8_shift = 1341, AArch64_SHSUBv16i8 = 1342, AArch64_SHSUBv2i32 = 1343, AArch64_SHSUBv4i16 = 1344, AArch64_SHSUBv4i32 = 1345, AArch64_SHSUBv8i16 = 1346, AArch64_SHSUBv8i8 = 1347, AArch64_SLId = 1348, AArch64_SLIv16i8_shift = 1349, AArch64_SLIv2i32_shift = 1350, AArch64_SLIv2i64_shift = 1351, AArch64_SLIv4i16_shift = 1352, AArch64_SLIv4i32_shift = 1353, AArch64_SLIv8i16_shift = 1354, AArch64_SLIv8i8_shift = 1355, AArch64_SMADDLrrr = 1356, AArch64_SMAXPv16i8 = 1357, AArch64_SMAXPv2i32 = 1358, AArch64_SMAXPv4i16 = 1359, AArch64_SMAXPv4i32 = 1360, AArch64_SMAXPv8i16 = 1361, AArch64_SMAXPv8i8 = 1362, AArch64_SMAXVv16i8v = 1363, AArch64_SMAXVv4i16v = 1364, AArch64_SMAXVv4i32v = 1365, AArch64_SMAXVv8i16v = 1366, AArch64_SMAXVv8i8v = 1367, AArch64_SMAXv16i8 = 1368, AArch64_SMAXv2i32 = 1369, AArch64_SMAXv4i16 = 1370, AArch64_SMAXv4i32 = 1371, AArch64_SMAXv8i16 = 1372, AArch64_SMAXv8i8 = 1373, AArch64_SMC = 1374, AArch64_SMINPv16i8 = 1375, AArch64_SMINPv2i32 = 1376, AArch64_SMINPv4i16 = 1377, AArch64_SMINPv4i32 = 1378, AArch64_SMINPv8i16 = 1379, AArch64_SMINPv8i8 = 1380, AArch64_SMINVv16i8v = 1381, AArch64_SMINVv4i16v = 1382, AArch64_SMINVv4i32v = 1383, AArch64_SMINVv8i16v = 1384, AArch64_SMINVv8i8v = 1385, AArch64_SMINv16i8 = 1386, AArch64_SMINv2i32 = 1387, AArch64_SMINv4i16 = 1388, AArch64_SMINv4i32 = 1389, AArch64_SMINv8i16 = 1390, AArch64_SMINv8i8 = 1391, AArch64_SMLALv16i8_v8i16 = 1392, AArch64_SMLALv2i32_indexed = 1393, AArch64_SMLALv2i32_v2i64 = 1394, AArch64_SMLALv4i16_indexed = 1395, AArch64_SMLALv4i16_v4i32 = 1396, AArch64_SMLALv4i32_indexed = 1397, AArch64_SMLALv4i32_v2i64 = 1398, AArch64_SMLALv8i16_indexed = 1399, AArch64_SMLALv8i16_v4i32 = 1400, AArch64_SMLALv8i8_v8i16 = 1401, AArch64_SMLSLv16i8_v8i16 = 1402, AArch64_SMLSLv2i32_indexed = 1403, AArch64_SMLSLv2i32_v2i64 = 1404, AArch64_SMLSLv4i16_indexed = 1405, AArch64_SMLSLv4i16_v4i32 = 1406, AArch64_SMLSLv4i32_indexed = 1407, AArch64_SMLSLv4i32_v2i64 = 1408, AArch64_SMLSLv8i16_indexed = 1409, AArch64_SMLSLv8i16_v4i32 = 1410, AArch64_SMLSLv8i8_v8i16 = 1411, AArch64_SMOVvi16to32 = 1412, AArch64_SMOVvi16to64 = 1413, AArch64_SMOVvi32to64 = 1414, AArch64_SMOVvi8to32 = 1415, AArch64_SMOVvi8to64 = 1416, AArch64_SMSUBLrrr = 1417, AArch64_SMULHrr = 1418, AArch64_SMULLv16i8_v8i16 = 1419, AArch64_SMULLv2i32_indexed = 1420, AArch64_SMULLv2i32_v2i64 = 1421, AArch64_SMULLv4i16_indexed = 1422, AArch64_SMULLv4i16_v4i32 = 1423, AArch64_SMULLv4i32_indexed = 1424, AArch64_SMULLv4i32_v2i64 = 1425, AArch64_SMULLv8i16_indexed = 1426, AArch64_SMULLv8i16_v4i32 = 1427, AArch64_SMULLv8i8_v8i16 = 1428, AArch64_SQABSv16i8 = 1429, AArch64_SQABSv1i16 = 1430, AArch64_SQABSv1i32 = 1431, AArch64_SQABSv1i64 = 1432, AArch64_SQABSv1i8 = 1433, AArch64_SQABSv2i32 = 1434, AArch64_SQABSv2i64 = 1435, AArch64_SQABSv4i16 = 1436, AArch64_SQABSv4i32 = 1437, AArch64_SQABSv8i16 = 1438, AArch64_SQABSv8i8 = 1439, AArch64_SQADDv16i8 = 1440, AArch64_SQADDv1i16 = 1441, AArch64_SQADDv1i32 = 1442, AArch64_SQADDv1i64 = 1443, AArch64_SQADDv1i8 = 1444, AArch64_SQADDv2i32 = 1445, AArch64_SQADDv2i64 = 1446, AArch64_SQADDv4i16 = 1447, AArch64_SQADDv4i32 = 1448, AArch64_SQADDv8i16 = 1449, AArch64_SQADDv8i8 = 1450, AArch64_SQDMLALi16 = 1451, AArch64_SQDMLALi32 = 1452, AArch64_SQDMLALv1i32_indexed = 1453, AArch64_SQDMLALv1i64_indexed = 1454, AArch64_SQDMLALv2i32_indexed = 1455, AArch64_SQDMLALv2i32_v2i64 = 1456, AArch64_SQDMLALv4i16_indexed = 1457, AArch64_SQDMLALv4i16_v4i32 = 1458, AArch64_SQDMLALv4i32_indexed = 1459, AArch64_SQDMLALv4i32_v2i64 = 1460, AArch64_SQDMLALv8i16_indexed = 1461, AArch64_SQDMLALv8i16_v4i32 = 1462, AArch64_SQDMLSLi16 = 1463, AArch64_SQDMLSLi32 = 1464, AArch64_SQDMLSLv1i32_indexed = 1465, AArch64_SQDMLSLv1i64_indexed = 1466, AArch64_SQDMLSLv2i32_indexed = 1467, AArch64_SQDMLSLv2i32_v2i64 = 1468, AArch64_SQDMLSLv4i16_indexed = 1469, AArch64_SQDMLSLv4i16_v4i32 = 1470, AArch64_SQDMLSLv4i32_indexed = 1471, AArch64_SQDMLSLv4i32_v2i64 = 1472, AArch64_SQDMLSLv8i16_indexed = 1473, AArch64_SQDMLSLv8i16_v4i32 = 1474, AArch64_SQDMULHv1i16 = 1475, AArch64_SQDMULHv1i16_indexed = 1476, AArch64_SQDMULHv1i32 = 1477, AArch64_SQDMULHv1i32_indexed = 1478, AArch64_SQDMULHv2i32 = 1479, AArch64_SQDMULHv2i32_indexed = 1480, AArch64_SQDMULHv4i16 = 1481, AArch64_SQDMULHv4i16_indexed = 1482, AArch64_SQDMULHv4i32 = 1483, AArch64_SQDMULHv4i32_indexed = 1484, AArch64_SQDMULHv8i16 = 1485, AArch64_SQDMULHv8i16_indexed = 1486, AArch64_SQDMULLi16 = 1487, AArch64_SQDMULLi32 = 1488, AArch64_SQDMULLv1i32_indexed = 1489, AArch64_SQDMULLv1i64_indexed = 1490, AArch64_SQDMULLv2i32_indexed = 1491, AArch64_SQDMULLv2i32_v2i64 = 1492, AArch64_SQDMULLv4i16_indexed = 1493, AArch64_SQDMULLv4i16_v4i32 = 1494, AArch64_SQDMULLv4i32_indexed = 1495, AArch64_SQDMULLv4i32_v2i64 = 1496, AArch64_SQDMULLv8i16_indexed = 1497, AArch64_SQDMULLv8i16_v4i32 = 1498, AArch64_SQNEGv16i8 = 1499, AArch64_SQNEGv1i16 = 1500, AArch64_SQNEGv1i32 = 1501, AArch64_SQNEGv1i64 = 1502, AArch64_SQNEGv1i8 = 1503, AArch64_SQNEGv2i32 = 1504, AArch64_SQNEGv2i64 = 1505, AArch64_SQNEGv4i16 = 1506, AArch64_SQNEGv4i32 = 1507, AArch64_SQNEGv8i16 = 1508, AArch64_SQNEGv8i8 = 1509, AArch64_SQRDMULHv1i16 = 1510, AArch64_SQRDMULHv1i16_indexed = 1511, AArch64_SQRDMULHv1i32 = 1512, AArch64_SQRDMULHv1i32_indexed = 1513, AArch64_SQRDMULHv2i32 = 1514, AArch64_SQRDMULHv2i32_indexed = 1515, AArch64_SQRDMULHv4i16 = 1516, AArch64_SQRDMULHv4i16_indexed = 1517, AArch64_SQRDMULHv4i32 = 1518, AArch64_SQRDMULHv4i32_indexed = 1519, AArch64_SQRDMULHv8i16 = 1520, AArch64_SQRDMULHv8i16_indexed = 1521, AArch64_SQRSHLv16i8 = 1522, AArch64_SQRSHLv1i16 = 1523, AArch64_SQRSHLv1i32 = 1524, AArch64_SQRSHLv1i64 = 1525, AArch64_SQRSHLv1i8 = 1526, AArch64_SQRSHLv2i32 = 1527, AArch64_SQRSHLv2i64 = 1528, AArch64_SQRSHLv4i16 = 1529, AArch64_SQRSHLv4i32 = 1530, AArch64_SQRSHLv8i16 = 1531, AArch64_SQRSHLv8i8 = 1532, AArch64_SQRSHRNb = 1533, AArch64_SQRSHRNh = 1534, AArch64_SQRSHRNs = 1535, AArch64_SQRSHRNv16i8_shift = 1536, AArch64_SQRSHRNv2i32_shift = 1537, AArch64_SQRSHRNv4i16_shift = 1538, AArch64_SQRSHRNv4i32_shift = 1539, AArch64_SQRSHRNv8i16_shift = 1540, AArch64_SQRSHRNv8i8_shift = 1541, AArch64_SQRSHRUNb = 1542, AArch64_SQRSHRUNh = 1543, AArch64_SQRSHRUNs = 1544, AArch64_SQRSHRUNv16i8_shift = 1545, AArch64_SQRSHRUNv2i32_shift = 1546, AArch64_SQRSHRUNv4i16_shift = 1547, AArch64_SQRSHRUNv4i32_shift = 1548, AArch64_SQRSHRUNv8i16_shift = 1549, AArch64_SQRSHRUNv8i8_shift = 1550, AArch64_SQSHLUb = 1551, AArch64_SQSHLUd = 1552, AArch64_SQSHLUh = 1553, AArch64_SQSHLUs = 1554, AArch64_SQSHLUv16i8_shift = 1555, AArch64_SQSHLUv2i32_shift = 1556, AArch64_SQSHLUv2i64_shift = 1557, AArch64_SQSHLUv4i16_shift = 1558, AArch64_SQSHLUv4i32_shift = 1559, AArch64_SQSHLUv8i16_shift = 1560, AArch64_SQSHLUv8i8_shift = 1561, AArch64_SQSHLb = 1562, AArch64_SQSHLd = 1563, AArch64_SQSHLh = 1564, AArch64_SQSHLs = 1565, AArch64_SQSHLv16i8 = 1566, AArch64_SQSHLv16i8_shift = 1567, AArch64_SQSHLv1i16 = 1568, AArch64_SQSHLv1i32 = 1569, AArch64_SQSHLv1i64 = 1570, AArch64_SQSHLv1i8 = 1571, AArch64_SQSHLv2i32 = 1572, AArch64_SQSHLv2i32_shift = 1573, AArch64_SQSHLv2i64 = 1574, AArch64_SQSHLv2i64_shift = 1575, AArch64_SQSHLv4i16 = 1576, AArch64_SQSHLv4i16_shift = 1577, AArch64_SQSHLv4i32 = 1578, AArch64_SQSHLv4i32_shift = 1579, AArch64_SQSHLv8i16 = 1580, AArch64_SQSHLv8i16_shift = 1581, AArch64_SQSHLv8i8 = 1582, AArch64_SQSHLv8i8_shift = 1583, AArch64_SQSHRNb = 1584, AArch64_SQSHRNh = 1585, AArch64_SQSHRNs = 1586, AArch64_SQSHRNv16i8_shift = 1587, AArch64_SQSHRNv2i32_shift = 1588, AArch64_SQSHRNv4i16_shift = 1589, AArch64_SQSHRNv4i32_shift = 1590, AArch64_SQSHRNv8i16_shift = 1591, AArch64_SQSHRNv8i8_shift = 1592, AArch64_SQSHRUNb = 1593, AArch64_SQSHRUNh = 1594, AArch64_SQSHRUNs = 1595, AArch64_SQSHRUNv16i8_shift = 1596, AArch64_SQSHRUNv2i32_shift = 1597, AArch64_SQSHRUNv4i16_shift = 1598, AArch64_SQSHRUNv4i32_shift = 1599, AArch64_SQSHRUNv8i16_shift = 1600, AArch64_SQSHRUNv8i8_shift = 1601, AArch64_SQSUBv16i8 = 1602, AArch64_SQSUBv1i16 = 1603, AArch64_SQSUBv1i32 = 1604, AArch64_SQSUBv1i64 = 1605, AArch64_SQSUBv1i8 = 1606, AArch64_SQSUBv2i32 = 1607, AArch64_SQSUBv2i64 = 1608, AArch64_SQSUBv4i16 = 1609, AArch64_SQSUBv4i32 = 1610, AArch64_SQSUBv8i16 = 1611, AArch64_SQSUBv8i8 = 1612, AArch64_SQXTNv16i8 = 1613, AArch64_SQXTNv1i16 = 1614, AArch64_SQXTNv1i32 = 1615, AArch64_SQXTNv1i8 = 1616, AArch64_SQXTNv2i32 = 1617, AArch64_SQXTNv4i16 = 1618, AArch64_SQXTNv4i32 = 1619, AArch64_SQXTNv8i16 = 1620, AArch64_SQXTNv8i8 = 1621, AArch64_SQXTUNv16i8 = 1622, AArch64_SQXTUNv1i16 = 1623, AArch64_SQXTUNv1i32 = 1624, AArch64_SQXTUNv1i8 = 1625, AArch64_SQXTUNv2i32 = 1626, AArch64_SQXTUNv4i16 = 1627, AArch64_SQXTUNv4i32 = 1628, AArch64_SQXTUNv8i16 = 1629, AArch64_SQXTUNv8i8 = 1630, AArch64_SRHADDv16i8 = 1631, AArch64_SRHADDv2i32 = 1632, AArch64_SRHADDv4i16 = 1633, AArch64_SRHADDv4i32 = 1634, AArch64_SRHADDv8i16 = 1635, AArch64_SRHADDv8i8 = 1636, AArch64_SRId = 1637, AArch64_SRIv16i8_shift = 1638, AArch64_SRIv2i32_shift = 1639, AArch64_SRIv2i64_shift = 1640, AArch64_SRIv4i16_shift = 1641, AArch64_SRIv4i32_shift = 1642, AArch64_SRIv8i16_shift = 1643, AArch64_SRIv8i8_shift = 1644, AArch64_SRSHLv16i8 = 1645, AArch64_SRSHLv1i64 = 1646, AArch64_SRSHLv2i32 = 1647, AArch64_SRSHLv2i64 = 1648, AArch64_SRSHLv4i16 = 1649, AArch64_SRSHLv4i32 = 1650, AArch64_SRSHLv8i16 = 1651, AArch64_SRSHLv8i8 = 1652, AArch64_SRSHRd = 1653, AArch64_SRSHRv16i8_shift = 1654, AArch64_SRSHRv2i32_shift = 1655, AArch64_SRSHRv2i64_shift = 1656, AArch64_SRSHRv4i16_shift = 1657, AArch64_SRSHRv4i32_shift = 1658, AArch64_SRSHRv8i16_shift = 1659, AArch64_SRSHRv8i8_shift = 1660, AArch64_SRSRAd = 1661, AArch64_SRSRAv16i8_shift = 1662, AArch64_SRSRAv2i32_shift = 1663, AArch64_SRSRAv2i64_shift = 1664, AArch64_SRSRAv4i16_shift = 1665, AArch64_SRSRAv4i32_shift = 1666, AArch64_SRSRAv8i16_shift = 1667, AArch64_SRSRAv8i8_shift = 1668, AArch64_SSHLLv16i8_shift = 1669, AArch64_SSHLLv2i32_shift = 1670, AArch64_SSHLLv4i16_shift = 1671, AArch64_SSHLLv4i32_shift = 1672, AArch64_SSHLLv8i16_shift = 1673, AArch64_SSHLLv8i8_shift = 1674, AArch64_SSHLv16i8 = 1675, AArch64_SSHLv1i64 = 1676, AArch64_SSHLv2i32 = 1677, AArch64_SSHLv2i64 = 1678, AArch64_SSHLv4i16 = 1679, AArch64_SSHLv4i32 = 1680, AArch64_SSHLv8i16 = 1681, AArch64_SSHLv8i8 = 1682, AArch64_SSHRd = 1683, AArch64_SSHRv16i8_shift = 1684, AArch64_SSHRv2i32_shift = 1685, AArch64_SSHRv2i64_shift = 1686, AArch64_SSHRv4i16_shift = 1687, AArch64_SSHRv4i32_shift = 1688, AArch64_SSHRv8i16_shift = 1689, AArch64_SSHRv8i8_shift = 1690, AArch64_SSRAd = 1691, AArch64_SSRAv16i8_shift = 1692, AArch64_SSRAv2i32_shift = 1693, AArch64_SSRAv2i64_shift = 1694, AArch64_SSRAv4i16_shift = 1695, AArch64_SSRAv4i32_shift = 1696, AArch64_SSRAv8i16_shift = 1697, AArch64_SSRAv8i8_shift = 1698, AArch64_SSUBLv16i8_v8i16 = 1699, AArch64_SSUBLv2i32_v2i64 = 1700, AArch64_SSUBLv4i16_v4i32 = 1701, AArch64_SSUBLv4i32_v2i64 = 1702, AArch64_SSUBLv8i16_v4i32 = 1703, AArch64_SSUBLv8i8_v8i16 = 1704, AArch64_SSUBWv16i8_v8i16 = 1705, AArch64_SSUBWv2i32_v2i64 = 1706, AArch64_SSUBWv4i16_v4i32 = 1707, AArch64_SSUBWv4i32_v2i64 = 1708, AArch64_SSUBWv8i16_v4i32 = 1709, AArch64_SSUBWv8i8_v8i16 = 1710, AArch64_ST1Fourv16b = 1711, AArch64_ST1Fourv16b_POST = 1712, AArch64_ST1Fourv1d = 1713, AArch64_ST1Fourv1d_POST = 1714, AArch64_ST1Fourv2d = 1715, AArch64_ST1Fourv2d_POST = 1716, AArch64_ST1Fourv2s = 1717, AArch64_ST1Fourv2s_POST = 1718, AArch64_ST1Fourv4h = 1719, AArch64_ST1Fourv4h_POST = 1720, AArch64_ST1Fourv4s = 1721, AArch64_ST1Fourv4s_POST = 1722, AArch64_ST1Fourv8b = 1723, AArch64_ST1Fourv8b_POST = 1724, AArch64_ST1Fourv8h = 1725, AArch64_ST1Fourv8h_POST = 1726, AArch64_ST1Onev16b = 1727, AArch64_ST1Onev16b_POST = 1728, AArch64_ST1Onev1d = 1729, AArch64_ST1Onev1d_POST = 1730, AArch64_ST1Onev2d = 1731, AArch64_ST1Onev2d_POST = 1732, AArch64_ST1Onev2s = 1733, AArch64_ST1Onev2s_POST = 1734, AArch64_ST1Onev4h = 1735, AArch64_ST1Onev4h_POST = 1736, AArch64_ST1Onev4s = 1737, AArch64_ST1Onev4s_POST = 1738, AArch64_ST1Onev8b = 1739, AArch64_ST1Onev8b_POST = 1740, AArch64_ST1Onev8h = 1741, AArch64_ST1Onev8h_POST = 1742, AArch64_ST1Threev16b = 1743, AArch64_ST1Threev16b_POST = 1744, AArch64_ST1Threev1d = 1745, AArch64_ST1Threev1d_POST = 1746, AArch64_ST1Threev2d = 1747, AArch64_ST1Threev2d_POST = 1748, AArch64_ST1Threev2s = 1749, AArch64_ST1Threev2s_POST = 1750, AArch64_ST1Threev4h = 1751, AArch64_ST1Threev4h_POST = 1752, AArch64_ST1Threev4s = 1753, AArch64_ST1Threev4s_POST = 1754, AArch64_ST1Threev8b = 1755, AArch64_ST1Threev8b_POST = 1756, AArch64_ST1Threev8h = 1757, AArch64_ST1Threev8h_POST = 1758, AArch64_ST1Twov16b = 1759, AArch64_ST1Twov16b_POST = 1760, AArch64_ST1Twov1d = 1761, AArch64_ST1Twov1d_POST = 1762, AArch64_ST1Twov2d = 1763, AArch64_ST1Twov2d_POST = 1764, AArch64_ST1Twov2s = 1765, AArch64_ST1Twov2s_POST = 1766, AArch64_ST1Twov4h = 1767, AArch64_ST1Twov4h_POST = 1768, AArch64_ST1Twov4s = 1769, AArch64_ST1Twov4s_POST = 1770, AArch64_ST1Twov8b = 1771, AArch64_ST1Twov8b_POST = 1772, AArch64_ST1Twov8h = 1773, AArch64_ST1Twov8h_POST = 1774, AArch64_ST1i16 = 1775, AArch64_ST1i16_POST = 1776, AArch64_ST1i32 = 1777, AArch64_ST1i32_POST = 1778, AArch64_ST1i64 = 1779, AArch64_ST1i64_POST = 1780, AArch64_ST1i8 = 1781, AArch64_ST1i8_POST = 1782, AArch64_ST2Twov16b = 1783, AArch64_ST2Twov16b_POST = 1784, AArch64_ST2Twov2d = 1785, AArch64_ST2Twov2d_POST = 1786, AArch64_ST2Twov2s = 1787, AArch64_ST2Twov2s_POST = 1788, AArch64_ST2Twov4h = 1789, AArch64_ST2Twov4h_POST = 1790, AArch64_ST2Twov4s = 1791, AArch64_ST2Twov4s_POST = 1792, AArch64_ST2Twov8b = 1793, AArch64_ST2Twov8b_POST = 1794, AArch64_ST2Twov8h = 1795, AArch64_ST2Twov8h_POST = 1796, AArch64_ST2i16 = 1797, AArch64_ST2i16_POST = 1798, AArch64_ST2i32 = 1799, AArch64_ST2i32_POST = 1800, AArch64_ST2i64 = 1801, AArch64_ST2i64_POST = 1802, AArch64_ST2i8 = 1803, AArch64_ST2i8_POST = 1804, AArch64_ST3Threev16b = 1805, AArch64_ST3Threev16b_POST = 1806, AArch64_ST3Threev2d = 1807, AArch64_ST3Threev2d_POST = 1808, AArch64_ST3Threev2s = 1809, AArch64_ST3Threev2s_POST = 1810, AArch64_ST3Threev4h = 1811, AArch64_ST3Threev4h_POST = 1812, AArch64_ST3Threev4s = 1813, AArch64_ST3Threev4s_POST = 1814, AArch64_ST3Threev8b = 1815, AArch64_ST3Threev8b_POST = 1816, AArch64_ST3Threev8h = 1817, AArch64_ST3Threev8h_POST = 1818, AArch64_ST3i16 = 1819, AArch64_ST3i16_POST = 1820, AArch64_ST3i32 = 1821, AArch64_ST3i32_POST = 1822, AArch64_ST3i64 = 1823, AArch64_ST3i64_POST = 1824, AArch64_ST3i8 = 1825, AArch64_ST3i8_POST = 1826, AArch64_ST4Fourv16b = 1827, AArch64_ST4Fourv16b_POST = 1828, AArch64_ST4Fourv2d = 1829, AArch64_ST4Fourv2d_POST = 1830, AArch64_ST4Fourv2s = 1831, AArch64_ST4Fourv2s_POST = 1832, AArch64_ST4Fourv4h = 1833, AArch64_ST4Fourv4h_POST = 1834, AArch64_ST4Fourv4s = 1835, AArch64_ST4Fourv4s_POST = 1836, AArch64_ST4Fourv8b = 1837, AArch64_ST4Fourv8b_POST = 1838, AArch64_ST4Fourv8h = 1839, AArch64_ST4Fourv8h_POST = 1840, AArch64_ST4i16 = 1841, AArch64_ST4i16_POST = 1842, AArch64_ST4i32 = 1843, AArch64_ST4i32_POST = 1844, AArch64_ST4i64 = 1845, AArch64_ST4i64_POST = 1846, AArch64_ST4i8 = 1847, AArch64_ST4i8_POST = 1848, AArch64_STLRB = 1849, AArch64_STLRH = 1850, AArch64_STLRW = 1851, AArch64_STLRX = 1852, AArch64_STLXPW = 1853, AArch64_STLXPX = 1854, AArch64_STLXRB = 1855, AArch64_STLXRH = 1856, AArch64_STLXRW = 1857, AArch64_STLXRX = 1858, AArch64_STNPDi = 1859, AArch64_STNPQi = 1860, AArch64_STNPSi = 1861, AArch64_STNPWi = 1862, AArch64_STNPXi = 1863, AArch64_STPDi = 1864, AArch64_STPDpost = 1865, AArch64_STPDpre = 1866, AArch64_STPQi = 1867, AArch64_STPQpost = 1868, AArch64_STPQpre = 1869, AArch64_STPSi = 1870, AArch64_STPSpost = 1871, AArch64_STPSpre = 1872, AArch64_STPWi = 1873, AArch64_STPWpost = 1874, AArch64_STPWpre = 1875, AArch64_STPXi = 1876, AArch64_STPXpost = 1877, AArch64_STPXpre = 1878, AArch64_STRBBpost = 1879, AArch64_STRBBpre = 1880, AArch64_STRBBroW = 1881, AArch64_STRBBroX = 1882, AArch64_STRBBui = 1883, AArch64_STRBpost = 1884, AArch64_STRBpre = 1885, AArch64_STRBroW = 1886, AArch64_STRBroX = 1887, AArch64_STRBui = 1888, AArch64_STRDpost = 1889, AArch64_STRDpre = 1890, AArch64_STRDroW = 1891, AArch64_STRDroX = 1892, AArch64_STRDui = 1893, AArch64_STRHHpost = 1894, AArch64_STRHHpre = 1895, AArch64_STRHHroW = 1896, AArch64_STRHHroX = 1897, AArch64_STRHHui = 1898, AArch64_STRHpost = 1899, AArch64_STRHpre = 1900, AArch64_STRHroW = 1901, AArch64_STRHroX = 1902, AArch64_STRHui = 1903, AArch64_STRQpost = 1904, AArch64_STRQpre = 1905, AArch64_STRQroW = 1906, AArch64_STRQroX = 1907, AArch64_STRQui = 1908, AArch64_STRSpost = 1909, AArch64_STRSpre = 1910, AArch64_STRSroW = 1911, AArch64_STRSroX = 1912, AArch64_STRSui = 1913, AArch64_STRWpost = 1914, AArch64_STRWpre = 1915, AArch64_STRWroW = 1916, AArch64_STRWroX = 1917, AArch64_STRWui = 1918, AArch64_STRXpost = 1919, AArch64_STRXpre = 1920, AArch64_STRXroW = 1921, AArch64_STRXroX = 1922, AArch64_STRXui = 1923, AArch64_STTRBi = 1924, AArch64_STTRHi = 1925, AArch64_STTRWi = 1926, AArch64_STTRXi = 1927, AArch64_STURBBi = 1928, AArch64_STURBi = 1929, AArch64_STURDi = 1930, AArch64_STURHHi = 1931, AArch64_STURHi = 1932, AArch64_STURQi = 1933, AArch64_STURSi = 1934, AArch64_STURWi = 1935, AArch64_STURXi = 1936, AArch64_STXPW = 1937, AArch64_STXPX = 1938, AArch64_STXRB = 1939, AArch64_STXRH = 1940, AArch64_STXRW = 1941, AArch64_STXRX = 1942, AArch64_SUBHNv2i64_v2i32 = 1943, AArch64_SUBHNv2i64_v4i32 = 1944, AArch64_SUBHNv4i32_v4i16 = 1945, AArch64_SUBHNv4i32_v8i16 = 1946, AArch64_SUBHNv8i16_v16i8 = 1947, AArch64_SUBHNv8i16_v8i8 = 1948, AArch64_SUBSWri = 1949, AArch64_SUBSWrr = 1950, AArch64_SUBSWrs = 1951, AArch64_SUBSWrx = 1952, AArch64_SUBSXri = 1953, AArch64_SUBSXrr = 1954, AArch64_SUBSXrs = 1955, AArch64_SUBSXrx = 1956, AArch64_SUBSXrx64 = 1957, AArch64_SUBWri = 1958, AArch64_SUBWrr = 1959, AArch64_SUBWrs = 1960, AArch64_SUBWrx = 1961, AArch64_SUBXri = 1962, AArch64_SUBXrr = 1963, AArch64_SUBXrs = 1964, AArch64_SUBXrx = 1965, AArch64_SUBXrx64 = 1966, AArch64_SUBv16i8 = 1967, AArch64_SUBv1i64 = 1968, AArch64_SUBv2i32 = 1969, AArch64_SUBv2i64 = 1970, AArch64_SUBv4i16 = 1971, AArch64_SUBv4i32 = 1972, AArch64_SUBv8i16 = 1973, AArch64_SUBv8i8 = 1974, AArch64_SUQADDv16i8 = 1975, AArch64_SUQADDv1i16 = 1976, AArch64_SUQADDv1i32 = 1977, AArch64_SUQADDv1i64 = 1978, AArch64_SUQADDv1i8 = 1979, AArch64_SUQADDv2i32 = 1980, AArch64_SUQADDv2i64 = 1981, AArch64_SUQADDv4i16 = 1982, AArch64_SUQADDv4i32 = 1983, AArch64_SUQADDv8i16 = 1984, AArch64_SUQADDv8i8 = 1985, AArch64_SVC = 1986, AArch64_SYSLxt = 1987, AArch64_SYSxt = 1988, AArch64_TBLv16i8Four = 1989, AArch64_TBLv16i8One = 1990, AArch64_TBLv16i8Three = 1991, AArch64_TBLv16i8Two = 1992, AArch64_TBLv8i8Four = 1993, AArch64_TBLv8i8One = 1994, AArch64_TBLv8i8Three = 1995, AArch64_TBLv8i8Two = 1996, AArch64_TBNZW = 1997, AArch64_TBNZX = 1998, AArch64_TBXv16i8Four = 1999, AArch64_TBXv16i8One = 2000, AArch64_TBXv16i8Three = 2001, AArch64_TBXv16i8Two = 2002, AArch64_TBXv8i8Four = 2003, AArch64_TBXv8i8One = 2004, AArch64_TBXv8i8Three = 2005, AArch64_TBXv8i8Two = 2006, AArch64_TBZW = 2007, AArch64_TBZX = 2008, AArch64_TCRETURNdi = 2009, AArch64_TCRETURNri = 2010, AArch64_TLSDESCCALL = 2011, AArch64_TLSDESC_BLR = 2012, AArch64_TRN1v16i8 = 2013, AArch64_TRN1v2i32 = 2014, AArch64_TRN1v2i64 = 2015, AArch64_TRN1v4i16 = 2016, AArch64_TRN1v4i32 = 2017, AArch64_TRN1v8i16 = 2018, AArch64_TRN1v8i8 = 2019, AArch64_TRN2v16i8 = 2020, AArch64_TRN2v2i32 = 2021, AArch64_TRN2v2i64 = 2022, AArch64_TRN2v4i16 = 2023, AArch64_TRN2v4i32 = 2024, AArch64_TRN2v8i16 = 2025, AArch64_TRN2v8i8 = 2026, AArch64_UABALv16i8_v8i16 = 2027, AArch64_UABALv2i32_v2i64 = 2028, AArch64_UABALv4i16_v4i32 = 2029, AArch64_UABALv4i32_v2i64 = 2030, AArch64_UABALv8i16_v4i32 = 2031, AArch64_UABALv8i8_v8i16 = 2032, AArch64_UABAv16i8 = 2033, AArch64_UABAv2i32 = 2034, AArch64_UABAv4i16 = 2035, AArch64_UABAv4i32 = 2036, AArch64_UABAv8i16 = 2037, AArch64_UABAv8i8 = 2038, AArch64_UABDLv16i8_v8i16 = 2039, AArch64_UABDLv2i32_v2i64 = 2040, AArch64_UABDLv4i16_v4i32 = 2041, AArch64_UABDLv4i32_v2i64 = 2042, AArch64_UABDLv8i16_v4i32 = 2043, AArch64_UABDLv8i8_v8i16 = 2044, AArch64_UABDv16i8 = 2045, AArch64_UABDv2i32 = 2046, AArch64_UABDv4i16 = 2047, AArch64_UABDv4i32 = 2048, AArch64_UABDv8i16 = 2049, AArch64_UABDv8i8 = 2050, AArch64_UADALPv16i8_v8i16 = 2051, AArch64_UADALPv2i32_v1i64 = 2052, AArch64_UADALPv4i16_v2i32 = 2053, AArch64_UADALPv4i32_v2i64 = 2054, AArch64_UADALPv8i16_v4i32 = 2055, AArch64_UADALPv8i8_v4i16 = 2056, AArch64_UADDLPv16i8_v8i16 = 2057, AArch64_UADDLPv2i32_v1i64 = 2058, AArch64_UADDLPv4i16_v2i32 = 2059, AArch64_UADDLPv4i32_v2i64 = 2060, AArch64_UADDLPv8i16_v4i32 = 2061, AArch64_UADDLPv8i8_v4i16 = 2062, AArch64_UADDLVv16i8v = 2063, AArch64_UADDLVv4i16v = 2064, AArch64_UADDLVv4i32v = 2065, AArch64_UADDLVv8i16v = 2066, AArch64_UADDLVv8i8v = 2067, AArch64_UADDLv16i8_v8i16 = 2068, AArch64_UADDLv2i32_v2i64 = 2069, AArch64_UADDLv4i16_v4i32 = 2070, AArch64_UADDLv4i32_v2i64 = 2071, AArch64_UADDLv8i16_v4i32 = 2072, AArch64_UADDLv8i8_v8i16 = 2073, AArch64_UADDWv16i8_v8i16 = 2074, AArch64_UADDWv2i32_v2i64 = 2075, AArch64_UADDWv4i16_v4i32 = 2076, AArch64_UADDWv4i32_v2i64 = 2077, AArch64_UADDWv8i16_v4i32 = 2078, AArch64_UADDWv8i8_v8i16 = 2079, AArch64_UBFMWri = 2080, AArch64_UBFMXri = 2081, AArch64_UCVTFSWDri = 2082, AArch64_UCVTFSWSri = 2083, AArch64_UCVTFSXDri = 2084, AArch64_UCVTFSXSri = 2085, AArch64_UCVTFUWDri = 2086, AArch64_UCVTFUWSri = 2087, AArch64_UCVTFUXDri = 2088, AArch64_UCVTFUXSri = 2089, AArch64_UCVTFd = 2090, AArch64_UCVTFs = 2091, AArch64_UCVTFv1i32 = 2092, AArch64_UCVTFv1i64 = 2093, AArch64_UCVTFv2f32 = 2094, AArch64_UCVTFv2f64 = 2095, AArch64_UCVTFv2i32_shift = 2096, AArch64_UCVTFv2i64_shift = 2097, AArch64_UCVTFv4f32 = 2098, AArch64_UCVTFv4i32_shift = 2099, AArch64_UDIVWr = 2100, AArch64_UDIVXr = 2101, AArch64_UDIV_IntWr = 2102, AArch64_UDIV_IntXr = 2103, AArch64_UHADDv16i8 = 2104, AArch64_UHADDv2i32 = 2105, AArch64_UHADDv4i16 = 2106, AArch64_UHADDv4i32 = 2107, AArch64_UHADDv8i16 = 2108, AArch64_UHADDv8i8 = 2109, AArch64_UHSUBv16i8 = 2110, AArch64_UHSUBv2i32 = 2111, AArch64_UHSUBv4i16 = 2112, AArch64_UHSUBv4i32 = 2113, AArch64_UHSUBv8i16 = 2114, AArch64_UHSUBv8i8 = 2115, AArch64_UMADDLrrr = 2116, AArch64_UMAXPv16i8 = 2117, AArch64_UMAXPv2i32 = 2118, AArch64_UMAXPv4i16 = 2119, AArch64_UMAXPv4i32 = 2120, AArch64_UMAXPv8i16 = 2121, AArch64_UMAXPv8i8 = 2122, AArch64_UMAXVv16i8v = 2123, AArch64_UMAXVv4i16v = 2124, AArch64_UMAXVv4i32v = 2125, AArch64_UMAXVv8i16v = 2126, AArch64_UMAXVv8i8v = 2127, AArch64_UMAXv16i8 = 2128, AArch64_UMAXv2i32 = 2129, AArch64_UMAXv4i16 = 2130, AArch64_UMAXv4i32 = 2131, AArch64_UMAXv8i16 = 2132, AArch64_UMAXv8i8 = 2133, AArch64_UMINPv16i8 = 2134, AArch64_UMINPv2i32 = 2135, AArch64_UMINPv4i16 = 2136, AArch64_UMINPv4i32 = 2137, AArch64_UMINPv8i16 = 2138, AArch64_UMINPv8i8 = 2139, AArch64_UMINVv16i8v = 2140, AArch64_UMINVv4i16v = 2141, AArch64_UMINVv4i32v = 2142, AArch64_UMINVv8i16v = 2143, AArch64_UMINVv8i8v = 2144, AArch64_UMINv16i8 = 2145, AArch64_UMINv2i32 = 2146, AArch64_UMINv4i16 = 2147, AArch64_UMINv4i32 = 2148, AArch64_UMINv8i16 = 2149, AArch64_UMINv8i8 = 2150, AArch64_UMLALv16i8_v8i16 = 2151, AArch64_UMLALv2i32_indexed = 2152, AArch64_UMLALv2i32_v2i64 = 2153, AArch64_UMLALv4i16_indexed = 2154, AArch64_UMLALv4i16_v4i32 = 2155, AArch64_UMLALv4i32_indexed = 2156, AArch64_UMLALv4i32_v2i64 = 2157, AArch64_UMLALv8i16_indexed = 2158, AArch64_UMLALv8i16_v4i32 = 2159, AArch64_UMLALv8i8_v8i16 = 2160, AArch64_UMLSLv16i8_v8i16 = 2161, AArch64_UMLSLv2i32_indexed = 2162, AArch64_UMLSLv2i32_v2i64 = 2163, AArch64_UMLSLv4i16_indexed = 2164, AArch64_UMLSLv4i16_v4i32 = 2165, AArch64_UMLSLv4i32_indexed = 2166, AArch64_UMLSLv4i32_v2i64 = 2167, AArch64_UMLSLv8i16_indexed = 2168, AArch64_UMLSLv8i16_v4i32 = 2169, AArch64_UMLSLv8i8_v8i16 = 2170, AArch64_UMOVvi16 = 2171, AArch64_UMOVvi32 = 2172, AArch64_UMOVvi64 = 2173, AArch64_UMOVvi8 = 2174, AArch64_UMSUBLrrr = 2175, AArch64_UMULHrr = 2176, AArch64_UMULLv16i8_v8i16 = 2177, AArch64_UMULLv2i32_indexed = 2178, AArch64_UMULLv2i32_v2i64 = 2179, AArch64_UMULLv4i16_indexed = 2180, AArch64_UMULLv4i16_v4i32 = 2181, AArch64_UMULLv4i32_indexed = 2182, AArch64_UMULLv4i32_v2i64 = 2183, AArch64_UMULLv8i16_indexed = 2184, AArch64_UMULLv8i16_v4i32 = 2185, AArch64_UMULLv8i8_v8i16 = 2186, AArch64_UQADDv16i8 = 2187, AArch64_UQADDv1i16 = 2188, AArch64_UQADDv1i32 = 2189, AArch64_UQADDv1i64 = 2190, AArch64_UQADDv1i8 = 2191, AArch64_UQADDv2i32 = 2192, AArch64_UQADDv2i64 = 2193, AArch64_UQADDv4i16 = 2194, AArch64_UQADDv4i32 = 2195, AArch64_UQADDv8i16 = 2196, AArch64_UQADDv8i8 = 2197, AArch64_UQRSHLv16i8 = 2198, AArch64_UQRSHLv1i16 = 2199, AArch64_UQRSHLv1i32 = 2200, AArch64_UQRSHLv1i64 = 2201, AArch64_UQRSHLv1i8 = 2202, AArch64_UQRSHLv2i32 = 2203, AArch64_UQRSHLv2i64 = 2204, AArch64_UQRSHLv4i16 = 2205, AArch64_UQRSHLv4i32 = 2206, AArch64_UQRSHLv8i16 = 2207, AArch64_UQRSHLv8i8 = 2208, AArch64_UQRSHRNb = 2209, AArch64_UQRSHRNh = 2210, AArch64_UQRSHRNs = 2211, AArch64_UQRSHRNv16i8_shift = 2212, AArch64_UQRSHRNv2i32_shift = 2213, AArch64_UQRSHRNv4i16_shift = 2214, AArch64_UQRSHRNv4i32_shift = 2215, AArch64_UQRSHRNv8i16_shift = 2216, AArch64_UQRSHRNv8i8_shift = 2217, AArch64_UQSHLb = 2218, AArch64_UQSHLd = 2219, AArch64_UQSHLh = 2220, AArch64_UQSHLs = 2221, AArch64_UQSHLv16i8 = 2222, AArch64_UQSHLv16i8_shift = 2223, AArch64_UQSHLv1i16 = 2224, AArch64_UQSHLv1i32 = 2225, AArch64_UQSHLv1i64 = 2226, AArch64_UQSHLv1i8 = 2227, AArch64_UQSHLv2i32 = 2228, AArch64_UQSHLv2i32_shift = 2229, AArch64_UQSHLv2i64 = 2230, AArch64_UQSHLv2i64_shift = 2231, AArch64_UQSHLv4i16 = 2232, AArch64_UQSHLv4i16_shift = 2233, AArch64_UQSHLv4i32 = 2234, AArch64_UQSHLv4i32_shift = 2235, AArch64_UQSHLv8i16 = 2236, AArch64_UQSHLv8i16_shift = 2237, AArch64_UQSHLv8i8 = 2238, AArch64_UQSHLv8i8_shift = 2239, AArch64_UQSHRNb = 2240, AArch64_UQSHRNh = 2241, AArch64_UQSHRNs = 2242, AArch64_UQSHRNv16i8_shift = 2243, AArch64_UQSHRNv2i32_shift = 2244, AArch64_UQSHRNv4i16_shift = 2245, AArch64_UQSHRNv4i32_shift = 2246, AArch64_UQSHRNv8i16_shift = 2247, AArch64_UQSHRNv8i8_shift = 2248, AArch64_UQSUBv16i8 = 2249, AArch64_UQSUBv1i16 = 2250, AArch64_UQSUBv1i32 = 2251, AArch64_UQSUBv1i64 = 2252, AArch64_UQSUBv1i8 = 2253, AArch64_UQSUBv2i32 = 2254, AArch64_UQSUBv2i64 = 2255, AArch64_UQSUBv4i16 = 2256, AArch64_UQSUBv4i32 = 2257, AArch64_UQSUBv8i16 = 2258, AArch64_UQSUBv8i8 = 2259, AArch64_UQXTNv16i8 = 2260, AArch64_UQXTNv1i16 = 2261, AArch64_UQXTNv1i32 = 2262, AArch64_UQXTNv1i8 = 2263, AArch64_UQXTNv2i32 = 2264, AArch64_UQXTNv4i16 = 2265, AArch64_UQXTNv4i32 = 2266, AArch64_UQXTNv8i16 = 2267, AArch64_UQXTNv8i8 = 2268, AArch64_URECPEv2i32 = 2269, AArch64_URECPEv4i32 = 2270, AArch64_URHADDv16i8 = 2271, AArch64_URHADDv2i32 = 2272, AArch64_URHADDv4i16 = 2273, AArch64_URHADDv4i32 = 2274, AArch64_URHADDv8i16 = 2275, AArch64_URHADDv8i8 = 2276, AArch64_URSHLv16i8 = 2277, AArch64_URSHLv1i64 = 2278, AArch64_URSHLv2i32 = 2279, AArch64_URSHLv2i64 = 2280, AArch64_URSHLv4i16 = 2281, AArch64_URSHLv4i32 = 2282, AArch64_URSHLv8i16 = 2283, AArch64_URSHLv8i8 = 2284, AArch64_URSHRd = 2285, AArch64_URSHRv16i8_shift = 2286, AArch64_URSHRv2i32_shift = 2287, AArch64_URSHRv2i64_shift = 2288, AArch64_URSHRv4i16_shift = 2289, AArch64_URSHRv4i32_shift = 2290, AArch64_URSHRv8i16_shift = 2291, AArch64_URSHRv8i8_shift = 2292, AArch64_URSQRTEv2i32 = 2293, AArch64_URSQRTEv4i32 = 2294, AArch64_URSRAd = 2295, AArch64_URSRAv16i8_shift = 2296, AArch64_URSRAv2i32_shift = 2297, AArch64_URSRAv2i64_shift = 2298, AArch64_URSRAv4i16_shift = 2299, AArch64_URSRAv4i32_shift = 2300, AArch64_URSRAv8i16_shift = 2301, AArch64_URSRAv8i8_shift = 2302, AArch64_USHLLv16i8_shift = 2303, AArch64_USHLLv2i32_shift = 2304, AArch64_USHLLv4i16_shift = 2305, AArch64_USHLLv4i32_shift = 2306, AArch64_USHLLv8i16_shift = 2307, AArch64_USHLLv8i8_shift = 2308, AArch64_USHLv16i8 = 2309, AArch64_USHLv1i64 = 2310, AArch64_USHLv2i32 = 2311, AArch64_USHLv2i64 = 2312, AArch64_USHLv4i16 = 2313, AArch64_USHLv4i32 = 2314, AArch64_USHLv8i16 = 2315, AArch64_USHLv8i8 = 2316, AArch64_USHRd = 2317, AArch64_USHRv16i8_shift = 2318, AArch64_USHRv2i32_shift = 2319, AArch64_USHRv2i64_shift = 2320, AArch64_USHRv4i16_shift = 2321, AArch64_USHRv4i32_shift = 2322, AArch64_USHRv8i16_shift = 2323, AArch64_USHRv8i8_shift = 2324, AArch64_USQADDv16i8 = 2325, AArch64_USQADDv1i16 = 2326, AArch64_USQADDv1i32 = 2327, AArch64_USQADDv1i64 = 2328, AArch64_USQADDv1i8 = 2329, AArch64_USQADDv2i32 = 2330, AArch64_USQADDv2i64 = 2331, AArch64_USQADDv4i16 = 2332, AArch64_USQADDv4i32 = 2333, AArch64_USQADDv8i16 = 2334, AArch64_USQADDv8i8 = 2335, AArch64_USRAd = 2336, AArch64_USRAv16i8_shift = 2337, AArch64_USRAv2i32_shift = 2338, AArch64_USRAv2i64_shift = 2339, AArch64_USRAv4i16_shift = 2340, AArch64_USRAv4i32_shift = 2341, AArch64_USRAv8i16_shift = 2342, AArch64_USRAv8i8_shift = 2343, AArch64_USUBLv16i8_v8i16 = 2344, AArch64_USUBLv2i32_v2i64 = 2345, AArch64_USUBLv4i16_v4i32 = 2346, AArch64_USUBLv4i32_v2i64 = 2347, AArch64_USUBLv8i16_v4i32 = 2348, AArch64_USUBLv8i8_v8i16 = 2349, AArch64_USUBWv16i8_v8i16 = 2350, AArch64_USUBWv2i32_v2i64 = 2351, AArch64_USUBWv4i16_v4i32 = 2352, AArch64_USUBWv4i32_v2i64 = 2353, AArch64_USUBWv8i16_v4i32 = 2354, AArch64_USUBWv8i8_v8i16 = 2355, AArch64_UZP1v16i8 = 2356, AArch64_UZP1v2i32 = 2357, AArch64_UZP1v2i64 = 2358, AArch64_UZP1v4i16 = 2359, AArch64_UZP1v4i32 = 2360, AArch64_UZP1v8i16 = 2361, AArch64_UZP1v8i8 = 2362, AArch64_UZP2v16i8 = 2363, AArch64_UZP2v2i32 = 2364, AArch64_UZP2v2i64 = 2365, AArch64_UZP2v4i16 = 2366, AArch64_UZP2v4i32 = 2367, AArch64_UZP2v8i16 = 2368, AArch64_UZP2v8i8 = 2369, AArch64_XTNv16i8 = 2370, AArch64_XTNv2i32 = 2371, AArch64_XTNv4i16 = 2372, AArch64_XTNv4i32 = 2373, AArch64_XTNv8i16 = 2374, AArch64_XTNv8i8 = 2375, AArch64_ZIP1v16i8 = 2376, AArch64_ZIP1v2i32 = 2377, AArch64_ZIP1v2i64 = 2378, AArch64_ZIP1v4i16 = 2379, AArch64_ZIP1v4i32 = 2380, AArch64_ZIP1v8i16 = 2381, AArch64_ZIP1v8i8 = 2382, AArch64_ZIP2v16i8 = 2383, AArch64_ZIP2v2i32 = 2384, AArch64_ZIP2v2i64 = 2385, AArch64_ZIP2v4i16 = 2386, AArch64_ZIP2v4i32 = 2387, AArch64_ZIP2v8i16 = 2388, AArch64_ZIP2v8i8 = 2389, AArch64_INSTRUCTION_LIST_END = 2390 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/AArch64/AArch64GenRegisterInfo.inc010066400017500001750000002221171363402546700231420ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { AArch64_NoRegister, AArch64_FP = 1, AArch64_LR = 2, AArch64_NZCV = 3, AArch64_SP = 4, AArch64_WSP = 5, AArch64_WZR = 6, AArch64_XZR = 7, AArch64_B0 = 8, AArch64_B1 = 9, AArch64_B2 = 10, AArch64_B3 = 11, AArch64_B4 = 12, AArch64_B5 = 13, AArch64_B6 = 14, AArch64_B7 = 15, AArch64_B8 = 16, AArch64_B9 = 17, AArch64_B10 = 18, AArch64_B11 = 19, AArch64_B12 = 20, AArch64_B13 = 21, AArch64_B14 = 22, AArch64_B15 = 23, AArch64_B16 = 24, AArch64_B17 = 25, AArch64_B18 = 26, AArch64_B19 = 27, AArch64_B20 = 28, AArch64_B21 = 29, AArch64_B22 = 30, AArch64_B23 = 31, AArch64_B24 = 32, AArch64_B25 = 33, AArch64_B26 = 34, AArch64_B27 = 35, AArch64_B28 = 36, AArch64_B29 = 37, AArch64_B30 = 38, AArch64_B31 = 39, AArch64_D0 = 40, AArch64_D1 = 41, AArch64_D2 = 42, AArch64_D3 = 43, AArch64_D4 = 44, AArch64_D5 = 45, AArch64_D6 = 46, AArch64_D7 = 47, AArch64_D8 = 48, AArch64_D9 = 49, AArch64_D10 = 50, AArch64_D11 = 51, AArch64_D12 = 52, AArch64_D13 = 53, AArch64_D14 = 54, AArch64_D15 = 55, AArch64_D16 = 56, AArch64_D17 = 57, AArch64_D18 = 58, AArch64_D19 = 59, AArch64_D20 = 60, AArch64_D21 = 61, AArch64_D22 = 62, AArch64_D23 = 63, AArch64_D24 = 64, AArch64_D25 = 65, AArch64_D26 = 66, AArch64_D27 = 67, AArch64_D28 = 68, AArch64_D29 = 69, AArch64_D30 = 70, AArch64_D31 = 71, AArch64_H0 = 72, AArch64_H1 = 73, AArch64_H2 = 74, AArch64_H3 = 75, AArch64_H4 = 76, AArch64_H5 = 77, AArch64_H6 = 78, AArch64_H7 = 79, AArch64_H8 = 80, AArch64_H9 = 81, AArch64_H10 = 82, AArch64_H11 = 83, AArch64_H12 = 84, AArch64_H13 = 85, AArch64_H14 = 86, AArch64_H15 = 87, AArch64_H16 = 88, AArch64_H17 = 89, AArch64_H18 = 90, AArch64_H19 = 91, AArch64_H20 = 92, AArch64_H21 = 93, AArch64_H22 = 94, AArch64_H23 = 95, AArch64_H24 = 96, AArch64_H25 = 97, AArch64_H26 = 98, AArch64_H27 = 99, AArch64_H28 = 100, AArch64_H29 = 101, AArch64_H30 = 102, AArch64_H31 = 103, AArch64_Q0 = 104, AArch64_Q1 = 105, AArch64_Q2 = 106, AArch64_Q3 = 107, AArch64_Q4 = 108, AArch64_Q5 = 109, AArch64_Q6 = 110, AArch64_Q7 = 111, AArch64_Q8 = 112, AArch64_Q9 = 113, AArch64_Q10 = 114, AArch64_Q11 = 115, AArch64_Q12 = 116, AArch64_Q13 = 117, AArch64_Q14 = 118, AArch64_Q15 = 119, AArch64_Q16 = 120, AArch64_Q17 = 121, AArch64_Q18 = 122, AArch64_Q19 = 123, AArch64_Q20 = 124, AArch64_Q21 = 125, AArch64_Q22 = 126, AArch64_Q23 = 127, AArch64_Q24 = 128, AArch64_Q25 = 129, AArch64_Q26 = 130, AArch64_Q27 = 131, AArch64_Q28 = 132, AArch64_Q29 = 133, AArch64_Q30 = 134, AArch64_Q31 = 135, AArch64_S0 = 136, AArch64_S1 = 137, AArch64_S2 = 138, AArch64_S3 = 139, AArch64_S4 = 140, AArch64_S5 = 141, AArch64_S6 = 142, AArch64_S7 = 143, AArch64_S8 = 144, AArch64_S9 = 145, AArch64_S10 = 146, AArch64_S11 = 147, AArch64_S12 = 148, AArch64_S13 = 149, AArch64_S14 = 150, AArch64_S15 = 151, AArch64_S16 = 152, AArch64_S17 = 153, AArch64_S18 = 154, AArch64_S19 = 155, AArch64_S20 = 156, AArch64_S21 = 157, AArch64_S22 = 158, AArch64_S23 = 159, AArch64_S24 = 160, AArch64_S25 = 161, AArch64_S26 = 162, AArch64_S27 = 163, AArch64_S28 = 164, AArch64_S29 = 165, AArch64_S30 = 166, AArch64_S31 = 167, AArch64_W0 = 168, AArch64_W1 = 169, AArch64_W2 = 170, AArch64_W3 = 171, AArch64_W4 = 172, AArch64_W5 = 173, AArch64_W6 = 174, AArch64_W7 = 175, AArch64_W8 = 176, AArch64_W9 = 177, AArch64_W10 = 178, AArch64_W11 = 179, AArch64_W12 = 180, AArch64_W13 = 181, AArch64_W14 = 182, AArch64_W15 = 183, AArch64_W16 = 184, AArch64_W17 = 185, AArch64_W18 = 186, AArch64_W19 = 187, AArch64_W20 = 188, AArch64_W21 = 189, AArch64_W22 = 190, AArch64_W23 = 191, AArch64_W24 = 192, AArch64_W25 = 193, AArch64_W26 = 194, AArch64_W27 = 195, AArch64_W28 = 196, AArch64_W29 = 197, AArch64_W30 = 198, AArch64_X0 = 199, AArch64_X1 = 200, AArch64_X2 = 201, AArch64_X3 = 202, AArch64_X4 = 203, AArch64_X5 = 204, AArch64_X6 = 205, AArch64_X7 = 206, AArch64_X8 = 207, AArch64_X9 = 208, AArch64_X10 = 209, AArch64_X11 = 210, AArch64_X12 = 211, AArch64_X13 = 212, AArch64_X14 = 213, AArch64_X15 = 214, AArch64_X16 = 215, AArch64_X17 = 216, AArch64_X18 = 217, AArch64_X19 = 218, AArch64_X20 = 219, AArch64_X21 = 220, AArch64_X22 = 221, AArch64_X23 = 222, AArch64_X24 = 223, AArch64_X25 = 224, AArch64_X26 = 225, AArch64_X27 = 226, AArch64_X28 = 227, AArch64_D0_D1 = 228, AArch64_D1_D2 = 229, AArch64_D2_D3 = 230, AArch64_D3_D4 = 231, AArch64_D4_D5 = 232, AArch64_D5_D6 = 233, AArch64_D6_D7 = 234, AArch64_D7_D8 = 235, AArch64_D8_D9 = 236, AArch64_D9_D10 = 237, AArch64_D10_D11 = 238, AArch64_D11_D12 = 239, AArch64_D12_D13 = 240, AArch64_D13_D14 = 241, AArch64_D14_D15 = 242, AArch64_D15_D16 = 243, AArch64_D16_D17 = 244, AArch64_D17_D18 = 245, AArch64_D18_D19 = 246, AArch64_D19_D20 = 247, AArch64_D20_D21 = 248, AArch64_D21_D22 = 249, AArch64_D22_D23 = 250, AArch64_D23_D24 = 251, AArch64_D24_D25 = 252, AArch64_D25_D26 = 253, AArch64_D26_D27 = 254, AArch64_D27_D28 = 255, AArch64_D28_D29 = 256, AArch64_D29_D30 = 257, AArch64_D30_D31 = 258, AArch64_D31_D0 = 259, AArch64_D0_D1_D2_D3 = 260, AArch64_D1_D2_D3_D4 = 261, AArch64_D2_D3_D4_D5 = 262, AArch64_D3_D4_D5_D6 = 263, AArch64_D4_D5_D6_D7 = 264, AArch64_D5_D6_D7_D8 = 265, AArch64_D6_D7_D8_D9 = 266, AArch64_D7_D8_D9_D10 = 267, AArch64_D8_D9_D10_D11 = 268, AArch64_D9_D10_D11_D12 = 269, AArch64_D10_D11_D12_D13 = 270, AArch64_D11_D12_D13_D14 = 271, AArch64_D12_D13_D14_D15 = 272, AArch64_D13_D14_D15_D16 = 273, AArch64_D14_D15_D16_D17 = 274, AArch64_D15_D16_D17_D18 = 275, AArch64_D16_D17_D18_D19 = 276, AArch64_D17_D18_D19_D20 = 277, AArch64_D18_D19_D20_D21 = 278, AArch64_D19_D20_D21_D22 = 279, AArch64_D20_D21_D22_D23 = 280, AArch64_D21_D22_D23_D24 = 281, AArch64_D22_D23_D24_D25 = 282, AArch64_D23_D24_D25_D26 = 283, AArch64_D24_D25_D26_D27 = 284, AArch64_D25_D26_D27_D28 = 285, AArch64_D26_D27_D28_D29 = 286, AArch64_D27_D28_D29_D30 = 287, AArch64_D28_D29_D30_D31 = 288, AArch64_D29_D30_D31_D0 = 289, AArch64_D30_D31_D0_D1 = 290, AArch64_D31_D0_D1_D2 = 291, AArch64_D0_D1_D2 = 292, AArch64_D1_D2_D3 = 293, AArch64_D2_D3_D4 = 294, AArch64_D3_D4_D5 = 295, AArch64_D4_D5_D6 = 296, AArch64_D5_D6_D7 = 297, AArch64_D6_D7_D8 = 298, AArch64_D7_D8_D9 = 299, AArch64_D8_D9_D10 = 300, AArch64_D9_D10_D11 = 301, AArch64_D10_D11_D12 = 302, AArch64_D11_D12_D13 = 303, AArch64_D12_D13_D14 = 304, AArch64_D13_D14_D15 = 305, AArch64_D14_D15_D16 = 306, AArch64_D15_D16_D17 = 307, AArch64_D16_D17_D18 = 308, AArch64_D17_D18_D19 = 309, AArch64_D18_D19_D20 = 310, AArch64_D19_D20_D21 = 311, AArch64_D20_D21_D22 = 312, AArch64_D21_D22_D23 = 313, AArch64_D22_D23_D24 = 314, AArch64_D23_D24_D25 = 315, AArch64_D24_D25_D26 = 316, AArch64_D25_D26_D27 = 317, AArch64_D26_D27_D28 = 318, AArch64_D27_D28_D29 = 319, AArch64_D28_D29_D30 = 320, AArch64_D29_D30_D31 = 321, AArch64_D30_D31_D0 = 322, AArch64_D31_D0_D1 = 323, AArch64_Q0_Q1 = 324, AArch64_Q1_Q2 = 325, AArch64_Q2_Q3 = 326, AArch64_Q3_Q4 = 327, AArch64_Q4_Q5 = 328, AArch64_Q5_Q6 = 329, AArch64_Q6_Q7 = 330, AArch64_Q7_Q8 = 331, AArch64_Q8_Q9 = 332, AArch64_Q9_Q10 = 333, AArch64_Q10_Q11 = 334, AArch64_Q11_Q12 = 335, AArch64_Q12_Q13 = 336, AArch64_Q13_Q14 = 337, AArch64_Q14_Q15 = 338, AArch64_Q15_Q16 = 339, AArch64_Q16_Q17 = 340, AArch64_Q17_Q18 = 341, AArch64_Q18_Q19 = 342, AArch64_Q19_Q20 = 343, AArch64_Q20_Q21 = 344, AArch64_Q21_Q22 = 345, AArch64_Q22_Q23 = 346, AArch64_Q23_Q24 = 347, AArch64_Q24_Q25 = 348, AArch64_Q25_Q26 = 349, AArch64_Q26_Q27 = 350, AArch64_Q27_Q28 = 351, AArch64_Q28_Q29 = 352, AArch64_Q29_Q30 = 353, AArch64_Q30_Q31 = 354, AArch64_Q31_Q0 = 355, AArch64_Q0_Q1_Q2_Q3 = 356, AArch64_Q1_Q2_Q3_Q4 = 357, AArch64_Q2_Q3_Q4_Q5 = 358, AArch64_Q3_Q4_Q5_Q6 = 359, AArch64_Q4_Q5_Q6_Q7 = 360, AArch64_Q5_Q6_Q7_Q8 = 361, AArch64_Q6_Q7_Q8_Q9 = 362, AArch64_Q7_Q8_Q9_Q10 = 363, AArch64_Q8_Q9_Q10_Q11 = 364, AArch64_Q9_Q10_Q11_Q12 = 365, AArch64_Q10_Q11_Q12_Q13 = 366, AArch64_Q11_Q12_Q13_Q14 = 367, AArch64_Q12_Q13_Q14_Q15 = 368, AArch64_Q13_Q14_Q15_Q16 = 369, AArch64_Q14_Q15_Q16_Q17 = 370, AArch64_Q15_Q16_Q17_Q18 = 371, AArch64_Q16_Q17_Q18_Q19 = 372, AArch64_Q17_Q18_Q19_Q20 = 373, AArch64_Q18_Q19_Q20_Q21 = 374, AArch64_Q19_Q20_Q21_Q22 = 375, AArch64_Q20_Q21_Q22_Q23 = 376, AArch64_Q21_Q22_Q23_Q24 = 377, AArch64_Q22_Q23_Q24_Q25 = 378, AArch64_Q23_Q24_Q25_Q26 = 379, AArch64_Q24_Q25_Q26_Q27 = 380, AArch64_Q25_Q26_Q27_Q28 = 381, AArch64_Q26_Q27_Q28_Q29 = 382, AArch64_Q27_Q28_Q29_Q30 = 383, AArch64_Q28_Q29_Q30_Q31 = 384, AArch64_Q29_Q30_Q31_Q0 = 385, AArch64_Q30_Q31_Q0_Q1 = 386, AArch64_Q31_Q0_Q1_Q2 = 387, AArch64_Q0_Q1_Q2 = 388, AArch64_Q1_Q2_Q3 = 389, AArch64_Q2_Q3_Q4 = 390, AArch64_Q3_Q4_Q5 = 391, AArch64_Q4_Q5_Q6 = 392, AArch64_Q5_Q6_Q7 = 393, AArch64_Q6_Q7_Q8 = 394, AArch64_Q7_Q8_Q9 = 395, AArch64_Q8_Q9_Q10 = 396, AArch64_Q9_Q10_Q11 = 397, AArch64_Q10_Q11_Q12 = 398, AArch64_Q11_Q12_Q13 = 399, AArch64_Q12_Q13_Q14 = 400, AArch64_Q13_Q14_Q15 = 401, AArch64_Q14_Q15_Q16 = 402, AArch64_Q15_Q16_Q17 = 403, AArch64_Q16_Q17_Q18 = 404, AArch64_Q17_Q18_Q19 = 405, AArch64_Q18_Q19_Q20 = 406, AArch64_Q19_Q20_Q21 = 407, AArch64_Q20_Q21_Q22 = 408, AArch64_Q21_Q22_Q23 = 409, AArch64_Q22_Q23_Q24 = 410, AArch64_Q23_Q24_Q25 = 411, AArch64_Q24_Q25_Q26 = 412, AArch64_Q25_Q26_Q27 = 413, AArch64_Q26_Q27_Q28 = 414, AArch64_Q27_Q28_Q29 = 415, AArch64_Q28_Q29_Q30 = 416, AArch64_Q29_Q30_Q31 = 417, AArch64_Q30_Q31_Q0 = 418, AArch64_Q31_Q0_Q1 = 419, AArch64_NUM_TARGET_REGS // 420 }; // Register classes enum { AArch64_FPR8RegClassID = 0, AArch64_FPR16RegClassID = 1, AArch64_GPR32allRegClassID = 2, AArch64_FPR32RegClassID = 3, AArch64_GPR32RegClassID = 4, AArch64_GPR32spRegClassID = 5, AArch64_GPR32commonRegClassID = 6, AArch64_CCRRegClassID = 7, AArch64_GPR32sponlyRegClassID = 8, AArch64_GPR64allRegClassID = 9, AArch64_FPR64RegClassID = 10, AArch64_GPR64RegClassID = 11, AArch64_GPR64spRegClassID = 12, AArch64_GPR64commonRegClassID = 13, AArch64_tcGPR64RegClassID = 14, AArch64_GPR64sponlyRegClassID = 15, AArch64_DDRegClassID = 16, AArch64_FPR128RegClassID = 17, AArch64_FPR128_loRegClassID = 18, AArch64_DDDRegClassID = 19, AArch64_DDDDRegClassID = 20, AArch64_QQRegClassID = 21, AArch64_QQ_with_qsub0_in_FPR128_loRegClassID = 22, AArch64_QQ_with_qsub1_in_FPR128_loRegClassID = 23, AArch64_QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID = 24, AArch64_QQQRegClassID = 25, AArch64_QQQ_with_qsub0_in_FPR128_loRegClassID = 26, AArch64_QQQ_with_qsub1_in_FPR128_loRegClassID = 27, AArch64_QQQ_with_qsub2_in_FPR128_loRegClassID = 28, AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID = 29, AArch64_QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 30, AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 31, AArch64_QQQQRegClassID = 32, AArch64_QQQQ_with_qsub0_in_FPR128_loRegClassID = 33, AArch64_QQQQ_with_qsub1_in_FPR128_loRegClassID = 34, AArch64_QQQQ_with_qsub2_in_FPR128_loRegClassID = 35, AArch64_QQQQ_with_qsub3_in_FPR128_loRegClassID = 36, AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID = 37, AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 38, AArch64_QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 39, AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 40, AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 41, AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 42, }; // Register alternate name indices enum { AArch64_NoRegAltName, // 0 AArch64_vlist1, // 1 AArch64_vreg, // 2 AArch64_NUM_TARGET_REG_ALT_NAMES = 3 }; // Subregister indices enum { AArch64_NoSubRegister, AArch64_bsub, // 1 AArch64_dsub, // 2 AArch64_dsub0, // 3 AArch64_dsub1, // 4 AArch64_dsub2, // 5 AArch64_dsub3, // 6 AArch64_hsub, // 7 AArch64_qhisub, // 8 AArch64_qsub, // 9 AArch64_qsub0, // 10 AArch64_qsub1, // 11 AArch64_qsub2, // 12 AArch64_qsub3, // 13 AArch64_ssub, // 14 AArch64_sub_32, // 15 AArch64_dsub1_then_bsub, // 16 AArch64_dsub1_then_hsub, // 17 AArch64_dsub1_then_ssub, // 18 AArch64_dsub3_then_bsub, // 19 AArch64_dsub3_then_hsub, // 20 AArch64_dsub3_then_ssub, // 21 AArch64_dsub2_then_bsub, // 22 AArch64_dsub2_then_hsub, // 23 AArch64_dsub2_then_ssub, // 24 AArch64_qsub1_then_bsub, // 25 AArch64_qsub1_then_dsub, // 26 AArch64_qsub1_then_hsub, // 27 AArch64_qsub1_then_ssub, // 28 AArch64_qsub3_then_bsub, // 29 AArch64_qsub3_then_dsub, // 30 AArch64_qsub3_then_hsub, // 31 AArch64_qsub3_then_ssub, // 32 AArch64_qsub2_then_bsub, // 33 AArch64_qsub2_then_dsub, // 34 AArch64_qsub2_then_hsub, // 35 AArch64_qsub2_then_ssub, // 36 AArch64_dsub0_dsub1, // 37 AArch64_dsub0_dsub1_dsub2, // 38 AArch64_dsub1_dsub2, // 39 AArch64_dsub1_dsub2_dsub3, // 40 AArch64_dsub2_dsub3, // 41 AArch64_dsub_qsub1_then_dsub, // 42 AArch64_dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 43 AArch64_dsub_qsub1_then_dsub_qsub2_then_dsub, // 44 AArch64_qsub0_qsub1, // 45 AArch64_qsub0_qsub1_qsub2, // 46 AArch64_qsub1_qsub2, // 47 AArch64_qsub1_qsub2_qsub3, // 48 AArch64_qsub2_qsub3, // 49 AArch64_qsub1_then_dsub_qsub2_then_dsub, // 50 AArch64_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 51 AArch64_qsub2_then_dsub_qsub3_then_dsub, // 52 AArch64_NUM_TARGET_SUBREGS }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg AArch64RegDiffLists[] = { /* 0 */ 65185, 1, 1, 1, 0, /* 5 */ 65281, 1, 1, 1, 0, /* 10 */ 5, 29, 1, 1, 0, /* 15 */ 65153, 1, 1, 0, /* 19 */ 65249, 1, 1, 0, /* 23 */ 5, 1, 29, 1, 0, /* 28 */ 5, 30, 1, 0, /* 32 */ 65284, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 218, 1, 0, /* 47 */ 65284, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 250, 1, 0, /* 62 */ 65217, 1, 0, /* 65 */ 65313, 1, 0, /* 68 */ 64, 64, 65440, 64, 123, 1, 62, 65503, 34, 65503, 34, 65503, 1, 63, 1, 62, 65503, 34, 65503, 34, 65503, 1, 0, /* 91 */ 219, 1, 62, 65503, 34, 65503, 34, 65503, 1, 0, /* 101 */ 64, 64, 65440, 64, 124, 31, 33, 65504, 62, 65503, 34, 65503, 1, 33, 31, 33, 65504, 62, 65503, 34, 65503, 1, 0, /* 124 */ 220, 31, 33, 65504, 62, 65503, 34, 65503, 1, 0, /* 134 */ 63, 65503, 34, 65503, 1, 64, 63, 65503, 34, 65503, 1, 0, /* 146 */ 64, 64, 65440, 64, 123, 1, 63, 1, 65503, 1, 62, 65503, 1, 33, 1, 63, 1, 65503, 1, 62, 65503, 1, 0, /* 169 */ 219, 1, 63, 1, 65503, 1, 62, 65503, 1, 0, /* 179 */ 64, 65504, 63, 65503, 1, 33, 64, 65504, 63, 65503, 1, 0, /* 191 */ 65503, 1, 128, 65503, 1, 0, /* 197 */ 3, 0, /* 199 */ 4, 0, /* 201 */ 5, 1, 1, 29, 0, /* 206 */ 64, 64, 65440, 64, 123, 1, 62, 1, 65503, 34, 65503, 1, 29, 34, 1, 62, 1, 65503, 34, 65503, 1, 29, 0, /* 229 */ 219, 1, 62, 1, 65503, 34, 65503, 1, 29, 0, /* 239 */ 5, 1, 30, 0, /* 243 */ 63, 1, 65503, 1, 30, 34, 63, 1, 65503, 1, 30, 0, /* 255 */ 5, 31, 0, /* 258 */ 65504, 31, 97, 65504, 31, 0, /* 264 */ 96, 0, /* 266 */ 196, 0, /* 268 */ 65316, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 219, 0, /* 280 */ 65316, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 251, 0, /* 292 */ 65339, 0, /* 294 */ 65340, 0, /* 296 */ 65374, 0, /* 298 */ 65405, 0, /* 300 */ 65437, 0, /* 302 */ 65252, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 218, 64, 32, 1, 65440, 0, /* 323 */ 65252, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 250, 64, 32, 1, 65440, 0, /* 344 */ 65252, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 250, 64, 32, 65505, 65440, 0, /* 365 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65473, 64, 65441, 65471, 64, 65441, 0, /* 397 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 249, 64, 65473, 64, 65441, 0, /* 419 */ 65469, 0, /* 421 */ 65348, 96, 65472, 65472, 1, 96, 65472, 65472, 0, /* 430 */ 65348, 96, 65472, 65472, 33, 96, 65472, 65472, 0, /* 439 */ 65472, 96, 65472, 65472, 0, /* 444 */ 65284, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65441, 64, 65473, 65439, 64, 65473, 0, /* 476 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 217, 32, 32, 32, 64, 65473, 64, 65473, 65439, 64, 65473, 0, /* 508 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65473, 64, 65473, 65439, 64, 65473, 0, /* 540 */ 65316, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 249, 64, 65441, 64, 65473, 0, /* 562 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 217, 64, 65473, 64, 65473, 0, /* 584 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 249, 64, 65473, 64, 65473, 0, /* 606 */ 65501, 0, /* 608 */ 65284, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 250, 65505, 0, /* 623 */ 65533, 0, /* 625 */ 65535, 0, }; static const uint16_t AArch64SubRegIdxLists[] = { /* 0 */ 2, 14, 7, 1, 0, /* 5 */ 15, 0, /* 7 */ 3, 14, 7, 1, 4, 18, 17, 16, 0, /* 16 */ 3, 14, 7, 1, 4, 18, 17, 16, 5, 24, 23, 22, 37, 39, 0, /* 31 */ 3, 14, 7, 1, 4, 18, 17, 16, 5, 24, 23, 22, 6, 21, 20, 19, 37, 38, 39, 40, 41, 0, /* 53 */ 10, 2, 14, 7, 1, 11, 26, 28, 27, 25, 42, 0, /* 65 */ 10, 2, 14, 7, 1, 11, 26, 28, 27, 25, 12, 34, 36, 35, 33, 42, 44, 45, 47, 50, 0, /* 86 */ 10, 2, 14, 7, 1, 11, 26, 28, 27, 25, 12, 34, 36, 35, 33, 13, 30, 32, 31, 29, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 0, }; static MCRegisterDesc AArch64RegDesc[] = { // Descriptors { 3, 0, 0, 0, 0, 0 }, { 1518, 266, 4, 5, 10001, 26 }, { 1525, 266, 4, 5, 10001, 26 }, { 1536, 4, 4, 4, 10001, 0 }, { 1522, 3, 4, 5, 3152, 26 }, { 1521, 4, 625, 4, 3152, 0 }, { 1528, 4, 3, 4, 3184, 0 }, { 1532, 625, 4, 5, 3184, 26 }, { 146, 4, 101, 4, 9969, 0 }, { 335, 4, 146, 4, 9969, 0 }, { 480, 4, 206, 4, 9969, 0 }, { 625, 4, 68, 4, 9969, 0 }, { 768, 4, 68, 4, 9969, 0 }, { 911, 4, 68, 4, 9969, 0 }, { 1054, 4, 68, 4, 9969, 0 }, { 1197, 4, 68, 4, 9969, 0 }, { 1340, 4, 68, 4, 9969, 0 }, { 1479, 4, 68, 4, 9969, 0 }, { 0, 4, 68, 4, 9969, 0 }, { 191, 4, 68, 4, 9969, 0 }, { 378, 4, 68, 4, 9969, 0 }, { 521, 4, 68, 4, 9969, 0 }, { 664, 4, 68, 4, 9969, 0 }, { 807, 4, 68, 4, 9969, 0 }, { 950, 4, 68, 4, 9969, 0 }, { 1093, 4, 68, 4, 9969, 0 }, { 1236, 4, 68, 4, 9969, 0 }, { 1379, 4, 68, 4, 9969, 0 }, { 46, 4, 68, 4, 9969, 0 }, { 239, 4, 68, 4, 9969, 0 }, { 428, 4, 68, 4, 9969, 0 }, { 573, 4, 68, 4, 9969, 0 }, { 716, 4, 68, 4, 9969, 0 }, { 859, 4, 68, 4, 9969, 0 }, { 1002, 4, 68, 4, 9969, 0 }, { 1145, 4, 68, 4, 9969, 0 }, { 1288, 4, 68, 4, 9969, 0 }, { 1431, 4, 68, 4, 9969, 0 }, { 98, 4, 68, 4, 9969, 0 }, { 291, 4, 68, 4, 9969, 0 }, { 161, 426, 104, 1, 9697, 3 }, { 349, 426, 149, 1, 9697, 3 }, { 493, 426, 209, 1, 9697, 3 }, { 637, 426, 71, 1, 9697, 3 }, { 780, 426, 71, 1, 9697, 3 }, { 923, 426, 71, 1, 9697, 3 }, { 1066, 426, 71, 1, 9697, 3 }, { 1209, 426, 71, 1, 9697, 3 }, { 1352, 426, 71, 1, 9697, 3 }, { 1491, 426, 71, 1, 9697, 3 }, { 13, 426, 71, 1, 9697, 3 }, { 205, 426, 71, 1, 9697, 3 }, { 393, 426, 71, 1, 9697, 3 }, { 537, 426, 71, 1, 9697, 3 }, { 680, 426, 71, 1, 9697, 3 }, { 823, 426, 71, 1, 9697, 3 }, { 966, 426, 71, 1, 9697, 3 }, { 1109, 426, 71, 1, 9697, 3 }, { 1252, 426, 71, 1, 9697, 3 }, { 1395, 426, 71, 1, 9697, 3 }, { 62, 426, 71, 1, 9697, 3 }, { 255, 426, 71, 1, 9697, 3 }, { 444, 426, 71, 1, 9697, 3 }, { 589, 426, 71, 1, 9697, 3 }, { 732, 426, 71, 1, 9697, 3 }, { 875, 426, 71, 1, 9697, 3 }, { 1018, 426, 71, 1, 9697, 3 }, { 1161, 426, 71, 1, 9697, 3 }, { 1304, 426, 71, 1, 9697, 3 }, { 1447, 426, 71, 1, 9697, 3 }, { 114, 426, 71, 1, 9697, 3 }, { 307, 426, 71, 1, 9697, 3 }, { 164, 428, 102, 3, 6705, 3 }, { 352, 428, 147, 3, 6705, 3 }, { 496, 428, 207, 3, 6705, 3 }, { 640, 428, 69, 3, 6705, 3 }, { 783, 428, 69, 3, 6705, 3 }, { 926, 428, 69, 3, 6705, 3 }, { 1069, 428, 69, 3, 6705, 3 }, { 1212, 428, 69, 3, 6705, 3 }, { 1355, 428, 69, 3, 6705, 3 }, { 1494, 428, 69, 3, 6705, 3 }, { 17, 428, 69, 3, 6705, 3 }, { 209, 428, 69, 3, 6705, 3 }, { 397, 428, 69, 3, 6705, 3 }, { 541, 428, 69, 3, 6705, 3 }, { 684, 428, 69, 3, 6705, 3 }, { 827, 428, 69, 3, 6705, 3 }, { 970, 428, 69, 3, 6705, 3 }, { 1113, 428, 69, 3, 6705, 3 }, { 1256, 428, 69, 3, 6705, 3 }, { 1399, 428, 69, 3, 6705, 3 }, { 66, 428, 69, 3, 6705, 3 }, { 259, 428, 69, 3, 6705, 3 }, { 448, 428, 69, 3, 6705, 3 }, { 593, 428, 69, 3, 6705, 3 }, { 736, 428, 69, 3, 6705, 3 }, { 879, 428, 69, 3, 6705, 3 }, { 1022, 428, 69, 3, 6705, 3 }, { 1165, 428, 69, 3, 6705, 3 }, { 1308, 428, 69, 3, 6705, 3 }, { 1451, 428, 69, 3, 6705, 3 }, { 118, 428, 69, 3, 6705, 3 }, { 311, 428, 69, 3, 6705, 3 }, { 179, 439, 124, 0, 4801, 3 }, { 366, 439, 169, 0, 4801, 3 }, { 509, 439, 229, 0, 4801, 3 }, { 652, 439, 91, 0, 4801, 3 }, { 795, 439, 91, 0, 4801, 3 }, { 938, 439, 91, 0, 4801, 3 }, { 1081, 439, 91, 0, 4801, 3 }, { 1224, 439, 91, 0, 4801, 3 }, { 1367, 439, 91, 0, 4801, 3 }, { 1506, 439, 91, 0, 4801, 3 }, { 30, 439, 91, 0, 4801, 3 }, { 223, 439, 91, 0, 4801, 3 }, { 412, 439, 91, 0, 4801, 3 }, { 557, 439, 91, 0, 4801, 3 }, { 700, 439, 91, 0, 4801, 3 }, { 843, 439, 91, 0, 4801, 3 }, { 986, 439, 91, 0, 4801, 3 }, { 1129, 439, 91, 0, 4801, 3 }, { 1272, 439, 91, 0, 4801, 3 }, { 1415, 439, 91, 0, 4801, 3 }, { 82, 439, 91, 0, 4801, 3 }, { 275, 439, 91, 0, 4801, 3 }, { 464, 439, 91, 0, 4801, 3 }, { 609, 439, 91, 0, 4801, 3 }, { 752, 439, 91, 0, 4801, 3 }, { 895, 439, 91, 0, 4801, 3 }, { 1038, 439, 91, 0, 4801, 3 }, { 1181, 439, 91, 0, 4801, 3 }, { 1324, 439, 91, 0, 4801, 3 }, { 1467, 439, 91, 0, 4801, 3 }, { 134, 439, 91, 0, 4801, 3 }, { 327, 439, 91, 0, 4801, 3 }, { 182, 427, 103, 2, 4769, 3 }, { 369, 427, 148, 2, 4769, 3 }, { 512, 427, 208, 2, 4769, 3 }, { 655, 427, 70, 2, 4769, 3 }, { 798, 427, 70, 2, 4769, 3 }, { 941, 427, 70, 2, 4769, 3 }, { 1084, 427, 70, 2, 4769, 3 }, { 1227, 427, 70, 2, 4769, 3 }, { 1370, 427, 70, 2, 4769, 3 }, { 1509, 427, 70, 2, 4769, 3 }, { 34, 427, 70, 2, 4769, 3 }, { 227, 427, 70, 2, 4769, 3 }, { 416, 427, 70, 2, 4769, 3 }, { 561, 427, 70, 2, 4769, 3 }, { 704, 427, 70, 2, 4769, 3 }, { 847, 427, 70, 2, 4769, 3 }, { 990, 427, 70, 2, 4769, 3 }, { 1133, 427, 70, 2, 4769, 3 }, { 1276, 427, 70, 2, 4769, 3 }, { 1419, 427, 70, 2, 4769, 3 }, { 86, 427, 70, 2, 4769, 3 }, { 279, 427, 70, 2, 4769, 3 }, { 468, 427, 70, 2, 4769, 3 }, { 613, 427, 70, 2, 4769, 3 }, { 756, 427, 70, 2, 4769, 3 }, { 899, 427, 70, 2, 4769, 3 }, { 1042, 427, 70, 2, 4769, 3 }, { 1185, 427, 70, 2, 4769, 3 }, { 1328, 427, 70, 2, 4769, 3 }, { 1471, 427, 70, 2, 4769, 3 }, { 138, 427, 70, 2, 4769, 3 }, { 331, 427, 70, 2, 4769, 3 }, { 185, 4, 256, 4, 4769, 0 }, { 372, 4, 256, 4, 4769, 0 }, { 515, 4, 256, 4, 4769, 0 }, { 658, 4, 256, 4, 4769, 0 }, { 801, 4, 256, 4, 4769, 0 }, { 944, 4, 256, 4, 4769, 0 }, { 1087, 4, 256, 4, 4769, 0 }, { 1230, 4, 256, 4, 4769, 0 }, { 1373, 4, 256, 4, 4769, 0 }, { 1512, 4, 256, 4, 4769, 0 }, { 38, 4, 256, 4, 4769, 0 }, { 231, 4, 256, 4, 4769, 0 }, { 420, 4, 256, 4, 4769, 0 }, { 565, 4, 256, 4, 4769, 0 }, { 708, 4, 256, 4, 4769, 0 }, { 851, 4, 256, 4, 4769, 0 }, { 994, 4, 256, 4, 4769, 0 }, { 1137, 4, 256, 4, 4769, 0 }, { 1280, 4, 256, 4, 4769, 0 }, { 1423, 4, 256, 4, 4769, 0 }, { 90, 4, 256, 4, 4769, 0 }, { 283, 4, 256, 4, 4769, 0 }, { 472, 4, 256, 4, 4769, 0 }, { 617, 4, 256, 4, 4769, 0 }, { 760, 4, 256, 4, 4769, 0 }, { 903, 4, 256, 4, 4769, 0 }, { 1046, 4, 256, 4, 4769, 0 }, { 1189, 4, 256, 4, 4769, 0 }, { 1332, 4, 256, 4, 4769, 0 }, { 1475, 4, 294, 4, 4673, 0 }, { 142, 4, 294, 4, 4673, 0 }, { 188, 621, 4, 5, 4737, 26 }, { 375, 621, 4, 5, 4737, 26 }, { 518, 621, 4, 5, 4737, 26 }, { 661, 621, 4, 5, 4737, 26 }, { 804, 621, 4, 5, 4737, 26 }, { 947, 621, 4, 5, 4737, 26 }, { 1090, 621, 4, 5, 4737, 26 }, { 1233, 621, 4, 5, 4737, 26 }, { 1376, 621, 4, 5, 4737, 26 }, { 1515, 621, 4, 5, 4737, 26 }, { 42, 621, 4, 5, 4737, 26 }, { 235, 621, 4, 5, 4737, 26 }, { 424, 621, 4, 5, 4737, 26 }, { 569, 621, 4, 5, 4737, 26 }, { 712, 621, 4, 5, 4737, 26 }, { 855, 621, 4, 5, 4737, 26 }, { 998, 621, 4, 5, 4737, 26 }, { 1141, 621, 4, 5, 4737, 26 }, { 1284, 621, 4, 5, 4737, 26 }, { 1427, 621, 4, 5, 4737, 26 }, { 94, 621, 4, 5, 4737, 26 }, { 287, 621, 4, 5, 4737, 26 }, { 476, 621, 4, 5, 4737, 26 }, { 621, 621, 4, 5, 4737, 26 }, { 764, 621, 4, 5, 4737, 26 }, { 907, 621, 4, 5, 4737, 26 }, { 1050, 621, 4, 5, 4737, 26 }, { 1193, 621, 4, 5, 4737, 26 }, { 1336, 621, 4, 5, 4737, 26 }, { 346, 430, 179, 7, 1041, 30 }, { 490, 430, 243, 7, 1041, 30 }, { 634, 430, 134, 7, 1041, 30 }, { 777, 430, 134, 7, 1041, 30 }, { 920, 430, 134, 7, 1041, 30 }, { 1063, 430, 134, 7, 1041, 30 }, { 1206, 430, 134, 7, 1041, 30 }, { 1349, 430, 134, 7, 1041, 30 }, { 1488, 430, 134, 7, 1041, 30 }, { 10, 430, 134, 7, 1041, 30 }, { 201, 430, 134, 7, 1041, 30 }, { 389, 430, 134, 7, 1041, 30 }, { 533, 430, 134, 7, 1041, 30 }, { 676, 430, 134, 7, 1041, 30 }, { 819, 430, 134, 7, 1041, 30 }, { 962, 430, 134, 7, 1041, 30 }, { 1105, 430, 134, 7, 1041, 30 }, { 1248, 430, 134, 7, 1041, 30 }, { 1391, 430, 134, 7, 1041, 30 }, { 58, 430, 134, 7, 1041, 30 }, { 251, 430, 134, 7, 1041, 30 }, { 440, 430, 134, 7, 1041, 30 }, { 585, 430, 134, 7, 1041, 30 }, { 728, 430, 134, 7, 1041, 30 }, { 871, 430, 134, 7, 1041, 30 }, { 1014, 430, 134, 7, 1041, 30 }, { 1157, 430, 134, 7, 1041, 30 }, { 1300, 430, 134, 7, 1041, 30 }, { 1443, 430, 134, 7, 1041, 30 }, { 110, 430, 134, 7, 1041, 30 }, { 303, 430, 134, 7, 1041, 30 }, { 157, 421, 134, 7, 4080, 2 }, { 628, 562, 264, 31, 81, 37 }, { 771, 562, 264, 31, 81, 37 }, { 914, 562, 264, 31, 81, 37 }, { 1057, 562, 264, 31, 81, 37 }, { 1200, 562, 264, 31, 81, 37 }, { 1343, 562, 264, 31, 81, 37 }, { 1482, 562, 264, 31, 81, 37 }, { 4, 562, 264, 31, 81, 37 }, { 195, 562, 264, 31, 81, 37 }, { 382, 562, 264, 31, 81, 37 }, { 525, 562, 264, 31, 81, 37 }, { 668, 562, 264, 31, 81, 37 }, { 811, 562, 264, 31, 81, 37 }, { 954, 562, 264, 31, 81, 37 }, { 1097, 562, 264, 31, 81, 37 }, { 1240, 562, 264, 31, 81, 37 }, { 1383, 562, 264, 31, 81, 37 }, { 50, 562, 264, 31, 81, 37 }, { 243, 562, 264, 31, 81, 37 }, { 432, 562, 264, 31, 81, 37 }, { 577, 562, 264, 31, 81, 37 }, { 720, 562, 264, 31, 81, 37 }, { 863, 562, 264, 31, 81, 37 }, { 1006, 562, 264, 31, 81, 37 }, { 1149, 562, 264, 31, 81, 37 }, { 1292, 562, 264, 31, 81, 37 }, { 1435, 562, 264, 31, 81, 37 }, { 102, 562, 264, 31, 81, 37 }, { 295, 562, 264, 31, 81, 37 }, { 149, 584, 264, 31, 160, 42 }, { 338, 397, 264, 31, 368, 28 }, { 483, 540, 264, 31, 3216, 5 }, { 487, 32, 258, 16, 305, 43 }, { 631, 32, 191, 16, 305, 43 }, { 774, 32, 191, 16, 305, 43 }, { 917, 32, 191, 16, 305, 43 }, { 1060, 32, 191, 16, 305, 43 }, { 1203, 32, 191, 16, 305, 43 }, { 1346, 32, 191, 16, 305, 43 }, { 1485, 32, 191, 16, 305, 43 }, { 7, 32, 191, 16, 305, 43 }, { 198, 32, 191, 16, 305, 43 }, { 385, 32, 191, 16, 305, 43 }, { 529, 32, 191, 16, 305, 43 }, { 672, 32, 191, 16, 305, 43 }, { 815, 32, 191, 16, 305, 43 }, { 958, 32, 191, 16, 305, 43 }, { 1101, 32, 191, 16, 305, 43 }, { 1244, 32, 191, 16, 305, 43 }, { 1387, 32, 191, 16, 305, 43 }, { 54, 32, 191, 16, 305, 43 }, { 247, 32, 191, 16, 305, 43 }, { 436, 32, 191, 16, 305, 43 }, { 581, 32, 191, 16, 305, 43 }, { 724, 32, 191, 16, 305, 43 }, { 867, 32, 191, 16, 305, 43 }, { 1010, 32, 191, 16, 305, 43 }, { 1153, 32, 191, 16, 305, 43 }, { 1296, 32, 191, 16, 305, 43 }, { 1439, 32, 191, 16, 305, 43 }, { 106, 32, 191, 16, 305, 43 }, { 299, 32, 191, 16, 305, 43 }, { 153, 47, 191, 16, 448, 33 }, { 342, 608, 191, 16, 3824, 10 }, { 363, 268, 185, 53, 993, 49 }, { 506, 268, 249, 53, 993, 49 }, { 649, 268, 140, 53, 993, 49 }, { 792, 268, 140, 53, 993, 49 }, { 935, 268, 140, 53, 993, 49 }, { 1078, 268, 140, 53, 993, 49 }, { 1221, 268, 140, 53, 993, 49 }, { 1364, 268, 140, 53, 993, 49 }, { 1503, 268, 140, 53, 993, 49 }, { 27, 268, 140, 53, 993, 49 }, { 219, 268, 140, 53, 993, 49 }, { 408, 268, 140, 53, 993, 49 }, { 553, 268, 140, 53, 993, 49 }, { 696, 268, 140, 53, 993, 49 }, { 839, 268, 140, 53, 993, 49 }, { 982, 268, 140, 53, 993, 49 }, { 1125, 268, 140, 53, 993, 49 }, { 1268, 268, 140, 53, 993, 49 }, { 1411, 268, 140, 53, 993, 49 }, { 78, 268, 140, 53, 993, 49 }, { 271, 268, 140, 53, 993, 49 }, { 460, 268, 140, 53, 993, 49 }, { 605, 268, 140, 53, 993, 49 }, { 748, 268, 140, 53, 993, 49 }, { 891, 268, 140, 53, 993, 49 }, { 1034, 268, 140, 53, 993, 49 }, { 1177, 268, 140, 53, 993, 49 }, { 1320, 268, 140, 53, 993, 49 }, { 1463, 268, 140, 53, 993, 49 }, { 130, 268, 140, 53, 993, 49 }, { 323, 268, 140, 53, 993, 49 }, { 175, 280, 140, 53, 4080, 14 }, { 643, 476, 4, 86, 1, 56 }, { 786, 476, 4, 86, 1, 56 }, { 929, 476, 4, 86, 1, 56 }, { 1072, 476, 4, 86, 1, 56 }, { 1215, 476, 4, 86, 1, 56 }, { 1358, 476, 4, 86, 1, 56 }, { 1497, 476, 4, 86, 1, 56 }, { 21, 476, 4, 86, 1, 56 }, { 213, 476, 4, 86, 1, 56 }, { 401, 476, 4, 86, 1, 56 }, { 545, 476, 4, 86, 1, 56 }, { 688, 476, 4, 86, 1, 56 }, { 831, 476, 4, 86, 1, 56 }, { 974, 476, 4, 86, 1, 56 }, { 1117, 476, 4, 86, 1, 56 }, { 1260, 476, 4, 86, 1, 56 }, { 1403, 476, 4, 86, 1, 56 }, { 70, 476, 4, 86, 1, 56 }, { 263, 476, 4, 86, 1, 56 }, { 452, 476, 4, 86, 1, 56 }, { 597, 476, 4, 86, 1, 56 }, { 740, 476, 4, 86, 1, 56 }, { 883, 476, 4, 86, 1, 56 }, { 1026, 476, 4, 86, 1, 56 }, { 1169, 476, 4, 86, 1, 56 }, { 1312, 476, 4, 86, 1, 56 }, { 1455, 476, 4, 86, 1, 56 }, { 122, 476, 4, 86, 1, 56 }, { 315, 476, 4, 86, 1, 56 }, { 167, 508, 4, 86, 160, 61 }, { 355, 365, 4, 86, 368, 47 }, { 499, 444, 4, 86, 3216, 17 }, { 503, 302, 261, 65, 241, 62 }, { 646, 302, 88, 65, 241, 62 }, { 789, 302, 88, 65, 241, 62 }, { 932, 302, 88, 65, 241, 62 }, { 1075, 302, 88, 65, 241, 62 }, { 1218, 302, 88, 65, 241, 62 }, { 1361, 302, 88, 65, 241, 62 }, { 1500, 302, 88, 65, 241, 62 }, { 24, 302, 88, 65, 241, 62 }, { 216, 302, 88, 65, 241, 62 }, { 404, 302, 88, 65, 241, 62 }, { 549, 302, 88, 65, 241, 62 }, { 692, 302, 88, 65, 241, 62 }, { 835, 302, 88, 65, 241, 62 }, { 978, 302, 88, 65, 241, 62 }, { 1121, 302, 88, 65, 241, 62 }, { 1264, 302, 88, 65, 241, 62 }, { 1407, 302, 88, 65, 241, 62 }, { 74, 302, 88, 65, 241, 62 }, { 267, 302, 88, 65, 241, 62 }, { 456, 302, 88, 65, 241, 62 }, { 601, 302, 88, 65, 241, 62 }, { 744, 302, 88, 65, 241, 62 }, { 887, 302, 88, 65, 241, 62 }, { 1030, 302, 88, 65, 241, 62 }, { 1173, 302, 88, 65, 241, 62 }, { 1316, 302, 88, 65, 241, 62 }, { 1459, 302, 88, 65, 241, 62 }, { 126, 302, 88, 65, 241, 62 }, { 319, 302, 88, 65, 241, 62 }, { 171, 323, 88, 65, 448, 52 }, { 359, 344, 88, 65, 3824, 22 }, }; // FPR8 Register Class... static const MCPhysReg FPR8[] = { AArch64_B0, AArch64_B1, AArch64_B2, AArch64_B3, AArch64_B4, AArch64_B5, AArch64_B6, AArch64_B7, AArch64_B8, AArch64_B9, AArch64_B10, AArch64_B11, AArch64_B12, AArch64_B13, AArch64_B14, AArch64_B15, AArch64_B16, AArch64_B17, AArch64_B18, AArch64_B19, AArch64_B20, AArch64_B21, AArch64_B22, AArch64_B23, AArch64_B24, AArch64_B25, AArch64_B26, AArch64_B27, AArch64_B28, AArch64_B29, AArch64_B30, AArch64_B31, }; // FPR8 Bit set. static const uint8_t FPR8Bits[] = { 0x00, 0xff, 0xff, 0xff, 0xff, }; // FPR16 Register Class... static const MCPhysReg FPR16[] = { AArch64_H0, AArch64_H1, AArch64_H2, AArch64_H3, AArch64_H4, AArch64_H5, AArch64_H6, AArch64_H7, AArch64_H8, AArch64_H9, AArch64_H10, AArch64_H11, AArch64_H12, AArch64_H13, AArch64_H14, AArch64_H15, AArch64_H16, AArch64_H17, AArch64_H18, AArch64_H19, AArch64_H20, AArch64_H21, AArch64_H22, AArch64_H23, AArch64_H24, AArch64_H25, AArch64_H26, AArch64_H27, AArch64_H28, AArch64_H29, AArch64_H30, AArch64_H31, }; // FPR16 Bit set. static const uint8_t FPR16Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // GPR32all Register Class... static const MCPhysReg GPR32all[] = { AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WZR, AArch64_WSP, }; // GPR32all Bit set. static const uint8_t GPR32allBits[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, }; // FPR32 Register Class... static const MCPhysReg FPR32[] = { AArch64_S0, AArch64_S1, AArch64_S2, AArch64_S3, AArch64_S4, AArch64_S5, AArch64_S6, AArch64_S7, AArch64_S8, AArch64_S9, AArch64_S10, AArch64_S11, AArch64_S12, AArch64_S13, AArch64_S14, AArch64_S15, AArch64_S16, AArch64_S17, AArch64_S18, AArch64_S19, AArch64_S20, AArch64_S21, AArch64_S22, AArch64_S23, AArch64_S24, AArch64_S25, AArch64_S26, AArch64_S27, AArch64_S28, AArch64_S29, AArch64_S30, AArch64_S31, }; // FPR32 Bit set. static const uint8_t FPR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // GPR32 Register Class... static const MCPhysReg GPR32[] = { AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WZR, }; // GPR32 Bit set. static const uint8_t GPR32Bits[] = { 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, }; // GPR32sp Register Class... static const MCPhysReg GPR32sp[] = { AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WSP, }; // GPR32sp Bit set. static const uint8_t GPR32spBits[] = { 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, }; // GPR32common Register Class... static const MCPhysReg GPR32common[] = { AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, }; // GPR32common Bit set. static const uint8_t GPR32commonBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, }; // CCR Register Class... static const MCPhysReg CCR[] = { AArch64_NZCV, }; // CCR Bit set. static const uint8_t CCRBits[] = { 0x08, }; // GPR32sponly Register Class... static const MCPhysReg GPR32sponly[] = { AArch64_WSP, }; // GPR32sponly Bit set. static const uint8_t GPR32sponlyBits[] = { 0x20, }; // GPR64all Register Class... static const MCPhysReg GPR64all[] = { AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_XZR, AArch64_SP, }; // GPR64all Bit set. static const uint8_t GPR64allBits[] = { 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, }; // FPR64 Register Class... static const MCPhysReg FPR64[] = { AArch64_D0, AArch64_D1, AArch64_D2, AArch64_D3, AArch64_D4, AArch64_D5, AArch64_D6, AArch64_D7, AArch64_D8, AArch64_D9, AArch64_D10, AArch64_D11, AArch64_D12, AArch64_D13, AArch64_D14, AArch64_D15, AArch64_D16, AArch64_D17, AArch64_D18, AArch64_D19, AArch64_D20, AArch64_D21, AArch64_D22, AArch64_D23, AArch64_D24, AArch64_D25, AArch64_D26, AArch64_D27, AArch64_D28, AArch64_D29, AArch64_D30, AArch64_D31, }; // FPR64 Bit set. static const uint8_t FPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // GPR64 Register Class... static const MCPhysReg GPR64[] = { AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_XZR, }; // GPR64 Bit set. static const uint8_t GPR64Bits[] = { 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, }; // GPR64sp Register Class... static const MCPhysReg GPR64sp[] = { AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_SP, }; // GPR64sp Bit set. static const uint8_t GPR64spBits[] = { 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, }; // GPR64common Register Class... static const MCPhysReg GPR64common[] = { AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, }; // GPR64common Bit set. static const uint8_t GPR64commonBits[] = { 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, }; // tcGPR64 Register Class... static const MCPhysReg tcGPR64[] = { AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, }; // tcGPR64 Bit set. static const uint8_t tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, }; // GPR64sponly Register Class... static const MCPhysReg GPR64sponly[] = { AArch64_SP, }; // GPR64sponly Bit set. static const uint8_t GPR64sponlyBits[] = { 0x10, }; // DD Register Class... static const MCPhysReg DD[] = { AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4, AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8, AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12, AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15, AArch64_D15_D16, AArch64_D16_D17, AArch64_D17_D18, AArch64_D18_D19, AArch64_D19_D20, AArch64_D20_D21, AArch64_D21_D22, AArch64_D22_D23, AArch64_D23_D24, AArch64_D24_D25, AArch64_D25_D26, AArch64_D26_D27, AArch64_D27_D28, AArch64_D28_D29, AArch64_D29_D30, AArch64_D30_D31, AArch64_D31_D0, }; // DD Bit set. static const uint8_t DDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // FPR128 Register Class... static const MCPhysReg FPR128[] = { AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4, AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9, AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14, AArch64_Q15, AArch64_Q16, AArch64_Q17, AArch64_Q18, AArch64_Q19, AArch64_Q20, AArch64_Q21, AArch64_Q22, AArch64_Q23, AArch64_Q24, AArch64_Q25, AArch64_Q26, AArch64_Q27, AArch64_Q28, AArch64_Q29, AArch64_Q30, AArch64_Q31, }; // FPR128 Bit set. static const uint8_t FPR128Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // FPR128_lo Register Class... static const MCPhysReg FPR128_lo[] = { AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4, AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9, AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14, AArch64_Q15, }; // FPR128_lo Bit set. static const uint8_t FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // DDD Register Class... static const MCPhysReg DDD[] = { AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16, AArch64_D15_D16_D17, AArch64_D16_D17_D18, AArch64_D17_D18_D19, AArch64_D18_D19_D20, AArch64_D19_D20_D21, AArch64_D20_D21_D22, AArch64_D21_D22_D23, AArch64_D22_D23_D24, AArch64_D23_D24_D25, AArch64_D24_D25_D26, AArch64_D25_D26_D27, AArch64_D26_D27_D28, AArch64_D27_D28_D29, AArch64_D28_D29_D30, AArch64_D29_D30_D31, AArch64_D30_D31_D0, AArch64_D31_D0_D1, }; // DDD Bit set. static const uint8_t DDDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // DDDD Register Class... static const MCPhysReg DDDD[] = { AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17, AArch64_D15_D16_D17_D18, AArch64_D16_D17_D18_D19, AArch64_D17_D18_D19_D20, AArch64_D18_D19_D20_D21, AArch64_D19_D20_D21_D22, AArch64_D20_D21_D22_D23, AArch64_D21_D22_D23_D24, AArch64_D22_D23_D24_D25, AArch64_D23_D24_D25_D26, AArch64_D24_D25_D26_D27, AArch64_D25_D26_D27_D28, AArch64_D26_D27_D28_D29, AArch64_D27_D28_D29_D30, AArch64_D28_D29_D30_D31, AArch64_D29_D30_D31_D0, AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2, }; // DDDD Bit set. static const uint8_t DDDDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQ Register Class... static const MCPhysReg QQ[] = { AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16, AArch64_Q16_Q17, AArch64_Q17_Q18, AArch64_Q18_Q19, AArch64_Q19_Q20, AArch64_Q20_Q21, AArch64_Q21_Q22, AArch64_Q22_Q23, AArch64_Q23_Q24, AArch64_Q24_Q25, AArch64_Q25_Q26, AArch64_Q26_Q27, AArch64_Q27_Q28, AArch64_Q28_Q29, AArch64_Q29_Q30, AArch64_Q30_Q31, AArch64_Q31_Q0, }; // QQ Bit set. static const uint8_t QQBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQ_with_qsub0_in_FPR128_lo Register Class... static const MCPhysReg QQ_with_qsub0_in_FPR128_lo[] = { AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16, }; // QQ_with_qsub0_in_FPR128_lo Bit set. static const uint8_t QQ_with_qsub0_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // QQ_with_qsub1_in_FPR128_lo Register Class... static const MCPhysReg QQ_with_qsub1_in_FPR128_lo[] = { AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q31_Q0, }; // QQ_with_qsub1_in_FPR128_lo Bit set. static const uint8_t QQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, }; // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo Register Class... static const MCPhysReg QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo[] = { AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, }; // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo Bit set. static const uint8_t QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // QQQ Register Class... static const MCPhysReg QQQ[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17, AArch64_Q16_Q17_Q18, AArch64_Q17_Q18_Q19, AArch64_Q18_Q19_Q20, AArch64_Q19_Q20_Q21, AArch64_Q20_Q21_Q22, AArch64_Q21_Q22_Q23, AArch64_Q22_Q23_Q24, AArch64_Q23_Q24_Q25, AArch64_Q24_Q25_Q26, AArch64_Q25_Q26_Q27, AArch64_Q26_Q27_Q28, AArch64_Q27_Q28_Q29, AArch64_Q28_Q29_Q30, AArch64_Q29_Q30_Q31, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1, }; // QQQ Bit set. static const uint8_t QQQBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQQ_with_qsub0_in_FPR128_lo Register Class... static const MCPhysReg QQQ_with_qsub0_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17, }; // QQQ_with_qsub0_in_FPR128_lo Bit set. static const uint8_t QQQ_with_qsub0_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // QQQ_with_qsub1_in_FPR128_lo Register Class... static const MCPhysReg QQQ_with_qsub1_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q31_Q0_Q1, }; // QQQ_with_qsub1_in_FPR128_lo Bit set. static const uint8_t QQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, }; // QQQ_with_qsub2_in_FPR128_lo Register Class... static const MCPhysReg QQQ_with_qsub2_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1, }; // QQQ_with_qsub2_in_FPR128_lo Bit set. static const uint8_t QQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c, }; // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo Register Class... static const MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, }; // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo Bit set. static const uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class... static const MCPhysReg QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q31_Q0_Q1, }; // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set. static const uint8_t QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08, }; // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class... static const MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, }; // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set. static const uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, }; // QQQQ Register Class... static const MCPhysReg QQQQ[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18, AArch64_Q16_Q17_Q18_Q19, AArch64_Q17_Q18_Q19_Q20, AArch64_Q18_Q19_Q20_Q21, AArch64_Q19_Q20_Q21_Q22, AArch64_Q20_Q21_Q22_Q23, AArch64_Q21_Q22_Q23_Q24, AArch64_Q22_Q23_Q24_Q25, AArch64_Q23_Q24_Q25_Q26, AArch64_Q24_Q25_Q26_Q27, AArch64_Q25_Q26_Q27_Q28, AArch64_Q26_Q27_Q28_Q29, AArch64_Q27_Q28_Q29_Q30, AArch64_Q28_Q29_Q30_Q31, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ Bit set. static const uint8_t QQQQBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQQQ_with_qsub0_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18, }; // QQQQ_with_qsub0_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub0_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // QQQQ_with_qsub1_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub1_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, }; // QQQQ_with_qsub2_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub2_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub2_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c, }; // QQQQ_with_qsub3_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub3_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0e, }; // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, }; // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08, }; // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0c, }; // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, }; // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x08, }; // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... static const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, }; // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. static const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, }; static MCRegisterClass AArch64MCRegisterClasses[] = { { FPR8, FPR8Bits, 39, 32, sizeof(FPR8Bits), AArch64_FPR8RegClassID, 1, 1, 1, 1 }, { FPR16, FPR16Bits, 26, 32, sizeof(FPR16Bits), AArch64_FPR16RegClassID, 2, 2, 1, 1 }, { GPR32all, GPR32allBits, 58, 33, sizeof(GPR32allBits), AArch64_GPR32allRegClassID, 4, 4, 1, 1 }, { FPR32, FPR32Bits, 0, 32, sizeof(FPR32Bits), AArch64_FPR32RegClassID, 4, 4, 1, 1 }, { GPR32, GPR32Bits, 6, 32, sizeof(GPR32Bits), AArch64_GPR32RegClassID, 4, 4, 1, 1 }, { GPR32sp, GPR32spBits, 739, 32, sizeof(GPR32spBits), AArch64_GPR32spRegClassID, 4, 4, 1, 1 }, { GPR32common, GPR32commonBits, 76, 31, sizeof(GPR32commonBits), AArch64_GPR32commonRegClassID, 4, 4, 1, 1 }, { CCR, CCRBits, 54, 1, sizeof(CCRBits), AArch64_CCRRegClassID, 4, 4, -1, 0 }, { GPR32sponly, GPR32sponlyBits, 755, 1, sizeof(GPR32sponlyBits), AArch64_GPR32sponlyRegClassID, 4, 4, 1, 1 }, { GPR64all, GPR64allBits, 67, 33, sizeof(GPR64allBits), AArch64_GPR64allRegClassID, 8, 8, 1, 1 }, { FPR64, FPR64Bits, 12, 32, sizeof(FPR64Bits), AArch64_FPR64RegClassID, 8, 8, 1, 1 }, { GPR64, GPR64Bits, 20, 32, sizeof(GPR64Bits), AArch64_GPR64RegClassID, 8, 8, 1, 1 }, { GPR64sp, GPR64spBits, 747, 32, sizeof(GPR64spBits), AArch64_GPR64spRegClassID, 8, 8, 1, 1 }, { GPR64common, GPR64commonBits, 88, 31, sizeof(GPR64commonBits), AArch64_GPR64commonRegClassID, 8, 8, 1, 1 }, { tcGPR64, tcGPR64Bits, 18, 19, sizeof(tcGPR64Bits), AArch64_tcGPR64RegClassID, 8, 8, 1, 1 }, { GPR64sponly, GPR64sponlyBits, 767, 1, sizeof(GPR64sponlyBits), AArch64_GPR64sponlyRegClassID, 8, 8, 1, 1 }, { DD, DDBits, 46, 32, sizeof(DDBits), AArch64_DDRegClassID, 16, 8, 1, 1 }, { FPR128, FPR128Bits, 32, 32, sizeof(FPR128Bits), AArch64_FPR128RegClassID, 16, 16, 1, 1 }, { FPR128_lo, FPR128_loBits, 119, 16, sizeof(FPR128_loBits), AArch64_FPR128_loRegClassID, 16, 16, 1, 1 }, { DDD, DDDBits, 45, 32, sizeof(DDDBits), AArch64_DDDRegClassID, 24, 8, 1, 1 }, { DDDD, DDDDBits, 44, 32, sizeof(DDDDBits), AArch64_DDDDRegClassID, 32, 8, 1, 1 }, { QQ, QQBits, 51, 32, sizeof(QQBits), AArch64_QQRegClassID, 32, 16, 1, 1 }, { QQ_with_qsub0_in_FPR128_lo, QQ_with_qsub0_in_FPR128_loBits, 102, 16, sizeof(QQ_with_qsub0_in_FPR128_loBits), AArch64_QQ_with_qsub0_in_FPR128_loRegClassID, 32, 16, 1, 1 }, { QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub1_in_FPR128_loBits, 164, 16, sizeof(QQ_with_qsub1_in_FPR128_loBits), AArch64_QQ_with_qsub1_in_FPR128_loRegClassID, 32, 16, 1, 1 }, { QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits, 251, 15, sizeof(QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits), AArch64_QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID, 32, 16, 1, 1 }, { QQQ, QQQBits, 50, 32, sizeof(QQQBits), AArch64_QQQRegClassID, 48, 16, 1, 1 }, { QQQ_with_qsub0_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_loBits, 101, 16, sizeof(QQQ_with_qsub0_in_FPR128_loBits), AArch64_QQQ_with_qsub0_in_FPR128_loRegClassID, 48, 16, 1, 1 }, { QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_loBits, 163, 16, sizeof(QQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQ_with_qsub1_in_FPR128_loRegClassID, 48, 16, 1, 1 }, { QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub2_in_FPR128_loBits, 343, 16, sizeof(QQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 }, { QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits, 191, 15, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID, 48, 16, 1, 1 }, { QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 493, 15, sizeof(QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 }, { QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 433, 14, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 }, { QQQQ, QQQQBits, 49, 32, sizeof(QQQQBits), AArch64_QQQQRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub0_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_loBits, 100, 16, sizeof(QQQQ_with_qsub0_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_loBits, 162, 16, sizeof(QQQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQQ_with_qsub1_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_loBits, 342, 16, sizeof(QQQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub3_in_FPR128_loBits, 586, 16, sizeof(QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits, 129, 15, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 371, 15, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 677, 15, sizeof(QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 309, 14, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 615, 14, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 553, 13, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc010066400017500001750000000021471363402546700233150ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Subtarget Enumeration Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM enum { AArch64_FeatureCRC = 1ULL << 0, AArch64_FeatureCrypto = 1ULL << 1, AArch64_FeatureFPARMv8 = 1ULL << 2, AArch64_FeatureNEON = 1ULL << 3, AArch64_FeatureZCRegMove = 1ULL << 4, AArch64_FeatureZCZeroing = 1ULL << 5, AArch64_ProcA53 = 1ULL << 6, AArch64_ProcA57 = 1ULL << 7, AArch64_ProcCyclone = 1ULL << 8 }; #endif // GET_SUBTARGETINFO_ENUM capstone-sys-0.11.0/capstone/arch/AArch64/AArch64InstPrinter.c010066400017500001750000002062311363403403300220260ustar0000000000000000//==-- AArch64InstPrinter.cpp - Convert AArch64 MCInst to assembly syntax --==// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an AArch64 MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2016 */ #ifdef CAPSTONE_HAS_ARM64 #include #include #include #include "AArch64InstPrinter.h" #include "AArch64BaseInfo.h" #include "../../utils.h" #include "../../MCInst.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../MathExtras.h" #include "AArch64Mapping.h" #include "AArch64AddressingModes.h" #define GET_REGINFO_ENUM #include "AArch64GenRegisterInfo.inc" #define GET_INSTRINFO_ENUM #include "AArch64GenInstrInfo.inc" static const char *getRegisterName(unsigned RegNo, int AltIdx); static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static bool printSysAlias(MCInst *MI, SStream *O); static char *printAliasInstr(MCInst *MI, SStream *OS, void *info); static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI); static void printShifter(MCInst *MI, unsigned OpNum, SStream *O); static cs_ac_type get_op_access(cs_struct *h, unsigned int id, unsigned int index) { #ifndef CAPSTONE_DIET uint8_t *arr = AArch64_get_op_access(h, id); if (arr[index] == CS_AC_IGNORE) return 0; return arr[index]; #else return 0; #endif } static void set_mem_access(MCInst *MI, bool status) { MI->csh->doing_mem = status; if (MI->csh->detail != CS_OPT_ON) return; if (status) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_INVALID; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG_INVALID; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0; } else { // done, create the next operand slot MI->flat_insn->detail->arm64.op_count++; } } void AArch64_printInst(MCInst *MI, SStream *O, void *Info) { // Check for special encodings and print the canonical alias instead. unsigned Opcode = MCInst_getOpcode(MI); int LSB; int Width; char *mnem; if (Opcode == AArch64_SYSxt && printSysAlias(MI, O)) return; // SBFM/UBFM should print to a nicer aliased form if possible. if (Opcode == AArch64_SBFMXri || Opcode == AArch64_SBFMWri || Opcode == AArch64_UBFMXri || Opcode == AArch64_UBFMWri) { MCOperand *Op0 = MCInst_getOperand(MI, 0); MCOperand *Op1 = MCInst_getOperand(MI, 1); MCOperand *Op2 = MCInst_getOperand(MI, 2); MCOperand *Op3 = MCInst_getOperand(MI, 3); bool IsSigned = (Opcode == AArch64_SBFMXri || Opcode == AArch64_SBFMWri); bool Is64Bit = (Opcode == AArch64_SBFMXri || Opcode == AArch64_UBFMXri); if (MCOperand_isImm(Op2) && MCOperand_getImm(Op2) == 0 && MCOperand_isImm(Op3)) { const char *AsmMnemonic = NULL; switch (MCOperand_getImm(Op3)) { default: break; case 7: if (IsSigned) AsmMnemonic = "sxtb"; else if (!Is64Bit) AsmMnemonic = "uxtb"; break; case 15: if (IsSigned) AsmMnemonic = "sxth"; else if (!Is64Bit) AsmMnemonic = "uxth"; break; case 31: // *xtw is only valid for signed 64-bit operations. if (Is64Bit && IsSigned) AsmMnemonic = "sxtw"; break; } if (AsmMnemonic) { SStream_concat(O, "%s\t%s, %s", AsmMnemonic, getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), getRegisterName(getWRegFromXReg(MCOperand_getReg(Op1)), AArch64_NoRegAltName)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg(MCOperand_getReg(Op1)); MI->flat_insn->detail->arm64.op_count++; } MCInst_setOpcodePub(MI, AArch64_map_insn(AsmMnemonic)); return; } } // All immediate shifts are aliases, implemented using the Bitfield // instruction. In all cases the immediate shift amount shift must be in // the range 0 to (reg.size -1). if (MCOperand_isImm(Op2) && MCOperand_isImm(Op3)) { const char *AsmMnemonic = NULL; int shift = 0; int immr = (int)MCOperand_getImm(Op2); int imms = (int)MCOperand_getImm(Op3); if (Opcode == AArch64_UBFMWri && imms != 0x1F && ((imms + 1) == immr)) { AsmMnemonic = "lsl"; shift = 31 - imms; } else if (Opcode == AArch64_UBFMXri && imms != 0x3f && ((imms + 1 == immr))) { AsmMnemonic = "lsl"; shift = 63 - imms; } else if (Opcode == AArch64_UBFMWri && imms == 0x1f) { AsmMnemonic = "lsr"; shift = immr; } else if (Opcode == AArch64_UBFMXri && imms == 0x3f) { AsmMnemonic = "lsr"; shift = immr; } else if (Opcode == AArch64_SBFMWri && imms == 0x1f) { AsmMnemonic = "asr"; shift = immr; } else if (Opcode == AArch64_SBFMXri && imms == 0x3f) { AsmMnemonic = "asr"; shift = immr; } if (AsmMnemonic) { SStream_concat(O, "%s\t%s, %s, ", AsmMnemonic, getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); printInt32Bang(O, shift); MCInst_setOpcodePub(MI, AArch64_map_insn(AsmMnemonic)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = shift; MI->flat_insn->detail->arm64.op_count++; } return; } } // SBFIZ/UBFIZ aliases if (MCOperand_getImm(Op2) > MCOperand_getImm(Op3)) { SStream_concat(O, "%s\t%s, %s, ", (IsSigned ? "sbfiz" : "ubfiz"), getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); printInt32Bang(O, (int)((Is64Bit ? 64 : 32) - MCOperand_getImm(Op2))); SStream_concat0(O, ", "); printInt32Bang(O, (int)MCOperand_getImm(Op3) + 1); MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfiz" : "ubfiz")); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (Is64Bit ? 64 : 32) - (int)MCOperand_getImm(Op2); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op3) + 1; MI->flat_insn->detail->arm64.op_count++; } return; } // Otherwise SBFX/UBFX is the preferred form SStream_concat(O, "%s\t%s, %s, ", (IsSigned ? "sbfx" : "ubfx"), getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); printInt32Bang(O, (int)MCOperand_getImm(Op2)); SStream_concat0(O, ", "); printInt32Bang(O, (int)MCOperand_getImm(Op3) - (int)MCOperand_getImm(Op2) + 1); MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfx" : "ubfx")); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op2); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op3) - MCOperand_getImm(Op2) + 1; MI->flat_insn->detail->arm64.op_count++; } return; } if (Opcode == AArch64_BFMXri || Opcode == AArch64_BFMWri) { MCOperand *Op0 = MCInst_getOperand(MI, 0); // Op1 == Op0 MCOperand *Op2 = MCInst_getOperand(MI, 2); int ImmR = (int)MCOperand_getImm(MCInst_getOperand(MI, 3)); int ImmS = (int)MCOperand_getImm(MCInst_getOperand(MI, 4)); // BFI alias if (ImmS < ImmR) { int BitWidth = Opcode == AArch64_BFMXri ? 64 : 32; LSB = (BitWidth - ImmR) % BitWidth; Width = ImmS + 1; SStream_concat(O, "bfi\t%s, %s, ", getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), getRegisterName(MCOperand_getReg(Op2), AArch64_NoRegAltName)); printInt32Bang(O, LSB); SStream_concat0(O, ", "); printInt32Bang(O, Width); MCInst_setOpcodePub(MI, AArch64_map_insn("bfi")); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB; MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width; MI->flat_insn->detail->arm64.op_count++; } return; } LSB = ImmR; Width = ImmS - ImmR + 1; // Otherwise BFXIL the preferred form SStream_concat(O, "bfxil\t%s, %s, ", getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), getRegisterName(MCOperand_getReg(Op2), AArch64_NoRegAltName)); printInt32Bang(O, LSB); SStream_concat0(O, ", "); printInt32Bang(O, Width); MCInst_setOpcodePub(MI, AArch64_map_insn("bfxil")); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2); MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB; MI->flat_insn->detail->arm64.op_count++; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width; MI->flat_insn->detail->arm64.op_count++; } return; } mnem = printAliasInstr(MI, O, Info); if (mnem) { MCInst_setOpcodePub(MI, AArch64_map_insn(mnem)); cs_mem_free(mnem); switch(MCInst_getOpcode(MI)) { default: break; case AArch64_UMOVvi64: arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); break; case AArch64_UMOVvi32: arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); break; } } else { printInstruction(MI, O, Info); } } static bool printSysAlias(MCInst *MI, SStream *O) { // unsigned Opcode = MCInst_getOpcode(MI); //assert(Opcode == AArch64_SYSxt && "Invalid opcode for SYS alias!"); const char *Asm = NULL; MCOperand *Op1 = MCInst_getOperand(MI, 0); MCOperand *Cn = MCInst_getOperand(MI, 1); MCOperand *Cm = MCInst_getOperand(MI, 2); MCOperand *Op2 = MCInst_getOperand(MI, 3); unsigned Op1Val = (unsigned)MCOperand_getImm(Op1); unsigned CnVal = (unsigned)MCOperand_getImm(Cn); unsigned CmVal = (unsigned)MCOperand_getImm(Cm); unsigned Op2Val = (unsigned)MCOperand_getImm(Op2); unsigned insn_id = ARM64_INS_INVALID; unsigned op_ic = 0, op_dc = 0, op_at = 0, op_tlbi = 0; if (CnVal == 7) { switch (CmVal) { default: break; // IC aliases case 1: if (Op1Val == 0 && Op2Val == 0) { Asm = "ic\tialluis"; insn_id = ARM64_INS_IC; op_ic = ARM64_IC_IALLUIS; } break; case 5: if (Op1Val == 0 && Op2Val == 0) { Asm = "ic\tiallu"; insn_id = ARM64_INS_IC; op_ic = ARM64_IC_IALLU; } else if (Op1Val == 3 && Op2Val == 1) { Asm = "ic\tivau"; insn_id = ARM64_INS_IC; op_ic = ARM64_IC_IVAU; } break; // DC aliases case 4: if (Op1Val == 3 && Op2Val == 1) { Asm = "dc\tzva"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_ZVA; } break; case 6: if (Op1Val == 0 && Op2Val == 1) { Asm = "dc\tivac"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_IVAC; } if (Op1Val == 0 && Op2Val == 2) { Asm = "dc\tisw"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_ISW; } break; case 10: if (Op1Val == 3 && Op2Val == 1) { Asm = "dc\tcvac"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_CVAC; } else if (Op1Val == 0 && Op2Val == 2) { Asm = "dc\tcsw"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_CSW; } break; case 11: if (Op1Val == 3 && Op2Val == 1) { Asm = "dc\tcvau"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_CVAU; } break; case 14: if (Op1Val == 3 && Op2Val == 1) { Asm = "dc\tcivac"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_CIVAC; } else if (Op1Val == 0 && Op2Val == 2) { Asm = "dc\tcisw"; insn_id = ARM64_INS_DC; op_dc = ARM64_DC_CISW; } break; // AT aliases case 8: switch (Op1Val) { default: break; case 0: switch (Op2Val) { default: break; case 0: Asm = "at\ts1e1r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1R; break; case 1: Asm = "at\ts1e1w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1W; break; case 2: Asm = "at\ts1e0r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0R; break; case 3: Asm = "at\ts1e0w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0W; break; } break; case 4: switch (Op2Val) { default: break; case 0: Asm = "at\ts1e2r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E2R; break; case 1: Asm = "at\ts1e2w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E2W; break; case 4: Asm = "at\ts12e1r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1R; break; case 5: Asm = "at\ts12e1w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1W; break; case 6: Asm = "at\ts12e0r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0R; break; case 7: Asm = "at\ts12e0w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0W; break; } break; case 6: switch (Op2Val) { default: break; case 0: Asm = "at\ts1e3r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E3R; break; case 1: Asm = "at\ts1e3w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E3W; break; } break; } break; } } else if (CnVal == 8) { // TLBI aliases switch (CmVal) { default: break; case 3: switch (Op1Val) { default: break; case 0: switch (Op2Val) { default: break; case 0: Asm = "tlbi\tvmalle1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLE1IS; break; case 1: Asm = "tlbi\tvae1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE1IS; break; case 2: Asm = "tlbi\taside1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ASIDE1IS; break; case 3: Asm = "tlbi\tvaae1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAAE1IS; break; case 5: Asm = "tlbi\tvale1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE1IS; break; case 7: Asm = "tlbi\tvaale1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAALE1IS; break; } break; case 4: switch (Op2Val) { default: break; case 0: Asm = "tlbi\talle2is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE2IS; break; case 1: Asm = "tlbi\tvae2is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE2IS; break; case 4: Asm = "tlbi\talle1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE1IS; break; case 5: Asm = "tlbi\tvale2is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE2IS; break; case 6: Asm = "tlbi\tvmalls12e1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLS12E1IS; break; } break; case 6: switch (Op2Val) { default: break; case 0: Asm = "tlbi\talle3is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE3IS; break; case 1: Asm = "tlbi\tvae3is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE3IS; break; case 5: Asm = "tlbi\tvale3is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE3IS; break; } break; } break; case 0: switch (Op1Val) { default: break; case 4: switch (Op2Val) { default: break; case 1: Asm = "tlbi\tipas2e1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2E1IS; break; case 5: Asm = "tlbi\tipas2le1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2LE1IS; break; } break; } break; case 4: switch (Op1Val) { default: break; case 4: switch (Op2Val) { default: break; case 1: Asm = "tlbi\tipas2e1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2E1; break; case 5: Asm = "tlbi\tipas2le1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2LE1; break; } break; } break; case 7: switch (Op1Val) { default: break; case 0: switch (Op2Val) { default: break; case 0: Asm = "tlbi\tvmalle1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLE1; break; case 1: Asm = "tlbi\tvae1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE1; break; case 2: Asm = "tlbi\taside1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ASIDE1; break; case 3: Asm = "tlbi\tvaae1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAAE1; break; case 5: Asm = "tlbi\tvale1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE1; break; case 7: Asm = "tlbi\tvaale1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAALE1; break; } break; case 4: switch (Op2Val) { default: break; case 0: Asm = "tlbi\talle2"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE2; break; case 1: Asm = "tlbi\tvae2"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE2; break; case 4: Asm = "tlbi\talle1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE1; break; case 5: Asm = "tlbi\tvale2"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE2; break; case 6: Asm = "tlbi\tvmalls12e1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLS12E1; break; } break; case 6: switch (Op2Val) { default: break; case 0: Asm = "tlbi\talle3"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE3; break; case 1: Asm = "tlbi\tvae3"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE3; break; case 5: Asm = "tlbi\tvale3"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE3; break; } break; } break; } } if (Asm) { MCInst_setOpcodePub(MI, insn_id); SStream_concat0(O, Asm); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_SYS; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].sys = op_ic + op_dc + op_at + op_tlbi; MI->flat_insn->detail->arm64.op_count++; } if (!strstr(Asm, "all")) { unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, 4)); SStream_concat(O, ", %s", getRegisterName(Reg, AArch64_NoRegAltName)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; MI->flat_insn->detail->arm64.op_count++; } } } return Asm != NULL; } static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned Reg = MCOperand_getReg(Op); SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName)); if (MI->csh->detail) { if (MI->csh->doing_mem) { if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base == ARM64_REG_INVALID) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = Reg; } else if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index == ARM64_REG_INVALID) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = Reg; } } else { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; MI->flat_insn->detail->arm64.op_count++; } } } else if (MCOperand_isImm(Op)) { int64_t imm = MCOperand_getImm(Op); if (MI->Opcode == AArch64_ADR) { imm += MI->address; printUInt64Bang(O, imm); } else { if (MI->csh->doing_mem) { if (MI->csh->imm_unsigned) printUInt64Bang(O, imm); else printInt64Bang(O, imm); } else printUInt64Bang(O, imm); } if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)imm; } else { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm; MI->flat_insn->detail->arm64.op_count++; } } } } static void printHexImm(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); SStream_concat(O, "#%#llx", MCOperand_getImm(Op)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op); MI->flat_insn->detail->arm64.op_count++; } } static void printPostIncOperand(MCInst *MI, unsigned OpNo, unsigned Imm, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned Reg = MCOperand_getReg(Op); if (Reg == AArch64_XZR) { printInt32Bang(O, Imm); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm; MI->flat_insn->detail->arm64.op_count++; } } else { SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; MI->flat_insn->detail->arm64.op_count++; } } } //llvm_unreachable("unknown operand kind in printPostIncOperand64"); } static void printPostIncOperand2(MCInst *MI, unsigned OpNo, SStream *O, int Amount) { printPostIncOperand(MI, OpNo, Amount, O); } static void printVRegOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); //assert(Op.isReg() && "Non-register vreg operand!"); unsigned Reg = MCOperand_getReg(Op); SStream_concat0(O, getRegisterName(Reg, AArch64_vreg)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg); MI->flat_insn->detail->arm64.op_count++; } } static void printSysCROperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); //assert(Op.isImm() && "System instruction C[nm] operands must be immediates!"); SStream_concat(O, "c%u", MCOperand_getImm(Op)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op); MI->flat_insn->detail->arm64.op_count++; } } static void printAddSubImm(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); if (MCOperand_isImm(MO)) { unsigned Val = (MCOperand_getImm(MO) & 0xfff); //assert(Val == MO.getImm() && "Add/sub immediate out of range!"); unsigned Shift = AArch64_AM_getShiftValue((int)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1))); printInt32Bang(O, Val); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; MI->flat_insn->detail->arm64.op_count++; } if (Shift != 0) printShifter(MI, OpNum + 1, O); } } static void printLogicalImm32(MCInst *MI, unsigned OpNum, SStream *O) { int64_t Val = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); Val = AArch64_AM_decodeLogicalImmediate(Val, 32); printUInt32Bang(O, (int)Val); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; MI->flat_insn->detail->arm64.op_count++; } } static void printLogicalImm64(MCInst *MI, unsigned OpNum, SStream *O) { int64_t Val = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); Val = AArch64_AM_decodeLogicalImmediate(Val, 64); switch(MI->flat_insn->id) { default: printInt64Bang(O, Val); break; case ARM64_INS_ORR: case ARM64_INS_AND: case ARM64_INS_EOR: case ARM64_INS_TST: // do not print number in negative form if (Val >= 0 && Val <= HEX_THRESHOLD) SStream_concat(O, "#%u", (int)Val); else SStream_concat(O, "#0x%"PRIx64, Val); break; } if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int64_t)Val; MI->flat_insn->detail->arm64.op_count++; } } static void printShifter(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // LSL #0 should not be printed. if (AArch64_AM_getShiftType(Val) == AArch64_AM_LSL && AArch64_AM_getShiftValue(Val) == 0) return; SStream_concat(O, ", %s ", AArch64_AM_getShiftExtendName(AArch64_AM_getShiftType(Val))); printInt32BangDec(O, AArch64_AM_getShiftValue(Val)); if (MI->csh->detail) { arm64_shifter shifter = ARM64_SFT_INVALID; switch(AArch64_AM_getShiftType(Val)) { default: // never reach case AArch64_AM_LSL: shifter = ARM64_SFT_LSL; break; case AArch64_AM_LSR: shifter = ARM64_SFT_LSR; break; case AArch64_AM_ASR: shifter = ARM64_SFT_ASR; break; case AArch64_AM_ROR: shifter = ARM64_SFT_ROR; break; case AArch64_AM_MSL: shifter = ARM64_SFT_MSL; break; } MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = shifter; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = AArch64_AM_getShiftValue(Val); } } static void printShiftedRegister(MCInst *MI, unsigned OpNum, SStream *O) { SStream_concat0(O, getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAltName)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); MI->flat_insn->detail->arm64.op_count++; } printShifter(MI, OpNum + 1, O); } static void printArithExtend(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); AArch64_AM_ShiftExtendType ExtType = AArch64_AM_getArithExtendType(Val); unsigned ShiftVal = AArch64_AM_getArithShiftValue(Val); // If the destination or first source register operand is [W]SP, print // UXTW/UXTX as LSL, and if the shift amount is also zero, print nothing at // all. if (ExtType == AArch64_AM_UXTW || ExtType == AArch64_AM_UXTX) { unsigned Dest = MCOperand_getReg(MCInst_getOperand(MI, 0)); unsigned Src1 = MCOperand_getReg(MCInst_getOperand(MI, 1)); if ( ((Dest == AArch64_SP || Src1 == AArch64_SP) && ExtType == AArch64_AM_UXTX) || ((Dest == AArch64_WSP || Src1 == AArch64_WSP) && ExtType == AArch64_AM_UXTW) ) { if (ShiftVal != 0) { SStream_concat0(O, ", lsl "); printInt32Bang(O, ShiftVal); if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftVal; } } return; } } SStream_concat(O, ", %s", AArch64_AM_getShiftExtendName(ExtType)); if (MI->csh->detail) { arm64_extender ext = ARM64_EXT_INVALID; switch(ExtType) { default: // never reach case AArch64_AM_UXTB: ext = ARM64_EXT_UXTB; break; case AArch64_AM_UXTH: ext = ARM64_EXT_UXTH; break; case AArch64_AM_UXTW: ext = ARM64_EXT_UXTW; break; case AArch64_AM_UXTX: ext = ARM64_EXT_UXTX; break; case AArch64_AM_SXTB: ext = ARM64_EXT_SXTB; break; case AArch64_AM_SXTH: ext = ARM64_EXT_SXTH; break; case AArch64_AM_SXTW: ext = ARM64_EXT_SXTW; break; case AArch64_AM_SXTX: ext = ARM64_EXT_SXTX; break; } MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = ext; } if (ShiftVal != 0) { SStream_concat0(O, " "); printInt32Bang(O, ShiftVal); if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftVal; } } } static void printExtendedRegister(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName)); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; MI->flat_insn->detail->arm64.op_count++; } printArithExtend(MI, OpNum + 1, O); } static void printMemExtend(MCInst *MI, unsigned OpNum, SStream *O, char SrcRegKind, unsigned Width) { unsigned SignExtend = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); unsigned DoShift = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)); // sxtw, sxtx, uxtw or lsl (== uxtx) bool IsLSL = !SignExtend && SrcRegKind == 'x'; if (IsLSL) { SStream_concat0(O, "lsl"); if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SFT_LSL; } } else { SStream_concat(O, "%cxt%c", (SignExtend ? 's' : 'u'), SrcRegKind); if (MI->csh->detail) { if (!SignExtend) { switch(SrcRegKind) { default: break; case 'b': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTB; break; case 'h': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTH; break; case 'w': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTW; break; } } else { switch(SrcRegKind) { default: break; case 'b': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTB; break; case 'h': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTH; break; case 'w': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTW; break; case 'x': MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTX; break; } } } } if (DoShift || IsLSL) { SStream_concat(O, " #%u", Log2_32(Width / 8)); if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SFT_LSL; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.value = Log2_32(Width / 8); } } } static void printCondCode(MCInst *MI, unsigned OpNum, SStream *O) { A64CC_CondCode CC = (A64CC_CondCode)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat0(O, getCondCodeName(CC)); if (MI->csh->detail) MI->flat_insn->detail->arm64.cc = (arm64_cc)(CC + 1); } static void printInverseCondCode(MCInst *MI, unsigned OpNum, SStream *O) { A64CC_CondCode CC = (A64CC_CondCode)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat0(O, getCondCodeName(getInvertedCondCode(CC))); if (MI->csh->detail) { MI->flat_insn->detail->arm64.cc = (arm64_cc)(getInvertedCondCode(CC) + 1); } } static void printImmScale(MCInst *MI, unsigned OpNum, SStream *O, int Scale) { int64_t val = Scale * MCOperand_getImm(MCInst_getOperand(MI, OpNum)); printInt64Bang(O, val); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)val; } else { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = val; MI->flat_insn->detail->arm64.op_count++; } } } static void printUImm12Offset(MCInst *MI, unsigned OpNum, unsigned Scale, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); if (MCOperand_isImm(MO)) { int64_t val = Scale * MCOperand_getImm(MO); printInt64Bang(O, val); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)val; } else { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)val; MI->flat_insn->detail->arm64.op_count++; } } } } static void printUImm12Offset2(MCInst *MI, unsigned OpNum, SStream *O, int Scale) { printUImm12Offset(MI, OpNum, Scale, O); } static void printPrefetchOp(MCInst *MI, unsigned OpNum, SStream *O) { unsigned prfop = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); bool Valid; const char *Name = A64NamedImmMapper_toString(&A64PRFM_PRFMMapper, prfop, &Valid); if (Valid) { SStream_concat0(O, Name); if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PREFETCH; // we have to plus 1 to prfop because 0 is a valid value of prfop MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].prefetch = prfop + 1; MI->flat_insn->detail->arm64.op_count++; } } else { printInt32Bang(O, prfop); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = prfop; MI->flat_insn->detail->arm64.op_count++; } } } static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); double FPImm = MCOperand_isFPImm(MO) ? MCOperand_getFPImm(MO) : AArch64_AM_getFPImmFloat((int)MCOperand_getImm(MO)); // 8 decimal places are enough to perfectly represent permitted floats. #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point SStream_concat(O, "#"); #else SStream_concat(O, "#%.8f", FPImm); #endif if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = FPImm; MI->flat_insn->detail->arm64.op_count++; } } //static unsigned getNextVectorRegister(unsigned Reg, unsigned Stride = 1) static unsigned getNextVectorRegister(unsigned Reg, unsigned Stride) { while (Stride--) { switch (Reg) { default: // llvm_unreachable("Vector register expected!"); case AArch64_Q0: Reg = AArch64_Q1; break; case AArch64_Q1: Reg = AArch64_Q2; break; case AArch64_Q2: Reg = AArch64_Q3; break; case AArch64_Q3: Reg = AArch64_Q4; break; case AArch64_Q4: Reg = AArch64_Q5; break; case AArch64_Q5: Reg = AArch64_Q6; break; case AArch64_Q6: Reg = AArch64_Q7; break; case AArch64_Q7: Reg = AArch64_Q8; break; case AArch64_Q8: Reg = AArch64_Q9; break; case AArch64_Q9: Reg = AArch64_Q10; break; case AArch64_Q10: Reg = AArch64_Q11; break; case AArch64_Q11: Reg = AArch64_Q12; break; case AArch64_Q12: Reg = AArch64_Q13; break; case AArch64_Q13: Reg = AArch64_Q14; break; case AArch64_Q14: Reg = AArch64_Q15; break; case AArch64_Q15: Reg = AArch64_Q16; break; case AArch64_Q16: Reg = AArch64_Q17; break; case AArch64_Q17: Reg = AArch64_Q18; break; case AArch64_Q18: Reg = AArch64_Q19; break; case AArch64_Q19: Reg = AArch64_Q20; break; case AArch64_Q20: Reg = AArch64_Q21; break; case AArch64_Q21: Reg = AArch64_Q22; break; case AArch64_Q22: Reg = AArch64_Q23; break; case AArch64_Q23: Reg = AArch64_Q24; break; case AArch64_Q24: Reg = AArch64_Q25; break; case AArch64_Q25: Reg = AArch64_Q26; break; case AArch64_Q26: Reg = AArch64_Q27; break; case AArch64_Q27: Reg = AArch64_Q28; break; case AArch64_Q28: Reg = AArch64_Q29; break; case AArch64_Q29: Reg = AArch64_Q30; break; case AArch64_Q30: Reg = AArch64_Q31; break; // Vector lists can wrap around. case AArch64_Q31: Reg = AArch64_Q0; break; } } return Reg; } static void printVectorList(MCInst *MI, unsigned OpNum, SStream *O, char *LayoutSuffix, MCRegisterInfo *MRI, arm64_vas vas, arm64_vess vess) { #define GETREGCLASS_CONTAIN0(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), _reg) unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); unsigned NumRegs = 1, FirstReg, i; SStream_concat0(O, "{"); // Work out how many registers there are in the list (if there is an actual // list). if (GETREGCLASS_CONTAIN0(AArch64_DDRegClassID , Reg) || GETREGCLASS_CONTAIN0(AArch64_QQRegClassID, Reg)) NumRegs = 2; else if (GETREGCLASS_CONTAIN0(AArch64_DDDRegClassID, Reg) || GETREGCLASS_CONTAIN0(AArch64_QQQRegClassID, Reg)) NumRegs = 3; else if (GETREGCLASS_CONTAIN0(AArch64_DDDDRegClassID, Reg) || GETREGCLASS_CONTAIN0(AArch64_QQQQRegClassID, Reg)) NumRegs = 4; // Now forget about the list and find out what the first register is. if ((FirstReg = MCRegisterInfo_getSubReg(MRI, Reg, AArch64_dsub0))) Reg = FirstReg; else if ((FirstReg = MCRegisterInfo_getSubReg(MRI, Reg, AArch64_qsub0))) Reg = FirstReg; // If it's a D-reg, we need to promote it to the equivalent Q-reg before // printing (otherwise getRegisterName fails). if (GETREGCLASS_CONTAIN0(AArch64_FPR64RegClassID, Reg)) { const MCRegisterClass *FPR128RC = MCRegisterInfo_getRegClass(MRI, AArch64_FPR128RegClassID); Reg = MCRegisterInfo_getMatchingSuperReg(MRI, Reg, AArch64_dsub, FPR128RC); } for (i = 0; i < NumRegs; ++i, Reg = getNextVectorRegister(Reg, 1)) { SStream_concat(O, "%s%s", getRegisterName(Reg, AArch64_vreg), LayoutSuffix); if (i + 1 != NumRegs) SStream_concat0(O, ", "); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vas = vas; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vess = vess; MI->flat_insn->detail->arm64.op_count++; } } SStream_concat0(O, "}"); } static void printTypedVectorList(MCInst *MI, unsigned OpNum, SStream *O, unsigned NumLanes, char LaneKind, MCRegisterInfo *MRI) { char Suffix[32]; arm64_vas vas = 0; arm64_vess vess = 0; if (NumLanes) { cs_snprintf(Suffix, sizeof(Suffix), ".%u%c", NumLanes, LaneKind); switch(LaneKind) { default: break; case 'b': switch(NumLanes) { default: break; case 8: vas = ARM64_VAS_8B; break; case 16: vas = ARM64_VAS_16B; break; } break; case 'h': switch(NumLanes) { default: break; case 4: vas = ARM64_VAS_4H; break; case 8: vas = ARM64_VAS_8H; break; } break; case 's': switch(NumLanes) { default: break; case 2: vas = ARM64_VAS_2S; break; case 4: vas = ARM64_VAS_4S; break; } break; case 'd': switch(NumLanes) { default: break; case 1: vas = ARM64_VAS_1D; break; case 2: vas = ARM64_VAS_2D; break; } break; case 'q': switch(NumLanes) { default: break; case 1: vas = ARM64_VAS_1Q; break; } break; } } else { cs_snprintf(Suffix, sizeof(Suffix), ".%c", LaneKind); switch(LaneKind) { default: break; case 'b': vess = ARM64_VESS_B; break; case 'h': vess = ARM64_VESS_H; break; case 's': vess = ARM64_VESS_S; break; case 'd': vess = ARM64_VESS_D; break; } } printVectorList(MI, OpNum, O, Suffix, MRI, vas, vess); } static void printVectorIndex(MCInst *MI, unsigned OpNum, SStream *O) { SStream_concat0(O, "["); printInt32(O, (int)MCOperand_getImm(MCInst_getOperand(MI, OpNum))); SStream_concat0(O, "]"); if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vector_index = (int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); } } static void printAlignedLabel(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); // If the label has already been resolved to an immediate offset (say, when // we're running the disassembler), just print the immediate. if (MCOperand_isImm(Op)) { uint64_t imm = (MCOperand_getImm(Op) * 4) + MI->address; printUInt64Bang(O, imm); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm; MI->flat_insn->detail->arm64.op_count++; } return; } } static void printAdrpLabel(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); if (MCOperand_isImm(Op)) { // ADRP sign extends a 21-bit offset, shifts it left by 12 // and adds it to the value of the PC with its bottom 12 bits cleared uint64_t imm = (MCOperand_getImm(Op) * 0x1000) + (MI->address & ~0xfff); printUInt64Bang(O, imm); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm; MI->flat_insn->detail->arm64.op_count++; } return; } } static void printBarrierOption(MCInst *MI, unsigned OpNo, SStream *O) { unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); unsigned Opcode = MCInst_getOpcode(MI); bool Valid; const char *Name; if (Opcode == AArch64_ISB) Name = A64NamedImmMapper_toString(&A64ISB_ISBMapper, Val, &Valid); else Name = A64NamedImmMapper_toString(&A64DB_DBarrierMapper, Val, &Valid); if (Valid) { SStream_concat0(O, Name); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_BARRIER; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].barrier = Val; MI->flat_insn->detail->arm64.op_count++; } } else { printUInt32Bang(O, Val); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; MI->flat_insn->detail->arm64.op_count++; } } } static void printMRSSystemRegister(MCInst *MI, unsigned OpNo, SStream *O) { unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); char Name[128]; A64SysRegMapper_toString(&AArch64_MRSMapper, Val, Name); SStream_concat0(O, Name); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MRS; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val; MI->flat_insn->detail->arm64.op_count++; } } static void printMSRSystemRegister(MCInst *MI, unsigned OpNo, SStream *O) { unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); char Name[128]; A64SysRegMapper_toString(&AArch64_MSRMapper, Val, Name); SStream_concat0(O, Name); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MSR; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val; MI->flat_insn->detail->arm64.op_count++; } } static void printSystemPStateField(MCInst *MI, unsigned OpNo, SStream *O) { unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); bool Valid; const char *Name; Name = A64NamedImmMapper_toString(&A64PState_PStateMapper, Val, &Valid); if (Valid) { SStream_concat0(O, Name); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PSTATE; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].pstate = Val; MI->flat_insn->detail->arm64.op_count++; } } else { #ifndef CAPSTONE_DIET unsigned char access; #endif printInt32Bang(O, Val); #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; MI->flat_insn->detail->arm64.op_count++; } } static void printSIMDType10Operand(MCInst *MI, unsigned OpNo, SStream *O) { uint8_t RawVal = (uint8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); uint64_t Val = AArch64_AM_decodeAdvSIMDModImmType10(RawVal); SStream_concat(O, "#%#016llx", Val); if (MI->csh->detail) { #ifndef CAPSTONE_DIET unsigned char access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; MI->flat_insn->detail->arm64.op_count++; } } #define PRINT_ALIAS_INSTR #include "AArch64GenAsmWriter.inc" void AArch64_post_printer(csh handle, cs_insn *flat_insn, char *insn_asm, MCInst *mci) { if (((cs_struct *)handle)->detail != CS_OPT_ON) return; if (mci->csh->detail) { unsigned opcode = MCInst_getOpcode(mci); switch (opcode) { default: break; case AArch64_LD1Fourv16b_POST: case AArch64_LD1Fourv1d_POST: case AArch64_LD1Fourv2d_POST: case AArch64_LD1Fourv2s_POST: case AArch64_LD1Fourv4h_POST: case AArch64_LD1Fourv4s_POST: case AArch64_LD1Fourv8b_POST: case AArch64_LD1Fourv8h_POST: case AArch64_LD1Onev16b_POST: case AArch64_LD1Onev1d_POST: case AArch64_LD1Onev2d_POST: case AArch64_LD1Onev2s_POST: case AArch64_LD1Onev4h_POST: case AArch64_LD1Onev4s_POST: case AArch64_LD1Onev8b_POST: case AArch64_LD1Onev8h_POST: case AArch64_LD1Rv16b_POST: case AArch64_LD1Rv1d_POST: case AArch64_LD1Rv2d_POST: case AArch64_LD1Rv2s_POST: case AArch64_LD1Rv4h_POST: case AArch64_LD1Rv4s_POST: case AArch64_LD1Rv8b_POST: case AArch64_LD1Rv8h_POST: case AArch64_LD1Threev16b_POST: case AArch64_LD1Threev1d_POST: case AArch64_LD1Threev2d_POST: case AArch64_LD1Threev2s_POST: case AArch64_LD1Threev4h_POST: case AArch64_LD1Threev4s_POST: case AArch64_LD1Threev8b_POST: case AArch64_LD1Threev8h_POST: case AArch64_LD1Twov16b_POST: case AArch64_LD1Twov1d_POST: case AArch64_LD1Twov2d_POST: case AArch64_LD1Twov2s_POST: case AArch64_LD1Twov4h_POST: case AArch64_LD1Twov4s_POST: case AArch64_LD1Twov8b_POST: case AArch64_LD1Twov8h_POST: case AArch64_LD1i16_POST: case AArch64_LD1i32_POST: case AArch64_LD1i64_POST: case AArch64_LD1i8_POST: case AArch64_LD2Rv16b_POST: case AArch64_LD2Rv1d_POST: case AArch64_LD2Rv2d_POST: case AArch64_LD2Rv2s_POST: case AArch64_LD2Rv4h_POST: case AArch64_LD2Rv4s_POST: case AArch64_LD2Rv8b_POST: case AArch64_LD2Rv8h_POST: case AArch64_LD2Twov16b_POST: case AArch64_LD2Twov2d_POST: case AArch64_LD2Twov2s_POST: case AArch64_LD2Twov4h_POST: case AArch64_LD2Twov4s_POST: case AArch64_LD2Twov8b_POST: case AArch64_LD2Twov8h_POST: case AArch64_LD2i16_POST: case AArch64_LD2i32_POST: case AArch64_LD2i64_POST: case AArch64_LD2i8_POST: case AArch64_LD3Rv16b_POST: case AArch64_LD3Rv1d_POST: case AArch64_LD3Rv2d_POST: case AArch64_LD3Rv2s_POST: case AArch64_LD3Rv4h_POST: case AArch64_LD3Rv4s_POST: case AArch64_LD3Rv8b_POST: case AArch64_LD3Rv8h_POST: case AArch64_LD3Threev16b_POST: case AArch64_LD3Threev2d_POST: case AArch64_LD3Threev2s_POST: case AArch64_LD3Threev4h_POST: case AArch64_LD3Threev4s_POST: case AArch64_LD3Threev8b_POST: case AArch64_LD3Threev8h_POST: case AArch64_LD3i16_POST: case AArch64_LD3i32_POST: case AArch64_LD3i64_POST: case AArch64_LD3i8_POST: case AArch64_LD4Fourv16b_POST: case AArch64_LD4Fourv2d_POST: case AArch64_LD4Fourv2s_POST: case AArch64_LD4Fourv4h_POST: case AArch64_LD4Fourv4s_POST: case AArch64_LD4Fourv8b_POST: case AArch64_LD4Fourv8h_POST: case AArch64_LD4Rv16b_POST: case AArch64_LD4Rv1d_POST: case AArch64_LD4Rv2d_POST: case AArch64_LD4Rv2s_POST: case AArch64_LD4Rv4h_POST: case AArch64_LD4Rv4s_POST: case AArch64_LD4Rv8b_POST: case AArch64_LD4Rv8h_POST: case AArch64_LD4i16_POST: case AArch64_LD4i32_POST: case AArch64_LD4i64_POST: case AArch64_LD4i8_POST: case AArch64_LDPDpost: case AArch64_LDPDpre: case AArch64_LDPQpost: case AArch64_LDPQpre: case AArch64_LDPSWpost: case AArch64_LDPSWpre: case AArch64_LDPSpost: case AArch64_LDPSpre: case AArch64_LDPWpost: case AArch64_LDPWpre: case AArch64_LDPXpost: case AArch64_LDPXpre: case AArch64_LDRBBpost: case AArch64_LDRBBpre: case AArch64_LDRBpost: case AArch64_LDRBpre: case AArch64_LDRDpost: case AArch64_LDRDpre: case AArch64_LDRHHpost: case AArch64_LDRHHpre: case AArch64_LDRHpost: case AArch64_LDRHpre: case AArch64_LDRQpost: case AArch64_LDRQpre: case AArch64_LDRSBWpost: case AArch64_LDRSBWpre: case AArch64_LDRSBXpost: case AArch64_LDRSBXpre: case AArch64_LDRSHWpost: case AArch64_LDRSHWpre: case AArch64_LDRSHXpost: case AArch64_LDRSHXpre: case AArch64_LDRSWpost: case AArch64_LDRSWpre: case AArch64_LDRSpost: case AArch64_LDRSpre: case AArch64_LDRWpost: case AArch64_LDRWpre: case AArch64_LDRXpost: case AArch64_LDRXpre: case AArch64_ST1Fourv16b_POST: case AArch64_ST1Fourv1d_POST: case AArch64_ST1Fourv2d_POST: case AArch64_ST1Fourv2s_POST: case AArch64_ST1Fourv4h_POST: case AArch64_ST1Fourv4s_POST: case AArch64_ST1Fourv8b_POST: case AArch64_ST1Fourv8h_POST: case AArch64_ST1Onev16b_POST: case AArch64_ST1Onev1d_POST: case AArch64_ST1Onev2d_POST: case AArch64_ST1Onev2s_POST: case AArch64_ST1Onev4h_POST: case AArch64_ST1Onev4s_POST: case AArch64_ST1Onev8b_POST: case AArch64_ST1Onev8h_POST: case AArch64_ST1Threev16b_POST: case AArch64_ST1Threev1d_POST: case AArch64_ST1Threev2d_POST: case AArch64_ST1Threev2s_POST: case AArch64_ST1Threev4h_POST: case AArch64_ST1Threev4s_POST: case AArch64_ST1Threev8b_POST: case AArch64_ST1Threev8h_POST: case AArch64_ST1Twov16b_POST: case AArch64_ST1Twov1d_POST: case AArch64_ST1Twov2d_POST: case AArch64_ST1Twov2s_POST: case AArch64_ST1Twov4h_POST: case AArch64_ST1Twov4s_POST: case AArch64_ST1Twov8b_POST: case AArch64_ST1Twov8h_POST: case AArch64_ST1i16_POST: case AArch64_ST1i32_POST: case AArch64_ST1i64_POST: case AArch64_ST1i8_POST: case AArch64_ST2Twov16b_POST: case AArch64_ST2Twov2d_POST: case AArch64_ST2Twov2s_POST: case AArch64_ST2Twov4h_POST: case AArch64_ST2Twov4s_POST: case AArch64_ST2Twov8b_POST: case AArch64_ST2Twov8h_POST: case AArch64_ST2i16_POST: case AArch64_ST2i32_POST: case AArch64_ST2i64_POST: case AArch64_ST2i8_POST: case AArch64_ST3Threev16b_POST: case AArch64_ST3Threev2d_POST: case AArch64_ST3Threev2s_POST: case AArch64_ST3Threev4h_POST: case AArch64_ST3Threev4s_POST: case AArch64_ST3Threev8b_POST: case AArch64_ST3Threev8h_POST: case AArch64_ST3i16_POST: case AArch64_ST3i32_POST: case AArch64_ST3i64_POST: case AArch64_ST3i8_POST: case AArch64_ST4Fourv16b_POST: case AArch64_ST4Fourv2d_POST: case AArch64_ST4Fourv2s_POST: case AArch64_ST4Fourv4h_POST: case AArch64_ST4Fourv4s_POST: case AArch64_ST4Fourv8b_POST: case AArch64_ST4Fourv8h_POST: case AArch64_ST4i16_POST: case AArch64_ST4i32_POST: case AArch64_ST4i64_POST: case AArch64_ST4i8_POST: case AArch64_STPDpost: case AArch64_STPDpre: case AArch64_STPQpost: case AArch64_STPQpre: case AArch64_STPSpost: case AArch64_STPSpre: case AArch64_STPWpost: case AArch64_STPWpre: case AArch64_STPXpost: case AArch64_STPXpre: case AArch64_STRBBpost: case AArch64_STRBBpre: case AArch64_STRBpost: case AArch64_STRBpre: case AArch64_STRDpost: case AArch64_STRDpre: case AArch64_STRHHpost: case AArch64_STRHHpre: case AArch64_STRHpost: case AArch64_STRHpre: case AArch64_STRQpost: case AArch64_STRQpre: case AArch64_STRSpost: case AArch64_STRSpre: case AArch64_STRWpost: case AArch64_STRWpre: case AArch64_STRXpost: case AArch64_STRXpre: flat_insn->detail->arm64.writeback = true; break; } } } #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64InstPrinter.h010066400017500001750000000015701363402546700220450ustar0000000000000000//===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an AArch64 MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_AARCH64INSTPRINTER_H #define CS_LLVM_AARCH64INSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void AArch64_printInst(MCInst *MI, SStream *O, void *); void AArch64_post_printer(csh handle, cs_insn *pub_insn, char *insn_asm, MCInst *mci); #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64Mapping.c010066400017500001750000000767011363402546700211620ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_ARM64 #include // debug #include #include "../../utils.h" #include "AArch64Mapping.h" #define GET_INSTRINFO_ENUM #include "AArch64GenInstrInfo.inc" #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { ARM64_REG_INVALID, NULL }, { ARM64_REG_X29, "x29"}, { ARM64_REG_X30, "x30"}, { ARM64_REG_NZCV, "nzcv"}, { ARM64_REG_SP, "sp"}, { ARM64_REG_WSP, "wsp"}, { ARM64_REG_WZR, "wzr"}, { ARM64_REG_XZR, "xzr"}, { ARM64_REG_B0, "b0"}, { ARM64_REG_B1, "b1"}, { ARM64_REG_B2, "b2"}, { ARM64_REG_B3, "b3"}, { ARM64_REG_B4, "b4"}, { ARM64_REG_B5, "b5"}, { ARM64_REG_B6, "b6"}, { ARM64_REG_B7, "b7"}, { ARM64_REG_B8, "b8"}, { ARM64_REG_B9, "b9"}, { ARM64_REG_B10, "b10"}, { ARM64_REG_B11, "b11"}, { ARM64_REG_B12, "b12"}, { ARM64_REG_B13, "b13"}, { ARM64_REG_B14, "b14"}, { ARM64_REG_B15, "b15"}, { ARM64_REG_B16, "b16"}, { ARM64_REG_B17, "b17"}, { ARM64_REG_B18, "b18"}, { ARM64_REG_B19, "b19"}, { ARM64_REG_B20, "b20"}, { ARM64_REG_B21, "b21"}, { ARM64_REG_B22, "b22"}, { ARM64_REG_B23, "b23"}, { ARM64_REG_B24, "b24"}, { ARM64_REG_B25, "b25"}, { ARM64_REG_B26, "b26"}, { ARM64_REG_B27, "b27"}, { ARM64_REG_B28, "b28"}, { ARM64_REG_B29, "b29"}, { ARM64_REG_B30, "b30"}, { ARM64_REG_B31, "b31"}, { ARM64_REG_D0, "d0"}, { ARM64_REG_D1, "d1"}, { ARM64_REG_D2, "d2"}, { ARM64_REG_D3, "d3"}, { ARM64_REG_D4, "d4"}, { ARM64_REG_D5, "d5"}, { ARM64_REG_D6, "d6"}, { ARM64_REG_D7, "d7"}, { ARM64_REG_D8, "d8"}, { ARM64_REG_D9, "d9"}, { ARM64_REG_D10, "d10"}, { ARM64_REG_D11, "d11"}, { ARM64_REG_D12, "d12"}, { ARM64_REG_D13, "d13"}, { ARM64_REG_D14, "d14"}, { ARM64_REG_D15, "d15"}, { ARM64_REG_D16, "d16"}, { ARM64_REG_D17, "d17"}, { ARM64_REG_D18, "d18"}, { ARM64_REG_D19, "d19"}, { ARM64_REG_D20, "d20"}, { ARM64_REG_D21, "d21"}, { ARM64_REG_D22, "d22"}, { ARM64_REG_D23, "d23"}, { ARM64_REG_D24, "d24"}, { ARM64_REG_D25, "d25"}, { ARM64_REG_D26, "d26"}, { ARM64_REG_D27, "d27"}, { ARM64_REG_D28, "d28"}, { ARM64_REG_D29, "d29"}, { ARM64_REG_D30, "d30"}, { ARM64_REG_D31, "d31"}, { ARM64_REG_H0, "h0"}, { ARM64_REG_H1, "h1"}, { ARM64_REG_H2, "h2"}, { ARM64_REG_H3, "h3"}, { ARM64_REG_H4, "h4"}, { ARM64_REG_H5, "h5"}, { ARM64_REG_H6, "h6"}, { ARM64_REG_H7, "h7"}, { ARM64_REG_H8, "h8"}, { ARM64_REG_H9, "h9"}, { ARM64_REG_H10, "h10"}, { ARM64_REG_H11, "h11"}, { ARM64_REG_H12, "h12"}, { ARM64_REG_H13, "h13"}, { ARM64_REG_H14, "h14"}, { ARM64_REG_H15, "h15"}, { ARM64_REG_H16, "h16"}, { ARM64_REG_H17, "h17"}, { ARM64_REG_H18, "h18"}, { ARM64_REG_H19, "h19"}, { ARM64_REG_H20, "h20"}, { ARM64_REG_H21, "h21"}, { ARM64_REG_H22, "h22"}, { ARM64_REG_H23, "h23"}, { ARM64_REG_H24, "h24"}, { ARM64_REG_H25, "h25"}, { ARM64_REG_H26, "h26"}, { ARM64_REG_H27, "h27"}, { ARM64_REG_H28, "h28"}, { ARM64_REG_H29, "h29"}, { ARM64_REG_H30, "h30"}, { ARM64_REG_H31, "h31"}, { ARM64_REG_Q0, "q0"}, { ARM64_REG_Q1, "q1"}, { ARM64_REG_Q2, "q2"}, { ARM64_REG_Q3, "q3"}, { ARM64_REG_Q4, "q4"}, { ARM64_REG_Q5, "q5"}, { ARM64_REG_Q6, "q6"}, { ARM64_REG_Q7, "q7"}, { ARM64_REG_Q8, "q8"}, { ARM64_REG_Q9, "q9"}, { ARM64_REG_Q10, "q10"}, { ARM64_REG_Q11, "q11"}, { ARM64_REG_Q12, "q12"}, { ARM64_REG_Q13, "q13"}, { ARM64_REG_Q14, "q14"}, { ARM64_REG_Q15, "q15"}, { ARM64_REG_Q16, "q16"}, { ARM64_REG_Q17, "q17"}, { ARM64_REG_Q18, "q18"}, { ARM64_REG_Q19, "q19"}, { ARM64_REG_Q20, "q20"}, { ARM64_REG_Q21, "q21"}, { ARM64_REG_Q22, "q22"}, { ARM64_REG_Q23, "q23"}, { ARM64_REG_Q24, "q24"}, { ARM64_REG_Q25, "q25"}, { ARM64_REG_Q26, "q26"}, { ARM64_REG_Q27, "q27"}, { ARM64_REG_Q28, "q28"}, { ARM64_REG_Q29, "q29"}, { ARM64_REG_Q30, "q30"}, { ARM64_REG_Q31, "q31"}, { ARM64_REG_S0, "s0"}, { ARM64_REG_S1, "s1"}, { ARM64_REG_S2, "s2"}, { ARM64_REG_S3, "s3"}, { ARM64_REG_S4, "s4"}, { ARM64_REG_S5, "s5"}, { ARM64_REG_S6, "s6"}, { ARM64_REG_S7, "s7"}, { ARM64_REG_S8, "s8"}, { ARM64_REG_S9, "s9"}, { ARM64_REG_S10, "s10"}, { ARM64_REG_S11, "s11"}, { ARM64_REG_S12, "s12"}, { ARM64_REG_S13, "s13"}, { ARM64_REG_S14, "s14"}, { ARM64_REG_S15, "s15"}, { ARM64_REG_S16, "s16"}, { ARM64_REG_S17, "s17"}, { ARM64_REG_S18, "s18"}, { ARM64_REG_S19, "s19"}, { ARM64_REG_S20, "s20"}, { ARM64_REG_S21, "s21"}, { ARM64_REG_S22, "s22"}, { ARM64_REG_S23, "s23"}, { ARM64_REG_S24, "s24"}, { ARM64_REG_S25, "s25"}, { ARM64_REG_S26, "s26"}, { ARM64_REG_S27, "s27"}, { ARM64_REG_S28, "s28"}, { ARM64_REG_S29, "s29"}, { ARM64_REG_S30, "s30"}, { ARM64_REG_S31, "s31"}, { ARM64_REG_W0, "w0"}, { ARM64_REG_W1, "w1"}, { ARM64_REG_W2, "w2"}, { ARM64_REG_W3, "w3"}, { ARM64_REG_W4, "w4"}, { ARM64_REG_W5, "w5"}, { ARM64_REG_W6, "w6"}, { ARM64_REG_W7, "w7"}, { ARM64_REG_W8, "w8"}, { ARM64_REG_W9, "w9"}, { ARM64_REG_W10, "w10"}, { ARM64_REG_W11, "w11"}, { ARM64_REG_W12, "w12"}, { ARM64_REG_W13, "w13"}, { ARM64_REG_W14, "w14"}, { ARM64_REG_W15, "w15"}, { ARM64_REG_W16, "w16"}, { ARM64_REG_W17, "w17"}, { ARM64_REG_W18, "w18"}, { ARM64_REG_W19, "w19"}, { ARM64_REG_W20, "w20"}, { ARM64_REG_W21, "w21"}, { ARM64_REG_W22, "w22"}, { ARM64_REG_W23, "w23"}, { ARM64_REG_W24, "w24"}, { ARM64_REG_W25, "w25"}, { ARM64_REG_W26, "w26"}, { ARM64_REG_W27, "w27"}, { ARM64_REG_W28, "w28"}, { ARM64_REG_W29, "w29"}, { ARM64_REG_W30, "w30"}, { ARM64_REG_X0, "x0"}, { ARM64_REG_X1, "x1"}, { ARM64_REG_X2, "x2"}, { ARM64_REG_X3, "x3"}, { ARM64_REG_X4, "x4"}, { ARM64_REG_X5, "x5"}, { ARM64_REG_X6, "x6"}, { ARM64_REG_X7, "x7"}, { ARM64_REG_X8, "x8"}, { ARM64_REG_X9, "x9"}, { ARM64_REG_X10, "x10"}, { ARM64_REG_X11, "x11"}, { ARM64_REG_X12, "x12"}, { ARM64_REG_X13, "x13"}, { ARM64_REG_X14, "x14"}, { ARM64_REG_X15, "x15"}, { ARM64_REG_X16, "x16"}, { ARM64_REG_X17, "x17"}, { ARM64_REG_X18, "x18"}, { ARM64_REG_X19, "x19"}, { ARM64_REG_X20, "x20"}, { ARM64_REG_X21, "x21"}, { ARM64_REG_X22, "x22"}, { ARM64_REG_X23, "x23"}, { ARM64_REG_X24, "x24"}, { ARM64_REG_X25, "x25"}, { ARM64_REG_X26, "x26"}, { ARM64_REG_X27, "x27"}, { ARM64_REG_X28, "x28"}, { ARM64_REG_V0, "v0"}, { ARM64_REG_V1, "v1"}, { ARM64_REG_V2, "v2"}, { ARM64_REG_V3, "v3"}, { ARM64_REG_V4, "v4"}, { ARM64_REG_V5, "v5"}, { ARM64_REG_V6, "v6"}, { ARM64_REG_V7, "v7"}, { ARM64_REG_V8, "v8"}, { ARM64_REG_V9, "v9"}, { ARM64_REG_V10, "v10"}, { ARM64_REG_V11, "v11"}, { ARM64_REG_V12, "v12"}, { ARM64_REG_V13, "v13"}, { ARM64_REG_V14, "v14"}, { ARM64_REG_V15, "v15"}, { ARM64_REG_V16, "v16"}, { ARM64_REG_V17, "v17"}, { ARM64_REG_V18, "v18"}, { ARM64_REG_V19, "v19"}, { ARM64_REG_V20, "v20"}, { ARM64_REG_V21, "v21"}, { ARM64_REG_V22, "v22"}, { ARM64_REG_V23, "v23"}, { ARM64_REG_V24, "v24"}, { ARM64_REG_V25, "v25"}, { ARM64_REG_V26, "v26"}, { ARM64_REG_V27, "v27"}, { ARM64_REG_V28, "v28"}, { ARM64_REG_V29, "v29"}, { ARM64_REG_V30, "v30"}, { ARM64_REG_V31, "v31"}, }; #endif const char *AArch64_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } static const insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "AArch64MappingInsn.inc" }; // given internal insn id, return public instruction info void AArch64_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET cs_struct handle; handle.detail = h->detail; memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); insn->detail->arm64.update_flags = cs_reg_write((csh)&handle, insn, ARM64_REG_NZCV); #endif } } } static const name_map insn_name_maps[] = { { ARM64_INS_INVALID, NULL }, { ARM64_INS_ABS, "abs" }, { ARM64_INS_ADC, "adc" }, { ARM64_INS_ADDHN, "addhn" }, { ARM64_INS_ADDHN2, "addhn2" }, { ARM64_INS_ADDP, "addp" }, { ARM64_INS_ADD, "add" }, { ARM64_INS_ADDV, "addv" }, { ARM64_INS_ADR, "adr" }, { ARM64_INS_ADRP, "adrp" }, { ARM64_INS_AESD, "aesd" }, { ARM64_INS_AESE, "aese" }, { ARM64_INS_AESIMC, "aesimc" }, { ARM64_INS_AESMC, "aesmc" }, { ARM64_INS_AND, "and" }, { ARM64_INS_ASR, "asr" }, { ARM64_INS_B, "b" }, { ARM64_INS_BFM, "bfm" }, { ARM64_INS_BIC, "bic" }, { ARM64_INS_BIF, "bif" }, { ARM64_INS_BIT, "bit" }, { ARM64_INS_BL, "bl" }, { ARM64_INS_BLR, "blr" }, { ARM64_INS_BR, "br" }, { ARM64_INS_BRK, "brk" }, { ARM64_INS_BSL, "bsl" }, { ARM64_INS_CBNZ, "cbnz" }, { ARM64_INS_CBZ, "cbz" }, { ARM64_INS_CCMN, "ccmn" }, { ARM64_INS_CCMP, "ccmp" }, { ARM64_INS_CLREX, "clrex" }, { ARM64_INS_CLS, "cls" }, { ARM64_INS_CLZ, "clz" }, { ARM64_INS_CMEQ, "cmeq" }, { ARM64_INS_CMGE, "cmge" }, { ARM64_INS_CMGT, "cmgt" }, { ARM64_INS_CMHI, "cmhi" }, { ARM64_INS_CMHS, "cmhs" }, { ARM64_INS_CMLE, "cmle" }, { ARM64_INS_CMLT, "cmlt" }, { ARM64_INS_CMTST, "cmtst" }, { ARM64_INS_CNT, "cnt" }, { ARM64_INS_MOV, "mov" }, { ARM64_INS_CRC32B, "crc32b" }, { ARM64_INS_CRC32CB, "crc32cb" }, { ARM64_INS_CRC32CH, "crc32ch" }, { ARM64_INS_CRC32CW, "crc32cw" }, { ARM64_INS_CRC32CX, "crc32cx" }, { ARM64_INS_CRC32H, "crc32h" }, { ARM64_INS_CRC32W, "crc32w" }, { ARM64_INS_CRC32X, "crc32x" }, { ARM64_INS_CSEL, "csel" }, { ARM64_INS_CSINC, "csinc" }, { ARM64_INS_CSINV, "csinv" }, { ARM64_INS_CSNEG, "csneg" }, { ARM64_INS_DCPS1, "dcps1" }, { ARM64_INS_DCPS2, "dcps2" }, { ARM64_INS_DCPS3, "dcps3" }, { ARM64_INS_DMB, "dmb" }, { ARM64_INS_DRPS, "drps" }, { ARM64_INS_DSB, "dsb" }, { ARM64_INS_DUP, "dup" }, { ARM64_INS_EON, "eon" }, { ARM64_INS_EOR, "eor" }, { ARM64_INS_ERET, "eret" }, { ARM64_INS_EXTR, "extr" }, { ARM64_INS_EXT, "ext" }, { ARM64_INS_FABD, "fabd" }, { ARM64_INS_FABS, "fabs" }, { ARM64_INS_FACGE, "facge" }, { ARM64_INS_FACGT, "facgt" }, { ARM64_INS_FADD, "fadd" }, { ARM64_INS_FADDP, "faddp" }, { ARM64_INS_FCCMP, "fccmp" }, { ARM64_INS_FCCMPE, "fccmpe" }, { ARM64_INS_FCMEQ, "fcmeq" }, { ARM64_INS_FCMGE, "fcmge" }, { ARM64_INS_FCMGT, "fcmgt" }, { ARM64_INS_FCMLE, "fcmle" }, { ARM64_INS_FCMLT, "fcmlt" }, { ARM64_INS_FCMP, "fcmp" }, { ARM64_INS_FCMPE, "fcmpe" }, { ARM64_INS_FCSEL, "fcsel" }, { ARM64_INS_FCVTAS, "fcvtas" }, { ARM64_INS_FCVTAU, "fcvtau" }, { ARM64_INS_FCVT, "fcvt" }, { ARM64_INS_FCVTL, "fcvtl" }, { ARM64_INS_FCVTL2, "fcvtl2" }, { ARM64_INS_FCVTMS, "fcvtms" }, { ARM64_INS_FCVTMU, "fcvtmu" }, { ARM64_INS_FCVTNS, "fcvtns" }, { ARM64_INS_FCVTNU, "fcvtnu" }, { ARM64_INS_FCVTN, "fcvtn" }, { ARM64_INS_FCVTN2, "fcvtn2" }, { ARM64_INS_FCVTPS, "fcvtps" }, { ARM64_INS_FCVTPU, "fcvtpu" }, { ARM64_INS_FCVTXN, "fcvtxn" }, { ARM64_INS_FCVTXN2, "fcvtxn2" }, { ARM64_INS_FCVTZS, "fcvtzs" }, { ARM64_INS_FCVTZU, "fcvtzu" }, { ARM64_INS_FDIV, "fdiv" }, { ARM64_INS_FMADD, "fmadd" }, { ARM64_INS_FMAX, "fmax" }, { ARM64_INS_FMAXNM, "fmaxnm" }, { ARM64_INS_FMAXNMP, "fmaxnmp" }, { ARM64_INS_FMAXNMV, "fmaxnmv" }, { ARM64_INS_FMAXP, "fmaxp" }, { ARM64_INS_FMAXV, "fmaxv" }, { ARM64_INS_FMIN, "fmin" }, { ARM64_INS_FMINNM, "fminnm" }, { ARM64_INS_FMINNMP, "fminnmp" }, { ARM64_INS_FMINNMV, "fminnmv" }, { ARM64_INS_FMINP, "fminp" }, { ARM64_INS_FMINV, "fminv" }, { ARM64_INS_FMLA, "fmla" }, { ARM64_INS_FMLS, "fmls" }, { ARM64_INS_FMOV, "fmov" }, { ARM64_INS_FMSUB, "fmsub" }, { ARM64_INS_FMUL, "fmul" }, { ARM64_INS_FMULX, "fmulx" }, { ARM64_INS_FNEG, "fneg" }, { ARM64_INS_FNMADD, "fnmadd" }, { ARM64_INS_FNMSUB, "fnmsub" }, { ARM64_INS_FNMUL, "fnmul" }, { ARM64_INS_FRECPE, "frecpe" }, { ARM64_INS_FRECPS, "frecps" }, { ARM64_INS_FRECPX, "frecpx" }, { ARM64_INS_FRINTA, "frinta" }, { ARM64_INS_FRINTI, "frinti" }, { ARM64_INS_FRINTM, "frintm" }, { ARM64_INS_FRINTN, "frintn" }, { ARM64_INS_FRINTP, "frintp" }, { ARM64_INS_FRINTX, "frintx" }, { ARM64_INS_FRINTZ, "frintz" }, { ARM64_INS_FRSQRTE, "frsqrte" }, { ARM64_INS_FRSQRTS, "frsqrts" }, { ARM64_INS_FSQRT, "fsqrt" }, { ARM64_INS_FSUB, "fsub" }, { ARM64_INS_HINT, "hint" }, { ARM64_INS_HLT, "hlt" }, { ARM64_INS_HVC, "hvc" }, { ARM64_INS_INS, "ins" }, { ARM64_INS_ISB, "isb" }, { ARM64_INS_LD1, "ld1" }, { ARM64_INS_LD1R, "ld1r" }, { ARM64_INS_LD2R, "ld2r" }, { ARM64_INS_LD2, "ld2" }, { ARM64_INS_LD3R, "ld3r" }, { ARM64_INS_LD3, "ld3" }, { ARM64_INS_LD4, "ld4" }, { ARM64_INS_LD4R, "ld4r" }, { ARM64_INS_LDARB, "ldarb" }, { ARM64_INS_LDARH, "ldarh" }, { ARM64_INS_LDAR, "ldar" }, { ARM64_INS_LDAXP, "ldaxp" }, { ARM64_INS_LDAXRB, "ldaxrb" }, { ARM64_INS_LDAXRH, "ldaxrh" }, { ARM64_INS_LDAXR, "ldaxr" }, { ARM64_INS_LDNP, "ldnp" }, { ARM64_INS_LDP, "ldp" }, { ARM64_INS_LDPSW, "ldpsw" }, { ARM64_INS_LDRB, "ldrb" }, { ARM64_INS_LDR, "ldr" }, { ARM64_INS_LDRH, "ldrh" }, { ARM64_INS_LDRSB, "ldrsb" }, { ARM64_INS_LDRSH, "ldrsh" }, { ARM64_INS_LDRSW, "ldrsw" }, { ARM64_INS_LDTRB, "ldtrb" }, { ARM64_INS_LDTRH, "ldtrh" }, { ARM64_INS_LDTRSB, "ldtrsb" }, { ARM64_INS_LDTRSH, "ldtrsh" }, { ARM64_INS_LDTRSW, "ldtrsw" }, { ARM64_INS_LDTR, "ldtr" }, { ARM64_INS_LDURB, "ldurb" }, { ARM64_INS_LDUR, "ldur" }, { ARM64_INS_LDURH, "ldurh" }, { ARM64_INS_LDURSB, "ldursb" }, { ARM64_INS_LDURSH, "ldursh" }, { ARM64_INS_LDURSW, "ldursw" }, { ARM64_INS_LDXP, "ldxp" }, { ARM64_INS_LDXRB, "ldxrb" }, { ARM64_INS_LDXRH, "ldxrh" }, { ARM64_INS_LDXR, "ldxr" }, { ARM64_INS_LSL, "lsl" }, { ARM64_INS_LSR, "lsr" }, { ARM64_INS_MADD, "madd" }, { ARM64_INS_MLA, "mla" }, { ARM64_INS_MLS, "mls" }, { ARM64_INS_MOVI, "movi" }, { ARM64_INS_MOVK, "movk" }, { ARM64_INS_MOVN, "movn" }, { ARM64_INS_MOVZ, "movz" }, { ARM64_INS_MRS, "mrs" }, { ARM64_INS_MSR, "msr" }, { ARM64_INS_MSUB, "msub" }, { ARM64_INS_MUL, "mul" }, { ARM64_INS_MVNI, "mvni" }, { ARM64_INS_NEG, "neg" }, { ARM64_INS_NOT, "not" }, { ARM64_INS_ORN, "orn" }, { ARM64_INS_ORR, "orr" }, { ARM64_INS_PMULL2, "pmull2" }, { ARM64_INS_PMULL, "pmull" }, { ARM64_INS_PMUL, "pmul" }, { ARM64_INS_PRFM, "prfm" }, { ARM64_INS_PRFUM, "prfum" }, { ARM64_INS_RADDHN, "raddhn" }, { ARM64_INS_RADDHN2, "raddhn2" }, { ARM64_INS_RBIT, "rbit" }, { ARM64_INS_RET, "ret" }, { ARM64_INS_REV16, "rev16" }, { ARM64_INS_REV32, "rev32" }, { ARM64_INS_REV64, "rev64" }, { ARM64_INS_REV, "rev" }, { ARM64_INS_ROR, "ror" }, { ARM64_INS_RSHRN2, "rshrn2" }, { ARM64_INS_RSHRN, "rshrn" }, { ARM64_INS_RSUBHN, "rsubhn" }, { ARM64_INS_RSUBHN2, "rsubhn2" }, { ARM64_INS_SABAL2, "sabal2" }, { ARM64_INS_SABAL, "sabal" }, { ARM64_INS_SABA, "saba" }, { ARM64_INS_SABDL2, "sabdl2" }, { ARM64_INS_SABDL, "sabdl" }, { ARM64_INS_SABD, "sabd" }, { ARM64_INS_SADALP, "sadalp" }, { ARM64_INS_SADDLP, "saddlp" }, { ARM64_INS_SADDLV, "saddlv" }, { ARM64_INS_SADDL2, "saddl2" }, { ARM64_INS_SADDL, "saddl" }, { ARM64_INS_SADDW2, "saddw2" }, { ARM64_INS_SADDW, "saddw" }, { ARM64_INS_SBC, "sbc" }, { ARM64_INS_SBFM, "sbfm" }, { ARM64_INS_SCVTF, "scvtf" }, { ARM64_INS_SDIV, "sdiv" }, { ARM64_INS_SHA1C, "sha1c" }, { ARM64_INS_SHA1H, "sha1h" }, { ARM64_INS_SHA1M, "sha1m" }, { ARM64_INS_SHA1P, "sha1p" }, { ARM64_INS_SHA1SU0, "sha1su0" }, { ARM64_INS_SHA1SU1, "sha1su1" }, { ARM64_INS_SHA256H2, "sha256h2" }, { ARM64_INS_SHA256H, "sha256h" }, { ARM64_INS_SHA256SU0, "sha256su0" }, { ARM64_INS_SHA256SU1, "sha256su1" }, { ARM64_INS_SHADD, "shadd" }, { ARM64_INS_SHLL2, "shll2" }, { ARM64_INS_SHLL, "shll" }, { ARM64_INS_SHL, "shl" }, { ARM64_INS_SHRN2, "shrn2" }, { ARM64_INS_SHRN, "shrn" }, { ARM64_INS_SHSUB, "shsub" }, { ARM64_INS_SLI, "sli" }, { ARM64_INS_SMADDL, "smaddl" }, { ARM64_INS_SMAXP, "smaxp" }, { ARM64_INS_SMAXV, "smaxv" }, { ARM64_INS_SMAX, "smax" }, { ARM64_INS_SMC, "smc" }, { ARM64_INS_SMINP, "sminp" }, { ARM64_INS_SMINV, "sminv" }, { ARM64_INS_SMIN, "smin" }, { ARM64_INS_SMLAL2, "smlal2" }, { ARM64_INS_SMLAL, "smlal" }, { ARM64_INS_SMLSL2, "smlsl2" }, { ARM64_INS_SMLSL, "smlsl" }, { ARM64_INS_SMOV, "smov" }, { ARM64_INS_SMSUBL, "smsubl" }, { ARM64_INS_SMULH, "smulh" }, { ARM64_INS_SMULL2, "smull2" }, { ARM64_INS_SMULL, "smull" }, { ARM64_INS_SQABS, "sqabs" }, { ARM64_INS_SQADD, "sqadd" }, { ARM64_INS_SQDMLAL, "sqdmlal" }, { ARM64_INS_SQDMLAL2, "sqdmlal2" }, { ARM64_INS_SQDMLSL, "sqdmlsl" }, { ARM64_INS_SQDMLSL2, "sqdmlsl2" }, { ARM64_INS_SQDMULH, "sqdmulh" }, { ARM64_INS_SQDMULL, "sqdmull" }, { ARM64_INS_SQDMULL2, "sqdmull2" }, { ARM64_INS_SQNEG, "sqneg" }, { ARM64_INS_SQRDMULH, "sqrdmulh" }, { ARM64_INS_SQRSHL, "sqrshl" }, { ARM64_INS_SQRSHRN, "sqrshrn" }, { ARM64_INS_SQRSHRN2, "sqrshrn2" }, { ARM64_INS_SQRSHRUN, "sqrshrun" }, { ARM64_INS_SQRSHRUN2, "sqrshrun2" }, { ARM64_INS_SQSHLU, "sqshlu" }, { ARM64_INS_SQSHL, "sqshl" }, { ARM64_INS_SQSHRN, "sqshrn" }, { ARM64_INS_SQSHRN2, "sqshrn2" }, { ARM64_INS_SQSHRUN, "sqshrun" }, { ARM64_INS_SQSHRUN2, "sqshrun2" }, { ARM64_INS_SQSUB, "sqsub" }, { ARM64_INS_SQXTN2, "sqxtn2" }, { ARM64_INS_SQXTN, "sqxtn" }, { ARM64_INS_SQXTUN2, "sqxtun2" }, { ARM64_INS_SQXTUN, "sqxtun" }, { ARM64_INS_SRHADD, "srhadd" }, { ARM64_INS_SRI, "sri" }, { ARM64_INS_SRSHL, "srshl" }, { ARM64_INS_SRSHR, "srshr" }, { ARM64_INS_SRSRA, "srsra" }, { ARM64_INS_SSHLL2, "sshll2" }, { ARM64_INS_SSHLL, "sshll" }, { ARM64_INS_SSHL, "sshl" }, { ARM64_INS_SSHR, "sshr" }, { ARM64_INS_SSRA, "ssra" }, { ARM64_INS_SSUBL2, "ssubl2" }, { ARM64_INS_SSUBL, "ssubl" }, { ARM64_INS_SSUBW2, "ssubw2" }, { ARM64_INS_SSUBW, "ssubw" }, { ARM64_INS_ST1, "st1" }, { ARM64_INS_ST2, "st2" }, { ARM64_INS_ST3, "st3" }, { ARM64_INS_ST4, "st4" }, { ARM64_INS_STLRB, "stlrb" }, { ARM64_INS_STLRH, "stlrh" }, { ARM64_INS_STLR, "stlr" }, { ARM64_INS_STLXP, "stlxp" }, { ARM64_INS_STLXRB, "stlxrb" }, { ARM64_INS_STLXRH, "stlxrh" }, { ARM64_INS_STLXR, "stlxr" }, { ARM64_INS_STNP, "stnp" }, { ARM64_INS_STP, "stp" }, { ARM64_INS_STRB, "strb" }, { ARM64_INS_STR, "str" }, { ARM64_INS_STRH, "strh" }, { ARM64_INS_STTRB, "sttrb" }, { ARM64_INS_STTRH, "sttrh" }, { ARM64_INS_STTR, "sttr" }, { ARM64_INS_STURB, "sturb" }, { ARM64_INS_STUR, "stur" }, { ARM64_INS_STURH, "sturh" }, { ARM64_INS_STXP, "stxp" }, { ARM64_INS_STXRB, "stxrb" }, { ARM64_INS_STXRH, "stxrh" }, { ARM64_INS_STXR, "stxr" }, { ARM64_INS_SUBHN, "subhn" }, { ARM64_INS_SUBHN2, "subhn2" }, { ARM64_INS_SUB, "sub" }, { ARM64_INS_SUQADD, "suqadd" }, { ARM64_INS_SVC, "svc" }, { ARM64_INS_SYSL, "sysl" }, { ARM64_INS_SYS, "sys" }, { ARM64_INS_TBL, "tbl" }, { ARM64_INS_TBNZ, "tbnz" }, { ARM64_INS_TBX, "tbx" }, { ARM64_INS_TBZ, "tbz" }, { ARM64_INS_TRN1, "trn1" }, { ARM64_INS_TRN2, "trn2" }, { ARM64_INS_UABAL2, "uabal2" }, { ARM64_INS_UABAL, "uabal" }, { ARM64_INS_UABA, "uaba" }, { ARM64_INS_UABDL2, "uabdl2" }, { ARM64_INS_UABDL, "uabdl" }, { ARM64_INS_UABD, "uabd" }, { ARM64_INS_UADALP, "uadalp" }, { ARM64_INS_UADDLP, "uaddlp" }, { ARM64_INS_UADDLV, "uaddlv" }, { ARM64_INS_UADDL2, "uaddl2" }, { ARM64_INS_UADDL, "uaddl" }, { ARM64_INS_UADDW2, "uaddw2" }, { ARM64_INS_UADDW, "uaddw" }, { ARM64_INS_UBFM, "ubfm" }, { ARM64_INS_UCVTF, "ucvtf" }, { ARM64_INS_UDIV, "udiv" }, { ARM64_INS_UHADD, "uhadd" }, { ARM64_INS_UHSUB, "uhsub" }, { ARM64_INS_UMADDL, "umaddl" }, { ARM64_INS_UMAXP, "umaxp" }, { ARM64_INS_UMAXV, "umaxv" }, { ARM64_INS_UMAX, "umax" }, { ARM64_INS_UMINP, "uminp" }, { ARM64_INS_UMINV, "uminv" }, { ARM64_INS_UMIN, "umin" }, { ARM64_INS_UMLAL2, "umlal2" }, { ARM64_INS_UMLAL, "umlal" }, { ARM64_INS_UMLSL2, "umlsl2" }, { ARM64_INS_UMLSL, "umlsl" }, { ARM64_INS_UMOV, "umov" }, { ARM64_INS_UMSUBL, "umsubl" }, { ARM64_INS_UMULH, "umulh" }, { ARM64_INS_UMULL2, "umull2" }, { ARM64_INS_UMULL, "umull" }, { ARM64_INS_UQADD, "uqadd" }, { ARM64_INS_UQRSHL, "uqrshl" }, { ARM64_INS_UQRSHRN, "uqrshrn" }, { ARM64_INS_UQRSHRN2, "uqrshrn2" }, { ARM64_INS_UQSHL, "uqshl" }, { ARM64_INS_UQSHRN, "uqshrn" }, { ARM64_INS_UQSHRN2, "uqshrn2" }, { ARM64_INS_UQSUB, "uqsub" }, { ARM64_INS_UQXTN2, "uqxtn2" }, { ARM64_INS_UQXTN, "uqxtn" }, { ARM64_INS_URECPE, "urecpe" }, { ARM64_INS_URHADD, "urhadd" }, { ARM64_INS_URSHL, "urshl" }, { ARM64_INS_URSHR, "urshr" }, { ARM64_INS_URSQRTE, "ursqrte" }, { ARM64_INS_URSRA, "ursra" }, { ARM64_INS_USHLL2, "ushll2" }, { ARM64_INS_USHLL, "ushll" }, { ARM64_INS_USHL, "ushl" }, { ARM64_INS_USHR, "ushr" }, { ARM64_INS_USQADD, "usqadd" }, { ARM64_INS_USRA, "usra" }, { ARM64_INS_USUBL2, "usubl2" }, { ARM64_INS_USUBL, "usubl" }, { ARM64_INS_USUBW2, "usubw2" }, { ARM64_INS_USUBW, "usubw" }, { ARM64_INS_UZP1, "uzp1" }, { ARM64_INS_UZP2, "uzp2" }, { ARM64_INS_XTN2, "xtn2" }, { ARM64_INS_XTN, "xtn" }, { ARM64_INS_ZIP1, "zip1" }, { ARM64_INS_ZIP2, "zip2" }, }; // map *S & alias instructions back to original id static const name_map alias_insn_name_maps[] = { { ARM64_INS_ADC, "adcs" }, { ARM64_INS_AND, "ands" }, { ARM64_INS_ADD, "adds" }, { ARM64_INS_BIC, "bics" }, { ARM64_INS_SBC, "sbcs" }, { ARM64_INS_SUB, "subs" }, // alias insn { ARM64_INS_MNEG, "mneg" }, { ARM64_INS_UMNEGL, "umnegl" }, { ARM64_INS_SMNEGL, "smnegl" }, { ARM64_INS_NOP, "nop" }, { ARM64_INS_YIELD, "yield" }, { ARM64_INS_WFE, "wfe" }, { ARM64_INS_WFI, "wfi" }, { ARM64_INS_SEV, "sev" }, { ARM64_INS_SEVL, "sevl" }, { ARM64_INS_NGC, "ngc" }, { ARM64_INS_NGCS, "ngcs" }, { ARM64_INS_NEGS, "negs" }, { ARM64_INS_SBFIZ, "sbfiz" }, { ARM64_INS_UBFIZ, "ubfiz" }, { ARM64_INS_SBFX, "sbfx" }, { ARM64_INS_UBFX, "ubfx" }, { ARM64_INS_BFI, "bfi" }, { ARM64_INS_BFXIL, "bfxil" }, { ARM64_INS_CMN, "cmn" }, { ARM64_INS_MVN, "mvn" }, { ARM64_INS_TST, "tst" }, { ARM64_INS_CSET, "cset" }, { ARM64_INS_CINC, "cinc" }, { ARM64_INS_CSETM, "csetm" }, { ARM64_INS_CINV, "cinv" }, { ARM64_INS_CNEG, "cneg" }, { ARM64_INS_SXTB, "sxtb" }, { ARM64_INS_SXTH, "sxth" }, { ARM64_INS_SXTW, "sxtw" }, { ARM64_INS_CMP, "cmp" }, { ARM64_INS_UXTB, "uxtb" }, { ARM64_INS_UXTH, "uxth" }, { ARM64_INS_UXTW, "uxtw" }, { ARM64_INS_IC, "ic" }, { ARM64_INS_DC, "dc" }, { ARM64_INS_AT, "at" }, { ARM64_INS_TLBI, "tlbi" }, }; const char *AArch64_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET unsigned int i; if (id >= ARM64_INS_ENDING) return NULL; if (id < ARR_SIZE(insn_name_maps)) return insn_name_maps[id].name; // then find alias insn for (i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) { if (alias_insn_name_maps[i].id == id) return alias_insn_name_maps[i].name; } // not found return NULL; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { ARM64_GRP_INVALID, NULL }, { ARM64_GRP_JUMP, "jump" }, { ARM64_GRP_CALL, "call" }, { ARM64_GRP_RET, "return" }, { ARM64_GRP_PRIVILEGE, "privilege" }, { ARM64_GRP_INT, "int" }, { ARM64_GRP_BRANCH_RELATIVE, "branch_relative" }, // architecture-specific groups { ARM64_GRP_CRYPTO, "crypto" }, { ARM64_GRP_FPARMV8, "fparmv8" }, { ARM64_GRP_NEON, "neon" }, { ARM64_GRP_CRC, "crc" }, }; #endif const char *AArch64_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // map instruction name to public instruction ID arm64_reg AArch64_map_insn(const char *name) { // NOTE: skip first NULL name in insn_name_maps int i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); if (i == -1) // try again with 'special' insn that is not available in insn_name_maps i = name2id(alias_insn_name_maps, ARR_SIZE(alias_insn_name_maps), name); return (i != -1)? i : ARM64_REG_INVALID; } // map internal raw vregister to 'public' register arm64_reg AArch64_map_vregister(unsigned int r) { // for some reasons different Arm64 can map different register number to // the same register. this function handles the issue for exposing Mips // operands by mapping internal registers to 'public' register. static const unsigned int map[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, }; if (r < ARR_SIZE(map)) return map[r]; // cannot find this register return 0; } void arm64_op_addVectorArrSpecifier(MCInst * MI, int sp) { if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vas = sp; } } void arm64_op_addVectorElementSizeSpecifier(MCInst * MI, int sp) { if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vess = sp; } } void arm64_op_addFP(MCInst *MI, float fp) { if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = fp; MI->flat_insn->detail->arm64.op_count++; } } void arm64_op_addImm(MCInst *MI, int64_t imm) { if (MI->csh->detail) { MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)imm; MI->flat_insn->detail->arm64.op_count++; } } #ifndef CAPSTONE_DIET // map instruction to its characteristics typedef struct insn_op { unsigned int eflags_update; // how this instruction update status flags uint8_t access[5]; } insn_op; static insn_op insn_ops[] = { { /* NULL item */ 0, { 0 } }, #include "AArch64MappingInsnOp.inc" }; // given internal insn id, return operand access info uint8_t *AArch64_get_op_access(cs_struct *h, unsigned int id) { int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { return insn_ops[i].access; } return NULL; } void AArch64_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count) { uint8_t i; uint8_t read_count, write_count; cs_arm64 *arm64 = &(insn->detail->arm64); read_count = insn->detail->regs_read_count; write_count = insn->detail->regs_write_count; // implicit registers memcpy(regs_read, insn->detail->regs_read, read_count * sizeof(insn->detail->regs_read[0])); memcpy(regs_write, insn->detail->regs_write, write_count * sizeof(insn->detail->regs_write[0])); // explicit registers for (i = 0; i < arm64->op_count; i++) { cs_arm64_op *op = &(arm64->operands[i]); switch((int)op->type) { case ARM64_OP_REG: if ((op->access & CS_AC_READ) && !arr_exist(regs_read, read_count, op->reg)) { regs_read[read_count] = (uint16_t)op->reg; read_count++; } if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) { regs_write[write_count] = (uint16_t)op->reg; write_count++; } break; case ARM_OP_MEM: // registers appeared in memory references always being read if ((op->mem.base != ARM64_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.base)) { regs_read[read_count] = (uint16_t)op->mem.base; read_count++; } if ((op->mem.index != ARM64_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.index)) { regs_read[read_count] = (uint16_t)op->mem.index; read_count++; } if ((arm64->writeback) && (op->mem.base != ARM64_REG_INVALID) && !arr_exist(regs_write, write_count, op->mem.base)) { regs_write[write_count] = (uint16_t)op->mem.base; write_count++; } default: break; } } *regs_read_count = read_count; *regs_write_count = write_count; } #endif #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64Mapping.h010066400017500001750000000022551363402546700211600ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_ARM64_MAP_H #define CS_ARM64_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *AArch64_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void AArch64_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *AArch64_insn_name(csh handle, unsigned int id); const char *AArch64_group_name(csh handle, unsigned int id); // map instruction name to public instruction ID arm64_reg AArch64_map_insn(const char *name); // map internal vregister to public register arm64_reg AArch64_map_vregister(unsigned int r); void arm64_op_addReg(MCInst *MI, int reg); void arm64_op_addVectorArrSpecifier(MCInst * MI, int sp); void arm64_op_addVectorElementSizeSpecifier(MCInst * MI, int sp); void arm64_op_addFP(MCInst *MI, float fp); void arm64_op_addImm(MCInst *MI, int64_t imm); uint8_t *AArch64_get_op_access(cs_struct *h, unsigned int id); void AArch64_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count); #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64MappingInsn.inc010066400017500001750000010034421363402546700223320ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { AArch64_ABSv16i8, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv1i64, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv2i32, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv2i64, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv4i16, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv4i32, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv8i16, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ABSv8i8, ARM64_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADCSWr, ARM64_INS_ADC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADCSXr, ARM64_INS_ADC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADCWr, ARM64_INS_ADC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADCXr, ARM64_INS_ADC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv16i8, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv2i32, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv2i64, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv2i64p, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv4i16, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv4i32, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv8i16, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDPv8i8, ARM64_INS_ADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDSWri, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDSWrs, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDSWrx, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDSXri, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDSXrs, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDSXrx, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDSXrx64, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDVv16i8v, ARM64_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDVv4i16v, ARM64_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDVv4i32v, ARM64_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDVv8i16v, ARM64_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDVv8i8v, ARM64_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDWri, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDWrs, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDWrx, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDXri, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDXrs, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDXrx, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDXrx64, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADDv16i8, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv1i64, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv2i32, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv2i64, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv4i16, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv4i32, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv8i16, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADDv8i8, ARM64_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ADR, ARM64_INS_ADR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ADRP, ARM64_INS_ADRP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_AESDrr, ARM64_INS_AESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_AESErr, ARM64_INS_AESE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_AESIMCrr, ARM64_INS_AESIMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_AESMCrr, ARM64_INS_AESMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_ANDSWri, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDSWrs, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDSXri, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDSXrs, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDWri, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDWrs, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDXri, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDXrs, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ANDv16i8, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ANDv8i8, ARM64_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ASRVWr, ARM64_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ASRVXr, ARM64_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_B, ARM64_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_BFMWri, ARM64_INS_BFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_BFMXri, ARM64_INS_BFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_BICSWrs, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_BICSXrs, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_BICWrs, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_BICXrs, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_BICv16i8, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BICv2i32, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BICv4i16, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BICv4i32, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BICv8i16, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BICv8i8, ARM64_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BIFv16i8, ARM64_INS_BIF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BIFv8i8, ARM64_INS_BIF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BITv16i8, ARM64_INS_BIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BITv8i8, ARM64_INS_BIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BL, ARM64_INS_BL, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_LR, 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_BLR, ARM64_INS_BLR, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_LR, 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 1 #endif }, { AArch64_BR, ARM64_INS_BR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, 0 }, 1, 1 #endif }, { AArch64_BRK, ARM64_INS_BRK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_BSLv16i8, ARM64_INS_BSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_BSLv8i8, ARM64_INS_BSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_Bcc, ARM64_INS_B, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_CBNZW, ARM64_INS_CBNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_CBNZX, ARM64_INS_CBNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_CBZW, ARM64_INS_CBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_CBZX, ARM64_INS_CBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_CCMNWi, ARM64_INS_CCMN, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMNWr, ARM64_INS_CCMN, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMNXi, ARM64_INS_CCMN, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMNXr, ARM64_INS_CCMN, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMPWi, ARM64_INS_CCMP, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMPWr, ARM64_INS_CCMP, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMPXi, ARM64_INS_CCMP, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CCMPXr, ARM64_INS_CCMP, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_CLREX, ARM64_INS_CLREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CLSWr, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CLSXr, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CLSv16i8, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLSv2i32, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLSv4i16, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLSv4i32, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLSv8i16, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLSv8i8, ARM64_INS_CLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLZWr, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CLZXr, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CLZv16i8, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLZv2i32, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLZv4i16, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLZv4i32, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLZv8i16, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CLZv8i8, ARM64_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv16i8, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv16i8rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv1i64, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv1i64rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv2i32, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv2i32rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv2i64, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv2i64rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv4i16, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv4i16rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv4i32, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv4i32rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv8i16, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv8i16rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv8i8, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMEQv8i8rz, ARM64_INS_CMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv16i8, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv16i8rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv1i64, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv1i64rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv2i32, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv2i32rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv2i64, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv2i64rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv4i16, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv4i16rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv4i32, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv4i32rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv8i16, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv8i16rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv8i8, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGEv8i8rz, ARM64_INS_CMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv16i8, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv16i8rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv1i64, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv1i64rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv2i32, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv2i32rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv2i64, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv2i64rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv4i16, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv4i16rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv4i32, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv4i32rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv8i16, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv8i16rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv8i8, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMGTv8i8rz, ARM64_INS_CMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv16i8, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv1i64, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv2i32, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv2i64, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv4i16, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv4i32, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv8i16, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHIv8i8, ARM64_INS_CMHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv16i8, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv1i64, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv2i32, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv2i64, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv4i16, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv4i32, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv8i16, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMHSv8i8, ARM64_INS_CMHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv16i8rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv1i64rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv2i32rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv2i64rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv4i16rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv4i32rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv8i16rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLEv8i8rz, ARM64_INS_CMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv16i8rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv1i64rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv2i32rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv2i64rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv4i16rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv4i32rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv8i16rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMLTv8i8rz, ARM64_INS_CMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv16i8, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv1i64, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv2i32, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv2i64, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv4i16, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv4i32, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv8i16, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CMTSTv8i8, ARM64_INS_CMTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CNTv16i8, ARM64_INS_CNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CNTv8i8, ARM64_INS_CNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CPYi16, ARM64_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CPYi32, ARM64_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CPYi64, ARM64_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CPYi8, ARM64_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_CRC32Brr, ARM64_INS_CRC32B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32CBrr, ARM64_INS_CRC32CB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32CHrr, ARM64_INS_CRC32CH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32CWrr, ARM64_INS_CRC32CW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32CXrr, ARM64_INS_CRC32CX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32Hrr, ARM64_INS_CRC32H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32Wrr, ARM64_INS_CRC32W, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CRC32Xrr, ARM64_INS_CRC32X, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0 #endif }, { AArch64_CSELWr, ARM64_INS_CSEL, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSELXr, ARM64_INS_CSEL, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSINCWr, ARM64_INS_CSINC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSINCXr, ARM64_INS_CSINC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSINVWr, ARM64_INS_CSINV, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSINVXr, ARM64_INS_CSINV, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSNEGWr, ARM64_INS_CSNEG, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_CSNEGXr, ARM64_INS_CSNEG, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DCPS1, ARM64_INS_DCPS1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DCPS2, ARM64_INS_DCPS2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DCPS3, ARM64_INS_DCPS3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DMB, ARM64_INS_DMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DRPS, ARM64_INS_DRPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DSB, ARM64_INS_DSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_DUPv16i8gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv16i8lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv2i32gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv2i32lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv2i64gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv2i64lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv4i16gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv4i16lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv4i32gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv4i32lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv8i16gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv8i16lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv8i8gpr, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_DUPv8i8lane, ARM64_INS_DUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_EONWrs, ARM64_INS_EON, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EONXrs, ARM64_INS_EON, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EORWri, ARM64_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EORWrs, ARM64_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EORXri, ARM64_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EORXrs, ARM64_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EORv16i8, ARM64_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_EORv8i8, ARM64_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ERET, ARM64_INS_ERET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EXTRWrri, ARM64_INS_EXTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EXTRXrri, ARM64_INS_EXTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_EXTv16i8, ARM64_INS_EXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_EXTv8i8, ARM64_INS_EXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABD32, ARM64_INS_FABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABD64, ARM64_INS_FABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABDv2f32, ARM64_INS_FABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABDv2f64, ARM64_INS_FABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABDv4f32, ARM64_INS_FABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABSDr, ARM64_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FABSSr, ARM64_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FABSv2f32, ARM64_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABSv2f64, ARM64_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FABSv4f32, ARM64_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGE32, ARM64_INS_FACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGE64, ARM64_INS_FACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGEv2f32, ARM64_INS_FACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGEv2f64, ARM64_INS_FACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGEv4f32, ARM64_INS_FACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGT32, ARM64_INS_FACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGT64, ARM64_INS_FACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGTv2f32, ARM64_INS_FACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGTv2f64, ARM64_INS_FACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FACGTv4f32, ARM64_INS_FACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDDrr, ARM64_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FADDPv2f32, ARM64_INS_FADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDPv2f64, ARM64_INS_FADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDPv2i32p, ARM64_INS_FADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDPv2i64p, ARM64_INS_FADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDPv4f32, ARM64_INS_FADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDSrr, ARM64_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FADDv2f32, ARM64_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDv2f64, ARM64_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FADDv4f32, ARM64_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCCMPDrr, ARM64_INS_FCCMP, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCCMPEDrr, ARM64_INS_FCCMPE, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCCMPESrr, ARM64_INS_FCCMPE, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCCMPSrr, ARM64_INS_FCCMP, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMEQ32, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQ64, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv2f32, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv2f64, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv4f32, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGE32, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGE64, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv2f32, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv2f64, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv4f32, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGT32, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGT64, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv2f32, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv2f64, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv4f32, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCMPDri, ARM64_INS_FCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPDrr, ARM64_INS_FCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPEDri, ARM64_INS_FCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPEDrr, ARM64_INS_FCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPESri, ARM64_INS_FCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPESrr, ARM64_INS_FCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPSri, ARM64_INS_FCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCMPSrr, ARM64_INS_FCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCSELDrrr, ARM64_INS_FCSEL, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCSELSrrr, ARM64_INS_FCSEL, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTASUWDr, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTASUWSr, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTASUXDr, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTASUXSr, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTASv1i32, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTASv1i64, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTASv2f32, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTASv2f64, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTASv4f32, ARM64_INS_FCVTAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTDHr, ARM64_INS_FCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTDSr, ARM64_INS_FCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTHDr, ARM64_INS_FCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTHSr, ARM64_INS_FCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTLv2i32, ARM64_INS_FCVTL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTLv4i16, ARM64_INS_FCVTL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTLv4i32, ARM64_INS_FCVTL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTLv8i16, ARM64_INS_FCVTL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNv2i32, ARM64_INS_FCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNv4i16, ARM64_INS_FCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNv4i32, ARM64_INS_FCVTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTNv8i16, ARM64_INS_FCVTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTSDr, ARM64_INS_FCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTSHr, ARM64_INS_FCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSd, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSs, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUd, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUs, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FDIVDrr, ARM64_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FDIVSrr, ARM64_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FDIVv2f32, ARM64_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FDIVv2f64, ARM64_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FDIVv4f32, ARM64_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMADDDrrr, ARM64_INS_FMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMADDSrrr, ARM64_INS_FMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMAXDrr, ARM64_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMAXNMDrr, ARM64_INS_FMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMSrr, ARM64_INS_FMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXPv2f32, ARM64_INS_FMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXPv2f64, ARM64_INS_FMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXPv2i32p, ARM64_INS_FMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXPv2i64p, ARM64_INS_FMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXPv4f32, ARM64_INS_FMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXSrr, ARM64_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMAXVv4i32v, ARM64_INS_FMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXv2f32, ARM64_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXv2f64, ARM64_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMAXv4f32, ARM64_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINDrr, ARM64_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMINNMDrr, ARM64_INS_FMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMSrr, ARM64_INS_FMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMv2f32, ARM64_INS_FMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMv2f64, ARM64_INS_FMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINNMv4f32, ARM64_INS_FMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINPv2f32, ARM64_INS_FMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINPv2f64, ARM64_INS_FMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINPv2i32p, ARM64_INS_FMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINPv2i64p, ARM64_INS_FMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINPv4f32, ARM64_INS_FMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINSrr, ARM64_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMINVv4i32v, ARM64_INS_FMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINv2f32, ARM64_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINv2f64, ARM64_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMINv4f32, ARM64_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv2f32, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv2f64, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv4f32, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv2f32, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv2f64, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv4f32, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMOVDXHighr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVDXr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVDi, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVDr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVSWr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVSi, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVSr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVWSr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVXDHighr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVXDr, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMOVv2f32_ns, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMOVv2f64_ns, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMOVv4f32_ns, ARM64_INS_FMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMSUBDrrr, ARM64_INS_FMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMSUBSrrr, ARM64_INS_FMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMULDrr, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMULSrr, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FMULX32, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULX64, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv2f32, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv2f64, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv4f32, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv1i32_indexed, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv1i64_indexed, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv2f32, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv2f64, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv2i32_indexed, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv2i64_indexed, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv4f32, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FMULv4i32_indexed, ARM64_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FNEGDr, ARM64_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNEGSr, ARM64_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNEGv2f32, ARM64_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FNEGv2f64, ARM64_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FNEGv4f32, ARM64_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FNMADDDrrr, ARM64_INS_FNMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNMADDSrrr, ARM64_INS_FNMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNMULDrr, ARM64_INS_FNMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FNMULSrr, ARM64_INS_FNMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRECPEv1i32, ARM64_INS_FRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPEv1i64, ARM64_INS_FRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPEv2f32, ARM64_INS_FRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPEv2f64, ARM64_INS_FRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPEv4f32, ARM64_INS_FRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPS32, ARM64_INS_FRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPS64, ARM64_INS_FRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPSv2f32, ARM64_INS_FRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPSv2f64, ARM64_INS_FRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPSv4f32, ARM64_INS_FRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPXv1i32, ARM64_INS_FRECPX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRECPXv1i64, ARM64_INS_FRECPX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTADr, ARM64_INS_FRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTASr, ARM64_INS_FRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTAv2f32, ARM64_INS_FRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTAv2f64, ARM64_INS_FRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTAv4f32, ARM64_INS_FRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTIDr, ARM64_INS_FRINTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTISr, ARM64_INS_FRINTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTIv2f32, ARM64_INS_FRINTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTIv2f64, ARM64_INS_FRINTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTIv4f32, ARM64_INS_FRINTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTMDr, ARM64_INS_FRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTMSr, ARM64_INS_FRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTMv2f32, ARM64_INS_FRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTMv2f64, ARM64_INS_FRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTMv4f32, ARM64_INS_FRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTNDr, ARM64_INS_FRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTNSr, ARM64_INS_FRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTNv2f32, ARM64_INS_FRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTNv2f64, ARM64_INS_FRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTNv4f32, ARM64_INS_FRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTPDr, ARM64_INS_FRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTPSr, ARM64_INS_FRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTPv2f32, ARM64_INS_FRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTPv2f64, ARM64_INS_FRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTPv4f32, ARM64_INS_FRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTXDr, ARM64_INS_FRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTXSr, ARM64_INS_FRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTXv2f32, ARM64_INS_FRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTXv2f64, ARM64_INS_FRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTXv4f32, ARM64_INS_FRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTZDr, ARM64_INS_FRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTZSr, ARM64_INS_FRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FRINTZv2f32, ARM64_INS_FRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTZv2f64, ARM64_INS_FRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRINTZv4f32, ARM64_INS_FRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTS32, ARM64_INS_FRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTS64, ARM64_INS_FRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FSQRTDr, ARM64_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FSQRTSr, ARM64_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FSQRTv2f32, ARM64_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FSQRTv2f64, ARM64_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FSQRTv4f32, ARM64_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FSUBDrr, ARM64_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FSUBSrr, ARM64_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_FSUBv2f32, ARM64_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FSUBv2f64, ARM64_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_FSUBv4f32, ARM64_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_HINT, ARM64_INS_HINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_HLT, ARM64_INS_HLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_HVC, ARM64_INS_HVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_INSvi16gpr, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi16lane, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi32gpr, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi32lane, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi64gpr, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi64lane, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi8gpr, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_INSvi8lane, ARM64_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ISB, ARM64_INS_ISB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LD1Fourv16b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv16b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv1d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv1d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv2d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv2d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv2s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv2s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv4h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv4h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv4s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv4s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv8b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv8b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv8h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Fourv8h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev16b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev16b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev1d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev1d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev2d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev2d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev2s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev2s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev4h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev4h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev4s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev4s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev8b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev8b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev8h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Onev8h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv16b, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv16b_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv1d, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv1d_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv2d, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv2d_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv2s, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv2s_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv4h, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv4h_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv4s, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv4s_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv8b, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv8b_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv8h, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Rv8h_POST, ARM64_INS_LD1R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev16b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev16b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev1d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev1d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev2d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev2d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev2s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev2s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev4h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev4h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev4s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev4s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev8b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev8b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev8h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Threev8h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov16b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov16b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov1d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov1d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov2d, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov2d_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov2s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov2s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov4h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov4h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov4s, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov4s_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov8b, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov8b_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov8h, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1Twov8h_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i16, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i16_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i32, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i32_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i64, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i64_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i8, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD1i8_POST, ARM64_INS_LD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv16b, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv16b_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv1d, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv1d_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv2d, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv2d_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv2s, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv2s_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv4h, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv4h_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv4s, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv4s_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv8b, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv8b_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv8h, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Rv8h_POST, ARM64_INS_LD2R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov16b, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov16b_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov2d, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov2d_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov2s, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov2s_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov4h, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov4h_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov4s, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov4s_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov8b, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov8b_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov8h, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2Twov8h_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i16, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i16_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i32, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i32_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i64, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i64_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i8, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD2i8_POST, ARM64_INS_LD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv16b, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv16b_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv1d, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv1d_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv2d, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv2d_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv2s, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv2s_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv4h, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv4h_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv4s, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv4s_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv8b, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv8b_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv8h, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Rv8h_POST, ARM64_INS_LD3R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev16b, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev16b_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev2d, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev2d_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev2s, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev2s_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev4h, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev4h_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev4s, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev4s_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev8b, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev8b_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev8h, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3Threev8h_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i16, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i16_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i32, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i32_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i64, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i64_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i8, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD3i8_POST, ARM64_INS_LD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv16b, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv16b_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv2d, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv2d_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv2s, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv2s_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv4h, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv4h_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv4s, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv4s_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv8b, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv8b_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv8h, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Fourv8h_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv16b, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv16b_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv1d, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv1d_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv2d, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv2d_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv2s, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv2s_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv4h, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv4h_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv4s, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv4s_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv8b, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv8b_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv8h, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4Rv8h_POST, ARM64_INS_LD4R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i16, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i16_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i32, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i32_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i64, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i64_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i8, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LD4i8_POST, ARM64_INS_LD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_LDARB, ARM64_INS_LDARB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDARH, ARM64_INS_LDARH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDARW, ARM64_INS_LDAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDARX, ARM64_INS_LDAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDAXPW, ARM64_INS_LDAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDAXPX, ARM64_INS_LDAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDAXRB, ARM64_INS_LDAXRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDAXRH, ARM64_INS_LDAXRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDAXRW, ARM64_INS_LDAXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDAXRX, ARM64_INS_LDAXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDNPDi, ARM64_INS_LDNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDNPQi, ARM64_INS_LDNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDNPSi, ARM64_INS_LDNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDNPWi, ARM64_INS_LDNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDNPXi, ARM64_INS_LDNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPDi, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPDpost, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPDpre, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPQi, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPQpost, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPQpre, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPSWi, ARM64_INS_LDPSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPSWpost, ARM64_INS_LDPSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPSWpre, ARM64_INS_LDPSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPSi, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPSpost, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPSpre, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPWi, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPWpost, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPWpre, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPXi, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPXpost, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDPXpre, ARM64_INS_LDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBBpost, ARM64_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBBpre, ARM64_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBBroW, ARM64_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBBroX, ARM64_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBBui, ARM64_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRBui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRDl, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRDpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRDpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRDroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRDroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRDui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHHpost, ARM64_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHHpre, ARM64_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHHroW, ARM64_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHHroX, ARM64_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHHui, ARM64_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRHui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRQl, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRQpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRQpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRQroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRQroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRQui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBWpost, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBWpre, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBWroW, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBWroX, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBWui, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBXpost, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBXpre, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBXroW, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBXroX, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSBXui, ARM64_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHWpost, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHWpre, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHWroW, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHWroX, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHWui, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHXpost, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHXpre, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHXroW, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHXroX, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSHXui, ARM64_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSWl, ARM64_INS_LDRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSWpost, ARM64_INS_LDRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSWpre, ARM64_INS_LDRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSWroW, ARM64_INS_LDRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSWroX, ARM64_INS_LDRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSWui, ARM64_INS_LDRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSl, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRSui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRWl, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRWpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRWpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRWroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRWroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRWui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRXl, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRXpost, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRXpre, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRXroW, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRXroX, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDRXui, ARM64_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRBi, ARM64_INS_LDTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRHi, ARM64_INS_LDTRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRSBWi, ARM64_INS_LDTRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRSBXi, ARM64_INS_LDTRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRSHWi, ARM64_INS_LDTRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRSHXi, ARM64_INS_LDTRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRSWi, ARM64_INS_LDTRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRWi, ARM64_INS_LDTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDTRXi, ARM64_INS_LDTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURBBi, ARM64_INS_LDURB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURBi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURDi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURHHi, ARM64_INS_LDURH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURHi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURQi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURSBWi, ARM64_INS_LDURSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURSBXi, ARM64_INS_LDURSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURSHWi, ARM64_INS_LDURSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURSHXi, ARM64_INS_LDURSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURSWi, ARM64_INS_LDURSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURSi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURWi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDURXi, ARM64_INS_LDUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDXPW, ARM64_INS_LDXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDXPX, ARM64_INS_LDXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDXRB, ARM64_INS_LDXRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDXRH, ARM64_INS_LDXRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDXRW, ARM64_INS_LDXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LDXRX, ARM64_INS_LDXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LSLVWr, ARM64_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LSLVXr, ARM64_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LSRVWr, ARM64_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_LSRVXr, ARM64_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MADDWrrr, ARM64_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MADDXrrr, ARM64_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MLAv16i8, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv2i32, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv2i32_indexed, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv4i16, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv4i16_indexed, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv4i32, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv4i32_indexed, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv8i16, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv8i16_indexed, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLAv8i8, ARM64_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv16i8, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv2i32, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv2i32_indexed, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv4i16, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv4i16_indexed, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv4i32, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv4i32_indexed, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv8i16, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv8i16_indexed, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MLSv8i8, ARM64_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVID, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv16b_ns, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv2d_ns, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv2i32, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv2s_msl, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv4i16, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv4i32, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv4s_msl, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv8b_ns, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVIv8i16, ARM64_INS_MOVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MOVKWi, ARM64_INS_MOVK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MOVKXi, ARM64_INS_MOVK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MOVNWi, ARM64_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MOVNXi, ARM64_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MOVZWi, ARM64_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MOVZXi, ARM64_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MRS, ARM64_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { AArch64_MSR, ARM64_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { AArch64_MSRpstate, ARM64_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { AArch64_MSUBWrrr, ARM64_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MSUBXrrr, ARM64_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_MULv16i8, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv2i32, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv2i32_indexed, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv4i16, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv4i16_indexed, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv4i32, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv4i32_indexed, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv8i16, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv8i16_indexed, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MULv8i8, ARM64_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MVNIv2i32, ARM64_INS_MVNI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MVNIv2s_msl, ARM64_INS_MVNI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MVNIv4i16, ARM64_INS_MVNI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MVNIv4i32, ARM64_INS_MVNI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MVNIv4s_msl, ARM64_INS_MVNI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_MVNIv8i16, ARM64_INS_MVNI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv16i8, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv1i64, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv2i32, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv2i64, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv4i16, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv4i32, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv8i16, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NEGv8i8, ARM64_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NOTv16i8, ARM64_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_NOTv8i8, ARM64_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORNWrs, ARM64_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ORNXrs, ARM64_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ORNv16i8, ARM64_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORNv8i8, ARM64_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORRWri, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ORRWrs, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ORRXri, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ORRXrs, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_ORRv16i8, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORRv2i32, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORRv4i16, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORRv4i32, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORRv8i16, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ORRv8i8, ARM64_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_PMULLv16i8, ARM64_INS_PMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_PMULLv1i64, ARM64_INS_PMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_PMULLv2i64, ARM64_INS_PMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_PMULLv8i8, ARM64_INS_PMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_PMULv16i8, ARM64_INS_PMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_PMULv8i8, ARM64_INS_PMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_PRFMl, ARM64_INS_PRFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_PRFMroW, ARM64_INS_PRFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_PRFMroX, ARM64_INS_PRFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_PRFMui, ARM64_INS_PRFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_PRFUMi, ARM64_INS_PRFUM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RBITWr, ARM64_INS_RBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_RBITXr, ARM64_INS_RBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_RBITv16i8, ARM64_INS_RBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RBITv8i8, ARM64_INS_RBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RET, ARM64_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_RET, 0 }, 0, 0 #endif }, { AArch64_REV16Wr, ARM64_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_REV16Xr, ARM64_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_REV16v16i8, ARM64_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV16v8i8, ARM64_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV32Xr, ARM64_INS_REV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_REV32v16i8, ARM64_INS_REV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV32v4i16, ARM64_INS_REV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV32v8i16, ARM64_INS_REV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV32v8i8, ARM64_INS_REV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV64v16i8, ARM64_INS_REV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV64v2i32, ARM64_INS_REV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV64v4i16, ARM64_INS_REV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV64v4i32, ARM64_INS_REV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV64v8i16, ARM64_INS_REV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REV64v8i8, ARM64_INS_REV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_REVWr, ARM64_INS_REV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_REVXr, ARM64_INS_REV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_RORVWr, ARM64_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_RORVXr, ARM64_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABAv16i8, ARM64_INS_SABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABAv2i32, ARM64_INS_SABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABAv4i16, ARM64_INS_SABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABAv4i32, ARM64_INS_SABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABAv8i16, ARM64_INS_SABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABAv8i8, ARM64_INS_SABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDv16i8, ARM64_INS_SABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDv2i32, ARM64_INS_SABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDv4i16, ARM64_INS_SABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDv4i32, ARM64_INS_SABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDv8i16, ARM64_INS_SABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SABDv8i8, ARM64_INS_SABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLVv16i8v, ARM64_INS_SADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLVv4i16v, ARM64_INS_SADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLVv4i32v, ARM64_INS_SADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLVv8i16v, ARM64_INS_SADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLVv8i8v, ARM64_INS_SADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SBCSWr, ARM64_INS_SBC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SBCSXr, ARM64_INS_SBC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SBCWr, ARM64_INS_SBC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SBCXr, ARM64_INS_SBC, #ifndef CAPSTONE_DIET { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SBFMWri, ARM64_INS_SBFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SBFMXri, ARM64_INS_SBFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SCVTFSWDri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFSWSri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFSXDri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFSXSri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFUWDri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFUWSri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFUXDri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFUXSri, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_SCVTFd, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFs, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv1i32, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv1i64, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv2f32, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv2f64, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv4f32, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SDIVWr, ARM64_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SDIVXr, ARM64_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SDIV_IntWr, ARM64_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SDIV_IntXr, ARM64_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SHA1Crrr, ARM64_INS_SHA1C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA1Hrr, ARM64_INS_SHA1H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA1Mrrr, ARM64_INS_SHA1M, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA1Prrr, ARM64_INS_SHA1P, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA256H2rrr, ARM64_INS_SHA256H2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA256Hrrr, ARM64_INS_SHA256H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0 #endif }, { AArch64_SHADDv16i8, ARM64_INS_SHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHADDv2i32, ARM64_INS_SHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHADDv4i16, ARM64_INS_SHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHADDv4i32, ARM64_INS_SHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHADDv8i16, ARM64_INS_SHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHADDv8i8, ARM64_INS_SHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLLv16i8, ARM64_INS_SHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLLv2i32, ARM64_INS_SHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLLv4i16, ARM64_INS_SHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLLv4i32, ARM64_INS_SHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLLv8i16, ARM64_INS_SHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLLv8i8, ARM64_INS_SHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLd, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv16i8_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv2i32_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv2i64_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv4i16_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv4i32_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv8i16_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHLv8i8_shift, ARM64_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHRNv2i32_shift, ARM64_INS_SHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHRNv4i16_shift, ARM64_INS_SHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHRNv8i8_shift, ARM64_INS_SHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHSUBv16i8, ARM64_INS_SHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHSUBv2i32, ARM64_INS_SHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHSUBv4i16, ARM64_INS_SHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHSUBv4i32, ARM64_INS_SHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHSUBv8i16, ARM64_INS_SHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SHSUBv8i8, ARM64_INS_SHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLId, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv16i8_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv2i32_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv2i64_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv4i16_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv4i32_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv8i16_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SLIv8i8_shift, ARM64_INS_SLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMADDLrrr, ARM64_INS_SMADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SMAXPv16i8, ARM64_INS_SMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXPv2i32, ARM64_INS_SMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXPv4i16, ARM64_INS_SMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXPv4i32, ARM64_INS_SMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXPv8i16, ARM64_INS_SMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXPv8i8, ARM64_INS_SMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXVv16i8v, ARM64_INS_SMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXVv4i16v, ARM64_INS_SMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXVv4i32v, ARM64_INS_SMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXVv8i16v, ARM64_INS_SMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXVv8i8v, ARM64_INS_SMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXv16i8, ARM64_INS_SMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXv2i32, ARM64_INS_SMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXv4i16, ARM64_INS_SMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXv4i32, ARM64_INS_SMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXv8i16, ARM64_INS_SMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMAXv8i8, ARM64_INS_SMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMC, ARM64_INS_SMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SMINPv16i8, ARM64_INS_SMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINPv2i32, ARM64_INS_SMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINPv4i16, ARM64_INS_SMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINPv4i32, ARM64_INS_SMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINPv8i16, ARM64_INS_SMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINPv8i8, ARM64_INS_SMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINVv16i8v, ARM64_INS_SMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINVv4i16v, ARM64_INS_SMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINVv4i32v, ARM64_INS_SMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINVv8i16v, ARM64_INS_SMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINVv8i8v, ARM64_INS_SMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINv16i8, ARM64_INS_SMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINv2i32, ARM64_INS_SMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINv4i16, ARM64_INS_SMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINv4i32, ARM64_INS_SMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINv8i16, ARM64_INS_SMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMINv8i8, ARM64_INS_SMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMOVvi16to32, ARM64_INS_SMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMOVvi16to64, ARM64_INS_SMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMOVvi32to64, ARM64_INS_SMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMOVvi8to32, ARM64_INS_SMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMOVvi8to64, ARM64_INS_SMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMSUBLrrr, ARM64_INS_SMSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SMULHrr, ARM64_INS_SMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv16i8, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv1i16, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv1i32, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv1i64, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv1i8, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv2i32, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv2i64, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv4i16, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv4i32, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv8i16, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQABSv8i8, ARM64_INS_SQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv16i8, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv1i16, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv1i32, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv1i64, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv1i8, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv2i32, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv2i64, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv4i16, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv4i32, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv8i16, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQADDv8i8, ARM64_INS_SQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALi16, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALi32, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLi16, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLi32, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv16i8, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv1i16, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv1i32, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv1i64, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv1i8, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv2i32, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv2i64, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv4i16, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv4i32, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv8i16, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQNEGv8i8, ARM64_INS_SQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNb, ARM64_INS_SQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNh, ARM64_INS_SQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNs, ARM64_INS_SQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUb, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUd, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUh, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUs, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLb, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLd, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLh, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLs, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv16i8, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv1i16, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv1i32, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv1i64, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv1i8, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv2i32, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv2i64, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv4i16, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv4i32, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv8i16, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv8i8, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNb, ARM64_INS_SQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNh, ARM64_INS_SQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNs, ARM64_INS_SQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNb, ARM64_INS_SQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNh, ARM64_INS_SQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNs, ARM64_INS_SQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv16i8, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv1i16, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv1i32, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv1i64, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv1i8, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv2i32, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv2i64, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv4i16, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv4i32, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv8i16, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQSUBv8i8, ARM64_INS_SQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv16i8, ARM64_INS_SQXTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv1i16, ARM64_INS_SQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv1i32, ARM64_INS_SQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv1i8, ARM64_INS_SQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv2i32, ARM64_INS_SQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv4i16, ARM64_INS_SQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv4i32, ARM64_INS_SQXTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv8i16, ARM64_INS_SQXTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTNv8i8, ARM64_INS_SQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRHADDv16i8, ARM64_INS_SRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRHADDv2i32, ARM64_INS_SRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRHADDv4i16, ARM64_INS_SRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRHADDv4i32, ARM64_INS_SRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRHADDv8i16, ARM64_INS_SRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRHADDv8i8, ARM64_INS_SRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRId, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv16i8_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv2i32_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv2i64_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv4i16_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv4i32_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv8i16_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRIv8i8_shift, ARM64_INS_SRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv16i8, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv1i64, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv2i32, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv2i64, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv4i16, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv4i32, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv8i16, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHLv8i8, ARM64_INS_SRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRd, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAd, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv16i8, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv1i64, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv2i32, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv2i64, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv4i16, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv4i32, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv8i16, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHLv8i8, ARM64_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRd, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv16i8_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv2i32_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv2i64_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv4i16_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv4i32_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv8i16_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSHRv8i8_shift, ARM64_INS_SSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAd, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv16i8_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv2i32_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv2i64_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv4i16_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv4i32_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv8i16_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSRAv8i8_shift, ARM64_INS_SSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv16b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv16b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv1d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv1d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv2d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv2d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv2s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv2s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv4h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv4h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv4s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv4s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv8b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv8b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv8h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Fourv8h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev16b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev16b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev1d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev1d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev2d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev2d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev2s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev2s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev4h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev4h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev4s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev4s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev8b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev8b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev8h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Onev8h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev16b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev16b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev1d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev1d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev2d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev2d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev2s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev2s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev4h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev4h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev4s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev4s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev8b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev8b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev8h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Threev8h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov16b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov16b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov1d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov1d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov2d, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov2d_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov2s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov2s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov4h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov4h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov4s, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov4s_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov8b, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov8b_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov8h, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1Twov8h_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i16, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i16_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i32, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i32_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i64, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i64_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i8, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST1i8_POST, ARM64_INS_ST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov16b, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov16b_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov2d, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov2d_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov2s, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov2s_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov4h, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov4h_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov4s, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov4s_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov8b, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov8b_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov8h, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2Twov8h_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i16, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i16_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i32, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i32_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i64, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i64_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i8, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST2i8_POST, ARM64_INS_ST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev16b, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev16b_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev2d, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev2d_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev2s, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev2s_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev4h, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev4h_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev4s, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev4s_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev8b, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev8b_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev8h, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3Threev8h_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i16, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i16_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i32, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i32_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i64, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i64_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i8, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST3i8_POST, ARM64_INS_ST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv16b, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv16b_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv2d, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv2d_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv2s, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv2s_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv4h, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv4h_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv4s, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv4s_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv8b, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv8b_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv8h, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4Fourv8h_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i16, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i16_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i32, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i32_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i64, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i64_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i8, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ST4i8_POST, ARM64_INS_ST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_STLRB, ARM64_INS_STLRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLRH, ARM64_INS_STLRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLRW, ARM64_INS_STLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLRX, ARM64_INS_STLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLXPW, ARM64_INS_STLXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLXPX, ARM64_INS_STLXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLXRB, ARM64_INS_STLXRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLXRH, ARM64_INS_STLXRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLXRW, ARM64_INS_STLXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STLXRX, ARM64_INS_STLXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STNPDi, ARM64_INS_STNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STNPQi, ARM64_INS_STNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STNPSi, ARM64_INS_STNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STNPWi, ARM64_INS_STNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STNPXi, ARM64_INS_STNP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPDi, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPDpost, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPDpre, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPQi, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPQpost, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPQpre, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPSi, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPSpost, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPSpre, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPWi, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPWpost, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPWpre, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPXi, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPXpost, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STPXpre, ARM64_INS_STP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBBpost, ARM64_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBBpre, ARM64_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBBroW, ARM64_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBBroX, ARM64_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBBui, ARM64_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRBui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRDpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRDpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRDroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRDroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRDui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHHpost, ARM64_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHHpre, ARM64_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHHroW, ARM64_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHHroX, ARM64_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHHui, ARM64_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRHui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRQpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRQpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRQroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRQroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRQui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRSpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRSpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRSroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRSroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRSui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRWpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRWpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRWroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRWroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRWui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRXpost, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRXpre, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRXroW, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRXroX, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STRXui, ARM64_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STTRBi, ARM64_INS_STTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STTRHi, ARM64_INS_STTRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STTRWi, ARM64_INS_STTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STTRXi, ARM64_INS_STTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURBBi, ARM64_INS_STURB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURBi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURDi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURHHi, ARM64_INS_STURH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURHi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURQi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURSi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURWi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STURXi, ARM64_INS_STUR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STXPW, ARM64_INS_STXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STXPX, ARM64_INS_STXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STXRB, ARM64_INS_STXRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STXRH, ARM64_INS_STXRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STXRW, ARM64_INS_STXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_STXRX, ARM64_INS_STXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBSWri, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBSWrs, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBSWrx, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBSXri, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBSXrs, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBSXrx, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBSXrx64, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBWri, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBWrs, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBWrx, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBXri, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBXrs, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBXrx, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBXrx64, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SUBv16i8, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv1i64, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv2i32, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv2i64, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv4i16, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv4i32, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv8i16, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUBv8i8, ARM64_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv16i8, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv1i16, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv1i32, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv1i64, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv1i8, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv2i32, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv2i64, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv4i16, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv4i32, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv8i16, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SUQADDv8i8, ARM64_INS_SUQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_SVC, ARM64_INS_SVC, #ifndef CAPSTONE_DIET { 0, 0 }, { ARM64_REG_LR, 0 }, { ARM64_GRP_INT, 0 }, 0, 0 #endif }, { AArch64_SYSLxt, ARM64_INS_SYSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_SYSxt, ARM64_INS_SYS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_TBLv16i8Four, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv16i8One, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv16i8Three, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv16i8Two, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv8i8Four, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv8i8One, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv8i8Three, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBLv8i8Two, ARM64_INS_TBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBNZW, ARM64_INS_TBNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_TBNZX, ARM64_INS_TBNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_TBXv16i8Four, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv16i8One, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv16i8Three, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv16i8Two, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv8i8Four, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv8i8One, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv8i8Three, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBXv8i8Two, ARM64_INS_TBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TBZW, ARM64_INS_TBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_TBZX, ARM64_INS_TBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_JUMP, ARM64_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { AArch64_TRN1v16i8, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN1v2i32, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN1v2i64, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN1v4i16, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN1v4i32, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN1v8i16, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN1v8i8, ARM64_INS_TRN1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v16i8, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v2i32, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v2i64, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v4i16, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v4i32, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v8i16, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_TRN2v8i8, ARM64_INS_TRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABAv16i8, ARM64_INS_UABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABAv2i32, ARM64_INS_UABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABAv4i16, ARM64_INS_UABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABAv4i32, ARM64_INS_UABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABAv8i16, ARM64_INS_UABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABAv8i8, ARM64_INS_UABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDv16i8, ARM64_INS_UABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDv2i32, ARM64_INS_UABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDv4i16, ARM64_INS_UABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDv4i32, ARM64_INS_UABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDv8i16, ARM64_INS_UABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UABDv8i8, ARM64_INS_UABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLVv16i8v, ARM64_INS_UADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLVv4i16v, ARM64_INS_UADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLVv4i32v, ARM64_INS_UADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLVv8i16v, ARM64_INS_UADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLVv8i8v, ARM64_INS_UADDLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UBFMWri, ARM64_INS_UBFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UBFMXri, ARM64_INS_UBFM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UCVTFSWDri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFSWSri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFSXDri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFSXSri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFUWDri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFUWSri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFUXDri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFUXSri, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0 #endif }, { AArch64_UCVTFd, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFs, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv1i32, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv1i64, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv2f32, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv2f64, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv4f32, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UDIVWr, ARM64_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UDIVXr, ARM64_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UDIV_IntWr, ARM64_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UDIV_IntXr, ARM64_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UHADDv16i8, ARM64_INS_UHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHADDv2i32, ARM64_INS_UHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHADDv4i16, ARM64_INS_UHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHADDv4i32, ARM64_INS_UHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHADDv8i16, ARM64_INS_UHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHADDv8i8, ARM64_INS_UHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHSUBv16i8, ARM64_INS_UHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHSUBv2i32, ARM64_INS_UHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHSUBv4i16, ARM64_INS_UHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHSUBv4i32, ARM64_INS_UHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHSUBv8i16, ARM64_INS_UHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UHSUBv8i8, ARM64_INS_UHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMADDLrrr, ARM64_INS_UMADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UMAXPv16i8, ARM64_INS_UMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXPv2i32, ARM64_INS_UMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXPv4i16, ARM64_INS_UMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXPv4i32, ARM64_INS_UMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXPv8i16, ARM64_INS_UMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXPv8i8, ARM64_INS_UMAXP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXVv16i8v, ARM64_INS_UMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXVv4i16v, ARM64_INS_UMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXVv4i32v, ARM64_INS_UMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXVv8i16v, ARM64_INS_UMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXVv8i8v, ARM64_INS_UMAXV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXv16i8, ARM64_INS_UMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXv2i32, ARM64_INS_UMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXv4i16, ARM64_INS_UMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXv4i32, ARM64_INS_UMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXv8i16, ARM64_INS_UMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMAXv8i8, ARM64_INS_UMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINPv16i8, ARM64_INS_UMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINPv2i32, ARM64_INS_UMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINPv4i16, ARM64_INS_UMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINPv4i32, ARM64_INS_UMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINPv8i16, ARM64_INS_UMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINPv8i8, ARM64_INS_UMINP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINVv16i8v, ARM64_INS_UMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINVv4i16v, ARM64_INS_UMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINVv4i32v, ARM64_INS_UMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINVv8i16v, ARM64_INS_UMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINVv8i8v, ARM64_INS_UMINV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINv16i8, ARM64_INS_UMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINv2i32, ARM64_INS_UMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINv4i16, ARM64_INS_UMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINv4i32, ARM64_INS_UMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINv8i16, ARM64_INS_UMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMINv8i8, ARM64_INS_UMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMOVvi16, ARM64_INS_UMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMOVvi32, ARM64_INS_UMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMOVvi64, ARM64_INS_UMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMOVvi8, ARM64_INS_UMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMSUBLrrr, ARM64_INS_UMSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UMULHrr, ARM64_INS_UMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv16i8, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv1i16, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv1i32, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv1i64, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv1i8, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv2i32, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv2i64, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv4i16, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv4i32, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv8i16, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQADDv8i8, ARM64_INS_UQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNb, ARM64_INS_UQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNh, ARM64_INS_UQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNs, ARM64_INS_UQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLb, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLd, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLh, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLs, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv16i8, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv1i16, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv1i32, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv1i64, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv1i8, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv2i32, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv2i64, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv4i16, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv4i32, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv8i16, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv8i8, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNb, ARM64_INS_UQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNh, ARM64_INS_UQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNs, ARM64_INS_UQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv16i8, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv1i16, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv1i32, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv1i64, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv1i8, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv2i32, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv2i64, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv4i16, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv4i32, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv8i16, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQSUBv8i8, ARM64_INS_UQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv16i8, ARM64_INS_UQXTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv1i16, ARM64_INS_UQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv1i32, ARM64_INS_UQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv1i8, ARM64_INS_UQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv2i32, ARM64_INS_UQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv4i16, ARM64_INS_UQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv4i32, ARM64_INS_UQXTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv8i16, ARM64_INS_UQXTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UQXTNv8i8, ARM64_INS_UQXTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URECPEv2i32, ARM64_INS_URECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URECPEv4i32, ARM64_INS_URECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URHADDv16i8, ARM64_INS_URHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URHADDv2i32, ARM64_INS_URHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URHADDv4i16, ARM64_INS_URHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URHADDv4i32, ARM64_INS_URHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URHADDv8i16, ARM64_INS_URHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URHADDv8i8, ARM64_INS_URHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv16i8, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv1i64, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv2i32, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv2i64, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv4i16, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv4i32, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv8i16, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHLv8i8, ARM64_INS_URSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRd, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv16i8_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv2i32_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv2i64_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv4i16_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv4i32_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv8i16_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSHRv8i8_shift, ARM64_INS_URSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAd, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv16i8_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv2i32_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv2i64_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv4i16_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv4i32_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv8i16_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_URSRAv8i8_shift, ARM64_INS_URSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLLv2i32_shift, ARM64_INS_USHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLLv4i16_shift, ARM64_INS_USHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLLv8i8_shift, ARM64_INS_USHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv16i8, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv1i64, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv2i32, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv2i64, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv4i16, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv4i32, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv8i16, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHLv8i8, ARM64_INS_USHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRd, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv16i8_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv2i32_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv2i64_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv4i16_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv4i32_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv8i16_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USHRv8i8_shift, ARM64_INS_USHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv16i8, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv1i16, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv1i32, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv1i64, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv1i8, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv2i32, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv2i64, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv4i16, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv4i32, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv8i16, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USQADDv8i8, ARM64_INS_USQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAd, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv16i8_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv2i32_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv2i64_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv4i16_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv4i32_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv8i16_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USRAv8i8_shift, ARM64_INS_USRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v16i8, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v2i32, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v2i64, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v4i16, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v4i32, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v8i16, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP1v8i8, ARM64_INS_UZP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v16i8, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v2i32, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v2i64, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v4i16, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v4i32, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v8i16, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_UZP2v8i8, ARM64_INS_UZP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_XTNv16i8, ARM64_INS_XTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_XTNv2i32, ARM64_INS_XTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_XTNv4i16, ARM64_INS_XTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_XTNv4i32, ARM64_INS_XTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_XTNv8i16, ARM64_INS_XTN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_XTNv8i8, ARM64_INS_XTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v16i8, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v2i32, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v2i64, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v4i16, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v4i32, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v8i16, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP1v8i8, ARM64_INS_ZIP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v16i8, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v2i32, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v2i64, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v4i16, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v4i32, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v8i16, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, { AArch64_ZIP2v8i8, ARM64_INS_ZIP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/AArch64/AArch64MappingInsnOp.inc010066400017500001750000011011031363402546700226220ustar0000000000000000{ /* AArch64_ABSv16i8, ARM64_INS_ABS: abs.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv1i64, ARM64_INS_ABS: abs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv2i32, ARM64_INS_ABS: abs.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv2i64, ARM64_INS_ABS: abs.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv4i16, ARM64_INS_ABS: abs.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv4i32, ARM64_INS_ABS: abs.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv8i16, ARM64_INS_ABS: abs.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ABSv8i8, ARM64_INS_ABS: abs.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADCSWr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADCSXr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADCWr, ARM64_INS_ADC: adc $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADCXr, ARM64_INS_ADC: adc $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN: addhn.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2: addhn2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN: addhn.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2: addhn2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2: addhn2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN: addhn.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv16i8, ARM64_INS_ADDP: addp.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv2i32, ARM64_INS_ADDP: addp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv2i64, ARM64_INS_ADDP: addp.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv2i64p, ARM64_INS_ADDP: addp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADDPv4i16, ARM64_INS_ADDP: addp.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv4i32, ARM64_INS_ADDP: addp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv8i16, ARM64_INS_ADDP: addp.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDPv8i8, ARM64_INS_ADDP: addp.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDSWri, ARM64_INS_ADDS: adds $rd, $rn, $imm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ,0 } }, { /* AArch64_ADDSWrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDSWrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDSXri, ARM64_INS_ADDS: adds $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDSXrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDSXrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDSXrx64, ARM64_INS_ADDS: adds $rd, $rn, $rm$ext */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDVv16i8v, ARM64_INS_ADDV: addv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADDVv4i16v, ARM64_INS_ADDV: addv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADDVv4i32v, ARM64_INS_ADDV: addv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADDVv8i16v, ARM64_INS_ADDV: addv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADDVv8i8v, ARM64_INS_ADDV: addv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADDWri, ARM64_INS_ADD: add $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDWrs, ARM64_INS_ADD: add $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDWrx, ARM64_INS_ADD: add $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDXri, ARM64_INS_ADD: add $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDXrs, ARM64_INS_ADD: add $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDXrx, ARM64_INS_ADD: add $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDXrx64, ARM64_INS_ADD: add $rd, $rn, $rm$ext */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv16i8, ARM64_INS_ADD: add.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv1i64, ARM64_INS_ADD: add $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv2i32, ARM64_INS_ADD: add.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv2i64, ARM64_INS_ADD: add.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv4i16, ARM64_INS_ADD: add.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv4i32, ARM64_INS_ADD: add.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv8i16, ARM64_INS_ADD: add.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADDv8i8, ARM64_INS_ADD: add.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ADR, ARM64_INS_ADR: adr $xd, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ADRP, ARM64_INS_ADRP: adrp $xd, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_AESDrr, ARM64_INS_AESD: aesd.16b $rd, $rn */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_AESErr, ARM64_INS_AESE: aese.16b $rd, $rn */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_AESIMCrr, ARM64_INS_AESIMC: aesimc.16b $rd, $rn */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_AESMCrr, ARM64_INS_AESMC: aesmc.16b $rd, $rn */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ANDSWri, ARM64_INS_ANDS: ands $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDSWrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDSXri, ARM64_INS_ANDS: ands $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDSXrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDWri, ARM64_INS_AND: and $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDWrs, ARM64_INS_AND: and $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDXri, ARM64_INS_AND: and $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDXrs, ARM64_INS_AND: and $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDv16i8, ARM64_INS_AND: and.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ANDv8i8, ARM64_INS_AND: and.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ASRVWr, ARM64_INS_ASR: asr $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ASRVXr, ARM64_INS_ASR: asr $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_B, ARM64_INS_B: b $addr */ 0, { CS_AC_READ, 0 } }, { /* AArch64_BFMWri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_BFMXri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_BICSWrs, ARM64_INS_BICS: bics $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BICSXrs, ARM64_INS_BICS: bics $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BICWrs, ARM64_INS_BIC: bic $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BICXrs, ARM64_INS_BIC: bic $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BICv16i8, ARM64_INS_BIC: bic.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BICv2i32, ARM64_INS_BIC: bic.2s $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_BICv4i16, ARM64_INS_BIC: bic.4h $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_BICv4i32, ARM64_INS_BIC: bic.4s $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_BICv8i16, ARM64_INS_BIC: bic.8h $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_BICv8i8, ARM64_INS_BIC: bic.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_BIFv16i8, ARM64_INS_BIF: bif.16b $rd, $rn, $rm| */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BIFv8i8, ARM64_INS_BIF: bif.8b $rd, $rn, $rm| */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BITv16i8, ARM64_INS_BIT: bit.16b $rd, $rn, $rm */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BITv8i8, ARM64_INS_BIT: bit.8b $rd, $rn, $rm */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BL, ARM64_INS_BL: bl $addr */ 0, { CS_AC_READ, 0 } }, { /* AArch64_BLR, ARM64_INS_BLR: blr $rn */ 0, { CS_AC_READ, 0 } }, { /* AArch64_BR, ARM64_INS_BR: br $rn */ 0, { CS_AC_READ, 0 } }, { /* AArch64_BRK, ARM64_INS_BRK: brk $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_BSLv16i8, ARM64_INS_BSL: bsl.16b $rd, $rn, $rm */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_BSLv8i8, ARM64_INS_BSL: bsl.8b $rd, $rn, $rm */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_Bcc, ARM64_INS_B: b.$cond $target */ 0, { CS_AC_READ, 0 } }, { /* AArch64_CBNZW, ARM64_INS_CBNZ: cbnz $rt, $target */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CBNZX, ARM64_INS_CBNZ: cbnz $rt, $target */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CBZW, ARM64_INS_CBZ: cbz $rt, $target */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CBZX, ARM64_INS_CBZ: cbz $rt, $target */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CCMNWi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMNWr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMNXi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMNXr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMPWi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMPWr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMPXi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CCMPXr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CLREX, ARM64_INS_CLREX: clrex $crm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_CLSWr, ARM64_INS_CLS: cls $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSXr, ARM64_INS_CLS: cls $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSv16i8, ARM64_INS_CLS: cls.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSv2i32, ARM64_INS_CLS: cls.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSv4i16, ARM64_INS_CLS: cls.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSv4i32, ARM64_INS_CLS: cls.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSv8i16, ARM64_INS_CLS: cls.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLSv8i8, ARM64_INS_CLS: cls.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZWr, ARM64_INS_CLZ: clz $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZXr, ARM64_INS_CLZ: clz $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZv16i8, ARM64_INS_CLZ: clz.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZv2i32, ARM64_INS_CLZ: clz.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZv4i16, ARM64_INS_CLZ: clz.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZv4i32, ARM64_INS_CLZ: clz.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZv8i16, ARM64_INS_CLZ: clz.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CLZv8i8, ARM64_INS_CLZ: clz.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CMEQv16i8, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv16i8rz, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv1i64, ARM64_INS_CMEQ: cmeq $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv1i64rz, ARM64_INS_CMEQ: cmeq $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv2i32, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv2i32rz, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv2i64, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv2i64rz, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv4i16, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv4i16rz, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv4i32, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv4i32rz, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv8i16, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv8i16rz, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv8i8, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMEQv8i8rz, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv16i8, ARM64_INS_CMGE: cmge.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv16i8rz, ARM64_INS_CMGE: cmge.16b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv1i64, ARM64_INS_CMGE: cmge $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv1i64rz, ARM64_INS_CMGE: cmge $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv2i32, ARM64_INS_CMGE: cmge.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv2i32rz, ARM64_INS_CMGE: cmge.2s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv2i64, ARM64_INS_CMGE: cmge.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv2i64rz, ARM64_INS_CMGE: cmge.2d $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv4i16, ARM64_INS_CMGE: cmge.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv4i16rz, ARM64_INS_CMGE: cmge.4h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv4i32, ARM64_INS_CMGE: cmge.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv4i32rz, ARM64_INS_CMGE: cmge.4s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv8i16, ARM64_INS_CMGE: cmge.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv8i16rz, ARM64_INS_CMGE: cmge.8h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv8i8, ARM64_INS_CMGE: cmge.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGEv8i8rz, ARM64_INS_CMGE: cmge.8b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv16i8, ARM64_INS_CMGT: cmgt.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv16i8rz, ARM64_INS_CMGT: cmgt.16b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv1i64, ARM64_INS_CMGT: cmgt $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv1i64rz, ARM64_INS_CMGT: cmgt $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv2i32, ARM64_INS_CMGT: cmgt.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv2i32rz, ARM64_INS_CMGT: cmgt.2s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv2i64, ARM64_INS_CMGT: cmgt.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv2i64rz, ARM64_INS_CMGT: cmgt.2d $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv4i16, ARM64_INS_CMGT: cmgt.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv4i16rz, ARM64_INS_CMGT: cmgt.4h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv4i32, ARM64_INS_CMGT: cmgt.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv4i32rz, ARM64_INS_CMGT: cmgt.4s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv8i16, ARM64_INS_CMGT: cmgt.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv8i16rz, ARM64_INS_CMGT: cmgt.8h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv8i8, ARM64_INS_CMGT: cmgt.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMGTv8i8rz, ARM64_INS_CMGT: cmgt.8b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv16i8, ARM64_INS_CMHI: cmhi.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv1i64, ARM64_INS_CMHI: cmhi $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv2i32, ARM64_INS_CMHI: cmhi.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv2i64, ARM64_INS_CMHI: cmhi.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv4i16, ARM64_INS_CMHI: cmhi.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv4i32, ARM64_INS_CMHI: cmhi.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv8i16, ARM64_INS_CMHI: cmhi.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHIv8i8, ARM64_INS_CMHI: cmhi.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv16i8, ARM64_INS_CMHS: cmhs.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv1i64, ARM64_INS_CMHS: cmhs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv2i32, ARM64_INS_CMHS: cmhs.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv2i64, ARM64_INS_CMHS: cmhs.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv4i16, ARM64_INS_CMHS: cmhs.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv4i32, ARM64_INS_CMHS: cmhs.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv8i16, ARM64_INS_CMHS: cmhs.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMHSv8i8, ARM64_INS_CMHS: cmhs.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv16i8rz, ARM64_INS_CMLE: cmle.16b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv1i64rz, ARM64_INS_CMLE: cmle $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv2i32rz, ARM64_INS_CMLE: cmle.2s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv2i64rz, ARM64_INS_CMLE: cmle.2d $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv4i16rz, ARM64_INS_CMLE: cmle.4h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv4i32rz, ARM64_INS_CMLE: cmle.4s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv8i16rz, ARM64_INS_CMLE: cmle.8h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLEv8i8rz, ARM64_INS_CMLE: cmle.8b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv16i8rz, ARM64_INS_CMLT: cmlt.16b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv1i64rz, ARM64_INS_CMLT: cmlt $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv2i32rz, ARM64_INS_CMLT: cmlt.2s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv2i64rz, ARM64_INS_CMLT: cmlt.2d $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv4i16rz, ARM64_INS_CMLT: cmlt.4h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv4i32rz, ARM64_INS_CMLT: cmlt.4s $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv8i16rz, ARM64_INS_CMLT: cmlt.8h $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMLTv8i8rz, ARM64_INS_CMLT: cmlt.8b $rd, $rn, #0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv16i8, ARM64_INS_CMTST: cmtst.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv1i64, ARM64_INS_CMTST: cmtst $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv2i32, ARM64_INS_CMTST: cmtst.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv2i64, ARM64_INS_CMTST: cmtst.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv4i16, ARM64_INS_CMTST: cmtst.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv4i32, ARM64_INS_CMTST: cmtst.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv8i16, ARM64_INS_CMTST: cmtst.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CMTSTv8i8, ARM64_INS_CMTST: cmtst.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CNTv16i8, ARM64_INS_CNT: cnt.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CNTv8i8, ARM64_INS_CNT: cnt.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_CPYi16, ARM64_INS_MOV: mov $dst, $src$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CPYi32, ARM64_INS_MOV: mov $dst, $src$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CPYi64, ARM64_INS_MOV: mov $dst, $src$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CPYi8, ARM64_INS_MOV: mov $dst, $src$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32Brr, ARM64_INS_CRC32B: crc32b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32CBrr, ARM64_INS_CRC32CB: crc32cb $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32CHrr, ARM64_INS_CRC32CH: crc32ch $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32CWrr, ARM64_INS_CRC32CW: crc32cw $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32CXrr, ARM64_INS_CRC32CX: crc32cx $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32Hrr, ARM64_INS_CRC32H: crc32h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32Wrr, ARM64_INS_CRC32W: crc32w $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CRC32Xrr, ARM64_INS_CRC32X: crc32x $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_CSELWr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSELXr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSINCWr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSINCXr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSINVWr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSINVXr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSNEGWr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_CSNEGXr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_DCPS1, ARM64_INS_DCPS1: dcps1 $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_DCPS2, ARM64_INS_DCPS2: dcps2 $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_DCPS3, ARM64_INS_DCPS3: dcps3 $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_DMB, ARM64_INS_DMB: dmb $crm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_DRPS, ARM64_INS_DRPS: drps */ 0, { 0 } }, { /* AArch64_DSB, ARM64_INS_DSB: dsb $crm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_DUPv16i8gpr, ARM64_INS_DUP: dup.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv16i8lane, ARM64_INS_DUP: dup.16b $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_DUPv2i32gpr, ARM64_INS_DUP: dup.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv2i32lane, ARM64_INS_DUP: dup.2s $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_DUPv2i64gpr, ARM64_INS_DUP: dup.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv2i64lane, ARM64_INS_DUP: dup.2d $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_DUPv4i16gpr, ARM64_INS_DUP: dup.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv4i16lane, ARM64_INS_DUP: dup.4h $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_DUPv4i32gpr, ARM64_INS_DUP: dup.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv4i32lane, ARM64_INS_DUP: dup.4s $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_DUPv8i16gpr, ARM64_INS_DUP: dup.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv8i16lane, ARM64_INS_DUP: dup.8h $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_DUPv8i8gpr, ARM64_INS_DUP: dup.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_DUPv8i8lane, ARM64_INS_DUP: dup.8b $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EONWrs, ARM64_INS_EON: eon $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EONXrs, ARM64_INS_EON: eon $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EORWri, ARM64_INS_EOR: eor $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EORWrs, ARM64_INS_EOR: eor $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EORXri, ARM64_INS_EOR: eor $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EORXrs, ARM64_INS_EOR: eor $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EORv16i8, ARM64_INS_EOR: eor.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_EORv8i8, ARM64_INS_EOR: eor.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ERET, ARM64_INS_ERET: eret */ 0, { 0 } }, { /* AArch64_EXTRWrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_EXTRXrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_EXTv16i8, ARM64_INS_EXT: ext.16b $rd, $rn, $rm, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_EXTv8i8, ARM64_INS_EXT: ext.8b $rd, $rn, $rm, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FABD32, ARM64_INS_FABD: fabd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FABD64, ARM64_INS_FABD: fabd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FABDv2f32, ARM64_INS_FABD: fabd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FABDv2f64, ARM64_INS_FABD: fabd.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FABDv4f32, ARM64_INS_FABD: fabd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FABSDr, ARM64_INS_FABS: fabs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FABSSr, ARM64_INS_FABS: fabs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FABSv2f32, ARM64_INS_FABS: fabs.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FABSv2f64, ARM64_INS_FABS: fabs.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FABSv4f32, ARM64_INS_FABS: fabs.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FACGE32, ARM64_INS_FACGE: facge $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGE64, ARM64_INS_FACGE: facge $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGEv2f32, ARM64_INS_FACGE: facge.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGEv2f64, ARM64_INS_FACGE: facge.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGEv4f32, ARM64_INS_FACGE: facge.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGT32, ARM64_INS_FACGT: facgt $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGT64, ARM64_INS_FACGT: facgt $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGTv2f32, ARM64_INS_FACGT: facgt.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGTv2f64, ARM64_INS_FACGT: facgt.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FACGTv4f32, ARM64_INS_FACGT: facgt.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDDrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDPv2f32, ARM64_INS_FADDP: faddp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDPv2f64, ARM64_INS_FADDP: faddp.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDPv2i32p, ARM64_INS_FADDP: faddp.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FADDPv2i64p, ARM64_INS_FADDP: faddp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FADDPv4f32, ARM64_INS_FADDP: faddp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDSrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDv2f32, ARM64_INS_FADD: fadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDv2f64, ARM64_INS_FADD: fadd.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FADDv4f32, ARM64_INS_FADD: fadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCCMPDrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ } }, { /* AArch64_FCCMPEDrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ } }, { /* AArch64_FCCMPESrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ } }, { /* AArch64_FCCMPSrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ } }, { /* AArch64_FCMEQ32, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQ64, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv2f32, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv2f64, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv4f32, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGE32, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGE64, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv2f32, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv2f64, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv4f32, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGT32, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGT64, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv2f32, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv2f64, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv4f32, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE: fcmle.2s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE: fcmle.2d $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE: fcmle.4s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT: fcmlt.2s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT: fcmlt.2d $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT: fcmlt.4s $rd, $rn, #0.0 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPDri, ARM64_INS_FCMP: fcmp $rn, #0.0 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPDrr, ARM64_INS_FCMP: fcmp $rn, $rm */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPEDri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPEDrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPESri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPESrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPSri, ARM64_INS_FCMP: fcmp $rn, #0.0 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCMPSrr, ARM64_INS_FCMP: fcmp $rn, $rm */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCSELDrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FCSELSrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FCVTASUWDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASUWSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASUXDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASUXSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASv1i32, ARM64_INS_FCVTAS: fcvtas $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASv1i64, ARM64_INS_FCVTAS: fcvtas $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASv2f32, ARM64_INS_FCVTAS: fcvtas.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASv2f64, ARM64_INS_FCVTAS: fcvtas.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTASv4f32, ARM64_INS_FCVTAS: fcvtas.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU: fcvtau $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU: fcvtau $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU: fcvtau.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU: fcvtau.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU: fcvtau.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTDHr, ARM64_INS_FCVT: fcvt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTDSr, ARM64_INS_FCVT: fcvt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTHDr, ARM64_INS_FCVT: fcvt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTHSr, ARM64_INS_FCVT: fcvt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTLv2i32, ARM64_INS_FCVTL: fcvtl $rd.2d, $rn.2s */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTLv4i16, ARM64_INS_FCVTL: fcvtl $rd.4s, $rn.4h */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTLv4i32, ARM64_INS_FCVTL2: fcvtl2 $rd.2d, $rn.4s */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTLv8i16, ARM64_INS_FCVTL2: fcvtl2 $rd.4s, $rn.8h */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS: fcvtms $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS: fcvtms $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS: fcvtms.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS: fcvtms.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS: fcvtms.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU: fcvtmu.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU: fcvtmu.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU: fcvtmu.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS: fcvtns $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS: fcvtns $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS: fcvtns.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS: fcvtns.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS: fcvtns.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU: fcvtnu.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU: fcvtnu.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU: fcvtnu.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNv2i32, ARM64_INS_FCVTN: fcvtn $rd.2s, $rn.2d */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNv4i16, ARM64_INS_FCVTN: fcvtn $rd.4h, $rn.4s */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNv4i32, ARM64_INS_FCVTN2: fcvtn2 $rd.4s, $rn.2d */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTNv8i16, ARM64_INS_FCVTN2: fcvtn2 $rd.8h, $rn.4s */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS: fcvtps $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS: fcvtps $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS: fcvtps.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS: fcvtps.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS: fcvtps.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU: fcvtpu.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU: fcvtpu.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU: fcvtpu.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTSDr, ARM64_INS_FCVT: fcvt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTSHr, ARM64_INS_FCVT: fcvt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN: fcvtxn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN: fcvtxn $rd.2s, $rn.2d */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2: fcvtxn2 $rd.4s, $rn.2d */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSd, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSs, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUd, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUs, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FDIVDrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FDIVSrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FDIVv2f32, ARM64_INS_FDIV: fdiv.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FDIVv2f64, ARM64_INS_FDIV: fdiv.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FDIVv4f32, ARM64_INS_FDIV: fdiv.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMADDDrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMADDSrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMAXDrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMDrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP: fmaxnmp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMSrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV: fmaxnmv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM: fmaxnm.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM: fmaxnm.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM: fmaxnm.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXPv2f32, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXPv2f64, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXPv2i32p, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMAXPv2i64p, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMAXPv4f32, ARM64_INS_FMAXP: fmaxp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXSrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXVv4i32v, ARM64_INS_FMAXV: fmaxv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMAXv2f32, ARM64_INS_FMAX: fmax.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXv2f64, ARM64_INS_FMAX: fmax.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMAXv4f32, ARM64_INS_FMAX: fmax.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINDrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMDrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP: fminnmp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMSrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV: fminnmv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMINNMv2f32, ARM64_INS_FMINNM: fminnm.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMv2f64, ARM64_INS_FMINNM: fminnm.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINNMv4f32, ARM64_INS_FMINNM: fminnm.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINPv2f32, ARM64_INS_FMINP: fminp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINPv2f64, ARM64_INS_FMINP: fminp.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINPv2i32p, ARM64_INS_FMINP: fminp.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMINPv2i64p, ARM64_INS_FMINP: fminp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMINPv4f32, ARM64_INS_FMINP: fminp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINSrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINVv4i32v, ARM64_INS_FMINV: fminv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMINv2f32, ARM64_INS_FMIN: fmin.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINv2f64, ARM64_INS_FMIN: fmin.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMINv4f32, ARM64_INS_FMIN: fmin.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA: fmla.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA: fmla.d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLAv2f32, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLAv2f64, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLAv4f32, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS: fmls.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS: fmls.d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLSv2f32, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLSv2f64, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMLSv4f32, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMOVDXHighr, ARM64_INS_FMOV: fmov.d $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVDXr, ARM64_INS_FMOV: fmov $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVDi, ARM64_INS_FMOV: fmov $rd, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMOVDr, ARM64_INS_FMOV: fmov $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVSWr, ARM64_INS_FMOV: fmov $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVSi, ARM64_INS_FMOV: fmov $rd, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMOVSr, ARM64_INS_FMOV: fmov $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVWSr, ARM64_INS_FMOV: fmov $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVXDHighr, ARM64_INS_FMOV: fmov.d $rd$idx, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVXDr, ARM64_INS_FMOV: fmov $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FMOVv2f32_ns, ARM64_INS_FMOV: fmov.2s $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 } }, { /* AArch64_FMOVv2f64_ns, ARM64_INS_FMOV: fmov.2d $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 } }, { /* AArch64_FMOVv4f32_ns, ARM64_INS_FMOV: fmov.4s $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 } }, { /* AArch64_FMSUBDrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMSUBSrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULDrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULSrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULX32, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULX64, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX: fmulx.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX: fmulx.d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULXv2f32, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULXv2f64, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULXv4f32, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULv1i32_indexed, ARM64_INS_FMUL: fmul.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULv1i64_indexed, ARM64_INS_FMUL: fmul.d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULv2f32, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULv2f64, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULv2i32_indexed, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULv2i64_indexed, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FMULv4f32, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FMULv4i32_indexed, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FNEGDr, ARM64_INS_FNEG: fneg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FNEGSr, ARM64_INS_FNEG: fneg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FNEGv2f32, ARM64_INS_FNEG: fneg.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FNEGv2f64, ARM64_INS_FNEG: fneg.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FNEGv4f32, ARM64_INS_FNEG: fneg.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FNMADDDrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FNMADDSrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_FNMULDrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FNMULSrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRECPEv1i32, ARM64_INS_FRECPE: frecpe $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRECPEv1i64, ARM64_INS_FRECPE: frecpe $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRECPEv2f32, ARM64_INS_FRECPE: frecpe.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRECPEv2f64, ARM64_INS_FRECPE: frecpe.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRECPEv4f32, ARM64_INS_FRECPE: frecpe.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRECPS32, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRECPS64, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRECPSv2f32, ARM64_INS_FRECPS: frecps.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRECPSv2f64, ARM64_INS_FRECPS: frecps.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRECPSv4f32, ARM64_INS_FRECPS: frecps.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRECPXv1i32, ARM64_INS_FRECPX: frecpx $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRECPXv1i64, ARM64_INS_FRECPX: frecpx $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTADr, ARM64_INS_FRINTA: frinta $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTASr, ARM64_INS_FRINTA: frinta $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTAv2f32, ARM64_INS_FRINTA: frinta.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTAv2f64, ARM64_INS_FRINTA: frinta.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTAv4f32, ARM64_INS_FRINTA: frinta.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTIDr, ARM64_INS_FRINTI: frinti $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTISr, ARM64_INS_FRINTI: frinti $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTIv2f32, ARM64_INS_FRINTI: frinti.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTIv2f64, ARM64_INS_FRINTI: frinti.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTIv4f32, ARM64_INS_FRINTI: frinti.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTMDr, ARM64_INS_FRINTM: frintm $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTMSr, ARM64_INS_FRINTM: frintm $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTMv2f32, ARM64_INS_FRINTM: frintm.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTMv2f64, ARM64_INS_FRINTM: frintm.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTMv4f32, ARM64_INS_FRINTM: frintm.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTNDr, ARM64_INS_FRINTN: frintn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTNSr, ARM64_INS_FRINTN: frintn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTNv2f32, ARM64_INS_FRINTN: frintn.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTNv2f64, ARM64_INS_FRINTN: frintn.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTNv4f32, ARM64_INS_FRINTN: frintn.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTPDr, ARM64_INS_FRINTP: frintp $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTPSr, ARM64_INS_FRINTP: frintp $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTPv2f32, ARM64_INS_FRINTP: frintp.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTPv2f64, ARM64_INS_FRINTP: frintp.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTPv4f32, ARM64_INS_FRINTP: frintp.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTXDr, ARM64_INS_FRINTX: frintx $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTXSr, ARM64_INS_FRINTX: frintx $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTXv2f32, ARM64_INS_FRINTX: frintx.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTXv2f64, ARM64_INS_FRINTX: frintx.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTXv4f32, ARM64_INS_FRINTX: frintx.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTZDr, ARM64_INS_FRINTZ: frintz $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTZSr, ARM64_INS_FRINTZ: frintz $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTZv2f32, ARM64_INS_FRINTZ: frintz.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTZv2f64, ARM64_INS_FRINTZ: frintz.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRINTZv4f32, ARM64_INS_FRINTZ: frintz.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE: frsqrte.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE: frsqrte.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE: frsqrte.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTS32, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTS64, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS: frsqrts.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS: frsqrts.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS: frsqrts.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FSQRTDr, ARM64_INS_FSQRT: fsqrt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FSQRTSr, ARM64_INS_FSQRT: fsqrt $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FSQRTv2f32, ARM64_INS_FSQRT: fsqrt.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FSQRTv2f64, ARM64_INS_FSQRT: fsqrt.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FSQRTv4f32, ARM64_INS_FSQRT: fsqrt.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_FSUBDrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FSUBSrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FSUBv2f32, ARM64_INS_FSUB: fsub.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FSUBv2f64, ARM64_INS_FSUB: fsub.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_FSUBv4f32, ARM64_INS_FSUB: fsub.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_HINT, ARM64_INS_HINT: hint $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_HLT, ARM64_INS_HLT: hlt $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_HVC, ARM64_INS_HVC: hvc $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_INSvi16gpr, ARM64_INS_INS: ins.h $rd$idx, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_INSvi16lane, ARM64_INS_INS: ins.h $rd$idx, $rn$idx2 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_INSvi32gpr, ARM64_INS_INS: ins.s $rd$idx, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_INSvi32lane, ARM64_INS_INS: ins.s $rd$idx, $rn$idx2 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_INSvi64gpr, ARM64_INS_INS: ins.d $rd$idx, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_INSvi64lane, ARM64_INS_INS: ins.d $rd$idx, $rn$idx2 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_INSvi8gpr, ARM64_INS_INS: ins.b $rd$idx, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_INSvi8lane, ARM64_INS_INS: ins.b $rd$idx, $rn$idx2 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_ISB, ARM64_INS_ISB: isb $crm */ 0, { 0 } }, { /* AArch64_LD1Fourv16b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv1d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv2d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv2s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv4h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv4s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv8b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv8h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Fourv8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD1Onev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Onev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Onev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv16b, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv16b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv1d, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv1d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv2d, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv2d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv2s, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv2s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv4h, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv4h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv4s, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv4s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv8b, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv8b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Rv8h, ARM64_INS_LD1R: ld1r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Rv8h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Threev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Threev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov16b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov1d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov2d, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov2s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov4h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov4s, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov8b, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1Twov8h, ARM64_INS_LD1: ld1 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1Twov8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1i16, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1i16_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1i32, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1i32_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1i64, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1i64_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD1i8, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD1i8_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv16b, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv16b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv1d, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv1d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv2d, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv2d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv2s, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv2s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv4h, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv4h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv4s, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv4s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv8b, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv8b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Rv8h, ARM64_INS_LD2R: ld2r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD2Rv8h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD2Twov16b, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov16b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2Twov2d, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov2d_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2Twov2s, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov2s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2Twov4h, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov4h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2Twov4s, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov4s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2Twov8b, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov8b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2Twov8h, ARM64_INS_LD2: ld2 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2Twov8h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2i16, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2i16_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2i32, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2i32_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2i64, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2i64_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD2i8, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0} }, { /* AArch64_LD2i8_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LD3Rv16b, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv16b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv1d, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv1d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv2d, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv2d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv2s, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv2s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv4h, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv4h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv4s, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv4s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv8b, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv8b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Rv8h, ARM64_INS_LD3R: ld3r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Rv8h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev16b, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev16b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev2d, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev2d_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev2s, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev2s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev4h, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev4h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev4s, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev4s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev8b, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev8b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3Threev8h, ARM64_INS_LD3: ld3 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3Threev8h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD3i16, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3i16_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD3i32, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3i32_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD3i64, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3i64_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD3i8, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD3i8_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD4Fourv16b, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv16b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv2d, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv2d_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv2s, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv2s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv4h, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv4h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv4s, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv4s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv8b, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv8b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv8h, ARM64_INS_LD4: ld4 $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Fourv8h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv16b, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv16b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv1d, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv1d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv2d, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv2d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv2s, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv2s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv4h, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv4h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv4s, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv4s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv8b, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv8b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4Rv8h, ARM64_INS_LD4R: ld4r $vt, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4Rv8h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LD4i16, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4i16_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD4i32, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4i32_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD4i64, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4i64_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LD4i8, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_LD4i8_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDARB, ARM64_INS_LDARB: ldarb $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDARH, ARM64_INS_LDARH: ldarh $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDARW, ARM64_INS_LDAR: ldar $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDARX, ARM64_INS_LDAR: ldar $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDAXPW, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDAXPX, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDAXRB, ARM64_INS_LDAXRB: ldaxrb $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDAXRH, ARM64_INS_LDAXRH: ldaxrh $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDAXRW, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDAXRX, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDNPDi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDNPQi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDNPSi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDNPWi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDNPXi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPDi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPDpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPDpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPQi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPQpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPQpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPSWi, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPSWpost, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPSWpre, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPSi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPSpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPSpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPWi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPWpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPWpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPXi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPXpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDPXpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRBBpost, ARM64_INS_LDRB: ldrb $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRBBpre, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRBBroW, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRBBroX, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRBBui, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRBpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRBpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRBroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRBroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRBui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRDl, ARM64_INS_LDR: ldr $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDRDpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRDpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRDroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 00, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRDroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRDui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHHpost, ARM64_INS_LDRH: ldrh $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHHpre, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHHroW, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHHroX, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHHui, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRHroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRHroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRHui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRQl, ARM64_INS_LDR: ldr $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDRQpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRQpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRQroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRQroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRQui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSBWpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSBWpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSBWroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSBWroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSBWui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSBXpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSBXpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSBXroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSBXroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSBXui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSHWpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSHWpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSHWroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSHWroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSHWui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSHXpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSHXpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSHXroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSHXroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSHXui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSWl, ARM64_INS_LDRSW: ldrsw $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDRSWpost, ARM64_INS_LDRSW: ldrsw $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSWpre, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSWroW, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSWroX, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSWui, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSl, ARM64_INS_LDR: ldr $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDRSpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRSroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRSui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRWl, ARM64_INS_LDR: ldr $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDRWpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRWpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRWroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRWroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRWui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRXl, ARM64_INS_LDR: ldr $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDRXpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRXpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDRXroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRXroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_LDRXui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LDTRBi, ARM64_INS_LDTRB: ldtrb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRHi, ARM64_INS_LDTRH: ldtrh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRSBWi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRSBXi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRSHWi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRSHXi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRSWi, ARM64_INS_LDTRSW: ldtrsw $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRWi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDTRXi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURBBi, ARM64_INS_LDURB: ldurb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURBi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURDi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURHHi, ARM64_INS_LDURH: ldurh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURHi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURQi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURSBWi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURSBXi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURSHWi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURSHXi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURSWi, ARM64_INS_LDURSW: ldursw $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURSi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURWi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDURXi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_LDXPW, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDXPX, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDXRB, ARM64_INS_LDXRB: ldxrb $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDXRH, ARM64_INS_LDXRH: ldxrh $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDXRW, ARM64_INS_LDXR: ldxr $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LDXRX, ARM64_INS_LDXR: ldxr $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_LSLVWr, ARM64_INS_LSL: lsl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LSLVXr, ARM64_INS_LSL: lsl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LSRVWr, ARM64_INS_LSR: lsr $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_LSRVXr, ARM64_INS_LSR: lsr $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MADDWrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MADDXrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLAv16i8, ARM64_INS_MLA: mla.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLAv2i32, ARM64_INS_MLA: mla.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLAv2i32_indexed, ARM64_INS_MLA: mla.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLAv4i16, ARM64_INS_MLA: mla.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLAv4i16_indexed, ARM64_INS_MLA: mla.4h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLAv4i32, ARM64_INS_MLA: mla.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLAv4i32_indexed, ARM64_INS_MLA: mla.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLAv8i16, ARM64_INS_MLA: mla.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLAv8i16_indexed, ARM64_INS_MLA: mla.8h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLAv8i8, ARM64_INS_MLA: mla.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLSv16i8, ARM64_INS_MLS: mls.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLSv2i32, ARM64_INS_MLS: mls.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLSv2i32_indexed, ARM64_INS_MLS: mls.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLSv4i16, ARM64_INS_MLS: mls.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLSv4i16_indexed, ARM64_INS_MLS: mls.4h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLSv4i32, ARM64_INS_MLS: mls.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLSv4i32_indexed, ARM64_INS_MLS: mls.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLSv8i16, ARM64_INS_MLS: mls.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MLSv8i16_indexed, ARM64_INS_MLS: mls.8h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MLSv8i8, ARM64_INS_MLS: mls.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVID, ARM64_INS_MOVI: movi $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv16b_ns, ARM64_INS_MOVI: movi.16b $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv2d_ns, ARM64_INS_MOVI: movi.2d $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv2i32, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv2s_msl, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv4i16, ARM64_INS_MOVI: movi.4h $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv4i32, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv4s_msl, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv8b_ns, ARM64_INS_MOVI: movi.8b $rd, $imm8 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVIv8i16, ARM64_INS_MOVI: movi.8h $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVKWi, ARM64_INS_MOVK: movk $rd, $imm$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVKXi, ARM64_INS_MOVK: movk $rd, $imm$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVNWi, ARM64_INS_MOVN: movn $rd, $imm$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVNXi, ARM64_INS_MOVN: movn $rd, $imm$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVZWi, ARM64_INS_MOVZ: movz $rd, $imm$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MOVZXi, ARM64_INS_MOVZ: movz $rd, $imm$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MRS, ARM64_INS_MRS: mrs $rt, $systemreg */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_MSR, ARM64_INS_MSR: msr $systemreg, $rt */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_MSRpstate, ARM64_INS_MSR: msr $pstate_field, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MSUBWrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MSUBXrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MULv16i8, ARM64_INS_MUL: mul.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv2i32, ARM64_INS_MUL: mul.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv2i32_indexed, ARM64_INS_MUL: mul.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MULv4i16, ARM64_INS_MUL: mul.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv4i16_indexed, ARM64_INS_MUL: mul.4h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_MULv4i32, ARM64_INS_MUL: mul.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv4i32_indexed, ARM64_INS_MUL: mul.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv8i16, ARM64_INS_MUL: mul.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv8i16_indexed, ARM64_INS_MUL: mul.8h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MULv8i8, ARM64_INS_MUL: mul.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MVNIv2i32, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MVNIv2s_msl, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MVNIv4i16, ARM64_INS_MVNI: mvni.4h $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MVNIv4i32, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MVNIv4s_msl, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_MVNIv8i16, ARM64_INS_MVNI: mvni.8h $rd, $imm8$shift */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_NEGv16i8, ARM64_INS_NEG: neg.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv1i64, ARM64_INS_NEG: neg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv2i32, ARM64_INS_NEG: neg.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv2i64, ARM64_INS_NEG: neg.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv4i16, ARM64_INS_NEG: neg.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv4i32, ARM64_INS_NEG: neg.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv8i16, ARM64_INS_NEG: neg.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NEGv8i8, ARM64_INS_NEG: neg.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NOTv16i8, ARM64_INS_NOT: not.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_NOTv8i8, ARM64_INS_NOT: not.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ORNWrs, ARM64_INS_ORN: orn $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORNXrs, ARM64_INS_ORN: orn $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORNv16i8, ARM64_INS_ORN: orn.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORNv8i8, ARM64_INS_ORN: orn.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRWri, ARM64_INS_ORR: orr $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRWrs, ARM64_INS_ORR: orr $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRXri, ARM64_INS_ORR: orr $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRXrs, ARM64_INS_ORR: orr $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRv16i8, ARM64_INS_ORR: orr.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRv2i32, ARM64_INS_ORR: orr.2s $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRv4i16, ARM64_INS_ORR: orr.4h $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRv4i32, ARM64_INS_ORR: orr.4s $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRv8i16, ARM64_INS_ORR: orr.8h $rd, $imm8$shift */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ORRv8i8, ARM64_INS_ORR: orr.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_PMULLv16i8, ARM64_INS_PMULL2: pmull2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_PMULLv1i64, ARM64_INS_PMULL: pmull.1q $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_PMULLv2i64, ARM64_INS_PMULL2: pmull2.1q $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_PMULLv8i8, ARM64_INS_PMULL: pmull.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_PMULv16i8, ARM64_INS_PMUL: pmul.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_PMULv8i8, ARM64_INS_PMUL: pmul.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_PRFMl, ARM64_INS_PRFM: prfm $rt, $label */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_PRFMroW, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_PRFMroX, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_PRFMui, ARM64_INS_PRFM: prfm $rt, [$rn, $offset] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_PRFUMi, ARM64_INS_PRFUM: prfum $rt, [$rn, $offset] */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN: raddhn.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2: raddhn2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN: raddhn.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2: raddhn2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2: raddhn2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN: raddhn.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RBITWr, ARM64_INS_RBIT: rbit $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_RBITXr, ARM64_INS_RBIT: rbit $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_RBITv16i8, ARM64_INS_RBIT: rbit.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_RBITv8i8, ARM64_INS_RBIT: rbit.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_RET, ARM64_INS_RET: ret $rn */ 0, { CS_AC_READ, 0 } }, { /* AArch64_REV16Wr, ARM64_INS_REV16: rev16 $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV16Xr, ARM64_INS_REV16: rev16 $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV16v16i8, ARM64_INS_REV16: rev16.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV16v8i8, ARM64_INS_REV16: rev16.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV32Xr, ARM64_INS_REV32: rev32 $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV32v16i8, ARM64_INS_REV32: rev32.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV32v4i16, ARM64_INS_REV32: rev32.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV32v8i16, ARM64_INS_REV32: rev32.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV32v8i8, ARM64_INS_REV32: rev32.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV64v16i8, ARM64_INS_REV64: rev64.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV64v2i32, ARM64_INS_REV64: rev64.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV64v4i16, ARM64_INS_REV64: rev64.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV64v4i32, ARM64_INS_REV64: rev64.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV64v8i16, ARM64_INS_REV64: rev64.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REV64v8i8, ARM64_INS_REV64: rev64.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REVWr, ARM64_INS_REV: rev $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_REVXr, ARM64_INS_REV: rev $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_RORVWr, ARM64_INS_ROR: ror $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RORVXr, ARM64_INS_ROR: ror $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2: rshrn2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN: rshrn.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN: rshrn.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2: rshrn2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2: rshrn2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN: rshrn.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN: rsubhn.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2: rsubhn2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN: rsubhn.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2: rsubhn2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2: rsubhn2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN: rsubhn.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2: sabal2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL: sabal.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL: sabal.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2: sabal2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2: sabal2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL: sabal.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABAv16i8, ARM64_INS_SABA: saba.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABAv2i32, ARM64_INS_SABA: saba.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABAv4i16, ARM64_INS_SABA: saba.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABAv4i32, ARM64_INS_SABA: saba.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABAv8i16, ARM64_INS_SABA: saba.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABAv8i8, ARM64_INS_SABA: saba.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2: sabdl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL: sabdl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL: sabdl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2: sabdl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2: sabdl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL: sabdl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDv16i8, ARM64_INS_SABD: sabd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDv2i32, ARM64_INS_SABD: sabd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDv4i16, ARM64_INS_SABD: sabd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDv4i32, ARM64_INS_SABD: sabd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDv8i16, ARM64_INS_SABD: sabd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SABDv8i8, ARM64_INS_SABD: sabd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP: sadalp.8h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP: sadalp.1d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP: sadalp.2s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP: sadalp.2d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP: sadalp.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP: sadalp.4h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP: saddlp.8h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP: saddlp.1d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP: saddlp.2s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP: saddlp.2d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP: saddlp.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP: saddlp.4h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLVv16i8v, ARM64_INS_SADDLV: saddlv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SADDLVv4i16v, ARM64_INS_SADDLV: saddlv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SADDLVv4i32v, ARM64_INS_SADDLV: saddlv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SADDLVv8i16v, ARM64_INS_SADDLV: saddlv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SADDLVv8i8v, ARM64_INS_SADDLV: saddlv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2: saddl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL: saddl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL: saddl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2: saddl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2: saddl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL: saddl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2: saddw2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW: saddw.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW: saddw.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2: saddw2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2: saddw2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW: saddw.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SBCSWr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SBCSXr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SBCWr, ARM64_INS_SBC: sbc $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SBCXr, ARM64_INS_SBC: sbc $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SBFMWri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SBFMXri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SCVTFSWDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFSWSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFSXDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFSXSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFUWDri, ARM64_INS_SCVTF: scvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFUWSri, ARM64_INS_SCVTF: scvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFUXDri, ARM64_INS_SCVTF: scvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFUXSri, ARM64_INS_SCVTF: scvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFd, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFs, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFv1i32, ARM64_INS_SCVTF: scvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFv1i64, ARM64_INS_SCVTF: scvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFv2f32, ARM64_INS_SCVTF: scvtf.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFv2f64, ARM64_INS_SCVTF: scvtf.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF: scvtf.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF: scvtf.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SCVTFv4f32, ARM64_INS_SCVTF: scvtf.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0} }, { /* AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF: scvtf.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SDIVWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SDIVXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SDIV_IntWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SDIV_IntXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHA1Crrr, ARM64_INS_SHA1C: sha1c.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA1Hrr, ARM64_INS_SHA1H: sha1h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SHA1Mrrr, ARM64_INS_SHA1M: sha1m.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA1Prrr, ARM64_INS_SHA1P: sha1p.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0: sha1su0.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1: sha1su1.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA256H2rrr, ARM64_INS_SHA256H2: sha256h2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA256Hrrr, ARM64_INS_SHA256H: sha256h.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0: sha256su0.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1: sha256su1.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SHADDv16i8, ARM64_INS_SHADD: shadd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHADDv2i32, ARM64_INS_SHADD: shadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHADDv4i16, ARM64_INS_SHADD: shadd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHADDv4i32, ARM64_INS_SHADD: shadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHADDv8i16, ARM64_INS_SHADD: shadd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHADDv8i8, ARM64_INS_SHADD: shadd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLLv16i8, ARM64_INS_SHLL2: shll2.8h $rd, $rn, #8 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLLv2i32, ARM64_INS_SHLL: shll.2d $rd, $rn, #32 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLLv4i16, ARM64_INS_SHLL: shll.4s $rd, $rn, #16 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLLv4i32, ARM64_INS_SHLL2: shll2.2d $rd, $rn, #32 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLLv8i16, ARM64_INS_SHLL2: shll2.4s $rd, $rn, #16 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLLv8i8, ARM64_INS_SHLL: shll.8h $rd, $rn, #8 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLd, ARM64_INS_SHL: shl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv16i8_shift, ARM64_INS_SHL: shl.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv2i32_shift, ARM64_INS_SHL: shl.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv2i64_shift, ARM64_INS_SHL: shl.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv4i16_shift, ARM64_INS_SHL: shl.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv4i32_shift, ARM64_INS_SHL: shl.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv8i16_shift, ARM64_INS_SHL: shl.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHLv8i8_shift, ARM64_INS_SHL: shl.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2: shrn2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHRNv2i32_shift, ARM64_INS_SHRN: shrn.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHRNv4i16_shift, ARM64_INS_SHRN: shrn.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2: shrn2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2: shrn2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHRNv8i8_shift, ARM64_INS_SHRN: shrn.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHSUBv16i8, ARM64_INS_SHSUB: shsub.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHSUBv2i32, ARM64_INS_SHSUB: shsub.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHSUBv4i16, ARM64_INS_SHSUB: shsub.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHSUBv4i32, ARM64_INS_SHSUB: shsub.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHSUBv8i16, ARM64_INS_SHSUB: shsub.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SHSUBv8i8, ARM64_INS_SHSUB: shsub.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLId, ARM64_INS_SLI: sli $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv16i8_shift, ARM64_INS_SLI: sli.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv2i32_shift, ARM64_INS_SLI: sli.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv2i64_shift, ARM64_INS_SLI: sli.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv4i16_shift, ARM64_INS_SLI: sli.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv4i32_shift, ARM64_INS_SLI: sli.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv8i16_shift, ARM64_INS_SLI: sli.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SLIv8i8_shift, ARM64_INS_SLI: sli.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0} }, { /* AArch64_SMADDLrrr, ARM64_INS_SMADDL: smaddl $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXPv16i8, ARM64_INS_SMAXP: smaxp.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXPv2i32, ARM64_INS_SMAXP: smaxp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXPv4i16, ARM64_INS_SMAXP: smaxp.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXPv4i32, ARM64_INS_SMAXP: smaxp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXPv8i16, ARM64_INS_SMAXP: smaxp.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXPv8i8, ARM64_INS_SMAXP: smaxp.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXVv16i8v, ARM64_INS_SMAXV: smaxv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMAXVv4i16v, ARM64_INS_SMAXV: smaxv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMAXVv4i32v, ARM64_INS_SMAXV: smaxv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMAXVv8i16v, ARM64_INS_SMAXV: smaxv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMAXVv8i8v, ARM64_INS_SMAXV: smaxv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMAXv16i8, ARM64_INS_SMAX: smax.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXv2i32, ARM64_INS_SMAX: smax.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXv4i16, ARM64_INS_SMAX: smax.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXv4i32, ARM64_INS_SMAX: smax.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXv8i16, ARM64_INS_SMAX: smax.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMAXv8i8, ARM64_INS_SMAX: smax.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMC, ARM64_INS_SMC: smc $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_SMINPv16i8, ARM64_INS_SMINP: sminp.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINPv2i32, ARM64_INS_SMINP: sminp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINPv4i16, ARM64_INS_SMINP: sminp.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINPv4i32, ARM64_INS_SMINP: sminp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINPv8i16, ARM64_INS_SMINP: sminp.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINPv8i8, ARM64_INS_SMINP: sminp.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINVv16i8v, ARM64_INS_SMINV: sminv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMINVv4i16v, ARM64_INS_SMINV: sminv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMINVv4i32v, ARM64_INS_SMINV: sminv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMINVv8i16v, ARM64_INS_SMINV: sminv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMINVv8i8v, ARM64_INS_SMINV: sminv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SMINv16i8, ARM64_INS_SMIN: smin.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINv2i32, ARM64_INS_SMIN: smin.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINv4i16, ARM64_INS_SMIN: smin.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINv4i32, ARM64_INS_SMIN: smin.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINv8i16, ARM64_INS_SMIN: smin.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMINv8i8, ARM64_INS_SMIN: smin.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2: smlal2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL: smlal.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2: smlsl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL: smlsl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMOVvi16to32, ARM64_INS_SMOV: smov.h $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMOVvi16to64, ARM64_INS_SMOV: smov.h $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMOVvi32to64, ARM64_INS_SMOV: smov.s $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMOVvi8to32, ARM64_INS_SMOV: smov.b $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMOVvi8to64, ARM64_INS_SMOV: smov.b $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMSUBLrrr, ARM64_INS_SMSUBL: smsubl $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULHrr, ARM64_INS_SMULH: smulh $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2: smull2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL: smull.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQABSv16i8, ARM64_INS_SQABS: sqabs.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv1i16, ARM64_INS_SQABS: sqabs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv1i32, ARM64_INS_SQABS: sqabs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv1i64, ARM64_INS_SQABS: sqabs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv1i8, ARM64_INS_SQABS: sqabs $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv2i32, ARM64_INS_SQABS: sqabs.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv2i64, ARM64_INS_SQABS: sqabs.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv4i16, ARM64_INS_SQABS: sqabs.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv4i32, ARM64_INS_SQABS: sqabs.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv8i16, ARM64_INS_SQABS: sqabs.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQABSv8i8, ARM64_INS_SQABS: sqabs.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQADDv16i8, ARM64_INS_SQADD: sqadd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv1i16, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv1i32, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv1i64, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv1i8, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv2i32, ARM64_INS_SQADD: sqadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv2i64, ARM64_INS_SQADD: sqadd.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv4i16, ARM64_INS_SQADD: sqadd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv4i32, ARM64_INS_SQADD: sqadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv8i16, ARM64_INS_SQADD: sqadd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQADDv8i8, ARM64_INS_SQADD: sqadd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLALi16, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLALi32, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL: sqdmlal.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL: sqdmlsl.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH: sqdmulh.h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH: sqdmulh.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLi16, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLi32, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL: sqdmull.h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL: sqdmull.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv16i8, ARM64_INS_SQNEG: sqneg.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv1i16, ARM64_INS_SQNEG: sqneg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv1i32, ARM64_INS_SQNEG: sqneg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv1i64, ARM64_INS_SQNEG: sqneg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv1i8, ARM64_INS_SQNEG: sqneg $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv2i32, ARM64_INS_SQNEG: sqneg.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv2i64, ARM64_INS_SQNEG: sqneg.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv4i16, ARM64_INS_SQNEG: sqneg.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv4i32, ARM64_INS_SQNEG: sqneg.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv8i16, ARM64_INS_SQNEG: sqneg.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQNEGv8i8, ARM64_INS_SQNEG: sqneg.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL: sqrshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL: sqrshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL: sqrshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL: sqrshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL: sqrshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL: sqrshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL: sqrshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNb, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNh, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNs, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2: sqrshrn2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN: sqrshrn.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN: sqrshrn.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2: sqrshrn2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2: sqrshrn2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN: sqrshrn.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN: sqrshrun.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN: sqrshrun.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN: sqrshrun.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUb, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUd, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUh, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUs, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU: sqshlu.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU: sqshlu.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU: sqshlu.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU: sqshlu.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU: sqshlu.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU: sqshlu.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU: sqshlu.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLb, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLd, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLh, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLs, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv16i8, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv1i16, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv1i32, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv1i64, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv1i8, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv2i32, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv2i64, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv4i16, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv4i32, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv8i16, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv8i8, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNb, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNh, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNs, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2: sqshrn2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN: sqshrn.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN: sqshrn.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2: sqshrn2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2: sqshrn2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN: sqshrn.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNb, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNh, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNs, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2: sqshrun2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN: sqshrun.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN: sqshrun.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2: sqshrun2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2: sqshrun2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN: sqshrun.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv16i8, ARM64_INS_SQSUB: sqsub.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv1i16, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv1i32, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv1i64, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv1i8, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv2i32, ARM64_INS_SQSUB: sqsub.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv2i64, ARM64_INS_SQSUB: sqsub.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv4i16, ARM64_INS_SQSUB: sqsub.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv4i32, ARM64_INS_SQSUB: sqsub.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv8i16, ARM64_INS_SQSUB: sqsub.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQSUBv8i8, ARM64_INS_SQSUB: sqsub.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv16i8, ARM64_INS_SQXTN2: sqxtn2.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv1i16, ARM64_INS_SQXTN: sqxtn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv1i32, ARM64_INS_SQXTN: sqxtn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv1i8, ARM64_INS_SQXTN: sqxtn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv2i32, ARM64_INS_SQXTN: sqxtn.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv4i16, ARM64_INS_SQXTN: sqxtn.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv4i32, ARM64_INS_SQXTN2: sqxtn2.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv8i16, ARM64_INS_SQXTN2: sqxtn2.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTNv8i8, ARM64_INS_SQXTN: sqxtn.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2: sqxtun2.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN: sqxtun $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN: sqxtun $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN: sqxtun $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN: sqxtun.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN: sqxtun.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2: sqxtun2.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2: sqxtun2.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN: sqxtun.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_SRHADDv16i8, ARM64_INS_SRHADD: srhadd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRHADDv2i32, ARM64_INS_SRHADD: srhadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRHADDv4i16, ARM64_INS_SRHADD: srhadd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRHADDv4i32, ARM64_INS_SRHADD: srhadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRHADDv8i16, ARM64_INS_SRHADD: srhadd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRHADDv8i8, ARM64_INS_SRHADD: srhadd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRId, ARM64_INS_SRI: sri $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv16i8_shift, ARM64_INS_SRI: sri.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv2i32_shift, ARM64_INS_SRI: sri.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv2i64_shift, ARM64_INS_SRI: sri.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv4i16_shift, ARM64_INS_SRI: sri.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv4i32_shift, ARM64_INS_SRI: sri.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv8i16_shift, ARM64_INS_SRI: sri.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRIv8i8_shift, ARM64_INS_SRI: sri.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv16i8, ARM64_INS_SRSHL: srshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv1i64, ARM64_INS_SRSHL: srshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv2i32, ARM64_INS_SRSHL: srshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv2i64, ARM64_INS_SRSHL: srshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv4i16, ARM64_INS_SRSHL: srshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv4i32, ARM64_INS_SRSHL: srshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv8i16, ARM64_INS_SRSHL: srshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHLv8i8, ARM64_INS_SRSHL: srshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRd, ARM64_INS_SRSHR: srshr $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR: srshr.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR: srshr.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR: srshr.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR: srshr.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR: srshr.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR: srshr.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR: srshr.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAd, ARM64_INS_SRSRA: srsra $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA: srsra.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA: srsra.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA: srsra.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA: srsra.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA: srsra.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA: srsra.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA: srsra.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2: sshll2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL: sshll.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL: sshll.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2: sshll2.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2: sshll2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL: sshll.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv16i8, ARM64_INS_SSHL: sshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv1i64, ARM64_INS_SSHL: sshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv2i32, ARM64_INS_SSHL: sshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv2i64, ARM64_INS_SSHL: sshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv4i16, ARM64_INS_SSHL: sshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv4i32, ARM64_INS_SSHL: sshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv8i16, ARM64_INS_SSHL: sshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHLv8i8, ARM64_INS_SSHL: sshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRd, ARM64_INS_SSHR: sshr $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv16i8_shift, ARM64_INS_SSHR: sshr.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv2i32_shift, ARM64_INS_SSHR: sshr.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv2i64_shift, ARM64_INS_SSHR: sshr.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv4i16_shift, ARM64_INS_SSHR: sshr.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv4i32_shift, ARM64_INS_SSHR: sshr.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv8i16_shift, ARM64_INS_SSHR: sshr.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSHRv8i8_shift, ARM64_INS_SSHR: sshr.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAd, ARM64_INS_SSRA: ssra $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv16i8_shift, ARM64_INS_SSRA: ssra.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv2i32_shift, ARM64_INS_SSRA: ssra.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv2i64_shift, ARM64_INS_SSRA: ssra.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv4i16_shift, ARM64_INS_SSRA: ssra.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv4i32_shift, ARM64_INS_SSRA: ssra.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv8i16_shift, ARM64_INS_SSRA: ssra.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSRAv8i8_shift, ARM64_INS_SSRA: ssra.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2: ssubl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL: ssubl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL: ssubl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2: ssubl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2: ssubl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL: ssubl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2: ssubw2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW: ssubw.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW: ssubw.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2: ssubw2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2: ssubw2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW: ssubw.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv16b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv1d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv2d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv2s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv4h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv4s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv8b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv8h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Fourv8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev16b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev1d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev2d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev2s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev4h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev4s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev8b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Onev8h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Onev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev16b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev1d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev2d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev2s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev4h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev4s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev8b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Threev8h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Threev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov16b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov1d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov2d, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov2s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov4h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov4s, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov8b, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1Twov8h, ARM64_INS_ST1: st1 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1Twov8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1i16, ARM64_INS_ST1: st1 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1i16_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1i32, ARM64_INS_ST1: st1 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1i32_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1i64, ARM64_INS_ST1: st1 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1i64_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST1i8, ARM64_INS_ST1: st1 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST1i8_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov16b, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov16b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov2d, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov2d_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov2s, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov2s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov4h, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov4h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov4s, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov4s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov8b, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov8b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2Twov8h, ARM64_INS_ST2: st2 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2Twov8h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2i16, ARM64_INS_ST2: st2 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2i16_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2i32, ARM64_INS_ST2: st2 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2i32_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2i64, ARM64_INS_ST2: st2 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2i64_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST2i8, ARM64_INS_ST2: st2 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST2i8_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev16b, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev16b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev2d, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev2d_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev2s, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev2s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev4h, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev4h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev4s, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev4s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev8b, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev8b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3Threev8h, ARM64_INS_ST3: st3 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3Threev8h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3i16, ARM64_INS_ST3: st3 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3i16_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3i32, ARM64_INS_ST3: st3 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3i32_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3i64, ARM64_INS_ST3: st3 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3i64_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST3i8, ARM64_INS_ST3: st3 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST3i8_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv16b, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv16b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv2d, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv2d_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv2s, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv2s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv4h, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv4h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv4s, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv4s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv8b, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv8b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv8h, ARM64_INS_ST4: st4 $vt, [$rn] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4Fourv8h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4i16, ARM64_INS_ST4: st4 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4i16_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4i32, ARM64_INS_ST4: st4 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4i32_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4i64, ARM64_INS_ST4: st4 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4i64_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ST4i8, ARM64_INS_ST4: st4 $vt$idx, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 } }, { /* AArch64_ST4i8_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLRB, ARM64_INS_STLRB: stlrb $rt, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLRH, ARM64_INS_STLRH: stlrh $rt, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLRW, ARM64_INS_STLR: stlr $rt, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLRX, ARM64_INS_STLR: stlr $rt, [$rn] */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLXPW, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLXPX, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLXRB, ARM64_INS_STLXRB: stlxrb $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLXRH, ARM64_INS_STLXRH: stlxrh $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLXRW, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STLXRX, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STNPDi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STNPQi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STNPSi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STNPWi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STNPXi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPDi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPDpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPDpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPQi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPQpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPQpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPSi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPSpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPSpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPWi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPWpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPWpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPXi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPXpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STPXpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRBBpost, ARM64_INS_STRB: strb $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRBBpre, ARM64_INS_STRB: strb $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRBBroW, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRBBroX, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRBBui, ARM64_INS_STRB: strb $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRBpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRBpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRBroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRBroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRBui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRDpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRDpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRDroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRDroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRDui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRHHpost, ARM64_INS_STRH: strh $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRHHpre, ARM64_INS_STRH: strh $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRHHroW, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRHHroX, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRHHui, ARM64_INS_STRH: strh $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRHpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRHpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRHroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRHroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRHui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRQpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRQpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRQroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRQroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRQui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRSpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRSpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRSroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRSroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRSui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRWpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRWpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRWroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRWroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRWui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRXpost, ARM64_INS_STR: str $rt, [$rn], $offset */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRXpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STRXroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRXroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STRXui, ARM64_INS_STR: str $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STTRBi, ARM64_INS_STTRB: sttrb $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STTRHi, ARM64_INS_STTRH: sttrh $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STTRWi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STTRXi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURBBi, ARM64_INS_STURB: sturb $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURBi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURDi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURHHi, ARM64_INS_STURH: sturh $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURHi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURQi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURSi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURWi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STURXi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */ 0, { CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STXPW, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STXPX, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_STXRB, ARM64_INS_STXRB: stxrb $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STXRH, ARM64_INS_STXRH: stxrh $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STXRW, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_STXRX, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN: subhn.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2: subhn2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN: subhn.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2: subhn2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2: subhn2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN: subhn.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSWri, ARM64_INS_SUBS: subs $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSWrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSWrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSXri, ARM64_INS_SUBS: subs $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSXrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSXrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBSXrx64, ARM64_INS_SUBS: subs $rd, $rn, $rm$ext */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SUBWri, ARM64_INS_SUB: sub $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBWrs, ARM64_INS_SUB: sub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBWrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBXri, ARM64_INS_SUB: sub $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBXrs, ARM64_INS_SUB: sub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBXrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBXrx64, ARM64_INS_SUB: sub $rd, $rn, $rm$ext */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SUBv16i8, ARM64_INS_SUB: sub.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv1i64, ARM64_INS_SUB: sub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv2i32, ARM64_INS_SUB: sub.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv2i64, ARM64_INS_SUB: sub.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv4i16, ARM64_INS_SUB: sub.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv4i32, ARM64_INS_SUB: sub.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv8i16, ARM64_INS_SUB: sub.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUBv8i8, ARM64_INS_SUB: sub.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv16i8, ARM64_INS_SUQADD: suqadd.16b $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv1i16, ARM64_INS_SUQADD: suqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv1i32, ARM64_INS_SUQADD: suqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv1i64, ARM64_INS_SUQADD: suqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv1i8, ARM64_INS_SUQADD: suqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv2i32, ARM64_INS_SUQADD: suqadd.2s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv2i64, ARM64_INS_SUQADD: suqadd.2d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv4i16, ARM64_INS_SUQADD: suqadd.4h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv4i32, ARM64_INS_SUQADD: suqadd.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv8i16, ARM64_INS_SUQADD: suqadd.8h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SUQADDv8i8, ARM64_INS_SUQADD: suqadd.8b $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_SVC, ARM64_INS_SVC: svc $imm */ 0, { CS_AC_READ, 0 } }, { /* AArch64_SYSLxt, ARM64_INS_SYSL: sysl $rt, $op1, $cn, $cm, $op2 */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ } }, { /* AArch64_SYSxt, ARM64_INS_SYS: sys $op1, $cn, $cm, $op2, $rt */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ } }, { /* AArch64_TBLv16i8Four, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv16i8One, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv16i8Three, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv16i8Two, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv8i8Four, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv8i8One, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv8i8Three, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBLv8i8Two, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBNZW, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBNZX, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv16i8Four, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv16i8One, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv16i8Three, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv16i8Two, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv8i8Four, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv8i8One, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv8i8Three, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBXv8i8Two, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBZW, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TBZX, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v16i8, ARM64_INS_TRN1: trn1.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v2i32, ARM64_INS_TRN1: trn1.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v2i64, ARM64_INS_TRN1: trn1.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v4i16, ARM64_INS_TRN1: trn1.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v4i32, ARM64_INS_TRN1: trn1.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v8i16, ARM64_INS_TRN1: trn1.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN1v8i8, ARM64_INS_TRN1: trn1.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v16i8, ARM64_INS_TRN2: trn2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v2i32, ARM64_INS_TRN2: trn2.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v2i64, ARM64_INS_TRN2: trn2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v4i16, ARM64_INS_TRN2: trn2.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v4i32, ARM64_INS_TRN2: trn2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v8i16, ARM64_INS_TRN2: trn2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_TRN2v8i8, ARM64_INS_TRN2: trn2.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2: uabal2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL: uabal.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL: uabal.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2: uabal2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2: uabal2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL: uabal.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABAv16i8, ARM64_INS_UABA: uaba.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABAv2i32, ARM64_INS_UABA: uaba.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABAv4i16, ARM64_INS_UABA: uaba.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABAv4i32, ARM64_INS_UABA: uaba.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABAv8i16, ARM64_INS_UABA: uaba.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABAv8i8, ARM64_INS_UABA: uaba.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2: uabdl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL: uabdl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL: uabdl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2: uabdl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2: uabdl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL: uabdl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDv16i8, ARM64_INS_UABD: uabd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDv2i32, ARM64_INS_UABD: uabd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDv4i16, ARM64_INS_UABD: uabd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDv4i32, ARM64_INS_UABD: uabd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDv8i16, ARM64_INS_UABD: uabd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UABDv8i8, ARM64_INS_UABD: uabd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP: uadalp.8h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP: uadalp.1d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP: uadalp.2s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP: uadalp.2d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP: uadalp.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP: uadalp.4h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP: uaddlp.8h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP: uaddlp.1d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP: uaddlp.2s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP: uaddlp.2d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP: uaddlp.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP: uaddlp.4h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLVv16i8v, ARM64_INS_UADDLV: uaddlv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UADDLVv4i16v, ARM64_INS_UADDLV: uaddlv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UADDLVv4i32v, ARM64_INS_UADDLV: uaddlv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UADDLVv8i16v, ARM64_INS_UADDLV: uaddlv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UADDLVv8i8v, ARM64_INS_UADDLV: uaddlv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2: uaddl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL: uaddl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL: uaddl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2: uaddl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2: uaddl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL: uaddl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2: uaddw2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW: uaddw.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW: uaddw.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2: uaddw2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2: uaddw2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW: uaddw.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UBFMWri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UBFMXri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFSWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFSWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFSXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFSXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFUWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFUWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFUXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFUXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFd, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFs, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv1i32, ARM64_INS_UCVTF: ucvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv1i64, ARM64_INS_UCVTF: ucvtf $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv2f32, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv2f64, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv4f32, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UDIVWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UDIVXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UDIV_IntWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UDIV_IntXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHADDv16i8, ARM64_INS_UHADD: uhadd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHADDv2i32, ARM64_INS_UHADD: uhadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHADDv4i16, ARM64_INS_UHADD: uhadd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHADDv4i32, ARM64_INS_UHADD: uhadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHADDv8i16, ARM64_INS_UHADD: uhadd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHADDv8i8, ARM64_INS_UHADD: uhadd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHSUBv16i8, ARM64_INS_UHSUB: uhsub.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHSUBv2i32, ARM64_INS_UHSUB: uhsub.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHSUBv4i16, ARM64_INS_UHSUB: uhsub.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHSUBv4i32, ARM64_INS_UHSUB: uhsub.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHSUBv8i16, ARM64_INS_UHSUB: uhsub.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UHSUBv8i8, ARM64_INS_UHSUB: uhsub.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMADDLrrr, ARM64_INS_UMADDL: umaddl $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXPv16i8, ARM64_INS_UMAXP: umaxp.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXPv2i32, ARM64_INS_UMAXP: umaxp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXPv4i16, ARM64_INS_UMAXP: umaxp.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXPv4i32, ARM64_INS_UMAXP: umaxp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXPv8i16, ARM64_INS_UMAXP: umaxp.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXPv8i8, ARM64_INS_UMAXP: umaxp.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXVv16i8v, ARM64_INS_UMAXV: umaxv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMAXVv4i16v, ARM64_INS_UMAXV: umaxv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMAXVv4i32v, ARM64_INS_UMAXV: umaxv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMAXVv8i16v, ARM64_INS_UMAXV: umaxv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMAXVv8i8v, ARM64_INS_UMAXV: umaxv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMAXv16i8, ARM64_INS_UMAX: umax.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXv2i32, ARM64_INS_UMAX: umax.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXv4i16, ARM64_INS_UMAX: umax.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXv4i32, ARM64_INS_UMAX: umax.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXv8i16, ARM64_INS_UMAX: umax.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMAXv8i8, ARM64_INS_UMAX: umax.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINPv16i8, ARM64_INS_UMINP: uminp.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINPv2i32, ARM64_INS_UMINP: uminp.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINPv4i16, ARM64_INS_UMINP: uminp.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINPv4i32, ARM64_INS_UMINP: uminp.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINPv8i16, ARM64_INS_UMINP: uminp.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINPv8i8, ARM64_INS_UMINP: uminp.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINVv16i8v, ARM64_INS_UMINV: uminv.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMINVv4i16v, ARM64_INS_UMINV: uminv.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMINVv4i32v, ARM64_INS_UMINV: uminv.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMINVv8i16v, ARM64_INS_UMINV: uminv.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMINVv8i8v, ARM64_INS_UMINV: uminv.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UMINv16i8, ARM64_INS_UMIN: umin.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINv2i32, ARM64_INS_UMIN: umin.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINv4i16, ARM64_INS_UMIN: umin.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINv4i32, ARM64_INS_UMIN: umin.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINv8i16, ARM64_INS_UMIN: umin.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMINv8i8, ARM64_INS_UMIN: umin.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2: umlal2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL: umlal.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2: umlsl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL: umlsl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMOVvi16, ARM64_INS_UMOV: umov.h $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMOVvi32, ARM64_INS_UMOV: umov.s $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMOVvi64, ARM64_INS_UMOV: umov.d $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMOVvi8, ARM64_INS_UMOV: umov.b $rd, $rn$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMSUBLrrr, ARM64_INS_UMSUBL: umsubl $rd, $rn, $rm, $ra */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULHrr, ARM64_INS_UMULH: umulh $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2: umull2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm$idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL: umull.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv16i8, ARM64_INS_UQADD: uqadd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv1i16, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv1i32, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv1i64, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv1i8, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv2i32, ARM64_INS_UQADD: uqadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv2i64, ARM64_INS_UQADD: uqadd.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv4i16, ARM64_INS_UQADD: uqadd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv4i32, ARM64_INS_UQADD: uqadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv8i16, ARM64_INS_UQADD: uqadd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQADDv8i8, ARM64_INS_UQADD: uqadd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL: uqrshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL: uqrshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL: uqrshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL: uqrshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL: uqrshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL: uqrshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL: uqrshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNb, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNh, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNs, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2: uqrshrn2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN: uqrshrn.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN: uqrshrn.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2: uqrshrn2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2: uqrshrn2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN: uqrshrn.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLb, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLd, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLh, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLs, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv16i8, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv1i16, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv1i32, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv1i64, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv1i8, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv2i32, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv2i64, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv4i16, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv4i32, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv8i16, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv8i8, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNb, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNh, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNs, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2: uqshrn2.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN: uqshrn.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN: uqshrn.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2: uqshrn2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2: uqshrn2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN: uqshrn.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv16i8, ARM64_INS_UQSUB: uqsub.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv1i16, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv1i32, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv1i64, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv1i8, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv2i32, ARM64_INS_UQSUB: uqsub.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv2i64, ARM64_INS_UQSUB: uqsub.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv4i16, ARM64_INS_UQSUB: uqsub.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv4i32, ARM64_INS_UQSUB: uqsub.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv8i16, ARM64_INS_UQSUB: uqsub.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQSUBv8i8, ARM64_INS_UQSUB: uqsub.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv16i8, ARM64_INS_UQXTN2: uqxtn2.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv1i16, ARM64_INS_UQXTN: uqxtn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv1i32, ARM64_INS_UQXTN: uqxtn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv1i8, ARM64_INS_UQXTN: uqxtn $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv2i32, ARM64_INS_UQXTN: uqxtn.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv4i16, ARM64_INS_UQXTN: uqxtn.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv4i32, ARM64_INS_UQXTN2: uqxtn2.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv8i16, ARM64_INS_UQXTN2: uqxtn2.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_UQXTNv8i8, ARM64_INS_UQXTN: uqxtn.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_URECPEv2i32, ARM64_INS_URECPE: urecpe.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_URECPEv4i32, ARM64_INS_URECPE: urecpe.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_URHADDv16i8, ARM64_INS_URHADD: urhadd.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URHADDv2i32, ARM64_INS_URHADD: urhadd.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URHADDv4i16, ARM64_INS_URHADD: urhadd.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URHADDv4i32, ARM64_INS_URHADD: urhadd.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URHADDv8i16, ARM64_INS_URHADD: urhadd.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URHADDv8i8, ARM64_INS_URHADD: urhadd.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv16i8, ARM64_INS_URSHL: urshl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv1i64, ARM64_INS_URSHL: urshl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv2i32, ARM64_INS_URSHL: urshl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv2i64, ARM64_INS_URSHL: urshl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv4i16, ARM64_INS_URSHL: urshl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv4i32, ARM64_INS_URSHL: urshl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv8i16, ARM64_INS_URSHL: urshl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHLv8i8, ARM64_INS_URSHL: urshl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRd, ARM64_INS_URSHR: urshr $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv16i8_shift, ARM64_INS_URSHR: urshr.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv2i32_shift, ARM64_INS_URSHR: urshr.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv2i64_shift, ARM64_INS_URSHR: urshr.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv4i16_shift, ARM64_INS_URSHR: urshr.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv4i32_shift, ARM64_INS_URSHR: urshr.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv8i16_shift, ARM64_INS_URSHR: urshr.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSHRv8i8_shift, ARM64_INS_URSHR: urshr.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE: ursqrte.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE: ursqrte.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_URSRAd, ARM64_INS_URSRA: ursra $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv16i8_shift, ARM64_INS_URSRA: ursra.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv2i32_shift, ARM64_INS_URSRA: ursra.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv2i64_shift, ARM64_INS_URSRA: ursra.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv4i16_shift, ARM64_INS_URSRA: ursra.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv4i32_shift, ARM64_INS_URSRA: ursra.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv8i16_shift, ARM64_INS_URSRA: ursra.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_URSRAv8i8_shift, ARM64_INS_URSRA: ursra.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2: ushll2.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLLv2i32_shift, ARM64_INS_USHLL: ushll.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLLv4i16_shift, ARM64_INS_USHLL: ushll.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2: ushll2.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2: ushll2.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLLv8i8_shift, ARM64_INS_USHLL: ushll.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv16i8, ARM64_INS_USHL: ushl.16b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv1i64, ARM64_INS_USHL: ushl $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv2i32, ARM64_INS_USHL: ushl.2s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv2i64, ARM64_INS_USHL: ushl.2d $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv4i16, ARM64_INS_USHL: ushl.4h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv4i32, ARM64_INS_USHL: ushl.4s $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv8i16, ARM64_INS_USHL: ushl.8h $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHLv8i8, ARM64_INS_USHL: ushl.8b $rd, $rn, $rm| */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRd, ARM64_INS_USHR: ushr $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv16i8_shift, ARM64_INS_USHR: ushr.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv2i32_shift, ARM64_INS_USHR: ushr.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv2i64_shift, ARM64_INS_USHR: ushr.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv4i16_shift, ARM64_INS_USHR: ushr.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv4i32_shift, ARM64_INS_USHR: ushr.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv8i16_shift, ARM64_INS_USHR: ushr.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USHRv8i8_shift, ARM64_INS_USHR: ushr.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv16i8, ARM64_INS_USQADD: usqadd.16b $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv1i16, ARM64_INS_USQADD: usqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv1i32, ARM64_INS_USQADD: usqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv1i64, ARM64_INS_USQADD: usqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv1i8, ARM64_INS_USQADD: usqadd $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv2i32, ARM64_INS_USQADD: usqadd.2s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv2i64, ARM64_INS_USQADD: usqadd.2d $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv4i16, ARM64_INS_USQADD: usqadd.4h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv4i32, ARM64_INS_USQADD: usqadd.4s $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv8i16, ARM64_INS_USQADD: usqadd.8h $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USQADDv8i8, ARM64_INS_USQADD: usqadd.8b $rd, $rn */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAd, ARM64_INS_USRA: usra $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv16i8_shift, ARM64_INS_USRA: usra.16b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv2i32_shift, ARM64_INS_USRA: usra.2s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv2i64_shift, ARM64_INS_USRA: usra.2d $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv4i16_shift, ARM64_INS_USRA: usra.4h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv4i32_shift, ARM64_INS_USRA: usra.4s $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv8i16_shift, ARM64_INS_USRA: usra.8h $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USRAv8i8_shift, ARM64_INS_USRA: usra.8b $rd, $rn, $imm */ 0, { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2: usubl2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL: usubl.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL: usubl.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2: usubl2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2: usubl2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL: usubl.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2: usubw2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW: usubw.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW: usubw.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2: usubw2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2: usubw2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW: usubw.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v16i8, ARM64_INS_UZP1: uzp1.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v2i32, ARM64_INS_UZP1: uzp1.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v2i64, ARM64_INS_UZP1: uzp1.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v4i16, ARM64_INS_UZP1: uzp1.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v4i32, ARM64_INS_UZP1: uzp1.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v8i16, ARM64_INS_UZP1: uzp1.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP1v8i8, ARM64_INS_UZP1: uzp1.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v16i8, ARM64_INS_UZP2: uzp2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v2i32, ARM64_INS_UZP2: uzp2.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v2i64, ARM64_INS_UZP2: uzp2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v4i16, ARM64_INS_UZP2: uzp2.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v4i32, ARM64_INS_UZP2: uzp2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v8i16, ARM64_INS_UZP2: uzp2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_UZP2v8i8, ARM64_INS_UZP2: uzp2.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_XTNv16i8, ARM64_INS_XTN2: xtn2.16b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_XTNv2i32, ARM64_INS_XTN: xtn.2s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_XTNv4i16, ARM64_INS_XTN: xtn.4h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_XTNv4i32, ARM64_INS_XTN2: xtn2.4s $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_XTNv8i16, ARM64_INS_XTN2: xtn2.8h $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_XTNv8i8, ARM64_INS_XTN: xtn.8b $rd, $rn */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v16i8, ARM64_INS_ZIP1: zip1.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v2i32, ARM64_INS_ZIP1: zip1.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v2i64, ARM64_INS_ZIP1: zip1.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v4i16, ARM64_INS_ZIP1: zip1.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v4i32, ARM64_INS_ZIP1: zip1.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v8i16, ARM64_INS_ZIP1: zip1.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP1v8i8, ARM64_INS_ZIP1: zip1.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v16i8, ARM64_INS_ZIP2: zip2.16b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v2i32, ARM64_INS_ZIP2: zip2.2s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v2i64, ARM64_INS_ZIP2: zip2.2d $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v4i16, ARM64_INS_ZIP2: zip2.4h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v4i32, ARM64_INS_ZIP2: zip2.4s $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v8i16, ARM64_INS_ZIP2: zip2.8h $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* AArch64_ZIP2v8i8, ARM64_INS_ZIP2: zip2.8b $rd, $rn, $rm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } } capstone-sys-0.11.0/capstone/arch/AArch64/AArch64Module.c010066400017500001750000000017241363402546700210050ustar0000000000000000/* Capstone Disassembly Engine */ /* By Dang Hoang Vu 2013 */ #ifdef CAPSTONE_HAS_ARM64 #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "AArch64Disassembler.h" #include "AArch64InstPrinter.h" #include "AArch64Mapping.h" #include "AArch64Module.h" cs_err AArch64_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); AArch64_init(mri); ud->printer = AArch64_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = AArch64_getInstruction; ud->reg_name = AArch64_reg_name; ud->insn_id = AArch64_get_insn_id; ud->insn_name = AArch64_insn_name; ud->group_name = AArch64_group_name; ud->post_printer = AArch64_post_printer; #ifndef CAPSTONE_DIET ud->reg_access = AArch64_reg_access; #endif return CS_ERR_OK; } cs_err AArch64_option(cs_struct *handle, cs_opt_type type, size_t value) { if (type == CS_OPT_MODE) { handle->mode = (cs_mode)value; } return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/AArch64/AArch64Module.h010066400017500001750000000004511363402546700210060ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_AARCH64_MODULE_H #define CS_AARCH64_MODULE_H #include "../../utils.h" cs_err AArch64_global_init(cs_struct *ud); cs_err AArch64_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMAddressingModes.h010066400017500001750000000474471363402546700214320ustar0000000000000000//===-- ARMAddressingModes.h - ARM Addressing Modes -------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the ARM addressing mode implementation stuff. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_LLVM_TARGET_ARM_ARMADDRESSINGMODES_H #define CS_LLVM_TARGET_ARM_ARMADDRESSINGMODES_H #include "capstone/platform.h" #include "../../MathExtras.h" /// ARM_AM - ARM Addressing Mode Stuff typedef enum ARM_AM_ShiftOpc { ARM_AM_no_shift = 0, ARM_AM_asr, ARM_AM_lsl, ARM_AM_lsr, ARM_AM_ror, ARM_AM_rrx } ARM_AM_ShiftOpc; typedef enum ARM_AM_AddrOpc { ARM_AM_sub = 0, ARM_AM_add } ARM_AM_AddrOpc; static inline const char *ARM_AM_getAddrOpcStr(ARM_AM_AddrOpc Op) { return Op == ARM_AM_sub ? "-" : ""; } static inline const char *ARM_AM_getShiftOpcStr(ARM_AM_ShiftOpc Op) { switch (Op) { default: return ""; //llvm_unreachable("Unknown shift opc!"); case ARM_AM_asr: return "asr"; case ARM_AM_lsl: return "lsl"; case ARM_AM_lsr: return "lsr"; case ARM_AM_ror: return "ror"; case ARM_AM_rrx: return "rrx"; } } static inline unsigned ARM_AM_getShiftOpcEncoding(ARM_AM_ShiftOpc Op) { switch (Op) { default: return (unsigned int)-1; //llvm_unreachable("Unknown shift opc!"); case ARM_AM_asr: return 2; case ARM_AM_lsl: return 0; case ARM_AM_lsr: return 1; case ARM_AM_ror: return 3; } } typedef enum ARM_AM_AMSubMode { ARM_AM_bad_am_submode = 0, ARM_AM_ia, ARM_AM_ib, ARM_AM_da, ARM_AM_db } ARM_AM_AMSubMode; static inline const char *ARM_AM_getAMSubModeStr(ARM_AM_AMSubMode Mode) { switch (Mode) { default: return ""; case ARM_AM_ia: return "ia"; case ARM_AM_ib: return "ib"; case ARM_AM_da: return "da"; case ARM_AM_db: return "db"; } } /// rotr32 - Rotate a 32-bit unsigned value right by a specified # bits. /// static inline unsigned rotr32(unsigned Val, unsigned Amt) { //assert(Amt < 32 && "Invalid rotate amount"); return (Val >> Amt) | (Val << ((32-Amt)&31)); } /// rotl32 - Rotate a 32-bit unsigned value left by a specified # bits. /// static inline unsigned rotl32(unsigned Val, unsigned Amt) { //assert(Amt < 32 && "Invalid rotate amount"); return (Val << Amt) | (Val >> ((32-Amt)&31)); } //===--------------------------------------------------------------------===// // Addressing Mode #1: shift_operand with registers //===--------------------------------------------------------------------===// // // This 'addressing mode' is used for arithmetic instructions. It can // represent things like: // reg // reg [asr|lsl|lsr|ror|rrx] reg // reg [asr|lsl|lsr|ror|rrx] imm // // This is stored three operands [rega, regb, opc]. The first is the base // reg, the second is the shift amount (or reg0 if not present or imm). The // third operand encodes the shift opcode and the imm if a reg isn't present. // static inline unsigned getSORegOpc(ARM_AM_ShiftOpc ShOp, unsigned Imm) { return ShOp | (Imm << 3); } static inline unsigned getSORegOffset(unsigned Op) { return Op >> 3; } static inline ARM_AM_ShiftOpc ARM_AM_getSORegShOp(unsigned Op) { return (ARM_AM_ShiftOpc)(Op & 7); } /// getSOImmValImm - Given an encoded imm field for the reg/imm form, return /// the 8-bit imm value. static inline unsigned getSOImmValImm(unsigned Imm) { return Imm & 0xFF; } /// getSOImmValRot - Given an encoded imm field for the reg/imm form, return /// the rotate amount. static inline unsigned getSOImmValRot(unsigned Imm) { return (Imm >> 8) * 2; } /// getSOImmValRotate - Try to handle Imm with an immediate shifter operand, /// computing the rotate amount to use. If this immediate value cannot be /// handled with a single shifter-op, determine a good rotate amount that will /// take a maximal chunk of bits out of the immediate. static inline unsigned getSOImmValRotate(unsigned Imm) { unsigned TZ, RotAmt; // 8-bit (or less) immediates are trivially shifter_operands with a rotate // of zero. if ((Imm & ~255U) == 0) return 0; // Use CTZ to compute the rotate amount. TZ = CountTrailingZeros_32(Imm); // Rotate amount must be even. Something like 0x200 must be rotated 8 bits, // not 9. RotAmt = TZ & ~1; // If we can handle this spread, return it. if ((rotr32(Imm, RotAmt) & ~255U) == 0) return (32-RotAmt)&31; // HW rotates right, not left. // For values like 0xF000000F, we should ignore the low 6 bits, then // retry the hunt. if (Imm & 63U) { unsigned TZ2 = CountTrailingZeros_32(Imm & ~63U); unsigned RotAmt2 = TZ2 & ~1; if ((rotr32(Imm, RotAmt2) & ~255U) == 0) return (32-RotAmt2)&31; // HW rotates right, not left. } // Otherwise, we have no way to cover this span of bits with a single // shifter_op immediate. Return a chunk of bits that will be useful to // handle. return (32-RotAmt)&31; // HW rotates right, not left. } /// getSOImmVal - Given a 32-bit immediate, if it is something that can fit /// into an shifter_operand immediate operand, return the 12-bit encoding for /// it. If not, return -1. static inline int getSOImmVal(unsigned Arg) { unsigned RotAmt; // 8-bit (or less) immediates are trivially shifter_operands with a rotate // of zero. if ((Arg & ~255U) == 0) return Arg; RotAmt = getSOImmValRotate(Arg); // If this cannot be handled with a single shifter_op, bail out. if (rotr32(~255U, RotAmt) & Arg) return -1; // Encode this correctly. return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8); } /// isSOImmTwoPartVal - Return true if the specified value can be obtained by /// or'ing together two SOImmVal's. static inline bool isSOImmTwoPartVal(unsigned V) { // If this can be handled with a single shifter_op, bail out. V = rotr32(~255U, getSOImmValRotate(V)) & V; if (V == 0) return false; // If this can be handled with two shifter_op's, accept. V = rotr32(~255U, getSOImmValRotate(V)) & V; return V == 0; } /// getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, /// return the first chunk of it. static inline unsigned getSOImmTwoPartFirst(unsigned V) { return rotr32(255U, getSOImmValRotate(V)) & V; } /// getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, /// return the second chunk of it. static inline unsigned getSOImmTwoPartSecond(unsigned V) { // Mask out the first hunk. V = rotr32(~255U, getSOImmValRotate(V)) & V; // Take what's left. //assert(V == (rotr32(255U, getSOImmValRotate(V)) & V)); return V; } /// getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed /// by a left shift. Returns the shift amount to use. static inline unsigned getThumbImmValShift(unsigned Imm) { // 8-bit (or less) immediates are trivially immediate operand with a shift // of zero. if ((Imm & ~255U) == 0) return 0; // Use CTZ to compute the shift amount. return CountTrailingZeros_32(Imm); } /// isThumbImmShiftedVal - Return true if the specified value can be obtained /// by left shifting a 8-bit immediate. static inline bool isThumbImmShiftedVal(unsigned V) { // If this can be handled with V = (~255U << getThumbImmValShift(V)) & V; return V == 0; } /// getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed /// by a left shift. Returns the shift amount to use. static inline unsigned getThumbImm16ValShift(unsigned Imm) { // 16-bit (or less) immediates are trivially immediate operand with a shift // of zero. if ((Imm & ~65535U) == 0) return 0; // Use CTZ to compute the shift amount. return CountTrailingZeros_32(Imm); } /// isThumbImm16ShiftedVal - Return true if the specified value can be /// obtained by left shifting a 16-bit immediate. static inline bool isThumbImm16ShiftedVal(unsigned V) { // If this can be handled with V = (~65535U << getThumbImm16ValShift(V)) & V; return V == 0; } /// getThumbImmNonShiftedVal - If V is a value that satisfies /// isThumbImmShiftedVal, return the non-shiftd value. static inline unsigned getThumbImmNonShiftedVal(unsigned V) { return V >> getThumbImmValShift(V); } /// getT2SOImmValSplat - Return the 12-bit encoded representation /// if the specified value can be obtained by splatting the low 8 bits /// into every other byte or every byte of a 32-bit value. i.e., /// 00000000 00000000 00000000 abcdefgh control = 0 /// 00000000 abcdefgh 00000000 abcdefgh control = 1 /// abcdefgh 00000000 abcdefgh 00000000 control = 2 /// abcdefgh abcdefgh abcdefgh abcdefgh control = 3 /// Return -1 if none of the above apply. /// See ARM Reference Manual A6.3.2. static inline int getT2SOImmValSplatVal(unsigned V) { unsigned u, Vs, Imm; // control = 0 if ((V & 0xffffff00) == 0) return V; // If the value is zeroes in the first byte, just shift those off Vs = ((V & 0xff) == 0) ? V >> 8 : V; // Any passing value only has 8 bits of payload, splatted across the word Imm = Vs & 0xff; // Likewise, any passing values have the payload splatted into the 3rd byte u = Imm | (Imm << 16); // control = 1 or 2 if (Vs == u) return (((Vs == V) ? 1 : 2) << 8) | Imm; // control = 3 if (Vs == (u | (u << 8))) return (3 << 8) | Imm; return -1; } /// getT2SOImmValRotateVal - Return the 12-bit encoded representation if the /// specified value is a rotated 8-bit value. Return -1 if no rotation /// encoding is possible. /// See ARM Reference Manual A6.3.2. static inline int getT2SOImmValRotateVal(unsigned V) { unsigned RotAmt = CountLeadingZeros_32(V); if (RotAmt >= 24) return -1; // If 'Arg' can be handled with a single shifter_op return the value. if ((rotr32(0xff000000U, RotAmt) & V) == V) return (rotr32(V, 24 - RotAmt) & 0x7f) | ((RotAmt + 8) << 7); return -1; } /// getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit /// into a Thumb-2 shifter_operand immediate operand, return the 12-bit /// encoding for it. If not, return -1. /// See ARM Reference Manual A6.3.2. static inline int getT2SOImmVal(unsigned Arg) { int Rot; // If 'Arg' is an 8-bit splat, then get the encoded value. int Splat = getT2SOImmValSplatVal(Arg); if (Splat != -1) return Splat; // If 'Arg' can be handled with a single shifter_op return the value. Rot = getT2SOImmValRotateVal(Arg); if (Rot != -1) return Rot; return -1; } static inline unsigned getT2SOImmValRotate(unsigned V) { unsigned RotAmt; if ((V & ~255U) == 0) return 0; // Use CTZ to compute the rotate amount. RotAmt = CountTrailingZeros_32(V); return (32 - RotAmt) & 31; } static inline bool isT2SOImmTwoPartVal (unsigned Imm) { unsigned V = Imm; // Passing values can be any combination of splat values and shifter // values. If this can be handled with a single shifter or splat, bail // out. Those should be handled directly, not with a two-part val. if (getT2SOImmValSplatVal(V) != -1) return false; V = rotr32 (~255U, getT2SOImmValRotate(V)) & V; if (V == 0) return false; // If this can be handled as an immediate, accept. if (getT2SOImmVal(V) != -1) return true; // Likewise, try masking out a splat value first. V = Imm; if (getT2SOImmValSplatVal(V & 0xff00ff00U) != -1) V &= ~0xff00ff00U; else if (getT2SOImmValSplatVal(V & 0x00ff00ffU) != -1) V &= ~0x00ff00ffU; // If what's left can be handled as an immediate, accept. if (getT2SOImmVal(V) != -1) return true; // Otherwise, do not accept. return false; } static inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) { //assert (isT2SOImmTwoPartVal(Imm) && // "Immedate cannot be encoded as two part immediate!"); // Try a shifter operand as one part unsigned V = rotr32 (~(unsigned int)255, getT2SOImmValRotate(Imm)) & Imm; // If the rest is encodable as an immediate, then return it. if (getT2SOImmVal(V) != -1) return V; // Try masking out a splat value first. if (getT2SOImmValSplatVal(Imm & 0xff00ff00U) != -1) return Imm & 0xff00ff00U; // The other splat is all that's left as an option. //assert (getT2SOImmValSplatVal(Imm & 0x00ff00ffU) != -1); return Imm & 0x00ff00ffU; } static inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) { // Mask out the first hunk Imm ^= getT2SOImmTwoPartFirst(Imm); // Return what's left //assert (getT2SOImmVal(Imm) != -1 && // "Unable to encode second part of T2 two part SO immediate"); return Imm; } //===--------------------------------------------------------------------===// // Addressing Mode #2 //===--------------------------------------------------------------------===// // // This is used for most simple load/store instructions. // // addrmode2 := reg +/- reg shop imm // addrmode2 := reg +/- imm12 // // The first operand is always a Reg. The second operand is a reg if in // reg/reg form, otherwise it's reg#0. The third field encodes the operation // in bit 12, the immediate in bits 0-11, and the shift op in 13-15. The // fourth operand 16-17 encodes the index mode. // // If this addressing mode is a frame index (before prolog/epilog insertion // and code rewriting), this operand will have the form: FI#, reg0, // with no shift amount for the frame offset. // static inline unsigned ARM_AM_getAM2Opc(ARM_AM_AddrOpc Opc, unsigned Imm12, ARM_AM_ShiftOpc SO, unsigned IdxMode) { //assert(Imm12 < (1 << 12) && "Imm too large!"); bool isSub = Opc == ARM_AM_sub; return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ; } static inline unsigned getAM2Offset(unsigned AM2Opc) { return AM2Opc & ((1 << 12)-1); } static inline ARM_AM_AddrOpc getAM2Op(unsigned AM2Opc) { return ((AM2Opc >> 12) & 1) ? ARM_AM_sub : ARM_AM_add; } static inline ARM_AM_ShiftOpc getAM2ShiftOpc(unsigned AM2Opc) { return (ARM_AM_ShiftOpc)((AM2Opc >> 13) & 7); } static inline unsigned getAM2IdxMode(unsigned AM2Opc) { return (AM2Opc >> 16); } //===--------------------------------------------------------------------===// // Addressing Mode #3 //===--------------------------------------------------------------------===// // // This is used for sign-extending loads, and load/store-pair instructions. // // addrmode3 := reg +/- reg // addrmode3 := reg +/- imm8 // // The first operand is always a Reg. The second operand is a reg if in // reg/reg form, otherwise it's reg#0. The third field encodes the operation // in bit 8, the immediate in bits 0-7. The fourth operand 9-10 encodes the // index mode. /// getAM3Opc - This function encodes the addrmode3 opc field. static inline unsigned getAM3Opc(ARM_AM_AddrOpc Opc, unsigned char Offset, unsigned IdxMode) { bool isSub = Opc == ARM_AM_sub; return ((int)isSub << 8) | Offset | (IdxMode << 9); } static inline unsigned char getAM3Offset(unsigned AM3Opc) { return AM3Opc & 0xFF; } static inline ARM_AM_AddrOpc getAM3Op(unsigned AM3Opc) { return ((AM3Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; } static inline unsigned getAM3IdxMode(unsigned AM3Opc) { return (AM3Opc >> 9); } //===--------------------------------------------------------------------===// // Addressing Mode #4 //===--------------------------------------------------------------------===// // // This is used for load / store multiple instructions. // // addrmode4 := reg, // // The four modes are: // IA - Increment after // IB - Increment before // DA - Decrement after // DB - Decrement before // For VFP instructions, only the IA and DB modes are valid. static inline ARM_AM_AMSubMode getAM4SubMode(unsigned Mode) { return (ARM_AM_AMSubMode)(Mode & 0x7); } static inline unsigned getAM4ModeImm(ARM_AM_AMSubMode SubMode) { return (int)SubMode; } //===--------------------------------------------------------------------===// // Addressing Mode #5 //===--------------------------------------------------------------------===// // // This is used for coprocessor instructions, such as FP load/stores. // // addrmode5 := reg +/- imm8*4 // // The first operand is always a Reg. The second operand encodes the // operation in bit 8 and the immediate in bits 0-7. /// getAM5Opc - This function encodes the addrmode5 opc field. static inline unsigned ARM_AM_getAM5Opc(ARM_AM_AddrOpc Opc, unsigned char Offset) { bool isSub = Opc == ARM_AM_sub; return ((int)isSub << 8) | Offset; } static inline unsigned char ARM_AM_getAM5Offset(unsigned AM5Opc) { return AM5Opc & 0xFF; } static inline ARM_AM_AddrOpc ARM_AM_getAM5Op(unsigned AM5Opc) { return ((AM5Opc >> 8) & 1) ? ARM_AM_sub : ARM_AM_add; } //===--------------------------------------------------------------------===// // Addressing Mode #6 //===--------------------------------------------------------------------===// // // This is used for NEON load / store instructions. // // addrmode6 := reg with optional alignment // // This is stored in two operands [regaddr, align]. The first is the // address register. The second operand is the value of the alignment // specifier in bytes or zero if no explicit alignment. // Valid alignments depend on the specific instruction. //===--------------------------------------------------------------------===// // NEON Modified Immediates //===--------------------------------------------------------------------===// // // Several NEON instructions (e.g., VMOV) take a "modified immediate" // vector operand, where a small immediate encoded in the instruction // specifies a full NEON vector value. These modified immediates are // represented here as encoded integers. The low 8 bits hold the immediate // value; bit 12 holds the "Op" field of the instruction, and bits 11-8 hold // the "Cmode" field of the instruction. The interfaces below treat the // Op and Cmode values as a single 5-bit value. static inline unsigned createNEONModImm(unsigned OpCmode, unsigned Val) { return (OpCmode << 8) | Val; } static inline unsigned getNEONModImmOpCmode(unsigned ModImm) { return (ModImm >> 8) & 0x1f; } static inline unsigned getNEONModImmVal(unsigned ModImm) { return ModImm & 0xff; } /// decodeNEONModImm - Decode a NEON modified immediate value into the /// element value and the element size in bits. (If the element size is /// smaller than the vector, it is splatted into all the elements.) static inline uint64_t ARM_AM_decodeNEONModImm(unsigned ModImm, unsigned *EltBits) { unsigned OpCmode = getNEONModImmOpCmode(ModImm); unsigned Imm8 = getNEONModImmVal(ModImm); uint64_t Val = 0; unsigned ByteNum; if (OpCmode == 0xe) { // 8-bit vector elements Val = Imm8; *EltBits = 8; } else if ((OpCmode & 0xc) == 0x8) { // 16-bit vector elements ByteNum = (OpCmode & 0x6) >> 1; Val = (uint64_t)Imm8 << (8 * ByteNum); *EltBits = 16; } else if ((OpCmode & 0x8) == 0) { // 32-bit vector elements, zero with one byte set ByteNum = (OpCmode & 0x6) >> 1; Val = (uint64_t)Imm8 << (8 * ByteNum); *EltBits = 32; } else if ((OpCmode & 0xe) == 0xc) { // 32-bit vector elements, one byte with low bits set ByteNum = 1 + (OpCmode & 0x1); Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); *EltBits = 32; } else if (OpCmode == 0x1e) { // 64-bit vector elements for (ByteNum = 0; ByteNum < 8; ++ByteNum) { if ((ModImm >> ByteNum) & 1) Val |= (uint64_t)0xff << (8 * ByteNum); } *EltBits = 64; } else { //llvm_unreachable("Unsupported NEON immediate"); } return Val; } ARM_AM_AMSubMode getLoadStoreMultipleSubMode(int Opcode); //===--------------------------------------------------------------------===// // Floating-point Immediates // static inline float getFPImmFloat(unsigned Imm) { // We expect an 8-bit binary encoding of a floating-point number here. union { uint32_t I; float F; } FPUnion; uint8_t Sign = (Imm >> 7) & 0x1; uint8_t Exp = (Imm >> 4) & 0x7; uint8_t Mantissa = Imm & 0xf; // 8-bit FP iEEEE Float Encoding // abcd efgh aBbbbbbc defgh000 00000000 00000000 // // where B = NOT(b); FPUnion.I = 0; FPUnion.I |= ((uint32_t) Sign) << 31; FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30; FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25; FPUnion.I |= (Exp & 0x3) << 23; FPUnion.I |= Mantissa << 19; return FPUnion.F; } #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMBaseInfo.h010066400017500001750000000347551363402546700200430ustar0000000000000000//===-- ARMBaseInfo.h - Top level definitions for ARM -------- --*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains small standalone helper functions and enum definitions for // the ARM target useful for the compiler back-end and the MC libraries. // As such, it deliberately does not include references to LLVM core // code gen types, passes, etc.. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_ARMBASEINFO_H #define CS_ARMBASEINFO_H #include "capstone/arm.h" // Defines symbolic names for ARM registers. This defines a mapping from // register name to register number. // #define GET_REGINFO_ENUM #include "ARMGenRegisterInfo.inc" // Enums corresponding to ARM condition codes // The CondCodes constants map directly to the 4-bit encoding of the // condition field for predicated instructions. typedef enum ARMCC_CondCodes { // Meaning (integer) Meaning (floating-point) ARMCC_EQ, // Equal Equal ARMCC_NE, // Not equal Not equal, or unordered ARMCC_HS, // Carry set >, ==, or unordered ARMCC_LO, // Carry clear Less than ARMCC_MI, // Minus, negative Less than ARMCC_PL, // Plus, positive or zero >, ==, or unordered ARMCC_VS, // Overflow Unordered ARMCC_VC, // No overflow Not unordered ARMCC_HI, // Unsigned higher Greater than, or unordered ARMCC_LS, // Unsigned lower or same Less than or equal ARMCC_GE, // Greater than or equal Greater than or equal ARMCC_LT, // Less than Less than, or unordered ARMCC_GT, // Greater than Greater than ARMCC_LE, // Less than or equal <, ==, or unordered ARMCC_AL // Always (unconditional) Always (unconditional) } ARMCC_CondCodes; inline static ARMCC_CondCodes ARMCC_getOppositeCondition(ARMCC_CondCodes CC) { switch (CC) { case ARMCC_EQ: return ARMCC_NE; case ARMCC_NE: return ARMCC_EQ; case ARMCC_HS: return ARMCC_LO; case ARMCC_LO: return ARMCC_HS; case ARMCC_MI: return ARMCC_PL; case ARMCC_PL: return ARMCC_MI; case ARMCC_VS: return ARMCC_VC; case ARMCC_VC: return ARMCC_VS; case ARMCC_HI: return ARMCC_LS; case ARMCC_LS: return ARMCC_HI; case ARMCC_GE: return ARMCC_LT; case ARMCC_LT: return ARMCC_GE; case ARMCC_GT: return ARMCC_LE; case ARMCC_LE: return ARMCC_GT; default: return ARMCC_AL; } } inline static const char *ARMCC_ARMCondCodeToString(ARMCC_CondCodes CC) { switch (CC) { case ARMCC_EQ: return "eq"; case ARMCC_NE: return "ne"; case ARMCC_HS: return "hs"; case ARMCC_LO: return "lo"; case ARMCC_MI: return "mi"; case ARMCC_PL: return "pl"; case ARMCC_VS: return "vs"; case ARMCC_VC: return "vc"; case ARMCC_HI: return "hi"; case ARMCC_LS: return "ls"; case ARMCC_GE: return "ge"; case ARMCC_LT: return "lt"; case ARMCC_GT: return "gt"; case ARMCC_LE: return "le"; case ARMCC_AL: return "al"; default: return ""; } } inline static const char *ARM_PROC_IFlagsToString(unsigned val) { switch (val) { case ARM_CPSFLAG_F: return "f"; case ARM_CPSFLAG_I: return "i"; case ARM_CPSFLAG_A: return "a"; default: return ""; } } inline static const char *ARM_PROC_IModToString(unsigned val) { switch (val) { case ARM_CPSMODE_IE: return "ie"; case ARM_CPSMODE_ID: return "id"; default: return ""; } } inline static const char *ARM_MB_MemBOptToString(unsigned val, bool HasV8) { switch (val) { default: return "BUGBUG"; case ARM_MB_SY: return "sy"; case ARM_MB_ST: return "st"; case ARM_MB_LD: return HasV8 ? "ld" : "#0xd"; case ARM_MB_RESERVED_12: return "#0xc"; case ARM_MB_ISH: return "ish"; case ARM_MB_ISHST: return "ishst"; case ARM_MB_ISHLD: return HasV8 ? "ishld" : "#0x9"; case ARM_MB_RESERVED_8: return "#0x8"; case ARM_MB_NSH: return "nsh"; case ARM_MB_NSHST: return "nshst"; case ARM_MB_NSHLD: return HasV8 ? "nshld" : "#0x5"; case ARM_MB_RESERVED_4: return "#0x4"; case ARM_MB_OSH: return "osh"; case ARM_MB_OSHST: return "oshst"; case ARM_MB_OSHLD: return HasV8 ? "oshld" : "#0x1"; case ARM_MB_RESERVED_0: return "#0x0"; } } enum ARM_ISB_InstSyncBOpt { ARM_ISB_RESERVED_0 = 0, ARM_ISB_RESERVED_1 = 1, ARM_ISB_RESERVED_2 = 2, ARM_ISB_RESERVED_3 = 3, ARM_ISB_RESERVED_4 = 4, ARM_ISB_RESERVED_5 = 5, ARM_ISB_RESERVED_6 = 6, ARM_ISB_RESERVED_7 = 7, ARM_ISB_RESERVED_8 = 8, ARM_ISB_RESERVED_9 = 9, ARM_ISB_RESERVED_10 = 10, ARM_ISB_RESERVED_11 = 11, ARM_ISB_RESERVED_12 = 12, ARM_ISB_RESERVED_13 = 13, ARM_ISB_RESERVED_14 = 14, ARM_ISB_SY = 15 }; inline static const char *ARM_ISB_InstSyncBOptToString(unsigned val) { switch (val) { default: // never reach case ARM_ISB_RESERVED_0: return "#0x0"; case ARM_ISB_RESERVED_1: return "#0x1"; case ARM_ISB_RESERVED_2: return "#0x2"; case ARM_ISB_RESERVED_3: return "#0x3"; case ARM_ISB_RESERVED_4: return "#0x4"; case ARM_ISB_RESERVED_5: return "#0x5"; case ARM_ISB_RESERVED_6: return "#0x6"; case ARM_ISB_RESERVED_7: return "#0x7"; case ARM_ISB_RESERVED_8: return "#0x8"; case ARM_ISB_RESERVED_9: return "#0x9"; case ARM_ISB_RESERVED_10: return "#0xa"; case ARM_ISB_RESERVED_11: return "#0xb"; case ARM_ISB_RESERVED_12: return "#0xc"; case ARM_ISB_RESERVED_13: return "#0xd"; case ARM_ISB_RESERVED_14: return "#0xe"; case ARM_ISB_SY: return "sy"; } } /// isARMLowRegister - Returns true if the register is a low register (r0-r7). /// static inline bool isARMLowRegister(unsigned Reg) { //using namespace ARM; switch (Reg) { case ARM_R0: case ARM_R1: case ARM_R2: case ARM_R3: case ARM_R4: case ARM_R5: case ARM_R6: case ARM_R7: return true; default: return false; } } /// ARMII - This namespace holds all of the target specific flags that /// instruction info tracks. /// /// ARM Index Modes enum ARMII_IndexMode { ARMII_IndexModeNone = 0, ARMII_IndexModePre = 1, ARMII_IndexModePost = 2, ARMII_IndexModeUpd = 3 }; /// ARM Addressing Modes typedef enum ARMII_AddrMode { ARMII_AddrModeNone = 0, ARMII_AddrMode1 = 1, ARMII_AddrMode2 = 2, ARMII_AddrMode3 = 3, ARMII_AddrMode4 = 4, ARMII_AddrMode5 = 5, ARMII_AddrMode6 = 6, ARMII_AddrModeT1_1 = 7, ARMII_AddrModeT1_2 = 8, ARMII_AddrModeT1_4 = 9, ARMII_AddrModeT1_s = 10, // i8 * 4 for pc and sp relative data ARMII_AddrModeT2_i12 = 11, ARMII_AddrModeT2_i8 = 12, ARMII_AddrModeT2_so = 13, ARMII_AddrModeT2_pc = 14, // +/- i12 for pc relative data ARMII_AddrModeT2_i8s4 = 15, // i8 * 4 ARMII_AddrMode_i12 = 16 } ARMII_AddrMode; inline static const char *ARMII_AddrModeToString(ARMII_AddrMode addrmode) { switch (addrmode) { case ARMII_AddrModeNone: return "AddrModeNone"; case ARMII_AddrMode1: return "AddrMode1"; case ARMII_AddrMode2: return "AddrMode2"; case ARMII_AddrMode3: return "AddrMode3"; case ARMII_AddrMode4: return "AddrMode4"; case ARMII_AddrMode5: return "AddrMode5"; case ARMII_AddrMode6: return "AddrMode6"; case ARMII_AddrModeT1_1: return "AddrModeT1_1"; case ARMII_AddrModeT1_2: return "AddrModeT1_2"; case ARMII_AddrModeT1_4: return "AddrModeT1_4"; case ARMII_AddrModeT1_s: return "AddrModeT1_s"; case ARMII_AddrModeT2_i12: return "AddrModeT2_i12"; case ARMII_AddrModeT2_i8: return "AddrModeT2_i8"; case ARMII_AddrModeT2_so: return "AddrModeT2_so"; case ARMII_AddrModeT2_pc: return "AddrModeT2_pc"; case ARMII_AddrModeT2_i8s4: return "AddrModeT2_i8s4"; case ARMII_AddrMode_i12: return "AddrMode_i12"; } } /// Target Operand Flag enum. enum ARMII_TOF { //===------------------------------------------------------------------===// // ARM Specific MachineOperand flags. ARMII_MO_NO_FLAG, /// MO_LO16 - On a symbol operand, this represents a relocation containing /// lower 16 bit of the address. Used only via movw instruction. ARMII_MO_LO16, /// MO_HI16 - On a symbol operand, this represents a relocation containing /// higher 16 bit of the address. Used only via movt instruction. ARMII_MO_HI16, /// MO_LO16_NONLAZY - On a symbol operand "FOO", this represents a /// relocation containing lower 16 bit of the non-lazy-ptr indirect symbol, /// i.e. "FOO$non_lazy_ptr". /// Used only via movw instruction. ARMII_MO_LO16_NONLAZY, /// MO_HI16_NONLAZY - On a symbol operand "FOO", this represents a /// relocation containing lower 16 bit of the non-lazy-ptr indirect symbol, /// i.e. "FOO$non_lazy_ptr". Used only via movt instruction. ARMII_MO_HI16_NONLAZY, /// MO_LO16_NONLAZY_PIC - On a symbol operand "FOO", this represents a /// relocation containing lower 16 bit of the PC relative address of the /// non-lazy-ptr indirect symbol, i.e. "FOO$non_lazy_ptr - LABEL". /// Used only via movw instruction. ARMII_MO_LO16_NONLAZY_PIC, /// MO_HI16_NONLAZY_PIC - On a symbol operand "FOO", this represents a /// relocation containing lower 16 bit of the PC relative address of the /// non-lazy-ptr indirect symbol, i.e. "FOO$non_lazy_ptr - LABEL". /// Used only via movt instruction. ARMII_MO_HI16_NONLAZY_PIC, /// MO_PLT - On a symbol operand, this represents an ELF PLT reference on a /// call operand. ARMII_MO_PLT }; enum { //===------------------------------------------------------------------===// // Instruction Flags. //===------------------------------------------------------------------===// // This four-bit field describes the addressing mode used. ARMII_AddrModeMask = 0x1f, // The AddrMode enums are declared in ARMBaseInfo.h // IndexMode - Unindex, pre-indexed, or post-indexed are valid for load // and store ops only. Generic "updating" flag is used for ld/st multiple. // The index mode enums are declared in ARMBaseInfo.h ARMII_IndexModeShift = 5, ARMII_IndexModeMask = 3 << ARMII_IndexModeShift, //===------------------------------------------------------------------===// // Instruction encoding formats. // ARMII_FormShift = 7, ARMII_FormMask = 0x3f << ARMII_FormShift, // Pseudo instructions ARMII_Pseudo = 0 << ARMII_FormShift, // Multiply instructions ARMII_MulFrm = 1 << ARMII_FormShift, // Branch instructions ARMII_BrFrm = 2 << ARMII_FormShift, ARMII_BrMiscFrm = 3 << ARMII_FormShift, // Data Processing instructions ARMII_DPFrm = 4 << ARMII_FormShift, ARMII_DPSoRegFrm = 5 << ARMII_FormShift, // Load and Store ARMII_LdFrm = 6 << ARMII_FormShift, ARMII_StFrm = 7 << ARMII_FormShift, ARMII_LdMiscFrm = 8 << ARMII_FormShift, ARMII_StMiscFrm = 9 << ARMII_FormShift, ARMII_LdStMulFrm = 10 << ARMII_FormShift, ARMII_LdStExFrm = 11 << ARMII_FormShift, // Miscellaneous arithmetic instructions ARMII_ArithMiscFrm = 12 << ARMII_FormShift, ARMII_SatFrm = 13 << ARMII_FormShift, // Extend instructions ARMII_ExtFrm = 14 << ARMII_FormShift, // VFP formats ARMII_VFPUnaryFrm = 15 << ARMII_FormShift, ARMII_VFPBinaryFrm = 16 << ARMII_FormShift, ARMII_VFPConv1Frm = 17 << ARMII_FormShift, ARMII_VFPConv2Frm = 18 << ARMII_FormShift, ARMII_VFPConv3Frm = 19 << ARMII_FormShift, ARMII_VFPConv4Frm = 20 << ARMII_FormShift, ARMII_VFPConv5Frm = 21 << ARMII_FormShift, ARMII_VFPLdStFrm = 22 << ARMII_FormShift, ARMII_VFPLdStMulFrm = 23 << ARMII_FormShift, ARMII_VFPMiscFrm = 24 << ARMII_FormShift, // Thumb format ARMII_ThumbFrm = 25 << ARMII_FormShift, // Miscelleaneous format ARMII_MiscFrm = 26 << ARMII_FormShift, // NEON formats ARMII_NGetLnFrm = 27 << ARMII_FormShift, ARMII_NSetLnFrm = 28 << ARMII_FormShift, ARMII_NDupFrm = 29 << ARMII_FormShift, ARMII_NLdStFrm = 30 << ARMII_FormShift, ARMII_N1RegModImmFrm= 31 << ARMII_FormShift, ARMII_N2RegFrm = 32 << ARMII_FormShift, ARMII_NVCVTFrm = 33 << ARMII_FormShift, ARMII_NVDupLnFrm = 34 << ARMII_FormShift, ARMII_N2RegVShLFrm = 35 << ARMII_FormShift, ARMII_N2RegVShRFrm = 36 << ARMII_FormShift, ARMII_N3RegFrm = 37 << ARMII_FormShift, ARMII_N3RegVShFrm = 38 << ARMII_FormShift, ARMII_NVExtFrm = 39 << ARMII_FormShift, ARMII_NVMulSLFrm = 40 << ARMII_FormShift, ARMII_NVTBLFrm = 41 << ARMII_FormShift, //===------------------------------------------------------------------===// // Misc flags. // UnaryDP - Indicates this is a unary data processing instruction, i.e. // it doesn't have a Rn operand. ARMII_UnaryDP = 1 << 13, // Xform16Bit - Indicates this Thumb2 instruction may be transformed into // a 16-bit Thumb instruction if certain conditions are met. ARMII_Xform16Bit = 1 << 14, // ThumbArithFlagSetting - The instruction is a 16-bit flag setting Thumb // instruction. Used by the parser to determine whether to require the 'S' // suffix on the mnemonic (when not in an IT block) or preclude it (when // in an IT block). ARMII_ThumbArithFlagSetting = 1 << 18, //===------------------------------------------------------------------===// // Code domain. ARMII_DomainShift = 15, ARMII_DomainMask = 7 << ARMII_DomainShift, ARMII_DomainGeneral = 0 << ARMII_DomainShift, ARMII_DomainVFP = 1 << ARMII_DomainShift, ARMII_DomainNEON = 2 << ARMII_DomainShift, ARMII_DomainNEONA8 = 4 << ARMII_DomainShift, //===------------------------------------------------------------------===// // Field shifts - such shifts are used to set field while generating // machine instructions. // // FIXME: This list will need adjusting/fixing as the MC code emitter // takes shape and the ARMCodeEmitter.cpp bits go away. ARMII_ShiftTypeShift = 4, ARMII_M_BitShift = 5, ARMII_ShiftImmShift = 5, ARMII_ShiftShift = 7, ARMII_N_BitShift = 7, ARMII_ImmHiShift = 8, ARMII_SoRotImmShift = 8, ARMII_RegRsShift = 8, ARMII_ExtRotImmShift = 10, ARMII_RegRdLoShift = 12, ARMII_RegRdShift = 12, ARMII_RegRdHiShift = 16, ARMII_RegRnShift = 16, ARMII_S_BitShift = 20, ARMII_W_BitShift = 21, ARMII_AM3_I_BitShift = 22, ARMII_D_BitShift = 22, ARMII_U_BitShift = 23, ARMII_P_BitShift = 24, ARMII_I_BitShift = 25, ARMII_CondShift = 28 }; #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMDisassembler.c010066400017500001750000004611371363402546700207630ustar0000000000000000//===-- ARMDisassembler.cpp - Disassembler for ARM/Thumb ISA --------------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_ARM #include #include #include #include #include "ARMAddressingModes.h" #include "ARMBaseInfo.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCRegisterInfo.h" #include "../../LEB128.h" #include "../../MCDisassembler.h" #include "../../cs_priv.h" #include "../../utils.h" #include "ARMDisassembler.h" //#define GET_REGINFO_ENUM //#include "X86GenRegisterInfo.inc" #define GET_SUBTARGETINFO_ENUM #include "ARMGenSubtargetInfo.inc" #define GET_INSTRINFO_MC_DESC #include "ARMGenInstrInfo.inc" #define GET_INSTRINFO_ENUM #include "ARMGenInstrInfo.inc" static bool ITStatus_push_back(ARM_ITStatus *it, char v) { if (it->size >= sizeof(it->ITStates)) { // TODO: consider warning user. it->size = 0; } it->ITStates[it->size] = v; it->size++; return true; } // Returns true if the current instruction is in an IT block static bool ITStatus_instrInITBlock(ARM_ITStatus *it) { //return !ITStates.empty(); return (it->size > 0); } // Returns true if current instruction is the last instruction in an IT block static bool ITStatus_instrLastInITBlock(ARM_ITStatus *it) { return (it->size == 1); } // Handles the condition code status of instructions in IT blocks // Returns the condition code for instruction in IT block static unsigned ITStatus_getITCC(ARM_ITStatus *it) { unsigned CC = ARMCC_AL; if (ITStatus_instrInITBlock(it)) //CC = ITStates.back(); CC = it->ITStates[it->size-1]; return CC; } // Advances the IT block state to the next T or E static void ITStatus_advanceITState(ARM_ITStatus *it) { //ITStates.pop_back(); it->size--; } // Called when decoding an IT instruction. Sets the IT state for the following // instructions that for the IT block. Firstcond and Mask correspond to the // fields in the IT instruction encoding. static void ITStatus_setITState(ARM_ITStatus *it, char Firstcond, char Mask) { // (3 - the number of trailing zeros) is the number of then / else. unsigned CondBit0 = Firstcond & 1; unsigned NumTZ = CountTrailingZeros_32(Mask); unsigned char CCBits = (unsigned char)Firstcond & 0xf; unsigned Pos; //assert(NumTZ <= 3 && "Invalid IT mask!"); // push condition codes onto the stack the correct order for the pops for (Pos = NumTZ+1; Pos <= 3; ++Pos) { bool T = ((Mask >> Pos) & 1) == (int)CondBit0; if (T) ITStatus_push_back(it, CCBits); else ITStatus_push_back(it, CCBits ^ 1); } ITStatus_push_back(it, CCBits); } /// ThumbDisassembler - Thumb disassembler for all Thumb platforms. static bool Check(DecodeStatus *Out, DecodeStatus In) { switch (In) { case MCDisassembler_Success: // Out stays the same. return true; case MCDisassembler_SoftFail: *Out = In; return true; case MCDisassembler_Fail: *Out = In; return false; default: // never reached return false; } } // Forward declare these because the autogenerated code will reference them. // Definitions are further down. static DecodeStatus DecodeGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPRnopcRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodetGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodetcGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecoderGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPRPairRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPR_8RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeQPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPairRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodePredicateOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeCCOutOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeRegListOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSPRRegListOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPRRegListOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeBitfieldMaskOperand(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeCopMemInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSORegMemOperand(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddrMode3Instruction(MCInst *Inst,unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSORegImmOperand(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSORegRegOperand(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst * Inst, unsigned Insn, uint64_t Adddress, const void *Decoder); static DecodeStatus DecodeT2MOVTWInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeArmMOVTWInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSMLAInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeCPSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2CPSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddrModeImm12Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddrMode5Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddrMode7Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2BInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeBranchImmInstruction(MCInst *Inst,unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeAddrMode6Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLDST1Instruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLDST2Instruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLDST3Instruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLDST4Instruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLDInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVSTInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD1DupInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD2DupInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD3DupInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD4DupInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeNEONModImmInstruction(MCInst *Inst,unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVSHLMaxInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeShiftRight8Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeShiftRight16Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeShiftRight32Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeShiftRight64Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeTBLInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodePostIdxReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeCoprocessor(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMemBarrierOption(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeInstSyncBarrierOption(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMSRMask(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeBankedReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDoubleRegLoad(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDoubleRegStore(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLDRPreImm(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLDRPreReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSTRPreImm(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSTRPreReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD1LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD2LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD3LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD4LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVST1LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVST2LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVST3LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVST4LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVMOVSRR(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVMOVRRS(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSwap(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVCVTD(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVCVTQ(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddSpecialReg(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbBROperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2BROperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbCmpBROperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddrModeRR(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddrModeIS(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddrModePC(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddrModeSP(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2AddrModeSOReg(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2LoadImm8(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder); static DecodeStatus DecodeT2LoadImm12(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder); static DecodeStatus DecodeT2LoadT(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder); static DecodeStatus DecodeT2LoadLabel(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder); static DecodeStatus DecodeT2Imm8S4(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2AddrModeImm8s4(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst *Inst,unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2Imm8(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2AddrModeImm8(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddSPImm(MCInst *Inst, uint16_t Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbAddSPReg(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbCPS(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeQADDInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbBLXOffset(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2AddrModeImm12(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbTableBranch(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumb2BCCInstruction(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2SOImm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbBCCTargetOperand(MCInst *Inst,unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbBLTargetOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeIT(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2LDRDPreInstruction(MCInst *Inst,unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2STRDPreInstruction(MCInst *Inst,unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2Adr(MCInst *Inst, uint32_t Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2LdStPre(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2ShifterImmOperand(MCInst *Inst, uint32_t Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLDR(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMRRC2(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); // Hacky: enable all features for disassembler uint64_t ARM_getFeatureBits(unsigned int mode) { uint64_t Bits = (uint64_t)-1; // everything by default // FIXME: ARM_FeatureVFPOnlySP is conflicting with everything else?? Bits &= (~ARM_FeatureVFPOnlySP); // FIXME: no Armv8 support? //Bits -= ARM_HasV7Ops; //Bits &= ~ARM_FeatureMP; if ((mode & CS_MODE_V8) == 0) Bits &= ~ARM_HasV8Ops; //Bits &= ~ARM_HasV6Ops; if ((mode & CS_MODE_MCLASS) == 0) Bits &= (~ARM_FeatureMClass); // some features are mutually exclusive if (mode & CS_MODE_THUMB) { //Bits &= ~ARM_HasV6Ops; //Bits &= ~ARM_FeatureCRC; //Bits &= ~ARM_HasV5TEOps; //Bits &= ~ARM_HasV4TOps; //Bits &= ~ARM_HasV6T2Ops; //Bits &= ~ARM_FeatureDB; //Bits &= ~ARM_FeatureHWDivARM; //Bits &= ~ARM_FeatureNaClTrap; //Bits &= ~ARM_FeatureMClass; // ArmV8 } else { // ARM mode Bits &= ~ARM_ModeThumb; Bits &= ~ARM_FeatureThumb2; } return Bits; } #include "ARMGenDisassemblerTables.inc" static DecodeStatus DecodePredicateOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val == 0xF) return MCDisassembler_Fail; // AL predicate is not allowed on Thumb1 branches. if (MCInst_getOpcode(Inst) == ARM_tBcc && Val == 0xE) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, Val); if (Val == ARMCC_AL) { MCOperand_CreateReg0(Inst, 0); } else MCOperand_CreateReg0(Inst, ARM_CPSR); return MCDisassembler_Success; } #define GET_REGINFO_MC_DESC #include "ARMGenRegisterInfo.inc" void ARM_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(ARMRegDesc, 289, RA, PC, ARMMCRegisterClasses, 100, ARMRegUnitRoots, 77, ARMRegDiffLists, ARMRegStrings, ARMSubRegIdxLists, 57, ARMSubRegIdxRanges, ARMRegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, ARMRegDesc, 289, 0, 0, ARMMCRegisterClasses, 100, 0, 0, ARMRegDiffLists, 0, ARMSubRegIdxLists, 57, 0); } // Post-decoding checks static DecodeStatus checkDecodedInstruction(MCInst *MI, uint32_t Insn, DecodeStatus Result) { switch (MCInst_getOpcode(MI)) { case ARM_HVC: { // HVC is undefined if condition = 0xf otherwise upredictable // if condition != 0xe uint32_t Cond = (Insn >> 28) & 0xF; if (Cond == 0xF) return MCDisassembler_Fail; if (Cond != 0xE) return MCDisassembler_SoftFail; return Result; } default: return Result; } } static DecodeStatus _ARM_getInstruction(cs_struct *ud, MCInst *MI, const uint8_t *code, size_t code_len, uint16_t *Size, uint64_t Address) { uint32_t insn, i; DecodeStatus result; if (code_len < 4) // not enough data return MCDisassembler_Fail; if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, arm)+sizeof(cs_arm)); for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm.operands); i++) { MI->flat_insn->detail->arm.operands[i].vector_index = -1; MI->flat_insn->detail->arm.operands[i].neon_lane = -1; } } if (MODE_IS_BIG_ENDIAN(ud->mode)) insn = (code[3] << 0) | (code[2] << 8) | (code[1] << 16) | ((uint32_t) code[0] << 24); else insn = ((uint32_t) code[3] << 24) | (code[2] << 16) | (code[1] << 8) | (code[0] << 0); // Calling the auto-generated decoder function. result = decodeInstruction_4(DecoderTableARM32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { result = checkDecodedInstruction(MI, insn, result); if (result != MCDisassembler_Fail) *Size = 4; return result; } // VFP and NEON instructions, similarly, are shared between ARM // and Thumb modes. MCInst_clear(MI); result = decodeInstruction_4(DecoderTableVFP32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTableVFPV832, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTableNEONData32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; // Add a fake predicate operand, because we share these instruction // definitions with Thumb2 where these instructions are predicable. if (!DecodePredicateOperand(MI, 0xE, Address, NULL)) return MCDisassembler_Fail; return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTableNEONLoadStore32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; // Add a fake predicate operand, because we share these instruction // definitions with Thumb2 where these instructions are predicable. if (!DecodePredicateOperand(MI, 0xE, Address, NULL)) return MCDisassembler_Fail; return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTableNEONDup32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; // Add a fake predicate operand, because we share these instruction // definitions with Thumb2 where these instructions are predicable. if (!DecodePredicateOperand(MI, 0xE, Address, NULL)) return MCDisassembler_Fail; return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTablev8NEON32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTablev8Crypto32, MI, insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); *Size = 0; return MCDisassembler_Fail; } // Thumb1 instructions don't have explicit S bits. Rather, they // implicitly set CPSR. Since it's not represented in the encoding, the // auto-generated decoder won't inject the CPSR operand. We need to fix // that as a post-pass. static void AddThumb1SBit(MCInst *MI, bool InITBlock) { const MCOperandInfo *OpInfo = ARMInsts[MCInst_getOpcode(MI)].OpInfo; unsigned short NumOps = ARMInsts[MCInst_getOpcode(MI)].NumOperands; unsigned i; for (i = 0; i < NumOps; ++i) { if (i == MCInst_getNumOperands(MI)) break; if (MCOperandInfo_isOptionalDef(&OpInfo[i]) && OpInfo[i].RegClass == ARM_CCRRegClassID) { if (i > 0 && MCOperandInfo_isPredicate(&OpInfo[i-1])) continue; MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, InITBlock ? 0 : ARM_CPSR)); return; } } //MI.insert(I, MCOperand_CreateReg0(Inst, InITBlock ? 0 : ARM_CPSR)); MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, InITBlock ? 0 : ARM_CPSR)); } // Most Thumb instructions don't have explicit predicates in the // encoding, but rather get their predicates from IT context. We need // to fix up the predicate operands using this context information as a // post-pass. static DecodeStatus AddThumbPredicate(cs_struct *ud, MCInst *MI) { DecodeStatus S = MCDisassembler_Success; const MCOperandInfo *OpInfo; unsigned short NumOps; unsigned int i; unsigned CC; // A few instructions actually have predicates encoded in them. Don't // try to overwrite it if we're seeing one of those. switch (MCInst_getOpcode(MI)) { case ARM_tBcc: case ARM_t2Bcc: case ARM_tCBZ: case ARM_tCBNZ: case ARM_tCPS: case ARM_t2CPS3p: case ARM_t2CPS2p: case ARM_t2CPS1p: case ARM_tMOVSr: case ARM_tSETEND: // Some instructions (mostly conditional branches) are not // allowed in IT blocks. if (ITStatus_instrInITBlock(&(ud->ITBlock))) S = MCDisassembler_SoftFail; else return MCDisassembler_Success; break; case ARM_tB: case ARM_t2B: case ARM_t2TBB: case ARM_t2TBH: // Some instructions (mostly unconditional branches) can // only appears at the end of, or outside of, an IT. //if (ITBlock.instrInITBlock() && !ITBlock.instrLastInITBlock()) if (ITStatus_instrInITBlock(&(ud->ITBlock)) && !ITStatus_instrLastInITBlock(&(ud->ITBlock))) S = MCDisassembler_SoftFail; break; default: break; } // If we're in an IT block, base the predicate on that. Otherwise, // assume a predicate of AL. CC = ITStatus_getITCC(&(ud->ITBlock)); if (CC == 0xF) CC = ARMCC_AL; if (ITStatus_instrInITBlock(&(ud->ITBlock))) ITStatus_advanceITState(&(ud->ITBlock)); OpInfo = ARMInsts[MCInst_getOpcode(MI)].OpInfo; NumOps = ARMInsts[MCInst_getOpcode(MI)].NumOperands; for (i = 0; i < NumOps; ++i) { if (i == MCInst_getNumOperands(MI)) break; if (MCOperandInfo_isPredicate(&OpInfo[i])) { MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, CC)); if (CC == ARMCC_AL) MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, 0)); else MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, ARM_CPSR)); return S; } } MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, CC)); if (CC == ARMCC_AL) MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, 0)); else MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, ARM_CPSR)); return S; } // Thumb VFP instructions are a special case. Because we share their // encodings between ARM and Thumb modes, and they are predicable in ARM // mode, the auto-generated decoder will give them an (incorrect) // predicate operand. We need to rewrite these operands based on the IT // context as a post-pass. static void UpdateThumbVFPPredicate(cs_struct *ud, MCInst *MI) { unsigned CC; unsigned short NumOps; const MCOperandInfo *OpInfo; unsigned i; CC = ITStatus_getITCC(&(ud->ITBlock)); if (ITStatus_instrInITBlock(&(ud->ITBlock))) ITStatus_advanceITState(&(ud->ITBlock)); OpInfo = ARMInsts[MCInst_getOpcode(MI)].OpInfo; NumOps = ARMInsts[MCInst_getOpcode(MI)].NumOperands; for (i = 0; i < NumOps; ++i) { if (MCOperandInfo_isPredicate(&OpInfo[i])) { MCOperand_setImm(MCInst_getOperand(MI, i), CC); if (CC == ARMCC_AL) MCOperand_setReg(MCInst_getOperand(MI, i+1), 0); else MCOperand_setReg(MCInst_getOperand(MI, i+1), ARM_CPSR); return; } } } static DecodeStatus _Thumb_getInstruction(cs_struct *ud, MCInst *MI, const uint8_t *code, size_t code_len, uint16_t *Size, uint64_t Address) { uint16_t insn16; DecodeStatus result; bool InITBlock; unsigned Firstcond, Mask; uint32_t NEONLdStInsn, insn32, NEONDataInsn, NEONCryptoInsn, NEONv8Insn; size_t i; // We want to read exactly 2 bytes of data. if (code_len < 2) // not enough data return MCDisassembler_Fail; if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, arm)+sizeof(cs_arm)); for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm.operands); i++) { MI->flat_insn->detail->arm.operands[i].vector_index = -1; MI->flat_insn->detail->arm.operands[i].neon_lane = -1; } } if (MODE_IS_BIG_ENDIAN(ud->mode)) insn16 = (code[0] << 8) | code[1]; else insn16 = (code[1] << 8) | code[0]; result = decodeInstruction_2(DecoderTableThumb16, MI, insn16, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 2; Check(&result, AddThumbPredicate(ud, MI)); return result; } MCInst_clear(MI); result = decodeInstruction_2(DecoderTableThumbSBit16, MI, insn16, Address, NULL, ud->mode); if (result) { *Size = 2; InITBlock = ITStatus_instrInITBlock(&(ud->ITBlock)); Check(&result, AddThumbPredicate(ud, MI)); AddThumb1SBit(MI, InITBlock); return result; } MCInst_clear(MI); result = decodeInstruction_2(DecoderTableThumb216, MI, insn16, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 2; // Nested IT blocks are UNPREDICTABLE. Must be checked before we add // the Thumb predicate. if (MCInst_getOpcode(MI) == ARM_t2IT && ITStatus_instrInITBlock(&(ud->ITBlock))) return MCDisassembler_SoftFail; Check(&result, AddThumbPredicate(ud, MI)); // If we find an IT instruction, we need to parse its condition // code and mask operands so that we can apply them correctly // to the subsequent instructions. if (MCInst_getOpcode(MI) == ARM_t2IT) { Firstcond = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, 0)); Mask = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, 1)); ITStatus_setITState(&(ud->ITBlock), (char)Firstcond, (char)Mask); } return result; } // We want to read exactly 4 bytes of data. if (code_len < 4) // not enough data return MCDisassembler_Fail; if (MODE_IS_BIG_ENDIAN(ud->mode)) insn32 = (code[3] << 0) | (code[2] << 8) | (code[1] << 16) | ((uint32_t) code[0] << 24); else insn32 = (code[3] << 8) | (code[2] << 0) | ((uint32_t) code[1] << 24) | (code[0] << 16); MCInst_clear(MI); result = decodeInstruction_4(DecoderTableThumb32, MI, insn32, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; InITBlock = ITStatus_instrInITBlock(&(ud->ITBlock)); Check(&result, AddThumbPredicate(ud, MI)); AddThumb1SBit(MI, InITBlock); return result; } MCInst_clear(MI); result = decodeInstruction_4(DecoderTableThumb232, MI, insn32, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; Check(&result, AddThumbPredicate(ud, MI)); return result; } if (fieldFromInstruction_4(insn32, 28, 4) == 0xE) { MCInst_clear(MI); result = decodeInstruction_4(DecoderTableVFP32, MI, insn32, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; UpdateThumbVFPPredicate(ud, MI); return result; } } MCInst_clear(MI); result = decodeInstruction_4(DecoderTableVFPV832, MI, insn32, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } if (fieldFromInstruction_4(insn32, 28, 4) == 0xE) { MCInst_clear(MI); result = decodeInstruction_4(DecoderTableNEONDup32, MI, insn32, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; Check(&result, AddThumbPredicate(ud, MI)); return result; } } if (fieldFromInstruction_4(insn32, 24, 8) == 0xF9) { MCInst_clear(MI); NEONLdStInsn = insn32; NEONLdStInsn &= 0xF0FFFFFF; NEONLdStInsn |= 0x04000000; result = decodeInstruction_4(DecoderTableNEONLoadStore32, MI, NEONLdStInsn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; Check(&result, AddThumbPredicate(ud, MI)); return result; } } if (fieldFromInstruction_4(insn32, 24, 4) == 0xF) { MCInst_clear(MI); NEONDataInsn = insn32; NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24 NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24 NEONDataInsn |= 0x12000000; // Set bits 28 and 25 result = decodeInstruction_4(DecoderTableNEONData32, MI, NEONDataInsn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; Check(&result, AddThumbPredicate(ud, MI)); return result; } } MCInst_clear(MI); NEONCryptoInsn = insn32; NEONCryptoInsn &= 0xF0FFFFFF; // Clear bits 27-24 NEONCryptoInsn |= (NEONCryptoInsn & 0x10000000) >> 4; // Move bit 28 to bit 24 NEONCryptoInsn |= 0x12000000; // Set bits 28 and 25 result = decodeInstruction_4(DecoderTablev8Crypto32, MI, NEONCryptoInsn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); NEONv8Insn = insn32; NEONv8Insn &= 0xF3FFFFFF; // Clear bits 27-26 result = decodeInstruction_4(DecoderTablev8NEON32, MI, NEONv8Insn, Address, NULL, ud->mode); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); *Size = 0; return MCDisassembler_Fail; } bool Thumb_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info) { DecodeStatus status = _Thumb_getInstruction((cs_struct *)ud, instr, code, code_len, size, address); //return status == MCDisassembler_Success; return status != MCDisassembler_Fail; } bool ARM_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info) { DecodeStatus status = _ARM_getInstruction((cs_struct *)ud, instr, code, code_len, size, address); //return status == MCDisassembler_Success; return status != MCDisassembler_Fail; } static const uint16_t GPRDecoderTable[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R4, ARM_R5, ARM_R6, ARM_R7, ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_SP, ARM_LR, ARM_PC }; static DecodeStatus DecodeGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register; if (RegNo > 15) return MCDisassembler_Fail; Register = GPRDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static DecodeStatus DecodeGPRnopcRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; if (RegNo == 15) S = MCDisassembler_SoftFail; Check(&S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); return S; } static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; if (RegNo == 15) { MCOperand_CreateReg0(Inst, ARM_APSR_NZCV); return MCDisassembler_Success; } Check(&S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); return S; } static DecodeStatus DecodetGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { if (RegNo > 7) return MCDisassembler_Fail; return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); } static const uint16_t GPRPairDecoderTable[] = { ARM_R0_R1, ARM_R2_R3, ARM_R4_R5, ARM_R6_R7, ARM_R8_R9, ARM_R10_R11, ARM_R12_SP }; static DecodeStatus DecodeGPRPairRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned RegisterPair; DecodeStatus S = MCDisassembler_Success; if (RegNo > 13) return MCDisassembler_Fail; if ((RegNo & 1) || RegNo == 0xe) S = MCDisassembler_SoftFail; RegisterPair = GPRPairDecoderTable[RegNo/2]; MCOperand_CreateReg0(Inst, RegisterPair); return S; } static DecodeStatus DecodetcGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register = 0; switch (RegNo) { case 0: Register = ARM_R0; break; case 1: Register = ARM_R1; break; case 2: Register = ARM_R2; break; case 3: Register = ARM_R3; break; case 9: Register = ARM_R9; break; case 12: Register = ARM_R12; break; default: return MCDisassembler_Fail; } MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static DecodeStatus DecoderGPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; if (RegNo == 13 || RegNo == 15) S = MCDisassembler_SoftFail; Check(&S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); return S; } static const uint16_t SPRDecoderTable[] = { ARM_S0, ARM_S1, ARM_S2, ARM_S3, ARM_S4, ARM_S5, ARM_S6, ARM_S7, ARM_S8, ARM_S9, ARM_S10, ARM_S11, ARM_S12, ARM_S13, ARM_S14, ARM_S15, ARM_S16, ARM_S17, ARM_S18, ARM_S19, ARM_S20, ARM_S21, ARM_S22, ARM_S23, ARM_S24, ARM_S25, ARM_S26, ARM_S27, ARM_S28, ARM_S29, ARM_S30, ARM_S31 }; static DecodeStatus DecodeSPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register; if (RegNo > 31) return MCDisassembler_Fail; Register = SPRDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static const uint16_t DPRDecoderTable[] = { ARM_D0, ARM_D1, ARM_D2, ARM_D3, ARM_D4, ARM_D5, ARM_D6, ARM_D7, ARM_D8, ARM_D9, ARM_D10, ARM_D11, ARM_D12, ARM_D13, ARM_D14, ARM_D15, ARM_D16, ARM_D17, ARM_D18, ARM_D19, ARM_D20, ARM_D21, ARM_D22, ARM_D23, ARM_D24, ARM_D25, ARM_D26, ARM_D27, ARM_D28, ARM_D29, ARM_D30, ARM_D31 }; static DecodeStatus DecodeDPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register; //uint64_t featureBits = ARM_getFeatureBits(Inst->csh->mode); //bool hasD16 = featureBits & ARM_FeatureD16; //if (RegNo > 31 || (hasD16 && RegNo > 15)) // FIXME if (RegNo > 31) return MCDisassembler_Fail; Register = DPRDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static DecodeStatus DecodeDPR_8RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { if (RegNo > 7) return MCDisassembler_Fail; return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); } static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { if (RegNo > 15) return MCDisassembler_Fail; return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); } static const uint16_t QPRDecoderTable[] = { ARM_Q0, ARM_Q1, ARM_Q2, ARM_Q3, ARM_Q4, ARM_Q5, ARM_Q6, ARM_Q7, ARM_Q8, ARM_Q9, ARM_Q10, ARM_Q11, ARM_Q12, ARM_Q13, ARM_Q14, ARM_Q15 }; static DecodeStatus DecodeQPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register; if (RegNo > 31 || (RegNo & 1) != 0) return MCDisassembler_Fail; RegNo >>= 1; Register = QPRDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static const uint16_t DPairDecoderTable[] = { ARM_Q0, ARM_D1_D2, ARM_Q1, ARM_D3_D4, ARM_Q2, ARM_D5_D6, ARM_Q3, ARM_D7_D8, ARM_Q4, ARM_D9_D10, ARM_Q5, ARM_D11_D12, ARM_Q6, ARM_D13_D14, ARM_Q7, ARM_D15_D16, ARM_Q8, ARM_D17_D18, ARM_Q9, ARM_D19_D20, ARM_Q10, ARM_D21_D22, ARM_Q11, ARM_D23_D24, ARM_Q12, ARM_D25_D26, ARM_Q13, ARM_D27_D28, ARM_Q14, ARM_D29_D30, ARM_Q15 }; static DecodeStatus DecodeDPairRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register; if (RegNo > 30) return MCDisassembler_Fail; Register = DPairDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static const uint16_t DPairSpacedDecoderTable[] = { ARM_D0_D2, ARM_D1_D3, ARM_D2_D4, ARM_D3_D5, ARM_D4_D6, ARM_D5_D7, ARM_D6_D8, ARM_D7_D9, ARM_D8_D10, ARM_D9_D11, ARM_D10_D12, ARM_D11_D13, ARM_D12_D14, ARM_D13_D15, ARM_D14_D16, ARM_D15_D17, ARM_D16_D18, ARM_D17_D19, ARM_D18_D20, ARM_D19_D21, ARM_D20_D22, ARM_D21_D23, ARM_D22_D24, ARM_D23_D25, ARM_D24_D26, ARM_D25_D27, ARM_D26_D28, ARM_D27_D29, ARM_D28_D30, ARM_D29_D31 }; static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Register; if (RegNo > 29) return MCDisassembler_Fail; Register = DPairSpacedDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Register); return MCDisassembler_Success; } static DecodeStatus DecodeCCOutOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val) MCOperand_CreateReg0(Inst, ARM_CPSR); else MCOperand_CreateReg0(Inst, 0); return MCDisassembler_Success; } static DecodeStatus DecodeSORegImmOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; ARM_AM_ShiftOpc Shift; unsigned Op; unsigned Rm = fieldFromInstruction_4(Val, 0, 4); unsigned type = fieldFromInstruction_4(Val, 5, 2); unsigned imm = fieldFromInstruction_4(Val, 7, 5); // Register-immediate if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; Shift = ARM_AM_lsl; switch (type) { case 0: Shift = ARM_AM_lsl; break; case 1: Shift = ARM_AM_lsr; break; case 2: Shift = ARM_AM_asr; break; case 3: Shift = ARM_AM_ror; break; } if (Shift == ARM_AM_ror && imm == 0) Shift = ARM_AM_rrx; Op = Shift | (imm << 3); MCOperand_CreateImm0(Inst, Op); return S; } static DecodeStatus DecodeSORegRegOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; ARM_AM_ShiftOpc Shift; unsigned Rm = fieldFromInstruction_4(Val, 0, 4); unsigned type = fieldFromInstruction_4(Val, 5, 2); unsigned Rs = fieldFromInstruction_4(Val, 8, 4); // Register-register if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rs, Address, Decoder))) return MCDisassembler_Fail; Shift = ARM_AM_lsl; switch (type) { case 0: Shift = ARM_AM_lsl; break; case 1: Shift = ARM_AM_lsr; break; case 2: Shift = ARM_AM_asr; break; case 3: Shift = ARM_AM_ror; break; } MCOperand_CreateImm0(Inst, Shift); return S; } static DecodeStatus DecodeRegListOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { unsigned i; DecodeStatus S = MCDisassembler_Success; unsigned opcode; bool NeedDisjointWriteback = false; unsigned WritebackReg = 0; opcode = MCInst_getOpcode(Inst); switch (opcode) { default: break; case ARM_LDMIA_UPD: case ARM_LDMDB_UPD: case ARM_LDMIB_UPD: case ARM_LDMDA_UPD: case ARM_t2LDMIA_UPD: case ARM_t2LDMDB_UPD: case ARM_t2STMIA_UPD: case ARM_t2STMDB_UPD: NeedDisjointWriteback = true; WritebackReg = MCOperand_getReg(MCInst_getOperand(Inst, 0)); break; } // Empty register lists are not allowed. if (Val == 0) return MCDisassembler_Fail; for (i = 0; i < 16; ++i) { if (Val & (1 << i)) { if (!Check(&S, DecodeGPRRegisterClass(Inst, i, Address, Decoder))) return MCDisassembler_Fail; // Writeback not allowed if Rn is in the target list. if (NeedDisjointWriteback && WritebackReg == MCOperand_getReg(&(Inst->Operands[Inst->size-1]))) Check(&S, MCDisassembler_SoftFail); } } if (opcode == ARM_t2LDMIA_UPD && WritebackReg == ARM_SP) { if (Val & (1 << 13) || ((Val & (1 << 15)) && (Val & (1 << 14)))) { // invalid thumb2 pop // needs no sp in reglist and not both pc and lr set at the same time return MCDisassembler_Fail; } } return S; } static DecodeStatus DecodeSPRRegListOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned i; unsigned Vd = fieldFromInstruction_4(Val, 8, 5); unsigned regs = fieldFromInstruction_4(Val, 0, 8); // In case of unpredictable encoding, tweak the operands. if (regs == 0 || (Vd + regs) > 32) { regs = Vd + regs > 32 ? 32 - Vd : regs; regs = (1u > regs? 1u : regs); S = MCDisassembler_SoftFail; } if (!Check(&S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder))) return MCDisassembler_Fail; for (i = 0; i < (regs - 1); ++i) { if (!Check(&S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder))) return MCDisassembler_Fail; } return S; } static DecodeStatus DecodeDPRRegListOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned i; unsigned Vd = fieldFromInstruction_4(Val, 8, 5); unsigned regs = fieldFromInstruction_4(Val, 1, 7); // In case of unpredictable encoding, tweak the operands. if (regs == 0 || regs > 16 || (Vd + regs) > 32) { regs = Vd + regs > 32 ? 32 - Vd : regs; regs = (1u > regs? 1u : regs); regs = (16u > regs? regs : 16u); S = MCDisassembler_SoftFail; } if (!Check(&S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder))) return MCDisassembler_Fail; for (i = 0; i < (regs - 1); ++i) { if (!Check(&S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder))) return MCDisassembler_Fail; } return S; } static DecodeStatus DecodeBitfieldMaskOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { // This operand encodes a mask of contiguous zeros between a specified MSB // and LSB. To decode it, we create the mask of all bits MSB-and-lower, // the mask of all bits LSB-and-lower, and then xor them to create // the mask of that's all ones on [msb, lsb]. Finally we not it to // create the final mask. unsigned msb = fieldFromInstruction_4(Val, 5, 5); unsigned lsb = fieldFromInstruction_4(Val, 0, 5); uint32_t lsb_mask, msb_mask; DecodeStatus S = MCDisassembler_Success; if (lsb > msb) { Check(&S, MCDisassembler_SoftFail); // The check above will cause the warning for the "potentially undefined // instruction encoding" but we can't build a bad MCOperand value here // with a lsb > msb or else printing the MCInst will cause a crash. lsb = msb; } msb_mask = 0xFFFFFFFF; if (msb != 31) msb_mask = (1U << (msb+1)) - 1; lsb_mask = (1U << lsb) - 1; MCOperand_CreateImm0(Inst, ~(msb_mask ^ lsb_mask)); return S; } static DecodeStatus DecodeCopMemInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred = fieldFromInstruction_4(Insn, 28, 4); unsigned CRd = fieldFromInstruction_4(Insn, 12, 4); unsigned coproc = fieldFromInstruction_4(Insn, 8, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 8); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned U = fieldFromInstruction_4(Insn, 23, 1); switch (MCInst_getOpcode(Inst)) { case ARM_LDC_OFFSET: case ARM_LDC_PRE: case ARM_LDC_POST: case ARM_LDC_OPTION: case ARM_LDCL_OFFSET: case ARM_LDCL_PRE: case ARM_LDCL_POST: case ARM_LDCL_OPTION: case ARM_STC_OFFSET: case ARM_STC_PRE: case ARM_STC_POST: case ARM_STC_OPTION: case ARM_STCL_OFFSET: case ARM_STCL_PRE: case ARM_STCL_POST: case ARM_STCL_OPTION: case ARM_t2LDC_OFFSET: case ARM_t2LDC_PRE: case ARM_t2LDC_POST: case ARM_t2LDC_OPTION: case ARM_t2LDCL_OFFSET: case ARM_t2LDCL_PRE: case ARM_t2LDCL_POST: case ARM_t2LDCL_OPTION: case ARM_t2STC_OFFSET: case ARM_t2STC_PRE: case ARM_t2STC_POST: case ARM_t2STC_OPTION: case ARM_t2STCL_OFFSET: case ARM_t2STCL_PRE: case ARM_t2STCL_POST: case ARM_t2STCL_OPTION: if (coproc == 0xA || coproc == 0xB) return MCDisassembler_Fail; break; default: break; } MCOperand_CreateImm0(Inst, coproc); MCOperand_CreateImm0(Inst, CRd); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; switch (MCInst_getOpcode(Inst)) { case ARM_t2LDC2_OFFSET: case ARM_t2LDC2L_OFFSET: case ARM_t2LDC2_PRE: case ARM_t2LDC2L_PRE: case ARM_t2STC2_OFFSET: case ARM_t2STC2L_OFFSET: case ARM_t2STC2_PRE: case ARM_t2STC2L_PRE: case ARM_LDC2_OFFSET: case ARM_LDC2L_OFFSET: case ARM_LDC2_PRE: case ARM_LDC2L_PRE: case ARM_STC2_OFFSET: case ARM_STC2L_OFFSET: case ARM_STC2_PRE: case ARM_STC2L_PRE: case ARM_t2LDC_OFFSET: case ARM_t2LDCL_OFFSET: case ARM_t2LDC_PRE: case ARM_t2LDCL_PRE: case ARM_t2STC_OFFSET: case ARM_t2STCL_OFFSET: case ARM_t2STC_PRE: case ARM_t2STCL_PRE: case ARM_LDC_OFFSET: case ARM_LDCL_OFFSET: case ARM_LDC_PRE: case ARM_LDCL_PRE: case ARM_STC_OFFSET: case ARM_STCL_OFFSET: case ARM_STC_PRE: case ARM_STCL_PRE: imm = ARM_AM_getAM5Opc(U ? ARM_AM_add : ARM_AM_sub, (unsigned char)imm); MCOperand_CreateImm0(Inst, imm); break; case ARM_t2LDC2_POST: case ARM_t2LDC2L_POST: case ARM_t2STC2_POST: case ARM_t2STC2L_POST: case ARM_LDC2_POST: case ARM_LDC2L_POST: case ARM_STC2_POST: case ARM_STC2L_POST: case ARM_t2LDC_POST: case ARM_t2LDCL_POST: case ARM_t2STC_POST: case ARM_t2STCL_POST: case ARM_LDC_POST: case ARM_LDCL_POST: case ARM_STC_POST: case ARM_STCL_POST: imm |= U << 8; // fall through. default: // The 'option' variant doesn't encode 'U' in the immediate since // the immediate is unsigned [0,255]. MCOperand_CreateImm0(Inst, imm); break; } switch (MCInst_getOpcode(Inst)) { case ARM_LDC_OFFSET: case ARM_LDC_PRE: case ARM_LDC_POST: case ARM_LDC_OPTION: case ARM_LDCL_OFFSET: case ARM_LDCL_PRE: case ARM_LDCL_POST: case ARM_LDCL_OPTION: case ARM_STC_OFFSET: case ARM_STC_PRE: case ARM_STC_POST: case ARM_STC_OPTION: case ARM_STCL_OFFSET: case ARM_STCL_PRE: case ARM_STCL_POST: case ARM_STCL_OPTION: if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } return S; } static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; ARM_AM_AddrOpc Op; ARM_AM_ShiftOpc Opc; bool writeback; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 12); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); unsigned reg = fieldFromInstruction_4(Insn, 25, 1); unsigned P = fieldFromInstruction_4(Insn, 24, 1); unsigned W = fieldFromInstruction_4(Insn, 21, 1); unsigned idx_mode = 0, amt, tmp; // On stores, the writeback operand precedes Rt. switch (MCInst_getOpcode(Inst)) { case ARM_STR_POST_IMM: case ARM_STR_POST_REG: case ARM_STRB_POST_IMM: case ARM_STRB_POST_REG: case ARM_STRT_POST_REG: case ARM_STRT_POST_IMM: case ARM_STRBT_POST_REG: case ARM_STRBT_POST_IMM: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; // On loads, the writeback operand comes after Rt. switch (MCInst_getOpcode(Inst)) { case ARM_LDR_POST_IMM: case ARM_LDR_POST_REG: case ARM_LDRB_POST_IMM: case ARM_LDRB_POST_REG: case ARM_LDRBT_POST_REG: case ARM_LDRBT_POST_IMM: case ARM_LDRT_POST_REG: case ARM_LDRT_POST_IMM: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; Op = ARM_AM_add; if (!fieldFromInstruction_4(Insn, 23, 1)) Op = ARM_AM_sub; writeback = (P == 0) || (W == 1); if (P && writeback) idx_mode = ARMII_IndexModePre; else if (!P && writeback) idx_mode = ARMII_IndexModePost; if (writeback && (Rn == 15 || Rn == Rt)) S = MCDisassembler_SoftFail; // UNPREDICTABLE if (reg) { if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; Opc = ARM_AM_lsl; switch( fieldFromInstruction_4(Insn, 5, 2)) { case 0: Opc = ARM_AM_lsl; break; case 1: Opc = ARM_AM_lsr; break; case 2: Opc = ARM_AM_asr; break; case 3: Opc = ARM_AM_ror; break; default: return MCDisassembler_Fail; } amt = fieldFromInstruction_4(Insn, 7, 5); if (Opc == ARM_AM_ror && amt == 0) Opc = ARM_AM_rrx; imm = ARM_AM_getAM2Opc(Op, amt, Opc, idx_mode); MCOperand_CreateImm0(Inst, imm); } else { MCOperand_CreateReg0(Inst, 0); tmp = ARM_AM_getAM2Opc(Op, imm, ARM_AM_lsl, idx_mode); MCOperand_CreateImm0(Inst, tmp); } if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeSORegMemOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; ARM_AM_ShiftOpc ShOp; unsigned shift; unsigned Rn = fieldFromInstruction_4(Val, 13, 4); unsigned Rm = fieldFromInstruction_4(Val, 0, 4); unsigned type = fieldFromInstruction_4(Val, 5, 2); unsigned imm = fieldFromInstruction_4(Val, 7, 5); unsigned U = fieldFromInstruction_4(Val, 12, 1); ShOp = ARM_AM_lsl; switch (type) { case 0: ShOp = ARM_AM_lsl; break; case 1: ShOp = ARM_AM_lsr; break; case 2: ShOp = ARM_AM_asr; break; case 3: ShOp = ARM_AM_ror; break; } if (ShOp == ARM_AM_ror && imm == 0) ShOp = ARM_AM_rrx; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; if (U) shift = ARM_AM_getAM2Opc(ARM_AM_add, imm, ShOp, 0); else shift = ARM_AM_getAM2Opc(ARM_AM_sub, imm, ShOp, 0); MCOperand_CreateImm0(Inst, shift); return S; } static DecodeStatus DecodeAddrMode3Instruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned type = fieldFromInstruction_4(Insn, 22, 1); unsigned imm = fieldFromInstruction_4(Insn, 8, 4); unsigned U = ((~fieldFromInstruction_4(Insn, 23, 1)) & 1) << 8; unsigned pred = fieldFromInstruction_4(Insn, 28, 4); unsigned W = fieldFromInstruction_4(Insn, 21, 1); unsigned P = fieldFromInstruction_4(Insn, 24, 1); unsigned Rt2 = Rt + 1; bool writeback = (W == 1) | (P == 0); // For {LD,ST}RD, Rt must be even, else undefined. switch (MCInst_getOpcode(Inst)) { case ARM_STRD: case ARM_STRD_PRE: case ARM_STRD_POST: case ARM_LDRD: case ARM_LDRD_PRE: case ARM_LDRD_POST: if (Rt & 0x1) S = MCDisassembler_SoftFail; break; default: break; } switch (MCInst_getOpcode(Inst)) { case ARM_STRD: case ARM_STRD_PRE: case ARM_STRD_POST: if (P == 0 && W == 1) S = MCDisassembler_SoftFail; if (writeback && (Rn == 15 || Rn == Rt || Rn == Rt2)) S = MCDisassembler_SoftFail; if (type && Rm == 15) S = MCDisassembler_SoftFail; if (Rt2 == 15) S = MCDisassembler_SoftFail; if (!type && fieldFromInstruction_4(Insn, 8, 4)) S = MCDisassembler_SoftFail; break; case ARM_STRH: case ARM_STRH_PRE: case ARM_STRH_POST: if (Rt == 15) S = MCDisassembler_SoftFail; if (writeback && (Rn == 15 || Rn == Rt)) S = MCDisassembler_SoftFail; if (!type && Rm == 15) S = MCDisassembler_SoftFail; break; case ARM_LDRD: case ARM_LDRD_PRE: case ARM_LDRD_POST: if (type && Rn == 15){ if (Rt2 == 15) S = MCDisassembler_SoftFail; break; } if (P == 0 && W == 1) S = MCDisassembler_SoftFail; if (!type && (Rt2 == 15 || Rm == 15 || Rm == Rt || Rm == Rt2)) S = MCDisassembler_SoftFail; if (!type && writeback && Rn == 15) S = MCDisassembler_SoftFail; if (writeback && (Rn == Rt || Rn == Rt2)) S = MCDisassembler_SoftFail; break; case ARM_LDRH: case ARM_LDRH_PRE: case ARM_LDRH_POST: if (type && Rn == 15){ if (Rt == 15) S = MCDisassembler_SoftFail; break; } if (Rt == 15) S = MCDisassembler_SoftFail; if (!type && Rm == 15) S = MCDisassembler_SoftFail; if (!type && writeback && (Rn == 15 || Rn == Rt)) S = MCDisassembler_SoftFail; break; case ARM_LDRSH: case ARM_LDRSH_PRE: case ARM_LDRSH_POST: case ARM_LDRSB: case ARM_LDRSB_PRE: case ARM_LDRSB_POST: if (type && Rn == 15){ if (Rt == 15) S = MCDisassembler_SoftFail; break; } if (type && (Rt == 15 || (writeback && Rn == Rt))) S = MCDisassembler_SoftFail; if (!type && (Rt == 15 || Rm == 15)) S = MCDisassembler_SoftFail; if (!type && writeback && (Rn == 15 || Rn == Rt)) S = MCDisassembler_SoftFail; break; default: break; } if (writeback) { // Writeback Inst->writeback = true; if (P) U |= ARMII_IndexModePre << 9; else U |= ARMII_IndexModePost << 9; // On stores, the writeback operand precedes Rt. switch (MCInst_getOpcode(Inst)) { case ARM_STRD: case ARM_STRD_PRE: case ARM_STRD_POST: case ARM_STRH: case ARM_STRH_PRE: case ARM_STRH_POST: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; switch (MCInst_getOpcode(Inst)) { case ARM_STRD: case ARM_STRD_PRE: case ARM_STRD_POST: case ARM_LDRD: case ARM_LDRD_PRE: case ARM_LDRD_POST: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } if (writeback) { // On loads, the writeback operand comes after Rt. switch (MCInst_getOpcode(Inst)) { case ARM_LDRD: case ARM_LDRD_PRE: case ARM_LDRD_POST: case ARM_LDRH: case ARM_LDRH_PRE: case ARM_LDRH_POST: case ARM_LDRSH: case ARM_LDRSH_PRE: case ARM_LDRSH_POST: case ARM_LDRSB: case ARM_LDRSB_PRE: case ARM_LDRSB_POST: case ARM_LDRHTr: case ARM_LDRSBTr: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (type) { MCOperand_CreateReg0(Inst, 0); MCOperand_CreateImm0(Inst, U | (imm << 4) | Rm); } else { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, U); } if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeRFEInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned mode = fieldFromInstruction_4(Insn, 23, 2); switch (mode) { case 0: mode = ARM_AM_da; break; case 1: mode = ARM_AM_ia; break; case 2: mode = ARM_AM_db; break; case 3: mode = ARM_AM_ib; break; } MCOperand_CreateImm0(Inst, mode); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeQADDInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); if (pred == 0xF) return DecodeCPSInstruction(Inst, Insn, Address, Decoder); if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); unsigned reglist = fieldFromInstruction_4(Insn, 0, 16); if (pred == 0xF) { // Ambiguous with RFE and SRS switch (MCInst_getOpcode(Inst)) { case ARM_LDMDA: MCInst_setOpcode(Inst, ARM_RFEDA); break; case ARM_LDMDA_UPD: MCInst_setOpcode(Inst, ARM_RFEDA_UPD); break; case ARM_LDMDB: MCInst_setOpcode(Inst, ARM_RFEDB); break; case ARM_LDMDB_UPD: MCInst_setOpcode(Inst, ARM_RFEDB_UPD); break; case ARM_LDMIA: MCInst_setOpcode(Inst, ARM_RFEIA); break; case ARM_LDMIA_UPD: MCInst_setOpcode(Inst, ARM_RFEIA_UPD); break; case ARM_LDMIB: MCInst_setOpcode(Inst, ARM_RFEIB); break; case ARM_LDMIB_UPD: MCInst_setOpcode(Inst, ARM_RFEIB_UPD); break; case ARM_STMDA: MCInst_setOpcode(Inst, ARM_SRSDA); break; case ARM_STMDA_UPD: MCInst_setOpcode(Inst, ARM_SRSDA_UPD); break; case ARM_STMDB: MCInst_setOpcode(Inst, ARM_SRSDB); break; case ARM_STMDB_UPD: MCInst_setOpcode(Inst, ARM_SRSDB_UPD); break; case ARM_STMIA: MCInst_setOpcode(Inst, ARM_SRSIA); break; case ARM_STMIA_UPD: MCInst_setOpcode(Inst, ARM_SRSIA_UPD); break; case ARM_STMIB: MCInst_setOpcode(Inst, ARM_SRSIB); break; case ARM_STMIB_UPD: MCInst_setOpcode(Inst, ARM_SRSIB_UPD); break; default: return MCDisassembler_Fail; } // For stores (which become SRS's, the only operand is the mode. if (fieldFromInstruction_4(Insn, 20, 1) == 0) { // Check SRS encoding constraints if (!(fieldFromInstruction_4(Insn, 22, 1) == 1 && fieldFromInstruction_4(Insn, 20, 1) == 0)) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, fieldFromInstruction_4(Insn, 0, 4)); return S; } return DecodeRFEInstruction(Inst, Insn, Address, Decoder); } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; // Tied if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeRegListOperand(Inst, reglist, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeCPSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned imod = fieldFromInstruction_4(Insn, 18, 2); unsigned M = fieldFromInstruction_4(Insn, 17, 1); unsigned iflags = fieldFromInstruction_4(Insn, 6, 3); unsigned mode = fieldFromInstruction_4(Insn, 0, 5); DecodeStatus S = MCDisassembler_Success; // This decoder is called from multiple location that do not check // the full encoding is valid before they do. if (fieldFromInstruction_4(Insn, 5, 1) != 0 || fieldFromInstruction_4(Insn, 16, 1) != 0 || fieldFromInstruction_4(Insn, 20, 8) != 0x10) return MCDisassembler_Fail; // imod == '01' --> UNPREDICTABLE // NOTE: Even though this is technically UNPREDICTABLE, we choose to // return failure here. The '01' imod value is unprintable, so there's // nothing useful we could do even if we returned UNPREDICTABLE. if (imod == 1) return MCDisassembler_Fail; if (imod && M) { MCInst_setOpcode(Inst, ARM_CPS3p); MCOperand_CreateImm0(Inst, imod); MCOperand_CreateImm0(Inst, iflags); MCOperand_CreateImm0(Inst, mode); } else if (imod && !M) { MCInst_setOpcode(Inst, ARM_CPS2p); MCOperand_CreateImm0(Inst, imod); MCOperand_CreateImm0(Inst, iflags); if (mode) S = MCDisassembler_SoftFail; } else if (!imod && M) { MCInst_setOpcode(Inst, ARM_CPS1p); MCOperand_CreateImm0(Inst, mode); if (iflags) S = MCDisassembler_SoftFail; } else { // imod == '00' && M == '0' --> UNPREDICTABLE MCInst_setOpcode(Inst, ARM_CPS1p); MCOperand_CreateImm0(Inst, mode); S = MCDisassembler_SoftFail; } return S; } static DecodeStatus DecodeT2CPSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned imod = fieldFromInstruction_4(Insn, 9, 2); unsigned M = fieldFromInstruction_4(Insn, 8, 1); unsigned iflags = fieldFromInstruction_4(Insn, 5, 3); unsigned mode = fieldFromInstruction_4(Insn, 0, 5); DecodeStatus S = MCDisassembler_Success; // imod == '01' --> UNPREDICTABLE // NOTE: Even though this is technically UNPREDICTABLE, we choose to // return failure here. The '01' imod value is unprintable, so there's // nothing useful we could do even if we returned UNPREDICTABLE. if (imod == 1) return MCDisassembler_Fail; if (imod && M) { MCInst_setOpcode(Inst, ARM_t2CPS3p); MCOperand_CreateImm0(Inst, imod); MCOperand_CreateImm0(Inst, iflags); MCOperand_CreateImm0(Inst, mode); } else if (imod && !M) { MCInst_setOpcode(Inst, ARM_t2CPS2p); MCOperand_CreateImm0(Inst, imod); MCOperand_CreateImm0(Inst, iflags); if (mode) S = MCDisassembler_SoftFail; } else if (!imod && M) { MCInst_setOpcode(Inst, ARM_t2CPS1p); MCOperand_CreateImm0(Inst, mode); if (iflags) S = MCDisassembler_SoftFail; } else { // imod == '00' && M == '0' --> this is a HINT instruction int imm = fieldFromInstruction_4(Insn, 0, 8); // HINT are defined only for immediate in [0..4] if(imm > 4) return MCDisassembler_Fail; MCInst_setOpcode(Inst, ARM_t2HINT); MCOperand_CreateImm0(Inst, imm); } return S; } static DecodeStatus DecodeT2MOVTWInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rd = fieldFromInstruction_4(Insn, 8, 4); unsigned imm = 0; imm |= (fieldFromInstruction_4(Insn, 0, 8) << 0); imm |= (fieldFromInstruction_4(Insn, 12, 3) << 8); imm |= (fieldFromInstruction_4(Insn, 16, 4) << 12); imm |= (fieldFromInstruction_4(Insn, 26, 1) << 11); if (MCInst_getOpcode(Inst) == ARM_t2MOVTi16) if (!Check(&S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeArmMOVTWInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); unsigned imm = 0; imm |= (fieldFromInstruction_4(Insn, 0, 12) << 0); imm |= (fieldFromInstruction_4(Insn, 16, 4) << 12); if (MCInst_getOpcode(Inst) == ARM_MOVTi16) if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, imm); if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeSMLAInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rd = fieldFromInstruction_4(Insn, 16, 4); unsigned Rn = fieldFromInstruction_4(Insn, 0, 4); unsigned Rm = fieldFromInstruction_4(Insn, 8, 4); unsigned Ra = fieldFromInstruction_4(Insn, 12, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); if (pred == 0xF) return DecodeCPSInstruction(Inst, Insn, Address, Decoder); if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeAddrModeImm12Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned add = fieldFromInstruction_4(Val, 12, 1); unsigned imm = fieldFromInstruction_4(Val, 0, 12); unsigned Rn = fieldFromInstruction_4(Val, 13, 4); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!add) imm *= (unsigned int)-1; if (imm == 0 && !add) imm = (unsigned int)INT32_MIN; MCOperand_CreateImm0(Inst, imm); //if (Rn == 15) // tryAddingPcLoadReferenceComment(Address, Address + imm + 8, Decoder); return S; } static DecodeStatus DecodeAddrMode5Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 9, 4); unsigned U = fieldFromInstruction_4(Val, 8, 1); unsigned imm = fieldFromInstruction_4(Val, 0, 8); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (U) MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_add, (unsigned char)imm)); else MCOperand_CreateImm0(Inst, ARM_AM_getAM5Opc(ARM_AM_sub, (unsigned char)imm)); return S; } static DecodeStatus DecodeAddrMode7Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { return DecodeGPRRegisterClass(Inst, Val, Address, Decoder); } static DecodeStatus DecodeT2BInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus Status = MCDisassembler_Success; // Note the J1 and J2 values are from the encoded instruction. So here // change them to I1 and I2 values via as documented: // I1 = NOT(J1 EOR S); // I2 = NOT(J2 EOR S); // and build the imm32 with one trailing zero as documented: // imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', 32); unsigned S = fieldFromInstruction_4(Insn, 26, 1); unsigned J1 = fieldFromInstruction_4(Insn, 13, 1); unsigned J2 = fieldFromInstruction_4(Insn, 11, 1); unsigned I1 = !(J1 ^ S); unsigned I2 = !(J2 ^ S); unsigned imm10 = fieldFromInstruction_4(Insn, 16, 10); unsigned imm11 = fieldFromInstruction_4(Insn, 0, 11); unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; int imm32 = SignExtend32(tmp << 1, 25); MCOperand_CreateImm0(Inst, imm32); return Status; } static DecodeStatus DecodeBranchImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred = fieldFromInstruction_4(Insn, 28, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 24) << 2; if (pred == 0xF) { MCInst_setOpcode(Inst, ARM_BLXi); imm |= fieldFromInstruction_4(Insn, 24, 1) << 1; MCOperand_CreateImm0(Inst, SignExtend32(imm, 26)); return S; } MCOperand_CreateImm0(Inst, SignExtend32(imm, 26)); if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeAddrMode6Operand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rm = fieldFromInstruction_4(Val, 0, 4); unsigned align = fieldFromInstruction_4(Val, 4, 2); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; if (!align) MCOperand_CreateImm0(Inst, 0); else MCOperand_CreateImm0(Inst, 4 << align); return S; } static DecodeStatus DecodeVLDInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned wb, Rn, Rm; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; wb = fieldFromInstruction_4(Insn, 16, 4); Rn = fieldFromInstruction_4(Insn, 16, 4); Rn |= fieldFromInstruction_4(Insn, 4, 2) << 4; Rm = fieldFromInstruction_4(Insn, 0, 4); // First output register switch (MCInst_getOpcode(Inst)) { case ARM_VLD1q16: case ARM_VLD1q32: case ARM_VLD1q64: case ARM_VLD1q8: case ARM_VLD1q16wb_fixed: case ARM_VLD1q16wb_register: case ARM_VLD1q32wb_fixed: case ARM_VLD1q32wb_register: case ARM_VLD1q64wb_fixed: case ARM_VLD1q64wb_register: case ARM_VLD1q8wb_fixed: case ARM_VLD1q8wb_register: case ARM_VLD2d16: case ARM_VLD2d32: case ARM_VLD2d8: case ARM_VLD2d16wb_fixed: case ARM_VLD2d16wb_register: case ARM_VLD2d32wb_fixed: case ARM_VLD2d32wb_register: case ARM_VLD2d8wb_fixed: case ARM_VLD2d8wb_register: if (!Check(&S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VLD2b16: case ARM_VLD2b32: case ARM_VLD2b8: case ARM_VLD2b16wb_fixed: case ARM_VLD2b16wb_register: case ARM_VLD2b32wb_fixed: case ARM_VLD2b32wb_register: case ARM_VLD2b8wb_fixed: case ARM_VLD2b8wb_register: if (!Check(&S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; } // Second output register switch (MCInst_getOpcode(Inst)) { case ARM_VLD3d8: case ARM_VLD3d16: case ARM_VLD3d32: case ARM_VLD3d8_UPD: case ARM_VLD3d16_UPD: case ARM_VLD3d32_UPD: case ARM_VLD4d8: case ARM_VLD4d16: case ARM_VLD4d32: case ARM_VLD4d8_UPD: case ARM_VLD4d16_UPD: case ARM_VLD4d32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VLD3q8: case ARM_VLD3q16: case ARM_VLD3q32: case ARM_VLD3q8_UPD: case ARM_VLD3q16_UPD: case ARM_VLD3q32_UPD: case ARM_VLD4q8: case ARM_VLD4q16: case ARM_VLD4q32: case ARM_VLD4q8_UPD: case ARM_VLD4q16_UPD: case ARM_VLD4q32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) return MCDisassembler_Fail; default: break; } // Third output register switch(MCInst_getOpcode(Inst)) { case ARM_VLD3d8: case ARM_VLD3d16: case ARM_VLD3d32: case ARM_VLD3d8_UPD: case ARM_VLD3d16_UPD: case ARM_VLD3d32_UPD: case ARM_VLD4d8: case ARM_VLD4d16: case ARM_VLD4d32: case ARM_VLD4d8_UPD: case ARM_VLD4d16_UPD: case ARM_VLD4d32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VLD3q8: case ARM_VLD3q16: case ARM_VLD3q32: case ARM_VLD3q8_UPD: case ARM_VLD3q16_UPD: case ARM_VLD3q32_UPD: case ARM_VLD4q8: case ARM_VLD4q16: case ARM_VLD4q32: case ARM_VLD4q8_UPD: case ARM_VLD4q16_UPD: case ARM_VLD4q32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } // Fourth output register switch (MCInst_getOpcode(Inst)) { case ARM_VLD4d8: case ARM_VLD4d16: case ARM_VLD4d32: case ARM_VLD4d8_UPD: case ARM_VLD4d16_UPD: case ARM_VLD4d32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VLD4q8: case ARM_VLD4q16: case ARM_VLD4q32: case ARM_VLD4q8_UPD: case ARM_VLD4q16_UPD: case ARM_VLD4q32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } // Writeback operand switch (MCInst_getOpcode(Inst)) { case ARM_VLD1d8wb_fixed: case ARM_VLD1d16wb_fixed: case ARM_VLD1d32wb_fixed: case ARM_VLD1d64wb_fixed: case ARM_VLD1d8wb_register: case ARM_VLD1d16wb_register: case ARM_VLD1d32wb_register: case ARM_VLD1d64wb_register: case ARM_VLD1q8wb_fixed: case ARM_VLD1q16wb_fixed: case ARM_VLD1q32wb_fixed: case ARM_VLD1q64wb_fixed: case ARM_VLD1q8wb_register: case ARM_VLD1q16wb_register: case ARM_VLD1q32wb_register: case ARM_VLD1q64wb_register: case ARM_VLD1d8Twb_fixed: case ARM_VLD1d8Twb_register: case ARM_VLD1d16Twb_fixed: case ARM_VLD1d16Twb_register: case ARM_VLD1d32Twb_fixed: case ARM_VLD1d32Twb_register: case ARM_VLD1d64Twb_fixed: case ARM_VLD1d64Twb_register: case ARM_VLD1d8Qwb_fixed: case ARM_VLD1d8Qwb_register: case ARM_VLD1d16Qwb_fixed: case ARM_VLD1d16Qwb_register: case ARM_VLD1d32Qwb_fixed: case ARM_VLD1d32Qwb_register: case ARM_VLD1d64Qwb_fixed: case ARM_VLD1d64Qwb_register: case ARM_VLD2d8wb_fixed: case ARM_VLD2d16wb_fixed: case ARM_VLD2d32wb_fixed: case ARM_VLD2q8wb_fixed: case ARM_VLD2q16wb_fixed: case ARM_VLD2q32wb_fixed: case ARM_VLD2d8wb_register: case ARM_VLD2d16wb_register: case ARM_VLD2d32wb_register: case ARM_VLD2q8wb_register: case ARM_VLD2q16wb_register: case ARM_VLD2q32wb_register: case ARM_VLD2b8wb_fixed: case ARM_VLD2b16wb_fixed: case ARM_VLD2b32wb_fixed: case ARM_VLD2b8wb_register: case ARM_VLD2b16wb_register: case ARM_VLD2b32wb_register: MCOperand_CreateImm0(Inst, 0); break; case ARM_VLD3d8_UPD: case ARM_VLD3d16_UPD: case ARM_VLD3d32_UPD: case ARM_VLD3q8_UPD: case ARM_VLD3q16_UPD: case ARM_VLD3q32_UPD: case ARM_VLD4d8_UPD: case ARM_VLD4d16_UPD: case ARM_VLD4d32_UPD: case ARM_VLD4q8_UPD: case ARM_VLD4q16_UPD: case ARM_VLD4q32_UPD: if (!Check(&S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } // AddrMode6 Base (register+alignment) if (!Check(&S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; // AddrMode6 Offset (register) switch (MCInst_getOpcode(Inst)) { default: // The below have been updated to have explicit am6offset split // between fixed and register offset. For those instructions not // yet updated, we need to add an additional reg0 operand for the // fixed variant. // // The fixed offset encodes as Rm == 0xd, so we check for that. if (Rm == 0xd) { MCOperand_CreateReg0(Inst, 0); break; } // Fall through to handle the register offset variant. case ARM_VLD1d8wb_fixed: case ARM_VLD1d16wb_fixed: case ARM_VLD1d32wb_fixed: case ARM_VLD1d64wb_fixed: case ARM_VLD1d8Twb_fixed: case ARM_VLD1d16Twb_fixed: case ARM_VLD1d32Twb_fixed: case ARM_VLD1d64Twb_fixed: case ARM_VLD1d8Qwb_fixed: case ARM_VLD1d16Qwb_fixed: case ARM_VLD1d32Qwb_fixed: case ARM_VLD1d64Qwb_fixed: case ARM_VLD1d8wb_register: case ARM_VLD1d16wb_register: case ARM_VLD1d32wb_register: case ARM_VLD1d64wb_register: case ARM_VLD1q8wb_fixed: case ARM_VLD1q16wb_fixed: case ARM_VLD1q32wb_fixed: case ARM_VLD1q64wb_fixed: case ARM_VLD1q8wb_register: case ARM_VLD1q16wb_register: case ARM_VLD1q32wb_register: case ARM_VLD1q64wb_register: // The fixed offset post-increment encodes Rm == 0xd. The no-writeback // variant encodes Rm == 0xf. Anything else is a register offset post- // increment and we need to add the register operand to the instruction. if (Rm != 0xD && Rm != 0xF && !Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VLD2d8wb_fixed: case ARM_VLD2d16wb_fixed: case ARM_VLD2d32wb_fixed: case ARM_VLD2b8wb_fixed: case ARM_VLD2b16wb_fixed: case ARM_VLD2b32wb_fixed: case ARM_VLD2q8wb_fixed: case ARM_VLD2q16wb_fixed: case ARM_VLD2q32wb_fixed: break; } return S; } static DecodeStatus DecodeVLDST1Instruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned load; unsigned type = fieldFromInstruction_4(Insn, 8, 4); unsigned align = fieldFromInstruction_4(Insn, 4, 2); if (type == 6 && (align & 2)) return MCDisassembler_Fail; if (type == 7 && (align & 2)) return MCDisassembler_Fail; if (type == 10 && align == 3) return MCDisassembler_Fail; load = fieldFromInstruction_4(Insn, 21, 1); return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) : DecodeVSTInstruction(Inst, Insn, Address, Decoder); } static DecodeStatus DecodeVLDST2Instruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned type, align, load; unsigned size = fieldFromInstruction_4(Insn, 6, 2); if (size == 3) return MCDisassembler_Fail; type = fieldFromInstruction_4(Insn, 8, 4); align = fieldFromInstruction_4(Insn, 4, 2); if (type == 8 && align == 3) return MCDisassembler_Fail; if (type == 9 && align == 3) return MCDisassembler_Fail; load = fieldFromInstruction_4(Insn, 21, 1); return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) : DecodeVSTInstruction(Inst, Insn, Address, Decoder); } static DecodeStatus DecodeVLDST3Instruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned align, load; unsigned size = fieldFromInstruction_4(Insn, 6, 2); if (size == 3) return MCDisassembler_Fail; align = fieldFromInstruction_4(Insn, 4, 2); if (align & 2) return MCDisassembler_Fail; load = fieldFromInstruction_4(Insn, 21, 1); return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) : DecodeVSTInstruction(Inst, Insn, Address, Decoder); } static DecodeStatus DecodeVLDST4Instruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned load; unsigned size = fieldFromInstruction_4(Insn, 6, 2); if (size == 3) return MCDisassembler_Fail; load = fieldFromInstruction_4(Insn, 21, 1); return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) : DecodeVSTInstruction(Inst, Insn, Address, Decoder); } static DecodeStatus DecodeVSTInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned wb, Rn, Rm; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; wb = fieldFromInstruction_4(Insn, 16, 4); Rn = fieldFromInstruction_4(Insn, 16, 4); Rn |= fieldFromInstruction_4(Insn, 4, 2) << 4; Rm = fieldFromInstruction_4(Insn, 0, 4); // Writeback Operand switch (MCInst_getOpcode(Inst)) { case ARM_VST1d8wb_fixed: case ARM_VST1d16wb_fixed: case ARM_VST1d32wb_fixed: case ARM_VST1d64wb_fixed: case ARM_VST1d8wb_register: case ARM_VST1d16wb_register: case ARM_VST1d32wb_register: case ARM_VST1d64wb_register: case ARM_VST1q8wb_fixed: case ARM_VST1q16wb_fixed: case ARM_VST1q32wb_fixed: case ARM_VST1q64wb_fixed: case ARM_VST1q8wb_register: case ARM_VST1q16wb_register: case ARM_VST1q32wb_register: case ARM_VST1q64wb_register: case ARM_VST1d8Twb_fixed: case ARM_VST1d16Twb_fixed: case ARM_VST1d32Twb_fixed: case ARM_VST1d64Twb_fixed: case ARM_VST1d8Twb_register: case ARM_VST1d16Twb_register: case ARM_VST1d32Twb_register: case ARM_VST1d64Twb_register: case ARM_VST1d8Qwb_fixed: case ARM_VST1d16Qwb_fixed: case ARM_VST1d32Qwb_fixed: case ARM_VST1d64Qwb_fixed: case ARM_VST1d8Qwb_register: case ARM_VST1d16Qwb_register: case ARM_VST1d32Qwb_register: case ARM_VST1d64Qwb_register: case ARM_VST2d8wb_fixed: case ARM_VST2d16wb_fixed: case ARM_VST2d32wb_fixed: case ARM_VST2d8wb_register: case ARM_VST2d16wb_register: case ARM_VST2d32wb_register: case ARM_VST2q8wb_fixed: case ARM_VST2q16wb_fixed: case ARM_VST2q32wb_fixed: case ARM_VST2q8wb_register: case ARM_VST2q16wb_register: case ARM_VST2q32wb_register: case ARM_VST2b8wb_fixed: case ARM_VST2b16wb_fixed: case ARM_VST2b32wb_fixed: case ARM_VST2b8wb_register: case ARM_VST2b16wb_register: case ARM_VST2b32wb_register: if (Rm == 0xF) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, 0); break; case ARM_VST3d8_UPD: case ARM_VST3d16_UPD: case ARM_VST3d32_UPD: case ARM_VST3q8_UPD: case ARM_VST3q16_UPD: case ARM_VST3q32_UPD: case ARM_VST4d8_UPD: case ARM_VST4d16_UPD: case ARM_VST4d32_UPD: case ARM_VST4q8_UPD: case ARM_VST4q16_UPD: case ARM_VST4q32_UPD: if (!Check(&S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } // AddrMode6 Base (register+alignment) if (!Check(&S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; // AddrMode6 Offset (register) switch (MCInst_getOpcode(Inst)) { default: if (Rm == 0xD) MCOperand_CreateReg0(Inst, 0); else if (Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } break; case ARM_VST1d8wb_fixed: case ARM_VST1d16wb_fixed: case ARM_VST1d32wb_fixed: case ARM_VST1d64wb_fixed: case ARM_VST1q8wb_fixed: case ARM_VST1q16wb_fixed: case ARM_VST1q32wb_fixed: case ARM_VST1q64wb_fixed: case ARM_VST1d8Twb_fixed: case ARM_VST1d16Twb_fixed: case ARM_VST1d32Twb_fixed: case ARM_VST1d64Twb_fixed: case ARM_VST1d8Qwb_fixed: case ARM_VST1d16Qwb_fixed: case ARM_VST1d32Qwb_fixed: case ARM_VST1d64Qwb_fixed: case ARM_VST2d8wb_fixed: case ARM_VST2d16wb_fixed: case ARM_VST2d32wb_fixed: case ARM_VST2q8wb_fixed: case ARM_VST2q16wb_fixed: case ARM_VST2q32wb_fixed: case ARM_VST2b8wb_fixed: case ARM_VST2b16wb_fixed: case ARM_VST2b32wb_fixed: break; } // First input register switch (MCInst_getOpcode(Inst)) { case ARM_VST1q16: case ARM_VST1q32: case ARM_VST1q64: case ARM_VST1q8: case ARM_VST1q16wb_fixed: case ARM_VST1q16wb_register: case ARM_VST1q32wb_fixed: case ARM_VST1q32wb_register: case ARM_VST1q64wb_fixed: case ARM_VST1q64wb_register: case ARM_VST1q8wb_fixed: case ARM_VST1q8wb_register: case ARM_VST2d16: case ARM_VST2d32: case ARM_VST2d8: case ARM_VST2d16wb_fixed: case ARM_VST2d16wb_register: case ARM_VST2d32wb_fixed: case ARM_VST2d32wb_register: case ARM_VST2d8wb_fixed: case ARM_VST2d8wb_register: if (!Check(&S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VST2b16: case ARM_VST2b32: case ARM_VST2b8: case ARM_VST2b16wb_fixed: case ARM_VST2b16wb_register: case ARM_VST2b32wb_fixed: case ARM_VST2b32wb_register: case ARM_VST2b8wb_fixed: case ARM_VST2b8wb_register: if (!Check(&S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; } // Second input register switch (MCInst_getOpcode(Inst)) { case ARM_VST3d8: case ARM_VST3d16: case ARM_VST3d32: case ARM_VST3d8_UPD: case ARM_VST3d16_UPD: case ARM_VST3d32_UPD: case ARM_VST4d8: case ARM_VST4d16: case ARM_VST4d32: case ARM_VST4d8_UPD: case ARM_VST4d16_UPD: case ARM_VST4d32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VST3q8: case ARM_VST3q16: case ARM_VST3q32: case ARM_VST3q8_UPD: case ARM_VST3q16_UPD: case ARM_VST3q32_UPD: case ARM_VST4q8: case ARM_VST4q16: case ARM_VST4q32: case ARM_VST4q8_UPD: case ARM_VST4q16_UPD: case ARM_VST4q32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } // Third input register switch (MCInst_getOpcode(Inst)) { case ARM_VST3d8: case ARM_VST3d16: case ARM_VST3d32: case ARM_VST3d8_UPD: case ARM_VST3d16_UPD: case ARM_VST3d32_UPD: case ARM_VST4d8: case ARM_VST4d16: case ARM_VST4d32: case ARM_VST4d8_UPD: case ARM_VST4d16_UPD: case ARM_VST4d32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VST3q8: case ARM_VST3q16: case ARM_VST3q32: case ARM_VST3q8_UPD: case ARM_VST3q16_UPD: case ARM_VST3q32_UPD: case ARM_VST4q8: case ARM_VST4q16: case ARM_VST4q32: case ARM_VST4q8_UPD: case ARM_VST4q16_UPD: case ARM_VST4q32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } // Fourth input register switch (MCInst_getOpcode(Inst)) { case ARM_VST4d8: case ARM_VST4d16: case ARM_VST4d32: case ARM_VST4d8_UPD: case ARM_VST4d16_UPD: case ARM_VST4d32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VST4q8: case ARM_VST4q16: case ARM_VST4q32: case ARM_VST4q8_UPD: case ARM_VST4q16_UPD: case ARM_VST4q32_UPD: if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } return S; } static DecodeStatus DecodeVLD1DupInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn, Rm, align, size; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; Rn = fieldFromInstruction_4(Insn, 16, 4); Rm = fieldFromInstruction_4(Insn, 0, 4); align = fieldFromInstruction_4(Insn, 4, 1); size = fieldFromInstruction_4(Insn, 6, 2); if (size == 0 && align == 1) return MCDisassembler_Fail; align *= (1 << size); switch (MCInst_getOpcode(Inst)) { case ARM_VLD1DUPq16: case ARM_VLD1DUPq32: case ARM_VLD1DUPq8: case ARM_VLD1DUPq16wb_fixed: case ARM_VLD1DUPq16wb_register: case ARM_VLD1DUPq32wb_fixed: case ARM_VLD1DUPq32wb_register: case ARM_VLD1DUPq8wb_fixed: case ARM_VLD1DUPq8wb_register: if (!Check(&S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; } if (Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); // The fixed offset post-increment encodes Rm == 0xd. The no-writeback // variant encodes Rm == 0xf. Anything else is a register offset post- // increment and we need to add the register operand to the instruction. if (Rm != 0xD && Rm != 0xF && !Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeVLD2DupInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn, Rm, align, size; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; Rn = fieldFromInstruction_4(Insn, 16, 4); Rm = fieldFromInstruction_4(Insn, 0, 4); align = fieldFromInstruction_4(Insn, 4, 1); size = 1 << fieldFromInstruction_4(Insn, 6, 2); align *= 2*size; switch (MCInst_getOpcode(Inst)) { case ARM_VLD2DUPd16: case ARM_VLD2DUPd32: case ARM_VLD2DUPd8: case ARM_VLD2DUPd16wb_fixed: case ARM_VLD2DUPd16wb_register: case ARM_VLD2DUPd32wb_fixed: case ARM_VLD2DUPd32wb_register: case ARM_VLD2DUPd8wb_fixed: case ARM_VLD2DUPd8wb_register: if (!Check(&S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VLD2DUPd16x2: case ARM_VLD2DUPd32x2: case ARM_VLD2DUPd8x2: case ARM_VLD2DUPd16x2wb_fixed: case ARM_VLD2DUPd16x2wb_register: case ARM_VLD2DUPd32x2wb_fixed: case ARM_VLD2DUPd32x2wb_register: case ARM_VLD2DUPd8x2wb_fixed: case ARM_VLD2DUPd8x2wb_register: if (!Check(&S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; } if (Rm != 0xF) MCOperand_CreateImm0(Inst, 0); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xD && Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } return S; } static DecodeStatus DecodeVLD3DupInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn, Rm, inc; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; Rn = fieldFromInstruction_4(Insn, 16, 4); Rm = fieldFromInstruction_4(Insn, 0, 4); inc = fieldFromInstruction_4(Insn, 5, 1) + 1; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder))) return MCDisassembler_Fail; if (Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, 0); if (Rm == 0xD) MCOperand_CreateReg0(Inst, 0); else if (Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } return S; } static DecodeStatus DecodeVLD4DupInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn, Rm, size, inc, align; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; Rn = fieldFromInstruction_4(Insn, 16, 4); Rm = fieldFromInstruction_4(Insn, 0, 4); size = fieldFromInstruction_4(Insn, 6, 2); inc = fieldFromInstruction_4(Insn, 5, 1) + 1; align = fieldFromInstruction_4(Insn, 4, 1); if (size == 0x3) { if (align == 0) return MCDisassembler_Fail; align = 16; } else { if (size == 2) { align *= 8; } else { size = 1 << size; align *= 4 * size; } } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder))) return MCDisassembler_Fail; if (Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm == 0xD) MCOperand_CreateReg0(Inst, 0); else if (Rm != 0xF) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } return S; } static DecodeStatus DecodeNEONModImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned imm, Q; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; imm = fieldFromInstruction_4(Insn, 0, 4); imm |= fieldFromInstruction_4(Insn, 16, 3) << 4; imm |= fieldFromInstruction_4(Insn, 24, 1) << 7; imm |= fieldFromInstruction_4(Insn, 8, 4) << 8; imm |= fieldFromInstruction_4(Insn, 5, 1) << 12; Q = fieldFromInstruction_4(Insn, 6, 1); if (Q) { if (!Check(&S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; } else { if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; } MCOperand_CreateImm0(Inst, imm); switch (MCInst_getOpcode(Inst)) { case ARM_VORRiv4i16: case ARM_VORRiv2i32: case ARM_VBICiv4i16: case ARM_VBICiv2i32: if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; case ARM_VORRiv8i16: case ARM_VORRiv4i32: case ARM_VBICiv8i16: case ARM_VBICiv4i32: if (!Check(&S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; break; default: break; } return S; } static DecodeStatus DecodeVSHLMaxInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rm, size; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; Rm = fieldFromInstruction_4(Insn, 0, 4); Rm |= fieldFromInstruction_4(Insn, 5, 1) << 4; size = fieldFromInstruction_4(Insn, 18, 2); if (!Check(&S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, 8 << size); return S; } static DecodeStatus DecodeShiftRight8Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, 8 - Val); return MCDisassembler_Success; } static DecodeStatus DecodeShiftRight16Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, 16 - Val); return MCDisassembler_Success; } static DecodeStatus DecodeShiftRight32Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, 32 - Val); return MCDisassembler_Success; } static DecodeStatus DecodeShiftRight64Imm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, 64 - Val); return MCDisassembler_Success; } static DecodeStatus DecodeTBLInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn, Rm, op; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; Rn = fieldFromInstruction_4(Insn, 16, 4); Rn |= fieldFromInstruction_4(Insn, 7, 1) << 4; Rm = fieldFromInstruction_4(Insn, 0, 4); Rm |= fieldFromInstruction_4(Insn, 5, 1) << 4; op = fieldFromInstruction_4(Insn, 6, 1); if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (op) { if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; // Writeback } switch (MCInst_getOpcode(Inst)) { case ARM_VTBL2: case ARM_VTBX2: if (!Check(&S, DecodeDPairRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeDPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeThumbAddSpecialReg(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned dst = fieldFromInstruction_2(Insn, 8, 3); unsigned imm = fieldFromInstruction_2(Insn, 0, 8); if (!Check(&S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder))) return MCDisassembler_Fail; switch(MCInst_getOpcode(Inst)) { default: return MCDisassembler_Fail; case ARM_tADR: break; // tADR does not explicitly represent the PC as an operand. case ARM_tADDrSPi: MCOperand_CreateReg0(Inst, ARM_SP); break; } MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeThumbBROperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Val << 1, 12)); return MCDisassembler_Success; } static DecodeStatus DecodeT2BROperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Val, 21)); return MCDisassembler_Success; } static DecodeStatus DecodeThumbCmpBROperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, Val << 1); return MCDisassembler_Success; } static DecodeStatus DecodeThumbAddrModeRR(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 0, 3); unsigned Rm = fieldFromInstruction_4(Val, 3, 3); if (!Check(&S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodetGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeThumbAddrModeIS(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 0, 3); unsigned imm = fieldFromInstruction_4(Val, 3, 5); if (!Check(&S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeThumbAddrModePC(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { unsigned imm = Val << 2; MCOperand_CreateImm0(Inst, imm); //tryAddingPcLoadReferenceComment(Address, (Address & ~2u) + imm + 4, Decoder); return MCDisassembler_Success; } static DecodeStatus DecodeThumbAddrModeSP(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateReg0(Inst, ARM_SP); MCOperand_CreateImm0(Inst, Val); return MCDisassembler_Success; } static DecodeStatus DecodeT2AddrModeSOReg(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 6, 4); unsigned Rm = fieldFromInstruction_4(Val, 2, 4); unsigned imm = fieldFromInstruction_4(Val, 0, 2); // Thumb stores cannot use PC as dest register. switch (MCInst_getOpcode(Inst)) { case ARM_t2STRHs: case ARM_t2STRBs: case ARM_t2STRs: if (Rn == 15) return MCDisassembler_Fail; default: break; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned addrmode; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); uint64_t featureBits = ARM_getFeatureBits(Inst->csh->mode); bool hasMP = ((featureBits & ARM_FeatureMP) != 0); bool hasV7Ops = ((featureBits & ARM_HasV7Ops) != 0); if (Rn == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRBs: MCInst_setOpcode(Inst, ARM_t2LDRBpci); break; case ARM_t2LDRHs: MCInst_setOpcode(Inst, ARM_t2LDRHpci); break; case ARM_t2LDRSHs: MCInst_setOpcode(Inst, ARM_t2LDRSHpci); break; case ARM_t2LDRSBs: MCInst_setOpcode(Inst, ARM_t2LDRSBpci); break; case ARM_t2LDRs: MCInst_setOpcode(Inst, ARM_t2LDRpci); break; case ARM_t2PLDs: MCInst_setOpcode(Inst, ARM_t2PLDpci); break; case ARM_t2PLIs: MCInst_setOpcode(Inst, ARM_t2PLIpci); break; default: return MCDisassembler_Fail; } return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); } if (Rt == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRSHs: return MCDisassembler_Fail; case ARM_t2LDRHs: MCInst_setOpcode(Inst, ARM_t2PLDWs); break; case ARM_t2LDRSBs: MCInst_setOpcode(Inst, ARM_t2PLIs); default: break; } } switch (MCInst_getOpcode(Inst)) { case ARM_t2PLDs: break; case ARM_t2PLIs: if (!hasV7Ops) return MCDisassembler_Fail; break; case ARM_t2PLDWs: if (!hasV7Ops || !hasMP) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; } addrmode = fieldFromInstruction_4(Insn, 4, 2); addrmode |= fieldFromInstruction_4(Insn, 0, 4) << 2; addrmode |= fieldFromInstruction_4(Insn, 16, 4) << 6; if (!Check(&S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2LoadImm8(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned U = fieldFromInstruction_4(Insn, 9, 1); unsigned imm = fieldFromInstruction_4(Insn, 0, 8); unsigned add = fieldFromInstruction_4(Insn, 9, 1); uint64_t featureBits = ARM_getFeatureBits(Inst->csh->mode); bool hasMP = ((featureBits & ARM_FeatureMP) != 0); bool hasV7Ops = ((featureBits & ARM_HasV7Ops) != 0); imm |= (U << 8); imm |= (Rn << 9); if (Rn == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRi8: MCInst_setOpcode(Inst, ARM_t2LDRpci); break; case ARM_t2LDRBi8: MCInst_setOpcode(Inst, ARM_t2LDRBpci); break; case ARM_t2LDRSBi8: MCInst_setOpcode(Inst, ARM_t2LDRSBpci); break; case ARM_t2LDRHi8: MCInst_setOpcode(Inst, ARM_t2LDRHpci); break; case ARM_t2LDRSHi8: MCInst_setOpcode(Inst, ARM_t2LDRSHpci); break; case ARM_t2PLDi8: MCInst_setOpcode(Inst, ARM_t2PLDpci); break; case ARM_t2PLIi8: MCInst_setOpcode(Inst, ARM_t2PLIpci); break; default: return MCDisassembler_Fail; } return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); } if (Rt == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRSHi8: return MCDisassembler_Fail; case ARM_t2LDRHi8: if (!add) MCInst_setOpcode(Inst, ARM_t2PLDWi8); break; case ARM_t2LDRSBi8: MCInst_setOpcode(Inst, ARM_t2PLIi8); break; default: break; } } switch (MCInst_getOpcode(Inst)) { case ARM_t2PLDi8: break; case ARM_t2PLIi8: if (!hasV7Ops) return MCDisassembler_Fail; break; case ARM_t2PLDWi8: if (!hasV7Ops || !hasMP) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2LoadImm12(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 12); uint64_t featureBits = ARM_getFeatureBits(Inst->csh->mode); bool hasMP = ((featureBits & ARM_FeatureMP) != 0); bool hasV7Ops = ((featureBits & ARM_HasV7Ops) != 0); imm |= (Rn << 13); if (Rn == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRi12: MCInst_setOpcode(Inst, ARM_t2LDRpci); break; case ARM_t2LDRHi12: MCInst_setOpcode(Inst, ARM_t2LDRHpci); break; case ARM_t2LDRSHi12: MCInst_setOpcode(Inst, ARM_t2LDRSHpci); break; case ARM_t2LDRBi12: MCInst_setOpcode(Inst, ARM_t2LDRBpci); break; case ARM_t2LDRSBi12: MCInst_setOpcode(Inst, ARM_t2LDRSBpci); break; case ARM_t2PLDi12: MCInst_setOpcode(Inst, ARM_t2PLDpci); break; case ARM_t2PLIi12: MCInst_setOpcode(Inst, ARM_t2PLIpci); break; default: return MCDisassembler_Fail; } return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); } if (Rt == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRSHi12: return MCDisassembler_Fail; case ARM_t2LDRHi12: MCInst_setOpcode(Inst, ARM_t2PLDWi12); break; case ARM_t2LDRSBi12: MCInst_setOpcode(Inst, ARM_t2PLIi12); break; default: break; } } switch (MCInst_getOpcode(Inst)) { case ARM_t2PLDi12: break; case ARM_t2PLIi12: if (!hasV7Ops) return MCDisassembler_Fail; break; case ARM_t2PLDWi12: if (!hasV7Ops || !hasMP) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeT2AddrModeImm12(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2LoadT(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 8); imm |= (Rn << 9); if (Rn == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRT: MCInst_setOpcode(Inst, ARM_t2LDRpci); break; case ARM_t2LDRBT: MCInst_setOpcode(Inst, ARM_t2LDRBpci); break; case ARM_t2LDRHT: MCInst_setOpcode(Inst, ARM_t2LDRHpci); break; case ARM_t2LDRSBT: MCInst_setOpcode(Inst, ARM_t2LDRSBpci); break; case ARM_t2LDRSHT: MCInst_setOpcode(Inst, ARM_t2LDRSHpci); break; default: return MCDisassembler_Fail; } return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); } if (!Check(&S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2LoadLabel(MCInst *Inst, unsigned Insn, uint64_t Address, const void* Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned U = fieldFromInstruction_4(Insn, 23, 1); int imm = fieldFromInstruction_4(Insn, 0, 12); uint64_t featureBits = ARM_getFeatureBits(Inst->csh->mode); bool hasV7Ops = ((featureBits & ARM_HasV7Ops) != 0); if (Rt == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRBpci: case ARM_t2LDRHpci: MCInst_setOpcode(Inst, ARM_t2PLDpci); break; case ARM_t2LDRSBpci: MCInst_setOpcode(Inst, ARM_t2PLIpci); break; case ARM_t2LDRSHpci: return MCDisassembler_Fail; default: break; } } switch(MCInst_getOpcode(Inst)) { case ARM_t2PLDpci: break; case ARM_t2PLIpci: if (!hasV7Ops) return MCDisassembler_Fail; break; default: if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; } if (!U) { // Special case for #-0. if (imm == 0) imm = INT32_MIN; else imm = -imm; } MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeT2Imm8S4(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val == 0) MCOperand_CreateImm0(Inst, INT32_MIN); else { int imm = Val & 0xFF; if (!(Val & 0x100)) imm *= -1; MCOperand_CreateImm0(Inst, imm * 4); } return MCDisassembler_Success; } static DecodeStatus DecodeT2AddrModeImm8s4(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 9, 4); unsigned imm = fieldFromInstruction_4(Val, 0, 9); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeT2Imm8S4(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst *Inst,unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 8, 4); unsigned imm = fieldFromInstruction_4(Val, 0, 8); if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeT2Imm8(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { int imm = Val & 0xFF; if (Val == 0) imm = INT32_MIN; else if (!(Val & 0x100)) imm *= -1; MCOperand_CreateImm0(Inst, imm); return MCDisassembler_Success; } static DecodeStatus DecodeT2AddrModeImm8(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 9, 4); unsigned imm = fieldFromInstruction_4(Val, 0, 9); // Thumb stores cannot use PC as dest register. switch (MCInst_getOpcode(Inst)) { case ARM_t2STRT: case ARM_t2STRBT: case ARM_t2STRHT: case ARM_t2STRi8: case ARM_t2STRHi8: case ARM_t2STRBi8: if (Rn == 15) return MCDisassembler_Fail; break; default: break; } // Some instructions always use an additive offset. switch (MCInst_getOpcode(Inst)) { case ARM_t2LDRT: case ARM_t2LDRBT: case ARM_t2LDRHT: case ARM_t2LDRSBT: case ARM_t2LDRSHT: case ARM_t2STRT: case ARM_t2STRBT: case ARM_t2STRHT: imm |= 0x100; break; default: break; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeT2Imm8(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2LdStPre(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned load; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned addr = fieldFromInstruction_4(Insn, 0, 8); addr |= fieldFromInstruction_4(Insn, 9, 1) << 8; addr |= Rn << 9; load = fieldFromInstruction_4(Insn, 20, 1); if (Rn == 15) { switch (MCInst_getOpcode(Inst)) { case ARM_t2LDR_PRE: case ARM_t2LDR_POST: MCInst_setOpcode(Inst, ARM_t2LDRpci); break; case ARM_t2LDRB_PRE: case ARM_t2LDRB_POST: MCInst_setOpcode(Inst, ARM_t2LDRBpci); break; case ARM_t2LDRH_PRE: case ARM_t2LDRH_POST: MCInst_setOpcode(Inst, ARM_t2LDRHpci); break; case ARM_t2LDRSB_PRE: case ARM_t2LDRSB_POST: if (Rt == 15) MCInst_setOpcode(Inst, ARM_t2PLIpci); else MCInst_setOpcode(Inst, ARM_t2LDRSBpci); break; case ARM_t2LDRSH_PRE: case ARM_t2LDRSH_POST: MCInst_setOpcode(Inst, ARM_t2LDRSHpci); break; default: return MCDisassembler_Fail; } return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); } if (!load) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (load) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeT2AddrModeImm8(Inst, addr, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2AddrModeImm12(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Val, 13, 4); unsigned imm = fieldFromInstruction_4(Val, 0, 12); // Thumb stores cannot use PC as dest register. switch (MCInst_getOpcode(Inst)) { case ARM_t2STRi12: case ARM_t2STRBi12: case ARM_t2STRHi12: if (Rn == 15) return MCDisassembler_Fail; default: break; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, imm); return S; } static DecodeStatus DecodeThumbAddSPImm(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder) { unsigned imm = fieldFromInstruction_2(Insn, 0, 7); MCOperand_CreateReg0(Inst, ARM_SP); MCOperand_CreateReg0(Inst, ARM_SP); MCOperand_CreateImm0(Inst, imm); return MCDisassembler_Success; } static DecodeStatus DecodeThumbAddSPReg(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; if (MCInst_getOpcode(Inst) == ARM_tADDrSP) { unsigned Rdm = fieldFromInstruction_2(Insn, 0, 3); Rdm |= fieldFromInstruction_2(Insn, 7, 1) << 3; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, ARM_SP); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder))) return MCDisassembler_Fail; } else if (MCInst_getOpcode(Inst) == ARM_tADDspr) { unsigned Rm = fieldFromInstruction_2(Insn, 3, 4); MCOperand_CreateReg0(Inst, ARM_SP); MCOperand_CreateReg0(Inst, ARM_SP); if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } return S; } static DecodeStatus DecodeThumbCPS(MCInst *Inst, uint16_t Insn, uint64_t Address, const void *Decoder) { unsigned imod = fieldFromInstruction_2(Insn, 4, 1) | 0x2; unsigned flags = fieldFromInstruction_2(Insn, 0, 3); MCOperand_CreateImm0(Inst, imod); MCOperand_CreateImm0(Inst, flags); return MCDisassembler_Success; } static DecodeStatus DecodePostIdxReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned add = fieldFromInstruction_4(Insn, 4, 1); if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, add); return S; } static DecodeStatus DecodeThumbBLXOffset(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { // Val is passed in as S:J1:J2:imm10H:imm10L:'0' // Note only one trailing zero not two. Also the J1 and J2 values are from // the encoded instruction. So here change to I1 and I2 values via: // I1 = NOT(J1 EOR S); // I2 = NOT(J2 EOR S); // and build the imm32 with two trailing zeros as documented: // imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', 32); unsigned S = (Val >> 23) & 1; unsigned J1 = (Val >> 22) & 1; unsigned J2 = (Val >> 21) & 1; unsigned I1 = !(J1 ^ S); unsigned I2 = !(J2 ^ S); unsigned tmp = (Val & ~0x600000) | (I1 << 22) | (I2 << 21); int imm32 = SignExtend32(tmp << 1, 25); MCOperand_CreateImm0(Inst, imm32); return MCDisassembler_Success; } static DecodeStatus DecodeCoprocessor(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val == 0xA || Val == 0xB) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, Val); return MCDisassembler_Success; } static DecodeStatus DecodeThumbTableBranch(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); if (Rn == ARM_SP) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeThumb2BCCInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned brtarget; unsigned pred = fieldFromInstruction_4(Insn, 22, 4); if (pred == 0xE || pred == 0xF) { unsigned imm; unsigned opc = fieldFromInstruction_4(Insn, 4, 28); switch (opc) { default: return MCDisassembler_Fail; case 0xf3bf8f4: MCInst_setOpcode(Inst, ARM_t2DSB); break; case 0xf3bf8f5: MCInst_setOpcode(Inst, ARM_t2DMB); break; case 0xf3bf8f6: MCInst_setOpcode(Inst, ARM_t2ISB); break; } imm = fieldFromInstruction_4(Insn, 0, 4); return DecodeMemBarrierOption(Inst, imm, Address, Decoder); } brtarget = fieldFromInstruction_4(Insn, 0, 11) << 1; brtarget |= fieldFromInstruction_4(Insn, 11, 1) << 19; brtarget |= fieldFromInstruction_4(Insn, 13, 1) << 18; brtarget |= fieldFromInstruction_4(Insn, 16, 6) << 12; brtarget |= fieldFromInstruction_4(Insn, 26, 1) << 20; if (!Check(&S, DecodeT2BROperand(Inst, brtarget, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } // Decode a shifted immediate operand. These basically consist // of an 8-bit value, and a 4-bit directive that specifies either // a splat operation or a rotation. static DecodeStatus DecodeT2SOImm(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { unsigned ctrl = fieldFromInstruction_4(Val, 10, 2); if (ctrl == 0) { unsigned byte = fieldFromInstruction_4(Val, 8, 2); unsigned imm = fieldFromInstruction_4(Val, 0, 8); switch (byte) { case 0: MCOperand_CreateImm0(Inst, imm); break; case 1: MCOperand_CreateImm0(Inst, (imm << 16) | imm); break; case 2: MCOperand_CreateImm0(Inst, (imm << 24) | (imm << 8)); break; case 3: MCOperand_CreateImm0(Inst, (imm << 24) | (imm << 16) | (imm << 8) | imm); break; } } else { unsigned unrot = fieldFromInstruction_4(Val, 0, 7) | 0x80; unsigned rot = fieldFromInstruction_4(Val, 7, 5); unsigned imm = (unrot >> rot) | (unrot << ((32-rot)&31)); MCOperand_CreateImm0(Inst, imm); } return MCDisassembler_Success; } static DecodeStatus DecodeThumbBCCTargetOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Val << 1, 9)); return MCDisassembler_Success; } static DecodeStatus DecodeThumbBLTargetOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { // Val is passed in as S:J1:J2:imm10:imm11 // Note no trailing zero after imm11. Also the J1 and J2 values are from // the encoded instruction. So here change to I1 and I2 values via: // I1 = NOT(J1 EOR S); // I2 = NOT(J2 EOR S); // and build the imm32 with one trailing zero as documented: // imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', 32); unsigned S = (Val >> 23) & 1; unsigned J1 = (Val >> 22) & 1; unsigned J2 = (Val >> 21) & 1; unsigned I1 = !(J1 ^ S); unsigned I2 = !(J2 ^ S); unsigned tmp = (Val & ~0x600000) | (I1 << 22) | (I2 << 21); int imm32 = SignExtend32(tmp << 1, 25); MCOperand_CreateImm0(Inst, imm32); return MCDisassembler_Success; } static DecodeStatus DecodeMemBarrierOption(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val & ~0xf) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, Val); return MCDisassembler_Success; } static DecodeStatus DecodeInstSyncBarrierOption(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { if (Val & ~0xf) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, Val); return MCDisassembler_Success; } static DecodeStatus DecodeMSRMask(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; uint64_t FeatureBits = ARM_getFeatureBits(Inst->csh->mode); if (FeatureBits & ARM_FeatureMClass) { unsigned ValLow = Val & 0xff; // Validate the SYSm value first. switch (ValLow) { case 0: // apsr case 1: // iapsr case 2: // eapsr case 3: // xpsr case 5: // ipsr case 6: // epsr case 7: // iepsr case 8: // msp case 9: // psp case 16: // primask case 20: // control break; case 17: // basepri case 18: // basepri_max case 19: // faultmask if (!(FeatureBits & ARM_HasV7Ops)) // Values basepri, basepri_max and faultmask are only valid for v7m. return MCDisassembler_Fail; break; default: return MCDisassembler_Fail; } if (MCInst_getOpcode(Inst) == ARM_t2MSR_M) { unsigned Mask = fieldFromInstruction_4(Val, 10, 2); if (!(FeatureBits & ARM_HasV7Ops)) { // The ARMv6-M MSR bits {11-10} can be only 0b10, other values are // unpredictable. if (Mask != 2) S = MCDisassembler_SoftFail; } else { // The ARMv7-M architecture stores an additional 2-bit mask value in // MSR bits {11-10}. The mask is used only with apsr, iapsr, eapsr and // xpsr, it has to be 0b10 in other cases. Bit mask{1} indicates if // the NZCVQ bits should be moved by the instruction. Bit mask{0} // indicates the move for the GE{3:0} bits, the mask{0} bit can be set // only if the processor includes the DSP extension. if (Mask == 0 || (Mask != 2 && ValLow > 3) || (!(FeatureBits & ARM_FeatureDSPThumb2) && (Mask & 1))) S = MCDisassembler_SoftFail; } } } else { // A/R class if (Val == 0) return MCDisassembler_Fail; } MCOperand_CreateImm0(Inst, Val); return S; } static DecodeStatus DecodeBankedReg(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { unsigned R = fieldFromInstruction_4(Val, 5, 1); unsigned SysM = fieldFromInstruction_4(Val, 0, 5); // The table of encodings for these banked registers comes from B9.2.3 of the // ARM ARM. There are patterns, but nothing regular enough to make this logic // neater. So by fiat, these values are UNPREDICTABLE: if (!R) { if (SysM == 0x7 || SysM == 0xf || SysM == 0x18 || SysM == 0x19 || SysM == 0x1a || SysM == 0x1b) return MCDisassembler_SoftFail; } else { if (SysM != 0xe && SysM != 0x10 && SysM != 0x12 && SysM != 0x14 && SysM != 0x16 && SysM != 0x1c && SysM != 0x1e) return MCDisassembler_SoftFail; } MCOperand_CreateImm0(Inst, Val); return MCDisassembler_Success; } static DecodeStatus DecodeDoubleRegLoad(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); if (Rn == 0xF) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRPairRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeDoubleRegStore(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); unsigned Rt = fieldFromInstruction_4(Insn, 0, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (Rn == 0xF || Rd == Rn || Rd == Rt || Rd == Rt+1) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRPairRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeLDRPreImm(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 12); imm |= fieldFromInstruction_4(Insn, 16, 4) << 13; imm |= fieldFromInstruction_4(Insn, 23, 1) << 12; pred = fieldFromInstruction_4(Insn, 28, 4); if (Rn == 0xF || Rn == Rt) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeLDRPreReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred, Rm; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 12); imm |= fieldFromInstruction_4(Insn, 16, 4) << 13; imm |= fieldFromInstruction_4(Insn, 23, 1) << 12; pred = fieldFromInstruction_4(Insn, 28, 4); Rm = fieldFromInstruction_4(Insn, 0, 4); if (Rn == 0xF || Rn == Rt) S = MCDisassembler_SoftFail; if (Rm == 0xF) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeSORegMemOperand(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeSTRPreImm(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 12); imm |= fieldFromInstruction_4(Insn, 16, 4) << 13; imm |= fieldFromInstruction_4(Insn, 23, 1) << 12; pred = fieldFromInstruction_4(Insn, 28, 4); if (Rn == 0xF || Rn == Rt) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeSTRPreReg(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned imm = fieldFromInstruction_4(Insn, 0, 12); imm |= fieldFromInstruction_4(Insn, 16, 4) << 13; imm |= fieldFromInstruction_4(Insn, 23, 1) << 12; pred = fieldFromInstruction_4(Insn, 28, 4); if (Rn == 0xF || Rn == Rt) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeSORegMemOperand(Inst, imm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeVLD1LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: if (fieldFromInstruction_4(Insn, 4, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 5, 3); break; case 1: if (fieldFromInstruction_4(Insn, 5, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 4, 1)) align = 2; break; case 2: if (fieldFromInstruction_4(Insn, 6, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 7, 1); switch (fieldFromInstruction_4(Insn, 4, 2)) { case 0 : align = 0; break; case 3: align = 4; break; default: return MCDisassembler_Fail; } break; } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVST1LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: if (fieldFromInstruction_4(Insn, 4, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 5, 3); break; case 1: if (fieldFromInstruction_4(Insn, 5, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 4, 1)) align = 2; break; case 2: if (fieldFromInstruction_4(Insn, 6, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 7, 1); switch (fieldFromInstruction_4(Insn, 4, 2)) { case 0: align = 0; break; case 3: align = 4; break; default: return MCDisassembler_Fail; } break; } if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVLD2LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0, inc = 1; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: index = fieldFromInstruction_4(Insn, 5, 3); if (fieldFromInstruction_4(Insn, 4, 1)) align = 2; break; case 1: index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 4, 1)) align = 4; if (fieldFromInstruction_4(Insn, 5, 1)) inc = 2; break; case 2: if (fieldFromInstruction_4(Insn, 5, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 7, 1); if (fieldFromInstruction_4(Insn, 4, 1) != 0) align = 8; if (fieldFromInstruction_4(Insn, 6, 1)) inc = 2; break; } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVST2LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0, inc = 1; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: index = fieldFromInstruction_4(Insn, 5, 3); if (fieldFromInstruction_4(Insn, 4, 1)) align = 2; break; case 1: index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 4, 1)) align = 4; if (fieldFromInstruction_4(Insn, 5, 1)) inc = 2; break; case 2: if (fieldFromInstruction_4(Insn, 5, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 7, 1); if (fieldFromInstruction_4(Insn, 4, 1) != 0) align = 8; if (fieldFromInstruction_4(Insn, 6, 1)) inc = 2; break; } if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVLD3LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0, inc = 1; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: if (fieldFromInstruction_4(Insn, 4, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 5, 3); break; case 1: if (fieldFromInstruction_4(Insn, 4, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 5, 1)) inc = 2; break; case 2: if (fieldFromInstruction_4(Insn, 4, 2)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 7, 1); if (fieldFromInstruction_4(Insn, 6, 1)) inc = 2; break; } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) return MCDisassembler_Fail; if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVST3LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0, inc = 1; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: if (fieldFromInstruction_4(Insn, 4, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 5, 3); break; case 1: if (fieldFromInstruction_4(Insn, 4, 1)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 5, 1)) inc = 2; break; case 2: if (fieldFromInstruction_4(Insn, 4, 2)) return MCDisassembler_Fail; // UNDEFINED index = fieldFromInstruction_4(Insn, 7, 1); if (fieldFromInstruction_4(Insn, 6, 1)) inc = 2; break; } if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVLD4LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0, inc = 1; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: if (fieldFromInstruction_4(Insn, 4, 1)) align = 4; index = fieldFromInstruction_4(Insn, 5, 3); break; case 1: if (fieldFromInstruction_4(Insn, 4, 1)) align = 8; index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 5, 1)) inc = 2; break; case 2: switch (fieldFromInstruction_4(Insn, 4, 2)) { case 0: align = 0; break; case 3: return MCDisassembler_Fail; default: align = 4 << fieldFromInstruction_4(Insn, 4, 2); break; } index = fieldFromInstruction_4(Insn, 7, 1); if (fieldFromInstruction_4(Insn, 6, 1)) inc = 2; break; } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder))) return MCDisassembler_Fail; if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVST4LN(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned size, align = 0, index = 0, inc = 1; unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; size = fieldFromInstruction_4(Insn, 10, 2); switch (size) { default: return MCDisassembler_Fail; case 0: if (fieldFromInstruction_4(Insn, 4, 1)) align = 4; index = fieldFromInstruction_4(Insn, 5, 3); break; case 1: if (fieldFromInstruction_4(Insn, 4, 1)) align = 8; index = fieldFromInstruction_4(Insn, 6, 2); if (fieldFromInstruction_4(Insn, 5, 1)) inc = 2; break; case 2: switch (fieldFromInstruction_4(Insn, 4, 2)) { case 0: align = 0; break; case 3: return MCDisassembler_Fail; default: align = 4 << fieldFromInstruction_4(Insn, 4, 2); break; } index = fieldFromInstruction_4(Insn, 7, 1); if (fieldFromInstruction_4(Insn, 6, 1)) inc = 2; break; } if (Rm != 0xF) { // Writeback if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; } if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, align); if (Rm != 0xF) { if (Rm != 0xD) { if (!Check(&S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; } else MCOperand_CreateReg0(Inst, 0); } if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, index); return S; } static DecodeStatus DecodeVMOVSRR(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 5, 1); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); Rm |= fieldFromInstruction_4(Insn, 0, 4) << 1; if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeSPRRegisterClass(Inst, Rm , Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt , Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeVMOVRRS(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction_4(Insn, 16, 4); unsigned Rm = fieldFromInstruction_4(Insn, 5, 1); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); Rm |= fieldFromInstruction_4(Insn, 0, 4) << 1; if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt , Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeSPRRegisterClass(Inst, Rm , Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeIT(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned pred = fieldFromInstruction_4(Insn, 4, 4); unsigned mask = fieldFromInstruction_4(Insn, 0, 4); if (pred == 0xF) { pred = 0xE; S = MCDisassembler_SoftFail; } if (mask == 0x0) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, pred); MCOperand_CreateImm0(Inst, mask); return S; } static DecodeStatus DecodeT2LDRDPreInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction_4(Insn, 8, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned addr = fieldFromInstruction_4(Insn, 0, 8); unsigned W = fieldFromInstruction_4(Insn, 21, 1); unsigned U = fieldFromInstruction_4(Insn, 23, 1); unsigned P = fieldFromInstruction_4(Insn, 24, 1); bool writeback = (W == 1) | (P == 0); addr |= (U << 8) | (Rn << 9); if (writeback && (Rn == Rt || Rn == Rt2)) Check(&S, MCDisassembler_SoftFail); if (Rt == Rt2) Check(&S, MCDisassembler_SoftFail); // Rt if (!Check(&S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; // Rt2 if (!Check(&S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder))) return MCDisassembler_Fail; // Writeback operand if (!Check(&S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; // addr if (!Check(&S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2STRDPreInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction_4(Insn, 8, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned addr = fieldFromInstruction_4(Insn, 0, 8); unsigned W = fieldFromInstruction_4(Insn, 21, 1); unsigned U = fieldFromInstruction_4(Insn, 23, 1); unsigned P = fieldFromInstruction_4(Insn, 24, 1); bool writeback = (W == 1) | (P == 0); addr |= (U << 8) | (Rn << 9); if (writeback && (Rn == Rt || Rn == Rt2)) Check(&S, MCDisassembler_SoftFail); // Writeback operand if (!Check(&S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; // Rt if (!Check(&S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; // Rt2 if (!Check(&S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder))) return MCDisassembler_Fail; // addr if (!Check(&S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeT2Adr(MCInst *Inst, uint32_t Insn, uint64_t Address, const void *Decoder) { unsigned Val; unsigned sign1 = fieldFromInstruction_4(Insn, 21, 1); unsigned sign2 = fieldFromInstruction_4(Insn, 23, 1); if (sign1 != sign2) return MCDisassembler_Fail; Val = fieldFromInstruction_4(Insn, 0, 8); Val |= fieldFromInstruction_4(Insn, 12, 3) << 8; Val |= fieldFromInstruction_4(Insn, 26, 1) << 11; Val |= sign1 << 12; MCOperand_CreateImm0(Inst, SignExtend32(Val, 13)); return MCDisassembler_Success; } static DecodeStatus DecodeT2ShifterImmOperand(MCInst *Inst, uint32_t Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; // Shift of "asr #32" is not allowed in Thumb2 mode. if (Val == 0x20) S = MCDisassembler_Fail; MCOperand_CreateImm0(Inst, Val); return S; } static DecodeStatus DecodeSwap(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S; unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction_4(Insn, 0, 4); unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); unsigned pred = fieldFromInstruction_4(Insn, 28, 4); if (pred == 0xF) return DecodeCPSInstruction(Inst, Insn, Address, Decoder); S = MCDisassembler_Success; if (Rt == Rn || Rn == Rt2) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, pred, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeVCVTD(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Vm, imm, cmode, op; unsigned Vd = (fieldFromInstruction_4(Insn, 12, 4) << 0); Vd |= (fieldFromInstruction_4(Insn, 22, 1) << 4); Vm = (fieldFromInstruction_4(Insn, 0, 4) << 0); Vm |= (fieldFromInstruction_4(Insn, 5, 1) << 4); imm = fieldFromInstruction_4(Insn, 16, 6); cmode = fieldFromInstruction_4(Insn, 8, 4); op = fieldFromInstruction_4(Insn, 5, 1); // VMOVv2f32 is ambiguous with these decodings. if (!(imm & 0x38) && cmode == 0xF) { if (op == 1) return MCDisassembler_Fail; MCInst_setOpcode(Inst, ARM_VMOVv2f32); return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder); } if (!(imm & 0x20)) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, 64 - imm); return S; } static DecodeStatus DecodeVCVTQ(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Vm, imm, cmode, op; unsigned Vd = (fieldFromInstruction_4(Insn, 12, 4) << 0); Vd |= (fieldFromInstruction_4(Insn, 22, 1) << 4); Vm = (fieldFromInstruction_4(Insn, 0, 4) << 0); Vm |= (fieldFromInstruction_4(Insn, 5, 1) << 4); imm = fieldFromInstruction_4(Insn, 16, 6); cmode = fieldFromInstruction_4(Insn, 8, 4); op = fieldFromInstruction_4(Insn, 5, 1); // VMOVv4f32 is ambiguous with these decodings. if (!(imm & 0x38) && cmode == 0xF) { if (op == 1) return MCDisassembler_Fail; MCInst_setOpcode(Inst, ARM_VMOVv4f32); return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder); } if (!(imm & 0x20)) return MCDisassembler_Fail; if (!Check(&S, DecodeQPRRegisterClass(Inst, Vd, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeQPRRegisterClass(Inst, Vm, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, 64 - imm); return S; } static DecodeStatus DecodeLDR(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned Cond; unsigned Rn = fieldFromInstruction_4(Val, 16, 4); unsigned Rt = fieldFromInstruction_4(Val, 12, 4); unsigned Rm = fieldFromInstruction_4(Val, 0, 4); Rm |= (fieldFromInstruction_4(Val, 23, 1) << 4); Cond = fieldFromInstruction_4(Val, 28, 4); if (fieldFromInstruction_4(Val, 8, 4) != 0 || Rn == Rt) S = MCDisassembler_SoftFail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeAddrMode7Operand(Inst, Rn, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePostIdxReg(Inst, Rm, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodePredicateOperand(Inst, Cond, Address, Decoder))) return MCDisassembler_Fail; return S; } static DecodeStatus DecodeMRRC2(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler_Success; unsigned CRm = fieldFromInstruction_4(Val, 0, 4); unsigned opc1 = fieldFromInstruction_4(Val, 4, 4); unsigned cop = fieldFromInstruction_4(Val, 8, 4); unsigned Rt = fieldFromInstruction_4(Val, 12, 4); unsigned Rt2 = fieldFromInstruction_4(Val, 16, 4); if ((cop & ~0x1) == 0xa) return MCDisassembler_Fail; if (Rt == Rt2) S = MCDisassembler_SoftFail; MCOperand_CreateImm0(Inst, cop); MCOperand_CreateImm0(Inst, opc1); if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler_Fail; if (!Check(&S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder))) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, CRm); return S; } #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMDisassembler.h010066400017500001750000000011111363402546700207460ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_ARMDISASSEMBLER_H #define CS_ARMDISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" void ARM_init(MCRegisterInfo *MRI); bool ARM_getInstruction(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); bool Thumb_getInstruction(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); uint64_t ARM_getFeatureBits(unsigned int mode); #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMGenAsmWriter.inc010066400017500001750000013403411363402546700212360ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 1341U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 1334U, // BUNDLE 1351U, // LIFETIME_START 1321U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // ABS 5780U, // ADCri 5780U, // ADCrr 9876U, // ADCrsi 13972U, // ADCrsr 0U, // ADDSri 0U, // ADDSrr 0U, // ADDSrsi 0U, // ADDSrsr 5841U, // ADDri 5841U, // ADDrr 9937U, // ADDrsi 14033U, // ADDrsr 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 18818U, // ADR 1090671288U, // AESD 1090671296U, // AESE 1107448485U, // AESIMC 1107448495U, // AESMC 5894U, // ANDri 5894U, // ANDrr 9990U, // ANDrsi 14086U, // ANDrsr 268720U, // ASRi 268720U, // ASRr 0U, // B 0U, // BCCZi64 0U, // BCCi64 26268U, // BFC 30689U, // BFI 5793U, // BICri 5793U, // BICrr 9889U, // BICrsi 13985U, // BICrsr 414547U, // BKPT 414527U, // BL 414594U, // BLX 1073777598U, // BLX_pred 414594U, // BLXi 1073776690U, // BL_pred 0U, // BMOVPCB_CALL 0U, // BMOVPCRX_CALL 0U, // BR_JTadd 0U, // BR_JTm 0U, // BR_JTr 414590U, // BX 1073776627U, // BXJ 0U, // BX_CALL 564058U, // BX_RET 1073777498U, // BX_pred 1073776047U, // Bcc 2197858637U, // CDP 67809687U, // CDP2 2984U, // CLREX 19434U, // CLZ 18675U, // CMNri 18675U, // CMNzrr 26867U, // CMNzrsi 30963U, // CMNzrsr 18775U, // CMPri 18775U, // CMPrr 26967U, // CMPrsi 31063U, // CMPrsr 0U, // CONSTPOOL_ENTRY 0U, // COPY_STRUCT_BYVAL_I32 414531U, // CPS1p 1157679622U, // CPS2p 83937798U, // CPS3p 33706710U, // CRC32B 33706718U, // CRC32CB 33706787U, // CRC32CH 33706863U, // CRC32CW 33706779U, // CRC32H 33706855U, // CRC32W 1073776486U, // DBG 54005U, // DMB 54010U, // DSB 6558U, // EORri 6558U, // EORrr 10654U, // EORrsi 14750U, // EORrsr 432735U, // ERET 3322694403U, // FCONSTD 3322825475U, // FCONSTS 33573717U, // FLDMXDB_UPD 35614U, // FLDMXIA 33573662U, // FLDMXIA_UPD 1088010U, // FMSTAT 33573725U, // FSTMXDB_UPD 35622U, // FSTMXIA 33573670U, // FSTMXIA_UPD 1073777302U, // HINT 414542U, // HLT 414468U, // HVC 58111U, // ISB 117766788U, // ITasm 0U, // Int_eh_sjlj_dispatchsetup 0U, // Int_eh_sjlj_longjmp 0U, // Int_eh_sjlj_setjmp 0U, // Int_eh_sjlj_setjmp_nofp 17755U, // LDA 17836U, // LDAB 19350U, // LDAEX 18036U, // LDAEXB 134235936U, // LDAEXD 18373U, // LDAEXH 18293U, // LDAH 152220465U, // LDC2L_OFFSET 1242739505U, // LDC2L_OPTION 2316481329U, // LDC2L_POST 185774897U, // LDC2L_PRE 152220030U, // LDC2_OFFSET 1242739070U, // LDC2_OPTION 2316480894U, // LDC2_POST 185774462U, // LDC2_PRE 3271587899U, // LDCL_OFFSET 3271587899U, // LDCL_OPTION 3271587899U, // LDCL_POST 3271587899U, // LDCL_PRE 3271587480U, // LDC_OFFSET 3271587480U, // LDC_OPTION 3271587480U, // LDC_POST 3271587480U, // LDC_PRE 34143U, // LDMDA 33572191U, // LDMDA_UPD 34270U, // LDMDB 33572318U, // LDMDB_UPD 35010U, // LDMIA 0U, // LDMIA_RET 33573058U, // LDMIA_UPD 34289U, // LDMIB 33572337U, // LDMIB_UPD 281164U, // LDRBT_POST 68172U, // LDRBT_POST_IMM 68172U, // LDRBT_POST_REG 67083U, // LDRB_POST_IMM 67083U, // LDRB_POST_REG 30219U, // LDRB_PRE_IMM 67083U, // LDRB_PRE_REG 26123U, // LDRBi12 30219U, // LDRBrs 67338U, // LDRD 42762U, // LDRD_POST 42762U, // LDRD_PRE 19362U, // LDREX 18050U, // LDREXB 134235950U, // LDREXD 18387U, // LDREXH 30624U, // LDRH 31343U, // LDRHTi 68207U, // LDRHTr 67488U, // LDRH_POST 67488U, // LDRH_PRE 0U, // LDRLIT_ga_abs 0U, // LDRLIT_ga_pcrel 0U, // LDRLIT_ga_pcrel_ldr 30237U, // LDRSB 31320U, // LDRSBTi 68184U, // LDRSBTr 67101U, // LDRSB_POST 67101U, // LDRSB_PRE 30634U, // LDRSH 31355U, // LDRSHTi 68219U, // LDRSHTr 67498U, // LDRSH_POST 67498U, // LDRSH_PRE 281243U, // LDRT_POST 68251U, // LDRT_POST_IMM 68251U, // LDRT_POST_REG 67975U, // LDR_POST_IMM 67975U, // LDR_POST_REG 31111U, // LDR_PRE_IMM 67975U, // LDR_PRE_REG 27015U, // LDRcp 27015U, // LDRi12 31111U, // LDRrs 0U, // LEApcrel 0U, // LEApcrelJT 268445U, // LSLi 268445U, // LSLr 268727U, // LSRi 268727U, // LSRr 2197858686U, // MCR 17478045U, // MCR2 2197883302U, // MCRR 17478051U, // MCRR2 9607U, // MLA 0U, // MLAv5 31209U, // MLS 0U, // MOVCCi 0U, // MOVCCi16 0U, // MOVCCi32imm 0U, // MOVCCr 0U, // MOVCCsi 0U, // MOVCCsr 1350404U, // MOVPCLR 0U, // MOVPCRX 27345U, // MOVTi16 0U, // MOVTi16_ga_pcrel 0U, // MOV_ga_pcrel 0U, // MOV_ga_pcrel_ldr 72452U, // MOVi 19225U, // MOVi16 0U, // MOVi16_ga_pcrel 0U, // MOVi32imm 72452U, // MOVr 72452U, // MOVr_TC 6916U, // MOVsi 11012U, // MOVsr 0U, // MOVsra_flag 0U, // MOVsrl_flag 201369257U, // MRC 74116U, // MRC2 2197882541U, // MRRC 17478026U, // MRRC2 35339U, // MRS 18955U, // MRSbanked 1073777163U, // MRSsys 2365606332U, // MSR 234899900U, // MSRbanked 2365606332U, // MSRi 6317U, // MUL 0U, // MULv5 0U, // MVNCCi 71991U, // MVNi 71991U, // MVNr 6455U, // MVNsi 10551U, // MVNsr 6572U, // ORRri 6572U, // ORRrr 10668U, // ORRrsi 14764U, // ORRrsr 0U, // PICADD 0U, // PICLDR 0U, // PICLDRB 0U, // PICLDRH 0U, // PICLDRSB 0U, // PICLDRSH 0U, // PICSTR 0U, // PICSTRB 0U, // PICSTRH 31287U, // PKHBT 30250U, // PKHTB 78712U, // PLDWi12 82808U, // PLDWrs 78601U, // PLDi12 82697U, // PLDrs 78636U, // PLIi12 82732U, // PLIrs 26345U, // QADD 25776U, // QADD16 25879U, // QADD8 27603U, // QASX 26319U, // QDADD 26191U, // QDSUB 27462U, // QSAX 26204U, // QSUB 25738U, // QSUB16 25840U, // QSUB8 19074U, // RBIT 19184U, // REV 17620U, // REV16 18357U, // REVSH 414408U, // RFEDA 1462984U, // RFEDA_UPD 414439U, // RFEDB 1463015U, // RFEDB_UPD 414415U, // RFEIA 1462991U, // RFEIA_UPD 414446U, // RFEIB 1463022U, // RFEIB_UPD 268706U, // RORi 268706U, // RORr 0U, // RRX 334786U, // RRXi 0U, // RSBSri 0U, // RSBSrsi 0U, // RSBSrsr 5663U, // RSBri 5663U, // RSBrr 9759U, // RSBrsi 13855U, // RSBrsr 5810U, // RSCri 5810U, // RSCrr 9906U, // RSCrsi 14002U, // RSCrsr 25783U, // SADD16 25885U, // SADD8 27608U, // SASX 5776U, // SBCri 5776U, // SBCrr 9872U, // SBCrsi 13968U, // SBCrsr 31668U, // SBFX 27380U, // SDIV 26712U, // SEL 86798U, // SETEND 16928834U, // SHA1C 1107447884U, // SHA1H 16928866U, // SHA1M 16928876U, // SHA1P 16928769U, // SHA1SU0 1090670619U, // SHA1SU1 16928854U, // SHA256H 16928821U, // SHA256H2 1090670605U, // SHA256SU0 16928807U, // SHA256SU1 25759U, // SHADD16 25864U, // SHADD8 27590U, // SHASX 27449U, // SHSAX 25721U, // SHSUB16 25825U, // SHSUB8 1073776293U, // SMC 30141U, // SMLABB 31280U, // SMLABT 30398U, // SMLAD 31594U, // SMLADX 92190U, // SMLAL 30148U, // SMLALBB 31293U, // SMLALBT 30451U, // SMLALD 31608U, // SMLALDX 30256U, // SMLALTB 31415U, // SMLALTT 0U, // SMLALv5 30243U, // SMLATB 31408U, // SMLATT 30310U, // SMLAWB 31446U, // SMLAWT 30484U, // SMLSD 31624U, // SMLSDX 30462U, // SMLSLD 31616U, // SMLSLDX 30085U, // SMMLA 31095U, // SMMLAR 31207U, // SMMLS 31156U, // SMMLSR 26795U, // SMMUL 27030U, // SMMULR 26308U, // SMUAD 27505U, // SMUADX 26060U, // SMULBB 27205U, // SMULBT 10370U, // SMULL 0U, // SMULLv5 26168U, // SMULTB 27327U, // SMULTT 26221U, // SMULWB 27357U, // SMULWT 26394U, // SMUSD 27535U, // SMUSDX 0U, // SPACE 414658U, // SRSDA 414610U, // SRSDA_UPD 414680U, // SRSDB 414634U, // SRSDB_UPD 414669U, // SRSIA 414622U, // SRSIA_UPD 414691U, // SRSIB 414646U, // SRSIB_UPD 31270U, // SSAT 25797U, // SSAT16 27467U, // SSAX 25745U, // SSUB16 25846U, // SSUB8 152220472U, // STC2L_OFFSET 1242739512U, // STC2L_OPTION 2316481336U, // STC2L_POST 185774904U, // STC2L_PRE 152220049U, // STC2_OFFSET 1242739089U, // STC2_OPTION 2316480913U, // STC2_POST 185774481U, // STC2_PRE 3271587904U, // STCL_OFFSET 3271587904U, // STCL_OPTION 3271587904U, // STCL_POST 3271587904U, // STCL_PRE 3271587510U, // STC_OFFSET 3271587510U, // STC_OPTION 3271587510U, // STC_POST 3271587510U, // STC_PRE 18599U, // STL 17917U, // STLB 27548U, // STLEX 26235U, // STLEXB 26407U, // STLEXD 26572U, // STLEXH 18314U, // STLH 34149U, // STMDA 33572197U, // STMDA_UPD 34277U, // STMDB 33572325U, // STMDB_UPD 35014U, // STMIA 33573062U, // STMIA_UPD 34295U, // STMIB 33572343U, // STMIB_UPD 281170U, // STRBT_POST 33622610U, // STRBT_POST_IMM 33622610U, // STRBT_POST_REG 33621520U, // STRB_POST_IMM 33621520U, // STRB_POST_REG 33584656U, // STRB_PRE_IMM 33621520U, // STRB_PRE_REG 26128U, // STRBi12 0U, // STRBi_preidx 0U, // STRBr_preidx 30224U, // STRBrs 67343U, // STRD 33597199U, // STRD_POST 33597199U, // STRD_PRE 27566U, // STREX 26249U, // STREXB 26421U, // STREXD 26586U, // STREXH 30629U, // STRH 33585781U, // STRHTi 33622645U, // STRHTr 33621925U, // STRH_POST 33621925U, // STRH_PRE 0U, // STRH_preidx 281254U, // STRT_POST 33622694U, // STRT_POST_IMM 33622694U, // STRT_POST_REG 33622472U, // STR_POST_IMM 33622472U, // STR_POST_REG 33585608U, // STR_PRE_IMM 33622472U, // STR_PRE_REG 27080U, // STRi12 0U, // STRi_preidx 0U, // STRr_preidx 31176U, // STRrs 0U, // SUBS_PC_LR 0U, // SUBSri 0U, // SUBSrr 0U, // SUBSrsi 0U, // SUBSrsr 5713U, // SUBri 5713U, // SUBrr 9809U, // SUBrsi 13905U, // SUBrsr 1073776314U, // SVC 26981U, // SWP 26118U, // SWPB 30129U, // SXTAB 29787U, // SXTAB16 30586U, // SXTAH 26181U, // SXTB 25707U, // SXTB16 26555U, // SXTH 0U, // TAILJMPd 0U, // TAILJMPr 0U, // TCRETURNdi 0U, // TCRETURNri 18803U, // TEQri 18803U, // TEQrr 26995U, // TEQrsi 31091U, // TEQrsr 0U, // TPsoft 2376U, // TRAP 2376U, // TRAPNaCl 19116U, // TSTri 19116U, // TSTrr 27308U, // TSTrsi 31404U, // TSTrsr 25790U, // UADD16 25891U, // UADD8 27613U, // UASX 31673U, // UBFX 414486U, // UDF 27385U, // UDIV 25767U, // UHADD16 25871U, // UHADD8 27596U, // UHASX 27455U, // UHSAX 25729U, // UHSUB16 25832U, // UHSUB8 30723U, // UMAAL 92196U, // UMLAL 0U, // UMLALv5 10376U, // UMULL 0U, // UMULLv5 25775U, // UQADD16 25878U, // UQADD8 27602U, // UQASX 27461U, // UQSAX 25737U, // UQSUB16 25839U, // UQSUB8 25858U, // USAD8 29914U, // USADA8 31275U, // USAT 25804U, // USAT16 27472U, // USAX 25752U, // USUB16 25852U, // USUB8 30135U, // UXTAB 29795U, // UXTAB16 30592U, // UXTAH 26186U, // UXTB 25714U, // UXTB16 26560U, // UXTH 18380809U, // VABALsv2i64 18511881U, // VABALsv4i32 18642953U, // VABALsv8i16 18774025U, // VABALuv2i64 18905097U, // VABALuv4i32 19036169U, // VABALuv8i16 18642262U, // VABAsv16i8 18380118U, // VABAsv2i32 18511190U, // VABAsv4i16 18380118U, // VABAsv4i32 18511190U, // VABAsv8i16 18642262U, // VABAsv8i8 19035478U, // VABAuv16i8 18773334U, // VABAuv2i32 18904406U, // VABAuv4i16 18773334U, // VABAuv4i32 18904406U, // VABAuv8i16 19035478U, // VABAuv8i8 35153989U, // VABDLsv2i64 35285061U, // VABDLsv4i32 35416133U, // VABDLsv8i16 35547205U, // VABDLuv2i64 35678277U, // VABDLuv4i32 35809349U, // VABDLuv8i16 2249090762U, // VABDfd 2249090762U, // VABDfq 35415754U, // VABDsv16i8 35153610U, // VABDsv2i32 35284682U, // VABDsv4i16 35153610U, // VABDsv4i32 35284682U, // VABDsv8i16 35415754U, // VABDsv8i8 35808970U, // VABDuv16i8 35546826U, // VABDuv2i32 35677898U, // VABDuv4i16 35546826U, // VABDuv4i32 35677898U, // VABDuv8i16 35808970U, // VABDuv8i8 2248952280U, // VABSD 2249083352U, // VABSS 2249083352U, // VABSfd 2249083352U, // VABSfq 1109150168U, // VABSv16i8 1108888024U, // VABSv2i32 1109019096U, // VABSv4i16 1108888024U, // VABSv4i32 1109019096U, // VABSv8i16 1109150168U, // VABSv8i8 2249090876U, // VACGEd 2249090876U, // VACGEq 2249091684U, // VACGTd 2249091684U, // VACGTq 2248959726U, // VADDD 35940577U, // VADDHNv2i32 36071649U, // VADDHNv4i16 36202721U, // VADDHNv8i8 35154002U, // VADDLsv2i64 35285074U, // VADDLsv4i32 35416146U, // VADDLsv8i16 35547218U, // VADDLuv2i64 35678290U, // VADDLuv4i32 35809362U, // VADDLuv8i16 2249090798U, // VADDS 35154702U, // VADDWsv2i64 35285774U, // VADDWsv4i32 35416846U, // VADDWsv8i16 35547918U, // VADDWuv2i64 35678990U, // VADDWuv4i32 35810062U, // VADDWuv8i16 2249090798U, // VADDfd 2249090798U, // VADDfq 36333294U, // VADDv16i8 35940078U, // VADDv1i64 36071150U, // VADDv2i32 35940078U, // VADDv2i64 36202222U, // VADDv4i16 36071150U, // VADDv4i32 36202222U, // VADDv8i16 36333294U, // VADDv8i8 26373U, // VANDd 26373U, // VANDq 26272U, // VBICd 254174880U, // VBICiv2i32 254305952U, // VBICiv4i16 254174880U, // VBICiv4i32 254305952U, // VBICiv8i16 26272U, // VBICq 30561U, // VBIFd 30561U, // VBIFq 31367U, // VBITd 31367U, // VBITq 30868U, // VBSLd 30868U, // VBSLq 2249091438U, // VCEQfd 2249091438U, // VCEQfq 36333934U, // VCEQv16i8 36071790U, // VCEQv2i32 36202862U, // VCEQv4i16 36071790U, // VCEQv4i32 36202862U, // VCEQv8i16 36333934U, // VCEQv8i8 3257551214U, // VCEQzv16i8 2249083246U, // VCEQzv2f32 3257289070U, // VCEQzv2i32 2249083246U, // VCEQzv4f32 3257420142U, // VCEQzv4i16 3257289070U, // VCEQzv4i32 3257420142U, // VCEQzv8i16 3257551214U, // VCEQzv8i8 2249090882U, // VCGEfd 2249090882U, // VCGEfq 35415874U, // VCGEsv16i8 35153730U, // VCGEsv2i32 35284802U, // VCGEsv4i16 35153730U, // VCGEsv4i32 35284802U, // VCGEsv8i16 35415874U, // VCGEsv8i8 35809090U, // VCGEuv16i8 35546946U, // VCGEuv2i32 35678018U, // VCGEuv4i16 35546946U, // VCGEuv4i32 35678018U, // VCGEuv8i16 35809090U, // VCGEuv8i8 3256633154U, // VCGEzv16i8 2249082690U, // VCGEzv2f32 3256371010U, // VCGEzv2i32 2249082690U, // VCGEzv4f32 3256502082U, // VCGEzv4i16 3256371010U, // VCGEzv4i32 3256502082U, // VCGEzv8i16 3256633154U, // VCGEzv8i8 2249091690U, // VCGTfd 2249091690U, // VCGTfq 35416682U, // VCGTsv16i8 35154538U, // VCGTsv2i32 35285610U, // VCGTsv4i16 35154538U, // VCGTsv4i32 35285610U, // VCGTsv8i16 35416682U, // VCGTsv8i8 35809898U, // VCGTuv16i8 35547754U, // VCGTuv2i32 35678826U, // VCGTuv4i16 35547754U, // VCGTuv4i32 35678826U, // VCGTuv8i16 35809898U, // VCGTuv8i8 3256633962U, // VCGTzv16i8 2249083498U, // VCGTzv2f32 3256371818U, // VCGTzv2i32 2249083498U, // VCGTzv4f32 3256502890U, // VCGTzv4i16 3256371818U, // VCGTzv4i32 3256502890U, // VCGTzv8i16 3256633962U, // VCGTzv8i8 3256633159U, // VCLEzv16i8 2249082695U, // VCLEzv2f32 3256371015U, // VCLEzv2i32 2249082695U, // VCLEzv4f32 3256502087U, // VCLEzv4i16 3256371015U, // VCLEzv4i32 3256502087U, // VCLEzv8i16 3256633159U, // VCLEzv8i8 1109150178U, // VCLSv16i8 1108888034U, // VCLSv2i32 1109019106U, // VCLSv4i16 1108888034U, // VCLSv4i32 1109019106U, // VCLSv8i16 1109150178U, // VCLSv8i8 3256633996U, // VCLTzv16i8 2249083532U, // VCLTzv2f32 3256371852U, // VCLTzv2i32 2249083532U, // VCLTzv4f32 3256502924U, // VCLTzv4i16 3256371852U, // VCLTzv4i32 3256502924U, // VCLTzv8i16 3256633996U, // VCLTzv8i8 1110068201U, // VCLZv16i8 1109806057U, // VCLZv2i32 1109937129U, // VCLZv4i16 1109806057U, // VCLZv4i32 1109937129U, // VCLZv8i16 1110068201U, // VCLZv8i8 2248952150U, // VCMPD 2248951635U, // VCMPED 2249082707U, // VCMPES 269256531U, // VCMPEZD 269387603U, // VCMPEZS 2249083222U, // VCMPS 269257046U, // VCMPZD 269388118U, // VCMPZS 2902673U, // VCNTd 2902673U, // VCNTq 1107447926U, // VCVTANSD 1107447926U, // VCVTANSQ 1107447986U, // VCVTANUD 1107447986U, // VCVTANUQ 1107448234U, // VCVTASD 1107447926U, // VCVTASS 1107448294U, // VCVTAUD 1107447986U, // VCVTAUS 3032639U, // VCVTBDH 3163711U, // VCVTBHD 3294783U, // VCVTBHS 3425855U, // VCVTBSH 3558092U, // VCVTDS 1107447941U, // VCVTMNSD 1107447941U, // VCVTMNSQ 1107448001U, // VCVTMNUD 1107448001U, // VCVTMNUQ 1107448249U, // VCVTMSD 1107447941U, // VCVTMSS 1107448309U, // VCVTMUD 1107448001U, // VCVTMUS 1107447956U, // VCVTNNSD 1107447956U, // VCVTNNSQ 1107448016U, // VCVTNNUD 1107448016U, // VCVTNNUQ 1107448264U, // VCVTNSD 1107447956U, // VCVTNSS 1107448324U, // VCVTNUD 1107448016U, // VCVTNUS 1107447971U, // VCVTPNSD 1107447971U, // VCVTPNSQ 1107448031U, // VCVTPNUD 1107448031U, // VCVTPNUQ 1107448279U, // VCVTPSD 1107447971U, // VCVTPSS 1107448339U, // VCVTPUD 1107448031U, // VCVTPUS 3689164U, // VCVTSD 3033798U, // VCVTTDH 3164870U, // VCVTTHD 3295942U, // VCVTTHS 3427014U, // VCVTTSH 3427020U, // VCVTf2h 289032908U, // VCVTf2sd 289032908U, // VCVTf2sq 289163980U, // VCVTf2ud 289163980U, // VCVTf2uq 104491724U, // VCVTf2xsd 104491724U, // VCVTf2xsq 104622796U, // VCVTf2xud 104622796U, // VCVTf2xuq 3295948U, // VCVTh2f 289295052U, // VCVTs2fd 289295052U, // VCVTs2fq 289426124U, // VCVTu2fd 289426124U, // VCVTu2fq 104753868U, // VCVTxs2fd 104753868U, // VCVTxs2fq 104884940U, // VCVTxu2fd 104884940U, // VCVTxu2fq 2248960766U, // VDIVD 2249091838U, // VDIVS 4344159U, // VDUP16d 4344159U, // VDUP16q 4475231U, // VDUP32d 4475231U, // VDUP32q 2902367U, // VDUP8d 2902367U, // VDUP8q 4352351U, // VDUPLN16d 4352351U, // VDUPLN16q 4483423U, // VDUPLN32d 4483423U, // VDUPLN32q 2910559U, // VDUPLN8d 2910559U, // VDUPLN8q 27037U, // VEORd 27037U, // VEORq 4356836U, // VEXTd16 4487908U, // VEXTd32 2915044U, // VEXTd8 4356836U, // VEXTq16 4487908U, // VEXTq32 4618980U, // VEXTq64 2915044U, // VEXTq8 101479830U, // VFMAD 101610902U, // VFMAS 101610902U, // VFMAfd 101610902U, // VFMAfq 101480952U, // VFMSD 101612024U, // VFMSS 101612024U, // VFMSfd 101612024U, // VFMSfq 101479835U, // VFNMAD 101610907U, // VFNMAS 101480957U, // VFNMSD 101612029U, // VFNMSS 4483843U, // VGETLNi32 1109027587U, // VGETLNs16 1109158659U, // VGETLNs8 1109420803U, // VGETLNu16 1109551875U, // VGETLNu8 35415772U, // VHADDsv16i8 35153628U, // VHADDsv2i32 35284700U, // VHADDsv4i16 35153628U, // VHADDsv4i32 35284700U, // VHADDsv8i16 35415772U, // VHADDsv8i8 35808988U, // VHADDuv16i8 35546844U, // VHADDuv2i32 35677916U, // VHADDuv4i16 35546844U, // VHADDuv4i32 35677916U, // VHADDuv8i16 35808988U, // VHADDuv8i8 35415637U, // VHSUBsv16i8 35153493U, // VHSUBsv2i32 35284565U, // VHSUBsv4i16 35153493U, // VHSUBsv4i32 35284565U, // VHSUBsv8i16 35415637U, // VHSUBsv8i8 35808853U, // VHSUBuv16i8 35546709U, // VHSUBuv2i32 35677781U, // VHSUBuv4i16 35546709U, // VHSUBuv4i32 35677781U, // VHSUBuv8i16 35808853U, // VHSUBuv8i8 2453824494U, // VLD1DUPd16 3527570414U, // VLD1DUPd16wb_fixed 3527607278U, // VLD1DUPd16wb_register 2453955566U, // VLD1DUPd32 3527701486U, // VLD1DUPd32wb_fixed 3527738350U, // VLD1DUPd32wb_register 2452382702U, // VLD1DUPd8 3526128622U, // VLD1DUPd8wb_fixed 3526165486U, // VLD1DUPd8wb_register 2470601710U, // VLD1DUPq16 3544347630U, // VLD1DUPq16wb_fixed 3544384494U, // VLD1DUPq16wb_register 2470732782U, // VLD1DUPq32 3544478702U, // VLD1DUPq32wb_fixed 3544515566U, // VLD1DUPq32wb_register 2469159918U, // VLD1DUPq8 3542905838U, // VLD1DUPq8wb_fixed 3542942702U, // VLD1DUPq8wb_register 4785134U, // VLD1LNd16 4813806U, // VLD1LNd16_UPD 4916206U, // VLD1LNd32 4944878U, // VLD1LNd32_UPD 5047278U, // VLD1LNd8 5075950U, // VLD1LNd8_UPD 4355054U, // VLD1LNdAsm_16 4486126U, // VLD1LNdAsm_32 2913262U, // VLD1LNdAsm_8 4355054U, // VLD1LNdWB_fixed_Asm_16 4486126U, // VLD1LNdWB_fixed_Asm_32 2913262U, // VLD1LNdWB_fixed_Asm_8 4391918U, // VLD1LNdWB_register_Asm_16 4522990U, // VLD1LNdWB_register_Asm_32 2950126U, // VLD1LNdWB_register_Asm_8 0U, // VLD1LNq16Pseudo 0U, // VLD1LNq16Pseudo_UPD 0U, // VLD1LNq32Pseudo 0U, // VLD1LNq32Pseudo_UPD 0U, // VLD1LNq8Pseudo 0U, // VLD1LNq8Pseudo_UPD 2487378926U, // VLD1d16 2504156142U, // VLD1d16Q 3577902062U, // VLD1d16Qwb_fixed 3577938926U, // VLD1d16Qwb_register 2520933358U, // VLD1d16T 3594679278U, // VLD1d16Twb_fixed 3594716142U, // VLD1d16Twb_register 3561124846U, // VLD1d16wb_fixed 3561161710U, // VLD1d16wb_register 2487509998U, // VLD1d32 2504287214U, // VLD1d32Q 3578033134U, // VLD1d32Qwb_fixed 3578069998U, // VLD1d32Qwb_register 2521064430U, // VLD1d32T 3594810350U, // VLD1d32Twb_fixed 3594847214U, // VLD1d32Twb_register 3561255918U, // VLD1d32wb_fixed 3561292782U, // VLD1d32wb_register 2487641070U, // VLD1d64 2504418286U, // VLD1d64Q 0U, // VLD1d64QPseudo 0U, // VLD1d64QPseudoWB_fixed 0U, // VLD1d64QPseudoWB_register 3578164206U, // VLD1d64Qwb_fixed 3578201070U, // VLD1d64Qwb_register 2521195502U, // VLD1d64T 0U, // VLD1d64TPseudo 0U, // VLD1d64TPseudoWB_fixed 0U, // VLD1d64TPseudoWB_register 3594941422U, // VLD1d64Twb_fixed 3594978286U, // VLD1d64Twb_register 3561386990U, // VLD1d64wb_fixed 3561423854U, // VLD1d64wb_register 2485937134U, // VLD1d8 2502714350U, // VLD1d8Q 3576460270U, // VLD1d8Qwb_fixed 3576497134U, // VLD1d8Qwb_register 2519491566U, // VLD1d8T 3593237486U, // VLD1d8Twb_fixed 3593274350U, // VLD1d8Twb_register 3559683054U, // VLD1d8wb_fixed 3559719918U, // VLD1d8wb_register 2537710574U, // VLD1q16 3611456494U, // VLD1q16wb_fixed 3611493358U, // VLD1q16wb_register 2537841646U, // VLD1q32 3611587566U, // VLD1q32wb_fixed 3611624430U, // VLD1q32wb_register 2537972718U, // VLD1q64 3611718638U, // VLD1q64wb_fixed 3611755502U, // VLD1q64wb_register 2536268782U, // VLD1q8 3610014702U, // VLD1q8wb_fixed 3610051566U, // VLD1q8wb_register 2470601754U, // VLD2DUPd16 3544347674U, // VLD2DUPd16wb_fixed 3544384538U, // VLD2DUPd16wb_register 2554487834U, // VLD2DUPd16x2 3628233754U, // VLD2DUPd16x2wb_fixed 3628270618U, // VLD2DUPd16x2wb_register 2470732826U, // VLD2DUPd32 3544478746U, // VLD2DUPd32wb_fixed 3544515610U, // VLD2DUPd32wb_register 2554618906U, // VLD2DUPd32x2 3628364826U, // VLD2DUPd32x2wb_fixed 3628401690U, // VLD2DUPd32x2wb_register 2469159962U, // VLD2DUPd8 3542905882U, // VLD2DUPd8wb_fixed 3542942746U, // VLD2DUPd8wb_register 2553046042U, // VLD2DUPd8x2 3626791962U, // VLD2DUPd8x2wb_fixed 3626828826U, // VLD2DUPd8x2wb_register 4813850U, // VLD2LNd16 0U, // VLD2LNd16Pseudo 0U, // VLD2LNd16Pseudo_UPD 4817946U, // VLD2LNd16_UPD 4944922U, // VLD2LNd32 0U, // VLD2LNd32Pseudo 0U, // VLD2LNd32Pseudo_UPD 4949018U, // VLD2LNd32_UPD 5075994U, // VLD2LNd8 0U, // VLD2LNd8Pseudo 0U, // VLD2LNd8Pseudo_UPD 5080090U, // VLD2LNd8_UPD 4355098U, // VLD2LNdAsm_16 4486170U, // VLD2LNdAsm_32 2913306U, // VLD2LNdAsm_8 4355098U, // VLD2LNdWB_fixed_Asm_16 4486170U, // VLD2LNdWB_fixed_Asm_32 2913306U, // VLD2LNdWB_fixed_Asm_8 4391962U, // VLD2LNdWB_register_Asm_16 4523034U, // VLD2LNdWB_register_Asm_32 2950170U, // VLD2LNdWB_register_Asm_8 4813850U, // VLD2LNq16 0U, // VLD2LNq16Pseudo 0U, // VLD2LNq16Pseudo_UPD 4817946U, // VLD2LNq16_UPD 4944922U, // VLD2LNq32 0U, // VLD2LNq32Pseudo 0U, // VLD2LNq32Pseudo_UPD 4949018U, // VLD2LNq32_UPD 4355098U, // VLD2LNqAsm_16 4486170U, // VLD2LNqAsm_32 4355098U, // VLD2LNqWB_fixed_Asm_16 4486170U, // VLD2LNqWB_fixed_Asm_32 4391962U, // VLD2LNqWB_register_Asm_16 4523034U, // VLD2LNqWB_register_Asm_32 2571265050U, // VLD2b16 3645010970U, // VLD2b16wb_fixed 3645047834U, // VLD2b16wb_register 2571396122U, // VLD2b32 3645142042U, // VLD2b32wb_fixed 3645178906U, // VLD2b32wb_register 2569823258U, // VLD2b8 3643569178U, // VLD2b8wb_fixed 3643606042U, // VLD2b8wb_register 2537710618U, // VLD2d16 3611456538U, // VLD2d16wb_fixed 3611493402U, // VLD2d16wb_register 2537841690U, // VLD2d32 3611587610U, // VLD2d32wb_fixed 3611624474U, // VLD2d32wb_register 2536268826U, // VLD2d8 3610014746U, // VLD2d8wb_fixed 3610051610U, // VLD2d8wb_register 2504156186U, // VLD2q16 0U, // VLD2q16Pseudo 0U, // VLD2q16PseudoWB_fixed 0U, // VLD2q16PseudoWB_register 3577902106U, // VLD2q16wb_fixed 3577938970U, // VLD2q16wb_register 2504287258U, // VLD2q32 0U, // VLD2q32Pseudo 0U, // VLD2q32PseudoWB_fixed 0U, // VLD2q32PseudoWB_register 3578033178U, // VLD2q32wb_fixed 3578070042U, // VLD2q32wb_register 2502714394U, // VLD2q8 0U, // VLD2q8Pseudo 0U, // VLD2q8PseudoWB_fixed 0U, // VLD2q8PseudoWB_register 3576460314U, // VLD2q8wb_fixed 3576497178U, // VLD2q8wb_register 1078527034U, // VLD3DUPd16 0U, // VLD3DUPd16Pseudo 0U, // VLD3DUPd16Pseudo_UPD 1078555706U, // VLD3DUPd16_UPD 1078658106U, // VLD3DUPd32 0U, // VLD3DUPd32Pseudo 0U, // VLD3DUPd32Pseudo_UPD 1078686778U, // VLD3DUPd32_UPD 1078789178U, // VLD3DUPd8 0U, // VLD3DUPd8Pseudo 0U, // VLD3DUPd8Pseudo_UPD 1078817850U, // VLD3DUPd8_UPD 1514300474U, // VLD3DUPdAsm_16 1514431546U, // VLD3DUPdAsm_32 1512858682U, // VLD3DUPdAsm_8 2588042298U, // VLD3DUPdWB_fixed_Asm_16 2588173370U, // VLD3DUPdWB_fixed_Asm_32 2586600506U, // VLD3DUPdWB_fixed_Asm_8 440562746U, // VLD3DUPdWB_register_Asm_16 440693818U, // VLD3DUPdWB_register_Asm_32 439120954U, // VLD3DUPdWB_register_Asm_8 1078527034U, // VLD3DUPq16 1078555706U, // VLD3DUPq16_UPD 1078658106U, // VLD3DUPq32 1078686778U, // VLD3DUPq32_UPD 1078789178U, // VLD3DUPq8 1078817850U, // VLD3DUPq8_UPD 1531077690U, // VLD3DUPqAsm_16 1531208762U, // VLD3DUPqAsm_32 1529635898U, // VLD3DUPqAsm_8 2604819514U, // VLD3DUPqWB_fixed_Asm_16 2604950586U, // VLD3DUPqWB_fixed_Asm_32 2603377722U, // VLD3DUPqWB_fixed_Asm_8 457339962U, // VLD3DUPqWB_register_Asm_16 457471034U, // VLD3DUPqWB_register_Asm_32 455898170U, // VLD3DUPqWB_register_Asm_8 4817978U, // VLD3LNd16 0U, // VLD3LNd16Pseudo 0U, // VLD3LNd16Pseudo_UPD 4822074U, // VLD3LNd16_UPD 4949050U, // VLD3LNd32 0U, // VLD3LNd32Pseudo 0U, // VLD3LNd32Pseudo_UPD 4953146U, // VLD3LNd32_UPD 5080122U, // VLD3LNd8 0U, // VLD3LNd8Pseudo 0U, // VLD3LNd8Pseudo_UPD 5084218U, // VLD3LNd8_UPD 4355130U, // VLD3LNdAsm_16 4486202U, // VLD3LNdAsm_32 2913338U, // VLD3LNdAsm_8 4355130U, // VLD3LNdWB_fixed_Asm_16 4486202U, // VLD3LNdWB_fixed_Asm_32 2913338U, // VLD3LNdWB_fixed_Asm_8 4391994U, // VLD3LNdWB_register_Asm_16 4523066U, // VLD3LNdWB_register_Asm_32 2950202U, // VLD3LNdWB_register_Asm_8 4817978U, // VLD3LNq16 0U, // VLD3LNq16Pseudo 0U, // VLD3LNq16Pseudo_UPD 4822074U, // VLD3LNq16_UPD 4949050U, // VLD3LNq32 0U, // VLD3LNq32Pseudo 0U, // VLD3LNq32Pseudo_UPD 4953146U, // VLD3LNq32_UPD 4355130U, // VLD3LNqAsm_16 4486202U, // VLD3LNqAsm_32 4355130U, // VLD3LNqWB_fixed_Asm_16 4486202U, // VLD3LNqWB_fixed_Asm_32 4391994U, // VLD3LNqWB_register_Asm_16 4523066U, // VLD3LNqWB_register_Asm_32 4785210U, // VLD3d16 0U, // VLD3d16Pseudo 0U, // VLD3d16Pseudo_UPD 4813882U, // VLD3d16_UPD 4916282U, // VLD3d32 0U, // VLD3d32Pseudo 0U, // VLD3d32Pseudo_UPD 4944954U, // VLD3d32_UPD 5047354U, // VLD3d8 0U, // VLD3d8Pseudo 0U, // VLD3d8Pseudo_UPD 5076026U, // VLD3d8_UPD 2520933434U, // VLD3dAsm_16 2521064506U, // VLD3dAsm_32 2519491642U, // VLD3dAsm_8 2520933434U, // VLD3dWB_fixed_Asm_16 2521064506U, // VLD3dWB_fixed_Asm_32 2519491642U, // VLD3dWB_fixed_Asm_8 2520937530U, // VLD3dWB_register_Asm_16 2521068602U, // VLD3dWB_register_Asm_32 2519495738U, // VLD3dWB_register_Asm_8 4785210U, // VLD3q16 0U, // VLD3q16Pseudo_UPD 4813882U, // VLD3q16_UPD 0U, // VLD3q16oddPseudo 0U, // VLD3q16oddPseudo_UPD 4916282U, // VLD3q32 0U, // VLD3q32Pseudo_UPD 4944954U, // VLD3q32_UPD 0U, // VLD3q32oddPseudo 0U, // VLD3q32oddPseudo_UPD 5047354U, // VLD3q8 0U, // VLD3q8Pseudo_UPD 5076026U, // VLD3q8_UPD 0U, // VLD3q8oddPseudo 0U, // VLD3q8oddPseudo_UPD 1547854906U, // VLD3qAsm_16 1547985978U, // VLD3qAsm_32 1546413114U, // VLD3qAsm_8 2621596730U, // VLD3qWB_fixed_Asm_16 2621727802U, // VLD3qWB_fixed_Asm_32 2620154938U, // VLD3qWB_fixed_Asm_8 474117178U, // VLD3qWB_register_Asm_16 474248250U, // VLD3qWB_register_Asm_32 472675386U, // VLD3qWB_register_Asm_8 1078502481U, // VLD4DUPd16 0U, // VLD4DUPd16Pseudo 0U, // VLD4DUPd16Pseudo_UPD 1078568017U, // VLD4DUPd16_UPD 1078633553U, // VLD4DUPd32 0U, // VLD4DUPd32Pseudo 0U, // VLD4DUPd32Pseudo_UPD 1078699089U, // VLD4DUPd32_UPD 1078764625U, // VLD4DUPd8 0U, // VLD4DUPd8Pseudo 0U, // VLD4DUPd8Pseudo_UPD 1078830161U, // VLD4DUPd8_UPD 1564632145U, // VLD4DUPdAsm_16 1564763217U, // VLD4DUPdAsm_32 1563190353U, // VLD4DUPdAsm_8 2638373969U, // VLD4DUPdWB_fixed_Asm_16 2638505041U, // VLD4DUPdWB_fixed_Asm_32 2636932177U, // VLD4DUPdWB_fixed_Asm_8 490894417U, // VLD4DUPdWB_register_Asm_16 491025489U, // VLD4DUPdWB_register_Asm_32 489452625U, // VLD4DUPdWB_register_Asm_8 1078502481U, // VLD4DUPq16 1078568017U, // VLD4DUPq16_UPD 1078633553U, // VLD4DUPq32 1078699089U, // VLD4DUPq32_UPD 1078764625U, // VLD4DUPq8 1078830161U, // VLD4DUPq8_UPD 1581409361U, // VLD4DUPqAsm_16 1581540433U, // VLD4DUPqAsm_32 1579967569U, // VLD4DUPqAsm_8 2655151185U, // VLD4DUPqWB_fixed_Asm_16 2655282257U, // VLD4DUPqWB_fixed_Asm_32 2653709393U, // VLD4DUPqWB_fixed_Asm_8 507671633U, // VLD4DUPqWB_register_Asm_16 507802705U, // VLD4DUPqWB_register_Asm_32 506229841U, // VLD4DUPqWB_register_Asm_8 4822097U, // VLD4LNd16 0U, // VLD4LNd16Pseudo 0U, // VLD4LNd16Pseudo_UPD 4830289U, // VLD4LNd16_UPD 4953169U, // VLD4LNd32 0U, // VLD4LNd32Pseudo 0U, // VLD4LNd32Pseudo_UPD 4961361U, // VLD4LNd32_UPD 5084241U, // VLD4LNd8 0U, // VLD4LNd8Pseudo 0U, // VLD4LNd8Pseudo_UPD 5092433U, // VLD4LNd8_UPD 4355153U, // VLD4LNdAsm_16 4486225U, // VLD4LNdAsm_32 2913361U, // VLD4LNdAsm_8 4355153U, // VLD4LNdWB_fixed_Asm_16 4486225U, // VLD4LNdWB_fixed_Asm_32 2913361U, // VLD4LNdWB_fixed_Asm_8 4392017U, // VLD4LNdWB_register_Asm_16 4523089U, // VLD4LNdWB_register_Asm_32 2950225U, // VLD4LNdWB_register_Asm_8 4822097U, // VLD4LNq16 0U, // VLD4LNq16Pseudo 0U, // VLD4LNq16Pseudo_UPD 4830289U, // VLD4LNq16_UPD 4953169U, // VLD4LNq32 0U, // VLD4LNq32Pseudo 0U, // VLD4LNq32Pseudo_UPD 4961361U, // VLD4LNq32_UPD 4355153U, // VLD4LNqAsm_16 4486225U, // VLD4LNqAsm_32 4355153U, // VLD4LNqWB_fixed_Asm_16 4486225U, // VLD4LNqWB_fixed_Asm_32 4392017U, // VLD4LNqWB_register_Asm_16 4523089U, // VLD4LNqWB_register_Asm_32 4760657U, // VLD4d16 0U, // VLD4d16Pseudo 0U, // VLD4d16Pseudo_UPD 4826193U, // VLD4d16_UPD 4891729U, // VLD4d32 0U, // VLD4d32Pseudo 0U, // VLD4d32Pseudo_UPD 4957265U, // VLD4d32_UPD 5022801U, // VLD4d8 0U, // VLD4d8Pseudo 0U, // VLD4d8Pseudo_UPD 5088337U, // VLD4d8_UPD 2504156241U, // VLD4dAsm_16 2504287313U, // VLD4dAsm_32 2502714449U, // VLD4dAsm_8 2504156241U, // VLD4dWB_fixed_Asm_16 2504287313U, // VLD4dWB_fixed_Asm_32 2502714449U, // VLD4dWB_fixed_Asm_8 2504160337U, // VLD4dWB_register_Asm_16 2504291409U, // VLD4dWB_register_Asm_32 2502718545U, // VLD4dWB_register_Asm_8 4760657U, // VLD4q16 0U, // VLD4q16Pseudo_UPD 4826193U, // VLD4q16_UPD 0U, // VLD4q16oddPseudo 0U, // VLD4q16oddPseudo_UPD 4891729U, // VLD4q32 0U, // VLD4q32Pseudo_UPD 4957265U, // VLD4q32_UPD 0U, // VLD4q32oddPseudo 0U, // VLD4q32oddPseudo_UPD 5022801U, // VLD4q8 0U, // VLD4q8Pseudo_UPD 5088337U, // VLD4q8_UPD 0U, // VLD4q8oddPseudo 0U, // VLD4q8oddPseudo_UPD 1598186577U, // VLD4qAsm_16 1598317649U, // VLD4qAsm_32 1596744785U, // VLD4qAsm_8 2671928401U, // VLD4qWB_fixed_Asm_16 2672059473U, // VLD4qWB_fixed_Asm_32 2670486609U, // VLD4qWB_fixed_Asm_8 524448849U, // VLD4qWB_register_Asm_16 524579921U, // VLD4qWB_register_Asm_32 523007057U, // VLD4qWB_register_Asm_8 33572317U, // VLDMDDB_UPD 34161U, // VLDMDIA 33572209U, // VLDMDIA_UPD 0U, // VLDMQIA 33572317U, // VLDMSDB_UPD 34161U, // VLDMSIA 33572209U, // VLDMSIA_UPD 27014U, // VLDRD 27014U, // VLDRS 33706566U, // VMAXNMD 33706258U, // VMAXNMND 33706258U, // VMAXNMNQ 33706258U, // VMAXNMS 2249091892U, // VMAXfd 2249091892U, // VMAXfq 35416884U, // VMAXsv16i8 35154740U, // VMAXsv2i32 35285812U, // VMAXsv4i16 35154740U, // VMAXsv4i32 35285812U, // VMAXsv8i16 35416884U, // VMAXsv8i8 35810100U, // VMAXuv16i8 35547956U, // VMAXuv2i32 35679028U, // VMAXuv4i16 35547956U, // VMAXuv4i32 35679028U, // VMAXuv8i16 35810100U, // VMAXuv8i8 33706554U, // VMINNMD 33706246U, // VMINNMND 33706246U, // VMINNMNQ 33706246U, // VMINNMS 2249091310U, // VMINfd 2249091310U, // VMINfq 35416302U, // VMINsv16i8 35154158U, // VMINsv2i32 35285230U, // VMINsv4i16 35154158U, // VMINsv4i32 35285230U, // VMINsv8i16 35416302U, // VMINsv8i8 35809518U, // VMINuv16i8 35547374U, // VMINuv2i32 35678446U, // VMINuv4i16 35547374U, // VMINuv4i32 35678446U, // VMINuv8i16 35809518U, // VMINuv8i8 101479825U, // VMLAD 18417706U, // VMLALslsv2i32 18548778U, // VMLALslsv4i16 18810922U, // VMLALsluv2i32 18941994U, // VMLALsluv4i16 18380842U, // VMLALsv2i64 18511914U, // VMLALsv4i32 18642986U, // VMLALsv8i16 18774058U, // VMLALuv2i64 18905130U, // VMLALuv4i32 19036202U, // VMLALuv8i16 101610897U, // VMLAS 101610897U, // VMLAfd 101610897U, // VMLAfq 101647761U, // VMLAslfd 101647761U, // VMLAslfq 19334545U, // VMLAslv2i32 19465617U, // VMLAslv4i16 19334545U, // VMLAslv4i32 19465617U, // VMLAslv8i16 19559825U, // VMLAv16i8 19297681U, // VMLAv2i32 19428753U, // VMLAv4i16 19297681U, // VMLAv4i32 19428753U, // VMLAv8i16 19559825U, // VMLAv8i8 101480947U, // VMLSD 18417825U, // VMLSLslsv2i32 18548897U, // VMLSLslsv4i16 18811041U, // VMLSLsluv2i32 18942113U, // VMLSLsluv4i16 18380961U, // VMLSLsv2i64 18512033U, // VMLSLsv4i32 18643105U, // VMLSLsv8i16 18774177U, // VMLSLuv2i64 18905249U, // VMLSLuv4i32 19036321U, // VMLSLuv8i16 101612019U, // VMLSS 101612019U, // VMLSfd 101612019U, // VMLSfq 101648883U, // VMLSslfd 101648883U, // VMLSslfq 19335667U, // VMLSslv2i32 19466739U, // VMLSslv4i16 19335667U, // VMLSslv4i32 19466739U, // VMLSslv8i16 19560947U, // VMLSv16i8 19298803U, // VMLSv2i32 19429875U, // VMLSv4i16 19298803U, // VMLSv4i32 19429875U, // VMLSv8i16 19560947U, // VMLSv8i8 2248952579U, // VMOVD 0U, // VMOVD0 27395U, // VMOVDRR 0U, // VMOVDcc 1108887740U, // VMOVLsv2i64 1109018812U, // VMOVLsv4i32 1109149884U, // VMOVLsv8i16 1109280956U, // VMOVLuv2i64 1109412028U, // VMOVLuv4i32 1109543100U, // VMOVLuv8i16 1109674306U, // VMOVNv2i32 1109805378U, // VMOVNv4i16 1109936450U, // VMOVNv8i8 0U, // VMOVQ0 27395U, // VMOVRRD 31491U, // VMOVRRS 19203U, // VMOVRS 2249083651U, // VMOVS 19203U, // VMOVSR 31491U, // VMOVSRR 0U, // VMOVScc 254429955U, // VMOVv16i8 254036739U, // VMOVv1i64 3322825475U, // VMOVv2f32 254167811U, // VMOVv2i32 254036739U, // VMOVv2i64 3322825475U, // VMOVv4f32 254298883U, // VMOVv4i16 254167811U, // VMOVv4i32 254298883U, // VMOVv8i16 254429955U, // VMOVv8i8 3221260810U, // VMRS 35338U, // VMRS_FPEXC 1073777162U, // VMRS_FPINST 2147518986U, // VMRS_FPINST2 3221260810U, // VMRS_FPSID 35338U, // VMRS_MVFR0 1073777162U, // VMRS_MVFR1 2147518986U, // VMRS_MVFR2 5147067U, // VMSR 5278139U, // VMSR_FPEXC 5409211U, // VMSR_FPINST 5540283U, // VMSR_FPINST2 5671355U, // VMSR_FPSID 2248960183U, // VMULD 33706650U, // VMULLp64 5793934U, // VMULLp8 35158158U, // VMULLslsv2i32 35289230U, // VMULLslsv4i16 35551374U, // VMULLsluv2i32 35682446U, // VMULLsluv4i16 35154062U, // VMULLsv2i64 35285134U, // VMULLsv4i32 35416206U, // VMULLsv8i16 35547278U, // VMULLuv2i64 35678350U, // VMULLuv4i32 35809422U, // VMULLuv8i16 2249091255U, // VMULS 2249091255U, // VMULfd 2249091255U, // VMULfq 5793975U, // VMULpd 5793975U, // VMULpq 2249095351U, // VMULslfd 2249095351U, // VMULslfq 36075703U, // VMULslv2i32 36206775U, // VMULslv4i16 36075703U, // VMULslv4i32 36206775U, // VMULslv8i16 36333751U, // VMULv16i8 36071607U, // VMULv2i32 36202679U, // VMULv4i16 36071607U, // VMULv4i32 36202679U, // VMULv8i16 36333751U, // VMULv8i8 18742U, // VMVNd 18742U, // VMVNq 254167350U, // VMVNv2i32 254298422U, // VMVNv4i16 254167350U, // VMVNv4i32 254298422U, // VMVNv8i16 2248951664U, // VNEGD 2249082736U, // VNEGS 2249082736U, // VNEGf32q 2249082736U, // VNEGfd 1109018480U, // VNEGs16d 1109018480U, // VNEGs16q 1108887408U, // VNEGs32d 1108887408U, // VNEGs32q 1109149552U, // VNEGs8d 1109149552U, // VNEGs8q 101479819U, // VNMLAD 101610891U, // VNMLAS 101480941U, // VNMLSD 101612013U, // VNMLSS 2248960177U, // VNMULD 2249091249U, // VNMULS 26899U, // VORNd 26899U, // VORNq 27051U, // VORRd 254175659U, // VORRiv2i32 254306731U, // VORRiv4i16 254175659U, // VORRiv4i32 254306731U, // VORRiv8i16 27051U, // VORRq 1092380687U, // VPADALsv16i8 1092118543U, // VPADALsv2i32 1092249615U, // VPADALsv4i16 1092118543U, // VPADALsv4i32 1092249615U, // VPADALsv8i16 1092380687U, // VPADALsv8i8 1092773903U, // VPADALuv16i8 1092511759U, // VPADALuv2i32 1092642831U, // VPADALuv4i16 1092511759U, // VPADALuv4i32 1092642831U, // VPADALuv8i16 1092773903U, // VPADALuv8i8 1109149771U, // VPADDLsv16i8 1108887627U, // VPADDLsv2i32 1109018699U, // VPADDLsv4i16 1108887627U, // VPADDLsv4i32 1109018699U, // VPADDLsv8i16 1109149771U, // VPADDLsv8i8 1109542987U, // VPADDLuv16i8 1109280843U, // VPADDLuv2i32 1109411915U, // VPADDLuv4i16 1109280843U, // VPADDLuv4i32 1109411915U, // VPADDLuv8i16 1109542987U, // VPADDLuv8i8 2249090786U, // VPADDf 36202210U, // VPADDi16 36071138U, // VPADDi32 36333282U, // VPADDi8 2249091886U, // VPMAXf 35285806U, // VPMAXs16 35154734U, // VPMAXs32 35416878U, // VPMAXs8 35679022U, // VPMAXu16 35547950U, // VPMAXu32 35810094U, // VPMAXu8 2249091304U, // VPMINf 35285224U, // VPMINs16 35154152U, // VPMINs32 35416296U, // VPMINs8 35678440U, // VPMINu16 35547368U, // VPMINu32 35809512U, // VPMINu8 1109150162U, // VQABSv16i8 1108888018U, // VQABSv2i32 1109019090U, // VQABSv4i16 1108888018U, // VQABSv4i32 1109019090U, // VQABSv8i16 1109150162U, // VQABSv8i8 35415784U, // VQADDsv16i8 39479016U, // VQADDsv1i64 35153640U, // VQADDsv2i32 39479016U, // VQADDsv2i64 35284712U, // VQADDsv4i16 35153640U, // VQADDsv4i32 35284712U, // VQADDsv8i16 35415784U, // VQADDsv8i8 35809000U, // VQADDuv16i8 39610088U, // VQADDuv1i64 35546856U, // VQADDuv2i32 39610088U, // VQADDuv2i64 35677928U, // VQADDuv4i16 35546856U, // VQADDuv4i32 35677928U, // VQADDuv8i16 35809000U, // VQADDuv8i8 18417686U, // VQDMLALslv2i32 18548758U, // VQDMLALslv4i16 18380822U, // VQDMLALv2i64 18511894U, // VQDMLALv4i32 18417817U, // VQDMLSLslv2i32 18548889U, // VQDMLSLslv4i16 18380953U, // VQDMLSLv2i64 18512025U, // VQDMLSLv4i32 35157903U, // VQDMULHslv2i32 35288975U, // VQDMULHslv4i16 35157903U, // VQDMULHslv4i32 35288975U, // VQDMULHslv8i16 35153807U, // VQDMULHv2i32 35284879U, // VQDMULHv4i16 35153807U, // VQDMULHv4i32 35284879U, // VQDMULHv8i16 35158138U, // VQDMULLslv2i32 35289210U, // VQDMULLslv4i16 35154042U, // VQDMULLv2i64 35285114U, // VQDMULLv4i32 1113213230U, // VQMOVNsuv2i32 1108887854U, // VQMOVNsuv4i16 1109018926U, // VQMOVNsuv8i8 1113213243U, // VQMOVNsv2i32 1108887867U, // VQMOVNsv4i16 1109018939U, // VQMOVNsv8i8 1113344315U, // VQMOVNuv2i32 1109281083U, // VQMOVNuv4i16 1109412155U, // VQMOVNuv8i8 1109149546U, // VQNEGv16i8 1108887402U, // VQNEGv2i32 1109018474U, // VQNEGv4i16 1108887402U, // VQNEGv4i32 1109018474U, // VQNEGv8i16 1109149546U, // VQNEGv8i8 35157911U, // VQRDMULHslv2i32 35288983U, // VQRDMULHslv4i16 35157911U, // VQRDMULHslv4i32 35288983U, // VQRDMULHslv8i16 35153815U, // VQRDMULHv2i32 35284887U, // VQRDMULHv4i16 35153815U, // VQRDMULHv4i32 35284887U, // VQRDMULHv8i16 35416162U, // VQRSHLsv16i8 39479394U, // VQRSHLsv1i64 35154018U, // VQRSHLsv2i32 39479394U, // VQRSHLsv2i64 35285090U, // VQRSHLsv4i16 35154018U, // VQRSHLsv4i32 35285090U, // VQRSHLsv8i16 35416162U, // VQRSHLsv8i8 35809378U, // VQRSHLuv16i8 39610466U, // VQRSHLuv1i64 35547234U, // VQRSHLuv2i32 39610466U, // VQRSHLuv2i64 35678306U, // VQRSHLuv4i16 35547234U, // VQRSHLuv4i32 35678306U, // VQRSHLuv8i16 35809378U, // VQRSHLuv8i8 39479550U, // VQRSHRNsv2i32 35154174U, // VQRSHRNsv4i16 35285246U, // VQRSHRNsv8i8 39610622U, // VQRSHRNuv2i32 35547390U, // VQRSHRNuv4i16 35678462U, // VQRSHRNuv8i8 39479589U, // VQRSHRUNv2i32 35154213U, // VQRSHRUNv4i16 35285285U, // VQRSHRUNv8i8 35416156U, // VQSHLsiv16i8 39479388U, // VQSHLsiv1i64 35154012U, // VQSHLsiv2i32 39479388U, // VQSHLsiv2i64 35285084U, // VQSHLsiv4i16 35154012U, // VQSHLsiv4i32 35285084U, // VQSHLsiv8i16 35416156U, // VQSHLsiv8i8 35416809U, // VQSHLsuv16i8 39480041U, // VQSHLsuv1i64 35154665U, // VQSHLsuv2i32 39480041U, // VQSHLsuv2i64 35285737U, // VQSHLsuv4i16 35154665U, // VQSHLsuv4i32 35285737U, // VQSHLsuv8i16 35416809U, // VQSHLsuv8i8 35416156U, // VQSHLsv16i8 39479388U, // VQSHLsv1i64 35154012U, // VQSHLsv2i32 39479388U, // VQSHLsv2i64 35285084U, // VQSHLsv4i16 35154012U, // VQSHLsv4i32 35285084U, // VQSHLsv8i16 35416156U, // VQSHLsv8i8 35809372U, // VQSHLuiv16i8 39610460U, // VQSHLuiv1i64 35547228U, // VQSHLuiv2i32 39610460U, // VQSHLuiv2i64 35678300U, // VQSHLuiv4i16 35547228U, // VQSHLuiv4i32 35678300U, // VQSHLuiv8i16 35809372U, // VQSHLuiv8i8 35809372U, // VQSHLuv16i8 39610460U, // VQSHLuv1i64 35547228U, // VQSHLuv2i32 39610460U, // VQSHLuv2i64 35678300U, // VQSHLuv4i16 35547228U, // VQSHLuv4i32 35678300U, // VQSHLuv8i16 35809372U, // VQSHLuv8i8 39479543U, // VQSHRNsv2i32 35154167U, // VQSHRNsv4i16 35285239U, // VQSHRNsv8i8 39610615U, // VQSHRNuv2i32 35547383U, // VQSHRNuv4i16 35678455U, // VQSHRNuv8i8 39479581U, // VQSHRUNv2i32 35154205U, // VQSHRUNv4i16 35285277U, // VQSHRUNv8i8 35415643U, // VQSUBsv16i8 39478875U, // VQSUBsv1i64 35153499U, // VQSUBsv2i32 39478875U, // VQSUBsv2i64 35284571U, // VQSUBsv4i16 35153499U, // VQSUBsv4i32 35284571U, // VQSUBsv8i16 35415643U, // VQSUBsv8i8 35808859U, // VQSUBuv16i8 39609947U, // VQSUBuv1i64 35546715U, // VQSUBuv2i32 39609947U, // VQSUBuv2i64 35677787U, // VQSUBuv4i16 35546715U, // VQSUBuv4i32 35677787U, // VQSUBuv8i16 35808859U, // VQSUBuv8i8 35940569U, // VRADDHNv2i32 36071641U, // VRADDHNv4i16 36202713U, // VRADDHNv8i8 1109280588U, // VRECPEd 2249082700U, // VRECPEfd 2249082700U, // VRECPEfq 1109280588U, // VRECPEq 2249091587U, // VRECPSfd 2249091587U, // VRECPSfq 2901203U, // VREV16d8 2901203U, // VREV16q8 4342782U, // VREV32d16 2900990U, // VREV32d8 4342782U, // VREV32q16 2900990U, // VREV32q8 4342858U, // VREV64d16 4473930U, // VREV64d32 2901066U, // VREV64d8 4342858U, // VREV64q16 4473930U, // VREV64q32 2901066U, // VREV64q8 35415765U, // VRHADDsv16i8 35153621U, // VRHADDsv2i32 35284693U, // VRHADDsv4i16 35153621U, // VRHADDsv4i32 35284693U, // VRHADDsv8i16 35415765U, // VRHADDsv8i8 35808981U, // VRHADDuv16i8 35546837U, // VRHADDuv2i32 35677909U, // VRHADDuv4i16 35546837U, // VRHADDuv4i32 35677909U, // VRHADDuv8i16 35808981U, // VRHADDuv8i8 1107448354U, // VRINTAD 1107448046U, // VRINTAND 1107448046U, // VRINTANQ 1107448046U, // VRINTAS 1107448402U, // VRINTMD 1107448094U, // VRINTMND 1107448094U, // VRINTMNQ 1107448094U, // VRINTMS 1107448414U, // VRINTND 1107448106U, // VRINTNND 1107448106U, // VRINTNNQ 1107448106U, // VRINTNS 1107448426U, // VRINTPD 1107448118U, // VRINTPND 1107448118U, // VRINTPNQ 1107448118U, // VRINTPS 2248952256U, // VRINTRD 2249083328U, // VRINTRS 2248952802U, // VRINTXD 1107448166U, // VRINTXND 1107448166U, // VRINTXNQ 2249083874U, // VRINTXS 2248952814U, // VRINTZD 1107448178U, // VRINTZND 1107448178U, // VRINTZNQ 2249083886U, // VRINTZS 35416169U, // VRSHLsv16i8 39479401U, // VRSHLsv1i64 35154025U, // VRSHLsv2i32 39479401U, // VRSHLsv2i64 35285097U, // VRSHLsv4i16 35154025U, // VRSHLsv4i32 35285097U, // VRSHLsv8i16 35416169U, // VRSHLsv8i8 35809385U, // VRSHLuv16i8 39610473U, // VRSHLuv1i64 35547241U, // VRSHLuv2i32 39610473U, // VRSHLuv2i64 35678313U, // VRSHLuv4i16 35547241U, // VRSHLuv4i32 35678313U, // VRSHLuv8i16 35809385U, // VRSHLuv8i8 35940614U, // VRSHRNv2i32 36071686U, // VRSHRNv4i16 36202758U, // VRSHRNv8i8 35416459U, // VRSHRsv16i8 39479691U, // VRSHRsv1i64 35154315U, // VRSHRsv2i32 39479691U, // VRSHRsv2i64 35285387U, // VRSHRsv4i16 35154315U, // VRSHRsv4i32 35285387U, // VRSHRsv8i16 35416459U, // VRSHRsv8i8 35809675U, // VRSHRuv16i8 39610763U, // VRSHRuv1i64 35547531U, // VRSHRuv2i32 39610763U, // VRSHRuv2i64 35678603U, // VRSHRuv4i16 35547531U, // VRSHRuv4i32 35678603U, // VRSHRuv8i16 35809675U, // VRSHRuv8i8 1109280601U, // VRSQRTEd 2249082713U, // VRSQRTEfd 2249082713U, // VRSQRTEfq 1109280601U, // VRSQRTEq 2249091609U, // VRSQRTSfd 2249091609U, // VRSQRTSfq 18642337U, // VRSRAsv16i8 22705569U, // VRSRAsv1i64 18380193U, // VRSRAsv2i32 22705569U, // VRSRAsv2i64 18511265U, // VRSRAsv4i16 18380193U, // VRSRAsv4i32 18511265U, // VRSRAsv8i16 18642337U, // VRSRAsv8i8 19035553U, // VRSRAuv16i8 22836641U, // VRSRAuv1i64 18773409U, // VRSRAuv2i32 22836641U, // VRSRAuv2i64 18904481U, // VRSRAuv4i16 18773409U, // VRSRAuv4i32 18904481U, // VRSRAuv8i16 19035553U, // VRSRAuv8i8 35940554U, // VRSUBHNv2i32 36071626U, // VRSUBHNv4i16 36202698U, // VRSUBHNv8i8 33706614U, // VSELEQD 33706306U, // VSELEQS 33706542U, // VSELGED 33706234U, // VSELGES 33706638U, // VSELGTD 33706330U, // VSELGTS 33706626U, // VSELVSD 33706318U, // VSELVSS 3225582339U, // VSETLNi16 3225713411U, // VSETLNi32 3224140547U, // VSETLNi8 36202612U, // VSHLLi16 36071540U, // VSHLLi32 36333684U, // VSHLLi8 35154036U, // VSHLLsv2i64 35285108U, // VSHLLsv4i32 35416180U, // VSHLLsv8i16 35547252U, // VSHLLuv2i64 35678324U, // VSHLLuv4i32 35809396U, // VSHLLuv8i16 36333679U, // VSHLiv16i8 35940463U, // VSHLiv1i64 36071535U, // VSHLiv2i32 35940463U, // VSHLiv2i64 36202607U, // VSHLiv4i16 36071535U, // VSHLiv4i32 36202607U, // VSHLiv8i16 36333679U, // VSHLiv8i8 35416175U, // VSHLsv16i8 39479407U, // VSHLsv1i64 35154031U, // VSHLsv2i32 39479407U, // VSHLsv2i64 35285103U, // VSHLsv4i16 35154031U, // VSHLsv4i32 35285103U, // VSHLsv8i16 35416175U, // VSHLsv8i8 35809391U, // VSHLuv16i8 39610479U, // VSHLuv1i64 35547247U, // VSHLuv2i32 39610479U, // VSHLuv2i64 35678319U, // VSHLuv4i16 35547247U, // VSHLuv4i32 35678319U, // VSHLuv8i16 35809391U, // VSHLuv8i8 35940621U, // VSHRNv2i32 36071693U, // VSHRNv4i16 36202765U, // VSHRNv8i8 35416465U, // VSHRsv16i8 39479697U, // VSHRsv1i64 35154321U, // VSHRsv2i32 39479697U, // VSHRsv2i64 35285393U, // VSHRsv4i16 35154321U, // VSHRsv4i32 35285393U, // VSHRsv8i16 35416465U, // VSHRsv8i8 35809681U, // VSHRuv16i8 39610769U, // VSHRuv1i64 35547537U, // VSHRuv2i32 39610769U, // VSHRuv2i64 35678609U, // VSHRuv4i16 35547537U, // VSHRuv4i32 35678609U, // VSHRuv8i16 35809681U, // VSHRuv8i8 6187724U, // VSHTOD 6318796U, // VSHTOS 291654348U, // VSITOD 289295052U, // VSITOS 2914281U, // VSLIv16i8 4618217U, // VSLIv1i64 4487145U, // VSLIv2i32 4618217U, // VSLIv2i64 4356073U, // VSLIv4i16 4487145U, // VSLIv4i32 4356073U, // VSLIv8i16 2914281U, // VSLIv8i8 107113164U, // VSLTOD 104753868U, // VSLTOS 2248952480U, // VSQRTD 2249083552U, // VSQRTS 18642343U, // VSRAsv16i8 22705575U, // VSRAsv1i64 18380199U, // VSRAsv2i32 22705575U, // VSRAsv2i64 18511271U, // VSRAsv4i16 18380199U, // VSRAsv4i32 18511271U, // VSRAsv8i16 18642343U, // VSRAsv8i8 19035559U, // VSRAuv16i8 22836647U, // VSRAuv1i64 18773415U, // VSRAuv2i32 22836647U, // VSRAuv2i64 18904487U, // VSRAuv4i16 18773415U, // VSRAuv4i32 18904487U, // VSRAuv8i16 19035559U, // VSRAuv8i8 2914286U, // VSRIv16i8 4618222U, // VSRIv1i64 4487150U, // VSRIv2i32 4618222U, // VSRIv2i64 4356078U, // VSRIv4i16 4487150U, // VSRIv4i32 4356078U, // VSRIv8i16 2914286U, // VSRIv8i8 21525497U, // VST1LNd16 541631481U, // VST1LNd16_UPD 21656569U, // VST1LNd32 541762553U, // VST1LNd32_UPD 21787641U, // VST1LNd8 541893625U, // VST1LNd8_UPD 4355065U, // VST1LNdAsm_16 4486137U, // VST1LNdAsm_32 2913273U, // VST1LNdAsm_8 4355065U, // VST1LNdWB_fixed_Asm_16 4486137U, // VST1LNdWB_fixed_Asm_32 2913273U, // VST1LNdWB_fixed_Asm_8 4391929U, // VST1LNdWB_register_Asm_16 4523001U, // VST1LNdWB_register_Asm_32 2950137U, // VST1LNdWB_register_Asm_8 0U, // VST1LNq16Pseudo 0U, // VST1LNq16Pseudo_UPD 0U, // VST1LNq32Pseudo 0U, // VST1LNq32Pseudo_UPD 0U, // VST1LNq8Pseudo 0U, // VST1LNq8Pseudo_UPD 557999097U, // VST1d16 574776313U, // VST1d16Q 591557625U, // VST1d16Qwb_fixed 608371705U, // VST1d16Qwb_register 625107961U, // VST1d16T 641889273U, // VST1d16Twb_fixed 658703353U, // VST1d16Twb_register 675443705U, // VST1d16wb_fixed 692257785U, // VST1d16wb_register 558130169U, // VST1d32 574907385U, // VST1d32Q 591688697U, // VST1d32Qwb_fixed 608502777U, // VST1d32Qwb_register 625239033U, // VST1d32T 642020345U, // VST1d32Twb_fixed 658834425U, // VST1d32Twb_register 675574777U, // VST1d32wb_fixed 692388857U, // VST1d32wb_register 558261241U, // VST1d64 575038457U, // VST1d64Q 0U, // VST1d64QPseudo 0U, // VST1d64QPseudoWB_fixed 0U, // VST1d64QPseudoWB_register 591819769U, // VST1d64Qwb_fixed 608633849U, // VST1d64Qwb_register 625370105U, // VST1d64T 0U, // VST1d64TPseudo 0U, // VST1d64TPseudoWB_fixed 0U, // VST1d64TPseudoWB_register 642151417U, // VST1d64Twb_fixed 658965497U, // VST1d64Twb_register 675705849U, // VST1d64wb_fixed 692519929U, // VST1d64wb_register 556557305U, // VST1d8 573334521U, // VST1d8Q 590115833U, // VST1d8Qwb_fixed 606929913U, // VST1d8Qwb_register 623666169U, // VST1d8T 640447481U, // VST1d8Twb_fixed 657261561U, // VST1d8Twb_register 674001913U, // VST1d8wb_fixed 690815993U, // VST1d8wb_register 708994041U, // VST1q16 725775353U, // VST1q16wb_fixed 742589433U, // VST1q16wb_register 709125113U, // VST1q32 725906425U, // VST1q32wb_fixed 742720505U, // VST1q32wb_register 709256185U, // VST1q64 726037497U, // VST1q64wb_fixed 742851577U, // VST1q64wb_register 707552249U, // VST1q8 724333561U, // VST1q8wb_fixed 741147641U, // VST1q8wb_register 21562421U, // VST2LNd16 0U, // VST2LNd16Pseudo 0U, // VST2LNd16Pseudo_UPD 541684789U, // VST2LNd16_UPD 21693493U, // VST2LNd32 0U, // VST2LNd32Pseudo 0U, // VST2LNd32Pseudo_UPD 541815861U, // VST2LNd32_UPD 21824565U, // VST2LNd8 0U, // VST2LNd8Pseudo 0U, // VST2LNd8Pseudo_UPD 541946933U, // VST2LNd8_UPD 4355125U, // VST2LNdAsm_16 4486197U, // VST2LNdAsm_32 2913333U, // VST2LNdAsm_8 4355125U, // VST2LNdWB_fixed_Asm_16 4486197U, // VST2LNdWB_fixed_Asm_32 2913333U, // VST2LNdWB_fixed_Asm_8 4391989U, // VST2LNdWB_register_Asm_16 4523061U, // VST2LNdWB_register_Asm_32 2950197U, // VST2LNdWB_register_Asm_8 21562421U, // VST2LNq16 0U, // VST2LNq16Pseudo 0U, // VST2LNq16Pseudo_UPD 541684789U, // VST2LNq16_UPD 21693493U, // VST2LNq32 0U, // VST2LNq32Pseudo 0U, // VST2LNq32Pseudo_UPD 541815861U, // VST2LNq32_UPD 4355125U, // VST2LNqAsm_16 4486197U, // VST2LNqAsm_32 4355125U, // VST2LNqWB_fixed_Asm_16 4486197U, // VST2LNqWB_fixed_Asm_32 4391989U, // VST2LNqWB_register_Asm_16 4523061U, // VST2LNqWB_register_Asm_32 759325749U, // VST2b16 776107061U, // VST2b16wb_fixed 792921141U, // VST2b16wb_register 759456821U, // VST2b32 776238133U, // VST2b32wb_fixed 793052213U, // VST2b32wb_register 757883957U, // VST2b8 774665269U, // VST2b8wb_fixed 791479349U, // VST2b8wb_register 708994101U, // VST2d16 725775413U, // VST2d16wb_fixed 742589493U, // VST2d16wb_register 709125173U, // VST2d32 725906485U, // VST2d32wb_fixed 742720565U, // VST2d32wb_register 707552309U, // VST2d8 724333621U, // VST2d8wb_fixed 741147701U, // VST2d8wb_register 574776373U, // VST2q16 0U, // VST2q16Pseudo 0U, // VST2q16PseudoWB_fixed 0U, // VST2q16PseudoWB_register 591557685U, // VST2q16wb_fixed 608371765U, // VST2q16wb_register 574907445U, // VST2q32 0U, // VST2q32Pseudo 0U, // VST2q32PseudoWB_fixed 0U, // VST2q32PseudoWB_register 591688757U, // VST2q32wb_fixed 608502837U, // VST2q32wb_register 573334581U, // VST2q8 0U, // VST2q8Pseudo 0U, // VST2q8PseudoWB_fixed 0U, // VST2q8PseudoWB_register 590115893U, // VST2q8wb_fixed 606929973U, // VST2q8wb_register 21537861U, // VST3LNd16 0U, // VST3LNd16Pseudo 0U, // VST3LNd16Pseudo_UPD 541697093U, // VST3LNd16_UPD 21668933U, // VST3LNd32 0U, // VST3LNd32Pseudo 0U, // VST3LNd32Pseudo_UPD 541828165U, // VST3LNd32_UPD 21800005U, // VST3LNd8 0U, // VST3LNd8Pseudo 0U, // VST3LNd8Pseudo_UPD 541959237U, // VST3LNd8_UPD 4355141U, // VST3LNdAsm_16 4486213U, // VST3LNdAsm_32 2913349U, // VST3LNdAsm_8 4355141U, // VST3LNdWB_fixed_Asm_16 4486213U, // VST3LNdWB_fixed_Asm_32 2913349U, // VST3LNdWB_fixed_Asm_8 4392005U, // VST3LNdWB_register_Asm_16 4523077U, // VST3LNdWB_register_Asm_32 2950213U, // VST3LNdWB_register_Asm_8 21537861U, // VST3LNq16 0U, // VST3LNq16Pseudo 0U, // VST3LNq16Pseudo_UPD 541697093U, // VST3LNq16_UPD 21668933U, // VST3LNq32 0U, // VST3LNq32Pseudo 0U, // VST3LNq32Pseudo_UPD 541828165U, // VST3LNq32_UPD 4355141U, // VST3LNqAsm_16 4486213U, // VST3LNqAsm_32 4355141U, // VST3LNqWB_fixed_Asm_16 4486213U, // VST3LNqWB_fixed_Asm_32 4392005U, // VST3LNqWB_register_Asm_16 4523077U, // VST3LNqWB_register_Asm_32 21562437U, // VST3d16 0U, // VST3d16Pseudo 0U, // VST3d16Pseudo_UPD 541684805U, // VST3d16_UPD 21693509U, // VST3d32 0U, // VST3d32Pseudo 0U, // VST3d32Pseudo_UPD 541815877U, // VST3d32_UPD 21824581U, // VST3d8 0U, // VST3d8Pseudo 0U, // VST3d8Pseudo_UPD 541946949U, // VST3d8_UPD 2520933445U, // VST3dAsm_16 2521064517U, // VST3dAsm_32 2519491653U, // VST3dAsm_8 2520933445U, // VST3dWB_fixed_Asm_16 2521064517U, // VST3dWB_fixed_Asm_32 2519491653U, // VST3dWB_fixed_Asm_8 2520937541U, // VST3dWB_register_Asm_16 2521068613U, // VST3dWB_register_Asm_32 2519495749U, // VST3dWB_register_Asm_8 21562437U, // VST3q16 0U, // VST3q16Pseudo_UPD 541684805U, // VST3q16_UPD 0U, // VST3q16oddPseudo 0U, // VST3q16oddPseudo_UPD 21693509U, // VST3q32 0U, // VST3q32Pseudo_UPD 541815877U, // VST3q32_UPD 0U, // VST3q32oddPseudo 0U, // VST3q32oddPseudo_UPD 21824581U, // VST3q8 0U, // VST3q8Pseudo_UPD 541946949U, // VST3q8_UPD 0U, // VST3q8oddPseudo 0U, // VST3q8oddPseudo_UPD 1547854917U, // VST3qAsm_16 1547985989U, // VST3qAsm_32 1546413125U, // VST3qAsm_8 2621596741U, // VST3qWB_fixed_Asm_16 2621727813U, // VST3qWB_fixed_Asm_32 2620154949U, // VST3qWB_fixed_Asm_8 474117189U, // VST3qWB_register_Asm_16 474248261U, // VST3qWB_register_Asm_32 472675397U, // VST3qWB_register_Asm_8 21591126U, // VST4LNd16 0U, // VST4LNd16Pseudo 0U, // VST4LNd16Pseudo_UPD 541688918U, // VST4LNd16_UPD 21722198U, // VST4LNd32 0U, // VST4LNd32Pseudo 0U, // VST4LNd32Pseudo_UPD 541819990U, // VST4LNd32_UPD 21853270U, // VST4LNd8 0U, // VST4LNd8Pseudo 0U, // VST4LNd8Pseudo_UPD 541951062U, // VST4LNd8_UPD 4355158U, // VST4LNdAsm_16 4486230U, // VST4LNdAsm_32 2913366U, // VST4LNdAsm_8 4355158U, // VST4LNdWB_fixed_Asm_16 4486230U, // VST4LNdWB_fixed_Asm_32 2913366U, // VST4LNdWB_fixed_Asm_8 4392022U, // VST4LNdWB_register_Asm_16 4523094U, // VST4LNdWB_register_Asm_32 2950230U, // VST4LNdWB_register_Asm_8 21591126U, // VST4LNq16 0U, // VST4LNq16Pseudo 0U, // VST4LNq16Pseudo_UPD 541688918U, // VST4LNq16_UPD 21722198U, // VST4LNq32 0U, // VST4LNq32Pseudo 0U, // VST4LNq32Pseudo_UPD 541819990U, // VST4LNq32_UPD 4355158U, // VST4LNqAsm_16 4486230U, // VST4LNqAsm_32 4355158U, // VST4LNqWB_fixed_Asm_16 4486230U, // VST4LNqWB_fixed_Asm_32 4392022U, // VST4LNqWB_register_Asm_16 4523094U, // VST4LNqWB_register_Asm_32 21537878U, // VST4d16 0U, // VST4d16Pseudo 0U, // VST4d16Pseudo_UPD 541697110U, // VST4d16_UPD 21668950U, // VST4d32 0U, // VST4d32Pseudo 0U, // VST4d32Pseudo_UPD 541828182U, // VST4d32_UPD 21800022U, // VST4d8 0U, // VST4d8Pseudo 0U, // VST4d8Pseudo_UPD 541959254U, // VST4d8_UPD 2504156246U, // VST4dAsm_16 2504287318U, // VST4dAsm_32 2502714454U, // VST4dAsm_8 2504156246U, // VST4dWB_fixed_Asm_16 2504287318U, // VST4dWB_fixed_Asm_32 2502714454U, // VST4dWB_fixed_Asm_8 2504160342U, // VST4dWB_register_Asm_16 2504291414U, // VST4dWB_register_Asm_32 2502718550U, // VST4dWB_register_Asm_8 21537878U, // VST4q16 0U, // VST4q16Pseudo_UPD 541697110U, // VST4q16_UPD 0U, // VST4q16oddPseudo 0U, // VST4q16oddPseudo_UPD 21668950U, // VST4q32 0U, // VST4q32Pseudo_UPD 541828182U, // VST4q32_UPD 0U, // VST4q32oddPseudo 0U, // VST4q32oddPseudo_UPD 21800022U, // VST4q8 0U, // VST4q8Pseudo_UPD 541959254U, // VST4q8_UPD 0U, // VST4q8oddPseudo 0U, // VST4q8oddPseudo_UPD 1598186582U, // VST4qAsm_16 1598317654U, // VST4qAsm_32 1596744790U, // VST4qAsm_8 2671928406U, // VST4qWB_fixed_Asm_16 2672059478U, // VST4qWB_fixed_Asm_32 2670486614U, // VST4qWB_fixed_Asm_8 524448854U, // VST4qWB_register_Asm_16 524579926U, // VST4qWB_register_Asm_32 523007062U, // VST4qWB_register_Asm_8 33572324U, // VSTMDDB_UPD 34168U, // VSTMDIA 33572216U, // VSTMDIA_UPD 0U, // VSTMQIA 33572324U, // VSTMSDB_UPD 34168U, // VSTMSIA 33572216U, // VSTMSIA_UPD 27079U, // VSTRD 27079U, // VSTRS 2248959585U, // VSUBD 35940562U, // VSUBHNv2i32 36071634U, // VSUBHNv4i16 36202706U, // VSUBHNv8i8 35153973U, // VSUBLsv2i64 35285045U, // VSUBLsv4i32 35416117U, // VSUBLsv8i16 35547189U, // VSUBLuv2i64 35678261U, // VSUBLuv4i32 35809333U, // VSUBLuv8i16 2249090657U, // VSUBS 35154696U, // VSUBWsv2i64 35285768U, // VSUBWsv4i32 35416840U, // VSUBWsv8i16 35547912U, // VSUBWuv2i64 35678984U, // VSUBWuv4i32 35810056U, // VSUBWuv8i16 2249090657U, // VSUBfd 2249090657U, // VSUBfq 36333153U, // VSUBv16i8 35939937U, // VSUBv1i64 36071009U, // VSUBv2i32 35939937U, // VSUBv2i64 36202081U, // VSUBv4i16 36071009U, // VSUBv4i32 36202081U, // VSUBv8i16 36333153U, // VSUBv8i8 31076U, // VSWPd 31076U, // VSWPq 2910256U, // VTBL1 2910256U, // VTBL2 2910256U, // VTBL3 0U, // VTBL3Pseudo 2910256U, // VTBL4 0U, // VTBL4Pseudo 2915173U, // VTBX1 2915173U, // VTBX2 2915173U, // VTBX3 0U, // VTBX3Pseudo 2915173U, // VTBX4 0U, // VTBX4Pseudo 6580940U, // VTOSHD 6712012U, // VTOSHS 292047308U, // VTOSIRD 289032652U, // VTOSIRS 292047564U, // VTOSIZD 289032908U, // VTOSIZS 107506380U, // VTOSLD 104491724U, // VTOSLS 6974156U, // VTOUHD 7105228U, // VTOUHS 292440524U, // VTOUIRD 289163724U, // VTOUIRS 292440780U, // VTOUIZD 289163980U, // VTOUIZS 107899596U, // VTOULD 104622796U, // VTOULS 4356376U, // VTRNd16 4487448U, // VTRNd32 2914584U, // VTRNd8 4356376U, // VTRNq16 4487448U, // VTRNq32 2914584U, // VTRNq8 2910891U, // VTSTv16i8 4483755U, // VTSTv2i32 4352683U, // VTSTv4i16 4483755U, // VTSTv4i32 4352683U, // VTSTv8i16 2910891U, // VTSTv8i8 7367372U, // VUHTOD 7498444U, // VUHTOS 292833996U, // VUITOD 289426124U, // VUITOS 108292812U, // VULTOD 104884940U, // VULTOS 4356457U, // VUZPd16 2914665U, // VUZPd8 4356457U, // VUZPq16 4487529U, // VUZPq32 2914665U, // VUZPq8 4356433U, // VZIPd16 2914641U, // VZIPd8 4356433U, // VZIPq16 4487505U, // VZIPq32 2914641U, // VZIPq8 0U, // WIN__CHKSTK 34143U, // sysLDMDA 33572191U, // sysLDMDA_UPD 34270U, // sysLDMDB 33572318U, // sysLDMDB_UPD 35010U, // sysLDMIA 33573058U, // sysLDMIA_UPD 34289U, // sysLDMIB 33572337U, // sysLDMIB_UPD 34149U, // sysSTMDA 33572197U, // sysSTMDA_UPD 34277U, // sysSTMDB 33572325U, // sysSTMDB_UPD 35014U, // sysSTMIA 33573062U, // sysSTMIA_UPD 34295U, // sysSTMIB 33572343U, // sysSTMIB_UPD 0U, // t2ABS 5780U, // t2ADCri 7739028U, // t2ADCrr 7743124U, // t2ADCrs 0U, // t2ADDSri 0U, // t2ADDSrr 0U, // t2ADDSrs 7739089U, // t2ADDri 27407U, // t2ADDri12 7739089U, // t2ADDrr 7743185U, // t2ADDrs 7752066U, // t2ADR 5894U, // t2ANDri 7739142U, // t2ANDrr 7743238U, // t2ANDrs 7739824U, // t2ASRri 7739824U, // t2ASRrr 1081509295U, // t2B 26268U, // t2BFC 30689U, // t2BFI 5793U, // t2BICri 7739041U, // t2BICrr 7743137U, // t2BICrs 0U, // t2BR_JT 1073776627U, // t2BXJ 1081509295U, // t2Bcc 2197858637U, // t2CDP 2197857311U, // t2CDP2 433064U, // t2CLREX 19434U, // t2CLZ 7751923U, // t2CMNri 7751923U, // t2CMNzrr 7760115U, // t2CMNzrs 7752023U, // t2CMPri 7752023U, // t2CMPrr 7760215U, // t2CMPrs 414531U, // t2CPS1p 1165412870U, // t2CPS2p 83937798U, // t2CPS3p 33706710U, // t2CRC32B 33706718U, // t2CRC32CB 33706787U, // t2CRC32CH 33706863U, // t2CRC32CW 33706779U, // t2CRC32H 33706855U, // t2CRC32W 1073776486U, // t2DBG 431091U, // t2DCPS1 431151U, // t2DCPS2 431167U, // t2DCPS3 805340674U, // t2DMB 805340693U, // t2DSB 6558U, // t2EORri 7739806U, // t2EORrr 7743902U, // t2EORrs 1081510550U, // t2HINT 414553U, // t2HVC 822117913U, // t2ISB 117504644U, // t2IT 0U, // t2Int_eh_sjlj_setjmp 0U, // t2Int_eh_sjlj_setjmp_nofp 17755U, // t2LDA 17836U, // t2LDAB 19350U, // t2LDAEX 18036U, // t2LDAEXB 26400U, // t2LDAEXD 18373U, // t2LDAEXH 18293U, // t2LDAH 3271587831U, // t2LDC2L_OFFSET 3271587831U, // t2LDC2L_OPTION 3271587831U, // t2LDC2L_POST 3271587831U, // t2LDC2L_PRE 3271586821U, // t2LDC2_OFFSET 3271586821U, // t2LDC2_OPTION 3271586821U, // t2LDC2_POST 3271586821U, // t2LDC2_PRE 3271587899U, // t2LDCL_OFFSET 3271587899U, // t2LDCL_OPTION 3271587899U, // t2LDCL_POST 3271587899U, // t2LDCL_PRE 3271587480U, // t2LDC_OFFSET 3271587480U, // t2LDC_OPTION 3271587480U, // t2LDC_POST 3271587480U, // t2LDC_PRE 34270U, // t2LDMDB 33572318U, // t2LDMDB_UPD 7768258U, // t2LDMIA 0U, // t2LDMIA_RET 41306306U, // t2LDMIA_UPD 27212U, // t2LDRBT 30219U, // t2LDRB_POST 30219U, // t2LDRB_PRE 7759371U, // t2LDRBi12 26123U, // t2LDRBi8 7751179U, // t2LDRBpci 280075U, // t2LDRBpcrel 7763467U, // t2LDRBs 67338U, // t2LDRD_POST 67338U, // t2LDRD_PRE 30474U, // t2LDRDi8 27554U, // t2LDREX 18050U, // t2LDREXB 26414U, // t2LDREXD 18387U, // t2LDREXH 27247U, // t2LDRHT 30624U, // t2LDRH_POST 30624U, // t2LDRH_PRE 7759776U, // t2LDRHi12 26528U, // t2LDRHi8 7751584U, // t2LDRHpci 280480U, // t2LDRHpcrel 7763872U, // t2LDRHs 27224U, // t2LDRSBT 30237U, // t2LDRSB_POST 30237U, // t2LDRSB_PRE 7759389U, // t2LDRSBi12 26141U, // t2LDRSBi8 7751197U, // t2LDRSBpci 280093U, // t2LDRSBpcrel 7763485U, // t2LDRSBs 27259U, // t2LDRSHT 30634U, // t2LDRSH_POST 30634U, // t2LDRSH_PRE 7759786U, // t2LDRSHi12 26538U, // t2LDRSHi8 7751594U, // t2LDRSHpci 280490U, // t2LDRSHpcrel 7763882U, // t2LDRSHs 27291U, // t2LDRT 31111U, // t2LDR_POST 31111U, // t2LDR_PRE 7760263U, // t2LDRi12 27015U, // t2LDRi8 7752071U, // t2LDRpci 0U, // t2LDRpci_pic 280967U, // t2LDRpcrel 7764359U, // t2LDRs 0U, // t2LEApcrel 0U, // t2LEApcrelJT 7739549U, // t2LSLri 7739549U, // t2LSLrr 7739831U, // t2LSRri 7739831U, // t2LSRrr 2197858686U, // t2MCR 2197857316U, // t2MCR2 2197883302U, // t2MCRR 2197881897U, // t2MCRR2 30087U, // t2MLA 31209U, // t2MLS 0U, // t2MOVCCasr 0U, // t2MOVCCi 0U, // t2MOVCCi16 0U, // t2MOVCCi32imm 0U, // t2MOVCClsl 0U, // t2MOVCClsr 0U, // t2MOVCCr 0U, // t2MOVCCror 289313U, // t2MOVSsi 293409U, // t2MOVSsr 27345U, // t2MOVTi16 0U, // t2MOVTi16_ga_pcrel 0U, // t2MOV_ga_pcrel 7805700U, // t2MOVi 19225U, // t2MOVi16 0U, // t2MOVi16_ga_pcrel 0U, // t2MOVi32imm 7805700U, // t2MOVr 289540U, // t2MOVsi 293636U, // t2MOVsr 7752207U, // t2MOVsra_flag 7752212U, // t2MOVsrl_flag 201369257U, // t2MRC 201368586U, // t2MRC2 2197882541U, // t2MRRC 2197881871U, // t2MRRC2 35339U, // t2MRS_AR 18955U, // t2MRS_M 18955U, // t2MRSbanked 1073777163U, // t2MRSsys_AR 2365606332U, // t2MSR_AR 2365606332U, // t2MSR_M 234899900U, // t2MSRbanked 26797U, // t2MUL 0U, // t2MVNCCi 71991U, // t2MVNi 7805239U, // t2MVNr 7739703U, // t2MVNs 6420U, // t2ORNri 6420U, // t2ORNrr 10516U, // t2ORNrs 6572U, // t2ORRri 7739820U, // t2ORRrr 7743916U, // t2ORRrs 31287U, // t2PKHBT 30250U, // t2PKHTB 838880020U, // t2PLDWi12 855657236U, // t2PLDWi8 872442644U, // t2PLDWs 838878970U, // t2PLDi12 855656186U, // t2PLDi8 889227002U, // t2PLDpci 872441594U, // t2PLDs 838879205U, // t2PLIi12 855656421U, // t2PLIi8 889227237U, // t2PLIpci 872441829U, // t2PLIs 26345U, // t2QADD 25776U, // t2QADD16 25879U, // t2QADD8 27603U, // t2QASX 26319U, // t2QDADD 26191U, // t2QDSUB 27462U, // t2QSAX 26204U, // t2QSUB 25738U, // t2QSUB16 25840U, // t2QSUB8 19074U, // t2RBIT 7752432U, // t2REV 7750868U, // t2REV16 7751605U, // t2REVSH 1073776087U, // t2RFEDB 2147517911U, // t2RFEDBW 1073775979U, // t2RFEIA 2147517803U, // t2RFEIAW 7739810U, // t2RORri 7739810U, // t2RORrr 72642U, // t2RRX 0U, // t2RSBSri 0U, // t2RSBSrs 7738911U, // t2RSBri 5663U, // t2RSBrr 9759U, // t2RSBrs 25783U, // t2SADD16 25885U, // t2SADD8 27608U, // t2SASX 5776U, // t2SBCri 7739024U, // t2SBCrr 7743120U, // t2SBCrs 31668U, // t2SBFX 27380U, // t2SDIV 26712U, // t2SEL 25759U, // t2SHADD16 25864U, // t2SHADD8 27590U, // t2SHASX 27449U, // t2SHSAX 25721U, // t2SHSUB16 25825U, // t2SHSUB8 1073776293U, // t2SMC 30141U, // t2SMLABB 31280U, // t2SMLABT 30398U, // t2SMLAD 31594U, // t2SMLADX 43038U, // t2SMLAL 30148U, // t2SMLALBB 31293U, // t2SMLALBT 30451U, // t2SMLALD 31608U, // t2SMLALDX 30256U, // t2SMLALTB 31415U, // t2SMLALTT 30243U, // t2SMLATB 31408U, // t2SMLATT 30310U, // t2SMLAWB 31446U, // t2SMLAWT 30484U, // t2SMLSD 31624U, // t2SMLSDX 30462U, // t2SMLSLD 31616U, // t2SMLSLDX 30085U, // t2SMMLA 31095U, // t2SMMLAR 31207U, // t2SMMLS 31156U, // t2SMMLSR 26795U, // t2SMMUL 27030U, // t2SMMULR 26308U, // t2SMUAD 27505U, // t2SMUADX 26060U, // t2SMULBB 27205U, // t2SMULBT 30850U, // t2SMULL 26168U, // t2SMULTB 27327U, // t2SMULTT 26221U, // t2SMULWB 27357U, // t2SMULWT 26394U, // t2SMUSD 27535U, // t2SMUSDX 7898603U, // t2SRSDB 8029675U, // t2SRSDB_UPD 7898495U, // t2SRSIA 8029567U, // t2SRSIA_UPD 31270U, // t2SSAT 25797U, // t2SSAT16 27467U, // t2SSAX 25745U, // t2SSUB16 25846U, // t2SSUB8 3271587837U, // t2STC2L_OFFSET 3271587837U, // t2STC2L_OPTION 3271587837U, // t2STC2L_POST 3271587837U, // t2STC2L_PRE 3271586837U, // t2STC2_OFFSET 3271586837U, // t2STC2_OPTION 3271586837U, // t2STC2_POST 3271586837U, // t2STC2_PRE 3271587904U, // t2STCL_OFFSET 3271587904U, // t2STCL_OPTION 3271587904U, // t2STCL_POST 3271587904U, // t2STCL_PRE 3271587510U, // t2STC_OFFSET 3271587510U, // t2STC_OPTION 3271587510U, // t2STC_POST 3271587510U, // t2STC_PRE 18599U, // t2STL 17917U, // t2STLB 27548U, // t2STLEX 26235U, // t2STLEXB 30503U, // t2STLEXD 26572U, // t2STLEXH 18314U, // t2STLH 34277U, // t2STMDB 33572325U, // t2STMDB_UPD 7768262U, // t2STMIA 41306310U, // t2STMIA_UPD 27218U, // t2STRBT 33584656U, // t2STRB_POST 33584656U, // t2STRB_PRE 0U, // t2STRB_preidx 7759376U, // t2STRBi12 26128U, // t2STRBi8 7763472U, // t2STRBs 33621775U, // t2STRD_POST 33621775U, // t2STRD_PRE 30479U, // t2STRDi8 31662U, // t2STREX 26249U, // t2STREXB 30517U, // t2STREXD 26586U, // t2STREXH 27253U, // t2STRHT 33585061U, // t2STRH_POST 33585061U, // t2STRH_PRE 0U, // t2STRH_preidx 7759781U, // t2STRHi12 26533U, // t2STRHi8 7763877U, // t2STRHs 27302U, // t2STRT 33585608U, // t2STR_POST 33585608U, // t2STR_PRE 0U, // t2STR_preidx 7760328U, // t2STRi12 27080U, // t2STRi8 7764424U, // t2STRs 8161757U, // t2SUBS_PC_LR 0U, // t2SUBSri 0U, // t2SUBSrr 0U, // t2SUBSrs 7738961U, // t2SUBri 27401U, // t2SUBri12 7738961U, // t2SUBrr 7743057U, // t2SUBrs 30129U, // t2SXTAB 29787U, // t2SXTAB16 30586U, // t2SXTAH 7759429U, // t2SXTB 25707U, // t2SXTB16 7759803U, // t2SXTH 905987539U, // t2TBB 0U, // t2TBB_JT 922765190U, // t2TBH 0U, // t2TBH_JT 7752051U, // t2TEQri 7752051U, // t2TEQrr 7760243U, // t2TEQrs 7752364U, // t2TSTri 7752364U, // t2TSTrr 7760556U, // t2TSTrs 25790U, // t2UADD16 25891U, // t2UADD8 27613U, // t2UASX 31673U, // t2UBFX 414560U, // t2UDF 27385U, // t2UDIV 25767U, // t2UHADD16 25871U, // t2UHADD8 27596U, // t2UHASX 27455U, // t2UHSAX 25729U, // t2UHSUB16 25832U, // t2UHSUB8 30723U, // t2UMAAL 43044U, // t2UMLAL 30856U, // t2UMULL 25775U, // t2UQADD16 25878U, // t2UQADD8 27602U, // t2UQASX 27461U, // t2UQSAX 25737U, // t2UQSUB16 25839U, // t2UQSUB8 25858U, // t2USAD8 29914U, // t2USADA8 31275U, // t2USAT 25804U, // t2USAT16 27472U, // t2USAX 25752U, // t2USUB16 25852U, // t2USUB8 30135U, // t2UXTAB 29795U, // t2UXTAB16 30592U, // t2UXTAH 7759434U, // t2UXTB 25714U, // t2UXTB16 7759808U, // t2UXTH 947898004U, // tADC 0U, // tADDframe 26321U, // tADDhirr 25151185U, // tADDi3 947898065U, // tADDi8 26321U, // tADDrSP 26321U, // tADDrSPi 25151185U, // tADDrr 26321U, // tADDspi 26321U, // tADDspr 0U, // tADJCALLSTACKDOWN 0U, // tADJCALLSTACKUP 18818U, // tADR 947898118U, // tAND 25151920U, // tASRri 947898800U, // tASRrr 1073776047U, // tB 947898017U, // tBIC 414547U, // tBKPT 1090558002U, // tBL 1090558910U, // tBLXi 1090558910U, // tBLXr 0U, // tBRIND 0U, // tBR_JTr 1073777498U, // tBX 0U, // tBX_CALL 0U, // tBX_RET 0U, // tBX_RET_vararg 1073776047U, // tBcc 0U, // tBfar 1107448716U, // tCBNZ 1107448711U, // tCBZ 18675U, // tCMNz 18775U, // tCMPhir 18775U, // tCMPi8 18775U, // tCMPr 1157941766U, // tCPS 947898782U, // tEOR 1073777302U, // tHINT 414542U, // tHLT 0U, // tInt_eh_sjlj_longjmp 0U, // tInt_eh_sjlj_setjmp 35010U, // tLDMIA 0U, // tLDMIA_UPD 26123U, // tLDRBi 26123U, // tLDRBr 26528U, // tLDRHi 26528U, // tLDRHr 0U, // tLDRLIT_ga_abs 0U, // tLDRLIT_ga_pcrel 26141U, // tLDRSB 26538U, // tLDRSH 27015U, // tLDRi 18823U, // tLDRpci 0U, // tLDRpci_pic 27015U, // tLDRr 27015U, // tLDRspi 0U, // tLEApcrel 0U, // tLEApcrelJT 25151645U, // tLSLri 947898525U, // tLSLrr 25151927U, // tLSRri 947898807U, // tLSRrr 0U, // tMOVCCr_pseudo 1107448648U, // tMOVSr 293718788U, // tMOVi8 19204U, // tMOVr 25151661U, // tMUL 293718327U, // tMVN 947898796U, // tORR 0U, // tPICADD 956340571U, // tPOP 0U, // tPOP_RET 956340144U, // tPUSH 19184U, // tREV 17620U, // tREV16 18357U, // tREVSH 947898786U, // tROR 276940319U, // tRSB 947898000U, // tSBC 86798U, // tSETEND 33573062U, // tSTMIA_UPD 26128U, // tSTRBi 26128U, // tSTRBr 26533U, // tSTRHi 26533U, // tSTRHr 27080U, // tSTRi 27080U, // tSTRr 27080U, // tSTRspi 25151057U, // tSUBi3 947897937U, // tSUBi8 25151057U, // tSUBrr 26193U, // tSUBspi 1073776314U, // tSVC 17989U, // tSXTB 18363U, // tSXTH 0U, // tTAILJMPd 0U, // tTAILJMPdND 0U, // tTAILJMPr 0U, // tTPsoft 2376U, // tTRAP 19116U, // tTST 414486U, // tUDF 17994U, // tUXTB 18368U, // tUXTH 0U }; static const uint32_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // ABS 0U, // ADCri 16384U, // ADCrr 32768U, // ADCrsi 0U, // ADCrsr 0U, // ADDSri 0U, // ADDSrr 0U, // ADDSrsi 0U, // ADDSrsr 0U, // ADDri 16384U, // ADDrr 32768U, // ADDrsi 0U, // ADDrsr 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 8U, // ADR 0U, // AESD 0U, // AESE 0U, // AESIMC 0U, // AESMC 0U, // ANDri 16384U, // ANDrr 32768U, // ANDrsi 0U, // ANDrsr 16384U, // ASRi 16384U, // ASRr 0U, // B 0U, // BCCZi64 0U, // BCCi64 16U, // BFC 49176U, // BFI 0U, // BICri 16384U, // BICrr 32768U, // BICrsi 0U, // BICrsr 0U, // BKPT 0U, // BL 0U, // BLX 0U, // BLX_pred 0U, // BLXi 0U, // BL_pred 0U, // BMOVPCB_CALL 0U, // BMOVPCRX_CALL 0U, // BR_JTadd 0U, // BR_JTm 0U, // BR_JTr 0U, // BX 0U, // BXJ 0U, // BX_CALL 0U, // BX_RET 0U, // BX_pred 0U, // Bcc 544U, // CDP 0U, // CDP2 0U, // CLREX 1024U, // CLZ 40U, // CMNri 1024U, // CMNzrr 48U, // CMNzrsi 56U, // CMNzrsr 40U, // CMPri 1024U, // CMPrr 48U, // CMPrsi 56U, // CMPrsr 0U, // CONSTPOOL_ENTRY 0U, // COPY_STRUCT_BYVAL_I32 0U, // CPS1p 0U, // CPS2p 1048U, // CPS3p 1048U, // CRC32B 1048U, // CRC32CB 1048U, // CRC32CH 1048U, // CRC32CW 1048U, // CRC32H 1048U, // CRC32W 0U, // DBG 0U, // DMB 0U, // DSB 0U, // EORri 16384U, // EORrr 32768U, // EORrsi 0U, // EORrsr 0U, // ERET 0U, // FCONSTD 0U, // FCONSTS 65U, // FLDMXDB_UPD 1096U, // FLDMXIA 65U, // FLDMXIA_UPD 0U, // FMSTAT 65U, // FSTMXDB_UPD 1096U, // FSTMXIA 65U, // FSTMXIA_UPD 0U, // HINT 0U, // HLT 0U, // HVC 0U, // ISB 0U, // ITasm 0U, // Int_eh_sjlj_dispatchsetup 0U, // Int_eh_sjlj_longjmp 0U, // Int_eh_sjlj_setjmp 0U, // Int_eh_sjlj_setjmp_nofp 80U, // LDA 80U, // LDAB 80U, // LDAEX 80U, // LDAEXB 0U, // LDAEXD 80U, // LDAEXH 80U, // LDAH 0U, // LDC2L_OFFSET 1U, // LDC2L_OPTION 1U, // LDC2L_POST 0U, // LDC2L_PRE 0U, // LDC2_OFFSET 1U, // LDC2_OPTION 1U, // LDC2_POST 0U, // LDC2_PRE 89U, // LDCL_OFFSET 65633U, // LDCL_OPTION 82017U, // LDCL_POST 105U, // LDCL_PRE 89U, // LDC_OFFSET 65633U, // LDC_OPTION 82017U, // LDC_POST 105U, // LDC_PRE 1096U, // LDMDA 65U, // LDMDA_UPD 1096U, // LDMDB 65U, // LDMDB_UPD 1096U, // LDMIA 0U, // LDMIA_RET 65U, // LDMIA_UPD 1096U, // LDMIB 65U, // LDMIB_UPD 80U, // LDRBT_POST 98400U, // LDRBT_POST_IMM 98400U, // LDRBT_POST_REG 98400U, // LDRB_POST_IMM 98400U, // LDRB_POST_REG 112U, // LDRB_PRE_IMM 120U, // LDRB_PRE_REG 128U, // LDRBi12 136U, // LDRBrs 114688U, // LDRD 1179648U, // LDRD_POST 147456U, // LDRD_PRE 80U, // LDREX 80U, // LDREXB 0U, // LDREXD 80U, // LDREXH 144U, // LDRH 163936U, // LDRHTi 180320U, // LDRHTr 196704U, // LDRH_POST 152U, // LDRH_PRE 0U, // LDRLIT_ga_abs 0U, // LDRLIT_ga_pcrel 0U, // LDRLIT_ga_pcrel_ldr 144U, // LDRSB 163936U, // LDRSBTi 180320U, // LDRSBTr 196704U, // LDRSB_POST 152U, // LDRSB_PRE 144U, // LDRSH 163936U, // LDRSHTi 180320U, // LDRSHTr 196704U, // LDRSH_POST 152U, // LDRSH_PRE 80U, // LDRT_POST 98400U, // LDRT_POST_IMM 98400U, // LDRT_POST_REG 98400U, // LDR_POST_IMM 98400U, // LDR_POST_REG 112U, // LDR_PRE_IMM 120U, // LDR_PRE_REG 128U, // LDRcp 128U, // LDRi12 136U, // LDRrs 0U, // LEApcrel 0U, // LEApcrelJT 16384U, // LSLi 16384U, // LSLr 16384U, // LSRi 16384U, // LSRr 2311712U, // MCR 160U, // MCR2 3360288U, // MCRR 229544U, // MCRR2 17842176U, // MLA 0U, // MLAv5 17842176U, // MLS 0U, // MOVCCi 0U, // MOVCCi16 0U, // MOVCCi32imm 0U, // MOVCCr 0U, // MOVCCsi 0U, // MOVCCsr 0U, // MOVPCLR 0U, // MOVPCRX 1048U, // MOVTi16 0U, // MOVTi16_ga_pcrel 0U, // MOV_ga_pcrel 0U, // MOV_ga_pcrel_ldr 40U, // MOVi 1024U, // MOVi16 0U, // MOVi16_ga_pcrel 0U, // MOVi32imm 1024U, // MOVr 1024U, // MOVr_TC 48U, // MOVsi 56U, // MOVsr 0U, // MOVsra_flag 0U, // MOVsrl_flag 0U, // MRC 0U, // MRC2 3360288U, // MRRC 229544U, // MRRC2 2U, // MRS 176U, // MRSbanked 2U, // MRSsys 64U, // MSR 0U, // MSRbanked 2U, // MSRi 16384U, // MUL 0U, // MULv5 0U, // MVNCCi 40U, // MVNi 1024U, // MVNr 48U, // MVNsi 56U, // MVNsr 0U, // ORRri 16384U, // ORRrr 32768U, // ORRrsi 0U, // ORRrsr 0U, // PICADD 0U, // PICLDR 0U, // PICLDRB 0U, // PICLDRH 0U, // PICLDRSB 0U, // PICLDRSH 0U, // PICSTR 0U, // PICSTRB 0U, // PICSTRH 4210688U, // PKHBT 5259264U, // PKHTB 0U, // PLDWi12 0U, // PLDWrs 0U, // PLDi12 0U, // PLDrs 0U, // PLIi12 0U, // PLIrs 16384U, // QADD 16384U, // QADD16 16384U, // QADD8 16384U, // QASX 16384U, // QDADD 16384U, // QDSUB 16384U, // QSAX 16384U, // QSUB 16384U, // QSUB16 16384U, // QSUB8 1024U, // RBIT 1024U, // REV 1024U, // REV16 1024U, // REVSH 0U, // RFEDA 0U, // RFEDA_UPD 0U, // RFEDB 0U, // RFEDB_UPD 0U, // RFEIA 0U, // RFEIA_UPD 0U, // RFEIB 0U, // RFEIB_UPD 16384U, // RORi 16384U, // RORr 0U, // RRX 1024U, // RRXi 0U, // RSBSri 0U, // RSBSrsi 0U, // RSBSrsr 0U, // RSBri 16384U, // RSBrr 32768U, // RSBrsi 0U, // RSBrsr 0U, // RSCri 16384U, // RSCrr 32768U, // RSCrsi 0U, // RSCrsr 16384U, // SADD16 16384U, // SADD8 16384U, // SASX 0U, // SBCri 16384U, // SBCrr 32768U, // SBCrsi 0U, // SBCrsr 34619392U, // SBFX 16384U, // SDIV 16384U, // SEL 0U, // SETEND 1192U, // SHA1C 0U, // SHA1H 1192U, // SHA1M 1192U, // SHA1P 1192U, // SHA1SU0 0U, // SHA1SU1 1192U, // SHA256H 1192U, // SHA256H2 0U, // SHA256SU0 1192U, // SHA256SU1 16384U, // SHADD16 16384U, // SHADD8 16384U, // SHASX 16384U, // SHSAX 16384U, // SHSUB16 16384U, // SHSUB8 0U, // SMC 17842176U, // SMLABB 17842176U, // SMLABT 17842176U, // SMLAD 17842176U, // SMLADX 0U, // SMLAL 17842176U, // SMLALBB 17842176U, // SMLALBT 17842176U, // SMLALD 17842176U, // SMLALDX 17842176U, // SMLALTB 17842176U, // SMLALTT 0U, // SMLALv5 17842176U, // SMLATB 17842176U, // SMLATT 17842176U, // SMLAWB 17842176U, // SMLAWT 17842176U, // SMLSD 17842176U, // SMLSDX 17842176U, // SMLSLD 17842176U, // SMLSLDX 17842176U, // SMMLA 17842176U, // SMMLAR 17842176U, // SMMLS 17842176U, // SMMLSR 16384U, // SMMUL 16384U, // SMMULR 16384U, // SMUAD 16384U, // SMUADX 16384U, // SMULBB 16384U, // SMULBT 17842176U, // SMULL 0U, // SMULLv5 16384U, // SMULTB 16384U, // SMULTT 16384U, // SMULWB 16384U, // SMULWT 16384U, // SMUSD 16384U, // SMUSDX 0U, // SPACE 0U, // SRSDA 0U, // SRSDA_UPD 0U, // SRSDB 0U, // SRSDB_UPD 0U, // SRSIA 0U, // SRSIA_UPD 0U, // SRSIB 0U, // SRSIB_UPD 2232U, // SSAT 1208U, // SSAT16 16384U, // SSAX 16384U, // SSUB16 16384U, // SSUB8 0U, // STC2L_OFFSET 1U, // STC2L_OPTION 1U, // STC2L_POST 0U, // STC2L_PRE 0U, // STC2_OFFSET 1U, // STC2_OPTION 1U, // STC2_POST 0U, // STC2_PRE 89U, // STCL_OFFSET 65633U, // STCL_OPTION 82017U, // STCL_POST 105U, // STCL_PRE 89U, // STC_OFFSET 65633U, // STC_OPTION 82017U, // STC_POST 105U, // STC_PRE 80U, // STL 80U, // STLB 245760U, // STLEX 245760U, // STLEXB 192U, // STLEXD 245760U, // STLEXH 80U, // STLH 1096U, // STMDA 65U, // STMDA_UPD 1096U, // STMDB 65U, // STMDB_UPD 1096U, // STMIA 65U, // STMIA_UPD 1096U, // STMIB 65U, // STMIB_UPD 80U, // STRBT_POST 98400U, // STRBT_POST_IMM 98400U, // STRBT_POST_REG 98400U, // STRB_POST_IMM 98400U, // STRB_POST_REG 112U, // STRB_PRE_IMM 120U, // STRB_PRE_REG 128U, // STRBi12 0U, // STRBi_preidx 0U, // STRBr_preidx 136U, // STRBrs 114688U, // STRD 1179672U, // STRD_POST 147480U, // STRD_PRE 245760U, // STREX 245760U, // STREXB 192U, // STREXD 245760U, // STREXH 144U, // STRH 163936U, // STRHTi 180320U, // STRHTr 196704U, // STRH_POST 152U, // STRH_PRE 0U, // STRH_preidx 80U, // STRT_POST 98400U, // STRT_POST_IMM 98400U, // STRT_POST_REG 98400U, // STR_POST_IMM 98400U, // STR_POST_REG 112U, // STR_PRE_IMM 120U, // STR_PRE_REG 128U, // STRi12 0U, // STRi_preidx 0U, // STRr_preidx 136U, // STRrs 0U, // SUBS_PC_LR 0U, // SUBSri 0U, // SUBSrr 0U, // SUBSrsi 0U, // SUBSrsr 0U, // SUBri 16384U, // SUBrr 32768U, // SUBrsi 0U, // SUBrsr 0U, // SVC 245760U, // SWP 245760U, // SWPB 6307840U, // SXTAB 6307840U, // SXTAB16 6307840U, // SXTAH 2560U, // SXTB 2560U, // SXTB16 2560U, // SXTH 0U, // TAILJMPd 0U, // TAILJMPr 0U, // TCRETURNdi 0U, // TCRETURNri 40U, // TEQri 1024U, // TEQrr 48U, // TEQrsi 56U, // TEQrsr 0U, // TPsoft 0U, // TRAP 0U, // TRAPNaCl 40U, // TSTri 1024U, // TSTrr 48U, // TSTrsi 56U, // TSTrsr 16384U, // UADD16 16384U, // UADD8 16384U, // UASX 34619392U, // UBFX 0U, // UDF 16384U, // UDIV 16384U, // UHADD16 16384U, // UHADD8 16384U, // UHASX 16384U, // UHSAX 16384U, // UHSUB16 16384U, // UHSUB8 17842176U, // UMAAL 0U, // UMLAL 0U, // UMLALv5 17842176U, // UMULL 0U, // UMULLv5 16384U, // UQADD16 16384U, // UQADD8 16384U, // UQASX 16384U, // UQSAX 16384U, // UQSUB16 16384U, // UQSUB8 16384U, // USAD8 17842176U, // USADA8 7356416U, // USAT 16384U, // USAT16 16384U, // USAX 16384U, // USUB16 16384U, // USUB8 6307840U, // UXTAB 6307840U, // UXTAB16 6307840U, // UXTAH 2560U, // UXTB 2560U, // UXTB16 2560U, // UXTH 1192U, // VABALsv2i64 1192U, // VABALsv4i32 1192U, // VABALsv8i16 1192U, // VABALuv2i64 1192U, // VABALuv4i32 1192U, // VABALuv8i16 1192U, // VABAsv16i8 1192U, // VABAsv2i32 1192U, // VABAsv4i16 1192U, // VABAsv4i32 1192U, // VABAsv8i16 1192U, // VABAsv8i8 1192U, // VABAuv16i8 1192U, // VABAuv2i32 1192U, // VABAuv4i16 1192U, // VABAuv4i32 1192U, // VABAuv8i16 1192U, // VABAuv8i8 1048U, // VABDLsv2i64 1048U, // VABDLsv4i32 1048U, // VABDLsv8i16 1048U, // VABDLuv2i64 1048U, // VABDLuv4i32 1048U, // VABDLuv8i16 263712U, // VABDfd 263712U, // VABDfq 1048U, // VABDsv16i8 1048U, // VABDsv2i32 1048U, // VABDsv4i16 1048U, // VABDsv4i32 1048U, // VABDsv8i16 1048U, // VABDsv8i8 1048U, // VABDuv16i8 1048U, // VABDuv2i32 1048U, // VABDuv4i16 1048U, // VABDuv4i32 1048U, // VABDuv8i16 1048U, // VABDuv8i8 64U, // VABSD 64U, // VABSS 64U, // VABSfd 64U, // VABSfq 0U, // VABSv16i8 0U, // VABSv2i32 0U, // VABSv4i16 0U, // VABSv4i32 0U, // VABSv8i16 0U, // VABSv8i8 263712U, // VACGEd 263712U, // VACGEq 263712U, // VACGTd 263712U, // VACGTq 263712U, // VADDD 1048U, // VADDHNv2i32 1048U, // VADDHNv4i16 1048U, // VADDHNv8i8 1048U, // VADDLsv2i64 1048U, // VADDLsv4i32 1048U, // VADDLsv8i16 1048U, // VADDLuv2i64 1048U, // VADDLuv4i32 1048U, // VADDLuv8i16 263712U, // VADDS 1048U, // VADDWsv2i64 1048U, // VADDWsv4i32 1048U, // VADDWsv8i16 1048U, // VADDWuv2i64 1048U, // VADDWuv4i32 1048U, // VADDWuv8i16 263712U, // VADDfd 263712U, // VADDfq 1048U, // VADDv16i8 1048U, // VADDv1i64 1048U, // VADDv2i32 1048U, // VADDv2i64 1048U, // VADDv4i16 1048U, // VADDv4i32 1048U, // VADDv8i16 1048U, // VADDv8i8 16384U, // VANDd 16384U, // VANDq 16384U, // VBICd 0U, // VBICiv2i32 0U, // VBICiv4i16 0U, // VBICiv4i32 0U, // VBICiv8i16 16384U, // VBICq 278552U, // VBIFd 278552U, // VBIFq 278552U, // VBITd 278552U, // VBITq 278552U, // VBSLd 278552U, // VBSLq 263712U, // VCEQfd 263712U, // VCEQfq 1048U, // VCEQv16i8 1048U, // VCEQv2i32 1048U, // VCEQv4i16 1048U, // VCEQv4i32 1048U, // VCEQv8i16 1048U, // VCEQv8i8 2U, // VCEQzv16i8 200U, // VCEQzv2f32 2U, // VCEQzv2i32 200U, // VCEQzv4f32 2U, // VCEQzv4i16 2U, // VCEQzv4i32 2U, // VCEQzv8i16 2U, // VCEQzv8i8 263712U, // VCGEfd 263712U, // VCGEfq 1048U, // VCGEsv16i8 1048U, // VCGEsv2i32 1048U, // VCGEsv4i16 1048U, // VCGEsv4i32 1048U, // VCGEsv8i16 1048U, // VCGEsv8i8 1048U, // VCGEuv16i8 1048U, // VCGEuv2i32 1048U, // VCGEuv4i16 1048U, // VCGEuv4i32 1048U, // VCGEuv8i16 1048U, // VCGEuv8i8 2U, // VCGEzv16i8 200U, // VCGEzv2f32 2U, // VCGEzv2i32 200U, // VCGEzv4f32 2U, // VCGEzv4i16 2U, // VCGEzv4i32 2U, // VCGEzv8i16 2U, // VCGEzv8i8 263712U, // VCGTfd 263712U, // VCGTfq 1048U, // VCGTsv16i8 1048U, // VCGTsv2i32 1048U, // VCGTsv4i16 1048U, // VCGTsv4i32 1048U, // VCGTsv8i16 1048U, // VCGTsv8i8 1048U, // VCGTuv16i8 1048U, // VCGTuv2i32 1048U, // VCGTuv4i16 1048U, // VCGTuv4i32 1048U, // VCGTuv8i16 1048U, // VCGTuv8i8 2U, // VCGTzv16i8 200U, // VCGTzv2f32 2U, // VCGTzv2i32 200U, // VCGTzv4f32 2U, // VCGTzv4i16 2U, // VCGTzv4i32 2U, // VCGTzv8i16 2U, // VCGTzv8i8 2U, // VCLEzv16i8 200U, // VCLEzv2f32 2U, // VCLEzv2i32 200U, // VCLEzv4f32 2U, // VCLEzv4i16 2U, // VCLEzv4i32 2U, // VCLEzv8i16 2U, // VCLEzv8i8 0U, // VCLSv16i8 0U, // VCLSv2i32 0U, // VCLSv4i16 0U, // VCLSv4i32 0U, // VCLSv8i16 0U, // VCLSv8i8 2U, // VCLTzv16i8 200U, // VCLTzv2f32 2U, // VCLTzv2i32 200U, // VCLTzv4f32 2U, // VCLTzv4i16 2U, // VCLTzv4i32 2U, // VCLTzv8i16 2U, // VCLTzv8i8 0U, // VCLZv16i8 0U, // VCLZv2i32 0U, // VCLZv4i16 0U, // VCLZv4i32 0U, // VCLZv8i16 0U, // VCLZv8i8 64U, // VCMPD 64U, // VCMPED 64U, // VCMPES 0U, // VCMPEZD 0U, // VCMPEZS 64U, // VCMPS 0U, // VCMPZD 0U, // VCMPZS 1024U, // VCNTd 1024U, // VCNTq 0U, // VCVTANSD 0U, // VCVTANSQ 0U, // VCVTANUD 0U, // VCVTANUQ 0U, // VCVTASD 0U, // VCVTASS 0U, // VCVTAUD 0U, // VCVTAUS 0U, // VCVTBDH 0U, // VCVTBHD 0U, // VCVTBHS 0U, // VCVTBSH 0U, // VCVTDS 0U, // VCVTMNSD 0U, // VCVTMNSQ 0U, // VCVTMNUD 0U, // VCVTMNUQ 0U, // VCVTMSD 0U, // VCVTMSS 0U, // VCVTMUD 0U, // VCVTMUS 0U, // VCVTNNSD 0U, // VCVTNNSQ 0U, // VCVTNNUD 0U, // VCVTNNUQ 0U, // VCVTNSD 0U, // VCVTNSS 0U, // VCVTNUD 0U, // VCVTNUS 0U, // VCVTPNSD 0U, // VCVTPNSQ 0U, // VCVTPNUD 0U, // VCVTPNUQ 0U, // VCVTPSD 0U, // VCVTPSS 0U, // VCVTPUD 0U, // VCVTPUS 0U, // VCVTSD 0U, // VCVTTDH 0U, // VCVTTHD 0U, // VCVTTHS 0U, // VCVTTSH 0U, // VCVTf2h 0U, // VCVTf2sd 0U, // VCVTf2sq 0U, // VCVTf2ud 0U, // VCVTf2uq 67U, // VCVTf2xsd 67U, // VCVTf2xsq 67U, // VCVTf2xud 67U, // VCVTf2xuq 0U, // VCVTh2f 0U, // VCVTs2fd 0U, // VCVTs2fq 0U, // VCVTu2fd 0U, // VCVTu2fq 67U, // VCVTxs2fd 67U, // VCVTxs2fq 67U, // VCVTxu2fd 67U, // VCVTxu2fq 263712U, // VDIVD 263712U, // VDIVS 1024U, // VDUP16d 1024U, // VDUP16q 1024U, // VDUP32d 1024U, // VDUP32q 1024U, // VDUP8d 1024U, // VDUP8q 3072U, // VDUPLN16d 3072U, // VDUPLN16q 3072U, // VDUPLN32d 3072U, // VDUPLN32q 3072U, // VDUPLN8d 3072U, // VDUPLN8q 16384U, // VEORd 16384U, // VEORq 17842176U, // VEXTd16 17842176U, // VEXTd32 17842176U, // VEXTd8 17842176U, // VEXTq16 17842176U, // VEXTq32 17842176U, // VEXTq64 17842176U, // VEXTq8 265763U, // VFMAD 265763U, // VFMAS 265763U, // VFMAfd 265763U, // VFMAfq 265763U, // VFMSD 265763U, // VFMSS 265763U, // VFMSfd 265763U, // VFMSfq 265763U, // VFNMAD 265763U, // VFNMAS 265763U, // VFNMSD 265763U, // VFNMSS 3072U, // VGETLNi32 3U, // VGETLNs16 3U, // VGETLNs8 3U, // VGETLNu16 3U, // VGETLNu8 1048U, // VHADDsv16i8 1048U, // VHADDsv2i32 1048U, // VHADDsv4i16 1048U, // VHADDsv4i32 1048U, // VHADDsv8i16 1048U, // VHADDsv8i8 1048U, // VHADDuv16i8 1048U, // VHADDuv2i32 1048U, // VHADDuv4i16 1048U, // VHADDuv4i32 1048U, // VHADDuv8i16 1048U, // VHADDuv8i8 1048U, // VHSUBsv16i8 1048U, // VHSUBsv2i32 1048U, // VHSUBsv4i16 1048U, // VHSUBsv4i32 1048U, // VHSUBsv8i16 1048U, // VHSUBsv8i8 1048U, // VHSUBuv16i8 1048U, // VHSUBuv2i32 1048U, // VHSUBuv4i16 1048U, // VHSUBuv4i32 1048U, // VHSUBuv8i16 1048U, // VHSUBuv8i8 67U, // VLD1DUPd16 211U, // VLD1DUPd16wb_fixed 4131U, // VLD1DUPd16wb_register 67U, // VLD1DUPd32 211U, // VLD1DUPd32wb_fixed 4131U, // VLD1DUPd32wb_register 67U, // VLD1DUPd8 211U, // VLD1DUPd8wb_fixed 4131U, // VLD1DUPd8wb_register 67U, // VLD1DUPq16 211U, // VLD1DUPq16wb_fixed 4131U, // VLD1DUPq16wb_register 67U, // VLD1DUPq32 211U, // VLD1DUPq32wb_fixed 4131U, // VLD1DUPq32wb_register 67U, // VLD1DUPq8 211U, // VLD1DUPq8wb_fixed 4131U, // VLD1DUPq8wb_register 299740U, // VLD1LNd16 316132U, // VLD1LNd16_UPD 299740U, // VLD1LNd32 316132U, // VLD1LNd32_UPD 299740U, // VLD1LNd8 316132U, // VLD1LNd8_UPD 1256U, // VLD1LNdAsm_16 1256U, // VLD1LNdAsm_32 1256U, // VLD1LNdAsm_8 5352U, // VLD1LNdWB_fixed_Asm_16 5352U, // VLD1LNdWB_fixed_Asm_32 5352U, // VLD1LNdWB_fixed_Asm_8 327912U, // VLD1LNdWB_register_Asm_16 327912U, // VLD1LNdWB_register_Asm_32 327912U, // VLD1LNdWB_register_Asm_8 0U, // VLD1LNq16Pseudo 0U, // VLD1LNq16Pseudo_UPD 0U, // VLD1LNq32Pseudo 0U, // VLD1LNq32Pseudo_UPD 0U, // VLD1LNq8Pseudo 0U, // VLD1LNq8Pseudo_UPD 67U, // VLD1d16 67U, // VLD1d16Q 211U, // VLD1d16Qwb_fixed 4131U, // VLD1d16Qwb_register 67U, // VLD1d16T 211U, // VLD1d16Twb_fixed 4131U, // VLD1d16Twb_register 211U, // VLD1d16wb_fixed 4131U, // VLD1d16wb_register 67U, // VLD1d32 67U, // VLD1d32Q 211U, // VLD1d32Qwb_fixed 4131U, // VLD1d32Qwb_register 67U, // VLD1d32T 211U, // VLD1d32Twb_fixed 4131U, // VLD1d32Twb_register 211U, // VLD1d32wb_fixed 4131U, // VLD1d32wb_register 67U, // VLD1d64 67U, // VLD1d64Q 0U, // VLD1d64QPseudo 0U, // VLD1d64QPseudoWB_fixed 0U, // VLD1d64QPseudoWB_register 211U, // VLD1d64Qwb_fixed 4131U, // VLD1d64Qwb_register 67U, // VLD1d64T 0U, // VLD1d64TPseudo 0U, // VLD1d64TPseudoWB_fixed 0U, // VLD1d64TPseudoWB_register 211U, // VLD1d64Twb_fixed 4131U, // VLD1d64Twb_register 211U, // VLD1d64wb_fixed 4131U, // VLD1d64wb_register 67U, // VLD1d8 67U, // VLD1d8Q 211U, // VLD1d8Qwb_fixed 4131U, // VLD1d8Qwb_register 67U, // VLD1d8T 211U, // VLD1d8Twb_fixed 4131U, // VLD1d8Twb_register 211U, // VLD1d8wb_fixed 4131U, // VLD1d8wb_register 67U, // VLD1q16 211U, // VLD1q16wb_fixed 4131U, // VLD1q16wb_register 67U, // VLD1q32 211U, // VLD1q32wb_fixed 4131U, // VLD1q32wb_register 67U, // VLD1q64 211U, // VLD1q64wb_fixed 4131U, // VLD1q64wb_register 67U, // VLD1q8 211U, // VLD1q8wb_fixed 4131U, // VLD1q8wb_register 67U, // VLD2DUPd16 211U, // VLD2DUPd16wb_fixed 4131U, // VLD2DUPd16wb_register 67U, // VLD2DUPd16x2 211U, // VLD2DUPd16x2wb_fixed 4131U, // VLD2DUPd16x2wb_register 67U, // VLD2DUPd32 211U, // VLD2DUPd32wb_fixed 4131U, // VLD2DUPd32wb_register 67U, // VLD2DUPd32x2 211U, // VLD2DUPd32x2wb_fixed 4131U, // VLD2DUPd32x2wb_register 67U, // VLD2DUPd8 211U, // VLD2DUPd8wb_fixed 4131U, // VLD2DUPd8wb_register 67U, // VLD2DUPd8x2 211U, // VLD2DUPd8x2wb_fixed 4131U, // VLD2DUPd8x2wb_register 349924U, // VLD2LNd16 0U, // VLD2LNd16Pseudo 0U, // VLD2LNd16Pseudo_UPD 366836U, // VLD2LNd16_UPD 349924U, // VLD2LNd32 0U, // VLD2LNd32Pseudo 0U, // VLD2LNd32Pseudo_UPD 366836U, // VLD2LNd32_UPD 349924U, // VLD2LNd8 0U, // VLD2LNd8Pseudo 0U, // VLD2LNd8Pseudo_UPD 366836U, // VLD2LNd8_UPD 1256U, // VLD2LNdAsm_16 1256U, // VLD2LNdAsm_32 1256U, // VLD2LNdAsm_8 5352U, // VLD2LNdWB_fixed_Asm_16 5352U, // VLD2LNdWB_fixed_Asm_32 5352U, // VLD2LNdWB_fixed_Asm_8 327912U, // VLD2LNdWB_register_Asm_16 327912U, // VLD2LNdWB_register_Asm_32 327912U, // VLD2LNdWB_register_Asm_8 349924U, // VLD2LNq16 0U, // VLD2LNq16Pseudo 0U, // VLD2LNq16Pseudo_UPD 366836U, // VLD2LNq16_UPD 349924U, // VLD2LNq32 0U, // VLD2LNq32Pseudo 0U, // VLD2LNq32Pseudo_UPD 366836U, // VLD2LNq32_UPD 1256U, // VLD2LNqAsm_16 1256U, // VLD2LNqAsm_32 5352U, // VLD2LNqWB_fixed_Asm_16 5352U, // VLD2LNqWB_fixed_Asm_32 327912U, // VLD2LNqWB_register_Asm_16 327912U, // VLD2LNqWB_register_Asm_32 67U, // VLD2b16 211U, // VLD2b16wb_fixed 4131U, // VLD2b16wb_register 67U, // VLD2b32 211U, // VLD2b32wb_fixed 4131U, // VLD2b32wb_register 67U, // VLD2b8 211U, // VLD2b8wb_fixed 4131U, // VLD2b8wb_register 67U, // VLD2d16 211U, // VLD2d16wb_fixed 4131U, // VLD2d16wb_register 67U, // VLD2d32 211U, // VLD2d32wb_fixed 4131U, // VLD2d32wb_register 67U, // VLD2d8 211U, // VLD2d8wb_fixed 4131U, // VLD2d8wb_register 67U, // VLD2q16 0U, // VLD2q16Pseudo 0U, // VLD2q16PseudoWB_fixed 0U, // VLD2q16PseudoWB_register 211U, // VLD2q16wb_fixed 4131U, // VLD2q16wb_register 67U, // VLD2q32 0U, // VLD2q32Pseudo 0U, // VLD2q32PseudoWB_fixed 0U, // VLD2q32PseudoWB_register 211U, // VLD2q32wb_fixed 4131U, // VLD2q32wb_register 67U, // VLD2q8 0U, // VLD2q8Pseudo 0U, // VLD2q8PseudoWB_fixed 0U, // VLD2q8PseudoWB_register 211U, // VLD2q8wb_fixed 4131U, // VLD2q8wb_register 6908U, // VLD3DUPd16 0U, // VLD3DUPd16Pseudo 0U, // VLD3DUPd16Pseudo_UPD 384252U, // VLD3DUPd16_UPD 6908U, // VLD3DUPd32 0U, // VLD3DUPd32Pseudo 0U, // VLD3DUPd32Pseudo_UPD 384252U, // VLD3DUPd32_UPD 6908U, // VLD3DUPd8 0U, // VLD3DUPd8Pseudo 0U, // VLD3DUPd8Pseudo_UPD 384252U, // VLD3DUPd8_UPD 0U, // VLD3DUPdAsm_16 0U, // VLD3DUPdAsm_32 0U, // VLD3DUPdAsm_8 4U, // VLD3DUPdWB_fixed_Asm_16 4U, // VLD3DUPdWB_fixed_Asm_32 4U, // VLD3DUPdWB_fixed_Asm_8 1192U, // VLD3DUPdWB_register_Asm_16 1192U, // VLD3DUPdWB_register_Asm_32 1192U, // VLD3DUPdWB_register_Asm_8 6908U, // VLD3DUPq16 384252U, // VLD3DUPq16_UPD 6908U, // VLD3DUPq32 384252U, // VLD3DUPq32_UPD 6908U, // VLD3DUPq8 384252U, // VLD3DUPq8_UPD 0U, // VLD3DUPqAsm_16 0U, // VLD3DUPqAsm_32 0U, // VLD3DUPqAsm_8 4U, // VLD3DUPqWB_fixed_Asm_16 4U, // VLD3DUPqWB_fixed_Asm_32 4U, // VLD3DUPqWB_fixed_Asm_8 1192U, // VLD3DUPqWB_register_Asm_16 1192U, // VLD3DUPqWB_register_Asm_32 1192U, // VLD3DUPqWB_register_Asm_8 399604U, // VLD3LNd16 0U, // VLD3LNd16Pseudo 0U, // VLD3LNd16Pseudo_UPD 414468U, // VLD3LNd16_UPD 399604U, // VLD3LNd32 0U, // VLD3LNd32Pseudo 0U, // VLD3LNd32Pseudo_UPD 414468U, // VLD3LNd32_UPD 399604U, // VLD3LNd8 0U, // VLD3LNd8Pseudo 0U, // VLD3LNd8Pseudo_UPD 414468U, // VLD3LNd8_UPD 1256U, // VLD3LNdAsm_16 1256U, // VLD3LNdAsm_32 1256U, // VLD3LNdAsm_8 5352U, // VLD3LNdWB_fixed_Asm_16 5352U, // VLD3LNdWB_fixed_Asm_32 5352U, // VLD3LNdWB_fixed_Asm_8 327912U, // VLD3LNdWB_register_Asm_16 327912U, // VLD3LNdWB_register_Asm_32 327912U, // VLD3LNdWB_register_Asm_8 399604U, // VLD3LNq16 0U, // VLD3LNq16Pseudo 0U, // VLD3LNq16Pseudo_UPD 414468U, // VLD3LNq16_UPD 399604U, // VLD3LNq32 0U, // VLD3LNq32Pseudo 0U, // VLD3LNq32Pseudo_UPD 414468U, // VLD3LNq32_UPD 1256U, // VLD3LNqAsm_16 1256U, // VLD3LNqAsm_32 5352U, // VLD3LNqWB_fixed_Asm_16 5352U, // VLD3LNqWB_fixed_Asm_32 327912U, // VLD3LNqWB_register_Asm_16 327912U, // VLD3LNqWB_register_Asm_32 58736640U, // VLD3d16 0U, // VLD3d16Pseudo 0U, // VLD3d16Pseudo_UPD 75513856U, // VLD3d16_UPD 58736640U, // VLD3d32 0U, // VLD3d32Pseudo 0U, // VLD3d32Pseudo_UPD 75513856U, // VLD3d32_UPD 58736640U, // VLD3d8 0U, // VLD3d8Pseudo 0U, // VLD3d8Pseudo_UPD 75513856U, // VLD3d8_UPD 67U, // VLD3dAsm_16 67U, // VLD3dAsm_32 67U, // VLD3dAsm_8 211U, // VLD3dWB_fixed_Asm_16 211U, // VLD3dWB_fixed_Asm_32 211U, // VLD3dWB_fixed_Asm_8 265763U, // VLD3dWB_register_Asm_16 265763U, // VLD3dWB_register_Asm_32 265763U, // VLD3dWB_register_Asm_8 58736640U, // VLD3q16 0U, // VLD3q16Pseudo_UPD 75513856U, // VLD3q16_UPD 0U, // VLD3q16oddPseudo 0U, // VLD3q16oddPseudo_UPD 58736640U, // VLD3q32 0U, // VLD3q32Pseudo_UPD 75513856U, // VLD3q32_UPD 0U, // VLD3q32oddPseudo 0U, // VLD3q32oddPseudo_UPD 58736640U, // VLD3q8 0U, // VLD3q8Pseudo_UPD 75513856U, // VLD3q8_UPD 0U, // VLD3q8oddPseudo 0U, // VLD3q8oddPseudo_UPD 0U, // VLD3qAsm_16 0U, // VLD3qAsm_32 0U, // VLD3qAsm_8 4U, // VLD3qWB_fixed_Asm_16 4U, // VLD3qWB_fixed_Asm_32 4U, // VLD3qWB_fixed_Asm_8 1192U, // VLD3qWB_register_Asm_16 1192U, // VLD3qWB_register_Asm_32 1192U, // VLD3qWB_register_Asm_8 269580U, // VLD4DUPd16 0U, // VLD4DUPd16Pseudo 0U, // VLD4DUPd16Pseudo_UPD 7948U, // VLD4DUPd16_UPD 269580U, // VLD4DUPd32 0U, // VLD4DUPd32Pseudo 0U, // VLD4DUPd32Pseudo_UPD 7948U, // VLD4DUPd32_UPD 269580U, // VLD4DUPd8 0U, // VLD4DUPd8Pseudo 0U, // VLD4DUPd8Pseudo_UPD 7948U, // VLD4DUPd8_UPD 0U, // VLD4DUPdAsm_16 0U, // VLD4DUPdAsm_32 0U, // VLD4DUPdAsm_8 4U, // VLD4DUPdWB_fixed_Asm_16 4U, // VLD4DUPdWB_fixed_Asm_32 4U, // VLD4DUPdWB_fixed_Asm_8 1192U, // VLD4DUPdWB_register_Asm_16 1192U, // VLD4DUPdWB_register_Asm_32 1192U, // VLD4DUPdWB_register_Asm_8 269580U, // VLD4DUPq16 7948U, // VLD4DUPq16_UPD 269580U, // VLD4DUPq32 7948U, // VLD4DUPq32_UPD 269580U, // VLD4DUPq8 7948U, // VLD4DUPq8_UPD 0U, // VLD4DUPqAsm_16 0U, // VLD4DUPqAsm_32 0U, // VLD4DUPqAsm_8 4U, // VLD4DUPqWB_fixed_Asm_16 4U, // VLD4DUPqWB_fixed_Asm_32 4U, // VLD4DUPqWB_fixed_Asm_8 1192U, // VLD4DUPqWB_register_Asm_16 1192U, // VLD4DUPqWB_register_Asm_32 1192U, // VLD4DUPqWB_register_Asm_8 93607684U, // VLD4LNd16 0U, // VLD4LNd16Pseudo 0U, // VLD4LNd16Pseudo_UPD 276U, // VLD4LNd16_UPD 93607684U, // VLD4LNd32 0U, // VLD4LNd32Pseudo 0U, // VLD4LNd32Pseudo_UPD 276U, // VLD4LNd32_UPD 93607684U, // VLD4LNd8 0U, // VLD4LNd8Pseudo 0U, // VLD4LNd8Pseudo_UPD 276U, // VLD4LNd8_UPD 1256U, // VLD4LNdAsm_16 1256U, // VLD4LNdAsm_32 1256U, // VLD4LNdAsm_8 5352U, // VLD4LNdWB_fixed_Asm_16 5352U, // VLD4LNdWB_fixed_Asm_32 5352U, // VLD4LNdWB_fixed_Asm_8 327912U, // VLD4LNdWB_register_Asm_16 327912U, // VLD4LNdWB_register_Asm_32 327912U, // VLD4LNdWB_register_Asm_8 93607684U, // VLD4LNq16 0U, // VLD4LNq16Pseudo 0U, // VLD4LNq16Pseudo_UPD 276U, // VLD4LNq16_UPD 93607684U, // VLD4LNq32 0U, // VLD4LNq32Pseudo 0U, // VLD4LNq32Pseudo_UPD 276U, // VLD4LNq32_UPD 1256U, // VLD4LNqAsm_16 1256U, // VLD4LNqAsm_32 5352U, // VLD4LNqWB_fixed_Asm_16 5352U, // VLD4LNqWB_fixed_Asm_32 327912U, // VLD4LNqWB_register_Asm_16 327912U, // VLD4LNqWB_register_Asm_32 286277632U, // VLD4d16 0U, // VLD4d16Pseudo 0U, // VLD4d16Pseudo_UPD 823148544U, // VLD4d16_UPD 286277632U, // VLD4d32 0U, // VLD4d32Pseudo 0U, // VLD4d32Pseudo_UPD 823148544U, // VLD4d32_UPD 286277632U, // VLD4d8 0U, // VLD4d8Pseudo 0U, // VLD4d8Pseudo_UPD 823148544U, // VLD4d8_UPD 67U, // VLD4dAsm_16 67U, // VLD4dAsm_32 67U, // VLD4dAsm_8 211U, // VLD4dWB_fixed_Asm_16 211U, // VLD4dWB_fixed_Asm_32 211U, // VLD4dWB_fixed_Asm_8 265763U, // VLD4dWB_register_Asm_16 265763U, // VLD4dWB_register_Asm_32 265763U, // VLD4dWB_register_Asm_8 286277632U, // VLD4q16 0U, // VLD4q16Pseudo_UPD 823148544U, // VLD4q16_UPD 0U, // VLD4q16oddPseudo 0U, // VLD4q16oddPseudo_UPD 286277632U, // VLD4q32 0U, // VLD4q32Pseudo_UPD 823148544U, // VLD4q32_UPD 0U, // VLD4q32oddPseudo 0U, // VLD4q32oddPseudo_UPD 286277632U, // VLD4q8 0U, // VLD4q8Pseudo_UPD 823148544U, // VLD4q8_UPD 0U, // VLD4q8oddPseudo 0U, // VLD4q8oddPseudo_UPD 0U, // VLD4qAsm_16 0U, // VLD4qAsm_32 0U, // VLD4qAsm_8 4U, // VLD4qWB_fixed_Asm_16 4U, // VLD4qWB_fixed_Asm_32 4U, // VLD4qWB_fixed_Asm_8 1192U, // VLD4qWB_register_Asm_16 1192U, // VLD4qWB_register_Asm_32 1192U, // VLD4qWB_register_Asm_8 65U, // VLDMDDB_UPD 1096U, // VLDMDIA 65U, // VLDMDIA_UPD 0U, // VLDMQIA 65U, // VLDMSDB_UPD 1096U, // VLDMSIA 65U, // VLDMSIA_UPD 280U, // VLDRD 280U, // VLDRS 1048U, // VMAXNMD 1048U, // VMAXNMND 1048U, // VMAXNMNQ 1048U, // VMAXNMS 263712U, // VMAXfd 263712U, // VMAXfq 1048U, // VMAXsv16i8 1048U, // VMAXsv2i32 1048U, // VMAXsv4i16 1048U, // VMAXsv4i32 1048U, // VMAXsv8i16 1048U, // VMAXsv8i8 1048U, // VMAXuv16i8 1048U, // VMAXuv2i32 1048U, // VMAXuv4i16 1048U, // VMAXuv4i32 1048U, // VMAXuv8i16 1048U, // VMAXuv8i8 1048U, // VMINNMD 1048U, // VMINNMND 1048U, // VMINNMNQ 1048U, // VMINNMS 263712U, // VMINfd 263712U, // VMINfq 1048U, // VMINsv16i8 1048U, // VMINsv2i32 1048U, // VMINsv4i16 1048U, // VMINsv4i32 1048U, // VMINsv8i16 1048U, // VMINsv8i8 1048U, // VMINuv16i8 1048U, // VMINuv2i32 1048U, // VMINuv4i16 1048U, // VMINuv4i32 1048U, // VMINuv8i16 1048U, // VMINuv8i8 265763U, // VMLAD 8360U, // VMLALslsv2i32 8360U, // VMLALslsv4i16 8360U, // VMLALsluv2i32 8360U, // VMLALsluv4i16 1192U, // VMLALsv2i64 1192U, // VMLALsv4i32 1192U, // VMLALsv8i16 1192U, // VMLALuv2i64 1192U, // VMLALuv4i32 1192U, // VMLALuv8i16 265763U, // VMLAS 265763U, // VMLAfd 265763U, // VMLAfq 429603U, // VMLAslfd 429603U, // VMLAslfq 8360U, // VMLAslv2i32 8360U, // VMLAslv4i16 8360U, // VMLAslv4i32 8360U, // VMLAslv8i16 1192U, // VMLAv16i8 1192U, // VMLAv2i32 1192U, // VMLAv4i16 1192U, // VMLAv4i32 1192U, // VMLAv8i16 1192U, // VMLAv8i8 265763U, // VMLSD 8360U, // VMLSLslsv2i32 8360U, // VMLSLslsv4i16 8360U, // VMLSLsluv2i32 8360U, // VMLSLsluv4i16 1192U, // VMLSLsv2i64 1192U, // VMLSLsv4i32 1192U, // VMLSLsv8i16 1192U, // VMLSLuv2i64 1192U, // VMLSLuv4i32 1192U, // VMLSLuv8i16 265763U, // VMLSS 265763U, // VMLSfd 265763U, // VMLSfq 429603U, // VMLSslfd 429603U, // VMLSslfq 8360U, // VMLSslv2i32 8360U, // VMLSslv4i16 8360U, // VMLSslv4i32 8360U, // VMLSslv8i16 1192U, // VMLSv16i8 1192U, // VMLSv2i32 1192U, // VMLSv4i16 1192U, // VMLSv4i32 1192U, // VMLSv8i16 1192U, // VMLSv8i8 64U, // VMOVD 0U, // VMOVD0 16384U, // VMOVDRR 0U, // VMOVDcc 0U, // VMOVLsv2i64 0U, // VMOVLsv4i32 0U, // VMOVLsv8i16 0U, // VMOVLuv2i64 0U, // VMOVLuv4i32 0U, // VMOVLuv8i16 0U, // VMOVNv2i32 0U, // VMOVNv4i16 0U, // VMOVNv8i8 0U, // VMOVQ0 16384U, // VMOVRRD 17842176U, // VMOVRRS 1024U, // VMOVRS 64U, // VMOVS 1024U, // VMOVSR 17842176U, // VMOVSRR 0U, // VMOVScc 0U, // VMOVv16i8 0U, // VMOVv1i64 0U, // VMOVv2f32 0U, // VMOVv2i32 0U, // VMOVv2i64 0U, // VMOVv4f32 0U, // VMOVv4i16 0U, // VMOVv4i32 0U, // VMOVv8i16 0U, // VMOVv8i8 4U, // VMRS 5U, // VMRS_FPEXC 5U, // VMRS_FPINST 5U, // VMRS_FPINST2 5U, // VMRS_FPSID 6U, // VMRS_MVFR0 6U, // VMRS_MVFR1 6U, // VMRS_MVFR2 0U, // VMSR 0U, // VMSR_FPEXC 0U, // VMSR_FPINST 0U, // VMSR_FPINST2 0U, // VMSR_FPSID 263712U, // VMULD 1048U, // VMULLp64 0U, // VMULLp8 8728U, // VMULLslsv2i32 8728U, // VMULLslsv4i16 8728U, // VMULLsluv2i32 8728U, // VMULLsluv4i16 1048U, // VMULLsv2i64 1048U, // VMULLsv4i32 1048U, // VMULLsv8i16 1048U, // VMULLuv2i64 1048U, // VMULLuv4i32 1048U, // VMULLuv8i16 263712U, // VMULS 263712U, // VMULfd 263712U, // VMULfq 0U, // VMULpd 0U, // VMULpq 443936U, // VMULslfd 443936U, // VMULslfq 8728U, // VMULslv2i32 8728U, // VMULslv4i16 8728U, // VMULslv4i32 8728U, // VMULslv8i16 1048U, // VMULv16i8 1048U, // VMULv2i32 1048U, // VMULv4i16 1048U, // VMULv4i32 1048U, // VMULv8i16 1048U, // VMULv8i8 1024U, // VMVNd 1024U, // VMVNq 0U, // VMVNv2i32 0U, // VMVNv4i16 0U, // VMVNv4i32 0U, // VMVNv8i16 64U, // VNEGD 64U, // VNEGS 64U, // VNEGf32q 64U, // VNEGfd 0U, // VNEGs16d 0U, // VNEGs16q 0U, // VNEGs32d 0U, // VNEGs32q 0U, // VNEGs8d 0U, // VNEGs8q 265763U, // VNMLAD 265763U, // VNMLAS 265763U, // VNMLSD 265763U, // VNMLSS 263712U, // VNMULD 263712U, // VNMULS 16384U, // VORNd 16384U, // VORNq 16384U, // VORRd 0U, // VORRiv2i32 0U, // VORRiv4i16 0U, // VORRiv4i32 0U, // VORRiv8i16 16384U, // VORRq 0U, // VPADALsv16i8 0U, // VPADALsv2i32 0U, // VPADALsv4i16 0U, // VPADALsv4i32 0U, // VPADALsv8i16 0U, // VPADALsv8i8 0U, // VPADALuv16i8 0U, // VPADALuv2i32 0U, // VPADALuv4i16 0U, // VPADALuv4i32 0U, // VPADALuv8i16 0U, // VPADALuv8i8 0U, // VPADDLsv16i8 0U, // VPADDLsv2i32 0U, // VPADDLsv4i16 0U, // VPADDLsv4i32 0U, // VPADDLsv8i16 0U, // VPADDLsv8i8 0U, // VPADDLuv16i8 0U, // VPADDLuv2i32 0U, // VPADDLuv4i16 0U, // VPADDLuv4i32 0U, // VPADDLuv8i16 0U, // VPADDLuv8i8 263712U, // VPADDf 1048U, // VPADDi16 1048U, // VPADDi32 1048U, // VPADDi8 263712U, // VPMAXf 1048U, // VPMAXs16 1048U, // VPMAXs32 1048U, // VPMAXs8 1048U, // VPMAXu16 1048U, // VPMAXu32 1048U, // VPMAXu8 263712U, // VPMINf 1048U, // VPMINs16 1048U, // VPMINs32 1048U, // VPMINs8 1048U, // VPMINu16 1048U, // VPMINu32 1048U, // VPMINu8 0U, // VQABSv16i8 0U, // VQABSv2i32 0U, // VQABSv4i16 0U, // VQABSv4i32 0U, // VQABSv8i16 0U, // VQABSv8i8 1048U, // VQADDsv16i8 1048U, // VQADDsv1i64 1048U, // VQADDsv2i32 1048U, // VQADDsv2i64 1048U, // VQADDsv4i16 1048U, // VQADDsv4i32 1048U, // VQADDsv8i16 1048U, // VQADDsv8i8 1048U, // VQADDuv16i8 1048U, // VQADDuv1i64 1048U, // VQADDuv2i32 1048U, // VQADDuv2i64 1048U, // VQADDuv4i16 1048U, // VQADDuv4i32 1048U, // VQADDuv8i16 1048U, // VQADDuv8i8 8360U, // VQDMLALslv2i32 8360U, // VQDMLALslv4i16 1192U, // VQDMLALv2i64 1192U, // VQDMLALv4i32 8360U, // VQDMLSLslv2i32 8360U, // VQDMLSLslv4i16 1192U, // VQDMLSLv2i64 1192U, // VQDMLSLv4i32 8728U, // VQDMULHslv2i32 8728U, // VQDMULHslv4i16 8728U, // VQDMULHslv4i32 8728U, // VQDMULHslv8i16 1048U, // VQDMULHv2i32 1048U, // VQDMULHv4i16 1048U, // VQDMULHv4i32 1048U, // VQDMULHv8i16 8728U, // VQDMULLslv2i32 8728U, // VQDMULLslv4i16 1048U, // VQDMULLv2i64 1048U, // VQDMULLv4i32 0U, // VQMOVNsuv2i32 0U, // VQMOVNsuv4i16 0U, // VQMOVNsuv8i8 0U, // VQMOVNsv2i32 0U, // VQMOVNsv4i16 0U, // VQMOVNsv8i8 0U, // VQMOVNuv2i32 0U, // VQMOVNuv4i16 0U, // VQMOVNuv8i8 0U, // VQNEGv16i8 0U, // VQNEGv2i32 0U, // VQNEGv4i16 0U, // VQNEGv4i32 0U, // VQNEGv8i16 0U, // VQNEGv8i8 8728U, // VQRDMULHslv2i32 8728U, // VQRDMULHslv4i16 8728U, // VQRDMULHslv4i32 8728U, // VQRDMULHslv8i16 1048U, // VQRDMULHv2i32 1048U, // VQRDMULHv4i16 1048U, // VQRDMULHv4i32 1048U, // VQRDMULHv8i16 1048U, // VQRSHLsv16i8 1048U, // VQRSHLsv1i64 1048U, // VQRSHLsv2i32 1048U, // VQRSHLsv2i64 1048U, // VQRSHLsv4i16 1048U, // VQRSHLsv4i32 1048U, // VQRSHLsv8i16 1048U, // VQRSHLsv8i8 1048U, // VQRSHLuv16i8 1048U, // VQRSHLuv1i64 1048U, // VQRSHLuv2i32 1048U, // VQRSHLuv2i64 1048U, // VQRSHLuv4i16 1048U, // VQRSHLuv4i32 1048U, // VQRSHLuv8i16 1048U, // VQRSHLuv8i8 1048U, // VQRSHRNsv2i32 1048U, // VQRSHRNsv4i16 1048U, // VQRSHRNsv8i8 1048U, // VQRSHRNuv2i32 1048U, // VQRSHRNuv4i16 1048U, // VQRSHRNuv8i8 1048U, // VQRSHRUNv2i32 1048U, // VQRSHRUNv4i16 1048U, // VQRSHRUNv8i8 1048U, // VQSHLsiv16i8 1048U, // VQSHLsiv1i64 1048U, // VQSHLsiv2i32 1048U, // VQSHLsiv2i64 1048U, // VQSHLsiv4i16 1048U, // VQSHLsiv4i32 1048U, // VQSHLsiv8i16 1048U, // VQSHLsiv8i8 1048U, // VQSHLsuv16i8 1048U, // VQSHLsuv1i64 1048U, // VQSHLsuv2i32 1048U, // VQSHLsuv2i64 1048U, // VQSHLsuv4i16 1048U, // VQSHLsuv4i32 1048U, // VQSHLsuv8i16 1048U, // VQSHLsuv8i8 1048U, // VQSHLsv16i8 1048U, // VQSHLsv1i64 1048U, // VQSHLsv2i32 1048U, // VQSHLsv2i64 1048U, // VQSHLsv4i16 1048U, // VQSHLsv4i32 1048U, // VQSHLsv8i16 1048U, // VQSHLsv8i8 1048U, // VQSHLuiv16i8 1048U, // VQSHLuiv1i64 1048U, // VQSHLuiv2i32 1048U, // VQSHLuiv2i64 1048U, // VQSHLuiv4i16 1048U, // VQSHLuiv4i32 1048U, // VQSHLuiv8i16 1048U, // VQSHLuiv8i8 1048U, // VQSHLuv16i8 1048U, // VQSHLuv1i64 1048U, // VQSHLuv2i32 1048U, // VQSHLuv2i64 1048U, // VQSHLuv4i16 1048U, // VQSHLuv4i32 1048U, // VQSHLuv8i16 1048U, // VQSHLuv8i8 1048U, // VQSHRNsv2i32 1048U, // VQSHRNsv4i16 1048U, // VQSHRNsv8i8 1048U, // VQSHRNuv2i32 1048U, // VQSHRNuv4i16 1048U, // VQSHRNuv8i8 1048U, // VQSHRUNv2i32 1048U, // VQSHRUNv4i16 1048U, // VQSHRUNv8i8 1048U, // VQSUBsv16i8 1048U, // VQSUBsv1i64 1048U, // VQSUBsv2i32 1048U, // VQSUBsv2i64 1048U, // VQSUBsv4i16 1048U, // VQSUBsv4i32 1048U, // VQSUBsv8i16 1048U, // VQSUBsv8i8 1048U, // VQSUBuv16i8 1048U, // VQSUBuv1i64 1048U, // VQSUBuv2i32 1048U, // VQSUBuv2i64 1048U, // VQSUBuv4i16 1048U, // VQSUBuv4i32 1048U, // VQSUBuv8i16 1048U, // VQSUBuv8i8 1048U, // VRADDHNv2i32 1048U, // VRADDHNv4i16 1048U, // VRADDHNv8i8 0U, // VRECPEd 64U, // VRECPEfd 64U, // VRECPEfq 0U, // VRECPEq 263712U, // VRECPSfd 263712U, // VRECPSfq 1024U, // VREV16d8 1024U, // VREV16q8 1024U, // VREV32d16 1024U, // VREV32d8 1024U, // VREV32q16 1024U, // VREV32q8 1024U, // VREV64d16 1024U, // VREV64d32 1024U, // VREV64d8 1024U, // VREV64q16 1024U, // VREV64q32 1024U, // VREV64q8 1048U, // VRHADDsv16i8 1048U, // VRHADDsv2i32 1048U, // VRHADDsv4i16 1048U, // VRHADDsv4i32 1048U, // VRHADDsv8i16 1048U, // VRHADDsv8i8 1048U, // VRHADDuv16i8 1048U, // VRHADDuv2i32 1048U, // VRHADDuv4i16 1048U, // VRHADDuv4i32 1048U, // VRHADDuv8i16 1048U, // VRHADDuv8i8 0U, // VRINTAD 0U, // VRINTAND 0U, // VRINTANQ 0U, // VRINTAS 0U, // VRINTMD 0U, // VRINTMND 0U, // VRINTMNQ 0U, // VRINTMS 0U, // VRINTND 0U, // VRINTNND 0U, // VRINTNNQ 0U, // VRINTNS 0U, // VRINTPD 0U, // VRINTPND 0U, // VRINTPNQ 0U, // VRINTPS 64U, // VRINTRD 64U, // VRINTRS 64U, // VRINTXD 0U, // VRINTXND 0U, // VRINTXNQ 64U, // VRINTXS 64U, // VRINTZD 0U, // VRINTZND 0U, // VRINTZNQ 64U, // VRINTZS 1048U, // VRSHLsv16i8 1048U, // VRSHLsv1i64 1048U, // VRSHLsv2i32 1048U, // VRSHLsv2i64 1048U, // VRSHLsv4i16 1048U, // VRSHLsv4i32 1048U, // VRSHLsv8i16 1048U, // VRSHLsv8i8 1048U, // VRSHLuv16i8 1048U, // VRSHLuv1i64 1048U, // VRSHLuv2i32 1048U, // VRSHLuv2i64 1048U, // VRSHLuv4i16 1048U, // VRSHLuv4i32 1048U, // VRSHLuv8i16 1048U, // VRSHLuv8i8 1048U, // VRSHRNv2i32 1048U, // VRSHRNv4i16 1048U, // VRSHRNv8i8 1048U, // VRSHRsv16i8 1048U, // VRSHRsv1i64 1048U, // VRSHRsv2i32 1048U, // VRSHRsv2i64 1048U, // VRSHRsv4i16 1048U, // VRSHRsv4i32 1048U, // VRSHRsv8i16 1048U, // VRSHRsv8i8 1048U, // VRSHRuv16i8 1048U, // VRSHRuv1i64 1048U, // VRSHRuv2i32 1048U, // VRSHRuv2i64 1048U, // VRSHRuv4i16 1048U, // VRSHRuv4i32 1048U, // VRSHRuv8i16 1048U, // VRSHRuv8i8 0U, // VRSQRTEd 64U, // VRSQRTEfd 64U, // VRSQRTEfq 0U, // VRSQRTEq 263712U, // VRSQRTSfd 263712U, // VRSQRTSfq 1192U, // VRSRAsv16i8 1192U, // VRSRAsv1i64 1192U, // VRSRAsv2i32 1192U, // VRSRAsv2i64 1192U, // VRSRAsv4i16 1192U, // VRSRAsv4i32 1192U, // VRSRAsv8i16 1192U, // VRSRAsv8i8 1192U, // VRSRAuv16i8 1192U, // VRSRAuv1i64 1192U, // VRSRAuv2i32 1192U, // VRSRAuv2i64 1192U, // VRSRAuv4i16 1192U, // VRSRAuv4i32 1192U, // VRSRAuv8i16 1192U, // VRSRAuv8i8 1048U, // VRSUBHNv2i32 1048U, // VRSUBHNv4i16 1048U, // VRSUBHNv8i8 1048U, // VSELEQD 1048U, // VSELEQS 1048U, // VSELGED 1048U, // VSELGES 1048U, // VSELGTD 1048U, // VSELGTS 1048U, // VSELVSD 1048U, // VSELVSS 6U, // VSETLNi16 6U, // VSETLNi32 6U, // VSETLNi8 1048U, // VSHLLi16 1048U, // VSHLLi32 1048U, // VSHLLi8 1048U, // VSHLLsv2i64 1048U, // VSHLLsv4i32 1048U, // VSHLLsv8i16 1048U, // VSHLLuv2i64 1048U, // VSHLLuv4i32 1048U, // VSHLLuv8i16 1048U, // VSHLiv16i8 1048U, // VSHLiv1i64 1048U, // VSHLiv2i32 1048U, // VSHLiv2i64 1048U, // VSHLiv4i16 1048U, // VSHLiv4i32 1048U, // VSHLiv8i16 1048U, // VSHLiv8i8 1048U, // VSHLsv16i8 1048U, // VSHLsv1i64 1048U, // VSHLsv2i32 1048U, // VSHLsv2i64 1048U, // VSHLsv4i16 1048U, // VSHLsv4i32 1048U, // VSHLsv8i16 1048U, // VSHLsv8i8 1048U, // VSHLuv16i8 1048U, // VSHLuv1i64 1048U, // VSHLuv2i32 1048U, // VSHLuv2i64 1048U, // VSHLuv4i16 1048U, // VSHLuv4i32 1048U, // VSHLuv8i16 1048U, // VSHLuv8i8 1048U, // VSHRNv2i32 1048U, // VSHRNv4i16 1048U, // VSHRNv8i8 1048U, // VSHRsv16i8 1048U, // VSHRsv1i64 1048U, // VSHRsv2i32 1048U, // VSHRsv2i64 1048U, // VSHRsv4i16 1048U, // VSHRsv4i32 1048U, // VSHRsv8i16 1048U, // VSHRsv8i8 1048U, // VSHRuv16i8 1048U, // VSHRuv1i64 1048U, // VSHRuv2i32 1048U, // VSHRuv2i64 1048U, // VSHRuv4i16 1048U, // VSHRuv4i32 1048U, // VSHRuv8i16 1048U, // VSHRuv8i8 0U, // VSHTOD 0U, // VSHTOS 0U, // VSITOD 0U, // VSITOS 278552U, // VSLIv16i8 278552U, // VSLIv1i64 278552U, // VSLIv2i32 278552U, // VSLIv2i64 278552U, // VSLIv4i16 278552U, // VSLIv4i32 278552U, // VSLIv8i16 278552U, // VSLIv8i8 7U, // VSLTOD 7U, // VSLTOS 64U, // VSQRTD 64U, // VSQRTS 1192U, // VSRAsv16i8 1192U, // VSRAsv1i64 1192U, // VSRAsv2i32 1192U, // VSRAsv2i64 1192U, // VSRAsv4i16 1192U, // VSRAsv4i32 1192U, // VSRAsv8i16 1192U, // VSRAsv8i8 1192U, // VSRAuv16i8 1192U, // VSRAuv1i64 1192U, // VSRAuv2i32 1192U, // VSRAuv2i64 1192U, // VSRAuv4i16 1192U, // VSRAuv4i32 1192U, // VSRAuv8i16 1192U, // VSRAuv8i8 278552U, // VSRIv16i8 278552U, // VSRIv1i64 278552U, // VSRIv2i32 278552U, // VSRIv2i64 278552U, // VSRIv4i16 278552U, // VSRIv4i32 278552U, // VSRIv8i16 278552U, // VSRIv8i8 292U, // VST1LNd16 10785580U, // VST1LNd16_UPD 292U, // VST1LNd32 10785580U, // VST1LNd32_UPD 292U, // VST1LNd8 10785580U, // VST1LNd8_UPD 1256U, // VST1LNdAsm_16 1256U, // VST1LNdAsm_32 1256U, // VST1LNdAsm_8 5352U, // VST1LNdWB_fixed_Asm_16 5352U, // VST1LNdWB_fixed_Asm_32 5352U, // VST1LNdWB_fixed_Asm_8 327912U, // VST1LNdWB_register_Asm_16 327912U, // VST1LNdWB_register_Asm_32 327912U, // VST1LNdWB_register_Asm_8 0U, // VST1LNq16Pseudo 0U, // VST1LNq16Pseudo_UPD 0U, // VST1LNq32Pseudo 0U, // VST1LNq32Pseudo_UPD 0U, // VST1LNq8Pseudo 0U, // VST1LNq8Pseudo_UPD 0U, // VST1d16 0U, // VST1d16Q 0U, // VST1d16Qwb_fixed 0U, // VST1d16Qwb_register 0U, // VST1d16T 0U, // VST1d16Twb_fixed 0U, // VST1d16Twb_register 0U, // VST1d16wb_fixed 0U, // VST1d16wb_register 0U, // VST1d32 0U, // VST1d32Q 0U, // VST1d32Qwb_fixed 0U, // VST1d32Qwb_register 0U, // VST1d32T 0U, // VST1d32Twb_fixed 0U, // VST1d32Twb_register 0U, // VST1d32wb_fixed 0U, // VST1d32wb_register 0U, // VST1d64 0U, // VST1d64Q 0U, // VST1d64QPseudo 0U, // VST1d64QPseudoWB_fixed 0U, // VST1d64QPseudoWB_register 0U, // VST1d64Qwb_fixed 0U, // VST1d64Qwb_register 0U, // VST1d64T 0U, // VST1d64TPseudo 0U, // VST1d64TPseudoWB_fixed 0U, // VST1d64TPseudoWB_register 0U, // VST1d64Twb_fixed 0U, // VST1d64Twb_register 0U, // VST1d64wb_fixed 0U, // VST1d64wb_register 0U, // VST1d8 0U, // VST1d8Q 0U, // VST1d8Qwb_fixed 0U, // VST1d8Qwb_register 0U, // VST1d8T 0U, // VST1d8Twb_fixed 0U, // VST1d8Twb_register 0U, // VST1d8wb_fixed 0U, // VST1d8wb_register 0U, // VST1q16 0U, // VST1q16wb_fixed 0U, // VST1q16wb_register 0U, // VST1q32 0U, // VST1q32wb_fixed 0U, // VST1q32wb_register 0U, // VST1q64 0U, // VST1q64wb_fixed 0U, // VST1q64wb_register 0U, // VST1q8 0U, // VST1q8wb_fixed 0U, // VST1q8wb_register 110384860U, // VST2LNd16 0U, // VST2LNd16Pseudo 0U, // VST2LNd16Pseudo_UPD 464612U, // VST2LNd16_UPD 110384860U, // VST2LNd32 0U, // VST2LNd32Pseudo 0U, // VST2LNd32Pseudo_UPD 464612U, // VST2LNd32_UPD 110384860U, // VST2LNd8 0U, // VST2LNd8Pseudo 0U, // VST2LNd8Pseudo_UPD 464612U, // VST2LNd8_UPD 1256U, // VST2LNdAsm_16 1256U, // VST2LNdAsm_32 1256U, // VST2LNdAsm_8 5352U, // VST2LNdWB_fixed_Asm_16 5352U, // VST2LNdWB_fixed_Asm_32 5352U, // VST2LNdWB_fixed_Asm_8 327912U, // VST2LNdWB_register_Asm_16 327912U, // VST2LNdWB_register_Asm_32 327912U, // VST2LNdWB_register_Asm_8 110384860U, // VST2LNq16 0U, // VST2LNq16Pseudo 0U, // VST2LNq16Pseudo_UPD 464612U, // VST2LNq16_UPD 110384860U, // VST2LNq32 0U, // VST2LNq32Pseudo 0U, // VST2LNq32Pseudo_UPD 464612U, // VST2LNq32_UPD 1256U, // VST2LNqAsm_16 1256U, // VST2LNqAsm_32 5352U, // VST2LNqWB_fixed_Asm_16 5352U, // VST2LNqWB_fixed_Asm_32 327912U, // VST2LNqWB_register_Asm_16 327912U, // VST2LNqWB_register_Asm_32 0U, // VST2b16 0U, // VST2b16wb_fixed 0U, // VST2b16wb_register 0U, // VST2b32 0U, // VST2b32wb_fixed 0U, // VST2b32wb_register 0U, // VST2b8 0U, // VST2b8wb_fixed 0U, // VST2b8wb_register 0U, // VST2d16 0U, // VST2d16wb_fixed 0U, // VST2d16wb_register 0U, // VST2d32 0U, // VST2d32wb_fixed 0U, // VST2d32wb_register 0U, // VST2d8 0U, // VST2d8wb_fixed 0U, // VST2d8wb_register 0U, // VST2q16 0U, // VST2q16Pseudo 0U, // VST2q16PseudoWB_fixed 0U, // VST2q16PseudoWB_register 0U, // VST2q16wb_fixed 0U, // VST2q16wb_register 0U, // VST2q32 0U, // VST2q32Pseudo 0U, // VST2q32PseudoWB_fixed 0U, // VST2q32PseudoWB_register 0U, // VST2q32wb_fixed 0U, // VST2q32wb_register 0U, // VST2q8 0U, // VST2q8Pseudo 0U, // VST2q8PseudoWB_fixed 0U, // VST2q8PseudoWB_register 0U, // VST2q8wb_fixed 0U, // VST2q8wb_register 127162156U, // VST3LNd16 0U, // VST3LNd16Pseudo 0U, // VST3LNd16Pseudo_UPD 308U, // VST3LNd16_UPD 127162156U, // VST3LNd32 0U, // VST3LNd32Pseudo 0U, // VST3LNd32Pseudo_UPD 308U, // VST3LNd32_UPD 127162156U, // VST3LNd8 0U, // VST3LNd8Pseudo 0U, // VST3LNd8Pseudo_UPD 308U, // VST3LNd8_UPD 1256U, // VST3LNdAsm_16 1256U, // VST3LNdAsm_32 1256U, // VST3LNdAsm_8 5352U, // VST3LNdWB_fixed_Asm_16 5352U, // VST3LNdWB_fixed_Asm_32 5352U, // VST3LNdWB_fixed_Asm_8 327912U, // VST3LNdWB_register_Asm_16 327912U, // VST3LNdWB_register_Asm_32 327912U, // VST3LNdWB_register_Asm_8 127162156U, // VST3LNq16 0U, // VST3LNq16Pseudo 0U, // VST3LNq16Pseudo_UPD 308U, // VST3LNq16_UPD 127162156U, // VST3LNq32 0U, // VST3LNq32Pseudo 0U, // VST3LNq32Pseudo_UPD 308U, // VST3LNq32_UPD 1256U, // VST3LNqAsm_16 1256U, // VST3LNqAsm_32 5352U, // VST3LNqWB_fixed_Asm_16 5352U, // VST3LNqWB_fixed_Asm_32 327912U, // VST3LNqWB_register_Asm_16 327912U, // VST3LNqWB_register_Asm_32 142934184U, // VST3d16 0U, // VST3d16Pseudo 0U, // VST3d16Pseudo_UPD 9528U, // VST3d16_UPD 142934184U, // VST3d32 0U, // VST3d32Pseudo 0U, // VST3d32Pseudo_UPD 9528U, // VST3d32_UPD 142934184U, // VST3d8 0U, // VST3d8Pseudo 0U, // VST3d8Pseudo_UPD 9528U, // VST3d8_UPD 67U, // VST3dAsm_16 67U, // VST3dAsm_32 67U, // VST3dAsm_8 211U, // VST3dWB_fixed_Asm_16 211U, // VST3dWB_fixed_Asm_32 211U, // VST3dWB_fixed_Asm_8 265763U, // VST3dWB_register_Asm_16 265763U, // VST3dWB_register_Asm_32 265763U, // VST3dWB_register_Asm_8 142934184U, // VST3q16 0U, // VST3q16Pseudo_UPD 9528U, // VST3q16_UPD 0U, // VST3q16oddPseudo 0U, // VST3q16oddPseudo_UPD 142934184U, // VST3q32 0U, // VST3q32Pseudo_UPD 9528U, // VST3q32_UPD 0U, // VST3q32oddPseudo 0U, // VST3q32oddPseudo_UPD 142934184U, // VST3q8 0U, // VST3q8Pseudo_UPD 9528U, // VST3q8_UPD 0U, // VST3q8oddPseudo 0U, // VST3q8oddPseudo_UPD 0U, // VST3qAsm_16 0U, // VST3qAsm_32 0U, // VST3qAsm_8 4U, // VST3qWB_fixed_Asm_16 4U, // VST3qWB_fixed_Asm_32 4U, // VST3qWB_fixed_Asm_8 1192U, // VST3qWB_register_Asm_16 1192U, // VST3qWB_register_Asm_32 1192U, // VST3qWB_register_Asm_8 160716516U, // VST4LNd16 0U, // VST4LNd16Pseudo 0U, // VST4LNd16Pseudo_UPD 9972U, // VST4LNd16_UPD 160716516U, // VST4LNd32 0U, // VST4LNd32Pseudo 0U, // VST4LNd32Pseudo_UPD 9972U, // VST4LNd32_UPD 160716516U, // VST4LNd8 0U, // VST4LNd8Pseudo 0U, // VST4LNd8Pseudo_UPD 9972U, // VST4LNd8_UPD 1256U, // VST4LNdAsm_16 1256U, // VST4LNdAsm_32 1256U, // VST4LNdAsm_8 5352U, // VST4LNdWB_fixed_Asm_16 5352U, // VST4LNdWB_fixed_Asm_32 5352U, // VST4LNdWB_fixed_Asm_8 327912U, // VST4LNdWB_register_Asm_16 327912U, // VST4LNdWB_register_Asm_32 327912U, // VST4LNdWB_register_Asm_8 160716516U, // VST4LNq16 0U, // VST4LNq16Pseudo 0U, // VST4LNq16Pseudo_UPD 9972U, // VST4LNq16_UPD 160716516U, // VST4LNq32 0U, // VST4LNq32Pseudo 0U, // VST4LNq32Pseudo_UPD 9972U, // VST4LNq32_UPD 1256U, // VST4LNqAsm_16 1256U, // VST4LNqAsm_32 5352U, // VST4LNqWB_fixed_Asm_16 5352U, // VST4LNqWB_fixed_Asm_32 327912U, // VST4LNqWB_register_Asm_16 327912U, // VST4LNqWB_register_Asm_32 169148584U, // VST4d16 0U, // VST4d16Pseudo 0U, // VST4d16Pseudo_UPD 475448U, // VST4d16_UPD 169148584U, // VST4d32 0U, // VST4d32Pseudo 0U, // VST4d32Pseudo_UPD 475448U, // VST4d32_UPD 169148584U, // VST4d8 0U, // VST4d8Pseudo 0U, // VST4d8Pseudo_UPD 475448U, // VST4d8_UPD 67U, // VST4dAsm_16 67U, // VST4dAsm_32 67U, // VST4dAsm_8 211U, // VST4dWB_fixed_Asm_16 211U, // VST4dWB_fixed_Asm_32 211U, // VST4dWB_fixed_Asm_8 265763U, // VST4dWB_register_Asm_16 265763U, // VST4dWB_register_Asm_32 265763U, // VST4dWB_register_Asm_8 169148584U, // VST4q16 0U, // VST4q16Pseudo_UPD 475448U, // VST4q16_UPD 0U, // VST4q16oddPseudo 0U, // VST4q16oddPseudo_UPD 169148584U, // VST4q32 0U, // VST4q32Pseudo_UPD 475448U, // VST4q32_UPD 0U, // VST4q32oddPseudo 0U, // VST4q32oddPseudo_UPD 169148584U, // VST4q8 0U, // VST4q8Pseudo_UPD 475448U, // VST4q8_UPD 0U, // VST4q8oddPseudo 0U, // VST4q8oddPseudo_UPD 0U, // VST4qAsm_16 0U, // VST4qAsm_32 0U, // VST4qAsm_8 4U, // VST4qWB_fixed_Asm_16 4U, // VST4qWB_fixed_Asm_32 4U, // VST4qWB_fixed_Asm_8 1192U, // VST4qWB_register_Asm_16 1192U, // VST4qWB_register_Asm_32 1192U, // VST4qWB_register_Asm_8 65U, // VSTMDDB_UPD 1096U, // VSTMDIA 65U, // VSTMDIA_UPD 0U, // VSTMQIA 65U, // VSTMSDB_UPD 1096U, // VSTMSIA 65U, // VSTMSIA_UPD 280U, // VSTRD 280U, // VSTRS 263712U, // VSUBD 1048U, // VSUBHNv2i32 1048U, // VSUBHNv4i16 1048U, // VSUBHNv8i8 1048U, // VSUBLsv2i64 1048U, // VSUBLsv4i32 1048U, // VSUBLsv8i16 1048U, // VSUBLuv2i64 1048U, // VSUBLuv4i32 1048U, // VSUBLuv8i16 263712U, // VSUBS 1048U, // VSUBWsv2i64 1048U, // VSUBWsv4i32 1048U, // VSUBWsv8i16 1048U, // VSUBWuv2i64 1048U, // VSUBWuv4i32 1048U, // VSUBWuv8i16 263712U, // VSUBfd 263712U, // VSUBfq 1048U, // VSUBv16i8 1048U, // VSUBv1i64 1048U, // VSUBv2i32 1048U, // VSUBv2i64 1048U, // VSUBv4i16 1048U, // VSUBv4i32 1048U, // VSUBv8i16 1048U, // VSUBv8i8 1024U, // VSWPd 1024U, // VSWPq 320U, // VTBL1 328U, // VTBL2 336U, // VTBL3 0U, // VTBL3Pseudo 344U, // VTBL4 0U, // VTBL4Pseudo 352U, // VTBX1 360U, // VTBX2 368U, // VTBX3 0U, // VTBX3Pseudo 376U, // VTBX4 0U, // VTBX4Pseudo 0U, // VTOSHD 0U, // VTOSHS 0U, // VTOSIRD 0U, // VTOSIRS 0U, // VTOSIZD 0U, // VTOSIZS 7U, // VTOSLD 7U, // VTOSLS 0U, // VTOUHD 0U, // VTOUHS 0U, // VTOUIRD 0U, // VTOUIRS 0U, // VTOUIZD 0U, // VTOUIZS 7U, // VTOULD 7U, // VTOULS 1024U, // VTRNd16 1024U, // VTRNd32 1024U, // VTRNd8 1024U, // VTRNq16 1024U, // VTRNq32 1024U, // VTRNq8 16384U, // VTSTv16i8 16384U, // VTSTv2i32 16384U, // VTSTv4i16 16384U, // VTSTv4i32 16384U, // VTSTv8i16 16384U, // VTSTv8i8 0U, // VUHTOD 0U, // VUHTOS 0U, // VUITOD 0U, // VUITOS 7U, // VULTOD 7U, // VULTOS 1024U, // VUZPd16 1024U, // VUZPd8 1024U, // VUZPq16 1024U, // VUZPq32 1024U, // VUZPq8 1024U, // VZIPd16 1024U, // VZIPd8 1024U, // VZIPq16 1024U, // VZIPq32 1024U, // VZIPq8 0U, // WIN__CHKSTK 10312U, // sysLDMDA 385U, // sysLDMDA_UPD 10312U, // sysLDMDB 385U, // sysLDMDB_UPD 10312U, // sysLDMIA 385U, // sysLDMIA_UPD 10312U, // sysLDMIB 385U, // sysLDMIB_UPD 10312U, // sysSTMDA 385U, // sysSTMDA_UPD 10312U, // sysSTMDB 385U, // sysSTMDB_UPD 10312U, // sysSTMIA 385U, // sysSTMIA_UPD 10312U, // sysSTMIB 385U, // sysSTMIB_UPD 0U, // t2ABS 16384U, // t2ADCri 16384U, // t2ADCrr 491520U, // t2ADCrs 0U, // t2ADDSri 0U, // t2ADDSrr 0U, // t2ADDSrs 16384U, // t2ADDri 16384U, // t2ADDri12 16384U, // t2ADDrr 491520U, // t2ADDrs 8U, // t2ADR 16384U, // t2ANDri 16384U, // t2ANDrr 491520U, // t2ANDrs 507904U, // t2ASRri 16384U, // t2ASRrr 0U, // t2B 16U, // t2BFC 49176U, // t2BFI 16384U, // t2BICri 16384U, // t2BICrr 491520U, // t2BICrs 0U, // t2BR_JT 0U, // t2BXJ 0U, // t2Bcc 544U, // t2CDP 544U, // t2CDP2 0U, // t2CLREX 1024U, // t2CLZ 1024U, // t2CMNri 1024U, // t2CMNzrr 392U, // t2CMNzrs 1024U, // t2CMPri 1024U, // t2CMPrr 392U, // t2CMPrs 0U, // t2CPS1p 0U, // t2CPS2p 1048U, // t2CPS3p 1048U, // t2CRC32B 1048U, // t2CRC32CB 1048U, // t2CRC32CH 1048U, // t2CRC32CW 1048U, // t2CRC32H 1048U, // t2CRC32W 0U, // t2DBG 0U, // t2DCPS1 0U, // t2DCPS2 0U, // t2DCPS3 0U, // t2DMB 0U, // t2DSB 16384U, // t2EORri 16384U, // t2EORrr 491520U, // t2EORrs 0U, // t2HINT 0U, // t2HVC 0U, // t2ISB 0U, // t2IT 0U, // t2Int_eh_sjlj_setjmp 0U, // t2Int_eh_sjlj_setjmp_nofp 80U, // t2LDA 80U, // t2LDAB 80U, // t2LDAEX 80U, // t2LDAEXB 245760U, // t2LDAEXD 80U, // t2LDAEXH 80U, // t2LDAH 89U, // t2LDC2L_OFFSET 65633U, // t2LDC2L_OPTION 82017U, // t2LDC2L_POST 105U, // t2LDC2L_PRE 89U, // t2LDC2_OFFSET 65633U, // t2LDC2_OPTION 82017U, // t2LDC2_POST 105U, // t2LDC2_PRE 89U, // t2LDCL_OFFSET 65633U, // t2LDCL_OPTION 82017U, // t2LDCL_POST 105U, // t2LDCL_PRE 89U, // t2LDC_OFFSET 65633U, // t2LDC_OPTION 82017U, // t2LDC_POST 105U, // t2LDC_PRE 1096U, // t2LDMDB 65U, // t2LDMDB_UPD 1096U, // t2LDMIA 0U, // t2LDMIA_RET 65U, // t2LDMIA_UPD 400U, // t2LDRBT 10848U, // t2LDRB_POST 408U, // t2LDRB_PRE 128U, // t2LDRBi12 400U, // t2LDRBi8 416U, // t2LDRBpci 1024U, // t2LDRBpcrel 424U, // t2LDRBs 11665408U, // t2LDRD_POST 524288U, // t2LDRD_PRE 540672U, // t2LDRDi8 432U, // t2LDREX 80U, // t2LDREXB 245760U, // t2LDREXD 80U, // t2LDREXH 400U, // t2LDRHT 10848U, // t2LDRH_POST 408U, // t2LDRH_PRE 128U, // t2LDRHi12 400U, // t2LDRHi8 416U, // t2LDRHpci 1024U, // t2LDRHpcrel 424U, // t2LDRHs 400U, // t2LDRSBT 10848U, // t2LDRSB_POST 408U, // t2LDRSB_PRE 128U, // t2LDRSBi12 400U, // t2LDRSBi8 416U, // t2LDRSBpci 1024U, // t2LDRSBpcrel 424U, // t2LDRSBs 400U, // t2LDRSHT 10848U, // t2LDRSH_POST 408U, // t2LDRSH_PRE 128U, // t2LDRSHi12 400U, // t2LDRSHi8 416U, // t2LDRSHpci 1024U, // t2LDRSHpcrel 424U, // t2LDRSHs 400U, // t2LDRT 10848U, // t2LDR_POST 408U, // t2LDR_PRE 128U, // t2LDRi12 400U, // t2LDRi8 416U, // t2LDRpci 0U, // t2LDRpci_pic 1024U, // t2LDRpcrel 424U, // t2LDRs 0U, // t2LEApcrel 0U, // t2LEApcrelJT 16384U, // t2LSLri 16384U, // t2LSLrr 507904U, // t2LSRri 16384U, // t2LSRrr 2311712U, // t2MCR 2311712U, // t2MCR2 3360288U, // t2MCRR 3360288U, // t2MCRR2 17842176U, // t2MLA 17842176U, // t2MLS 0U, // t2MOVCCasr 0U, // t2MOVCCi 0U, // t2MOVCCi16 0U, // t2MOVCCi32imm 0U, // t2MOVCClsl 0U, // t2MOVCClsr 0U, // t2MOVCCr 0U, // t2MOVCCror 392U, // t2MOVSsi 56U, // t2MOVSsr 1048U, // t2MOVTi16 0U, // t2MOVTi16_ga_pcrel 0U, // t2MOV_ga_pcrel 1024U, // t2MOVi 1024U, // t2MOVi16 0U, // t2MOVi16_ga_pcrel 0U, // t2MOVi32imm 1024U, // t2MOVr 392U, // t2MOVsi 56U, // t2MOVsr 11264U, // t2MOVsra_flag 11264U, // t2MOVsrl_flag 0U, // t2MRC 0U, // t2MRC2 3360288U, // t2MRRC 3360288U, // t2MRRC2 2U, // t2MRS_AR 440U, // t2MRS_M 176U, // t2MRSbanked 2U, // t2MRSsys_AR 64U, // t2MSR_AR 64U, // t2MSR_M 0U, // t2MSRbanked 16384U, // t2MUL 0U, // t2MVNCCi 1024U, // t2MVNi 1024U, // t2MVNr 392U, // t2MVNs 16384U, // t2ORNri 16384U, // t2ORNrr 491520U, // t2ORNrs 16384U, // t2ORRri 16384U, // t2ORRrr 491520U, // t2ORRrs 4210688U, // t2PKHBT 5259264U, // t2PKHTB 0U, // t2PLDWi12 0U, // t2PLDWi8 0U, // t2PLDWs 0U, // t2PLDi12 0U, // t2PLDi8 0U, // t2PLDpci 0U, // t2PLDs 0U, // t2PLIi12 0U, // t2PLIi8 0U, // t2PLIpci 0U, // t2PLIs 16384U, // t2QADD 16384U, // t2QADD16 16384U, // t2QADD8 16384U, // t2QASX 16384U, // t2QDADD 16384U, // t2QDSUB 16384U, // t2QSAX 16384U, // t2QSUB 16384U, // t2QSUB16 16384U, // t2QSUB8 1024U, // t2RBIT 1024U, // t2REV 1024U, // t2REV16 1024U, // t2REVSH 0U, // t2RFEDB 4U, // t2RFEDBW 0U, // t2RFEIA 4U, // t2RFEIAW 16384U, // t2RORri 16384U, // t2RORrr 1024U, // t2RRX 0U, // t2RSBSri 0U, // t2RSBSrs 16384U, // t2RSBri 16384U, // t2RSBrr 491520U, // t2RSBrs 16384U, // t2SADD16 16384U, // t2SADD8 16384U, // t2SASX 16384U, // t2SBCri 16384U, // t2SBCrr 491520U, // t2SBCrs 34619392U, // t2SBFX 16384U, // t2SDIV 16384U, // t2SEL 16384U, // t2SHADD16 16384U, // t2SHADD8 16384U, // t2SHASX 16384U, // t2SHSAX 16384U, // t2SHSUB16 16384U, // t2SHSUB8 0U, // t2SMC 17842176U, // t2SMLABB 17842176U, // t2SMLABT 17842176U, // t2SMLAD 17842176U, // t2SMLADX 17842176U, // t2SMLAL 17842176U, // t2SMLALBB 17842176U, // t2SMLALBT 17842176U, // t2SMLALD 17842176U, // t2SMLALDX 17842176U, // t2SMLALTB 17842176U, // t2SMLALTT 17842176U, // t2SMLATB 17842176U, // t2SMLATT 17842176U, // t2SMLAWB 17842176U, // t2SMLAWT 17842176U, // t2SMLSD 17842176U, // t2SMLSDX 17842176U, // t2SMLSLD 185876480U, // t2SMLSLDX 17842176U, // t2SMMLA 17842176U, // t2SMMLAR 17842176U, // t2SMMLS 17842176U, // t2SMMLSR 16384U, // t2SMMUL 16384U, // t2SMMULR 16384U, // t2SMUAD 16384U, // t2SMUADX 16384U, // t2SMULBB 16384U, // t2SMULBT 17842176U, // t2SMULL 16384U, // t2SMULTB 16384U, // t2SMULTT 16384U, // t2SMULWB 16384U, // t2SMULWT 16384U, // t2SMUSD 16384U, // t2SMUSDX 0U, // t2SRSDB 0U, // t2SRSDB_UPD 0U, // t2SRSIA 0U, // t2SRSIA_UPD 2232U, // t2SSAT 1208U, // t2SSAT16 16384U, // t2SSAX 16384U, // t2SSUB16 16384U, // t2SSUB8 89U, // t2STC2L_OFFSET 65633U, // t2STC2L_OPTION 82017U, // t2STC2L_POST 105U, // t2STC2L_PRE 89U, // t2STC2_OFFSET 65633U, // t2STC2_OPTION 82017U, // t2STC2_POST 105U, // t2STC2_PRE 89U, // t2STCL_OFFSET 65633U, // t2STCL_OPTION 82017U, // t2STCL_POST 105U, // t2STCL_PRE 89U, // t2STC_OFFSET 65633U, // t2STC_OPTION 82017U, // t2STC_POST 105U, // t2STC_PRE 80U, // t2STL 80U, // t2STLB 245760U, // t2STLEX 245760U, // t2STLEXB 202391552U, // t2STLEXD 245760U, // t2STLEXH 80U, // t2STLH 1096U, // t2STMDB 65U, // t2STMDB_UPD 1096U, // t2STMIA 65U, // t2STMIA_UPD 400U, // t2STRBT 10848U, // t2STRB_POST 408U, // t2STRB_PRE 0U, // t2STRB_preidx 128U, // t2STRBi12 400U, // t2STRBi8 424U, // t2STRBs 11665432U, // t2STRD_POST 524312U, // t2STRD_PRE 540672U, // t2STRDi8 557056U, // t2STREX 245760U, // t2STREXB 202391552U, // t2STREXD 245760U, // t2STREXH 400U, // t2STRHT 10848U, // t2STRH_POST 408U, // t2STRH_PRE 0U, // t2STRH_preidx 128U, // t2STRHi12 400U, // t2STRHi8 424U, // t2STRHs 400U, // t2STRT 10848U, // t2STR_POST 408U, // t2STR_PRE 0U, // t2STR_preidx 128U, // t2STRi12 400U, // t2STRi8 424U, // t2STRs 0U, // t2SUBS_PC_LR 0U, // t2SUBSri 0U, // t2SUBSrr 0U, // t2SUBSrs 16384U, // t2SUBri 16384U, // t2SUBri12 16384U, // t2SUBrr 491520U, // t2SUBrs 6307840U, // t2SXTAB 6307840U, // t2SXTAB16 6307840U, // t2SXTAH 2560U, // t2SXTB 2560U, // t2SXTB16 2560U, // t2SXTH 0U, // t2TBB 0U, // t2TBB_JT 0U, // t2TBH 0U, // t2TBH_JT 1024U, // t2TEQri 1024U, // t2TEQrr 392U, // t2TEQrs 1024U, // t2TSTri 1024U, // t2TSTrr 392U, // t2TSTrs 16384U, // t2UADD16 16384U, // t2UADD8 16384U, // t2UASX 34619392U, // t2UBFX 0U, // t2UDF 16384U, // t2UDIV 16384U, // t2UHADD16 16384U, // t2UHADD8 16384U, // t2UHASX 16384U, // t2UHSAX 16384U, // t2UHSUB16 16384U, // t2UHSUB8 17842176U, // t2UMAAL 17842176U, // t2UMLAL 17842176U, // t2UMULL 16384U, // t2UQADD16 16384U, // t2UQADD8 16384U, // t2UQASX 16384U, // t2UQSAX 16384U, // t2UQSUB16 16384U, // t2UQSUB8 16384U, // t2USAD8 17842176U, // t2USADA8 7356416U, // t2USAT 16384U, // t2USAT16 16384U, // t2USAX 16384U, // t2USUB16 16384U, // t2USUB8 6307840U, // t2UXTAB 6307840U, // t2UXTAB16 6307840U, // t2UXTAH 2560U, // t2UXTB 2560U, // t2UXTB16 2560U, // t2UXTH 0U, // tADC 0U, // tADDframe 1048U, // tADDhirr 1192U, // tADDi3 0U, // tADDi8 16384U, // tADDrSP 573440U, // tADDrSPi 1192U, // tADDrr 448U, // tADDspi 1048U, // tADDspr 0U, // tADJCALLSTACKDOWN 0U, // tADJCALLSTACKUP 456U, // tADR 0U, // tAND 464U, // tASRri 0U, // tASRrr 0U, // tB 0U, // tBIC 0U, // tBKPT 0U, // tBL 0U, // tBLXi 0U, // tBLXr 0U, // tBRIND 0U, // tBR_JTr 0U, // tBX 0U, // tBX_CALL 0U, // tBX_RET 0U, // tBX_RET_vararg 0U, // tBcc 0U, // tBfar 0U, // tCBNZ 0U, // tCBZ 1024U, // tCMNz 1024U, // tCMPhir 1024U, // tCMPi8 1024U, // tCMPr 0U, // tCPS 0U, // tEOR 0U, // tHINT 0U, // tHLT 0U, // tInt_eh_sjlj_longjmp 0U, // tInt_eh_sjlj_setjmp 1096U, // tLDMIA 0U, // tLDMIA_UPD 472U, // tLDRBi 480U, // tLDRBr 488U, // tLDRHi 480U, // tLDRHr 0U, // tLDRLIT_ga_abs 0U, // tLDRLIT_ga_pcrel 480U, // tLDRSB 480U, // tLDRSH 496U, // tLDRi 416U, // tLDRpci 0U, // tLDRpci_pic 480U, // tLDRr 504U, // tLDRspi 0U, // tLEApcrel 0U, // tLEApcrelJT 1192U, // tLSLri 0U, // tLSLrr 464U, // tLSRri 0U, // tLSRrr 0U, // tMOVCCr_pseudo 0U, // tMOVSr 0U, // tMOVi8 1024U, // tMOVr 1192U, // tMUL 0U, // tMVN 0U, // tORR 0U, // tPICADD 0U, // tPOP 0U, // tPOP_RET 0U, // tPUSH 1024U, // tREV 1024U, // tREV16 1024U, // tREVSH 0U, // tROR 0U, // tRSB 0U, // tSBC 0U, // tSETEND 65U, // tSTMIA_UPD 472U, // tSTRBi 480U, // tSTRBr 488U, // tSTRHi 480U, // tSTRHr 496U, // tSTRi 480U, // tSTRr 504U, // tSTRspi 1192U, // tSUBi3 0U, // tSUBi8 1192U, // tSUBrr 448U, // tSUBspi 0U, // tSVC 1024U, // tSXTB 1024U, // tSXTH 0U, // tTAILJMPd 0U, // tTAILJMPdND 0U, // tTAILJMPr 0U, // tTPsoft 0U, // tTRAP 1024U, // tTST 0U, // tUDF 1024U, // tUXTB 1024U, // tUXTH 0U }; #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 's', 'h', 'a', '1', 's', 'u', '0', '.', '3', '2', 9, 0, /* 12 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '0', '.', '3', '2', 9, 0, /* 26 */ 's', 'h', 'a', '1', 's', 'u', '1', '.', '3', '2', 9, 0, /* 38 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '1', '.', '3', '2', 9, 0, /* 52 */ 's', 'h', 'a', '2', '5', '6', 'h', '2', '.', '3', '2', 9, 0, /* 65 */ 's', 'h', 'a', '1', 'c', '.', '3', '2', 9, 0, /* 75 */ 's', 'h', 'a', '1', 'h', '.', '3', '2', 9, 0, /* 85 */ 's', 'h', 'a', '2', '5', '6', 'h', '.', '3', '2', 9, 0, /* 97 */ 's', 'h', 'a', '1', 'm', '.', '3', '2', 9, 0, /* 107 */ 's', 'h', 'a', '1', 'p', '.', '3', '2', 9, 0, /* 117 */ 'v', 'c', 'v', 't', 'a', '.', 's', '3', '2', '.', 'f', '3', '2', 9, 0, /* 132 */ 'v', 'c', 'v', 't', 'm', '.', 's', '3', '2', '.', 'f', '3', '2', 9, 0, /* 147 */ 'v', 'c', 'v', 't', 'n', '.', 's', '3', '2', '.', 'f', '3', '2', 9, 0, /* 162 */ 'v', 'c', 'v', 't', 'p', '.', 's', '3', '2', '.', 'f', '3', '2', 9, 0, /* 177 */ 'v', 'c', 'v', 't', 'a', '.', 'u', '3', '2', '.', 'f', '3', '2', 9, 0, /* 192 */ 'v', 'c', 'v', 't', 'm', '.', 'u', '3', '2', '.', 'f', '3', '2', 9, 0, /* 207 */ 'v', 'c', 'v', 't', 'n', '.', 'u', '3', '2', '.', 'f', '3', '2', 9, 0, /* 222 */ 'v', 'c', 'v', 't', 'p', '.', 'u', '3', '2', '.', 'f', '3', '2', 9, 0, /* 237 */ 'v', 'r', 'i', 'n', 't', 'a', '.', 'f', '3', '2', 9, 0, /* 249 */ 'v', 's', 'e', 'l', 'g', 'e', '.', 'f', '3', '2', 9, 0, /* 261 */ 'v', 'm', 'i', 'n', 'n', 'm', '.', 'f', '3', '2', 9, 0, /* 273 */ 'v', 'm', 'a', 'x', 'n', 'm', '.', 'f', '3', '2', 9, 0, /* 285 */ 'v', 'r', 'i', 'n', 't', 'm', '.', 'f', '3', '2', 9, 0, /* 297 */ 'v', 'r', 'i', 'n', 't', 'n', '.', 'f', '3', '2', 9, 0, /* 309 */ 'v', 'r', 'i', 'n', 't', 'p', '.', 'f', '3', '2', 9, 0, /* 321 */ 'v', 's', 'e', 'l', 'e', 'q', '.', 'f', '3', '2', 9, 0, /* 333 */ 'v', 's', 'e', 'l', 'v', 's', '.', 'f', '3', '2', 9, 0, /* 345 */ 'v', 's', 'e', 'l', 'g', 't', '.', 'f', '3', '2', 9, 0, /* 357 */ 'v', 'r', 'i', 'n', 't', 'x', '.', 'f', '3', '2', 9, 0, /* 369 */ 'v', 'r', 'i', 'n', 't', 'z', '.', 'f', '3', '2', 9, 0, /* 381 */ 'l', 'd', 'c', '2', 9, 0, /* 387 */ 'm', 'r', 'c', '2', 9, 0, /* 393 */ 'm', 'r', 'r', 'c', '2', 9, 0, /* 400 */ 's', 't', 'c', '2', 9, 0, /* 406 */ 'c', 'd', 'p', '2', 9, 0, /* 412 */ 'm', 'c', 'r', '2', 9, 0, /* 418 */ 'm', 'c', 'r', 'r', '2', 9, 0, /* 425 */ 'v', 'c', 'v', 't', 'a', '.', 's', '3', '2', '.', 'f', '6', '4', 9, 0, /* 440 */ 'v', 'c', 'v', 't', 'm', '.', 's', '3', '2', '.', 'f', '6', '4', 9, 0, /* 455 */ 'v', 'c', 'v', 't', 'n', '.', 's', '3', '2', '.', 'f', '6', '4', 9, 0, /* 470 */ 'v', 'c', 'v', 't', 'p', '.', 's', '3', '2', '.', 'f', '6', '4', 9, 0, /* 485 */ 'v', 'c', 'v', 't', 'a', '.', 'u', '3', '2', '.', 'f', '6', '4', 9, 0, /* 500 */ 'v', 'c', 'v', 't', 'm', '.', 'u', '3', '2', '.', 'f', '6', '4', 9, 0, /* 515 */ 'v', 'c', 'v', 't', 'n', '.', 'u', '3', '2', '.', 'f', '6', '4', 9, 0, /* 530 */ 'v', 'c', 'v', 't', 'p', '.', 'u', '3', '2', '.', 'f', '6', '4', 9, 0, /* 545 */ 'v', 'r', 'i', 'n', 't', 'a', '.', 'f', '6', '4', 9, 0, /* 557 */ 'v', 's', 'e', 'l', 'g', 'e', '.', 'f', '6', '4', 9, 0, /* 569 */ 'v', 'm', 'i', 'n', 'n', 'm', '.', 'f', '6', '4', 9, 0, /* 581 */ 'v', 'm', 'a', 'x', 'n', 'm', '.', 'f', '6', '4', 9, 0, /* 593 */ 'v', 'r', 'i', 'n', 't', 'm', '.', 'f', '6', '4', 9, 0, /* 605 */ 'v', 'r', 'i', 'n', 't', 'n', '.', 'f', '6', '4', 9, 0, /* 617 */ 'v', 'r', 'i', 'n', 't', 'p', '.', 'f', '6', '4', 9, 0, /* 629 */ 'v', 's', 'e', 'l', 'e', 'q', '.', 'f', '6', '4', 9, 0, /* 641 */ 'v', 's', 'e', 'l', 'v', 's', '.', 'f', '6', '4', 9, 0, /* 653 */ 'v', 's', 'e', 'l', 'g', 't', '.', 'f', '6', '4', 9, 0, /* 665 */ 'v', 'm', 'u', 'l', 'l', '.', 'p', '6', '4', 9, 0, /* 676 */ 'a', 'e', 's', 'i', 'm', 'c', '.', '8', 9, 0, /* 686 */ 'a', 'e', 's', 'm', 'c', '.', '8', 9, 0, /* 695 */ 'a', 'e', 's', 'd', '.', '8', 9, 0, /* 703 */ 'a', 'e', 's', 'e', '.', '8', 9, 0, /* 711 */ 'r', 'f', 'e', 'd', 'a', 9, 0, /* 718 */ 'r', 'f', 'e', 'i', 'a', 9, 0, /* 725 */ 'c', 'r', 'c', '3', '2', 'b', 9, 0, /* 733 */ 'c', 'r', 'c', '3', '2', 'c', 'b', 9, 0, /* 742 */ 'r', 'f', 'e', 'd', 'b', 9, 0, /* 749 */ 'r', 'f', 'e', 'i', 'b', 9, 0, /* 756 */ 'd', 'm', 'b', 9, 0, /* 761 */ 'd', 's', 'b', 9, 0, /* 766 */ 'i', 's', 'b', 9, 0, /* 771 */ 'h', 'v', 'c', 9, 0, /* 776 */ 'p', 'l', 'd', 9, 0, /* 781 */ 's', 'e', 't', 'e', 'n', 'd', 9, 0, /* 789 */ 'u', 'd', 'f', 9, 0, /* 794 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0, /* 802 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0, /* 811 */ 'p', 'l', 'i', 9, 0, /* 816 */ 'l', 'd', 'c', '2', 'l', 9, 0, /* 823 */ 's', 't', 'c', '2', 'l', 9, 0, /* 830 */ 'b', 'l', 9, 0, /* 834 */ 'c', 'p', 's', 9, 0, /* 839 */ 'm', 'o', 'v', 's', 9, 0, /* 845 */ 'h', 'l', 't', 9, 0, /* 850 */ 'b', 'k', 'p', 't', 9, 0, /* 856 */ 'h', 'v', 'c', '.', 'w', 9, 0, /* 863 */ 'u', 'd', 'f', '.', 'w', 9, 0, /* 870 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0, /* 878 */ 'c', 'r', 'c', '3', '2', 'c', 'w', 9, 0, /* 887 */ 'p', 'l', 'd', 'w', 9, 0, /* 893 */ 'b', 'x', 9, 0, /* 897 */ 'b', 'l', 'x', 9, 0, /* 902 */ 'c', 'b', 'z', 9, 0, /* 907 */ 'c', 'b', 'n', 'z', 9, 0, /* 913 */ 's', 'r', 's', 'd', 'a', 9, 's', 'p', '!', ',', 32, 0, /* 925 */ 's', 'r', 's', 'i', 'a', 9, 's', 'p', '!', ',', 32, 0, /* 937 */ 's', 'r', 's', 'd', 'b', 9, 's', 'p', '!', ',', 32, 0, /* 949 */ 's', 'r', 's', 'i', 'b', 9, 's', 'p', '!', ',', 32, 0, /* 961 */ 's', 'r', 's', 'd', 'a', 9, 's', 'p', ',', 32, 0, /* 972 */ 's', 'r', 's', 'i', 'a', 9, 's', 'p', ',', 32, 0, /* 983 */ 's', 'r', 's', 'd', 'b', 9, 's', 'p', ',', 32, 0, /* 994 */ 's', 'r', 's', 'i', 'b', 9, 's', 'p', ',', 32, 0, /* 1005 */ 'v', 'l', 'd', '1', 0, /* 1010 */ 'd', 'c', 'p', 's', '1', 0, /* 1016 */ 'v', 's', 't', '1', 0, /* 1021 */ 'v', 'r', 'e', 'v', '3', '2', 0, /* 1028 */ 'l', 'd', 'c', '2', 0, /* 1033 */ 'm', 'r', 'c', '2', 0, /* 1038 */ 'm', 'r', 'r', 'c', '2', 0, /* 1044 */ 's', 't', 'c', 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*/ 'v', 'a', 'b', 'a', 0, /* 1370 */ 'l', 'd', 'a', 0, /* 1374 */ 'l', 'd', 'm', 'd', 'a', 0, /* 1380 */ 's', 't', 'm', 'd', 'a', 0, /* 1386 */ 'r', 'f', 'e', 'i', 'a', 0, /* 1392 */ 'v', 'l', 'd', 'm', 'i', 'a', 0, /* 1399 */ 'v', 's', 't', 'm', 'i', 'a', 0, /* 1406 */ 's', 'r', 's', 'i', 'a', 0, /* 1412 */ 's', 'm', 'm', 'l', 'a', 0, /* 1418 */ 'v', 'n', 'm', 'l', 'a', 0, /* 1424 */ 'v', 'm', 'l', 'a', 0, /* 1429 */ 'v', 'f', 'm', 'a', 0, /* 1434 */ 'v', 'f', 'n', 'm', 'a', 0, /* 1440 */ 'v', 'r', 's', 'r', 'a', 0, /* 1446 */ 'v', 's', 'r', 'a', 0, /* 1451 */ 'l', 'd', 'a', 'b', 0, /* 1456 */ 's', 'x', 't', 'a', 'b', 0, /* 1462 */ 'u', 'x', 't', 'a', 'b', 0, /* 1468 */ 's', 'm', 'l', 'a', 'b', 'b', 0, /* 1475 */ 's', 'm', 'l', 'a', 'l', 'b', 'b', 0, /* 1483 */ 's', 'm', 'u', 'l', 'b', 'b', 0, /* 1490 */ 't', 'b', 'b', 0, /* 1494 */ 'r', 'f', 'e', 'd', 'b', 0, /* 1500 */ 'v', 'l', 'd', 'm', 'd', 'b', 0, /* 1507 */ 'v', 's', 't', 'm', 'd', 'b', 0, /* 1514 */ 's', 'r', 's', 'd', 'b', 0, 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1672 */ 's', 't', 'r', 'e', 'x', 'b', 0, /* 1679 */ 's', 'b', 'c', 0, /* 1683 */ 'a', 'd', 'c', 0, /* 1687 */ 'l', 'd', 'c', 0, /* 1691 */ 'b', 'f', 'c', 0, /* 1695 */ 'v', 'b', 'i', 'c', 0, /* 1700 */ 's', 'm', 'c', 0, /* 1704 */ 'm', 'r', 'c', 0, /* 1708 */ 'm', 'r', 'r', 'c', 0, /* 1713 */ 'r', 's', 'c', 0, /* 1717 */ 's', 't', 'c', 0, /* 1721 */ 's', 'v', 'c', 0, /* 1725 */ 's', 'm', 'l', 'a', 'd', 0, /* 1731 */ 's', 'm', 'u', 'a', 'd', 0, /* 1737 */ 'v', 'a', 'b', 'd', 0, /* 1742 */ 'q', 'd', 'a', 'd', 'd', 0, /* 1748 */ 'v', 'r', 'h', 'a', 'd', 'd', 0, /* 1755 */ 'v', 'h', 'a', 'd', 'd', 0, /* 1761 */ 'v', 'p', 'a', 'd', 'd', 0, /* 1767 */ 'v', 'q', 'a', 'd', 'd', 0, /* 1773 */ 'v', 'a', 'd', 'd', 0, /* 1778 */ 's', 'm', 'l', 'a', 'l', 'd', 0, /* 1785 */ 'p', 'l', 'd', 0, /* 1789 */ 's', 'm', 'l', 's', 'l', 'd', 0, /* 1796 */ 'v', 'a', 'n', 'd', 0, /* 1801 */ 'l', 'd', 'r', 'd', 0, /* 1806 */ 's', 't', 'r', 'd', 0, /* 1811 */ 's', 'm', 'l', 's', 'd', 0, /* 1817 */ 's', 'm', 'u', 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0, /* 2735 */ 's', 'm', 'l', 'a', 't', 't', 0, /* 2742 */ 's', 'm', 'l', 'a', 'l', 't', 't', 0, /* 2750 */ 's', 'm', 'u', 'l', 't', 't', 0, /* 2757 */ 'v', 'c', 'v', 't', 't', 0, /* 2763 */ 'v', 'c', 'v', 't', 0, /* 2768 */ 'm', 'o', 'v', 't', 0, /* 2773 */ 's', 'm', 'l', 'a', 'w', 't', 0, /* 2780 */ 's', 'm', 'u', 'l', 'w', 't', 0, /* 2787 */ 'v', 'e', 'x', 't', 0, /* 2792 */ 'v', 'q', 's', 'h', 'l', 'u', 0, /* 2799 */ 'r', 'e', 'v', 0, /* 2803 */ 's', 'd', 'i', 'v', 0, /* 2808 */ 'u', 'd', 'i', 'v', 0, /* 2813 */ 'v', 'd', 'i', 'v', 0, /* 2818 */ 'v', 'm', 'o', 'v', 0, /* 2823 */ 'v', 's', 'u', 'b', 'w', 0, /* 2829 */ 'v', 'a', 'd', 'd', 'w', 0, /* 2835 */ 'p', 'l', 'd', 'w', 0, /* 2840 */ 'm', 'o', 'v', 'w', 0, /* 2845 */ 'f', 'l', 'd', 'm', 'i', 'a', 'x', 0, /* 2853 */ 'f', 's', 't', 'm', 'i', 'a', 'x', 0, /* 2861 */ 'v', 'p', 'm', 'a', 'x', 0, /* 2867 */ 'v', 'm', 'a', 'x', 0, /* 2872 */ 's', 'h', 's', 'a', 'x', 0, /* 2878 */ 'u', 'h', 's', 'a', 'x', 0, /* 2884 */ 'u', 'q', 's', 'a', 'x', 0, /* 2890 */ 's', 's', 'a', 'x', 0, /* 2895 */ 'u', 's', 'a', 'x', 0, /* 2900 */ 'f', 'l', 'd', 'm', 'd', 'b', 'x', 0, /* 2908 */ 'f', 's', 't', 'm', 'd', 'b', 'x', 0, /* 2916 */ 'v', 't', 'b', 'x', 0, /* 2921 */ 's', 'm', 'l', 'a', 'd', 'x', 0, /* 2928 */ 's', 'm', 'u', 'a', 'd', 'x', 0, /* 2935 */ 's', 'm', 'l', 'a', 'l', 'd', 'x', 0, /* 2943 */ 's', 'm', 'l', 's', 'l', 'd', 'x', 0, /* 2951 */ 's', 'm', 'l', 's', 'd', 'x', 0, /* 2958 */ 's', 'm', 'u', 's', 'd', 'x', 0, /* 2965 */ 'l', 'd', 'a', 'e', 'x', 0, /* 2971 */ 's', 't', 'l', 'e', 'x', 0, /* 2977 */ 'l', 'd', 'r', 'e', 'x', 0, /* 2983 */ 'c', 'l', 'r', 'e', 'x', 0, /* 2989 */ 's', 't', 'r', 'e', 'x', 0, /* 2995 */ 's', 'b', 'f', 'x', 0, /* 3000 */ 'u', 'b', 'f', 'x', 0, /* 3005 */ 'b', 'l', 'x', 0, /* 3009 */ 'r', 'r', 'x', 0, /* 3013 */ 's', 'h', 'a', 's', 'x', 0, /* 3019 */ 'u', 'h', 'a', 's', 'x', 0, /* 3025 */ 'u', 'q', 'a', 's', 'x', 0, /* 3031 */ 's', 'a', 's', 'x', 0, /* 3036 */ 'u', 'a', 's', 'x', 0, /* 3041 */ 'v', 'r', 'i', 'n', 't', 'x', 0, /* 3048 */ 'v', 'c', 'l', 'z', 0, /* 3053 */ 'v', 'r', 'i', 'n', 't', 'z', 0, }; #endif // printf(">>> opcode: %u\n", MCInst_getOpcode(MI)); // Emit the opcode for the instruction. uint64_t Bits1 = OpInfo[MCInst_getOpcode(MI)]; uint64_t Bits2 = OpInfo2[MCInst_getOpcode(MI)]; uint64_t Bits = (Bits2 << 32) | Bits1; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 4095)-1); #endif // Fragment 0 encoded into 5 bits for 29 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 31); switch ((Bits >> 12) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, CLREX, TRAP, TRAPNaCl... return; break; case 1: // ADCri, ADCrr, ADDri, ADDrr, ANDri, ANDrr, ASRi, ASRr, BICri, BICrr, EO... printSBitModifierOperand(MI, 5, O); printPredicateOperand(MI, 3, O); break; case 2: // ADCrsi, ADDrsi, ANDrsi, BICrsi, EORrsi, MLA, MOVsr, MVNsr, ORRrsi, RSB... printSBitModifierOperand(MI, 6, O); printPredicateOperand(MI, 4, O); break; case 3: // ADCrsr, ADDrsr, ANDrsr, BICrsr, EORrsr, ORRrsr, RSBrsr, RSCrsr, SBCrsr... printSBitModifierOperand(MI, 7, O); printPredicateOperand(MI, 5, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printSORegRegOperand(MI, 2, O); return; break; case 4: // ADR, CLZ, CMNri, CMNzrr, CMPri, CMPrr, FCONSTD, FCONSTS, FLDMXDB_UPD, ... printPredicateOperand(MI, 2, O); break; case 5: // AESD, AESE, AESIMC, AESMC, BKPT, BL, BLX, BLXi, BX, CPS1p, CRC32B, CRC... printOperand(MI, 0, O); break; case 6: // BFC, CMNzrsi, CMPrsi, LDRBi12, LDRcp, LDRi12, MOVTi16, QADD, QADD16, Q... printPredicateOperand(MI, 3, O); break; case 7: // BFI, CMNzrsr, CMPrsr, LDCL_OFFSET, LDCL_OPTION, LDCL_POST, LDCL_PRE, L... printPredicateOperand(MI, 4, O); break; case 8: // BLX_pred, BL_pred, BXJ, BX_pred, Bcc, DBG, FLDMXIA, FSTMXIA, HINT, LDM... printPredicateOperand(MI, 1, O); break; case 9: // BX_RET, ERET, FMSTAT, MOVPCLR, t2CLREX, t2DCPS1, t2DCPS2, t2DCPS3, tBL... printPredicateOperand(MI, 0, O); break; case 10: // CDP, LDRD_POST, LDRD_PRE, MCR, MRC, STRD_POST, STRD_PRE, VLD4DUPd16, V... printPredicateOperand(MI, 6, O); break; case 11: // CDP2, LDC2L_OFFSET, LDC2L_OPTION, LDC2L_POST, LDC2L_PRE, LDC2_OFFSET, ... printPImmediate(MI, 0, O); SStream_concat0(O, ", "); break; case 12: // CPS2p, CPS3p, t2CPS2p, t2CPS3p, tCPS printCPSIMod(MI, 0, O); break; case 13: // DMB, DSB printMemBOption(MI, 0, O); return; break; case 14: // ISB printInstSyncBOption(MI, 0, O); return; break; case 15: // ITasm, t2IT printThumbITMask(MI, 1, O); break; case 16: // LDRBT_POST_IMM, LDRBT_POST_REG, LDRB_POST_IMM, LDRB_POST_REG, LDRB_PRE... printPredicateOperand(MI, 5, O); break; case 17: // MOVi, MOVr, MOVr_TC, MVNi, MVNr, RRXi, t2MOVi, t2MOVr, t2MVNi, t2MVNr,... printSBitModifierOperand(MI, 4, O); printPredicateOperand(MI, 2, O); break; case 18: // MRC2 printPImmediate(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, ", "); printCImmediate(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 19: // PLDWi12, PLDi12, PLIi12 printAddrModeImm12Operand(MI, 0, O, false); return; break; case 20: // PLDWrs, PLDrs, PLIrs printAddrMode2Operand(MI, 0, O); return; break; case 21: // SETEND, tSETEND printSetendOperand(MI, 0, O); return; break; case 22: // SMLAL, UMLAL printSBitModifierOperand(MI, 8, O); printPredicateOperand(MI, 6, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 23: // VLD1LNd16_UPD, VLD1LNd32_UPD, VLD1LNd8_UPD, VLD2LNd16, VLD2LNd32, VLD2... printPredicateOperand(MI, 7, O); break; case 24: // VLD2LNd16_UPD, VLD2LNd32_UPD, VLD2LNd8_UPD, VLD2LNq16_UPD, VLD2LNq32_U... printPredicateOperand(MI, 9, O); break; case 25: // VLD3LNd16_UPD, VLD3LNd32_UPD, VLD3LNd8_UPD, VLD3LNq16_UPD, VLD3LNq32_U... printPredicateOperand(MI, 11, O); break; case 26: // VLD4DUPd16_UPD, VLD4DUPd32_UPD, VLD4DUPd8_UPD, VLD4DUPq16_UPD, VLD4DUP... printPredicateOperand(MI, 8, O); break; case 27: // VLD4LNd16_UPD, VLD4LNd32_UPD, VLD4LNd8_UPD, VLD4LNq16_UPD, VLD4LNq32_U... printPredicateOperand(MI, 13, O); break; case 28: // tADC, tADDi3, tADDi8, tADDrr, tAND, tASRri, tASRrr, tBIC, tEOR, tLSLri... printSBitModifierOperand(MI, 1, O); break; } // Fragment 1 encoded into 7 bits for 65 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 17) & 127); switch ((Bits >> 17) & 127) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCri, ADCrr, ADCrsi, ADDri, ADDrr, ADDrsi, ADR, ANDri, ANDrr, ANDrsi,... SStream_concat0(O, "\t"); break; case 1: // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ... SStream_concat0(O, ", "); break; case 2: // ASRi, ASRr, ITasm, LDRBT_POST, LDRT_POST, LSLi, LSLr, LSRi, LSRr, RORi... SStream_concat0(O, " "); break; case 3: // BKPT, BL, BLX, BLXi, BX, CPS1p, ERET, HLT, HVC, RFEDA, RFEDB, RFEIA, R... return; break; case 4: // BX_RET SStream_concat0(O, "\tlr"); ARM_addReg(MI, ARM_REG_LR); return; break; case 5: // CDP2, MCR2, MCRR2, MRRC2 printOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 6: // FCONSTD, VABSD, VADDD, VCMPD, VCMPED, VCMPEZD, VCMPZD, VDIVD, VFMAD, V... SStream_concat0(O, ".f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64); printOperand(MI, 0, O); break; case 7: // FCONSTS, VABDfd, VABDfq, VABSS, VABSfd, VABSfq, VACGEd, VACGEq, VACGTd... SStream_concat0(O, ".f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32); printOperand(MI, 0, O); break; case 8: // FMSTAT SStream_concat0(O, "\tapsr_nzcv, fpscr"); ARM_addReg(MI, ARM_REG_APSR_NZCV); ARM_addReg(MI, ARM_REG_FPSCR); return; break; case 9: // LDC2L_OFFSET, LDC2L_OPTION, LDC2L_POST, LDC2L_PRE, LDC2_OFFSET, LDC2_O... printCImmediate(MI, 1, O); SStream_concat0(O, ", "); break; case 10: // MOVPCLR SStream_concat0(O, "\tpc, lr"); ARM_addReg(MI, ARM_REG_PC); ARM_addReg(MI, ARM_REG_LR); return; break; case 11: // RFEDA_UPD, RFEDB_UPD, RFEIA_UPD, RFEIB_UPD SStream_concat0(O, "!"); return; break; case 12: // VABALsv2i64, VABAsv2i32, VABAsv4i32, VABDLsv2i64, VABDsv2i32, VABDsv4i... SStream_concat0(O, ".s32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S32); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 13: // VABALsv4i32, VABAsv4i16, VABAsv8i16, VABDLsv4i32, VABDsv4i16, VABDsv8i... SStream_concat0(O, ".s16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S16); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 14: // VABALsv8i16, VABAsv16i8, VABAsv8i8, VABDLsv8i16, VABDsv16i8, VABDsv8i8... SStream_concat0(O, ".s8\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S8); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 15: // VABALuv2i64, VABAuv2i32, VABAuv4i32, VABDLuv2i64, VABDuv2i32, VABDuv4i... SStream_concat0(O, ".u32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U32); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 16: // VABALuv4i32, VABAuv4i16, VABAuv8i16, VABDLuv4i32, VABDuv4i16, VABDuv8i... SStream_concat0(O, ".u16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U16); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 17: // VABALuv8i16, VABAuv16i8, VABAuv8i8, VABDLuv8i16, VABDuv16i8, VABDuv8i8... SStream_concat0(O, ".u8\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U8); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 18: // VADDHNv2i32, VADDv1i64, VADDv2i64, VMOVNv2i32, VMOVv1i64, VMOVv2i64, V... SStream_concat0(O, ".i64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_I64); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 19: // VADDHNv4i16, VADDv2i32, VADDv4i32, VBICiv2i32, VBICiv4i32, VCEQv2i32, ... SStream_concat0(O, ".i32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_I32); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 20: // VADDHNv8i8, VADDv4i16, VADDv8i16, VBICiv4i16, VBICiv8i16, VCEQv4i16, V... SStream_concat0(O, ".i16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_I16); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 21: // VADDv16i8, VADDv8i8, VCEQv16i8, VCEQv8i8, VCEQzv16i8, VCEQzv8i8, VCLZv... SStream_concat0(O, ".i8\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_I8); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 22: // VCNTd, VCNTq, VDUP8d, VDUP8q, VDUPLN8d, VDUPLN8q, VEXTd8, VEXTq8, VLD1... SStream_concat0(O, ".8\t"); ARM_addVectorDataSize(MI, 8); break; case 23: // VCVTBDH, VCVTTDH SStream_concat0(O, ".f16.f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F16F64); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 24: // VCVTBHD, VCVTTHD SStream_concat0(O, ".f64.f16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64F16); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 25: // VCVTBHS, VCVTTHS, VCVTh2f SStream_concat0(O, ".f32.f16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32F16); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 26: // VCVTBSH, VCVTTSH, VCVTf2h SStream_concat0(O, ".f16.f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F16F32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 27: // VCVTDS SStream_concat0(O, ".f64.f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64F32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 28: // VCVTSD SStream_concat0(O, ".f32.f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32F64); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 29: // VCVTf2sd, VCVTf2sq, VCVTf2xsd, VCVTf2xsq, VTOSIRS, VTOSIZS, VTOSLS SStream_concat0(O, ".s32.f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S32F32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 30: // VCVTf2ud, VCVTf2uq, VCVTf2xud, VCVTf2xuq, VTOUIRS, VTOUIZS, VTOULS SStream_concat0(O, ".u32.f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U32F32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 31: // VCVTs2fd, VCVTs2fq, VCVTxs2fd, VCVTxs2fq, VSITOS, VSLTOS SStream_concat0(O, ".f32.s32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32S32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 32: // VCVTu2fd, VCVTu2fq, VCVTxu2fd, VCVTxu2fq, VUITOS, VULTOS SStream_concat0(O, ".f32.u32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32U32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 33: // VDUP16d, VDUP16q, VDUPLN16d, VDUPLN16q, VEXTd16, VEXTq16, VLD1DUPd16, ... SStream_concat0(O, ".16\t"); ARM_addVectorDataSize(MI, 16); break; case 34: // VDUP32d, VDUP32q, VDUPLN32d, VDUPLN32q, VEXTd32, VEXTq32, VGETLNi32, V... SStream_concat0(O, ".32\t"); ARM_addVectorDataSize(MI, 32); break; case 35: // VEXTq64, VLD1d64, VLD1d64Q, VLD1d64Qwb_fixed, VLD1d64Qwb_register, VLD... SStream_concat0(O, ".64\t"); ARM_addVectorDataSize(MI, 64); break; case 36: // VLD1LNd16, VLD1LNd16_UPD, VLD2LNd16, VLD2LNd16_UPD, VLD2LNq16, VLD2LNq... SStream_concat0(O, ".16\t{"); ARM_addVectorDataSize(MI, 16); break; case 37: // VLD1LNd32, VLD1LNd32_UPD, VLD2LNd32, VLD2LNd32_UPD, VLD2LNq32, VLD2LNq... SStream_concat0(O, ".32\t{"); ARM_addVectorDataSize(MI, 32); break; case 38: // VLD1LNd8, VLD1LNd8_UPD, VLD2LNd8, VLD2LNd8_UPD, VLD3DUPd8, VLD3DUPd8_U... SStream_concat0(O, ".8\t{"); ARM_addVectorDataSize(MI, 8); break; case 39: // VMSR SStream_concat0(O, "\tfpscr, "); ARM_addReg(MI, ARM_REG_FPSCR); printOperand(MI, 0, O); return; break; case 40: // VMSR_FPEXC SStream_concat0(O, "\tfpexc, "); ARM_addReg(MI, ARM_REG_FPEXC); printOperand(MI, 0, O); return; break; case 41: // VMSR_FPINST SStream_concat0(O, "\tfpinst, "); ARM_addReg(MI, ARM_REG_FPINST); printOperand(MI, 0, O); return; break; case 42: // VMSR_FPINST2 SStream_concat0(O, "\tfpinst2, "); ARM_addReg(MI, ARM_REG_FPINST2); printOperand(MI, 0, O); return; break; case 43: // VMSR_FPSID SStream_concat0(O, "\tfpsid, "); ARM_addReg(MI, ARM_REG_FPSID); printOperand(MI, 0, O); return; break; case 44: // VMULLp8, VMULpd, VMULpq SStream_concat0(O, ".p8\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_P8); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 45: // VQADDsv1i64, VQADDsv2i64, VQMOVNsuv2i32, VQMOVNsv2i32, VQRSHLsv1i64, V... SStream_concat0(O, ".s64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S64); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 46: // VQADDuv1i64, VQADDuv2i64, VQMOVNuv2i32, VQRSHLuv1i64, VQRSHLuv2i64, VQ... SStream_concat0(O, ".u64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U64); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 47: // VSHTOD SStream_concat0(O, ".f64.s16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64S16); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 48: // VSHTOS SStream_concat0(O, ".f32.s16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32S16); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 49: // VSITOD, VSLTOD SStream_concat0(O, ".f64.s32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64S32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 50: // VTOSHD SStream_concat0(O, ".s16.f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S16F64); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 51: // VTOSHS SStream_concat0(O, ".s16.f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S16F32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 52: // VTOSIRD, VTOSIZD, VTOSLD SStream_concat0(O, ".s32.f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_S32F64); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 53: // VTOUHD SStream_concat0(O, ".u16.f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U16F64); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 54: // VTOUHS SStream_concat0(O, ".u16.f32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U16F32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 55: // VTOUIRD, VTOUIZD, VTOULD SStream_concat0(O, ".u32.f64\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_U32F64); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 56: // VUHTOD SStream_concat0(O, ".f64.u16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64U16); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 57: // VUHTOS SStream_concat0(O, ".f32.u16\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F32U16); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printFBits16(MI, 2, O); return; break; case 58: // VUITOD, VULTOD SStream_concat0(O, ".f64.u32\t"); ARM_addVectorDataType(MI, ARM_VECTORDATA_F64U32); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 59: // t2ADCrr, t2ADCrs, t2ADDri, t2ADDrr, t2ADDrs, t2ADR, t2ANDrr, t2ANDrs, ... SStream_concat0(O, ".w\t"); break; case 60: // t2SRSDB, t2SRSIA SStream_concat0(O, "\tsp, "); ARM_addReg(MI, ARM_REG_SP); printOperand(MI, 0, O); return; break; case 61: // t2SRSDB_UPD, t2SRSIA_UPD SStream_concat0(O, "\tsp!, "); ARM_addReg(MI, ARM_REG_SP); printOperand(MI, 0, O); return; break; case 62: // t2SUBS_PC_LR SStream_concat0(O, "\tpc, lr, "); ARM_addReg(MI, ARM_REG_PC); ARM_addReg(MI, ARM_REG_LR); printOperand(MI, 0, O); return; break; case 63: // tADC, tADDi3, tADDi8, tADDrr, tAND, tASRri, tASRrr, tBIC, tEOR, tLSLri... printPredicateOperand(MI, 4, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 64: // tMOVi8, tMVN, tRSB printPredicateOperand(MI, 3, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); break; } // Fragment 2 encoded into 6 bits for 58 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 24) & 63); switch ((Bits >> 24) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCri, ADCrr, ADCrsi, ADDri, ADDrr, ADDrsi, ADR, ANDri, ANDrr, ANDrsi,... printOperand(MI, 0, O); break; case 1: // AESD, AESE, MCR2, MCRR2, MRRC2, SHA1C, SHA1M, SHA1P, SHA1SU0, SHA1SU1,... printOperand(MI, 2, O); break; case 2: // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM... printOperand(MI, 1, O); break; case 3: // CDP, LDCL_OFFSET, LDCL_OPTION, LDCL_POST, LDCL_PRE, LDC_OFFSET, LDC_OP... printPImmediate(MI, 0, O); SStream_concat0(O, ", "); break; case 4: // CDP2 printCImmediate(MI, 2, O); SStream_concat0(O, ", "); printCImmediate(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 5: // CPS2p, CPS3p, t2CPS2p, t2CPS3p, tCPS printCPSIFlag(MI, 1, O); break; case 6: // FCONSTD, FCONSTS, VABDfd, VABDfq, VABSD, VABSS, VABSfd, VABSfq, VACGEd... SStream_concat0(O, ", "); break; case 7: // ITasm, t2IT printMandatoryPredicateOperand(MI, 0, O); return; break; case 8: // LDAEXD, LDREXD printGPRPairOperand(MI, 0, O, MRI); SStream_concat0(O, ", "); printAddrMode7Operand(MI, 1, O); return; break; case 9: // LDC2L_OFFSET, LDC2_OFFSET, STC2L_OFFSET, STC2_OFFSET printAddrMode5Operand(MI, 2, O, false); return; break; case 10: // LDC2L_OPTION, LDC2L_POST, LDC2_OPTION, LDC2_POST, STC2L_OPTION, STC2L_... printAddrMode7Operand(MI, 2, O); SStream_concat0(O, ", "); break; case 11: // LDC2L_PRE, LDC2_PRE, STC2L_PRE, STC2_PRE printAddrMode5Operand(MI, 2, O, true); SStream_concat0(O, "!"); return; break; case 12: // MRC, t2MRC, t2MRC2 printPImmediate(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, ", "); printCImmediate(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 13: // MSR, MSRi, t2MSR_AR, t2MSR_M printMSRMaskOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 14: // MSRbanked, t2MSRbanked printBankedRegOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 15: // VBICiv2i32, VBICiv4i16, VBICiv4i32, VBICiv8i16, VMOVv16i8, VMOVv1i64, ... printNEONModImmOperand(MI, 1, O); return; break; case 16: // VCMPEZD, VCMPEZS, VCMPZD, VCMPZS, tRSB SStream_concat0(O, ", #0"); op_addImm(MI, 0); return; break; case 17: // VCVTf2sd, VCVTf2sq, VCVTf2ud, VCVTf2uq, VCVTs2fd, VCVTs2fq, VCVTu2fd, ... return; break; case 18: // VLD1DUPd16, VLD1DUPd16wb_fixed, VLD1DUPd16wb_register, VLD1DUPd32, VLD... printVectorListOneAllLanes(MI, 0, O); SStream_concat0(O, ", "); break; case 19: // VLD1DUPq16, VLD1DUPq16wb_fixed, VLD1DUPq16wb_register, VLD1DUPq32, VLD... printVectorListTwoAllLanes(MI, 0, O, MRI); SStream_concat0(O, ", "); break; case 20: // VLD1d16, VLD1d16wb_fixed, VLD1d16wb_register, VLD1d32, VLD1d32wb_fixed... printVectorListOne(MI, 0, O); SStream_concat0(O, ", "); break; case 21: // VLD1d16Q, VLD1d16Qwb_fixed, VLD1d16Qwb_register, VLD1d32Q, VLD1d32Qwb_... printVectorListFour(MI, 0, O); SStream_concat0(O, ", "); break; case 22: // VLD1d16T, VLD1d16Twb_fixed, VLD1d16Twb_register, VLD1d32T, VLD1d32Twb_... printVectorListThree(MI, 0, O); SStream_concat0(O, ", "); break; case 23: // VLD1q16, VLD1q16wb_fixed, VLD1q16wb_register, VLD1q32, VLD1q32wb_fixed... printVectorListTwo(MI, 0, O, MRI); SStream_concat0(O, ", "); break; case 24: // VLD2DUPd16x2, VLD2DUPd16x2wb_fixed, VLD2DUPd16x2wb_register, VLD2DUPd3... printVectorListTwoSpacedAllLanes(MI, 0, O, MRI); SStream_concat0(O, ", "); break; case 25: // VLD2b16, VLD2b16wb_fixed, VLD2b16wb_register, VLD2b32, VLD2b32wb_fixed... printVectorListTwoSpaced(MI, 0, O, MRI); SStream_concat0(O, ", "); break; case 26: // VLD3DUPdAsm_16, VLD3DUPdAsm_32, VLD3DUPdAsm_8, VLD3DUPdWB_fixed_Asm_16... printVectorListThreeAllLanes(MI, 0, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); break; case 27: // VLD3DUPqAsm_16, VLD3DUPqAsm_32, VLD3DUPqAsm_8, VLD3DUPqWB_fixed_Asm_16... printVectorListThreeSpacedAllLanes(MI, 0, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); break; case 28: // VLD3qAsm_16, VLD3qAsm_32, VLD3qAsm_8, VLD3qWB_fixed_Asm_16, VLD3qWB_fi... printVectorListThreeSpaced(MI, 0, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); break; case 29: // VLD4DUPdAsm_16, VLD4DUPdAsm_32, VLD4DUPdAsm_8, VLD4DUPdWB_fixed_Asm_16... printVectorListFourAllLanes(MI, 0, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); break; case 30: // VLD4DUPqAsm_16, VLD4DUPqAsm_32, VLD4DUPqAsm_8, VLD4DUPqWB_fixed_Asm_16... printVectorListFourSpacedAllLanes(MI, 0, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); break; case 31: // VLD4qAsm_16, VLD4qAsm_32, VLD4qAsm_8, VLD4qWB_fixed_Asm_16, VLD4qWB_fi... printVectorListFourSpaced(MI, 0, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); break; case 32: // VST1LNd16_UPD, VST1LNd32_UPD, VST1LNd8_UPD, VST2LNd16_UPD, VST2LNd32_U... printOperand(MI, 4, O); break; case 33: // VST1d16, VST1d32, VST1d64, VST1d8 printVectorListOne(MI, 2, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 0, O); return; break; case 34: // VST1d16Q, VST1d32Q, VST1d64Q, VST1d8Q, VST2q16, VST2q32, VST2q8 printVectorListFour(MI, 2, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 0, O); return; break; case 35: // VST1d16Qwb_fixed, VST1d32Qwb_fixed, VST1d64Qwb_fixed, VST1d8Qwb_fixed,... printVectorListFour(MI, 3, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, "!"); return; break; case 36: // VST1d16Qwb_register, VST1d32Qwb_register, VST1d64Qwb_register, VST1d8Q... printVectorListFour(MI, 4, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 37: // VST1d16T, VST1d32T, VST1d64T, VST1d8T printVectorListThree(MI, 2, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 0, O); return; break; case 38: // VST1d16Twb_fixed, VST1d32Twb_fixed, VST1d64Twb_fixed, VST1d8Twb_fixed printVectorListThree(MI, 3, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, "!"); return; break; case 39: // VST1d16Twb_register, VST1d32Twb_register, VST1d64Twb_register, VST1d8T... printVectorListThree(MI, 4, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 40: // VST1d16wb_fixed, VST1d32wb_fixed, VST1d64wb_fixed, VST1d8wb_fixed printVectorListOne(MI, 3, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, "!"); return; break; case 41: // VST1d16wb_register, VST1d32wb_register, VST1d64wb_register, VST1d8wb_r... printVectorListOne(MI, 4, O); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 42: // VST1q16, VST1q32, VST1q64, VST1q8, VST2d16, VST2d32, VST2d8 printVectorListTwo(MI, 2, O, MRI); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 0, O); return; break; case 43: // VST1q16wb_fixed, VST1q32wb_fixed, VST1q64wb_fixed, VST1q8wb_fixed, VST... printVectorListTwo(MI, 3, O, MRI); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, "!"); return; break; case 44: // VST1q16wb_register, VST1q32wb_register, VST1q64wb_register, VST1q8wb_r... printVectorListTwo(MI, 4, O, MRI); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 45: // VST2b16, VST2b32, VST2b8 printVectorListTwoSpaced(MI, 2, O, MRI); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 0, O); return; break; case 46: // VST2b16wb_fixed, VST2b32wb_fixed, VST2b8wb_fixed printVectorListTwoSpaced(MI, 3, O, MRI); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, "!"); return; break; case 47: // VST2b16wb_register, VST2b32wb_register, VST2b8wb_register printVectorListTwoSpaced(MI, 4, O, MRI); SStream_concat0(O, ", "); printAddrMode6Operand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 48: // t2DMB, t2DSB printMemBOption(MI, 0, O); return; break; case 49: // t2ISB printInstSyncBOption(MI, 0, O); return; break; case 50: // t2PLDWi12, t2PLDi12, t2PLIi12 printAddrModeImm12Operand(MI, 0, O, false); return; break; case 51: // t2PLDWi8, t2PLDi8, t2PLIi8 printT2AddrModeImm8Operand(MI, 0, O, false); return; break; case 52: // t2PLDWs, t2PLDs, t2PLIs printT2AddrModeSoRegOperand(MI, 0, O); return; break; case 53: // t2PLDpci, t2PLIpci printThumbLdrLabelOperand(MI, 0, O); return; break; case 54: // t2TBB printAddrModeTBB(MI, 0, O); return; break; case 55: // t2TBH printAddrModeTBH(MI, 0, O); return; break; case 56: // tADC, tADDi8, tAND, tASRrr, tBIC, tEOR, tLSLrr, tLSRrr, tORR, tROR, tS... printOperand(MI, 3, O); return; break; case 57: // tPOP, tPUSH printRegisterList(MI, 2, O); return; break; } // Fragment 3 encoded into 5 bits for 29 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 30) & 31); switch ((Bits >> 30) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCri, ADCrr, ADCrsi, ADDri, ADDrr, ADDrsi, ADR, ANDri, ANDrr, ANDrsi,... SStream_concat0(O, ", "); break; case 1: // AESD, AESE, AESIMC, AESMC, BLX_pred, BL_pred, BXJ, BX_pred, Bcc, CPS2p... return; break; case 2: // CDP, MCR, MCRR, MRRC, MSR, VABDfd, VABDfq, VABSD, VABSS, VABSfd, VABSf... printOperand(MI, 1, O); break; case 3: // FCONSTD, FCONSTS, VMOVv2f32, VMOVv4f32 printFPImmOperand(MI, 1, O); return; break; case 4: // FLDMXDB_UPD, FLDMXIA_UPD, FSTMXDB_UPD, FSTMXIA_UPD, LDMDA_UPD, LDMDB_U... SStream_concat0(O, "!, "); printRegisterList(MI, 4, O); break; case 5: // LDC2L_OPTION, LDC2_OPTION, STC2L_OPTION, STC2_OPTION printCoprocOptionImm(MI, 3, O); return; break; case 6: // LDC2L_POST, LDC2_POST, STC2L_POST, STC2_POST printPostIdxImm8s4Operand(MI, 3, O); return; break; case 7: // LDCL_OFFSET, LDCL_OPTION, LDCL_POST, LDCL_PRE, LDC_OFFSET, LDC_OPTION,... printCImmediate(MI, 1, O); SStream_concat0(O, ", "); break; case 8: // MRS, t2MRS_AR SStream_concat0(O, ", apsr"); ARM_addReg(MI, ARM_REG_APSR); return; break; case 9: // MRSsys, t2MRSsys_AR SStream_concat0(O, ", spsr"); ARM_addReg(MI, ARM_REG_SPSR); return; break; case 10: // MSRi printModImmOperand(MI, 1, O); return; break; case 11: // VCEQzv16i8, VCEQzv2i32, VCEQzv4i16, VCEQzv4i32, VCEQzv8i16, VCEQzv8i8,... SStream_concat0(O, ", #0"); op_addImm(MI, 0); return; break; case 12: // VCVTf2xsd, VCVTf2xsq, VCVTf2xud, VCVTf2xuq, VCVTxs2fd, VCVTxs2fq, VCVT... printOperand(MI, 2, O); break; case 13: // VGETLNs16, VGETLNs8, VGETLNu16, VGETLNu8 printVectorIndex(MI, 2, O); return; break; case 14: // VLD1DUPd16, VLD1DUPd32, VLD1DUPd8, VLD1DUPq16, VLD1DUPq32, VLD1DUPq8, ... printAddrMode6Operand(MI, 1, O); break; case 15: // VLD1DUPd16wb_fixed, VLD1DUPd16wb_register, VLD1DUPd32wb_fixed, VLD1DUP... printAddrMode6Operand(MI, 2, O); break; case 16: // VLD1LNd16, VLD1LNd16_UPD, VLD1LNd32, VLD1LNd32_UPD, VLD1LNd8, VLD1LNd8... SStream_concat0(O, "["); set_mem_access(MI, true); break; case 17: // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD... SStream_concat0(O, "[], "); printOperand(MI, 1, O); SStream_concat0(O, "[], "); printOperand(MI, 2, O); break; case 18: // VLD3DUPdWB_fixed_Asm_16, VLD3DUPdWB_fixed_Asm_32, VLD3DUPdWB_fixed_Asm... SStream_concat0(O, "!"); return; break; case 19: // VMRS SStream_concat0(O, ", fpscr"); ARM_addReg(MI, ARM_REG_FPSCR); return; break; case 20: // VMRS_FPEXC SStream_concat0(O, ", fpexc"); ARM_addReg(MI, ARM_REG_FPEXC); return; break; case 21: // VMRS_FPINST SStream_concat0(O, ", fpinst"); ARM_addReg(MI, ARM_REG_FPINST); return; break; case 22: // VMRS_FPINST2 SStream_concat0(O, ", fpinst2"); ARM_addReg(MI, ARM_REG_FPINST2); return; break; case 23: // VMRS_FPSID SStream_concat0(O, ", fpsid"); ARM_addReg(MI, ARM_REG_FPSID); return; break; case 24: // VMRS_MVFR0 SStream_concat0(O, ", mvfr0"); ARM_addReg(MI, ARM_REG_MVFR0); return; break; case 25: // VMRS_MVFR1 SStream_concat0(O, ", mvfr1"); ARM_addReg(MI, ARM_REG_MVFR1); return; break; case 26: // VMRS_MVFR2 SStream_concat0(O, ", mvfr2"); ARM_addReg(MI, ARM_REG_MVFR2); return; break; case 27: // VSETLNi16, VSETLNi32, VSETLNi8 printVectorIndex(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 28: // VSLTOD, VSLTOS, VTOSLD, VTOSLS, VTOULD, VTOULS, VULTOD, VULTOS printFBits32(MI, 2, O); return; break; } // Fragment 4 encoded into 6 bits for 64 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 35) & 63); switch ((Bits >> 35) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCri, ADCrr, ADCrsi, ADDri, ADDrr, ADDrsi, ANDri, ANDrr, ANDrsi, ASRi... printOperand(MI, 1, O); break; case 1: // ADR, t2ADR printAdrLabelOperand(MI, 1, O, 0); return; break; case 2: // BFC, t2BFC printBitfieldInvMaskImmOperand(MI, 2, O); return; break; case 3: // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16... printOperand(MI, 2, O); break; case 4: // CDP, MCR, MCRR, MRRC, VABDfd, VABDfq, VACGEd, VACGEq, VACGTd, VACGTq, ... SStream_concat0(O, ", "); break; case 5: // CMNri, CMPri, MOVi, MVNi, TEQri, TSTri printModImmOperand(MI, 1, O); return; break; case 6: // CMNzrsi, CMPrsi, MOVsi, MVNsi, TEQrsi, TSTrsi printSORegImmOperand(MI, 1, O); return; break; case 7: // CMNzrsr, CMPrsr, MOVsr, MVNsr, TEQrsr, TSTrsr, t2MOVSsr, t2MOVsr printSORegRegOperand(MI, 1, O); return; break; case 8: // FLDMXDB_UPD, FLDMXIA_UPD, FSTMXDB_UPD, FSTMXIA_UPD, LDMDA_UPD, LDMDB_U... return; break; case 9: // FLDMXIA, FSTMXIA, LDMDA, LDMDB, LDMIA, LDMIB, STMDA, STMDB, STMIA, STM... printRegisterList(MI, 3, O); break; case 10: // LDA, LDAB, LDAEX, LDAEXB, LDAEXH, LDAH, LDRBT_POST, LDREX, LDREXB, LDR... printAddrMode7Operand(MI, 1, O); return; break; case 11: // LDCL_OFFSET, LDC_OFFSET, STCL_OFFSET, STC_OFFSET, t2LDC2L_OFFSET, t2LD... printAddrMode5Operand(MI, 2, O, false); return; break; case 12: // LDCL_OPTION, LDCL_POST, LDC_OPTION, LDC_POST, LDRBT_POST_IMM, LDRBT_PO... printAddrMode7Operand(MI, 2, O); break; case 13: // LDCL_PRE, LDC_PRE, STCL_PRE, STC_PRE, t2LDC2L_PRE, t2LDC2_PRE, t2LDCL_... printAddrMode5Operand(MI, 2, O, true); SStream_concat0(O, "!"); return; break; case 14: // LDRB_PRE_IMM, LDR_PRE_IMM, STRB_PRE_IMM, STR_PRE_IMM printAddrModeImm12Operand(MI, 2, O, true); SStream_concat0(O, "!"); return; break; case 15: // LDRB_PRE_REG, LDR_PRE_REG, STRB_PRE_REG, STR_PRE_REG printAddrMode2Operand(MI, 2, O); SStream_concat0(O, "!"); return; break; case 16: // LDRBi12, LDRcp, LDRi12, STRBi12, STRi12, t2LDRBi12, t2LDRHi12, t2LDRSB... printAddrModeImm12Operand(MI, 1, O, false); return; break; case 17: // LDRBrs, LDRrs, STRBrs, STRrs printAddrMode2Operand(MI, 1, O); return; break; case 18: // LDRH, LDRSB, LDRSH, STRH printAddrMode3Operand(MI, 1, O, false); return; break; case 19: // LDRH_PRE, LDRSB_PRE, LDRSH_PRE, STRH_PRE printAddrMode3Operand(MI, 2, O, true); SStream_concat0(O, "!"); return; break; case 20: // MCR2 printCImmediate(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 21: // MCRR2, MRRC2, SHA1C, SHA1M, SHA1P, SHA1SU0, SHA256H, SHA256H2, SHA256S... printOperand(MI, 3, O); break; case 22: // MRSbanked, t2MRSbanked printBankedRegOperand(MI, 1, O); return; break; case 23: // SSAT, SSAT16, t2SSAT, t2SSAT16 printImmPlusOneOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); break; case 24: // STLEXD, STREXD printGPRPairOperand(MI, 1, O, MRI); SStream_concat0(O, ", "); printAddrMode7Operand(MI, 2, O); return; break; case 25: // VCEQzv2f32, VCEQzv4f32, VCGEzv2f32, VCGEzv4f32, VCGTzv2f32, VCGTzv4f32... SStream_concat0(O, ", #0"); op_addImm(MI, 0); return; break; case 26: // VLD1DUPd16wb_fixed, VLD1DUPd32wb_fixed, VLD1DUPd8wb_fixed, VLD1DUPq16w... SStream_concat0(O, "!"); return; break; case 27: // VLD1LNd16, VLD1LNd32, VLD1LNd8, VST2LNd16, VST2LNd32, VST2LNd8, VST2LN... printNoHashImmediate(MI, 4, O); break; case 28: // VLD1LNd16_UPD, VLD1LNd32_UPD, VLD1LNd8_UPD, VLD2LNd16, VLD2LNd32, VLD2... printNoHashImmediate(MI, 6, O); break; case 29: // VLD1LNdAsm_16, VLD1LNdAsm_32, VLD1LNdAsm_8, VLD1LNdWB_fixed_Asm_16, VL... printAddrMode6Operand(MI, 2, O); break; case 30: // VLD2LNd16_UPD, VLD2LNd32_UPD, VLD2LNd8_UPD, VLD2LNq16_UPD, VLD2LNq32_U... printNoHashImmediate(MI, 8, O); SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 31: // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD... SStream_concat0(O, "[]}, "); break; case 32: // VLD3LNd16_UPD, VLD3LNd32_UPD, VLD3LNd8_UPD, VLD3LNq16_UPD, VLD3LNq32_U... printNoHashImmediate(MI, 10, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 1, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 10, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 2, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 10, O); break; case 33: // VLD4DUPd16, VLD4DUPd16_UPD, VLD4DUPd32, VLD4DUPd32_UPD, VLD4DUPd8, VLD... SStream_concat0(O, "[], "); printOperand(MI, 3, O); SStream_concat0(O, "[]}, "); break; case 34: // VLD4LNd16_UPD, VLD4LNd32_UPD, VLD4LNd8_UPD, VLD4LNq16_UPD, VLD4LNq32_U... printNoHashImmediate(MI, 12, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 1, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 12, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 2, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 12, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 3, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 12, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 5, O); printAddrMode6OffsetOperand(MI, 7, O); return; break; case 35: // VLDRD, VLDRS, VSTRD, VSTRS printAddrMode5Operand(MI, 1, O, false); return; break; case 36: // VST1LNd16, VST1LNd32, VST1LNd8 printNoHashImmediate(MI, 3, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 0, O); return; break; case 37: // VST1LNd16_UPD, VST1LNd32_UPD, VST1LNd8_UPD, VST3LNd16, VST3LNd32, VST3... printNoHashImmediate(MI, 5, O); break; case 38: // VST3LNd16_UPD, VST3LNd32_UPD, VST3LNd8_UPD, VST3LNq16_UPD, VST3LNq32_U... printNoHashImmediate(MI, 7, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 5, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 7, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 6, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 7, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 1, O); printAddrMode6OffsetOperand(MI, 3, O); return; break; case 39: // VST3d16_UPD, VST3d32_UPD, VST3d8_UPD, VST3q16_UPD, VST3q32_UPD, VST3q8... printOperand(MI, 5, O); SStream_concat0(O, ", "); printOperand(MI, 6, O); break; case 40: // VTBL1 printVectorListOne(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 41: // VTBL2 printVectorListTwo(MI, 1, O, MRI); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 42: // VTBL3 printVectorListThree(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 43: // VTBL4 printVectorListFour(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 44: // VTBX1 printVectorListOne(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 45: // VTBX2 printVectorListTwo(MI, 2, O, MRI); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 46: // VTBX3 printVectorListThree(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 47: // VTBX4 printVectorListFour(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 48: // sysLDMDA_UPD, sysLDMDB_UPD, sysLDMIA_UPD, sysLDMIB_UPD, sysSTMDA_UPD, ... SStream_concat0(O, " ^"); ARM_addUserMode(MI); return; break; case 49: // t2CMNzrs, t2CMPrs, t2MOVSsi, t2MOVsi, t2MVNs, t2TEQrs, t2TSTrs printT2SOOperand(MI, 1, O); return; break; case 50: // t2LDRBT, t2LDRBi8, t2LDRHT, t2LDRHi8, t2LDRSBT, t2LDRSBi8, t2LDRSHT, t... printT2AddrModeImm8Operand(MI, 1, O, false); return; break; case 51: // t2LDRB_PRE, t2LDRH_PRE, t2LDRSB_PRE, t2LDRSH_PRE, t2LDR_PRE, t2STRB_PR... printT2AddrModeImm8Operand(MI, 2, O, true); SStream_concat0(O, "!"); return; break; case 52: // t2LDRBpci, t2LDRHpci, t2LDRSBpci, t2LDRSHpci, t2LDRpci, tLDRpci printThumbLdrLabelOperand(MI, 1, O); return; break; case 53: // t2LDRBs, t2LDRHs, t2LDRSBs, t2LDRSHs, t2LDRs, t2STRBs, t2STRHs, t2STRs printT2AddrModeSoRegOperand(MI, 1, O); return; break; case 54: // t2LDREX printT2AddrModeImm0_1020s4Operand(MI, 1, O); return; break; case 55: // t2MRS_M printMSRMaskOperand(MI, 1, O); return; break; case 56: // tADDspi, tSUBspi printThumbS4ImmOperand(MI, 2, O); return; break; case 57: // tADR printAdrLabelOperand(MI, 1, O, 2); return; break; case 58: // tASRri, tLSRri printThumbSRImm(MI, 3, O); return; break; case 59: // tLDRBi, tSTRBi printThumbAddrModeImm5S1Operand(MI, 1, O); return; break; case 60: // tLDRBr, tLDRHr, tLDRSB, tLDRSH, tLDRr, tSTRBr, tSTRHr, tSTRr printThumbAddrModeRROperand(MI, 1, O); return; break; case 61: // tLDRHi, tSTRHi printThumbAddrModeImm5S2Operand(MI, 1, O); return; break; case 62: // tLDRi, tSTRi printThumbAddrModeImm5S4Operand(MI, 1, O); return; break; case 63: // tLDRspi, tSTRspi printThumbAddrModeSPOperand(MI, 1, O); return; break; } // Fragment 5 encoded into 5 bits for 23 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 41) & 31); switch ((Bits >> 41) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCri, ADCrr, ADCrsi, ADDri, ADDrr, ADDrsi, ANDri, ANDrr, ANDrsi, ASRi... SStream_concat0(O, ", "); break; case 1: // CDP, t2CDP, t2CDP2 printCImmediate(MI, 2, O); SStream_concat0(O, ", "); printCImmediate(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 2: // CLZ, CMNzrr, CMPrr, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ... return; break; case 3: // MCR, MCRR, MRRC, VABDfd, VABDfq, VACGEd, VACGEq, VACGTd, VACGTq, VADDD... printOperand(MI, 2, O); break; case 4: // SSAT, t2SSAT printShiftImmOperand(MI, 3, O); return; break; case 5: // SXTB, SXTB16, SXTH, UXTB, UXTB16, UXTH, t2SXTB, t2SXTB16, t2SXTH, t2UX... printRotImmOperand(MI, 2, O); return; break; case 6: // VDUPLN16d, VDUPLN16q, VDUPLN32d, VDUPLN32q, VDUPLN8d, VDUPLN8q, VGETLN... printVectorIndex(MI, 2, O); return; break; case 7: // VFMAD, VFMAS, VFMAfd, VFMAfq, VFMSD, VFMSS, VFMSfd, VFMSfq, VFNMAD, VF... printOperand(MI, 3, O); break; case 8: // VLD1DUPd16wb_register, VLD1DUPd32wb_register, VLD1DUPd8wb_register, VL... printOperand(MI, 4, O); return; break; case 9: // VLD1LNd16, VLD1LNd16_UPD, VLD1LNd32, VLD1LNd32_UPD, VLD1LNd8, VLD1LNd8... SStream_concat0(O, "]}, "); set_mem_access(MI, false); break; case 10: // VLD1LNdWB_fixed_Asm_16, VLD1LNdWB_fixed_Asm_32, VLD1LNdWB_fixed_Asm_8,... SStream_concat0(O, "!"); return; break; case 11: // VLD2LNd16, VLD2LNd32, VLD2LNd8, VLD2LNq16, VLD2LNq32, VLD4LNd16, VLD4L... SStream_concat0(O, "], "); set_mem_access(MI, false); break; case 12: // VLD2LNd16_UPD, VLD2LNd32_UPD, VLD2LNd8_UPD, VLD2LNq16_UPD, VLD2LNq32_U... printOperand(MI, 1, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 8, O); break; case 13: // VLD3DUPd16, VLD3DUPd32, VLD3DUPd8, VLD3DUPq16, VLD3DUPq32, VLD3DUPq8 printAddrMode6Operand(MI, 3, O); return; break; case 14: // VLD3DUPd16_UPD, VLD3DUPd32_UPD, VLD3DUPd8_UPD, VLD3DUPq16_UPD, VLD3DUP... printAddrMode6Operand(MI, 4, O); break; case 15: // VLD4DUPd16_UPD, VLD4DUPd32_UPD, VLD4DUPd8_UPD, VLD4DUPq16_UPD, VLD4DUP... printAddrMode6Operand(MI, 5, O); printAddrMode6OffsetOperand(MI, 7, O); return; break; case 16: // VMLALslsv2i32, VMLALslsv4i16, VMLALsluv2i32, VMLALsluv4i16, VMLAslv2i3... printVectorIndex(MI, 4, O); return; break; case 17: // VMULLslsv2i32, VMULLslsv4i16, VMULLsluv2i32, VMULLsluv4i16, VMULslv2i3... printVectorIndex(MI, 3, O); return; break; case 18: // VST3d16_UPD, VST3d32_UPD, VST3d8_UPD, VST3q16_UPD, VST3q32_UPD, VST3q8... SStream_concat0(O, "}, "); printAddrMode6Operand(MI, 1, O); printAddrMode6OffsetOperand(MI, 3, O); return; break; case 19: // VST4LNd16_UPD, VST4LNd32_UPD, VST4LNd8_UPD, VST4LNq16_UPD, VST4LNq32_U... printOperand(MI, 5, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 8, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 6, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 8, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 7, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 8, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 1, O); printAddrMode6OffsetOperand(MI, 3, O); return; break; case 20: // sysLDMDA, sysLDMDB, sysLDMIA, sysLDMIB, sysSTMDA, sysSTMDB, sysSTMIA, ... SStream_concat0(O, " ^"); ARM_addUserMode(MI); return; break; case 21: // t2LDRB_POST, t2LDRH_POST, t2LDRSB_POST, t2LDRSH_POST, t2LDR_POST, t2ST... printT2AddrModeImm8OffsetOperand(MI, 3, O); return; break; case 22: // t2MOVsra_flag, t2MOVsrl_flag SStream_concat0(O, ", #1"); op_addImm(MI, 1); return; break; } // Fragment 6 encoded into 6 bits for 36 unique commands. //printf("Frag-6: %"PRIu64"\n", (Bits >> 46) & 63); switch ((Bits >> 46) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCri, ADDri, ANDri, BICri, EORri, ORRri, RSBri, RSCri, SBCri, SUBri printModImmOperand(MI, 2, O); return; break; case 1: // ADCrr, ADDrr, ANDrr, ASRi, ASRr, BICrr, EORrr, LSLi, LSLr, LSRi, LSRr,... printOperand(MI, 2, O); break; case 2: // ADCrsi, ADDrsi, ANDrsi, BICrsi, EORrsi, ORRrsi, RSBrsi, RSCrsi, SBCrsi... printSORegImmOperand(MI, 2, O); return; break; case 3: // BFI, t2BFI printBitfieldInvMaskImmOperand(MI, 3, O); return; break; case 4: // LDCL_OPTION, LDC_OPTION, STCL_OPTION, STC_OPTION, t2LDC2L_OPTION, t2LD... printCoprocOptionImm(MI, 3, O); return; break; case 5: // LDCL_POST, LDC_POST, STCL_POST, STC_POST, t2LDC2L_POST, t2LDC2_POST, t... printPostIdxImm8s4Operand(MI, 3, O); return; break; case 6: // LDRBT_POST_IMM, LDRBT_POST_REG, LDRB_POST_IMM, LDRB_POST_REG, LDRT_POS... printAddrMode2OffsetOperand(MI, 3, O); return; break; case 7: // LDRD, STRD printAddrMode3Operand(MI, 2, O, false); return; break; case 8: // LDRD_POST, STRD_POST, t2LDRD_POST, t2STRD_POST printAddrMode7Operand(MI, 3, O); break; case 9: // LDRD_PRE, STRD_PRE printAddrMode3Operand(MI, 3, O, true); SStream_concat0(O, "!"); return; break; case 10: // LDRHTi, LDRSBTi, LDRSHTi, STRHTi printPostIdxImm8Operand(MI, 3, O); return; break; case 11: // LDRHTr, LDRSBTr, LDRSHTr, STRHTr printPostIdxRegOperand(MI, 3, O); return; break; case 12: // LDRH_POST, LDRSB_POST, LDRSH_POST, STRH_POST printAddrMode3OffsetOperand(MI, 3, O); return; break; case 13: // MCR, MCRR, MRRC, t2MCR, t2MCR2, t2MCRR, t2MCRR2, t2MRRC, t2MRRC2 SStream_concat0(O, ", "); break; case 14: // MCRR2, MRRC2 printCImmediate(MI, 4, O); return; break; case 15: // STLEX, STLEXB, STLEXH, STREX, STREXB, STREXH, SWP, SWPB, t2LDAEXD, t2L... printAddrMode7Operand(MI, 2, O); return; break; case 16: // VABDfd, VABDfq, VACGEd, VACGEq, VACGTd, VACGTq, VADDD, VADDS, VADDfd, ... return; break; case 17: // VBIFd, VBIFq, VBITd, VBITq, VBSLd, VBSLq, VLD4LNd16, VLD4LNd32, VLD4LN... printOperand(MI, 3, O); break; case 18: // VLD1LNd16, VLD1LNd32, VLD1LNd8, VST1LNd16_UPD, VST1LNd32_UPD, VST1LNd8... printAddrMode6Operand(MI, 1, O); break; case 19: // VLD1LNd16_UPD, VLD1LNd32_UPD, VLD1LNd8_UPD printAddrMode6Operand(MI, 2, O); printAddrMode6OffsetOperand(MI, 4, O); return; break; case 20: // VLD1LNdWB_register_Asm_16, VLD1LNdWB_register_Asm_32, VLD1LNdWB_regist... printOperand(MI, 4, O); break; case 21: // VLD2LNd16, VLD2LNd32, VLD2LNd8, VLD2LNq16, VLD2LNq32 printOperand(MI, 1, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 6, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 2, O); return; break; case 22: // VLD2LNd16_UPD, VLD2LNd32_UPD, VLD2LNd8_UPD, VLD2LNq16_UPD, VLD2LNq32_U... SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 3, O); printAddrMode6OffsetOperand(MI, 5, O); return; break; case 23: // VLD3DUPd16_UPD, VLD3DUPd32_UPD, VLD3DUPd8_UPD, VLD3DUPq16_UPD, VLD3DUP... printAddrMode6OffsetOperand(MI, 6, O); return; break; case 24: // VLD3LNd16, VLD3LNd32, VLD3LNd8, VLD3LNq16, VLD3LNq32 SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 2, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 8, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 3, O); return; break; case 25: // VLD3LNd16_UPD, VLD3LNd32_UPD, VLD3LNd8_UPD, VLD3LNq16_UPD, VLD3LNq32_U... printAddrMode6Operand(MI, 4, O); printAddrMode6OffsetOperand(MI, 6, O); return; break; case 26: // VMLAslfd, VMLAslfq, VMLSslfd, VMLSslfq printVectorIndex(MI, 4, O); return; break; case 27: // VMULslfd, VMULslfq printVectorIndex(MI, 3, O); return; break; case 28: // VST2LNd16_UPD, VST2LNd32_UPD, VST2LNd8_UPD, VST2LNq16_UPD, VST2LNq32_U... printOperand(MI, 5, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 6, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 1, O); printAddrMode6OffsetOperand(MI, 3, O); return; break; case 29: // VST4d16_UPD, VST4d32_UPD, VST4d8_UPD, VST4q16_UPD, VST4q32_UPD, VST4q8... printOperand(MI, 7, O); SStream_concat0(O, "}, "); printAddrMode6Operand(MI, 1, O); printAddrMode6OffsetOperand(MI, 3, O); return; break; case 30: // t2ADCrs, t2ADDrs, t2ANDrs, t2BICrs, t2EORrs, t2ORNrs, t2ORRrs, t2RSBrs... printT2SOOperand(MI, 2, O); return; break; case 31: // t2ASRri, t2LSRri printThumbSRImm(MI, 2, O); return; break; case 32: // t2LDRD_PRE, t2STRD_PRE printT2AddrModeImm8s4Operand(MI, 3, O, true); SStream_concat0(O, "!"); return; break; case 33: // t2LDRDi8, t2STRDi8 printT2AddrModeImm8s4Operand(MI, 2, O, false); return; break; case 34: // t2STREX printT2AddrModeImm0_1020s4Operand(MI, 2, O); return; break; case 35: // tADDrSPi printThumbS4ImmOperand(MI, 2, O); return; break; } // Fragment 7 encoded into 4 bits for 12 unique commands. //printf("Frag-7: %"PRIu64"\n", (Bits >> 52) & 15); switch ((Bits >> 52) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ADCrr, ADDrr, ANDrr, ASRi, ASRr, BICrr, EORrr, LSLi, LSLr, LSRi, LSRr,... return; break; case 1: // LDRD_POST, MLA, MLS, SBFX, SMLABB, SMLABT, SMLAD, SMLADX, SMLALBB, SML... SStream_concat0(O, ", "); break; case 2: // MCR, t2MCR, t2MCR2 printCImmediate(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 3: // MCRR, MRRC, t2MCRR, t2MCRR2, t2MRRC, t2MRRC2 printOperand(MI, 3, O); SStream_concat0(O, ", "); printCImmediate(MI, 4, O); return; break; case 4: // PKHBT, t2PKHBT printPKHLSLShiftImm(MI, 3, O); return; break; case 5: // PKHTB, t2PKHTB printPKHASRShiftImm(MI, 3, O); return; break; case 6: // SXTAB, SXTAB16, SXTAH, UXTAB, UXTAB16, UXTAH, t2SXTAB, t2SXTAB16, t2SX... printRotImmOperand(MI, 3, O); return; break; case 7: // USAT, t2USAT printShiftImmOperand(MI, 3, O); return; break; case 8: // VLD3d16, VLD3d16_UPD, VLD3d32, VLD3d32_UPD, VLD3d8, VLD3d8_UPD, VLD3q1... SStream_concat0(O, "}, "); break; case 9: // VLD4LNd16, VLD4LNd32, VLD4LNd8, VLD4LNq16, VLD4LNq32, VST2LNd16, VST2L... SStream_concat0(O, "["); set_mem_access(MI, true); break; case 10: // VST1LNd16_UPD, VST1LNd32_UPD, VST1LNd8_UPD printAddrMode6OffsetOperand(MI, 3, O); return; break; case 11: // t2LDRD_POST, t2STRD_POST printT2AddrModeImm8s4OffsetOperand(MI, 4, O); return; break; } // Fragment 8 encoded into 4 bits for 13 unique commands. //printf("Frag-8: %"PRIu64"\n", (Bits >> 56) & 15); switch ((Bits >> 56) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // LDRD_POST, STRD_POST printAddrMode3OffsetOperand(MI, 4, O); return; break; case 1: // MLA, MLS, SMLABB, SMLABT, SMLAD, SMLADX, SMLALBB, SMLALBT, SMLALD, SML... printOperand(MI, 3, O); break; case 2: // SBFX, UBFX, t2SBFX, t2UBFX printImmPlusOneOperand(MI, 3, O); return; break; case 3: // VLD3d16, VLD3d32, VLD3d8, VLD3q16, VLD3q32, VLD3q8 printAddrMode6Operand(MI, 3, O); return; break; case 4: // VLD3d16_UPD, VLD3d32_UPD, VLD3d8_UPD, VLD3q16_UPD, VLD3q32_UPD, VLD3q8... printAddrMode6Operand(MI, 4, O); printAddrMode6OffsetOperand(MI, 6, O); return; break; case 5: // VLD4LNd16, VLD4LNd32, VLD4LNd8, VLD4LNq16, VLD4LNq32 printNoHashImmediate(MI, 10, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 4, O); return; break; case 6: // VST2LNd16, VST2LNd32, VST2LNd8, VST2LNq16, VST2LNq32 printNoHashImmediate(MI, 4, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 0, O); return; break; case 7: // VST3LNd16, VST3LNd32, VST3LNd8, VST3LNq16, VST3LNq32 printNoHashImmediate(MI, 5, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 4, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 5, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 0, O); return; break; case 8: // VST3d16, VST3d32, VST3d8, VST3q16, VST3q32, VST3q8 printAddrMode6Operand(MI, 0, O); return; break; case 9: // VST4LNd16, VST4LNd32, VST4LNd8, VST4LNq16, VST4LNq32 printNoHashImmediate(MI, 6, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 4, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 6, O); SStream_concat0(O, "], "); set_mem_access(MI, false); printOperand(MI, 5, O); SStream_concat0(O, "["); set_mem_access(MI, true); printNoHashImmediate(MI, 6, O); SStream_concat0(O, "]}, "); set_mem_access(MI, false); printAddrMode6Operand(MI, 0, O); return; break; case 10: // VST4d16, VST4d32, VST4d8, VST4q16, VST4q32, VST4q8 printOperand(MI, 5, O); SStream_concat0(O, "}, "); printAddrMode6Operand(MI, 0, O); return; break; case 11: // t2SMLSLDX printOperand(MI, 2, O); return; break; case 12: // t2STLEXD, t2STREXD printAddrMode7Operand(MI, 3, O); return; break; } // Fragment 9 encoded into 1 bits for 2 unique commands. //printf("Frag-9: %"PRIu64"\n", (Bits >> 60) & 1); if ((Bits >> 60) & 1) { // VLD4d16, VLD4d16_UPD, VLD4d32, VLD4d32_UPD, VLD4d8, VLD4d8_UPD, VLD4q1... SStream_concat0(O, "}, "); } else { // MLA, MLS, SMLABB, SMLABT, SMLAD, SMLADX, SMLALBB, SMLALBT, SMLALD, SML... return; } // Fragment 10 encoded into 1 bits for 2 unique commands. //printf("Frag-10: %"PRIu64"\n", (Bits >> 61) & 1); if ((Bits >> 61) & 1) { // VLD4d16_UPD, VLD4d32_UPD, VLD4d8_UPD, VLD4q16_UPD, VLD4q32_UPD, VLD4q8... printAddrMode6Operand(MI, 5, O); printAddrMode6OffsetOperand(MI, 7, O); return; } else { // VLD4d16, VLD4d32, VLD4d8, VLD4q16, VLD4q32, VLD4q8 printAddrMode6Operand(MI, 4, O); return; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 289 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'D', '4', '_', 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', 0, /* 13 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, /* 26 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, /* 39 */ 'd', '1', '0', 0, /* 43 */ 'q', '1', '0', 0, /* 47 */ 's', '1', '0', 0, /* 51 */ 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', 0, /* 67 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, /* 83 */ 'd', '2', '0', 0, /* 87 */ 's', '2', '0', 0, /* 91 */ 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', '_', 'D', '3', '0', 0, /* 107 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, /* 123 */ 'd', '3', '0', 0, /* 127 */ 's', '3', '0', 0, /* 131 */ 'd', '0', 0, /* 134 */ 'q', '0', 0, /* 137 */ 'm', 'v', 'f', 'r', '0', 0, /* 143 */ 's', '0', 0, /* 146 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, /* 157 */ 'D', '5', '_', 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', 0, /* 170 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, /* 184 */ 'R', '1', '0', '_', 'R', '1', '1', 0, /* 192 */ 'd', '1', '1', 0, /* 196 */ 'q', '1', '1', 0, /* 200 */ 's', '1', '1', 0, /* 204 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, /* 216 */ 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', 0, /* 232 */ 'd', '2', '1', 0, /* 236 */ 's', '2', '1', 0, /* 240 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, /* 252 */ 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', '_', 'D', '3', '1', 0, /* 268 */ 'd', '3', '1', 0, /* 272 */ 's', '3', '1', 0, /* 276 */ 'Q', '0', '_', 'Q', '1', 0, /* 282 */ 'R', '0', '_', 'R', '1', 0, /* 288 */ 'd', '1', 0, /* 291 */ 'q', '1', 0, /* 294 */ 'm', 'v', 'f', 'r', '1', 0, /* 300 */ 's', '1', 0, /* 303 */ 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', 0, /* 317 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, /* 332 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, /* 347 */ 'd', '1', '2', 0, /* 351 */ 'q', '1', '2', 0, /* 355 */ 's', '1', '2', 0, /* 359 */ 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', 0, /* 375 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, /* 391 */ 'd', '2', '2', 0, /* 395 */ 's', '2', '2', 0, /* 399 */ 'D', '0', '_', 'D', '2', 0, /* 405 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, /* 414 */ 'Q', '1', '_', 'Q', '2', 0, /* 420 */ 'd', '2', 0, /* 423 */ 'q', '2', 0, /* 426 */ 'm', 'v', 'f', 'r', '2', 0, /* 432 */ 's', '2', 0, /* 435 */ 'f', 'p', 'i', 'n', 's', 't', '2', 0, /* 443 */ 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', 0, /* 457 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, /* 469 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, /* 485 */ 'd', '1', '3', 0, /* 489 */ 'q', '1', '3', 0, /* 493 */ 's', '1', '3', 0, /* 497 */ 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', 0, /* 513 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, /* 525 */ 'd', '2', '3', 0, /* 529 */ 's', '2', '3', 0, /* 533 */ 'D', '1', '_', 'D', '3', 0, /* 539 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, /* 548 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, /* 560 */ 'R', '2', '_', 'R', '3', 0, /* 566 */ 'd', '3', 0, /* 569 */ 'q', '3', 0, /* 572 */ 'r', '3', 0, /* 575 */ 's', '3', 0, /* 578 */ 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', 0, /* 593 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, /* 609 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, /* 625 */ 'd', '1', '4', 0, /* 629 */ 'q', '1', '4', 0, /* 633 */ 's', '1', '4', 0, /* 637 */ 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', 0, /* 653 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, /* 669 */ 'd', '2', '4', 0, /* 673 */ 's', '2', '4', 0, /* 677 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', 0, /* 686 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, /* 698 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, /* 710 */ 'd', '4', 0, /* 713 */ 'q', '4', 0, /* 716 */ 'r', '4', 0, /* 719 */ 's', '4', 0, /* 722 */ 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', 0, /* 737 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, /* 749 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, /* 765 */ 'd', '1', '5', 0, /* 769 */ 'q', '1', '5', 0, /* 773 */ 's', '1', '5', 0, /* 777 */ 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', 0, /* 793 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, /* 805 */ 'd', '2', '5', 0, /* 809 */ 's', '2', '5', 0, /* 813 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', 0, /* 822 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, /* 831 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, /* 843 */ 'R', '4', '_', 'R', '5', 0, /* 849 */ 'd', '5', 0, /* 852 */ 'q', '5', 0, /* 855 */ 'r', '5', 0, /* 858 */ 's', '5', 0, /* 861 */ 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', 0, /* 877 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, /* 893 */ 'd', '1', '6', 0, /* 897 */ 's', '1', '6', 0, /* 901 */ 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', 0, /* 917 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, /* 933 */ 'd', '2', '6', 0, /* 937 */ 's', '2', '6', 0, /* 941 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', '_', 'D', '6', 0, /* 953 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, /* 965 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, /* 977 */ 'd', '6', 0, /* 980 */ 'q', '6', 0, /* 983 */ 'r', '6', 0, /* 986 */ 's', '6', 0, /* 989 */ 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', 0, /* 1005 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, /* 1017 */ 'd', '1', '7', 0, /* 1021 */ 's', '1', '7', 0, /* 1025 */ 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', 0, /* 1041 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, /* 1053 */ 'd', '2', '7', 0, /* 1057 */ 's', '2', '7', 0, /* 1061 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', '_', 'D', '7', 0, /* 1073 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, /* 1082 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, /* 1094 */ 'R', '6', '_', 'R', '7', 0, /* 1100 */ 'd', '7', 0, /* 1103 */ 'q', '7', 0, /* 1106 */ 'r', '7', 0, /* 1109 */ 's', '7', 0, /* 1112 */ 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', 0, /* 1128 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, /* 1144 */ 'd', '1', '8', 0, /* 1148 */ 's', '1', '8', 0, /* 1152 */ 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', 0, /* 1168 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, /* 1184 */ 'd', '2', '8', 0, /* 1188 */ 's', '2', '8', 0, /* 1192 */ 'D', '2', '_', 'D', '4', '_', 'D', '6', '_', 'D', '8', 0, /* 1204 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, /* 1216 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, /* 1228 */ 'd', '8', 0, /* 1231 */ 'q', '8', 0, /* 1234 */ 'r', '8', 0, /* 1237 */ 's', '8', 0, /* 1240 */ 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', 0, /* 1256 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, /* 1268 */ 'd', '1', '9', 0, /* 1272 */ 's', '1', '9', 0, /* 1276 */ 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', 0, /* 1292 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, /* 1304 */ 'd', '2', '9', 0, /* 1308 */ 's', '2', '9', 0, /* 1312 */ 'D', '3', '_', 'D', '5', '_', 'D', '7', '_', 'D', '9', 0, /* 1324 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, /* 1333 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, /* 1345 */ 'R', '8', '_', 'R', '9', 0, /* 1351 */ 'd', '9', 0, /* 1354 */ 'q', '9', 0, /* 1357 */ 's', '9', 0, /* 1360 */ 'R', '1', '2', '_', 'S', 'P', 0, /* 1367 */ 's', 'b', 0, /* 1370 */ 'p', 'c', 0, /* 1373 */ 'f', 'p', 'e', 'x', 'c', 0, /* 1379 */ 'f', 'p', 's', 'i', 'd', 0, /* 1385 */ 'i', 't', 's', 't', 'a', 't', 'e', 0, /* 1393 */ 's', 'l', 0, /* 1396 */ 'f', 'p', 0, /* 1399 */ 'i', 'p', 0, /* 1402 */ 's', 'p', 0, /* 1405 */ 'f', 'p', 's', 'c', 'r', 0, /* 1411 */ 'l', 'r', 0, /* 1414 */ 'a', 'p', 's', 'r', 0, /* 1419 */ 'c', 'p', 's', 'r', 0, /* 1424 */ 's', 'p', 's', 'r', 0, /* 1429 */ 'f', 'p', 'i', 'n', 's', 't', 0, /* 1436 */ 'f', 'p', 's', 'c', 'r', '_', 'n', 'z', 'c', 'v', 0, /* 1447 */ 'a', 'p', 's', 'r', '_', 'n', 'z', 'c', 'v', 0, }; static const uint16_t RegAsmOffset[] = { 1414, 1447, 1419, 1373, 1429, 1405, 1436, 1379, 1385, 1411, 1370, 1402, 1424, 131, 288, 420, 566, 710, 849, 977, 1100, 1228, 1351, 39, 192, 347, 485, 625, 765, 893, 1017, 1144, 1268, 83, 232, 391, 525, 669, 805, 933, 1053, 1184, 1304, 123, 268, 435, 137, 294, 426, 134, 291, 423, 569, 713, 852, 980, 1103, 1231, 1354, 43, 196, 351, 489, 629, 769, 140, 297, 429, 572, 716, 855, 983, 1106, 1234, 1367, 1393, 1396, 1399, 143, 300, 432, 575, 719, 858, 986, 1109, 1237, 1357, 47, 200, 355, 493, 633, 773, 897, 1021, 1148, 1272, 87, 236, 395, 529, 673, 809, 937, 1057, 1188, 1308, 127, 272, 399, 533, 680, 816, 947, 1067, 1198, 1318, 6, 163, 309, 449, 585, 729, 869, 997, 1120, 1248, 59, 224, 367, 505, 645, 785, 909, 1033, 1160, 1284, 99, 260, 276, 414, 554, 704, 837, 971, 1088, 1222, 1339, 32, 176, 339, 477, 617, 757, 548, 698, 831, 965, 1082, 1216, 1333, 26, 170, 332, 469, 609, 749, 1360, 282, 560, 843, 1094, 1345, 184, 405, 539, 689, 822, 956, 1073, 1207, 1324, 16, 146, 320, 457, 597, 737, 881, 1005, 1132, 1256, 71, 204, 379, 513, 657, 793, 921, 1041, 1172, 1292, 111, 240, 677, 813, 944, 1064, 1195, 1315, 3, 160, 306, 446, 581, 725, 865, 993, 1116, 1244, 55, 220, 363, 501, 641, 781, 905, 1029, 1156, 1280, 95, 256, 941, 1061, 1192, 1312, 0, 157, 303, 443, 578, 722, 861, 989, 1112, 1240, 51, 216, 359, 497, 637, 777, 901, 1025, 1152, 1276, 91, 252, 408, 692, 959, 1210, 19, 324, 601, 885, 1136, 75, 383, 661, 925, 1176, 115, 686, 953, 1204, 13, 317, 593, 877, 1128, 67, 375, 653, 917, 1168, 107, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } // get registers with number only static const char *getRegisterName2(unsigned RegNo) { // assert(RegNo && RegNo < 289 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'D', '4', '_', 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', 0, /* 13 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, /* 26 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, /* 39 */ 'd', '1', '0', 0, /* 43 */ 'q', '1', '0', 0, /* 47 */ 'r', '1', '0', 0, /* 51 */ 's', '1', '0', 0, /* 55 */ 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', 0, /* 71 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, /* 87 */ 'd', '2', '0', 0, /* 91 */ 's', '2', '0', 0, /* 95 */ 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', '_', 'D', '3', '0', 0, /* 111 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, /* 127 */ 'd', '3', '0', 0, /* 131 */ 's', '3', '0', 0, /* 135 */ 'd', '0', 0, /* 138 */ 'q', '0', 0, /* 141 */ 'm', 'v', 'f', 'r', '0', 0, /* 147 */ 's', '0', 0, /* 150 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, /* 161 */ 'D', '5', '_', 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', 0, /* 174 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, /* 188 */ 'R', '1', '0', '_', 'R', '1', '1', 0, /* 196 */ 'd', '1', '1', 0, /* 200 */ 'q', '1', '1', 0, /* 204 */ 'r', '1', '1', 0, /* 208 */ 's', '1', '1', 0, /* 212 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, /* 224 */ 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', 0, /* 240 */ 'd', '2', '1', 0, /* 244 */ 's', '2', '1', 0, /* 248 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, /* 260 */ 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', '_', 'D', '3', '1', 0, /* 276 */ 'd', '3', '1', 0, /* 280 */ 's', '3', '1', 0, /* 284 */ 'Q', '0', '_', 'Q', '1', 0, /* 290 */ 'R', '0', '_', 'R', '1', 0, /* 296 */ 'd', '1', 0, /* 299 */ 'q', '1', 0, /* 302 */ 'm', 'v', 'f', 'r', '1', 0, /* 308 */ 's', '1', 0, /* 311 */ 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', 0, /* 325 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, /* 340 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, /* 355 */ 'd', '1', '2', 0, /* 359 */ 'q', '1', '2', 0, /* 363 */ 'r', '1', '2', 0, /* 367 */ 's', '1', '2', 0, /* 371 */ 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', 0, /* 387 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, /* 403 */ 'd', '2', '2', 0, /* 407 */ 's', '2', '2', 0, /* 411 */ 'D', '0', '_', 'D', '2', 0, /* 417 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, /* 426 */ 'Q', '1', '_', 'Q', '2', 0, /* 432 */ 'd', '2', 0, /* 435 */ 'q', '2', 0, /* 438 */ 'm', 'v', 'f', 'r', '2', 0, /* 444 */ 's', '2', 0, /* 447 */ 'f', 'p', 'i', 'n', 's', 't', '2', 0, /* 455 */ 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', 0, /* 469 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, /* 481 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, /* 497 */ 'd', '1', '3', 0, /* 501 */ 'q', '1', '3', 0, /* 505 */ 's', '1', '3', 0, /* 509 */ 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', 0, /* 525 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, /* 537 */ 'd', '2', '3', 0, /* 541 */ 's', '2', '3', 0, /* 545 */ 'D', '1', '_', 'D', '3', 0, /* 551 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, /* 560 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, /* 572 */ 'R', '2', '_', 'R', '3', 0, /* 578 */ 'd', '3', 0, /* 581 */ 'q', '3', 0, /* 584 */ 'r', '3', 0, /* 587 */ 's', '3', 0, /* 590 */ 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', 0, /* 605 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, /* 621 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, /* 637 */ 'd', '1', '4', 0, /* 641 */ 'q', '1', '4', 0, /* 645 */ 's', '1', '4', 0, /* 649 */ 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', 0, /* 665 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, /* 681 */ 'd', '2', '4', 0, /* 685 */ 's', '2', '4', 0, /* 689 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', 0, /* 698 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, /* 710 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, /* 722 */ 'd', '4', 0, /* 725 */ 'q', '4', 0, /* 728 */ 'r', '4', 0, /* 731 */ 's', '4', 0, /* 734 */ 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', 0, /* 749 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, /* 761 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, /* 777 */ 'd', '1', '5', 0, /* 781 */ 'q', '1', '5', 0, /* 785 */ 's', '1', '5', 0, /* 789 */ 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', 0, /* 805 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, /* 817 */ 'd', '2', '5', 0, /* 821 */ 's', '2', '5', 0, /* 825 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', 0, /* 834 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, /* 843 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, /* 855 */ 'R', '4', '_', 'R', '5', 0, /* 861 */ 'd', '5', 0, /* 864 */ 'q', '5', 0, /* 867 */ 'r', '5', 0, /* 870 */ 's', '5', 0, /* 873 */ 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', 0, /* 889 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, /* 905 */ 'd', '1', '6', 0, /* 909 */ 's', '1', '6', 0, /* 913 */ 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', 0, /* 929 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, /* 945 */ 'd', '2', '6', 0, /* 949 */ 's', '2', '6', 0, /* 953 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', '_', 'D', '6', 0, /* 965 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, /* 977 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, /* 989 */ 'd', '6', 0, /* 992 */ 'q', '6', 0, /* 995 */ 'r', '6', 0, /* 998 */ 's', '6', 0, /* 1001 */ 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', 0, /* 1017 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, /* 1029 */ 'd', '1', '7', 0, /* 1033 */ 's', '1', '7', 0, /* 1037 */ 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', 0, /* 1053 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, /* 1065 */ 'd', '2', '7', 0, /* 1069 */ 's', '2', '7', 0, /* 1073 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', '_', 'D', '7', 0, /* 1085 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, /* 1094 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, /* 1106 */ 'R', '6', '_', 'R', '7', 0, /* 1112 */ 'd', '7', 0, /* 1115 */ 'q', '7', 0, /* 1118 */ 'r', '7', 0, /* 1121 */ 's', '7', 0, /* 1124 */ 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', 0, /* 1140 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, /* 1156 */ 'd', '1', '8', 0, /* 1160 */ 's', '1', '8', 0, /* 1164 */ 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', 0, /* 1180 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, /* 1196 */ 'd', '2', '8', 0, /* 1200 */ 's', '2', '8', 0, /* 1204 */ 'D', '2', '_', 'D', '4', '_', 'D', '6', '_', 'D', '8', 0, /* 1216 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, /* 1228 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, /* 1240 */ 'd', '8', 0, /* 1243 */ 'q', '8', 0, /* 1246 */ 'r', '8', 0, /* 1249 */ 's', '8', 0, /* 1252 */ 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', 0, /* 1268 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, /* 1280 */ 'd', '1', '9', 0, /* 1284 */ 's', '1', '9', 0, /* 1288 */ 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', 0, /* 1304 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, /* 1316 */ 'd', '2', '9', 0, /* 1320 */ 's', '2', '9', 0, /* 1324 */ 'D', '3', '_', 'D', '5', '_', 'D', '7', '_', 'D', '9', 0, /* 1336 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, /* 1345 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, /* 1357 */ 'R', '8', '_', 'R', '9', 0, /* 1363 */ 'd', '9', 0, /* 1366 */ 'q', '9', 0, /* 1369 */ 'r', '9', 0, /* 1372 */ 's', '9', 0, /* 1375 */ 'R', '1', '2', '_', 'S', 'P', 0, /* 1382 */ 'p', 'c', 0, /* 1385 */ 'f', 'p', 'e', 'x', 'c', 0, /* 1391 */ 'f', 'p', 's', 'i', 'd', 0, /* 1397 */ 'i', 't', 's', 't', 'a', 't', 'e', 0, /* 1405 */ 's', 'p', 0, /* 1408 */ 'f', 'p', 's', 'c', 'r', 0, /* 1414 */ 'l', 'r', 0, /* 1417 */ 'a', 'p', 's', 'r', 0, /* 1422 */ 'c', 'p', 's', 'r', 0, /* 1427 */ 's', 'p', 's', 'r', 0, /* 1432 */ 'f', 'p', 'i', 'n', 's', 't', 0, /* 1439 */ 'f', 'p', 's', 'c', 'r', '_', 'n', 'z', 'c', 'v', 0, /* 1450 */ 'a', 'p', 's', 'r', '_', 'n', 'z', 'c', 'v', 0, }; static const uint32_t RegAsmOffset[] = { 1417, 1450, 1422, 1385, 1432, 1408, 1439, 1391, 1397, 1414, 1382, 1405, 1427, 135, 296, 432, 578, 722, 861, 989, 1112, 1240, 1363, 39, 196, 355, 497, 637, 777, 905, 1029, 1156, 1280, 87, 240, 403, 537, 681, 817, 945, 1065, 1196, 1316, 127, 276, 447, 141, 302, 438, 138, 299, 435, 581, 725, 864, 992, 1115, 1243, 1366, 43, 200, 359, 501, 641, 781, 144, 305, 441, 584, 728, 867, 995, 1118, 1246, 1369, 47, 204, 363, 147, 308, 444, 587, 731, 870, 998, 1121, 1249, 1372, 51, 208, 367, 505, 645, 785, 909, 1033, 1160, 1284, 91, 244, 407, 541, 685, 821, 949, 1069, 1200, 1320, 131, 280, 411, 545, 692, 828, 959, 1079, 1210, 1330, 6, 167, 317, 461, 597, 741, 881, 1009, 1132, 1260, 63, 232, 379, 517, 657, 797, 921, 1045, 1172, 1296, 103, 268, 284, 426, 566, 716, 849, 983, 1100, 1234, 1351, 32, 180, 347, 489, 629, 769, 560, 710, 843, 977, 1094, 1228, 1345, 26, 174, 340, 481, 621, 761, 1375, 290, 572, 855, 1106, 1357, 188, 417, 551, 701, 834, 968, 1085, 1219, 1336, 16, 150, 328, 469, 609, 749, 893, 1017, 1144, 1268, 75, 212, 391, 525, 669, 805, 933, 1053, 1184, 1304, 115, 248, 689, 825, 956, 1076, 1207, 1327, 3, 164, 314, 458, 593, 737, 877, 1005, 1128, 1256, 59, 228, 375, 513, 653, 793, 917, 1041, 1168, 1292, 99, 264, 953, 1073, 1204, 1324, 0, 161, 311, 455, 590, 734, 873, 1001, 1124, 1252, 55, 224, 371, 509, 649, 789, 913, 1037, 1164, 1288, 95, 260, 420, 704, 971, 1222, 19, 332, 613, 897, 1148, 79, 395, 673, 937, 1188, 119, 698, 965, 1216, 13, 325, 605, 889, 1140, 71, 387, 665, 929, 1180, 111, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/4; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { switch (PrintMethodIdx) { default: // llvm_unreachable("Unknown PrintMethod kind"); break; case 0: printPredicateOperand(MI, OpIdx, OS); break; case 1: printSBitModifierOperand(MI, OpIdx, OS); break; case 2: printFPImmOperand(MI, OpIdx, OS); break; case 3: printRegisterList(MI, OpIdx, OS); break; case 4: printPImmediate(MI, OpIdx, OS); break; case 5: printCImmediate(MI, OpIdx, OS); break; case 6: printImmPlusOneOperand(MI, OpIdx, OS); break; case 7: printAddrMode5Operand(MI, OpIdx, OS, false); break; case 8: printNEONModImmOperand(MI, OpIdx, OS); break; case 9: printT2SOOperand(MI, OpIdx, OS); break; case 10: printAdrLabelOperand<0>(MI, OpIdx, OS, 0); break; case 11: printThumbSRImm(MI, OpIdx, OS); break; case 12: printAddrModeImm12Operand(MI, OpIdx, OS, false); break; case 13: printThumbLdrLabelOperand(MI, OpIdx, OS); break; case 14: printT2AddrModeSoRegOperand(MI, OpIdx, OS); break; case 15: printRotImmOperand(MI, OpIdx, OS); break; case 16: printCPSIMod(MI, OpIdx, OS); break; } } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case ARM_ANDri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (ANDri rGPR:$Rd, rGPR:$Rn, mod_imm_not:$imm, pred:$p, cc_out:$s) AsmString = "bic$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (ANDri rGPR:$Rdn, rGPR:$Rdn, mod_imm_not:$imm, pred:$p, cc_out:$s) AsmString = "bic$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_BICri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (BICri rGPR:$Rd, rGPR:$Rn, mod_imm_not:$imm, pred:$p, cc_out:$s) AsmString = "and$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (BICri rGPR:$Rdn, rGPR:$Rdn, mod_imm_not:$imm, pred:$p, cc_out:$s) AsmString = "and$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_BKPT: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (BKPT 0) AsmString = "bkpt"; break; } return NULL; case ARM_CMNri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (CMNri rGPR:$Rd, mod_imm_neg:$imm, pred:$p) AsmString = "cmp$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_CMPri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (CMPri rGPR:$Rd, mod_imm_neg:$imm, pred:$p) AsmString = "cmn$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_DMB: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (DMB 15) AsmString = "dmb"; break; } return NULL; case ARM_DSB: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (DSB 15) AsmString = "dsb"; break; } return NULL; case ARM_FCONSTD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (FCONSTD DPR:$Dd, vfp_f64imm:$val, pred:$p) AsmString = "fconstd$\xFF\x03\x01 $\x01, $\xFF\x02\x03"; break; } return NULL; case ARM_FCONSTS: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) { // (FCONSTS SPR:$Sd, vfp_f32imm:$val, pred:$p) AsmString = "fconsts$\xFF\x03\x01 $\x01, $\xFF\x02\x03"; break; } return NULL; case ARM_FMSTAT: if (MCInst_getNumOperands(MI) == 2) { // (FMSTAT pred:$p) AsmString = "fmstat$\xFF\x01\x01"; break; } return NULL; case ARM_HINT: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (HINT 0, pred:$p) AsmString = "nop$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { // (HINT 1, pred:$p) AsmString = "yield$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { // (HINT 2, pred:$p) AsmString = "wfe$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 3) { // (HINT 3, pred:$p) AsmString = "wfi$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4) { // (HINT 4, pred:$p) AsmString = "sev$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 5) { // (HINT 5, pred:$p) AsmString = "sevl$\xFF\x02\x01"; break; } return NULL; case ARM_ISB: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (ISB 15) AsmString = "isb"; break; } return NULL; case ARM_LDMIA_UPD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) { // (LDMIA_UPD SP, pred:$p, reglist:$regs) AsmString = "pop$\xFF\x02\x01 $\xFF\x04\x04"; break; } return NULL; case ARM_MCR: if (MCInst_getNumOperands(MI) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, c_imm:$CRm, 0, pred:$p) AsmString = "mcr$\xFF\x07\x01 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_MCR2: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, c_imm:$CRm, 0) AsmString = "mcr2 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_MLA: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isReg(MCInst_getOperand(MI, 3)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 3)) { // (MLA GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra, pred:$p, cc_out:$s) AsmString = "mla$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04"; break; } return NULL; case ARM_MOVi: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (MOVi rGPR:$Rd, mod_imm_not:$imm, pred:$p, cc_out:$s) AsmString = "mvn$\xFF\x05\x02$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_MOVi16: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (MOVi16 GPR:$Rd, imm0_65535_expr:$imm, pred:$p) AsmString = "mov$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_MRC: if (MCInst_getNumOperands(MI) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, 0, pred:$p) AsmString = "mrc$\xFF\x07\x01 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_MRC2: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (MRC2 GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, 0) AsmString = "mrc2 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_MRS: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (MRS GPRnopc:$Rd, pred:$p) AsmString = "mrs$\xFF\x02\x01 $\x01, cpsr"; break; } return NULL; case ARM_MUL: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2)) { // (MUL GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, cc_out:$s) AsmString = "mul$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_MVNi: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (MVNi rGPR:$Rd, mod_imm_not:$imm, pred:$p, cc_out:$s) AsmString = "mov$\xFF\x05\x02$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_RSBri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (RSBri GPR:$Rd, GPR:$Rm, 0, pred:$p, cc_out:$s) AsmString = "neg$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_SMLAL: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isReg(MCInst_getOperand(MI, 3)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) { // (SMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s) AsmString = "smlal$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04"; break; } return NULL; case ARM_SMULL: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isReg(MCInst_getOperand(MI, 3)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) { // (SMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s) AsmString = "smull$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04"; break; } return NULL; case ARM_SRSDA: if (MCInst_getNumOperands(MI) == 1) { // (SRSDA imm0_31:$mode) AsmString = "srsda $\x01"; break; } return NULL; case ARM_SRSDA_UPD: if (MCInst_getNumOperands(MI) == 1) { // (SRSDA_UPD imm0_31:$mode) AsmString = "srsda $\x01!"; break; } return NULL; case ARM_SRSDB: if (MCInst_getNumOperands(MI) == 1) { // (SRSDB imm0_31:$mode) AsmString = "srsdb $\x01"; break; } return NULL; case ARM_SRSDB_UPD: if (MCInst_getNumOperands(MI) == 1) { // (SRSDB_UPD imm0_31:$mode) AsmString = "srsdb $\x01!"; break; } return NULL; case ARM_SRSIA: if (MCInst_getNumOperands(MI) == 1) { // (SRSIA imm0_31:$mode) AsmString = "srsia $\x01"; break; } return NULL; case ARM_SRSIA_UPD: if (MCInst_getNumOperands(MI) == 1) { // (SRSIA_UPD imm0_31:$mode) AsmString = "srsia $\x01!"; break; } return NULL; case ARM_SRSIB: if (MCInst_getNumOperands(MI) == 1) { // (SRSIB imm0_31:$mode) AsmString = "srsib $\x01"; break; } return NULL; case ARM_SRSIB_UPD: if (MCInst_getNumOperands(MI) == 1) { // (SRSIB_UPD imm0_31:$mode) AsmString = "srsib $\x01!"; break; } return NULL; case ARM_SSAT: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SSAT GPRnopc:$Rd, imm1_32:$sat_imm, GPRnopc:$Rn, 0, pred:$p) AsmString = "ssat$\xFF\x05\x01 $\x01, $\xFF\x02\x07, $\x03"; break; } return NULL; case ARM_STMDB_UPD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) { // (STMDB_UPD SP, pred:$p, reglist:$regs) AsmString = "push$\xFF\x02\x01 $\xFF\x04\x04"; break; } return NULL; case ARM_SUBri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1)) { // (SUBri GPR:$Rd, GPR:$Rn, mod_imm_neg:$imm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (SUBri GPR:$Rd, GPR:$Rd, mod_imm_neg:$imm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_SXTAB: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SXTAB GPRnopc:$Rd, GPR:$Rn, GPRnopc:$Rm, 0, pred:$p) AsmString = "sxtab$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_SXTAB16: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SXTAB16 GPRnopc:$Rd, GPR:$Rn, GPRnopc:$Rm, 0, pred:$p) AsmString = "sxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_SXTAH: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (SXTAH GPRnopc:$Rd, GPR:$Rn, GPRnopc:$Rm, 0, pred:$p) AsmString = "sxtah$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_SXTB: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (SXTB GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p) AsmString = "sxtb$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_SXTB16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (SXTB16 GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p) AsmString = "sxtb16$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_SXTH: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (SXTH GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p) AsmString = "sxth$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_UMLAL: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isReg(MCInst_getOperand(MI, 3)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) { // (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s) AsmString = "umlal$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04"; break; } return NULL; case ARM_UMULL: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isReg(MCInst_getOperand(MI, 3)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) { // (UMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s) AsmString = "umull$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04"; break; } return NULL; case ARM_USAT: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (USAT GPRnopc:$Rd, imm0_31:$sat_imm, GPRnopc:$Rn, 0, pred:$p) AsmString = "usat$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_UXTAB: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (UXTAB GPRnopc:$Rd, GPR:$Rn, GPRnopc:$Rm, 0, pred:$p) AsmString = "uxtab$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_UXTAB16: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (UXTAB16 GPRnopc:$Rd, GPR:$Rn, GPRnopc:$Rm, 0, pred:$p) AsmString = "uxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_UXTAH: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (UXTAH GPRnopc:$Rd, GPR:$Rn, GPRnopc:$Rm, 0, pred:$p) AsmString = "uxtah$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_UXTB: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (UXTB GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p) AsmString = "uxtb$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_UXTB16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (UXTB16 GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p) AsmString = "uxtb16$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_UXTH: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (UXTH GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p) AsmString = "uxth$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_VACGEd: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VACGEd DPR:$Vd, DPR:$Vm, DPR:$Vn, pred:$p) AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (VACGEd DPR:$Vd, DPR:$Vm, DPR:$Vd, pred:$p) AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x02"; break; } return NULL; case ARM_VACGEq: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VACGEq QPR:$Vd, QPR:$Vm, QPR:$Vn, pred:$p) AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (VACGEq QPR:$Vd, QPR:$Vm, QPR:$Vd, pred:$p) AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x02"; break; } return NULL; case ARM_VACGTd: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VACGTd DPR:$Vd, DPR:$Vm, DPR:$Vn, pred:$p) AsmString = "vaclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (VACGTd DPR:$Vd, DPR:$Vm, DPR:$Vd, pred:$p) AsmString = "vaclt$\xFF\x04\x01.f32 $\x01, $\x02"; break; } return NULL; case ARM_VACGTq: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VACGTq QPR:$Vd, QPR:$Vm, QPR:$Vn, pred:$p) AsmString = "vaclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (VACGTq QPR:$Vd, QPR:$Vm, QPR:$Vd, pred:$p) AsmString = "vaclt$\xFF\x04\x01.f32 $\x01, $\x02"; break; } return NULL; case ARM_VADDD: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VADDD DPR:$Dd, DPR:$Dn, DPR:$Dm, pred:$p) AsmString = "faddd$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_VADDS: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 2)) { // (VADDS SPR:$Sd, SPR:$Sn, SPR:$Sm, pred:$p) AsmString = "fadds$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_VBICiv2i32: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (VBICiv2i32 DPR:$Vd, nImmSplatNotI32:$imm, pred:$p) AsmString = "vand$\xFF\x03\x01.i32 $\x01, $\x02"; break; } return NULL; case ARM_VBICiv4i16: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (VBICiv4i16 DPR:$Vd, nImmSplatNotI16:$imm, pred:$p) AsmString = "vand$\xFF\x03\x01.i16 $\x01, $\x02"; break; } return NULL; case ARM_VBICiv4i32: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0)) { // (VBICiv4i32 QPR:$Vd, nImmSplatNotI32:$imm, pred:$p) AsmString = "vand$\xFF\x03\x01.i32 $\x01, $\x02"; break; } return NULL; case ARM_VBICiv8i16: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0)) { // (VBICiv8i16 QPR:$Vd, nImmSplatNotI16:$imm, pred:$p) AsmString = "vand$\xFF\x03\x01.i16 $\x01, $\x02"; break; } return NULL; case ARM_VCGEfd: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEfd DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEfq: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEfq QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEsv16i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEsv16i8 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.s8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEsv2i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEsv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.s32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEsv4i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEsv4i16 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.s16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEsv4i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEsv4i32 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.s32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEsv8i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEsv8i16 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.s16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEsv8i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEsv8i8 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.s8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEuv16i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEuv16i8 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.u8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEuv2i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEuv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.u32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEuv4i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEuv4i16 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.u16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEuv4i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEuv4i32 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.u32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEuv8i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGEuv8i16 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vcle$\xFF\x04\x01.u16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGEuv8i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGEuv8i8 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vcle$\xFF\x04\x01.u8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTfd: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTfd DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTfq: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTfq QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTsv16i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTsv16i8 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.s8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTsv2i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTsv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.s32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTsv4i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTsv4i16 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.s16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTsv4i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTsv4i32 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.s32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTsv8i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTsv8i16 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.s16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTsv8i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTsv8i8 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.s8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTuv16i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTuv16i8 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.u8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTuv2i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTuv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.u32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTuv4i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTuv4i16 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.u16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTuv4i32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTuv4i32 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.u32 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTuv8i16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) { // (VCGTuv8i16 QPR:$Qd, QPR:$Qm, QPR:$Qn, pred:$p) AsmString = "vclt$\xFF\x04\x01.u16 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCGTuv8i8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VCGTuv8i8 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p) AsmString = "vclt$\xFF\x04\x01.u8 $\x01, $\x03, $\x02"; break; } return NULL; case ARM_VCMPZD: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (VCMPZD DPR:$val, pred:$p) AsmString = "fcmpzd$\xFF\x02\x01 $\x01"; break; } return NULL; case ARM_VCMPZS: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) { // (VCMPZS SPR:$val, pred:$p) AsmString = "fcmpzs$\xFF\x02\x01 $\x01"; break; } return NULL; case ARM_VLDRD: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (VLDRD DPR:$Dd, addrmode5:$addr, pred:$p) AsmString = "vldr$\xFF\x04\x01.64 $\x01, $\xFF\x02\x08"; break; } return NULL; case ARM_VLDRS: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) { // (VLDRS SPR:$Sd, addrmode5:$addr, pred:$p) AsmString = "vldr$\xFF\x04\x01.32 $\x01, $\xFF\x02\x08"; break; } return NULL; case ARM_VMOVDRR: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2)) { // (VMOVDRR DPR:$Dn, GPR:$Rt, GPR:$Rt2, pred:$p) AsmString = "vmov$\xFF\x04\x01.f64 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_VMOVRRD: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VMOVRRD GPR:$Rt, GPR:$Rt2, DPR:$Dn, pred:$p) AsmString = "vmov$\xFF\x04\x01.f64 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_VMOVS: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VMOVS SPR:$Sd, SPR:$Sm, pred:$p) AsmString = "vmov$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_VMVNv2i32: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (VMVNv2i32 DPR:$Vd, nImmVMOVI32Neg:$imm, pred:$p) AsmString = "vmov$\xFF\x03\x01.i32 $\x01, $\xFF\x02\x09"; break; } return NULL; case ARM_VMVNv4i32: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0)) { // (VMVNv4i32 QPR:$Vd, nImmVMOVI32Neg:$imm, pred:$p) AsmString = "vmov$\xFF\x03\x01.i32 $\x01, $\xFF\x02\x09"; break; } return NULL; case ARM_VRINTAD: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTAD DPR:$Dd, DPR:$Dm) AsmString = "vrinta.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTAND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTAND DPR:$Dd, DPR:$Dm) AsmString = "vrinta.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTANQ: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) { // (VRINTANQ QPR:$Qd, QPR:$Qm) AsmString = "vrinta.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTAS: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTAS SPR:$Sd, SPR:$Sm) AsmString = "vrinta.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTMD: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTMD DPR:$Dd, DPR:$Dm) AsmString = "vrintm.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTMND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTMND DPR:$Dd, DPR:$Dm) AsmString = "vrintm.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTMNQ: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) { // (VRINTMNQ QPR:$Qd, QPR:$Qm) AsmString = "vrintm.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTMS: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTMS SPR:$Sd, SPR:$Sm) AsmString = "vrintm.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTND DPR:$Dd, DPR:$Dm) AsmString = "vrintn.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTNND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTNND DPR:$Dd, DPR:$Dm) AsmString = "vrintn.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTNNQ: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) { // (VRINTNNQ QPR:$Qd, QPR:$Qm) AsmString = "vrintn.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTNS: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTNS SPR:$Sd, SPR:$Sm) AsmString = "vrintn.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTPD: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTPD DPR:$Dd, DPR:$Dm) AsmString = "vrintp.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTPND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTPND DPR:$Dd, DPR:$Dm) AsmString = "vrintp.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTPNQ: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) { // (VRINTPNQ QPR:$Qd, QPR:$Qm) AsmString = "vrintp.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTPS: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTPS SPR:$Sd, SPR:$Sm) AsmString = "vrintp.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTRD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTRD DPR:$Dd, DPR:$Dm, pred:$p) AsmString = "vrintr$\xFF\x03\x01.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTRS: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTRS SPR:$Sd, SPR:$Sm, pred:$p) AsmString = "vrintr$\xFF\x03\x01.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTXD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTXD DPR:$Dd, DPR:$Dm, pred:$p) AsmString = "vrintx$\xFF\x03\x01.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTXND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTXND DPR:$Dd, DPR:$Dm) AsmString = "vrintx.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTXNQ: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) { // (VRINTXNQ QPR:$Qd, QPR:$Qm) AsmString = "vrintx.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTXS: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTXS SPR:$Sd, SPR:$Sm, pred:$p) AsmString = "vrintx$\xFF\x03\x01.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTZD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTZD DPR:$Dd, DPR:$Dm, pred:$p) AsmString = "vrintz$\xFF\x03\x01.f64.f64 $\x01, $\x02"; break; } return NULL; case ARM_VRINTZND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VRINTZND DPR:$Dd, DPR:$Dm) AsmString = "vrintz.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTZNQ: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) { // (VRINTZNQ QPR:$Qd, QPR:$Qm) AsmString = "vrintz.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VRINTZS: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VRINTZS SPR:$Sd, SPR:$Sm, pred:$p) AsmString = "vrintz$\xFF\x03\x01.f32.f32 $\x01, $\x02"; break; } return NULL; case ARM_VSETLNi32: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (VSETLNi32 DPR:$Dd, GPR:$Rn, 1, pred:$p) AsmString = "fmdhr$\xFF\x04\x01 $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (VSETLNi32 DPR:$Dd, GPR:$Rn, 0, pred:$p) AsmString = "fmdlr$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_VSQRTD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) { // (VSQRTD DPR:$Dd, DPR:$Dm, pred:$p) AsmString = "vsqrt$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_VSQRTS: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) { // (VSQRTS SPR:$Sd, SPR:$Sm, pred:$p) AsmString = "vsqrt$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_VSTRD: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) { // (VSTRD DPR:$Dd, addrmode5:$addr, pred:$p) AsmString = "vstr$\xFF\x04\x01.64 $\x01, $\xFF\x02\x08"; break; } return NULL; case ARM_VSTRS: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) { // (VSTRS SPR:$Sd, addrmode5:$addr, pred:$p) AsmString = "vstr$\xFF\x04\x01.32 $\x01, $\xFF\x02\x08"; break; } return NULL; case ARM_VSUBD: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) { // (VSUBD DPR:$Dd, DPR:$Dn, DPR:$Dm, pred:$p) AsmString = "fsubd$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_VSUBS: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 2)) { // (VSUBS SPR:$Sd, SPR:$Sn, SPR:$Sm, pred:$p) AsmString = "fsubs$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2ADCrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ADCrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "adc$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2ADCrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2ADCrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "adc$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2ADDri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1)) { // (t2ADDri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2ADDri GPRnopc:$Rdn, GPRnopc:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_t2ADDri12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1)) { // (t2ADDri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p) AsmString = "add$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2ADDri12 GPRnopc:$Rdn, GPRnopc:$Rdn, imm0_4095:$imm, pred:$p) AsmString = "add$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_t2ADDrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ADDrr GPRnopc:$Rd, GPRnopc:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ADDrr GPRnopc:$Rdn, GPRnopc:$Rdn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_t2ADDrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1)) { // (t2ADDrs GPRnopc:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2ADDrs GPRnopc:$Rdn, GPRnopc:$Rdn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "add$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2ADR: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2ADR rGPR:$Rd, t2adrlabel:$addr, pred:$p) AsmString = "adr$\xFF\x03\x01 $\x01, $\xFF\x02\x0B"; break; } return NULL; case ARM_t2ANDrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ANDrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "and$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2ANDrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2ANDrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$shift, pred:$p, cc_out:$s) AsmString = "and$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2ASRri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2ASRri rGPR:$Rd, rGPR:$Rn, imm_sr:$imm, pred:$p, cc_out:$s) AsmString = "asr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\xFF\x03\x0C"; break; } return NULL; case ARM_t2ASRrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ASRrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "asr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2BICrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2BICrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "bic$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2BICrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2BICrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$shift, pred:$p, cc_out:$s) AsmString = "bic$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2CMNri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2CMNri GPRnopc:$Rn, t2_so_imm:$imm, pred:$p) AsmString = "cmn$\xFF\x03\x01 $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2CMNri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p) AsmString = "cmp$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2CMNzrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2CMNzrr GPRnopc:$Rn, rGPR:$Rm, pred:$p) AsmString = "cmn$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2CMNzrs: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2CMNzrs GPRnopc:$Rn, t2_so_reg:$shift, pred:$p) AsmString = "cmn$\xFF\x04\x01 $\x01, $\xFF\x02\x0A"; break; } return NULL; case ARM_t2CMPri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2CMPri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p) AsmString = "cmn$\xFF\x03\x01 $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2CMPri GPRnopc:$Rn, t2_so_imm:$imm, pred:$p) AsmString = "cmp$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2CMPrs: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2CMPrs GPRnopc:$Rn, t2_so_reg:$shift, pred:$p) AsmString = "cmp$\xFF\x04\x01 $\x01, $\xFF\x02\x0A"; break; } return NULL; case ARM_t2DMB: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (t2DMB 15, pred:$p) AsmString = "dmb$\xFF\x02\x01"; break; } return NULL; case ARM_t2DSB: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (t2DSB 15, pred:$p) AsmString = "dsb$\xFF\x02\x01"; break; } return NULL; case ARM_t2EORri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2EORri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "eor$\xFF\x06\x02$\xFF\x04\x01.w $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2EORrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2EORrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "eor$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2EORrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2EORrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$shift, pred:$p, cc_out:$s) AsmString = "eor$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2HINT: if (MCInst_getNumOperands(MI) == 3) { // (t2HINT imm0_239:$imm, pred:$p) AsmString = "hint$\xFF\x02\x01 $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (t2HINT 0, pred:$p) AsmString = "nop$\xFF\x02\x01.w"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { // (t2HINT 1, pred:$p) AsmString = "yield$\xFF\x02\x01.w"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { // (t2HINT 2, pred:$p) AsmString = "wfe$\xFF\x02\x01.w"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 3) { // (t2HINT 3, pred:$p) AsmString = "wfi$\xFF\x02\x01.w"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4) { // (t2HINT 4, pred:$p) AsmString = "sev$\xFF\x02\x01.w"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 5) { // (t2HINT 5, pred:$p) AsmString = "sevl$\xFF\x02\x01.w"; break; } return NULL; case ARM_t2HVC: if (MCInst_getNumOperands(MI) == 1) { // (t2HVC imm0_65535:$imm16) AsmString = "hvc $\x01"; break; } return NULL; case ARM_t2ISB: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { // (t2ISB 15, pred:$p) AsmString = "isb$\xFF\x02\x01"; break; } return NULL; case ARM_t2LDMDB: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2LDMDB GPR:$Rn, pred:$p, reglist:$regs) AsmString = "ldmdb$\xFF\x02\x01.w $\x01, $\xFF\x04\x04"; break; } return NULL; case ARM_t2LDMDB_UPD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2LDMDB_UPD GPR:$Rn, pred:$p, reglist:$regs) AsmString = "ldmdb$\xFF\x02\x01.w $\x01!, $\xFF\x04\x04"; break; } return NULL; case ARM_t2LDMIA: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2LDMIA GPR:$Rn, pred:$p, reglist:$regs) AsmString = "ldm$\xFF\x02\x01 $\x01, $\xFF\x04\x04"; break; } return NULL; case ARM_t2LDMIA_UPD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2LDMIA_UPD GPR:$Rn, pred:$p, reglist:$regs) AsmString = "ldm$\xFF\x02\x01 $\x01!, $\xFF\x04\x04"; break; } return NULL; case ARM_t2LDRBi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "ldrb$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2LDRBpci: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRBpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p) AsmString = "ldrb$\xFF\x03\x01 $\x01, $\xFF\x02\x0E"; break; } return NULL; case ARM_t2LDRBpcrel: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2LDRBpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p) AsmString = "ldrb$\xFF\x03\x01.w $\x01, $\x02"; break; } return NULL; case ARM_t2LDRBs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "ldrb$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2LDRHi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "ldrh$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2LDRHpci: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRHpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p) AsmString = "ldrh$\xFF\x03\x01 $\x01, $\xFF\x02\x0E"; break; } return NULL; case ARM_t2LDRHpcrel: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2LDRHpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p) AsmString = "ldrh$\xFF\x03\x01.w $\x01, $\x02"; break; } return NULL; case ARM_t2LDRHs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "ldrh$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2LDRSBi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRSBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "ldrsb$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2LDRSBpci: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRSBpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p) AsmString = "ldrsb$\xFF\x03\x01 $\x01, $\xFF\x02\x0E"; break; } return NULL; case ARM_t2LDRSBpcrel: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2LDRSBpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p) AsmString = "ldrsb$\xFF\x03\x01.w $\x01, $\x02"; break; } return NULL; case ARM_t2LDRSBs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRSBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "ldrsb$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2LDRSHi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRSHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "ldrsh$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2LDRSHpci: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRSHpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p) AsmString = "ldrsh$\xFF\x03\x01 $\x01, $\xFF\x02\x0E"; break; } return NULL; case ARM_t2LDRSHpcrel: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2LDRSHpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p) AsmString = "ldrsh$\xFF\x03\x01.w $\x01, $\x02"; break; } return NULL; case ARM_t2LDRSHs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2LDRSHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "ldrsh$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2LDRi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2LDRi12 GPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "ldr$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2LDRpci: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2LDRpci GPRnopc:$Rt, t2ldrlabel:$addr, pred:$p) AsmString = "ldr$\xFF\x03\x01 $\x01, $\xFF\x02\x0E"; break; } return NULL; case ARM_t2LDRs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2LDRs GPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "ldr$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2LSLri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2LSLri rGPR:$Rd, rGPR:$Rn, imm0_31:$imm, pred:$p, cc_out:$s) AsmString = "lsl$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2LSLrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2LSLrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "lsl$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2LSRri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2LSRri rGPR:$Rd, rGPR:$Rn, imm_sr:$imm, pred:$p, cc_out:$s) AsmString = "lsr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\xFF\x03\x0C"; break; } return NULL; case ARM_t2LSRrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2LSRrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "lsr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2MCR: if (MCInst_getNumOperands(MI) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (t2MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, c_imm:$CRm, 0, pred:$p) AsmString = "mcr$\xFF\x07\x01 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_t2MCR2: if (MCInst_getNumOperands(MI) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (t2MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, c_imm:$CRm, 0, pred:$p) AsmString = "mcr2$\xFF\x07\x01 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_t2MOVi16: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2MOVi16 rGPR:$Rd, imm256_65535_expr:$imm, pred:$p) AsmString = "mov$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2MRC: if (MCInst_getNumOperands(MI) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (t2MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, 0, pred:$p) AsmString = "mrc$\xFF\x07\x01 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_t2MRC2: if (MCInst_getNumOperands(MI) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 5)) && MCOperand_getImm(MCInst_getOperand(MI, 5)) == 0) { // (t2MRC2 GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, 0, pred:$p) AsmString = "mrc2$\xFF\x07\x01 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06"; break; } return NULL; case ARM_t2MRS_AR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2MRS_AR GPR:$Rd, pred:$p) AsmString = "mrs$\xFF\x02\x01 $\x01, cpsr"; break; } return NULL; case ARM_t2MUL: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p) AsmString = "mul$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2MVNi: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2MVNi rGPR:$Rd, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "mvn$\xFF\x05\x02$\xFF\x03\x01.w $\x01, $\x02"; break; } return NULL; case ARM_t2MVNr: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2MVNr rGPR:$Rd, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "mvn$\xFF\x05\x02$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2MVNs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2MVNs rGPR:$Rd, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "mvn$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\xFF\x02\x0A"; break; } return NULL; case ARM_t2ORNri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2ORNri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "orn$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_t2ORNrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ORNrr rGPR:$Rdn, rGPR:$Rdn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "orn$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_t2ORNrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2ORNrs rGPR:$Rdn, rGPR:$Rdn, t2_so_reg:$shift, pred:$p, cc_out:$s) AsmString = "orn$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2ORRri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2ORRri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "orr$\xFF\x06\x02$\xFF\x04\x01.w $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2ORRrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2ORRrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "orr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2ORRrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2ORRrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$shift, pred:$p, cc_out:$s) AsmString = "orr$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2PLDpci: if (MCInst_getNumOperands(MI) == 3) { // (t2PLDpci t2ldr_pcrel_imm12:$addr, pred:$p) AsmString = "pld$\xFF\x02\x01 $\x01"; break; } return NULL; case ARM_t2PLIpci: if (MCInst_getNumOperands(MI) == 3) { // (t2PLIpci t2ldr_pcrel_imm12:$addr, pred:$p) AsmString = "pli$\xFF\x02\x01 $\x01"; break; } return NULL; case ARM_t2REV: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2REV rGPR:$Rd, rGPR:$Rm, pred:$p) AsmString = "rev$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2REV16: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2REV16 rGPR:$Rd, rGPR:$Rm, pred:$p) AsmString = "rev16$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2REVSH: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2REVSH rGPR:$Rd, rGPR:$Rm, pred:$p) AsmString = "revsh$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2RORri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2RORri rGPR:$Rd, rGPR:$Rn, imm0_31:$imm, pred:$p, cc_out:$s) AsmString = "ror$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2RORrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2RORrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "ror$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2RSBri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2RSBri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "rsb$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2RSBri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s) AsmString = "rsb$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (t2RSBri rGPR:$Rd, rGPR:$Rm, 0, pred:$p, cc_out:$s) AsmString = "neg$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2RSBrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2RSBrr rGPR:$Rdn, rGPR:$Rdn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "rsb$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_t2RSBrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2RSBrs rGPR:$Rdn, rGPR:$Rdn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "rsb$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2SBCrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2SBCrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "sbc$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2SBCrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2SBCrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "sbc$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2SRSDB: if (MCInst_getNumOperands(MI) == 3) { // (t2SRSDB imm0_31:$mode, pred:$p) AsmString = "srsdb$\xFF\x02\x01 $\x01"; break; } return NULL; case ARM_t2SRSDB_UPD: if (MCInst_getNumOperands(MI) == 3) { // (t2SRSDB_UPD imm0_31:$mode, pred:$p) AsmString = "srsdb$\xFF\x02\x01 $\x01!"; break; } return NULL; case ARM_t2SRSIA: if (MCInst_getNumOperands(MI) == 3) { // (t2SRSIA imm0_31:$mode, pred:$p) AsmString = "srsia$\xFF\x02\x01 $\x01"; break; } return NULL; case ARM_t2SRSIA_UPD: if (MCInst_getNumOperands(MI) == 3) { // (t2SRSIA_UPD imm0_31:$mode, pred:$p) AsmString = "srsia$\xFF\x02\x01 $\x01!"; break; } return NULL; case ARM_t2SSAT: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2SSAT rGPR:$Rd, imm1_32:$sat_imm, rGPR:$Rn, 0, pred:$p) AsmString = "ssat$\xFF\x05\x01 $\x01, $\xFF\x02\x07, $\x03"; break; } return NULL; case ARM_t2STMDB: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2STMDB GPR:$Rn, pred:$p, reglist:$regs) AsmString = "stmdb$\xFF\x02\x01.w $\x01, $\xFF\x04\x04"; break; } return NULL; case ARM_t2STMDB_UPD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2STMDB_UPD GPR:$Rn, pred:$p, reglist:$regs) AsmString = "stmdb$\xFF\x02\x01.w $\x01!, $\xFF\x04\x04"; break; } return NULL; case ARM_t2STMIA_UPD: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2STMIA_UPD GPR:$Rn, pred:$p, reglist:$regs) AsmString = "stm$\xFF\x02\x01 $\x01!, $\xFF\x04\x04"; break; } return NULL; case ARM_t2STRBi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2STRBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "strb$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2STRBs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2STRBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "strb$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2STRHi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2STRHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "strh$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2STRHs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) { // (t2STRHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "strh$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2STRi12: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2STRi12 GPR:$Rt, t2addrmode_imm12:$addr, pred:$p) AsmString = "str$\xFF\x04\x01 $\x01, $\xFF\x02\x0D"; break; } return NULL; case ARM_t2STRs: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) { // (t2STRs GPR:$Rt, t2addrmode_so_reg:$addr, pred:$p) AsmString = "str$\xFF\x05\x01 $\x01, $\xFF\x02\x0F"; break; } return NULL; case ARM_t2SUBS_PC_LR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (t2SUBS_PC_LR 0, pred:$p) AsmString = "eret$\xFF\x02\x01"; break; } return NULL; case ARM_t2SUBrr: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) { // (t2SUBrr GPRnopc:$Rd, GPRnopc:$Rn, rGPR:$Rm, pred:$p, cc_out:$s) AsmString = "sub$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2SUBrs: if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1)) { // (t2SUBrs GPRnopc:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "sub$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A"; break; } if (MCInst_getNumOperands(MI) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (t2SUBrs GPRnopc:$Rdn, GPRnopc:$Rdn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s) AsmString = "sub$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A"; break; } return NULL; case ARM_t2SXTAB: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2SXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p) AsmString = "sxtab$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2SXTAB16: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2SXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p) AsmString = "sxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2SXTAH: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2SXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p) AsmString = "sxtah$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2SXTB: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2SXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p) AsmString = "sxtb$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10"; break; } return NULL; case ARM_t2SXTB16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (t2SXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p) AsmString = "sxtb16$\xFF\x04\x01 $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2SXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p) AsmString = "sxtb16$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10"; break; } return NULL; case ARM_t2SXTH: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2SXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p) AsmString = "sxth$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10"; break; } return NULL; case ARM_t2TEQri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2TEQri GPRnopc:$Rn, t2_so_imm:$imm, pred:$p) AsmString = "teq$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2TEQrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2TEQrr GPRnopc:$Rn, rGPR:$Rm, pred:$p) AsmString = "teq$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2TEQrs: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2TEQrs GPRnopc:$Rn, t2_so_reg:$shift, pred:$p) AsmString = "teq$\xFF\x04\x01 $\x01, $\xFF\x02\x0A"; break; } return NULL; case ARM_t2TSTri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2TSTri GPRnopc:$Rn, t2_so_imm:$imm, pred:$p) AsmString = "tst$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2TSTrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2TSTrr GPRnopc:$Rn, rGPR:$Rm, pred:$p) AsmString = "tst$\xFF\x03\x01 $\x01, $\x02"; break; } return NULL; case ARM_t2TSTrs: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) { // (t2TSTrs GPRnopc:$Rn, t2_so_reg:$shift, pred:$p) AsmString = "tst$\xFF\x04\x01 $\x01, $\xFF\x02\x0A"; break; } return NULL; case ARM_t2USAT: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2USAT rGPR:$Rd, imm0_31:$sat_imm, rGPR:$Rn, 0, pred:$p) AsmString = "usat$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2UXTAB: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2UXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p) AsmString = "uxtab$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2UXTAB16: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2UXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p) AsmString = "uxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2UXTAH: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (t2UXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p) AsmString = "uxtah$\xFF\x05\x01 $\x01, $\x02, $\x03"; break; } return NULL; case ARM_t2UXTB: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2UXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p) AsmString = "uxtb$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10"; break; } return NULL; case ARM_t2UXTB16: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (t2UXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p) AsmString = "uxtb16$\xFF\x04\x01 $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2UXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p) AsmString = "uxtb16$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10"; break; } return NULL; case ARM_t2UXTH: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) { // (t2UXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p) AsmString = "uxth$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10"; break; } return NULL; case ARM_tASRri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (tASRri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm_sr:$imm, pred:$p) AsmString = "asr$\xFF\x02\x02$\xFF\x05\x01 $\x01, $\xFF\x04\x0C"; break; } return NULL; case ARM_tBKPT: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (tBKPT 0) AsmString = "bkpt"; break; } return NULL; case ARM_tHINT: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (tHINT 0, pred:$p) AsmString = "nop$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { // (tHINT 1, pred:$p) AsmString = "yield$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { // (tHINT 2, pred:$p) AsmString = "wfe$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 3) { // (tHINT 3, pred:$p) AsmString = "wfi$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4) { // (tHINT 4, pred:$p) AsmString = "sev$\xFF\x02\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 5) { // (tHINT 5, pred:$p) AsmString = "sevl$\xFF\x02\x01"; break; } return NULL; case ARM_tLDMIA: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0)) { // (tLDMIA tGPR:$Rn, pred:$p, reglist:$regs) AsmString = "ldm$\xFF\x02\x01 $\x01!, $\xFF\x04\x04"; break; } return NULL; case ARM_tLSLri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (tLSLri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm0_31:$imm, pred:$p) AsmString = "lsl$\xFF\x02\x02$\xFF\x05\x01 $\x01, $\x04"; break; } return NULL; case ARM_tLSRri: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (tLSRri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm_sr:$imm, pred:$p) AsmString = "lsr$\xFF\x02\x02$\xFF\x05\x01 $\x01, $\xFF\x04\x0C"; break; } return NULL; case ARM_tMOVi8: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == ARM_CPSR && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { // (tMOVi8 tGPR:$Rdn, CPSR, imm0_255:$imm, 14, 0) AsmString = "movs $\x01, $\x03"; break; } return NULL; case ARM_tMOVr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_R8 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == ARM_R8 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (tMOVr R8, R8, 14, 0) AsmString = "nop"; break; } return NULL; case ARM_tMUL: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 2)) { // (tMUL tGPR:$Rdm, s_cc_out:$s, tGPR:$Rn, pred:$p) AsmString = "mul$\xFF\x02\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_tRSB: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 2)) { // (tRSB tGPR:$Rd, s_cc_out:$s, tGPR:$Rm, pred:$p) AsmString = "neg$\xFF\x02\x02$\xFF\x04\x01 $\x01, $\x03"; break; } return NULL; case ARM_tSUBspi: if (MCInst_getNumOperands(MI) == 4 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) { // (tSUBspi SP, t_imm0_508s4_neg:$imm, pred:$p) AsmString = "add$\xFF\x03\x01 sp, $\x02"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/ARM/ARMGenDisassemblerTables.inc010066400017500001750000030674331363402546700231030ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * ARM Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static const uint8_t DecoderTableARM32[] = { /* 0 */ MCD_OPC_ExtractField, 25, 3, // Inst{27-25} ... /* 3 */ MCD_OPC_FilterValue, 0, 12, 12, // Skip to: 3091 /* 7 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10 */ MCD_OPC_FilterValue, 0, 68, 6, // Skip to: 1618 /* 14 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 17 */ MCD_OPC_FilterValue, 0, 80, 1, // Skip to: 357 /* 21 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 24 */ MCD_OPC_FilterValue, 0, 103, 0, // Skip to: 131 /* 28 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 31 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 55 /* 35 */ MCD_OPC_CheckPredicate, 0, 9, 0, // Skip to: 48 /* 39 */ MCD_OPC_CheckField, 5, 7, 0, 3, 0, // Skip to: 48 /* 45 */ MCD_OPC_Decode, 43, 0, // Opcode: ANDrr /* 48 */ MCD_OPC_CheckPredicate, 0, 252, 29, // Skip to: 7728 /* 52 */ MCD_OPC_Decode, 44, 1, // Opcode: ANDrsi /* 55 */ MCD_OPC_FilterValue, 1, 22, 0, // Skip to: 81 /* 59 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 73 /* 63 */ MCD_OPC_CheckField, 5, 7, 0, 4, 0, // Skip to: 73 /* 69 */ MCD_OPC_Decode, 205, 3, 0, // Opcode: SUBrr /* 73 */ MCD_OPC_CheckPredicate, 0, 227, 29, // Skip to: 7728 /* 77 */ MCD_OPC_Decode, 206, 3, 1, // Opcode: SUBrsi /* 81 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 105 /* 85 */ MCD_OPC_CheckPredicate, 0, 9, 0, // Skip to: 98 /* 89 */ MCD_OPC_CheckField, 5, 7, 0, 3, 0, // Skip to: 98 /* 95 */ MCD_OPC_Decode, 32, 0, // Opcode: ADDrr /* 98 */ MCD_OPC_CheckPredicate, 0, 202, 29, // Skip to: 7728 /* 102 */ MCD_OPC_Decode, 33, 1, // Opcode: ADDrsi /* 105 */ MCD_OPC_FilterValue, 3, 195, 29, // Skip to: 7728 /* 109 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 123 /* 113 */ MCD_OPC_CheckField, 5, 7, 0, 4, 0, // Skip to: 123 /* 119 */ MCD_OPC_Decode, 185, 2, 0, // Opcode: SBCrr /* 123 */ MCD_OPC_CheckPredicate, 0, 177, 29, // Skip to: 7728 /* 127 */ MCD_OPC_Decode, 186, 2, 1, // Opcode: SBCrsi /* 131 */ MCD_OPC_FilterValue, 1, 169, 29, // Skip to: 7728 /* 135 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 138 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 191 /* 142 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 145 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 156 /* 149 */ MCD_OPC_CheckPredicate, 0, 151, 29, // Skip to: 7728 /* 153 */ MCD_OPC_Decode, 45, 2, // Opcode: ANDrsr /* 156 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 168 /* 160 */ MCD_OPC_CheckPredicate, 0, 140, 29, // Skip to: 7728 /* 164 */ MCD_OPC_Decode, 207, 3, 2, // Opcode: SUBrsr /* 168 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 179 /* 172 */ MCD_OPC_CheckPredicate, 0, 128, 29, // Skip to: 7728 /* 176 */ MCD_OPC_Decode, 34, 2, // Opcode: ADDrsr /* 179 */ MCD_OPC_FilterValue, 3, 121, 29, // Skip to: 7728 /* 183 */ MCD_OPC_CheckPredicate, 0, 117, 29, // Skip to: 7728 /* 187 */ MCD_OPC_Decode, 187, 2, 3, // Opcode: SBCrsr /* 191 */ MCD_OPC_FilterValue, 1, 109, 29, // Skip to: 7728 /* 195 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 198 */ MCD_OPC_FilterValue, 0, 62, 0, // Skip to: 264 /* 202 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 205 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 222 /* 209 */ MCD_OPC_CheckPredicate, 1, 91, 29, // Skip to: 7728 /* 213 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 218 */ MCD_OPC_Decode, 244, 1, 4, // Opcode: MUL /* 222 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 240 /* 226 */ MCD_OPC_CheckPredicate, 1, 74, 29, // Skip to: 7728 /* 230 */ MCD_OPC_CheckField, 20, 1, 0, 68, 29, // Skip to: 7728 /* 236 */ MCD_OPC_Decode, 244, 3, 5, // Opcode: UMAAL /* 240 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 252 /* 244 */ MCD_OPC_CheckPredicate, 1, 56, 29, // Skip to: 7728 /* 248 */ MCD_OPC_Decode, 247, 3, 6, // Opcode: UMULL /* 252 */ MCD_OPC_FilterValue, 3, 48, 29, // Skip to: 7728 /* 256 */ MCD_OPC_CheckPredicate, 1, 44, 29, // Skip to: 7728 /* 260 */ MCD_OPC_Decode, 239, 2, 6, // Opcode: SMULL /* 264 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 295 /* 268 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 271 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 283 /* 275 */ MCD_OPC_CheckPredicate, 0, 25, 29, // Skip to: 7728 /* 279 */ MCD_OPC_Decode, 185, 3, 7, // Opcode: STRH_POST /* 283 */ MCD_OPC_FilterValue, 1, 17, 29, // Skip to: 7728 /* 287 */ MCD_OPC_CheckPredicate, 0, 13, 29, // Skip to: 7728 /* 291 */ MCD_OPC_Decode, 174, 1, 7, // Opcode: LDRH_POST /* 295 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 326 /* 299 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 302 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 314 /* 306 */ MCD_OPC_CheckPredicate, 0, 250, 28, // Skip to: 7728 /* 310 */ MCD_OPC_Decode, 165, 1, 7, // Opcode: LDRD_POST /* 314 */ MCD_OPC_FilterValue, 1, 242, 28, // Skip to: 7728 /* 318 */ MCD_OPC_CheckPredicate, 0, 238, 28, // Skip to: 7728 /* 322 */ MCD_OPC_Decode, 182, 1, 7, // Opcode: LDRSB_POST /* 326 */ MCD_OPC_FilterValue, 3, 230, 28, // Skip to: 7728 /* 330 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 333 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 345 /* 337 */ MCD_OPC_CheckPredicate, 0, 219, 28, // Skip to: 7728 /* 341 */ MCD_OPC_Decode, 176, 3, 7, // Opcode: STRD_POST /* 345 */ MCD_OPC_FilterValue, 1, 211, 28, // Skip to: 7728 /* 349 */ MCD_OPC_CheckPredicate, 0, 207, 28, // Skip to: 7728 /* 353 */ MCD_OPC_Decode, 187, 1, 7, // Opcode: LDRSH_POST /* 357 */ MCD_OPC_FilterValue, 1, 199, 28, // Skip to: 7728 /* 361 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 364 */ MCD_OPC_FilterValue, 0, 166, 1, // Skip to: 790 /* 368 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 371 */ MCD_OPC_FilterValue, 0, 93, 1, // Skip to: 724 /* 375 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 378 */ MCD_OPC_FilterValue, 0, 20, 1, // Skip to: 658 /* 382 */ MCD_OPC_ExtractField, 28, 4, // Inst{31-28} ... /* 385 */ MCD_OPC_FilterValue, 14, 57, 0, // Skip to: 446 /* 389 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 392 */ MCD_OPC_FilterValue, 0, 23, 0, // Skip to: 419 /* 396 */ MCD_OPC_CheckPredicate, 2, 144, 0, // Skip to: 544 /* 400 */ MCD_OPC_CheckField, 6, 2, 1, 138, 0, // Skip to: 544 /* 406 */ MCD_OPC_CheckField, 4, 1, 0, 132, 0, // Skip to: 544 /* 412 */ MCD_OPC_SoftFail, 128, 26 /* 0xD00 */, 0, /* 416 */ MCD_OPC_Decode, 91, 8, // Opcode: CRC32B /* 419 */ MCD_OPC_FilterValue, 1, 121, 0, // Skip to: 544 /* 423 */ MCD_OPC_CheckPredicate, 2, 117, 0, // Skip to: 544 /* 427 */ MCD_OPC_CheckField, 6, 2, 1, 111, 0, // Skip to: 544 /* 433 */ MCD_OPC_CheckField, 4, 1, 0, 105, 0, // Skip to: 544 /* 439 */ MCD_OPC_SoftFail, 128, 26 /* 0xD00 */, 0, /* 443 */ MCD_OPC_Decode, 92, 8, // Opcode: CRC32CB /* 446 */ MCD_OPC_FilterValue, 15, 94, 0, // Skip to: 544 /* 450 */ MCD_OPC_ExtractField, 10, 8, // Inst{17-10} ... /* 453 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 476 /* 457 */ MCD_OPC_CheckPredicate, 0, 83, 0, // Skip to: 544 /* 461 */ MCD_OPC_CheckField, 9, 1, 0, 77, 0, // Skip to: 544 /* 467 */ MCD_OPC_CheckField, 0, 5, 0, 71, 0, // Skip to: 544 /* 473 */ MCD_OPC_Decode, 89, 9, // Opcode: CPS2p /* 476 */ MCD_OPC_FilterValue, 64, 26, 0, // Skip to: 506 /* 480 */ MCD_OPC_CheckPredicate, 0, 60, 0, // Skip to: 544 /* 484 */ MCD_OPC_CheckField, 18, 2, 0, 54, 0, // Skip to: 544 /* 490 */ MCD_OPC_CheckField, 6, 3, 0, 48, 0, // Skip to: 544 /* 496 */ MCD_OPC_CheckField, 0, 5, 0, 42, 0, // Skip to: 544 /* 502 */ MCD_OPC_Decode, 191, 2, 10, // Opcode: SETEND /* 506 */ MCD_OPC_FilterValue, 128, 1, 33, 0, // Skip to: 544 /* 511 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 514 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 544 /* 518 */ MCD_OPC_CheckPredicate, 0, 15, 0, // Skip to: 537 /* 522 */ MCD_OPC_CheckField, 18, 2, 0, 9, 0, // Skip to: 537 /* 528 */ MCD_OPC_CheckField, 6, 3, 0, 3, 0, // Skip to: 537 /* 534 */ MCD_OPC_Decode, 88, 9, // Opcode: CPS1p /* 537 */ MCD_OPC_CheckPredicate, 0, 3, 0, // Skip to: 544 /* 541 */ MCD_OPC_Decode, 90, 9, // Opcode: CPS3p /* 544 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 547 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 583 /* 551 */ MCD_OPC_CheckPredicate, 0, 163, 3, // Skip to: 1486 /* 555 */ MCD_OPC_CheckField, 16, 1, 1, 157, 3, // Skip to: 1486 /* 561 */ MCD_OPC_CheckField, 9, 1, 0, 151, 3, // Skip to: 1486 /* 567 */ MCD_OPC_CheckField, 4, 1, 0, 145, 3, // Skip to: 1486 /* 573 */ MCD_OPC_SoftFail, 143, 26 /* 0xD0F */, 128, 128, 56 /* 0xE0000 */, /* 579 */ MCD_OPC_Decode, 238, 1, 11, // Opcode: MRS /* 583 */ MCD_OPC_FilterValue, 1, 18, 0, // Skip to: 605 /* 587 */ MCD_OPC_CheckPredicate, 0, 127, 3, // Skip to: 1486 /* 591 */ MCD_OPC_CheckField, 4, 1, 1, 121, 3, // Skip to: 1486 /* 597 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 601 */ MCD_OPC_Decode, 144, 2, 12, // Opcode: QADD /* 605 */ MCD_OPC_FilterValue, 2, 31, 0, // Skip to: 640 /* 609 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 612 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 624 /* 616 */ MCD_OPC_CheckPredicate, 3, 98, 3, // Skip to: 1486 /* 620 */ MCD_OPC_Decode, 209, 2, 13, // Opcode: SMLABB /* 624 */ MCD_OPC_FilterValue, 1, 90, 3, // Skip to: 1486 /* 628 */ MCD_OPC_CheckPredicate, 4, 86, 3, // Skip to: 1486 /* 632 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 636 */ MCD_OPC_Decode, 209, 3, 14, // Opcode: SWP /* 640 */ MCD_OPC_FilterValue, 3, 74, 3, // Skip to: 1486 /* 644 */ MCD_OPC_CheckPredicate, 3, 70, 3, // Skip to: 1486 /* 648 */ MCD_OPC_CheckField, 4, 1, 0, 64, 3, // Skip to: 1486 /* 654 */ MCD_OPC_Decode, 210, 2, 13, // Opcode: SMLABT /* 658 */ MCD_OPC_FilterValue, 1, 56, 3, // Skip to: 1486 /* 662 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 665 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 688 /* 669 */ MCD_OPC_CheckPredicate, 5, 45, 3, // Skip to: 1486 /* 673 */ MCD_OPC_CheckField, 28, 4, 14, 39, 3, // Skip to: 1486 /* 679 */ MCD_OPC_CheckField, 4, 1, 1, 33, 3, // Skip to: 1486 /* 685 */ MCD_OPC_Decode, 115, 15, // Opcode: HLT /* 688 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 706 /* 692 */ MCD_OPC_CheckPredicate, 3, 22, 3, // Skip to: 1486 /* 696 */ MCD_OPC_CheckField, 4, 1, 0, 16, 3, // Skip to: 1486 /* 702 */ MCD_OPC_Decode, 221, 2, 13, // Opcode: SMLATB /* 706 */ MCD_OPC_FilterValue, 3, 8, 3, // Skip to: 1486 /* 710 */ MCD_OPC_CheckPredicate, 3, 4, 3, // Skip to: 1486 /* 714 */ MCD_OPC_CheckField, 4, 1, 0, 254, 2, // Skip to: 1486 /* 720 */ MCD_OPC_Decode, 222, 2, 13, // Opcode: SMLATT /* 724 */ MCD_OPC_FilterValue, 1, 246, 2, // Skip to: 1486 /* 728 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 731 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 767 /* 735 */ MCD_OPC_CheckPredicate, 0, 15, 0, // Skip to: 754 /* 739 */ MCD_OPC_CheckField, 5, 7, 0, 9, 0, // Skip to: 754 /* 745 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 750 */ MCD_OPC_Decode, 229, 3, 16, // Opcode: TSTrr /* 754 */ MCD_OPC_CheckPredicate, 0, 216, 2, // Skip to: 1486 /* 758 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 763 */ MCD_OPC_Decode, 230, 3, 17, // Opcode: TSTrsi /* 767 */ MCD_OPC_FilterValue, 1, 203, 2, // Skip to: 1486 /* 771 */ MCD_OPC_CheckPredicate, 0, 199, 2, // Skip to: 1486 /* 775 */ MCD_OPC_CheckField, 7, 1, 0, 193, 2, // Skip to: 1486 /* 781 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 786 */ MCD_OPC_Decode, 231, 3, 18, // Opcode: TSTrsr /* 790 */ MCD_OPC_FilterValue, 1, 19, 1, // Skip to: 1069 /* 794 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 797 */ MCD_OPC_FilterValue, 0, 165, 0, // Skip to: 966 /* 801 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 804 */ MCD_OPC_FilterValue, 0, 124, 0, // Skip to: 932 /* 808 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 811 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 835 /* 815 */ MCD_OPC_CheckPredicate, 0, 155, 2, // Skip to: 1486 /* 819 */ MCD_OPC_CheckField, 9, 1, 0, 149, 2, // Skip to: 1486 /* 825 */ MCD_OPC_SoftFail, 143, 26 /* 0xD0F */, 128, 128, 60 /* 0xF0000 */, /* 831 */ MCD_OPC_Decode, 240, 1, 11, // Opcode: MRSsys /* 835 */ MCD_OPC_FilterValue, 2, 45, 0, // Skip to: 884 /* 839 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 842 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 863 /* 846 */ MCD_OPC_CheckPredicate, 2, 124, 2, // Skip to: 1486 /* 850 */ MCD_OPC_CheckField, 28, 4, 14, 118, 2, // Skip to: 1486 /* 856 */ MCD_OPC_SoftFail, 128, 26 /* 0xD00 */, 0, /* 860 */ MCD_OPC_Decode, 96, 8, // Opcode: CRC32W /* 863 */ MCD_OPC_FilterValue, 1, 107, 2, // Skip to: 1486 /* 867 */ MCD_OPC_CheckPredicate, 2, 103, 2, // Skip to: 1486 /* 871 */ MCD_OPC_CheckField, 28, 4, 14, 97, 2, // Skip to: 1486 /* 877 */ MCD_OPC_SoftFail, 128, 26 /* 0xD00 */, 0, /* 881 */ MCD_OPC_Decode, 94, 8, // Opcode: CRC32CW /* 884 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 896 /* 888 */ MCD_OPC_CheckPredicate, 3, 82, 2, // Skip to: 1486 /* 892 */ MCD_OPC_Decode, 214, 2, 19, // Opcode: SMLALBB /* 896 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 908 /* 900 */ MCD_OPC_CheckPredicate, 3, 70, 2, // Skip to: 1486 /* 904 */ MCD_OPC_Decode, 218, 2, 19, // Opcode: SMLALTB /* 908 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 920 /* 912 */ MCD_OPC_CheckPredicate, 3, 58, 2, // Skip to: 1486 /* 916 */ MCD_OPC_Decode, 215, 2, 19, // Opcode: SMLALBT /* 920 */ MCD_OPC_FilterValue, 7, 50, 2, // Skip to: 1486 /* 924 */ MCD_OPC_CheckPredicate, 3, 46, 2, // Skip to: 1486 /* 928 */ MCD_OPC_Decode, 219, 2, 19, // Opcode: SMLALTT /* 932 */ MCD_OPC_FilterValue, 1, 38, 2, // Skip to: 1486 /* 936 */ MCD_OPC_CheckPredicate, 0, 14, 0, // Skip to: 954 /* 940 */ MCD_OPC_CheckField, 5, 7, 0, 8, 0, // Skip to: 954 /* 946 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 951 */ MCD_OPC_Decode, 83, 16, // Opcode: CMPrr /* 954 */ MCD_OPC_CheckPredicate, 0, 16, 2, // Skip to: 1486 /* 958 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 963 */ MCD_OPC_Decode, 84, 17, // Opcode: CMPrsi /* 966 */ MCD_OPC_FilterValue, 1, 4, 2, // Skip to: 1486 /* 970 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 973 */ MCD_OPC_FilterValue, 0, 64, 0, // Skip to: 1041 /* 977 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 980 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 1025 /* 984 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 987 */ MCD_OPC_FilterValue, 2, 12, 0, // Skip to: 1003 /* 991 */ MCD_OPC_CheckPredicate, 0, 235, 1, // Skip to: 1486 /* 995 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 999 */ MCD_OPC_Decode, 148, 2, 20, // Opcode: QDADD /* 1003 */ MCD_OPC_FilterValue, 3, 223, 1, // Skip to: 1486 /* 1007 */ MCD_OPC_CheckPredicate, 6, 219, 1, // Skip to: 1486 /* 1011 */ MCD_OPC_SoftFail, 128, 128, 128, 128, 1 /* 0x10000000 */, 128, 128, 128, 128, 14 /* 0xFFFFFFFFE0000000 */, /* 1022 */ MCD_OPC_Decode, 116, 15, // Opcode: HVC /* 1025 */ MCD_OPC_FilterValue, 1, 201, 1, // Skip to: 1486 /* 1029 */ MCD_OPC_CheckPredicate, 0, 197, 1, // Skip to: 1486 /* 1033 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 1038 */ MCD_OPC_Decode, 85, 18, // Opcode: CMPrsr /* 1041 */ MCD_OPC_FilterValue, 1, 185, 1, // Skip to: 1486 /* 1045 */ MCD_OPC_CheckPredicate, 4, 181, 1, // Skip to: 1486 /* 1049 */ MCD_OPC_CheckField, 20, 1, 0, 175, 1, // Skip to: 1486 /* 1055 */ MCD_OPC_CheckField, 5, 2, 0, 169, 1, // Skip to: 1486 /* 1061 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 1065 */ MCD_OPC_Decode, 210, 3, 14, // Opcode: SWPB /* 1069 */ MCD_OPC_FilterValue, 2, 206, 0, // Skip to: 1279 /* 1073 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1076 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 1102 /* 1080 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 1094 /* 1084 */ MCD_OPC_CheckField, 5, 7, 0, 4, 0, // Skip to: 1094 /* 1090 */ MCD_OPC_Decode, 252, 1, 0, // Opcode: ORRrr /* 1094 */ MCD_OPC_CheckPredicate, 0, 132, 1, // Skip to: 1486 /* 1098 */ MCD_OPC_Decode, 253, 1, 1, // Opcode: ORRrsi /* 1102 */ MCD_OPC_FilterValue, 1, 124, 1, // Skip to: 1486 /* 1106 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 1109 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1121 /* 1113 */ MCD_OPC_CheckPredicate, 0, 113, 1, // Skip to: 1486 /* 1117 */ MCD_OPC_Decode, 254, 1, 2, // Opcode: ORRrsr /* 1121 */ MCD_OPC_FilterValue, 1, 105, 1, // Skip to: 1486 /* 1125 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1128 */ MCD_OPC_FilterValue, 12, 50, 0, // Skip to: 1182 /* 1132 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1135 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 1159 /* 1139 */ MCD_OPC_CheckPredicate, 5, 87, 1, // Skip to: 1486 /* 1143 */ MCD_OPC_CheckField, 12, 4, 15, 81, 1, // Skip to: 1486 /* 1149 */ MCD_OPC_CheckField, 5, 2, 0, 75, 1, // Skip to: 1486 /* 1155 */ MCD_OPC_Decode, 149, 3, 21, // Opcode: STL /* 1159 */ MCD_OPC_FilterValue, 1, 67, 1, // Skip to: 1486 /* 1163 */ MCD_OPC_CheckPredicate, 5, 63, 1, // Skip to: 1486 /* 1167 */ MCD_OPC_CheckField, 5, 2, 0, 57, 1, // Skip to: 1486 /* 1173 */ MCD_OPC_CheckField, 0, 4, 15, 51, 1, // Skip to: 1486 /* 1179 */ MCD_OPC_Decode, 123, 22, // Opcode: LDA /* 1182 */ MCD_OPC_FilterValue, 14, 44, 0, // Skip to: 1230 /* 1186 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1189 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1207 /* 1193 */ MCD_OPC_CheckPredicate, 5, 33, 1, // Skip to: 1486 /* 1197 */ MCD_OPC_CheckField, 5, 2, 0, 27, 1, // Skip to: 1486 /* 1203 */ MCD_OPC_Decode, 151, 3, 23, // Opcode: STLEX /* 1207 */ MCD_OPC_FilterValue, 1, 19, 1, // Skip to: 1486 /* 1211 */ MCD_OPC_CheckPredicate, 5, 15, 1, // Skip to: 1486 /* 1215 */ MCD_OPC_CheckField, 5, 2, 0, 9, 1, // Skip to: 1486 /* 1221 */ MCD_OPC_CheckField, 0, 4, 15, 3, 1, // Skip to: 1486 /* 1227 */ MCD_OPC_Decode, 125, 22, // Opcode: LDAEX /* 1230 */ MCD_OPC_FilterValue, 15, 252, 0, // Skip to: 1486 /* 1234 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1237 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1255 /* 1241 */ MCD_OPC_CheckPredicate, 0, 241, 0, // Skip to: 1486 /* 1245 */ MCD_OPC_CheckField, 5, 2, 0, 235, 0, // Skip to: 1486 /* 1251 */ MCD_OPC_Decode, 178, 3, 23, // Opcode: STREX /* 1255 */ MCD_OPC_FilterValue, 1, 227, 0, // Skip to: 1486 /* 1259 */ MCD_OPC_CheckPredicate, 0, 223, 0, // Skip to: 1486 /* 1263 */ MCD_OPC_CheckField, 5, 2, 0, 217, 0, // Skip to: 1486 /* 1269 */ MCD_OPC_CheckField, 0, 4, 15, 211, 0, // Skip to: 1486 /* 1275 */ MCD_OPC_Decode, 167, 1, 22, // Opcode: LDREX /* 1279 */ MCD_OPC_FilterValue, 3, 203, 0, // Skip to: 1486 /* 1283 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1286 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 1310 /* 1290 */ MCD_OPC_CheckPredicate, 0, 9, 0, // Skip to: 1303 /* 1294 */ MCD_OPC_CheckField, 5, 7, 0, 3, 0, // Skip to: 1303 /* 1300 */ MCD_OPC_Decode, 54, 0, // Opcode: BICrr /* 1303 */ MCD_OPC_CheckPredicate, 0, 179, 0, // Skip to: 1486 /* 1307 */ MCD_OPC_Decode, 55, 1, // Opcode: BICrsi /* 1310 */ MCD_OPC_FilterValue, 1, 172, 0, // Skip to: 1486 /* 1314 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 1317 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 1328 /* 1321 */ MCD_OPC_CheckPredicate, 0, 161, 0, // Skip to: 1486 /* 1325 */ MCD_OPC_Decode, 56, 2, // Opcode: BICrsr /* 1328 */ MCD_OPC_FilterValue, 1, 154, 0, // Skip to: 1486 /* 1332 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1335 */ MCD_OPC_FilterValue, 12, 50, 0, // Skip to: 1389 /* 1339 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1342 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 1366 /* 1346 */ MCD_OPC_CheckPredicate, 5, 136, 0, // Skip to: 1486 /* 1350 */ MCD_OPC_CheckField, 12, 4, 15, 130, 0, // Skip to: 1486 /* 1356 */ MCD_OPC_CheckField, 5, 2, 0, 124, 0, // Skip to: 1486 /* 1362 */ MCD_OPC_Decode, 150, 3, 21, // Opcode: STLB /* 1366 */ MCD_OPC_FilterValue, 1, 116, 0, // Skip to: 1486 /* 1370 */ MCD_OPC_CheckPredicate, 5, 112, 0, // Skip to: 1486 /* 1374 */ MCD_OPC_CheckField, 5, 2, 0, 106, 0, // Skip to: 1486 /* 1380 */ MCD_OPC_CheckField, 0, 4, 15, 100, 0, // Skip to: 1486 /* 1386 */ MCD_OPC_Decode, 124, 22, // Opcode: LDAB /* 1389 */ MCD_OPC_FilterValue, 14, 44, 0, // Skip to: 1437 /* 1393 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1396 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1414 /* 1400 */ MCD_OPC_CheckPredicate, 5, 82, 0, // Skip to: 1486 /* 1404 */ MCD_OPC_CheckField, 5, 2, 0, 76, 0, // Skip to: 1486 /* 1410 */ MCD_OPC_Decode, 152, 3, 23, // Opcode: STLEXB /* 1414 */ MCD_OPC_FilterValue, 1, 68, 0, // Skip to: 1486 /* 1418 */ MCD_OPC_CheckPredicate, 5, 64, 0, // Skip to: 1486 /* 1422 */ MCD_OPC_CheckField, 5, 2, 0, 58, 0, // Skip to: 1486 /* 1428 */ MCD_OPC_CheckField, 0, 4, 15, 52, 0, // Skip to: 1486 /* 1434 */ MCD_OPC_Decode, 126, 22, // Opcode: LDAEXB /* 1437 */ MCD_OPC_FilterValue, 15, 45, 0, // Skip to: 1486 /* 1441 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1444 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1462 /* 1448 */ MCD_OPC_CheckPredicate, 0, 34, 0, // Skip to: 1486 /* 1452 */ MCD_OPC_CheckField, 5, 2, 0, 28, 0, // Skip to: 1486 /* 1458 */ MCD_OPC_Decode, 179, 3, 23, // Opcode: STREXB /* 1462 */ MCD_OPC_FilterValue, 1, 20, 0, // Skip to: 1486 /* 1466 */ MCD_OPC_CheckPredicate, 0, 16, 0, // Skip to: 1486 /* 1470 */ MCD_OPC_CheckField, 5, 2, 0, 10, 0, // Skip to: 1486 /* 1476 */ MCD_OPC_CheckField, 0, 4, 15, 4, 0, // Skip to: 1486 /* 1482 */ MCD_OPC_Decode, 168, 1, 22, // Opcode: LDREXB /* 1486 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 1489 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 1525 /* 1493 */ MCD_OPC_CheckPredicate, 6, 87, 24, // Skip to: 7728 /* 1497 */ MCD_OPC_CheckField, 23, 1, 0, 81, 24, // Skip to: 7728 /* 1503 */ MCD_OPC_CheckField, 20, 1, 0, 75, 24, // Skip to: 7728 /* 1509 */ MCD_OPC_CheckField, 9, 3, 1, 69, 24, // Skip to: 7728 /* 1515 */ MCD_OPC_CheckField, 0, 4, 0, 63, 24, // Skip to: 7728 /* 1521 */ MCD_OPC_Decode, 239, 1, 24, // Opcode: MRSbanked /* 1525 */ MCD_OPC_FilterValue, 11, 27, 0, // Skip to: 1556 /* 1529 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1532 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1544 /* 1536 */ MCD_OPC_CheckPredicate, 0, 44, 24, // Skip to: 7728 /* 1540 */ MCD_OPC_Decode, 182, 3, 7, // Opcode: STRH /* 1544 */ MCD_OPC_FilterValue, 1, 36, 24, // Skip to: 7728 /* 1548 */ MCD_OPC_CheckPredicate, 0, 32, 24, // Skip to: 7728 /* 1552 */ MCD_OPC_Decode, 171, 1, 7, // Opcode: LDRH /* 1556 */ MCD_OPC_FilterValue, 13, 27, 0, // Skip to: 1587 /* 1560 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1563 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1575 /* 1567 */ MCD_OPC_CheckPredicate, 3, 13, 24, // Skip to: 7728 /* 1571 */ MCD_OPC_Decode, 164, 1, 7, // Opcode: LDRD /* 1575 */ MCD_OPC_FilterValue, 1, 5, 24, // Skip to: 7728 /* 1579 */ MCD_OPC_CheckPredicate, 0, 1, 24, // Skip to: 7728 /* 1583 */ MCD_OPC_Decode, 179, 1, 7, // Opcode: LDRSB /* 1587 */ MCD_OPC_FilterValue, 15, 249, 23, // Skip to: 7728 /* 1591 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1594 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1606 /* 1598 */ MCD_OPC_CheckPredicate, 3, 238, 23, // Skip to: 7728 /* 1602 */ MCD_OPC_Decode, 175, 3, 7, // Opcode: STRD /* 1606 */ MCD_OPC_FilterValue, 1, 230, 23, // Skip to: 7728 /* 1610 */ MCD_OPC_CheckPredicate, 0, 226, 23, // Skip to: 7728 /* 1614 */ MCD_OPC_Decode, 184, 1, 7, // Opcode: LDRSH /* 1618 */ MCD_OPC_FilterValue, 1, 218, 23, // Skip to: 7728 /* 1622 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1625 */ MCD_OPC_FilterValue, 0, 79, 2, // Skip to: 2220 /* 1629 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 1632 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 1689 /* 1636 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 1639 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 1663 /* 1643 */ MCD_OPC_CheckPredicate, 0, 9, 0, // Skip to: 1656 /* 1647 */ MCD_OPC_CheckField, 5, 7, 0, 3, 0, // Skip to: 1656 /* 1653 */ MCD_OPC_Decode, 101, 0, // Opcode: EORrr /* 1656 */ MCD_OPC_CheckPredicate, 0, 180, 23, // Skip to: 7728 /* 1660 */ MCD_OPC_Decode, 102, 1, // Opcode: EORrsi /* 1663 */ MCD_OPC_FilterValue, 1, 173, 23, // Skip to: 7728 /* 1667 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 1681 /* 1671 */ MCD_OPC_CheckField, 5, 7, 0, 4, 0, // Skip to: 1681 /* 1677 */ MCD_OPC_Decode, 174, 2, 0, // Opcode: RSBrr /* 1681 */ MCD_OPC_CheckPredicate, 0, 155, 23, // Skip to: 7728 /* 1685 */ MCD_OPC_Decode, 175, 2, 1, // Opcode: RSBrsi /* 1689 */ MCD_OPC_FilterValue, 1, 53, 0, // Skip to: 1746 /* 1693 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 1696 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 1720 /* 1700 */ MCD_OPC_CheckPredicate, 0, 9, 0, // Skip to: 1713 /* 1704 */ MCD_OPC_CheckField, 5, 7, 0, 3, 0, // Skip to: 1713 /* 1710 */ MCD_OPC_Decode, 24, 0, // Opcode: ADCrr /* 1713 */ MCD_OPC_CheckPredicate, 0, 123, 23, // Skip to: 7728 /* 1717 */ MCD_OPC_Decode, 25, 1, // Opcode: ADCrsi /* 1720 */ MCD_OPC_FilterValue, 1, 116, 23, // Skip to: 7728 /* 1724 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 1738 /* 1728 */ MCD_OPC_CheckField, 5, 7, 0, 4, 0, // Skip to: 1738 /* 1734 */ MCD_OPC_Decode, 178, 2, 0, // Opcode: RSCrr /* 1738 */ MCD_OPC_CheckPredicate, 0, 98, 23, // Skip to: 7728 /* 1742 */ MCD_OPC_Decode, 179, 2, 1, // Opcode: RSCrsi /* 1746 */ MCD_OPC_FilterValue, 2, 106, 1, // Skip to: 2112 /* 1750 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 1753 */ MCD_OPC_FilterValue, 0, 22, 1, // Skip to: 2035 /* 1757 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 1760 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 1797 /* 1764 */ MCD_OPC_ExtractField, 9, 7, // Inst{15-9} ... /* 1767 */ MCD_OPC_FilterValue, 120, 14, 0, // Skip to: 1785 /* 1771 */ MCD_OPC_CheckPredicate, 0, 65, 23, // Skip to: 7728 /* 1775 */ MCD_OPC_CheckField, 8, 1, 0, 59, 23, // Skip to: 7728 /* 1781 */ MCD_OPC_Decode, 241, 1, 25, // Opcode: MSR /* 1785 */ MCD_OPC_FilterValue, 121, 51, 23, // Skip to: 7728 /* 1789 */ MCD_OPC_CheckPredicate, 6, 47, 23, // Skip to: 7728 /* 1793 */ MCD_OPC_Decode, 242, 1, 26, // Opcode: MSRbanked /* 1797 */ MCD_OPC_FilterValue, 1, 20, 0, // Skip to: 1821 /* 1801 */ MCD_OPC_CheckPredicate, 0, 35, 23, // Skip to: 7728 /* 1805 */ MCD_OPC_CheckField, 22, 1, 0, 29, 23, // Skip to: 7728 /* 1811 */ MCD_OPC_CheckField, 8, 12, 255, 31, 22, 23, // Skip to: 7728 /* 1818 */ MCD_OPC_Decode, 69, 27, // Opcode: BXJ /* 1821 */ MCD_OPC_FilterValue, 2, 57, 0, // Skip to: 1882 /* 1825 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 1828 */ MCD_OPC_FilterValue, 0, 23, 0, // Skip to: 1855 /* 1832 */ MCD_OPC_CheckPredicate, 2, 4, 23, // Skip to: 7728 /* 1836 */ MCD_OPC_CheckField, 28, 4, 14, 254, 22, // Skip to: 7728 /* 1842 */ MCD_OPC_CheckField, 22, 1, 0, 248, 22, // Skip to: 7728 /* 1848 */ MCD_OPC_SoftFail, 128, 26 /* 0xD00 */, 0, /* 1852 */ MCD_OPC_Decode, 95, 8, // Opcode: CRC32H /* 1855 */ MCD_OPC_FilterValue, 1, 237, 22, // Skip to: 7728 /* 1859 */ MCD_OPC_CheckPredicate, 2, 233, 22, // Skip to: 7728 /* 1863 */ MCD_OPC_CheckField, 28, 4, 14, 227, 22, // Skip to: 7728 /* 1869 */ MCD_OPC_CheckField, 22, 1, 0, 221, 22, // Skip to: 7728 /* 1875 */ MCD_OPC_SoftFail, 128, 26 /* 0xD00 */, 0, /* 1879 */ MCD_OPC_Decode, 93, 8, // Opcode: CRC32CH /* 1882 */ MCD_OPC_FilterValue, 3, 25, 0, // Skip to: 1911 /* 1886 */ MCD_OPC_CheckPredicate, 6, 206, 22, // Skip to: 7728 /* 1890 */ MCD_OPC_CheckField, 22, 1, 1, 200, 22, // Skip to: 7728 /* 1896 */ MCD_OPC_CheckField, 8, 12, 0, 194, 22, // Skip to: 7728 /* 1902 */ MCD_OPC_CheckField, 0, 4, 14, 188, 22, // Skip to: 7728 /* 1908 */ MCD_OPC_Decode, 104, 28, // Opcode: ERET /* 1911 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 1942 /* 1915 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 1918 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1930 /* 1922 */ MCD_OPC_CheckPredicate, 3, 170, 22, // Skip to: 7728 /* 1926 */ MCD_OPC_Decode, 223, 2, 13, // Opcode: SMLAWB /* 1930 */ MCD_OPC_FilterValue, 1, 162, 22, // Skip to: 7728 /* 1934 */ MCD_OPC_CheckPredicate, 3, 158, 22, // Skip to: 7728 /* 1938 */ MCD_OPC_Decode, 237, 2, 29, // Opcode: SMULBB /* 1942 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 1973 /* 1946 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 1949 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1961 /* 1953 */ MCD_OPC_CheckPredicate, 3, 139, 22, // Skip to: 7728 /* 1957 */ MCD_OPC_Decode, 243, 2, 29, // Opcode: SMULWB /* 1961 */ MCD_OPC_FilterValue, 1, 131, 22, // Skip to: 7728 /* 1965 */ MCD_OPC_CheckPredicate, 3, 127, 22, // Skip to: 7728 /* 1969 */ MCD_OPC_Decode, 241, 2, 29, // Opcode: SMULTB /* 1973 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 2004 /* 1977 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 1980 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1992 /* 1984 */ MCD_OPC_CheckPredicate, 3, 108, 22, // Skip to: 7728 /* 1988 */ MCD_OPC_Decode, 224, 2, 13, // Opcode: SMLAWT /* 1992 */ MCD_OPC_FilterValue, 1, 100, 22, // Skip to: 7728 /* 1996 */ MCD_OPC_CheckPredicate, 3, 96, 22, // Skip to: 7728 /* 2000 */ MCD_OPC_Decode, 238, 2, 29, // Opcode: SMULBT /* 2004 */ MCD_OPC_FilterValue, 7, 88, 22, // Skip to: 7728 /* 2008 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2011 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2023 /* 2015 */ MCD_OPC_CheckPredicate, 3, 77, 22, // Skip to: 7728 /* 2019 */ MCD_OPC_Decode, 244, 2, 29, // Opcode: SMULWT /* 2023 */ MCD_OPC_FilterValue, 1, 69, 22, // Skip to: 7728 /* 2027 */ MCD_OPC_CheckPredicate, 3, 65, 22, // Skip to: 7728 /* 2031 */ MCD_OPC_Decode, 242, 2, 29, // Opcode: SMULTT /* 2035 */ MCD_OPC_FilterValue, 1, 57, 22, // Skip to: 7728 /* 2039 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2042 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 2078 /* 2046 */ MCD_OPC_CheckPredicate, 0, 15, 0, // Skip to: 2065 /* 2050 */ MCD_OPC_CheckField, 5, 7, 0, 9, 0, // Skip to: 2065 /* 2056 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 2061 */ MCD_OPC_Decode, 222, 3, 16, // Opcode: TEQrr /* 2065 */ MCD_OPC_CheckPredicate, 0, 27, 22, // Skip to: 7728 /* 2069 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 2074 */ MCD_OPC_Decode, 223, 3, 17, // Opcode: TEQrsi /* 2078 */ MCD_OPC_FilterValue, 1, 14, 22, // Skip to: 7728 /* 2082 */ MCD_OPC_CheckPredicate, 0, 14, 0, // Skip to: 2100 /* 2086 */ MCD_OPC_CheckField, 5, 7, 0, 8, 0, // Skip to: 2100 /* 2092 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 2097 */ MCD_OPC_Decode, 79, 16, // Opcode: CMNzrr /* 2100 */ MCD_OPC_CheckPredicate, 0, 248, 21, // Skip to: 7728 /* 2104 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 2109 */ MCD_OPC_Decode, 80, 17, // Opcode: CMNzrsi /* 2112 */ MCD_OPC_FilterValue, 3, 236, 21, // Skip to: 7728 /* 2116 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2119 */ MCD_OPC_FilterValue, 0, 64, 0, // Skip to: 2187 /* 2123 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 2144 /* 2127 */ MCD_OPC_CheckField, 5, 16, 128, 15, 10, 0, // Skip to: 2144 /* 2134 */ MCD_OPC_CheckField, 0, 4, 14, 4, 0, // Skip to: 2144 /* 2140 */ MCD_OPC_Decode, 218, 1, 28, // Opcode: MOVPCLR /* 2144 */ MCD_OPC_ExtractField, 5, 7, // Inst{11-5} ... /* 2147 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 2173 /* 2151 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 2165 /* 2155 */ MCD_OPC_CheckField, 16, 4, 0, 4, 0, // Skip to: 2165 /* 2161 */ MCD_OPC_Decode, 228, 1, 30, // Opcode: MOVr /* 2165 */ MCD_OPC_CheckPredicate, 0, 4, 0, // Skip to: 2173 /* 2169 */ MCD_OPC_Decode, 229, 1, 31, // Opcode: MOVr_TC /* 2173 */ MCD_OPC_CheckPredicate, 0, 175, 21, // Skip to: 7728 /* 2177 */ MCD_OPC_CheckField, 16, 4, 0, 169, 21, // Skip to: 7728 /* 2183 */ MCD_OPC_Decode, 230, 1, 32, // Opcode: MOVsi /* 2187 */ MCD_OPC_FilterValue, 1, 161, 21, // Skip to: 7728 /* 2191 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 2194 */ MCD_OPC_FilterValue, 0, 154, 21, // Skip to: 7728 /* 2198 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 2212 /* 2202 */ MCD_OPC_CheckField, 5, 7, 0, 4, 0, // Skip to: 2212 /* 2208 */ MCD_OPC_Decode, 248, 1, 30, // Opcode: MVNr /* 2212 */ MCD_OPC_CheckPredicate, 0, 136, 21, // Skip to: 7728 /* 2216 */ MCD_OPC_Decode, 249, 1, 32, // Opcode: MVNsi /* 2220 */ MCD_OPC_FilterValue, 1, 128, 21, // Skip to: 7728 /* 2224 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 2227 */ MCD_OPC_FilterValue, 0, 57, 1, // Skip to: 2544 /* 2231 */ MCD_OPC_ExtractField, 22, 3, // Inst{24-22} ... /* 2234 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 2245 /* 2238 */ MCD_OPC_CheckPredicate, 0, 110, 21, // Skip to: 7728 /* 2242 */ MCD_OPC_Decode, 103, 2, // Opcode: EORrsr /* 2245 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 2257 /* 2249 */ MCD_OPC_CheckPredicate, 0, 99, 21, // Skip to: 7728 /* 2253 */ MCD_OPC_Decode, 176, 2, 2, // Opcode: RSBrsr /* 2257 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 2268 /* 2261 */ MCD_OPC_CheckPredicate, 0, 87, 21, // Skip to: 7728 /* 2265 */ MCD_OPC_Decode, 26, 3, // Opcode: ADCrsr /* 2268 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2280 /* 2272 */ MCD_OPC_CheckPredicate, 0, 76, 21, // Skip to: 7728 /* 2276 */ MCD_OPC_Decode, 180, 2, 2, // Opcode: RSCrsr /* 2280 */ MCD_OPC_FilterValue, 4, 137, 0, // Skip to: 2421 /* 2284 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2287 */ MCD_OPC_FilterValue, 0, 113, 0, // Skip to: 2404 /* 2291 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 2294 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 2339 /* 2298 */ MCD_OPC_ExtractField, 8, 12, // Inst{19-8} ... /* 2301 */ MCD_OPC_FilterValue, 255, 31, 46, 21, // Skip to: 7728 /* 2306 */ MCD_OPC_CheckPredicate, 7, 9, 0, // Skip to: 2319 /* 2310 */ MCD_OPC_CheckField, 0, 4, 14, 3, 0, // Skip to: 2319 /* 2316 */ MCD_OPC_Decode, 71, 28, // Opcode: BX_RET /* 2319 */ MCD_OPC_CheckPredicate, 7, 9, 0, // Skip to: 2332 /* 2323 */ MCD_OPC_CheckField, 28, 4, 14, 3, 0, // Skip to: 2332 /* 2329 */ MCD_OPC_Decode, 68, 33, // Opcode: BX /* 2332 */ MCD_OPC_CheckPredicate, 7, 16, 21, // Skip to: 7728 /* 2336 */ MCD_OPC_Decode, 72, 27, // Opcode: BX_pred /* 2339 */ MCD_OPC_FilterValue, 1, 28, 0, // Skip to: 2371 /* 2343 */ MCD_OPC_ExtractField, 8, 12, // Inst{19-8} ... /* 2346 */ MCD_OPC_FilterValue, 255, 31, 1, 21, // Skip to: 7728 /* 2351 */ MCD_OPC_CheckPredicate, 8, 9, 0, // Skip to: 2364 /* 2355 */ MCD_OPC_CheckField, 28, 4, 14, 3, 0, // Skip to: 2364 /* 2361 */ MCD_OPC_Decode, 59, 33, // Opcode: BLX /* 2364 */ MCD_OPC_CheckPredicate, 8, 240, 20, // Skip to: 7728 /* 2368 */ MCD_OPC_Decode, 60, 27, // Opcode: BLX_pred /* 2371 */ MCD_OPC_FilterValue, 2, 12, 0, // Skip to: 2387 /* 2375 */ MCD_OPC_CheckPredicate, 0, 229, 20, // Skip to: 7728 /* 2379 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 2383 */ MCD_OPC_Decode, 151, 2, 20, // Opcode: QSUB /* 2387 */ MCD_OPC_FilterValue, 3, 217, 20, // Skip to: 7728 /* 2391 */ MCD_OPC_CheckPredicate, 0, 213, 20, // Skip to: 7728 /* 2395 */ MCD_OPC_CheckField, 28, 4, 14, 207, 20, // Skip to: 7728 /* 2401 */ MCD_OPC_Decode, 57, 15, // Opcode: BKPT /* 2404 */ MCD_OPC_FilterValue, 1, 200, 20, // Skip to: 7728 /* 2408 */ MCD_OPC_CheckPredicate, 0, 196, 20, // Skip to: 7728 /* 2412 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 2417 */ MCD_OPC_Decode, 224, 3, 18, // Opcode: TEQrsr /* 2421 */ MCD_OPC_FilterValue, 5, 83, 0, // Skip to: 2508 /* 2425 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2428 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 2492 /* 2432 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 2435 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 2458 /* 2439 */ MCD_OPC_CheckPredicate, 8, 165, 20, // Skip to: 7728 /* 2443 */ MCD_OPC_CheckField, 16, 4, 15, 159, 20, // Skip to: 7728 /* 2449 */ MCD_OPC_CheckField, 8, 4, 15, 153, 20, // Skip to: 7728 /* 2455 */ MCD_OPC_Decode, 77, 34, // Opcode: CLZ /* 2458 */ MCD_OPC_FilterValue, 2, 12, 0, // Skip to: 2474 /* 2462 */ MCD_OPC_CheckPredicate, 0, 142, 20, // Skip to: 7728 /* 2466 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 2470 */ MCD_OPC_Decode, 149, 2, 20, // Opcode: QDSUB /* 2474 */ MCD_OPC_FilterValue, 3, 130, 20, // Skip to: 7728 /* 2478 */ MCD_OPC_CheckPredicate, 9, 126, 20, // Skip to: 7728 /* 2482 */ MCD_OPC_CheckField, 8, 12, 0, 120, 20, // Skip to: 7728 /* 2488 */ MCD_OPC_Decode, 208, 2, 35, // Opcode: SMC /* 2492 */ MCD_OPC_FilterValue, 1, 112, 20, // Skip to: 7728 /* 2496 */ MCD_OPC_CheckPredicate, 0, 108, 20, // Skip to: 7728 /* 2500 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 2505 */ MCD_OPC_Decode, 81, 18, // Opcode: CMNzrsr /* 2508 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 2526 /* 2512 */ MCD_OPC_CheckPredicate, 0, 92, 20, // Skip to: 7728 /* 2516 */ MCD_OPC_CheckField, 16, 4, 0, 86, 20, // Skip to: 7728 /* 2522 */ MCD_OPC_Decode, 231, 1, 36, // Opcode: MOVsr /* 2526 */ MCD_OPC_FilterValue, 7, 78, 20, // Skip to: 7728 /* 2530 */ MCD_OPC_CheckPredicate, 0, 74, 20, // Skip to: 7728 /* 2534 */ MCD_OPC_CheckField, 16, 4, 0, 68, 20, // Skip to: 7728 /* 2540 */ MCD_OPC_Decode, 250, 1, 37, // Opcode: MVNsr /* 2544 */ MCD_OPC_FilterValue, 1, 60, 20, // Skip to: 7728 /* 2548 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 2551 */ MCD_OPC_FilterValue, 0, 5, 1, // Skip to: 2816 /* 2555 */ MCD_OPC_ExtractField, 22, 3, // Inst{24-22} ... /* 2558 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2570 /* 2562 */ MCD_OPC_CheckPredicate, 1, 42, 20, // Skip to: 7728 /* 2566 */ MCD_OPC_Decode, 209, 1, 38, // Opcode: MLA /* 2570 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 2588 /* 2574 */ MCD_OPC_CheckPredicate, 10, 30, 20, // Skip to: 7728 /* 2578 */ MCD_OPC_CheckField, 20, 1, 0, 24, 20, // Skip to: 7728 /* 2584 */ MCD_OPC_Decode, 211, 1, 39, // Opcode: MLS /* 2588 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 2600 /* 2592 */ MCD_OPC_CheckPredicate, 1, 12, 20, // Skip to: 7728 /* 2596 */ MCD_OPC_Decode, 245, 3, 40, // Opcode: UMLAL /* 2600 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2612 /* 2604 */ MCD_OPC_CheckPredicate, 1, 0, 20, // Skip to: 7728 /* 2608 */ MCD_OPC_Decode, 213, 2, 40, // Opcode: SMLAL /* 2612 */ MCD_OPC_FilterValue, 6, 76, 0, // Skip to: 2692 /* 2616 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2619 */ MCD_OPC_FilterValue, 14, 32, 0, // Skip to: 2655 /* 2623 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2626 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2638 /* 2630 */ MCD_OPC_CheckPredicate, 5, 230, 19, // Skip to: 7728 /* 2634 */ MCD_OPC_Decode, 153, 3, 41, // Opcode: STLEXD /* 2638 */ MCD_OPC_FilterValue, 1, 222, 19, // Skip to: 7728 /* 2642 */ MCD_OPC_CheckPredicate, 5, 218, 19, // Skip to: 7728 /* 2646 */ MCD_OPC_CheckField, 0, 4, 15, 212, 19, // Skip to: 7728 /* 2652 */ MCD_OPC_Decode, 127, 42, // Opcode: LDAEXD /* 2655 */ MCD_OPC_FilterValue, 15, 205, 19, // Skip to: 7728 /* 2659 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2662 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2674 /* 2666 */ MCD_OPC_CheckPredicate, 0, 194, 19, // Skip to: 7728 /* 2670 */ MCD_OPC_Decode, 180, 3, 41, // Opcode: STREXD /* 2674 */ MCD_OPC_FilterValue, 1, 186, 19, // Skip to: 7728 /* 2678 */ MCD_OPC_CheckPredicate, 0, 182, 19, // Skip to: 7728 /* 2682 */ MCD_OPC_CheckField, 0, 4, 15, 176, 19, // Skip to: 7728 /* 2688 */ MCD_OPC_Decode, 169, 1, 42, // Opcode: LDREXD /* 2692 */ MCD_OPC_FilterValue, 7, 168, 19, // Skip to: 7728 /* 2696 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2699 */ MCD_OPC_FilterValue, 12, 39, 0, // Skip to: 2742 /* 2703 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2706 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2724 /* 2710 */ MCD_OPC_CheckPredicate, 5, 150, 19, // Skip to: 7728 /* 2714 */ MCD_OPC_CheckField, 12, 4, 15, 144, 19, // Skip to: 7728 /* 2720 */ MCD_OPC_Decode, 155, 3, 21, // Opcode: STLH /* 2724 */ MCD_OPC_FilterValue, 1, 136, 19, // Skip to: 7728 /* 2728 */ MCD_OPC_CheckPredicate, 5, 132, 19, // Skip to: 7728 /* 2732 */ MCD_OPC_CheckField, 0, 4, 15, 126, 19, // Skip to: 7728 /* 2738 */ MCD_OPC_Decode, 129, 1, 22, // Opcode: LDAH /* 2742 */ MCD_OPC_FilterValue, 14, 33, 0, // Skip to: 2779 /* 2746 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2749 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2761 /* 2753 */ MCD_OPC_CheckPredicate, 5, 107, 19, // Skip to: 7728 /* 2757 */ MCD_OPC_Decode, 154, 3, 23, // Opcode: STLEXH /* 2761 */ MCD_OPC_FilterValue, 1, 99, 19, // Skip to: 7728 /* 2765 */ MCD_OPC_CheckPredicate, 5, 95, 19, // Skip to: 7728 /* 2769 */ MCD_OPC_CheckField, 0, 4, 15, 89, 19, // Skip to: 7728 /* 2775 */ MCD_OPC_Decode, 128, 1, 22, // Opcode: LDAEXH /* 2779 */ MCD_OPC_FilterValue, 15, 81, 19, // Skip to: 7728 /* 2783 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2786 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2798 /* 2790 */ MCD_OPC_CheckPredicate, 0, 70, 19, // Skip to: 7728 /* 2794 */ MCD_OPC_Decode, 181, 3, 23, // Opcode: STREXH /* 2798 */ MCD_OPC_FilterValue, 1, 62, 19, // Skip to: 7728 /* 2802 */ MCD_OPC_CheckPredicate, 0, 58, 19, // Skip to: 7728 /* 2806 */ MCD_OPC_CheckField, 0, 4, 15, 52, 19, // Skip to: 7728 /* 2812 */ MCD_OPC_Decode, 170, 1, 22, // Opcode: LDREXH /* 2816 */ MCD_OPC_FilterValue, 1, 113, 0, // Skip to: 2933 /* 2820 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2823 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 2879 /* 2827 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 2830 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 2867 /* 2834 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2837 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2855 /* 2841 */ MCD_OPC_CheckPredicate, 0, 19, 19, // Skip to: 7728 /* 2845 */ MCD_OPC_CheckField, 8, 4, 0, 13, 19, // Skip to: 7728 /* 2851 */ MCD_OPC_Decode, 184, 3, 43, // Opcode: STRHTr /* 2855 */ MCD_OPC_FilterValue, 1, 5, 19, // Skip to: 7728 /* 2859 */ MCD_OPC_CheckPredicate, 0, 1, 19, // Skip to: 7728 /* 2863 */ MCD_OPC_Decode, 183, 3, 44, // Opcode: STRHTi /* 2867 */ MCD_OPC_FilterValue, 1, 249, 18, // Skip to: 7728 /* 2871 */ MCD_OPC_CheckPredicate, 0, 245, 18, // Skip to: 7728 /* 2875 */ MCD_OPC_Decode, 186, 3, 7, // Opcode: STRH_PRE /* 2879 */ MCD_OPC_FilterValue, 1, 237, 18, // Skip to: 7728 /* 2883 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 2886 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 2921 /* 2890 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2893 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 2909 /* 2897 */ MCD_OPC_CheckPredicate, 0, 219, 18, // Skip to: 7728 /* 2901 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 2905 */ MCD_OPC_Decode, 173, 1, 45, // Opcode: LDRHTr /* 2909 */ MCD_OPC_FilterValue, 1, 207, 18, // Skip to: 7728 /* 2913 */ MCD_OPC_CheckPredicate, 0, 203, 18, // Skip to: 7728 /* 2917 */ MCD_OPC_Decode, 172, 1, 46, // Opcode: LDRHTi /* 2921 */ MCD_OPC_FilterValue, 1, 195, 18, // Skip to: 7728 /* 2925 */ MCD_OPC_CheckPredicate, 0, 191, 18, // Skip to: 7728 /* 2929 */ MCD_OPC_Decode, 175, 1, 7, // Opcode: LDRH_PRE /* 2933 */ MCD_OPC_FilterValue, 2, 75, 0, // Skip to: 3012 /* 2937 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2940 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2958 /* 2944 */ MCD_OPC_CheckPredicate, 0, 172, 18, // Skip to: 7728 /* 2948 */ MCD_OPC_CheckField, 24, 1, 1, 166, 18, // Skip to: 7728 /* 2954 */ MCD_OPC_Decode, 166, 1, 7, // Opcode: LDRD_PRE /* 2958 */ MCD_OPC_FilterValue, 1, 158, 18, // Skip to: 7728 /* 2962 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 2965 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 3000 /* 2969 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2972 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 2988 /* 2976 */ MCD_OPC_CheckPredicate, 0, 140, 18, // Skip to: 7728 /* 2980 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 2984 */ MCD_OPC_Decode, 181, 1, 45, // Opcode: LDRSBTr /* 2988 */ MCD_OPC_FilterValue, 1, 128, 18, // Skip to: 7728 /* 2992 */ MCD_OPC_CheckPredicate, 0, 124, 18, // Skip to: 7728 /* 2996 */ MCD_OPC_Decode, 180, 1, 46, // Opcode: LDRSBTi /* 3000 */ MCD_OPC_FilterValue, 1, 116, 18, // Skip to: 7728 /* 3004 */ MCD_OPC_CheckPredicate, 0, 112, 18, // Skip to: 7728 /* 3008 */ MCD_OPC_Decode, 183, 1, 7, // Opcode: LDRSB_PRE /* 3012 */ MCD_OPC_FilterValue, 3, 104, 18, // Skip to: 7728 /* 3016 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 3019 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3037 /* 3023 */ MCD_OPC_CheckPredicate, 0, 93, 18, // Skip to: 7728 /* 3027 */ MCD_OPC_CheckField, 24, 1, 1, 87, 18, // Skip to: 7728 /* 3033 */ MCD_OPC_Decode, 177, 3, 7, // Opcode: STRD_PRE /* 3037 */ MCD_OPC_FilterValue, 1, 79, 18, // Skip to: 7728 /* 3041 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3044 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 3079 /* 3048 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 3051 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 3067 /* 3055 */ MCD_OPC_CheckPredicate, 0, 61, 18, // Skip to: 7728 /* 3059 */ MCD_OPC_SoftFail, 128, 30 /* 0xF00 */, 0, /* 3063 */ MCD_OPC_Decode, 186, 1, 45, // Opcode: LDRSHTr /* 3067 */ MCD_OPC_FilterValue, 1, 49, 18, // Skip to: 7728 /* 3071 */ MCD_OPC_CheckPredicate, 0, 45, 18, // Skip to: 7728 /* 3075 */ MCD_OPC_Decode, 185, 1, 46, // Opcode: LDRSHTi /* 3079 */ MCD_OPC_FilterValue, 1, 37, 18, // Skip to: 7728 /* 3083 */ MCD_OPC_CheckPredicate, 0, 33, 18, // Skip to: 7728 /* 3087 */ MCD_OPC_Decode, 188, 1, 7, // Opcode: LDRSH_PRE /* 3091 */ MCD_OPC_FilterValue, 1, 147, 1, // Skip to: 3498 /* 3095 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 3098 */ MCD_OPC_FilterValue, 0, 170, 0, // Skip to: 3272 /* 3102 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3105 */ MCD_OPC_FilterValue, 0, 62, 0, // Skip to: 3171 /* 3109 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 3112 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 3123 /* 3116 */ MCD_OPC_CheckPredicate, 0, 38, 0, // Skip to: 3158 /* 3120 */ MCD_OPC_Decode, 42, 47, // Opcode: ANDri /* 3123 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3135 /* 3127 */ MCD_OPC_CheckPredicate, 0, 27, 0, // Skip to: 3158 /* 3131 */ MCD_OPC_Decode, 204, 3, 47, // Opcode: SUBri /* 3135 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 3146 /* 3139 */ MCD_OPC_CheckPredicate, 0, 15, 0, // Skip to: 3158 /* 3143 */ MCD_OPC_Decode, 31, 47, // Opcode: ADDri /* 3146 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 3158 /* 3150 */ MCD_OPC_CheckPredicate, 0, 4, 0, // Skip to: 3158 /* 3154 */ MCD_OPC_Decode, 184, 2, 47, // Opcode: SBCri /* 3158 */ MCD_OPC_CheckPredicate, 0, 214, 17, // Skip to: 7728 /* 3162 */ MCD_OPC_CheckField, 16, 5, 15, 208, 17, // Skip to: 7728 /* 3168 */ MCD_OPC_Decode, 37, 48, // Opcode: ADR /* 3171 */ MCD_OPC_FilterValue, 1, 201, 17, // Skip to: 7728 /* 3175 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 3178 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 3214 /* 3182 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 3185 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3197 /* 3189 */ MCD_OPC_CheckPredicate, 10, 183, 17, // Skip to: 7728 /* 3193 */ MCD_OPC_Decode, 225, 1, 49, // Opcode: MOVi16 /* 3197 */ MCD_OPC_FilterValue, 1, 175, 17, // Skip to: 7728 /* 3201 */ MCD_OPC_CheckPredicate, 0, 171, 17, // Skip to: 7728 /* 3205 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 3210 */ MCD_OPC_Decode, 228, 3, 50, // Opcode: TSTri /* 3214 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 3249 /* 3218 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 3221 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3233 /* 3225 */ MCD_OPC_CheckPredicate, 10, 147, 17, // Skip to: 7728 /* 3229 */ MCD_OPC_Decode, 220, 1, 49, // Opcode: MOVTi16 /* 3233 */ MCD_OPC_FilterValue, 1, 139, 17, // Skip to: 7728 /* 3237 */ MCD_OPC_CheckPredicate, 0, 135, 17, // Skip to: 7728 /* 3241 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 3246 */ MCD_OPC_Decode, 82, 50, // Opcode: CMPri /* 3249 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3261 /* 3253 */ MCD_OPC_CheckPredicate, 0, 119, 17, // Skip to: 7728 /* 3257 */ MCD_OPC_Decode, 251, 1, 47, // Opcode: ORRri /* 3261 */ MCD_OPC_FilterValue, 3, 111, 17, // Skip to: 7728 /* 3265 */ MCD_OPC_CheckPredicate, 0, 107, 17, // Skip to: 7728 /* 3269 */ MCD_OPC_Decode, 53, 47, // Opcode: BICri /* 3272 */ MCD_OPC_FilterValue, 1, 100, 17, // Skip to: 7728 /* 3276 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 3279 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 3309 /* 3283 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 3286 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 3297 /* 3290 */ MCD_OPC_CheckPredicate, 0, 82, 17, // Skip to: 7728 /* 3294 */ MCD_OPC_Decode, 100, 47, // Opcode: EORri /* 3297 */ MCD_OPC_FilterValue, 1, 75, 17, // Skip to: 7728 /* 3301 */ MCD_OPC_CheckPredicate, 0, 71, 17, // Skip to: 7728 /* 3305 */ MCD_OPC_Decode, 173, 2, 47, // Opcode: RSBri /* 3309 */ MCD_OPC_FilterValue, 1, 26, 0, // Skip to: 3339 /* 3313 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 3316 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 3327 /* 3320 */ MCD_OPC_CheckPredicate, 0, 52, 17, // Skip to: 7728 /* 3324 */ MCD_OPC_Decode, 23, 47, // Opcode: ADCri /* 3327 */ MCD_OPC_FilterValue, 1, 45, 17, // Skip to: 7728 /* 3331 */ MCD_OPC_CheckPredicate, 0, 41, 17, // Skip to: 7728 /* 3335 */ MCD_OPC_Decode, 177, 2, 47, // Opcode: RSCri /* 3339 */ MCD_OPC_FilterValue, 2, 112, 0, // Skip to: 3455 /* 3343 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 3346 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 3415 /* 3350 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 3353 */ MCD_OPC_FilterValue, 15, 19, 17, // Skip to: 7728 /* 3357 */ MCD_OPC_CheckPredicate, 11, 21, 0, // Skip to: 3382 /* 3361 */ MCD_OPC_CheckField, 22, 1, 0, 15, 0, // Skip to: 3382 /* 3367 */ MCD_OPC_CheckField, 16, 4, 0, 9, 0, // Skip to: 3382 /* 3373 */ MCD_OPC_CheckField, 4, 8, 15, 3, 0, // Skip to: 3382 /* 3379 */ MCD_OPC_Decode, 97, 35, // Opcode: DBG /* 3382 */ MCD_OPC_CheckPredicate, 1, 21, 0, // Skip to: 3407 /* 3386 */ MCD_OPC_CheckField, 22, 1, 0, 15, 0, // Skip to: 3407 /* 3392 */ MCD_OPC_CheckField, 16, 4, 0, 9, 0, // Skip to: 3407 /* 3398 */ MCD_OPC_CheckField, 8, 4, 0, 3, 0, // Skip to: 3407 /* 3404 */ MCD_OPC_Decode, 114, 51, // Opcode: HINT /* 3407 */ MCD_OPC_CheckPredicate, 0, 221, 16, // Skip to: 7728 /* 3411 */ MCD_OPC_Decode, 243, 1, 52, // Opcode: MSRi /* 3415 */ MCD_OPC_FilterValue, 1, 213, 16, // Skip to: 7728 /* 3419 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 3422 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 3439 /* 3426 */ MCD_OPC_CheckPredicate, 0, 202, 16, // Skip to: 7728 /* 3430 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 3435 */ MCD_OPC_Decode, 221, 3, 50, // Opcode: TEQri /* 3439 */ MCD_OPC_FilterValue, 1, 189, 16, // Skip to: 7728 /* 3443 */ MCD_OPC_CheckPredicate, 0, 185, 16, // Skip to: 7728 /* 3447 */ MCD_OPC_SoftFail, 128, 224, 3 /* 0xF000 */, 0, /* 3452 */ MCD_OPC_Decode, 78, 50, // Opcode: CMNri /* 3455 */ MCD_OPC_FilterValue, 3, 173, 16, // Skip to: 7728 /* 3459 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 3462 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3480 /* 3466 */ MCD_OPC_CheckPredicate, 0, 162, 16, // Skip to: 7728 /* 3470 */ MCD_OPC_CheckField, 16, 4, 0, 156, 16, // Skip to: 7728 /* 3476 */ MCD_OPC_Decode, 224, 1, 53, // Opcode: MOVi /* 3480 */ MCD_OPC_FilterValue, 1, 148, 16, // Skip to: 7728 /* 3484 */ MCD_OPC_CheckPredicate, 0, 144, 16, // Skip to: 7728 /* 3488 */ MCD_OPC_CheckField, 16, 4, 0, 138, 16, // Skip to: 7728 /* 3494 */ MCD_OPC_Decode, 247, 1, 53, // Opcode: MVNi /* 3498 */ MCD_OPC_FilterValue, 2, 160, 1, // Skip to: 3918 /* 3502 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 3505 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 3536 /* 3509 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3512 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3524 /* 3516 */ MCD_OPC_CheckPredicate, 0, 112, 16, // Skip to: 7728 /* 3520 */ MCD_OPC_Decode, 191, 3, 54, // Opcode: STR_POST_IMM /* 3524 */ MCD_OPC_FilterValue, 1, 104, 16, // Skip to: 7728 /* 3528 */ MCD_OPC_CheckPredicate, 0, 100, 16, // Skip to: 7728 /* 3532 */ MCD_OPC_Decode, 195, 3, 55, // Opcode: STRi12 /* 3536 */ MCD_OPC_FilterValue, 1, 47, 0, // Skip to: 3587 /* 3540 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3543 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3555 /* 3547 */ MCD_OPC_CheckPredicate, 0, 81, 16, // Skip to: 7728 /* 3551 */ MCD_OPC_Decode, 192, 1, 54, // Opcode: LDR_POST_IMM /* 3555 */ MCD_OPC_FilterValue, 1, 73, 16, // Skip to: 7728 /* 3559 */ MCD_OPC_CheckPredicate, 12, 16, 0, // Skip to: 3579 /* 3563 */ MCD_OPC_CheckField, 28, 4, 15, 10, 0, // Skip to: 3579 /* 3569 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 3579 /* 3575 */ MCD_OPC_Decode, 138, 2, 56, // Opcode: PLDWi12 /* 3579 */ MCD_OPC_CheckPredicate, 0, 49, 16, // Skip to: 7728 /* 3583 */ MCD_OPC_Decode, 197, 1, 55, // Opcode: LDRi12 /* 3587 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 3618 /* 3591 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3594 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3606 /* 3598 */ MCD_OPC_CheckPredicate, 0, 30, 16, // Skip to: 7728 /* 3602 */ MCD_OPC_Decode, 189, 3, 54, // Opcode: STRT_POST_IMM /* 3606 */ MCD_OPC_FilterValue, 1, 22, 16, // Skip to: 7728 /* 3610 */ MCD_OPC_CheckPredicate, 0, 18, 16, // Skip to: 7728 /* 3614 */ MCD_OPC_Decode, 193, 3, 57, // Opcode: STR_PRE_IMM /* 3618 */ MCD_OPC_FilterValue, 3, 27, 0, // Skip to: 3649 /* 3622 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3625 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3637 /* 3629 */ MCD_OPC_CheckPredicate, 0, 255, 15, // Skip to: 7728 /* 3633 */ MCD_OPC_Decode, 190, 1, 54, // Opcode: LDRT_POST_IMM /* 3637 */ MCD_OPC_FilterValue, 1, 247, 15, // Skip to: 7728 /* 3641 */ MCD_OPC_CheckPredicate, 0, 243, 15, // Skip to: 7728 /* 3645 */ MCD_OPC_Decode, 194, 1, 58, // Opcode: LDR_PRE_IMM /* 3649 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 3680 /* 3653 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3656 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3668 /* 3660 */ MCD_OPC_CheckPredicate, 0, 224, 15, // Skip to: 7728 /* 3664 */ MCD_OPC_Decode, 167, 3, 54, // Opcode: STRB_POST_IMM /* 3668 */ MCD_OPC_FilterValue, 1, 216, 15, // Skip to: 7728 /* 3672 */ MCD_OPC_CheckPredicate, 0, 212, 15, // Skip to: 7728 /* 3676 */ MCD_OPC_Decode, 171, 3, 59, // Opcode: STRBi12 /* 3680 */ MCD_OPC_FilterValue, 5, 67, 0, // Skip to: 3751 /* 3684 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3687 */ MCD_OPC_FilterValue, 0, 28, 0, // Skip to: 3719 /* 3691 */ MCD_OPC_CheckPredicate, 11, 16, 0, // Skip to: 3711 /* 3695 */ MCD_OPC_CheckField, 28, 4, 15, 10, 0, // Skip to: 3711 /* 3701 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 3711 /* 3707 */ MCD_OPC_Decode, 142, 2, 56, // Opcode: PLIi12 /* 3711 */ MCD_OPC_CheckPredicate, 0, 173, 15, // Skip to: 7728 /* 3715 */ MCD_OPC_Decode, 158, 1, 54, // Opcode: LDRB_POST_IMM /* 3719 */ MCD_OPC_FilterValue, 1, 165, 15, // Skip to: 7728 /* 3723 */ MCD_OPC_CheckPredicate, 0, 16, 0, // Skip to: 3743 /* 3727 */ MCD_OPC_CheckField, 28, 4, 15, 10, 0, // Skip to: 3743 /* 3733 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 3743 /* 3739 */ MCD_OPC_Decode, 140, 2, 56, // Opcode: PLDi12 /* 3743 */ MCD_OPC_CheckPredicate, 0, 141, 15, // Skip to: 7728 /* 3747 */ MCD_OPC_Decode, 162, 1, 59, // Opcode: LDRBi12 /* 3751 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 3782 /* 3755 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3758 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3770 /* 3762 */ MCD_OPC_CheckPredicate, 0, 122, 15, // Skip to: 7728 /* 3766 */ MCD_OPC_Decode, 165, 3, 54, // Opcode: STRBT_POST_IMM /* 3770 */ MCD_OPC_FilterValue, 1, 114, 15, // Skip to: 7728 /* 3774 */ MCD_OPC_CheckPredicate, 0, 110, 15, // Skip to: 7728 /* 3778 */ MCD_OPC_Decode, 169, 3, 57, // Opcode: STRB_PRE_IMM /* 3782 */ MCD_OPC_FilterValue, 7, 102, 15, // Skip to: 7728 /* 3786 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3789 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3801 /* 3793 */ MCD_OPC_CheckPredicate, 0, 91, 15, // Skip to: 7728 /* 3797 */ MCD_OPC_Decode, 156, 1, 54, // Opcode: LDRBT_POST_IMM /* 3801 */ MCD_OPC_FilterValue, 1, 83, 15, // Skip to: 7728 /* 3805 */ MCD_OPC_CheckPredicate, 11, 23, 0, // Skip to: 3832 /* 3809 */ MCD_OPC_CheckField, 28, 4, 15, 17, 0, // Skip to: 3832 /* 3815 */ MCD_OPC_CheckField, 23, 1, 0, 11, 0, // Skip to: 3832 /* 3821 */ MCD_OPC_CheckField, 0, 20, 159, 224, 63, 3, 0, // Skip to: 3832 /* 3829 */ MCD_OPC_Decode, 76, 60, // Opcode: CLREX /* 3832 */ MCD_OPC_ExtractField, 4, 16, // Inst{19-4} ... /* 3835 */ MCD_OPC_FilterValue, 132, 254, 3, 19, 0, // Skip to: 3860 /* 3841 */ MCD_OPC_CheckPredicate, 13, 65, 0, // Skip to: 3910 /* 3845 */ MCD_OPC_CheckField, 28, 4, 15, 59, 0, // Skip to: 3910 /* 3851 */ MCD_OPC_CheckField, 23, 1, 0, 53, 0, // Skip to: 3910 /* 3857 */ MCD_OPC_Decode, 99, 61, // Opcode: DSB /* 3860 */ MCD_OPC_FilterValue, 133, 254, 3, 19, 0, // Skip to: 3885 /* 3866 */ MCD_OPC_CheckPredicate, 13, 40, 0, // Skip to: 3910 /* 3870 */ MCD_OPC_CheckField, 28, 4, 15, 34, 0, // Skip to: 3910 /* 3876 */ MCD_OPC_CheckField, 23, 1, 0, 28, 0, // Skip to: 3910 /* 3882 */ MCD_OPC_Decode, 98, 61, // Opcode: DMB /* 3885 */ MCD_OPC_FilterValue, 134, 254, 3, 19, 0, // Skip to: 3910 /* 3891 */ MCD_OPC_CheckPredicate, 13, 15, 0, // Skip to: 3910 /* 3895 */ MCD_OPC_CheckField, 28, 4, 15, 9, 0, // Skip to: 3910 /* 3901 */ MCD_OPC_CheckField, 23, 1, 0, 3, 0, // Skip to: 3910 /* 3907 */ MCD_OPC_Decode, 117, 62, // Opcode: ISB /* 3910 */ MCD_OPC_CheckPredicate, 0, 230, 14, // Skip to: 7728 /* 3914 */ MCD_OPC_Decode, 160, 1, 58, // Opcode: LDRB_PRE_IMM /* 3918 */ MCD_OPC_FilterValue, 3, 44, 9, // Skip to: 6270 /* 3922 */ MCD_OPC_ExtractField, 21, 2, // Inst{22-21} ... /* 3925 */ MCD_OPC_FilterValue, 0, 109, 2, // Skip to: 4550 /* 3929 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 3932 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 4021 /* 3936 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 3939 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 3970 /* 3943 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3946 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3958 /* 3950 */ MCD_OPC_CheckPredicate, 0, 190, 14, // Skip to: 7728 /* 3954 */ MCD_OPC_Decode, 192, 3, 54, // Opcode: STR_POST_REG /* 3958 */ MCD_OPC_FilterValue, 1, 182, 14, // Skip to: 7728 /* 3962 */ MCD_OPC_CheckPredicate, 0, 178, 14, // Skip to: 7728 /* 3966 */ MCD_OPC_Decode, 198, 3, 63, // Opcode: STRrs /* 3970 */ MCD_OPC_FilterValue, 1, 170, 14, // Skip to: 7728 /* 3974 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 3977 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3989 /* 3981 */ MCD_OPC_CheckPredicate, 0, 159, 14, // Skip to: 7728 /* 3985 */ MCD_OPC_Decode, 193, 1, 54, // Opcode: LDR_POST_REG /* 3989 */ MCD_OPC_FilterValue, 1, 151, 14, // Skip to: 7728 /* 3993 */ MCD_OPC_CheckPredicate, 12, 16, 0, // Skip to: 4013 /* 3997 */ MCD_OPC_CheckField, 28, 4, 15, 10, 0, // Skip to: 4013 /* 4003 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 4013 /* 4009 */ MCD_OPC_Decode, 139, 2, 64, // Opcode: PLDWrs /* 4013 */ MCD_OPC_CheckPredicate, 0, 127, 14, // Skip to: 7728 /* 4017 */ MCD_OPC_Decode, 198, 1, 63, // Opcode: LDRrs /* 4021 */ MCD_OPC_FilterValue, 1, 119, 14, // Skip to: 7728 /* 4025 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 4028 */ MCD_OPC_FilterValue, 0, 176, 0, // Skip to: 4208 /* 4032 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 4035 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 4086 /* 4039 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4042 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 4064 /* 4046 */ MCD_OPC_CheckPredicate, 0, 94, 14, // Skip to: 7728 /* 4050 */ MCD_OPC_CheckField, 20, 1, 1, 88, 14, // Skip to: 7728 /* 4056 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4060 */ MCD_OPC_Decode, 181, 2, 65, // Opcode: SADD16 /* 4064 */ MCD_OPC_FilterValue, 1, 76, 14, // Skip to: 7728 /* 4068 */ MCD_OPC_CheckPredicate, 0, 72, 14, // Skip to: 7728 /* 4072 */ MCD_OPC_CheckField, 20, 1, 1, 66, 14, // Skip to: 7728 /* 4078 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4082 */ MCD_OPC_Decode, 182, 2, 65, // Opcode: SADD8 /* 4086 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4104 /* 4090 */ MCD_OPC_CheckPredicate, 1, 50, 14, // Skip to: 7728 /* 4094 */ MCD_OPC_CheckField, 20, 1, 0, 44, 14, // Skip to: 7728 /* 4100 */ MCD_OPC_Decode, 136, 2, 66, // Opcode: PKHBT /* 4104 */ MCD_OPC_FilterValue, 2, 60, 0, // Skip to: 4168 /* 4108 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4111 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 4144 /* 4115 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4118 */ MCD_OPC_FilterValue, 0, 22, 14, // Skip to: 7728 /* 4122 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 4136 /* 4126 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 4136 /* 4132 */ MCD_OPC_Decode, 235, 2, 67, // Opcode: SMUAD /* 4136 */ MCD_OPC_CheckPredicate, 1, 4, 14, // Skip to: 7728 /* 4140 */ MCD_OPC_Decode, 211, 2, 68, // Opcode: SMLAD /* 4144 */ MCD_OPC_FilterValue, 1, 252, 13, // Skip to: 7728 /* 4148 */ MCD_OPC_CheckPredicate, 14, 248, 13, // Skip to: 7728 /* 4152 */ MCD_OPC_CheckField, 12, 4, 15, 242, 13, // Skip to: 7728 /* 4158 */ MCD_OPC_CheckField, 7, 1, 0, 236, 13, // Skip to: 7728 /* 4164 */ MCD_OPC_Decode, 189, 2, 29, // Opcode: SDIV /* 4168 */ MCD_OPC_FilterValue, 3, 228, 13, // Skip to: 7728 /* 4172 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4175 */ MCD_OPC_FilterValue, 0, 221, 13, // Skip to: 7728 /* 4179 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4182 */ MCD_OPC_FilterValue, 0, 214, 13, // Skip to: 7728 /* 4186 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 4200 /* 4190 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 4200 /* 4196 */ MCD_OPC_Decode, 255, 3, 29, // Opcode: USAD8 /* 4200 */ MCD_OPC_CheckPredicate, 1, 196, 13, // Skip to: 7728 /* 4204 */ MCD_OPC_Decode, 128, 4, 39, // Opcode: USADA8 /* 4208 */ MCD_OPC_FilterValue, 1, 99, 0, // Skip to: 4311 /* 4212 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 4215 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 4243 /* 4219 */ MCD_OPC_CheckPredicate, 0, 177, 13, // Skip to: 7728 /* 4223 */ MCD_OPC_CheckField, 20, 1, 1, 171, 13, // Skip to: 7728 /* 4229 */ MCD_OPC_CheckField, 7, 1, 0, 165, 13, // Skip to: 7728 /* 4235 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4239 */ MCD_OPC_Decode, 183, 2, 65, // Opcode: SASX /* 4243 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 4271 /* 4247 */ MCD_OPC_CheckPredicate, 1, 149, 13, // Skip to: 7728 /* 4251 */ MCD_OPC_CheckField, 20, 1, 0, 143, 13, // Skip to: 7728 /* 4257 */ MCD_OPC_CheckField, 7, 1, 1, 137, 13, // Skip to: 7728 /* 4263 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4267 */ MCD_OPC_Decode, 190, 2, 69, // Opcode: SEL /* 4271 */ MCD_OPC_FilterValue, 2, 125, 13, // Skip to: 7728 /* 4275 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4278 */ MCD_OPC_FilterValue, 0, 118, 13, // Skip to: 7728 /* 4282 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4285 */ MCD_OPC_FilterValue, 0, 111, 13, // Skip to: 7728 /* 4289 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 4303 /* 4293 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 4303 /* 4299 */ MCD_OPC_Decode, 236, 2, 67, // Opcode: SMUADX /* 4303 */ MCD_OPC_CheckPredicate, 1, 93, 13, // Skip to: 7728 /* 4307 */ MCD_OPC_Decode, 212, 2, 68, // Opcode: SMLADX /* 4311 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 4404 /* 4315 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 4318 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 4346 /* 4322 */ MCD_OPC_CheckPredicate, 0, 74, 13, // Skip to: 7728 /* 4326 */ MCD_OPC_CheckField, 20, 1, 1, 68, 13, // Skip to: 7728 /* 4332 */ MCD_OPC_CheckField, 7, 1, 0, 62, 13, // Skip to: 7728 /* 4338 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4342 */ MCD_OPC_Decode, 130, 3, 65, // Opcode: SSAX /* 4346 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4364 /* 4350 */ MCD_OPC_CheckPredicate, 1, 46, 13, // Skip to: 7728 /* 4354 */ MCD_OPC_CheckField, 20, 1, 0, 40, 13, // Skip to: 7728 /* 4360 */ MCD_OPC_Decode, 137, 2, 66, // Opcode: PKHTB /* 4364 */ MCD_OPC_FilterValue, 2, 32, 13, // Skip to: 7728 /* 4368 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4371 */ MCD_OPC_FilterValue, 0, 25, 13, // Skip to: 7728 /* 4375 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4378 */ MCD_OPC_FilterValue, 0, 18, 13, // Skip to: 7728 /* 4382 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 4396 /* 4386 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 4396 /* 4392 */ MCD_OPC_Decode, 245, 2, 67, // Opcode: SMUSD /* 4396 */ MCD_OPC_CheckPredicate, 1, 0, 13, // Skip to: 7728 /* 4400 */ MCD_OPC_Decode, 225, 2, 68, // Opcode: SMLSD /* 4404 */ MCD_OPC_FilterValue, 3, 248, 12, // Skip to: 7728 /* 4408 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 4411 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 4462 /* 4415 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4418 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 4440 /* 4422 */ MCD_OPC_CheckPredicate, 0, 230, 12, // Skip to: 7728 /* 4426 */ MCD_OPC_CheckField, 20, 1, 1, 224, 12, // Skip to: 7728 /* 4432 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4436 */ MCD_OPC_Decode, 131, 3, 65, // Opcode: SSUB16 /* 4440 */ MCD_OPC_FilterValue, 1, 212, 12, // Skip to: 7728 /* 4444 */ MCD_OPC_CheckPredicate, 0, 208, 12, // Skip to: 7728 /* 4448 */ MCD_OPC_CheckField, 20, 1, 1, 202, 12, // Skip to: 7728 /* 4454 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4458 */ MCD_OPC_Decode, 132, 3, 65, // Opcode: SSUB8 /* 4462 */ MCD_OPC_FilterValue, 1, 44, 0, // Skip to: 4510 /* 4466 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4469 */ MCD_OPC_FilterValue, 0, 183, 12, // Skip to: 7728 /* 4473 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4476 */ MCD_OPC_FilterValue, 0, 176, 12, // Skip to: 7728 /* 4480 */ MCD_OPC_CheckPredicate, 1, 14, 0, // Skip to: 4498 /* 4484 */ MCD_OPC_CheckField, 16, 4, 15, 8, 0, // Skip to: 4498 /* 4490 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 4494 */ MCD_OPC_Decode, 215, 3, 70, // Opcode: SXTB16 /* 4498 */ MCD_OPC_CheckPredicate, 1, 154, 12, // Skip to: 7728 /* 4502 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 4506 */ MCD_OPC_Decode, 212, 3, 71, // Opcode: SXTAB16 /* 4510 */ MCD_OPC_FilterValue, 2, 142, 12, // Skip to: 7728 /* 4514 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4517 */ MCD_OPC_FilterValue, 0, 135, 12, // Skip to: 7728 /* 4521 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4524 */ MCD_OPC_FilterValue, 0, 128, 12, // Skip to: 7728 /* 4528 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 4542 /* 4532 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 4542 /* 4538 */ MCD_OPC_Decode, 246, 2, 67, // Opcode: SMUSDX /* 4542 */ MCD_OPC_CheckPredicate, 1, 110, 12, // Skip to: 7728 /* 4546 */ MCD_OPC_Decode, 226, 2, 68, // Opcode: SMLSDX /* 4550 */ MCD_OPC_FilterValue, 1, 30, 2, // Skip to: 5096 /* 4554 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 4557 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 4626 /* 4561 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4564 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 4595 /* 4568 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 4571 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4583 /* 4575 */ MCD_OPC_CheckPredicate, 0, 77, 12, // Skip to: 7728 /* 4579 */ MCD_OPC_Decode, 190, 3, 54, // Opcode: STRT_POST_REG /* 4583 */ MCD_OPC_FilterValue, 1, 69, 12, // Skip to: 7728 /* 4587 */ MCD_OPC_CheckPredicate, 0, 65, 12, // Skip to: 7728 /* 4591 */ MCD_OPC_Decode, 194, 3, 72, // Opcode: STR_PRE_REG /* 4595 */ MCD_OPC_FilterValue, 1, 57, 12, // Skip to: 7728 /* 4599 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 4602 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4614 /* 4606 */ MCD_OPC_CheckPredicate, 0, 46, 12, // Skip to: 7728 /* 4610 */ MCD_OPC_Decode, 191, 1, 54, // Opcode: LDRT_POST_REG /* 4614 */ MCD_OPC_FilterValue, 1, 38, 12, // Skip to: 7728 /* 4618 */ MCD_OPC_CheckPredicate, 0, 34, 12, // Skip to: 7728 /* 4622 */ MCD_OPC_Decode, 195, 1, 73, // Opcode: LDR_PRE_REG /* 4626 */ MCD_OPC_FilterValue, 1, 26, 12, // Skip to: 7728 /* 4630 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 4633 */ MCD_OPC_FilterValue, 0, 237, 0, // Skip to: 4874 /* 4637 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 4640 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 4679 /* 4644 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4647 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 4663 /* 4651 */ MCD_OPC_CheckPredicate, 0, 1, 12, // Skip to: 7728 /* 4655 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4659 */ MCD_OPC_Decode, 145, 2, 65, // Opcode: QADD16 /* 4663 */ MCD_OPC_FilterValue, 1, 245, 11, // Skip to: 7728 /* 4667 */ MCD_OPC_CheckPredicate, 0, 241, 11, // Skip to: 7728 /* 4671 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4675 */ MCD_OPC_Decode, 202, 2, 65, // Opcode: SHADD16 /* 4679 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 4718 /* 4683 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4686 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 4702 /* 4690 */ MCD_OPC_CheckPredicate, 0, 218, 11, // Skip to: 7728 /* 4694 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4698 */ MCD_OPC_Decode, 147, 2, 65, // Opcode: QASX /* 4702 */ MCD_OPC_FilterValue, 1, 206, 11, // Skip to: 7728 /* 4706 */ MCD_OPC_CheckPredicate, 0, 202, 11, // Skip to: 7728 /* 4710 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4714 */ MCD_OPC_Decode, 204, 2, 65, // Opcode: SHASX /* 4718 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 4757 /* 4722 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4725 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 4741 /* 4729 */ MCD_OPC_CheckPredicate, 0, 179, 11, // Skip to: 7728 /* 4733 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4737 */ MCD_OPC_Decode, 150, 2, 65, // Opcode: QSAX /* 4741 */ MCD_OPC_FilterValue, 1, 167, 11, // Skip to: 7728 /* 4745 */ MCD_OPC_CheckPredicate, 0, 163, 11, // Skip to: 7728 /* 4749 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4753 */ MCD_OPC_Decode, 205, 2, 65, // Opcode: SHSAX /* 4757 */ MCD_OPC_FilterValue, 3, 35, 0, // Skip to: 4796 /* 4761 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4764 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 4780 /* 4768 */ MCD_OPC_CheckPredicate, 0, 140, 11, // Skip to: 7728 /* 4772 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4776 */ MCD_OPC_Decode, 152, 2, 65, // Opcode: QSUB16 /* 4780 */ MCD_OPC_FilterValue, 1, 128, 11, // Skip to: 7728 /* 4784 */ MCD_OPC_CheckPredicate, 0, 124, 11, // Skip to: 7728 /* 4788 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4792 */ MCD_OPC_Decode, 206, 2, 65, // Opcode: SHSUB16 /* 4796 */ MCD_OPC_FilterValue, 4, 35, 0, // Skip to: 4835 /* 4800 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4803 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 4819 /* 4807 */ MCD_OPC_CheckPredicate, 0, 101, 11, // Skip to: 7728 /* 4811 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4815 */ MCD_OPC_Decode, 146, 2, 65, // Opcode: QADD8 /* 4819 */ MCD_OPC_FilterValue, 1, 89, 11, // Skip to: 7728 /* 4823 */ MCD_OPC_CheckPredicate, 0, 85, 11, // Skip to: 7728 /* 4827 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4831 */ MCD_OPC_Decode, 203, 2, 65, // Opcode: SHADD8 /* 4835 */ MCD_OPC_FilterValue, 7, 73, 11, // Skip to: 7728 /* 4839 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4842 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 4858 /* 4846 */ MCD_OPC_CheckPredicate, 0, 62, 11, // Skip to: 7728 /* 4850 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4854 */ MCD_OPC_Decode, 153, 2, 65, // Opcode: QSUB8 /* 4858 */ MCD_OPC_FilterValue, 1, 50, 11, // Skip to: 7728 /* 4862 */ MCD_OPC_CheckPredicate, 0, 46, 11, // Skip to: 7728 /* 4866 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 4870 */ MCD_OPC_Decode, 207, 2, 65, // Opcode: SHSUB8 /* 4874 */ MCD_OPC_FilterValue, 1, 170, 0, // Skip to: 5048 /* 4878 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 4881 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4893 /* 4885 */ MCD_OPC_CheckPredicate, 0, 23, 11, // Skip to: 7728 /* 4889 */ MCD_OPC_Decode, 128, 3, 74, // Opcode: SSAT /* 4893 */ MCD_OPC_FilterValue, 1, 15, 11, // Skip to: 7728 /* 4897 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 4900 */ MCD_OPC_FilterValue, 0, 45, 0, // Skip to: 4949 /* 4904 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4907 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4925 /* 4911 */ MCD_OPC_CheckPredicate, 0, 253, 10, // Skip to: 7728 /* 4915 */ MCD_OPC_CheckField, 8, 4, 15, 247, 10, // Skip to: 7728 /* 4921 */ MCD_OPC_Decode, 129, 3, 75, // Opcode: SSAT16 /* 4925 */ MCD_OPC_FilterValue, 1, 239, 10, // Skip to: 7728 /* 4929 */ MCD_OPC_CheckPredicate, 1, 235, 10, // Skip to: 7728 /* 4933 */ MCD_OPC_CheckField, 16, 4, 15, 229, 10, // Skip to: 7728 /* 4939 */ MCD_OPC_CheckField, 8, 4, 15, 223, 10, // Skip to: 7728 /* 4945 */ MCD_OPC_Decode, 155, 2, 34, // Opcode: REV /* 4949 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 5024 /* 4953 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4956 */ MCD_OPC_FilterValue, 0, 30, 0, // Skip to: 4990 /* 4960 */ MCD_OPC_CheckPredicate, 1, 14, 0, // Skip to: 4978 /* 4964 */ MCD_OPC_CheckField, 16, 4, 15, 8, 0, // Skip to: 4978 /* 4970 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 4974 */ MCD_OPC_Decode, 214, 3, 70, // Opcode: SXTB /* 4978 */ MCD_OPC_CheckPredicate, 1, 186, 10, // Skip to: 7728 /* 4982 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 4986 */ MCD_OPC_Decode, 211, 3, 71, // Opcode: SXTAB /* 4990 */ MCD_OPC_FilterValue, 1, 174, 10, // Skip to: 7728 /* 4994 */ MCD_OPC_CheckPredicate, 1, 14, 0, // Skip to: 5012 /* 4998 */ MCD_OPC_CheckField, 16, 4, 15, 8, 0, // Skip to: 5012 /* 5004 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 5008 */ MCD_OPC_Decode, 216, 3, 70, // Opcode: SXTH /* 5012 */ MCD_OPC_CheckPredicate, 1, 152, 10, // Skip to: 7728 /* 5016 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 5020 */ MCD_OPC_Decode, 213, 3, 71, // Opcode: SXTAH /* 5024 */ MCD_OPC_FilterValue, 2, 140, 10, // Skip to: 7728 /* 5028 */ MCD_OPC_CheckPredicate, 1, 136, 10, // Skip to: 7728 /* 5032 */ MCD_OPC_CheckField, 16, 5, 31, 130, 10, // Skip to: 7728 /* 5038 */ MCD_OPC_CheckField, 8, 4, 15, 124, 10, // Skip to: 7728 /* 5044 */ MCD_OPC_Decode, 156, 2, 34, // Opcode: REV16 /* 5048 */ MCD_OPC_FilterValue, 2, 26, 0, // Skip to: 5078 /* 5052 */ MCD_OPC_CheckPredicate, 14, 112, 10, // Skip to: 7728 /* 5056 */ MCD_OPC_CheckField, 20, 1, 1, 106, 10, // Skip to: 7728 /* 5062 */ MCD_OPC_CheckField, 12, 4, 15, 100, 10, // Skip to: 7728 /* 5068 */ MCD_OPC_CheckField, 5, 3, 0, 94, 10, // Skip to: 7728 /* 5074 */ MCD_OPC_Decode, 237, 3, 29, // Opcode: UDIV /* 5078 */ MCD_OPC_FilterValue, 3, 86, 10, // Skip to: 7728 /* 5082 */ MCD_OPC_CheckPredicate, 10, 82, 10, // Skip to: 7728 /* 5086 */ MCD_OPC_CheckField, 5, 2, 2, 76, 10, // Skip to: 7728 /* 5092 */ MCD_OPC_Decode, 188, 2, 76, // Opcode: SBFX /* 5096 */ MCD_OPC_FilterValue, 2, 67, 2, // Skip to: 5679 /* 5100 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 5103 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 5212 /* 5107 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5110 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5141 /* 5114 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 5117 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5129 /* 5121 */ MCD_OPC_CheckPredicate, 0, 43, 10, // Skip to: 7728 /* 5125 */ MCD_OPC_Decode, 168, 3, 54, // Opcode: STRB_POST_REG /* 5129 */ MCD_OPC_FilterValue, 1, 35, 10, // Skip to: 7728 /* 5133 */ MCD_OPC_CheckPredicate, 0, 31, 10, // Skip to: 7728 /* 5137 */ MCD_OPC_Decode, 174, 3, 77, // Opcode: STRBrs /* 5141 */ MCD_OPC_FilterValue, 1, 23, 10, // Skip to: 7728 /* 5145 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 5148 */ MCD_OPC_FilterValue, 0, 28, 0, // Skip to: 5180 /* 5152 */ MCD_OPC_CheckPredicate, 11, 16, 0, // Skip to: 5172 /* 5156 */ MCD_OPC_CheckField, 28, 4, 15, 10, 0, // Skip to: 5172 /* 5162 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 5172 /* 5168 */ MCD_OPC_Decode, 143, 2, 64, // Opcode: PLIrs /* 5172 */ MCD_OPC_CheckPredicate, 0, 248, 9, // Skip to: 7728 /* 5176 */ MCD_OPC_Decode, 159, 1, 54, // Opcode: LDRB_POST_REG /* 5180 */ MCD_OPC_FilterValue, 1, 240, 9, // Skip to: 7728 /* 5184 */ MCD_OPC_CheckPredicate, 0, 16, 0, // Skip to: 5204 /* 5188 */ MCD_OPC_CheckField, 28, 4, 15, 10, 0, // Skip to: 5204 /* 5194 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 5204 /* 5200 */ MCD_OPC_Decode, 141, 2, 64, // Opcode: PLDrs /* 5204 */ MCD_OPC_CheckPredicate, 0, 216, 9, // Skip to: 7728 /* 5208 */ MCD_OPC_Decode, 163, 1, 77, // Opcode: LDRBrs /* 5212 */ MCD_OPC_FilterValue, 1, 208, 9, // Skip to: 7728 /* 5216 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 5219 */ MCD_OPC_FilterValue, 0, 136, 0, // Skip to: 5359 /* 5223 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 5226 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 5277 /* 5230 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5233 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 5255 /* 5237 */ MCD_OPC_CheckPredicate, 0, 183, 9, // Skip to: 7728 /* 5241 */ MCD_OPC_CheckField, 20, 1, 1, 177, 9, // Skip to: 7728 /* 5247 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5251 */ MCD_OPC_Decode, 232, 3, 65, // Opcode: UADD16 /* 5255 */ MCD_OPC_FilterValue, 1, 165, 9, // Skip to: 7728 /* 5259 */ MCD_OPC_CheckPredicate, 0, 161, 9, // Skip to: 7728 /* 5263 */ MCD_OPC_CheckField, 20, 1, 1, 155, 9, // Skip to: 7728 /* 5269 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5273 */ MCD_OPC_Decode, 233, 3, 65, // Opcode: UADD8 /* 5277 */ MCD_OPC_FilterValue, 2, 54, 0, // Skip to: 5335 /* 5281 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5284 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5302 /* 5288 */ MCD_OPC_CheckPredicate, 1, 132, 9, // Skip to: 7728 /* 5292 */ MCD_OPC_CheckField, 7, 1, 0, 126, 9, // Skip to: 7728 /* 5298 */ MCD_OPC_Decode, 216, 2, 19, // Opcode: SMLALD /* 5302 */ MCD_OPC_FilterValue, 1, 118, 9, // Skip to: 7728 /* 5306 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5309 */ MCD_OPC_FilterValue, 0, 111, 9, // Skip to: 7728 /* 5313 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 5327 /* 5317 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 5327 /* 5323 */ MCD_OPC_Decode, 233, 2, 29, // Opcode: SMMUL /* 5327 */ MCD_OPC_CheckPredicate, 1, 93, 9, // Skip to: 7728 /* 5331 */ MCD_OPC_Decode, 229, 2, 39, // Opcode: SMMLA /* 5335 */ MCD_OPC_FilterValue, 3, 85, 9, // Skip to: 7728 /* 5339 */ MCD_OPC_CheckPredicate, 10, 9, 0, // Skip to: 5352 /* 5343 */ MCD_OPC_CheckField, 0, 4, 15, 3, 0, // Skip to: 5352 /* 5349 */ MCD_OPC_Decode, 51, 78, // Opcode: BFC /* 5352 */ MCD_OPC_CheckPredicate, 10, 68, 9, // Skip to: 7728 /* 5356 */ MCD_OPC_Decode, 52, 79, // Opcode: BFI /* 5359 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 5452 /* 5363 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5366 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 5390 /* 5370 */ MCD_OPC_CheckPredicate, 1, 50, 9, // Skip to: 7728 /* 5374 */ MCD_OPC_CheckField, 23, 2, 2, 44, 9, // Skip to: 7728 /* 5380 */ MCD_OPC_CheckField, 7, 1, 0, 38, 9, // Skip to: 7728 /* 5386 */ MCD_OPC_Decode, 217, 2, 19, // Opcode: SMLALDX /* 5390 */ MCD_OPC_FilterValue, 1, 30, 9, // Skip to: 7728 /* 5394 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 5397 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 5419 /* 5401 */ MCD_OPC_CheckPredicate, 0, 19, 9, // Skip to: 7728 /* 5405 */ MCD_OPC_CheckField, 7, 1, 0, 13, 9, // Skip to: 7728 /* 5411 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5415 */ MCD_OPC_Decode, 234, 3, 65, // Opcode: UASX /* 5419 */ MCD_OPC_FilterValue, 2, 1, 9, // Skip to: 7728 /* 5423 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5426 */ MCD_OPC_FilterValue, 0, 250, 8, // Skip to: 7728 /* 5430 */ MCD_OPC_CheckPredicate, 1, 10, 0, // Skip to: 5444 /* 5434 */ MCD_OPC_CheckField, 12, 4, 15, 4, 0, // Skip to: 5444 /* 5440 */ MCD_OPC_Decode, 234, 2, 29, // Opcode: SMMULR /* 5444 */ MCD_OPC_CheckPredicate, 1, 232, 8, // Skip to: 7728 /* 5448 */ MCD_OPC_Decode, 230, 2, 39, // Opcode: SMMLAR /* 5452 */ MCD_OPC_FilterValue, 2, 74, 0, // Skip to: 5530 /* 5456 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5459 */ MCD_OPC_FilterValue, 0, 43, 0, // Skip to: 5506 /* 5463 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5466 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5484 /* 5470 */ MCD_OPC_CheckPredicate, 1, 206, 8, // Skip to: 7728 /* 5474 */ MCD_OPC_CheckField, 23, 2, 2, 200, 8, // Skip to: 7728 /* 5480 */ MCD_OPC_Decode, 227, 2, 19, // Opcode: SMLSLD /* 5484 */ MCD_OPC_FilterValue, 1, 192, 8, // Skip to: 7728 /* 5488 */ MCD_OPC_CheckPredicate, 0, 188, 8, // Skip to: 7728 /* 5492 */ MCD_OPC_CheckField, 23, 2, 0, 182, 8, // Skip to: 7728 /* 5498 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5502 */ MCD_OPC_Decode, 131, 4, 65, // Opcode: USAX /* 5506 */ MCD_OPC_FilterValue, 1, 170, 8, // Skip to: 7728 /* 5510 */ MCD_OPC_CheckPredicate, 1, 166, 8, // Skip to: 7728 /* 5514 */ MCD_OPC_CheckField, 23, 2, 2, 160, 8, // Skip to: 7728 /* 5520 */ MCD_OPC_CheckField, 20, 1, 1, 154, 8, // Skip to: 7728 /* 5526 */ MCD_OPC_Decode, 231, 2, 39, // Opcode: SMMLS /* 5530 */ MCD_OPC_FilterValue, 3, 146, 8, // Skip to: 7728 /* 5534 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 5537 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 5588 /* 5541 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5544 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 5566 /* 5548 */ MCD_OPC_CheckPredicate, 0, 128, 8, // Skip to: 7728 /* 5552 */ MCD_OPC_CheckField, 20, 1, 1, 122, 8, // Skip to: 7728 /* 5558 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5562 */ MCD_OPC_Decode, 132, 4, 65, // Opcode: USUB16 /* 5566 */ MCD_OPC_FilterValue, 1, 110, 8, // Skip to: 7728 /* 5570 */ MCD_OPC_CheckPredicate, 0, 106, 8, // Skip to: 7728 /* 5574 */ MCD_OPC_CheckField, 20, 1, 1, 100, 8, // Skip to: 7728 /* 5580 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5584 */ MCD_OPC_Decode, 133, 4, 65, // Opcode: USUB8 /* 5588 */ MCD_OPC_FilterValue, 1, 44, 0, // Skip to: 5636 /* 5592 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5595 */ MCD_OPC_FilterValue, 0, 81, 8, // Skip to: 7728 /* 5599 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5602 */ MCD_OPC_FilterValue, 0, 74, 8, // Skip to: 7728 /* 5606 */ MCD_OPC_CheckPredicate, 1, 14, 0, // Skip to: 5624 /* 5610 */ MCD_OPC_CheckField, 16, 4, 15, 8, 0, // Skip to: 5624 /* 5616 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 5620 */ MCD_OPC_Decode, 138, 4, 70, // Opcode: UXTB16 /* 5624 */ MCD_OPC_CheckPredicate, 1, 52, 8, // Skip to: 7728 /* 5628 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 5632 */ MCD_OPC_Decode, 135, 4, 71, // Opcode: UXTAB16 /* 5636 */ MCD_OPC_FilterValue, 2, 40, 8, // Skip to: 7728 /* 5640 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5643 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5661 /* 5647 */ MCD_OPC_CheckPredicate, 1, 29, 8, // Skip to: 7728 /* 5651 */ MCD_OPC_CheckField, 20, 1, 0, 23, 8, // Skip to: 7728 /* 5657 */ MCD_OPC_Decode, 228, 2, 19, // Opcode: SMLSLDX /* 5661 */ MCD_OPC_FilterValue, 1, 15, 8, // Skip to: 7728 /* 5665 */ MCD_OPC_CheckPredicate, 1, 11, 8, // Skip to: 7728 /* 5669 */ MCD_OPC_CheckField, 20, 1, 1, 5, 8, // Skip to: 7728 /* 5675 */ MCD_OPC_Decode, 232, 2, 39, // Opcode: SMMLSR /* 5679 */ MCD_OPC_FilterValue, 3, 253, 7, // Skip to: 7728 /* 5683 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 5686 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 5755 /* 5690 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5693 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5724 /* 5697 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 5700 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5712 /* 5704 */ MCD_OPC_CheckPredicate, 0, 228, 7, // Skip to: 7728 /* 5708 */ MCD_OPC_Decode, 166, 3, 54, // Opcode: STRBT_POST_REG /* 5712 */ MCD_OPC_FilterValue, 1, 220, 7, // Skip to: 7728 /* 5716 */ MCD_OPC_CheckPredicate, 0, 216, 7, // Skip to: 7728 /* 5720 */ MCD_OPC_Decode, 170, 3, 72, // Opcode: STRB_PRE_REG /* 5724 */ MCD_OPC_FilterValue, 1, 208, 7, // Skip to: 7728 /* 5728 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 5731 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5743 /* 5735 */ MCD_OPC_CheckPredicate, 0, 197, 7, // Skip to: 7728 /* 5739 */ MCD_OPC_Decode, 157, 1, 54, // Opcode: LDRBT_POST_REG /* 5743 */ MCD_OPC_FilterValue, 1, 189, 7, // Skip to: 7728 /* 5747 */ MCD_OPC_CheckPredicate, 0, 185, 7, // Skip to: 7728 /* 5751 */ MCD_OPC_Decode, 161, 1, 73, // Opcode: LDRB_PRE_REG /* 5755 */ MCD_OPC_FilterValue, 1, 177, 7, // Skip to: 7728 /* 5759 */ MCD_OPC_ExtractField, 23, 2, // Inst{24-23} ... /* 5762 */ MCD_OPC_FilterValue, 0, 237, 0, // Skip to: 6003 /* 5766 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 5769 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 5808 /* 5773 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5776 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 5792 /* 5780 */ MCD_OPC_CheckPredicate, 0, 152, 7, // Skip to: 7728 /* 5784 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5788 */ MCD_OPC_Decode, 249, 3, 65, // Opcode: UQADD16 /* 5792 */ MCD_OPC_FilterValue, 1, 140, 7, // Skip to: 7728 /* 5796 */ MCD_OPC_CheckPredicate, 0, 136, 7, // Skip to: 7728 /* 5800 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5804 */ MCD_OPC_Decode, 238, 3, 65, // Opcode: UHADD16 /* 5808 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 5847 /* 5812 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5815 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 5831 /* 5819 */ MCD_OPC_CheckPredicate, 0, 113, 7, // Skip to: 7728 /* 5823 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5827 */ MCD_OPC_Decode, 251, 3, 65, // Opcode: UQASX /* 5831 */ MCD_OPC_FilterValue, 1, 101, 7, // Skip to: 7728 /* 5835 */ MCD_OPC_CheckPredicate, 0, 97, 7, // Skip to: 7728 /* 5839 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5843 */ MCD_OPC_Decode, 240, 3, 65, // Opcode: UHASX /* 5847 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 5886 /* 5851 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5854 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 5870 /* 5858 */ MCD_OPC_CheckPredicate, 0, 74, 7, // Skip to: 7728 /* 5862 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5866 */ MCD_OPC_Decode, 252, 3, 65, // Opcode: UQSAX /* 5870 */ MCD_OPC_FilterValue, 1, 62, 7, // Skip to: 7728 /* 5874 */ MCD_OPC_CheckPredicate, 0, 58, 7, // Skip to: 7728 /* 5878 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5882 */ MCD_OPC_Decode, 241, 3, 65, // Opcode: UHSAX /* 5886 */ MCD_OPC_FilterValue, 3, 35, 0, // Skip to: 5925 /* 5890 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5893 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 5909 /* 5897 */ MCD_OPC_CheckPredicate, 0, 35, 7, // Skip to: 7728 /* 5901 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5905 */ MCD_OPC_Decode, 253, 3, 65, // Opcode: UQSUB16 /* 5909 */ MCD_OPC_FilterValue, 1, 23, 7, // Skip to: 7728 /* 5913 */ MCD_OPC_CheckPredicate, 0, 19, 7, // Skip to: 7728 /* 5917 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5921 */ MCD_OPC_Decode, 242, 3, 65, // Opcode: UHSUB16 /* 5925 */ MCD_OPC_FilterValue, 4, 35, 0, // Skip to: 5964 /* 5929 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5932 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 5948 /* 5936 */ MCD_OPC_CheckPredicate, 0, 252, 6, // Skip to: 7728 /* 5940 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5944 */ MCD_OPC_Decode, 250, 3, 65, // Opcode: UQADD8 /* 5948 */ MCD_OPC_FilterValue, 1, 240, 6, // Skip to: 7728 /* 5952 */ MCD_OPC_CheckPredicate, 0, 236, 6, // Skip to: 7728 /* 5956 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5960 */ MCD_OPC_Decode, 239, 3, 65, // Opcode: UHADD8 /* 5964 */ MCD_OPC_FilterValue, 7, 224, 6, // Skip to: 7728 /* 5968 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5971 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 5987 /* 5975 */ MCD_OPC_CheckPredicate, 0, 213, 6, // Skip to: 7728 /* 5979 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5983 */ MCD_OPC_Decode, 254, 3, 65, // Opcode: UQSUB8 /* 5987 */ MCD_OPC_FilterValue, 1, 201, 6, // Skip to: 7728 /* 5991 */ MCD_OPC_CheckPredicate, 0, 197, 6, // Skip to: 7728 /* 5995 */ MCD_OPC_SoftFail, 0, 128, 30 /* 0xF00 */, /* 5999 */ MCD_OPC_Decode, 243, 3, 65, // Opcode: UHSUB8 /* 6003 */ MCD_OPC_FilterValue, 1, 170, 0, // Skip to: 6177 /* 6007 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 6010 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6022 /* 6014 */ MCD_OPC_CheckPredicate, 0, 174, 6, // Skip to: 7728 /* 6018 */ MCD_OPC_Decode, 129, 4, 74, // Opcode: USAT /* 6022 */ MCD_OPC_FilterValue, 1, 166, 6, // Skip to: 7728 /* 6026 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6029 */ MCD_OPC_FilterValue, 0, 45, 0, // Skip to: 6078 /* 6033 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 6036 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6054 /* 6040 */ MCD_OPC_CheckPredicate, 0, 148, 6, // Skip to: 7728 /* 6044 */ MCD_OPC_CheckField, 8, 4, 15, 142, 6, // Skip to: 7728 /* 6050 */ MCD_OPC_Decode, 130, 4, 75, // Opcode: USAT16 /* 6054 */ MCD_OPC_FilterValue, 1, 134, 6, // Skip to: 7728 /* 6058 */ MCD_OPC_CheckPredicate, 10, 130, 6, // Skip to: 7728 /* 6062 */ MCD_OPC_CheckField, 16, 4, 15, 124, 6, // Skip to: 7728 /* 6068 */ MCD_OPC_CheckField, 8, 4, 15, 118, 6, // Skip to: 7728 /* 6074 */ MCD_OPC_Decode, 154, 2, 34, // Opcode: RBIT /* 6078 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 6153 /* 6082 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 6085 */ MCD_OPC_FilterValue, 0, 30, 0, // Skip to: 6119 /* 6089 */ MCD_OPC_CheckPredicate, 1, 14, 0, // Skip to: 6107 /* 6093 */ MCD_OPC_CheckField, 16, 4, 15, 8, 0, // Skip to: 6107 /* 6099 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 6103 */ MCD_OPC_Decode, 137, 4, 70, // Opcode: UXTB /* 6107 */ MCD_OPC_CheckPredicate, 1, 81, 6, // Skip to: 7728 /* 6111 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 6115 */ MCD_OPC_Decode, 134, 4, 71, // Opcode: UXTAB /* 6119 */ MCD_OPC_FilterValue, 1, 69, 6, // Skip to: 7728 /* 6123 */ MCD_OPC_CheckPredicate, 1, 14, 0, // Skip to: 6141 /* 6127 */ MCD_OPC_CheckField, 16, 4, 15, 8, 0, // Skip to: 6141 /* 6133 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 6137 */ MCD_OPC_Decode, 139, 4, 70, // Opcode: UXTH /* 6141 */ MCD_OPC_CheckPredicate, 1, 47, 6, // Skip to: 7728 /* 6145 */ MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0, /* 6149 */ MCD_OPC_Decode, 136, 4, 71, // Opcode: UXTAH /* 6153 */ MCD_OPC_FilterValue, 2, 35, 6, // Skip to: 7728 /* 6157 */ MCD_OPC_CheckPredicate, 1, 31, 6, // Skip to: 7728 /* 6161 */ MCD_OPC_CheckField, 16, 5, 31, 25, 6, // Skip to: 7728 /* 6167 */ MCD_OPC_CheckField, 8, 4, 15, 19, 6, // Skip to: 7728 /* 6173 */ MCD_OPC_Decode, 157, 2, 34, // Opcode: REVSH /* 6177 */ MCD_OPC_FilterValue, 3, 11, 6, // Skip to: 7728 /* 6181 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ... /* 6184 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6196 /* 6188 */ MCD_OPC_CheckPredicate, 10, 0, 6, // Skip to: 7728 /* 6192 */ MCD_OPC_Decode, 235, 3, 76, // Opcode: UBFX /* 6196 */ MCD_OPC_FilterValue, 3, 248, 5, // Skip to: 7728 /* 6200 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 6203 */ MCD_OPC_FilterValue, 1, 241, 5, // Skip to: 7728 /* 6207 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 6210 */ MCD_OPC_FilterValue, 1, 234, 5, // Skip to: 7728 /* 6214 */ MCD_OPC_ExtractField, 28, 4, // Inst{31-28} ... /* 6217 */ MCD_OPC_FilterValue, 14, 227, 5, // Skip to: 7728 /* 6221 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 6224 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 6243 /* 6228 */ MCD_OPC_CheckPredicate, 15, 30, 0, // Skip to: 6262 /* 6232 */ MCD_OPC_CheckField, 8, 12, 222, 29, 23, 0, // Skip to: 6262 /* 6239 */ MCD_OPC_Decode, 227, 3, 60, // Opcode: TRAPNaCl /* 6243 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 6262 /* 6247 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 6262 /* 6251 */ MCD_OPC_CheckField, 8, 12, 222, 31, 4, 0, // Skip to: 6262 /* 6258 */ MCD_OPC_Decode, 226, 3, 60, // Opcode: TRAP /* 6262 */ MCD_OPC_CheckPredicate, 0, 182, 5, // Skip to: 7728 /* 6266 */ MCD_OPC_Decode, 236, 3, 15, // Opcode: UDF /* 6270 */ MCD_OPC_FilterValue, 4, 219, 2, // Skip to: 7005 /* 6274 */ MCD_OPC_ExtractField, 20, 5, // Inst{24-20} ... /* 6277 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6289 /* 6281 */ MCD_OPC_CheckPredicate, 0, 163, 5, // Skip to: 7728 /* 6285 */ MCD_OPC_Decode, 156, 3, 80, // Opcode: STMDA /* 6289 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 6322 /* 6293 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6314 /* 6297 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6314 /* 6303 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6314 /* 6310 */ MCD_OPC_Decode, 158, 2, 81, // Opcode: RFEDA /* 6314 */ MCD_OPC_CheckPredicate, 0, 130, 5, // Skip to: 7728 /* 6318 */ MCD_OPC_Decode, 146, 1, 80, // Opcode: LDMDA /* 6322 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6334 /* 6326 */ MCD_OPC_CheckPredicate, 0, 118, 5, // Skip to: 7728 /* 6330 */ MCD_OPC_Decode, 157, 3, 82, // Opcode: STMDA_UPD /* 6334 */ MCD_OPC_FilterValue, 3, 29, 0, // Skip to: 6367 /* 6338 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6359 /* 6342 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6359 /* 6348 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6359 /* 6355 */ MCD_OPC_Decode, 159, 2, 81, // Opcode: RFEDA_UPD /* 6359 */ MCD_OPC_CheckPredicate, 0, 85, 5, // Skip to: 7728 /* 6363 */ MCD_OPC_Decode, 147, 1, 82, // Opcode: LDMDA_UPD /* 6367 */ MCD_OPC_FilterValue, 4, 30, 0, // Skip to: 6401 /* 6371 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6393 /* 6375 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6393 /* 6381 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6393 /* 6389 */ MCD_OPC_Decode, 248, 2, 83, // Opcode: SRSDA /* 6393 */ MCD_OPC_CheckPredicate, 0, 51, 5, // Skip to: 7728 /* 6397 */ MCD_OPC_Decode, 234, 17, 80, // Opcode: sysSTMDA /* 6401 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 6413 /* 6405 */ MCD_OPC_CheckPredicate, 0, 39, 5, // Skip to: 7728 /* 6409 */ MCD_OPC_Decode, 226, 17, 80, // Opcode: sysLDMDA /* 6413 */ MCD_OPC_FilterValue, 6, 30, 0, // Skip to: 6447 /* 6417 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6439 /* 6421 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6439 /* 6427 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6439 /* 6435 */ MCD_OPC_Decode, 249, 2, 83, // Opcode: SRSDA_UPD /* 6439 */ MCD_OPC_CheckPredicate, 0, 5, 5, // Skip to: 7728 /* 6443 */ MCD_OPC_Decode, 235, 17, 82, // Opcode: sysSTMDA_UPD /* 6447 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 6459 /* 6451 */ MCD_OPC_CheckPredicate, 0, 249, 4, // Skip to: 7728 /* 6455 */ MCD_OPC_Decode, 227, 17, 82, // Opcode: sysLDMDA_UPD /* 6459 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 6471 /* 6463 */ MCD_OPC_CheckPredicate, 0, 237, 4, // Skip to: 7728 /* 6467 */ MCD_OPC_Decode, 160, 3, 80, // Opcode: STMIA /* 6471 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 6504 /* 6475 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6496 /* 6479 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6496 /* 6485 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6496 /* 6492 */ MCD_OPC_Decode, 162, 2, 81, // Opcode: RFEIA /* 6496 */ MCD_OPC_CheckPredicate, 0, 204, 4, // Skip to: 7728 /* 6500 */ MCD_OPC_Decode, 150, 1, 80, // Opcode: LDMIA /* 6504 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 6516 /* 6508 */ MCD_OPC_CheckPredicate, 0, 192, 4, // Skip to: 7728 /* 6512 */ MCD_OPC_Decode, 161, 3, 82, // Opcode: STMIA_UPD /* 6516 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 6549 /* 6520 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6541 /* 6524 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6541 /* 6530 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6541 /* 6537 */ MCD_OPC_Decode, 163, 2, 81, // Opcode: RFEIA_UPD /* 6541 */ MCD_OPC_CheckPredicate, 0, 159, 4, // Skip to: 7728 /* 6545 */ MCD_OPC_Decode, 152, 1, 82, // Opcode: LDMIA_UPD /* 6549 */ MCD_OPC_FilterValue, 12, 30, 0, // Skip to: 6583 /* 6553 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6575 /* 6557 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6575 /* 6563 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6575 /* 6571 */ MCD_OPC_Decode, 252, 2, 83, // Opcode: SRSIA /* 6575 */ MCD_OPC_CheckPredicate, 0, 125, 4, // Skip to: 7728 /* 6579 */ MCD_OPC_Decode, 238, 17, 80, // Opcode: sysSTMIA /* 6583 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 6595 /* 6587 */ MCD_OPC_CheckPredicate, 0, 113, 4, // Skip to: 7728 /* 6591 */ MCD_OPC_Decode, 230, 17, 80, // Opcode: sysLDMIA /* 6595 */ MCD_OPC_FilterValue, 14, 30, 0, // Skip to: 6629 /* 6599 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6621 /* 6603 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6621 /* 6609 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6621 /* 6617 */ MCD_OPC_Decode, 253, 2, 83, // Opcode: SRSIA_UPD /* 6621 */ MCD_OPC_CheckPredicate, 0, 79, 4, // Skip to: 7728 /* 6625 */ MCD_OPC_Decode, 239, 17, 82, // Opcode: sysSTMIA_UPD /* 6629 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 6641 /* 6633 */ MCD_OPC_CheckPredicate, 0, 67, 4, // Skip to: 7728 /* 6637 */ MCD_OPC_Decode, 231, 17, 82, // Opcode: sysLDMIA_UPD /* 6641 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 6653 /* 6645 */ MCD_OPC_CheckPredicate, 0, 55, 4, // Skip to: 7728 /* 6649 */ MCD_OPC_Decode, 158, 3, 80, // Opcode: STMDB /* 6653 */ MCD_OPC_FilterValue, 17, 29, 0, // Skip to: 6686 /* 6657 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6678 /* 6661 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6678 /* 6667 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6678 /* 6674 */ MCD_OPC_Decode, 160, 2, 81, // Opcode: RFEDB /* 6678 */ MCD_OPC_CheckPredicate, 0, 22, 4, // Skip to: 7728 /* 6682 */ MCD_OPC_Decode, 148, 1, 80, // Opcode: LDMDB /* 6686 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 6698 /* 6690 */ MCD_OPC_CheckPredicate, 0, 10, 4, // Skip to: 7728 /* 6694 */ MCD_OPC_Decode, 159, 3, 82, // Opcode: STMDB_UPD /* 6698 */ MCD_OPC_FilterValue, 19, 29, 0, // Skip to: 6731 /* 6702 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6723 /* 6706 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6723 /* 6712 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6723 /* 6719 */ MCD_OPC_Decode, 161, 2, 81, // Opcode: RFEDB_UPD /* 6723 */ MCD_OPC_CheckPredicate, 0, 233, 3, // Skip to: 7728 /* 6727 */ MCD_OPC_Decode, 149, 1, 82, // Opcode: LDMDB_UPD /* 6731 */ MCD_OPC_FilterValue, 20, 30, 0, // Skip to: 6765 /* 6735 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6757 /* 6739 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6757 /* 6745 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6757 /* 6753 */ MCD_OPC_Decode, 250, 2, 83, // Opcode: SRSDB /* 6757 */ MCD_OPC_CheckPredicate, 0, 199, 3, // Skip to: 7728 /* 6761 */ MCD_OPC_Decode, 236, 17, 80, // Opcode: sysSTMDB /* 6765 */ MCD_OPC_FilterValue, 21, 8, 0, // Skip to: 6777 /* 6769 */ MCD_OPC_CheckPredicate, 0, 187, 3, // Skip to: 7728 /* 6773 */ MCD_OPC_Decode, 228, 17, 80, // Opcode: sysLDMDB /* 6777 */ MCD_OPC_FilterValue, 22, 30, 0, // Skip to: 6811 /* 6781 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6803 /* 6785 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6803 /* 6791 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6803 /* 6799 */ MCD_OPC_Decode, 251, 2, 83, // Opcode: SRSDB_UPD /* 6803 */ MCD_OPC_CheckPredicate, 0, 153, 3, // Skip to: 7728 /* 6807 */ MCD_OPC_Decode, 237, 17, 82, // Opcode: sysSTMDB_UPD /* 6811 */ MCD_OPC_FilterValue, 23, 8, 0, // Skip to: 6823 /* 6815 */ MCD_OPC_CheckPredicate, 0, 141, 3, // Skip to: 7728 /* 6819 */ MCD_OPC_Decode, 229, 17, 82, // Opcode: sysLDMDB_UPD /* 6823 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 6835 /* 6827 */ MCD_OPC_CheckPredicate, 0, 129, 3, // Skip to: 7728 /* 6831 */ MCD_OPC_Decode, 162, 3, 80, // Opcode: STMIB /* 6835 */ MCD_OPC_FilterValue, 25, 29, 0, // Skip to: 6868 /* 6839 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6860 /* 6843 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6860 /* 6849 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6860 /* 6856 */ MCD_OPC_Decode, 164, 2, 81, // Opcode: RFEIB /* 6860 */ MCD_OPC_CheckPredicate, 0, 96, 3, // Skip to: 7728 /* 6864 */ MCD_OPC_Decode, 153, 1, 80, // Opcode: LDMIB /* 6868 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 6880 /* 6872 */ MCD_OPC_CheckPredicate, 0, 84, 3, // Skip to: 7728 /* 6876 */ MCD_OPC_Decode, 163, 3, 82, // Opcode: STMIB_UPD /* 6880 */ MCD_OPC_FilterValue, 27, 29, 0, // Skip to: 6913 /* 6884 */ MCD_OPC_CheckPredicate, 0, 17, 0, // Skip to: 6905 /* 6888 */ MCD_OPC_CheckField, 28, 4, 15, 11, 0, // Skip to: 6905 /* 6894 */ MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, // Skip to: 6905 /* 6901 */ MCD_OPC_Decode, 165, 2, 81, // Opcode: RFEIB_UPD /* 6905 */ MCD_OPC_CheckPredicate, 0, 51, 3, // Skip to: 7728 /* 6909 */ MCD_OPC_Decode, 154, 1, 82, // Opcode: LDMIB_UPD /* 6913 */ MCD_OPC_FilterValue, 28, 30, 0, // Skip to: 6947 /* 6917 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6939 /* 6921 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6939 /* 6927 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6939 /* 6935 */ MCD_OPC_Decode, 254, 2, 83, // Opcode: SRSIB /* 6939 */ MCD_OPC_CheckPredicate, 0, 17, 3, // Skip to: 7728 /* 6943 */ MCD_OPC_Decode, 240, 17, 80, // Opcode: sysSTMIB /* 6947 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 6959 /* 6951 */ MCD_OPC_CheckPredicate, 0, 5, 3, // Skip to: 7728 /* 6955 */ MCD_OPC_Decode, 232, 17, 80, // Opcode: sysLDMIB /* 6959 */ MCD_OPC_FilterValue, 30, 30, 0, // Skip to: 6993 /* 6963 */ MCD_OPC_CheckPredicate, 0, 18, 0, // Skip to: 6985 /* 6967 */ MCD_OPC_CheckField, 28, 4, 15, 12, 0, // Skip to: 6985 /* 6973 */ MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, // Skip to: 6985 /* 6981 */ MCD_OPC_Decode, 255, 2, 83, // Opcode: SRSIB_UPD /* 6985 */ MCD_OPC_CheckPredicate, 0, 227, 2, // Skip to: 7728 /* 6989 */ MCD_OPC_Decode, 241, 17, 82, // Opcode: sysSTMIB_UPD /* 6993 */ MCD_OPC_FilterValue, 31, 219, 2, // Skip to: 7728 /* 6997 */ MCD_OPC_CheckPredicate, 0, 215, 2, // Skip to: 7728 /* 7001 */ MCD_OPC_Decode, 233, 17, 82, // Opcode: sysLDMIB_UPD /* 7005 */ MCD_OPC_FilterValue, 5, 51, 0, // Skip to: 7060 /* 7009 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7012 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 7023 /* 7016 */ MCD_OPC_CheckPredicate, 0, 27, 0, // Skip to: 7047 /* 7020 */ MCD_OPC_Decode, 73, 84, // Opcode: Bcc /* 7023 */ MCD_OPC_FilterValue, 1, 20, 0, // Skip to: 7047 /* 7027 */ MCD_OPC_CheckPredicate, 0, 9, 0, // Skip to: 7040 /* 7031 */ MCD_OPC_CheckField, 28, 4, 14, 3, 0, // Skip to: 7040 /* 7037 */ MCD_OPC_Decode, 58, 84, // Opcode: BL /* 7040 */ MCD_OPC_CheckPredicate, 0, 3, 0, // Skip to: 7047 /* 7044 */ MCD_OPC_Decode, 62, 84, // Opcode: BL_pred /* 7047 */ MCD_OPC_CheckPredicate, 8, 165, 2, // Skip to: 7728 /* 7051 */ MCD_OPC_CheckField, 28, 4, 15, 159, 2, // Skip to: 7728 /* 7057 */ MCD_OPC_Decode, 61, 85, // Opcode: BLXi /* 7060 */ MCD_OPC_FilterValue, 6, 43, 2, // Skip to: 7619 /* 7064 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 7067 */ MCD_OPC_FilterValue, 0, 62, 0, // Skip to: 7133 /* 7071 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7074 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 7107 /* 7078 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 7081 */ MCD_OPC_FilterValue, 1, 131, 2, // Skip to: 7728 /* 7085 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7099 /* 7089 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7099 /* 7095 */ MCD_OPC_Decode, 138, 3, 86, // Opcode: STC2_OPTION /* 7099 */ MCD_OPC_CheckPredicate, 0, 113, 2, // Skip to: 7728 /* 7103 */ MCD_OPC_Decode, 146, 3, 86, // Opcode: STC_OPTION /* 7107 */ MCD_OPC_FilterValue, 1, 105, 2, // Skip to: 7728 /* 7111 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7125 /* 7115 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7125 /* 7121 */ MCD_OPC_Decode, 137, 3, 86, // Opcode: STC2_OFFSET /* 7125 */ MCD_OPC_CheckPredicate, 0, 87, 2, // Skip to: 7728 /* 7129 */ MCD_OPC_Decode, 145, 3, 86, // Opcode: STC_OFFSET /* 7133 */ MCD_OPC_FilterValue, 1, 62, 0, // Skip to: 7199 /* 7137 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7140 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 7173 /* 7144 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 7147 */ MCD_OPC_FilterValue, 1, 65, 2, // Skip to: 7728 /* 7151 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7165 /* 7155 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7165 /* 7161 */ MCD_OPC_Decode, 135, 1, 86, // Opcode: LDC2_OPTION /* 7165 */ MCD_OPC_CheckPredicate, 0, 47, 2, // Skip to: 7728 /* 7169 */ MCD_OPC_Decode, 143, 1, 86, // Opcode: LDC_OPTION /* 7173 */ MCD_OPC_FilterValue, 1, 39, 2, // Skip to: 7728 /* 7177 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7191 /* 7181 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7191 /* 7187 */ MCD_OPC_Decode, 134, 1, 86, // Opcode: LDC2_OFFSET /* 7191 */ MCD_OPC_CheckPredicate, 0, 21, 2, // Skip to: 7728 /* 7195 */ MCD_OPC_Decode, 142, 1, 86, // Opcode: LDC_OFFSET /* 7199 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 7258 /* 7203 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7206 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7232 /* 7210 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7224 /* 7214 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7224 /* 7220 */ MCD_OPC_Decode, 139, 3, 86, // Opcode: STC2_POST /* 7224 */ MCD_OPC_CheckPredicate, 0, 244, 1, // Skip to: 7728 /* 7228 */ MCD_OPC_Decode, 147, 3, 86, // Opcode: STC_POST /* 7232 */ MCD_OPC_FilterValue, 1, 236, 1, // Skip to: 7728 /* 7236 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7250 /* 7240 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7250 /* 7246 */ MCD_OPC_Decode, 140, 3, 86, // Opcode: STC2_PRE /* 7250 */ MCD_OPC_CheckPredicate, 0, 218, 1, // Skip to: 7728 /* 7254 */ MCD_OPC_Decode, 148, 3, 86, // Opcode: STC_PRE /* 7258 */ MCD_OPC_FilterValue, 3, 55, 0, // Skip to: 7317 /* 7262 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7265 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7291 /* 7269 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7283 /* 7273 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7283 /* 7279 */ MCD_OPC_Decode, 136, 1, 86, // Opcode: LDC2_POST /* 7283 */ MCD_OPC_CheckPredicate, 0, 185, 1, // Skip to: 7728 /* 7287 */ MCD_OPC_Decode, 144, 1, 86, // Opcode: LDC_POST /* 7291 */ MCD_OPC_FilterValue, 1, 177, 1, // Skip to: 7728 /* 7295 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7309 /* 7299 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7309 /* 7305 */ MCD_OPC_Decode, 137, 1, 86, // Opcode: LDC2_PRE /* 7309 */ MCD_OPC_CheckPredicate, 0, 159, 1, // Skip to: 7728 /* 7313 */ MCD_OPC_Decode, 145, 1, 86, // Opcode: LDC_PRE /* 7317 */ MCD_OPC_FilterValue, 4, 88, 0, // Skip to: 7409 /* 7321 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7324 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 7383 /* 7328 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 7331 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7357 /* 7335 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7349 /* 7339 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7349 /* 7345 */ MCD_OPC_Decode, 208, 1, 87, // Opcode: MCRR2 /* 7349 */ MCD_OPC_CheckPredicate, 0, 119, 1, // Skip to: 7728 /* 7353 */ MCD_OPC_Decode, 207, 1, 88, // Opcode: MCRR /* 7357 */ MCD_OPC_FilterValue, 1, 111, 1, // Skip to: 7728 /* 7361 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7375 /* 7365 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7375 /* 7371 */ MCD_OPC_Decode, 134, 3, 86, // Opcode: STC2L_OPTION /* 7375 */ MCD_OPC_CheckPredicate, 0, 93, 1, // Skip to: 7728 /* 7379 */ MCD_OPC_Decode, 142, 3, 86, // Opcode: STCL_OPTION /* 7383 */ MCD_OPC_FilterValue, 1, 85, 1, // Skip to: 7728 /* 7387 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7401 /* 7391 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7401 /* 7397 */ MCD_OPC_Decode, 133, 3, 86, // Opcode: STC2L_OFFSET /* 7401 */ MCD_OPC_CheckPredicate, 0, 67, 1, // Skip to: 7728 /* 7405 */ MCD_OPC_Decode, 141, 3, 86, // Opcode: STCL_OFFSET /* 7409 */ MCD_OPC_FilterValue, 5, 88, 0, // Skip to: 7501 /* 7413 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7416 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 7475 /* 7420 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 7423 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7449 /* 7427 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7441 /* 7431 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7441 /* 7437 */ MCD_OPC_Decode, 237, 1, 87, // Opcode: MRRC2 /* 7441 */ MCD_OPC_CheckPredicate, 0, 27, 1, // Skip to: 7728 /* 7445 */ MCD_OPC_Decode, 236, 1, 88, // Opcode: MRRC /* 7449 */ MCD_OPC_FilterValue, 1, 19, 1, // Skip to: 7728 /* 7453 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7467 /* 7457 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7467 /* 7463 */ MCD_OPC_Decode, 131, 1, 86, // Opcode: LDC2L_OPTION /* 7467 */ MCD_OPC_CheckPredicate, 0, 1, 1, // Skip to: 7728 /* 7471 */ MCD_OPC_Decode, 139, 1, 86, // Opcode: LDCL_OPTION /* 7475 */ MCD_OPC_FilterValue, 1, 249, 0, // Skip to: 7728 /* 7479 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7493 /* 7483 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7493 /* 7489 */ MCD_OPC_Decode, 130, 1, 86, // Opcode: LDC2L_OFFSET /* 7493 */ MCD_OPC_CheckPredicate, 0, 231, 0, // Skip to: 7728 /* 7497 */ MCD_OPC_Decode, 138, 1, 86, // Opcode: LDCL_OFFSET /* 7501 */ MCD_OPC_FilterValue, 6, 55, 0, // Skip to: 7560 /* 7505 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7508 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7534 /* 7512 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7526 /* 7516 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7526 /* 7522 */ MCD_OPC_Decode, 135, 3, 86, // Opcode: STC2L_POST /* 7526 */ MCD_OPC_CheckPredicate, 0, 198, 0, // Skip to: 7728 /* 7530 */ MCD_OPC_Decode, 143, 3, 86, // Opcode: STCL_POST /* 7534 */ MCD_OPC_FilterValue, 1, 190, 0, // Skip to: 7728 /* 7538 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7552 /* 7542 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7552 /* 7548 */ MCD_OPC_Decode, 136, 3, 86, // Opcode: STC2L_PRE /* 7552 */ MCD_OPC_CheckPredicate, 0, 172, 0, // Skip to: 7728 /* 7556 */ MCD_OPC_Decode, 144, 3, 86, // Opcode: STCL_PRE /* 7560 */ MCD_OPC_FilterValue, 7, 164, 0, // Skip to: 7728 /* 7564 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7567 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7593 /* 7571 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7585 /* 7575 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7585 /* 7581 */ MCD_OPC_Decode, 132, 1, 86, // Opcode: LDC2L_POST /* 7585 */ MCD_OPC_CheckPredicate, 0, 139, 0, // Skip to: 7728 /* 7589 */ MCD_OPC_Decode, 140, 1, 86, // Opcode: LDCL_POST /* 7593 */ MCD_OPC_FilterValue, 1, 131, 0, // Skip to: 7728 /* 7597 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7611 /* 7601 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7611 /* 7607 */ MCD_OPC_Decode, 133, 1, 86, // Opcode: LDC2L_PRE /* 7611 */ MCD_OPC_CheckPredicate, 0, 113, 0, // Skip to: 7728 /* 7615 */ MCD_OPC_Decode, 141, 1, 86, // Opcode: LDCL_PRE /* 7619 */ MCD_OPC_FilterValue, 7, 105, 0, // Skip to: 7728 /* 7623 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 7626 */ MCD_OPC_FilterValue, 0, 86, 0, // Skip to: 7716 /* 7630 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 7633 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 7657 /* 7637 */ MCD_OPC_CheckPredicate, 4, 9, 0, // Skip to: 7650 /* 7641 */ MCD_OPC_CheckField, 28, 4, 15, 3, 0, // Skip to: 7650 /* 7647 */ MCD_OPC_Decode, 75, 89, // Opcode: CDP2 /* 7650 */ MCD_OPC_CheckPredicate, 4, 74, 0, // Skip to: 7728 /* 7654 */ MCD_OPC_Decode, 74, 90, // Opcode: CDP /* 7657 */ MCD_OPC_FilterValue, 1, 67, 0, // Skip to: 7728 /* 7661 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 7664 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 7690 /* 7668 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7682 /* 7672 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7682 /* 7678 */ MCD_OPC_Decode, 206, 1, 91, // Opcode: MCR2 /* 7682 */ MCD_OPC_CheckPredicate, 0, 42, 0, // Skip to: 7728 /* 7686 */ MCD_OPC_Decode, 205, 1, 92, // Opcode: MCR /* 7690 */ MCD_OPC_FilterValue, 1, 34, 0, // Skip to: 7728 /* 7694 */ MCD_OPC_CheckPredicate, 4, 10, 0, // Skip to: 7708 /* 7698 */ MCD_OPC_CheckField, 28, 4, 15, 4, 0, // Skip to: 7708 /* 7704 */ MCD_OPC_Decode, 235, 1, 93, // Opcode: MRC2 /* 7708 */ MCD_OPC_CheckPredicate, 0, 16, 0, // Skip to: 7728 /* 7712 */ MCD_OPC_Decode, 234, 1, 94, // Opcode: MRC /* 7716 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7728 /* 7720 */ MCD_OPC_CheckPredicate, 0, 4, 0, // Skip to: 7728 /* 7724 */ MCD_OPC_Decode, 208, 3, 95, // Opcode: SVC /* 7728 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableNEONData32[] = { /* 0 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 3 */ MCD_OPC_FilterValue, 0, 230, 30, // Skip to: 7917 /* 7 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 10 */ MCD_OPC_FilterValue, 0, 113, 5, // Skip to: 1407 /* 14 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 17 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 126 /* 21 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 24 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 56 /* 29 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 32 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 44 /* 36 */ MCD_OPC_CheckPredicate, 16, 195, 56, // Skip to: 14571 /* 40 */ MCD_OPC_Decode, 180, 6, 96, // Opcode: VHADDsv8i8 /* 44 */ MCD_OPC_FilterValue, 1, 187, 56, // Skip to: 14571 /* 48 */ MCD_OPC_CheckPredicate, 16, 183, 56, // Skip to: 14571 /* 52 */ MCD_OPC_Decode, 175, 6, 97, // Opcode: VHADDsv16i8 /* 56 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 75 /* 61 */ MCD_OPC_CheckPredicate, 16, 170, 56, // Skip to: 14571 /* 65 */ MCD_OPC_CheckField, 6, 1, 0, 164, 56, // Skip to: 14571 /* 71 */ MCD_OPC_Decode, 198, 4, 98, // Opcode: VADDLsv8i16 /* 75 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 107 /* 80 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 83 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 95 /* 87 */ MCD_OPC_CheckPredicate, 16, 144, 56, // Skip to: 14571 /* 91 */ MCD_OPC_Decode, 186, 6, 96, // Opcode: VHADDuv8i8 /* 95 */ MCD_OPC_FilterValue, 1, 136, 56, // Skip to: 14571 /* 99 */ MCD_OPC_CheckPredicate, 16, 132, 56, // Skip to: 14571 /* 103 */ MCD_OPC_Decode, 181, 6, 97, // Opcode: VHADDuv16i8 /* 107 */ MCD_OPC_FilterValue, 231, 3, 123, 56, // Skip to: 14571 /* 112 */ MCD_OPC_CheckPredicate, 16, 119, 56, // Skip to: 14571 /* 116 */ MCD_OPC_CheckField, 6, 1, 0, 113, 56, // Skip to: 14571 /* 122 */ MCD_OPC_Decode, 201, 4, 98, // Opcode: VADDLuv8i16 /* 126 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 235 /* 130 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 133 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 165 /* 138 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 141 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 153 /* 145 */ MCD_OPC_CheckPredicate, 16, 86, 56, // Skip to: 14571 /* 149 */ MCD_OPC_Decode, 141, 13, 96, // Opcode: VRHADDsv8i8 /* 153 */ MCD_OPC_FilterValue, 1, 78, 56, // Skip to: 14571 /* 157 */ MCD_OPC_CheckPredicate, 16, 74, 56, // Skip to: 14571 /* 161 */ MCD_OPC_Decode, 136, 13, 97, // Opcode: VRHADDsv16i8 /* 165 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 184 /* 170 */ MCD_OPC_CheckPredicate, 16, 61, 56, // Skip to: 14571 /* 174 */ MCD_OPC_CheckField, 6, 1, 0, 55, 56, // Skip to: 14571 /* 180 */ MCD_OPC_Decode, 205, 4, 99, // Opcode: VADDWsv8i16 /* 184 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 216 /* 189 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 192 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 204 /* 196 */ MCD_OPC_CheckPredicate, 16, 35, 56, // Skip to: 14571 /* 200 */ MCD_OPC_Decode, 147, 13, 96, // Opcode: VRHADDuv8i8 /* 204 */ MCD_OPC_FilterValue, 1, 27, 56, // Skip to: 14571 /* 208 */ MCD_OPC_CheckPredicate, 16, 23, 56, // Skip to: 14571 /* 212 */ MCD_OPC_Decode, 142, 13, 97, // Opcode: VRHADDuv16i8 /* 216 */ MCD_OPC_FilterValue, 231, 3, 14, 56, // Skip to: 14571 /* 221 */ MCD_OPC_CheckPredicate, 16, 10, 56, // Skip to: 14571 /* 225 */ MCD_OPC_CheckField, 6, 1, 0, 4, 56, // Skip to: 14571 /* 231 */ MCD_OPC_Decode, 208, 4, 99, // Opcode: VADDWuv8i16 /* 235 */ MCD_OPC_FilterValue, 2, 105, 0, // Skip to: 344 /* 239 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 242 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 274 /* 247 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 250 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 262 /* 254 */ MCD_OPC_CheckPredicate, 16, 233, 55, // Skip to: 14571 /* 258 */ MCD_OPC_Decode, 192, 6, 96, // Opcode: VHSUBsv8i8 /* 262 */ MCD_OPC_FilterValue, 1, 225, 55, // Skip to: 14571 /* 266 */ MCD_OPC_CheckPredicate, 16, 221, 55, // Skip to: 14571 /* 270 */ MCD_OPC_Decode, 187, 6, 97, // Opcode: VHSUBsv16i8 /* 274 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 293 /* 279 */ MCD_OPC_CheckPredicate, 16, 208, 55, // Skip to: 14571 /* 283 */ MCD_OPC_CheckField, 6, 1, 0, 202, 55, // Skip to: 14571 /* 289 */ MCD_OPC_Decode, 146, 17, 98, // Opcode: VSUBLsv8i16 /* 293 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 325 /* 298 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 301 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 313 /* 305 */ MCD_OPC_CheckPredicate, 16, 182, 55, // Skip to: 14571 /* 309 */ MCD_OPC_Decode, 198, 6, 96, // Opcode: VHSUBuv8i8 /* 313 */ MCD_OPC_FilterValue, 1, 174, 55, // Skip to: 14571 /* 317 */ MCD_OPC_CheckPredicate, 16, 170, 55, // Skip to: 14571 /* 321 */ MCD_OPC_Decode, 193, 6, 97, // Opcode: VHSUBuv16i8 /* 325 */ MCD_OPC_FilterValue, 231, 3, 161, 55, // Skip to: 14571 /* 330 */ MCD_OPC_CheckPredicate, 16, 157, 55, // Skip to: 14571 /* 334 */ MCD_OPC_CheckField, 6, 1, 0, 151, 55, // Skip to: 14571 /* 340 */ MCD_OPC_Decode, 149, 17, 98, // Opcode: VSUBLuv8i16 /* 344 */ MCD_OPC_FilterValue, 3, 105, 0, // Skip to: 453 /* 348 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 351 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 383 /* 356 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 359 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 371 /* 363 */ MCD_OPC_CheckPredicate, 16, 124, 55, // Skip to: 14571 /* 367 */ MCD_OPC_Decode, 150, 5, 96, // Opcode: VCGTsv8i8 /* 371 */ MCD_OPC_FilterValue, 1, 116, 55, // Skip to: 14571 /* 375 */ MCD_OPC_CheckPredicate, 16, 112, 55, // Skip to: 14571 /* 379 */ MCD_OPC_Decode, 145, 5, 97, // Opcode: VCGTsv16i8 /* 383 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 402 /* 388 */ MCD_OPC_CheckPredicate, 16, 99, 55, // Skip to: 14571 /* 392 */ MCD_OPC_CheckField, 6, 1, 0, 93, 55, // Skip to: 14571 /* 398 */ MCD_OPC_Decode, 153, 17, 99, // Opcode: VSUBWsv8i16 /* 402 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 434 /* 407 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 410 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 422 /* 414 */ MCD_OPC_CheckPredicate, 16, 73, 55, // Skip to: 14571 /* 418 */ MCD_OPC_Decode, 156, 5, 96, // Opcode: VCGTuv8i8 /* 422 */ MCD_OPC_FilterValue, 1, 65, 55, // Skip to: 14571 /* 426 */ MCD_OPC_CheckPredicate, 16, 61, 55, // Skip to: 14571 /* 430 */ MCD_OPC_Decode, 151, 5, 97, // Opcode: VCGTuv16i8 /* 434 */ MCD_OPC_FilterValue, 231, 3, 52, 55, // Skip to: 14571 /* 439 */ MCD_OPC_CheckPredicate, 16, 48, 55, // Skip to: 14571 /* 443 */ MCD_OPC_CheckField, 6, 1, 0, 42, 55, // Skip to: 14571 /* 449 */ MCD_OPC_Decode, 156, 17, 99, // Opcode: VSUBWuv8i16 /* 453 */ MCD_OPC_FilterValue, 4, 105, 0, // Skip to: 562 /* 457 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 460 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 492 /* 465 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 468 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 480 /* 472 */ MCD_OPC_CheckPredicate, 16, 15, 55, // Skip to: 14571 /* 476 */ MCD_OPC_Decode, 141, 14, 100, // Opcode: VSHLsv8i8 /* 480 */ MCD_OPC_FilterValue, 1, 7, 55, // Skip to: 14571 /* 484 */ MCD_OPC_CheckPredicate, 16, 3, 55, // Skip to: 14571 /* 488 */ MCD_OPC_Decode, 134, 14, 101, // Opcode: VSHLsv16i8 /* 492 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 511 /* 497 */ MCD_OPC_CheckPredicate, 16, 246, 54, // Skip to: 14571 /* 501 */ MCD_OPC_CheckField, 6, 1, 0, 240, 54, // Skip to: 14571 /* 507 */ MCD_OPC_Decode, 195, 4, 102, // Opcode: VADDHNv8i8 /* 511 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 543 /* 516 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 519 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 531 /* 523 */ MCD_OPC_CheckPredicate, 16, 220, 54, // Skip to: 14571 /* 527 */ MCD_OPC_Decode, 149, 14, 100, // Opcode: VSHLuv8i8 /* 531 */ MCD_OPC_FilterValue, 1, 212, 54, // Skip to: 14571 /* 535 */ MCD_OPC_CheckPredicate, 16, 208, 54, // Skip to: 14571 /* 539 */ MCD_OPC_Decode, 142, 14, 101, // Opcode: VSHLuv16i8 /* 543 */ MCD_OPC_FilterValue, 231, 3, 199, 54, // Skip to: 14571 /* 548 */ MCD_OPC_CheckPredicate, 16, 195, 54, // Skip to: 14571 /* 552 */ MCD_OPC_CheckField, 6, 1, 0, 189, 54, // Skip to: 14571 /* 558 */ MCD_OPC_Decode, 245, 12, 102, // Opcode: VRADDHNv8i8 /* 562 */ MCD_OPC_FilterValue, 5, 105, 0, // Skip to: 671 /* 566 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 569 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 601 /* 574 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 577 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 589 /* 581 */ MCD_OPC_CheckPredicate, 16, 162, 54, // Skip to: 14571 /* 585 */ MCD_OPC_Decode, 181, 13, 100, // Opcode: VRSHLsv8i8 /* 589 */ MCD_OPC_FilterValue, 1, 154, 54, // Skip to: 14571 /* 593 */ MCD_OPC_CheckPredicate, 16, 150, 54, // Skip to: 14571 /* 597 */ MCD_OPC_Decode, 174, 13, 101, // Opcode: VRSHLsv16i8 /* 601 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 620 /* 606 */ MCD_OPC_CheckPredicate, 16, 137, 54, // Skip to: 14571 /* 610 */ MCD_OPC_CheckField, 6, 1, 0, 131, 54, // Skip to: 14571 /* 616 */ MCD_OPC_Decode, 142, 4, 103, // Opcode: VABALsv8i16 /* 620 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 652 /* 625 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 628 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 640 /* 632 */ MCD_OPC_CheckPredicate, 16, 111, 54, // Skip to: 14571 /* 636 */ MCD_OPC_Decode, 189, 13, 100, // Opcode: VRSHLuv8i8 /* 640 */ MCD_OPC_FilterValue, 1, 103, 54, // Skip to: 14571 /* 644 */ MCD_OPC_CheckPredicate, 16, 99, 54, // Skip to: 14571 /* 648 */ MCD_OPC_Decode, 182, 13, 101, // Opcode: VRSHLuv16i8 /* 652 */ MCD_OPC_FilterValue, 231, 3, 90, 54, // Skip to: 14571 /* 657 */ MCD_OPC_CheckPredicate, 16, 86, 54, // Skip to: 14571 /* 661 */ MCD_OPC_CheckField, 6, 1, 0, 80, 54, // Skip to: 14571 /* 667 */ MCD_OPC_Decode, 145, 4, 103, // Opcode: VABALuv8i16 /* 671 */ MCD_OPC_FilterValue, 6, 105, 0, // Skip to: 780 /* 675 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 678 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 710 /* 683 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 686 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 698 /* 690 */ MCD_OPC_CheckPredicate, 16, 53, 54, // Skip to: 14571 /* 694 */ MCD_OPC_Decode, 249, 9, 96, // Opcode: VMAXsv8i8 /* 698 */ MCD_OPC_FilterValue, 1, 45, 54, // Skip to: 14571 /* 702 */ MCD_OPC_CheckPredicate, 16, 41, 54, // Skip to: 14571 /* 706 */ MCD_OPC_Decode, 244, 9, 97, // Opcode: VMAXsv16i8 /* 710 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 729 /* 715 */ MCD_OPC_CheckPredicate, 16, 28, 54, // Skip to: 14571 /* 719 */ MCD_OPC_CheckField, 6, 1, 0, 22, 54, // Skip to: 14571 /* 725 */ MCD_OPC_Decode, 143, 17, 102, // Opcode: VSUBHNv8i8 /* 729 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 761 /* 734 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 737 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 749 /* 741 */ MCD_OPC_CheckPredicate, 16, 2, 54, // Skip to: 14571 /* 745 */ MCD_OPC_Decode, 255, 9, 96, // Opcode: VMAXuv8i8 /* 749 */ MCD_OPC_FilterValue, 1, 250, 53, // Skip to: 14571 /* 753 */ MCD_OPC_CheckPredicate, 16, 246, 53, // Skip to: 14571 /* 757 */ MCD_OPC_Decode, 250, 9, 97, // Opcode: VMAXuv16i8 /* 761 */ MCD_OPC_FilterValue, 231, 3, 237, 53, // Skip to: 14571 /* 766 */ MCD_OPC_CheckPredicate, 16, 233, 53, // Skip to: 14571 /* 770 */ MCD_OPC_CheckField, 6, 1, 0, 227, 53, // Skip to: 14571 /* 776 */ MCD_OPC_Decode, 233, 13, 102, // Opcode: VRSUBHNv8i8 /* 780 */ MCD_OPC_FilterValue, 7, 105, 0, // Skip to: 889 /* 784 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 787 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 819 /* 792 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 795 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 807 /* 799 */ MCD_OPC_CheckPredicate, 16, 200, 53, // Skip to: 14571 /* 803 */ MCD_OPC_Decode, 171, 4, 96, // Opcode: VABDsv8i8 /* 807 */ MCD_OPC_FilterValue, 1, 192, 53, // Skip to: 14571 /* 811 */ MCD_OPC_CheckPredicate, 16, 188, 53, // Skip to: 14571 /* 815 */ MCD_OPC_Decode, 166, 4, 97, // Opcode: VABDsv16i8 /* 819 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 838 /* 824 */ MCD_OPC_CheckPredicate, 16, 175, 53, // Skip to: 14571 /* 828 */ MCD_OPC_CheckField, 6, 1, 0, 169, 53, // Skip to: 14571 /* 834 */ MCD_OPC_Decode, 160, 4, 98, // Opcode: VABDLsv8i16 /* 838 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 870 /* 843 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 846 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 858 /* 850 */ MCD_OPC_CheckPredicate, 16, 149, 53, // Skip to: 14571 /* 854 */ MCD_OPC_Decode, 177, 4, 96, // Opcode: VABDuv8i8 /* 858 */ MCD_OPC_FilterValue, 1, 141, 53, // Skip to: 14571 /* 862 */ MCD_OPC_CheckPredicate, 16, 137, 53, // Skip to: 14571 /* 866 */ MCD_OPC_Decode, 172, 4, 97, // Opcode: VABDuv16i8 /* 870 */ MCD_OPC_FilterValue, 231, 3, 128, 53, // Skip to: 14571 /* 875 */ MCD_OPC_CheckPredicate, 16, 124, 53, // Skip to: 14571 /* 879 */ MCD_OPC_CheckField, 6, 1, 0, 118, 53, // Skip to: 14571 /* 885 */ MCD_OPC_Decode, 163, 4, 98, // Opcode: VABDLuv8i16 /* 889 */ MCD_OPC_FilterValue, 8, 105, 0, // Skip to: 998 /* 893 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 896 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 928 /* 901 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 904 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 916 /* 908 */ MCD_OPC_CheckPredicate, 16, 91, 53, // Skip to: 14571 /* 912 */ MCD_OPC_Decode, 218, 4, 96, // Opcode: VADDv8i8 /* 916 */ MCD_OPC_FilterValue, 1, 83, 53, // Skip to: 14571 /* 920 */ MCD_OPC_CheckPredicate, 16, 79, 53, // Skip to: 14571 /* 924 */ MCD_OPC_Decode, 211, 4, 97, // Opcode: VADDv16i8 /* 928 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 947 /* 933 */ MCD_OPC_CheckPredicate, 16, 66, 53, // Skip to: 14571 /* 937 */ MCD_OPC_CheckField, 6, 1, 0, 60, 53, // Skip to: 14571 /* 943 */ MCD_OPC_Decode, 153, 10, 103, // Opcode: VMLALsv8i16 /* 947 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 979 /* 952 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 955 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 967 /* 959 */ MCD_OPC_CheckPredicate, 16, 40, 53, // Skip to: 14571 /* 963 */ MCD_OPC_Decode, 166, 17, 96, // Opcode: VSUBv8i8 /* 967 */ MCD_OPC_FilterValue, 1, 32, 53, // Skip to: 14571 /* 971 */ MCD_OPC_CheckPredicate, 16, 28, 53, // Skip to: 14571 /* 975 */ MCD_OPC_Decode, 159, 17, 97, // Opcode: VSUBv16i8 /* 979 */ MCD_OPC_FilterValue, 231, 3, 19, 53, // Skip to: 14571 /* 984 */ MCD_OPC_CheckPredicate, 16, 15, 53, // Skip to: 14571 /* 988 */ MCD_OPC_CheckField, 6, 1, 0, 9, 53, // Skip to: 14571 /* 994 */ MCD_OPC_Decode, 156, 10, 103, // Opcode: VMLALuv8i16 /* 998 */ MCD_OPC_FilterValue, 9, 69, 0, // Skip to: 1071 /* 1002 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1005 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 1038 /* 1009 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1012 */ MCD_OPC_FilterValue, 228, 3, 8, 0, // Skip to: 1025 /* 1017 */ MCD_OPC_CheckPredicate, 16, 238, 52, // Skip to: 14571 /* 1021 */ MCD_OPC_Decode, 171, 10, 104, // Opcode: VMLAv8i8 /* 1025 */ MCD_OPC_FilterValue, 230, 3, 229, 52, // Skip to: 14571 /* 1030 */ MCD_OPC_CheckPredicate, 16, 225, 52, // Skip to: 14571 /* 1034 */ MCD_OPC_Decode, 197, 10, 104, // Opcode: VMLSv8i8 /* 1038 */ MCD_OPC_FilterValue, 1, 217, 52, // Skip to: 14571 /* 1042 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1045 */ MCD_OPC_FilterValue, 228, 3, 8, 0, // Skip to: 1058 /* 1050 */ MCD_OPC_CheckPredicate, 16, 205, 52, // Skip to: 14571 /* 1054 */ MCD_OPC_Decode, 166, 10, 105, // Opcode: VMLAv16i8 /* 1058 */ MCD_OPC_FilterValue, 230, 3, 196, 52, // Skip to: 14571 /* 1063 */ MCD_OPC_CheckPredicate, 16, 192, 52, // Skip to: 14571 /* 1067 */ MCD_OPC_Decode, 192, 10, 105, // Opcode: VMLSv16i8 /* 1071 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 1154 /* 1075 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1078 */ MCD_OPC_FilterValue, 228, 3, 14, 0, // Skip to: 1097 /* 1083 */ MCD_OPC_CheckPredicate, 16, 172, 52, // Skip to: 14571 /* 1087 */ MCD_OPC_CheckField, 6, 1, 0, 166, 52, // Skip to: 14571 /* 1093 */ MCD_OPC_Decode, 205, 11, 96, // Opcode: VPMAXs8 /* 1097 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 1116 /* 1102 */ MCD_OPC_CheckPredicate, 16, 153, 52, // Skip to: 14571 /* 1106 */ MCD_OPC_CheckField, 6, 1, 0, 147, 52, // Skip to: 14571 /* 1112 */ MCD_OPC_Decode, 179, 10, 103, // Opcode: VMLSLsv8i16 /* 1116 */ MCD_OPC_FilterValue, 230, 3, 14, 0, // Skip to: 1135 /* 1121 */ MCD_OPC_CheckPredicate, 16, 134, 52, // Skip to: 14571 /* 1125 */ MCD_OPC_CheckField, 6, 1, 0, 128, 52, // Skip to: 14571 /* 1131 */ MCD_OPC_Decode, 208, 11, 96, // Opcode: VPMAXu8 /* 1135 */ MCD_OPC_FilterValue, 231, 3, 119, 52, // Skip to: 14571 /* 1140 */ MCD_OPC_CheckPredicate, 16, 115, 52, // Skip to: 14571 /* 1144 */ MCD_OPC_CheckField, 6, 1, 0, 109, 52, // Skip to: 14571 /* 1150 */ MCD_OPC_Decode, 182, 10, 103, // Opcode: VMLSLuv8i16 /* 1154 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 1199 /* 1158 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1161 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 1180 /* 1166 */ MCD_OPC_CheckPredicate, 16, 89, 52, // Skip to: 14571 /* 1170 */ MCD_OPC_CheckField, 6, 1, 0, 83, 52, // Skip to: 14571 /* 1176 */ MCD_OPC_Decode, 251, 10, 98, // Opcode: VMULLsv8i16 /* 1180 */ MCD_OPC_FilterValue, 231, 3, 74, 52, // Skip to: 14571 /* 1185 */ MCD_OPC_CheckPredicate, 16, 70, 52, // Skip to: 14571 /* 1189 */ MCD_OPC_CheckField, 6, 1, 0, 64, 52, // Skip to: 14571 /* 1195 */ MCD_OPC_Decode, 254, 10, 98, // Opcode: VMULLuv8i16 /* 1199 */ MCD_OPC_FilterValue, 13, 55, 0, // Skip to: 1258 /* 1203 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1206 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 1239 /* 1210 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1213 */ MCD_OPC_FilterValue, 228, 3, 8, 0, // Skip to: 1226 /* 1218 */ MCD_OPC_CheckPredicate, 16, 37, 52, // Skip to: 14571 /* 1222 */ MCD_OPC_Decode, 209, 4, 96, // Opcode: VADDfd /* 1226 */ MCD_OPC_FilterValue, 230, 3, 28, 52, // Skip to: 14571 /* 1231 */ MCD_OPC_CheckPredicate, 16, 24, 52, // Skip to: 14571 /* 1235 */ MCD_OPC_Decode, 198, 11, 96, // Opcode: VPADDf /* 1239 */ MCD_OPC_FilterValue, 1, 16, 52, // Skip to: 14571 /* 1243 */ MCD_OPC_CheckPredicate, 16, 12, 52, // Skip to: 14571 /* 1247 */ MCD_OPC_CheckField, 23, 9, 228, 3, 5, 52, // Skip to: 14571 /* 1254 */ MCD_OPC_Decode, 210, 4, 97, // Opcode: VADDfq /* 1258 */ MCD_OPC_FilterValue, 14, 86, 0, // Skip to: 1348 /* 1262 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1265 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 1297 /* 1270 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1273 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1285 /* 1277 */ MCD_OPC_CheckPredicate, 16, 234, 51, // Skip to: 14571 /* 1281 */ MCD_OPC_Decode, 233, 4, 96, // Opcode: VCEQfd /* 1285 */ MCD_OPC_FilterValue, 1, 226, 51, // Skip to: 14571 /* 1289 */ MCD_OPC_CheckPredicate, 16, 222, 51, // Skip to: 14571 /* 1293 */ MCD_OPC_Decode, 234, 4, 97, // Opcode: VCEQfq /* 1297 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 1316 /* 1302 */ MCD_OPC_CheckPredicate, 16, 209, 51, // Skip to: 14571 /* 1306 */ MCD_OPC_CheckField, 6, 1, 0, 203, 51, // Skip to: 14571 /* 1312 */ MCD_OPC_Decode, 244, 10, 98, // Opcode: VMULLp8 /* 1316 */ MCD_OPC_FilterValue, 230, 3, 194, 51, // Skip to: 14571 /* 1321 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1324 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1336 /* 1328 */ MCD_OPC_CheckPredicate, 16, 183, 51, // Skip to: 14571 /* 1332 */ MCD_OPC_Decode, 249, 4, 96, // Opcode: VCGEfd /* 1336 */ MCD_OPC_FilterValue, 1, 175, 51, // Skip to: 14571 /* 1340 */ MCD_OPC_CheckPredicate, 16, 171, 51, // Skip to: 14571 /* 1344 */ MCD_OPC_Decode, 250, 4, 97, // Opcode: VCGEfq /* 1348 */ MCD_OPC_FilterValue, 15, 163, 51, // Skip to: 14571 /* 1352 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1355 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 1388 /* 1359 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1362 */ MCD_OPC_FilterValue, 228, 3, 8, 0, // Skip to: 1375 /* 1367 */ MCD_OPC_CheckPredicate, 16, 144, 51, // Skip to: 14571 /* 1371 */ MCD_OPC_Decode, 242, 9, 96, // Opcode: VMAXfd /* 1375 */ MCD_OPC_FilterValue, 230, 3, 135, 51, // Skip to: 14571 /* 1380 */ MCD_OPC_CheckPredicate, 16, 131, 51, // Skip to: 14571 /* 1384 */ MCD_OPC_Decode, 202, 11, 96, // Opcode: VPMAXf /* 1388 */ MCD_OPC_FilterValue, 1, 123, 51, // Skip to: 14571 /* 1392 */ MCD_OPC_CheckPredicate, 16, 119, 51, // Skip to: 14571 /* 1396 */ MCD_OPC_CheckField, 23, 9, 228, 3, 112, 51, // Skip to: 14571 /* 1403 */ MCD_OPC_Decode, 243, 9, 97, // Opcode: VMAXfq /* 1407 */ MCD_OPC_FilterValue, 1, 38, 6, // Skip to: 2985 /* 1411 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1414 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 1549 /* 1418 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1421 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 1453 /* 1426 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1429 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1441 /* 1433 */ MCD_OPC_CheckPredicate, 16, 78, 51, // Skip to: 14571 /* 1437 */ MCD_OPC_Decode, 177, 6, 96, // Opcode: VHADDsv4i16 /* 1441 */ MCD_OPC_FilterValue, 1, 70, 51, // Skip to: 14571 /* 1445 */ MCD_OPC_CheckPredicate, 16, 66, 51, // Skip to: 14571 /* 1449 */ MCD_OPC_Decode, 179, 6, 97, // Opcode: VHADDsv8i16 /* 1453 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 1485 /* 1458 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1461 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1473 /* 1465 */ MCD_OPC_CheckPredicate, 16, 46, 51, // Skip to: 14571 /* 1469 */ MCD_OPC_Decode, 197, 4, 98, // Opcode: VADDLsv4i32 /* 1473 */ MCD_OPC_FilterValue, 1, 38, 51, // Skip to: 14571 /* 1477 */ MCD_OPC_CheckPredicate, 16, 34, 51, // Skip to: 14571 /* 1481 */ MCD_OPC_Decode, 163, 10, 106, // Opcode: VMLAslv4i16 /* 1485 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 1517 /* 1490 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1493 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1505 /* 1497 */ MCD_OPC_CheckPredicate, 16, 14, 51, // Skip to: 14571 /* 1501 */ MCD_OPC_Decode, 183, 6, 96, // Opcode: VHADDuv4i16 /* 1505 */ MCD_OPC_FilterValue, 1, 6, 51, // Skip to: 14571 /* 1509 */ MCD_OPC_CheckPredicate, 16, 2, 51, // Skip to: 14571 /* 1513 */ MCD_OPC_Decode, 185, 6, 97, // Opcode: VHADDuv8i16 /* 1517 */ MCD_OPC_FilterValue, 231, 3, 249, 50, // Skip to: 14571 /* 1522 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1525 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1537 /* 1529 */ MCD_OPC_CheckPredicate, 16, 238, 50, // Skip to: 14571 /* 1533 */ MCD_OPC_Decode, 200, 4, 98, // Opcode: VADDLuv4i32 /* 1537 */ MCD_OPC_FilterValue, 1, 230, 50, // Skip to: 14571 /* 1541 */ MCD_OPC_CheckPredicate, 16, 226, 50, // Skip to: 14571 /* 1545 */ MCD_OPC_Decode, 165, 10, 107, // Opcode: VMLAslv8i16 /* 1549 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 1658 /* 1553 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1556 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 1588 /* 1561 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1564 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1576 /* 1568 */ MCD_OPC_CheckPredicate, 16, 199, 50, // Skip to: 14571 /* 1572 */ MCD_OPC_Decode, 138, 13, 96, // Opcode: VRHADDsv4i16 /* 1576 */ MCD_OPC_FilterValue, 1, 191, 50, // Skip to: 14571 /* 1580 */ MCD_OPC_CheckPredicate, 16, 187, 50, // Skip to: 14571 /* 1584 */ MCD_OPC_Decode, 140, 13, 97, // Opcode: VRHADDsv8i16 /* 1588 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 1607 /* 1593 */ MCD_OPC_CheckPredicate, 16, 174, 50, // Skip to: 14571 /* 1597 */ MCD_OPC_CheckField, 6, 1, 0, 168, 50, // Skip to: 14571 /* 1603 */ MCD_OPC_Decode, 204, 4, 99, // Opcode: VADDWsv4i32 /* 1607 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 1639 /* 1612 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1615 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1627 /* 1619 */ MCD_OPC_CheckPredicate, 16, 148, 50, // Skip to: 14571 /* 1623 */ MCD_OPC_Decode, 144, 13, 96, // Opcode: VRHADDuv4i16 /* 1627 */ MCD_OPC_FilterValue, 1, 140, 50, // Skip to: 14571 /* 1631 */ MCD_OPC_CheckPredicate, 16, 136, 50, // Skip to: 14571 /* 1635 */ MCD_OPC_Decode, 146, 13, 97, // Opcode: VRHADDuv8i16 /* 1639 */ MCD_OPC_FilterValue, 231, 3, 127, 50, // Skip to: 14571 /* 1644 */ MCD_OPC_CheckPredicate, 16, 123, 50, // Skip to: 14571 /* 1648 */ MCD_OPC_CheckField, 6, 1, 0, 117, 50, // Skip to: 14571 /* 1654 */ MCD_OPC_Decode, 207, 4, 99, // Opcode: VADDWuv4i32 /* 1658 */ MCD_OPC_FilterValue, 2, 131, 0, // Skip to: 1793 /* 1662 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1665 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 1697 /* 1670 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1673 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1685 /* 1677 */ MCD_OPC_CheckPredicate, 16, 90, 50, // Skip to: 14571 /* 1681 */ MCD_OPC_Decode, 189, 6, 96, // Opcode: VHSUBsv4i16 /* 1685 */ MCD_OPC_FilterValue, 1, 82, 50, // Skip to: 14571 /* 1689 */ MCD_OPC_CheckPredicate, 16, 78, 50, // Skip to: 14571 /* 1693 */ MCD_OPC_Decode, 191, 6, 97, // Opcode: VHSUBsv8i16 /* 1697 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 1729 /* 1702 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1705 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1717 /* 1709 */ MCD_OPC_CheckPredicate, 16, 58, 50, // Skip to: 14571 /* 1713 */ MCD_OPC_Decode, 145, 17, 98, // Opcode: VSUBLsv4i32 /* 1717 */ MCD_OPC_FilterValue, 1, 50, 50, // Skip to: 14571 /* 1721 */ MCD_OPC_CheckPredicate, 16, 46, 50, // Skip to: 14571 /* 1725 */ MCD_OPC_Decode, 148, 10, 108, // Opcode: VMLALslsv4i16 /* 1729 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 1761 /* 1734 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1737 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1749 /* 1741 */ MCD_OPC_CheckPredicate, 16, 26, 50, // Skip to: 14571 /* 1745 */ MCD_OPC_Decode, 195, 6, 96, // Opcode: VHSUBuv4i16 /* 1749 */ MCD_OPC_FilterValue, 1, 18, 50, // Skip to: 14571 /* 1753 */ MCD_OPC_CheckPredicate, 16, 14, 50, // Skip to: 14571 /* 1757 */ MCD_OPC_Decode, 197, 6, 97, // Opcode: VHSUBuv8i16 /* 1761 */ MCD_OPC_FilterValue, 231, 3, 5, 50, // Skip to: 14571 /* 1766 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1769 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1781 /* 1773 */ MCD_OPC_CheckPredicate, 16, 250, 49, // Skip to: 14571 /* 1777 */ MCD_OPC_Decode, 148, 17, 98, // Opcode: VSUBLuv4i32 /* 1781 */ MCD_OPC_FilterValue, 1, 242, 49, // Skip to: 14571 /* 1785 */ MCD_OPC_CheckPredicate, 16, 238, 49, // Skip to: 14571 /* 1789 */ MCD_OPC_Decode, 150, 10, 108, // Opcode: VMLALsluv4i16 /* 1793 */ MCD_OPC_FilterValue, 3, 118, 0, // Skip to: 1915 /* 1797 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1800 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 1832 /* 1805 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1808 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1820 /* 1812 */ MCD_OPC_CheckPredicate, 16, 211, 49, // Skip to: 14571 /* 1816 */ MCD_OPC_Decode, 147, 5, 96, // Opcode: VCGTsv4i16 /* 1820 */ MCD_OPC_FilterValue, 1, 203, 49, // Skip to: 14571 /* 1824 */ MCD_OPC_CheckPredicate, 16, 199, 49, // Skip to: 14571 /* 1828 */ MCD_OPC_Decode, 149, 5, 97, // Opcode: VCGTsv8i16 /* 1832 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 1864 /* 1837 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1840 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1852 /* 1844 */ MCD_OPC_CheckPredicate, 16, 179, 49, // Skip to: 14571 /* 1848 */ MCD_OPC_Decode, 152, 17, 99, // Opcode: VSUBWsv4i32 /* 1852 */ MCD_OPC_FilterValue, 1, 171, 49, // Skip to: 14571 /* 1856 */ MCD_OPC_CheckPredicate, 16, 167, 49, // Skip to: 14571 /* 1860 */ MCD_OPC_Decode, 239, 11, 108, // Opcode: VQDMLALslv4i16 /* 1864 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 1896 /* 1869 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1872 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1884 /* 1876 */ MCD_OPC_CheckPredicate, 16, 147, 49, // Skip to: 14571 /* 1880 */ MCD_OPC_Decode, 153, 5, 96, // Opcode: VCGTuv4i16 /* 1884 */ MCD_OPC_FilterValue, 1, 139, 49, // Skip to: 14571 /* 1888 */ MCD_OPC_CheckPredicate, 16, 135, 49, // Skip to: 14571 /* 1892 */ MCD_OPC_Decode, 155, 5, 97, // Opcode: VCGTuv8i16 /* 1896 */ MCD_OPC_FilterValue, 231, 3, 126, 49, // Skip to: 14571 /* 1901 */ MCD_OPC_CheckPredicate, 16, 122, 49, // Skip to: 14571 /* 1905 */ MCD_OPC_CheckField, 6, 1, 0, 116, 49, // Skip to: 14571 /* 1911 */ MCD_OPC_Decode, 155, 17, 99, // Opcode: VSUBWuv4i32 /* 1915 */ MCD_OPC_FilterValue, 4, 131, 0, // Skip to: 2050 /* 1919 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1922 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 1954 /* 1927 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1930 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1942 /* 1934 */ MCD_OPC_CheckPredicate, 16, 89, 49, // Skip to: 14571 /* 1938 */ MCD_OPC_Decode, 138, 14, 100, // Opcode: VSHLsv4i16 /* 1942 */ MCD_OPC_FilterValue, 1, 81, 49, // Skip to: 14571 /* 1946 */ MCD_OPC_CheckPredicate, 16, 77, 49, // Skip to: 14571 /* 1950 */ MCD_OPC_Decode, 140, 14, 101, // Opcode: VSHLsv8i16 /* 1954 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 1986 /* 1959 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1962 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1974 /* 1966 */ MCD_OPC_CheckPredicate, 16, 57, 49, // Skip to: 14571 /* 1970 */ MCD_OPC_Decode, 194, 4, 102, // Opcode: VADDHNv4i16 /* 1974 */ MCD_OPC_FilterValue, 1, 49, 49, // Skip to: 14571 /* 1978 */ MCD_OPC_CheckPredicate, 16, 45, 49, // Skip to: 14571 /* 1982 */ MCD_OPC_Decode, 189, 10, 106, // Opcode: VMLSslv4i16 /* 1986 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 2018 /* 1991 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1994 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2006 /* 1998 */ MCD_OPC_CheckPredicate, 16, 25, 49, // Skip to: 14571 /* 2002 */ MCD_OPC_Decode, 146, 14, 100, // Opcode: VSHLuv4i16 /* 2006 */ MCD_OPC_FilterValue, 1, 17, 49, // Skip to: 14571 /* 2010 */ MCD_OPC_CheckPredicate, 16, 13, 49, // Skip to: 14571 /* 2014 */ MCD_OPC_Decode, 148, 14, 101, // Opcode: VSHLuv8i16 /* 2018 */ MCD_OPC_FilterValue, 231, 3, 4, 49, // Skip to: 14571 /* 2023 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2026 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2038 /* 2030 */ MCD_OPC_CheckPredicate, 16, 249, 48, // Skip to: 14571 /* 2034 */ MCD_OPC_Decode, 244, 12, 102, // Opcode: VRADDHNv4i16 /* 2038 */ MCD_OPC_FilterValue, 1, 241, 48, // Skip to: 14571 /* 2042 */ MCD_OPC_CheckPredicate, 16, 237, 48, // Skip to: 14571 /* 2046 */ MCD_OPC_Decode, 191, 10, 107, // Opcode: VMLSslv8i16 /* 2050 */ MCD_OPC_FilterValue, 5, 105, 0, // Skip to: 2159 /* 2054 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2057 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 2089 /* 2062 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2065 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2077 /* 2069 */ MCD_OPC_CheckPredicate, 16, 210, 48, // Skip to: 14571 /* 2073 */ MCD_OPC_Decode, 178, 13, 100, // Opcode: VRSHLsv4i16 /* 2077 */ MCD_OPC_FilterValue, 1, 202, 48, // Skip to: 14571 /* 2081 */ MCD_OPC_CheckPredicate, 16, 198, 48, // Skip to: 14571 /* 2085 */ MCD_OPC_Decode, 180, 13, 101, // Opcode: VRSHLsv8i16 /* 2089 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 2108 /* 2094 */ MCD_OPC_CheckPredicate, 16, 185, 48, // Skip to: 14571 /* 2098 */ MCD_OPC_CheckField, 6, 1, 0, 179, 48, // Skip to: 14571 /* 2104 */ MCD_OPC_Decode, 141, 4, 103, // Opcode: VABALsv4i32 /* 2108 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 2140 /* 2113 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2116 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2128 /* 2120 */ MCD_OPC_CheckPredicate, 16, 159, 48, // Skip to: 14571 /* 2124 */ MCD_OPC_Decode, 186, 13, 100, // Opcode: VRSHLuv4i16 /* 2128 */ MCD_OPC_FilterValue, 1, 151, 48, // Skip to: 14571 /* 2132 */ MCD_OPC_CheckPredicate, 16, 147, 48, // Skip to: 14571 /* 2136 */ MCD_OPC_Decode, 188, 13, 101, // Opcode: VRSHLuv8i16 /* 2140 */ MCD_OPC_FilterValue, 231, 3, 138, 48, // Skip to: 14571 /* 2145 */ MCD_OPC_CheckPredicate, 16, 134, 48, // Skip to: 14571 /* 2149 */ MCD_OPC_CheckField, 6, 1, 0, 128, 48, // Skip to: 14571 /* 2155 */ MCD_OPC_Decode, 144, 4, 103, // Opcode: VABALuv4i32 /* 2159 */ MCD_OPC_FilterValue, 6, 131, 0, // Skip to: 2294 /* 2163 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2166 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 2198 /* 2171 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2174 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2186 /* 2178 */ MCD_OPC_CheckPredicate, 16, 101, 48, // Skip to: 14571 /* 2182 */ MCD_OPC_Decode, 246, 9, 96, // Opcode: VMAXsv4i16 /* 2186 */ MCD_OPC_FilterValue, 1, 93, 48, // Skip to: 14571 /* 2190 */ MCD_OPC_CheckPredicate, 16, 89, 48, // Skip to: 14571 /* 2194 */ MCD_OPC_Decode, 248, 9, 97, // Opcode: VMAXsv8i16 /* 2198 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 2230 /* 2203 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2206 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2218 /* 2210 */ MCD_OPC_CheckPredicate, 16, 69, 48, // Skip to: 14571 /* 2214 */ MCD_OPC_Decode, 142, 17, 102, // Opcode: VSUBHNv4i16 /* 2218 */ MCD_OPC_FilterValue, 1, 61, 48, // Skip to: 14571 /* 2222 */ MCD_OPC_CheckPredicate, 16, 57, 48, // Skip to: 14571 /* 2226 */ MCD_OPC_Decode, 174, 10, 108, // Opcode: VMLSLslsv4i16 /* 2230 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 2262 /* 2235 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2238 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2250 /* 2242 */ MCD_OPC_CheckPredicate, 16, 37, 48, // Skip to: 14571 /* 2246 */ MCD_OPC_Decode, 252, 9, 96, // Opcode: VMAXuv4i16 /* 2250 */ MCD_OPC_FilterValue, 1, 29, 48, // Skip to: 14571 /* 2254 */ MCD_OPC_CheckPredicate, 16, 25, 48, // Skip to: 14571 /* 2258 */ MCD_OPC_Decode, 254, 9, 97, // Opcode: VMAXuv8i16 /* 2262 */ MCD_OPC_FilterValue, 231, 3, 16, 48, // Skip to: 14571 /* 2267 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2270 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2282 /* 2274 */ MCD_OPC_CheckPredicate, 16, 5, 48, // Skip to: 14571 /* 2278 */ MCD_OPC_Decode, 232, 13, 102, // Opcode: VRSUBHNv4i16 /* 2282 */ MCD_OPC_FilterValue, 1, 253, 47, // Skip to: 14571 /* 2286 */ MCD_OPC_CheckPredicate, 16, 249, 47, // Skip to: 14571 /* 2290 */ MCD_OPC_Decode, 176, 10, 108, // Opcode: VMLSLsluv4i16 /* 2294 */ MCD_OPC_FilterValue, 7, 118, 0, // Skip to: 2416 /* 2298 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2301 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 2333 /* 2306 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2309 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2321 /* 2313 */ MCD_OPC_CheckPredicate, 16, 222, 47, // Skip to: 14571 /* 2317 */ MCD_OPC_Decode, 168, 4, 96, // Opcode: VABDsv4i16 /* 2321 */ MCD_OPC_FilterValue, 1, 214, 47, // Skip to: 14571 /* 2325 */ MCD_OPC_CheckPredicate, 16, 210, 47, // Skip to: 14571 /* 2329 */ MCD_OPC_Decode, 170, 4, 97, // Opcode: VABDsv8i16 /* 2333 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 2365 /* 2338 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2341 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2353 /* 2345 */ MCD_OPC_CheckPredicate, 16, 190, 47, // Skip to: 14571 /* 2349 */ MCD_OPC_Decode, 159, 4, 98, // Opcode: VABDLsv4i32 /* 2353 */ MCD_OPC_FilterValue, 1, 182, 47, // Skip to: 14571 /* 2357 */ MCD_OPC_CheckPredicate, 16, 178, 47, // Skip to: 14571 /* 2361 */ MCD_OPC_Decode, 243, 11, 108, // Opcode: VQDMLSLslv4i16 /* 2365 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 2397 /* 2370 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2373 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2385 /* 2377 */ MCD_OPC_CheckPredicate, 16, 158, 47, // Skip to: 14571 /* 2381 */ MCD_OPC_Decode, 174, 4, 96, // Opcode: VABDuv4i16 /* 2385 */ MCD_OPC_FilterValue, 1, 150, 47, // Skip to: 14571 /* 2389 */ MCD_OPC_CheckPredicate, 16, 146, 47, // Skip to: 14571 /* 2393 */ MCD_OPC_Decode, 176, 4, 97, // Opcode: VABDuv8i16 /* 2397 */ MCD_OPC_FilterValue, 231, 3, 137, 47, // Skip to: 14571 /* 2402 */ MCD_OPC_CheckPredicate, 16, 133, 47, // Skip to: 14571 /* 2406 */ MCD_OPC_CheckField, 6, 1, 0, 127, 47, // Skip to: 14571 /* 2412 */ MCD_OPC_Decode, 162, 4, 98, // Opcode: VABDLuv4i32 /* 2416 */ MCD_OPC_FilterValue, 8, 131, 0, // Skip to: 2551 /* 2420 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2423 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 2455 /* 2428 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2431 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2443 /* 2435 */ MCD_OPC_CheckPredicate, 16, 100, 47, // Skip to: 14571 /* 2439 */ MCD_OPC_Decode, 215, 4, 96, // Opcode: VADDv4i16 /* 2443 */ MCD_OPC_FilterValue, 1, 92, 47, // Skip to: 14571 /* 2447 */ MCD_OPC_CheckPredicate, 16, 88, 47, // Skip to: 14571 /* 2451 */ MCD_OPC_Decode, 217, 4, 97, // Opcode: VADDv8i16 /* 2455 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 2487 /* 2460 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2463 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2475 /* 2467 */ MCD_OPC_CheckPredicate, 16, 68, 47, // Skip to: 14571 /* 2471 */ MCD_OPC_Decode, 152, 10, 103, // Opcode: VMLALsv4i32 /* 2475 */ MCD_OPC_FilterValue, 1, 60, 47, // Skip to: 14571 /* 2479 */ MCD_OPC_CheckPredicate, 16, 56, 47, // Skip to: 14571 /* 2483 */ MCD_OPC_Decode, 135, 11, 109, // Opcode: VMULslv4i16 /* 2487 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 2519 /* 2492 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2495 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2507 /* 2499 */ MCD_OPC_CheckPredicate, 16, 36, 47, // Skip to: 14571 /* 2503 */ MCD_OPC_Decode, 163, 17, 96, // Opcode: VSUBv4i16 /* 2507 */ MCD_OPC_FilterValue, 1, 28, 47, // Skip to: 14571 /* 2511 */ MCD_OPC_CheckPredicate, 16, 24, 47, // Skip to: 14571 /* 2515 */ MCD_OPC_Decode, 165, 17, 97, // Opcode: VSUBv8i16 /* 2519 */ MCD_OPC_FilterValue, 231, 3, 15, 47, // Skip to: 14571 /* 2524 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2527 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2539 /* 2531 */ MCD_OPC_CheckPredicate, 16, 4, 47, // Skip to: 14571 /* 2535 */ MCD_OPC_Decode, 155, 10, 103, // Opcode: VMLALuv4i32 /* 2539 */ MCD_OPC_FilterValue, 1, 252, 46, // Skip to: 14571 /* 2543 */ MCD_OPC_CheckPredicate, 16, 248, 46, // Skip to: 14571 /* 2547 */ MCD_OPC_Decode, 137, 11, 110, // Opcode: VMULslv8i16 /* 2551 */ MCD_OPC_FilterValue, 9, 86, 0, // Skip to: 2641 /* 2555 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2558 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 2590 /* 2563 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2566 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2578 /* 2570 */ MCD_OPC_CheckPredicate, 16, 221, 46, // Skip to: 14571 /* 2574 */ MCD_OPC_Decode, 168, 10, 104, // Opcode: VMLAv4i16 /* 2578 */ MCD_OPC_FilterValue, 1, 213, 46, // Skip to: 14571 /* 2582 */ MCD_OPC_CheckPredicate, 16, 209, 46, // Skip to: 14571 /* 2586 */ MCD_OPC_Decode, 170, 10, 105, // Opcode: VMLAv8i16 /* 2590 */ MCD_OPC_FilterValue, 229, 3, 14, 0, // Skip to: 2609 /* 2595 */ MCD_OPC_CheckPredicate, 16, 196, 46, // Skip to: 14571 /* 2599 */ MCD_OPC_CheckField, 6, 1, 0, 190, 46, // Skip to: 14571 /* 2605 */ MCD_OPC_Decode, 241, 11, 103, // Opcode: VQDMLALv4i32 /* 2609 */ MCD_OPC_FilterValue, 230, 3, 181, 46, // Skip to: 14571 /* 2614 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2617 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2629 /* 2621 */ MCD_OPC_CheckPredicate, 16, 170, 46, // Skip to: 14571 /* 2625 */ MCD_OPC_Decode, 194, 10, 104, // Opcode: VMLSv4i16 /* 2629 */ MCD_OPC_FilterValue, 1, 162, 46, // Skip to: 14571 /* 2633 */ MCD_OPC_CheckPredicate, 16, 158, 46, // Skip to: 14571 /* 2637 */ MCD_OPC_Decode, 196, 10, 105, // Opcode: VMLSv8i16 /* 2641 */ MCD_OPC_FilterValue, 10, 105, 0, // Skip to: 2750 /* 2645 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2648 */ MCD_OPC_FilterValue, 228, 3, 14, 0, // Skip to: 2667 /* 2653 */ MCD_OPC_CheckPredicate, 16, 138, 46, // Skip to: 14571 /* 2657 */ MCD_OPC_CheckField, 6, 1, 0, 132, 46, // Skip to: 14571 /* 2663 */ MCD_OPC_Decode, 203, 11, 96, // Opcode: VPMAXs16 /* 2667 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 2699 /* 2672 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2675 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2687 /* 2679 */ MCD_OPC_CheckPredicate, 16, 112, 46, // Skip to: 14571 /* 2683 */ MCD_OPC_Decode, 178, 10, 103, // Opcode: VMLSLsv4i32 /* 2687 */ MCD_OPC_FilterValue, 1, 104, 46, // Skip to: 14571 /* 2691 */ MCD_OPC_CheckPredicate, 16, 100, 46, // Skip to: 14571 /* 2695 */ MCD_OPC_Decode, 246, 10, 111, // Opcode: VMULLslsv4i16 /* 2699 */ MCD_OPC_FilterValue, 230, 3, 14, 0, // Skip to: 2718 /* 2704 */ MCD_OPC_CheckPredicate, 16, 87, 46, // Skip to: 14571 /* 2708 */ MCD_OPC_CheckField, 6, 1, 0, 81, 46, // Skip to: 14571 /* 2714 */ MCD_OPC_Decode, 206, 11, 96, // Opcode: VPMAXu16 /* 2718 */ MCD_OPC_FilterValue, 231, 3, 72, 46, // Skip to: 14571 /* 2723 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2726 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2738 /* 2730 */ MCD_OPC_CheckPredicate, 16, 61, 46, // Skip to: 14571 /* 2734 */ MCD_OPC_Decode, 181, 10, 103, // Opcode: VMLSLuv4i32 /* 2738 */ MCD_OPC_FilterValue, 1, 53, 46, // Skip to: 14571 /* 2742 */ MCD_OPC_CheckPredicate, 16, 49, 46, // Skip to: 14571 /* 2746 */ MCD_OPC_Decode, 248, 10, 111, // Opcode: VMULLsluv4i16 /* 2750 */ MCD_OPC_FilterValue, 11, 99, 0, // Skip to: 2853 /* 2754 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2757 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 2789 /* 2762 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2765 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2777 /* 2769 */ MCD_OPC_CheckPredicate, 16, 22, 46, // Skip to: 14571 /* 2773 */ MCD_OPC_Decode, 251, 11, 96, // Opcode: VQDMULHv4i16 /* 2777 */ MCD_OPC_FilterValue, 1, 14, 46, // Skip to: 14571 /* 2781 */ MCD_OPC_CheckPredicate, 16, 10, 46, // Skip to: 14571 /* 2785 */ MCD_OPC_Decode, 253, 11, 97, // Opcode: VQDMULHv8i16 /* 2789 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 2821 /* 2794 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2797 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2809 /* 2801 */ MCD_OPC_CheckPredicate, 16, 246, 45, // Skip to: 14571 /* 2805 */ MCD_OPC_Decode, 245, 11, 103, // Opcode: VQDMLSLv4i32 /* 2809 */ MCD_OPC_FilterValue, 1, 238, 45, // Skip to: 14571 /* 2813 */ MCD_OPC_CheckPredicate, 16, 234, 45, // Skip to: 14571 /* 2817 */ MCD_OPC_Decode, 255, 11, 111, // Opcode: VQDMULLslv4i16 /* 2821 */ MCD_OPC_FilterValue, 230, 3, 225, 45, // Skip to: 14571 /* 2826 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2829 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2841 /* 2833 */ MCD_OPC_CheckPredicate, 16, 214, 45, // Skip to: 14571 /* 2837 */ MCD_OPC_Decode, 150, 12, 96, // Opcode: VQRDMULHv4i16 /* 2841 */ MCD_OPC_FilterValue, 1, 206, 45, // Skip to: 14571 /* 2845 */ MCD_OPC_CheckPredicate, 16, 202, 45, // Skip to: 14571 /* 2849 */ MCD_OPC_Decode, 152, 12, 97, // Opcode: VQRDMULHv8i16 /* 2853 */ MCD_OPC_FilterValue, 12, 69, 0, // Skip to: 2926 /* 2857 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2860 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 2893 /* 2864 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2867 */ MCD_OPC_FilterValue, 229, 3, 8, 0, // Skip to: 2880 /* 2872 */ MCD_OPC_CheckPredicate, 16, 175, 45, // Skip to: 14571 /* 2876 */ MCD_OPC_Decode, 250, 10, 98, // Opcode: VMULLsv4i32 /* 2880 */ MCD_OPC_FilterValue, 231, 3, 166, 45, // Skip to: 14571 /* 2885 */ MCD_OPC_CheckPredicate, 16, 162, 45, // Skip to: 14571 /* 2889 */ MCD_OPC_Decode, 253, 10, 98, // Opcode: VMULLuv4i32 /* 2893 */ MCD_OPC_FilterValue, 1, 154, 45, // Skip to: 14571 /* 2897 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2900 */ MCD_OPC_FilterValue, 229, 3, 8, 0, // Skip to: 2913 /* 2905 */ MCD_OPC_CheckPredicate, 16, 142, 45, // Skip to: 14571 /* 2909 */ MCD_OPC_Decode, 247, 11, 109, // Opcode: VQDMULHslv4i16 /* 2913 */ MCD_OPC_FilterValue, 231, 3, 133, 45, // Skip to: 14571 /* 2918 */ MCD_OPC_CheckPredicate, 16, 129, 45, // Skip to: 14571 /* 2922 */ MCD_OPC_Decode, 249, 11, 110, // Opcode: VQDMULHslv8i16 /* 2926 */ MCD_OPC_FilterValue, 13, 121, 45, // Skip to: 14571 /* 2930 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 2933 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 2952 /* 2937 */ MCD_OPC_CheckPredicate, 16, 110, 45, // Skip to: 14571 /* 2941 */ MCD_OPC_CheckField, 23, 9, 229, 3, 103, 45, // Skip to: 14571 /* 2948 */ MCD_OPC_Decode, 129, 12, 98, // Opcode: VQDMULLv4i32 /* 2952 */ MCD_OPC_FilterValue, 1, 95, 45, // Skip to: 14571 /* 2956 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2959 */ MCD_OPC_FilterValue, 229, 3, 8, 0, // Skip to: 2972 /* 2964 */ MCD_OPC_CheckPredicate, 16, 83, 45, // Skip to: 14571 /* 2968 */ MCD_OPC_Decode, 146, 12, 109, // Opcode: VQRDMULHslv4i16 /* 2972 */ MCD_OPC_FilterValue, 231, 3, 74, 45, // Skip to: 14571 /* 2977 */ MCD_OPC_CheckPredicate, 16, 70, 45, // Skip to: 14571 /* 2981 */ MCD_OPC_Decode, 148, 12, 110, // Opcode: VQRDMULHslv8i16 /* 2985 */ MCD_OPC_FilterValue, 2, 47, 7, // Skip to: 4828 /* 2989 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2992 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 3127 /* 2996 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2999 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3031 /* 3004 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3007 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3019 /* 3011 */ MCD_OPC_CheckPredicate, 16, 36, 45, // Skip to: 14571 /* 3015 */ MCD_OPC_Decode, 176, 6, 96, // Opcode: VHADDsv2i32 /* 3019 */ MCD_OPC_FilterValue, 1, 28, 45, // Skip to: 14571 /* 3023 */ MCD_OPC_CheckPredicate, 16, 24, 45, // Skip to: 14571 /* 3027 */ MCD_OPC_Decode, 178, 6, 97, // Opcode: VHADDsv4i32 /* 3031 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3063 /* 3036 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3039 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3051 /* 3043 */ MCD_OPC_CheckPredicate, 16, 4, 45, // Skip to: 14571 /* 3047 */ MCD_OPC_Decode, 196, 4, 98, // Opcode: VADDLsv2i64 /* 3051 */ MCD_OPC_FilterValue, 1, 252, 44, // Skip to: 14571 /* 3055 */ MCD_OPC_CheckPredicate, 16, 248, 44, // Skip to: 14571 /* 3059 */ MCD_OPC_Decode, 162, 10, 112, // Opcode: VMLAslv2i32 /* 3063 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3095 /* 3068 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3071 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3083 /* 3075 */ MCD_OPC_CheckPredicate, 16, 228, 44, // Skip to: 14571 /* 3079 */ MCD_OPC_Decode, 182, 6, 96, // Opcode: VHADDuv2i32 /* 3083 */ MCD_OPC_FilterValue, 1, 220, 44, // Skip to: 14571 /* 3087 */ MCD_OPC_CheckPredicate, 16, 216, 44, // Skip to: 14571 /* 3091 */ MCD_OPC_Decode, 184, 6, 97, // Opcode: VHADDuv4i32 /* 3095 */ MCD_OPC_FilterValue, 231, 3, 207, 44, // Skip to: 14571 /* 3100 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3103 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3115 /* 3107 */ MCD_OPC_CheckPredicate, 16, 196, 44, // Skip to: 14571 /* 3111 */ MCD_OPC_Decode, 199, 4, 98, // Opcode: VADDLuv2i64 /* 3115 */ MCD_OPC_FilterValue, 1, 188, 44, // Skip to: 14571 /* 3119 */ MCD_OPC_CheckPredicate, 16, 184, 44, // Skip to: 14571 /* 3123 */ MCD_OPC_Decode, 164, 10, 113, // Opcode: VMLAslv4i32 /* 3127 */ MCD_OPC_FilterValue, 1, 131, 0, // Skip to: 3262 /* 3131 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3134 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3166 /* 3139 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3142 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3154 /* 3146 */ MCD_OPC_CheckPredicate, 16, 157, 44, // Skip to: 14571 /* 3150 */ MCD_OPC_Decode, 137, 13, 96, // Opcode: VRHADDsv2i32 /* 3154 */ MCD_OPC_FilterValue, 1, 149, 44, // Skip to: 14571 /* 3158 */ MCD_OPC_CheckPredicate, 16, 145, 44, // Skip to: 14571 /* 3162 */ MCD_OPC_Decode, 139, 13, 97, // Opcode: VRHADDsv4i32 /* 3166 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3198 /* 3171 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3174 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3186 /* 3178 */ MCD_OPC_CheckPredicate, 16, 125, 44, // Skip to: 14571 /* 3182 */ MCD_OPC_Decode, 203, 4, 99, // Opcode: VADDWsv2i64 /* 3186 */ MCD_OPC_FilterValue, 1, 117, 44, // Skip to: 14571 /* 3190 */ MCD_OPC_CheckPredicate, 16, 113, 44, // Skip to: 14571 /* 3194 */ MCD_OPC_Decode, 160, 10, 112, // Opcode: VMLAslfd /* 3198 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3230 /* 3203 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3206 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3218 /* 3210 */ MCD_OPC_CheckPredicate, 16, 93, 44, // Skip to: 14571 /* 3214 */ MCD_OPC_Decode, 143, 13, 96, // Opcode: VRHADDuv2i32 /* 3218 */ MCD_OPC_FilterValue, 1, 85, 44, // Skip to: 14571 /* 3222 */ MCD_OPC_CheckPredicate, 16, 81, 44, // Skip to: 14571 /* 3226 */ MCD_OPC_Decode, 145, 13, 97, // Opcode: VRHADDuv4i32 /* 3230 */ MCD_OPC_FilterValue, 231, 3, 72, 44, // Skip to: 14571 /* 3235 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3238 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3250 /* 3242 */ MCD_OPC_CheckPredicate, 16, 61, 44, // Skip to: 14571 /* 3246 */ MCD_OPC_Decode, 206, 4, 99, // Opcode: VADDWuv2i64 /* 3250 */ MCD_OPC_FilterValue, 1, 53, 44, // Skip to: 14571 /* 3254 */ MCD_OPC_CheckPredicate, 16, 49, 44, // Skip to: 14571 /* 3258 */ MCD_OPC_Decode, 161, 10, 113, // Opcode: VMLAslfq /* 3262 */ MCD_OPC_FilterValue, 2, 131, 0, // Skip to: 3397 /* 3266 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3269 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3301 /* 3274 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3277 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3289 /* 3281 */ MCD_OPC_CheckPredicate, 16, 22, 44, // Skip to: 14571 /* 3285 */ MCD_OPC_Decode, 188, 6, 96, // Opcode: VHSUBsv2i32 /* 3289 */ MCD_OPC_FilterValue, 1, 14, 44, // Skip to: 14571 /* 3293 */ MCD_OPC_CheckPredicate, 16, 10, 44, // Skip to: 14571 /* 3297 */ MCD_OPC_Decode, 190, 6, 97, // Opcode: VHSUBsv4i32 /* 3301 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3333 /* 3306 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3309 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3321 /* 3313 */ MCD_OPC_CheckPredicate, 16, 246, 43, // Skip to: 14571 /* 3317 */ MCD_OPC_Decode, 144, 17, 98, // Opcode: VSUBLsv2i64 /* 3321 */ MCD_OPC_FilterValue, 1, 238, 43, // Skip to: 14571 /* 3325 */ MCD_OPC_CheckPredicate, 16, 234, 43, // Skip to: 14571 /* 3329 */ MCD_OPC_Decode, 147, 10, 114, // Opcode: VMLALslsv2i32 /* 3333 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3365 /* 3338 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3341 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3353 /* 3345 */ MCD_OPC_CheckPredicate, 16, 214, 43, // Skip to: 14571 /* 3349 */ MCD_OPC_Decode, 194, 6, 96, // Opcode: VHSUBuv2i32 /* 3353 */ MCD_OPC_FilterValue, 1, 206, 43, // Skip to: 14571 /* 3357 */ MCD_OPC_CheckPredicate, 16, 202, 43, // Skip to: 14571 /* 3361 */ MCD_OPC_Decode, 196, 6, 97, // Opcode: VHSUBuv4i32 /* 3365 */ MCD_OPC_FilterValue, 231, 3, 193, 43, // Skip to: 14571 /* 3370 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3373 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3385 /* 3377 */ MCD_OPC_CheckPredicate, 16, 182, 43, // Skip to: 14571 /* 3381 */ MCD_OPC_Decode, 147, 17, 98, // Opcode: VSUBLuv2i64 /* 3385 */ MCD_OPC_FilterValue, 1, 174, 43, // Skip to: 14571 /* 3389 */ MCD_OPC_CheckPredicate, 16, 170, 43, // Skip to: 14571 /* 3393 */ MCD_OPC_Decode, 149, 10, 114, // Opcode: VMLALsluv2i32 /* 3397 */ MCD_OPC_FilterValue, 3, 118, 0, // Skip to: 3519 /* 3401 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3404 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3436 /* 3409 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3412 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3424 /* 3416 */ MCD_OPC_CheckPredicate, 16, 143, 43, // Skip to: 14571 /* 3420 */ MCD_OPC_Decode, 146, 5, 96, // Opcode: VCGTsv2i32 /* 3424 */ MCD_OPC_FilterValue, 1, 135, 43, // Skip to: 14571 /* 3428 */ MCD_OPC_CheckPredicate, 16, 131, 43, // Skip to: 14571 /* 3432 */ MCD_OPC_Decode, 148, 5, 97, // Opcode: VCGTsv4i32 /* 3436 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3468 /* 3441 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3444 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3456 /* 3448 */ MCD_OPC_CheckPredicate, 16, 111, 43, // Skip to: 14571 /* 3452 */ MCD_OPC_Decode, 151, 17, 99, // Opcode: VSUBWsv2i64 /* 3456 */ MCD_OPC_FilterValue, 1, 103, 43, // Skip to: 14571 /* 3460 */ MCD_OPC_CheckPredicate, 16, 99, 43, // Skip to: 14571 /* 3464 */ MCD_OPC_Decode, 238, 11, 114, // Opcode: VQDMLALslv2i32 /* 3468 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3500 /* 3473 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3476 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3488 /* 3480 */ MCD_OPC_CheckPredicate, 16, 79, 43, // Skip to: 14571 /* 3484 */ MCD_OPC_Decode, 152, 5, 96, // Opcode: VCGTuv2i32 /* 3488 */ MCD_OPC_FilterValue, 1, 71, 43, // Skip to: 14571 /* 3492 */ MCD_OPC_CheckPredicate, 16, 67, 43, // Skip to: 14571 /* 3496 */ MCD_OPC_Decode, 154, 5, 97, // Opcode: VCGTuv4i32 /* 3500 */ MCD_OPC_FilterValue, 231, 3, 58, 43, // Skip to: 14571 /* 3505 */ MCD_OPC_CheckPredicate, 16, 54, 43, // Skip to: 14571 /* 3509 */ MCD_OPC_CheckField, 6, 1, 0, 48, 43, // Skip to: 14571 /* 3515 */ MCD_OPC_Decode, 154, 17, 99, // Opcode: VSUBWuv2i64 /* 3519 */ MCD_OPC_FilterValue, 4, 131, 0, // Skip to: 3654 /* 3523 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3526 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3558 /* 3531 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3534 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3546 /* 3538 */ MCD_OPC_CheckPredicate, 16, 21, 43, // Skip to: 14571 /* 3542 */ MCD_OPC_Decode, 136, 14, 100, // Opcode: VSHLsv2i32 /* 3546 */ MCD_OPC_FilterValue, 1, 13, 43, // Skip to: 14571 /* 3550 */ MCD_OPC_CheckPredicate, 16, 9, 43, // Skip to: 14571 /* 3554 */ MCD_OPC_Decode, 139, 14, 101, // Opcode: VSHLsv4i32 /* 3558 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3590 /* 3563 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3566 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3578 /* 3570 */ MCD_OPC_CheckPredicate, 16, 245, 42, // Skip to: 14571 /* 3574 */ MCD_OPC_Decode, 193, 4, 102, // Opcode: VADDHNv2i32 /* 3578 */ MCD_OPC_FilterValue, 1, 237, 42, // Skip to: 14571 /* 3582 */ MCD_OPC_CheckPredicate, 16, 233, 42, // Skip to: 14571 /* 3586 */ MCD_OPC_Decode, 188, 10, 112, // Opcode: VMLSslv2i32 /* 3590 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3622 /* 3595 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3598 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3610 /* 3602 */ MCD_OPC_CheckPredicate, 16, 213, 42, // Skip to: 14571 /* 3606 */ MCD_OPC_Decode, 144, 14, 100, // Opcode: VSHLuv2i32 /* 3610 */ MCD_OPC_FilterValue, 1, 205, 42, // Skip to: 14571 /* 3614 */ MCD_OPC_CheckPredicate, 16, 201, 42, // Skip to: 14571 /* 3618 */ MCD_OPC_Decode, 147, 14, 101, // Opcode: VSHLuv4i32 /* 3622 */ MCD_OPC_FilterValue, 231, 3, 192, 42, // Skip to: 14571 /* 3627 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3630 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3642 /* 3634 */ MCD_OPC_CheckPredicate, 16, 181, 42, // Skip to: 14571 /* 3638 */ MCD_OPC_Decode, 243, 12, 102, // Opcode: VRADDHNv2i32 /* 3642 */ MCD_OPC_FilterValue, 1, 173, 42, // Skip to: 14571 /* 3646 */ MCD_OPC_CheckPredicate, 16, 169, 42, // Skip to: 14571 /* 3650 */ MCD_OPC_Decode, 190, 10, 113, // Opcode: VMLSslv4i32 /* 3654 */ MCD_OPC_FilterValue, 5, 131, 0, // Skip to: 3789 /* 3658 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3661 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3693 /* 3666 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3669 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3681 /* 3673 */ MCD_OPC_CheckPredicate, 16, 142, 42, // Skip to: 14571 /* 3677 */ MCD_OPC_Decode, 176, 13, 100, // Opcode: VRSHLsv2i32 /* 3681 */ MCD_OPC_FilterValue, 1, 134, 42, // Skip to: 14571 /* 3685 */ MCD_OPC_CheckPredicate, 16, 130, 42, // Skip to: 14571 /* 3689 */ MCD_OPC_Decode, 179, 13, 101, // Opcode: VRSHLsv4i32 /* 3693 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3725 /* 3698 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3701 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3713 /* 3705 */ MCD_OPC_CheckPredicate, 16, 110, 42, // Skip to: 14571 /* 3709 */ MCD_OPC_Decode, 140, 4, 103, // Opcode: VABALsv2i64 /* 3713 */ MCD_OPC_FilterValue, 1, 102, 42, // Skip to: 14571 /* 3717 */ MCD_OPC_CheckPredicate, 16, 98, 42, // Skip to: 14571 /* 3721 */ MCD_OPC_Decode, 186, 10, 112, // Opcode: VMLSslfd /* 3725 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3757 /* 3730 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3733 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3745 /* 3737 */ MCD_OPC_CheckPredicate, 16, 78, 42, // Skip to: 14571 /* 3741 */ MCD_OPC_Decode, 184, 13, 100, // Opcode: VRSHLuv2i32 /* 3745 */ MCD_OPC_FilterValue, 1, 70, 42, // Skip to: 14571 /* 3749 */ MCD_OPC_CheckPredicate, 16, 66, 42, // Skip to: 14571 /* 3753 */ MCD_OPC_Decode, 187, 13, 101, // Opcode: VRSHLuv4i32 /* 3757 */ MCD_OPC_FilterValue, 231, 3, 57, 42, // Skip to: 14571 /* 3762 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3765 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3777 /* 3769 */ MCD_OPC_CheckPredicate, 16, 46, 42, // Skip to: 14571 /* 3773 */ MCD_OPC_Decode, 143, 4, 103, // Opcode: VABALuv2i64 /* 3777 */ MCD_OPC_FilterValue, 1, 38, 42, // Skip to: 14571 /* 3781 */ MCD_OPC_CheckPredicate, 16, 34, 42, // Skip to: 14571 /* 3785 */ MCD_OPC_Decode, 187, 10, 113, // Opcode: VMLSslfq /* 3789 */ MCD_OPC_FilterValue, 6, 131, 0, // Skip to: 3924 /* 3793 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3796 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3828 /* 3801 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3804 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3816 /* 3808 */ MCD_OPC_CheckPredicate, 16, 7, 42, // Skip to: 14571 /* 3812 */ MCD_OPC_Decode, 245, 9, 96, // Opcode: VMAXsv2i32 /* 3816 */ MCD_OPC_FilterValue, 1, 255, 41, // Skip to: 14571 /* 3820 */ MCD_OPC_CheckPredicate, 16, 251, 41, // Skip to: 14571 /* 3824 */ MCD_OPC_Decode, 247, 9, 97, // Opcode: VMAXsv4i32 /* 3828 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3860 /* 3833 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3836 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3848 /* 3840 */ MCD_OPC_CheckPredicate, 16, 231, 41, // Skip to: 14571 /* 3844 */ MCD_OPC_Decode, 141, 17, 102, // Opcode: VSUBHNv2i32 /* 3848 */ MCD_OPC_FilterValue, 1, 223, 41, // Skip to: 14571 /* 3852 */ MCD_OPC_CheckPredicate, 16, 219, 41, // Skip to: 14571 /* 3856 */ MCD_OPC_Decode, 173, 10, 114, // Opcode: VMLSLslsv2i32 /* 3860 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 3892 /* 3865 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3868 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3880 /* 3872 */ MCD_OPC_CheckPredicate, 16, 199, 41, // Skip to: 14571 /* 3876 */ MCD_OPC_Decode, 251, 9, 96, // Opcode: VMAXuv2i32 /* 3880 */ MCD_OPC_FilterValue, 1, 191, 41, // Skip to: 14571 /* 3884 */ MCD_OPC_CheckPredicate, 16, 187, 41, // Skip to: 14571 /* 3888 */ MCD_OPC_Decode, 253, 9, 97, // Opcode: VMAXuv4i32 /* 3892 */ MCD_OPC_FilterValue, 231, 3, 178, 41, // Skip to: 14571 /* 3897 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3900 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3912 /* 3904 */ MCD_OPC_CheckPredicate, 16, 167, 41, // Skip to: 14571 /* 3908 */ MCD_OPC_Decode, 231, 13, 102, // Opcode: VRSUBHNv2i32 /* 3912 */ MCD_OPC_FilterValue, 1, 159, 41, // Skip to: 14571 /* 3916 */ MCD_OPC_CheckPredicate, 16, 155, 41, // Skip to: 14571 /* 3920 */ MCD_OPC_Decode, 175, 10, 114, // Opcode: VMLSLsluv2i32 /* 3924 */ MCD_OPC_FilterValue, 7, 118, 0, // Skip to: 4046 /* 3928 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3931 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 3963 /* 3936 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3939 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3951 /* 3943 */ MCD_OPC_CheckPredicate, 16, 128, 41, // Skip to: 14571 /* 3947 */ MCD_OPC_Decode, 167, 4, 96, // Opcode: VABDsv2i32 /* 3951 */ MCD_OPC_FilterValue, 1, 120, 41, // Skip to: 14571 /* 3955 */ MCD_OPC_CheckPredicate, 16, 116, 41, // Skip to: 14571 /* 3959 */ MCD_OPC_Decode, 169, 4, 97, // Opcode: VABDsv4i32 /* 3963 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 3995 /* 3968 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3971 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3983 /* 3975 */ MCD_OPC_CheckPredicate, 16, 96, 41, // Skip to: 14571 /* 3979 */ MCD_OPC_Decode, 158, 4, 98, // Opcode: VABDLsv2i64 /* 3983 */ MCD_OPC_FilterValue, 1, 88, 41, // Skip to: 14571 /* 3987 */ MCD_OPC_CheckPredicate, 16, 84, 41, // Skip to: 14571 /* 3991 */ MCD_OPC_Decode, 242, 11, 114, // Opcode: VQDMLSLslv2i32 /* 3995 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 4027 /* 4000 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4003 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4015 /* 4007 */ MCD_OPC_CheckPredicate, 16, 64, 41, // Skip to: 14571 /* 4011 */ MCD_OPC_Decode, 173, 4, 96, // Opcode: VABDuv2i32 /* 4015 */ MCD_OPC_FilterValue, 1, 56, 41, // Skip to: 14571 /* 4019 */ MCD_OPC_CheckPredicate, 16, 52, 41, // Skip to: 14571 /* 4023 */ MCD_OPC_Decode, 175, 4, 97, // Opcode: VABDuv4i32 /* 4027 */ MCD_OPC_FilterValue, 231, 3, 43, 41, // Skip to: 14571 /* 4032 */ MCD_OPC_CheckPredicate, 16, 39, 41, // Skip to: 14571 /* 4036 */ MCD_OPC_CheckField, 6, 1, 0, 33, 41, // Skip to: 14571 /* 4042 */ MCD_OPC_Decode, 161, 4, 98, // Opcode: VABDLuv2i64 /* 4046 */ MCD_OPC_FilterValue, 8, 131, 0, // Skip to: 4181 /* 4050 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4053 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 4085 /* 4058 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4061 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4073 /* 4065 */ MCD_OPC_CheckPredicate, 16, 6, 41, // Skip to: 14571 /* 4069 */ MCD_OPC_Decode, 213, 4, 96, // Opcode: VADDv2i32 /* 4073 */ MCD_OPC_FilterValue, 1, 254, 40, // Skip to: 14571 /* 4077 */ MCD_OPC_CheckPredicate, 16, 250, 40, // Skip to: 14571 /* 4081 */ MCD_OPC_Decode, 216, 4, 97, // Opcode: VADDv4i32 /* 4085 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 4117 /* 4090 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4093 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4105 /* 4097 */ MCD_OPC_CheckPredicate, 16, 230, 40, // Skip to: 14571 /* 4101 */ MCD_OPC_Decode, 151, 10, 103, // Opcode: VMLALsv2i64 /* 4105 */ MCD_OPC_FilterValue, 1, 222, 40, // Skip to: 14571 /* 4109 */ MCD_OPC_CheckPredicate, 16, 218, 40, // Skip to: 14571 /* 4113 */ MCD_OPC_Decode, 134, 11, 115, // Opcode: VMULslv2i32 /* 4117 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 4149 /* 4122 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4125 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4137 /* 4129 */ MCD_OPC_CheckPredicate, 16, 198, 40, // Skip to: 14571 /* 4133 */ MCD_OPC_Decode, 161, 17, 96, // Opcode: VSUBv2i32 /* 4137 */ MCD_OPC_FilterValue, 1, 190, 40, // Skip to: 14571 /* 4141 */ MCD_OPC_CheckPredicate, 16, 186, 40, // Skip to: 14571 /* 4145 */ MCD_OPC_Decode, 164, 17, 97, // Opcode: VSUBv4i32 /* 4149 */ MCD_OPC_FilterValue, 231, 3, 177, 40, // Skip to: 14571 /* 4154 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4157 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4169 /* 4161 */ MCD_OPC_CheckPredicate, 16, 166, 40, // Skip to: 14571 /* 4165 */ MCD_OPC_Decode, 154, 10, 103, // Opcode: VMLALuv2i64 /* 4169 */ MCD_OPC_FilterValue, 1, 158, 40, // Skip to: 14571 /* 4173 */ MCD_OPC_CheckPredicate, 16, 154, 40, // Skip to: 14571 /* 4177 */ MCD_OPC_Decode, 136, 11, 116, // Opcode: VMULslv4i32 /* 4181 */ MCD_OPC_FilterValue, 9, 118, 0, // Skip to: 4303 /* 4185 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4188 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 4220 /* 4193 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4196 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4208 /* 4200 */ MCD_OPC_CheckPredicate, 16, 127, 40, // Skip to: 14571 /* 4204 */ MCD_OPC_Decode, 167, 10, 104, // Opcode: VMLAv2i32 /* 4208 */ MCD_OPC_FilterValue, 1, 119, 40, // Skip to: 14571 /* 4212 */ MCD_OPC_CheckPredicate, 16, 115, 40, // Skip to: 14571 /* 4216 */ MCD_OPC_Decode, 169, 10, 105, // Opcode: VMLAv4i32 /* 4220 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 4252 /* 4225 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4228 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4240 /* 4232 */ MCD_OPC_CheckPredicate, 16, 95, 40, // Skip to: 14571 /* 4236 */ MCD_OPC_Decode, 240, 11, 103, // Opcode: VQDMLALv2i64 /* 4240 */ MCD_OPC_FilterValue, 1, 87, 40, // Skip to: 14571 /* 4244 */ MCD_OPC_CheckPredicate, 16, 83, 40, // Skip to: 14571 /* 4248 */ MCD_OPC_Decode, 132, 11, 115, // Opcode: VMULslfd /* 4252 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 4284 /* 4257 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4260 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4272 /* 4264 */ MCD_OPC_CheckPredicate, 16, 63, 40, // Skip to: 14571 /* 4268 */ MCD_OPC_Decode, 193, 10, 104, // Opcode: VMLSv2i32 /* 4272 */ MCD_OPC_FilterValue, 1, 55, 40, // Skip to: 14571 /* 4276 */ MCD_OPC_CheckPredicate, 16, 51, 40, // Skip to: 14571 /* 4280 */ MCD_OPC_Decode, 195, 10, 105, // Opcode: VMLSv4i32 /* 4284 */ MCD_OPC_FilterValue, 231, 3, 42, 40, // Skip to: 14571 /* 4289 */ MCD_OPC_CheckPredicate, 16, 38, 40, // Skip to: 14571 /* 4293 */ MCD_OPC_CheckField, 6, 1, 1, 32, 40, // Skip to: 14571 /* 4299 */ MCD_OPC_Decode, 133, 11, 116, // Opcode: VMULslfq /* 4303 */ MCD_OPC_FilterValue, 10, 105, 0, // Skip to: 4412 /* 4307 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4310 */ MCD_OPC_FilterValue, 228, 3, 14, 0, // Skip to: 4329 /* 4315 */ MCD_OPC_CheckPredicate, 16, 12, 40, // Skip to: 14571 /* 4319 */ MCD_OPC_CheckField, 6, 1, 0, 6, 40, // Skip to: 14571 /* 4325 */ MCD_OPC_Decode, 204, 11, 96, // Opcode: VPMAXs32 /* 4329 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 4361 /* 4334 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4337 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4349 /* 4341 */ MCD_OPC_CheckPredicate, 16, 242, 39, // Skip to: 14571 /* 4345 */ MCD_OPC_Decode, 177, 10, 103, // Opcode: VMLSLsv2i64 /* 4349 */ MCD_OPC_FilterValue, 1, 234, 39, // Skip to: 14571 /* 4353 */ MCD_OPC_CheckPredicate, 16, 230, 39, // Skip to: 14571 /* 4357 */ MCD_OPC_Decode, 245, 10, 117, // Opcode: VMULLslsv2i32 /* 4361 */ MCD_OPC_FilterValue, 230, 3, 14, 0, // Skip to: 4380 /* 4366 */ MCD_OPC_CheckPredicate, 16, 217, 39, // Skip to: 14571 /* 4370 */ MCD_OPC_CheckField, 6, 1, 0, 211, 39, // Skip to: 14571 /* 4376 */ MCD_OPC_Decode, 207, 11, 96, // Opcode: VPMAXu32 /* 4380 */ MCD_OPC_FilterValue, 231, 3, 202, 39, // Skip to: 14571 /* 4385 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4388 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4400 /* 4392 */ MCD_OPC_CheckPredicate, 16, 191, 39, // Skip to: 14571 /* 4396 */ MCD_OPC_Decode, 180, 10, 103, // Opcode: VMLSLuv2i64 /* 4400 */ MCD_OPC_FilterValue, 1, 183, 39, // Skip to: 14571 /* 4404 */ MCD_OPC_CheckPredicate, 16, 179, 39, // Skip to: 14571 /* 4408 */ MCD_OPC_Decode, 247, 10, 117, // Opcode: VMULLsluv2i32 /* 4412 */ MCD_OPC_FilterValue, 11, 99, 0, // Skip to: 4515 /* 4416 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4419 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 4451 /* 4424 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4427 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4439 /* 4431 */ MCD_OPC_CheckPredicate, 16, 152, 39, // Skip to: 14571 /* 4435 */ MCD_OPC_Decode, 250, 11, 96, // Opcode: VQDMULHv2i32 /* 4439 */ MCD_OPC_FilterValue, 1, 144, 39, // Skip to: 14571 /* 4443 */ MCD_OPC_CheckPredicate, 16, 140, 39, // Skip to: 14571 /* 4447 */ MCD_OPC_Decode, 252, 11, 97, // Opcode: VQDMULHv4i32 /* 4451 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 4483 /* 4456 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4459 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4471 /* 4463 */ MCD_OPC_CheckPredicate, 16, 120, 39, // Skip to: 14571 /* 4467 */ MCD_OPC_Decode, 244, 11, 103, // Opcode: VQDMLSLv2i64 /* 4471 */ MCD_OPC_FilterValue, 1, 112, 39, // Skip to: 14571 /* 4475 */ MCD_OPC_CheckPredicate, 16, 108, 39, // Skip to: 14571 /* 4479 */ MCD_OPC_Decode, 254, 11, 117, // Opcode: VQDMULLslv2i32 /* 4483 */ MCD_OPC_FilterValue, 230, 3, 99, 39, // Skip to: 14571 /* 4488 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4491 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4503 /* 4495 */ MCD_OPC_CheckPredicate, 16, 88, 39, // Skip to: 14571 /* 4499 */ MCD_OPC_Decode, 149, 12, 96, // Opcode: VQRDMULHv2i32 /* 4503 */ MCD_OPC_FilterValue, 1, 80, 39, // Skip to: 14571 /* 4507 */ MCD_OPC_CheckPredicate, 16, 76, 39, // Skip to: 14571 /* 4511 */ MCD_OPC_Decode, 151, 12, 97, // Opcode: VQRDMULHv4i32 /* 4515 */ MCD_OPC_FilterValue, 12, 69, 0, // Skip to: 4588 /* 4519 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4522 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 4555 /* 4526 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4529 */ MCD_OPC_FilterValue, 229, 3, 8, 0, // Skip to: 4542 /* 4534 */ MCD_OPC_CheckPredicate, 16, 49, 39, // Skip to: 14571 /* 4538 */ MCD_OPC_Decode, 249, 10, 98, // Opcode: VMULLsv2i64 /* 4542 */ MCD_OPC_FilterValue, 231, 3, 40, 39, // Skip to: 14571 /* 4547 */ MCD_OPC_CheckPredicate, 16, 36, 39, // Skip to: 14571 /* 4551 */ MCD_OPC_Decode, 252, 10, 98, // Opcode: VMULLuv2i64 /* 4555 */ MCD_OPC_FilterValue, 1, 28, 39, // Skip to: 14571 /* 4559 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4562 */ MCD_OPC_FilterValue, 229, 3, 8, 0, // Skip to: 4575 /* 4567 */ MCD_OPC_CheckPredicate, 16, 16, 39, // Skip to: 14571 /* 4571 */ MCD_OPC_Decode, 246, 11, 115, // Opcode: VQDMULHslv2i32 /* 4575 */ MCD_OPC_FilterValue, 231, 3, 7, 39, // Skip to: 14571 /* 4580 */ MCD_OPC_CheckPredicate, 16, 3, 39, // Skip to: 14571 /* 4584 */ MCD_OPC_Decode, 248, 11, 116, // Opcode: VQDMULHslv4i32 /* 4588 */ MCD_OPC_FilterValue, 13, 118, 0, // Skip to: 4710 /* 4592 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4595 */ MCD_OPC_FilterValue, 228, 3, 27, 0, // Skip to: 4627 /* 4600 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4603 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4615 /* 4607 */ MCD_OPC_CheckPredicate, 16, 232, 38, // Skip to: 14571 /* 4611 */ MCD_OPC_Decode, 157, 17, 96, // Opcode: VSUBfd /* 4615 */ MCD_OPC_FilterValue, 1, 224, 38, // Skip to: 14571 /* 4619 */ MCD_OPC_CheckPredicate, 16, 220, 38, // Skip to: 14571 /* 4623 */ MCD_OPC_Decode, 158, 17, 97, // Opcode: VSUBfq /* 4627 */ MCD_OPC_FilterValue, 229, 3, 27, 0, // Skip to: 4659 /* 4632 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4635 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4647 /* 4639 */ MCD_OPC_CheckPredicate, 16, 200, 38, // Skip to: 14571 /* 4643 */ MCD_OPC_Decode, 128, 12, 98, // Opcode: VQDMULLv2i64 /* 4647 */ MCD_OPC_FilterValue, 1, 192, 38, // Skip to: 14571 /* 4651 */ MCD_OPC_CheckPredicate, 16, 188, 38, // Skip to: 14571 /* 4655 */ MCD_OPC_Decode, 145, 12, 115, // Opcode: VQRDMULHslv2i32 /* 4659 */ MCD_OPC_FilterValue, 230, 3, 27, 0, // Skip to: 4691 /* 4664 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4667 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4679 /* 4671 */ MCD_OPC_CheckPredicate, 16, 168, 38, // Skip to: 14571 /* 4675 */ MCD_OPC_Decode, 164, 4, 96, // Opcode: VABDfd /* 4679 */ MCD_OPC_FilterValue, 1, 160, 38, // Skip to: 14571 /* 4683 */ MCD_OPC_CheckPredicate, 16, 156, 38, // Skip to: 14571 /* 4687 */ MCD_OPC_Decode, 165, 4, 97, // Opcode: VABDfq /* 4691 */ MCD_OPC_FilterValue, 231, 3, 147, 38, // Skip to: 14571 /* 4696 */ MCD_OPC_CheckPredicate, 16, 143, 38, // Skip to: 14571 /* 4700 */ MCD_OPC_CheckField, 6, 1, 1, 137, 38, // Skip to: 14571 /* 4706 */ MCD_OPC_Decode, 147, 12, 116, // Opcode: VQRDMULHslv4i32 /* 4710 */ MCD_OPC_FilterValue, 14, 55, 0, // Skip to: 4769 /* 4714 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4717 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 4750 /* 4721 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4724 */ MCD_OPC_FilterValue, 229, 3, 8, 0, // Skip to: 4737 /* 4729 */ MCD_OPC_CheckPredicate, 17, 110, 38, // Skip to: 14571 /* 4733 */ MCD_OPC_Decode, 243, 10, 98, // Opcode: VMULLp64 /* 4737 */ MCD_OPC_FilterValue, 230, 3, 101, 38, // Skip to: 14571 /* 4742 */ MCD_OPC_CheckPredicate, 16, 97, 38, // Skip to: 14571 /* 4746 */ MCD_OPC_Decode, 143, 5, 96, // Opcode: VCGTfd /* 4750 */ MCD_OPC_FilterValue, 1, 89, 38, // Skip to: 14571 /* 4754 */ MCD_OPC_CheckPredicate, 16, 85, 38, // Skip to: 14571 /* 4758 */ MCD_OPC_CheckField, 23, 9, 230, 3, 78, 38, // Skip to: 14571 /* 4765 */ MCD_OPC_Decode, 144, 5, 97, // Opcode: VCGTfq /* 4769 */ MCD_OPC_FilterValue, 15, 70, 38, // Skip to: 14571 /* 4773 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4776 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 4809 /* 4780 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4783 */ MCD_OPC_FilterValue, 228, 3, 8, 0, // Skip to: 4796 /* 4788 */ MCD_OPC_CheckPredicate, 16, 51, 38, // Skip to: 14571 /* 4792 */ MCD_OPC_Decode, 132, 10, 96, // Opcode: VMINfd /* 4796 */ MCD_OPC_FilterValue, 230, 3, 42, 38, // Skip to: 14571 /* 4801 */ MCD_OPC_CheckPredicate, 16, 38, 38, // Skip to: 14571 /* 4805 */ MCD_OPC_Decode, 209, 11, 96, // Opcode: VPMINf /* 4809 */ MCD_OPC_FilterValue, 1, 30, 38, // Skip to: 14571 /* 4813 */ MCD_OPC_CheckPredicate, 16, 26, 38, // Skip to: 14571 /* 4817 */ MCD_OPC_CheckField, 23, 9, 228, 3, 19, 38, // Skip to: 14571 /* 4824 */ MCD_OPC_Decode, 133, 10, 97, // Opcode: VMINfq /* 4828 */ MCD_OPC_FilterValue, 3, 11, 38, // Skip to: 14571 /* 4832 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4835 */ MCD_OPC_FilterValue, 228, 3, 96, 0, // Skip to: 4936 /* 4840 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 4843 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 4874 /* 4847 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4850 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4862 /* 4854 */ MCD_OPC_CheckPredicate, 16, 241, 37, // Skip to: 14571 /* 4858 */ MCD_OPC_Decode, 135, 14, 100, // Opcode: VSHLsv1i64 /* 4862 */ MCD_OPC_FilterValue, 1, 233, 37, // Skip to: 14571 /* 4866 */ MCD_OPC_CheckPredicate, 16, 229, 37, // Skip to: 14571 /* 4870 */ MCD_OPC_Decode, 137, 14, 101, // Opcode: VSHLsv2i64 /* 4874 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 4905 /* 4878 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4881 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4893 /* 4885 */ MCD_OPC_CheckPredicate, 16, 210, 37, // Skip to: 14571 /* 4889 */ MCD_OPC_Decode, 175, 13, 100, // Opcode: VRSHLsv1i64 /* 4893 */ MCD_OPC_FilterValue, 1, 202, 37, // Skip to: 14571 /* 4897 */ MCD_OPC_CheckPredicate, 16, 198, 37, // Skip to: 14571 /* 4901 */ MCD_OPC_Decode, 177, 13, 101, // Opcode: VRSHLsv2i64 /* 4905 */ MCD_OPC_FilterValue, 8, 190, 37, // Skip to: 14571 /* 4909 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4912 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4924 /* 4916 */ MCD_OPC_CheckPredicate, 16, 179, 37, // Skip to: 14571 /* 4920 */ MCD_OPC_Decode, 212, 4, 96, // Opcode: VADDv1i64 /* 4924 */ MCD_OPC_FilterValue, 1, 171, 37, // Skip to: 14571 /* 4928 */ MCD_OPC_CheckPredicate, 16, 167, 37, // Skip to: 14571 /* 4932 */ MCD_OPC_Decode, 214, 4, 97, // Opcode: VADDv2i64 /* 4936 */ MCD_OPC_FilterValue, 229, 3, 104, 0, // Skip to: 5045 /* 4941 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4944 */ MCD_OPC_FilterValue, 0, 43, 0, // Skip to: 4991 /* 4948 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 4951 */ MCD_OPC_FilterValue, 0, 144, 37, // Skip to: 14571 /* 4955 */ MCD_OPC_CheckPredicate, 16, 10, 0, // Skip to: 4969 /* 4959 */ MCD_OPC_CheckField, 8, 2, 0, 4, 0, // Skip to: 4969 /* 4965 */ MCD_OPC_Decode, 152, 6, 118, // Opcode: VEXTd32 /* 4969 */ MCD_OPC_CheckPredicate, 16, 10, 0, // Skip to: 4983 /* 4973 */ MCD_OPC_CheckField, 8, 1, 0, 4, 0, // Skip to: 4983 /* 4979 */ MCD_OPC_Decode, 151, 6, 119, // Opcode: VEXTd16 /* 4983 */ MCD_OPC_CheckPredicate, 16, 112, 37, // Skip to: 14571 /* 4987 */ MCD_OPC_Decode, 153, 6, 120, // Opcode: VEXTd8 /* 4991 */ MCD_OPC_FilterValue, 1, 104, 37, // Skip to: 14571 /* 4995 */ MCD_OPC_CheckPredicate, 16, 10, 0, // Skip to: 5009 /* 4999 */ MCD_OPC_CheckField, 8, 3, 0, 4, 0, // Skip to: 5009 /* 5005 */ MCD_OPC_Decode, 156, 6, 121, // Opcode: VEXTq64 /* 5009 */ MCD_OPC_CheckPredicate, 16, 10, 0, // Skip to: 5023 /* 5013 */ MCD_OPC_CheckField, 8, 2, 0, 4, 0, // Skip to: 5023 /* 5019 */ MCD_OPC_Decode, 155, 6, 122, // Opcode: VEXTq32 /* 5023 */ MCD_OPC_CheckPredicate, 16, 10, 0, // Skip to: 5037 /* 5027 */ MCD_OPC_CheckField, 8, 1, 0, 4, 0, // Skip to: 5037 /* 5033 */ MCD_OPC_Decode, 154, 6, 123, // Opcode: VEXTq16 /* 5037 */ MCD_OPC_CheckPredicate, 16, 58, 37, // Skip to: 14571 /* 5041 */ MCD_OPC_Decode, 157, 6, 124, // Opcode: VEXTq8 /* 5045 */ MCD_OPC_FilterValue, 230, 3, 96, 0, // Skip to: 5146 /* 5050 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 5053 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 5084 /* 5057 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 5060 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5072 /* 5064 */ MCD_OPC_CheckPredicate, 16, 31, 37, // Skip to: 14571 /* 5068 */ MCD_OPC_Decode, 143, 14, 100, // Opcode: VSHLuv1i64 /* 5072 */ MCD_OPC_FilterValue, 1, 23, 37, // Skip to: 14571 /* 5076 */ MCD_OPC_CheckPredicate, 16, 19, 37, // Skip to: 14571 /* 5080 */ MCD_OPC_Decode, 145, 14, 101, // Opcode: VSHLuv2i64 /* 5084 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 5115 /* 5088 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 5091 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5103 /* 5095 */ MCD_OPC_CheckPredicate, 16, 0, 37, // Skip to: 14571 /* 5099 */ MCD_OPC_Decode, 183, 13, 100, // Opcode: VRSHLuv1i64 /* 5103 */ MCD_OPC_FilterValue, 1, 248, 36, // Skip to: 14571 /* 5107 */ MCD_OPC_CheckPredicate, 16, 244, 36, // Skip to: 14571 /* 5111 */ MCD_OPC_Decode, 185, 13, 101, // Opcode: VRSHLuv2i64 /* 5115 */ MCD_OPC_FilterValue, 8, 236, 36, // Skip to: 14571 /* 5119 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 5122 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5134 /* 5126 */ MCD_OPC_CheckPredicate, 16, 225, 36, // Skip to: 14571 /* 5130 */ MCD_OPC_Decode, 160, 17, 96, // Opcode: VSUBv1i64 /* 5134 */ MCD_OPC_FilterValue, 1, 217, 36, // Skip to: 14571 /* 5138 */ MCD_OPC_CheckPredicate, 16, 213, 36, // Skip to: 14571 /* 5142 */ MCD_OPC_Decode, 162, 17, 97, // Opcode: VSUBv2i64 /* 5146 */ MCD_OPC_FilterValue, 231, 3, 204, 36, // Skip to: 14571 /* 5151 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 5154 */ MCD_OPC_FilterValue, 0, 174, 1, // Skip to: 5588 /* 5158 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 5161 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 5216 /* 5165 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5168 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5180 /* 5172 */ MCD_OPC_CheckPredicate, 16, 179, 36, // Skip to: 14571 /* 5176 */ MCD_OPC_Decode, 132, 13, 125, // Opcode: VREV64d8 /* 5180 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5192 /* 5184 */ MCD_OPC_CheckPredicate, 16, 167, 36, // Skip to: 14571 /* 5188 */ MCD_OPC_Decode, 135, 13, 126, // Opcode: VREV64q8 /* 5192 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5204 /* 5196 */ MCD_OPC_CheckPredicate, 16, 155, 36, // Skip to: 14571 /* 5200 */ MCD_OPC_Decode, 255, 12, 125, // Opcode: VREV32d8 /* 5204 */ MCD_OPC_FilterValue, 3, 147, 36, // Skip to: 14571 /* 5208 */ MCD_OPC_CheckPredicate, 16, 143, 36, // Skip to: 14571 /* 5212 */ MCD_OPC_Decode, 129, 13, 126, // Opcode: VREV32q8 /* 5216 */ MCD_OPC_FilterValue, 1, 51, 0, // Skip to: 5271 /* 5220 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5223 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5235 /* 5227 */ MCD_OPC_CheckPredicate, 16, 124, 36, // Skip to: 14571 /* 5231 */ MCD_OPC_Decode, 164, 5, 125, // Opcode: VCGTzv8i8 /* 5235 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5247 /* 5239 */ MCD_OPC_CheckPredicate, 16, 112, 36, // Skip to: 14571 /* 5243 */ MCD_OPC_Decode, 157, 5, 126, // Opcode: VCGTzv16i8 /* 5247 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5259 /* 5251 */ MCD_OPC_CheckPredicate, 16, 100, 36, // Skip to: 14571 /* 5255 */ MCD_OPC_Decode, 142, 5, 125, // Opcode: VCGEzv8i8 /* 5259 */ MCD_OPC_FilterValue, 3, 92, 36, // Skip to: 14571 /* 5263 */ MCD_OPC_CheckPredicate, 16, 88, 36, // Skip to: 14571 /* 5267 */ MCD_OPC_Decode, 135, 5, 126, // Opcode: VCGEzv16i8 /* 5271 */ MCD_OPC_FilterValue, 2, 53, 0, // Skip to: 5328 /* 5275 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5278 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5290 /* 5282 */ MCD_OPC_CheckPredicate, 16, 69, 36, // Skip to: 14571 /* 5286 */ MCD_OPC_Decode, 167, 17, 127, // Opcode: VSWPd /* 5290 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 5303 /* 5294 */ MCD_OPC_CheckPredicate, 16, 57, 36, // Skip to: 14571 /* 5298 */ MCD_OPC_Decode, 168, 17, 128, 1, // Opcode: VSWPq /* 5303 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5315 /* 5307 */ MCD_OPC_CheckPredicate, 16, 44, 36, // Skip to: 14571 /* 5311 */ MCD_OPC_Decode, 199, 17, 127, // Opcode: VTRNd8 /* 5315 */ MCD_OPC_FilterValue, 3, 36, 36, // Skip to: 14571 /* 5319 */ MCD_OPC_CheckPredicate, 16, 32, 36, // Skip to: 14571 /* 5323 */ MCD_OPC_Decode, 202, 17, 128, 1, // Opcode: VTRNq8 /* 5328 */ MCD_OPC_FilterValue, 4, 51, 0, // Skip to: 5383 /* 5332 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5335 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5347 /* 5339 */ MCD_OPC_CheckPredicate, 16, 12, 36, // Skip to: 14571 /* 5343 */ MCD_OPC_Decode, 130, 13, 125, // Opcode: VREV64d16 /* 5347 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5359 /* 5351 */ MCD_OPC_CheckPredicate, 16, 0, 36, // Skip to: 14571 /* 5355 */ MCD_OPC_Decode, 133, 13, 126, // Opcode: VREV64q16 /* 5359 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5371 /* 5363 */ MCD_OPC_CheckPredicate, 16, 244, 35, // Skip to: 14571 /* 5367 */ MCD_OPC_Decode, 254, 12, 125, // Opcode: VREV32d16 /* 5371 */ MCD_OPC_FilterValue, 3, 236, 35, // Skip to: 14571 /* 5375 */ MCD_OPC_CheckPredicate, 16, 232, 35, // Skip to: 14571 /* 5379 */ MCD_OPC_Decode, 128, 13, 126, // Opcode: VREV32q16 /* 5383 */ MCD_OPC_FilterValue, 5, 51, 0, // Skip to: 5438 /* 5387 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5390 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5402 /* 5394 */ MCD_OPC_CheckPredicate, 16, 213, 35, // Skip to: 14571 /* 5398 */ MCD_OPC_Decode, 161, 5, 125, // Opcode: VCGTzv4i16 /* 5402 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5414 /* 5406 */ MCD_OPC_CheckPredicate, 16, 201, 35, // Skip to: 14571 /* 5410 */ MCD_OPC_Decode, 163, 5, 126, // Opcode: VCGTzv8i16 /* 5414 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5426 /* 5418 */ MCD_OPC_CheckPredicate, 16, 189, 35, // Skip to: 14571 /* 5422 */ MCD_OPC_Decode, 139, 5, 125, // Opcode: VCGEzv4i16 /* 5426 */ MCD_OPC_FilterValue, 3, 181, 35, // Skip to: 14571 /* 5430 */ MCD_OPC_CheckPredicate, 16, 177, 35, // Skip to: 14571 /* 5434 */ MCD_OPC_Decode, 141, 5, 126, // Opcode: VCGEzv8i16 /* 5438 */ MCD_OPC_FilterValue, 6, 28, 0, // Skip to: 5470 /* 5442 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5445 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5457 /* 5449 */ MCD_OPC_CheckPredicate, 16, 158, 35, // Skip to: 14571 /* 5453 */ MCD_OPC_Decode, 197, 17, 127, // Opcode: VTRNd16 /* 5457 */ MCD_OPC_FilterValue, 3, 150, 35, // Skip to: 14571 /* 5461 */ MCD_OPC_CheckPredicate, 16, 146, 35, // Skip to: 14571 /* 5465 */ MCD_OPC_Decode, 200, 17, 128, 1, // Opcode: VTRNq16 /* 5470 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 5501 /* 5474 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5477 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5489 /* 5481 */ MCD_OPC_CheckPredicate, 16, 126, 35, // Skip to: 14571 /* 5485 */ MCD_OPC_Decode, 131, 13, 125, // Opcode: VREV64d32 /* 5489 */ MCD_OPC_FilterValue, 1, 118, 35, // Skip to: 14571 /* 5493 */ MCD_OPC_CheckPredicate, 16, 114, 35, // Skip to: 14571 /* 5497 */ MCD_OPC_Decode, 134, 13, 126, // Opcode: VREV64q32 /* 5501 */ MCD_OPC_FilterValue, 9, 51, 0, // Skip to: 5556 /* 5505 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5508 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5520 /* 5512 */ MCD_OPC_CheckPredicate, 16, 95, 35, // Skip to: 14571 /* 5516 */ MCD_OPC_Decode, 159, 5, 125, // Opcode: VCGTzv2i32 /* 5520 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5532 /* 5524 */ MCD_OPC_CheckPredicate, 16, 83, 35, // Skip to: 14571 /* 5528 */ MCD_OPC_Decode, 162, 5, 126, // Opcode: VCGTzv4i32 /* 5532 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5544 /* 5536 */ MCD_OPC_CheckPredicate, 16, 71, 35, // Skip to: 14571 /* 5540 */ MCD_OPC_Decode, 137, 5, 125, // Opcode: VCGEzv2i32 /* 5544 */ MCD_OPC_FilterValue, 3, 63, 35, // Skip to: 14571 /* 5548 */ MCD_OPC_CheckPredicate, 16, 59, 35, // Skip to: 14571 /* 5552 */ MCD_OPC_Decode, 140, 5, 126, // Opcode: VCGEzv4i32 /* 5556 */ MCD_OPC_FilterValue, 10, 51, 35, // Skip to: 14571 /* 5560 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5563 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5575 /* 5567 */ MCD_OPC_CheckPredicate, 16, 40, 35, // Skip to: 14571 /* 5571 */ MCD_OPC_Decode, 198, 17, 127, // Opcode: VTRNd32 /* 5575 */ MCD_OPC_FilterValue, 3, 32, 35, // Skip to: 14571 /* 5579 */ MCD_OPC_CheckPredicate, 16, 28, 35, // Skip to: 14571 /* 5583 */ MCD_OPC_Decode, 201, 17, 128, 1, // Opcode: VTRNq32 /* 5588 */ MCD_OPC_FilterValue, 1, 90, 1, // Skip to: 5938 /* 5592 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 5595 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5626 /* 5599 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5602 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5614 /* 5606 */ MCD_OPC_CheckPredicate, 16, 1, 35, // Skip to: 14571 /* 5610 */ MCD_OPC_Decode, 252, 12, 125, // Opcode: VREV16d8 /* 5614 */ MCD_OPC_FilterValue, 1, 249, 34, // Skip to: 14571 /* 5618 */ MCD_OPC_CheckPredicate, 16, 245, 34, // Skip to: 14571 /* 5622 */ MCD_OPC_Decode, 253, 12, 126, // Opcode: VREV16q8 /* 5626 */ MCD_OPC_FilterValue, 1, 51, 0, // Skip to: 5681 /* 5630 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5633 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5645 /* 5637 */ MCD_OPC_CheckPredicate, 16, 226, 34, // Skip to: 14571 /* 5641 */ MCD_OPC_Decode, 248, 4, 125, // Opcode: VCEQzv8i8 /* 5645 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5657 /* 5649 */ MCD_OPC_CheckPredicate, 16, 214, 34, // Skip to: 14571 /* 5653 */ MCD_OPC_Decode, 241, 4, 126, // Opcode: VCEQzv16i8 /* 5657 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5669 /* 5661 */ MCD_OPC_CheckPredicate, 16, 202, 34, // Skip to: 14571 /* 5665 */ MCD_OPC_Decode, 172, 5, 125, // Opcode: VCLEzv8i8 /* 5669 */ MCD_OPC_FilterValue, 3, 194, 34, // Skip to: 14571 /* 5673 */ MCD_OPC_CheckPredicate, 16, 190, 34, // Skip to: 14571 /* 5677 */ MCD_OPC_Decode, 165, 5, 126, // Opcode: VCLEzv16i8 /* 5681 */ MCD_OPC_FilterValue, 2, 53, 0, // Skip to: 5738 /* 5685 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5688 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5700 /* 5692 */ MCD_OPC_CheckPredicate, 16, 171, 34, // Skip to: 14571 /* 5696 */ MCD_OPC_Decode, 216, 17, 127, // Opcode: VUZPd8 /* 5700 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 5713 /* 5704 */ MCD_OPC_CheckPredicate, 16, 159, 34, // Skip to: 14571 /* 5708 */ MCD_OPC_Decode, 219, 17, 128, 1, // Opcode: VUZPq8 /* 5713 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5725 /* 5717 */ MCD_OPC_CheckPredicate, 16, 146, 34, // Skip to: 14571 /* 5721 */ MCD_OPC_Decode, 221, 17, 127, // Opcode: VZIPd8 /* 5725 */ MCD_OPC_FilterValue, 3, 138, 34, // Skip to: 14571 /* 5729 */ MCD_OPC_CheckPredicate, 16, 134, 34, // Skip to: 14571 /* 5733 */ MCD_OPC_Decode, 224, 17, 128, 1, // Opcode: VZIPq8 /* 5738 */ MCD_OPC_FilterValue, 5, 51, 0, // Skip to: 5793 /* 5742 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5745 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5757 /* 5749 */ MCD_OPC_CheckPredicate, 16, 114, 34, // Skip to: 14571 /* 5753 */ MCD_OPC_Decode, 245, 4, 125, // Opcode: VCEQzv4i16 /* 5757 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5769 /* 5761 */ MCD_OPC_CheckPredicate, 16, 102, 34, // Skip to: 14571 /* 5765 */ MCD_OPC_Decode, 247, 4, 126, // Opcode: VCEQzv8i16 /* 5769 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5781 /* 5773 */ MCD_OPC_CheckPredicate, 16, 90, 34, // Skip to: 14571 /* 5777 */ MCD_OPC_Decode, 169, 5, 125, // Opcode: VCLEzv4i16 /* 5781 */ MCD_OPC_FilterValue, 3, 82, 34, // Skip to: 14571 /* 5785 */ MCD_OPC_CheckPredicate, 16, 78, 34, // Skip to: 14571 /* 5789 */ MCD_OPC_Decode, 171, 5, 126, // Opcode: VCLEzv8i16 /* 5793 */ MCD_OPC_FilterValue, 6, 53, 0, // Skip to: 5850 /* 5797 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5800 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5812 /* 5804 */ MCD_OPC_CheckPredicate, 16, 59, 34, // Skip to: 14571 /* 5808 */ MCD_OPC_Decode, 215, 17, 127, // Opcode: VUZPd16 /* 5812 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 5825 /* 5816 */ MCD_OPC_CheckPredicate, 16, 47, 34, // Skip to: 14571 /* 5820 */ MCD_OPC_Decode, 217, 17, 128, 1, // Opcode: VUZPq16 /* 5825 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5837 /* 5829 */ MCD_OPC_CheckPredicate, 16, 34, 34, // Skip to: 14571 /* 5833 */ MCD_OPC_Decode, 220, 17, 127, // Opcode: VZIPd16 /* 5837 */ MCD_OPC_FilterValue, 3, 26, 34, // Skip to: 14571 /* 5841 */ MCD_OPC_CheckPredicate, 16, 22, 34, // Skip to: 14571 /* 5845 */ MCD_OPC_Decode, 222, 17, 128, 1, // Opcode: VZIPq16 /* 5850 */ MCD_OPC_FilterValue, 9, 51, 0, // Skip to: 5905 /* 5854 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5857 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5869 /* 5861 */ MCD_OPC_CheckPredicate, 16, 2, 34, // Skip to: 14571 /* 5865 */ MCD_OPC_Decode, 243, 4, 125, // Opcode: VCEQzv2i32 /* 5869 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5881 /* 5873 */ MCD_OPC_CheckPredicate, 16, 246, 33, // Skip to: 14571 /* 5877 */ MCD_OPC_Decode, 246, 4, 126, // Opcode: VCEQzv4i32 /* 5881 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5893 /* 5885 */ MCD_OPC_CheckPredicate, 16, 234, 33, // Skip to: 14571 /* 5889 */ MCD_OPC_Decode, 167, 5, 125, // Opcode: VCLEzv2i32 /* 5893 */ MCD_OPC_FilterValue, 3, 226, 33, // Skip to: 14571 /* 5897 */ MCD_OPC_CheckPredicate, 16, 222, 33, // Skip to: 14571 /* 5901 */ MCD_OPC_Decode, 170, 5, 126, // Opcode: VCLEzv4i32 /* 5905 */ MCD_OPC_FilterValue, 10, 214, 33, // Skip to: 14571 /* 5909 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5912 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 5925 /* 5916 */ MCD_OPC_CheckPredicate, 16, 203, 33, // Skip to: 14571 /* 5920 */ MCD_OPC_Decode, 218, 17, 128, 1, // Opcode: VUZPq32 /* 5925 */ MCD_OPC_FilterValue, 3, 194, 33, // Skip to: 14571 /* 5929 */ MCD_OPC_CheckPredicate, 16, 190, 33, // Skip to: 14571 /* 5933 */ MCD_OPC_Decode, 223, 17, 128, 1, // Opcode: VZIPq32 /* 5938 */ MCD_OPC_FilterValue, 2, 182, 1, // Skip to: 6380 /* 5942 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 5945 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 6000 /* 5949 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 5952 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5964 /* 5956 */ MCD_OPC_CheckPredicate, 16, 163, 33, // Skip to: 14571 /* 5960 */ MCD_OPC_Decode, 191, 11, 125, // Opcode: VPADDLsv8i8 /* 5964 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5976 /* 5968 */ MCD_OPC_CheckPredicate, 16, 151, 33, // Skip to: 14571 /* 5972 */ MCD_OPC_Decode, 186, 11, 126, // Opcode: VPADDLsv16i8 /* 5976 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5988 /* 5980 */ MCD_OPC_CheckPredicate, 16, 139, 33, // Skip to: 14571 /* 5984 */ MCD_OPC_Decode, 197, 11, 125, // Opcode: VPADDLuv8i8 /* 5988 */ MCD_OPC_FilterValue, 3, 131, 33, // Skip to: 14571 /* 5992 */ MCD_OPC_CheckPredicate, 16, 127, 33, // Skip to: 14571 /* 5996 */ MCD_OPC_Decode, 192, 11, 126, // Opcode: VPADDLuv16i8 /* 6000 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 6031 /* 6004 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6007 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6019 /* 6011 */ MCD_OPC_CheckPredicate, 16, 108, 33, // Skip to: 14571 /* 6015 */ MCD_OPC_Decode, 186, 5, 125, // Opcode: VCLTzv8i8 /* 6019 */ MCD_OPC_FilterValue, 1, 100, 33, // Skip to: 14571 /* 6023 */ MCD_OPC_CheckPredicate, 16, 96, 33, // Skip to: 14571 /* 6027 */ MCD_OPC_Decode, 179, 5, 126, // Opcode: VCLTzv16i8 /* 6031 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 6090 /* 6035 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6038 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6051 /* 6042 */ MCD_OPC_CheckPredicate, 16, 77, 33, // Skip to: 14571 /* 6046 */ MCD_OPC_Decode, 210, 10, 129, 1, // Opcode: VMOVNv8i8 /* 6051 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 6064 /* 6055 */ MCD_OPC_CheckPredicate, 16, 64, 33, // Skip to: 14571 /* 6059 */ MCD_OPC_Decode, 132, 12, 129, 1, // Opcode: VQMOVNsuv8i8 /* 6064 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 6077 /* 6068 */ MCD_OPC_CheckPredicate, 16, 51, 33, // Skip to: 14571 /* 6072 */ MCD_OPC_Decode, 135, 12, 129, 1, // Opcode: VQMOVNsv8i8 /* 6077 */ MCD_OPC_FilterValue, 3, 42, 33, // Skip to: 14571 /* 6081 */ MCD_OPC_CheckPredicate, 16, 38, 33, // Skip to: 14571 /* 6085 */ MCD_OPC_Decode, 138, 12, 129, 1, // Opcode: VQMOVNuv8i8 /* 6090 */ MCD_OPC_FilterValue, 4, 51, 0, // Skip to: 6145 /* 6094 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6097 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6109 /* 6101 */ MCD_OPC_CheckPredicate, 16, 18, 33, // Skip to: 14571 /* 6105 */ MCD_OPC_Decode, 188, 11, 125, // Opcode: VPADDLsv4i16 /* 6109 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6121 /* 6113 */ MCD_OPC_CheckPredicate, 16, 6, 33, // Skip to: 14571 /* 6117 */ MCD_OPC_Decode, 190, 11, 126, // Opcode: VPADDLsv8i16 /* 6121 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6133 /* 6125 */ MCD_OPC_CheckPredicate, 16, 250, 32, // Skip to: 14571 /* 6129 */ MCD_OPC_Decode, 194, 11, 125, // Opcode: VPADDLuv4i16 /* 6133 */ MCD_OPC_FilterValue, 3, 242, 32, // Skip to: 14571 /* 6137 */ MCD_OPC_CheckPredicate, 16, 238, 32, // Skip to: 14571 /* 6141 */ MCD_OPC_Decode, 196, 11, 126, // Opcode: VPADDLuv8i16 /* 6145 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 6176 /* 6149 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6152 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6164 /* 6156 */ MCD_OPC_CheckPredicate, 16, 219, 32, // Skip to: 14571 /* 6160 */ MCD_OPC_Decode, 183, 5, 125, // Opcode: VCLTzv4i16 /* 6164 */ MCD_OPC_FilterValue, 1, 211, 32, // Skip to: 14571 /* 6168 */ MCD_OPC_CheckPredicate, 16, 207, 32, // Skip to: 14571 /* 6172 */ MCD_OPC_Decode, 185, 5, 126, // Opcode: VCLTzv8i16 /* 6176 */ MCD_OPC_FilterValue, 6, 55, 0, // Skip to: 6235 /* 6180 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6183 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6196 /* 6187 */ MCD_OPC_CheckPredicate, 16, 188, 32, // Skip to: 14571 /* 6191 */ MCD_OPC_Decode, 209, 10, 129, 1, // Opcode: VMOVNv4i16 /* 6196 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 6209 /* 6200 */ MCD_OPC_CheckPredicate, 16, 175, 32, // Skip to: 14571 /* 6204 */ MCD_OPC_Decode, 131, 12, 129, 1, // Opcode: VQMOVNsuv4i16 /* 6209 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 6222 /* 6213 */ MCD_OPC_CheckPredicate, 16, 162, 32, // Skip to: 14571 /* 6217 */ MCD_OPC_Decode, 134, 12, 129, 1, // Opcode: VQMOVNsv4i16 /* 6222 */ MCD_OPC_FilterValue, 3, 153, 32, // Skip to: 14571 /* 6226 */ MCD_OPC_CheckPredicate, 16, 149, 32, // Skip to: 14571 /* 6230 */ MCD_OPC_Decode, 137, 12, 129, 1, // Opcode: VQMOVNuv4i16 /* 6235 */ MCD_OPC_FilterValue, 8, 51, 0, // Skip to: 6290 /* 6239 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6242 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6254 /* 6246 */ MCD_OPC_CheckPredicate, 16, 129, 32, // Skip to: 14571 /* 6250 */ MCD_OPC_Decode, 187, 11, 125, // Opcode: VPADDLsv2i32 /* 6254 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6266 /* 6258 */ MCD_OPC_CheckPredicate, 16, 117, 32, // Skip to: 14571 /* 6262 */ MCD_OPC_Decode, 189, 11, 126, // Opcode: VPADDLsv4i32 /* 6266 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6278 /* 6270 */ MCD_OPC_CheckPredicate, 16, 105, 32, // Skip to: 14571 /* 6274 */ MCD_OPC_Decode, 193, 11, 125, // Opcode: VPADDLuv2i32 /* 6278 */ MCD_OPC_FilterValue, 3, 97, 32, // Skip to: 14571 /* 6282 */ MCD_OPC_CheckPredicate, 16, 93, 32, // Skip to: 14571 /* 6286 */ MCD_OPC_Decode, 195, 11, 126, // Opcode: VPADDLuv4i32 /* 6290 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 6321 /* 6294 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6297 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6309 /* 6301 */ MCD_OPC_CheckPredicate, 16, 74, 32, // Skip to: 14571 /* 6305 */ MCD_OPC_Decode, 181, 5, 125, // Opcode: VCLTzv2i32 /* 6309 */ MCD_OPC_FilterValue, 1, 66, 32, // Skip to: 14571 /* 6313 */ MCD_OPC_CheckPredicate, 16, 62, 32, // Skip to: 14571 /* 6317 */ MCD_OPC_Decode, 184, 5, 126, // Opcode: VCLTzv4i32 /* 6321 */ MCD_OPC_FilterValue, 10, 54, 32, // Skip to: 14571 /* 6325 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6328 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6341 /* 6332 */ MCD_OPC_CheckPredicate, 16, 43, 32, // Skip to: 14571 /* 6336 */ MCD_OPC_Decode, 208, 10, 129, 1, // Opcode: VMOVNv2i32 /* 6341 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 6354 /* 6345 */ MCD_OPC_CheckPredicate, 16, 30, 32, // Skip to: 14571 /* 6349 */ MCD_OPC_Decode, 130, 12, 129, 1, // Opcode: VQMOVNsuv2i32 /* 6354 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 6367 /* 6358 */ MCD_OPC_CheckPredicate, 16, 17, 32, // Skip to: 14571 /* 6362 */ MCD_OPC_Decode, 133, 12, 129, 1, // Opcode: VQMOVNsv2i32 /* 6367 */ MCD_OPC_FilterValue, 3, 8, 32, // Skip to: 14571 /* 6371 */ MCD_OPC_CheckPredicate, 16, 4, 32, // Skip to: 14571 /* 6375 */ MCD_OPC_Decode, 136, 12, 129, 1, // Opcode: VQMOVNuv2i32 /* 6380 */ MCD_OPC_FilterValue, 3, 225, 0, // Skip to: 6609 /* 6384 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 6387 */ MCD_OPC_FilterValue, 1, 51, 0, // Skip to: 6442 /* 6391 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6394 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6406 /* 6398 */ MCD_OPC_CheckPredicate, 16, 233, 31, // Skip to: 14571 /* 6402 */ MCD_OPC_Decode, 187, 4, 125, // Opcode: VABSv8i8 /* 6406 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6418 /* 6410 */ MCD_OPC_CheckPredicate, 16, 221, 31, // Skip to: 14571 /* 6414 */ MCD_OPC_Decode, 182, 4, 126, // Opcode: VABSv16i8 /* 6418 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6430 /* 6422 */ MCD_OPC_CheckPredicate, 16, 209, 31, // Skip to: 14571 /* 6426 */ MCD_OPC_Decode, 158, 11, 125, // Opcode: VNEGs8d /* 6430 */ MCD_OPC_FilterValue, 3, 201, 31, // Skip to: 14571 /* 6434 */ MCD_OPC_CheckPredicate, 16, 197, 31, // Skip to: 14571 /* 6438 */ MCD_OPC_Decode, 159, 11, 126, // Opcode: VNEGs8q /* 6442 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 6461 /* 6446 */ MCD_OPC_CheckPredicate, 16, 185, 31, // Skip to: 14571 /* 6450 */ MCD_OPC_CheckField, 6, 2, 0, 179, 31, // Skip to: 14571 /* 6456 */ MCD_OPC_Decode, 247, 13, 130, 1, // Opcode: VSHLLi8 /* 6461 */ MCD_OPC_FilterValue, 5, 51, 0, // Skip to: 6516 /* 6465 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6468 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6480 /* 6472 */ MCD_OPC_CheckPredicate, 16, 159, 31, // Skip to: 14571 /* 6476 */ MCD_OPC_Decode, 184, 4, 125, // Opcode: VABSv4i16 /* 6480 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6492 /* 6484 */ MCD_OPC_CheckPredicate, 16, 147, 31, // Skip to: 14571 /* 6488 */ MCD_OPC_Decode, 186, 4, 126, // Opcode: VABSv8i16 /* 6492 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6504 /* 6496 */ MCD_OPC_CheckPredicate, 16, 135, 31, // Skip to: 14571 /* 6500 */ MCD_OPC_Decode, 154, 11, 125, // Opcode: VNEGs16d /* 6504 */ MCD_OPC_FilterValue, 3, 127, 31, // Skip to: 14571 /* 6508 */ MCD_OPC_CheckPredicate, 16, 123, 31, // Skip to: 14571 /* 6512 */ MCD_OPC_Decode, 155, 11, 126, // Opcode: VNEGs16q /* 6516 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 6535 /* 6520 */ MCD_OPC_CheckPredicate, 16, 111, 31, // Skip to: 14571 /* 6524 */ MCD_OPC_CheckField, 6, 2, 0, 105, 31, // Skip to: 14571 /* 6530 */ MCD_OPC_Decode, 245, 13, 130, 1, // Opcode: VSHLLi16 /* 6535 */ MCD_OPC_FilterValue, 9, 51, 0, // Skip to: 6590 /* 6539 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6542 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6554 /* 6546 */ MCD_OPC_CheckPredicate, 16, 85, 31, // Skip to: 14571 /* 6550 */ MCD_OPC_Decode, 183, 4, 125, // Opcode: VABSv2i32 /* 6554 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6566 /* 6558 */ MCD_OPC_CheckPredicate, 16, 73, 31, // Skip to: 14571 /* 6562 */ MCD_OPC_Decode, 185, 4, 126, // Opcode: VABSv4i32 /* 6566 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6578 /* 6570 */ MCD_OPC_CheckPredicate, 16, 61, 31, // Skip to: 14571 /* 6574 */ MCD_OPC_Decode, 156, 11, 125, // Opcode: VNEGs32d /* 6578 */ MCD_OPC_FilterValue, 3, 53, 31, // Skip to: 14571 /* 6582 */ MCD_OPC_CheckPredicate, 16, 49, 31, // Skip to: 14571 /* 6586 */ MCD_OPC_Decode, 157, 11, 126, // Opcode: VNEGs32q /* 6590 */ MCD_OPC_FilterValue, 10, 41, 31, // Skip to: 14571 /* 6594 */ MCD_OPC_CheckPredicate, 16, 37, 31, // Skip to: 14571 /* 6598 */ MCD_OPC_CheckField, 6, 2, 0, 31, 31, // Skip to: 14571 /* 6604 */ MCD_OPC_Decode, 246, 13, 130, 1, // Opcode: VSHLLi32 /* 6609 */ MCD_OPC_FilterValue, 4, 22, 1, // Skip to: 6891 /* 6613 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 6616 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 6671 /* 6620 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6623 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6635 /* 6627 */ MCD_OPC_CheckPredicate, 16, 4, 31, // Skip to: 14571 /* 6631 */ MCD_OPC_Decode, 178, 5, 125, // Opcode: VCLSv8i8 /* 6635 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6647 /* 6639 */ MCD_OPC_CheckPredicate, 16, 248, 30, // Skip to: 14571 /* 6643 */ MCD_OPC_Decode, 173, 5, 126, // Opcode: VCLSv16i8 /* 6647 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6659 /* 6651 */ MCD_OPC_CheckPredicate, 16, 236, 30, // Skip to: 14571 /* 6655 */ MCD_OPC_Decode, 192, 5, 125, // Opcode: VCLZv8i8 /* 6659 */ MCD_OPC_FilterValue, 3, 228, 30, // Skip to: 14571 /* 6663 */ MCD_OPC_CheckPredicate, 16, 224, 30, // Skip to: 14571 /* 6667 */ MCD_OPC_Decode, 187, 5, 126, // Opcode: VCLZv16i8 /* 6671 */ MCD_OPC_FilterValue, 4, 51, 0, // Skip to: 6726 /* 6675 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6678 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6690 /* 6682 */ MCD_OPC_CheckPredicate, 16, 205, 30, // Skip to: 14571 /* 6686 */ MCD_OPC_Decode, 175, 5, 125, // Opcode: VCLSv4i16 /* 6690 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6702 /* 6694 */ MCD_OPC_CheckPredicate, 16, 193, 30, // Skip to: 14571 /* 6698 */ MCD_OPC_Decode, 177, 5, 126, // Opcode: VCLSv8i16 /* 6702 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6714 /* 6706 */ MCD_OPC_CheckPredicate, 16, 181, 30, // Skip to: 14571 /* 6710 */ MCD_OPC_Decode, 189, 5, 125, // Opcode: VCLZv4i16 /* 6714 */ MCD_OPC_FilterValue, 3, 173, 30, // Skip to: 14571 /* 6718 */ MCD_OPC_CheckPredicate, 16, 169, 30, // Skip to: 14571 /* 6722 */ MCD_OPC_Decode, 191, 5, 126, // Opcode: VCLZv8i16 /* 6726 */ MCD_OPC_FilterValue, 8, 51, 0, // Skip to: 6781 /* 6730 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6733 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6745 /* 6737 */ MCD_OPC_CheckPredicate, 16, 150, 30, // Skip to: 14571 /* 6741 */ MCD_OPC_Decode, 174, 5, 125, // Opcode: VCLSv2i32 /* 6745 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6757 /* 6749 */ MCD_OPC_CheckPredicate, 16, 138, 30, // Skip to: 14571 /* 6753 */ MCD_OPC_Decode, 176, 5, 126, // Opcode: VCLSv4i32 /* 6757 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6769 /* 6761 */ MCD_OPC_CheckPredicate, 16, 126, 30, // Skip to: 14571 /* 6765 */ MCD_OPC_Decode, 188, 5, 125, // Opcode: VCLZv2i32 /* 6769 */ MCD_OPC_FilterValue, 3, 118, 30, // Skip to: 14571 /* 6773 */ MCD_OPC_CheckPredicate, 16, 114, 30, // Skip to: 14571 /* 6777 */ MCD_OPC_Decode, 190, 5, 126, // Opcode: VCLZv4i32 /* 6781 */ MCD_OPC_FilterValue, 9, 51, 0, // Skip to: 6836 /* 6785 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6788 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6800 /* 6792 */ MCD_OPC_CheckPredicate, 16, 95, 30, // Skip to: 14571 /* 6796 */ MCD_OPC_Decode, 158, 5, 125, // Opcode: VCGTzv2f32 /* 6800 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6812 /* 6804 */ MCD_OPC_CheckPredicate, 16, 83, 30, // Skip to: 14571 /* 6808 */ MCD_OPC_Decode, 160, 5, 126, // Opcode: VCGTzv4f32 /* 6812 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6824 /* 6816 */ MCD_OPC_CheckPredicate, 16, 71, 30, // Skip to: 14571 /* 6820 */ MCD_OPC_Decode, 136, 5, 125, // Opcode: VCGEzv2f32 /* 6824 */ MCD_OPC_FilterValue, 3, 63, 30, // Skip to: 14571 /* 6828 */ MCD_OPC_CheckPredicate, 16, 59, 30, // Skip to: 14571 /* 6832 */ MCD_OPC_Decode, 138, 5, 126, // Opcode: VCGEzv4f32 /* 6836 */ MCD_OPC_FilterValue, 11, 51, 30, // Skip to: 14571 /* 6840 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6843 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6855 /* 6847 */ MCD_OPC_CheckPredicate, 16, 40, 30, // Skip to: 14571 /* 6851 */ MCD_OPC_Decode, 246, 12, 125, // Opcode: VRECPEd /* 6855 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6867 /* 6859 */ MCD_OPC_CheckPredicate, 16, 28, 30, // Skip to: 14571 /* 6863 */ MCD_OPC_Decode, 249, 12, 126, // Opcode: VRECPEq /* 6867 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6879 /* 6871 */ MCD_OPC_CheckPredicate, 16, 16, 30, // Skip to: 14571 /* 6875 */ MCD_OPC_Decode, 209, 13, 125, // Opcode: VRSQRTEd /* 6879 */ MCD_OPC_FilterValue, 3, 8, 30, // Skip to: 14571 /* 6883 */ MCD_OPC_CheckPredicate, 16, 4, 30, // Skip to: 14571 /* 6887 */ MCD_OPC_Decode, 212, 13, 126, // Opcode: VRSQRTEq /* 6891 */ MCD_OPC_FilterValue, 5, 175, 0, // Skip to: 7070 /* 6895 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 6898 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6941 /* 6902 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 6905 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6917 /* 6909 */ MCD_OPC_CheckPredicate, 16, 234, 29, // Skip to: 14571 /* 6913 */ MCD_OPC_Decode, 201, 5, 125, // Opcode: VCNTd /* 6917 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 6929 /* 6921 */ MCD_OPC_CheckPredicate, 16, 222, 29, // Skip to: 14571 /* 6925 */ MCD_OPC_Decode, 242, 4, 125, // Opcode: VCEQzv2f32 /* 6929 */ MCD_OPC_FilterValue, 11, 214, 29, // Skip to: 14571 /* 6933 */ MCD_OPC_CheckPredicate, 16, 210, 29, // Skip to: 14571 /* 6937 */ MCD_OPC_Decode, 247, 12, 125, // Opcode: VRECPEfd /* 6941 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 6984 /* 6945 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 6948 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6960 /* 6952 */ MCD_OPC_CheckPredicate, 16, 191, 29, // Skip to: 14571 /* 6956 */ MCD_OPC_Decode, 202, 5, 126, // Opcode: VCNTq /* 6960 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 6972 /* 6964 */ MCD_OPC_CheckPredicate, 16, 179, 29, // Skip to: 14571 /* 6968 */ MCD_OPC_Decode, 244, 4, 126, // Opcode: VCEQzv4f32 /* 6972 */ MCD_OPC_FilterValue, 11, 171, 29, // Skip to: 14571 /* 6976 */ MCD_OPC_CheckPredicate, 16, 167, 29, // Skip to: 14571 /* 6980 */ MCD_OPC_Decode, 248, 12, 126, // Opcode: VRECPEfq /* 6984 */ MCD_OPC_FilterValue, 2, 39, 0, // Skip to: 7027 /* 6988 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 6991 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7003 /* 6995 */ MCD_OPC_CheckPredicate, 16, 148, 29, // Skip to: 14571 /* 6999 */ MCD_OPC_Decode, 144, 11, 125, // Opcode: VMVNd /* 7003 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 7015 /* 7007 */ MCD_OPC_CheckPredicate, 16, 136, 29, // Skip to: 14571 /* 7011 */ MCD_OPC_Decode, 166, 5, 125, // Opcode: VCLEzv2f32 /* 7015 */ MCD_OPC_FilterValue, 11, 128, 29, // Skip to: 14571 /* 7019 */ MCD_OPC_CheckPredicate, 16, 124, 29, // Skip to: 14571 /* 7023 */ MCD_OPC_Decode, 210, 13, 125, // Opcode: VRSQRTEfd /* 7027 */ MCD_OPC_FilterValue, 3, 116, 29, // Skip to: 14571 /* 7031 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 7034 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7046 /* 7038 */ MCD_OPC_CheckPredicate, 16, 105, 29, // Skip to: 14571 /* 7042 */ MCD_OPC_Decode, 145, 11, 126, // Opcode: VMVNq /* 7046 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 7058 /* 7050 */ MCD_OPC_CheckPredicate, 16, 93, 29, // Skip to: 14571 /* 7054 */ MCD_OPC_Decode, 168, 5, 126, // Opcode: VCLEzv4f32 /* 7058 */ MCD_OPC_FilterValue, 11, 85, 29, // Skip to: 14571 /* 7062 */ MCD_OPC_CheckPredicate, 16, 81, 29, // Skip to: 14571 /* 7066 */ MCD_OPC_Decode, 211, 13, 126, // Opcode: VRSQRTEfq /* 7070 */ MCD_OPC_FilterValue, 6, 29, 1, // Skip to: 7359 /* 7074 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 7077 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 7136 /* 7081 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7084 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7097 /* 7088 */ MCD_OPC_CheckPredicate, 16, 55, 29, // Skip to: 14571 /* 7092 */ MCD_OPC_Decode, 179, 11, 131, 1, // Opcode: VPADALsv8i8 /* 7097 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 7110 /* 7101 */ MCD_OPC_CheckPredicate, 16, 42, 29, // Skip to: 14571 /* 7105 */ MCD_OPC_Decode, 174, 11, 132, 1, // Opcode: VPADALsv16i8 /* 7110 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 7123 /* 7114 */ MCD_OPC_CheckPredicate, 16, 29, 29, // Skip to: 14571 /* 7118 */ MCD_OPC_Decode, 185, 11, 131, 1, // Opcode: VPADALuv8i8 /* 7123 */ MCD_OPC_FilterValue, 3, 20, 29, // Skip to: 14571 /* 7127 */ MCD_OPC_CheckPredicate, 16, 16, 29, // Skip to: 14571 /* 7131 */ MCD_OPC_Decode, 180, 11, 132, 1, // Opcode: VPADALuv16i8 /* 7136 */ MCD_OPC_FilterValue, 4, 55, 0, // Skip to: 7195 /* 7140 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7143 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7156 /* 7147 */ MCD_OPC_CheckPredicate, 16, 252, 28, // Skip to: 14571 /* 7151 */ MCD_OPC_Decode, 176, 11, 131, 1, // Opcode: VPADALsv4i16 /* 7156 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 7169 /* 7160 */ MCD_OPC_CheckPredicate, 16, 239, 28, // Skip to: 14571 /* 7164 */ MCD_OPC_Decode, 178, 11, 132, 1, // Opcode: VPADALsv8i16 /* 7169 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 7182 /* 7173 */ MCD_OPC_CheckPredicate, 16, 226, 28, // Skip to: 14571 /* 7177 */ MCD_OPC_Decode, 182, 11, 131, 1, // Opcode: VPADALuv4i16 /* 7182 */ MCD_OPC_FilterValue, 3, 217, 28, // Skip to: 14571 /* 7186 */ MCD_OPC_CheckPredicate, 16, 213, 28, // Skip to: 14571 /* 7190 */ MCD_OPC_Decode, 184, 11, 132, 1, // Opcode: VPADALuv8i16 /* 7195 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 7214 /* 7199 */ MCD_OPC_CheckPredicate, 18, 200, 28, // Skip to: 14571 /* 7203 */ MCD_OPC_CheckField, 6, 2, 0, 194, 28, // Skip to: 14571 /* 7209 */ MCD_OPC_Decode, 245, 5, 129, 1, // Opcode: VCVTf2h /* 7214 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 7273 /* 7218 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7221 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7234 /* 7225 */ MCD_OPC_CheckPredicate, 16, 174, 28, // Skip to: 14571 /* 7229 */ MCD_OPC_Decode, 175, 11, 131, 1, // Opcode: VPADALsv2i32 /* 7234 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 7247 /* 7238 */ MCD_OPC_CheckPredicate, 16, 161, 28, // Skip to: 14571 /* 7242 */ MCD_OPC_Decode, 177, 11, 132, 1, // Opcode: VPADALsv4i32 /* 7247 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 7260 /* 7251 */ MCD_OPC_CheckPredicate, 16, 148, 28, // Skip to: 14571 /* 7255 */ MCD_OPC_Decode, 181, 11, 131, 1, // Opcode: VPADALuv2i32 /* 7260 */ MCD_OPC_FilterValue, 3, 139, 28, // Skip to: 14571 /* 7264 */ MCD_OPC_CheckPredicate, 16, 135, 28, // Skip to: 14571 /* 7268 */ MCD_OPC_Decode, 183, 11, 132, 1, // Opcode: VPADALuv4i32 /* 7273 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 7304 /* 7277 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7280 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7292 /* 7284 */ MCD_OPC_CheckPredicate, 16, 115, 28, // Skip to: 14571 /* 7288 */ MCD_OPC_Decode, 180, 5, 125, // Opcode: VCLTzv2f32 /* 7292 */ MCD_OPC_FilterValue, 1, 107, 28, // Skip to: 14571 /* 7296 */ MCD_OPC_CheckPredicate, 16, 103, 28, // Skip to: 14571 /* 7300 */ MCD_OPC_Decode, 182, 5, 126, // Opcode: VCLTzv4f32 /* 7304 */ MCD_OPC_FilterValue, 11, 95, 28, // Skip to: 14571 /* 7308 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7311 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7323 /* 7315 */ MCD_OPC_CheckPredicate, 16, 84, 28, // Skip to: 14571 /* 7319 */ MCD_OPC_Decode, 255, 5, 125, // Opcode: VCVTs2fd /* 7323 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7335 /* 7327 */ MCD_OPC_CheckPredicate, 16, 72, 28, // Skip to: 14571 /* 7331 */ MCD_OPC_Decode, 128, 6, 126, // Opcode: VCVTs2fq /* 7335 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7347 /* 7339 */ MCD_OPC_CheckPredicate, 16, 60, 28, // Skip to: 14571 /* 7343 */ MCD_OPC_Decode, 129, 6, 125, // Opcode: VCVTu2fd /* 7347 */ MCD_OPC_FilterValue, 3, 52, 28, // Skip to: 14571 /* 7351 */ MCD_OPC_CheckPredicate, 16, 48, 28, // Skip to: 14571 /* 7355 */ MCD_OPC_Decode, 130, 6, 126, // Opcode: VCVTu2fq /* 7359 */ MCD_OPC_FilterValue, 7, 41, 1, // Skip to: 7660 /* 7363 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 7366 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 7421 /* 7370 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7373 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7385 /* 7377 */ MCD_OPC_CheckPredicate, 16, 22, 28, // Skip to: 14571 /* 7381 */ MCD_OPC_Decode, 221, 11, 125, // Opcode: VQABSv8i8 /* 7385 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7397 /* 7389 */ MCD_OPC_CheckPredicate, 16, 10, 28, // Skip to: 14571 /* 7393 */ MCD_OPC_Decode, 216, 11, 126, // Opcode: VQABSv16i8 /* 7397 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7409 /* 7401 */ MCD_OPC_CheckPredicate, 16, 254, 27, // Skip to: 14571 /* 7405 */ MCD_OPC_Decode, 144, 12, 125, // Opcode: VQNEGv8i8 /* 7409 */ MCD_OPC_FilterValue, 3, 246, 27, // Skip to: 14571 /* 7413 */ MCD_OPC_CheckPredicate, 16, 242, 27, // Skip to: 14571 /* 7417 */ MCD_OPC_Decode, 139, 12, 126, // Opcode: VQNEGv16i8 /* 7421 */ MCD_OPC_FilterValue, 4, 51, 0, // Skip to: 7476 /* 7425 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7428 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7440 /* 7432 */ MCD_OPC_CheckPredicate, 16, 223, 27, // Skip to: 14571 /* 7436 */ MCD_OPC_Decode, 218, 11, 125, // Opcode: VQABSv4i16 /* 7440 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7452 /* 7444 */ MCD_OPC_CheckPredicate, 16, 211, 27, // Skip to: 14571 /* 7448 */ MCD_OPC_Decode, 220, 11, 126, // Opcode: VQABSv8i16 /* 7452 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7464 /* 7456 */ MCD_OPC_CheckPredicate, 16, 199, 27, // Skip to: 14571 /* 7460 */ MCD_OPC_Decode, 141, 12, 125, // Opcode: VQNEGv4i16 /* 7464 */ MCD_OPC_FilterValue, 3, 191, 27, // Skip to: 14571 /* 7468 */ MCD_OPC_CheckPredicate, 16, 187, 27, // Skip to: 14571 /* 7472 */ MCD_OPC_Decode, 143, 12, 126, // Opcode: VQNEGv8i16 /* 7476 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 7495 /* 7480 */ MCD_OPC_CheckPredicate, 18, 175, 27, // Skip to: 14571 /* 7484 */ MCD_OPC_CheckField, 6, 2, 0, 169, 27, // Skip to: 14571 /* 7490 */ MCD_OPC_Decode, 254, 5, 133, 1, // Opcode: VCVTh2f /* 7495 */ MCD_OPC_FilterValue, 8, 51, 0, // Skip to: 7550 /* 7499 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7502 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7514 /* 7506 */ MCD_OPC_CheckPredicate, 16, 149, 27, // Skip to: 14571 /* 7510 */ MCD_OPC_Decode, 217, 11, 125, // Opcode: VQABSv2i32 /* 7514 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7526 /* 7518 */ MCD_OPC_CheckPredicate, 16, 137, 27, // Skip to: 14571 /* 7522 */ MCD_OPC_Decode, 219, 11, 126, // Opcode: VQABSv4i32 /* 7526 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7538 /* 7530 */ MCD_OPC_CheckPredicate, 16, 125, 27, // Skip to: 14571 /* 7534 */ MCD_OPC_Decode, 140, 12, 125, // Opcode: VQNEGv2i32 /* 7538 */ MCD_OPC_FilterValue, 3, 117, 27, // Skip to: 14571 /* 7542 */ MCD_OPC_CheckPredicate, 16, 113, 27, // Skip to: 14571 /* 7546 */ MCD_OPC_Decode, 142, 12, 126, // Opcode: VQNEGv4i32 /* 7550 */ MCD_OPC_FilterValue, 9, 51, 0, // Skip to: 7605 /* 7554 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7557 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7569 /* 7561 */ MCD_OPC_CheckPredicate, 16, 94, 27, // Skip to: 14571 /* 7565 */ MCD_OPC_Decode, 180, 4, 125, // Opcode: VABSfd /* 7569 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7581 /* 7573 */ MCD_OPC_CheckPredicate, 16, 82, 27, // Skip to: 14571 /* 7577 */ MCD_OPC_Decode, 181, 4, 126, // Opcode: VABSfq /* 7581 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7593 /* 7585 */ MCD_OPC_CheckPredicate, 16, 70, 27, // Skip to: 14571 /* 7589 */ MCD_OPC_Decode, 153, 11, 125, // Opcode: VNEGfd /* 7593 */ MCD_OPC_FilterValue, 3, 62, 27, // Skip to: 14571 /* 7597 */ MCD_OPC_CheckPredicate, 16, 58, 27, // Skip to: 14571 /* 7601 */ MCD_OPC_Decode, 152, 11, 126, // Opcode: VNEGf32q /* 7605 */ MCD_OPC_FilterValue, 11, 50, 27, // Skip to: 14571 /* 7609 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7612 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7624 /* 7616 */ MCD_OPC_CheckPredicate, 16, 39, 27, // Skip to: 14571 /* 7620 */ MCD_OPC_Decode, 246, 5, 125, // Opcode: VCVTf2sd /* 7624 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7636 /* 7628 */ MCD_OPC_CheckPredicate, 16, 27, 27, // Skip to: 14571 /* 7632 */ MCD_OPC_Decode, 247, 5, 126, // Opcode: VCVTf2sq /* 7636 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7648 /* 7640 */ MCD_OPC_CheckPredicate, 16, 15, 27, // Skip to: 14571 /* 7644 */ MCD_OPC_Decode, 248, 5, 125, // Opcode: VCVTf2ud /* 7648 */ MCD_OPC_FilterValue, 3, 7, 27, // Skip to: 14571 /* 7652 */ MCD_OPC_CheckPredicate, 16, 3, 27, // Skip to: 14571 /* 7656 */ MCD_OPC_Decode, 249, 5, 126, // Opcode: VCVTf2uq /* 7660 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 7693 /* 7664 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 7667 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7680 /* 7671 */ MCD_OPC_CheckPredicate, 16, 240, 26, // Skip to: 14571 /* 7675 */ MCD_OPC_Decode, 169, 17, 134, 1, // Opcode: VTBL1 /* 7680 */ MCD_OPC_FilterValue, 1, 231, 26, // Skip to: 14571 /* 7684 */ MCD_OPC_CheckPredicate, 16, 227, 26, // Skip to: 14571 /* 7688 */ MCD_OPC_Decode, 175, 17, 134, 1, // Opcode: VTBX1 /* 7693 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 7726 /* 7697 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 7700 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7713 /* 7704 */ MCD_OPC_CheckPredicate, 16, 207, 26, // Skip to: 14571 /* 7708 */ MCD_OPC_Decode, 170, 17, 134, 1, // Opcode: VTBL2 /* 7713 */ MCD_OPC_FilterValue, 1, 198, 26, // Skip to: 14571 /* 7717 */ MCD_OPC_CheckPredicate, 16, 194, 26, // Skip to: 14571 /* 7721 */ MCD_OPC_Decode, 176, 17, 134, 1, // Opcode: VTBX2 /* 7726 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 7759 /* 7730 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 7733 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7746 /* 7737 */ MCD_OPC_CheckPredicate, 16, 174, 26, // Skip to: 14571 /* 7741 */ MCD_OPC_Decode, 171, 17, 134, 1, // Opcode: VTBL3 /* 7746 */ MCD_OPC_FilterValue, 1, 165, 26, // Skip to: 14571 /* 7750 */ MCD_OPC_CheckPredicate, 16, 161, 26, // Skip to: 14571 /* 7754 */ MCD_OPC_Decode, 177, 17, 134, 1, // Opcode: VTBX3 /* 7759 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 7792 /* 7763 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 7766 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7779 /* 7770 */ MCD_OPC_CheckPredicate, 16, 141, 26, // Skip to: 14571 /* 7774 */ MCD_OPC_Decode, 173, 17, 134, 1, // Opcode: VTBL4 /* 7779 */ MCD_OPC_FilterValue, 1, 132, 26, // Skip to: 14571 /* 7783 */ MCD_OPC_CheckPredicate, 16, 128, 26, // Skip to: 14571 /* 7787 */ MCD_OPC_Decode, 179, 17, 134, 1, // Opcode: VTBX4 /* 7792 */ MCD_OPC_FilterValue, 12, 119, 26, // Skip to: 14571 /* 7796 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7799 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 7858 /* 7803 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 7806 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 7845 /* 7810 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 7813 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 7832 /* 7817 */ MCD_OPC_CheckPredicate, 16, 94, 26, // Skip to: 14571 /* 7821 */ MCD_OPC_CheckField, 18, 1, 1, 88, 26, // Skip to: 14571 /* 7827 */ MCD_OPC_Decode, 145, 6, 135, 1, // Opcode: VDUPLN32d /* 7832 */ MCD_OPC_FilterValue, 1, 79, 26, // Skip to: 14571 /* 7836 */ MCD_OPC_CheckPredicate, 16, 75, 26, // Skip to: 14571 /* 7840 */ MCD_OPC_Decode, 143, 6, 136, 1, // Opcode: VDUPLN16d /* 7845 */ MCD_OPC_FilterValue, 1, 66, 26, // Skip to: 14571 /* 7849 */ MCD_OPC_CheckPredicate, 16, 62, 26, // Skip to: 14571 /* 7853 */ MCD_OPC_Decode, 147, 6, 137, 1, // Opcode: VDUPLN8d /* 7858 */ MCD_OPC_FilterValue, 1, 53, 26, // Skip to: 14571 /* 7862 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ... /* 7865 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 7904 /* 7869 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ... /* 7872 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 7891 /* 7876 */ MCD_OPC_CheckPredicate, 16, 35, 26, // Skip to: 14571 /* 7880 */ MCD_OPC_CheckField, 18, 1, 1, 29, 26, // Skip to: 14571 /* 7886 */ MCD_OPC_Decode, 146, 6, 138, 1, // Opcode: VDUPLN32q /* 7891 */ MCD_OPC_FilterValue, 1, 20, 26, // Skip to: 14571 /* 7895 */ MCD_OPC_CheckPredicate, 16, 16, 26, // Skip to: 14571 /* 7899 */ MCD_OPC_Decode, 144, 6, 139, 1, // Opcode: VDUPLN16q /* 7904 */ MCD_OPC_FilterValue, 1, 7, 26, // Skip to: 14571 /* 7908 */ MCD_OPC_CheckPredicate, 16, 3, 26, // Skip to: 14571 /* 7912 */ MCD_OPC_Decode, 148, 6, 140, 1, // Opcode: VDUPLN8q /* 7917 */ MCD_OPC_FilterValue, 1, 250, 25, // Skip to: 14571 /* 7921 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 7924 */ MCD_OPC_FilterValue, 0, 185, 13, // Skip to: 11441 /* 7928 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 7931 */ MCD_OPC_FilterValue, 0, 28, 6, // Skip to: 9499 /* 7935 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 7938 */ MCD_OPC_FilterValue, 0, 135, 0, // Skip to: 8077 /* 7942 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 7945 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 7978 /* 7949 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 7952 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 7965 /* 7957 */ MCD_OPC_CheckPredicate, 16, 210, 25, // Skip to: 14571 /* 7961 */ MCD_OPC_Decode, 229, 11, 96, // Opcode: VQADDsv8i8 /* 7965 */ MCD_OPC_FilterValue, 243, 1, 201, 25, // Skip to: 14571 /* 7970 */ MCD_OPC_CheckPredicate, 16, 197, 25, // Skip to: 14571 /* 7974 */ MCD_OPC_Decode, 237, 11, 96, // Opcode: VQADDuv8i8 /* 7978 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8011 /* 7982 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 7985 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 7998 /* 7990 */ MCD_OPC_CheckPredicate, 16, 177, 25, // Skip to: 14571 /* 7994 */ MCD_OPC_Decode, 226, 11, 96, // Opcode: VQADDsv4i16 /* 7998 */ MCD_OPC_FilterValue, 243, 1, 168, 25, // Skip to: 14571 /* 8003 */ MCD_OPC_CheckPredicate, 16, 164, 25, // Skip to: 14571 /* 8007 */ MCD_OPC_Decode, 234, 11, 96, // Opcode: VQADDuv4i16 /* 8011 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 8044 /* 8015 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8018 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8031 /* 8023 */ MCD_OPC_CheckPredicate, 16, 144, 25, // Skip to: 14571 /* 8027 */ MCD_OPC_Decode, 224, 11, 96, // Opcode: VQADDsv2i32 /* 8031 */ MCD_OPC_FilterValue, 243, 1, 135, 25, // Skip to: 14571 /* 8036 */ MCD_OPC_CheckPredicate, 16, 131, 25, // Skip to: 14571 /* 8040 */ MCD_OPC_Decode, 232, 11, 96, // Opcode: VQADDuv2i32 /* 8044 */ MCD_OPC_FilterValue, 3, 123, 25, // Skip to: 14571 /* 8048 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8051 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8064 /* 8056 */ MCD_OPC_CheckPredicate, 16, 111, 25, // Skip to: 14571 /* 8060 */ MCD_OPC_Decode, 223, 11, 96, // Opcode: VQADDsv1i64 /* 8064 */ MCD_OPC_FilterValue, 243, 1, 102, 25, // Skip to: 14571 /* 8069 */ MCD_OPC_CheckPredicate, 16, 98, 25, // Skip to: 14571 /* 8073 */ MCD_OPC_Decode, 231, 11, 96, // Opcode: VQADDuv1i64 /* 8077 */ MCD_OPC_FilterValue, 1, 135, 0, // Skip to: 8216 /* 8081 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8084 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8117 /* 8088 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8091 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8104 /* 8096 */ MCD_OPC_CheckPredicate, 16, 71, 25, // Skip to: 14571 /* 8100 */ MCD_OPC_Decode, 219, 4, 96, // Opcode: VANDd /* 8104 */ MCD_OPC_FilterValue, 243, 1, 62, 25, // Skip to: 14571 /* 8109 */ MCD_OPC_CheckPredicate, 16, 58, 25, // Skip to: 14571 /* 8113 */ MCD_OPC_Decode, 149, 6, 96, // Opcode: VEORd /* 8117 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8150 /* 8121 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8124 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8137 /* 8129 */ MCD_OPC_CheckPredicate, 16, 38, 25, // Skip to: 14571 /* 8133 */ MCD_OPC_Decode, 221, 4, 96, // Opcode: VBICd /* 8137 */ MCD_OPC_FilterValue, 243, 1, 29, 25, // Skip to: 14571 /* 8142 */ MCD_OPC_CheckPredicate, 16, 25, 25, // Skip to: 14571 /* 8146 */ MCD_OPC_Decode, 231, 4, 104, // Opcode: VBSLd /* 8150 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 8183 /* 8154 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8157 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8170 /* 8162 */ MCD_OPC_CheckPredicate, 16, 5, 25, // Skip to: 14571 /* 8166 */ MCD_OPC_Decode, 168, 11, 96, // Opcode: VORRd /* 8170 */ MCD_OPC_FilterValue, 243, 1, 252, 24, // Skip to: 14571 /* 8175 */ MCD_OPC_CheckPredicate, 16, 248, 24, // Skip to: 14571 /* 8179 */ MCD_OPC_Decode, 229, 4, 104, // Opcode: VBITd /* 8183 */ MCD_OPC_FilterValue, 3, 240, 24, // Skip to: 14571 /* 8187 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8190 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8203 /* 8195 */ MCD_OPC_CheckPredicate, 16, 228, 24, // Skip to: 14571 /* 8199 */ MCD_OPC_Decode, 166, 11, 96, // Opcode: VORNd /* 8203 */ MCD_OPC_FilterValue, 243, 1, 219, 24, // Skip to: 14571 /* 8208 */ MCD_OPC_CheckPredicate, 16, 215, 24, // Skip to: 14571 /* 8212 */ MCD_OPC_Decode, 227, 4, 104, // Opcode: VBIFd /* 8216 */ MCD_OPC_FilterValue, 2, 135, 0, // Skip to: 8355 /* 8220 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8223 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8256 /* 8227 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8230 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8243 /* 8235 */ MCD_OPC_CheckPredicate, 16, 188, 24, // Skip to: 14571 /* 8239 */ MCD_OPC_Decode, 234, 12, 96, // Opcode: VQSUBsv8i8 /* 8243 */ MCD_OPC_FilterValue, 243, 1, 179, 24, // Skip to: 14571 /* 8248 */ MCD_OPC_CheckPredicate, 16, 175, 24, // Skip to: 14571 /* 8252 */ MCD_OPC_Decode, 242, 12, 96, // Opcode: VQSUBuv8i8 /* 8256 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8289 /* 8260 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8263 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8276 /* 8268 */ MCD_OPC_CheckPredicate, 16, 155, 24, // Skip to: 14571 /* 8272 */ MCD_OPC_Decode, 231, 12, 96, // Opcode: VQSUBsv4i16 /* 8276 */ MCD_OPC_FilterValue, 243, 1, 146, 24, // Skip to: 14571 /* 8281 */ MCD_OPC_CheckPredicate, 16, 142, 24, // Skip to: 14571 /* 8285 */ MCD_OPC_Decode, 239, 12, 96, // Opcode: VQSUBuv4i16 /* 8289 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 8322 /* 8293 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8296 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8309 /* 8301 */ MCD_OPC_CheckPredicate, 16, 122, 24, // Skip to: 14571 /* 8305 */ MCD_OPC_Decode, 229, 12, 96, // Opcode: VQSUBsv2i32 /* 8309 */ MCD_OPC_FilterValue, 243, 1, 113, 24, // Skip to: 14571 /* 8314 */ MCD_OPC_CheckPredicate, 16, 109, 24, // Skip to: 14571 /* 8318 */ MCD_OPC_Decode, 237, 12, 96, // Opcode: VQSUBuv2i32 /* 8322 */ MCD_OPC_FilterValue, 3, 101, 24, // Skip to: 14571 /* 8326 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8329 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8342 /* 8334 */ MCD_OPC_CheckPredicate, 16, 89, 24, // Skip to: 14571 /* 8338 */ MCD_OPC_Decode, 228, 12, 96, // Opcode: VQSUBsv1i64 /* 8342 */ MCD_OPC_FilterValue, 243, 1, 80, 24, // Skip to: 14571 /* 8347 */ MCD_OPC_CheckPredicate, 16, 76, 24, // Skip to: 14571 /* 8351 */ MCD_OPC_Decode, 236, 12, 96, // Opcode: VQSUBuv1i64 /* 8355 */ MCD_OPC_FilterValue, 3, 102, 0, // Skip to: 8461 /* 8359 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8362 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8395 /* 8366 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8369 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8382 /* 8374 */ MCD_OPC_CheckPredicate, 16, 49, 24, // Skip to: 14571 /* 8378 */ MCD_OPC_Decode, 128, 5, 96, // Opcode: VCGEsv8i8 /* 8382 */ MCD_OPC_FilterValue, 243, 1, 40, 24, // Skip to: 14571 /* 8387 */ MCD_OPC_CheckPredicate, 16, 36, 24, // Skip to: 14571 /* 8391 */ MCD_OPC_Decode, 134, 5, 96, // Opcode: VCGEuv8i8 /* 8395 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8428 /* 8399 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8402 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8415 /* 8407 */ MCD_OPC_CheckPredicate, 16, 16, 24, // Skip to: 14571 /* 8411 */ MCD_OPC_Decode, 253, 4, 96, // Opcode: VCGEsv4i16 /* 8415 */ MCD_OPC_FilterValue, 243, 1, 7, 24, // Skip to: 14571 /* 8420 */ MCD_OPC_CheckPredicate, 16, 3, 24, // Skip to: 14571 /* 8424 */ MCD_OPC_Decode, 131, 5, 96, // Opcode: VCGEuv4i16 /* 8428 */ MCD_OPC_FilterValue, 2, 251, 23, // Skip to: 14571 /* 8432 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8435 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8448 /* 8440 */ MCD_OPC_CheckPredicate, 16, 239, 23, // Skip to: 14571 /* 8444 */ MCD_OPC_Decode, 252, 4, 96, // Opcode: VCGEsv2i32 /* 8448 */ MCD_OPC_FilterValue, 243, 1, 230, 23, // Skip to: 14571 /* 8453 */ MCD_OPC_CheckPredicate, 16, 226, 23, // Skip to: 14571 /* 8457 */ MCD_OPC_Decode, 130, 5, 96, // Opcode: VCGEuv2i32 /* 8461 */ MCD_OPC_FilterValue, 4, 135, 0, // Skip to: 8600 /* 8465 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8468 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8501 /* 8472 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8475 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8488 /* 8480 */ MCD_OPC_CheckPredicate, 16, 199, 23, // Skip to: 14571 /* 8484 */ MCD_OPC_Decode, 201, 12, 100, // Opcode: VQSHLsv8i8 /* 8488 */ MCD_OPC_FilterValue, 243, 1, 190, 23, // Skip to: 14571 /* 8493 */ MCD_OPC_CheckPredicate, 16, 186, 23, // Skip to: 14571 /* 8497 */ MCD_OPC_Decode, 217, 12, 100, // Opcode: VQSHLuv8i8 /* 8501 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8534 /* 8505 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8508 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8521 /* 8513 */ MCD_OPC_CheckPredicate, 16, 166, 23, // Skip to: 14571 /* 8517 */ MCD_OPC_Decode, 198, 12, 100, // Opcode: VQSHLsv4i16 /* 8521 */ MCD_OPC_FilterValue, 243, 1, 157, 23, // Skip to: 14571 /* 8526 */ MCD_OPC_CheckPredicate, 16, 153, 23, // Skip to: 14571 /* 8530 */ MCD_OPC_Decode, 214, 12, 100, // Opcode: VQSHLuv4i16 /* 8534 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 8567 /* 8538 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8541 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8554 /* 8546 */ MCD_OPC_CheckPredicate, 16, 133, 23, // Skip to: 14571 /* 8550 */ MCD_OPC_Decode, 196, 12, 100, // Opcode: VQSHLsv2i32 /* 8554 */ MCD_OPC_FilterValue, 243, 1, 124, 23, // Skip to: 14571 /* 8559 */ MCD_OPC_CheckPredicate, 16, 120, 23, // Skip to: 14571 /* 8563 */ MCD_OPC_Decode, 212, 12, 100, // Opcode: VQSHLuv2i32 /* 8567 */ MCD_OPC_FilterValue, 3, 112, 23, // Skip to: 14571 /* 8571 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8574 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8587 /* 8579 */ MCD_OPC_CheckPredicate, 16, 100, 23, // Skip to: 14571 /* 8583 */ MCD_OPC_Decode, 195, 12, 100, // Opcode: VQSHLsv1i64 /* 8587 */ MCD_OPC_FilterValue, 243, 1, 91, 23, // Skip to: 14571 /* 8592 */ MCD_OPC_CheckPredicate, 16, 87, 23, // Skip to: 14571 /* 8596 */ MCD_OPC_Decode, 211, 12, 100, // Opcode: VQSHLuv1i64 /* 8600 */ MCD_OPC_FilterValue, 5, 135, 0, // Skip to: 8739 /* 8604 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8607 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8640 /* 8611 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8614 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8627 /* 8619 */ MCD_OPC_CheckPredicate, 16, 60, 23, // Skip to: 14571 /* 8623 */ MCD_OPC_Decode, 160, 12, 100, // Opcode: VQRSHLsv8i8 /* 8627 */ MCD_OPC_FilterValue, 243, 1, 51, 23, // Skip to: 14571 /* 8632 */ MCD_OPC_CheckPredicate, 16, 47, 23, // Skip to: 14571 /* 8636 */ MCD_OPC_Decode, 168, 12, 100, // Opcode: VQRSHLuv8i8 /* 8640 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8673 /* 8644 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8647 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8660 /* 8652 */ MCD_OPC_CheckPredicate, 16, 27, 23, // Skip to: 14571 /* 8656 */ MCD_OPC_Decode, 157, 12, 100, // Opcode: VQRSHLsv4i16 /* 8660 */ MCD_OPC_FilterValue, 243, 1, 18, 23, // Skip to: 14571 /* 8665 */ MCD_OPC_CheckPredicate, 16, 14, 23, // Skip to: 14571 /* 8669 */ MCD_OPC_Decode, 165, 12, 100, // Opcode: VQRSHLuv4i16 /* 8673 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 8706 /* 8677 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8680 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8693 /* 8685 */ MCD_OPC_CheckPredicate, 16, 250, 22, // Skip to: 14571 /* 8689 */ MCD_OPC_Decode, 155, 12, 100, // Opcode: VQRSHLsv2i32 /* 8693 */ MCD_OPC_FilterValue, 243, 1, 241, 22, // Skip to: 14571 /* 8698 */ MCD_OPC_CheckPredicate, 16, 237, 22, // Skip to: 14571 /* 8702 */ MCD_OPC_Decode, 163, 12, 100, // Opcode: VQRSHLuv2i32 /* 8706 */ MCD_OPC_FilterValue, 3, 229, 22, // Skip to: 14571 /* 8710 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8713 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8726 /* 8718 */ MCD_OPC_CheckPredicate, 16, 217, 22, // Skip to: 14571 /* 8722 */ MCD_OPC_Decode, 154, 12, 100, // Opcode: VQRSHLsv1i64 /* 8726 */ MCD_OPC_FilterValue, 243, 1, 208, 22, // Skip to: 14571 /* 8731 */ MCD_OPC_CheckPredicate, 16, 204, 22, // Skip to: 14571 /* 8735 */ MCD_OPC_Decode, 162, 12, 100, // Opcode: VQRSHLuv1i64 /* 8739 */ MCD_OPC_FilterValue, 6, 102, 0, // Skip to: 8845 /* 8743 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8746 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8779 /* 8750 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8753 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8766 /* 8758 */ MCD_OPC_CheckPredicate, 16, 177, 22, // Skip to: 14571 /* 8762 */ MCD_OPC_Decode, 139, 10, 96, // Opcode: VMINsv8i8 /* 8766 */ MCD_OPC_FilterValue, 243, 1, 168, 22, // Skip to: 14571 /* 8771 */ MCD_OPC_CheckPredicate, 16, 164, 22, // Skip to: 14571 /* 8775 */ MCD_OPC_Decode, 145, 10, 96, // Opcode: VMINuv8i8 /* 8779 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8812 /* 8783 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8786 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8799 /* 8791 */ MCD_OPC_CheckPredicate, 16, 144, 22, // Skip to: 14571 /* 8795 */ MCD_OPC_Decode, 136, 10, 96, // Opcode: VMINsv4i16 /* 8799 */ MCD_OPC_FilterValue, 243, 1, 135, 22, // Skip to: 14571 /* 8804 */ MCD_OPC_CheckPredicate, 16, 131, 22, // Skip to: 14571 /* 8808 */ MCD_OPC_Decode, 142, 10, 96, // Opcode: VMINuv4i16 /* 8812 */ MCD_OPC_FilterValue, 2, 123, 22, // Skip to: 14571 /* 8816 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8819 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8832 /* 8824 */ MCD_OPC_CheckPredicate, 16, 111, 22, // Skip to: 14571 /* 8828 */ MCD_OPC_Decode, 135, 10, 96, // Opcode: VMINsv2i32 /* 8832 */ MCD_OPC_FilterValue, 243, 1, 102, 22, // Skip to: 14571 /* 8837 */ MCD_OPC_CheckPredicate, 16, 98, 22, // Skip to: 14571 /* 8841 */ MCD_OPC_Decode, 141, 10, 96, // Opcode: VMINuv2i32 /* 8845 */ MCD_OPC_FilterValue, 7, 102, 0, // Skip to: 8951 /* 8849 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8852 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8885 /* 8856 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8859 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8872 /* 8864 */ MCD_OPC_CheckPredicate, 16, 71, 22, // Skip to: 14571 /* 8868 */ MCD_OPC_Decode, 151, 4, 104, // Opcode: VABAsv8i8 /* 8872 */ MCD_OPC_FilterValue, 243, 1, 62, 22, // Skip to: 14571 /* 8877 */ MCD_OPC_CheckPredicate, 16, 58, 22, // Skip to: 14571 /* 8881 */ MCD_OPC_Decode, 157, 4, 104, // Opcode: VABAuv8i8 /* 8885 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 8918 /* 8889 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8892 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8905 /* 8897 */ MCD_OPC_CheckPredicate, 16, 38, 22, // Skip to: 14571 /* 8901 */ MCD_OPC_Decode, 148, 4, 104, // Opcode: VABAsv4i16 /* 8905 */ MCD_OPC_FilterValue, 243, 1, 29, 22, // Skip to: 14571 /* 8910 */ MCD_OPC_CheckPredicate, 16, 25, 22, // Skip to: 14571 /* 8914 */ MCD_OPC_Decode, 154, 4, 104, // Opcode: VABAuv4i16 /* 8918 */ MCD_OPC_FilterValue, 2, 17, 22, // Skip to: 14571 /* 8922 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8925 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8938 /* 8930 */ MCD_OPC_CheckPredicate, 16, 5, 22, // Skip to: 14571 /* 8934 */ MCD_OPC_Decode, 147, 4, 104, // Opcode: VABAsv2i32 /* 8938 */ MCD_OPC_FilterValue, 243, 1, 252, 21, // Skip to: 14571 /* 8943 */ MCD_OPC_CheckPredicate, 16, 248, 21, // Skip to: 14571 /* 8947 */ MCD_OPC_Decode, 153, 4, 104, // Opcode: VABAuv2i32 /* 8951 */ MCD_OPC_FilterValue, 8, 102, 0, // Skip to: 9057 /* 8955 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 8958 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 8991 /* 8962 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8965 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 8978 /* 8970 */ MCD_OPC_CheckPredicate, 16, 221, 21, // Skip to: 14571 /* 8974 */ MCD_OPC_Decode, 208, 17, 96, // Opcode: VTSTv8i8 /* 8978 */ MCD_OPC_FilterValue, 243, 1, 212, 21, // Skip to: 14571 /* 8983 */ MCD_OPC_CheckPredicate, 16, 208, 21, // Skip to: 14571 /* 8987 */ MCD_OPC_Decode, 240, 4, 96, // Opcode: VCEQv8i8 /* 8991 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 9024 /* 8995 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 8998 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9011 /* 9003 */ MCD_OPC_CheckPredicate, 16, 188, 21, // Skip to: 14571 /* 9007 */ MCD_OPC_Decode, 205, 17, 96, // Opcode: VTSTv4i16 /* 9011 */ MCD_OPC_FilterValue, 243, 1, 179, 21, // Skip to: 14571 /* 9016 */ MCD_OPC_CheckPredicate, 16, 175, 21, // Skip to: 14571 /* 9020 */ MCD_OPC_Decode, 237, 4, 96, // Opcode: VCEQv4i16 /* 9024 */ MCD_OPC_FilterValue, 2, 167, 21, // Skip to: 14571 /* 9028 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 9031 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9044 /* 9036 */ MCD_OPC_CheckPredicate, 16, 155, 21, // Skip to: 14571 /* 9040 */ MCD_OPC_Decode, 204, 17, 96, // Opcode: VTSTv2i32 /* 9044 */ MCD_OPC_FilterValue, 243, 1, 146, 21, // Skip to: 14571 /* 9049 */ MCD_OPC_CheckPredicate, 16, 142, 21, // Skip to: 14571 /* 9053 */ MCD_OPC_Decode, 236, 4, 96, // Opcode: VCEQv2i32 /* 9057 */ MCD_OPC_FilterValue, 9, 74, 0, // Skip to: 9135 /* 9061 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9064 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9097 /* 9068 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 9071 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9084 /* 9076 */ MCD_OPC_CheckPredicate, 16, 115, 21, // Skip to: 14571 /* 9080 */ MCD_OPC_Decode, 143, 11, 96, // Opcode: VMULv8i8 /* 9084 */ MCD_OPC_FilterValue, 243, 1, 106, 21, // Skip to: 14571 /* 9089 */ MCD_OPC_CheckPredicate, 16, 102, 21, // Skip to: 14571 /* 9093 */ MCD_OPC_Decode, 130, 11, 96, // Opcode: VMULpd /* 9097 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 9116 /* 9101 */ MCD_OPC_CheckPredicate, 16, 90, 21, // Skip to: 14571 /* 9105 */ MCD_OPC_CheckField, 24, 8, 242, 1, 83, 21, // Skip to: 14571 /* 9112 */ MCD_OPC_Decode, 140, 11, 96, // Opcode: VMULv4i16 /* 9116 */ MCD_OPC_FilterValue, 2, 75, 21, // Skip to: 14571 /* 9120 */ MCD_OPC_CheckPredicate, 16, 71, 21, // Skip to: 14571 /* 9124 */ MCD_OPC_CheckField, 24, 8, 242, 1, 64, 21, // Skip to: 14571 /* 9131 */ MCD_OPC_Decode, 139, 11, 96, // Opcode: VMULv2i32 /* 9135 */ MCD_OPC_FilterValue, 10, 102, 0, // Skip to: 9241 /* 9139 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9142 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9175 /* 9146 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 9149 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9162 /* 9154 */ MCD_OPC_CheckPredicate, 16, 37, 21, // Skip to: 14571 /* 9158 */ MCD_OPC_Decode, 212, 11, 96, // Opcode: VPMINs8 /* 9162 */ MCD_OPC_FilterValue, 243, 1, 28, 21, // Skip to: 14571 /* 9167 */ MCD_OPC_CheckPredicate, 16, 24, 21, // Skip to: 14571 /* 9171 */ MCD_OPC_Decode, 215, 11, 96, // Opcode: VPMINu8 /* 9175 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 9208 /* 9179 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 9182 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9195 /* 9187 */ MCD_OPC_CheckPredicate, 16, 4, 21, // Skip to: 14571 /* 9191 */ MCD_OPC_Decode, 210, 11, 96, // Opcode: VPMINs16 /* 9195 */ MCD_OPC_FilterValue, 243, 1, 251, 20, // Skip to: 14571 /* 9200 */ MCD_OPC_CheckPredicate, 16, 247, 20, // Skip to: 14571 /* 9204 */ MCD_OPC_Decode, 213, 11, 96, // Opcode: VPMINu16 /* 9208 */ MCD_OPC_FilterValue, 2, 239, 20, // Skip to: 14571 /* 9212 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 9215 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9228 /* 9220 */ MCD_OPC_CheckPredicate, 16, 227, 20, // Skip to: 14571 /* 9224 */ MCD_OPC_Decode, 211, 11, 96, // Opcode: VPMINs32 /* 9228 */ MCD_OPC_FilterValue, 243, 1, 218, 20, // Skip to: 14571 /* 9233 */ MCD_OPC_CheckPredicate, 16, 214, 20, // Skip to: 14571 /* 9237 */ MCD_OPC_Decode, 214, 11, 96, // Opcode: VPMINu32 /* 9241 */ MCD_OPC_FilterValue, 11, 60, 0, // Skip to: 9305 /* 9245 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9248 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9267 /* 9252 */ MCD_OPC_CheckPredicate, 16, 195, 20, // Skip to: 14571 /* 9256 */ MCD_OPC_CheckField, 24, 8, 242, 1, 188, 20, // Skip to: 14571 /* 9263 */ MCD_OPC_Decode, 201, 11, 96, // Opcode: VPADDi8 /* 9267 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 9286 /* 9271 */ MCD_OPC_CheckPredicate, 16, 176, 20, // Skip to: 14571 /* 9275 */ MCD_OPC_CheckField, 24, 8, 242, 1, 169, 20, // Skip to: 14571 /* 9282 */ MCD_OPC_Decode, 199, 11, 96, // Opcode: VPADDi16 /* 9286 */ MCD_OPC_FilterValue, 2, 161, 20, // Skip to: 14571 /* 9290 */ MCD_OPC_CheckPredicate, 16, 157, 20, // Skip to: 14571 /* 9294 */ MCD_OPC_CheckField, 24, 8, 242, 1, 150, 20, // Skip to: 14571 /* 9301 */ MCD_OPC_Decode, 200, 11, 96, // Opcode: VPADDi32 /* 9305 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 9350 /* 9309 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9312 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9331 /* 9316 */ MCD_OPC_CheckPredicate, 19, 131, 20, // Skip to: 14571 /* 9320 */ MCD_OPC_CheckField, 24, 8, 242, 1, 124, 20, // Skip to: 14571 /* 9327 */ MCD_OPC_Decode, 160, 6, 104, // Opcode: VFMAfd /* 9331 */ MCD_OPC_FilterValue, 2, 116, 20, // Skip to: 14571 /* 9335 */ MCD_OPC_CheckPredicate, 19, 112, 20, // Skip to: 14571 /* 9339 */ MCD_OPC_CheckField, 24, 8, 242, 1, 105, 20, // Skip to: 14571 /* 9346 */ MCD_OPC_Decode, 164, 6, 104, // Opcode: VFMSfd /* 9350 */ MCD_OPC_FilterValue, 13, 55, 0, // Skip to: 9409 /* 9354 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9357 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9390 /* 9361 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 9364 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 9377 /* 9369 */ MCD_OPC_CheckPredicate, 16, 78, 20, // Skip to: 14571 /* 9373 */ MCD_OPC_Decode, 158, 10, 104, // Opcode: VMLAfd /* 9377 */ MCD_OPC_FilterValue, 243, 1, 69, 20, // Skip to: 14571 /* 9382 */ MCD_OPC_CheckPredicate, 16, 65, 20, // Skip to: 14571 /* 9386 */ MCD_OPC_Decode, 128, 11, 96, // Opcode: VMULfd /* 9390 */ MCD_OPC_FilterValue, 2, 57, 20, // Skip to: 14571 /* 9394 */ MCD_OPC_CheckPredicate, 16, 53, 20, // Skip to: 14571 /* 9398 */ MCD_OPC_CheckField, 24, 8, 242, 1, 46, 20, // Skip to: 14571 /* 9405 */ MCD_OPC_Decode, 184, 10, 104, // Opcode: VMLSfd /* 9409 */ MCD_OPC_FilterValue, 14, 41, 0, // Skip to: 9454 /* 9413 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9416 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9435 /* 9420 */ MCD_OPC_CheckPredicate, 16, 27, 20, // Skip to: 14571 /* 9424 */ MCD_OPC_CheckField, 24, 8, 243, 1, 20, 20, // Skip to: 14571 /* 9431 */ MCD_OPC_Decode, 188, 4, 96, // Opcode: VACGEd /* 9435 */ MCD_OPC_FilterValue, 2, 12, 20, // Skip to: 14571 /* 9439 */ MCD_OPC_CheckPredicate, 16, 8, 20, // Skip to: 14571 /* 9443 */ MCD_OPC_CheckField, 24, 8, 243, 1, 1, 20, // Skip to: 14571 /* 9450 */ MCD_OPC_Decode, 190, 4, 96, // Opcode: VACGTd /* 9454 */ MCD_OPC_FilterValue, 15, 249, 19, // Skip to: 14571 /* 9458 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 9461 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9480 /* 9465 */ MCD_OPC_CheckPredicate, 16, 238, 19, // Skip to: 14571 /* 9469 */ MCD_OPC_CheckField, 24, 8, 242, 1, 231, 19, // Skip to: 14571 /* 9476 */ MCD_OPC_Decode, 250, 12, 96, // Opcode: VRECPSfd /* 9480 */ MCD_OPC_FilterValue, 2, 223, 19, // Skip to: 14571 /* 9484 */ MCD_OPC_CheckPredicate, 16, 219, 19, // Skip to: 14571 /* 9488 */ MCD_OPC_CheckField, 24, 8, 242, 1, 212, 19, // Skip to: 14571 /* 9495 */ MCD_OPC_Decode, 213, 13, 96, // Opcode: VRSQRTSfd /* 9499 */ MCD_OPC_FilterValue, 1, 204, 19, // Skip to: 14571 /* 9503 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 9506 */ MCD_OPC_FilterValue, 0, 138, 6, // Skip to: 11184 /* 9510 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ... /* 9513 */ MCD_OPC_FilterValue, 121, 190, 19, // Skip to: 14571 /* 9517 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 9520 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 9645 /* 9524 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 9527 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 9612 /* 9531 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 9534 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 9579 /* 9538 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9541 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9560 /* 9545 */ MCD_OPC_CheckPredicate, 16, 190, 5, // Skip to: 11019 /* 9549 */ MCD_OPC_CheckField, 19, 1, 1, 184, 5, // Skip to: 11019 /* 9555 */ MCD_OPC_Decode, 160, 14, 141, 1, // Opcode: VSHRsv8i8 /* 9560 */ MCD_OPC_FilterValue, 1, 175, 5, // Skip to: 11019 /* 9564 */ MCD_OPC_CheckPredicate, 16, 171, 5, // Skip to: 11019 /* 9568 */ MCD_OPC_CheckField, 19, 1, 1, 165, 5, // Skip to: 11019 /* 9574 */ MCD_OPC_Decode, 168, 14, 141, 1, // Opcode: VSHRuv8i8 /* 9579 */ MCD_OPC_FilterValue, 1, 156, 5, // Skip to: 11019 /* 9583 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9586 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9599 /* 9590 */ MCD_OPC_CheckPredicate, 16, 145, 5, // Skip to: 11019 /* 9594 */ MCD_OPC_Decode, 157, 14, 142, 1, // Opcode: VSHRsv4i16 /* 9599 */ MCD_OPC_FilterValue, 1, 136, 5, // Skip to: 11019 /* 9603 */ MCD_OPC_CheckPredicate, 16, 132, 5, // Skip to: 11019 /* 9607 */ MCD_OPC_Decode, 165, 14, 142, 1, // Opcode: VSHRuv4i16 /* 9612 */ MCD_OPC_FilterValue, 1, 123, 5, // Skip to: 11019 /* 9616 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9619 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9632 /* 9623 */ MCD_OPC_CheckPredicate, 16, 112, 5, // Skip to: 11019 /* 9627 */ MCD_OPC_Decode, 155, 14, 143, 1, // Opcode: VSHRsv2i32 /* 9632 */ MCD_OPC_FilterValue, 1, 103, 5, // Skip to: 11019 /* 9636 */ MCD_OPC_CheckPredicate, 16, 99, 5, // Skip to: 11019 /* 9640 */ MCD_OPC_Decode, 163, 14, 143, 1, // Opcode: VSHRuv2i32 /* 9645 */ MCD_OPC_FilterValue, 1, 121, 0, // Skip to: 9770 /* 9649 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 9652 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 9737 /* 9656 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 9659 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 9704 /* 9663 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9666 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9685 /* 9670 */ MCD_OPC_CheckPredicate, 16, 65, 5, // Skip to: 11019 /* 9674 */ MCD_OPC_CheckField, 19, 1, 1, 59, 5, // Skip to: 11019 /* 9680 */ MCD_OPC_Decode, 192, 14, 144, 1, // Opcode: VSRAsv8i8 /* 9685 */ MCD_OPC_FilterValue, 1, 50, 5, // Skip to: 11019 /* 9689 */ MCD_OPC_CheckPredicate, 16, 46, 5, // Skip to: 11019 /* 9693 */ MCD_OPC_CheckField, 19, 1, 1, 40, 5, // Skip to: 11019 /* 9699 */ MCD_OPC_Decode, 200, 14, 144, 1, // Opcode: VSRAuv8i8 /* 9704 */ MCD_OPC_FilterValue, 1, 31, 5, // Skip to: 11019 /* 9708 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9711 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9724 /* 9715 */ MCD_OPC_CheckPredicate, 16, 20, 5, // Skip to: 11019 /* 9719 */ MCD_OPC_Decode, 189, 14, 145, 1, // Opcode: VSRAsv4i16 /* 9724 */ MCD_OPC_FilterValue, 1, 11, 5, // Skip to: 11019 /* 9728 */ MCD_OPC_CheckPredicate, 16, 7, 5, // Skip to: 11019 /* 9732 */ MCD_OPC_Decode, 197, 14, 145, 1, // Opcode: VSRAuv4i16 /* 9737 */ MCD_OPC_FilterValue, 1, 254, 4, // Skip to: 11019 /* 9741 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9744 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9757 /* 9748 */ MCD_OPC_CheckPredicate, 16, 243, 4, // Skip to: 11019 /* 9752 */ MCD_OPC_Decode, 187, 14, 146, 1, // Opcode: VSRAsv2i32 /* 9757 */ MCD_OPC_FilterValue, 1, 234, 4, // Skip to: 11019 /* 9761 */ MCD_OPC_CheckPredicate, 16, 230, 4, // Skip to: 11019 /* 9765 */ MCD_OPC_Decode, 195, 14, 146, 1, // Opcode: VSRAuv2i32 /* 9770 */ MCD_OPC_FilterValue, 2, 121, 0, // Skip to: 9895 /* 9774 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 9777 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 9862 /* 9781 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 9784 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 9829 /* 9788 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9791 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9810 /* 9795 */ MCD_OPC_CheckPredicate, 16, 196, 4, // Skip to: 11019 /* 9799 */ MCD_OPC_CheckField, 19, 1, 1, 190, 4, // Skip to: 11019 /* 9805 */ MCD_OPC_Decode, 200, 13, 141, 1, // Opcode: VRSHRsv8i8 /* 9810 */ MCD_OPC_FilterValue, 1, 181, 4, // Skip to: 11019 /* 9814 */ MCD_OPC_CheckPredicate, 16, 177, 4, // Skip to: 11019 /* 9818 */ MCD_OPC_CheckField, 19, 1, 1, 171, 4, // Skip to: 11019 /* 9824 */ MCD_OPC_Decode, 208, 13, 141, 1, // Opcode: VRSHRuv8i8 /* 9829 */ MCD_OPC_FilterValue, 1, 162, 4, // Skip to: 11019 /* 9833 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9836 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9849 /* 9840 */ MCD_OPC_CheckPredicate, 16, 151, 4, // Skip to: 11019 /* 9844 */ MCD_OPC_Decode, 197, 13, 142, 1, // Opcode: VRSHRsv4i16 /* 9849 */ MCD_OPC_FilterValue, 1, 142, 4, // Skip to: 11019 /* 9853 */ MCD_OPC_CheckPredicate, 16, 138, 4, // Skip to: 11019 /* 9857 */ MCD_OPC_Decode, 205, 13, 142, 1, // Opcode: VRSHRuv4i16 /* 9862 */ MCD_OPC_FilterValue, 1, 129, 4, // Skip to: 11019 /* 9866 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9869 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9882 /* 9873 */ MCD_OPC_CheckPredicate, 16, 118, 4, // Skip to: 11019 /* 9877 */ MCD_OPC_Decode, 195, 13, 143, 1, // Opcode: VRSHRsv2i32 /* 9882 */ MCD_OPC_FilterValue, 1, 109, 4, // Skip to: 11019 /* 9886 */ MCD_OPC_CheckPredicate, 16, 105, 4, // Skip to: 11019 /* 9890 */ MCD_OPC_Decode, 203, 13, 143, 1, // Opcode: VRSHRuv2i32 /* 9895 */ MCD_OPC_FilterValue, 3, 121, 0, // Skip to: 10020 /* 9899 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 9902 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 9987 /* 9906 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 9909 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 9954 /* 9913 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9916 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 9935 /* 9920 */ MCD_OPC_CheckPredicate, 16, 71, 4, // Skip to: 11019 /* 9924 */ MCD_OPC_CheckField, 19, 1, 1, 65, 4, // Skip to: 11019 /* 9930 */ MCD_OPC_Decode, 222, 13, 144, 1, // Opcode: VRSRAsv8i8 /* 9935 */ MCD_OPC_FilterValue, 1, 56, 4, // Skip to: 11019 /* 9939 */ MCD_OPC_CheckPredicate, 16, 52, 4, // Skip to: 11019 /* 9943 */ MCD_OPC_CheckField, 19, 1, 1, 46, 4, // Skip to: 11019 /* 9949 */ MCD_OPC_Decode, 230, 13, 144, 1, // Opcode: VRSRAuv8i8 /* 9954 */ MCD_OPC_FilterValue, 1, 37, 4, // Skip to: 11019 /* 9958 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9961 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9974 /* 9965 */ MCD_OPC_CheckPredicate, 16, 26, 4, // Skip to: 11019 /* 9969 */ MCD_OPC_Decode, 219, 13, 145, 1, // Opcode: VRSRAsv4i16 /* 9974 */ MCD_OPC_FilterValue, 1, 17, 4, // Skip to: 11019 /* 9978 */ MCD_OPC_CheckPredicate, 16, 13, 4, // Skip to: 11019 /* 9982 */ MCD_OPC_Decode, 227, 13, 145, 1, // Opcode: VRSRAuv4i16 /* 9987 */ MCD_OPC_FilterValue, 1, 4, 4, // Skip to: 11019 /* 9991 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 9994 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10007 /* 9998 */ MCD_OPC_CheckPredicate, 16, 249, 3, // Skip to: 11019 /* 10002 */ MCD_OPC_Decode, 217, 13, 146, 1, // Opcode: VRSRAsv2i32 /* 10007 */ MCD_OPC_FilterValue, 1, 240, 3, // Skip to: 11019 /* 10011 */ MCD_OPC_CheckPredicate, 16, 236, 3, // Skip to: 11019 /* 10015 */ MCD_OPC_Decode, 225, 13, 146, 1, // Opcode: VRSRAuv2i32 /* 10020 */ MCD_OPC_FilterValue, 4, 73, 0, // Skip to: 10097 /* 10024 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10027 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 10078 /* 10031 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10034 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 10059 /* 10038 */ MCD_OPC_CheckPredicate, 16, 209, 3, // Skip to: 11019 /* 10042 */ MCD_OPC_CheckField, 24, 1, 1, 203, 3, // Skip to: 11019 /* 10048 */ MCD_OPC_CheckField, 19, 1, 1, 197, 3, // Skip to: 11019 /* 10054 */ MCD_OPC_Decode, 208, 14, 144, 1, // Opcode: VSRIv8i8 /* 10059 */ MCD_OPC_FilterValue, 1, 188, 3, // Skip to: 11019 /* 10063 */ MCD_OPC_CheckPredicate, 16, 184, 3, // Skip to: 11019 /* 10067 */ MCD_OPC_CheckField, 24, 1, 1, 178, 3, // Skip to: 11019 /* 10073 */ MCD_OPC_Decode, 205, 14, 145, 1, // Opcode: VSRIv4i16 /* 10078 */ MCD_OPC_FilterValue, 1, 169, 3, // Skip to: 11019 /* 10082 */ MCD_OPC_CheckPredicate, 16, 165, 3, // Skip to: 11019 /* 10086 */ MCD_OPC_CheckField, 24, 1, 1, 159, 3, // Skip to: 11019 /* 10092 */ MCD_OPC_Decode, 203, 14, 146, 1, // Opcode: VSRIv2i32 /* 10097 */ MCD_OPC_FilterValue, 5, 121, 0, // Skip to: 10222 /* 10101 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10104 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 10189 /* 10108 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10111 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 10156 /* 10115 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10118 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10137 /* 10122 */ MCD_OPC_CheckPredicate, 16, 125, 3, // Skip to: 11019 /* 10126 */ MCD_OPC_CheckField, 19, 1, 1, 119, 3, // Skip to: 11019 /* 10132 */ MCD_OPC_Decode, 133, 14, 147, 1, // Opcode: VSHLiv8i8 /* 10137 */ MCD_OPC_FilterValue, 1, 110, 3, // Skip to: 11019 /* 10141 */ MCD_OPC_CheckPredicate, 16, 106, 3, // Skip to: 11019 /* 10145 */ MCD_OPC_CheckField, 19, 1, 1, 100, 3, // Skip to: 11019 /* 10151 */ MCD_OPC_Decode, 180, 14, 148, 1, // Opcode: VSLIv8i8 /* 10156 */ MCD_OPC_FilterValue, 1, 91, 3, // Skip to: 11019 /* 10160 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10163 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10176 /* 10167 */ MCD_OPC_CheckPredicate, 16, 80, 3, // Skip to: 11019 /* 10171 */ MCD_OPC_Decode, 130, 14, 149, 1, // Opcode: VSHLiv4i16 /* 10176 */ MCD_OPC_FilterValue, 1, 71, 3, // Skip to: 11019 /* 10180 */ MCD_OPC_CheckPredicate, 16, 67, 3, // Skip to: 11019 /* 10184 */ MCD_OPC_Decode, 177, 14, 150, 1, // Opcode: VSLIv4i16 /* 10189 */ MCD_OPC_FilterValue, 1, 58, 3, // Skip to: 11019 /* 10193 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10196 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10209 /* 10200 */ MCD_OPC_CheckPredicate, 16, 47, 3, // Skip to: 11019 /* 10204 */ MCD_OPC_Decode, 128, 14, 151, 1, // Opcode: VSHLiv2i32 /* 10209 */ MCD_OPC_FilterValue, 1, 38, 3, // Skip to: 11019 /* 10213 */ MCD_OPC_CheckPredicate, 16, 34, 3, // Skip to: 11019 /* 10217 */ MCD_OPC_Decode, 175, 14, 152, 1, // Opcode: VSLIv2i32 /* 10222 */ MCD_OPC_FilterValue, 6, 73, 0, // Skip to: 10299 /* 10226 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10229 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 10280 /* 10233 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10236 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 10261 /* 10240 */ MCD_OPC_CheckPredicate, 16, 7, 3, // Skip to: 11019 /* 10244 */ MCD_OPC_CheckField, 24, 1, 1, 1, 3, // Skip to: 11019 /* 10250 */ MCD_OPC_CheckField, 19, 1, 1, 251, 2, // Skip to: 11019 /* 10256 */ MCD_OPC_Decode, 193, 12, 147, 1, // Opcode: VQSHLsuv8i8 /* 10261 */ MCD_OPC_FilterValue, 1, 242, 2, // Skip to: 11019 /* 10265 */ MCD_OPC_CheckPredicate, 16, 238, 2, // Skip to: 11019 /* 10269 */ MCD_OPC_CheckField, 24, 1, 1, 232, 2, // Skip to: 11019 /* 10275 */ MCD_OPC_Decode, 190, 12, 149, 1, // Opcode: VQSHLsuv4i16 /* 10280 */ MCD_OPC_FilterValue, 1, 223, 2, // Skip to: 11019 /* 10284 */ MCD_OPC_CheckPredicate, 16, 219, 2, // Skip to: 11019 /* 10288 */ MCD_OPC_CheckField, 24, 1, 1, 213, 2, // Skip to: 11019 /* 10294 */ MCD_OPC_Decode, 188, 12, 151, 1, // Opcode: VQSHLsuv2i32 /* 10299 */ MCD_OPC_FilterValue, 7, 121, 0, // Skip to: 10424 /* 10303 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10306 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 10391 /* 10310 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10313 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 10358 /* 10317 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10320 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10339 /* 10324 */ MCD_OPC_CheckPredicate, 16, 179, 2, // Skip to: 11019 /* 10328 */ MCD_OPC_CheckField, 19, 1, 1, 173, 2, // Skip to: 11019 /* 10334 */ MCD_OPC_Decode, 185, 12, 147, 1, // Opcode: VQSHLsiv8i8 /* 10339 */ MCD_OPC_FilterValue, 1, 164, 2, // Skip to: 11019 /* 10343 */ MCD_OPC_CheckPredicate, 16, 160, 2, // Skip to: 11019 /* 10347 */ MCD_OPC_CheckField, 19, 1, 1, 154, 2, // Skip to: 11019 /* 10353 */ MCD_OPC_Decode, 209, 12, 147, 1, // Opcode: VQSHLuiv8i8 /* 10358 */ MCD_OPC_FilterValue, 1, 145, 2, // Skip to: 11019 /* 10362 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10365 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10378 /* 10369 */ MCD_OPC_CheckPredicate, 16, 134, 2, // Skip to: 11019 /* 10373 */ MCD_OPC_Decode, 182, 12, 149, 1, // Opcode: VQSHLsiv4i16 /* 10378 */ MCD_OPC_FilterValue, 1, 125, 2, // Skip to: 11019 /* 10382 */ MCD_OPC_CheckPredicate, 16, 121, 2, // Skip to: 11019 /* 10386 */ MCD_OPC_Decode, 206, 12, 149, 1, // Opcode: VQSHLuiv4i16 /* 10391 */ MCD_OPC_FilterValue, 1, 112, 2, // Skip to: 11019 /* 10395 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10398 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10411 /* 10402 */ MCD_OPC_CheckPredicate, 16, 101, 2, // Skip to: 11019 /* 10406 */ MCD_OPC_Decode, 180, 12, 151, 1, // Opcode: VQSHLsiv2i32 /* 10411 */ MCD_OPC_FilterValue, 1, 92, 2, // Skip to: 11019 /* 10415 */ MCD_OPC_CheckPredicate, 16, 88, 2, // Skip to: 11019 /* 10419 */ MCD_OPC_Decode, 204, 12, 151, 1, // Opcode: VQSHLuiv2i32 /* 10424 */ MCD_OPC_FilterValue, 8, 121, 0, // Skip to: 10549 /* 10428 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10431 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 10516 /* 10435 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10438 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 10483 /* 10442 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10445 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10464 /* 10449 */ MCD_OPC_CheckPredicate, 16, 54, 2, // Skip to: 11019 /* 10453 */ MCD_OPC_CheckField, 19, 1, 1, 48, 2, // Skip to: 11019 /* 10459 */ MCD_OPC_Decode, 152, 14, 153, 1, // Opcode: VSHRNv8i8 /* 10464 */ MCD_OPC_FilterValue, 1, 39, 2, // Skip to: 11019 /* 10468 */ MCD_OPC_CheckPredicate, 16, 35, 2, // Skip to: 11019 /* 10472 */ MCD_OPC_CheckField, 19, 1, 1, 29, 2, // Skip to: 11019 /* 10478 */ MCD_OPC_Decode, 226, 12, 153, 1, // Opcode: VQSHRUNv8i8 /* 10483 */ MCD_OPC_FilterValue, 1, 20, 2, // Skip to: 11019 /* 10487 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10490 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10503 /* 10494 */ MCD_OPC_CheckPredicate, 16, 9, 2, // Skip to: 11019 /* 10498 */ MCD_OPC_Decode, 151, 14, 154, 1, // Opcode: VSHRNv4i16 /* 10503 */ MCD_OPC_FilterValue, 1, 0, 2, // Skip to: 11019 /* 10507 */ MCD_OPC_CheckPredicate, 16, 252, 1, // Skip to: 11019 /* 10511 */ MCD_OPC_Decode, 225, 12, 154, 1, // Opcode: VQSHRUNv4i16 /* 10516 */ MCD_OPC_FilterValue, 1, 243, 1, // Skip to: 11019 /* 10520 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10523 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10536 /* 10527 */ MCD_OPC_CheckPredicate, 16, 232, 1, // Skip to: 11019 /* 10531 */ MCD_OPC_Decode, 150, 14, 155, 1, // Opcode: VSHRNv2i32 /* 10536 */ MCD_OPC_FilterValue, 1, 223, 1, // Skip to: 11019 /* 10540 */ MCD_OPC_CheckPredicate, 16, 219, 1, // Skip to: 11019 /* 10544 */ MCD_OPC_Decode, 224, 12, 155, 1, // Opcode: VQSHRUNv2i32 /* 10549 */ MCD_OPC_FilterValue, 9, 121, 0, // Skip to: 10674 /* 10553 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10556 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 10641 /* 10560 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10563 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 10608 /* 10567 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10570 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10589 /* 10574 */ MCD_OPC_CheckPredicate, 16, 185, 1, // Skip to: 11019 /* 10578 */ MCD_OPC_CheckField, 19, 1, 1, 179, 1, // Skip to: 11019 /* 10584 */ MCD_OPC_Decode, 220, 12, 153, 1, // Opcode: VQSHRNsv8i8 /* 10589 */ MCD_OPC_FilterValue, 1, 170, 1, // Skip to: 11019 /* 10593 */ MCD_OPC_CheckPredicate, 16, 166, 1, // Skip to: 11019 /* 10597 */ MCD_OPC_CheckField, 19, 1, 1, 160, 1, // Skip to: 11019 /* 10603 */ MCD_OPC_Decode, 223, 12, 153, 1, // Opcode: VQSHRNuv8i8 /* 10608 */ MCD_OPC_FilterValue, 1, 151, 1, // Skip to: 11019 /* 10612 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10615 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10628 /* 10619 */ MCD_OPC_CheckPredicate, 16, 140, 1, // Skip to: 11019 /* 10623 */ MCD_OPC_Decode, 219, 12, 154, 1, // Opcode: VQSHRNsv4i16 /* 10628 */ MCD_OPC_FilterValue, 1, 131, 1, // Skip to: 11019 /* 10632 */ MCD_OPC_CheckPredicate, 16, 127, 1, // Skip to: 11019 /* 10636 */ MCD_OPC_Decode, 222, 12, 154, 1, // Opcode: VQSHRNuv4i16 /* 10641 */ MCD_OPC_FilterValue, 1, 118, 1, // Skip to: 11019 /* 10645 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10648 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10661 /* 10652 */ MCD_OPC_CheckPredicate, 16, 107, 1, // Skip to: 11019 /* 10656 */ MCD_OPC_Decode, 218, 12, 155, 1, // Opcode: VQSHRNsv2i32 /* 10661 */ MCD_OPC_FilterValue, 1, 98, 1, // Skip to: 11019 /* 10665 */ MCD_OPC_CheckPredicate, 16, 94, 1, // Skip to: 11019 /* 10669 */ MCD_OPC_Decode, 221, 12, 155, 1, // Opcode: VQSHRNuv2i32 /* 10674 */ MCD_OPC_FilterValue, 10, 213, 0, // Skip to: 10891 /* 10678 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 10681 */ MCD_OPC_FilterValue, 0, 143, 0, // Skip to: 10828 /* 10685 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 10688 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 10765 /* 10692 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10695 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 10730 /* 10699 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 10702 */ MCD_OPC_FilterValue, 1, 57, 1, // Skip to: 11019 /* 10706 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10721 /* 10710 */ MCD_OPC_CheckField, 16, 3, 0, 5, 0, // Skip to: 10721 /* 10716 */ MCD_OPC_Decode, 204, 10, 133, 1, // Opcode: VMOVLsv8i16 /* 10721 */ MCD_OPC_CheckPredicate, 16, 38, 1, // Skip to: 11019 /* 10725 */ MCD_OPC_Decode, 250, 13, 156, 1, // Opcode: VSHLLsv8i16 /* 10730 */ MCD_OPC_FilterValue, 1, 29, 1, // Skip to: 11019 /* 10734 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 10737 */ MCD_OPC_FilterValue, 1, 22, 1, // Skip to: 11019 /* 10741 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10756 /* 10745 */ MCD_OPC_CheckField, 16, 3, 0, 5, 0, // Skip to: 10756 /* 10751 */ MCD_OPC_Decode, 207, 10, 133, 1, // Opcode: VMOVLuv8i16 /* 10756 */ MCD_OPC_CheckPredicate, 16, 3, 1, // Skip to: 11019 /* 10760 */ MCD_OPC_Decode, 253, 13, 156, 1, // Opcode: VSHLLuv8i16 /* 10765 */ MCD_OPC_FilterValue, 1, 250, 0, // Skip to: 11019 /* 10769 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10772 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 10800 /* 10776 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10791 /* 10780 */ MCD_OPC_CheckField, 16, 4, 0, 5, 0, // Skip to: 10791 /* 10786 */ MCD_OPC_Decode, 203, 10, 133, 1, // Opcode: VMOVLsv4i32 /* 10791 */ MCD_OPC_CheckPredicate, 16, 224, 0, // Skip to: 11019 /* 10795 */ MCD_OPC_Decode, 249, 13, 157, 1, // Opcode: VSHLLsv4i32 /* 10800 */ MCD_OPC_FilterValue, 1, 215, 0, // Skip to: 11019 /* 10804 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10819 /* 10808 */ MCD_OPC_CheckField, 16, 4, 0, 5, 0, // Skip to: 10819 /* 10814 */ MCD_OPC_Decode, 206, 10, 133, 1, // Opcode: VMOVLuv4i32 /* 10819 */ MCD_OPC_CheckPredicate, 16, 196, 0, // Skip to: 11019 /* 10823 */ MCD_OPC_Decode, 252, 13, 157, 1, // Opcode: VSHLLuv4i32 /* 10828 */ MCD_OPC_FilterValue, 1, 187, 0, // Skip to: 11019 /* 10832 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10835 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 10863 /* 10839 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10854 /* 10843 */ MCD_OPC_CheckField, 16, 5, 0, 5, 0, // Skip to: 10854 /* 10849 */ MCD_OPC_Decode, 202, 10, 133, 1, // Opcode: VMOVLsv2i64 /* 10854 */ MCD_OPC_CheckPredicate, 16, 161, 0, // Skip to: 11019 /* 10858 */ MCD_OPC_Decode, 248, 13, 158, 1, // Opcode: VSHLLsv2i64 /* 10863 */ MCD_OPC_FilterValue, 1, 152, 0, // Skip to: 11019 /* 10867 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10882 /* 10871 */ MCD_OPC_CheckField, 16, 5, 0, 5, 0, // Skip to: 10882 /* 10877 */ MCD_OPC_Decode, 205, 10, 133, 1, // Opcode: VMOVLuv2i64 /* 10882 */ MCD_OPC_CheckPredicate, 16, 133, 0, // Skip to: 11019 /* 10886 */ MCD_OPC_Decode, 251, 13, 158, 1, // Opcode: VSHLLuv2i64 /* 10891 */ MCD_OPC_FilterValue, 14, 70, 0, // Skip to: 10965 /* 10895 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 10898 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10917 /* 10902 */ MCD_OPC_CheckPredicate, 16, 30, 0, // Skip to: 10936 /* 10906 */ MCD_OPC_CheckField, 19, 3, 0, 24, 0, // Skip to: 10936 /* 10912 */ MCD_OPC_Decode, 228, 10, 159, 1, // Opcode: VMOVv8i8 /* 10917 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 10936 /* 10921 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 10936 /* 10925 */ MCD_OPC_CheckField, 19, 3, 0, 5, 0, // Skip to: 10936 /* 10931 */ MCD_OPC_Decode, 220, 10, 159, 1, // Opcode: VMOVv1i64 /* 10936 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10939 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10952 /* 10943 */ MCD_OPC_CheckPredicate, 16, 72, 0, // Skip to: 11019 /* 10947 */ MCD_OPC_Decode, 131, 6, 160, 1, // Opcode: VCVTxs2fd /* 10952 */ MCD_OPC_FilterValue, 1, 63, 0, // Skip to: 11019 /* 10956 */ MCD_OPC_CheckPredicate, 16, 59, 0, // Skip to: 11019 /* 10960 */ MCD_OPC_Decode, 133, 6, 160, 1, // Opcode: VCVTxu2fd /* 10965 */ MCD_OPC_FilterValue, 15, 50, 0, // Skip to: 11019 /* 10969 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 10972 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10985 /* 10976 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 10998 /* 10980 */ MCD_OPC_Decode, 250, 5, 160, 1, // Opcode: VCVTf2xsd /* 10985 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 10998 /* 10989 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 10998 /* 10993 */ MCD_OPC_Decode, 252, 5, 160, 1, // Opcode: VCVTf2xud /* 10998 */ MCD_OPC_CheckPredicate, 16, 17, 0, // Skip to: 11019 /* 11002 */ MCD_OPC_CheckField, 19, 3, 0, 11, 0, // Skip to: 11019 /* 11008 */ MCD_OPC_CheckField, 5, 1, 0, 5, 0, // Skip to: 11019 /* 11014 */ MCD_OPC_Decode, 221, 10, 159, 1, // Opcode: VMOVv2f32 /* 11019 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 11022 */ MCD_OPC_FilterValue, 0, 77, 0, // Skip to: 11103 /* 11026 */ MCD_OPC_ExtractField, 19, 3, // Inst{21-19} ... /* 11029 */ MCD_OPC_FilterValue, 0, 210, 13, // Skip to: 14571 /* 11033 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 11036 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 11055 /* 11040 */ MCD_OPC_CheckPredicate, 16, 50, 0, // Skip to: 11094 /* 11044 */ MCD_OPC_CheckField, 10, 2, 2, 44, 0, // Skip to: 11094 /* 11050 */ MCD_OPC_Decode, 225, 10, 159, 1, // Opcode: VMOVv4i16 /* 11055 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 11094 /* 11059 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 11062 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11075 /* 11066 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 11094 /* 11070 */ MCD_OPC_Decode, 169, 11, 159, 1, // Opcode: VORRiv2i32 /* 11075 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 11094 /* 11079 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 11094 /* 11083 */ MCD_OPC_CheckField, 10, 1, 0, 5, 0, // Skip to: 11094 /* 11089 */ MCD_OPC_Decode, 170, 11, 159, 1, // Opcode: VORRiv4i16 /* 11094 */ MCD_OPC_CheckPredicate, 16, 145, 13, // Skip to: 14571 /* 11098 */ MCD_OPC_Decode, 222, 10, 159, 1, // Opcode: VMOVv2i32 /* 11103 */ MCD_OPC_FilterValue, 1, 136, 13, // Skip to: 14571 /* 11107 */ MCD_OPC_ExtractField, 19, 3, // Inst{21-19} ... /* 11110 */ MCD_OPC_FilterValue, 0, 129, 13, // Skip to: 14571 /* 11114 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 11117 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 11136 /* 11121 */ MCD_OPC_CheckPredicate, 16, 50, 0, // Skip to: 11175 /* 11125 */ MCD_OPC_CheckField, 10, 2, 2, 44, 0, // Skip to: 11175 /* 11131 */ MCD_OPC_Decode, 147, 11, 159, 1, // Opcode: VMVNv4i16 /* 11136 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 11175 /* 11140 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 11143 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11156 /* 11147 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 11175 /* 11151 */ MCD_OPC_Decode, 222, 4, 159, 1, // Opcode: VBICiv2i32 /* 11156 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 11175 /* 11160 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 11175 /* 11164 */ MCD_OPC_CheckField, 10, 1, 0, 5, 0, // Skip to: 11175 /* 11170 */ MCD_OPC_Decode, 223, 4, 159, 1, // Opcode: VBICiv4i16 /* 11175 */ MCD_OPC_CheckPredicate, 16, 64, 13, // Skip to: 14571 /* 11179 */ MCD_OPC_Decode, 146, 11, 159, 1, // Opcode: VMVNv2i32 /* 11184 */ MCD_OPC_FilterValue, 1, 55, 13, // Skip to: 14571 /* 11188 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 11191 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 11226 /* 11195 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11198 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 11212 /* 11203 */ MCD_OPC_CheckPredicate, 16, 36, 13, // Skip to: 14571 /* 11207 */ MCD_OPC_Decode, 154, 14, 161, 1, // Opcode: VSHRsv1i64 /* 11212 */ MCD_OPC_FilterValue, 243, 1, 26, 13, // Skip to: 14571 /* 11217 */ MCD_OPC_CheckPredicate, 16, 22, 13, // Skip to: 14571 /* 11221 */ MCD_OPC_Decode, 162, 14, 161, 1, // Opcode: VSHRuv1i64 /* 11226 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 11261 /* 11230 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11233 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 11247 /* 11238 */ MCD_OPC_CheckPredicate, 16, 1, 13, // Skip to: 14571 /* 11242 */ MCD_OPC_Decode, 186, 14, 162, 1, // Opcode: VSRAsv1i64 /* 11247 */ MCD_OPC_FilterValue, 243, 1, 247, 12, // Skip to: 14571 /* 11252 */ MCD_OPC_CheckPredicate, 16, 243, 12, // Skip to: 14571 /* 11256 */ MCD_OPC_Decode, 194, 14, 162, 1, // Opcode: VSRAuv1i64 /* 11261 */ MCD_OPC_FilterValue, 2, 31, 0, // Skip to: 11296 /* 11265 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11268 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 11282 /* 11273 */ MCD_OPC_CheckPredicate, 16, 222, 12, // Skip to: 14571 /* 11277 */ MCD_OPC_Decode, 194, 13, 161, 1, // Opcode: VRSHRsv1i64 /* 11282 */ MCD_OPC_FilterValue, 243, 1, 212, 12, // Skip to: 14571 /* 11287 */ MCD_OPC_CheckPredicate, 16, 208, 12, // Skip to: 14571 /* 11291 */ MCD_OPC_Decode, 202, 13, 161, 1, // Opcode: VRSHRuv1i64 /* 11296 */ MCD_OPC_FilterValue, 3, 31, 0, // Skip to: 11331 /* 11300 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11303 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 11317 /* 11308 */ MCD_OPC_CheckPredicate, 16, 187, 12, // Skip to: 14571 /* 11312 */ MCD_OPC_Decode, 216, 13, 162, 1, // Opcode: VRSRAsv1i64 /* 11317 */ MCD_OPC_FilterValue, 243, 1, 177, 12, // Skip to: 14571 /* 11322 */ MCD_OPC_CheckPredicate, 16, 173, 12, // Skip to: 14571 /* 11326 */ MCD_OPC_Decode, 224, 13, 162, 1, // Opcode: VRSRAuv1i64 /* 11331 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 11351 /* 11335 */ MCD_OPC_CheckPredicate, 16, 160, 12, // Skip to: 14571 /* 11339 */ MCD_OPC_CheckField, 24, 8, 243, 1, 153, 12, // Skip to: 14571 /* 11346 */ MCD_OPC_Decode, 202, 14, 162, 1, // Opcode: VSRIv1i64 /* 11351 */ MCD_OPC_FilterValue, 5, 31, 0, // Skip to: 11386 /* 11355 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11358 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 11372 /* 11363 */ MCD_OPC_CheckPredicate, 16, 132, 12, // Skip to: 14571 /* 11367 */ MCD_OPC_Decode, 255, 13, 163, 1, // Opcode: VSHLiv1i64 /* 11372 */ MCD_OPC_FilterValue, 243, 1, 122, 12, // Skip to: 14571 /* 11377 */ MCD_OPC_CheckPredicate, 16, 118, 12, // Skip to: 14571 /* 11381 */ MCD_OPC_Decode, 174, 14, 164, 1, // Opcode: VSLIv1i64 /* 11386 */ MCD_OPC_FilterValue, 6, 16, 0, // Skip to: 11406 /* 11390 */ MCD_OPC_CheckPredicate, 16, 105, 12, // Skip to: 14571 /* 11394 */ MCD_OPC_CheckField, 24, 8, 243, 1, 98, 12, // Skip to: 14571 /* 11401 */ MCD_OPC_Decode, 187, 12, 163, 1, // Opcode: VQSHLsuv1i64 /* 11406 */ MCD_OPC_FilterValue, 7, 89, 12, // Skip to: 14571 /* 11410 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11413 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 11427 /* 11418 */ MCD_OPC_CheckPredicate, 16, 77, 12, // Skip to: 14571 /* 11422 */ MCD_OPC_Decode, 179, 12, 163, 1, // Opcode: VQSHLsiv1i64 /* 11427 */ MCD_OPC_FilterValue, 243, 1, 67, 12, // Skip to: 14571 /* 11432 */ MCD_OPC_CheckPredicate, 16, 63, 12, // Skip to: 14571 /* 11436 */ MCD_OPC_Decode, 203, 12, 163, 1, // Opcode: VQSHLuiv1i64 /* 11441 */ MCD_OPC_FilterValue, 1, 54, 12, // Skip to: 14571 /* 11445 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 11448 */ MCD_OPC_FilterValue, 0, 114, 5, // Skip to: 12846 /* 11452 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 11455 */ MCD_OPC_FilterValue, 0, 135, 0, // Skip to: 11594 /* 11459 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 11462 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 11495 /* 11466 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11469 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11482 /* 11474 */ MCD_OPC_CheckPredicate, 16, 21, 12, // Skip to: 14571 /* 11478 */ MCD_OPC_Decode, 222, 11, 97, // Opcode: VQADDsv16i8 /* 11482 */ MCD_OPC_FilterValue, 243, 1, 12, 12, // Skip to: 14571 /* 11487 */ MCD_OPC_CheckPredicate, 16, 8, 12, // Skip to: 14571 /* 11491 */ MCD_OPC_Decode, 230, 11, 97, // Opcode: VQADDuv16i8 /* 11495 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 11528 /* 11499 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11502 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11515 /* 11507 */ MCD_OPC_CheckPredicate, 16, 244, 11, // Skip to: 14571 /* 11511 */ MCD_OPC_Decode, 228, 11, 97, // Opcode: VQADDsv8i16 /* 11515 */ MCD_OPC_FilterValue, 243, 1, 235, 11, // Skip to: 14571 /* 11520 */ MCD_OPC_CheckPredicate, 16, 231, 11, // Skip to: 14571 /* 11524 */ MCD_OPC_Decode, 236, 11, 97, // Opcode: VQADDuv8i16 /* 11528 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 11561 /* 11532 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11535 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11548 /* 11540 */ MCD_OPC_CheckPredicate, 16, 211, 11, // Skip to: 14571 /* 11544 */ MCD_OPC_Decode, 227, 11, 97, // Opcode: VQADDsv4i32 /* 11548 */ MCD_OPC_FilterValue, 243, 1, 202, 11, // Skip to: 14571 /* 11553 */ MCD_OPC_CheckPredicate, 16, 198, 11, // Skip to: 14571 /* 11557 */ MCD_OPC_Decode, 235, 11, 97, // Opcode: VQADDuv4i32 /* 11561 */ MCD_OPC_FilterValue, 3, 190, 11, // Skip to: 14571 /* 11565 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11568 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11581 /* 11573 */ MCD_OPC_CheckPredicate, 16, 178, 11, // Skip to: 14571 /* 11577 */ MCD_OPC_Decode, 225, 11, 97, // Opcode: VQADDsv2i64 /* 11581 */ MCD_OPC_FilterValue, 243, 1, 169, 11, // Skip to: 14571 /* 11586 */ MCD_OPC_CheckPredicate, 16, 165, 11, // Skip to: 14571 /* 11590 */ MCD_OPC_Decode, 233, 11, 97, // Opcode: VQADDuv2i64 /* 11594 */ MCD_OPC_FilterValue, 1, 135, 0, // Skip to: 11733 /* 11598 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 11601 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 11634 /* 11605 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11608 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11621 /* 11613 */ MCD_OPC_CheckPredicate, 16, 138, 11, // Skip to: 14571 /* 11617 */ MCD_OPC_Decode, 220, 4, 97, // Opcode: VANDq /* 11621 */ MCD_OPC_FilterValue, 243, 1, 129, 11, // Skip to: 14571 /* 11626 */ MCD_OPC_CheckPredicate, 16, 125, 11, // Skip to: 14571 /* 11630 */ MCD_OPC_Decode, 150, 6, 97, // Opcode: VEORq /* 11634 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 11667 /* 11638 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11641 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11654 /* 11646 */ MCD_OPC_CheckPredicate, 16, 105, 11, // Skip to: 14571 /* 11650 */ MCD_OPC_Decode, 226, 4, 97, // Opcode: VBICq /* 11654 */ MCD_OPC_FilterValue, 243, 1, 96, 11, // Skip to: 14571 /* 11659 */ MCD_OPC_CheckPredicate, 16, 92, 11, // Skip to: 14571 /* 11663 */ MCD_OPC_Decode, 232, 4, 105, // Opcode: VBSLq /* 11667 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 11700 /* 11671 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11674 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11687 /* 11679 */ MCD_OPC_CheckPredicate, 16, 72, 11, // Skip to: 14571 /* 11683 */ MCD_OPC_Decode, 173, 11, 97, // Opcode: VORRq /* 11687 */ MCD_OPC_FilterValue, 243, 1, 63, 11, // Skip to: 14571 /* 11692 */ MCD_OPC_CheckPredicate, 16, 59, 11, // Skip to: 14571 /* 11696 */ MCD_OPC_Decode, 230, 4, 105, // Opcode: VBITq /* 11700 */ MCD_OPC_FilterValue, 3, 51, 11, // Skip to: 14571 /* 11704 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11707 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11720 /* 11712 */ MCD_OPC_CheckPredicate, 16, 39, 11, // Skip to: 14571 /* 11716 */ MCD_OPC_Decode, 167, 11, 97, // Opcode: VORNq /* 11720 */ MCD_OPC_FilterValue, 243, 1, 30, 11, // Skip to: 14571 /* 11725 */ MCD_OPC_CheckPredicate, 16, 26, 11, // Skip to: 14571 /* 11729 */ MCD_OPC_Decode, 228, 4, 105, // Opcode: VBIFq /* 11733 */ MCD_OPC_FilterValue, 2, 135, 0, // Skip to: 11872 /* 11737 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 11740 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 11773 /* 11744 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11747 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11760 /* 11752 */ MCD_OPC_CheckPredicate, 16, 255, 10, // Skip to: 14571 /* 11756 */ MCD_OPC_Decode, 227, 12, 97, // Opcode: VQSUBsv16i8 /* 11760 */ MCD_OPC_FilterValue, 243, 1, 246, 10, // Skip to: 14571 /* 11765 */ MCD_OPC_CheckPredicate, 16, 242, 10, // Skip to: 14571 /* 11769 */ MCD_OPC_Decode, 235, 12, 97, // Opcode: VQSUBuv16i8 /* 11773 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 11806 /* 11777 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11780 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11793 /* 11785 */ MCD_OPC_CheckPredicate, 16, 222, 10, // Skip to: 14571 /* 11789 */ MCD_OPC_Decode, 233, 12, 97, // Opcode: VQSUBsv8i16 /* 11793 */ MCD_OPC_FilterValue, 243, 1, 213, 10, // Skip to: 14571 /* 11798 */ MCD_OPC_CheckPredicate, 16, 209, 10, // Skip to: 14571 /* 11802 */ MCD_OPC_Decode, 241, 12, 97, // Opcode: VQSUBuv8i16 /* 11806 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 11839 /* 11810 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11813 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11826 /* 11818 */ MCD_OPC_CheckPredicate, 16, 189, 10, // Skip to: 14571 /* 11822 */ MCD_OPC_Decode, 232, 12, 97, // Opcode: VQSUBsv4i32 /* 11826 */ MCD_OPC_FilterValue, 243, 1, 180, 10, // Skip to: 14571 /* 11831 */ MCD_OPC_CheckPredicate, 16, 176, 10, // Skip to: 14571 /* 11835 */ MCD_OPC_Decode, 240, 12, 97, // Opcode: VQSUBuv4i32 /* 11839 */ MCD_OPC_FilterValue, 3, 168, 10, // Skip to: 14571 /* 11843 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11846 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11859 /* 11851 */ MCD_OPC_CheckPredicate, 16, 156, 10, // Skip to: 14571 /* 11855 */ MCD_OPC_Decode, 230, 12, 97, // Opcode: VQSUBsv2i64 /* 11859 */ MCD_OPC_FilterValue, 243, 1, 147, 10, // Skip to: 14571 /* 11864 */ MCD_OPC_CheckPredicate, 16, 143, 10, // Skip to: 14571 /* 11868 */ MCD_OPC_Decode, 238, 12, 97, // Opcode: VQSUBuv2i64 /* 11872 */ MCD_OPC_FilterValue, 3, 102, 0, // Skip to: 11978 /* 11876 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 11879 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 11912 /* 11883 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11886 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11899 /* 11891 */ MCD_OPC_CheckPredicate, 16, 116, 10, // Skip to: 14571 /* 11895 */ MCD_OPC_Decode, 251, 4, 97, // Opcode: VCGEsv16i8 /* 11899 */ MCD_OPC_FilterValue, 243, 1, 107, 10, // Skip to: 14571 /* 11904 */ MCD_OPC_CheckPredicate, 16, 103, 10, // Skip to: 14571 /* 11908 */ MCD_OPC_Decode, 129, 5, 97, // Opcode: VCGEuv16i8 /* 11912 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 11945 /* 11916 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11919 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11932 /* 11924 */ MCD_OPC_CheckPredicate, 16, 83, 10, // Skip to: 14571 /* 11928 */ MCD_OPC_Decode, 255, 4, 97, // Opcode: VCGEsv8i16 /* 11932 */ MCD_OPC_FilterValue, 243, 1, 74, 10, // Skip to: 14571 /* 11937 */ MCD_OPC_CheckPredicate, 16, 70, 10, // Skip to: 14571 /* 11941 */ MCD_OPC_Decode, 133, 5, 97, // Opcode: VCGEuv8i16 /* 11945 */ MCD_OPC_FilterValue, 2, 62, 10, // Skip to: 14571 /* 11949 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11952 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 11965 /* 11957 */ MCD_OPC_CheckPredicate, 16, 50, 10, // Skip to: 14571 /* 11961 */ MCD_OPC_Decode, 254, 4, 97, // Opcode: VCGEsv4i32 /* 11965 */ MCD_OPC_FilterValue, 243, 1, 41, 10, // Skip to: 14571 /* 11970 */ MCD_OPC_CheckPredicate, 16, 37, 10, // Skip to: 14571 /* 11974 */ MCD_OPC_Decode, 132, 5, 97, // Opcode: VCGEuv4i32 /* 11978 */ MCD_OPC_FilterValue, 4, 135, 0, // Skip to: 12117 /* 11982 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 11985 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12018 /* 11989 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 11992 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12005 /* 11997 */ MCD_OPC_CheckPredicate, 16, 10, 10, // Skip to: 14571 /* 12001 */ MCD_OPC_Decode, 194, 12, 101, // Opcode: VQSHLsv16i8 /* 12005 */ MCD_OPC_FilterValue, 243, 1, 1, 10, // Skip to: 14571 /* 12010 */ MCD_OPC_CheckPredicate, 16, 253, 9, // Skip to: 14571 /* 12014 */ MCD_OPC_Decode, 210, 12, 101, // Opcode: VQSHLuv16i8 /* 12018 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 12051 /* 12022 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12025 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12038 /* 12030 */ MCD_OPC_CheckPredicate, 16, 233, 9, // Skip to: 14571 /* 12034 */ MCD_OPC_Decode, 200, 12, 101, // Opcode: VQSHLsv8i16 /* 12038 */ MCD_OPC_FilterValue, 243, 1, 224, 9, // Skip to: 14571 /* 12043 */ MCD_OPC_CheckPredicate, 16, 220, 9, // Skip to: 14571 /* 12047 */ MCD_OPC_Decode, 216, 12, 101, // Opcode: VQSHLuv8i16 /* 12051 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 12084 /* 12055 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12058 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12071 /* 12063 */ MCD_OPC_CheckPredicate, 16, 200, 9, // Skip to: 14571 /* 12067 */ MCD_OPC_Decode, 199, 12, 101, // Opcode: VQSHLsv4i32 /* 12071 */ MCD_OPC_FilterValue, 243, 1, 191, 9, // Skip to: 14571 /* 12076 */ MCD_OPC_CheckPredicate, 16, 187, 9, // Skip to: 14571 /* 12080 */ MCD_OPC_Decode, 215, 12, 101, // Opcode: VQSHLuv4i32 /* 12084 */ MCD_OPC_FilterValue, 3, 179, 9, // Skip to: 14571 /* 12088 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12091 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12104 /* 12096 */ MCD_OPC_CheckPredicate, 16, 167, 9, // Skip to: 14571 /* 12100 */ MCD_OPC_Decode, 197, 12, 101, // Opcode: VQSHLsv2i64 /* 12104 */ MCD_OPC_FilterValue, 243, 1, 158, 9, // Skip to: 14571 /* 12109 */ MCD_OPC_CheckPredicate, 16, 154, 9, // Skip to: 14571 /* 12113 */ MCD_OPC_Decode, 213, 12, 101, // Opcode: VQSHLuv2i64 /* 12117 */ MCD_OPC_FilterValue, 5, 135, 0, // Skip to: 12256 /* 12121 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12124 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12157 /* 12128 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12131 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12144 /* 12136 */ MCD_OPC_CheckPredicate, 16, 127, 9, // Skip to: 14571 /* 12140 */ MCD_OPC_Decode, 153, 12, 101, // Opcode: VQRSHLsv16i8 /* 12144 */ MCD_OPC_FilterValue, 243, 1, 118, 9, // Skip to: 14571 /* 12149 */ MCD_OPC_CheckPredicate, 16, 114, 9, // Skip to: 14571 /* 12153 */ MCD_OPC_Decode, 161, 12, 101, // Opcode: VQRSHLuv16i8 /* 12157 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 12190 /* 12161 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12164 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12177 /* 12169 */ MCD_OPC_CheckPredicate, 16, 94, 9, // Skip to: 14571 /* 12173 */ MCD_OPC_Decode, 159, 12, 101, // Opcode: VQRSHLsv8i16 /* 12177 */ MCD_OPC_FilterValue, 243, 1, 85, 9, // Skip to: 14571 /* 12182 */ MCD_OPC_CheckPredicate, 16, 81, 9, // Skip to: 14571 /* 12186 */ MCD_OPC_Decode, 167, 12, 101, // Opcode: VQRSHLuv8i16 /* 12190 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 12223 /* 12194 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12197 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12210 /* 12202 */ MCD_OPC_CheckPredicate, 16, 61, 9, // Skip to: 14571 /* 12206 */ MCD_OPC_Decode, 158, 12, 101, // Opcode: VQRSHLsv4i32 /* 12210 */ MCD_OPC_FilterValue, 243, 1, 52, 9, // Skip to: 14571 /* 12215 */ MCD_OPC_CheckPredicate, 16, 48, 9, // Skip to: 14571 /* 12219 */ MCD_OPC_Decode, 166, 12, 101, // Opcode: VQRSHLuv4i32 /* 12223 */ MCD_OPC_FilterValue, 3, 40, 9, // Skip to: 14571 /* 12227 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12230 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12243 /* 12235 */ MCD_OPC_CheckPredicate, 16, 28, 9, // Skip to: 14571 /* 12239 */ MCD_OPC_Decode, 156, 12, 101, // Opcode: VQRSHLsv2i64 /* 12243 */ MCD_OPC_FilterValue, 243, 1, 19, 9, // Skip to: 14571 /* 12248 */ MCD_OPC_CheckPredicate, 16, 15, 9, // Skip to: 14571 /* 12252 */ MCD_OPC_Decode, 164, 12, 101, // Opcode: VQRSHLuv2i64 /* 12256 */ MCD_OPC_FilterValue, 6, 102, 0, // Skip to: 12362 /* 12260 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12263 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12296 /* 12267 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12270 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12283 /* 12275 */ MCD_OPC_CheckPredicate, 16, 244, 8, // Skip to: 14571 /* 12279 */ MCD_OPC_Decode, 134, 10, 97, // Opcode: VMINsv16i8 /* 12283 */ MCD_OPC_FilterValue, 243, 1, 235, 8, // Skip to: 14571 /* 12288 */ MCD_OPC_CheckPredicate, 16, 231, 8, // Skip to: 14571 /* 12292 */ MCD_OPC_Decode, 140, 10, 97, // Opcode: VMINuv16i8 /* 12296 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 12329 /* 12300 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12303 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12316 /* 12308 */ MCD_OPC_CheckPredicate, 16, 211, 8, // Skip to: 14571 /* 12312 */ MCD_OPC_Decode, 138, 10, 97, // Opcode: VMINsv8i16 /* 12316 */ MCD_OPC_FilterValue, 243, 1, 202, 8, // Skip to: 14571 /* 12321 */ MCD_OPC_CheckPredicate, 16, 198, 8, // Skip to: 14571 /* 12325 */ MCD_OPC_Decode, 144, 10, 97, // Opcode: VMINuv8i16 /* 12329 */ MCD_OPC_FilterValue, 2, 190, 8, // Skip to: 14571 /* 12333 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12336 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12349 /* 12341 */ MCD_OPC_CheckPredicate, 16, 178, 8, // Skip to: 14571 /* 12345 */ MCD_OPC_Decode, 137, 10, 97, // Opcode: VMINsv4i32 /* 12349 */ MCD_OPC_FilterValue, 243, 1, 169, 8, // Skip to: 14571 /* 12354 */ MCD_OPC_CheckPredicate, 16, 165, 8, // Skip to: 14571 /* 12358 */ MCD_OPC_Decode, 143, 10, 97, // Opcode: VMINuv4i32 /* 12362 */ MCD_OPC_FilterValue, 7, 102, 0, // Skip to: 12468 /* 12366 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12369 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12402 /* 12373 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12376 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12389 /* 12381 */ MCD_OPC_CheckPredicate, 16, 138, 8, // Skip to: 14571 /* 12385 */ MCD_OPC_Decode, 146, 4, 105, // Opcode: VABAsv16i8 /* 12389 */ MCD_OPC_FilterValue, 243, 1, 129, 8, // Skip to: 14571 /* 12394 */ MCD_OPC_CheckPredicate, 16, 125, 8, // Skip to: 14571 /* 12398 */ MCD_OPC_Decode, 152, 4, 105, // Opcode: VABAuv16i8 /* 12402 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 12435 /* 12406 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12409 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12422 /* 12414 */ MCD_OPC_CheckPredicate, 16, 105, 8, // Skip to: 14571 /* 12418 */ MCD_OPC_Decode, 150, 4, 105, // Opcode: VABAsv8i16 /* 12422 */ MCD_OPC_FilterValue, 243, 1, 96, 8, // Skip to: 14571 /* 12427 */ MCD_OPC_CheckPredicate, 16, 92, 8, // Skip to: 14571 /* 12431 */ MCD_OPC_Decode, 156, 4, 105, // Opcode: VABAuv8i16 /* 12435 */ MCD_OPC_FilterValue, 2, 84, 8, // Skip to: 14571 /* 12439 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12442 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12455 /* 12447 */ MCD_OPC_CheckPredicate, 16, 72, 8, // Skip to: 14571 /* 12451 */ MCD_OPC_Decode, 149, 4, 105, // Opcode: VABAsv4i32 /* 12455 */ MCD_OPC_FilterValue, 243, 1, 63, 8, // Skip to: 14571 /* 12460 */ MCD_OPC_CheckPredicate, 16, 59, 8, // Skip to: 14571 /* 12464 */ MCD_OPC_Decode, 155, 4, 105, // Opcode: VABAuv4i32 /* 12468 */ MCD_OPC_FilterValue, 8, 102, 0, // Skip to: 12574 /* 12472 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12475 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12508 /* 12479 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12482 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12495 /* 12487 */ MCD_OPC_CheckPredicate, 16, 32, 8, // Skip to: 14571 /* 12491 */ MCD_OPC_Decode, 203, 17, 97, // Opcode: VTSTv16i8 /* 12495 */ MCD_OPC_FilterValue, 243, 1, 23, 8, // Skip to: 14571 /* 12500 */ MCD_OPC_CheckPredicate, 16, 19, 8, // Skip to: 14571 /* 12504 */ MCD_OPC_Decode, 235, 4, 97, // Opcode: VCEQv16i8 /* 12508 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 12541 /* 12512 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12515 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12528 /* 12520 */ MCD_OPC_CheckPredicate, 16, 255, 7, // Skip to: 14571 /* 12524 */ MCD_OPC_Decode, 207, 17, 97, // Opcode: VTSTv8i16 /* 12528 */ MCD_OPC_FilterValue, 243, 1, 246, 7, // Skip to: 14571 /* 12533 */ MCD_OPC_CheckPredicate, 16, 242, 7, // Skip to: 14571 /* 12537 */ MCD_OPC_Decode, 239, 4, 97, // Opcode: VCEQv8i16 /* 12541 */ MCD_OPC_FilterValue, 2, 234, 7, // Skip to: 14571 /* 12545 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12548 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12561 /* 12553 */ MCD_OPC_CheckPredicate, 16, 222, 7, // Skip to: 14571 /* 12557 */ MCD_OPC_Decode, 206, 17, 97, // Opcode: VTSTv4i32 /* 12561 */ MCD_OPC_FilterValue, 243, 1, 213, 7, // Skip to: 14571 /* 12566 */ MCD_OPC_CheckPredicate, 16, 209, 7, // Skip to: 14571 /* 12570 */ MCD_OPC_Decode, 238, 4, 97, // Opcode: VCEQv4i32 /* 12574 */ MCD_OPC_FilterValue, 9, 74, 0, // Skip to: 12652 /* 12578 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12581 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12614 /* 12585 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12588 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12601 /* 12593 */ MCD_OPC_CheckPredicate, 16, 182, 7, // Skip to: 14571 /* 12597 */ MCD_OPC_Decode, 138, 11, 97, // Opcode: VMULv16i8 /* 12601 */ MCD_OPC_FilterValue, 243, 1, 173, 7, // Skip to: 14571 /* 12606 */ MCD_OPC_CheckPredicate, 16, 169, 7, // Skip to: 14571 /* 12610 */ MCD_OPC_Decode, 131, 11, 97, // Opcode: VMULpq /* 12614 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 12633 /* 12618 */ MCD_OPC_CheckPredicate, 16, 157, 7, // Skip to: 14571 /* 12622 */ MCD_OPC_CheckField, 24, 8, 242, 1, 150, 7, // Skip to: 14571 /* 12629 */ MCD_OPC_Decode, 142, 11, 97, // Opcode: VMULv8i16 /* 12633 */ MCD_OPC_FilterValue, 2, 142, 7, // Skip to: 14571 /* 12637 */ MCD_OPC_CheckPredicate, 16, 138, 7, // Skip to: 14571 /* 12641 */ MCD_OPC_CheckField, 24, 8, 242, 1, 131, 7, // Skip to: 14571 /* 12648 */ MCD_OPC_Decode, 141, 11, 97, // Opcode: VMULv4i32 /* 12652 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 12697 /* 12656 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12659 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 12678 /* 12663 */ MCD_OPC_CheckPredicate, 19, 112, 7, // Skip to: 14571 /* 12667 */ MCD_OPC_CheckField, 24, 8, 242, 1, 105, 7, // Skip to: 14571 /* 12674 */ MCD_OPC_Decode, 161, 6, 105, // Opcode: VFMAfq /* 12678 */ MCD_OPC_FilterValue, 2, 97, 7, // Skip to: 14571 /* 12682 */ MCD_OPC_CheckPredicate, 19, 93, 7, // Skip to: 14571 /* 12686 */ MCD_OPC_CheckField, 24, 8, 242, 1, 86, 7, // Skip to: 14571 /* 12693 */ MCD_OPC_Decode, 165, 6, 105, // Opcode: VFMSfq /* 12697 */ MCD_OPC_FilterValue, 13, 55, 0, // Skip to: 12756 /* 12701 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12704 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 12737 /* 12708 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 12711 */ MCD_OPC_FilterValue, 242, 1, 8, 0, // Skip to: 12724 /* 12716 */ MCD_OPC_CheckPredicate, 16, 59, 7, // Skip to: 14571 /* 12720 */ MCD_OPC_Decode, 159, 10, 105, // Opcode: VMLAfq /* 12724 */ MCD_OPC_FilterValue, 243, 1, 50, 7, // Skip to: 14571 /* 12729 */ MCD_OPC_CheckPredicate, 16, 46, 7, // Skip to: 14571 /* 12733 */ MCD_OPC_Decode, 129, 11, 97, // Opcode: VMULfq /* 12737 */ MCD_OPC_FilterValue, 2, 38, 7, // Skip to: 14571 /* 12741 */ MCD_OPC_CheckPredicate, 16, 34, 7, // Skip to: 14571 /* 12745 */ MCD_OPC_CheckField, 24, 8, 242, 1, 27, 7, // Skip to: 14571 /* 12752 */ MCD_OPC_Decode, 185, 10, 105, // Opcode: VMLSfq /* 12756 */ MCD_OPC_FilterValue, 14, 41, 0, // Skip to: 12801 /* 12760 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12763 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 12782 /* 12767 */ MCD_OPC_CheckPredicate, 16, 8, 7, // Skip to: 14571 /* 12771 */ MCD_OPC_CheckField, 24, 8, 243, 1, 1, 7, // Skip to: 14571 /* 12778 */ MCD_OPC_Decode, 189, 4, 97, // Opcode: VACGEq /* 12782 */ MCD_OPC_FilterValue, 2, 249, 6, // Skip to: 14571 /* 12786 */ MCD_OPC_CheckPredicate, 16, 245, 6, // Skip to: 14571 /* 12790 */ MCD_OPC_CheckField, 24, 8, 243, 1, 238, 6, // Skip to: 14571 /* 12797 */ MCD_OPC_Decode, 191, 4, 97, // Opcode: VACGTq /* 12801 */ MCD_OPC_FilterValue, 15, 230, 6, // Skip to: 14571 /* 12805 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 12808 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 12827 /* 12812 */ MCD_OPC_CheckPredicate, 16, 219, 6, // Skip to: 14571 /* 12816 */ MCD_OPC_CheckField, 24, 8, 242, 1, 212, 6, // Skip to: 14571 /* 12823 */ MCD_OPC_Decode, 251, 12, 97, // Opcode: VRECPSfq /* 12827 */ MCD_OPC_FilterValue, 2, 204, 6, // Skip to: 14571 /* 12831 */ MCD_OPC_CheckPredicate, 16, 200, 6, // Skip to: 14571 /* 12835 */ MCD_OPC_CheckField, 24, 8, 242, 1, 193, 6, // Skip to: 14571 /* 12842 */ MCD_OPC_Decode, 214, 13, 97, // Opcode: VRSQRTSfq /* 12846 */ MCD_OPC_FilterValue, 1, 185, 6, // Skip to: 14571 /* 12850 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 12853 */ MCD_OPC_FilterValue, 0, 177, 5, // Skip to: 14314 /* 12857 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ... /* 12860 */ MCD_OPC_FilterValue, 121, 171, 6, // Skip to: 14571 /* 12864 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 12867 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 12992 /* 12871 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 12874 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 12959 /* 12878 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 12881 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 12926 /* 12885 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 12888 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 12907 /* 12892 */ MCD_OPC_CheckPredicate, 16, 229, 4, // Skip to: 14149 /* 12896 */ MCD_OPC_CheckField, 19, 1, 1, 223, 4, // Skip to: 14149 /* 12902 */ MCD_OPC_Decode, 153, 14, 165, 1, // Opcode: VSHRsv16i8 /* 12907 */ MCD_OPC_FilterValue, 1, 214, 4, // Skip to: 14149 /* 12911 */ MCD_OPC_CheckPredicate, 16, 210, 4, // Skip to: 14149 /* 12915 */ MCD_OPC_CheckField, 19, 1, 1, 204, 4, // Skip to: 14149 /* 12921 */ MCD_OPC_Decode, 161, 14, 165, 1, // Opcode: VSHRuv16i8 /* 12926 */ MCD_OPC_FilterValue, 1, 195, 4, // Skip to: 14149 /* 12930 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 12933 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 12946 /* 12937 */ MCD_OPC_CheckPredicate, 16, 184, 4, // Skip to: 14149 /* 12941 */ MCD_OPC_Decode, 159, 14, 166, 1, // Opcode: VSHRsv8i16 /* 12946 */ MCD_OPC_FilterValue, 1, 175, 4, // Skip to: 14149 /* 12950 */ MCD_OPC_CheckPredicate, 16, 171, 4, // Skip to: 14149 /* 12954 */ MCD_OPC_Decode, 167, 14, 166, 1, // Opcode: VSHRuv8i16 /* 12959 */ MCD_OPC_FilterValue, 1, 162, 4, // Skip to: 14149 /* 12963 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 12966 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 12979 /* 12970 */ MCD_OPC_CheckPredicate, 16, 151, 4, // Skip to: 14149 /* 12974 */ MCD_OPC_Decode, 158, 14, 167, 1, // Opcode: VSHRsv4i32 /* 12979 */ MCD_OPC_FilterValue, 1, 142, 4, // Skip to: 14149 /* 12983 */ MCD_OPC_CheckPredicate, 16, 138, 4, // Skip to: 14149 /* 12987 */ MCD_OPC_Decode, 166, 14, 167, 1, // Opcode: VSHRuv4i32 /* 12992 */ MCD_OPC_FilterValue, 1, 121, 0, // Skip to: 13117 /* 12996 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 12999 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13084 /* 13003 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13006 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13051 /* 13010 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13013 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13032 /* 13017 */ MCD_OPC_CheckPredicate, 16, 104, 4, // Skip to: 14149 /* 13021 */ MCD_OPC_CheckField, 19, 1, 1, 98, 4, // Skip to: 14149 /* 13027 */ MCD_OPC_Decode, 185, 14, 168, 1, // Opcode: VSRAsv16i8 /* 13032 */ MCD_OPC_FilterValue, 1, 89, 4, // Skip to: 14149 /* 13036 */ MCD_OPC_CheckPredicate, 16, 85, 4, // Skip to: 14149 /* 13040 */ MCD_OPC_CheckField, 19, 1, 1, 79, 4, // Skip to: 14149 /* 13046 */ MCD_OPC_Decode, 193, 14, 168, 1, // Opcode: VSRAuv16i8 /* 13051 */ MCD_OPC_FilterValue, 1, 70, 4, // Skip to: 14149 /* 13055 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13058 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13071 /* 13062 */ MCD_OPC_CheckPredicate, 16, 59, 4, // Skip to: 14149 /* 13066 */ MCD_OPC_Decode, 191, 14, 169, 1, // Opcode: VSRAsv8i16 /* 13071 */ MCD_OPC_FilterValue, 1, 50, 4, // Skip to: 14149 /* 13075 */ MCD_OPC_CheckPredicate, 16, 46, 4, // Skip to: 14149 /* 13079 */ MCD_OPC_Decode, 199, 14, 169, 1, // Opcode: VSRAuv8i16 /* 13084 */ MCD_OPC_FilterValue, 1, 37, 4, // Skip to: 14149 /* 13088 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13091 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13104 /* 13095 */ MCD_OPC_CheckPredicate, 16, 26, 4, // Skip to: 14149 /* 13099 */ MCD_OPC_Decode, 190, 14, 170, 1, // Opcode: VSRAsv4i32 /* 13104 */ MCD_OPC_FilterValue, 1, 17, 4, // Skip to: 14149 /* 13108 */ MCD_OPC_CheckPredicate, 16, 13, 4, // Skip to: 14149 /* 13112 */ MCD_OPC_Decode, 198, 14, 170, 1, // Opcode: VSRAuv4i32 /* 13117 */ MCD_OPC_FilterValue, 2, 121, 0, // Skip to: 13242 /* 13121 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13124 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13209 /* 13128 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13131 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13176 /* 13135 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13138 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13157 /* 13142 */ MCD_OPC_CheckPredicate, 16, 235, 3, // Skip to: 14149 /* 13146 */ MCD_OPC_CheckField, 19, 1, 1, 229, 3, // Skip to: 14149 /* 13152 */ MCD_OPC_Decode, 193, 13, 165, 1, // Opcode: VRSHRsv16i8 /* 13157 */ MCD_OPC_FilterValue, 1, 220, 3, // Skip to: 14149 /* 13161 */ MCD_OPC_CheckPredicate, 16, 216, 3, // Skip to: 14149 /* 13165 */ MCD_OPC_CheckField, 19, 1, 1, 210, 3, // Skip to: 14149 /* 13171 */ MCD_OPC_Decode, 201, 13, 165, 1, // Opcode: VRSHRuv16i8 /* 13176 */ MCD_OPC_FilterValue, 1, 201, 3, // Skip to: 14149 /* 13180 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13183 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13196 /* 13187 */ MCD_OPC_CheckPredicate, 16, 190, 3, // Skip to: 14149 /* 13191 */ MCD_OPC_Decode, 199, 13, 166, 1, // Opcode: VRSHRsv8i16 /* 13196 */ MCD_OPC_FilterValue, 1, 181, 3, // Skip to: 14149 /* 13200 */ MCD_OPC_CheckPredicate, 16, 177, 3, // Skip to: 14149 /* 13204 */ MCD_OPC_Decode, 207, 13, 166, 1, // Opcode: VRSHRuv8i16 /* 13209 */ MCD_OPC_FilterValue, 1, 168, 3, // Skip to: 14149 /* 13213 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13216 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13229 /* 13220 */ MCD_OPC_CheckPredicate, 16, 157, 3, // Skip to: 14149 /* 13224 */ MCD_OPC_Decode, 198, 13, 167, 1, // Opcode: VRSHRsv4i32 /* 13229 */ MCD_OPC_FilterValue, 1, 148, 3, // Skip to: 14149 /* 13233 */ MCD_OPC_CheckPredicate, 16, 144, 3, // Skip to: 14149 /* 13237 */ MCD_OPC_Decode, 206, 13, 167, 1, // Opcode: VRSHRuv4i32 /* 13242 */ MCD_OPC_FilterValue, 3, 121, 0, // Skip to: 13367 /* 13246 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13249 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13334 /* 13253 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13256 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13301 /* 13260 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13263 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13282 /* 13267 */ MCD_OPC_CheckPredicate, 16, 110, 3, // Skip to: 14149 /* 13271 */ MCD_OPC_CheckField, 19, 1, 1, 104, 3, // Skip to: 14149 /* 13277 */ MCD_OPC_Decode, 215, 13, 168, 1, // Opcode: VRSRAsv16i8 /* 13282 */ MCD_OPC_FilterValue, 1, 95, 3, // Skip to: 14149 /* 13286 */ MCD_OPC_CheckPredicate, 16, 91, 3, // Skip to: 14149 /* 13290 */ MCD_OPC_CheckField, 19, 1, 1, 85, 3, // Skip to: 14149 /* 13296 */ MCD_OPC_Decode, 223, 13, 168, 1, // Opcode: VRSRAuv16i8 /* 13301 */ MCD_OPC_FilterValue, 1, 76, 3, // Skip to: 14149 /* 13305 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13308 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13321 /* 13312 */ MCD_OPC_CheckPredicate, 16, 65, 3, // Skip to: 14149 /* 13316 */ MCD_OPC_Decode, 221, 13, 169, 1, // Opcode: VRSRAsv8i16 /* 13321 */ MCD_OPC_FilterValue, 1, 56, 3, // Skip to: 14149 /* 13325 */ MCD_OPC_CheckPredicate, 16, 52, 3, // Skip to: 14149 /* 13329 */ MCD_OPC_Decode, 229, 13, 169, 1, // Opcode: VRSRAuv8i16 /* 13334 */ MCD_OPC_FilterValue, 1, 43, 3, // Skip to: 14149 /* 13338 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13341 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13354 /* 13345 */ MCD_OPC_CheckPredicate, 16, 32, 3, // Skip to: 14149 /* 13349 */ MCD_OPC_Decode, 220, 13, 170, 1, // Opcode: VRSRAsv4i32 /* 13354 */ MCD_OPC_FilterValue, 1, 23, 3, // Skip to: 14149 /* 13358 */ MCD_OPC_CheckPredicate, 16, 19, 3, // Skip to: 14149 /* 13362 */ MCD_OPC_Decode, 228, 13, 170, 1, // Opcode: VRSRAuv4i32 /* 13367 */ MCD_OPC_FilterValue, 4, 73, 0, // Skip to: 13444 /* 13371 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13374 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 13425 /* 13378 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13381 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 13406 /* 13385 */ MCD_OPC_CheckPredicate, 16, 248, 2, // Skip to: 14149 /* 13389 */ MCD_OPC_CheckField, 24, 1, 1, 242, 2, // Skip to: 14149 /* 13395 */ MCD_OPC_CheckField, 19, 1, 1, 236, 2, // Skip to: 14149 /* 13401 */ MCD_OPC_Decode, 201, 14, 168, 1, // Opcode: VSRIv16i8 /* 13406 */ MCD_OPC_FilterValue, 1, 227, 2, // Skip to: 14149 /* 13410 */ MCD_OPC_CheckPredicate, 16, 223, 2, // Skip to: 14149 /* 13414 */ MCD_OPC_CheckField, 24, 1, 1, 217, 2, // Skip to: 14149 /* 13420 */ MCD_OPC_Decode, 207, 14, 169, 1, // Opcode: VSRIv8i16 /* 13425 */ MCD_OPC_FilterValue, 1, 208, 2, // Skip to: 14149 /* 13429 */ MCD_OPC_CheckPredicate, 16, 204, 2, // Skip to: 14149 /* 13433 */ MCD_OPC_CheckField, 24, 1, 1, 198, 2, // Skip to: 14149 /* 13439 */ MCD_OPC_Decode, 206, 14, 170, 1, // Opcode: VSRIv4i32 /* 13444 */ MCD_OPC_FilterValue, 5, 121, 0, // Skip to: 13569 /* 13448 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13451 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13536 /* 13455 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13458 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13503 /* 13462 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13465 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13484 /* 13469 */ MCD_OPC_CheckPredicate, 16, 164, 2, // Skip to: 14149 /* 13473 */ MCD_OPC_CheckField, 19, 1, 1, 158, 2, // Skip to: 14149 /* 13479 */ MCD_OPC_Decode, 254, 13, 171, 1, // Opcode: VSHLiv16i8 /* 13484 */ MCD_OPC_FilterValue, 1, 149, 2, // Skip to: 14149 /* 13488 */ MCD_OPC_CheckPredicate, 16, 145, 2, // Skip to: 14149 /* 13492 */ MCD_OPC_CheckField, 19, 1, 1, 139, 2, // Skip to: 14149 /* 13498 */ MCD_OPC_Decode, 173, 14, 172, 1, // Opcode: VSLIv16i8 /* 13503 */ MCD_OPC_FilterValue, 1, 130, 2, // Skip to: 14149 /* 13507 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13510 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13523 /* 13514 */ MCD_OPC_CheckPredicate, 16, 119, 2, // Skip to: 14149 /* 13518 */ MCD_OPC_Decode, 132, 14, 173, 1, // Opcode: VSHLiv8i16 /* 13523 */ MCD_OPC_FilterValue, 1, 110, 2, // Skip to: 14149 /* 13527 */ MCD_OPC_CheckPredicate, 16, 106, 2, // Skip to: 14149 /* 13531 */ MCD_OPC_Decode, 179, 14, 174, 1, // Opcode: VSLIv8i16 /* 13536 */ MCD_OPC_FilterValue, 1, 97, 2, // Skip to: 14149 /* 13540 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13543 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13556 /* 13547 */ MCD_OPC_CheckPredicate, 16, 86, 2, // Skip to: 14149 /* 13551 */ MCD_OPC_Decode, 131, 14, 175, 1, // Opcode: VSHLiv4i32 /* 13556 */ MCD_OPC_FilterValue, 1, 77, 2, // Skip to: 14149 /* 13560 */ MCD_OPC_CheckPredicate, 16, 73, 2, // Skip to: 14149 /* 13564 */ MCD_OPC_Decode, 178, 14, 176, 1, // Opcode: VSLIv4i32 /* 13569 */ MCD_OPC_FilterValue, 6, 73, 0, // Skip to: 13646 /* 13573 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13576 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 13627 /* 13580 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13583 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 13608 /* 13587 */ MCD_OPC_CheckPredicate, 16, 46, 2, // Skip to: 14149 /* 13591 */ MCD_OPC_CheckField, 24, 1, 1, 40, 2, // Skip to: 14149 /* 13597 */ MCD_OPC_CheckField, 19, 1, 1, 34, 2, // Skip to: 14149 /* 13603 */ MCD_OPC_Decode, 186, 12, 171, 1, // Opcode: VQSHLsuv16i8 /* 13608 */ MCD_OPC_FilterValue, 1, 25, 2, // Skip to: 14149 /* 13612 */ MCD_OPC_CheckPredicate, 16, 21, 2, // Skip to: 14149 /* 13616 */ MCD_OPC_CheckField, 24, 1, 1, 15, 2, // Skip to: 14149 /* 13622 */ MCD_OPC_Decode, 192, 12, 173, 1, // Opcode: VQSHLsuv8i16 /* 13627 */ MCD_OPC_FilterValue, 1, 6, 2, // Skip to: 14149 /* 13631 */ MCD_OPC_CheckPredicate, 16, 2, 2, // Skip to: 14149 /* 13635 */ MCD_OPC_CheckField, 24, 1, 1, 252, 1, // Skip to: 14149 /* 13641 */ MCD_OPC_Decode, 191, 12, 175, 1, // Opcode: VQSHLsuv4i32 /* 13646 */ MCD_OPC_FilterValue, 7, 121, 0, // Skip to: 13771 /* 13650 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13653 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13738 /* 13657 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13660 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13705 /* 13664 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13667 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13686 /* 13671 */ MCD_OPC_CheckPredicate, 16, 218, 1, // Skip to: 14149 /* 13675 */ MCD_OPC_CheckField, 19, 1, 1, 212, 1, // Skip to: 14149 /* 13681 */ MCD_OPC_Decode, 178, 12, 171, 1, // Opcode: VQSHLsiv16i8 /* 13686 */ MCD_OPC_FilterValue, 1, 203, 1, // Skip to: 14149 /* 13690 */ MCD_OPC_CheckPredicate, 16, 199, 1, // Skip to: 14149 /* 13694 */ MCD_OPC_CheckField, 19, 1, 1, 193, 1, // Skip to: 14149 /* 13700 */ MCD_OPC_Decode, 202, 12, 171, 1, // Opcode: VQSHLuiv16i8 /* 13705 */ MCD_OPC_FilterValue, 1, 184, 1, // Skip to: 14149 /* 13709 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13712 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13725 /* 13716 */ MCD_OPC_CheckPredicate, 16, 173, 1, // Skip to: 14149 /* 13720 */ MCD_OPC_Decode, 184, 12, 173, 1, // Opcode: VQSHLsiv8i16 /* 13725 */ MCD_OPC_FilterValue, 1, 164, 1, // Skip to: 14149 /* 13729 */ MCD_OPC_CheckPredicate, 16, 160, 1, // Skip to: 14149 /* 13733 */ MCD_OPC_Decode, 208, 12, 173, 1, // Opcode: VQSHLuiv8i16 /* 13738 */ MCD_OPC_FilterValue, 1, 151, 1, // Skip to: 14149 /* 13742 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13745 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13758 /* 13749 */ MCD_OPC_CheckPredicate, 16, 140, 1, // Skip to: 14149 /* 13753 */ MCD_OPC_Decode, 183, 12, 175, 1, // Opcode: VQSHLsiv4i32 /* 13758 */ MCD_OPC_FilterValue, 1, 131, 1, // Skip to: 14149 /* 13762 */ MCD_OPC_CheckPredicate, 16, 127, 1, // Skip to: 14149 /* 13766 */ MCD_OPC_Decode, 207, 12, 175, 1, // Opcode: VQSHLuiv4i32 /* 13771 */ MCD_OPC_FilterValue, 8, 121, 0, // Skip to: 13896 /* 13775 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13778 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13863 /* 13782 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13785 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13830 /* 13789 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13792 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13811 /* 13796 */ MCD_OPC_CheckPredicate, 16, 93, 1, // Skip to: 14149 /* 13800 */ MCD_OPC_CheckField, 19, 1, 1, 87, 1, // Skip to: 14149 /* 13806 */ MCD_OPC_Decode, 192, 13, 153, 1, // Opcode: VRSHRNv8i8 /* 13811 */ MCD_OPC_FilterValue, 1, 78, 1, // Skip to: 14149 /* 13815 */ MCD_OPC_CheckPredicate, 16, 74, 1, // Skip to: 14149 /* 13819 */ MCD_OPC_CheckField, 19, 1, 1, 68, 1, // Skip to: 14149 /* 13825 */ MCD_OPC_Decode, 177, 12, 153, 1, // Opcode: VQRSHRUNv8i8 /* 13830 */ MCD_OPC_FilterValue, 1, 59, 1, // Skip to: 14149 /* 13834 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13837 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13850 /* 13841 */ MCD_OPC_CheckPredicate, 16, 48, 1, // Skip to: 14149 /* 13845 */ MCD_OPC_Decode, 191, 13, 154, 1, // Opcode: VRSHRNv4i16 /* 13850 */ MCD_OPC_FilterValue, 1, 39, 1, // Skip to: 14149 /* 13854 */ MCD_OPC_CheckPredicate, 16, 35, 1, // Skip to: 14149 /* 13858 */ MCD_OPC_Decode, 176, 12, 154, 1, // Opcode: VQRSHRUNv4i16 /* 13863 */ MCD_OPC_FilterValue, 1, 26, 1, // Skip to: 14149 /* 13867 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13870 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13883 /* 13874 */ MCD_OPC_CheckPredicate, 16, 15, 1, // Skip to: 14149 /* 13878 */ MCD_OPC_Decode, 190, 13, 155, 1, // Opcode: VRSHRNv2i32 /* 13883 */ MCD_OPC_FilterValue, 1, 6, 1, // Skip to: 14149 /* 13887 */ MCD_OPC_CheckPredicate, 16, 2, 1, // Skip to: 14149 /* 13891 */ MCD_OPC_Decode, 175, 12, 155, 1, // Opcode: VQRSHRUNv2i32 /* 13896 */ MCD_OPC_FilterValue, 9, 121, 0, // Skip to: 14021 /* 13900 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 13903 */ MCD_OPC_FilterValue, 0, 81, 0, // Skip to: 13988 /* 13907 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 13910 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 13955 /* 13914 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13917 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13936 /* 13921 */ MCD_OPC_CheckPredicate, 16, 224, 0, // Skip to: 14149 /* 13925 */ MCD_OPC_CheckField, 19, 1, 1, 218, 0, // Skip to: 14149 /* 13931 */ MCD_OPC_Decode, 171, 12, 153, 1, // Opcode: VQRSHRNsv8i8 /* 13936 */ MCD_OPC_FilterValue, 1, 209, 0, // Skip to: 14149 /* 13940 */ MCD_OPC_CheckPredicate, 16, 205, 0, // Skip to: 14149 /* 13944 */ MCD_OPC_CheckField, 19, 1, 1, 199, 0, // Skip to: 14149 /* 13950 */ MCD_OPC_Decode, 174, 12, 153, 1, // Opcode: VQRSHRNuv8i8 /* 13955 */ MCD_OPC_FilterValue, 1, 190, 0, // Skip to: 14149 /* 13959 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13962 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 13975 /* 13966 */ MCD_OPC_CheckPredicate, 16, 179, 0, // Skip to: 14149 /* 13970 */ MCD_OPC_Decode, 170, 12, 154, 1, // Opcode: VQRSHRNsv4i16 /* 13975 */ MCD_OPC_FilterValue, 1, 170, 0, // Skip to: 14149 /* 13979 */ MCD_OPC_CheckPredicate, 16, 166, 0, // Skip to: 14149 /* 13983 */ MCD_OPC_Decode, 173, 12, 154, 1, // Opcode: VQRSHRNuv4i16 /* 13988 */ MCD_OPC_FilterValue, 1, 157, 0, // Skip to: 14149 /* 13992 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 13995 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 14008 /* 13999 */ MCD_OPC_CheckPredicate, 16, 146, 0, // Skip to: 14149 /* 14003 */ MCD_OPC_Decode, 169, 12, 155, 1, // Opcode: VQRSHRNsv2i32 /* 14008 */ MCD_OPC_FilterValue, 1, 137, 0, // Skip to: 14149 /* 14012 */ MCD_OPC_CheckPredicate, 16, 133, 0, // Skip to: 14149 /* 14016 */ MCD_OPC_Decode, 172, 12, 155, 1, // Opcode: VQRSHRNuv2i32 /* 14021 */ MCD_OPC_FilterValue, 14, 70, 0, // Skip to: 14095 /* 14025 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 14028 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 14047 /* 14032 */ MCD_OPC_CheckPredicate, 16, 30, 0, // Skip to: 14066 /* 14036 */ MCD_OPC_CheckField, 19, 3, 0, 24, 0, // Skip to: 14066 /* 14042 */ MCD_OPC_Decode, 219, 10, 159, 1, // Opcode: VMOVv16i8 /* 14047 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 14066 /* 14051 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 14066 /* 14055 */ MCD_OPC_CheckField, 19, 3, 0, 5, 0, // Skip to: 14066 /* 14061 */ MCD_OPC_Decode, 223, 10, 159, 1, // Opcode: VMOVv2i64 /* 14066 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 14069 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 14082 /* 14073 */ MCD_OPC_CheckPredicate, 16, 72, 0, // Skip to: 14149 /* 14077 */ MCD_OPC_Decode, 132, 6, 177, 1, // Opcode: VCVTxs2fq /* 14082 */ MCD_OPC_FilterValue, 1, 63, 0, // Skip to: 14149 /* 14086 */ MCD_OPC_CheckPredicate, 16, 59, 0, // Skip to: 14149 /* 14090 */ MCD_OPC_Decode, 134, 6, 177, 1, // Opcode: VCVTxu2fq /* 14095 */ MCD_OPC_FilterValue, 15, 50, 0, // Skip to: 14149 /* 14099 */ MCD_OPC_ExtractField, 24, 1, // Inst{24} ... /* 14102 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 14115 /* 14106 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 14128 /* 14110 */ MCD_OPC_Decode, 251, 5, 177, 1, // Opcode: VCVTf2xsq /* 14115 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 14128 /* 14119 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 14128 /* 14123 */ MCD_OPC_Decode, 253, 5, 177, 1, // Opcode: VCVTf2xuq /* 14128 */ MCD_OPC_CheckPredicate, 16, 17, 0, // Skip to: 14149 /* 14132 */ MCD_OPC_CheckField, 19, 3, 0, 11, 0, // Skip to: 14149 /* 14138 */ MCD_OPC_CheckField, 5, 1, 0, 5, 0, // Skip to: 14149 /* 14144 */ MCD_OPC_Decode, 224, 10, 159, 1, // Opcode: VMOVv4f32 /* 14149 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 14152 */ MCD_OPC_FilterValue, 0, 77, 0, // Skip to: 14233 /* 14156 */ MCD_OPC_ExtractField, 19, 3, // Inst{21-19} ... /* 14159 */ MCD_OPC_FilterValue, 0, 152, 1, // Skip to: 14571 /* 14163 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 14166 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 14185 /* 14170 */ MCD_OPC_CheckPredicate, 16, 50, 0, // Skip to: 14224 /* 14174 */ MCD_OPC_CheckField, 10, 2, 2, 44, 0, // Skip to: 14224 /* 14180 */ MCD_OPC_Decode, 227, 10, 159, 1, // Opcode: VMOVv8i16 /* 14185 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 14224 /* 14189 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 14192 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 14205 /* 14196 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 14224 /* 14200 */ MCD_OPC_Decode, 171, 11, 159, 1, // Opcode: VORRiv4i32 /* 14205 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 14224 /* 14209 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 14224 /* 14213 */ MCD_OPC_CheckField, 10, 1, 0, 5, 0, // Skip to: 14224 /* 14219 */ MCD_OPC_Decode, 172, 11, 159, 1, // Opcode: VORRiv8i16 /* 14224 */ MCD_OPC_CheckPredicate, 16, 87, 1, // Skip to: 14571 /* 14228 */ MCD_OPC_Decode, 226, 10, 159, 1, // Opcode: VMOVv4i32 /* 14233 */ MCD_OPC_FilterValue, 1, 78, 1, // Skip to: 14571 /* 14237 */ MCD_OPC_ExtractField, 19, 3, // Inst{21-19} ... /* 14240 */ MCD_OPC_FilterValue, 0, 71, 1, // Skip to: 14571 /* 14244 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 14247 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 14266 /* 14251 */ MCD_OPC_CheckPredicate, 16, 50, 0, // Skip to: 14305 /* 14255 */ MCD_OPC_CheckField, 10, 2, 2, 44, 0, // Skip to: 14305 /* 14261 */ MCD_OPC_Decode, 149, 11, 159, 1, // Opcode: VMVNv8i16 /* 14266 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 14305 /* 14270 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 14273 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 14286 /* 14277 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 14305 /* 14281 */ MCD_OPC_Decode, 224, 4, 159, 1, // Opcode: VBICiv4i32 /* 14286 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 14305 /* 14290 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 14305 /* 14294 */ MCD_OPC_CheckField, 10, 1, 0, 5, 0, // Skip to: 14305 /* 14300 */ MCD_OPC_Decode, 225, 4, 159, 1, // Opcode: VBICiv8i16 /* 14305 */ MCD_OPC_CheckPredicate, 16, 6, 1, // Skip to: 14571 /* 14309 */ MCD_OPC_Decode, 148, 11, 159, 1, // Opcode: VMVNv4i32 /* 14314 */ MCD_OPC_FilterValue, 1, 253, 0, // Skip to: 14571 /* 14318 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 14321 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 14356 /* 14325 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 14328 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 14342 /* 14333 */ MCD_OPC_CheckPredicate, 16, 234, 0, // Skip to: 14571 /* 14337 */ MCD_OPC_Decode, 156, 14, 178, 1, // Opcode: VSHRsv2i64 /* 14342 */ MCD_OPC_FilterValue, 243, 1, 224, 0, // Skip to: 14571 /* 14347 */ MCD_OPC_CheckPredicate, 16, 220, 0, // Skip to: 14571 /* 14351 */ MCD_OPC_Decode, 164, 14, 178, 1, // Opcode: VSHRuv2i64 /* 14356 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 14391 /* 14360 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 14363 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 14377 /* 14368 */ MCD_OPC_CheckPredicate, 16, 199, 0, // Skip to: 14571 /* 14372 */ MCD_OPC_Decode, 188, 14, 179, 1, // Opcode: VSRAsv2i64 /* 14377 */ MCD_OPC_FilterValue, 243, 1, 189, 0, // Skip to: 14571 /* 14382 */ MCD_OPC_CheckPredicate, 16, 185, 0, // Skip to: 14571 /* 14386 */ MCD_OPC_Decode, 196, 14, 179, 1, // Opcode: VSRAuv2i64 /* 14391 */ MCD_OPC_FilterValue, 2, 31, 0, // Skip to: 14426 /* 14395 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 14398 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 14412 /* 14403 */ MCD_OPC_CheckPredicate, 16, 164, 0, // Skip to: 14571 /* 14407 */ MCD_OPC_Decode, 196, 13, 178, 1, // Opcode: VRSHRsv2i64 /* 14412 */ MCD_OPC_FilterValue, 243, 1, 154, 0, // Skip to: 14571 /* 14417 */ MCD_OPC_CheckPredicate, 16, 150, 0, // Skip to: 14571 /* 14421 */ MCD_OPC_Decode, 204, 13, 178, 1, // Opcode: VRSHRuv2i64 /* 14426 */ MCD_OPC_FilterValue, 3, 31, 0, // Skip to: 14461 /* 14430 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 14433 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 14447 /* 14438 */ MCD_OPC_CheckPredicate, 16, 129, 0, // Skip to: 14571 /* 14442 */ MCD_OPC_Decode, 218, 13, 179, 1, // Opcode: VRSRAsv2i64 /* 14447 */ MCD_OPC_FilterValue, 243, 1, 119, 0, // Skip to: 14571 /* 14452 */ MCD_OPC_CheckPredicate, 16, 115, 0, // Skip to: 14571 /* 14456 */ MCD_OPC_Decode, 226, 13, 179, 1, // Opcode: VRSRAuv2i64 /* 14461 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 14481 /* 14465 */ MCD_OPC_CheckPredicate, 16, 102, 0, // Skip to: 14571 /* 14469 */ MCD_OPC_CheckField, 24, 8, 243, 1, 95, 0, // Skip to: 14571 /* 14476 */ MCD_OPC_Decode, 204, 14, 179, 1, // Opcode: VSRIv2i64 /* 14481 */ MCD_OPC_FilterValue, 5, 31, 0, // Skip to: 14516 /* 14485 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 14488 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 14502 /* 14493 */ MCD_OPC_CheckPredicate, 16, 74, 0, // Skip to: 14571 /* 14497 */ MCD_OPC_Decode, 129, 14, 180, 1, // Opcode: VSHLiv2i64 /* 14502 */ MCD_OPC_FilterValue, 243, 1, 64, 0, // Skip to: 14571 /* 14507 */ MCD_OPC_CheckPredicate, 16, 60, 0, // Skip to: 14571 /* 14511 */ MCD_OPC_Decode, 176, 14, 181, 1, // Opcode: VSLIv2i64 /* 14516 */ MCD_OPC_FilterValue, 6, 16, 0, // Skip to: 14536 /* 14520 */ MCD_OPC_CheckPredicate, 16, 47, 0, // Skip to: 14571 /* 14524 */ MCD_OPC_CheckField, 24, 8, 243, 1, 40, 0, // Skip to: 14571 /* 14531 */ MCD_OPC_Decode, 189, 12, 180, 1, // Opcode: VQSHLsuv2i64 /* 14536 */ MCD_OPC_FilterValue, 7, 31, 0, // Skip to: 14571 /* 14540 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 14543 */ MCD_OPC_FilterValue, 242, 1, 9, 0, // Skip to: 14557 /* 14548 */ MCD_OPC_CheckPredicate, 16, 19, 0, // Skip to: 14571 /* 14552 */ MCD_OPC_Decode, 181, 12, 180, 1, // Opcode: VQSHLsiv2i64 /* 14557 */ MCD_OPC_FilterValue, 243, 1, 9, 0, // Skip to: 14571 /* 14562 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 14571 /* 14566 */ MCD_OPC_Decode, 205, 12, 180, 1, // Opcode: VQSHLuiv2i64 /* 14571 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableNEONDup32[] = { /* 0 */ MCD_OPC_ExtractField, 22, 6, // Inst{27-22} ... /* 3 */ MCD_OPC_FilterValue, 56, 105, 0, // Skip to: 112 /* 7 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 10 */ MCD_OPC_FilterValue, 16, 53, 0, // Skip to: 67 /* 14 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 17 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 42 /* 21 */ MCD_OPC_CheckPredicate, 20, 124, 1, // Skip to: 405 /* 25 */ MCD_OPC_CheckField, 8, 4, 11, 118, 1, // Skip to: 405 /* 31 */ MCD_OPC_CheckField, 6, 1, 0, 112, 1, // Skip to: 405 /* 37 */ MCD_OPC_Decode, 243, 13, 182, 1, // Opcode: VSETLNi32 /* 42 */ MCD_OPC_FilterValue, 1, 103, 1, // Skip to: 405 /* 46 */ MCD_OPC_CheckPredicate, 20, 99, 1, // Skip to: 405 /* 50 */ MCD_OPC_CheckField, 8, 4, 11, 93, 1, // Skip to: 405 /* 56 */ MCD_OPC_CheckField, 6, 1, 0, 87, 1, // Skip to: 405 /* 62 */ MCD_OPC_Decode, 170, 6, 183, 1, // Opcode: VGETLNi32 /* 67 */ MCD_OPC_FilterValue, 48, 78, 1, // Skip to: 405 /* 71 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 74 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 93 /* 78 */ MCD_OPC_CheckPredicate, 16, 67, 1, // Skip to: 405 /* 82 */ MCD_OPC_CheckField, 8, 4, 11, 61, 1, // Skip to: 405 /* 88 */ MCD_OPC_Decode, 242, 13, 184, 1, // Opcode: VSETLNi16 /* 93 */ MCD_OPC_FilterValue, 1, 52, 1, // Skip to: 405 /* 97 */ MCD_OPC_CheckPredicate, 16, 48, 1, // Skip to: 405 /* 101 */ MCD_OPC_CheckField, 8, 4, 11, 42, 1, // Skip to: 405 /* 107 */ MCD_OPC_Decode, 171, 6, 185, 1, // Opcode: VGETLNs16 /* 112 */ MCD_OPC_FilterValue, 57, 53, 0, // Skip to: 169 /* 116 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 119 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 144 /* 123 */ MCD_OPC_CheckPredicate, 16, 22, 1, // Skip to: 405 /* 127 */ MCD_OPC_CheckField, 8, 4, 11, 16, 1, // Skip to: 405 /* 133 */ MCD_OPC_CheckField, 0, 5, 16, 10, 1, // Skip to: 405 /* 139 */ MCD_OPC_Decode, 244, 13, 186, 1, // Opcode: VSETLNi8 /* 144 */ MCD_OPC_FilterValue, 1, 1, 1, // Skip to: 405 /* 148 */ MCD_OPC_CheckPredicate, 16, 253, 0, // Skip to: 405 /* 152 */ MCD_OPC_CheckField, 8, 4, 11, 247, 0, // Skip to: 405 /* 158 */ MCD_OPC_CheckField, 0, 5, 16, 241, 0, // Skip to: 405 /* 164 */ MCD_OPC_Decode, 172, 6, 187, 1, // Opcode: VGETLNs8 /* 169 */ MCD_OPC_FilterValue, 58, 143, 0, // Skip to: 316 /* 173 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 176 */ MCD_OPC_FilterValue, 16, 53, 0, // Skip to: 233 /* 180 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 183 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 208 /* 187 */ MCD_OPC_CheckPredicate, 16, 214, 0, // Skip to: 405 /* 191 */ MCD_OPC_CheckField, 8, 4, 11, 208, 0, // Skip to: 405 /* 197 */ MCD_OPC_CheckField, 6, 1, 0, 202, 0, // Skip to: 405 /* 203 */ MCD_OPC_Decode, 139, 6, 188, 1, // Opcode: VDUP32d /* 208 */ MCD_OPC_FilterValue, 2, 193, 0, // Skip to: 405 /* 212 */ MCD_OPC_CheckPredicate, 16, 189, 0, // Skip to: 405 /* 216 */ MCD_OPC_CheckField, 8, 4, 11, 183, 0, // Skip to: 405 /* 222 */ MCD_OPC_CheckField, 6, 1, 0, 177, 0, // Skip to: 405 /* 228 */ MCD_OPC_Decode, 140, 6, 189, 1, // Opcode: VDUP32q /* 233 */ MCD_OPC_FilterValue, 48, 168, 0, // Skip to: 405 /* 237 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 240 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 297 /* 244 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 247 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 272 /* 251 */ MCD_OPC_CheckPredicate, 16, 150, 0, // Skip to: 405 /* 255 */ MCD_OPC_CheckField, 8, 4, 11, 144, 0, // Skip to: 405 /* 261 */ MCD_OPC_CheckField, 6, 1, 0, 138, 0, // Skip to: 405 /* 267 */ MCD_OPC_Decode, 137, 6, 188, 1, // Opcode: VDUP16d /* 272 */ MCD_OPC_FilterValue, 1, 129, 0, // Skip to: 405 /* 276 */ MCD_OPC_CheckPredicate, 16, 125, 0, // Skip to: 405 /* 280 */ MCD_OPC_CheckField, 8, 4, 11, 119, 0, // Skip to: 405 /* 286 */ MCD_OPC_CheckField, 6, 1, 0, 113, 0, // Skip to: 405 /* 292 */ MCD_OPC_Decode, 138, 6, 189, 1, // Opcode: VDUP16q /* 297 */ MCD_OPC_FilterValue, 1, 104, 0, // Skip to: 405 /* 301 */ MCD_OPC_CheckPredicate, 16, 100, 0, // Skip to: 405 /* 305 */ MCD_OPC_CheckField, 8, 4, 11, 94, 0, // Skip to: 405 /* 311 */ MCD_OPC_Decode, 173, 6, 185, 1, // Opcode: VGETLNu16 /* 316 */ MCD_OPC_FilterValue, 59, 85, 0, // Skip to: 405 /* 320 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 323 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 380 /* 327 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 330 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 355 /* 334 */ MCD_OPC_CheckPredicate, 16, 67, 0, // Skip to: 405 /* 338 */ MCD_OPC_CheckField, 8, 4, 11, 61, 0, // Skip to: 405 /* 344 */ MCD_OPC_CheckField, 0, 7, 16, 55, 0, // Skip to: 405 /* 350 */ MCD_OPC_Decode, 141, 6, 188, 1, // Opcode: VDUP8d /* 355 */ MCD_OPC_FilterValue, 1, 46, 0, // Skip to: 405 /* 359 */ MCD_OPC_CheckPredicate, 16, 42, 0, // Skip to: 405 /* 363 */ MCD_OPC_CheckField, 8, 4, 11, 36, 0, // Skip to: 405 /* 369 */ MCD_OPC_CheckField, 0, 7, 16, 30, 0, // Skip to: 405 /* 375 */ MCD_OPC_Decode, 142, 6, 189, 1, // Opcode: VDUP8q /* 380 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 405 /* 384 */ MCD_OPC_CheckPredicate, 16, 17, 0, // Skip to: 405 /* 388 */ MCD_OPC_CheckField, 8, 4, 11, 11, 0, // Skip to: 405 /* 394 */ MCD_OPC_CheckField, 0, 5, 16, 5, 0, // Skip to: 405 /* 400 */ MCD_OPC_Decode, 174, 6, 187, 1, // Opcode: VGETLNu8 /* 405 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableNEONLoadStore32[] = { /* 0 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 3 */ MCD_OPC_FilterValue, 0, 17, 1, // Skip to: 280 /* 7 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 10 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 145 /* 14 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 17 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 109 /* 22 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 25 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 53 /* 29 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 44 /* 33 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 44 /* 39 */ MCD_OPC_Decode, 222, 16, 190, 1, // Opcode: VST4d8 /* 44 */ MCD_OPC_CheckPredicate, 16, 194, 22, // Skip to: 5874 /* 48 */ MCD_OPC_Decode, 225, 16, 190, 1, // Opcode: VST4d8_UPD /* 53 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 81 /* 57 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 72 /* 61 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 72 /* 67 */ MCD_OPC_Decode, 214, 16, 190, 1, // Opcode: VST4d16 /* 72 */ MCD_OPC_CheckPredicate, 16, 166, 22, // Skip to: 5874 /* 76 */ MCD_OPC_Decode, 217, 16, 190, 1, // Opcode: VST4d16_UPD /* 81 */ MCD_OPC_FilterValue, 2, 157, 22, // Skip to: 5874 /* 85 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 100 /* 89 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 100 /* 95 */ MCD_OPC_Decode, 218, 16, 190, 1, // Opcode: VST4d32 /* 100 */ MCD_OPC_CheckPredicate, 16, 138, 22, // Skip to: 5874 /* 104 */ MCD_OPC_Decode, 221, 16, 190, 1, // Opcode: VST4d32_UPD /* 109 */ MCD_OPC_FilterValue, 233, 3, 128, 22, // Skip to: 5874 /* 114 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 117 */ MCD_OPC_FilterValue, 0, 121, 22, // Skip to: 5874 /* 121 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 136 /* 125 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 136 /* 131 */ MCD_OPC_Decode, 213, 14, 191, 1, // Opcode: VST1LNd8 /* 136 */ MCD_OPC_CheckPredicate, 16, 102, 22, // Skip to: 5874 /* 140 */ MCD_OPC_Decode, 214, 14, 191, 1, // Opcode: VST1LNd8_UPD /* 145 */ MCD_OPC_FilterValue, 2, 93, 22, // Skip to: 5874 /* 149 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 152 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 244 /* 157 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 160 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 188 /* 164 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 179 /* 168 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 179 /* 174 */ MCD_OPC_Decode, 192, 9, 190, 1, // Opcode: VLD4d8 /* 179 */ MCD_OPC_CheckPredicate, 16, 59, 22, // Skip to: 5874 /* 183 */ MCD_OPC_Decode, 195, 9, 190, 1, // Opcode: VLD4d8_UPD /* 188 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 216 /* 192 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 207 /* 196 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 207 /* 202 */ MCD_OPC_Decode, 184, 9, 190, 1, // Opcode: VLD4d16 /* 207 */ MCD_OPC_CheckPredicate, 16, 31, 22, // Skip to: 5874 /* 211 */ MCD_OPC_Decode, 187, 9, 190, 1, // Opcode: VLD4d16_UPD /* 216 */ MCD_OPC_FilterValue, 2, 22, 22, // Skip to: 5874 /* 220 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 235 /* 224 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 235 /* 230 */ MCD_OPC_Decode, 188, 9, 190, 1, // Opcode: VLD4d32 /* 235 */ MCD_OPC_CheckPredicate, 16, 3, 22, // Skip to: 5874 /* 239 */ MCD_OPC_Decode, 191, 9, 190, 1, // Opcode: VLD4d32_UPD /* 244 */ MCD_OPC_FilterValue, 233, 3, 249, 21, // Skip to: 5874 /* 249 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 252 */ MCD_OPC_FilterValue, 0, 242, 21, // Skip to: 5874 /* 256 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 271 /* 260 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 271 /* 266 */ MCD_OPC_Decode, 221, 6, 192, 1, // Opcode: VLD1LNd8 /* 271 */ MCD_OPC_CheckPredicate, 16, 223, 21, // Skip to: 5874 /* 275 */ MCD_OPC_Decode, 222, 6, 192, 1, // Opcode: VLD1LNd8_UPD /* 280 */ MCD_OPC_FilterValue, 1, 3, 1, // Skip to: 543 /* 284 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 287 */ MCD_OPC_FilterValue, 0, 124, 0, // Skip to: 415 /* 291 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 294 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 386 /* 299 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 302 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 330 /* 306 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 321 /* 310 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 321 /* 316 */ MCD_OPC_Decode, 245, 16, 190, 1, // Opcode: VST4q8 /* 321 */ MCD_OPC_CheckPredicate, 16, 173, 21, // Skip to: 5874 /* 325 */ MCD_OPC_Decode, 247, 16, 190, 1, // Opcode: VST4q8_UPD /* 330 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 358 /* 334 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 349 /* 338 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 349 /* 344 */ MCD_OPC_Decode, 235, 16, 190, 1, // Opcode: VST4q16 /* 349 */ MCD_OPC_CheckPredicate, 16, 145, 21, // Skip to: 5874 /* 353 */ MCD_OPC_Decode, 237, 16, 190, 1, // Opcode: VST4q16_UPD /* 358 */ MCD_OPC_FilterValue, 2, 136, 21, // Skip to: 5874 /* 362 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 377 /* 366 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 377 /* 372 */ MCD_OPC_Decode, 240, 16, 190, 1, // Opcode: VST4q32 /* 377 */ MCD_OPC_CheckPredicate, 16, 117, 21, // Skip to: 5874 /* 381 */ MCD_OPC_Decode, 242, 16, 190, 1, // Opcode: VST4q32_UPD /* 386 */ MCD_OPC_FilterValue, 233, 3, 107, 21, // Skip to: 5874 /* 391 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 406 /* 395 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 406 /* 401 */ MCD_OPC_Decode, 164, 15, 193, 1, // Opcode: VST2LNd8 /* 406 */ MCD_OPC_CheckPredicate, 16, 88, 21, // Skip to: 5874 /* 410 */ MCD_OPC_Decode, 167, 15, 193, 1, // Opcode: VST2LNd8_UPD /* 415 */ MCD_OPC_FilterValue, 2, 79, 21, // Skip to: 5874 /* 419 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 422 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 514 /* 427 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 430 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 458 /* 434 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 449 /* 438 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 449 /* 444 */ MCD_OPC_Decode, 215, 9, 190, 1, // Opcode: VLD4q8 /* 449 */ MCD_OPC_CheckPredicate, 16, 45, 21, // Skip to: 5874 /* 453 */ MCD_OPC_Decode, 217, 9, 190, 1, // Opcode: VLD4q8_UPD /* 458 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 486 /* 462 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 477 /* 466 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 477 /* 472 */ MCD_OPC_Decode, 205, 9, 190, 1, // Opcode: VLD4q16 /* 477 */ MCD_OPC_CheckPredicate, 16, 17, 21, // Skip to: 5874 /* 481 */ MCD_OPC_Decode, 207, 9, 190, 1, // Opcode: VLD4q16_UPD /* 486 */ MCD_OPC_FilterValue, 2, 8, 21, // Skip to: 5874 /* 490 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 505 /* 494 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 505 /* 500 */ MCD_OPC_Decode, 210, 9, 190, 1, // Opcode: VLD4q32 /* 505 */ MCD_OPC_CheckPredicate, 16, 245, 20, // Skip to: 5874 /* 509 */ MCD_OPC_Decode, 212, 9, 190, 1, // Opcode: VLD4q32_UPD /* 514 */ MCD_OPC_FilterValue, 233, 3, 235, 20, // Skip to: 5874 /* 519 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 534 /* 523 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 534 /* 529 */ MCD_OPC_Decode, 190, 7, 194, 1, // Opcode: VLD2LNd8 /* 534 */ MCD_OPC_CheckPredicate, 16, 216, 20, // Skip to: 5874 /* 538 */ MCD_OPC_Decode, 193, 7, 194, 1, // Opcode: VLD2LNd8_UPD /* 543 */ MCD_OPC_FilterValue, 2, 185, 1, // Skip to: 988 /* 547 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 550 */ MCD_OPC_FilterValue, 0, 215, 0, // Skip to: 769 /* 554 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 557 */ MCD_OPC_FilterValue, 232, 3, 171, 0, // Skip to: 733 /* 562 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 565 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 607 /* 569 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 572 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 585 /* 576 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 598 /* 580 */ MCD_OPC_Decode, 137, 15, 195, 1, // Opcode: VST1d8Qwb_fixed /* 585 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 598 /* 589 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 598 /* 593 */ MCD_OPC_Decode, 136, 15, 195, 1, // Opcode: VST1d8Q /* 598 */ MCD_OPC_CheckPredicate, 16, 152, 20, // Skip to: 5874 /* 602 */ MCD_OPC_Decode, 138, 15, 195, 1, // Opcode: VST1d8Qwb_register /* 607 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 649 /* 611 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 614 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 627 /* 618 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 640 /* 622 */ MCD_OPC_Decode, 232, 14, 195, 1, // Opcode: VST1d16Qwb_fixed /* 627 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 640 /* 631 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 640 /* 635 */ MCD_OPC_Decode, 231, 14, 195, 1, // Opcode: VST1d16Q /* 640 */ MCD_OPC_CheckPredicate, 16, 110, 20, // Skip to: 5874 /* 644 */ MCD_OPC_Decode, 233, 14, 195, 1, // Opcode: VST1d16Qwb_register /* 649 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 691 /* 653 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 656 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 669 /* 660 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 682 /* 664 */ MCD_OPC_Decode, 241, 14, 195, 1, // Opcode: VST1d32Qwb_fixed /* 669 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 682 /* 673 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 682 /* 677 */ MCD_OPC_Decode, 240, 14, 195, 1, // Opcode: VST1d32Q /* 682 */ MCD_OPC_CheckPredicate, 16, 68, 20, // Skip to: 5874 /* 686 */ MCD_OPC_Decode, 242, 14, 195, 1, // Opcode: VST1d32Qwb_register /* 691 */ MCD_OPC_FilterValue, 3, 59, 20, // Skip to: 5874 /* 695 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 698 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 711 /* 702 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 724 /* 706 */ MCD_OPC_Decode, 253, 14, 195, 1, // Opcode: VST1d64Qwb_fixed /* 711 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 724 /* 715 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 724 /* 719 */ MCD_OPC_Decode, 249, 14, 195, 1, // Opcode: VST1d64Q /* 724 */ MCD_OPC_CheckPredicate, 16, 26, 20, // Skip to: 5874 /* 728 */ MCD_OPC_Decode, 254, 14, 195, 1, // Opcode: VST1d64Qwb_register /* 733 */ MCD_OPC_FilterValue, 233, 3, 16, 20, // Skip to: 5874 /* 738 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 741 */ MCD_OPC_FilterValue, 0, 9, 20, // Skip to: 5874 /* 745 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 760 /* 749 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 760 /* 755 */ MCD_OPC_Decode, 235, 15, 196, 1, // Opcode: VST3LNd8 /* 760 */ MCD_OPC_CheckPredicate, 16, 246, 19, // Skip to: 5874 /* 764 */ MCD_OPC_Decode, 238, 15, 196, 1, // Opcode: VST3LNd8_UPD /* 769 */ MCD_OPC_FilterValue, 2, 237, 19, // Skip to: 5874 /* 773 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 776 */ MCD_OPC_FilterValue, 232, 3, 171, 0, // Skip to: 952 /* 781 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 784 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 826 /* 788 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 791 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 804 /* 795 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 817 /* 799 */ MCD_OPC_Decode, 145, 7, 195, 1, // Opcode: VLD1d8Qwb_fixed /* 804 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 817 /* 808 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 817 /* 812 */ MCD_OPC_Decode, 144, 7, 195, 1, // Opcode: VLD1d8Q /* 817 */ MCD_OPC_CheckPredicate, 16, 189, 19, // Skip to: 5874 /* 821 */ MCD_OPC_Decode, 146, 7, 195, 1, // Opcode: VLD1d8Qwb_register /* 826 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 868 /* 830 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 833 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 846 /* 837 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 859 /* 841 */ MCD_OPC_Decode, 240, 6, 195, 1, // Opcode: VLD1d16Qwb_fixed /* 846 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 859 /* 850 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 859 /* 854 */ MCD_OPC_Decode, 239, 6, 195, 1, // Opcode: VLD1d16Q /* 859 */ MCD_OPC_CheckPredicate, 16, 147, 19, // Skip to: 5874 /* 863 */ MCD_OPC_Decode, 241, 6, 195, 1, // Opcode: VLD1d16Qwb_register /* 868 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 910 /* 872 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 875 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 888 /* 879 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 901 /* 883 */ MCD_OPC_Decode, 249, 6, 195, 1, // Opcode: VLD1d32Qwb_fixed /* 888 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 901 /* 892 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 901 /* 896 */ MCD_OPC_Decode, 248, 6, 195, 1, // Opcode: VLD1d32Q /* 901 */ MCD_OPC_CheckPredicate, 16, 105, 19, // Skip to: 5874 /* 905 */ MCD_OPC_Decode, 250, 6, 195, 1, // Opcode: VLD1d32Qwb_register /* 910 */ MCD_OPC_FilterValue, 3, 96, 19, // Skip to: 5874 /* 914 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 917 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 930 /* 921 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 943 /* 925 */ MCD_OPC_Decode, 133, 7, 195, 1, // Opcode: VLD1d64Qwb_fixed /* 930 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 943 /* 934 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 943 /* 938 */ MCD_OPC_Decode, 129, 7, 195, 1, // Opcode: VLD1d64Q /* 943 */ MCD_OPC_CheckPredicate, 16, 63, 19, // Skip to: 5874 /* 947 */ MCD_OPC_Decode, 134, 7, 195, 1, // Opcode: VLD1d64Qwb_register /* 952 */ MCD_OPC_FilterValue, 233, 3, 53, 19, // Skip to: 5874 /* 957 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 960 */ MCD_OPC_FilterValue, 0, 46, 19, // Skip to: 5874 /* 964 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 979 /* 968 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 979 /* 974 */ MCD_OPC_Decode, 169, 8, 197, 1, // Opcode: VLD3LNd8 /* 979 */ MCD_OPC_CheckPredicate, 16, 27, 19, // Skip to: 5874 /* 983 */ MCD_OPC_Decode, 172, 8, 197, 1, // Opcode: VLD3LNd8_UPD /* 988 */ MCD_OPC_FilterValue, 3, 87, 1, // Skip to: 1335 /* 992 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 995 */ MCD_OPC_FilterValue, 0, 166, 0, // Skip to: 1165 /* 999 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1002 */ MCD_OPC_FilterValue, 232, 3, 129, 0, // Skip to: 1136 /* 1007 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 1010 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 1052 /* 1014 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1017 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1030 /* 1021 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 1043 /* 1025 */ MCD_OPC_Decode, 225, 15, 198, 1, // Opcode: VST2q8wb_fixed /* 1030 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 1043 /* 1034 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 1043 /* 1038 */ MCD_OPC_Decode, 221, 15, 198, 1, // Opcode: VST2q8 /* 1043 */ MCD_OPC_CheckPredicate, 16, 219, 18, // Skip to: 5874 /* 1047 */ MCD_OPC_Decode, 226, 15, 198, 1, // Opcode: VST2q8wb_register /* 1052 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 1094 /* 1056 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1059 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1072 /* 1063 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 1085 /* 1067 */ MCD_OPC_Decode, 213, 15, 198, 1, // Opcode: VST2q16wb_fixed /* 1072 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 1085 /* 1076 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 1085 /* 1080 */ MCD_OPC_Decode, 209, 15, 198, 1, // Opcode: VST2q16 /* 1085 */ MCD_OPC_CheckPredicate, 16, 177, 18, // Skip to: 5874 /* 1089 */ MCD_OPC_Decode, 214, 15, 198, 1, // Opcode: VST2q16wb_register /* 1094 */ MCD_OPC_FilterValue, 2, 168, 18, // Skip to: 5874 /* 1098 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1101 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1114 /* 1105 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 1127 /* 1109 */ MCD_OPC_Decode, 219, 15, 198, 1, // Opcode: VST2q32wb_fixed /* 1114 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 1127 /* 1118 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 1127 /* 1122 */ MCD_OPC_Decode, 215, 15, 198, 1, // Opcode: VST2q32 /* 1127 */ MCD_OPC_CheckPredicate, 16, 135, 18, // Skip to: 5874 /* 1131 */ MCD_OPC_Decode, 220, 15, 198, 1, // Opcode: VST2q32wb_register /* 1136 */ MCD_OPC_FilterValue, 233, 3, 125, 18, // Skip to: 5874 /* 1141 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1156 /* 1145 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1156 /* 1151 */ MCD_OPC_Decode, 187, 16, 199, 1, // Opcode: VST4LNd8 /* 1156 */ MCD_OPC_CheckPredicate, 16, 106, 18, // Skip to: 5874 /* 1160 */ MCD_OPC_Decode, 190, 16, 199, 1, // Opcode: VST4LNd8_UPD /* 1165 */ MCD_OPC_FilterValue, 2, 97, 18, // Skip to: 5874 /* 1169 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1172 */ MCD_OPC_FilterValue, 232, 3, 129, 0, // Skip to: 1306 /* 1177 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 1180 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 1222 /* 1184 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1187 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1200 /* 1191 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 1213 /* 1195 */ MCD_OPC_Decode, 251, 7, 198, 1, // Opcode: VLD2q8wb_fixed /* 1200 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 1213 /* 1204 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 1213 /* 1208 */ MCD_OPC_Decode, 247, 7, 198, 1, // Opcode: VLD2q8 /* 1213 */ MCD_OPC_CheckPredicate, 16, 49, 18, // Skip to: 5874 /* 1217 */ MCD_OPC_Decode, 252, 7, 198, 1, // Opcode: VLD2q8wb_register /* 1222 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 1264 /* 1226 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1229 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1242 /* 1233 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 1255 /* 1237 */ MCD_OPC_Decode, 239, 7, 198, 1, // Opcode: VLD2q16wb_fixed /* 1242 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 1255 /* 1246 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 1255 /* 1250 */ MCD_OPC_Decode, 235, 7, 198, 1, // Opcode: VLD2q16 /* 1255 */ MCD_OPC_CheckPredicate, 16, 7, 18, // Skip to: 5874 /* 1259 */ MCD_OPC_Decode, 240, 7, 198, 1, // Opcode: VLD2q16wb_register /* 1264 */ MCD_OPC_FilterValue, 2, 254, 17, // Skip to: 5874 /* 1268 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1271 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1284 /* 1275 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 1297 /* 1279 */ MCD_OPC_Decode, 245, 7, 198, 1, // Opcode: VLD2q32wb_fixed /* 1284 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 1297 /* 1288 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 1297 /* 1292 */ MCD_OPC_Decode, 241, 7, 198, 1, // Opcode: VLD2q32 /* 1297 */ MCD_OPC_CheckPredicate, 16, 221, 17, // Skip to: 5874 /* 1301 */ MCD_OPC_Decode, 246, 7, 198, 1, // Opcode: VLD2q32wb_register /* 1306 */ MCD_OPC_FilterValue, 233, 3, 211, 17, // Skip to: 5874 /* 1311 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1326 /* 1315 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1326 /* 1321 */ MCD_OPC_Decode, 157, 9, 200, 1, // Opcode: VLD4LNd8 /* 1326 */ MCD_OPC_CheckPredicate, 16, 192, 17, // Skip to: 5874 /* 1330 */ MCD_OPC_Decode, 160, 9, 200, 1, // Opcode: VLD4LNd8_UPD /* 1335 */ MCD_OPC_FilterValue, 4, 16, 1, // Skip to: 1611 /* 1339 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 1342 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 1477 /* 1346 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1349 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 1441 /* 1354 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 1357 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 1385 /* 1361 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1376 /* 1365 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1376 /* 1371 */ MCD_OPC_Decode, 142, 16, 201, 1, // Opcode: VST3d8 /* 1376 */ MCD_OPC_CheckPredicate, 16, 142, 17, // Skip to: 5874 /* 1380 */ MCD_OPC_Decode, 145, 16, 201, 1, // Opcode: VST3d8_UPD /* 1385 */ MCD_OPC_FilterValue, 2, 24, 0, // Skip to: 1413 /* 1389 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1404 /* 1393 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1404 /* 1399 */ MCD_OPC_Decode, 134, 16, 201, 1, // Opcode: VST3d16 /* 1404 */ MCD_OPC_CheckPredicate, 16, 114, 17, // Skip to: 5874 /* 1408 */ MCD_OPC_Decode, 137, 16, 201, 1, // Opcode: VST3d16_UPD /* 1413 */ MCD_OPC_FilterValue, 4, 105, 17, // Skip to: 5874 /* 1417 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1432 /* 1421 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1432 /* 1427 */ MCD_OPC_Decode, 138, 16, 201, 1, // Opcode: VST3d32 /* 1432 */ MCD_OPC_CheckPredicate, 16, 86, 17, // Skip to: 5874 /* 1436 */ MCD_OPC_Decode, 141, 16, 201, 1, // Opcode: VST3d32_UPD /* 1441 */ MCD_OPC_FilterValue, 233, 3, 76, 17, // Skip to: 5874 /* 1446 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 1449 */ MCD_OPC_FilterValue, 0, 69, 17, // Skip to: 5874 /* 1453 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1468 /* 1457 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1468 /* 1463 */ MCD_OPC_Decode, 209, 14, 191, 1, // Opcode: VST1LNd16 /* 1468 */ MCD_OPC_CheckPredicate, 16, 50, 17, // Skip to: 5874 /* 1472 */ MCD_OPC_Decode, 210, 14, 191, 1, // Opcode: VST1LNd16_UPD /* 1477 */ MCD_OPC_FilterValue, 2, 41, 17, // Skip to: 5874 /* 1481 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1484 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 1576 /* 1489 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 1492 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 1520 /* 1496 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1511 /* 1500 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1511 /* 1506 */ MCD_OPC_Decode, 204, 8, 201, 1, // Opcode: VLD3d8 /* 1511 */ MCD_OPC_CheckPredicate, 16, 7, 17, // Skip to: 5874 /* 1515 */ MCD_OPC_Decode, 207, 8, 201, 1, // Opcode: VLD3d8_UPD /* 1520 */ MCD_OPC_FilterValue, 2, 24, 0, // Skip to: 1548 /* 1524 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1539 /* 1528 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1539 /* 1534 */ MCD_OPC_Decode, 196, 8, 201, 1, // Opcode: VLD3d16 /* 1539 */ MCD_OPC_CheckPredicate, 16, 235, 16, // Skip to: 5874 /* 1543 */ MCD_OPC_Decode, 199, 8, 201, 1, // Opcode: VLD3d16_UPD /* 1548 */ MCD_OPC_FilterValue, 4, 226, 16, // Skip to: 5874 /* 1552 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1567 /* 1556 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1567 /* 1562 */ MCD_OPC_Decode, 200, 8, 201, 1, // Opcode: VLD3d32 /* 1567 */ MCD_OPC_CheckPredicate, 16, 207, 16, // Skip to: 5874 /* 1571 */ MCD_OPC_Decode, 203, 8, 201, 1, // Opcode: VLD3d32_UPD /* 1576 */ MCD_OPC_FilterValue, 233, 3, 197, 16, // Skip to: 5874 /* 1581 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1596 /* 1585 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1596 /* 1591 */ MCD_OPC_Decode, 217, 6, 192, 1, // Opcode: VLD1LNd16 /* 1596 */ MCD_OPC_CheckPredicate, 16, 178, 16, // Skip to: 5874 /* 1600 */ MCD_OPC_CheckField, 5, 1, 0, 172, 16, // Skip to: 5874 /* 1606 */ MCD_OPC_Decode, 218, 6, 192, 1, // Opcode: VLD1LNd16_UPD /* 1611 */ MCD_OPC_FilterValue, 5, 89, 1, // Skip to: 1960 /* 1615 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 1618 */ MCD_OPC_FilterValue, 0, 3, 1, // Skip to: 1881 /* 1622 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 1625 */ MCD_OPC_FilterValue, 0, 124, 0, // Skip to: 1753 /* 1629 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1632 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 1724 /* 1637 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 1640 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 1668 /* 1644 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1659 /* 1648 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1659 /* 1654 */ MCD_OPC_Decode, 165, 16, 201, 1, // Opcode: VST3q8 /* 1659 */ MCD_OPC_CheckPredicate, 16, 115, 16, // Skip to: 5874 /* 1663 */ MCD_OPC_Decode, 167, 16, 201, 1, // Opcode: VST3q8_UPD /* 1668 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 1696 /* 1672 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1687 /* 1676 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1687 /* 1682 */ MCD_OPC_Decode, 155, 16, 201, 1, // Opcode: VST3q16 /* 1687 */ MCD_OPC_CheckPredicate, 16, 87, 16, // Skip to: 5874 /* 1691 */ MCD_OPC_Decode, 157, 16, 201, 1, // Opcode: VST3q16_UPD /* 1696 */ MCD_OPC_FilterValue, 2, 78, 16, // Skip to: 5874 /* 1700 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1715 /* 1704 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1715 /* 1710 */ MCD_OPC_Decode, 160, 16, 201, 1, // Opcode: VST3q32 /* 1715 */ MCD_OPC_CheckPredicate, 16, 59, 16, // Skip to: 5874 /* 1719 */ MCD_OPC_Decode, 162, 16, 201, 1, // Opcode: VST3q32_UPD /* 1724 */ MCD_OPC_FilterValue, 233, 3, 49, 16, // Skip to: 5874 /* 1729 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1744 /* 1733 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1744 /* 1739 */ MCD_OPC_Decode, 156, 15, 193, 1, // Opcode: VST2LNd16 /* 1744 */ MCD_OPC_CheckPredicate, 16, 30, 16, // Skip to: 5874 /* 1748 */ MCD_OPC_Decode, 159, 15, 193, 1, // Opcode: VST2LNd16_UPD /* 1753 */ MCD_OPC_FilterValue, 2, 21, 16, // Skip to: 5874 /* 1757 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1760 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 1852 /* 1765 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 1768 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 1796 /* 1772 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1787 /* 1776 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1787 /* 1782 */ MCD_OPC_Decode, 227, 8, 201, 1, // Opcode: VLD3q8 /* 1787 */ MCD_OPC_CheckPredicate, 16, 243, 15, // Skip to: 5874 /* 1791 */ MCD_OPC_Decode, 229, 8, 201, 1, // Opcode: VLD3q8_UPD /* 1796 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 1824 /* 1800 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1815 /* 1804 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1815 /* 1810 */ MCD_OPC_Decode, 217, 8, 201, 1, // Opcode: VLD3q16 /* 1815 */ MCD_OPC_CheckPredicate, 16, 215, 15, // Skip to: 5874 /* 1819 */ MCD_OPC_Decode, 219, 8, 201, 1, // Opcode: VLD3q16_UPD /* 1824 */ MCD_OPC_FilterValue, 2, 206, 15, // Skip to: 5874 /* 1828 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1843 /* 1832 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1843 /* 1838 */ MCD_OPC_Decode, 222, 8, 201, 1, // Opcode: VLD3q32 /* 1843 */ MCD_OPC_CheckPredicate, 16, 187, 15, // Skip to: 5874 /* 1847 */ MCD_OPC_Decode, 224, 8, 201, 1, // Opcode: VLD3q32_UPD /* 1852 */ MCD_OPC_FilterValue, 233, 3, 177, 15, // Skip to: 5874 /* 1857 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1872 /* 1861 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1872 /* 1867 */ MCD_OPC_Decode, 182, 7, 194, 1, // Opcode: VLD2LNd16 /* 1872 */ MCD_OPC_CheckPredicate, 16, 158, 15, // Skip to: 5874 /* 1876 */ MCD_OPC_Decode, 185, 7, 194, 1, // Opcode: VLD2LNd16_UPD /* 1881 */ MCD_OPC_FilterValue, 1, 149, 15, // Skip to: 5874 /* 1885 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 1888 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 1924 /* 1892 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1895 */ MCD_OPC_FilterValue, 233, 3, 134, 15, // Skip to: 5874 /* 1900 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1915 /* 1904 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1915 /* 1910 */ MCD_OPC_Decode, 177, 15, 193, 1, // Opcode: VST2LNq16 /* 1915 */ MCD_OPC_CheckPredicate, 16, 115, 15, // Skip to: 5874 /* 1919 */ MCD_OPC_Decode, 180, 15, 193, 1, // Opcode: VST2LNq16_UPD /* 1924 */ MCD_OPC_FilterValue, 2, 106, 15, // Skip to: 5874 /* 1928 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1931 */ MCD_OPC_FilterValue, 233, 3, 98, 15, // Skip to: 5874 /* 1936 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 1951 /* 1940 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 1951 /* 1946 */ MCD_OPC_Decode, 203, 7, 194, 1, // Opcode: VLD2LNq16 /* 1951 */ MCD_OPC_CheckPredicate, 16, 79, 15, // Skip to: 5874 /* 1955 */ MCD_OPC_Decode, 206, 7, 194, 1, // Opcode: VLD2LNq16_UPD /* 1960 */ MCD_OPC_FilterValue, 6, 31, 2, // Skip to: 2507 /* 1964 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 1967 */ MCD_OPC_FilterValue, 0, 11, 1, // Skip to: 2238 /* 1971 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 1974 */ MCD_OPC_FilterValue, 232, 3, 195, 0, // Skip to: 2174 /* 1979 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 1982 */ MCD_OPC_FilterValue, 0, 44, 0, // Skip to: 2030 /* 1986 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1989 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2002 /* 1993 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 2021 /* 1997 */ MCD_OPC_Decode, 140, 15, 195, 1, // Opcode: VST1d8Twb_fixed /* 2002 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 2021 /* 2006 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2021 /* 2010 */ MCD_OPC_CheckField, 5, 1, 0, 5, 0, // Skip to: 2021 /* 2016 */ MCD_OPC_Decode, 139, 15, 195, 1, // Opcode: VST1d8T /* 2021 */ MCD_OPC_CheckPredicate, 16, 9, 15, // Skip to: 5874 /* 2025 */ MCD_OPC_Decode, 141, 15, 195, 1, // Opcode: VST1d8Twb_register /* 2030 */ MCD_OPC_FilterValue, 1, 44, 0, // Skip to: 2078 /* 2034 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2037 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2050 /* 2041 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 2069 /* 2045 */ MCD_OPC_Decode, 235, 14, 195, 1, // Opcode: VST1d16Twb_fixed /* 2050 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 2069 /* 2054 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2069 /* 2058 */ MCD_OPC_CheckField, 5, 1, 0, 5, 0, // Skip to: 2069 /* 2064 */ MCD_OPC_Decode, 234, 14, 195, 1, // Opcode: VST1d16T /* 2069 */ MCD_OPC_CheckPredicate, 16, 217, 14, // Skip to: 5874 /* 2073 */ MCD_OPC_Decode, 236, 14, 195, 1, // Opcode: VST1d16Twb_register /* 2078 */ MCD_OPC_FilterValue, 2, 44, 0, // Skip to: 2126 /* 2082 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2085 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2098 /* 2089 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 2117 /* 2093 */ MCD_OPC_Decode, 244, 14, 195, 1, // Opcode: VST1d32Twb_fixed /* 2098 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 2117 /* 2102 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2117 /* 2106 */ MCD_OPC_CheckField, 5, 1, 0, 5, 0, // Skip to: 2117 /* 2112 */ MCD_OPC_Decode, 243, 14, 195, 1, // Opcode: VST1d32T /* 2117 */ MCD_OPC_CheckPredicate, 16, 169, 14, // Skip to: 5874 /* 2121 */ MCD_OPC_Decode, 245, 14, 195, 1, // Opcode: VST1d32Twb_register /* 2126 */ MCD_OPC_FilterValue, 3, 160, 14, // Skip to: 5874 /* 2130 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2133 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2146 /* 2137 */ MCD_OPC_CheckPredicate, 16, 24, 0, // Skip to: 2165 /* 2141 */ MCD_OPC_Decode, 131, 15, 195, 1, // Opcode: VST1d64Twb_fixed /* 2146 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 2165 /* 2150 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2165 /* 2154 */ MCD_OPC_CheckField, 5, 1, 0, 5, 0, // Skip to: 2165 /* 2160 */ MCD_OPC_Decode, 255, 14, 195, 1, // Opcode: VST1d64T /* 2165 */ MCD_OPC_CheckPredicate, 16, 121, 14, // Skip to: 5874 /* 2169 */ MCD_OPC_Decode, 132, 15, 195, 1, // Opcode: VST1d64Twb_register /* 2174 */ MCD_OPC_FilterValue, 233, 3, 111, 14, // Skip to: 5874 /* 2179 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 2182 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 2210 /* 2186 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2201 /* 2190 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2201 /* 2196 */ MCD_OPC_Decode, 227, 15, 196, 1, // Opcode: VST3LNd16 /* 2201 */ MCD_OPC_CheckPredicate, 16, 85, 14, // Skip to: 5874 /* 2205 */ MCD_OPC_Decode, 230, 15, 196, 1, // Opcode: VST3LNd16_UPD /* 2210 */ MCD_OPC_FilterValue, 2, 76, 14, // Skip to: 5874 /* 2214 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2229 /* 2218 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2229 /* 2224 */ MCD_OPC_Decode, 248, 15, 196, 1, // Opcode: VST3LNq16 /* 2229 */ MCD_OPC_CheckPredicate, 16, 57, 14, // Skip to: 5874 /* 2233 */ MCD_OPC_Decode, 251, 15, 196, 1, // Opcode: VST3LNq16_UPD /* 2238 */ MCD_OPC_FilterValue, 2, 48, 14, // Skip to: 5874 /* 2242 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 2245 */ MCD_OPC_FilterValue, 0, 215, 0, // Skip to: 2464 /* 2249 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2252 */ MCD_OPC_FilterValue, 232, 3, 171, 0, // Skip to: 2428 /* 2257 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 2260 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 2302 /* 2264 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2267 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2280 /* 2271 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2293 /* 2275 */ MCD_OPC_Decode, 148, 7, 195, 1, // Opcode: VLD1d8Twb_fixed /* 2280 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2293 /* 2284 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2293 /* 2288 */ MCD_OPC_Decode, 147, 7, 195, 1, // Opcode: VLD1d8T /* 2293 */ MCD_OPC_CheckPredicate, 16, 249, 13, // Skip to: 5874 /* 2297 */ MCD_OPC_Decode, 149, 7, 195, 1, // Opcode: VLD1d8Twb_register /* 2302 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 2344 /* 2306 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2309 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2322 /* 2313 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2335 /* 2317 */ MCD_OPC_Decode, 243, 6, 195, 1, // Opcode: VLD1d16Twb_fixed /* 2322 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2335 /* 2326 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2335 /* 2330 */ MCD_OPC_Decode, 242, 6, 195, 1, // Opcode: VLD1d16T /* 2335 */ MCD_OPC_CheckPredicate, 16, 207, 13, // Skip to: 5874 /* 2339 */ MCD_OPC_Decode, 244, 6, 195, 1, // Opcode: VLD1d16Twb_register /* 2344 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 2386 /* 2348 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2351 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2364 /* 2355 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2377 /* 2359 */ MCD_OPC_Decode, 252, 6, 195, 1, // Opcode: VLD1d32Twb_fixed /* 2364 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2377 /* 2368 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2377 /* 2372 */ MCD_OPC_Decode, 251, 6, 195, 1, // Opcode: VLD1d32T /* 2377 */ MCD_OPC_CheckPredicate, 16, 165, 13, // Skip to: 5874 /* 2381 */ MCD_OPC_Decode, 253, 6, 195, 1, // Opcode: VLD1d32Twb_register /* 2386 */ MCD_OPC_FilterValue, 3, 156, 13, // Skip to: 5874 /* 2390 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2393 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2406 /* 2397 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2419 /* 2401 */ MCD_OPC_Decode, 139, 7, 195, 1, // Opcode: VLD1d64Twb_fixed /* 2406 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2419 /* 2410 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2419 /* 2414 */ MCD_OPC_Decode, 135, 7, 195, 1, // Opcode: VLD1d64T /* 2419 */ MCD_OPC_CheckPredicate, 16, 123, 13, // Skip to: 5874 /* 2423 */ MCD_OPC_Decode, 140, 7, 195, 1, // Opcode: VLD1d64Twb_register /* 2428 */ MCD_OPC_FilterValue, 233, 3, 113, 13, // Skip to: 5874 /* 2433 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 2436 */ MCD_OPC_FilterValue, 0, 106, 13, // Skip to: 5874 /* 2440 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2455 /* 2444 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2455 /* 2450 */ MCD_OPC_Decode, 161, 8, 197, 1, // Opcode: VLD3LNd16 /* 2455 */ MCD_OPC_CheckPredicate, 16, 87, 13, // Skip to: 5874 /* 2459 */ MCD_OPC_Decode, 164, 8, 197, 1, // Opcode: VLD3LNd16_UPD /* 2464 */ MCD_OPC_FilterValue, 1, 78, 13, // Skip to: 5874 /* 2468 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 2471 */ MCD_OPC_FilterValue, 0, 71, 13, // Skip to: 5874 /* 2475 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2478 */ MCD_OPC_FilterValue, 233, 3, 63, 13, // Skip to: 5874 /* 2483 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2498 /* 2487 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2498 /* 2493 */ MCD_OPC_Decode, 182, 8, 197, 1, // Opcode: VLD3LNq16 /* 2498 */ MCD_OPC_CheckPredicate, 16, 44, 13, // Skip to: 5874 /* 2502 */ MCD_OPC_Decode, 185, 8, 197, 1, // Opcode: VLD3LNq16_UPD /* 2507 */ MCD_OPC_FilterValue, 7, 1, 2, // Skip to: 3024 /* 2511 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 2514 */ MCD_OPC_FilterValue, 0, 171, 1, // Skip to: 2945 /* 2518 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 2521 */ MCD_OPC_FilterValue, 0, 208, 0, // Skip to: 2733 /* 2525 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2528 */ MCD_OPC_FilterValue, 232, 3, 171, 0, // Skip to: 2704 /* 2533 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 2536 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 2578 /* 2540 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2543 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2556 /* 2547 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2569 /* 2551 */ MCD_OPC_Decode, 142, 15, 195, 1, // Opcode: VST1d8wb_fixed /* 2556 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2569 /* 2560 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2569 /* 2564 */ MCD_OPC_Decode, 135, 15, 195, 1, // Opcode: VST1d8 /* 2569 */ MCD_OPC_CheckPredicate, 16, 229, 12, // Skip to: 5874 /* 2573 */ MCD_OPC_Decode, 143, 15, 195, 1, // Opcode: VST1d8wb_register /* 2578 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 2620 /* 2582 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2585 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2598 /* 2589 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2611 /* 2593 */ MCD_OPC_Decode, 237, 14, 195, 1, // Opcode: VST1d16wb_fixed /* 2598 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2611 /* 2602 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2611 /* 2606 */ MCD_OPC_Decode, 230, 14, 195, 1, // Opcode: VST1d16 /* 2611 */ MCD_OPC_CheckPredicate, 16, 187, 12, // Skip to: 5874 /* 2615 */ MCD_OPC_Decode, 238, 14, 195, 1, // Opcode: VST1d16wb_register /* 2620 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 2662 /* 2624 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2627 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2640 /* 2631 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2653 /* 2635 */ MCD_OPC_Decode, 246, 14, 195, 1, // Opcode: VST1d32wb_fixed /* 2640 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2653 /* 2644 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2653 /* 2648 */ MCD_OPC_Decode, 239, 14, 195, 1, // Opcode: VST1d32 /* 2653 */ MCD_OPC_CheckPredicate, 16, 145, 12, // Skip to: 5874 /* 2657 */ MCD_OPC_Decode, 247, 14, 195, 1, // Opcode: VST1d32wb_register /* 2662 */ MCD_OPC_FilterValue, 3, 136, 12, // Skip to: 5874 /* 2666 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2669 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2682 /* 2673 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2695 /* 2677 */ MCD_OPC_Decode, 133, 15, 195, 1, // Opcode: VST1d64wb_fixed /* 2682 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2695 /* 2686 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2695 /* 2690 */ MCD_OPC_Decode, 248, 14, 195, 1, // Opcode: VST1d64 /* 2695 */ MCD_OPC_CheckPredicate, 16, 103, 12, // Skip to: 5874 /* 2699 */ MCD_OPC_Decode, 134, 15, 195, 1, // Opcode: VST1d64wb_register /* 2704 */ MCD_OPC_FilterValue, 233, 3, 93, 12, // Skip to: 5874 /* 2709 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2724 /* 2713 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2724 /* 2719 */ MCD_OPC_Decode, 179, 16, 199, 1, // Opcode: VST4LNd16 /* 2724 */ MCD_OPC_CheckPredicate, 16, 74, 12, // Skip to: 5874 /* 2728 */ MCD_OPC_Decode, 182, 16, 199, 1, // Opcode: VST4LNd16_UPD /* 2733 */ MCD_OPC_FilterValue, 2, 65, 12, // Skip to: 5874 /* 2737 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2740 */ MCD_OPC_FilterValue, 232, 3, 171, 0, // Skip to: 2916 /* 2745 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 2748 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 2790 /* 2752 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2755 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2768 /* 2759 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2781 /* 2763 */ MCD_OPC_Decode, 150, 7, 195, 1, // Opcode: VLD1d8wb_fixed /* 2768 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2781 /* 2772 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2781 /* 2776 */ MCD_OPC_Decode, 143, 7, 195, 1, // Opcode: VLD1d8 /* 2781 */ MCD_OPC_CheckPredicate, 16, 17, 12, // Skip to: 5874 /* 2785 */ MCD_OPC_Decode, 151, 7, 195, 1, // Opcode: VLD1d8wb_register /* 2790 */ MCD_OPC_FilterValue, 1, 38, 0, // Skip to: 2832 /* 2794 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2797 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2810 /* 2801 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2823 /* 2805 */ MCD_OPC_Decode, 245, 6, 195, 1, // Opcode: VLD1d16wb_fixed /* 2810 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2823 /* 2814 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2823 /* 2818 */ MCD_OPC_Decode, 238, 6, 195, 1, // Opcode: VLD1d16 /* 2823 */ MCD_OPC_CheckPredicate, 16, 231, 11, // Skip to: 5874 /* 2827 */ MCD_OPC_Decode, 246, 6, 195, 1, // Opcode: VLD1d16wb_register /* 2832 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 2874 /* 2836 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2839 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2852 /* 2843 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2865 /* 2847 */ MCD_OPC_Decode, 254, 6, 195, 1, // Opcode: VLD1d32wb_fixed /* 2852 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2865 /* 2856 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2865 /* 2860 */ MCD_OPC_Decode, 247, 6, 195, 1, // Opcode: VLD1d32 /* 2865 */ MCD_OPC_CheckPredicate, 16, 189, 11, // Skip to: 5874 /* 2869 */ MCD_OPC_Decode, 255, 6, 195, 1, // Opcode: VLD1d32wb_register /* 2874 */ MCD_OPC_FilterValue, 3, 180, 11, // Skip to: 5874 /* 2878 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 2881 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2894 /* 2885 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 2907 /* 2889 */ MCD_OPC_Decode, 141, 7, 195, 1, // Opcode: VLD1d64wb_fixed /* 2894 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 2907 /* 2898 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 2907 /* 2902 */ MCD_OPC_Decode, 128, 7, 195, 1, // Opcode: VLD1d64 /* 2907 */ MCD_OPC_CheckPredicate, 16, 147, 11, // Skip to: 5874 /* 2911 */ MCD_OPC_Decode, 142, 7, 195, 1, // Opcode: VLD1d64wb_register /* 2916 */ MCD_OPC_FilterValue, 233, 3, 137, 11, // Skip to: 5874 /* 2921 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2936 /* 2925 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2936 /* 2931 */ MCD_OPC_Decode, 149, 9, 200, 1, // Opcode: VLD4LNd16 /* 2936 */ MCD_OPC_CheckPredicate, 16, 118, 11, // Skip to: 5874 /* 2940 */ MCD_OPC_Decode, 152, 9, 200, 1, // Opcode: VLD4LNd16_UPD /* 2945 */ MCD_OPC_FilterValue, 1, 109, 11, // Skip to: 5874 /* 2949 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 2952 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 2988 /* 2956 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2959 */ MCD_OPC_FilterValue, 233, 3, 94, 11, // Skip to: 5874 /* 2964 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 2979 /* 2968 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 2979 /* 2974 */ MCD_OPC_Decode, 200, 16, 199, 1, // Opcode: VST4LNq16 /* 2979 */ MCD_OPC_CheckPredicate, 16, 75, 11, // Skip to: 5874 /* 2983 */ MCD_OPC_Decode, 203, 16, 199, 1, // Opcode: VST4LNq16_UPD /* 2988 */ MCD_OPC_FilterValue, 2, 66, 11, // Skip to: 5874 /* 2992 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 2995 */ MCD_OPC_FilterValue, 233, 3, 58, 11, // Skip to: 5874 /* 3000 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3015 /* 3004 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3015 /* 3010 */ MCD_OPC_Decode, 170, 9, 200, 1, // Opcode: VLD4LNq16 /* 3015 */ MCD_OPC_CheckPredicate, 16, 39, 11, // Skip to: 5874 /* 3019 */ MCD_OPC_Decode, 173, 9, 200, 1, // Opcode: VLD4LNq16_UPD /* 3024 */ MCD_OPC_FilterValue, 8, 131, 1, // Skip to: 3415 /* 3028 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3031 */ MCD_OPC_FilterValue, 0, 3, 1, // Skip to: 3294 /* 3035 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3038 */ MCD_OPC_FilterValue, 0, 124, 0, // Skip to: 3166 /* 3042 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3045 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 3137 /* 3050 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3053 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 3095 /* 3057 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3060 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3073 /* 3064 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3086 /* 3068 */ MCD_OPC_Decode, 207, 15, 198, 1, // Opcode: VST2d8wb_fixed /* 3073 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3086 /* 3077 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3086 /* 3081 */ MCD_OPC_Decode, 206, 15, 198, 1, // Opcode: VST2d8 /* 3086 */ MCD_OPC_CheckPredicate, 16, 224, 10, // Skip to: 5874 /* 3090 */ MCD_OPC_Decode, 208, 15, 198, 1, // Opcode: VST2d8wb_register /* 3095 */ MCD_OPC_FilterValue, 1, 215, 10, // Skip to: 5874 /* 3099 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3102 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3115 /* 3106 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3128 /* 3110 */ MCD_OPC_Decode, 204, 15, 198, 1, // Opcode: VST2d32wb_fixed /* 3115 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3128 /* 3119 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3128 /* 3123 */ MCD_OPC_Decode, 203, 15, 198, 1, // Opcode: VST2d32 /* 3128 */ MCD_OPC_CheckPredicate, 16, 182, 10, // Skip to: 5874 /* 3132 */ MCD_OPC_Decode, 205, 15, 198, 1, // Opcode: VST2d32wb_register /* 3137 */ MCD_OPC_FilterValue, 233, 3, 172, 10, // Skip to: 5874 /* 3142 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3157 /* 3146 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3157 /* 3152 */ MCD_OPC_Decode, 211, 14, 191, 1, // Opcode: VST1LNd32 /* 3157 */ MCD_OPC_CheckPredicate, 16, 153, 10, // Skip to: 5874 /* 3161 */ MCD_OPC_Decode, 212, 14, 191, 1, // Opcode: VST1LNd32_UPD /* 3166 */ MCD_OPC_FilterValue, 2, 144, 10, // Skip to: 5874 /* 3170 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3173 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 3265 /* 3178 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3181 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 3223 /* 3185 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3188 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3201 /* 3192 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3214 /* 3196 */ MCD_OPC_Decode, 233, 7, 198, 1, // Opcode: VLD2d8wb_fixed /* 3201 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3214 /* 3205 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3214 /* 3209 */ MCD_OPC_Decode, 232, 7, 198, 1, // Opcode: VLD2d8 /* 3214 */ MCD_OPC_CheckPredicate, 16, 96, 10, // Skip to: 5874 /* 3218 */ MCD_OPC_Decode, 234, 7, 198, 1, // Opcode: VLD2d8wb_register /* 3223 */ MCD_OPC_FilterValue, 1, 87, 10, // Skip to: 5874 /* 3227 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3230 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3243 /* 3234 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3256 /* 3238 */ MCD_OPC_Decode, 230, 7, 198, 1, // Opcode: VLD2d32wb_fixed /* 3243 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3256 /* 3247 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3256 /* 3251 */ MCD_OPC_Decode, 229, 7, 198, 1, // Opcode: VLD2d32 /* 3256 */ MCD_OPC_CheckPredicate, 16, 54, 10, // Skip to: 5874 /* 3260 */ MCD_OPC_Decode, 231, 7, 198, 1, // Opcode: VLD2d32wb_register /* 3265 */ MCD_OPC_FilterValue, 233, 3, 44, 10, // Skip to: 5874 /* 3270 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3285 /* 3274 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3285 /* 3280 */ MCD_OPC_Decode, 219, 6, 192, 1, // Opcode: VLD1LNd32 /* 3285 */ MCD_OPC_CheckPredicate, 16, 25, 10, // Skip to: 5874 /* 3289 */ MCD_OPC_Decode, 220, 6, 192, 1, // Opcode: VLD1LNd32_UPD /* 3294 */ MCD_OPC_FilterValue, 1, 16, 10, // Skip to: 5874 /* 3298 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3301 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 3358 /* 3305 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3308 */ MCD_OPC_FilterValue, 0, 2, 10, // Skip to: 5874 /* 3312 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3315 */ MCD_OPC_FilterValue, 232, 3, 250, 9, // Skip to: 5874 /* 3320 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3323 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3336 /* 3327 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3349 /* 3331 */ MCD_OPC_Decode, 201, 15, 198, 1, // Opcode: VST2d16wb_fixed /* 3336 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3349 /* 3340 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3349 /* 3344 */ MCD_OPC_Decode, 200, 15, 198, 1, // Opcode: VST2d16 /* 3349 */ MCD_OPC_CheckPredicate, 16, 217, 9, // Skip to: 5874 /* 3353 */ MCD_OPC_Decode, 202, 15, 198, 1, // Opcode: VST2d16wb_register /* 3358 */ MCD_OPC_FilterValue, 2, 208, 9, // Skip to: 5874 /* 3362 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3365 */ MCD_OPC_FilterValue, 0, 201, 9, // Skip to: 5874 /* 3369 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3372 */ MCD_OPC_FilterValue, 232, 3, 193, 9, // Skip to: 5874 /* 3377 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3380 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3393 /* 3384 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3406 /* 3388 */ MCD_OPC_Decode, 227, 7, 198, 1, // Opcode: VLD2d16wb_fixed /* 3393 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3406 /* 3397 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3406 /* 3401 */ MCD_OPC_Decode, 226, 7, 198, 1, // Opcode: VLD2d16 /* 3406 */ MCD_OPC_CheckPredicate, 16, 160, 9, // Skip to: 5874 /* 3410 */ MCD_OPC_Decode, 228, 7, 198, 1, // Opcode: VLD2d16wb_register /* 3415 */ MCD_OPC_FilterValue, 9, 217, 1, // Skip to: 3892 /* 3419 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3422 */ MCD_OPC_FilterValue, 0, 17, 1, // Skip to: 3699 /* 3426 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3429 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 3564 /* 3433 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3436 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 3528 /* 3441 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3444 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 3486 /* 3448 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3451 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3464 /* 3455 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3477 /* 3459 */ MCD_OPC_Decode, 198, 15, 198, 1, // Opcode: VST2b8wb_fixed /* 3464 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3477 /* 3468 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3477 /* 3472 */ MCD_OPC_Decode, 197, 15, 198, 1, // Opcode: VST2b8 /* 3477 */ MCD_OPC_CheckPredicate, 16, 89, 9, // Skip to: 5874 /* 3481 */ MCD_OPC_Decode, 199, 15, 198, 1, // Opcode: VST2b8wb_register /* 3486 */ MCD_OPC_FilterValue, 1, 80, 9, // Skip to: 5874 /* 3490 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3493 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3506 /* 3497 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3519 /* 3501 */ MCD_OPC_Decode, 195, 15, 198, 1, // Opcode: VST2b32wb_fixed /* 3506 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3519 /* 3510 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3519 /* 3514 */ MCD_OPC_Decode, 194, 15, 198, 1, // Opcode: VST2b32 /* 3519 */ MCD_OPC_CheckPredicate, 16, 47, 9, // Skip to: 5874 /* 3523 */ MCD_OPC_Decode, 196, 15, 198, 1, // Opcode: VST2b32wb_register /* 3528 */ MCD_OPC_FilterValue, 233, 3, 37, 9, // Skip to: 5874 /* 3533 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 3536 */ MCD_OPC_FilterValue, 0, 30, 9, // Skip to: 5874 /* 3540 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3555 /* 3544 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3555 /* 3550 */ MCD_OPC_Decode, 160, 15, 193, 1, // Opcode: VST2LNd32 /* 3555 */ MCD_OPC_CheckPredicate, 16, 11, 9, // Skip to: 5874 /* 3559 */ MCD_OPC_Decode, 163, 15, 193, 1, // Opcode: VST2LNd32_UPD /* 3564 */ MCD_OPC_FilterValue, 2, 2, 9, // Skip to: 5874 /* 3568 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3571 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 3663 /* 3576 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3579 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 3621 /* 3583 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3586 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3599 /* 3590 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3612 /* 3594 */ MCD_OPC_Decode, 224, 7, 198, 1, // Opcode: VLD2b8wb_fixed /* 3599 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3612 /* 3603 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3612 /* 3607 */ MCD_OPC_Decode, 223, 7, 198, 1, // Opcode: VLD2b8 /* 3612 */ MCD_OPC_CheckPredicate, 16, 210, 8, // Skip to: 5874 /* 3616 */ MCD_OPC_Decode, 225, 7, 198, 1, // Opcode: VLD2b8wb_register /* 3621 */ MCD_OPC_FilterValue, 1, 201, 8, // Skip to: 5874 /* 3625 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3628 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3641 /* 3632 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3654 /* 3636 */ MCD_OPC_Decode, 221, 7, 198, 1, // Opcode: VLD2b32wb_fixed /* 3641 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3654 /* 3645 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3654 /* 3649 */ MCD_OPC_Decode, 220, 7, 198, 1, // Opcode: VLD2b32 /* 3654 */ MCD_OPC_CheckPredicate, 16, 168, 8, // Skip to: 5874 /* 3658 */ MCD_OPC_Decode, 222, 7, 198, 1, // Opcode: VLD2b32wb_register /* 3663 */ MCD_OPC_FilterValue, 233, 3, 158, 8, // Skip to: 5874 /* 3668 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 3671 */ MCD_OPC_FilterValue, 0, 151, 8, // Skip to: 5874 /* 3675 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3690 /* 3679 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3690 /* 3685 */ MCD_OPC_Decode, 186, 7, 194, 1, // Opcode: VLD2LNd32 /* 3690 */ MCD_OPC_CheckPredicate, 16, 132, 8, // Skip to: 5874 /* 3694 */ MCD_OPC_Decode, 189, 7, 194, 1, // Opcode: VLD2LNd32_UPD /* 3699 */ MCD_OPC_FilterValue, 1, 123, 8, // Skip to: 5874 /* 3703 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3706 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 3799 /* 3710 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3713 */ MCD_OPC_FilterValue, 232, 3, 45, 0, // Skip to: 3763 /* 3718 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3721 */ MCD_OPC_FilterValue, 0, 101, 8, // Skip to: 5874 /* 3725 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3728 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3741 /* 3732 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3754 /* 3736 */ MCD_OPC_Decode, 192, 15, 198, 1, // Opcode: VST2b16wb_fixed /* 3741 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3754 /* 3745 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3754 /* 3749 */ MCD_OPC_Decode, 191, 15, 198, 1, // Opcode: VST2b16 /* 3754 */ MCD_OPC_CheckPredicate, 16, 68, 8, // Skip to: 5874 /* 3758 */ MCD_OPC_Decode, 193, 15, 198, 1, // Opcode: VST2b16wb_register /* 3763 */ MCD_OPC_FilterValue, 233, 3, 58, 8, // Skip to: 5874 /* 3768 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 3771 */ MCD_OPC_FilterValue, 0, 51, 8, // Skip to: 5874 /* 3775 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3790 /* 3779 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3790 /* 3785 */ MCD_OPC_Decode, 181, 15, 193, 1, // Opcode: VST2LNq32 /* 3790 */ MCD_OPC_CheckPredicate, 16, 32, 8, // Skip to: 5874 /* 3794 */ MCD_OPC_Decode, 184, 15, 193, 1, // Opcode: VST2LNq32_UPD /* 3799 */ MCD_OPC_FilterValue, 2, 23, 8, // Skip to: 5874 /* 3803 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3806 */ MCD_OPC_FilterValue, 232, 3, 45, 0, // Skip to: 3856 /* 3811 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3814 */ MCD_OPC_FilterValue, 0, 8, 8, // Skip to: 5874 /* 3818 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3821 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3834 /* 3825 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3847 /* 3829 */ MCD_OPC_Decode, 218, 7, 198, 1, // Opcode: VLD2b16wb_fixed /* 3834 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3847 /* 3838 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3847 /* 3842 */ MCD_OPC_Decode, 217, 7, 198, 1, // Opcode: VLD2b16 /* 3847 */ MCD_OPC_CheckPredicate, 16, 231, 7, // Skip to: 5874 /* 3851 */ MCD_OPC_Decode, 219, 7, 198, 1, // Opcode: VLD2b16wb_register /* 3856 */ MCD_OPC_FilterValue, 233, 3, 221, 7, // Skip to: 5874 /* 3861 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 3864 */ MCD_OPC_FilterValue, 0, 214, 7, // Skip to: 5874 /* 3868 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 3883 /* 3872 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 3883 /* 3878 */ MCD_OPC_Decode, 207, 7, 194, 1, // Opcode: VLD2LNq32 /* 3883 */ MCD_OPC_CheckPredicate, 16, 195, 7, // Skip to: 5874 /* 3887 */ MCD_OPC_Decode, 210, 7, 194, 1, // Opcode: VLD2LNq32_UPD /* 3892 */ MCD_OPC_FilterValue, 10, 45, 2, // Skip to: 4453 /* 3896 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 3899 */ MCD_OPC_FilterValue, 0, 17, 1, // Skip to: 4176 /* 3903 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3906 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 4041 /* 3910 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 3913 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 4005 /* 3918 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 3921 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 3963 /* 3925 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3928 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3941 /* 3932 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3954 /* 3936 */ MCD_OPC_Decode, 154, 15, 195, 1, // Opcode: VST1q8wb_fixed /* 3941 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3954 /* 3945 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3954 /* 3949 */ MCD_OPC_Decode, 153, 15, 195, 1, // Opcode: VST1q8 /* 3954 */ MCD_OPC_CheckPredicate, 16, 124, 7, // Skip to: 5874 /* 3958 */ MCD_OPC_Decode, 155, 15, 195, 1, // Opcode: VST1q8wb_register /* 3963 */ MCD_OPC_FilterValue, 1, 115, 7, // Skip to: 5874 /* 3967 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 3970 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 3983 /* 3974 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 3996 /* 3978 */ MCD_OPC_Decode, 148, 15, 195, 1, // Opcode: VST1q32wb_fixed /* 3983 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 3996 /* 3987 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 3996 /* 3991 */ MCD_OPC_Decode, 147, 15, 195, 1, // Opcode: VST1q32 /* 3996 */ MCD_OPC_CheckPredicate, 16, 82, 7, // Skip to: 5874 /* 4000 */ MCD_OPC_Decode, 149, 15, 195, 1, // Opcode: VST1q32wb_register /* 4005 */ MCD_OPC_FilterValue, 233, 3, 72, 7, // Skip to: 5874 /* 4010 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 4013 */ MCD_OPC_FilterValue, 0, 65, 7, // Skip to: 5874 /* 4017 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4032 /* 4021 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4032 /* 4027 */ MCD_OPC_Decode, 231, 15, 196, 1, // Opcode: VST3LNd32 /* 4032 */ MCD_OPC_CheckPredicate, 16, 46, 7, // Skip to: 5874 /* 4036 */ MCD_OPC_Decode, 234, 15, 196, 1, // Opcode: VST3LNd32_UPD /* 4041 */ MCD_OPC_FilterValue, 2, 37, 7, // Skip to: 5874 /* 4045 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4048 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 4140 /* 4053 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4056 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 4098 /* 4060 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4063 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4076 /* 4067 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4089 /* 4071 */ MCD_OPC_Decode, 162, 7, 195, 1, // Opcode: VLD1q8wb_fixed /* 4076 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4089 /* 4080 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4089 /* 4084 */ MCD_OPC_Decode, 161, 7, 195, 1, // Opcode: VLD1q8 /* 4089 */ MCD_OPC_CheckPredicate, 16, 245, 6, // Skip to: 5874 /* 4093 */ MCD_OPC_Decode, 163, 7, 195, 1, // Opcode: VLD1q8wb_register /* 4098 */ MCD_OPC_FilterValue, 1, 236, 6, // Skip to: 5874 /* 4102 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4105 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4118 /* 4109 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4131 /* 4113 */ MCD_OPC_Decode, 156, 7, 195, 1, // Opcode: VLD1q32wb_fixed /* 4118 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4131 /* 4122 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4131 /* 4126 */ MCD_OPC_Decode, 155, 7, 195, 1, // Opcode: VLD1q32 /* 4131 */ MCD_OPC_CheckPredicate, 16, 203, 6, // Skip to: 5874 /* 4135 */ MCD_OPC_Decode, 157, 7, 195, 1, // Opcode: VLD1q32wb_register /* 4140 */ MCD_OPC_FilterValue, 233, 3, 193, 6, // Skip to: 5874 /* 4145 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 4148 */ MCD_OPC_FilterValue, 0, 186, 6, // Skip to: 5874 /* 4152 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4167 /* 4156 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4167 /* 4162 */ MCD_OPC_Decode, 165, 8, 197, 1, // Opcode: VLD3LNd32 /* 4167 */ MCD_OPC_CheckPredicate, 16, 167, 6, // Skip to: 5874 /* 4171 */ MCD_OPC_Decode, 168, 8, 197, 1, // Opcode: VLD3LNd32_UPD /* 4176 */ MCD_OPC_FilterValue, 1, 158, 6, // Skip to: 5874 /* 4180 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4183 */ MCD_OPC_FilterValue, 0, 131, 0, // Skip to: 4318 /* 4187 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4190 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 4282 /* 4195 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4198 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 4240 /* 4202 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4205 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4218 /* 4209 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4231 /* 4213 */ MCD_OPC_Decode, 145, 15, 195, 1, // Opcode: VST1q16wb_fixed /* 4218 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4231 /* 4222 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4231 /* 4226 */ MCD_OPC_Decode, 144, 15, 195, 1, // Opcode: VST1q16 /* 4231 */ MCD_OPC_CheckPredicate, 16, 103, 6, // Skip to: 5874 /* 4235 */ MCD_OPC_Decode, 146, 15, 195, 1, // Opcode: VST1q16wb_register /* 4240 */ MCD_OPC_FilterValue, 1, 94, 6, // Skip to: 5874 /* 4244 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4247 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4260 /* 4251 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4273 /* 4255 */ MCD_OPC_Decode, 151, 15, 195, 1, // Opcode: VST1q64wb_fixed /* 4260 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4273 /* 4264 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4273 /* 4268 */ MCD_OPC_Decode, 150, 15, 195, 1, // Opcode: VST1q64 /* 4273 */ MCD_OPC_CheckPredicate, 16, 61, 6, // Skip to: 5874 /* 4277 */ MCD_OPC_Decode, 152, 15, 195, 1, // Opcode: VST1q64wb_register /* 4282 */ MCD_OPC_FilterValue, 233, 3, 51, 6, // Skip to: 5874 /* 4287 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 4290 */ MCD_OPC_FilterValue, 0, 44, 6, // Skip to: 5874 /* 4294 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4309 /* 4298 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4309 /* 4304 */ MCD_OPC_Decode, 252, 15, 196, 1, // Opcode: VST3LNq32 /* 4309 */ MCD_OPC_CheckPredicate, 16, 25, 6, // Skip to: 5874 /* 4313 */ MCD_OPC_Decode, 255, 15, 196, 1, // Opcode: VST3LNq32_UPD /* 4318 */ MCD_OPC_FilterValue, 2, 16, 6, // Skip to: 5874 /* 4322 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4325 */ MCD_OPC_FilterValue, 232, 3, 87, 0, // Skip to: 4417 /* 4330 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4333 */ MCD_OPC_FilterValue, 0, 38, 0, // Skip to: 4375 /* 4337 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4340 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4353 /* 4344 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4366 /* 4348 */ MCD_OPC_Decode, 153, 7, 195, 1, // Opcode: VLD1q16wb_fixed /* 4353 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4366 /* 4357 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4366 /* 4361 */ MCD_OPC_Decode, 152, 7, 195, 1, // Opcode: VLD1q16 /* 4366 */ MCD_OPC_CheckPredicate, 16, 224, 5, // Skip to: 5874 /* 4370 */ MCD_OPC_Decode, 154, 7, 195, 1, // Opcode: VLD1q16wb_register /* 4375 */ MCD_OPC_FilterValue, 1, 215, 5, // Skip to: 5874 /* 4379 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4382 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4395 /* 4386 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4408 /* 4390 */ MCD_OPC_Decode, 159, 7, 195, 1, // Opcode: VLD1q64wb_fixed /* 4395 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4408 /* 4399 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4408 /* 4403 */ MCD_OPC_Decode, 158, 7, 195, 1, // Opcode: VLD1q64 /* 4408 */ MCD_OPC_CheckPredicate, 16, 182, 5, // Skip to: 5874 /* 4412 */ MCD_OPC_Decode, 160, 7, 195, 1, // Opcode: VLD1q64wb_register /* 4417 */ MCD_OPC_FilterValue, 233, 3, 172, 5, // Skip to: 5874 /* 4422 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 4425 */ MCD_OPC_FilterValue, 0, 165, 5, // Skip to: 5874 /* 4429 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4444 /* 4433 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4444 /* 4439 */ MCD_OPC_Decode, 186, 8, 197, 1, // Opcode: VLD3LNq32 /* 4444 */ MCD_OPC_CheckPredicate, 16, 146, 5, // Skip to: 5874 /* 4448 */ MCD_OPC_Decode, 189, 8, 197, 1, // Opcode: VLD3LNq32_UPD /* 4453 */ MCD_OPC_FilterValue, 11, 161, 0, // Skip to: 4618 /* 4457 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 4460 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 4539 /* 4464 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4467 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 4503 /* 4471 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4474 */ MCD_OPC_FilterValue, 233, 3, 115, 5, // Skip to: 5874 /* 4479 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4494 /* 4483 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4494 /* 4489 */ MCD_OPC_Decode, 183, 16, 199, 1, // Opcode: VST4LNd32 /* 4494 */ MCD_OPC_CheckPredicate, 16, 96, 5, // Skip to: 5874 /* 4498 */ MCD_OPC_Decode, 186, 16, 199, 1, // Opcode: VST4LNd32_UPD /* 4503 */ MCD_OPC_FilterValue, 2, 87, 5, // Skip to: 5874 /* 4507 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4510 */ MCD_OPC_FilterValue, 233, 3, 79, 5, // Skip to: 5874 /* 4515 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4530 /* 4519 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4530 /* 4525 */ MCD_OPC_Decode, 153, 9, 200, 1, // Opcode: VLD4LNd32 /* 4530 */ MCD_OPC_CheckPredicate, 16, 60, 5, // Skip to: 5874 /* 4534 */ MCD_OPC_Decode, 156, 9, 200, 1, // Opcode: VLD4LNd32_UPD /* 4539 */ MCD_OPC_FilterValue, 1, 51, 5, // Skip to: 5874 /* 4543 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4546 */ MCD_OPC_FilterValue, 0, 32, 0, // Skip to: 4582 /* 4550 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4553 */ MCD_OPC_FilterValue, 233, 3, 36, 5, // Skip to: 5874 /* 4558 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4573 /* 4562 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4573 /* 4568 */ MCD_OPC_Decode, 204, 16, 199, 1, // Opcode: VST4LNq32 /* 4573 */ MCD_OPC_CheckPredicate, 16, 17, 5, // Skip to: 5874 /* 4577 */ MCD_OPC_Decode, 207, 16, 199, 1, // Opcode: VST4LNq32_UPD /* 4582 */ MCD_OPC_FilterValue, 2, 8, 5, // Skip to: 5874 /* 4586 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4589 */ MCD_OPC_FilterValue, 233, 3, 0, 5, // Skip to: 5874 /* 4594 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 4609 /* 4598 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 4609 /* 4604 */ MCD_OPC_Decode, 174, 9, 200, 1, // Opcode: VLD4LNq32 /* 4609 */ MCD_OPC_CheckPredicate, 16, 237, 4, // Skip to: 5874 /* 4613 */ MCD_OPC_Decode, 177, 9, 200, 1, // Opcode: VLD4LNq32_UPD /* 4618 */ MCD_OPC_FilterValue, 12, 89, 1, // Skip to: 4967 /* 4622 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 4625 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 4682 /* 4629 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4632 */ MCD_OPC_FilterValue, 2, 214, 4, // Skip to: 5874 /* 4636 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4639 */ MCD_OPC_FilterValue, 233, 3, 206, 4, // Skip to: 5874 /* 4644 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4647 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4660 /* 4651 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4673 /* 4655 */ MCD_OPC_Decode, 206, 6, 202, 1, // Opcode: VLD1DUPd8wb_fixed /* 4660 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4673 /* 4664 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4673 /* 4668 */ MCD_OPC_Decode, 205, 6, 202, 1, // Opcode: VLD1DUPd8 /* 4673 */ MCD_OPC_CheckPredicate, 16, 173, 4, // Skip to: 5874 /* 4677 */ MCD_OPC_Decode, 207, 6, 202, 1, // Opcode: VLD1DUPd8wb_register /* 4682 */ MCD_OPC_FilterValue, 1, 53, 0, // Skip to: 4739 /* 4686 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4689 */ MCD_OPC_FilterValue, 2, 157, 4, // Skip to: 5874 /* 4693 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4696 */ MCD_OPC_FilterValue, 233, 3, 149, 4, // Skip to: 5874 /* 4701 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4704 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4717 /* 4708 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4730 /* 4712 */ MCD_OPC_Decode, 215, 6, 202, 1, // Opcode: VLD1DUPq8wb_fixed /* 4717 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4730 /* 4721 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4730 /* 4725 */ MCD_OPC_Decode, 214, 6, 202, 1, // Opcode: VLD1DUPq8 /* 4730 */ MCD_OPC_CheckPredicate, 16, 116, 4, // Skip to: 5874 /* 4734 */ MCD_OPC_Decode, 216, 6, 202, 1, // Opcode: VLD1DUPq8wb_register /* 4739 */ MCD_OPC_FilterValue, 2, 53, 0, // Skip to: 4796 /* 4743 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4746 */ MCD_OPC_FilterValue, 2, 100, 4, // Skip to: 5874 /* 4750 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4753 */ MCD_OPC_FilterValue, 233, 3, 92, 4, // Skip to: 5874 /* 4758 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4761 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4774 /* 4765 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4787 /* 4769 */ MCD_OPC_Decode, 200, 6, 202, 1, // Opcode: VLD1DUPd16wb_fixed /* 4774 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4787 /* 4778 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4787 /* 4782 */ MCD_OPC_Decode, 199, 6, 202, 1, // Opcode: VLD1DUPd16 /* 4787 */ MCD_OPC_CheckPredicate, 16, 59, 4, // Skip to: 5874 /* 4791 */ MCD_OPC_Decode, 201, 6, 202, 1, // Opcode: VLD1DUPd16wb_register /* 4796 */ MCD_OPC_FilterValue, 3, 53, 0, // Skip to: 4853 /* 4800 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4803 */ MCD_OPC_FilterValue, 2, 43, 4, // Skip to: 5874 /* 4807 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4810 */ MCD_OPC_FilterValue, 233, 3, 35, 4, // Skip to: 5874 /* 4815 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4818 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4831 /* 4822 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4844 /* 4826 */ MCD_OPC_Decode, 209, 6, 202, 1, // Opcode: VLD1DUPq16wb_fixed /* 4831 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4844 /* 4835 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4844 /* 4839 */ MCD_OPC_Decode, 208, 6, 202, 1, // Opcode: VLD1DUPq16 /* 4844 */ MCD_OPC_CheckPredicate, 16, 2, 4, // Skip to: 5874 /* 4848 */ MCD_OPC_Decode, 210, 6, 202, 1, // Opcode: VLD1DUPq16wb_register /* 4853 */ MCD_OPC_FilterValue, 4, 53, 0, // Skip to: 4910 /* 4857 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4860 */ MCD_OPC_FilterValue, 2, 242, 3, // Skip to: 5874 /* 4864 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4867 */ MCD_OPC_FilterValue, 233, 3, 234, 3, // Skip to: 5874 /* 4872 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4875 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4888 /* 4879 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4901 /* 4883 */ MCD_OPC_Decode, 203, 6, 202, 1, // Opcode: VLD1DUPd32wb_fixed /* 4888 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4901 /* 4892 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4901 /* 4896 */ MCD_OPC_Decode, 202, 6, 202, 1, // Opcode: VLD1DUPd32 /* 4901 */ MCD_OPC_CheckPredicate, 16, 201, 3, // Skip to: 5874 /* 4905 */ MCD_OPC_Decode, 204, 6, 202, 1, // Opcode: VLD1DUPd32wb_register /* 4910 */ MCD_OPC_FilterValue, 5, 192, 3, // Skip to: 5874 /* 4914 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4917 */ MCD_OPC_FilterValue, 2, 185, 3, // Skip to: 5874 /* 4921 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4924 */ MCD_OPC_FilterValue, 233, 3, 177, 3, // Skip to: 5874 /* 4929 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4932 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 4945 /* 4936 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 4958 /* 4940 */ MCD_OPC_Decode, 212, 6, 202, 1, // Opcode: VLD1DUPq32wb_fixed /* 4945 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 4958 /* 4949 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 4958 /* 4953 */ MCD_OPC_Decode, 211, 6, 202, 1, // Opcode: VLD1DUPq32 /* 4958 */ MCD_OPC_CheckPredicate, 16, 144, 3, // Skip to: 5874 /* 4962 */ MCD_OPC_Decode, 213, 6, 202, 1, // Opcode: VLD1DUPq32wb_register /* 4967 */ MCD_OPC_FilterValue, 13, 89, 1, // Skip to: 5316 /* 4971 */ MCD_OPC_ExtractField, 5, 3, // Inst{7-5} ... /* 4974 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 5031 /* 4978 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 4981 */ MCD_OPC_FilterValue, 2, 121, 3, // Skip to: 5874 /* 4985 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 4988 */ MCD_OPC_FilterValue, 233, 3, 113, 3, // Skip to: 5874 /* 4993 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 4996 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5009 /* 5000 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 5022 /* 5004 */ MCD_OPC_Decode, 177, 7, 203, 1, // Opcode: VLD2DUPd8wb_fixed /* 5009 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5022 /* 5013 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5022 /* 5017 */ MCD_OPC_Decode, 176, 7, 203, 1, // Opcode: VLD2DUPd8 /* 5022 */ MCD_OPC_CheckPredicate, 16, 80, 3, // Skip to: 5874 /* 5026 */ MCD_OPC_Decode, 178, 7, 203, 1, // Opcode: VLD2DUPd8wb_register /* 5031 */ MCD_OPC_FilterValue, 1, 53, 0, // Skip to: 5088 /* 5035 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5038 */ MCD_OPC_FilterValue, 2, 64, 3, // Skip to: 5874 /* 5042 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5045 */ MCD_OPC_FilterValue, 233, 3, 56, 3, // Skip to: 5874 /* 5050 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 5053 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5066 /* 5057 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 5079 /* 5061 */ MCD_OPC_Decode, 180, 7, 203, 1, // Opcode: VLD2DUPd8x2wb_fixed /* 5066 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5079 /* 5070 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5079 /* 5074 */ MCD_OPC_Decode, 179, 7, 203, 1, // Opcode: VLD2DUPd8x2 /* 5079 */ MCD_OPC_CheckPredicate, 16, 23, 3, // Skip to: 5874 /* 5083 */ MCD_OPC_Decode, 181, 7, 203, 1, // Opcode: VLD2DUPd8x2wb_register /* 5088 */ MCD_OPC_FilterValue, 2, 53, 0, // Skip to: 5145 /* 5092 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5095 */ MCD_OPC_FilterValue, 2, 7, 3, // Skip to: 5874 /* 5099 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5102 */ MCD_OPC_FilterValue, 233, 3, 255, 2, // Skip to: 5874 /* 5107 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 5110 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5123 /* 5114 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 5136 /* 5118 */ MCD_OPC_Decode, 165, 7, 203, 1, // Opcode: VLD2DUPd16wb_fixed /* 5123 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5136 /* 5127 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5136 /* 5131 */ MCD_OPC_Decode, 164, 7, 203, 1, // Opcode: VLD2DUPd16 /* 5136 */ MCD_OPC_CheckPredicate, 16, 222, 2, // Skip to: 5874 /* 5140 */ MCD_OPC_Decode, 166, 7, 203, 1, // Opcode: VLD2DUPd16wb_register /* 5145 */ MCD_OPC_FilterValue, 3, 53, 0, // Skip to: 5202 /* 5149 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5152 */ MCD_OPC_FilterValue, 2, 206, 2, // Skip to: 5874 /* 5156 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5159 */ MCD_OPC_FilterValue, 233, 3, 198, 2, // Skip to: 5874 /* 5164 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 5167 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5180 /* 5171 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 5193 /* 5175 */ MCD_OPC_Decode, 168, 7, 203, 1, // Opcode: VLD2DUPd16x2wb_fixed /* 5180 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5193 /* 5184 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5193 /* 5188 */ MCD_OPC_Decode, 167, 7, 203, 1, // Opcode: VLD2DUPd16x2 /* 5193 */ MCD_OPC_CheckPredicate, 16, 165, 2, // Skip to: 5874 /* 5197 */ MCD_OPC_Decode, 169, 7, 203, 1, // Opcode: VLD2DUPd16x2wb_register /* 5202 */ MCD_OPC_FilterValue, 4, 53, 0, // Skip to: 5259 /* 5206 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5209 */ MCD_OPC_FilterValue, 2, 149, 2, // Skip to: 5874 /* 5213 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5216 */ MCD_OPC_FilterValue, 233, 3, 141, 2, // Skip to: 5874 /* 5221 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 5224 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5237 /* 5228 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 5250 /* 5232 */ MCD_OPC_Decode, 171, 7, 203, 1, // Opcode: VLD2DUPd32wb_fixed /* 5237 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5250 /* 5241 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5250 /* 5245 */ MCD_OPC_Decode, 170, 7, 203, 1, // Opcode: VLD2DUPd32 /* 5250 */ MCD_OPC_CheckPredicate, 16, 108, 2, // Skip to: 5874 /* 5254 */ MCD_OPC_Decode, 172, 7, 203, 1, // Opcode: VLD2DUPd32wb_register /* 5259 */ MCD_OPC_FilterValue, 5, 99, 2, // Skip to: 5874 /* 5263 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5266 */ MCD_OPC_FilterValue, 2, 92, 2, // Skip to: 5874 /* 5270 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5273 */ MCD_OPC_FilterValue, 233, 3, 84, 2, // Skip to: 5874 /* 5278 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 5281 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5294 /* 5285 */ MCD_OPC_CheckPredicate, 16, 18, 0, // Skip to: 5307 /* 5289 */ MCD_OPC_Decode, 174, 7, 203, 1, // Opcode: VLD2DUPd32x2wb_fixed /* 5294 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5307 /* 5298 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5307 /* 5302 */ MCD_OPC_Decode, 173, 7, 203, 1, // Opcode: VLD2DUPd32x2 /* 5307 */ MCD_OPC_CheckPredicate, 16, 51, 2, // Skip to: 5874 /* 5311 */ MCD_OPC_Decode, 175, 7, 203, 1, // Opcode: VLD2DUPd32x2wb_register /* 5316 */ MCD_OPC_FilterValue, 14, 5, 1, // Skip to: 5581 /* 5320 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 5323 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 5366 /* 5327 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5330 */ MCD_OPC_FilterValue, 2, 28, 2, // Skip to: 5874 /* 5334 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5337 */ MCD_OPC_FilterValue, 233, 3, 20, 2, // Skip to: 5874 /* 5342 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5357 /* 5346 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5357 /* 5352 */ MCD_OPC_Decode, 133, 8, 204, 1, // Opcode: VLD3DUPd8 /* 5357 */ MCD_OPC_CheckPredicate, 16, 1, 2, // Skip to: 5874 /* 5361 */ MCD_OPC_Decode, 136, 8, 204, 1, // Opcode: VLD3DUPd8_UPD /* 5366 */ MCD_OPC_FilterValue, 2, 39, 0, // Skip to: 5409 /* 5370 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5373 */ MCD_OPC_FilterValue, 2, 241, 1, // Skip to: 5874 /* 5377 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5380 */ MCD_OPC_FilterValue, 233, 3, 233, 1, // Skip to: 5874 /* 5385 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5400 /* 5389 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5400 /* 5395 */ MCD_OPC_Decode, 150, 8, 204, 1, // Opcode: VLD3DUPq8 /* 5400 */ MCD_OPC_CheckPredicate, 16, 214, 1, // Skip to: 5874 /* 5404 */ MCD_OPC_Decode, 151, 8, 204, 1, // Opcode: VLD3DUPq8_UPD /* 5409 */ MCD_OPC_FilterValue, 4, 39, 0, // Skip to: 5452 /* 5413 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5416 */ MCD_OPC_FilterValue, 2, 198, 1, // Skip to: 5874 /* 5420 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5423 */ MCD_OPC_FilterValue, 233, 3, 190, 1, // Skip to: 5874 /* 5428 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5443 /* 5432 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5443 /* 5438 */ MCD_OPC_Decode, 253, 7, 204, 1, // Opcode: VLD3DUPd16 /* 5443 */ MCD_OPC_CheckPredicate, 16, 171, 1, // Skip to: 5874 /* 5447 */ MCD_OPC_Decode, 128, 8, 204, 1, // Opcode: VLD3DUPd16_UPD /* 5452 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 5495 /* 5456 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5459 */ MCD_OPC_FilterValue, 2, 155, 1, // Skip to: 5874 /* 5463 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5466 */ MCD_OPC_FilterValue, 233, 3, 147, 1, // Skip to: 5874 /* 5471 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5486 /* 5475 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5486 /* 5481 */ MCD_OPC_Decode, 146, 8, 204, 1, // Opcode: VLD3DUPq16 /* 5486 */ MCD_OPC_CheckPredicate, 16, 128, 1, // Skip to: 5874 /* 5490 */ MCD_OPC_Decode, 147, 8, 204, 1, // Opcode: VLD3DUPq16_UPD /* 5495 */ MCD_OPC_FilterValue, 8, 39, 0, // Skip to: 5538 /* 5499 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5502 */ MCD_OPC_FilterValue, 2, 112, 1, // Skip to: 5874 /* 5506 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5509 */ MCD_OPC_FilterValue, 233, 3, 104, 1, // Skip to: 5874 /* 5514 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5529 /* 5518 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5529 /* 5524 */ MCD_OPC_Decode, 129, 8, 204, 1, // Opcode: VLD3DUPd32 /* 5529 */ MCD_OPC_CheckPredicate, 16, 85, 1, // Skip to: 5874 /* 5533 */ MCD_OPC_Decode, 132, 8, 204, 1, // Opcode: VLD3DUPd32_UPD /* 5538 */ MCD_OPC_FilterValue, 10, 76, 1, // Skip to: 5874 /* 5542 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5545 */ MCD_OPC_FilterValue, 2, 69, 1, // Skip to: 5874 /* 5549 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5552 */ MCD_OPC_FilterValue, 233, 3, 61, 1, // Skip to: 5874 /* 5557 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5572 /* 5561 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5572 /* 5567 */ MCD_OPC_Decode, 148, 8, 204, 1, // Opcode: VLD3DUPq32 /* 5572 */ MCD_OPC_CheckPredicate, 16, 42, 1, // Skip to: 5874 /* 5576 */ MCD_OPC_Decode, 149, 8, 204, 1, // Opcode: VLD3DUPq32_UPD /* 5581 */ MCD_OPC_FilterValue, 15, 33, 1, // Skip to: 5874 /* 5585 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 5588 */ MCD_OPC_FilterValue, 0, 139, 0, // Skip to: 5731 /* 5592 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5595 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 5688 /* 5599 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 5602 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 5645 /* 5606 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5609 */ MCD_OPC_FilterValue, 2, 5, 1, // Skip to: 5874 /* 5613 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5616 */ MCD_OPC_FilterValue, 233, 3, 253, 0, // Skip to: 5874 /* 5621 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5636 /* 5625 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5636 /* 5631 */ MCD_OPC_Decode, 249, 8, 205, 1, // Opcode: VLD4DUPd8 /* 5636 */ MCD_OPC_CheckPredicate, 16, 234, 0, // Skip to: 5874 /* 5640 */ MCD_OPC_Decode, 252, 8, 205, 1, // Opcode: VLD4DUPd8_UPD /* 5645 */ MCD_OPC_FilterValue, 1, 225, 0, // Skip to: 5874 /* 5649 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5652 */ MCD_OPC_FilterValue, 2, 218, 0, // Skip to: 5874 /* 5656 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5659 */ MCD_OPC_FilterValue, 233, 3, 210, 0, // Skip to: 5874 /* 5664 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5679 /* 5668 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5679 /* 5674 */ MCD_OPC_Decode, 241, 8, 205, 1, // Opcode: VLD4DUPd16 /* 5679 */ MCD_OPC_CheckPredicate, 16, 191, 0, // Skip to: 5874 /* 5683 */ MCD_OPC_Decode, 244, 8, 205, 1, // Opcode: VLD4DUPd16_UPD /* 5688 */ MCD_OPC_FilterValue, 1, 182, 0, // Skip to: 5874 /* 5692 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5695 */ MCD_OPC_FilterValue, 2, 175, 0, // Skip to: 5874 /* 5699 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5702 */ MCD_OPC_FilterValue, 233, 3, 167, 0, // Skip to: 5874 /* 5707 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5722 /* 5711 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5722 /* 5717 */ MCD_OPC_Decode, 245, 8, 205, 1, // Opcode: VLD4DUPd32 /* 5722 */ MCD_OPC_CheckPredicate, 16, 148, 0, // Skip to: 5874 /* 5726 */ MCD_OPC_Decode, 248, 8, 205, 1, // Opcode: VLD4DUPd32_UPD /* 5731 */ MCD_OPC_FilterValue, 1, 139, 0, // Skip to: 5874 /* 5735 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 5738 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 5831 /* 5742 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 5745 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 5788 /* 5749 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5752 */ MCD_OPC_FilterValue, 2, 118, 0, // Skip to: 5874 /* 5756 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5759 */ MCD_OPC_FilterValue, 233, 3, 110, 0, // Skip to: 5874 /* 5764 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5779 /* 5768 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5779 /* 5774 */ MCD_OPC_Decode, 138, 9, 205, 1, // Opcode: VLD4DUPq8 /* 5779 */ MCD_OPC_CheckPredicate, 16, 91, 0, // Skip to: 5874 /* 5783 */ MCD_OPC_Decode, 139, 9, 205, 1, // Opcode: VLD4DUPq8_UPD /* 5788 */ MCD_OPC_FilterValue, 1, 82, 0, // Skip to: 5874 /* 5792 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5795 */ MCD_OPC_FilterValue, 2, 75, 0, // Skip to: 5874 /* 5799 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5802 */ MCD_OPC_FilterValue, 233, 3, 67, 0, // Skip to: 5874 /* 5807 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5822 /* 5811 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5822 /* 5817 */ MCD_OPC_Decode, 134, 9, 205, 1, // Opcode: VLD4DUPq16 /* 5822 */ MCD_OPC_CheckPredicate, 16, 48, 0, // Skip to: 5874 /* 5826 */ MCD_OPC_Decode, 135, 9, 205, 1, // Opcode: VLD4DUPq16_UPD /* 5831 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 5874 /* 5835 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 5838 */ MCD_OPC_FilterValue, 2, 32, 0, // Skip to: 5874 /* 5842 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 5845 */ MCD_OPC_FilterValue, 233, 3, 24, 0, // Skip to: 5874 /* 5850 */ MCD_OPC_CheckPredicate, 16, 11, 0, // Skip to: 5865 /* 5854 */ MCD_OPC_CheckField, 0, 4, 15, 5, 0, // Skip to: 5865 /* 5860 */ MCD_OPC_Decode, 136, 9, 205, 1, // Opcode: VLD4DUPq32 /* 5865 */ MCD_OPC_CheckPredicate, 16, 5, 0, // Skip to: 5874 /* 5869 */ MCD_OPC_Decode, 137, 9, 205, 1, // Opcode: VLD4DUPq32_UPD /* 5874 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableThumb16[] = { /* 0 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 3 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 22 /* 7 */ MCD_OPC_CheckPredicate, 21, 210, 3, // Skip to: 989 /* 11 */ MCD_OPC_CheckField, 6, 6, 0, 204, 3, // Skip to: 989 /* 17 */ MCD_OPC_Decode, 199, 21, 206, 1, // Opcode: tMOVSr /* 22 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 41 /* 26 */ MCD_OPC_CheckPredicate, 21, 191, 3, // Skip to: 989 /* 30 */ MCD_OPC_CheckField, 11, 1, 1, 185, 3, // Skip to: 989 /* 36 */ MCD_OPC_Decode, 169, 21, 207, 1, // Opcode: tCMPi8 /* 41 */ MCD_OPC_FilterValue, 4, 186, 0, // Skip to: 231 /* 45 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 48 */ MCD_OPC_FilterValue, 0, 166, 0, // Skip to: 218 /* 52 */ MCD_OPC_ExtractField, 8, 3, // Inst{10-8} ... /* 55 */ MCD_OPC_FilterValue, 2, 42, 0, // Skip to: 101 /* 59 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 62 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 75 /* 66 */ MCD_OPC_CheckPredicate, 21, 151, 3, // Skip to: 989 /* 70 */ MCD_OPC_Decode, 236, 21, 206, 1, // Opcode: tTST /* 75 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 88 /* 79 */ MCD_OPC_CheckPredicate, 21, 138, 3, // Skip to: 989 /* 83 */ MCD_OPC_Decode, 170, 21, 206, 1, // Opcode: tCMPr /* 88 */ MCD_OPC_FilterValue, 3, 129, 3, // Skip to: 989 /* 92 */ MCD_OPC_CheckPredicate, 21, 125, 3, // Skip to: 989 /* 96 */ MCD_OPC_Decode, 167, 21, 206, 1, // Opcode: tCMNz /* 101 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 150 /* 105 */ MCD_OPC_CheckPredicate, 21, 11, 0, // Skip to: 120 /* 109 */ MCD_OPC_CheckField, 3, 4, 13, 5, 0, // Skip to: 120 /* 115 */ MCD_OPC_Decode, 140, 21, 208, 1, // Opcode: tADDrSP /* 120 */ MCD_OPC_CheckPredicate, 21, 17, 0, // Skip to: 141 /* 124 */ MCD_OPC_CheckField, 7, 1, 1, 11, 0, // Skip to: 141 /* 130 */ MCD_OPC_CheckField, 0, 3, 5, 5, 0, // Skip to: 141 /* 136 */ MCD_OPC_Decode, 144, 21, 208, 1, // Opcode: tADDspr /* 141 */ MCD_OPC_CheckPredicate, 21, 76, 3, // Skip to: 989 /* 145 */ MCD_OPC_Decode, 137, 21, 209, 1, // Opcode: tADDhirr /* 150 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 163 /* 154 */ MCD_OPC_CheckPredicate, 21, 63, 3, // Skip to: 989 /* 158 */ MCD_OPC_Decode, 168, 21, 210, 1, // Opcode: tCMPhir /* 163 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 176 /* 167 */ MCD_OPC_CheckPredicate, 21, 50, 3, // Skip to: 989 /* 171 */ MCD_OPC_Decode, 201, 21, 210, 1, // Opcode: tMOVr /* 176 */ MCD_OPC_FilterValue, 7, 41, 3, // Skip to: 989 /* 180 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 183 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 199 /* 187 */ MCD_OPC_CheckPredicate, 21, 30, 3, // Skip to: 989 /* 191 */ MCD_OPC_SoftFail, 7, 0, /* 194 */ MCD_OPC_Decode, 159, 21, 211, 1, // Opcode: tBX /* 199 */ MCD_OPC_FilterValue, 1, 18, 3, // Skip to: 989 /* 203 */ MCD_OPC_CheckPredicate, 22, 14, 3, // Skip to: 989 /* 207 */ MCD_OPC_CheckField, 0, 3, 0, 8, 3, // Skip to: 989 /* 213 */ MCD_OPC_Decode, 156, 21, 211, 1, // Opcode: tBLXr /* 218 */ MCD_OPC_FilterValue, 1, 255, 2, // Skip to: 989 /* 222 */ MCD_OPC_CheckPredicate, 21, 251, 2, // Skip to: 989 /* 226 */ MCD_OPC_Decode, 188, 21, 212, 1, // Opcode: tLDRpci /* 231 */ MCD_OPC_FilterValue, 5, 107, 0, // Skip to: 342 /* 235 */ MCD_OPC_ExtractField, 9, 3, // Inst{11-9} ... /* 238 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 251 /* 242 */ MCD_OPC_CheckPredicate, 21, 231, 2, // Skip to: 989 /* 246 */ MCD_OPC_Decode, 222, 21, 213, 1, // Opcode: tSTRr /* 251 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 264 /* 255 */ MCD_OPC_CheckPredicate, 21, 218, 2, // Skip to: 989 /* 259 */ MCD_OPC_Decode, 220, 21, 213, 1, // Opcode: tSTRHr /* 264 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 277 /* 268 */ MCD_OPC_CheckPredicate, 21, 205, 2, // Skip to: 989 /* 272 */ MCD_OPC_Decode, 218, 21, 213, 1, // Opcode: tSTRBr /* 277 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 290 /* 281 */ MCD_OPC_CheckPredicate, 21, 192, 2, // Skip to: 989 /* 285 */ MCD_OPC_Decode, 185, 21, 213, 1, // Opcode: tLDRSB /* 290 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 303 /* 294 */ MCD_OPC_CheckPredicate, 21, 179, 2, // Skip to: 989 /* 298 */ MCD_OPC_Decode, 190, 21, 213, 1, // Opcode: tLDRr /* 303 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 316 /* 307 */ MCD_OPC_CheckPredicate, 21, 166, 2, // Skip to: 989 /* 311 */ MCD_OPC_Decode, 182, 21, 213, 1, // Opcode: tLDRHr /* 316 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 329 /* 320 */ MCD_OPC_CheckPredicate, 21, 153, 2, // Skip to: 989 /* 324 */ MCD_OPC_Decode, 180, 21, 213, 1, // Opcode: tLDRBr /* 329 */ MCD_OPC_FilterValue, 7, 144, 2, // Skip to: 989 /* 333 */ MCD_OPC_CheckPredicate, 21, 140, 2, // Skip to: 989 /* 337 */ MCD_OPC_Decode, 186, 21, 213, 1, // Opcode: tLDRSH /* 342 */ MCD_OPC_FilterValue, 6, 29, 0, // Skip to: 375 /* 346 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 349 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 362 /* 353 */ MCD_OPC_CheckPredicate, 21, 120, 2, // Skip to: 989 /* 357 */ MCD_OPC_Decode, 221, 21, 214, 1, // Opcode: tSTRi /* 362 */ MCD_OPC_FilterValue, 1, 111, 2, // Skip to: 989 /* 366 */ MCD_OPC_CheckPredicate, 21, 107, 2, // Skip to: 989 /* 370 */ MCD_OPC_Decode, 187, 21, 214, 1, // Opcode: tLDRi /* 375 */ MCD_OPC_FilterValue, 7, 29, 0, // Skip to: 408 /* 379 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 382 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 395 /* 386 */ MCD_OPC_CheckPredicate, 21, 87, 2, // Skip to: 989 /* 390 */ MCD_OPC_Decode, 217, 21, 214, 1, // Opcode: tSTRBi /* 395 */ MCD_OPC_FilterValue, 1, 78, 2, // Skip to: 989 /* 399 */ MCD_OPC_CheckPredicate, 21, 74, 2, // Skip to: 989 /* 403 */ MCD_OPC_Decode, 179, 21, 214, 1, // Opcode: tLDRBi /* 408 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 441 /* 412 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 415 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 428 /* 419 */ MCD_OPC_CheckPredicate, 21, 54, 2, // Skip to: 989 /* 423 */ MCD_OPC_Decode, 219, 21, 214, 1, // Opcode: tSTRHi /* 428 */ MCD_OPC_FilterValue, 1, 45, 2, // Skip to: 989 /* 432 */ MCD_OPC_CheckPredicate, 21, 41, 2, // Skip to: 989 /* 436 */ MCD_OPC_Decode, 181, 21, 214, 1, // Opcode: tLDRHi /* 441 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 474 /* 445 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 448 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 461 /* 452 */ MCD_OPC_CheckPredicate, 21, 21, 2, // Skip to: 989 /* 456 */ MCD_OPC_Decode, 223, 21, 215, 1, // Opcode: tSTRspi /* 461 */ MCD_OPC_FilterValue, 1, 12, 2, // Skip to: 989 /* 465 */ MCD_OPC_CheckPredicate, 21, 8, 2, // Skip to: 989 /* 469 */ MCD_OPC_Decode, 191, 21, 215, 1, // Opcode: tLDRspi /* 474 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 507 /* 478 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 481 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 494 /* 485 */ MCD_OPC_CheckPredicate, 21, 244, 1, // Skip to: 989 /* 489 */ MCD_OPC_Decode, 147, 21, 216, 1, // Opcode: tADR /* 494 */ MCD_OPC_FilterValue, 1, 235, 1, // Skip to: 989 /* 498 */ MCD_OPC_CheckPredicate, 21, 231, 1, // Skip to: 989 /* 502 */ MCD_OPC_Decode, 141, 21, 216, 1, // Opcode: tADDrSPi /* 507 */ MCD_OPC_FilterValue, 11, 113, 1, // Skip to: 880 /* 511 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 514 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 647 /* 518 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 521 */ MCD_OPC_FilterValue, 0, 109, 0, // Skip to: 634 /* 525 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 528 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 581 /* 532 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 535 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 548 /* 539 */ MCD_OPC_CheckPredicate, 21, 190, 1, // Skip to: 989 /* 543 */ MCD_OPC_Decode, 143, 21, 217, 1, // Opcode: tADDspi /* 548 */ MCD_OPC_FilterValue, 1, 181, 1, // Skip to: 989 /* 552 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 555 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 568 /* 559 */ MCD_OPC_CheckPredicate, 23, 170, 1, // Skip to: 989 /* 563 */ MCD_OPC_Decode, 230, 21, 206, 1, // Opcode: tSXTH /* 568 */ MCD_OPC_FilterValue, 1, 161, 1, // Skip to: 989 /* 572 */ MCD_OPC_CheckPredicate, 23, 157, 1, // Skip to: 989 /* 576 */ MCD_OPC_Decode, 229, 21, 206, 1, // Opcode: tSXTB /* 581 */ MCD_OPC_FilterValue, 1, 148, 1, // Skip to: 989 /* 585 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 588 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 601 /* 592 */ MCD_OPC_CheckPredicate, 21, 137, 1, // Skip to: 989 /* 596 */ MCD_OPC_Decode, 227, 21, 217, 1, // Opcode: tSUBspi /* 601 */ MCD_OPC_FilterValue, 1, 128, 1, // Skip to: 989 /* 605 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 608 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 621 /* 612 */ MCD_OPC_CheckPredicate, 23, 117, 1, // Skip to: 989 /* 616 */ MCD_OPC_Decode, 239, 21, 206, 1, // Opcode: tUXTH /* 621 */ MCD_OPC_FilterValue, 1, 108, 1, // Skip to: 989 /* 625 */ MCD_OPC_CheckPredicate, 23, 104, 1, // Skip to: 989 /* 629 */ MCD_OPC_Decode, 238, 21, 206, 1, // Opcode: tUXTB /* 634 */ MCD_OPC_FilterValue, 1, 95, 1, // Skip to: 989 /* 638 */ MCD_OPC_CheckPredicate, 24, 91, 1, // Skip to: 989 /* 642 */ MCD_OPC_Decode, 166, 21, 218, 1, // Opcode: tCBZ /* 647 */ MCD_OPC_FilterValue, 1, 67, 0, // Skip to: 718 /* 651 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 654 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 667 /* 658 */ MCD_OPC_CheckPredicate, 21, 71, 1, // Skip to: 989 /* 662 */ MCD_OPC_Decode, 208, 21, 219, 1, // Opcode: tPUSH /* 667 */ MCD_OPC_FilterValue, 1, 62, 1, // Skip to: 989 /* 671 */ MCD_OPC_ExtractField, 5, 4, // Inst{8-5} ... /* 674 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 699 /* 678 */ MCD_OPC_CheckPredicate, 25, 51, 1, // Skip to: 989 /* 682 */ MCD_OPC_CheckField, 4, 1, 1, 45, 1, // Skip to: 989 /* 688 */ MCD_OPC_CheckField, 0, 3, 0, 39, 1, // Skip to: 989 /* 694 */ MCD_OPC_Decode, 215, 21, 220, 1, // Opcode: tSETEND /* 699 */ MCD_OPC_FilterValue, 3, 30, 1, // Skip to: 989 /* 703 */ MCD_OPC_CheckPredicate, 21, 26, 1, // Skip to: 989 /* 707 */ MCD_OPC_CheckField, 3, 1, 0, 20, 1, // Skip to: 989 /* 713 */ MCD_OPC_Decode, 171, 21, 221, 1, // Opcode: tCPS /* 718 */ MCD_OPC_FilterValue, 2, 99, 0, // Skip to: 821 /* 722 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 725 */ MCD_OPC_FilterValue, 0, 79, 0, // Skip to: 808 /* 729 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 732 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 751 /* 736 */ MCD_OPC_CheckPredicate, 23, 249, 0, // Skip to: 989 /* 740 */ MCD_OPC_CheckField, 9, 1, 1, 243, 0, // Skip to: 989 /* 746 */ MCD_OPC_Decode, 209, 21, 206, 1, // Opcode: tREV /* 751 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 770 /* 755 */ MCD_OPC_CheckPredicate, 23, 230, 0, // Skip to: 989 /* 759 */ MCD_OPC_CheckField, 9, 1, 1, 224, 0, // Skip to: 989 /* 765 */ MCD_OPC_Decode, 210, 21, 206, 1, // Opcode: tREV16 /* 770 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 789 /* 774 */ MCD_OPC_CheckPredicate, 26, 211, 0, // Skip to: 989 /* 778 */ MCD_OPC_CheckField, 9, 1, 1, 205, 0, // Skip to: 989 /* 784 */ MCD_OPC_Decode, 174, 21, 222, 1, // Opcode: tHLT /* 789 */ MCD_OPC_FilterValue, 3, 196, 0, // Skip to: 989 /* 793 */ MCD_OPC_CheckPredicate, 23, 192, 0, // Skip to: 989 /* 797 */ MCD_OPC_CheckField, 9, 1, 1, 186, 0, // Skip to: 989 /* 803 */ MCD_OPC_Decode, 211, 21, 206, 1, // Opcode: tREVSH /* 808 */ MCD_OPC_FilterValue, 1, 177, 0, // Skip to: 989 /* 812 */ MCD_OPC_CheckPredicate, 24, 173, 0, // Skip to: 989 /* 816 */ MCD_OPC_Decode, 165, 21, 218, 1, // Opcode: tCBNZ /* 821 */ MCD_OPC_FilterValue, 3, 164, 0, // Skip to: 989 /* 825 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 828 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 841 /* 832 */ MCD_OPC_CheckPredicate, 21, 153, 0, // Skip to: 989 /* 836 */ MCD_OPC_Decode, 206, 21, 223, 1, // Opcode: tPOP /* 841 */ MCD_OPC_FilterValue, 1, 144, 0, // Skip to: 989 /* 845 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 848 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 861 /* 852 */ MCD_OPC_CheckPredicate, 21, 133, 0, // Skip to: 989 /* 856 */ MCD_OPC_Decode, 153, 21, 224, 1, // Opcode: tBKPT /* 861 */ MCD_OPC_FilterValue, 1, 124, 0, // Skip to: 989 /* 865 */ MCD_OPC_CheckPredicate, 27, 120, 0, // Skip to: 989 /* 869 */ MCD_OPC_CheckField, 0, 4, 0, 114, 0, // Skip to: 989 /* 875 */ MCD_OPC_Decode, 173, 21, 225, 1, // Opcode: tHINT /* 880 */ MCD_OPC_FilterValue, 12, 29, 0, // Skip to: 913 /* 884 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 887 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 900 /* 891 */ MCD_OPC_CheckPredicate, 21, 94, 0, // Skip to: 989 /* 895 */ MCD_OPC_Decode, 216, 21, 226, 1, // Opcode: tSTMIA_UPD /* 900 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 989 /* 904 */ MCD_OPC_CheckPredicate, 21, 81, 0, // Skip to: 989 /* 908 */ MCD_OPC_Decode, 177, 21, 227, 1, // Opcode: tLDMIA /* 913 */ MCD_OPC_FilterValue, 13, 53, 0, // Skip to: 970 /* 917 */ MCD_OPC_CheckPredicate, 21, 11, 0, // Skip to: 932 /* 921 */ MCD_OPC_CheckField, 0, 12, 254, 29, 4, 0, // Skip to: 932 /* 928 */ MCD_OPC_Decode, 235, 21, 60, // Opcode: tTRAP /* 932 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 935 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 948 /* 939 */ MCD_OPC_CheckPredicate, 21, 18, 0, // Skip to: 961 /* 943 */ MCD_OPC_Decode, 237, 21, 224, 1, // Opcode: tUDF /* 948 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 961 /* 952 */ MCD_OPC_CheckPredicate, 21, 5, 0, // Skip to: 961 /* 956 */ MCD_OPC_Decode, 228, 21, 224, 1, // Opcode: tSVC /* 961 */ MCD_OPC_CheckPredicate, 21, 24, 0, // Skip to: 989 /* 965 */ MCD_OPC_Decode, 163, 21, 228, 1, // Opcode: tBcc /* 970 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 989 /* 974 */ MCD_OPC_CheckPredicate, 21, 11, 0, // Skip to: 989 /* 978 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 989 /* 984 */ MCD_OPC_Decode, 151, 21, 229, 1, // Opcode: tB /* 989 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableThumb32[] = { /* 0 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 3 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 34 /* 7 */ MCD_OPC_CheckPredicate, 28, 48, 0, // Skip to: 59 /* 11 */ MCD_OPC_CheckField, 27, 5, 30, 42, 0, // Skip to: 59 /* 17 */ MCD_OPC_CheckField, 14, 2, 3, 36, 0, // Skip to: 59 /* 23 */ MCD_OPC_CheckField, 0, 1, 0, 30, 0, // Skip to: 59 /* 29 */ MCD_OPC_Decode, 155, 21, 230, 1, // Opcode: tBLXi /* 34 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 59 /* 38 */ MCD_OPC_CheckPredicate, 21, 17, 0, // Skip to: 59 /* 42 */ MCD_OPC_CheckField, 27, 5, 30, 11, 0, // Skip to: 59 /* 48 */ MCD_OPC_CheckField, 14, 2, 3, 5, 0, // Skip to: 59 /* 54 */ MCD_OPC_Decode, 154, 21, 231, 1, // Opcode: tBL /* 59 */ MCD_OPC_Fail, 0 }; static uint8_t DecoderTableThumb216[] = { /* 0 */ MCD_OPC_CheckPredicate, 24, 12, 0, // Skip to: 16 /* 4 */ MCD_OPC_CheckField, 8, 8, 191, 1, 5, 0, // Skip to: 16 /* 11 */ MCD_OPC_Decode, 171, 18, 232, 1, // Opcode: t2IT /* 16 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableThumb232[] = { /* 0 */ MCD_OPC_ExtractField, 27, 5, // Inst{31-27} ... /* 3 */ MCD_OPC_FilterValue, 29, 25, 8, // Skip to: 2080 /* 7 */ MCD_OPC_ExtractField, 24, 3, // Inst{26-24} ... /* 10 */ MCD_OPC_FilterValue, 0, 1, 3, // Skip to: 783 /* 14 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 17 */ MCD_OPC_FilterValue, 0, 59, 0, // Skip to: 80 /* 21 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 24 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 49 /* 28 */ MCD_OPC_CheckPredicate, 24, 150, 27, // Skip to: 7094 /* 32 */ MCD_OPC_CheckField, 23, 1, 1, 144, 27, // Skip to: 7094 /* 38 */ MCD_OPC_CheckField, 13, 1, 0, 138, 27, // Skip to: 7094 /* 44 */ MCD_OPC_Decode, 175, 20, 233, 1, // Opcode: t2STMIA /* 49 */ MCD_OPC_FilterValue, 1, 129, 27, // Skip to: 7094 /* 53 */ MCD_OPC_CheckPredicate, 29, 125, 27, // Skip to: 7094 /* 57 */ MCD_OPC_CheckField, 23, 1, 0, 119, 27, // Skip to: 7094 /* 63 */ MCD_OPC_CheckField, 16, 4, 13, 113, 27, // Skip to: 7094 /* 69 */ MCD_OPC_CheckField, 5, 10, 128, 4, 106, 27, // Skip to: 7094 /* 76 */ MCD_OPC_Decode, 141, 20, 83, // Opcode: t2SRSDB /* 80 */ MCD_OPC_FilterValue, 1, 36, 0, // Skip to: 120 /* 84 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 87 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 107 /* 91 */ MCD_OPC_CheckPredicate, 29, 87, 27, // Skip to: 7094 /* 95 */ MCD_OPC_CheckField, 0, 16, 128, 128, 3, 79, 27, // Skip to: 7094 /* 103 */ MCD_OPC_Decode, 205, 19, 81, // Opcode: t2RFEDB /* 107 */ MCD_OPC_FilterValue, 1, 71, 27, // Skip to: 7094 /* 111 */ MCD_OPC_CheckPredicate, 24, 67, 27, // Skip to: 7094 /* 115 */ MCD_OPC_Decode, 199, 18, 234, 1, // Opcode: t2LDMIA /* 120 */ MCD_OPC_FilterValue, 2, 59, 0, // Skip to: 183 /* 124 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 127 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 152 /* 131 */ MCD_OPC_CheckPredicate, 24, 47, 27, // Skip to: 7094 /* 135 */ MCD_OPC_CheckField, 23, 1, 1, 41, 27, // Skip to: 7094 /* 141 */ MCD_OPC_CheckField, 13, 1, 0, 35, 27, // Skip to: 7094 /* 147 */ MCD_OPC_Decode, 176, 20, 235, 1, // Opcode: t2STMIA_UPD /* 152 */ MCD_OPC_FilterValue, 1, 26, 27, // Skip to: 7094 /* 156 */ MCD_OPC_CheckPredicate, 29, 22, 27, // Skip to: 7094 /* 160 */ MCD_OPC_CheckField, 23, 1, 0, 16, 27, // Skip to: 7094 /* 166 */ MCD_OPC_CheckField, 16, 4, 13, 10, 27, // Skip to: 7094 /* 172 */ MCD_OPC_CheckField, 5, 10, 128, 4, 3, 27, // Skip to: 7094 /* 179 */ MCD_OPC_Decode, 142, 20, 83, // Opcode: t2SRSDB_UPD /* 183 */ MCD_OPC_FilterValue, 3, 36, 0, // Skip to: 223 /* 187 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 190 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 210 /* 194 */ MCD_OPC_CheckPredicate, 29, 240, 26, // Skip to: 7094 /* 198 */ MCD_OPC_CheckField, 0, 16, 128, 128, 3, 232, 26, // Skip to: 7094 /* 206 */ MCD_OPC_Decode, 206, 19, 81, // Opcode: t2RFEDBW /* 210 */ MCD_OPC_FilterValue, 1, 224, 26, // Skip to: 7094 /* 214 */ MCD_OPC_CheckPredicate, 24, 220, 26, // Skip to: 7094 /* 218 */ MCD_OPC_Decode, 201, 18, 236, 1, // Opcode: t2LDMIA_UPD /* 223 */ MCD_OPC_FilterValue, 4, 219, 0, // Skip to: 446 /* 227 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 230 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 243 /* 234 */ MCD_OPC_CheckPredicate, 24, 200, 26, // Skip to: 7094 /* 238 */ MCD_OPC_Decode, 187, 20, 237, 1, // Opcode: t2STREX /* 243 */ MCD_OPC_FilterValue, 1, 191, 26, // Skip to: 7094 /* 247 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 250 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 269 /* 254 */ MCD_OPC_CheckPredicate, 24, 180, 26, // Skip to: 7094 /* 258 */ MCD_OPC_CheckField, 8, 4, 15, 174, 26, // Skip to: 7094 /* 264 */ MCD_OPC_Decode, 188, 20, 238, 1, // Opcode: t2STREXB /* 269 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 288 /* 273 */ MCD_OPC_CheckPredicate, 24, 161, 26, // Skip to: 7094 /* 277 */ MCD_OPC_CheckField, 8, 4, 15, 155, 26, // Skip to: 7094 /* 283 */ MCD_OPC_Decode, 190, 20, 238, 1, // Opcode: t2STREXH /* 288 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 301 /* 292 */ MCD_OPC_CheckPredicate, 29, 142, 26, // Skip to: 7094 /* 296 */ MCD_OPC_Decode, 189, 20, 239, 1, // Opcode: t2STREXD /* 301 */ MCD_OPC_FilterValue, 8, 21, 0, // Skip to: 326 /* 305 */ MCD_OPC_CheckPredicate, 26, 129, 26, // Skip to: 7094 /* 309 */ MCD_OPC_CheckField, 8, 4, 15, 123, 26, // Skip to: 7094 /* 315 */ MCD_OPC_CheckField, 0, 4, 15, 117, 26, // Skip to: 7094 /* 321 */ MCD_OPC_Decode, 167, 20, 240, 1, // Opcode: t2STLB /* 326 */ MCD_OPC_FilterValue, 9, 21, 0, // Skip to: 351 /* 330 */ MCD_OPC_CheckPredicate, 26, 104, 26, // Skip to: 7094 /* 334 */ MCD_OPC_CheckField, 8, 4, 15, 98, 26, // Skip to: 7094 /* 340 */ MCD_OPC_CheckField, 0, 4, 15, 92, 26, // Skip to: 7094 /* 346 */ MCD_OPC_Decode, 172, 20, 240, 1, // Opcode: t2STLH /* 351 */ MCD_OPC_FilterValue, 10, 21, 0, // Skip to: 376 /* 355 */ MCD_OPC_CheckPredicate, 26, 79, 26, // Skip to: 7094 /* 359 */ MCD_OPC_CheckField, 8, 4, 15, 73, 26, // Skip to: 7094 /* 365 */ MCD_OPC_CheckField, 0, 4, 15, 67, 26, // Skip to: 7094 /* 371 */ MCD_OPC_Decode, 166, 20, 240, 1, // Opcode: t2STL /* 376 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 395 /* 380 */ MCD_OPC_CheckPredicate, 26, 54, 26, // Skip to: 7094 /* 384 */ MCD_OPC_CheckField, 8, 4, 15, 48, 26, // Skip to: 7094 /* 390 */ MCD_OPC_Decode, 169, 20, 238, 1, // Opcode: t2STLEXB /* 395 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 414 /* 399 */ MCD_OPC_CheckPredicate, 26, 35, 26, // Skip to: 7094 /* 403 */ MCD_OPC_CheckField, 8, 4, 15, 29, 26, // Skip to: 7094 /* 409 */ MCD_OPC_Decode, 171, 20, 238, 1, // Opcode: t2STLEXH /* 414 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 433 /* 418 */ MCD_OPC_CheckPredicate, 26, 16, 26, // Skip to: 7094 /* 422 */ MCD_OPC_CheckField, 8, 4, 15, 10, 26, // Skip to: 7094 /* 428 */ MCD_OPC_Decode, 168, 20, 238, 1, // Opcode: t2STLEX /* 433 */ MCD_OPC_FilterValue, 15, 1, 26, // Skip to: 7094 /* 437 */ MCD_OPC_CheckPredicate, 26, 253, 25, // Skip to: 7094 /* 441 */ MCD_OPC_Decode, 170, 20, 239, 1, // Opcode: t2STLEXD /* 446 */ MCD_OPC_FilterValue, 5, 51, 1, // Skip to: 757 /* 450 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 453 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 472 /* 457 */ MCD_OPC_CheckPredicate, 24, 233, 25, // Skip to: 7094 /* 461 */ MCD_OPC_CheckField, 8, 4, 15, 227, 25, // Skip to: 7094 /* 467 */ MCD_OPC_Decode, 213, 18, 241, 1, // Opcode: t2LDREX /* 472 */ MCD_OPC_FilterValue, 1, 218, 25, // Skip to: 7094 /* 476 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 479 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 499 /* 483 */ MCD_OPC_CheckPredicate, 24, 207, 25, // Skip to: 7094 /* 487 */ MCD_OPC_CheckField, 8, 8, 240, 1, 200, 25, // Skip to: 7094 /* 494 */ MCD_OPC_Decode, 219, 20, 242, 1, // Opcode: t2TBB /* 499 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 519 /* 503 */ MCD_OPC_CheckPredicate, 24, 187, 25, // Skip to: 7094 /* 507 */ MCD_OPC_CheckField, 8, 8, 240, 1, 180, 25, // Skip to: 7094 /* 514 */ MCD_OPC_Decode, 221, 20, 242, 1, // Opcode: t2TBH /* 519 */ MCD_OPC_FilterValue, 4, 21, 0, // Skip to: 544 /* 523 */ MCD_OPC_CheckPredicate, 24, 167, 25, // Skip to: 7094 /* 527 */ MCD_OPC_CheckField, 8, 4, 15, 161, 25, // Skip to: 7094 /* 533 */ MCD_OPC_CheckField, 0, 4, 15, 155, 25, // Skip to: 7094 /* 539 */ MCD_OPC_Decode, 214, 18, 240, 1, // Opcode: t2LDREXB /* 544 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 569 /* 548 */ MCD_OPC_CheckPredicate, 24, 142, 25, // Skip to: 7094 /* 552 */ MCD_OPC_CheckField, 8, 4, 15, 136, 25, // Skip to: 7094 /* 558 */ MCD_OPC_CheckField, 0, 4, 15, 130, 25, // Skip to: 7094 /* 564 */ MCD_OPC_Decode, 216, 18, 240, 1, // Opcode: t2LDREXH /* 569 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 588 /* 573 */ MCD_OPC_CheckPredicate, 29, 117, 25, // Skip to: 7094 /* 577 */ MCD_OPC_CheckField, 0, 4, 15, 111, 25, // Skip to: 7094 /* 583 */ MCD_OPC_Decode, 215, 18, 243, 1, // Opcode: t2LDREXD /* 588 */ MCD_OPC_FilterValue, 8, 21, 0, // Skip to: 613 /* 592 */ MCD_OPC_CheckPredicate, 26, 98, 25, // Skip to: 7094 /* 596 */ MCD_OPC_CheckField, 8, 4, 15, 92, 25, // Skip to: 7094 /* 602 */ MCD_OPC_CheckField, 0, 4, 15, 86, 25, // Skip to: 7094 /* 608 */ MCD_OPC_Decode, 175, 18, 240, 1, // Opcode: t2LDAB /* 613 */ MCD_OPC_FilterValue, 9, 21, 0, // Skip to: 638 /* 617 */ MCD_OPC_CheckPredicate, 26, 73, 25, // Skip to: 7094 /* 621 */ MCD_OPC_CheckField, 8, 4, 15, 67, 25, // Skip to: 7094 /* 627 */ MCD_OPC_CheckField, 0, 4, 15, 61, 25, // Skip to: 7094 /* 633 */ MCD_OPC_Decode, 180, 18, 240, 1, // Opcode: t2LDAH /* 638 */ MCD_OPC_FilterValue, 10, 21, 0, // Skip to: 663 /* 642 */ MCD_OPC_CheckPredicate, 26, 48, 25, // Skip to: 7094 /* 646 */ MCD_OPC_CheckField, 8, 4, 15, 42, 25, // Skip to: 7094 /* 652 */ MCD_OPC_CheckField, 0, 4, 15, 36, 25, // Skip to: 7094 /* 658 */ MCD_OPC_Decode, 174, 18, 240, 1, // Opcode: t2LDA /* 663 */ MCD_OPC_FilterValue, 12, 21, 0, // Skip to: 688 /* 667 */ MCD_OPC_CheckPredicate, 26, 23, 25, // Skip to: 7094 /* 671 */ MCD_OPC_CheckField, 8, 4, 15, 17, 25, // Skip to: 7094 /* 677 */ MCD_OPC_CheckField, 0, 4, 15, 11, 25, // Skip to: 7094 /* 683 */ MCD_OPC_Decode, 177, 18, 240, 1, // Opcode: t2LDAEXB /* 688 */ MCD_OPC_FilterValue, 13, 21, 0, // Skip to: 713 /* 692 */ MCD_OPC_CheckPredicate, 26, 254, 24, // Skip to: 7094 /* 696 */ MCD_OPC_CheckField, 8, 4, 15, 248, 24, // Skip to: 7094 /* 702 */ MCD_OPC_CheckField, 0, 4, 15, 242, 24, // Skip to: 7094 /* 708 */ MCD_OPC_Decode, 179, 18, 240, 1, // Opcode: t2LDAEXH /* 713 */ MCD_OPC_FilterValue, 14, 21, 0, // Skip to: 738 /* 717 */ MCD_OPC_CheckPredicate, 26, 229, 24, // Skip to: 7094 /* 721 */ MCD_OPC_CheckField, 8, 4, 15, 223, 24, // Skip to: 7094 /* 727 */ MCD_OPC_CheckField, 0, 4, 15, 217, 24, // Skip to: 7094 /* 733 */ MCD_OPC_Decode, 176, 18, 240, 1, // Opcode: t2LDAEX /* 738 */ MCD_OPC_FilterValue, 15, 208, 24, // Skip to: 7094 /* 742 */ MCD_OPC_CheckPredicate, 26, 204, 24, // Skip to: 7094 /* 746 */ MCD_OPC_CheckField, 0, 4, 15, 198, 24, // Skip to: 7094 /* 752 */ MCD_OPC_Decode, 178, 18, 243, 1, // Opcode: t2LDAEXD /* 757 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 770 /* 761 */ MCD_OPC_CheckPredicate, 24, 185, 24, // Skip to: 7094 /* 765 */ MCD_OPC_Decode, 184, 20, 244, 1, // Opcode: t2STRD_POST /* 770 */ MCD_OPC_FilterValue, 7, 176, 24, // Skip to: 7094 /* 774 */ MCD_OPC_CheckPredicate, 24, 172, 24, // Skip to: 7094 /* 778 */ MCD_OPC_Decode, 210, 18, 245, 1, // Opcode: t2LDRD_POST /* 783 */ MCD_OPC_FilterValue, 1, 5, 1, // Skip to: 1048 /* 787 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 790 */ MCD_OPC_FilterValue, 0, 59, 0, // Skip to: 853 /* 794 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 797 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 822 /* 801 */ MCD_OPC_CheckPredicate, 24, 145, 24, // Skip to: 7094 /* 805 */ MCD_OPC_CheckField, 23, 1, 0, 139, 24, // Skip to: 7094 /* 811 */ MCD_OPC_CheckField, 13, 1, 0, 133, 24, // Skip to: 7094 /* 817 */ MCD_OPC_Decode, 173, 20, 233, 1, // Opcode: t2STMDB /* 822 */ MCD_OPC_FilterValue, 1, 124, 24, // Skip to: 7094 /* 826 */ MCD_OPC_CheckPredicate, 29, 120, 24, // Skip to: 7094 /* 830 */ MCD_OPC_CheckField, 23, 1, 1, 114, 24, // Skip to: 7094 /* 836 */ MCD_OPC_CheckField, 16, 4, 13, 108, 24, // Skip to: 7094 /* 842 */ MCD_OPC_CheckField, 5, 10, 128, 4, 101, 24, // Skip to: 7094 /* 849 */ MCD_OPC_Decode, 143, 20, 83, // Opcode: t2SRSIA /* 853 */ MCD_OPC_FilterValue, 1, 36, 0, // Skip to: 893 /* 857 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 860 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 873 /* 864 */ MCD_OPC_CheckPredicate, 24, 82, 24, // Skip to: 7094 /* 868 */ MCD_OPC_Decode, 197, 18, 234, 1, // Opcode: t2LDMDB /* 873 */ MCD_OPC_FilterValue, 1, 73, 24, // Skip to: 7094 /* 877 */ MCD_OPC_CheckPredicate, 29, 69, 24, // Skip to: 7094 /* 881 */ MCD_OPC_CheckField, 0, 16, 128, 128, 3, 61, 24, // Skip to: 7094 /* 889 */ MCD_OPC_Decode, 207, 19, 81, // Opcode: t2RFEIA /* 893 */ MCD_OPC_FilterValue, 2, 59, 0, // Skip to: 956 /* 897 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 900 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 925 /* 904 */ MCD_OPC_CheckPredicate, 24, 42, 24, // Skip to: 7094 /* 908 */ MCD_OPC_CheckField, 23, 1, 0, 36, 24, // Skip to: 7094 /* 914 */ MCD_OPC_CheckField, 13, 1, 0, 30, 24, // Skip to: 7094 /* 920 */ MCD_OPC_Decode, 174, 20, 235, 1, // Opcode: t2STMDB_UPD /* 925 */ MCD_OPC_FilterValue, 1, 21, 24, // Skip to: 7094 /* 929 */ MCD_OPC_CheckPredicate, 29, 17, 24, // Skip to: 7094 /* 933 */ MCD_OPC_CheckField, 23, 1, 1, 11, 24, // Skip to: 7094 /* 939 */ MCD_OPC_CheckField, 16, 4, 13, 5, 24, // Skip to: 7094 /* 945 */ MCD_OPC_CheckField, 5, 10, 128, 4, 254, 23, // Skip to: 7094 /* 952 */ MCD_OPC_Decode, 144, 20, 83, // Opcode: t2SRSIA_UPD /* 956 */ MCD_OPC_FilterValue, 3, 36, 0, // Skip to: 996 /* 960 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 963 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 976 /* 967 */ MCD_OPC_CheckPredicate, 24, 235, 23, // Skip to: 7094 /* 971 */ MCD_OPC_Decode, 198, 18, 236, 1, // Opcode: t2LDMDB_UPD /* 976 */ MCD_OPC_FilterValue, 1, 226, 23, // Skip to: 7094 /* 980 */ MCD_OPC_CheckPredicate, 29, 222, 23, // Skip to: 7094 /* 984 */ MCD_OPC_CheckField, 0, 16, 128, 128, 3, 214, 23, // Skip to: 7094 /* 992 */ MCD_OPC_Decode, 208, 19, 81, // Opcode: t2RFEIAW /* 996 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 1009 /* 1000 */ MCD_OPC_CheckPredicate, 24, 202, 23, // Skip to: 7094 /* 1004 */ MCD_OPC_Decode, 186, 20, 246, 1, // Opcode: t2STRDi8 /* 1009 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 1022 /* 1013 */ MCD_OPC_CheckPredicate, 24, 189, 23, // Skip to: 7094 /* 1017 */ MCD_OPC_Decode, 212, 18, 246, 1, // Opcode: t2LDRDi8 /* 1022 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 1035 /* 1026 */ MCD_OPC_CheckPredicate, 24, 176, 23, // Skip to: 7094 /* 1030 */ MCD_OPC_Decode, 185, 20, 247, 1, // Opcode: t2STRD_PRE /* 1035 */ MCD_OPC_FilterValue, 7, 167, 23, // Skip to: 7094 /* 1039 */ MCD_OPC_CheckPredicate, 24, 163, 23, // Skip to: 7094 /* 1043 */ MCD_OPC_Decode, 211, 18, 248, 1, // Opcode: t2LDRD_PRE /* 1048 */ MCD_OPC_FilterValue, 2, 201, 1, // Skip to: 1509 /* 1052 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 1055 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 1132 /* 1059 */ MCD_OPC_CheckPredicate, 24, 18, 0, // Skip to: 1081 /* 1063 */ MCD_OPC_CheckField, 20, 1, 1, 12, 0, // Skip to: 1081 /* 1069 */ MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, // Skip to: 1081 /* 1076 */ MCD_OPC_Decode, 227, 20, 249, 1, // Opcode: t2TSTrr /* 1081 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1102 /* 1085 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 1102 /* 1091 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 1102 /* 1097 */ MCD_OPC_Decode, 228, 20, 250, 1, // Opcode: t2TSTrs /* 1102 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1123 /* 1106 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1123 /* 1112 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1123 /* 1118 */ MCD_OPC_Decode, 255, 17, 251, 1, // Opcode: t2ANDrr /* 1123 */ MCD_OPC_CheckPredicate, 24, 79, 23, // Skip to: 7094 /* 1127 */ MCD_OPC_Decode, 128, 18, 252, 1, // Opcode: t2ANDrs /* 1132 */ MCD_OPC_FilterValue, 1, 30, 0, // Skip to: 1166 /* 1136 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1157 /* 1140 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1157 /* 1146 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1157 /* 1152 */ MCD_OPC_Decode, 135, 18, 251, 1, // Opcode: t2BICrr /* 1157 */ MCD_OPC_CheckPredicate, 24, 45, 23, // Skip to: 7094 /* 1161 */ MCD_OPC_Decode, 136, 18, 252, 1, // Opcode: t2BICrs /* 1166 */ MCD_OPC_FilterValue, 2, 151, 0, // Skip to: 1321 /* 1170 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 1173 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 1208 /* 1177 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ... /* 1180 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 1233 /* 1184 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 1199 /* 1188 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 1199 /* 1194 */ MCD_OPC_Decode, 151, 19, 253, 1, // Opcode: t2MOVr /* 1199 */ MCD_OPC_CheckPredicate, 24, 30, 0, // Skip to: 1233 /* 1203 */ MCD_OPC_Decode, 176, 19, 251, 1, // Opcode: t2ORRrr /* 1208 */ MCD_OPC_FilterValue, 3, 21, 0, // Skip to: 1233 /* 1212 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1233 /* 1216 */ MCD_OPC_CheckField, 16, 4, 15, 11, 0, // Skip to: 1233 /* 1222 */ MCD_OPC_CheckField, 12, 3, 0, 5, 0, // Skip to: 1233 /* 1228 */ MCD_OPC_Decode, 211, 19, 254, 1, // Opcode: t2RRX /* 1233 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 1236 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 1255 /* 1240 */ MCD_OPC_CheckPredicate, 24, 68, 0, // Skip to: 1312 /* 1244 */ MCD_OPC_CheckField, 16, 4, 15, 62, 0, // Skip to: 1312 /* 1250 */ MCD_OPC_Decode, 252, 18, 255, 1, // Opcode: t2LSLri /* 1255 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 1274 /* 1259 */ MCD_OPC_CheckPredicate, 24, 49, 0, // Skip to: 1312 /* 1263 */ MCD_OPC_CheckField, 16, 4, 15, 43, 0, // Skip to: 1312 /* 1269 */ MCD_OPC_Decode, 254, 18, 255, 1, // Opcode: t2LSRri /* 1274 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 1293 /* 1278 */ MCD_OPC_CheckPredicate, 24, 30, 0, // Skip to: 1312 /* 1282 */ MCD_OPC_CheckField, 16, 4, 15, 24, 0, // Skip to: 1312 /* 1288 */ MCD_OPC_Decode, 129, 18, 255, 1, // Opcode: t2ASRri /* 1293 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 1312 /* 1297 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 1312 /* 1301 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 1312 /* 1307 */ MCD_OPC_Decode, 209, 19, 255, 1, // Opcode: t2RORri /* 1312 */ MCD_OPC_CheckPredicate, 24, 146, 22, // Skip to: 7094 /* 1316 */ MCD_OPC_Decode, 177, 19, 252, 1, // Opcode: t2ORRrs /* 1321 */ MCD_OPC_FilterValue, 3, 62, 0, // Skip to: 1387 /* 1325 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 1328 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 1363 /* 1332 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ... /* 1335 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 1363 /* 1339 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 1354 /* 1343 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 1354 /* 1349 */ MCD_OPC_Decode, 170, 19, 254, 1, // Opcode: t2MVNr /* 1354 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 1363 /* 1358 */ MCD_OPC_Decode, 173, 19, 251, 1, // Opcode: t2ORNrr /* 1363 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 1378 /* 1367 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 1378 /* 1373 */ MCD_OPC_Decode, 171, 19, 128, 2, // Opcode: t2MVNs /* 1378 */ MCD_OPC_CheckPredicate, 24, 80, 22, // Skip to: 7094 /* 1382 */ MCD_OPC_Decode, 174, 19, 252, 1, // Opcode: t2ORNrs /* 1387 */ MCD_OPC_FilterValue, 4, 73, 0, // Skip to: 1464 /* 1391 */ MCD_OPC_CheckPredicate, 24, 18, 0, // Skip to: 1413 /* 1395 */ MCD_OPC_CheckField, 20, 1, 1, 12, 0, // Skip to: 1413 /* 1401 */ MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, // Skip to: 1413 /* 1408 */ MCD_OPC_Decode, 224, 20, 249, 1, // Opcode: t2TEQrr /* 1413 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1434 /* 1417 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 1434 /* 1423 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 1434 /* 1429 */ MCD_OPC_Decode, 225, 20, 250, 1, // Opcode: t2TEQrs /* 1434 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1455 /* 1438 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1455 /* 1444 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1455 /* 1450 */ MCD_OPC_Decode, 166, 18, 251, 1, // Opcode: t2EORrr /* 1455 */ MCD_OPC_CheckPredicate, 24, 3, 22, // Skip to: 7094 /* 1459 */ MCD_OPC_Decode, 167, 18, 252, 1, // Opcode: t2EORrs /* 1464 */ MCD_OPC_FilterValue, 6, 250, 21, // Skip to: 7094 /* 1468 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 1471 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 1490 /* 1475 */ MCD_OPC_CheckPredicate, 30, 239, 21, // Skip to: 7094 /* 1479 */ MCD_OPC_CheckField, 20, 1, 0, 233, 21, // Skip to: 7094 /* 1485 */ MCD_OPC_Decode, 178, 19, 129, 2, // Opcode: t2PKHBT /* 1490 */ MCD_OPC_FilterValue, 2, 224, 21, // Skip to: 7094 /* 1494 */ MCD_OPC_CheckPredicate, 30, 220, 21, // Skip to: 7094 /* 1498 */ MCD_OPC_CheckField, 20, 1, 0, 214, 21, // Skip to: 7094 /* 1504 */ MCD_OPC_Decode, 179, 19, 129, 2, // Opcode: t2PKHTB /* 1509 */ MCD_OPC_FilterValue, 3, 3, 1, // Skip to: 1772 /* 1513 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 1516 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 1593 /* 1520 */ MCD_OPC_CheckPredicate, 24, 18, 0, // Skip to: 1542 /* 1524 */ MCD_OPC_CheckField, 20, 1, 1, 12, 0, // Skip to: 1542 /* 1530 */ MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, // Skip to: 1542 /* 1537 */ MCD_OPC_Decode, 145, 18, 249, 1, // Opcode: t2CMNzrr /* 1542 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1563 /* 1546 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 1563 /* 1552 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 1563 /* 1558 */ MCD_OPC_Decode, 146, 18, 250, 1, // Opcode: t2CMNzrs /* 1563 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1584 /* 1567 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1584 /* 1573 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1584 /* 1579 */ MCD_OPC_Decode, 251, 17, 130, 2, // Opcode: t2ADDrr /* 1584 */ MCD_OPC_CheckPredicate, 24, 130, 21, // Skip to: 7094 /* 1588 */ MCD_OPC_Decode, 252, 17, 131, 2, // Opcode: t2ADDrs /* 1593 */ MCD_OPC_FilterValue, 2, 30, 0, // Skip to: 1627 /* 1597 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1618 /* 1601 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1618 /* 1607 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1618 /* 1613 */ MCD_OPC_Decode, 244, 17, 251, 1, // Opcode: t2ADCrr /* 1618 */ MCD_OPC_CheckPredicate, 24, 96, 21, // Skip to: 7094 /* 1622 */ MCD_OPC_Decode, 245, 17, 252, 1, // Opcode: t2ADCrs /* 1627 */ MCD_OPC_FilterValue, 3, 30, 0, // Skip to: 1661 /* 1631 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1652 /* 1635 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1652 /* 1641 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1652 /* 1647 */ MCD_OPC_Decode, 221, 19, 251, 1, // Opcode: t2SBCrr /* 1652 */ MCD_OPC_CheckPredicate, 24, 62, 21, // Skip to: 7094 /* 1656 */ MCD_OPC_Decode, 222, 19, 252, 1, // Opcode: t2SBCrs /* 1661 */ MCD_OPC_FilterValue, 5, 73, 0, // Skip to: 1738 /* 1665 */ MCD_OPC_CheckPredicate, 24, 18, 0, // Skip to: 1687 /* 1669 */ MCD_OPC_CheckField, 20, 1, 1, 12, 0, // Skip to: 1687 /* 1675 */ MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, // Skip to: 1687 /* 1682 */ MCD_OPC_Decode, 148, 18, 249, 1, // Opcode: t2CMPrr /* 1687 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1708 /* 1691 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 1708 /* 1697 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 1708 /* 1703 */ MCD_OPC_Decode, 149, 18, 250, 1, // Opcode: t2CMPrs /* 1708 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1729 /* 1712 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1729 /* 1718 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1729 /* 1724 */ MCD_OPC_Decode, 211, 20, 130, 2, // Opcode: t2SUBrr /* 1729 */ MCD_OPC_CheckPredicate, 24, 241, 20, // Skip to: 7094 /* 1733 */ MCD_OPC_Decode, 212, 20, 131, 2, // Opcode: t2SUBrs /* 1738 */ MCD_OPC_FilterValue, 6, 232, 20, // Skip to: 7094 /* 1742 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 1763 /* 1746 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 1763 /* 1752 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 1763 /* 1758 */ MCD_OPC_Decode, 215, 19, 251, 1, // Opcode: t2RSBrr /* 1763 */ MCD_OPC_CheckPredicate, 24, 207, 20, // Skip to: 7094 /* 1767 */ MCD_OPC_Decode, 216, 19, 252, 1, // Opcode: t2RSBrs /* 1772 */ MCD_OPC_FilterValue, 4, 151, 0, // Skip to: 1927 /* 1776 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 1779 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1797 /* 1783 */ MCD_OPC_CheckPredicate, 24, 187, 20, // Skip to: 7094 /* 1787 */ MCD_OPC_CheckField, 23, 1, 1, 181, 20, // Skip to: 7094 /* 1793 */ MCD_OPC_Decode, 163, 20, 86, // Opcode: t2STC_OPTION /* 1797 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 1815 /* 1801 */ MCD_OPC_CheckPredicate, 24, 169, 20, // Skip to: 7094 /* 1805 */ MCD_OPC_CheckField, 23, 1, 1, 163, 20, // Skip to: 7094 /* 1811 */ MCD_OPC_Decode, 194, 18, 86, // Opcode: t2LDC_OPTION /* 1815 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1827 /* 1819 */ MCD_OPC_CheckPredicate, 24, 151, 20, // Skip to: 7094 /* 1823 */ MCD_OPC_Decode, 164, 20, 86, // Opcode: t2STC_POST /* 1827 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1839 /* 1831 */ MCD_OPC_CheckPredicate, 24, 139, 20, // Skip to: 7094 /* 1835 */ MCD_OPC_Decode, 195, 18, 86, // Opcode: t2LDC_POST /* 1839 */ MCD_OPC_FilterValue, 4, 28, 0, // Skip to: 1871 /* 1843 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 1846 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1859 /* 1850 */ MCD_OPC_CheckPredicate, 24, 120, 20, // Skip to: 7094 /* 1854 */ MCD_OPC_Decode, 130, 19, 132, 2, // Opcode: t2MCRR /* 1859 */ MCD_OPC_FilterValue, 1, 111, 20, // Skip to: 7094 /* 1863 */ MCD_OPC_CheckPredicate, 24, 107, 20, // Skip to: 7094 /* 1867 */ MCD_OPC_Decode, 159, 20, 86, // Opcode: t2STCL_OPTION /* 1871 */ MCD_OPC_FilterValue, 5, 28, 0, // Skip to: 1903 /* 1875 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 1878 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1891 /* 1882 */ MCD_OPC_CheckPredicate, 24, 88, 20, // Skip to: 7094 /* 1886 */ MCD_OPC_Decode, 158, 19, 132, 2, // Opcode: t2MRRC /* 1891 */ MCD_OPC_FilterValue, 1, 79, 20, // Skip to: 7094 /* 1895 */ MCD_OPC_CheckPredicate, 24, 75, 20, // Skip to: 7094 /* 1899 */ MCD_OPC_Decode, 190, 18, 86, // Opcode: t2LDCL_OPTION /* 1903 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 1915 /* 1907 */ MCD_OPC_CheckPredicate, 24, 63, 20, // Skip to: 7094 /* 1911 */ MCD_OPC_Decode, 160, 20, 86, // Opcode: t2STCL_POST /* 1915 */ MCD_OPC_FilterValue, 7, 55, 20, // Skip to: 7094 /* 1919 */ MCD_OPC_CheckPredicate, 24, 51, 20, // Skip to: 7094 /* 1923 */ MCD_OPC_Decode, 191, 18, 86, // Opcode: t2LDCL_POST /* 1927 */ MCD_OPC_FilterValue, 5, 99, 0, // Skip to: 2030 /* 1931 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 1934 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1946 /* 1938 */ MCD_OPC_CheckPredicate, 24, 32, 20, // Skip to: 7094 /* 1942 */ MCD_OPC_Decode, 162, 20, 86, // Opcode: t2STC_OFFSET /* 1946 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1958 /* 1950 */ MCD_OPC_CheckPredicate, 24, 20, 20, // Skip to: 7094 /* 1954 */ MCD_OPC_Decode, 193, 18, 86, // Opcode: t2LDC_OFFSET /* 1958 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1970 /* 1962 */ MCD_OPC_CheckPredicate, 24, 8, 20, // Skip to: 7094 /* 1966 */ MCD_OPC_Decode, 165, 20, 86, // Opcode: t2STC_PRE /* 1970 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1982 /* 1974 */ MCD_OPC_CheckPredicate, 24, 252, 19, // Skip to: 7094 /* 1978 */ MCD_OPC_Decode, 196, 18, 86, // Opcode: t2LDC_PRE /* 1982 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 1994 /* 1986 */ MCD_OPC_CheckPredicate, 24, 240, 19, // Skip to: 7094 /* 1990 */ MCD_OPC_Decode, 158, 20, 86, // Opcode: t2STCL_OFFSET /* 1994 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 2006 /* 1998 */ MCD_OPC_CheckPredicate, 24, 228, 19, // Skip to: 7094 /* 2002 */ MCD_OPC_Decode, 189, 18, 86, // Opcode: t2LDCL_OFFSET /* 2006 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 2018 /* 2010 */ MCD_OPC_CheckPredicate, 24, 216, 19, // Skip to: 7094 /* 2014 */ MCD_OPC_Decode, 161, 20, 86, // Opcode: t2STCL_PRE /* 2018 */ MCD_OPC_FilterValue, 7, 208, 19, // Skip to: 7094 /* 2022 */ MCD_OPC_CheckPredicate, 24, 204, 19, // Skip to: 7094 /* 2026 */ MCD_OPC_Decode, 192, 18, 86, // Opcode: t2LDCL_PRE /* 2030 */ MCD_OPC_FilterValue, 6, 196, 19, // Skip to: 7094 /* 2034 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 2037 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2049 /* 2041 */ MCD_OPC_CheckPredicate, 31, 185, 19, // Skip to: 7094 /* 2045 */ MCD_OPC_Decode, 140, 18, 89, // Opcode: t2CDP /* 2049 */ MCD_OPC_FilterValue, 1, 177, 19, // Skip to: 7094 /* 2053 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2056 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2068 /* 2060 */ MCD_OPC_CheckPredicate, 24, 166, 19, // Skip to: 7094 /* 2064 */ MCD_OPC_Decode, 128, 19, 91, // Opcode: t2MCR /* 2068 */ MCD_OPC_FilterValue, 1, 158, 19, // Skip to: 7094 /* 2072 */ MCD_OPC_CheckPredicate, 24, 154, 19, // Skip to: 7094 /* 2076 */ MCD_OPC_Decode, 156, 19, 93, // Opcode: t2MRC /* 2080 */ MCD_OPC_FilterValue, 30, 160, 4, // Skip to: 3268 /* 2084 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ... /* 2087 */ MCD_OPC_FilterValue, 0, 69, 2, // Skip to: 2672 /* 2091 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 2094 */ MCD_OPC_FilterValue, 0, 140, 0, // Skip to: 2238 /* 2098 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 2101 */ MCD_OPC_FilterValue, 0, 30, 0, // Skip to: 2135 /* 2105 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 2126 /* 2109 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 2126 /* 2115 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 2126 /* 2121 */ MCD_OPC_Decode, 226, 20, 133, 2, // Opcode: t2TSTri /* 2126 */ MCD_OPC_CheckPredicate, 24, 100, 19, // Skip to: 7094 /* 2130 */ MCD_OPC_Decode, 254, 17, 134, 2, // Opcode: t2ANDri /* 2135 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 2148 /* 2139 */ MCD_OPC_CheckPredicate, 24, 87, 19, // Skip to: 7094 /* 2143 */ MCD_OPC_Decode, 134, 18, 134, 2, // Opcode: t2BICri /* 2148 */ MCD_OPC_FilterValue, 2, 24, 0, // Skip to: 2176 /* 2152 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 2167 /* 2156 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 2167 /* 2162 */ MCD_OPC_Decode, 147, 19, 135, 2, // Opcode: t2MOVi /* 2167 */ MCD_OPC_CheckPredicate, 24, 59, 19, // Skip to: 7094 /* 2171 */ MCD_OPC_Decode, 175, 19, 134, 2, // Opcode: t2ORRri /* 2176 */ MCD_OPC_FilterValue, 3, 24, 0, // Skip to: 2204 /* 2180 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 2195 /* 2184 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 2195 /* 2190 */ MCD_OPC_Decode, 169, 19, 135, 2, // Opcode: t2MVNi /* 2195 */ MCD_OPC_CheckPredicate, 24, 31, 19, // Skip to: 7094 /* 2199 */ MCD_OPC_Decode, 172, 19, 134, 2, // Opcode: t2ORNri /* 2204 */ MCD_OPC_FilterValue, 4, 22, 19, // Skip to: 7094 /* 2208 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 2229 /* 2212 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 2229 /* 2218 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 2229 /* 2224 */ MCD_OPC_Decode, 223, 20, 133, 2, // Opcode: t2TEQri /* 2229 */ MCD_OPC_CheckPredicate, 24, 253, 18, // Skip to: 7094 /* 2233 */ MCD_OPC_Decode, 165, 18, 134, 2, // Opcode: t2EORri /* 2238 */ MCD_OPC_FilterValue, 1, 110, 0, // Skip to: 2352 /* 2242 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 2245 */ MCD_OPC_FilterValue, 0, 30, 0, // Skip to: 2279 /* 2249 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 2270 /* 2253 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 2270 /* 2259 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 2270 /* 2265 */ MCD_OPC_Decode, 144, 18, 133, 2, // Opcode: t2CMNri /* 2270 */ MCD_OPC_CheckPredicate, 24, 212, 18, // Skip to: 7094 /* 2274 */ MCD_OPC_Decode, 249, 17, 136, 2, // Opcode: t2ADDri /* 2279 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 2292 /* 2283 */ MCD_OPC_CheckPredicate, 24, 199, 18, // Skip to: 7094 /* 2287 */ MCD_OPC_Decode, 243, 17, 134, 2, // Opcode: t2ADCri /* 2292 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 2305 /* 2296 */ MCD_OPC_CheckPredicate, 24, 186, 18, // Skip to: 7094 /* 2300 */ MCD_OPC_Decode, 220, 19, 134, 2, // Opcode: t2SBCri /* 2305 */ MCD_OPC_FilterValue, 5, 30, 0, // Skip to: 2339 /* 2309 */ MCD_OPC_CheckPredicate, 24, 17, 0, // Skip to: 2330 /* 2313 */ MCD_OPC_CheckField, 20, 1, 1, 11, 0, // Skip to: 2330 /* 2319 */ MCD_OPC_CheckField, 8, 4, 15, 5, 0, // Skip to: 2330 /* 2325 */ MCD_OPC_Decode, 147, 18, 133, 2, // Opcode: t2CMPri /* 2330 */ MCD_OPC_CheckPredicate, 24, 152, 18, // Skip to: 7094 /* 2334 */ MCD_OPC_Decode, 209, 20, 136, 2, // Opcode: t2SUBri /* 2339 */ MCD_OPC_FilterValue, 6, 143, 18, // Skip to: 7094 /* 2343 */ MCD_OPC_CheckPredicate, 24, 139, 18, // Skip to: 7094 /* 2347 */ MCD_OPC_Decode, 214, 19, 134, 2, // Opcode: t2RSBri /* 2352 */ MCD_OPC_FilterValue, 2, 115, 0, // Skip to: 2471 /* 2356 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 2359 */ MCD_OPC_FilterValue, 0, 63, 0, // Skip to: 2426 /* 2363 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2366 */ MCD_OPC_FilterValue, 0, 116, 18, // Skip to: 7094 /* 2370 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 2373 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 2392 /* 2377 */ MCD_OPC_CheckPredicate, 24, 30, 0, // Skip to: 2411 /* 2381 */ MCD_OPC_CheckField, 23, 1, 0, 24, 0, // Skip to: 2411 /* 2387 */ MCD_OPC_Decode, 250, 17, 137, 2, // Opcode: t2ADDri12 /* 2392 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 2411 /* 2396 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 2411 /* 2400 */ MCD_OPC_CheckField, 23, 1, 1, 5, 0, // Skip to: 2411 /* 2406 */ MCD_OPC_Decode, 210, 20, 137, 2, // Opcode: t2SUBri12 /* 2411 */ MCD_OPC_CheckPredicate, 24, 71, 18, // Skip to: 7094 /* 2415 */ MCD_OPC_CheckField, 16, 4, 15, 65, 18, // Skip to: 7094 /* 2421 */ MCD_OPC_Decode, 253, 17, 138, 2, // Opcode: t2ADR /* 2426 */ MCD_OPC_FilterValue, 1, 56, 18, // Skip to: 7094 /* 2430 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 2433 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 2452 /* 2437 */ MCD_OPC_CheckPredicate, 24, 45, 18, // Skip to: 7094 /* 2441 */ MCD_OPC_CheckField, 20, 2, 0, 39, 18, // Skip to: 7094 /* 2447 */ MCD_OPC_Decode, 148, 19, 139, 2, // Opcode: t2MOVi16 /* 2452 */ MCD_OPC_FilterValue, 1, 30, 18, // Skip to: 7094 /* 2456 */ MCD_OPC_CheckPredicate, 24, 26, 18, // Skip to: 7094 /* 2460 */ MCD_OPC_CheckField, 20, 2, 0, 20, 18, // Skip to: 7094 /* 2466 */ MCD_OPC_Decode, 144, 19, 139, 2, // Opcode: t2MOVTi16 /* 2471 */ MCD_OPC_FilterValue, 3, 11, 18, // Skip to: 7094 /* 2475 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ... /* 2478 */ MCD_OPC_FilterValue, 0, 56, 0, // Skip to: 2538 /* 2482 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 2485 */ MCD_OPC_FilterValue, 0, 253, 17, // Skip to: 7094 /* 2489 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2492 */ MCD_OPC_FilterValue, 0, 246, 17, // Skip to: 7094 /* 2496 */ MCD_OPC_CheckPredicate, 32, 29, 0, // Skip to: 2529 /* 2500 */ MCD_OPC_CheckField, 21, 1, 1, 23, 0, // Skip to: 2529 /* 2506 */ MCD_OPC_CheckField, 12, 3, 0, 17, 0, // Skip to: 2529 /* 2512 */ MCD_OPC_CheckField, 6, 2, 0, 11, 0, // Skip to: 2529 /* 2518 */ MCD_OPC_CheckField, 4, 1, 0, 5, 0, // Skip to: 2529 /* 2524 */ MCD_OPC_Decode, 146, 20, 140, 2, // Opcode: t2SSAT16 /* 2529 */ MCD_OPC_CheckPredicate, 24, 209, 17, // Skip to: 7094 /* 2533 */ MCD_OPC_Decode, 145, 20, 141, 2, // Opcode: t2SSAT /* 2538 */ MCD_OPC_FilterValue, 1, 58, 0, // Skip to: 2600 /* 2542 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 2545 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 2558 /* 2549 */ MCD_OPC_CheckPredicate, 24, 189, 17, // Skip to: 7094 /* 2553 */ MCD_OPC_Decode, 223, 19, 142, 2, // Opcode: t2SBFX /* 2558 */ MCD_OPC_FilterValue, 2, 180, 17, // Skip to: 7094 /* 2562 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 2565 */ MCD_OPC_FilterValue, 0, 173, 17, // Skip to: 7094 /* 2569 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 2572 */ MCD_OPC_FilterValue, 0, 166, 17, // Skip to: 7094 /* 2576 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 2591 /* 2580 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 2591 /* 2586 */ MCD_OPC_Decode, 132, 18, 143, 2, // Opcode: t2BFC /* 2591 */ MCD_OPC_CheckPredicate, 24, 147, 17, // Skip to: 7094 /* 2595 */ MCD_OPC_Decode, 133, 18, 144, 2, // Opcode: t2BFI /* 2600 */ MCD_OPC_FilterValue, 2, 49, 0, // Skip to: 2653 /* 2604 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 2607 */ MCD_OPC_FilterValue, 0, 131, 17, // Skip to: 7094 /* 2611 */ MCD_OPC_CheckPredicate, 32, 29, 0, // Skip to: 2644 /* 2615 */ MCD_OPC_CheckField, 26, 1, 0, 23, 0, // Skip to: 2644 /* 2621 */ MCD_OPC_CheckField, 21, 1, 1, 17, 0, // Skip to: 2644 /* 2627 */ MCD_OPC_CheckField, 12, 3, 0, 11, 0, // Skip to: 2644 /* 2633 */ MCD_OPC_CheckField, 4, 4, 0, 5, 0, // Skip to: 2644 /* 2639 */ MCD_OPC_Decode, 253, 20, 140, 2, // Opcode: t2USAT16 /* 2644 */ MCD_OPC_CheckPredicate, 24, 94, 17, // Skip to: 7094 /* 2648 */ MCD_OPC_Decode, 252, 20, 141, 2, // Opcode: t2USAT /* 2653 */ MCD_OPC_FilterValue, 3, 85, 17, // Skip to: 7094 /* 2657 */ MCD_OPC_CheckPredicate, 24, 81, 17, // Skip to: 7094 /* 2661 */ MCD_OPC_CheckField, 20, 2, 0, 75, 17, // Skip to: 7094 /* 2667 */ MCD_OPC_Decode, 232, 20, 142, 2, // Opcode: t2UBFX /* 2672 */ MCD_OPC_FilterValue, 1, 66, 17, // Skip to: 7094 /* 2676 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 2679 */ MCD_OPC_FilterValue, 0, 54, 2, // Skip to: 3249 /* 2683 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ... /* 2686 */ MCD_OPC_FilterValue, 0, 52, 17, // Skip to: 7094 /* 2690 */ MCD_OPC_ExtractField, 16, 11, // Inst{26-16} ... /* 2693 */ MCD_OPC_FilterValue, 175, 7, 115, 0, // Skip to: 2813 /* 2698 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 2701 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 2765 /* 2705 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 2708 */ MCD_OPC_FilterValue, 0, 75, 1, // Skip to: 3043 /* 2712 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 2715 */ MCD_OPC_FilterValue, 0, 68, 1, // Skip to: 3043 /* 2719 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 2722 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 2750 /* 2726 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 2741 /* 2730 */ MCD_OPC_CheckField, 4, 4, 15, 5, 0, // Skip to: 2741 /* 2736 */ MCD_OPC_Decode, 159, 18, 145, 2, // Opcode: t2DBG /* 2741 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 2750 /* 2745 */ MCD_OPC_Decode, 168, 18, 224, 1, // Opcode: t2HINT /* 2750 */ MCD_OPC_CheckPredicate, 29, 33, 1, // Skip to: 3043 /* 2754 */ MCD_OPC_CheckField, 0, 5, 0, 27, 1, // Skip to: 3043 /* 2760 */ MCD_OPC_Decode, 151, 18, 146, 2, // Opcode: t2CPS2p /* 2765 */ MCD_OPC_FilterValue, 1, 18, 1, // Skip to: 3043 /* 2769 */ MCD_OPC_ExtractField, 11, 1, // Inst{11} ... /* 2772 */ MCD_OPC_FilterValue, 0, 11, 1, // Skip to: 3043 /* 2776 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 2779 */ MCD_OPC_FilterValue, 0, 4, 1, // Skip to: 3043 /* 2783 */ MCD_OPC_CheckPredicate, 29, 17, 0, // Skip to: 2804 /* 2787 */ MCD_OPC_CheckField, 9, 2, 0, 11, 0, // Skip to: 2804 /* 2793 */ MCD_OPC_CheckField, 5, 3, 0, 5, 0, // Skip to: 2804 /* 2799 */ MCD_OPC_Decode, 150, 18, 146, 2, // Opcode: t2CPS1p /* 2804 */ MCD_OPC_CheckPredicate, 29, 235, 0, // Skip to: 3043 /* 2808 */ MCD_OPC_Decode, 152, 18, 146, 2, // Opcode: t2CPS3p /* 2813 */ MCD_OPC_FilterValue, 191, 7, 85, 0, // Skip to: 2903 /* 2818 */ MCD_OPC_ExtractField, 4, 8, // Inst{11-4} ... /* 2821 */ MCD_OPC_FilterValue, 242, 1, 20, 0, // Skip to: 2846 /* 2826 */ MCD_OPC_CheckPredicate, 33, 213, 0, // Skip to: 3043 /* 2830 */ MCD_OPC_CheckField, 13, 1, 0, 207, 0, // Skip to: 3043 /* 2836 */ MCD_OPC_CheckField, 0, 4, 15, 201, 0, // Skip to: 3043 /* 2842 */ MCD_OPC_Decode, 142, 18, 60, // Opcode: t2CLREX /* 2846 */ MCD_OPC_FilterValue, 244, 1, 14, 0, // Skip to: 2865 /* 2851 */ MCD_OPC_CheckPredicate, 34, 188, 0, // Skip to: 3043 /* 2855 */ MCD_OPC_CheckField, 13, 1, 0, 182, 0, // Skip to: 3043 /* 2861 */ MCD_OPC_Decode, 164, 18, 61, // Opcode: t2DSB /* 2865 */ MCD_OPC_FilterValue, 245, 1, 14, 0, // Skip to: 2884 /* 2870 */ MCD_OPC_CheckPredicate, 34, 169, 0, // Skip to: 3043 /* 2874 */ MCD_OPC_CheckField, 13, 1, 0, 163, 0, // Skip to: 3043 /* 2880 */ MCD_OPC_Decode, 163, 18, 61, // Opcode: t2DMB /* 2884 */ MCD_OPC_FilterValue, 246, 1, 154, 0, // Skip to: 3043 /* 2889 */ MCD_OPC_CheckPredicate, 34, 150, 0, // Skip to: 3043 /* 2893 */ MCD_OPC_CheckField, 13, 1, 0, 144, 0, // Skip to: 3043 /* 2899 */ MCD_OPC_Decode, 170, 18, 62, // Opcode: t2ISB /* 2903 */ MCD_OPC_FilterValue, 222, 7, 21, 0, // Skip to: 2929 /* 2908 */ MCD_OPC_CheckPredicate, 29, 131, 0, // Skip to: 3043 /* 2912 */ MCD_OPC_CheckField, 13, 1, 0, 125, 0, // Skip to: 3043 /* 2918 */ MCD_OPC_CheckField, 8, 4, 15, 119, 0, // Skip to: 3043 /* 2924 */ MCD_OPC_Decode, 205, 20, 224, 1, // Opcode: t2SUBS_PC_LR /* 2929 */ MCD_OPC_FilterValue, 239, 7, 21, 0, // Skip to: 2955 /* 2934 */ MCD_OPC_CheckPredicate, 29, 105, 0, // Skip to: 3043 /* 2938 */ MCD_OPC_CheckField, 13, 1, 0, 99, 0, // Skip to: 3043 /* 2944 */ MCD_OPC_CheckField, 0, 8, 0, 93, 0, // Skip to: 3043 /* 2950 */ MCD_OPC_Decode, 160, 19, 147, 2, // Opcode: t2MRS_AR /* 2955 */ MCD_OPC_FilterValue, 255, 7, 21, 0, // Skip to: 2981 /* 2960 */ MCD_OPC_CheckPredicate, 29, 79, 0, // Skip to: 3043 /* 2964 */ MCD_OPC_CheckField, 13, 1, 0, 73, 0, // Skip to: 3043 /* 2970 */ MCD_OPC_CheckField, 0, 8, 0, 67, 0, // Skip to: 3043 /* 2976 */ MCD_OPC_Decode, 163, 19, 147, 2, // Opcode: t2MRSsys_AR /* 2981 */ MCD_OPC_FilterValue, 143, 15, 57, 0, // Skip to: 3043 /* 2986 */ MCD_OPC_ExtractField, 0, 12, // Inst{11-0} ... /* 2989 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 3007 /* 2993 */ MCD_OPC_CheckPredicate, 35, 46, 0, // Skip to: 3043 /* 2997 */ MCD_OPC_CheckField, 13, 1, 0, 40, 0, // Skip to: 3043 /* 3003 */ MCD_OPC_Decode, 160, 18, 60, // Opcode: t2DCPS1 /* 3007 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 3025 /* 3011 */ MCD_OPC_CheckPredicate, 35, 28, 0, // Skip to: 3043 /* 3015 */ MCD_OPC_CheckField, 13, 1, 0, 22, 0, // Skip to: 3043 /* 3021 */ MCD_OPC_Decode, 161, 18, 60, // Opcode: t2DCPS2 /* 3025 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 3043 /* 3029 */ MCD_OPC_CheckPredicate, 35, 10, 0, // Skip to: 3043 /* 3033 */ MCD_OPC_CheckField, 13, 1, 0, 4, 0, // Skip to: 3043 /* 3039 */ MCD_OPC_Decode, 162, 18, 60, // Opcode: t2DCPS3 /* 3043 */ MCD_OPC_ExtractField, 20, 7, // Inst{26-20} ... /* 3046 */ MCD_OPC_FilterValue, 60, 22, 0, // Skip to: 3072 /* 3050 */ MCD_OPC_CheckPredicate, 36, 70, 0, // Skip to: 3124 /* 3054 */ MCD_OPC_CheckField, 13, 1, 0, 64, 0, // Skip to: 3124 /* 3060 */ MCD_OPC_CheckField, 0, 12, 128, 30, 57, 0, // Skip to: 3124 /* 3067 */ MCD_OPC_Decode, 138, 18, 148, 2, // Opcode: t2BXJ /* 3072 */ MCD_OPC_FilterValue, 126, 15, 0, // Skip to: 3091 /* 3076 */ MCD_OPC_CheckPredicate, 37, 44, 0, // Skip to: 3124 /* 3080 */ MCD_OPC_CheckField, 13, 1, 0, 38, 0, // Skip to: 3124 /* 3086 */ MCD_OPC_Decode, 169, 18, 149, 2, // Opcode: t2HVC /* 3091 */ MCD_OPC_FilterValue, 127, 29, 0, // Skip to: 3124 /* 3095 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 3098 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 3111 /* 3102 */ MCD_OPC_CheckPredicate, 38, 18, 0, // Skip to: 3124 /* 3106 */ MCD_OPC_Decode, 232, 19, 150, 2, // Opcode: t2SMC /* 3111 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 3124 /* 3115 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 3124 /* 3119 */ MCD_OPC_Decode, 233, 20, 149, 2, // Opcode: t2UDF /* 3124 */ MCD_OPC_ExtractField, 21, 6, // Inst{26-21} ... /* 3127 */ MCD_OPC_FilterValue, 28, 62, 0, // Skip to: 3193 /* 3131 */ MCD_OPC_CheckPredicate, 29, 17, 0, // Skip to: 3152 /* 3135 */ MCD_OPC_CheckField, 13, 1, 0, 11, 0, // Skip to: 3152 /* 3141 */ MCD_OPC_CheckField, 0, 8, 0, 5, 0, // Skip to: 3152 /* 3147 */ MCD_OPC_Decode, 164, 19, 151, 2, // Opcode: t2MSR_AR /* 3152 */ MCD_OPC_CheckPredicate, 39, 23, 0, // Skip to: 3179 /* 3156 */ MCD_OPC_CheckField, 13, 1, 0, 17, 0, // Skip to: 3179 /* 3162 */ MCD_OPC_CheckField, 5, 3, 1, 11, 0, // Skip to: 3179 /* 3168 */ MCD_OPC_CheckField, 0, 4, 0, 5, 0, // Skip to: 3179 /* 3174 */ MCD_OPC_Decode, 166, 19, 152, 2, // Opcode: t2MSRbanked /* 3179 */ MCD_OPC_CheckPredicate, 40, 57, 0, // Skip to: 3240 /* 3183 */ MCD_OPC_SoftFail, 128, 198, 64 /* 0x102300 */, 0, /* 3188 */ MCD_OPC_Decode, 165, 19, 153, 2, // Opcode: t2MSR_M /* 3193 */ MCD_OPC_FilterValue, 31, 43, 0, // Skip to: 3240 /* 3197 */ MCD_OPC_CheckPredicate, 39, 23, 0, // Skip to: 3224 /* 3201 */ MCD_OPC_CheckField, 13, 1, 0, 17, 0, // Skip to: 3224 /* 3207 */ MCD_OPC_CheckField, 5, 3, 1, 11, 0, // Skip to: 3224 /* 3213 */ MCD_OPC_CheckField, 0, 4, 0, 5, 0, // Skip to: 3224 /* 3219 */ MCD_OPC_Decode, 162, 19, 154, 2, // Opcode: t2MRSbanked /* 3224 */ MCD_OPC_CheckPredicate, 40, 12, 0, // Skip to: 3240 /* 3228 */ MCD_OPC_SoftFail, 128, 192, 64 /* 0x102000 */, 128, 128, 60 /* 0xF0000 */, /* 3235 */ MCD_OPC_Decode, 161, 19, 155, 2, // Opcode: t2MRS_M /* 3240 */ MCD_OPC_CheckPredicate, 24, 10, 15, // Skip to: 7094 /* 3244 */ MCD_OPC_Decode, 139, 18, 156, 2, // Opcode: t2Bcc /* 3249 */ MCD_OPC_FilterValue, 1, 1, 15, // Skip to: 7094 /* 3253 */ MCD_OPC_CheckPredicate, 24, 253, 14, // Skip to: 7094 /* 3257 */ MCD_OPC_CheckField, 14, 1, 0, 247, 14, // Skip to: 7094 /* 3263 */ MCD_OPC_Decode, 131, 18, 157, 2, // Opcode: t2B /* 3268 */ MCD_OPC_FilterValue, 31, 238, 14, // Skip to: 7094 /* 3272 */ MCD_OPC_ExtractField, 24, 3, // Inst{26-24} ... /* 3275 */ MCD_OPC_FilterValue, 0, 76, 3, // Skip to: 4123 /* 3279 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 3282 */ MCD_OPC_FilterValue, 0, 109, 0, // Skip to: 3395 /* 3286 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 3289 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 3382 /* 3293 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 3296 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 3315 /* 3300 */ MCD_OPC_CheckPredicate, 24, 206, 14, // Skip to: 7094 /* 3304 */ MCD_OPC_CheckField, 6, 4, 0, 200, 14, // Skip to: 7094 /* 3310 */ MCD_OPC_Decode, 183, 20, 158, 2, // Opcode: t2STRBs /* 3315 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 3334 /* 3319 */ MCD_OPC_CheckPredicate, 24, 187, 14, // Skip to: 7094 /* 3323 */ MCD_OPC_CheckField, 8, 1, 1, 181, 14, // Skip to: 7094 /* 3329 */ MCD_OPC_Decode, 178, 20, 159, 2, // Opcode: t2STRB_POST /* 3334 */ MCD_OPC_FilterValue, 3, 172, 14, // Skip to: 7094 /* 3338 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 3341 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 3369 /* 3345 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 3360 /* 3349 */ MCD_OPC_CheckField, 9, 1, 1, 5, 0, // Skip to: 3360 /* 3355 */ MCD_OPC_Decode, 177, 20, 160, 2, // Opcode: t2STRBT /* 3360 */ MCD_OPC_CheckPredicate, 24, 146, 14, // Skip to: 7094 /* 3364 */ MCD_OPC_Decode, 182, 20, 161, 2, // Opcode: t2STRBi8 /* 3369 */ MCD_OPC_FilterValue, 1, 137, 14, // Skip to: 7094 /* 3373 */ MCD_OPC_CheckPredicate, 24, 133, 14, // Skip to: 7094 /* 3377 */ MCD_OPC_Decode, 179, 20, 159, 2, // Opcode: t2STRB_PRE /* 3382 */ MCD_OPC_FilterValue, 1, 124, 14, // Skip to: 7094 /* 3386 */ MCD_OPC_CheckPredicate, 24, 120, 14, // Skip to: 7094 /* 3390 */ MCD_OPC_Decode, 181, 20, 162, 2, // Opcode: t2STRBi12 /* 3395 */ MCD_OPC_FilterValue, 1, 191, 0, // Skip to: 3590 /* 3399 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 3402 */ MCD_OPC_FilterValue, 0, 125, 0, // Skip to: 3531 /* 3406 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 3409 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 3444 /* 3413 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 3416 */ MCD_OPC_FilterValue, 0, 139, 0, // Skip to: 3559 /* 3420 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 3435 /* 3424 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 3435 /* 3430 */ MCD_OPC_Decode, 186, 19, 163, 2, // Opcode: t2PLDs /* 3435 */ MCD_OPC_CheckPredicate, 24, 120, 0, // Skip to: 3559 /* 3439 */ MCD_OPC_Decode, 209, 18, 163, 2, // Opcode: t2LDRBs /* 3444 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 3463 /* 3448 */ MCD_OPC_CheckPredicate, 24, 107, 0, // Skip to: 3559 /* 3452 */ MCD_OPC_CheckField, 8, 1, 1, 101, 0, // Skip to: 3559 /* 3458 */ MCD_OPC_Decode, 203, 18, 159, 2, // Opcode: t2LDRB_POST /* 3463 */ MCD_OPC_FilterValue, 3, 92, 0, // Skip to: 3559 /* 3467 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 3470 */ MCD_OPC_FilterValue, 0, 44, 0, // Skip to: 3518 /* 3474 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 3477 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 3496 /* 3481 */ MCD_OPC_CheckPredicate, 24, 24, 0, // Skip to: 3509 /* 3485 */ MCD_OPC_CheckField, 12, 4, 15, 18, 0, // Skip to: 3509 /* 3491 */ MCD_OPC_Decode, 184, 19, 164, 2, // Opcode: t2PLDi8 /* 3496 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 3509 /* 3500 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 3509 /* 3504 */ MCD_OPC_Decode, 202, 18, 165, 2, // Opcode: t2LDRBT /* 3509 */ MCD_OPC_CheckPredicate, 24, 46, 0, // Skip to: 3559 /* 3513 */ MCD_OPC_Decode, 206, 18, 164, 2, // Opcode: t2LDRBi8 /* 3518 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 3559 /* 3522 */ MCD_OPC_CheckPredicate, 24, 33, 0, // Skip to: 3559 /* 3526 */ MCD_OPC_Decode, 204, 18, 159, 2, // Opcode: t2LDRB_PRE /* 3531 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 3559 /* 3535 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 3550 /* 3539 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 3550 /* 3545 */ MCD_OPC_Decode, 183, 19, 166, 2, // Opcode: t2PLDi12 /* 3550 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 3559 /* 3554 */ MCD_OPC_Decode, 205, 18, 166, 2, // Opcode: t2LDRBi12 /* 3559 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 3562 */ MCD_OPC_FilterValue, 15, 200, 13, // Skip to: 7094 /* 3566 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 3581 /* 3570 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 3581 /* 3576 */ MCD_OPC_Decode, 185, 19, 167, 2, // Opcode: t2PLDpci /* 3581 */ MCD_OPC_CheckPredicate, 24, 181, 13, // Skip to: 7094 /* 3585 */ MCD_OPC_Decode, 207, 18, 167, 2, // Opcode: t2LDRBpci /* 3590 */ MCD_OPC_FilterValue, 2, 109, 0, // Skip to: 3703 /* 3594 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 3597 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 3690 /* 3601 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 3604 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 3623 /* 3608 */ MCD_OPC_CheckPredicate, 24, 154, 13, // Skip to: 7094 /* 3612 */ MCD_OPC_CheckField, 6, 4, 0, 148, 13, // Skip to: 7094 /* 3618 */ MCD_OPC_Decode, 197, 20, 158, 2, // Opcode: t2STRHs /* 3623 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 3642 /* 3627 */ MCD_OPC_CheckPredicate, 24, 135, 13, // Skip to: 7094 /* 3631 */ MCD_OPC_CheckField, 8, 1, 1, 129, 13, // Skip to: 7094 /* 3637 */ MCD_OPC_Decode, 192, 20, 159, 2, // Opcode: t2STRH_POST /* 3642 */ MCD_OPC_FilterValue, 3, 120, 13, // Skip to: 7094 /* 3646 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 3649 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 3677 /* 3653 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 3668 /* 3657 */ MCD_OPC_CheckField, 9, 1, 1, 5, 0, // Skip to: 3668 /* 3663 */ MCD_OPC_Decode, 191, 20, 160, 2, // Opcode: t2STRHT /* 3668 */ MCD_OPC_CheckPredicate, 24, 94, 13, // Skip to: 7094 /* 3672 */ MCD_OPC_Decode, 196, 20, 161, 2, // Opcode: t2STRHi8 /* 3677 */ MCD_OPC_FilterValue, 1, 85, 13, // Skip to: 7094 /* 3681 */ MCD_OPC_CheckPredicate, 24, 81, 13, // Skip to: 7094 /* 3685 */ MCD_OPC_Decode, 193, 20, 159, 2, // Opcode: t2STRH_PRE /* 3690 */ MCD_OPC_FilterValue, 1, 72, 13, // Skip to: 7094 /* 3694 */ MCD_OPC_CheckPredicate, 24, 68, 13, // Skip to: 7094 /* 3698 */ MCD_OPC_Decode, 195, 20, 162, 2, // Opcode: t2STRHi12 /* 3703 */ MCD_OPC_FilterValue, 3, 175, 0, // Skip to: 3882 /* 3707 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 3710 */ MCD_OPC_FilterValue, 0, 125, 0, // Skip to: 3839 /* 3714 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 3717 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 3752 /* 3721 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 3724 */ MCD_OPC_FilterValue, 0, 139, 0, // Skip to: 3867 /* 3728 */ MCD_OPC_CheckPredicate, 41, 11, 0, // Skip to: 3743 /* 3732 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 3743 /* 3738 */ MCD_OPC_Decode, 182, 19, 163, 2, // Opcode: t2PLDWs /* 3743 */ MCD_OPC_CheckPredicate, 24, 120, 0, // Skip to: 3867 /* 3747 */ MCD_OPC_Decode, 224, 18, 163, 2, // Opcode: t2LDRHs /* 3752 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 3771 /* 3756 */ MCD_OPC_CheckPredicate, 24, 107, 0, // Skip to: 3867 /* 3760 */ MCD_OPC_CheckField, 8, 1, 1, 101, 0, // Skip to: 3867 /* 3766 */ MCD_OPC_Decode, 218, 18, 159, 2, // Opcode: t2LDRH_POST /* 3771 */ MCD_OPC_FilterValue, 3, 92, 0, // Skip to: 3867 /* 3775 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 3778 */ MCD_OPC_FilterValue, 0, 44, 0, // Skip to: 3826 /* 3782 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 3785 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 3804 /* 3789 */ MCD_OPC_CheckPredicate, 41, 24, 0, // Skip to: 3817 /* 3793 */ MCD_OPC_CheckField, 12, 4, 15, 18, 0, // Skip to: 3817 /* 3799 */ MCD_OPC_Decode, 181, 19, 164, 2, // Opcode: t2PLDWi8 /* 3804 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 3817 /* 3808 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 3817 /* 3812 */ MCD_OPC_Decode, 217, 18, 165, 2, // Opcode: t2LDRHT /* 3817 */ MCD_OPC_CheckPredicate, 24, 46, 0, // Skip to: 3867 /* 3821 */ MCD_OPC_Decode, 221, 18, 164, 2, // Opcode: t2LDRHi8 /* 3826 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 3867 /* 3830 */ MCD_OPC_CheckPredicate, 24, 33, 0, // Skip to: 3867 /* 3834 */ MCD_OPC_Decode, 219, 18, 159, 2, // Opcode: t2LDRH_PRE /* 3839 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 3867 /* 3843 */ MCD_OPC_CheckPredicate, 41, 11, 0, // Skip to: 3858 /* 3847 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 3858 /* 3853 */ MCD_OPC_Decode, 180, 19, 166, 2, // Opcode: t2PLDWi12 /* 3858 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 3867 /* 3862 */ MCD_OPC_Decode, 220, 18, 166, 2, // Opcode: t2LDRHi12 /* 3867 */ MCD_OPC_CheckPredicate, 24, 151, 12, // Skip to: 7094 /* 3871 */ MCD_OPC_CheckField, 16, 4, 15, 145, 12, // Skip to: 7094 /* 3877 */ MCD_OPC_Decode, 222, 18, 167, 2, // Opcode: t2LDRHpci /* 3882 */ MCD_OPC_FilterValue, 4, 109, 0, // Skip to: 3995 /* 3886 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 3889 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 3982 /* 3893 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 3896 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 3915 /* 3900 */ MCD_OPC_CheckPredicate, 24, 118, 12, // Skip to: 7094 /* 3904 */ MCD_OPC_CheckField, 6, 4, 0, 112, 12, // Skip to: 7094 /* 3910 */ MCD_OPC_Decode, 204, 20, 168, 2, // Opcode: t2STRs /* 3915 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 3934 /* 3919 */ MCD_OPC_CheckPredicate, 24, 99, 12, // Skip to: 7094 /* 3923 */ MCD_OPC_CheckField, 8, 1, 1, 93, 12, // Skip to: 7094 /* 3929 */ MCD_OPC_Decode, 199, 20, 159, 2, // Opcode: t2STR_POST /* 3934 */ MCD_OPC_FilterValue, 3, 84, 12, // Skip to: 7094 /* 3938 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 3941 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 3969 /* 3945 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 3960 /* 3949 */ MCD_OPC_CheckField, 9, 1, 1, 5, 0, // Skip to: 3960 /* 3955 */ MCD_OPC_Decode, 198, 20, 160, 2, // Opcode: t2STRT /* 3960 */ MCD_OPC_CheckPredicate, 24, 58, 12, // Skip to: 7094 /* 3964 */ MCD_OPC_Decode, 203, 20, 169, 2, // Opcode: t2STRi8 /* 3969 */ MCD_OPC_FilterValue, 1, 49, 12, // Skip to: 7094 /* 3973 */ MCD_OPC_CheckPredicate, 24, 45, 12, // Skip to: 7094 /* 3977 */ MCD_OPC_Decode, 200, 20, 159, 2, // Opcode: t2STR_PRE /* 3982 */ MCD_OPC_FilterValue, 1, 36, 12, // Skip to: 7094 /* 3986 */ MCD_OPC_CheckPredicate, 24, 32, 12, // Skip to: 7094 /* 3990 */ MCD_OPC_Decode, 202, 20, 170, 2, // Opcode: t2STRi12 /* 3995 */ MCD_OPC_FilterValue, 5, 23, 12, // Skip to: 7094 /* 3999 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 4002 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 4095 /* 4006 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4009 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4028 /* 4013 */ MCD_OPC_CheckPredicate, 24, 91, 0, // Skip to: 4108 /* 4017 */ MCD_OPC_CheckField, 6, 4, 0, 85, 0, // Skip to: 4108 /* 4023 */ MCD_OPC_Decode, 249, 18, 163, 2, // Opcode: t2LDRs /* 4028 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 4047 /* 4032 */ MCD_OPC_CheckPredicate, 24, 72, 0, // Skip to: 4108 /* 4036 */ MCD_OPC_CheckField, 8, 1, 1, 66, 0, // Skip to: 4108 /* 4042 */ MCD_OPC_Decode, 242, 18, 159, 2, // Opcode: t2LDR_POST /* 4047 */ MCD_OPC_FilterValue, 3, 57, 0, // Skip to: 4108 /* 4051 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 4054 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 4082 /* 4058 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 4073 /* 4062 */ MCD_OPC_CheckField, 9, 1, 1, 5, 0, // Skip to: 4073 /* 4068 */ MCD_OPC_Decode, 241, 18, 165, 2, // Opcode: t2LDRT /* 4073 */ MCD_OPC_CheckPredicate, 24, 31, 0, // Skip to: 4108 /* 4077 */ MCD_OPC_Decode, 245, 18, 164, 2, // Opcode: t2LDRi8 /* 4082 */ MCD_OPC_FilterValue, 1, 22, 0, // Skip to: 4108 /* 4086 */ MCD_OPC_CheckPredicate, 24, 18, 0, // Skip to: 4108 /* 4090 */ MCD_OPC_Decode, 243, 18, 159, 2, // Opcode: t2LDR_PRE /* 4095 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 4108 /* 4099 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 4108 /* 4103 */ MCD_OPC_Decode, 244, 18, 166, 2, // Opcode: t2LDRi12 /* 4108 */ MCD_OPC_CheckPredicate, 24, 166, 11, // Skip to: 7094 /* 4112 */ MCD_OPC_CheckField, 16, 4, 15, 160, 11, // Skip to: 7094 /* 4118 */ MCD_OPC_Decode, 246, 18, 167, 2, // Opcode: t2LDRpci /* 4123 */ MCD_OPC_FilterValue, 1, 70, 1, // Skip to: 4453 /* 4127 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 4130 */ MCD_OPC_FilterValue, 1, 191, 0, // Skip to: 4325 /* 4134 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 4137 */ MCD_OPC_FilterValue, 0, 125, 0, // Skip to: 4266 /* 4141 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4144 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 4179 /* 4148 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 4151 */ MCD_OPC_FilterValue, 0, 139, 0, // Skip to: 4294 /* 4155 */ MCD_OPC_CheckPredicate, 33, 11, 0, // Skip to: 4170 /* 4159 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 4170 /* 4165 */ MCD_OPC_Decode, 190, 19, 163, 2, // Opcode: t2PLIs /* 4170 */ MCD_OPC_CheckPredicate, 24, 120, 0, // Skip to: 4294 /* 4174 */ MCD_OPC_Decode, 232, 18, 163, 2, // Opcode: t2LDRSBs /* 4179 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 4198 /* 4183 */ MCD_OPC_CheckPredicate, 24, 107, 0, // Skip to: 4294 /* 4187 */ MCD_OPC_CheckField, 8, 1, 1, 101, 0, // Skip to: 4294 /* 4193 */ MCD_OPC_Decode, 226, 18, 159, 2, // Opcode: t2LDRSB_POST /* 4198 */ MCD_OPC_FilterValue, 3, 92, 0, // Skip to: 4294 /* 4202 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 4205 */ MCD_OPC_FilterValue, 0, 44, 0, // Skip to: 4253 /* 4209 */ MCD_OPC_ExtractField, 9, 1, // Inst{9} ... /* 4212 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4231 /* 4216 */ MCD_OPC_CheckPredicate, 33, 24, 0, // Skip to: 4244 /* 4220 */ MCD_OPC_CheckField, 12, 4, 15, 18, 0, // Skip to: 4244 /* 4226 */ MCD_OPC_Decode, 188, 19, 164, 2, // Opcode: t2PLIi8 /* 4231 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 4244 /* 4235 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 4244 /* 4239 */ MCD_OPC_Decode, 225, 18, 165, 2, // Opcode: t2LDRSBT /* 4244 */ MCD_OPC_CheckPredicate, 24, 46, 0, // Skip to: 4294 /* 4248 */ MCD_OPC_Decode, 229, 18, 164, 2, // Opcode: t2LDRSBi8 /* 4253 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 4294 /* 4257 */ MCD_OPC_CheckPredicate, 24, 33, 0, // Skip to: 4294 /* 4261 */ MCD_OPC_Decode, 227, 18, 159, 2, // Opcode: t2LDRSB_PRE /* 4266 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 4294 /* 4270 */ MCD_OPC_CheckPredicate, 33, 11, 0, // Skip to: 4285 /* 4274 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 4285 /* 4280 */ MCD_OPC_Decode, 187, 19, 166, 2, // Opcode: t2PLIi12 /* 4285 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 4294 /* 4289 */ MCD_OPC_Decode, 228, 18, 166, 2, // Opcode: t2LDRSBi12 /* 4294 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 4297 */ MCD_OPC_FilterValue, 15, 233, 10, // Skip to: 7094 /* 4301 */ MCD_OPC_CheckPredicate, 33, 11, 0, // Skip to: 4316 /* 4305 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 4316 /* 4311 */ MCD_OPC_Decode, 189, 19, 167, 2, // Opcode: t2PLIpci /* 4316 */ MCD_OPC_CheckPredicate, 24, 214, 10, // Skip to: 7094 /* 4320 */ MCD_OPC_Decode, 230, 18, 167, 2, // Opcode: t2LDRSBpci /* 4325 */ MCD_OPC_FilterValue, 3, 205, 10, // Skip to: 7094 /* 4329 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 4332 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 4425 /* 4336 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ... /* 4339 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4358 /* 4343 */ MCD_OPC_CheckPredicate, 24, 91, 0, // Skip to: 4438 /* 4347 */ MCD_OPC_CheckField, 6, 4, 0, 85, 0, // Skip to: 4438 /* 4353 */ MCD_OPC_Decode, 240, 18, 163, 2, // Opcode: t2LDRSHs /* 4358 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 4377 /* 4362 */ MCD_OPC_CheckPredicate, 24, 72, 0, // Skip to: 4438 /* 4366 */ MCD_OPC_CheckField, 8, 1, 1, 66, 0, // Skip to: 4438 /* 4372 */ MCD_OPC_Decode, 234, 18, 159, 2, // Opcode: t2LDRSH_POST /* 4377 */ MCD_OPC_FilterValue, 3, 57, 0, // Skip to: 4438 /* 4381 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 4384 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 4412 /* 4388 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 4403 /* 4392 */ MCD_OPC_CheckField, 9, 1, 1, 5, 0, // Skip to: 4403 /* 4398 */ MCD_OPC_Decode, 233, 18, 165, 2, // Opcode: t2LDRSHT /* 4403 */ MCD_OPC_CheckPredicate, 24, 31, 0, // Skip to: 4438 /* 4407 */ MCD_OPC_Decode, 237, 18, 164, 2, // Opcode: t2LDRSHi8 /* 4412 */ MCD_OPC_FilterValue, 1, 22, 0, // Skip to: 4438 /* 4416 */ MCD_OPC_CheckPredicate, 24, 18, 0, // Skip to: 4438 /* 4420 */ MCD_OPC_Decode, 235, 18, 159, 2, // Opcode: t2LDRSH_PRE /* 4425 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 4438 /* 4429 */ MCD_OPC_CheckPredicate, 24, 5, 0, // Skip to: 4438 /* 4433 */ MCD_OPC_Decode, 236, 18, 166, 2, // Opcode: t2LDRSHi12 /* 4438 */ MCD_OPC_CheckPredicate, 24, 92, 10, // Skip to: 7094 /* 4442 */ MCD_OPC_CheckField, 16, 4, 15, 86, 10, // Skip to: 7094 /* 4448 */ MCD_OPC_Decode, 238, 18, 167, 2, // Opcode: t2LDRSHpci /* 4453 */ MCD_OPC_FilterValue, 2, 47, 6, // Skip to: 6040 /* 4457 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ... /* 4460 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 4569 /* 4464 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4467 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 4492 /* 4471 */ MCD_OPC_CheckPredicate, 24, 59, 10, // Skip to: 7094 /* 4475 */ MCD_OPC_CheckField, 12, 4, 15, 53, 10, // Skip to: 7094 /* 4481 */ MCD_OPC_CheckField, 4, 3, 0, 47, 10, // Skip to: 7094 /* 4487 */ MCD_OPC_Decode, 253, 18, 251, 1, // Opcode: t2LSLrr /* 4492 */ MCD_OPC_FilterValue, 1, 38, 10, // Skip to: 7094 /* 4496 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4499 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 4534 /* 4503 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 4506 */ MCD_OPC_FilterValue, 15, 24, 10, // Skip to: 7094 /* 4510 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 4525 /* 4514 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 4525 /* 4520 */ MCD_OPC_Decode, 218, 20, 171, 2, // Opcode: t2SXTH /* 4525 */ MCD_OPC_CheckPredicate, 30, 5, 10, // Skip to: 7094 /* 4529 */ MCD_OPC_Decode, 215, 20, 172, 2, // Opcode: t2SXTAH /* 4534 */ MCD_OPC_FilterValue, 1, 252, 9, // Skip to: 7094 /* 4538 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 4541 */ MCD_OPC_FilterValue, 15, 245, 9, // Skip to: 7094 /* 4545 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 4560 /* 4549 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 4560 /* 4555 */ MCD_OPC_Decode, 134, 21, 171, 2, // Opcode: t2UXTH /* 4560 */ MCD_OPC_CheckPredicate, 30, 226, 9, // Skip to: 7094 /* 4564 */ MCD_OPC_Decode, 131, 21, 172, 2, // Opcode: t2UXTAH /* 4569 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 4678 /* 4573 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4576 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 4601 /* 4580 */ MCD_OPC_CheckPredicate, 24, 206, 9, // Skip to: 7094 /* 4584 */ MCD_OPC_CheckField, 12, 4, 15, 200, 9, // Skip to: 7094 /* 4590 */ MCD_OPC_CheckField, 4, 3, 0, 194, 9, // Skip to: 7094 /* 4596 */ MCD_OPC_Decode, 255, 18, 251, 1, // Opcode: t2LSRrr /* 4601 */ MCD_OPC_FilterValue, 1, 185, 9, // Skip to: 7094 /* 4605 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4608 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 4643 /* 4612 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 4615 */ MCD_OPC_FilterValue, 15, 171, 9, // Skip to: 7094 /* 4619 */ MCD_OPC_CheckPredicate, 42, 11, 0, // Skip to: 4634 /* 4623 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 4634 /* 4629 */ MCD_OPC_Decode, 217, 20, 171, 2, // Opcode: t2SXTB16 /* 4634 */ MCD_OPC_CheckPredicate, 30, 152, 9, // Skip to: 7094 /* 4638 */ MCD_OPC_Decode, 214, 20, 172, 2, // Opcode: t2SXTAB16 /* 4643 */ MCD_OPC_FilterValue, 1, 143, 9, // Skip to: 7094 /* 4647 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 4650 */ MCD_OPC_FilterValue, 15, 136, 9, // Skip to: 7094 /* 4654 */ MCD_OPC_CheckPredicate, 30, 11, 0, // Skip to: 4669 /* 4658 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 4669 /* 4664 */ MCD_OPC_Decode, 133, 21, 171, 2, // Opcode: t2UXTB16 /* 4669 */ MCD_OPC_CheckPredicate, 30, 117, 9, // Skip to: 7094 /* 4673 */ MCD_OPC_Decode, 130, 21, 172, 2, // Opcode: t2UXTAB16 /* 4678 */ MCD_OPC_FilterValue, 2, 105, 0, // Skip to: 4787 /* 4682 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 4685 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 4710 /* 4689 */ MCD_OPC_CheckPredicate, 24, 97, 9, // Skip to: 7094 /* 4693 */ MCD_OPC_CheckField, 12, 4, 15, 91, 9, // Skip to: 7094 /* 4699 */ MCD_OPC_CheckField, 4, 3, 0, 85, 9, // Skip to: 7094 /* 4705 */ MCD_OPC_Decode, 130, 18, 251, 1, // Opcode: t2ASRrr /* 4710 */ MCD_OPC_FilterValue, 1, 76, 9, // Skip to: 7094 /* 4714 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4717 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 4752 /* 4721 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 4724 */ MCD_OPC_FilterValue, 15, 62, 9, // Skip to: 7094 /* 4728 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 4743 /* 4732 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 4743 /* 4738 */ MCD_OPC_Decode, 216, 20, 171, 2, // Opcode: t2SXTB /* 4743 */ MCD_OPC_CheckPredicate, 30, 43, 9, // Skip to: 7094 /* 4747 */ MCD_OPC_Decode, 213, 20, 172, 2, // Opcode: t2SXTAB /* 4752 */ MCD_OPC_FilterValue, 1, 34, 9, // Skip to: 7094 /* 4756 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 4759 */ MCD_OPC_FilterValue, 15, 27, 9, // Skip to: 7094 /* 4763 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 4778 /* 4767 */ MCD_OPC_CheckField, 16, 4, 15, 5, 0, // Skip to: 4778 /* 4773 */ MCD_OPC_Decode, 132, 21, 171, 2, // Opcode: t2UXTB /* 4778 */ MCD_OPC_CheckPredicate, 30, 8, 9, // Skip to: 7094 /* 4782 */ MCD_OPC_Decode, 129, 21, 172, 2, // Opcode: t2UXTAB /* 4787 */ MCD_OPC_FilterValue, 3, 21, 0, // Skip to: 4812 /* 4791 */ MCD_OPC_CheckPredicate, 24, 251, 8, // Skip to: 7094 /* 4795 */ MCD_OPC_CheckField, 12, 4, 15, 245, 8, // Skip to: 7094 /* 4801 */ MCD_OPC_CheckField, 4, 4, 0, 239, 8, // Skip to: 7094 /* 4807 */ MCD_OPC_Decode, 210, 19, 251, 1, // Opcode: t2RORrr /* 4812 */ MCD_OPC_FilterValue, 4, 197, 1, // Skip to: 5269 /* 4816 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 4819 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 4864 /* 4823 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4826 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4845 /* 4830 */ MCD_OPC_CheckPredicate, 32, 212, 8, // Skip to: 7094 /* 4834 */ MCD_OPC_CheckField, 12, 4, 15, 206, 8, // Skip to: 7094 /* 4840 */ MCD_OPC_Decode, 218, 19, 173, 2, // Opcode: t2SADD8 /* 4845 */ MCD_OPC_FilterValue, 1, 197, 8, // Skip to: 7094 /* 4849 */ MCD_OPC_CheckPredicate, 32, 193, 8, // Skip to: 7094 /* 4853 */ MCD_OPC_CheckField, 12, 4, 15, 187, 8, // Skip to: 7094 /* 4859 */ MCD_OPC_Decode, 217, 19, 173, 2, // Opcode: t2SADD16 /* 4864 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 4909 /* 4868 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4871 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4890 /* 4875 */ MCD_OPC_CheckPredicate, 32, 167, 8, // Skip to: 7094 /* 4879 */ MCD_OPC_CheckField, 12, 4, 15, 161, 8, // Skip to: 7094 /* 4885 */ MCD_OPC_Decode, 193, 19, 173, 2, // Opcode: t2QADD8 /* 4890 */ MCD_OPC_FilterValue, 1, 152, 8, // Skip to: 7094 /* 4894 */ MCD_OPC_CheckPredicate, 32, 148, 8, // Skip to: 7094 /* 4898 */ MCD_OPC_CheckField, 12, 4, 15, 142, 8, // Skip to: 7094 /* 4904 */ MCD_OPC_Decode, 192, 19, 173, 2, // Opcode: t2QADD16 /* 4909 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 4954 /* 4913 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4916 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4935 /* 4920 */ MCD_OPC_CheckPredicate, 32, 122, 8, // Skip to: 7094 /* 4924 */ MCD_OPC_CheckField, 12, 4, 15, 116, 8, // Skip to: 7094 /* 4930 */ MCD_OPC_Decode, 227, 19, 173, 2, // Opcode: t2SHADD8 /* 4935 */ MCD_OPC_FilterValue, 1, 107, 8, // Skip to: 7094 /* 4939 */ MCD_OPC_CheckPredicate, 32, 103, 8, // Skip to: 7094 /* 4943 */ MCD_OPC_CheckField, 12, 4, 15, 97, 8, // Skip to: 7094 /* 4949 */ MCD_OPC_Decode, 226, 19, 173, 2, // Opcode: t2SHADD16 /* 4954 */ MCD_OPC_FilterValue, 4, 41, 0, // Skip to: 4999 /* 4958 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4961 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 4980 /* 4965 */ MCD_OPC_CheckPredicate, 32, 77, 8, // Skip to: 7094 /* 4969 */ MCD_OPC_CheckField, 12, 4, 15, 71, 8, // Skip to: 7094 /* 4975 */ MCD_OPC_Decode, 230, 20, 173, 2, // Opcode: t2UADD8 /* 4980 */ MCD_OPC_FilterValue, 1, 62, 8, // Skip to: 7094 /* 4984 */ MCD_OPC_CheckPredicate, 32, 58, 8, // Skip to: 7094 /* 4988 */ MCD_OPC_CheckField, 12, 4, 15, 52, 8, // Skip to: 7094 /* 4994 */ MCD_OPC_Decode, 229, 20, 173, 2, // Opcode: t2UADD16 /* 4999 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 5044 /* 5003 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5006 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5025 /* 5010 */ MCD_OPC_CheckPredicate, 32, 32, 8, // Skip to: 7094 /* 5014 */ MCD_OPC_CheckField, 12, 4, 15, 26, 8, // Skip to: 7094 /* 5020 */ MCD_OPC_Decode, 245, 20, 173, 2, // Opcode: t2UQADD8 /* 5025 */ MCD_OPC_FilterValue, 1, 17, 8, // Skip to: 7094 /* 5029 */ MCD_OPC_CheckPredicate, 32, 13, 8, // Skip to: 7094 /* 5033 */ MCD_OPC_CheckField, 12, 4, 15, 7, 8, // Skip to: 7094 /* 5039 */ MCD_OPC_Decode, 244, 20, 173, 2, // Opcode: t2UQADD16 /* 5044 */ MCD_OPC_FilterValue, 6, 41, 0, // Skip to: 5089 /* 5048 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5051 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5070 /* 5055 */ MCD_OPC_CheckPredicate, 32, 243, 7, // Skip to: 7094 /* 5059 */ MCD_OPC_CheckField, 12, 4, 15, 237, 7, // Skip to: 7094 /* 5065 */ MCD_OPC_Decode, 236, 20, 173, 2, // Opcode: t2UHADD8 /* 5070 */ MCD_OPC_FilterValue, 1, 228, 7, // Skip to: 7094 /* 5074 */ MCD_OPC_CheckPredicate, 32, 224, 7, // Skip to: 7094 /* 5078 */ MCD_OPC_CheckField, 12, 4, 15, 218, 7, // Skip to: 7094 /* 5084 */ MCD_OPC_Decode, 235, 20, 173, 2, // Opcode: t2UHADD16 /* 5089 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 5134 /* 5093 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5096 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5115 /* 5100 */ MCD_OPC_CheckPredicate, 32, 198, 7, // Skip to: 7094 /* 5104 */ MCD_OPC_CheckField, 12, 4, 15, 192, 7, // Skip to: 7094 /* 5110 */ MCD_OPC_Decode, 191, 19, 174, 2, // Opcode: t2QADD /* 5115 */ MCD_OPC_FilterValue, 1, 183, 7, // Skip to: 7094 /* 5119 */ MCD_OPC_CheckPredicate, 24, 179, 7, // Skip to: 7094 /* 5123 */ MCD_OPC_CheckField, 12, 4, 15, 173, 7, // Skip to: 7094 /* 5129 */ MCD_OPC_Decode, 202, 19, 175, 2, // Opcode: t2REV /* 5134 */ MCD_OPC_FilterValue, 9, 41, 0, // Skip to: 5179 /* 5138 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5141 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5160 /* 5145 */ MCD_OPC_CheckPredicate, 32, 153, 7, // Skip to: 7094 /* 5149 */ MCD_OPC_CheckField, 12, 4, 15, 147, 7, // Skip to: 7094 /* 5155 */ MCD_OPC_Decode, 195, 19, 174, 2, // Opcode: t2QDADD /* 5160 */ MCD_OPC_FilterValue, 1, 138, 7, // Skip to: 7094 /* 5164 */ MCD_OPC_CheckPredicate, 24, 134, 7, // Skip to: 7094 /* 5168 */ MCD_OPC_CheckField, 12, 4, 15, 128, 7, // Skip to: 7094 /* 5174 */ MCD_OPC_Decode, 203, 19, 175, 2, // Opcode: t2REV16 /* 5179 */ MCD_OPC_FilterValue, 10, 41, 0, // Skip to: 5224 /* 5183 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5186 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5205 /* 5190 */ MCD_OPC_CheckPredicate, 32, 108, 7, // Skip to: 7094 /* 5194 */ MCD_OPC_CheckField, 12, 4, 15, 102, 7, // Skip to: 7094 /* 5200 */ MCD_OPC_Decode, 198, 19, 174, 2, // Opcode: t2QSUB /* 5205 */ MCD_OPC_FilterValue, 1, 93, 7, // Skip to: 7094 /* 5209 */ MCD_OPC_CheckPredicate, 24, 89, 7, // Skip to: 7094 /* 5213 */ MCD_OPC_CheckField, 12, 4, 15, 83, 7, // Skip to: 7094 /* 5219 */ MCD_OPC_Decode, 201, 19, 175, 2, // Opcode: t2RBIT /* 5224 */ MCD_OPC_FilterValue, 11, 74, 7, // Skip to: 7094 /* 5228 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5231 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5250 /* 5235 */ MCD_OPC_CheckPredicate, 32, 63, 7, // Skip to: 7094 /* 5239 */ MCD_OPC_CheckField, 12, 4, 15, 57, 7, // Skip to: 7094 /* 5245 */ MCD_OPC_Decode, 196, 19, 174, 2, // Opcode: t2QDSUB /* 5250 */ MCD_OPC_FilterValue, 1, 48, 7, // Skip to: 7094 /* 5254 */ MCD_OPC_CheckPredicate, 24, 44, 7, // Skip to: 7094 /* 5258 */ MCD_OPC_CheckField, 12, 4, 15, 38, 7, // Skip to: 7094 /* 5264 */ MCD_OPC_Decode, 204, 19, 175, 2, // Opcode: t2REVSH /* 5269 */ MCD_OPC_FilterValue, 5, 198, 0, // Skip to: 5471 /* 5273 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 5276 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 5301 /* 5280 */ MCD_OPC_CheckPredicate, 32, 18, 7, // Skip to: 7094 /* 5284 */ MCD_OPC_CheckField, 20, 1, 0, 12, 7, // Skip to: 7094 /* 5290 */ MCD_OPC_CheckField, 12, 4, 15, 6, 7, // Skip to: 7094 /* 5296 */ MCD_OPC_Decode, 219, 19, 173, 2, // Opcode: t2SASX /* 5301 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 5326 /* 5305 */ MCD_OPC_CheckPredicate, 32, 249, 6, // Skip to: 7094 /* 5309 */ MCD_OPC_CheckField, 20, 1, 0, 243, 6, // Skip to: 7094 /* 5315 */ MCD_OPC_CheckField, 12, 4, 15, 237, 6, // Skip to: 7094 /* 5321 */ MCD_OPC_Decode, 194, 19, 173, 2, // Opcode: t2QASX /* 5326 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 5351 /* 5330 */ MCD_OPC_CheckPredicate, 32, 224, 6, // Skip to: 7094 /* 5334 */ MCD_OPC_CheckField, 20, 1, 0, 218, 6, // Skip to: 7094 /* 5340 */ MCD_OPC_CheckField, 12, 4, 15, 212, 6, // Skip to: 7094 /* 5346 */ MCD_OPC_Decode, 228, 19, 173, 2, // Opcode: t2SHASX /* 5351 */ MCD_OPC_FilterValue, 4, 21, 0, // Skip to: 5376 /* 5355 */ MCD_OPC_CheckPredicate, 32, 199, 6, // Skip to: 7094 /* 5359 */ MCD_OPC_CheckField, 20, 1, 0, 193, 6, // Skip to: 7094 /* 5365 */ MCD_OPC_CheckField, 12, 4, 15, 187, 6, // Skip to: 7094 /* 5371 */ MCD_OPC_Decode, 231, 20, 173, 2, // Opcode: t2UASX /* 5376 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 5401 /* 5380 */ MCD_OPC_CheckPredicate, 32, 174, 6, // Skip to: 7094 /* 5384 */ MCD_OPC_CheckField, 20, 1, 0, 168, 6, // Skip to: 7094 /* 5390 */ MCD_OPC_CheckField, 12, 4, 15, 162, 6, // Skip to: 7094 /* 5396 */ MCD_OPC_Decode, 246, 20, 173, 2, // Opcode: t2UQASX /* 5401 */ MCD_OPC_FilterValue, 6, 21, 0, // Skip to: 5426 /* 5405 */ MCD_OPC_CheckPredicate, 32, 149, 6, // Skip to: 7094 /* 5409 */ MCD_OPC_CheckField, 20, 1, 0, 143, 6, // Skip to: 7094 /* 5415 */ MCD_OPC_CheckField, 12, 4, 15, 137, 6, // Skip to: 7094 /* 5421 */ MCD_OPC_Decode, 237, 20, 173, 2, // Opcode: t2UHASX /* 5426 */ MCD_OPC_FilterValue, 8, 128, 6, // Skip to: 7094 /* 5430 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5433 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5452 /* 5437 */ MCD_OPC_CheckPredicate, 32, 117, 6, // Skip to: 7094 /* 5441 */ MCD_OPC_CheckField, 12, 4, 15, 111, 6, // Skip to: 7094 /* 5447 */ MCD_OPC_Decode, 225, 19, 176, 2, // Opcode: t2SEL /* 5452 */ MCD_OPC_FilterValue, 1, 102, 6, // Skip to: 7094 /* 5456 */ MCD_OPC_CheckPredicate, 24, 98, 6, // Skip to: 7094 /* 5460 */ MCD_OPC_CheckField, 12, 4, 15, 92, 6, // Skip to: 7094 /* 5466 */ MCD_OPC_Decode, 143, 18, 175, 2, // Opcode: t2CLZ /* 5471 */ MCD_OPC_FilterValue, 6, 152, 1, // Skip to: 5883 /* 5475 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 5478 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 5523 /* 5482 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5485 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5504 /* 5489 */ MCD_OPC_CheckPredicate, 32, 65, 6, // Skip to: 7094 /* 5493 */ MCD_OPC_CheckField, 12, 4, 15, 59, 6, // Skip to: 7094 /* 5499 */ MCD_OPC_Decode, 149, 20, 173, 2, // Opcode: t2SSUB8 /* 5504 */ MCD_OPC_FilterValue, 1, 50, 6, // Skip to: 7094 /* 5508 */ MCD_OPC_CheckPredicate, 32, 46, 6, // Skip to: 7094 /* 5512 */ MCD_OPC_CheckField, 12, 4, 15, 40, 6, // Skip to: 7094 /* 5518 */ MCD_OPC_Decode, 148, 20, 173, 2, // Opcode: t2SSUB16 /* 5523 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 5568 /* 5527 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5530 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5549 /* 5534 */ MCD_OPC_CheckPredicate, 32, 20, 6, // Skip to: 7094 /* 5538 */ MCD_OPC_CheckField, 12, 4, 15, 14, 6, // Skip to: 7094 /* 5544 */ MCD_OPC_Decode, 200, 19, 173, 2, // Opcode: t2QSUB8 /* 5549 */ MCD_OPC_FilterValue, 1, 5, 6, // Skip to: 7094 /* 5553 */ MCD_OPC_CheckPredicate, 32, 1, 6, // Skip to: 7094 /* 5557 */ MCD_OPC_CheckField, 12, 4, 15, 251, 5, // Skip to: 7094 /* 5563 */ MCD_OPC_Decode, 199, 19, 173, 2, // Opcode: t2QSUB16 /* 5568 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 5613 /* 5572 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5575 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5594 /* 5579 */ MCD_OPC_CheckPredicate, 32, 231, 5, // Skip to: 7094 /* 5583 */ MCD_OPC_CheckField, 12, 4, 15, 225, 5, // Skip to: 7094 /* 5589 */ MCD_OPC_Decode, 231, 19, 173, 2, // Opcode: t2SHSUB8 /* 5594 */ MCD_OPC_FilterValue, 1, 216, 5, // Skip to: 7094 /* 5598 */ MCD_OPC_CheckPredicate, 32, 212, 5, // Skip to: 7094 /* 5602 */ MCD_OPC_CheckField, 12, 4, 15, 206, 5, // Skip to: 7094 /* 5608 */ MCD_OPC_Decode, 230, 19, 173, 2, // Opcode: t2SHSUB16 /* 5613 */ MCD_OPC_FilterValue, 4, 41, 0, // Skip to: 5658 /* 5617 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5620 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5639 /* 5624 */ MCD_OPC_CheckPredicate, 32, 186, 5, // Skip to: 7094 /* 5628 */ MCD_OPC_CheckField, 12, 4, 15, 180, 5, // Skip to: 7094 /* 5634 */ MCD_OPC_Decode, 128, 21, 173, 2, // Opcode: t2USUB8 /* 5639 */ MCD_OPC_FilterValue, 1, 171, 5, // Skip to: 7094 /* 5643 */ MCD_OPC_CheckPredicate, 32, 167, 5, // Skip to: 7094 /* 5647 */ MCD_OPC_CheckField, 12, 4, 15, 161, 5, // Skip to: 7094 /* 5653 */ MCD_OPC_Decode, 255, 20, 173, 2, // Opcode: t2USUB16 /* 5658 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 5703 /* 5662 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5665 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5684 /* 5669 */ MCD_OPC_CheckPredicate, 32, 141, 5, // Skip to: 7094 /* 5673 */ MCD_OPC_CheckField, 12, 4, 15, 135, 5, // Skip to: 7094 /* 5679 */ MCD_OPC_Decode, 249, 20, 173, 2, // Opcode: t2UQSUB8 /* 5684 */ MCD_OPC_FilterValue, 1, 126, 5, // Skip to: 7094 /* 5688 */ MCD_OPC_CheckPredicate, 32, 122, 5, // Skip to: 7094 /* 5692 */ MCD_OPC_CheckField, 12, 4, 15, 116, 5, // Skip to: 7094 /* 5698 */ MCD_OPC_Decode, 248, 20, 173, 2, // Opcode: t2UQSUB16 /* 5703 */ MCD_OPC_FilterValue, 6, 41, 0, // Skip to: 5748 /* 5707 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5710 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5729 /* 5714 */ MCD_OPC_CheckPredicate, 32, 96, 5, // Skip to: 7094 /* 5718 */ MCD_OPC_CheckField, 12, 4, 15, 90, 5, // Skip to: 7094 /* 5724 */ MCD_OPC_Decode, 240, 20, 173, 2, // Opcode: t2UHSUB8 /* 5729 */ MCD_OPC_FilterValue, 1, 81, 5, // Skip to: 7094 /* 5733 */ MCD_OPC_CheckPredicate, 32, 77, 5, // Skip to: 7094 /* 5737 */ MCD_OPC_CheckField, 12, 4, 15, 71, 5, // Skip to: 7094 /* 5743 */ MCD_OPC_Decode, 239, 20, 173, 2, // Opcode: t2UHSUB16 /* 5748 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 5793 /* 5752 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5755 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5774 /* 5759 */ MCD_OPC_CheckPredicate, 43, 51, 5, // Skip to: 7094 /* 5763 */ MCD_OPC_CheckField, 12, 4, 15, 45, 5, // Skip to: 7094 /* 5769 */ MCD_OPC_Decode, 153, 18, 173, 2, // Opcode: t2CRC32B /* 5774 */ MCD_OPC_FilterValue, 1, 36, 5, // Skip to: 7094 /* 5778 */ MCD_OPC_CheckPredicate, 43, 32, 5, // Skip to: 7094 /* 5782 */ MCD_OPC_CheckField, 12, 4, 15, 26, 5, // Skip to: 7094 /* 5788 */ MCD_OPC_Decode, 154, 18, 173, 2, // Opcode: t2CRC32CB /* 5793 */ MCD_OPC_FilterValue, 9, 41, 0, // Skip to: 5838 /* 5797 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5800 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5819 /* 5804 */ MCD_OPC_CheckPredicate, 43, 6, 5, // Skip to: 7094 /* 5808 */ MCD_OPC_CheckField, 12, 4, 15, 0, 5, // Skip to: 7094 /* 5814 */ MCD_OPC_Decode, 157, 18, 173, 2, // Opcode: t2CRC32H /* 5819 */ MCD_OPC_FilterValue, 1, 247, 4, // Skip to: 7094 /* 5823 */ MCD_OPC_CheckPredicate, 43, 243, 4, // Skip to: 7094 /* 5827 */ MCD_OPC_CheckField, 12, 4, 15, 237, 4, // Skip to: 7094 /* 5833 */ MCD_OPC_Decode, 155, 18, 173, 2, // Opcode: t2CRC32CH /* 5838 */ MCD_OPC_FilterValue, 10, 228, 4, // Skip to: 7094 /* 5842 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5845 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 5864 /* 5849 */ MCD_OPC_CheckPredicate, 43, 217, 4, // Skip to: 7094 /* 5853 */ MCD_OPC_CheckField, 12, 4, 15, 211, 4, // Skip to: 7094 /* 5859 */ MCD_OPC_Decode, 158, 18, 173, 2, // Opcode: t2CRC32W /* 5864 */ MCD_OPC_FilterValue, 1, 202, 4, // Skip to: 7094 /* 5868 */ MCD_OPC_CheckPredicate, 43, 198, 4, // Skip to: 7094 /* 5872 */ MCD_OPC_CheckField, 12, 4, 15, 192, 4, // Skip to: 7094 /* 5878 */ MCD_OPC_Decode, 156, 18, 173, 2, // Opcode: t2CRC32CW /* 5883 */ MCD_OPC_FilterValue, 7, 183, 4, // Skip to: 7094 /* 5887 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 5890 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 5915 /* 5894 */ MCD_OPC_CheckPredicate, 32, 172, 4, // Skip to: 7094 /* 5898 */ MCD_OPC_CheckField, 20, 1, 0, 166, 4, // Skip to: 7094 /* 5904 */ MCD_OPC_CheckField, 12, 4, 15, 160, 4, // Skip to: 7094 /* 5910 */ MCD_OPC_Decode, 147, 20, 173, 2, // Opcode: t2SSAX /* 5915 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 5940 /* 5919 */ MCD_OPC_CheckPredicate, 32, 147, 4, // Skip to: 7094 /* 5923 */ MCD_OPC_CheckField, 20, 1, 0, 141, 4, // Skip to: 7094 /* 5929 */ MCD_OPC_CheckField, 12, 4, 15, 135, 4, // Skip to: 7094 /* 5935 */ MCD_OPC_Decode, 197, 19, 173, 2, // Opcode: t2QSAX /* 5940 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 5965 /* 5944 */ MCD_OPC_CheckPredicate, 32, 122, 4, // Skip to: 7094 /* 5948 */ MCD_OPC_CheckField, 20, 1, 0, 116, 4, // Skip to: 7094 /* 5954 */ MCD_OPC_CheckField, 12, 4, 15, 110, 4, // Skip to: 7094 /* 5960 */ MCD_OPC_Decode, 229, 19, 173, 2, // Opcode: t2SHSAX /* 5965 */ MCD_OPC_FilterValue, 4, 21, 0, // Skip to: 5990 /* 5969 */ MCD_OPC_CheckPredicate, 32, 97, 4, // Skip to: 7094 /* 5973 */ MCD_OPC_CheckField, 20, 1, 0, 91, 4, // Skip to: 7094 /* 5979 */ MCD_OPC_CheckField, 12, 4, 15, 85, 4, // Skip to: 7094 /* 5985 */ MCD_OPC_Decode, 254, 20, 173, 2, // Opcode: t2USAX /* 5990 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 6015 /* 5994 */ MCD_OPC_CheckPredicate, 32, 72, 4, // Skip to: 7094 /* 5998 */ MCD_OPC_CheckField, 20, 1, 0, 66, 4, // Skip to: 7094 /* 6004 */ MCD_OPC_CheckField, 12, 4, 15, 60, 4, // Skip to: 7094 /* 6010 */ MCD_OPC_Decode, 247, 20, 173, 2, // Opcode: t2UQSAX /* 6015 */ MCD_OPC_FilterValue, 6, 51, 4, // Skip to: 7094 /* 6019 */ MCD_OPC_CheckPredicate, 32, 47, 4, // Skip to: 7094 /* 6023 */ MCD_OPC_CheckField, 20, 1, 0, 41, 4, // Skip to: 7094 /* 6029 */ MCD_OPC_CheckField, 12, 4, 15, 35, 4, // Skip to: 7094 /* 6035 */ MCD_OPC_Decode, 238, 20, 173, 2, // Opcode: t2UHSAX /* 6040 */ MCD_OPC_FilterValue, 3, 230, 2, // Skip to: 6786 /* 6044 */ MCD_OPC_ExtractField, 20, 4, // Inst{23-20} ... /* 6047 */ MCD_OPC_FilterValue, 0, 44, 0, // Skip to: 6095 /* 6051 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6054 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 6082 /* 6058 */ MCD_OPC_CheckPredicate, 24, 11, 0, // Skip to: 6073 /* 6062 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6073 /* 6068 */ MCD_OPC_Decode, 167, 19, 173, 2, // Opcode: t2MUL /* 6073 */ MCD_OPC_CheckPredicate, 24, 249, 3, // Skip to: 7094 /* 6077 */ MCD_OPC_Decode, 132, 19, 177, 2, // Opcode: t2MLA /* 6082 */ MCD_OPC_FilterValue, 1, 240, 3, // Skip to: 7094 /* 6086 */ MCD_OPC_CheckPredicate, 24, 236, 3, // Skip to: 7094 /* 6090 */ MCD_OPC_Decode, 133, 19, 177, 2, // Opcode: t2MLS /* 6095 */ MCD_OPC_FilterValue, 1, 115, 0, // Skip to: 6214 /* 6099 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6102 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 6130 /* 6106 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6121 /* 6110 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6121 /* 6116 */ MCD_OPC_Decode, 132, 20, 173, 2, // Opcode: t2SMULBB /* 6121 */ MCD_OPC_CheckPredicate, 32, 201, 3, // Skip to: 7094 /* 6125 */ MCD_OPC_Decode, 233, 19, 177, 2, // Opcode: t2SMLABB /* 6130 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 6158 /* 6134 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6149 /* 6138 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6149 /* 6144 */ MCD_OPC_Decode, 133, 20, 173, 2, // Opcode: t2SMULBT /* 6149 */ MCD_OPC_CheckPredicate, 32, 173, 3, // Skip to: 7094 /* 6153 */ MCD_OPC_Decode, 234, 19, 177, 2, // Opcode: t2SMLABT /* 6158 */ MCD_OPC_FilterValue, 2, 24, 0, // Skip to: 6186 /* 6162 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6177 /* 6166 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6177 /* 6172 */ MCD_OPC_Decode, 135, 20, 173, 2, // Opcode: t2SMULTB /* 6177 */ MCD_OPC_CheckPredicate, 32, 145, 3, // Skip to: 7094 /* 6181 */ MCD_OPC_Decode, 244, 19, 177, 2, // Opcode: t2SMLATB /* 6186 */ MCD_OPC_FilterValue, 3, 136, 3, // Skip to: 7094 /* 6190 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6205 /* 6194 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6205 /* 6200 */ MCD_OPC_Decode, 136, 20, 173, 2, // Opcode: t2SMULTT /* 6205 */ MCD_OPC_CheckPredicate, 32, 117, 3, // Skip to: 7094 /* 6209 */ MCD_OPC_Decode, 245, 19, 177, 2, // Opcode: t2SMLATT /* 6214 */ MCD_OPC_FilterValue, 2, 59, 0, // Skip to: 6277 /* 6218 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6221 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 6249 /* 6225 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6240 /* 6229 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6240 /* 6235 */ MCD_OPC_Decode, 130, 20, 173, 2, // Opcode: t2SMUAD /* 6240 */ MCD_OPC_CheckPredicate, 32, 82, 3, // Skip to: 7094 /* 6244 */ MCD_OPC_Decode, 235, 19, 177, 2, // Opcode: t2SMLAD /* 6249 */ MCD_OPC_FilterValue, 1, 73, 3, // Skip to: 7094 /* 6253 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6268 /* 6257 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6268 /* 6263 */ MCD_OPC_Decode, 131, 20, 173, 2, // Opcode: t2SMUADX /* 6268 */ MCD_OPC_CheckPredicate, 32, 54, 3, // Skip to: 7094 /* 6272 */ MCD_OPC_Decode, 236, 19, 177, 2, // Opcode: t2SMLADX /* 6277 */ MCD_OPC_FilterValue, 3, 59, 0, // Skip to: 6340 /* 6281 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6284 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 6312 /* 6288 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6303 /* 6292 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6303 /* 6298 */ MCD_OPC_Decode, 137, 20, 173, 2, // Opcode: t2SMULWB /* 6303 */ MCD_OPC_CheckPredicate, 32, 19, 3, // Skip to: 7094 /* 6307 */ MCD_OPC_Decode, 246, 19, 177, 2, // Opcode: t2SMLAWB /* 6312 */ MCD_OPC_FilterValue, 1, 10, 3, // Skip to: 7094 /* 6316 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6331 /* 6320 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6331 /* 6326 */ MCD_OPC_Decode, 138, 20, 173, 2, // Opcode: t2SMULWT /* 6331 */ MCD_OPC_CheckPredicate, 32, 247, 2, // Skip to: 7094 /* 6335 */ MCD_OPC_Decode, 247, 19, 177, 2, // Opcode: t2SMLAWT /* 6340 */ MCD_OPC_FilterValue, 4, 59, 0, // Skip to: 6403 /* 6344 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6347 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 6375 /* 6351 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6366 /* 6355 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6366 /* 6361 */ MCD_OPC_Decode, 139, 20, 173, 2, // Opcode: t2SMUSD /* 6366 */ MCD_OPC_CheckPredicate, 32, 212, 2, // Skip to: 7094 /* 6370 */ MCD_OPC_Decode, 248, 19, 177, 2, // Opcode: t2SMLSD /* 6375 */ MCD_OPC_FilterValue, 1, 203, 2, // Skip to: 7094 /* 6379 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6394 /* 6383 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6394 /* 6389 */ MCD_OPC_Decode, 140, 20, 173, 2, // Opcode: t2SMUSDX /* 6394 */ MCD_OPC_CheckPredicate, 32, 184, 2, // Skip to: 7094 /* 6398 */ MCD_OPC_Decode, 249, 19, 177, 2, // Opcode: t2SMLSDX /* 6403 */ MCD_OPC_FilterValue, 5, 59, 0, // Skip to: 6466 /* 6407 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6410 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 6438 /* 6414 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6429 /* 6418 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6429 /* 6424 */ MCD_OPC_Decode, 128, 20, 173, 2, // Opcode: t2SMMUL /* 6429 */ MCD_OPC_CheckPredicate, 32, 149, 2, // Skip to: 7094 /* 6433 */ MCD_OPC_Decode, 252, 19, 177, 2, // Opcode: t2SMMLA /* 6438 */ MCD_OPC_FilterValue, 1, 140, 2, // Skip to: 7094 /* 6442 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6457 /* 6446 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6457 /* 6452 */ MCD_OPC_Decode, 129, 20, 173, 2, // Opcode: t2SMMULR /* 6457 */ MCD_OPC_CheckPredicate, 32, 121, 2, // Skip to: 7094 /* 6461 */ MCD_OPC_Decode, 253, 19, 177, 2, // Opcode: t2SMMLAR /* 6466 */ MCD_OPC_FilterValue, 6, 29, 0, // Skip to: 6499 /* 6470 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6473 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6486 /* 6477 */ MCD_OPC_CheckPredicate, 32, 101, 2, // Skip to: 7094 /* 6481 */ MCD_OPC_Decode, 254, 19, 177, 2, // Opcode: t2SMMLS /* 6486 */ MCD_OPC_FilterValue, 1, 92, 2, // Skip to: 7094 /* 6490 */ MCD_OPC_CheckPredicate, 32, 88, 2, // Skip to: 7094 /* 6494 */ MCD_OPC_Decode, 255, 19, 177, 2, // Opcode: t2SMMLSR /* 6499 */ MCD_OPC_FilterValue, 7, 31, 0, // Skip to: 6534 /* 6503 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6506 */ MCD_OPC_FilterValue, 0, 72, 2, // Skip to: 7094 /* 6510 */ MCD_OPC_CheckPredicate, 32, 11, 0, // Skip to: 6525 /* 6514 */ MCD_OPC_CheckField, 12, 4, 15, 5, 0, // Skip to: 6525 /* 6520 */ MCD_OPC_Decode, 250, 20, 173, 2, // Opcode: t2USAD8 /* 6525 */ MCD_OPC_CheckPredicate, 32, 53, 2, // Skip to: 7094 /* 6529 */ MCD_OPC_Decode, 251, 20, 177, 2, // Opcode: t2USADA8 /* 6534 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 6553 /* 6538 */ MCD_OPC_CheckPredicate, 24, 40, 2, // Skip to: 7094 /* 6542 */ MCD_OPC_CheckField, 4, 4, 0, 34, 2, // Skip to: 7094 /* 6548 */ MCD_OPC_Decode, 134, 20, 178, 2, // Opcode: t2SMULL /* 6553 */ MCD_OPC_FilterValue, 9, 21, 0, // Skip to: 6578 /* 6557 */ MCD_OPC_CheckPredicate, 44, 21, 2, // Skip to: 7094 /* 6561 */ MCD_OPC_CheckField, 12, 4, 15, 15, 2, // Skip to: 7094 /* 6567 */ MCD_OPC_CheckField, 4, 4, 15, 9, 2, // Skip to: 7094 /* 6573 */ MCD_OPC_Decode, 224, 19, 173, 2, // Opcode: t2SDIV /* 6578 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 6597 /* 6582 */ MCD_OPC_CheckPredicate, 24, 252, 1, // Skip to: 7094 /* 6586 */ MCD_OPC_CheckField, 4, 4, 0, 246, 1, // Skip to: 7094 /* 6592 */ MCD_OPC_Decode, 243, 20, 178, 2, // Opcode: t2UMULL /* 6597 */ MCD_OPC_FilterValue, 11, 21, 0, // Skip to: 6622 /* 6601 */ MCD_OPC_CheckPredicate, 44, 233, 1, // Skip to: 7094 /* 6605 */ MCD_OPC_CheckField, 12, 4, 15, 227, 1, // Skip to: 7094 /* 6611 */ MCD_OPC_CheckField, 4, 4, 15, 221, 1, // Skip to: 7094 /* 6617 */ MCD_OPC_Decode, 234, 20, 173, 2, // Opcode: t2UDIV /* 6622 */ MCD_OPC_FilterValue, 12, 94, 0, // Skip to: 6720 /* 6626 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6629 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6642 /* 6633 */ MCD_OPC_CheckPredicate, 24, 201, 1, // Skip to: 7094 /* 6637 */ MCD_OPC_Decode, 237, 19, 179, 2, // Opcode: t2SMLAL /* 6642 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 6655 /* 6646 */ MCD_OPC_CheckPredicate, 32, 188, 1, // Skip to: 7094 /* 6650 */ MCD_OPC_Decode, 238, 19, 178, 2, // Opcode: t2SMLALBB /* 6655 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 6668 /* 6659 */ MCD_OPC_CheckPredicate, 32, 175, 1, // Skip to: 7094 /* 6663 */ MCD_OPC_Decode, 239, 19, 178, 2, // Opcode: t2SMLALBT /* 6668 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 6681 /* 6672 */ MCD_OPC_CheckPredicate, 32, 162, 1, // Skip to: 7094 /* 6676 */ MCD_OPC_Decode, 242, 19, 178, 2, // Opcode: t2SMLALTB /* 6681 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 6694 /* 6685 */ MCD_OPC_CheckPredicate, 32, 149, 1, // Skip to: 7094 /* 6689 */ MCD_OPC_Decode, 243, 19, 178, 2, // Opcode: t2SMLALTT /* 6694 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 6707 /* 6698 */ MCD_OPC_CheckPredicate, 32, 136, 1, // Skip to: 7094 /* 6702 */ MCD_OPC_Decode, 240, 19, 178, 2, // Opcode: t2SMLALD /* 6707 */ MCD_OPC_FilterValue, 13, 127, 1, // Skip to: 7094 /* 6711 */ MCD_OPC_CheckPredicate, 32, 123, 1, // Skip to: 7094 /* 6715 */ MCD_OPC_Decode, 241, 19, 178, 2, // Opcode: t2SMLALDX /* 6720 */ MCD_OPC_FilterValue, 13, 29, 0, // Skip to: 6753 /* 6724 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6727 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 6740 /* 6731 */ MCD_OPC_CheckPredicate, 32, 103, 1, // Skip to: 7094 /* 6735 */ MCD_OPC_Decode, 250, 19, 178, 2, // Opcode: t2SMLSLD /* 6740 */ MCD_OPC_FilterValue, 13, 94, 1, // Skip to: 7094 /* 6744 */ MCD_OPC_CheckPredicate, 32, 90, 1, // Skip to: 7094 /* 6748 */ MCD_OPC_Decode, 251, 19, 180, 2, // Opcode: t2SMLSLDX /* 6753 */ MCD_OPC_FilterValue, 14, 81, 1, // Skip to: 7094 /* 6757 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 6760 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6773 /* 6764 */ MCD_OPC_CheckPredicate, 24, 70, 1, // Skip to: 7094 /* 6768 */ MCD_OPC_Decode, 242, 20, 179, 2, // Opcode: t2UMLAL /* 6773 */ MCD_OPC_FilterValue, 6, 61, 1, // Skip to: 7094 /* 6777 */ MCD_OPC_CheckPredicate, 32, 57, 1, // Skip to: 7094 /* 6781 */ MCD_OPC_Decode, 241, 20, 178, 2, // Opcode: t2UMAAL /* 6786 */ MCD_OPC_FilterValue, 4, 151, 0, // Skip to: 6941 /* 6790 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 6793 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6811 /* 6797 */ MCD_OPC_CheckPredicate, 45, 37, 1, // Skip to: 7094 /* 6801 */ MCD_OPC_CheckField, 23, 1, 1, 31, 1, // Skip to: 7094 /* 6807 */ MCD_OPC_Decode, 155, 20, 86, // Opcode: t2STC2_OPTION /* 6811 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 6829 /* 6815 */ MCD_OPC_CheckPredicate, 45, 19, 1, // Skip to: 7094 /* 6819 */ MCD_OPC_CheckField, 23, 1, 1, 13, 1, // Skip to: 7094 /* 6825 */ MCD_OPC_Decode, 186, 18, 86, // Opcode: t2LDC2_OPTION /* 6829 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6841 /* 6833 */ MCD_OPC_CheckPredicate, 45, 1, 1, // Skip to: 7094 /* 6837 */ MCD_OPC_Decode, 156, 20, 86, // Opcode: t2STC2_POST /* 6841 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 6853 /* 6845 */ MCD_OPC_CheckPredicate, 45, 245, 0, // Skip to: 7094 /* 6849 */ MCD_OPC_Decode, 187, 18, 86, // Opcode: t2LDC2_POST /* 6853 */ MCD_OPC_FilterValue, 4, 28, 0, // Skip to: 6885 /* 6857 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 6860 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6873 /* 6864 */ MCD_OPC_CheckPredicate, 31, 226, 0, // Skip to: 7094 /* 6868 */ MCD_OPC_Decode, 131, 19, 132, 2, // Opcode: t2MCRR2 /* 6873 */ MCD_OPC_FilterValue, 1, 217, 0, // Skip to: 7094 /* 6877 */ MCD_OPC_CheckPredicate, 45, 213, 0, // Skip to: 7094 /* 6881 */ MCD_OPC_Decode, 151, 20, 86, // Opcode: t2STC2L_OPTION /* 6885 */ MCD_OPC_FilterValue, 5, 28, 0, // Skip to: 6917 /* 6889 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 6892 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6905 /* 6896 */ MCD_OPC_CheckPredicate, 31, 194, 0, // Skip to: 7094 /* 6900 */ MCD_OPC_Decode, 159, 19, 132, 2, // Opcode: t2MRRC2 /* 6905 */ MCD_OPC_FilterValue, 1, 185, 0, // Skip to: 7094 /* 6909 */ MCD_OPC_CheckPredicate, 45, 181, 0, // Skip to: 7094 /* 6913 */ MCD_OPC_Decode, 182, 18, 86, // Opcode: t2LDC2L_OPTION /* 6917 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 6929 /* 6921 */ MCD_OPC_CheckPredicate, 45, 169, 0, // Skip to: 7094 /* 6925 */ MCD_OPC_Decode, 152, 20, 86, // Opcode: t2STC2L_POST /* 6929 */ MCD_OPC_FilterValue, 7, 161, 0, // Skip to: 7094 /* 6933 */ MCD_OPC_CheckPredicate, 45, 157, 0, // Skip to: 7094 /* 6937 */ MCD_OPC_Decode, 183, 18, 86, // Opcode: t2LDC2L_POST /* 6941 */ MCD_OPC_FilterValue, 5, 99, 0, // Skip to: 7044 /* 6945 */ MCD_OPC_ExtractField, 20, 3, // Inst{22-20} ... /* 6948 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6960 /* 6952 */ MCD_OPC_CheckPredicate, 45, 138, 0, // Skip to: 7094 /* 6956 */ MCD_OPC_Decode, 154, 20, 86, // Opcode: t2STC2_OFFSET /* 6960 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6972 /* 6964 */ MCD_OPC_CheckPredicate, 45, 126, 0, // Skip to: 7094 /* 6968 */ MCD_OPC_Decode, 185, 18, 86, // Opcode: t2LDC2_OFFSET /* 6972 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6984 /* 6976 */ MCD_OPC_CheckPredicate, 45, 114, 0, // Skip to: 7094 /* 6980 */ MCD_OPC_Decode, 157, 20, 86, // Opcode: t2STC2_PRE /* 6984 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 6996 /* 6988 */ MCD_OPC_CheckPredicate, 45, 102, 0, // Skip to: 7094 /* 6992 */ MCD_OPC_Decode, 188, 18, 86, // Opcode: t2LDC2_PRE /* 6996 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 7008 /* 7000 */ MCD_OPC_CheckPredicate, 45, 90, 0, // Skip to: 7094 /* 7004 */ MCD_OPC_Decode, 150, 20, 86, // Opcode: t2STC2L_OFFSET /* 7008 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 7020 /* 7012 */ MCD_OPC_CheckPredicate, 45, 78, 0, // Skip to: 7094 /* 7016 */ MCD_OPC_Decode, 181, 18, 86, // Opcode: t2LDC2L_OFFSET /* 7020 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 7032 /* 7024 */ MCD_OPC_CheckPredicate, 45, 66, 0, // Skip to: 7094 /* 7028 */ MCD_OPC_Decode, 153, 20, 86, // Opcode: t2STC2L_PRE /* 7032 */ MCD_OPC_FilterValue, 7, 58, 0, // Skip to: 7094 /* 7036 */ MCD_OPC_CheckPredicate, 45, 54, 0, // Skip to: 7094 /* 7040 */ MCD_OPC_Decode, 184, 18, 86, // Opcode: t2LDC2L_PRE /* 7044 */ MCD_OPC_FilterValue, 6, 46, 0, // Skip to: 7094 /* 7048 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 7051 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7063 /* 7055 */ MCD_OPC_CheckPredicate, 31, 35, 0, // Skip to: 7094 /* 7059 */ MCD_OPC_Decode, 141, 18, 89, // Opcode: t2CDP2 /* 7063 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 7094 /* 7067 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 7070 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7082 /* 7074 */ MCD_OPC_CheckPredicate, 31, 16, 0, // Skip to: 7094 /* 7078 */ MCD_OPC_Decode, 129, 19, 91, // Opcode: t2MCR2 /* 7082 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7094 /* 7086 */ MCD_OPC_CheckPredicate, 31, 4, 0, // Skip to: 7094 /* 7090 */ MCD_OPC_Decode, 157, 19, 93, // Opcode: t2MRC2 /* 7094 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableThumbSBit16[] = { /* 0 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ... /* 3 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 16 /* 7 */ MCD_OPC_CheckPredicate, 21, 49, 1, // Skip to: 316 /* 11 */ MCD_OPC_Decode, 194, 21, 181, 2, // Opcode: tLSLri /* 16 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29 /* 20 */ MCD_OPC_CheckPredicate, 21, 36, 1, // Skip to: 316 /* 24 */ MCD_OPC_Decode, 196, 21, 181, 2, // Opcode: tLSRri /* 29 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 42 /* 33 */ MCD_OPC_CheckPredicate, 21, 23, 1, // Skip to: 316 /* 37 */ MCD_OPC_Decode, 149, 21, 181, 2, // Opcode: tASRri /* 42 */ MCD_OPC_FilterValue, 3, 55, 0, // Skip to: 101 /* 46 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 49 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 62 /* 53 */ MCD_OPC_CheckPredicate, 21, 3, 1, // Skip to: 316 /* 57 */ MCD_OPC_Decode, 142, 21, 182, 2, // Opcode: tADDrr /* 62 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 75 /* 66 */ MCD_OPC_CheckPredicate, 21, 246, 0, // Skip to: 316 /* 70 */ MCD_OPC_Decode, 226, 21, 182, 2, // Opcode: tSUBrr /* 75 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 88 /* 79 */ MCD_OPC_CheckPredicate, 21, 233, 0, // Skip to: 316 /* 83 */ MCD_OPC_Decode, 138, 21, 183, 2, // Opcode: tADDi3 /* 88 */ MCD_OPC_FilterValue, 3, 224, 0, // Skip to: 316 /* 92 */ MCD_OPC_CheckPredicate, 21, 220, 0, // Skip to: 316 /* 96 */ MCD_OPC_Decode, 224, 21, 183, 2, // Opcode: tSUBi3 /* 101 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 114 /* 105 */ MCD_OPC_CheckPredicate, 21, 207, 0, // Skip to: 316 /* 109 */ MCD_OPC_Decode, 200, 21, 207, 1, // Opcode: tMOVi8 /* 114 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 127 /* 118 */ MCD_OPC_CheckPredicate, 21, 194, 0, // Skip to: 316 /* 122 */ MCD_OPC_Decode, 139, 21, 184, 2, // Opcode: tADDi8 /* 127 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 140 /* 131 */ MCD_OPC_CheckPredicate, 21, 181, 0, // Skip to: 316 /* 135 */ MCD_OPC_Decode, 225, 21, 184, 2, // Opcode: tSUBi8 /* 140 */ MCD_OPC_FilterValue, 8, 172, 0, // Skip to: 316 /* 144 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 147 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 160 /* 151 */ MCD_OPC_CheckPredicate, 21, 161, 0, // Skip to: 316 /* 155 */ MCD_OPC_Decode, 148, 21, 185, 2, // Opcode: tAND /* 160 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 173 /* 164 */ MCD_OPC_CheckPredicate, 21, 148, 0, // Skip to: 316 /* 168 */ MCD_OPC_Decode, 172, 21, 185, 2, // Opcode: tEOR /* 173 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 186 /* 177 */ MCD_OPC_CheckPredicate, 21, 135, 0, // Skip to: 316 /* 181 */ MCD_OPC_Decode, 195, 21, 185, 2, // Opcode: tLSLrr /* 186 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 199 /* 190 */ MCD_OPC_CheckPredicate, 21, 122, 0, // Skip to: 316 /* 194 */ MCD_OPC_Decode, 197, 21, 185, 2, // Opcode: tLSRrr /* 199 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 212 /* 203 */ MCD_OPC_CheckPredicate, 21, 109, 0, // Skip to: 316 /* 207 */ MCD_OPC_Decode, 150, 21, 185, 2, // Opcode: tASRrr /* 212 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 225 /* 216 */ MCD_OPC_CheckPredicate, 21, 96, 0, // Skip to: 316 /* 220 */ MCD_OPC_Decode, 135, 21, 185, 2, // Opcode: tADC /* 225 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 238 /* 229 */ MCD_OPC_CheckPredicate, 21, 83, 0, // Skip to: 316 /* 233 */ MCD_OPC_Decode, 214, 21, 185, 2, // Opcode: tSBC /* 238 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 251 /* 242 */ MCD_OPC_CheckPredicate, 21, 70, 0, // Skip to: 316 /* 246 */ MCD_OPC_Decode, 212, 21, 185, 2, // Opcode: tROR /* 251 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 264 /* 255 */ MCD_OPC_CheckPredicate, 21, 57, 0, // Skip to: 316 /* 259 */ MCD_OPC_Decode, 213, 21, 206, 1, // Opcode: tRSB /* 264 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 277 /* 268 */ MCD_OPC_CheckPredicate, 21, 44, 0, // Skip to: 316 /* 272 */ MCD_OPC_Decode, 204, 21, 185, 2, // Opcode: tORR /* 277 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 290 /* 281 */ MCD_OPC_CheckPredicate, 21, 31, 0, // Skip to: 316 /* 285 */ MCD_OPC_Decode, 202, 21, 186, 2, // Opcode: tMUL /* 290 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 303 /* 294 */ MCD_OPC_CheckPredicate, 21, 18, 0, // Skip to: 316 /* 298 */ MCD_OPC_Decode, 152, 21, 185, 2, // Opcode: tBIC /* 303 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 316 /* 307 */ MCD_OPC_CheckPredicate, 21, 5, 0, // Skip to: 316 /* 311 */ MCD_OPC_Decode, 203, 21, 206, 1, // Opcode: tMVN /* 316 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableVFP32[] = { /* 0 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3 */ MCD_OPC_FilterValue, 0, 83, 1, // Skip to: 346 /* 7 */ MCD_OPC_ExtractField, 24, 4, // Inst{27-24} ... /* 10 */ MCD_OPC_FilterValue, 12, 130, 0, // Skip to: 144 /* 14 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 17 */ MCD_OPC_FilterValue, 10, 47, 0, // Skip to: 68 /* 21 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 24 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 55 /* 28 */ MCD_OPC_CheckPredicate, 20, 211, 10, // Skip to: 2803 /* 32 */ MCD_OPC_CheckField, 22, 1, 1, 205, 10, // Skip to: 2803 /* 38 */ MCD_OPC_CheckField, 6, 2, 0, 199, 10, // Skip to: 2803 /* 44 */ MCD_OPC_CheckField, 4, 1, 1, 193, 10, // Skip to: 2803 /* 50 */ MCD_OPC_Decode, 217, 10, 187, 2, // Opcode: VMOVSRR /* 55 */ MCD_OPC_FilterValue, 1, 184, 10, // Skip to: 2803 /* 59 */ MCD_OPC_CheckPredicate, 20, 180, 10, // Skip to: 2803 /* 63 */ MCD_OPC_Decode, 136, 17, 188, 2, // Opcode: VSTMSIA /* 68 */ MCD_OPC_FilterValue, 11, 171, 10, // Skip to: 2803 /* 72 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 75 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 106 /* 79 */ MCD_OPC_CheckPredicate, 20, 160, 10, // Skip to: 2803 /* 83 */ MCD_OPC_CheckField, 22, 1, 1, 154, 10, // Skip to: 2803 /* 89 */ MCD_OPC_CheckField, 6, 2, 0, 148, 10, // Skip to: 2803 /* 95 */ MCD_OPC_CheckField, 4, 1, 1, 142, 10, // Skip to: 2803 /* 101 */ MCD_OPC_Decode, 200, 10, 189, 2, // Opcode: VMOVDRR /* 106 */ MCD_OPC_FilterValue, 1, 133, 10, // Skip to: 2803 /* 110 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 113 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 126 /* 117 */ MCD_OPC_CheckPredicate, 20, 122, 10, // Skip to: 2803 /* 121 */ MCD_OPC_Decode, 132, 17, 190, 2, // Opcode: VSTMDIA /* 126 */ MCD_OPC_FilterValue, 1, 113, 10, // Skip to: 2803 /* 130 */ MCD_OPC_CheckPredicate, 20, 109, 10, // Skip to: 2803 /* 134 */ MCD_OPC_CheckField, 22, 1, 0, 103, 10, // Skip to: 2803 /* 140 */ MCD_OPC_Decode, 112, 191, 2, // Opcode: FSTMXIA /* 144 */ MCD_OPC_FilterValue, 13, 29, 0, // Skip to: 177 /* 148 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 151 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 164 /* 155 */ MCD_OPC_CheckPredicate, 20, 84, 10, // Skip to: 2803 /* 159 */ MCD_OPC_Decode, 139, 17, 192, 2, // Opcode: VSTRS /* 164 */ MCD_OPC_FilterValue, 11, 75, 10, // Skip to: 2803 /* 168 */ MCD_OPC_CheckPredicate, 20, 71, 10, // Skip to: 2803 /* 172 */ MCD_OPC_Decode, 138, 17, 193, 2, // Opcode: VSTRD /* 177 */ MCD_OPC_FilterValue, 14, 62, 10, // Skip to: 2803 /* 181 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 184 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 309 /* 188 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 191 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 264 /* 195 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 198 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 231 /* 202 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 205 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 218 /* 209 */ MCD_OPC_CheckPredicate, 20, 30, 10, // Skip to: 2803 /* 213 */ MCD_OPC_Decode, 157, 10, 194, 2, // Opcode: VMLAS /* 218 */ MCD_OPC_FilterValue, 1, 21, 10, // Skip to: 2803 /* 222 */ MCD_OPC_CheckPredicate, 20, 17, 10, // Skip to: 2803 /* 226 */ MCD_OPC_Decode, 136, 6, 195, 2, // Opcode: VDIVS /* 231 */ MCD_OPC_FilterValue, 11, 8, 10, // Skip to: 2803 /* 235 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 238 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 251 /* 242 */ MCD_OPC_CheckPredicate, 46, 253, 9, // Skip to: 2803 /* 246 */ MCD_OPC_Decode, 146, 10, 196, 2, // Opcode: VMLAD /* 251 */ MCD_OPC_FilterValue, 1, 244, 9, // Skip to: 2803 /* 255 */ MCD_OPC_CheckPredicate, 46, 240, 9, // Skip to: 2803 /* 259 */ MCD_OPC_Decode, 135, 6, 197, 2, // Opcode: VDIVD /* 264 */ MCD_OPC_FilterValue, 1, 231, 9, // Skip to: 2803 /* 268 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 271 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 290 /* 275 */ MCD_OPC_CheckPredicate, 20, 220, 9, // Skip to: 2803 /* 279 */ MCD_OPC_CheckField, 23, 1, 0, 214, 9, // Skip to: 2803 /* 285 */ MCD_OPC_Decode, 183, 10, 194, 2, // Opcode: VMLSS /* 290 */ MCD_OPC_FilterValue, 11, 205, 9, // Skip to: 2803 /* 294 */ MCD_OPC_CheckPredicate, 46, 201, 9, // Skip to: 2803 /* 298 */ MCD_OPC_CheckField, 23, 1, 0, 195, 9, // Skip to: 2803 /* 304 */ MCD_OPC_Decode, 172, 10, 196, 2, // Opcode: VMLSD /* 309 */ MCD_OPC_FilterValue, 1, 186, 9, // Skip to: 2803 /* 313 */ MCD_OPC_CheckPredicate, 20, 182, 9, // Skip to: 2803 /* 317 */ MCD_OPC_CheckField, 22, 2, 0, 176, 9, // Skip to: 2803 /* 323 */ MCD_OPC_CheckField, 8, 4, 10, 170, 9, // Skip to: 2803 /* 329 */ MCD_OPC_CheckField, 5, 2, 0, 164, 9, // Skip to: 2803 /* 335 */ MCD_OPC_CheckField, 0, 4, 0, 158, 9, // Skip to: 2803 /* 341 */ MCD_OPC_Decode, 216, 10, 198, 2, // Opcode: VMOVSR /* 346 */ MCD_OPC_FilterValue, 1, 111, 1, // Skip to: 717 /* 350 */ MCD_OPC_ExtractField, 24, 4, // Inst{27-24} ... /* 353 */ MCD_OPC_FilterValue, 12, 130, 0, // Skip to: 487 /* 357 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 360 */ MCD_OPC_FilterValue, 10, 47, 0, // Skip to: 411 /* 364 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 367 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 398 /* 371 */ MCD_OPC_CheckPredicate, 20, 124, 9, // Skip to: 2803 /* 375 */ MCD_OPC_CheckField, 22, 1, 1, 118, 9, // Skip to: 2803 /* 381 */ MCD_OPC_CheckField, 6, 2, 0, 112, 9, // Skip to: 2803 /* 387 */ MCD_OPC_CheckField, 4, 1, 1, 106, 9, // Skip to: 2803 /* 393 */ MCD_OPC_Decode, 213, 10, 199, 2, // Opcode: VMOVRRS /* 398 */ MCD_OPC_FilterValue, 1, 97, 9, // Skip to: 2803 /* 402 */ MCD_OPC_CheckPredicate, 20, 93, 9, // Skip to: 2803 /* 406 */ MCD_OPC_Decode, 234, 9, 188, 2, // Opcode: VLDMSIA /* 411 */ MCD_OPC_FilterValue, 11, 84, 9, // Skip to: 2803 /* 415 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 418 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 449 /* 422 */ MCD_OPC_CheckPredicate, 20, 73, 9, // Skip to: 2803 /* 426 */ MCD_OPC_CheckField, 22, 1, 1, 67, 9, // Skip to: 2803 /* 432 */ MCD_OPC_CheckField, 6, 2, 0, 61, 9, // Skip to: 2803 /* 438 */ MCD_OPC_CheckField, 4, 1, 1, 55, 9, // Skip to: 2803 /* 444 */ MCD_OPC_Decode, 212, 10, 200, 2, // Opcode: VMOVRRD /* 449 */ MCD_OPC_FilterValue, 1, 46, 9, // Skip to: 2803 /* 453 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 456 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 469 /* 460 */ MCD_OPC_CheckPredicate, 20, 35, 9, // Skip to: 2803 /* 464 */ MCD_OPC_Decode, 230, 9, 190, 2, // Opcode: VLDMDIA /* 469 */ MCD_OPC_FilterValue, 1, 26, 9, // Skip to: 2803 /* 473 */ MCD_OPC_CheckPredicate, 20, 22, 9, // Skip to: 2803 /* 477 */ MCD_OPC_CheckField, 22, 1, 0, 16, 9, // Skip to: 2803 /* 483 */ MCD_OPC_Decode, 108, 191, 2, // Opcode: FLDMXIA /* 487 */ MCD_OPC_FilterValue, 13, 29, 0, // Skip to: 520 /* 491 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 494 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 507 /* 498 */ MCD_OPC_CheckPredicate, 20, 253, 8, // Skip to: 2803 /* 502 */ MCD_OPC_Decode, 237, 9, 192, 2, // Opcode: VLDRS /* 507 */ MCD_OPC_FilterValue, 11, 244, 8, // Skip to: 2803 /* 511 */ MCD_OPC_CheckPredicate, 20, 240, 8, // Skip to: 2803 /* 515 */ MCD_OPC_Decode, 236, 9, 193, 2, // Opcode: VLDRD /* 520 */ MCD_OPC_FilterValue, 14, 231, 8, // Skip to: 2803 /* 524 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 527 */ MCD_OPC_FilterValue, 0, 149, 0, // Skip to: 680 /* 531 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 534 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 607 /* 538 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 541 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 574 /* 545 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 548 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 561 /* 552 */ MCD_OPC_CheckPredicate, 20, 199, 8, // Skip to: 2803 /* 556 */ MCD_OPC_Decode, 163, 11, 194, 2, // Opcode: VNMLSS /* 561 */ MCD_OPC_FilterValue, 1, 190, 8, // Skip to: 2803 /* 565 */ MCD_OPC_CheckPredicate, 47, 186, 8, // Skip to: 2803 /* 569 */ MCD_OPC_Decode, 169, 6, 194, 2, // Opcode: VFNMSS /* 574 */ MCD_OPC_FilterValue, 11, 177, 8, // Skip to: 2803 /* 578 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 581 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 594 /* 585 */ MCD_OPC_CheckPredicate, 46, 166, 8, // Skip to: 2803 /* 589 */ MCD_OPC_Decode, 162, 11, 196, 2, // Opcode: VNMLSD /* 594 */ MCD_OPC_FilterValue, 1, 157, 8, // Skip to: 2803 /* 598 */ MCD_OPC_CheckPredicate, 48, 153, 8, // Skip to: 2803 /* 602 */ MCD_OPC_Decode, 168, 6, 196, 2, // Opcode: VFNMSD /* 607 */ MCD_OPC_FilterValue, 1, 144, 8, // Skip to: 2803 /* 611 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 614 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 647 /* 618 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 621 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 634 /* 625 */ MCD_OPC_CheckPredicate, 20, 126, 8, // Skip to: 2803 /* 629 */ MCD_OPC_Decode, 161, 11, 194, 2, // Opcode: VNMLAS /* 634 */ MCD_OPC_FilterValue, 1, 117, 8, // Skip to: 2803 /* 638 */ MCD_OPC_CheckPredicate, 47, 113, 8, // Skip to: 2803 /* 642 */ MCD_OPC_Decode, 167, 6, 194, 2, // Opcode: VFNMAS /* 647 */ MCD_OPC_FilterValue, 11, 104, 8, // Skip to: 2803 /* 651 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ... /* 654 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 667 /* 658 */ MCD_OPC_CheckPredicate, 46, 93, 8, // Skip to: 2803 /* 662 */ MCD_OPC_Decode, 160, 11, 196, 2, // Opcode: VNMLAD /* 667 */ MCD_OPC_FilterValue, 1, 84, 8, // Skip to: 2803 /* 671 */ MCD_OPC_CheckPredicate, 48, 80, 8, // Skip to: 2803 /* 675 */ MCD_OPC_Decode, 166, 6, 196, 2, // Opcode: VFNMAD /* 680 */ MCD_OPC_FilterValue, 1, 71, 8, // Skip to: 2803 /* 684 */ MCD_OPC_CheckPredicate, 20, 67, 8, // Skip to: 2803 /* 688 */ MCD_OPC_CheckField, 22, 2, 0, 61, 8, // Skip to: 2803 /* 694 */ MCD_OPC_CheckField, 8, 4, 10, 55, 8, // Skip to: 2803 /* 700 */ MCD_OPC_CheckField, 5, 2, 0, 49, 8, // Skip to: 2803 /* 706 */ MCD_OPC_CheckField, 0, 4, 0, 43, 8, // Skip to: 2803 /* 712 */ MCD_OPC_Decode, 214, 10, 201, 2, // Opcode: VMOVRS /* 717 */ MCD_OPC_FilterValue, 2, 172, 1, // Skip to: 1149 /* 721 */ MCD_OPC_ExtractField, 23, 5, // Inst{27-23} ... /* 724 */ MCD_OPC_FilterValue, 25, 54, 0, // Skip to: 782 /* 728 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 731 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 744 /* 735 */ MCD_OPC_CheckPredicate, 20, 16, 8, // Skip to: 2803 /* 739 */ MCD_OPC_Decode, 137, 17, 202, 2, // Opcode: VSTMSIA_UPD /* 744 */ MCD_OPC_FilterValue, 11, 7, 8, // Skip to: 2803 /* 748 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 751 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 764 /* 755 */ MCD_OPC_CheckPredicate, 20, 252, 7, // Skip to: 2803 /* 759 */ MCD_OPC_Decode, 133, 17, 203, 2, // Opcode: VSTMDIA_UPD /* 764 */ MCD_OPC_FilterValue, 1, 243, 7, // Skip to: 2803 /* 768 */ MCD_OPC_CheckPredicate, 20, 239, 7, // Skip to: 2803 /* 772 */ MCD_OPC_CheckField, 22, 1, 0, 233, 7, // Skip to: 2803 /* 778 */ MCD_OPC_Decode, 113, 204, 2, // Opcode: FSTMXIA_UPD /* 782 */ MCD_OPC_FilterValue, 26, 54, 0, // Skip to: 840 /* 786 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 789 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 802 /* 793 */ MCD_OPC_CheckPredicate, 20, 214, 7, // Skip to: 2803 /* 797 */ MCD_OPC_Decode, 135, 17, 202, 2, // Opcode: VSTMSDB_UPD /* 802 */ MCD_OPC_FilterValue, 11, 205, 7, // Skip to: 2803 /* 806 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 809 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 822 /* 813 */ MCD_OPC_CheckPredicate, 20, 194, 7, // Skip to: 2803 /* 817 */ MCD_OPC_Decode, 131, 17, 203, 2, // Opcode: VSTMDDB_UPD /* 822 */ MCD_OPC_FilterValue, 1, 185, 7, // Skip to: 2803 /* 826 */ MCD_OPC_CheckPredicate, 20, 181, 7, // Skip to: 2803 /* 830 */ MCD_OPC_CheckField, 22, 1, 0, 175, 7, // Skip to: 2803 /* 836 */ MCD_OPC_Decode, 111, 204, 2, // Opcode: FSTMXDB_UPD /* 840 */ MCD_OPC_FilterValue, 28, 93, 0, // Skip to: 937 /* 844 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 847 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 892 /* 851 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 854 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 873 /* 858 */ MCD_OPC_CheckPredicate, 20, 149, 7, // Skip to: 2803 /* 862 */ MCD_OPC_CheckField, 4, 1, 0, 143, 7, // Skip to: 2803 /* 868 */ MCD_OPC_Decode, 255, 10, 195, 2, // Opcode: VMULS /* 873 */ MCD_OPC_FilterValue, 11, 134, 7, // Skip to: 2803 /* 877 */ MCD_OPC_CheckPredicate, 46, 130, 7, // Skip to: 2803 /* 881 */ MCD_OPC_CheckField, 4, 1, 0, 124, 7, // Skip to: 2803 /* 887 */ MCD_OPC_Decode, 242, 10, 197, 2, // Opcode: VMULD /* 892 */ MCD_OPC_FilterValue, 1, 115, 7, // Skip to: 2803 /* 896 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 899 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 918 /* 903 */ MCD_OPC_CheckPredicate, 20, 104, 7, // Skip to: 2803 /* 907 */ MCD_OPC_CheckField, 4, 1, 0, 98, 7, // Skip to: 2803 /* 913 */ MCD_OPC_Decode, 165, 11, 195, 2, // Opcode: VNMULS /* 918 */ MCD_OPC_FilterValue, 11, 89, 7, // Skip to: 2803 /* 922 */ MCD_OPC_CheckPredicate, 46, 85, 7, // Skip to: 2803 /* 926 */ MCD_OPC_CheckField, 4, 1, 0, 79, 7, // Skip to: 2803 /* 932 */ MCD_OPC_Decode, 164, 11, 197, 2, // Opcode: VNMULD /* 937 */ MCD_OPC_FilterValue, 29, 70, 7, // Skip to: 2803 /* 941 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 944 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 1017 /* 948 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 951 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 984 /* 955 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 958 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 971 /* 962 */ MCD_OPC_CheckPredicate, 47, 45, 7, // Skip to: 2803 /* 966 */ MCD_OPC_Decode, 159, 6, 194, 2, // Opcode: VFMAS /* 971 */ MCD_OPC_FilterValue, 11, 36, 7, // Skip to: 2803 /* 975 */ MCD_OPC_CheckPredicate, 48, 32, 7, // Skip to: 2803 /* 979 */ MCD_OPC_Decode, 158, 6, 196, 2, // Opcode: VFMAD /* 984 */ MCD_OPC_FilterValue, 1, 23, 7, // Skip to: 2803 /* 988 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 991 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 1004 /* 995 */ MCD_OPC_CheckPredicate, 47, 12, 7, // Skip to: 2803 /* 999 */ MCD_OPC_Decode, 163, 6, 194, 2, // Opcode: VFMSS /* 1004 */ MCD_OPC_FilterValue, 11, 3, 7, // Skip to: 2803 /* 1008 */ MCD_OPC_CheckPredicate, 48, 255, 6, // Skip to: 2803 /* 1012 */ MCD_OPC_Decode, 162, 6, 196, 2, // Opcode: VFMSD /* 1017 */ MCD_OPC_FilterValue, 1, 246, 6, // Skip to: 2803 /* 1021 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 1024 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 1049 /* 1028 */ MCD_OPC_CheckPredicate, 20, 235, 6, // Skip to: 2803 /* 1032 */ MCD_OPC_CheckField, 22, 1, 1, 229, 6, // Skip to: 2803 /* 1038 */ MCD_OPC_CheckField, 7, 5, 20, 223, 6, // Skip to: 2803 /* 1044 */ MCD_OPC_Decode, 241, 10, 205, 2, // Opcode: VMSR_FPSID /* 1049 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 1074 /* 1053 */ MCD_OPC_CheckPredicate, 20, 210, 6, // Skip to: 2803 /* 1057 */ MCD_OPC_CheckField, 22, 1, 1, 204, 6, // Skip to: 2803 /* 1063 */ MCD_OPC_CheckField, 7, 5, 20, 198, 6, // Skip to: 2803 /* 1069 */ MCD_OPC_Decode, 237, 10, 205, 2, // Opcode: VMSR /* 1074 */ MCD_OPC_FilterValue, 8, 21, 0, // Skip to: 1099 /* 1078 */ MCD_OPC_CheckPredicate, 20, 185, 6, // Skip to: 2803 /* 1082 */ MCD_OPC_CheckField, 22, 1, 1, 179, 6, // Skip to: 2803 /* 1088 */ MCD_OPC_CheckField, 7, 5, 20, 173, 6, // Skip to: 2803 /* 1094 */ MCD_OPC_Decode, 238, 10, 205, 2, // Opcode: VMSR_FPEXC /* 1099 */ MCD_OPC_FilterValue, 9, 21, 0, // Skip to: 1124 /* 1103 */ MCD_OPC_CheckPredicate, 20, 160, 6, // Skip to: 2803 /* 1107 */ MCD_OPC_CheckField, 22, 1, 1, 154, 6, // Skip to: 2803 /* 1113 */ MCD_OPC_CheckField, 7, 5, 20, 148, 6, // Skip to: 2803 /* 1119 */ MCD_OPC_Decode, 239, 10, 205, 2, // Opcode: VMSR_FPINST /* 1124 */ MCD_OPC_FilterValue, 10, 139, 6, // Skip to: 2803 /* 1128 */ MCD_OPC_CheckPredicate, 20, 135, 6, // Skip to: 2803 /* 1132 */ MCD_OPC_CheckField, 22, 1, 1, 129, 6, // Skip to: 2803 /* 1138 */ MCD_OPC_CheckField, 7, 5, 20, 123, 6, // Skip to: 2803 /* 1144 */ MCD_OPC_Decode, 240, 10, 205, 2, // Opcode: VMSR_FPINST2 /* 1149 */ MCD_OPC_FilterValue, 3, 114, 6, // Skip to: 2803 /* 1153 */ MCD_OPC_ExtractField, 23, 5, // Inst{27-23} ... /* 1156 */ MCD_OPC_FilterValue, 25, 54, 0, // Skip to: 1214 /* 1160 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1163 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 1176 /* 1167 */ MCD_OPC_CheckPredicate, 20, 96, 6, // Skip to: 2803 /* 1171 */ MCD_OPC_Decode, 235, 9, 202, 2, // Opcode: VLDMSIA_UPD /* 1176 */ MCD_OPC_FilterValue, 11, 87, 6, // Skip to: 2803 /* 1180 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 1183 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1196 /* 1187 */ MCD_OPC_CheckPredicate, 20, 76, 6, // Skip to: 2803 /* 1191 */ MCD_OPC_Decode, 231, 9, 203, 2, // Opcode: VLDMDIA_UPD /* 1196 */ MCD_OPC_FilterValue, 1, 67, 6, // Skip to: 2803 /* 1200 */ MCD_OPC_CheckPredicate, 20, 63, 6, // Skip to: 2803 /* 1204 */ MCD_OPC_CheckField, 22, 1, 0, 57, 6, // Skip to: 2803 /* 1210 */ MCD_OPC_Decode, 109, 204, 2, // Opcode: FLDMXIA_UPD /* 1214 */ MCD_OPC_FilterValue, 26, 54, 0, // Skip to: 1272 /* 1218 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1221 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 1234 /* 1225 */ MCD_OPC_CheckPredicate, 20, 38, 6, // Skip to: 2803 /* 1229 */ MCD_OPC_Decode, 233, 9, 202, 2, // Opcode: VLDMSDB_UPD /* 1234 */ MCD_OPC_FilterValue, 11, 29, 6, // Skip to: 2803 /* 1238 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 1241 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1254 /* 1245 */ MCD_OPC_CheckPredicate, 20, 18, 6, // Skip to: 2803 /* 1249 */ MCD_OPC_Decode, 229, 9, 203, 2, // Opcode: VLDMDDB_UPD /* 1254 */ MCD_OPC_FilterValue, 1, 9, 6, // Skip to: 2803 /* 1258 */ MCD_OPC_CheckPredicate, 20, 5, 6, // Skip to: 2803 /* 1262 */ MCD_OPC_CheckField, 22, 1, 0, 255, 5, // Skip to: 2803 /* 1268 */ MCD_OPC_Decode, 107, 204, 2, // Opcode: FLDMXDB_UPD /* 1272 */ MCD_OPC_FilterValue, 28, 93, 0, // Skip to: 1369 /* 1276 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 1279 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 1324 /* 1283 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1286 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 1305 /* 1290 */ MCD_OPC_CheckPredicate, 20, 229, 5, // Skip to: 2803 /* 1294 */ MCD_OPC_CheckField, 4, 1, 0, 223, 5, // Skip to: 2803 /* 1300 */ MCD_OPC_Decode, 202, 4, 195, 2, // Opcode: VADDS /* 1305 */ MCD_OPC_FilterValue, 11, 214, 5, // Skip to: 2803 /* 1309 */ MCD_OPC_CheckPredicate, 46, 210, 5, // Skip to: 2803 /* 1313 */ MCD_OPC_CheckField, 4, 1, 0, 204, 5, // Skip to: 2803 /* 1319 */ MCD_OPC_Decode, 192, 4, 197, 2, // Opcode: VADDD /* 1324 */ MCD_OPC_FilterValue, 1, 195, 5, // Skip to: 2803 /* 1328 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 1331 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 1350 /* 1335 */ MCD_OPC_CheckPredicate, 20, 184, 5, // Skip to: 2803 /* 1339 */ MCD_OPC_CheckField, 4, 1, 0, 178, 5, // Skip to: 2803 /* 1345 */ MCD_OPC_Decode, 150, 17, 195, 2, // Opcode: VSUBS /* 1350 */ MCD_OPC_FilterValue, 11, 169, 5, // Skip to: 2803 /* 1354 */ MCD_OPC_CheckPredicate, 46, 165, 5, // Skip to: 2803 /* 1358 */ MCD_OPC_CheckField, 4, 1, 0, 159, 5, // Skip to: 2803 /* 1364 */ MCD_OPC_Decode, 140, 17, 197, 2, // Opcode: VSUBD /* 1369 */ MCD_OPC_FilterValue, 29, 150, 5, // Skip to: 2803 /* 1373 */ MCD_OPC_ExtractField, 6, 6, // Inst{11-6} ... /* 1376 */ MCD_OPC_FilterValue, 40, 237, 0, // Skip to: 1617 /* 1380 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 1383 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1395 /* 1387 */ MCD_OPC_CheckPredicate, 49, 132, 5, // Skip to: 2803 /* 1391 */ MCD_OPC_Decode, 106, 206, 2, // Opcode: FCONSTS /* 1395 */ MCD_OPC_FilterValue, 1, 124, 5, // Skip to: 2803 /* 1399 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 1402 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 1427 /* 1406 */ MCD_OPC_CheckPredicate, 20, 113, 5, // Skip to: 2803 /* 1410 */ MCD_OPC_CheckField, 22, 1, 1, 107, 5, // Skip to: 2803 /* 1416 */ MCD_OPC_CheckField, 0, 4, 0, 101, 5, // Skip to: 2803 /* 1422 */ MCD_OPC_Decode, 233, 10, 205, 2, // Opcode: VMRS_FPSID /* 1427 */ MCD_OPC_FilterValue, 1, 36, 0, // Skip to: 1467 /* 1431 */ MCD_OPC_ExtractField, 0, 4, // Inst{3-0} ... /* 1434 */ MCD_OPC_FilterValue, 0, 85, 5, // Skip to: 2803 /* 1438 */ MCD_OPC_ExtractField, 22, 1, // Inst{22} ... /* 1441 */ MCD_OPC_FilterValue, 1, 78, 5, // Skip to: 2803 /* 1445 */ MCD_OPC_CheckPredicate, 20, 9, 0, // Skip to: 1458 /* 1449 */ MCD_OPC_CheckField, 12, 4, 15, 3, 0, // Skip to: 1458 /* 1455 */ MCD_OPC_Decode, 110, 28, // Opcode: FMSTAT /* 1458 */ MCD_OPC_CheckPredicate, 20, 61, 5, // Skip to: 2803 /* 1462 */ MCD_OPC_Decode, 229, 10, 205, 2, // Opcode: VMRS /* 1467 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 1492 /* 1471 */ MCD_OPC_CheckPredicate, 50, 48, 5, // Skip to: 2803 /* 1475 */ MCD_OPC_CheckField, 22, 1, 1, 42, 5, // Skip to: 2803 /* 1481 */ MCD_OPC_CheckField, 0, 4, 0, 36, 5, // Skip to: 2803 /* 1487 */ MCD_OPC_Decode, 236, 10, 205, 2, // Opcode: VMRS_MVFR2 /* 1492 */ MCD_OPC_FilterValue, 6, 21, 0, // Skip to: 1517 /* 1496 */ MCD_OPC_CheckPredicate, 20, 23, 5, // Skip to: 2803 /* 1500 */ MCD_OPC_CheckField, 22, 1, 1, 17, 5, // Skip to: 2803 /* 1506 */ MCD_OPC_CheckField, 0, 4, 0, 11, 5, // Skip to: 2803 /* 1512 */ MCD_OPC_Decode, 235, 10, 205, 2, // Opcode: VMRS_MVFR1 /* 1517 */ MCD_OPC_FilterValue, 7, 21, 0, // Skip to: 1542 /* 1521 */ MCD_OPC_CheckPredicate, 20, 254, 4, // Skip to: 2803 /* 1525 */ MCD_OPC_CheckField, 22, 1, 1, 248, 4, // Skip to: 2803 /* 1531 */ MCD_OPC_CheckField, 0, 4, 0, 242, 4, // Skip to: 2803 /* 1537 */ MCD_OPC_Decode, 234, 10, 205, 2, // Opcode: VMRS_MVFR0 /* 1542 */ MCD_OPC_FilterValue, 8, 21, 0, // Skip to: 1567 /* 1546 */ MCD_OPC_CheckPredicate, 20, 229, 4, // Skip to: 2803 /* 1550 */ MCD_OPC_CheckField, 22, 1, 1, 223, 4, // Skip to: 2803 /* 1556 */ MCD_OPC_CheckField, 0, 4, 0, 217, 4, // Skip to: 2803 /* 1562 */ MCD_OPC_Decode, 230, 10, 205, 2, // Opcode: VMRS_FPEXC /* 1567 */ MCD_OPC_FilterValue, 9, 21, 0, // Skip to: 1592 /* 1571 */ MCD_OPC_CheckPredicate, 20, 204, 4, // Skip to: 2803 /* 1575 */ MCD_OPC_CheckField, 22, 1, 1, 198, 4, // Skip to: 2803 /* 1581 */ MCD_OPC_CheckField, 0, 4, 0, 192, 4, // Skip to: 2803 /* 1587 */ MCD_OPC_Decode, 231, 10, 205, 2, // Opcode: VMRS_FPINST /* 1592 */ MCD_OPC_FilterValue, 10, 183, 4, // Skip to: 2803 /* 1596 */ MCD_OPC_CheckPredicate, 20, 179, 4, // Skip to: 2803 /* 1600 */ MCD_OPC_CheckField, 22, 1, 1, 173, 4, // Skip to: 2803 /* 1606 */ MCD_OPC_CheckField, 0, 4, 0, 167, 4, // Skip to: 2803 /* 1612 */ MCD_OPC_Decode, 232, 10, 205, 2, // Opcode: VMRS_FPINST2 /* 1617 */ MCD_OPC_FilterValue, 41, 32, 1, // Skip to: 1909 /* 1621 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 1624 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 1643 /* 1628 */ MCD_OPC_CheckPredicate, 20, 147, 4, // Skip to: 2803 /* 1632 */ MCD_OPC_CheckField, 4, 1, 0, 141, 4, // Skip to: 2803 /* 1638 */ MCD_OPC_Decode, 215, 10, 207, 2, // Opcode: VMOVS /* 1643 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 1662 /* 1647 */ MCD_OPC_CheckPredicate, 20, 128, 4, // Skip to: 2803 /* 1651 */ MCD_OPC_CheckField, 4, 1, 0, 122, 4, // Skip to: 2803 /* 1657 */ MCD_OPC_Decode, 151, 11, 207, 2, // Opcode: VNEGS /* 1662 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 1681 /* 1666 */ MCD_OPC_CheckPredicate, 20, 109, 4, // Skip to: 2803 /* 1670 */ MCD_OPC_CheckField, 4, 1, 0, 103, 4, // Skip to: 2803 /* 1676 */ MCD_OPC_Decode, 213, 5, 207, 2, // Opcode: VCVTBHS /* 1681 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 1700 /* 1685 */ MCD_OPC_CheckPredicate, 20, 90, 4, // Skip to: 2803 /* 1689 */ MCD_OPC_CheckField, 4, 1, 0, 84, 4, // Skip to: 2803 /* 1695 */ MCD_OPC_Decode, 214, 5, 207, 2, // Opcode: VCVTBSH /* 1700 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 1719 /* 1704 */ MCD_OPC_CheckPredicate, 20, 71, 4, // Skip to: 2803 /* 1708 */ MCD_OPC_CheckField, 4, 1, 0, 65, 4, // Skip to: 2803 /* 1714 */ MCD_OPC_Decode, 198, 5, 207, 2, // Opcode: VCMPS /* 1719 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 1738 /* 1723 */ MCD_OPC_CheckPredicate, 20, 52, 4, // Skip to: 2803 /* 1727 */ MCD_OPC_CheckField, 0, 6, 0, 46, 4, // Skip to: 2803 /* 1733 */ MCD_OPC_Decode, 200, 5, 208, 2, // Opcode: VCMPZS /* 1738 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 1757 /* 1742 */ MCD_OPC_CheckPredicate, 50, 33, 4, // Skip to: 2803 /* 1746 */ MCD_OPC_CheckField, 4, 1, 0, 27, 4, // Skip to: 2803 /* 1752 */ MCD_OPC_Decode, 165, 13, 207, 2, // Opcode: VRINTRS /* 1757 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 1776 /* 1761 */ MCD_OPC_CheckPredicate, 50, 14, 4, // Skip to: 2803 /* 1765 */ MCD_OPC_CheckField, 4, 1, 0, 8, 4, // Skip to: 2803 /* 1771 */ MCD_OPC_Decode, 169, 13, 207, 2, // Opcode: VRINTXS /* 1776 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 1795 /* 1780 */ MCD_OPC_CheckPredicate, 20, 251, 3, // Skip to: 2803 /* 1784 */ MCD_OPC_CheckField, 4, 1, 0, 245, 3, // Skip to: 2803 /* 1790 */ MCD_OPC_Decode, 212, 17, 207, 2, // Opcode: VUITOS /* 1795 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 1814 /* 1799 */ MCD_OPC_CheckPredicate, 20, 232, 3, // Skip to: 2803 /* 1803 */ MCD_OPC_CheckField, 4, 1, 0, 226, 3, // Skip to: 2803 /* 1809 */ MCD_OPC_Decode, 170, 14, 209, 2, // Opcode: VSHTOS /* 1814 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 1833 /* 1818 */ MCD_OPC_CheckPredicate, 20, 213, 3, // Skip to: 2803 /* 1822 */ MCD_OPC_CheckField, 4, 1, 0, 207, 3, // Skip to: 2803 /* 1828 */ MCD_OPC_Decode, 210, 17, 209, 2, // Opcode: VUHTOS /* 1833 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 1852 /* 1837 */ MCD_OPC_CheckPredicate, 20, 194, 3, // Skip to: 2803 /* 1841 */ MCD_OPC_CheckField, 4, 1, 0, 188, 3, // Skip to: 2803 /* 1847 */ MCD_OPC_Decode, 192, 17, 207, 2, // Opcode: VTOUIRS /* 1852 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 1871 /* 1856 */ MCD_OPC_CheckPredicate, 20, 175, 3, // Skip to: 2803 /* 1860 */ MCD_OPC_CheckField, 4, 1, 0, 169, 3, // Skip to: 2803 /* 1866 */ MCD_OPC_Decode, 184, 17, 207, 2, // Opcode: VTOSIRS /* 1871 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 1890 /* 1875 */ MCD_OPC_CheckPredicate, 20, 156, 3, // Skip to: 2803 /* 1879 */ MCD_OPC_CheckField, 4, 1, 0, 150, 3, // Skip to: 2803 /* 1885 */ MCD_OPC_Decode, 182, 17, 209, 2, // Opcode: VTOSHS /* 1890 */ MCD_OPC_FilterValue, 15, 141, 3, // Skip to: 2803 /* 1894 */ MCD_OPC_CheckPredicate, 20, 137, 3, // Skip to: 2803 /* 1898 */ MCD_OPC_CheckField, 4, 1, 0, 131, 3, // Skip to: 2803 /* 1904 */ MCD_OPC_Decode, 190, 17, 209, 2, // Opcode: VTOUHS /* 1909 */ MCD_OPC_FilterValue, 43, 32, 1, // Skip to: 2201 /* 1913 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 1916 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 1935 /* 1920 */ MCD_OPC_CheckPredicate, 20, 111, 3, // Skip to: 2803 /* 1924 */ MCD_OPC_CheckField, 4, 1, 0, 105, 3, // Skip to: 2803 /* 1930 */ MCD_OPC_Decode, 179, 4, 207, 2, // Opcode: VABSS /* 1935 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 1954 /* 1939 */ MCD_OPC_CheckPredicate, 20, 92, 3, // Skip to: 2803 /* 1943 */ MCD_OPC_CheckField, 4, 1, 0, 86, 3, // Skip to: 2803 /* 1949 */ MCD_OPC_Decode, 184, 14, 207, 2, // Opcode: VSQRTS /* 1954 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 1973 /* 1958 */ MCD_OPC_CheckPredicate, 20, 73, 3, // Skip to: 2803 /* 1962 */ MCD_OPC_CheckField, 4, 1, 0, 67, 3, // Skip to: 2803 /* 1968 */ MCD_OPC_Decode, 243, 5, 207, 2, // Opcode: VCVTTHS /* 1973 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 1992 /* 1977 */ MCD_OPC_CheckPredicate, 20, 54, 3, // Skip to: 2803 /* 1981 */ MCD_OPC_CheckField, 4, 1, 0, 48, 3, // Skip to: 2803 /* 1987 */ MCD_OPC_Decode, 244, 5, 207, 2, // Opcode: VCVTTSH /* 1992 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 2011 /* 1996 */ MCD_OPC_CheckPredicate, 20, 35, 3, // Skip to: 2803 /* 2000 */ MCD_OPC_CheckField, 4, 1, 0, 29, 3, // Skip to: 2803 /* 2006 */ MCD_OPC_Decode, 195, 5, 207, 2, // Opcode: VCMPES /* 2011 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 2030 /* 2015 */ MCD_OPC_CheckPredicate, 20, 16, 3, // Skip to: 2803 /* 2019 */ MCD_OPC_CheckField, 0, 6, 0, 10, 3, // Skip to: 2803 /* 2025 */ MCD_OPC_Decode, 197, 5, 208, 2, // Opcode: VCMPEZS /* 2030 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 2049 /* 2034 */ MCD_OPC_CheckPredicate, 50, 253, 2, // Skip to: 2803 /* 2038 */ MCD_OPC_CheckField, 4, 1, 0, 247, 2, // Skip to: 2803 /* 2044 */ MCD_OPC_Decode, 173, 13, 207, 2, // Opcode: VRINTZS /* 2049 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 2068 /* 2053 */ MCD_OPC_CheckPredicate, 46, 234, 2, // Skip to: 2803 /* 2057 */ MCD_OPC_CheckField, 4, 1, 0, 228, 2, // Skip to: 2803 /* 2063 */ MCD_OPC_Decode, 215, 5, 210, 2, // Opcode: VCVTDS /* 2068 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 2087 /* 2072 */ MCD_OPC_CheckPredicate, 20, 215, 2, // Skip to: 2803 /* 2076 */ MCD_OPC_CheckField, 4, 1, 0, 209, 2, // Skip to: 2803 /* 2082 */ MCD_OPC_Decode, 172, 14, 207, 2, // Opcode: VSITOS /* 2087 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 2106 /* 2091 */ MCD_OPC_CheckPredicate, 20, 196, 2, // Skip to: 2803 /* 2095 */ MCD_OPC_CheckField, 4, 1, 0, 190, 2, // Skip to: 2803 /* 2101 */ MCD_OPC_Decode, 182, 14, 209, 2, // Opcode: VSLTOS /* 2106 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 2125 /* 2110 */ MCD_OPC_CheckPredicate, 20, 177, 2, // Skip to: 2803 /* 2114 */ MCD_OPC_CheckField, 4, 1, 0, 171, 2, // Skip to: 2803 /* 2120 */ MCD_OPC_Decode, 214, 17, 209, 2, // Opcode: VULTOS /* 2125 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 2144 /* 2129 */ MCD_OPC_CheckPredicate, 20, 158, 2, // Skip to: 2803 /* 2133 */ MCD_OPC_CheckField, 4, 1, 0, 152, 2, // Skip to: 2803 /* 2139 */ MCD_OPC_Decode, 194, 17, 207, 2, // Opcode: VTOUIZS /* 2144 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 2163 /* 2148 */ MCD_OPC_CheckPredicate, 20, 139, 2, // Skip to: 2803 /* 2152 */ MCD_OPC_CheckField, 4, 1, 0, 133, 2, // Skip to: 2803 /* 2158 */ MCD_OPC_Decode, 186, 17, 207, 2, // Opcode: VTOSIZS /* 2163 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 2182 /* 2167 */ MCD_OPC_CheckPredicate, 20, 120, 2, // Skip to: 2803 /* 2171 */ MCD_OPC_CheckField, 4, 1, 0, 114, 2, // Skip to: 2803 /* 2177 */ MCD_OPC_Decode, 188, 17, 209, 2, // Opcode: VTOSLS /* 2182 */ MCD_OPC_FilterValue, 15, 105, 2, // Skip to: 2803 /* 2186 */ MCD_OPC_CheckPredicate, 20, 101, 2, // Skip to: 2803 /* 2190 */ MCD_OPC_CheckField, 4, 1, 0, 95, 2, // Skip to: 2803 /* 2196 */ MCD_OPC_Decode, 196, 17, 209, 2, // Opcode: VTOULS /* 2201 */ MCD_OPC_FilterValue, 44, 14, 0, // Skip to: 2219 /* 2205 */ MCD_OPC_CheckPredicate, 51, 82, 2, // Skip to: 2803 /* 2209 */ MCD_OPC_CheckField, 4, 2, 0, 76, 2, // Skip to: 2803 /* 2215 */ MCD_OPC_Decode, 105, 211, 2, // Opcode: FCONSTD /* 2219 */ MCD_OPC_FilterValue, 45, 32, 1, // Skip to: 2511 /* 2223 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 2226 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 2245 /* 2230 */ MCD_OPC_CheckPredicate, 46, 57, 2, // Skip to: 2803 /* 2234 */ MCD_OPC_CheckField, 4, 1, 0, 51, 2, // Skip to: 2803 /* 2240 */ MCD_OPC_Decode, 198, 10, 212, 2, // Opcode: VMOVD /* 2245 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 2264 /* 2249 */ MCD_OPC_CheckPredicate, 46, 38, 2, // Skip to: 2803 /* 2253 */ MCD_OPC_CheckField, 4, 1, 0, 32, 2, // Skip to: 2803 /* 2259 */ MCD_OPC_Decode, 150, 11, 212, 2, // Opcode: VNEGD /* 2264 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 2283 /* 2268 */ MCD_OPC_CheckPredicate, 52, 19, 2, // Skip to: 2803 /* 2272 */ MCD_OPC_CheckField, 4, 1, 0, 13, 2, // Skip to: 2803 /* 2278 */ MCD_OPC_Decode, 212, 5, 210, 2, // Opcode: VCVTBHD /* 2283 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 2302 /* 2287 */ MCD_OPC_CheckPredicate, 52, 0, 2, // Skip to: 2803 /* 2291 */ MCD_OPC_CheckField, 4, 1, 0, 250, 1, // Skip to: 2803 /* 2297 */ MCD_OPC_Decode, 211, 5, 213, 2, // Opcode: VCVTBDH /* 2302 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 2321 /* 2306 */ MCD_OPC_CheckPredicate, 46, 237, 1, // Skip to: 2803 /* 2310 */ MCD_OPC_CheckField, 4, 1, 0, 231, 1, // Skip to: 2803 /* 2316 */ MCD_OPC_Decode, 193, 5, 212, 2, // Opcode: VCMPD /* 2321 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 2340 /* 2325 */ MCD_OPC_CheckPredicate, 46, 218, 1, // Skip to: 2803 /* 2329 */ MCD_OPC_CheckField, 0, 6, 0, 212, 1, // Skip to: 2803 /* 2335 */ MCD_OPC_Decode, 199, 5, 214, 2, // Opcode: VCMPZD /* 2340 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 2359 /* 2344 */ MCD_OPC_CheckPredicate, 52, 199, 1, // Skip to: 2803 /* 2348 */ MCD_OPC_CheckField, 4, 1, 0, 193, 1, // Skip to: 2803 /* 2354 */ MCD_OPC_Decode, 164, 13, 212, 2, // Opcode: VRINTRD /* 2359 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 2378 /* 2363 */ MCD_OPC_CheckPredicate, 52, 180, 1, // Skip to: 2803 /* 2367 */ MCD_OPC_CheckField, 4, 1, 0, 174, 1, // Skip to: 2803 /* 2373 */ MCD_OPC_Decode, 166, 13, 212, 2, // Opcode: VRINTXD /* 2378 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 2397 /* 2382 */ MCD_OPC_CheckPredicate, 46, 161, 1, // Skip to: 2803 /* 2386 */ MCD_OPC_CheckField, 4, 1, 0, 155, 1, // Skip to: 2803 /* 2392 */ MCD_OPC_Decode, 211, 17, 210, 2, // Opcode: VUITOD /* 2397 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 2416 /* 2401 */ MCD_OPC_CheckPredicate, 46, 142, 1, // Skip to: 2803 /* 2405 */ MCD_OPC_CheckField, 4, 1, 0, 136, 1, // Skip to: 2803 /* 2411 */ MCD_OPC_Decode, 169, 14, 215, 2, // Opcode: VSHTOD /* 2416 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 2435 /* 2420 */ MCD_OPC_CheckPredicate, 46, 123, 1, // Skip to: 2803 /* 2424 */ MCD_OPC_CheckField, 4, 1, 0, 117, 1, // Skip to: 2803 /* 2430 */ MCD_OPC_Decode, 209, 17, 215, 2, // Opcode: VUHTOD /* 2435 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 2454 /* 2439 */ MCD_OPC_CheckPredicate, 46, 104, 1, // Skip to: 2803 /* 2443 */ MCD_OPC_CheckField, 4, 1, 0, 98, 1, // Skip to: 2803 /* 2449 */ MCD_OPC_Decode, 191, 17, 213, 2, // Opcode: VTOUIRD /* 2454 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 2473 /* 2458 */ MCD_OPC_CheckPredicate, 46, 85, 1, // Skip to: 2803 /* 2462 */ MCD_OPC_CheckField, 4, 1, 0, 79, 1, // Skip to: 2803 /* 2468 */ MCD_OPC_Decode, 183, 17, 213, 2, // Opcode: VTOSIRD /* 2473 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 2492 /* 2477 */ MCD_OPC_CheckPredicate, 46, 66, 1, // Skip to: 2803 /* 2481 */ MCD_OPC_CheckField, 4, 1, 0, 60, 1, // Skip to: 2803 /* 2487 */ MCD_OPC_Decode, 181, 17, 215, 2, // Opcode: VTOSHD /* 2492 */ MCD_OPC_FilterValue, 15, 51, 1, // Skip to: 2803 /* 2496 */ MCD_OPC_CheckPredicate, 46, 47, 1, // Skip to: 2803 /* 2500 */ MCD_OPC_CheckField, 4, 1, 0, 41, 1, // Skip to: 2803 /* 2506 */ MCD_OPC_Decode, 189, 17, 215, 2, // Opcode: VTOUHD /* 2511 */ MCD_OPC_FilterValue, 47, 32, 1, // Skip to: 2803 /* 2515 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 2518 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 2537 /* 2522 */ MCD_OPC_CheckPredicate, 46, 21, 1, // Skip to: 2803 /* 2526 */ MCD_OPC_CheckField, 4, 1, 0, 15, 1, // Skip to: 2803 /* 2532 */ MCD_OPC_Decode, 178, 4, 212, 2, // Opcode: VABSD /* 2537 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 2556 /* 2541 */ MCD_OPC_CheckPredicate, 46, 2, 1, // Skip to: 2803 /* 2545 */ MCD_OPC_CheckField, 4, 1, 0, 252, 0, // Skip to: 2803 /* 2551 */ MCD_OPC_Decode, 183, 14, 212, 2, // Opcode: VSQRTD /* 2556 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 2575 /* 2560 */ MCD_OPC_CheckPredicate, 52, 239, 0, // Skip to: 2803 /* 2564 */ MCD_OPC_CheckField, 4, 1, 0, 233, 0, // Skip to: 2803 /* 2570 */ MCD_OPC_Decode, 242, 5, 210, 2, // Opcode: VCVTTHD /* 2575 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 2594 /* 2579 */ MCD_OPC_CheckPredicate, 52, 220, 0, // Skip to: 2803 /* 2583 */ MCD_OPC_CheckField, 4, 1, 0, 214, 0, // Skip to: 2803 /* 2589 */ MCD_OPC_Decode, 241, 5, 213, 2, // Opcode: VCVTTDH /* 2594 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 2613 /* 2598 */ MCD_OPC_CheckPredicate, 46, 201, 0, // Skip to: 2803 /* 2602 */ MCD_OPC_CheckField, 4, 1, 0, 195, 0, // Skip to: 2803 /* 2608 */ MCD_OPC_Decode, 194, 5, 212, 2, // Opcode: VCMPED /* 2613 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 2632 /* 2617 */ MCD_OPC_CheckPredicate, 46, 182, 0, // Skip to: 2803 /* 2621 */ MCD_OPC_CheckField, 0, 6, 0, 176, 0, // Skip to: 2803 /* 2627 */ MCD_OPC_Decode, 196, 5, 214, 2, // Opcode: VCMPEZD /* 2632 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 2651 /* 2636 */ MCD_OPC_CheckPredicate, 52, 163, 0, // Skip to: 2803 /* 2640 */ MCD_OPC_CheckField, 4, 1, 0, 157, 0, // Skip to: 2803 /* 2646 */ MCD_OPC_Decode, 170, 13, 212, 2, // Opcode: VRINTZD /* 2651 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 2670 /* 2655 */ MCD_OPC_CheckPredicate, 46, 144, 0, // Skip to: 2803 /* 2659 */ MCD_OPC_CheckField, 4, 1, 0, 138, 0, // Skip to: 2803 /* 2665 */ MCD_OPC_Decode, 240, 5, 213, 2, // Opcode: VCVTSD /* 2670 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 2689 /* 2674 */ MCD_OPC_CheckPredicate, 46, 125, 0, // Skip to: 2803 /* 2678 */ MCD_OPC_CheckField, 4, 1, 0, 119, 0, // Skip to: 2803 /* 2684 */ MCD_OPC_Decode, 171, 14, 210, 2, // Opcode: VSITOD /* 2689 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 2708 /* 2693 */ MCD_OPC_CheckPredicate, 46, 106, 0, // Skip to: 2803 /* 2697 */ MCD_OPC_CheckField, 4, 1, 0, 100, 0, // Skip to: 2803 /* 2703 */ MCD_OPC_Decode, 181, 14, 215, 2, // Opcode: VSLTOD /* 2708 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 2727 /* 2712 */ MCD_OPC_CheckPredicate, 46, 87, 0, // Skip to: 2803 /* 2716 */ MCD_OPC_CheckField, 4, 1, 0, 81, 0, // Skip to: 2803 /* 2722 */ MCD_OPC_Decode, 213, 17, 215, 2, // Opcode: VULTOD /* 2727 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 2746 /* 2731 */ MCD_OPC_CheckPredicate, 46, 68, 0, // Skip to: 2803 /* 2735 */ MCD_OPC_CheckField, 4, 1, 0, 62, 0, // Skip to: 2803 /* 2741 */ MCD_OPC_Decode, 193, 17, 213, 2, // Opcode: VTOUIZD /* 2746 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 2765 /* 2750 */ MCD_OPC_CheckPredicate, 46, 49, 0, // Skip to: 2803 /* 2754 */ MCD_OPC_CheckField, 4, 1, 0, 43, 0, // Skip to: 2803 /* 2760 */ MCD_OPC_Decode, 185, 17, 213, 2, // Opcode: VTOSIZD /* 2765 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 2784 /* 2769 */ MCD_OPC_CheckPredicate, 46, 30, 0, // Skip to: 2803 /* 2773 */ MCD_OPC_CheckField, 4, 1, 0, 24, 0, // Skip to: 2803 /* 2779 */ MCD_OPC_Decode, 187, 17, 215, 2, // Opcode: VTOSLD /* 2784 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 2803 /* 2788 */ MCD_OPC_CheckPredicate, 46, 11, 0, // Skip to: 2803 /* 2792 */ MCD_OPC_CheckField, 4, 1, 0, 5, 0, // Skip to: 2803 /* 2798 */ MCD_OPC_Decode, 195, 17, 215, 2, // Opcode: VTOULD /* 2803 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableVFPV832[] = { /* 0 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3 */ MCD_OPC_FilterValue, 0, 160, 0, // Skip to: 167 /* 7 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 10 */ MCD_OPC_FilterValue, 0, 95, 0, // Skip to: 109 /* 14 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 17 */ MCD_OPC_FilterValue, 10, 43, 0, // Skip to: 64 /* 21 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 24 */ MCD_OPC_FilterValue, 252, 3, 15, 0, // Skip to: 44 /* 29 */ MCD_OPC_CheckPredicate, 50, 254, 3, // Skip to: 1055 /* 33 */ MCD_OPC_CheckField, 4, 1, 0, 248, 3, // Skip to: 1055 /* 39 */ MCD_OPC_Decode, 235, 13, 216, 2, // Opcode: VSELEQS /* 44 */ MCD_OPC_FilterValue, 253, 3, 238, 3, // Skip to: 1055 /* 49 */ MCD_OPC_CheckPredicate, 50, 234, 3, // Skip to: 1055 /* 53 */ MCD_OPC_CheckField, 4, 1, 0, 228, 3, // Skip to: 1055 /* 59 */ MCD_OPC_Decode, 241, 9, 216, 2, // Opcode: VMAXNMS /* 64 */ MCD_OPC_FilterValue, 11, 219, 3, // Skip to: 1055 /* 68 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 71 */ MCD_OPC_FilterValue, 252, 3, 14, 0, // Skip to: 90 /* 76 */ MCD_OPC_CheckPredicate, 52, 207, 3, // Skip to: 1055 /* 80 */ MCD_OPC_CheckField, 4, 1, 0, 201, 3, // Skip to: 1055 /* 86 */ MCD_OPC_Decode, 234, 13, 96, // Opcode: VSELEQD /* 90 */ MCD_OPC_FilterValue, 253, 3, 192, 3, // Skip to: 1055 /* 95 */ MCD_OPC_CheckPredicate, 52, 188, 3, // Skip to: 1055 /* 99 */ MCD_OPC_CheckField, 4, 1, 0, 182, 3, // Skip to: 1055 /* 105 */ MCD_OPC_Decode, 238, 9, 96, // Opcode: VMAXNMD /* 109 */ MCD_OPC_FilterValue, 1, 174, 3, // Skip to: 1055 /* 113 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 116 */ MCD_OPC_FilterValue, 10, 22, 0, // Skip to: 142 /* 120 */ MCD_OPC_CheckPredicate, 50, 163, 3, // Skip to: 1055 /* 124 */ MCD_OPC_CheckField, 23, 9, 253, 3, 156, 3, // Skip to: 1055 /* 131 */ MCD_OPC_CheckField, 4, 1, 0, 150, 3, // Skip to: 1055 /* 137 */ MCD_OPC_Decode, 131, 10, 216, 2, // Opcode: VMINNMS /* 142 */ MCD_OPC_FilterValue, 11, 141, 3, // Skip to: 1055 /* 146 */ MCD_OPC_CheckPredicate, 52, 137, 3, // Skip to: 1055 /* 150 */ MCD_OPC_CheckField, 23, 9, 253, 3, 130, 3, // Skip to: 1055 /* 157 */ MCD_OPC_CheckField, 4, 1, 0, 124, 3, // Skip to: 1055 /* 163 */ MCD_OPC_Decode, 128, 10, 96, // Opcode: VMINNMD /* 167 */ MCD_OPC_FilterValue, 1, 66, 0, // Skip to: 237 /* 171 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 174 */ MCD_OPC_FilterValue, 10, 28, 0, // Skip to: 206 /* 178 */ MCD_OPC_CheckPredicate, 50, 105, 3, // Skip to: 1055 /* 182 */ MCD_OPC_CheckField, 23, 9, 252, 3, 98, 3, // Skip to: 1055 /* 189 */ MCD_OPC_CheckField, 6, 1, 0, 92, 3, // Skip to: 1055 /* 195 */ MCD_OPC_CheckField, 4, 1, 0, 86, 3, // Skip to: 1055 /* 201 */ MCD_OPC_Decode, 241, 13, 216, 2, // Opcode: VSELVSS /* 206 */ MCD_OPC_FilterValue, 11, 77, 3, // Skip to: 1055 /* 210 */ MCD_OPC_CheckPredicate, 52, 73, 3, // Skip to: 1055 /* 214 */ MCD_OPC_CheckField, 23, 9, 252, 3, 66, 3, // Skip to: 1055 /* 221 */ MCD_OPC_CheckField, 6, 1, 0, 60, 3, // Skip to: 1055 /* 227 */ MCD_OPC_CheckField, 4, 1, 0, 54, 3, // Skip to: 1055 /* 233 */ MCD_OPC_Decode, 240, 13, 96, // Opcode: VSELVSD /* 237 */ MCD_OPC_FilterValue, 2, 66, 0, // Skip to: 307 /* 241 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 244 */ MCD_OPC_FilterValue, 10, 28, 0, // Skip to: 276 /* 248 */ MCD_OPC_CheckPredicate, 50, 35, 3, // Skip to: 1055 /* 252 */ MCD_OPC_CheckField, 23, 9, 252, 3, 28, 3, // Skip to: 1055 /* 259 */ MCD_OPC_CheckField, 6, 1, 0, 22, 3, // Skip to: 1055 /* 265 */ MCD_OPC_CheckField, 4, 1, 0, 16, 3, // Skip to: 1055 /* 271 */ MCD_OPC_Decode, 237, 13, 216, 2, // Opcode: VSELGES /* 276 */ MCD_OPC_FilterValue, 11, 7, 3, // Skip to: 1055 /* 280 */ MCD_OPC_CheckPredicate, 52, 3, 3, // Skip to: 1055 /* 284 */ MCD_OPC_CheckField, 23, 9, 252, 3, 252, 2, // Skip to: 1055 /* 291 */ MCD_OPC_CheckField, 6, 1, 0, 246, 2, // Skip to: 1055 /* 297 */ MCD_OPC_CheckField, 4, 1, 0, 240, 2, // Skip to: 1055 /* 303 */ MCD_OPC_Decode, 236, 13, 96, // Opcode: VSELGED /* 307 */ MCD_OPC_FilterValue, 3, 232, 2, // Skip to: 1055 /* 311 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 314 */ MCD_OPC_FilterValue, 0, 54, 0, // Skip to: 372 /* 318 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 321 */ MCD_OPC_FilterValue, 10, 22, 0, // Skip to: 347 /* 325 */ MCD_OPC_CheckPredicate, 50, 214, 2, // Skip to: 1055 /* 329 */ MCD_OPC_CheckField, 23, 9, 252, 3, 207, 2, // Skip to: 1055 /* 336 */ MCD_OPC_CheckField, 4, 1, 0, 201, 2, // Skip to: 1055 /* 342 */ MCD_OPC_Decode, 239, 13, 216, 2, // Opcode: VSELGTS /* 347 */ MCD_OPC_FilterValue, 11, 192, 2, // Skip to: 1055 /* 351 */ MCD_OPC_CheckPredicate, 52, 188, 2, // Skip to: 1055 /* 355 */ MCD_OPC_CheckField, 23, 9, 252, 3, 181, 2, // Skip to: 1055 /* 362 */ MCD_OPC_CheckField, 4, 1, 0, 175, 2, // Skip to: 1055 /* 368 */ MCD_OPC_Decode, 238, 13, 96, // Opcode: VSELGTD /* 372 */ MCD_OPC_FilterValue, 1, 167, 2, // Skip to: 1055 /* 376 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 379 */ MCD_OPC_FilterValue, 8, 54, 0, // Skip to: 437 /* 383 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 386 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 412 /* 390 */ MCD_OPC_CheckPredicate, 50, 149, 2, // Skip to: 1055 /* 394 */ MCD_OPC_CheckField, 23, 9, 253, 3, 142, 2, // Skip to: 1055 /* 401 */ MCD_OPC_CheckField, 4, 1, 0, 136, 2, // Skip to: 1055 /* 407 */ MCD_OPC_Decode, 151, 13, 217, 2, // Opcode: VRINTAS /* 412 */ MCD_OPC_FilterValue, 22, 127, 2, // Skip to: 1055 /* 416 */ MCD_OPC_CheckPredicate, 52, 123, 2, // Skip to: 1055 /* 420 */ MCD_OPC_CheckField, 23, 9, 253, 3, 116, 2, // Skip to: 1055 /* 427 */ MCD_OPC_CheckField, 4, 1, 0, 110, 2, // Skip to: 1055 /* 433 */ MCD_OPC_Decode, 148, 13, 125, // Opcode: VRINTAD /* 437 */ MCD_OPC_FilterValue, 9, 54, 0, // Skip to: 495 /* 441 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 444 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 470 /* 448 */ MCD_OPC_CheckPredicate, 50, 91, 2, // Skip to: 1055 /* 452 */ MCD_OPC_CheckField, 23, 9, 253, 3, 84, 2, // Skip to: 1055 /* 459 */ MCD_OPC_CheckField, 4, 1, 0, 78, 2, // Skip to: 1055 /* 465 */ MCD_OPC_Decode, 159, 13, 217, 2, // Opcode: VRINTNS /* 470 */ MCD_OPC_FilterValue, 22, 69, 2, // Skip to: 1055 /* 474 */ MCD_OPC_CheckPredicate, 52, 65, 2, // Skip to: 1055 /* 478 */ MCD_OPC_CheckField, 23, 9, 253, 3, 58, 2, // Skip to: 1055 /* 485 */ MCD_OPC_CheckField, 4, 1, 0, 52, 2, // Skip to: 1055 /* 491 */ MCD_OPC_Decode, 156, 13, 125, // Opcode: VRINTND /* 495 */ MCD_OPC_FilterValue, 10, 54, 0, // Skip to: 553 /* 499 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 502 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 528 /* 506 */ MCD_OPC_CheckPredicate, 50, 33, 2, // Skip to: 1055 /* 510 */ MCD_OPC_CheckField, 23, 9, 253, 3, 26, 2, // Skip to: 1055 /* 517 */ MCD_OPC_CheckField, 4, 1, 0, 20, 2, // Skip to: 1055 /* 523 */ MCD_OPC_Decode, 163, 13, 217, 2, // Opcode: VRINTPS /* 528 */ MCD_OPC_FilterValue, 22, 11, 2, // Skip to: 1055 /* 532 */ MCD_OPC_CheckPredicate, 52, 7, 2, // Skip to: 1055 /* 536 */ MCD_OPC_CheckField, 23, 9, 253, 3, 0, 2, // Skip to: 1055 /* 543 */ MCD_OPC_CheckField, 4, 1, 0, 250, 1, // Skip to: 1055 /* 549 */ MCD_OPC_Decode, 160, 13, 125, // Opcode: VRINTPD /* 553 */ MCD_OPC_FilterValue, 11, 54, 0, // Skip to: 611 /* 557 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 560 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 586 /* 564 */ MCD_OPC_CheckPredicate, 50, 231, 1, // Skip to: 1055 /* 568 */ MCD_OPC_CheckField, 23, 9, 253, 3, 224, 1, // Skip to: 1055 /* 575 */ MCD_OPC_CheckField, 4, 1, 0, 218, 1, // Skip to: 1055 /* 581 */ MCD_OPC_Decode, 155, 13, 217, 2, // Opcode: VRINTMS /* 586 */ MCD_OPC_FilterValue, 22, 209, 1, // Skip to: 1055 /* 590 */ MCD_OPC_CheckPredicate, 52, 205, 1, // Skip to: 1055 /* 594 */ MCD_OPC_CheckField, 23, 9, 253, 3, 198, 1, // Skip to: 1055 /* 601 */ MCD_OPC_CheckField, 4, 1, 0, 192, 1, // Skip to: 1055 /* 607 */ MCD_OPC_Decode, 152, 13, 125, // Opcode: VRINTMD /* 611 */ MCD_OPC_FilterValue, 12, 107, 0, // Skip to: 722 /* 615 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 618 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 644 /* 622 */ MCD_OPC_CheckPredicate, 50, 173, 1, // Skip to: 1055 /* 626 */ MCD_OPC_CheckField, 23, 9, 253, 3, 166, 1, // Skip to: 1055 /* 633 */ MCD_OPC_CheckField, 4, 1, 0, 160, 1, // Skip to: 1055 /* 639 */ MCD_OPC_Decode, 210, 5, 217, 2, // Opcode: VCVTAUS /* 644 */ MCD_OPC_FilterValue, 21, 22, 0, // Skip to: 670 /* 648 */ MCD_OPC_CheckPredicate, 50, 147, 1, // Skip to: 1055 /* 652 */ MCD_OPC_CheckField, 23, 9, 253, 3, 140, 1, // Skip to: 1055 /* 659 */ MCD_OPC_CheckField, 4, 1, 0, 134, 1, // Skip to: 1055 /* 665 */ MCD_OPC_Decode, 208, 5, 217, 2, // Opcode: VCVTASS /* 670 */ MCD_OPC_FilterValue, 22, 22, 0, // Skip to: 696 /* 674 */ MCD_OPC_CheckPredicate, 52, 121, 1, // Skip to: 1055 /* 678 */ MCD_OPC_CheckField, 23, 9, 253, 3, 114, 1, // Skip to: 1055 /* 685 */ MCD_OPC_CheckField, 4, 1, 0, 108, 1, // Skip to: 1055 /* 691 */ MCD_OPC_Decode, 209, 5, 218, 2, // Opcode: VCVTAUD /* 696 */ MCD_OPC_FilterValue, 23, 99, 1, // Skip to: 1055 /* 700 */ MCD_OPC_CheckPredicate, 52, 95, 1, // Skip to: 1055 /* 704 */ MCD_OPC_CheckField, 23, 9, 253, 3, 88, 1, // Skip to: 1055 /* 711 */ MCD_OPC_CheckField, 4, 1, 0, 82, 1, // Skip to: 1055 /* 717 */ MCD_OPC_Decode, 207, 5, 218, 2, // Opcode: VCVTASD /* 722 */ MCD_OPC_FilterValue, 13, 107, 0, // Skip to: 833 /* 726 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 729 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 755 /* 733 */ MCD_OPC_CheckPredicate, 50, 62, 1, // Skip to: 1055 /* 737 */ MCD_OPC_CheckField, 23, 9, 253, 3, 55, 1, // Skip to: 1055 /* 744 */ MCD_OPC_CheckField, 4, 1, 0, 49, 1, // Skip to: 1055 /* 750 */ MCD_OPC_Decode, 231, 5, 217, 2, // Opcode: VCVTNUS /* 755 */ MCD_OPC_FilterValue, 21, 22, 0, // Skip to: 781 /* 759 */ MCD_OPC_CheckPredicate, 50, 36, 1, // Skip to: 1055 /* 763 */ MCD_OPC_CheckField, 23, 9, 253, 3, 29, 1, // Skip to: 1055 /* 770 */ MCD_OPC_CheckField, 4, 1, 0, 23, 1, // Skip to: 1055 /* 776 */ MCD_OPC_Decode, 229, 5, 217, 2, // Opcode: VCVTNSS /* 781 */ MCD_OPC_FilterValue, 22, 22, 0, // Skip to: 807 /* 785 */ MCD_OPC_CheckPredicate, 52, 10, 1, // Skip to: 1055 /* 789 */ MCD_OPC_CheckField, 23, 9, 253, 3, 3, 1, // Skip to: 1055 /* 796 */ MCD_OPC_CheckField, 4, 1, 0, 253, 0, // Skip to: 1055 /* 802 */ MCD_OPC_Decode, 230, 5, 218, 2, // Opcode: VCVTNUD /* 807 */ MCD_OPC_FilterValue, 23, 244, 0, // Skip to: 1055 /* 811 */ MCD_OPC_CheckPredicate, 52, 240, 0, // Skip to: 1055 /* 815 */ MCD_OPC_CheckField, 23, 9, 253, 3, 233, 0, // Skip to: 1055 /* 822 */ MCD_OPC_CheckField, 4, 1, 0, 227, 0, // Skip to: 1055 /* 828 */ MCD_OPC_Decode, 228, 5, 218, 2, // Opcode: VCVTNSD /* 833 */ MCD_OPC_FilterValue, 14, 107, 0, // Skip to: 944 /* 837 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 840 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 866 /* 844 */ MCD_OPC_CheckPredicate, 50, 207, 0, // Skip to: 1055 /* 848 */ MCD_OPC_CheckField, 23, 9, 253, 3, 200, 0, // Skip to: 1055 /* 855 */ MCD_OPC_CheckField, 4, 1, 0, 194, 0, // Skip to: 1055 /* 861 */ MCD_OPC_Decode, 239, 5, 217, 2, // Opcode: VCVTPUS /* 866 */ MCD_OPC_FilterValue, 21, 22, 0, // Skip to: 892 /* 870 */ MCD_OPC_CheckPredicate, 50, 181, 0, // Skip to: 1055 /* 874 */ MCD_OPC_CheckField, 23, 9, 253, 3, 174, 0, // Skip to: 1055 /* 881 */ MCD_OPC_CheckField, 4, 1, 0, 168, 0, // Skip to: 1055 /* 887 */ MCD_OPC_Decode, 237, 5, 217, 2, // Opcode: VCVTPSS /* 892 */ MCD_OPC_FilterValue, 22, 22, 0, // Skip to: 918 /* 896 */ MCD_OPC_CheckPredicate, 52, 155, 0, // Skip to: 1055 /* 900 */ MCD_OPC_CheckField, 23, 9, 253, 3, 148, 0, // Skip to: 1055 /* 907 */ MCD_OPC_CheckField, 4, 1, 0, 142, 0, // Skip to: 1055 /* 913 */ MCD_OPC_Decode, 238, 5, 218, 2, // Opcode: VCVTPUD /* 918 */ MCD_OPC_FilterValue, 23, 133, 0, // Skip to: 1055 /* 922 */ MCD_OPC_CheckPredicate, 52, 129, 0, // Skip to: 1055 /* 926 */ MCD_OPC_CheckField, 23, 9, 253, 3, 122, 0, // Skip to: 1055 /* 933 */ MCD_OPC_CheckField, 4, 1, 0, 116, 0, // Skip to: 1055 /* 939 */ MCD_OPC_Decode, 236, 5, 218, 2, // Opcode: VCVTPSD /* 944 */ MCD_OPC_FilterValue, 15, 107, 0, // Skip to: 1055 /* 948 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 951 */ MCD_OPC_FilterValue, 20, 22, 0, // Skip to: 977 /* 955 */ MCD_OPC_CheckPredicate, 50, 96, 0, // Skip to: 1055 /* 959 */ MCD_OPC_CheckField, 23, 9, 253, 3, 89, 0, // Skip to: 1055 /* 966 */ MCD_OPC_CheckField, 4, 1, 0, 83, 0, // Skip to: 1055 /* 972 */ MCD_OPC_Decode, 223, 5, 217, 2, // Opcode: VCVTMUS /* 977 */ MCD_OPC_FilterValue, 21, 22, 0, // Skip to: 1003 /* 981 */ MCD_OPC_CheckPredicate, 50, 70, 0, // Skip to: 1055 /* 985 */ MCD_OPC_CheckField, 23, 9, 253, 3, 63, 0, // Skip to: 1055 /* 992 */ MCD_OPC_CheckField, 4, 1, 0, 57, 0, // Skip to: 1055 /* 998 */ MCD_OPC_Decode, 221, 5, 217, 2, // Opcode: VCVTMSS /* 1003 */ MCD_OPC_FilterValue, 22, 22, 0, // Skip to: 1029 /* 1007 */ MCD_OPC_CheckPredicate, 52, 44, 0, // Skip to: 1055 /* 1011 */ MCD_OPC_CheckField, 23, 9, 253, 3, 37, 0, // Skip to: 1055 /* 1018 */ MCD_OPC_CheckField, 4, 1, 0, 31, 0, // Skip to: 1055 /* 1024 */ MCD_OPC_Decode, 222, 5, 218, 2, // Opcode: VCVTMUD /* 1029 */ MCD_OPC_FilterValue, 23, 22, 0, // Skip to: 1055 /* 1033 */ MCD_OPC_CheckPredicate, 52, 18, 0, // Skip to: 1055 /* 1037 */ MCD_OPC_CheckField, 23, 9, 253, 3, 11, 0, // Skip to: 1055 /* 1044 */ MCD_OPC_CheckField, 4, 1, 0, 5, 0, // Skip to: 1055 /* 1050 */ MCD_OPC_Decode, 220, 5, 218, 2, // Opcode: VCVTMSD /* 1055 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTablev8Crypto32[] = { /* 0 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 3 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 72 /* 7 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 10 */ MCD_OPC_FilterValue, 228, 3, 26, 0, // Skip to: 41 /* 15 */ MCD_OPC_CheckPredicate, 17, 193, 1, // Skip to: 468 /* 19 */ MCD_OPC_CheckField, 8, 4, 12, 187, 1, // Skip to: 468 /* 25 */ MCD_OPC_CheckField, 6, 1, 1, 181, 1, // Skip to: 468 /* 31 */ MCD_OPC_CheckField, 4, 1, 0, 175, 1, // Skip to: 468 /* 37 */ MCD_OPC_Decode, 192, 2, 105, // Opcode: SHA1C /* 41 */ MCD_OPC_FilterValue, 230, 3, 166, 1, // Skip to: 468 /* 46 */ MCD_OPC_CheckPredicate, 17, 162, 1, // Skip to: 468 /* 50 */ MCD_OPC_CheckField, 8, 4, 12, 156, 1, // Skip to: 468 /* 56 */ MCD_OPC_CheckField, 6, 1, 1, 150, 1, // Skip to: 468 /* 62 */ MCD_OPC_CheckField, 4, 1, 0, 144, 1, // Skip to: 468 /* 68 */ MCD_OPC_Decode, 198, 2, 105, // Opcode: SHA256H /* 72 */ MCD_OPC_FilterValue, 1, 65, 0, // Skip to: 141 /* 76 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 79 */ MCD_OPC_FilterValue, 228, 3, 26, 0, // Skip to: 110 /* 84 */ MCD_OPC_CheckPredicate, 17, 124, 1, // Skip to: 468 /* 88 */ MCD_OPC_CheckField, 8, 4, 12, 118, 1, // Skip to: 468 /* 94 */ MCD_OPC_CheckField, 6, 1, 1, 112, 1, // Skip to: 468 /* 100 */ MCD_OPC_CheckField, 4, 1, 0, 106, 1, // Skip to: 468 /* 106 */ MCD_OPC_Decode, 195, 2, 105, // Opcode: SHA1P /* 110 */ MCD_OPC_FilterValue, 230, 3, 97, 1, // Skip to: 468 /* 115 */ MCD_OPC_CheckPredicate, 17, 93, 1, // Skip to: 468 /* 119 */ MCD_OPC_CheckField, 8, 4, 12, 87, 1, // Skip to: 468 /* 125 */ MCD_OPC_CheckField, 6, 1, 1, 81, 1, // Skip to: 468 /* 131 */ MCD_OPC_CheckField, 4, 1, 0, 75, 1, // Skip to: 468 /* 137 */ MCD_OPC_Decode, 199, 2, 105, // Opcode: SHA256H2 /* 141 */ MCD_OPC_FilterValue, 2, 65, 0, // Skip to: 210 /* 145 */ MCD_OPC_ExtractField, 23, 9, // Inst{31-23} ... /* 148 */ MCD_OPC_FilterValue, 228, 3, 26, 0, // Skip to: 179 /* 153 */ MCD_OPC_CheckPredicate, 17, 55, 1, // Skip to: 468 /* 157 */ MCD_OPC_CheckField, 8, 4, 12, 49, 1, // Skip to: 468 /* 163 */ MCD_OPC_CheckField, 6, 1, 1, 43, 1, // Skip to: 468 /* 169 */ MCD_OPC_CheckField, 4, 1, 0, 37, 1, // Skip to: 468 /* 175 */ MCD_OPC_Decode, 194, 2, 105, // Opcode: SHA1M /* 179 */ MCD_OPC_FilterValue, 230, 3, 28, 1, // Skip to: 468 /* 184 */ MCD_OPC_CheckPredicate, 17, 24, 1, // Skip to: 468 /* 188 */ MCD_OPC_CheckField, 8, 4, 12, 18, 1, // Skip to: 468 /* 194 */ MCD_OPC_CheckField, 6, 1, 1, 12, 1, // Skip to: 468 /* 200 */ MCD_OPC_CheckField, 4, 1, 0, 6, 1, // Skip to: 468 /* 206 */ MCD_OPC_Decode, 201, 2, 105, // Opcode: SHA256SU1 /* 210 */ MCD_OPC_FilterValue, 3, 254, 0, // Skip to: 468 /* 214 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 217 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 254 /* 221 */ MCD_OPC_CheckPredicate, 17, 243, 0, // Skip to: 468 /* 225 */ MCD_OPC_CheckField, 23, 9, 231, 3, 236, 0, // Skip to: 468 /* 232 */ MCD_OPC_CheckField, 16, 4, 9, 230, 0, // Skip to: 468 /* 238 */ MCD_OPC_CheckField, 6, 2, 3, 224, 0, // Skip to: 468 /* 244 */ MCD_OPC_CheckField, 4, 1, 0, 218, 0, // Skip to: 468 /* 250 */ MCD_OPC_Decode, 193, 2, 126, // Opcode: SHA1H /* 254 */ MCD_OPC_FilterValue, 3, 179, 0, // Skip to: 437 /* 258 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 261 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 292 /* 265 */ MCD_OPC_CheckPredicate, 17, 199, 0, // Skip to: 468 /* 269 */ MCD_OPC_CheckField, 23, 9, 231, 3, 192, 0, // Skip to: 468 /* 276 */ MCD_OPC_CheckField, 16, 4, 0, 186, 0, // Skip to: 468 /* 282 */ MCD_OPC_CheckField, 4, 1, 0, 180, 0, // Skip to: 468 /* 288 */ MCD_OPC_Decode, 39, 132, 1, // Opcode: AESE /* 292 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 323 /* 296 */ MCD_OPC_CheckPredicate, 17, 168, 0, // Skip to: 468 /* 300 */ MCD_OPC_CheckField, 23, 9, 231, 3, 161, 0, // Skip to: 468 /* 307 */ MCD_OPC_CheckField, 16, 4, 0, 155, 0, // Skip to: 468 /* 313 */ MCD_OPC_CheckField, 4, 1, 0, 149, 0, // Skip to: 468 /* 319 */ MCD_OPC_Decode, 38, 132, 1, // Opcode: AESD /* 323 */ MCD_OPC_FilterValue, 2, 53, 0, // Skip to: 380 /* 327 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 330 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 354 /* 334 */ MCD_OPC_CheckPredicate, 17, 130, 0, // Skip to: 468 /* 338 */ MCD_OPC_CheckField, 23, 9, 231, 3, 123, 0, // Skip to: 468 /* 345 */ MCD_OPC_CheckField, 4, 1, 0, 117, 0, // Skip to: 468 /* 351 */ MCD_OPC_Decode, 41, 126, // Opcode: AESMC /* 354 */ MCD_OPC_FilterValue, 10, 110, 0, // Skip to: 468 /* 358 */ MCD_OPC_CheckPredicate, 17, 106, 0, // Skip to: 468 /* 362 */ MCD_OPC_CheckField, 23, 9, 231, 3, 99, 0, // Skip to: 468 /* 369 */ MCD_OPC_CheckField, 4, 1, 0, 93, 0, // Skip to: 468 /* 375 */ MCD_OPC_Decode, 197, 2, 132, 1, // Opcode: SHA1SU1 /* 380 */ MCD_OPC_FilterValue, 3, 84, 0, // Skip to: 468 /* 384 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 387 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 411 /* 391 */ MCD_OPC_CheckPredicate, 17, 73, 0, // Skip to: 468 /* 395 */ MCD_OPC_CheckField, 23, 9, 231, 3, 66, 0, // Skip to: 468 /* 402 */ MCD_OPC_CheckField, 4, 1, 0, 60, 0, // Skip to: 468 /* 408 */ MCD_OPC_Decode, 40, 126, // Opcode: AESIMC /* 411 */ MCD_OPC_FilterValue, 10, 53, 0, // Skip to: 468 /* 415 */ MCD_OPC_CheckPredicate, 17, 49, 0, // Skip to: 468 /* 419 */ MCD_OPC_CheckField, 23, 9, 231, 3, 42, 0, // Skip to: 468 /* 426 */ MCD_OPC_CheckField, 4, 1, 0, 36, 0, // Skip to: 468 /* 432 */ MCD_OPC_Decode, 200, 2, 132, 1, // Opcode: SHA256SU0 /* 437 */ MCD_OPC_FilterValue, 12, 27, 0, // Skip to: 468 /* 441 */ MCD_OPC_CheckPredicate, 17, 23, 0, // Skip to: 468 /* 445 */ MCD_OPC_CheckField, 23, 9, 228, 3, 16, 0, // Skip to: 468 /* 452 */ MCD_OPC_CheckField, 6, 1, 1, 10, 0, // Skip to: 468 /* 458 */ MCD_OPC_CheckField, 4, 1, 0, 4, 0, // Skip to: 468 /* 464 */ MCD_OPC_Decode, 196, 2, 105, // Opcode: SHA1SU0 /* 468 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTablev8NEON32[] = { /* 0 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 3 */ MCD_OPC_FilterValue, 0, 127, 0, // Skip to: 134 /* 7 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 10 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 41 /* 14 */ MCD_OPC_CheckPredicate, 53, 6, 4, // Skip to: 1048 /* 18 */ MCD_OPC_CheckField, 23, 9, 231, 3, 255, 3, // Skip to: 1048 /* 25 */ MCD_OPC_CheckField, 16, 6, 59, 249, 3, // Skip to: 1048 /* 31 */ MCD_OPC_CheckField, 4, 1, 0, 243, 3, // Skip to: 1048 /* 37 */ MCD_OPC_Decode, 203, 5, 125, // Opcode: VCVTANSD /* 41 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 72 /* 45 */ MCD_OPC_CheckPredicate, 53, 231, 3, // Skip to: 1048 /* 49 */ MCD_OPC_CheckField, 23, 9, 231, 3, 224, 3, // Skip to: 1048 /* 56 */ MCD_OPC_CheckField, 16, 6, 59, 218, 3, // Skip to: 1048 /* 62 */ MCD_OPC_CheckField, 4, 1, 0, 212, 3, // Skip to: 1048 /* 68 */ MCD_OPC_Decode, 204, 5, 126, // Opcode: VCVTANSQ /* 72 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 103 /* 76 */ MCD_OPC_CheckPredicate, 53, 200, 3, // Skip to: 1048 /* 80 */ MCD_OPC_CheckField, 23, 9, 231, 3, 193, 3, // Skip to: 1048 /* 87 */ MCD_OPC_CheckField, 16, 6, 59, 187, 3, // Skip to: 1048 /* 93 */ MCD_OPC_CheckField, 4, 1, 0, 181, 3, // Skip to: 1048 /* 99 */ MCD_OPC_Decode, 205, 5, 125, // Opcode: VCVTANUD /* 103 */ MCD_OPC_FilterValue, 3, 173, 3, // Skip to: 1048 /* 107 */ MCD_OPC_CheckPredicate, 53, 169, 3, // Skip to: 1048 /* 111 */ MCD_OPC_CheckField, 23, 9, 231, 3, 162, 3, // Skip to: 1048 /* 118 */ MCD_OPC_CheckField, 16, 6, 59, 156, 3, // Skip to: 1048 /* 124 */ MCD_OPC_CheckField, 4, 1, 0, 150, 3, // Skip to: 1048 /* 130 */ MCD_OPC_Decode, 206, 5, 126, // Opcode: VCVTANUQ /* 134 */ MCD_OPC_FilterValue, 1, 127, 0, // Skip to: 265 /* 138 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 141 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 172 /* 145 */ MCD_OPC_CheckPredicate, 53, 131, 3, // Skip to: 1048 /* 149 */ MCD_OPC_CheckField, 23, 9, 231, 3, 124, 3, // Skip to: 1048 /* 156 */ MCD_OPC_CheckField, 16, 6, 59, 118, 3, // Skip to: 1048 /* 162 */ MCD_OPC_CheckField, 4, 1, 0, 112, 3, // Skip to: 1048 /* 168 */ MCD_OPC_Decode, 224, 5, 125, // Opcode: VCVTNNSD /* 172 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 203 /* 176 */ MCD_OPC_CheckPredicate, 53, 100, 3, // Skip to: 1048 /* 180 */ MCD_OPC_CheckField, 23, 9, 231, 3, 93, 3, // Skip to: 1048 /* 187 */ MCD_OPC_CheckField, 16, 6, 59, 87, 3, // Skip to: 1048 /* 193 */ MCD_OPC_CheckField, 4, 1, 0, 81, 3, // Skip to: 1048 /* 199 */ MCD_OPC_Decode, 225, 5, 126, // Opcode: VCVTNNSQ /* 203 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 234 /* 207 */ MCD_OPC_CheckPredicate, 53, 69, 3, // Skip to: 1048 /* 211 */ MCD_OPC_CheckField, 23, 9, 231, 3, 62, 3, // Skip to: 1048 /* 218 */ MCD_OPC_CheckField, 16, 6, 59, 56, 3, // Skip to: 1048 /* 224 */ MCD_OPC_CheckField, 4, 1, 0, 50, 3, // Skip to: 1048 /* 230 */ MCD_OPC_Decode, 226, 5, 125, // Opcode: VCVTNNUD /* 234 */ MCD_OPC_FilterValue, 3, 42, 3, // Skip to: 1048 /* 238 */ MCD_OPC_CheckPredicate, 53, 38, 3, // Skip to: 1048 /* 242 */ MCD_OPC_CheckField, 23, 9, 231, 3, 31, 3, // Skip to: 1048 /* 249 */ MCD_OPC_CheckField, 16, 6, 59, 25, 3, // Skip to: 1048 /* 255 */ MCD_OPC_CheckField, 4, 1, 0, 19, 3, // Skip to: 1048 /* 261 */ MCD_OPC_Decode, 227, 5, 126, // Opcode: VCVTNNUQ /* 265 */ MCD_OPC_FilterValue, 2, 127, 0, // Skip to: 396 /* 269 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 272 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 303 /* 276 */ MCD_OPC_CheckPredicate, 53, 0, 3, // Skip to: 1048 /* 280 */ MCD_OPC_CheckField, 23, 9, 231, 3, 249, 2, // Skip to: 1048 /* 287 */ MCD_OPC_CheckField, 16, 6, 59, 243, 2, // Skip to: 1048 /* 293 */ MCD_OPC_CheckField, 4, 1, 0, 237, 2, // Skip to: 1048 /* 299 */ MCD_OPC_Decode, 232, 5, 125, // Opcode: VCVTPNSD /* 303 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 334 /* 307 */ MCD_OPC_CheckPredicate, 53, 225, 2, // Skip to: 1048 /* 311 */ MCD_OPC_CheckField, 23, 9, 231, 3, 218, 2, // Skip to: 1048 /* 318 */ MCD_OPC_CheckField, 16, 6, 59, 212, 2, // Skip to: 1048 /* 324 */ MCD_OPC_CheckField, 4, 1, 0, 206, 2, // Skip to: 1048 /* 330 */ MCD_OPC_Decode, 233, 5, 126, // Opcode: VCVTPNSQ /* 334 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 365 /* 338 */ MCD_OPC_CheckPredicate, 53, 194, 2, // Skip to: 1048 /* 342 */ MCD_OPC_CheckField, 23, 9, 231, 3, 187, 2, // Skip to: 1048 /* 349 */ MCD_OPC_CheckField, 16, 6, 59, 181, 2, // Skip to: 1048 /* 355 */ MCD_OPC_CheckField, 4, 1, 0, 175, 2, // Skip to: 1048 /* 361 */ MCD_OPC_Decode, 234, 5, 125, // Opcode: VCVTPNUD /* 365 */ MCD_OPC_FilterValue, 3, 167, 2, // Skip to: 1048 /* 369 */ MCD_OPC_CheckPredicate, 53, 163, 2, // Skip to: 1048 /* 373 */ MCD_OPC_CheckField, 23, 9, 231, 3, 156, 2, // Skip to: 1048 /* 380 */ MCD_OPC_CheckField, 16, 6, 59, 150, 2, // Skip to: 1048 /* 386 */ MCD_OPC_CheckField, 4, 1, 0, 144, 2, // Skip to: 1048 /* 392 */ MCD_OPC_Decode, 235, 5, 126, // Opcode: VCVTPNUQ /* 396 */ MCD_OPC_FilterValue, 3, 127, 0, // Skip to: 527 /* 400 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 403 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 434 /* 407 */ MCD_OPC_CheckPredicate, 53, 125, 2, // Skip to: 1048 /* 411 */ MCD_OPC_CheckField, 23, 9, 231, 3, 118, 2, // Skip to: 1048 /* 418 */ MCD_OPC_CheckField, 16, 6, 59, 112, 2, // Skip to: 1048 /* 424 */ MCD_OPC_CheckField, 4, 1, 0, 106, 2, // Skip to: 1048 /* 430 */ MCD_OPC_Decode, 216, 5, 125, // Opcode: VCVTMNSD /* 434 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 465 /* 438 */ MCD_OPC_CheckPredicate, 53, 94, 2, // Skip to: 1048 /* 442 */ MCD_OPC_CheckField, 23, 9, 231, 3, 87, 2, // Skip to: 1048 /* 449 */ MCD_OPC_CheckField, 16, 6, 59, 81, 2, // Skip to: 1048 /* 455 */ MCD_OPC_CheckField, 4, 1, 0, 75, 2, // Skip to: 1048 /* 461 */ MCD_OPC_Decode, 217, 5, 126, // Opcode: VCVTMNSQ /* 465 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 496 /* 469 */ MCD_OPC_CheckPredicate, 53, 63, 2, // Skip to: 1048 /* 473 */ MCD_OPC_CheckField, 23, 9, 231, 3, 56, 2, // Skip to: 1048 /* 480 */ MCD_OPC_CheckField, 16, 6, 59, 50, 2, // Skip to: 1048 /* 486 */ MCD_OPC_CheckField, 4, 1, 0, 44, 2, // Skip to: 1048 /* 492 */ MCD_OPC_Decode, 218, 5, 125, // Opcode: VCVTMNUD /* 496 */ MCD_OPC_FilterValue, 3, 36, 2, // Skip to: 1048 /* 500 */ MCD_OPC_CheckPredicate, 53, 32, 2, // Skip to: 1048 /* 504 */ MCD_OPC_CheckField, 23, 9, 231, 3, 25, 2, // Skip to: 1048 /* 511 */ MCD_OPC_CheckField, 16, 6, 59, 19, 2, // Skip to: 1048 /* 517 */ MCD_OPC_CheckField, 4, 1, 0, 13, 2, // Skip to: 1048 /* 523 */ MCD_OPC_Decode, 219, 5, 126, // Opcode: VCVTMNUQ /* 527 */ MCD_OPC_FilterValue, 4, 127, 0, // Skip to: 658 /* 531 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 534 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 565 /* 538 */ MCD_OPC_CheckPredicate, 53, 250, 1, // Skip to: 1048 /* 542 */ MCD_OPC_CheckField, 23, 9, 231, 3, 243, 1, // Skip to: 1048 /* 549 */ MCD_OPC_CheckField, 16, 6, 58, 237, 1, // Skip to: 1048 /* 555 */ MCD_OPC_CheckField, 4, 1, 0, 231, 1, // Skip to: 1048 /* 561 */ MCD_OPC_Decode, 157, 13, 125, // Opcode: VRINTNND /* 565 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 596 /* 569 */ MCD_OPC_CheckPredicate, 53, 219, 1, // Skip to: 1048 /* 573 */ MCD_OPC_CheckField, 23, 9, 231, 3, 212, 1, // Skip to: 1048 /* 580 */ MCD_OPC_CheckField, 16, 6, 58, 206, 1, // Skip to: 1048 /* 586 */ MCD_OPC_CheckField, 4, 1, 0, 200, 1, // Skip to: 1048 /* 592 */ MCD_OPC_Decode, 158, 13, 126, // Opcode: VRINTNNQ /* 596 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 627 /* 600 */ MCD_OPC_CheckPredicate, 53, 188, 1, // Skip to: 1048 /* 604 */ MCD_OPC_CheckField, 23, 9, 231, 3, 181, 1, // Skip to: 1048 /* 611 */ MCD_OPC_CheckField, 16, 6, 58, 175, 1, // Skip to: 1048 /* 617 */ MCD_OPC_CheckField, 4, 1, 0, 169, 1, // Skip to: 1048 /* 623 */ MCD_OPC_Decode, 167, 13, 125, // Opcode: VRINTXND /* 627 */ MCD_OPC_FilterValue, 3, 161, 1, // Skip to: 1048 /* 631 */ MCD_OPC_CheckPredicate, 53, 157, 1, // Skip to: 1048 /* 635 */ MCD_OPC_CheckField, 23, 9, 231, 3, 150, 1, // Skip to: 1048 /* 642 */ MCD_OPC_CheckField, 16, 6, 58, 144, 1, // Skip to: 1048 /* 648 */ MCD_OPC_CheckField, 4, 1, 0, 138, 1, // Skip to: 1048 /* 654 */ MCD_OPC_Decode, 168, 13, 126, // Opcode: VRINTXNQ /* 658 */ MCD_OPC_FilterValue, 5, 127, 0, // Skip to: 789 /* 662 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 665 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 696 /* 669 */ MCD_OPC_CheckPredicate, 53, 119, 1, // Skip to: 1048 /* 673 */ MCD_OPC_CheckField, 23, 9, 231, 3, 112, 1, // Skip to: 1048 /* 680 */ MCD_OPC_CheckField, 16, 6, 58, 106, 1, // Skip to: 1048 /* 686 */ MCD_OPC_CheckField, 4, 1, 0, 100, 1, // Skip to: 1048 /* 692 */ MCD_OPC_Decode, 149, 13, 125, // Opcode: VRINTAND /* 696 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 727 /* 700 */ MCD_OPC_CheckPredicate, 53, 88, 1, // Skip to: 1048 /* 704 */ MCD_OPC_CheckField, 23, 9, 231, 3, 81, 1, // Skip to: 1048 /* 711 */ MCD_OPC_CheckField, 16, 6, 58, 75, 1, // Skip to: 1048 /* 717 */ MCD_OPC_CheckField, 4, 1, 0, 69, 1, // Skip to: 1048 /* 723 */ MCD_OPC_Decode, 150, 13, 126, // Opcode: VRINTANQ /* 727 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 758 /* 731 */ MCD_OPC_CheckPredicate, 53, 57, 1, // Skip to: 1048 /* 735 */ MCD_OPC_CheckField, 23, 9, 231, 3, 50, 1, // Skip to: 1048 /* 742 */ MCD_OPC_CheckField, 16, 6, 58, 44, 1, // Skip to: 1048 /* 748 */ MCD_OPC_CheckField, 4, 1, 0, 38, 1, // Skip to: 1048 /* 754 */ MCD_OPC_Decode, 171, 13, 125, // Opcode: VRINTZND /* 758 */ MCD_OPC_FilterValue, 3, 30, 1, // Skip to: 1048 /* 762 */ MCD_OPC_CheckPredicate, 53, 26, 1, // Skip to: 1048 /* 766 */ MCD_OPC_CheckField, 23, 9, 231, 3, 19, 1, // Skip to: 1048 /* 773 */ MCD_OPC_CheckField, 16, 6, 58, 13, 1, // Skip to: 1048 /* 779 */ MCD_OPC_CheckField, 4, 1, 0, 7, 1, // Skip to: 1048 /* 785 */ MCD_OPC_Decode, 172, 13, 126, // Opcode: VRINTZNQ /* 789 */ MCD_OPC_FilterValue, 6, 65, 0, // Skip to: 858 /* 793 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 796 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 827 /* 800 */ MCD_OPC_CheckPredicate, 53, 244, 0, // Skip to: 1048 /* 804 */ MCD_OPC_CheckField, 23, 9, 231, 3, 237, 0, // Skip to: 1048 /* 811 */ MCD_OPC_CheckField, 16, 6, 58, 231, 0, // Skip to: 1048 /* 817 */ MCD_OPC_CheckField, 4, 1, 0, 225, 0, // Skip to: 1048 /* 823 */ MCD_OPC_Decode, 153, 13, 125, // Opcode: VRINTMND /* 827 */ MCD_OPC_FilterValue, 3, 217, 0, // Skip to: 1048 /* 831 */ MCD_OPC_CheckPredicate, 53, 213, 0, // Skip to: 1048 /* 835 */ MCD_OPC_CheckField, 23, 9, 231, 3, 206, 0, // Skip to: 1048 /* 842 */ MCD_OPC_CheckField, 16, 6, 58, 200, 0, // Skip to: 1048 /* 848 */ MCD_OPC_CheckField, 4, 1, 0, 194, 0, // Skip to: 1048 /* 854 */ MCD_OPC_Decode, 154, 13, 126, // Opcode: VRINTMNQ /* 858 */ MCD_OPC_FilterValue, 7, 65, 0, // Skip to: 927 /* 862 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 865 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 896 /* 869 */ MCD_OPC_CheckPredicate, 53, 175, 0, // Skip to: 1048 /* 873 */ MCD_OPC_CheckField, 23, 9, 231, 3, 168, 0, // Skip to: 1048 /* 880 */ MCD_OPC_CheckField, 16, 6, 58, 162, 0, // Skip to: 1048 /* 886 */ MCD_OPC_CheckField, 4, 1, 0, 156, 0, // Skip to: 1048 /* 892 */ MCD_OPC_Decode, 161, 13, 125, // Opcode: VRINTPND /* 896 */ MCD_OPC_FilterValue, 3, 148, 0, // Skip to: 1048 /* 900 */ MCD_OPC_CheckPredicate, 53, 144, 0, // Skip to: 1048 /* 904 */ MCD_OPC_CheckField, 23, 9, 231, 3, 137, 0, // Skip to: 1048 /* 911 */ MCD_OPC_CheckField, 16, 6, 58, 131, 0, // Skip to: 1048 /* 917 */ MCD_OPC_CheckField, 4, 1, 0, 125, 0, // Skip to: 1048 /* 923 */ MCD_OPC_Decode, 162, 13, 126, // Opcode: VRINTPNQ /* 927 */ MCD_OPC_FilterValue, 15, 117, 0, // Skip to: 1048 /* 931 */ MCD_OPC_ExtractField, 6, 1, // Inst{6} ... /* 934 */ MCD_OPC_FilterValue, 0, 53, 0, // Skip to: 991 /* 938 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 941 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 966 /* 945 */ MCD_OPC_CheckPredicate, 53, 99, 0, // Skip to: 1048 /* 949 */ MCD_OPC_CheckField, 23, 9, 230, 3, 92, 0, // Skip to: 1048 /* 956 */ MCD_OPC_CheckField, 4, 1, 1, 86, 0, // Skip to: 1048 /* 962 */ MCD_OPC_Decode, 239, 9, 96, // Opcode: VMAXNMND /* 966 */ MCD_OPC_FilterValue, 2, 78, 0, // Skip to: 1048 /* 970 */ MCD_OPC_CheckPredicate, 53, 74, 0, // Skip to: 1048 /* 974 */ MCD_OPC_CheckField, 23, 9, 230, 3, 67, 0, // Skip to: 1048 /* 981 */ MCD_OPC_CheckField, 4, 1, 1, 61, 0, // Skip to: 1048 /* 987 */ MCD_OPC_Decode, 129, 10, 96, // Opcode: VMINNMND /* 991 */ MCD_OPC_FilterValue, 1, 53, 0, // Skip to: 1048 /* 995 */ MCD_OPC_ExtractField, 20, 2, // Inst{21-20} ... /* 998 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 1023 /* 1002 */ MCD_OPC_CheckPredicate, 53, 42, 0, // Skip to: 1048 /* 1006 */ MCD_OPC_CheckField, 23, 9, 230, 3, 35, 0, // Skip to: 1048 /* 1013 */ MCD_OPC_CheckField, 4, 1, 1, 29, 0, // Skip to: 1048 /* 1019 */ MCD_OPC_Decode, 240, 9, 97, // Opcode: VMAXNMNQ /* 1023 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 1048 /* 1027 */ MCD_OPC_CheckPredicate, 53, 17, 0, // Skip to: 1048 /* 1031 */ MCD_OPC_CheckField, 23, 9, 230, 3, 10, 0, // Skip to: 1048 /* 1038 */ MCD_OPC_CheckField, 4, 1, 1, 4, 0, // Skip to: 1048 /* 1044 */ MCD_OPC_Decode, 130, 10, 97, // Opcode: VMINNMNQ /* 1048 */ MCD_OPC_Fail, 0 }; static bool getbool(uint64_t b) { return b != 0; } static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { switch (Idx) { default: // llvm_unreachable("Invalid index!"); case 0: return getbool(!(Bits & ARM_ModeThumb)); case 1: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV6Ops)); case 2: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV8Ops) && (Bits & ARM_FeatureCRC)); case 3: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV5TEOps)); case 4: return getbool(!(Bits & ARM_HasV8Ops)); case 5: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV8Ops)); case 6: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_FeatureVirtualization)); case 7: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV4TOps)); case 8: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV5TOps)); case 9: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_FeatureTrustZone)); case 10: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV6T2Ops)); case 11: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV7Ops)); case 12: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_HasV7Ops) && (Bits & ARM_FeatureMP)); case 13: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_FeatureDB)); case 14: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_FeatureHWDivARM)); case 15: return getbool(!(Bits & ARM_ModeThumb) && (Bits & ARM_FeatureNaClTrap)); case 16: return getbool((Bits & ARM_FeatureNEON)); case 17: return getbool((Bits & ARM_HasV8Ops) && (Bits & ARM_FeatureCrypto)); case 18: return getbool((Bits & ARM_FeatureNEON) && (Bits & ARM_FeatureFP16)); case 19: return getbool((Bits & ARM_FeatureNEON) && (Bits & ARM_FeatureVFP4)); case 20: return getbool((Bits & ARM_FeatureVFP2)); case 21: return getbool((Bits & ARM_ModeThumb)); case 22: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_HasV5TOps)); case 23: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_HasV6Ops)); case 24: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2)); case 25: return getbool(!(Bits & ARM_FeatureMClass)); case 26: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_HasV8Ops)); case 27: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_HasV6MOps)); case 28: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_HasV5TOps) && !(Bits & ARM_FeatureMClass)); case 29: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && !(Bits & ARM_FeatureMClass)); case 30: return getbool((Bits & ARM_FeatureT2XtPk) && (Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2)); case 31: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && !(Bits & ARM_HasV8Ops)); case 32: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_FeatureDSPThumb2)); case 33: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_HasV7Ops)); case 34: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureDB)); case 35: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_HasV8Ops)); case 36: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && !(Bits & ARM_FeatureMClass) && !(Bits & ARM_HasV8Ops)); case 37: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_FeatureVirtualization)); case 38: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_FeatureTrustZone)); case 39: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureVirtualization)); case 40: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureMClass)); case 41: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_HasV7Ops) && (Bits & ARM_FeatureMP)); case 42: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_FeatureT2XtPk)); case 43: return getbool((Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2) && (Bits & ARM_HasV8Ops) && (Bits & ARM_FeatureCRC)); case 44: return getbool((Bits & ARM_FeatureHWDiv) && (Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2)); case 45: return getbool(!(Bits & ARM_HasV8Ops) && (Bits & ARM_ModeThumb) && (Bits & ARM_FeatureThumb2)); case 46: return getbool((Bits & ARM_FeatureVFP2) && !(Bits & ARM_FeatureVFPOnlySP)); case 47: return getbool((Bits & ARM_FeatureVFP4)); case 48: return getbool((Bits & ARM_FeatureVFP4) && !(Bits & ARM_FeatureVFPOnlySP)); case 49: return getbool((Bits & ARM_FeatureVFP3)); case 50: return getbool((Bits & ARM_FeatureFPARMv8)); case 51: return getbool((Bits & ARM_FeatureVFP3) && !(Bits & ARM_FeatureVFPOnlySP)); case 52: return getbool((Bits & ARM_FeatureFPARMv8) && !(Bits & ARM_FeatureVFPOnlySP)); case 53: return getbool((Bits & ARM_HasV8Ops) && (Bits & ARM_FeatureNEON)); } } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, const void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 1: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 7) << 5; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 2: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 2) << 5; \ tmp |= fieldname(insn, 8, 4) << 8; \ if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 3: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 2) << 5; \ tmp |= fieldname(insn, 8, 4) << 8; \ if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 4: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 5: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 6: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 7: \ if (!Check(&S, DecodeAddrMode3Instruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 9: \ if (!Check(&S, DecodeCPSInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 9, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 11: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 12: \ if (!Check(&S, DecodeQADDInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 13: \ if (!Check(&S, DecodeSMLAInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 14: \ if (!Check(&S, DecodeSwap(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 15: \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 8, 12) << 4; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 16: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 7) << 5; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 18: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 2) << 5; \ tmp |= fieldname(insn, 8, 4) << 8; \ if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 19: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 20: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 21: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 22: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 23: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 8, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 5; \ if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 25: \ tmp = 0; \ tmp |= fieldname(insn, 16, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = 0; \ tmp |= fieldname(insn, 8, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 5; \ if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 7) << 5; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 33: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 34: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 2) << 5; \ tmp |= fieldname(insn, 8, 4) << 8; \ if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 37: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 2) << 5; \ tmp |= fieldname(insn, 8, 4) << 8; \ if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 38: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 39: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 40: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 41: \ if (!Check(&S, DecodeDoubleRegStore(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 42: \ if (!Check(&S, DecodeDoubleRegLoad(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 43: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 23, 1) << 4; \ if (!Check(&S, DecodePostIdxReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 44: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 8, 4) << 4; \ tmp |= fieldname(insn, 23, 1) << 8; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 45: \ if (!Check(&S, DecodeLDR(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 46: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 8, 4) << 4; \ tmp |= fieldname(insn, 23, 1) << 8; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 47: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 12); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 48: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 22, 2) << 12; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 49: \ if (!Check(&S, DecodeArmMOVTWInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 50: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 12); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 51: \ tmp = fieldname(insn, 0, 8); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 52: \ tmp = 0; \ tmp |= fieldname(insn, 16, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 12); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 53: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 12); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 54: \ if (!Check(&S, DecodeAddrMode2IdxInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 55: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 16, 4) << 13; \ tmp |= fieldname(insn, 23, 1) << 12; \ if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 56: \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 16, 4) << 13; \ tmp |= fieldname(insn, 23, 1) << 12; \ if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 57: \ if (!Check(&S, DecodeSTRPreImm(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 58: \ if (!Check(&S, DecodeLDRPreImm(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 59: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 16, 4) << 13; \ tmp |= fieldname(insn, 23, 1) << 12; \ if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 60: \ return S; \ case 61: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeMemBarrierOption(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 62: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeInstSyncBarrierOption(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 63: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 7) << 5; \ tmp |= fieldname(insn, 16, 4) << 13; \ tmp |= fieldname(insn, 23, 1) << 12; \ if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 64: \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 7) << 5; \ tmp |= fieldname(insn, 16, 4) << 13; \ tmp |= fieldname(insn, 23, 1) << 12; \ if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 65: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 66: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 7, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 67: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 68: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 69: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 70: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 2); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 71: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 2); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 72: \ if (!Check(&S, DecodeSTRPreReg(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 73: \ if (!Check(&S, DecodeLDRPreReg(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 74: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 1) << 5; \ tmp |= fieldname(insn, 7, 5) << 0; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 75: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 76: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 7, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 77: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 7) << 5; \ tmp |= fieldname(insn, 16, 4) << 13; \ tmp |= fieldname(insn, 23, 1) << 12; \ if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 78: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 5) << 0; \ tmp |= fieldname(insn, 16, 5) << 5; \ if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 79: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 5) << 0; \ tmp |= fieldname(insn, 16, 5) << 5; \ if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 80: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 81: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 82: \ if (!Check(&S, DecodeMemMultipleWritebackInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 83: \ tmp = fieldname(insn, 0, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 84: \ if (!Check(&S, DecodeBranchImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 85: \ tmp = 0; \ tmp |= fieldname(insn, 0, 24) << 1; \ tmp |= fieldname(insn, 24, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 86: \ if (!Check(&S, DecodeCopMemInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 87: \ if (!Check(&S, DecodeMRRC2(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 88: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 89: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 90: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 91: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 92: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 93: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 94: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 5, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 95: \ tmp = fieldname(insn, 0, 24); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 96: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 97: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 98: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 99: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 100: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 101: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 102: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 103: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 104: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 105: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 106: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 0; \ tmp |= fieldname(insn, 5, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 107: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 0; \ tmp |= fieldname(insn, 5, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 108: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 0; \ tmp |= fieldname(insn, 5, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 109: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 0; \ tmp |= fieldname(insn, 5, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 110: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 0; \ tmp |= fieldname(insn, 5, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 111: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 0; \ tmp |= fieldname(insn, 5, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 112: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 113: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 114: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 115: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 116: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 117: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 118: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 119: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 9, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 120: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 121: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 122: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 10, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 123: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 9, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 124: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 125: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 126: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 127: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 128: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 129: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 130: \ if (!Check(&S, DecodeVSHLMaxInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 131: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 132: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 133: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 134: \ if (!Check(&S, DecodeTBLInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 135: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 136: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 137: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 138: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 19, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 139: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 140: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 17, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 141: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 142: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 143: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 144: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 145: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 146: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 147: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 148: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 149: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 150: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 151: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 152: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 153: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 154: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 155: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 156: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 157: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 158: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 159: \ if (!Check(&S, DecodeNEONModImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 160: \ if (!Check(&S, DecodeVCVTD(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 161: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 162: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 163: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 164: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 165: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 166: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 167: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 168: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 169: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 170: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 171: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 172: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 173: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 174: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 175: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 176: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 177: \ if (!Check(&S, DecodeVCVTQ(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 178: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 179: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 180: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 181: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 182: \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 183: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 184: \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 1) << 0; \ tmp |= fieldname(insn, 21, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 185: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 1) << 0; \ tmp |= fieldname(insn, 21, 1) << 1; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 186: \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 5, 2) << 0; \ tmp |= fieldname(insn, 21, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 187: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 5, 2) << 0; \ tmp |= fieldname(insn, 21, 1) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 188: \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 189: \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 190: \ if (!Check(&S, DecodeVLDST4Instruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 191: \ if (!Check(&S, DecodeVST1LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 192: \ if (!Check(&S, DecodeVLD1LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 193: \ if (!Check(&S, DecodeVST2LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 194: \ if (!Check(&S, DecodeVLD2LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 195: \ if (!Check(&S, DecodeVLDST1Instruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 196: \ if (!Check(&S, DecodeVST3LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 197: \ if (!Check(&S, DecodeVLD3LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 198: \ if (!Check(&S, DecodeVLDST2Instruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 199: \ if (!Check(&S, DecodeVST4LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 200: \ if (!Check(&S, DecodeVLD4LN(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 201: \ if (!Check(&S, DecodeVLDST3Instruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 202: \ if (!Check(&S, DecodeVLD1DupInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 203: \ if (!Check(&S, DecodeVLD2DupInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 204: \ if (!Check(&S, DecodeVLD3DupInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 205: \ if (!Check(&S, DecodeVLD4DupInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 206: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 207: \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 208: \ if (!Check(&S, DecodeThumbAddSPReg(MI, (uint16_t)insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 209: \ tmp = 0; \ tmp |= fieldname(insn, 0, 3) << 0; \ tmp |= fieldname(insn, 7, 1) << 3; \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 3) << 0; \ tmp |= fieldname(insn, 7, 1) << 3; \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 210: \ tmp = 0; \ tmp |= fieldname(insn, 0, 3) << 0; \ tmp |= fieldname(insn, 7, 1) << 3; \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 211: \ tmp = fieldname(insn, 3, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 212: \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ if (!Check(&S, DecodeThumbAddrModePC(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 213: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 6); \ if (!Check(&S, DecodeThumbAddrModeRR(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 214: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 8); \ if (!Check(&S, DecodeThumbAddrModeIS(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 215: \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ if (!Check(&S, DecodeThumbAddrModeSP(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 216: \ if (!Check(&S, DecodeThumbAddSpecialReg(MI, (uint16_t)insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 217: \ if (!Check(&S, DecodeThumbAddSPImm(MI, (uint16_t)insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 218: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 5) << 0; \ tmp |= fieldname(insn, 9, 1) << 5; \ if (!Check(&S, DecodeThumbCmpBROperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 219: \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 8, 1) << 14; \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 220: \ tmp = fieldname(insn, 3, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 221: \ if (!Check(&S, DecodeThumbCPS(MI, (uint16_t)insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 222: \ tmp = fieldname(insn, 0, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 223: \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 8, 1) << 15; \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 224: \ tmp = fieldname(insn, 0, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 225: \ tmp = fieldname(insn, 4, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 226: \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 227: \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 228: \ tmp = fieldname(insn, 0, 8); \ if (!Check(&S, DecodeThumbBCCTargetOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 229: \ tmp = fieldname(insn, 0, 11); \ if (!Check(&S, DecodeThumbBROperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 230: \ tmp = 0; \ tmp |= fieldname(insn, 1, 10) << 1; \ tmp |= fieldname(insn, 11, 1) << 21; \ tmp |= fieldname(insn, 13, 1) << 22; \ tmp |= fieldname(insn, 16, 10) << 11; \ tmp |= fieldname(insn, 26, 1) << 23; \ if (!Check(&S, DecodeThumbBLXOffset(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 231: \ tmp = 0; \ tmp |= fieldname(insn, 0, 11) << 0; \ tmp |= fieldname(insn, 11, 1) << 21; \ tmp |= fieldname(insn, 13, 1) << 22; \ tmp |= fieldname(insn, 16, 10) << 11; \ tmp |= fieldname(insn, 26, 1) << 23; \ if (!Check(&S, DecodeThumbBLTargetOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 232: \ if (!Check(&S, DecodeIT(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 233: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 13) << 0; \ tmp |= fieldname(insn, 14, 1) << 14; \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 234: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 235: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 13) << 0; \ tmp |= fieldname(insn, 14, 1) << 14; \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 236: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 237: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 16, 4) << 8; \ if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 238: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 239: \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 240: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 241: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 16, 4) << 8; \ if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 242: \ if (!Check(&S, DecodeThumbTableBranch(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 243: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 244: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 23, 1) << 8; \ if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 245: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 23, 1) << 8; \ if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 246: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 16, 4) << 9; \ tmp |= fieldname(insn, 23, 1) << 8; \ if (!Check(&S, DecodeT2AddrModeImm8s4(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 247: \ if (!Check(&S, DecodeT2STRDPreInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 248: \ if (!Check(&S, DecodeT2LDRDPreInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 249: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 250: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 4, 4) << 5; \ tmp |= fieldname(insn, 12, 3) << 9; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 251: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 252: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 4, 4) << 5; \ tmp |= fieldname(insn, 12, 3) << 9; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 253: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 254: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 255: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 2) << 0; \ tmp |= fieldname(insn, 12, 3) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 256: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 4, 4) << 5; \ tmp |= fieldname(insn, 12, 3) << 9; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 257: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 2) << 0; \ tmp |= fieldname(insn, 12, 3) << 2; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 258: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 259: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 4, 4) << 5; \ tmp |= fieldname(insn, 12, 3) << 9; \ if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 260: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 261: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 3) << 8; \ tmp |= fieldname(insn, 26, 1) << 11; \ if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 262: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 3) << 8; \ tmp |= fieldname(insn, 26, 1) << 11; \ if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 263: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 3) << 8; \ tmp |= fieldname(insn, 26, 1) << 11; \ if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 264: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 3) << 8; \ tmp |= fieldname(insn, 26, 1) << 11; \ if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 1); \ if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 265: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 3) << 8; \ tmp |= fieldname(insn, 26, 1) << 11; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 266: \ if (!Check(&S, DecodeT2Adr(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 267: \ if (!Check(&S, DecodeT2MOVTWInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 268: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 269: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 2) << 0; \ tmp |= fieldname(insn, 12, 3) << 2; \ tmp |= fieldname(insn, 21, 1) << 5; \ if (!Check(&S, DecodeT2ShifterImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 270: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 6, 2) << 0; \ tmp |= fieldname(insn, 12, 3) << 2; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 271: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 5) << 5; \ tmp |= fieldname(insn, 6, 2) << 0; \ tmp |= fieldname(insn, 12, 3) << 2; \ if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 272: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 5) << 5; \ tmp |= fieldname(insn, 6, 2) << 0; \ tmp |= fieldname(insn, 12, 3) << 2; \ if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 273: \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 274: \ if (!Check(&S, DecodeT2CPSInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 275: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 276: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 277: \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 16, 4) << 12; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 278: \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 279: \ tmp = 0; \ tmp |= fieldname(insn, 8, 4) << 0; \ tmp |= fieldname(insn, 20, 1) << 4; \ if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 280: \ tmp = 0; \ tmp |= fieldname(insn, 4, 1) << 4; \ tmp |= fieldname(insn, 8, 4) << 0; \ tmp |= fieldname(insn, 20, 1) << 5; \ if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 281: \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 10, 2) << 10; \ if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 282: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 4, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ tmp |= fieldname(insn, 20, 1) << 5; \ if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 283: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 284: \ if (!Check(&S, DecodeThumb2BCCInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 285: \ if (!Check(&S, DecodeT2BInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 286: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 2; \ tmp |= fieldname(insn, 4, 2) << 0; \ tmp |= fieldname(insn, 16, 4) << 6; \ if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 287: \ if (!Check(&S, DecodeT2LdStPre(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 288: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 16, 4) << 9; \ if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 289: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 9, 1) << 8; \ tmp |= fieldname(insn, 16, 4) << 9; \ if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 290: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 16, 4) << 13; \ if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 291: \ if (!Check(&S, DecodeT2LoadShift(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 292: \ if (!Check(&S, DecodeT2LoadImm8(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 293: \ if (!Check(&S, DecodeT2LoadT(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 294: \ if (!Check(&S, DecodeT2LoadImm12(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 295: \ if (!Check(&S, DecodeT2LoadLabel(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 296: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 2; \ tmp |= fieldname(insn, 4, 2) << 0; \ tmp |= fieldname(insn, 16, 4) << 6; \ if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 297: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 9, 1) << 8; \ tmp |= fieldname(insn, 16, 4) << 9; \ if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 298: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 12) << 0; \ tmp |= fieldname(insn, 16, 4) << 13; \ if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 299: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 300: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 301: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 302: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 303: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 304: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 305: \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 306: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 307: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 308: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 309: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 310: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 311: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 312: \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 313: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 314: \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 315: \ if (!Check(&S, DecodeVMOVSRR(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 316: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 4) << 9; \ tmp |= fieldname(insn, 22, 1) << 8; \ if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 317: \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 318: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 7) << 1; \ tmp |= fieldname(insn, 12, 4) << 8; \ tmp |= fieldname(insn, 22, 1) << 12; \ if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 319: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 7) << 1; \ tmp |= fieldname(insn, 12, 4) << 8; \ if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 320: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 16, 4) << 9; \ tmp |= fieldname(insn, 23, 1) << 8; \ if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 321: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 16, 4) << 9; \ tmp |= fieldname(insn, 23, 1) << 8; \ if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 322: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 16, 4) << 1; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 323: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 16, 4) << 1; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 324: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 325: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 4; \ tmp |= fieldname(insn, 16, 4) << 0; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 326: \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 16, 4) << 1; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 327: \ if (!Check(&S, DecodeVMOVRRS(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 328: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 329: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 16, 4) << 1; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 330: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 8) << 0; \ tmp |= fieldname(insn, 12, 4) << 9; \ tmp |= fieldname(insn, 22, 1) << 8; \ if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 331: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 7) << 1; \ tmp |= fieldname(insn, 12, 4) << 8; \ tmp |= fieldname(insn, 22, 1) << 12; \ if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 332: \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 7) << 1; \ tmp |= fieldname(insn, 12, 4) << 8; \ if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 333: \ tmp = fieldname(insn, 12, 4); \ if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 334: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 16, 4) << 4; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 335: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 336: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 337: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 338: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 339: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 16, 4) << 4; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 340: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 341: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 342: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 343: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 0; \ tmp |= fieldname(insn, 22, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 28, 4); \ if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 344: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 16, 4) << 1; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 345: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 1; \ tmp |= fieldname(insn, 5, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ case 346: \ tmp = 0; \ tmp |= fieldname(insn, 12, 4) << 1; \ tmp |= fieldname(insn, 22, 1) << 0; \ if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 4) << 0; \ tmp |= fieldname(insn, 5, 1) << 4; \ if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \ { \ uint64_t Bits = ARM_getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction_2, uint16_t) DecodeToMCInst(decodeToMCInst_2, fieldFromInstruction_2, uint16_t) DecodeInstruction(decodeInstruction_2, fieldFromInstruction_2, decodeToMCInst_2, uint16_t) FieldFromInstruction(fieldFromInstruction_4, uint32_t) DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t) capstone-sys-0.11.0/capstone/arch/ARM/ARMGenInstrInfo.inc010066400017500001750000023473251363402546700212460ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { ARM_PHI = 0, ARM_INLINEASM = 1, ARM_CFI_INSTRUCTION = 2, ARM_EH_LABEL = 3, ARM_GC_LABEL = 4, ARM_KILL = 5, ARM_EXTRACT_SUBREG = 6, ARM_INSERT_SUBREG = 7, ARM_IMPLICIT_DEF = 8, ARM_SUBREG_TO_REG = 9, ARM_COPY_TO_REGCLASS = 10, ARM_DBG_VALUE = 11, ARM_REG_SEQUENCE = 12, ARM_COPY = 13, ARM_BUNDLE = 14, ARM_LIFETIME_START = 15, ARM_LIFETIME_END = 16, ARM_STACKMAP = 17, ARM_PATCHPOINT = 18, ARM_LOAD_STACK_GUARD = 19, ARM_STATEPOINT = 20, ARM_FRAME_ALLOC = 21, ARM_ABS = 22, ARM_ADCri = 23, ARM_ADCrr = 24, ARM_ADCrsi = 25, ARM_ADCrsr = 26, ARM_ADDSri = 27, ARM_ADDSrr = 28, ARM_ADDSrsi = 29, ARM_ADDSrsr = 30, ARM_ADDri = 31, ARM_ADDrr = 32, ARM_ADDrsi = 33, ARM_ADDrsr = 34, ARM_ADJCALLSTACKDOWN = 35, ARM_ADJCALLSTACKUP = 36, ARM_ADR = 37, ARM_AESD = 38, ARM_AESE = 39, ARM_AESIMC = 40, ARM_AESMC = 41, ARM_ANDri = 42, ARM_ANDrr = 43, ARM_ANDrsi = 44, ARM_ANDrsr = 45, ARM_ASRi = 46, ARM_ASRr = 47, ARM_B = 48, ARM_BCCZi64 = 49, ARM_BCCi64 = 50, ARM_BFC = 51, ARM_BFI = 52, ARM_BICri = 53, ARM_BICrr = 54, ARM_BICrsi = 55, ARM_BICrsr = 56, ARM_BKPT = 57, ARM_BL = 58, ARM_BLX = 59, ARM_BLX_pred = 60, ARM_BLXi = 61, ARM_BL_pred = 62, ARM_BMOVPCB_CALL = 63, ARM_BMOVPCRX_CALL = 64, ARM_BR_JTadd = 65, ARM_BR_JTm = 66, ARM_BR_JTr = 67, ARM_BX = 68, ARM_BXJ = 69, ARM_BX_CALL = 70, ARM_BX_RET = 71, ARM_BX_pred = 72, ARM_Bcc = 73, ARM_CDP = 74, ARM_CDP2 = 75, ARM_CLREX = 76, ARM_CLZ = 77, ARM_CMNri = 78, ARM_CMNzrr = 79, ARM_CMNzrsi = 80, ARM_CMNzrsr = 81, ARM_CMPri = 82, ARM_CMPrr = 83, ARM_CMPrsi = 84, ARM_CMPrsr = 85, ARM_CONSTPOOL_ENTRY = 86, ARM_COPY_STRUCT_BYVAL_I32 = 87, ARM_CPS1p = 88, ARM_CPS2p = 89, ARM_CPS3p = 90, ARM_CRC32B = 91, ARM_CRC32CB = 92, ARM_CRC32CH = 93, ARM_CRC32CW = 94, ARM_CRC32H = 95, ARM_CRC32W = 96, ARM_DBG = 97, ARM_DMB = 98, ARM_DSB = 99, ARM_EORri = 100, ARM_EORrr = 101, ARM_EORrsi = 102, ARM_EORrsr = 103, ARM_ERET = 104, ARM_FCONSTD = 105, ARM_FCONSTS = 106, ARM_FLDMXDB_UPD = 107, ARM_FLDMXIA = 108, ARM_FLDMXIA_UPD = 109, ARM_FMSTAT = 110, ARM_FSTMXDB_UPD = 111, ARM_FSTMXIA = 112, ARM_FSTMXIA_UPD = 113, ARM_HINT = 114, ARM_HLT = 115, ARM_HVC = 116, ARM_ISB = 117, ARM_ITasm = 118, ARM_Int_eh_sjlj_dispatchsetup = 119, ARM_Int_eh_sjlj_longjmp = 120, ARM_Int_eh_sjlj_setjmp = 121, ARM_Int_eh_sjlj_setjmp_nofp = 122, ARM_LDA = 123, ARM_LDAB = 124, ARM_LDAEX = 125, ARM_LDAEXB = 126, ARM_LDAEXD = 127, ARM_LDAEXH = 128, ARM_LDAH = 129, ARM_LDC2L_OFFSET = 130, ARM_LDC2L_OPTION = 131, ARM_LDC2L_POST = 132, ARM_LDC2L_PRE = 133, ARM_LDC2_OFFSET = 134, ARM_LDC2_OPTION = 135, ARM_LDC2_POST = 136, ARM_LDC2_PRE = 137, ARM_LDCL_OFFSET = 138, ARM_LDCL_OPTION = 139, ARM_LDCL_POST = 140, ARM_LDCL_PRE = 141, ARM_LDC_OFFSET = 142, ARM_LDC_OPTION = 143, ARM_LDC_POST = 144, ARM_LDC_PRE = 145, ARM_LDMDA = 146, ARM_LDMDA_UPD = 147, ARM_LDMDB = 148, ARM_LDMDB_UPD = 149, ARM_LDMIA = 150, ARM_LDMIA_RET = 151, ARM_LDMIA_UPD = 152, ARM_LDMIB = 153, ARM_LDMIB_UPD = 154, ARM_LDRBT_POST = 155, ARM_LDRBT_POST_IMM = 156, ARM_LDRBT_POST_REG = 157, ARM_LDRB_POST_IMM = 158, ARM_LDRB_POST_REG = 159, ARM_LDRB_PRE_IMM = 160, ARM_LDRB_PRE_REG = 161, ARM_LDRBi12 = 162, ARM_LDRBrs = 163, ARM_LDRD = 164, ARM_LDRD_POST = 165, ARM_LDRD_PRE = 166, ARM_LDREX = 167, ARM_LDREXB = 168, ARM_LDREXD = 169, ARM_LDREXH = 170, ARM_LDRH = 171, ARM_LDRHTi = 172, ARM_LDRHTr = 173, ARM_LDRH_POST = 174, ARM_LDRH_PRE = 175, ARM_LDRLIT_ga_abs = 176, ARM_LDRLIT_ga_pcrel = 177, ARM_LDRLIT_ga_pcrel_ldr = 178, ARM_LDRSB = 179, ARM_LDRSBTi = 180, ARM_LDRSBTr = 181, ARM_LDRSB_POST = 182, ARM_LDRSB_PRE = 183, ARM_LDRSH = 184, ARM_LDRSHTi = 185, ARM_LDRSHTr = 186, ARM_LDRSH_POST = 187, ARM_LDRSH_PRE = 188, ARM_LDRT_POST = 189, ARM_LDRT_POST_IMM = 190, ARM_LDRT_POST_REG = 191, ARM_LDR_POST_IMM = 192, ARM_LDR_POST_REG = 193, ARM_LDR_PRE_IMM = 194, ARM_LDR_PRE_REG = 195, ARM_LDRcp = 196, ARM_LDRi12 = 197, ARM_LDRrs = 198, ARM_LEApcrel = 199, ARM_LEApcrelJT = 200, ARM_LSLi = 201, ARM_LSLr = 202, ARM_LSRi = 203, ARM_LSRr = 204, ARM_MCR = 205, ARM_MCR2 = 206, ARM_MCRR = 207, ARM_MCRR2 = 208, ARM_MLA = 209, ARM_MLAv5 = 210, ARM_MLS = 211, ARM_MOVCCi = 212, ARM_MOVCCi16 = 213, ARM_MOVCCi32imm = 214, ARM_MOVCCr = 215, ARM_MOVCCsi = 216, ARM_MOVCCsr = 217, ARM_MOVPCLR = 218, ARM_MOVPCRX = 219, ARM_MOVTi16 = 220, ARM_MOVTi16_ga_pcrel = 221, ARM_MOV_ga_pcrel = 222, ARM_MOV_ga_pcrel_ldr = 223, ARM_MOVi = 224, ARM_MOVi16 = 225, ARM_MOVi16_ga_pcrel = 226, ARM_MOVi32imm = 227, ARM_MOVr = 228, ARM_MOVr_TC = 229, ARM_MOVsi = 230, ARM_MOVsr = 231, ARM_MOVsra_flag = 232, ARM_MOVsrl_flag = 233, ARM_MRC = 234, ARM_MRC2 = 235, ARM_MRRC = 236, ARM_MRRC2 = 237, ARM_MRS = 238, ARM_MRSbanked = 239, ARM_MRSsys = 240, ARM_MSR = 241, ARM_MSRbanked = 242, ARM_MSRi = 243, ARM_MUL = 244, ARM_MULv5 = 245, ARM_MVNCCi = 246, ARM_MVNi = 247, ARM_MVNr = 248, ARM_MVNsi = 249, ARM_MVNsr = 250, ARM_ORRri = 251, ARM_ORRrr = 252, ARM_ORRrsi = 253, ARM_ORRrsr = 254, ARM_PICADD = 255, ARM_PICLDR = 256, ARM_PICLDRB = 257, ARM_PICLDRH = 258, ARM_PICLDRSB = 259, ARM_PICLDRSH = 260, ARM_PICSTR = 261, ARM_PICSTRB = 262, ARM_PICSTRH = 263, ARM_PKHBT = 264, ARM_PKHTB = 265, ARM_PLDWi12 = 266, ARM_PLDWrs = 267, ARM_PLDi12 = 268, ARM_PLDrs = 269, ARM_PLIi12 = 270, ARM_PLIrs = 271, ARM_QADD = 272, ARM_QADD16 = 273, ARM_QADD8 = 274, ARM_QASX = 275, ARM_QDADD = 276, ARM_QDSUB = 277, ARM_QSAX = 278, ARM_QSUB = 279, ARM_QSUB16 = 280, ARM_QSUB8 = 281, ARM_RBIT = 282, ARM_REV = 283, ARM_REV16 = 284, ARM_REVSH = 285, ARM_RFEDA = 286, ARM_RFEDA_UPD = 287, ARM_RFEDB = 288, ARM_RFEDB_UPD = 289, ARM_RFEIA = 290, ARM_RFEIA_UPD = 291, ARM_RFEIB = 292, ARM_RFEIB_UPD = 293, ARM_RORi = 294, ARM_RORr = 295, ARM_RRX = 296, ARM_RRXi = 297, ARM_RSBSri = 298, ARM_RSBSrsi = 299, ARM_RSBSrsr = 300, ARM_RSBri = 301, ARM_RSBrr = 302, ARM_RSBrsi = 303, ARM_RSBrsr = 304, ARM_RSCri = 305, ARM_RSCrr = 306, ARM_RSCrsi = 307, ARM_RSCrsr = 308, ARM_SADD16 = 309, ARM_SADD8 = 310, ARM_SASX = 311, ARM_SBCri = 312, ARM_SBCrr = 313, ARM_SBCrsi = 314, ARM_SBCrsr = 315, ARM_SBFX = 316, ARM_SDIV = 317, ARM_SEL = 318, ARM_SETEND = 319, ARM_SHA1C = 320, ARM_SHA1H = 321, ARM_SHA1M = 322, ARM_SHA1P = 323, ARM_SHA1SU0 = 324, ARM_SHA1SU1 = 325, ARM_SHA256H = 326, ARM_SHA256H2 = 327, ARM_SHA256SU0 = 328, ARM_SHA256SU1 = 329, ARM_SHADD16 = 330, ARM_SHADD8 = 331, ARM_SHASX = 332, ARM_SHSAX = 333, ARM_SHSUB16 = 334, ARM_SHSUB8 = 335, ARM_SMC = 336, ARM_SMLABB = 337, ARM_SMLABT = 338, ARM_SMLAD = 339, ARM_SMLADX = 340, ARM_SMLAL = 341, ARM_SMLALBB = 342, ARM_SMLALBT = 343, ARM_SMLALD = 344, ARM_SMLALDX = 345, ARM_SMLALTB = 346, ARM_SMLALTT = 347, ARM_SMLALv5 = 348, ARM_SMLATB = 349, ARM_SMLATT = 350, ARM_SMLAWB = 351, ARM_SMLAWT = 352, ARM_SMLSD = 353, ARM_SMLSDX = 354, ARM_SMLSLD = 355, ARM_SMLSLDX = 356, ARM_SMMLA = 357, ARM_SMMLAR = 358, ARM_SMMLS = 359, ARM_SMMLSR = 360, ARM_SMMUL = 361, ARM_SMMULR = 362, ARM_SMUAD = 363, ARM_SMUADX = 364, ARM_SMULBB = 365, ARM_SMULBT = 366, ARM_SMULL = 367, ARM_SMULLv5 = 368, ARM_SMULTB = 369, ARM_SMULTT = 370, ARM_SMULWB = 371, ARM_SMULWT = 372, ARM_SMUSD = 373, ARM_SMUSDX = 374, ARM_SPACE = 375, ARM_SRSDA = 376, ARM_SRSDA_UPD = 377, ARM_SRSDB = 378, ARM_SRSDB_UPD = 379, ARM_SRSIA = 380, ARM_SRSIA_UPD = 381, ARM_SRSIB = 382, ARM_SRSIB_UPD = 383, ARM_SSAT = 384, ARM_SSAT16 = 385, ARM_SSAX = 386, ARM_SSUB16 = 387, ARM_SSUB8 = 388, ARM_STC2L_OFFSET = 389, ARM_STC2L_OPTION = 390, ARM_STC2L_POST = 391, ARM_STC2L_PRE = 392, ARM_STC2_OFFSET = 393, ARM_STC2_OPTION = 394, ARM_STC2_POST = 395, ARM_STC2_PRE = 396, ARM_STCL_OFFSET = 397, ARM_STCL_OPTION = 398, ARM_STCL_POST = 399, ARM_STCL_PRE = 400, ARM_STC_OFFSET = 401, ARM_STC_OPTION = 402, ARM_STC_POST = 403, ARM_STC_PRE = 404, ARM_STL = 405, ARM_STLB = 406, ARM_STLEX = 407, ARM_STLEXB = 408, ARM_STLEXD = 409, ARM_STLEXH = 410, ARM_STLH = 411, ARM_STMDA = 412, ARM_STMDA_UPD = 413, ARM_STMDB = 414, ARM_STMDB_UPD = 415, ARM_STMIA = 416, ARM_STMIA_UPD = 417, ARM_STMIB = 418, ARM_STMIB_UPD = 419, ARM_STRBT_POST = 420, ARM_STRBT_POST_IMM = 421, ARM_STRBT_POST_REG = 422, ARM_STRB_POST_IMM = 423, ARM_STRB_POST_REG = 424, ARM_STRB_PRE_IMM = 425, ARM_STRB_PRE_REG = 426, ARM_STRBi12 = 427, ARM_STRBi_preidx = 428, ARM_STRBr_preidx = 429, ARM_STRBrs = 430, ARM_STRD = 431, ARM_STRD_POST = 432, ARM_STRD_PRE = 433, ARM_STREX = 434, ARM_STREXB = 435, ARM_STREXD = 436, ARM_STREXH = 437, ARM_STRH = 438, ARM_STRHTi = 439, ARM_STRHTr = 440, ARM_STRH_POST = 441, ARM_STRH_PRE = 442, ARM_STRH_preidx = 443, ARM_STRT_POST = 444, ARM_STRT_POST_IMM = 445, ARM_STRT_POST_REG = 446, ARM_STR_POST_IMM = 447, ARM_STR_POST_REG = 448, ARM_STR_PRE_IMM = 449, ARM_STR_PRE_REG = 450, ARM_STRi12 = 451, ARM_STRi_preidx = 452, ARM_STRr_preidx = 453, ARM_STRrs = 454, ARM_SUBS_PC_LR = 455, ARM_SUBSri = 456, ARM_SUBSrr = 457, ARM_SUBSrsi = 458, ARM_SUBSrsr = 459, ARM_SUBri = 460, ARM_SUBrr = 461, ARM_SUBrsi = 462, ARM_SUBrsr = 463, ARM_SVC = 464, ARM_SWP = 465, ARM_SWPB = 466, ARM_SXTAB = 467, ARM_SXTAB16 = 468, ARM_SXTAH = 469, ARM_SXTB = 470, ARM_SXTB16 = 471, ARM_SXTH = 472, ARM_TAILJMPd = 473, ARM_TAILJMPr = 474, ARM_TCRETURNdi = 475, ARM_TCRETURNri = 476, ARM_TEQri = 477, ARM_TEQrr = 478, ARM_TEQrsi = 479, ARM_TEQrsr = 480, ARM_TPsoft = 481, ARM_TRAP = 482, ARM_TRAPNaCl = 483, ARM_TSTri = 484, ARM_TSTrr = 485, ARM_TSTrsi = 486, ARM_TSTrsr = 487, ARM_UADD16 = 488, ARM_UADD8 = 489, ARM_UASX = 490, ARM_UBFX = 491, ARM_UDF = 492, ARM_UDIV = 493, ARM_UHADD16 = 494, ARM_UHADD8 = 495, ARM_UHASX = 496, ARM_UHSAX = 497, ARM_UHSUB16 = 498, ARM_UHSUB8 = 499, ARM_UMAAL = 500, ARM_UMLAL = 501, ARM_UMLALv5 = 502, ARM_UMULL = 503, ARM_UMULLv5 = 504, ARM_UQADD16 = 505, ARM_UQADD8 = 506, ARM_UQASX = 507, ARM_UQSAX = 508, ARM_UQSUB16 = 509, ARM_UQSUB8 = 510, ARM_USAD8 = 511, ARM_USADA8 = 512, ARM_USAT = 513, ARM_USAT16 = 514, ARM_USAX = 515, ARM_USUB16 = 516, ARM_USUB8 = 517, ARM_UXTAB = 518, ARM_UXTAB16 = 519, ARM_UXTAH = 520, ARM_UXTB = 521, ARM_UXTB16 = 522, ARM_UXTH = 523, ARM_VABALsv2i64 = 524, ARM_VABALsv4i32 = 525, ARM_VABALsv8i16 = 526, ARM_VABALuv2i64 = 527, ARM_VABALuv4i32 = 528, ARM_VABALuv8i16 = 529, ARM_VABAsv16i8 = 530, ARM_VABAsv2i32 = 531, ARM_VABAsv4i16 = 532, ARM_VABAsv4i32 = 533, ARM_VABAsv8i16 = 534, ARM_VABAsv8i8 = 535, ARM_VABAuv16i8 = 536, ARM_VABAuv2i32 = 537, ARM_VABAuv4i16 = 538, ARM_VABAuv4i32 = 539, ARM_VABAuv8i16 = 540, ARM_VABAuv8i8 = 541, ARM_VABDLsv2i64 = 542, ARM_VABDLsv4i32 = 543, ARM_VABDLsv8i16 = 544, ARM_VABDLuv2i64 = 545, ARM_VABDLuv4i32 = 546, ARM_VABDLuv8i16 = 547, ARM_VABDfd = 548, ARM_VABDfq = 549, ARM_VABDsv16i8 = 550, ARM_VABDsv2i32 = 551, ARM_VABDsv4i16 = 552, ARM_VABDsv4i32 = 553, ARM_VABDsv8i16 = 554, ARM_VABDsv8i8 = 555, ARM_VABDuv16i8 = 556, ARM_VABDuv2i32 = 557, ARM_VABDuv4i16 = 558, ARM_VABDuv4i32 = 559, ARM_VABDuv8i16 = 560, ARM_VABDuv8i8 = 561, ARM_VABSD = 562, ARM_VABSS = 563, ARM_VABSfd = 564, ARM_VABSfq = 565, ARM_VABSv16i8 = 566, ARM_VABSv2i32 = 567, ARM_VABSv4i16 = 568, ARM_VABSv4i32 = 569, ARM_VABSv8i16 = 570, ARM_VABSv8i8 = 571, ARM_VACGEd = 572, ARM_VACGEq = 573, ARM_VACGTd = 574, ARM_VACGTq = 575, ARM_VADDD = 576, ARM_VADDHNv2i32 = 577, ARM_VADDHNv4i16 = 578, ARM_VADDHNv8i8 = 579, ARM_VADDLsv2i64 = 580, ARM_VADDLsv4i32 = 581, ARM_VADDLsv8i16 = 582, ARM_VADDLuv2i64 = 583, ARM_VADDLuv4i32 = 584, ARM_VADDLuv8i16 = 585, ARM_VADDS = 586, ARM_VADDWsv2i64 = 587, ARM_VADDWsv4i32 = 588, ARM_VADDWsv8i16 = 589, ARM_VADDWuv2i64 = 590, ARM_VADDWuv4i32 = 591, ARM_VADDWuv8i16 = 592, ARM_VADDfd = 593, ARM_VADDfq = 594, ARM_VADDv16i8 = 595, ARM_VADDv1i64 = 596, ARM_VADDv2i32 = 597, ARM_VADDv2i64 = 598, ARM_VADDv4i16 = 599, ARM_VADDv4i32 = 600, ARM_VADDv8i16 = 601, ARM_VADDv8i8 = 602, ARM_VANDd = 603, ARM_VANDq = 604, ARM_VBICd = 605, ARM_VBICiv2i32 = 606, ARM_VBICiv4i16 = 607, ARM_VBICiv4i32 = 608, ARM_VBICiv8i16 = 609, ARM_VBICq = 610, ARM_VBIFd = 611, ARM_VBIFq = 612, ARM_VBITd = 613, ARM_VBITq = 614, ARM_VBSLd = 615, ARM_VBSLq = 616, ARM_VCEQfd = 617, ARM_VCEQfq = 618, ARM_VCEQv16i8 = 619, ARM_VCEQv2i32 = 620, ARM_VCEQv4i16 = 621, ARM_VCEQv4i32 = 622, ARM_VCEQv8i16 = 623, ARM_VCEQv8i8 = 624, ARM_VCEQzv16i8 = 625, ARM_VCEQzv2f32 = 626, ARM_VCEQzv2i32 = 627, ARM_VCEQzv4f32 = 628, ARM_VCEQzv4i16 = 629, ARM_VCEQzv4i32 = 630, ARM_VCEQzv8i16 = 631, ARM_VCEQzv8i8 = 632, ARM_VCGEfd = 633, ARM_VCGEfq = 634, ARM_VCGEsv16i8 = 635, ARM_VCGEsv2i32 = 636, ARM_VCGEsv4i16 = 637, ARM_VCGEsv4i32 = 638, ARM_VCGEsv8i16 = 639, ARM_VCGEsv8i8 = 640, ARM_VCGEuv16i8 = 641, ARM_VCGEuv2i32 = 642, ARM_VCGEuv4i16 = 643, ARM_VCGEuv4i32 = 644, ARM_VCGEuv8i16 = 645, ARM_VCGEuv8i8 = 646, ARM_VCGEzv16i8 = 647, ARM_VCGEzv2f32 = 648, ARM_VCGEzv2i32 = 649, ARM_VCGEzv4f32 = 650, ARM_VCGEzv4i16 = 651, ARM_VCGEzv4i32 = 652, ARM_VCGEzv8i16 = 653, ARM_VCGEzv8i8 = 654, ARM_VCGTfd = 655, ARM_VCGTfq = 656, ARM_VCGTsv16i8 = 657, ARM_VCGTsv2i32 = 658, ARM_VCGTsv4i16 = 659, ARM_VCGTsv4i32 = 660, ARM_VCGTsv8i16 = 661, ARM_VCGTsv8i8 = 662, ARM_VCGTuv16i8 = 663, ARM_VCGTuv2i32 = 664, ARM_VCGTuv4i16 = 665, ARM_VCGTuv4i32 = 666, ARM_VCGTuv8i16 = 667, ARM_VCGTuv8i8 = 668, ARM_VCGTzv16i8 = 669, ARM_VCGTzv2f32 = 670, ARM_VCGTzv2i32 = 671, ARM_VCGTzv4f32 = 672, ARM_VCGTzv4i16 = 673, ARM_VCGTzv4i32 = 674, ARM_VCGTzv8i16 = 675, ARM_VCGTzv8i8 = 676, ARM_VCLEzv16i8 = 677, ARM_VCLEzv2f32 = 678, ARM_VCLEzv2i32 = 679, ARM_VCLEzv4f32 = 680, ARM_VCLEzv4i16 = 681, ARM_VCLEzv4i32 = 682, ARM_VCLEzv8i16 = 683, ARM_VCLEzv8i8 = 684, ARM_VCLSv16i8 = 685, ARM_VCLSv2i32 = 686, ARM_VCLSv4i16 = 687, ARM_VCLSv4i32 = 688, ARM_VCLSv8i16 = 689, ARM_VCLSv8i8 = 690, ARM_VCLTzv16i8 = 691, ARM_VCLTzv2f32 = 692, ARM_VCLTzv2i32 = 693, ARM_VCLTzv4f32 = 694, ARM_VCLTzv4i16 = 695, ARM_VCLTzv4i32 = 696, ARM_VCLTzv8i16 = 697, ARM_VCLTzv8i8 = 698, ARM_VCLZv16i8 = 699, ARM_VCLZv2i32 = 700, ARM_VCLZv4i16 = 701, ARM_VCLZv4i32 = 702, ARM_VCLZv8i16 = 703, ARM_VCLZv8i8 = 704, ARM_VCMPD = 705, ARM_VCMPED = 706, ARM_VCMPES = 707, ARM_VCMPEZD = 708, ARM_VCMPEZS = 709, ARM_VCMPS = 710, ARM_VCMPZD = 711, ARM_VCMPZS = 712, ARM_VCNTd = 713, ARM_VCNTq = 714, ARM_VCVTANSD = 715, ARM_VCVTANSQ = 716, ARM_VCVTANUD = 717, ARM_VCVTANUQ = 718, ARM_VCVTASD = 719, ARM_VCVTASS = 720, ARM_VCVTAUD = 721, ARM_VCVTAUS = 722, ARM_VCVTBDH = 723, ARM_VCVTBHD = 724, ARM_VCVTBHS = 725, ARM_VCVTBSH = 726, ARM_VCVTDS = 727, ARM_VCVTMNSD = 728, ARM_VCVTMNSQ = 729, ARM_VCVTMNUD = 730, ARM_VCVTMNUQ = 731, ARM_VCVTMSD = 732, ARM_VCVTMSS = 733, ARM_VCVTMUD = 734, ARM_VCVTMUS = 735, ARM_VCVTNNSD = 736, ARM_VCVTNNSQ = 737, ARM_VCVTNNUD = 738, ARM_VCVTNNUQ = 739, ARM_VCVTNSD = 740, ARM_VCVTNSS = 741, ARM_VCVTNUD = 742, ARM_VCVTNUS = 743, ARM_VCVTPNSD = 744, ARM_VCVTPNSQ = 745, ARM_VCVTPNUD = 746, ARM_VCVTPNUQ = 747, ARM_VCVTPSD = 748, ARM_VCVTPSS = 749, ARM_VCVTPUD = 750, ARM_VCVTPUS = 751, ARM_VCVTSD = 752, ARM_VCVTTDH = 753, ARM_VCVTTHD = 754, ARM_VCVTTHS = 755, ARM_VCVTTSH = 756, ARM_VCVTf2h = 757, ARM_VCVTf2sd = 758, ARM_VCVTf2sq = 759, ARM_VCVTf2ud = 760, ARM_VCVTf2uq = 761, ARM_VCVTf2xsd = 762, ARM_VCVTf2xsq = 763, ARM_VCVTf2xud = 764, ARM_VCVTf2xuq = 765, ARM_VCVTh2f = 766, ARM_VCVTs2fd = 767, ARM_VCVTs2fq = 768, ARM_VCVTu2fd = 769, ARM_VCVTu2fq = 770, ARM_VCVTxs2fd = 771, ARM_VCVTxs2fq = 772, ARM_VCVTxu2fd = 773, ARM_VCVTxu2fq = 774, ARM_VDIVD = 775, ARM_VDIVS = 776, ARM_VDUP16d = 777, ARM_VDUP16q = 778, ARM_VDUP32d = 779, ARM_VDUP32q = 780, ARM_VDUP8d = 781, ARM_VDUP8q = 782, ARM_VDUPLN16d = 783, ARM_VDUPLN16q = 784, ARM_VDUPLN32d = 785, ARM_VDUPLN32q = 786, ARM_VDUPLN8d = 787, ARM_VDUPLN8q = 788, ARM_VEORd = 789, ARM_VEORq = 790, ARM_VEXTd16 = 791, ARM_VEXTd32 = 792, ARM_VEXTd8 = 793, ARM_VEXTq16 = 794, ARM_VEXTq32 = 795, ARM_VEXTq64 = 796, ARM_VEXTq8 = 797, ARM_VFMAD = 798, ARM_VFMAS = 799, ARM_VFMAfd = 800, ARM_VFMAfq = 801, ARM_VFMSD = 802, ARM_VFMSS = 803, ARM_VFMSfd = 804, ARM_VFMSfq = 805, ARM_VFNMAD = 806, ARM_VFNMAS = 807, ARM_VFNMSD = 808, ARM_VFNMSS = 809, ARM_VGETLNi32 = 810, ARM_VGETLNs16 = 811, ARM_VGETLNs8 = 812, ARM_VGETLNu16 = 813, ARM_VGETLNu8 = 814, ARM_VHADDsv16i8 = 815, ARM_VHADDsv2i32 = 816, ARM_VHADDsv4i16 = 817, ARM_VHADDsv4i32 = 818, ARM_VHADDsv8i16 = 819, ARM_VHADDsv8i8 = 820, ARM_VHADDuv16i8 = 821, ARM_VHADDuv2i32 = 822, ARM_VHADDuv4i16 = 823, ARM_VHADDuv4i32 = 824, ARM_VHADDuv8i16 = 825, ARM_VHADDuv8i8 = 826, ARM_VHSUBsv16i8 = 827, ARM_VHSUBsv2i32 = 828, ARM_VHSUBsv4i16 = 829, ARM_VHSUBsv4i32 = 830, ARM_VHSUBsv8i16 = 831, ARM_VHSUBsv8i8 = 832, ARM_VHSUBuv16i8 = 833, ARM_VHSUBuv2i32 = 834, ARM_VHSUBuv4i16 = 835, ARM_VHSUBuv4i32 = 836, ARM_VHSUBuv8i16 = 837, ARM_VHSUBuv8i8 = 838, ARM_VLD1DUPd16 = 839, ARM_VLD1DUPd16wb_fixed = 840, ARM_VLD1DUPd16wb_register = 841, ARM_VLD1DUPd32 = 842, ARM_VLD1DUPd32wb_fixed = 843, ARM_VLD1DUPd32wb_register = 844, ARM_VLD1DUPd8 = 845, ARM_VLD1DUPd8wb_fixed = 846, ARM_VLD1DUPd8wb_register = 847, ARM_VLD1DUPq16 = 848, ARM_VLD1DUPq16wb_fixed = 849, ARM_VLD1DUPq16wb_register = 850, ARM_VLD1DUPq32 = 851, ARM_VLD1DUPq32wb_fixed = 852, ARM_VLD1DUPq32wb_register = 853, ARM_VLD1DUPq8 = 854, ARM_VLD1DUPq8wb_fixed = 855, ARM_VLD1DUPq8wb_register = 856, ARM_VLD1LNd16 = 857, ARM_VLD1LNd16_UPD = 858, ARM_VLD1LNd32 = 859, ARM_VLD1LNd32_UPD = 860, ARM_VLD1LNd8 = 861, ARM_VLD1LNd8_UPD = 862, ARM_VLD1LNdAsm_16 = 863, ARM_VLD1LNdAsm_32 = 864, ARM_VLD1LNdAsm_8 = 865, ARM_VLD1LNdWB_fixed_Asm_16 = 866, ARM_VLD1LNdWB_fixed_Asm_32 = 867, ARM_VLD1LNdWB_fixed_Asm_8 = 868, ARM_VLD1LNdWB_register_Asm_16 = 869, ARM_VLD1LNdWB_register_Asm_32 = 870, ARM_VLD1LNdWB_register_Asm_8 = 871, ARM_VLD1LNq16Pseudo = 872, ARM_VLD1LNq16Pseudo_UPD = 873, ARM_VLD1LNq32Pseudo = 874, ARM_VLD1LNq32Pseudo_UPD = 875, ARM_VLD1LNq8Pseudo = 876, ARM_VLD1LNq8Pseudo_UPD = 877, ARM_VLD1d16 = 878, ARM_VLD1d16Q = 879, ARM_VLD1d16Qwb_fixed = 880, ARM_VLD1d16Qwb_register = 881, ARM_VLD1d16T = 882, ARM_VLD1d16Twb_fixed = 883, ARM_VLD1d16Twb_register = 884, ARM_VLD1d16wb_fixed = 885, ARM_VLD1d16wb_register = 886, ARM_VLD1d32 = 887, ARM_VLD1d32Q = 888, ARM_VLD1d32Qwb_fixed = 889, ARM_VLD1d32Qwb_register = 890, ARM_VLD1d32T = 891, ARM_VLD1d32Twb_fixed = 892, ARM_VLD1d32Twb_register = 893, ARM_VLD1d32wb_fixed = 894, ARM_VLD1d32wb_register = 895, ARM_VLD1d64 = 896, ARM_VLD1d64Q = 897, ARM_VLD1d64QPseudo = 898, ARM_VLD1d64QPseudoWB_fixed = 899, ARM_VLD1d64QPseudoWB_register = 900, ARM_VLD1d64Qwb_fixed = 901, ARM_VLD1d64Qwb_register = 902, ARM_VLD1d64T = 903, ARM_VLD1d64TPseudo = 904, ARM_VLD1d64TPseudoWB_fixed = 905, ARM_VLD1d64TPseudoWB_register = 906, ARM_VLD1d64Twb_fixed = 907, ARM_VLD1d64Twb_register = 908, ARM_VLD1d64wb_fixed = 909, ARM_VLD1d64wb_register = 910, ARM_VLD1d8 = 911, ARM_VLD1d8Q = 912, ARM_VLD1d8Qwb_fixed = 913, ARM_VLD1d8Qwb_register = 914, ARM_VLD1d8T = 915, ARM_VLD1d8Twb_fixed = 916, ARM_VLD1d8Twb_register = 917, ARM_VLD1d8wb_fixed = 918, ARM_VLD1d8wb_register = 919, ARM_VLD1q16 = 920, ARM_VLD1q16wb_fixed = 921, ARM_VLD1q16wb_register = 922, ARM_VLD1q32 = 923, ARM_VLD1q32wb_fixed = 924, ARM_VLD1q32wb_register = 925, ARM_VLD1q64 = 926, ARM_VLD1q64wb_fixed = 927, ARM_VLD1q64wb_register = 928, ARM_VLD1q8 = 929, ARM_VLD1q8wb_fixed = 930, ARM_VLD1q8wb_register = 931, ARM_VLD2DUPd16 = 932, ARM_VLD2DUPd16wb_fixed = 933, ARM_VLD2DUPd16wb_register = 934, ARM_VLD2DUPd16x2 = 935, ARM_VLD2DUPd16x2wb_fixed = 936, ARM_VLD2DUPd16x2wb_register = 937, ARM_VLD2DUPd32 = 938, ARM_VLD2DUPd32wb_fixed = 939, ARM_VLD2DUPd32wb_register = 940, ARM_VLD2DUPd32x2 = 941, ARM_VLD2DUPd32x2wb_fixed = 942, ARM_VLD2DUPd32x2wb_register = 943, ARM_VLD2DUPd8 = 944, ARM_VLD2DUPd8wb_fixed = 945, ARM_VLD2DUPd8wb_register = 946, ARM_VLD2DUPd8x2 = 947, ARM_VLD2DUPd8x2wb_fixed = 948, ARM_VLD2DUPd8x2wb_register = 949, ARM_VLD2LNd16 = 950, ARM_VLD2LNd16Pseudo = 951, ARM_VLD2LNd16Pseudo_UPD = 952, ARM_VLD2LNd16_UPD = 953, ARM_VLD2LNd32 = 954, ARM_VLD2LNd32Pseudo = 955, ARM_VLD2LNd32Pseudo_UPD = 956, ARM_VLD2LNd32_UPD = 957, ARM_VLD2LNd8 = 958, ARM_VLD2LNd8Pseudo = 959, ARM_VLD2LNd8Pseudo_UPD = 960, ARM_VLD2LNd8_UPD = 961, ARM_VLD2LNdAsm_16 = 962, ARM_VLD2LNdAsm_32 = 963, ARM_VLD2LNdAsm_8 = 964, ARM_VLD2LNdWB_fixed_Asm_16 = 965, ARM_VLD2LNdWB_fixed_Asm_32 = 966, ARM_VLD2LNdWB_fixed_Asm_8 = 967, ARM_VLD2LNdWB_register_Asm_16 = 968, ARM_VLD2LNdWB_register_Asm_32 = 969, ARM_VLD2LNdWB_register_Asm_8 = 970, ARM_VLD2LNq16 = 971, ARM_VLD2LNq16Pseudo = 972, ARM_VLD2LNq16Pseudo_UPD = 973, ARM_VLD2LNq16_UPD = 974, ARM_VLD2LNq32 = 975, ARM_VLD2LNq32Pseudo = 976, ARM_VLD2LNq32Pseudo_UPD = 977, ARM_VLD2LNq32_UPD = 978, ARM_VLD2LNqAsm_16 = 979, ARM_VLD2LNqAsm_32 = 980, ARM_VLD2LNqWB_fixed_Asm_16 = 981, ARM_VLD2LNqWB_fixed_Asm_32 = 982, ARM_VLD2LNqWB_register_Asm_16 = 983, ARM_VLD2LNqWB_register_Asm_32 = 984, ARM_VLD2b16 = 985, ARM_VLD2b16wb_fixed = 986, ARM_VLD2b16wb_register = 987, ARM_VLD2b32 = 988, ARM_VLD2b32wb_fixed = 989, ARM_VLD2b32wb_register = 990, ARM_VLD2b8 = 991, ARM_VLD2b8wb_fixed = 992, ARM_VLD2b8wb_register = 993, ARM_VLD2d16 = 994, ARM_VLD2d16wb_fixed = 995, ARM_VLD2d16wb_register = 996, ARM_VLD2d32 = 997, ARM_VLD2d32wb_fixed = 998, ARM_VLD2d32wb_register = 999, ARM_VLD2d8 = 1000, ARM_VLD2d8wb_fixed = 1001, ARM_VLD2d8wb_register = 1002, ARM_VLD2q16 = 1003, ARM_VLD2q16Pseudo = 1004, ARM_VLD2q16PseudoWB_fixed = 1005, ARM_VLD2q16PseudoWB_register = 1006, ARM_VLD2q16wb_fixed = 1007, ARM_VLD2q16wb_register = 1008, ARM_VLD2q32 = 1009, ARM_VLD2q32Pseudo = 1010, ARM_VLD2q32PseudoWB_fixed = 1011, ARM_VLD2q32PseudoWB_register = 1012, ARM_VLD2q32wb_fixed = 1013, ARM_VLD2q32wb_register = 1014, ARM_VLD2q8 = 1015, ARM_VLD2q8Pseudo = 1016, ARM_VLD2q8PseudoWB_fixed = 1017, ARM_VLD2q8PseudoWB_register = 1018, ARM_VLD2q8wb_fixed = 1019, ARM_VLD2q8wb_register = 1020, ARM_VLD3DUPd16 = 1021, ARM_VLD3DUPd16Pseudo = 1022, ARM_VLD3DUPd16Pseudo_UPD = 1023, ARM_VLD3DUPd16_UPD = 1024, ARM_VLD3DUPd32 = 1025, ARM_VLD3DUPd32Pseudo = 1026, ARM_VLD3DUPd32Pseudo_UPD = 1027, ARM_VLD3DUPd32_UPD = 1028, ARM_VLD3DUPd8 = 1029, ARM_VLD3DUPd8Pseudo = 1030, ARM_VLD3DUPd8Pseudo_UPD = 1031, ARM_VLD3DUPd8_UPD = 1032, ARM_VLD3DUPdAsm_16 = 1033, ARM_VLD3DUPdAsm_32 = 1034, ARM_VLD3DUPdAsm_8 = 1035, ARM_VLD3DUPdWB_fixed_Asm_16 = 1036, ARM_VLD3DUPdWB_fixed_Asm_32 = 1037, ARM_VLD3DUPdWB_fixed_Asm_8 = 1038, ARM_VLD3DUPdWB_register_Asm_16 = 1039, ARM_VLD3DUPdWB_register_Asm_32 = 1040, ARM_VLD3DUPdWB_register_Asm_8 = 1041, ARM_VLD3DUPq16 = 1042, ARM_VLD3DUPq16_UPD = 1043, ARM_VLD3DUPq32 = 1044, ARM_VLD3DUPq32_UPD = 1045, ARM_VLD3DUPq8 = 1046, ARM_VLD3DUPq8_UPD = 1047, ARM_VLD3DUPqAsm_16 = 1048, ARM_VLD3DUPqAsm_32 = 1049, ARM_VLD3DUPqAsm_8 = 1050, ARM_VLD3DUPqWB_fixed_Asm_16 = 1051, ARM_VLD3DUPqWB_fixed_Asm_32 = 1052, ARM_VLD3DUPqWB_fixed_Asm_8 = 1053, ARM_VLD3DUPqWB_register_Asm_16 = 1054, ARM_VLD3DUPqWB_register_Asm_32 = 1055, ARM_VLD3DUPqWB_register_Asm_8 = 1056, ARM_VLD3LNd16 = 1057, ARM_VLD3LNd16Pseudo = 1058, ARM_VLD3LNd16Pseudo_UPD = 1059, ARM_VLD3LNd16_UPD = 1060, ARM_VLD3LNd32 = 1061, ARM_VLD3LNd32Pseudo = 1062, ARM_VLD3LNd32Pseudo_UPD = 1063, ARM_VLD3LNd32_UPD = 1064, ARM_VLD3LNd8 = 1065, ARM_VLD3LNd8Pseudo = 1066, ARM_VLD3LNd8Pseudo_UPD = 1067, ARM_VLD3LNd8_UPD = 1068, ARM_VLD3LNdAsm_16 = 1069, ARM_VLD3LNdAsm_32 = 1070, ARM_VLD3LNdAsm_8 = 1071, ARM_VLD3LNdWB_fixed_Asm_16 = 1072, ARM_VLD3LNdWB_fixed_Asm_32 = 1073, ARM_VLD3LNdWB_fixed_Asm_8 = 1074, ARM_VLD3LNdWB_register_Asm_16 = 1075, ARM_VLD3LNdWB_register_Asm_32 = 1076, ARM_VLD3LNdWB_register_Asm_8 = 1077, ARM_VLD3LNq16 = 1078, ARM_VLD3LNq16Pseudo = 1079, ARM_VLD3LNq16Pseudo_UPD = 1080, ARM_VLD3LNq16_UPD = 1081, ARM_VLD3LNq32 = 1082, ARM_VLD3LNq32Pseudo = 1083, ARM_VLD3LNq32Pseudo_UPD = 1084, ARM_VLD3LNq32_UPD = 1085, ARM_VLD3LNqAsm_16 = 1086, ARM_VLD3LNqAsm_32 = 1087, ARM_VLD3LNqWB_fixed_Asm_16 = 1088, ARM_VLD3LNqWB_fixed_Asm_32 = 1089, ARM_VLD3LNqWB_register_Asm_16 = 1090, ARM_VLD3LNqWB_register_Asm_32 = 1091, ARM_VLD3d16 = 1092, ARM_VLD3d16Pseudo = 1093, ARM_VLD3d16Pseudo_UPD = 1094, ARM_VLD3d16_UPD = 1095, ARM_VLD3d32 = 1096, ARM_VLD3d32Pseudo = 1097, ARM_VLD3d32Pseudo_UPD = 1098, ARM_VLD3d32_UPD = 1099, ARM_VLD3d8 = 1100, ARM_VLD3d8Pseudo = 1101, ARM_VLD3d8Pseudo_UPD = 1102, ARM_VLD3d8_UPD = 1103, ARM_VLD3dAsm_16 = 1104, ARM_VLD3dAsm_32 = 1105, ARM_VLD3dAsm_8 = 1106, ARM_VLD3dWB_fixed_Asm_16 = 1107, ARM_VLD3dWB_fixed_Asm_32 = 1108, ARM_VLD3dWB_fixed_Asm_8 = 1109, ARM_VLD3dWB_register_Asm_16 = 1110, ARM_VLD3dWB_register_Asm_32 = 1111, ARM_VLD3dWB_register_Asm_8 = 1112, ARM_VLD3q16 = 1113, ARM_VLD3q16Pseudo_UPD = 1114, ARM_VLD3q16_UPD = 1115, ARM_VLD3q16oddPseudo = 1116, ARM_VLD3q16oddPseudo_UPD = 1117, ARM_VLD3q32 = 1118, ARM_VLD3q32Pseudo_UPD = 1119, ARM_VLD3q32_UPD = 1120, ARM_VLD3q32oddPseudo = 1121, ARM_VLD3q32oddPseudo_UPD = 1122, ARM_VLD3q8 = 1123, ARM_VLD3q8Pseudo_UPD = 1124, ARM_VLD3q8_UPD = 1125, ARM_VLD3q8oddPseudo = 1126, ARM_VLD3q8oddPseudo_UPD = 1127, ARM_VLD3qAsm_16 = 1128, ARM_VLD3qAsm_32 = 1129, ARM_VLD3qAsm_8 = 1130, ARM_VLD3qWB_fixed_Asm_16 = 1131, ARM_VLD3qWB_fixed_Asm_32 = 1132, ARM_VLD3qWB_fixed_Asm_8 = 1133, ARM_VLD3qWB_register_Asm_16 = 1134, ARM_VLD3qWB_register_Asm_32 = 1135, ARM_VLD3qWB_register_Asm_8 = 1136, ARM_VLD4DUPd16 = 1137, ARM_VLD4DUPd16Pseudo = 1138, ARM_VLD4DUPd16Pseudo_UPD = 1139, ARM_VLD4DUPd16_UPD = 1140, ARM_VLD4DUPd32 = 1141, ARM_VLD4DUPd32Pseudo = 1142, ARM_VLD4DUPd32Pseudo_UPD = 1143, ARM_VLD4DUPd32_UPD = 1144, ARM_VLD4DUPd8 = 1145, ARM_VLD4DUPd8Pseudo = 1146, ARM_VLD4DUPd8Pseudo_UPD = 1147, ARM_VLD4DUPd8_UPD = 1148, ARM_VLD4DUPdAsm_16 = 1149, ARM_VLD4DUPdAsm_32 = 1150, ARM_VLD4DUPdAsm_8 = 1151, ARM_VLD4DUPdWB_fixed_Asm_16 = 1152, ARM_VLD4DUPdWB_fixed_Asm_32 = 1153, ARM_VLD4DUPdWB_fixed_Asm_8 = 1154, ARM_VLD4DUPdWB_register_Asm_16 = 1155, ARM_VLD4DUPdWB_register_Asm_32 = 1156, ARM_VLD4DUPdWB_register_Asm_8 = 1157, ARM_VLD4DUPq16 = 1158, ARM_VLD4DUPq16_UPD = 1159, ARM_VLD4DUPq32 = 1160, ARM_VLD4DUPq32_UPD = 1161, ARM_VLD4DUPq8 = 1162, ARM_VLD4DUPq8_UPD = 1163, ARM_VLD4DUPqAsm_16 = 1164, ARM_VLD4DUPqAsm_32 = 1165, ARM_VLD4DUPqAsm_8 = 1166, ARM_VLD4DUPqWB_fixed_Asm_16 = 1167, ARM_VLD4DUPqWB_fixed_Asm_32 = 1168, ARM_VLD4DUPqWB_fixed_Asm_8 = 1169, ARM_VLD4DUPqWB_register_Asm_16 = 1170, ARM_VLD4DUPqWB_register_Asm_32 = 1171, ARM_VLD4DUPqWB_register_Asm_8 = 1172, ARM_VLD4LNd16 = 1173, ARM_VLD4LNd16Pseudo = 1174, ARM_VLD4LNd16Pseudo_UPD = 1175, ARM_VLD4LNd16_UPD = 1176, ARM_VLD4LNd32 = 1177, ARM_VLD4LNd32Pseudo = 1178, ARM_VLD4LNd32Pseudo_UPD = 1179, ARM_VLD4LNd32_UPD = 1180, ARM_VLD4LNd8 = 1181, ARM_VLD4LNd8Pseudo = 1182, ARM_VLD4LNd8Pseudo_UPD = 1183, ARM_VLD4LNd8_UPD = 1184, ARM_VLD4LNdAsm_16 = 1185, ARM_VLD4LNdAsm_32 = 1186, ARM_VLD4LNdAsm_8 = 1187, ARM_VLD4LNdWB_fixed_Asm_16 = 1188, ARM_VLD4LNdWB_fixed_Asm_32 = 1189, ARM_VLD4LNdWB_fixed_Asm_8 = 1190, ARM_VLD4LNdWB_register_Asm_16 = 1191, ARM_VLD4LNdWB_register_Asm_32 = 1192, ARM_VLD4LNdWB_register_Asm_8 = 1193, ARM_VLD4LNq16 = 1194, ARM_VLD4LNq16Pseudo = 1195, ARM_VLD4LNq16Pseudo_UPD = 1196, ARM_VLD4LNq16_UPD = 1197, ARM_VLD4LNq32 = 1198, ARM_VLD4LNq32Pseudo = 1199, ARM_VLD4LNq32Pseudo_UPD = 1200, ARM_VLD4LNq32_UPD = 1201, ARM_VLD4LNqAsm_16 = 1202, ARM_VLD4LNqAsm_32 = 1203, ARM_VLD4LNqWB_fixed_Asm_16 = 1204, ARM_VLD4LNqWB_fixed_Asm_32 = 1205, ARM_VLD4LNqWB_register_Asm_16 = 1206, ARM_VLD4LNqWB_register_Asm_32 = 1207, ARM_VLD4d16 = 1208, ARM_VLD4d16Pseudo = 1209, ARM_VLD4d16Pseudo_UPD = 1210, ARM_VLD4d16_UPD = 1211, ARM_VLD4d32 = 1212, ARM_VLD4d32Pseudo = 1213, ARM_VLD4d32Pseudo_UPD = 1214, ARM_VLD4d32_UPD = 1215, ARM_VLD4d8 = 1216, ARM_VLD4d8Pseudo = 1217, ARM_VLD4d8Pseudo_UPD = 1218, ARM_VLD4d8_UPD = 1219, ARM_VLD4dAsm_16 = 1220, ARM_VLD4dAsm_32 = 1221, ARM_VLD4dAsm_8 = 1222, ARM_VLD4dWB_fixed_Asm_16 = 1223, ARM_VLD4dWB_fixed_Asm_32 = 1224, ARM_VLD4dWB_fixed_Asm_8 = 1225, ARM_VLD4dWB_register_Asm_16 = 1226, ARM_VLD4dWB_register_Asm_32 = 1227, ARM_VLD4dWB_register_Asm_8 = 1228, ARM_VLD4q16 = 1229, ARM_VLD4q16Pseudo_UPD = 1230, ARM_VLD4q16_UPD = 1231, ARM_VLD4q16oddPseudo = 1232, ARM_VLD4q16oddPseudo_UPD = 1233, ARM_VLD4q32 = 1234, ARM_VLD4q32Pseudo_UPD = 1235, ARM_VLD4q32_UPD = 1236, ARM_VLD4q32oddPseudo = 1237, ARM_VLD4q32oddPseudo_UPD = 1238, ARM_VLD4q8 = 1239, ARM_VLD4q8Pseudo_UPD = 1240, ARM_VLD4q8_UPD = 1241, ARM_VLD4q8oddPseudo = 1242, ARM_VLD4q8oddPseudo_UPD = 1243, ARM_VLD4qAsm_16 = 1244, ARM_VLD4qAsm_32 = 1245, ARM_VLD4qAsm_8 = 1246, ARM_VLD4qWB_fixed_Asm_16 = 1247, ARM_VLD4qWB_fixed_Asm_32 = 1248, ARM_VLD4qWB_fixed_Asm_8 = 1249, ARM_VLD4qWB_register_Asm_16 = 1250, ARM_VLD4qWB_register_Asm_32 = 1251, ARM_VLD4qWB_register_Asm_8 = 1252, ARM_VLDMDDB_UPD = 1253, ARM_VLDMDIA = 1254, ARM_VLDMDIA_UPD = 1255, ARM_VLDMQIA = 1256, ARM_VLDMSDB_UPD = 1257, ARM_VLDMSIA = 1258, ARM_VLDMSIA_UPD = 1259, ARM_VLDRD = 1260, ARM_VLDRS = 1261, ARM_VMAXNMD = 1262, ARM_VMAXNMND = 1263, ARM_VMAXNMNQ = 1264, ARM_VMAXNMS = 1265, ARM_VMAXfd = 1266, ARM_VMAXfq = 1267, ARM_VMAXsv16i8 = 1268, ARM_VMAXsv2i32 = 1269, ARM_VMAXsv4i16 = 1270, ARM_VMAXsv4i32 = 1271, ARM_VMAXsv8i16 = 1272, ARM_VMAXsv8i8 = 1273, ARM_VMAXuv16i8 = 1274, ARM_VMAXuv2i32 = 1275, ARM_VMAXuv4i16 = 1276, ARM_VMAXuv4i32 = 1277, ARM_VMAXuv8i16 = 1278, ARM_VMAXuv8i8 = 1279, ARM_VMINNMD = 1280, ARM_VMINNMND = 1281, ARM_VMINNMNQ = 1282, ARM_VMINNMS = 1283, ARM_VMINfd = 1284, ARM_VMINfq = 1285, ARM_VMINsv16i8 = 1286, ARM_VMINsv2i32 = 1287, ARM_VMINsv4i16 = 1288, ARM_VMINsv4i32 = 1289, ARM_VMINsv8i16 = 1290, ARM_VMINsv8i8 = 1291, ARM_VMINuv16i8 = 1292, ARM_VMINuv2i32 = 1293, ARM_VMINuv4i16 = 1294, ARM_VMINuv4i32 = 1295, ARM_VMINuv8i16 = 1296, ARM_VMINuv8i8 = 1297, ARM_VMLAD = 1298, ARM_VMLALslsv2i32 = 1299, ARM_VMLALslsv4i16 = 1300, ARM_VMLALsluv2i32 = 1301, ARM_VMLALsluv4i16 = 1302, ARM_VMLALsv2i64 = 1303, ARM_VMLALsv4i32 = 1304, ARM_VMLALsv8i16 = 1305, ARM_VMLALuv2i64 = 1306, ARM_VMLALuv4i32 = 1307, ARM_VMLALuv8i16 = 1308, ARM_VMLAS = 1309, ARM_VMLAfd = 1310, ARM_VMLAfq = 1311, ARM_VMLAslfd = 1312, ARM_VMLAslfq = 1313, ARM_VMLAslv2i32 = 1314, ARM_VMLAslv4i16 = 1315, ARM_VMLAslv4i32 = 1316, ARM_VMLAslv8i16 = 1317, ARM_VMLAv16i8 = 1318, ARM_VMLAv2i32 = 1319, ARM_VMLAv4i16 = 1320, ARM_VMLAv4i32 = 1321, ARM_VMLAv8i16 = 1322, ARM_VMLAv8i8 = 1323, ARM_VMLSD = 1324, ARM_VMLSLslsv2i32 = 1325, ARM_VMLSLslsv4i16 = 1326, ARM_VMLSLsluv2i32 = 1327, ARM_VMLSLsluv4i16 = 1328, ARM_VMLSLsv2i64 = 1329, ARM_VMLSLsv4i32 = 1330, ARM_VMLSLsv8i16 = 1331, ARM_VMLSLuv2i64 = 1332, ARM_VMLSLuv4i32 = 1333, ARM_VMLSLuv8i16 = 1334, ARM_VMLSS = 1335, ARM_VMLSfd = 1336, ARM_VMLSfq = 1337, ARM_VMLSslfd = 1338, ARM_VMLSslfq = 1339, ARM_VMLSslv2i32 = 1340, ARM_VMLSslv4i16 = 1341, ARM_VMLSslv4i32 = 1342, ARM_VMLSslv8i16 = 1343, ARM_VMLSv16i8 = 1344, ARM_VMLSv2i32 = 1345, ARM_VMLSv4i16 = 1346, ARM_VMLSv4i32 = 1347, ARM_VMLSv8i16 = 1348, ARM_VMLSv8i8 = 1349, ARM_VMOVD = 1350, ARM_VMOVD0 = 1351, ARM_VMOVDRR = 1352, ARM_VMOVDcc = 1353, ARM_VMOVLsv2i64 = 1354, ARM_VMOVLsv4i32 = 1355, ARM_VMOVLsv8i16 = 1356, ARM_VMOVLuv2i64 = 1357, ARM_VMOVLuv4i32 = 1358, ARM_VMOVLuv8i16 = 1359, ARM_VMOVNv2i32 = 1360, ARM_VMOVNv4i16 = 1361, ARM_VMOVNv8i8 = 1362, ARM_VMOVQ0 = 1363, ARM_VMOVRRD = 1364, ARM_VMOVRRS = 1365, ARM_VMOVRS = 1366, ARM_VMOVS = 1367, ARM_VMOVSR = 1368, ARM_VMOVSRR = 1369, ARM_VMOVScc = 1370, ARM_VMOVv16i8 = 1371, ARM_VMOVv1i64 = 1372, ARM_VMOVv2f32 = 1373, ARM_VMOVv2i32 = 1374, ARM_VMOVv2i64 = 1375, ARM_VMOVv4f32 = 1376, ARM_VMOVv4i16 = 1377, ARM_VMOVv4i32 = 1378, ARM_VMOVv8i16 = 1379, ARM_VMOVv8i8 = 1380, ARM_VMRS = 1381, ARM_VMRS_FPEXC = 1382, ARM_VMRS_FPINST = 1383, ARM_VMRS_FPINST2 = 1384, ARM_VMRS_FPSID = 1385, ARM_VMRS_MVFR0 = 1386, ARM_VMRS_MVFR1 = 1387, ARM_VMRS_MVFR2 = 1388, ARM_VMSR = 1389, ARM_VMSR_FPEXC = 1390, ARM_VMSR_FPINST = 1391, ARM_VMSR_FPINST2 = 1392, ARM_VMSR_FPSID = 1393, ARM_VMULD = 1394, ARM_VMULLp64 = 1395, ARM_VMULLp8 = 1396, ARM_VMULLslsv2i32 = 1397, ARM_VMULLslsv4i16 = 1398, ARM_VMULLsluv2i32 = 1399, ARM_VMULLsluv4i16 = 1400, ARM_VMULLsv2i64 = 1401, ARM_VMULLsv4i32 = 1402, ARM_VMULLsv8i16 = 1403, ARM_VMULLuv2i64 = 1404, ARM_VMULLuv4i32 = 1405, ARM_VMULLuv8i16 = 1406, ARM_VMULS = 1407, ARM_VMULfd = 1408, ARM_VMULfq = 1409, ARM_VMULpd = 1410, ARM_VMULpq = 1411, ARM_VMULslfd = 1412, ARM_VMULslfq = 1413, ARM_VMULslv2i32 = 1414, ARM_VMULslv4i16 = 1415, ARM_VMULslv4i32 = 1416, ARM_VMULslv8i16 = 1417, ARM_VMULv16i8 = 1418, ARM_VMULv2i32 = 1419, ARM_VMULv4i16 = 1420, ARM_VMULv4i32 = 1421, ARM_VMULv8i16 = 1422, ARM_VMULv8i8 = 1423, ARM_VMVNd = 1424, ARM_VMVNq = 1425, ARM_VMVNv2i32 = 1426, ARM_VMVNv4i16 = 1427, ARM_VMVNv4i32 = 1428, ARM_VMVNv8i16 = 1429, ARM_VNEGD = 1430, ARM_VNEGS = 1431, ARM_VNEGf32q = 1432, ARM_VNEGfd = 1433, ARM_VNEGs16d = 1434, ARM_VNEGs16q = 1435, ARM_VNEGs32d = 1436, ARM_VNEGs32q = 1437, ARM_VNEGs8d = 1438, ARM_VNEGs8q = 1439, ARM_VNMLAD = 1440, ARM_VNMLAS = 1441, ARM_VNMLSD = 1442, ARM_VNMLSS = 1443, ARM_VNMULD = 1444, ARM_VNMULS = 1445, ARM_VORNd = 1446, ARM_VORNq = 1447, ARM_VORRd = 1448, ARM_VORRiv2i32 = 1449, ARM_VORRiv4i16 = 1450, ARM_VORRiv4i32 = 1451, ARM_VORRiv8i16 = 1452, ARM_VORRq = 1453, ARM_VPADALsv16i8 = 1454, ARM_VPADALsv2i32 = 1455, ARM_VPADALsv4i16 = 1456, ARM_VPADALsv4i32 = 1457, ARM_VPADALsv8i16 = 1458, ARM_VPADALsv8i8 = 1459, ARM_VPADALuv16i8 = 1460, ARM_VPADALuv2i32 = 1461, ARM_VPADALuv4i16 = 1462, ARM_VPADALuv4i32 = 1463, ARM_VPADALuv8i16 = 1464, ARM_VPADALuv8i8 = 1465, ARM_VPADDLsv16i8 = 1466, ARM_VPADDLsv2i32 = 1467, ARM_VPADDLsv4i16 = 1468, ARM_VPADDLsv4i32 = 1469, ARM_VPADDLsv8i16 = 1470, ARM_VPADDLsv8i8 = 1471, ARM_VPADDLuv16i8 = 1472, ARM_VPADDLuv2i32 = 1473, ARM_VPADDLuv4i16 = 1474, ARM_VPADDLuv4i32 = 1475, ARM_VPADDLuv8i16 = 1476, ARM_VPADDLuv8i8 = 1477, ARM_VPADDf = 1478, ARM_VPADDi16 = 1479, ARM_VPADDi32 = 1480, ARM_VPADDi8 = 1481, ARM_VPMAXf = 1482, ARM_VPMAXs16 = 1483, ARM_VPMAXs32 = 1484, ARM_VPMAXs8 = 1485, ARM_VPMAXu16 = 1486, ARM_VPMAXu32 = 1487, ARM_VPMAXu8 = 1488, ARM_VPMINf = 1489, ARM_VPMINs16 = 1490, ARM_VPMINs32 = 1491, ARM_VPMINs8 = 1492, ARM_VPMINu16 = 1493, ARM_VPMINu32 = 1494, ARM_VPMINu8 = 1495, ARM_VQABSv16i8 = 1496, ARM_VQABSv2i32 = 1497, ARM_VQABSv4i16 = 1498, ARM_VQABSv4i32 = 1499, ARM_VQABSv8i16 = 1500, ARM_VQABSv8i8 = 1501, ARM_VQADDsv16i8 = 1502, ARM_VQADDsv1i64 = 1503, ARM_VQADDsv2i32 = 1504, ARM_VQADDsv2i64 = 1505, ARM_VQADDsv4i16 = 1506, ARM_VQADDsv4i32 = 1507, ARM_VQADDsv8i16 = 1508, ARM_VQADDsv8i8 = 1509, ARM_VQADDuv16i8 = 1510, ARM_VQADDuv1i64 = 1511, ARM_VQADDuv2i32 = 1512, ARM_VQADDuv2i64 = 1513, ARM_VQADDuv4i16 = 1514, ARM_VQADDuv4i32 = 1515, ARM_VQADDuv8i16 = 1516, ARM_VQADDuv8i8 = 1517, ARM_VQDMLALslv2i32 = 1518, ARM_VQDMLALslv4i16 = 1519, ARM_VQDMLALv2i64 = 1520, ARM_VQDMLALv4i32 = 1521, ARM_VQDMLSLslv2i32 = 1522, ARM_VQDMLSLslv4i16 = 1523, ARM_VQDMLSLv2i64 = 1524, ARM_VQDMLSLv4i32 = 1525, ARM_VQDMULHslv2i32 = 1526, ARM_VQDMULHslv4i16 = 1527, ARM_VQDMULHslv4i32 = 1528, ARM_VQDMULHslv8i16 = 1529, ARM_VQDMULHv2i32 = 1530, ARM_VQDMULHv4i16 = 1531, ARM_VQDMULHv4i32 = 1532, ARM_VQDMULHv8i16 = 1533, ARM_VQDMULLslv2i32 = 1534, ARM_VQDMULLslv4i16 = 1535, ARM_VQDMULLv2i64 = 1536, ARM_VQDMULLv4i32 = 1537, ARM_VQMOVNsuv2i32 = 1538, ARM_VQMOVNsuv4i16 = 1539, ARM_VQMOVNsuv8i8 = 1540, ARM_VQMOVNsv2i32 = 1541, ARM_VQMOVNsv4i16 = 1542, ARM_VQMOVNsv8i8 = 1543, ARM_VQMOVNuv2i32 = 1544, ARM_VQMOVNuv4i16 = 1545, ARM_VQMOVNuv8i8 = 1546, ARM_VQNEGv16i8 = 1547, ARM_VQNEGv2i32 = 1548, ARM_VQNEGv4i16 = 1549, ARM_VQNEGv4i32 = 1550, ARM_VQNEGv8i16 = 1551, ARM_VQNEGv8i8 = 1552, ARM_VQRDMULHslv2i32 = 1553, ARM_VQRDMULHslv4i16 = 1554, ARM_VQRDMULHslv4i32 = 1555, ARM_VQRDMULHslv8i16 = 1556, ARM_VQRDMULHv2i32 = 1557, ARM_VQRDMULHv4i16 = 1558, ARM_VQRDMULHv4i32 = 1559, ARM_VQRDMULHv8i16 = 1560, ARM_VQRSHLsv16i8 = 1561, ARM_VQRSHLsv1i64 = 1562, ARM_VQRSHLsv2i32 = 1563, ARM_VQRSHLsv2i64 = 1564, ARM_VQRSHLsv4i16 = 1565, ARM_VQRSHLsv4i32 = 1566, ARM_VQRSHLsv8i16 = 1567, ARM_VQRSHLsv8i8 = 1568, ARM_VQRSHLuv16i8 = 1569, ARM_VQRSHLuv1i64 = 1570, ARM_VQRSHLuv2i32 = 1571, ARM_VQRSHLuv2i64 = 1572, ARM_VQRSHLuv4i16 = 1573, ARM_VQRSHLuv4i32 = 1574, ARM_VQRSHLuv8i16 = 1575, ARM_VQRSHLuv8i8 = 1576, ARM_VQRSHRNsv2i32 = 1577, ARM_VQRSHRNsv4i16 = 1578, ARM_VQRSHRNsv8i8 = 1579, ARM_VQRSHRNuv2i32 = 1580, ARM_VQRSHRNuv4i16 = 1581, ARM_VQRSHRNuv8i8 = 1582, ARM_VQRSHRUNv2i32 = 1583, ARM_VQRSHRUNv4i16 = 1584, ARM_VQRSHRUNv8i8 = 1585, ARM_VQSHLsiv16i8 = 1586, ARM_VQSHLsiv1i64 = 1587, ARM_VQSHLsiv2i32 = 1588, ARM_VQSHLsiv2i64 = 1589, ARM_VQSHLsiv4i16 = 1590, ARM_VQSHLsiv4i32 = 1591, ARM_VQSHLsiv8i16 = 1592, ARM_VQSHLsiv8i8 = 1593, ARM_VQSHLsuv16i8 = 1594, ARM_VQSHLsuv1i64 = 1595, ARM_VQSHLsuv2i32 = 1596, ARM_VQSHLsuv2i64 = 1597, ARM_VQSHLsuv4i16 = 1598, ARM_VQSHLsuv4i32 = 1599, ARM_VQSHLsuv8i16 = 1600, ARM_VQSHLsuv8i8 = 1601, ARM_VQSHLsv16i8 = 1602, ARM_VQSHLsv1i64 = 1603, ARM_VQSHLsv2i32 = 1604, ARM_VQSHLsv2i64 = 1605, ARM_VQSHLsv4i16 = 1606, ARM_VQSHLsv4i32 = 1607, ARM_VQSHLsv8i16 = 1608, ARM_VQSHLsv8i8 = 1609, ARM_VQSHLuiv16i8 = 1610, ARM_VQSHLuiv1i64 = 1611, ARM_VQSHLuiv2i32 = 1612, ARM_VQSHLuiv2i64 = 1613, ARM_VQSHLuiv4i16 = 1614, ARM_VQSHLuiv4i32 = 1615, ARM_VQSHLuiv8i16 = 1616, ARM_VQSHLuiv8i8 = 1617, ARM_VQSHLuv16i8 = 1618, ARM_VQSHLuv1i64 = 1619, ARM_VQSHLuv2i32 = 1620, ARM_VQSHLuv2i64 = 1621, ARM_VQSHLuv4i16 = 1622, ARM_VQSHLuv4i32 = 1623, ARM_VQSHLuv8i16 = 1624, ARM_VQSHLuv8i8 = 1625, ARM_VQSHRNsv2i32 = 1626, ARM_VQSHRNsv4i16 = 1627, ARM_VQSHRNsv8i8 = 1628, ARM_VQSHRNuv2i32 = 1629, ARM_VQSHRNuv4i16 = 1630, ARM_VQSHRNuv8i8 = 1631, ARM_VQSHRUNv2i32 = 1632, ARM_VQSHRUNv4i16 = 1633, ARM_VQSHRUNv8i8 = 1634, ARM_VQSUBsv16i8 = 1635, ARM_VQSUBsv1i64 = 1636, ARM_VQSUBsv2i32 = 1637, ARM_VQSUBsv2i64 = 1638, ARM_VQSUBsv4i16 = 1639, ARM_VQSUBsv4i32 = 1640, ARM_VQSUBsv8i16 = 1641, ARM_VQSUBsv8i8 = 1642, ARM_VQSUBuv16i8 = 1643, ARM_VQSUBuv1i64 = 1644, ARM_VQSUBuv2i32 = 1645, ARM_VQSUBuv2i64 = 1646, ARM_VQSUBuv4i16 = 1647, ARM_VQSUBuv4i32 = 1648, ARM_VQSUBuv8i16 = 1649, ARM_VQSUBuv8i8 = 1650, ARM_VRADDHNv2i32 = 1651, ARM_VRADDHNv4i16 = 1652, ARM_VRADDHNv8i8 = 1653, ARM_VRECPEd = 1654, ARM_VRECPEfd = 1655, ARM_VRECPEfq = 1656, ARM_VRECPEq = 1657, ARM_VRECPSfd = 1658, ARM_VRECPSfq = 1659, ARM_VREV16d8 = 1660, ARM_VREV16q8 = 1661, ARM_VREV32d16 = 1662, ARM_VREV32d8 = 1663, ARM_VREV32q16 = 1664, ARM_VREV32q8 = 1665, ARM_VREV64d16 = 1666, ARM_VREV64d32 = 1667, ARM_VREV64d8 = 1668, ARM_VREV64q16 = 1669, ARM_VREV64q32 = 1670, ARM_VREV64q8 = 1671, ARM_VRHADDsv16i8 = 1672, ARM_VRHADDsv2i32 = 1673, ARM_VRHADDsv4i16 = 1674, ARM_VRHADDsv4i32 = 1675, ARM_VRHADDsv8i16 = 1676, ARM_VRHADDsv8i8 = 1677, ARM_VRHADDuv16i8 = 1678, ARM_VRHADDuv2i32 = 1679, ARM_VRHADDuv4i16 = 1680, ARM_VRHADDuv4i32 = 1681, ARM_VRHADDuv8i16 = 1682, ARM_VRHADDuv8i8 = 1683, ARM_VRINTAD = 1684, ARM_VRINTAND = 1685, ARM_VRINTANQ = 1686, ARM_VRINTAS = 1687, ARM_VRINTMD = 1688, ARM_VRINTMND = 1689, ARM_VRINTMNQ = 1690, ARM_VRINTMS = 1691, ARM_VRINTND = 1692, ARM_VRINTNND = 1693, ARM_VRINTNNQ = 1694, ARM_VRINTNS = 1695, ARM_VRINTPD = 1696, ARM_VRINTPND = 1697, ARM_VRINTPNQ = 1698, ARM_VRINTPS = 1699, ARM_VRINTRD = 1700, ARM_VRINTRS = 1701, ARM_VRINTXD = 1702, ARM_VRINTXND = 1703, ARM_VRINTXNQ = 1704, ARM_VRINTXS = 1705, ARM_VRINTZD = 1706, ARM_VRINTZND = 1707, ARM_VRINTZNQ = 1708, ARM_VRINTZS = 1709, ARM_VRSHLsv16i8 = 1710, ARM_VRSHLsv1i64 = 1711, ARM_VRSHLsv2i32 = 1712, ARM_VRSHLsv2i64 = 1713, ARM_VRSHLsv4i16 = 1714, ARM_VRSHLsv4i32 = 1715, ARM_VRSHLsv8i16 = 1716, ARM_VRSHLsv8i8 = 1717, ARM_VRSHLuv16i8 = 1718, ARM_VRSHLuv1i64 = 1719, ARM_VRSHLuv2i32 = 1720, ARM_VRSHLuv2i64 = 1721, ARM_VRSHLuv4i16 = 1722, ARM_VRSHLuv4i32 = 1723, ARM_VRSHLuv8i16 = 1724, ARM_VRSHLuv8i8 = 1725, ARM_VRSHRNv2i32 = 1726, ARM_VRSHRNv4i16 = 1727, ARM_VRSHRNv8i8 = 1728, ARM_VRSHRsv16i8 = 1729, ARM_VRSHRsv1i64 = 1730, ARM_VRSHRsv2i32 = 1731, ARM_VRSHRsv2i64 = 1732, ARM_VRSHRsv4i16 = 1733, ARM_VRSHRsv4i32 = 1734, ARM_VRSHRsv8i16 = 1735, ARM_VRSHRsv8i8 = 1736, ARM_VRSHRuv16i8 = 1737, ARM_VRSHRuv1i64 = 1738, ARM_VRSHRuv2i32 = 1739, ARM_VRSHRuv2i64 = 1740, ARM_VRSHRuv4i16 = 1741, ARM_VRSHRuv4i32 = 1742, ARM_VRSHRuv8i16 = 1743, ARM_VRSHRuv8i8 = 1744, ARM_VRSQRTEd = 1745, ARM_VRSQRTEfd = 1746, ARM_VRSQRTEfq = 1747, ARM_VRSQRTEq = 1748, ARM_VRSQRTSfd = 1749, ARM_VRSQRTSfq = 1750, ARM_VRSRAsv16i8 = 1751, ARM_VRSRAsv1i64 = 1752, ARM_VRSRAsv2i32 = 1753, ARM_VRSRAsv2i64 = 1754, ARM_VRSRAsv4i16 = 1755, ARM_VRSRAsv4i32 = 1756, ARM_VRSRAsv8i16 = 1757, ARM_VRSRAsv8i8 = 1758, ARM_VRSRAuv16i8 = 1759, ARM_VRSRAuv1i64 = 1760, ARM_VRSRAuv2i32 = 1761, ARM_VRSRAuv2i64 = 1762, ARM_VRSRAuv4i16 = 1763, ARM_VRSRAuv4i32 = 1764, ARM_VRSRAuv8i16 = 1765, ARM_VRSRAuv8i8 = 1766, ARM_VRSUBHNv2i32 = 1767, ARM_VRSUBHNv4i16 = 1768, ARM_VRSUBHNv8i8 = 1769, ARM_VSELEQD = 1770, ARM_VSELEQS = 1771, ARM_VSELGED = 1772, ARM_VSELGES = 1773, ARM_VSELGTD = 1774, ARM_VSELGTS = 1775, ARM_VSELVSD = 1776, ARM_VSELVSS = 1777, ARM_VSETLNi16 = 1778, ARM_VSETLNi32 = 1779, ARM_VSETLNi8 = 1780, ARM_VSHLLi16 = 1781, ARM_VSHLLi32 = 1782, ARM_VSHLLi8 = 1783, ARM_VSHLLsv2i64 = 1784, ARM_VSHLLsv4i32 = 1785, ARM_VSHLLsv8i16 = 1786, ARM_VSHLLuv2i64 = 1787, ARM_VSHLLuv4i32 = 1788, ARM_VSHLLuv8i16 = 1789, ARM_VSHLiv16i8 = 1790, ARM_VSHLiv1i64 = 1791, ARM_VSHLiv2i32 = 1792, ARM_VSHLiv2i64 = 1793, ARM_VSHLiv4i16 = 1794, ARM_VSHLiv4i32 = 1795, ARM_VSHLiv8i16 = 1796, ARM_VSHLiv8i8 = 1797, ARM_VSHLsv16i8 = 1798, ARM_VSHLsv1i64 = 1799, ARM_VSHLsv2i32 = 1800, ARM_VSHLsv2i64 = 1801, ARM_VSHLsv4i16 = 1802, ARM_VSHLsv4i32 = 1803, ARM_VSHLsv8i16 = 1804, ARM_VSHLsv8i8 = 1805, ARM_VSHLuv16i8 = 1806, ARM_VSHLuv1i64 = 1807, ARM_VSHLuv2i32 = 1808, ARM_VSHLuv2i64 = 1809, ARM_VSHLuv4i16 = 1810, ARM_VSHLuv4i32 = 1811, ARM_VSHLuv8i16 = 1812, ARM_VSHLuv8i8 = 1813, ARM_VSHRNv2i32 = 1814, ARM_VSHRNv4i16 = 1815, ARM_VSHRNv8i8 = 1816, ARM_VSHRsv16i8 = 1817, ARM_VSHRsv1i64 = 1818, ARM_VSHRsv2i32 = 1819, ARM_VSHRsv2i64 = 1820, ARM_VSHRsv4i16 = 1821, ARM_VSHRsv4i32 = 1822, ARM_VSHRsv8i16 = 1823, ARM_VSHRsv8i8 = 1824, ARM_VSHRuv16i8 = 1825, ARM_VSHRuv1i64 = 1826, ARM_VSHRuv2i32 = 1827, ARM_VSHRuv2i64 = 1828, ARM_VSHRuv4i16 = 1829, ARM_VSHRuv4i32 = 1830, ARM_VSHRuv8i16 = 1831, ARM_VSHRuv8i8 = 1832, ARM_VSHTOD = 1833, ARM_VSHTOS = 1834, ARM_VSITOD = 1835, ARM_VSITOS = 1836, ARM_VSLIv16i8 = 1837, ARM_VSLIv1i64 = 1838, ARM_VSLIv2i32 = 1839, ARM_VSLIv2i64 = 1840, ARM_VSLIv4i16 = 1841, ARM_VSLIv4i32 = 1842, ARM_VSLIv8i16 = 1843, ARM_VSLIv8i8 = 1844, ARM_VSLTOD = 1845, ARM_VSLTOS = 1846, ARM_VSQRTD = 1847, ARM_VSQRTS = 1848, ARM_VSRAsv16i8 = 1849, ARM_VSRAsv1i64 = 1850, ARM_VSRAsv2i32 = 1851, ARM_VSRAsv2i64 = 1852, ARM_VSRAsv4i16 = 1853, ARM_VSRAsv4i32 = 1854, ARM_VSRAsv8i16 = 1855, ARM_VSRAsv8i8 = 1856, ARM_VSRAuv16i8 = 1857, ARM_VSRAuv1i64 = 1858, ARM_VSRAuv2i32 = 1859, ARM_VSRAuv2i64 = 1860, ARM_VSRAuv4i16 = 1861, ARM_VSRAuv4i32 = 1862, ARM_VSRAuv8i16 = 1863, ARM_VSRAuv8i8 = 1864, ARM_VSRIv16i8 = 1865, ARM_VSRIv1i64 = 1866, ARM_VSRIv2i32 = 1867, ARM_VSRIv2i64 = 1868, ARM_VSRIv4i16 = 1869, ARM_VSRIv4i32 = 1870, ARM_VSRIv8i16 = 1871, ARM_VSRIv8i8 = 1872, ARM_VST1LNd16 = 1873, ARM_VST1LNd16_UPD = 1874, ARM_VST1LNd32 = 1875, ARM_VST1LNd32_UPD = 1876, ARM_VST1LNd8 = 1877, ARM_VST1LNd8_UPD = 1878, ARM_VST1LNdAsm_16 = 1879, ARM_VST1LNdAsm_32 = 1880, ARM_VST1LNdAsm_8 = 1881, ARM_VST1LNdWB_fixed_Asm_16 = 1882, ARM_VST1LNdWB_fixed_Asm_32 = 1883, ARM_VST1LNdWB_fixed_Asm_8 = 1884, ARM_VST1LNdWB_register_Asm_16 = 1885, ARM_VST1LNdWB_register_Asm_32 = 1886, ARM_VST1LNdWB_register_Asm_8 = 1887, ARM_VST1LNq16Pseudo = 1888, ARM_VST1LNq16Pseudo_UPD = 1889, ARM_VST1LNq32Pseudo = 1890, ARM_VST1LNq32Pseudo_UPD = 1891, ARM_VST1LNq8Pseudo = 1892, ARM_VST1LNq8Pseudo_UPD = 1893, ARM_VST1d16 = 1894, ARM_VST1d16Q = 1895, ARM_VST1d16Qwb_fixed = 1896, ARM_VST1d16Qwb_register = 1897, ARM_VST1d16T = 1898, ARM_VST1d16Twb_fixed = 1899, ARM_VST1d16Twb_register = 1900, ARM_VST1d16wb_fixed = 1901, ARM_VST1d16wb_register = 1902, ARM_VST1d32 = 1903, ARM_VST1d32Q = 1904, ARM_VST1d32Qwb_fixed = 1905, ARM_VST1d32Qwb_register = 1906, ARM_VST1d32T = 1907, ARM_VST1d32Twb_fixed = 1908, ARM_VST1d32Twb_register = 1909, ARM_VST1d32wb_fixed = 1910, ARM_VST1d32wb_register = 1911, ARM_VST1d64 = 1912, ARM_VST1d64Q = 1913, ARM_VST1d64QPseudo = 1914, ARM_VST1d64QPseudoWB_fixed = 1915, ARM_VST1d64QPseudoWB_register = 1916, ARM_VST1d64Qwb_fixed = 1917, ARM_VST1d64Qwb_register = 1918, ARM_VST1d64T = 1919, ARM_VST1d64TPseudo = 1920, ARM_VST1d64TPseudoWB_fixed = 1921, ARM_VST1d64TPseudoWB_register = 1922, ARM_VST1d64Twb_fixed = 1923, ARM_VST1d64Twb_register = 1924, ARM_VST1d64wb_fixed = 1925, ARM_VST1d64wb_register = 1926, ARM_VST1d8 = 1927, ARM_VST1d8Q = 1928, ARM_VST1d8Qwb_fixed = 1929, ARM_VST1d8Qwb_register = 1930, ARM_VST1d8T = 1931, ARM_VST1d8Twb_fixed = 1932, ARM_VST1d8Twb_register = 1933, ARM_VST1d8wb_fixed = 1934, ARM_VST1d8wb_register = 1935, ARM_VST1q16 = 1936, ARM_VST1q16wb_fixed = 1937, ARM_VST1q16wb_register = 1938, ARM_VST1q32 = 1939, ARM_VST1q32wb_fixed = 1940, ARM_VST1q32wb_register = 1941, ARM_VST1q64 = 1942, ARM_VST1q64wb_fixed = 1943, ARM_VST1q64wb_register = 1944, ARM_VST1q8 = 1945, ARM_VST1q8wb_fixed = 1946, ARM_VST1q8wb_register = 1947, ARM_VST2LNd16 = 1948, ARM_VST2LNd16Pseudo = 1949, ARM_VST2LNd16Pseudo_UPD = 1950, ARM_VST2LNd16_UPD = 1951, ARM_VST2LNd32 = 1952, ARM_VST2LNd32Pseudo = 1953, ARM_VST2LNd32Pseudo_UPD = 1954, ARM_VST2LNd32_UPD = 1955, ARM_VST2LNd8 = 1956, ARM_VST2LNd8Pseudo = 1957, ARM_VST2LNd8Pseudo_UPD = 1958, ARM_VST2LNd8_UPD = 1959, ARM_VST2LNdAsm_16 = 1960, ARM_VST2LNdAsm_32 = 1961, ARM_VST2LNdAsm_8 = 1962, ARM_VST2LNdWB_fixed_Asm_16 = 1963, ARM_VST2LNdWB_fixed_Asm_32 = 1964, ARM_VST2LNdWB_fixed_Asm_8 = 1965, ARM_VST2LNdWB_register_Asm_16 = 1966, ARM_VST2LNdWB_register_Asm_32 = 1967, ARM_VST2LNdWB_register_Asm_8 = 1968, ARM_VST2LNq16 = 1969, ARM_VST2LNq16Pseudo = 1970, ARM_VST2LNq16Pseudo_UPD = 1971, ARM_VST2LNq16_UPD = 1972, ARM_VST2LNq32 = 1973, ARM_VST2LNq32Pseudo = 1974, ARM_VST2LNq32Pseudo_UPD = 1975, ARM_VST2LNq32_UPD = 1976, ARM_VST2LNqAsm_16 = 1977, ARM_VST2LNqAsm_32 = 1978, ARM_VST2LNqWB_fixed_Asm_16 = 1979, ARM_VST2LNqWB_fixed_Asm_32 = 1980, ARM_VST2LNqWB_register_Asm_16 = 1981, ARM_VST2LNqWB_register_Asm_32 = 1982, ARM_VST2b16 = 1983, ARM_VST2b16wb_fixed = 1984, ARM_VST2b16wb_register = 1985, ARM_VST2b32 = 1986, ARM_VST2b32wb_fixed = 1987, ARM_VST2b32wb_register = 1988, ARM_VST2b8 = 1989, ARM_VST2b8wb_fixed = 1990, ARM_VST2b8wb_register = 1991, ARM_VST2d16 = 1992, ARM_VST2d16wb_fixed = 1993, ARM_VST2d16wb_register = 1994, ARM_VST2d32 = 1995, ARM_VST2d32wb_fixed = 1996, ARM_VST2d32wb_register = 1997, ARM_VST2d8 = 1998, ARM_VST2d8wb_fixed = 1999, ARM_VST2d8wb_register = 2000, ARM_VST2q16 = 2001, ARM_VST2q16Pseudo = 2002, ARM_VST2q16PseudoWB_fixed = 2003, ARM_VST2q16PseudoWB_register = 2004, ARM_VST2q16wb_fixed = 2005, ARM_VST2q16wb_register = 2006, ARM_VST2q32 = 2007, ARM_VST2q32Pseudo = 2008, ARM_VST2q32PseudoWB_fixed = 2009, ARM_VST2q32PseudoWB_register = 2010, ARM_VST2q32wb_fixed = 2011, ARM_VST2q32wb_register = 2012, ARM_VST2q8 = 2013, ARM_VST2q8Pseudo = 2014, ARM_VST2q8PseudoWB_fixed = 2015, ARM_VST2q8PseudoWB_register = 2016, ARM_VST2q8wb_fixed = 2017, ARM_VST2q8wb_register = 2018, ARM_VST3LNd16 = 2019, ARM_VST3LNd16Pseudo = 2020, ARM_VST3LNd16Pseudo_UPD = 2021, ARM_VST3LNd16_UPD = 2022, ARM_VST3LNd32 = 2023, ARM_VST3LNd32Pseudo = 2024, ARM_VST3LNd32Pseudo_UPD = 2025, ARM_VST3LNd32_UPD = 2026, ARM_VST3LNd8 = 2027, ARM_VST3LNd8Pseudo = 2028, ARM_VST3LNd8Pseudo_UPD = 2029, ARM_VST3LNd8_UPD = 2030, ARM_VST3LNdAsm_16 = 2031, ARM_VST3LNdAsm_32 = 2032, ARM_VST3LNdAsm_8 = 2033, ARM_VST3LNdWB_fixed_Asm_16 = 2034, ARM_VST3LNdWB_fixed_Asm_32 = 2035, ARM_VST3LNdWB_fixed_Asm_8 = 2036, ARM_VST3LNdWB_register_Asm_16 = 2037, ARM_VST3LNdWB_register_Asm_32 = 2038, ARM_VST3LNdWB_register_Asm_8 = 2039, ARM_VST3LNq16 = 2040, ARM_VST3LNq16Pseudo = 2041, ARM_VST3LNq16Pseudo_UPD = 2042, ARM_VST3LNq16_UPD = 2043, ARM_VST3LNq32 = 2044, ARM_VST3LNq32Pseudo = 2045, ARM_VST3LNq32Pseudo_UPD = 2046, ARM_VST3LNq32_UPD = 2047, ARM_VST3LNqAsm_16 = 2048, ARM_VST3LNqAsm_32 = 2049, ARM_VST3LNqWB_fixed_Asm_16 = 2050, ARM_VST3LNqWB_fixed_Asm_32 = 2051, ARM_VST3LNqWB_register_Asm_16 = 2052, ARM_VST3LNqWB_register_Asm_32 = 2053, ARM_VST3d16 = 2054, ARM_VST3d16Pseudo = 2055, ARM_VST3d16Pseudo_UPD = 2056, ARM_VST3d16_UPD = 2057, ARM_VST3d32 = 2058, ARM_VST3d32Pseudo = 2059, ARM_VST3d32Pseudo_UPD = 2060, ARM_VST3d32_UPD = 2061, ARM_VST3d8 = 2062, ARM_VST3d8Pseudo = 2063, ARM_VST3d8Pseudo_UPD = 2064, ARM_VST3d8_UPD = 2065, ARM_VST3dAsm_16 = 2066, ARM_VST3dAsm_32 = 2067, ARM_VST3dAsm_8 = 2068, ARM_VST3dWB_fixed_Asm_16 = 2069, ARM_VST3dWB_fixed_Asm_32 = 2070, ARM_VST3dWB_fixed_Asm_8 = 2071, ARM_VST3dWB_register_Asm_16 = 2072, ARM_VST3dWB_register_Asm_32 = 2073, ARM_VST3dWB_register_Asm_8 = 2074, ARM_VST3q16 = 2075, ARM_VST3q16Pseudo_UPD = 2076, ARM_VST3q16_UPD = 2077, ARM_VST3q16oddPseudo = 2078, ARM_VST3q16oddPseudo_UPD = 2079, ARM_VST3q32 = 2080, ARM_VST3q32Pseudo_UPD = 2081, ARM_VST3q32_UPD = 2082, ARM_VST3q32oddPseudo = 2083, ARM_VST3q32oddPseudo_UPD = 2084, ARM_VST3q8 = 2085, ARM_VST3q8Pseudo_UPD = 2086, ARM_VST3q8_UPD = 2087, ARM_VST3q8oddPseudo = 2088, ARM_VST3q8oddPseudo_UPD = 2089, ARM_VST3qAsm_16 = 2090, ARM_VST3qAsm_32 = 2091, ARM_VST3qAsm_8 = 2092, ARM_VST3qWB_fixed_Asm_16 = 2093, ARM_VST3qWB_fixed_Asm_32 = 2094, ARM_VST3qWB_fixed_Asm_8 = 2095, ARM_VST3qWB_register_Asm_16 = 2096, ARM_VST3qWB_register_Asm_32 = 2097, ARM_VST3qWB_register_Asm_8 = 2098, ARM_VST4LNd16 = 2099, ARM_VST4LNd16Pseudo = 2100, ARM_VST4LNd16Pseudo_UPD = 2101, ARM_VST4LNd16_UPD = 2102, ARM_VST4LNd32 = 2103, ARM_VST4LNd32Pseudo = 2104, ARM_VST4LNd32Pseudo_UPD = 2105, ARM_VST4LNd32_UPD = 2106, ARM_VST4LNd8 = 2107, ARM_VST4LNd8Pseudo = 2108, ARM_VST4LNd8Pseudo_UPD = 2109, ARM_VST4LNd8_UPD = 2110, ARM_VST4LNdAsm_16 = 2111, ARM_VST4LNdAsm_32 = 2112, ARM_VST4LNdAsm_8 = 2113, ARM_VST4LNdWB_fixed_Asm_16 = 2114, ARM_VST4LNdWB_fixed_Asm_32 = 2115, ARM_VST4LNdWB_fixed_Asm_8 = 2116, ARM_VST4LNdWB_register_Asm_16 = 2117, ARM_VST4LNdWB_register_Asm_32 = 2118, ARM_VST4LNdWB_register_Asm_8 = 2119, ARM_VST4LNq16 = 2120, ARM_VST4LNq16Pseudo = 2121, ARM_VST4LNq16Pseudo_UPD = 2122, ARM_VST4LNq16_UPD = 2123, ARM_VST4LNq32 = 2124, ARM_VST4LNq32Pseudo = 2125, ARM_VST4LNq32Pseudo_UPD = 2126, ARM_VST4LNq32_UPD = 2127, ARM_VST4LNqAsm_16 = 2128, ARM_VST4LNqAsm_32 = 2129, ARM_VST4LNqWB_fixed_Asm_16 = 2130, ARM_VST4LNqWB_fixed_Asm_32 = 2131, ARM_VST4LNqWB_register_Asm_16 = 2132, ARM_VST4LNqWB_register_Asm_32 = 2133, ARM_VST4d16 = 2134, ARM_VST4d16Pseudo = 2135, ARM_VST4d16Pseudo_UPD = 2136, ARM_VST4d16_UPD = 2137, ARM_VST4d32 = 2138, ARM_VST4d32Pseudo = 2139, ARM_VST4d32Pseudo_UPD = 2140, ARM_VST4d32_UPD = 2141, ARM_VST4d8 = 2142, ARM_VST4d8Pseudo = 2143, ARM_VST4d8Pseudo_UPD = 2144, ARM_VST4d8_UPD = 2145, ARM_VST4dAsm_16 = 2146, ARM_VST4dAsm_32 = 2147, ARM_VST4dAsm_8 = 2148, ARM_VST4dWB_fixed_Asm_16 = 2149, ARM_VST4dWB_fixed_Asm_32 = 2150, ARM_VST4dWB_fixed_Asm_8 = 2151, ARM_VST4dWB_register_Asm_16 = 2152, ARM_VST4dWB_register_Asm_32 = 2153, ARM_VST4dWB_register_Asm_8 = 2154, ARM_VST4q16 = 2155, ARM_VST4q16Pseudo_UPD = 2156, ARM_VST4q16_UPD = 2157, ARM_VST4q16oddPseudo = 2158, ARM_VST4q16oddPseudo_UPD = 2159, ARM_VST4q32 = 2160, ARM_VST4q32Pseudo_UPD = 2161, ARM_VST4q32_UPD = 2162, ARM_VST4q32oddPseudo = 2163, ARM_VST4q32oddPseudo_UPD = 2164, ARM_VST4q8 = 2165, ARM_VST4q8Pseudo_UPD = 2166, ARM_VST4q8_UPD = 2167, ARM_VST4q8oddPseudo = 2168, ARM_VST4q8oddPseudo_UPD = 2169, ARM_VST4qAsm_16 = 2170, ARM_VST4qAsm_32 = 2171, ARM_VST4qAsm_8 = 2172, ARM_VST4qWB_fixed_Asm_16 = 2173, ARM_VST4qWB_fixed_Asm_32 = 2174, ARM_VST4qWB_fixed_Asm_8 = 2175, ARM_VST4qWB_register_Asm_16 = 2176, ARM_VST4qWB_register_Asm_32 = 2177, ARM_VST4qWB_register_Asm_8 = 2178, ARM_VSTMDDB_UPD = 2179, ARM_VSTMDIA = 2180, ARM_VSTMDIA_UPD = 2181, ARM_VSTMQIA = 2182, ARM_VSTMSDB_UPD = 2183, ARM_VSTMSIA = 2184, ARM_VSTMSIA_UPD = 2185, ARM_VSTRD = 2186, ARM_VSTRS = 2187, ARM_VSUBD = 2188, ARM_VSUBHNv2i32 = 2189, ARM_VSUBHNv4i16 = 2190, ARM_VSUBHNv8i8 = 2191, ARM_VSUBLsv2i64 = 2192, ARM_VSUBLsv4i32 = 2193, ARM_VSUBLsv8i16 = 2194, ARM_VSUBLuv2i64 = 2195, ARM_VSUBLuv4i32 = 2196, ARM_VSUBLuv8i16 = 2197, ARM_VSUBS = 2198, ARM_VSUBWsv2i64 = 2199, ARM_VSUBWsv4i32 = 2200, ARM_VSUBWsv8i16 = 2201, ARM_VSUBWuv2i64 = 2202, ARM_VSUBWuv4i32 = 2203, ARM_VSUBWuv8i16 = 2204, ARM_VSUBfd = 2205, ARM_VSUBfq = 2206, ARM_VSUBv16i8 = 2207, ARM_VSUBv1i64 = 2208, ARM_VSUBv2i32 = 2209, ARM_VSUBv2i64 = 2210, ARM_VSUBv4i16 = 2211, ARM_VSUBv4i32 = 2212, ARM_VSUBv8i16 = 2213, ARM_VSUBv8i8 = 2214, ARM_VSWPd = 2215, ARM_VSWPq = 2216, ARM_VTBL1 = 2217, ARM_VTBL2 = 2218, ARM_VTBL3 = 2219, ARM_VTBL3Pseudo = 2220, ARM_VTBL4 = 2221, ARM_VTBL4Pseudo = 2222, ARM_VTBX1 = 2223, ARM_VTBX2 = 2224, ARM_VTBX3 = 2225, ARM_VTBX3Pseudo = 2226, ARM_VTBX4 = 2227, ARM_VTBX4Pseudo = 2228, ARM_VTOSHD = 2229, ARM_VTOSHS = 2230, ARM_VTOSIRD = 2231, ARM_VTOSIRS = 2232, ARM_VTOSIZD = 2233, ARM_VTOSIZS = 2234, ARM_VTOSLD = 2235, ARM_VTOSLS = 2236, ARM_VTOUHD = 2237, ARM_VTOUHS = 2238, ARM_VTOUIRD = 2239, ARM_VTOUIRS = 2240, ARM_VTOUIZD = 2241, ARM_VTOUIZS = 2242, ARM_VTOULD = 2243, ARM_VTOULS = 2244, ARM_VTRNd16 = 2245, ARM_VTRNd32 = 2246, ARM_VTRNd8 = 2247, ARM_VTRNq16 = 2248, ARM_VTRNq32 = 2249, ARM_VTRNq8 = 2250, ARM_VTSTv16i8 = 2251, ARM_VTSTv2i32 = 2252, ARM_VTSTv4i16 = 2253, ARM_VTSTv4i32 = 2254, ARM_VTSTv8i16 = 2255, ARM_VTSTv8i8 = 2256, ARM_VUHTOD = 2257, ARM_VUHTOS = 2258, ARM_VUITOD = 2259, ARM_VUITOS = 2260, ARM_VULTOD = 2261, ARM_VULTOS = 2262, ARM_VUZPd16 = 2263, ARM_VUZPd8 = 2264, ARM_VUZPq16 = 2265, ARM_VUZPq32 = 2266, ARM_VUZPq8 = 2267, ARM_VZIPd16 = 2268, ARM_VZIPd8 = 2269, ARM_VZIPq16 = 2270, ARM_VZIPq32 = 2271, ARM_VZIPq8 = 2272, ARM_WIN__CHKSTK = 2273, ARM_sysLDMDA = 2274, ARM_sysLDMDA_UPD = 2275, ARM_sysLDMDB = 2276, ARM_sysLDMDB_UPD = 2277, ARM_sysLDMIA = 2278, ARM_sysLDMIA_UPD = 2279, ARM_sysLDMIB = 2280, ARM_sysLDMIB_UPD = 2281, ARM_sysSTMDA = 2282, ARM_sysSTMDA_UPD = 2283, ARM_sysSTMDB = 2284, ARM_sysSTMDB_UPD = 2285, ARM_sysSTMIA = 2286, ARM_sysSTMIA_UPD = 2287, ARM_sysSTMIB = 2288, ARM_sysSTMIB_UPD = 2289, ARM_t2ABS = 2290, ARM_t2ADCri = 2291, ARM_t2ADCrr = 2292, ARM_t2ADCrs = 2293, ARM_t2ADDSri = 2294, ARM_t2ADDSrr = 2295, ARM_t2ADDSrs = 2296, ARM_t2ADDri = 2297, ARM_t2ADDri12 = 2298, ARM_t2ADDrr = 2299, ARM_t2ADDrs = 2300, ARM_t2ADR = 2301, ARM_t2ANDri = 2302, ARM_t2ANDrr = 2303, ARM_t2ANDrs = 2304, ARM_t2ASRri = 2305, ARM_t2ASRrr = 2306, ARM_t2B = 2307, ARM_t2BFC = 2308, ARM_t2BFI = 2309, ARM_t2BICri = 2310, ARM_t2BICrr = 2311, ARM_t2BICrs = 2312, ARM_t2BR_JT = 2313, ARM_t2BXJ = 2314, ARM_t2Bcc = 2315, ARM_t2CDP = 2316, ARM_t2CDP2 = 2317, ARM_t2CLREX = 2318, ARM_t2CLZ = 2319, ARM_t2CMNri = 2320, ARM_t2CMNzrr = 2321, ARM_t2CMNzrs = 2322, ARM_t2CMPri = 2323, ARM_t2CMPrr = 2324, ARM_t2CMPrs = 2325, ARM_t2CPS1p = 2326, ARM_t2CPS2p = 2327, ARM_t2CPS3p = 2328, ARM_t2CRC32B = 2329, ARM_t2CRC32CB = 2330, ARM_t2CRC32CH = 2331, ARM_t2CRC32CW = 2332, ARM_t2CRC32H = 2333, ARM_t2CRC32W = 2334, ARM_t2DBG = 2335, ARM_t2DCPS1 = 2336, ARM_t2DCPS2 = 2337, ARM_t2DCPS3 = 2338, ARM_t2DMB = 2339, ARM_t2DSB = 2340, ARM_t2EORri = 2341, ARM_t2EORrr = 2342, ARM_t2EORrs = 2343, ARM_t2HINT = 2344, ARM_t2HVC = 2345, ARM_t2ISB = 2346, ARM_t2IT = 2347, ARM_t2Int_eh_sjlj_setjmp = 2348, ARM_t2Int_eh_sjlj_setjmp_nofp = 2349, ARM_t2LDA = 2350, ARM_t2LDAB = 2351, ARM_t2LDAEX = 2352, ARM_t2LDAEXB = 2353, ARM_t2LDAEXD = 2354, ARM_t2LDAEXH = 2355, ARM_t2LDAH = 2356, ARM_t2LDC2L_OFFSET = 2357, ARM_t2LDC2L_OPTION = 2358, ARM_t2LDC2L_POST = 2359, ARM_t2LDC2L_PRE = 2360, ARM_t2LDC2_OFFSET = 2361, ARM_t2LDC2_OPTION = 2362, ARM_t2LDC2_POST = 2363, ARM_t2LDC2_PRE = 2364, ARM_t2LDCL_OFFSET = 2365, ARM_t2LDCL_OPTION = 2366, ARM_t2LDCL_POST = 2367, ARM_t2LDCL_PRE = 2368, ARM_t2LDC_OFFSET = 2369, ARM_t2LDC_OPTION = 2370, ARM_t2LDC_POST = 2371, ARM_t2LDC_PRE = 2372, ARM_t2LDMDB = 2373, ARM_t2LDMDB_UPD = 2374, ARM_t2LDMIA = 2375, ARM_t2LDMIA_RET = 2376, ARM_t2LDMIA_UPD = 2377, ARM_t2LDRBT = 2378, ARM_t2LDRB_POST = 2379, ARM_t2LDRB_PRE = 2380, ARM_t2LDRBi12 = 2381, ARM_t2LDRBi8 = 2382, ARM_t2LDRBpci = 2383, ARM_t2LDRBpcrel = 2384, ARM_t2LDRBs = 2385, ARM_t2LDRD_POST = 2386, ARM_t2LDRD_PRE = 2387, ARM_t2LDRDi8 = 2388, ARM_t2LDREX = 2389, ARM_t2LDREXB = 2390, ARM_t2LDREXD = 2391, ARM_t2LDREXH = 2392, ARM_t2LDRHT = 2393, ARM_t2LDRH_POST = 2394, ARM_t2LDRH_PRE = 2395, ARM_t2LDRHi12 = 2396, ARM_t2LDRHi8 = 2397, ARM_t2LDRHpci = 2398, ARM_t2LDRHpcrel = 2399, ARM_t2LDRHs = 2400, ARM_t2LDRSBT = 2401, ARM_t2LDRSB_POST = 2402, ARM_t2LDRSB_PRE = 2403, ARM_t2LDRSBi12 = 2404, ARM_t2LDRSBi8 = 2405, ARM_t2LDRSBpci = 2406, ARM_t2LDRSBpcrel = 2407, ARM_t2LDRSBs = 2408, ARM_t2LDRSHT = 2409, ARM_t2LDRSH_POST = 2410, ARM_t2LDRSH_PRE = 2411, ARM_t2LDRSHi12 = 2412, ARM_t2LDRSHi8 = 2413, ARM_t2LDRSHpci = 2414, ARM_t2LDRSHpcrel = 2415, ARM_t2LDRSHs = 2416, ARM_t2LDRT = 2417, ARM_t2LDR_POST = 2418, ARM_t2LDR_PRE = 2419, ARM_t2LDRi12 = 2420, ARM_t2LDRi8 = 2421, ARM_t2LDRpci = 2422, ARM_t2LDRpci_pic = 2423, ARM_t2LDRpcrel = 2424, ARM_t2LDRs = 2425, ARM_t2LEApcrel = 2426, ARM_t2LEApcrelJT = 2427, ARM_t2LSLri = 2428, ARM_t2LSLrr = 2429, ARM_t2LSRri = 2430, ARM_t2LSRrr = 2431, ARM_t2MCR = 2432, ARM_t2MCR2 = 2433, ARM_t2MCRR = 2434, ARM_t2MCRR2 = 2435, ARM_t2MLA = 2436, ARM_t2MLS = 2437, ARM_t2MOVCCasr = 2438, ARM_t2MOVCCi = 2439, ARM_t2MOVCCi16 = 2440, ARM_t2MOVCCi32imm = 2441, ARM_t2MOVCClsl = 2442, ARM_t2MOVCClsr = 2443, ARM_t2MOVCCr = 2444, ARM_t2MOVCCror = 2445, ARM_t2MOVSsi = 2446, ARM_t2MOVSsr = 2447, ARM_t2MOVTi16 = 2448, ARM_t2MOVTi16_ga_pcrel = 2449, ARM_t2MOV_ga_pcrel = 2450, ARM_t2MOVi = 2451, ARM_t2MOVi16 = 2452, ARM_t2MOVi16_ga_pcrel = 2453, ARM_t2MOVi32imm = 2454, ARM_t2MOVr = 2455, ARM_t2MOVsi = 2456, ARM_t2MOVsr = 2457, ARM_t2MOVsra_flag = 2458, ARM_t2MOVsrl_flag = 2459, ARM_t2MRC = 2460, ARM_t2MRC2 = 2461, ARM_t2MRRC = 2462, ARM_t2MRRC2 = 2463, ARM_t2MRS_AR = 2464, ARM_t2MRS_M = 2465, ARM_t2MRSbanked = 2466, ARM_t2MRSsys_AR = 2467, ARM_t2MSR_AR = 2468, ARM_t2MSR_M = 2469, ARM_t2MSRbanked = 2470, ARM_t2MUL = 2471, ARM_t2MVNCCi = 2472, ARM_t2MVNi = 2473, ARM_t2MVNr = 2474, ARM_t2MVNs = 2475, ARM_t2ORNri = 2476, ARM_t2ORNrr = 2477, ARM_t2ORNrs = 2478, ARM_t2ORRri = 2479, ARM_t2ORRrr = 2480, ARM_t2ORRrs = 2481, ARM_t2PKHBT = 2482, ARM_t2PKHTB = 2483, ARM_t2PLDWi12 = 2484, ARM_t2PLDWi8 = 2485, ARM_t2PLDWs = 2486, ARM_t2PLDi12 = 2487, ARM_t2PLDi8 = 2488, ARM_t2PLDpci = 2489, ARM_t2PLDs = 2490, ARM_t2PLIi12 = 2491, ARM_t2PLIi8 = 2492, ARM_t2PLIpci = 2493, ARM_t2PLIs = 2494, ARM_t2QADD = 2495, ARM_t2QADD16 = 2496, ARM_t2QADD8 = 2497, ARM_t2QASX = 2498, ARM_t2QDADD = 2499, ARM_t2QDSUB = 2500, ARM_t2QSAX = 2501, ARM_t2QSUB = 2502, ARM_t2QSUB16 = 2503, ARM_t2QSUB8 = 2504, ARM_t2RBIT = 2505, ARM_t2REV = 2506, ARM_t2REV16 = 2507, ARM_t2REVSH = 2508, ARM_t2RFEDB = 2509, ARM_t2RFEDBW = 2510, ARM_t2RFEIA = 2511, ARM_t2RFEIAW = 2512, ARM_t2RORri = 2513, ARM_t2RORrr = 2514, ARM_t2RRX = 2515, ARM_t2RSBSri = 2516, ARM_t2RSBSrs = 2517, ARM_t2RSBri = 2518, ARM_t2RSBrr = 2519, ARM_t2RSBrs = 2520, ARM_t2SADD16 = 2521, ARM_t2SADD8 = 2522, ARM_t2SASX = 2523, ARM_t2SBCri = 2524, ARM_t2SBCrr = 2525, ARM_t2SBCrs = 2526, ARM_t2SBFX = 2527, ARM_t2SDIV = 2528, ARM_t2SEL = 2529, ARM_t2SHADD16 = 2530, ARM_t2SHADD8 = 2531, ARM_t2SHASX = 2532, ARM_t2SHSAX = 2533, ARM_t2SHSUB16 = 2534, ARM_t2SHSUB8 = 2535, ARM_t2SMC = 2536, ARM_t2SMLABB = 2537, ARM_t2SMLABT = 2538, ARM_t2SMLAD = 2539, ARM_t2SMLADX = 2540, ARM_t2SMLAL = 2541, ARM_t2SMLALBB = 2542, ARM_t2SMLALBT = 2543, ARM_t2SMLALD = 2544, ARM_t2SMLALDX = 2545, ARM_t2SMLALTB = 2546, ARM_t2SMLALTT = 2547, ARM_t2SMLATB = 2548, ARM_t2SMLATT = 2549, ARM_t2SMLAWB = 2550, ARM_t2SMLAWT = 2551, ARM_t2SMLSD = 2552, ARM_t2SMLSDX = 2553, ARM_t2SMLSLD = 2554, ARM_t2SMLSLDX = 2555, ARM_t2SMMLA = 2556, ARM_t2SMMLAR = 2557, ARM_t2SMMLS = 2558, ARM_t2SMMLSR = 2559, ARM_t2SMMUL = 2560, ARM_t2SMMULR = 2561, ARM_t2SMUAD = 2562, ARM_t2SMUADX = 2563, ARM_t2SMULBB = 2564, ARM_t2SMULBT = 2565, ARM_t2SMULL = 2566, ARM_t2SMULTB = 2567, ARM_t2SMULTT = 2568, ARM_t2SMULWB = 2569, ARM_t2SMULWT = 2570, ARM_t2SMUSD = 2571, ARM_t2SMUSDX = 2572, ARM_t2SRSDB = 2573, ARM_t2SRSDB_UPD = 2574, ARM_t2SRSIA = 2575, ARM_t2SRSIA_UPD = 2576, ARM_t2SSAT = 2577, ARM_t2SSAT16 = 2578, ARM_t2SSAX = 2579, ARM_t2SSUB16 = 2580, ARM_t2SSUB8 = 2581, ARM_t2STC2L_OFFSET = 2582, ARM_t2STC2L_OPTION = 2583, ARM_t2STC2L_POST = 2584, ARM_t2STC2L_PRE = 2585, ARM_t2STC2_OFFSET = 2586, ARM_t2STC2_OPTION = 2587, ARM_t2STC2_POST = 2588, ARM_t2STC2_PRE = 2589, ARM_t2STCL_OFFSET = 2590, ARM_t2STCL_OPTION = 2591, ARM_t2STCL_POST = 2592, ARM_t2STCL_PRE = 2593, ARM_t2STC_OFFSET = 2594, ARM_t2STC_OPTION = 2595, ARM_t2STC_POST = 2596, ARM_t2STC_PRE = 2597, ARM_t2STL = 2598, ARM_t2STLB = 2599, ARM_t2STLEX = 2600, ARM_t2STLEXB = 2601, ARM_t2STLEXD = 2602, ARM_t2STLEXH = 2603, ARM_t2STLH = 2604, ARM_t2STMDB = 2605, ARM_t2STMDB_UPD = 2606, ARM_t2STMIA = 2607, ARM_t2STMIA_UPD = 2608, ARM_t2STRBT = 2609, ARM_t2STRB_POST = 2610, ARM_t2STRB_PRE = 2611, ARM_t2STRB_preidx = 2612, ARM_t2STRBi12 = 2613, ARM_t2STRBi8 = 2614, ARM_t2STRBs = 2615, ARM_t2STRD_POST = 2616, ARM_t2STRD_PRE = 2617, ARM_t2STRDi8 = 2618, ARM_t2STREX = 2619, ARM_t2STREXB = 2620, ARM_t2STREXD = 2621, ARM_t2STREXH = 2622, ARM_t2STRHT = 2623, ARM_t2STRH_POST = 2624, ARM_t2STRH_PRE = 2625, ARM_t2STRH_preidx = 2626, ARM_t2STRHi12 = 2627, ARM_t2STRHi8 = 2628, ARM_t2STRHs = 2629, ARM_t2STRT = 2630, ARM_t2STR_POST = 2631, ARM_t2STR_PRE = 2632, ARM_t2STR_preidx = 2633, ARM_t2STRi12 = 2634, ARM_t2STRi8 = 2635, ARM_t2STRs = 2636, ARM_t2SUBS_PC_LR = 2637, ARM_t2SUBSri = 2638, ARM_t2SUBSrr = 2639, ARM_t2SUBSrs = 2640, ARM_t2SUBri = 2641, ARM_t2SUBri12 = 2642, ARM_t2SUBrr = 2643, ARM_t2SUBrs = 2644, ARM_t2SXTAB = 2645, ARM_t2SXTAB16 = 2646, ARM_t2SXTAH = 2647, ARM_t2SXTB = 2648, ARM_t2SXTB16 = 2649, ARM_t2SXTH = 2650, ARM_t2TBB = 2651, ARM_t2TBB_JT = 2652, ARM_t2TBH = 2653, ARM_t2TBH_JT = 2654, ARM_t2TEQri = 2655, ARM_t2TEQrr = 2656, ARM_t2TEQrs = 2657, ARM_t2TSTri = 2658, ARM_t2TSTrr = 2659, ARM_t2TSTrs = 2660, ARM_t2UADD16 = 2661, ARM_t2UADD8 = 2662, ARM_t2UASX = 2663, ARM_t2UBFX = 2664, ARM_t2UDF = 2665, ARM_t2UDIV = 2666, ARM_t2UHADD16 = 2667, ARM_t2UHADD8 = 2668, ARM_t2UHASX = 2669, ARM_t2UHSAX = 2670, ARM_t2UHSUB16 = 2671, ARM_t2UHSUB8 = 2672, ARM_t2UMAAL = 2673, ARM_t2UMLAL = 2674, ARM_t2UMULL = 2675, ARM_t2UQADD16 = 2676, ARM_t2UQADD8 = 2677, ARM_t2UQASX = 2678, ARM_t2UQSAX = 2679, ARM_t2UQSUB16 = 2680, ARM_t2UQSUB8 = 2681, ARM_t2USAD8 = 2682, ARM_t2USADA8 = 2683, ARM_t2USAT = 2684, ARM_t2USAT16 = 2685, ARM_t2USAX = 2686, ARM_t2USUB16 = 2687, ARM_t2USUB8 = 2688, ARM_t2UXTAB = 2689, ARM_t2UXTAB16 = 2690, ARM_t2UXTAH = 2691, ARM_t2UXTB = 2692, ARM_t2UXTB16 = 2693, ARM_t2UXTH = 2694, ARM_tADC = 2695, ARM_tADDframe = 2696, ARM_tADDhirr = 2697, ARM_tADDi3 = 2698, ARM_tADDi8 = 2699, ARM_tADDrSP = 2700, ARM_tADDrSPi = 2701, ARM_tADDrr = 2702, ARM_tADDspi = 2703, ARM_tADDspr = 2704, ARM_tADJCALLSTACKDOWN = 2705, ARM_tADJCALLSTACKUP = 2706, ARM_tADR = 2707, ARM_tAND = 2708, ARM_tASRri = 2709, ARM_tASRrr = 2710, ARM_tB = 2711, ARM_tBIC = 2712, ARM_tBKPT = 2713, ARM_tBL = 2714, ARM_tBLXi = 2715, ARM_tBLXr = 2716, ARM_tBRIND = 2717, ARM_tBR_JTr = 2718, ARM_tBX = 2719, ARM_tBX_CALL = 2720, ARM_tBX_RET = 2721, ARM_tBX_RET_vararg = 2722, ARM_tBcc = 2723, ARM_tBfar = 2724, ARM_tCBNZ = 2725, ARM_tCBZ = 2726, ARM_tCMNz = 2727, ARM_tCMPhir = 2728, ARM_tCMPi8 = 2729, ARM_tCMPr = 2730, ARM_tCPS = 2731, ARM_tEOR = 2732, ARM_tHINT = 2733, ARM_tHLT = 2734, ARM_tInt_eh_sjlj_longjmp = 2735, ARM_tInt_eh_sjlj_setjmp = 2736, ARM_tLDMIA = 2737, ARM_tLDMIA_UPD = 2738, ARM_tLDRBi = 2739, ARM_tLDRBr = 2740, ARM_tLDRHi = 2741, ARM_tLDRHr = 2742, ARM_tLDRLIT_ga_abs = 2743, ARM_tLDRLIT_ga_pcrel = 2744, ARM_tLDRSB = 2745, ARM_tLDRSH = 2746, ARM_tLDRi = 2747, ARM_tLDRpci = 2748, ARM_tLDRpci_pic = 2749, ARM_tLDRr = 2750, ARM_tLDRspi = 2751, ARM_tLEApcrel = 2752, ARM_tLEApcrelJT = 2753, ARM_tLSLri = 2754, ARM_tLSLrr = 2755, ARM_tLSRri = 2756, ARM_tLSRrr = 2757, ARM_tMOVCCr_pseudo = 2758, ARM_tMOVSr = 2759, ARM_tMOVi8 = 2760, ARM_tMOVr = 2761, ARM_tMUL = 2762, ARM_tMVN = 2763, ARM_tORR = 2764, ARM_tPICADD = 2765, ARM_tPOP = 2766, ARM_tPOP_RET = 2767, ARM_tPUSH = 2768, ARM_tREV = 2769, ARM_tREV16 = 2770, ARM_tREVSH = 2771, ARM_tROR = 2772, ARM_tRSB = 2773, ARM_tSBC = 2774, ARM_tSETEND = 2775, ARM_tSTMIA_UPD = 2776, ARM_tSTRBi = 2777, ARM_tSTRBr = 2778, ARM_tSTRHi = 2779, ARM_tSTRHr = 2780, ARM_tSTRi = 2781, ARM_tSTRr = 2782, ARM_tSTRspi = 2783, ARM_tSUBi3 = 2784, ARM_tSUBi8 = 2785, ARM_tSUBrr = 2786, ARM_tSUBspi = 2787, ARM_tSVC = 2788, ARM_tSXTB = 2789, ARM_tSXTH = 2790, ARM_tTAILJMPd = 2791, ARM_tTAILJMPdND = 2792, ARM_tTAILJMPr = 2793, ARM_tTPsoft = 2794, ARM_tTRAP = 2795, ARM_tTST = 2796, ARM_tUDF = 2797, ARM_tUXTB = 2798, ARM_tUXTH = 2799, ARM_INSTRUCTION_LIST_END = 2800 }; #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC #define nullptr 0 #define ImplicitList1 0 #define ImplicitList2 0 #define ImplicitList3 0 #define ImplicitList4 0 #define ImplicitList5 0 #define ImplicitList6 0 #define ImplicitList7 0 #define ImplicitList8 0 #define ImplicitList9 0 #define ImplicitList10 0 #define ImplicitList11 0 #define ImplicitList12 0 #define ImplicitList13 0 #define ImplicitList14 0 #define ImplicitList15 0 static MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI_TIED_TO)) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; static MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; static MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static MCOperandInfo OperandInfo10[] = { { 0, 0|(1<, 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { ARM_NoRegister, ARM_APSR = 1, ARM_APSR_NZCV = 2, ARM_CPSR = 3, ARM_FPEXC = 4, ARM_FPINST = 5, ARM_FPSCR = 6, ARM_FPSCR_NZCV = 7, ARM_FPSID = 8, ARM_ITSTATE = 9, ARM_LR = 10, ARM_PC = 11, ARM_SP = 12, ARM_SPSR = 13, ARM_D0 = 14, ARM_D1 = 15, ARM_D2 = 16, ARM_D3 = 17, ARM_D4 = 18, ARM_D5 = 19, ARM_D6 = 20, ARM_D7 = 21, ARM_D8 = 22, ARM_D9 = 23, ARM_D10 = 24, ARM_D11 = 25, ARM_D12 = 26, ARM_D13 = 27, ARM_D14 = 28, ARM_D15 = 29, ARM_D16 = 30, ARM_D17 = 31, ARM_D18 = 32, ARM_D19 = 33, ARM_D20 = 34, ARM_D21 = 35, ARM_D22 = 36, ARM_D23 = 37, ARM_D24 = 38, ARM_D25 = 39, ARM_D26 = 40, ARM_D27 = 41, ARM_D28 = 42, ARM_D29 = 43, ARM_D30 = 44, ARM_D31 = 45, ARM_FPINST2 = 46, ARM_MVFR0 = 47, ARM_MVFR1 = 48, ARM_MVFR2 = 49, ARM_Q0 = 50, ARM_Q1 = 51, ARM_Q2 = 52, ARM_Q3 = 53, ARM_Q4 = 54, ARM_Q5 = 55, ARM_Q6 = 56, ARM_Q7 = 57, ARM_Q8 = 58, ARM_Q9 = 59, ARM_Q10 = 60, ARM_Q11 = 61, ARM_Q12 = 62, ARM_Q13 = 63, ARM_Q14 = 64, ARM_Q15 = 65, ARM_R0 = 66, ARM_R1 = 67, ARM_R2 = 68, ARM_R3 = 69, ARM_R4 = 70, ARM_R5 = 71, ARM_R6 = 72, ARM_R7 = 73, ARM_R8 = 74, ARM_R9 = 75, ARM_R10 = 76, ARM_R11 = 77, ARM_R12 = 78, ARM_S0 = 79, ARM_S1 = 80, ARM_S2 = 81, ARM_S3 = 82, ARM_S4 = 83, ARM_S5 = 84, ARM_S6 = 85, ARM_S7 = 86, ARM_S8 = 87, ARM_S9 = 88, ARM_S10 = 89, ARM_S11 = 90, ARM_S12 = 91, ARM_S13 = 92, ARM_S14 = 93, ARM_S15 = 94, ARM_S16 = 95, ARM_S17 = 96, ARM_S18 = 97, ARM_S19 = 98, ARM_S20 = 99, ARM_S21 = 100, ARM_S22 = 101, ARM_S23 = 102, ARM_S24 = 103, ARM_S25 = 104, ARM_S26 = 105, ARM_S27 = 106, ARM_S28 = 107, ARM_S29 = 108, ARM_S30 = 109, ARM_S31 = 110, ARM_D0_D2 = 111, ARM_D1_D3 = 112, ARM_D2_D4 = 113, ARM_D3_D5 = 114, ARM_D4_D6 = 115, ARM_D5_D7 = 116, ARM_D6_D8 = 117, ARM_D7_D9 = 118, ARM_D8_D10 = 119, ARM_D9_D11 = 120, ARM_D10_D12 = 121, ARM_D11_D13 = 122, ARM_D12_D14 = 123, ARM_D13_D15 = 124, ARM_D14_D16 = 125, ARM_D15_D17 = 126, ARM_D16_D18 = 127, ARM_D17_D19 = 128, ARM_D18_D20 = 129, ARM_D19_D21 = 130, ARM_D20_D22 = 131, ARM_D21_D23 = 132, ARM_D22_D24 = 133, ARM_D23_D25 = 134, ARM_D24_D26 = 135, ARM_D25_D27 = 136, ARM_D26_D28 = 137, ARM_D27_D29 = 138, ARM_D28_D30 = 139, ARM_D29_D31 = 140, ARM_Q0_Q1 = 141, ARM_Q1_Q2 = 142, ARM_Q2_Q3 = 143, ARM_Q3_Q4 = 144, ARM_Q4_Q5 = 145, ARM_Q5_Q6 = 146, ARM_Q6_Q7 = 147, ARM_Q7_Q8 = 148, ARM_Q8_Q9 = 149, ARM_Q9_Q10 = 150, ARM_Q10_Q11 = 151, ARM_Q11_Q12 = 152, ARM_Q12_Q13 = 153, ARM_Q13_Q14 = 154, ARM_Q14_Q15 = 155, ARM_Q0_Q1_Q2_Q3 = 156, ARM_Q1_Q2_Q3_Q4 = 157, ARM_Q2_Q3_Q4_Q5 = 158, ARM_Q3_Q4_Q5_Q6 = 159, ARM_Q4_Q5_Q6_Q7 = 160, ARM_Q5_Q6_Q7_Q8 = 161, ARM_Q6_Q7_Q8_Q9 = 162, ARM_Q7_Q8_Q9_Q10 = 163, ARM_Q8_Q9_Q10_Q11 = 164, ARM_Q9_Q10_Q11_Q12 = 165, ARM_Q10_Q11_Q12_Q13 = 166, ARM_Q11_Q12_Q13_Q14 = 167, ARM_Q12_Q13_Q14_Q15 = 168, ARM_R12_SP = 169, ARM_R0_R1 = 170, ARM_R2_R3 = 171, ARM_R4_R5 = 172, ARM_R6_R7 = 173, ARM_R8_R9 = 174, ARM_R10_R11 = 175, ARM_D0_D1_D2 = 176, ARM_D1_D2_D3 = 177, ARM_D2_D3_D4 = 178, ARM_D3_D4_D5 = 179, ARM_D4_D5_D6 = 180, ARM_D5_D6_D7 = 181, ARM_D6_D7_D8 = 182, ARM_D7_D8_D9 = 183, ARM_D8_D9_D10 = 184, ARM_D9_D10_D11 = 185, ARM_D10_D11_D12 = 186, ARM_D11_D12_D13 = 187, ARM_D12_D13_D14 = 188, ARM_D13_D14_D15 = 189, ARM_D14_D15_D16 = 190, ARM_D15_D16_D17 = 191, ARM_D16_D17_D18 = 192, ARM_D17_D18_D19 = 193, ARM_D18_D19_D20 = 194, ARM_D19_D20_D21 = 195, ARM_D20_D21_D22 = 196, ARM_D21_D22_D23 = 197, ARM_D22_D23_D24 = 198, ARM_D23_D24_D25 = 199, ARM_D24_D25_D26 = 200, ARM_D25_D26_D27 = 201, ARM_D26_D27_D28 = 202, ARM_D27_D28_D29 = 203, ARM_D28_D29_D30 = 204, ARM_D29_D30_D31 = 205, ARM_D0_D2_D4 = 206, ARM_D1_D3_D5 = 207, ARM_D2_D4_D6 = 208, ARM_D3_D5_D7 = 209, ARM_D4_D6_D8 = 210, ARM_D5_D7_D9 = 211, ARM_D6_D8_D10 = 212, ARM_D7_D9_D11 = 213, ARM_D8_D10_D12 = 214, ARM_D9_D11_D13 = 215, ARM_D10_D12_D14 = 216, ARM_D11_D13_D15 = 217, ARM_D12_D14_D16 = 218, ARM_D13_D15_D17 = 219, ARM_D14_D16_D18 = 220, ARM_D15_D17_D19 = 221, ARM_D16_D18_D20 = 222, ARM_D17_D19_D21 = 223, ARM_D18_D20_D22 = 224, ARM_D19_D21_D23 = 225, ARM_D20_D22_D24 = 226, ARM_D21_D23_D25 = 227, ARM_D22_D24_D26 = 228, ARM_D23_D25_D27 = 229, ARM_D24_D26_D28 = 230, ARM_D25_D27_D29 = 231, ARM_D26_D28_D30 = 232, ARM_D27_D29_D31 = 233, ARM_D0_D2_D4_D6 = 234, ARM_D1_D3_D5_D7 = 235, ARM_D2_D4_D6_D8 = 236, ARM_D3_D5_D7_D9 = 237, ARM_D4_D6_D8_D10 = 238, ARM_D5_D7_D9_D11 = 239, ARM_D6_D8_D10_D12 = 240, ARM_D7_D9_D11_D13 = 241, ARM_D8_D10_D12_D14 = 242, ARM_D9_D11_D13_D15 = 243, ARM_D10_D12_D14_D16 = 244, ARM_D11_D13_D15_D17 = 245, ARM_D12_D14_D16_D18 = 246, ARM_D13_D15_D17_D19 = 247, ARM_D14_D16_D18_D20 = 248, ARM_D15_D17_D19_D21 = 249, ARM_D16_D18_D20_D22 = 250, ARM_D17_D19_D21_D23 = 251, ARM_D18_D20_D22_D24 = 252, ARM_D19_D21_D23_D25 = 253, ARM_D20_D22_D24_D26 = 254, ARM_D21_D23_D25_D27 = 255, ARM_D22_D24_D26_D28 = 256, ARM_D23_D25_D27_D29 = 257, ARM_D24_D26_D28_D30 = 258, ARM_D25_D27_D29_D31 = 259, ARM_D1_D2 = 260, ARM_D3_D4 = 261, ARM_D5_D6 = 262, ARM_D7_D8 = 263, ARM_D9_D10 = 264, ARM_D11_D12 = 265, ARM_D13_D14 = 266, ARM_D15_D16 = 267, ARM_D17_D18 = 268, ARM_D19_D20 = 269, ARM_D21_D22 = 270, ARM_D23_D24 = 271, ARM_D25_D26 = 272, ARM_D27_D28 = 273, ARM_D29_D30 = 274, ARM_D1_D2_D3_D4 = 275, ARM_D3_D4_D5_D6 = 276, ARM_D5_D6_D7_D8 = 277, ARM_D7_D8_D9_D10 = 278, ARM_D9_D10_D11_D12 = 279, ARM_D11_D12_D13_D14 = 280, ARM_D13_D14_D15_D16 = 281, ARM_D15_D16_D17_D18 = 282, ARM_D17_D18_D19_D20 = 283, ARM_D19_D20_D21_D22 = 284, ARM_D21_D22_D23_D24 = 285, ARM_D23_D24_D25_D26 = 286, ARM_D25_D26_D27_D28 = 287, ARM_D27_D28_D29_D30 = 288, ARM_NUM_TARGET_REGS // 289 }; // Register classes enum { ARM_SPRRegClassID = 0, ARM_GPRRegClassID = 1, ARM_GPRwithAPSRRegClassID = 2, ARM_SPR_8RegClassID = 3, ARM_GPRnopcRegClassID = 4, ARM_rGPRRegClassID = 5, ARM_hGPRRegClassID = 6, ARM_tGPRRegClassID = 7, ARM_GPRnopc_and_hGPRRegClassID = 8, ARM_hGPR_and_rGPRRegClassID = 9, ARM_tcGPRRegClassID = 10, ARM_tGPR_and_tcGPRRegClassID = 11, ARM_CCRRegClassID = 12, ARM_GPRspRegClassID = 13, ARM_hGPR_and_tcGPRRegClassID = 14, ARM_DPRRegClassID = 15, ARM_DPR_VFP2RegClassID = 16, ARM_DPR_8RegClassID = 17, ARM_GPRPairRegClassID = 18, ARM_GPRPair_with_gsub_1_in_rGPRRegClassID = 19, ARM_GPRPair_with_gsub_0_in_tGPRRegClassID = 20, ARM_GPRPair_with_gsub_0_in_hGPRRegClassID = 21, ARM_GPRPair_with_gsub_0_in_tcGPRRegClassID = 22, ARM_GPRPair_with_gsub_1_in_hGPR_and_rGPRRegClassID = 23, ARM_GPRPair_with_gsub_1_in_tcGPRRegClassID = 24, ARM_GPRPair_with_gsub_1_in_GPRspRegClassID = 25, ARM_DPairSpcRegClassID = 26, ARM_DPairSpc_with_ssub_0RegClassID = 27, ARM_DPairSpc_with_dsub_2_then_ssub_0RegClassID = 28, ARM_DPairSpc_with_dsub_0_in_DPR_8RegClassID = 29, ARM_DPairSpc_with_dsub_2_in_DPR_8RegClassID = 30, ARM_DPairRegClassID = 31, ARM_DPair_with_ssub_0RegClassID = 32, ARM_QPRRegClassID = 33, ARM_DPair_with_ssub_2RegClassID = 34, ARM_DPair_with_dsub_0_in_DPR_8RegClassID = 35, ARM_QPR_VFP2RegClassID = 36, ARM_DPair_with_dsub_1_in_DPR_8RegClassID = 37, ARM_QPR_8RegClassID = 38, ARM_DTripleRegClassID = 39, ARM_DTripleSpcRegClassID = 40, ARM_DTripleSpc_with_ssub_0RegClassID = 41, ARM_DTriple_with_ssub_0RegClassID = 42, ARM_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID = 43, ARM_DTriple_with_qsub_0_in_QPRRegClassID = 44, ARM_DTriple_with_ssub_2RegClassID = 45, ARM_DTripleSpc_with_dsub_2_then_ssub_0RegClassID = 46, ARM_DTriple_with_dsub_2_then_ssub_0RegClassID = 47, ARM_DTripleSpc_with_dsub_4_then_ssub_0RegClassID = 48, ARM_DTripleSpc_with_dsub_0_in_DPR_8RegClassID = 49, ARM_DTriple_with_dsub_0_in_DPR_8RegClassID = 50, ARM_DTriple_with_qsub_0_in_QPR_VFP2RegClassID = 51, ARM_DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID = 52, ARM_DTriple_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID = 53, ARM_DTriple_with_dsub_1_in_DPR_8RegClassID = 54, ARM_DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRRegClassID = 55, ARM_DTripleSpc_with_dsub_2_in_DPR_8RegClassID = 56, ARM_DTriple_with_dsub_2_in_DPR_8RegClassID = 57, ARM_DTripleSpc_with_dsub_4_in_DPR_8RegClassID = 58, ARM_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID = 59, ARM_DTriple_with_qsub_0_in_QPR_8RegClassID = 60, ARM_DTriple_with_dsub_1_dsub_2_in_QPR_8RegClassID = 61, ARM_DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRRegClassID = 62, ARM_DQuadSpcRegClassID = 63, ARM_DQuadSpc_with_ssub_0RegClassID = 64, ARM_DQuadSpc_with_dsub_2_then_ssub_0RegClassID = 65, ARM_DQuadSpc_with_dsub_4_then_ssub_0RegClassID = 66, ARM_DQuadSpc_with_dsub_0_in_DPR_8RegClassID = 67, ARM_DQuadSpc_with_dsub_2_in_DPR_8RegClassID = 68, ARM_DQuadSpc_with_dsub_4_in_DPR_8RegClassID = 69, ARM_DQuadRegClassID = 70, ARM_DQuad_with_ssub_0RegClassID = 71, ARM_DQuad_with_ssub_2RegClassID = 72, ARM_QQPRRegClassID = 73, ARM_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 74, ARM_DQuad_with_dsub_2_then_ssub_0RegClassID = 75, ARM_DQuad_with_dsub_3_then_ssub_0RegClassID = 76, ARM_DQuad_with_dsub_0_in_DPR_8RegClassID = 77, ARM_DQuad_with_qsub_0_in_QPR_VFP2RegClassID = 78, ARM_DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 79, ARM_DQuad_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID = 80, ARM_DQuad_with_dsub_1_in_DPR_8RegClassID = 81, ARM_DQuad_with_qsub_1_in_QPR_VFP2RegClassID = 82, ARM_DQuad_with_dsub_2_in_DPR_8RegClassID = 83, ARM_DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 84, ARM_DQuad_with_dsub_3_in_DPR_8RegClassID = 85, ARM_DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 86, ARM_DQuad_with_qsub_0_in_QPR_8RegClassID = 87, ARM_DQuad_with_dsub_1_dsub_2_in_QPR_8RegClassID = 88, ARM_DQuad_with_qsub_1_in_QPR_8RegClassID = 89, ARM_DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 90, ARM_QQQQPRRegClassID = 91, ARM_QQQQPR_with_ssub_0RegClassID = 92, ARM_QQQQPR_with_dsub_2_then_ssub_0RegClassID = 93, ARM_QQQQPR_with_dsub_5_then_ssub_0RegClassID = 94, ARM_QQQQPR_with_dsub_7_then_ssub_0RegClassID = 95, ARM_QQQQPR_with_dsub_0_in_DPR_8RegClassID = 96, ARM_QQQQPR_with_dsub_2_in_DPR_8RegClassID = 97, ARM_QQQQPR_with_dsub_4_in_DPR_8RegClassID = 98, ARM_QQQQPR_with_dsub_6_in_DPR_8RegClassID = 99, }; // Subregister indices enum { ARM_NoSubRegister, ARM_dsub_0, // 1 ARM_dsub_1, // 2 ARM_dsub_2, // 3 ARM_dsub_3, // 4 ARM_dsub_4, // 5 ARM_dsub_5, // 6 ARM_dsub_6, // 7 ARM_dsub_7, // 8 ARM_gsub_0, // 9 ARM_gsub_1, // 10 ARM_qqsub_0, // 11 ARM_qqsub_1, // 12 ARM_qsub_0, // 13 ARM_qsub_1, // 14 ARM_qsub_2, // 15 ARM_qsub_3, // 16 ARM_ssub_0, // 17 ARM_ssub_1, // 18 ARM_ssub_2, // 19 ARM_ssub_3, // 20 ARM_dsub_2_then_ssub_0, // 21 ARM_dsub_2_then_ssub_1, // 22 ARM_dsub_3_then_ssub_0, // 23 ARM_dsub_3_then_ssub_1, // 24 ARM_dsub_7_then_ssub_0, // 25 ARM_dsub_7_then_ssub_1, // 26 ARM_dsub_6_then_ssub_0, // 27 ARM_dsub_6_then_ssub_1, // 28 ARM_dsub_5_then_ssub_0, // 29 ARM_dsub_5_then_ssub_1, // 30 ARM_dsub_4_then_ssub_0, // 31 ARM_dsub_4_then_ssub_1, // 32 ARM_dsub_0_dsub_2, // 33 ARM_dsub_0_dsub_1_dsub_2, // 34 ARM_dsub_1_dsub_3, // 35 ARM_dsub_1_dsub_2_dsub_3, // 36 ARM_dsub_1_dsub_2, // 37 ARM_dsub_0_dsub_2_dsub_4, // 38 ARM_dsub_0_dsub_2_dsub_4_dsub_6, // 39 ARM_dsub_1_dsub_3_dsub_5, // 40 ARM_dsub_1_dsub_3_dsub_5_dsub_7, // 41 ARM_dsub_1_dsub_2_dsub_3_dsub_4, // 42 ARM_dsub_2_dsub_4, // 43 ARM_dsub_2_dsub_3_dsub_4, // 44 ARM_dsub_2_dsub_4_dsub_6, // 45 ARM_dsub_3_dsub_5, // 46 ARM_dsub_3_dsub_4_dsub_5, // 47 ARM_dsub_3_dsub_5_dsub_7, // 48 ARM_dsub_3_dsub_4, // 49 ARM_dsub_3_dsub_4_dsub_5_dsub_6, // 50 ARM_dsub_4_dsub_6, // 51 ARM_dsub_4_dsub_5_dsub_6, // 52 ARM_dsub_5_dsub_7, // 53 ARM_dsub_5_dsub_6_dsub_7, // 54 ARM_dsub_5_dsub_6, // 55 ARM_qsub_1_qsub_2, // 56 ARM_NUM_TARGET_SUBREGS }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg ARMRegDiffLists[] = { /* 0 */ 64924, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, /* 17 */ 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, /* 32 */ 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, /* 45 */ 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, /* 56 */ 64450, 1, 1, 1, 1, 1, 1, 1, 0, /* 65 */ 64984, 1, 1, 1, 1, 1, 1, 1, 0, /* 74 */ 65252, 1, 1, 1, 1, 1, 1, 1, 0, /* 83 */ 38, 1, 1, 1, 1, 1, 1, 0, /* 91 */ 40, 1, 1, 1, 1, 1, 0, /* 98 */ 65196, 1, 1, 1, 1, 1, 0, /* 105 */ 40, 1, 1, 1, 1, 0, /* 111 */ 42, 1, 1, 1, 1, 0, /* 117 */ 42, 1, 1, 1, 0, /* 122 */ 64510, 1, 1, 1, 0, /* 127 */ 65015, 1, 1, 1, 0, /* 132 */ 65282, 1, 1, 1, 0, /* 137 */ 65348, 1, 1, 1, 0, /* 142 */ 13, 1, 1, 0, /* 146 */ 42, 1, 1, 0, /* 150 */ 65388, 1, 1, 0, /* 154 */ 137, 65489, 48, 65489, 12, 121, 65416, 1, 1, 0, /* 164 */ 136, 65490, 47, 65490, 12, 121, 65416, 1, 1, 0, /* 174 */ 135, 65491, 46, 65491, 12, 121, 65416, 1, 1, 0, /* 184 */ 134, 65492, 45, 65492, 12, 121, 65416, 1, 1, 0, /* 194 */ 133, 65493, 44, 65493, 12, 121, 65416, 1, 1, 0, /* 204 */ 132, 65494, 43, 65494, 12, 121, 65416, 1, 1, 0, /* 214 */ 131, 65495, 42, 65495, 12, 121, 65416, 1, 1, 0, /* 224 */ 130, 65496, 41, 65496, 12, 121, 65416, 1, 1, 0, /* 234 */ 129, 65497, 40, 65497, 12, 121, 65416, 1, 1, 0, /* 244 */ 128, 65498, 39, 65498, 12, 121, 65416, 1, 1, 0, /* 254 */ 65489, 133, 65416, 1, 1, 0, /* 260 */ 65490, 133, 65416, 1, 1, 0, /* 266 */ 65491, 133, 65416, 1, 1, 0, /* 272 */ 65492, 133, 65416, 1, 1, 0, /* 278 */ 65493, 133, 65416, 1, 1, 0, /* 284 */ 65494, 133, 65416, 1, 1, 0, /* 290 */ 65495, 133, 65416, 1, 1, 0, /* 296 */ 65496, 133, 65416, 1, 1, 0, /* 302 */ 65497, 133, 65416, 1, 1, 0, /* 308 */ 65498, 133, 65416, 1, 1, 0, /* 314 */ 127, 65499, 38, 65499, 133, 65416, 1, 1, 0, /* 323 */ 65080, 1, 3, 1, 3, 1, 3, 1, 0, /* 332 */ 65136, 1, 3, 1, 3, 1, 0, /* 339 */ 65326, 1, 3, 1, 0, /* 344 */ 13, 1, 0, /* 347 */ 14, 1, 0, /* 350 */ 65, 1, 0, /* 353 */ 65500, 65, 1, 65471, 66, 1, 0, /* 360 */ 65291, 66, 1, 65470, 67, 1, 0, /* 367 */ 65439, 65, 1, 65472, 67, 1, 0, /* 374 */ 65501, 67, 1, 65469, 68, 1, 0, /* 381 */ 65439, 66, 1, 65471, 68, 1, 0, /* 388 */ 65292, 68, 1, 65468, 69, 1, 0, /* 395 */ 65439, 67, 1, 65470, 69, 1, 0, /* 402 */ 65502, 69, 1, 65467, 70, 1, 0, /* 409 */ 65439, 68, 1, 65469, 70, 1, 0, /* 416 */ 65293, 70, 1, 65466, 71, 1, 0, /* 423 */ 65439, 69, 1, 65468, 71, 1, 0, /* 430 */ 65503, 71, 1, 65465, 72, 1, 0, /* 437 */ 65439, 70, 1, 65467, 72, 1, 0, /* 444 */ 65294, 72, 1, 65464, 73, 1, 0, /* 451 */ 65439, 71, 1, 65466, 73, 1, 0, /* 458 */ 65504, 73, 1, 65463, 74, 1, 0, /* 465 */ 65439, 72, 1, 65465, 74, 1, 0, /* 472 */ 65295, 74, 1, 65462, 75, 1, 0, /* 479 */ 65439, 73, 1, 65464, 75, 1, 0, /* 486 */ 65505, 75, 1, 65461, 76, 1, 0, /* 493 */ 65439, 74, 1, 65463, 76, 1, 0, /* 500 */ 65296, 76, 1, 65460, 77, 1, 0, /* 507 */ 65439, 75, 1, 65462, 77, 1, 0, /* 514 */ 65506, 77, 1, 65459, 78, 1, 0, /* 521 */ 65439, 76, 1, 65461, 78, 1, 0, /* 528 */ 65297, 78, 1, 65458, 79, 1, 0, /* 535 */ 65439, 77, 1, 65460, 79, 1, 0, /* 542 */ 65507, 79, 1, 65457, 80, 1, 0, /* 549 */ 65439, 78, 1, 65459, 80, 1, 0, /* 556 */ 65045, 1, 0, /* 559 */ 65260, 1, 0, /* 562 */ 65299, 1, 0, /* 565 */ 65300, 1, 0, /* 568 */ 65301, 1, 0, /* 571 */ 65302, 1, 0, /* 574 */ 65303, 1, 0, /* 577 */ 65304, 1, 0, /* 580 */ 65305, 1, 0, /* 583 */ 65453, 1, 65499, 133, 1, 65416, 1, 0, /* 591 */ 138, 65488, 49, 65488, 12, 121, 65416, 1, 0, /* 600 */ 65488, 13, 121, 65416, 1, 0, /* 606 */ 65489, 13, 121, 65416, 1, 0, /* 612 */ 65490, 13, 121, 65416, 1, 0, /* 618 */ 65491, 13, 121, 65416, 1, 0, /* 624 */ 65492, 13, 121, 65416, 1, 0, /* 630 */ 65493, 13, 121, 65416, 1, 0, /* 636 */ 65494, 13, 121, 65416, 1, 0, /* 642 */ 65495, 13, 121, 65416, 1, 0, /* 648 */ 65496, 13, 121, 65416, 1, 0, /* 654 */ 65497, 13, 121, 65416, 1, 0, /* 660 */ 65498, 13, 121, 65416, 1, 0, /* 666 */ 65464, 1, 65488, 133, 65416, 121, 65416, 1, 0, /* 675 */ 65463, 1, 65489, 133, 65416, 121, 65416, 1, 0, /* 684 */ 65462, 1, 65490, 133, 65416, 121, 65416, 1, 0, /* 693 */ 65461, 1, 65491, 133, 65416, 121, 65416, 1, 0, /* 702 */ 65460, 1, 65492, 133, 65416, 121, 65416, 1, 0, /* 711 */ 65459, 1, 65493, 133, 65416, 121, 65416, 1, 0, /* 720 */ 65458, 1, 65494, 133, 65416, 121, 65416, 1, 0, /* 729 */ 65457, 1, 65495, 133, 65416, 121, 65416, 1, 0, /* 738 */ 65456, 1, 65496, 133, 65416, 121, 65416, 1, 0, /* 747 */ 65455, 1, 65497, 133, 65416, 121, 65416, 1, 0, /* 756 */ 65454, 1, 65498, 133, 65416, 121, 65416, 1, 0, /* 765 */ 65488, 133, 65416, 1, 0, /* 770 */ 65499, 134, 65416, 1, 0, /* 775 */ 126, 65500, 37, 65500, 133, 65417, 1, 0, /* 783 */ 65432, 1, 0, /* 786 */ 65433, 1, 0, /* 789 */ 65434, 1, 0, /* 792 */ 65435, 1, 0, /* 795 */ 65436, 1, 0, /* 798 */ 65437, 1, 0, /* 801 */ 65464, 1, 0, /* 804 */ 65508, 1, 0, /* 807 */ 65509, 1, 0, /* 810 */ 65510, 1, 0, /* 813 */ 65511, 1, 0, /* 816 */ 65512, 1, 0, /* 819 */ 65513, 1, 0, /* 822 */ 65514, 1, 0, /* 825 */ 65515, 1, 0, /* 828 */ 65520, 1, 0, /* 831 */ 65080, 1, 3, 1, 3, 1, 2, 0, /* 839 */ 65136, 1, 3, 1, 2, 0, /* 845 */ 65326, 1, 2, 0, /* 849 */ 65080, 1, 3, 1, 2, 2, 0, /* 856 */ 65136, 1, 2, 2, 0, /* 861 */ 65080, 1, 2, 2, 2, 0, /* 867 */ 65330, 2, 2, 2, 0, /* 872 */ 65080, 1, 3, 2, 2, 0, /* 878 */ 65358, 2, 2, 0, /* 882 */ 65080, 1, 3, 1, 3, 2, 0, /* 889 */ 65136, 1, 3, 2, 0, /* 894 */ 65344, 76, 1, 65461, 78, 1, 65459, 80, 1, 12, 2, 0, /* 906 */ 65344, 75, 1, 65462, 77, 1, 65460, 79, 1, 13, 2, 0, /* 918 */ 65344, 74, 1, 65463, 76, 1, 65461, 78, 1, 14, 2, 0, /* 930 */ 65344, 73, 1, 65464, 75, 1, 65462, 77, 1, 15, 2, 0, /* 942 */ 65344, 72, 1, 65465, 74, 1, 65463, 76, 1, 16, 2, 0, /* 954 */ 65344, 71, 1, 65466, 73, 1, 65464, 75, 1, 17, 2, 0, /* 966 */ 65344, 70, 1, 65467, 72, 1, 65465, 74, 1, 18, 2, 0, /* 978 */ 65344, 69, 1, 65468, 71, 1, 65466, 73, 1, 19, 2, 0, /* 990 */ 65344, 68, 1, 65469, 70, 1, 65467, 72, 1, 20, 2, 0, /* 1002 */ 65344, 67, 1, 65470, 69, 1, 65468, 71, 1, 21, 2, 0, /* 1014 */ 65344, 66, 1, 65471, 68, 1, 65469, 70, 1, 22, 2, 0, /* 1026 */ 65344, 65, 1, 65472, 67, 1, 65470, 69, 1, 23, 2, 0, /* 1038 */ 65344, 2, 2, 93, 2, 0, /* 1044 */ 65344, 80, 1, 65457, 2, 93, 2, 0, /* 1052 */ 65344, 79, 1, 65458, 2, 93, 2, 0, /* 1060 */ 65344, 78, 1, 65459, 80, 1, 65457, 93, 2, 0, /* 1070 */ 65344, 77, 1, 65460, 79, 1, 65458, 93, 2, 0, /* 1080 */ 65439, 2, 0, /* 1083 */ 65453, 2, 0, /* 1086 */ 65080, 1, 3, 1, 3, 1, 3, 0, /* 1094 */ 65136, 1, 3, 1, 3, 0, /* 1100 */ 65326, 1, 3, 0, /* 1104 */ 5, 0, /* 1106 */ 140, 65486, 13, 0, /* 1110 */ 14, 0, /* 1112 */ 126, 65501, 15, 0, /* 1116 */ 10, 66, 0, /* 1119 */ 65445, 65514, 1, 22, 65515, 1, 94, 65, 65472, 65, 69, 0, /* 1131 */ 65445, 65513, 1, 23, 65514, 1, 94, 65, 65472, 65, 70, 0, /* 1143 */ 65445, 65512, 1, 24, 65513, 1, 94, 65, 65472, 65, 71, 0, /* 1155 */ 65445, 65511, 1, 25, 65512, 1, 94, 65, 65472, 65, 72, 0, /* 1167 */ 65445, 65510, 1, 26, 65511, 1, 94, 65, 65472, 65, 73, 0, /* 1179 */ 65445, 65509, 1, 27, 65510, 1, 94, 65, 65472, 65, 74, 0, /* 1191 */ 65445, 65508, 1, 28, 65509, 1, 94, 65, 65472, 65, 75, 0, /* 1203 */ 65445, 65507, 79, 1, 65457, 80, 1, 65484, 65508, 1, 94, 65, 65472, 65, 76, 0, /* 1219 */ 65445, 65506, 77, 1, 65459, 78, 1, 65487, 65507, 79, 1, 65457, 80, 1, 13, 65, 65472, 65, 77, 0, /* 1239 */ 65445, 65505, 75, 1, 65461, 76, 1, 65490, 65506, 77, 1, 65459, 78, 1, 15, 65, 65472, 65, 78, 0, /* 1259 */ 65445, 65504, 73, 1, 65463, 74, 1, 65493, 65505, 75, 1, 65461, 76, 1, 17, 65, 65472, 65, 79, 0, /* 1279 */ 65445, 65503, 71, 1, 65465, 72, 1, 65496, 65504, 73, 1, 65463, 74, 1, 19, 65, 65472, 65, 80, 0, /* 1299 */ 65445, 65502, 69, 1, 65467, 70, 1, 65499, 65503, 71, 1, 65465, 72, 1, 21, 65, 65472, 65, 81, 0, /* 1319 */ 65445, 65501, 67, 1, 65469, 68, 1, 65502, 65502, 69, 1, 65467, 70, 1, 23, 65, 65472, 65, 82, 0, /* 1339 */ 65445, 65500, 65, 1, 65471, 66, 1, 65505, 65501, 67, 1, 65469, 68, 1, 25, 65, 65472, 65, 83, 0, /* 1359 */ 91, 0, /* 1361 */ 98, 0, /* 1363 */ 99, 0, /* 1365 */ 100, 0, /* 1367 */ 101, 0, /* 1369 */ 102, 0, /* 1371 */ 103, 0, /* 1373 */ 104, 0, /* 1375 */ 65374, 1, 1, 20, 75, 135, 0, /* 1382 */ 65374, 1, 1, 21, 74, 136, 0, /* 1389 */ 65374, 1, 1, 22, 73, 137, 0, /* 1396 */ 65374, 1, 1, 23, 72, 138, 0, /* 1403 */ 65374, 1, 1, 24, 71, 139, 0, /* 1410 */ 65374, 1, 1, 25, 70, 140, 0, /* 1417 */ 65374, 1, 1, 26, 69, 141, 0, /* 1424 */ 65374, 79, 1, 65457, 80, 1, 65456, 27, 68, 142, 0, /* 1435 */ 65374, 77, 1, 65459, 78, 1, 65458, 79, 1, 65484, 67, 143, 0, /* 1448 */ 65374, 75, 1, 65461, 76, 1, 65460, 77, 1, 65487, 66, 144, 0, /* 1461 */ 65374, 73, 1, 65463, 74, 1, 65462, 75, 1, 65490, 65, 145, 0, /* 1474 */ 65374, 71, 1, 65465, 72, 1, 65464, 73, 1, 65493, 64, 146, 0, /* 1487 */ 65374, 69, 1, 65467, 70, 1, 65466, 71, 1, 65496, 63, 147, 0, /* 1500 */ 65374, 67, 1, 65469, 68, 1, 65468, 69, 1, 65499, 62, 148, 0, /* 1513 */ 65374, 65, 1, 65471, 66, 1, 65470, 67, 1, 65502, 61, 149, 0, /* 1526 */ 157, 0, /* 1528 */ 65289, 1, 1, 1, 229, 1, 65400, 65, 65472, 65, 65396, 0, /* 1540 */ 65288, 1, 1, 1, 230, 1, 65399, 65, 65472, 65, 65397, 0, /* 1552 */ 65287, 1, 1, 1, 231, 1, 65398, 65, 65472, 65, 65398, 0, /* 1564 */ 65286, 1, 1, 1, 232, 1, 65397, 65, 65472, 65, 65399, 0, /* 1576 */ 65285, 1, 1, 1, 233, 1, 65396, 65, 65472, 65, 65400, 0, /* 1588 */ 65284, 1, 1, 1, 234, 1, 65395, 65, 65472, 65, 65401, 0, /* 1600 */ 65521, 65445, 65512, 1, 24, 65513, 1, 94, 65, 65472, 65, 71, 65419, 65445, 65514, 1, 22, 65515, 1, 94, 65, 65472, 65, 69, 65492, 28, 65509, 28, 28, 65386, 65, 30, 65442, 65, 30, 40, 15, 65402, 0, /* 1639 */ 65521, 65445, 65511, 1, 25, 65512, 1, 94, 65, 65472, 65, 72, 65419, 65445, 65513, 1, 23, 65514, 1, 94, 65, 65472, 65, 70, 65491, 28, 65509, 28, 29, 65385, 65, 30, 65442, 65, 30, 41, 15, 65402, 0, /* 1678 */ 65521, 65445, 65510, 1, 26, 65511, 1, 94, 65, 65472, 65, 73, 65419, 65445, 65512, 1, 24, 65513, 1, 94, 65, 65472, 65, 71, 65490, 28, 65509, 28, 30, 65384, 65, 30, 65442, 65, 30, 42, 15, 65402, 0, /* 1717 */ 65521, 65445, 65509, 1, 27, 65510, 1, 94, 65, 65472, 65, 74, 65419, 65445, 65511, 1, 25, 65512, 1, 94, 65, 65472, 65, 72, 65489, 28, 65509, 28, 31, 65383, 65, 30, 65442, 65, 30, 43, 15, 65402, 0, /* 1756 */ 65521, 65445, 65508, 1, 28, 65509, 1, 94, 65, 65472, 65, 75, 65419, 65445, 65510, 1, 26, 65511, 1, 94, 65, 65472, 65, 73, 65488, 28, 65509, 28, 32, 65382, 65, 30, 65442, 65, 30, 44, 15, 65402, 0, /* 1795 */ 65521, 65445, 65507, 79, 1, 65457, 80, 1, 65484, 65508, 1, 94, 65, 65472, 65, 76, 65419, 65445, 65509, 1, 27, 65510, 1, 94, 65, 65472, 65, 74, 65487, 28, 65509, 28, 33, 65381, 65, 30, 65442, 65, 30, 45, 15, 65402, 0, /* 1838 */ 65521, 65445, 65506, 77, 1, 65459, 78, 1, 65487, 65507, 79, 1, 65457, 80, 1, 13, 65, 65472, 65, 77, 65419, 65445, 65508, 1, 28, 65509, 1, 94, 65, 65472, 65, 75, 65486, 28, 65509, 28, 34, 65380, 65, 30, 65442, 65, 30, 46, 15, 65402, 0, /* 1885 */ 65521, 65445, 65505, 75, 1, 65461, 76, 1, 65490, 65506, 77, 1, 65459, 78, 1, 15, 65, 65472, 65, 78, 65419, 65445, 65507, 79, 1, 65457, 80, 1, 65484, 65508, 1, 94, 65, 65472, 65, 76, 65485, 28, 65509, 28, 35, 65379, 65, 30, 65442, 65, 30, 47, 15, 65402, 0, /* 1936 */ 65521, 65445, 65504, 73, 1, 65463, 74, 1, 65493, 65505, 75, 1, 65461, 76, 1, 17, 65, 65472, 65, 79, 65419, 65445, 65506, 77, 1, 65459, 78, 1, 65487, 65507, 79, 1, 65457, 80, 1, 13, 65, 65472, 65, 77, 65484, 28, 65509, 28, 36, 65378, 65, 30, 65442, 65, 30, 48, 15, 65402, 0, /* 1991 */ 65521, 65445, 65503, 71, 1, 65465, 72, 1, 65496, 65504, 73, 1, 65463, 74, 1, 19, 65, 65472, 65, 80, 65419, 65445, 65505, 75, 1, 65461, 76, 1, 65490, 65506, 77, 1, 65459, 78, 1, 15, 65, 65472, 65, 78, 65483, 28, 65509, 28, 37, 65377, 65, 30, 65442, 65, 30, 49, 15, 65402, 0, /* 2046 */ 65521, 65445, 65502, 69, 1, 65467, 70, 1, 65499, 65503, 71, 1, 65465, 72, 1, 21, 65, 65472, 65, 81, 65419, 65445, 65504, 73, 1, 65463, 74, 1, 65493, 65505, 75, 1, 65461, 76, 1, 17, 65, 65472, 65, 79, 65482, 28, 65509, 28, 38, 65376, 65, 30, 65442, 65, 30, 50, 15, 65402, 0, /* 2101 */ 65521, 65445, 65501, 67, 1, 65469, 68, 1, 65502, 65502, 69, 1, 65467, 70, 1, 23, 65, 65472, 65, 82, 65419, 65445, 65503, 71, 1, 65465, 72, 1, 65496, 65504, 73, 1, 65463, 74, 1, 19, 65, 65472, 65, 80, 65481, 28, 65509, 28, 39, 65375, 65, 30, 65442, 65, 30, 51, 15, 65402, 0, /* 2156 */ 65521, 65445, 65500, 65, 1, 65471, 66, 1, 65505, 65501, 67, 1, 65469, 68, 1, 25, 65, 65472, 65, 83, 65419, 65445, 65502, 69, 1, 65467, 70, 1, 65499, 65503, 71, 1, 65465, 72, 1, 21, 65, 65472, 65, 81, 65480, 28, 65509, 28, 40, 65374, 65, 30, 65442, 65, 30, 52, 15, 65402, 0, /* 2211 */ 65283, 80, 1, 65456, 1, 1, 235, 1, 65394, 65, 65472, 65, 65402, 0, /* 2225 */ 65282, 78, 1, 65458, 79, 1, 65457, 80, 1, 65456, 236, 1, 65393, 65, 65472, 65, 65403, 0, /* 2243 */ 65281, 76, 1, 65460, 77, 1, 65459, 78, 1, 65458, 79, 1, 157, 1, 65392, 65, 65472, 65, 65404, 0, /* 2263 */ 65280, 74, 1, 65462, 75, 1, 65461, 76, 1, 65460, 77, 1, 160, 1, 65391, 65, 65472, 65, 65405, 0, /* 2283 */ 65279, 72, 1, 65464, 73, 1, 65463, 74, 1, 65462, 75, 1, 163, 1, 65390, 65, 65472, 65, 65406, 0, /* 2303 */ 65278, 70, 1, 65466, 71, 1, 65465, 72, 1, 65464, 73, 1, 166, 1, 65389, 65, 65472, 65, 65407, 0, /* 2323 */ 65277, 68, 1, 65468, 69, 1, 65467, 70, 1, 65466, 71, 1, 169, 1, 65388, 65, 65472, 65, 65408, 0, /* 2343 */ 65276, 66, 1, 65470, 67, 1, 65469, 68, 1, 65468, 69, 1, 172, 1, 65387, 65, 65472, 65, 65409, 0, /* 2363 */ 22, 73, 2, 63, 65488, 120, 65465, 1, 65487, 75, 26, 65447, 65, 26, 30, 65416, 66, 26, 29, 65416, 0, /* 2384 */ 21, 74, 2, 63, 65487, 120, 65466, 1, 65486, 76, 26, 65446, 66, 26, 29, 65416, 0, /* 2401 */ 65, 65487, 77, 26, 65446, 66, 26, 29, 65416, 0, /* 2411 */ 22, 73, 2, 134, 65465, 1, 65487, 50, 65487, 75, 26, 31, 65416, 65, 26, 30, 65416, 0, /* 2429 */ 21, 74, 135, 65466, 1, 65486, 77, 26, 30, 65416, 0, /* 2440 */ 65, 65487, 77, 26, 30, 65416, 0, /* 2447 */ 139, 65487, 50, 65487, 12, 121, 65416, 0, /* 2455 */ 65487, 13, 121, 65416, 0, /* 2460 */ 65465, 1, 65487, 133, 65416, 121, 65416, 0, /* 2468 */ 65466, 1, 65486, 133, 65416, 0, /* 2474 */ 65487, 133, 65416, 0, /* 2478 */ 65469, 35, 62, 148, 65452, 1, 65500, 66, 28, 40, 65417, 0, /* 2490 */ 65470, 35, 62, 148, 65452, 1, 65500, 66, 28, 40, 65417, 0, /* 2502 */ 65, 65500, 66, 28, 40, 65417, 0, /* 2509 */ 65452, 1, 65500, 134, 65417, 0, /* 2515 */ 65316, 74, 1, 65463, 76, 1, 65461, 78, 1, 65459, 80, 1, 10, 95, 65443, 95, 65443, 0, /* 2533 */ 65316, 73, 1, 65464, 75, 1, 65462, 77, 1, 65460, 79, 1, 11, 95, 65443, 95, 65443, 0, /* 2551 */ 65316, 72, 1, 65465, 74, 1, 65463, 76, 1, 65461, 78, 1, 12, 95, 65443, 95, 65443, 0, /* 2569 */ 65316, 71, 1, 65466, 73, 1, 65464, 75, 1, 65462, 77, 1, 13, 95, 65443, 95, 65443, 0, /* 2587 */ 65316, 70, 1, 65467, 72, 1, 65465, 74, 1, 65463, 76, 1, 14, 95, 65443, 95, 65443, 0, /* 2605 */ 65316, 69, 1, 65468, 71, 1, 65466, 73, 1, 65464, 75, 1, 15, 95, 65443, 95, 65443, 0, /* 2623 */ 65316, 68, 1, 65469, 70, 1, 65467, 72, 1, 65465, 74, 1, 16, 95, 65443, 95, 65443, 0, /* 2641 */ 65316, 67, 1, 65470, 69, 1, 65468, 71, 1, 65466, 73, 1, 17, 95, 65443, 95, 65443, 0, /* 2659 */ 65316, 66, 1, 65471, 68, 1, 65469, 70, 1, 65467, 72, 1, 18, 95, 65443, 95, 65443, 0, /* 2677 */ 65316, 65, 1, 65472, 67, 1, 65470, 69, 1, 65468, 71, 1, 19, 95, 65443, 95, 65443, 0, /* 2695 */ 65316, 2, 2, 2, 91, 95, 65443, 95, 65443, 0, /* 2705 */ 65316, 80, 1, 65457, 2, 2, 91, 95, 65443, 95, 65443, 0, /* 2717 */ 65316, 79, 1, 65458, 2, 2, 91, 95, 65443, 95, 65443, 0, /* 2729 */ 65316, 78, 1, 65459, 80, 1, 65457, 2, 91, 95, 65443, 95, 65443, 0, /* 2743 */ 65316, 77, 1, 65460, 79, 1, 65458, 2, 91, 95, 65443, 95, 65443, 0, /* 2757 */ 65316, 76, 1, 65461, 78, 1, 65459, 80, 1, 65457, 91, 95, 65443, 95, 65443, 0, /* 2773 */ 65316, 75, 1, 65462, 77, 1, 65460, 79, 1, 65458, 91, 95, 65443, 95, 65443, 0, /* 2789 */ 20, 75, 65, 65486, 78, 26, 65445, 0, /* 2797 */ 23, 72, 2, 63, 65489, 120, 65464, 1, 65488, 74, 26, 65448, 64, 26, 31, 65416, 65, 26, 30, 65416, 92, 65445, 0, /* 2820 */ 65, 65488, 76, 26, 65447, 65, 26, 30, 65416, 92, 65445, 0, /* 2832 */ 26, 65446, 92, 65445, 0, /* 2837 */ 23, 72, 2, 135, 65464, 1, 65488, 49, 65488, 74, 26, 32, 65416, 64, 26, 31, 65416, 65, 26, 65446, 0, /* 2858 */ 65, 65488, 76, 26, 31, 65416, 65, 26, 65446, 0, /* 2868 */ 24, 71, 2, 63, 65490, 120, 65463, 1, 65489, 73, 26, 65449, 63, 26, 32, 65416, 64, 26, 31, 65416, 91, 65446, 0, /* 2891 */ 65, 65489, 75, 26, 65448, 64, 26, 31, 65416, 91, 65446, 0, /* 2903 */ 24, 71, 2, 136, 65463, 1, 65489, 48, 65489, 73, 26, 33, 65416, 63, 26, 32, 65416, 64, 26, 65447, 91, 65446, 0, /* 2926 */ 65, 65489, 75, 26, 32, 65416, 64, 26, 65447, 91, 65446, 0, /* 2938 */ 25, 70, 2, 63, 65491, 120, 65462, 1, 65490, 72, 26, 65450, 62, 26, 33, 65416, 63, 26, 32, 65416, 90, 65447, 0, /* 2961 */ 65, 65490, 74, 26, 65449, 63, 26, 32, 65416, 90, 65447, 0, /* 2973 */ 25, 70, 2, 137, 65462, 1, 65490, 47, 65490, 72, 26, 34, 65416, 62, 26, 33, 65416, 63, 26, 65448, 90, 65447, 0, /* 2996 */ 65, 65490, 74, 26, 33, 65416, 63, 26, 65448, 90, 65447, 0, /* 3008 */ 26, 69, 2, 63, 65492, 120, 65461, 1, 65491, 71, 26, 65451, 61, 26, 34, 65416, 62, 26, 33, 65416, 89, 65448, 0, /* 3031 */ 65, 65491, 73, 26, 65450, 62, 26, 33, 65416, 89, 65448, 0, /* 3043 */ 26, 69, 2, 138, 65461, 1, 65491, 46, 65491, 71, 26, 35, 65416, 61, 26, 34, 65416, 62, 26, 65449, 89, 65448, 0, /* 3066 */ 65, 65491, 73, 26, 34, 65416, 62, 26, 65449, 89, 65448, 0, /* 3078 */ 27, 68, 2, 63, 65493, 120, 65460, 1, 65492, 70, 26, 65452, 60, 26, 35, 65416, 61, 26, 34, 65416, 88, 65449, 0, /* 3101 */ 65, 65492, 72, 26, 65451, 61, 26, 34, 65416, 88, 65449, 0, /* 3113 */ 27, 68, 2, 139, 65460, 1, 65492, 45, 65492, 70, 26, 36, 65416, 60, 26, 35, 65416, 61, 26, 65450, 88, 65449, 0, /* 3136 */ 65, 65492, 72, 26, 35, 65416, 61, 26, 65450, 88, 65449, 0, /* 3148 */ 65455, 28, 67, 2, 63, 65494, 120, 65459, 1, 65493, 69, 26, 65453, 59, 26, 36, 65416, 60, 26, 35, 65416, 87, 65450, 0, /* 3172 */ 65456, 28, 67, 2, 63, 65494, 120, 65459, 1, 65493, 69, 26, 65453, 59, 26, 36, 65416, 60, 26, 35, 65416, 87, 65450, 0, /* 3196 */ 65, 65493, 71, 26, 65452, 60, 26, 35, 65416, 87, 65450, 0, /* 3208 */ 28, 67, 2, 140, 65459, 1, 65493, 44, 65493, 69, 26, 37, 65416, 59, 26, 36, 65416, 60, 26, 65451, 87, 65450, 0, /* 3231 */ 65, 65493, 71, 26, 36, 65416, 60, 26, 65451, 87, 65450, 0, /* 3243 */ 65457, 29, 66, 2, 63, 65495, 120, 65458, 1, 65494, 68, 26, 65454, 58, 26, 37, 65416, 59, 26, 36, 65416, 86, 65451, 0, /* 3267 */ 65458, 29, 66, 2, 63, 65495, 120, 65458, 1, 65494, 68, 26, 65454, 58, 26, 37, 65416, 59, 26, 36, 65416, 86, 65451, 0, /* 3291 */ 65, 65494, 70, 26, 65453, 59, 26, 36, 65416, 86, 65451, 0, /* 3303 */ 65456, 29, 66, 2, 141, 65458, 1, 65494, 43, 65494, 68, 26, 38, 65416, 58, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, /* 3327 */ 65457, 29, 66, 2, 141, 65458, 1, 65494, 43, 65494, 68, 26, 38, 65416, 58, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, /* 3351 */ 65, 65494, 70, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, /* 3363 */ 65459, 30, 65, 2, 63, 65496, 120, 65457, 1, 65495, 67, 26, 65455, 57, 26, 38, 65416, 58, 26, 37, 65416, 85, 65452, 0, /* 3387 */ 65460, 30, 65, 2, 63, 65496, 120, 65457, 1, 65495, 67, 26, 65455, 57, 26, 38, 65416, 58, 26, 37, 65416, 85, 65452, 0, /* 3411 */ 65, 65495, 69, 26, 65454, 58, 26, 37, 65416, 85, 65452, 0, /* 3423 */ 65458, 30, 65, 2, 142, 65457, 1, 65495, 42, 65495, 67, 26, 39, 65416, 57, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, /* 3447 */ 65459, 30, 65, 2, 142, 65457, 1, 65495, 42, 65495, 67, 26, 39, 65416, 57, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, /* 3471 */ 65, 65495, 69, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, /* 3483 */ 65461, 31, 64, 2, 63, 65497, 120, 65456, 1, 65496, 66, 26, 65456, 56, 26, 39, 65416, 57, 26, 38, 65416, 84, 65453, 0, /* 3507 */ 65462, 31, 64, 2, 63, 65497, 120, 65456, 1, 65496, 66, 26, 65456, 56, 26, 39, 65416, 57, 26, 38, 65416, 84, 65453, 0, /* 3531 */ 65, 65496, 68, 26, 65455, 57, 26, 38, 65416, 84, 65453, 0, /* 3543 */ 65460, 31, 64, 2, 143, 65456, 1, 65496, 41, 65496, 66, 26, 40, 65416, 56, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, /* 3567 */ 65461, 31, 64, 2, 143, 65456, 1, 65496, 41, 65496, 66, 26, 40, 65416, 56, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, /* 3591 */ 65, 65496, 68, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, /* 3603 */ 65463, 32, 63, 2, 63, 65498, 120, 65455, 1, 65497, 65, 26, 65457, 55, 26, 40, 65416, 56, 26, 39, 65416, 83, 65454, 0, /* 3627 */ 65464, 32, 63, 2, 63, 65498, 120, 65455, 1, 65497, 65, 26, 65457, 55, 26, 40, 65416, 56, 26, 39, 65416, 83, 65454, 0, /* 3651 */ 65, 65497, 67, 26, 65456, 56, 26, 39, 65416, 83, 65454, 0, /* 3663 */ 65462, 32, 63, 2, 144, 65455, 1, 65497, 40, 65497, 65, 26, 41, 65416, 55, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, /* 3687 */ 65463, 32, 63, 2, 144, 65455, 1, 65497, 40, 65497, 65, 26, 41, 65416, 55, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, /* 3711 */ 65, 65497, 67, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, /* 3723 */ 65465, 33, 62, 2, 63, 65499, 120, 65454, 1, 65498, 64, 2, 26, 41, 65416, 55, 26, 40, 65416, 82, 65455, 0, /* 3745 */ 65466, 33, 62, 2, 63, 65499, 120, 65454, 1, 65498, 64, 2, 26, 41, 65416, 55, 26, 40, 65416, 82, 65455, 0, /* 3767 */ 65, 65498, 66, 26, 65457, 55, 26, 40, 65416, 82, 65455, 0, /* 3779 */ 65464, 33, 62, 2, 145, 65454, 1, 65498, 39, 65498, 64, 26, 42, 65416, 54, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, /* 3803 */ 65465, 33, 62, 2, 145, 65454, 1, 65498, 39, 65498, 64, 26, 42, 65416, 54, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, /* 3827 */ 65, 65498, 66, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, /* 3839 */ 65298, 80, 1, 65456, 0, /* 3844 */ 65467, 34, 61, 2, 63, 65500, 120, 65453, 1, 65499, 65, 2, 26, 40, 1, 65416, 81, 65456, 0, /* 3863 */ 65468, 34, 61, 2, 63, 65500, 120, 65453, 1, 65499, 65, 2, 26, 40, 1, 65416, 81, 65456, 0, /* 3882 */ 65, 65499, 65, 2, 26, 41, 65416, 81, 65456, 0, /* 3892 */ 65466, 34, 61, 2, 146, 65453, 1, 65499, 38, 65499, 63, 2, 26, 41, 1, 65416, 54, 26, 65457, 81, 65456, 0, /* 3914 */ 65467, 34, 61, 2, 146, 65453, 1, 65499, 38, 65499, 63, 2, 26, 41, 1, 65416, 54, 26, 65457, 81, 65456, 0, /* 3936 */ 65, 65499, 65, 26, 42, 65416, 54, 26, 65457, 81, 65456, 0, /* 3948 */ 65439, 80, 1, 65457, 0, /* 3953 */ 28, 65457, 0, /* 3956 */ 65468, 35, 60, 2, 147, 65452, 1, 65500, 37, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, /* 3974 */ 65469, 35, 60, 2, 147, 65452, 1, 65500, 37, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, /* 3992 */ 65, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, /* 4002 */ 26, 65458, 80, 65457, 0, /* 4007 */ 65439, 79, 1, 65458, 0, /* 4012 */ 65470, 36, 61, 65, 65501, 65, 28, 65458, 0, /* 4021 */ 65471, 36, 61, 65, 65501, 65, 28, 65458, 0, /* 4030 */ 65374, 1, 1, 229, 65402, 65461, 0, /* 4037 */ 65374, 1, 1, 230, 65401, 65462, 0, /* 4044 */ 65374, 1, 1, 231, 65400, 65463, 0, /* 4051 */ 65374, 1, 1, 232, 65399, 65464, 0, /* 4058 */ 65374, 1, 1, 233, 65398, 65465, 0, /* 4065 */ 65374, 1, 1, 234, 65397, 65466, 0, /* 4072 */ 65374, 1, 1, 235, 65396, 65467, 0, /* 4079 */ 65374, 80, 1, 65456, 1, 236, 65395, 65468, 0, /* 4088 */ 65374, 78, 1, 65458, 79, 1, 65457, 80, 1, 156, 65394, 65469, 0, /* 4101 */ 65374, 76, 1, 65460, 77, 1, 65459, 78, 1, 159, 65393, 65470, 0, /* 4114 */ 65445, 65470, 0, /* 4117 */ 65374, 74, 1, 65462, 75, 1, 65461, 76, 1, 162, 65392, 65471, 0, /* 4130 */ 65374, 72, 1, 65464, 73, 1, 65463, 74, 1, 165, 65391, 65472, 0, /* 4143 */ 65374, 70, 1, 65466, 71, 1, 65465, 72, 1, 168, 65390, 65473, 0, /* 4156 */ 65374, 68, 1, 65468, 69, 1, 65467, 70, 1, 171, 65389, 65474, 0, /* 4169 */ 65374, 66, 1, 65470, 67, 1, 65469, 68, 1, 174, 65388, 65475, 0, /* 4182 */ 65534, 0, /* 4184 */ 65535, 0, }; static const uint16_t ARMSubRegIdxLists[] = { /* 0 */ 1, 2, 0, /* 3 */ 1, 17, 18, 2, 0, /* 8 */ 1, 3, 0, /* 11 */ 1, 17, 18, 3, 0, /* 16 */ 9, 10, 0, /* 19 */ 17, 18, 0, /* 22 */ 1, 17, 18, 2, 19, 20, 0, /* 29 */ 1, 17, 18, 3, 21, 22, 0, /* 36 */ 1, 2, 3, 13, 33, 37, 0, /* 43 */ 1, 17, 18, 2, 3, 13, 33, 37, 0, /* 52 */ 1, 17, 18, 2, 19, 20, 3, 13, 33, 37, 0, /* 63 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 13, 33, 37, 0, /* 76 */ 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 0, /* 88 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 0, /* 104 */ 1, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0, /* 116 */ 1, 17, 18, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0, /* 130 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 13, 14, 33, 34, 35, 36, 37, 0, /* 148 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 23, 24, 13, 14, 33, 34, 35, 36, 37, 0, /* 168 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 0, /* 188 */ 1, 3, 5, 33, 43, 0, /* 194 */ 1, 17, 18, 3, 5, 33, 43, 0, /* 202 */ 1, 17, 18, 3, 21, 22, 5, 33, 43, 0, /* 212 */ 1, 17, 18, 3, 21, 22, 5, 31, 32, 33, 43, 0, /* 224 */ 1, 3, 5, 7, 33, 38, 43, 45, 51, 0, /* 234 */ 1, 17, 18, 3, 5, 7, 33, 38, 43, 45, 51, 0, /* 246 */ 1, 17, 18, 3, 21, 22, 5, 7, 33, 38, 43, 45, 51, 0, /* 260 */ 1, 17, 18, 3, 21, 22, 5, 31, 32, 7, 33, 38, 43, 45, 51, 0, /* 276 */ 1, 17, 18, 3, 21, 22, 5, 31, 32, 7, 27, 28, 33, 38, 43, 45, 51, 0, /* 294 */ 11, 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, /* 333 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, /* 376 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, /* 423 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 31, 32, 6, 29, 30, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, /* 474 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 31, 32, 6, 29, 30, 16, 7, 27, 28, 8, 25, 26, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, }; static MCRegisterDesc ARMRegDesc[] = { // Descriptors { 12, 0, 0, 0, 0, 0 }, { 1235, 16, 16, 2, 66945, 0 }, { 1268, 16, 16, 2, 66945, 0 }, { 1240, 16, 16, 2, 66945, 0 }, { 1199, 16, 16, 2, 66945, 0 }, { 1250, 16, 16, 2, 66945, 0 }, { 1226, 16, 16, 2, 17664, 0 }, { 1257, 16, 16, 2, 17664, 0 }, { 1205, 16, 16, 2, 66913, 0 }, { 1211, 16, 16, 2, 66913, 0 }, { 1232, 16, 16, 2, 66913, 0 }, { 1196, 16, 16, 2, 66913, 0 }, { 1223, 16, 1526, 2, 66913, 0 }, { 1245, 16, 16, 2, 66913, 0 }, { 119, 350, 4013, 19, 13250, 8 }, { 248, 357, 2479, 19, 13250, 8 }, { 363, 364, 3957, 19, 13250, 8 }, { 479, 378, 3845, 19, 13250, 8 }, { 605, 392, 3893, 19, 13250, 8 }, { 723, 406, 3724, 19, 13250, 8 }, { 837, 420, 3780, 19, 13250, 8 }, { 943, 434, 3604, 19, 13250, 8 }, { 1057, 448, 3664, 19, 13250, 8 }, { 1163, 462, 3484, 19, 13250, 8 }, { 9, 476, 3544, 19, 13250, 8 }, { 141, 490, 3364, 19, 13250, 8 }, { 282, 504, 3424, 19, 13250, 8 }, { 408, 518, 3244, 19, 13250, 8 }, { 523, 532, 3304, 19, 13250, 8 }, { 649, 546, 3149, 19, 13250, 8 }, { 768, 16, 3208, 2, 17761, 0 }, { 882, 16, 3078, 2, 17761, 0 }, { 988, 16, 3113, 2, 17761, 0 }, { 1102, 16, 3008, 2, 17761, 0 }, { 59, 16, 3043, 2, 17761, 0 }, { 192, 16, 2938, 2, 17761, 0 }, { 336, 16, 2973, 2, 17761, 0 }, { 456, 16, 2868, 2, 17761, 0 }, { 575, 16, 2903, 2, 17761, 0 }, { 697, 16, 2797, 2, 17761, 0 }, { 804, 16, 2837, 2, 17761, 0 }, { 914, 16, 2363, 2, 17761, 0 }, { 1024, 16, 2411, 2, 17761, 0 }, { 1134, 16, 2384, 2, 17761, 0 }, { 95, 16, 2429, 2, 17761, 0 }, { 224, 16, 2789, 2, 17761, 0 }, { 390, 16, 16, 2, 17761, 0 }, { 125, 16, 16, 2, 17761, 0 }, { 257, 16, 16, 2, 17761, 0 }, { 381, 16, 16, 2, 17761, 0 }, { 122, 353, 1112, 22, 2196, 11 }, { 254, 374, 775, 22, 2196, 11 }, { 378, 402, 314, 22, 2196, 11 }, { 500, 430, 244, 22, 2196, 11 }, { 629, 458, 234, 22, 2196, 11 }, { 744, 486, 224, 22, 2196, 11 }, { 861, 514, 214, 22, 2196, 11 }, { 964, 542, 204, 22, 2196, 11 }, { 1081, 804, 194, 0, 12818, 20 }, { 1184, 807, 184, 0, 12818, 20 }, { 35, 810, 174, 0, 12818, 20 }, { 168, 813, 164, 0, 12818, 20 }, { 312, 816, 154, 0, 12818, 20 }, { 436, 819, 591, 0, 12818, 20 }, { 555, 822, 2447, 0, 12818, 20 }, { 677, 825, 1106, 0, 12818, 20 }, { 128, 16, 1373, 2, 66913, 0 }, { 260, 16, 1371, 2, 66913, 0 }, { 384, 16, 1371, 2, 66913, 0 }, { 506, 16, 1369, 2, 66913, 0 }, { 632, 16, 1369, 2, 66913, 0 }, { 750, 16, 1367, 2, 66913, 0 }, { 864, 16, 1367, 2, 66913, 0 }, { 970, 16, 1365, 2, 66913, 0 }, { 1084, 16, 1365, 2, 66913, 0 }, { 1190, 16, 1363, 2, 66913, 0 }, { 39, 16, 1363, 2, 66913, 0 }, { 176, 16, 1361, 2, 66913, 0 }, { 316, 16, 1359, 2, 66913, 0 }, { 131, 16, 4021, 2, 65585, 0 }, { 269, 16, 4012, 2, 65585, 0 }, { 387, 16, 2490, 2, 65585, 0 }, { 509, 16, 2478, 2, 65585, 0 }, { 635, 16, 3974, 2, 65585, 0 }, { 753, 16, 3956, 2, 65585, 0 }, { 867, 16, 3863, 2, 65585, 0 }, { 973, 16, 3844, 2, 65585, 0 }, { 1087, 16, 3914, 2, 65585, 0 }, { 1193, 16, 3892, 2, 65585, 0 }, { 43, 16, 3745, 2, 65585, 0 }, { 180, 16, 3723, 2, 65585, 0 }, { 320, 16, 3803, 2, 65585, 0 }, { 440, 16, 3779, 2, 65585, 0 }, { 559, 16, 3627, 2, 65585, 0 }, { 681, 16, 3603, 2, 65585, 0 }, { 788, 16, 3687, 2, 65585, 0 }, { 898, 16, 3663, 2, 65585, 0 }, { 1008, 16, 3507, 2, 65585, 0 }, { 1118, 16, 3483, 2, 65585, 0 }, { 79, 16, 3567, 2, 65585, 0 }, { 212, 16, 3543, 2, 65585, 0 }, { 356, 16, 3387, 2, 65585, 0 }, { 472, 16, 3363, 2, 65585, 0 }, { 595, 16, 3447, 2, 65585, 0 }, { 713, 16, 3423, 2, 65585, 0 }, { 824, 16, 3267, 2, 65585, 0 }, { 930, 16, 3243, 2, 65585, 0 }, { 1044, 16, 3327, 2, 65585, 0 }, { 1150, 16, 3303, 2, 65585, 0 }, { 115, 16, 3172, 2, 65585, 0 }, { 244, 16, 3148, 2, 65585, 0 }, { 360, 367, 4015, 29, 5426, 23 }, { 476, 381, 2502, 29, 5426, 23 }, { 602, 395, 3992, 29, 5426, 23 }, { 720, 409, 3882, 29, 5426, 23 }, { 834, 423, 3936, 29, 5426, 23 }, { 940, 437, 3767, 29, 5426, 23 }, { 1054, 451, 3827, 29, 5426, 23 }, { 1160, 465, 3651, 29, 5426, 23 }, { 6, 479, 3711, 29, 5426, 23 }, { 151, 493, 3531, 29, 5426, 23 }, { 278, 507, 3591, 29, 5426, 23 }, { 404, 521, 3411, 29, 5426, 23 }, { 519, 535, 3471, 29, 5426, 23 }, { 645, 549, 3291, 29, 5426, 23 }, { 764, 4007, 3351, 11, 17602, 35 }, { 878, 3948, 3196, 11, 13522, 35 }, { 984, 1080, 3231, 8, 17329, 39 }, { 1098, 1080, 3101, 8, 17329, 39 }, { 55, 1080, 3136, 8, 17329, 39 }, { 204, 1080, 3031, 8, 17329, 39 }, { 332, 1080, 3066, 8, 17329, 39 }, { 452, 1080, 2961, 8, 17329, 39 }, { 571, 1080, 2996, 8, 17329, 39 }, { 693, 1080, 2891, 8, 17329, 39 }, { 800, 1080, 2926, 8, 17329, 39 }, { 910, 1080, 2820, 8, 17329, 39 }, { 1020, 1080, 2858, 8, 17329, 39 }, { 1130, 1080, 2401, 8, 17329, 39 }, { 91, 1080, 2440, 8, 17329, 39 }, { 236, 1080, 2791, 8, 17329, 39 }, { 251, 1339, 1114, 168, 1044, 57 }, { 375, 1319, 347, 168, 1044, 57 }, { 497, 1299, 142, 168, 1044, 57 }, { 626, 1279, 142, 168, 1044, 57 }, { 741, 1259, 142, 168, 1044, 57 }, { 858, 1239, 142, 168, 1044, 57 }, { 961, 1219, 142, 168, 1044, 57 }, { 1078, 1203, 142, 88, 1456, 74 }, { 1181, 1191, 142, 76, 2114, 87 }, { 32, 1179, 142, 76, 2114, 87 }, { 164, 1167, 142, 76, 2114, 87 }, { 308, 1155, 142, 76, 2114, 87 }, { 432, 1143, 142, 76, 2114, 87 }, { 551, 1131, 344, 76, 2114, 87 }, { 673, 1119, 1108, 76, 2114, 87 }, { 491, 2156, 16, 474, 4, 92 }, { 620, 2101, 16, 474, 4, 92 }, { 735, 2046, 16, 474, 4, 92 }, { 852, 1991, 16, 474, 4, 92 }, { 955, 1936, 16, 474, 4, 92 }, { 1072, 1885, 16, 423, 272, 109 }, { 1175, 1838, 16, 376, 512, 124 }, { 26, 1795, 16, 333, 720, 137 }, { 158, 1756, 16, 294, 1186, 148 }, { 301, 1717, 16, 294, 1186, 148 }, { 424, 1678, 16, 294, 1186, 148 }, { 543, 1639, 16, 294, 1186, 148 }, { 665, 1600, 16, 294, 1186, 148 }, { 1219, 4114, 16, 16, 17856, 2 }, { 263, 783, 16, 16, 8946, 5 }, { 503, 786, 16, 16, 8946, 5 }, { 747, 789, 16, 16, 8946, 5 }, { 967, 792, 16, 16, 8946, 5 }, { 1187, 795, 16, 16, 8946, 5 }, { 172, 798, 16, 16, 8946, 5 }, { 366, 1513, 1113, 63, 1570, 28 }, { 482, 4169, 2511, 63, 1570, 28 }, { 611, 1500, 778, 63, 1570, 28 }, { 726, 4156, 770, 63, 1570, 28 }, { 843, 1487, 317, 63, 1570, 28 }, { 946, 4143, 660, 63, 1570, 28 }, { 1063, 1474, 308, 63, 1570, 28 }, { 1166, 4130, 654, 63, 1570, 28 }, { 16, 1461, 302, 63, 1570, 28 }, { 134, 4117, 648, 63, 1570, 28 }, { 289, 1448, 296, 63, 1570, 28 }, { 412, 4101, 642, 63, 1570, 28 }, { 531, 1435, 290, 63, 1570, 28 }, { 653, 4088, 636, 63, 1570, 28 }, { 776, 1424, 284, 52, 1680, 42 }, { 886, 4079, 630, 43, 1872, 48 }, { 996, 1417, 278, 36, 2401, 53 }, { 1106, 4072, 624, 36, 2401, 53 }, { 67, 1410, 272, 36, 2401, 53 }, { 184, 4065, 618, 36, 2401, 53 }, { 344, 1403, 266, 36, 2401, 53 }, { 460, 4058, 612, 36, 2401, 53 }, { 583, 1396, 260, 36, 2401, 53 }, { 701, 4051, 606, 36, 2401, 53 }, { 812, 1389, 254, 36, 2401, 53 }, { 918, 4044, 600, 36, 2401, 53 }, { 1032, 1382, 765, 36, 2401, 53 }, { 1138, 4037, 2455, 36, 2401, 53 }, { 103, 1375, 2474, 36, 2401, 53 }, { 216, 4030, 1107, 36, 2401, 53 }, { 599, 1026, 4018, 212, 5314, 192 }, { 717, 1014, 3953, 212, 5314, 192 }, { 831, 1002, 4002, 212, 5314, 192 }, { 937, 990, 3909, 212, 5314, 192 }, { 1051, 978, 3909, 212, 5314, 192 }, { 1157, 966, 3798, 212, 5314, 192 }, { 3, 954, 3798, 212, 5314, 192 }, { 148, 942, 3682, 212, 5314, 192 }, { 275, 930, 3682, 212, 5314, 192 }, { 401, 918, 3562, 212, 5314, 192 }, { 515, 906, 3562, 212, 5314, 192 }, { 641, 894, 3442, 212, 5314, 192 }, { 760, 1070, 3442, 202, 17506, 199 }, { 874, 1060, 3322, 202, 13426, 199 }, { 980, 1052, 3322, 194, 14226, 205 }, { 1094, 1044, 3226, 194, 13698, 205 }, { 51, 1038, 3226, 188, 14049, 210 }, { 200, 1038, 3131, 188, 14049, 210 }, { 328, 1038, 3131, 188, 14049, 210 }, { 448, 1038, 3061, 188, 14049, 210 }, { 567, 1038, 3061, 188, 14049, 210 }, { 689, 1038, 2991, 188, 14049, 210 }, { 796, 1038, 2991, 188, 14049, 210 }, { 906, 1038, 2921, 188, 14049, 210 }, { 1016, 1038, 2921, 188, 14049, 210 }, { 1126, 1038, 2832, 188, 14049, 210 }, { 87, 1038, 2855, 188, 14049, 210 }, { 232, 1038, 2794, 188, 14049, 210 }, { 828, 2677, 4010, 276, 5170, 157 }, { 934, 2659, 3951, 276, 5170, 157 }, { 1048, 2641, 3951, 276, 5170, 157 }, { 1154, 2623, 3842, 276, 5170, 157 }, { 0, 2605, 3842, 276, 5170, 157 }, { 145, 2587, 3743, 276, 5170, 157 }, { 272, 2569, 3743, 276, 5170, 157 }, { 398, 2551, 3625, 276, 5170, 157 }, { 512, 2533, 3625, 276, 5170, 157 }, { 638, 2515, 3505, 276, 5170, 157 }, { 756, 2773, 3505, 260, 17378, 166 }, { 870, 2757, 3385, 260, 13298, 166 }, { 976, 2743, 3385, 246, 14114, 174 }, { 1090, 2729, 3265, 246, 13586, 174 }, { 47, 2717, 3265, 234, 13954, 181 }, { 196, 2705, 3170, 234, 13778, 181 }, { 324, 2695, 3170, 224, 13873, 187 }, { 444, 2695, 3099, 224, 13873, 187 }, { 563, 2695, 3099, 224, 13873, 187 }, { 685, 2695, 3029, 224, 13873, 187 }, { 792, 2695, 3029, 224, 13873, 187 }, { 902, 2695, 2959, 224, 13873, 187 }, { 1012, 2695, 2959, 224, 13873, 187 }, { 1122, 2695, 2856, 224, 13873, 187 }, { 83, 2695, 2856, 224, 13873, 187 }, { 228, 2695, 2795, 224, 13873, 187 }, { 369, 360, 2509, 22, 1956, 11 }, { 614, 388, 583, 22, 1956, 11 }, { 846, 416, 756, 22, 1956, 11 }, { 1066, 444, 747, 22, 1956, 11 }, { 19, 472, 738, 22, 1956, 11 }, { 293, 500, 729, 22, 1956, 11 }, { 535, 528, 720, 22, 1956, 11 }, { 780, 3839, 711, 3, 2336, 16 }, { 1000, 562, 702, 0, 8898, 20 }, { 71, 565, 693, 0, 8898, 20 }, { 348, 568, 684, 0, 8898, 20 }, { 587, 571, 675, 0, 8898, 20 }, { 816, 574, 666, 0, 8898, 20 }, { 1036, 577, 2460, 0, 8898, 20 }, { 107, 580, 2468, 0, 8898, 20 }, { 608, 2343, 2488, 148, 900, 57 }, { 840, 2323, 588, 148, 900, 57 }, { 1060, 2303, 588, 148, 900, 57 }, { 13, 2283, 588, 148, 900, 57 }, { 286, 2263, 588, 148, 900, 57 }, { 527, 2243, 588, 148, 900, 57 }, { 772, 2225, 588, 130, 1328, 66 }, { 992, 2211, 588, 116, 1776, 81 }, { 63, 1588, 588, 104, 2034, 87 }, { 340, 1576, 588, 104, 2034, 87 }, { 579, 1564, 588, 104, 2034, 87 }, { 808, 1552, 588, 104, 2034, 87 }, { 1028, 1540, 588, 104, 2034, 87 }, { 99, 1528, 2382, 104, 2034, 87 }, }; // SPR Register Class... static MCPhysReg SPR[] = { ARM_S0, ARM_S2, ARM_S4, ARM_S6, ARM_S8, ARM_S10, ARM_S12, ARM_S14, ARM_S16, ARM_S18, ARM_S20, ARM_S22, ARM_S24, ARM_S26, ARM_S28, ARM_S30, ARM_S1, ARM_S3, ARM_S5, ARM_S7, ARM_S9, ARM_S11, ARM_S13, ARM_S15, ARM_S17, ARM_S19, ARM_S21, ARM_S23, ARM_S25, ARM_S27, ARM_S29, ARM_S31, }; // SPR Bit set. static const uint8_t SPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, }; // GPR Register Class... static MCPhysReg GPR[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R4, ARM_R5, ARM_R6, ARM_R7, ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_SP, ARM_LR, ARM_PC, }; // GPR Bit set. static const uint8_t GPRBits[] = { 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, }; // GPRwithAPSR Register Class... static MCPhysReg GPRwithAPSR[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R4, ARM_R5, ARM_R6, ARM_R7, ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_SP, ARM_LR, ARM_APSR_NZCV, }; // GPRwithAPSR Bit set. static const uint8_t GPRwithAPSRBits[] = { 0x04, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, }; // SPR_8 Register Class... static MCPhysReg SPR_8[] = { ARM_S0, ARM_S1, ARM_S2, ARM_S3, ARM_S4, ARM_S5, ARM_S6, ARM_S7, ARM_S8, ARM_S9, ARM_S10, ARM_S11, ARM_S12, ARM_S13, ARM_S14, ARM_S15, }; // SPR_8 Bit set. static const uint8_t SPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, }; // GPRnopc Register Class... static MCPhysReg GPRnopc[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R4, ARM_R5, ARM_R6, ARM_R7, ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_SP, ARM_LR, }; // GPRnopc Bit set. static const uint8_t GPRnopcBits[] = { 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, }; // rGPR Register Class... static MCPhysReg rGPR[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R4, ARM_R5, ARM_R6, ARM_R7, ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_LR, }; // rGPR Bit set. static const uint8_t rGPRBits[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, }; // hGPR Register Class... static MCPhysReg hGPR[] = { ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_SP, ARM_LR, ARM_PC, }; // hGPR Bit set. static const uint8_t hGPRBits[] = { 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, }; // tGPR Register Class... static MCPhysReg tGPR[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R4, ARM_R5, ARM_R6, ARM_R7, }; // tGPR Bit set. static const uint8_t tGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GPRnopc_and_hGPR Register Class... static MCPhysReg GPRnopc_and_hGPR[] = { ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_SP, ARM_LR, }; // GPRnopc_and_hGPR Bit set. static const uint8_t GPRnopc_and_hGPRBits[] = { 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, }; // hGPR_and_rGPR Register Class... static MCPhysReg hGPR_and_rGPR[] = { ARM_R8, ARM_R9, ARM_R10, ARM_R11, ARM_R12, ARM_LR, }; // hGPR_and_rGPR Bit set. static const uint8_t hGPR_and_rGPRBits[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, }; // tcGPR Register Class... static MCPhysReg tcGPR[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, ARM_R12, }; // tcGPR Bit set. static const uint8_t tcGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x40, }; // tGPR_and_tcGPR Register Class... static MCPhysReg tGPR_and_tcGPR[] = { ARM_R0, ARM_R1, ARM_R2, ARM_R3, }; // tGPR_and_tcGPR Bit set. static const uint8_t tGPR_and_tcGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, }; // CCR Register Class... static MCPhysReg CCR[] = { ARM_CPSR, }; // CCR Bit set. static const uint8_t CCRBits[] = { 0x08, }; // GPRsp Register Class... static MCPhysReg GPRsp[] = { ARM_SP, }; // GPRsp Bit set. static const uint8_t GPRspBits[] = { 0x00, 0x10, }; // hGPR_and_tcGPR Register Class... static MCPhysReg hGPR_and_tcGPR[] = { ARM_R12, }; // hGPR_and_tcGPR Bit set. static const uint8_t hGPR_and_tcGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, }; // DPR Register Class... static MCPhysReg DPR[] = { ARM_D0, ARM_D1, ARM_D2, ARM_D3, ARM_D4, ARM_D5, ARM_D6, ARM_D7, ARM_D8, ARM_D9, ARM_D10, ARM_D11, ARM_D12, ARM_D13, ARM_D14, ARM_D15, ARM_D16, ARM_D17, ARM_D18, ARM_D19, ARM_D20, ARM_D21, ARM_D22, ARM_D23, ARM_D24, ARM_D25, ARM_D26, ARM_D27, ARM_D28, ARM_D29, ARM_D30, ARM_D31, }; // DPR Bit set. static const uint8_t DPRBits[] = { 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, }; // DPR_VFP2 Register Class... static MCPhysReg DPR_VFP2[] = { ARM_D0, ARM_D1, ARM_D2, ARM_D3, ARM_D4, ARM_D5, ARM_D6, ARM_D7, ARM_D8, ARM_D9, ARM_D10, ARM_D11, ARM_D12, ARM_D13, ARM_D14, ARM_D15, }; // DPR_VFP2 Bit set. static const uint8_t DPR_VFP2Bits[] = { 0x00, 0xc0, 0xff, 0x3f, }; // DPR_8 Register Class... static MCPhysReg DPR_8[] = { ARM_D0, ARM_D1, ARM_D2, ARM_D3, ARM_D4, ARM_D5, ARM_D6, ARM_D7, }; // DPR_8 Bit set. static const uint8_t DPR_8Bits[] = { 0x00, 0xc0, 0x3f, }; // GPRPair Register Class... static MCPhysReg GPRPair[] = { ARM_R0_R1, ARM_R2_R3, ARM_R4_R5, ARM_R6_R7, ARM_R8_R9, ARM_R10_R11, ARM_R12_SP, }; // GPRPair Bit set. static const uint8_t GPRPairBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, }; // GPRPair_with_gsub_1_in_rGPR Register Class... static MCPhysReg GPRPair_with_gsub_1_in_rGPR[] = { ARM_R0_R1, ARM_R2_R3, ARM_R4_R5, ARM_R6_R7, ARM_R8_R9, ARM_R10_R11, }; // GPRPair_with_gsub_1_in_rGPR Bit set. static const uint8_t GPRPair_with_gsub_1_in_rGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, }; // GPRPair_with_gsub_0_in_tGPR Register Class... static MCPhysReg GPRPair_with_gsub_0_in_tGPR[] = { ARM_R0_R1, ARM_R2_R3, ARM_R4_R5, ARM_R6_R7, }; // GPRPair_with_gsub_0_in_tGPR Bit set. static const uint8_t GPRPair_with_gsub_0_in_tGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, }; // GPRPair_with_gsub_0_in_hGPR Register Class... static MCPhysReg GPRPair_with_gsub_0_in_hGPR[] = { ARM_R8_R9, ARM_R10_R11, ARM_R12_SP, }; // GPRPair_with_gsub_0_in_hGPR Bit set. static const uint8_t GPRPair_with_gsub_0_in_hGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, }; // GPRPair_with_gsub_0_in_tcGPR Register Class... static MCPhysReg GPRPair_with_gsub_0_in_tcGPR[] = { ARM_R0_R1, ARM_R2_R3, ARM_R12_SP, }; // GPRPair_with_gsub_0_in_tcGPR Bit set. static const uint8_t GPRPair_with_gsub_0_in_tcGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, }; // GPRPair_with_gsub_1_in_hGPR_and_rGPR Register Class... static MCPhysReg GPRPair_with_gsub_1_in_hGPR_and_rGPR[] = { ARM_R8_R9, ARM_R10_R11, }; // GPRPair_with_gsub_1_in_hGPR_and_rGPR Bit set. static const uint8_t GPRPair_with_gsub_1_in_hGPR_and_rGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, }; // GPRPair_with_gsub_1_in_tcGPR Register Class... static MCPhysReg GPRPair_with_gsub_1_in_tcGPR[] = { ARM_R0_R1, ARM_R2_R3, }; // GPRPair_with_gsub_1_in_tcGPR Bit set. static const uint8_t GPRPair_with_gsub_1_in_tcGPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, }; // GPRPair_with_gsub_1_in_GPRsp Register Class... static MCPhysReg GPRPair_with_gsub_1_in_GPRsp[] = { ARM_R12_SP, }; // GPRPair_with_gsub_1_in_GPRsp Bit set. static const uint8_t GPRPair_with_gsub_1_in_GPRspBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, }; // DPairSpc Register Class... static MCPhysReg DPairSpc[] = { ARM_D0_D2, ARM_D1_D3, ARM_D2_D4, ARM_D3_D5, ARM_D4_D6, ARM_D5_D7, ARM_D6_D8, ARM_D7_D9, ARM_D8_D10, ARM_D9_D11, ARM_D10_D12, ARM_D11_D13, ARM_D12_D14, ARM_D13_D15, ARM_D14_D16, ARM_D15_D17, ARM_D16_D18, ARM_D17_D19, ARM_D18_D20, ARM_D19_D21, ARM_D20_D22, ARM_D21_D23, ARM_D22_D24, ARM_D23_D25, ARM_D24_D26, ARM_D25_D27, ARM_D26_D28, ARM_D27_D29, ARM_D28_D30, ARM_D29_D31, }; // DPairSpc Bit set. static const uint8_t DPairSpcBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x1f, }; // DPairSpc_with_ssub_0 Register Class... static MCPhysReg DPairSpc_with_ssub_0[] = { ARM_D0_D2, ARM_D1_D3, ARM_D2_D4, ARM_D3_D5, ARM_D4_D6, ARM_D5_D7, ARM_D6_D8, ARM_D7_D9, ARM_D8_D10, ARM_D9_D11, ARM_D10_D12, ARM_D11_D13, ARM_D12_D14, ARM_D13_D15, ARM_D14_D16, ARM_D15_D17, }; // DPairSpc_with_ssub_0 Bit set. static const uint8_t DPairSpc_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, }; // DPairSpc_with_dsub_2_then_ssub_0 Register Class... static MCPhysReg DPairSpc_with_dsub_2_then_ssub_0[] = { ARM_D0_D2, ARM_D1_D3, ARM_D2_D4, ARM_D3_D5, ARM_D4_D6, ARM_D5_D7, ARM_D6_D8, ARM_D7_D9, ARM_D8_D10, ARM_D9_D11, ARM_D10_D12, ARM_D11_D13, ARM_D12_D14, ARM_D13_D15, }; // DPairSpc_with_dsub_2_then_ssub_0 Bit set. static const uint8_t DPairSpc_with_dsub_2_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, }; // DPairSpc_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg DPairSpc_with_dsub_0_in_DPR_8[] = { ARM_D0_D2, ARM_D1_D3, ARM_D2_D4, ARM_D3_D5, ARM_D4_D6, ARM_D5_D7, ARM_D6_D8, ARM_D7_D9, }; // DPairSpc_with_dsub_0_in_DPR_8 Bit set. static const uint8_t DPairSpc_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, }; // DPairSpc_with_dsub_2_in_DPR_8 Register Class... static MCPhysReg DPairSpc_with_dsub_2_in_DPR_8[] = { ARM_D0_D2, ARM_D1_D3, ARM_D2_D4, ARM_D3_D5, ARM_D4_D6, ARM_D5_D7, }; // DPairSpc_with_dsub_2_in_DPR_8 Bit set. static const uint8_t DPairSpc_with_dsub_2_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, }; // DPair Register Class... static MCPhysReg DPair[] = { ARM_Q0, ARM_D1_D2, ARM_Q1, ARM_D3_D4, ARM_Q2, ARM_D5_D6, ARM_Q3, ARM_D7_D8, ARM_Q4, ARM_D9_D10, ARM_Q5, ARM_D11_D12, ARM_Q6, ARM_D13_D14, ARM_Q7, ARM_D15_D16, ARM_Q8, ARM_D17_D18, ARM_Q9, ARM_D19_D20, ARM_Q10, ARM_D21_D22, ARM_Q11, ARM_D23_D24, ARM_Q12, ARM_D25_D26, ARM_Q13, ARM_D27_D28, ARM_Q14, ARM_D29_D30, ARM_Q15, }; // DPair Bit set. static const uint8_t DPairBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // DPair_with_ssub_0 Register Class... static MCPhysReg DPair_with_ssub_0[] = { ARM_Q0, ARM_D1_D2, ARM_Q1, ARM_D3_D4, ARM_Q2, ARM_D5_D6, ARM_Q3, ARM_D7_D8, ARM_Q4, ARM_D9_D10, ARM_Q5, ARM_D11_D12, ARM_Q6, ARM_D13_D14, ARM_Q7, ARM_D15_D16, }; // DPair_with_ssub_0 Bit set. static const uint8_t DPair_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // QPR Register Class... static MCPhysReg QPR[] = { ARM_Q0, ARM_Q1, ARM_Q2, ARM_Q3, ARM_Q4, ARM_Q5, ARM_Q6, ARM_Q7, ARM_Q8, ARM_Q9, ARM_Q10, ARM_Q11, ARM_Q12, ARM_Q13, ARM_Q14, ARM_Q15, }; // QPR Bit set. static const uint8_t QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // DPair_with_ssub_2 Register Class... static MCPhysReg DPair_with_ssub_2[] = { ARM_Q0, ARM_D1_D2, ARM_Q1, ARM_D3_D4, ARM_Q2, ARM_D5_D6, ARM_Q3, ARM_D7_D8, ARM_Q4, ARM_D9_D10, ARM_Q5, ARM_D11_D12, ARM_Q6, ARM_D13_D14, ARM_Q7, }; // DPair_with_ssub_2 Bit set. static const uint8_t DPair_with_ssub_2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, }; // DPair_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg DPair_with_dsub_0_in_DPR_8[] = { ARM_Q0, ARM_D1_D2, ARM_Q1, ARM_D3_D4, ARM_Q2, ARM_D5_D6, ARM_Q3, ARM_D7_D8, }; // DPair_with_dsub_0_in_DPR_8 Bit set. static const uint8_t DPair_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, }; // QPR_VFP2 Register Class... static MCPhysReg QPR_VFP2[] = { ARM_Q0, ARM_Q1, ARM_Q2, ARM_Q3, ARM_Q4, ARM_Q5, ARM_Q6, ARM_Q7, }; // QPR_VFP2 Bit set. static const uint8_t QPR_VFP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // DPair_with_dsub_1_in_DPR_8 Register Class... static MCPhysReg DPair_with_dsub_1_in_DPR_8[] = { ARM_Q0, ARM_D1_D2, ARM_Q1, ARM_D3_D4, ARM_Q2, ARM_D5_D6, ARM_Q3, }; // DPair_with_dsub_1_in_DPR_8 Bit set. static const uint8_t DPair_with_dsub_1_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, }; // QPR_8 Register Class... static MCPhysReg QPR_8[] = { ARM_Q0, ARM_Q1, ARM_Q2, ARM_Q3, }; // QPR_8 Bit set. static const uint8_t QPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, }; // DTriple Register Class... static MCPhysReg DTriple[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, ARM_D6_D7_D8, ARM_D7_D8_D9, ARM_D8_D9_D10, ARM_D9_D10_D11, ARM_D10_D11_D12, ARM_D11_D12_D13, ARM_D12_D13_D14, ARM_D13_D14_D15, ARM_D14_D15_D16, ARM_D15_D16_D17, ARM_D16_D17_D18, ARM_D17_D18_D19, ARM_D18_D19_D20, ARM_D19_D20_D21, ARM_D20_D21_D22, ARM_D21_D22_D23, ARM_D22_D23_D24, ARM_D23_D24_D25, ARM_D24_D25_D26, ARM_D25_D26_D27, ARM_D26_D27_D28, ARM_D27_D28_D29, ARM_D28_D29_D30, ARM_D29_D30_D31, }; // DTriple Bit set. static const uint8_t DTripleBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x3f, }; // DTripleSpc Register Class... static MCPhysReg DTripleSpc[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, ARM_D12_D14_D16, ARM_D13_D15_D17, ARM_D14_D16_D18, ARM_D15_D17_D19, ARM_D16_D18_D20, ARM_D17_D19_D21, ARM_D18_D20_D22, ARM_D19_D21_D23, ARM_D20_D22_D24, ARM_D21_D23_D25, ARM_D22_D24_D26, ARM_D23_D25_D27, ARM_D24_D26_D28, ARM_D25_D27_D29, ARM_D26_D28_D30, ARM_D27_D29_D31, }; // DTripleSpc Bit set. static const uint8_t DTripleSpcBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, }; // DTripleSpc_with_ssub_0 Register Class... static MCPhysReg DTripleSpc_with_ssub_0[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, ARM_D12_D14_D16, ARM_D13_D15_D17, ARM_D14_D16_D18, ARM_D15_D17_D19, }; // DTripleSpc_with_ssub_0 Bit set. static const uint8_t DTripleSpc_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, }; // DTriple_with_ssub_0 Register Class... static MCPhysReg DTriple_with_ssub_0[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, ARM_D6_D7_D8, ARM_D7_D8_D9, ARM_D8_D9_D10, ARM_D9_D10_D11, ARM_D10_D11_D12, ARM_D11_D12_D13, ARM_D12_D13_D14, ARM_D13_D14_D15, ARM_D14_D15_D16, ARM_D15_D16_D17, }; // DTriple_with_ssub_0 Bit set. static const uint8_t DTriple_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // DTriple_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DTriple_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3, ARM_D3_D4_D5, ARM_D5_D6_D7, ARM_D7_D8_D9, ARM_D9_D10_D11, ARM_D11_D12_D13, ARM_D13_D14_D15, ARM_D15_D16_D17, ARM_D17_D18_D19, ARM_D19_D20_D21, ARM_D21_D22_D23, ARM_D23_D24_D25, ARM_D25_D26_D27, ARM_D27_D28_D29, ARM_D29_D30_D31, }; // DTriple_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DTriple_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x2a, }; // DTriple_with_qsub_0_in_QPR Register Class... static MCPhysReg DTriple_with_qsub_0_in_QPR[] = { ARM_D0_D1_D2, ARM_D2_D3_D4, ARM_D4_D5_D6, ARM_D6_D7_D8, ARM_D8_D9_D10, ARM_D10_D11_D12, ARM_D12_D13_D14, ARM_D14_D15_D16, ARM_D16_D17_D18, ARM_D18_D19_D20, ARM_D20_D21_D22, ARM_D22_D23_D24, ARM_D24_D25_D26, ARM_D26_D27_D28, ARM_D28_D29_D30, }; // DTriple_with_qsub_0_in_QPR Bit set. static const uint8_t DTriple_with_qsub_0_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x15, }; // DTriple_with_ssub_2 Register Class... static MCPhysReg DTriple_with_ssub_2[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, ARM_D6_D7_D8, ARM_D7_D8_D9, ARM_D8_D9_D10, ARM_D9_D10_D11, ARM_D10_D11_D12, ARM_D11_D12_D13, ARM_D12_D13_D14, ARM_D13_D14_D15, ARM_D14_D15_D16, }; // DTriple_with_ssub_2 Bit set. static const uint8_t DTriple_with_ssub_2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // DTripleSpc_with_dsub_2_then_ssub_0 Register Class... static MCPhysReg DTripleSpc_with_dsub_2_then_ssub_0[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, ARM_D12_D14_D16, ARM_D13_D15_D17, }; // DTripleSpc_with_dsub_2_then_ssub_0 Bit set. static const uint8_t DTripleSpc_with_dsub_2_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, }; // DTriple_with_dsub_2_then_ssub_0 Register Class... static MCPhysReg DTriple_with_dsub_2_then_ssub_0[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, ARM_D6_D7_D8, ARM_D7_D8_D9, ARM_D8_D9_D10, ARM_D9_D10_D11, ARM_D10_D11_D12, ARM_D11_D12_D13, ARM_D12_D13_D14, ARM_D13_D14_D15, }; // DTriple_with_dsub_2_then_ssub_0 Bit set. static const uint8_t DTriple_with_dsub_2_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, }; // DTripleSpc_with_dsub_4_then_ssub_0 Register Class... static MCPhysReg DTripleSpc_with_dsub_4_then_ssub_0[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, }; // DTripleSpc_with_dsub_4_then_ssub_0 Bit set. static const uint8_t DTripleSpc_with_dsub_4_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x03, }; // DTripleSpc_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg DTripleSpc_with_dsub_0_in_DPR_8[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, }; // DTripleSpc_with_dsub_0_in_DPR_8 Bit set. static const uint8_t DTripleSpc_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, }; // DTriple_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg DTriple_with_dsub_0_in_DPR_8[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, ARM_D6_D7_D8, ARM_D7_D8_D9, }; // DTriple_with_dsub_0_in_DPR_8 Bit set. static const uint8_t DTriple_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, }; // DTriple_with_qsub_0_in_QPR_VFP2 Register Class... static MCPhysReg DTriple_with_qsub_0_in_QPR_VFP2[] = { ARM_D0_D1_D2, ARM_D2_D3_D4, ARM_D4_D5_D6, ARM_D6_D7_D8, ARM_D8_D9_D10, ARM_D10_D11_D12, ARM_D12_D13_D14, ARM_D14_D15_D16, }; // DTriple_with_qsub_0_in_QPR_VFP2 Bit set. static const uint8_t DTriple_with_qsub_0_in_QPR_VFP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, }; // DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3, ARM_D3_D4_D5, ARM_D5_D6_D7, ARM_D7_D8_D9, ARM_D9_D10_D11, ARM_D11_D12_D13, ARM_D13_D14_D15, ARM_D15_D16_D17, }; // DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa, }; // DTriple_with_dsub_1_dsub_2_in_QPR_VFP2 Register Class... static MCPhysReg DTriple_with_dsub_1_dsub_2_in_QPR_VFP2[] = { ARM_D1_D2_D3, ARM_D3_D4_D5, ARM_D5_D6_D7, ARM_D7_D8_D9, ARM_D9_D10_D11, ARM_D11_D12_D13, ARM_D13_D14_D15, }; // DTriple_with_dsub_1_dsub_2_in_QPR_VFP2 Bit set. static const uint8_t DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x2a, }; // DTriple_with_dsub_1_in_DPR_8 Register Class... static MCPhysReg DTriple_with_dsub_1_in_DPR_8[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, ARM_D6_D7_D8, }; // DTriple_with_dsub_1_in_DPR_8 Bit set. static const uint8_t DTriple_with_dsub_1_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, }; // DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR Register Class... static MCPhysReg DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR[] = { ARM_D0_D1_D2, ARM_D2_D3_D4, ARM_D4_D5_D6, ARM_D6_D7_D8, ARM_D8_D9_D10, ARM_D10_D11_D12, ARM_D12_D13_D14, }; // DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR Bit set. static const uint8_t DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, }; // DTripleSpc_with_dsub_2_in_DPR_8 Register Class... static MCPhysReg DTripleSpc_with_dsub_2_in_DPR_8[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, }; // DTripleSpc_with_dsub_2_in_DPR_8 Bit set. static const uint8_t DTripleSpc_with_dsub_2_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, }; // DTriple_with_dsub_2_in_DPR_8 Register Class... static MCPhysReg DTriple_with_dsub_2_in_DPR_8[] = { ARM_D0_D1_D2, ARM_D1_D2_D3, ARM_D2_D3_D4, ARM_D3_D4_D5, ARM_D4_D5_D6, ARM_D5_D6_D7, }; // DTriple_with_dsub_2_in_DPR_8 Bit set. static const uint8_t DTriple_with_dsub_2_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, }; // DTripleSpc_with_dsub_4_in_DPR_8 Register Class... static MCPhysReg DTripleSpc_with_dsub_4_in_DPR_8[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, }; // DTripleSpc_with_dsub_4_in_DPR_8 Bit set. static const uint8_t DTripleSpc_with_dsub_4_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, }; // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3, ARM_D3_D4_D5, ARM_D5_D6_D7, ARM_D7_D8_D9, }; // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, }; // DTriple_with_qsub_0_in_QPR_8 Register Class... static MCPhysReg DTriple_with_qsub_0_in_QPR_8[] = { ARM_D0_D1_D2, ARM_D2_D3_D4, ARM_D4_D5_D6, ARM_D6_D7_D8, }; // DTriple_with_qsub_0_in_QPR_8 Bit set. static const uint8_t DTriple_with_qsub_0_in_QPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, }; // DTriple_with_dsub_1_dsub_2_in_QPR_8 Register Class... static MCPhysReg DTriple_with_dsub_1_dsub_2_in_QPR_8[] = { ARM_D1_D2_D3, ARM_D3_D4_D5, ARM_D5_D6_D7, }; // DTriple_with_dsub_1_dsub_2_in_QPR_8 Bit set. static const uint8_t DTriple_with_dsub_1_dsub_2_in_QPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, }; // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR Register Class... static MCPhysReg DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR[] = { ARM_D0_D1_D2, ARM_D2_D3_D4, ARM_D4_D5_D6, }; // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR Bit set. static const uint8_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, }; // DQuadSpc Register Class... static MCPhysReg DQuadSpc[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, ARM_D12_D14_D16, ARM_D13_D15_D17, ARM_D14_D16_D18, ARM_D15_D17_D19, ARM_D16_D18_D20, ARM_D17_D19_D21, ARM_D18_D20_D22, ARM_D19_D21_D23, ARM_D20_D22_D24, ARM_D21_D23_D25, ARM_D22_D24_D26, ARM_D23_D25_D27, ARM_D24_D26_D28, ARM_D25_D27_D29, ARM_D26_D28_D30, ARM_D27_D29_D31, }; // DQuadSpc Bit set. static const uint8_t DQuadSpcBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, }; // DQuadSpc_with_ssub_0 Register Class... static MCPhysReg DQuadSpc_with_ssub_0[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, ARM_D12_D14_D16, ARM_D13_D15_D17, ARM_D14_D16_D18, ARM_D15_D17_D19, }; // DQuadSpc_with_ssub_0 Bit set. static const uint8_t DQuadSpc_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, }; // DQuadSpc_with_dsub_2_then_ssub_0 Register Class... static MCPhysReg DQuadSpc_with_dsub_2_then_ssub_0[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, ARM_D12_D14_D16, ARM_D13_D15_D17, }; // DQuadSpc_with_dsub_2_then_ssub_0 Bit set. static const uint8_t DQuadSpc_with_dsub_2_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, }; // DQuadSpc_with_dsub_4_then_ssub_0 Register Class... static MCPhysReg DQuadSpc_with_dsub_4_then_ssub_0[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, ARM_D8_D10_D12, ARM_D9_D11_D13, ARM_D10_D12_D14, ARM_D11_D13_D15, }; // DQuadSpc_with_dsub_4_then_ssub_0 Bit set. static const uint8_t DQuadSpc_with_dsub_4_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x03, }; // DQuadSpc_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg DQuadSpc_with_dsub_0_in_DPR_8[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, ARM_D6_D8_D10, ARM_D7_D9_D11, }; // DQuadSpc_with_dsub_0_in_DPR_8 Bit set. static const uint8_t DQuadSpc_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, }; // DQuadSpc_with_dsub_2_in_DPR_8 Register Class... static MCPhysReg DQuadSpc_with_dsub_2_in_DPR_8[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, ARM_D4_D6_D8, ARM_D5_D7_D9, }; // DQuadSpc_with_dsub_2_in_DPR_8 Bit set. static const uint8_t DQuadSpc_with_dsub_2_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, }; // DQuadSpc_with_dsub_4_in_DPR_8 Register Class... static MCPhysReg DQuadSpc_with_dsub_4_in_DPR_8[] = { ARM_D0_D2_D4, ARM_D1_D3_D5, ARM_D2_D4_D6, ARM_D3_D5_D7, }; // DQuadSpc_with_dsub_4_in_DPR_8 Bit set. static const uint8_t DQuadSpc_with_dsub_4_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, }; // DQuad Register Class... static MCPhysReg DQuad[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, ARM_D7_D8_D9_D10, ARM_Q4_Q5, ARM_D9_D10_D11_D12, ARM_Q5_Q6, ARM_D11_D12_D13_D14, ARM_Q6_Q7, ARM_D13_D14_D15_D16, ARM_Q7_Q8, ARM_D15_D16_D17_D18, ARM_Q8_Q9, ARM_D17_D18_D19_D20, ARM_Q9_Q10, ARM_D19_D20_D21_D22, ARM_Q10_Q11, ARM_D21_D22_D23_D24, ARM_Q11_Q12, ARM_D23_D24_D25_D26, ARM_Q12_Q13, ARM_D25_D26_D27_D28, ARM_Q13_Q14, ARM_D27_D28_D29_D30, ARM_Q14_Q15, }; // DQuad Bit set. static const uint8_t DQuadBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, }; // DQuad_with_ssub_0 Register Class... static MCPhysReg DQuad_with_ssub_0[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, ARM_D7_D8_D9_D10, ARM_Q4_Q5, ARM_D9_D10_D11_D12, ARM_Q5_Q6, ARM_D11_D12_D13_D14, ARM_Q6_Q7, ARM_D13_D14_D15_D16, ARM_Q7_Q8, ARM_D15_D16_D17_D18, }; // DQuad_with_ssub_0 Bit set. static const uint8_t DQuad_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, }; // DQuad_with_ssub_2 Register Class... static MCPhysReg DQuad_with_ssub_2[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, ARM_D7_D8_D9_D10, ARM_Q4_Q5, ARM_D9_D10_D11_D12, ARM_Q5_Q6, ARM_D11_D12_D13_D14, ARM_Q6_Q7, ARM_D13_D14_D15_D16, ARM_Q7_Q8, }; // DQuad_with_ssub_2 Bit set. static const uint8_t DQuad_with_ssub_2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // QQPR Register Class... static MCPhysReg QQPR[] = { ARM_Q0_Q1, ARM_Q1_Q2, ARM_Q2_Q3, ARM_Q3_Q4, ARM_Q4_Q5, ARM_Q5_Q6, ARM_Q6_Q7, ARM_Q7_Q8, ARM_Q8_Q9, ARM_Q9_Q10, ARM_Q10_Q11, ARM_Q11_Q12, ARM_Q12_Q13, ARM_Q13_Q14, ARM_Q14_Q15, }; // QQPR Bit set. static const uint8_t QQPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, }; // DQuad_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DQuad_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, ARM_D5_D6_D7_D8, ARM_D7_D8_D9_D10, ARM_D9_D10_D11_D12, ARM_D11_D12_D13_D14, ARM_D13_D14_D15_D16, ARM_D15_D16_D17_D18, ARM_D17_D18_D19_D20, ARM_D19_D20_D21_D22, ARM_D21_D22_D23_D24, ARM_D23_D24_D25_D26, ARM_D25_D26_D27_D28, ARM_D27_D28_D29_D30, }; // DQuad_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, }; // DQuad_with_dsub_2_then_ssub_0 Register Class... static MCPhysReg DQuad_with_dsub_2_then_ssub_0[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, ARM_D7_D8_D9_D10, ARM_Q4_Q5, ARM_D9_D10_D11_D12, ARM_Q5_Q6, ARM_D11_D12_D13_D14, ARM_Q6_Q7, ARM_D13_D14_D15_D16, }; // DQuad_with_dsub_2_then_ssub_0 Bit set. static const uint8_t DQuad_with_dsub_2_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // DQuad_with_dsub_3_then_ssub_0 Register Class... static MCPhysReg DQuad_with_dsub_3_then_ssub_0[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, ARM_D7_D8_D9_D10, ARM_Q4_Q5, ARM_D9_D10_D11_D12, ARM_Q5_Q6, ARM_D11_D12_D13_D14, ARM_Q6_Q7, }; // DQuad_with_dsub_3_then_ssub_0 Bit set. static const uint8_t DQuad_with_dsub_3_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, }; // DQuad_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg DQuad_with_dsub_0_in_DPR_8[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, ARM_D7_D8_D9_D10, }; // DQuad_with_dsub_0_in_DPR_8 Bit set. static const uint8_t DQuad_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, }; // DQuad_with_qsub_0_in_QPR_VFP2 Register Class... static MCPhysReg DQuad_with_qsub_0_in_QPR_VFP2[] = { ARM_Q0_Q1, ARM_Q1_Q2, ARM_Q2_Q3, ARM_Q3_Q4, ARM_Q4_Q5, ARM_Q5_Q6, ARM_Q6_Q7, ARM_Q7_Q8, }; // DQuad_with_qsub_0_in_QPR_VFP2 Bit set. static const uint8_t DQuad_with_qsub_0_in_QPR_VFP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, }; // DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, ARM_D5_D6_D7_D8, ARM_D7_D8_D9_D10, ARM_D9_D10_D11_D12, ARM_D11_D12_D13_D14, ARM_D13_D14_D15_D16, ARM_D15_D16_D17_D18, }; // DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, }; // DQuad_with_dsub_1_dsub_2_in_QPR_VFP2 Register Class... static MCPhysReg DQuad_with_dsub_1_dsub_2_in_QPR_VFP2[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, ARM_D5_D6_D7_D8, ARM_D7_D8_D9_D10, ARM_D9_D10_D11_D12, ARM_D11_D12_D13_D14, ARM_D13_D14_D15_D16, }; // DQuad_with_dsub_1_dsub_2_in_QPR_VFP2 Bit set. static const uint8_t DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // DQuad_with_dsub_1_in_DPR_8 Register Class... static MCPhysReg DQuad_with_dsub_1_in_DPR_8[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, ARM_Q3_Q4, }; // DQuad_with_dsub_1_in_DPR_8 Bit set. static const uint8_t DQuad_with_dsub_1_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, }; // DQuad_with_qsub_1_in_QPR_VFP2 Register Class... static MCPhysReg DQuad_with_qsub_1_in_QPR_VFP2[] = { ARM_Q0_Q1, ARM_Q1_Q2, ARM_Q2_Q3, ARM_Q3_Q4, ARM_Q4_Q5, ARM_Q5_Q6, ARM_Q6_Q7, }; // DQuad_with_qsub_1_in_QPR_VFP2 Bit set. static const uint8_t DQuad_with_qsub_1_in_QPR_VFP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, }; // DQuad_with_dsub_2_in_DPR_8 Register Class... static MCPhysReg DQuad_with_dsub_2_in_DPR_8[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, ARM_D5_D6_D7_D8, }; // DQuad_with_dsub_2_in_DPR_8 Bit set. static const uint8_t DQuad_with_dsub_2_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, }; // DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, ARM_D5_D6_D7_D8, ARM_D7_D8_D9_D10, ARM_D9_D10_D11_D12, ARM_D11_D12_D13_D14, }; // DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, }; // DQuad_with_dsub_3_in_DPR_8 Register Class... static MCPhysReg DQuad_with_dsub_3_in_DPR_8[] = { ARM_Q0_Q1, ARM_D1_D2_D3_D4, ARM_Q1_Q2, ARM_D3_D4_D5_D6, ARM_Q2_Q3, }; // DQuad_with_dsub_3_in_DPR_8 Bit set. static const uint8_t DQuad_with_dsub_3_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, }; // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, ARM_D5_D6_D7_D8, ARM_D7_D8_D9_D10, }; // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, }; // DQuad_with_qsub_0_in_QPR_8 Register Class... static MCPhysReg DQuad_with_qsub_0_in_QPR_8[] = { ARM_Q0_Q1, ARM_Q1_Q2, ARM_Q2_Q3, ARM_Q3_Q4, }; // DQuad_with_qsub_0_in_QPR_8 Bit set. static const uint8_t DQuad_with_qsub_0_in_QPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, }; // DQuad_with_dsub_1_dsub_2_in_QPR_8 Register Class... static MCPhysReg DQuad_with_dsub_1_dsub_2_in_QPR_8[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, ARM_D5_D6_D7_D8, }; // DQuad_with_dsub_1_dsub_2_in_QPR_8 Bit set. static const uint8_t DQuad_with_dsub_1_dsub_2_in_QPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, }; // DQuad_with_qsub_1_in_QPR_8 Register Class... static MCPhysReg DQuad_with_qsub_1_in_QPR_8[] = { ARM_Q0_Q1, ARM_Q1_Q2, ARM_Q2_Q3, }; // DQuad_with_qsub_1_in_QPR_8 Bit set. static const uint8_t DQuad_with_qsub_1_in_QPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, }; // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... static MCPhysReg DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { ARM_D1_D2_D3_D4, ARM_D3_D4_D5_D6, }; // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. static const uint8_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, }; // QQQQPR Register Class... static MCPhysReg QQQQPR[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, ARM_Q3_Q4_Q5_Q6, ARM_Q4_Q5_Q6_Q7, ARM_Q5_Q6_Q7_Q8, ARM_Q6_Q7_Q8_Q9, ARM_Q7_Q8_Q9_Q10, ARM_Q8_Q9_Q10_Q11, ARM_Q9_Q10_Q11_Q12, ARM_Q10_Q11_Q12_Q13, ARM_Q11_Q12_Q13_Q14, ARM_Q12_Q13_Q14_Q15, }; // QQQQPR Bit set. static const uint8_t QQQQPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, }; // QQQQPR_with_ssub_0 Register Class... static MCPhysReg QQQQPR_with_ssub_0[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, ARM_Q3_Q4_Q5_Q6, ARM_Q4_Q5_Q6_Q7, ARM_Q5_Q6_Q7_Q8, ARM_Q6_Q7_Q8_Q9, ARM_Q7_Q8_Q9_Q10, }; // QQQQPR_with_ssub_0 Bit set. static const uint8_t QQQQPR_with_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // QQQQPR_with_dsub_2_then_ssub_0 Register Class... static MCPhysReg QQQQPR_with_dsub_2_then_ssub_0[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, ARM_Q3_Q4_Q5_Q6, ARM_Q4_Q5_Q6_Q7, ARM_Q5_Q6_Q7_Q8, ARM_Q6_Q7_Q8_Q9, }; // QQQQPR_with_dsub_2_then_ssub_0 Bit set. static const uint8_t QQQQPR_with_dsub_2_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, }; // QQQQPR_with_dsub_5_then_ssub_0 Register Class... static MCPhysReg QQQQPR_with_dsub_5_then_ssub_0[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, ARM_Q3_Q4_Q5_Q6, ARM_Q4_Q5_Q6_Q7, ARM_Q5_Q6_Q7_Q8, }; // QQQQPR_with_dsub_5_then_ssub_0 Bit set. static const uint8_t QQQQPR_with_dsub_5_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, }; // QQQQPR_with_dsub_7_then_ssub_0 Register Class... static MCPhysReg QQQQPR_with_dsub_7_then_ssub_0[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, ARM_Q3_Q4_Q5_Q6, ARM_Q4_Q5_Q6_Q7, }; // QQQQPR_with_dsub_7_then_ssub_0 Bit set. static const uint8_t QQQQPR_with_dsub_7_then_ssub_0Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, }; // QQQQPR_with_dsub_0_in_DPR_8 Register Class... static MCPhysReg QQQQPR_with_dsub_0_in_DPR_8[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, ARM_Q3_Q4_Q5_Q6, }; // QQQQPR_with_dsub_0_in_DPR_8 Bit set. static const uint8_t QQQQPR_with_dsub_0_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, }; // QQQQPR_with_dsub_2_in_DPR_8 Register Class... static MCPhysReg QQQQPR_with_dsub_2_in_DPR_8[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, ARM_Q2_Q3_Q4_Q5, }; // QQQQPR_with_dsub_2_in_DPR_8 Bit set. static const uint8_t QQQQPR_with_dsub_2_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, }; // QQQQPR_with_dsub_4_in_DPR_8 Register Class... static MCPhysReg QQQQPR_with_dsub_4_in_DPR_8[] = { ARM_Q0_Q1_Q2_Q3, ARM_Q1_Q2_Q3_Q4, }; // QQQQPR_with_dsub_4_in_DPR_8 Bit set. static const uint8_t QQQQPR_with_dsub_4_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, }; // QQQQPR_with_dsub_6_in_DPR_8 Register Class... static MCPhysReg QQQQPR_with_dsub_6_in_DPR_8[] = { ARM_Q0_Q1_Q2_Q3, }; // QQQQPR_with_dsub_6_in_DPR_8 Bit set. static const uint8_t QQQQPR_with_dsub_6_in_DPR_8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, }; static MCRegisterClass ARMMCRegisterClasses[] = { { SPR, SPRBits, 2228, 32, sizeof(SPRBits), ARM_SPRRegClassID, 4, 4, 1, 1 }, { GPR, GPRBits, 1512, 16, sizeof(GPRBits), ARM_GPRRegClassID, 4, 4, 1, 1 }, { GPRwithAPSR, GPRwithAPSRBits, 2232, 16, sizeof(GPRwithAPSRBits), ARM_GPRwithAPSRRegClassID, 4, 4, 1, 1 }, { SPR_8, SPR_8Bits, 1487, 16, sizeof(SPR_8Bits), ARM_SPR_8RegClassID, 4, 4, 1, 1 }, { GPRnopc, GPRnopcBits, 2273, 15, sizeof(GPRnopcBits), ARM_GPRnopcRegClassID, 4, 4, 1, 1 }, { rGPR, rGPRBits, 1666, 14, sizeof(rGPRBits), ARM_rGPRRegClassID, 4, 4, 1, 1 }, { hGPR, hGPRBits, 1601, 8, sizeof(hGPRBits), ARM_hGPRRegClassID, 4, 4, 1, 1 }, { tGPR, tGPRBits, 1722, 8, sizeof(tGPRBits), ARM_tGPRRegClassID, 4, 4, 1, 1 }, { GPRnopc_and_hGPR, GPRnopc_and_hGPRBits, 1589, 7, sizeof(GPRnopc_and_hGPRBits), ARM_GPRnopc_and_hGPRRegClassID, 4, 4, 1, 1 }, { hGPR_and_rGPR, hGPR_and_rGPRBits, 1657, 6, sizeof(hGPR_and_rGPRBits), ARM_hGPR_and_rGPRRegClassID, 4, 4, 1, 1 }, { tcGPR, tcGPRBits, 1510, 5, sizeof(tcGPRBits), ARM_tcGPRRegClassID, 4, 4, 1, 1 }, { tGPR_and_tcGPR, tGPR_and_tcGPRBits, 1516, 4, sizeof(tGPR_and_tcGPRBits), ARM_tGPR_and_tcGPRRegClassID, 4, 4, 1, 1 }, { CCR, CCRBits, 1493, 1, sizeof(CCRBits), ARM_CCRRegClassID, 4, 4, -1, 0 }, { GPRsp, GPRspBits, 2318, 1, sizeof(GPRspBits), ARM_GPRspRegClassID, 4, 4, 1, 1 }, { hGPR_and_tcGPR, hGPR_and_tcGPRBits, 1501, 1, sizeof(hGPR_and_tcGPRBits), ARM_hGPR_and_tcGPRRegClassID, 4, 4, 1, 1 }, { DPR, DPRBits, 1497, 32, sizeof(DPRBits), ARM_DPRRegClassID, 8, 8, 1, 1 }, { DPR_VFP2, DPR_VFP2Bits, 494, 16, sizeof(DPR_VFP2Bits), ARM_DPR_VFP2RegClassID, 8, 8, 1, 1 }, { DPR_8, DPR_8Bits, 749, 8, sizeof(DPR_8Bits), ARM_DPR_8RegClassID, 8, 8, 1, 1 }, { GPRPair, GPRPairBits, 2330, 7, sizeof(GPRPairBits), ARM_GPRPairRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_1_in_rGPR, GPRPair_with_gsub_1_in_rGPRBits, 1671, 6, sizeof(GPRPair_with_gsub_1_in_rGPRBits), ARM_GPRPair_with_gsub_1_in_rGPRRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_0_in_tGPR, GPRPair_with_gsub_0_in_tGPRBits, 1699, 4, sizeof(GPRPair_with_gsub_0_in_tGPRBits), ARM_GPRPair_with_gsub_0_in_tGPRRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_0_in_hGPR, GPRPair_with_gsub_0_in_hGPRBits, 1606, 3, sizeof(GPRPair_with_gsub_0_in_hGPRBits), ARM_GPRPair_with_gsub_0_in_hGPRRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_0_in_tcGPR, GPRPair_with_gsub_0_in_tcGPRBits, 1531, 3, sizeof(GPRPair_with_gsub_0_in_tcGPRBits), ARM_GPRPair_with_gsub_0_in_tcGPRRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_1_in_hGPR_and_rGPR, GPRPair_with_gsub_1_in_hGPR_and_rGPRBits, 1634, 2, sizeof(GPRPair_with_gsub_1_in_hGPR_and_rGPRBits), ARM_GPRPair_with_gsub_1_in_hGPR_and_rGPRRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_1_in_tcGPR, GPRPair_with_gsub_1_in_tcGPRBits, 1560, 2, sizeof(GPRPair_with_gsub_1_in_tcGPRBits), ARM_GPRPair_with_gsub_1_in_tcGPRRegClassID, 8, 8, 1, 1 }, { GPRPair_with_gsub_1_in_GPRsp, GPRPair_with_gsub_1_in_GPRspBits, 2295, 1, sizeof(GPRPair_with_gsub_1_in_GPRspBits), ARM_GPRPair_with_gsub_1_in_GPRspRegClassID, 8, 8, 1, 1 }, { DPairSpc, DPairSpcBits, 2264, 30, sizeof(DPairSpcBits), ARM_DPairSpcRegClassID, 16, 8, 1, 1 }, { DPairSpc_with_ssub_0, DPairSpc_with_ssub_0Bits, 63, 16, sizeof(DPairSpc_with_ssub_0Bits), ARM_DPairSpc_with_ssub_0RegClassID, 16, 8, 1, 1 }, { DPairSpc_with_dsub_2_then_ssub_0, DPairSpc_with_dsub_2_then_ssub_0Bits, 239, 14, sizeof(DPairSpc_with_dsub_2_then_ssub_0Bits), ARM_DPairSpc_with_dsub_2_then_ssub_0RegClassID, 16, 8, 1, 1 }, { DPairSpc_with_dsub_0_in_DPR_8, DPairSpc_with_dsub_0_in_DPR_8Bits, 817, 8, sizeof(DPairSpc_with_dsub_0_in_DPR_8Bits), ARM_DPairSpc_with_dsub_0_in_DPR_8RegClassID, 16, 8, 1, 1 }, { DPairSpc_with_dsub_2_in_DPR_8, DPairSpc_with_dsub_2_in_DPR_8Bits, 1103, 6, sizeof(DPairSpc_with_dsub_2_in_DPR_8Bits), ARM_DPairSpc_with_dsub_2_in_DPR_8RegClassID, 16, 8, 1, 1 }, { DPair, DPairBits, 2324, 31, sizeof(DPairBits), ARM_DPairRegClassID, 16, 16, 1, 1 }, { DPair_with_ssub_0, DPair_with_ssub_0Bits, 122, 16, sizeof(DPair_with_ssub_0Bits), ARM_DPair_with_ssub_0RegClassID, 16, 16, 1, 1 }, { QPR, QPRBits, 1730, 16, sizeof(QPRBits), ARM_QPRRegClassID, 16, 16, 1, 1 }, { DPair_with_ssub_2, DPair_with_ssub_2Bits, 709, 15, sizeof(DPair_with_ssub_2Bits), ARM_DPair_with_ssub_2RegClassID, 16, 16, 1, 1 }, { DPair_with_dsub_0_in_DPR_8, DPair_with_dsub_0_in_DPR_8Bits, 903, 8, sizeof(DPair_with_dsub_0_in_DPR_8Bits), ARM_DPair_with_dsub_0_in_DPR_8RegClassID, 16, 16, 1, 1 }, { QPR_VFP2, QPR_VFP2Bits, 524, 8, sizeof(QPR_VFP2Bits), ARM_QPR_VFP2RegClassID, 16, 16, 1, 1 }, { DPair_with_dsub_1_in_DPR_8, DPair_with_dsub_1_in_DPR_8Bits, 986, 7, sizeof(DPair_with_dsub_1_in_DPR_8Bits), ARM_DPair_with_dsub_1_in_DPR_8RegClassID, 16, 16, 1, 1 }, { QPR_8, QPR_8Bits, 1355, 4, sizeof(QPR_8Bits), ARM_QPR_8RegClassID, 16, 16, 1, 1 }, { DTriple, DTripleBits, 2287, 30, sizeof(DTripleBits), ARM_DTripleRegClassID, 24, 8, 1, 1 }, { DTripleSpc, DTripleSpcBits, 2253, 28, sizeof(DTripleSpcBits), ARM_DTripleSpcRegClassID, 24, 8, 1, 1 }, { DTripleSpc_with_ssub_0, DTripleSpc_with_ssub_0Bits, 40, 16, sizeof(DTripleSpc_with_ssub_0Bits), ARM_DTripleSpc_with_ssub_0RegClassID, 24, 8, 1, 1 }, { DTriple_with_ssub_0, DTriple_with_ssub_0Bits, 102, 16, sizeof(DTriple_with_ssub_0Bits), ARM_DTriple_with_ssub_0RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_1_dsub_2_in_QPR, DTriple_with_dsub_1_dsub_2_in_QPRBits, 2127, 15, sizeof(DTriple_with_dsub_1_dsub_2_in_QPRBits), ARM_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID, 24, 8, 1, 1 }, { DTriple_with_qsub_0_in_QPR, DTriple_with_qsub_0_in_QPRBits, 1770, 15, sizeof(DTriple_with_qsub_0_in_QPRBits), ARM_DTriple_with_qsub_0_in_QPRRegClassID, 24, 8, 1, 1 }, { DTriple_with_ssub_2, DTriple_with_ssub_2Bits, 689, 15, sizeof(DTriple_with_ssub_2Bits), ARM_DTriple_with_ssub_2RegClassID, 24, 8, 1, 1 }, { DTripleSpc_with_dsub_2_then_ssub_0, DTripleSpc_with_dsub_2_then_ssub_0Bits, 204, 14, sizeof(DTripleSpc_with_dsub_2_then_ssub_0Bits), ARM_DTripleSpc_with_dsub_2_then_ssub_0RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_2_then_ssub_0, DTriple_with_dsub_2_then_ssub_0Bits, 302, 14, sizeof(DTriple_with_dsub_2_then_ssub_0Bits), ARM_DTriple_with_dsub_2_then_ssub_0RegClassID, 24, 8, 1, 1 }, { DTripleSpc_with_dsub_4_then_ssub_0, DTripleSpc_with_dsub_4_then_ssub_0Bits, 397, 12, sizeof(DTripleSpc_with_dsub_4_then_ssub_0Bits), ARM_DTripleSpc_with_dsub_4_then_ssub_0RegClassID, 24, 8, 1, 1 }, { DTripleSpc_with_dsub_0_in_DPR_8, DTripleSpc_with_dsub_0_in_DPR_8Bits, 785, 8, sizeof(DTripleSpc_with_dsub_0_in_DPR_8Bits), ARM_DTripleSpc_with_dsub_0_in_DPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_0_in_DPR_8, DTriple_with_dsub_0_in_DPR_8Bits, 874, 8, sizeof(DTriple_with_dsub_0_in_DPR_8Bits), ARM_DTriple_with_dsub_0_in_DPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_qsub_0_in_QPR_VFP2, DTriple_with_qsub_0_in_QPR_VFP2Bits, 533, 8, sizeof(DTriple_with_qsub_0_in_QPR_VFP2Bits), ARM_DTriple_with_qsub_0_in_QPR_VFP2RegClassID, 24, 8, 1, 1 }, { DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR, DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits, 2103, 8, sizeof(DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits), ARM_DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_1_dsub_2_in_QPR_VFP2, DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits, 632, 7, sizeof(DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits), ARM_DTriple_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_1_in_DPR_8, DTriple_with_dsub_1_in_DPR_8Bits, 957, 7, sizeof(DTriple_with_dsub_1_in_DPR_8Bits), ARM_DTriple_with_dsub_1_in_DPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR, DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits, 1734, 7, sizeof(DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits), ARM_DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRRegClassID, 24, 8, 1, 1 }, { DTripleSpc_with_dsub_2_in_DPR_8, DTripleSpc_with_dsub_2_in_DPR_8Bits, 1071, 6, sizeof(DTripleSpc_with_dsub_2_in_DPR_8Bits), ARM_DTripleSpc_with_dsub_2_in_DPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_2_in_DPR_8, DTriple_with_dsub_2_in_DPR_8Bits, 1160, 6, sizeof(DTriple_with_dsub_2_in_DPR_8Bits), ARM_DTriple_with_dsub_2_in_DPR_8RegClassID, 24, 8, 1, 1 }, { DTripleSpc_with_dsub_4_in_DPR_8, DTripleSpc_with_dsub_4_in_DPR_8Bits, 1274, 4, sizeof(DTripleSpc_with_dsub_4_in_DPR_8Bits), ARM_DTripleSpc_with_dsub_4_in_DPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR, DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits, 2161, 4, sizeof(DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits), ARM_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID, 24, 8, 1, 1 }, { DTriple_with_qsub_0_in_QPR_8, DTriple_with_qsub_0_in_QPR_8Bits, 1361, 4, sizeof(DTriple_with_qsub_0_in_QPR_8Bits), ARM_DTriple_with_qsub_0_in_QPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_1_dsub_2_in_QPR_8, DTriple_with_dsub_1_dsub_2_in_QPR_8Bits, 1451, 3, sizeof(DTriple_with_dsub_1_dsub_2_in_QPR_8Bits), ARM_DTriple_with_dsub_1_dsub_2_in_QPR_8RegClassID, 24, 8, 1, 1 }, { DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR, DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits, 1797, 3, sizeof(DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits), ARM_DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRRegClassID, 24, 8, 1, 1 }, { DQuadSpc, DQuadSpcBits, 2244, 28, sizeof(DQuadSpcBits), ARM_DQuadSpcRegClassID, 32, 8, 1, 1 }, { DQuadSpc_with_ssub_0, DQuadSpc_with_ssub_0Bits, 19, 16, sizeof(DQuadSpc_with_ssub_0Bits), ARM_DQuadSpc_with_ssub_0RegClassID, 32, 8, 1, 1 }, { DQuadSpc_with_dsub_2_then_ssub_0, DQuadSpc_with_dsub_2_then_ssub_0Bits, 171, 14, sizeof(DQuadSpc_with_dsub_2_then_ssub_0Bits), ARM_DQuadSpc_with_dsub_2_then_ssub_0RegClassID, 32, 8, 1, 1 }, { DQuadSpc_with_dsub_4_then_ssub_0, DQuadSpc_with_dsub_4_then_ssub_0Bits, 364, 12, sizeof(DQuadSpc_with_dsub_4_then_ssub_0Bits), ARM_DQuadSpc_with_dsub_4_then_ssub_0RegClassID, 32, 8, 1, 1 }, { DQuadSpc_with_dsub_0_in_DPR_8, DQuadSpc_with_dsub_0_in_DPR_8Bits, 755, 8, sizeof(DQuadSpc_with_dsub_0_in_DPR_8Bits), ARM_DQuadSpc_with_dsub_0_in_DPR_8RegClassID, 32, 8, 1, 1 }, { DQuadSpc_with_dsub_2_in_DPR_8, DQuadSpc_with_dsub_2_in_DPR_8Bits, 1041, 6, sizeof(DQuadSpc_with_dsub_2_in_DPR_8Bits), ARM_DQuadSpc_with_dsub_2_in_DPR_8RegClassID, 32, 8, 1, 1 }, { DQuadSpc_with_dsub_4_in_DPR_8, DQuadSpc_with_dsub_4_in_DPR_8Bits, 1244, 4, sizeof(DQuadSpc_with_dsub_4_in_DPR_8Bits), ARM_DQuadSpc_with_dsub_4_in_DPR_8RegClassID, 32, 8, 1, 1 }, { DQuad, DQuadBits, 2281, 29, sizeof(DQuadBits), ARM_DQuadRegClassID, 32, 32, 1, 1 }, { DQuad_with_ssub_0, DQuad_with_ssub_0Bits, 84, 16, sizeof(DQuad_with_ssub_0Bits), ARM_DQuad_with_ssub_0RegClassID, 32, 32, 1, 1 }, { DQuad_with_ssub_2, DQuad_with_ssub_2Bits, 671, 15, sizeof(DQuad_with_ssub_2Bits), ARM_DQuad_with_ssub_2RegClassID, 32, 32, 1, 1 }, { QQPR, QQPRBits, 1729, 15, sizeof(QQPRBits), ARM_QQPRRegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_1_dsub_2_in_QPRBits, 1879, 14, sizeof(DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_2_then_ssub_0, DQuad_with_dsub_2_then_ssub_0Bits, 272, 14, sizeof(DQuad_with_dsub_2_then_ssub_0Bits), ARM_DQuad_with_dsub_2_then_ssub_0RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_3_then_ssub_0, DQuad_with_dsub_3_then_ssub_0Bits, 334, 13, sizeof(DQuad_with_dsub_3_then_ssub_0Bits), ARM_DQuad_with_dsub_3_then_ssub_0RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_0_in_DPR_8, DQuad_with_dsub_0_in_DPR_8Bits, 847, 8, sizeof(DQuad_with_dsub_0_in_DPR_8Bits), ARM_DQuad_with_dsub_0_in_DPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_qsub_0_in_QPR_VFP2, DQuad_with_qsub_0_in_QPR_VFP2Bits, 503, 8, sizeof(DQuad_with_qsub_0_in_QPR_VFP2Bits), ARM_DQuad_with_qsub_0_in_QPR_VFP2RegClassID, 32, 32, 1, 1 }, { DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 1857, 8, sizeof(DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM_DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_1_dsub_2_in_QPR_VFP2, DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits, 595, 7, sizeof(DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits), ARM_DQuad_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_1_in_DPR_8, DQuad_with_dsub_1_in_DPR_8Bits, 930, 7, sizeof(DQuad_with_dsub_1_in_DPR_8Bits), ARM_DQuad_with_dsub_1_in_DPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_qsub_1_in_QPR_VFP2, DQuad_with_qsub_1_in_QPR_VFP2Bits, 565, 7, sizeof(DQuad_with_qsub_1_in_QPR_VFP2Bits), ARM_DQuad_with_qsub_1_in_QPR_VFP2RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_2_in_DPR_8, DQuad_with_dsub_2_in_DPR_8Bits, 1133, 6, sizeof(DQuad_with_dsub_2_in_DPR_8Bits), ARM_DQuad_with_dsub_2_in_DPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 1911, 6, sizeof(DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM_DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_3_in_DPR_8, DQuad_with_dsub_3_in_DPR_8Bits, 1189, 5, sizeof(DQuad_with_dsub_3_in_DPR_8Bits), ARM_DQuad_with_dsub_3_in_DPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 1977, 4, sizeof(DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM_DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, { DQuad_with_qsub_0_in_QPR_8, DQuad_with_qsub_0_in_QPR_8Bits, 1334, 4, sizeof(DQuad_with_qsub_0_in_QPR_8Bits), ARM_DQuad_with_qsub_0_in_QPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_1_dsub_2_in_QPR_8, DQuad_with_dsub_1_dsub_2_in_QPR_8Bits, 1417, 3, sizeof(DQuad_with_dsub_1_dsub_2_in_QPR_8Bits), ARM_DQuad_with_dsub_1_dsub_2_in_QPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_qsub_1_in_QPR_8, DQuad_with_qsub_1_in_QPR_8Bits, 1390, 3, sizeof(DQuad_with_qsub_1_in_QPR_8Bits), ARM_DQuad_with_qsub_1_in_QPR_8RegClassID, 32, 32, 1, 1 }, { DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 2040, 2, sizeof(DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM_DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, { QQQQPR, QQQQPRBits, 1727, 13, sizeof(QQQQPRBits), ARM_QQQQPRRegClassID, 64, 32, 1, 1 }, { QQQQPR_with_ssub_0, QQQQPR_with_ssub_0Bits, 0, 8, sizeof(QQQQPR_with_ssub_0Bits), ARM_QQQQPR_with_ssub_0RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_2_then_ssub_0, QQQQPR_with_dsub_2_then_ssub_0Bits, 140, 7, sizeof(QQQQPR_with_dsub_2_then_ssub_0Bits), ARM_QQQQPR_with_dsub_2_then_ssub_0RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_5_then_ssub_0, QQQQPR_with_dsub_5_then_ssub_0Bits, 432, 6, sizeof(QQQQPR_with_dsub_5_then_ssub_0Bits), ARM_QQQQPR_with_dsub_5_then_ssub_0RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_7_then_ssub_0, QQQQPR_with_dsub_7_then_ssub_0Bits, 463, 5, sizeof(QQQQPR_with_dsub_7_then_ssub_0Bits), ARM_QQQQPR_with_dsub_7_then_ssub_0RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_0_in_DPR_8, QQQQPR_with_dsub_0_in_DPR_8Bits, 727, 4, sizeof(QQQQPR_with_dsub_0_in_DPR_8Bits), ARM_QQQQPR_with_dsub_0_in_DPR_8RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_2_in_DPR_8, QQQQPR_with_dsub_2_in_DPR_8Bits, 1013, 3, sizeof(QQQQPR_with_dsub_2_in_DPR_8Bits), ARM_QQQQPR_with_dsub_2_in_DPR_8RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_4_in_DPR_8, QQQQPR_with_dsub_4_in_DPR_8Bits, 1216, 2, sizeof(QQQQPR_with_dsub_4_in_DPR_8Bits), ARM_QQQQPR_with_dsub_4_in_DPR_8RegClassID, 64, 32, 1, 1 }, { QQQQPR_with_dsub_6_in_DPR_8, QQQQPR_with_dsub_6_in_DPR_8Bits, 1306, 1, sizeof(QQQQPR_with_dsub_6_in_DPR_8Bits), ARM_QQQQPR_with_dsub_6_in_DPR_8RegClassID, 64, 32, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/ARM/ARMGenSubtargetInfo.inc010066400017500001750000000054531363402546700220760ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Subtarget Enumeration Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM #define ARM_FeatureAClass (1ULL << 0) #define ARM_FeatureAvoidMOVsShOp (1ULL << 1) #define ARM_FeatureAvoidPartialCPSR (1ULL << 2) #define ARM_FeatureCRC (1ULL << 3) #define ARM_FeatureCrypto (1ULL << 4) #define ARM_FeatureD16 (1ULL << 5) #define ARM_FeatureDB (1ULL << 6) #define ARM_FeatureDSPThumb2 (1ULL << 7) #define ARM_FeatureFP16 (1ULL << 8) #define ARM_FeatureFPARMv8 (1ULL << 9) #define ARM_FeatureHWDiv (1ULL << 10) #define ARM_FeatureHWDivARM (1ULL << 11) #define ARM_FeatureHasRAS (1ULL << 12) #define ARM_FeatureHasSlowFPVMLx (1ULL << 13) #define ARM_FeatureMClass (1ULL << 14) #define ARM_FeatureMP (1ULL << 15) #define ARM_FeatureNEON (1ULL << 16) #define ARM_FeatureNEONForFP (1ULL << 17) #define ARM_FeatureNaClTrap (1ULL << 18) #define ARM_FeatureNoARM (1ULL << 19) #define ARM_FeaturePerfMon (1ULL << 20) #define ARM_FeaturePref32BitThumb (1ULL << 21) #define ARM_FeatureRClass (1ULL << 22) #define ARM_FeatureSlowFPBrcc (1ULL << 23) #define ARM_FeatureT2XtPk (1ULL << 24) #define ARM_FeatureThumb2 (1ULL << 25) #define ARM_FeatureTrustZone (1ULL << 26) #define ARM_FeatureVFP2 (1ULL << 27) #define ARM_FeatureVFP3 (1ULL << 28) #define ARM_FeatureVFP4 (1ULL << 29) #define ARM_FeatureVFPOnlySP (1ULL << 30) #define ARM_FeatureVMLxForwarding (1ULL << 31) #define ARM_FeatureVirtualization (1ULL << 32) #define ARM_FeatureZCZeroing (1ULL << 33) #define ARM_HasV4TOps (1ULL << 34) #define ARM_HasV5TEOps (1ULL << 35) #define ARM_HasV5TOps (1ULL << 36) #define ARM_HasV6MOps (1ULL << 37) #define ARM_HasV6Ops (1ULL << 38) #define ARM_HasV6T2Ops (1ULL << 39) #define ARM_HasV7Ops (1ULL << 40) #define ARM_HasV8Ops (1ULL << 41) #define ARM_ModeThumb (1ULL << 42) #define ARM_ProcA5 (1ULL << 43) #define ARM_ProcA7 (1ULL << 44) #define ARM_ProcA8 (1ULL << 45) #define ARM_ProcA9 (1ULL << 46) #define ARM_ProcA12 (1ULL << 47) #define ARM_ProcA15 (1ULL << 48) #define ARM_ProcA17 (1ULL << 49) #define ARM_ProcA53 (1ULL << 50) #define ARM_ProcA57 (1ULL << 51) #define ARM_ProcKrait (1ULL << 52) #define ARM_ProcR5 (1ULL << 53) #define ARM_ProcSwift (1ULL << 54) #endif // GET_SUBTARGETINFO_ENUM capstone-sys-0.11.0/capstone/arch/ARM/ARMInstPrinter.c010066400017500001750000003377571363402546700206410ustar0000000000000000//===-- ARMInstPrinter.cpp - Convert ARM MCInst to assembly syntax --------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an ARM MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_ARM #include // DEBUG #include #include #include #include "ARMInstPrinter.h" #include "ARMAddressingModes.h" #include "ARMBaseInfo.h" #include "ARMDisassembler.h" #include "../../MCInst.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../utils.h" #include "ARMMapping.h" #define GET_SUBTARGETINFO_ENUM #include "ARMGenSubtargetInfo.inc" static void printRegName(cs_struct *h, SStream *OS, unsigned RegNo); // Autogenerated by tblgen. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI); static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static void printSORegRegOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printSORegImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrModeTBB(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrModeTBH(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrMode2Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printAM2PreOrOffsetIndexOp(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrMode2OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrMode3Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0); static void printAddrMode3OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printAM3PreOrOffsetIndexOp(MCInst *MI, unsigned Op, SStream *O, bool AlwaysPrintImm0); static void printPostIdxImm8Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printPostIdxRegOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printPostIdxImm8s4Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrMode5Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0); static void printAddrMode6Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrMode7Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrMode6OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printBitfieldInvMaskImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printMemBOption(MCInst *MI, unsigned OpNum, SStream *O); static void printShiftImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printPKHLSLShiftImm(MCInst *MI, unsigned OpNum, SStream *O); static void printPKHASRShiftImm(MCInst *MI, unsigned OpNum, SStream *O); static void printAdrLabelOperand(MCInst *MI, unsigned OpNum, SStream *O, unsigned); static void printThumbS4ImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbSRImm(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbITMask(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbAddrModeRROperand(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbAddrModeImm5SOperand(MCInst *MI, unsigned OpNum, SStream *O, unsigned Scale); static void printThumbAddrModeImm5S1Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbAddrModeImm5S2Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbAddrModeImm5S4Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printThumbAddrModeSPOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printT2SOOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printAddrModeImm12Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0); static void printT2AddrModeImm8Operand(MCInst *MI, unsigned OpNum, SStream *O, bool); static void printT2AddrModeImm8s4Operand(MCInst *MI, unsigned OpNum, SStream *O, bool); static void printT2AddrModeImm0_1020s4Operand(MCInst *MI, unsigned OpNum, SStream *O); static void printT2AddrModeImm8OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printT2AddrModeImm8s4OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printT2AddrModeSoRegOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printSetendOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printCPSIMod(MCInst *MI, unsigned OpNum, SStream *O); static void printCPSIFlag(MCInst *MI, unsigned OpNum, SStream *O); static void printMSRMaskOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printMandatoryPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printSBitModifierOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printRegisterList(MCInst *MI, unsigned OpNum, SStream *O); static void printNoHashImmediate(MCInst *MI, unsigned OpNum, SStream *O); static void printPImmediate(MCInst *MI, unsigned OpNum, SStream *O); static void printCImmediate(MCInst *MI, unsigned OpNum, SStream *O); static void printCoprocOptionImm(MCInst *MI, unsigned OpNum, SStream *O); static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printNEONModImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printImmPlusOneOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printRotImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printGPRPairOperand(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI); static void printThumbLdrLabelOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printFBits16(MCInst *MI, unsigned OpNum, SStream *O); static void printFBits32(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorIndex(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListOne(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListTwo(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI); static void printVectorListTwoSpaced(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *RI); static void printVectorListThree(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListFour(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListOneAllLanes(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListTwoAllLanes(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *RI); static void printVectorListThreeAllLanes(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListFourAllLanes(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListTwoSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI); static void printVectorListThreeSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListFourSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListThreeSpaced(MCInst *MI, unsigned OpNum, SStream *O); static void printVectorListFourSpaced(MCInst *MI, unsigned OpNum, SStream *O); static void printBankedRegOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printModImmOperand(MCInst *MI, unsigned OpNum, SStream *O); static void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStream *O); #ifndef CAPSTONE_DIET // copy & normalize access info static uint8_t get_op_access(cs_struct *h, unsigned int id, unsigned int index) { uint8_t *arr = ARM_get_op_access(h, id); if (arr[index] == CS_AC_IGNORE) return 0; return arr[index]; } #endif static void set_mem_access(MCInst *MI, bool status) { if (MI->csh->detail != CS_OPT_ON) return; MI->csh->doing_mem = status; if (status) { #ifndef CAPSTONE_DIET uint8_t access; #endif MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_MEM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = ARM_REG_INVALID; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = ARM_REG_INVALID; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.scale = 1; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = 0; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; MI->ac_idx++; #endif } else { // done, create the next operand slot MI->flat_insn->detail->arm.op_count++; } } static void op_addImm(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = v; MI->flat_insn->detail->arm.op_count++; } } #define GET_INSTRINFO_ENUM #include "ARMGenInstrInfo.inc" //#define PRINT_ALIAS_INSTR #include "ARMGenAsmWriter.inc" void ARM_getRegName(cs_struct *handle, int value) { if (value == CS_OPT_SYNTAX_NOREGNAME) { handle->get_regname = getRegisterName2; handle->reg_name = ARM_reg_name2;; } else { handle->get_regname = getRegisterName; handle->reg_name = ARM_reg_name;; } } /// translateShiftImm - Convert shift immediate from 0-31 to 1-32 for printing. /// /// getSORegOffset returns an integer from 0-31, representing '32' as 0. static unsigned translateShiftImm(unsigned imm) { // lsr #32 and asr #32 exist, but should be encoded as a 0. //assert((imm & ~0x1f) == 0 && "Invalid shift encoding"); if (imm == 0) return 32; return imm; } /// Prints the shift value with an immediate value. static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) { if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) return; SStream_concat0(O, ", "); //assert (!(ShOpc == ARM_AM_ror && !ShImm) && "Cannot have ror #0"); SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); if (MI->csh->detail) { if (MI->csh->doing_mem) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; else MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; } if (ShOpc != ARM_AM_rrx) { SStream_concat0(O, " "); SStream_concat(O, "#%u", translateShiftImm(ShImm)); if (MI->csh->detail) { if (MI->csh->doing_mem) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = translateShiftImm(ShImm); else MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = translateShiftImm(ShImm); } } } static void printRegName(cs_struct *h, SStream *OS, unsigned RegNo) { #ifndef CAPSTONE_DIET SStream_concat0(OS, h->get_regname(RegNo)); #endif } static const name_map insn_update_flgs[] = { { ARM_INS_CMN, "cmn" }, { ARM_INS_CMP, "cmp" }, { ARM_INS_TEQ, "teq" }, { ARM_INS_TST, "tst" }, { ARM_INS_ADC, "adcs" }, { ARM_INS_ADD, "adds" }, { ARM_INS_AND, "ands" }, { ARM_INS_ASR, "asrs" }, { ARM_INS_BIC, "bics" }, { ARM_INS_EOR, "eors" }, { ARM_INS_LSL, "lsls" }, { ARM_INS_LSR, "lsrs" }, { ARM_INS_MLA, "mlas" }, { ARM_INS_MOV, "movs" }, { ARM_INS_MUL, "muls" }, { ARM_INS_MVN, "mvns" }, { ARM_INS_ORN, "orns" }, { ARM_INS_ORR, "orrs" }, { ARM_INS_ROR, "rors" }, { ARM_INS_RRX, "rrxs" }, { ARM_INS_RSB, "rsbs" }, { ARM_INS_RSC, "rscs" }, { ARM_INS_SBC, "sbcs" }, { ARM_INS_SMLAL, "smlals" }, { ARM_INS_SMULL, "smulls" }, { ARM_INS_SUB, "subs" }, { ARM_INS_UMLAL, "umlals" }, { ARM_INS_UMULL, "umulls" }, { ARM_INS_UADD8, "uadd8" }, }; void ARM_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) { if (((cs_struct *)ud)->detail != CS_OPT_ON) return; // check if this insn requests write-back if (mci->writeback || (strrchr(insn_asm, '!')) != NULL) { insn->detail->arm.writeback = true; } else if (mci->csh->mode & CS_MODE_THUMB) { // handle some special instructions with writeback //printf(">> Opcode = %u\n", mci->Opcode); switch(mci->Opcode) { default: break; case ARM_t2LDC2L_PRE: case ARM_t2LDC2_PRE: case ARM_t2LDCL_PRE: case ARM_t2LDC_PRE: case ARM_t2LDRB_PRE: case ARM_t2LDRD_PRE: case ARM_t2LDRH_PRE: case ARM_t2LDRSB_PRE: case ARM_t2LDRSH_PRE: case ARM_t2LDR_PRE: case ARM_t2STC2L_PRE: case ARM_t2STC2_PRE: case ARM_t2STCL_PRE: case ARM_t2STC_PRE: case ARM_t2STRB_PRE: case ARM_t2STRD_PRE: case ARM_t2STRH_PRE: case ARM_t2STR_PRE: case ARM_t2LDC2L_POST: case ARM_t2LDC2_POST: case ARM_t2LDCL_POST: case ARM_t2LDC_POST: case ARM_t2LDRB_POST: case ARM_t2LDRD_POST: case ARM_t2LDRH_POST: case ARM_t2LDRSB_POST: case ARM_t2LDRSH_POST: case ARM_t2LDR_POST: case ARM_t2STC2L_POST: case ARM_t2STC2_POST: case ARM_t2STCL_POST: case ARM_t2STC_POST: case ARM_t2STRB_POST: case ARM_t2STRD_POST: case ARM_t2STRH_POST: case ARM_t2STR_POST: insn->detail->arm.writeback = true; break; } } else { // ARM mode // handle some special instructions with writeback //printf(">> Opcode = %u\n", mci->Opcode); switch(mci->Opcode) { default: break; case ARM_LDC2L_PRE: case ARM_LDC2_PRE: case ARM_LDCL_PRE: case ARM_LDC_PRE: case ARM_LDRD_PRE: case ARM_LDRH_PRE: case ARM_LDRSB_PRE: case ARM_LDRSH_PRE: case ARM_STC2L_PRE: case ARM_STC2_PRE: case ARM_STCL_PRE: case ARM_STC_PRE: case ARM_STRD_PRE: case ARM_STRH_PRE: case ARM_LDC2L_POST: case ARM_LDC2_POST: case ARM_LDCL_POST: case ARM_LDC_POST: case ARM_LDRBT_POST: case ARM_LDRD_POST: case ARM_LDRH_POST: case ARM_LDRSB_POST: case ARM_LDRSH_POST: case ARM_STC2L_POST: case ARM_STC2_POST: case ARM_STCL_POST: case ARM_STC_POST: case ARM_STRBT_POST: case ARM_STRD_POST: case ARM_STRH_POST: case ARM_LDRB_POST_IMM: case ARM_LDR_POST_IMM: case ARM_LDR_POST_REG: case ARM_STRB_POST_IMM: case ARM_STR_POST_IMM: case ARM_STR_POST_REG: insn->detail->arm.writeback = true; break; } } // check if this insn requests update flags if (insn->detail->arm.update_flags == false) { // some insn still update flags, regardless of tabgen info unsigned int i, j; for (i = 0; i < ARR_SIZE(insn_update_flgs); i++) { if (insn->id == insn_update_flgs[i].id && !strncmp(insn_asm, insn_update_flgs[i].name, strlen(insn_update_flgs[i].name))) { insn->detail->arm.update_flags = true; // we have to update regs_write array as well for (j = 0; j < ARR_SIZE(insn->detail->regs_write); j++) { if (insn->detail->regs_write[j] == 0) { insn->detail->regs_write[j] = ARM_REG_CPSR; break; } } break; } } } // instruction should not have invalid CC if (insn->detail->arm.cc == ARM_CC_INVALID) { insn->detail->arm.cc = ARM_CC_AL; } // manual fix for some special instructions // printf(">>> id: %u, mcid: %u\n", insn->id, mci->Opcode); switch(mci->Opcode) { default: break; case ARM_MOVPCLR: insn->detail->arm.operands[0].type = ARM_OP_REG; insn->detail->arm.operands[0].reg = ARM_REG_PC; insn->detail->arm.operands[0].access = CS_AC_WRITE; insn->detail->arm.operands[1].type = ARM_OP_REG; insn->detail->arm.operands[1].reg = ARM_REG_LR; insn->detail->arm.operands[1].access = CS_AC_READ; insn->detail->arm.op_count = 2; break; } } void ARM_printInst(MCInst *MI, SStream *O, void *Info) { MCRegisterInfo *MRI = (MCRegisterInfo *)Info; unsigned Opcode = MCInst_getOpcode(MI), tmp, i, pubOpcode; // printf(">>> Opcode 0: %u\n", MCInst_getOpcode(MI)); switch(Opcode) { // Check for HINT instructions w/ canonical names. case ARM_HINT: case ARM_tHINT: case ARM_t2HINT: switch (MCOperand_getImm(MCInst_getOperand(MI, 0))) { case 0: SStream_concat0(O, "nop"); pubOpcode = ARM_INS_NOP; break; case 1: SStream_concat0(O, "yield"); pubOpcode = ARM_INS_YIELD; break; case 2: SStream_concat0(O, "wfe"); pubOpcode = ARM_INS_WFE; break; case 3: SStream_concat0(O, "wfi"); pubOpcode = ARM_INS_WFI; break; case 4: SStream_concat0(O, "sev"); pubOpcode = ARM_INS_SEV; break; case 5: if ((ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops)) { SStream_concat0(O, "sevl"); pubOpcode = ARM_INS_SEVL; break; } // Fallthrough for non-v8 default: // Anything else should just print normally. printInstruction(MI, O, MRI); return; } printPredicateOperand(MI, 1, O); if (Opcode == ARM_t2HINT) SStream_concat0(O, ".w"); MCInst_setOpcodePub(MI, pubOpcode); return; // Check for MOVs and print canonical forms, instead. case ARM_MOVsr: { // FIXME: Thumb variants? unsigned int opc; MCOperand *Dst = MCInst_getOperand(MI, 0); MCOperand *MO1 = MCInst_getOperand(MI, 1); MCOperand *MO2 = MCInst_getOperand(MI, 2); MCOperand *MO3 = MCInst_getOperand(MI, 3); opc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); SStream_concat0(O, ARM_AM_getShiftOpcStr(opc)); switch(opc) { default: break; case ARM_AM_asr: MCInst_setOpcodePub(MI, ARM_INS_ASR); break; case ARM_AM_lsl: MCInst_setOpcodePub(MI, ARM_INS_LSL); break; case ARM_AM_lsr: MCInst_setOpcodePub(MI, ARM_INS_LSR); break; case ARM_AM_ror: MCInst_setOpcodePub(MI, ARM_INS_ROR); break; case ARM_AM_rrx: MCInst_setOpcodePub(MI, ARM_INS_RRX); break; } printSBitModifierOperand(MI, 6, O); printPredicateOperand(MI, 4, O); SStream_concat0(O, "\t"); printRegName(MI->csh, O, MCOperand_getReg(Dst)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(Dst); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_WRITE; MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO2); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } //assert(ARM_AM_getSORegOffset(MO3.getImm()) == 0); return; } case ARM_MOVsi: { // FIXME: Thumb variants? unsigned int opc; MCOperand *Dst = MCInst_getOperand(MI, 0); MCOperand *MO1 = MCInst_getOperand(MI, 1); MCOperand *MO2 = MCInst_getOperand(MI, 2); opc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO2)); SStream_concat0(O, ARM_AM_getShiftOpcStr(opc)); switch(opc) { default: break; case ARM_AM_asr: MCInst_setOpcodePub(MI, ARM_INS_ASR); break; case ARM_AM_lsl: MCInst_setOpcodePub(MI, ARM_INS_LSL); break; case ARM_AM_lsr: MCInst_setOpcodePub(MI, ARM_INS_LSR); break; case ARM_AM_ror: MCInst_setOpcodePub(MI, ARM_INS_ROR); break; case ARM_AM_rrx: MCInst_setOpcodePub(MI, ARM_INS_RRX); break; } printSBitModifierOperand(MI, 5, O); printPredicateOperand(MI, 3, O); SStream_concat0(O, "\t"); printRegName(MI->csh, O, MCOperand_getReg(Dst)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(Dst); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_WRITE; MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } if (opc == ARM_AM_rrx) { //printAnnotation(O, Annot); return; } SStream_concat0(O, ", "); tmp = translateShiftImm(getSORegOffset((unsigned int)MCOperand_getImm(MO2))); printUInt32Bang(O, tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)opc; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = tmp; } return; } // A8.6.123 PUSH case ARM_STMDB_UPD: case ARM_t2STMDB_UPD: if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP && MCInst_getNumOperands(MI) > 5) { // Should only print PUSH if there are at least two registers in the list. SStream_concat0(O, "push"); MCInst_setOpcodePub(MI, ARM_INS_PUSH); printPredicateOperand(MI, 2, O); if (Opcode == ARM_t2STMDB_UPD) SStream_concat0(O, ".w"); SStream_concat0(O, "\t"); if (MI->csh->detail) { MI->flat_insn->detail->regs_read[MI->flat_insn->detail->regs_read_count] = ARM_REG_SP; MI->flat_insn->detail->regs_read_count++; MI->flat_insn->detail->regs_write[MI->flat_insn->detail->regs_write_count] = ARM_REG_SP; MI->flat_insn->detail->regs_write_count++; } printRegisterList(MI, 4, O); return; } break; case ARM_STR_PRE_IMM: if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP && MCOperand_getImm(MCInst_getOperand(MI, 3)) == -4) { SStream_concat0(O, "push"); MCInst_setOpcodePub(MI, ARM_INS_PUSH); printPredicateOperand(MI, 4, O); SStream_concat0(O, "\t{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 1))); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; #endif MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 1)); #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); return; } break; // A8.6.122 POP case ARM_LDMIA_UPD: case ARM_t2LDMIA_UPD: if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP && MCInst_getNumOperands(MI) > 5) { // Should only print POP if there are at least two registers in the list. SStream_concat0(O, "pop"); MCInst_setOpcodePub(MI, ARM_INS_POP); printPredicateOperand(MI, 2, O); if (Opcode == ARM_t2LDMIA_UPD) SStream_concat0(O, ".w"); SStream_concat0(O, "\t"); // unlike LDM, POP only write to registers, so skip the 1st access code MI->ac_idx = 1; if (MI->csh->detail) { MI->flat_insn->detail->regs_read[MI->flat_insn->detail->regs_read_count] = ARM_REG_SP; MI->flat_insn->detail->regs_read_count++; MI->flat_insn->detail->regs_write[MI->flat_insn->detail->regs_write_count] = ARM_REG_SP; MI->flat_insn->detail->regs_write_count++; } printRegisterList(MI, 4, O); return; } break; case ARM_LDR_POST_IMM: if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP) { MCOperand *MO2 = MCInst_getOperand(MI, 4); if ((getAM2Op((unsigned int)MCOperand_getImm(MO2)) == ARM_AM_add && getAM2Offset((unsigned int)MCOperand_getImm(MO2)) == 4) || MCOperand_getImm(MO2) == 4) { SStream_concat0(O, "pop"); MCInst_setOpcodePub(MI, ARM_INS_POP); printPredicateOperand(MI, 5, O); SStream_concat0(O, "\t{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 0))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0)); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_WRITE; MI->flat_insn->detail->arm.op_count++; // this instruction implicitly read/write SP register MI->flat_insn->detail->regs_read[MI->flat_insn->detail->regs_read_count] = ARM_REG_SP; MI->flat_insn->detail->regs_read_count++; MI->flat_insn->detail->regs_write[MI->flat_insn->detail->regs_write_count] = ARM_REG_SP; MI->flat_insn->detail->regs_write_count++; } SStream_concat0(O, "}"); return; } } break; // A8.6.355 VPUSH case ARM_VSTMSDB_UPD: case ARM_VSTMDDB_UPD: if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) { SStream_concat0(O, "vpush"); MCInst_setOpcodePub(MI, ARM_INS_VPUSH); printPredicateOperand(MI, 2, O); SStream_concat0(O, "\t"); printRegisterList(MI, 4, O); return; } break; // A8.6.354 VPOP case ARM_VLDMSIA_UPD: case ARM_VLDMDIA_UPD: if (MCOperand_getReg(MCInst_getOperand(MI, 0)) == ARM_SP) { SStream_concat0(O, "vpop"); MCInst_setOpcodePub(MI, ARM_INS_VPOP); printPredicateOperand(MI, 2, O); SStream_concat0(O, "\t"); printRegisterList(MI, 4, O); return; } break; case ARM_tLDMIA: { bool Writeback = true; unsigned BaseReg = MCOperand_getReg(MCInst_getOperand(MI, 0)); unsigned i; for (i = 3; i < MCInst_getNumOperands(MI); ++i) { if (MCOperand_getReg(MCInst_getOperand(MI, i)) == BaseReg) Writeback = false; } SStream_concat0(O, "ldm"); MCInst_setOpcodePub(MI, ARM_INS_LDM); printPredicateOperand(MI, 1, O); SStream_concat0(O, "\t"); printRegName(MI->csh, O, BaseReg); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = BaseReg; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ | CS_AC_WRITE; MI->flat_insn->detail->arm.op_count++; } if (Writeback) { MI->writeback = true; SStream_concat0(O, "!"); } SStream_concat0(O, ", "); printRegisterList(MI, 3, O); return; } // Combine 2 GPRs from disassember into a GPRPair to match with instr def. // ldrexd/strexd require even/odd GPR pair. To enforce this constraint, // a single GPRPair reg operand is used in the .td file to replace the two // GPRs. However, when decoding them, the two GRPs cannot be automatically // expressed as a GPRPair, so we have to manually merge them. // FIXME: We would really like to be able to tablegen'erate this. case ARM_LDREXD: case ARM_STREXD: case ARM_LDAEXD: case ARM_STLEXD: { const MCRegisterClass* MRC = MCRegisterInfo_getRegClass(MRI, ARM_GPRRegClassID); bool isStore = Opcode == ARM_STREXD || Opcode == ARM_STLEXD; unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, isStore ? 1 : 0)); if (MCRegisterClass_contains(MRC, Reg)) { MCInst NewMI; MCInst_Init(&NewMI); MCInst_setOpcode(&NewMI, Opcode); if (isStore) MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, 0)); MCOperand_CreateReg0(&NewMI, MCRegisterInfo_getMatchingSuperReg(MRI, Reg, ARM_gsub_0, MCRegisterInfo_getRegClass(MRI, ARM_GPRPairRegClassID))); // Copy the rest operands into NewMI. for(i = isStore ? 3 : 2; i < MCInst_getNumOperands(MI); ++i) MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, i)); printInstruction(&NewMI, O, MRI); return; } break; } // B9.3.3 ERET (Thumb) // For a target that has Virtualization Extensions, ERET is the preferred // disassembly of SUBS PC, LR, #0 case ARM_t2SUBS_PC_LR: { MCOperand *opc = MCInst_getOperand(MI, 0); if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(opc) && MCOperand_getImm(opc) == 0 && (ARM_getFeatureBits(MI->csh->mode) & ARM_FeatureVirtualization)) { SStream_concat0(O, "eret"); MCInst_setOpcodePub(MI, ARM_INS_ERET); printPredicateOperand(MI, 1, O); return; } break; } } //if (printAliasInstr(MI, O, MRI)) // printInstruction(MI, O, MRI); printInstruction(MI, O, MRI); } static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { int32_t imm; MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned Reg = MCOperand_getReg(Op); printRegName(MI->csh, O, Reg); if (MI->csh->detail) { if (MI->csh->doing_mem) { if (MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base == ARM_REG_INVALID) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = Reg; else MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = Reg; } else { #ifndef CAPSTONE_DIET uint8_t access; #endif MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg; #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; MI->ac_idx++; #endif MI->flat_insn->detail->arm.op_count++; } } } else if (MCOperand_isImm(Op)) { unsigned int opc = MCInst_getOpcode(MI); imm = (int32_t)MCOperand_getImm(Op); // relative branch only has relative offset, so we have to update it // to reflect absolute address. // Note: in ARM, PC is always 2 instructions ahead, so we have to // add 8 in ARM mode, or 4 in Thumb mode // printf(">> opcode: %u\n", MCInst_getOpcode(MI)); if (ARM_rel_branch(MI->csh, opc)) { uint32_t address; // only do this for relative branch if (MI->csh->mode & CS_MODE_THUMB) { address = (uint32_t)MI->address + 4; if (ARM_blx_to_arm_mode(MI->csh, opc)) { // here need to align down to the nearest 4-byte address #define _ALIGN_DOWN(v, align_width) ((v/align_width)*align_width) address = _ALIGN_DOWN(address, 4); #undef _ALIGN_DOWN } } else { address = (uint32_t)MI->address + 8; } imm += address; printUInt32Bang(O, imm); } else { switch(MI->flat_insn->id) { default: if (MI->csh->imm_unsigned) printUInt32Bang(O, imm); else printInt32Bang(O, imm); break; case ARM_INS_AND: case ARM_INS_ORR: case ARM_INS_EOR: case ARM_INS_BIC: case ARM_INS_MVN: // do not print number in negative form printUInt32Bang(O, imm); break; } } if (MI->csh->detail) { if (MI->csh->doing_mem) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = imm; else { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = imm; MI->flat_insn->detail->arm.op_count++; } } } } static void printThumbLdrLabelOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); int32_t OffImm; bool isSub; SStream_concat0(O, "[pc, "); OffImm = (int32_t)MCOperand_getImm(MO1); isSub = OffImm < 0; // Special value for #-0. All others are normal. if (OffImm == INT32_MIN) OffImm = 0; if (isSub) { SStream_concat(O, "#-0x%x", -OffImm); } else { printUInt32Bang(O, OffImm); } SStream_concat0(O, "]"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_MEM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = ARM_REG_PC; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = ARM_REG_INVALID; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.scale = 1; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = OffImm; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } } // so_reg is a 4-operand unit corresponding to register forms of the A5.1 // "Addressing Mode 1 - Data-processing operands" forms. This includes: // REG 0 0 - e.g. R5 // REG REG 0,SH_OPC - e.g. R5, ROR R3 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3 static void printSORegRegOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); MCOperand *MO3 = MCInst_getOperand(MI, OpNum+2); ARM_AM_ShiftOpc ShOpc; printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (MCOperand_getImm(MO3) & 7) + ARM_SFT_ASR_REG - 1; MI->flat_insn->detail->arm.op_count++; } // Print the shift opc. ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); SStream_concat0(O, ", "); SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); if (ShOpc == ARM_AM_rrx) return; SStream_concat0(O, " "); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = MCOperand_getReg(MO2); //assert(ARM_AM_getSORegOffset(MO3.getImm()) == 0); } static void printSORegImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = MCOperand_getImm(MO2) & 7; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = (unsigned int)MCOperand_getImm(MO2) >> 3; MI->flat_insn->detail->arm.op_count++; } // Print the shift opc. printRegImmShift(MI, O, ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO2)), getSORegOffset((unsigned int)MCOperand_getImm(MO2))); } //===--------------------------------------------------------------------===// // Addressing Mode #2 //===--------------------------------------------------------------------===// static void printAM2PreOrOffsetIndexOp(MCInst *MI, unsigned Op, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, Op); MCOperand *MO2 = MCInst_getOperand(MI, Op + 1); MCOperand *MO3 = MCInst_getOperand(MI, Op + 2); ARM_AM_AddrOpc subtracted = getAM2Op((unsigned int)MCOperand_getImm(MO3)); SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); } if (!MCOperand_getReg(MO2)) { unsigned tmp = getAM2Offset((unsigned int)MCOperand_getImm(MO3)); if (tmp) { // Don't print +0. subtracted = getAM2Op((unsigned int)MCOperand_getImm(MO3)); SStream_concat0(O, ", "); if (tmp > HEX_THRESHOLD) SStream_concat(O, "#%s0x%x", ARM_AM_getAddrOpcStr(subtracted), tmp); else SStream_concat(O, "#%s%u", ARM_AM_getAddrOpcStr(subtracted), tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)getAM2Op((unsigned int)MCOperand_getImm(MO3)); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = tmp; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = subtracted == ARM_AM_sub; } } SStream_concat0(O, "]"); set_mem_access(MI, false); return; } SStream_concat0(O, ", "); SStream_concat0(O, ARM_AM_getAddrOpcStr(subtracted)); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = MCOperand_getReg(MO2); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = subtracted == ARM_AM_sub; } printRegImmShift(MI, O, getAM2ShiftOpc((unsigned int)MCOperand_getImm(MO3)), getAM2Offset((unsigned int)MCOperand_getImm(MO3))); SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printAddrModeTBB(MCInst *MI, unsigned Op, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, Op); MCOperand *MO2 = MCInst_getOperand(MI, Op+1); SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = MCOperand_getReg(MO2); SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printAddrModeTBH(MCInst *MI, unsigned Op, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, Op); MCOperand *MO2 = MCInst_getOperand(MI, Op+1); SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = MCOperand_getReg(MO2); SStream_concat0(O, ", lsl #1]"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = ARM_SFT_LSL; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = 1; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.lshift = 1; } set_mem_access(MI, false); } static void printAddrMode2Operand(MCInst *MI, unsigned Op, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, Op); if (!MCOperand_isReg(MO1)) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, Op, O); return; } printAM2PreOrOffsetIndexOp(MI, Op, O); } static void printAddrMode2OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); ARM_AM_AddrOpc subtracted = getAM2Op((unsigned int)MCOperand_getImm(MO2)); if (!MCOperand_getReg(MO1)) { unsigned ImmOffs = getAM2Offset((unsigned int)MCOperand_getImm(MO2)); if (ImmOffs > HEX_THRESHOLD) SStream_concat(O, "#%s0x%x", ARM_AM_getAddrOpcStr(subtracted), ImmOffs); else SStream_concat(O, "#%s%u", ARM_AM_getAddrOpcStr(subtracted), ImmOffs); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = ImmOffs; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = subtracted == ARM_AM_sub; MI->flat_insn->detail->arm.op_count++; } return; } SStream_concat0(O, ARM_AM_getAddrOpcStr(subtracted)); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = subtracted == ARM_AM_sub; MI->flat_insn->detail->arm.op_count++; } printRegImmShift(MI, O, getAM2ShiftOpc((unsigned int)MCOperand_getImm(MO2)), getAM2Offset((unsigned int)MCOperand_getImm(MO2))); } //===--------------------------------------------------------------------===// // Addressing Mode #3 //===--------------------------------------------------------------------===// static void printAM3PreOrOffsetIndexOp(MCInst *MI, unsigned Op, SStream *O, bool AlwaysPrintImm0) { MCOperand *MO1 = MCInst_getOperand(MI, Op); MCOperand *MO2 = MCInst_getOperand(MI, Op+1); MCOperand *MO3 = MCInst_getOperand(MI, Op+2); ARM_AM_AddrOpc sign = getAM3Op((unsigned int)MCOperand_getImm(MO3)); unsigned ImmOffs; SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); if (MCOperand_getReg(MO2)) { SStream_concat0(O, ", "); SStream_concat0(O, ARM_AM_getAddrOpcStr(sign)); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = MCOperand_getReg(MO2); if (sign == ARM_AM_sub) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.scale = -1; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = true; } } SStream_concat0(O, "]"); set_mem_access(MI, false); return; } //If the op is sub we have to print the immediate even if it is 0 ImmOffs = getAM3Offset((unsigned int)MCOperand_getImm(MO3)); if (AlwaysPrintImm0 || ImmOffs || (sign == ARM_AM_sub)) { if (ImmOffs > HEX_THRESHOLD) SStream_concat(O, ", #%s0x%x", ARM_AM_getAddrOpcStr(sign), ImmOffs); else SStream_concat(O, ", #%s%u", ARM_AM_getAddrOpcStr(sign), ImmOffs); } if (MI->csh->detail) { if (sign == ARM_AM_sub) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = -(int)ImmOffs; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = true; } else MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = (int)ImmOffs; } SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printAddrMode3Operand(MCInst *MI, unsigned Op, SStream *O, bool AlwaysPrintImm0) { MCOperand *MO1 = MCInst_getOperand(MI, Op); if (!MCOperand_isReg(MO1)) { // For label symbolic references. printOperand(MI, Op, O); return; } printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0); } static void printAddrMode3OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); ARM_AM_AddrOpc subtracted = getAM3Op((unsigned int)MCOperand_getImm(MO2)); unsigned ImmOffs; if (MCOperand_getReg(MO1)) { SStream_concat0(O, ARM_AM_getAddrOpcStr(subtracted)); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = subtracted == ARM_AM_sub; MI->flat_insn->detail->arm.op_count++; } return; } ImmOffs = getAM3Offset((unsigned int)MCOperand_getImm(MO2)); if (ImmOffs > HEX_THRESHOLD) SStream_concat(O, "#%s0x%x", ARM_AM_getAddrOpcStr(subtracted), ImmOffs); else SStream_concat(O, "#%s%u", ARM_AM_getAddrOpcStr(subtracted), ImmOffs); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = ImmOffs; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].subtracted = subtracted == ARM_AM_sub; MI->flat_insn->detail->arm.op_count++; } } static void printPostIdxImm8Operand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); unsigned Imm = (unsigned int)MCOperand_getImm(MO); if ((Imm & 0xff) > HEX_THRESHOLD) SStream_concat(O, "#%s0x%x", ((Imm & 256) ? "" : "-"), (Imm & 0xff)); else SStream_concat(O, "#%s%u", ((Imm & 256) ? "" : "-"), (Imm & 0xff)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = Imm & 0xff; MI->flat_insn->detail->arm.op_count++; } } static void printPostIdxRegOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); SStream_concat0(O, (MCOperand_getImm(MO2) ? "" : "-")); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } } static void printPostIdxImm8s4Operand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); int Imm = (int)MCOperand_getImm(MO); if (((Imm & 0xff) << 2) > HEX_THRESHOLD) { SStream_concat(O, "#%s0x%x", ((Imm & 256) ? "" : "-"), ((Imm & 0xff) << 2)); } else { SStream_concat(O, "#%s%u", ((Imm & 256) ? "" : "-"), ((Imm & 0xff) << 2)); } if (MI->csh->detail) { int v = (Imm & 256) ? ((Imm & 0xff) << 2) : -((Imm & 0xff) << 2); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = v; MI->flat_insn->detail->arm.op_count++; } } static void printAddrMode5Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0) { unsigned ImmOffs; MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); ARM_AM_AddrOpc subtracted = ARM_AM_getAM5Op((unsigned int)MCOperand_getImm(MO2)); if (!MCOperand_isReg(MO1)) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, OpNum, O); return; } SStream_concat0(O, "["); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_MEM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = ARM_REG_INVALID; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.scale = 1; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = 0; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; } ImmOffs = ARM_AM_getAM5Offset((unsigned int)MCOperand_getImm(MO2)); if (AlwaysPrintImm0 || ImmOffs || subtracted == ARM_AM_sub) { if (ImmOffs * 4 > HEX_THRESHOLD) SStream_concat(O, ", #%s0x%x", ARM_AM_getAddrOpcStr(subtracted), ImmOffs * 4); else SStream_concat(O, ", #%s%u", ARM_AM_getAddrOpcStr(subtracted), ImmOffs * 4); if (MI->csh->detail) { if (subtracted) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = ImmOffs * 4; else MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = -(int)ImmOffs * 4; } } SStream_concat0(O, "]"); if (MI->csh->detail) { MI->flat_insn->detail->arm.op_count++; } } static void printAddrMode6Operand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); unsigned tmp; SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); tmp = (unsigned int)MCOperand_getImm(MO2); if (tmp) { if (tmp << 3 > HEX_THRESHOLD) SStream_concat(O, ":0x%x", (tmp << 3)); else SStream_concat(O, ":%u", (tmp << 3)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = tmp << 3; } SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printAddrMode7Operand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printAddrMode6OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); if (MCOperand_getReg(MO) == 0) { MI->writeback = true; SStream_concat0(O, "!"); } else { SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO); MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } } } static void printBitfieldInvMaskImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); uint32_t v = ~(uint32_t)MCOperand_getImm(MO); int32_t lsb = CountTrailingZeros_32(v); int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb; //assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!"); printUInt32Bang(O, lsb); if (width > HEX_THRESHOLD) SStream_concat(O, ", #0x%x", width); else SStream_concat(O, ", #%u", width); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = lsb; MI->flat_insn->detail->arm.op_count++; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = width; MI->flat_insn->detail->arm.op_count++; } } static void printMemBOption(MCInst *MI, unsigned OpNum, SStream *O) { unsigned val = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat0(O, ARM_MB_MemBOptToString(val + 1, (ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops) != 0)); if (MI->csh->detail) { MI->flat_insn->detail->arm.mem_barrier = (arm_mem_barrier)(val + 1); } } void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStream *O) { unsigned val = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat0(O, ARM_ISB_InstSyncBOptToString(val)); } static void printShiftImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { unsigned ShiftOp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); bool isASR = (ShiftOp & (1 << 5)) != 0; unsigned Amt = ShiftOp & 0x1f; if (isASR) { unsigned tmp = Amt == 0 ? 32 : Amt; if (tmp > HEX_THRESHOLD) SStream_concat(O, ", asr #0x%x", tmp); else SStream_concat(O, ", asr #%u", tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = ARM_SFT_ASR; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = tmp; } } else if (Amt) { if (Amt > HEX_THRESHOLD) SStream_concat(O, ", lsl #0x%x", Amt); else SStream_concat(O, ", lsl #%u", Amt); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = ARM_SFT_LSL; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = Amt; } } } static void printPKHLSLShiftImm(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); if (Imm == 0) return; //assert(Imm > 0 && Imm < 32 && "Invalid PKH shift immediate value!"); if (Imm > HEX_THRESHOLD) SStream_concat(O, ", lsl #0x%x", Imm); else SStream_concat(O, ", lsl #%u", Imm); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = ARM_SFT_LSL; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = Imm; } } static void printPKHASRShiftImm(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // A shift amount of 32 is encoded as 0. if (Imm == 0) Imm = 32; //assert(Imm > 0 && Imm <= 32 && "Invalid PKH shift immediate value!"); if (Imm > HEX_THRESHOLD) SStream_concat(O, ", asr #0x%x", Imm); else SStream_concat(O, ", asr #%u", Imm); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = ARM_SFT_ASR; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = Imm; } } // FIXME: push {r1, r2, r3, ...} can exceed the number of operands in MCInst struct static void printRegisterList(MCInst *MI, unsigned OpNum, SStream *O) { unsigned i, e; #ifndef CAPSTONE_DIET uint8_t access = 0; #endif SStream_concat0(O, "{"); #ifndef CAPSTONE_DIET if (MI->csh->detail) { access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); } #endif for (i = OpNum, e = MCInst_getNumOperands(MI); i != e; ++i) { if (i != OpNum) SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, i))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, i)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET if (MI->csh->detail) { MI->ac_idx++; } #endif } static void printGPRPairOperand(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI) { unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); printRegName(MI->csh, O, MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_0)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_0); MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_1)); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_1); MI->flat_insn->detail->arm.op_count++; } } // SETEND BE/LE static void printSetendOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); if (MCOperand_getImm(Op)) { SStream_concat0(O, "be"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_SETEND; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].setend = ARM_SETEND_BE; MI->flat_insn->detail->arm.op_count++; } } else { SStream_concat0(O, "le"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_SETEND; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].setend = ARM_SETEND_LE; MI->flat_insn->detail->arm.op_count++; } } } static void printCPSIMod(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); unsigned int mode = (unsigned int)MCOperand_getImm(Op); SStream_concat0(O, ARM_PROC_IModToString(mode)); if (MI->csh->detail) { MI->flat_insn->detail->arm.cps_mode = mode; } } static void printCPSIFlag(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); unsigned IFlags = (unsigned int)MCOperand_getImm(Op); int i; for (i = 2; i >= 0; --i) if (IFlags & (1 << i)) { SStream_concat0(O, ARM_PROC_IFlagsToString(1 << i)); } if (IFlags == 0) { SStream_concat0(O, "none"); IFlags = ARM_CPSFLAG_NONE; } if (MI->csh->detail) { MI->flat_insn->detail->arm.cps_flag = IFlags; } } static void printMSRMaskOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); unsigned SpecRegRBit = (unsigned)MCOperand_getImm(Op) >> 4; unsigned Mask = (unsigned)MCOperand_getImm(Op) & 0xf; unsigned reg; uint64_t FeatureBits = ARM_getFeatureBits(MI->csh->mode); if (FeatureBits & ARM_FeatureMClass) { unsigned SYSm = (unsigned)MCOperand_getImm(Op); unsigned Opcode = MCInst_getOpcode(MI); // For writes, handle extended mask bits if the DSP extension is present. if (Opcode == ARM_t2MSR_M && (FeatureBits & ARM_FeatureDSPThumb2)) { switch (SYSm) { case 0x400: SStream_concat0(O, "apsr_g"); ARM_addSysReg(MI, ARM_SYSREG_APSR_G); return; case 0xc00: SStream_concat0(O, "apsr_nzcvqg"); ARM_addSysReg(MI, ARM_SYSREG_APSR_NZCVQG); return; case 0x401: SStream_concat0(O, "iapsr_g"); ARM_addSysReg(MI, ARM_SYSREG_IAPSR_G); return; case 0xc01: SStream_concat0(O, "iapsr_nzcvqg"); ARM_addSysReg(MI, ARM_SYSREG_IAPSR_NZCVQG); return; case 0x402: SStream_concat0(O, "eapsr_g"); ARM_addSysReg(MI, ARM_SYSREG_EAPSR_G); return; case 0xc02: SStream_concat0(O, "eapsr_nzcvqg"); ARM_addSysReg(MI, ARM_SYSREG_EAPSR_NZCVQG); return; case 0x403: SStream_concat0(O, "xpsr_g"); ARM_addSysReg(MI, ARM_SYSREG_XPSR_G); return; case 0xc03: SStream_concat0(O, "xpsr_nzcvqg"); ARM_addSysReg(MI, ARM_SYSREG_XPSR_NZCVQG); return; } } // Handle the basic 8-bit mask. SYSm &= 0xff; if (Opcode == ARM_t2MSR_M && (FeatureBits & ARM_HasV7Ops)) { // ARMv7-M deprecates using MSR APSR without a _ qualifier as an // alias for MSR APSR_nzcvq. switch (SYSm) { case 0: SStream_concat0(O, "apsr_nzcvq"); ARM_addSysReg(MI, ARM_SYSREG_APSR_NZCVQ); return; case 1: SStream_concat0(O, "iapsr_nzcvq"); ARM_addSysReg(MI, ARM_SYSREG_IAPSR_NZCVQ); return; case 2: SStream_concat0(O, "eapsr_nzcvq"); ARM_addSysReg(MI, ARM_SYSREG_EAPSR_NZCVQ); return; case 3: SStream_concat0(O, "xpsr_nzcvq"); ARM_addSysReg(MI, ARM_SYSREG_XPSR_NZCVQ); return; } } switch (SYSm) { default: //llvm_unreachable("Unexpected mask value!"); case 0: SStream_concat0(O, "apsr"); ARM_addSysReg(MI, ARM_SYSREG_APSR); return; case 1: SStream_concat0(O, "iapsr"); ARM_addSysReg(MI, ARM_SYSREG_IAPSR); return; case 2: SStream_concat0(O, "eapsr"); ARM_addSysReg(MI, ARM_SYSREG_EAPSR); return; case 3: SStream_concat0(O, "xpsr"); ARM_addSysReg(MI, ARM_SYSREG_XPSR); return; case 5: SStream_concat0(O, "ipsr"); ARM_addSysReg(MI, ARM_SYSREG_IPSR); return; case 6: SStream_concat0(O, "epsr"); ARM_addSysReg(MI, ARM_SYSREG_EPSR); return; case 7: SStream_concat0(O, "iepsr"); ARM_addSysReg(MI, ARM_SYSREG_IEPSR); return; case 8: SStream_concat0(O, "msp"); ARM_addSysReg(MI, ARM_SYSREG_MSP); return; case 9: SStream_concat0(O, "psp"); ARM_addSysReg(MI, ARM_SYSREG_PSP); return; case 16: SStream_concat0(O, "primask"); ARM_addSysReg(MI, ARM_SYSREG_PRIMASK); return; case 17: SStream_concat0(O, "basepri"); ARM_addSysReg(MI, ARM_SYSREG_BASEPRI); return; case 18: SStream_concat0(O, "basepri_max"); ARM_addSysReg(MI, ARM_SYSREG_BASEPRI_MAX); return; case 19: SStream_concat0(O, "faultmask"); ARM_addSysReg(MI, ARM_SYSREG_FAULTMASK); return; case 20: SStream_concat0(O, "control"); ARM_addSysReg(MI, ARM_SYSREG_CONTROL); return; } } // As special cases, CPSR_f, CPSR_s and CPSR_fs prefer printing as // APSR_nzcvq, APSR_g and APSRnzcvqg, respectively. if (!SpecRegRBit && (Mask == 8 || Mask == 4 || Mask == 12)) { SStream_concat0(O, "apsr_"); switch (Mask) { default: // llvm_unreachable("Unexpected mask value!"); case 4: SStream_concat0(O, "g"); ARM_addSysReg(MI, ARM_SYSREG_APSR_G); return; case 8: SStream_concat0(O, "nzcvq"); ARM_addSysReg(MI, ARM_SYSREG_APSR_NZCVQ); return; case 12: SStream_concat0(O, "nzcvqg"); ARM_addSysReg(MI, ARM_SYSREG_APSR_NZCVQG); return; } } reg = 0; if (SpecRegRBit) { SStream_concat0(O, "spsr"); if (Mask) { SStream_concat0(O, "_"); if (Mask & 8) { SStream_concat0(O, "f"); reg += ARM_SYSREG_SPSR_F; } if (Mask & 4) { SStream_concat0(O, "s"); reg += ARM_SYSREG_SPSR_S; } if (Mask & 2) { SStream_concat0(O, "x"); reg += ARM_SYSREG_SPSR_X; } if (Mask & 1) { SStream_concat0(O, "c"); reg += ARM_SYSREG_SPSR_C; } ARM_addSysReg(MI, reg); } } else { SStream_concat0(O, "cpsr"); if (Mask) { SStream_concat0(O, "_"); if (Mask & 8) { SStream_concat0(O, "f"); reg += ARM_SYSREG_CPSR_F; } if (Mask & 4) { SStream_concat0(O, "s"); reg += ARM_SYSREG_CPSR_S; } if (Mask & 2) { SStream_concat0(O, "x"); reg += ARM_SYSREG_CPSR_X; } if (Mask & 1) { SStream_concat0(O, "c"); reg += ARM_SYSREG_CPSR_C; } ARM_addSysReg(MI, reg); } } } static void printBankedRegOperand(MCInst *MI, unsigned OpNum, SStream *O) { uint32_t Banked = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); uint32_t R = (Banked & 0x20) >> 5; uint32_t SysM = Banked & 0x1f; const char *RegNames[] = { "r8_usr", "r9_usr", "r10_usr", "r11_usr", "r12_usr", "sp_usr", "lr_usr", "", "r8_fiq", "r9_fiq", "r10_fiq", "r11_fiq", "r12_fiq", "sp_fiq", "lr_fiq", "", "lr_irq", "sp_irq", "lr_svc", "sp_svc", "lr_abt", "sp_abt", "lr_und", "sp_und", "", "", "", "", "lr_mon", "sp_mon", "elr_hyp", "sp_hyp" }; arm_sysreg RegIds[] = { ARM_SYSREG_R8_USR, ARM_SYSREG_R9_USR, ARM_SYSREG_R10_USR, ARM_SYSREG_R11_USR, ARM_SYSREG_R12_USR, ARM_SYSREG_SP_USR, ARM_SYSREG_LR_USR, 0, ARM_SYSREG_R8_FIQ, ARM_SYSREG_R9_FIQ, ARM_SYSREG_R10_FIQ, ARM_SYSREG_R11_FIQ, ARM_SYSREG_R12_FIQ, ARM_SYSREG_SP_FIQ, ARM_SYSREG_LR_FIQ, 0, ARM_SYSREG_LR_IRQ, ARM_SYSREG_SP_IRQ, ARM_SYSREG_LR_SVC, ARM_SYSREG_SP_SVC, ARM_SYSREG_LR_ABT, ARM_SYSREG_SP_ABT, ARM_SYSREG_LR_UND, ARM_SYSREG_SP_UND, 0, 0, 0, 0, ARM_SYSREG_LR_MON, ARM_SYSREG_SP_MON, ARM_SYSREG_ELR_HYP, ARM_SYSREG_SP_HYP, }; const char *Name = RegNames[SysM]; // Nothing much we can do about this, the encodings are specified in B9.2.3 of // the ARM ARM v7C, and are all over the shop. if (R) { SStream_concat0(O, "SPSR_"); switch(SysM) { default: // llvm_unreachable("Invalid banked SPSR register"); case 0x0e: SStream_concat0(O, "fiq"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_FIQ); return; case 0x10: SStream_concat0(O, "irq"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_IRQ); return; case 0x12: SStream_concat0(O, "svc"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_SVC); return; case 0x14: SStream_concat0(O, "abt"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_ABT); return; case 0x16: SStream_concat0(O, "und"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_UND); return; case 0x1c: SStream_concat0(O, "mon"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_MON); return; case 0x1e: SStream_concat0(O, "hyp"); ARM_addSysReg(MI, ARM_SYSREG_SPSR_HYP); return; } } //assert(!R && "should have dealt with SPSR regs"); //assert(Name[0] && "invalid banked register operand"); SStream_concat0(O, Name); ARM_addSysReg(MI, RegIds[SysM]); } static void printPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O) { ARMCC_CondCodes CC = (ARMCC_CondCodes)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // Handle the undefined 15 CC value here for printing so we don't abort(). if ((unsigned)CC == 15) { SStream_concat0(O, ""); if (MI->csh->detail) MI->flat_insn->detail->arm.cc = ARM_CC_INVALID; } else { if (CC != ARMCC_AL) { SStream_concat0(O, ARMCC_ARMCondCodeToString(CC)); } if (MI->csh->detail) MI->flat_insn->detail->arm.cc = CC + 1; } } // TODO: test this static void printMandatoryPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O) { ARMCC_CondCodes CC = (ARMCC_CondCodes)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat0(O, ARMCC_ARMCondCodeToString(CC)); if (MI->csh->detail) MI->flat_insn->detail->arm.cc = CC + 1; } static void printSBitModifierOperand(MCInst *MI, unsigned OpNum, SStream *O) { if (MCOperand_getReg(MCInst_getOperand(MI, OpNum))) { //assert(MCOperand_getReg(MCInst_getOperand(MI, OpNum)) == ARM_CPSR && // "Expect ARM CPSR register!"); SStream_concat0(O, "s"); if (MI->csh->detail) MI->flat_insn->detail->arm.update_flags = true; } } static void printNoHashImmediate(MCInst *MI, unsigned OpNum, SStream *O) { unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); printUInt32(O, tmp); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->arm.op_count--; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].neon_lane = (int8_t)tmp; MI->ac_idx--; // consecutive operands share the same access right } else { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = tmp; MI->flat_insn->detail->arm.op_count++; } } } static void printPImmediate(MCInst *MI, unsigned OpNum, SStream *O) { unsigned imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat(O, "p%u", imm); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_PIMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = imm; MI->flat_insn->detail->arm.op_count++; } } static void printCImmediate(MCInst *MI, unsigned OpNum, SStream *O) { unsigned imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); SStream_concat(O, "c%u", imm); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_CIMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = imm; MI->flat_insn->detail->arm.op_count++; } } static void printCoprocOptionImm(MCInst *MI, unsigned OpNum, SStream *O) { unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); if (tmp > HEX_THRESHOLD) SStream_concat(O, "{0x%x}", tmp); else SStream_concat(O, "{%u}", tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = tmp; MI->flat_insn->detail->arm.op_count++; } } static void printAdrLabelOperand(MCInst *MI, unsigned OpNum, SStream *O, unsigned scale) { MCOperand *MO = MCInst_getOperand(MI, OpNum); int32_t OffImm = (int32_t)MCOperand_getImm(MO) << scale; if (OffImm == INT32_MIN) { SStream_concat0(O, "#-0"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = 0; MI->flat_insn->detail->arm.op_count++; } } else { if (OffImm < 0) SStream_concat(O, "#-0x%x", -OffImm); else { if (OffImm > HEX_THRESHOLD) SStream_concat(O, "#0x%x", OffImm); else SStream_concat(O, "#%u", OffImm); } if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = OffImm; MI->flat_insn->detail->arm.op_count++; } } } static void printThumbS4ImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)) * 4; printUInt32Bang(O, tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = tmp; MI->flat_insn->detail->arm.op_count++; } } static void printThumbSRImm(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); unsigned tmp = Imm == 0 ? 32 : Imm; printUInt32Bang(O, tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = tmp; MI->flat_insn->detail->arm.op_count++; } } static void printThumbITMask(MCInst *MI, unsigned OpNum, SStream *O) { // (3 - the number of trailing zeros) is the number of then / else. unsigned Mask = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); unsigned Firstcond = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum-1)); unsigned CondBit0 = Firstcond & 1; unsigned NumTZ = CountTrailingZeros_32(Mask); //assert(NumTZ <= 3 && "Invalid IT mask!"); unsigned Pos, e; for (Pos = 3, e = NumTZ; Pos > e; --Pos) { bool T = ((Mask >> Pos) & 1) == CondBit0; if (T) SStream_concat0(O, "t"); else SStream_concat0(O, "e"); } } static void printThumbAddrModeRROperand(MCInst *MI, unsigned Op, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, Op); MCOperand *MO2 = MCInst_getOperand(MI, Op + 1); unsigned RegNum; if (!MCOperand_isReg(MO1)) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, Op, O); return; } SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); RegNum = MCOperand_getReg(MO2); if (RegNum) { SStream_concat0(O, ", "); printRegName(MI->csh, O, RegNum); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = RegNum; } SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printThumbAddrModeImm5SOperand(MCInst *MI, unsigned Op, SStream *O, unsigned Scale) { MCOperand *MO1 = MCInst_getOperand(MI, Op); MCOperand *MO2 = MCInst_getOperand(MI, Op + 1); unsigned ImmOffs, tmp; if (!MCOperand_isReg(MO1)) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, Op, O); return; } SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); ImmOffs = (unsigned int)MCOperand_getImm(MO2); if (ImmOffs) { tmp = ImmOffs * Scale; SStream_concat0(O, ", "); printUInt32Bang(O, tmp); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = tmp; } SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printThumbAddrModeImm5S1Operand(MCInst *MI, unsigned Op, SStream *O) { printThumbAddrModeImm5SOperand(MI, Op, O, 1); } static void printThumbAddrModeImm5S2Operand(MCInst *MI, unsigned Op, SStream *O) { printThumbAddrModeImm5SOperand(MI, Op, O, 2); } static void printThumbAddrModeImm5S4Operand(MCInst *MI, unsigned Op, SStream *O) { printThumbAddrModeImm5SOperand(MI, Op, O, 4); } static void printThumbAddrModeSPOperand(MCInst *MI, unsigned Op, SStream *O) { printThumbAddrModeImm5SOperand(MI, Op, O, 4); } // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2 // register with shift forms. // REG 0 0 - e.g. R5 // REG IMM, SH_OPC - e.g. R5, LSL #3 static void printT2SOOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); unsigned Reg = MCOperand_getReg(MO1); printRegName(MI->csh, O, Reg); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ; MI->flat_insn->detail->arm.op_count++; } // Print the shift opc. //assert(MO2.isImm() && "Not a valid t2_so_reg value!"); printRegImmShift(MI, O, ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO2)), getSORegOffset((unsigned int)MCOperand_getImm(MO2))); } static void printAddrModeImm12Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); int32_t OffImm; bool isSub; if (!MCOperand_isReg(MO1)) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, OpNum, O); return; } SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); OffImm = (int32_t)MCOperand_getImm(MO2); isSub = OffImm < 0; // Special value for #-0. All others are normal. if (OffImm == INT32_MIN) OffImm = 0; if (isSub) { if (OffImm < -HEX_THRESHOLD) SStream_concat(O, ", #-0x%x", -OffImm); else SStream_concat(O, ", #-%u", -OffImm); } else if (AlwaysPrintImm0 || OffImm > 0) { if (OffImm >= 0) { if (OffImm > HEX_THRESHOLD) SStream_concat(O, ", #0x%x", OffImm); else SStream_concat(O, ", #%u", OffImm); } else { if (OffImm < -HEX_THRESHOLD) SStream_concat(O, ", #-0x%x", -OffImm); else SStream_concat(O, ", #-%u", -OffImm); } } if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = OffImm; SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printT2AddrModeImm8Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); int32_t OffImm; bool isSub; SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); OffImm = (int32_t)MCOperand_getImm(MO2); isSub = OffImm < 0; // Don't print +0. if (OffImm == INT32_MIN) OffImm = 0; if (isSub) SStream_concat(O, ", #-0x%x", -OffImm); else if (AlwaysPrintImm0 || OffImm > 0) { if (OffImm > HEX_THRESHOLD) SStream_concat(O, ", #0x%x", OffImm); else SStream_concat(O, ", #%u", OffImm); } if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = OffImm; SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printT2AddrModeImm8s4Operand(MCInst *MI, unsigned OpNum, SStream *O, bool AlwaysPrintImm0) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); int32_t OffImm; bool isSub; if (!MCOperand_isReg(MO1)) { // For label symbolic references. printOperand(MI, OpNum, O); return; } SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); OffImm = (int32_t)MCOperand_getImm(MO2); isSub = OffImm < 0; //assert(((OffImm & 0x3) == 0) && "Not a valid immediate!"); // Don't print +0. if (OffImm == INT32_MIN) OffImm = 0; if (isSub) { SStream_concat(O, ", #-0x%x", -OffImm); } else if (AlwaysPrintImm0 || OffImm > 0) { if (OffImm > HEX_THRESHOLD) SStream_concat(O, ", #0x%x", OffImm); else SStream_concat(O, ", #%u", OffImm); } if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = OffImm; SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printT2AddrModeImm0_1020s4Operand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); unsigned tmp; SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); if (MCOperand_getImm(MO2)) { SStream_concat0(O, ", "); tmp = (unsigned int)MCOperand_getImm(MO2) * 4; printUInt32Bang(O, tmp); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = tmp; } SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printT2AddrModeImm8OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); int32_t OffImm = (int32_t)MCOperand_getImm(MO1); SStream_concat0(O, ", "); if (OffImm == INT32_MIN) { SStream_concat0(O, "#-0"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = 0; MI->flat_insn->detail->arm.op_count++; } } else { printInt32Bang(O, OffImm); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = OffImm; MI->flat_insn->detail->arm.op_count++; } } } static void printT2AddrModeImm8s4OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); int32_t OffImm = (int32_t)MCOperand_getImm(MO1); //assert(((OffImm & 0x3) == 0) && "Not a valid immediate!"); SStream_concat0(O, ", "); if (OffImm == INT32_MIN) { SStream_concat0(O, "#-0"); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = 0; MI->flat_insn->detail->arm.op_count++; } } else { printInt32Bang(O, OffImm); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = OffImm; MI->flat_insn->detail->arm.op_count++; } } } static void printT2AddrModeSoRegOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO1 = MCInst_getOperand(MI, OpNum); MCOperand *MO2 = MCInst_getOperand(MI, OpNum+1); MCOperand *MO3 = MCInst_getOperand(MI, OpNum+2); unsigned ShAmt; SStream_concat0(O, "["); set_mem_access(MI, true); printRegName(MI->csh, O, MCOperand_getReg(MO1)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = MCOperand_getReg(MO1); //assert(MCOperand_getReg(MO2.getReg() && "Invalid so_reg load / store address!"); SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MO2)); if (MI->csh->detail) MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = MCOperand_getReg(MO2); ShAmt = (unsigned int)MCOperand_getImm(MO3); if (ShAmt) { //assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); SStream_concat0(O, ", lsl "); SStream_concat(O, "#%d", ShAmt); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = ARM_SFT_LSL; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = ShAmt; } } SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point SStream_concat(O, "#"); #else SStream_concat(O, "#%e", getFPImmFloat((unsigned int)MCOperand_getImm(MO))); #endif if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_FP; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].fp = getFPImmFloat((unsigned int)MCOperand_getImm(MO)); MI->flat_insn->detail->arm.op_count++; } } static void printNEONModImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { unsigned EncodedImm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); unsigned EltBits; uint64_t Val = ARM_AM_decodeNEONModImm(EncodedImm, &EltBits); if (Val > HEX_THRESHOLD) SStream_concat(O, "#0x%"PRIx64, Val); else SStream_concat(O, "#%"PRIu64, Val); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = (unsigned int)Val; MI->flat_insn->detail->arm.op_count++; } } static void printImmPlusOneOperand(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); printUInt32Bang(O, Imm + 1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = Imm + 1; MI->flat_insn->detail->arm.op_count++; } } static void printRotImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); if (Imm == 0) return; SStream_concat0(O, ", ror #"); switch (Imm) { default: //assert (0 && "illegal ror immediate!"); case 1: SStream_concat0(O, "8"); break; case 2: SStream_concat0(O, "16"); break; case 3: SStream_concat0(O, "24"); break; } if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = ARM_SFT_ROR; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = Imm * 8; } } static void printModImmOperand(MCInst *MI, unsigned OpNum, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNum); unsigned Bits = MCOperand_getImm(Op) & 0xFF; unsigned Rot = (MCOperand_getImm(Op) & 0xF00) >> 7; int32_t Rotated; bool PrintUnsigned = false; switch (MCInst_getOpcode(MI)) { case ARM_MOVi: // Movs to PC should be treated unsigned PrintUnsigned = (MCOperand_getReg(MCInst_getOperand(MI, OpNum - 1)) == ARM_PC); break; case ARM_MSRi: // Movs to special registers should be treated unsigned PrintUnsigned = true; break; } Rotated = rotr32(Bits, Rot); if (getSOImmVal(Rotated) == MCOperand_getImm(Op)) { // #rot has the least possible value if (PrintUnsigned) { if (Rotated > HEX_THRESHOLD || Rotated < -HEX_THRESHOLD) SStream_concat(O, "#0x%x", Rotated); else SStream_concat(O, "#%u", Rotated); } else if (Rotated >= 0) { if (Rotated > HEX_THRESHOLD) SStream_concat(O, "#0x%x", Rotated); else SStream_concat(O, "#%u", Rotated); } else { SStream_concat(O, "#0x%x", Rotated); } if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = Rotated; MI->flat_insn->detail->arm.op_count++; } return; } // Explicit #bits, #rot implied SStream_concat(O, "#%u, #%u", Bits, Rot); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = Bits; MI->flat_insn->detail->arm.op_count++; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = Rot; MI->flat_insn->detail->arm.op_count++; } } static void printFBits16(MCInst *MI, unsigned OpNum, SStream *O) { unsigned tmp; tmp = 16 - (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); printUInt32Bang(O, tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = tmp; MI->flat_insn->detail->arm.op_count++; } } static void printFBits32(MCInst *MI, unsigned OpNum, SStream *O) { unsigned tmp; tmp = 32 - (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); printUInt32Bang(O, tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = tmp; MI->flat_insn->detail->arm.op_count++; } } static void printVectorIndex(MCInst *MI, unsigned OpNum, SStream *O) { unsigned tmp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); if (tmp > HEX_THRESHOLD) SStream_concat(O, "[0x%x]", tmp); else SStream_concat(O, "[%u]", tmp); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].vector_index = tmp; } } static void printVectorListOne(MCInst *MI, unsigned OpNum, SStream *O) { SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } SStream_concat0(O, "}"); } static void printVectorListTwo(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI) { #ifndef CAPSTONE_DIET uint8_t access; #endif unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); unsigned Reg0 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_0); unsigned Reg1 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_1); #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif SStream_concat0(O, "{"); printRegName(MI->csh, O, Reg0); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg0; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, Reg1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListTwoSpaced(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI) { #ifndef CAPSTONE_DIET uint8_t access; #endif unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); unsigned Reg0 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_0); unsigned Reg1 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_2); #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif SStream_concat0(O, "{"); printRegName(MI->csh, O, Reg0); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg0; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, Reg1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListThree(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListFour(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListOneAllLanes(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListTwoAllLanes(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI) { #ifndef CAPSTONE_DIET uint8_t access; #endif unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); unsigned Reg0 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_0); unsigned Reg1 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_1); #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif SStream_concat0(O, "{"); printRegName(MI->csh, O, Reg0); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg0; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, Reg1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListThreeAllLanes(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListFourAllLanes(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListTwoSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI) { #ifndef CAPSTONE_DIET uint8_t access; #endif unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); unsigned Reg0 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_0); unsigned Reg1 = MCRegisterInfo_getSubReg(MRI, Reg, ARM_dsub_2); #ifndef CAPSTONE_DIET access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif SStream_concat0(O, "{"); printRegName(MI->csh, O, Reg0); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg0; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, Reg1); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = Reg1; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListThreeSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListFourSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[], "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "[]}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListThreeSpaced(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } static void printVectorListFourSpaced(MCInst *MI, unsigned OpNum, SStream *O) { #ifndef CAPSTONE_DIET uint8_t access; access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx); #endif // Normally, it's not safe to use register enum values directly with // addition to get the next register, but for VFP registers, the // sort order is guaranteed because they're all of the form D. SStream_concat0(O, "{"); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum))); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, ", "); printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6); if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6; #ifndef CAPSTONE_DIET MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = access; #endif MI->flat_insn->detail->arm.op_count++; } SStream_concat0(O, "}"); #ifndef CAPSTONE_DIET MI->ac_idx++; #endif } void ARM_addVectorDataType(MCInst *MI, arm_vectordata_type vd) { if (MI->csh->detail) { MI->flat_insn->detail->arm.vector_data = vd; } } void ARM_addVectorDataSize(MCInst *MI, int size) { if (MI->csh->detail) { MI->flat_insn->detail->arm.vector_size = size; } } void ARM_addReg(MCInst *MI, int reg) { if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = reg; MI->flat_insn->detail->arm.op_count++; } } void ARM_addUserMode(MCInst *MI) { if (MI->csh->detail) { MI->flat_insn->detail->arm.usermode = true; } } void ARM_addSysReg(MCInst *MI, arm_sysreg reg) { if (MI->csh->detail) { MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_SYSREG; MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = reg; MI->flat_insn->detail->arm.op_count++; } } #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMInstPrinter.h010066400017500001750000000024111363402546700206160ustar0000000000000000//===- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax -*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an ARM MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_ARMINSTPRINTER_H #define CS_ARMINSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void ARM_printInst(MCInst *MI, SStream *O, void *Info); void ARM_post_printer(csh handle, cs_insn *pub_insn, char *mnem, MCInst *mci); // setup handle->get_regname void ARM_getRegName(cs_struct *handle, int value); // specify vector data type for vector instructions void ARM_addVectorDataType(MCInst *MI, arm_vectordata_type vd); void ARM_addVectorDataSize(MCInst *MI, int size); void ARM_addReg(MCInst *MI, int reg); // load usermode registers (LDM, STM) void ARM_addUserMode(MCInst *MI); // sysreg for MRS/MSR void ARM_addSysReg(MCInst *MI, arm_sysreg reg); #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMMapping.c010066400017500001750000000576671363402546700177520ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_ARM #include // debug #include #include "../../cs_priv.h" #include "ARMMapping.h" #define GET_INSTRINFO_ENUM #include "ARMGenInstrInfo.inc" #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { ARM_REG_INVALID, NULL }, { ARM_REG_APSR, "apsr"}, { ARM_REG_APSR_NZCV, "apsr_nzcv"}, { ARM_REG_CPSR, "cpsr"}, { ARM_REG_FPEXC, "fpexc"}, { ARM_REG_FPINST, "fpinst"}, { ARM_REG_FPSCR, "fpscr"}, { ARM_REG_FPSCR_NZCV, "fpscr_nzcv"}, { ARM_REG_FPSID, "fpsid"}, { ARM_REG_ITSTATE, "itstate"}, { ARM_REG_LR, "lr"}, { ARM_REG_PC, "pc"}, { ARM_REG_SP, "sp"}, { ARM_REG_SPSR, "spsr"}, { ARM_REG_D0, "d0"}, { ARM_REG_D1, "d1"}, { ARM_REG_D2, "d2"}, { ARM_REG_D3, "d3"}, { ARM_REG_D4, "d4"}, { ARM_REG_D5, "d5"}, { ARM_REG_D6, "d6"}, { ARM_REG_D7, "d7"}, { ARM_REG_D8, "d8"}, { ARM_REG_D9, "d9"}, { ARM_REG_D10, "d10"}, { ARM_REG_D11, "d11"}, { ARM_REG_D12, "d12"}, { ARM_REG_D13, "d13"}, { ARM_REG_D14, "d14"}, { ARM_REG_D15, "d15"}, { ARM_REG_D16, "d16"}, { ARM_REG_D17, "d17"}, { ARM_REG_D18, "d18"}, { ARM_REG_D19, "d19"}, { ARM_REG_D20, "d20"}, { ARM_REG_D21, "d21"}, { ARM_REG_D22, "d22"}, { ARM_REG_D23, "d23"}, { ARM_REG_D24, "d24"}, { ARM_REG_D25, "d25"}, { ARM_REG_D26, "d26"}, { ARM_REG_D27, "d27"}, { ARM_REG_D28, "d28"}, { ARM_REG_D29, "d29"}, { ARM_REG_D30, "d30"}, { ARM_REG_D31, "d31"}, { ARM_REG_FPINST2, "fpinst2"}, { ARM_REG_MVFR0, "mvfr0"}, { ARM_REG_MVFR1, "mvfr1"}, { ARM_REG_MVFR2, "mvfr2"}, { ARM_REG_Q0, "q0"}, { ARM_REG_Q1, "q1"}, { ARM_REG_Q2, "q2"}, { ARM_REG_Q3, "q3"}, { ARM_REG_Q4, "q4"}, { ARM_REG_Q5, "q5"}, { ARM_REG_Q6, "q6"}, { ARM_REG_Q7, "q7"}, { ARM_REG_Q8, "q8"}, { ARM_REG_Q9, "q9"}, { ARM_REG_Q10, "q10"}, { ARM_REG_Q11, "q11"}, { ARM_REG_Q12, "q12"}, { ARM_REG_Q13, "q13"}, { ARM_REG_Q14, "q14"}, { ARM_REG_Q15, "q15"}, { ARM_REG_R0, "r0"}, { ARM_REG_R1, "r1"}, { ARM_REG_R2, "r2"}, { ARM_REG_R3, "r3"}, { ARM_REG_R4, "r4"}, { ARM_REG_R5, "r5"}, { ARM_REG_R6, "r6"}, { ARM_REG_R7, "r7"}, { ARM_REG_R8, "r8"}, { ARM_REG_R9, "sb"}, { ARM_REG_R10, "sl"}, { ARM_REG_R11, "fp"}, { ARM_REG_R12, "ip"}, { ARM_REG_S0, "s0"}, { ARM_REG_S1, "s1"}, { ARM_REG_S2, "s2"}, { ARM_REG_S3, "s3"}, { ARM_REG_S4, "s4"}, { ARM_REG_S5, "s5"}, { ARM_REG_S6, "s6"}, { ARM_REG_S7, "s7"}, { ARM_REG_S8, "s8"}, { ARM_REG_S9, "s9"}, { ARM_REG_S10, "s10"}, { ARM_REG_S11, "s11"}, { ARM_REG_S12, "s12"}, { ARM_REG_S13, "s13"}, { ARM_REG_S14, "s14"}, { ARM_REG_S15, "s15"}, { ARM_REG_S16, "s16"}, { ARM_REG_S17, "s17"}, { ARM_REG_S18, "s18"}, { ARM_REG_S19, "s19"}, { ARM_REG_S20, "s20"}, { ARM_REG_S21, "s21"}, { ARM_REG_S22, "s22"}, { ARM_REG_S23, "s23"}, { ARM_REG_S24, "s24"}, { ARM_REG_S25, "s25"}, { ARM_REG_S26, "s26"}, { ARM_REG_S27, "s27"}, { ARM_REG_S28, "s28"}, { ARM_REG_S29, "s29"}, { ARM_REG_S30, "s30"}, { ARM_REG_S31, "s31"}, }; static const name_map reg_name_maps2[] = { { ARM_REG_INVALID, NULL }, { ARM_REG_APSR, "apsr"}, { ARM_REG_APSR_NZCV, "apsr_nzcv"}, { ARM_REG_CPSR, "cpsr"}, { ARM_REG_FPEXC, "fpexc"}, { ARM_REG_FPINST, "fpinst"}, { ARM_REG_FPSCR, "fpscr"}, { ARM_REG_FPSCR_NZCV, "fpscr_nzcv"}, { ARM_REG_FPSID, "fpsid"}, { ARM_REG_ITSTATE, "itstate"}, { ARM_REG_LR, "lr"}, { ARM_REG_PC, "pc"}, { ARM_REG_SP, "sp"}, { ARM_REG_SPSR, "spsr"}, { ARM_REG_D0, "d0"}, { ARM_REG_D1, "d1"}, { ARM_REG_D2, "d2"}, { ARM_REG_D3, "d3"}, { ARM_REG_D4, "d4"}, { ARM_REG_D5, "d5"}, { ARM_REG_D6, "d6"}, { ARM_REG_D7, "d7"}, { ARM_REG_D8, "d8"}, { ARM_REG_D9, "d9"}, { ARM_REG_D10, "d10"}, { ARM_REG_D11, "d11"}, { ARM_REG_D12, "d12"}, { ARM_REG_D13, "d13"}, { ARM_REG_D14, "d14"}, { ARM_REG_D15, "d15"}, { ARM_REG_D16, "d16"}, { ARM_REG_D17, "d17"}, { ARM_REG_D18, "d18"}, { ARM_REG_D19, "d19"}, { ARM_REG_D20, "d20"}, { ARM_REG_D21, "d21"}, { ARM_REG_D22, "d22"}, { ARM_REG_D23, "d23"}, { ARM_REG_D24, "d24"}, { ARM_REG_D25, "d25"}, { ARM_REG_D26, "d26"}, { ARM_REG_D27, "d27"}, { ARM_REG_D28, "d28"}, { ARM_REG_D29, "d29"}, { ARM_REG_D30, "d30"}, { ARM_REG_D31, "d31"}, { ARM_REG_FPINST2, "fpinst2"}, { ARM_REG_MVFR0, "mvfr0"}, { ARM_REG_MVFR1, "mvfr1"}, { ARM_REG_MVFR2, "mvfr2"}, { ARM_REG_Q0, "q0"}, { ARM_REG_Q1, "q1"}, { ARM_REG_Q2, "q2"}, { ARM_REG_Q3, "q3"}, { ARM_REG_Q4, "q4"}, { ARM_REG_Q5, "q5"}, { ARM_REG_Q6, "q6"}, { ARM_REG_Q7, "q7"}, { ARM_REG_Q8, "q8"}, { ARM_REG_Q9, "q9"}, { ARM_REG_Q10, "q10"}, { ARM_REG_Q11, "q11"}, { ARM_REG_Q12, "q12"}, { ARM_REG_Q13, "q13"}, { ARM_REG_Q14, "q14"}, { ARM_REG_Q15, "q15"}, { ARM_REG_R0, "r0"}, { ARM_REG_R1, "r1"}, { ARM_REG_R2, "r2"}, { ARM_REG_R3, "r3"}, { ARM_REG_R4, "r4"}, { ARM_REG_R5, "r5"}, { ARM_REG_R6, "r6"}, { ARM_REG_R7, "r7"}, { ARM_REG_R8, "r8"}, { ARM_REG_R9, "r9"}, { ARM_REG_R10, "r10"}, { ARM_REG_R11, "r11"}, { ARM_REG_R12, "r12"}, { ARM_REG_S0, "s0"}, { ARM_REG_S1, "s1"}, { ARM_REG_S2, "s2"}, { ARM_REG_S3, "s3"}, { ARM_REG_S4, "s4"}, { ARM_REG_S5, "s5"}, { ARM_REG_S6, "s6"}, { ARM_REG_S7, "s7"}, { ARM_REG_S8, "s8"}, { ARM_REG_S9, "s9"}, { ARM_REG_S10, "s10"}, { ARM_REG_S11, "s11"}, { ARM_REG_S12, "s12"}, { ARM_REG_S13, "s13"}, { ARM_REG_S14, "s14"}, { ARM_REG_S15, "s15"}, { ARM_REG_S16, "s16"}, { ARM_REG_S17, "s17"}, { ARM_REG_S18, "s18"}, { ARM_REG_S19, "s19"}, { ARM_REG_S20, "s20"}, { ARM_REG_S21, "s21"}, { ARM_REG_S22, "s22"}, { ARM_REG_S23, "s23"}, { ARM_REG_S24, "s24"}, { ARM_REG_S25, "s25"}, { ARM_REG_S26, "s26"}, { ARM_REG_S27, "s27"}, { ARM_REG_S28, "s28"}, { ARM_REG_S29, "s29"}, { ARM_REG_S30, "s30"}, { ARM_REG_S31, "s31"}, }; #endif const char *ARM_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } const char *ARM_reg_name2(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps2)) return NULL; return reg_name_maps2[reg].name; #else return NULL; #endif } static const insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "ARMMappingInsn.inc" }; void ARM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); //printf(">> id = %u\n", id); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET cs_struct handle; handle.detail = h->detail; memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); insn->detail->arm.update_flags = cs_reg_write((csh)&handle, insn, ARM_REG_CPSR); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = ARM_GRP_JUMP; insn->detail->groups_count++; } #endif } } } #ifndef CAPSTONE_DIET static const name_map insn_name_maps[] = { { ARM_INS_INVALID, NULL }, { ARM_INS_ADC, "adc" }, { ARM_INS_ADD, "add" }, { ARM_INS_ADR, "adr" }, { ARM_INS_AESD, "aesd" }, { ARM_INS_AESE, "aese" }, { ARM_INS_AESIMC, "aesimc" }, { ARM_INS_AESMC, "aesmc" }, { ARM_INS_AND, "and" }, { ARM_INS_BFC, "bfc" }, { ARM_INS_BFI, "bfi" }, { ARM_INS_BIC, "bic" }, { ARM_INS_BKPT, "bkpt" }, { ARM_INS_BL, "bl" }, { ARM_INS_BLX, "blx" }, { ARM_INS_BX, "bx" }, { ARM_INS_BXJ, "bxj" }, { ARM_INS_B, "b" }, { ARM_INS_CDP, "cdp" }, { ARM_INS_CDP2, "cdp2" }, { ARM_INS_CLREX, "clrex" }, { ARM_INS_CLZ, "clz" }, { ARM_INS_CMN, "cmn" }, { ARM_INS_CMP, "cmp" }, { ARM_INS_CPS, "cps" }, { ARM_INS_CRC32B, "crc32b" }, { ARM_INS_CRC32CB, "crc32cb" }, { ARM_INS_CRC32CH, "crc32ch" }, { ARM_INS_CRC32CW, "crc32cw" }, { ARM_INS_CRC32H, "crc32h" }, { ARM_INS_CRC32W, "crc32w" }, { ARM_INS_DBG, "dbg" }, { ARM_INS_DMB, "dmb" }, { ARM_INS_DSB, "dsb" }, { ARM_INS_EOR, "eor" }, { ARM_INS_ERET, "eret" }, { ARM_INS_VMOV, "vmov" }, { ARM_INS_FLDMDBX, "fldmdbx" }, { ARM_INS_FLDMIAX, "fldmiax" }, { ARM_INS_VMRS, "vmrs" }, { ARM_INS_FSTMDBX, "fstmdbx" }, { ARM_INS_FSTMIAX, "fstmiax" }, { ARM_INS_HINT, "hint" }, { ARM_INS_HLT, "hlt" }, { ARM_INS_HVC, "hvc" }, { ARM_INS_ISB, "isb" }, { ARM_INS_LDA, "lda" }, { ARM_INS_LDAB, "ldab" }, { ARM_INS_LDAEX, "ldaex" }, { ARM_INS_LDAEXB, "ldaexb" }, { ARM_INS_LDAEXD, "ldaexd" }, { ARM_INS_LDAEXH, "ldaexh" }, { ARM_INS_LDAH, "ldah" }, { ARM_INS_LDC2L, "ldc2l" }, { ARM_INS_LDC2, "ldc2" }, { ARM_INS_LDCL, "ldcl" }, { ARM_INS_LDC, "ldc" }, { ARM_INS_LDMDA, "ldmda" }, { ARM_INS_LDMDB, "ldmdb" }, { ARM_INS_LDM, "ldm" }, { ARM_INS_LDMIB, "ldmib" }, { ARM_INS_LDRBT, "ldrbt" }, { ARM_INS_LDRB, "ldrb" }, { ARM_INS_LDRD, "ldrd" }, { ARM_INS_LDREX, "ldrex" }, { ARM_INS_LDREXB, "ldrexb" }, { ARM_INS_LDREXD, "ldrexd" }, { ARM_INS_LDREXH, "ldrexh" }, { ARM_INS_LDRH, "ldrh" }, { ARM_INS_LDRHT, "ldrht" }, { ARM_INS_LDRSB, "ldrsb" }, { ARM_INS_LDRSBT, "ldrsbt" }, { ARM_INS_LDRSH, "ldrsh" }, { ARM_INS_LDRSHT, "ldrsht" }, { ARM_INS_LDRT, "ldrt" }, { ARM_INS_LDR, "ldr" }, { ARM_INS_MCR, "mcr" }, { ARM_INS_MCR2, "mcr2" }, { ARM_INS_MCRR, "mcrr" }, { ARM_INS_MCRR2, "mcrr2" }, { ARM_INS_MLA, "mla" }, { ARM_INS_MLS, "mls" }, { ARM_INS_MOV, "mov" }, { ARM_INS_MOVT, "movt" }, { ARM_INS_MOVW, "movw" }, { ARM_INS_MRC, "mrc" }, { ARM_INS_MRC2, "mrc2" }, { ARM_INS_MRRC, "mrrc" }, { ARM_INS_MRRC2, "mrrc2" }, { ARM_INS_MRS, "mrs" }, { ARM_INS_MSR, "msr" }, { ARM_INS_MUL, "mul" }, { ARM_INS_MVN, "mvn" }, { ARM_INS_ORR, "orr" }, { ARM_INS_PKHBT, "pkhbt" }, { ARM_INS_PKHTB, "pkhtb" }, { ARM_INS_PLDW, "pldw" }, { ARM_INS_PLD, "pld" }, { ARM_INS_PLI, "pli" }, { ARM_INS_QADD, "qadd" }, { ARM_INS_QADD16, "qadd16" }, { ARM_INS_QADD8, "qadd8" }, { ARM_INS_QASX, "qasx" }, { ARM_INS_QDADD, "qdadd" }, { ARM_INS_QDSUB, "qdsub" }, { ARM_INS_QSAX, "qsax" }, { ARM_INS_QSUB, "qsub" }, { ARM_INS_QSUB16, "qsub16" }, { ARM_INS_QSUB8, "qsub8" }, { ARM_INS_RBIT, "rbit" }, { ARM_INS_REV, "rev" }, { ARM_INS_REV16, "rev16" }, { ARM_INS_REVSH, "revsh" }, { ARM_INS_RFEDA, "rfeda" }, { ARM_INS_RFEDB, "rfedb" }, { ARM_INS_RFEIA, "rfeia" }, { ARM_INS_RFEIB, "rfeib" }, { ARM_INS_RSB, "rsb" }, { ARM_INS_RSC, "rsc" }, { ARM_INS_SADD16, "sadd16" }, { ARM_INS_SADD8, "sadd8" }, { ARM_INS_SASX, "sasx" }, { ARM_INS_SBC, "sbc" }, { ARM_INS_SBFX, "sbfx" }, { ARM_INS_SDIV, "sdiv" }, { ARM_INS_SEL, "sel" }, { ARM_INS_SETEND, "setend" }, { ARM_INS_SHA1C, "sha1c" }, { ARM_INS_SHA1H, "sha1h" }, { ARM_INS_SHA1M, "sha1m" }, { ARM_INS_SHA1P, "sha1p" }, { ARM_INS_SHA1SU0, "sha1su0" }, { ARM_INS_SHA1SU1, "sha1su1" }, { ARM_INS_SHA256H, "sha256h" }, { ARM_INS_SHA256H2, "sha256h2" }, { ARM_INS_SHA256SU0, "sha256su0" }, { ARM_INS_SHA256SU1, "sha256su1" }, { ARM_INS_SHADD16, "shadd16" }, { ARM_INS_SHADD8, "shadd8" }, { ARM_INS_SHASX, "shasx" }, { ARM_INS_SHSAX, "shsax" }, { ARM_INS_SHSUB16, "shsub16" }, { ARM_INS_SHSUB8, "shsub8" }, { ARM_INS_SMC, "smc" }, { ARM_INS_SMLABB, "smlabb" }, { ARM_INS_SMLABT, "smlabt" }, { ARM_INS_SMLAD, "smlad" }, { ARM_INS_SMLADX, "smladx" }, { ARM_INS_SMLAL, "smlal" }, { ARM_INS_SMLALBB, "smlalbb" }, { ARM_INS_SMLALBT, "smlalbt" }, { ARM_INS_SMLALD, "smlald" }, { ARM_INS_SMLALDX, "smlaldx" }, { ARM_INS_SMLALTB, "smlaltb" }, { ARM_INS_SMLALTT, "smlaltt" }, { ARM_INS_SMLATB, "smlatb" }, { ARM_INS_SMLATT, "smlatt" }, { ARM_INS_SMLAWB, "smlawb" }, { ARM_INS_SMLAWT, "smlawt" }, { ARM_INS_SMLSD, "smlsd" }, { ARM_INS_SMLSDX, "smlsdx" }, { ARM_INS_SMLSLD, "smlsld" }, { ARM_INS_SMLSLDX, "smlsldx" }, { ARM_INS_SMMLA, "smmla" }, { ARM_INS_SMMLAR, "smmlar" }, { ARM_INS_SMMLS, "smmls" }, { ARM_INS_SMMLSR, "smmlsr" }, { ARM_INS_SMMUL, "smmul" }, { ARM_INS_SMMULR, "smmulr" }, { ARM_INS_SMUAD, "smuad" }, { ARM_INS_SMUADX, "smuadx" }, { ARM_INS_SMULBB, "smulbb" }, { ARM_INS_SMULBT, "smulbt" }, { ARM_INS_SMULL, "smull" }, { ARM_INS_SMULTB, "smultb" }, { ARM_INS_SMULTT, "smultt" }, { ARM_INS_SMULWB, "smulwb" }, { ARM_INS_SMULWT, "smulwt" }, { ARM_INS_SMUSD, "smusd" }, { ARM_INS_SMUSDX, "smusdx" }, { ARM_INS_SRSDA, "srsda" }, { ARM_INS_SRSDB, "srsdb" }, { ARM_INS_SRSIA, "srsia" }, { ARM_INS_SRSIB, "srsib" }, { ARM_INS_SSAT, "ssat" }, { ARM_INS_SSAT16, "ssat16" }, { ARM_INS_SSAX, "ssax" }, { ARM_INS_SSUB16, "ssub16" }, { ARM_INS_SSUB8, "ssub8" }, { ARM_INS_STC2L, "stc2l" }, { ARM_INS_STC2, "stc2" }, { ARM_INS_STCL, "stcl" }, { ARM_INS_STC, "stc" }, { ARM_INS_STL, "stl" }, { ARM_INS_STLB, "stlb" }, { ARM_INS_STLEX, "stlex" }, { ARM_INS_STLEXB, "stlexb" }, { ARM_INS_STLEXD, "stlexd" }, { ARM_INS_STLEXH, "stlexh" }, { ARM_INS_STLH, "stlh" }, { ARM_INS_STMDA, "stmda" }, { ARM_INS_STMDB, "stmdb" }, { ARM_INS_STM, "stm" }, { ARM_INS_STMIB, "stmib" }, { ARM_INS_STRBT, "strbt" }, { ARM_INS_STRB, "strb" }, { ARM_INS_STRD, "strd" }, { ARM_INS_STREX, "strex" }, { ARM_INS_STREXB, "strexb" }, { ARM_INS_STREXD, "strexd" }, { ARM_INS_STREXH, "strexh" }, { ARM_INS_STRH, "strh" }, { ARM_INS_STRHT, "strht" }, { ARM_INS_STRT, "strt" }, { ARM_INS_STR, "str" }, { ARM_INS_SUB, "sub" }, { ARM_INS_SVC, "svc" }, { ARM_INS_SWP, "swp" }, { ARM_INS_SWPB, "swpb" }, { ARM_INS_SXTAB, "sxtab" }, { ARM_INS_SXTAB16, "sxtab16" }, { ARM_INS_SXTAH, "sxtah" }, { ARM_INS_SXTB, "sxtb" }, { ARM_INS_SXTB16, "sxtb16" }, { ARM_INS_SXTH, "sxth" }, { ARM_INS_TEQ, "teq" }, { ARM_INS_TRAP, "trap" }, { ARM_INS_TST, "tst" }, { ARM_INS_UADD16, "uadd16" }, { ARM_INS_UADD8, "uadd8" }, { ARM_INS_UASX, "uasx" }, { ARM_INS_UBFX, "ubfx" }, { ARM_INS_UDF, "udf" }, { ARM_INS_UDIV, "udiv" }, { ARM_INS_UHADD16, "uhadd16" }, { ARM_INS_UHADD8, "uhadd8" }, { ARM_INS_UHASX, "uhasx" }, { ARM_INS_UHSAX, "uhsax" }, { ARM_INS_UHSUB16, "uhsub16" }, { ARM_INS_UHSUB8, "uhsub8" }, { ARM_INS_UMAAL, "umaal" }, { ARM_INS_UMLAL, "umlal" }, { ARM_INS_UMULL, "umull" }, { ARM_INS_UQADD16, "uqadd16" }, { ARM_INS_UQADD8, "uqadd8" }, { ARM_INS_UQASX, "uqasx" }, { ARM_INS_UQSAX, "uqsax" }, { ARM_INS_UQSUB16, "uqsub16" }, { ARM_INS_UQSUB8, "uqsub8" }, { ARM_INS_USAD8, "usad8" }, { ARM_INS_USADA8, "usada8" }, { ARM_INS_USAT, "usat" }, { ARM_INS_USAT16, "usat16" }, { ARM_INS_USAX, "usax" }, { ARM_INS_USUB16, "usub16" }, { ARM_INS_USUB8, "usub8" }, { ARM_INS_UXTAB, "uxtab" }, { ARM_INS_UXTAB16, "uxtab16" }, { ARM_INS_UXTAH, "uxtah" }, { ARM_INS_UXTB, "uxtb" }, { ARM_INS_UXTB16, "uxtb16" }, { ARM_INS_UXTH, "uxth" }, { ARM_INS_VABAL, "vabal" }, { ARM_INS_VABA, "vaba" }, { ARM_INS_VABDL, "vabdl" }, { ARM_INS_VABD, "vabd" }, { ARM_INS_VABS, "vabs" }, { ARM_INS_VACGE, "vacge" }, { ARM_INS_VACGT, "vacgt" }, { ARM_INS_VADD, "vadd" }, { ARM_INS_VADDHN, "vaddhn" }, { ARM_INS_VADDL, "vaddl" }, { ARM_INS_VADDW, "vaddw" }, { ARM_INS_VAND, "vand" }, { ARM_INS_VBIC, "vbic" }, { ARM_INS_VBIF, "vbif" }, { ARM_INS_VBIT, "vbit" }, { ARM_INS_VBSL, "vbsl" }, { ARM_INS_VCEQ, "vceq" }, { ARM_INS_VCGE, "vcge" }, { ARM_INS_VCGT, "vcgt" }, { ARM_INS_VCLE, "vcle" }, { ARM_INS_VCLS, "vcls" }, { ARM_INS_VCLT, "vclt" }, { ARM_INS_VCLZ, "vclz" }, { ARM_INS_VCMP, "vcmp" }, { ARM_INS_VCMPE, "vcmpe" }, { ARM_INS_VCNT, "vcnt" }, { ARM_INS_VCVTA, "vcvta" }, { ARM_INS_VCVTB, "vcvtb" }, { ARM_INS_VCVT, "vcvt" }, { ARM_INS_VCVTM, "vcvtm" }, { ARM_INS_VCVTN, "vcvtn" }, { ARM_INS_VCVTP, "vcvtp" }, { ARM_INS_VCVTT, "vcvtt" }, { ARM_INS_VDIV, "vdiv" }, { ARM_INS_VDUP, "vdup" }, { ARM_INS_VEOR, "veor" }, { ARM_INS_VEXT, "vext" }, { ARM_INS_VFMA, "vfma" }, { ARM_INS_VFMS, "vfms" }, { ARM_INS_VFNMA, "vfnma" }, { ARM_INS_VFNMS, "vfnms" }, { ARM_INS_VHADD, "vhadd" }, { ARM_INS_VHSUB, "vhsub" }, { ARM_INS_VLD1, "vld1" }, { ARM_INS_VLD2, "vld2" }, { ARM_INS_VLD3, "vld3" }, { ARM_INS_VLD4, "vld4" }, { ARM_INS_VLDMDB, "vldmdb" }, { ARM_INS_VLDMIA, "vldmia" }, { ARM_INS_VLDR, "vldr" }, { ARM_INS_VMAXNM, "vmaxnm" }, { ARM_INS_VMAX, "vmax" }, { ARM_INS_VMINNM, "vminnm" }, { ARM_INS_VMIN, "vmin" }, { ARM_INS_VMLA, "vmla" }, { ARM_INS_VMLAL, "vmlal" }, { ARM_INS_VMLS, "vmls" }, { ARM_INS_VMLSL, "vmlsl" }, { ARM_INS_VMOVL, "vmovl" }, { ARM_INS_VMOVN, "vmovn" }, { ARM_INS_VMSR, "vmsr" }, { ARM_INS_VMUL, "vmul" }, { ARM_INS_VMULL, "vmull" }, { ARM_INS_VMVN, "vmvn" }, { ARM_INS_VNEG, "vneg" }, { ARM_INS_VNMLA, "vnmla" }, { ARM_INS_VNMLS, "vnmls" }, { ARM_INS_VNMUL, "vnmul" }, { ARM_INS_VORN, "vorn" }, { ARM_INS_VORR, "vorr" }, { ARM_INS_VPADAL, "vpadal" }, { ARM_INS_VPADDL, "vpaddl" }, { ARM_INS_VPADD, "vpadd" }, { ARM_INS_VPMAX, "vpmax" }, { ARM_INS_VPMIN, "vpmin" }, { ARM_INS_VQABS, "vqabs" }, { ARM_INS_VQADD, "vqadd" }, { ARM_INS_VQDMLAL, "vqdmlal" }, { ARM_INS_VQDMLSL, "vqdmlsl" }, { ARM_INS_VQDMULH, "vqdmulh" }, { ARM_INS_VQDMULL, "vqdmull" }, { ARM_INS_VQMOVUN, "vqmovun" }, { ARM_INS_VQMOVN, "vqmovn" }, { ARM_INS_VQNEG, "vqneg" }, { ARM_INS_VQRDMULH, "vqrdmulh" }, { ARM_INS_VQRSHL, "vqrshl" }, { ARM_INS_VQRSHRN, "vqrshrn" }, { ARM_INS_VQRSHRUN, "vqrshrun" }, { ARM_INS_VQSHL, "vqshl" }, { ARM_INS_VQSHLU, "vqshlu" }, { ARM_INS_VQSHRN, "vqshrn" }, { ARM_INS_VQSHRUN, "vqshrun" }, { ARM_INS_VQSUB, "vqsub" }, { ARM_INS_VRADDHN, "vraddhn" }, { ARM_INS_VRECPE, "vrecpe" }, { ARM_INS_VRECPS, "vrecps" }, { ARM_INS_VREV16, "vrev16" }, { ARM_INS_VREV32, "vrev32" }, { ARM_INS_VREV64, "vrev64" }, { ARM_INS_VRHADD, "vrhadd" }, { ARM_INS_VRINTA, "vrinta" }, { ARM_INS_VRINTM, "vrintm" }, { ARM_INS_VRINTN, "vrintn" }, { ARM_INS_VRINTP, "vrintp" }, { ARM_INS_VRINTR, "vrintr" }, { ARM_INS_VRINTX, "vrintx" }, { ARM_INS_VRINTZ, "vrintz" }, { ARM_INS_VRSHL, "vrshl" }, { ARM_INS_VRSHRN, "vrshrn" }, { ARM_INS_VRSHR, "vrshr" }, { ARM_INS_VRSQRTE, "vrsqrte" }, { ARM_INS_VRSQRTS, "vrsqrts" }, { ARM_INS_VRSRA, "vrsra" }, { ARM_INS_VRSUBHN, "vrsubhn" }, { ARM_INS_VSELEQ, "vseleq" }, { ARM_INS_VSELGE, "vselge" }, { ARM_INS_VSELGT, "vselgt" }, { ARM_INS_VSELVS, "vselvs" }, { ARM_INS_VSHLL, "vshll" }, { ARM_INS_VSHL, "vshl" }, { ARM_INS_VSHRN, "vshrn" }, { ARM_INS_VSHR, "vshr" }, { ARM_INS_VSLI, "vsli" }, { ARM_INS_VSQRT, "vsqrt" }, { ARM_INS_VSRA, "vsra" }, { ARM_INS_VSRI, "vsri" }, { ARM_INS_VST1, "vst1" }, { ARM_INS_VST2, "vst2" }, { ARM_INS_VST3, "vst3" }, { ARM_INS_VST4, "vst4" }, { ARM_INS_VSTMDB, "vstmdb" }, { ARM_INS_VSTMIA, "vstmia" }, { ARM_INS_VSTR, "vstr" }, { ARM_INS_VSUB, "vsub" }, { ARM_INS_VSUBHN, "vsubhn" }, { ARM_INS_VSUBL, "vsubl" }, { ARM_INS_VSUBW, "vsubw" }, { ARM_INS_VSWP, "vswp" }, { ARM_INS_VTBL, "vtbl" }, { ARM_INS_VTBX, "vtbx" }, { ARM_INS_VCVTR, "vcvtr" }, { ARM_INS_VTRN, "vtrn" }, { ARM_INS_VTST, "vtst" }, { ARM_INS_VUZP, "vuzp" }, { ARM_INS_VZIP, "vzip" }, { ARM_INS_ADDW, "addw" }, { ARM_INS_ASR, "asr" }, { ARM_INS_DCPS1, "dcps1" }, { ARM_INS_DCPS2, "dcps2" }, { ARM_INS_DCPS3, "dcps3" }, { ARM_INS_IT, "it" }, { ARM_INS_LSL, "lsl" }, { ARM_INS_LSR, "lsr" }, { ARM_INS_ORN, "orn" }, { ARM_INS_ROR, "ror" }, { ARM_INS_RRX, "rrx" }, { ARM_INS_SUBW, "subw" }, { ARM_INS_TBB, "tbb" }, { ARM_INS_TBH, "tbh" }, { ARM_INS_CBNZ, "cbnz" }, { ARM_INS_CBZ, "cbz" }, { ARM_INS_POP, "pop" }, { ARM_INS_PUSH, "push" }, // special instructions { ARM_INS_NOP, "nop" }, { ARM_INS_YIELD, "yield" }, { ARM_INS_WFE, "wfe" }, { ARM_INS_WFI, "wfi" }, { ARM_INS_SEV, "sev" }, { ARM_INS_SEVL, "sevl" }, { ARM_INS_VPUSH, "vpush" }, { ARM_INS_VPOP, "vpop" }, }; #endif const char *ARM_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET if (id >= ARM_INS_ENDING) return NULL; return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { ARM_GRP_INVALID, NULL }, { ARM_GRP_JUMP, "jump" }, { ARM_GRP_CALL, "call" }, { ARM_GRP_INT, "int" }, { ARM_GRP_PRIVILEGE, "privilege" }, { ARM_GRP_BRANCH_RELATIVE, "branch_relative" }, // architecture-specific groups { ARM_GRP_CRYPTO, "crypto" }, { ARM_GRP_DATABARRIER, "databarrier" }, { ARM_GRP_DIVIDE, "divide" }, { ARM_GRP_FPARMV8, "fparmv8" }, { ARM_GRP_MULTPRO, "multpro" }, { ARM_GRP_NEON, "neon" }, { ARM_GRP_T2EXTRACTPACK, "T2EXTRACTPACK" }, { ARM_GRP_THUMB2DSP, "THUMB2DSP" }, { ARM_GRP_TRUSTZONE, "TRUSTZONE" }, { ARM_GRP_V4T, "v4t" }, { ARM_GRP_V5T, "v5t" }, { ARM_GRP_V5TE, "v5te" }, { ARM_GRP_V6, "v6" }, { ARM_GRP_V6T2, "v6t2" }, { ARM_GRP_V7, "v7" }, { ARM_GRP_V8, "v8" }, { ARM_GRP_VFP2, "vfp2" }, { ARM_GRP_VFP3, "vfp3" }, { ARM_GRP_VFP4, "vfp4" }, { ARM_GRP_ARM, "arm" }, { ARM_GRP_MCLASS, "mclass" }, { ARM_GRP_NOTMCLASS, "notmclass" }, { ARM_GRP_THUMB, "thumb" }, { ARM_GRP_THUMB1ONLY, "thumb1only" }, { ARM_GRP_THUMB2, "thumb2" }, { ARM_GRP_PREV8, "prev8" }, { ARM_GRP_FPVMLX, "fpvmlx" }, { ARM_GRP_MULOPS, "mulops" }, { ARM_GRP_CRC, "crc" }, { ARM_GRP_DPVFP, "dpvfp" }, { ARM_GRP_V6M, "v6m" }, { ARM_GRP_VIRTUALIZATION, "virtualization" }, }; #endif const char *ARM_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // list all relative branch instructions // ie: insns[i].branch && !insns[i].indirect_branch static const unsigned int insn_rel[] = { ARM_BL, ARM_BLX_pred, ARM_Bcc, ARM_t2B, ARM_t2Bcc, ARM_tB, ARM_tBcc, ARM_tCBNZ, ARM_tCBZ, ARM_BL_pred, ARM_BLXi, ARM_tBL, ARM_tBLXi, 0 }; static const unsigned int insn_blx_rel_to_arm[] = { ARM_tBLXi, 0 }; // check if this insn is relative branch bool ARM_rel_branch(cs_struct *h, unsigned int id) { int i; for (i = 0; insn_rel[i]; i++) { if (id == insn_rel[i]) { return true; } } // not found return false; } bool ARM_blx_to_arm_mode(cs_struct *h, unsigned int id) { int i; for (i = 0; insn_blx_rel_to_arm[i]; i++) if (id == insn_blx_rel_to_arm[i]) return true; // not found return false; } #ifndef CAPSTONE_DIET // map instruction to its characteristics typedef struct insn_op { uint8_t access[7]; } insn_op; static insn_op insn_ops[] = { { // NULL item { 0 } }, #include "ARMMappingInsnOp.inc" }; // given internal insn id, return operand access info uint8_t *ARM_get_op_access(cs_struct *h, unsigned int id) { int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { return insn_ops[i].access; } return NULL; } void ARM_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count) { uint8_t i; uint8_t read_count, write_count; cs_arm *arm = &(insn->detail->arm); read_count = insn->detail->regs_read_count; write_count = insn->detail->regs_write_count; // implicit registers memcpy(regs_read, insn->detail->regs_read, read_count * sizeof(insn->detail->regs_read[0])); memcpy(regs_write, insn->detail->regs_write, write_count * sizeof(insn->detail->regs_write[0])); // explicit registers for (i = 0; i < arm->op_count; i++) { cs_arm_op *op = &(arm->operands[i]); switch((int)op->type) { case ARM_OP_REG: if ((op->access & CS_AC_READ) && !arr_exist(regs_read, read_count, op->reg)) { regs_read[read_count] = (uint16_t)op->reg; read_count++; } if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) { regs_write[write_count] = (uint16_t)op->reg; write_count++; } break; case ARM_OP_MEM: // registers appeared in memory references always being read if ((op->mem.base != ARM_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.base)) { regs_read[read_count] = (uint16_t)op->mem.base; read_count++; } if ((op->mem.index != ARM_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.index)) { regs_read[read_count] = (uint16_t)op->mem.index; read_count++; } if ((arm->writeback) && (op->mem.base != ARM_REG_INVALID) && !arr_exist(regs_write, write_count, op->mem.base)) { regs_write[write_count] = (uint16_t)op->mem.base; write_count++; } default: break; } } *regs_read_count = read_count; *regs_write_count = write_count; } #endif #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMMapping.h010066400017500001750000000017141363402546700177350ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_ARM_MAP_H #define CS_ARM_MAP_H #include "../../include/capstone/capstone.h" #include "../../utils.h" // return name of regiser in friendly string const char *ARM_reg_name(csh handle, unsigned int reg); const char *ARM_reg_name2(csh handle, unsigned int reg); // given internal insn id, return public instruction ID void ARM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *ARM_insn_name(csh handle, unsigned int id); const char *ARM_group_name(csh handle, unsigned int id); // check if this insn is relative branch bool ARM_rel_branch(cs_struct *h, unsigned int insn_id); bool ARM_blx_to_arm_mode(cs_struct *h, unsigned int insn_id); uint8_t *ARM_get_op_access(cs_struct *h, unsigned int id); void ARM_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count); #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMMappingInsn.inc010066400017500001750000007377041363402546700211260ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { ARM_ADCri, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADCrr, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADCrsi, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADCrsr, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADDri, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADDrr, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADDrsi, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADDrsr, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ADR, ARM_INS_ADR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_AESD, ARM_INS_AESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_AESE, ARM_INS_AESE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_AESIMC, ARM_INS_AESIMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_AESMC, ARM_INS_AESMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_ANDri, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ANDrr, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ANDrsi, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ANDrsr, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_BFC, ARM_INS_BFC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_BFI, ARM_INS_BFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_BICri, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_BICrr, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_BICrsi, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_BICrsr, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_BKPT, ARM_INS_BKPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_BL, ARM_INS_BL, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_GRP_ARM, 0 }, 1, 0 #endif }, { ARM_BLX, ARM_INS_BLX, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_CALL, ARM_GRP_V5T, 0 }, 0, 1 #endif }, { ARM_BLX_pred, ARM_INS_BLX, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_CALL, ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 1 #endif }, { ARM_BLXi, ARM_INS_BLX, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 1, 0 #endif }, { ARM_BL_pred, ARM_INS_BL, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_GRP_ARM, 0 }, 1, 0 #endif }, { ARM_BX, ARM_INS_BX, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 1 #endif }, { ARM_BXJ, ARM_INS_BXJ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, 0 }, 0, 1 #endif }, { ARM_BX_RET, ARM_INS_BX, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 1 #endif }, { ARM_BX_pred, ARM_INS_BX, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 1 #endif }, { ARM_Bcc, ARM_INS_B, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_ARM, 0 }, 1, 0 #endif }, { ARM_CDP, ARM_INS_CDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_CDP2, ARM_INS_CDP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_CLREX, ARM_INS_CLREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_CLZ, ARM_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0 #endif }, { ARM_CMNri, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMNzrr, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMNzrsi, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMNzrsr, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMPri, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMPrr, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMPrsi, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CMPrsr, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CPS1p, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CPS2p, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CPS3p, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_CRC32B, ARM_INS_CRC32B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_CRC32CB, ARM_INS_CRC32CB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_CRC32CH, ARM_INS_CRC32CH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_CRC32CW, ARM_INS_CRC32CW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_CRC32H, ARM_INS_CRC32H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_CRC32W, ARM_INS_CRC32W, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_DBG, ARM_INS_DBG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_DMB, ARM_INS_DMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0 #endif }, { ARM_DSB, ARM_INS_DSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0 #endif }, { ARM_EORri, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_EORrr, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_EORrsi, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_EORrsr, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ERET, ARM_INS_ERET, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_FCONSTD, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP3, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_FCONSTS, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP3, 0 }, 0, 0 #endif }, { ARM_FLDMXDB_UPD, ARM_INS_FLDMDBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_FLDMXIA, ARM_INS_FLDMIAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_FLDMXIA_UPD, ARM_INS_FLDMIAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_FMSTAT, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR_NZCV, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_FSTMXDB_UPD, ARM_INS_FSTMDBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_FSTMXIA, ARM_INS_FSTMIAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_FSTMXIA_UPD, ARM_INS_FSTMIAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_HINT, ARM_INS_HINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_HLT, ARM_INS_HLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_HVC, ARM_INS_HVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_ISB, ARM_INS_ISB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0 #endif }, { ARM_LDA, ARM_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDAB, ARM_INS_LDAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDAEX, ARM_INS_LDAEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDAEXB, ARM_INS_LDAEXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDAEXD, ARM_INS_LDAEXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDAEXH, ARM_INS_LDAEXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDAH, ARM_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_LDC2L_OFFSET, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2L_OPTION, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2L_POST, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2L_PRE, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2_OFFSET, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2_OPTION, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2_POST, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDC2_PRE, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_LDCL_OFFSET, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDCL_OPTION, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDCL_POST, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDCL_PRE, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDC_OFFSET, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDC_OPTION, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDC_POST, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDC_PRE, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMDA, ARM_INS_LDMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMDA_UPD, ARM_INS_LDMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMDB, ARM_INS_LDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMDB_UPD, ARM_INS_LDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMIA, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMIA_UPD, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMIB, ARM_INS_LDMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDMIB_UPD, ARM_INS_LDMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRBT_POST_IMM, ARM_INS_LDRBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRBT_POST_REG, ARM_INS_LDRBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRB_POST_IMM, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRB_POST_REG, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRB_PRE_IMM, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRB_PRE_REG, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRBi12, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRBrs, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRD, ARM_INS_LDRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_LDRD_POST, ARM_INS_LDRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRD_PRE, ARM_INS_LDRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDREX, ARM_INS_LDREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDREXB, ARM_INS_LDREXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDREXD, ARM_INS_LDREXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDREXH, ARM_INS_LDREXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRH, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRHTi, ARM_INS_LDRHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRHTr, ARM_INS_LDRHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRH_POST, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRH_PRE, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSB, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSBTi, ARM_INS_LDRSBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSBTr, ARM_INS_LDRSBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSB_POST, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSB_PRE, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSH, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSHTi, ARM_INS_LDRSHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSHTr, ARM_INS_LDRSHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSH_POST, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRSH_PRE, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRT_POST_IMM, ARM_INS_LDRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRT_POST_REG, ARM_INS_LDRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDR_POST_IMM, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDR_POST_REG, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDR_PRE_IMM, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDR_PRE_REG, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRcp, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRi12, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_LDRrs, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MCR, ARM_INS_MCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MCR2, ARM_INS_MCR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_MCRR, ARM_INS_MCRR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MCRR2, ARM_INS_MCRR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_MLA, ARM_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_MLS, ARM_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_MOVPCLR, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MOVTi16, ARM_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_MOVi, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MOVi16, ARM_INS_MOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_MOVr, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MOVr_TC, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MOVsi, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MOVsr, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MRC, ARM_INS_MRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MRC2, ARM_INS_MRC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_MRRC, ARM_INS_MRRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MRRC2, ARM_INS_MRRC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_MRS, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MRSbanked, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_MRSsys, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MSR, ARM_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MSRbanked, ARM_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_MSRi, ARM_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MUL, ARM_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_MVNi, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MVNr, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MVNsi, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_MVNsr, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ORRri, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ORRrr, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ORRrsi, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_ORRrsr, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_PKHBT, ARM_INS_PKHBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_PKHTB, ARM_INS_PKHTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_PLDWi12, ARM_INS_PLDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0 #endif }, { ARM_PLDWrs, ARM_INS_PLDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0 #endif }, { ARM_PLDi12, ARM_INS_PLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_PLDrs, ARM_INS_PLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_PLIi12, ARM_INS_PLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_PLIrs, ARM_INS_PLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_QADD, ARM_INS_QADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QADD16, ARM_INS_QADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QADD8, ARM_INS_QADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QASX, ARM_INS_QASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QDADD, ARM_INS_QDADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QDSUB, ARM_INS_QDSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QSAX, ARM_INS_QSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QSUB, ARM_INS_QSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QSUB16, ARM_INS_QSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_QSUB8, ARM_INS_QSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RBIT, ARM_INS_RBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_REV, ARM_INS_REV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_REV16, ARM_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_REVSH, ARM_INS_REVSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_RFEDA, ARM_INS_RFEDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEDA_UPD, ARM_INS_RFEDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEDB, ARM_INS_RFEDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEDB_UPD, ARM_INS_RFEDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEIA, ARM_INS_RFEIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEIA_UPD, ARM_INS_RFEIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEIB, ARM_INS_RFEIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RFEIB_UPD, ARM_INS_RFEIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSBri, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSBrr, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSBrsi, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSBrsr, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSCri, ARM_INS_RSC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSCrr, ARM_INS_RSC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSCrsi, ARM_INS_RSC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_RSCrsr, ARM_INS_RSC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SADD16, ARM_INS_SADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SADD8, ARM_INS_SADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SASX, ARM_INS_SASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SBCri, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SBCrr, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SBCrsi, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SBCrsr, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SBFX, ARM_INS_SBFX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_SDIV, ARM_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SEL, ARM_INS_SEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SETEND, ARM_INS_SETEND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SHA1C, ARM_INS_SHA1C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA1H, ARM_INS_SHA1H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA1M, ARM_INS_SHA1M, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA1P, ARM_INS_SHA1P, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA1SU0, ARM_INS_SHA1SU0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA1SU1, ARM_INS_SHA1SU1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA256H, ARM_INS_SHA256H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA256H2, ARM_INS_SHA256H2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA256SU0, ARM_INS_SHA256SU0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHA256SU1, ARM_INS_SHA256SU1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_SHADD16, ARM_INS_SHADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SHADD8, ARM_INS_SHADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SHASX, ARM_INS_SHASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SHSAX, ARM_INS_SHSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SHSUB16, ARM_INS_SHSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SHSUB8, ARM_INS_SHSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SMC, ARM_INS_SMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, ARM_GRP_TRUSTZONE, 0 }, 0, 0 #endif }, { ARM_SMLABB, ARM_INS_SMLABB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMLABT, ARM_INS_SMLABT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMLAD, ARM_INS_SMLAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLADX, ARM_INS_SMLADX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLAL, ARM_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLALBB, ARM_INS_SMLALBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMLALBT, ARM_INS_SMLALBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMLALD, ARM_INS_SMLALD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLALDX, ARM_INS_SMLALDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLALTB, ARM_INS_SMLALTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMLALTT, ARM_INS_SMLALTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMLATB, ARM_INS_SMLATB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMLATT, ARM_INS_SMLATT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMLAWB, ARM_INS_SMLAWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMLAWT, ARM_INS_SMLAWT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMLSD, ARM_INS_SMLSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLSDX, ARM_INS_SMLSDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLSLD, ARM_INS_SMLSLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMLSLDX, ARM_INS_SMLSLDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMMLA, ARM_INS_SMMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMMLAR, ARM_INS_SMMLAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMMLS, ARM_INS_SMMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_SMMLSR, ARM_INS_SMMLSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMMUL, ARM_INS_SMMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMMULR, ARM_INS_SMMULR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMUAD, ARM_INS_SMUAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMUADX, ARM_INS_SMUADX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMULBB, ARM_INS_SMULBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMULBT, ARM_INS_SMULBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMULL, ARM_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMULTB, ARM_INS_SMULTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMULTT, ARM_INS_SMULTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMULWB, ARM_INS_SMULWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMULWT, ARM_INS_SMULWT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_SMUSD, ARM_INS_SMUSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SMUSDX, ARM_INS_SMUSDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SRSDA, ARM_INS_SRSDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSDA_UPD, ARM_INS_SRSDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSDB, ARM_INS_SRSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSDB_UPD, ARM_INS_SRSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSIA, ARM_INS_SRSIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSIA_UPD, ARM_INS_SRSIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSIB, ARM_INS_SRSIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SRSIB_UPD, ARM_INS_SRSIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SSAT, ARM_INS_SSAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SSAT16, ARM_INS_SSAT16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SSAX, ARM_INS_SSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SSUB16, ARM_INS_SSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SSUB8, ARM_INS_SSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STC2L_OFFSET, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2L_OPTION, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2L_POST, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2L_PRE, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2_OFFSET, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2_OPTION, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2_POST, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STC2_PRE, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_STCL_OFFSET, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STCL_OPTION, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STCL_POST, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STCL_PRE, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STC_OFFSET, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STC_OPTION, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STC_POST, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STC_PRE, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STL, ARM_INS_STL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STLB, ARM_INS_STLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STLEX, ARM_INS_STLEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STLEXB, ARM_INS_STLEXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STLEXD, ARM_INS_STLEXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STLEXH, ARM_INS_STLEXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STLH, ARM_INS_STLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_STMDA, ARM_INS_STMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMDA_UPD, ARM_INS_STMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMDB, ARM_INS_STMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMDB_UPD, ARM_INS_STMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMIA, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMIA_UPD, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMIB, ARM_INS_STMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STMIB_UPD, ARM_INS_STMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRBT_POST_IMM, ARM_INS_STRBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRBT_POST_REG, ARM_INS_STRBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRB_POST_IMM, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRB_POST_REG, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRB_PRE_IMM, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRB_PRE_REG, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRBi12, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRBrs, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRD, ARM_INS_STRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0 #endif }, { ARM_STRD_POST, ARM_INS_STRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRD_PRE, ARM_INS_STRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STREX, ARM_INS_STREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STREXB, ARM_INS_STREXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STREXD, ARM_INS_STREXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STREXH, ARM_INS_STREXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRH, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRHTi, ARM_INS_STRHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRHTr, ARM_INS_STRHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRH_POST, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRH_PRE, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRT_POST_IMM, ARM_INS_STRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRT_POST_REG, ARM_INS_STRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STR_POST_IMM, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STR_POST_REG, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STR_PRE_IMM, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STR_PRE_REG, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRi12, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_STRrs, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SUBri, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SUBrr, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SUBrsi, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SUBrsr, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_SVC, ARM_INS_SVC, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_ARM, ARM_GRP_INT, 0 }, 0, 0 #endif }, { ARM_SWP, ARM_INS_SWP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_SWPB, ARM_INS_SWPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_SXTAB, ARM_INS_SXTAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SXTAB16, ARM_INS_SXTAB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SXTAH, ARM_INS_SXTAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SXTB, ARM_INS_SXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SXTB16, ARM_INS_SXTB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_SXTH, ARM_INS_SXTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_TEQri, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TEQrr, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TEQrsi, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TEQrsr, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TRAP, ARM_INS_TRAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TRAPNaCl, ARM_INS_TRAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TSTri, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TSTrr, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TSTrsi, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_TSTrsr, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UADD16, ARM_INS_UADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UADD8, ARM_INS_UADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UASX, ARM_INS_UASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UBFX, ARM_INS_UBFX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0 #endif }, { ARM_UDF, ARM_INS_UDF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UDIV, ARM_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UHADD16, ARM_INS_UHADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UHADD8, ARM_INS_UHADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UHASX, ARM_INS_UHASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UHSAX, ARM_INS_UHSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UHSUB16, ARM_INS_UHSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UHSUB8, ARM_INS_UHSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UMAAL, ARM_INS_UMAAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UMLAL, ARM_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UMULL, ARM_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UQADD16, ARM_INS_UQADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UQADD8, ARM_INS_UQADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UQASX, ARM_INS_UQASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UQSAX, ARM_INS_UQSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UQSUB16, ARM_INS_UQSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UQSUB8, ARM_INS_UQSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_USAD8, ARM_INS_USAD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_USADA8, ARM_INS_USADA8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_USAT, ARM_INS_USAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_USAT16, ARM_INS_USAT16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_USAX, ARM_INS_USAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_USUB16, ARM_INS_USUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_USUB8, ARM_INS_USUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_UXTAB, ARM_INS_UXTAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UXTAB16, ARM_INS_UXTAB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UXTAH, ARM_INS_UXTAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UXTB, ARM_INS_UXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UXTB16, ARM_INS_UXTB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_UXTH, ARM_INS_UXTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_VABALsv2i64, ARM_INS_VABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABALsv4i32, ARM_INS_VABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABALsv8i16, ARM_INS_VABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABALuv2i64, ARM_INS_VABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABALuv4i32, ARM_INS_VABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABALuv8i16, ARM_INS_VABAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAsv16i8, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAsv2i32, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAsv4i16, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAsv4i32, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAsv8i16, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAsv8i8, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAuv16i8, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAuv2i32, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAuv4i16, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAuv4i32, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAuv8i16, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABAuv8i8, ARM_INS_VABA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDLsv2i64, ARM_INS_VABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDLsv4i32, ARM_INS_VABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDLsv8i16, ARM_INS_VABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDLuv2i64, ARM_INS_VABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDLuv4i32, ARM_INS_VABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDLuv8i16, ARM_INS_VABDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDfd, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDfq, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDsv16i8, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDsv2i32, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDsv4i16, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDsv4i32, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDsv8i16, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDsv8i8, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDuv16i8, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDuv2i32, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDuv4i16, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDuv4i32, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDuv8i16, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABDuv8i8, ARM_INS_VABD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSD, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VABSS, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VABSfd, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSfq, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSv16i8, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSv2i32, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSv4i16, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSv4i32, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSv8i16, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VABSv8i8, ARM_INS_VABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VACGEd, ARM_INS_VACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VACGEq, ARM_INS_VACGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VACGTd, ARM_INS_VACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VACGTq, ARM_INS_VACGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDD, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VADDHNv2i32, ARM_INS_VADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDHNv4i16, ARM_INS_VADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDHNv8i8, ARM_INS_VADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDLsv2i64, ARM_INS_VADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDLsv4i32, ARM_INS_VADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDLsv8i16, ARM_INS_VADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDLuv2i64, ARM_INS_VADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDLuv4i32, ARM_INS_VADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDLuv8i16, ARM_INS_VADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDS, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VADDWsv2i64, ARM_INS_VADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDWsv4i32, ARM_INS_VADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDWsv8i16, ARM_INS_VADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDWuv2i64, ARM_INS_VADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDWuv4i32, ARM_INS_VADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDWuv8i16, ARM_INS_VADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDfd, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDfq, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv16i8, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv1i64, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv2i32, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv2i64, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv4i16, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv4i32, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv8i16, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VADDv8i8, ARM_INS_VADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VANDd, ARM_INS_VAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VANDq, ARM_INS_VAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBICd, ARM_INS_VBIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBICiv2i32, ARM_INS_VBIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBICiv4i16, ARM_INS_VBIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBICiv4i32, ARM_INS_VBIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBICiv8i16, ARM_INS_VBIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBICq, ARM_INS_VBIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBIFd, ARM_INS_VBIF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBIFq, ARM_INS_VBIF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBITd, ARM_INS_VBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBITq, ARM_INS_VBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBSLd, ARM_INS_VBSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VBSLq, ARM_INS_VBSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQfd, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQfq, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQv16i8, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQv2i32, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQv4i16, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQv4i32, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQv8i16, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQv8i8, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv16i8, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv2f32, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv2i32, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv4f32, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv4i16, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv4i32, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv8i16, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCEQzv8i8, ARM_INS_VCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEfd, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEfq, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEsv16i8, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEsv2i32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEsv4i16, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEsv4i32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEsv8i16, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEsv8i8, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEuv16i8, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEuv2i32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEuv4i16, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEuv4i32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEuv8i16, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEuv8i8, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv16i8, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv2f32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv2i32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv4f32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv4i16, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv4i32, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv8i16, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGEzv8i8, ARM_INS_VCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTfd, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTfq, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTsv16i8, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTsv2i32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTsv4i16, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTsv4i32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTsv8i16, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTsv8i8, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTuv16i8, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTuv2i32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTuv4i16, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTuv4i32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTuv8i16, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTuv8i8, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv16i8, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv2f32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv2i32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv4f32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv4i16, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv4i32, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv8i16, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCGTzv8i8, ARM_INS_VCGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv16i8, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv2f32, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv2i32, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv4f32, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv4i16, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv4i32, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv8i16, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLEzv8i8, ARM_INS_VCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLSv16i8, ARM_INS_VCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLSv2i32, ARM_INS_VCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLSv4i16, ARM_INS_VCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLSv4i32, ARM_INS_VCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLSv8i16, ARM_INS_VCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLSv8i8, ARM_INS_VCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv16i8, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv2f32, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv2i32, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv4f32, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv4i16, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv4i32, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv8i16, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLTzv8i8, ARM_INS_VCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLZv16i8, ARM_INS_VCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLZv2i32, ARM_INS_VCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLZv4i16, ARM_INS_VCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLZv4i32, ARM_INS_VCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLZv8i16, ARM_INS_VCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCLZv8i8, ARM_INS_VCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCMPD, ARM_INS_VCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCMPED, ARM_INS_VCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCMPES, ARM_INS_VCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCMPEZD, ARM_INS_VCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCMPEZS, ARM_INS_VCMPE, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCMPS, ARM_INS_VCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCMPZD, ARM_INS_VCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCMPZS, ARM_INS_VCMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCNTd, ARM_INS_VCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCNTq, ARM_INS_VCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTANSD, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTANSQ, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTANUD, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTANUQ, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTASD, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTASS, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTAUD, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTAUS, ARM_INS_VCVTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTBDH, ARM_INS_VCVTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTBHD, ARM_INS_VCVTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTBHS, ARM_INS_VCVTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCVTBSH, ARM_INS_VCVTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCVTDS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTMNSD, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTMNSQ, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTMNUD, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTMNUQ, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTMSD, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTMSS, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTMUD, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTMUS, ARM_INS_VCVTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTNNSD, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTNNSQ, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTNNUD, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTNNUQ, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTNSD, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTNSS, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTNUD, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTNUS, ARM_INS_VCVTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTPNSD, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTPNSQ, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTPNUD, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTPNUQ, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTPSD, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTPSS, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTPUD, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTPUS, ARM_INS_VCVTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VCVTSD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTTDH, ARM_INS_VCVTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTTHD, ARM_INS_VCVTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VCVTTHS, ARM_INS_VCVTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCVTTSH, ARM_INS_VCVTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VCVTf2h, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2sd, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2sq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2ud, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2uq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2xsd, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2xsq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2xud, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTf2xuq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTh2f, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTs2fd, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTs2fq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTu2fd, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTu2fq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTxs2fd, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTxs2fq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTxu2fd, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VCVTxu2fq, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDIVD, ARM_INS_VDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VDIVS, ARM_INS_VDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VDUP16d, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUP16q, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUP32d, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUP32q, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUP8d, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUP8q, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUPLN16d, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUPLN16q, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUPLN32d, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUPLN32q, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUPLN8d, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VDUPLN8q, ARM_INS_VDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEORd, ARM_INS_VEOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEORq, ARM_INS_VEOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTd16, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTd32, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTd8, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTq16, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTq32, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTq64, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VEXTq8, ARM_INS_VEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VFMAD, ARM_INS_VFMA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VFMAS, ARM_INS_VFMA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFMAfd, ARM_INS_VFMA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFMAfq, ARM_INS_VFMA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFMSD, ARM_INS_VFMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VFMSS, ARM_INS_VFMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFMSfd, ARM_INS_VFMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFMSfq, ARM_INS_VFMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFNMAD, ARM_INS_VFNMA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VFNMAS, ARM_INS_VFNMA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VFNMSD, ARM_INS_VFNMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VFNMSS, ARM_INS_VFNMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0 #endif }, { ARM_VGETLNi32, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VGETLNs16, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VGETLNs8, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VGETLNu16, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VGETLNu8, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDsv16i8, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDsv2i32, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDsv4i16, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDsv4i32, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDsv8i16, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDsv8i8, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDuv16i8, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDuv2i32, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDuv4i16, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDuv4i32, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDuv8i16, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHADDuv8i8, ARM_INS_VHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBsv16i8, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBsv2i32, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBsv4i16, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBsv4i32, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBsv8i16, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBsv8i8, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBuv16i8, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBuv2i32, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBuv4i16, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBuv4i32, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBuv8i16, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VHSUBuv8i8, ARM_INS_VHSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd16, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd16wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd16wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd32, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd32wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd32wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd8, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd8wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPd8wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq16, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq16wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq16wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq32, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq32wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq32wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq8, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq8wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1DUPq8wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1LNd16, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1LNd16_UPD, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1LNd32, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1LNd32_UPD, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1LNd8, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1LNd8_UPD, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16Q, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16Qwb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16Qwb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16T, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16Twb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16Twb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d16wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32Q, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32Qwb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32Qwb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32T, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32Twb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32Twb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d32wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64Q, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64Qwb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64Qwb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64T, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64Twb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64Twb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d64wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8Q, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8Qwb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8Qwb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8T, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8Twb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8Twb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1d8wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q16, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q16wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q16wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q32, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q32wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q32wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q64, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q64wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q64wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q8, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q8wb_fixed, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD1q8wb_register, ARM_INS_VLD1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd16, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd16wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd16x2, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd32, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd32wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd32x2, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd8, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd8wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd8x2, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNd16, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNd16_UPD, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNd32, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNd32_UPD, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNd8, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNd8_UPD, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNq16, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNq16_UPD, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNq32, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2LNq32_UPD, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b16, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b16wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b16wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b32, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b32wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b32wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b8, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b8wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2b8wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d16, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d16wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d16wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d32, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d32wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d32wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d8, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d8wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2d8wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q16, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q16wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q16wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q32, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q32wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q32wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q8, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q8wb_fixed, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD2q8wb_register, ARM_INS_VLD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPd16, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPd16_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPd32, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPd32_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPd8, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPd8_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPq16, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPq16_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPq32, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPq32_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPq8, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3DUPq8_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNd16, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNd16_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNd32, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNd32_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNd8, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNd8_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNq16, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNq16_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNq32, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3LNq32_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3d16, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3d16_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3d32, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3d32_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3d8, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3d8_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3q16, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3q16_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3q32, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3q32_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3q8, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD3q8_UPD, ARM_INS_VLD3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPd16, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPd16_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPd32, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPd32_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPd8, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPd8_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPq16, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPq16_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPq32, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPq32_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPq8, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4DUPq8_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNd16, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNd16_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNd32, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNd32_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNd8, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNd8_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNq16, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNq16_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNq32, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4LNq32_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4d16, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4d16_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4d32, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4d32_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4d8, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4d8_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4q16, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4q16_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4q32, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4q32_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4q8, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLD4q8_UPD, ARM_INS_VLD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VLDMDDB_UPD, ARM_INS_VLDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDMDIA, ARM_INS_VLDMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDMDIA_UPD, ARM_INS_VLDMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDMSDB_UPD, ARM_INS_VLDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDMSIA, ARM_INS_VLDMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDMSIA_UPD, ARM_INS_VLDMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDRD, ARM_INS_VLDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VLDRS, ARM_INS_VLDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMAXNMD, ARM_INS_VMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VMAXNMND, ARM_INS_VMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXNMNQ, ARM_INS_VMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXNMS, ARM_INS_VMAXNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VMAXfd, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXfq, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXsv16i8, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXsv2i32, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXsv4i16, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXsv4i32, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXsv8i16, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXsv8i8, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXuv16i8, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXuv2i32, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXuv4i16, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXuv4i32, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXuv8i16, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMAXuv8i8, ARM_INS_VMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINNMD, ARM_INS_VMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VMINNMND, ARM_INS_VMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINNMNQ, ARM_INS_VMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINNMS, ARM_INS_VMINNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VMINfd, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINfq, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINsv16i8, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINsv2i32, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINsv4i16, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINsv4i32, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINsv8i16, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINsv8i8, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINuv16i8, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINuv2i32, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINuv4i16, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINuv4i32, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINuv8i16, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMINuv8i8, ARM_INS_VMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAD, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLALslsv2i32, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALslsv4i16, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALsluv2i32, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALsluv4i16, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALsv2i64, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALsv4i32, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALsv8i16, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALuv2i64, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALuv4i32, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLALuv8i16, ARM_INS_VMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAS, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLAfd, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLAfq, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLAslfd, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLAslfq, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLAslv2i32, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAslv4i16, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAslv4i32, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAslv8i16, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAv16i8, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAv2i32, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAv4i16, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAv4i32, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAv8i16, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLAv8i8, ARM_INS_VMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSD, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLSLslsv2i32, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLslsv4i16, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLsluv2i32, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLsluv4i16, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLsv2i64, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLsv4i32, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLsv8i16, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLuv2i64, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLuv4i32, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSLuv8i16, ARM_INS_VMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSS, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLSfd, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLSfq, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLSslfd, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLSslfq, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VMLSslv2i32, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSslv4i16, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSslv4i32, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSslv8i16, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSv16i8, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSv2i32, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSv4i16, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSv4i32, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSv8i16, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMLSv8i8, ARM_INS_VMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVD, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VMOVDRR, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVLsv2i64, ARM_INS_VMOVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVLsv4i32, ARM_INS_VMOVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVLsv8i16, ARM_INS_VMOVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVLuv2i64, ARM_INS_VMOVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVLuv4i32, ARM_INS_VMOVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVLuv8i16, ARM_INS_VMOVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVNv2i32, ARM_INS_VMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVNv4i16, ARM_INS_VMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVNv8i8, ARM_INS_VMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVRRD, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVRRS, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVRS, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVS, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVSR, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVSRR, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMOVv16i8, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv1i64, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv2f32, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv2i32, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv2i64, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv4f32, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv4i16, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv4i32, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv8i16, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMOVv8i8, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMRS, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_FPEXC, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_FPINST, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_FPINST2, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_FPSID, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_MVFR0, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_MVFR1, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMRS_MVFR2, ARM_INS_VMRS, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VMSR, ARM_INS_VMSR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMSR_FPEXC, ARM_INS_VMSR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMSR_FPINST, ARM_INS_VMSR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMSR_FPINST2, ARM_INS_VMSR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMSR_FPSID, ARM_INS_VMSR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMULD, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VMULLp64, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0 #endif }, { ARM_VMULLp8, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLslsv2i32, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLslsv4i16, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLsluv2i32, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLsluv4i16, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLsv2i64, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLsv4i32, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLsv8i16, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLuv2i64, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLuv4i32, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULLuv8i16, ARM_INS_VMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULS, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VMULfd, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULfq, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULpd, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULpq, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULslfd, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULslfq, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULslv2i32, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULslv4i16, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULslv4i32, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULslv8i16, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULv16i8, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULv2i32, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULv4i16, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULv4i32, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULv8i16, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMULv8i8, ARM_INS_VMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMVNd, ARM_INS_VMVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMVNq, ARM_INS_VMVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMVNv2i32, ARM_INS_VMVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMVNv4i16, ARM_INS_VMVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMVNv4i32, ARM_INS_VMVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VMVNv8i16, ARM_INS_VMVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGD, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VNEGS, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VNEGf32q, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGfd, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGs16d, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGs16q, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGs32d, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGs32q, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGs8d, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNEGs8q, ARM_INS_VNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VNMLAD, ARM_INS_VNMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VNMLAS, ARM_INS_VNMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VNMLSD, ARM_INS_VNMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VNMLSS, ARM_INS_VNMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0 #endif }, { ARM_VNMULD, ARM_INS_VNMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VNMULS, ARM_INS_VNMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VORNd, ARM_INS_VORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORNq, ARM_INS_VORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORRd, ARM_INS_VORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORRiv2i32, ARM_INS_VORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORRiv4i16, ARM_INS_VORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORRiv4i32, ARM_INS_VORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORRiv8i16, ARM_INS_VORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VORRq, ARM_INS_VORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALsv16i8, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALsv2i32, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALsv4i16, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALsv4i32, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALsv8i16, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALsv8i8, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALuv16i8, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALuv2i32, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALuv4i16, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALuv4i32, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALuv8i16, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADALuv8i8, ARM_INS_VPADAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLsv16i8, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLsv2i32, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLsv4i16, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLsv4i32, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLsv8i16, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLsv8i8, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLuv16i8, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLuv2i32, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLuv4i16, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLuv4i32, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLuv8i16, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDLuv8i8, ARM_INS_VPADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDf, ARM_INS_VPADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDi16, ARM_INS_VPADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDi32, ARM_INS_VPADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPADDi8, ARM_INS_VPADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXf, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXs16, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXs32, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXs8, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXu16, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXu32, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMAXu8, ARM_INS_VPMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINf, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINs16, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINs32, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINs8, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINu16, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINu32, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VPMINu8, ARM_INS_VPMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQABSv16i8, ARM_INS_VQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQABSv2i32, ARM_INS_VQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQABSv4i16, ARM_INS_VQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQABSv4i32, ARM_INS_VQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQABSv8i16, ARM_INS_VQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQABSv8i8, ARM_INS_VQABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv16i8, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv1i64, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv2i32, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv2i64, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv4i16, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv4i32, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv8i16, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDsv8i8, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv16i8, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv1i64, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv2i32, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv2i64, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv4i16, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv4i32, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv8i16, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQADDuv8i8, ARM_INS_VQADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLALv2i64, ARM_INS_VQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLALv4i32, ARM_INS_VQDMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLSLslv2i32, ARM_INS_VQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLSLslv4i16, ARM_INS_VQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLSLv2i64, ARM_INS_VQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMLSLv4i32, ARM_INS_VQDMLSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHslv2i32, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHslv4i16, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHslv4i32, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHslv8i16, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHv2i32, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHv4i16, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHv4i32, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULHv8i16, ARM_INS_VQDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULLslv2i32, ARM_INS_VQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULLslv4i16, ARM_INS_VQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULLv2i64, ARM_INS_VQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQDMULLv4i32, ARM_INS_VQDMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNsuv2i32, ARM_INS_VQMOVUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNsuv4i16, ARM_INS_VQMOVUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNsuv8i8, ARM_INS_VQMOVUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNsv2i32, ARM_INS_VQMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNsv4i16, ARM_INS_VQMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNsv8i8, ARM_INS_VQMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNuv2i32, ARM_INS_VQMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNuv4i16, ARM_INS_VQMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQMOVNuv8i8, ARM_INS_VQMOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQNEGv16i8, ARM_INS_VQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQNEGv2i32, ARM_INS_VQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQNEGv4i16, ARM_INS_VQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQNEGv4i32, ARM_INS_VQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQNEGv8i16, ARM_INS_VQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQNEGv8i8, ARM_INS_VQNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHslv2i32, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHslv4i16, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHslv4i32, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHslv8i16, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHv2i32, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHv4i16, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHv4i32, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRDMULHv8i16, ARM_INS_VQRDMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv16i8, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv1i64, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv2i32, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv2i64, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv4i16, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv4i32, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv8i16, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLsv8i8, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv16i8, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv1i64, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv2i32, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv2i64, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv4i16, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv4i32, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv8i16, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHLuv8i8, ARM_INS_VQRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRNsv2i32, ARM_INS_VQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRNsv4i16, ARM_INS_VQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRNsv8i8, ARM_INS_VQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRNuv2i32, ARM_INS_VQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRNuv4i16, ARM_INS_VQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRNuv8i8, ARM_INS_VQRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRUNv2i32, ARM_INS_VQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRUNv4i16, ARM_INS_VQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQRSHRUNv8i8, ARM_INS_VQRSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv16i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv1i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv2i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv2i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv4i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv4i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv8i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsiv8i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv16i8, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv1i64, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv2i32, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv2i64, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv4i16, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv4i32, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv8i16, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsuv8i8, ARM_INS_VQSHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv16i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv1i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv2i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv2i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv4i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv4i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv8i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLsv8i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv16i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv1i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv2i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv2i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv4i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv4i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv8i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuiv8i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv16i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv1i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv2i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv2i64, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv4i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv4i32, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv8i16, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHLuv8i8, ARM_INS_VQSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRNsv2i32, ARM_INS_VQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRNsv4i16, ARM_INS_VQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRNsv8i8, ARM_INS_VQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRNuv2i32, ARM_INS_VQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRNuv4i16, ARM_INS_VQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRNuv8i8, ARM_INS_VQSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRUNv2i32, ARM_INS_VQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRUNv4i16, ARM_INS_VQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSHRUNv8i8, ARM_INS_VQSHRUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv16i8, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv1i64, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv2i32, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv2i64, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv4i16, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv4i32, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv8i16, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBsv8i8, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv16i8, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv1i64, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv2i32, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv2i64, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv4i16, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv4i32, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv8i16, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VQSUBuv8i8, ARM_INS_VQSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRADDHNv2i32, ARM_INS_VRADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRADDHNv4i16, ARM_INS_VRADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRADDHNv8i8, ARM_INS_VRADDHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRECPEd, ARM_INS_VRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRECPEfd, ARM_INS_VRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRECPEfq, ARM_INS_VRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRECPEq, ARM_INS_VRECPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRECPSfd, ARM_INS_VRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRECPSfq, ARM_INS_VRECPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV16d8, ARM_INS_VREV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV16q8, ARM_INS_VREV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV32d16, ARM_INS_VREV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV32d8, ARM_INS_VREV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV32q16, ARM_INS_VREV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV32q8, ARM_INS_VREV32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV64d16, ARM_INS_VREV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV64d32, ARM_INS_VREV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV64d8, ARM_INS_VREV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV64q16, ARM_INS_VREV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV64q32, ARM_INS_VREV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VREV64q8, ARM_INS_VREV64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDsv16i8, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDsv2i32, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDsv4i16, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDsv4i32, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDsv8i16, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDsv8i8, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDuv16i8, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDuv2i32, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDuv4i16, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDuv4i32, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDuv8i16, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRHADDuv8i8, ARM_INS_VRHADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTAD, ARM_INS_VRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTAND, ARM_INS_VRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTANQ, ARM_INS_VRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTAS, ARM_INS_VRINTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRINTMD, ARM_INS_VRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTMND, ARM_INS_VRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTMNQ, ARM_INS_VRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTMS, ARM_INS_VRINTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRINTND, ARM_INS_VRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTNND, ARM_INS_VRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTNNQ, ARM_INS_VRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTNS, ARM_INS_VRINTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRINTPD, ARM_INS_VRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTPND, ARM_INS_VRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTPNQ, ARM_INS_VRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTPS, ARM_INS_VRINTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRINTRD, ARM_INS_VRINTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTRS, ARM_INS_VRINTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRINTXD, ARM_INS_VRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTXND, ARM_INS_VRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTXNQ, ARM_INS_VRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTXS, ARM_INS_VRINTX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRINTZD, ARM_INS_VRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VRINTZND, ARM_INS_VRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTZNQ, ARM_INS_VRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRINTZS, ARM_INS_VRINTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VRSHLsv16i8, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv1i64, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv2i32, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv2i64, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv4i16, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv4i32, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv8i16, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLsv8i8, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv16i8, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv1i64, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv2i32, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv2i64, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv4i16, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv4i32, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv8i16, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHLuv8i8, ARM_INS_VRSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRNv2i32, ARM_INS_VRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRNv4i16, ARM_INS_VRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRNv8i8, ARM_INS_VRSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv16i8, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv1i64, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv2i32, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv2i64, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv4i16, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv4i32, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv8i16, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRsv8i8, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv16i8, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv1i64, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv2i32, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv2i64, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv4i16, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv4i32, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv8i16, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSHRuv8i8, ARM_INS_VRSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSQRTEd, ARM_INS_VRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSQRTEfd, ARM_INS_VRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSQRTEfq, ARM_INS_VRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSQRTEq, ARM_INS_VRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSQRTSfd, ARM_INS_VRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSQRTSfq, ARM_INS_VRSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv16i8, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv1i64, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv2i32, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv2i64, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv4i16, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv4i32, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv8i16, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAsv8i8, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv16i8, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv1i64, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv2i32, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv2i64, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv4i16, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv4i32, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv8i16, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSRAuv8i8, ARM_INS_VRSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSUBHNv2i32, ARM_INS_VRSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSUBHNv4i16, ARM_INS_VRSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VRSUBHNv8i8, ARM_INS_VRSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSELEQD, ARM_INS_VSELEQ, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSELEQS, ARM_INS_VSELEQ, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VSELGED, ARM_INS_VSELGE, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSELGES, ARM_INS_VSELGE, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VSELGTD, ARM_INS_VSELGT, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSELGTS, ARM_INS_VSELGT, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VSELVSD, ARM_INS_VSELVS, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSELVSS, ARM_INS_VSELVS, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0 #endif }, { ARM_VSETLNi16, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSETLNi32, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSETLNi8, ARM_INS_VMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLi16, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLi32, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLi8, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLsv2i64, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLsv4i32, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLsv8i16, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLuv2i64, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLuv4i32, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLLuv8i16, ARM_INS_VSHLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv16i8, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv1i64, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv2i32, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv2i64, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv4i16, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv4i32, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv8i16, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLiv8i8, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv16i8, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv1i64, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv2i32, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv2i64, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv4i16, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv4i32, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv8i16, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLsv8i8, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv16i8, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv1i64, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv2i32, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv2i64, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv4i16, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv4i32, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv8i16, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHLuv8i8, ARM_INS_VSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRNv2i32, ARM_INS_VSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRNv4i16, ARM_INS_VSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRNv8i8, ARM_INS_VSHRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv16i8, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv1i64, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv2i32, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv2i64, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv4i16, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv4i32, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv8i16, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRsv8i8, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv16i8, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv1i64, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv2i32, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv2i64, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv4i16, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv4i32, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv8i16, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHRuv8i8, ARM_INS_VSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSHTOD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSHTOS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSITOD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSITOS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSLIv16i8, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv1i64, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv2i32, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv2i64, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv4i16, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv4i32, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv8i16, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLIv8i8, ARM_INS_VSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSLTOD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSLTOS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSQRTD, ARM_INS_VSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSQRTS, ARM_INS_VSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSRAsv16i8, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv1i64, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv2i32, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv2i64, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv4i16, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv4i32, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv8i16, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAsv8i8, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv16i8, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv1i64, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv2i32, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv2i64, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv4i16, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv4i32, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv8i16, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRAuv8i8, ARM_INS_VSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv16i8, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv1i64, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv2i32, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv2i64, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv4i16, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv4i32, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv8i16, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSRIv8i8, ARM_INS_VSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1LNd16, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1LNd16_UPD, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1LNd32, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1LNd32_UPD, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1LNd8, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1LNd8_UPD, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16Q, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16Qwb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16Qwb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16T, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16Twb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16Twb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d16wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32Q, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32Qwb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32Qwb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32T, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32Twb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32Twb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d32wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64Q, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64Qwb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64Qwb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64T, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64Twb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64Twb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d64wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8Q, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8Qwb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8Qwb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8T, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8Twb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8Twb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1d8wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q16, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q16wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q16wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q32, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q32wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q32wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q64, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q64wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q64wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q8, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q8wb_fixed, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST1q8wb_register, ARM_INS_VST1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNd16, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNd16_UPD, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNd32, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNd32_UPD, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNd8, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNd8_UPD, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNq16, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNq16_UPD, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNq32, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2LNq32_UPD, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b16, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b16wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b16wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b32, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b32wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b32wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b8, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b8wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2b8wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d16, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d16wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d16wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d32, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d32wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d32wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d8, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d8wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2d8wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q16, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q16wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q16wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q32, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q32wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q32wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q8, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q8wb_fixed, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST2q8wb_register, ARM_INS_VST2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNd16, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNd16_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNd32, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNd32_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNd8, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNd8_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNq16, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNq16_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNq32, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3LNq32_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3d16, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3d16_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3d32, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3d32_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3d8, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3d8_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3q16, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3q16_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3q32, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3q32_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3q8, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST3q8_UPD, ARM_INS_VST3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNd16, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNd16_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNd32, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNd32_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNd8, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNd8_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNq16, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNq16_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNq32, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4LNq32_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4d16, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4d16_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4d32, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4d32_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4d8, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4d8_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4q16, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4q16_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4q32, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4q32_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4q8, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VST4q8_UPD, ARM_INS_VST4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSTMDDB_UPD, ARM_INS_VSTMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTMDIA, ARM_INS_VSTMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTMDIA_UPD, ARM_INS_VSTMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTMSDB_UPD, ARM_INS_VSTMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTMSIA, ARM_INS_VSTMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTMSIA_UPD, ARM_INS_VSTMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTRD, ARM_INS_VSTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSTRS, ARM_INS_VSTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSUBD, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VSUBHNv2i32, ARM_INS_VSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBHNv4i16, ARM_INS_VSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBHNv8i8, ARM_INS_VSUBHN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBLsv2i64, ARM_INS_VSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBLsv4i32, ARM_INS_VSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBLsv8i16, ARM_INS_VSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBLuv2i64, ARM_INS_VSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBLuv4i32, ARM_INS_VSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBLuv8i16, ARM_INS_VSUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBS, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VSUBWsv2i64, ARM_INS_VSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBWsv4i32, ARM_INS_VSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBWsv8i16, ARM_INS_VSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBWuv2i64, ARM_INS_VSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBWuv4i32, ARM_INS_VSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBWuv8i16, ARM_INS_VSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBfd, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBfq, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv16i8, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv1i64, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv2i32, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv2i64, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv4i16, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv4i32, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv8i16, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSUBv8i8, ARM_INS_VSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSWPd, ARM_INS_VSWP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VSWPq, ARM_INS_VSWP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBL1, ARM_INS_VTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBL2, ARM_INS_VTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBL3, ARM_INS_VTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBL4, ARM_INS_VTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBX1, ARM_INS_VTBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBX2, ARM_INS_VTBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBX3, ARM_INS_VTBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTBX4, ARM_INS_VTBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTOSHD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOSHS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOSIRD, ARM_INS_VCVTR, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOSIRS, ARM_INS_VCVTR, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOSIZD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOSIZS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOSLD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOSLS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOUHD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOUHS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOUIRD, ARM_INS_VCVTR, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOUIRS, ARM_INS_VCVTR, #ifndef CAPSTONE_DIET { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOUIZD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOUIZS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTOULD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VTOULS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VTRNd16, ARM_INS_VTRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTRNd32, ARM_INS_VTRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTRNd8, ARM_INS_VTRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTRNq16, ARM_INS_VTRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTRNq32, ARM_INS_VTRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTRNq8, ARM_INS_VTRN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTSTv16i8, ARM_INS_VTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTSTv2i32, ARM_INS_VTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTSTv4i16, ARM_INS_VTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTSTv4i32, ARM_INS_VTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTSTv8i16, ARM_INS_VTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VTSTv8i8, ARM_INS_VTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VUHTOD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VUHTOS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VUITOD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VUITOS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VULTOD, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0 #endif }, { ARM_VULTOS, ARM_INS_VCVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0 #endif }, { ARM_VUZPd16, ARM_INS_VUZP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VUZPd8, ARM_INS_VUZP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VUZPq16, ARM_INS_VUZP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VUZPq32, ARM_INS_VUZP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VUZPq8, ARM_INS_VUZP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VZIPd16, ARM_INS_VZIP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VZIPd8, ARM_INS_VZIP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VZIPq16, ARM_INS_VZIP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VZIPq32, ARM_INS_VZIP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_VZIPq8, ARM_INS_VZIP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0 #endif }, { ARM_sysLDMDA, ARM_INS_LDMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMDA_UPD, ARM_INS_LDMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMDB, ARM_INS_LDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMDB_UPD, ARM_INS_LDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMIA, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMIA_UPD, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMIB, ARM_INS_LDMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysLDMIB_UPD, ARM_INS_LDMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMDA, ARM_INS_STMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMDA_UPD, ARM_INS_STMDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMDB, ARM_INS_STMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMDB_UPD, ARM_INS_STMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMIA, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMIA_UPD, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMIB, ARM_INS_STMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_sysSTMIB_UPD, ARM_INS_STMIB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0 #endif }, { ARM_t2ADCri, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADCrr, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADCrs, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADDri, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADDri12, ARM_INS_ADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADDrr, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADDrs, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ADR, ARM_INS_ADR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ANDri, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ANDrr, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ANDrs, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ASRri, ARM_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ASRrr, ARM_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2B, ARM_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB2, 0 }, 1, 0 #endif }, { ARM_t2BFC, ARM_INS_BFC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2BFI, ARM_INS_BFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2BICri, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2BICrr, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2BICrs, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2BXJ, ARM_INS_BXJ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, ARM_GRP_PREV8, 0 }, 0, 1 #endif }, { ARM_t2Bcc, ARM_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB2, 0 }, 1, 0 #endif }, { ARM_t2CDP, ARM_INS_CDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_t2CDP2, ARM_INS_CDP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_t2CLREX, ARM_INS_CLREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_t2CLZ, ARM_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CMNri, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CMNzrr, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CMNzrs, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CMPri, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CMPrr, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CMPrs, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2CPS1p, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2CPS2p, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2CPS3p, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2CRC32B, ARM_INS_CRC32B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_t2CRC32CB, ARM_INS_CRC32CB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_t2CRC32CH, ARM_INS_CRC32CH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_t2CRC32CW, ARM_INS_CRC32CW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_t2CRC32H, ARM_INS_CRC32H, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_t2CRC32W, ARM_INS_CRC32W, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0 #endif }, { ARM_t2DBG, ARM_INS_DBG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2DCPS1, ARM_INS_DCPS1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2DCPS2, ARM_INS_DCPS2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2DCPS3, ARM_INS_DCPS3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2DMB, ARM_INS_DMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0 #endif }, { ARM_t2DSB, ARM_INS_DSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0 #endif }, { ARM_t2EORri, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2EORrr, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2EORrs, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2HINT, ARM_INS_HINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2HVC, ARM_INS_HVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_t2ISB, ARM_INS_ISB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0 #endif }, { ARM_t2IT, ARM_INS_IT, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_ITSTATE, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDA, ARM_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDAB, ARM_INS_LDAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDAEX, ARM_INS_LDAEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDAEXB, ARM_INS_LDAEXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDAEXD, ARM_INS_LDAEXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDAEXH, ARM_INS_LDAEXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDAH, ARM_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2LDC2L_OFFSET, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2L_OPTION, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2L_POST, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2L_PRE, ARM_INS_LDC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2_OFFSET, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2_OPTION, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2_POST, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC2_PRE, ARM_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDCL_OFFSET, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDCL_OPTION, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDCL_POST, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDCL_PRE, ARM_INS_LDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC_OFFSET, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC_OPTION, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC_POST, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDC_PRE, ARM_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDMDB, ARM_INS_LDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDMDB_UPD, ARM_INS_LDMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDMIA, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDMIA_UPD, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRBT, ARM_INS_LDRBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRB_POST, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRB_PRE, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRBi12, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRBi8, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRBpci, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRBs, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRD_POST, ARM_INS_LDRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRD_PRE, ARM_INS_LDRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRDi8, ARM_INS_LDRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDREX, ARM_INS_LDREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDREXB, ARM_INS_LDREXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDREXD, ARM_INS_LDREXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2LDREXH, ARM_INS_LDREXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRHT, ARM_INS_LDRHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRH_POST, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRH_PRE, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRHi12, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRHi8, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRHpci, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRHs, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSBT, ARM_INS_LDRSBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSB_POST, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSB_PRE, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSBi12, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSBi8, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSBpci, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSBs, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSHT, ARM_INS_LDRSHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSH_POST, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSH_PRE, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSHi12, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSHi8, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSHpci, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRSHs, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRT, ARM_INS_LDRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDR_POST, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDR_PRE, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRi12, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRi8, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRpci, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LDRs, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LSLri, ARM_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LSLrr, ARM_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LSRri, ARM_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2LSRrr, ARM_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MCR, ARM_INS_MCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MCR2, ARM_INS_MCR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_t2MCRR, ARM_INS_MCRR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MCRR2, ARM_INS_MCRR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_t2MLA, ARM_INS_MLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2MLS, ARM_INS_MLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2MOVTi16, ARM_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MOVi, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MOVi16, ARM_INS_MOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MOVr, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MOVsra_flag, ARM_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MOVsrl_flag, ARM_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MRC, ARM_INS_MRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MRC2, ARM_INS_MRC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_t2MRRC, ARM_INS_MRRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MRRC2, ARM_INS_MRRC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0 #endif }, { ARM_t2MRS_AR, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2MRS_M, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0 #endif }, { ARM_t2MRSbanked, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_t2MRSsys_AR, ARM_INS_MRS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2MSR_AR, ARM_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2MSR_M, ARM_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0 #endif }, { ARM_t2MSRbanked, ARM_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0 #endif }, { ARM_t2MUL, ARM_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MVNi, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MVNr, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2MVNs, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ORNri, ARM_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ORNrr, ARM_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ORNrs, ARM_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ORRri, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ORRrr, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2ORRrs, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PKHBT, ARM_INS_PKHBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PKHTB, ARM_INS_PKHTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PLDWi12, ARM_INS_PLDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0 #endif }, { ARM_t2PLDWi8, ARM_INS_PLDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0 #endif }, { ARM_t2PLDWs, ARM_INS_PLDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0 #endif }, { ARM_t2PLDi12, ARM_INS_PLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PLDi8, ARM_INS_PLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PLDpci, ARM_INS_PLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PLDs, ARM_INS_PLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2PLIi12, ARM_INS_PLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_t2PLIi8, ARM_INS_PLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_t2PLIpci, ARM_INS_PLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_t2PLIs, ARM_INS_PLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0 #endif }, { ARM_t2QADD, ARM_INS_QADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QADD16, ARM_INS_QADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QADD8, ARM_INS_QADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QASX, ARM_INS_QASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QDADD, ARM_INS_QDADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QDSUB, ARM_INS_QDSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QSAX, ARM_INS_QSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QSUB, ARM_INS_QSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QSUB16, ARM_INS_QSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2QSUB8, ARM_INS_QSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2RBIT, ARM_INS_RBIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2REV, ARM_INS_REV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2REV16, ARM_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2REVSH, ARM_INS_REVSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2RFEDB, ARM_INS_RFEDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2RFEDBW, ARM_INS_RFEDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2RFEIA, ARM_INS_RFEIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2RFEIAW, ARM_INS_RFEIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2RORri, ARM_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2RORrr, ARM_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2RRX, ARM_INS_RRX, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2RSBri, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2RSBrr, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2RSBrs, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SADD16, ARM_INS_SADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SADD8, ARM_INS_SADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SASX, ARM_INS_SASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SBCri, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SBCrr, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SBCrs, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SBFX, ARM_INS_SBFX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SDIV, ARM_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SEL, ARM_INS_SEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SHADD16, ARM_INS_SHADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SHADD8, ARM_INS_SHADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SHASX, ARM_INS_SHASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SHSAX, ARM_INS_SHSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SHSUB16, ARM_INS_SHSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SHSUB8, ARM_INS_SHSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMC, ARM_INS_SMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_TRUSTZONE, 0 }, 0, 0 #endif }, { ARM_t2SMLABB, ARM_INS_SMLABB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMLABT, ARM_INS_SMLABT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMLAD, ARM_INS_SMLAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLADX, ARM_INS_SMLADX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLAL, ARM_INS_SMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SMLALBB, ARM_INS_SMLALBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLALBT, ARM_INS_SMLALBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLALD, ARM_INS_SMLALD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLALDX, ARM_INS_SMLALDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLALTB, ARM_INS_SMLALTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLALTT, ARM_INS_SMLALTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLATB, ARM_INS_SMLATB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMLATT, ARM_INS_SMLATT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMLAWB, ARM_INS_SMLAWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMLAWT, ARM_INS_SMLAWT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMLSD, ARM_INS_SMLSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLSDX, ARM_INS_SMLSDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLSLD, ARM_INS_SMLSLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMLSLDX, ARM_INS_SMLSLDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMMLA, ARM_INS_SMMLA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMMLAR, ARM_INS_SMMLAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMMLS, ARM_INS_SMMLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0 #endif }, { ARM_t2SMMLSR, ARM_INS_SMMLSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMMUL, ARM_INS_SMMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMMULR, ARM_INS_SMMULR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMUAD, ARM_INS_SMUAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMUADX, ARM_INS_SMUADX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMULBB, ARM_INS_SMULBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMULBT, ARM_INS_SMULBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMULL, ARM_INS_SMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SMULTB, ARM_INS_SMULTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMULTT, ARM_INS_SMULTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMULWB, ARM_INS_SMULWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMULWT, ARM_INS_SMULWT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMUSD, ARM_INS_SMUSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SMUSDX, ARM_INS_SMUSDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SRSDB, ARM_INS_SRSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2SRSDB_UPD, ARM_INS_SRSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2SRSIA, ARM_INS_SRSIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2SRSIA_UPD, ARM_INS_SRSIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2SSAT, ARM_INS_SSAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SSAT16, ARM_INS_SSAT16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SSAX, ARM_INS_SSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SSUB16, ARM_INS_SSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2SSUB8, ARM_INS_SSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2STC2L_OFFSET, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2L_OPTION, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2L_POST, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2L_PRE, ARM_INS_STC2L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2_OFFSET, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2_OPTION, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2_POST, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC2_PRE, ARM_INS_STC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STCL_OFFSET, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STCL_OPTION, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STCL_POST, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STCL_PRE, ARM_INS_STCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC_OFFSET, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC_OPTION, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC_POST, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STC_PRE, ARM_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STL, ARM_INS_STL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STLB, ARM_INS_STLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STLEX, ARM_INS_STLEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STLEXB, ARM_INS_STLEXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STLEXD, ARM_INS_STLEXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STLEXH, ARM_INS_STLEXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STLH, ARM_INS_STLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_t2STMDB, ARM_INS_STMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STMDB_UPD, ARM_INS_STMDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STMIA, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STMIA_UPD, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRBT, ARM_INS_STRBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRB_POST, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRB_PRE, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRBi12, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRBi8, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRBs, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRD_POST, ARM_INS_STRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRD_PRE, ARM_INS_STRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRDi8, ARM_INS_STRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STREX, ARM_INS_STREX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STREXB, ARM_INS_STREXB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STREXD, ARM_INS_STREXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2STREXH, ARM_INS_STREXH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRHT, ARM_INS_STRHT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRH_POST, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRH_PRE, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRHi12, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRHi8, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRHs, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRT, ARM_INS_STRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STR_POST, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STR_PRE, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRi12, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRi8, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2STRs, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SUBS_PC_LR, ARM_INS_SUB, #ifndef CAPSTONE_DIET { ARM_REG_SPSR, ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_REG_CPSR, ARM_REG_PC, 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_t2SUBri, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SUBri12, ARM_INS_SUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SUBrr, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SUBrs, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SXTAB, ARM_INS_SXTAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SXTAB16, ARM_INS_SXTAB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SXTAH, ARM_INS_SXTAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SXTB, ARM_INS_SXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2SXTB16, ARM_INS_SXTB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_T2EXTRACTPACK, 0 }, 0, 0 #endif }, { ARM_t2SXTH, ARM_INS_SXTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2TBB, ARM_INS_TBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 1 #endif }, { ARM_t2TBH, ARM_INS_TBH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 1 #endif }, { ARM_t2TEQri, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2TEQrr, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2TEQrs, ARM_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2TSTri, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2TSTrr, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2TSTrs, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UADD16, ARM_INS_UADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UADD8, ARM_INS_UADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UASX, ARM_INS_UASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UBFX, ARM_INS_UBFX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UDF, ARM_INS_UDF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UDIV, ARM_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UHADD16, ARM_INS_UHADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UHADD8, ARM_INS_UHADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UHASX, ARM_INS_UHASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UHSAX, ARM_INS_UHSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UHSUB16, ARM_INS_UHSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UHSUB8, ARM_INS_UHSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UMAAL, ARM_INS_UMAAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UMLAL, ARM_INS_UMLAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UMULL, ARM_INS_UMULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UQADD16, ARM_INS_UQADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UQADD8, ARM_INS_UQADD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UQASX, ARM_INS_UQASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UQSAX, ARM_INS_UQSAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UQSUB16, ARM_INS_UQSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UQSUB8, ARM_INS_UQSUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2USAD8, ARM_INS_USAD8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2USADA8, ARM_INS_USADA8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2USAT, ARM_INS_USAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2USAT16, ARM_INS_USAT16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2USAX, ARM_INS_USAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2USUB16, ARM_INS_USUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2USUB8, ARM_INS_USUB8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0 #endif }, { ARM_t2UXTAB, ARM_INS_UXTAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UXTAB16, ARM_INS_UXTAB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UXTAH, ARM_INS_UXTAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UXTB, ARM_INS_UXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UXTB16, ARM_INS_UXTB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_t2UXTH, ARM_INS_UXTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0 #endif }, { ARM_tADC, ARM_INS_ADC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDhirr, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDi3, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDi8, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDrSP, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDrSPi, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDrr, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDspi, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADDspr, ARM_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tADR, ARM_INS_ADR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tAND, ARM_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tASRri, ARM_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tASRrr, ARM_INS_ASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tB, ARM_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0 #endif }, { ARM_tBIC, ARM_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tBKPT, ARM_INS_BKPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tBL, ARM_INS_BL, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB, ARM_GRP_CALL, 0 }, 1, 0 #endif }, { ARM_tBLXi, ARM_INS_BLX, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB, ARM_GRP_V5T, ARM_GRP_NOTMCLASS, ARM_GRP_CALL, 0 }, 1, 0 #endif }, { ARM_tBLXr, ARM_INS_BLX, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, ARM_REG_PC, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, ARM_GRP_CALL, 0 }, 0, 1 #endif }, { ARM_tBX, ARM_INS_BX, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_THUMB, 0 }, 0, 1 #endif }, { ARM_tBcc, ARM_INS_B, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0 #endif }, { ARM_tCBNZ, ARM_INS_CBNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB2, 0 }, 1, 0 #endif }, { ARM_tCBZ, ARM_INS_CBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_BRANCH_RELATIVE, ARM_GRP_THUMB2, 0 }, 1, 0 #endif }, { ARM_tCMNz, ARM_INS_CMN, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tCMPhir, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tCMPi8, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tCMPr, ARM_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tCPS, ARM_INS_CPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tEOR, ARM_INS_EOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tHINT, ARM_INS_HINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V6M, 0 }, 0, 0 #endif }, { ARM_tHLT, ARM_INS_HLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0 #endif }, { ARM_tLDMIA, ARM_INS_LDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRBi, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRBr, ARM_INS_LDRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRHi, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRHr, ARM_INS_LDRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRSB, ARM_INS_LDRSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRSH, ARM_INS_LDRSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRi, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRpci, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRr, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLDRspi, ARM_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLSLri, ARM_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLSLrr, ARM_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLSRri, ARM_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tLSRrr, ARM_INS_LSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tMOVSr, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tMOVi8, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tMOVr, ARM_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tMUL, ARM_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tMVN, ARM_INS_MVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tORR, ARM_INS_ORR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tPOP, ARM_INS_POP, #ifndef CAPSTONE_DIET { ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tPUSH, ARM_INS_PUSH, #ifndef CAPSTONE_DIET { ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tREV, ARM_INS_REV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_tREV16, ARM_INS_REV16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_tREVSH, ARM_INS_REVSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_tROR, ARM_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tRSB, ARM_INS_RSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSBC, ARM_INS_SBC, #ifndef CAPSTONE_DIET { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSETEND, ARM_INS_SETEND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V6, ARM_GRP_NOTMCLASS, 0 }, 0, 0 #endif }, { ARM_tSTMIA_UPD, ARM_INS_STM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRBi, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRBr, ARM_INS_STRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRHi, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRHr, ARM_INS_STRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRi, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRr, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSTRspi, ARM_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSUBi3, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSUBi8, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSUBrr, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSUBspi, ARM_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tSVC, ARM_INS_SVC, #ifndef CAPSTONE_DIET { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_INT, 0 }, 0, 0 #endif }, { ARM_tSXTB, ARM_INS_SXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_tSXTH, ARM_INS_SXTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_tTRAP, ARM_INS_TRAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0 #endif }, { ARM_tTST, ARM_INS_TST, #ifndef CAPSTONE_DIET { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0 #endif }, { ARM_tUDF, ARM_INS_UDF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0 #endif }, { ARM_tUXTB, ARM_INS_UXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, { ARM_tUXTH, ARM_INS_UXTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/ARM/ARMMappingInsnOp.inc010066400017500001750000007104051363402546700214120ustar0000000000000000// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) // By Nguyen Anh Quynh { /* ARM_ADCri, ARM_INS_ADC: adc${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ADCrr, ARM_INS_ADC: adc${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ADCrsi, ARM_INS_ADC: adc${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ADCrsr, ARM_INS_ADC: adc${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ADDri, ARM_INS_ADD: add${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ADDrr, ARM_INS_ADD: add${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ADDrsi, ARM_INS_ADD: add${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ADDrsr, ARM_INS_ADD: add${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ADR, ARM_INS_ADR: adr${p} $rd, $label */ { CS_AC_WRITE, 0 } }, { /* ARM_AESD, ARM_INS_AESD: aesd.8 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_AESE, ARM_INS_AESE: aese.8 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_AESIMC, ARM_INS_AESIMC: aesimc.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_AESMC, ARM_INS_AESMC: aesmc.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ANDri, ARM_INS_AND: and${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ANDrr, ARM_INS_AND: and${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ANDrsi, ARM_INS_AND: and${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ANDrsr, ARM_INS_AND: and${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_BFC, ARM_INS_BFC: bfc${p} $rd, $imm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_BFI, ARM_INS_BFI: bfi${p} $rd, $rn, $imm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_BICri, ARM_INS_BIC: bic${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_BICrr, ARM_INS_BIC: bic${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_BICrsi, ARM_INS_BIC: bic${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_BICrsr, ARM_INS_BIC: bic${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_BKPT, ARM_INS_BKPT: bkpt $val */ { 0 } }, { /* ARM_BL, ARM_INS_BL: bl $func */ { 0 } }, { /* ARM_BLX, ARM_INS_BLX: blx $func */ { CS_AC_READ, 0 } }, { /* ARM_BLX_pred, ARM_INS_BLX: blx${p} $func */ { CS_AC_READ, 0 } }, { /* ARM_BLXi, ARM_INS_BLX: blx $target */ { 0 } }, { /* ARM_BL_pred, ARM_INS_BL: bl${p} $func */ { 0 } }, { /* ARM_BX, ARM_INS_BX: bx $dst */ { CS_AC_READ, 0 } }, { /* ARM_BXJ, ARM_INS_BXJ: bxj${p} $func */ { CS_AC_READ, 0 } }, { /* ARM_BX_RET, ARM_INS_BX: bx${p} lr */ { 0 } }, { /* ARM_BX_pred, ARM_INS_BX: bx${p} $dst */ { CS_AC_READ, 0 } }, { /* ARM_Bcc, ARM_INS_B: b${p} $target */ { 0 } }, { /* ARM_CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_CDP2, ARM_INS_CDP2: cdp2 $cop, $opc1, $crd, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_CLREX, ARM_INS_CLREX: clrex */ { 0 } }, { /* ARM_CLZ, ARM_INS_CLZ: clz${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_CMNri, ARM_INS_CMN: cmn${p} $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_CMNzrr, ARM_INS_CMN: cmn${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CMNzrsi, ARM_INS_CMN: cmn${p} $rn, $shift */ { CS_AC_READ, 0 } }, { /* ARM_CMNzrsr, ARM_INS_CMN: cmn${p} $rn, $shift */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CMPri, ARM_INS_CMP: cmp${p} $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_CMPrr, ARM_INS_CMP: cmp${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CMPrsi, ARM_INS_CMP: cmp${p} $rn, $shift */ { CS_AC_READ, 0 } }, { /* ARM_CMPrsr, ARM_INS_CMP: cmp${p} $rn, $shift */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CPS1p, ARM_INS_CPS: cps $mode */ { 0 } }, { /* ARM_CPS2p, ARM_INS_CPS: cps$imod $iflags */ { 0 } }, { /* ARM_CPS3p, ARM_INS_CPS: cps$imod $iflags, $mode */ { 0 } }, { /* ARM_CRC32B, ARM_INS_CRC32B: crc32b $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CRC32CB, ARM_INS_CRC32CB: crc32cb $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CRC32CH, ARM_INS_CRC32CH: crc32ch $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CRC32CW, ARM_INS_CRC32CW: crc32cw $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CRC32H, ARM_INS_CRC32H: crc32h $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_CRC32W, ARM_INS_CRC32W: crc32w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_DBG, ARM_INS_DBG: dbg${p} $opt */ { 0 } }, { /* ARM_DMB, ARM_INS_DMB: dmb $opt */ { 0 } }, { /* ARM_DSB, ARM_INS_DSB: dsb $opt */ { 0 } }, { /* ARM_EORri, ARM_INS_EOR: eor${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_EORrr, ARM_INS_EOR: eor${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_EORrsi, ARM_INS_EOR: eor${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_EORrsr, ARM_INS_EOR: eor${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ERET, ARM_INS_ERET: eret${p} */ { 0 } }, { /* ARM_FCONSTD, ARM_INS_VMOV: vmov${p}.f64 $dd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_FCONSTS, ARM_INS_VMOV: vmov${p}.f32 $sd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_FLDMXDB_UPD, ARM_INS_FLDMDBX: fldmdbx${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_FLDMXIA, ARM_INS_FLDMIAX: fldmiax${p} $rn, $regs */ { CS_AC_READ, 0 } }, { /* ARM_FLDMXIA_UPD, ARM_INS_FLDMIAX: fldmiax${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_FMSTAT, ARM_INS_VMRS: vmrs${p} apsr_nzcv, fpscr */ { 0 } }, { /* ARM_FSTMXDB_UPD, ARM_INS_FSTMDBX: fstmdbx${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_FSTMXIA, ARM_INS_FSTMIAX: fstmiax${p} $rn, $regs */ { CS_AC_READ, 0 } }, { /* ARM_FSTMXIA_UPD, ARM_INS_FSTMIAX: fstmiax${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_HINT, ARM_INS_HINT: hint${p} $imm */ { 0 } }, { /* ARM_HLT, ARM_INS_HLT: hlt $val */ { 0 } }, { /* ARM_HVC, ARM_INS_HVC: hvc $imm */ { 0 } }, { /* ARM_ISB, ARM_INS_ISB: isb $opt */ { 0 } }, { /* ARM_LDA, ARM_INS_LDA: lda${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDAB, ARM_INS_LDAB: ldab${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDAEX, ARM_INS_LDAEX: ldaex${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDAEXD, ARM_INS_LDAEXD: ldaexd${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDAEXH, ARM_INS_LDAEXH: ldaexh${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDAH, ARM_INS_LDAH: ldah${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDC2L_OFFSET, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2L_OPTION, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2L_POST, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2L_PRE, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2_OFFSET, ARM_INS_LDC2: ldc2 $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2_OPTION, ARM_INS_LDC2: ldc2 $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2_POST, ARM_INS_LDC2: ldc2 $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC2_PRE, ARM_INS_LDC2: ldc2 $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDCL_OFFSET, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDCL_OPTION, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDCL_POST, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDCL_PRE, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC_OFFSET, ARM_INS_LDC: ldc${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC_OPTION, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC_POST, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDC_PRE, ARM_INS_LDC: ldc${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDMDA, ARM_INS_LDMDA: ldmda${p} $rn, $regs */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_LDMDA_UPD, ARM_INS_LDMDA: ldmda${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_LDMDB, ARM_INS_LDMDB: ldmdb${p} $rn, $regs */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_LDMDB_UPD, ARM_INS_LDMDB: ldmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_LDMIA, ARM_INS_LDM: ldm${p} $rn, $regs */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_LDMIA_UPD, ARM_INS_LDM: ldm${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_LDMIB, ARM_INS_LDMIB: ldmib${p} $rn, $regs */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_LDMIB_UPD, ARM_INS_LDMIB: ldmib${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_LDRBT_POST_IMM, ARM_INS_LDRBT: ldrbt${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRBT_POST_REG, ARM_INS_LDRBT: ldrbt${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRB_POST_IMM, ARM_INS_LDRB: ldrb${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRB_POST_REG, ARM_INS_LDRB: ldrb${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRB_PRE_IMM, ARM_INS_LDRB: ldrb${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRB_PRE_REG, ARM_INS_LDRB: ldrb${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRBi12, ARM_INS_LDRB: ldrb${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRBrs, ARM_INS_LDRB: ldrb${p} $rt, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRD, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_LDRD_POST, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr, $offset */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRD_PRE, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr! */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_LDREX, ARM_INS_LDREX: ldrex${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDREXB, ARM_INS_LDREXB: ldrexb${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDREXD, ARM_INS_LDREXD: ldrexd${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDREXH, ARM_INS_LDREXH: ldrexh${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRH, ARM_INS_LDRH: ldrh${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_LDRHTi, ARM_INS_LDRHT: ldrht${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRHTr, ARM_INS_LDRHT: ldrht${p} $rt, $addr, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDRH_POST, ARM_INS_LDRH: ldrh${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRH_PRE, ARM_INS_LDRH: ldrh${p} $rt, $addr! */ { CS_AC_WRITE, 0 } }, { /* ARM_LDRSB, ARM_INS_LDRSB: ldrsb${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_LDRSBTi, ARM_INS_LDRSBT: ldrsbt${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRSBTr, ARM_INS_LDRSBT: ldrsbt${p} $rt, $addr, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDRSB_POST, ARM_INS_LDRSB: ldrsb${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRSB_PRE, ARM_INS_LDRSB: ldrsb${p} $rt, $addr! */ { CS_AC_WRITE, 0 } }, { /* ARM_LDRSH, ARM_INS_LDRSH: ldrsh${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_LDRSHTi, ARM_INS_LDRSHT: ldrsht${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRSHTr, ARM_INS_LDRSHT: ldrsht${p} $rt, $addr, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_LDRSH_POST, ARM_INS_LDRSH: ldrsh${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRSH_PRE, ARM_INS_LDRSH: ldrsh${p} $rt, $addr! */ { CS_AC_WRITE, 0 } }, { /* ARM_LDRT_POST_IMM, ARM_INS_LDRT: ldrt${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRT_POST_REG, ARM_INS_LDRT: ldrt${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDR_POST_IMM, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDR_POST_REG, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDR_PRE_IMM, ARM_INS_LDR: ldr${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDR_PRE_REG, ARM_INS_LDR: ldr${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRcp, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRi12, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_LDRrs, ARM_INS_LDR: ldr${p} $rt, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_MCR2, ARM_INS_MCR2: mcr2 $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_MCRR, ARM_INS_MCRR: mcrr${p} $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MCRR2, ARM_INS_MCRR2: mcrr2 $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MLA, ARM_INS_MLA: mla${s}${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MLS, ARM_INS_MLS: mls${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MOVPCLR, ARM_INS_MOV: mov${p} pc, lr */ { 0 } }, { /* ARM_MOVTi16, ARM_INS_MOVT: movt${p} $rd, $imm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_MOVi, ARM_INS_MOV: mov${s}${p} $rd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_MOVi16, ARM_INS_MOVW: movw${p} $rd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_MOVr, ARM_INS_MOV: mov${s}${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_MOVr_TC, ARM_INS_MOV: mov${s}${p} $rd, $rm */ { 0 } }, { /* ARM_MOVsi, ARM_INS_MOV: mov${s}${p} $rd, $src */ { CS_AC_WRITE, 0 } }, { /* ARM_MOVsr, ARM_INS_MOV: mov${s}${p} $rd, $src */ { CS_AC_WRITE, 0 } }, { /* ARM_MRC, ARM_INS_MRC: mrc${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_MRC2, ARM_INS_MRC2: mrc2 $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_MRRC, ARM_INS_MRRC: mrrc${p} $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MRRC2, ARM_INS_MRRC2: mrrc2 $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MRS, ARM_INS_MRS: mrs${p} $rd, apsr */ { CS_AC_WRITE, 0 } }, { /* ARM_MRSbanked, ARM_INS_MRS: mrs${p} $rd, $banked */ { CS_AC_WRITE, 0 } }, { /* ARM_MRSsys, ARM_INS_MRS: mrs${p} $rd, spsr */ { CS_AC_WRITE, 0 } }, { /* ARM_MSR, ARM_INS_MSR: msr${p} $mask, $rn */ { CS_AC_READ, 0 } }, { /* ARM_MSRbanked, ARM_INS_MSR: msr${p} $banked, $rn */ { CS_AC_READ, 0 } }, { /* ARM_MSRi, ARM_INS_MSR: msr${p} $mask, $imm */ { 0 } }, { /* ARM_MUL, ARM_INS_MUL: mul${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_MVNi, ARM_INS_MVN: mvn${s}${p} $rd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_MVNr, ARM_INS_MVN: mvn${s}${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_MVNsi, ARM_INS_MVN: mvn${s}${p} $rd, $shift */ { CS_AC_WRITE, 0 } }, { /* ARM_MVNsr, ARM_INS_MVN: mvn${s}${p} $rd, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ORRri, ARM_INS_ORR: orr${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ORRrr, ARM_INS_ORR: orr${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_ORRrsi, ARM_INS_ORR: orr${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_ORRrsr, ARM_INS_ORR: orr${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_PKHBT, ARM_INS_PKHBT: pkhbt${p} $rd, $rn, $rm$sh */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_PKHTB, ARM_INS_PKHTB: pkhtb${p} $rd, $rn, $rm$sh */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_PLDWi12, ARM_INS_PLDW: pldw $addr */ { CS_AC_READ, 0 } }, { /* ARM_PLDWrs, ARM_INS_PLDW: pldw $shift */ { CS_AC_READ, 0 } }, { /* ARM_PLDi12, ARM_INS_PLD: pld $addr */ { CS_AC_READ, 0 } }, { /* ARM_PLDrs, ARM_INS_PLD: pld $shift */ { CS_AC_READ, 0 } }, { /* ARM_PLIi12, ARM_INS_PLI: pli $addr */ { CS_AC_READ, 0 } }, { /* ARM_PLIrs, ARM_INS_PLI: pli $shift */ { CS_AC_READ, 0 } }, { /* ARM_QADD, ARM_INS_QADD: qadd${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QADD8, ARM_INS_QADD8: qadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QASX, ARM_INS_QASX: qasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QDADD, ARM_INS_QDADD: qdadd${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QDSUB, ARM_INS_QDSUB: qdsub${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QSUB, ARM_INS_QSUB: qsub${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QSUB16, ARM_INS_QSUB16: qsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_QSUB8, ARM_INS_QSUB8: qsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_RBIT, ARM_INS_RBIT: rbit${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_REV, ARM_INS_REV: rev${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_REV16, ARM_INS_REV16: rev16${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_REVSH, ARM_INS_REVSH: revsh${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_RFEDA, ARM_INS_RFEDA: rfeda $rn */ { CS_AC_READ, 0 } }, { /* ARM_RFEDA_UPD, ARM_INS_RFEDA: rfeda $rn! */ { CS_AC_READ, 0 } }, { /* ARM_RFEDB, ARM_INS_RFEDB: rfedb $rn */ { CS_AC_READ, 0 } }, { /* ARM_RFEDB_UPD, ARM_INS_RFEDB: rfedb $rn! */ { CS_AC_READ, 0 } }, { /* ARM_RFEIA, ARM_INS_RFEIA: rfeia $rn */ { CS_AC_READ, 0 } }, { /* ARM_RFEIA_UPD, ARM_INS_RFEIA: rfeia $rn! */ { CS_AC_READ, 0 } }, { /* ARM_RFEIB, ARM_INS_RFEIB: rfeib $rn */ { CS_AC_READ, 0 } }, { /* ARM_RFEIB_UPD, ARM_INS_RFEIB: rfeib $rn! */ { CS_AC_READ, 0 } }, { /* ARM_RSBri, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_RSBrr, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_RSBrsi, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_RSBrsr, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_RSCri, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_RSCrr, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_RSCrsi, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_RSCrsr, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SADD16, ARM_INS_SADD16: sadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SADD8, ARM_INS_SADD8: sadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SASX, ARM_INS_SASX: sasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SBCri, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SBCrr, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SBCrsi, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SBCrsr, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SBFX, ARM_INS_SBFX: sbfx${p} $rd, $rn, $lsb, $width */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SDIV, ARM_INS_SDIV: sdiv${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SEL, ARM_INS_SEL: sel${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SETEND, ARM_INS_SETEND: setend $end */ { 0 } }, { /* ARM_SHA1C, ARM_INS_SHA1C: sha1c.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHA1H, ARM_INS_SHA1H: sha1h.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SHA1M, ARM_INS_SHA1M: sha1m.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHA1P, ARM_INS_SHA1P: sha1p.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHA1SU0, ARM_INS_SHA1SU0: sha1su0.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHA1SU1, ARM_INS_SHA1SU1: sha1su1.32 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SHA256H, ARM_INS_SHA256H: sha256h.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHA256H2, ARM_INS_SHA256H2: sha256h2.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHA256SU0, ARM_INS_SHA256SU0: sha256su0.32 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SHA256SU1, ARM_INS_SHA256SU1: sha256su1.32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHADD16, ARM_INS_SHADD16: shadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHASX, ARM_INS_SHASX: shasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHSAX, ARM_INS_SHSAX: shsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHSUB16, ARM_INS_SHSUB16: shsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SHSUB8, ARM_INS_SHSUB8: shsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMC, ARM_INS_SMC: smc${p} $opt */ { 0 } }, { /* ARM_SMLABB, ARM_INS_SMLABB: smlabb${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLABT, ARM_INS_SMLABT: smlabt${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLADX, ARM_INS_SMLADX: smladx${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLAL, ARM_INS_SMLAL: smlal${s}${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLALBB, ARM_INS_SMLALBB: smlalbb${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLALBT, ARM_INS_SMLALBT: smlalbt${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLALD, ARM_INS_SMLALD: smlald${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLALTT, ARM_INS_SMLALTT: smlaltt${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLATB, ARM_INS_SMLATB: smlatb${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLATT, ARM_INS_SMLATT: smlatt${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLAWB, ARM_INS_SMLAWB: smlawb${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLAWT, ARM_INS_SMLAWT: smlawt${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLSD, ARM_INS_SMLSD: smlsd${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLSDX, ARM_INS_SMLSDX: smlsdx${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLSLD, ARM_INS_SMLSLD: smlsld${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMLSLDX, ARM_INS_SMLSLDX: smlsldx${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMMLA, ARM_INS_SMMLA: smmla${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMMLAR, ARM_INS_SMMLAR: smmlar${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMMLS, ARM_INS_SMMLS: smmls${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMMLSR, ARM_INS_SMMLSR: smmlsr${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMMULR, ARM_INS_SMMULR: smmulr${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMUAD, ARM_INS_SMUAD: smuad${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMUADX, ARM_INS_SMUADX: smuadx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULBB, ARM_INS_SMULBB: smulbb${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULL, ARM_INS_SMULL: smull${s}${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULWB, ARM_INS_SMULWB: smulwb${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMULWT, ARM_INS_SMULWT: smulwt${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMUSD, ARM_INS_SMUSD: smusd${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SMUSDX, ARM_INS_SMUSDX: smusdx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SRSDA, ARM_INS_SRSDA: srsda sp, $mode */ { 0 } }, { /* ARM_SRSDA_UPD, ARM_INS_SRSDA: srsda sp!, $mode */ { 0 } }, { /* ARM_SRSDB, ARM_INS_SRSDB: srsdb sp, $mode */ { 0 } }, { /* ARM_SRSDB_UPD, ARM_INS_SRSDB: srsdb sp!, $mode */ { 0 } }, { /* ARM_SRSIA, ARM_INS_SRSIA: srsia sp, $mode */ { 0 } }, { /* ARM_SRSIA_UPD, ARM_INS_SRSIA: srsia sp!, $mode */ { 0 } }, { /* ARM_SRSIB, ARM_INS_SRSIB: srsib sp, $mode */ { 0 } }, { /* ARM_SRSIB_UPD, ARM_INS_SRSIB: srsib sp!, $mode */ { 0 } }, { /* ARM_SSAT, ARM_INS_SSAT: ssat${p} $rd, $sat_imm, $rn$sh */ { CS_AC_WRITE, 0 } }, { /* ARM_SSAT16, ARM_INS_SSAT16: ssat16${p} $rd, $sat_imm, $rn */ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_SSAX, ARM_INS_SSAX: ssax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SSUB16, ARM_INS_SSUB16: ssub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SSUB8, ARM_INS_SSUB8: ssub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2L_OFFSET, ARM_INS_STC2L: stc2l $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2L_OPTION, ARM_INS_STC2L: stc2l $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2L_POST, ARM_INS_STC2L: stc2l $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2L_PRE, ARM_INS_STC2L: stc2l $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2_OFFSET, ARM_INS_STC2: stc2 $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2_OPTION, ARM_INS_STC2: stc2 $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2_POST, ARM_INS_STC2: stc2 $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC2_PRE, ARM_INS_STC2: stc2 $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STCL_OFFSET, ARM_INS_STCL: stcl${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STCL_OPTION, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STCL_POST, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STCL_PRE, ARM_INS_STCL: stcl${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC_OFFSET, ARM_INS_STC: stc${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC_OPTION, ARM_INS_STC: stc${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC_POST, ARM_INS_STC: stc${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STC_PRE, ARM_INS_STC: stc${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STL, ARM_INS_STL: stl${p} $rt, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STLB, ARM_INS_STLB: stlb${p} $rt, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STLEX, ARM_INS_STLEX: stlex${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STLEXB, ARM_INS_STLEXB: stlexb${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STLEXD, ARM_INS_STLEXD: stlexd${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STLEXH, ARM_INS_STLEXH: stlexh${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STLH, ARM_INS_STLH: stlh${p} $rt, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STMDA, ARM_INS_STMDA: stmda${p} $rn, $regs */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STMDA_UPD, ARM_INS_STMDA: stmda${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_STMDB, ARM_INS_STMDB: stmdb${p} $rn, $regs */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STMDB_UPD, ARM_INS_STMDB: stmdb${p} $rn!, $regs */ { CS_AC_READ, 0 } }, { /* ARM_STMIA, ARM_INS_STM: stm${p} $rn, $regs */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STMIA_UPD, ARM_INS_STM: stm${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_STMIB, ARM_INS_STMIB: stmib${p} $rn, $regs */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_STRBT_POST_IMM, ARM_INS_STRBT: strbt${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRBT_POST_REG, ARM_INS_STRBT: strbt${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRB_POST_IMM, ARM_INS_STRB: strb${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRB_POST_REG, ARM_INS_STRB: strb${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRB_PRE_IMM, ARM_INS_STRB: strb${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRB_PRE_REG, ARM_INS_STRB: strb${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRBi12, ARM_INS_STRB: strb${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRBrs, ARM_INS_STRB: strb${p} $rt, $shift */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRD, ARM_INS_STRD: strd${p} $rt, $rt2, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRD_POST, ARM_INS_STRD: strd${p} $rt, $rt2, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRD_PRE, ARM_INS_STRD: strd${p} $rt, $rt2, $addr! */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STREX, ARM_INS_STREX: strex${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STREXB, ARM_INS_STREXB: strexb${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STREXD, ARM_INS_STREXD: strexd${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STREXH, ARM_INS_STREXH: strexh${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRH, ARM_INS_STRH: strh${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRHTi, ARM_INS_STRHT: strht${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRHTr, ARM_INS_STRHT: strht${p} $rt, $addr, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRH_POST, ARM_INS_STRH: strh${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_STRH_PRE, ARM_INS_STRH: strh${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRT_POST_IMM, ARM_INS_STRT: strt${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRT_POST_REG, ARM_INS_STRT: strt${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STR_POST_IMM, ARM_INS_STR: str${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STR_POST_REG, ARM_INS_STR: str${p} $rt, $addr, $offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STR_PRE_IMM, ARM_INS_STR: str${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STR_PRE_REG, ARM_INS_STR: str${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRi12, ARM_INS_STR: str${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_STRrs, ARM_INS_STR: str${p} $rt, $shift */ { CS_AC_READ, 0 } }, { /* ARM_SUBri, ARM_INS_SUB: sub${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SUBrr, ARM_INS_SUB: sub${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SUBrsi, ARM_INS_SUB: sub${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SUBrsr, ARM_INS_SUB: sub${s}${p} $rd, $rn, $shift */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SVC, ARM_INS_SVC: svc${p} $svc */ { 0 } }, { /* ARM_SWP, ARM_INS_SWP: swp${p} $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SWPB, ARM_INS_SWPB: swpb${p} $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SXTAB16, ARM_INS_SXTAB16: sxtab16${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SXTAH, ARM_INS_SXTAH: sxtah${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_SXTB, ARM_INS_SXTB: sxtb${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_SXTB16, ARM_INS_SXTB16: sxtb16${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_SXTH, ARM_INS_SXTH: sxth${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_TEQri, ARM_INS_TEQ: teq${p} $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_TEQrr, ARM_INS_TEQ: teq${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_TEQrsi, ARM_INS_TEQ: teq${p} $rn, $shift */ { CS_AC_READ, 0 } }, { /* ARM_TEQrsr, ARM_INS_TEQ: teq${p} $rn, $shift */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_TRAP, ARM_INS_TRAP: trap */ { 0 } }, { /* ARM_TRAPNaCl, ARM_INS_TRAP: trap */ { 0 } }, { /* ARM_TSTri, ARM_INS_TST: tst${p} $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_TSTrr, ARM_INS_TST: tst${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_TSTrsi, ARM_INS_TST: tst${p} $rn, $shift */ { CS_AC_READ, 0 } }, { /* ARM_TSTrsr, ARM_INS_TST: tst${p} $rn, $shift */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UADD16, ARM_INS_UADD16: uadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UADD8, ARM_INS_UADD8: uadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UASX, ARM_INS_UASX: uasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UBFX, ARM_INS_UBFX: ubfx${p} $rd, $rn, $lsb, $width */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_UDF, ARM_INS_UDF: udf $imm16 */ { 0 } }, { /* ARM_UDIV, ARM_INS_UDIV: udiv${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UHADD16, ARM_INS_UHADD16: uhadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UHADD8, ARM_INS_UHADD8: uhadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UHASX, ARM_INS_UHASX: uhasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UHSAX, ARM_INS_UHSAX: uhsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UHSUB16, ARM_INS_UHSUB16: uhsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UHSUB8, ARM_INS_UHSUB8: uhsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UMAAL, ARM_INS_UMAAL: umaal${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UMLAL, ARM_INS_UMLAL: umlal${s}${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UMULL, ARM_INS_UMULL: umull${s}${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UQADD16, ARM_INS_UQADD16: uqadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UQADD8, ARM_INS_UQADD8: uqadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UQASX, ARM_INS_UQASX: uqasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UQSUB16, ARM_INS_UQSUB16: uqsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UQSUB8, ARM_INS_UQSUB8: uqsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_USAD8, ARM_INS_USAD8: usad8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_USADA8, ARM_INS_USADA8: usada8${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_USAT, ARM_INS_USAT: usat${p} $rd, $sat_imm, $rn$sh */ { CS_AC_WRITE, 0 } }, { /* ARM_USAT16, ARM_INS_USAT16: usat16${p} $rd, $sat_imm, $rn */ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_UXTAB, ARM_INS_UXTAB: uxtab${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_UXTAB16, ARM_INS_UXTAB16: uxtab16${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_UXTAH, ARM_INS_UXTAH: uxtah${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_UXTB, ARM_INS_UXTB: uxtb${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_UXTB16, ARM_INS_UXTB16: uxtb16${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_UXTH, ARM_INS_UXTH: uxth${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_VABALsv2i64, ARM_INS_VABAL: vabal${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABALsv4i32, ARM_INS_VABAL: vabal${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABALsv8i16, ARM_INS_VABAL: vabal${p}.s8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABALuv2i64, ARM_INS_VABAL: vabal${p}.u32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABALuv4i32, ARM_INS_VABAL: vabal${p}.u16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABALuv8i16, ARM_INS_VABAL: vabal${p}.u8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAsv16i8, ARM_INS_VABA: vaba${p}.s8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAsv2i32, ARM_INS_VABA: vaba${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAsv4i16, ARM_INS_VABA: vaba${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAsv4i32, ARM_INS_VABA: vaba${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAsv8i16, ARM_INS_VABA: vaba${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAsv8i8, ARM_INS_VABA: vaba${p}.s8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAuv16i8, ARM_INS_VABA: vaba${p}.u8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAuv2i32, ARM_INS_VABA: vaba${p}.u32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAuv4i16, ARM_INS_VABA: vaba${p}.u16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAuv4i32, ARM_INS_VABA: vaba${p}.u32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAuv8i16, ARM_INS_VABA: vaba${p}.u16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABAuv8i8, ARM_INS_VABA: vaba${p}.u8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDLsv2i64, ARM_INS_VABDL: vabdl${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDLsv4i32, ARM_INS_VABDL: vabdl${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDLsv8i16, ARM_INS_VABDL: vabdl${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDLuv2i64, ARM_INS_VABDL: vabdl${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDLuv4i32, ARM_INS_VABDL: vabdl${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDLuv8i16, ARM_INS_VABDL: vabdl${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDfd, ARM_INS_VABD: vabd${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDfq, ARM_INS_VABD: vabd${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDsv16i8, ARM_INS_VABD: vabd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDsv2i32, ARM_INS_VABD: vabd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDsv4i16, ARM_INS_VABD: vabd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDsv4i32, ARM_INS_VABD: vabd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDsv8i16, ARM_INS_VABD: vabd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDsv8i8, ARM_INS_VABD: vabd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDuv16i8, ARM_INS_VABD: vabd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDuv2i32, ARM_INS_VABD: vabd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDuv4i16, ARM_INS_VABD: vabd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDuv4i32, ARM_INS_VABD: vabd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDuv8i16, ARM_INS_VABD: vabd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABDuv8i8, ARM_INS_VABD: vabd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VABSD, ARM_INS_VABS: vabs${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSS, ARM_INS_VABS: vabs${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSfd, ARM_INS_VABS: vabs${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSfq, ARM_INS_VABS: vabs${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSv16i8, ARM_INS_VABS: vabs${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSv2i32, ARM_INS_VABS: vabs${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSv4i16, ARM_INS_VABS: vabs${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSv4i32, ARM_INS_VABS: vabs${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSv8i16, ARM_INS_VABS: vabs${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VABSv8i8, ARM_INS_VABS: vabs${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VACGEd, ARM_INS_VACGE: vacge${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VACGEq, ARM_INS_VACGE: vacge${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VACGTd, ARM_INS_VACGT: vacgt${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VACGTq, ARM_INS_VACGT: vacgt${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDD, ARM_INS_VADD: vadd${p}.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDHNv2i32, ARM_INS_VADDHN: vaddhn${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDHNv4i16, ARM_INS_VADDHN: vaddhn${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDHNv8i8, ARM_INS_VADDHN: vaddhn${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDLsv2i64, ARM_INS_VADDL: vaddl${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDLsv4i32, ARM_INS_VADDL: vaddl${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDLsv8i16, ARM_INS_VADDL: vaddl${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDLuv2i64, ARM_INS_VADDL: vaddl${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDLuv4i32, ARM_INS_VADDL: vaddl${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDLuv8i16, ARM_INS_VADDL: vaddl${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDS, ARM_INS_VADD: vadd${p}.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDWsv2i64, ARM_INS_VADDW: vaddw${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDWsv4i32, ARM_INS_VADDW: vaddw${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDWsv8i16, ARM_INS_VADDW: vaddw${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDWuv2i64, ARM_INS_VADDW: vaddw${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDWuv4i32, ARM_INS_VADDW: vaddw${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDWuv8i16, ARM_INS_VADDW: vaddw${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDfd, ARM_INS_VADD: vadd${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDfq, ARM_INS_VADD: vadd${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv16i8, ARM_INS_VADD: vadd${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv1i64, ARM_INS_VADD: vadd${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv2i32, ARM_INS_VADD: vadd${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv2i64, ARM_INS_VADD: vadd${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv4i16, ARM_INS_VADD: vadd${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv4i32, ARM_INS_VADD: vadd${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv8i16, ARM_INS_VADD: vadd${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VADDv8i8, ARM_INS_VADD: vadd${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VANDd, ARM_INS_VAND: vand${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VANDq, ARM_INS_VAND: vand${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBICd, ARM_INS_VBIC: vbic${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBICiv2i32, ARM_INS_VBIC: vbic${p}.i32 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VBICiv4i16, ARM_INS_VBIC: vbic${p}.i16 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VBICiv4i32, ARM_INS_VBIC: vbic${p}.i32 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VBICiv8i16, ARM_INS_VBIC: vbic${p}.i16 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VBICq, ARM_INS_VBIC: vbic${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBIFd, ARM_INS_VBIF: vbif${p} $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBIFq, ARM_INS_VBIF: vbif${p} $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBITd, ARM_INS_VBIT: vbit${p} $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBITq, ARM_INS_VBIT: vbit${p} $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBSLd, ARM_INS_VBSL: vbsl${p} $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VBSLq, ARM_INS_VBSL: vbsl${p} $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQfd, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQfq, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQv16i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQv2i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQv4i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQv4i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQv8i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQv8i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCEQzv16i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv2f32, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv2i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv4f32, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv4i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv4i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv8i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCEQzv8i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEfd, ARM_INS_VCGE: vcge${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEfq, ARM_INS_VCGE: vcge${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEsv16i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEsv2i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEsv4i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEsv4i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEsv8i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEsv8i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEuv16i8, ARM_INS_VCGE: vcge${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEuv2i32, ARM_INS_VCGE: vcge${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEuv4i16, ARM_INS_VCGE: vcge${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEuv4i32, ARM_INS_VCGE: vcge${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEuv8i16, ARM_INS_VCGE: vcge${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEuv8i8, ARM_INS_VCGE: vcge${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGEzv16i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv2f32, ARM_INS_VCGE: vcge${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv2i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv4f32, ARM_INS_VCGE: vcge${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv4i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv4i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv8i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGEzv8i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTfd, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTfq, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTsv16i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTsv2i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTsv4i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTsv4i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTsv8i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTsv8i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTuv16i8, ARM_INS_VCGT: vcgt${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTuv2i32, ARM_INS_VCGT: vcgt${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTuv4i16, ARM_INS_VCGT: vcgt${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTuv4i32, ARM_INS_VCGT: vcgt${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTuv8i16, ARM_INS_VCGT: vcgt${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTuv8i8, ARM_INS_VCGT: vcgt${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCGTzv16i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv2f32, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv2i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv4f32, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv4i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv4i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv8i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCGTzv8i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv16i8, ARM_INS_VCLE: vcle${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv2f32, ARM_INS_VCLE: vcle${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv2i32, ARM_INS_VCLE: vcle${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv4f32, ARM_INS_VCLE: vcle${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv4i16, ARM_INS_VCLE: vcle${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv4i32, ARM_INS_VCLE: vcle${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv8i16, ARM_INS_VCLE: vcle${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLEzv8i8, ARM_INS_VCLE: vcle${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLSv16i8, ARM_INS_VCLS: vcls${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLSv2i32, ARM_INS_VCLS: vcls${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLSv4i16, ARM_INS_VCLS: vcls${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLSv4i32, ARM_INS_VCLS: vcls${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLSv8i16, ARM_INS_VCLS: vcls${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLSv8i8, ARM_INS_VCLS: vcls${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv16i8, ARM_INS_VCLT: vclt${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv2f32, ARM_INS_VCLT: vclt${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv2i32, ARM_INS_VCLT: vclt${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv4f32, ARM_INS_VCLT: vclt${p}.f32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv4i16, ARM_INS_VCLT: vclt${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv4i32, ARM_INS_VCLT: vclt${p}.s32 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv8i16, ARM_INS_VCLT: vclt${p}.s16 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLTzv8i8, ARM_INS_VCLT: vclt${p}.s8 $vd, $vm, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLZv16i8, ARM_INS_VCLZ: vclz${p}.i8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLZv2i32, ARM_INS_VCLZ: vclz${p}.i32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLZv4i16, ARM_INS_VCLZ: vclz${p}.i16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLZv4i32, ARM_INS_VCLZ: vclz${p}.i32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLZv8i16, ARM_INS_VCLZ: vclz${p}.i16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCLZv8i8, ARM_INS_VCLZ: vclz${p}.i8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCMPD, ARM_INS_VCMP: vcmp${p}.f64 $dd, $dm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCMPED, ARM_INS_VCMPE: vcmpe${p}.f64 $dd, $dm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCMPES, ARM_INS_VCMPE: vcmpe${p}.f32 $sd, $sm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCMPEZD, ARM_INS_VCMPE: vcmpe${p}.f64 $dd, #0 */ { CS_AC_READ, 0 } }, { /* ARM_VCMPEZS, ARM_INS_VCMPE: vcmpe${p}.f32 $sd, #0 */ { CS_AC_READ, 0 } }, { /* ARM_VCMPS, ARM_INS_VCMP: vcmp${p}.f32 $sd, $sm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VCMPZD, ARM_INS_VCMP: vcmp${p}.f64 $dd, #0 */ { CS_AC_READ, 0 } }, { /* ARM_VCMPZS, ARM_INS_VCMP: vcmp${p}.f32 $sd, #0 */ { CS_AC_READ, 0 } }, { /* ARM_VCNTd, ARM_INS_VCNT: vcnt${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCNTq, ARM_INS_VCNT: vcnt${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTANSD, ARM_INS_VCVTA: vcvta.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTANSQ, ARM_INS_VCVTA: vcvta.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTANUD, ARM_INS_VCVTA: vcvta.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTANUQ, ARM_INS_VCVTA: vcvta.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTASD, ARM_INS_VCVTA: vcvta.s32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTASS, ARM_INS_VCVTA: vcvta.s32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTAUD, ARM_INS_VCVTA: vcvta.u32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTAUS, ARM_INS_VCVTA: vcvta.u32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTBDH, ARM_INS_VCVTB: vcvtb${p}.f16.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTBHD, ARM_INS_VCVTB: vcvtb${p}.f64.f16 $dd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTBHS, ARM_INS_VCVTB: vcvtb${p}.f32.f16 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTBSH, ARM_INS_VCVTB: vcvtb${p}.f16.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTDS, ARM_INS_VCVT: vcvt${p}.f64.f32 $dd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMNSD, ARM_INS_VCVTM: vcvtm.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMNSQ, ARM_INS_VCVTM: vcvtm.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMNUD, ARM_INS_VCVTM: vcvtm.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMNUQ, ARM_INS_VCVTM: vcvtm.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMSD, ARM_INS_VCVTM: vcvtm.s32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMSS, ARM_INS_VCVTM: vcvtm.s32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMUD, ARM_INS_VCVTM: vcvtm.u32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTMUS, ARM_INS_VCVTM: vcvtm.u32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNNSD, ARM_INS_VCVTN: vcvtn.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNNSQ, ARM_INS_VCVTN: vcvtn.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNNUD, ARM_INS_VCVTN: vcvtn.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNNUQ, ARM_INS_VCVTN: vcvtn.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNSD, ARM_INS_VCVTN: vcvtn.s32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNSS, ARM_INS_VCVTN: vcvtn.s32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNUD, ARM_INS_VCVTN: vcvtn.u32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTNUS, ARM_INS_VCVTN: vcvtn.u32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPNSD, ARM_INS_VCVTP: vcvtp.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPNSQ, ARM_INS_VCVTP: vcvtp.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPNUD, ARM_INS_VCVTP: vcvtp.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPNUQ, ARM_INS_VCVTP: vcvtp.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPSD, ARM_INS_VCVTP: vcvtp.s32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPSS, ARM_INS_VCVTP: vcvtp.s32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPUD, ARM_INS_VCVTP: vcvtp.u32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTPUS, ARM_INS_VCVTP: vcvtp.u32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTSD, ARM_INS_VCVT: vcvt${p}.f32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTTDH, ARM_INS_VCVTT: vcvtt${p}.f16.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTTHD, ARM_INS_VCVTT: vcvtt${p}.f64.f16 $dd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTTHS, ARM_INS_VCVTT: vcvtt${p}.f32.f16 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTTSH, ARM_INS_VCVTT: vcvtt${p}.f16.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2h, ARM_INS_VCVT: vcvt${p}.f16.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2sd, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2sq, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2ud, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2uq, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2xsd, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2xsq, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2xud, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTf2xuq, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTh2f, ARM_INS_VCVT: vcvt${p}.f32.f16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTs2fd, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTs2fq, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTu2fd, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTu2fq, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTxs2fd, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTxs2fq, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTxu2fd, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VCVTxu2fq, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDIVD, ARM_INS_VDIV: vdiv${p}.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VDIVS, ARM_INS_VDIV: vdiv${p}.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VDUP16d, ARM_INS_VDUP: vdup${p}.16 $v, $r */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUP16q, ARM_INS_VDUP: vdup${p}.16 $v, $r */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUP32d, ARM_INS_VDUP: vdup${p}.32 $v, $r */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUP32q, ARM_INS_VDUP: vdup${p}.32 $v, $r */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUP8d, ARM_INS_VDUP: vdup${p}.8 $v, $r */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUP8q, ARM_INS_VDUP: vdup${p}.8 $v, $r */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUPLN16d, ARM_INS_VDUP: vdup${p}.16 $vd, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUPLN16q, ARM_INS_VDUP: vdup${p}.16 $vd, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUPLN32d, ARM_INS_VDUP: vdup${p}.32 $vd, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUPLN32q, ARM_INS_VDUP: vdup${p}.32 $vd, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUPLN8d, ARM_INS_VDUP: vdup${p}.8 $vd, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VDUPLN8q, ARM_INS_VDUP: vdup${p}.8 $vd, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VEORd, ARM_INS_VEOR: veor${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEORq, ARM_INS_VEOR: veor${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTd16, ARM_INS_VEXT: vext${p}.16 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTd32, ARM_INS_VEXT: vext${p}.32 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTd8, ARM_INS_VEXT: vext${p}.8 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTq16, ARM_INS_VEXT: vext${p}.16 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTq32, ARM_INS_VEXT: vext${p}.32 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTq64, ARM_INS_VEXT: vext${p}.64 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VEXTq8, ARM_INS_VEXT: vext${p}.8 $vd, $vn, $vm, $index */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMAD, ARM_INS_VFMA: vfma${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMAS, ARM_INS_VFMA: vfma${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMAfd, ARM_INS_VFMA: vfma${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMAfq, ARM_INS_VFMA: vfma${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMSD, ARM_INS_VFMS: vfms${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMSS, ARM_INS_VFMS: vfms${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMSfd, ARM_INS_VFMS: vfms${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFMSfq, ARM_INS_VFMS: vfms${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFNMAD, ARM_INS_VFNMA: vfnma${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFNMAS, ARM_INS_VFNMA: vfnma${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFNMSD, ARM_INS_VFNMS: vfnms${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VFNMSS, ARM_INS_VFNMS: vfnms${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VGETLNi32, ARM_INS_VMOV: vmov${p}.32 $r, $v$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VGETLNs16, ARM_INS_VMOV: vmov${p}.s16 $r, $v$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VGETLNs8, ARM_INS_VMOV: vmov${p}.s8 $r, $v$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VGETLNu16, ARM_INS_VMOV: vmov${p}.u16 $r, $v$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VGETLNu8, ARM_INS_VMOV: vmov${p}.u8 $r, $v$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VHADDsv16i8, ARM_INS_VHADD: vhadd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDsv2i32, ARM_INS_VHADD: vhadd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDsv4i16, ARM_INS_VHADD: vhadd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDsv4i32, ARM_INS_VHADD: vhadd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDsv8i16, ARM_INS_VHADD: vhadd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDsv8i8, ARM_INS_VHADD: vhadd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDuv16i8, ARM_INS_VHADD: vhadd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDuv2i32, ARM_INS_VHADD: vhadd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDuv4i16, ARM_INS_VHADD: vhadd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDuv4i32, ARM_INS_VHADD: vhadd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDuv8i16, ARM_INS_VHADD: vhadd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHADDuv8i8, ARM_INS_VHADD: vhadd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBsv16i8, ARM_INS_VHSUB: vhsub${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBsv2i32, ARM_INS_VHSUB: vhsub${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBsv4i16, ARM_INS_VHSUB: vhsub${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBsv4i32, ARM_INS_VHSUB: vhsub${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBsv8i16, ARM_INS_VHSUB: vhsub${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBsv8i8, ARM_INS_VHSUB: vhsub${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBuv16i8, ARM_INS_VHSUB: vhsub${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBuv2i32, ARM_INS_VHSUB: vhsub${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBuv4i16, ARM_INS_VHSUB: vhsub${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBuv4i32, ARM_INS_VHSUB: vhsub${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBuv8i16, ARM_INS_VHSUB: vhsub${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VHSUBuv8i8, ARM_INS_VHSUB: vhsub${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPd8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1DUPq8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1LNd16, ARM_INS_VLD1: vld1${p}.16 \{$vd[$lane]\}, $rn */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1LNd16_UPD, ARM_INS_VLD1: vld1${p}.16 \{$vd[$lane]\}, $rn$rm */ { CS_AC_WRITE, 0 } }, { /* ARM_VLD1LNd32, ARM_INS_VLD1: vld1${p}.32 \{$vd[$lane]\}, $rn */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VLD1LNd32_UPD, ARM_INS_VLD1: vld1${p}.32 \{$vd[$lane]\}, $rn$rm */ { CS_AC_WRITE, 0 } }, { /* ARM_VLD1LNd8, ARM_INS_VLD1: vld1${p}.8 \{$vd[$lane]\}, $rn */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1LNd8_UPD, ARM_INS_VLD1: vld1${p}.8 \{$vd[$lane]\}, $rn$rm */ { CS_AC_WRITE, 0 } }, { /* ARM_VLD1d16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d16Q, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d16Qwb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d16Qwb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d16T, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d16Twb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d16Twb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d32Q, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d32Qwb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d32Qwb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d32T, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d32Twb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d32Twb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d64, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d64Q, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d64Qwb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d64Qwb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d64T, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d64Twb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d64Twb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d64wb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d64wb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d8Q, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d8Qwb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d8Qwb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d8T, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d8Twb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d8Twb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1d8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1d8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1q16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1q32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1q64, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q64wb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q64wb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD1q8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD1q8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd16x2, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd32x2, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd8x2, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2LNd16, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2LNd16_UPD, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD2LNd32, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2LNd32_UPD, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD2LNd8, ARM_INS_VLD2: vld2${p}.8 \{$vd[$lane], $dst2[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2LNd8_UPD, ARM_INS_VLD2: vld2${p}.8 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD2LNq16, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2LNq16_UPD, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD2LNq32, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2LNq32_UPD, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD2b16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2b16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2b16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2b32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2b32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2b32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2b8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2b8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2b8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2d16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2d16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2d16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2d32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2d32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2d32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2d8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2d8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2d8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2q16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2q16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2q16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2q32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2q32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2q32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD2q8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2q8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD2q8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPd16, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPd16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPd32, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPd32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPd8, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPd8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPq16, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPq16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPq32, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPq32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPq8, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3DUPq8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3LNd16, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3LNd16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3LNd32, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3LNd32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3LNd8, ARM_INS_VLD3: vld3${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3LNd8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3LNq16, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3LNq16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3LNq32, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3LNq32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3d16, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3d16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3d32, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3d32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3d8, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3d8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3q16, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3q16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3q32, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3q32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD3q8, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD3q8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4DUPd16, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPd16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPd32, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPd32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPd8, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPd8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPq16, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPq16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPq32, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPq32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPq8, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4DUPq8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4LNd16, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4LNd16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4LNd32, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4LNd32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4LNd8, ARM_INS_VLD4: vld4${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4LNd8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4LNq16, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4LNq16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4LNq32, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4LNq32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4d16, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4d16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4d32, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4d32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4d8, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4d8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4q16, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4q16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4q32, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4q32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLD4q8, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VLD4q8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VLDMDDB_UPD, ARM_INS_VLDMDB: vldmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VLDMDIA, ARM_INS_VLDMIA: vldmia${p} $rn, $regs */ { CS_AC_READ, 0 } }, { /* ARM_VLDMDIA_UPD, ARM_INS_VLDMIA: vldmia${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VLDMSDB_UPD, ARM_INS_VLDMDB: vldmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VLDMSIA, ARM_INS_VLDMIA: vldmia${p} $rn, $regs */ { CS_AC_READ, 0 } }, { /* ARM_VLDMSIA_UPD, ARM_INS_VLDMIA: vldmia${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VLDRD, ARM_INS_VLDR: vldr${p} $dd, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_VLDRS, ARM_INS_VLDR: vldr${p} $sd, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_VMAXNMD, ARM_INS_VMAXNM: vmaxnm.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXNMND, ARM_INS_VMAXNM: vmaxnm.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXNMNQ, ARM_INS_VMAXNM: vmaxnm.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXNMS, ARM_INS_VMAXNM: vmaxnm.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXfd, ARM_INS_VMAX: vmax${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXfq, ARM_INS_VMAX: vmax${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXsv16i8, ARM_INS_VMAX: vmax${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXsv2i32, ARM_INS_VMAX: vmax${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXsv4i16, ARM_INS_VMAX: vmax${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXsv4i32, ARM_INS_VMAX: vmax${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXsv8i16, ARM_INS_VMAX: vmax${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXsv8i8, ARM_INS_VMAX: vmax${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXuv16i8, ARM_INS_VMAX: vmax${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXuv2i32, ARM_INS_VMAX: vmax${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXuv4i16, ARM_INS_VMAX: vmax${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXuv4i32, ARM_INS_VMAX: vmax${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXuv8i16, ARM_INS_VMAX: vmax${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMAXuv8i8, ARM_INS_VMAX: vmax${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINNMD, ARM_INS_VMINNM: vminnm.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINNMND, ARM_INS_VMINNM: vminnm.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINNMNQ, ARM_INS_VMINNM: vminnm.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINNMS, ARM_INS_VMINNM: vminnm.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINfd, ARM_INS_VMIN: vmin${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINfq, ARM_INS_VMIN: vmin${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINsv16i8, ARM_INS_VMIN: vmin${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINsv2i32, ARM_INS_VMIN: vmin${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINsv4i16, ARM_INS_VMIN: vmin${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINsv4i32, ARM_INS_VMIN: vmin${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINsv8i16, ARM_INS_VMIN: vmin${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINsv8i8, ARM_INS_VMIN: vmin${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINuv16i8, ARM_INS_VMIN: vmin${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINuv2i32, ARM_INS_VMIN: vmin${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINuv4i16, ARM_INS_VMIN: vmin${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINuv4i32, ARM_INS_VMIN: vmin${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINuv8i16, ARM_INS_VMIN: vmin${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMINuv8i8, ARM_INS_VMIN: vmin${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAD, ARM_INS_VMLA: vmla${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLALslsv2i32, ARM_INS_VMLAL: vmlal${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLALslsv4i16, ARM_INS_VMLAL: vmlal${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLALsluv2i32, ARM_INS_VMLAL: vmlal${p}.u32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLALsluv4i16, ARM_INS_VMLAL: vmlal${p}.u16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLALsv2i64, ARM_INS_VMLAL: vmlal${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLALsv4i32, ARM_INS_VMLAL: vmlal${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLALsv8i16, ARM_INS_VMLAL: vmlal${p}.s8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLALuv2i64, ARM_INS_VMLAL: vmlal${p}.u32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLALuv4i32, ARM_INS_VMLAL: vmlal${p}.u16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLALuv8i16, ARM_INS_VMLAL: vmlal${p}.u8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAS, ARM_INS_VMLA: vmla${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAfd, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAfq, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAslfd, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLAslfq, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLAslv2i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLAslv4i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLAslv4i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLAslv8i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLAv16i8, ARM_INS_VMLA: vmla${p}.i8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAv2i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAv4i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAv4i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAv8i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLAv8i8, ARM_INS_VMLA: vmla${p}.i8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSD, ARM_INS_VMLS: vmls${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSLslsv2i32, ARM_INS_VMLSL: vmlsl${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSLslsv4i16, ARM_INS_VMLSL: vmlsl${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSLsluv2i32, ARM_INS_VMLSL: vmlsl${p}.u32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSLsluv4i16, ARM_INS_VMLSL: vmlsl${p}.u16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSLsv2i64, ARM_INS_VMLSL: vmlsl${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSLsv4i32, ARM_INS_VMLSL: vmlsl${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSLsv8i16, ARM_INS_VMLSL: vmlsl${p}.s8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSLuv2i64, ARM_INS_VMLSL: vmlsl${p}.u32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSLuv4i32, ARM_INS_VMLSL: vmlsl${p}.u16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSLuv8i16, ARM_INS_VMLSL: vmlsl${p}.u8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSS, ARM_INS_VMLS: vmls${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSfd, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSfq, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSslfd, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSslfq, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSslv2i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSslv4i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSslv4i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSslv8i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMLSv16i8, ARM_INS_VMLS: vmls${p}.i8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSv2i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSv4i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSv4i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSv8i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMLSv8i8, ARM_INS_VMLS: vmls${p}.i8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMOVD, ARM_INS_VMOV: vmov${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVDRR, ARM_INS_VMOV: vmov${p} $dm, $rt, $rt2 */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMOVLsv2i64, ARM_INS_VMOVL: vmovl${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVLsv4i32, ARM_INS_VMOVL: vmovl${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVLsv8i16, ARM_INS_VMOVL: vmovl${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVLuv2i64, ARM_INS_VMOVL: vmovl${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVLuv4i32, ARM_INS_VMOVL: vmovl${p}.u16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVLuv8i16, ARM_INS_VMOVL: vmovl${p}.u8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVNv2i32, ARM_INS_VMOVN: vmovn${p}.i64 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVNv4i16, ARM_INS_VMOVN: vmovn${p}.i32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVNv8i8, ARM_INS_VMOVN: vmovn${p}.i16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVRRD, ARM_INS_VMOV: vmov${p} $rt, $rt2, $dm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVRRS, ARM_INS_VMOV: vmov${p} $rt, $rt2, $src1, $src2 */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMOVRS, ARM_INS_VMOV: vmov${p} $rt, $sn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVS, ARM_INS_VMOV: vmov${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVSR, ARM_INS_VMOV: vmov${p} $sn, $rt */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMOVSRR, ARM_INS_VMOV: vmov${p} $dst1, $dst2, $src1, $src2 */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMOVv16i8, ARM_INS_VMOV: vmov${p}.i8 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv1i64, ARM_INS_VMOV: vmov${p}.i64 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv2f32, ARM_INS_VMOV: vmov${p}.f32 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv2i32, ARM_INS_VMOV: vmov${p}.i32 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv2i64, ARM_INS_VMOV: vmov${p}.i64 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv4f32, ARM_INS_VMOV: vmov${p}.f32 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv4i16, ARM_INS_VMOV: vmov${p}.i16 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv4i32, ARM_INS_VMOV: vmov${p}.i32 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv8i16, ARM_INS_VMOV: vmov${p}.i16 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMOVv8i8, ARM_INS_VMOV: vmov${p}.i8 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS, ARM_INS_VMRS: vmrs${p} $rt, fpscr */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_FPEXC, ARM_INS_VMRS: vmrs${p} $rt, fpexc */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_FPINST, ARM_INS_VMRS: vmrs${p} $rt, fpinst */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_FPINST2, ARM_INS_VMRS: vmrs${p} $rt, fpinst2 */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_FPSID, ARM_INS_VMRS: vmrs${p} $rt, fpsid */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_MVFR0, ARM_INS_VMRS: vmrs${p} $rt, mvfr0 */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_MVFR1, ARM_INS_VMRS: vmrs${p} $rt, mvfr1 */ { CS_AC_WRITE, 0 } }, { /* ARM_VMRS_MVFR2, ARM_INS_VMRS: vmrs${p} $rt, mvfr2 */ { CS_AC_WRITE, 0 } }, { /* ARM_VMSR, ARM_INS_VMSR: vmsr${p} fpscr, $src */ { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_VMSR_FPEXC, ARM_INS_VMSR: vmsr${p} fpexc, $src */ { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_VMSR_FPINST, ARM_INS_VMSR: vmsr${p} fpinst, $src */ { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_VMSR_FPINST2, ARM_INS_VMSR: vmsr${p} fpinst2, $src */ { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_VMSR_FPSID, ARM_INS_VMSR: vmsr${p} fpsid, $src */ { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_VMULD, ARM_INS_VMUL: vmul${p}.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLp64, ARM_INS_VMULL: vmull.p64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLp8, ARM_INS_VMULL: vmull${p}.p8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLslsv2i32, ARM_INS_VMULL: vmull${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULLslsv4i16, ARM_INS_VMULL: vmull${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULLsluv2i32, ARM_INS_VMULL: vmull${p}.u32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULLsluv4i16, ARM_INS_VMULL: vmull${p}.u16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULLsv2i64, ARM_INS_VMULL: vmull${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLsv4i32, ARM_INS_VMULL: vmull${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLsv8i16, ARM_INS_VMULL: vmull${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLuv2i64, ARM_INS_VMULL: vmull${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLuv4i32, ARM_INS_VMULL: vmull${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULLuv8i16, ARM_INS_VMULL: vmull${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULS, ARM_INS_VMUL: vmul${p}.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULfd, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULfq, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULpd, ARM_INS_VMUL: vmul${p}.p8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULpq, ARM_INS_VMUL: vmul${p}.p8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULslfd, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULslfq, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULslv2i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULslv4i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULslv4i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULslv8i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMULv16i8, ARM_INS_VMUL: vmul${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULv2i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULv4i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULv4i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULv8i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMULv8i8, ARM_INS_VMUL: vmul${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VMVNd, ARM_INS_VMVN: vmvn${p} $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMVNq, ARM_INS_VMVN: vmvn${p} $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VMVNv2i32, ARM_INS_VMVN: vmvn${p}.i32 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMVNv4i16, ARM_INS_VMVN: vmvn${p}.i16 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMVNv4i32, ARM_INS_VMVN: vmvn${p}.i32 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VMVNv8i16, ARM_INS_VMVN: vmvn${p}.i16 $vd, $simm */ { CS_AC_WRITE, 0 } }, { /* ARM_VNEGD, ARM_INS_VNEG: vneg${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGS, ARM_INS_VNEG: vneg${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGf32q, ARM_INS_VNEG: vneg${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGfd, ARM_INS_VNEG: vneg${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGs16d, ARM_INS_VNEG: vneg${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGs16q, ARM_INS_VNEG: vneg${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGs32d, ARM_INS_VNEG: vneg${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGs32q, ARM_INS_VNEG: vneg${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGs8d, ARM_INS_VNEG: vneg${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNEGs8q, ARM_INS_VNEG: vneg${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VNMLAD, ARM_INS_VNMLA: vnmla${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VNMLAS, ARM_INS_VNMLA: vnmla${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VNMLSD, ARM_INS_VNMLS: vnmls${p}.f64 $dd, $dn, $dm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VNMLSS, ARM_INS_VNMLS: vnmls${p}.f32 $sd, $sn, $sm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VNMULD, ARM_INS_VNMUL: vnmul${p}.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VNMULS, ARM_INS_VNMUL: vnmul${p}.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VORNd, ARM_INS_VORN: vorn${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VORNq, ARM_INS_VORN: vorn${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VORRd, ARM_INS_VORR: vorr${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VORRiv2i32, ARM_INS_VORR: vorr${p}.i32 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VORRiv4i16, ARM_INS_VORR: vorr${p}.i16 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VORRiv4i32, ARM_INS_VORR: vorr${p}.i32 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VORRiv8i16, ARM_INS_VORR: vorr${p}.i16 $vd, $simm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VORRq, ARM_INS_VORR: vorr${p} $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPADALsv16i8, ARM_INS_VPADAL: vpadal${p}.s8 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALsv2i32, ARM_INS_VPADAL: vpadal${p}.s32 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALsv4i16, ARM_INS_VPADAL: vpadal${p}.s16 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALsv4i32, ARM_INS_VPADAL: vpadal${p}.s32 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALsv8i16, ARM_INS_VPADAL: vpadal${p}.s16 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALsv8i8, ARM_INS_VPADAL: vpadal${p}.s8 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALuv16i8, ARM_INS_VPADAL: vpadal${p}.u8 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALuv2i32, ARM_INS_VPADAL: vpadal${p}.u32 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALuv4i16, ARM_INS_VPADAL: vpadal${p}.u16 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALuv4i32, ARM_INS_VPADAL: vpadal${p}.u32 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALuv8i16, ARM_INS_VPADAL: vpadal${p}.u16 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADALuv8i8, ARM_INS_VPADAL: vpadal${p}.u8 $vd, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLsv16i8, ARM_INS_VPADDL: vpaddl${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLsv2i32, ARM_INS_VPADDL: vpaddl${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLsv4i16, ARM_INS_VPADDL: vpaddl${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLsv4i32, ARM_INS_VPADDL: vpaddl${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLsv8i16, ARM_INS_VPADDL: vpaddl${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLsv8i8, ARM_INS_VPADDL: vpaddl${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLuv16i8, ARM_INS_VPADDL: vpaddl${p}.u8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLuv2i32, ARM_INS_VPADDL: vpaddl${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLuv4i16, ARM_INS_VPADDL: vpaddl${p}.u16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLuv4i32, ARM_INS_VPADDL: vpaddl${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLuv8i16, ARM_INS_VPADDL: vpaddl${p}.u16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDLuv8i8, ARM_INS_VPADDL: vpaddl${p}.u8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VPADDf, ARM_INS_VPADD: vpadd${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPADDi16, ARM_INS_VPADD: vpadd${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPADDi32, ARM_INS_VPADD: vpadd${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPADDi8, ARM_INS_VPADD: vpadd${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXf, ARM_INS_VPMAX: vpmax${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXs16, ARM_INS_VPMAX: vpmax${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXs32, ARM_INS_VPMAX: vpmax${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXs8, ARM_INS_VPMAX: vpmax${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXu16, ARM_INS_VPMAX: vpmax${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXu32, ARM_INS_VPMAX: vpmax${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMAXu8, ARM_INS_VPMAX: vpmax${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINf, ARM_INS_VPMIN: vpmin${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINs16, ARM_INS_VPMIN: vpmin${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINs32, ARM_INS_VPMIN: vpmin${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINs8, ARM_INS_VPMIN: vpmin${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINu16, ARM_INS_VPMIN: vpmin${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINu32, ARM_INS_VPMIN: vpmin${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VPMINu8, ARM_INS_VPMIN: vpmin${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQABSv16i8, ARM_INS_VQABS: vqabs${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQABSv2i32, ARM_INS_VQABS: vqabs${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQABSv4i16, ARM_INS_VQABS: vqabs${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQABSv4i32, ARM_INS_VQABS: vqabs${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQABSv8i16, ARM_INS_VQABS: vqabs${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQABSv8i8, ARM_INS_VQABS: vqabs${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQADDsv16i8, ARM_INS_VQADD: vqadd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv1i64, ARM_INS_VQADD: vqadd${p}.s64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv2i32, ARM_INS_VQADD: vqadd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv2i64, ARM_INS_VQADD: vqadd${p}.s64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv4i16, ARM_INS_VQADD: vqadd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv4i32, ARM_INS_VQADD: vqadd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv8i16, ARM_INS_VQADD: vqadd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDsv8i8, ARM_INS_VQADD: vqadd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv16i8, ARM_INS_VQADD: vqadd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv1i64, ARM_INS_VQADD: vqadd${p}.u64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv2i32, ARM_INS_VQADD: vqadd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv2i64, ARM_INS_VQADD: vqadd${p}.u64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv4i16, ARM_INS_VQADD: vqadd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv4i32, ARM_INS_VQADD: vqadd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv8i16, ARM_INS_VQADD: vqadd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQADDuv8i8, ARM_INS_VQADD: vqadd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMLALv2i64, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMLALv4i32, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMLSLslv2i32, ARM_INS_VQDMLSL: vqdmlsl${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMLSLslv4i16, ARM_INS_VQDMLSL: vqdmlsl${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMLSLv2i64, ARM_INS_VQDMLSL: vqdmlsl${p}.s32 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMLSLv4i32, ARM_INS_VQDMLSL: vqdmlsl${p}.s16 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMULHslv2i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMULHslv4i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMULHslv4i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMULHslv8i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMULHv2i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMULHv4i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMULHv4i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMULHv8i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMULLslv2i32, ARM_INS_VQDMULL: vqdmull${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMULLslv4i16, ARM_INS_VQDMULL: vqdmull${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQDMULLv2i64, ARM_INS_VQDMULL: vqdmull${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQDMULLv4i32, ARM_INS_VQDMULL: vqdmull${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQMOVNsuv2i32, ARM_INS_VQMOVUN: vqmovun${p}.s64 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNsuv4i16, ARM_INS_VQMOVUN: vqmovun${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNsuv8i8, ARM_INS_VQMOVUN: vqmovun${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNsv2i32, ARM_INS_VQMOVN: vqmovn${p}.s64 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNsv4i16, ARM_INS_VQMOVN: vqmovn${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNsv8i8, ARM_INS_VQMOVN: vqmovn${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNuv2i32, ARM_INS_VQMOVN: vqmovn${p}.u64 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNuv4i16, ARM_INS_VQMOVN: vqmovn${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQMOVNuv8i8, ARM_INS_VQMOVN: vqmovn${p}.u16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQNEGv16i8, ARM_INS_VQNEG: vqneg${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQNEGv2i32, ARM_INS_VQNEG: vqneg${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQNEGv4i16, ARM_INS_VQNEG: vqneg${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQNEGv4i32, ARM_INS_VQNEG: vqneg${p}.s32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQNEGv8i16, ARM_INS_VQNEG: vqneg${p}.s16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQNEGv8i8, ARM_INS_VQNEG: vqneg${p}.s8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHslv2i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHslv4i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHslv4i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHslv8i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm$lane */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHv2i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHv4i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHv4i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRDMULHv8i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv16i8, ARM_INS_VQRSHL: vqrshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv1i64, ARM_INS_VQRSHL: vqrshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv2i32, ARM_INS_VQRSHL: vqrshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv2i64, ARM_INS_VQRSHL: vqrshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv4i16, ARM_INS_VQRSHL: vqrshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv4i32, ARM_INS_VQRSHL: vqrshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv8i16, ARM_INS_VQRSHL: vqrshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLsv8i8, ARM_INS_VQRSHL: vqrshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv16i8, ARM_INS_VQRSHL: vqrshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv1i64, ARM_INS_VQRSHL: vqrshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv2i32, ARM_INS_VQRSHL: vqrshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv2i64, ARM_INS_VQRSHL: vqrshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv4i16, ARM_INS_VQRSHL: vqrshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv4i32, ARM_INS_VQRSHL: vqrshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv8i16, ARM_INS_VQRSHL: vqrshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHLuv8i8, ARM_INS_VQRSHL: vqrshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQRSHRNsv2i32, ARM_INS_VQRSHRN: vqrshrn${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRNsv4i16, ARM_INS_VQRSHRN: vqrshrn${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRNsv8i8, ARM_INS_VQRSHRN: vqrshrn${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRNuv2i32, ARM_INS_VQRSHRN: vqrshrn${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRNuv4i16, ARM_INS_VQRSHRN: vqrshrn${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRNuv8i8, ARM_INS_VQRSHRN: vqrshrn${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRUNv2i32, ARM_INS_VQRSHRUN: vqrshrun${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRUNv4i16, ARM_INS_VQRSHRUN: vqrshrun${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQRSHRUNv8i8, ARM_INS_VQRSHRUN: vqrshrun${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv16i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv1i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv2i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv2i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv4i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv4i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv8i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsiv8i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv16i8, ARM_INS_VQSHLU: vqshlu${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv1i64, ARM_INS_VQSHLU: vqshlu${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv2i32, ARM_INS_VQSHLU: vqshlu${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv2i64, ARM_INS_VQSHLU: vqshlu${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv4i16, ARM_INS_VQSHLU: vqshlu${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv4i32, ARM_INS_VQSHLU: vqshlu${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv8i16, ARM_INS_VQSHLU: vqshlu${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsuv8i8, ARM_INS_VQSHLU: vqshlu${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv16i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv1i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv2i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv2i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv4i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv4i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv8i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLsv8i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv16i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv1i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv2i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv2i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv4i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv4i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv8i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuiv8i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv16i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv1i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv2i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv2i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv4i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv4i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv8i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHLuv8i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSHRNsv2i32, ARM_INS_VQSHRN: vqshrn${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRNsv4i16, ARM_INS_VQSHRN: vqshrn${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRNsv8i8, ARM_INS_VQSHRN: vqshrn${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRNuv2i32, ARM_INS_VQSHRN: vqshrn${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRNuv4i16, ARM_INS_VQSHRN: vqshrn${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRNuv8i8, ARM_INS_VQSHRN: vqshrn${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRUNv2i32, ARM_INS_VQSHRUN: vqshrun${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRUNv4i16, ARM_INS_VQSHRUN: vqshrun${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSHRUNv8i8, ARM_INS_VQSHRUN: vqshrun${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv16i8, ARM_INS_VQSUB: vqsub${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv1i64, ARM_INS_VQSUB: vqsub${p}.s64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv2i32, ARM_INS_VQSUB: vqsub${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv2i64, ARM_INS_VQSUB: vqsub${p}.s64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv4i16, ARM_INS_VQSUB: vqsub${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv4i32, ARM_INS_VQSUB: vqsub${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv8i16, ARM_INS_VQSUB: vqsub${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBsv8i8, ARM_INS_VQSUB: vqsub${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv16i8, ARM_INS_VQSUB: vqsub${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv1i64, ARM_INS_VQSUB: vqsub${p}.u64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv2i32, ARM_INS_VQSUB: vqsub${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv2i64, ARM_INS_VQSUB: vqsub${p}.u64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv4i16, ARM_INS_VQSUB: vqsub${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv4i32, ARM_INS_VQSUB: vqsub${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv8i16, ARM_INS_VQSUB: vqsub${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VQSUBuv8i8, ARM_INS_VQSUB: vqsub${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRADDHNv2i32, ARM_INS_VRADDHN: vraddhn${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRADDHNv4i16, ARM_INS_VRADDHN: vraddhn${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRADDHNv8i8, ARM_INS_VRADDHN: vraddhn${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRECPEd, ARM_INS_VRECPE: vrecpe${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRECPEfd, ARM_INS_VRECPE: vrecpe${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRECPEfq, ARM_INS_VRECPE: vrecpe${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRECPEq, ARM_INS_VRECPE: vrecpe${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRECPSfd, ARM_INS_VRECPS: vrecps${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRECPSfq, ARM_INS_VRECPS: vrecps${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VREV16d8, ARM_INS_VREV16: vrev16${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV16q8, ARM_INS_VREV16: vrev16${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV32d16, ARM_INS_VREV32: vrev32${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV32d8, ARM_INS_VREV32: vrev32${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV32q16, ARM_INS_VREV32: vrev32${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV32q8, ARM_INS_VREV32: vrev32${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV64d16, ARM_INS_VREV64: vrev64${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV64d32, ARM_INS_VREV64: vrev64${p}.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV64d8, ARM_INS_VREV64: vrev64${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV64q16, ARM_INS_VREV64: vrev64${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV64q32, ARM_INS_VREV64: vrev64${p}.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VREV64q8, ARM_INS_VREV64: vrev64${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRHADDsv16i8, ARM_INS_VRHADD: vrhadd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDsv2i32, ARM_INS_VRHADD: vrhadd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDsv4i16, ARM_INS_VRHADD: vrhadd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDsv4i32, ARM_INS_VRHADD: vrhadd${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDsv8i16, ARM_INS_VRHADD: vrhadd${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDsv8i8, ARM_INS_VRHADD: vrhadd${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDuv16i8, ARM_INS_VRHADD: vrhadd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDuv2i32, ARM_INS_VRHADD: vrhadd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDuv4i16, ARM_INS_VRHADD: vrhadd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDuv4i32, ARM_INS_VRHADD: vrhadd${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDuv8i16, ARM_INS_VRHADD: vrhadd${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRHADDuv8i8, ARM_INS_VRHADD: vrhadd${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRINTAD, ARM_INS_VRINTA: vrinta.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTAND, ARM_INS_VRINTA: vrinta.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTANQ, ARM_INS_VRINTA: vrinta.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTAS, ARM_INS_VRINTA: vrinta.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTMD, ARM_INS_VRINTM: vrintm.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTMND, ARM_INS_VRINTM: vrintm.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTMNQ, ARM_INS_VRINTM: vrintm.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTMS, ARM_INS_VRINTM: vrintm.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTND, ARM_INS_VRINTN: vrintn.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTNND, ARM_INS_VRINTN: vrintn.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTNNQ, ARM_INS_VRINTN: vrintn.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTNS, ARM_INS_VRINTN: vrintn.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTPD, ARM_INS_VRINTP: vrintp.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTPND, ARM_INS_VRINTP: vrintp.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTPNQ, ARM_INS_VRINTP: vrintp.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTPS, ARM_INS_VRINTP: vrintp.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTRD, ARM_INS_VRINTR: vrintr${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTRS, ARM_INS_VRINTR: vrintr${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTXD, ARM_INS_VRINTX: vrintx${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTXND, ARM_INS_VRINTX: vrintx.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTXNQ, ARM_INS_VRINTX: vrintx.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTXS, ARM_INS_VRINTX: vrintx${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTZD, ARM_INS_VRINTZ: vrintz${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTZND, ARM_INS_VRINTZ: vrintz.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTZNQ, ARM_INS_VRINTZ: vrintz.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRINTZS, ARM_INS_VRINTZ: vrintz${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv16i8, ARM_INS_VRSHL: vrshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv1i64, ARM_INS_VRSHL: vrshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv2i32, ARM_INS_VRSHL: vrshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv2i64, ARM_INS_VRSHL: vrshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv4i16, ARM_INS_VRSHL: vrshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv4i32, ARM_INS_VRSHL: vrshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv8i16, ARM_INS_VRSHL: vrshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLsv8i8, ARM_INS_VRSHL: vrshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv16i8, ARM_INS_VRSHL: vrshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv1i64, ARM_INS_VRSHL: vrshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv2i32, ARM_INS_VRSHL: vrshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv2i64, ARM_INS_VRSHL: vrshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv4i16, ARM_INS_VRSHL: vrshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv4i32, ARM_INS_VRSHL: vrshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv8i16, ARM_INS_VRSHL: vrshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHLuv8i8, ARM_INS_VRSHL: vrshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSHRNv2i32, ARM_INS_VRSHRN: vrshrn${p}.i64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRNv4i16, ARM_INS_VRSHRN: vrshrn${p}.i32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRNv8i8, ARM_INS_VRSHRN: vrshrn${p}.i16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv16i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv1i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv2i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv2i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv4i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv4i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv8i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRsv8i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv16i8, ARM_INS_VRSHR: vrshr${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv1i64, ARM_INS_VRSHR: vrshr${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv2i32, ARM_INS_VRSHR: vrshr${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv2i64, ARM_INS_VRSHR: vrshr${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv4i16, ARM_INS_VRSHR: vrshr${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv4i32, ARM_INS_VRSHR: vrshr${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv8i16, ARM_INS_VRSHR: vrshr${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSHRuv8i8, ARM_INS_VRSHR: vrshr${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSQRTEd, ARM_INS_VRSQRTE: vrsqrte${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSQRTEfd, ARM_INS_VRSQRTE: vrsqrte${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSQRTEfq, ARM_INS_VRSQRTE: vrsqrte${p}.f32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSQRTEq, ARM_INS_VRSQRTE: vrsqrte${p}.u32 $vd, $vm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSQRTSfd, ARM_INS_VRSQRTS: vrsqrts${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSQRTSfq, ARM_INS_VRSQRTS: vrsqrts${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv16i8, ARM_INS_VRSRA: vrsra${p}.s8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv1i64, ARM_INS_VRSRA: vrsra${p}.s64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv2i32, ARM_INS_VRSRA: vrsra${p}.s32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv2i64, ARM_INS_VRSRA: vrsra${p}.s64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv4i16, ARM_INS_VRSRA: vrsra${p}.s16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv4i32, ARM_INS_VRSRA: vrsra${p}.s32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv8i16, ARM_INS_VRSRA: vrsra${p}.s16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAsv8i8, ARM_INS_VRSRA: vrsra${p}.s8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv16i8, ARM_INS_VRSRA: vrsra${p}.u8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv1i64, ARM_INS_VRSRA: vrsra${p}.u64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv2i32, ARM_INS_VRSRA: vrsra${p}.u32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv2i64, ARM_INS_VRSRA: vrsra${p}.u64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv4i16, ARM_INS_VRSRA: vrsra${p}.u16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv4i32, ARM_INS_VRSRA: vrsra${p}.u32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv8i16, ARM_INS_VRSRA: vrsra${p}.u16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSRAuv8i8, ARM_INS_VRSRA: vrsra${p}.u8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VRSUBHNv2i32, ARM_INS_VRSUBHN: vrsubhn${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSUBHNv4i16, ARM_INS_VRSUBHN: vrsubhn${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VRSUBHNv8i8, ARM_INS_VRSUBHN: vrsubhn${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELEQD, ARM_INS_VSELEQ: vseleq.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELEQS, ARM_INS_VSELEQ: vseleq.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELGED, ARM_INS_VSELGE: vselge.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELGES, ARM_INS_VSELGE: vselge.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELGTD, ARM_INS_VSELGT: vselgt.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELGTS, ARM_INS_VSELGT: vselgt.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELVSD, ARM_INS_VSELVS: vselvs.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSELVSS, ARM_INS_VSELVS: vselvs.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSETLNi16, ARM_INS_VMOV: vmov${p}.16 $v$lane, $r */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSETLNi32, ARM_INS_VMOV: vmov${p}.32 $v$lane, $r */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSETLNi8, ARM_INS_VMOV: vmov${p}.8 $v$lane, $r */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLi16, ARM_INS_VSHLL: vshll${p}.i16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLi32, ARM_INS_VSHLL: vshll${p}.i32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLi8, ARM_INS_VSHLL: vshll${p}.i8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLsv2i64, ARM_INS_VSHLL: vshll${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLsv4i32, ARM_INS_VSHLL: vshll${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLsv8i16, ARM_INS_VSHLL: vshll${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLuv2i64, ARM_INS_VSHLL: vshll${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLuv4i32, ARM_INS_VSHLL: vshll${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLLuv8i16, ARM_INS_VSHLL: vshll${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv16i8, ARM_INS_VSHL: vshl${p}.i8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv1i64, ARM_INS_VSHL: vshl${p}.i64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv2i32, ARM_INS_VSHL: vshl${p}.i32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv2i64, ARM_INS_VSHL: vshl${p}.i64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv4i16, ARM_INS_VSHL: vshl${p}.i16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv4i32, ARM_INS_VSHL: vshl${p}.i32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv8i16, ARM_INS_VSHL: vshl${p}.i16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLiv8i8, ARM_INS_VSHL: vshl${p}.i8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHLsv16i8, ARM_INS_VSHL: vshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv1i64, ARM_INS_VSHL: vshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv2i32, ARM_INS_VSHL: vshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv2i64, ARM_INS_VSHL: vshl${p}.s64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv4i16, ARM_INS_VSHL: vshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv4i32, ARM_INS_VSHL: vshl${p}.s32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv8i16, ARM_INS_VSHL: vshl${p}.s16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLsv8i8, ARM_INS_VSHL: vshl${p}.s8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv16i8, ARM_INS_VSHL: vshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv1i64, ARM_INS_VSHL: vshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv2i32, ARM_INS_VSHL: vshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv2i64, ARM_INS_VSHL: vshl${p}.u64 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv4i16, ARM_INS_VSHL: vshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv4i32, ARM_INS_VSHL: vshl${p}.u32 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv8i16, ARM_INS_VSHL: vshl${p}.u16 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHLuv8i8, ARM_INS_VSHL: vshl${p}.u8 $vd, $vm, $vn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSHRNv2i32, ARM_INS_VSHRN: vshrn${p}.i64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRNv4i16, ARM_INS_VSHRN: vshrn${p}.i32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRNv8i8, ARM_INS_VSHRN: vshrn${p}.i16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv16i8, ARM_INS_VSHR: vshr${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv1i64, ARM_INS_VSHR: vshr${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv2i32, ARM_INS_VSHR: vshr${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv2i64, ARM_INS_VSHR: vshr${p}.s64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv4i16, ARM_INS_VSHR: vshr${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv4i32, ARM_INS_VSHR: vshr${p}.s32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv8i16, ARM_INS_VSHR: vshr${p}.s16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRsv8i8, ARM_INS_VSHR: vshr${p}.s8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv16i8, ARM_INS_VSHR: vshr${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv1i64, ARM_INS_VSHR: vshr${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv2i32, ARM_INS_VSHR: vshr${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv2i64, ARM_INS_VSHR: vshr${p}.u64 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv4i16, ARM_INS_VSHR: vshr${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv4i32, ARM_INS_VSHR: vshr${p}.u32 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv8i16, ARM_INS_VSHR: vshr${p}.u16 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHRuv8i8, ARM_INS_VSHR: vshr${p}.u8 $vd, $vm, $simm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSHTOD, ARM_INS_VCVT: vcvt${p}.f64.s16 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSHTOS, ARM_INS_VCVT: vcvt${p}.f32.s16 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSITOD, ARM_INS_VCVT: vcvt${p}.f64.s32 $dd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSITOS, ARM_INS_VCVT: vcvt${p}.f32.s32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv16i8, ARM_INS_VSLI: vsli${p}.8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv1i64, ARM_INS_VSLI: vsli${p}.64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv2i32, ARM_INS_VSLI: vsli${p}.32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv2i64, ARM_INS_VSLI: vsli${p}.64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv4i16, ARM_INS_VSLI: vsli${p}.16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv4i32, ARM_INS_VSLI: vsli${p}.32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv8i16, ARM_INS_VSLI: vsli${p}.16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLIv8i8, ARM_INS_VSLI: vsli${p}.8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSLTOD, ARM_INS_VCVT: vcvt${p}.f64.s32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSLTOS, ARM_INS_VCVT: vcvt${p}.f32.s32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSQRTD, ARM_INS_VSQRT: vsqrt${p}.f64 $dd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSQRTS, ARM_INS_VSQRT: vsqrt${p}.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv16i8, ARM_INS_VSRA: vsra${p}.s8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv1i64, ARM_INS_VSRA: vsra${p}.s64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv2i32, ARM_INS_VSRA: vsra${p}.s32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv2i64, ARM_INS_VSRA: vsra${p}.s64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv4i16, ARM_INS_VSRA: vsra${p}.s16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv4i32, ARM_INS_VSRA: vsra${p}.s32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv8i16, ARM_INS_VSRA: vsra${p}.s16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAsv8i8, ARM_INS_VSRA: vsra${p}.s8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv16i8, ARM_INS_VSRA: vsra${p}.u8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv1i64, ARM_INS_VSRA: vsra${p}.u64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv2i32, ARM_INS_VSRA: vsra${p}.u32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv2i64, ARM_INS_VSRA: vsra${p}.u64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv4i16, ARM_INS_VSRA: vsra${p}.u16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv4i32, ARM_INS_VSRA: vsra${p}.u32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv8i16, ARM_INS_VSRA: vsra${p}.u16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRAuv8i8, ARM_INS_VSRA: vsra${p}.u8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv16i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv1i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv2i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv2i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv4i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv4i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv8i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VSRIv8i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VST1LNd16, ARM_INS_VST1: vst1${p}.16 \{$vd[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1LNd16_UPD, ARM_INS_VST1: vst1${p}.16 \{$vd[$lane]\}, $rn$rm */ { CS_AC_READ, 0 } }, { /* ARM_VST1LNd32, ARM_INS_VST1: vst1${p}.32 \{$vd[$lane]\}, $rn */ { CS_AC_READ, 0 } }, { /* ARM_VST1LNd32_UPD, ARM_INS_VST1: vst1${p}.32 \{$vd[$lane]\}, $rn$rm */ { CS_AC_READ, 0 } }, { /* ARM_VST1LNd8, ARM_INS_VST1: vst1${p}.8 \{$vd[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1LNd8_UPD, ARM_INS_VST1: vst1${p}.8 \{$vd[$lane]\}, $rn$rm */ { CS_AC_READ, 0 } }, { /* ARM_VST1d16, ARM_INS_VST1: vst1${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16Q, ARM_INS_VST1: vst1${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16Qwb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16Qwb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16T, ARM_INS_VST1: vst1${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16Twb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16Twb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16wb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d16wb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32, ARM_INS_VST1: vst1${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32Q, ARM_INS_VST1: vst1${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32Qwb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32Qwb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32T, ARM_INS_VST1: vst1${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32Twb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32Twb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32wb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d32wb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64, ARM_INS_VST1: vst1${p}.64 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64Q, ARM_INS_VST1: vst1${p}.64 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64Qwb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64Qwb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64T, ARM_INS_VST1: vst1${p}.64 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64Twb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64Twb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64wb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d64wb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8, ARM_INS_VST1: vst1${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8Q, ARM_INS_VST1: vst1${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8Qwb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8Qwb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8T, ARM_INS_VST1: vst1${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8Twb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8Twb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8wb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1d8wb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q16, ARM_INS_VST1: vst1${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q16wb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q16wb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q32, ARM_INS_VST1: vst1${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q32wb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q32wb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q64, ARM_INS_VST1: vst1${p}.64 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q64wb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q64wb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q8, ARM_INS_VST1: vst1${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q8wb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST1q8wb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNd16, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNd16_UPD, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNd32, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNd32_UPD, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNd8, ARM_INS_VST2: vst2${p}.8 \{$vd[$lane], $src2[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNd8_UPD, ARM_INS_VST2: vst2${p}.8 \{$vd[$lane], $src2[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNq16, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNq16_UPD, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNq32, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2LNq32_UPD, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b16, ARM_INS_VST2: vst2${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b16wb_fixed, ARM_INS_VST2: vst2${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b16wb_register, ARM_INS_VST2: vst2${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b32, ARM_INS_VST2: vst2${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b32wb_fixed, ARM_INS_VST2: vst2${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b32wb_register, ARM_INS_VST2: vst2${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b8, ARM_INS_VST2: vst2${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b8wb_fixed, ARM_INS_VST2: vst2${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2b8wb_register, ARM_INS_VST2: vst2${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d16, ARM_INS_VST2: vst2${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d16wb_fixed, ARM_INS_VST2: vst2${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d16wb_register, ARM_INS_VST2: vst2${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d32, ARM_INS_VST2: vst2${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d32wb_fixed, ARM_INS_VST2: vst2${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d32wb_register, ARM_INS_VST2: vst2${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d8, ARM_INS_VST2: vst2${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d8wb_fixed, ARM_INS_VST2: vst2${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2d8wb_register, ARM_INS_VST2: vst2${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q16, ARM_INS_VST2: vst2${p}.16 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q16wb_fixed, ARM_INS_VST2: vst2${p}.16 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q16wb_register, ARM_INS_VST2: vst2${p}.16 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q32, ARM_INS_VST2: vst2${p}.32 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q32wb_fixed, ARM_INS_VST2: vst2${p}.32 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q32wb_register, ARM_INS_VST2: vst2${p}.32 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q8, ARM_INS_VST2: vst2${p}.8 $vd, $rn */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q8wb_fixed, ARM_INS_VST2: vst2${p}.8 $vd, $rn! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST2q8wb_register, ARM_INS_VST2: vst2${p}.8 $vd, $rn, $rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNd16, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNd16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNd32, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNd32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNd8, ARM_INS_VST3: vst3${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNd8_UPD, ARM_INS_VST3: vst3${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNq16, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNq16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNq32, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3LNq32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3d16, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3d16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3d32, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3d32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3d8, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3d8_UPD, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3q16, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3q16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3q32, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3q32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3q8, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST3q8_UPD, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNd16, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNd16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNd32, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNd32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNd8, ARM_INS_VST4: vst4${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNd8_UPD, ARM_INS_VST4: vst4${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNq16, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNq16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNq32, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4LNq32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4d16, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4d16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4d32, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4d32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4d8, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4d8_UPD, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4q16, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4q16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4q32, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4q32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4q8, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VST4q8_UPD, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn$rm */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSTMDDB_UPD, ARM_INS_VSTMDB: vstmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSTMDIA, ARM_INS_VSTMIA: vstmia${p} $rn, $regs */ { CS_AC_READ, 0 } }, { /* ARM_VSTMDIA_UPD, ARM_INS_VSTMIA: vstmia${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSTMSDB_UPD, ARM_INS_VSTMDB: vstmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSTMSIA, ARM_INS_VSTMIA: vstmia${p} $rn, $regs */ { CS_AC_READ, 0 } }, { /* ARM_VSTMSIA_UPD, ARM_INS_VSTMIA: vstmia${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VSTRD, ARM_INS_VSTR: vstr${p} $dd, $addr */ { CS_AC_READ, 0 } }, { /* ARM_VSTRS, ARM_INS_VSTR: vstr${p} $sd, $addr */ { CS_AC_READ, 0 } }, { /* ARM_VSUBD, ARM_INS_VSUB: vsub${p}.f64 $dd, $dn, $dm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBHNv2i32, ARM_INS_VSUBHN: vsubhn${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBHNv4i16, ARM_INS_VSUBHN: vsubhn${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBHNv8i8, ARM_INS_VSUBHN: vsubhn${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBLsv2i64, ARM_INS_VSUBL: vsubl${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBLsv4i32, ARM_INS_VSUBL: vsubl${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBLsv8i16, ARM_INS_VSUBL: vsubl${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBLuv2i64, ARM_INS_VSUBL: vsubl${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBLuv4i32, ARM_INS_VSUBL: vsubl${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBLuv8i16, ARM_INS_VSUBL: vsubl${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBS, ARM_INS_VSUB: vsub${p}.f32 $sd, $sn, $sm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBWsv2i64, ARM_INS_VSUBW: vsubw${p}.s32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBWsv4i32, ARM_INS_VSUBW: vsubw${p}.s16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBWsv8i16, ARM_INS_VSUBW: vsubw${p}.s8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBWuv2i64, ARM_INS_VSUBW: vsubw${p}.u32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBWuv4i32, ARM_INS_VSUBW: vsubw${p}.u16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBWuv8i16, ARM_INS_VSUBW: vsubw${p}.u8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBfd, ARM_INS_VSUB: vsub${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBfq, ARM_INS_VSUB: vsub${p}.f32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv16i8, ARM_INS_VSUB: vsub${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv1i64, ARM_INS_VSUB: vsub${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv2i32, ARM_INS_VSUB: vsub${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv2i64, ARM_INS_VSUB: vsub${p}.i64 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv4i16, ARM_INS_VSUB: vsub${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv4i32, ARM_INS_VSUB: vsub${p}.i32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv8i16, ARM_INS_VSUB: vsub${p}.i16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSUBv8i8, ARM_INS_VSUB: vsub${p}.i8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VSWPd, ARM_INS_VSWP: vswp${p} $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VSWPq, ARM_INS_VSWP: vswp${p} $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTBL1, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBL2, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBL3, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBL4, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBX1, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBX2, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBX3, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTBX4, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTOSHD, ARM_INS_VCVT: vcvt${p}.s16.f64 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOSHS, ARM_INS_VCVT: vcvt${p}.s16.f32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOSIRD, ARM_INS_VCVTR: vcvtr${p}.s32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOSIRS, ARM_INS_VCVTR: vcvtr${p}.s32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOSIZD, ARM_INS_VCVT: vcvt${p}.s32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOSIZS, ARM_INS_VCVT: vcvt${p}.s32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOSLD, ARM_INS_VCVT: vcvt${p}.s32.f64 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOSLS, ARM_INS_VCVT: vcvt${p}.s32.f32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOUHD, ARM_INS_VCVT: vcvt${p}.u16.f64 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOUHS, ARM_INS_VCVT: vcvt${p}.u16.f32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOUIRD, ARM_INS_VCVTR: vcvtr${p}.u32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOUIRS, ARM_INS_VCVTR: vcvtr${p}.u32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOUIZD, ARM_INS_VCVT: vcvt${p}.u32.f64 $sd, $dm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOUIZS, ARM_INS_VCVT: vcvt${p}.u32.f32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VTOULD, ARM_INS_VCVT: vcvt${p}.u32.f64 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTOULS, ARM_INS_VCVT: vcvt${p}.u32.f32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VTRNd16, ARM_INS_VTRN: vtrn${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTRNd32, ARM_INS_VTRN: vtrn${p}.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTRNd8, ARM_INS_VTRN: vtrn${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTRNq16, ARM_INS_VTRN: vtrn${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTRNq32, ARM_INS_VTRN: vtrn${p}.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTRNq8, ARM_INS_VTRN: vtrn${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VTSTv16i8, ARM_INS_VTST: vtst${p}.8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTSTv2i32, ARM_INS_VTST: vtst${p}.32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTSTv4i16, ARM_INS_VTST: vtst${p}.16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTSTv4i32, ARM_INS_VTST: vtst${p}.32 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTSTv8i16, ARM_INS_VTST: vtst${p}.16 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VTSTv8i8, ARM_INS_VTST: vtst${p}.8 $vd, $vn, $vm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_VUHTOD, ARM_INS_VCVT: vcvt${p}.f64.u16 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VUHTOS, ARM_INS_VCVT: vcvt${p}.f32.u16 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VUITOD, ARM_INS_VCVT: vcvt${p}.f64.u32 $dd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VUITOS, ARM_INS_VCVT: vcvt${p}.f32.u32 $sd, $sm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_VULTOD, ARM_INS_VCVT: vcvt${p}.f64.u32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VULTOS, ARM_INS_VCVT: vcvt${p}.f32.u32 $dst, $a, $fbits */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_VUZPd16, ARM_INS_VUZP: vuzp${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VUZPd8, ARM_INS_VUZP: vuzp${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VUZPq16, ARM_INS_VUZP: vuzp${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VUZPq32, ARM_INS_VUZP: vuzp${p}.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VUZPq8, ARM_INS_VUZP: vuzp${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VZIPd16, ARM_INS_VZIP: vzip${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VZIPd8, ARM_INS_VZIP: vzip${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VZIPq16, ARM_INS_VZIP: vzip${p}.16 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VZIPq32, ARM_INS_VZIP: vzip${p}.32 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_VZIPq8, ARM_INS_VZIP: vzip${p}.8 $vd, $vm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMDA, ARM_INS_LDMDA: ldmda${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMDA_UPD, ARM_INS_LDMDA: ldmda${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMDB, ARM_INS_LDMDB: ldmdb${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMDB_UPD, ARM_INS_LDMDB: ldmdb${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMIA, ARM_INS_LDM: ldm${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMIA_UPD, ARM_INS_LDM: ldm${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMIB, ARM_INS_LDMIB: ldmib${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_sysLDMIB_UPD, ARM_INS_LDMIB: ldmib${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_sysSTMDA, ARM_INS_STMDA: stmda${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_sysSTMDA_UPD, ARM_INS_STMDA: stmda${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_sysSTMDB, ARM_INS_STMDB: stmdb${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_sysSTMDB_UPD, ARM_INS_STMDB: stmdb${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_sysSTMIA, ARM_INS_STM: stm${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_sysSTMIA_UPD, ARM_INS_STM: stm${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_sysSTMIB, ARM_INS_STMIB: stmib${p} $rn, $regs ^ */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_sysSTMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs ^ */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ADCri, ARM_INS_ADC: adc${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ADCrr, ARM_INS_ADC: adc${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2ADCrs, ARM_INS_ADC: adc${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ADDri, ARM_INS_ADD: add${s}${p}.w $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ADDri12, ARM_INS_ADDW: addw${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ADDrr, ARM_INS_ADD: add${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2ADDrs, ARM_INS_ADD: add${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ADR, ARM_INS_ADR: adr{$p}.w $rd, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2ANDri, ARM_INS_AND: and${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ANDrr, ARM_INS_AND: and${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2ANDrs, ARM_INS_AND: and${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ASRri, ARM_INS_ASR: asr${s}${p}.w $rd, $rm, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ASRrr, ARM_INS_ASR: asr${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2B, ARM_INS_B: b${p}.w $target */ { 0 } }, { /* ARM_t2BFC, ARM_INS_BFC: bfc${p} $rd, $imm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_t2BFI, ARM_INS_BFI: bfi${p} $rd, $rn, $imm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2BICri, ARM_INS_BIC: bic${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2BICrr, ARM_INS_BIC: bic${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2BICrs, ARM_INS_BIC: bic${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2BXJ, ARM_INS_BXJ: bxj${p} $func */ { CS_AC_READ, 0 } }, { /* ARM_t2Bcc, ARM_INS_B: b${p}.w $target */ { 0 } }, { /* ARM_t2CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_t2CDP2, ARM_INS_CDP2: cdp2${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_t2CLREX, ARM_INS_CLREX: clrex${p} */ { 0 } }, { /* ARM_t2CLZ, ARM_INS_CLZ: clz${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2CMNri, ARM_INS_CMN: cmn${p}.w $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_t2CMNzrr, ARM_INS_CMN: cmn${p}.w $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CMNzrs, ARM_INS_CMN: cmn${p}.w $rn, $shiftedrm */ { CS_AC_READ, 0 } }, { /* ARM_t2CMPri, ARM_INS_CMP: cmp${p}.w $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_t2CMPrr, ARM_INS_CMP: cmp${p}.w $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CMPrs, ARM_INS_CMP: cmp${p}.w $rn, $shiftedrm */ { CS_AC_READ, 0 } }, { /* ARM_t2CPS1p, ARM_INS_CPS: cps $mode */ { 0 } }, { /* ARM_t2CPS2p, ARM_INS_CPS: cps$imod.w $iflags */ { 0 } }, { /* ARM_t2CPS3p, ARM_INS_CPS: cps$imod $iflags, $mode */ { 0 } }, { /* ARM_t2CRC32B, ARM_INS_CRC32B: crc32b $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CRC32CB, ARM_INS_CRC32CB: crc32cb $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CRC32CH, ARM_INS_CRC32CH: crc32ch $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CRC32CW, ARM_INS_CRC32CW: crc32cw $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CRC32H, ARM_INS_CRC32H: crc32h $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2CRC32W, ARM_INS_CRC32W: crc32w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2DBG, ARM_INS_DBG: dbg${p} $opt */ { 0 } }, { /* ARM_t2DCPS1, ARM_INS_DCPS1: dcps1${p} */ { 0 } }, { /* ARM_t2DCPS2, ARM_INS_DCPS2: dcps2${p} */ { 0 } }, { /* ARM_t2DCPS3, ARM_INS_DCPS3: dcps3${p} */ { 0 } }, { /* ARM_t2DMB, ARM_INS_DMB: dmb${p} $opt */ { 0 } }, { /* ARM_t2DSB, ARM_INS_DSB: dsb${p} $opt */ { 0 } }, { /* ARM_t2EORri, ARM_INS_EOR: eor${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2EORrr, ARM_INS_EOR: eor${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2EORrs, ARM_INS_EOR: eor${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2HINT, ARM_INS_HINT: hint${p}.w $imm */ { 0 } }, { /* ARM_t2HVC, ARM_INS_HVC: hvc.w $imm16 */ { 0 } }, { /* ARM_t2ISB, ARM_INS_ISB: isb${p} $opt */ { 0 } }, { /* ARM_t2IT, ARM_INS_IT: it$mask $cc */ { 0 } }, { /* ARM_t2LDA, ARM_INS_LDA: lda${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDAB, ARM_INS_LDAB: ldab${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDAEX, ARM_INS_LDAEX: ldaex${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDAEXD, ARM_INS_LDAEXD: ldaexd${p} $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDAEXH, ARM_INS_LDAEXH: ldaexh${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDAH, ARM_INS_LDAH: ldah${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDC2L_OFFSET, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2L_OPTION, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2L_POST, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2L_PRE, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2_OFFSET, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2_OPTION, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2_POST, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC2_PRE, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDCL_OFFSET, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDCL_OPTION, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDCL_POST, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDCL_PRE, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC_OFFSET, ARM_INS_LDC: ldc${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC_OPTION, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC_POST, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDC_PRE, ARM_INS_LDC: ldc${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LDMDB, ARM_INS_LDMDB: ldmdb${p} $rn, $regs */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2LDMDB_UPD, ARM_INS_LDMDB: ldmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_t2LDMIA, ARM_INS_LDM: ldm${p}.w $rn, $regs */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2LDMIA_UPD, ARM_INS_LDM: ldm${p}.w $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_t2LDRBT, ARM_INS_LDRBT: ldrbt${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRB_POST, ARM_INS_LDRB: ldrb${p} $rt, $rn$offset */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRB_PRE, ARM_INS_LDRB: ldrb${p} $rt, $addr! */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRBi12, ARM_INS_LDRB: ldrb${p}.w $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRBi8, ARM_INS_LDRB: ldrb${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRBpci, ARM_INS_LDRB: ldrb${p}.w $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRBs, ARM_INS_LDRB: ldrb${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRD_POST, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr$imm */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_t2LDRD_PRE, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr! */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_t2LDRDi8, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_WRITE, 0 } }, { /* ARM_t2LDREX, ARM_INS_LDREX: ldrex${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDREXB, ARM_INS_LDREXB: ldrexb${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDREXD, ARM_INS_LDREXD: ldrexd${p} $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDREXH, ARM_INS_LDREXH: ldrexh${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRHT, ARM_INS_LDRHT: ldrht${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRH_POST, ARM_INS_LDRH: ldrh${p} $rt, $rn$offset */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRH_PRE, ARM_INS_LDRH: ldrh${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRHi12, ARM_INS_LDRH: ldrh${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRHi8, ARM_INS_LDRH: ldrh${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRHpci, ARM_INS_LDRH: ldrh${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRHs, ARM_INS_LDRH: ldrh${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSBT, ARM_INS_LDRSBT: ldrsbt${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSB_POST, ARM_INS_LDRSB: ldrsb${p} $rt, $rn$offset */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRSB_PRE, ARM_INS_LDRSB: ldrsb${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSBi12, ARM_INS_LDRSB: ldrsb${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSBi8, ARM_INS_LDRSB: ldrsb${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSBpci, ARM_INS_LDRSB: ldrsb${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSBs, ARM_INS_LDRSB: ldrsb${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSHT, ARM_INS_LDRSHT: ldrsht${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSH_POST, ARM_INS_LDRSH: ldrsh${p} $rt, $rn$offset */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRSH_PRE, ARM_INS_LDRSH: ldrsh${p} $rt, $addr! */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSHi12, ARM_INS_LDRSH: ldrsh${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSHi8, ARM_INS_LDRSH: ldrsh${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSHpci, ARM_INS_LDRSH: ldrsh${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRSHs, ARM_INS_LDRSH: ldrsh${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LDRT, ARM_INS_LDRT: ldrt${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDR_POST, ARM_INS_LDR: ldr${p} $rt, $rn$offset */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDR_PRE, ARM_INS_LDR: ldr${p} $rt, $addr! */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRi12, ARM_INS_LDR: ldr${p}.w $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRi8, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRpci, ARM_INS_LDR: ldr${p}.w $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2LDRs, ARM_INS_LDR: ldr${p}.w $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LSLri, ARM_INS_LSL: lsl${s}${p}.w $rd, $rm, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LSLrr, ARM_INS_LSL: lsl${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2LSRri, ARM_INS_LSR: lsr${s}${p}.w $rd, $rm, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2LSRrr, ARM_INS_LSR: lsr${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_t2MCR2, ARM_INS_MCR2: mcr2${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_t2MCRR, ARM_INS_MCRR: mcrr${p} $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MCRR2, ARM_INS_MCRR2: mcrr2${p} $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MLA, ARM_INS_MLA: mla${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MLS, ARM_INS_MLS: mls${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MOVTi16, ARM_INS_MOVT: movt${p} $rd, $imm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_t2MOVi, ARM_INS_MOV: mov${s}${p}.w $rd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MOVi16, ARM_INS_MOVW: movw${p} $rd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MOVr, ARM_INS_MOV: mov${s}${p}.w $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2MOVsra_flag, ARM_INS_ASR: asrs${p}.w $rd, $rm, #1 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2MOVsrl_flag, ARM_INS_LSR: lsrs${p}.w $rd, $rm, #1 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2MRC, ARM_INS_MRC: mrc${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_t2MRC2, ARM_INS_MRC2: mrc2${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* ARM_t2MRRC, ARM_INS_MRRC: mrrc${p} $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MRRC2, ARM_INS_MRRC2: mrrc2${p} $cop, $opc1, $rt, $rt2, $crm */ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MRS_AR, ARM_INS_MRS: mrs${p} $rd, apsr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MRS_M, ARM_INS_MRS: mrs${p} $rd, $sysm */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MRSbanked, ARM_INS_MRS: mrs${p} $rd, $banked */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MRSsys_AR, ARM_INS_MRS: mrs${p} $rd, spsr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MSR_AR, ARM_INS_MSR: msr${p} $mask, $rn */ { CS_AC_READ, 0 } }, { /* ARM_t2MSR_M, ARM_INS_MSR: msr${p} $sysm, $rn */ { CS_AC_READ, 0 } }, { /* ARM_t2MSRbanked, ARM_INS_MSR: msr${p} $banked, $rn */ { CS_AC_READ, 0 } }, { /* ARM_t2MUL, ARM_INS_MUL: mul${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2MVNi, ARM_INS_MVN: mvn${s}${p} $rd, $imm */ { CS_AC_WRITE, 0 } }, { /* ARM_t2MVNr, ARM_INS_MVN: mvn${s}${p}.w $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2MVNs, ARM_INS_MVN: mvn${s}${p}.w $rd, $shiftedrm */ { CS_AC_WRITE, 0 } }, { /* ARM_t2ORNri, ARM_INS_ORN: orn${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ORNrr, ARM_INS_ORN: orn${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2ORNrs, ARM_INS_ORN: orn${s}${p} $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ORRri, ARM_INS_ORR: orr${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2ORRrr, ARM_INS_ORR: orr${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2ORRrs, ARM_INS_ORR: orr${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2PKHBT, ARM_INS_PKHBT: pkhbt${p} $rd, $rn, $rm$sh */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2PKHTB, ARM_INS_PKHTB: pkhtb${p} $rd, $rn, $rm$sh */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2PLDWi12, ARM_INS_PLDW: pldw${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLDWi8, ARM_INS_PLDW: pldw${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLDWs, ARM_INS_PLDW: pldw${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLDi12, ARM_INS_PLD: pld${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLDi8, ARM_INS_PLD: pld${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLDpci, ARM_INS_PLD: pld${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLDs, ARM_INS_PLD: pld${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLIi12, ARM_INS_PLI: pli${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLIi8, ARM_INS_PLI: pli${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLIpci, ARM_INS_PLI: pli${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2PLIs, ARM_INS_PLI: pli${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2QADD, ARM_INS_QADD: qadd${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QADD8, ARM_INS_QADD8: qadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QASX, ARM_INS_QASX: qasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QDADD, ARM_INS_QDADD: qdadd${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QDSUB, ARM_INS_QDSUB: qdsub${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QSUB, ARM_INS_QSUB: qsub${p} $rd, $rm, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QSUB16, ARM_INS_QSUB16: qsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2QSUB8, ARM_INS_QSUB8: qsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2RBIT, ARM_INS_RBIT: rbit${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2REV, ARM_INS_REV: rev${p}.w $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2REV16, ARM_INS_REV16: rev16${p}.w $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2REVSH, ARM_INS_REVSH: revsh${p}.w $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2RFEDB, ARM_INS_RFEDB: rfedb${p} $rn */ { CS_AC_READ, 0 } }, { /* ARM_t2RFEDBW, ARM_INS_RFEDB: rfedb${p} $rn! */ { CS_AC_READ, 0 } }, { /* ARM_t2RFEIA, ARM_INS_RFEIA: rfeia${p} $rn */ { CS_AC_READ, 0 } }, { /* ARM_t2RFEIAW, ARM_INS_RFEIA: rfeia${p} $rn! */ { CS_AC_READ, 0 } }, { /* ARM_t2RORri, ARM_INS_ROR: ror${s}${p}.w $rd, $rm, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2RORrr, ARM_INS_ROR: ror${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2RRX, ARM_INS_RRX: rrx${s}${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2RSBri, ARM_INS_RSB: rsb${s}${p}.w $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2RSBrr, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2RSBrs, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SADD16, ARM_INS_SADD16: sadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SADD8, ARM_INS_SADD8: sadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SASX, ARM_INS_SASX: sasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SBCri, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SBCrr, ARM_INS_SBC: sbc${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SBCrs, ARM_INS_SBC: sbc${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SBFX, ARM_INS_SBFX: sbfx${p} $rd, $rn, $lsb, $msb */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SDIV, ARM_INS_SDIV: sdiv${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SEL, ARM_INS_SEL: sel${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SHADD16, ARM_INS_SHADD16: shadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SHASX, ARM_INS_SHASX: shasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SHSAX, ARM_INS_SHSAX: shsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SHSUB16, ARM_INS_SHSUB16: shsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SHSUB8, ARM_INS_SHSUB8: shsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMC, ARM_INS_SMC: smc${p} $opt */ { 0 } }, { /* ARM_t2SMLABB, ARM_INS_SMLABB: smlabb${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLABT, ARM_INS_SMLABT: smlabt${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLADX, ARM_INS_SMLADX: smladx${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLAL, ARM_INS_SMLAL: smlal${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLALBB, ARM_INS_SMLALBB: smlalbb${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLALBT, ARM_INS_SMLALBT: smlalbt${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLALD, ARM_INS_SMLALD: smlald${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLALTT, ARM_INS_SMLALTT: smlaltt${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLATB, ARM_INS_SMLATB: smlatb${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLATT, ARM_INS_SMLATT: smlatt${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLAWB, ARM_INS_SMLAWB: smlawb${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLAWT, ARM_INS_SMLAWT: smlawt${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLSD, ARM_INS_SMLSD: smlsd${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLSDX, ARM_INS_SMLSDX: smlsdx${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLSLD, ARM_INS_SMLSLD: smlsld${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMLSLDX, ARM_INS_SMLSLDX: smlsldx${p} $ra, $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMMLA, ARM_INS_SMMLA: smmla${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMMLAR, ARM_INS_SMMLAR: smmlar${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMMLS, ARM_INS_SMMLS: smmls${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMMLSR, ARM_INS_SMMLSR: smmlsr${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMMULR, ARM_INS_SMMULR: smmulr${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMUAD, ARM_INS_SMUAD: smuad${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMUADX, ARM_INS_SMUADX: smuadx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULBB, ARM_INS_SMULBB: smulbb${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULL, ARM_INS_SMULL: smull${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULWB, ARM_INS_SMULWB: smulwb${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMULWT, ARM_INS_SMULWT: smulwt${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMUSD, ARM_INS_SMUSD: smusd${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SMUSDX, ARM_INS_SMUSDX: smusdx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SRSDB, ARM_INS_SRSDB: srsdb${p} sp, $mode */ { 0 } }, { /* ARM_t2SRSDB_UPD, ARM_INS_SRSDB: srsdb${p} sp!, $mode */ { 0 } }, { /* ARM_t2SRSIA, ARM_INS_SRSIA: srsia${p} sp, $mode */ { 0 } }, { /* ARM_t2SRSIA_UPD, ARM_INS_SRSIA: srsia${p} sp!, $mode */ { 0 } }, { /* ARM_t2SSAT, ARM_INS_SSAT: ssat${p} $rd, $sat_imm, $rn$sh */ { CS_AC_WRITE, 0 } }, { /* ARM_t2SSAT16, ARM_INS_SSAT16: ssat16${p} $rd, $sat_imm, $rn */ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_t2SSAX, ARM_INS_SSAX: ssax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SSUB16, ARM_INS_SSUB16: ssub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SSUB8, ARM_INS_SSUB8: ssub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2L_OFFSET, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2L_OPTION, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2L_POST, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2L_PRE, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2_OFFSET, ARM_INS_STC2: stc2${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2_OPTION, ARM_INS_STC2: stc2${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2_POST, ARM_INS_STC2: stc2${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC2_PRE, ARM_INS_STC2: stc2${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STCL_OFFSET, ARM_INS_STCL: stcl${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STCL_OPTION, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STCL_POST, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STCL_PRE, ARM_INS_STCL: stcl${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC_OFFSET, ARM_INS_STC: stc${p} $cop, $crd, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC_OPTION, ARM_INS_STC: stc${p} $cop, $crd, $addr, $option */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC_POST, ARM_INS_STC: stc${p} $cop, $crd, $addr, $offset */ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STC_PRE, ARM_INS_STC: stc${p} $cop, $crd, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STL, ARM_INS_STL: stl${p} $rt, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STLB, ARM_INS_STLB: stlb${p} $rt, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STLEX, ARM_INS_STLEX: stlex${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STLEXB, ARM_INS_STLEXB: stlexb${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STLEXD, ARM_INS_STLEXD: stlexd${p} $rd, $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STLEXH, ARM_INS_STLEXH: stlexh${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STLH, ARM_INS_STLH: stlh${p} $rt, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STMDB, ARM_INS_STMDB: stmdb${p} $rn, $regs */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STMDB_UPD, ARM_INS_STMDB: stmdb${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2STMIA, ARM_INS_STM: stm${p}.w $rn, $regs */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STMIA_UPD, ARM_INS_STM: stm${p}.w $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2STRBT, ARM_INS_STRBT: strbt${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2STRB_POST, ARM_INS_STRB: strb${p} $rt, $rn$offset */ { CS_AC_READ, 0 } }, { /* ARM_t2STRB_PRE, ARM_INS_STRB: strb${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRBi12, ARM_INS_STRB: strb${p}.w $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRBi8, ARM_INS_STRB: strb${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRBs, ARM_INS_STRB: strb${p}.w $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRD_POST, ARM_INS_STRD: strd${p} $rt, $rt2, $addr$imm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STRD_PRE, ARM_INS_STRD: strd${p} $rt, $rt2, $addr! */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STRDi8, ARM_INS_STRD: strd${p} $rt, $rt2, $addr */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STREX, ARM_INS_STREX: strex${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2STREXB, ARM_INS_STREXB: strexb${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STREXD, ARM_INS_STREXD: strexd${p} $rd, $rt, $rt2, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STREXH, ARM_INS_STREXH: strexh${p} $rd, $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2STRHT, ARM_INS_STRHT: strht${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_t2STRH_POST, ARM_INS_STRH: strh${p} $rt, $rn$offset */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRH_PRE, ARM_INS_STRH: strh${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRHi12, ARM_INS_STRH: strh${p}.w $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRHi8, ARM_INS_STRH: strh${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRHs, ARM_INS_STRH: strh${p}.w $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRT, ARM_INS_STRT: strt${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STR_POST, ARM_INS_STR: str${p} $rt, $rn$offset */ { CS_AC_READ, 0 } }, { /* ARM_t2STR_PRE, ARM_INS_STR: str${p} $rt, $addr! */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRi12, ARM_INS_STR: str${p}.w $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRi8, ARM_INS_STR: str${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2STRs, ARM_INS_STR: str${p}.w $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_t2SUBS_PC_LR, ARM_INS_SUB: subs${p} pc, lr, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SUBri, ARM_INS_SUB: sub${s}${p}.w $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SUBri12, ARM_INS_SUBW: subw${p} $rd, $rn, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SUBrr, ARM_INS_SUB: sub${s}${p}.w $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2SUBrs, ARM_INS_SUB: sub${s}${p}.w $rd, $rn, $shiftedrm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SXTAB16, ARM_INS_SXTAB16: sxtab16${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SXTAH, ARM_INS_SXTAH: sxtah${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SXTB, ARM_INS_SXTB: sxtb${p}.w $rd, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SXTB16, ARM_INS_SXTB16: sxtb16${p} $rd, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2SXTH, ARM_INS_SXTH: sxth${p}.w $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_t2TBB, ARM_INS_TBB: tbb${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2TBH, ARM_INS_TBH: tbh${p} $addr */ { CS_AC_READ, 0 } }, { /* ARM_t2TEQri, ARM_INS_TEQ: teq${p}.w $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_t2TEQrr, ARM_INS_TEQ: teq${p}.w $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2TEQrs, ARM_INS_TEQ: teq${p}.w $rn, $shiftedrm */ { CS_AC_READ, 0 } }, { /* ARM_t2TSTri, ARM_INS_TST: tst${p}.w $rn, $imm */ { CS_AC_READ, 0 } }, { /* ARM_t2TSTrr, ARM_INS_TST: tst${p}.w $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2TSTrs, ARM_INS_TST: tst${p}.w $rn, $shiftedrm */ { CS_AC_READ, 0 } }, { /* ARM_t2UADD16, ARM_INS_UADD16: uadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UADD8, ARM_INS_UADD8: uadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UASX, ARM_INS_UASX: uasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UBFX, ARM_INS_UBFX: ubfx${p} $rd, $rn, $lsb, $msb */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2UDF, ARM_INS_UDF: udf.w $imm16 */ { 0 } }, { /* ARM_t2UDIV, ARM_INS_UDIV: udiv${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UHADD16, ARM_INS_UHADD16: uhadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UHADD8, ARM_INS_UHADD8: uhadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UHASX, ARM_INS_UHASX: uhasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UHSAX, ARM_INS_UHSAX: uhsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UHSUB16, ARM_INS_UHSUB16: uhsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UHSUB8, ARM_INS_UHSUB8: uhsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UMAAL, ARM_INS_UMAAL: umaal${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UMLAL, ARM_INS_UMLAL: umlal${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UMULL, ARM_INS_UMULL: umull${p} $rdlo, $rdhi, $rn, $rm */ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UQADD16, ARM_INS_UQADD16: uqadd16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UQADD8, ARM_INS_UQADD8: uqadd8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UQASX, ARM_INS_UQASX: uqasx${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UQSUB16, ARM_INS_UQSUB16: uqsub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UQSUB8, ARM_INS_UQSUB8: uqsub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2USAD8, ARM_INS_USAD8: usad8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2USADA8, ARM_INS_USADA8: usada8${p} $rd, $rn, $rm, $ra */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2USAT, ARM_INS_USAT: usat${p} $rd, $sat_imm, $rn$sh */ { CS_AC_WRITE, 0 } }, { /* ARM_t2USAT16, ARM_INS_USAT16: usat16${p} $rd, $sat_imm, $rn */ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* ARM_t2USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_t2UXTAB, ARM_INS_UXTAB: uxtab${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2UXTAB16, ARM_INS_UXTAB16: uxtab16${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2UXTAH, ARM_INS_UXTAH: uxtah${p} $rd, $rn, $rm$rot */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_t2UXTB, ARM_INS_UXTB: uxtb${p}.w $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_t2UXTB16, ARM_INS_UXTB16: uxtb16${p} $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_t2UXTH, ARM_INS_UXTH: uxth${p}.w $rd, $rm$rot */ { CS_AC_WRITE, 0 } }, { /* ARM_tADC, ARM_INS_ADC: adc${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tADDhirr, ARM_INS_ADD: add${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tADDi3, ARM_INS_ADD: add${s}${p} $rd, $rm, $imm3 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tADDi8, ARM_INS_ADD: add${s}${p} $rdn, $imm8 */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_tADDrSP, ARM_INS_ADD: add${p} $rdn, $sp, $rn */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tADDrSPi, ARM_INS_ADD: add${p} $dst, $sp, $imm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tADDrr, ARM_INS_ADD: add${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tADDspi, ARM_INS_ADD: add${p} $rdn, $imm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_tADDspr, ARM_INS_ADD: add${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tADR, ARM_INS_ADR: adr{$p} $rd, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tAND, ARM_INS_AND: and${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tASRri, ARM_INS_ASR: asr${s}${p} $rd, $rm, $imm5 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tASRrr, ARM_INS_ASR: asr${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tB, ARM_INS_B: b${p} $target */ { 0 } }, { /* ARM_tBIC, ARM_INS_BIC: bic${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tBKPT, ARM_INS_BKPT: bkpt $val */ { 0 } }, { /* ARM_tBL, ARM_INS_BL: bl${p} $func */ { 0 } }, { /* ARM_tBLXi, ARM_INS_BLX: blx${p} $func */ { 0 } }, { /* ARM_tBLXr, ARM_INS_BLX: blx${p} $func */ { CS_AC_READ, 0 } }, { /* ARM_tBX, ARM_INS_BX: bx${p} $rm */ { CS_AC_READ, 0 } }, { /* ARM_tBcc, ARM_INS_B: b${p} $target */ { 0 } }, { /* ARM_tCBNZ, ARM_INS_CBNZ: cbnz $rn, $target */ { CS_AC_READ, 0 } }, { /* ARM_tCBZ, ARM_INS_CBZ: cbz $rn, $target */ { CS_AC_READ, 0 } }, { /* ARM_tCMNz, ARM_INS_CMN: cmn${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tCMPhir, ARM_INS_CMP: cmp${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tCMPi8, ARM_INS_CMP: cmp${p} $rn, $imm8 */ { CS_AC_READ, 0 } }, { /* ARM_tCMPr, ARM_INS_CMP: cmp${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tCPS, ARM_INS_CPS: cps$imod $iflags */ { 0 } }, { /* ARM_tEOR, ARM_INS_EOR: eor${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tHINT, ARM_INS_HINT: hint${p} $imm */ { 0 } }, { /* ARM_tHLT, ARM_INS_HLT: hlt $val */ { 0 } }, { /* ARM_tLDMIA, ARM_INS_LDM: ldm${p} $rn, $regs */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRBi, ARM_INS_LDRB: ldrb${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRBr, ARM_INS_LDRB: ldrb${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRHi, ARM_INS_LDRH: ldrh${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRHr, ARM_INS_LDRH: ldrh${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRSB, ARM_INS_LDRSB: ldrsb${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRSH, ARM_INS_LDRSH: ldrsh${p} $rt, $addr */ { CS_AC_WRITE, 0 } }, { /* ARM_tLDRi, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLDRpci, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLDRr, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLDRspi, ARM_INS_LDR: ldr${p} $rt, $addr */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLSLri, ARM_INS_LSL: lsl${s}${p} $rd, $rm, $imm5 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLSLrr, ARM_INS_LSL: lsl${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLSRri, ARM_INS_LSR: lsr${s}${p} $rd, $rm, $imm5 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tLSRrr, ARM_INS_LSR: lsr${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tMOVSr, ARM_INS_MOV: movs $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tMOVi8, ARM_INS_MOV: mov${s}${p} $rd, $imm8 */ { CS_AC_WRITE, 0 } }, { /* ARM_tMOVr, ARM_INS_MOV: mov${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tMUL, ARM_INS_MUL: mul${s}${p} $rd, $rn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_tMVN, ARM_INS_MVN: mvn${s}${p} $rd, $rn */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tORR, ARM_INS_ORR: orr${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tPOP, ARM_INS_POP: pop${p} $regs */ { CS_AC_WRITE, 0 } }, { /* ARM_tPUSH, ARM_INS_PUSH: push${p} $regs */ { CS_AC_READ, 0 } }, { /* ARM_tREV, ARM_INS_REV: rev${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tREV16, ARM_INS_REV16: rev16${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tREVSH, ARM_INS_REVSH: revsh${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tROR, ARM_INS_ROR: ror${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tRSB, ARM_INS_RSB: rsb${s}${p} $rd, $rn, #0 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tSBC, ARM_INS_SBC: sbc${s}${p} $rdn, $rm */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tSETEND, ARM_INS_SETEND: setend $end */ { 0 } }, { /* ARM_tSTMIA_UPD, ARM_INS_STM: stm${p} $rn!, $regs */ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tSTRBi, ARM_INS_STRB: strb${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSTRBr, ARM_INS_STRB: strb${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSTRHi, ARM_INS_STRH: strh${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSTRHr, ARM_INS_STRH: strh${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSTRi, ARM_INS_STR: str${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSTRr, ARM_INS_STR: str${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSTRspi, ARM_INS_STR: str${p} $rt, $addr */ { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* ARM_tSUBi3, ARM_INS_SUB: sub${s}${p} $rd, $rm, $imm3 */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tSUBi8, ARM_INS_SUB: sub${s}${p} $rdn, $imm8 */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_tSUBrr, ARM_INS_SUB: sub${s}${p} $rd, $rn, $rm */ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tSUBspi, ARM_INS_SUB: sub${p} $rdn, $imm */ { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* ARM_tSVC, ARM_INS_SVC: svc${p} $imm */ { 0 } }, { /* ARM_tSXTB, ARM_INS_SXTB: sxtb${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tSXTH, ARM_INS_SXTH: sxth${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tTRAP, ARM_INS_TRAP: trap */ { 0 } }, { /* ARM_tTST, ARM_INS_TST: tst${p} $rn, $rm */ { CS_AC_READ, CS_AC_READ, 0 } }, { /* ARM_tUDF, ARM_INS_UDF: udf $imm8 */ { 0 } }, { /* ARM_tUXTB, ARM_INS_UXTB: uxtb${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* ARM_tUXTH, ARM_INS_UXTH: uxth${p} $rd, $rm */ { CS_AC_WRITE, CS_AC_READ, 0 } }, capstone-sys-0.11.0/capstone/arch/ARM/ARMModule.c010066400017500001750000000024121363402546700175560ustar0000000000000000/* Capstone Disassembly Engine */ /* By Dang Hoang Vu 2013 */ #ifdef CAPSTONE_HAS_ARM #include "../../cs_priv.h" #include "../../MCRegisterInfo.h" #include "ARMDisassembler.h" #include "ARMInstPrinter.h" #include "ARMMapping.h" #include "ARMModule.h" cs_err ARM_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); ARM_init(mri); ARM_getRegName(ud, 0); // use default get_regname ud->printer = ARM_printInst; ud->printer_info = mri; ud->reg_name = ARM_reg_name; ud->insn_id = ARM_get_insn_id; ud->insn_name = ARM_insn_name; ud->group_name = ARM_group_name; ud->post_printer = ARM_post_printer; #ifndef CAPSTONE_DIET ud->reg_access = ARM_reg_access; #endif if (ud->mode & CS_MODE_THUMB) ud->disasm = Thumb_getInstruction; else ud->disasm = ARM_getInstruction; return CS_ERR_OK; } cs_err ARM_option(cs_struct *handle, cs_opt_type type, size_t value) { switch(type) { case CS_OPT_MODE: if (value & CS_MODE_THUMB) handle->disasm = Thumb_getInstruction; else handle->disasm = ARM_getInstruction; handle->mode = (cs_mode)value; break; case CS_OPT_SYNTAX: ARM_getRegName(handle, (int)value); handle->syntax = (int)value; break; default: break; } return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/ARM/ARMModule.h010066400017500001750000000004311363402546700175620ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_ARM_MODULE_H #define CS_ARM_MODULE_H #include "../../utils.h" cs_err ARM_global_init(cs_struct *ud); cs_err ARM_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/EVM/EVMDisassembler.c010066400017500001750000000137351363402546700210000ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #include #include // offsetof macro // alternatively #include "../../utils.h" like everyone else #include "EVMDisassembler.h" #include "EVMMapping.h" static short opcodes[256] = { EVM_INS_STOP, EVM_INS_ADD, EVM_INS_MUL, EVM_INS_SUB, EVM_INS_DIV, EVM_INS_SDIV, EVM_INS_MOD, EVM_INS_SMOD, EVM_INS_ADDMOD, EVM_INS_MULMOD, EVM_INS_EXP, EVM_INS_SIGNEXTEND, -1, -1, -1, -1, EVM_INS_LT, EVM_INS_GT, EVM_INS_SLT, EVM_INS_SGT, EVM_INS_EQ, EVM_INS_ISZERO, EVM_INS_AND, EVM_INS_OR, EVM_INS_XOR, EVM_INS_NOT, EVM_INS_BYTE, -1, -1, -1, -1, -1, EVM_INS_SHA3, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, EVM_INS_ADDRESS, EVM_INS_BALANCE, EVM_INS_ORIGIN, EVM_INS_CALLER, EVM_INS_CALLVALUE, EVM_INS_CALLDATALOAD, EVM_INS_CALLDATASIZE, EVM_INS_CALLDATACOPY, EVM_INS_CODESIZE, EVM_INS_CODECOPY, EVM_INS_GASPRICE, EVM_INS_EXTCODESIZE, EVM_INS_EXTCODECOPY, EVM_INS_RETURNDATASIZE, EVM_INS_RETURNDATACOPY, -1, EVM_INS_BLOCKHASH, EVM_INS_COINBASE, EVM_INS_TIMESTAMP, EVM_INS_NUMBER, EVM_INS_DIFFICULTY, EVM_INS_GASLIMIT, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, EVM_INS_POP, EVM_INS_MLOAD, EVM_INS_MSTORE, EVM_INS_MSTORE8, EVM_INS_SLOAD, EVM_INS_SSTORE, EVM_INS_JUMP, EVM_INS_JUMPI, EVM_INS_PC, EVM_INS_MSIZE, EVM_INS_GAS, EVM_INS_JUMPDEST, -1, -1, -1, -1, EVM_INS_PUSH1, EVM_INS_PUSH2, EVM_INS_PUSH3, EVM_INS_PUSH4, EVM_INS_PUSH5, EVM_INS_PUSH6, EVM_INS_PUSH7, EVM_INS_PUSH8, EVM_INS_PUSH9, EVM_INS_PUSH10, EVM_INS_PUSH11, EVM_INS_PUSH12, EVM_INS_PUSH13, EVM_INS_PUSH14, EVM_INS_PUSH15, EVM_INS_PUSH16, EVM_INS_PUSH17, EVM_INS_PUSH18, EVM_INS_PUSH19, EVM_INS_PUSH20, EVM_INS_PUSH21, EVM_INS_PUSH22, EVM_INS_PUSH23, EVM_INS_PUSH24, EVM_INS_PUSH25, EVM_INS_PUSH26, EVM_INS_PUSH27, EVM_INS_PUSH28, EVM_INS_PUSH29, EVM_INS_PUSH30, EVM_INS_PUSH31, EVM_INS_PUSH32, EVM_INS_DUP1, EVM_INS_DUP2, EVM_INS_DUP3, EVM_INS_DUP4, EVM_INS_DUP5, EVM_INS_DUP6, EVM_INS_DUP7, EVM_INS_DUP8, EVM_INS_DUP9, EVM_INS_DUP10, EVM_INS_DUP11, EVM_INS_DUP12, EVM_INS_DUP13, EVM_INS_DUP14, EVM_INS_DUP15, EVM_INS_DUP16, EVM_INS_SWAP1, EVM_INS_SWAP2, EVM_INS_SWAP3, EVM_INS_SWAP4, EVM_INS_SWAP5, EVM_INS_SWAP6, EVM_INS_SWAP7, EVM_INS_SWAP8, EVM_INS_SWAP9, EVM_INS_SWAP10, EVM_INS_SWAP11, EVM_INS_SWAP12, EVM_INS_SWAP13, EVM_INS_SWAP14, EVM_INS_SWAP15, EVM_INS_SWAP16, EVM_INS_LOG0, EVM_INS_LOG1, EVM_INS_LOG2, EVM_INS_LOG3, EVM_INS_LOG4, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, EVM_INS_CREATE, EVM_INS_CALL, EVM_INS_CALLCODE, EVM_INS_RETURN, EVM_INS_DELEGATECALL, EVM_INS_CALLBLACKBOX, -1, -1, -1, -1, EVM_INS_STATICCALL, -1, -1, EVM_INS_REVERT, -1, EVM_INS_SUICIDE, }; bool EVM_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *MI, uint16_t *size, uint64_t address, void *inst_info) { unsigned char opcode; if (code_len == 0) return false; opcode = code[0]; if (opcodes[opcode] == -1) { // invalid opcode return false; } // valid opcode MI->address = address; MI->OpcodePub = MI->Opcode = opcode; if (opcode >= EVM_INS_PUSH1 && opcode <= EVM_INS_PUSH32) { unsigned char len = (opcode - EVM_INS_PUSH1 + 1); if (code_len < 1 + len) { // not enough data return false; } *size = 1 + len; memcpy(MI->evm_data, code + 1, len); } else *size = 1; if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, evm)+sizeof(cs_evm)); EVM_get_insn_id((cs_struct *)ud, MI->flat_insn, opcode); if (MI->flat_insn->detail->evm.pop) { MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_STACK_READ; MI->flat_insn->detail->groups_count++; } if (MI->flat_insn->detail->evm.push) { MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_STACK_WRITE; MI->flat_insn->detail->groups_count++; } // setup groups switch(opcode) { default: break; case EVM_INS_ADD: case EVM_INS_MUL: case EVM_INS_SUB: case EVM_INS_DIV: case EVM_INS_SDIV: case EVM_INS_MOD: case EVM_INS_SMOD: case EVM_INS_ADDMOD: case EVM_INS_MULMOD: case EVM_INS_EXP: case EVM_INS_SIGNEXTEND: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_MATH; MI->flat_insn->detail->groups_count++; break; case EVM_INS_MSTORE: case EVM_INS_MSTORE8: case EVM_INS_CALLDATACOPY: case EVM_INS_CODECOPY: case EVM_INS_EXTCODECOPY: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_MEM_WRITE; MI->flat_insn->detail->groups_count++; break; case EVM_INS_MLOAD: case EVM_INS_CREATE: case EVM_INS_CALL: case EVM_INS_CALLCODE: case EVM_INS_RETURN: case EVM_INS_DELEGATECALL: case EVM_INS_REVERT: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_MEM_READ; MI->flat_insn->detail->groups_count++; break; case EVM_INS_SSTORE: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_STORE_WRITE; MI->flat_insn->detail->groups_count++; break; case EVM_INS_SLOAD: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_STORE_READ; MI->flat_insn->detail->groups_count++; break; case EVM_INS_JUMP: case EVM_INS_JUMPI: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_JUMP; MI->flat_insn->detail->groups_count++; break; case EVM_INS_STOP: case EVM_INS_SUICIDE: MI->flat_insn->detail->groups[MI->flat_insn->detail->groups_count] = EVM_GRP_HALT; MI->flat_insn->detail->groups_count++; break; } } return true; } capstone-sys-0.11.0/capstone/arch/EVM/EVMDisassembler.h010066400017500001750000000004471363402546700210010ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #ifndef CS_EVMDISASSEMBLER_H #define CS_EVMDISASSEMBLER_H #include "../../MCInst.h" bool EVM_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/EVM/EVMInstPrinter.c010066400017500001750000000007421363402546700206360ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #include "EVMInstPrinter.h" #include "EVMMapping.h" void EVM_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo) { SStream_concat(O, EVM_insn_name((csh)MI->csh, MI->Opcode)); if (MI->Opcode >= EVM_INS_PUSH1 && MI->Opcode <= EVM_INS_PUSH32) { unsigned int i; SStream_concat0(O, "\t"); for (i = 0; i < MI->Opcode - EVM_INS_PUSH1 + 1; i++) { SStream_concat(O, "%02x", MI->evm_data[i]); } } } capstone-sys-0.11.0/capstone/arch/EVM/EVMInstPrinter.h010066400017500001750000000005051363402546700206400ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #ifndef CS_EVMINSTPRINTER_H #define CS_EVMINSTPRINTER_H #include "capstone/capstone.h" #include "../../MCInst.h" #include "../../SStream.h" #include "../../cs_priv.h" struct SStream; void EVM_printInst(MCInst *MI, struct SStream *O, void *Info); #endif capstone-sys-0.11.0/capstone/arch/EVM/EVMMapping.c010066400017500001750000000220301363402546700177420ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #ifdef CAPSTONE_HAS_EVM #include #include "../../cs_priv.h" #include "../../utils.h" #include "EVMMapping.h" #ifndef CAPSTONE_DIET static cs_evm insns[256] = { #include "EVMMappingInsn.inc" }; #endif // look for @id in @insns, given its size in @max. // return -1 if not found static int evm_insn_find(cs_evm *insns, unsigned int max, unsigned int id) { if (id >= max) return -1; if (insns[id].fee == 0xffffffff) // unused opcode return -1; return (int)id; } // fill in details void EVM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { insn->id = id; #ifndef CAPSTONE_DIET if (evm_insn_find(insns, ARR_SIZE(insns), id) > 0) { if (h->detail) { memcpy(&insn->detail->evm, &insns[id], sizeof(insns[id])); } } #endif } #ifndef CAPSTONE_DIET static name_map insn_name_maps[256] = { { EVM_INS_STOP, "stop" }, { EVM_INS_ADD, "add" }, { EVM_INS_MUL, "mul" }, { EVM_INS_SUB, "sub" }, { EVM_INS_DIV, "div" }, { EVM_INS_SDIV, "sdiv" }, { EVM_INS_MOD, "mod" }, { EVM_INS_SMOD, "smod" }, { EVM_INS_ADDMOD, "addmod" }, { EVM_INS_MULMOD, "mulmod" }, { EVM_INS_EXP, "exp" }, { EVM_INS_SIGNEXTEND, "signextend" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_LT, "lt" }, { EVM_INS_GT, "gt" }, { EVM_INS_SLT, "slt" }, { EVM_INS_SGT, "sgt" }, { EVM_INS_EQ, "eq" }, { EVM_INS_ISZERO, "iszero" }, { EVM_INS_AND, "and" }, { EVM_INS_OR, "or" }, { EVM_INS_XOR, "xor" }, { EVM_INS_NOT, "not" }, { EVM_INS_BYTE, "byte" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_SHA3, "sha3" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_ADDRESS, "address" }, { EVM_INS_BALANCE, "balance" }, { EVM_INS_ORIGIN, "origin" }, { EVM_INS_CALLER, "caller" }, { EVM_INS_CALLVALUE, "callvalue" }, { EVM_INS_CALLDATALOAD, "calldataload" }, { EVM_INS_CALLDATASIZE, "calldatasize" }, { EVM_INS_CALLDATACOPY, "calldatacopy" }, { EVM_INS_CODESIZE, "codesize" }, { EVM_INS_CODECOPY, "codecopy" }, { EVM_INS_GASPRICE, "gasprice" }, { EVM_INS_EXTCODESIZE, "extcodesize" }, { EVM_INS_EXTCODECOPY, "extcodecopy" }, { EVM_INS_RETURNDATASIZE, "returndatasize" }, { EVM_INS_RETURNDATACOPY, "returndatacopy" }, { EVM_INS_INVALID, NULL }, { EVM_INS_BLOCKHASH, "blockhash" }, { EVM_INS_COINBASE, "coinbase" }, { EVM_INS_TIMESTAMP, "timestamp" }, { EVM_INS_NUMBER, "number" }, { EVM_INS_DIFFICULTY, "difficulty" }, { EVM_INS_GASLIMIT, "gaslimit" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_POP, "pop" }, { EVM_INS_MLOAD, "mload" }, { EVM_INS_MSTORE, "mstore" }, { EVM_INS_MSTORE8, "mstore8" }, { EVM_INS_SLOAD, "sload" }, { EVM_INS_SSTORE, "sstore" }, { EVM_INS_JUMP, "jump" }, { EVM_INS_JUMPI, "jumpi" }, { EVM_INS_PC, "pc" }, { EVM_INS_MSIZE, "msize" }, { EVM_INS_GAS, "gas" }, { EVM_INS_JUMPDEST, "jumpdest" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_PUSH1, "push1" }, { EVM_INS_PUSH2, "push2" }, { EVM_INS_PUSH3, "push3" }, { EVM_INS_PUSH4, "push4" }, { EVM_INS_PUSH5, "push5" }, { EVM_INS_PUSH6, "push6" }, { EVM_INS_PUSH7, "push7" }, { EVM_INS_PUSH8, "push8" }, { EVM_INS_PUSH9, "push9" }, { EVM_INS_PUSH10, "push10" }, { EVM_INS_PUSH11, "push11" }, { EVM_INS_PUSH12, "push12" }, { EVM_INS_PUSH13, "push13" }, { EVM_INS_PUSH14, "push14" }, { EVM_INS_PUSH15, "push15" }, { EVM_INS_PUSH16, "push16" }, { EVM_INS_PUSH17, "push17" }, { EVM_INS_PUSH18, "push18" }, { EVM_INS_PUSH19, "push19" }, { EVM_INS_PUSH20, "push20" }, { EVM_INS_PUSH21, "push21" }, { EVM_INS_PUSH22, "push22" }, { EVM_INS_PUSH23, "push23" }, { EVM_INS_PUSH24, "push24" }, { EVM_INS_PUSH25, "push25" }, { EVM_INS_PUSH26, "push26" }, { EVM_INS_PUSH27, "push27" }, { EVM_INS_PUSH28, "push28" }, { EVM_INS_PUSH29, "push29" }, { EVM_INS_PUSH30, "push30" }, { EVM_INS_PUSH31, "push31" }, { EVM_INS_PUSH32, "push32" }, { EVM_INS_DUP1, "dup1" }, { EVM_INS_DUP2, "dup2" }, { EVM_INS_DUP3, "dup3" }, { EVM_INS_DUP4, "dup4" }, { EVM_INS_DUP5, "dup5" }, { EVM_INS_DUP6, "dup6" }, { EVM_INS_DUP7, "dup7" }, { EVM_INS_DUP8, "dup8" }, { EVM_INS_DUP9, "dup9" }, { EVM_INS_DUP10, "dup10" }, { EVM_INS_DUP11, "dup11" }, { EVM_INS_DUP12, "dup12" }, { EVM_INS_DUP13, "dup13" }, { EVM_INS_DUP14, "dup14" }, { EVM_INS_DUP15, "dup15" }, { EVM_INS_DUP16, "dup16" }, { EVM_INS_SWAP1, "swap1" }, { EVM_INS_SWAP2, "swap2" }, { EVM_INS_SWAP3, "swap3" }, { EVM_INS_SWAP4, "swap4" }, { EVM_INS_SWAP5, "swap5" }, { EVM_INS_SWAP6, "swap6" }, { EVM_INS_SWAP7, "swap7" }, { EVM_INS_SWAP8, "swap8" }, { EVM_INS_SWAP9, "swap9" }, { EVM_INS_SWAP10, "swap10" }, { EVM_INS_SWAP11, "swap11" }, { EVM_INS_SWAP12, "swap12" }, { EVM_INS_SWAP13, "swap13" }, { EVM_INS_SWAP14, "swap14" }, { EVM_INS_SWAP15, "swap15" }, { EVM_INS_SWAP16, "swap16" }, { EVM_INS_LOG0, "log0" }, { EVM_INS_LOG1, "log1" }, { EVM_INS_LOG2, "log2" }, { EVM_INS_LOG3, "log3" }, { EVM_INS_LOG4, "log4" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_CREATE, "create" }, { EVM_INS_CALL, "call" }, { EVM_INS_CALLCODE, "callcode" }, { EVM_INS_RETURN, "return" }, { EVM_INS_DELEGATECALL, "delegatecall" }, { EVM_INS_CALLBLACKBOX, "callblackbox" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_STATICCALL, "staticcall" }, { EVM_INS_INVALID, NULL }, { EVM_INS_INVALID, NULL }, { EVM_INS_REVERT, "revert" }, { EVM_INS_INVALID, NULL }, { EVM_INS_SUICIDE, "suicide" }, }; #endif const char *EVM_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET if (id >= ARR_SIZE(insn_name_maps)) return NULL; else return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static name_map group_name_maps[] = { // generic groups { EVM_GRP_INVALID, NULL }, { EVM_GRP_JUMP, "jump" }, // special groups { EVM_GRP_MATH, "math" }, { EVM_GRP_STACK_WRITE, "stack_write" }, { EVM_GRP_STACK_READ, "stack_read" }, { EVM_GRP_MEM_WRITE, "mem_write" }, { EVM_GRP_MEM_READ, "mem_read" }, { EVM_GRP_STORE_WRITE, "store_write" }, { EVM_GRP_STORE_READ, "store_read" }, { EVM_GRP_HALT, "halt" }, }; #endif const char *EVM_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } #endif capstone-sys-0.11.0/capstone/arch/EVM/EVMMapping.h010066400017500001750000000004301363402546700177470ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #include void EVM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *EVM_insn_name(csh handle, unsigned int id); const char *EVM_group_name(csh handle, unsigned int id); capstone-sys-0.11.0/capstone/arch/EVM/EVMMappingInsn.inc010066400017500001750000000156411363402546700211330ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ { 0, 0, 0 }, // STOP { 2, 1, 3 }, // ADD { 2, 1, 5 }, // MUL { 2, 1, 3 }, // SUB { 2, 1, 5 }, // DIV { 2, 1, 5 }, // SDIV { 2, 1, 5 }, // MOD { 2, 1, 5 }, // SMOD { 3, 1, 8 }, // ADDMOD { 3, 1, 8 }, // MULMOD { 2, 1, 10 }, // EXP { 2, 1, 5 }, // SIGNEXTEND { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 2, 1, 3 }, // LT { 2, 1, 3 }, // GT { 2, 1, 3 }, // SLT { 2, 1, 3 }, // SGT { 2, 1, 3 }, // EQ { 1, 1, 3 }, // ISZERO { 2, 1, 3 }, // AND { 2, 1, 3 }, // OR { 2, 1, 3 }, // XOR { 1, 1, 3 }, // NOT { 2, 1, 3 }, // BYTE { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 2, 1, 30 }, // SHA3 { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 1, 2 }, // ADDRESS { 1, 1, 20 }, // BALANCE { 0, 1, 2 }, // ORIGIN { 0, 1, 2 }, // CALLER { 0, 1, 2 }, // CALLVALUE { 1, 1, 3 }, // CALLDATALOAD { 0, 1, 2 }, // CALLDATASIZE { 3, 0, 3 }, // CALLDATACOPY { 0, 1, 2 }, // CODESIZE { 3, 0, 3 }, // CODECOPY { 0, 1, 2 }, // GASPRICE { 1, 1, 20 }, // EXTCODESIZE { 4, 0, 20 }, // EXTCODECOPY { 0, 1, 2 }, // RETURNDATASIZE { 3, 0, 3 }, // RETURNDATACOPY { 0, 0, 0xffffffff }, // unused { 1, 1, 20 }, // BLOCKHASH { 0, 1, 2 }, // COINBASE { 0, 1, 2 }, // TIMESTAMP { 0, 1, 2 }, // NUMBER { 0, 1, 2 }, // DIFFICULTY { 0, 1, 2 }, // GASLIMIT { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 1, 0, 2 }, // POP { 1, 1, 3 }, // MLOAD { 2, 0, 3 }, // MSTORE { 2, 0, 3 }, // MSTORE8 { 1, 1, 50 }, // SLOAD { 2, 0, 0 }, // SSTORE { 1, 0, 8 }, // JUMP { 2, 0, 10 }, // JUMPI { 0, 1, 2 }, // GETPC { 0, 1, 2 }, // MSIZE { 0, 1, 2 }, // GAS { 0, 0, 1 }, // JUMPDEST { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 1, 3 }, // PUSH1 { 0, 1, 3 }, // PUSH2 { 0, 1, 3 }, // PUSH3 { 0, 1, 3 }, // PUSH4 { 0, 1, 3 }, // PUSH5 { 0, 1, 3 }, // PUSH6 { 0, 1, 3 }, // PUSH7 { 0, 1, 3 }, // PUSH8 { 0, 1, 3 }, // PUSH9 { 0, 1, 3 }, // PUSH10 { 0, 1, 3 }, // PUSH11 { 0, 1, 3 }, // PUSH12 { 0, 1, 3 }, // PUSH13 { 0, 1, 3 }, // PUSH14 { 0, 1, 3 }, // PUSH15 { 0, 1, 3 }, // PUSH16 { 0, 1, 3 }, // PUSH17 { 0, 1, 3 }, // PUSH18 { 0, 1, 3 }, // PUSH19 { 0, 1, 3 }, // PUSH20 { 0, 1, 3 }, // PUSH21 { 0, 1, 3 }, // PUSH22 { 0, 1, 3 }, // PUSH23 { 0, 1, 3 }, // PUSH24 { 0, 1, 3 }, // PUSH25 { 0, 1, 3 }, // PUSH26 { 0, 1, 3 }, // PUSH27 { 0, 1, 3 }, // PUSH28 { 0, 1, 3 }, // PUSH29 { 0, 1, 3 }, // PUSH30 { 0, 1, 3 }, // PUSH31 { 0, 1, 3 }, // PUSH32 { 1, 2, 3 }, // DUP1 { 2, 3, 3 }, // DUP2 { 3, 4, 3 }, // DUP3 { 4, 5, 3 }, // DUP4 { 5, 6, 3 }, // DUP5 { 6, 7, 3 }, // DUP6 { 7, 8, 3 }, // DUP7 { 8, 9, 3 }, // DUP8 { 9, 10, 3 }, // DUP9 { 10, 11, 3 }, // DUP10 { 11, 12, 3 }, // DUP11 { 12, 13, 3 }, // DUP12 { 13, 14, 3 }, // DUP13 { 14, 15, 3 }, // DUP14 { 15, 16, 3 }, // DUP15 { 16, 17, 3 }, // DUP16 { 2, 2, 3 }, // SWAP1 { 3, 3, 3 }, // SWAP2 { 4, 4, 3 }, // SWAP3 { 5, 5, 3 }, // SWAP4 { 6, 6, 3 }, // SWAP5 { 7, 7, 3 }, // SWAP6 { 8, 8, 3 }, // SWAP7 { 9, 9, 3 }, // SWAP8 { 10, 10, 3 }, // SWAP9 { 11, 11, 3 }, // SWAP10 { 12, 12, 3 }, // SWAP11 { 13, 13, 3 }, // SWAP12 { 14, 14, 3 }, // SWAP13 { 15, 15, 3 }, // SWAP14 { 16, 16, 3 }, // SWAP15 { 17, 17, 3 }, // SWAP16 { 2, 0, 375 }, // LOG0 { 3, 0, 750 }, // LOG1 { 4, 0, 1125 }, // LOG2 { 5, 0, 1500 }, // LOG3 { 6, 0, 1875 }, // LOG4 { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 3, 1, 32000 }, // CREATE { 7, 1, 40 }, // CALL { 7, 1, 40 }, // CALLCODE { 2, 0, 0 }, // RETURN { 6, 1, 40 }, // DELEGATECALL { 7, 1, 40 }, // CALLBLACKBOX { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 6, 1, 40 }, // STATICCALL { 0, 0, 0xffffffff }, // unused { 0, 0, 0xffffffff }, // unused { 2, 0, 0 }, // REVERT { 0, 0, 0xffffffff }, // unused { 1, 0, 0 }, // SUICIDE capstone-sys-0.11.0/capstone/arch/EVM/EVMModule.c010066400017500001750000000012131363402546700175740ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh, 2018 */ #ifdef CAPSTONE_HAS_EVM #include "../../cs_priv.h" #include "EVMDisassembler.h" #include "EVMInstPrinter.h" #include "EVMMapping.h" #include "EVMModule.h" cs_err EVM_global_init(cs_struct *ud) { // verify if requested mode is valid if (ud->mode) return CS_ERR_MODE; ud->printer = EVM_printInst; ud->printer_info = NULL; ud->insn_id = EVM_get_insn_id; ud->insn_name = EVM_insn_name; ud->group_name = EVM_group_name; ud->disasm = EVM_getInstruction; return CS_ERR_OK; } cs_err EVM_option(cs_struct *handle, cs_opt_type type, size_t value) { return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/EVM/EVMModule.h010066400017500001750000000004311363402546700176020ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_EVM_MODULE_H #define CS_EVM_MODULE_H #include "../../utils.h" cs_err EVM_global_init(cs_struct *ud); cs_err EVM_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XDisassembler.c010066400017500001750000001606101363403403300212460ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ /* ======================================================================== */ /* ================================ INCLUDES ============================== */ /* ======================================================================== */ #include #include #include #include "../../cs_priv.h" #include "../../utils.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCRegisterInfo.h" #include "M680XInstPrinter.h" #include "M680XDisassembler.h" #include "M680XDisassemblerInternals.h" #ifdef CAPSTONE_HAS_M680X #ifndef DECL_SPEC #ifdef _MSC_VER #define DECL_SPEC __cdecl #else #define DECL_SPEC #endif // _MSC_VER #endif // DECL_SPEC /* ======================================================================== */ /* ============================ GENERAL DEFINES =========================== */ /* ======================================================================== */ /* ======================================================================== */ /* =============================== PROTOTYPES ============================= */ /* ======================================================================== */ typedef enum insn_hdlr_id { illgl_hid, rel8_hid, rel16_hid, imm8_hid, imm16_hid, imm32_hid, dir_hid, ext_hid, idxX_hid, idxY_hid, idx09_hid, inh_hid, rr09_hid, rbits_hid, bitmv_hid, tfm_hid, opidx_hid, opidxdr_hid, idxX0_hid, idxX16_hid, imm8rel_hid, idxS_hid, idxS16_hid, idxXp_hid, idxX0p_hid, idx12_hid, idx12s_hid, rr12_hid, loop_hid, index_hid, imm8i12x_hid, imm16i12x_hid, exti12x_hid, HANDLER_ID_ENDING, } insn_hdlr_id; // Access modes for the first 4 operands. If there are more than // four operands they use the same access mode as the 4th operand. // // u: unchanged // r: (r)read access // w: (w)write access // m: (m)odify access (= read + write) // typedef enum e_access_mode { uuuu, rrrr, wwww, rwww, rrrm, rmmm, wrrr, mrrr, mwww, mmmm, mwrr, mmrr, wmmm, rruu, muuu, ACCESS_MODE_ENDING, } e_access_mode; // Access type values are compatible with enum cs_ac_type: typedef enum e_access { UNCHANGED = CS_AC_INVALID, READ = CS_AC_READ, WRITE = CS_AC_WRITE, MODIFY = (CS_AC_READ | CS_AC_WRITE), } e_access; /* Properties of one instruction in PAGE1 (without prefix) */ typedef struct inst_page1 { unsigned insn : 9; // A value of type m680x_insn unsigned handler_id1 : 6; // Type insn_hdlr_id, first instr. handler id unsigned handler_id2 : 6; // Type insn_hdlr_id, second instr. handler id } inst_page1; /* Properties of one instruction in any other PAGE X */ typedef struct inst_pageX { unsigned opcode : 8; // The opcode byte unsigned insn : 9; // A value of type m680x_insn unsigned handler_id1 : 6; // Type insn_hdlr_id, first instr. handler id unsigned handler_id2 : 6; // Type insn_hdlr_id, second instr. handler id } inst_pageX; typedef struct insn_props { unsigned group : 4; unsigned access_mode : 5; // A value of type e_access_mode unsigned reg0 : 5; // A value of type m680x_reg unsigned reg1 : 5; // A value of type m680x_reg bool cc_modified : 1; bool update_reg_access : 1; } insn_props; #include "m6800.inc" #include "m6801.inc" #include "hd6301.inc" #include "m6811.inc" #include "cpu12.inc" #include "m6805.inc" #include "m6808.inc" #include "hcs08.inc" #include "m6809.inc" #include "hd6309.inc" #include "insn_props.inc" ////////////////////////////////////////////////////////////////////////////// // M680X instuctions have 1 up to 8 bytes (CPU12: MOVW IDX2,IDX2). // A reader is needed to read a byte or word from a given memory address. // See also X86 reader(...) static bool read_byte(const m680x_info *info, uint8_t *byte, uint16_t address) { if (address - info->offset >= info->size) // out of code buffer range return false; *byte = info->code[address - info->offset]; return true; } static bool read_byte_sign_extended(const m680x_info *info, int16_t *word, uint16_t address) { if (address - info->offset >= info->size) // out of code buffer range return false; *word = (int16_t) info->code[address - info->offset]; if (*word & 0x80) *word |= 0xFF00; return true; } static bool read_word(const m680x_info *info, uint16_t *word, uint16_t address) { if (address + 1 - info->offset >= info->size) // out of code buffer range return false; *word = (uint16_t)info->code[address - info->offset] << 8; *word |= (uint16_t)info->code[address + 1 - info->offset]; return true; } static bool read_sdword(const m680x_info *info, int32_t *sdword, uint16_t address) { if (address + 3 - info->offset >= info->size) // out of code buffer range return false; *sdword = (uint32_t)info->code[address - info->offset] << 24; *sdword |= (uint32_t)info->code[address + 1 - info->offset] << 16; *sdword |= (uint32_t)info->code[address + 2 - info->offset] << 8; *sdword |= (uint32_t)info->code[address + 3 - info->offset]; return true; } // For PAGE2 and PAGE3 opcodes when using an an array of inst_page1 most // entries have M680X_INS_ILLGL. To avoid wasting memory an inst_pageX is // used which contains the opcode. Using a binary search for the right opcode // is much faster (= O(log n) ) in comparison to a linear search ( = O(n) ). static int binary_search(const inst_pageX *const inst_pageX_table, int table_size, uint8_t opcode) { int first = 0; int last = table_size - 1; int middle = (first + last) / 2; while (first <= last) { if (inst_pageX_table[middle].opcode < opcode) { first = middle + 1; } else if (inst_pageX_table[middle].opcode == opcode) { return middle; /* item found */ } else last = middle - 1; middle = (first + last) / 2; } if (first > last) return -1; /* item not found */ return -2; } void M680X_get_insn_id(cs_struct *handle, cs_insn *insn, unsigned int id) { const m680x_info *const info = (const m680x_info *)handle->printer_info; const cpu_tables *cpu = info->cpu; uint8_t insn_prefix = (id >> 8) & 0xff; int index; int i; insn->id = M680X_INS_ILLGL; for (i = 0; i < ARR_SIZE(cpu->pageX_prefix); ++i) { if (cpu->pageX_table_size[i] == 0 || (cpu->inst_pageX_table[i] == NULL)) break; if (cpu->pageX_prefix[i] == insn_prefix) { index = binary_search(cpu->inst_pageX_table[i], cpu->pageX_table_size[i], id & 0xff); insn->id = (index >= 0) ? cpu->inst_pageX_table[i][index].insn : M680X_INS_ILLGL; return; } } if (insn_prefix != 0) return; insn->id = cpu->inst_page1_table[id].insn; if (insn->id != M680X_INS_ILLGL) return; // Check if opcode byte is present in an overlay table for (i = 0; i < ARR_SIZE(cpu->overlay_table_size); ++i) { if (cpu->overlay_table_size[i] == 0 || (cpu->inst_overlay_table[i] == NULL)) break; if ((index = binary_search(cpu->inst_overlay_table[i], cpu->overlay_table_size[i], id & 0xff)) >= 0) { insn->id = cpu->inst_overlay_table[i][index].insn; return; } } } static void add_insn_group(cs_detail *detail, m680x_group_type group) { if (detail != NULL && (group != M680X_GRP_INVALID) && (group != M680X_GRP_ENDING)) detail->groups[detail->groups_count++] = (uint8_t)group; } static bool exists_reg_list(uint16_t *regs, uint8_t count, m680x_reg reg) { uint8_t i; for (i = 0; i < count; ++i) { if (regs[i] == (uint16_t)reg) return true; } return false; } static void add_reg_to_rw_list(MCInst *MI, m680x_reg reg, e_access access) { cs_detail *detail = MI->flat_insn->detail; if (detail == NULL || (reg == M680X_REG_INVALID)) return; switch (access) { case MODIFY: if (!exists_reg_list(detail->regs_read, detail->regs_read_count, reg)) detail->regs_read[detail->regs_read_count++] = (uint16_t)reg; // intentionally fall through case WRITE: if (!exists_reg_list(detail->regs_write, detail->regs_write_count, reg)) detail->regs_write[detail->regs_write_count++] = (uint16_t)reg; break; case READ: if (!exists_reg_list(detail->regs_read, detail->regs_read_count, reg)) detail->regs_read[detail->regs_read_count++] = (uint16_t)reg; break; case UNCHANGED: default: break; } } static void update_am_reg_list(MCInst *MI, m680x_info *info, cs_m680x_op *op, e_access access) { if (MI->flat_insn->detail == NULL) return; switch (op->type) { case M680X_OP_REGISTER: add_reg_to_rw_list(MI, op->reg, access); break; case M680X_OP_INDEXED: add_reg_to_rw_list(MI, op->idx.base_reg, READ); if (op->idx.base_reg == M680X_REG_X && info->cpu->reg_byte_size[M680X_REG_H]) add_reg_to_rw_list(MI, M680X_REG_H, READ); if (op->idx.offset_reg != M680X_REG_INVALID) add_reg_to_rw_list(MI, op->idx.offset_reg, READ); if (op->idx.inc_dec) { add_reg_to_rw_list(MI, op->idx.base_reg, WRITE); if (op->idx.base_reg == M680X_REG_X && info->cpu->reg_byte_size[M680X_REG_H]) add_reg_to_rw_list(MI, M680X_REG_H, WRITE); } break; default: break; } } static const e_access g_access_mode_to_access[4][15] = { { UNCHANGED, READ, WRITE, READ, READ, READ, WRITE, MODIFY, MODIFY, MODIFY, MODIFY, MODIFY, WRITE, READ, MODIFY, }, { UNCHANGED, READ, WRITE, WRITE, READ, MODIFY, READ, READ, WRITE, MODIFY, WRITE, MODIFY, MODIFY, READ, UNCHANGED, }, { UNCHANGED, READ, WRITE, WRITE, READ, MODIFY, READ, READ, WRITE, MODIFY, READ, READ, MODIFY, UNCHANGED, UNCHANGED, }, { UNCHANGED, READ, WRITE, WRITE, MODIFY, MODIFY, READ, READ, WRITE, MODIFY, READ, READ, MODIFY, UNCHANGED, UNCHANGED, }, }; static e_access get_access(int operator_index, e_access_mode access_mode) { int idx = (operator_index > 3) ? 3 : operator_index; return g_access_mode_to_access[idx][access_mode]; } static void build_regs_read_write_counts(MCInst *MI, m680x_info *info, e_access_mode access_mode) { cs_m680x *m680x = &info->m680x; int i; if (MI->flat_insn->detail == NULL || (!m680x->op_count)) return; for (i = 0; i < m680x->op_count; ++i) { e_access access = get_access(i, access_mode); update_am_reg_list(MI, info, &m680x->operands[i], access); } } static void add_operators_access(MCInst *MI, m680x_info *info, e_access_mode access_mode) { cs_m680x *m680x = &info->m680x; int offset = 0; int i; if (MI->flat_insn->detail == NULL || (!m680x->op_count) || (access_mode == uuuu)) return; for (i = 0; i < m680x->op_count; ++i) { e_access access; // Ugly fix: MULD has a register operand, an immediate operand // AND an implicitly changed register W if (info->insn == M680X_INS_MULD && (i == 1)) offset = 1; access = get_access(i + offset, access_mode); m680x->operands[i].access = access; } } typedef struct insn_to_changed_regs { m680x_insn insn; e_access_mode access_mode; m680x_reg regs[10]; } insn_to_changed_regs; static void set_changed_regs_read_write_counts(MCInst *MI, m680x_info *info) { //TABLE #define EOL M680X_REG_INVALID static const insn_to_changed_regs changed_regs[] = { { M680X_INS_BSR, mmmm, { M680X_REG_S, EOL } }, { M680X_INS_CALL, mmmm, { M680X_REG_S, EOL } }, { M680X_INS_CWAI, mrrr, { M680X_REG_S, M680X_REG_PC, M680X_REG_U, M680X_REG_Y, M680X_REG_X, M680X_REG_DP, M680X_REG_D, M680X_REG_CC, EOL }, }, { M680X_INS_DAA, mrrr, { M680X_REG_A, EOL } }, { M680X_INS_DIV, mmrr, { M680X_REG_A, M680X_REG_H, M680X_REG_X, EOL } }, { M680X_INS_EDIV, mmrr, { M680X_REG_D, M680X_REG_Y, M680X_REG_X, EOL } }, { M680X_INS_EDIVS, mmrr, { M680X_REG_D, M680X_REG_Y, M680X_REG_X, EOL } }, { M680X_INS_EMACS, mrrr, { M680X_REG_X, M680X_REG_Y, EOL } }, { M680X_INS_EMAXM, rrrr, { M680X_REG_D, EOL } }, { M680X_INS_EMINM, rrrr, { M680X_REG_D, EOL } }, { M680X_INS_EMUL, mmrr, { M680X_REG_D, M680X_REG_Y, EOL } }, { M680X_INS_EMULS, mmrr, { M680X_REG_D, M680X_REG_Y, EOL } }, { M680X_INS_ETBL, wmmm, { M680X_REG_A, M680X_REG_B, EOL } }, { M680X_INS_FDIV, mmmm, { M680X_REG_D, M680X_REG_X, EOL } }, { M680X_INS_IDIV, mmmm, { M680X_REG_D, M680X_REG_X, EOL } }, { M680X_INS_IDIVS, mmmm, { M680X_REG_D, M680X_REG_X, EOL } }, { M680X_INS_JSR, mmmm, { M680X_REG_S, EOL } }, { M680X_INS_LBSR, mmmm, { M680X_REG_S, EOL } }, { M680X_INS_MAXM, rrrr, { M680X_REG_A, EOL } }, { M680X_INS_MINM, rrrr, { M680X_REG_A, EOL } }, { M680X_INS_MEM, mmrr, { M680X_REG_X, M680X_REG_Y, M680X_REG_A, EOL } }, { M680X_INS_MUL, mmmm, { M680X_REG_A, M680X_REG_B, EOL } }, { M680X_INS_MULD, mwrr, { M680X_REG_D, M680X_REG_W, EOL } }, { M680X_INS_PSHA, rmmm, { M680X_REG_A, M680X_REG_S, EOL } }, { M680X_INS_PSHB, rmmm, { M680X_REG_B, M680X_REG_S, EOL } }, { M680X_INS_PSHC, rmmm, { M680X_REG_CC, M680X_REG_S, EOL } }, { M680X_INS_PSHD, rmmm, { M680X_REG_D, M680X_REG_S, EOL } }, { M680X_INS_PSHH, rmmm, { M680X_REG_H, M680X_REG_S, EOL } }, { M680X_INS_PSHX, rmmm, { M680X_REG_X, M680X_REG_S, EOL } }, { M680X_INS_PSHY, rmmm, { M680X_REG_Y, M680X_REG_S, EOL } }, { M680X_INS_PULA, wmmm, { M680X_REG_A, M680X_REG_S, EOL } }, { M680X_INS_PULB, wmmm, { M680X_REG_B, M680X_REG_S, EOL } }, { M680X_INS_PULC, wmmm, { M680X_REG_CC, M680X_REG_S, EOL } }, { M680X_INS_PULD, wmmm, { M680X_REG_D, M680X_REG_S, EOL } }, { M680X_INS_PULH, wmmm, { M680X_REG_H, M680X_REG_S, EOL } }, { M680X_INS_PULX, wmmm, { M680X_REG_X, M680X_REG_S, EOL } }, { M680X_INS_PULY, wmmm, { M680X_REG_Y, M680X_REG_S, EOL } }, { M680X_INS_REV, mmrr, { M680X_REG_A, M680X_REG_X, M680X_REG_Y, EOL } }, { M680X_INS_REVW, mmmm, { M680X_REG_A, M680X_REG_X, M680X_REG_Y, EOL } }, { M680X_INS_RTC, mwww, { M680X_REG_S, M680X_REG_PC, EOL } }, { M680X_INS_RTI, mwww, { M680X_REG_S, M680X_REG_CC, M680X_REG_B, M680X_REG_A, M680X_REG_DP, M680X_REG_X, M680X_REG_Y, M680X_REG_U, M680X_REG_PC, EOL }, }, { M680X_INS_RTS, mwww, { M680X_REG_S, M680X_REG_PC, EOL } }, { M680X_INS_SEX, wrrr, { M680X_REG_A, M680X_REG_B, EOL } }, { M680X_INS_SEXW, rwww, { M680X_REG_W, M680X_REG_D, EOL } }, { M680X_INS_SWI, mmrr, { M680X_REG_S, M680X_REG_PC, M680X_REG_U, M680X_REG_Y, M680X_REG_X, M680X_REG_DP, M680X_REG_A, M680X_REG_B, M680X_REG_CC, EOL } }, { M680X_INS_SWI2, mmrr, { M680X_REG_S, M680X_REG_PC, M680X_REG_U, M680X_REG_Y, M680X_REG_X, M680X_REG_DP, M680X_REG_A, M680X_REG_B, M680X_REG_CC, EOL }, }, { M680X_INS_SWI3, mmrr, { M680X_REG_S, M680X_REG_PC, M680X_REG_U, M680X_REG_Y, M680X_REG_X, M680X_REG_DP, M680X_REG_A, M680X_REG_B, M680X_REG_CC, EOL }, }, { M680X_INS_TBL, wrrr, { M680X_REG_A, M680X_REG_B, EOL } }, { M680X_INS_WAI, mrrr, { M680X_REG_S, M680X_REG_PC, M680X_REG_X, M680X_REG_A, M680X_REG_B, M680X_REG_CC, EOL } }, { M680X_INS_WAV, rmmm, { M680X_REG_A, M680X_REG_B, M680X_REG_X, M680X_REG_Y, EOL } }, { M680X_INS_WAVR, rmmm, { M680X_REG_A, M680X_REG_B, M680X_REG_X, M680X_REG_Y, EOL } }, }; int i, j; if (MI->flat_insn->detail == NULL) return; for (i = 0; i < ARR_SIZE(changed_regs); ++i) { if (info->insn == changed_regs[i].insn) { e_access_mode access_mode = changed_regs[i].access_mode; for (j = 0; changed_regs[i].regs[j] != EOL; ++j) { e_access access; m680x_reg reg = changed_regs[i].regs[j]; if (!info->cpu->reg_byte_size[reg]) { if (info->insn != M680X_INS_MUL) continue; // Hack for M68HC05: MUL uses reg. A,X reg = M680X_REG_X; } access = get_access(j, access_mode); add_reg_to_rw_list(MI, reg, access); } } } #undef EOL } typedef struct insn_desc { uint32_t opcode; m680x_insn insn; insn_hdlr_id hid[2]; uint16_t insn_size; } insn_desc; // If successfull return the additional byte size needed for M6809 // indexed addressing mode (including the indexed addressing post_byte). // On error return -1. static int get_indexed09_post_byte_size(const m680x_info *info, uint16_t address) { uint8_t ir = 0; uint8_t post_byte; // Read the indexed addressing post byte. if (!read_byte(info, &post_byte, address)) return -1; // Depending on the indexed addressing mode more bytes have to be read. switch (post_byte & 0x9F) { case 0x87: case 0x8A: case 0x8E: case 0x8F: case 0x90: case 0x92: case 0x97: case 0x9A: case 0x9E: return -1; // illegal indexed post bytes case 0x88: // n8,R case 0x8C: // n8,PCR case 0x98: // [n8,R] case 0x9C: // [n8,PCR] if (!read_byte(info, &ir, address + 1)) return -1; return 2; case 0x89: // n16,R case 0x8D: // n16,PCR case 0x99: // [n16,R] case 0x9D: // [n16,PCR] if (!read_byte(info, &ir, address + 2)) return -1; return 3; case 0x9F: // [n] if ((post_byte & 0x60) != 0 || !read_byte(info, &ir, address + 2)) return -1; return 3; } // Any other indexed post byte is valid and // no additional bytes have to be read. return 1; } // If successfull return the additional byte size needed for CPU12 // indexed addressing mode (including the indexed addressing post_byte). // On error return -1. static int get_indexed12_post_byte_size(const m680x_info *info, uint16_t address, bool is_subset) { uint8_t ir; uint8_t post_byte; // Read the indexed addressing post byte. if (!read_byte(info, &post_byte, address)) return -1; // Depending on the indexed addressing mode more bytes have to be read. if (!(post_byte & 0x20)) // n5,R return 1; switch (post_byte & 0xe7) { case 0xe0: case 0xe1: // n9,R if (is_subset) return -1; if (!read_byte(info, &ir, address)) return -1; return 2; case 0xe2: // n16,R case 0xe3: // [n16,R] if (is_subset) return -1; if (!read_byte(info, &ir, address + 1)) return -1; return 3; case 0xe4: // A,R case 0xe5: // B,R case 0xe6: // D,R case 0xe7: // [D,R] default: // n,-r n,+r n,r- n,r+ break; } return 1; } // Check for M6809/HD6309 TFR/EXG instruction for valid register static bool is_tfr09_reg_valid(const m680x_info *info, uint8_t reg_nibble) { if (info->cpu->tfr_reg_valid != NULL) return info->cpu->tfr_reg_valid[reg_nibble]; return true; // e.g. for the M6309 all registers are valid } // Check for CPU12 TFR/EXG instruction for valid register static bool is_exg_tfr12_post_byte_valid(const m680x_info *info, uint8_t post_byte) { return !(post_byte & 0x08); } static bool is_tfm_reg_valid(const m680x_info *info, uint8_t reg_nibble) { // HD6809 TFM instruction: Only register X,Y,U,S,D is allowed return reg_nibble <= 4; } // If successfull return the additional byte size needed for CPU12 // loop instructions DBEQ/DBNE/IBEQ/IBNE/TBEQ/TBNE (including the post byte). // On error return -1. static int get_loop_post_byte_size(const m680x_info *info, uint16_t address) { uint8_t post_byte; uint8_t rr; if (!read_byte(info, &post_byte, address)) return -1; // According to documentation bit 3 is don't care and not checked here. if ((post_byte >= 0xc0) || ((post_byte & 0x07) == 2) || ((post_byte & 0x07) == 3)) return -1; if (!read_byte(info, &rr, address + 1)) return -1; return 2; } // If successfull return the additional byte size needed for HD6309 // bit move instructions BAND/BEOR/BIAND/BIEOR/BIOR/BOR/LDBT/STBT // (including the post byte). // On error return -1. static int get_bitmv_post_byte_size(const m680x_info *info, uint16_t address) { uint8_t post_byte; uint8_t rr; if (!read_byte(info, &post_byte, address)) return -1; if ((post_byte & 0xc0) == 0xc0) return -1; // Invalid register specified else { if (!read_byte(info, &rr, address + 1)) return -1; } return 2; } static bool is_sufficient_code_size(const m680x_info *info, uint16_t address, insn_desc *insn_description) { int i; bool retval = true; uint16_t size = 0; int sz; for (i = 0; i < 2; i++) { uint8_t ir = 0; bool is_subset = false; switch (insn_description->hid[i]) { case imm32_hid: if ((retval = read_byte(info, &ir, address + size + 3))) size += 4; break; case ext_hid: case imm16_hid: case rel16_hid: case imm8rel_hid: case opidxdr_hid: case idxX16_hid: case idxS16_hid: if ((retval = read_byte(info, &ir, address + size + 1))) size += 2; break; case rel8_hid: case dir_hid: case rbits_hid: case imm8_hid: case idxX_hid: case idxXp_hid: case idxY_hid: case idxS_hid: case index_hid: if ((retval = read_byte(info, &ir, address + size))) size++; break; case illgl_hid: case inh_hid: case idxX0_hid: case idxX0p_hid: case opidx_hid: retval = true; break; case idx09_hid: sz = get_indexed09_post_byte_size(info, address + size); if (sz >= 0) size += sz; else retval = false; break; case idx12s_hid: is_subset = true; // intentionally fall through case idx12_hid: sz = get_indexed12_post_byte_size(info, address + size, is_subset); if (sz >= 0) size += sz; else retval = false; break; case exti12x_hid: case imm16i12x_hid: sz = get_indexed12_post_byte_size(info, address + size, false); if (sz >= 0) { size += sz; if ((retval = read_byte(info, &ir, address + size + 1))) size += 2; } else retval = false; break; case imm8i12x_hid: sz = get_indexed12_post_byte_size(info, address + size, false); if (sz >= 0) { size += sz; if ((retval = read_byte(info, &ir, address + size))) size++; } else retval = false; break; case tfm_hid: if ((retval = read_byte(info, &ir, address + size))) { size++; retval = is_tfm_reg_valid(info, (ir >> 4) & 0x0F) && is_tfm_reg_valid(info, ir & 0x0F); } break; case rr09_hid: if ((retval = read_byte(info, &ir, address + size))) { size++; retval = is_tfr09_reg_valid(info, (ir >> 4) & 0x0F) && is_tfr09_reg_valid(info, ir & 0x0F); } break; case rr12_hid: if ((retval = read_byte(info, &ir, address + size))) { size++; retval = is_exg_tfr12_post_byte_valid(info, ir); } break; case bitmv_hid: sz = get_bitmv_post_byte_size(info, address + size); if (sz >= 0) size += sz; else retval = false; break; case loop_hid: sz = get_loop_post_byte_size(info, address + size); if (sz >= 0) size += sz; else retval = false; break; default: CS_ASSERT(0 && "Unexpected instruction handler id"); retval = false; break; } if (!retval) return false; } insn_description->insn_size += size; return retval; } // Check for a valid M680X instruction AND for enough bytes in the code buffer // Return an instruction description in insn_desc. static bool decode_insn(const m680x_info *info, uint16_t address, insn_desc *insn_description) { const inst_pageX *inst_table = NULL; const cpu_tables *cpu = info->cpu; int table_size = 0; uint16_t base_address = address; uint8_t ir; // instruction register int i; int index; if (!read_byte(info, &ir, address++)) return false; insn_description->insn = M680X_INS_ILLGL; insn_description->opcode = ir; // Check if a page prefix byte is present for (i = 0; i < ARR_SIZE(cpu->pageX_table_size); ++i) { if (cpu->pageX_table_size[i] == 0 || (cpu->inst_pageX_table[i] == NULL)) break; if ((cpu->pageX_prefix[i] == ir)) { // Get pageX instruction and handler id. // Abort for illegal instr. inst_table = cpu->inst_pageX_table[i]; table_size = cpu->pageX_table_size[i]; if (!read_byte(info, &ir, address++)) return false; insn_description->opcode = (insn_description->opcode << 8) | ir; if ((index = binary_search(inst_table, table_size, ir)) < 0) return false; insn_description->hid[0] = inst_table[index].handler_id1; insn_description->hid[1] = inst_table[index].handler_id2; insn_description->insn = inst_table[index].insn; break; } } if (insn_description->insn == M680X_INS_ILLGL) { // Get page1 insn description insn_description->insn = cpu->inst_page1_table[ir].insn; insn_description->hid[0] = cpu->inst_page1_table[ir].handler_id1; insn_description->hid[1] = cpu->inst_page1_table[ir].handler_id2; } if (insn_description->insn == M680X_INS_ILLGL) { // Check if opcode byte is present in an overlay table for (i = 0; i < ARR_SIZE(cpu->overlay_table_size); ++i) { if (cpu->overlay_table_size[i] == 0 || (cpu->inst_overlay_table[i] == NULL)) break; inst_table = cpu->inst_overlay_table[i]; table_size = cpu->overlay_table_size[i]; if ((index = binary_search(inst_table, table_size, ir)) >= 0) { insn_description->hid[0] = inst_table[index].handler_id1; insn_description->hid[1] = inst_table[index].handler_id2; insn_description->insn = inst_table[index].insn; break; } } } insn_description->insn_size = address - base_address; return (insn_description->insn != M680X_INS_ILLGL) && (insn_description->insn != M680X_INS_INVLD) && is_sufficient_code_size(info, address, insn_description); } static void illegal_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x_op *op0 = &info->m680x.operands[info->m680x.op_count++]; uint8_t temp8 = 0; info->insn = M680X_INS_ILLGL; read_byte(info, &temp8, (*address)++); op0->imm = (int32_t)temp8 & 0xff; op0->type = M680X_OP_IMMEDIATE; op0->size = 1; } static void inherent_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { // There is nothing to do here :-) } static void add_reg_operand(m680x_info *info, m680x_reg reg) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_REGISTER; op->reg = reg; op->size = info->cpu->reg_byte_size[reg]; } static void set_operand_size(m680x_info *info, cs_m680x_op *op, uint8_t default_size) { cs_m680x *m680x = &info->m680x; if (info->insn == M680X_INS_JMP || info->insn == M680X_INS_JSR) op->size = 0; else if (info->insn == M680X_INS_DIVD || ((info->insn == M680X_INS_AIS || info->insn == M680X_INS_AIX) && op->type != M680X_OP_REGISTER)) op->size = 1; else if (info->insn == M680X_INS_DIVQ || info->insn == M680X_INS_MOVW) op->size = 2; else if (info->insn == M680X_INS_EMACS) op->size = 4; else if ((m680x->op_count > 0) && (m680x->operands[0].type == M680X_OP_REGISTER)) op->size = m680x->operands[0].size; else op->size = default_size; } static const m680x_reg reg_s_reg_ids[] = { M680X_REG_CC, M680X_REG_A, M680X_REG_B, M680X_REG_DP, M680X_REG_X, M680X_REG_Y, M680X_REG_U, M680X_REG_PC, }; static const m680x_reg reg_u_reg_ids[] = { M680X_REG_CC, M680X_REG_A, M680X_REG_B, M680X_REG_DP, M680X_REG_X, M680X_REG_Y, M680X_REG_S, M680X_REG_PC, }; static void reg_bits_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x_op *op0 = &info->m680x.operands[0]; uint8_t reg_bits = 0; uint16_t bit_index; const m680x_reg *reg_to_reg_ids = NULL; read_byte(info, ®_bits, (*address)++); switch (op0->reg) { case M680X_REG_U: reg_to_reg_ids = ®_u_reg_ids[0]; break; case M680X_REG_S: reg_to_reg_ids = ®_s_reg_ids[0]; break; default: CS_ASSERT(0 && "Unexpected operand0 register"); break; } if ((info->insn == M680X_INS_PULU || (info->insn == M680X_INS_PULS)) && ((reg_bits & 0x80) != 0)) // PULS xxx,PC or PULU xxx,PC which is like return from // subroutine (RTS) add_insn_group(MI->flat_insn->detail, M680X_GRP_RET); for (bit_index = 0; bit_index < 8; ++bit_index) { if (reg_bits & (1 << bit_index)) add_reg_operand(info, reg_to_reg_ids[bit_index]); } } static const m680x_reg g_tfr_exg_reg_ids[] = { /* 16-bit registers */ M680X_REG_D, M680X_REG_X, M680X_REG_Y, M680X_REG_U, M680X_REG_S, M680X_REG_PC, M680X_REG_W, M680X_REG_V, /* 8-bit registers */ M680X_REG_A, M680X_REG_B, M680X_REG_CC, M680X_REG_DP, M680X_REG_0, M680X_REG_0, M680X_REG_E, M680X_REG_F, }; static void reg_reg09_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint8_t regs = 0; read_byte(info, ®s, (*address)++); add_reg_operand(info, g_tfr_exg_reg_ids[regs >> 4]); add_reg_operand(info, g_tfr_exg_reg_ids[regs & 0x0f]); if ((regs & 0x0f) == 0x05) { // EXG xxx,PC or TFR xxx,PC which is like a JMP add_insn_group(MI->flat_insn->detail, M680X_GRP_JUMP); } } static void reg_reg12_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { static const m680x_reg g_tfr_exg12_reg0_ids[] = { M680X_REG_A, M680X_REG_B, M680X_REG_CC, M680X_REG_TMP3, M680X_REG_D, M680X_REG_X, M680X_REG_Y, M680X_REG_S, }; static const m680x_reg g_tfr_exg12_reg1_ids[] = { M680X_REG_A, M680X_REG_B, M680X_REG_CC, M680X_REG_TMP2, M680X_REG_D, M680X_REG_X, M680X_REG_Y, M680X_REG_S, }; uint8_t regs = 0; read_byte(info, ®s, (*address)++); // The opcode of this instruction depends on // the msb of its post byte. if (regs & 0x80) info->insn = M680X_INS_EXG; else info->insn = M680X_INS_TFR; add_reg_operand(info, g_tfr_exg12_reg0_ids[(regs >> 4) & 0x07]); add_reg_operand(info, g_tfr_exg12_reg1_ids[regs & 0x07]); } static void add_rel_operand(m680x_info *info, int16_t offset, uint16_t address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_RELATIVE; op->size = 0; op->rel.offset = offset; op->rel.address = address; } static void relative8_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { int16_t offset = 0; read_byte_sign_extended(info, &offset, (*address)++); add_rel_operand(info, offset, *address + offset); add_insn_group(MI->flat_insn->detail, M680X_GRP_BRAREL); if ((info->insn != M680X_INS_BRA) && (info->insn != M680X_INS_BSR) && (info->insn != M680X_INS_BRN)) add_reg_to_rw_list(MI, M680X_REG_CC, READ); } static void relative16_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint16_t offset = 0; read_word(info, &offset, *address); *address += 2; add_rel_operand(info, (int16_t)offset, *address + offset); add_insn_group(MI->flat_insn->detail, M680X_GRP_BRAREL); if ((info->insn != M680X_INS_LBRA) && (info->insn != M680X_INS_LBSR) && (info->insn != M680X_INS_LBRN)) add_reg_to_rw_list(MI, M680X_REG_CC, READ); } static const m680x_reg g_rr5_to_reg_ids[] = { M680X_REG_X, M680X_REG_Y, M680X_REG_U, M680X_REG_S, }; static void add_indexed_operand(m680x_info *info, m680x_reg base_reg, bool post_inc_dec, uint8_t inc_dec, uint8_t offset_bits, uint16_t offset, bool no_comma) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_INDEXED; set_operand_size(info, op, 1); op->idx.base_reg = base_reg; op->idx.offset_reg = M680X_REG_INVALID; op->idx.inc_dec = inc_dec; if (inc_dec && post_inc_dec) op->idx.flags |= M680X_IDX_POST_INC_DEC; if (offset_bits != M680X_OFFSET_NONE) { op->idx.offset = offset; op->idx.offset_addr = 0; } op->idx.offset_bits = offset_bits; op->idx.flags |= (no_comma ? M680X_IDX_NO_COMMA : 0); } // M6800/1/2/3 indexed mode handler static void indexedX_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint8_t offset = 0; read_byte(info, &offset, (*address)++); add_indexed_operand(info, M680X_REG_X, false, 0, M680X_OFFSET_BITS_8, (uint16_t)offset, false); } static void indexedY_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint8_t offset = 0; read_byte(info, &offset, (*address)++); add_indexed_operand(info, M680X_REG_Y, false, 0, M680X_OFFSET_BITS_8, (uint16_t)offset, false); } // M6809/M6309 indexed mode handler static void indexed09_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; uint8_t post_byte = 0; uint16_t offset = 0; int16_t soffset = 0; read_byte(info, &post_byte, (*address)++); op->type = M680X_OP_INDEXED; set_operand_size(info, op, 1); op->idx.base_reg = g_rr5_to_reg_ids[(post_byte >> 5) & 0x03]; op->idx.offset_reg = M680X_REG_INVALID; if (!(post_byte & 0x80)) { // n5,R if ((post_byte & 0x10) == 0x10) op->idx.offset = post_byte | 0xfff0; else op->idx.offset = post_byte & 0x0f; op->idx.offset_addr = op->idx.offset + *address; op->idx.offset_bits = M680X_OFFSET_BITS_5; } else { if ((post_byte & 0x10) == 0x10) op->idx.flags |= M680X_IDX_INDIRECT; // indexed addressing switch (post_byte & 0x1f) { case 0x00: // ,R+ op->idx.inc_dec = 1; op->idx.flags |= M680X_IDX_POST_INC_DEC; break; case 0x11: // [,R++] case 0x01: // ,R++ op->idx.inc_dec = 2; op->idx.flags |= M680X_IDX_POST_INC_DEC; break; case 0x02: // ,-R op->idx.inc_dec = -1; break; case 0x13: // [,--R] case 0x03: // ,--R op->idx.inc_dec = -2; break; case 0x14: // [,R] case 0x04: // ,R break; case 0x15: // [B,R] case 0x05: // B,R op->idx.offset_reg = M680X_REG_B; break; case 0x16: // [A,R] case 0x06: // A,R op->idx.offset_reg = M680X_REG_A; break; case 0x1c: // [n8,PCR] case 0x0c: // n8,PCR op->idx.base_reg = M680X_REG_PC; read_byte_sign_extended(info, &soffset, (*address)++); op->idx.offset_addr = offset + *address; op->idx.offset = soffset; op->idx.offset_bits = M680X_OFFSET_BITS_8; break; case 0x18: // [n8,R] case 0x08: // n8,R read_byte_sign_extended(info, &soffset, (*address)++); op->idx.offset = soffset; op->idx.offset_bits = M680X_OFFSET_BITS_8; break; case 0x1d: // [n16,PCR] case 0x0d: // n16,PCR op->idx.base_reg = M680X_REG_PC; read_word(info, &offset, *address); *address += 2; op->idx.offset_addr = offset + *address; op->idx.offset = (int16_t)offset; op->idx.offset_bits = M680X_OFFSET_BITS_16; break; case 0x19: // [n16,R] case 0x09: // n16,R read_word(info, &offset, *address); *address += 2; op->idx.offset = (int16_t)offset; op->idx.offset_bits = M680X_OFFSET_BITS_16; break; case 0x1b: // [D,R] case 0x0b: // D,R op->idx.offset_reg = M680X_REG_D; break; case 0x1f: // [n16] op->type = M680X_OP_EXTENDED; op->ext.indirect = true; read_word(info, &op->ext.address, *address); *address += 2; break; default: op->idx.base_reg = M680X_REG_INVALID; break; } } if (((info->insn == M680X_INS_LEAU) || (info->insn == M680X_INS_LEAS) || (info->insn == M680X_INS_LEAX) || (info->insn == M680X_INS_LEAY)) && (m680x->operands[0].reg == M680X_REG_X || (m680x->operands[0].reg == M680X_REG_Y))) // Only LEAX and LEAY modify CC register add_reg_to_rw_list(MI, M680X_REG_CC, MODIFY); } m680x_reg g_idx12_to_reg_ids[4] = { M680X_REG_X, M680X_REG_Y, M680X_REG_S, M680X_REG_PC, }; m680x_reg g_or12_to_reg_ids[3] = { M680X_REG_A, M680X_REG_B, M680X_REG_D }; // CPU12 indexed mode handler static void indexed12_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; uint8_t post_byte = 0; uint8_t offset8 = 0; read_byte(info, &post_byte, (*address)++); op->type = M680X_OP_INDEXED; set_operand_size(info, op, 1); op->idx.offset_reg = M680X_REG_INVALID; if (!(post_byte & 0x20)) { // n5,R n5 is a 5-bit signed offset op->idx.base_reg = g_idx12_to_reg_ids[(post_byte >> 6) & 0x03]; if ((post_byte & 0x10) == 0x10) op->idx.offset = post_byte | 0xfff0; else op->idx.offset = post_byte & 0x0f; op->idx.offset_addr = op->idx.offset + *address; op->idx.offset_bits = M680X_OFFSET_BITS_5; } else { if ((post_byte & 0xe0) == 0xe0) op->idx.base_reg = g_idx12_to_reg_ids[(post_byte >> 3) & 0x03]; switch (post_byte & 0xe7) { case 0xe0: case 0xe1: // n9,R read_byte(info, &offset8, (*address)++); op->idx.offset = offset8; if (post_byte & 0x01) // sign extension op->idx.offset |= 0xff00; op->idx.offset_bits = M680X_OFFSET_BITS_9; if (op->idx.base_reg == M680X_REG_PC) op->idx.offset_addr = op->idx.offset + *address; break; case 0xe3: // [n16,R] op->idx.flags |= M680X_IDX_INDIRECT; // intentionally fall through case 0xe2: // n16,R read_word(info, (uint16_t *)&op->idx.offset, *address); (*address) += 2; op->idx.offset_bits = M680X_OFFSET_BITS_16; if (op->idx.base_reg == M680X_REG_PC) op->idx.offset_addr = op->idx.offset + *address; break; case 0xe4: // A,R case 0xe5: // B,R case 0xe6: // D,R op->idx.offset_reg = g_or12_to_reg_ids[post_byte & 0x03]; break; case 0xe7: // [D,R] op->idx.offset_reg = M680X_REG_D; op->idx.flags |= M680X_IDX_INDIRECT; break; default: // n,-r n,+r n,r- n,r+ // PC is not allowed in this mode op->idx.base_reg = g_idx12_to_reg_ids[(post_byte >> 6) & 0x03]; op->idx.inc_dec = post_byte & 0x0f; if (op->idx.inc_dec & 0x08) // evtl. sign extend value op->idx.inc_dec |= 0xf0; if (op->idx.inc_dec >= 0) op->idx.inc_dec++; if (post_byte & 0x10) op->idx.flags |= M680X_IDX_POST_INC_DEC; break; } } } static void index_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_CONSTANT; read_byte(info, &op->const_val, (*address)++); }; static void direct_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_DIRECT; set_operand_size(info, op, 1); read_byte(info, &op->direct_addr, (*address)++); }; static void extended_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_EXTENDED; set_operand_size(info, op, 1); read_word(info, &op->ext.address, *address); *address += 2; } static void immediate_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; uint16_t word = 0; int16_t sword = 0; op->type = M680X_OP_IMMEDIATE; set_operand_size(info, op, 1); switch (op->size) { case 1: read_byte_sign_extended(info, &sword, *address); op->imm = sword; break; case 2: read_word(info, &word, *address); op->imm = (int16_t)word; break; case 4: read_sdword(info, &op->imm, *address); break; default: op->imm = 0; CS_ASSERT(0 && "Unexpected immediate byte size"); } *address += op->size; } // handler for bit move instructions, e.g: BAND A,5,1,$40 Used by HD6309 static void bit_move_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { static const m680x_reg m680x_reg[] = { M680X_REG_CC, M680X_REG_A, M680X_REG_B, M680X_REG_INVALID, }; uint8_t post_byte = 0; cs_m680x *m680x = &info->m680x; cs_m680x_op *op; read_byte(info, &post_byte, *address); (*address)++; // operand[0] = register add_reg_operand(info, m680x_reg[post_byte >> 6]); // operand[1] = bit index in source operand op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_CONSTANT; op->const_val = (post_byte >> 3) & 0x07; // operand[2] = bit index in destination operand op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_CONSTANT; op->const_val = post_byte & 0x07; direct_hdlr(MI, info, address); } // handler for TFM instruction, e.g: TFM X+,Y+ Used by HD6309 static void tfm_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { static const uint8_t inc_dec_r0[] = { 1, -1, 1, 0, }; static const uint8_t inc_dec_r1[] = { 1, -1, 0, 1, }; uint8_t regs = 0; uint8_t index = (MI->Opcode & 0xff) - 0x38; read_byte(info, ®s, *address); add_indexed_operand(info, g_tfr_exg_reg_ids[regs >> 4], true, inc_dec_r0[index], M680X_OFFSET_NONE, 0, true); add_indexed_operand(info, g_tfr_exg_reg_ids[regs & 0x0f], true, inc_dec_r1[index], M680X_OFFSET_NONE, 0, true); add_reg_to_rw_list(MI, M680X_REG_W, READ | WRITE); } static void opidx_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; // bit index is coded in Opcode op->type = M680X_OP_CONSTANT; op->const_val = (MI->Opcode & 0x0e) >> 1; } // handler for bit test and branch instruction. Used by M6805. // The bit index is part of the opcode. // Example: BRSET 3,<$40,LOOP static void opidx_dir_rel_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; // bit index is coded in Opcode op->type = M680X_OP_CONSTANT; op->const_val = (MI->Opcode & 0x0e) >> 1; direct_hdlr(MI, info, address); relative8_hdlr(MI, info, address); add_reg_to_rw_list(MI, M680X_REG_CC, MODIFY); } static void indexedX0_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { add_indexed_operand(info, M680X_REG_X, false, 0, M680X_OFFSET_NONE, 0, false); } static void indexedX16_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint16_t offset = 0; read_word(info, &offset, *address); *address += 2; add_indexed_operand(info, M680X_REG_X, false, 0, M680X_OFFSET_BITS_16, offset, false); } static void imm_rel_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { immediate_hdlr(MI, info, address); relative8_hdlr(MI, info, address); } static void indexedS_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint8_t offset = 0; read_byte(info, &offset, (*address)++); add_indexed_operand(info, M680X_REG_S, false, 0, M680X_OFFSET_BITS_8, (uint16_t)offset, false); } static void indexedS16_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint16_t offset = 0; read_word(info, &offset, *address); address += 2; add_indexed_operand(info, M680X_REG_S, false, 0, M680X_OFFSET_BITS_16, offset, false); } static void indexedX0p_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { add_indexed_operand(info, M680X_REG_X, true, 1, M680X_OFFSET_NONE, 0, true); } static void indexedXp_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { uint8_t offset = 0; read_byte(info, &offset, (*address)++); add_indexed_operand(info, M680X_REG_X, true, 1, M680X_OFFSET_BITS_8, (uint16_t)offset, false); } static void imm_idx12_x_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op = &m680x->operands[m680x->op_count++]; indexed12_hdlr(MI, info, address); op->type = M680X_OP_IMMEDIATE; if (info->insn == M680X_INS_MOVW) { uint16_t imm16 = 0; read_word(info, &imm16, *address); op->imm = (int16_t)imm16; op->size = 2; } else { uint8_t imm8 = 0; read_byte(info, &imm8, *address); op->imm = (int8_t)imm8; op->size = 1; } set_operand_size(info, op, 1); } static void ext_idx12_x_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { cs_m680x *m680x = &info->m680x; cs_m680x_op *op0 = &m680x->operands[m680x->op_count++]; uint16_t imm16 = 0; indexed12_hdlr(MI, info, address); read_word(info, &imm16, *address); op0->type = M680X_OP_EXTENDED; op0->ext.address = (int16_t)imm16; set_operand_size(info, op0, 1); } // handler for CPU12 DBEQ/DNBE/IBEQ/IBNE/TBEQ/TBNE instructions. // Example: DBNE X,$1000 static void loop_hdlr(MCInst *MI, m680x_info *info, uint16_t *address) { static const m680x_reg index_to_reg_id[] = { M680X_REG_A, M680X_REG_B, M680X_REG_INVALID, M680X_REG_INVALID, M680X_REG_D, M680X_REG_X, M680X_REG_Y, M680X_REG_S, }; static const m680x_insn index_to_insn_id[] = { M680X_INS_DBEQ, M680X_INS_DBNE, M680X_INS_TBEQ, M680X_INS_TBNE, M680X_INS_IBEQ, M680X_INS_IBNE, M680X_INS_ILLGL, M680X_INS_ILLGL }; cs_m680x *m680x = &info->m680x; uint8_t post_byte = 0; uint8_t rel = 0; cs_m680x_op *op; read_byte(info, &post_byte, (*address)++); info->insn = index_to_insn_id[(post_byte >> 5) & 0x07]; if (info->insn == M680X_INS_ILLGL) { illegal_hdlr(MI, info, address); }; read_byte(info, &rel, (*address)++); add_reg_operand(info, index_to_reg_id[post_byte & 0x07]); op = &m680x->operands[m680x->op_count++]; op->type = M680X_OP_RELATIVE; op->rel.offset = (post_byte & 0x10) ? 0xff00 | rel : rel; op->rel.address = *address + op->rel.offset; add_insn_group(MI->flat_insn->detail, M680X_GRP_BRAREL); } static void (*const g_insn_handler[])(MCInst *, m680x_info *, uint16_t *) = { illegal_hdlr, relative8_hdlr, relative16_hdlr, immediate_hdlr, // 8-bit immediate_hdlr, // 16-bit immediate_hdlr, // 32-bit direct_hdlr, extended_hdlr, indexedX_hdlr, indexedY_hdlr, indexed09_hdlr, inherent_hdlr, reg_reg09_hdlr, reg_bits_hdlr, bit_move_hdlr, tfm_hdlr, opidx_hdlr, opidx_dir_rel_hdlr, indexedX0_hdlr, indexedX16_hdlr, imm_rel_hdlr, indexedS_hdlr, indexedS16_hdlr, indexedXp_hdlr, indexedX0p_hdlr, indexed12_hdlr, indexed12_hdlr, // subset of indexed12 reg_reg12_hdlr, loop_hdlr, index_hdlr, imm_idx12_x_hdlr, imm_idx12_x_hdlr, ext_idx12_x_hdlr, }; /* handler function pointers */ /* Disasemble one instruction at address and store in str_buff */ static unsigned int m680x_disassemble(MCInst *MI, m680x_info *info, uint16_t address) { cs_m680x *m680x = &info->m680x; cs_detail *detail = MI->flat_insn->detail; uint16_t base_address = address; insn_desc insn_description; e_access_mode access_mode; if (detail != NULL) { memset(detail, 0, offsetof(cs_detail, m680x)+sizeof(cs_m680x)); } memset(&insn_description, 0, sizeof(insn_description)); memset(m680x, 0, sizeof(*m680x)); info->insn_size = 1; if (decode_insn(info, address, &insn_description)) { m680x_reg reg; if (insn_description.opcode > 0xff) address += 2; // 8-bit opcode + page prefix else address++; // 8-bit opcode only info->insn = insn_description.insn; MCInst_setOpcode(MI, insn_description.opcode); reg = g_insn_props[info->insn].reg0; if (reg != M680X_REG_INVALID) { if (reg == M680X_REG_HX && (!info->cpu->reg_byte_size[reg])) reg = M680X_REG_X; add_reg_operand(info, reg); // First (or second) operand is a register which is // part of the mnemonic m680x->flags |= M680X_FIRST_OP_IN_MNEM; reg = g_insn_props[info->insn].reg1; if (reg != M680X_REG_INVALID) { if (reg == M680X_REG_HX && (!info->cpu->reg_byte_size[reg])) reg = M680X_REG_X; add_reg_operand(info, reg); m680x->flags |= M680X_SECOND_OP_IN_MNEM; } } // Call addressing mode specific instruction handler (g_insn_handler[insn_description.hid[0]])(MI, info, &address); (g_insn_handler[insn_description.hid[1]])(MI, info, &address); add_insn_group(detail, g_insn_props[info->insn].group); if (g_insn_props[info->insn].cc_modified && (info->cpu->insn_cc_not_modified[0] != info->insn) && (info->cpu->insn_cc_not_modified[1] != info->insn)) add_reg_to_rw_list(MI, M680X_REG_CC, MODIFY); access_mode = g_insn_props[info->insn].access_mode; // Fix for M6805 BSET/BCLR. It has a differnt operand order // in comparison to the M6811 if ((info->cpu->insn_cc_not_modified[0] == info->insn) || (info->cpu->insn_cc_not_modified[1] == info->insn)) access_mode = rmmm; build_regs_read_write_counts(MI, info, access_mode); add_operators_access(MI, info, access_mode); if (g_insn_props[info->insn].update_reg_access) set_changed_regs_read_write_counts(MI, info); info->insn_size = insn_description.insn_size; return info->insn_size; } else MCInst_setOpcode(MI, insn_description.opcode); // Illegal instruction address = base_address; illegal_hdlr(MI, info, &address); return 1; } // Tables to get the byte size of a register on the CPU // based on an enum m680x_reg value. // Invalid registers return 0. static const uint8_t g_m6800_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 2, 0, 0 }; static const uint8_t g_m6805_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 2, 0, 0, 0, 2, 0, 0 }; static const uint8_t g_m6808_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 1, 1, 0, 2, 0, 0, 0, 2, 0, 0 }; static const uint8_t g_m6801_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 1, 0, 0, 0, 2, 0, 1, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 2, 0, 0 }; static const uint8_t g_m6811_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 1, 0, 0, 0, 2, 0, 1, 0, 0, 0, 0, 2, 2, 2, 0, 0, 0, 2, 0, 0 }; static const uint8_t g_cpu12_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 1, 0, 0, 0, 2, 0, 1, 0, 0, 0, 0, 2, 2, 2, 0, 0, 0, 2, 2, 2 }; static const uint8_t g_m6809_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 1, 0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 2, 2, 2, 2, 0, 0, 2, 0, 0 }; static const uint8_t g_hd6309_reg_byte_size[22] = { // A B E F 0 D W CC DP MD HX H X Y S U V Q PC T2 T3 0, 1, 1, 1, 1, 1, 2, 2, 1, 1, 1, 0, 0, 2, 2, 2, 2, 2, 4, 2, 0, 0 }; // Table to check for a valid register nibble on the M6809 CPU // used for TFR and EXG instruction. static const bool m6809_tfr_reg_valid[16] = { true, true, true, true, true, true, false, false, true, true, true, true, false, false, false, false, }; static const cpu_tables g_cpu_tables[] = { { // M680X_CPU_TYPE_INVALID NULL, { NULL, NULL }, { 0, 0 }, { 0x00, 0x00, 0x00 }, { NULL, NULL, NULL }, { 0, 0, 0 }, NULL, NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_6301 &g_m6800_inst_page1_table[0], { &g_m6801_inst_overlay_table[0], &g_hd6301_inst_overlay_table[0] }, { ARR_SIZE(g_m6801_inst_overlay_table), ARR_SIZE(g_hd6301_inst_overlay_table) }, { 0x00, 0x00, 0x00 }, { NULL, NULL, NULL }, { 0, 0, 0 }, &g_m6801_reg_byte_size[0], NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_6309 &g_m6809_inst_page1_table[0], { &g_hd6309_inst_overlay_table[0], NULL }, { ARR_SIZE(g_hd6309_inst_overlay_table), 0 }, { 0x10, 0x11, 0x00 }, { &g_hd6309_inst_page2_table[0], &g_hd6309_inst_page3_table[0], NULL }, { ARR_SIZE(g_hd6309_inst_page2_table), ARR_SIZE(g_hd6309_inst_page3_table), 0 }, &g_hd6309_reg_byte_size[0], NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_6800 &g_m6800_inst_page1_table[0], { NULL, NULL }, { 0, 0 }, { 0x00, 0x00, 0x00 }, { NULL, NULL, NULL }, { 0, 0, 0 }, &g_m6800_reg_byte_size[0], NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_6801 &g_m6800_inst_page1_table[0], { &g_m6801_inst_overlay_table[0], NULL }, { ARR_SIZE(g_m6801_inst_overlay_table), 0 }, { 0x00, 0x00, 0x00 }, { NULL, NULL, NULL }, { 0, 0, 0 }, &g_m6801_reg_byte_size[0], NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_6805 &g_m6805_inst_page1_table[0], { NULL, NULL }, { 0, 0 }, { 0x00, 0x00, 0x00 }, { NULL, NULL, NULL }, { 0, 0, 0 }, &g_m6805_reg_byte_size[0], NULL, { M680X_INS_BCLR, M680X_INS_BSET } }, { // M680X_CPU_TYPE_6808 &g_m6805_inst_page1_table[0], { &g_m6808_inst_overlay_table[0], NULL }, { ARR_SIZE(g_m6808_inst_overlay_table), 0 }, { 0x9E, 0x00, 0x00 }, { &g_m6808_inst_page2_table[0], NULL, NULL }, { ARR_SIZE(g_m6808_inst_page2_table), 0, 0 }, &g_m6808_reg_byte_size[0], NULL, { M680X_INS_BCLR, M680X_INS_BSET } }, { // M680X_CPU_TYPE_6809 &g_m6809_inst_page1_table[0], { NULL, NULL }, { 0, 0 }, { 0x10, 0x11, 0x00 }, { &g_m6809_inst_page2_table[0], &g_m6809_inst_page3_table[0], NULL }, { ARR_SIZE(g_m6809_inst_page2_table), ARR_SIZE(g_m6809_inst_page3_table), 0 }, &g_m6809_reg_byte_size[0], &m6809_tfr_reg_valid[0], { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_6811 &g_m6800_inst_page1_table[0], { &g_m6801_inst_overlay_table[0], &g_m6811_inst_overlay_table[0] }, { ARR_SIZE(g_m6801_inst_overlay_table), ARR_SIZE(g_m6811_inst_overlay_table) }, { 0x18, 0x1A, 0xCD }, { &g_m6811_inst_page2_table[0], &g_m6811_inst_page3_table[0], &g_m6811_inst_page4_table[0] }, { ARR_SIZE(g_m6811_inst_page2_table), ARR_SIZE(g_m6811_inst_page3_table), ARR_SIZE(g_m6811_inst_page4_table) }, &g_m6811_reg_byte_size[0], NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_CPU12 &g_cpu12_inst_page1_table[0], { NULL, NULL }, { 0, 0 }, { 0x18, 0x00, 0x00 }, { &g_cpu12_inst_page2_table[0], NULL, NULL }, { ARR_SIZE(g_cpu12_inst_page2_table), 0, 0 }, &g_cpu12_reg_byte_size[0], NULL, { M680X_INS_INVLD, M680X_INS_INVLD } }, { // M680X_CPU_TYPE_HCS08 &g_m6805_inst_page1_table[0], { &g_m6808_inst_overlay_table[0], &g_hcs08_inst_overlay_table[0] }, { ARR_SIZE(g_m6808_inst_overlay_table), ARR_SIZE(g_hcs08_inst_overlay_table) }, { 0x9E, 0x00, 0x00 }, { &g_hcs08_inst_page2_table[0], NULL, NULL }, { ARR_SIZE(g_hcs08_inst_page2_table), 0, 0 }, &g_m6808_reg_byte_size[0], NULL, { M680X_INS_BCLR, M680X_INS_BSET } }, }; static const char *s_cpu_type[] = { "INVALID", "6301", "6309", "6800", "6801", "6805", "6808", "6809", "6811", "CPU12", "HCS08", }; static bool m680x_setup_internals(m680x_info *info, e_cpu_type cpu_type, uint16_t address, const uint8_t *code, uint16_t code_len) { if (cpu_type == M680X_CPU_TYPE_INVALID) { return false; } info->code = code; info->size = code_len; info->offset = address; info->cpu_type = cpu_type; info->cpu = &g_cpu_tables[info->cpu_type]; return true; } bool M680X_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *MI, uint16_t *size, uint64_t address, void *inst_info) { unsigned int insn_size = 0; e_cpu_type cpu_type = M680X_CPU_TYPE_INVALID; // No default CPU type cs_struct *handle = (cs_struct *)ud; m680x_info *info = (m680x_info *)handle->printer_info; MCInst_clear(MI); if (handle->mode & CS_MODE_M680X_6800) cpu_type = M680X_CPU_TYPE_6800; else if (handle->mode & CS_MODE_M680X_6801) cpu_type = M680X_CPU_TYPE_6801; else if (handle->mode & CS_MODE_M680X_6805) cpu_type = M680X_CPU_TYPE_6805; else if (handle->mode & CS_MODE_M680X_6808) cpu_type = M680X_CPU_TYPE_6808; else if (handle->mode & CS_MODE_M680X_HCS08) cpu_type = M680X_CPU_TYPE_HCS08; else if (handle->mode & CS_MODE_M680X_6809) cpu_type = M680X_CPU_TYPE_6809; else if (handle->mode & CS_MODE_M680X_6301) cpu_type = M680X_CPU_TYPE_6301; else if (handle->mode & CS_MODE_M680X_6309) cpu_type = M680X_CPU_TYPE_6309; else if (handle->mode & CS_MODE_M680X_6811) cpu_type = M680X_CPU_TYPE_6811; else if (handle->mode & CS_MODE_M680X_CPU12) cpu_type = M680X_CPU_TYPE_CPU12; if (cpu_type != M680X_CPU_TYPE_INVALID && m680x_setup_internals(info, cpu_type, (uint16_t)address, code, code_len)) insn_size = m680x_disassemble(MI, info, (uint16_t)address); if (insn_size == 0) { *size = 1; return false; } // Make sure we always stay within range if (insn_size > code_len) { *size = (uint16_t)code_len; return false; } else *size = (uint16_t)insn_size; return true; } cs_err M680X_disassembler_init(cs_struct *ud) { if (M680X_REG_ENDING != ARR_SIZE(g_m6800_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_m6800_reg_byte_size)); return CS_ERR_MODE; } if (M680X_REG_ENDING != ARR_SIZE(g_m6801_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_m6801_reg_byte_size)); return CS_ERR_MODE; } if (M680X_REG_ENDING != ARR_SIZE(g_m6805_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_m6805_reg_byte_size)); return CS_ERR_MODE; } if (M680X_REG_ENDING != ARR_SIZE(g_m6808_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_m6808_reg_byte_size)); return CS_ERR_MODE; } if (M680X_REG_ENDING != ARR_SIZE(g_m6811_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_m6811_reg_byte_size)); return CS_ERR_MODE; } if (M680X_REG_ENDING != ARR_SIZE(g_cpu12_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_cpu12_reg_byte_size)); return CS_ERR_MODE; } if (M680X_REG_ENDING != ARR_SIZE(g_m6809_reg_byte_size)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(g_m6809_reg_byte_size)); return CS_ERR_MODE; } if (M680X_INS_ENDING != ARR_SIZE(g_insn_props)) { CS_ASSERT(M680X_INS_ENDING == ARR_SIZE(g_insn_props)); return CS_ERR_MODE; } if (M680X_CPU_TYPE_ENDING != ARR_SIZE(s_cpu_type)) { CS_ASSERT(M680X_CPU_TYPE_ENDING == ARR_SIZE(s_cpu_type)); return CS_ERR_MODE; } if (M680X_CPU_TYPE_ENDING != ARR_SIZE(g_cpu_tables)) { CS_ASSERT(M680X_CPU_TYPE_ENDING == ARR_SIZE(g_cpu_tables)); return CS_ERR_MODE; } if (HANDLER_ID_ENDING != ARR_SIZE(g_insn_handler)) { CS_ASSERT(HANDLER_ID_ENDING == ARR_SIZE(g_insn_handler)); return CS_ERR_MODE; } if (ACCESS_MODE_ENDING != MATRIX_SIZE(g_access_mode_to_access)) { CS_ASSERT(ACCESS_MODE_ENDING == MATRIX_SIZE(g_access_mode_to_access)); return CS_ERR_MODE; } return CS_ERR_OK; } #ifndef CAPSTONE_DIET void M680X_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count) { if (insn->detail == NULL) { *regs_read_count = 0; *regs_write_count = 0; } else { *regs_read_count = insn->detail->regs_read_count; *regs_write_count = insn->detail->regs_write_count; memcpy(regs_read, insn->detail->regs_read, *regs_read_count * sizeof(insn->detail->regs_read[0])); memcpy(regs_write, insn->detail->regs_write, *regs_write_count * sizeof(insn->detail->regs_write[0])); } } #endif #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XDisassembler.h010066400017500001750000000010511363402546700212570ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #ifndef CS_M680XDISASSEMBLER_H #define CS_M680XDISASSEMBLER_H #include "../../MCInst.h" bool M680X_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); void M680X_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); void M680X_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count); #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XDisassemblerInternals.h010066400017500001750000000035551363402546700231520ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #ifndef CS_M680XDISASSEMBLERINTERNALS_H #define CS_M680XDISASSEMBLERINTERNALS_H #include "../../MCInst.h" #include "../../include/capstone/m680x.h" typedef enum e_cpu_type { M680X_CPU_TYPE_INVALID, M680X_CPU_TYPE_6301, // M680X Hitachi HD6301,HD6303 mode M680X_CPU_TYPE_6309, // M680X Hitachi HD6309 mode M680X_CPU_TYPE_6800, // M680X Motorola 6800,6802 mode M680X_CPU_TYPE_6801, // M680X Motorola 6801,6803 mode M680X_CPU_TYPE_6805, // M680X Motorola/Freescale M68HC05 mode M680X_CPU_TYPE_6808, // M680X Motorola/Freescale M68HC08 mode M680X_CPU_TYPE_6809, // M680X Motorola 6809 mode M680X_CPU_TYPE_6811, // M680X Motorola/Freescale M68HC11 mode M680X_CPU_TYPE_CPU12, // M680X Motorola/Freescale CPU12 mode // used on M68HC12/HCS12 M680X_CPU_TYPE_HCS08, // M680X Freescale HCS08 mode M680X_CPU_TYPE_ENDING, } e_cpu_type; struct inst_page1; struct inst_pageX; typedef struct { const struct inst_page1 *inst_page1_table; const struct inst_pageX *inst_overlay_table[2]; size_t overlay_table_size[2]; uint8_t pageX_prefix[3]; const struct inst_pageX *inst_pageX_table[3]; size_t pageX_table_size[3]; const uint8_t *reg_byte_size; const bool *tfr_reg_valid; m680x_insn insn_cc_not_modified[2]; } cpu_tables; /* Private, For internal use only */ typedef struct m680x_info { const uint8_t *code; // code buffer uint32_t size; // byte size of code uint16_t offset; // address offset of first byte in code buffer e_cpu_type cpu_type; // The CPU type to be used for disassembling cs_m680x m680x; // M680X specific properties const cpu_tables *cpu; m680x_insn insn; // Instruction ID uint8_t insn_size; // byte size of instruction } m680x_info; extern cs_err M680X_disassembler_init(cs_struct *ud); extern cs_err M680X_instprinter_init(cs_struct *ud); #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XInstPrinter.c010066400017500001750000000222521363403403300211110ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #ifdef CAPSTONE_HAS_M680X #include #include #include #include #include "../../cs_priv.h" #include "../../MCInst.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../utils.h" #include "M680XInstPrinter.h" #include "M680XDisassembler.h" #include "M680XDisassemblerInternals.h" #ifndef CAPSTONE_DIET static const char s_reg_names[][10] = { "", "a", "b", "e", "f", "0", "d", "w", "cc", "dp", "md", "hx", "h", "x", "y", "s", "u", "v", "q", "pc", "tmp2", "tmp3", }; static const char s_instruction_names[][6] = { "invld", "aba", "abx", "aby", "adc", "adca", "adcb", "adcd", "adcr", "add", "adda", "addb", "addd", "adde", "addf", "addr", "addw", "aim", "ais", "aix", "and", "anda", "andb", "andcc", "andd", "andr", "asl", "asla", "aslb", "asld", "asr", "asra", "asrb", "asrd", "asrx", "band", "bcc", "bclr", "bcs", "beor", "beq", "bge", "bgnd", "bgt", "bhcc", "bhcs", "bhi", "biand", "bieor", "bih", "bil", "bior", "bit", "bita", "bitb", "bitd", "bitmd", "ble", "bls", "blt", "bmc", "bmi", "bms", "bne", "bor", "bpl", "brclr", "brset", "bra", "brn", "bset", "bsr", "bvc", "bvs", "call", "cba", "cbeq", "cbeqa", "cbeqx", "clc", "cli", "clr", "clra", "clrb", "clrd", "clre", "clrf", "clrh", "clrw", "clrx", "clv", "cmp", "cmpa", "cmpb", "cmpd", "cmpe", "cmpf", "cmpr", "cmps", "cmpu", "cmpw", "cmpx", "cmpy", "com", "coma", "comb", "comd", "come", "comf", "comw", "comx", "cpd", "cphx", "cps", "cpx", "cpy", "cwai", "daa", "dbeq", "dbne", "dbnz", "dbnza", "dbnzx", "dec", "deca", "decb", "decd", "dece", "decf", "decw", "decx", "des", "dex", "dey", "div", "divd", "divq", "ediv", "edivs", "eim", "emacs", "emaxd", "emaxm", "emind", "eminm", "emul", "emuls", "eor", "eora", "eorb", "eord", "eorr", "etbl", "exg", "fdiv", "ibeq", "ibne", "idiv", "idivs", "illgl", "inc", "inca", "incb", "incd", "ince", "incf", "incw", "incx", "ins", "inx", "iny", "jmp", "jsr", "lbcc", "lbcs", "lbeq", "lbge", "lbgt", "lbhi", "lble", "lbls", "lblt", "lbmi", "lbne", "lbpl", "lbra", "lbrn", "lbsr", "lbvc", "lbvs", "lda", "ldaa", "ldab", "ldb", "ldbt", "ldd", "lde", "ldf", "ldhx", "ldmd", "ldq", "lds", "ldu", "ldw", "ldx", "ldy", "leas", "leau", "leax", "leay", "lsl", "lsla", "lslb", "lsld", "lslx", "lsr", "lsra", "lsrb", "lsrd", "lsrw", "lsrx", "maxa", "maxm", "mem", "mina", "minm", "mov", "movb", "movw", "mul", "muld", "neg", "nega", "negb", "negd", "negx", "nop", "nsa", "oim", "ora", "oraa", "orab", "orb", "orcc", "ord", "orr", "psha", "pshb", "pshc", "pshd", "pshh", "pshs", "pshsw", "pshu", "pshuw", "pshx", "pshy", "pula", "pulb", "pulc", "puld", "pulh", "puls", "pulsw", "pulu", "puluw", "pulx", "puly", "rev", "revw", "rol", "rola", "rolb", "rold", "rolw", "rolx", "ror", "rora", "rorb", "rord", "rorw", "rorx", "rsp", "rtc", "rti", "rts", "sba", "sbc", "sbca", "sbcb", "sbcd", "sbcr", "sec", "sei", "sev", "sex", "sexw", "slp", "sta", "staa", "stab", "stb", "stbt", "std", "ste", "stf", "stop", "sthx", "stq", "sts", "stu", "stw", "stx", "sty", "sub", "suba", "subb", "subd", "sube", "subf", "subr", "subw", "swi", "swi2", "swi3", "sync", "tab", "tap", "tax", "tba", "tbeq", "tbl", "tbne", "test", "tfm", "tfr", "tim", "tpa", "tst", "tsta", "tstb", "tstd", "tste", "tstf", "tstw", "tstx", "tsx", "tsy", "txa", "txs", "tys", "wai", "wait", "wav", "wavr", "xgdx", "xgdy", }; static name_map s_group_names[] = { { M680X_GRP_INVALID, "" }, { M680X_GRP_JUMP, "jump" }, { M680X_GRP_CALL, "call" }, { M680X_GRP_RET, "return" }, { M680X_GRP_INT, "interrupt" }, { M680X_GRP_IRET, "interrupt_return" }, { M680X_GRP_PRIV, "privileged" }, { M680X_GRP_BRAREL, "branch_relative" }, }; #endif static void printRegName(cs_struct *handle, SStream *OS, unsigned int reg) { #ifndef CAPSTONE_DIET SStream_concat(OS, handle->reg_name((csh)handle, reg)); #endif } static void printInstructionName(cs_struct *handle, SStream *OS, unsigned int insn) { #ifndef CAPSTONE_DIET SStream_concat(OS, handle->insn_name((csh)handle, insn)); #endif } static uint32_t get_unsigned(int32_t value, int byte_size) { switch (byte_size) { case 1: return (uint32_t)(value & 0xff); case 2: return (uint32_t)(value & 0xffff); default: case 4: return (uint32_t)value; } } static void printIncDec(bool isPost, SStream *O, m680x_info *info, cs_m680x_op *op) { static const char s_inc_dec[][3] = { "--", "-", "", "+", "++" }; if (!op->idx.inc_dec) return; if ((!isPost && !(op->idx.flags & M680X_IDX_POST_INC_DEC)) || (isPost && (op->idx.flags & M680X_IDX_POST_INC_DEC))) { const char *prePostfix = ""; if (info->cpu_type == M680X_CPU_TYPE_CPU12) prePostfix = (op->idx.inc_dec < 0) ? "-" : "+"; else if (op->idx.inc_dec >= -2 && (op->idx.inc_dec <= 2)) { prePostfix = (char *)s_inc_dec[op->idx.inc_dec + 2]; } SStream_concat(O, prePostfix); } } static void printOperand(MCInst *MI, SStream *O, m680x_info *info, cs_m680x_op *op) { switch (op->type) { case M680X_OP_REGISTER: printRegName(MI->csh, O, op->reg); break; case M680X_OP_CONSTANT: SStream_concat(O, "%u", op->const_val); break; case M680X_OP_IMMEDIATE: if (MI->csh->imm_unsigned) SStream_concat(O, "#%u", get_unsigned(op->imm, op->size)); else SStream_concat(O, "#%d", op->imm); break; case M680X_OP_INDEXED: if (op->idx.flags & M680X_IDX_INDIRECT) SStream_concat(O, "["); if (op->idx.offset_reg != M680X_REG_INVALID) printRegName(MI->csh, O, op->idx.offset_reg); else if (op->idx.offset_bits > 0) { if (op->idx.base_reg == M680X_REG_PC) SStream_concat(O, "$%04x", op->idx.offset_addr); else SStream_concat(O, "%d", op->idx.offset); } else if (op->idx.inc_dec != 0 && info->cpu_type == M680X_CPU_TYPE_CPU12) SStream_concat(O, "%d", abs(op->idx.inc_dec)); if (!(op->idx.flags & M680X_IDX_NO_COMMA)) SStream_concat(O, ", "); printIncDec(false, O, info, op); printRegName(MI->csh, O, op->idx.base_reg); if (op->idx.base_reg == M680X_REG_PC && (op->idx.offset_bits > 0)) SStream_concat(O, "r"); printIncDec(true, O, info, op); if (op->idx.flags & M680X_IDX_INDIRECT) SStream_concat(O, "]"); break; case M680X_OP_RELATIVE: SStream_concat(O, "$%04x", op->rel.address); break; case M680X_OP_DIRECT: SStream_concat(O, "$%02x", op->direct_addr); break; case M680X_OP_EXTENDED: if (op->ext.indirect) SStream_concat(O, "[$%04x]", op->ext.address); else { if (op->ext.address < 256) { SStream_concat(O, ">$%04x", op->ext.address); } else { SStream_concat(O, "$%04x", op->ext.address); } } break; default: SStream_concat(O, ""); break; } } static const char *getDelimiter(m680x_info *info, cs_m680x *m680x) { bool indexed = false; int count = 0; int i; if (info->insn == M680X_INS_TFM) return ", "; if (m680x->op_count > 1) { for (i = 0; i < m680x->op_count; ++i) { if (m680x->operands[i].type == M680X_OP_INDEXED) indexed = true; if (m680x->operands[i].type != M680X_OP_REGISTER) count++; } } return (indexed && (count >= 1)) ? "; " : ", "; }; void M680X_printInst(MCInst *MI, SStream *O, void *PrinterInfo) { m680x_info *info = (m680x_info *)PrinterInfo; cs_m680x *m680x = &info->m680x; cs_detail *detail = MI->flat_insn->detail; int suppress_operands = 0; const char *delimiter = getDelimiter(info, m680x); int i; if (detail != NULL) memcpy(&detail->m680x, m680x, sizeof(cs_m680x)); if (info->insn == M680X_INS_INVLD || info->insn == M680X_INS_ILLGL) { if (m680x->op_count) SStream_concat(O, "fcb $%02x", m680x->operands[0].imm); else SStream_concat(O, "fcb $"); return; } printInstructionName(MI->csh, O, info->insn); SStream_concat(O, " "); if ((m680x->flags & M680X_FIRST_OP_IN_MNEM) != 0) suppress_operands++; if ((m680x->flags & M680X_SECOND_OP_IN_MNEM) != 0) suppress_operands++; for (i = 0; i < m680x->op_count; ++i) { if (i >= suppress_operands) { printOperand(MI, O, info, &m680x->operands[i]); if ((i + 1) != m680x->op_count) SStream_concat(O, delimiter); } } } const char *M680X_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(s_reg_names)) return NULL; return s_reg_names[(int)reg]; #else return NULL; #endif } const char *M680X_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET if (id >= ARR_SIZE(s_instruction_names)) return NULL; else return s_instruction_names[(int)id]; #else return NULL; #endif } const char *M680X_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(s_group_names, ARR_SIZE(s_group_names), id); #else return NULL; #endif } cs_err M680X_instprinter_init(cs_struct *ud) { #ifndef CAPSTONE_DIET if (M680X_REG_ENDING != ARR_SIZE(s_reg_names)) { CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(s_reg_names)); return CS_ERR_MODE; } if (M680X_INS_ENDING != ARR_SIZE(s_instruction_names)) { CS_ASSERT(M680X_INS_ENDING == ARR_SIZE(s_instruction_names)); return CS_ERR_MODE; } if (M680X_GRP_ENDING != ARR_SIZE(s_group_names)) { CS_ASSERT(M680X_GRP_ENDING == ARR_SIZE(s_group_names)); return CS_ERR_MODE; } #endif return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XInstPrinter.h010066400017500001750000000012221363402546700211230ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #ifndef CS_M680XINSTPRINTER_H #define CS_M680XINSTPRINTER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" struct SStream; void M680X_init(MCRegisterInfo *MRI); void M680X_printInst(MCInst *MI, struct SStream *O, void *Info); const char *M680X_reg_name(csh handle, unsigned int reg); const char *M680X_insn_name(csh handle, unsigned int id); const char *M680X_group_name(csh handle, unsigned int id); void M680X_post_printer(csh handle, cs_insn *flat_insn, char *insn_asm, MCInst *mci); #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XModule.c010066400017500001750000000035351363402546700200730ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #ifdef CAPSTONE_HAS_M680X #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "M680XDisassembler.h" #include "M680XDisassemblerInternals.h" #include "M680XInstPrinter.h" #include "M680XModule.h" cs_err M680X_global_init(cs_struct *ud) { m680x_info *info; cs_err errcode; /* Do some validation checks */ errcode = M680X_disassembler_init(ud); if (errcode != CS_ERR_OK) return errcode; errcode = M680X_instprinter_init(ud); if (errcode != CS_ERR_OK) return errcode; // verify if requested mode is valid if (ud->mode & ~(CS_MODE_M680X_6800 | CS_MODE_M680X_6801 | CS_MODE_M680X_6805 | CS_MODE_M680X_6808 | CS_MODE_M680X_6809 | CS_MODE_M680X_6811 | CS_MODE_M680X_6301 | CS_MODE_M680X_6309 | CS_MODE_M680X_CPU12 | CS_MODE_M680X_HCS08)) { // At least one mode is not supported by M680X return CS_ERR_MODE; } if (!(ud->mode & (CS_MODE_M680X_6800 | CS_MODE_M680X_6801 | CS_MODE_M680X_6805 | CS_MODE_M680X_6808 | CS_MODE_M680X_6809 | CS_MODE_M680X_6811 | CS_MODE_M680X_6301 | CS_MODE_M680X_6309 | CS_MODE_M680X_CPU12 | CS_MODE_M680X_HCS08))) { // At least the cpu type has to be selected. No default. return CS_ERR_MODE; } info = cs_mem_malloc(sizeof(m680x_info)); if (!info) return CS_ERR_MEM; ud->printer = M680X_printInst; ud->printer_info = info; ud->getinsn_info = NULL; ud->disasm = M680X_getInstruction; ud->reg_name = M680X_reg_name; ud->insn_id = M680X_get_insn_id; ud->insn_name = M680X_insn_name; ud->group_name = M680X_group_name; ud->skipdata_size = 1; ud->post_printer = NULL; #ifndef CAPSTONE_DIET ud->reg_access = M680X_reg_access; #endif return CS_ERR_OK; } cs_err M680X_option(cs_struct *handle, cs_opt_type type, size_t value) { //TODO return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/M680X/M680XModule.h010066400017500001750000000004411363402546700200710ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_M680X_MODULE_H #define CS_M680X_MODULE_H #include "../../utils.h" cs_err M680X_global_init(cs_struct *ud); cs_err M680X_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/M680X/cpu12.inc010066400017500001750000000313331363402546700174210ustar0000000000000000 // CPU12 instructions on PAGE1 static const inst_page1 g_cpu12_inst_page1_table[256] = { // 0x0x { M680X_INS_BGND, inh_hid, inh_hid }, { M680X_INS_MEM, inh_hid, inh_hid }, { M680X_INS_INY, inh_hid, inh_hid }, { M680X_INS_DEY, inh_hid, inh_hid }, { M680X_INS_DBEQ, loop_hid, inh_hid }, // or DBNE/IBEQ/IBNE/TBEQ/TBNE { M680X_INS_JMP, idx12_hid, inh_hid }, { M680X_INS_JMP, ext_hid, inh_hid }, { M680X_INS_BSR, rel8_hid, inh_hid }, { M680X_INS_INX, inh_hid, inh_hid }, { M680X_INS_DEX, inh_hid, inh_hid }, { M680X_INS_RTC, inh_hid, inh_hid }, { M680X_INS_RTI, inh_hid, inh_hid }, { M680X_INS_BSET, idx12_hid, imm8_hid }, { M680X_INS_BCLR, idx12_hid, imm8_hid }, { M680X_INS_BRSET, idx12_hid, imm8rel_hid }, { M680X_INS_BRCLR, idx12_hid, imm8rel_hid }, // 0x1x { M680X_INS_ANDCC, imm8_hid, inh_hid }, { M680X_INS_EDIV, inh_hid, inh_hid }, { M680X_INS_MUL, inh_hid, inh_hid }, { M680X_INS_EMUL, inh_hid, inh_hid }, { M680X_INS_ORCC, imm8_hid, inh_hid }, { M680X_INS_JSR, idx12_hid, inh_hid }, { M680X_INS_JSR, ext_hid, inh_hid }, { M680X_INS_JSR, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LEAY, idx12_hid, inh_hid }, { M680X_INS_LEAX, idx12_hid, inh_hid }, { M680X_INS_LEAS, idx12_hid, inh_hid }, { M680X_INS_BSET, ext_hid, imm8_hid }, { M680X_INS_BCLR, ext_hid, imm8_hid }, { M680X_INS_BRSET, ext_hid, imm8rel_hid }, { M680X_INS_BRCLR, ext_hid, imm8rel_hid }, // 0x2x, relative branch instructions { M680X_INS_BRA, rel8_hid, inh_hid }, { M680X_INS_BRN, rel8_hid, inh_hid }, { M680X_INS_BHI, rel8_hid, inh_hid }, { M680X_INS_BLS, rel8_hid, inh_hid }, { M680X_INS_BCC, rel8_hid, inh_hid }, { M680X_INS_BCS, rel8_hid, inh_hid }, { M680X_INS_BNE, rel8_hid, inh_hid }, { M680X_INS_BEQ, rel8_hid, inh_hid }, { M680X_INS_BVC, rel8_hid, inh_hid }, { M680X_INS_BVS, rel8_hid, inh_hid }, { M680X_INS_BPL, rel8_hid, inh_hid }, { M680X_INS_BMI, rel8_hid, inh_hid }, { M680X_INS_BGE, rel8_hid, inh_hid }, { M680X_INS_BLT, rel8_hid, inh_hid }, { M680X_INS_BGT, rel8_hid, inh_hid }, { M680X_INS_BLE, rel8_hid, inh_hid }, // 0x3x { M680X_INS_PULX, inh_hid, inh_hid }, { M680X_INS_PULY, inh_hid, inh_hid }, { M680X_INS_PULA, inh_hid, inh_hid }, { M680X_INS_PULB, inh_hid, inh_hid }, { M680X_INS_PSHX, inh_hid, inh_hid }, { M680X_INS_PSHY, inh_hid, inh_hid }, { M680X_INS_PSHA, inh_hid, inh_hid }, { M680X_INS_PSHB, inh_hid, inh_hid }, { M680X_INS_PULC, inh_hid, inh_hid }, { M680X_INS_PSHC, inh_hid, inh_hid }, { M680X_INS_PULD, inh_hid, inh_hid }, { M680X_INS_PSHD, inh_hid, inh_hid }, { M680X_INS_WAVR, inh_hid, inh_hid }, { M680X_INS_RTS, inh_hid, inh_hid }, { M680X_INS_WAI, inh_hid, inh_hid }, { M680X_INS_SWI, inh_hid, inh_hid }, // 0x4x { M680X_INS_NEGA, inh_hid, inh_hid }, { M680X_INS_COMA, inh_hid, inh_hid }, { M680X_INS_INCA, inh_hid, inh_hid }, { M680X_INS_DECA, inh_hid, inh_hid }, { M680X_INS_LSRA, inh_hid, inh_hid }, { M680X_INS_ROLA, inh_hid, inh_hid }, { M680X_INS_RORA, inh_hid, inh_hid }, { M680X_INS_ASRA, inh_hid, inh_hid }, { M680X_INS_ASLA, inh_hid, inh_hid }, { M680X_INS_LSRD, inh_hid, inh_hid }, { M680X_INS_CALL, ext_hid, index_hid }, { M680X_INS_CALL, idx12_hid, index_hid }, { M680X_INS_BSET, dir_hid, imm8_hid }, { M680X_INS_BCLR, dir_hid, imm8_hid }, { M680X_INS_BRSET, dir_hid, imm8rel_hid }, { M680X_INS_BRCLR, dir_hid, imm8rel_hid }, // 0x5x { M680X_INS_NEGB, inh_hid, inh_hid }, { M680X_INS_COMB, inh_hid, inh_hid }, { M680X_INS_INCB, inh_hid, inh_hid }, { M680X_INS_DECB, inh_hid, inh_hid }, { M680X_INS_LSRB, inh_hid, inh_hid }, { M680X_INS_ROLB, inh_hid, inh_hid }, { M680X_INS_RORB, inh_hid, inh_hid }, { M680X_INS_ASRB, inh_hid, inh_hid }, { M680X_INS_ASLB, inh_hid, inh_hid }, { M680X_INS_ASLD, inh_hid, inh_hid }, { M680X_INS_STAA, dir_hid, inh_hid }, { M680X_INS_STAB, dir_hid, inh_hid }, { M680X_INS_STD, dir_hid, inh_hid }, { M680X_INS_STY, dir_hid, inh_hid }, { M680X_INS_STX, dir_hid, inh_hid }, { M680X_INS_STS, dir_hid, inh_hid }, // 0x6x { M680X_INS_NEG, idx12_hid, inh_hid }, { M680X_INS_COM, idx12_hid, inh_hid }, { M680X_INS_INC, idx12_hid, inh_hid }, { M680X_INS_DEC, idx12_hid, inh_hid }, { M680X_INS_LSR, idx12_hid, inh_hid }, { M680X_INS_ROL, idx12_hid, inh_hid }, { M680X_INS_ROR, idx12_hid, inh_hid }, { M680X_INS_ASR, idx12_hid, inh_hid }, { M680X_INS_ASL, idx12_hid, inh_hid }, { M680X_INS_CLR, idx12_hid, inh_hid }, { M680X_INS_STAA, idx12_hid, inh_hid }, { M680X_INS_STAB, idx12_hid, inh_hid }, { M680X_INS_STD, idx12_hid, inh_hid }, { M680X_INS_STY, idx12_hid, inh_hid }, { M680X_INS_STX, idx12_hid, inh_hid }, { M680X_INS_STS, idx12_hid, inh_hid }, // 0x7x { M680X_INS_NEG, ext_hid, inh_hid }, { M680X_INS_COM, ext_hid, inh_hid }, { M680X_INS_INC, ext_hid, inh_hid }, { M680X_INS_DEC, ext_hid, inh_hid }, { M680X_INS_LSR, ext_hid, inh_hid }, { M680X_INS_ROL, ext_hid, inh_hid }, { M680X_INS_ROR, ext_hid, inh_hid }, { M680X_INS_ASR, ext_hid, inh_hid }, { M680X_INS_ASL, ext_hid, inh_hid }, { M680X_INS_CLR, ext_hid, inh_hid }, { M680X_INS_STAA, ext_hid, inh_hid }, { M680X_INS_STAB, ext_hid, inh_hid }, { M680X_INS_STD, ext_hid, inh_hid }, { M680X_INS_STY, ext_hid, inh_hid }, { M680X_INS_STX, ext_hid, inh_hid }, { M680X_INS_STS, ext_hid, inh_hid }, // 0x8x { M680X_INS_SUBA, imm8_hid, inh_hid }, { M680X_INS_CMPA, imm8_hid, inh_hid }, { M680X_INS_SBCA, imm8_hid, inh_hid }, { M680X_INS_SUBD, imm16_hid, inh_hid }, { M680X_INS_ANDA, imm8_hid, inh_hid }, { M680X_INS_BITA, imm8_hid, inh_hid }, { M680X_INS_LDAA, imm8_hid, inh_hid }, { M680X_INS_CLRA, inh_hid, inh_hid }, { M680X_INS_EORA, imm8_hid, inh_hid }, { M680X_INS_ADCA, imm8_hid, inh_hid }, { M680X_INS_ORAA, imm8_hid, inh_hid }, { M680X_INS_ADDA, imm8_hid, inh_hid }, { M680X_INS_CPD, imm16_hid, inh_hid }, { M680X_INS_CPY, imm16_hid, inh_hid }, { M680X_INS_CPX, imm16_hid, inh_hid }, { M680X_INS_CPS, imm16_hid, inh_hid }, // 0x9x { M680X_INS_SUBA, dir_hid, inh_hid }, { M680X_INS_CMPA, dir_hid, inh_hid }, { M680X_INS_SBCA, dir_hid, inh_hid }, { M680X_INS_SUBD, dir_hid, inh_hid }, { M680X_INS_ANDA, dir_hid, inh_hid }, { M680X_INS_BITA, dir_hid, inh_hid }, { M680X_INS_LDAA, dir_hid, inh_hid }, { M680X_INS_TSTA, inh_hid, inh_hid }, { M680X_INS_EORA, dir_hid, inh_hid }, { M680X_INS_ADCA, dir_hid, inh_hid }, { M680X_INS_ORAA, dir_hid, inh_hid }, { M680X_INS_ADDA, dir_hid, inh_hid }, { M680X_INS_CPD, dir_hid, inh_hid }, { M680X_INS_CPY, dir_hid, inh_hid }, { M680X_INS_CPX, dir_hid, inh_hid }, { M680X_INS_CPS, dir_hid, inh_hid }, // 0xAx { M680X_INS_SUBA, idx12_hid, inh_hid }, { M680X_INS_CMPA, idx12_hid, inh_hid }, { M680X_INS_SBCA, idx12_hid, inh_hid }, { M680X_INS_SUBD, idx12_hid, inh_hid }, { M680X_INS_ANDA, idx12_hid, inh_hid }, { M680X_INS_BITA, idx12_hid, inh_hid }, { M680X_INS_LDAA, idx12_hid, inh_hid }, { M680X_INS_NOP, inh_hid, inh_hid }, { M680X_INS_EORA, idx12_hid, inh_hid }, { M680X_INS_ADCA, idx12_hid, inh_hid }, { M680X_INS_ORAA, idx12_hid, inh_hid }, { M680X_INS_ADDA, idx12_hid, inh_hid }, { M680X_INS_CPD, idx12_hid, inh_hid }, { M680X_INS_CPY, idx12_hid, inh_hid }, { M680X_INS_CPX, idx12_hid, inh_hid }, { M680X_INS_CPS, idx12_hid, inh_hid }, // 0xBx { M680X_INS_SUBA, ext_hid, inh_hid }, { M680X_INS_CMPA, ext_hid, inh_hid }, { M680X_INS_SBCA, ext_hid, inh_hid }, { M680X_INS_SUBD, ext_hid, inh_hid }, { M680X_INS_ANDA, ext_hid, inh_hid }, { M680X_INS_BITA, ext_hid, inh_hid }, { M680X_INS_LDAA, ext_hid, inh_hid }, { M680X_INS_TFR, rr12_hid, inh_hid }, // or EXG { M680X_INS_EORA, ext_hid, inh_hid }, { M680X_INS_ADCA, ext_hid, inh_hid }, { M680X_INS_ORAA, ext_hid, inh_hid }, { M680X_INS_ADDA, ext_hid, inh_hid }, { M680X_INS_CPD, ext_hid, inh_hid }, { M680X_INS_CPY, ext_hid, inh_hid }, { M680X_INS_CPX, ext_hid, inh_hid }, { M680X_INS_CPS, ext_hid, inh_hid }, // 0xCx { M680X_INS_SUBB, imm8_hid, inh_hid }, { M680X_INS_CMPB, imm8_hid, inh_hid }, { M680X_INS_SBCB, imm8_hid, inh_hid }, { M680X_INS_ADDD, imm16_hid, inh_hid }, { M680X_INS_ANDB, imm8_hid, inh_hid }, { M680X_INS_BITB, imm8_hid, inh_hid }, { M680X_INS_LDAB, imm8_hid, inh_hid }, { M680X_INS_CLRB, inh_hid, inh_hid }, { M680X_INS_EORB, imm8_hid, inh_hid }, { M680X_INS_ADCB, imm8_hid, inh_hid }, { M680X_INS_ORAB, imm8_hid, inh_hid }, { M680X_INS_ADDB, imm8_hid, inh_hid }, { M680X_INS_LDD, imm16_hid, inh_hid }, { M680X_INS_LDY, imm16_hid, inh_hid }, { M680X_INS_LDX, imm16_hid, inh_hid }, { M680X_INS_LDS, imm16_hid, inh_hid }, // 0xDx { M680X_INS_SUBB, dir_hid, inh_hid }, { M680X_INS_CMPB, dir_hid, inh_hid }, { M680X_INS_SBCB, dir_hid, inh_hid }, { M680X_INS_ADDD, dir_hid, inh_hid }, { M680X_INS_ANDB, dir_hid, inh_hid }, { M680X_INS_BITB, dir_hid, inh_hid }, { M680X_INS_LDAB, dir_hid, inh_hid }, { M680X_INS_TSTB, inh_hid, inh_hid }, { M680X_INS_EORB, dir_hid, inh_hid }, { M680X_INS_ADCB, dir_hid, inh_hid }, { M680X_INS_ORAB, dir_hid, inh_hid }, { M680X_INS_ADDB, dir_hid, inh_hid }, { M680X_INS_LDD, dir_hid, inh_hid }, { M680X_INS_LDY, dir_hid, inh_hid }, { M680X_INS_LDX, dir_hid, inh_hid }, { M680X_INS_LDS, dir_hid, inh_hid }, // 0xEx { M680X_INS_SUBB, idx12_hid, inh_hid }, { M680X_INS_CMPB, idx12_hid, inh_hid }, { M680X_INS_SBCB, idx12_hid, inh_hid }, { M680X_INS_ADDD, idx12_hid, inh_hid }, { M680X_INS_ANDB, idx12_hid, inh_hid }, { M680X_INS_BITB, idx12_hid, inh_hid }, { M680X_INS_LDAB, idx12_hid, inh_hid }, { M680X_INS_TST, idx12_hid, inh_hid }, { M680X_INS_EORB, idx12_hid, inh_hid }, { M680X_INS_ADCB, idx12_hid, inh_hid }, { M680X_INS_ORAB, idx12_hid, inh_hid }, { M680X_INS_ADDB, idx12_hid, inh_hid }, { M680X_INS_LDD, idx12_hid, inh_hid }, { M680X_INS_LDY, idx12_hid, inh_hid }, { M680X_INS_LDX, idx12_hid, inh_hid }, { M680X_INS_LDS, idx12_hid, inh_hid }, // 0xFx { M680X_INS_SUBA, ext_hid, inh_hid }, { M680X_INS_CMPA, ext_hid, inh_hid }, { M680X_INS_SBCA, ext_hid, inh_hid }, { M680X_INS_ADDD, ext_hid, inh_hid }, { M680X_INS_ANDA, ext_hid, inh_hid }, { M680X_INS_BITA, ext_hid, inh_hid }, { M680X_INS_LDAA, ext_hid, inh_hid }, { M680X_INS_TST, ext_hid, inh_hid }, { M680X_INS_EORA, ext_hid, inh_hid }, { M680X_INS_ADCA, ext_hid, inh_hid }, { M680X_INS_ORAA, ext_hid, inh_hid }, { M680X_INS_ADDA, ext_hid, inh_hid }, { M680X_INS_LDD, ext_hid, inh_hid }, { M680X_INS_LDY, ext_hid, inh_hid }, { M680X_INS_LDX, ext_hid, inh_hid }, { M680X_INS_LDS, ext_hid, inh_hid }, }; // CPU12 instructions on PAGE2 static const inst_pageX g_cpu12_inst_page2_table[] = { { 0x00, M680X_INS_MOVW, imm16i12x_hid, inh_hid }, { 0x01, M680X_INS_MOVW, exti12x_hid, inh_hid }, { 0x02, M680X_INS_MOVW, idx12_hid, idx12_hid }, { 0x03, M680X_INS_MOVW, imm16_hid, ext_hid }, { 0x04, M680X_INS_MOVW, ext_hid, ext_hid }, { 0x05, M680X_INS_MOVW, idx12_hid, ext_hid }, { 0x06, M680X_INS_ABA, inh_hid, inh_hid }, { 0x07, M680X_INS_DAA, inh_hid, inh_hid }, { 0x08, M680X_INS_MOVB, imm8i12x_hid, inh_hid }, { 0x09, M680X_INS_MOVB, exti12x_hid, inh_hid }, { 0x0a, M680X_INS_MOVB, idx12_hid, idx12_hid }, { 0x0b, M680X_INS_MOVB, imm8_hid, ext_hid }, { 0x0c, M680X_INS_MOVB, ext_hid, ext_hid }, { 0x0d, M680X_INS_MOVB, idx12_hid, ext_hid }, { 0x0e, M680X_INS_TAB, inh_hid, inh_hid }, { 0x0f, M680X_INS_TBA, inh_hid, inh_hid }, { 0x10, M680X_INS_IDIV, inh_hid, inh_hid }, { 0x11, M680X_INS_FDIV, inh_hid, inh_hid }, { 0x12, M680X_INS_EMACS, ext_hid, inh_hid }, { 0x13, M680X_INS_EMULS, inh_hid, inh_hid }, { 0x14, M680X_INS_EDIVS, inh_hid, inh_hid }, { 0x15, M680X_INS_IDIVS, inh_hid, inh_hid }, { 0x16, M680X_INS_SBA, inh_hid, inh_hid }, { 0x17, M680X_INS_CBA, inh_hid, inh_hid }, { 0x18, M680X_INS_MAXA, idx12_hid, inh_hid }, { 0x19, M680X_INS_MINA, idx12_hid, inh_hid }, { 0x1a, M680X_INS_EMAXD, idx12_hid, inh_hid }, { 0x1b, M680X_INS_EMIND, idx12_hid, inh_hid }, { 0x1c, M680X_INS_MAXM, idx12_hid, inh_hid }, { 0x1d, M680X_INS_MINM, idx12_hid, inh_hid }, { 0x1e, M680X_INS_EMAXM, idx12_hid, inh_hid }, { 0x1f, M680X_INS_EMINM, idx12_hid, inh_hid }, { 0x20, M680X_INS_LBRA, rel16_hid, inh_hid }, { 0x21, M680X_INS_LBRN, rel16_hid, inh_hid }, { 0x22, M680X_INS_LBHI, rel16_hid, inh_hid }, { 0x23, M680X_INS_LBLS, rel16_hid, inh_hid }, { 0x24, M680X_INS_LBCC, rel16_hid, inh_hid }, { 0x25, M680X_INS_LBCS, rel16_hid, inh_hid }, { 0x26, M680X_INS_LBNE, rel16_hid, inh_hid }, { 0x27, M680X_INS_LBEQ, rel16_hid, inh_hid }, { 0x28, M680X_INS_LBVC, rel16_hid, inh_hid }, { 0x29, M680X_INS_LBVS, rel16_hid, inh_hid }, { 0x2a, M680X_INS_LBPL, rel16_hid, inh_hid }, { 0x2b, M680X_INS_LBMI, rel16_hid, inh_hid }, { 0x2c, M680X_INS_LBGE, rel16_hid, inh_hid }, { 0x2d, M680X_INS_LBLT, rel16_hid, inh_hid }, { 0x2e, M680X_INS_LBGT, rel16_hid, inh_hid }, { 0x2f, M680X_INS_LBLE, rel16_hid, inh_hid }, { 0x3a, M680X_INS_REV, inh_hid, inh_hid }, { 0x3b, M680X_INS_REVW, inh_hid, inh_hid }, { 0x3c, M680X_INS_WAV, inh_hid, inh_hid }, { 0x3d, M680X_INS_TBL, idx12s_hid, inh_hid }, { 0x3e, M680X_INS_STOP, inh_hid, inh_hid }, { 0x3f, M680X_INS_ETBL, idx12s_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/hcs08.inc010066400017500001750000000047641363402546700174240ustar0000000000000000 // Additional instructions only supported on HCS08 static const inst_pageX g_hcs08_inst_overlay_table[] = { { 0x32, M680X_INS_LDHX, ext_hid, inh_hid }, { 0x3e, M680X_INS_CPHX, ext_hid, inh_hid }, { 0x82, M680X_INS_BGND, inh_hid, inh_hid }, { 0x96, M680X_INS_STHX, ext_hid, inh_hid }, }; // HCS08 PAGE2 instructions (prefix 0x9E) static const inst_pageX g_hcs08_inst_page2_table[] = { { 0x60, M680X_INS_NEG, idxS_hid, inh_hid }, { 0x61, M680X_INS_CBEQ, idxS_hid,rel8_hid }, { 0x63, M680X_INS_COM, idxS_hid, inh_hid }, { 0x64, M680X_INS_LSR, idxS_hid, inh_hid }, { 0x66, M680X_INS_ROR, idxS_hid, inh_hid }, { 0x67, M680X_INS_ASR, idxS_hid, inh_hid }, { 0x68, M680X_INS_LSL, idxS_hid, inh_hid }, { 0x69, M680X_INS_ROL, idxS_hid, inh_hid }, { 0x6a, M680X_INS_DEC, idxS_hid, inh_hid }, { 0x6b, M680X_INS_DBNZ, idxS_hid,rel8_hid }, { 0x6c, M680X_INS_INC, idxS_hid, inh_hid }, { 0x6d, M680X_INS_TST, idxS_hid, inh_hid }, { 0x6f, M680X_INS_CLR, idxS_hid, inh_hid }, { 0xae, M680X_INS_LDHX, idxX0_hid, inh_hid }, { 0xbe, M680X_INS_LDHX, idxX16_hid, inh_hid }, { 0xce, M680X_INS_LDHX, idxX_hid, inh_hid }, { 0xd0, M680X_INS_SUB, idxS16_hid, inh_hid }, { 0xd1, M680X_INS_CMP, idxS16_hid, inh_hid }, { 0xd2, M680X_INS_SBC, idxS16_hid, inh_hid }, { 0xd3, M680X_INS_CPX, idxS16_hid, inh_hid }, { 0xd4, M680X_INS_AND, idxS16_hid, inh_hid }, { 0xd5, M680X_INS_BIT, idxS16_hid, inh_hid }, { 0xd6, M680X_INS_LDA, idxS16_hid, inh_hid }, { 0xd7, M680X_INS_STA, idxS16_hid, inh_hid }, { 0xd8, M680X_INS_EOR, idxS16_hid, inh_hid }, { 0xd9, M680X_INS_ADC, idxS16_hid, inh_hid }, { 0xda, M680X_INS_ORA, idxS16_hid, inh_hid }, { 0xdb, M680X_INS_ADD, idxS16_hid, inh_hid }, { 0xde, M680X_INS_LDX, idxS16_hid, inh_hid }, { 0xdf, M680X_INS_STX, idxS16_hid, inh_hid }, { 0xe0, M680X_INS_SUB, idxS_hid, inh_hid }, { 0xe1, M680X_INS_CMP, idxS_hid, inh_hid }, { 0xe2, M680X_INS_SBC, idxS_hid, inh_hid }, { 0xe3, M680X_INS_CPX, idxS_hid, inh_hid }, { 0xe4, M680X_INS_AND, idxS_hid, inh_hid }, { 0xe5, M680X_INS_BIT, idxS_hid, inh_hid }, { 0xe6, M680X_INS_LDA, idxS_hid, inh_hid }, { 0xe7, M680X_INS_STA, idxS_hid, inh_hid }, { 0xe8, M680X_INS_EOR, idxS_hid, inh_hid }, { 0xe9, M680X_INS_ADC, idxS_hid, inh_hid }, { 0xea, M680X_INS_ORA, idxS_hid, inh_hid }, { 0xeb, M680X_INS_ADD, idxS_hid, inh_hid }, { 0xee, M680X_INS_LDX, idxS_hid, inh_hid }, { 0xef, M680X_INS_STX, idxS_hid, inh_hid }, { 0xf3, M680X_INS_CPHX, idxS_hid, inh_hid }, { 0xfe, M680X_INS_LDHX, idxS_hid, inh_hid }, { 0xff, M680X_INS_STHX, idxS_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/hd6301.inc010066400017500001750000000010721363402546700173710ustar0000000000000000 // Additional instructions only supported on HD6301/3 static const inst_pageX g_hd6301_inst_overlay_table[] = { { 0x18, M680X_INS_XGDX, inh_hid, inh_hid }, { 0x1a, M680X_INS_SLP, inh_hid, inh_hid }, { 0x61, M680X_INS_AIM, imm8_hid, idxX_hid }, { 0x62, M680X_INS_OIM, imm8_hid, idxX_hid }, { 0x65, M680X_INS_EIM, imm8_hid, idxX_hid }, { 0x6B, M680X_INS_TIM, imm8_hid, idxX_hid }, { 0x71, M680X_INS_AIM, imm8_hid, dir_hid }, { 0x72, M680X_INS_OIM, imm8_hid, dir_hid }, { 0x75, M680X_INS_EIM, imm8_hid, dir_hid }, { 0x7B, M680X_INS_TIM, imm8_hid, dir_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/hd6309.inc010066400017500001750000000263071363402546700174110ustar0000000000000000 // The following array has to be sorted by increasing // opcodes. Otherwise the binary_search will fail. // // Additional instructions only supported on HD6309 PAGE1 static const inst_pageX g_hd6309_inst_overlay_table[] = { { 0x01, M680X_INS_OIM, imm8_hid, dir_hid }, { 0x02, M680X_INS_AIM, imm8_hid, dir_hid }, { 0x05, M680X_INS_EIM, imm8_hid, dir_hid }, { 0x0B, M680X_INS_TIM, imm8_hid, dir_hid }, { 0x14, M680X_INS_SEXW, inh_hid, inh_hid }, { 0x61, M680X_INS_OIM, imm8_hid, idx09_hid }, { 0x62, M680X_INS_AIM, imm8_hid, idx09_hid }, { 0x65, M680X_INS_EIM, imm8_hid, idx09_hid }, { 0x6B, M680X_INS_TIM, imm8_hid, idx09_hid }, { 0x71, M680X_INS_OIM, imm8_hid, ext_hid }, { 0x72, M680X_INS_AIM, imm8_hid, ext_hid }, { 0x75, M680X_INS_EIM, imm8_hid, ext_hid }, { 0x7B, M680X_INS_TIM, imm8_hid, ext_hid }, { 0xCD, M680X_INS_LDQ, imm32_hid, inh_hid }, }; // The following array has to be sorted by increasing // opcodes. Otherwise the binary_search will fail. // // HD6309 PAGE2 instructions (with prefix 0x10) static const inst_pageX g_hd6309_inst_page2_table[] = { // 0x2x, relative long branch instructions { 0x21, M680X_INS_LBRN, rel16_hid, inh_hid }, { 0x22, M680X_INS_LBHI, rel16_hid, inh_hid }, { 0x23, M680X_INS_LBLS, rel16_hid, inh_hid }, { 0x24, M680X_INS_LBCC, rel16_hid, inh_hid }, { 0x25, M680X_INS_LBCS, rel16_hid, inh_hid }, { 0x26, M680X_INS_LBNE, rel16_hid, inh_hid }, { 0x27, M680X_INS_LBEQ, rel16_hid, inh_hid }, { 0x28, M680X_INS_LBVC, rel16_hid, inh_hid }, { 0x29, M680X_INS_LBVS, rel16_hid, inh_hid }, { 0x2a, M680X_INS_LBPL, rel16_hid, inh_hid }, { 0x2b, M680X_INS_LBMI, rel16_hid, inh_hid }, { 0x2c, M680X_INS_LBGE, rel16_hid, inh_hid }, { 0x2d, M680X_INS_LBLT, rel16_hid, inh_hid }, { 0x2e, M680X_INS_LBGT, rel16_hid, inh_hid }, { 0x2f, M680X_INS_LBLE, rel16_hid, inh_hid }, // 0x3x { 0x30, M680X_INS_ADDR, rr09_hid, inh_hid }, { 0x31, M680X_INS_ADCR, rr09_hid, inh_hid }, { 0x32, M680X_INS_SUBR, rr09_hid, inh_hid }, { 0x33, M680X_INS_SBCR, rr09_hid, inh_hid }, { 0x34, M680X_INS_ANDR, rr09_hid, inh_hid }, { 0x35, M680X_INS_ORR, rr09_hid, inh_hid }, { 0x36, M680X_INS_EORR, rr09_hid, inh_hid }, { 0x37, M680X_INS_CMPR, rr09_hid, inh_hid }, { 0x38, M680X_INS_PSHSW, inh_hid, inh_hid }, { 0x39, M680X_INS_PULSW, inh_hid, inh_hid }, { 0x3a, M680X_INS_PSHUW, inh_hid, inh_hid }, { 0x3b, M680X_INS_PULUW, inh_hid, inh_hid }, { 0x3f, M680X_INS_SWI2, inh_hid, inh_hid }, // 0x4x, Register D instructions { 0x40, M680X_INS_NEGD, inh_hid, inh_hid }, { 0x43, M680X_INS_COMD, inh_hid, inh_hid }, { 0x44, M680X_INS_LSRD, inh_hid, inh_hid }, { 0x46, M680X_INS_RORD, inh_hid, inh_hid }, { 0x47, M680X_INS_ASRD, inh_hid, inh_hid }, { 0x48, M680X_INS_LSLD, inh_hid, inh_hid }, { 0x49, M680X_INS_ROLD, inh_hid, inh_hid }, { 0x4a, M680X_INS_DECD, inh_hid, inh_hid }, { 0x4c, M680X_INS_INCD, inh_hid, inh_hid }, { 0x4d, M680X_INS_TSTD, inh_hid, inh_hid }, { 0x4f, M680X_INS_CLRD, inh_hid, inh_hid }, // 0x5x, Register W instructions { 0x53, M680X_INS_COMW, inh_hid, inh_hid }, { 0x54, M680X_INS_LSRW, inh_hid, inh_hid }, { 0x56, M680X_INS_RORW, inh_hid, inh_hid }, { 0x59, M680X_INS_ROLW, inh_hid, inh_hid }, { 0x5a, M680X_INS_DECW, inh_hid, inh_hid }, { 0x5c, M680X_INS_INCW, inh_hid, inh_hid }, { 0x5d, M680X_INS_TSTW, inh_hid, inh_hid }, { 0x5f, M680X_INS_CLRW, inh_hid, inh_hid }, // 0x8x, immediate instructionY with register D,W,Y { 0x80, M680X_INS_SUBW, imm16_hid, inh_hid }, { 0x81, M680X_INS_CMPW, imm16_hid, inh_hid }, { 0x82, M680X_INS_SBCD, imm16_hid, inh_hid }, { 0x83, M680X_INS_CMPD, imm16_hid, inh_hid }, { 0x84, M680X_INS_ANDD, imm16_hid, inh_hid }, { 0x85, M680X_INS_BITD, imm16_hid, inh_hid }, { 0x86, M680X_INS_LDW, imm16_hid, inh_hid }, { 0x88, M680X_INS_EORD, imm16_hid, inh_hid }, { 0x89, M680X_INS_ADCD, imm16_hid, inh_hid }, { 0x8a, M680X_INS_ORD, imm16_hid, inh_hid }, { 0x8b, M680X_INS_ADDW, imm16_hid, inh_hid }, { 0x8c, M680X_INS_CMPY, imm16_hid, inh_hid }, { 0x8e, M680X_INS_LDY, imm16_hid, inh_hid }, // 0x9x, direct instructions with register D,W,Y { 0x90, M680X_INS_SUBW, dir_hid, inh_hid }, { 0x91, M680X_INS_CMPW, dir_hid, inh_hid }, { 0x92, M680X_INS_SBCD, dir_hid, inh_hid }, { 0x93, M680X_INS_CMPD, dir_hid, inh_hid }, { 0x94, M680X_INS_ANDD, dir_hid, inh_hid }, { 0x95, M680X_INS_BITD, dir_hid, inh_hid }, { 0x96, M680X_INS_LDW, dir_hid, inh_hid }, { 0x97, M680X_INS_STW, dir_hid, inh_hid }, { 0x98, M680X_INS_EORD, dir_hid, inh_hid }, { 0x99, M680X_INS_ADCD, dir_hid, inh_hid }, { 0x9a, M680X_INS_ORD, dir_hid, inh_hid }, { 0x9b, M680X_INS_ADDW, dir_hid, inh_hid }, { 0x9c, M680X_INS_CMPY, dir_hid, inh_hid }, { 0x9e, M680X_INS_LDY, dir_hid, inh_hid }, { 0x9f, M680X_INS_STY, dir_hid, inh_hid }, // 0xAx, indexed instructions with register D,W,Y { 0xa0, M680X_INS_SUBW, idx09_hid, inh_hid }, { 0xa1, M680X_INS_CMPW, idx09_hid, inh_hid }, { 0xa2, M680X_INS_SBCD, idx09_hid, inh_hid }, { 0xa3, M680X_INS_CMPD, idx09_hid, inh_hid }, { 0xa4, M680X_INS_ANDD, idx09_hid, inh_hid }, { 0xa5, M680X_INS_BITD, idx09_hid, inh_hid }, { 0xa6, M680X_INS_LDW, idx09_hid, inh_hid }, { 0xa7, M680X_INS_STW, idx09_hid, inh_hid }, { 0xa8, M680X_INS_EORD, idx09_hid, inh_hid }, { 0xa9, M680X_INS_ADCD, idx09_hid, inh_hid }, { 0xaa, M680X_INS_ORD, idx09_hid, inh_hid }, { 0xab, M680X_INS_ADDW, idx09_hid, inh_hid }, { 0xac, M680X_INS_CMPY, idx09_hid, inh_hid }, { 0xae, M680X_INS_LDY, idx09_hid, inh_hid }, { 0xaf, M680X_INS_STY, idx09_hid, inh_hid }, // 0xBx, extended instructions with register D,W,Y { 0xb0, M680X_INS_SUBW, ext_hid, inh_hid }, { 0xb1, M680X_INS_CMPW, ext_hid, inh_hid }, { 0xb2, M680X_INS_SBCD, ext_hid, inh_hid }, { 0xb3, M680X_INS_CMPD, ext_hid, inh_hid }, { 0xb4, M680X_INS_ANDD, ext_hid, inh_hid }, { 0xb5, M680X_INS_BITD, ext_hid, inh_hid }, { 0xb6, M680X_INS_LDW, ext_hid, inh_hid }, { 0xb7, M680X_INS_STW, ext_hid, inh_hid }, { 0xb8, M680X_INS_EORD, ext_hid, inh_hid }, { 0xb9, M680X_INS_ADCD, ext_hid, inh_hid }, { 0xba, M680X_INS_ORD, ext_hid, inh_hid }, { 0xbb, M680X_INS_ADDW, ext_hid, inh_hid }, { 0xbc, M680X_INS_CMPY, ext_hid, inh_hid }, { 0xbe, M680X_INS_LDY, ext_hid, inh_hid }, { 0xbf, M680X_INS_STY, ext_hid, inh_hid }, // 0xCx, immediate instructions with register S { 0xce, M680X_INS_LDS, imm16_hid, inh_hid }, // 0xDx, direct instructions with register S,Q { 0xdc, M680X_INS_LDQ, dir_hid, inh_hid }, { 0xdd, M680X_INS_STQ, dir_hid, inh_hid }, { 0xde, M680X_INS_LDS, dir_hid, inh_hid }, { 0xdf, M680X_INS_STS, dir_hid, inh_hid }, // 0xEx, indexed instructions with register S,Q { 0xec, M680X_INS_LDQ, idx09_hid, inh_hid }, { 0xed, M680X_INS_STQ, idx09_hid, inh_hid }, { 0xee, M680X_INS_LDS, idx09_hid, inh_hid }, { 0xef, M680X_INS_STS, idx09_hid, inh_hid }, // 0xFx, extended instructions with register S,Q { 0xfc, M680X_INS_LDQ, ext_hid, inh_hid }, { 0xfd, M680X_INS_STQ, ext_hid, inh_hid }, { 0xfe, M680X_INS_LDS, ext_hid, inh_hid }, { 0xff, M680X_INS_STS, ext_hid, inh_hid }, }; // The following array has to be sorted by increasing // opcodes. Otherwise the binary_search will fail. // // HD6309 PAGE3 instructions (with prefix 0x11) static const inst_pageX g_hd6309_inst_page3_table[] = { { 0x30, M680X_INS_BAND, bitmv_hid, inh_hid }, { 0x31, M680X_INS_BIAND, bitmv_hid, inh_hid }, { 0x32, M680X_INS_BOR, bitmv_hid, inh_hid }, { 0x33, M680X_INS_BIOR, bitmv_hid, inh_hid }, { 0x34, M680X_INS_BEOR, bitmv_hid, inh_hid }, { 0x35, M680X_INS_BIEOR, bitmv_hid, inh_hid }, { 0x36, M680X_INS_LDBT, bitmv_hid, inh_hid }, { 0x37, M680X_INS_STBT, bitmv_hid, inh_hid }, { 0x38, M680X_INS_TFM, tfm_hid, inh_hid }, { 0x39, M680X_INS_TFM, tfm_hid, inh_hid }, { 0x3a, M680X_INS_TFM, tfm_hid, inh_hid }, { 0x3b, M680X_INS_TFM, tfm_hid, inh_hid }, { 0x3c, M680X_INS_BITMD, imm8_hid, inh_hid }, { 0x3d, M680X_INS_LDMD, imm8_hid, inh_hid }, { 0x3f, M680X_INS_SWI3, inh_hid, inh_hid }, // 0x4x, Register E instructions { 0x43, M680X_INS_COME, inh_hid, inh_hid }, { 0x4a, M680X_INS_DECE, inh_hid, inh_hid }, { 0x4c, M680X_INS_INCE, inh_hid, inh_hid }, { 0x4d, M680X_INS_TSTE, inh_hid, inh_hid }, { 0x4f, M680X_INS_CLRE, inh_hid, inh_hid }, // 0x5x, Register F instructions { 0x53, M680X_INS_COMF, inh_hid, inh_hid }, { 0x5a, M680X_INS_DECF, inh_hid, inh_hid }, { 0x5c, M680X_INS_INCF, inh_hid, inh_hid }, { 0x5d, M680X_INS_TSTF, inh_hid, inh_hid }, { 0x5f, M680X_INS_CLRF, inh_hid, inh_hid }, // 0x8x, immediate instructions with register U,S,E { 0x80, M680X_INS_SUBE, imm8_hid, inh_hid }, { 0x81, M680X_INS_CMPE, imm8_hid, inh_hid }, { 0x83, M680X_INS_CMPU, imm16_hid, inh_hid }, { 0x86, M680X_INS_LDE, imm8_hid, inh_hid }, { 0x8b, M680X_INS_ADDE, imm8_hid, inh_hid }, { 0x8c, M680X_INS_CMPS, imm16_hid, inh_hid }, { 0x8d, M680X_INS_DIVD, imm8_hid, inh_hid }, { 0x8e, M680X_INS_DIVQ, imm16_hid, inh_hid }, { 0x8f, M680X_INS_MULD, imm16_hid, inh_hid }, // 0x9x, direct instructions with register U,S,E,Q { 0x90, M680X_INS_SUBE, dir_hid, inh_hid }, { 0x91, M680X_INS_CMPE, dir_hid, inh_hid }, { 0x93, M680X_INS_CMPU, dir_hid, inh_hid }, { 0x96, M680X_INS_LDE, dir_hid, inh_hid }, { 0x97, M680X_INS_STE, dir_hid, inh_hid }, { 0x9b, M680X_INS_ADDE, dir_hid, inh_hid }, { 0x9c, M680X_INS_CMPS, dir_hid, inh_hid }, { 0x9d, M680X_INS_DIVD, dir_hid, inh_hid }, { 0x9e, M680X_INS_DIVQ, dir_hid, inh_hid }, { 0x9f, M680X_INS_MULD, dir_hid, inh_hid }, // 0xAx, indexed instructions with register U,S,D,Q { 0xa0, M680X_INS_SUBE, idx09_hid, inh_hid }, { 0xa1, M680X_INS_CMPE, idx09_hid, inh_hid }, { 0xa3, M680X_INS_CMPU, idx09_hid, inh_hid }, { 0xa6, M680X_INS_LDE, idx09_hid, inh_hid }, { 0xa7, M680X_INS_STE, idx09_hid, inh_hid }, { 0xab, M680X_INS_ADDE, idx09_hid, inh_hid }, { 0xac, M680X_INS_CMPS, idx09_hid, inh_hid }, { 0xad, M680X_INS_DIVD, idx09_hid, inh_hid }, { 0xae, M680X_INS_DIVQ, idx09_hid, inh_hid }, { 0xaf, M680X_INS_MULD, idx09_hid, inh_hid }, // 0xBx, extended instructions with register U,S,D,Q { 0xb0, M680X_INS_SUBE, ext_hid, inh_hid }, { 0xb1, M680X_INS_CMPE, ext_hid, inh_hid }, { 0xb3, M680X_INS_CMPU, ext_hid, inh_hid }, { 0xb6, M680X_INS_LDE, ext_hid, inh_hid }, { 0xb7, M680X_INS_STE, ext_hid, inh_hid }, { 0xbb, M680X_INS_ADDE, ext_hid, inh_hid }, { 0xbc, M680X_INS_CMPS, ext_hid, inh_hid }, { 0xbd, M680X_INS_DIVD, ext_hid, inh_hid }, { 0xbe, M680X_INS_DIVQ, ext_hid, inh_hid }, { 0xbf, M680X_INS_MULD, ext_hid, inh_hid }, // 0xCx, immediate instructions with register F { 0xc0, M680X_INS_SUBF, imm8_hid, inh_hid }, { 0xc1, M680X_INS_CMPF, imm8_hid, inh_hid }, { 0xc6, M680X_INS_LDF, imm8_hid, inh_hid }, { 0xcb, M680X_INS_ADDF, imm8_hid, inh_hid }, // 0xDx, direct instructions with register F { 0xd0, M680X_INS_SUBF, dir_hid, inh_hid }, { 0xd1, M680X_INS_CMPF, dir_hid, inh_hid }, { 0xd6, M680X_INS_LDF, dir_hid, inh_hid }, { 0xd7, M680X_INS_STF, dir_hid, inh_hid }, { 0xdb, M680X_INS_ADDF, dir_hid, inh_hid }, // 0xEx, indexed instructions with register F { 0xe0, M680X_INS_SUBF, idx09_hid, inh_hid }, { 0xe1, M680X_INS_CMPF, idx09_hid, inh_hid }, { 0xe6, M680X_INS_LDF, idx09_hid, inh_hid }, { 0xe7, M680X_INS_STF, idx09_hid, inh_hid }, { 0xeb, M680X_INS_ADDF, idx09_hid, inh_hid }, // 0xFx, extended instructions with register F { 0xf0, M680X_INS_SUBF, ext_hid, inh_hid }, { 0xf1, M680X_INS_CMPF, ext_hid, inh_hid }, { 0xf6, M680X_INS_LDF, ext_hid, inh_hid }, { 0xf7, M680X_INS_STF, ext_hid, inh_hid }, { 0xfb, M680X_INS_ADDF, ext_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/insn_props.inc010066400017500001750000000462211363402546700206630ustar0000000000000000 // These temporary defines keep the following table short and handy. #define NOG M680X_GRP_INVALID #define NOR M680X_REG_INVALID static const insn_props g_insn_props[] = { { NOG, uuuu, NOR, NOR, false, false }, // INVLD { NOG, rmmm, M680X_REG_B, M680X_REG_A, true, false }, // ABA { NOG, rmmm, M680X_REG_B, M680X_REG_X, false, false }, // ABX { NOG, rmmm, M680X_REG_B, M680X_REG_Y, false, false }, // ABY { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ADC { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ADCA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ADCB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ADCD { NOG, rmmm, NOR, NOR, true, false }, // ADCR { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ADD { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ADDA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ADDB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ADDD { NOG, mrrr, M680X_REG_E, NOR, true, false }, // ADDE { NOG, mrrr, M680X_REG_F, NOR, true, false }, // ADDF { NOG, rmmm, NOR, NOR, true, false }, // ADDR { NOG, mrrr, M680X_REG_W, NOR, true, false }, // ADDW { NOG, rmmm, NOR, NOR, true, false }, // AIM { NOG, mrrr, M680X_REG_S, NOR, false, false }, // AIS { NOG, mrrr, M680X_REG_HX, NOR, false, false }, // AIX { NOG, mrrr, M680X_REG_A, NOR, true, false }, // AND { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ANDA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ANDB { NOG, mrrr, M680X_REG_CC, NOR, true, false }, // ANDCC { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ANDD { NOG, rmmm, NOR, NOR, true, false }, // ANDR { NOG, mrrr, NOR, NOR, true, false }, // ASL { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ASLA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ASLB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ASLD { NOG, mrrr, NOR, NOR, true, false }, // ASR { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ASRA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ASRB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ASRD { NOG, mrrr, M680X_REG_X, NOR, true, false }, // ASRX { NOG, mrrr, NOR, NOR, false, false }, // BAND { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BCC { NOG, mrrr, NOR, NOR, true, false }, // BCLR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BCS { NOG, mrrr, NOR, NOR, false, false }, // BEOR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BEQ { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BGE { NOG, uuuu, NOR, NOR, false, false }, // BGND { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BGT { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BHCC { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BHCS { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BHI { NOG, mrrr, NOR, NOR, false, false }, // BIAND { NOG, mrrr, NOR, NOR, false, false }, // BIEOR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BIH { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BIL { NOG, mrrr, NOR, NOR, false, false }, // BIOR { NOG, rrrr, M680X_REG_A, NOR, true, false }, // BIT { NOG, rrrr, M680X_REG_A, NOR, true, false }, // BITA { NOG, rrrr, M680X_REG_B, NOR, true, false }, // BITB { NOG, rrrr, M680X_REG_D, NOR, true, false }, // BITD { NOG, rrrr, M680X_REG_MD, NOR, true, false }, // BITMD { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BLE { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BLS { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BLT { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BMC { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BMI { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BMS { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BNE { NOG, mrrr, NOR, NOR, false, false }, // BOR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BPL { M680X_GRP_JUMP, rruu, NOR, NOR, false, false }, // BRCLR { M680X_GRP_JUMP, rruu, NOR, NOR, false, false }, // BRSET { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BRA { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BRN never branches { NOG, mrrr, NOR, NOR, true, false }, // BSET { M680X_GRP_CALL, uuuu, NOR, NOR, false, true }, // BSR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BVC { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // BVS { M680X_GRP_CALL, uuuu, NOR, NOR, false, true }, // CALL { NOG, rrrr, M680X_REG_B, M680X_REG_A, true, false }, // CBA { M680X_GRP_JUMP, rruu, M680X_REG_A, NOR, false, false }, // CBEQ { M680X_GRP_JUMP, rruu, M680X_REG_A, NOR, false, false }, // CBEQA { M680X_GRP_JUMP, rruu, M680X_REG_X, NOR, false, false }, // CBEQX { NOG, uuuu, NOR, NOR, true, false }, // CLC { NOG, uuuu, NOR, NOR, true, false }, // CLI { NOG, wrrr, NOR, NOR, true, false }, // CLR { NOG, wrrr, M680X_REG_A, NOR, true, false }, // CLRA { NOG, wrrr, M680X_REG_B, NOR, true, false }, // CLRB { NOG, wrrr, M680X_REG_D, NOR, true, false }, // CLRD { NOG, wrrr, M680X_REG_E, NOR, true, false }, // CLRE { NOG, wrrr, M680X_REG_F, NOR, true, false }, // CLRF { NOG, wrrr, M680X_REG_H, NOR, true, false }, // CLRH { NOG, wrrr, M680X_REG_W, NOR, true, false }, // CLRW { NOG, wrrr, M680X_REG_X, NOR, true, false }, // CLRX { NOG, uuuu, NOR, NOR, true, false }, // CLV { NOG, rrrr, M680X_REG_A, NOR, true, false }, // CMP { NOG, rrrr, M680X_REG_A, NOR, true, false }, // CMPA { NOG, rrrr, M680X_REG_B, NOR, true, false }, // CMPB { NOG, rrrr, M680X_REG_D, NOR, true, false }, // CMPD { NOG, rrrr, M680X_REG_E, NOR, true, false }, // CMPE { NOG, rrrr, M680X_REG_F, NOR, true, false }, // CMPF { NOG, rrrr, NOR, NOR, true, false }, // CMPR { NOG, rrrr, M680X_REG_S, NOR, true, false }, // CMPS { NOG, rrrr, M680X_REG_U, NOR, true, false }, // CMPU { NOG, rrrr, M680X_REG_W, NOR, true, false }, // CMPW { NOG, rrrr, M680X_REG_X, NOR, true, false }, // CMPX { NOG, rrrr, M680X_REG_Y, NOR, true, false }, // CMPY { NOG, mrrr, NOR, NOR, true, false }, // COM { NOG, mrrr, M680X_REG_A, NOR, true, false }, // COMA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // COMB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // COMD { NOG, mrrr, M680X_REG_E, NOR, true, false }, // COME { NOG, mrrr, M680X_REG_F, NOR, true, false }, // COMF { NOG, mrrr, M680X_REG_W, NOR, true, false }, // COMW { NOG, mrrr, M680X_REG_X, NOR, true, false }, // COMX { NOG, rrrr, M680X_REG_D, NOR, true, false }, // CPD { NOG, rrrr, M680X_REG_HX, NOR, true, false }, // CPHX { NOG, rrrr, M680X_REG_S, NOR, true, false }, // CPS { NOG, rrrr, M680X_REG_X, NOR, true, false }, // CPX { NOG, rrrr, M680X_REG_Y, NOR, true, false }, // CPY { NOG, mrrr, NOR, NOR, true, true }, // CWAI { NOG, mrrr, NOR, NOR, true, true }, // DAA { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // DBEQ { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // DBNE { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // DBNZ { M680X_GRP_JUMP, muuu, M680X_REG_A, NOR, false, false }, // DBNZA { M680X_GRP_JUMP, muuu, M680X_REG_X, NOR, false, false }, // DBNZX { NOG, mrrr, NOR, NOR, true, false }, // DEC { NOG, mrrr, M680X_REG_A, NOR, true, false }, // DECA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // DECB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // DECD { NOG, mrrr, M680X_REG_E, NOR, true, false }, // DECE { NOG, mrrr, M680X_REG_F, NOR, true, false }, // DECF { NOG, mrrr, M680X_REG_W, NOR, true, false }, // DECW { NOG, mrrr, M680X_REG_X, NOR, true, false }, // DECX { NOG, mrrr, M680X_REG_S, NOR, false, false }, // DES { NOG, mrrr, M680X_REG_X, NOR, true, false }, // DEX { NOG, mrrr, M680X_REG_Y, NOR, true, false }, // DEY { NOG, mmrr, NOR, NOR, true, true }, // DIV { NOG, mrrr, M680X_REG_D, NOR, true, false }, // DIVD { NOG, mrrr, M680X_REG_Q, NOR, true, false }, // DIVQ { NOG, mmrr, NOR, NOR, true, true }, // EDIV { NOG, mmrr, NOR, NOR, true, true }, // EDIVS { NOG, rmmm, NOR, NOR, true, false }, // EIM { NOG, mrrr, NOR, NOR, true, true }, // EMACS { NOG, mrrr, M680X_REG_D, NOR, true, false }, // EMAXD { NOG, mrrr, NOR, NOR, true, true }, // EMAXM { NOG, mrrr, M680X_REG_D, NOR, true, false }, // EMIND { NOG, mrrr, NOR, NOR, true, true }, // EMINM { NOG, mmrr, NOR, NOR, true, true }, // EMUL { NOG, mmrr, NOR, NOR, true, true }, // EMULS { NOG, mrrr, M680X_REG_A, NOR, true, false }, // EOR { NOG, mrrr, M680X_REG_A, NOR, true, false }, // EORA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // EORB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // EORD { NOG, rmmm, NOR, NOR, true, false }, // EORR { NOG, rmmm, NOR, NOR, true, true }, // ETBL { NOG, mmmm, NOR, NOR, false, false }, // EXG { NOG, mmmm, NOR, NOR, true, true }, // FDIV { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // IBEQ { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // IBNE { NOG, mmmm, NOR, NOR, true, true }, // IDIV { NOG, mmmm, NOR, NOR, true, true }, // IDIVS { NOG, uuuu, NOR, NOR, false, false }, // ILLGL { NOG, mrrr, NOR, NOR, true, false }, // INC { NOG, mrrr, M680X_REG_A, NOR, true, false }, // INCA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // INCB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // INCD { NOG, mrrr, M680X_REG_E, NOR, true, false }, // INCE { NOG, mrrr, M680X_REG_F, NOR, true, false }, // INCF { NOG, mrrr, M680X_REG_W, NOR, true, false }, // INCW { NOG, mrrr, M680X_REG_X, NOR, true, false }, // INCX { NOG, mrrr, M680X_REG_S, NOR, false, false }, // INS { NOG, mrrr, M680X_REG_X, NOR, true, false }, // INX { NOG, mrrr, M680X_REG_Y, NOR, true, false }, // INY { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // JMP { M680X_GRP_CALL, uuuu, NOR, NOR, false, true }, // JSR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBCC { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBCS { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBEQ { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBGE { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBGT { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBHI { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBLE { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBLS { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBLT { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBMI { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBNE { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBPL { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBRA { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBRN never branches { M680X_GRP_CALL, uuuu, NOR, NOR, false, true }, // LBSR { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBVC { M680X_GRP_JUMP, uuuu, NOR, NOR, false, false }, // LBVS { NOG, wrrr, M680X_REG_A, NOR, true, false }, // LDA { NOG, wrrr, M680X_REG_A, NOR, true, false }, // LDAA { NOG, wrrr, M680X_REG_B, NOR, true, false }, // LDAB { NOG, wrrr, M680X_REG_B, NOR, true, false }, // LDB { NOG, mrrr, NOR, NOR, false, false }, // LDBT { NOG, wrrr, M680X_REG_D, NOR, true, false }, // LDD { NOG, wrrr, M680X_REG_E, NOR, true, false }, // LDE { NOG, wrrr, M680X_REG_F, NOR, true, false }, // LDF { NOG, wrrr, M680X_REG_HX, NOR, true, false }, // LDHX { NOG, mrrr, M680X_REG_MD, NOR, false, false }, // LDMD { NOG, wrrr, M680X_REG_Q, NOR, true, false }, // LDQ { NOG, wrrr, M680X_REG_S, NOR, true, false }, // LDS { NOG, wrrr, M680X_REG_U, NOR, true, false }, // LDU { NOG, wrrr, M680X_REG_W, NOR, true, false }, // LDW { NOG, wrrr, M680X_REG_X, NOR, true, false }, // LDX { NOG, wrrr, M680X_REG_Y, NOR, true, false }, // LDY { NOG, wrrr, M680X_REG_S, NOR, false, false }, // LEAS { NOG, wrrr, M680X_REG_U, NOR, false, false }, // LEAU { NOG, wrrr, M680X_REG_X, NOR, false, false }, // LEAX { NOG, wrrr, M680X_REG_Y, NOR, false, false }, // LEAY { NOG, mrrr, NOR, NOR, true, false }, // LSL { NOG, mrrr, M680X_REG_A, NOR, true, false }, // LSLA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // LSLB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // LSLD { NOG, mrrr, M680X_REG_X, NOR, true, false }, // LSLX { NOG, mrrr, NOR, NOR, true, false }, // LSR { NOG, mrrr, M680X_REG_A, NOR, true, false }, // LSRA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // LSRB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // LSRD { NOG, mrrr, M680X_REG_W, NOR, true, false }, // LSRW { NOG, mrrr, M680X_REG_X, NOR, true, false }, // LSRX { NOG, mrrr, M680X_REG_A, NOR, true, false }, // MAXA { NOG, mrrr, NOR, NOR, true, true }, // MAXM { NOG, mmrr, NOR, NOR, true, true }, // MEM { NOG, mrrr, M680X_REG_A, NOR, true, false }, // MINA { NOG, mrrr, NOR, NOR, true, true }, // MINM { NOG, rwww, NOR, NOR, true, false }, // MOV { NOG, rwww, NOR, NOR, false, false }, // MOVB { NOG, rwww, NOR, NOR, false, false }, // MOVW { NOG, mmmm, NOR, NOR, true, true }, // MUL { NOG, mwrr, M680X_REG_D, NOR, true, true }, // MULD { NOG, mrrr, NOR, NOR, true, false }, // NEG { NOG, mrrr, M680X_REG_A, NOR, true, false }, // NEGA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // NEGB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // NEGD { NOG, mrrr, M680X_REG_X, NOR, true, false }, // NEGX { NOG, uuuu, NOR, NOR, false, false }, // NOP { NOG, mrrr, M680X_REG_A, NOR, true, false }, // NSA { NOG, rmmm, NOR, NOR, true, false }, // OIM { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ORA { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ORAA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ORAB { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ORB { NOG, mrrr, M680X_REG_CC, NOR, true, false }, // ORCC { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ORD { NOG, rmmm, NOR, NOR, true, false }, // ORR { NOG, rmmm, M680X_REG_A, NOR, false, true }, // PSHA { NOG, rmmm, M680X_REG_B, NOR, false, true }, // PSHB { NOG, rmmm, M680X_REG_CC, NOR, false, true }, // PSHC { NOG, rmmm, M680X_REG_D, NOR, false, true }, // PSHD { NOG, rmmm, M680X_REG_H, NOR, false, true }, // PSHH { NOG, mrrr, M680X_REG_S, NOR, false, false }, // PSHS { NOG, mrrr, M680X_REG_S, M680X_REG_W, false, false }, // PSHSW { NOG, mrrr, M680X_REG_U, NOR, false, false }, // PSHU { NOG, mrrr, M680X_REG_U, M680X_REG_W, false, false }, // PSHUW { NOG, rmmm, M680X_REG_X, NOR, false, true }, // PSHX { NOG, rmmm, M680X_REG_Y, NOR, false, true }, // PSHY { NOG, wmmm, M680X_REG_A, NOR, false, true }, // PULA { NOG, wmmm, M680X_REG_B, NOR, false, true }, // PULB { NOG, wmmm, M680X_REG_CC, NOR, false, true }, // PULC { NOG, wmmm, M680X_REG_D, NOR, false, true }, // PULD { NOG, wmmm, M680X_REG_H, NOR, false, true }, // PULH { NOG, mwww, M680X_REG_S, NOR, false, false }, // PULS { NOG, mwww, M680X_REG_S, M680X_REG_W, false, false }, // PULSW { NOG, mwww, M680X_REG_U, NOR, false, false }, // PULU { NOG, mwww, M680X_REG_U, M680X_REG_W, false, false }, // PULUW { NOG, wmmm, M680X_REG_X, NOR, false, true }, // PULX { NOG, wmmm, M680X_REG_Y, NOR, false, true }, // PULY { NOG, mmrr, NOR, NOR, true, true }, // REV { NOG, mmmm, NOR, NOR, true, true }, // REVW { NOG, mrrr, NOR, NOR, true, false }, // ROL { NOG, mrrr, M680X_REG_A, NOR, true, false }, // ROLA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // ROLB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // ROLD { NOG, mrrr, M680X_REG_W, NOR, true, false }, // ROLW { NOG, mrrr, M680X_REG_X, NOR, true, false }, // ROLX { NOG, mrrr, NOR, NOR, true, false }, // ROR { NOG, mrrr, M680X_REG_A, NOR, true, false }, // RORA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // RORB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // RORD { NOG, mrrr, M680X_REG_W, NOR, true, false }, // RORW { NOG, mrrr, M680X_REG_X, NOR, true, false }, // RORX { NOG, wrrr, M680X_REG_S, NOR, false, false }, // RSP { M680X_GRP_RET, mwww, NOR, NOR, false, true }, // RTC { M680X_GRP_IRET, mwww, NOR, NOR, false, true }, // RTI { M680X_GRP_RET, mwww, NOR, NOR, false, true }, // RTS { NOG, rmmm, M680X_REG_B, M680X_REG_A, true, false }, // SBA { NOG, mrrr, M680X_REG_A, NOR, true, false }, // SBC { NOG, mrrr, M680X_REG_A, NOR, true, false }, // SBCA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // SBCB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // SBCD { NOG, rmmm, NOR, NOR, true, false }, // SBCR { NOG, uuuu, NOR, NOR, true, false }, // SEC { NOG, uuuu, NOR, NOR, true, false }, // SEI { NOG, uuuu, NOR, NOR, true, false }, // SEV { NOG, wrrr, NOR, NOR, true, true }, // SEX { NOG, rwww, M680X_REG_W, NOR, true, true }, // SEXW { NOG, uuuu, NOR, NOR, false, false }, // SLP { NOG, rwww, M680X_REG_A, NOR, true, false }, // STA { NOG, rwww, M680X_REG_A, NOR, true, false }, // STAA { NOG, rwww, M680X_REG_B, NOR, true, false }, // STAB { NOG, rwww, M680X_REG_B, NOR, true, false }, // STB { NOG, rrrm, NOR, NOR, false, false }, // STBT { NOG, rwww, M680X_REG_D, NOR, true, false }, // STD { NOG, rwww, M680X_REG_E, NOR, true, false }, // STE { NOG, rwww, M680X_REG_F, NOR, true, false }, // STF { NOG, uuuu, NOR, NOR, false, false }, // STOP { NOG, rwww, M680X_REG_HX, NOR, true, false }, // STHX { NOG, rwww, M680X_REG_Q, NOR, true, false }, // STQ { NOG, rwww, M680X_REG_S, NOR, true, false }, // STS { NOG, rwww, M680X_REG_U, NOR, true, false }, // STU { NOG, rwww, M680X_REG_W, NOR, true, false }, // STW { NOG, rwww, M680X_REG_X, NOR, true, false }, // STX { NOG, rwww, M680X_REG_Y, NOR, true, false }, // STY { NOG, mrrr, M680X_REG_A, NOR, true, false }, // SUB { NOG, mrrr, M680X_REG_A, NOR, true, false }, // SUBA { NOG, mrrr, M680X_REG_B, NOR, true, false }, // SUBB { NOG, mrrr, M680X_REG_D, NOR, true, false }, // SUBD { NOG, mrrr, M680X_REG_E, NOR, true, false }, // SUBE { NOG, mrrr, M680X_REG_F, NOR, true, false }, // SUBF { NOG, rmmm, NOR, NOR, true, false }, // SUBR { NOG, mrrr, M680X_REG_W, NOR, true, false }, // SUBW { M680X_GRP_INT, mmrr, NOR, NOR, true, true }, // SWI { M680X_GRP_INT, mmrr, NOR, NOR, true, true }, // SWI2 { M680X_GRP_INT, mmrr, NOR, NOR, true, true }, // SWI3 { NOG, uuuu, NOR, NOR, false, false }, // SYNC { NOG, rwww, M680X_REG_A, M680X_REG_B, true, false }, // TAB { NOG, rwww, M680X_REG_A, M680X_REG_CC, false, false }, // TAP { NOG, rwww, M680X_REG_A, M680X_REG_X, false, false }, // TAX { NOG, rwww, M680X_REG_B, M680X_REG_A, true, false }, // TBA { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // TBEQ { NOG, rmmm, NOR, NOR, true, true }, // TBL { M680X_GRP_JUMP, muuu, NOR, NOR, false, false }, // TBNE { NOG, uuuu, NOR, NOR, false, false }, // TEST { NOG, rwww, NOR, NOR, false, false }, // TFM { NOG, rwww, NOR, NOR, false, false }, // TFR { NOG, rrrr, NOR, NOR, true, false }, // TIM { NOG, rwww, M680X_REG_CC, M680X_REG_A, false, false }, // TPA { NOG, rrrr, NOR, NOR, true, false }, // TST { NOG, rrrr, M680X_REG_A, NOR, true, false }, // TSTA { NOG, rrrr, M680X_REG_B, NOR, true, false }, // TSTB { NOG, rrrr, M680X_REG_D, NOR, true, false }, // TSTD { NOG, rrrr, M680X_REG_E, NOR, true, false }, // TSTE { NOG, rrrr, M680X_REG_F, NOR, true, false }, // TSTF { NOG, rrrr, M680X_REG_W, NOR, true, false }, // TSTW { NOG, rrrr, M680X_REG_X, NOR, true, false }, // TSTX { NOG, rwww, M680X_REG_S, M680X_REG_HX, false, false }, // TSX { NOG, rwww, M680X_REG_S, M680X_REG_Y, false, false }, // TSY { NOG, rwww, M680X_REG_X, M680X_REG_A, false, false }, // TXA { NOG, rwww, M680X_REG_HX, M680X_REG_S, false, false }, // TXS { NOG, rwww, M680X_REG_Y, M680X_REG_S, false, false }, // TYS { NOG, mrrr, NOR, NOR, true, true }, // WAI { NOG, uuuu, NOR, NOR, true, false }, // WAIT { NOG, uuuu, NOR, NOR, true, true }, // WAV { NOG, uuuu, NOR, NOR, true, true }, // WAVR { NOG, mmmm, M680X_REG_D, M680X_REG_X, false, false }, // XGDX { NOG, mmmm, M680X_REG_D, M680X_REG_Y, false, false }, // XGDY }; #undef NOR #undef NOG capstone-sys-0.11.0/capstone/arch/M680X/m6800.inc010066400017500001750000000252371363402546700172470ustar0000000000000000 // M6800/2 instructions static const inst_page1 g_m6800_inst_page1_table[256] = { // 0x0x, inherent instructions { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_NOP, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_TAP, inh_hid, inh_hid }, { M680X_INS_TPA, inh_hid, inh_hid }, { M680X_INS_INX, inh_hid, inh_hid }, { M680X_INS_DEX, inh_hid, inh_hid }, { M680X_INS_CLV, inh_hid, inh_hid }, { M680X_INS_SEV, inh_hid, inh_hid }, { M680X_INS_CLC, inh_hid, inh_hid }, { M680X_INS_SEC, inh_hid, inh_hid }, { M680X_INS_CLI, inh_hid, inh_hid }, { M680X_INS_SEI, inh_hid, inh_hid }, // 0x1x, inherent instructions { M680X_INS_SBA, inh_hid, inh_hid }, { M680X_INS_CBA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_TAB, inh_hid, inh_hid }, { M680X_INS_TBA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_DAA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ABA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, // 0x2x, relative branch instructions { M680X_INS_BRA, rel8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_BHI, rel8_hid, inh_hid }, { M680X_INS_BLS, rel8_hid, inh_hid }, { M680X_INS_BCC, rel8_hid, inh_hid }, { M680X_INS_BCS, rel8_hid, inh_hid }, { M680X_INS_BNE, rel8_hid, inh_hid }, { M680X_INS_BEQ, rel8_hid, inh_hid }, { M680X_INS_BVC, rel8_hid, inh_hid }, { M680X_INS_BVS, rel8_hid, inh_hid }, { M680X_INS_BPL, rel8_hid, inh_hid }, { M680X_INS_BMI, rel8_hid, inh_hid }, { M680X_INS_BGE, rel8_hid, inh_hid }, { M680X_INS_BLT, rel8_hid, inh_hid }, { M680X_INS_BGT, rel8_hid, inh_hid }, { M680X_INS_BLE, rel8_hid, inh_hid }, // 0x3x, inherent instructions { M680X_INS_TSX, inh_hid, inh_hid }, { M680X_INS_INS, inh_hid, inh_hid }, { M680X_INS_PULA, inh_hid, inh_hid }, { M680X_INS_PULB, inh_hid, inh_hid }, { M680X_INS_DES, inh_hid, inh_hid }, { M680X_INS_TXS, inh_hid, inh_hid }, { M680X_INS_PSHA, inh_hid, inh_hid }, { M680X_INS_PSHB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RTS, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RTI, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_WAI, inh_hid, inh_hid }, { M680X_INS_SWI, inh_hid, inh_hid }, // 0x4x, Register A instructions { M680X_INS_NEGA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COMA, inh_hid, inh_hid }, { M680X_INS_LSRA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RORA, inh_hid, inh_hid }, { M680X_INS_ASRA, inh_hid, inh_hid }, { M680X_INS_ASLA, inh_hid, inh_hid }, { M680X_INS_ROLA, inh_hid, inh_hid }, { M680X_INS_DECA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INCA, inh_hid, inh_hid }, { M680X_INS_TSTA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLRA, inh_hid, inh_hid }, // 0x5x, Register B instructions { M680X_INS_NEGB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COMB, inh_hid, inh_hid }, { M680X_INS_LSRB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RORB, inh_hid, inh_hid }, { M680X_INS_ASRB, inh_hid, inh_hid }, { M680X_INS_ASLB, inh_hid, inh_hid }, { M680X_INS_ROLB, inh_hid, inh_hid }, { M680X_INS_DECB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INCB, inh_hid, inh_hid }, { M680X_INS_TSTB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLRB, inh_hid, inh_hid }, // 0x6x, indexed instructions { M680X_INS_NEG, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, idxX_hid, inh_hid }, { M680X_INS_LSR, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, idxX_hid, inh_hid }, { M680X_INS_ASR, idxX_hid, inh_hid }, { M680X_INS_ASL, idxX_hid, inh_hid }, { M680X_INS_ROL, idxX_hid, inh_hid }, { M680X_INS_DEC, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, idxX_hid, inh_hid }, { M680X_INS_TST, idxX_hid, inh_hid }, { M680X_INS_JMP, idxX_hid, inh_hid }, { M680X_INS_CLR, idxX_hid, inh_hid }, // 0x7x, extended instructions { M680X_INS_NEG, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, ext_hid, inh_hid }, { M680X_INS_LSR, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, ext_hid, inh_hid }, { M680X_INS_ASR, ext_hid, inh_hid }, { M680X_INS_ASL, ext_hid, inh_hid }, { M680X_INS_ROL, ext_hid, inh_hid }, { M680X_INS_DEC, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, ext_hid, inh_hid }, { M680X_INS_TST, ext_hid, inh_hid }, { M680X_INS_JMP, ext_hid, inh_hid }, { M680X_INS_CLR, ext_hid, inh_hid }, // 0x8x, immediate instructions with Register A,X,S { M680X_INS_SUBA, imm8_hid, inh_hid }, { M680X_INS_CMPA, imm8_hid, inh_hid }, { M680X_INS_SBCA, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDA, imm8_hid, inh_hid }, { M680X_INS_BITA, imm8_hid, inh_hid }, { M680X_INS_LDAA, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_EORA, imm8_hid, inh_hid }, { M680X_INS_ADCA, imm8_hid, inh_hid }, { M680X_INS_ORAA, imm8_hid, inh_hid }, { M680X_INS_ADDA, imm8_hid, inh_hid }, { M680X_INS_CPX, imm16_hid, inh_hid }, { M680X_INS_BSR, rel8_hid, inh_hid }, { M680X_INS_LDS, imm16_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, // 0x9x, direct instructions with register A,X,S { M680X_INS_SUBA, dir_hid, inh_hid }, { M680X_INS_CMPA, dir_hid, inh_hid }, { M680X_INS_SBCA, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDA, dir_hid, inh_hid }, { M680X_INS_BITA, dir_hid, inh_hid }, { M680X_INS_LDAA, dir_hid, inh_hid }, { M680X_INS_STAA, dir_hid, inh_hid }, { M680X_INS_EORA, dir_hid, inh_hid }, { M680X_INS_ADCA, dir_hid, inh_hid }, { M680X_INS_ORAA, dir_hid, inh_hid }, { M680X_INS_ADDA, dir_hid, inh_hid }, { M680X_INS_CPX, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LDS, dir_hid, inh_hid }, { M680X_INS_STS, dir_hid, inh_hid }, // 0xAx, indexed instructions with Register A,X { M680X_INS_SUBA, idxX_hid, inh_hid }, { M680X_INS_CMPA, idxX_hid, inh_hid }, { M680X_INS_SBCA, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDA, idxX_hid, inh_hid }, { M680X_INS_BITA, idxX_hid, inh_hid }, { M680X_INS_LDAA, idxX_hid, inh_hid }, { M680X_INS_STAA, idxX_hid, inh_hid }, { M680X_INS_EORA, idxX_hid, inh_hid }, { M680X_INS_ADCA, idxX_hid, inh_hid }, { M680X_INS_ORAA, idxX_hid, inh_hid }, { M680X_INS_ADDA, idxX_hid, inh_hid }, { M680X_INS_CPX, idxX_hid, inh_hid }, { M680X_INS_JSR, idxX_hid, inh_hid }, { M680X_INS_LDS, idxX_hid, inh_hid }, { M680X_INS_STS, idxX_hid, inh_hid }, // 0xBx, extended instructions with register A,X,S { M680X_INS_SUBA, ext_hid, inh_hid }, { M680X_INS_CMPA, ext_hid, inh_hid }, { M680X_INS_SBCA, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDA, ext_hid, inh_hid }, { M680X_INS_BITA, ext_hid, inh_hid }, { M680X_INS_LDAA, ext_hid, inh_hid }, { M680X_INS_STAA, ext_hid, inh_hid }, { M680X_INS_EORA, ext_hid, inh_hid }, { M680X_INS_ADCA, ext_hid, inh_hid }, { M680X_INS_ORAA, ext_hid, inh_hid }, { M680X_INS_ADDA, ext_hid, inh_hid }, { M680X_INS_CPX, ext_hid, inh_hid }, { M680X_INS_JSR, ext_hid, inh_hid }, { M680X_INS_LDS, ext_hid, inh_hid }, { M680X_INS_STS, ext_hid, inh_hid }, // 0xCx, immediate instructions with register B,X { M680X_INS_SUBB, imm8_hid, inh_hid }, { M680X_INS_CMPB, imm8_hid, inh_hid }, { M680X_INS_SBCB, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDB, imm8_hid, inh_hid }, { M680X_INS_BITB, imm8_hid, inh_hid }, { M680X_INS_LDAB, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_EORB, imm8_hid, inh_hid }, { M680X_INS_ADCB, imm8_hid, inh_hid }, { M680X_INS_ORAB, imm8_hid, inh_hid }, { M680X_INS_ADDB, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LDX, imm16_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, // 0xDx direct instructions with register B,X { M680X_INS_SUBB, dir_hid, inh_hid }, { M680X_INS_CMPB, dir_hid, inh_hid }, { M680X_INS_SBCB, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDB, dir_hid, inh_hid }, { M680X_INS_BITB, dir_hid, inh_hid }, { M680X_INS_LDAB, dir_hid, inh_hid }, { M680X_INS_STAB, dir_hid, inh_hid }, { M680X_INS_EORB, dir_hid, inh_hid }, { M680X_INS_ADCB, dir_hid, inh_hid }, { M680X_INS_ORAB, dir_hid, inh_hid }, { M680X_INS_ADDB, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LDX, dir_hid, inh_hid }, { M680X_INS_STX, dir_hid, inh_hid }, // 0xEx, indexed instruction with register B,X { M680X_INS_SUBB, idxX_hid, inh_hid }, { M680X_INS_CMPB, idxX_hid, inh_hid }, { M680X_INS_SBCB, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDB, idxX_hid, inh_hid }, { M680X_INS_BITB, idxX_hid, inh_hid }, { M680X_INS_LDAB, idxX_hid, inh_hid }, { M680X_INS_STAB, idxX_hid, inh_hid }, { M680X_INS_EORB, idxX_hid, inh_hid }, { M680X_INS_ADCB, idxX_hid, inh_hid }, { M680X_INS_ORAB, idxX_hid, inh_hid }, { M680X_INS_ADDB, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LDX, idxX_hid, inh_hid }, { M680X_INS_STX, idxX_hid, inh_hid }, // 0xFx, extended instructions with register B,U { M680X_INS_SUBB, ext_hid, inh_hid }, { M680X_INS_CMPB, ext_hid, inh_hid }, { M680X_INS_SBCB, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDB, ext_hid, inh_hid }, { M680X_INS_BITB, ext_hid, inh_hid }, { M680X_INS_LDAB, ext_hid, inh_hid }, { M680X_INS_STAB, ext_hid, inh_hid }, { M680X_INS_EORB, ext_hid, inh_hid }, { M680X_INS_ADCB, ext_hid, inh_hid }, { M680X_INS_ORAB, ext_hid, inh_hid }, { M680X_INS_ADDB, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LDX, ext_hid, inh_hid }, { M680X_INS_STX, ext_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/m6801.inc010066400017500001750000000031401363402546700172350ustar0000000000000000 // Additional instructions only supported on M6801/3 static const inst_pageX g_m6801_inst_overlay_table[] = { // 0x0x, inherent instructions { 0x04, M680X_INS_LSRD, inh_hid, inh_hid }, { 0x05, M680X_INS_ASLD, inh_hid, inh_hid }, // 0x2x, relative branch instructions { 0x21, M680X_INS_BRN, rel8_hid, inh_hid }, // 0x3x, inherent instructions { 0x38, M680X_INS_PULX, inh_hid, inh_hid }, { 0x3A, M680X_INS_ABX, inh_hid, inh_hid }, { 0x3C, M680X_INS_PSHX, inh_hid, inh_hid }, { 0x3D, M680X_INS_MUL, inh_hid, inh_hid }, // 0x8x, immediate instructions with Register D { 0x83, M680X_INS_SUBD, imm16_hid, inh_hid }, // 0x9x, direct instructions with register D { 0x93, M680X_INS_SUBD, dir_hid, inh_hid }, { 0x9D, M680X_INS_JSR, dir_hid, inh_hid }, // 0xAx, indexed instructions with Register D { 0xA3, M680X_INS_SUBD, idxX_hid, inh_hid }, // 0xBx, extended instructions with register D { 0xB3, M680X_INS_SUBD, ext_hid, inh_hid }, // 0xCx, immediate instructions with register D { 0xC3, M680X_INS_ADDD, imm16_hid, inh_hid }, { 0xCC, M680X_INS_LDD, imm16_hid, inh_hid }, // 0xDx direct instructions with register D { 0xD3, M680X_INS_ADDD, dir_hid, inh_hid }, { 0xDC, M680X_INS_LDD, dir_hid, inh_hid }, { 0xDD, M680X_INS_STD, dir_hid, inh_hid }, // 0xEx, indexed instruction with register D { 0xE3, M680X_INS_ADDD, idxX_hid, inh_hid }, { 0xEC, M680X_INS_LDD, idxX_hid, inh_hid }, { 0xED, M680X_INS_STD, idxX_hid, inh_hid }, // 0xFx, extended instructions with register D { 0xF3, M680X_INS_ADDD, ext_hid, inh_hid }, { 0xFC, M680X_INS_LDD, ext_hid, inh_hid }, { 0xFD, M680X_INS_STD, ext_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/m6805.inc010066400017500001750000000253721363402546700172540ustar0000000000000000 // M68HC05 instructions static const inst_page1 g_m6805_inst_page1_table[256] = { // 0x0x, bit manipulation instructions { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, { M680X_INS_BRSET, opidxdr_hid, inh_hid }, { M680X_INS_BRCLR, opidxdr_hid, inh_hid }, // 0x1x, bit set/clear instructions { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, { M680X_INS_BCLR, opidx_hid, dir_hid }, { M680X_INS_BSET, opidx_hid, dir_hid }, // 0x2x, relative branch instructions { M680X_INS_BRA, rel8_hid, inh_hid }, { M680X_INS_BRN, rel8_hid, inh_hid }, { M680X_INS_BHI, rel8_hid, inh_hid }, { M680X_INS_BLS, rel8_hid, inh_hid }, { M680X_INS_BCC, rel8_hid, inh_hid }, { M680X_INS_BCS, rel8_hid, inh_hid }, { M680X_INS_BNE, rel8_hid, inh_hid }, { M680X_INS_BEQ, rel8_hid, inh_hid }, { M680X_INS_BHCC, rel8_hid, inh_hid }, { M680X_INS_BHCS, rel8_hid, inh_hid }, { M680X_INS_BPL, rel8_hid, inh_hid }, { M680X_INS_BMI, rel8_hid, inh_hid }, { M680X_INS_BMC, rel8_hid, inh_hid }, { M680X_INS_BMS, rel8_hid, inh_hid }, { M680X_INS_BIL, rel8_hid, inh_hid }, { M680X_INS_BIH, rel8_hid, inh_hid }, // 0x3x, direct instructions { M680X_INS_NEG, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, dir_hid, inh_hid }, { M680X_INS_LSR, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, dir_hid, inh_hid }, { M680X_INS_ASR, dir_hid, inh_hid }, { M680X_INS_LSL, dir_hid, inh_hid }, { M680X_INS_ROL, dir_hid, inh_hid }, { M680X_INS_DEC, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, dir_hid, inh_hid }, { M680X_INS_TST, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLR, dir_hid, inh_hid }, // 0x4x, inherent instructions { M680X_INS_NEGA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_MUL, inh_hid, inh_hid }, { M680X_INS_COMA, inh_hid, inh_hid }, { M680X_INS_LSRA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RORA, inh_hid, inh_hid }, { M680X_INS_ASRA, inh_hid, inh_hid }, { M680X_INS_LSLA, inh_hid, inh_hid }, { M680X_INS_ROLA, inh_hid, inh_hid }, { M680X_INS_DECA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INCA, inh_hid, inh_hid }, { M680X_INS_TSTA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLRA, inh_hid, inh_hid }, // 0x5x, inherent instructions { M680X_INS_NEGX, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COMX, inh_hid, inh_hid }, { M680X_INS_LSRX, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RORX, inh_hid, inh_hid }, { M680X_INS_ASRX, inh_hid, inh_hid }, { M680X_INS_LSLX, inh_hid, inh_hid }, { M680X_INS_ROLX, inh_hid, inh_hid }, { M680X_INS_DECX, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INCX, inh_hid, inh_hid }, { M680X_INS_TSTX, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLRX, inh_hid, inh_hid }, // 0x6x, indexed, 1 byte offset instructions { M680X_INS_NEG, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, idxX_hid, inh_hid }, { M680X_INS_LSR, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, idxX_hid, inh_hid }, { M680X_INS_ASR, idxX_hid, inh_hid }, { M680X_INS_LSL, idxX_hid, inh_hid }, { M680X_INS_ROL, idxX_hid, inh_hid }, { M680X_INS_DEC, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, idxX_hid, inh_hid }, { M680X_INS_TST, idxX_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLR, idxX_hid, inh_hid }, // 0x7x, indexed, no offset instructions { M680X_INS_NEG, idxX0_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, idxX0_hid, inh_hid }, { M680X_INS_LSR, idxX0_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, idxX0_hid, inh_hid }, { M680X_INS_ASR, idxX0_hid, inh_hid }, { M680X_INS_LSL, idxX0_hid, inh_hid }, { M680X_INS_ROL, idxX0_hid, inh_hid }, { M680X_INS_DEC, idxX0_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, idxX0_hid, inh_hid }, { M680X_INS_TST, idxX0_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLR, idxX0_hid, inh_hid }, // 0x8x, inherent instructions { M680X_INS_RTI, inh_hid, inh_hid }, { M680X_INS_RTS, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_SWI, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_STOP, inh_hid, inh_hid }, { M680X_INS_WAIT, inh_hid, inh_hid }, // 0x9x, inherent instructions { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_TAX, inh_hid, inh_hid }, { M680X_INS_CLC, inh_hid, inh_hid }, { M680X_INS_SEC, inh_hid, inh_hid }, { M680X_INS_CLI, inh_hid, inh_hid }, { M680X_INS_SEI, inh_hid, inh_hid }, { M680X_INS_RSP, inh_hid, inh_hid }, { M680X_INS_NOP, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_TXA, inh_hid, inh_hid }, // 0xAx, immediate instructions with reg. A { M680X_INS_SUB, imm8_hid, inh_hid }, { M680X_INS_CMP, imm8_hid, inh_hid }, { M680X_INS_SBC, imm8_hid, inh_hid }, { M680X_INS_CPX, imm8_hid, inh_hid }, { M680X_INS_AND, imm8_hid, inh_hid }, { M680X_INS_BIT, imm8_hid, inh_hid }, { M680X_INS_LDA, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_EOR, imm8_hid, inh_hid }, { M680X_INS_ADC, imm8_hid, inh_hid }, { M680X_INS_ORA, imm8_hid, inh_hid }, { M680X_INS_ADD, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_BSR, rel8_hid, inh_hid }, { M680X_INS_LDX, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, // 0xBx, direct instructions with reg. A { M680X_INS_SUB, dir_hid, inh_hid }, { M680X_INS_CMP, dir_hid, inh_hid }, { M680X_INS_SBC, dir_hid, inh_hid }, { M680X_INS_CPX, dir_hid, inh_hid }, { M680X_INS_AND, dir_hid, inh_hid }, { M680X_INS_BIT, dir_hid, inh_hid }, { M680X_INS_LDA, dir_hid, inh_hid }, { M680X_INS_STA, dir_hid, inh_hid }, { M680X_INS_EOR, dir_hid, inh_hid }, { M680X_INS_ADC, dir_hid, inh_hid }, { M680X_INS_ORA, dir_hid, inh_hid }, { M680X_INS_ADD, dir_hid, inh_hid }, { M680X_INS_JMP, dir_hid, inh_hid }, { M680X_INS_JSR, dir_hid, inh_hid }, { M680X_INS_LDX, dir_hid, inh_hid }, { M680X_INS_STX, dir_hid, inh_hid }, // 0xCx, extended instructions with reg. A { M680X_INS_SUB, ext_hid, inh_hid }, { M680X_INS_CMP, ext_hid, inh_hid }, { M680X_INS_SBC, ext_hid, inh_hid }, { M680X_INS_CPX, ext_hid, inh_hid }, { M680X_INS_AND, ext_hid, inh_hid }, { M680X_INS_BIT, ext_hid, inh_hid }, { M680X_INS_LDA, ext_hid, inh_hid }, { M680X_INS_STA, ext_hid, inh_hid }, { M680X_INS_EOR, ext_hid, inh_hid }, { M680X_INS_ADC, ext_hid, inh_hid }, { M680X_INS_ORA, ext_hid, inh_hid }, { M680X_INS_ADD, ext_hid, inh_hid }, { M680X_INS_JMP, ext_hid, inh_hid }, { M680X_INS_JSR, ext_hid, inh_hid }, { M680X_INS_LDX, ext_hid, inh_hid }, { M680X_INS_STX, ext_hid, inh_hid }, // 0xDx, indexed with 2 byte offset instructions with reg. A { M680X_INS_SUB, idxX16_hid, inh_hid }, { M680X_INS_CMP, idxX16_hid, inh_hid }, { M680X_INS_SBC, idxX16_hid, inh_hid }, { M680X_INS_CPX, idxX16_hid, inh_hid }, { M680X_INS_AND, idxX16_hid, inh_hid }, { M680X_INS_BIT, idxX16_hid, inh_hid }, { M680X_INS_LDA, idxX16_hid, inh_hid }, { M680X_INS_STA, idxX16_hid, inh_hid }, { M680X_INS_EOR, idxX16_hid, inh_hid }, { M680X_INS_ADC, idxX16_hid, inh_hid }, { M680X_INS_ORA, idxX16_hid, inh_hid }, { M680X_INS_ADD, idxX16_hid, inh_hid }, { M680X_INS_JMP, idxX16_hid, inh_hid }, { M680X_INS_JSR, idxX16_hid, inh_hid }, { M680X_INS_LDX, idxX16_hid, inh_hid }, { M680X_INS_STX, idxX16_hid, inh_hid }, // 0xEx, indexed with 1 byte offset instructions with reg. A { M680X_INS_SUB, idxX_hid, inh_hid }, { M680X_INS_CMP, idxX_hid, inh_hid }, { M680X_INS_SBC, idxX_hid, inh_hid }, { M680X_INS_CPX, idxX_hid, inh_hid }, { M680X_INS_AND, idxX_hid, inh_hid }, { M680X_INS_BIT, idxX_hid, inh_hid }, { M680X_INS_LDA, idxX_hid, inh_hid }, { M680X_INS_STA, idxX_hid, inh_hid }, { M680X_INS_EOR, idxX_hid, inh_hid }, { M680X_INS_ADC, idxX_hid, inh_hid }, { M680X_INS_ORA, idxX_hid, inh_hid }, { M680X_INS_ADD, idxX_hid, inh_hid }, { M680X_INS_JMP, idxX_hid, inh_hid }, { M680X_INS_JSR, idxX_hid, inh_hid }, { M680X_INS_LDX, idxX_hid, inh_hid }, { M680X_INS_STX, idxX_hid, inh_hid }, // 0xFx, indexed without offset instructions with reg. A { M680X_INS_SUB, idxX0_hid, inh_hid }, { M680X_INS_CMP, idxX0_hid, inh_hid }, { M680X_INS_SBC, idxX0_hid, inh_hid }, { M680X_INS_CPX, idxX0_hid, inh_hid }, { M680X_INS_AND, idxX0_hid, inh_hid }, { M680X_INS_BIT, idxX0_hid, inh_hid }, { M680X_INS_LDA, idxX0_hid, inh_hid }, { M680X_INS_STA, idxX0_hid, inh_hid }, { M680X_INS_EOR, idxX0_hid, inh_hid }, { M680X_INS_ADC, idxX0_hid, inh_hid }, { M680X_INS_ORA, idxX0_hid, inh_hid }, { M680X_INS_ADD, idxX0_hid, inh_hid }, { M680X_INS_JMP, idxX0_hid, inh_hid }, { M680X_INS_JSR, idxX0_hid, inh_hid }, { M680X_INS_LDX, idxX0_hid, inh_hid }, { M680X_INS_STX, idxX0_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/m6808.inc010066400017500001750000000075761363402546700172650ustar0000000000000000 // Additional instructions only supported on M68HC08 static const inst_pageX g_m6808_inst_overlay_table[] = { { 0x31, M680X_INS_CBEQ, dir_hid, rel8_hid }, { 0x35, M680X_INS_STHX, dir_hid, inh_hid }, { 0x3b, M680X_INS_DBNZ, dir_hid, rel8_hid }, { 0x41, M680X_INS_CBEQA, imm8rel_hid, inh_hid }, { 0x45, M680X_INS_LDHX, imm16_hid, inh_hid }, { 0x4b, M680X_INS_DBNZA, rel8_hid, inh_hid }, { 0x4e, M680X_INS_MOV, dir_hid, dir_hid }, { 0x51, M680X_INS_CBEQX, imm8rel_hid, inh_hid }, { 0x52, M680X_INS_DIV, inh_hid, inh_hid }, { 0x55, M680X_INS_LDHX, dir_hid, inh_hid }, { 0x5b, M680X_INS_DBNZX, rel8_hid, inh_hid }, { 0x5e, M680X_INS_MOV, dir_hid, idxX0p_hid }, { 0x61, M680X_INS_CBEQ, idxXp_hid, rel8_hid }, { 0x62, M680X_INS_NSA, inh_hid, inh_hid }, { 0x65, M680X_INS_CPHX, imm16_hid, inh_hid }, { 0x6b, M680X_INS_DBNZ, idxX_hid, rel8_hid }, { 0x6e, M680X_INS_MOV, imm8_hid, dir_hid }, { 0x71, M680X_INS_CBEQ, idxX0p_hid, rel8_hid }, { 0x72, M680X_INS_DAA, inh_hid, inh_hid }, { 0x75, M680X_INS_CPHX, dir_hid, inh_hid }, { 0x7b, M680X_INS_DBNZ, idxX0_hid, rel8_hid }, { 0x7e, M680X_INS_MOV, idxX0p_hid, dir_hid }, { 0x84, M680X_INS_TAP, inh_hid, inh_hid }, { 0x85, M680X_INS_TPA, inh_hid, inh_hid }, { 0x86, M680X_INS_PULA, inh_hid, inh_hid }, { 0x87, M680X_INS_PSHA, inh_hid, inh_hid }, { 0x88, M680X_INS_PULX, inh_hid, inh_hid }, { 0x89, M680X_INS_PSHX, inh_hid, inh_hid }, { 0x8a, M680X_INS_PULH, inh_hid, inh_hid }, { 0x8b, M680X_INS_PSHH, inh_hid, inh_hid }, { 0x8c, M680X_INS_CLRH, inh_hid, inh_hid }, { 0x90, M680X_INS_BGE, rel8_hid, inh_hid }, { 0x91, M680X_INS_BLT, rel8_hid, inh_hid }, { 0x92, M680X_INS_BGT, rel8_hid, inh_hid }, { 0x93, M680X_INS_BLE, rel8_hid, inh_hid }, { 0x94, M680X_INS_TXS, inh_hid, inh_hid }, { 0x95, M680X_INS_TSX, inh_hid, inh_hid }, { 0x97, M680X_INS_TAX, inh_hid, inh_hid }, { 0x9f, M680X_INS_TXA, inh_hid, inh_hid }, { 0xa7, M680X_INS_AIS, imm8_hid, inh_hid }, { 0xaf, M680X_INS_AIX, imm8_hid, inh_hid }, }; // M68HC08 PAGE2 instructions (prefix 0x9E) static const inst_pageX g_m6808_inst_page2_table[] = { { 0x60, M680X_INS_NEG, idxS_hid, inh_hid }, { 0x61, M680X_INS_CBEQ, idxS_hid, rel8_hid }, { 0x63, M680X_INS_COM, idxS_hid, inh_hid }, { 0x64, M680X_INS_LSR, idxS_hid, inh_hid }, { 0x66, M680X_INS_ROR, idxS_hid, inh_hid }, { 0x67, M680X_INS_ASR, idxS_hid, inh_hid }, { 0x68, M680X_INS_LSL, idxS_hid, inh_hid }, { 0x69, M680X_INS_ROL, idxS_hid, inh_hid }, { 0x6a, M680X_INS_DEC, idxS_hid, inh_hid }, { 0x6b, M680X_INS_DBNZ, idxS_hid, rel8_hid }, { 0x6c, M680X_INS_INC, idxS_hid, inh_hid }, { 0x6d, M680X_INS_TST, idxS_hid, inh_hid }, { 0x6f, M680X_INS_CLR, idxS_hid, inh_hid }, { 0xd0, M680X_INS_SUB, idxS16_hid, inh_hid }, { 0xd1, M680X_INS_CMP, idxS16_hid, inh_hid }, { 0xd2, M680X_INS_SBC, idxS16_hid, inh_hid }, { 0xd3, M680X_INS_CPX, idxS16_hid, inh_hid }, { 0xd4, M680X_INS_AND, idxS16_hid, inh_hid }, { 0xd5, M680X_INS_BIT, idxS16_hid, inh_hid }, { 0xd6, M680X_INS_LDA, idxS16_hid, inh_hid }, { 0xd7, M680X_INS_STA, idxS16_hid, inh_hid }, { 0xd8, M680X_INS_EOR, idxS16_hid, inh_hid }, { 0xd9, M680X_INS_ADC, idxS16_hid, inh_hid }, { 0xda, M680X_INS_ORA, idxS16_hid, inh_hid }, { 0xdb, M680X_INS_ADD, idxS16_hid, inh_hid }, { 0xde, M680X_INS_LDX, idxS16_hid, inh_hid }, { 0xdf, M680X_INS_STX, idxS16_hid, inh_hid }, { 0xe0, M680X_INS_SUB, idxS_hid, inh_hid }, { 0xe1, M680X_INS_CMP, idxS_hid, inh_hid }, { 0xe2, M680X_INS_SBC, idxS_hid, inh_hid }, { 0xe3, M680X_INS_CPX, idxS_hid, inh_hid }, { 0xe4, M680X_INS_AND, idxS_hid, inh_hid }, { 0xe5, M680X_INS_BIT, idxS_hid, inh_hid }, { 0xe6, M680X_INS_LDA, idxS_hid, inh_hid }, { 0xe7, M680X_INS_STA, idxS_hid, inh_hid }, { 0xe8, M680X_INS_EOR, idxS_hid, inh_hid }, { 0xe9, M680X_INS_ADC, idxS_hid, inh_hid }, { 0xea, M680X_INS_ORA, idxS_hid, inh_hid }, { 0xeb, M680X_INS_ADD, idxS_hid, inh_hid }, { 0xee, M680X_INS_LDX, idxS_hid, inh_hid }, { 0xef, M680X_INS_STX, idxS_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/m6809.inc010066400017500001750000000335071363402546700172570ustar0000000000000000 // M6809/HD6309 PAGE1 instructions static const inst_page1 g_m6809_inst_page1_table[256] = { // 0x0x, direct instructions { M680X_INS_NEG, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, dir_hid, inh_hid }, { M680X_INS_LSR, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, dir_hid, inh_hid }, { M680X_INS_ASR, dir_hid, inh_hid }, { M680X_INS_LSL, dir_hid, inh_hid }, { M680X_INS_ROL, dir_hid, inh_hid }, { M680X_INS_DEC, dir_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, dir_hid, inh_hid }, { M680X_INS_TST, dir_hid, inh_hid }, { M680X_INS_JMP, dir_hid, inh_hid }, { M680X_INS_CLR, dir_hid, inh_hid }, // 0x1x, misc instructions { M680X_INS_ILLGL, illgl_hid, inh_hid }, // PAGE2 { M680X_INS_ILLGL, illgl_hid, inh_hid }, // PAGE3 { M680X_INS_NOP, inh_hid, inh_hid }, { M680X_INS_SYNC, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LBRA, rel16_hid, inh_hid }, { M680X_INS_LBSR, rel16_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_DAA, inh_hid, inh_hid }, { M680X_INS_ORCC, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ANDCC, imm8_hid, inh_hid }, { M680X_INS_SEX, inh_hid, inh_hid }, { M680X_INS_EXG, rr09_hid, inh_hid }, { M680X_INS_TFR, rr09_hid, inh_hid }, // 0x2x, relative branch instructions { M680X_INS_BRA, rel8_hid, inh_hid }, { M680X_INS_BRN, rel8_hid, inh_hid }, { M680X_INS_BHI, rel8_hid, inh_hid }, { M680X_INS_BLS, rel8_hid, inh_hid }, { M680X_INS_BCC, rel8_hid, inh_hid }, { M680X_INS_BCS, rel8_hid, inh_hid }, { M680X_INS_BNE, rel8_hid, inh_hid }, { M680X_INS_BEQ, rel8_hid, inh_hid }, { M680X_INS_BVC, rel8_hid, inh_hid }, { M680X_INS_BVS, rel8_hid, inh_hid }, { M680X_INS_BPL, rel8_hid, inh_hid }, { M680X_INS_BMI, rel8_hid, inh_hid }, { M680X_INS_BGE, rel8_hid, inh_hid }, { M680X_INS_BLT, rel8_hid, inh_hid }, { M680X_INS_BGT, rel8_hid, inh_hid }, { M680X_INS_BLE, rel8_hid, inh_hid }, // 0x3x, misc instructions { M680X_INS_LEAX, idx09_hid, inh_hid }, { M680X_INS_LEAY, idx09_hid, inh_hid }, { M680X_INS_LEAS, idx09_hid, inh_hid }, { M680X_INS_LEAU, idx09_hid, inh_hid }, { M680X_INS_PSHS, rbits_hid, inh_hid }, { M680X_INS_PULS, rbits_hid, inh_hid }, { M680X_INS_PSHU, rbits_hid, inh_hid }, { M680X_INS_PULU, rbits_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RTS, inh_hid, inh_hid }, { M680X_INS_ABX, inh_hid, inh_hid }, { M680X_INS_RTI, inh_hid, inh_hid }, { M680X_INS_CWAI, imm8_hid, inh_hid }, { M680X_INS_MUL, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_SWI, inh_hid, inh_hid }, // 0x4x, Register A instructions { M680X_INS_NEGA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COMA, inh_hid, inh_hid }, { M680X_INS_LSRA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RORA, inh_hid, inh_hid }, { M680X_INS_ASRA, inh_hid, inh_hid }, { M680X_INS_LSLA, inh_hid, inh_hid }, { M680X_INS_ROLA, inh_hid, inh_hid }, { M680X_INS_DECA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INCA, inh_hid, inh_hid }, { M680X_INS_TSTA, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLRA, inh_hid, inh_hid }, // 0x5x, Register B instructions { M680X_INS_NEGB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COMB, inh_hid, inh_hid }, { M680X_INS_LSRB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_RORB, inh_hid, inh_hid }, { M680X_INS_ASRB, inh_hid, inh_hid }, { M680X_INS_LSLB, inh_hid, inh_hid }, { M680X_INS_ROLB, inh_hid, inh_hid }, { M680X_INS_DECB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INCB, inh_hid, inh_hid }, { M680X_INS_TSTB, inh_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_CLRB, inh_hid, inh_hid }, // 0x6x, indexed instructions { M680X_INS_NEG, idx09_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, idx09_hid, inh_hid }, { M680X_INS_LSR, idx09_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, idx09_hid, inh_hid }, { M680X_INS_ASR, idx09_hid, inh_hid }, { M680X_INS_LSL, idx09_hid, inh_hid }, { M680X_INS_ROL, idx09_hid, inh_hid }, { M680X_INS_DEC, idx09_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, idx09_hid, inh_hid }, { M680X_INS_TST, idx09_hid, inh_hid }, { M680X_INS_JMP, idx09_hid, inh_hid }, { M680X_INS_CLR, idx09_hid, inh_hid }, // 0x7x, extended instructions { M680X_INS_NEG, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_COM, ext_hid, inh_hid }, { M680X_INS_LSR, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_ROR, ext_hid, inh_hid }, { M680X_INS_ASR, ext_hid, inh_hid }, { M680X_INS_LSL, ext_hid, inh_hid }, { M680X_INS_ROL, ext_hid, inh_hid }, { M680X_INS_DEC, ext_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_INC, ext_hid, inh_hid }, { M680X_INS_TST, ext_hid, inh_hid }, { M680X_INS_JMP, ext_hid, inh_hid }, { M680X_INS_CLR, ext_hid, inh_hid }, // 0x8x, immediate instructions with Register A,D,X { M680X_INS_SUBA, imm8_hid, inh_hid }, { M680X_INS_CMPA, imm8_hid, inh_hid }, { M680X_INS_SBCA, imm8_hid, inh_hid }, { M680X_INS_SUBD, imm16_hid, inh_hid }, { M680X_INS_ANDA, imm8_hid, inh_hid }, { M680X_INS_BITA, imm8_hid, inh_hid }, { M680X_INS_LDA, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_EORA, imm8_hid, inh_hid }, { M680X_INS_ADCA, imm8_hid, inh_hid }, { M680X_INS_ORA, imm8_hid, inh_hid }, { M680X_INS_ADDA, imm8_hid, inh_hid }, { M680X_INS_CMPX, imm16_hid, inh_hid }, { M680X_INS_BSR, rel8_hid, inh_hid }, { M680X_INS_LDX, imm16_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, // 0x9x, direct instructions with register A,D,X { M680X_INS_SUBA, dir_hid, inh_hid }, { M680X_INS_CMPA, dir_hid, inh_hid }, { M680X_INS_SBCA, dir_hid, inh_hid }, { M680X_INS_SUBD, dir_hid, inh_hid }, { M680X_INS_ANDA, dir_hid, inh_hid }, { M680X_INS_BITA, dir_hid, inh_hid }, { M680X_INS_LDA, dir_hid, inh_hid }, { M680X_INS_STA, dir_hid, inh_hid }, { M680X_INS_EORA, dir_hid, inh_hid }, { M680X_INS_ADCA, dir_hid, inh_hid }, { M680X_INS_ORA, dir_hid, inh_hid }, { M680X_INS_ADDA, dir_hid, inh_hid }, { M680X_INS_CMPX, dir_hid, inh_hid }, { M680X_INS_JSR, dir_hid, inh_hid }, { M680X_INS_LDX, dir_hid, inh_hid }, { M680X_INS_STX, dir_hid, inh_hid }, // 0xAx, indexed instructions with Register A,D,X { M680X_INS_SUBA, idx09_hid, inh_hid }, { M680X_INS_CMPA, idx09_hid, inh_hid }, { M680X_INS_SBCA, idx09_hid, inh_hid }, { M680X_INS_SUBD, idx09_hid, inh_hid }, { M680X_INS_ANDA, idx09_hid, inh_hid }, { M680X_INS_BITA, idx09_hid, inh_hid }, { M680X_INS_LDA, idx09_hid, inh_hid }, { M680X_INS_STA, idx09_hid, inh_hid }, { M680X_INS_EORA, idx09_hid, inh_hid }, { M680X_INS_ADCA, idx09_hid, inh_hid }, { M680X_INS_ORA, idx09_hid, inh_hid }, { M680X_INS_ADDA, idx09_hid, inh_hid }, { M680X_INS_CMPX, idx09_hid, inh_hid }, { M680X_INS_JSR, idx09_hid, inh_hid }, { M680X_INS_LDX, idx09_hid, inh_hid }, { M680X_INS_STX, idx09_hid, inh_hid }, // 0xBx, extended instructions with register A,D,X { M680X_INS_SUBA, ext_hid, inh_hid }, { M680X_INS_CMPA, ext_hid, inh_hid }, { M680X_INS_SBCA, ext_hid, inh_hid }, { M680X_INS_SUBD, ext_hid, inh_hid }, { M680X_INS_ANDA, ext_hid, inh_hid }, { M680X_INS_BITA, ext_hid, inh_hid }, { M680X_INS_LDA, ext_hid, inh_hid }, { M680X_INS_STA, ext_hid, inh_hid }, { M680X_INS_EORA, ext_hid, inh_hid }, { M680X_INS_ADCA, ext_hid, inh_hid }, { M680X_INS_ORA, ext_hid, inh_hid }, { M680X_INS_ADDA, ext_hid, inh_hid }, { M680X_INS_CMPX, ext_hid, inh_hid }, { M680X_INS_JSR, ext_hid, inh_hid }, { M680X_INS_LDX, ext_hid, inh_hid }, { M680X_INS_STX, ext_hid, inh_hid }, // 0xCx, immediate instructions with register B,D,U { M680X_INS_SUBB, imm8_hid, inh_hid }, { M680X_INS_CMPB, imm8_hid, inh_hid }, { M680X_INS_SBCB, imm8_hid, inh_hid }, { M680X_INS_ADDD, imm16_hid, inh_hid }, { M680X_INS_ANDB, imm8_hid, inh_hid }, { M680X_INS_BITB, imm8_hid, inh_hid }, { M680X_INS_LDB, imm8_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_EORB, imm8_hid, inh_hid }, { M680X_INS_ADCB, imm8_hid, inh_hid }, { M680X_INS_ORB, imm8_hid, inh_hid }, { M680X_INS_ADDB, imm8_hid, inh_hid }, { M680X_INS_LDD, imm16_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, { M680X_INS_LDU, imm16_hid, inh_hid }, { M680X_INS_ILLGL, illgl_hid, inh_hid }, // 0xDx direct instructions with register B,D,U { M680X_INS_SUBB, dir_hid, inh_hid }, { M680X_INS_CMPB, dir_hid, inh_hid }, { M680X_INS_SBCB, dir_hid, inh_hid }, { M680X_INS_ADDD, dir_hid, inh_hid }, { M680X_INS_ANDB, dir_hid, inh_hid }, { M680X_INS_BITB, dir_hid, inh_hid }, { M680X_INS_LDB, dir_hid, inh_hid }, { M680X_INS_STB, dir_hid, inh_hid }, { M680X_INS_EORB, dir_hid, inh_hid }, { M680X_INS_ADCB, dir_hid, inh_hid }, { M680X_INS_ORB, dir_hid, inh_hid }, { M680X_INS_ADDB, dir_hid, inh_hid }, { M680X_INS_LDD, dir_hid, inh_hid }, { M680X_INS_STD, dir_hid, inh_hid }, { M680X_INS_LDU, dir_hid, inh_hid }, { M680X_INS_STU, dir_hid, inh_hid }, // 0xEx, indexed instruction with register B,D,U { M680X_INS_SUBB, idx09_hid, inh_hid }, { M680X_INS_CMPB, idx09_hid, inh_hid }, { M680X_INS_SBCB, idx09_hid, inh_hid }, { M680X_INS_ADDD, idx09_hid, inh_hid }, { M680X_INS_ANDB, idx09_hid, inh_hid }, { M680X_INS_BITB, idx09_hid, inh_hid }, { M680X_INS_LDB, idx09_hid, inh_hid }, { M680X_INS_STB, idx09_hid, inh_hid }, { M680X_INS_EORB, idx09_hid, inh_hid }, { M680X_INS_ADCB, idx09_hid, inh_hid }, { M680X_INS_ORB, idx09_hid, inh_hid }, { M680X_INS_ADDB, idx09_hid, inh_hid }, { M680X_INS_LDD, idx09_hid, inh_hid }, { M680X_INS_STD, idx09_hid, inh_hid }, { M680X_INS_LDU, idx09_hid, inh_hid }, { M680X_INS_STU, idx09_hid, inh_hid }, // 0xFx, extended instructions with register B,D,U { M680X_INS_SUBB, ext_hid, inh_hid }, { M680X_INS_CMPB, ext_hid, inh_hid }, { M680X_INS_SBCB, ext_hid, inh_hid }, { M680X_INS_ADDD, ext_hid, inh_hid }, { M680X_INS_ANDB, ext_hid, inh_hid }, { M680X_INS_BITB, ext_hid, inh_hid }, { M680X_INS_LDB, ext_hid, inh_hid }, { M680X_INS_STB, ext_hid, inh_hid }, { M680X_INS_EORB, ext_hid, inh_hid }, { M680X_INS_ADCB, ext_hid, inh_hid }, { M680X_INS_ORB, ext_hid, inh_hid }, { M680X_INS_ADDB, ext_hid, inh_hid }, { M680X_INS_LDD, ext_hid, inh_hid }, { M680X_INS_STD, ext_hid, inh_hid }, { M680X_INS_LDU, ext_hid, inh_hid }, { M680X_INS_STU, ext_hid, inh_hid }, }; // The following array has to be sorted by increasing // opcodes. Otherwise the binary_search will fail. // // M6809 PAGE2 instructions (with prefix 0x10) static const inst_pageX g_m6809_inst_page2_table[] = { // 0x2x, relative long branch instructions { 0x21, M680X_INS_LBRN, rel16_hid, inh_hid }, { 0x22, M680X_INS_LBHI, rel16_hid, inh_hid }, { 0x23, M680X_INS_LBLS, rel16_hid, inh_hid }, { 0x24, M680X_INS_LBCC, rel16_hid, inh_hid }, { 0x25, M680X_INS_LBCS, rel16_hid, inh_hid }, { 0x26, M680X_INS_LBNE, rel16_hid, inh_hid }, { 0x27, M680X_INS_LBEQ, rel16_hid, inh_hid }, { 0x28, M680X_INS_LBVC, rel16_hid, inh_hid }, { 0x29, M680X_INS_LBVS, rel16_hid, inh_hid }, { 0x2a, M680X_INS_LBPL, rel16_hid, inh_hid }, { 0x2b, M680X_INS_LBMI, rel16_hid, inh_hid }, { 0x2c, M680X_INS_LBGE, rel16_hid, inh_hid }, { 0x2d, M680X_INS_LBLT, rel16_hid, inh_hid }, { 0x2e, M680X_INS_LBGT, rel16_hid, inh_hid }, { 0x2f, M680X_INS_LBLE, rel16_hid, inh_hid }, // 0x3x { 0x3f, M680X_INS_SWI2, inh_hid, inh_hid }, // 0x8x, immediate instructions with register D,Y { 0x83, M680X_INS_CMPD, imm16_hid, inh_hid }, { 0x8c, M680X_INS_CMPY, imm16_hid, inh_hid }, { 0x8e, M680X_INS_LDY, imm16_hid, inh_hid }, // 0x9x, direct instructions with register D,Y { 0x93, M680X_INS_CMPD, dir_hid, inh_hid }, { 0x9c, M680X_INS_CMPY, dir_hid, inh_hid }, { 0x9e, M680X_INS_LDY, dir_hid, inh_hid }, { 0x9f, M680X_INS_STY, dir_hid, inh_hid }, // 0xAx, indexed instructions with register D,Y { 0xa3, M680X_INS_CMPD, idx09_hid, inh_hid }, { 0xac, M680X_INS_CMPY, idx09_hid, inh_hid }, { 0xae, M680X_INS_LDY, idx09_hid, inh_hid }, { 0xaf, M680X_INS_STY, idx09_hid, inh_hid }, // 0xBx, extended instructions with register D,Y { 0xb3, M680X_INS_CMPD, ext_hid, inh_hid }, { 0xbc, M680X_INS_CMPY, ext_hid, inh_hid }, { 0xbe, M680X_INS_LDY, ext_hid, inh_hid }, { 0xbf, M680X_INS_STY, ext_hid, inh_hid }, // 0xCx, immediate instructions with register S { 0xce, M680X_INS_LDS, imm16_hid, inh_hid }, // 0xDx, direct instructions with register S { 0xde, M680X_INS_LDS, dir_hid, inh_hid }, { 0xdf, M680X_INS_STS, dir_hid, inh_hid }, // 0xEx, indexed instructions with register S { 0xee, M680X_INS_LDS, idx09_hid, inh_hid }, { 0xef, M680X_INS_STS, idx09_hid, inh_hid }, // 0xFx, extended instructions with register S { 0xfe, M680X_INS_LDS, ext_hid, inh_hid }, { 0xff, M680X_INS_STS, ext_hid, inh_hid }, }; // The following array has to be sorted by increasing // opcodes. Otherwise the binary_search will fail. // // M6809 PAGE3 instructions (with prefix 0x11) static const inst_pageX g_m6809_inst_page3_table[] = { { 0x3f, M680X_INS_SWI3, inh_hid, inh_hid }, // 0x8x, immediate instructions with register U,S { 0x83, M680X_INS_CMPU, imm16_hid, inh_hid }, { 0x8c, M680X_INS_CMPS, imm16_hid, inh_hid }, // 0x9x, direct instructions with register U,S { 0x93, M680X_INS_CMPU, dir_hid, inh_hid }, { 0x9c, M680X_INS_CMPS, dir_hid, inh_hid }, // 0xAx, indexed instructions with register U,S { 0xa3, M680X_INS_CMPU, idx09_hid, inh_hid }, { 0xac, M680X_INS_CMPS, idx09_hid, inh_hid }, // 0xBx, extended instructions with register U,S { 0xb3, M680X_INS_CMPU, ext_hid, inh_hid }, { 0xbc, M680X_INS_CMPS, ext_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M680X/m6811.inc010066400017500001750000000104601363402546700172410ustar0000000000000000 // Additional instructions only supported on M68HC11 static const inst_pageX g_m6811_inst_overlay_table[] = { { 0x00, M680X_INS_TEST, inh_hid, inh_hid }, { 0x02, M680X_INS_IDIV, inh_hid, inh_hid }, { 0x03, M680X_INS_FDIV, inh_hid, inh_hid }, { 0x12, M680X_INS_BRSET, dir_hid, imm8rel_hid }, { 0x13, M680X_INS_BRCLR, dir_hid, imm8rel_hid }, { 0x14, M680X_INS_BSET, dir_hid, imm8_hid }, { 0x15, M680X_INS_BCLR, dir_hid, imm8_hid }, { 0x1c, M680X_INS_BSET, idxX_hid, imm8_hid }, { 0x1d, M680X_INS_BCLR, idxX_hid, imm8_hid }, { 0x1e, M680X_INS_BRSET, idxX_hid, imm8rel_hid }, { 0x1f, M680X_INS_BRCLR, idxX_hid, imm8rel_hid }, { 0x8f, M680X_INS_XGDX, inh_hid, inh_hid }, { 0xcf, M680X_INS_STOP, inh_hid, inh_hid }, }; // M68HC11 PAGE2 instructions static const inst_pageX g_m6811_inst_page2_table[] = { { 0x08, M680X_INS_INY, inh_hid, inh_hid }, { 0x09, M680X_INS_DEY, inh_hid, inh_hid }, { 0x1c, M680X_INS_BSET, idxY_hid, imm8_hid }, { 0x1d, M680X_INS_BCLR, idxY_hid, imm8_hid }, { 0x1e, M680X_INS_BRSET, idxY_hid, imm8rel_hid }, { 0x1f, M680X_INS_BRCLR, idxY_hid, imm8rel_hid }, { 0x30, M680X_INS_TSY, inh_hid, inh_hid }, { 0x35, M680X_INS_TYS, inh_hid, inh_hid }, { 0x38, M680X_INS_PULY, inh_hid, inh_hid }, { 0x3a, M680X_INS_ABY, inh_hid, inh_hid }, { 0x3c, M680X_INS_PSHY, inh_hid, inh_hid }, { 0x60, M680X_INS_NEG, idxY_hid, inh_hid }, { 0x63, M680X_INS_COM, idxY_hid, inh_hid }, { 0x64, M680X_INS_LSR, idxY_hid, inh_hid }, { 0x66, M680X_INS_ROR, idxY_hid, inh_hid }, { 0x67, M680X_INS_ASR, idxY_hid, inh_hid }, { 0x68, M680X_INS_ASL, idxY_hid, inh_hid }, { 0x69, M680X_INS_ROL, idxY_hid, inh_hid }, { 0x6a, M680X_INS_DEC, idxY_hid, inh_hid }, { 0x6c, M680X_INS_INC, idxY_hid, inh_hid }, { 0x6d, M680X_INS_TST, idxY_hid, inh_hid }, { 0x6e, M680X_INS_JMP, idxY_hid, inh_hid }, { 0x6f, M680X_INS_CLR, idxY_hid, inh_hid }, { 0x8c, M680X_INS_CPY, imm16_hid, inh_hid }, { 0x8f, M680X_INS_XGDY, inh_hid, inh_hid }, { 0x9c, M680X_INS_CPY, dir_hid, inh_hid }, { 0xa0, M680X_INS_SUBA, idxY_hid, inh_hid }, { 0xa1, M680X_INS_CMPA, idxY_hid, inh_hid }, { 0xa2, M680X_INS_SBCA, idxY_hid, inh_hid }, { 0xa3, M680X_INS_SUBD, idxY_hid, inh_hid }, { 0xa4, M680X_INS_ANDA, idxY_hid, inh_hid }, { 0xa5, M680X_INS_BITA, idxY_hid, inh_hid }, { 0xa6, M680X_INS_LDAA, idxY_hid, inh_hid }, { 0xa7, M680X_INS_STAA, idxY_hid, inh_hid }, { 0xa8, M680X_INS_EORA, idxY_hid, inh_hid }, { 0xa9, M680X_INS_ADCA, idxY_hid, inh_hid }, { 0xaa, M680X_INS_ORAA, idxY_hid, inh_hid }, { 0xab, M680X_INS_ADDA, idxY_hid, inh_hid }, { 0xac, M680X_INS_CPY, idxY_hid, inh_hid }, { 0xad, M680X_INS_JSR, idxY_hid, inh_hid }, { 0xae, M680X_INS_LDS, idxY_hid, inh_hid }, { 0xaf, M680X_INS_STS, idxY_hid, inh_hid }, { 0xbc, M680X_INS_CPY, ext_hid, inh_hid }, { 0xce, M680X_INS_LDY, imm16_hid, inh_hid }, { 0xde, M680X_INS_LDY, dir_hid, inh_hid }, { 0xdf, M680X_INS_STY, dir_hid, inh_hid }, { 0xe0, M680X_INS_SUBB, idxY_hid, inh_hid }, { 0xe1, M680X_INS_CMPB, idxY_hid, inh_hid }, { 0xe2, M680X_INS_SBCB, idxY_hid, inh_hid }, { 0xe3, M680X_INS_ADDD, idxY_hid, inh_hid }, { 0xe4, M680X_INS_ANDB, idxY_hid, inh_hid }, { 0xe5, M680X_INS_BITB, idxY_hid, inh_hid }, { 0xe6, M680X_INS_LDAB, idxY_hid, inh_hid }, { 0xe7, M680X_INS_STAB, idxY_hid, inh_hid }, { 0xe8, M680X_INS_EORB, idxY_hid, inh_hid }, { 0xe9, M680X_INS_ADCB, idxY_hid, inh_hid }, { 0xea, M680X_INS_ORAB, idxY_hid, inh_hid }, { 0xeb, M680X_INS_ADDB, idxY_hid, inh_hid }, { 0xec, M680X_INS_LDD, idxY_hid, inh_hid }, { 0xed, M680X_INS_STD, idxY_hid, inh_hid }, { 0xee, M680X_INS_LDY, idxY_hid, inh_hid }, { 0xef, M680X_INS_STY, idxY_hid, inh_hid }, { 0xfe, M680X_INS_LDY, ext_hid, inh_hid }, { 0xff, M680X_INS_STY, ext_hid, inh_hid }, }; // M68HC11 PAGE3 instructions static const inst_pageX g_m6811_inst_page3_table[] = { { 0x83, M680X_INS_CPD, imm16_hid, inh_hid }, { 0x93, M680X_INS_CPD, dir_hid, inh_hid }, { 0xa3, M680X_INS_CPD, idxX_hid, inh_hid }, { 0xac, M680X_INS_CPY, idxX_hid, inh_hid }, { 0xb3, M680X_INS_CPD, ext_hid, inh_hid }, { 0xee, M680X_INS_LDY, idxX_hid, inh_hid }, { 0xef, M680X_INS_STY, idxX_hid, inh_hid }, }; // M68HC11 PAGE4 instructions static const inst_pageX g_m6811_inst_page4_table[] = { { 0xa3, M680X_INS_CPD, idxY_hid, inh_hid }, { 0xac, M680X_INS_CPX, idxY_hid, inh_hid }, { 0xee, M680X_INS_LDX, idxY_hid, inh_hid }, { 0xef, M680X_INS_STX, idxY_hid, inh_hid }, }; capstone-sys-0.11.0/capstone/arch/M68K/M68KDisassembler.c010066400017500001750000002540241363402546700210720ustar0000000000000000/* ======================================================================== */ /* ========================= LICENSING & COPYRIGHT ======================== */ /* ======================================================================== */ /* * MUSASHI * Version 3.4 * * A portable Motorola M680x0 processor emulation engine. * Copyright 1998-2001 Karl Stenerud. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ /* The code below is based on MUSASHI but has been heavily modified for Capstone by * Daniel Collin 2015-2019 */ /* ======================================================================== */ /* ================================ INCLUDES ============================== */ /* ======================================================================== */ #include #include #include #include "../../cs_priv.h" #include "../../utils.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCRegisterInfo.h" #include "M68KInstPrinter.h" #include "M68KDisassembler.h" /* ======================================================================== */ /* ============================ GENERAL DEFINES =========================== */ /* ======================================================================== */ /* Bit Isolation Functions */ #define BIT_0(A) ((A) & 0x00000001) #define BIT_1(A) ((A) & 0x00000002) #define BIT_2(A) ((A) & 0x00000004) #define BIT_3(A) ((A) & 0x00000008) #define BIT_4(A) ((A) & 0x00000010) #define BIT_5(A) ((A) & 0x00000020) #define BIT_6(A) ((A) & 0x00000040) #define BIT_7(A) ((A) & 0x00000080) #define BIT_8(A) ((A) & 0x00000100) #define BIT_9(A) ((A) & 0x00000200) #define BIT_A(A) ((A) & 0x00000400) #define BIT_B(A) ((A) & 0x00000800) #define BIT_C(A) ((A) & 0x00001000) #define BIT_D(A) ((A) & 0x00002000) #define BIT_E(A) ((A) & 0x00004000) #define BIT_F(A) ((A) & 0x00008000) #define BIT_10(A) ((A) & 0x00010000) #define BIT_11(A) ((A) & 0x00020000) #define BIT_12(A) ((A) & 0x00040000) #define BIT_13(A) ((A) & 0x00080000) #define BIT_14(A) ((A) & 0x00100000) #define BIT_15(A) ((A) & 0x00200000) #define BIT_16(A) ((A) & 0x00400000) #define BIT_17(A) ((A) & 0x00800000) #define BIT_18(A) ((A) & 0x01000000) #define BIT_19(A) ((A) & 0x02000000) #define BIT_1A(A) ((A) & 0x04000000) #define BIT_1B(A) ((A) & 0x08000000) #define BIT_1C(A) ((A) & 0x10000000) #define BIT_1D(A) ((A) & 0x20000000) #define BIT_1E(A) ((A) & 0x40000000) #define BIT_1F(A) ((A) & 0x80000000) /* These are the CPU types understood by this disassembler */ #define TYPE_68000 1 #define TYPE_68010 2 #define TYPE_68020 4 #define TYPE_68030 8 #define TYPE_68040 16 #define M68000_ONLY TYPE_68000 #define M68010_ONLY TYPE_68010 #define M68010_LESS (TYPE_68000 | TYPE_68010) #define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040) #define M68020_ONLY TYPE_68020 #define M68020_LESS (TYPE_68010 | TYPE_68020) #define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040) #define M68030_ONLY TYPE_68030 #define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030) #define M68030_PLUS (TYPE_68030 | TYPE_68040) #define M68040_PLUS TYPE_68040 enum { M68K_CPU_TYPE_INVALID, M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68010, M68K_CPU_TYPE_68EC020, M68K_CPU_TYPE_68020, M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */ M68K_CPU_TYPE_68040 /* Supported by disassembler ONLY */ }; /* Extension word formats */ #define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff) #define EXT_FULL(A) BIT_8(A) #define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0) #define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A)) #define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A)) #define EXT_INDEX_REGISTER(A) (((A)>>12)&7) #define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3) #define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0) #define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4) #define EXT_INDEX_SCALE(A) (((A)>>9)&3) #define EXT_INDEX_LONG(A) BIT_B(A) #define EXT_INDEX_AR(A) BIT_F(A) #define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10) #define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20) #define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30) #define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44) #define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44) #define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44) #define IS_BITSET(val,b) ((val) & (1 << (b))) #define BITFIELD_MASK(sb,eb) (((1 << ((sb) + 1))-1) & (~((1 << (eb))-1))) #define BITFIELD(val,sb,eb) ((BITFIELD_MASK(sb,eb) & (val)) >> (eb)) /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// static unsigned int m68k_read_disassembler_16(const m68k_info *info, const uint64_t addr) { const uint16_t v0 = info->code[addr + 0]; const uint16_t v1 = info->code[addr + 1]; return (v0 << 8) | v1; } static unsigned int m68k_read_disassembler_32(const m68k_info *info, const uint64_t addr) { const uint32_t v0 = info->code[addr + 0]; const uint32_t v1 = info->code[addr + 1]; const uint32_t v2 = info->code[addr + 2]; const uint32_t v3 = info->code[addr + 3]; return (v0 << 24) | (v1 << 16) | (v2 << 8) | v3; } static uint64_t m68k_read_disassembler_64(const m68k_info *info, const uint64_t addr) { const uint64_t v0 = info->code[addr + 0]; const uint64_t v1 = info->code[addr + 1]; const uint64_t v2 = info->code[addr + 2]; const uint64_t v3 = info->code[addr + 3]; const uint64_t v4 = info->code[addr + 4]; const uint64_t v5 = info->code[addr + 5]; const uint64_t v6 = info->code[addr + 6]; const uint64_t v7 = info->code[addr + 7]; return (v0 << 56) | (v1 << 48) | (v2 << 40) | (v3 << 32) | (v4 << 24) | (v5 << 16) | (v6 << 8) | v7; } static unsigned int m68k_read_safe_16(const m68k_info *info, const uint64_t address) { const uint64_t addr = (address - info->baseAddress) & info->address_mask; if (info->code_len < addr + 2) { return 0xaaaa; } return m68k_read_disassembler_16(info, addr); } static unsigned int m68k_read_safe_32(const m68k_info *info, const uint64_t address) { const uint64_t addr = (address - info->baseAddress) & info->address_mask; if (info->code_len < addr + 4) { return 0xaaaaaaaa; } return m68k_read_disassembler_32(info, addr); } static uint64_t m68k_read_safe_64(const m68k_info *info, const uint64_t address) { const uint64_t addr = (address - info->baseAddress) & info->address_mask; if (info->code_len < addr + 8) { return 0xaaaaaaaaaaaaaaaaLL; } return m68k_read_disassembler_64(info, addr); } /* ======================================================================== */ /* =============================== PROTOTYPES ============================= */ /* ======================================================================== */ /* make signed integers 100% portably */ static int make_int_8(int value); static int make_int_16(int value); /* Stuff to build the opcode handler jump table */ static void d68000_invalid(m68k_info *info); static int instruction_is_valid(m68k_info *info, const unsigned int word_check); typedef struct { void (*instruction)(m68k_info *info); /* handler function */ uint16_t word2_mask; /* mask the 2nd word */ uint16_t word2_match; /* what to match after masking */ } instruction_struct; /* ======================================================================== */ /* ================================= DATA ================================= */ /* ======================================================================== */ static instruction_struct g_instruction_table[0x10000]; /* used by ops like asr, ror, addq, etc */ static uint32_t g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7}; static uint32_t g_5bit_data_table[32] = { 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }; static m68k_insn s_branch_lut[] = { M68K_INS_INVALID, M68K_INS_INVALID, M68K_INS_BHI, M68K_INS_BLS, M68K_INS_BCC, M68K_INS_BCS, M68K_INS_BNE, M68K_INS_BEQ, M68K_INS_BVC, M68K_INS_BVS, M68K_INS_BPL, M68K_INS_BMI, M68K_INS_BGE, M68K_INS_BLT, M68K_INS_BGT, M68K_INS_BLE, }; static m68k_insn s_dbcc_lut[] = { M68K_INS_DBT, M68K_INS_DBF, M68K_INS_DBHI, M68K_INS_DBLS, M68K_INS_DBCC, M68K_INS_DBCS, M68K_INS_DBNE, M68K_INS_DBEQ, M68K_INS_DBVC, M68K_INS_DBVS, M68K_INS_DBPL, M68K_INS_DBMI, M68K_INS_DBGE, M68K_INS_DBLT, M68K_INS_DBGT, M68K_INS_DBLE, }; static m68k_insn s_scc_lut[] = { M68K_INS_ST, M68K_INS_SF, M68K_INS_SHI, M68K_INS_SLS, M68K_INS_SCC, M68K_INS_SCS, M68K_INS_SNE, M68K_INS_SEQ, M68K_INS_SVC, M68K_INS_SVS, M68K_INS_SPL, M68K_INS_SMI, M68K_INS_SGE, M68K_INS_SLT, M68K_INS_SGT, M68K_INS_SLE, }; static m68k_insn s_trap_lut[] = { M68K_INS_TRAPT, M68K_INS_TRAPF, M68K_INS_TRAPHI, M68K_INS_TRAPLS, M68K_INS_TRAPCC, M68K_INS_TRAPCS, M68K_INS_TRAPNE, M68K_INS_TRAPEQ, M68K_INS_TRAPVC, M68K_INS_TRAPVS, M68K_INS_TRAPPL, M68K_INS_TRAPMI, M68K_INS_TRAPGE, M68K_INS_TRAPLT, M68K_INS_TRAPGT, M68K_INS_TRAPLE, }; /* ======================================================================== */ /* =========================== UTILITY FUNCTIONS ========================== */ /* ======================================================================== */ #define LIMIT_CPU_TYPES(info, ALLOWED_CPU_TYPES) \ do { \ if (!(info->type & ALLOWED_CPU_TYPES)) { \ d68000_invalid(info); \ return; \ } \ } while (0) static unsigned int peek_imm_8(const m68k_info *info) { return (m68k_read_safe_16((info), (info)->pc)&0xff); } static unsigned int peek_imm_16(const m68k_info *info) { return m68k_read_safe_16((info), (info)->pc); } static unsigned int peek_imm_32(const m68k_info *info) { return m68k_read_safe_32((info), (info)->pc); } static unsigned long long peek_imm_64(const m68k_info *info) { return m68k_read_safe_64((info), (info)->pc); } static unsigned int read_imm_8(m68k_info *info) { const unsigned int value = peek_imm_8(info); (info)->pc+=2; return value; } static unsigned int read_imm_16(m68k_info *info) { const unsigned int value = peek_imm_16(info); (info)->pc+=2; return value; } static unsigned int read_imm_32(m68k_info *info) { const unsigned int value = peek_imm_32(info); (info)->pc+=4; return value; } static unsigned long long read_imm_64(m68k_info *info) { const unsigned long long value = peek_imm_64(info); (info)->pc+=8; return value; } /* Fake a split interface */ #define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0) #define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1) #define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2) #define get_imm_str_s8() get_imm_str_s(0) #define get_imm_str_s16() get_imm_str_s(1) #define get_imm_str_s32() get_imm_str_s(2) #define get_imm_str_u8() get_imm_str_u(0) #define get_imm_str_u16() get_imm_str_u(1) #define get_imm_str_u32() get_imm_str_u(2) /* 100% portable signed int generators */ static int make_int_8(int value) { return (value & 0x80) ? value | ~0xff : value & 0xff; } static int make_int_16(int value) { return (value & 0x8000) ? value | ~0xffff : value & 0xffff; } static void get_with_index_address_mode(m68k_info *info, cs_m68k_op* op, uint32_t instruction, uint32_t size, bool is_pc) { uint32_t extension = read_imm_16(info); op->address_mode = M68K_AM_AREGI_INDEX_BASE_DISP; if (EXT_FULL(extension)) { uint32_t preindex; uint32_t postindex; op->mem.base_reg = M68K_REG_INVALID; op->mem.index_reg = M68K_REG_INVALID; /* Not sure how to deal with this? if (EXT_EFFECTIVE_ZERO(extension)) { strcpy(mode, "0"); break; } */ op->mem.in_disp = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32(info) : read_imm_16(info)) : 0; op->mem.out_disp = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32(info) : read_imm_16(info)) : 0; if (EXT_BASE_REGISTER_PRESENT(extension)) { if (is_pc) { op->mem.base_reg = M68K_REG_PC; } else { op->mem.base_reg = M68K_REG_A0 + (instruction & 7); } } if (EXT_INDEX_REGISTER_PRESENT(extension)) { if (EXT_INDEX_AR(extension)) { op->mem.index_reg = M68K_REG_A0 + EXT_INDEX_REGISTER(extension); } else { op->mem.index_reg = M68K_REG_D0 + EXT_INDEX_REGISTER(extension); } op->mem.index_size = EXT_INDEX_LONG(extension) ? 1 : 0; if (EXT_INDEX_SCALE(extension)) { op->mem.scale = 1 << EXT_INDEX_SCALE(extension); } } preindex = (extension & 7) > 0 && (extension & 7) < 4; postindex = (extension & 7) > 4; if (preindex) { op->address_mode = is_pc ? M68K_AM_PC_MEMI_PRE_INDEX : M68K_AM_MEMI_PRE_INDEX; } else if (postindex) { op->address_mode = is_pc ? M68K_AM_PC_MEMI_POST_INDEX : M68K_AM_MEMI_POST_INDEX; } return; } op->mem.index_reg = (EXT_INDEX_AR(extension) ? M68K_REG_A0 : M68K_REG_D0) + EXT_INDEX_REGISTER(extension); op->mem.index_size = EXT_INDEX_LONG(extension) ? 1 : 0; if (EXT_8BIT_DISPLACEMENT(extension) == 0) { if (is_pc) { op->mem.base_reg = M68K_REG_PC; op->address_mode = M68K_AM_PCI_INDEX_BASE_DISP; } else { op->mem.base_reg = M68K_REG_A0 + (instruction & 7); } } else { if (is_pc) { op->mem.base_reg = M68K_REG_PC; op->address_mode = M68K_AM_PCI_INDEX_8_BIT_DISP; } else { op->mem.base_reg = M68K_REG_A0 + (instruction & 7); op->address_mode = M68K_AM_AREGI_INDEX_8_BIT_DISP; } op->mem.disp = (int8_t)(extension & 0xff); } if (EXT_INDEX_SCALE(extension)) { op->mem.scale = 1 << EXT_INDEX_SCALE(extension); } } /* Make string of effective address mode */ static void get_ea_mode_op(m68k_info *info, cs_m68k_op* op, uint32_t instruction, uint32_t size) { // default to memory op->type = M68K_OP_MEM; switch (instruction & 0x3f) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: /* data register direct */ op->address_mode = M68K_AM_REG_DIRECT_DATA; op->reg = M68K_REG_D0 + (instruction & 7); op->type = M68K_OP_REG; break; case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: /* address register direct */ op->address_mode = M68K_AM_REG_DIRECT_ADDR; op->reg = M68K_REG_A0 + (instruction & 7); op->type = M68K_OP_REG; break; case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: /* address register indirect */ op->address_mode = M68K_AM_REGI_ADDR; op->reg = M68K_REG_A0 + (instruction & 7); break; case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: /* address register indirect with postincrement */ op->address_mode = M68K_AM_REGI_ADDR_POST_INC; op->reg = M68K_REG_A0 + (instruction & 7); break; case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: /* address register indirect with predecrement */ op->address_mode = M68K_AM_REGI_ADDR_PRE_DEC; op->reg = M68K_REG_A0 + (instruction & 7); break; case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: /* address register indirect with displacement*/ op->address_mode = M68K_AM_REGI_ADDR_DISP; op->mem.base_reg = M68K_REG_A0 + (instruction & 7); op->mem.disp = (int16_t)read_imm_16(info); break; case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: /* address register indirect with index */ get_with_index_address_mode(info, op, instruction, size, false); break; case 0x38: /* absolute short address */ op->address_mode = M68K_AM_ABSOLUTE_DATA_SHORT; op->imm = read_imm_16(info); break; case 0x39: /* absolute long address */ op->address_mode = M68K_AM_ABSOLUTE_DATA_LONG; op->imm = read_imm_32(info); break; case 0x3a: /* program counter with displacement */ op->address_mode = M68K_AM_PCI_DISP; op->mem.disp = (int16_t)read_imm_16(info); break; case 0x3b: /* program counter with index */ get_with_index_address_mode(info, op, instruction, size, true); break; case 0x3c: op->address_mode = M68K_AM_IMMEDIATE; op->type = M68K_OP_IMM; if (size == 1) op->imm = read_imm_8(info) & 0xff; else if (size == 2) op->imm = read_imm_16(info) & 0xffff; else if (size == 4) op->imm = read_imm_32(info); else op->imm = read_imm_64(info); break; default: break; } } static void set_insn_group(m68k_info *info, m68k_group_type group) { info->groups[info->groups_count++] = (uint8_t)group; } static cs_m68k* build_init_op(m68k_info *info, int opcode, int count, int size) { cs_m68k* ext; MCInst_setOpcode(info->inst, opcode); ext = &info->extension; ext->op_count = (uint8_t)count; ext->op_size.type = M68K_SIZE_TYPE_CPU; ext->op_size.cpu_size = size; return ext; } static void build_re_gen_1(m68k_info *info, bool isDreg, int opcode, uint8_t size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; if (isDreg) { op0->address_mode = M68K_AM_REG_DIRECT_DATA; op0->reg = M68K_REG_D0 + ((info->ir >> 9 ) & 7); } else { op0->address_mode = M68K_AM_REG_DIRECT_ADDR; op0->reg = M68K_REG_A0 + ((info->ir >> 9 ) & 7); } get_ea_mode_op(info, op1, info->ir, size); } static void build_re_1(m68k_info *info, int opcode, uint8_t size) { build_re_gen_1(info, true, opcode, size); } static void build_er_gen_1(m68k_info *info, bool isDreg, int opcode, uint8_t size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, size); if (isDreg) { op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); } else { op1->address_mode = M68K_AM_REG_DIRECT_ADDR; op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7); } } static void build_rr(m68k_info *info, int opcode, uint8_t size, int imm) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k_op* op2; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op2 = &ext->operands[2]; op0->address_mode = M68K_AM_REG_DIRECT_DATA; op0->reg = M68K_REG_D0 + (info->ir & 7); op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); if (imm > 0) { ext->op_count = 3; op2->type = M68K_OP_IMM; op2->address_mode = M68K_AM_IMMEDIATE; op2->imm = imm; } } static void build_r(m68k_info *info, int opcode, uint8_t size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_REG_DIRECT_DATA; op0->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + (info->ir & 7); } static void build_imm_ea(m68k_info *info, int opcode, uint8_t size, int imm) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->type = M68K_OP_IMM; op0->address_mode = M68K_AM_IMMEDIATE; op0->imm = imm; get_ea_mode_op(info, op1, info->ir, size); } static void build_3bit_d(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->type = M68K_OP_IMM; op0->address_mode = M68K_AM_IMMEDIATE; op0->imm = g_3bit_qdata_table[(info->ir >> 9) & 7]; op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + (info->ir & 7); } static void build_3bit_ea(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->type = M68K_OP_IMM; op0->address_mode = M68K_AM_IMMEDIATE; op0->imm = g_3bit_qdata_table[(info->ir >> 9) & 7]; get_ea_mode_op(info, op1, info->ir, size); } static void build_mm(m68k_info *info, int opcode, uint8_t size, int imm) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k_op* op2; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op2 = &ext->operands[2]; op0->address_mode = M68K_AM_REGI_ADDR_PRE_DEC; op0->reg = M68K_REG_A0 + (info->ir & 7); op1->address_mode = M68K_AM_REGI_ADDR_PRE_DEC; op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7); if (imm > 0) { ext->op_count = 3; op2->type = M68K_OP_IMM; op2->address_mode = M68K_AM_IMMEDIATE; op2->imm = imm; } } static void build_ea(m68k_info *info, int opcode, uint8_t size) { cs_m68k* ext = build_init_op(info, opcode, 1, size); get_ea_mode_op(info, &ext->operands[0], info->ir, size); } static void build_ea_a(m68k_info *info, int opcode, uint8_t size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, size); op1->address_mode = M68K_AM_REG_DIRECT_ADDR; op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7); } static void build_ea_ea(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, size); get_ea_mode_op(info, op1, (((info->ir>>9) & 7) | ((info->ir>>3) & 0x38)), size); } static void build_pi_pi(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_REGI_ADDR_POST_INC; op0->reg = M68K_REG_A0 + (info->ir & 7); op1->address_mode = M68K_AM_REGI_ADDR_POST_INC; op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7); } static void build_imm_special_reg(m68k_info *info, int opcode, int imm, int size, m68k_reg reg) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->type = M68K_OP_IMM; op0->address_mode = M68K_AM_IMMEDIATE; op0->imm = imm; op1->address_mode = M68K_AM_NONE; op1->reg = reg; } static void build_relative_branch(m68k_info *info, int opcode, int size, int displacement) { cs_m68k_op* op; cs_m68k* ext = build_init_op(info, opcode, 1, size); op = &ext->operands[0]; op->type = M68K_OP_BR_DISP; op->address_mode = M68K_AM_BRANCH_DISPLACEMENT; op->br_disp.disp = displacement; op->br_disp.disp_size = size; set_insn_group(info, M68K_GRP_JUMP); set_insn_group(info, M68K_GRP_BRANCH_RELATIVE); } static void build_absolute_jump_with_immediate(m68k_info *info, int opcode, int size, int immediate) { cs_m68k_op* op; cs_m68k* ext = build_init_op(info, opcode, 1, size); op = &ext->operands[0]; op->type = M68K_OP_IMM; op->address_mode = M68K_AM_IMMEDIATE; op->imm = immediate; set_insn_group(info, M68K_GRP_JUMP); } static void build_bcc(m68k_info *info, int size, int displacement) { build_relative_branch(info, s_branch_lut[(info->ir >> 8) & 0xf], size, displacement); } static void build_trap(m68k_info *info, int size, int immediate) { build_absolute_jump_with_immediate(info, s_trap_lut[(info->ir >> 8) & 0xf], size, immediate); } static void build_dbxx(m68k_info *info, int opcode, int size, int displacement) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_REG_DIRECT_DATA; op0->reg = M68K_REG_D0 + (info->ir & 7); op1->type = M68K_OP_BR_DISP; op1->address_mode = M68K_AM_BRANCH_DISPLACEMENT; op1->br_disp.disp = displacement; op1->br_disp.disp_size = M68K_OP_BR_DISP_SIZE_LONG; set_insn_group(info, M68K_GRP_JUMP); set_insn_group(info, M68K_GRP_BRANCH_RELATIVE); } static void build_dbcc(m68k_info *info, int size, int displacement) { build_dbxx(info, s_dbcc_lut[(info->ir >> 8) & 0xf], size, displacement); } static void build_d_d_ea(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k_op* op2; uint32_t extension = read_imm_16(info); cs_m68k* ext = build_init_op(info, opcode, 3, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op2 = &ext->operands[2]; op0->address_mode = M68K_AM_REG_DIRECT_DATA; op0->reg = M68K_REG_D0 + (extension & 7); op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + ((extension >> 6) & 7); get_ea_mode_op(info, op2, info->ir, size); } static void build_bitfield_ins(m68k_info *info, int opcode, int has_d_arg) { uint8_t offset; uint8_t width; cs_m68k_op* op_ea; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 1, 0); uint32_t extension = read_imm_16(info); op_ea = &ext->operands[0]; op1 = &ext->operands[1]; if (BIT_B(extension)) offset = (extension >> 6) & 7; else offset = (extension >> 6) & 31; if (BIT_5(extension)) width = extension & 7; else width = (uint8_t)g_5bit_data_table[extension & 31]; if (has_d_arg) { ext->op_count = 2; op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + ((extension >> 12) & 7); } get_ea_mode_op(info, op_ea, info->ir, 1); op_ea->mem.bitfield = 1; op_ea->mem.width = width; op_ea->mem.offset = offset; } static void build_d(m68k_info *info, int opcode, int size) { cs_m68k* ext = build_init_op(info, opcode, 1, size); cs_m68k_op* op; op = &ext->operands[0]; op->address_mode = M68K_AM_REG_DIRECT_DATA; op->reg = M68K_REG_D0 + (info->ir & 7); } static uint16_t reverse_bits(uint32_t v) { uint32_t r = v; // r will be reversed bits of v; first get LSB of v uint32_t s = 16 - 1; // extra shift needed at end for (v >>= 1; v; v >>= 1) { r <<= 1; r |= v & 1; s--; } return r <<= s; // shift when v's highest bits are zero } static uint8_t reverse_bits_8(uint32_t v) { uint32_t r = v; // r will be reversed bits of v; first get LSB of v uint32_t s = 8 - 1; // extra shift needed at end for (v >>= 1; v; v >>= 1) { r <<= 1; r |= v & 1; s--; } return r <<= s; // shift when v's highest bits are zero } static void build_movem_re(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->type = M68K_OP_REG_BITS; op0->register_bits = read_imm_16(info); get_ea_mode_op(info, op1, info->ir, size); if (op1->address_mode == M68K_AM_REGI_ADDR_PRE_DEC) op0->register_bits = reverse_bits(op0->register_bits); } static void build_movem_er(m68k_info *info, int opcode, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, opcode, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op1->type = M68K_OP_REG_BITS; op1->register_bits = read_imm_16(info); get_ea_mode_op(info, op0, info->ir, size); } static void build_imm(m68k_info *info, int opcode, int data) { cs_m68k_op* op; cs_m68k* ext = build_init_op(info, opcode, 1, 0); MCInst_setOpcode(info->inst, opcode); op = &ext->operands[0]; op->type = M68K_OP_IMM; op->address_mode = M68K_AM_IMMEDIATE; op->imm = data; } static void build_illegal(m68k_info *info, int data) { build_imm(info, M68K_INS_ILLEGAL, data); } static void build_invalid(m68k_info *info, int data) { build_imm(info, M68K_INS_INVALID, data); } static void build_cas2(m68k_info *info, int size) { uint32_t word3; uint32_t extension; cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k_op* op2; cs_m68k* ext = build_init_op(info, M68K_INS_CAS2, 3, size); int reg_0, reg_1; /* cas2 is the only 3 words instruction, word2 and word3 have the same motif bits to check */ word3 = peek_imm_32(info) & 0xffff; if (!instruction_is_valid(info, word3)) return; op0 = &ext->operands[0]; op1 = &ext->operands[1]; op2 = &ext->operands[2]; extension = read_imm_32(info); op0->address_mode = M68K_AM_NONE; op0->type = M68K_OP_REG_PAIR; op0->reg_pair.reg_0 = ((extension >> 16) & 7) + M68K_REG_D0; op0->reg_pair.reg_1 = (extension & 7) + M68K_REG_D0; op1->address_mode = M68K_AM_NONE; op1->type = M68K_OP_REG_PAIR; op1->reg_pair.reg_0 = ((extension >> 22) & 7) + M68K_REG_D0; op1->reg_pair.reg_1 = ((extension >> 6) & 7) + M68K_REG_D0; reg_0 = (extension >> 28) & 7; reg_1 = (extension >> 12) & 7; op2->address_mode = M68K_AM_NONE; op2->type = M68K_OP_REG_PAIR; op2->reg_pair.reg_0 = reg_0 + (BIT_1F(extension) ? 8 : 0) + M68K_REG_D0; op2->reg_pair.reg_1 = reg_1 + (BIT_F(extension) ? 8 : 0) + M68K_REG_D0; } static void build_chk2_cmp2(m68k_info *info, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_CHK2, 2, size); uint32_t extension = read_imm_16(info); if (BIT_B(extension)) MCInst_setOpcode(info->inst, M68K_INS_CHK2); else MCInst_setOpcode(info->inst, M68K_INS_CMP2); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, size); op1->address_mode = M68K_AM_NONE; op1->type = M68K_OP_REG; op1->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7); } static void build_move16(m68k_info *info, int data[2], int modes[2]) { cs_m68k* ext = build_init_op(info, M68K_INS_MOVE16, 2, 0); int i; for (i = 0; i < 2; ++i) { cs_m68k_op* op = &ext->operands[i]; const int d = data[i]; const int m = modes[i]; op->type = M68K_OP_MEM; if (m == M68K_AM_REGI_ADDR_POST_INC || m == M68K_AM_REG_DIRECT_ADDR) { op->address_mode = m; op->reg = M68K_REG_A0 + d; } else { op->address_mode = m; op->imm = d; } } } static void build_link(m68k_info *info, int disp, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_LINK, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_A0 + (info->ir & 7); op1->address_mode = M68K_AM_IMMEDIATE; op1->type = M68K_OP_IMM; op1->imm = disp; } static void build_cpush_cinv(m68k_info *info, int op_offset) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_INVALID, 2, 0); switch ((info->ir >> 3) & 3) { // scope // Invalid case 0: d68000_invalid(info); return; // Line case 1: MCInst_setOpcode(info->inst, op_offset + 0); break; // Page case 2: MCInst_setOpcode(info->inst, op_offset + 1); break; // All case 3: ext->op_count = 1; MCInst_setOpcode(info->inst, op_offset + 2); break; } op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_IMMEDIATE; op0->type = M68K_OP_IMM; op0->imm = (info->ir >> 6) & 3; op1->type = M68K_OP_MEM; op1->address_mode = M68K_AM_REG_DIRECT_ADDR; op1->imm = M68K_REG_A0 + (info->ir & 7); } static void build_movep_re(m68k_info *info, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVEP, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); op1->address_mode = M68K_AM_REGI_ADDR_DISP; op1->type = M68K_OP_MEM; op1->mem.base_reg = M68K_REG_A0 + (info->ir & 7); op1->mem.disp = (int16_t)read_imm_16(info); } static void build_movep_er(m68k_info *info, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVEP, 2, size); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_REGI_ADDR_DISP; op0->type = M68K_OP_MEM; op0->mem.base_reg = M68K_REG_A0 + (info->ir & 7); op0->mem.disp = (int16_t)read_imm_16(info); op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); } static void build_moves(m68k_info *info, int size) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVES, 2, size); uint32_t extension = read_imm_16(info); op0 = &ext->operands[0]; op1 = &ext->operands[1]; if (BIT_B(extension)) { op0->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7); get_ea_mode_op(info, op1, info->ir, size); } else { get_ea_mode_op(info, op0, info->ir, size); op1->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7); } } static void build_er_1(m68k_info *info, int opcode, uint8_t size) { build_er_gen_1(info, true, opcode, size); } /* ======================================================================== */ /* ========================= INSTRUCTION HANDLERS ========================= */ /* ======================================================================== */ /* Instruction handler function names follow this convention: * * d68000_NAME_EXTENSIONS(void) * where NAME is the name of the opcode it handles and EXTENSIONS are any * extensions for special instances of that opcode. * * Examples: * d68000_add_er_8(): add opcode, from effective address to register, * size = byte * * d68000_asr_s_8(): arithmetic shift right, static count, size = byte * * * Common extensions: * 8 : size = byte * 16 : size = word * 32 : size = long * rr : register to register * mm : memory to memory * r : register * s : static * er : effective address -> register * re : register -> effective address * ea : using effective address mode of operation * d : data register direct * a : address register direct * ai : address register indirect * pi : address register indirect with postincrement * pd : address register indirect with predecrement * di : address register indirect with displacement * ix : address register indirect with index * aw : absolute word * al : absolute long */ static void d68000_invalid(m68k_info *info) { build_invalid(info, info->ir); } static void d68000_illegal(m68k_info *info) { build_illegal(info, info->ir); } static void d68000_1010(m68k_info *info) { build_invalid(info, info->ir); } static void d68000_1111(m68k_info *info) { build_invalid(info, info->ir); } static void d68000_abcd_rr(m68k_info *info) { build_rr(info, M68K_INS_ABCD, 1, 0); } static void d68000_abcd_mm(m68k_info *info) { build_mm(info, M68K_INS_ABCD, 1, 0); } static void d68000_add_er_8(m68k_info *info) { build_er_1(info, M68K_INS_ADD, 1); } static void d68000_add_er_16(m68k_info *info) { build_er_1(info, M68K_INS_ADD, 2); } static void d68000_add_er_32(m68k_info *info) { build_er_1(info, M68K_INS_ADD, 4); } static void d68000_add_re_8(m68k_info *info) { build_re_1(info, M68K_INS_ADD, 1); } static void d68000_add_re_16(m68k_info *info) { build_re_1(info, M68K_INS_ADD, 2); } static void d68000_add_re_32(m68k_info *info) { build_re_1(info, M68K_INS_ADD, 4); } static void d68000_adda_16(m68k_info *info) { build_ea_a(info, M68K_INS_ADDA, 2); } static void d68000_adda_32(m68k_info *info) { build_ea_a(info, M68K_INS_ADDA, 4); } static void d68000_addi_8(m68k_info *info) { build_imm_ea(info, M68K_INS_ADDI, 1, read_imm_8(info)); } static void d68000_addi_16(m68k_info *info) { build_imm_ea(info, M68K_INS_ADDI, 2, read_imm_16(info)); } static void d68000_addi_32(m68k_info *info) { build_imm_ea(info, M68K_INS_ADDI, 4, read_imm_32(info)); } static void d68000_addq_8(m68k_info *info) { build_3bit_ea(info, M68K_INS_ADDQ, 1); } static void d68000_addq_16(m68k_info *info) { build_3bit_ea(info, M68K_INS_ADDQ, 2); } static void d68000_addq_32(m68k_info *info) { build_3bit_ea(info, M68K_INS_ADDQ, 4); } static void d68000_addx_rr_8(m68k_info *info) { build_rr(info, M68K_INS_ADDX, 1, 0); } static void d68000_addx_rr_16(m68k_info *info) { build_rr(info, M68K_INS_ADDX, 2, 0); } static void d68000_addx_rr_32(m68k_info *info) { build_rr(info, M68K_INS_ADDX, 4, 0); } static void d68000_addx_mm_8(m68k_info *info) { build_mm(info, M68K_INS_ADDX, 1, 0); } static void d68000_addx_mm_16(m68k_info *info) { build_mm(info, M68K_INS_ADDX, 2, 0); } static void d68000_addx_mm_32(m68k_info *info) { build_mm(info, M68K_INS_ADDX, 4, 0); } static void d68000_and_er_8(m68k_info *info) { build_er_1(info, M68K_INS_AND, 1); } static void d68000_and_er_16(m68k_info *info) { build_er_1(info, M68K_INS_AND, 2); } static void d68000_and_er_32(m68k_info *info) { build_er_1(info, M68K_INS_AND, 4); } static void d68000_and_re_8(m68k_info *info) { build_re_1(info, M68K_INS_AND, 1); } static void d68000_and_re_16(m68k_info *info) { build_re_1(info, M68K_INS_AND, 2); } static void d68000_and_re_32(m68k_info *info) { build_re_1(info, M68K_INS_AND, 4); } static void d68000_andi_8(m68k_info *info) { build_imm_ea(info, M68K_INS_ANDI, 1, read_imm_8(info)); } static void d68000_andi_16(m68k_info *info) { build_imm_ea(info, M68K_INS_ANDI, 2, read_imm_16(info)); } static void d68000_andi_32(m68k_info *info) { build_imm_ea(info, M68K_INS_ANDI, 4, read_imm_32(info)); } static void d68000_andi_to_ccr(m68k_info *info) { build_imm_special_reg(info, M68K_INS_ANDI, read_imm_8(info), 1, M68K_REG_CCR); } static void d68000_andi_to_sr(m68k_info *info) { build_imm_special_reg(info, M68K_INS_ANDI, read_imm_16(info), 2, M68K_REG_SR); } static void d68000_asr_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ASR, 1); } static void d68000_asr_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_ASR, 2); } static void d68000_asr_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_ASR, 4); } static void d68000_asr_r_8(m68k_info *info) { build_r(info, M68K_INS_ASR, 1); } static void d68000_asr_r_16(m68k_info *info) { build_r(info, M68K_INS_ASR, 2); } static void d68000_asr_r_32(m68k_info *info) { build_r(info, M68K_INS_ASR, 4); } static void d68000_asr_ea(m68k_info *info) { build_ea(info, M68K_INS_ASR, 2); } static void d68000_asl_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ASL, 1); } static void d68000_asl_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_ASL, 2); } static void d68000_asl_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_ASL, 4); } static void d68000_asl_r_8(m68k_info *info) { build_r(info, M68K_INS_ASL, 1); } static void d68000_asl_r_16(m68k_info *info) { build_r(info, M68K_INS_ASL, 2); } static void d68000_asl_r_32(m68k_info *info) { build_r(info, M68K_INS_ASL, 4); } static void d68000_asl_ea(m68k_info *info) { build_ea(info, M68K_INS_ASL, 2); } static void d68000_bcc_8(m68k_info *info) { build_bcc(info, 1, make_int_8(info->ir)); } static void d68000_bcc_16(m68k_info *info) { build_bcc(info, 2, make_int_16(read_imm_16(info))); } static void d68020_bcc_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bcc(info, 4, read_imm_32(info)); } static void d68000_bchg_r(m68k_info *info) { build_re_1(info, M68K_INS_BCHG, 1); } static void d68000_bchg_s(m68k_info *info) { build_imm_ea(info, M68K_INS_BCHG, 1, read_imm_8(info)); } static void d68000_bclr_r(m68k_info *info) { build_re_1(info, M68K_INS_BCLR, 1); } static void d68000_bclr_s(m68k_info *info) { build_imm_ea(info, M68K_INS_BCLR, 1, read_imm_8(info)); } static void d68010_bkpt(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_absolute_jump_with_immediate(info, M68K_INS_BKPT, 0, info->ir & 7); } static void d68020_bfchg(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFCHG, false); } static void d68020_bfclr(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFCLR, false); } static void d68020_bfexts(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFEXTS, true); } static void d68020_bfextu(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFEXTU, true); } static void d68020_bfffo(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFFFO, true); } static void d68020_bfins(m68k_info *info) { cs_m68k* ext = &info->extension; cs_m68k_op temp; LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFINS, true); // a bit hacky but we need to flip the args on only this instruction temp = ext->operands[0]; ext->operands[0] = ext->operands[1]; ext->operands[1] = temp; } static void d68020_bfset(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_bitfield_ins(info, M68K_INS_BFSET, false); } static void d68020_bftst(m68k_info *info) { build_bitfield_ins(info, M68K_INS_BFTST, false); } static void d68000_bra_8(m68k_info *info) { build_relative_branch(info, M68K_INS_BRA, 1, make_int_8(info->ir)); } static void d68000_bra_16(m68k_info *info) { build_relative_branch(info, M68K_INS_BRA, 2, make_int_16(read_imm_16(info))); } static void d68020_bra_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_relative_branch(info, M68K_INS_BRA, 4, read_imm_32(info)); } static void d68000_bset_r(m68k_info *info) { build_re_1(info, M68K_INS_BSET, 1); } static void d68000_bset_s(m68k_info *info) { build_imm_ea(info, M68K_INS_BSET, 1, read_imm_8(info)); } static void d68000_bsr_8(m68k_info *info) { build_relative_branch(info, M68K_INS_BSR, 1, make_int_8(info->ir)); } static void d68000_bsr_16(m68k_info *info) { build_relative_branch(info, M68K_INS_BSR, 2, make_int_16(read_imm_16(info))); } static void d68020_bsr_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_relative_branch(info, M68K_INS_BSR, 4, peek_imm_32(info)); } static void d68000_btst_r(m68k_info *info) { build_re_1(info, M68K_INS_BTST, 4); } static void d68000_btst_s(m68k_info *info) { build_imm_ea(info, M68K_INS_BTST, 1, read_imm_8(info)); } static void d68020_callm(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_ONLY); build_imm_ea(info, M68K_INS_CALLM, 0, read_imm_8(info)); } static void d68020_cas_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_d_d_ea(info, M68K_INS_CAS, 1); } static void d68020_cas_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_d_d_ea(info, M68K_INS_CAS, 2); } static void d68020_cas_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_d_d_ea(info, M68K_INS_CAS, 4); } static void d68020_cas2_16(m68k_info *info) { build_cas2(info, 2); } static void d68020_cas2_32(m68k_info *info) { build_cas2(info, 4); } static void d68000_chk_16(m68k_info *info) { build_er_1(info, M68K_INS_CHK, 2); } static void d68020_chk_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_er_1(info, M68K_INS_CHK, 4); } static void d68020_chk2_cmp2_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_chk2_cmp2(info, 1); } static void d68020_chk2_cmp2_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_chk2_cmp2(info, 2); } static void d68020_chk2_cmp2_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_chk2_cmp2(info, 4); } static void d68040_cinv(m68k_info *info) { LIMIT_CPU_TYPES(info, M68040_PLUS); build_cpush_cinv(info, M68K_INS_CINVL); } static void d68000_clr_8(m68k_info *info) { build_ea(info, M68K_INS_CLR, 1); } static void d68000_clr_16(m68k_info *info) { build_ea(info, M68K_INS_CLR, 2); } static void d68000_clr_32(m68k_info *info) { build_ea(info, M68K_INS_CLR, 4); } static void d68000_cmp_8(m68k_info *info) { build_er_1(info, M68K_INS_CMP, 1); } static void d68000_cmp_16(m68k_info *info) { build_er_1(info, M68K_INS_CMP, 2); } static void d68000_cmp_32(m68k_info *info) { build_er_1(info, M68K_INS_CMP, 4); } static void d68000_cmpa_16(m68k_info *info) { build_ea_a(info, M68K_INS_CMPA, 2); } static void d68000_cmpa_32(m68k_info *info) { build_ea_a(info, M68K_INS_CMPA, 4); } static void d68000_cmpi_8(m68k_info *info) { build_imm_ea(info, M68K_INS_CMPI, 1, read_imm_8(info)); } static void d68020_cmpi_pcdi_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_imm_ea(info, M68K_INS_CMPI, 1, read_imm_8(info)); } static void d68020_cmpi_pcix_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_imm_ea(info, M68K_INS_CMPI, 1, read_imm_8(info)); } static void d68000_cmpi_16(m68k_info *info) { build_imm_ea(info, M68K_INS_CMPI, 2, read_imm_16(info)); } static void d68020_cmpi_pcdi_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_imm_ea(info, M68K_INS_CMPI, 2, read_imm_16(info)); } static void d68020_cmpi_pcix_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_imm_ea(info, M68K_INS_CMPI, 2, read_imm_16(info)); } static void d68000_cmpi_32(m68k_info *info) { build_imm_ea(info, M68K_INS_CMPI, 4, read_imm_32(info)); } static void d68020_cmpi_pcdi_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_imm_ea(info, M68K_INS_CMPI, 4, read_imm_32(info)); } static void d68020_cmpi_pcix_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_imm_ea(info, M68K_INS_CMPI, 4, read_imm_32(info)); } static void d68000_cmpm_8(m68k_info *info) { build_pi_pi(info, M68K_INS_CMPM, 1); } static void d68000_cmpm_16(m68k_info *info) { build_pi_pi(info, M68K_INS_CMPM, 2); } static void d68000_cmpm_32(m68k_info *info) { build_pi_pi(info, M68K_INS_CMPM, 4); } static void make_cpbcc_operand(cs_m68k_op* op, int size, int displacement) { op->address_mode = M68K_AM_BRANCH_DISPLACEMENT; op->type = M68K_OP_BR_DISP; op->br_disp.disp = displacement; op->br_disp.disp_size = size; } static void d68020_cpbcc_16(m68k_info *info) { cs_m68k_op* op0; cs_m68k* ext; LIMIT_CPU_TYPES(info, M68020_PLUS); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (info->ir & 0x2f); ext = build_init_op(info, M68K_INS_FBF, 1, 2); op0 = &ext->operands[0]; make_cpbcc_operand(op0, M68K_OP_BR_DISP_SIZE_WORD, make_int_16(read_imm_16(info))); set_insn_group(info, M68K_GRP_JUMP); set_insn_group(info, M68K_GRP_BRANCH_RELATIVE); } static void d68020_cpbcc_32(m68k_info *info) { cs_m68k* ext; cs_m68k_op* op0; LIMIT_CPU_TYPES(info, M68020_PLUS); LIMIT_CPU_TYPES(info, M68020_PLUS); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (info->ir & 0x2f); ext = build_init_op(info, M68K_INS_FBF, 1, 4); op0 = &ext->operands[0]; make_cpbcc_operand(op0, M68K_OP_BR_DISP_SIZE_LONG, read_imm_32(info)); set_insn_group(info, M68K_GRP_JUMP); set_insn_group(info, M68K_GRP_BRANCH_RELATIVE); } static void d68020_cpdbcc(m68k_info *info) { cs_m68k* ext; cs_m68k_op* op0; cs_m68k_op* op1; uint32_t ext1, ext2; LIMIT_CPU_TYPES(info, M68020_PLUS); ext1 = read_imm_16(info); ext2 = read_imm_16(info); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (ext1 & 0x2f); ext = build_init_op(info, M68K_INS_FDBF, 2, 0); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->reg = M68K_REG_D0 + (info->ir & 7); make_cpbcc_operand(op1, M68K_OP_BR_DISP_SIZE_WORD, make_int_16(ext2) + 2); set_insn_group(info, M68K_GRP_JUMP); set_insn_group(info, M68K_GRP_BRANCH_RELATIVE); } static void fmove_fpcr(m68k_info *info, uint32_t extension) { cs_m68k_op* special; cs_m68k_op* op_ea; int regsel = (extension >> 10) & 0x7; int dir = (extension >> 13) & 0x1; cs_m68k* ext = build_init_op(info, M68K_INS_FMOVE, 2, 4); special = &ext->operands[0]; op_ea = &ext->operands[1]; if (!dir) { cs_m68k_op* t = special; special = op_ea; op_ea = t; } get_ea_mode_op(info, op_ea, info->ir, 4); if (regsel & 4) special->reg = M68K_REG_FPCR; else if (regsel & 2) special->reg = M68K_REG_FPSR; else if (regsel & 1) special->reg = M68K_REG_FPIAR; } static void fmovem(m68k_info *info, uint32_t extension) { cs_m68k_op* op_reglist; cs_m68k_op* op_ea; int dir = (extension >> 13) & 0x1; int mode = (extension >> 11) & 0x3; uint32_t reglist = extension & 0xff; cs_m68k* ext = build_init_op(info, M68K_INS_FMOVEM, 2, 0); op_reglist = &ext->operands[0]; op_ea = &ext->operands[1]; // flip args around if (!dir) { cs_m68k_op* t = op_reglist; op_reglist = op_ea; op_ea = t; } get_ea_mode_op(info, op_ea, info->ir, 0); switch (mode) { case 1 : // Dynamic list in dn register op_reglist->reg = M68K_REG_D0 + ((reglist >> 4) & 7); break; case 0 : op_reglist->address_mode = M68K_AM_NONE; op_reglist->type = M68K_OP_REG_BITS; op_reglist->register_bits = reglist << 16; break; case 2 : // Static list op_reglist->address_mode = M68K_AM_NONE; op_reglist->type = M68K_OP_REG_BITS; op_reglist->register_bits = ((uint32_t)reverse_bits_8(reglist)) << 16; break; } } static void d68020_cpgen(m68k_info *info) { cs_m68k *ext; cs_m68k_op* op0; cs_m68k_op* op1; bool supports_single_op; uint32_t next; int rm, src, dst, opmode; LIMIT_CPU_TYPES(info, M68020_PLUS); supports_single_op = true; next = read_imm_16(info); rm = (next >> 14) & 0x1; src = (next >> 10) & 0x7; dst = (next >> 7) & 0x7; opmode = next & 0x3f; // special handling for fmovecr if (BITFIELD(info->ir, 5, 0) == 0 && BITFIELD(next, 15, 10) == 0x17) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_FMOVECR, 2, 0); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_IMMEDIATE; op0->type = M68K_OP_IMM; op0->imm = next & 0x3f; op1->reg = M68K_REG_FP0 + ((next >> 7) & 7); return; } // deal with extended move stuff switch ((next >> 13) & 0x7) { // fmovem fpcr case 0x4: // FMOVEM ea, FPCR case 0x5: // FMOVEM FPCR, ea fmove_fpcr(info, next); return; // fmovem list case 0x6: case 0x7: fmovem(info, next); return; } // See comment bellow on why this is being done if ((next >> 6) & 1) opmode &= ~4; // special handling of some instructions here switch (opmode) { case 0x00: MCInst_setOpcode(info->inst, M68K_INS_FMOVE); supports_single_op = false; break; case 0x01: MCInst_setOpcode(info->inst, M68K_INS_FINT); break; case 0x02: MCInst_setOpcode(info->inst, M68K_INS_FSINH); break; case 0x03: MCInst_setOpcode(info->inst, M68K_INS_FINTRZ); break; case 0x04: MCInst_setOpcode(info->inst, M68K_INS_FSQRT); break; case 0x06: MCInst_setOpcode(info->inst, M68K_INS_FLOGNP1); break; case 0x08: MCInst_setOpcode(info->inst, M68K_INS_FETOXM1); break; case 0x09: MCInst_setOpcode(info->inst, M68K_INS_FATANH); break; case 0x0a: MCInst_setOpcode(info->inst, M68K_INS_FATAN); break; case 0x0c: MCInst_setOpcode(info->inst, M68K_INS_FASIN); break; case 0x0d: MCInst_setOpcode(info->inst, M68K_INS_FATANH); break; case 0x0e: MCInst_setOpcode(info->inst, M68K_INS_FSIN); break; case 0x0f: MCInst_setOpcode(info->inst, M68K_INS_FTAN); break; case 0x10: MCInst_setOpcode(info->inst, M68K_INS_FETOX); break; case 0x11: MCInst_setOpcode(info->inst, M68K_INS_FTWOTOX); break; case 0x12: MCInst_setOpcode(info->inst, M68K_INS_FTENTOX); break; case 0x14: MCInst_setOpcode(info->inst, M68K_INS_FLOGN); break; case 0x15: MCInst_setOpcode(info->inst, M68K_INS_FLOG10); break; case 0x16: MCInst_setOpcode(info->inst, M68K_INS_FLOG2); break; case 0x18: MCInst_setOpcode(info->inst, M68K_INS_FABS); break; case 0x19: MCInst_setOpcode(info->inst, M68K_INS_FCOSH); break; case 0x1a: MCInst_setOpcode(info->inst, M68K_INS_FNEG); break; case 0x1c: MCInst_setOpcode(info->inst, M68K_INS_FACOS); break; case 0x1d: MCInst_setOpcode(info->inst, M68K_INS_FCOS); break; case 0x1e: MCInst_setOpcode(info->inst, M68K_INS_FGETEXP); break; case 0x1f: MCInst_setOpcode(info->inst, M68K_INS_FGETMAN); break; case 0x20: MCInst_setOpcode(info->inst, M68K_INS_FDIV); supports_single_op = false; break; case 0x21: MCInst_setOpcode(info->inst, M68K_INS_FMOD); supports_single_op = false; break; case 0x22: MCInst_setOpcode(info->inst, M68K_INS_FADD); supports_single_op = false; break; case 0x23: MCInst_setOpcode(info->inst, M68K_INS_FMUL); supports_single_op = false; break; case 0x24: MCInst_setOpcode(info->inst, M68K_INS_FSGLDIV); supports_single_op = false; break; case 0x25: MCInst_setOpcode(info->inst, M68K_INS_FREM); break; case 0x26: MCInst_setOpcode(info->inst, M68K_INS_FSCALE); break; case 0x27: MCInst_setOpcode(info->inst, M68K_INS_FSGLMUL); break; case 0x28: MCInst_setOpcode(info->inst, M68K_INS_FSUB); supports_single_op = false; break; case 0x38: MCInst_setOpcode(info->inst, M68K_INS_FCMP); supports_single_op = false; break; case 0x3a: MCInst_setOpcode(info->inst, M68K_INS_FTST); break; default: break; } // Some trickery here! It's not documented but if bit 6 is set this is a s/d opcode and then // if bit 2 is set it's a d. As we already have set our opcode in the code above we can just // offset it as the following 2 op codes (if s/d is supported) will always be directly after it if ((next >> 6) & 1) { if ((next >> 2) & 1) info->inst->Opcode += 2; else info->inst->Opcode += 1; } ext = &info->extension; ext->op_count = 2; ext->op_size.type = M68K_SIZE_TYPE_CPU; ext->op_size.cpu_size = 0; op0 = &ext->operands[0]; op1 = &ext->operands[1]; if (rm == 0 && supports_single_op && src == dst) { ext->op_count = 1; op0->reg = M68K_REG_FP0 + dst; return; } if (rm == 1) { switch (src) { case 0x00 : ext->op_size.cpu_size = M68K_CPU_SIZE_LONG; get_ea_mode_op(info, op0, info->ir, 4); break; case 0x06 : ext->op_size.cpu_size = M68K_CPU_SIZE_BYTE; get_ea_mode_op(info, op0, info->ir, 1); break; case 0x04 : ext->op_size.cpu_size = M68K_CPU_SIZE_WORD; get_ea_mode_op(info, op0, info->ir, 2); break; case 0x01 : ext->op_size.type = M68K_SIZE_TYPE_FPU; ext->op_size.fpu_size = M68K_FPU_SIZE_SINGLE; get_ea_mode_op(info, op0, info->ir, 4); op0->type = M68K_OP_FP_SINGLE; break; case 0x05: ext->op_size.type = M68K_SIZE_TYPE_FPU; ext->op_size.fpu_size = M68K_FPU_SIZE_DOUBLE; get_ea_mode_op(info, op0, info->ir, 8); op0->type = M68K_OP_FP_DOUBLE; break; default : ext->op_size.type = M68K_SIZE_TYPE_FPU; ext->op_size.fpu_size = M68K_FPU_SIZE_EXTENDED; break; } } else { op0->reg = M68K_REG_FP0 + src; } op1->reg = M68K_REG_FP0 + dst; } static void d68020_cprestore(m68k_info *info) { cs_m68k* ext; LIMIT_CPU_TYPES(info, M68020_PLUS); ext = build_init_op(info, M68K_INS_FRESTORE, 1, 0); get_ea_mode_op(info, &ext->operands[0], info->ir, 1); } static void d68020_cpsave(m68k_info *info) { cs_m68k* ext; LIMIT_CPU_TYPES(info, M68020_PLUS); ext = build_init_op(info, M68K_INS_FSAVE, 1, 0); get_ea_mode_op(info, &ext->operands[0], info->ir, 1); } static void d68020_cpscc(m68k_info *info) { cs_m68k* ext; LIMIT_CPU_TYPES(info, M68020_PLUS); ext = build_init_op(info, M68K_INS_FSF, 1, 1); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (read_imm_16(info) & 0x2f); get_ea_mode_op(info, &ext->operands[0], info->ir, 1); } static void d68020_cptrapcc_0(m68k_info *info) { uint32_t extension1; LIMIT_CPU_TYPES(info, M68020_PLUS); extension1 = read_imm_16(info); build_init_op(info, M68K_INS_FTRAPF, 0, 0); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (extension1 & 0x2f); } static void d68020_cptrapcc_16(m68k_info *info) { uint32_t extension1, extension2; cs_m68k_op* op0; cs_m68k* ext; LIMIT_CPU_TYPES(info, M68020_PLUS); extension1 = read_imm_16(info); extension2 = read_imm_16(info); ext = build_init_op(info, M68K_INS_FTRAPF, 1, 2); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (extension1 & 0x2f); op0 = &ext->operands[0]; op0->address_mode = M68K_AM_IMMEDIATE; op0->type = M68K_OP_IMM; op0->imm = extension2; } static void d68020_cptrapcc_32(m68k_info *info) { uint32_t extension1, extension2; cs_m68k* ext; cs_m68k_op* op0; LIMIT_CPU_TYPES(info, M68020_PLUS); extension1 = read_imm_16(info); extension2 = read_imm_32(info); ext = build_init_op(info, M68K_INS_FTRAPF, 1, 2); // these are all in row with the extension so just doing a add here is fine info->inst->Opcode += (extension1 & 0x2f); op0 = &ext->operands[0]; op0->address_mode = M68K_AM_IMMEDIATE; op0->type = M68K_OP_IMM; op0->imm = extension2; } static void d68040_cpush(m68k_info *info) { LIMIT_CPU_TYPES(info, M68040_PLUS); build_cpush_cinv(info, M68K_INS_CPUSHL); } static void d68000_dbra(m68k_info *info) { build_dbxx(info, M68K_INS_DBRA, 0, make_int_16(read_imm_16(info))); } static void d68000_dbcc(m68k_info *info) { build_dbcc(info, 0, make_int_16(read_imm_16(info))); } static void d68000_divs(m68k_info *info) { build_er_1(info, M68K_INS_DIVS, 2); } static void d68000_divu(m68k_info *info) { build_er_1(info, M68K_INS_DIVU, 2); } static void d68020_divl(m68k_info *info) { uint32_t extension, insn_signed; cs_m68k* ext; cs_m68k_op* op0; cs_m68k_op* op1; uint32_t reg_0, reg_1; LIMIT_CPU_TYPES(info, M68020_PLUS); extension = read_imm_16(info); insn_signed = 0; if (BIT_B((extension))) insn_signed = 1; ext = build_init_op(info, insn_signed ? M68K_INS_DIVS : M68K_INS_DIVU, 2, 4); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, 4); reg_0 = extension & 7; reg_1 = (extension >> 12) & 7; op1->address_mode = M68K_AM_NONE; op1->type = M68K_OP_REG_PAIR; op1->reg_pair.reg_0 = reg_0 + M68K_REG_D0; op1->reg_pair.reg_1 = reg_1 + M68K_REG_D0; if ((reg_0 == reg_1) || !BIT_A(extension)) { op1->type = M68K_OP_REG; op1->reg = M68K_REG_D0 + reg_1; } } static void d68000_eor_8(m68k_info *info) { build_re_1(info, M68K_INS_EOR, 1); } static void d68000_eor_16(m68k_info *info) { build_re_1(info, M68K_INS_EOR, 2); } static void d68000_eor_32(m68k_info *info) { build_re_1(info, M68K_INS_EOR, 4); } static void d68000_eori_8(m68k_info *info) { build_imm_ea(info, M68K_INS_EORI, 1, read_imm_8(info)); } static void d68000_eori_16(m68k_info *info) { build_imm_ea(info, M68K_INS_EORI, 2, read_imm_16(info)); } static void d68000_eori_32(m68k_info *info) { build_imm_ea(info, M68K_INS_EORI, 4, read_imm_32(info)); } static void d68000_eori_to_ccr(m68k_info *info) { build_imm_special_reg(info, M68K_INS_EORI, read_imm_8(info), 1, M68K_REG_CCR); } static void d68000_eori_to_sr(m68k_info *info) { build_imm_special_reg(info, M68K_INS_EORI, read_imm_16(info), 2, M68K_REG_SR); } static void d68000_exg_dd(m68k_info *info) { build_r(info, M68K_INS_EXG, 4); } static void d68000_exg_aa(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_EXG, 2, 4); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_A0 + ((info->ir >> 9) & 7); op1->address_mode = M68K_AM_NONE; op1->reg = M68K_REG_A0 + (info->ir & 7); } static void d68000_exg_da(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_EXG, 2, 4); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); op1->address_mode = M68K_AM_NONE; op1->reg = M68K_REG_A0 + (info->ir & 7); } static void d68000_ext_16(m68k_info *info) { build_d(info, M68K_INS_EXT, 2); } static void d68000_ext_32(m68k_info *info) { build_d(info, M68K_INS_EXT, 4); } static void d68020_extb_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_d(info, M68K_INS_EXTB, 4); } static void d68000_jmp(m68k_info *info) { cs_m68k* ext = build_init_op(info, M68K_INS_JMP, 1, 0); set_insn_group(info, M68K_GRP_JUMP); get_ea_mode_op(info, &ext->operands[0], info->ir, 4); } static void d68000_jsr(m68k_info *info) { cs_m68k* ext = build_init_op(info, M68K_INS_JSR, 1, 0); set_insn_group(info, M68K_GRP_JUMP); get_ea_mode_op(info, &ext->operands[0], info->ir, 4); } static void d68000_lea(m68k_info *info) { build_ea_a(info, M68K_INS_LEA, 4); } static void d68000_link_16(m68k_info *info) { build_link(info, read_imm_16(info), 2); } static void d68020_link_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_link(info, read_imm_32(info), 4); } static void d68000_lsr_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_LSR, 1); } static void d68000_lsr_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_LSR, 2); } static void d68000_lsr_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_LSR, 4); } static void d68000_lsr_r_8(m68k_info *info) { build_r(info, M68K_INS_LSR, 1); } static void d68000_lsr_r_16(m68k_info *info) { build_r(info, M68K_INS_LSR, 2); } static void d68000_lsr_r_32(m68k_info *info) { build_r(info, M68K_INS_LSR, 4); } static void d68000_lsr_ea(m68k_info *info) { build_ea(info, M68K_INS_LSR, 2); } static void d68000_lsl_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_LSL, 1); } static void d68000_lsl_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_LSL, 2); } static void d68000_lsl_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_LSL, 4); } static void d68000_lsl_r_8(m68k_info *info) { build_r(info, M68K_INS_LSL, 1); } static void d68000_lsl_r_16(m68k_info *info) { build_r(info, M68K_INS_LSL, 2); } static void d68000_lsl_r_32(m68k_info *info) { build_r(info, M68K_INS_LSL, 4); } static void d68000_lsl_ea(m68k_info *info) { build_ea(info, M68K_INS_LSL, 2); } static void d68000_move_8(m68k_info *info) { build_ea_ea(info, M68K_INS_MOVE, 1); } static void d68000_move_16(m68k_info *info) { build_ea_ea(info, M68K_INS_MOVE, 2); } static void d68000_move_32(m68k_info *info) { build_ea_ea(info, M68K_INS_MOVE, 4); } static void d68000_movea_16(m68k_info *info) { build_ea_a(info, M68K_INS_MOVEA, 2); } static void d68000_movea_32(m68k_info *info) { build_ea_a(info, M68K_INS_MOVEA, 4); } static void d68000_move_to_ccr(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 2); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, 1); op1->address_mode = M68K_AM_NONE; op1->reg = M68K_REG_CCR; } static void d68010_move_fr_ccr(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext; LIMIT_CPU_TYPES(info, M68010_PLUS); ext = build_init_op(info, M68K_INS_MOVE, 2, 2); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_CCR; get_ea_mode_op(info, op1, info->ir, 1); } static void d68000_move_fr_sr(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 2); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_SR; get_ea_mode_op(info, op1, info->ir, 2); } static void d68000_move_to_sr(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 2); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, 2); op1->address_mode = M68K_AM_NONE; op1->reg = M68K_REG_SR; } static void d68000_move_fr_usp(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 0); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_USP; op1->address_mode = M68K_AM_NONE; op1->reg = M68K_REG_A0 + (info->ir & 7); } static void d68000_move_to_usp(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 0); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->address_mode = M68K_AM_NONE; op0->reg = M68K_REG_A0 + (info->ir & 7); op1->address_mode = M68K_AM_NONE; op1->reg = M68K_REG_USP; } static void d68010_movec(m68k_info *info) { uint32_t extension; m68k_reg reg; cs_m68k* ext; cs_m68k_op* op0; cs_m68k_op* op1; LIMIT_CPU_TYPES(info, M68010_PLUS); extension = read_imm_16(info); reg = M68K_REG_INVALID; ext = build_init_op(info, M68K_INS_MOVEC, 2, 0); op0 = &ext->operands[0]; op1 = &ext->operands[1]; switch (extension & 0xfff) { case 0x000: reg = M68K_REG_SFC; break; case 0x001: reg = M68K_REG_DFC; break; case 0x800: reg = M68K_REG_USP; break; case 0x801: reg = M68K_REG_VBR; break; case 0x002: reg = M68K_REG_CACR; break; case 0x802: reg = M68K_REG_CAAR; break; case 0x803: reg = M68K_REG_MSP; break; case 0x804: reg = M68K_REG_ISP; break; case 0x003: reg = M68K_REG_TC; break; case 0x004: reg = M68K_REG_ITT0; break; case 0x005: reg = M68K_REG_ITT1; break; case 0x006: reg = M68K_REG_DTT0; break; case 0x007: reg = M68K_REG_DTT1; break; case 0x805: reg = M68K_REG_MMUSR; break; case 0x806: reg = M68K_REG_URP; break; case 0x807: reg = M68K_REG_SRP; break; } if (BIT_1(info->ir)) { op0->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7); op1->reg = reg; } else { op0->reg = reg; op1->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7); } } static void d68000_movem_pd_16(m68k_info *info) { build_movem_re(info, M68K_INS_MOVEM, 2); } static void d68000_movem_pd_32(m68k_info *info) { build_movem_re(info, M68K_INS_MOVEM, 4); } static void d68000_movem_er_16(m68k_info *info) { build_movem_er(info, M68K_INS_MOVEM, 2); } static void d68000_movem_er_32(m68k_info *info) { build_movem_er(info, M68K_INS_MOVEM, 4); } static void d68000_movem_re_16(m68k_info *info) { build_movem_re(info, M68K_INS_MOVEM, 2); } static void d68000_movem_re_32(m68k_info *info) { build_movem_re(info, M68K_INS_MOVEM, 4); } static void d68000_movep_re_16(m68k_info *info) { build_movep_re(info, 2); } static void d68000_movep_re_32(m68k_info *info) { build_movep_re(info, 4); } static void d68000_movep_er_16(m68k_info *info) { build_movep_er(info, 2); } static void d68000_movep_er_32(m68k_info *info) { build_movep_er(info, 4); } static void d68010_moves_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_moves(info, 1); } static void d68010_moves_16(m68k_info *info) { //uint32_t extension; LIMIT_CPU_TYPES(info, M68010_PLUS); build_moves(info, 2); } static void d68010_moves_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68010_PLUS); build_moves(info, 4); } static void d68000_moveq(m68k_info *info) { cs_m68k_op* op0; cs_m68k_op* op1; cs_m68k* ext = build_init_op(info, M68K_INS_MOVEQ, 2, 0); op0 = &ext->operands[0]; op1 = &ext->operands[1]; op0->type = M68K_OP_IMM; op0->address_mode = M68K_AM_IMMEDIATE; op0->imm = (info->ir & 0xff); op1->address_mode = M68K_AM_REG_DIRECT_DATA; op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7); } static void d68040_move16_pi_pi(m68k_info *info) { int data[] = { info->ir & 7, (read_imm_16(info) >> 12) & 7 }; int modes[] = { M68K_AM_REGI_ADDR_POST_INC, M68K_AM_REGI_ADDR_POST_INC }; LIMIT_CPU_TYPES(info, M68040_PLUS); build_move16(info, data, modes); } static void d68040_move16_pi_al(m68k_info *info) { int data[] = { info->ir & 7, read_imm_32(info) }; int modes[] = { M68K_AM_REGI_ADDR_POST_INC, M68K_AM_ABSOLUTE_DATA_LONG }; LIMIT_CPU_TYPES(info, M68040_PLUS); build_move16(info, data, modes); } static void d68040_move16_al_pi(m68k_info *info) { int data[] = { read_imm_32(info), info->ir & 7 }; int modes[] = { M68K_AM_ABSOLUTE_DATA_LONG, M68K_AM_REGI_ADDR_POST_INC }; LIMIT_CPU_TYPES(info, M68040_PLUS); build_move16(info, data, modes); } static void d68040_move16_ai_al(m68k_info *info) { int data[] = { info->ir & 7, read_imm_32(info) }; int modes[] = { M68K_AM_REG_DIRECT_ADDR, M68K_AM_ABSOLUTE_DATA_LONG }; LIMIT_CPU_TYPES(info, M68040_PLUS); build_move16(info, data, modes); } static void d68040_move16_al_ai(m68k_info *info) { int data[] = { read_imm_32(info), info->ir & 7 }; int modes[] = { M68K_AM_ABSOLUTE_DATA_LONG, M68K_AM_REG_DIRECT_ADDR }; LIMIT_CPU_TYPES(info, M68040_PLUS); build_move16(info, data, modes); } static void d68000_muls(m68k_info *info) { build_er_1(info, M68K_INS_MULS, 2); } static void d68000_mulu(m68k_info *info) { build_er_1(info, M68K_INS_MULU, 2); } static void d68020_mull(m68k_info *info) { uint32_t extension, insn_signed; cs_m68k* ext; cs_m68k_op* op0; cs_m68k_op* op1; uint32_t reg_0, reg_1; LIMIT_CPU_TYPES(info, M68020_PLUS); extension = read_imm_16(info); insn_signed = 0; if (BIT_B((extension))) insn_signed = 1; ext = build_init_op(info, insn_signed ? M68K_INS_MULS : M68K_INS_MULU, 2, 4); op0 = &ext->operands[0]; op1 = &ext->operands[1]; get_ea_mode_op(info, op0, info->ir, 4); reg_0 = extension & 7; reg_1 = (extension >> 12) & 7; op1->address_mode = M68K_AM_NONE; op1->type = M68K_OP_REG_PAIR; op1->reg_pair.reg_0 = reg_0 + M68K_REG_D0; op1->reg_pair.reg_1 = reg_1 + M68K_REG_D0; if (!BIT_A(extension)) { op1->type = M68K_OP_REG; op1->reg = M68K_REG_D0 + reg_1; } } static void d68000_nbcd(m68k_info *info) { build_ea(info, M68K_INS_NBCD, 1); } static void d68000_neg_8(m68k_info *info) { build_ea(info, M68K_INS_NEG, 1); } static void d68000_neg_16(m68k_info *info) { build_ea(info, M68K_INS_NEG, 2); } static void d68000_neg_32(m68k_info *info) { build_ea(info, M68K_INS_NEG, 4); } static void d68000_negx_8(m68k_info *info) { build_ea(info, M68K_INS_NEGX, 1); } static void d68000_negx_16(m68k_info *info) { build_ea(info, M68K_INS_NEGX, 2); } static void d68000_negx_32(m68k_info *info) { build_ea(info, M68K_INS_NEGX, 4); } static void d68000_nop(m68k_info *info) { MCInst_setOpcode(info->inst, M68K_INS_NOP); } static void d68000_not_8(m68k_info *info) { build_ea(info, M68K_INS_NOT, 1); } static void d68000_not_16(m68k_info *info) { build_ea(info, M68K_INS_NOT, 2); } static void d68000_not_32(m68k_info *info) { build_ea(info, M68K_INS_NOT, 4); } static void d68000_or_er_8(m68k_info *info) { build_er_1(info, M68K_INS_OR, 1); } static void d68000_or_er_16(m68k_info *info) { build_er_1(info, M68K_INS_OR, 2); } static void d68000_or_er_32(m68k_info *info) { build_er_1(info, M68K_INS_OR, 4); } static void d68000_or_re_8(m68k_info *info) { build_re_1(info, M68K_INS_OR, 1); } static void d68000_or_re_16(m68k_info *info) { build_re_1(info, M68K_INS_OR, 2); } static void d68000_or_re_32(m68k_info *info) { build_re_1(info, M68K_INS_OR, 4); } static void d68000_ori_8(m68k_info *info) { build_imm_ea(info, M68K_INS_ORI, 1, read_imm_8(info)); } static void d68000_ori_16(m68k_info *info) { build_imm_ea(info, M68K_INS_ORI, 2, read_imm_16(info)); } static void d68000_ori_32(m68k_info *info) { build_imm_ea(info, M68K_INS_ORI, 4, read_imm_32(info)); } static void d68000_ori_to_ccr(m68k_info *info) { build_imm_special_reg(info, M68K_INS_ORI, read_imm_8(info), 1, M68K_REG_CCR); } static void d68000_ori_to_sr(m68k_info *info) { build_imm_special_reg(info, M68K_INS_ORI, read_imm_16(info), 2, M68K_REG_SR); } static void d68020_pack_rr(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_rr(info, M68K_INS_PACK, 0, read_imm_16(info)); } static void d68020_pack_mm(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_mm(info, M68K_INS_PACK, 0, read_imm_16(info)); } static void d68000_pea(m68k_info *info) { build_ea(info, M68K_INS_PEA, 4); } static void d68000_reset(m68k_info *info) { MCInst_setOpcode(info->inst, M68K_INS_RESET); } static void d68000_ror_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ROR, 1); } static void d68000_ror_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_ROR, 2); } static void d68000_ror_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_ROR, 4); } static void d68000_ror_r_8(m68k_info *info) { build_r(info, M68K_INS_ROR, 1); } static void d68000_ror_r_16(m68k_info *info) { build_r(info, M68K_INS_ROR, 2); } static void d68000_ror_r_32(m68k_info *info) { build_r(info, M68K_INS_ROR, 4); } static void d68000_ror_ea(m68k_info *info) { build_ea(info, M68K_INS_ROR, 2); } static void d68000_rol_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ROL, 1); } static void d68000_rol_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_ROL, 2); } static void d68000_rol_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_ROL, 4); } static void d68000_rol_r_8(m68k_info *info) { build_r(info, M68K_INS_ROL, 1); } static void d68000_rol_r_16(m68k_info *info) { build_r(info, M68K_INS_ROL, 2); } static void d68000_rol_r_32(m68k_info *info) { build_r(info, M68K_INS_ROL, 4); } static void d68000_rol_ea(m68k_info *info) { build_ea(info, M68K_INS_ROL, 2); } static void d68000_roxr_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXR, 1); } static void d68000_roxr_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXR, 2); } static void d68000_roxr_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXR, 4); } static void d68000_roxr_r_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXR, 4); } static void d68000_roxr_r_16(m68k_info *info) { build_r(info, M68K_INS_ROXR, 2); } static void d68000_roxr_r_32(m68k_info *info) { build_r(info, M68K_INS_ROXR, 4); } static void d68000_roxr_ea(m68k_info *info) { build_ea(info, M68K_INS_ROXR, 2); } static void d68000_roxl_s_8(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXL, 1); } static void d68000_roxl_s_16(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXL, 2); } static void d68000_roxl_s_32(m68k_info *info) { build_3bit_d(info, M68K_INS_ROXL, 4); } static void d68000_roxl_r_8(m68k_info *info) { build_r(info, M68K_INS_ROXL, 1); } static void d68000_roxl_r_16(m68k_info *info) { build_r(info, M68K_INS_ROXL, 2); } static void d68000_roxl_r_32(m68k_info *info) { build_r(info, M68K_INS_ROXL, 4); } static void d68000_roxl_ea(m68k_info *info) { build_ea(info, M68K_INS_ROXL, 2); } static void d68010_rtd(m68k_info *info) { set_insn_group(info, M68K_GRP_RET); LIMIT_CPU_TYPES(info, M68010_PLUS); build_absolute_jump_with_immediate(info, M68K_INS_RTD, 0, read_imm_16(info)); } static void d68000_rte(m68k_info *info) { set_insn_group(info, M68K_GRP_IRET); MCInst_setOpcode(info->inst, M68K_INS_RTE); } static void d68020_rtm(m68k_info *info) { cs_m68k* ext; cs_m68k_op* op; set_insn_group(info, M68K_GRP_RET); LIMIT_CPU_TYPES(info, M68020_ONLY); build_absolute_jump_with_immediate(info, M68K_INS_RTM, 0, 0); ext = &info->extension; op = &ext->operands[0]; op->address_mode = M68K_AM_NONE; op->type = M68K_OP_REG; if (BIT_3(info->ir)) { op->reg = M68K_REG_A0 + (info->ir & 7); } else { op->reg = M68K_REG_D0 + (info->ir & 7); } } static void d68000_rtr(m68k_info *info) { set_insn_group(info, M68K_GRP_RET); MCInst_setOpcode(info->inst, M68K_INS_RTR); } static void d68000_rts(m68k_info *info) { set_insn_group(info, M68K_GRP_RET); MCInst_setOpcode(info->inst, M68K_INS_RTS); } static void d68000_sbcd_rr(m68k_info *info) { build_rr(info, M68K_INS_SBCD, 1, 0); } static void d68000_sbcd_mm(m68k_info *info) { build_mm(info, M68K_INS_SBCD, 0, read_imm_16(info)); } static void d68000_scc(m68k_info *info) { cs_m68k* ext = build_init_op(info, s_scc_lut[(info->ir >> 8) & 0xf], 1, 1); get_ea_mode_op(info, &ext->operands[0], info->ir, 1); } static void d68000_stop(m68k_info *info) { build_absolute_jump_with_immediate(info, M68K_INS_STOP, 0, read_imm_16(info)); } static void d68000_sub_er_8(m68k_info *info) { build_er_1(info, M68K_INS_SUB, 1); } static void d68000_sub_er_16(m68k_info *info) { build_er_1(info, M68K_INS_SUB, 2); } static void d68000_sub_er_32(m68k_info *info) { build_er_1(info, M68K_INS_SUB, 4); } static void d68000_sub_re_8(m68k_info *info) { build_re_1(info, M68K_INS_SUB, 1); } static void d68000_sub_re_16(m68k_info *info) { build_re_1(info, M68K_INS_SUB, 2); } static void d68000_sub_re_32(m68k_info *info) { build_re_1(info, M68K_INS_SUB, 4); } static void d68000_suba_16(m68k_info *info) { build_ea_a(info, M68K_INS_SUBA, 2); } static void d68000_suba_32(m68k_info *info) { build_ea_a(info, M68K_INS_SUBA, 4); } static void d68000_subi_8(m68k_info *info) { build_imm_ea(info, M68K_INS_SUBI, 1, read_imm_8(info)); } static void d68000_subi_16(m68k_info *info) { build_imm_ea(info, M68K_INS_SUBI, 2, read_imm_16(info)); } static void d68000_subi_32(m68k_info *info) { build_imm_ea(info, M68K_INS_SUBI, 4, read_imm_32(info)); } static void d68000_subq_8(m68k_info *info) { build_3bit_ea(info, M68K_INS_SUBQ, 1); } static void d68000_subq_16(m68k_info *info) { build_3bit_ea(info, M68K_INS_SUBQ, 2); } static void d68000_subq_32(m68k_info *info) { build_3bit_ea(info, M68K_INS_SUBQ, 4); } static void d68000_subx_rr_8(m68k_info *info) { build_rr(info, M68K_INS_SUBX, 1, 0); } static void d68000_subx_rr_16(m68k_info *info) { build_rr(info, M68K_INS_SUBX, 2, 0); } static void d68000_subx_rr_32(m68k_info *info) { build_rr(info, M68K_INS_SUBX, 4, 0); } static void d68000_subx_mm_8(m68k_info *info) { build_mm(info, M68K_INS_SUBX, 1, 0); } static void d68000_subx_mm_16(m68k_info *info) { build_mm(info, M68K_INS_SUBX, 2, 0); } static void d68000_subx_mm_32(m68k_info *info) { build_mm(info, M68K_INS_SUBX, 4, 0); } static void d68000_swap(m68k_info *info) { build_d(info, M68K_INS_SWAP, 0); } static void d68000_tas(m68k_info *info) { build_ea(info, M68K_INS_TAS, 1); } static void d68000_trap(m68k_info *info) { build_absolute_jump_with_immediate(info, M68K_INS_TRAP, 0, info->ir&0xf); } static void d68020_trapcc_0(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_trap(info, 0, 0); info->extension.op_count = 0; } static void d68020_trapcc_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_trap(info, 2, read_imm_16(info)); } static void d68020_trapcc_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_trap(info, 4, read_imm_32(info)); } static void d68000_trapv(m68k_info *info) { MCInst_setOpcode(info->inst, M68K_INS_TRAPV); } static void d68000_tst_8(m68k_info *info) { build_ea(info, M68K_INS_TST, 1); } static void d68020_tst_pcdi_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 1); } static void d68020_tst_pcix_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 1); } static void d68020_tst_i_8(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 1); } static void d68000_tst_16(m68k_info *info) { build_ea(info, M68K_INS_TST, 2); } static void d68020_tst_a_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 2); } static void d68020_tst_pcdi_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 2); } static void d68020_tst_pcix_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 2); } static void d68020_tst_i_16(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 2); } static void d68000_tst_32(m68k_info *info) { build_ea(info, M68K_INS_TST, 4); } static void d68020_tst_a_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 4); } static void d68020_tst_pcdi_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 4); } static void d68020_tst_pcix_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 4); } static void d68020_tst_i_32(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_ea(info, M68K_INS_TST, 4); } static void d68000_unlk(m68k_info *info) { cs_m68k_op* op; cs_m68k* ext = build_init_op(info, M68K_INS_UNLK, 1, 0); op = &ext->operands[0]; op->address_mode = M68K_AM_REG_DIRECT_ADDR; op->reg = M68K_REG_A0 + (info->ir & 7); } static void d68020_unpk_rr(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_rr(info, M68K_INS_UNPK, 0, read_imm_16(info)); } static void d68020_unpk_mm(m68k_info *info) { LIMIT_CPU_TYPES(info, M68020_PLUS); build_mm(info, M68K_INS_UNPK, 0, read_imm_16(info)); } /* This table is auto-generated. Look in contrib/m68k_instruction_tbl_gen for more info */ #include "M68KInstructionTable.inc" static int instruction_is_valid(m68k_info *info, const unsigned int word_check) { const unsigned int instruction = info->ir; instruction_struct *i = &g_instruction_table[instruction]; if ( (i->word2_mask && ((word_check & i->word2_mask) != i->word2_match)) || (i->instruction == d68000_invalid) ) { d68000_invalid(info); return 0; } return 1; } static int exists_reg_list(uint16_t *regs, uint8_t count, m68k_reg reg) { uint8_t i; for (i = 0; i < count; ++i) { if (regs[i] == (uint16_t)reg) return 1; } return 0; } static void add_reg_to_rw_list(m68k_info *info, m68k_reg reg, int write) { if (reg == M68K_REG_INVALID) return; if (write) { if (exists_reg_list(info->regs_write, info->regs_write_count, reg)) return; info->regs_write[info->regs_write_count] = (uint16_t)reg; info->regs_write_count++; } else { if (exists_reg_list(info->regs_read, info->regs_read_count, reg)) return; info->regs_read[info->regs_read_count] = (uint16_t)reg; info->regs_read_count++; } } static void update_am_reg_list(m68k_info *info, cs_m68k_op *op, int write) { switch (op->address_mode) { case M68K_AM_REG_DIRECT_ADDR: case M68K_AM_REG_DIRECT_DATA: add_reg_to_rw_list(info, op->reg, write); break; case M68K_AM_REGI_ADDR_POST_INC: case M68K_AM_REGI_ADDR_PRE_DEC: add_reg_to_rw_list(info, op->reg, 1); break; case M68K_AM_REGI_ADDR: case M68K_AM_REGI_ADDR_DISP: add_reg_to_rw_list(info, op->reg, 0); break; case M68K_AM_AREGI_INDEX_8_BIT_DISP: case M68K_AM_AREGI_INDEX_BASE_DISP: case M68K_AM_MEMI_POST_INDEX: case M68K_AM_MEMI_PRE_INDEX: case M68K_AM_PCI_INDEX_8_BIT_DISP: case M68K_AM_PCI_INDEX_BASE_DISP: case M68K_AM_PC_MEMI_PRE_INDEX: case M68K_AM_PC_MEMI_POST_INDEX: add_reg_to_rw_list(info, op->mem.index_reg, 0); add_reg_to_rw_list(info, op->mem.base_reg, 0); break; // no register(s) in the other addressing modes default: break; } } static void update_bits_range(m68k_info *info, m68k_reg reg_start, uint8_t bits, int write) { int i; for (i = 0; i < 8; ++i) { if (bits & (1 << i)) { add_reg_to_rw_list(info, reg_start + i, write); } } } static void update_reg_list_regbits(m68k_info *info, cs_m68k_op *op, int write) { uint32_t bits = op->register_bits; update_bits_range(info, M68K_REG_D0, bits & 0xff, write); update_bits_range(info, M68K_REG_A0, (bits >> 8) & 0xff, write); update_bits_range(info, M68K_REG_FP0, (bits >> 16) & 0xff, write); } static void update_op_reg_list(m68k_info *info, cs_m68k_op *op, int write) { switch ((int)op->type) { case M68K_OP_REG: add_reg_to_rw_list(info, op->reg, write); break; case M68K_OP_MEM: update_am_reg_list(info, op, write); break; case M68K_OP_REG_BITS: update_reg_list_regbits(info, op, write); break; case M68K_OP_REG_PAIR: add_reg_to_rw_list(info, op->reg_pair.reg_0, write); add_reg_to_rw_list(info, op->reg_pair.reg_1, write); break; } } static void build_regs_read_write_counts(m68k_info *info) { int i; if (!info->extension.op_count) return; if (info->extension.op_count == 1) { update_op_reg_list(info, &info->extension.operands[0], 1); } else { // first operand is always read update_op_reg_list(info, &info->extension.operands[0], 0); // remaning write for (i = 1; i < info->extension.op_count; ++i) update_op_reg_list(info, &info->extension.operands[i], 1); } } static void m68k_setup_internals(m68k_info* info, MCInst* inst, unsigned int pc, unsigned int cpu_type) { info->inst = inst; info->pc = pc; info->ir = 0; info->type = cpu_type; info->address_mask = 0xffffffff; switch(info->type) { case M68K_CPU_TYPE_68000: info->type = TYPE_68000; info->address_mask = 0x00ffffff; break; case M68K_CPU_TYPE_68010: info->type = TYPE_68010; info->address_mask = 0x00ffffff; break; case M68K_CPU_TYPE_68EC020: info->type = TYPE_68020; info->address_mask = 0x00ffffff; break; case M68K_CPU_TYPE_68020: info->type = TYPE_68020; info->address_mask = 0xffffffff; break; case M68K_CPU_TYPE_68030: info->type = TYPE_68030; info->address_mask = 0xffffffff; break; case M68K_CPU_TYPE_68040: info->type = TYPE_68040; info->address_mask = 0xffffffff; break; default: info->address_mask = 0; return; } } /* ======================================================================== */ /* ================================= API ================================== */ /* ======================================================================== */ /* Disasemble one instruction at pc and store in str_buff */ static unsigned int m68k_disassemble(m68k_info *info, uint64_t pc) { MCInst *inst = info->inst; cs_m68k* ext = &info->extension; int i; unsigned int size; inst->Opcode = M68K_INS_INVALID; memset(ext, 0, sizeof(cs_m68k)); ext->op_size.type = M68K_SIZE_TYPE_CPU; for (i = 0; i < M68K_OPERAND_COUNT; ++i) ext->operands[i].type = M68K_OP_REG; info->ir = peek_imm_16(info); if (instruction_is_valid(info, peek_imm_32(info) & 0xffff)) { info->ir = read_imm_16(info); g_instruction_table[info->ir].instruction(info); } size = info->pc - (unsigned int)pc; info->pc = (unsigned int)pc; return size; } bool M68K_getInstruction(csh ud, const uint8_t* code, size_t code_len, MCInst* instr, uint16_t* size, uint64_t address, void* inst_info) { #ifdef M68K_DEBUG SStream ss; #endif int s; int cpu_type = M68K_CPU_TYPE_68000; cs_struct* handle = instr->csh; m68k_info *info = (m68k_info*)handle->printer_info; // code len has to be at least 2 bytes to be valid m68k if (code_len < 2) { *size = 0; return false; } if (instr->flat_insn->detail) { memset(instr->flat_insn->detail, 0, offsetof(cs_detail, m68k)+sizeof(cs_m68k)); } info->groups_count = 0; info->regs_read_count = 0; info->regs_write_count = 0; info->code = code; info->code_len = code_len; info->baseAddress = address; if (handle->mode & CS_MODE_M68K_010) cpu_type = M68K_CPU_TYPE_68010; if (handle->mode & CS_MODE_M68K_020) cpu_type = M68K_CPU_TYPE_68020; if (handle->mode & CS_MODE_M68K_030) cpu_type = M68K_CPU_TYPE_68030; if (handle->mode & CS_MODE_M68K_040) cpu_type = M68K_CPU_TYPE_68040; if (handle->mode & CS_MODE_M68K_060) cpu_type = M68K_CPU_TYPE_68040; // 060 = 040 for now m68k_setup_internals(info, instr, (unsigned int)address, cpu_type); s = m68k_disassemble(info, address); if (s == 0) { *size = 2; return false; } build_regs_read_write_counts(info); #ifdef M68K_DEBUG SStream_Init(&ss); M68K_printInst(instr, &ss, info); #endif // Make sure we always stay within range if (s > (int)code_len) *size = (uint16_t)code_len; else *size = (uint16_t)s; return true; } capstone-sys-0.11.0/capstone/arch/M68K/M68KDisassembler.h010066400017500001750000000020311363402546700210640ustar0000000000000000/* Capstone Disassembly Engine */ /* M68K Backend by Daniel Collin 2015-2016 */ #ifndef CS_M68KDISASSEMBLER_H #define CS_M68KDISASSEMBLER_H #include "../../MCInst.h" /* Private, For internal use only */ typedef struct m68k_info { const uint8_t *code; size_t code_len; uint64_t baseAddress; MCInst *inst; unsigned int pc; /* program counter */ unsigned int ir; /* instruction register */ unsigned int type; unsigned int address_mask; /* Address mask to simulate address lines */ cs_m68k extension; uint16_t regs_read[20]; // list of implicit registers read by this insn uint8_t regs_read_count; // number of implicit registers read by this insn uint16_t regs_write[20]; // list of implicit registers modified by this insn uint8_t regs_write_count; // number of implicit registers modified by this insn uint8_t groups[8]; uint8_t groups_count; } m68k_info; bool M68K_getInstruction(csh ud, const uint8_t* code, size_t code_len, MCInst* instr, uint16_t* size, uint64_t address, void* info); #endif capstone-sys-0.11.0/capstone/arch/M68K/M68KInstPrinter.c010066400017500001750000000335011363402546700207310ustar0000000000000000/* Capstone Disassembly Engine */ /* M68K Backend by Daniel Collin 2015-2016 */ #ifdef _MSC_VER // Disable security warnings for strcat & sprintf #ifndef _CRT_SECURE_NO_WARNINGS #define _CRT_SECURE_NO_WARNINGS #endif //Banned API Usage : strcat / sprintf is a Banned API as listed in dontuse.h for //security purposes. #pragma warning(disable:28719) #endif #include // DEBUG #include #include #include "M68KInstPrinter.h" #include "M68KDisassembler.h" #include "../../cs_priv.h" #include "../../utils.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCRegisterInfo.h" #ifndef CAPSTONE_DIET static const char* s_spacing = " "; static const char* s_reg_names[] = { "invalid", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", "pc", "sr", "ccr", "sfc", "dfc", "usp", "vbr", "cacr", "caar", "msp", "isp", "tc", "itt0", "itt1", "dtt0", "dtt1", "mmusr", "urp", "srp", "fpcr", "fpsr", "fpiar", }; static const char* s_instruction_names[] = { "invalid", "abcd", "add", "adda", "addi", "addq", "addx", "and", "andi", "asl", "asr", "bhs", "blo", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble", "bra", "bsr", "bchg", "bclr", "bset", "btst", "bfchg", "bfclr", "bfexts", "bfextu", "bfffo", "bfins", "bfset", "bftst", "bkpt", "callm", "cas", "cas2", "chk", "chk2", "clr", "cmp", "cmpa", "cmpi", "cmpm", "cmp2", "cinvl", "cinvp", "cinva", "cpushl", "cpushp", "cpusha", "dbt", "dbf", "dbhi", "dbls", "dbcc", "dbcs", "dbne", "dbeq", "dbvc", "dbvs", "dbpl", "dbmi", "dbge", "dblt", "dbgt", "dble", "dbra", "divs", "divsl", "divu", "divul", "eor", "eori", "exg", "ext", "extb", "fabs", "fsabs", "fdabs", "facos", "fadd", "fsadd", "fdadd", "fasin", "fatan", "fatanh", "fbf", "fbeq", "fbogt", "fboge", "fbolt", "fbole", "fbogl", "fbor", "fbun", "fbueq", "fbugt", "fbuge", "fbult", "fbule", "fbne", "fbt", "fbsf", "fbseq", "fbgt", "fbge", "fblt", "fble", "fbgl", "fbgle", "fbngle", "fbngl", "fbnle", "fbnlt", "fbnge", "fbngt", "fbsne", "fbst", "fcmp", "fcos", "fcosh", "fdbf", "fdbeq", "fdbogt", "fdboge", "fdbolt", "fdbole", "fdbogl", "fdbor", "fdbun", "fdbueq", "fdbugt", "fdbuge", "fdbult", "fdbule", "fdbne", "fdbt", "fdbsf", "fdbseq", "fdbgt", "fdbge", "fdblt", "fdble", "fdbgl", "fdbgle", "fdbngle", "fdbngl", "fdbnle", "fdbnlt", "fdbnge", "fdbngt", "fdbsne", "fdbst", "fdiv", "fsdiv", "fddiv", "fetox", "fetoxm1", "fgetexp", "fgetman", "fint", "fintrz", "flog10", "flog2", "flogn", "flognp1", "fmod", "fmove", "fsmove", "fdmove", "fmovecr", "fmovem", "fmul", "fsmul", "fdmul", "fneg", "fsneg", "fdneg", "fnop", "frem", "frestore", "fsave", "fscale", "fsgldiv", "fsglmul", "fsin", "fsincos", "fsinh", "fsqrt", "fssqrt", "fdsqrt", "fsf", "fseq", "fsogt", "fsoge", "fsolt", "fsole", "fsogl", "fsor", "fsun", "fsueq", "fsugt", "fsuge", "fsult", "fsule", "fsne", "fst", "fssf", "fsseq", "fsgt", "fsge", "fslt", "fsle", "fsgl", "fsgle", "fsngle", "fsngl", "fsnle", "fsnlt", "fsnge", "fsngt", "fssne", "fsst", "fsub", "fssub", "fdsub", "ftan", "ftanh", "ftentox", "ftrapf", "ftrapeq", "ftrapogt", "ftrapoge", "ftrapolt", "ftrapole", "ftrapogl", "ftrapor", "ftrapun", "ftrapueq", "ftrapugt", "ftrapuge", "ftrapult", "ftrapule", "ftrapne", "ftrapt", "ftrapsf", "ftrapseq", "ftrapgt", "ftrapge", "ftraplt", "ftraple", "ftrapgl", "ftrapgle", "ftrapngle", "ftrapngl", "ftrapnle", "ftrapnlt", "ftrapnge", "ftrapngt", "ftrapsne", "ftrapst", "ftst", "ftwotox", "halt", "illegal", "jmp", "jsr", "lea", "link", "lpstop", "lsl", "lsr", "move", "movea", "movec", "movem", "movep", "moveq", "moves", "move16", "muls", "mulu", "nbcd", "neg", "negx", "nop", "not", "or", "ori", "pack", "pea", "pflush", "pflusha", "pflushan", "pflushn", "ploadr", "ploadw", "plpar", "plpaw", "pmove", "pmovefd", "ptestr", "ptestw", "pulse", "rems", "remu", "reset", "rol", "ror", "roxl", "roxr", "rtd", "rte", "rtm", "rtr", "rts", "sbcd", "st", "sf", "shi", "sls", "scc", "shs", "scs", "slo", "sne", "seq", "svc", "svs", "spl", "smi", "sge", "slt", "sgt", "sle", "stop", "sub", "suba", "subi", "subq", "subx", "swap", "tas", "trap", "trapv", "trapt", "trapf", "traphi", "trapls", "trapcc", "traphs", "trapcs", "traplo", "trapne", "trapeq", "trapvc", "trapvs", "trappl", "trapmi", "trapge", "traplt", "trapgt", "traple", "tst", "unlk", "unpk", }; #endif #ifndef CAPSTONE_DIET static const char* getRegName(m68k_reg reg) { return s_reg_names[(int)reg]; } static void printRegbitsRange(char* buffer, uint32_t data, const char* prefix) { unsigned int first = 0; unsigned int run_length = 0; int i; for (i = 0; i < 8; ++i) { if (data & (1 << i)) { first = i; run_length = 0; while (i < 7 && (data & (1 << (i + 1)))) { i++; run_length++; } if (buffer[0] != 0) strcat(buffer, "/"); sprintf(buffer + strlen(buffer), "%s%d", prefix, first); if (run_length > 0) sprintf(buffer + strlen(buffer), "-%s%d", prefix, first + run_length); } } } static void registerBits(SStream* O, const cs_m68k_op* op) { char buffer[128]; unsigned int data = op->register_bits; buffer[0] = 0; if (!data) { SStream_concat(O, "%s", "#$0"); return; } printRegbitsRange(buffer, data & 0xff, "d"); printRegbitsRange(buffer, (data >> 8) & 0xff, "a"); printRegbitsRange(buffer, (data >> 16) & 0xff, "fp"); SStream_concat(O, "%s", buffer); } static void registerPair(SStream* O, const cs_m68k_op* op) { SStream_concat(O, "%s:%s", s_reg_names[op->reg_pair.reg_0], s_reg_names[op->reg_pair.reg_1]); } static void printAddressingMode(SStream* O, unsigned int pc, const cs_m68k* inst, const cs_m68k_op* op) { switch (op->address_mode) { case M68K_AM_NONE: switch (op->type) { case M68K_OP_REG_BITS: registerBits(O, op); break; case M68K_OP_REG_PAIR: registerPair(O, op); break; case M68K_OP_REG: SStream_concat(O, "%s", s_reg_names[op->reg]); break; default: break; } break; case M68K_AM_REG_DIRECT_DATA: SStream_concat(O, "d%d", (op->reg - M68K_REG_D0)); break; case M68K_AM_REG_DIRECT_ADDR: SStream_concat(O, "a%d", (op->reg - M68K_REG_A0)); break; case M68K_AM_REGI_ADDR: SStream_concat(O, "(a%d)", (op->reg - M68K_REG_A0)); break; case M68K_AM_REGI_ADDR_POST_INC: SStream_concat(O, "(a%d)+", (op->reg - M68K_REG_A0)); break; case M68K_AM_REGI_ADDR_PRE_DEC: SStream_concat(O, "-(a%d)", (op->reg - M68K_REG_A0)); break; case M68K_AM_REGI_ADDR_DISP: SStream_concat(O, "%s$%x(a%d)", op->mem.disp < 0 ? "-" : "", abs(op->mem.disp), (op->mem.base_reg - M68K_REG_A0)); break; case M68K_AM_PCI_DISP: SStream_concat(O, "$%x(pc)", pc + 2 + op->mem.disp); break; case M68K_AM_ABSOLUTE_DATA_SHORT: SStream_concat(O, "$%x.w", op->imm); break; case M68K_AM_ABSOLUTE_DATA_LONG: SStream_concat(O, "$%x.l", op->imm); break; case M68K_AM_IMMEDIATE: if (inst->op_size.type == M68K_SIZE_TYPE_FPU) { #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point SStream_concat(O, "#"); break; #else if (inst->op_size.fpu_size == M68K_FPU_SIZE_SINGLE) SStream_concat(O, "#%f", op->simm); else if (inst->op_size.fpu_size == M68K_FPU_SIZE_DOUBLE) SStream_concat(O, "#%f", op->dimm); else SStream_concat(O, "#"); break; #endif } SStream_concat(O, "#$%x", op->imm); break; case M68K_AM_PCI_INDEX_8_BIT_DISP: SStream_concat(O, "$%x(pc,%s%s.%c)", pc + 2 + op->mem.disp, s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w'); break; case M68K_AM_AREGI_INDEX_8_BIT_DISP: SStream_concat(O, "%s$%x(%s,%s%s.%c)", op->mem.disp < 0 ? "-" : "", abs(op->mem.disp), getRegName(op->mem.base_reg), s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w'); break; case M68K_AM_PCI_INDEX_BASE_DISP: case M68K_AM_AREGI_INDEX_BASE_DISP: if (op->address_mode == M68K_AM_PCI_INDEX_BASE_DISP) { SStream_concat(O, "$%x", pc + 2 + op->mem.in_disp); } else { if (op->mem.in_disp > 0) SStream_concat(O, "$%x", op->mem.in_disp); } SStream_concat(O, "("); if (op->address_mode == M68K_AM_PCI_INDEX_BASE_DISP) { SStream_concat(O, "pc,%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w'); } else { if (op->mem.base_reg != M68K_REG_INVALID) SStream_concat(O, "a%d,%s", op->mem.base_reg - M68K_REG_A0, s_spacing); SStream_concat(O, "%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w'); } if (op->mem.scale > 0) SStream_concat(O, "%s*%s%d)", s_spacing, s_spacing, op->mem.scale); else SStream_concat(O, ")"); break; // It's ok to just use PCMI here as is as we set base_reg to PC in the disassembler. While this is not strictly correct it makes the code // easier and that is what actually happens when the code is executed anyway. case M68K_AM_PC_MEMI_POST_INDEX: case M68K_AM_PC_MEMI_PRE_INDEX: case M68K_AM_MEMI_PRE_INDEX: case M68K_AM_MEMI_POST_INDEX: SStream_concat(O, "(["); if (op->address_mode == M68K_AM_PC_MEMI_POST_INDEX || op->address_mode == M68K_AM_PC_MEMI_PRE_INDEX) { SStream_concat(O, "$%x", pc + 2 + op->mem.in_disp); } else { if (op->mem.in_disp > 0) SStream_concat(O, "$%x", op->mem.in_disp); } if (op->mem.base_reg != M68K_REG_INVALID) { if (op->mem.in_disp > 0) SStream_concat(O, ",%s%s", s_spacing, getRegName(op->mem.base_reg)); else SStream_concat(O, "%s", getRegName(op->mem.base_reg)); } if (op->address_mode == M68K_AM_MEMI_POST_INDEX || op->address_mode == M68K_AM_PC_MEMI_POST_INDEX) SStream_concat(O, "]"); if (op->mem.index_reg != M68K_REG_INVALID) SStream_concat(O, ",%s%s.%c", s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w'); if (op->mem.scale > 0) SStream_concat(O, "%s*%s%d", s_spacing, s_spacing, op->mem.scale); if (op->address_mode == M68K_AM_MEMI_PRE_INDEX || op->address_mode == M68K_AM_PC_MEMI_PRE_INDEX) SStream_concat(O, "]"); if (op->mem.out_disp > 0) SStream_concat(O, ",%s$%x", s_spacing, op->mem.out_disp); SStream_concat(O, ")"); break; case M68K_AM_BRANCH_DISPLACEMENT: SStream_concat(O, "$%x", pc + 2 + op->br_disp.disp); default: break; } if (op->mem.bitfield) SStream_concat(O, "{%d:%d}", op->mem.offset, op->mem.width); } #endif #define m68k_sizeof_array(array) (int)(sizeof(array)/sizeof(array[0])) #define m68k_min(a, b) (a < b) ? a : b void M68K_printInst(MCInst* MI, SStream* O, void* PrinterInfo) { #ifndef CAPSTONE_DIET m68k_info *info = (m68k_info *)PrinterInfo; cs_m68k *ext = &info->extension; cs_detail *detail = NULL; int i = 0; detail = MI->flat_insn->detail; if (detail) { int regs_read_count = m68k_min(m68k_sizeof_array(detail->regs_read), info->regs_read_count); int regs_write_count = m68k_min(m68k_sizeof_array(detail->regs_write), info->regs_write_count); int groups_count = m68k_min(m68k_sizeof_array(detail->groups), info->groups_count); memcpy(&detail->m68k, ext, sizeof(cs_m68k)); memcpy(&detail->regs_read, &info->regs_read, regs_read_count * sizeof(uint16_t)); detail->regs_read_count = regs_read_count; memcpy(&detail->regs_write, &info->regs_write, regs_write_count * sizeof(uint16_t)); detail->regs_write_count = regs_write_count; memcpy(&detail->groups, &info->groups, groups_count); detail->groups_count = groups_count; } if (MI->Opcode == M68K_INS_INVALID) { if (ext->op_count) SStream_concat(O, "dc.w $%x", ext->operands[0].imm); else SStream_concat(O, "dc.w $"); return; } SStream_concat0(O, (char*)s_instruction_names[MI->Opcode]); switch (ext->op_size.type) { case M68K_SIZE_TYPE_INVALID : break; case M68K_SIZE_TYPE_CPU : switch (ext->op_size.cpu_size) { case M68K_CPU_SIZE_BYTE: SStream_concat0(O, ".b"); break; case M68K_CPU_SIZE_WORD: SStream_concat0(O, ".w"); break; case M68K_CPU_SIZE_LONG: SStream_concat0(O, ".l"); break; case M68K_CPU_SIZE_NONE: break; } break; case M68K_SIZE_TYPE_FPU : switch (ext->op_size.fpu_size) { case M68K_FPU_SIZE_SINGLE: SStream_concat0(O, ".s"); break; case M68K_FPU_SIZE_DOUBLE: SStream_concat0(O, ".d"); break; case M68K_FPU_SIZE_EXTENDED: SStream_concat0(O, ".x"); break; case M68K_FPU_SIZE_NONE: break; } break; } SStream_concat0(O, " "); // this one is a bit spacial so we do special things if (MI->Opcode == M68K_INS_CAS2) { int reg_value_0, reg_value_1; printAddressingMode(O, info->pc, ext, &ext->operands[0]); SStream_concat0(O, ","); printAddressingMode(O, info->pc, ext, &ext->operands[1]); SStream_concat0(O, ","); reg_value_0 = ext->operands[2].register_bits >> 4; reg_value_1 = ext->operands[2].register_bits & 0xf; SStream_concat(O, "(%s):(%s)", s_reg_names[M68K_REG_D0 + reg_value_0], s_reg_names[M68K_REG_D0 + reg_value_1]); return; } for (i = 0; i < ext->op_count; ++i) { printAddressingMode(O, info->pc, ext, &ext->operands[i]); if ((i + 1) != ext->op_count) SStream_concat(O, ",%s", s_spacing); } #endif } const char* M68K_reg_name(csh handle, unsigned int reg) { #ifdef CAPSTONE_DIET return NULL; #else if (reg >= ARR_SIZE(s_reg_names)) { return NULL; } return s_reg_names[(int)reg]; #endif } void M68K_get_insn_id(cs_struct* h, cs_insn* insn, unsigned int id) { insn->id = id; // These id's matches for 68k } const char* M68K_insn_name(csh handle, unsigned int id) { #ifdef CAPSTONE_DIET return NULL; #else return s_instruction_names[id]; #endif } #ifndef CAPSTONE_DIET static name_map group_name_maps[] = { { M68K_GRP_INVALID , NULL }, { M68K_GRP_JUMP, "jump" }, { M68K_GRP_RET , "ret" }, { M68K_GRP_IRET, "iret" }, { M68K_GRP_BRANCH_RELATIVE, "branch_relative" }, }; #endif const char *M68K_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } capstone-sys-0.11.0/capstone/arch/M68K/M68KInstPrinter.h010066400017500001750000000012731363402546700207370ustar0000000000000000/* Capstone Disassembly Engine */ /* M68K Backend by Daniel Collin 2015 */ #ifndef CS_M68KINSTPRINTER_H #define CS_M68KINSTPRINTER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" struct SStream; void M68K_init(MCRegisterInfo *MRI); void M68K_printInst(MCInst* MI, struct SStream* O, void* Info); const char* M68K_reg_name(csh handle, unsigned int reg); void M68K_get_insn_id(cs_struct* h, cs_insn* insn, unsigned int id); const char *M68K_insn_name(csh handle, unsigned int id); const char* M68K_group_name(csh handle, unsigned int id); void M68K_post_printer(csh handle, cs_insn* flat_insn, char* insn_asm, MCInst* mci); #endif capstone-sys-0.11.0/capstone/arch/M68K/M68KInstructionTable.inc010066400017500001750000075123021363402546700223000ustar0000000000000000/* This table is auto-generated. DO NOT MANUALLY EDIT! Look in M68KInstructionTblGen.c for more info */ static instruction_struct g_instruction_table[] = { { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_ori_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_to_ccr, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_ori_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_to_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_ori_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68020_chk2_cmp2_8, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_andi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_to_ccr, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_andi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_to_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_andi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68020_chk2_cmp2_16, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_subi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_subi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_subi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68020_chk2_cmp2_32, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_addi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_addi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_addi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_rtm, 0x0, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68020_callm, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_btst_s, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_bchg_s, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_bclr_s, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_bset_s, 0xfe00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_eori_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_to_ccr, 0xff00, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_eori_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_to_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_eori_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68020_cas_8, 0xfe38, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68000_cmpi_8, 0x0, 0x0 }, { d68020_cmpi_pcdi_8, 0x0, 0x0 }, { d68020_cmpi_pcix_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68000_cmpi_16, 0x0, 0x0 }, { d68020_cmpi_pcdi_16, 0x0, 0x0 }, { d68020_cmpi_pcix_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68000_cmpi_32, 0x0, 0x0 }, { d68020_cmpi_pcdi_32, 0x0, 0x0 }, { d68020_cmpi_pcix_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68020_cas_16, 0xfe38, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_cas2_16, 0xe38, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68010_moves_8, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68010_moves_16, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68010_moves_32, 0x7ff, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68020_cas_32, 0xfe38, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_cas2_32, 0xe38, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_movep_er_16, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_btst_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_movep_er_32, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_bchg_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_movep_re_16, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_bclr_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_movep_re_32, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_bset_r, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { 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0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_negx_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_negx_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_move_fr_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_clr_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_clr_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_clr_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68010_move_fr_ccr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_neg_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_neg_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_neg_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_move_to_ccr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_not_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_not_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_not_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_move_to_sr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68020_link_32, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_nbcd, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68000_swap, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68010_bkpt, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_pea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_ext_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_pd_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_movem_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_ext_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_pd_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_movem_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68020_extb_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68000_tst_8, 0x0, 0x0 }, { d68020_tst_pcdi_8, 0x0, 0x0 }, { d68020_tst_pcix_8, 0x0, 0x0 }, { d68020_tst_i_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68020_tst_a_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68000_tst_16, 0x0, 0x0 }, { d68020_tst_pcdi_16, 0x0, 0x0 }, { d68020_tst_pcix_16, 0x0, 0x0 }, { d68020_tst_i_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68020_tst_a_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68000_tst_32, 0x0, 0x0 }, { d68020_tst_pcdi_32, 0x0, 0x0 }, { d68020_tst_pcix_32, 0x0, 0x0 }, { d68020_tst_i_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_tas, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_illegal, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68020_mull, 0x83f8, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68020_divl, 0x83f8, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_movem_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_movem_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_trap, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_link_16, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_unlk, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_to_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_move_fr_usp, 0x0, 0x0 }, { d68000_reset, 0x0, 0x0 }, { d68000_nop, 0x0, 0x0 }, { d68000_stop, 0x0, 0x0 }, { d68000_rte, 0x0, 0x0 }, { d68010_rtd, 0x0, 0x0 }, { d68000_rts, 0x0, 0x0 }, { d68000_trapv, 0x0, 0x0 }, { d68000_rtr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68010_movec, 0x0, 0x0 }, { d68010_movec, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_jsr, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_jmp, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68020_chk_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_chk_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_lea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_dbra, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { 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d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_addq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_addq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_addq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_subq_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_subq_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_subq_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_dbcc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68000_scc, 0x0, 0x0 }, { d68020_trapcc_16, 0x0, 0x0 }, { d68020_trapcc_32, 0x0, 0x0 }, { d68020_trapcc_0, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_bra_16, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { d68000_bra_8, 0x0, 0x0 }, { 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0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { 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d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_or_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_or_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_or_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_divu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_rr, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_sbcd_mm, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_or_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_rr, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68020_pack_mm, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_or_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_rr, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68020_unpk_mm, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_or_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_divs, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_suba_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_sub_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_sub_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_sub_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_suba_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_rr_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_subx_mm_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_sub_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_rr_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_subx_mm_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_sub_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_rr_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_subx_mm_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { d68000_sub_re_32, 0x0, 0x0 }, { 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d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_1010, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_cmp_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_cmp_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_cmp_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_cmpa_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_cmpm_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_eor_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_cmpm_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_eor_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_cmpm_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_eor_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_cmpa_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_and_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_and_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_and_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_mulu, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_rr, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_abcd_mm, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_and_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_dd, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_exg_aa, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_and_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_exg_da, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_and_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_muls, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_add_er_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_add_er_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_add_er_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_adda_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_rr_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_addx_mm_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_add_re_8, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_rr_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_addx_mm_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_add_re_16, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_rr_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_addx_mm_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_add_re_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_adda_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_asr_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_asl_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_lsr_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_lsl_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_roxr_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_roxl_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_ror_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_rol_ea, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68020_bftst, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68020_bfextu, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68020_bfchg, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68020_bfexts, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68020_bfclr, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68020_bfffo, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_asr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_lsr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_roxr_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_ror_s_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_asr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_lsr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_roxr_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_ror_r_8, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_asr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_lsr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_roxr_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_ror_s_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_asr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_lsr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_roxr_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_ror_r_16, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_asr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_lsr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_roxr_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_ror_s_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_asr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_lsr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_roxr_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68000_ror_r_32, 0x0, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68020_bfset, 0xf000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_asl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_lsl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_roxl_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_rol_s_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_asl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_lsl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_roxl_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_rol_r_8, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_asl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_lsl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_roxl_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_rol_s_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_asl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_lsl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_roxl_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_rol_r_16, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_asl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_lsl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_roxl_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_rol_s_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_asl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_lsl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_roxl_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68000_rol_r_32, 0x0, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68020_bfins, 0x8000, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68000_invalid, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cinv, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68040_cpush, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_pi_al, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_al_pi, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_ai_al, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_al_ai, 0x0, 0x0 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68040_move16_pi_pi, 0x8fff, 0x8000 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpgen, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpdbcc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cpscc, 0x0, 0x0 }, { d68020_cptrapcc_16, 0x0, 0x0 }, { d68020_cptrapcc_32, 0x0, 0x0 }, { d68020_cptrapcc_0, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_16, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68020_cpbcc_32, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68020_cpsave, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68020_cprestore, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 }, { d68000_1111, 0x0, 0x0 } }; capstone-sys-0.11.0/capstone/arch/M68K/M68KModule.c010066400017500001750000000015001363402546700176670ustar0000000000000000/* Capstone Disassembly Engine */ /* M68K Backend by Daniel Collin 2015 */ #ifdef CAPSTONE_HAS_M68K #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "M68KDisassembler.h" #include "M68KInstPrinter.h" #include "M68KModule.h" cs_err M68K_global_init(cs_struct *ud) { m68k_info *info; info = cs_mem_malloc(sizeof(m68k_info)); if (!info) { return CS_ERR_MEM; } ud->printer = M68K_printInst; ud->printer_info = info; ud->getinsn_info = NULL; ud->disasm = M68K_getInstruction; ud->skipdata_size = 2; ud->post_printer = NULL; ud->reg_name = M68K_reg_name; ud->insn_id = M68K_get_insn_id; ud->insn_name = M68K_insn_name; ud->group_name = M68K_group_name; return CS_ERR_OK; } cs_err M68K_option(cs_struct *handle, cs_opt_type type, size_t value) { return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/M68K/M68KModule.h010066400017500001750000000004351363402546700177020ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_M68K_MODULE_H #define CS_M68K_MODULE_H #include "../../utils.h" cs_err M68K_global_init(cs_struct *ud); cs_err M68K_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsDisassembler.c010066400017500001750000001454531363402546700215450ustar0000000000000000//===- MipsDisassembler.cpp - Disassembler for Mips -------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file is part of the Mips Disassembler. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_MIPS #include #include #include "capstone/platform.h" #include "MipsDisassembler.h" #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" #include "../../MathExtras.h" //#include "Mips.h" //#include "MipsRegisterInfo.h" //#include "MipsSubtarget.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCInst.h" //#include "llvm/MC/MCSubtargetInfo.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" // Forward declare these because the autogenerated code will reference them. // Definitions are further down. static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeGPRMM16RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodePtrRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeDSPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeFGR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeFGR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeCCRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeFCCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeCCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeFGRCCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeHWRegsRegisterClass(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeAFGR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeACC64DSPRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeHI32DSPRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeLO32DSPRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMSA128BRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMSA128HRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMSA128WRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMSA128DRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMSACtrlRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeCOP2RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBranchTarget(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeJumpTarget(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBranchTarget21(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBranchTarget26(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder); // DecodeBranchTarget7MM - Decode microMIPS branch offset, which is // shifted left by 1 bit. static DecodeStatus DecodeBranchTarget7MM(MCInst *Inst, unsigned Offset, uint64_t Address, MCRegisterInfo *Decoder); // DecodeBranchTarget10MM - Decode microMIPS branch offset, which is // shifted left by 1 bit. static DecodeStatus DecodeBranchTarget10MM(MCInst *Inst, unsigned Offset, uint64_t Address, MCRegisterInfo *Decoder); // DecodeBranchTargetMM - Decode microMIPS branch offset, which is // shifted left by 1 bit. static DecodeStatus DecodeBranchTargetMM(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder); // DecodeJumpTargetMM - Decode microMIPS jump target, which is // shifted left by 1 bit. static DecodeStatus DecodeJumpTargetMM(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMem(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeCacheOp(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeCacheOpR6(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeCacheOpMM(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeSyncI(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeMSA128Mem(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMemMMImm4(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeMemMMImm12(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeMemMMImm16(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeFMem(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeFMem2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeFMem3(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeFMemCop2R6(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeSpecial3LlSc(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeAddiur2Simm7(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeUImm6Lsl2(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeLiSimm7(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeSimm4(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeSimm16(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); // Decode the immediate field of an LSA instruction which // is off by one. static DecodeStatus DecodeLSAImm(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeInsSize(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeExtSize(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeSimm19Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeSimm18Lsl3(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeSimm9SP(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeANDI16Imm(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeUImm5lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeSimm23Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder); /// INSVE_[BHWD] have an implicit operand that the generated decoder doesn't /// handle. static DecodeStatus DecodeINSVE_DF_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeAddiGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeDaddiGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBlezlGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBgtzlGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBgtzGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeBlezGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeRegListOperand(MCInst *Inst, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder); static DecodeStatus DecodeRegListOperand16(MCInst *Inst, uint32_t insn, uint64_t Address, MCRegisterInfo *Decoder); static DecodeStatus DecodeMovePRegPair(MCInst *Inst, uint32_t insn, uint64_t Address, MCRegisterInfo *Decoder); #define GET_SUBTARGETINFO_ENUM #include "MipsGenSubtargetInfo.inc" // Hacky: enable all features for disassembler static uint64_t getFeatureBits(int mode) { uint64_t Bits = (uint64_t)-1; // include every features at first // By default we do not support Mips1 Bits &= ~Mips_FeatureMips1; // No MicroMips Bits &= ~Mips_FeatureMicroMips; // ref: MipsGenDisassemblerTables.inc::checkDecoderPredicate() // some features are mutually execlusive if (mode & CS_MODE_16) { //Bits &= ~Mips_FeatureMips32r2; //Bits &= ~Mips_FeatureMips32; //Bits &= ~Mips_FeatureFPIdx; //Bits &= ~Mips_FeatureBitCount; //Bits &= ~Mips_FeatureSwap; //Bits &= ~Mips_FeatureSEInReg; //Bits &= ~Mips_FeatureMips64r2; //Bits &= ~Mips_FeatureFP64Bit; } else if (mode & CS_MODE_32) { Bits &= ~Mips_FeatureMips16; Bits &= ~Mips_FeatureFP64Bit; Bits &= ~Mips_FeatureMips64r2; Bits &= ~Mips_FeatureMips32r6; Bits &= ~Mips_FeatureMips64r6; } else if (mode & CS_MODE_64) { Bits &= ~Mips_FeatureMips16; Bits &= ~Mips_FeatureMips64r6; Bits &= ~Mips_FeatureMips32r6; } else if (mode & CS_MODE_MIPS32R6) { Bits |= Mips_FeatureMips32r6; Bits &= ~Mips_FeatureMips16; Bits &= ~Mips_FeatureFP64Bit; Bits &= ~Mips_FeatureMips64r6; Bits &= ~Mips_FeatureMips64r2; } if (mode & CS_MODE_MICRO) { Bits |= Mips_FeatureMicroMips; Bits &= ~Mips_FeatureMips4_32r2; Bits &= ~Mips_FeatureMips2; } return Bits; } #include "MipsGenDisassemblerTables.inc" #define GET_REGINFO_ENUM #include "MipsGenRegisterInfo.inc" #define GET_REGINFO_MC_DESC #include "MipsGenRegisterInfo.inc" #define GET_INSTRINFO_ENUM #include "MipsGenInstrInfo.inc" void Mips_init(MCRegisterInfo *MRI) { // InitMCRegisterInfo(MipsRegDesc, 394, RA, PC, // MipsMCRegisterClasses, 62, // MipsRegUnitRoots, // 273, // MipsRegDiffLists, // MipsLaneMaskLists, // MipsRegStrings, // MipsRegClassStrings, // MipsSubRegIdxLists, // 12, // MipsSubRegIdxRanges, // MipsRegEncodingTable); MCRegisterInfo_InitMCRegisterInfo(MRI, MipsRegDesc, 394, 0, 0, MipsMCRegisterClasses, 62, 0, 0, MipsRegDiffLists, 0, MipsSubRegIdxLists, 12, 0); } /// Read two bytes from the ArrayRef and return 16 bit halfword sorted /// according to the given endianess. static void readInstruction16(unsigned char *code, uint32_t *insn, bool isBigEndian) { // We want to read exactly 2 Bytes of data. if (isBigEndian) *insn = (code[0] << 8) | code[1]; else *insn = (code[1] << 8) | code[0]; } /// readInstruction - read four bytes from the MemoryObject /// and return 32 bit word sorted according to the given endianess static void readInstruction32(unsigned char *code, uint32_t *insn, bool isBigEndian, bool isMicroMips) { // High 16 bits of a 32-bit microMIPS instruction (where the opcode is) // always precede the low 16 bits in the instruction stream (that is, they // are placed at lower addresses in the instruction stream). // // microMIPS byte ordering: // Big-endian: 0 | 1 | 2 | 3 // Little-endian: 1 | 0 | 3 | 2 // We want to read exactly 4 Bytes of data. if (isBigEndian) { // Encoded as a big-endian 32-bit word in the stream. *insn = (code[3] << 0) | (code[2] << 8) | (code[1] << 16) | ((uint32_t) code[0] << 24); } else { if (isMicroMips) { *insn = (code[2] << 0) | (code[3] << 8) | (code[0] << 16) | ((uint32_t) code[1] << 24); } else { *insn = (code[0] << 0) | (code[1] << 8) | (code[2] << 16) | ((uint32_t) code[3] << 24); } } } static DecodeStatus MipsDisassembler_getInstruction(int mode, MCInst *instr, const uint8_t *code, size_t code_len, uint16_t *Size, uint64_t Address, bool isBigEndian, MCRegisterInfo *MRI) { uint32_t Insn; DecodeStatus Result; if (instr->flat_insn->detail) { memset(instr->flat_insn->detail, 0, offsetof(cs_detail, mips)+sizeof(cs_mips)); } if (mode & CS_MODE_MICRO) { if (code_len < 2) // not enough data return MCDisassembler_Fail; readInstruction16((unsigned char*)code, &Insn, isBigEndian); // Calling the auto-generated decoder function. Result = decodeInstruction(DecoderTableMicroMips16, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 2; return Result; } if (code_len < 4) // not enough data return MCDisassembler_Fail; readInstruction32((unsigned char*)code, &Insn, isBigEndian, true); //DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n"); // Calling the auto-generated decoder function. Result = decodeInstruction(DecoderTableMicroMips32, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 4; return Result; } return MCDisassembler_Fail; } if (code_len < 4) // not enough data return MCDisassembler_Fail; readInstruction32((unsigned char*)code, &Insn, isBigEndian, false); if ((mode & CS_MODE_MIPS2) && ((mode & CS_MODE_MIPS3) == 0)) { // DEBUG(dbgs() << "Trying COP3_ table (32-bit opcodes):\n"); Result = decodeInstruction(DecoderTableCOP3_32, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 4; return Result; } } if ((mode & CS_MODE_MIPS32R6) && (mode & CS_MODE_MIPS64)) { // DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n"); Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 4; return Result; } } if (mode & CS_MODE_MIPS32R6) { // DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n"); Result = decodeInstruction(DecoderTableMips32r6_64r632, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 4; return Result; } } if (mode & CS_MODE_MIPS64) { // DEBUG(dbgs() << "Trying Mips64 (GPR64) table (32-bit opcodes):\n"); Result = decodeInstruction(DecoderTableMips6432, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 4; return Result; } } // DEBUG(dbgs() << "Trying Mips table (32-bit opcodes):\n"); // Calling the auto-generated decoder function. Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address, MRI, mode); if (Result != MCDisassembler_Fail) { *Size = 4; return Result; } return MCDisassembler_Fail; } bool Mips_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; DecodeStatus status = MipsDisassembler_getInstruction(handle->mode, instr, code, code_len, size, address, MODE_IS_BIG_ENDIAN(handle->mode), (MCRegisterInfo *)info); return status == MCDisassembler_Success; } static unsigned getReg(const MCRegisterInfo *MRI, unsigned RC, unsigned RegNo) { const MCRegisterClass *rc = MCRegisterInfo_getRegClass(MRI, RC); return rc->RegsBegin[RegNo]; } static DecodeStatus DecodeINSVE_DF_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { typedef DecodeStatus (*DecodeFN)(MCInst *, unsigned, uint64_t, const MCRegisterInfo *); // The size of the n field depends on the element size // The register class also depends on this. uint32_t tmp = fieldFromInstruction(insn, 17, 5); unsigned NSize = 0; DecodeFN RegDecoder = NULL; if ((tmp & 0x18) == 0x00) { // INSVE_B NSize = 4; RegDecoder = DecodeMSA128BRegisterClass; } else if ((tmp & 0x1c) == 0x10) { // INSVE_H NSize = 3; RegDecoder = DecodeMSA128HRegisterClass; } else if ((tmp & 0x1e) == 0x18) { // INSVE_W NSize = 2; RegDecoder = DecodeMSA128WRegisterClass; } else if ((tmp & 0x1f) == 0x1c) { // INSVE_D NSize = 1; RegDecoder = DecodeMSA128DRegisterClass; } //else llvm_unreachable("Invalid encoding"); //assert(NSize != 0 && RegDecoder != nullptr); if (NSize == 0 || RegDecoder == NULL) return MCDisassembler_Fail; // $wd tmp = fieldFromInstruction(insn, 6, 5); if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; // $wd_in if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; // $n tmp = fieldFromInstruction(insn, 16, NSize); MCOperand_CreateImm0(MI, tmp); // $ws tmp = fieldFromInstruction(insn, 11, 5); if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; // $n2 MCOperand_CreateImm0(MI, 0); return MCDisassembler_Success; } static DecodeStatus DecodeAddiGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the ADDI instruction from the earlier // ISA's instead). // // We have: // 0b001000 sssss ttttt iiiiiiiiiiiiiiii // BOVC if rs >= rt // BEQZALC if rs == 0 && rt != 0 // BEQC if rs < rt && rs != 0 uint32_t Rs = fieldFromInstruction(insn, 21, 5); uint32_t Rt = fieldFromInstruction(insn, 16, 5); uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; bool HasRs = false; if (Rs >= Rt) { MCInst_setOpcode(MI, Mips_BOVC); HasRs = true; } else if (Rs != 0 && Rs < Rt) { MCInst_setOpcode(MI, Mips_BEQC); HasRs = true; } else MCInst_setOpcode(MI, Mips_BEQZALC); if (HasRs) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); MCOperand_CreateImm0(MI, Imm); return MCDisassembler_Success; } static DecodeStatus DecodeDaddiGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the ADDI instruction from the earlier // ISA's instead). // // We have: // 0b011000 sssss ttttt iiiiiiiiiiiiiiii // BNVC if rs >= rt // BNEZALC if rs == 0 && rt != 0 // BNEC if rs < rt && rs != 0 uint32_t Rs = fieldFromInstruction(insn, 21, 5); uint32_t Rt = fieldFromInstruction(insn, 16, 5); uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; bool HasRs = false; if (Rs >= Rt) { MCInst_setOpcode(MI, Mips_BNVC); HasRs = true; } else if (Rs != 0 && Rs < Rt) { MCInst_setOpcode(MI, Mips_BNEC); HasRs = true; } else MCInst_setOpcode(MI, Mips_BNEZALC); if (HasRs) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); MCOperand_CreateImm0(MI, Imm); return MCDisassembler_Success; } static DecodeStatus DecodeBlezlGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BLEZL instruction from the earlier // ISA's instead). // // We have: // 0b010110 sssss ttttt iiiiiiiiiiiiiiii // Invalid if rs == 0 // BLEZC if rs == 0 && rt != 0 // BGEZC if rs == rt && rt != 0 // BGEC if rs != rt && rs != 0 && rt != 0 uint32_t Rs = fieldFromInstruction(insn, 21, 5); uint32_t Rt = fieldFromInstruction(insn, 16, 5); uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; bool HasRs = false; if (Rt == 0) return MCDisassembler_Fail; else if (Rs == 0) MCInst_setOpcode(MI, Mips_BLEZC); else if (Rs == Rt) MCInst_setOpcode(MI, Mips_BGEZC); else { HasRs = true; MCInst_setOpcode(MI, Mips_BGEC); } if (HasRs) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); MCOperand_CreateImm0(MI, Imm); return MCDisassembler_Success; } static DecodeStatus DecodeBgtzlGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BGTZL instruction from the earlier // ISA's instead). // // We have: // 0b010111 sssss ttttt iiiiiiiiiiiiiiii // Invalid if rs == 0 // BGTZC if rs == 0 && rt != 0 // BLTZC if rs == rt && rt != 0 // BLTC if rs != rt && rs != 0 && rt != 0 bool HasRs = false; uint32_t Rs = fieldFromInstruction(insn, 21, 5); uint32_t Rt = fieldFromInstruction(insn, 16, 5); uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; if (Rt == 0) return MCDisassembler_Fail; else if (Rs == 0) MCInst_setOpcode(MI, Mips_BGTZC); else if (Rs == Rt) MCInst_setOpcode(MI, Mips_BLTZC); else { MCInst_setOpcode(MI, Mips_BLTC); HasRs = true; } if (HasRs) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); MCOperand_CreateImm0(MI, Imm); return MCDisassembler_Success; } static DecodeStatus DecodeBgtzGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BGTZ instruction from the earlier // ISA's instead). // // We have: // 0b000111 sssss ttttt iiiiiiiiiiiiiiii // BGTZ if rt == 0 // BGTZALC if rs == 0 && rt != 0 // BLTZALC if rs != 0 && rs == rt // BLTUC if rs != 0 && rs != rt uint32_t Rs = fieldFromInstruction(insn, 21, 5); uint32_t Rt = fieldFromInstruction(insn, 16, 5); uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; bool HasRs = false; bool HasRt = false; if (Rt == 0) { MCInst_setOpcode(MI, Mips_BGTZ); HasRs = true; } else if (Rs == 0) { MCInst_setOpcode(MI, Mips_BGTZALC); HasRt = true; } else if (Rs == Rt) { MCInst_setOpcode(MI, Mips_BLTZALC); HasRs = true; } else { MCInst_setOpcode(MI, Mips_BLTUC); HasRs = true; HasRt = true; } if (HasRs) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); if (HasRt) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); MCOperand_CreateImm0(MI, Imm); return MCDisassembler_Success; } static DecodeStatus DecodeBlezGroupBranch_4(MCInst *MI, uint32_t insn, uint64_t Address, const MCRegisterInfo *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BLEZL instruction from the earlier // ISA's instead). // // We have: // 0b000110 sssss ttttt iiiiiiiiiiiiiiii // Invalid if rs == 0 // BLEZALC if rs == 0 && rt != 0 // BGEZALC if rs == rt && rt != 0 // BGEUC if rs != rt && rs != 0 && rt != 0 uint32_t Rs = fieldFromInstruction(insn, 21, 5); uint32_t Rt = fieldFromInstruction(insn, 16, 5); uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; bool HasRs = false; if (Rt == 0) return MCDisassembler_Fail; else if (Rs == 0) MCInst_setOpcode(MI, Mips_BLEZALC); else if (Rs == Rt) MCInst_setOpcode(MI, Mips_BGEZALC); else { HasRs = true; MCInst_setOpcode(MI, Mips_BGEUC); } if (HasRs) MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); MCOperand_CreateImm0(MI, Imm); return MCDisassembler_Success; } static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { return MCDisassembler_Fail; } static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_GPR64RegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeGPRMM16RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 7) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_GPRMM16RegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 7) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_GPRMM16ZeroRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 7) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_GPRMM16MovePRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_GPR32RegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodePtrRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { // if (static_cast(Decoder)->isGP64()) if (Inst->csh->mode & CS_MODE_MIPS64) return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder); return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); } static DecodeStatus DecodeDSPRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); } static DecodeStatus DecodeFGR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_FGR64RegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeFGR32RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_FGR32RegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeCCRRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_CCRRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeFCCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 7) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_FCCRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeCCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 7) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_CCRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeFGRCCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_FGRCCRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeMem(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); int opcode = MCInst_getOpcode(Inst); Reg = getReg(Decoder, Mips_GPR32RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); if (opcode == Mips_SC || opcode == Mips_SCD) { MCOperand_CreateReg0(Inst, Reg); } MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeCacheOp(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Hint = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); MCOperand_CreateImm0(Inst, Hint); return MCDisassembler_Success; } static DecodeStatus DecodeCacheOpMM(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xfff, 12); unsigned Base = fieldFromInstruction(Insn, 16, 5); unsigned Hint = fieldFromInstruction(Insn, 21, 5); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); MCOperand_CreateImm0(Inst, Hint); return MCDisassembler_Success; } static DecodeStatus DecodeCacheOpR6(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = fieldFromInstruction(Insn, 7, 9); unsigned Hint = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); MCOperand_CreateImm0(Inst, Hint); return MCDisassembler_Success; } static DecodeStatus DecodeSyncI(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Base = fieldFromInstruction(Insn, 21, 5); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeMSA128Mem(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int Offset = SignExtend32(fieldFromInstruction(Insn, 16, 10), 10); unsigned Reg = fieldFromInstruction(Insn, 6, 5); unsigned Base = fieldFromInstruction(Insn, 11, 5); Reg = getReg(Decoder, Mips_MSA128BRegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); // MCOperand_CreateImm0(Inst, Offset); // The immediate field of an LD/ST instruction is scaled which means it must // be multiplied (when decoding) by the size (in bytes) of the instructions' // data format. // .b - 1 byte // .h - 2 bytes // .w - 4 bytes // .d - 8 bytes switch(MCInst_getOpcode(Inst)) { default: //assert (0 && "Unexpected instruction"); return MCDisassembler_Fail; break; case Mips_LD_B: case Mips_ST_B: MCOperand_CreateImm0(Inst, Offset); break; case Mips_LD_H: case Mips_ST_H: MCOperand_CreateImm0(Inst, Offset * 2); break; case Mips_LD_W: case Mips_ST_W: MCOperand_CreateImm0(Inst, Offset * 4); break; case Mips_LD_D: case Mips_ST_D: MCOperand_CreateImm0(Inst, Offset * 8); break; } return MCDisassembler_Success; } static DecodeStatus DecodeMemMMImm4(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Offset = Insn & 0xf; unsigned Reg = fieldFromInstruction(Insn, 7, 3); unsigned Base = fieldFromInstruction(Insn, 4, 3); switch (MCInst_getOpcode(Inst)) { case Mips_LBU16_MM: case Mips_LHU16_MM: case Mips_LW16_MM: if (DecodeGPRMM16RegisterClass(Inst, Reg, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; break; case Mips_SB16_MM: case Mips_SH16_MM: case Mips_SW16_MM: if (DecodeGPRMM16ZeroRegisterClass(Inst, Reg, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; break; } if (DecodeGPRMM16RegisterClass(Inst, Base, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; switch (MCInst_getOpcode(Inst)) { case Mips_LBU16_MM: if (Offset == 0xf) MCOperand_CreateImm0(Inst, -1); else MCOperand_CreateImm0(Inst, Offset); break; case Mips_SB16_MM: MCOperand_CreateImm0(Inst, Offset); break; case Mips_LHU16_MM: case Mips_SH16_MM: MCOperand_CreateImm0(Inst, Offset << 1); break; case Mips_LW16_MM: case Mips_SW16_MM: MCOperand_CreateImm0(Inst, Offset << 2); break; } return MCDisassembler_Success; } static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Offset = Insn & 0x1F; unsigned Reg = fieldFromInstruction(Insn, 5, 5); Reg = getReg(Decoder, Mips_GPR32RegClassID, Reg); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Mips_SP); MCOperand_CreateImm0(Inst, Offset << 2); return MCDisassembler_Success; } static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Offset = Insn & 0x7F; unsigned Reg = fieldFromInstruction(Insn, 7, 3); Reg = getReg(Decoder, Mips_GPR32RegClassID, Reg); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Mips_GP); MCOperand_CreateImm0(Inst, Offset << 2); return MCDisassembler_Success; } static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xf, 4); if (DecodeRegListOperand16(Inst, Insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, Mips_SP); MCOperand_CreateImm0(Inst, Offset * 4); return MCDisassembler_Success; } static DecodeStatus DecodeMemMMImm12(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0x0fff, 12); unsigned Reg = fieldFromInstruction(Insn, 21, 5); unsigned Base = fieldFromInstruction(Insn, 16, 5); Reg = getReg(Decoder, Mips_GPR32RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); switch (MCInst_getOpcode(Inst)) { case Mips_SWM32_MM: case Mips_LWM32_MM: if (DecodeRegListOperand(Inst, Insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); break; case Mips_SC_MM: MCOperand_CreateReg0(Inst, Reg); // fallthrough default: MCOperand_CreateReg0(Inst, Reg); if (MCInst_getOpcode(Inst) == Mips_LWP_MM || MCInst_getOpcode(Inst) == Mips_SWP_MM) MCOperand_CreateReg0(Inst, Reg + 1); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); } return MCDisassembler_Success; } static DecodeStatus DecodeMemMMImm16(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Reg = fieldFromInstruction(Insn, 21, 5); unsigned Base = fieldFromInstruction(Insn, 16, 5); Reg = getReg(Decoder, Mips_GPR32RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeFMem(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); Reg = getReg(Decoder, Mips_FGR64RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeFMem2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); Reg = getReg(Decoder, Mips_COP2RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeFMem3(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0xffff, 16); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); Reg = getReg(Decoder, Mips_COP3RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeFMemCop2R6(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int Offset = SignExtend32(Insn & 0x07ff, 11); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 11, 5); Reg = getReg(Decoder, Mips_COP2RegClassID, Reg); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); MCOperand_CreateReg0(Inst, Reg); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeSpecial3LlSc(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int64_t Offset = SignExtend64((Insn >> 7) & 0x1ff, 9); unsigned Rt = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); Rt = getReg(Decoder, Mips_GPR32RegClassID, Rt); Base = getReg(Decoder, Mips_GPR32RegClassID, Base); if (MCInst_getOpcode(Inst) == Mips_SC_R6 || MCInst_getOpcode(Inst) == Mips_SCD_R6) { MCOperand_CreateReg0(Inst, Rt); } MCOperand_CreateReg0(Inst, Rt); MCOperand_CreateReg0(Inst, Base); MCOperand_CreateImm0(Inst, Offset); return MCDisassembler_Success; } static DecodeStatus DecodeHWRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { // Currently only hardware register 29 is supported. if (RegNo != 29) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, Mips_HWR29); return MCDisassembler_Success; } static DecodeStatus DecodeAFGR64RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 30 || RegNo % 2) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_AFGR64RegClassID, RegNo /2); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeACC64DSPRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo >= 4) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_ACC64DSPRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeHI32DSPRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo >= 4) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_HI32DSPRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeLO32DSPRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo >= 4) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_LO32DSPRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeMSA128BRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_MSA128BRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeMSA128HRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_MSA128HRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeMSA128WRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_MSA128WRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeMSA128DRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_MSA128DRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeMSACtrlRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 7) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_MSACtrlRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeCOP2RegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = getReg(Decoder, Mips_COP2RegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeBranchTarget(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder) { uint64_t TargetAddress = (SignExtend32(Offset, 16) * 4) + Address + 4; MCOperand_CreateImm0(Inst, TargetAddress); return MCDisassembler_Success; } static DecodeStatus DecodeJumpTarget(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { uint64_t TargetAddress = (fieldFromInstruction(Insn, 0, 26) << 2) | ((Address + 4) & ~0x0FFFFFFF); MCOperand_CreateImm0(Inst, TargetAddress); return MCDisassembler_Success; } static DecodeStatus DecodeBranchTarget21(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder) { int32_t BranchOffset = SignExtend32(Offset, 21) * 4; MCOperand_CreateImm0(Inst, BranchOffset); return MCDisassembler_Success; } static DecodeStatus DecodeBranchTarget26(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder) { int32_t BranchOffset = SignExtend32(Offset, 26) * 4; MCOperand_CreateImm0(Inst, BranchOffset); return MCDisassembler_Success; } static DecodeStatus DecodeBranchTarget7MM(MCInst *Inst, unsigned Offset, uint64_t Address, MCRegisterInfo *Decoder) { int32_t BranchOffset = SignExtend32(Offset, 7) * 2; MCOperand_CreateImm0(Inst, BranchOffset); return MCDisassembler_Success; } static DecodeStatus DecodeBranchTarget10MM(MCInst *Inst, unsigned Offset, uint64_t Address, MCRegisterInfo *Decoder) { int32_t BranchOffset = SignExtend32(Offset, 10) * 2; MCOperand_CreateImm0(Inst, BranchOffset); return MCDisassembler_Success; } static DecodeStatus DecodeBranchTargetMM(MCInst *Inst, unsigned Offset, uint64_t Address, const MCRegisterInfo *Decoder) { int32_t BranchOffset = SignExtend32(Offset, 16) * 2; MCOperand_CreateImm0(Inst, BranchOffset); return MCDisassembler_Success; } static DecodeStatus DecodeJumpTargetMM(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 1; MCOperand_CreateImm0(Inst, JumpOffset); return MCDisassembler_Success; } static DecodeStatus DecodeAddiur2Simm7(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder) { if (Value == 0) MCOperand_CreateImm0(Inst, 1); else if (Value == 0x7) MCOperand_CreateImm0(Inst, -1); else MCOperand_CreateImm0(Inst, Value << 2); return MCDisassembler_Success; } static DecodeStatus DecodeUImm6Lsl2(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, Value << 2); return MCDisassembler_Success; } static DecodeStatus DecodeLiSimm7(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder) { if (Value == 0x7F) MCOperand_CreateImm0(Inst, -1); else MCOperand_CreateImm0(Inst, Value); return MCDisassembler_Success; } static DecodeStatus DecodeSimm4(MCInst *Inst, unsigned Value, uint64_t Address, MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Value, 4)); return MCDisassembler_Success; } static DecodeStatus DecodeSimm16(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Insn, 16)); return MCDisassembler_Success; } static DecodeStatus DecodeLSAImm(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { // We add one to the immediate field as it was encoded as 'imm - 1'. MCOperand_CreateImm0(Inst, Insn + 1); return MCDisassembler_Success; } static DecodeStatus DecodeInsSize(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { // First we need to grab the pos(lsb) from MCInst. int Pos = (int)MCOperand_getImm(MCInst_getOperand(Inst, 2)); int Size = (int) Insn - Pos + 1; MCOperand_CreateImm0(Inst, SignExtend32(Size, 16)); return MCDisassembler_Success; } static DecodeStatus DecodeExtSize(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { int Size = (int)Insn + 1; MCOperand_CreateImm0(Inst, SignExtend32(Size, 16)); return MCDisassembler_Success; } static DecodeStatus DecodeSimm19Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Insn, 19) * 4); return MCDisassembler_Success; } static DecodeStatus DecodeSimm18Lsl3(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Insn, 18) * 8); return MCDisassembler_Success; } static DecodeStatus DecodeSimm9SP(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { int32_t DecodedValue; switch (Insn) { case 0: DecodedValue = 256; break; case 1: DecodedValue = 257; break; case 510: DecodedValue = -258; break; case 511: DecodedValue = -257; break; default: DecodedValue = SignExtend32(Insn, 9); break; } MCOperand_CreateImm0(Inst, DecodedValue * 4); return MCDisassembler_Success; } static DecodeStatus DecodeANDI16Imm(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { // Insn must be >= 0, since it is unsigned that condition is always true. // assert(Insn < 16); int32_t DecodedValues[] = {128, 1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 255, 32768, 65535}; if (Insn >= 16) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, DecodedValues[Insn]); return MCDisassembler_Success; } static DecodeStatus DecodeUImm5lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, Insn << 2); return MCDisassembler_Success; } static DecodeStatus DecodeRegListOperand(MCInst *Inst, unsigned Insn, uint64_t Address, const MCRegisterInfo *Decoder) { unsigned Regs[] = {Mips_S0, Mips_S1, Mips_S2, Mips_S3, Mips_S4, Mips_S5, Mips_S6, Mips_FP}; unsigned RegNum; unsigned int i; unsigned RegLst = fieldFromInstruction(Insn, 21, 5); // Empty register lists are not allowed. if (RegLst == 0) return MCDisassembler_Fail; RegNum = RegLst & 0xf; for (i = 0; i < MIN(RegNum, ARR_SIZE(Regs)); i++) MCOperand_CreateReg0(Inst, Regs[i]); if (RegLst & 0x10) MCOperand_CreateReg0(Inst, Mips_RA); return MCDisassembler_Success; } static DecodeStatus DecodeRegListOperand16(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { unsigned Regs[] = {Mips_S0, Mips_S1, Mips_S2, Mips_S3}; unsigned RegLst = fieldFromInstruction(Insn, 4, 2); unsigned RegNum = RegLst & 0x3; unsigned int i; for (i = 0; i <= RegNum; i++) MCOperand_CreateReg0(Inst, Regs[i]); MCOperand_CreateReg0(Inst, Mips_RA); return MCDisassembler_Success; } static DecodeStatus DecodeMovePRegPair(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { unsigned RegPair = fieldFromInstruction(Insn, 7, 3); switch (RegPair) { default: return MCDisassembler_Fail; case 0: MCOperand_CreateReg0(Inst, Mips_A1); MCOperand_CreateReg0(Inst, Mips_A2); break; case 1: MCOperand_CreateReg0(Inst, Mips_A1); MCOperand_CreateReg0(Inst, Mips_A3); break; case 2: MCOperand_CreateReg0(Inst, Mips_A2); MCOperand_CreateReg0(Inst, Mips_A3); break; case 3: MCOperand_CreateReg0(Inst, Mips_A0); MCOperand_CreateReg0(Inst, Mips_S5); break; case 4: MCOperand_CreateReg0(Inst, Mips_A0); MCOperand_CreateReg0(Inst, Mips_S6); break; case 5: MCOperand_CreateReg0(Inst, Mips_A0); MCOperand_CreateReg0(Inst, Mips_A1); break; case 6: MCOperand_CreateReg0(Inst, Mips_A0); MCOperand_CreateReg0(Inst, Mips_A2); break; case 7: MCOperand_CreateReg0(Inst, Mips_A0); MCOperand_CreateReg0(Inst, Mips_A3); break; } return MCDisassembler_Success; } static DecodeStatus DecodeSimm23Lsl2(MCInst *Inst, unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) { MCOperand_CreateImm0(Inst, SignExtend32(Insn, 23) * 4); return MCDisassembler_Success; } #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsDisassembler.h010066400017500001750000000006551363402546700215440ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_MIPSDISASSEMBLER_H #define CS_MIPSDISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCInst.h" #include "../../MCRegisterInfo.h" void Mips_init(MCRegisterInfo *MRI); bool Mips_getInstruction(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsGenAsmWriter.inc010066400017500001750000005211261363402546700220210ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 9396U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 9389U, // BUNDLE 9406U, // LIFETIME_START 9376U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 21660U, // ABSQ_S_PH 18025U, // ABSQ_S_QB 24850U, // ABSQ_S_W 134237992U, // ADD 18294U, // ADDIUPC 18294U, // ADDIUPC_MM 22527U, // ADDIUR1SP_MM 134234410U, // ADDIUR2_MM 8683851U, // ADDIUS5_MM 546875U, // ADDIUSP_MM 134239193U, // ADDQH_PH 134239310U, // ADDQH_R_PH 134242253U, // ADDQH_R_W 134241856U, // ADDQH_W 134239267U, // ADDQ_PH 134239366U, // ADDQ_S_PH 134242558U, // ADDQ_S_W 134236055U, // ADDSC 134234730U, // ADDS_A_B 134236180U, // ADDS_A_D 134238138U, // ADDS_A_H 134241564U, // ADDS_A_W 134235198U, // ADDS_S_B 134237269U, // ADDS_S_D 134238695U, // ADDS_S_H 134242608U, // ADDS_S_W 134235413U, // ADDS_U_B 134237736U, // ADDS_U_D 134238973U, // ADDS_U_H 134243026U, // ADDS_U_W 134234575U, // ADDU16_MM 134235621U, // ADDUH_QB 134235729U, // ADDUH_R_QB 134239465U, // ADDU_PH 134235834U, // ADDU_QB 134239410U, // ADDU_S_PH 134235775U, // ADDU_S_QB 2281718627U, // ADDVI_B 2281720348U, // ADDVI_D 2281722002U, // ADDVI_H 2281725637U, // ADDVI_W 134235491U, // ADDV_B 134237836U, // ADDV_D 134239051U, // ADDV_H 134243126U, // ADDV_W 134236094U, // ADDWC 134234712U, // ADD_A_B 134236161U, // ADD_A_D 134238120U, // ADD_A_H 134241545U, // ADD_A_W 134237992U, // ADD_MM 134239685U, // ADDi 134239685U, // ADDi_MM 134241307U, // ADDiu 134241307U, // ADDiu_MM 134241261U, // ADDu 134241261U, // ADDu_MM 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 134240158U, // ALIGN 18286U, // ALUIPC 134238014U, // AND 835930U, // AND16_MM 134238014U, // AND64 134234471U, // ANDI16_MM 2281718486U, // ANDI_B 134238014U, // AND_MM 134241389U, // AND_V 0U, // AND_V_D_PSEUDO 0U, // AND_V_H_PSEUDO 0U, // AND_V_W_PSEUDO 134239691U, // ANDi 134239691U, // ANDi64 134239691U, // ANDi_MM 134238028U, // APPEND 134235092U, // ASUB_S_B 134237099U, // ASUB_S_D 134238527U, // ASUB_S_H 134242388U, // ASUB_S_W 134235307U, // ASUB_U_B 134237566U, // ASUB_U_D 134238815U, // ASUB_U_H 134242856U, // ASUB_U_W 0U, // ATOMIC_CMP_SWAP_I16 0U, // ATOMIC_CMP_SWAP_I32 0U, // ATOMIC_CMP_SWAP_I64 0U, // ATOMIC_CMP_SWAP_I8 0U, // ATOMIC_LOAD_ADD_I16 0U, // ATOMIC_LOAD_ADD_I32 0U, // ATOMIC_LOAD_ADD_I64 0U, // ATOMIC_LOAD_ADD_I8 0U, // ATOMIC_LOAD_AND_I16 0U, // ATOMIC_LOAD_AND_I32 0U, // ATOMIC_LOAD_AND_I64 0U, // ATOMIC_LOAD_AND_I8 0U, // ATOMIC_LOAD_NAND_I16 0U, // ATOMIC_LOAD_NAND_I32 0U, // ATOMIC_LOAD_NAND_I64 0U, // ATOMIC_LOAD_NAND_I8 0U, // ATOMIC_LOAD_OR_I16 0U, // ATOMIC_LOAD_OR_I32 0U, // ATOMIC_LOAD_OR_I64 0U, // ATOMIC_LOAD_OR_I8 0U, // ATOMIC_LOAD_SUB_I16 0U, // ATOMIC_LOAD_SUB_I32 0U, // ATOMIC_LOAD_SUB_I64 0U, // ATOMIC_LOAD_SUB_I8 0U, // ATOMIC_LOAD_XOR_I16 0U, // ATOMIC_LOAD_XOR_I32 0U, // ATOMIC_LOAD_XOR_I64 0U, // ATOMIC_LOAD_XOR_I8 0U, // ATOMIC_SWAP_I16 0U, // ATOMIC_SWAP_I32 0U, // ATOMIC_SWAP_I64 0U, // ATOMIC_SWAP_I8 134239795U, // AUI 18279U, // AUIPC 134235178U, // AVER_S_B 134237249U, // AVER_S_D 134238665U, // AVER_S_H 134242588U, // AVER_S_W 134235393U, // AVER_U_B 134237716U, // AVER_U_D 134238953U, // AVER_U_H 134243006U, // AVER_U_W 134235120U, // AVE_S_B 134237181U, // AVE_S_D 134238597U, // AVE_S_H 134242470U, // AVE_S_W 134235335U, // AVE_U_B 134237648U, // AVE_U_D 134238885U, // AVE_U_H 134242938U, // AVE_U_W 23579U, // AddiuRxImmX16 1072155U, // AddiuRxPcImmX16 285236251U, // AddiuRxRxImm16 16800795U, // AddiuRxRxImmX16 25189403U, // AddiuRxRyOffMemX16 1336343U, // AddiuSpImm16 549911U, // AddiuSpImmX16 134241261U, // AdduRxRyRz16 16797502U, // AndRxRxRy16 0U, // B 541013U, // B16_MM 134241260U, // BADDu 546393U, // BAL 542494U, // BALC 134240157U, // BALIGN 0U, // BAL_BR 167788585U, // BBIT0 167788717U, // BBIT032 167788710U, // BBIT1 167788726U, // BBIT132 542473U, // BC 20351U, // BC0F 22218U, // BC0FL 23455U, // BC0T 22347U, // BC0TL 25733U, // BC1EQZ 20357U, // BC1F 22225U, // BC1FL 20357U, // BC1F_MM 25717U, // BC1NEZ 23461U, // BC1T 22354U, // BC1TL 23461U, // BC1T_MM 25741U, // BC2EQZ 20363U, // BC2F 22232U, // BC2FL 25725U, // BC2NEZ 23467U, // BC2T 22361U, // BC2TL 20369U, // BC3F 22239U, // BC3FL 23473U, // BC3T 22368U, // BC3TL 2281718555U, // BCLRI_B 2281720292U, // BCLRI_D 2281721946U, // BCLRI_H 2281725581U, // BCLRI_W 134235059U, // BCLR_B 134237023U, // BCLR_D 134238494U, // BCLR_H 134242304U, // BCLR_W 134240340U, // BEQ 134240340U, // BEQ64 134236044U, // BEQC 134240063U, // BEQL 16882U, // BEQZ16_MM 18246U, // BEQZALC 18394U, // BEQZC 18394U, // BEQZC_MM 134240340U, // BEQ_MM 134235917U, // BGEC 134236068U, // BGEUC 25500U, // BGEZ 25500U, // BGEZ64 22115U, // BGEZAL 18219U, // BGEZALC 22311U, // BGEZALL 23424U, // BGEZALS_MM 22115U, // BGEZAL_MM 18373U, // BGEZC 22391U, // BGEZL 25500U, // BGEZ_MM 25560U, // BGTZ 25560U, // BGTZ64 18255U, // BGTZALC 18401U, // BGTZC 22405U, // BGTZL 25560U, // BGTZ_MM 2298495744U, // BINSLI_B 2298497481U, // BINSLI_D 2298499135U, // BINSLI_H 2298502770U, // BINSLI_W 151012243U, // BINSL_B 151014033U, // BINSL_D 151015601U, // BINSL_H 151019280U, // BINSL_W 2298495805U, // BINSRI_B 2298497526U, // BINSRI_D 2298499180U, // BINSRI_H 2298502815U, // BINSRI_W 151012291U, // BINSR_B 151014289U, // BINSR_D 151015726U, // BINSR_H 151019570U, // BINSR_W 23733U, // BITREV 22477U, // BITSWAP 25506U, // BLEZ 25506U, // BLEZ64 18228U, // BLEZALC 18380U, // BLEZC 22398U, // BLEZL 25506U, // BLEZ_MM 134236062U, // BLTC 134236075U, // BLTUC 25566U, // BLTZ 25566U, // BLTZ64 22123U, // BLTZAL 18264U, // BLTZALC 22320U, // BLTZALL 23433U, // BLTZALS_MM 22123U, // BLTZAL_MM 18408U, // BLTZC 22412U, // BLTZL 25566U, // BLTZ_MM 2298495860U, // BMNZI_B 151018662U, // BMNZ_V 2298495852U, // BMZI_B 151018648U, // BMZ_V 134238058U, // BNE 134238058U, // BNE64 134235923U, // BNEC 2281718494U, // BNEGI_B 2281720240U, // BNEGI_D 2281721894U, // BNEGI_H 2281725529U, // BNEGI_W 134234814U, // BNEG_B 134236568U, // BNEG_D 134238222U, // BNEG_H 134241776U, // BNEG_W 134239940U, // BNEL 16874U, // BNEZ16_MM 18237U, // BNEZALC 18387U, // BNEZC 18387U, // BNEZC_MM 134238058U, // BNE_MM 134236082U, // BNVC 17803U, // BNZ_B 20233U, // BNZ_D 21363U, // BNZ_H 23711U, // BNZ_V 25463U, // BNZ_W 134236088U, // BOVC 540871U, // BPOSGE32 0U, // BPOSGE32_PSEUDO 22080U, // BREAK 65909U, // BREAK16_MM 22080U, // BREAK_MM 2298495719U, // BSELI_B 0U, // BSEL_D_PSEUDO 0U, // BSEL_FD_PSEUDO 0U, // BSEL_FW_PSEUDO 0U, // BSEL_H_PSEUDO 151018620U, // BSEL_V 0U, // BSEL_W_PSEUDO 2281718609U, // BSETI_B 2281720330U, // BSETI_D 2281721984U, // BSETI_H 2281725619U, // BSETI_W 134235275U, // BSET_B 134237385U, // BSET_D 134238783U, // BSET_H 134242762U, // BSET_W 17797U, // BZ_B 20217U, // BZ_D 21357U, // BZ_H 23698U, // BZ_V 25457U, // BZ_W 541278U, // B_MM_Pseudo 402678723U, // BeqzRxImm16 25539U, // BeqzRxImmX16 1327710U, // Bimm16 541278U, // BimmX16 402678696U, // BnezRxImm16 25512U, // BnezRxImmX16 9368U, // Break16 1598417U, // Bteqz16 536893428U, // BteqzT8CmpX16 536892936U, // BteqzT8CmpiX16 536894397U, // BteqzT8SltX16 536892966U, // BteqzT8SltiX16 536894505U, // BteqzT8SltiuX16 536894541U, // BteqzT8SltuX16 549841U, // BteqzX16 1598390U, // Btnez16 671111156U, // BtnezT8CmpX16 671110664U, // BtnezT8CmpiX16 671112125U, // BtnezT8SltX16 671110694U, // BtnezT8SltiX16 671112233U, // BtnezT8SltiuX16 671112269U, // BtnezT8SltuX16 549814U, // BtnezX16 0U, // BuildPairF64 0U, // BuildPairF64_64 85859U, // CACHE 85859U, // CACHE_MM 85859U, // CACHE_R6 19003U, // CEIL_L_D64 23031U, // CEIL_L_S 20179U, // CEIL_W_D32 20179U, // CEIL_W_D64 20179U, // CEIL_W_MM 23353U, // CEIL_W_S 23353U, // CEIL_W_S_MM 134234890U, // CEQI_B 134236627U, // CEQI_D 134238281U, // CEQI_H 134241916U, // CEQI_W 134235044U, // CEQ_B 134236930U, // CEQ_D 134238472U, // CEQ_H 134242192U, // CEQ_W 16444U, // CFC1 16444U, // CFC1_MM 16968U, // CFCMSA 134243407U, // CINS 134243363U, // CINS32 19639U, // CLASS_D 23205U, // CLASS_S 134235129U, // CLEI_S_B 134237190U, // CLEI_S_D 134238606U, // CLEI_S_H 134242479U, // CLEI_S_W 2281718992U, // CLEI_U_B 2281721305U, // CLEI_U_D 2281722542U, // CLEI_U_H 2281726595U, // CLEI_U_W 134235111U, // CLE_S_B 134237172U, // CLE_S_D 134238588U, // CLE_S_H 134242461U, // CLE_S_W 134235326U, // CLE_U_B 134237639U, // CLE_U_D 134238876U, // CLE_U_H 134242929U, // CLE_U_W 22452U, // CLO 22452U, // CLO_MM 22452U, // CLO_R6 134235149U, // CLTI_S_B 134237210U, // CLTI_S_D 134238626U, // CLTI_S_H 134242499U, // CLTI_S_W 2281719012U, // CLTI_U_B 2281721325U, // CLTI_U_D 2281722562U, // CLTI_U_H 2281726615U, // CLTI_U_W 134235217U, // CLT_S_B 134237288U, // CLT_S_D 134238714U, // CLT_S_H 134242627U, // CLT_S_W 134235444U, // CLT_U_B 134237767U, // CLT_U_D 134239004U, // CLT_U_H 134243057U, // CLT_U_W 25534U, // CLZ 25534U, // CLZ_MM 25534U, // CLZ_R6 134235667U, // CMPGDU_EQ_QB 134235572U, // CMPGDU_LE_QB 134235786U, // CMPGDU_LT_QB 134235681U, // CMPGU_EQ_QB 134235586U, // CMPGU_LE_QB 134235800U, // CMPGU_LT_QB 17966U, // CMPU_EQ_QB 17871U, // CMPU_LE_QB 18085U, // CMPU_LT_QB 134236919U, // CMP_EQ_D 21548U, // CMP_EQ_PH 134240864U, // CMP_EQ_S 134236489U, // CMP_F_D 134240675U, // CMP_F_S 134236333U, // CMP_LE_D 21444U, // CMP_LE_PH 134240596U, // CMP_LE_S 134237410U, // CMP_LT_D 21717U, // CMP_LT_PH 134240959U, // CMP_LT_S 134236507U, // CMP_SAF_D 134240685U, // CMP_SAF_S 134236946U, // CMP_SEQ_D 134240883U, // CMP_SEQ_S 134236370U, // CMP_SLE_D 134240625U, // CMP_SLE_S 134237437U, // CMP_SLT_D 134240978U, // CMP_SLT_S 134236994U, // CMP_SUEQ_D 134240914U, // CMP_SUEQ_S 134236418U, // CMP_SULE_D 134240656U, // CMP_SULE_S 134237485U, // CMP_SULT_D 134241009U, // CMP_SULT_S 134236876U, // CMP_SUN_D 134240837U, // CMP_SUN_S 134236974U, // CMP_UEQ_D 134240903U, // CMP_UEQ_S 134236398U, // CMP_ULE_D 134240645U, // CMP_ULE_S 134237465U, // CMP_ULT_D 134240998U, // CMP_ULT_S 134236858U, // CMP_UN_D 134240827U, // CMP_UN_S 9454U, // CONSTPOOL_ENTRY 0U, // COPY_FD_PSEUDO 0U, // COPY_FW_PSEUDO 2952807544U, // COPY_S_B 2952809637U, // COPY_S_D 2952811052U, // COPY_S_H 2952814987U, // COPY_S_W 2952807759U, // COPY_U_B 2952810104U, // COPY_U_D 2952811319U, // COPY_U_H 2952815394U, // COPY_U_W 1867863U, // CTC1 1867863U, // CTC1_MM 16976U, // CTCMSA 22833U, // CVT_D32_S 23896U, // CVT_D32_W 23896U, // CVT_D32_W_MM 22087U, // CVT_D64_L 22833U, // CVT_D64_S 23896U, // CVT_D64_W 22833U, // CVT_D_S_MM 19024U, // CVT_L_D64 19024U, // CVT_L_D64_MM 23052U, // CVT_L_S 23052U, // CVT_L_S_MM 19362U, // CVT_S_D32 19362U, // CVT_S_D32_MM 19362U, // CVT_S_D64 22096U, // CVT_S_L 24651U, // CVT_S_W 24651U, // CVT_S_W_MM 20200U, // CVT_W_D32 20200U, // CVT_W_D64 20200U, // CVT_W_MM 23374U, // CVT_W_S 23374U, // CVT_W_S_MM 19183U, // C_EQ_D32 19183U, // C_EQ_D64 23128U, // C_EQ_S 18754U, // C_F_D32 18754U, // C_F_D64 22940U, // C_F_S 18597U, // C_LE_D32 18597U, // C_LE_D64 22860U, // C_LE_S 19674U, // C_LT_D32 19674U, // C_LT_D64 23223U, // C_LT_S 18588U, // C_NGE_D32 18588U, // C_NGE_D64 22851U, // C_NGE_S 18623U, // C_NGLE_D32 18623U, // C_NGLE_D64 22878U, // C_NGLE_S 19040U, // C_NGL_D32 19040U, // C_NGL_D64 23068U, // C_NGL_S 19665U, // C_NGT_D32 19665U, // C_NGT_D64 23214U, // C_NGT_S 18633U, // C_OLE_D32 18633U, // C_OLE_D64 22888U, // C_OLE_S 19700U, // C_OLT_D32 19700U, // C_OLT_D64 23241U, // C_OLT_S 19209U, // C_SEQ_D32 19209U, // C_SEQ_D64 23146U, // C_SEQ_S 18824U, // C_SF_D32 18824U, // C_SF_D64 22986U, // C_SF_S 19237U, // C_UEQ_D32 19237U, // C_UEQ_D64 23166U, // C_UEQ_S 18661U, // C_ULE_D32 18661U, // C_ULE_D64 22908U, // C_ULE_S 19728U, // C_ULT_D32 19728U, // C_ULT_D64 23261U, // C_ULT_S 19122U, // C_UN_D32 19122U, // C_UN_D64 23091U, // C_UN_S 22516U, // CmpRxRy16 939546120U, // CmpiRxImm16 22024U, // CmpiRxImmX16 549945U, // Constant32 134237991U, // DADD 134239684U, // DADDi 134241306U, // DADDiu 134241267U, // DADDu 8689123U, // DAHI 134240165U, // DALIGN 8689184U, // DATI 134239794U, // DAUI 22476U, // DBITSWAP 22451U, // DCLO 22451U, // DCLO_R6 25533U, // DCLZ 25533U, // DCLZ_R6 134241469U, // DDIV 134241377U, // DDIVU 9480U, // DERET 9480U, // DERET_MM 134243425U, // DEXT 134243400U, // DEXTM 134243438U, // DEXTU 546247U, // DI 134243413U, // DINS 134243393U, // DINSM 134243431U, // DINSU 134241470U, // DIV 134241378U, // DIVU 134235238U, // DIV_S_B 134237331U, // DIV_S_D 134238735U, // DIV_S_H 134242670U, // DIV_S_W 134235453U, // DIV_U_B 134237798U, // DIV_U_D 134239013U, // DIV_U_H 134243088U, // DIV_U_W 546247U, // DI_MM 134234690U, // DLSA 134234690U, // DLSA_R6 134234121U, // DMFC0 16450U, // DMFC1 134234372U, // DMFC2 134238036U, // DMOD 134241281U, // DMODU 134234128U, // DMTC0 1867869U, // DMTC1 134234379U, // DMTC2 134239671U, // DMUH 134241299U, // DMUHU 134240103U, // DMUL 23495U, // DMULT 23641U, // DMULTu 134241343U, // DMULU 134240103U, // DMUL_R6 134237239U, // DOTP_S_D 134238655U, // DOTP_S_H 134242538U, // DOTP_S_W 134237706U, // DOTP_U_D 134238943U, // DOTP_U_H 134242996U, // DOTP_U_W 151014368U, // DPADD_S_D 151015784U, // DPADD_S_H 151019657U, // DPADD_S_W 151014835U, // DPADD_U_D 151016072U, // DPADD_U_H 151020125U, // DPADD_U_W 134239524U, // DPAQX_SA_W_PH 134239607U, // DPAQX_S_W_PH 134241998U, // DPAQ_SA_L_W 134239566U, // DPAQ_S_W_PH 134239859U, // DPAU_H_QBL 134240355U, // DPAU_H_QBR 134239645U, // DPAX_W_PH 134239514U, // DPA_W_PH 22521U, // DPOP 134239539U, // DPSQX_SA_W_PH 134239621U, // DPSQX_S_W_PH 134242011U, // DPSQ_SA_L_W 134239594U, // DPSQ_S_W_PH 151014335U, // DPSUB_S_D 151015763U, // DPSUB_S_H 151019624U, // DPSUB_S_W 151014802U, // DPSUB_U_D 151016051U, // DPSUB_U_H 151020092U, // DPSUB_U_W 134239871U, // DPSU_H_QBL 134240367U, // DPSU_H_QBR 134239656U, // DPSX_W_PH 134239635U, // DPS_W_PH 134240512U, // DROTR 134234351U, // DROTR32 134241513U, // DROTRV 21370U, // DSBH 25610U, // DSDIV 20275U, // DSHD 134240057U, // DSLL 134234321U, // DSLL32 1073764153U, // DSLL64_32 134241475U, // DSLLV 134234684U, // DSRA 134234303U, // DSRA32 134241454U, // DSRAV 134240069U, // DSRL 134234329U, // DSRL32 134241482U, // DSRLV 134235901U, // DSUB 134241246U, // DSUBu 25596U, // DUDIV 25611U, // DivRxRy16 25597U, // DivuRxRy16 9438U, // EHB 9438U, // EHB_MM 546259U, // EI 546259U, // EI_MM 9481U, // ERET 9481U, // ERET_MM 134243426U, // EXT 134240324U, // EXTP 134240221U, // EXTPDP 134241497U, // EXTPDPV 134241506U, // EXTPV 134242731U, // EXTRV_RS_W 134242285U, // EXTRV_R_W 134238744U, // EXTRV_S_H 134243168U, // EXTRV_W 134242720U, // EXTR_RS_W 134242264U, // EXTR_R_W 134238675U, // EXTR_S_H 134242363U, // EXTR_W 134243419U, // EXTS 134243371U, // EXTS32 134243426U, // EXT_MM 0U, // ExtractElementF64 0U, // ExtractElementF64_64 0U, // FABS_D 19631U, // FABS_D32 19631U, // FABS_D64 19631U, // FABS_MM 23198U, // FABS_S 23198U, // FABS_S_MM 0U, // FABS_W 134236265U, // FADD_D 134236266U, // FADD_D32 134236266U, // FADD_D64 134236266U, // FADD_MM 134240572U, // FADD_S 134240572U, // FADD_S_MM 134241633U, // FADD_W 134236499U, // FCAF_D 134241752U, // FCAF_W 134236929U, // FCEQ_D 134242191U, // FCEQ_W 19638U, // FCLASS_D 25015U, // FCLASS_W 134236343U, // FCLE_D 134241675U, // FCLE_W 134237420U, // FCLT_D 134242770U, // FCLT_W 2204821U, // FCMP_D32 2204821U, // FCMP_D32_MM 2204821U, // FCMP_D64 2466965U, // FCMP_S32 2466965U, // FCMP_S32_MM 134236439U, // FCNE_D 134241709U, // FCNE_W 134237039U, // FCOR_D 134242320U, // FCOR_W 134236985U, // FCUEQ_D 134242207U, // FCUEQ_W 134236409U, // FCULE_D 134241691U, // FCULE_W 134237476U, // FCULT_D 134242786U, // FCULT_W 134236455U, // FCUNE_D 134241725U, // FCUNE_W 134236868U, // FCUN_D 134242097U, // FCUN_W 134237862U, // FDIV_D 134237863U, // FDIV_D32 134237863U, // FDIV_D64 134237863U, // FDIV_MM 134241045U, // FDIV_S 134241045U, // FDIV_S_MM 134243152U, // FDIV_W 134238402U, // FEXDO_H 134242113U, // FEXDO_W 134236152U, // FEXP2_D 0U, // FEXP2_D_1_PSEUDO 134241536U, // FEXP2_W 0U, // FEXP2_W_1_PSEUDO 19064U, // FEXUPL_D 24311U, // FEXUPL_W 19327U, // FEXUPR_D 24608U, // FEXUPR_W 19569U, // FFINT_S_D 24908U, // FFINT_S_W 20048U, // FFINT_U_D 25338U, // FFINT_U_W 19074U, // FFQL_D 24321U, // FFQL_W 19337U, // FFQR_D 24618U, // FFQR_W 17277U, // FILL_B 19049U, // FILL_D 0U, // FILL_FD_PSEUDO 0U, // FILL_FW_PSEUDO 20635U, // FILL_H 24296U, // FILL_W 18415U, // FLOG2_D 23799U, // FLOG2_W 19013U, // FLOOR_L_D64 23041U, // FLOOR_L_S 20189U, // FLOOR_W_D32 20189U, // FLOOR_W_D64 20189U, // FLOOR_W_MM 23363U, // FLOOR_W_S 23363U, // FLOOR_W_S_MM 151013489U, // FMADD_D 151018857U, // FMADD_W 134236190U, // FMAX_A_D 134241574U, // FMAX_A_W 134237937U, // FMAX_D 134243177U, // FMAX_W 134236170U, // FMIN_A_D 134241554U, // FMIN_A_W 134236842U, // FMIN_D 134242089U, // FMIN_W 20150U, // FMOV_D32 20150U, // FMOV_D32_MM 20150U, // FMOV_D64 23324U, // FMOV_S 23324U, // FMOV_S_MM 151013447U, // FMSUB_D 151018815U, // FMSUB_W 134236826U, // FMUL_D 134236827U, // FMUL_D32 134236827U, // FMUL_D64 134236827U, // FMUL_MM 134240805U, // FMUL_S 134240805U, // FMUL_S_MM 134242073U, // FMUL_W 18841U, // FNEG_D32 18841U, // FNEG_D64 18841U, // FNEG_MM 23002U, // FNEG_S 23002U, // FNEG_S_MM 19175U, // FRCP_D 24394U, // FRCP_W 19786U, // FRINT_D 25084U, // FRINT_W 19814U, // FRSQRT_D 25112U, // FRSQRT_W 134236518U, // FSAF_D 134241760U, // FSAF_W 134236957U, // FSEQ_D 134242199U, // FSEQ_W 134236381U, // FSLE_D 134241683U, // FSLE_W 134237448U, // FSLT_D 134242778U, // FSLT_W 134236447U, // FSNE_D 134241717U, // FSNE_W 134237047U, // FSOR_D 134242328U, // FSOR_W 19805U, // FSQRT_D 19806U, // FSQRT_D32 19806U, // FSQRT_D64 19806U, // FSQRT_MM 23301U, // FSQRT_S 23301U, // FSQRT_S_MM 25103U, // FSQRT_W 134236223U, // FSUB_D 134236224U, // FSUB_D32 134236224U, // FSUB_D64 134236224U, // FSUB_MM 134240554U, // FSUB_S 134240554U, // FSUB_S_MM 134241591U, // FSUB_W 134237006U, // FSUEQ_D 134242216U, // FSUEQ_W 134236430U, // FSULE_D 134241700U, // FSULE_W 134237497U, // FSULT_D 134242795U, // FSULT_W 134236464U, // FSUNE_D 134241734U, // FSUNE_W 134236887U, // FSUN_D 134242105U, // FSUN_W 19580U, // FTINT_S_D 24919U, // FTINT_S_W 20059U, // FTINT_U_D 25349U, // FTINT_U_W 134238479U, // FTQ_H 134242225U, // FTQ_W 19402U, // FTRUNC_S_D 24691U, // FTRUNC_S_W 19869U, // FTRUNC_U_D 25159U, // FTRUNC_U_W 1224758783U, // GotPrologue16 134237142U, // HADD_S_D 134238558U, // HADD_S_H 134242431U, // HADD_S_W 134237609U, // HADD_U_D 134238846U, // HADD_U_H 134242899U, // HADD_U_W 134237109U, // HSUB_S_D 134238537U, // HSUB_S_H 134242398U, // HSUB_S_W 134237576U, // HSUB_U_D 134238825U, // HSUB_U_H 134242866U, // HSUB_U_W 134235508U, // ILVEV_B 134237853U, // ILVEV_D 134239068U, // ILVEV_H 134243143U, // ILVEV_W 134235036U, // ILVL_B 134236834U, // ILVL_D 134238394U, // ILVL_H 134242081U, // ILVL_W 134234788U, // ILVOD_B 134236307U, // ILVOD_D 134238196U, // ILVOD_H 134241666U, // ILVOD_W 134235084U, // ILVR_B 134237082U, // ILVR_D 134238519U, // ILVR_H 134242371U, // ILVR_W 134243408U, // INS 44582043U, // INSERT_B 0U, // INSERT_B_VIDX_PSEUDO 44584275U, // INSERT_D 0U, // INSERT_D_VIDX_PSEUDO 0U, // INSERT_FD_PSEUDO 0U, // INSERT_FD_VIDX_PSEUDO 0U, // INSERT_FW_PSEUDO 0U, // INSERT_FW_VIDX_PSEUDO 44585551U, // INSERT_H 0U, // INSERT_H_VIDX_PSEUDO 44589573U, // INSERT_W 0U, // INSERT_W_VIDX_PSEUDO 16801009U, // INSV 52970157U, // INSVE_B 52971833U, // INSVE_D 52973565U, // INSVE_H 52977103U, // INSVE_W 134243408U, // INS_MM 546365U, // J 546398U, // JAL 22768U, // JALR 547056U, // JALR16_MM 22768U, // JALR64 0U, // JALR64Pseudo 0U, // JALRPseudo 541104U, // JALRS16_MM 23442U, // JALRS_MM 17822U, // JALR_HB 22768U, // JALR_MM 547706U, // JALS_MM 549771U, // JALX 549771U, // JALX_MM 546398U, // JAL_MM 18212U, // JIALC 18201U, // JIC 547052U, // JR 541091U, // JR16_MM 547052U, // JR64 546873U, // JRADDIUSP 542610U, // JRC16_MM 542103U, // JR_HB 542103U, // JR_HB_R6 547052U, // JR_MM 546365U, // J_MM 2905694U, // Jal16 3167838U, // JalB16 546398U, // JalOneReg 22110U, // JalTwoReg 9430U, // JrRa16 9421U, // JrcRa16 549872U, // JrcRx16 540673U, // JumpLinkReg16 58738087U, // LB 58738087U, // LB64 58737088U, // LBU16_MM 1358979985U, // LBUX 58738087U, // LB_MM 58743769U, // LBu 58743769U, // LBu64 58743769U, // LBu_MM 58740538U, // LD 58736688U, // LDC1 58736688U, // LDC164 58736688U, // LDC1_MM 58736888U, // LDC2 58736888U, // LDC2_R6 58736947U, // LDC3 17103U, // LDI_B 18857U, // LDI_D 20511U, // LDI_H 24146U, // LDI_W 58742458U, // LDL 18273U, // LDPC 58742954U, // LDR 1358970992U, // LDXC1 1358970992U, // LDXC164 58737301U, // LD_B 58738820U, // LD_D 58740709U, // LD_H 58744179U, // LD_W 25189403U, // LEA_ADDiu 25189402U, // LEA_ADDiu64 25189403U, // LEA_ADDiu_MM 58741643U, // LH 58741643U, // LH64 58737111U, // LHU16_MM 1358979974U, // LHX 58741643U, // LH_MM 58743822U, // LHu 58743822U, // LHu64 58743822U, // LHu_MM 16751U, // LI16_MM 58742563U, // LL 58740537U, // LLD 58740537U, // LLD_R6 58742563U, // LL_MM 58742563U, // LL_R6 58736647U, // LOAD_ACC128 58736647U, // LOAD_ACC64 58736647U, // LOAD_ACC64DSP 58742794U, // LOAD_CCOND_DSP 0U, // LONG_BRANCH_ADDiu 0U, // LONG_BRANCH_DADDiu 0U, // LONG_BRANCH_LUi 134234691U, // LSA 134234691U, // LSA_R6 1358971006U, // LUXC1 1358971006U, // LUXC164 1358971006U, // LUXC1_MM 33576504U, // LUi 33576504U, // LUi64 33576504U, // LUi_MM 58745726U, // LW 58737118U, // LW16_MM 58745726U, // LW64 58736740U, // LWC1 58736740U, // LWC1_MM 58736914U, // LWC2 58736914U, // LWC2_R6 58736959U, // LWC3 58745726U, // LWGP_MM 58742637U, // LWL 58742637U, // LWL64 58742637U, // LWL_MM 3522956U, // LWM16_MM 3522785U, // LWM32_MM 3528595U, // LWM_MM 18310U, // LWPC 137290U, // LWP_MM 58743054U, // LWR 58743054U, // LWR64 58743054U, // LWR_MM 58745726U, // LWSP_MM 18303U, // LWUPC 58743912U, // LWU_MM 1358979991U, // LWX 1358971020U, // LWXC1 1358971020U, // LWXC1_MM 1358977945U, // LWXS_MM 58745726U, // LW_MM 58743912U, // LWu 58738087U, // LbRxRyOffMemX16 58743769U, // LbuRxRyOffMemX16 58741643U, // LhRxRyOffMemX16 58743822U, // LhuRxRyOffMemX16 939546111U, // LiRxImm16 22005U, // LiRxImmAlignX16 22015U, // LiRxImmX16 33571334U, // LoadAddr32Imm 58737158U, // LoadAddr32Reg 33576447U, // LoadImm32Reg 22019U, // LoadImm64Reg 3695486U, // LwConstant32 268460926U, // LwRxPcTcp16 25470U, // LwRxPcTcpX16 58745726U, // LwRxRyOffMemX16 1493197694U, // LwRxSpImmX16 20269U, // MADD 151013751U, // MADDF_D 151017921U, // MADDF_S 151015667U, // MADDR_Q_H 151019386U, // MADDR_Q_W 23546U, // MADDU 134241274U, // MADDU_DSP 23546U, // MADDU_MM 151012706U, // MADDV_B 151015051U, // MADDV_D 151016266U, // MADDV_H 151020341U, // MADDV_W 134236274U, // MADD_D32 134236274U, // MADD_D32_MM 134236274U, // MADD_D64 134237997U, // MADD_DSP 20269U, // MADD_MM 151015637U, // MADD_Q_H 151019356U, // MADD_Q_W 134240571U, // MADD_S 134240571U, // MADD_S_MM 134239974U, // MAQ_SA_W_PHL 134240436U, // MAQ_SA_W_PHR 134240002U, // MAQ_S_W_PHL 134240464U, // MAQ_S_W_PHR 134236215U, // MAXA_D 134240544U, // MAXA_S 134235159U, // MAXI_S_B 134237220U, // MAXI_S_D 134238636U, // MAXI_S_H 134242509U, // MAXI_S_W 2281719022U, // MAXI_U_B 2281721335U, // MAXI_U_D 2281722572U, // MAXI_U_H 2281726625U, // MAXI_U_W 134234740U, // MAX_A_B 134236191U, // MAX_A_D 134238148U, // MAX_A_H 134241575U, // MAX_A_W 134237938U, // MAX_D 134241111U, // MAX_S 134235247U, // MAX_S_B 134237340U, // MAX_S_D 134238755U, // MAX_S_H 134242690U, // MAX_S_W 134235462U, // MAX_U_B 134237807U, // MAX_U_D 134239022U, // MAX_U_H 134243097U, // MAX_U_W 134234122U, // MFC0 16451U, // MFC1 16451U, // MFC1_MM 134234373U, // MFC2 16457U, // MFHC1_D32 16457U, // MFHC1_D64 16457U, // MFHC1_MM 546281U, // MFHI 546281U, // MFHI16_MM 546281U, // MFHI64 21993U, // MFHI_DSP 546281U, // MFHI_MM 546745U, // MFLO 546745U, // MFLO16_MM 546745U, // MFLO64 22457U, // MFLO_DSP 546745U, // MFLO_MM 134236200U, // MINA_D 134240536U, // MINA_S 134235139U, // MINI_S_B 134237200U, // MINI_S_D 134238616U, // MINI_S_H 134242489U, // MINI_S_W 2281719002U, // MINI_U_B 2281721315U, // MINI_U_D 2281722552U, // MINI_U_H 2281726605U, // MINI_U_W 134234721U, // MIN_A_B 134236171U, // MIN_A_D 134238129U, // MIN_A_H 134241555U, // MIN_A_W 134236843U, // MIN_D 134240812U, // MIN_S 134235169U, // MIN_S_B 134237230U, // MIN_S_D 134238646U, // MIN_S_H 134242529U, // MIN_S_W 134235384U, // MIN_U_B 134237697U, // MIN_U_D 134238934U, // MIN_U_H 134242987U, // MIN_U_W 0U, // MIPSeh_return32 0U, // MIPSeh_return64 134238037U, // MOD 134235899U, // MODSUB 134241282U, // MODU 134235102U, // MOD_S_B 134237163U, // MOD_S_D 134238579U, // MOD_S_H 134242452U, // MOD_S_W 134235317U, // MOD_U_B 134237630U, // MOD_U_D 134238867U, // MOD_U_H 134242920U, // MOD_U_W 20345U, // MOVE16_MM 67491813U, // MOVEP_MM 23668U, // MOVE_V 134236560U, // MOVF_D32 134236560U, // MOVF_D32_MM 134236560U, // MOVF_D64 134238109U, // MOVF_I 134238109U, // MOVF_I64 134238109U, // MOVF_I_MM 134240722U, // MOVF_S 134240722U, // MOVF_S_MM 134236895U, // MOVN_I64_D64 134240173U, // MOVN_I64_I 134240173U, // MOVN_I64_I64 134240848U, // MOVN_I64_S 134236895U, // MOVN_I_D32 134236895U, // MOVN_I_D32_MM 134236895U, // MOVN_I_D64 134240173U, // MOVN_I_I 134240173U, // MOVN_I_I64 134240173U, // MOVN_I_MM 134240848U, // MOVN_I_S 134240848U, // MOVN_I_S_MM 134237558U, // MOVT_D32 134237558U, // MOVT_D32_MM 134237558U, // MOVT_D64 134241235U, // MOVT_I 134241235U, // MOVT_I64 134241235U, // MOVT_I_MM 134241037U, // MOVT_S 134241037U, // MOVT_S_MM 134237978U, // MOVZ_I64_D64 134243300U, // MOVZ_I64_I 134243300U, // MOVZ_I64_I64 134241138U, // MOVZ_I64_S 134237978U, // MOVZ_I_D32 134237978U, // MOVZ_I_D32_MM 134237978U, // MOVZ_I_D64 134243300U, // MOVZ_I_I 134243300U, // MOVZ_I_I64 134243300U, // MOVZ_I_MM 134241138U, // MOVZ_I_S 134241138U, // MOVZ_I_S_MM 18179U, // MSUB 151013742U, // MSUBF_D 151017912U, // MSUBF_S 151015656U, // MSUBR_Q_H 151019375U, // MSUBR_Q_W 23525U, // MSUBU 134241253U, // MSUBU_DSP 23525U, // MSUBU_MM 151012697U, // MSUBV_B 151015042U, // MSUBV_D 151016257U, // MSUBV_H 151020332U, // MSUBV_W 134236232U, // MSUB_D32 134236232U, // MSUB_D32_MM 134236232U, // MSUB_D64 134235907U, // MSUB_DSP 18179U, // MSUB_MM 151015627U, // MSUB_Q_H 151019346U, // MSUB_Q_W 134240553U, // MSUB_S 134240553U, // MSUB_S_MM 134234129U, // MTC0 1867870U, // MTC1 1867870U, // MTC1_MM 134234380U, // MTC2 1884240U, // MTHC1_D32 1884240U, // MTHC1_D64 1884240U, // MTHC1_MM 546287U, // MTHI 546287U, // MTHI64 1873391U, // MTHI_DSP 546287U, // MTHI_MM 1873900U, // MTHLIP 546758U, // MTLO 546758U, // MTLO64 1873862U, // MTLO_DSP 546758U, // MTLO_MM 540701U, // MTM0 540826U, // MTM1 540958U, // MTM2 540707U, // MTP0 540832U, // MTP1 540964U, // MTP2 134239672U, // MUH 134241300U, // MUHU 134240104U, // MUL 134240015U, // MULEQ_S_W_PHL 134240477U, // MULEQ_S_W_PHR 134239883U, // MULEU_S_PH_QBL 134240379U, // MULEU_S_PH_QBR 134239433U, // MULQ_RS_PH 134242709U, // MULQ_RS_W 134239377U, // MULQ_S_PH 134242568U, // MULQ_S_W 134238462U, // MULR_Q_H 134242181U, // MULR_Q_W 134239579U, // MULSAQ_S_W_PH 134239554U, // MULSA_W_PH 23496U, // MULT 134241370U, // MULTU_DSP 134241224U, // MULT_DSP 23496U, // MULT_MM 23642U, // MULTu 23642U, // MULTu_MM 134241337U, // MULU 134235517U, // MULV_B 134237870U, // MULV_D 134239077U, // MULV_H 134243160U, // MULV_W 134240104U, // MUL_MM 134239250U, // MUL_PH 134238431U, // MUL_Q_H 134242150U, // MUL_Q_W 134240104U, // MUL_R6 134239345U, // MUL_S_PH 546281U, // Mfhi16 546745U, // Mflo16 20345U, // Move32R16 20345U, // MoveR3216 23496U, // MultRxRy16 75799496U, // MultRxRyRz16 23642U, // MultuRxRy16 75799642U, // MultuRxRyRz16 17028U, // NLOC_B 18521U, // NLOC_D 20436U, // NLOC_H 23880U, // NLOC_W 17036U, // NLZC_B 18529U, // NLZC_D 20444U, // NLZC_H 23888U, // NLZC_W 134236282U, // NMADD_D32 134236282U, // NMADD_D32_MM 134236282U, // NMADD_D64 134240570U, // NMADD_S 134240570U, // NMADD_S_MM 134236240U, // NMSUB_D32 134236240U, // NMSUB_D32_MM 134236240U, // NMSUB_D64 134240552U, // NMSUB_S 134240552U, // NMSUB_S_MM 0U, // NOP 134240502U, // NOR 134240502U, // NOR64 2281718573U, // NORI_B 134240502U, // NOR_MM 134241412U, // NOR_V 0U, // NOR_V_D_PSEUDO 0U, // NOR_V_H_PSEUDO 0U, // NOR_V_W_PSEUDO 16825U, // NOT16_MM 20387U, // NegRxRy16 23502U, // NotRxRy16 134240503U, // OR 836010U, // OR16_MM 134240503U, // OR64 2281718574U, // ORI_B 134240503U, // OR_MM 134241413U, // OR_V 0U, // OR_V_D_PSEUDO 0U, // OR_V_H_PSEUDO 0U, // OR_V_W_PSEUDO 134239771U, // ORi 134239771U, // ORi64 134239771U, // ORi_MM 16799991U, // OrRxRxRy16 134239239U, // PACKRL_PH 9442U, // PAUSE 9442U, // PAUSE_MM 134235499U, // PCKEV_B 134237844U, // PCKEV_D 134239059U, // PCKEV_H 134243134U, // PCKEV_W 134234779U, // PCKOD_B 134236298U, // PCKOD_D 134238187U, // PCKOD_H 134241657U, // PCKOD_W 17555U, // PCNT_B 19778U, // PCNT_D 21063U, // PCNT_H 25076U, // PCNT_W 134239203U, // PICK_PH 134235631U, // PICK_QB 22522U, // POP 22186U, // PRECEQU_PH_QBL 16906U, // PRECEQU_PH_QBLA 22682U, // PRECEQU_PH_QBR 16939U, // PRECEQU_PH_QBRA 22260U, // PRECEQ_W_PHL 22722U, // PRECEQ_W_PHR 22171U, // PRECEU_PH_QBL 16890U, // PRECEU_PH_QBLA 22667U, // PRECEU_PH_QBR 16923U, // PRECEU_PH_QBRA 134239155U, // PRECRQU_S_QB_PH 134241800U, // PRECRQ_PH_W 134239128U, // PRECRQ_QB_PH 134241831U, // PRECRQ_RS_PH_W 134239142U, // PRECR_QB_PH 134241784U, // PRECR_SRA_PH_W 134241813U, // PRECR_SRA_R_PH_W 85911U, // PREF 85911U, // PREF_MM 85911U, // PREF_R6 134238019U, // PREPEND 0U, // PseudoCMPU_EQ_QB 0U, // PseudoCMPU_LE_QB 0U, // PseudoCMPU_LT_QB 0U, // PseudoCMP_EQ_PH 0U, // PseudoCMP_LE_PH 0U, // PseudoCMP_LT_PH 16391U, // PseudoCVT_D32_W 16391U, // PseudoCVT_D64_L 16391U, // PseudoCVT_D64_W 16391U, // PseudoCVT_S_L 16391U, // PseudoCVT_S_W 0U, // PseudoDMULT 0U, // PseudoDMULTu 0U, // PseudoDSDIV 0U, // PseudoDUDIV 0U, // PseudoIndirectBranch 0U, // PseudoIndirectBranch64 0U, // PseudoMADD 0U, // PseudoMADDU 0U, // PseudoMFHI 0U, // PseudoMFHI64 0U, // PseudoMFLO 0U, // PseudoMFLO64 0U, // PseudoMSUB 0U, // PseudoMSUBU 0U, // PseudoMTLOHI 0U, // PseudoMTLOHI64 0U, // PseudoMTLOHI_DSP 0U, // PseudoMULT 0U, // PseudoMULTu 0U, // PseudoPICK_PH 0U, // PseudoPICK_QB 0U, // PseudoReturn 0U, // PseudoReturn64 0U, // PseudoSDIV 0U, // PseudoSELECTFP_F_D32 0U, // PseudoSELECTFP_F_D64 0U, // PseudoSELECTFP_F_I 0U, // PseudoSELECTFP_F_I64 0U, // PseudoSELECTFP_F_S 0U, // PseudoSELECTFP_T_D32 0U, // PseudoSELECTFP_T_D64 0U, // PseudoSELECTFP_T_I 0U, // PseudoSELECTFP_T_I64 0U, // PseudoSELECTFP_T_S 0U, // PseudoSELECT_D32 0U, // PseudoSELECT_D64 0U, // PseudoSELECT_I 0U, // PseudoSELECT_I64 0U, // PseudoSELECT_S 0U, // PseudoUDIV 18155U, // RADDU_W_QB 33577003U, // RDDSP 22791U, // RDHWR 22791U, // RDHWR64 22791U, // RDHWR_MM 21766U, // REPLV_PH 18135U, // REPLV_QB 33575925U, // REPL_PH 33572353U, // REPL_QB 19787U, // RINT_D 23293U, // RINT_S 134240513U, // ROTR 134241514U, // ROTRV 134241514U, // ROTRV_MM 134240513U, // ROTR_MM 18992U, // ROUND_L_D64 23020U, // ROUND_L_S 20168U, // ROUND_W_D32 20168U, // ROUND_W_D64 20168U, // ROUND_W_MM 23342U, // ROUND_W_S 23342U, // ROUND_W_S_MM 0U, // Restore16 0U, // RestoreX16 0U, // RetRA 0U, // RetRA16 134235208U, // SAT_S_B 134237279U, // SAT_S_D 2281722353U, // SAT_S_H 134242618U, // SAT_S_W 134235435U, // SAT_U_B 134237758U, // SAT_U_D 2281722643U, // SAT_U_H 134243048U, // SAT_U_W 58738423U, // SB 58736980U, // SB16_MM 58738423U, // SB64 58738423U, // SB_MM 3966874U, // SC 3968802U, // SCD 3968802U, // SCD_R6 3966874U, // SC_MM 3966874U, // SC_R6 58740570U, // SD 546774U, // SDBBP 65946U, // SDBBP16_MM 546774U, // SDBBP_MM 546774U, // SDBBP_R6 58736694U, // SDC1 58736694U, // SDC164 58736694U, // SDC1_MM 58736894U, // SDC2 58736894U, // SDC2_R6 58736953U, // SDC3 25611U, // SDIV 25611U, // SDIV_MM 58742463U, // SDL 58742959U, // SDR 1358970999U, // SDXC1 1358970999U, // SDXC164 17810U, // SEB 17810U, // SEB64 17810U, // SEB_MM 21382U, // SEH 21382U, // SEH64 21382U, // SEH_MM 134243273U, // SELEQZ 134243273U, // SELEQZ64 134237968U, // SELEQZ_D 134241128U, // SELEQZ_S 134243246U, // SELNEZ 134243246U, // SELNEZ64 134237951U, // SELNEZ_D 134241118U, // SELNEZ_S 151013977U, // SEL_D 151018005U, // SEL_S 134240345U, // SEQ 134239758U, // SEQi 58742195U, // SH 58736993U, // SH16_MM 58742195U, // SH64 2281718455U, // SHF_B 2281721863U, // SHF_H 2281725417U, // SHF_W 22463U, // SHILO 23761U, // SHILOV 134239484U, // SHLLV_PH 134235853U, // SHLLV_QB 134239421U, // SHLLV_S_PH 134242679U, // SHLLV_S_W 134239212U, // SHLL_PH 134235640U, // SHLL_QB 134239334U, // SHLL_S_PH 134242519U, // SHLL_S_W 134239474U, // SHRAV_PH 134235843U, // SHRAV_QB 134239322U, // SHRAV_R_PH 134235741U, // SHRAV_R_QB 134242274U, // SHRAV_R_W 134239119U, // SHRA_PH 134235563U, // SHRA_QB 134239287U, // SHRA_R_PH 134235706U, // SHRA_R_QB 134242232U, // SHRA_R_W 134239504U, // SHRLV_PH 134235873U, // SHRLV_QB 134239230U, // SHRL_PH 134235658U, // SHRL_QB 58742195U, // SH_MM 2969584334U, // SLDI_B 2969586088U, // SLDI_D 2969587742U, // SLDI_H 2969591377U, // SLDI_W 822100628U, // SLD_B 822102147U, // SLD_D 822104036U, // SLD_H 822107506U, // SLD_W 134240058U, // SLL 134234494U, // SLL16_MM 1610635066U, // SLL64_32 1610635066U, // SLL64_64 2281718512U, // SLLI_B 2281720249U, // SLLI_D 2281721903U, // SLLI_H 2281725538U, // SLLI_W 134241476U, // SLLV 134241476U, // SLLV_MM 134235013U, // SLL_B 134236785U, // SLL_D 134238371U, // SLL_H 134240058U, // SLL_MM 134242032U, // SLL_W 134241213U, // SLT 134241213U, // SLT64 134241213U, // SLT_MM 134239782U, // SLTi 134239782U, // SLTi64 134239782U, // SLTi_MM 134241321U, // SLTiu 134241321U, // SLTiu64 134241321U, // SLTiu_MM 134241357U, // SLTu 134241357U, // SLTu64 134241357U, // SLTu_MM 134238063U, // SNE 134239703U, // SNEi 0U, // SNZ_B_PSEUDO 0U, // SNZ_D_PSEUDO 0U, // SNZ_H_PSEUDO 0U, // SNZ_V_PSEUDO 0U, // SNZ_W_PSEUDO 2952807239U, // SPLATI_B 2952808960U, // SPLATI_D 2952810614U, // SPLATI_H 2952814249U, // SPLATI_W 805323906U, // SPLAT_B 805326016U, // SPLAT_D 805327414U, // SPLAT_H 805331393U, // SPLAT_W 134234685U, // SRA 2281718470U, // SRAI_B 2281720224U, // SRAI_D 2281721878U, // SRAI_H 2281725513U, // SRAI_W 134234898U, // SRARI_B 134236635U, // SRARI_D 2281721937U, // SRARI_H 134241924U, // SRARI_W 134235051U, // SRAR_B 134237015U, // SRAR_D 134238486U, // SRAR_H 134242296U, // SRAR_W 134241455U, // SRAV 134241455U, // SRAV_MM 134234749U, // SRA_B 134236208U, // SRA_D 134238157U, // SRA_H 134234685U, // SRA_MM 134241584U, // SRA_W 134240070U, // SRL 134234501U, // SRL16_MM 2281718520U, // SRLI_B 2281720257U, // SRLI_D 2281721911U, // SRLI_H 2281725546U, // SRLI_W 134234916U, // SRLRI_B 134236653U, // SRLRI_D 2281721955U, // SRLRI_H 134241942U, // SRLRI_W 134235067U, // SRLR_B 134237031U, // SRLR_D 134238502U, // SRLR_H 134242312U, // SRLR_W 134241483U, // SRLV 134241483U, // SRLV_MM 134235020U, // SRL_B 134236810U, // SRL_D 134238378U, // SRL_H 134240070U, // SRL_MM 134242057U, // SRL_W 9463U, // SSNOP 9463U, // SSNOP_MM 58736647U, // STORE_ACC128 58736647U, // STORE_ACC64 58736647U, // STORE_ACC64DSP 58742810U, // STORE_CCOND_DSP 58737829U, // ST_B 58740080U, // ST_D 58741337U, // ST_H 58745378U, // ST_W 134235902U, // SUB 134239183U, // SUBQH_PH 134239298U, // SUBQH_R_PH 134242242U, // SUBQH_R_W 134241847U, // SUBQH_W 134239258U, // SUBQ_PH 134239355U, // SUBQ_S_PH 134242548U, // SUBQ_S_W 134235423U, // SUBSUS_U_B 134237746U, // SUBSUS_U_D 134238983U, // SUBSUS_U_H 134243036U, // SUBSUS_U_W 134235226U, // SUBSUU_S_B 134237319U, // SUBSUU_S_D 134238723U, // SUBSUU_S_H 134242658U, // SUBSUU_S_W 134235188U, // SUBS_S_B 134237259U, // SUBS_S_D 134238685U, // SUBS_S_H 134242598U, // SUBS_S_W 134235403U, // SUBS_U_B 134237726U, // SUBS_U_D 134238963U, // SUBS_U_H 134243016U, // SUBS_U_W 134234567U, // SUBU16_MM 134235611U, // SUBUH_QB 134235717U, // SUBUH_R_QB 134239456U, // SUBU_PH 134235825U, // SUBU_QB 134239399U, // SUBU_S_PH 134235764U, // SUBU_S_QB 2281718618U, // SUBVI_B 2281720339U, // SUBVI_D 2281721993U, // SUBVI_H 2281725628U, // SUBVI_W 134235482U, // SUBV_B 134237827U, // SUBV_D 134239042U, // SUBV_H 134243117U, // SUBV_W 134235902U, // SUB_MM 134241247U, // SUBu 134241247U, // SUBu_MM 1358971013U, // SUXC1 1358971013U, // SUXC164 1358971013U, // SUXC1_MM 58745730U, // SW 58737124U, // SW16_MM 58745730U, // SW64 58736746U, // SWC1 58736746U, // SWC1_MM 58736920U, // SWC2 58736920U, // SWC2_R6 58736965U, // SWC3 58742642U, // SWL 58742642U, // SWL64 58742642U, // SWL_MM 3522963U, // SWM16_MM 3522792U, // SWM32_MM 3528600U, // SWM_MM 137295U, // SWP_MM 58743059U, // SWR 58743059U, // SWR64 58743059U, // SWR_MM 58745730U, // SWSP_MM 1358971027U, // SWXC1 1358971027U, // SWXC1_MM 58745730U, // SW_MM 549939U, // SYNC 153021U, // SYNCI 549939U, // SYNC_MM 546590U, // SYSCALL 546590U, // SYSCALL_MM 0U, // SZ_B_PSEUDO 0U, // SZ_D_PSEUDO 0U, // SZ_H_PSEUDO 0U, // SZ_V_PSEUDO 0U, // SZ_W_PSEUDO 0U, // Save16 0U, // SaveX16 58738423U, // SbRxRyOffMemX16 549866U, // SebRx16 549878U, // SehRx16 4367299U, // SelBeqZ 4367272U, // SelBneZ 1828886516U, // SelTBteqZCmp 1828886024U, // SelTBteqZCmpi 1828887485U, // SelTBteqZSlt 1828886054U, // SelTBteqZSlti 1828887593U, // SelTBteqZSltiu 1828887629U, // SelTBteqZSltu 1963104244U, // SelTBtneZCmp 1963103752U, // SelTBtneZCmpi 1963105213U, // SelTBtneZSlt 1963103782U, // SelTBtneZSlti 1963105321U, // SelTBtneZSltiu 1963105357U, // SelTBtneZSltu 58742195U, // ShRxRyOffMemX16 134240058U, // SllX16 16800964U, // SllvRxRy16 92576701U, // SltCCRxRy16 23485U, // SltRxRy16 92575270U, // SltiCCRxImmX16 939546150U, // SltiRxImm16 22054U, // SltiRxImmX16 92576809U, // SltiuCCRxImmX16 939547689U, // SltiuRxImm16 23593U, // SltiuRxImmX16 92576845U, // SltuCCRxRy16 23629U, // SltuRxRy16 92576845U, // SltuRxRyRz16 134234685U, // SraX16 16800943U, // SravRxRy16 134240070U, // SrlX16 16800971U, // SrlvRxRy16 134241247U, // SubuRxRyRz16 58745730U, // SwRxRyOffMemX16 1493197698U, // SwRxSpImmX16 0U, // TAILCALL 0U, // TAILCALL64_R 0U, // TAILCALL_R 134240350U, // TEQ 33576468U, // TEQI 33576468U, // TEQI_MM 134240350U, // TEQ_MM 134238046U, // TGE 33576401U, // TGEI 33578018U, // TGEIU 33578018U, // TGEIU_MM 33576401U, // TGEI_MM 134241288U, // TGEU 134241288U, // TGEU_MM 134238046U, // TGE_MM 9458U, // TLBP 9458U, // TLBP_MM 9469U, // TLBR 9469U, // TLBR_MM 9448U, // TLBWI 9448U, // TLBWI_MM 9474U, // TLBWR 9474U, // TLBWR_MM 134241218U, // TLT 33576492U, // TLTI 33578032U, // TLTIU_MM 33576492U, // TLTI_MM 134241363U, // TLTU 134241363U, // TLTU_MM 134241218U, // TLT_MM 134238068U, // TNE 33576413U, // TNEI 33576413U, // TNEI_MM 134238068U, // TNE_MM 0U, // TRAP 18981U, // TRUNC_L_D64 23009U, // TRUNC_L_S 20157U, // TRUNC_W_D32 20157U, // TRUNC_W_D64 20157U, // TRUNC_W_MM 23331U, // TRUNC_W_S 23331U, // TRUNC_W_S_MM 33578032U, // TTLTIU 25597U, // UDIV 25597U, // UDIV_MM 134241335U, // V3MULU 134234135U, // VMM0 134241350U, // VMULU 151012022U, // VSHF_B 151013760U, // VSHF_D 151015430U, // VSHF_H 151018984U, // VSHF_W 9486U, // WAIT 547767U, // WAIT_MM 33577010U, // WRDSP 21376U, // WSBH 21376U, // WSBH_MM 134240507U, // XOR 836009U, // XOR16_MM 134240507U, // XOR64 2281718581U, // XORI_B 134240507U, // XOR_MM 134241419U, // XOR_V 0U, // XOR_V_D_PSEUDO 0U, // XOR_V_H_PSEUDO 0U, // XOR_V_W_PSEUDO 134239770U, // XORi 134239770U, // XORi64 134239770U, // XORi_MM 16799995U, // XorRxRxRy16 0U }; static const uint8_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // ABSQ_S_PH 0U, // ABSQ_S_QB 0U, // ABSQ_S_W 0U, // ADD 0U, // ADDIUPC 0U, // ADDIUPC_MM 0U, // ADDIUR1SP_MM 0U, // ADDIUR2_MM 0U, // ADDIUS5_MM 0U, // ADDIUSP_MM 0U, // ADDQH_PH 0U, // ADDQH_R_PH 0U, // ADDQH_R_W 0U, // ADDQH_W 0U, // ADDQ_PH 0U, // ADDQ_S_PH 0U, // ADDQ_S_W 0U, // ADDSC 0U, // ADDS_A_B 0U, // ADDS_A_D 0U, // ADDS_A_H 0U, // ADDS_A_W 0U, // ADDS_S_B 0U, // ADDS_S_D 0U, // ADDS_S_H 0U, // ADDS_S_W 0U, // ADDS_U_B 0U, // ADDS_U_D 0U, // ADDS_U_H 0U, // ADDS_U_W 0U, // ADDU16_MM 0U, // ADDUH_QB 0U, // ADDUH_R_QB 0U, // ADDU_PH 0U, // ADDU_QB 0U, // ADDU_S_PH 0U, // ADDU_S_QB 0U, // ADDVI_B 0U, // ADDVI_D 0U, // ADDVI_H 0U, // ADDVI_W 0U, // ADDV_B 0U, // ADDV_D 0U, // ADDV_H 0U, // ADDV_W 0U, // ADDWC 0U, // ADD_A_B 0U, // ADD_A_D 0U, // ADD_A_H 0U, // ADD_A_W 0U, // ADD_MM 0U, // ADDi 0U, // ADDi_MM 0U, // ADDiu 0U, // ADDiu_MM 0U, // ADDu 0U, // ADDu_MM 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 4U, // ALIGN 0U, // ALUIPC 0U, // AND 0U, // AND16_MM 0U, // AND64 0U, // ANDI16_MM 0U, // ANDI_B 0U, // AND_MM 0U, // AND_V 0U, // AND_V_D_PSEUDO 0U, // AND_V_H_PSEUDO 0U, // AND_V_W_PSEUDO 1U, // ANDi 1U, // ANDi64 1U, // ANDi_MM 1U, // APPEND 0U, // ASUB_S_B 0U, // ASUB_S_D 0U, // ASUB_S_H 0U, // ASUB_S_W 0U, // ASUB_U_B 0U, // ASUB_U_D 0U, // ASUB_U_H 0U, // ASUB_U_W 0U, // ATOMIC_CMP_SWAP_I16 0U, // ATOMIC_CMP_SWAP_I32 0U, // ATOMIC_CMP_SWAP_I64 0U, // ATOMIC_CMP_SWAP_I8 0U, // ATOMIC_LOAD_ADD_I16 0U, // ATOMIC_LOAD_ADD_I32 0U, // ATOMIC_LOAD_ADD_I64 0U, // ATOMIC_LOAD_ADD_I8 0U, // ATOMIC_LOAD_AND_I16 0U, // ATOMIC_LOAD_AND_I32 0U, // ATOMIC_LOAD_AND_I64 0U, // ATOMIC_LOAD_AND_I8 0U, // ATOMIC_LOAD_NAND_I16 0U, // ATOMIC_LOAD_NAND_I32 0U, // ATOMIC_LOAD_NAND_I64 0U, // ATOMIC_LOAD_NAND_I8 0U, // ATOMIC_LOAD_OR_I16 0U, // ATOMIC_LOAD_OR_I32 0U, // ATOMIC_LOAD_OR_I64 0U, // ATOMIC_LOAD_OR_I8 0U, // ATOMIC_LOAD_SUB_I16 0U, // ATOMIC_LOAD_SUB_I32 0U, // ATOMIC_LOAD_SUB_I64 0U, // ATOMIC_LOAD_SUB_I8 0U, // ATOMIC_LOAD_XOR_I16 0U, // ATOMIC_LOAD_XOR_I32 0U, // ATOMIC_LOAD_XOR_I64 0U, // ATOMIC_LOAD_XOR_I8 0U, // ATOMIC_SWAP_I16 0U, // ATOMIC_SWAP_I32 0U, // ATOMIC_SWAP_I64 0U, // ATOMIC_SWAP_I8 0U, // AUI 0U, // AUIPC 0U, // AVER_S_B 0U, // AVER_S_D 0U, // AVER_S_H 0U, // AVER_S_W 0U, // AVER_U_B 0U, // AVER_U_D 0U, // AVER_U_H 0U, // AVER_U_W 0U, // AVE_S_B 0U, // AVE_S_D 0U, // AVE_S_H 0U, // AVE_S_W 0U, // AVE_U_B 0U, // AVE_U_D 0U, // AVE_U_H 0U, // AVE_U_W 0U, // AddiuRxImmX16 0U, // AddiuRxPcImmX16 0U, // AddiuRxRxImm16 0U, // AddiuRxRxImmX16 0U, // AddiuRxRyOffMemX16 0U, // AddiuSpImm16 0U, // AddiuSpImmX16 0U, // AdduRxRyRz16 0U, // AndRxRxRy16 0U, // B 0U, // B16_MM 0U, // BADDu 0U, // BAL 0U, // BALC 1U, // BALIGN 0U, // BAL_BR 0U, // BBIT0 0U, // BBIT032 0U, // BBIT1 0U, // BBIT132 0U, // BC 0U, // BC0F 0U, // BC0FL 0U, // BC0T 0U, // BC0TL 0U, // BC1EQZ 0U, // BC1F 0U, // BC1FL 0U, // BC1F_MM 0U, // BC1NEZ 0U, // BC1T 0U, // BC1TL 0U, // BC1T_MM 0U, // BC2EQZ 0U, // BC2F 0U, // BC2FL 0U, // BC2NEZ 0U, // BC2T 0U, // BC2TL 0U, // BC3F 0U, // BC3FL 0U, // BC3T 0U, // BC3TL 0U, // BCLRI_B 0U, // BCLRI_D 0U, // BCLRI_H 0U, // BCLRI_W 0U, // BCLR_B 0U, // BCLR_D 0U, // BCLR_H 0U, // BCLR_W 0U, // BEQ 0U, // BEQ64 0U, // BEQC 0U, // BEQL 0U, // BEQZ16_MM 0U, // BEQZALC 0U, // BEQZC 0U, // BEQZC_MM 0U, // BEQ_MM 0U, // BGEC 0U, // BGEUC 0U, // BGEZ 0U, // BGEZ64 0U, // BGEZAL 0U, // BGEZALC 0U, // BGEZALL 0U, // BGEZALS_MM 0U, // BGEZAL_MM 0U, // BGEZC 0U, // BGEZL 0U, // BGEZ_MM 0U, // BGTZ 0U, // BGTZ64 0U, // BGTZALC 0U, // BGTZC 0U, // BGTZL 0U, // BGTZ_MM 1U, // BINSLI_B 1U, // BINSLI_D 1U, // BINSLI_H 1U, // BINSLI_W 2U, // BINSL_B 2U, // BINSL_D 2U, // BINSL_H 2U, // BINSL_W 1U, // BINSRI_B 1U, // BINSRI_D 1U, // BINSRI_H 1U, // BINSRI_W 2U, // BINSR_B 2U, // BINSR_D 2U, // BINSR_H 2U, // BINSR_W 0U, // BITREV 0U, // BITSWAP 0U, // BLEZ 0U, // BLEZ64 0U, // BLEZALC 0U, // BLEZC 0U, // BLEZL 0U, // BLEZ_MM 0U, // BLTC 0U, // BLTUC 0U, // BLTZ 0U, // BLTZ64 0U, // BLTZAL 0U, // BLTZALC 0U, // BLTZALL 0U, // BLTZALS_MM 0U, // BLTZAL_MM 0U, // BLTZC 0U, // BLTZL 0U, // BLTZ_MM 1U, // BMNZI_B 2U, // BMNZ_V 1U, // BMZI_B 2U, // BMZ_V 0U, // BNE 0U, // BNE64 0U, // BNEC 0U, // BNEGI_B 0U, // BNEGI_D 0U, // BNEGI_H 0U, // BNEGI_W 0U, // BNEG_B 0U, // BNEG_D 0U, // BNEG_H 0U, // BNEG_W 0U, // BNEL 0U, // BNEZ16_MM 0U, // BNEZALC 0U, // BNEZC 0U, // BNEZC_MM 0U, // BNE_MM 0U, // BNVC 0U, // BNZ_B 0U, // BNZ_D 0U, // BNZ_H 0U, // BNZ_V 0U, // BNZ_W 0U, // BOVC 0U, // BPOSGE32 0U, // BPOSGE32_PSEUDO 0U, // BREAK 0U, // BREAK16_MM 0U, // BREAK_MM 1U, // BSELI_B 0U, // BSEL_D_PSEUDO 0U, // BSEL_FD_PSEUDO 0U, // BSEL_FW_PSEUDO 0U, // BSEL_H_PSEUDO 2U, // BSEL_V 0U, // BSEL_W_PSEUDO 0U, // BSETI_B 0U, // BSETI_D 0U, // BSETI_H 0U, // BSETI_W 0U, // BSET_B 0U, // BSET_D 0U, // BSET_H 0U, // BSET_W 0U, // BZ_B 0U, // BZ_D 0U, // BZ_H 0U, // BZ_V 0U, // BZ_W 0U, // B_MM_Pseudo 0U, // BeqzRxImm16 0U, // BeqzRxImmX16 0U, // Bimm16 0U, // BimmX16 0U, // BnezRxImm16 0U, // BnezRxImmX16 0U, // Break16 0U, // Bteqz16 0U, // BteqzT8CmpX16 0U, // BteqzT8CmpiX16 0U, // BteqzT8SltX16 0U, // BteqzT8SltiX16 0U, // BteqzT8SltiuX16 0U, // BteqzT8SltuX16 0U, // BteqzX16 0U, // Btnez16 0U, // BtnezT8CmpX16 0U, // BtnezT8CmpiX16 0U, // BtnezT8SltX16 0U, // BtnezT8SltiX16 0U, // BtnezT8SltiuX16 0U, // BtnezT8SltuX16 0U, // BtnezX16 0U, // BuildPairF64 0U, // BuildPairF64_64 0U, // CACHE 0U, // CACHE_MM 0U, // CACHE_R6 0U, // CEIL_L_D64 0U, // CEIL_L_S 0U, // CEIL_W_D32 0U, // CEIL_W_D64 0U, // CEIL_W_MM 0U, // CEIL_W_S 0U, // CEIL_W_S_MM 0U, // CEQI_B 0U, // CEQI_D 0U, // CEQI_H 0U, // CEQI_W 0U, // CEQ_B 0U, // CEQ_D 0U, // CEQ_H 0U, // CEQ_W 0U, // CFC1 0U, // CFC1_MM 0U, // CFCMSA 5U, // CINS 5U, // CINS32 0U, // CLASS_D 0U, // CLASS_S 0U, // CLEI_S_B 0U, // CLEI_S_D 0U, // CLEI_S_H 0U, // CLEI_S_W 0U, // CLEI_U_B 0U, // CLEI_U_D 0U, // CLEI_U_H 0U, // CLEI_U_W 0U, // CLE_S_B 0U, // CLE_S_D 0U, // CLE_S_H 0U, // CLE_S_W 0U, // CLE_U_B 0U, // CLE_U_D 0U, // CLE_U_H 0U, // CLE_U_W 0U, // CLO 0U, // CLO_MM 0U, // CLO_R6 0U, // CLTI_S_B 0U, // CLTI_S_D 0U, // CLTI_S_H 0U, // CLTI_S_W 0U, // CLTI_U_B 0U, // CLTI_U_D 0U, // CLTI_U_H 0U, // CLTI_U_W 0U, // CLT_S_B 0U, // CLT_S_D 0U, // CLT_S_H 0U, // CLT_S_W 0U, // CLT_U_B 0U, // CLT_U_D 0U, // CLT_U_H 0U, // CLT_U_W 0U, // CLZ 0U, // CLZ_MM 0U, // CLZ_R6 0U, // CMPGDU_EQ_QB 0U, // CMPGDU_LE_QB 0U, // CMPGDU_LT_QB 0U, // CMPGU_EQ_QB 0U, // CMPGU_LE_QB 0U, // CMPGU_LT_QB 0U, // CMPU_EQ_QB 0U, // CMPU_LE_QB 0U, // CMPU_LT_QB 0U, // CMP_EQ_D 0U, // CMP_EQ_PH 0U, // CMP_EQ_S 0U, // CMP_F_D 0U, // CMP_F_S 0U, // CMP_LE_D 0U, // CMP_LE_PH 0U, // CMP_LE_S 0U, // CMP_LT_D 0U, // CMP_LT_PH 0U, // CMP_LT_S 0U, // CMP_SAF_D 0U, // CMP_SAF_S 0U, // CMP_SEQ_D 0U, // CMP_SEQ_S 0U, // CMP_SLE_D 0U, // CMP_SLE_S 0U, // CMP_SLT_D 0U, // CMP_SLT_S 0U, // CMP_SUEQ_D 0U, // CMP_SUEQ_S 0U, // CMP_SULE_D 0U, // CMP_SULE_S 0U, // CMP_SULT_D 0U, // CMP_SULT_S 0U, // CMP_SUN_D 0U, // CMP_SUN_S 0U, // CMP_UEQ_D 0U, // CMP_UEQ_S 0U, // CMP_ULE_D 0U, // CMP_ULE_S 0U, // CMP_ULT_D 0U, // CMP_ULT_S 0U, // CMP_UN_D 0U, // CMP_UN_S 0U, // CONSTPOOL_ENTRY 0U, // COPY_FD_PSEUDO 0U, // COPY_FW_PSEUDO 8U, // COPY_S_B 8U, // COPY_S_D 8U, // COPY_S_H 8U, // COPY_S_W 8U, // COPY_U_B 8U, // COPY_U_D 8U, // COPY_U_H 8U, // COPY_U_W 0U, // CTC1 0U, // CTC1_MM 0U, // CTCMSA 0U, // CVT_D32_S 0U, // CVT_D32_W 0U, // CVT_D32_W_MM 0U, // CVT_D64_L 0U, // CVT_D64_S 0U, // CVT_D64_W 0U, // CVT_D_S_MM 0U, // CVT_L_D64 0U, // CVT_L_D64_MM 0U, // CVT_L_S 0U, // CVT_L_S_MM 0U, // CVT_S_D32 0U, // CVT_S_D32_MM 0U, // CVT_S_D64 0U, // CVT_S_L 0U, // CVT_S_W 0U, // CVT_S_W_MM 0U, // CVT_W_D32 0U, // CVT_W_D64 0U, // CVT_W_MM 0U, // CVT_W_S 0U, // CVT_W_S_MM 0U, // C_EQ_D32 0U, // C_EQ_D64 0U, // C_EQ_S 0U, // C_F_D32 0U, // C_F_D64 0U, // C_F_S 0U, // C_LE_D32 0U, // C_LE_D64 0U, // C_LE_S 0U, // C_LT_D32 0U, // C_LT_D64 0U, // C_LT_S 0U, // C_NGE_D32 0U, // C_NGE_D64 0U, // C_NGE_S 0U, // C_NGLE_D32 0U, // C_NGLE_D64 0U, // C_NGLE_S 0U, // C_NGL_D32 0U, // C_NGL_D64 0U, // C_NGL_S 0U, // C_NGT_D32 0U, // C_NGT_D64 0U, // C_NGT_S 0U, // C_OLE_D32 0U, // C_OLE_D64 0U, // C_OLE_S 0U, // C_OLT_D32 0U, // C_OLT_D64 0U, // C_OLT_S 0U, // C_SEQ_D32 0U, // C_SEQ_D64 0U, // C_SEQ_S 0U, // C_SF_D32 0U, // C_SF_D64 0U, // C_SF_S 0U, // C_UEQ_D32 0U, // C_UEQ_D64 0U, // C_UEQ_S 0U, // C_ULE_D32 0U, // C_ULE_D64 0U, // C_ULE_S 0U, // C_ULT_D32 0U, // C_ULT_D64 0U, // C_ULT_S 0U, // C_UN_D32 0U, // C_UN_D64 0U, // C_UN_S 0U, // CmpRxRy16 0U, // CmpiRxImm16 0U, // CmpiRxImmX16 0U, // Constant32 0U, // DADD 0U, // DADDi 0U, // DADDiu 0U, // DADDu 0U, // DAHI 4U, // DALIGN 0U, // DATI 0U, // DAUI 0U, // DBITSWAP 0U, // DCLO 0U, // DCLO_R6 0U, // DCLZ 0U, // DCLZ_R6 0U, // DDIV 0U, // DDIVU 0U, // DERET 0U, // DERET_MM 21U, // DEXT 21U, // DEXTM 21U, // DEXTU 0U, // DI 21U, // DINS 21U, // DINSM 21U, // DINSU 0U, // DIV 0U, // DIVU 0U, // DIV_S_B 0U, // DIV_S_D 0U, // DIV_S_H 0U, // DIV_S_W 0U, // DIV_U_B 0U, // DIV_U_D 0U, // DIV_U_H 0U, // DIV_U_W 0U, // DI_MM 4U, // DLSA 4U, // DLSA_R6 1U, // DMFC0 0U, // DMFC1 1U, // DMFC2 0U, // DMOD 0U, // DMODU 1U, // DMTC0 0U, // DMTC1 1U, // DMTC2 0U, // DMUH 0U, // DMUHU 0U, // DMUL 0U, // DMULT 0U, // DMULTu 0U, // DMULU 0U, // DMUL_R6 0U, // DOTP_S_D 0U, // DOTP_S_H 0U, // DOTP_S_W 0U, // DOTP_U_D 0U, // DOTP_U_H 0U, // DOTP_U_W 2U, // DPADD_S_D 2U, // DPADD_S_H 2U, // DPADD_S_W 2U, // DPADD_U_D 2U, // DPADD_U_H 2U, // DPADD_U_W 0U, // DPAQX_SA_W_PH 0U, // DPAQX_S_W_PH 0U, // DPAQ_SA_L_W 0U, // DPAQ_S_W_PH 0U, // DPAU_H_QBL 0U, // DPAU_H_QBR 0U, // DPAX_W_PH 0U, // DPA_W_PH 0U, // DPOP 0U, // DPSQX_SA_W_PH 0U, // DPSQX_S_W_PH 0U, // DPSQ_SA_L_W 0U, // DPSQ_S_W_PH 2U, // DPSUB_S_D 2U, // DPSUB_S_H 2U, // DPSUB_S_W 2U, // DPSUB_U_D 2U, // DPSUB_U_H 2U, // DPSUB_U_W 0U, // DPSU_H_QBL 0U, // DPSU_H_QBR 0U, // DPSX_W_PH 0U, // DPS_W_PH 1U, // DROTR 1U, // DROTR32 0U, // DROTRV 0U, // DSBH 0U, // DSDIV 0U, // DSHD 1U, // DSLL 1U, // DSLL32 0U, // DSLL64_32 0U, // DSLLV 1U, // DSRA 1U, // DSRA32 0U, // DSRAV 1U, // DSRL 1U, // DSRL32 0U, // DSRLV 0U, // DSUB 0U, // DSUBu 0U, // DUDIV 0U, // DivRxRy16 0U, // DivuRxRy16 0U, // EHB 0U, // EHB_MM 0U, // EI 0U, // EI_MM 0U, // ERET 0U, // ERET_MM 21U, // EXT 1U, // EXTP 1U, // EXTPDP 0U, // EXTPDPV 0U, // EXTPV 0U, // EXTRV_RS_W 0U, // EXTRV_R_W 0U, // EXTRV_S_H 0U, // EXTRV_W 1U, // EXTR_RS_W 1U, // EXTR_R_W 1U, // EXTR_S_H 1U, // EXTR_W 5U, // EXTS 5U, // EXTS32 21U, // EXT_MM 0U, // ExtractElementF64 0U, // ExtractElementF64_64 0U, // FABS_D 0U, // FABS_D32 0U, // FABS_D64 0U, // FABS_MM 0U, // FABS_S 0U, // FABS_S_MM 0U, // FABS_W 0U, // FADD_D 0U, // FADD_D32 0U, // FADD_D64 0U, // FADD_MM 0U, // FADD_S 0U, // FADD_S_MM 0U, // FADD_W 0U, // FCAF_D 0U, // FCAF_W 0U, // FCEQ_D 0U, // FCEQ_W 0U, // FCLASS_D 0U, // FCLASS_W 0U, // FCLE_D 0U, // FCLE_W 0U, // FCLT_D 0U, // FCLT_W 0U, // FCMP_D32 0U, // FCMP_D32_MM 0U, // FCMP_D64 0U, // FCMP_S32 0U, // FCMP_S32_MM 0U, // FCNE_D 0U, // FCNE_W 0U, // FCOR_D 0U, // FCOR_W 0U, // FCUEQ_D 0U, // FCUEQ_W 0U, // FCULE_D 0U, // FCULE_W 0U, // FCULT_D 0U, // FCULT_W 0U, // FCUNE_D 0U, // FCUNE_W 0U, // FCUN_D 0U, // FCUN_W 0U, // FDIV_D 0U, // FDIV_D32 0U, // FDIV_D64 0U, // FDIV_MM 0U, // FDIV_S 0U, // FDIV_S_MM 0U, // FDIV_W 0U, // FEXDO_H 0U, // FEXDO_W 0U, // FEXP2_D 0U, // FEXP2_D_1_PSEUDO 0U, // FEXP2_W 0U, // FEXP2_W_1_PSEUDO 0U, // FEXUPL_D 0U, // FEXUPL_W 0U, // FEXUPR_D 0U, // FEXUPR_W 0U, // FFINT_S_D 0U, // FFINT_S_W 0U, // FFINT_U_D 0U, // FFINT_U_W 0U, // FFQL_D 0U, // FFQL_W 0U, // FFQR_D 0U, // FFQR_W 0U, // FILL_B 0U, // FILL_D 0U, // FILL_FD_PSEUDO 0U, // FILL_FW_PSEUDO 0U, // FILL_H 0U, // FILL_W 0U, // FLOG2_D 0U, // FLOG2_W 0U, // FLOOR_L_D64 0U, // FLOOR_L_S 0U, // FLOOR_W_D32 0U, // FLOOR_W_D64 0U, // FLOOR_W_MM 0U, // FLOOR_W_S 0U, // FLOOR_W_S_MM 2U, // FMADD_D 2U, // FMADD_W 0U, // FMAX_A_D 0U, // FMAX_A_W 0U, // FMAX_D 0U, // FMAX_W 0U, // FMIN_A_D 0U, // FMIN_A_W 0U, // FMIN_D 0U, // FMIN_W 0U, // FMOV_D32 0U, // FMOV_D32_MM 0U, // FMOV_D64 0U, // FMOV_S 0U, // FMOV_S_MM 2U, // FMSUB_D 2U, // FMSUB_W 0U, // FMUL_D 0U, // FMUL_D32 0U, // FMUL_D64 0U, // FMUL_MM 0U, // FMUL_S 0U, // FMUL_S_MM 0U, // FMUL_W 0U, // FNEG_D32 0U, // FNEG_D64 0U, // FNEG_MM 0U, // FNEG_S 0U, // FNEG_S_MM 0U, // FRCP_D 0U, // FRCP_W 0U, // FRINT_D 0U, // FRINT_W 0U, // FRSQRT_D 0U, // FRSQRT_W 0U, // FSAF_D 0U, // FSAF_W 0U, // FSEQ_D 0U, // FSEQ_W 0U, // FSLE_D 0U, // FSLE_W 0U, // FSLT_D 0U, // FSLT_W 0U, // FSNE_D 0U, // FSNE_W 0U, // FSOR_D 0U, // FSOR_W 0U, // FSQRT_D 0U, // FSQRT_D32 0U, // FSQRT_D64 0U, // FSQRT_MM 0U, // FSQRT_S 0U, // FSQRT_S_MM 0U, // FSQRT_W 0U, // FSUB_D 0U, // FSUB_D32 0U, // FSUB_D64 0U, // FSUB_MM 0U, // FSUB_S 0U, // FSUB_S_MM 0U, // FSUB_W 0U, // FSUEQ_D 0U, // FSUEQ_W 0U, // FSULE_D 0U, // FSULE_W 0U, // FSULT_D 0U, // FSULT_W 0U, // FSUNE_D 0U, // FSUNE_W 0U, // FSUN_D 0U, // FSUN_W 0U, // FTINT_S_D 0U, // FTINT_S_W 0U, // FTINT_U_D 0U, // FTINT_U_W 0U, // FTQ_H 0U, // FTQ_W 0U, // FTRUNC_S_D 0U, // FTRUNC_S_W 0U, // FTRUNC_U_D 0U, // FTRUNC_U_W 0U, // GotPrologue16 0U, // HADD_S_D 0U, // HADD_S_H 0U, // HADD_S_W 0U, // HADD_U_D 0U, // HADD_U_H 0U, // HADD_U_W 0U, // HSUB_S_D 0U, // HSUB_S_H 0U, // HSUB_S_W 0U, // HSUB_U_D 0U, // HSUB_U_H 0U, // HSUB_U_W 0U, // ILVEV_B 0U, // ILVEV_D 0U, // ILVEV_H 0U, // ILVEV_W 0U, // ILVL_B 0U, // ILVL_D 0U, // ILVL_H 0U, // ILVL_W 0U, // ILVOD_B 0U, // ILVOD_D 0U, // ILVOD_H 0U, // ILVOD_W 0U, // ILVR_B 0U, // ILVR_D 0U, // ILVR_H 0U, // ILVR_W 21U, // INS 0U, // INSERT_B 0U, // INSERT_B_VIDX_PSEUDO 0U, // INSERT_D 0U, // INSERT_D_VIDX_PSEUDO 0U, // INSERT_FD_PSEUDO 0U, // INSERT_FD_VIDX_PSEUDO 0U, // INSERT_FW_PSEUDO 0U, // INSERT_FW_VIDX_PSEUDO 0U, // INSERT_H 0U, // INSERT_H_VIDX_PSEUDO 0U, // INSERT_W 0U, // INSERT_W_VIDX_PSEUDO 0U, // INSV 0U, // INSVE_B 0U, // INSVE_D 0U, // INSVE_H 0U, // INSVE_W 21U, // INS_MM 0U, // J 0U, // JAL 0U, // JALR 0U, // JALR16_MM 0U, // JALR64 0U, // JALR64Pseudo 0U, // JALRPseudo 0U, // JALRS16_MM 0U, // JALRS_MM 0U, // JALR_HB 0U, // JALR_MM 0U, // JALS_MM 0U, // JALX 0U, // JALX_MM 0U, // JAL_MM 0U, // JIALC 0U, // JIC 0U, // JR 0U, // JR16_MM 0U, // JR64 0U, // JRADDIUSP 0U, // JRC16_MM 0U, // JR_HB 0U, // JR_HB_R6 0U, // JR_MM 0U, // J_MM 0U, // Jal16 0U, // JalB16 0U, // JalOneReg 0U, // JalTwoReg 0U, // JrRa16 0U, // JrcRa16 0U, // JrcRx16 0U, // JumpLinkReg16 0U, // LB 0U, // LB64 0U, // LBU16_MM 0U, // LBUX 0U, // LB_MM 0U, // LBu 0U, // LBu64 0U, // LBu_MM 0U, // LD 0U, // LDC1 0U, // LDC164 0U, // LDC1_MM 0U, // LDC2 0U, // LDC2_R6 0U, // LDC3 0U, // LDI_B 0U, // LDI_D 0U, // LDI_H 0U, // LDI_W 0U, // LDL 0U, // LDPC 0U, // LDR 0U, // LDXC1 0U, // LDXC164 0U, // LD_B 0U, // LD_D 0U, // LD_H 0U, // LD_W 0U, // LEA_ADDiu 0U, // LEA_ADDiu64 0U, // LEA_ADDiu_MM 0U, // LH 0U, // LH64 0U, // LHU16_MM 0U, // LHX 0U, // LH_MM 0U, // LHu 0U, // LHu64 0U, // LHu_MM 0U, // LI16_MM 0U, // LL 0U, // LLD 0U, // LLD_R6 0U, // LL_MM 0U, // LL_R6 0U, // LOAD_ACC128 0U, // LOAD_ACC64 0U, // LOAD_ACC64DSP 0U, // LOAD_CCOND_DSP 0U, // LONG_BRANCH_ADDiu 0U, // LONG_BRANCH_DADDiu 0U, // LONG_BRANCH_LUi 4U, // LSA 4U, // LSA_R6 0U, // LUXC1 0U, // LUXC164 0U, // LUXC1_MM 0U, // LUi 0U, // LUi64 0U, // LUi_MM 0U, // LW 0U, // LW16_MM 0U, // LW64 0U, // LWC1 0U, // LWC1_MM 0U, // LWC2 0U, // LWC2_R6 0U, // LWC3 0U, // LWGP_MM 0U, // LWL 0U, // LWL64 0U, // LWL_MM 0U, // LWM16_MM 0U, // LWM32_MM 0U, // LWM_MM 0U, // LWPC 0U, // LWP_MM 0U, // LWR 0U, // LWR64 0U, // LWR_MM 0U, // LWSP_MM 0U, // LWUPC 0U, // LWU_MM 0U, // LWX 0U, // LWXC1 0U, // LWXC1_MM 0U, // LWXS_MM 0U, // LW_MM 0U, // LWu 0U, // LbRxRyOffMemX16 0U, // LbuRxRyOffMemX16 0U, // LhRxRyOffMemX16 0U, // LhuRxRyOffMemX16 0U, // LiRxImm16 0U, // LiRxImmAlignX16 0U, // LiRxImmX16 0U, // LoadAddr32Imm 0U, // LoadAddr32Reg 0U, // LoadImm32Reg 0U, // LoadImm64Reg 0U, // LwConstant32 0U, // LwRxPcTcp16 0U, // LwRxPcTcpX16 0U, // LwRxRyOffMemX16 0U, // LwRxSpImmX16 0U, // MADD 2U, // MADDF_D 2U, // MADDF_S 2U, // MADDR_Q_H 2U, // MADDR_Q_W 0U, // MADDU 0U, // MADDU_DSP 0U, // MADDU_MM 2U, // MADDV_B 2U, // MADDV_D 2U, // MADDV_H 2U, // MADDV_W 20U, // MADD_D32 20U, // MADD_D32_MM 20U, // MADD_D64 0U, // MADD_DSP 0U, // MADD_MM 2U, // MADD_Q_H 2U, // MADD_Q_W 20U, // MADD_S 20U, // MADD_S_MM 0U, // MAQ_SA_W_PHL 0U, // MAQ_SA_W_PHR 0U, // MAQ_S_W_PHL 0U, // MAQ_S_W_PHR 0U, // MAXA_D 0U, // MAXA_S 0U, // MAXI_S_B 0U, // MAXI_S_D 0U, // MAXI_S_H 0U, // MAXI_S_W 0U, // MAXI_U_B 0U, // MAXI_U_D 0U, // MAXI_U_H 0U, // MAXI_U_W 0U, // MAX_A_B 0U, // MAX_A_D 0U, // MAX_A_H 0U, // MAX_A_W 0U, // MAX_D 0U, // MAX_S 0U, // MAX_S_B 0U, // MAX_S_D 0U, // MAX_S_H 0U, // MAX_S_W 0U, // MAX_U_B 0U, // MAX_U_D 0U, // MAX_U_H 0U, // MAX_U_W 1U, // MFC0 0U, // MFC1 0U, // MFC1_MM 1U, // MFC2 0U, // MFHC1_D32 0U, // MFHC1_D64 0U, // MFHC1_MM 0U, // MFHI 0U, // MFHI16_MM 0U, // MFHI64 0U, // MFHI_DSP 0U, // MFHI_MM 0U, // MFLO 0U, // MFLO16_MM 0U, // MFLO64 0U, // MFLO_DSP 0U, // MFLO_MM 0U, // MINA_D 0U, // MINA_S 0U, // MINI_S_B 0U, // MINI_S_D 0U, // MINI_S_H 0U, // MINI_S_W 0U, // MINI_U_B 0U, // MINI_U_D 0U, // MINI_U_H 0U, // MINI_U_W 0U, // MIN_A_B 0U, // MIN_A_D 0U, // MIN_A_H 0U, // MIN_A_W 0U, // MIN_D 0U, // MIN_S 0U, // MIN_S_B 0U, // MIN_S_D 0U, // MIN_S_H 0U, // MIN_S_W 0U, // MIN_U_B 0U, // MIN_U_D 0U, // MIN_U_H 0U, // MIN_U_W 0U, // MIPSeh_return32 0U, // MIPSeh_return64 0U, // MOD 0U, // MODSUB 0U, // MODU 0U, // MOD_S_B 0U, // MOD_S_D 0U, // MOD_S_H 0U, // MOD_S_W 0U, // MOD_U_B 0U, // MOD_U_D 0U, // MOD_U_H 0U, // MOD_U_W 0U, // MOVE16_MM 0U, // MOVEP_MM 0U, // MOVE_V 0U, // MOVF_D32 0U, // MOVF_D32_MM 0U, // MOVF_D64 0U, // MOVF_I 0U, // MOVF_I64 0U, // MOVF_I_MM 0U, // MOVF_S 0U, // MOVF_S_MM 0U, // MOVN_I64_D64 0U, // MOVN_I64_I 0U, // MOVN_I64_I64 0U, // MOVN_I64_S 0U, // MOVN_I_D32 0U, // MOVN_I_D32_MM 0U, // MOVN_I_D64 0U, // MOVN_I_I 0U, // MOVN_I_I64 0U, // MOVN_I_MM 0U, // MOVN_I_S 0U, // MOVN_I_S_MM 0U, // MOVT_D32 0U, // MOVT_D32_MM 0U, // MOVT_D64 0U, // MOVT_I 0U, // MOVT_I64 0U, // MOVT_I_MM 0U, // MOVT_S 0U, // MOVT_S_MM 0U, // MOVZ_I64_D64 0U, // MOVZ_I64_I 0U, // MOVZ_I64_I64 0U, // MOVZ_I64_S 0U, // MOVZ_I_D32 0U, // MOVZ_I_D32_MM 0U, // MOVZ_I_D64 0U, // MOVZ_I_I 0U, // MOVZ_I_I64 0U, // MOVZ_I_MM 0U, // MOVZ_I_S 0U, // MOVZ_I_S_MM 0U, // MSUB 2U, // MSUBF_D 2U, // MSUBF_S 2U, // MSUBR_Q_H 2U, // MSUBR_Q_W 0U, // MSUBU 0U, // MSUBU_DSP 0U, // MSUBU_MM 2U, // MSUBV_B 2U, // MSUBV_D 2U, // MSUBV_H 2U, // MSUBV_W 20U, // MSUB_D32 20U, // MSUB_D32_MM 20U, // MSUB_D64 0U, // MSUB_DSP 0U, // MSUB_MM 2U, // MSUB_Q_H 2U, // MSUB_Q_W 20U, // MSUB_S 20U, // MSUB_S_MM 1U, // MTC0 0U, // MTC1 0U, // MTC1_MM 1U, // MTC2 0U, // MTHC1_D32 0U, // MTHC1_D64 0U, // MTHC1_MM 0U, // MTHI 0U, // MTHI64 0U, // MTHI_DSP 0U, // MTHI_MM 0U, // MTHLIP 0U, // MTLO 0U, // MTLO64 0U, // MTLO_DSP 0U, // MTLO_MM 0U, // MTM0 0U, // MTM1 0U, // MTM2 0U, // MTP0 0U, // MTP1 0U, // MTP2 0U, // MUH 0U, // MUHU 0U, // MUL 0U, // MULEQ_S_W_PHL 0U, // MULEQ_S_W_PHR 0U, // MULEU_S_PH_QBL 0U, // MULEU_S_PH_QBR 0U, // MULQ_RS_PH 0U, // MULQ_RS_W 0U, // MULQ_S_PH 0U, // MULQ_S_W 0U, // MULR_Q_H 0U, // MULR_Q_W 0U, // MULSAQ_S_W_PH 0U, // MULSA_W_PH 0U, // MULT 0U, // MULTU_DSP 0U, // MULT_DSP 0U, // MULT_MM 0U, // MULTu 0U, // MULTu_MM 0U, // MULU 0U, // MULV_B 0U, // MULV_D 0U, // MULV_H 0U, // MULV_W 0U, // MUL_MM 0U, // MUL_PH 0U, // MUL_Q_H 0U, // MUL_Q_W 0U, // MUL_R6 0U, // MUL_S_PH 0U, // Mfhi16 0U, // Mflo16 0U, // Move32R16 0U, // MoveR3216 0U, // MultRxRy16 0U, // MultRxRyRz16 0U, // MultuRxRy16 0U, // MultuRxRyRz16 0U, // NLOC_B 0U, // NLOC_D 0U, // NLOC_H 0U, // NLOC_W 0U, // NLZC_B 0U, // NLZC_D 0U, // NLZC_H 0U, // NLZC_W 20U, // NMADD_D32 20U, // NMADD_D32_MM 20U, // NMADD_D64 20U, // NMADD_S 20U, // NMADD_S_MM 20U, // NMSUB_D32 20U, // NMSUB_D32_MM 20U, // NMSUB_D64 20U, // NMSUB_S 20U, // NMSUB_S_MM 0U, // NOP 0U, // NOR 0U, // NOR64 0U, // NORI_B 0U, // NOR_MM 0U, // NOR_V 0U, // NOR_V_D_PSEUDO 0U, // NOR_V_H_PSEUDO 0U, // NOR_V_W_PSEUDO 0U, // NOT16_MM 0U, // NegRxRy16 0U, // NotRxRy16 0U, // OR 0U, // OR16_MM 0U, // OR64 0U, // ORI_B 0U, // OR_MM 0U, // OR_V 0U, // OR_V_D_PSEUDO 0U, // OR_V_H_PSEUDO 0U, // OR_V_W_PSEUDO 1U, // ORi 1U, // ORi64 1U, // ORi_MM 0U, // OrRxRxRy16 0U, // PACKRL_PH 0U, // PAUSE 0U, // PAUSE_MM 0U, // PCKEV_B 0U, // PCKEV_D 0U, // PCKEV_H 0U, // PCKEV_W 0U, // PCKOD_B 0U, // PCKOD_D 0U, // PCKOD_H 0U, // PCKOD_W 0U, // PCNT_B 0U, // PCNT_D 0U, // PCNT_H 0U, // PCNT_W 0U, // PICK_PH 0U, // PICK_QB 0U, // POP 0U, // PRECEQU_PH_QBL 0U, // PRECEQU_PH_QBLA 0U, // PRECEQU_PH_QBR 0U, // PRECEQU_PH_QBRA 0U, // PRECEQ_W_PHL 0U, // PRECEQ_W_PHR 0U, // PRECEU_PH_QBL 0U, // PRECEU_PH_QBLA 0U, // PRECEU_PH_QBR 0U, // PRECEU_PH_QBRA 0U, // PRECRQU_S_QB_PH 0U, // PRECRQ_PH_W 0U, // PRECRQ_QB_PH 0U, // PRECRQ_RS_PH_W 0U, // PRECR_QB_PH 1U, // PRECR_SRA_PH_W 1U, // PRECR_SRA_R_PH_W 0U, // PREF 0U, // PREF_MM 0U, // PREF_R6 1U, // PREPEND 0U, // PseudoCMPU_EQ_QB 0U, // PseudoCMPU_LE_QB 0U, // PseudoCMPU_LT_QB 0U, // PseudoCMP_EQ_PH 0U, // PseudoCMP_LE_PH 0U, // PseudoCMP_LT_PH 0U, // PseudoCVT_D32_W 0U, // PseudoCVT_D64_L 0U, // PseudoCVT_D64_W 0U, // PseudoCVT_S_L 0U, // PseudoCVT_S_W 0U, // PseudoDMULT 0U, // PseudoDMULTu 0U, // PseudoDSDIV 0U, // PseudoDUDIV 0U, // PseudoIndirectBranch 0U, // PseudoIndirectBranch64 0U, // PseudoMADD 0U, // PseudoMADDU 0U, // PseudoMFHI 0U, // PseudoMFHI64 0U, // PseudoMFLO 0U, // PseudoMFLO64 0U, // PseudoMSUB 0U, // PseudoMSUBU 0U, // PseudoMTLOHI 0U, // PseudoMTLOHI64 0U, // PseudoMTLOHI_DSP 0U, // PseudoMULT 0U, // PseudoMULTu 0U, // PseudoPICK_PH 0U, // PseudoPICK_QB 0U, // PseudoReturn 0U, // PseudoReturn64 0U, // PseudoSDIV 0U, // PseudoSELECTFP_F_D32 0U, // PseudoSELECTFP_F_D64 0U, // PseudoSELECTFP_F_I 0U, // PseudoSELECTFP_F_I64 0U, // PseudoSELECTFP_F_S 0U, // PseudoSELECTFP_T_D32 0U, // PseudoSELECTFP_T_D64 0U, // PseudoSELECTFP_T_I 0U, // PseudoSELECTFP_T_I64 0U, // PseudoSELECTFP_T_S 0U, // PseudoSELECT_D32 0U, // PseudoSELECT_D64 0U, // PseudoSELECT_I 0U, // PseudoSELECT_I64 0U, // PseudoSELECT_S 0U, // PseudoUDIV 0U, // RADDU_W_QB 0U, // RDDSP 0U, // RDHWR 0U, // RDHWR64 0U, // RDHWR_MM 0U, // REPLV_PH 0U, // REPLV_QB 0U, // REPL_PH 0U, // REPL_QB 0U, // RINT_D 0U, // RINT_S 1U, // ROTR 0U, // ROTRV 0U, // ROTRV_MM 1U, // ROTR_MM 0U, // ROUND_L_D64 0U, // ROUND_L_S 0U, // ROUND_W_D32 0U, // ROUND_W_D64 0U, // ROUND_W_MM 0U, // ROUND_W_S 0U, // ROUND_W_S_MM 0U, // Restore16 0U, // RestoreX16 0U, // RetRA 0U, // RetRA16 1U, // SAT_S_B 1U, // SAT_S_D 0U, // SAT_S_H 1U, // SAT_S_W 1U, // SAT_U_B 1U, // SAT_U_D 0U, // SAT_U_H 1U, // SAT_U_W 0U, // SB 0U, // SB16_MM 0U, // SB64 0U, // SB_MM 0U, // SC 0U, // SCD 0U, // SCD_R6 0U, // SC_MM 0U, // SC_R6 0U, // SD 0U, // SDBBP 0U, // SDBBP16_MM 0U, // SDBBP_MM 0U, // SDBBP_R6 0U, // SDC1 0U, // SDC164 0U, // SDC1_MM 0U, // SDC2 0U, // SDC2_R6 0U, // SDC3 0U, // SDIV 0U, // SDIV_MM 0U, // SDL 0U, // SDR 0U, // SDXC1 0U, // SDXC164 0U, // SEB 0U, // SEB64 0U, // SEB_MM 0U, // SEH 0U, // SEH64 0U, // SEH_MM 0U, // SELEQZ 0U, // SELEQZ64 0U, // SELEQZ_D 0U, // SELEQZ_S 0U, // SELNEZ 0U, // SELNEZ64 0U, // SELNEZ_D 0U, // SELNEZ_S 2U, // SEL_D 2U, // SEL_S 0U, // SEQ 0U, // SEQi 0U, // SH 0U, // SH16_MM 0U, // SH64 0U, // SHF_B 0U, // SHF_H 0U, // SHF_W 0U, // SHILO 0U, // SHILOV 0U, // SHLLV_PH 0U, // SHLLV_QB 0U, // SHLLV_S_PH 0U, // SHLLV_S_W 1U, // SHLL_PH 1U, // SHLL_QB 1U, // SHLL_S_PH 1U, // SHLL_S_W 0U, // SHRAV_PH 0U, // SHRAV_QB 0U, // SHRAV_R_PH 0U, // SHRAV_R_QB 0U, // SHRAV_R_W 1U, // SHRA_PH 1U, // SHRA_QB 1U, // SHRA_R_PH 1U, // SHRA_R_QB 1U, // SHRA_R_W 0U, // SHRLV_PH 0U, // SHRLV_QB 1U, // SHRL_PH 1U, // SHRL_QB 0U, // SH_MM 9U, // SLDI_B 9U, // SLDI_D 9U, // SLDI_H 9U, // SLDI_W 10U, // SLD_B 10U, // SLD_D 10U, // SLD_H 10U, // SLD_W 1U, // SLL 0U, // SLL16_MM 0U, // SLL64_32 0U, // SLL64_64 0U, // SLLI_B 0U, // SLLI_D 0U, // SLLI_H 0U, // SLLI_W 0U, // SLLV 0U, // SLLV_MM 0U, // SLL_B 0U, // SLL_D 0U, // SLL_H 1U, // SLL_MM 0U, // SLL_W 0U, // SLT 0U, // SLT64 0U, // SLT_MM 0U, // SLTi 0U, // SLTi64 0U, // SLTi_MM 0U, // SLTiu 0U, // SLTiu64 0U, // SLTiu_MM 0U, // SLTu 0U, // SLTu64 0U, // SLTu_MM 0U, // SNE 0U, // SNEi 0U, // SNZ_B_PSEUDO 0U, // SNZ_D_PSEUDO 0U, // SNZ_H_PSEUDO 0U, // SNZ_V_PSEUDO 0U, // SNZ_W_PSEUDO 8U, // SPLATI_B 8U, // SPLATI_D 8U, // SPLATI_H 8U, // SPLATI_W 8U, // SPLAT_B 8U, // SPLAT_D 8U, // SPLAT_H 8U, // SPLAT_W 1U, // SRA 0U, // SRAI_B 0U, // SRAI_D 0U, // SRAI_H 0U, // SRAI_W 1U, // SRARI_B 1U, // SRARI_D 0U, // SRARI_H 1U, // SRARI_W 0U, // SRAR_B 0U, // SRAR_D 0U, // SRAR_H 0U, // SRAR_W 0U, // SRAV 0U, // SRAV_MM 0U, // SRA_B 0U, // SRA_D 0U, // SRA_H 1U, // SRA_MM 0U, // SRA_W 1U, // SRL 0U, // SRL16_MM 0U, // SRLI_B 0U, // SRLI_D 0U, // SRLI_H 0U, // SRLI_W 1U, // SRLRI_B 1U, // SRLRI_D 0U, // SRLRI_H 1U, // SRLRI_W 0U, // SRLR_B 0U, // SRLR_D 0U, // SRLR_H 0U, // SRLR_W 0U, // SRLV 0U, // SRLV_MM 0U, // SRL_B 0U, // SRL_D 0U, // SRL_H 1U, // SRL_MM 0U, // SRL_W 0U, // SSNOP 0U, // SSNOP_MM 0U, // STORE_ACC128 0U, // STORE_ACC64 0U, // STORE_ACC64DSP 0U, // STORE_CCOND_DSP 0U, // ST_B 0U, // ST_D 0U, // ST_H 0U, // ST_W 0U, // SUB 0U, // SUBQH_PH 0U, // SUBQH_R_PH 0U, // SUBQH_R_W 0U, // SUBQH_W 0U, // SUBQ_PH 0U, // SUBQ_S_PH 0U, // SUBQ_S_W 0U, // SUBSUS_U_B 0U, // SUBSUS_U_D 0U, // SUBSUS_U_H 0U, // SUBSUS_U_W 0U, // SUBSUU_S_B 0U, // SUBSUU_S_D 0U, // SUBSUU_S_H 0U, // SUBSUU_S_W 0U, // SUBS_S_B 0U, // SUBS_S_D 0U, // SUBS_S_H 0U, // SUBS_S_W 0U, // SUBS_U_B 0U, // SUBS_U_D 0U, // SUBS_U_H 0U, // SUBS_U_W 0U, // SUBU16_MM 0U, // SUBUH_QB 0U, // SUBUH_R_QB 0U, // SUBU_PH 0U, // SUBU_QB 0U, // SUBU_S_PH 0U, // SUBU_S_QB 0U, // SUBVI_B 0U, // SUBVI_D 0U, // SUBVI_H 0U, // SUBVI_W 0U, // SUBV_B 0U, // SUBV_D 0U, // SUBV_H 0U, // SUBV_W 0U, // SUB_MM 0U, // SUBu 0U, // SUBu_MM 0U, // SUXC1 0U, // SUXC164 0U, // SUXC1_MM 0U, // SW 0U, // SW16_MM 0U, // SW64 0U, // SWC1 0U, // SWC1_MM 0U, // SWC2 0U, // SWC2_R6 0U, // SWC3 0U, // SWL 0U, // SWL64 0U, // SWL_MM 0U, // SWM16_MM 0U, // SWM32_MM 0U, // SWM_MM 0U, // SWP_MM 0U, // SWR 0U, // SWR64 0U, // SWR_MM 0U, // SWSP_MM 0U, // SWXC1 0U, // SWXC1_MM 0U, // SW_MM 0U, // SYNC 0U, // SYNCI 0U, // SYNC_MM 0U, // SYSCALL 0U, // SYSCALL_MM 0U, // SZ_B_PSEUDO 0U, // SZ_D_PSEUDO 0U, // SZ_H_PSEUDO 0U, // SZ_V_PSEUDO 0U, // SZ_W_PSEUDO 0U, // Save16 0U, // SaveX16 0U, // SbRxRyOffMemX16 0U, // SebRx16 0U, // SehRx16 0U, // SelBeqZ 0U, // SelBneZ 0U, // SelTBteqZCmp 0U, // SelTBteqZCmpi 0U, // SelTBteqZSlt 0U, // SelTBteqZSlti 0U, // SelTBteqZSltiu 0U, // SelTBteqZSltu 0U, // SelTBtneZCmp 0U, // SelTBtneZCmpi 0U, // SelTBtneZSlt 0U, // SelTBtneZSlti 0U, // SelTBtneZSltiu 0U, // SelTBtneZSltu 0U, // ShRxRyOffMemX16 1U, // SllX16 0U, // SllvRxRy16 0U, // SltCCRxRy16 0U, // SltRxRy16 0U, // SltiCCRxImmX16 0U, // SltiRxImm16 0U, // SltiRxImmX16 0U, // SltiuCCRxImmX16 0U, // SltiuRxImm16 0U, // SltiuRxImmX16 0U, // SltuCCRxRy16 0U, // SltuRxRy16 0U, // SltuRxRyRz16 1U, // SraX16 0U, // SravRxRy16 1U, // SrlX16 0U, // SrlvRxRy16 0U, // SubuRxRyRz16 0U, // SwRxRyOffMemX16 0U, // SwRxSpImmX16 0U, // TAILCALL 0U, // TAILCALL64_R 0U, // TAILCALL_R 1U, // TEQ 0U, // TEQI 0U, // TEQI_MM 1U, // TEQ_MM 1U, // TGE 0U, // TGEI 0U, // TGEIU 0U, // TGEIU_MM 0U, // TGEI_MM 1U, // TGEU 1U, // TGEU_MM 1U, // TGE_MM 0U, // TLBP 0U, // TLBP_MM 0U, // TLBR 0U, // TLBR_MM 0U, // TLBWI 0U, // TLBWI_MM 0U, // TLBWR 0U, // TLBWR_MM 1U, // TLT 0U, // TLTI 0U, // TLTIU_MM 0U, // TLTI_MM 1U, // TLTU 1U, // TLTU_MM 1U, // TLT_MM 1U, // TNE 0U, // TNEI 0U, // TNEI_MM 1U, // TNE_MM 0U, // TRAP 0U, // TRUNC_L_D64 0U, // TRUNC_L_S 0U, // TRUNC_W_D32 0U, // TRUNC_W_D64 0U, // TRUNC_W_MM 0U, // TRUNC_W_S 0U, // TRUNC_W_S_MM 0U, // TTLTIU 0U, // UDIV 0U, // UDIV_MM 0U, // V3MULU 0U, // VMM0 0U, // VMULU 2U, // VSHF_B 2U, // VSHF_D 2U, // VSHF_H 2U, // VSHF_W 0U, // WAIT 0U, // WAIT_MM 0U, // WRDSP 0U, // WSBH 0U, // WSBH_MM 0U, // XOR 0U, // XOR16_MM 0U, // XOR64 0U, // XORI_B 0U, // XOR_MM 0U, // XOR_V 0U, // XOR_V_D_PSEUDO 0U, // XOR_V_H_PSEUDO 0U, // XOR_V_W_PSEUDO 1U, // XORi 1U, // XORi64 1U, // XORi_MM 0U, // XorRxRxRy16 0U }; #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'j', 'a', 'l', 'r', 'c', 32, 9, 0, /* 8 */ 'd', 'm', 'f', 'c', '0', 9, 0, /* 15 */ 'd', 'm', 't', 'c', '0', 9, 0, /* 22 */ 'v', 'm', 'm', '0', 9, 0, /* 28 */ 'm', 't', 'm', '0', 9, 0, /* 34 */ 'm', 't', 'p', '0', 9, 0, /* 40 */ 'b', 'b', 'i', 't', '0', 9, 0, /* 47 */ 'l', 'd', 'c', '1', 9, 0, /* 53 */ 's', 'd', 'c', '1', 9, 0, /* 59 */ 'c', 'f', 'c', '1', 9, 0, /* 65 */ 'd', 'm', 'f', 'c', '1', 9, 0, /* 72 */ 'm', 'f', 'h', 'c', '1', 9, 0, /* 79 */ 'm', 't', 'h', 'c', '1', 9, 0, /* 86 */ 'c', 't', 'c', '1', 9, 0, /* 92 */ 'd', 'm', 't', 'c', '1', 9, 0, /* 99 */ 'l', 'w', 'c', '1', 9, 0, /* 105 */ 's', 'w', 'c', '1', 9, 0, /* 111 */ 'l', 'd', 'x', 'c', '1', 9, 0, /* 118 */ 's', 'd', 'x', 'c', '1', 9, 0, /* 125 */ 'l', 'u', 'x', 'c', '1', 9, 0, /* 132 */ 's', 'u', 'x', 'c', '1', 9, 0, /* 139 */ 'l', 'w', 'x', 'c', '1', 9, 0, /* 146 */ 's', 'w', 'x', 'c', '1', 9, 0, /* 153 */ 'm', 't', 'm', '1', 9, 0, /* 159 */ 'm', 't', 'p', '1', 9, 0, /* 165 */ 'b', 'b', 'i', 't', '1', 9, 0, /* 172 */ 'b', 'b', 'i', 't', '0', '3', '2', 9, 0, /* 181 */ 'b', 'b', 'i', 't', '1', '3', '2', 9, 0, /* 190 */ 'd', 's', 'r', 'a', '3', '2', 9, 0, /* 198 */ 'b', 'p', 'o', 's', 'g', 'e', '3', '2', 9, 0, /* 208 */ 'd', 's', 'l', 'l', '3', '2', 9, 0, /* 216 */ 'd', 's', 'r', 'l', '3', '2', 9, 0, /* 224 */ 'l', 'w', 'm', '3', '2', 9, 0, /* 231 */ 's', 'w', 'm', '3', '2', 9, 0, /* 238 */ 'd', 'r', 'o', 't', 'r', '3', '2', 9, 0, /* 247 */ 'l', 'd', 'c', '2', 9, 0, /* 253 */ 's', 'd', 'c', '2', 9, 0, /* 259 */ 'd', 'm', 'f', 'c', '2', 9, 0, /* 266 */ 'd', 'm', 't', 'c', '2', 9, 0, /* 273 */ 'l', 'w', 'c', '2', 9, 0, /* 279 */ 's', 'w', 'c', '2', 9, 0, /* 285 */ 'm', 't', 'm', '2', 9, 0, /* 291 */ 'm', 't', 'p', '2', 9, 0, /* 297 */ 'a', 'd', 'd', 'i', 'u', 'r', '2', 9, 0, /* 306 */ 'l', 'd', 'c', '3', 9, 0, /* 312 */ 's', 'd', 'c', '3', 9, 0, /* 318 */ 'l', 'w', 'c', '3', 9, 0, /* 324 */ 's', 'w', 'c', '3', 9, 0, /* 330 */ 'a', 'd', 'd', 'i', 'u', 's', '5', 9, 0, /* 339 */ 's', 'b', '1', '6', 9, 0, /* 345 */ 'a', 'n', 'd', '1', '6', 9, 0, /* 352 */ 's', 'h', '1', '6', 9, 0, /* 358 */ 'a', 'n', 'd', 'i', '1', '6', 9, 0, /* 366 */ 'l', 'i', '1', '6', 9, 0, /* 372 */ 'b', 'r', 'e', 'a', 'k', '1', '6', 9, 0, /* 381 */ 's', 'l', 'l', '1', '6', 9, 0, /* 388 */ 's', 'r', 'l', '1', '6', 9, 0, /* 395 */ 'l', 'w', 'm', '1', '6', 9, 0, /* 402 */ 's', 'w', 'm', '1', '6', 9, 0, /* 409 */ 's', 'd', 'b', 'b', 'p', '1', '6', 9, 0, /* 418 */ 'j', 'r', '1', '6', 9, 0, /* 424 */ 'x', 'o', 'r', '1', '6', 9, 0, /* 431 */ 'j', 'a', 'l', 'r', 's', '1', '6', 9, 0, /* 440 */ 'n', 'o', 't', '1', '6', 9, 0, /* 447 */ 'l', 'b', 'u', '1', '6', 9, 0, /* 454 */ 's', 'u', 'b', 'u', '1', '6', 9, 0, /* 462 */ 'a', 'd', 'd', 'u', '1', '6', 9, 0, /* 470 */ 'l', 'h', 'u', '1', '6', 9, 0, /* 477 */ 'l', 'w', '1', '6', 9, 0, /* 483 */ 's', 'w', '1', '6', 9, 0, /* 489 */ 'b', 'n', 'e', 'z', '1', '6', 9, 0, /* 497 */ 'b', 'e', 'q', 'z', '1', '6', 9, 0, /* 505 */ 'p', 'r', 'e', 'c', 'e', 'u', '.', 'p', 'h', '.', 'q', 'b', 'l', 'a', 9, 0, /* 521 */ 'p', 'r', 'e', 'c', 'e', 'q', 'u', '.', 'p', 'h', '.', 'q', 'b', 'l', 'a', 9, 0, /* 538 */ 'p', 'r', 'e', 'c', 'e', 'u', '.', 'p', 'h', '.', 'q', 'b', 'r', 'a', 9, 0, /* 554 */ 'p', 'r', 'e', 'c', 'e', 'q', 'u', '.', 'p', 'h', '.', 'q', 'b', 'r', 'a', 9, 0, /* 571 */ 'd', 's', 'r', 'a', 9, 0, /* 577 */ 'd', 'l', 's', 'a', 9, 0, /* 583 */ 'c', 'f', 'c', 'm', 's', 'a', 9, 0, /* 591 */ 'c', 't', 'c', 'm', 's', 'a', 9, 0, /* 599 */ 'a', 'd', 'd', '_', 'a', '.', 'b', 9, 0, /* 608 */ 'm', 'i', 'n', '_', 'a', '.', 'b', 9, 0, /* 617 */ 'a', 'd', 'd', 's', '_', 'a', '.', 'b', 9, 0, /* 627 */ 'm', 'a', 'x', '_', 'a', '.', 'b', 9, 0, /* 636 */ 's', 'r', 'a', '.', 'b', 9, 0, /* 643 */ 'n', 'l', 'o', 'c', '.', 'b', 9, 0, /* 651 */ 'n', 'l', 'z', 'c', '.', 'b', 9, 0, /* 659 */ 's', 'l', 'd', '.', 'b', 9, 0, /* 666 */ 'p', 'c', 'k', 'o', 'd', '.', 'b', 9, 0, /* 675 */ 'i', 'l', 'v', 'o', 'd', '.', 'b', 9, 0, /* 684 */ 'i', 'n', 's', 'v', 'e', '.', 'b', 9, 0, /* 693 */ 'v', 's', 'h', 'f', '.', 'b', 9, 0, /* 701 */ 'b', 'n', 'e', 'g', '.', 'b', 9, 0, /* 709 */ 's', 'r', 'a', 'i', '.', 'b', 9, 0, /* 717 */ 's', 'l', 'd', 'i', '.', 'b', 9, 0, /* 725 */ 'a', 'n', 'd', 'i', '.', 'b', 9, 0, /* 733 */ 'b', 'n', 'e', 'g', 'i', '.', 'b', 9, 0, /* 742 */ 'b', 's', 'e', 'l', 'i', '.', 'b', 9, 0, /* 751 */ 's', 'l', 'l', 'i', '.', 'b', 9, 0, /* 759 */ 's', 'r', 'l', 'i', '.', 'b', 9, 0, /* 767 */ 'b', 'i', 'n', 's', 'l', 'i', '.', 'b', 9, 0, /* 777 */ 'c', 'e', 'q', 'i', '.', 'b', 9, 0, /* 785 */ 's', 'r', 'a', 'r', 'i', '.', 'b', 9, 0, /* 794 */ 'b', 'c', 'l', 'r', 'i', '.', 'b', 9, 0, /* 803 */ 's', 'r', 'l', 'r', 'i', '.', 'b', 9, 0, /* 812 */ 'n', 'o', 'r', 'i', '.', 'b', 9, 0, /* 820 */ 'x', 'o', 'r', 'i', '.', 'b', 9, 0, /* 828 */ 'b', 'i', 'n', 's', 'r', 'i', '.', 'b', 9, 0, /* 838 */ 's', 'p', 'l', 'a', 't', 'i', '.', 'b', 9, 0, /* 848 */ 'b', 's', 'e', 't', 'i', '.', 'b', 9, 0, /* 857 */ 's', 'u', 'b', 'v', 'i', '.', 'b', 9, 0, /* 866 */ 'a', 'd', 'd', 'v', 'i', '.', 'b', 9, 0, /* 875 */ 'b', 'm', 'z', 'i', '.', 'b', 9, 0, /* 883 */ 'b', 'm', 'n', 'z', 'i', '.', 'b', 9, 0, /* 892 */ 'f', 'i', 'l', 'l', '.', 'b', 9, 0, /* 900 */ 's', 'l', 'l', '.', 'b', 9, 0, /* 907 */ 's', 'r', 'l', '.', 'b', 9, 0, /* 914 */ 'b', 'i', 'n', 's', 'l', '.', 'b', 9, 0, /* 923 */ 'i', 'l', 'v', 'l', '.', 'b', 9, 0, /* 931 */ 'c', 'e', 'q', '.', 'b', 9, 0, /* 938 */ 's', 'r', 'a', 'r', '.', 'b', 9, 0, /* 946 */ 'b', 'c', 'l', 'r', '.', 'b', 9, 0, /* 954 */ 's', 'r', 'l', 'r', '.', 'b', 9, 0, /* 962 */ 'b', 'i', 'n', 's', 'r', '.', 'b', 9, 0, /* 971 */ 'i', 'l', 'v', 'r', '.', 'b', 9, 0, /* 979 */ 'a', 's', 'u', 'b', '_', 's', '.', 'b', 9, 0, /* 989 */ 'm', 'o', 'd', '_', 's', '.', 'b', 9, 0, /* 998 */ 'c', 'l', 'e', '_', 's', '.', 'b', 9, 0, /* 1007 */ 'a', 'v', 'e', '_', 's', '.', 'b', 9, 0, /* 1016 */ 'c', 'l', 'e', 'i', '_', 's', '.', 'b', 9, 0, /* 1026 */ 'm', 'i', 'n', 'i', '_', 's', '.', 'b', 9, 0, /* 1036 */ 'c', 'l', 't', 'i', '_', 's', '.', 'b', 9, 0, /* 1046 */ 'm', 'a', 'x', 'i', '_', 's', '.', 'b', 9, 0, /* 1056 */ 'm', 'i', 'n', '_', 's', '.', 'b', 9, 0, /* 1065 */ 'a', 'v', 'e', 'r', '_', 's', '.', 'b', 9, 0, /* 1075 */ 's', 'u', 'b', 's', '_', 's', '.', 'b', 9, 0, /* 1085 */ 'a', 'd', 'd', 's', '_', 's', '.', 'b', 9, 0, /* 1095 */ 's', 'a', 't', '_', 's', '.', 'b', 9, 0, /* 1104 */ 'c', 'l', 't', '_', 's', '.', 'b', 9, 0, /* 1113 */ 's', 'u', 'b', 's', 'u', 'u', '_', 's', '.', 'b', 9, 0, /* 1125 */ 'd', 'i', 'v', '_', 's', '.', 'b', 9, 0, /* 1134 */ 'm', 'a', 'x', '_', 's', '.', 'b', 9, 0, /* 1143 */ 'c', 'o', 'p', 'y', '_', 's', '.', 'b', 9, 0, /* 1153 */ 's', 'p', 'l', 'a', 't', '.', 'b', 9, 0, /* 1162 */ 'b', 's', 'e', 't', '.', 'b', 9, 0, /* 1170 */ 'p', 'c', 'n', 't', '.', 'b', 9, 0, /* 1178 */ 'i', 'n', 's', 'e', 'r', 't', '.', 'b', 9, 0, /* 1188 */ 's', 't', '.', 'b', 9, 0, /* 1194 */ 'a', 's', 'u', 'b', '_', 'u', '.', 'b', 9, 0, /* 1204 */ 'm', 'o', 'd', '_', 'u', '.', 'b', 9, 0, /* 1213 */ 'c', 'l', 'e', '_', 'u', '.', 'b', 9, 0, /* 1222 */ 'a', 'v', 'e', '_', 'u', '.', 'b', 9, 0, /* 1231 */ 'c', 'l', 'e', 'i', '_', 'u', '.', 'b', 9, 0, /* 1241 */ 'm', 'i', 'n', 'i', '_', 'u', '.', 'b', 9, 0, /* 1251 */ 'c', 'l', 't', 'i', '_', 'u', '.', 'b', 9, 0, /* 1261 */ 'm', 'a', 'x', 'i', '_', 'u', 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'a', 'f', '.', 'w', 9, 0, /* 7647 */ 'f', 's', 'a', 'f', '.', 'w', 9, 0, /* 7655 */ 'v', 's', 'h', 'f', '.', 'w', 9, 0, /* 7663 */ 'b', 'n', 'e', 'g', '.', 'w', 9, 0, /* 7671 */ 'p', 'r', 'e', 'c', 'r', '_', 's', 'r', 'a', '.', 'p', 'h', '.', 'w', 9, 0, /* 7687 */ 'p', 'r', 'e', 'c', 'r', 'q', '.', 'p', 'h', '.', 'w', 9, 0, /* 7700 */ 'p', 'r', 'e', 'c', 'r', '_', 's', 'r', 'a', '_', 'r', '.', 'p', 'h', '.', 'w', 9, 0, /* 7718 */ 'p', 'r', 'e', 'c', 'r', 'q', '_', 'r', 's', '.', 'p', 'h', '.', 'w', 9, 0, /* 7734 */ 's', 'u', 'b', 'q', 'h', '.', 'w', 9, 0, /* 7743 */ 'a', 'd', 'd', 'q', 'h', '.', 'w', 9, 0, /* 7752 */ 's', 'r', 'a', 'i', '.', 'w', 9, 0, /* 7760 */ 's', 'l', 'd', 'i', '.', 'w', 9, 0, /* 7768 */ 'b', 'n', 'e', 'g', 'i', '.', 'w', 9, 0, /* 7777 */ 's', 'l', 'l', 'i', '.', 'w', 9, 0, /* 7785 */ 's', 'r', 'l', 'i', '.', 'w', 9, 0, /* 7793 */ 'b', 'i', 'n', 's', 'l', 'i', '.', 'w', 9, 0, /* 7803 */ 'c', 'e', 'q', 'i', '.', 'w', 9, 0, /* 7811 */ 's', 'r', 'a', 'r', 'i', '.', 'w', 9, 0, /* 7820 */ 'b', 'c', 'l', 'r', 'i', '.', 'w', 9, 0, /* 7829 */ 's', 'r', 'l', 'r', 'i', '.', 'w', 9, 0, /* 7838 */ 'b', 'i', 'n', 's', 'r', 'i', '.', 'w', 9, 0, /* 7848 */ 's', 'p', 'l', 'a', 't', 'i', '.', 'w', 9, 0, /* 7858 */ 'b', 's', 'e', 't', 'i', '.', 'w', 9, 0, /* 7867 */ 's', 'u', 'b', 'v', 'i', '.', 'w', 9, 0, /* 7876 */ 'a', 'd', 'd', 'v', 'i', '.', 'w', 9, 0, /* 7885 */ 'd', 'p', 'a', 'q', '_', 's', 'a', '.', 'l', '.', 'w', 9, 0, /* 7898 */ 'd', 'p', 's', 'q', '_', 's', 'a', '.', 'l', '.', 'w', 9, 0, /* 7911 */ 'f', 'i', 'l', 'l', '.', 'w', 9, 0, /* 7919 */ 's', 'l', 'l', '.', 'w', 9, 0, /* 7926 */ 'f', 'e', 'x', 'u', 'p', 'l', '.', 'w', 9, 0, /* 7936 */ 'f', 'f', 'q', 'l', '.', 'w', 9, 0, /* 7944 */ 's', 'r', 'l', '.', 'w', 9, 0, /* 7951 */ 'b', 'i', 'n', 's', 'l', '.', 'w', 9, 0, /* 7960 */ 'f', 'm', 'u', 'l', '.', 'w', 9, 0, /* 7968 */ 'i', 'l', 'v', 'l', '.', 'w', 9, 0, /* 7976 */ 'f', 'm', 'i', 'n', '.', 'w', 9, 0, /* 7984 */ 'f', 'c', 'u', 'n', '.', 'w', 9, 0, /* 7992 */ 'f', 's', 'u', 'n', '.', 'w', 9, 0, /* 8000 */ 'f', 'e', 'x', 'd', 'o', '.', 'w', 9, 0, /* 8009 */ 'f', 'r', 'c', 'p', '.', 'w', 9, 0, /* 8017 */ 'm', 's', 'u', 'b', '_', 'q', '.', 'w', 9, 0, /* 8027 */ 'm', 'a', 'd', 'd', '_', 'q', '.', 'w', 9, 0, /* 8037 */ 'm', 'u', 'l', '_', 'q', '.', 'w', 9, 0, /* 8046 */ 'm', 's', 'u', 'b', 'r', '_', 'q', '.', 'w', 9, 0, /* 8057 */ 'm', 'a', 'd', 'd', 'r', '_', 'q', '.', 'w', 9, 0, /* 8068 */ 'm', 'u', 'l', 'r', '_', 'q', '.', 'w', 9, 0, /* 8078 */ 'f', 'c', 'e', 'q', '.', 'w', 9, 0, /* 8086 */ 'f', 's', 'e', 'q', '.', 'w', 9, 0, /* 8094 */ 'f', 'c', 'u', 'e', 'q', '.', 'w', 9, 0, /* 8103 */ 'f', 's', 'u', 'e', 'q', '.', 'w', 9, 0, /* 8112 */ 'f', 't', 'q', '.', 'w', 9, 0, /* 8119 */ 's', 'h', 'r', 'a', '_', 'r', '.', 'w', 9, 0, /* 8129 */ 's', 'u', 'b', 'q', 'h', '_', 'r', '.', 'w', 9, 0, /* 8140 */ 'a', 'd', 'd', 'q', 'h', '_', 'r', '.', 'w', 9, 0, /* 8151 */ 'e', 'x', 't', 'r', '_', 'r', '.', 'w', 9, 0, /* 8161 */ 's', 'h', 'r', 'a', 'v', '_', 'r', '.', 'w', 9, 0, /* 8172 */ 'e', 'x', 't', 'r', 'v', '_', 'r', '.', 'w', 9, 0, /* 8183 */ 's', 'r', 'a', 'r', '.', 'w', 9, 0, /* 8191 */ 'b', 'c', 'l', 'r', '.', 'w', 9, 0, /* 8199 */ 's', 'r', 'l', 'r', '.', 'w', 9, 0, /* 8207 */ 'f', 'c', 'o', 'r', '.', 'w', 9, 0, /* 8215 */ 'f', 's', 'o', 'r', '.', 'w', 9, 0, /* 8223 */ 'f', 'e', 'x', 'u', 'p', 'r', '.', 'w', 9, 0, /* 8233 */ 'f', 'f', 'q', 'r', '.', 'w', 9, 0, /* 8241 */ 'b', 'i', 'n', 's', 'r', '.', 'w', 9, 0, /* 8250 */ 'e', 'x', 't', 'r', '.', 'w', 9, 0, /* 8258 */ 'i', 'l', 'v', 'r', '.', 'w', 9, 0, /* 8266 */ 'c', 'v', 't', '.', 's', '.', 'w', 9, 0, /* 8275 */ 'a', 's', 'u', 'b', '_', 's', '.', 'w', 9, 0, /* 8285 */ 'h', 's', 'u', 'b', '_', 's', '.', 'w', 9, 0, /* 8295 */ 'd', 'p', 's', 'u', 'b', '_', 's', '.', 'w', 9, 0, /* 8306 */ 'f', 't', 'r', 'u', 'n', 'c', '_', 's', '.', 'w', 9, 0, /* 8318 */ 'h', 'a', 'd', 'd', '_', 's', '.', 'w', 9, 0, /* 8328 */ 'd', 'p', 'a', 'd', 'd', '_', 's', '.', 'w', 9, 0, /* 8339 */ 'm', 'o', 'd', '_', 's', '.', 'w', 9, 0, /* 8348 */ 'c', 'l', 'e', '_', 's', '.', 'w', 9, 0, /* 8357 */ 'a', 'v', 'e', '_', 's', '.', 'w', 9, 0, /* 8366 */ 'c', 'l', 'e', 'i', '_', 's', '.', 'w', 9, 0, /* 8376 */ 'm', 'i', 'n', 'i', '_', 's', '.', 'w', 9, 0, /* 8386 */ 'c', 'l', 't', 'i', '_', 's', '.', 'w', 9, 0, /* 8396 */ 'm', 'a', 'x', 'i', '_', 's', '.', 'w', 9, 0, /* 8406 */ 's', 'h', 'l', 'l', '_', 's', '.', 'w', 9, 0, /* 8416 */ 'm', 'i', 'n', '_', 's', '.', 'w', 9, 0, /* 8425 */ 'd', 'o', 't', 'p', '_', 's', '.', 'w', 9, 0, /* 8435 */ 's', 'u', 'b', 'q', '_', 's', '.', 'w', 9, 0, /* 8445 */ 'a', 'd', 'd', 'q', '_', 's', '.', 'w', 9, 0, /* 8455 */ 'm', 'u', 'l', 'q', '_', 's', '.', 'w', 9, 0, /* 8465 */ 'a', 'b', 's', 'q', '_', 's', '.', 'w', 9, 0, /* 8475 */ 'a', 'v', 'e', 'r', '_', 's', '.', 'w', 9, 0, /* 8485 */ 's', 'u', 'b', 's', '_', 's', '.', 'w', 9, 0, /* 8495 */ 'a', 'd', 'd', 's', '_', 's', '.', 'w', 9, 0, /* 8505 */ 's', 'a', 't', '_', 's', '.', 'w', 9, 0, /* 8514 */ 'c', 'l', 't', '_', 's', '.', 'w', 9, 0, /* 8523 */ 'f', 'f', 'i', 'n', 't', '_', 's', '.', 'w', 9, 0, /* 8534 */ 'f', 't', 'i', 'n', 't', '_', 's', '.', 'w', 9, 0, /* 8545 */ 's', 'u', 'b', 's', 'u', 'u', '_', 's', '.', 'w', 9, 0, /* 8557 */ 'd', 'i', 'v', '_', 's', '.', 'w', 9, 0, /* 8566 */ 's', 'h', 'l', 'l', 'v', '_', 's', '.', 'w', 9, 0, /* 8577 */ 'm', 'a', 'x', '_', 's', '.', 'w', 9, 0, /* 8586 */ 'c', 'o', 'p', 'y', '_', 's', '.', 'w', 9, 0, /* 8596 */ 'm', 'u', 'l', 'q', '_', 'r', 's', '.', 'w', 9, 0, /* 8607 */ 'e', 'x', 't', 'r', '_', 'r', 's', '.', 'w', 9, 0, /* 8618 */ 'e', 'x', 't', 'r', 'v', '_', 'r', 's', '.', 'w', 9, 0, /* 8630 */ 'f', 'c', 'l', 'a', 's', 's', '.', 'w', 9, 0, /* 8640 */ 's', 'p', 'l', 'a', 't', '.', 'w', 9, 0, /* 8649 */ 'b', 's', 'e', 't', '.', 'w', 9, 0, /* 8657 */ 'f', 'c', 'l', 't', '.', 'w', 9, 0, /* 8665 */ 'f', 's', 'l', 't', '.', 'w', 9, 0, /* 8673 */ 'f', 'c', 'u', 'l', 't', '.', 'w', 9, 0, /* 8682 */ 'f', 's', 'u', 'l', 't', '.', 'w', 9, 0, /* 8691 */ 'p', 'c', 'n', 't', '.', 'w', 9, 0, /* 8699 */ 'f', 'r', 'i', 'n', 't', '.', 'w', 9, 0, /* 8708 */ 'i', 'n', 's', 'e', 'r', 't', '.', 'w', 9, 0, /* 8718 */ 'f', 's', 'q', 'r', 't', '.', 'w', 9, 0, /* 8727 */ 'f', 'r', 's', 'q', 'r', 't', '.', 'w', 9, 0, /* 8737 */ 's', 't', '.', 'w', 9, 0, /* 8743 */ 'a', 's', 'u', 'b', '_', 'u', '.', 'w', 9, 0, /* 8753 */ 'h', 's', 'u', 'b', '_', 'u', '.', 'w', 9, 0, /* 8763 */ 'd', 'p', 's', 'u', 'b', '_', 'u', '.', 'w', 9, 0, /* 8774 */ 'f', 't', 'r', 'u', 'n', 'c', '_', 'u', '.', 'w', 9, 0, /* 8786 */ 'h', 'a', 'd', 'd', '_', 'u', '.', 'w', 9, 0, /* 8796 */ 'd', 'p', 'a', 'd', 'd', '_', 'u', '.', 'w', 9, 0, /* 8807 */ 'm', 'o', 'd', '_', 'u', '.', 'w', 9, 0, /* 8816 */ 'c', 'l', 'e', '_', 'u', '.', 'w', 9, 0, /* 8825 */ 'a', 'v', 'e', '_', 'u', '.', 'w', 9, 0, /* 8834 */ 'c', 'l', 'e', 'i', '_', 'u', '.', 'w', 9, 0, /* 8844 */ 'm', 'i', 'n', 'i', '_', 'u', '.', 'w', 9, 0, /* 8854 */ 'c', 'l', 't', 'i', '_', 'u', '.', 'w', 9, 0, /* 8864 */ 'm', 'a', 'x', 'i', '_', 'u', '.', 'w', 9, 0, /* 8874 */ 'm', 'i', 'n', '_', 'u', '.', 'w', 9, 0, /* 8883 */ 'd', 'o', 't', 'p', '_', 'u', '.', 'w', 9, 0, /* 8893 */ 'a', 'v', 'e', 'r', '_', 'u', '.', 'w', 9, 0, /* 8903 */ 's', 'u', 'b', 's', '_', 'u', '.', 'w', 9, 0, /* 8913 */ 'a', 'd', 'd', 's', '_', 'u', '.', 'w', 9, 0, /* 8923 */ 's', 'u', 'b', 's', 'u', 's', '_', 'u', '.', 'w', 9, 0, /* 8935 */ 's', 'a', 't', '_', 'u', '.', 'w', 9, 0, /* 8944 */ 'c', 'l', 't', '_', 'u', '.', 'w', 9, 0, /* 8953 */ 'f', 'f', 'i', 'n', 't', '_', 'u', '.', 'w', 9, 0, /* 8964 */ 'f', 't', 'i', 'n', 't', '_', 'u', '.', 'w', 9, 0, /* 8975 */ 'd', 'i', 'v', '_', 'u', '.', 'w', 9, 0, /* 8984 */ 'm', 'a', 'x', '_', 'u', '.', 'w', 9, 0, /* 8993 */ 'c', 'o', 'p', 'y', '_', 'u', '.', 'w', 9, 0, /* 9003 */ 'm', 's', 'u', 'b', 'v', '.', 'w', 9, 0, /* 9012 */ 'm', 'a', 'd', 'd', 'v', '.', 'w', 9, 0, /* 9021 */ 'p', 'c', 'k', 'e', 'v', '.', 'w', 9, 0, /* 9030 */ 'i', 'l', 'v', 'e', 'v', '.', 'w', 9, 0, /* 9039 */ 'f', 'd', 'i', 'v', '.', 'w', 9, 0, /* 9047 */ 'm', 'u', 'l', 'v', '.', 'w', 9, 0, /* 9055 */ 'e', 'x', 't', 'r', 'v', '.', 'w', 9, 0, /* 9064 */ 'f', 'm', 'a', 'x', '.', 'w', 9, 0, /* 9072 */ 'b', 'z', '.', 'w', 9, 0, /* 9078 */ 'b', 'n', 'z', '.', 'w', 9, 0, /* 9085 */ 'l', 'w', 9, 0, /* 9089 */ 's', 'w', 9, 0, /* 9093 */ 'l', 'h', 'x', 9, 0, /* 9098 */ 'j', 'a', 'l', 'x', 9, 0, /* 9104 */ 'l', 'b', 'u', 'x', 9, 0, /* 9110 */ 'l', 'w', 'x', 9, 0, /* 9115 */ 'b', 'g', 'e', 'z', 9, 0, /* 9121 */ 'b', 'l', 'e', 'z', 9, 0, /* 9127 */ 'b', 'n', 'e', 'z', 9, 0, /* 9133 */ 's', 'e', 'l', 'n', 'e', 'z', 9, 0, /* 9141 */ 'b', 't', 'n', 'e', 'z', 9, 0, /* 9148 */ 'd', 'c', 'l', 'z', 9, 0, /* 9154 */ 'b', 'e', 'q', 'z', 9, 0, /* 9160 */ 's', 'e', 'l', 'e', 'q', 'z', 9, 0, /* 9168 */ 'b', 't', 'e', 'q', 'z', 9, 0, /* 9175 */ 'b', 'g', 't', 'z', 9, 0, /* 9181 */ 'b', 'l', 't', 'z', 9, 0, /* 9187 */ 'm', 'o', 'v', 'z', 9, 0, /* 9193 */ 's', 'e', 'b', 9, 32, 0, /* 9199 */ 'j', 'r', 'c', 9, 32, 0, /* 9205 */ 's', 'e', 'h', 9, 32, 0, /* 9211 */ 'd', 'd', 'i', 'v', 'u', 9, '$', 'z', 'e', 'r', 'o', ',', 32, 0, /* 9225 */ 'd', 'd', 'i', 'v', 9, '$', 'z', 'e', 'r', 'o', ',', 32, 0, /* 9238 */ 'a', 'd', 'd', 'i', 'u', 9, '$', 's', 'p', ',', 32, 0, /* 9250 */ 'c', 'i', 'n', 's', '3', '2', 32, 0, /* 9258 */ 'e', 'x', 't', 's', '3', '2', 32, 0, /* 9266 */ 's', 'y', 'n', 'c', 32, 0, /* 9272 */ 9, '.', 'w', 'o', 'r', 'd', 32, 0, /* 9280 */ 'd', 'i', 'n', 's', 'm', 32, 0, /* 9287 */ 'd', 'e', 'x', 't', 'm', 32, 0, /* 9294 */ 'c', 'i', 'n', 's', 32, 0, /* 9300 */ 'd', 'i', 'n', 's', 32, 0, /* 9306 */ 'e', 'x', 't', 's', 32, 0, /* 9312 */ 'd', 'e', 'x', 't', 32, 0, /* 9318 */ 'd', 'i', 'n', 's', 'u', 32, 0, /* 9325 */ 'd', 'e', 'x', 't', 'u', 32, 0, /* 9332 */ 'b', 'c', '1', 'n', 'e', 'z', 32, 0, /* 9340 */ 'b', 'c', '2', 'n', 'e', 'z', 32, 0, /* 9348 */ 'b', 'c', '1', 'e', 'q', 'z', 32, 0, /* 9356 */ 'b', 'c', '2', 'e', 'q', 'z', 32, 0, /* 9364 */ 'c', '.', 0, /* 9367 */ 'b', 'r', 'e', 'a', 'k', 32, '0', 0, /* 9375 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 9388 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 9395 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 9405 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 9420 */ 'j', 'r', 'c', 9, 32, '$', 'r', 'a', 0, /* 9429 */ 'j', 'r', 9, 32, '$', 'r', 'a', 0, /* 9437 */ 'e', 'h', 'b', 0, /* 9441 */ 'p', 'a', 'u', 's', 'e', 0, /* 9447 */ 't', 'l', 'b', 'w', 'i', 0, /* 9453 */ 'f', 'o', 'o', 0, /* 9457 */ 't', 'l', 'b', 'p', 0, /* 9462 */ 's', 's', 'n', 'o', 'p', 0, /* 9468 */ 't', 'l', 'b', 'r', 0, /* 9473 */ 't', 'l', 'b', 'w', 'r', 0, /* 9479 */ 'd', 'e', 'r', 'e', 't', 0, /* 9485 */ 'w', 'a', 'i', 't', 0, }; #endif // Emit the opcode for the instruction. uint64_t Bits1 = OpInfo[MCInst_getOpcode(MI)]; uint64_t Bits2 = OpInfo2[MCInst_getOpcode(MI)]; uint64_t Bits = (Bits2 << 32) | Bits1; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 16383)-1); #endif // Fragment 0 encoded into 4 bits for 11 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 14) & 15); switch ((Bits >> 14) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, Break16, CONSTPOOL_EN... return; break; case 1: // ABSQ_S_PH, ABSQ_S_QB, ABSQ_S_W, ADD, ADDIUPC, ADDIUPC_MM, ADDIUR1SP_MM... printOperand(MI, 0, O); break; case 2: // ADDIUS5_MM, CTC1, CTC1_MM, DAHI, DATI, DMTC1, MTC1, MTC1_MM, MTHI_DSP,... printOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 3: // AND16_MM, MTHC1_D32, MTHC1_D64, MTHC1_MM, OR16_MM, XOR16_MM printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 4: // BREAK16_MM, SDBBP16_MM printUnsignedImm8(MI, 0, O); return; break; case 5: // CACHE, CACHE_MM, CACHE_R6, PREF, PREF_MM, PREF_R6 printUnsignedImm(MI, 2, O); SStream_concat0(O, ", "); printMemOperand(MI, 0, O); return; break; case 6: // FCMP_D32, FCMP_D32_MM, FCMP_D64, FCMP_S32, FCMP_S32_MM printFCCOperand(MI, 2, O); break; case 7: // LWM16_MM, LWM32_MM, LWM_MM, MOVEP_MM, SWM16_MM, SWM32_MM, SWM_MM printRegisterList(MI, 0, O); SStream_concat0(O, ", "); break; case 8: // LWP_MM, SWP_MM printRegisterPair(MI, 0, O); SStream_concat0(O, ", "); printMemOperand(MI, 2, O); return; break; case 9: // SYNCI printMemOperand(MI, 0, O); return; break; case 10: // SelBeqZ, SelBneZ, SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZ... printOperand(MI, 3, O); break; } // Fragment 1 encoded into 5 bits for 17 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 31); switch ((Bits >> 18) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ABSQ_S_PH, ABSQ_S_QB, ABSQ_S_W, ADD, ADDIUPC, ADDIUPC_MM, ADDIUR1SP_MM... SStream_concat0(O, ", "); break; case 1: // ADDIUS5_MM, DAHI, DATI, MOVEP_MM, MultRxRyRz16, MultuRxRyRz16, SltCCRx... printOperand(MI, 2, O); break; case 2: // ADDIUSP_MM, AddiuSpImmX16, B16_MM, BAL, BALC, BC, BPOSGE32, B_MM_Pseud... return; break; case 3: // AND16_MM, OR16_MM, XOR16_MM printOperand(MI, 1, O); return; break; case 4: // AddiuRxPcImmX16 SStream_concat0(O, ", $pc, "); printOperand(MI, 1, O); return; break; case 5: // AddiuSpImm16, Bimm16 SStream_concat0(O, " # 16 bit inst"); return; break; case 6: // Bteqz16, Btnez16 SStream_concat0(O, " # 16 bit inst"); return; break; case 7: // CTC1, CTC1_MM, DMTC1, MTC1, MTC1_MM, MTHC1_D32, MTHC1_D64, MTHC1_MM, M... printOperand(MI, 0, O); return; break; case 8: // FCMP_D32, FCMP_D32_MM, FCMP_D64 SStream_concat0(O, ".d\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 9: // FCMP_S32, FCMP_S32_MM SStream_concat0(O, ".s\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 10: // INSERT_B, INSERT_D, INSERT_H, INSERT_W, INSVE_B, INSVE_D, INSVE_H, INS... SStream_concat0(O, "["); break; case 11: // Jal16 SStream_concat0(O, "\n\tnop"); return; break; case 12: // JalB16 SStream_concat0(O, "\t# branch\n\tnop"); return; break; case 13: // LWM16_MM, LWM32_MM, LWM_MM, SWM16_MM, SWM32_MM, SWM_MM printMemOperand(MI, 1, O); return; break; case 14: // LwConstant32 SStream_concat0(O, ", 1f\n\tb\t2f\n\t.align\t2\n1: \t.word\t"); printOperand(MI, 1, O); SStream_concat0(O, "\n2:"); return; break; case 15: // SC, SCD, SCD_R6, SC_MM, SC_R6 printMemOperand(MI, 2, O); return; break; case 16: // SelBeqZ, SelBneZ SStream_concat0(O, ", .+4\n\t\n\tmove "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; } // Fragment 2 encoded into 4 bits for 12 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 23) & 15); switch ((Bits >> 23) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ABSQ_S_PH, ABSQ_S_QB, ABSQ_S_W, ADD, ADDIUPC, ADDIUPC_MM, ADDIUR1SP_MM... printOperand(MI, 1, O); break; case 1: // ADDIUS5_MM, DAHI, DATI return; break; case 2: // AddiuRxRxImm16, AddiuRxRxImmX16, AndRxRxRy16, BINSLI_B, BINSLI_D, BINS... printOperand(MI, 2, O); break; case 3: // AddiuRxRyOffMemX16, LEA_ADDiu, LEA_ADDiu64, LEA_ADDiu_MM printMemOperandEA(MI, 1, O); return; break; case 4: // BBIT0, BBIT032, BBIT1, BBIT132, LUi, LUi64, LUi_MM, LoadAddr32Imm, Loa... printUnsignedImm(MI, 1, O); break; case 5: // INSERT_B, INSERT_D, INSERT_H, INSERT_W printUnsignedImm(MI, 3, O); SStream_concat0(O, "], "); printOperand(MI, 2, O); return; break; case 6: // INSVE_B, INSVE_D, INSVE_H, INSVE_W printUnsignedImm(MI, 2, O); SStream_concat0(O, "], "); printOperand(MI, 3, O); SStream_concat0(O, "["); printUnsignedImm(MI, 4, O); SStream_concat0(O, "]"); return; break; case 7: // LB, LB64, LBU16_MM, LB_MM, LBu, LBu64, LBu_MM, LD, LDC1, LDC164, LDC1_... printMemOperand(MI, 1, O); return; break; case 8: // MOVEP_MM SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 9: // MultRxRyRz16, MultuRxRyRz16 SStream_concat0(O, "\n\tmflo\t"); printOperand(MI, 0, O); return; break; case 10: // SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZSlti, SelTBteqZSlt... printOperand(MI, 4, O); break; case 11: // SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16, SltuRxRyRz... SStream_concat0(O, "\n\tmove\t"); printOperand(MI, 0, O); SStream_concat0(O, ", $t8"); return; break; } // Fragment 3 encoded into 4 bits for 15 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 27) & 15); switch ((Bits >> 27) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ABSQ_S_PH, ABSQ_S_QB, ABSQ_S_W, ADDIUPC, ADDIUPC_MM, ADDIUR1SP_MM, ALU... return; break; case 1: // ADD, ADDIUR2_MM, ADDQH_PH, ADDQH_R_PH, ADDQH_R_W, ADDQH_W, ADDQ_PH, AD... SStream_concat0(O, ", "); break; case 2: // AddiuRxRxImm16, LwRxPcTcp16 SStream_concat0(O, "\t# 16 bit inst"); return; break; case 3: // BeqzRxImm16, BnezRxImm16 SStream_concat0(O, " # 16 bit inst"); return; break; case 4: // BteqzT8CmpX16, BteqzT8CmpiX16, BteqzT8SltX16, BteqzT8SltiX16, BteqzT8S... SStream_concat0(O, "\n\tbteqz\t"); printOperand(MI, 2, O); return; break; case 5: // BtnezT8CmpX16, BtnezT8CmpiX16, BtnezT8SltX16, BtnezT8SltiX16, BtnezT8S... SStream_concat0(O, "\n\tbtnez\t"); printOperand(MI, 2, O); return; break; case 6: // COPY_S_B, COPY_S_D, COPY_S_H, COPY_S_W, COPY_U_B, COPY_U_D, COPY_U_H, ... SStream_concat0(O, "["); break; case 7: // CmpiRxImm16, LiRxImm16, SltiRxImm16, SltiuRxImm16 SStream_concat0(O, " \t# 16 bit inst"); return; break; case 8: // DSLL64_32 SStream_concat0(O, ", 32"); return; break; case 9: // GotPrologue16 SStream_concat0(O, "\n\taddiu\t"); printOperand(MI, 1, O); SStream_concat0(O, ", $pc, "); printOperand(MI, 3, O); SStream_concat0(O, "\n "); return; break; case 10: // LBUX, LDXC1, LDXC164, LHX, LUXC1, LUXC164, LUXC1_MM, LWX, LWXC1, LWXC1... SStream_concat0(O, "("); printOperand(MI, 1, O); SStream_concat0(O, ")"); return; break; case 11: // LwRxSpImmX16, SwRxSpImmX16 SStream_concat0(O, " ( "); printOperand(MI, 1, O); SStream_concat0(O, " ); "); return; break; case 12: // SLL64_32, SLL64_64 SStream_concat0(O, ", 0"); return; break; case 13: // SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZSlti, SelTBteqZSlt... SStream_concat0(O, "\n\tbteqz\t.+4\n\tmove "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 14: // SelTBtneZCmp, SelTBtneZCmpi, SelTBtneZSlt, SelTBtneZSlti, SelTBtneZSlt... SStream_concat0(O, "\n\tbtnez\t.+4\n\tmove "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; } // Fragment 4 encoded into 3 bits for 5 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 31) & 7); switch ((Bits >> 31) & 7) { default: // llvm_unreachable("Invalid command number."); case 0: // ADD, ADDIUR2_MM, ADDQH_PH, ADDQH_R_PH, ADDQH_R_W, ADDQH_W, ADDQ_PH, AD... printOperand(MI, 2, O); break; case 1: // ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, ANDI_B, BCLRI_B, BCLRI_D, BCLRI_H,... printUnsignedImm8(MI, 2, O); break; case 2: // ANDi, ANDi64, ANDi_MM, APPEND, BALIGN, CINS, CINS32, DEXT, DEXTM, DEXT... printUnsignedImm(MI, 2, O); break; case 3: // BINSLI_B, BINSLI_D, BINSLI_H, BINSLI_W, BINSRI_B, BINSRI_D, BINSRI_H, ... printUnsignedImm8(MI, 3, O); break; case 4: // BINSL_B, BINSL_D, BINSL_H, BINSL_W, BINSR_B, BINSR_D, BINSR_H, BINSR_W... printOperand(MI, 3, O); break; } // Fragment 5 encoded into 2 bits for 3 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 34) & 3); switch ((Bits >> 34) & 3) { default: // llvm_unreachable("Invalid command number."); case 0: // ADD, ADDIUR2_MM, ADDQH_PH, ADDQH_R_PH, ADDQH_R_W, ADDQH_W, ADDQ_PH, AD... return; break; case 1: // ALIGN, CINS, CINS32, DALIGN, DEXT, DEXTM, DEXTU, DINS, DINSM, DINSU, D... SStream_concat0(O, ", "); break; case 2: // COPY_S_B, COPY_S_D, COPY_S_H, COPY_S_W, COPY_U_B, COPY_U_D, COPY_U_H, ... SStream_concat0(O, "]"); return; break; } // Fragment 6 encoded into 1 bits for 2 unique commands. //printf("Frag-6: %"PRIu64"\n", (Bits >> 36) & 1); if ((Bits >> 36) & 1) { // DEXT, DEXTM, DEXTU, DINS, DINSM, DINSU, EXT, EXT_MM, INS, INS_MM, MADD... printOperand(MI, 3, O); return; } else { // ALIGN, CINS, CINS32, DALIGN, DLSA, DLSA_R6, EXTS, EXTS32, LSA, LSA_R6 printUnsignedImm(MI, 3, O); return; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 394 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'f', '1', '0', 0, /* 4 */ 'w', '1', '0', 0, /* 8 */ 'f', '2', '0', 0, /* 12 */ 'D', 'S', 'P', 'O', 'u', 't', 'F', 'l', 'a', 'g', '2', '0', 0, /* 25 */ 'w', '2', '0', 0, /* 29 */ 'f', '3', '0', 0, /* 33 */ 'w', '3', '0', 0, /* 37 */ 'a', '0', 0, /* 40 */ 'a', 'c', '0', 0, /* 44 */ 'f', 'c', 'c', '0', 0, /* 49 */ 'f', '0', 0, /* 52 */ 'k', '0', 0, /* 55 */ 'm', 'p', 'l', '0', 0, /* 60 */ 'p', '0', 0, /* 63 */ 's', '0', 0, /* 66 */ 't', '0', 0, /* 69 */ 'v', '0', 0, /* 72 */ 'w', '0', 0, /* 75 */ 'f', '1', '1', 0, /* 79 */ 'w', '1', '1', 0, /* 83 */ 'f', '2', '1', 0, /* 87 */ 'D', 'S', 'P', 'O', 'u', 't', 'F', 'l', 'a', 'g', '2', '1', 0, /* 100 */ 'w', '2', '1', 0, /* 104 */ 'f', '3', '1', 0, /* 108 */ 'w', '3', '1', 0, /* 112 */ 'a', '1', 0, /* 115 */ 'a', 'c', '1', 0, /* 119 */ 'f', 'c', 'c', '1', 0, /* 124 */ 'f', '1', 0, /* 127 */ 'k', '1', 0, /* 130 */ 'm', 'p', 'l', '1', 0, /* 135 */ 'p', '1', 0, /* 138 */ 's', '1', 0, /* 141 */ 't', '1', 0, /* 144 */ 'v', '1', 0, /* 147 */ 'w', '1', 0, /* 150 */ 'f', '1', '2', 0, /* 154 */ 'w', '1', '2', 0, /* 158 */ 'f', '2', '2', 0, /* 162 */ 'D', 'S', 'P', 'O', 'u', 't', 'F', 'l', 'a', 'g', '2', '2', 0, /* 175 */ 'w', '2', '2', 0, /* 179 */ 'a', '2', 0, /* 182 */ 'a', 'c', '2', 0, /* 186 */ 'f', 'c', 'c', '2', 0, /* 191 */ 'f', '2', 0, /* 194 */ 'm', 'p', 'l', '2', 0, /* 199 */ 'p', '2', 0, /* 202 */ 's', '2', 0, /* 205 */ 't', '2', 0, /* 208 */ 'w', '2', 0, /* 211 */ 'f', '1', '3', 0, /* 215 */ 'w', '1', '3', 0, /* 219 */ 'f', '2', '3', 0, /* 223 */ 'D', 'S', 'P', 'O', 'u', 't', 'F', 'l', 'a', 'g', '2', '3', 0, /* 236 */ 'w', '2', '3', 0, /* 240 */ 'a', '3', 0, /* 243 */ 'a', 'c', '3', 0, /* 247 */ 'f', 'c', 'c', '3', 0, /* 252 */ 'f', '3', 0, /* 255 */ 's', '3', 0, /* 258 */ 't', '3', 0, /* 261 */ 'w', '3', 0, /* 264 */ 'f', '1', '4', 0, /* 268 */ 'w', '1', '4', 0, /* 272 */ 'f', '2', '4', 0, /* 276 */ 'w', '2', '4', 0, /* 280 */ 'f', 'c', 'c', '4', 0, /* 285 */ 'f', '4', 0, /* 288 */ 's', '4', 0, /* 291 */ 't', '4', 0, /* 294 */ 'w', '4', 0, /* 297 */ 'f', '1', '5', 0, /* 301 */ 'w', '1', '5', 0, /* 305 */ 'f', '2', '5', 0, /* 309 */ 'w', '2', '5', 0, /* 313 */ 'f', 'c', 'c', '5', 0, /* 318 */ 'f', '5', 0, /* 321 */ 's', '5', 0, /* 324 */ 't', '5', 0, /* 327 */ 'w', '5', 0, /* 330 */ 'f', '1', '6', 0, /* 334 */ 'w', '1', '6', 0, /* 338 */ 'f', '2', '6', 0, /* 342 */ 'w', '2', '6', 0, /* 346 */ 'f', 'c', 'c', '6', 0, /* 351 */ 'f', '6', 0, /* 354 */ 's', '6', 0, /* 357 */ 't', '6', 0, /* 360 */ 'w', '6', 0, /* 363 */ 'f', '1', '7', 0, /* 367 */ 'w', '1', '7', 0, /* 371 */ 'f', '2', '7', 0, /* 375 */ 'w', '2', '7', 0, /* 379 */ 'f', 'c', 'c', '7', 0, /* 384 */ 'f', '7', 0, /* 387 */ 's', '7', 0, /* 390 */ 't', '7', 0, /* 393 */ 'w', '7', 0, /* 396 */ 'f', '1', '8', 0, /* 400 */ 'w', '1', '8', 0, /* 404 */ 'f', '2', '8', 0, /* 408 */ 'w', '2', '8', 0, /* 412 */ 'f', '8', 0, /* 415 */ 't', '8', 0, /* 418 */ 'w', '8', 0, /* 421 */ 'D', 'S', 'P', 'O', 'u', 't', 'F', 'l', 'a', 'g', '1', '6', '_', '1', '9', 0, /* 437 */ 'f', '1', '9', 0, /* 441 */ 'w', '1', '9', 0, /* 445 */ 'f', '2', '9', 0, /* 449 */ 'w', '2', '9', 0, /* 453 */ 'f', '9', 0, /* 456 */ 't', '9', 0, /* 459 */ 'w', '9', 0, /* 462 */ 'D', 'S', 'P', 'E', 'F', 'I', 0, /* 469 */ 'r', 'a', 0, /* 472 */ 'h', 'w', 'r', '_', 'c', 'c', 0, /* 479 */ 'p', 'c', 0, /* 482 */ 'D', 'S', 'P', 'C', 'C', 'o', 'n', 'd', 0, /* 491 */ 'D', 'S', 'P', 'O', 'u', 't', 'F', 'l', 'a', 'g', 0, /* 502 */ 'h', 'i', 0, /* 505 */ 'h', 'w', 'r', '_', 'c', 'p', 'u', 'n', 'u', 'm', 0, /* 516 */ 'l', 'o', 0, /* 519 */ 'z', 'e', 'r', 'o', 0, /* 524 */ 'h', 'w', 'r', '_', 's', 'y', 'n', 'c', 'i', '_', 's', 't', 'e', 'p', 0, /* 539 */ 'f', 'p', 0, /* 542 */ 'g', 'p', 0, /* 545 */ 's', 'p', 0, /* 548 */ 'h', 'w', 'r', '_', 'c', 'c', 'r', 'e', 's', 0, /* 558 */ 'D', 'S', 'P', 'P', 'o', 's', 0, /* 565 */ 'a', 't', 0, /* 568 */ 'D', 'S', 'P', 'S', 'C', 'o', 'u', 'n', 't', 0, /* 578 */ 'D', 'S', 'P', 'C', 'a', 'r', 'r', 'y', 0, }; static const uint16_t RegAsmOffset[] = { 565, 482, 578, 462, 491, 558, 568, 539, 542, 152, 77, 2, 332, 266, 299, 213, 365, 479, 469, 545, 519, 37, 112, 179, 240, 40, 115, 182, 243, 565, 45, 120, 187, 248, 281, 314, 347, 380, 2, 77, 152, 213, 266, 299, 332, 365, 398, 435, 2, 77, 152, 213, 266, 299, 332, 365, 398, 435, 1, 76, 151, 212, 265, 298, 331, 364, 397, 434, 9, 84, 159, 220, 273, 306, 339, 372, 405, 446, 30, 105, 1, 76, 151, 212, 265, 298, 331, 364, 397, 434, 9, 84, 159, 220, 273, 306, 339, 372, 405, 446, 30, 105, 49, 191, 285, 351, 412, 0, 150, 264, 330, 396, 8, 158, 272, 338, 404, 29, 12, 87, 162, 223, 49, 124, 191, 252, 285, 318, 351, 384, 412, 453, 0, 75, 150, 211, 264, 297, 330, 363, 396, 437, 8, 83, 158, 219, 272, 305, 338, 371, 404, 445, 29, 104, 44, 119, 186, 247, 280, 313, 346, 379, 2, 77, 152, 213, 266, 299, 332, 365, 398, 435, 1, 76, 151, 212, 265, 298, 331, 364, 397, 434, 9, 84, 159, 220, 273, 306, 339, 372, 405, 446, 30, 105, 539, 49, 124, 191, 252, 285, 318, 351, 384, 412, 453, 0, 75, 150, 211, 264, 297, 330, 363, 396, 437, 8, 83, 158, 219, 272, 305, 338, 371, 404, 445, 29, 104, 542, 40, 115, 182, 243, 505, 524, 472, 548, 266, 299, 332, 365, 398, 435, 1, 76, 151, 212, 265, 298, 331, 364, 397, 434, 9, 84, 159, 220, 273, 306, 339, 372, 405, 446, 30, 105, 52, 127, 40, 115, 182, 243, 55, 130, 194, 60, 135, 199, 469, 63, 138, 202, 255, 288, 321, 354, 387, 545, 66, 141, 205, 258, 291, 324, 357, 390, 415, 456, 69, 144, 72, 147, 208, 261, 294, 327, 360, 393, 418, 459, 4, 79, 154, 215, 268, 301, 334, 367, 400, 441, 25, 100, 175, 236, 276, 309, 342, 375, 408, 449, 33, 108, 519, 37, 112, 179, 240, 40, 49, 124, 191, 252, 285, 318, 351, 384, 412, 453, 0, 75, 150, 211, 264, 297, 330, 363, 396, 437, 8, 83, 158, 219, 272, 305, 338, 371, 404, 445, 29, 104, 421, 502, 52, 127, 516, 63, 138, 202, 255, 288, 321, 354, 387, 66, 141, 205, 258, 291, 324, 357, 390, 415, 456, 69, 144, }; //printf("==== RegNo = %u, id = %s\n", RegNo, AsmStrs+RegAsmOffset[RegNo-1]); //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("-------------------------\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case Mips_ADDu: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == Mips_ZERO) { // (ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO) AsmString = "move $\x01, $\x02"; break; } return NULL; case Mips_BC0F: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC0F CC0, brtarget:$offset) AsmString = "bc0f $\x02"; break; } return NULL; case Mips_BC0FL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC0FL CC0, brtarget:$offset) AsmString = "bc0fl $\x02"; break; } return NULL; case Mips_BC0T: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC0T CC0, brtarget:$offset) AsmString = "bc0t $\x02"; break; } return NULL; case Mips_BC0TL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC0TL CC0, brtarget:$offset) AsmString = "bc0tl $\x02"; break; } return NULL; case Mips_BC1F: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) { // (BC1F FCC0, brtarget:$offset) AsmString = "bc1f $\x02"; break; } return NULL; case Mips_BC1FL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) { // (BC1FL FCC0, brtarget:$offset) AsmString = "bc1fl $\x02"; break; } return NULL; case Mips_BC1T: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) { // (BC1T FCC0, brtarget:$offset) AsmString = "bc1t $\x02"; break; } return NULL; case Mips_BC1TL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) { // (BC1TL FCC0, brtarget:$offset) AsmString = "bc1tl $\x02"; break; } return NULL; case Mips_BC2F: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC2F CC0, brtarget:$offset) AsmString = "bc2f $\x02"; break; } return NULL; case Mips_BC2FL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC2FL CC0, brtarget:$offset) AsmString = "bc2fl $\x02"; break; } return NULL; case Mips_BC2T: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC2T CC0, brtarget:$offset) AsmString = "bc2t $\x02"; break; } return NULL; case Mips_BC2TL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC2TL CC0, brtarget:$offset) AsmString = "bc2tl $\x02"; break; } return NULL; case Mips_BC3F: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC3F CC0, brtarget:$offset) AsmString = "bc3f $\x02"; break; } return NULL; case Mips_BC3FL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC3FL CC0, brtarget:$offset) AsmString = "bc3fl $\x02"; break; } return NULL; case Mips_BC3T: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC3T CC0, brtarget:$offset) AsmString = "bc3t $\x02"; break; } return NULL; case Mips_BC3TL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) { // (BC3TL CC0, brtarget:$offset) AsmString = "bc3tl $\x02"; break; } return NULL; case Mips_BREAK: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BREAK 0, 0) AsmString = "break"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BREAK uimm10:$imm, 0) AsmString = "break $\x01"; break; } return NULL; case Mips_DADDu: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR64RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR64RegClassID, 1) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == Mips_ZERO_64) { // (DADDu GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64) AsmString = "move $\x01, $\x02"; break; } return NULL; case Mips_DI: if (MCInst_getNumOperands(MI) == 1 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO) { // (DI ZERO) AsmString = "di"; break; } return NULL; case Mips_EI: if (MCInst_getNumOperands(MI) == 1 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO) { // (EI ZERO) AsmString = "ei"; break; } return NULL; case Mips_JALR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1)) { // (JALR ZERO, GPR32Opnd:$rs) AsmString = "jr $\x02"; break; } return NULL; case Mips_JALR64: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO_64 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR64RegClassID, 1)) { // (JALR64 ZERO_64, GPR64Opnd:$rs) AsmString = "jr $\x02"; break; } return NULL; case Mips_JALR_HB: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_RA && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1)) { // (JALR_HB RA, GPR32Opnd:$rs) AsmString = "jalr.hb $\x02"; break; } return NULL; case Mips_MOVE16_MM: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO && MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO) { // (MOVE16_MM ZERO, ZERO) AsmString = "nop"; break; } return NULL; case Mips_SDBBP: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (SDBBP 0) AsmString = "sdbbp"; break; } return NULL; case Mips_SDBBP_R6: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (SDBBP_R6 0) AsmString = "sdbbp"; break; } return NULL; case Mips_SLL: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO && MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (SLL ZERO, ZERO, 0) AsmString = "nop"; break; } return NULL; case Mips_SLL_MM: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO && MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (SLL_MM ZERO, ZERO, 0) AsmString = "nop"; break; } return NULL; case Mips_SUB: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 2)) { // (SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) AsmString = "neg $\x01, $\x03"; break; } return NULL; case Mips_SUBu: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 2)) { // (SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) AsmString = "negu $\x01, $\x03"; break; } return NULL; case Mips_SYNC: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (SYNC 0) AsmString = "sync"; break; } return NULL; case Mips_SYSCALL: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (SYSCALL 0) AsmString = "syscall"; break; } return NULL; case Mips_TEQ: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TEQ GPR32Opnd:$rs, GPR32Opnd:$rt, 0) AsmString = "teq $\x01, $\x02"; break; } return NULL; case Mips_TGE: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TGE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) AsmString = "tge $\x01, $\x02"; break; } return NULL; case Mips_TGEU: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0) AsmString = "tgeu $\x01, $\x02"; break; } return NULL; case Mips_TLT: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TLT GPR32Opnd:$rs, GPR32Opnd:$rt, 0) AsmString = "tlt $\x01, $\x02"; break; } return NULL; case Mips_TLTU: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TLTU GPR32Opnd:$rs, GPR32Opnd:$rt, 0) AsmString = "tltu $\x01, $\x02"; break; } return NULL; case Mips_TNE: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(Mips_GPR32RegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TNE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) AsmString = "tne $\x01, $\x02"; break; } return NULL; case Mips_WAIT_MM: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (WAIT_MM 0) AsmString = "wait"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/Mips/MipsGenDisassemblerTables.inc010066400017500001750000014727441363402546700236700ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * Mips Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static uint8_t DecoderTableCOP3_32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 51, 8, 0, // Skip to: 15 /* 7 */ MCD_OPC_CheckPredicate, 1, 40, 0, // Skip to: 51 /* 11 */ MCD_OPC_Decode, 220, 7, 10, // Opcode: LWC3 /* 15 */ MCD_OPC_FilterValue, 55, 8, 0, // Skip to: 27 /* 19 */ MCD_OPC_CheckPredicate, 2, 28, 0, // Skip to: 51 /* 23 */ MCD_OPC_Decode, 167, 7, 10, // Opcode: LDC3 /* 27 */ MCD_OPC_FilterValue, 59, 8, 0, // Skip to: 39 /* 31 */ MCD_OPC_CheckPredicate, 1, 16, 0, // Skip to: 51 /* 35 */ MCD_OPC_Decode, 242, 12, 10, // Opcode: SWC3 /* 39 */ MCD_OPC_FilterValue, 63, 8, 0, // Skip to: 51 /* 43 */ MCD_OPC_CheckPredicate, 2, 4, 0, // Skip to: 51 /* 47 */ MCD_OPC_Decode, 161, 11, 10, // Opcode: SDC3 /* 51 */ MCD_OPC_Fail, 0 }; static uint8_t DecoderTableMicroMips16[] = { /* 0 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 3 */ MCD_OPC_FilterValue, 1, 26, 0, // Skip to: 33 /* 7 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 10 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 21 /* 14 */ MCD_OPC_CheckPredicate, 3, 19, 2, // Skip to: 549 /* 18 */ MCD_OPC_Decode, 52, 11, // Opcode: ADDU16_MM /* 21 */ MCD_OPC_FilterValue, 1, 12, 2, // Skip to: 549 /* 25 */ MCD_OPC_CheckPredicate, 3, 8, 2, // Skip to: 549 /* 29 */ MCD_OPC_Decode, 214, 12, 11, // Opcode: SUBU16_MM /* 33 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 45 /* 37 */ MCD_OPC_CheckPredicate, 3, 252, 1, // Skip to: 549 /* 41 */ MCD_OPC_Decode, 155, 7, 12, // Opcode: LBU16_MM /* 45 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 57 /* 49 */ MCD_OPC_CheckPredicate, 3, 240, 1, // Skip to: 549 /* 53 */ MCD_OPC_Decode, 233, 8, 13, // Opcode: MOVE16_MM /* 57 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 88 /* 61 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 64 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 76 /* 68 */ MCD_OPC_CheckPredicate, 3, 221, 1, // Skip to: 549 /* 72 */ MCD_OPC_Decode, 226, 11, 14, // Opcode: SLL16_MM /* 76 */ MCD_OPC_FilterValue, 1, 213, 1, // Skip to: 549 /* 80 */ MCD_OPC_CheckPredicate, 3, 209, 1, // Skip to: 549 /* 84 */ MCD_OPC_Decode, 160, 12, 14, // Opcode: SRL16_MM /* 88 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 100 /* 92 */ MCD_OPC_CheckPredicate, 3, 197, 1, // Skip to: 549 /* 96 */ MCD_OPC_Decode, 186, 7, 12, // Opcode: LHU16_MM /* 100 */ MCD_OPC_FilterValue, 11, 7, 0, // Skip to: 111 /* 104 */ MCD_OPC_CheckPredicate, 3, 185, 1, // Skip to: 549 /* 108 */ MCD_OPC_Decode, 86, 15, // Opcode: ANDI16_MM /* 111 */ MCD_OPC_FilterValue, 17, 226, 0, // Skip to: 341 /* 115 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 118 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 130 /* 122 */ MCD_OPC_CheckPredicate, 3, 167, 1, // Skip to: 549 /* 126 */ MCD_OPC_Decode, 130, 10, 16, // Opcode: NOT16_MM /* 130 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 142 /* 134 */ MCD_OPC_CheckPredicate, 3, 155, 1, // Skip to: 549 /* 138 */ MCD_OPC_Decode, 237, 13, 17, // Opcode: XOR16_MM /* 142 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 153 /* 146 */ MCD_OPC_CheckPredicate, 3, 143, 1, // Skip to: 549 /* 150 */ MCD_OPC_Decode, 84, 17, // Opcode: AND16_MM /* 153 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 165 /* 157 */ MCD_OPC_CheckPredicate, 3, 132, 1, // Skip to: 549 /* 161 */ MCD_OPC_Decode, 134, 10, 17, // Opcode: OR16_MM /* 165 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 177 /* 169 */ MCD_OPC_CheckPredicate, 3, 120, 1, // Skip to: 549 /* 173 */ MCD_OPC_Decode, 225, 7, 18, // Opcode: LWM16_MM /* 177 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 189 /* 181 */ MCD_OPC_CheckPredicate, 3, 108, 1, // Skip to: 549 /* 185 */ MCD_OPC_Decode, 246, 12, 18, // Opcode: SWM16_MM /* 189 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 220 /* 193 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 196 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 208 /* 200 */ MCD_OPC_CheckPredicate, 3, 89, 1, // Skip to: 549 /* 204 */ MCD_OPC_Decode, 137, 7, 19, // Opcode: JR16_MM /* 208 */ MCD_OPC_FilterValue, 1, 81, 1, // Skip to: 549 /* 212 */ MCD_OPC_CheckPredicate, 3, 77, 1, // Skip to: 549 /* 216 */ MCD_OPC_Decode, 140, 7, 19, // Opcode: JRC16_MM /* 220 */ MCD_OPC_FilterValue, 7, 27, 0, // Skip to: 251 /* 224 */ MCD_OPC_ExtractField, 5, 1, // Inst{5} ... /* 227 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 239 /* 231 */ MCD_OPC_CheckPredicate, 3, 58, 1, // Skip to: 549 /* 235 */ MCD_OPC_Decode, 250, 6, 19, // Opcode: JALR16_MM /* 239 */ MCD_OPC_FilterValue, 1, 50, 1, // Skip to: 549 /* 243 */ MCD_OPC_CheckPredicate, 3, 46, 1, // Skip to: 549 /* 247 */ MCD_OPC_Decode, 254, 6, 19, // Opcode: JALRS16_MM /* 251 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 269 /* 255 */ MCD_OPC_CheckPredicate, 3, 34, 1, // Skip to: 549 /* 259 */ MCD_OPC_CheckField, 5, 1, 0, 28, 1, // Skip to: 549 /* 265 */ MCD_OPC_Decode, 187, 8, 19, // Opcode: MFHI16_MM /* 269 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 287 /* 273 */ MCD_OPC_CheckPredicate, 3, 16, 1, // Skip to: 549 /* 277 */ MCD_OPC_CheckField, 5, 1, 0, 10, 1, // Skip to: 549 /* 283 */ MCD_OPC_Decode, 192, 8, 19, // Opcode: MFLO16_MM /* 287 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 305 /* 291 */ MCD_OPC_CheckPredicate, 3, 254, 0, // Skip to: 549 /* 295 */ MCD_OPC_CheckField, 4, 2, 0, 248, 0, // Skip to: 549 /* 301 */ MCD_OPC_Decode, 172, 2, 20, // Opcode: BREAK16_MM /* 305 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 323 /* 309 */ MCD_OPC_CheckPredicate, 3, 236, 0, // Skip to: 549 /* 313 */ MCD_OPC_CheckField, 4, 2, 0, 230, 0, // Skip to: 549 /* 319 */ MCD_OPC_Decode, 153, 11, 20, // Opcode: SDBBP16_MM /* 323 */ MCD_OPC_FilterValue, 12, 222, 0, // Skip to: 549 /* 327 */ MCD_OPC_CheckPredicate, 3, 218, 0, // Skip to: 549 /* 331 */ MCD_OPC_CheckField, 5, 1, 0, 212, 0, // Skip to: 549 /* 337 */ MCD_OPC_Decode, 139, 7, 21, // Opcode: JRADDIUSP /* 341 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 353 /* 345 */ MCD_OPC_CheckPredicate, 3, 200, 0, // Skip to: 549 /* 349 */ MCD_OPC_Decode, 233, 7, 22, // Opcode: LWSP_MM /* 353 */ MCD_OPC_FilterValue, 19, 25, 0, // Skip to: 382 /* 357 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 360 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 371 /* 364 */ MCD_OPC_CheckPredicate, 3, 181, 0, // Skip to: 549 /* 368 */ MCD_OPC_Decode, 30, 23, // Opcode: ADDIUS5_MM /* 371 */ MCD_OPC_FilterValue, 1, 174, 0, // Skip to: 549 /* 375 */ MCD_OPC_CheckPredicate, 3, 170, 0, // Skip to: 549 /* 379 */ MCD_OPC_Decode, 31, 24, // Opcode: ADDIUSP_MM /* 382 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 394 /* 386 */ MCD_OPC_CheckPredicate, 3, 159, 0, // Skip to: 549 /* 390 */ MCD_OPC_Decode, 221, 7, 25, // Opcode: LWGP_MM /* 394 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 406 /* 398 */ MCD_OPC_CheckPredicate, 3, 147, 0, // Skip to: 549 /* 402 */ MCD_OPC_Decode, 214, 7, 12, // Opcode: LW16_MM /* 406 */ MCD_OPC_FilterValue, 27, 25, 0, // Skip to: 435 /* 410 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 413 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 424 /* 417 */ MCD_OPC_CheckPredicate, 3, 128, 0, // Skip to: 549 /* 421 */ MCD_OPC_Decode, 29, 26, // Opcode: ADDIUR2_MM /* 424 */ MCD_OPC_FilterValue, 1, 121, 0, // Skip to: 549 /* 428 */ MCD_OPC_CheckPredicate, 3, 117, 0, // Skip to: 549 /* 432 */ MCD_OPC_Decode, 28, 27, // Opcode: ADDIUR1SP_MM /* 435 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 453 /* 439 */ MCD_OPC_CheckPredicate, 3, 106, 0, // Skip to: 549 /* 443 */ MCD_OPC_CheckField, 0, 1, 0, 100, 0, // Skip to: 549 /* 449 */ MCD_OPC_Decode, 234, 8, 28, // Opcode: MOVEP_MM /* 453 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 465 /* 457 */ MCD_OPC_CheckPredicate, 3, 88, 0, // Skip to: 549 /* 461 */ MCD_OPC_Decode, 143, 11, 12, // Opcode: SB16_MM /* 465 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 477 /* 469 */ MCD_OPC_CheckPredicate, 3, 76, 0, // Skip to: 549 /* 473 */ MCD_OPC_Decode, 210, 1, 29, // Opcode: BEQZ16_MM /* 477 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 489 /* 481 */ MCD_OPC_CheckPredicate, 3, 64, 0, // Skip to: 549 /* 485 */ MCD_OPC_Decode, 187, 11, 12, // Opcode: SH16_MM /* 489 */ MCD_OPC_FilterValue, 43, 8, 0, // Skip to: 501 /* 493 */ MCD_OPC_CheckPredicate, 3, 52, 0, // Skip to: 549 /* 497 */ MCD_OPC_Decode, 157, 2, 29, // Opcode: BNEZ16_MM /* 501 */ MCD_OPC_FilterValue, 50, 8, 0, // Skip to: 513 /* 505 */ MCD_OPC_CheckPredicate, 3, 40, 0, // Skip to: 549 /* 509 */ MCD_OPC_Decode, 253, 12, 22, // Opcode: SWSP_MM /* 513 */ MCD_OPC_FilterValue, 51, 8, 0, // Skip to: 525 /* 517 */ MCD_OPC_CheckPredicate, 4, 28, 0, // Skip to: 549 /* 521 */ MCD_OPC_Decode, 165, 1, 30, // Opcode: B16_MM /* 525 */ MCD_OPC_FilterValue, 58, 8, 0, // Skip to: 537 /* 529 */ MCD_OPC_CheckPredicate, 3, 16, 0, // Skip to: 549 /* 533 */ MCD_OPC_Decode, 236, 12, 12, // Opcode: SW16_MM /* 537 */ MCD_OPC_FilterValue, 59, 8, 0, // Skip to: 549 /* 541 */ MCD_OPC_CheckPredicate, 3, 4, 0, // Skip to: 549 /* 545 */ MCD_OPC_Decode, 192, 7, 31, // Opcode: LI16_MM /* 549 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableMicroMips32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 0, 189, 3, // Skip to: 964 /* 7 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 10 */ MCD_OPC_FilterValue, 0, 90, 0, // Skip to: 104 /* 14 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 17 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 68 /* 21 */ MCD_OPC_ExtractField, 11, 15, // Inst{25-11} ... /* 24 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 36 /* 28 */ MCD_OPC_CheckPredicate, 3, 28, 0, // Skip to: 60 /* 32 */ MCD_OPC_Decode, 181, 12, 0, // Opcode: SSNOP_MM /* 36 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 48 /* 40 */ MCD_OPC_CheckPredicate, 3, 16, 0, // Skip to: 60 /* 44 */ MCD_OPC_Decode, 140, 5, 0, // Opcode: EHB_MM /* 48 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 60 /* 52 */ MCD_OPC_CheckPredicate, 3, 4, 0, // Skip to: 60 /* 56 */ MCD_OPC_Decode, 148, 10, 0, // Opcode: PAUSE_MM /* 60 */ MCD_OPC_CheckPredicate, 3, 38, 6, // Skip to: 1638 /* 64 */ MCD_OPC_Decode, 238, 11, 32, // Opcode: SLL_MM /* 68 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 80 /* 72 */ MCD_OPC_CheckPredicate, 3, 26, 6, // Skip to: 1638 /* 76 */ MCD_OPC_Decode, 178, 12, 32, // Opcode: SRL_MM /* 80 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 92 /* 84 */ MCD_OPC_CheckPredicate, 3, 14, 6, // Skip to: 1638 /* 88 */ MCD_OPC_Decode, 157, 12, 32, // Opcode: SRA_MM /* 92 */ MCD_OPC_FilterValue, 3, 6, 6, // Skip to: 1638 /* 96 */ MCD_OPC_CheckPredicate, 3, 2, 6, // Skip to: 1638 /* 100 */ MCD_OPC_Decode, 250, 10, 32, // Opcode: ROTR_MM /* 104 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 116 /* 108 */ MCD_OPC_CheckPredicate, 3, 246, 5, // Skip to: 1638 /* 112 */ MCD_OPC_Decode, 173, 2, 33, // Opcode: BREAK_MM /* 116 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 128 /* 120 */ MCD_OPC_CheckPredicate, 3, 234, 5, // Skip to: 1638 /* 124 */ MCD_OPC_Decode, 246, 6, 34, // Opcode: INS_MM /* 128 */ MCD_OPC_FilterValue, 16, 180, 0, // Skip to: 312 /* 132 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 135 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 147 /* 139 */ MCD_OPC_CheckPredicate, 3, 215, 5, // Skip to: 1638 /* 143 */ MCD_OPC_Decode, 234, 11, 35, // Opcode: SLLV_MM /* 147 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 159 /* 151 */ MCD_OPC_CheckPredicate, 3, 203, 5, // Skip to: 1638 /* 155 */ MCD_OPC_Decode, 174, 12, 35, // Opcode: SRLV_MM /* 159 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 171 /* 163 */ MCD_OPC_CheckPredicate, 3, 191, 5, // Skip to: 1638 /* 167 */ MCD_OPC_Decode, 153, 12, 35, // Opcode: SRAV_MM /* 171 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 183 /* 175 */ MCD_OPC_CheckPredicate, 3, 179, 5, // Skip to: 1638 /* 179 */ MCD_OPC_Decode, 249, 10, 35, // Opcode: ROTRV_MM /* 183 */ MCD_OPC_FilterValue, 4, 7, 0, // Skip to: 194 /* 187 */ MCD_OPC_CheckPredicate, 3, 167, 5, // Skip to: 1638 /* 191 */ MCD_OPC_Decode, 72, 36, // Opcode: ADD_MM /* 194 */ MCD_OPC_FilterValue, 5, 7, 0, // Skip to: 205 /* 198 */ MCD_OPC_CheckPredicate, 3, 156, 5, // Skip to: 1638 /* 202 */ MCD_OPC_Decode, 78, 36, // Opcode: ADDu_MM /* 205 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 217 /* 209 */ MCD_OPC_CheckPredicate, 3, 145, 5, // Skip to: 1638 /* 213 */ MCD_OPC_Decode, 229, 12, 36, // Opcode: SUB_MM /* 217 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 229 /* 221 */ MCD_OPC_CheckPredicate, 3, 133, 5, // Skip to: 1638 /* 225 */ MCD_OPC_Decode, 231, 12, 36, // Opcode: SUBu_MM /* 229 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 241 /* 233 */ MCD_OPC_CheckPredicate, 3, 121, 5, // Skip to: 1638 /* 237 */ MCD_OPC_Decode, 217, 9, 36, // Opcode: MUL_MM /* 241 */ MCD_OPC_FilterValue, 9, 7, 0, // Skip to: 252 /* 245 */ MCD_OPC_CheckPredicate, 3, 109, 5, // Skip to: 1638 /* 249 */ MCD_OPC_Decode, 88, 36, // Opcode: AND_MM /* 252 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 264 /* 256 */ MCD_OPC_CheckPredicate, 3, 98, 5, // Skip to: 1638 /* 260 */ MCD_OPC_Decode, 137, 10, 36, // Opcode: OR_MM /* 264 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 276 /* 268 */ MCD_OPC_CheckPredicate, 3, 86, 5, // Skip to: 1638 /* 272 */ MCD_OPC_Decode, 253, 9, 36, // Opcode: NOR_MM /* 276 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 288 /* 280 */ MCD_OPC_CheckPredicate, 3, 74, 5, // Skip to: 1638 /* 284 */ MCD_OPC_Decode, 240, 13, 36, // Opcode: XOR_MM /* 288 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 300 /* 292 */ MCD_OPC_CheckPredicate, 3, 62, 5, // Skip to: 1638 /* 296 */ MCD_OPC_Decode, 242, 11, 36, // Opcode: SLT_MM /* 300 */ MCD_OPC_FilterValue, 14, 54, 5, // Skip to: 1638 /* 304 */ MCD_OPC_CheckPredicate, 3, 50, 5, // Skip to: 1638 /* 308 */ MCD_OPC_Decode, 251, 11, 36, // Opcode: SLTu_MM /* 312 */ MCD_OPC_FilterValue, 24, 39, 0, // Skip to: 355 /* 316 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 319 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 331 /* 323 */ MCD_OPC_CheckPredicate, 3, 31, 5, // Skip to: 1638 /* 327 */ MCD_OPC_Decode, 253, 8, 37, // Opcode: MOVN_I_MM /* 331 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 343 /* 335 */ MCD_OPC_CheckPredicate, 3, 19, 5, // Skip to: 1638 /* 339 */ MCD_OPC_Decode, 145, 9, 37, // Opcode: MOVZ_I_MM /* 343 */ MCD_OPC_FilterValue, 4, 11, 5, // Skip to: 1638 /* 347 */ MCD_OPC_CheckPredicate, 3, 7, 5, // Skip to: 1638 /* 351 */ MCD_OPC_Decode, 239, 7, 38, // Opcode: LWXS_MM /* 355 */ MCD_OPC_FilterValue, 44, 8, 0, // Skip to: 367 /* 359 */ MCD_OPC_CheckPredicate, 3, 251, 4, // Skip to: 1638 /* 363 */ MCD_OPC_Decode, 160, 5, 39, // Opcode: EXT_MM /* 367 */ MCD_OPC_FilterValue, 60, 243, 4, // Skip to: 1638 /* 371 */ MCD_OPC_ExtractField, 6, 6, // Inst{11-6} ... /* 374 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 386 /* 378 */ MCD_OPC_CheckPredicate, 3, 232, 4, // Skip to: 1638 /* 382 */ MCD_OPC_Decode, 185, 13, 40, // Opcode: TEQ_MM /* 386 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 398 /* 390 */ MCD_OPC_CheckPredicate, 3, 220, 4, // Skip to: 1638 /* 394 */ MCD_OPC_Decode, 193, 13, 40, // Opcode: TGE_MM /* 398 */ MCD_OPC_FilterValue, 13, 123, 0, // Skip to: 525 /* 402 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 405 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 423 /* 409 */ MCD_OPC_CheckPredicate, 3, 201, 4, // Skip to: 1638 /* 413 */ MCD_OPC_CheckField, 16, 10, 0, 195, 4, // Skip to: 1638 /* 419 */ MCD_OPC_Decode, 195, 13, 0, // Opcode: TLBP_MM /* 423 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 441 /* 427 */ MCD_OPC_CheckPredicate, 3, 183, 4, // Skip to: 1638 /* 431 */ MCD_OPC_CheckField, 16, 10, 0, 177, 4, // Skip to: 1638 /* 437 */ MCD_OPC_Decode, 197, 13, 0, // Opcode: TLBR_MM /* 441 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 459 /* 445 */ MCD_OPC_CheckPredicate, 3, 165, 4, // Skip to: 1638 /* 449 */ MCD_OPC_CheckField, 16, 10, 0, 159, 4, // Skip to: 1638 /* 455 */ MCD_OPC_Decode, 199, 13, 0, // Opcode: TLBWI_MM /* 459 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 477 /* 463 */ MCD_OPC_CheckPredicate, 3, 147, 4, // Skip to: 1638 /* 467 */ MCD_OPC_CheckField, 16, 10, 0, 141, 4, // Skip to: 1638 /* 473 */ MCD_OPC_Decode, 201, 13, 0, // Opcode: TLBWR_MM /* 477 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 489 /* 481 */ MCD_OPC_CheckPredicate, 3, 129, 4, // Skip to: 1638 /* 485 */ MCD_OPC_Decode, 232, 13, 41, // Opcode: WAIT_MM /* 489 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 507 /* 493 */ MCD_OPC_CheckPredicate, 3, 117, 4, // Skip to: 1638 /* 497 */ MCD_OPC_CheckField, 16, 10, 0, 111, 4, // Skip to: 1638 /* 503 */ MCD_OPC_Decode, 175, 4, 0, // Opcode: DERET_MM /* 507 */ MCD_OPC_FilterValue, 15, 103, 4, // Skip to: 1638 /* 511 */ MCD_OPC_CheckPredicate, 3, 99, 4, // Skip to: 1638 /* 515 */ MCD_OPC_CheckField, 16, 10, 0, 93, 4, // Skip to: 1638 /* 521 */ MCD_OPC_Decode, 144, 5, 0, // Opcode: ERET_MM /* 525 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 537 /* 529 */ MCD_OPC_CheckPredicate, 3, 81, 4, // Skip to: 1638 /* 533 */ MCD_OPC_Decode, 192, 13, 40, // Opcode: TGEU_MM /* 537 */ MCD_OPC_FilterValue, 29, 39, 0, // Skip to: 580 /* 541 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 544 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 562 /* 548 */ MCD_OPC_CheckPredicate, 3, 62, 4, // Skip to: 1638 /* 552 */ MCD_OPC_CheckField, 21, 5, 0, 56, 4, // Skip to: 1638 /* 558 */ MCD_OPC_Decode, 193, 4, 42, // Opcode: DI_MM /* 562 */ MCD_OPC_FilterValue, 5, 48, 4, // Skip to: 1638 /* 566 */ MCD_OPC_CheckPredicate, 3, 44, 4, // Skip to: 1638 /* 570 */ MCD_OPC_CheckField, 21, 5, 0, 38, 4, // Skip to: 1638 /* 576 */ MCD_OPC_Decode, 142, 5, 42, // Opcode: EI_MM /* 580 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 592 /* 584 */ MCD_OPC_CheckPredicate, 3, 26, 4, // Skip to: 1638 /* 588 */ MCD_OPC_Decode, 208, 13, 40, // Opcode: TLT_MM /* 592 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 604 /* 596 */ MCD_OPC_CheckPredicate, 3, 14, 4, // Skip to: 1638 /* 600 */ MCD_OPC_Decode, 207, 13, 40, // Opcode: TLTU_MM /* 604 */ MCD_OPC_FilterValue, 44, 171, 0, // Skip to: 779 /* 608 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 611 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 623 /* 615 */ MCD_OPC_CheckPredicate, 3, 251, 3, // Skip to: 1638 /* 619 */ MCD_OPC_Decode, 170, 11, 43, // Opcode: SEB_MM /* 623 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 635 /* 627 */ MCD_OPC_CheckPredicate, 3, 239, 3, // Skip to: 1638 /* 631 */ MCD_OPC_Decode, 173, 11, 43, // Opcode: SEH_MM /* 635 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 647 /* 639 */ MCD_OPC_CheckPredicate, 3, 227, 3, // Skip to: 1638 /* 643 */ MCD_OPC_Decode, 134, 3, 43, // Opcode: CLO_MM /* 647 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 659 /* 651 */ MCD_OPC_CheckPredicate, 3, 215, 3, // Skip to: 1638 /* 655 */ MCD_OPC_Decode, 153, 3, 43, // Opcode: CLZ_MM /* 659 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 671 /* 663 */ MCD_OPC_CheckPredicate, 3, 203, 3, // Skip to: 1638 /* 667 */ MCD_OPC_Decode, 240, 10, 44, // Opcode: RDHWR_MM /* 671 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 683 /* 675 */ MCD_OPC_CheckPredicate, 3, 191, 3, // Skip to: 1638 /* 679 */ MCD_OPC_Decode, 235, 13, 43, // Opcode: WSBH_MM /* 683 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 695 /* 687 */ MCD_OPC_CheckPredicate, 3, 179, 3, // Skip to: 1638 /* 691 */ MCD_OPC_Decode, 209, 9, 45, // Opcode: MULT_MM /* 695 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 707 /* 699 */ MCD_OPC_CheckPredicate, 3, 167, 3, // Skip to: 1638 /* 703 */ MCD_OPC_Decode, 211, 9, 45, // Opcode: MULTu_MM /* 707 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 719 /* 711 */ MCD_OPC_CheckPredicate, 3, 155, 3, // Skip to: 1638 /* 715 */ MCD_OPC_Decode, 163, 11, 45, // Opcode: SDIV_MM /* 719 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 731 /* 723 */ MCD_OPC_CheckPredicate, 3, 143, 3, // Skip to: 1638 /* 727 */ MCD_OPC_Decode, 223, 13, 45, // Opcode: UDIV_MM /* 731 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 743 /* 735 */ MCD_OPC_CheckPredicate, 3, 131, 3, // Skip to: 1638 /* 739 */ MCD_OPC_Decode, 146, 8, 45, // Opcode: MADD_MM /* 743 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 755 /* 747 */ MCD_OPC_CheckPredicate, 3, 119, 3, // Skip to: 1638 /* 751 */ MCD_OPC_Decode, 137, 8, 45, // Opcode: MADDU_MM /* 755 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 767 /* 759 */ MCD_OPC_CheckPredicate, 3, 107, 3, // Skip to: 1638 /* 763 */ MCD_OPC_Decode, 164, 9, 45, // Opcode: MSUB_MM /* 767 */ MCD_OPC_FilterValue, 15, 99, 3, // Skip to: 1638 /* 771 */ MCD_OPC_CheckPredicate, 3, 95, 3, // Skip to: 1638 /* 775 */ MCD_OPC_Decode, 155, 9, 45, // Opcode: MSUBU_MM /* 779 */ MCD_OPC_FilterValue, 45, 45, 0, // Skip to: 828 /* 783 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 786 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 804 /* 790 */ MCD_OPC_CheckPredicate, 3, 76, 3, // Skip to: 1638 /* 794 */ MCD_OPC_CheckField, 21, 5, 0, 70, 3, // Skip to: 1638 /* 800 */ MCD_OPC_Decode, 131, 13, 46, // Opcode: SYNC_MM /* 804 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 816 /* 808 */ MCD_OPC_CheckPredicate, 3, 58, 3, // Skip to: 1638 /* 812 */ MCD_OPC_Decode, 133, 13, 41, // Opcode: SYSCALL_MM /* 816 */ MCD_OPC_FilterValue, 13, 50, 3, // Skip to: 1638 /* 820 */ MCD_OPC_CheckPredicate, 3, 46, 3, // Skip to: 1638 /* 824 */ MCD_OPC_Decode, 154, 11, 41, // Opcode: SDBBP_MM /* 828 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 840 /* 832 */ MCD_OPC_CheckPredicate, 3, 34, 3, // Skip to: 1638 /* 836 */ MCD_OPC_Decode, 212, 13, 40, // Opcode: TNE_MM /* 840 */ MCD_OPC_FilterValue, 53, 75, 0, // Skip to: 919 /* 844 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 847 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 865 /* 851 */ MCD_OPC_CheckPredicate, 3, 15, 3, // Skip to: 1638 /* 855 */ MCD_OPC_CheckField, 21, 5, 0, 9, 3, // Skip to: 1638 /* 861 */ MCD_OPC_Decode, 190, 8, 42, // Opcode: MFHI_MM /* 865 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 883 /* 869 */ MCD_OPC_CheckPredicate, 3, 253, 2, // Skip to: 1638 /* 873 */ MCD_OPC_CheckField, 21, 5, 0, 247, 2, // Skip to: 1638 /* 879 */ MCD_OPC_Decode, 195, 8, 42, // Opcode: MFLO_MM /* 883 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 901 /* 887 */ MCD_OPC_CheckPredicate, 3, 235, 2, // Skip to: 1638 /* 891 */ MCD_OPC_CheckField, 21, 5, 0, 229, 2, // Skip to: 1638 /* 897 */ MCD_OPC_Decode, 179, 9, 42, // Opcode: MTHI_MM /* 901 */ MCD_OPC_FilterValue, 3, 221, 2, // Skip to: 1638 /* 905 */ MCD_OPC_CheckPredicate, 3, 217, 2, // Skip to: 1638 /* 909 */ MCD_OPC_CheckField, 21, 5, 0, 211, 2, // Skip to: 1638 /* 915 */ MCD_OPC_Decode, 184, 9, 42, // Opcode: MTLO_MM /* 919 */ MCD_OPC_FilterValue, 60, 203, 2, // Skip to: 1638 /* 923 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 926 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 952 /* 930 */ MCD_OPC_CheckPredicate, 3, 10, 0, // Skip to: 944 /* 934 */ MCD_OPC_CheckField, 21, 5, 0, 4, 0, // Skip to: 944 /* 940 */ MCD_OPC_Decode, 143, 7, 42, // Opcode: JR_MM /* 944 */ MCD_OPC_CheckPredicate, 3, 178, 2, // Skip to: 1638 /* 948 */ MCD_OPC_Decode, 129, 7, 43, // Opcode: JALR_MM /* 952 */ MCD_OPC_FilterValue, 4, 170, 2, // Skip to: 1638 /* 956 */ MCD_OPC_CheckPredicate, 3, 166, 2, // Skip to: 1638 /* 960 */ MCD_OPC_Decode, 255, 6, 43, // Opcode: JALRS_MM /* 964 */ MCD_OPC_FilterValue, 4, 7, 0, // Skip to: 975 /* 968 */ MCD_OPC_CheckPredicate, 3, 154, 2, // Skip to: 1638 /* 972 */ MCD_OPC_Decode, 74, 47, // Opcode: ADDi_MM /* 975 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 987 /* 979 */ MCD_OPC_CheckPredicate, 3, 143, 2, // Skip to: 1638 /* 983 */ MCD_OPC_Decode, 160, 7, 48, // Opcode: LBu_MM /* 987 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 999 /* 991 */ MCD_OPC_CheckPredicate, 3, 131, 2, // Skip to: 1638 /* 995 */ MCD_OPC_Decode, 145, 11, 48, // Opcode: SB_MM /* 999 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 1011 /* 1003 */ MCD_OPC_CheckPredicate, 3, 119, 2, // Skip to: 1638 /* 1007 */ MCD_OPC_Decode, 157, 7, 48, // Opcode: LB_MM /* 1011 */ MCD_OPC_FilterValue, 8, 63, 0, // Skip to: 1078 /* 1015 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 1018 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1030 /* 1022 */ MCD_OPC_CheckPredicate, 3, 100, 2, // Skip to: 1638 /* 1026 */ MCD_OPC_Decode, 229, 7, 49, // Opcode: LWP_MM /* 1030 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 1042 /* 1034 */ MCD_OPC_CheckPredicate, 3, 88, 2, // Skip to: 1638 /* 1038 */ MCD_OPC_Decode, 226, 7, 49, // Opcode: LWM32_MM /* 1042 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 1054 /* 1046 */ MCD_OPC_CheckPredicate, 3, 76, 2, // Skip to: 1638 /* 1050 */ MCD_OPC_Decode, 221, 2, 50, // Opcode: CACHE_MM /* 1054 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1066 /* 1058 */ MCD_OPC_CheckPredicate, 3, 64, 2, // Skip to: 1638 /* 1062 */ MCD_OPC_Decode, 249, 12, 49, // Opcode: SWP_MM /* 1066 */ MCD_OPC_FilterValue, 13, 56, 2, // Skip to: 1638 /* 1070 */ MCD_OPC_CheckPredicate, 3, 52, 2, // Skip to: 1638 /* 1074 */ MCD_OPC_Decode, 247, 12, 49, // Opcode: SWM32_MM /* 1078 */ MCD_OPC_FilterValue, 12, 7, 0, // Skip to: 1089 /* 1082 */ MCD_OPC_CheckPredicate, 3, 40, 2, // Skip to: 1638 /* 1086 */ MCD_OPC_Decode, 76, 47, // Opcode: ADDiu_MM /* 1089 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 1101 /* 1093 */ MCD_OPC_CheckPredicate, 3, 29, 2, // Skip to: 1638 /* 1097 */ MCD_OPC_Decode, 191, 7, 48, // Opcode: LHu_MM /* 1101 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 1113 /* 1105 */ MCD_OPC_CheckPredicate, 3, 17, 2, // Skip to: 1638 /* 1109 */ MCD_OPC_Decode, 216, 11, 48, // Opcode: SH_MM /* 1113 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 1125 /* 1117 */ MCD_OPC_CheckPredicate, 3, 5, 2, // Skip to: 1638 /* 1121 */ MCD_OPC_Decode, 188, 7, 48, // Opcode: LH_MM /* 1125 */ MCD_OPC_FilterValue, 16, 207, 0, // Skip to: 1336 /* 1129 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 1132 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1144 /* 1136 */ MCD_OPC_CheckPredicate, 3, 242, 1, // Skip to: 1638 /* 1140 */ MCD_OPC_Decode, 140, 2, 51, // Opcode: BLTZ_MM /* 1144 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1156 /* 1148 */ MCD_OPC_CheckPredicate, 3, 230, 1, // Skip to: 1638 /* 1152 */ MCD_OPC_Decode, 137, 2, 51, // Opcode: BLTZAL_MM /* 1156 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1168 /* 1160 */ MCD_OPC_CheckPredicate, 3, 218, 1, // Skip to: 1638 /* 1164 */ MCD_OPC_Decode, 226, 1, 51, // Opcode: BGEZ_MM /* 1168 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1180 /* 1172 */ MCD_OPC_CheckPredicate, 3, 206, 1, // Skip to: 1638 /* 1176 */ MCD_OPC_Decode, 223, 1, 51, // Opcode: BGEZAL_MM /* 1180 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 1192 /* 1184 */ MCD_OPC_CheckPredicate, 3, 194, 1, // Skip to: 1638 /* 1188 */ MCD_OPC_Decode, 128, 2, 51, // Opcode: BLEZ_MM /* 1192 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 1204 /* 1196 */ MCD_OPC_CheckPredicate, 3, 182, 1, // Skip to: 1638 /* 1200 */ MCD_OPC_Decode, 160, 2, 51, // Opcode: BNEZC_MM /* 1204 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 1216 /* 1208 */ MCD_OPC_CheckPredicate, 3, 170, 1, // Skip to: 1638 /* 1212 */ MCD_OPC_Decode, 232, 1, 51, // Opcode: BGTZ_MM /* 1216 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 1228 /* 1220 */ MCD_OPC_CheckPredicate, 3, 158, 1, // Skip to: 1638 /* 1224 */ MCD_OPC_Decode, 213, 1, 51, // Opcode: BEQZC_MM /* 1228 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1240 /* 1232 */ MCD_OPC_CheckPredicate, 3, 146, 1, // Skip to: 1638 /* 1236 */ MCD_OPC_Decode, 205, 13, 52, // Opcode: TLTI_MM /* 1240 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1252 /* 1244 */ MCD_OPC_CheckPredicate, 3, 134, 1, // Skip to: 1638 /* 1248 */ MCD_OPC_Decode, 190, 13, 52, // Opcode: TGEI_MM /* 1252 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1264 /* 1256 */ MCD_OPC_CheckPredicate, 3, 122, 1, // Skip to: 1638 /* 1260 */ MCD_OPC_Decode, 204, 13, 52, // Opcode: TLTIU_MM /* 1264 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1276 /* 1268 */ MCD_OPC_CheckPredicate, 3, 110, 1, // Skip to: 1638 /* 1272 */ MCD_OPC_Decode, 189, 13, 52, // Opcode: TGEIU_MM /* 1276 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 1288 /* 1280 */ MCD_OPC_CheckPredicate, 3, 98, 1, // Skip to: 1638 /* 1284 */ MCD_OPC_Decode, 211, 13, 52, // Opcode: TNEI_MM /* 1288 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 1300 /* 1292 */ MCD_OPC_CheckPredicate, 3, 86, 1, // Skip to: 1638 /* 1296 */ MCD_OPC_Decode, 212, 7, 52, // Opcode: LUi_MM /* 1300 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 1312 /* 1304 */ MCD_OPC_CheckPredicate, 3, 74, 1, // Skip to: 1638 /* 1308 */ MCD_OPC_Decode, 184, 13, 52, // Opcode: TEQI_MM /* 1312 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1324 /* 1316 */ MCD_OPC_CheckPredicate, 3, 62, 1, // Skip to: 1638 /* 1320 */ MCD_OPC_Decode, 136, 2, 51, // Opcode: BLTZALS_MM /* 1324 */ MCD_OPC_FilterValue, 19, 54, 1, // Skip to: 1638 /* 1328 */ MCD_OPC_CheckPredicate, 3, 50, 1, // Skip to: 1638 /* 1332 */ MCD_OPC_Decode, 222, 1, 51, // Opcode: BGEZALS_MM /* 1336 */ MCD_OPC_FilterValue, 20, 8, 0, // Skip to: 1348 /* 1340 */ MCD_OPC_CheckPredicate, 3, 38, 1, // Skip to: 1638 /* 1344 */ MCD_OPC_Decode, 144, 10, 53, // Opcode: ORi_MM /* 1348 */ MCD_OPC_FilterValue, 21, 29, 0, // Skip to: 1381 /* 1352 */ MCD_OPC_ExtractField, 0, 13, // Inst{12-0} ... /* 1355 */ MCD_OPC_FilterValue, 251, 2, 8, 0, // Skip to: 1368 /* 1360 */ MCD_OPC_CheckPredicate, 3, 18, 1, // Skip to: 1638 /* 1364 */ MCD_OPC_Decode, 241, 8, 54, // Opcode: MOVF_I_MM /* 1368 */ MCD_OPC_FilterValue, 251, 18, 9, 1, // Skip to: 1638 /* 1373 */ MCD_OPC_CheckPredicate, 3, 5, 1, // Skip to: 1638 /* 1377 */ MCD_OPC_Decode, 133, 9, 54, // Opcode: MOVT_I_MM /* 1381 */ MCD_OPC_FilterValue, 24, 99, 0, // Skip to: 1484 /* 1385 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 1388 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1400 /* 1392 */ MCD_OPC_CheckPredicate, 3, 242, 0, // Skip to: 1638 /* 1396 */ MCD_OPC_Decode, 224, 7, 49, // Opcode: LWL_MM /* 1400 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1412 /* 1404 */ MCD_OPC_CheckPredicate, 3, 230, 0, // Skip to: 1638 /* 1408 */ MCD_OPC_Decode, 232, 7, 49, // Opcode: LWR_MM /* 1412 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1424 /* 1416 */ MCD_OPC_CheckPredicate, 3, 218, 0, // Skip to: 1638 /* 1420 */ MCD_OPC_Decode, 182, 10, 50, // Opcode: PREF_MM /* 1424 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1436 /* 1428 */ MCD_OPC_CheckPredicate, 3, 206, 0, // Skip to: 1638 /* 1432 */ MCD_OPC_Decode, 196, 7, 49, // Opcode: LL_MM /* 1436 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1448 /* 1440 */ MCD_OPC_CheckPredicate, 3, 194, 0, // Skip to: 1638 /* 1444 */ MCD_OPC_Decode, 245, 12, 49, // Opcode: SWL_MM /* 1448 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1460 /* 1452 */ MCD_OPC_CheckPredicate, 3, 182, 0, // Skip to: 1638 /* 1456 */ MCD_OPC_Decode, 252, 12, 49, // Opcode: SWR_MM /* 1460 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1472 /* 1464 */ MCD_OPC_CheckPredicate, 3, 170, 0, // Skip to: 1638 /* 1468 */ MCD_OPC_Decode, 149, 11, 49, // Opcode: SC_MM /* 1472 */ MCD_OPC_FilterValue, 14, 162, 0, // Skip to: 1638 /* 1476 */ MCD_OPC_CheckPredicate, 3, 158, 0, // Skip to: 1638 /* 1480 */ MCD_OPC_Decode, 235, 7, 49, // Opcode: LWU_MM /* 1484 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1496 /* 1488 */ MCD_OPC_CheckPredicate, 3, 146, 0, // Skip to: 1638 /* 1492 */ MCD_OPC_Decode, 247, 13, 53, // Opcode: XORi_MM /* 1496 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 1508 /* 1500 */ MCD_OPC_CheckPredicate, 3, 134, 0, // Skip to: 1638 /* 1504 */ MCD_OPC_Decode, 130, 7, 55, // Opcode: JALS_MM /* 1508 */ MCD_OPC_FilterValue, 30, 7, 0, // Skip to: 1519 /* 1512 */ MCD_OPC_CheckPredicate, 3, 122, 0, // Skip to: 1638 /* 1516 */ MCD_OPC_Decode, 27, 56, // Opcode: ADDIUPC_MM /* 1519 */ MCD_OPC_FilterValue, 36, 8, 0, // Skip to: 1531 /* 1523 */ MCD_OPC_CheckPredicate, 3, 111, 0, // Skip to: 1638 /* 1527 */ MCD_OPC_Decode, 245, 11, 47, // Opcode: SLTi_MM /* 1531 */ MCD_OPC_FilterValue, 37, 8, 0, // Skip to: 1543 /* 1535 */ MCD_OPC_CheckPredicate, 3, 99, 0, // Skip to: 1638 /* 1539 */ MCD_OPC_Decode, 214, 1, 57, // Opcode: BEQ_MM /* 1543 */ MCD_OPC_FilterValue, 44, 8, 0, // Skip to: 1555 /* 1547 */ MCD_OPC_CheckPredicate, 3, 87, 0, // Skip to: 1638 /* 1551 */ MCD_OPC_Decode, 248, 11, 47, // Opcode: SLTiu_MM /* 1555 */ MCD_OPC_FilterValue, 45, 8, 0, // Skip to: 1567 /* 1559 */ MCD_OPC_CheckPredicate, 3, 75, 0, // Skip to: 1638 /* 1563 */ MCD_OPC_Decode, 161, 2, 57, // Opcode: BNE_MM /* 1567 */ MCD_OPC_FilterValue, 52, 7, 0, // Skip to: 1578 /* 1571 */ MCD_OPC_CheckPredicate, 3, 63, 0, // Skip to: 1638 /* 1575 */ MCD_OPC_Decode, 95, 53, // Opcode: ANDi_MM /* 1578 */ MCD_OPC_FilterValue, 53, 8, 0, // Skip to: 1590 /* 1582 */ MCD_OPC_CheckPredicate, 3, 52, 0, // Skip to: 1638 /* 1586 */ MCD_OPC_Decode, 144, 7, 55, // Opcode: J_MM /* 1590 */ MCD_OPC_FilterValue, 60, 8, 0, // Skip to: 1602 /* 1594 */ MCD_OPC_CheckPredicate, 3, 40, 0, // Skip to: 1638 /* 1598 */ MCD_OPC_Decode, 132, 7, 55, // Opcode: JALX_MM /* 1602 */ MCD_OPC_FilterValue, 61, 8, 0, // Skip to: 1614 /* 1606 */ MCD_OPC_CheckPredicate, 3, 28, 0, // Skip to: 1638 /* 1610 */ MCD_OPC_Decode, 133, 7, 55, // Opcode: JAL_MM /* 1614 */ MCD_OPC_FilterValue, 62, 8, 0, // Skip to: 1626 /* 1618 */ MCD_OPC_CheckPredicate, 3, 16, 0, // Skip to: 1638 /* 1622 */ MCD_OPC_Decode, 128, 13, 48, // Opcode: SW_MM /* 1626 */ MCD_OPC_FilterValue, 63, 8, 0, // Skip to: 1638 /* 1630 */ MCD_OPC_CheckPredicate, 3, 4, 0, // Skip to: 1638 /* 1634 */ MCD_OPC_Decode, 240, 7, 48, // Opcode: LW_MM /* 1638 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableMips32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 0, 173, 3, // Skip to: 948 /* 7 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 10 */ MCD_OPC_FilterValue, 0, 54, 0, // Skip to: 68 /* 14 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 17 */ MCD_OPC_FilterValue, 0, 137, 53, // Skip to: 13726 /* 21 */ MCD_OPC_ExtractField, 6, 15, // Inst{20-6} ... /* 24 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 36 /* 28 */ MCD_OPC_CheckPredicate, 5, 28, 0, // Skip to: 60 /* 32 */ MCD_OPC_Decode, 180, 12, 0, // Opcode: SSNOP /* 36 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 48 /* 40 */ MCD_OPC_CheckPredicate, 5, 16, 0, // Skip to: 60 /* 44 */ MCD_OPC_Decode, 139, 5, 0, // Opcode: EHB /* 48 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 60 /* 52 */ MCD_OPC_CheckPredicate, 6, 4, 0, // Skip to: 60 /* 56 */ MCD_OPC_Decode, 147, 10, 0, // Opcode: PAUSE /* 60 */ MCD_OPC_CheckPredicate, 1, 94, 53, // Skip to: 13726 /* 64 */ MCD_OPC_Decode, 225, 11, 58, // Opcode: SLL /* 68 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 111 /* 72 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 75 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 93 /* 79 */ MCD_OPC_CheckPredicate, 7, 75, 53, // Skip to: 13726 /* 83 */ MCD_OPC_CheckField, 6, 5, 0, 69, 53, // Skip to: 13726 /* 89 */ MCD_OPC_Decode, 239, 8, 59, // Opcode: MOVF_I /* 93 */ MCD_OPC_FilterValue, 1, 61, 53, // Skip to: 13726 /* 97 */ MCD_OPC_CheckPredicate, 7, 57, 53, // Skip to: 13726 /* 101 */ MCD_OPC_CheckField, 6, 5, 0, 51, 53, // Skip to: 13726 /* 107 */ MCD_OPC_Decode, 131, 9, 59, // Opcode: MOVT_I /* 111 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 142 /* 115 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 118 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 130 /* 122 */ MCD_OPC_CheckPredicate, 1, 32, 53, // Skip to: 13726 /* 126 */ MCD_OPC_Decode, 159, 12, 58, // Opcode: SRL /* 130 */ MCD_OPC_FilterValue, 1, 24, 53, // Skip to: 13726 /* 134 */ MCD_OPC_CheckPredicate, 6, 20, 53, // Skip to: 13726 /* 138 */ MCD_OPC_Decode, 247, 10, 58, // Opcode: ROTR /* 142 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 160 /* 146 */ MCD_OPC_CheckPredicate, 5, 8, 53, // Skip to: 13726 /* 150 */ MCD_OPC_CheckField, 21, 5, 0, 2, 53, // Skip to: 13726 /* 156 */ MCD_OPC_Decode, 139, 12, 58, // Opcode: SRA /* 160 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 178 /* 164 */ MCD_OPC_CheckPredicate, 5, 246, 52, // Skip to: 13726 /* 168 */ MCD_OPC_CheckField, 6, 5, 0, 240, 52, // Skip to: 13726 /* 174 */ MCD_OPC_Decode, 233, 11, 36, // Opcode: SLLV /* 178 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 196 /* 182 */ MCD_OPC_CheckPredicate, 8, 228, 52, // Skip to: 13726 /* 186 */ MCD_OPC_CheckField, 8, 3, 0, 222, 52, // Skip to: 13726 /* 192 */ MCD_OPC_Decode, 205, 7, 60, // Opcode: LSA /* 196 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 227 /* 200 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 203 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 215 /* 207 */ MCD_OPC_CheckPredicate, 5, 203, 52, // Skip to: 13726 /* 211 */ MCD_OPC_Decode, 173, 12, 36, // Opcode: SRLV /* 215 */ MCD_OPC_FilterValue, 1, 195, 52, // Skip to: 13726 /* 219 */ MCD_OPC_CheckPredicate, 6, 191, 52, // Skip to: 13726 /* 223 */ MCD_OPC_Decode, 248, 10, 36, // Opcode: ROTRV /* 227 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 245 /* 231 */ MCD_OPC_CheckPredicate, 5, 179, 52, // Skip to: 13726 /* 235 */ MCD_OPC_CheckField, 6, 5, 0, 173, 52, // Skip to: 13726 /* 241 */ MCD_OPC_Decode, 152, 12, 36, // Opcode: SRAV /* 245 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 276 /* 249 */ MCD_OPC_ExtractField, 6, 15, // Inst{20-6} ... /* 252 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 264 /* 256 */ MCD_OPC_CheckPredicate, 5, 154, 52, // Skip to: 13726 /* 260 */ MCD_OPC_Decode, 136, 7, 61, // Opcode: JR /* 264 */ MCD_OPC_FilterValue, 16, 146, 52, // Skip to: 13726 /* 268 */ MCD_OPC_CheckPredicate, 9, 142, 52, // Skip to: 13726 /* 272 */ MCD_OPC_Decode, 141, 7, 61, // Opcode: JR_HB /* 276 */ MCD_OPC_FilterValue, 9, 39, 0, // Skip to: 319 /* 280 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 283 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 301 /* 287 */ MCD_OPC_CheckPredicate, 1, 123, 52, // Skip to: 13726 /* 291 */ MCD_OPC_CheckField, 16, 5, 0, 117, 52, // Skip to: 13726 /* 297 */ MCD_OPC_Decode, 249, 6, 62, // Opcode: JALR /* 301 */ MCD_OPC_FilterValue, 16, 109, 52, // Skip to: 13726 /* 305 */ MCD_OPC_CheckPredicate, 10, 105, 52, // Skip to: 13726 /* 309 */ MCD_OPC_CheckField, 16, 5, 0, 99, 52, // Skip to: 13726 /* 315 */ MCD_OPC_Decode, 128, 7, 62, // Opcode: JALR_HB /* 319 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 337 /* 323 */ MCD_OPC_CheckPredicate, 7, 87, 52, // Skip to: 13726 /* 327 */ MCD_OPC_CheckField, 6, 5, 0, 81, 52, // Skip to: 13726 /* 333 */ MCD_OPC_Decode, 143, 9, 63, // Opcode: MOVZ_I_I /* 337 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 355 /* 341 */ MCD_OPC_CheckPredicate, 7, 69, 52, // Skip to: 13726 /* 345 */ MCD_OPC_CheckField, 6, 5, 0, 63, 52, // Skip to: 13726 /* 351 */ MCD_OPC_Decode, 251, 8, 63, // Opcode: MOVN_I_I /* 355 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 367 /* 359 */ MCD_OPC_CheckPredicate, 5, 51, 52, // Skip to: 13726 /* 363 */ MCD_OPC_Decode, 132, 13, 64, // Opcode: SYSCALL /* 367 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 379 /* 371 */ MCD_OPC_CheckPredicate, 5, 39, 52, // Skip to: 13726 /* 375 */ MCD_OPC_Decode, 171, 2, 33, // Opcode: BREAK /* 379 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 391 /* 383 */ MCD_OPC_CheckPredicate, 10, 27, 52, // Skip to: 13726 /* 387 */ MCD_OPC_Decode, 129, 13, 65, // Opcode: SYNC /* 391 */ MCD_OPC_FilterValue, 16, 43, 0, // Skip to: 438 /* 395 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 398 */ MCD_OPC_FilterValue, 0, 12, 52, // Skip to: 13726 /* 402 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 405 */ MCD_OPC_FilterValue, 0, 5, 52, // Skip to: 13726 /* 409 */ MCD_OPC_ExtractField, 23, 3, // Inst{25-23} ... /* 412 */ MCD_OPC_FilterValue, 0, 254, 51, // Skip to: 13726 /* 416 */ MCD_OPC_CheckPredicate, 11, 10, 0, // Skip to: 430 /* 420 */ MCD_OPC_CheckField, 21, 2, 0, 4, 0, // Skip to: 430 /* 426 */ MCD_OPC_Decode, 186, 8, 66, // Opcode: MFHI /* 430 */ MCD_OPC_CheckPredicate, 12, 236, 51, // Skip to: 13726 /* 434 */ MCD_OPC_Decode, 189, 8, 67, // Opcode: MFHI_DSP /* 438 */ MCD_OPC_FilterValue, 17, 36, 0, // Skip to: 478 /* 442 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 445 */ MCD_OPC_FilterValue, 0, 221, 51, // Skip to: 13726 /* 449 */ MCD_OPC_ExtractField, 13, 8, // Inst{20-13} ... /* 452 */ MCD_OPC_FilterValue, 0, 214, 51, // Skip to: 13726 /* 456 */ MCD_OPC_CheckPredicate, 13, 10, 0, // Skip to: 470 /* 460 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 470 /* 466 */ MCD_OPC_Decode, 176, 9, 61, // Opcode: MTHI /* 470 */ MCD_OPC_CheckPredicate, 12, 196, 51, // Skip to: 13726 /* 474 */ MCD_OPC_Decode, 178, 9, 68, // Opcode: MTHI_DSP /* 478 */ MCD_OPC_FilterValue, 18, 43, 0, // Skip to: 525 /* 482 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 485 */ MCD_OPC_FilterValue, 0, 181, 51, // Skip to: 13726 /* 489 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 492 */ MCD_OPC_FilterValue, 0, 174, 51, // Skip to: 13726 /* 496 */ MCD_OPC_ExtractField, 23, 3, // Inst{25-23} ... /* 499 */ MCD_OPC_FilterValue, 0, 167, 51, // Skip to: 13726 /* 503 */ MCD_OPC_CheckPredicate, 11, 10, 0, // Skip to: 517 /* 507 */ MCD_OPC_CheckField, 21, 2, 0, 4, 0, // Skip to: 517 /* 513 */ MCD_OPC_Decode, 191, 8, 66, // Opcode: MFLO /* 517 */ MCD_OPC_CheckPredicate, 12, 149, 51, // Skip to: 13726 /* 521 */ MCD_OPC_Decode, 194, 8, 67, // Opcode: MFLO_DSP /* 525 */ MCD_OPC_FilterValue, 19, 36, 0, // Skip to: 565 /* 529 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 532 */ MCD_OPC_FilterValue, 0, 134, 51, // Skip to: 13726 /* 536 */ MCD_OPC_ExtractField, 13, 8, // Inst{20-13} ... /* 539 */ MCD_OPC_FilterValue, 0, 127, 51, // Skip to: 13726 /* 543 */ MCD_OPC_CheckPredicate, 13, 10, 0, // Skip to: 557 /* 547 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 557 /* 553 */ MCD_OPC_Decode, 181, 9, 61, // Opcode: MTLO /* 557 */ MCD_OPC_CheckPredicate, 12, 109, 51, // Skip to: 13726 /* 561 */ MCD_OPC_Decode, 183, 9, 69, // Opcode: MTLO_DSP /* 565 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 583 /* 569 */ MCD_OPC_CheckPredicate, 14, 97, 51, // Skip to: 13726 /* 573 */ MCD_OPC_CheckField, 8, 3, 0, 91, 51, // Skip to: 13726 /* 579 */ MCD_OPC_Decode, 194, 4, 70, // Opcode: DLSA /* 583 */ MCD_OPC_FilterValue, 24, 36, 0, // Skip to: 623 /* 587 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 590 */ MCD_OPC_FilterValue, 0, 76, 51, // Skip to: 13726 /* 594 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 597 */ MCD_OPC_FilterValue, 0, 69, 51, // Skip to: 13726 /* 601 */ MCD_OPC_CheckPredicate, 13, 10, 0, // Skip to: 615 /* 605 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 615 /* 611 */ MCD_OPC_Decode, 206, 9, 43, // Opcode: MULT /* 615 */ MCD_OPC_CheckPredicate, 12, 51, 51, // Skip to: 13726 /* 619 */ MCD_OPC_Decode, 208, 9, 71, // Opcode: MULT_DSP /* 623 */ MCD_OPC_FilterValue, 25, 36, 0, // Skip to: 663 /* 627 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 630 */ MCD_OPC_FilterValue, 0, 36, 51, // Skip to: 13726 /* 634 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 637 */ MCD_OPC_FilterValue, 0, 29, 51, // Skip to: 13726 /* 641 */ MCD_OPC_CheckPredicate, 13, 10, 0, // Skip to: 655 /* 645 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 655 /* 651 */ MCD_OPC_Decode, 210, 9, 43, // Opcode: MULTu /* 655 */ MCD_OPC_CheckPredicate, 12, 11, 51, // Skip to: 13726 /* 659 */ MCD_OPC_Decode, 207, 9, 71, // Opcode: MULTU_DSP /* 663 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 681 /* 667 */ MCD_OPC_CheckPredicate, 13, 255, 50, // Skip to: 13726 /* 671 */ MCD_OPC_CheckField, 6, 10, 0, 249, 50, // Skip to: 13726 /* 677 */ MCD_OPC_Decode, 162, 11, 43, // Opcode: SDIV /* 681 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 699 /* 685 */ MCD_OPC_CheckPredicate, 13, 237, 50, // Skip to: 13726 /* 689 */ MCD_OPC_CheckField, 6, 10, 0, 231, 50, // Skip to: 13726 /* 695 */ MCD_OPC_Decode, 222, 13, 43, // Opcode: UDIV /* 699 */ MCD_OPC_FilterValue, 32, 13, 0, // Skip to: 716 /* 703 */ MCD_OPC_CheckPredicate, 5, 219, 50, // Skip to: 13726 /* 707 */ MCD_OPC_CheckField, 6, 5, 0, 213, 50, // Skip to: 13726 /* 713 */ MCD_OPC_Decode, 25, 35, // Opcode: ADD /* 716 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 733 /* 720 */ MCD_OPC_CheckPredicate, 5, 202, 50, // Skip to: 13726 /* 724 */ MCD_OPC_CheckField, 6, 5, 0, 196, 50, // Skip to: 13726 /* 730 */ MCD_OPC_Decode, 77, 35, // Opcode: ADDu /* 733 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 751 /* 737 */ MCD_OPC_CheckPredicate, 5, 185, 50, // Skip to: 13726 /* 741 */ MCD_OPC_CheckField, 6, 5, 0, 179, 50, // Skip to: 13726 /* 747 */ MCD_OPC_Decode, 190, 12, 35, // Opcode: SUB /* 751 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 769 /* 755 */ MCD_OPC_CheckPredicate, 5, 167, 50, // Skip to: 13726 /* 759 */ MCD_OPC_CheckField, 6, 5, 0, 161, 50, // Skip to: 13726 /* 765 */ MCD_OPC_Decode, 230, 12, 35, // Opcode: SUBu /* 769 */ MCD_OPC_FilterValue, 36, 13, 0, // Skip to: 786 /* 773 */ MCD_OPC_CheckPredicate, 1, 149, 50, // Skip to: 13726 /* 777 */ MCD_OPC_CheckField, 6, 5, 0, 143, 50, // Skip to: 13726 /* 783 */ MCD_OPC_Decode, 83, 35, // Opcode: AND /* 786 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 804 /* 790 */ MCD_OPC_CheckPredicate, 1, 132, 50, // Skip to: 13726 /* 794 */ MCD_OPC_CheckField, 6, 5, 0, 126, 50, // Skip to: 13726 /* 800 */ MCD_OPC_Decode, 133, 10, 35, // Opcode: OR /* 804 */ MCD_OPC_FilterValue, 38, 14, 0, // Skip to: 822 /* 808 */ MCD_OPC_CheckPredicate, 1, 114, 50, // Skip to: 13726 /* 812 */ MCD_OPC_CheckField, 6, 5, 0, 108, 50, // Skip to: 13726 /* 818 */ MCD_OPC_Decode, 236, 13, 35, // Opcode: XOR /* 822 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 840 /* 826 */ MCD_OPC_CheckPredicate, 5, 96, 50, // Skip to: 13726 /* 830 */ MCD_OPC_CheckField, 6, 5, 0, 90, 50, // Skip to: 13726 /* 836 */ MCD_OPC_Decode, 250, 9, 35, // Opcode: NOR /* 840 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 858 /* 844 */ MCD_OPC_CheckPredicate, 5, 78, 50, // Skip to: 13726 /* 848 */ MCD_OPC_CheckField, 6, 5, 0, 72, 50, // Skip to: 13726 /* 854 */ MCD_OPC_Decode, 240, 11, 35, // Opcode: SLT /* 858 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 876 /* 862 */ MCD_OPC_CheckPredicate, 5, 60, 50, // Skip to: 13726 /* 866 */ MCD_OPC_CheckField, 6, 5, 0, 54, 50, // Skip to: 13726 /* 872 */ MCD_OPC_Decode, 249, 11, 35, // Opcode: SLTu /* 876 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 888 /* 880 */ MCD_OPC_CheckPredicate, 15, 42, 50, // Skip to: 13726 /* 884 */ MCD_OPC_Decode, 186, 13, 72, // Opcode: TGE /* 888 */ MCD_OPC_FilterValue, 49, 8, 0, // Skip to: 900 /* 892 */ MCD_OPC_CheckPredicate, 15, 30, 50, // Skip to: 13726 /* 896 */ MCD_OPC_Decode, 191, 13, 72, // Opcode: TGEU /* 900 */ MCD_OPC_FilterValue, 50, 8, 0, // Skip to: 912 /* 904 */ MCD_OPC_CheckPredicate, 15, 18, 50, // Skip to: 13726 /* 908 */ MCD_OPC_Decode, 202, 13, 72, // Opcode: TLT /* 912 */ MCD_OPC_FilterValue, 51, 8, 0, // Skip to: 924 /* 916 */ MCD_OPC_CheckPredicate, 15, 6, 50, // Skip to: 13726 /* 920 */ MCD_OPC_Decode, 206, 13, 72, // Opcode: TLTU /* 924 */ MCD_OPC_FilterValue, 52, 8, 0, // Skip to: 936 /* 928 */ MCD_OPC_CheckPredicate, 15, 250, 49, // Skip to: 13726 /* 932 */ MCD_OPC_Decode, 182, 13, 72, // Opcode: TEQ /* 936 */ MCD_OPC_FilterValue, 54, 242, 49, // Skip to: 13726 /* 940 */ MCD_OPC_CheckPredicate, 15, 238, 49, // Skip to: 13726 /* 944 */ MCD_OPC_Decode, 209, 13, 72, // Opcode: TNE /* 948 */ MCD_OPC_FilterValue, 1, 201, 0, // Skip to: 1153 /* 952 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 955 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 967 /* 959 */ MCD_OPC_CheckPredicate, 5, 219, 49, // Skip to: 13726 /* 963 */ MCD_OPC_Decode, 131, 2, 73, // Opcode: BLTZ /* 967 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 979 /* 971 */ MCD_OPC_CheckPredicate, 5, 207, 49, // Skip to: 13726 /* 975 */ MCD_OPC_Decode, 217, 1, 73, // Opcode: BGEZ /* 979 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 991 /* 983 */ MCD_OPC_CheckPredicate, 16, 195, 49, // Skip to: 13726 /* 987 */ MCD_OPC_Decode, 139, 2, 73, // Opcode: BLTZL /* 991 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1003 /* 995 */ MCD_OPC_CheckPredicate, 16, 183, 49, // Skip to: 13726 /* 999 */ MCD_OPC_Decode, 225, 1, 73, // Opcode: BGEZL /* 1003 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1015 /* 1007 */ MCD_OPC_CheckPredicate, 16, 171, 49, // Skip to: 13726 /* 1011 */ MCD_OPC_Decode, 187, 13, 74, // Opcode: TGEI /* 1015 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1027 /* 1019 */ MCD_OPC_CheckPredicate, 16, 159, 49, // Skip to: 13726 /* 1023 */ MCD_OPC_Decode, 188, 13, 74, // Opcode: TGEIU /* 1027 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1039 /* 1031 */ MCD_OPC_CheckPredicate, 16, 147, 49, // Skip to: 13726 /* 1035 */ MCD_OPC_Decode, 203, 13, 74, // Opcode: TLTI /* 1039 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1051 /* 1043 */ MCD_OPC_CheckPredicate, 16, 135, 49, // Skip to: 13726 /* 1047 */ MCD_OPC_Decode, 221, 13, 74, // Opcode: TTLTIU /* 1051 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 1063 /* 1055 */ MCD_OPC_CheckPredicate, 16, 123, 49, // Skip to: 13726 /* 1059 */ MCD_OPC_Decode, 183, 13, 74, // Opcode: TEQI /* 1063 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 1075 /* 1067 */ MCD_OPC_CheckPredicate, 16, 111, 49, // Skip to: 13726 /* 1071 */ MCD_OPC_Decode, 210, 13, 74, // Opcode: TNEI /* 1075 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1087 /* 1079 */ MCD_OPC_CheckPredicate, 13, 99, 49, // Skip to: 13726 /* 1083 */ MCD_OPC_Decode, 133, 2, 73, // Opcode: BLTZAL /* 1087 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1099 /* 1091 */ MCD_OPC_CheckPredicate, 13, 87, 49, // Skip to: 13726 /* 1095 */ MCD_OPC_Decode, 219, 1, 73, // Opcode: BGEZAL /* 1099 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1111 /* 1103 */ MCD_OPC_CheckPredicate, 16, 75, 49, // Skip to: 13726 /* 1107 */ MCD_OPC_Decode, 135, 2, 73, // Opcode: BLTZALL /* 1111 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 1123 /* 1115 */ MCD_OPC_CheckPredicate, 16, 63, 49, // Skip to: 13726 /* 1119 */ MCD_OPC_Decode, 221, 1, 73, // Opcode: BGEZALL /* 1123 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 1141 /* 1127 */ MCD_OPC_CheckPredicate, 12, 51, 49, // Skip to: 13726 /* 1131 */ MCD_OPC_CheckField, 21, 5, 0, 45, 49, // Skip to: 13726 /* 1137 */ MCD_OPC_Decode, 169, 2, 75, // Opcode: BPOSGE32 /* 1141 */ MCD_OPC_FilterValue, 31, 37, 49, // Skip to: 13726 /* 1145 */ MCD_OPC_CheckPredicate, 6, 33, 49, // Skip to: 13726 /* 1149 */ MCD_OPC_Decode, 130, 13, 76, // Opcode: SYNCI /* 1153 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1165 /* 1157 */ MCD_OPC_CheckPredicate, 10, 21, 49, // Skip to: 13726 /* 1161 */ MCD_OPC_Decode, 247, 6, 77, // Opcode: J /* 1165 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1177 /* 1169 */ MCD_OPC_CheckPredicate, 5, 9, 49, // Skip to: 13726 /* 1173 */ MCD_OPC_Decode, 248, 6, 77, // Opcode: JAL /* 1177 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 1189 /* 1181 */ MCD_OPC_CheckPredicate, 5, 253, 48, // Skip to: 13726 /* 1185 */ MCD_OPC_Decode, 206, 1, 78, // Opcode: BEQ /* 1189 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 1201 /* 1193 */ MCD_OPC_CheckPredicate, 5, 241, 48, // Skip to: 13726 /* 1197 */ MCD_OPC_Decode, 145, 2, 78, // Opcode: BNE /* 1201 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 1219 /* 1205 */ MCD_OPC_CheckPredicate, 5, 229, 48, // Skip to: 13726 /* 1209 */ MCD_OPC_CheckField, 16, 5, 0, 223, 48, // Skip to: 13726 /* 1215 */ MCD_OPC_Decode, 251, 1, 73, // Opcode: BLEZ /* 1219 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 1237 /* 1223 */ MCD_OPC_CheckPredicate, 5, 211, 48, // Skip to: 13726 /* 1227 */ MCD_OPC_CheckField, 16, 5, 0, 205, 48, // Skip to: 13726 /* 1233 */ MCD_OPC_Decode, 227, 1, 73, // Opcode: BGTZ /* 1237 */ MCD_OPC_FilterValue, 8, 7, 0, // Skip to: 1248 /* 1241 */ MCD_OPC_CheckPredicate, 13, 193, 48, // Skip to: 13726 /* 1245 */ MCD_OPC_Decode, 73, 79, // Opcode: ADDi /* 1248 */ MCD_OPC_FilterValue, 9, 7, 0, // Skip to: 1259 /* 1252 */ MCD_OPC_CheckPredicate, 1, 182, 48, // Skip to: 13726 /* 1256 */ MCD_OPC_Decode, 75, 79, // Opcode: ADDiu /* 1259 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1271 /* 1263 */ MCD_OPC_CheckPredicate, 5, 171, 48, // Skip to: 13726 /* 1267 */ MCD_OPC_Decode, 243, 11, 79, // Opcode: SLTi /* 1271 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1283 /* 1275 */ MCD_OPC_CheckPredicate, 5, 159, 48, // Skip to: 13726 /* 1279 */ MCD_OPC_Decode, 246, 11, 79, // Opcode: SLTiu /* 1283 */ MCD_OPC_FilterValue, 12, 7, 0, // Skip to: 1294 /* 1287 */ MCD_OPC_CheckPredicate, 1, 147, 48, // Skip to: 13726 /* 1291 */ MCD_OPC_Decode, 93, 80, // Opcode: ANDi /* 1294 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 1306 /* 1298 */ MCD_OPC_CheckPredicate, 5, 136, 48, // Skip to: 13726 /* 1302 */ MCD_OPC_Decode, 142, 10, 80, // Opcode: ORi /* 1306 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 1318 /* 1310 */ MCD_OPC_CheckPredicate, 5, 124, 48, // Skip to: 13726 /* 1314 */ MCD_OPC_Decode, 245, 13, 80, // Opcode: XORi /* 1318 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 1336 /* 1322 */ MCD_OPC_CheckPredicate, 5, 112, 48, // Skip to: 13726 /* 1326 */ MCD_OPC_CheckField, 21, 5, 0, 106, 48, // Skip to: 13726 /* 1332 */ MCD_OPC_Decode, 210, 7, 52, // Opcode: LUi /* 1336 */ MCD_OPC_FilterValue, 16, 220, 0, // Skip to: 1560 /* 1340 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 1343 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1361 /* 1347 */ MCD_OPC_CheckPredicate, 10, 87, 48, // Skip to: 13726 /* 1351 */ MCD_OPC_CheckField, 3, 8, 0, 81, 48, // Skip to: 13726 /* 1357 */ MCD_OPC_Decode, 179, 8, 81, // Opcode: MFC0 /* 1361 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 1379 /* 1365 */ MCD_OPC_CheckPredicate, 10, 69, 48, // Skip to: 13726 /* 1369 */ MCD_OPC_CheckField, 3, 8, 0, 63, 48, // Skip to: 13726 /* 1375 */ MCD_OPC_Decode, 169, 9, 81, // Opcode: MTC0 /* 1379 */ MCD_OPC_FilterValue, 8, 51, 0, // Skip to: 1434 /* 1383 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 1386 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1398 /* 1390 */ MCD_OPC_CheckPredicate, 13, 44, 48, // Skip to: 13726 /* 1394 */ MCD_OPC_Decode, 176, 1, 82, // Opcode: BC0F /* 1398 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1410 /* 1402 */ MCD_OPC_CheckPredicate, 13, 32, 48, // Skip to: 13726 /* 1406 */ MCD_OPC_Decode, 178, 1, 82, // Opcode: BC0T /* 1410 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1422 /* 1414 */ MCD_OPC_CheckPredicate, 13, 20, 48, // Skip to: 13726 /* 1418 */ MCD_OPC_Decode, 177, 1, 82, // Opcode: BC0FL /* 1422 */ MCD_OPC_FilterValue, 3, 12, 48, // Skip to: 13726 /* 1426 */ MCD_OPC_CheckPredicate, 13, 8, 48, // Skip to: 13726 /* 1430 */ MCD_OPC_Decode, 179, 1, 82, // Opcode: BC0TL /* 1434 */ MCD_OPC_FilterValue, 11, 31, 0, // Skip to: 1469 /* 1438 */ MCD_OPC_ExtractField, 0, 16, // Inst{15-0} ... /* 1441 */ MCD_OPC_FilterValue, 128, 192, 1, 8, 0, // Skip to: 1455 /* 1447 */ MCD_OPC_CheckPredicate, 6, 243, 47, // Skip to: 13726 /* 1451 */ MCD_OPC_Decode, 179, 4, 42, // Opcode: DI /* 1455 */ MCD_OPC_FilterValue, 160, 192, 1, 233, 47, // Skip to: 13726 /* 1461 */ MCD_OPC_CheckPredicate, 6, 229, 47, // Skip to: 13726 /* 1465 */ MCD_OPC_Decode, 141, 5, 42, // Opcode: EI /* 1469 */ MCD_OPC_FilterValue, 16, 221, 47, // Skip to: 13726 /* 1473 */ MCD_OPC_ExtractField, 0, 21, // Inst{20-0} ... /* 1476 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1488 /* 1480 */ MCD_OPC_CheckPredicate, 5, 210, 47, // Skip to: 13726 /* 1484 */ MCD_OPC_Decode, 196, 13, 0, // Opcode: TLBR /* 1488 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1500 /* 1492 */ MCD_OPC_CheckPredicate, 5, 198, 47, // Skip to: 13726 /* 1496 */ MCD_OPC_Decode, 198, 13, 0, // Opcode: TLBWI /* 1500 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 1512 /* 1504 */ MCD_OPC_CheckPredicate, 5, 186, 47, // Skip to: 13726 /* 1508 */ MCD_OPC_Decode, 200, 13, 0, // Opcode: TLBWR /* 1512 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1524 /* 1516 */ MCD_OPC_CheckPredicate, 5, 174, 47, // Skip to: 13726 /* 1520 */ MCD_OPC_Decode, 194, 13, 0, // Opcode: TLBP /* 1524 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1536 /* 1528 */ MCD_OPC_CheckPredicate, 17, 162, 47, // Skip to: 13726 /* 1532 */ MCD_OPC_Decode, 143, 5, 0, // Opcode: ERET /* 1536 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 1548 /* 1540 */ MCD_OPC_CheckPredicate, 10, 150, 47, // Skip to: 13726 /* 1544 */ MCD_OPC_Decode, 174, 4, 0, // Opcode: DERET /* 1548 */ MCD_OPC_FilterValue, 32, 142, 47, // Skip to: 13726 /* 1552 */ MCD_OPC_CheckPredicate, 18, 138, 47, // Skip to: 13726 /* 1556 */ MCD_OPC_Decode, 231, 13, 0, // Opcode: WAIT /* 1560 */ MCD_OPC_FilterValue, 17, 21, 6, // Skip to: 3121 /* 1564 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 1567 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1585 /* 1571 */ MCD_OPC_CheckPredicate, 5, 119, 47, // Skip to: 13726 /* 1575 */ MCD_OPC_CheckField, 0, 11, 0, 113, 47, // Skip to: 13726 /* 1581 */ MCD_OPC_Decode, 180, 8, 83, // Opcode: MFC1 /* 1585 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 1603 /* 1589 */ MCD_OPC_CheckPredicate, 19, 101, 47, // Skip to: 13726 /* 1593 */ MCD_OPC_CheckField, 0, 11, 0, 95, 47, // Skip to: 13726 /* 1599 */ MCD_OPC_Decode, 197, 4, 84, // Opcode: DMFC1 /* 1603 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 1621 /* 1607 */ MCD_OPC_CheckPredicate, 5, 83, 47, // Skip to: 13726 /* 1611 */ MCD_OPC_CheckField, 0, 11, 0, 77, 47, // Skip to: 13726 /* 1617 */ MCD_OPC_Decode, 238, 2, 85, // Opcode: CFC1 /* 1621 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 1639 /* 1625 */ MCD_OPC_CheckPredicate, 20, 65, 47, // Skip to: 13726 /* 1629 */ MCD_OPC_CheckField, 0, 11, 0, 59, 47, // Skip to: 13726 /* 1635 */ MCD_OPC_Decode, 183, 8, 86, // Opcode: MFHC1_D32 /* 1639 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 1657 /* 1643 */ MCD_OPC_CheckPredicate, 5, 47, 47, // Skip to: 13726 /* 1647 */ MCD_OPC_CheckField, 0, 11, 0, 41, 47, // Skip to: 13726 /* 1653 */ MCD_OPC_Decode, 170, 9, 87, // Opcode: MTC1 /* 1657 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 1675 /* 1661 */ MCD_OPC_CheckPredicate, 19, 29, 47, // Skip to: 13726 /* 1665 */ MCD_OPC_CheckField, 0, 11, 0, 23, 47, // Skip to: 13726 /* 1671 */ MCD_OPC_Decode, 202, 4, 88, // Opcode: DMTC1 /* 1675 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 1693 /* 1679 */ MCD_OPC_CheckPredicate, 5, 11, 47, // Skip to: 13726 /* 1683 */ MCD_OPC_CheckField, 0, 11, 0, 5, 47, // Skip to: 13726 /* 1689 */ MCD_OPC_Decode, 210, 3, 89, // Opcode: CTC1 /* 1693 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 1711 /* 1697 */ MCD_OPC_CheckPredicate, 20, 249, 46, // Skip to: 13726 /* 1701 */ MCD_OPC_CheckField, 0, 11, 0, 243, 46, // Skip to: 13726 /* 1707 */ MCD_OPC_Decode, 173, 9, 90, // Opcode: MTHC1_D32 /* 1711 */ MCD_OPC_FilterValue, 8, 51, 0, // Skip to: 1766 /* 1715 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 1718 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1730 /* 1722 */ MCD_OPC_CheckPredicate, 13, 224, 46, // Skip to: 13726 /* 1726 */ MCD_OPC_Decode, 181, 1, 91, // Opcode: BC1F /* 1730 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1742 /* 1734 */ MCD_OPC_CheckPredicate, 13, 212, 46, // Skip to: 13726 /* 1738 */ MCD_OPC_Decode, 185, 1, 91, // Opcode: BC1T /* 1742 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1754 /* 1746 */ MCD_OPC_CheckPredicate, 16, 200, 46, // Skip to: 13726 /* 1750 */ MCD_OPC_Decode, 182, 1, 91, // Opcode: BC1FL /* 1754 */ MCD_OPC_FilterValue, 3, 192, 46, // Skip to: 13726 /* 1758 */ MCD_OPC_CheckPredicate, 16, 188, 46, // Skip to: 13726 /* 1762 */ MCD_OPC_Decode, 186, 1, 91, // Opcode: BC1TL /* 1766 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1778 /* 1770 */ MCD_OPC_CheckPredicate, 8, 176, 46, // Skip to: 13726 /* 1774 */ MCD_OPC_Decode, 192, 2, 92, // Opcode: BZ_V /* 1778 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 1790 /* 1782 */ MCD_OPC_CheckPredicate, 8, 164, 46, // Skip to: 13726 /* 1786 */ MCD_OPC_Decode, 166, 2, 92, // Opcode: BNZ_V /* 1790 */ MCD_OPC_FilterValue, 16, 80, 2, // Skip to: 2386 /* 1794 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 1797 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1809 /* 1801 */ MCD_OPC_CheckPredicate, 5, 145, 46, // Skip to: 13726 /* 1805 */ MCD_OPC_Decode, 174, 5, 93, // Opcode: FADD_S /* 1809 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1821 /* 1813 */ MCD_OPC_CheckPredicate, 5, 133, 46, // Skip to: 13726 /* 1817 */ MCD_OPC_Decode, 176, 6, 93, // Opcode: FSUB_S /* 1821 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1833 /* 1825 */ MCD_OPC_CheckPredicate, 5, 121, 46, // Skip to: 13726 /* 1829 */ MCD_OPC_Decode, 139, 6, 93, // Opcode: FMUL_S /* 1833 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1845 /* 1837 */ MCD_OPC_CheckPredicate, 5, 109, 46, // Skip to: 13726 /* 1841 */ MCD_OPC_Decode, 210, 5, 93, // Opcode: FDIV_S /* 1845 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 1863 /* 1849 */ MCD_OPC_CheckPredicate, 15, 97, 46, // Skip to: 13726 /* 1853 */ MCD_OPC_CheckField, 16, 5, 0, 91, 46, // Skip to: 13726 /* 1859 */ MCD_OPC_Decode, 169, 6, 94, // Opcode: FSQRT_S /* 1863 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 1881 /* 1867 */ MCD_OPC_CheckPredicate, 5, 79, 46, // Skip to: 13726 /* 1871 */ MCD_OPC_CheckField, 16, 5, 0, 73, 46, // Skip to: 13726 /* 1877 */ MCD_OPC_Decode, 167, 5, 94, // Opcode: FABS_S /* 1881 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 1899 /* 1885 */ MCD_OPC_CheckPredicate, 5, 61, 46, // Skip to: 13726 /* 1889 */ MCD_OPC_CheckField, 16, 5, 0, 55, 46, // Skip to: 13726 /* 1895 */ MCD_OPC_Decode, 131, 6, 94, // Opcode: FMOV_S /* 1899 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 1917 /* 1903 */ MCD_OPC_CheckPredicate, 5, 43, 46, // Skip to: 13726 /* 1907 */ MCD_OPC_CheckField, 16, 5, 0, 37, 46, // Skip to: 13726 /* 1913 */ MCD_OPC_Decode, 145, 6, 94, // Opcode: FNEG_S /* 1917 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 1935 /* 1921 */ MCD_OPC_CheckPredicate, 15, 25, 46, // Skip to: 13726 /* 1925 */ MCD_OPC_CheckField, 16, 5, 0, 19, 46, // Skip to: 13726 /* 1931 */ MCD_OPC_Decode, 128, 11, 94, // Opcode: ROUND_W_S /* 1935 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 1953 /* 1939 */ MCD_OPC_CheckPredicate, 15, 7, 46, // Skip to: 13726 /* 1943 */ MCD_OPC_CheckField, 16, 5, 0, 1, 46, // Skip to: 13726 /* 1949 */ MCD_OPC_Decode, 219, 13, 94, // Opcode: TRUNC_W_S /* 1953 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 1971 /* 1957 */ MCD_OPC_CheckPredicate, 15, 245, 45, // Skip to: 13726 /* 1961 */ MCD_OPC_CheckField, 16, 5, 0, 239, 45, // Skip to: 13726 /* 1967 */ MCD_OPC_Decode, 228, 2, 94, // Opcode: CEIL_W_S /* 1971 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 1989 /* 1975 */ MCD_OPC_CheckPredicate, 15, 227, 45, // Skip to: 13726 /* 1979 */ MCD_OPC_CheckField, 16, 5, 0, 221, 45, // Skip to: 13726 /* 1985 */ MCD_OPC_Decode, 244, 5, 94, // Opcode: FLOOR_W_S /* 1989 */ MCD_OPC_FilterValue, 17, 27, 0, // Skip to: 2020 /* 1993 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 1996 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2008 /* 2000 */ MCD_OPC_CheckPredicate, 7, 202, 45, // Skip to: 13726 /* 2004 */ MCD_OPC_Decode, 242, 8, 95, // Opcode: MOVF_S /* 2008 */ MCD_OPC_FilterValue, 1, 194, 45, // Skip to: 13726 /* 2012 */ MCD_OPC_CheckPredicate, 7, 190, 45, // Skip to: 13726 /* 2016 */ MCD_OPC_Decode, 134, 9, 95, // Opcode: MOVT_S /* 2020 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 2032 /* 2024 */ MCD_OPC_CheckPredicate, 7, 178, 45, // Skip to: 13726 /* 2028 */ MCD_OPC_Decode, 146, 9, 96, // Opcode: MOVZ_I_S /* 2032 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 2044 /* 2036 */ MCD_OPC_CheckPredicate, 7, 166, 45, // Skip to: 13726 /* 2040 */ MCD_OPC_Decode, 254, 8, 96, // Opcode: MOVN_I_S /* 2044 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 2062 /* 2048 */ MCD_OPC_CheckPredicate, 21, 154, 45, // Skip to: 13726 /* 2052 */ MCD_OPC_CheckField, 16, 5, 0, 148, 45, // Skip to: 13726 /* 2058 */ MCD_OPC_Decode, 213, 3, 97, // Opcode: CVT_D32_S /* 2062 */ MCD_OPC_FilterValue, 36, 14, 0, // Skip to: 2080 /* 2066 */ MCD_OPC_CheckPredicate, 5, 136, 45, // Skip to: 13726 /* 2070 */ MCD_OPC_CheckField, 16, 5, 0, 130, 45, // Skip to: 13726 /* 2076 */ MCD_OPC_Decode, 233, 3, 94, // Opcode: CVT_W_S /* 2080 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 2098 /* 2084 */ MCD_OPC_CheckPredicate, 22, 118, 45, // Skip to: 13726 /* 2088 */ MCD_OPC_CheckField, 16, 5, 0, 112, 45, // Skip to: 13726 /* 2094 */ MCD_OPC_Decode, 222, 3, 98, // Opcode: CVT_L_S /* 2098 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 2116 /* 2102 */ MCD_OPC_CheckPredicate, 13, 100, 45, // Skip to: 13726 /* 2106 */ MCD_OPC_CheckField, 6, 5, 0, 94, 45, // Skip to: 13726 /* 2112 */ MCD_OPC_Decode, 240, 3, 99, // Opcode: C_F_S /* 2116 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 2134 /* 2120 */ MCD_OPC_CheckPredicate, 13, 82, 45, // Skip to: 13726 /* 2124 */ MCD_OPC_CheckField, 6, 5, 0, 76, 45, // Skip to: 13726 /* 2130 */ MCD_OPC_Decode, 154, 4, 99, // Opcode: C_UN_S /* 2134 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 2152 /* 2138 */ MCD_OPC_CheckPredicate, 13, 64, 45, // Skip to: 13726 /* 2142 */ MCD_OPC_CheckField, 6, 5, 0, 58, 45, // Skip to: 13726 /* 2148 */ MCD_OPC_Decode, 237, 3, 99, // Opcode: C_EQ_S /* 2152 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 2170 /* 2156 */ MCD_OPC_CheckPredicate, 13, 46, 45, // Skip to: 13726 /* 2160 */ MCD_OPC_CheckField, 6, 5, 0, 40, 45, // Skip to: 13726 /* 2166 */ MCD_OPC_Decode, 145, 4, 99, // Opcode: C_UEQ_S /* 2170 */ MCD_OPC_FilterValue, 52, 14, 0, // Skip to: 2188 /* 2174 */ MCD_OPC_CheckPredicate, 13, 28, 45, // Skip to: 13726 /* 2178 */ MCD_OPC_CheckField, 6, 5, 0, 22, 45, // Skip to: 13726 /* 2184 */ MCD_OPC_Decode, 136, 4, 99, // Opcode: C_OLT_S /* 2188 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 2206 /* 2192 */ MCD_OPC_CheckPredicate, 13, 10, 45, // Skip to: 13726 /* 2196 */ MCD_OPC_CheckField, 6, 5, 0, 4, 45, // Skip to: 13726 /* 2202 */ MCD_OPC_Decode, 151, 4, 99, // Opcode: C_ULT_S /* 2206 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 2224 /* 2210 */ MCD_OPC_CheckPredicate, 13, 248, 44, // Skip to: 13726 /* 2214 */ MCD_OPC_CheckField, 6, 5, 0, 242, 44, // Skip to: 13726 /* 2220 */ MCD_OPC_Decode, 133, 4, 99, // Opcode: C_OLE_S /* 2224 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 2242 /* 2228 */ MCD_OPC_CheckPredicate, 13, 230, 44, // Skip to: 13726 /* 2232 */ MCD_OPC_CheckField, 6, 5, 0, 224, 44, // Skip to: 13726 /* 2238 */ MCD_OPC_Decode, 148, 4, 99, // Opcode: C_ULE_S /* 2242 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 2260 /* 2246 */ MCD_OPC_CheckPredicate, 13, 212, 44, // Skip to: 13726 /* 2250 */ MCD_OPC_CheckField, 6, 5, 0, 206, 44, // Skip to: 13726 /* 2256 */ MCD_OPC_Decode, 142, 4, 99, // Opcode: C_SF_S /* 2260 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 2278 /* 2264 */ MCD_OPC_CheckPredicate, 13, 194, 44, // Skip to: 13726 /* 2268 */ MCD_OPC_CheckField, 6, 5, 0, 188, 44, // Skip to: 13726 /* 2274 */ MCD_OPC_Decode, 252, 3, 99, // Opcode: C_NGLE_S /* 2278 */ MCD_OPC_FilterValue, 58, 14, 0, // Skip to: 2296 /* 2282 */ MCD_OPC_CheckPredicate, 13, 176, 44, // Skip to: 13726 /* 2286 */ MCD_OPC_CheckField, 6, 5, 0, 170, 44, // Skip to: 13726 /* 2292 */ MCD_OPC_Decode, 139, 4, 99, // Opcode: C_SEQ_S /* 2296 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 2314 /* 2300 */ MCD_OPC_CheckPredicate, 13, 158, 44, // Skip to: 13726 /* 2304 */ MCD_OPC_CheckField, 6, 5, 0, 152, 44, // Skip to: 13726 /* 2310 */ MCD_OPC_Decode, 255, 3, 99, // Opcode: C_NGL_S /* 2314 */ MCD_OPC_FilterValue, 60, 14, 0, // Skip to: 2332 /* 2318 */ MCD_OPC_CheckPredicate, 13, 140, 44, // Skip to: 13726 /* 2322 */ MCD_OPC_CheckField, 6, 5, 0, 134, 44, // Skip to: 13726 /* 2328 */ MCD_OPC_Decode, 246, 3, 99, // Opcode: C_LT_S /* 2332 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 2350 /* 2336 */ MCD_OPC_CheckPredicate, 13, 122, 44, // Skip to: 13726 /* 2340 */ MCD_OPC_CheckField, 6, 5, 0, 116, 44, // Skip to: 13726 /* 2346 */ MCD_OPC_Decode, 249, 3, 99, // Opcode: C_NGE_S /* 2350 */ MCD_OPC_FilterValue, 62, 14, 0, // Skip to: 2368 /* 2354 */ MCD_OPC_CheckPredicate, 13, 104, 44, // Skip to: 13726 /* 2358 */ MCD_OPC_CheckField, 6, 5, 0, 98, 44, // Skip to: 13726 /* 2364 */ MCD_OPC_Decode, 243, 3, 99, // Opcode: C_LE_S /* 2368 */ MCD_OPC_FilterValue, 63, 90, 44, // Skip to: 13726 /* 2372 */ MCD_OPC_CheckPredicate, 13, 86, 44, // Skip to: 13726 /* 2376 */ MCD_OPC_CheckField, 6, 5, 0, 80, 44, // Skip to: 13726 /* 2382 */ MCD_OPC_Decode, 130, 4, 99, // Opcode: C_NGT_S /* 2386 */ MCD_OPC_FilterValue, 17, 80, 2, // Skip to: 2982 /* 2390 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 2393 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2405 /* 2397 */ MCD_OPC_CheckPredicate, 21, 61, 44, // Skip to: 13726 /* 2401 */ MCD_OPC_Decode, 171, 5, 100, // Opcode: FADD_D32 /* 2405 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 2417 /* 2409 */ MCD_OPC_CheckPredicate, 21, 49, 44, // Skip to: 13726 /* 2413 */ MCD_OPC_Decode, 173, 6, 100, // Opcode: FSUB_D32 /* 2417 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 2429 /* 2421 */ MCD_OPC_CheckPredicate, 21, 37, 44, // Skip to: 13726 /* 2425 */ MCD_OPC_Decode, 136, 6, 100, // Opcode: FMUL_D32 /* 2429 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2441 /* 2433 */ MCD_OPC_CheckPredicate, 21, 25, 44, // Skip to: 13726 /* 2437 */ MCD_OPC_Decode, 207, 5, 100, // Opcode: FDIV_D32 /* 2441 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 2459 /* 2445 */ MCD_OPC_CheckPredicate, 23, 13, 44, // Skip to: 13726 /* 2449 */ MCD_OPC_CheckField, 16, 5, 0, 7, 44, // Skip to: 13726 /* 2455 */ MCD_OPC_Decode, 166, 6, 101, // Opcode: FSQRT_D32 /* 2459 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 2477 /* 2463 */ MCD_OPC_CheckPredicate, 21, 251, 43, // Skip to: 13726 /* 2467 */ MCD_OPC_CheckField, 16, 5, 0, 245, 43, // Skip to: 13726 /* 2473 */ MCD_OPC_Decode, 164, 5, 101, // Opcode: FABS_D32 /* 2477 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 2495 /* 2481 */ MCD_OPC_CheckPredicate, 21, 233, 43, // Skip to: 13726 /* 2485 */ MCD_OPC_CheckField, 16, 5, 0, 227, 43, // Skip to: 13726 /* 2491 */ MCD_OPC_Decode, 128, 6, 101, // Opcode: FMOV_D32 /* 2495 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 2513 /* 2499 */ MCD_OPC_CheckPredicate, 21, 215, 43, // Skip to: 13726 /* 2503 */ MCD_OPC_CheckField, 16, 5, 0, 209, 43, // Skip to: 13726 /* 2509 */ MCD_OPC_Decode, 142, 6, 101, // Opcode: FNEG_D32 /* 2513 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 2531 /* 2517 */ MCD_OPC_CheckPredicate, 23, 197, 43, // Skip to: 13726 /* 2521 */ MCD_OPC_CheckField, 16, 5, 0, 191, 43, // Skip to: 13726 /* 2527 */ MCD_OPC_Decode, 253, 10, 102, // Opcode: ROUND_W_D32 /* 2531 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 2549 /* 2535 */ MCD_OPC_CheckPredicate, 23, 179, 43, // Skip to: 13726 /* 2539 */ MCD_OPC_CheckField, 16, 5, 0, 173, 43, // Skip to: 13726 /* 2545 */ MCD_OPC_Decode, 216, 13, 102, // Opcode: TRUNC_W_D32 /* 2549 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 2567 /* 2553 */ MCD_OPC_CheckPredicate, 23, 161, 43, // Skip to: 13726 /* 2557 */ MCD_OPC_CheckField, 16, 5, 0, 155, 43, // Skip to: 13726 /* 2563 */ MCD_OPC_Decode, 225, 2, 102, // Opcode: CEIL_W_D32 /* 2567 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 2585 /* 2571 */ MCD_OPC_CheckPredicate, 23, 143, 43, // Skip to: 13726 /* 2575 */ MCD_OPC_CheckField, 16, 5, 0, 137, 43, // Skip to: 13726 /* 2581 */ MCD_OPC_Decode, 241, 5, 102, // Opcode: FLOOR_W_D32 /* 2585 */ MCD_OPC_FilterValue, 17, 27, 0, // Skip to: 2616 /* 2589 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 2592 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2604 /* 2596 */ MCD_OPC_CheckPredicate, 24, 118, 43, // Skip to: 13726 /* 2600 */ MCD_OPC_Decode, 236, 8, 103, // Opcode: MOVF_D32 /* 2604 */ MCD_OPC_FilterValue, 1, 110, 43, // Skip to: 13726 /* 2608 */ MCD_OPC_CheckPredicate, 24, 106, 43, // Skip to: 13726 /* 2612 */ MCD_OPC_Decode, 128, 9, 103, // Opcode: MOVT_D32 /* 2616 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 2628 /* 2620 */ MCD_OPC_CheckPredicate, 24, 94, 43, // Skip to: 13726 /* 2624 */ MCD_OPC_Decode, 140, 9, 104, // Opcode: MOVZ_I_D32 /* 2628 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 2640 /* 2632 */ MCD_OPC_CheckPredicate, 24, 82, 43, // Skip to: 13726 /* 2636 */ MCD_OPC_Decode, 248, 8, 104, // Opcode: MOVN_I_D32 /* 2640 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 2658 /* 2644 */ MCD_OPC_CheckPredicate, 21, 70, 43, // Skip to: 13726 /* 2648 */ MCD_OPC_CheckField, 16, 5, 0, 64, 43, // Skip to: 13726 /* 2654 */ MCD_OPC_Decode, 224, 3, 102, // Opcode: CVT_S_D32 /* 2658 */ MCD_OPC_FilterValue, 36, 14, 0, // Skip to: 2676 /* 2662 */ MCD_OPC_CheckPredicate, 21, 52, 43, // Skip to: 13726 /* 2666 */ MCD_OPC_CheckField, 16, 5, 0, 46, 43, // Skip to: 13726 /* 2672 */ MCD_OPC_Decode, 230, 3, 102, // Opcode: CVT_W_D32 /* 2676 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 2694 /* 2680 */ MCD_OPC_CheckPredicate, 22, 34, 43, // Skip to: 13726 /* 2684 */ MCD_OPC_CheckField, 16, 5, 0, 28, 43, // Skip to: 13726 /* 2690 */ MCD_OPC_Decode, 220, 3, 105, // Opcode: CVT_L_D64 /* 2694 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 2712 /* 2698 */ MCD_OPC_CheckPredicate, 25, 16, 43, // Skip to: 13726 /* 2702 */ MCD_OPC_CheckField, 6, 5, 0, 10, 43, // Skip to: 13726 /* 2708 */ MCD_OPC_Decode, 238, 3, 106, // Opcode: C_F_D32 /* 2712 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 2730 /* 2716 */ MCD_OPC_CheckPredicate, 25, 254, 42, // Skip to: 13726 /* 2720 */ MCD_OPC_CheckField, 6, 5, 0, 248, 42, // Skip to: 13726 /* 2726 */ MCD_OPC_Decode, 152, 4, 106, // Opcode: C_UN_D32 /* 2730 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 2748 /* 2734 */ MCD_OPC_CheckPredicate, 25, 236, 42, // Skip to: 13726 /* 2738 */ MCD_OPC_CheckField, 6, 5, 0, 230, 42, // Skip to: 13726 /* 2744 */ MCD_OPC_Decode, 235, 3, 106, // Opcode: C_EQ_D32 /* 2748 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 2766 /* 2752 */ MCD_OPC_CheckPredicate, 25, 218, 42, // Skip to: 13726 /* 2756 */ MCD_OPC_CheckField, 6, 5, 0, 212, 42, // Skip to: 13726 /* 2762 */ MCD_OPC_Decode, 143, 4, 106, // Opcode: C_UEQ_D32 /* 2766 */ MCD_OPC_FilterValue, 52, 14, 0, // Skip to: 2784 /* 2770 */ MCD_OPC_CheckPredicate, 25, 200, 42, // Skip to: 13726 /* 2774 */ MCD_OPC_CheckField, 6, 5, 0, 194, 42, // Skip to: 13726 /* 2780 */ MCD_OPC_Decode, 134, 4, 106, // Opcode: C_OLT_D32 /* 2784 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 2802 /* 2788 */ MCD_OPC_CheckPredicate, 25, 182, 42, // Skip to: 13726 /* 2792 */ MCD_OPC_CheckField, 6, 5, 0, 176, 42, // Skip to: 13726 /* 2798 */ MCD_OPC_Decode, 149, 4, 106, // Opcode: C_ULT_D32 /* 2802 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 2820 /* 2806 */ MCD_OPC_CheckPredicate, 25, 164, 42, // Skip to: 13726 /* 2810 */ MCD_OPC_CheckField, 6, 5, 0, 158, 42, // Skip to: 13726 /* 2816 */ MCD_OPC_Decode, 131, 4, 106, // Opcode: C_OLE_D32 /* 2820 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 2838 /* 2824 */ MCD_OPC_CheckPredicate, 25, 146, 42, // Skip to: 13726 /* 2828 */ MCD_OPC_CheckField, 6, 5, 0, 140, 42, // Skip to: 13726 /* 2834 */ MCD_OPC_Decode, 146, 4, 106, // Opcode: C_ULE_D32 /* 2838 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 2856 /* 2842 */ MCD_OPC_CheckPredicate, 25, 128, 42, // Skip to: 13726 /* 2846 */ MCD_OPC_CheckField, 6, 5, 0, 122, 42, // Skip to: 13726 /* 2852 */ MCD_OPC_Decode, 140, 4, 106, // Opcode: C_SF_D32 /* 2856 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 2874 /* 2860 */ MCD_OPC_CheckPredicate, 25, 110, 42, // Skip to: 13726 /* 2864 */ MCD_OPC_CheckField, 6, 5, 0, 104, 42, // Skip to: 13726 /* 2870 */ MCD_OPC_Decode, 250, 3, 106, // Opcode: C_NGLE_D32 /* 2874 */ MCD_OPC_FilterValue, 58, 14, 0, // Skip to: 2892 /* 2878 */ MCD_OPC_CheckPredicate, 25, 92, 42, // Skip to: 13726 /* 2882 */ MCD_OPC_CheckField, 6, 5, 0, 86, 42, // Skip to: 13726 /* 2888 */ MCD_OPC_Decode, 137, 4, 106, // Opcode: C_SEQ_D32 /* 2892 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 2910 /* 2896 */ MCD_OPC_CheckPredicate, 25, 74, 42, // Skip to: 13726 /* 2900 */ MCD_OPC_CheckField, 6, 5, 0, 68, 42, // Skip to: 13726 /* 2906 */ MCD_OPC_Decode, 253, 3, 106, // Opcode: C_NGL_D32 /* 2910 */ MCD_OPC_FilterValue, 60, 14, 0, // Skip to: 2928 /* 2914 */ MCD_OPC_CheckPredicate, 25, 56, 42, // Skip to: 13726 /* 2918 */ MCD_OPC_CheckField, 6, 5, 0, 50, 42, // Skip to: 13726 /* 2924 */ MCD_OPC_Decode, 244, 3, 106, // Opcode: C_LT_D32 /* 2928 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 2946 /* 2932 */ MCD_OPC_CheckPredicate, 25, 38, 42, // Skip to: 13726 /* 2936 */ MCD_OPC_CheckField, 6, 5, 0, 32, 42, // Skip to: 13726 /* 2942 */ MCD_OPC_Decode, 247, 3, 106, // Opcode: C_NGE_D32 /* 2946 */ MCD_OPC_FilterValue, 62, 14, 0, // Skip to: 2964 /* 2950 */ MCD_OPC_CheckPredicate, 25, 20, 42, // Skip to: 13726 /* 2954 */ MCD_OPC_CheckField, 6, 5, 0, 14, 42, // Skip to: 13726 /* 2960 */ MCD_OPC_Decode, 241, 3, 106, // Opcode: C_LE_D32 /* 2964 */ MCD_OPC_FilterValue, 63, 6, 42, // Skip to: 13726 /* 2968 */ MCD_OPC_CheckPredicate, 25, 2, 42, // Skip to: 13726 /* 2972 */ MCD_OPC_CheckField, 6, 5, 0, 252, 41, // Skip to: 13726 /* 2978 */ MCD_OPC_Decode, 128, 4, 106, // Opcode: C_NGT_D32 /* 2982 */ MCD_OPC_FilterValue, 20, 39, 0, // Skip to: 3025 /* 2986 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 2989 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 3007 /* 2993 */ MCD_OPC_CheckPredicate, 5, 233, 41, // Skip to: 13726 /* 2997 */ MCD_OPC_CheckField, 16, 5, 0, 227, 41, // Skip to: 13726 /* 3003 */ MCD_OPC_Decode, 228, 3, 94, // Opcode: CVT_S_W /* 3007 */ MCD_OPC_FilterValue, 33, 219, 41, // Skip to: 13726 /* 3011 */ MCD_OPC_CheckPredicate, 21, 215, 41, // Skip to: 13726 /* 3015 */ MCD_OPC_CheckField, 16, 5, 0, 209, 41, // Skip to: 13726 /* 3021 */ MCD_OPC_Decode, 214, 3, 97, // Opcode: CVT_D32_W /* 3025 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 3037 /* 3029 */ MCD_OPC_CheckPredicate, 8, 197, 41, // Skip to: 13726 /* 3033 */ MCD_OPC_Decode, 189, 2, 92, // Opcode: BZ_B /* 3037 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 3049 /* 3041 */ MCD_OPC_CheckPredicate, 8, 185, 41, // Skip to: 13726 /* 3045 */ MCD_OPC_Decode, 191, 2, 107, // Opcode: BZ_H /* 3049 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 3061 /* 3053 */ MCD_OPC_CheckPredicate, 8, 173, 41, // Skip to: 13726 /* 3057 */ MCD_OPC_Decode, 193, 2, 108, // Opcode: BZ_W /* 3061 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 3073 /* 3065 */ MCD_OPC_CheckPredicate, 8, 161, 41, // Skip to: 13726 /* 3069 */ MCD_OPC_Decode, 190, 2, 109, // Opcode: BZ_D /* 3073 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 3085 /* 3077 */ MCD_OPC_CheckPredicate, 8, 149, 41, // Skip to: 13726 /* 3081 */ MCD_OPC_Decode, 163, 2, 92, // Opcode: BNZ_B /* 3085 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 3097 /* 3089 */ MCD_OPC_CheckPredicate, 8, 137, 41, // Skip to: 13726 /* 3093 */ MCD_OPC_Decode, 165, 2, 107, // Opcode: BNZ_H /* 3097 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 3109 /* 3101 */ MCD_OPC_CheckPredicate, 8, 125, 41, // Skip to: 13726 /* 3105 */ MCD_OPC_Decode, 167, 2, 108, // Opcode: BNZ_W /* 3109 */ MCD_OPC_FilterValue, 31, 117, 41, // Skip to: 13726 /* 3113 */ MCD_OPC_CheckPredicate, 8, 113, 41, // Skip to: 13726 /* 3117 */ MCD_OPC_Decode, 164, 2, 109, // Opcode: BNZ_D /* 3121 */ MCD_OPC_FilterValue, 18, 94, 0, // Skip to: 3219 /* 3125 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 3128 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3146 /* 3132 */ MCD_OPC_CheckPredicate, 5, 94, 41, // Skip to: 13726 /* 3136 */ MCD_OPC_CheckField, 3, 8, 0, 88, 41, // Skip to: 13726 /* 3142 */ MCD_OPC_Decode, 182, 8, 81, // Opcode: MFC2 /* 3146 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 3164 /* 3150 */ MCD_OPC_CheckPredicate, 5, 76, 41, // Skip to: 13726 /* 3154 */ MCD_OPC_CheckField, 3, 8, 0, 70, 41, // Skip to: 13726 /* 3160 */ MCD_OPC_Decode, 172, 9, 81, // Opcode: MTC2 /* 3164 */ MCD_OPC_FilterValue, 8, 62, 41, // Skip to: 13726 /* 3168 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 3171 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3183 /* 3175 */ MCD_OPC_CheckPredicate, 13, 51, 41, // Skip to: 13726 /* 3179 */ MCD_OPC_Decode, 189, 1, 82, // Opcode: BC2F /* 3183 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3195 /* 3187 */ MCD_OPC_CheckPredicate, 13, 39, 41, // Skip to: 13726 /* 3191 */ MCD_OPC_Decode, 192, 1, 82, // Opcode: BC2T /* 3195 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3207 /* 3199 */ MCD_OPC_CheckPredicate, 13, 27, 41, // Skip to: 13726 /* 3203 */ MCD_OPC_Decode, 190, 1, 82, // Opcode: BC2FL /* 3207 */ MCD_OPC_FilterValue, 3, 19, 41, // Skip to: 13726 /* 3211 */ MCD_OPC_CheckPredicate, 13, 15, 41, // Skip to: 13726 /* 3215 */ MCD_OPC_Decode, 193, 1, 82, // Opcode: BC2TL /* 3219 */ MCD_OPC_FilterValue, 19, 9, 1, // Skip to: 3488 /* 3223 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 3226 */ MCD_OPC_FilterValue, 8, 51, 0, // Skip to: 3281 /* 3230 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 3233 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3245 /* 3237 */ MCD_OPC_CheckPredicate, 13, 40, 0, // Skip to: 3281 /* 3241 */ MCD_OPC_Decode, 194, 1, 82, // Opcode: BC3F /* 3245 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3257 /* 3249 */ MCD_OPC_CheckPredicate, 13, 28, 0, // Skip to: 3281 /* 3253 */ MCD_OPC_Decode, 196, 1, 82, // Opcode: BC3T /* 3257 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3269 /* 3261 */ MCD_OPC_CheckPredicate, 13, 16, 0, // Skip to: 3281 /* 3265 */ MCD_OPC_Decode, 195, 1, 82, // Opcode: BC3FL /* 3269 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 3281 /* 3273 */ MCD_OPC_CheckPredicate, 13, 4, 0, // Skip to: 3281 /* 3277 */ MCD_OPC_Decode, 197, 1, 82, // Opcode: BC3TL /* 3281 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 3284 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3302 /* 3288 */ MCD_OPC_CheckPredicate, 26, 194, 40, // Skip to: 13726 /* 3292 */ MCD_OPC_CheckField, 11, 5, 0, 188, 40, // Skip to: 13726 /* 3298 */ MCD_OPC_Decode, 237, 7, 110, // Opcode: LWXC1 /* 3302 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 3320 /* 3306 */ MCD_OPC_CheckPredicate, 27, 176, 40, // Skip to: 13726 /* 3310 */ MCD_OPC_CheckField, 11, 5, 0, 170, 40, // Skip to: 13726 /* 3316 */ MCD_OPC_Decode, 175, 7, 111, // Opcode: LDXC1 /* 3320 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 3338 /* 3324 */ MCD_OPC_CheckPredicate, 28, 158, 40, // Skip to: 13726 /* 3328 */ MCD_OPC_CheckField, 11, 5, 0, 152, 40, // Skip to: 13726 /* 3334 */ MCD_OPC_Decode, 207, 7, 111, // Opcode: LUXC1 /* 3338 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 3356 /* 3342 */ MCD_OPC_CheckPredicate, 26, 140, 40, // Skip to: 13726 /* 3346 */ MCD_OPC_CheckField, 6, 5, 0, 134, 40, // Skip to: 13726 /* 3352 */ MCD_OPC_Decode, 254, 12, 112, // Opcode: SWXC1 /* 3356 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 3374 /* 3360 */ MCD_OPC_CheckPredicate, 27, 122, 40, // Skip to: 13726 /* 3364 */ MCD_OPC_CheckField, 6, 5, 0, 116, 40, // Skip to: 13726 /* 3370 */ MCD_OPC_Decode, 166, 11, 113, // Opcode: SDXC1 /* 3374 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 3392 /* 3378 */ MCD_OPC_CheckPredicate, 28, 104, 40, // Skip to: 13726 /* 3382 */ MCD_OPC_CheckField, 6, 5, 0, 98, 40, // Skip to: 13726 /* 3388 */ MCD_OPC_Decode, 232, 12, 113, // Opcode: SUXC1 /* 3392 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 3404 /* 3396 */ MCD_OPC_CheckPredicate, 26, 86, 40, // Skip to: 13726 /* 3400 */ MCD_OPC_Decode, 149, 8, 114, // Opcode: MADD_S /* 3404 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 3416 /* 3408 */ MCD_OPC_CheckPredicate, 29, 74, 40, // Skip to: 13726 /* 3412 */ MCD_OPC_Decode, 142, 8, 115, // Opcode: MADD_D32 /* 3416 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 3428 /* 3420 */ MCD_OPC_CheckPredicate, 26, 62, 40, // Skip to: 13726 /* 3424 */ MCD_OPC_Decode, 167, 9, 114, // Opcode: MSUB_S /* 3428 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 3440 /* 3432 */ MCD_OPC_CheckPredicate, 29, 50, 40, // Skip to: 13726 /* 3436 */ MCD_OPC_Decode, 160, 9, 115, // Opcode: MSUB_D32 /* 3440 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 3452 /* 3444 */ MCD_OPC_CheckPredicate, 26, 38, 40, // Skip to: 13726 /* 3448 */ MCD_OPC_Decode, 242, 9, 114, // Opcode: NMADD_S /* 3452 */ MCD_OPC_FilterValue, 49, 8, 0, // Skip to: 3464 /* 3456 */ MCD_OPC_CheckPredicate, 29, 26, 40, // Skip to: 13726 /* 3460 */ MCD_OPC_Decode, 239, 9, 115, // Opcode: NMADD_D32 /* 3464 */ MCD_OPC_FilterValue, 56, 8, 0, // Skip to: 3476 /* 3468 */ MCD_OPC_CheckPredicate, 26, 14, 40, // Skip to: 13726 /* 3472 */ MCD_OPC_Decode, 247, 9, 114, // Opcode: NMSUB_S /* 3476 */ MCD_OPC_FilterValue, 57, 6, 40, // Skip to: 13726 /* 3480 */ MCD_OPC_CheckPredicate, 29, 2, 40, // Skip to: 13726 /* 3484 */ MCD_OPC_Decode, 244, 9, 115, // Opcode: NMSUB_D32 /* 3488 */ MCD_OPC_FilterValue, 20, 8, 0, // Skip to: 3500 /* 3492 */ MCD_OPC_CheckPredicate, 16, 246, 39, // Skip to: 13726 /* 3496 */ MCD_OPC_Decode, 209, 1, 78, // Opcode: BEQL /* 3500 */ MCD_OPC_FilterValue, 21, 8, 0, // Skip to: 3512 /* 3504 */ MCD_OPC_CheckPredicate, 16, 234, 39, // Skip to: 13726 /* 3508 */ MCD_OPC_Decode, 156, 2, 78, // Opcode: BNEL /* 3512 */ MCD_OPC_FilterValue, 22, 14, 0, // Skip to: 3530 /* 3516 */ MCD_OPC_CheckPredicate, 16, 222, 39, // Skip to: 13726 /* 3520 */ MCD_OPC_CheckField, 16, 5, 0, 216, 39, // Skip to: 13726 /* 3526 */ MCD_OPC_Decode, 255, 1, 73, // Opcode: BLEZL /* 3530 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 3548 /* 3534 */ MCD_OPC_CheckPredicate, 16, 204, 39, // Skip to: 13726 /* 3538 */ MCD_OPC_CheckField, 16, 5, 0, 198, 39, // Skip to: 13726 /* 3544 */ MCD_OPC_Decode, 231, 1, 73, // Opcode: BGTZL /* 3548 */ MCD_OPC_FilterValue, 28, 229, 0, // Skip to: 3781 /* 3552 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 3555 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 3595 /* 3559 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3562 */ MCD_OPC_FilterValue, 0, 176, 39, // Skip to: 13726 /* 3566 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 3569 */ MCD_OPC_FilterValue, 0, 169, 39, // Skip to: 13726 /* 3573 */ MCD_OPC_CheckPredicate, 9, 10, 0, // Skip to: 3587 /* 3577 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 3587 /* 3583 */ MCD_OPC_Decode, 130, 8, 43, // Opcode: MADD /* 3587 */ MCD_OPC_CheckPredicate, 12, 151, 39, // Skip to: 13726 /* 3591 */ MCD_OPC_Decode, 145, 8, 116, // Opcode: MADD_DSP /* 3595 */ MCD_OPC_FilterValue, 1, 36, 0, // Skip to: 3635 /* 3599 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3602 */ MCD_OPC_FilterValue, 0, 136, 39, // Skip to: 13726 /* 3606 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 3609 */ MCD_OPC_FilterValue, 0, 129, 39, // Skip to: 13726 /* 3613 */ MCD_OPC_CheckPredicate, 9, 10, 0, // Skip to: 3627 /* 3617 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 3627 /* 3623 */ MCD_OPC_Decode, 135, 8, 43, // Opcode: MADDU /* 3627 */ MCD_OPC_CheckPredicate, 12, 111, 39, // Skip to: 13726 /* 3631 */ MCD_OPC_Decode, 136, 8, 116, // Opcode: MADDU_DSP /* 3635 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 3653 /* 3639 */ MCD_OPC_CheckPredicate, 9, 99, 39, // Skip to: 13726 /* 3643 */ MCD_OPC_CheckField, 6, 5, 0, 93, 39, // Skip to: 13726 /* 3649 */ MCD_OPC_Decode, 193, 9, 35, // Opcode: MUL /* 3653 */ MCD_OPC_FilterValue, 4, 36, 0, // Skip to: 3693 /* 3657 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3660 */ MCD_OPC_FilterValue, 0, 78, 39, // Skip to: 13726 /* 3664 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 3667 */ MCD_OPC_FilterValue, 0, 71, 39, // Skip to: 13726 /* 3671 */ MCD_OPC_CheckPredicate, 9, 10, 0, // Skip to: 3685 /* 3675 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 3685 /* 3681 */ MCD_OPC_Decode, 148, 9, 43, // Opcode: MSUB /* 3685 */ MCD_OPC_CheckPredicate, 12, 53, 39, // Skip to: 13726 /* 3689 */ MCD_OPC_Decode, 163, 9, 116, // Opcode: MSUB_DSP /* 3693 */ MCD_OPC_FilterValue, 5, 36, 0, // Skip to: 3733 /* 3697 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3700 */ MCD_OPC_FilterValue, 0, 38, 39, // Skip to: 13726 /* 3704 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 3707 */ MCD_OPC_FilterValue, 0, 31, 39, // Skip to: 13726 /* 3711 */ MCD_OPC_CheckPredicate, 9, 10, 0, // Skip to: 3725 /* 3715 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 3725 /* 3721 */ MCD_OPC_Decode, 153, 9, 43, // Opcode: MSUBU /* 3725 */ MCD_OPC_CheckPredicate, 12, 13, 39, // Skip to: 13726 /* 3729 */ MCD_OPC_Decode, 154, 9, 116, // Opcode: MSUBU_DSP /* 3733 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 3751 /* 3737 */ MCD_OPC_CheckPredicate, 9, 1, 39, // Skip to: 13726 /* 3741 */ MCD_OPC_CheckField, 6, 5, 0, 251, 38, // Skip to: 13726 /* 3747 */ MCD_OPC_Decode, 152, 3, 117, // Opcode: CLZ /* 3751 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 3769 /* 3755 */ MCD_OPC_CheckPredicate, 9, 239, 38, // Skip to: 13726 /* 3759 */ MCD_OPC_CheckField, 6, 5, 0, 233, 38, // Skip to: 13726 /* 3765 */ MCD_OPC_Decode, 133, 3, 117, // Opcode: CLO /* 3769 */ MCD_OPC_FilterValue, 63, 225, 38, // Skip to: 13726 /* 3773 */ MCD_OPC_CheckPredicate, 9, 221, 38, // Skip to: 13726 /* 3777 */ MCD_OPC_Decode, 152, 11, 64, // Opcode: SDBBP /* 3781 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 3793 /* 3785 */ MCD_OPC_CheckPredicate, 9, 209, 38, // Skip to: 13726 /* 3789 */ MCD_OPC_Decode, 131, 7, 77, // Opcode: JALX /* 3793 */ MCD_OPC_FilterValue, 30, 28, 28, // Skip to: 10993 /* 3797 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 3800 */ MCD_OPC_FilterValue, 0, 50, 0, // Skip to: 3854 /* 3804 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 3807 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 3818 /* 3811 */ MCD_OPC_CheckPredicate, 8, 183, 38, // Skip to: 13726 /* 3815 */ MCD_OPC_Decode, 87, 118, // Opcode: ANDI_B /* 3818 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3830 /* 3822 */ MCD_OPC_CheckPredicate, 8, 172, 38, // Skip to: 13726 /* 3826 */ MCD_OPC_Decode, 136, 10, 118, // Opcode: ORI_B /* 3830 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3842 /* 3834 */ MCD_OPC_CheckPredicate, 8, 160, 38, // Skip to: 13726 /* 3838 */ MCD_OPC_Decode, 252, 9, 118, // Opcode: NORI_B /* 3842 */ MCD_OPC_FilterValue, 3, 152, 38, // Skip to: 13726 /* 3846 */ MCD_OPC_CheckPredicate, 8, 148, 38, // Skip to: 13726 /* 3850 */ MCD_OPC_Decode, 239, 13, 118, // Opcode: XORI_B /* 3854 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 3897 /* 3858 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 3861 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3873 /* 3865 */ MCD_OPC_CheckPredicate, 8, 129, 38, // Skip to: 13726 /* 3869 */ MCD_OPC_Decode, 141, 2, 119, // Opcode: BMNZI_B /* 3873 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3885 /* 3877 */ MCD_OPC_CheckPredicate, 8, 117, 38, // Skip to: 13726 /* 3881 */ MCD_OPC_Decode, 143, 2, 119, // Opcode: BMZI_B /* 3885 */ MCD_OPC_FilterValue, 2, 109, 38, // Skip to: 13726 /* 3889 */ MCD_OPC_CheckPredicate, 8, 105, 38, // Skip to: 13726 /* 3893 */ MCD_OPC_Decode, 174, 2, 119, // Opcode: BSELI_B /* 3897 */ MCD_OPC_FilterValue, 2, 39, 0, // Skip to: 3940 /* 3901 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ... /* 3904 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3916 /* 3908 */ MCD_OPC_CheckPredicate, 8, 86, 38, // Skip to: 13726 /* 3912 */ MCD_OPC_Decode, 189, 11, 118, // Opcode: SHF_B /* 3916 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3928 /* 3920 */ MCD_OPC_CheckPredicate, 8, 74, 38, // Skip to: 13726 /* 3924 */ MCD_OPC_Decode, 190, 11, 120, // Opcode: SHF_H /* 3928 */ MCD_OPC_FilterValue, 2, 66, 38, // Skip to: 13726 /* 3932 */ MCD_OPC_CheckPredicate, 8, 62, 38, // Skip to: 13726 /* 3936 */ MCD_OPC_Decode, 191, 11, 121, // Opcode: SHF_W /* 3940 */ MCD_OPC_FilterValue, 6, 31, 1, // Skip to: 4231 /* 3944 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 3947 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 3958 /* 3951 */ MCD_OPC_CheckPredicate, 8, 43, 38, // Skip to: 13726 /* 3955 */ MCD_OPC_Decode, 59, 122, // Opcode: ADDVI_B /* 3958 */ MCD_OPC_FilterValue, 1, 7, 0, // Skip to: 3969 /* 3962 */ MCD_OPC_CheckPredicate, 8, 32, 38, // Skip to: 13726 /* 3966 */ MCD_OPC_Decode, 61, 123, // Opcode: ADDVI_H /* 3969 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 3980 /* 3973 */ MCD_OPC_CheckPredicate, 8, 21, 38, // Skip to: 13726 /* 3977 */ MCD_OPC_Decode, 62, 124, // Opcode: ADDVI_W /* 3980 */ MCD_OPC_FilterValue, 3, 7, 0, // Skip to: 3991 /* 3984 */ MCD_OPC_CheckPredicate, 8, 10, 38, // Skip to: 13726 /* 3988 */ MCD_OPC_Decode, 60, 125, // Opcode: ADDVI_D /* 3991 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 4003 /* 3995 */ MCD_OPC_CheckPredicate, 8, 255, 37, // Skip to: 13726 /* 3999 */ MCD_OPC_Decode, 221, 12, 122, // Opcode: SUBVI_B /* 4003 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 4015 /* 4007 */ MCD_OPC_CheckPredicate, 8, 243, 37, // Skip to: 13726 /* 4011 */ MCD_OPC_Decode, 223, 12, 123, // Opcode: SUBVI_H /* 4015 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 4027 /* 4019 */ MCD_OPC_CheckPredicate, 8, 231, 37, // Skip to: 13726 /* 4023 */ MCD_OPC_Decode, 224, 12, 124, // Opcode: SUBVI_W /* 4027 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 4039 /* 4031 */ MCD_OPC_CheckPredicate, 8, 219, 37, // Skip to: 13726 /* 4035 */ MCD_OPC_Decode, 222, 12, 125, // Opcode: SUBVI_D /* 4039 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 4051 /* 4043 */ MCD_OPC_CheckPredicate, 8, 207, 37, // Skip to: 13726 /* 4047 */ MCD_OPC_Decode, 157, 8, 122, // Opcode: MAXI_S_B /* 4051 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 4063 /* 4055 */ MCD_OPC_CheckPredicate, 8, 195, 37, // Skip to: 13726 /* 4059 */ MCD_OPC_Decode, 159, 8, 123, // Opcode: MAXI_S_H /* 4063 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 4075 /* 4067 */ MCD_OPC_CheckPredicate, 8, 183, 37, // Skip to: 13726 /* 4071 */ MCD_OPC_Decode, 160, 8, 124, // Opcode: MAXI_S_W /* 4075 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 4087 /* 4079 */ MCD_OPC_CheckPredicate, 8, 171, 37, // Skip to: 13726 /* 4083 */ MCD_OPC_Decode, 158, 8, 125, // Opcode: MAXI_S_D /* 4087 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 4099 /* 4091 */ MCD_OPC_CheckPredicate, 8, 159, 37, // Skip to: 13726 /* 4095 */ MCD_OPC_Decode, 161, 8, 122, // Opcode: MAXI_U_B /* 4099 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 4111 /* 4103 */ MCD_OPC_CheckPredicate, 8, 147, 37, // Skip to: 13726 /* 4107 */ MCD_OPC_Decode, 163, 8, 123, // Opcode: MAXI_U_H /* 4111 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 4123 /* 4115 */ MCD_OPC_CheckPredicate, 8, 135, 37, // Skip to: 13726 /* 4119 */ MCD_OPC_Decode, 164, 8, 124, // Opcode: MAXI_U_W /* 4123 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 4135 /* 4127 */ MCD_OPC_CheckPredicate, 8, 123, 37, // Skip to: 13726 /* 4131 */ MCD_OPC_Decode, 162, 8, 125, // Opcode: MAXI_U_D /* 4135 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 4147 /* 4139 */ MCD_OPC_CheckPredicate, 8, 111, 37, // Skip to: 13726 /* 4143 */ MCD_OPC_Decode, 198, 8, 122, // Opcode: MINI_S_B /* 4147 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 4159 /* 4151 */ MCD_OPC_CheckPredicate, 8, 99, 37, // Skip to: 13726 /* 4155 */ MCD_OPC_Decode, 200, 8, 123, // Opcode: MINI_S_H /* 4159 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 4171 /* 4163 */ MCD_OPC_CheckPredicate, 8, 87, 37, // Skip to: 13726 /* 4167 */ MCD_OPC_Decode, 201, 8, 124, // Opcode: MINI_S_W /* 4171 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 4183 /* 4175 */ MCD_OPC_CheckPredicate, 8, 75, 37, // Skip to: 13726 /* 4179 */ MCD_OPC_Decode, 199, 8, 125, // Opcode: MINI_S_D /* 4183 */ MCD_OPC_FilterValue, 20, 8, 0, // Skip to: 4195 /* 4187 */ MCD_OPC_CheckPredicate, 8, 63, 37, // Skip to: 13726 /* 4191 */ MCD_OPC_Decode, 202, 8, 122, // Opcode: MINI_U_B /* 4195 */ MCD_OPC_FilterValue, 21, 8, 0, // Skip to: 4207 /* 4199 */ MCD_OPC_CheckPredicate, 8, 51, 37, // Skip to: 13726 /* 4203 */ MCD_OPC_Decode, 204, 8, 123, // Opcode: MINI_U_H /* 4207 */ MCD_OPC_FilterValue, 22, 8, 0, // Skip to: 4219 /* 4211 */ MCD_OPC_CheckPredicate, 8, 39, 37, // Skip to: 13726 /* 4215 */ MCD_OPC_Decode, 205, 8, 124, // Opcode: MINI_U_W /* 4219 */ MCD_OPC_FilterValue, 23, 31, 37, // Skip to: 13726 /* 4223 */ MCD_OPC_CheckPredicate, 8, 27, 37, // Skip to: 13726 /* 4227 */ MCD_OPC_Decode, 203, 8, 125, // Opcode: MINI_U_D /* 4231 */ MCD_OPC_FilterValue, 7, 37, 1, // Skip to: 4528 /* 4235 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 4238 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4250 /* 4242 */ MCD_OPC_CheckPredicate, 8, 8, 37, // Skip to: 13726 /* 4246 */ MCD_OPC_Decode, 230, 2, 122, // Opcode: CEQI_B /* 4250 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 4262 /* 4254 */ MCD_OPC_CheckPredicate, 8, 252, 36, // Skip to: 13726 /* 4258 */ MCD_OPC_Decode, 232, 2, 123, // Opcode: CEQI_H /* 4262 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 4274 /* 4266 */ MCD_OPC_CheckPredicate, 8, 240, 36, // Skip to: 13726 /* 4270 */ MCD_OPC_Decode, 233, 2, 124, // Opcode: CEQI_W /* 4274 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 4286 /* 4278 */ MCD_OPC_CheckPredicate, 8, 228, 36, // Skip to: 13726 /* 4282 */ MCD_OPC_Decode, 231, 2, 125, // Opcode: CEQI_D /* 4286 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 4298 /* 4290 */ MCD_OPC_CheckPredicate, 8, 216, 36, // Skip to: 13726 /* 4294 */ MCD_OPC_Decode, 136, 3, 122, // Opcode: CLTI_S_B /* 4298 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 4310 /* 4302 */ MCD_OPC_CheckPredicate, 8, 204, 36, // Skip to: 13726 /* 4306 */ MCD_OPC_Decode, 138, 3, 123, // Opcode: CLTI_S_H /* 4310 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 4322 /* 4314 */ MCD_OPC_CheckPredicate, 8, 192, 36, // Skip to: 13726 /* 4318 */ MCD_OPC_Decode, 139, 3, 124, // Opcode: CLTI_S_W /* 4322 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 4334 /* 4326 */ MCD_OPC_CheckPredicate, 8, 180, 36, // Skip to: 13726 /* 4330 */ MCD_OPC_Decode, 137, 3, 125, // Opcode: CLTI_S_D /* 4334 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 4346 /* 4338 */ MCD_OPC_CheckPredicate, 8, 168, 36, // Skip to: 13726 /* 4342 */ MCD_OPC_Decode, 140, 3, 122, // Opcode: CLTI_U_B /* 4346 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 4358 /* 4350 */ MCD_OPC_CheckPredicate, 8, 156, 36, // Skip to: 13726 /* 4354 */ MCD_OPC_Decode, 142, 3, 123, // Opcode: CLTI_U_H /* 4358 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 4370 /* 4362 */ MCD_OPC_CheckPredicate, 8, 144, 36, // Skip to: 13726 /* 4366 */ MCD_OPC_Decode, 143, 3, 124, // Opcode: CLTI_U_W /* 4370 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 4382 /* 4374 */ MCD_OPC_CheckPredicate, 8, 132, 36, // Skip to: 13726 /* 4378 */ MCD_OPC_Decode, 141, 3, 125, // Opcode: CLTI_U_D /* 4382 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 4394 /* 4386 */ MCD_OPC_CheckPredicate, 8, 120, 36, // Skip to: 13726 /* 4390 */ MCD_OPC_Decode, 245, 2, 122, // Opcode: CLEI_S_B /* 4394 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 4406 /* 4398 */ MCD_OPC_CheckPredicate, 8, 108, 36, // Skip to: 13726 /* 4402 */ MCD_OPC_Decode, 247, 2, 123, // Opcode: CLEI_S_H /* 4406 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 4418 /* 4410 */ MCD_OPC_CheckPredicate, 8, 96, 36, // Skip to: 13726 /* 4414 */ MCD_OPC_Decode, 248, 2, 124, // Opcode: CLEI_S_W /* 4418 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 4430 /* 4422 */ MCD_OPC_CheckPredicate, 8, 84, 36, // Skip to: 13726 /* 4426 */ MCD_OPC_Decode, 246, 2, 125, // Opcode: CLEI_S_D /* 4430 */ MCD_OPC_FilterValue, 20, 8, 0, // Skip to: 4442 /* 4434 */ MCD_OPC_CheckPredicate, 8, 72, 36, // Skip to: 13726 /* 4438 */ MCD_OPC_Decode, 249, 2, 122, // Opcode: CLEI_U_B /* 4442 */ MCD_OPC_FilterValue, 21, 8, 0, // Skip to: 4454 /* 4446 */ MCD_OPC_CheckPredicate, 8, 60, 36, // Skip to: 13726 /* 4450 */ MCD_OPC_Decode, 251, 2, 123, // Opcode: CLEI_U_H /* 4454 */ MCD_OPC_FilterValue, 22, 8, 0, // Skip to: 4466 /* 4458 */ MCD_OPC_CheckPredicate, 8, 48, 36, // Skip to: 13726 /* 4462 */ MCD_OPC_Decode, 252, 2, 124, // Opcode: CLEI_U_W /* 4466 */ MCD_OPC_FilterValue, 23, 8, 0, // Skip to: 4478 /* 4470 */ MCD_OPC_CheckPredicate, 8, 36, 36, // Skip to: 13726 /* 4474 */ MCD_OPC_Decode, 250, 2, 125, // Opcode: CLEI_U_D /* 4478 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 4490 /* 4482 */ MCD_OPC_CheckPredicate, 8, 24, 36, // Skip to: 13726 /* 4486 */ MCD_OPC_Decode, 168, 7, 126, // Opcode: LDI_B /* 4490 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 4502 /* 4494 */ MCD_OPC_CheckPredicate, 8, 12, 36, // Skip to: 13726 /* 4498 */ MCD_OPC_Decode, 170, 7, 127, // Opcode: LDI_H /* 4502 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 4515 /* 4506 */ MCD_OPC_CheckPredicate, 8, 0, 36, // Skip to: 13726 /* 4510 */ MCD_OPC_Decode, 171, 7, 128, 1, // Opcode: LDI_W /* 4515 */ MCD_OPC_FilterValue, 27, 247, 35, // Skip to: 13726 /* 4519 */ MCD_OPC_CheckPredicate, 8, 243, 35, // Skip to: 13726 /* 4523 */ MCD_OPC_Decode, 169, 7, 129, 1, // Opcode: LDI_D /* 4528 */ MCD_OPC_FilterValue, 9, 61, 2, // Skip to: 5105 /* 4532 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 4535 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4548 /* 4539 */ MCD_OPC_CheckPredicate, 8, 223, 35, // Skip to: 13726 /* 4543 */ MCD_OPC_Decode, 230, 11, 130, 1, // Opcode: SLLI_D /* 4548 */ MCD_OPC_FilterValue, 1, 54, 0, // Skip to: 4606 /* 4552 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4555 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4567 /* 4559 */ MCD_OPC_CheckPredicate, 8, 203, 35, // Skip to: 13726 /* 4563 */ MCD_OPC_Decode, 232, 11, 124, // Opcode: SLLI_W /* 4567 */ MCD_OPC_FilterValue, 1, 195, 35, // Skip to: 13726 /* 4571 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4574 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4587 /* 4578 */ MCD_OPC_CheckPredicate, 8, 184, 35, // Skip to: 13726 /* 4582 */ MCD_OPC_Decode, 231, 11, 131, 1, // Opcode: SLLI_H /* 4587 */ MCD_OPC_FilterValue, 1, 175, 35, // Skip to: 13726 /* 4591 */ MCD_OPC_CheckPredicate, 8, 171, 35, // Skip to: 13726 /* 4595 */ MCD_OPC_CheckField, 19, 1, 0, 165, 35, // Skip to: 13726 /* 4601 */ MCD_OPC_Decode, 229, 11, 132, 1, // Opcode: SLLI_B /* 4606 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 4619 /* 4610 */ MCD_OPC_CheckPredicate, 8, 152, 35, // Skip to: 13726 /* 4614 */ MCD_OPC_Decode, 141, 12, 130, 1, // Opcode: SRAI_D /* 4619 */ MCD_OPC_FilterValue, 3, 54, 0, // Skip to: 4677 /* 4623 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4626 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4638 /* 4630 */ MCD_OPC_CheckPredicate, 8, 132, 35, // Skip to: 13726 /* 4634 */ MCD_OPC_Decode, 143, 12, 124, // Opcode: SRAI_W /* 4638 */ MCD_OPC_FilterValue, 1, 124, 35, // Skip to: 13726 /* 4642 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4645 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4658 /* 4649 */ MCD_OPC_CheckPredicate, 8, 113, 35, // Skip to: 13726 /* 4653 */ MCD_OPC_Decode, 142, 12, 131, 1, // Opcode: SRAI_H /* 4658 */ MCD_OPC_FilterValue, 1, 104, 35, // Skip to: 13726 /* 4662 */ MCD_OPC_CheckPredicate, 8, 100, 35, // Skip to: 13726 /* 4666 */ MCD_OPC_CheckField, 19, 1, 0, 94, 35, // Skip to: 13726 /* 4672 */ MCD_OPC_Decode, 140, 12, 132, 1, // Opcode: SRAI_B /* 4677 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 4690 /* 4681 */ MCD_OPC_CheckPredicate, 8, 81, 35, // Skip to: 13726 /* 4685 */ MCD_OPC_Decode, 162, 12, 130, 1, // Opcode: SRLI_D /* 4690 */ MCD_OPC_FilterValue, 5, 54, 0, // Skip to: 4748 /* 4694 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4697 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4709 /* 4701 */ MCD_OPC_CheckPredicate, 8, 61, 35, // Skip to: 13726 /* 4705 */ MCD_OPC_Decode, 164, 12, 124, // Opcode: SRLI_W /* 4709 */ MCD_OPC_FilterValue, 1, 53, 35, // Skip to: 13726 /* 4713 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4716 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4729 /* 4720 */ MCD_OPC_CheckPredicate, 8, 42, 35, // Skip to: 13726 /* 4724 */ MCD_OPC_Decode, 163, 12, 131, 1, // Opcode: SRLI_H /* 4729 */ MCD_OPC_FilterValue, 1, 33, 35, // Skip to: 13726 /* 4733 */ MCD_OPC_CheckPredicate, 8, 29, 35, // Skip to: 13726 /* 4737 */ MCD_OPC_CheckField, 19, 1, 0, 23, 35, // Skip to: 13726 /* 4743 */ MCD_OPC_Decode, 161, 12, 132, 1, // Opcode: SRLI_B /* 4748 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 4761 /* 4752 */ MCD_OPC_CheckPredicate, 8, 10, 35, // Skip to: 13726 /* 4756 */ MCD_OPC_Decode, 199, 1, 130, 1, // Opcode: BCLRI_D /* 4761 */ MCD_OPC_FilterValue, 7, 54, 0, // Skip to: 4819 /* 4765 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4768 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4780 /* 4772 */ MCD_OPC_CheckPredicate, 8, 246, 34, // Skip to: 13726 /* 4776 */ MCD_OPC_Decode, 201, 1, 124, // Opcode: BCLRI_W /* 4780 */ MCD_OPC_FilterValue, 1, 238, 34, // Skip to: 13726 /* 4784 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4787 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4800 /* 4791 */ MCD_OPC_CheckPredicate, 8, 227, 34, // Skip to: 13726 /* 4795 */ MCD_OPC_Decode, 200, 1, 131, 1, // Opcode: BCLRI_H /* 4800 */ MCD_OPC_FilterValue, 1, 218, 34, // Skip to: 13726 /* 4804 */ MCD_OPC_CheckPredicate, 8, 214, 34, // Skip to: 13726 /* 4808 */ MCD_OPC_CheckField, 19, 1, 0, 208, 34, // Skip to: 13726 /* 4814 */ MCD_OPC_Decode, 198, 1, 132, 1, // Opcode: BCLRI_B /* 4819 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 4832 /* 4823 */ MCD_OPC_CheckPredicate, 8, 195, 34, // Skip to: 13726 /* 4827 */ MCD_OPC_Decode, 182, 2, 130, 1, // Opcode: BSETI_D /* 4832 */ MCD_OPC_FilterValue, 9, 54, 0, // Skip to: 4890 /* 4836 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4839 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4851 /* 4843 */ MCD_OPC_CheckPredicate, 8, 175, 34, // Skip to: 13726 /* 4847 */ MCD_OPC_Decode, 184, 2, 124, // Opcode: BSETI_W /* 4851 */ MCD_OPC_FilterValue, 1, 167, 34, // Skip to: 13726 /* 4855 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4858 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4871 /* 4862 */ MCD_OPC_CheckPredicate, 8, 156, 34, // Skip to: 13726 /* 4866 */ MCD_OPC_Decode, 183, 2, 131, 1, // Opcode: BSETI_H /* 4871 */ MCD_OPC_FilterValue, 1, 147, 34, // Skip to: 13726 /* 4875 */ MCD_OPC_CheckPredicate, 8, 143, 34, // Skip to: 13726 /* 4879 */ MCD_OPC_CheckField, 19, 1, 0, 137, 34, // Skip to: 13726 /* 4885 */ MCD_OPC_Decode, 181, 2, 132, 1, // Opcode: BSETI_B /* 4890 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 4903 /* 4894 */ MCD_OPC_CheckPredicate, 8, 124, 34, // Skip to: 13726 /* 4898 */ MCD_OPC_Decode, 149, 2, 130, 1, // Opcode: BNEGI_D /* 4903 */ MCD_OPC_FilterValue, 11, 54, 0, // Skip to: 4961 /* 4907 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4910 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4922 /* 4914 */ MCD_OPC_CheckPredicate, 8, 104, 34, // Skip to: 13726 /* 4918 */ MCD_OPC_Decode, 151, 2, 124, // Opcode: BNEGI_W /* 4922 */ MCD_OPC_FilterValue, 1, 96, 34, // Skip to: 13726 /* 4926 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4929 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4942 /* 4933 */ MCD_OPC_CheckPredicate, 8, 85, 34, // Skip to: 13726 /* 4937 */ MCD_OPC_Decode, 150, 2, 131, 1, // Opcode: BNEGI_H /* 4942 */ MCD_OPC_FilterValue, 1, 76, 34, // Skip to: 13726 /* 4946 */ MCD_OPC_CheckPredicate, 8, 72, 34, // Skip to: 13726 /* 4950 */ MCD_OPC_CheckField, 19, 1, 0, 66, 34, // Skip to: 13726 /* 4956 */ MCD_OPC_Decode, 148, 2, 132, 1, // Opcode: BNEGI_B /* 4961 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 4974 /* 4965 */ MCD_OPC_CheckPredicate, 8, 53, 34, // Skip to: 13726 /* 4969 */ MCD_OPC_Decode, 234, 1, 133, 1, // Opcode: BINSLI_D /* 4974 */ MCD_OPC_FilterValue, 13, 55, 0, // Skip to: 5033 /* 4978 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 4981 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 4994 /* 4985 */ MCD_OPC_CheckPredicate, 8, 33, 34, // Skip to: 13726 /* 4989 */ MCD_OPC_Decode, 236, 1, 134, 1, // Opcode: BINSLI_W /* 4994 */ MCD_OPC_FilterValue, 1, 24, 34, // Skip to: 13726 /* 4998 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5001 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5014 /* 5005 */ MCD_OPC_CheckPredicate, 8, 13, 34, // Skip to: 13726 /* 5009 */ MCD_OPC_Decode, 235, 1, 135, 1, // Opcode: BINSLI_H /* 5014 */ MCD_OPC_FilterValue, 1, 4, 34, // Skip to: 13726 /* 5018 */ MCD_OPC_CheckPredicate, 8, 0, 34, // Skip to: 13726 /* 5022 */ MCD_OPC_CheckField, 19, 1, 0, 250, 33, // Skip to: 13726 /* 5028 */ MCD_OPC_Decode, 233, 1, 136, 1, // Opcode: BINSLI_B /* 5033 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 5046 /* 5037 */ MCD_OPC_CheckPredicate, 8, 237, 33, // Skip to: 13726 /* 5041 */ MCD_OPC_Decode, 242, 1, 133, 1, // Opcode: BINSRI_D /* 5046 */ MCD_OPC_FilterValue, 15, 228, 33, // Skip to: 13726 /* 5050 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5053 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5066 /* 5057 */ MCD_OPC_CheckPredicate, 8, 217, 33, // Skip to: 13726 /* 5061 */ MCD_OPC_Decode, 244, 1, 134, 1, // Opcode: BINSRI_W /* 5066 */ MCD_OPC_FilterValue, 1, 208, 33, // Skip to: 13726 /* 5070 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5073 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5086 /* 5077 */ MCD_OPC_CheckPredicate, 8, 197, 33, // Skip to: 13726 /* 5081 */ MCD_OPC_Decode, 243, 1, 135, 1, // Opcode: BINSRI_H /* 5086 */ MCD_OPC_FilterValue, 1, 188, 33, // Skip to: 13726 /* 5090 */ MCD_OPC_CheckPredicate, 8, 184, 33, // Skip to: 13726 /* 5094 */ MCD_OPC_CheckField, 19, 1, 0, 178, 33, // Skip to: 13726 /* 5100 */ MCD_OPC_Decode, 241, 1, 136, 1, // Opcode: BINSRI_B /* 5105 */ MCD_OPC_FilterValue, 10, 31, 1, // Skip to: 5396 /* 5109 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 5112 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5125 /* 5116 */ MCD_OPC_CheckPredicate, 8, 158, 33, // Skip to: 13726 /* 5120 */ MCD_OPC_Decode, 135, 11, 130, 1, // Opcode: SAT_S_D /* 5125 */ MCD_OPC_FilterValue, 1, 54, 0, // Skip to: 5183 /* 5129 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5132 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5144 /* 5136 */ MCD_OPC_CheckPredicate, 8, 138, 33, // Skip to: 13726 /* 5140 */ MCD_OPC_Decode, 137, 11, 124, // Opcode: SAT_S_W /* 5144 */ MCD_OPC_FilterValue, 1, 130, 33, // Skip to: 13726 /* 5148 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5151 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5164 /* 5155 */ MCD_OPC_CheckPredicate, 8, 119, 33, // Skip to: 13726 /* 5159 */ MCD_OPC_Decode, 136, 11, 131, 1, // Opcode: SAT_S_H /* 5164 */ MCD_OPC_FilterValue, 1, 110, 33, // Skip to: 13726 /* 5168 */ MCD_OPC_CheckPredicate, 8, 106, 33, // Skip to: 13726 /* 5172 */ MCD_OPC_CheckField, 19, 1, 0, 100, 33, // Skip to: 13726 /* 5178 */ MCD_OPC_Decode, 134, 11, 132, 1, // Opcode: SAT_S_B /* 5183 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 5196 /* 5187 */ MCD_OPC_CheckPredicate, 8, 87, 33, // Skip to: 13726 /* 5191 */ MCD_OPC_Decode, 139, 11, 130, 1, // Opcode: SAT_U_D /* 5196 */ MCD_OPC_FilterValue, 3, 54, 0, // Skip to: 5254 /* 5200 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5203 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5215 /* 5207 */ MCD_OPC_CheckPredicate, 8, 67, 33, // Skip to: 13726 /* 5211 */ MCD_OPC_Decode, 141, 11, 124, // Opcode: SAT_U_W /* 5215 */ MCD_OPC_FilterValue, 1, 59, 33, // Skip to: 13726 /* 5219 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5222 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5235 /* 5226 */ MCD_OPC_CheckPredicate, 8, 48, 33, // Skip to: 13726 /* 5230 */ MCD_OPC_Decode, 140, 11, 131, 1, // Opcode: SAT_U_H /* 5235 */ MCD_OPC_FilterValue, 1, 39, 33, // Skip to: 13726 /* 5239 */ MCD_OPC_CheckPredicate, 8, 35, 33, // Skip to: 13726 /* 5243 */ MCD_OPC_CheckField, 19, 1, 0, 29, 33, // Skip to: 13726 /* 5249 */ MCD_OPC_Decode, 138, 11, 132, 1, // Opcode: SAT_U_B /* 5254 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 5267 /* 5258 */ MCD_OPC_CheckPredicate, 8, 16, 33, // Skip to: 13726 /* 5262 */ MCD_OPC_Decode, 145, 12, 130, 1, // Opcode: SRARI_D /* 5267 */ MCD_OPC_FilterValue, 5, 54, 0, // Skip to: 5325 /* 5271 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5274 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5286 /* 5278 */ MCD_OPC_CheckPredicate, 8, 252, 32, // Skip to: 13726 /* 5282 */ MCD_OPC_Decode, 147, 12, 124, // Opcode: SRARI_W /* 5286 */ MCD_OPC_FilterValue, 1, 244, 32, // Skip to: 13726 /* 5290 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5293 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5306 /* 5297 */ MCD_OPC_CheckPredicate, 8, 233, 32, // Skip to: 13726 /* 5301 */ MCD_OPC_Decode, 146, 12, 131, 1, // Opcode: SRARI_H /* 5306 */ MCD_OPC_FilterValue, 1, 224, 32, // Skip to: 13726 /* 5310 */ MCD_OPC_CheckPredicate, 8, 220, 32, // Skip to: 13726 /* 5314 */ MCD_OPC_CheckField, 19, 1, 0, 214, 32, // Skip to: 13726 /* 5320 */ MCD_OPC_Decode, 144, 12, 132, 1, // Opcode: SRARI_B /* 5325 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 5338 /* 5329 */ MCD_OPC_CheckPredicate, 8, 201, 32, // Skip to: 13726 /* 5333 */ MCD_OPC_Decode, 166, 12, 130, 1, // Opcode: SRLRI_D /* 5338 */ MCD_OPC_FilterValue, 7, 192, 32, // Skip to: 13726 /* 5342 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ... /* 5345 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5357 /* 5349 */ MCD_OPC_CheckPredicate, 8, 181, 32, // Skip to: 13726 /* 5353 */ MCD_OPC_Decode, 168, 12, 124, // Opcode: SRLRI_W /* 5357 */ MCD_OPC_FilterValue, 1, 173, 32, // Skip to: 13726 /* 5361 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 5364 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5377 /* 5368 */ MCD_OPC_CheckPredicate, 8, 162, 32, // Skip to: 13726 /* 5372 */ MCD_OPC_Decode, 167, 12, 131, 1, // Opcode: SRLRI_H /* 5377 */ MCD_OPC_FilterValue, 1, 153, 32, // Skip to: 13726 /* 5381 */ MCD_OPC_CheckPredicate, 8, 149, 32, // Skip to: 13726 /* 5385 */ MCD_OPC_CheckField, 19, 1, 0, 143, 32, // Skip to: 13726 /* 5391 */ MCD_OPC_Decode, 165, 12, 132, 1, // Opcode: SRLRI_B /* 5396 */ MCD_OPC_FilterValue, 13, 163, 1, // Skip to: 5819 /* 5400 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 5403 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 5416 /* 5407 */ MCD_OPC_CheckPredicate, 8, 123, 32, // Skip to: 13726 /* 5411 */ MCD_OPC_Decode, 235, 11, 137, 1, // Opcode: SLL_B /* 5416 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 5429 /* 5420 */ MCD_OPC_CheckPredicate, 8, 110, 32, // Skip to: 13726 /* 5424 */ MCD_OPC_Decode, 237, 11, 138, 1, // Opcode: SLL_H /* 5429 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 5442 /* 5433 */ MCD_OPC_CheckPredicate, 8, 97, 32, // Skip to: 13726 /* 5437 */ MCD_OPC_Decode, 239, 11, 139, 1, // Opcode: SLL_W /* 5442 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 5455 /* 5446 */ MCD_OPC_CheckPredicate, 8, 84, 32, // Skip to: 13726 /* 5450 */ MCD_OPC_Decode, 236, 11, 140, 1, // Opcode: SLL_D /* 5455 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 5468 /* 5459 */ MCD_OPC_CheckPredicate, 8, 71, 32, // Skip to: 13726 /* 5463 */ MCD_OPC_Decode, 154, 12, 137, 1, // Opcode: SRA_B /* 5468 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 5481 /* 5472 */ MCD_OPC_CheckPredicate, 8, 58, 32, // Skip to: 13726 /* 5476 */ MCD_OPC_Decode, 156, 12, 138, 1, // Opcode: SRA_H /* 5481 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 5494 /* 5485 */ MCD_OPC_CheckPredicate, 8, 45, 32, // Skip to: 13726 /* 5489 */ MCD_OPC_Decode, 158, 12, 139, 1, // Opcode: SRA_W /* 5494 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 5507 /* 5498 */ MCD_OPC_CheckPredicate, 8, 32, 32, // Skip to: 13726 /* 5502 */ MCD_OPC_Decode, 155, 12, 140, 1, // Opcode: SRA_D /* 5507 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 5520 /* 5511 */ MCD_OPC_CheckPredicate, 8, 19, 32, // Skip to: 13726 /* 5515 */ MCD_OPC_Decode, 175, 12, 137, 1, // Opcode: SRL_B /* 5520 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 5533 /* 5524 */ MCD_OPC_CheckPredicate, 8, 6, 32, // Skip to: 13726 /* 5528 */ MCD_OPC_Decode, 177, 12, 138, 1, // Opcode: SRL_H /* 5533 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 5546 /* 5537 */ MCD_OPC_CheckPredicate, 8, 249, 31, // Skip to: 13726 /* 5541 */ MCD_OPC_Decode, 179, 12, 139, 1, // Opcode: SRL_W /* 5546 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 5559 /* 5550 */ MCD_OPC_CheckPredicate, 8, 236, 31, // Skip to: 13726 /* 5554 */ MCD_OPC_Decode, 176, 12, 140, 1, // Opcode: SRL_D /* 5559 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 5572 /* 5563 */ MCD_OPC_CheckPredicate, 8, 223, 31, // Skip to: 13726 /* 5567 */ MCD_OPC_Decode, 202, 1, 137, 1, // Opcode: BCLR_B /* 5572 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 5585 /* 5576 */ MCD_OPC_CheckPredicate, 8, 210, 31, // Skip to: 13726 /* 5580 */ MCD_OPC_Decode, 204, 1, 138, 1, // Opcode: BCLR_H /* 5585 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 5598 /* 5589 */ MCD_OPC_CheckPredicate, 8, 197, 31, // Skip to: 13726 /* 5593 */ MCD_OPC_Decode, 205, 1, 139, 1, // Opcode: BCLR_W /* 5598 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 5611 /* 5602 */ MCD_OPC_CheckPredicate, 8, 184, 31, // Skip to: 13726 /* 5606 */ MCD_OPC_Decode, 203, 1, 140, 1, // Opcode: BCLR_D /* 5611 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 5624 /* 5615 */ MCD_OPC_CheckPredicate, 8, 171, 31, // Skip to: 13726 /* 5619 */ MCD_OPC_Decode, 185, 2, 137, 1, // Opcode: BSET_B /* 5624 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 5637 /* 5628 */ MCD_OPC_CheckPredicate, 8, 158, 31, // Skip to: 13726 /* 5632 */ MCD_OPC_Decode, 187, 2, 138, 1, // Opcode: BSET_H /* 5637 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 5650 /* 5641 */ MCD_OPC_CheckPredicate, 8, 145, 31, // Skip to: 13726 /* 5645 */ MCD_OPC_Decode, 188, 2, 139, 1, // Opcode: BSET_W /* 5650 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 5663 /* 5654 */ MCD_OPC_CheckPredicate, 8, 132, 31, // Skip to: 13726 /* 5658 */ MCD_OPC_Decode, 186, 2, 140, 1, // Opcode: BSET_D /* 5663 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 5676 /* 5667 */ MCD_OPC_CheckPredicate, 8, 119, 31, // Skip to: 13726 /* 5671 */ MCD_OPC_Decode, 152, 2, 137, 1, // Opcode: BNEG_B /* 5676 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 5689 /* 5680 */ MCD_OPC_CheckPredicate, 8, 106, 31, // Skip to: 13726 /* 5684 */ MCD_OPC_Decode, 154, 2, 138, 1, // Opcode: BNEG_H /* 5689 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 5702 /* 5693 */ MCD_OPC_CheckPredicate, 8, 93, 31, // Skip to: 13726 /* 5697 */ MCD_OPC_Decode, 155, 2, 139, 1, // Opcode: BNEG_W /* 5702 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 5715 /* 5706 */ MCD_OPC_CheckPredicate, 8, 80, 31, // Skip to: 13726 /* 5710 */ MCD_OPC_Decode, 153, 2, 140, 1, // Opcode: BNEG_D /* 5715 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 5728 /* 5719 */ MCD_OPC_CheckPredicate, 8, 67, 31, // Skip to: 13726 /* 5723 */ MCD_OPC_Decode, 237, 1, 141, 1, // Opcode: BINSL_B /* 5728 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 5741 /* 5732 */ MCD_OPC_CheckPredicate, 8, 54, 31, // Skip to: 13726 /* 5736 */ MCD_OPC_Decode, 239, 1, 142, 1, // Opcode: BINSL_H /* 5741 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 5754 /* 5745 */ MCD_OPC_CheckPredicate, 8, 41, 31, // Skip to: 13726 /* 5749 */ MCD_OPC_Decode, 240, 1, 143, 1, // Opcode: BINSL_W /* 5754 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 5767 /* 5758 */ MCD_OPC_CheckPredicate, 8, 28, 31, // Skip to: 13726 /* 5762 */ MCD_OPC_Decode, 238, 1, 144, 1, // Opcode: BINSL_D /* 5767 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 5780 /* 5771 */ MCD_OPC_CheckPredicate, 8, 15, 31, // Skip to: 13726 /* 5775 */ MCD_OPC_Decode, 245, 1, 141, 1, // Opcode: BINSR_B /* 5780 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 5793 /* 5784 */ MCD_OPC_CheckPredicate, 8, 2, 31, // Skip to: 13726 /* 5788 */ MCD_OPC_Decode, 247, 1, 142, 1, // Opcode: BINSR_H /* 5793 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 5806 /* 5797 */ MCD_OPC_CheckPredicate, 8, 245, 30, // Skip to: 13726 /* 5801 */ MCD_OPC_Decode, 248, 1, 143, 1, // Opcode: BINSR_W /* 5806 */ MCD_OPC_FilterValue, 31, 236, 30, // Skip to: 13726 /* 5810 */ MCD_OPC_CheckPredicate, 8, 232, 30, // Skip to: 13726 /* 5814 */ MCD_OPC_Decode, 246, 1, 144, 1, // Opcode: BINSR_D /* 5819 */ MCD_OPC_FilterValue, 14, 159, 1, // Skip to: 6238 /* 5823 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 5826 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5838 /* 5830 */ MCD_OPC_CheckPredicate, 8, 212, 30, // Skip to: 13726 /* 5834 */ MCD_OPC_Decode, 63, 137, 1, // Opcode: ADDV_B /* 5838 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5850 /* 5842 */ MCD_OPC_CheckPredicate, 8, 200, 30, // Skip to: 13726 /* 5846 */ MCD_OPC_Decode, 65, 138, 1, // Opcode: ADDV_H /* 5850 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 5862 /* 5854 */ MCD_OPC_CheckPredicate, 8, 188, 30, // Skip to: 13726 /* 5858 */ MCD_OPC_Decode, 66, 139, 1, // Opcode: ADDV_W /* 5862 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 5874 /* 5866 */ MCD_OPC_CheckPredicate, 8, 176, 30, // Skip to: 13726 /* 5870 */ MCD_OPC_Decode, 64, 140, 1, // Opcode: ADDV_D /* 5874 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 5887 /* 5878 */ MCD_OPC_CheckPredicate, 8, 164, 30, // Skip to: 13726 /* 5882 */ MCD_OPC_Decode, 225, 12, 137, 1, // Opcode: SUBV_B /* 5887 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 5900 /* 5891 */ MCD_OPC_CheckPredicate, 8, 151, 30, // Skip to: 13726 /* 5895 */ MCD_OPC_Decode, 227, 12, 138, 1, // Opcode: SUBV_H /* 5900 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 5913 /* 5904 */ MCD_OPC_CheckPredicate, 8, 138, 30, // Skip to: 13726 /* 5908 */ MCD_OPC_Decode, 228, 12, 139, 1, // Opcode: SUBV_W /* 5913 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 5926 /* 5917 */ MCD_OPC_CheckPredicate, 8, 125, 30, // Skip to: 13726 /* 5921 */ MCD_OPC_Decode, 226, 12, 140, 1, // Opcode: SUBV_D /* 5926 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 5939 /* 5930 */ MCD_OPC_CheckPredicate, 8, 112, 30, // Skip to: 13726 /* 5934 */ MCD_OPC_Decode, 171, 8, 137, 1, // Opcode: MAX_S_B /* 5939 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 5952 /* 5943 */ MCD_OPC_CheckPredicate, 8, 99, 30, // Skip to: 13726 /* 5947 */ MCD_OPC_Decode, 173, 8, 138, 1, // Opcode: MAX_S_H /* 5952 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 5965 /* 5956 */ MCD_OPC_CheckPredicate, 8, 86, 30, // Skip to: 13726 /* 5960 */ MCD_OPC_Decode, 174, 8, 139, 1, // Opcode: MAX_S_W /* 5965 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 5978 /* 5969 */ MCD_OPC_CheckPredicate, 8, 73, 30, // Skip to: 13726 /* 5973 */ MCD_OPC_Decode, 172, 8, 140, 1, // Opcode: MAX_S_D /* 5978 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 5991 /* 5982 */ MCD_OPC_CheckPredicate, 8, 60, 30, // Skip to: 13726 /* 5986 */ MCD_OPC_Decode, 175, 8, 137, 1, // Opcode: MAX_U_B /* 5991 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 6004 /* 5995 */ MCD_OPC_CheckPredicate, 8, 47, 30, // Skip to: 13726 /* 5999 */ MCD_OPC_Decode, 177, 8, 138, 1, // Opcode: MAX_U_H /* 6004 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 6017 /* 6008 */ MCD_OPC_CheckPredicate, 8, 34, 30, // Skip to: 13726 /* 6012 */ MCD_OPC_Decode, 178, 8, 139, 1, // Opcode: MAX_U_W /* 6017 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 6030 /* 6021 */ MCD_OPC_CheckPredicate, 8, 21, 30, // Skip to: 13726 /* 6025 */ MCD_OPC_Decode, 176, 8, 140, 1, // Opcode: MAX_U_D /* 6030 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 6043 /* 6034 */ MCD_OPC_CheckPredicate, 8, 8, 30, // Skip to: 13726 /* 6038 */ MCD_OPC_Decode, 212, 8, 137, 1, // Opcode: MIN_S_B /* 6043 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 6056 /* 6047 */ MCD_OPC_CheckPredicate, 8, 251, 29, // Skip to: 13726 /* 6051 */ MCD_OPC_Decode, 214, 8, 138, 1, // Opcode: MIN_S_H /* 6056 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 6069 /* 6060 */ MCD_OPC_CheckPredicate, 8, 238, 29, // Skip to: 13726 /* 6064 */ MCD_OPC_Decode, 215, 8, 139, 1, // Opcode: MIN_S_W /* 6069 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 6082 /* 6073 */ MCD_OPC_CheckPredicate, 8, 225, 29, // Skip to: 13726 /* 6077 */ MCD_OPC_Decode, 213, 8, 140, 1, // Opcode: MIN_S_D /* 6082 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 6095 /* 6086 */ MCD_OPC_CheckPredicate, 8, 212, 29, // Skip to: 13726 /* 6090 */ MCD_OPC_Decode, 216, 8, 137, 1, // Opcode: MIN_U_B /* 6095 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 6108 /* 6099 */ MCD_OPC_CheckPredicate, 8, 199, 29, // Skip to: 13726 /* 6103 */ MCD_OPC_Decode, 218, 8, 138, 1, // Opcode: MIN_U_H /* 6108 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 6121 /* 6112 */ MCD_OPC_CheckPredicate, 8, 186, 29, // Skip to: 13726 /* 6116 */ MCD_OPC_Decode, 219, 8, 139, 1, // Opcode: MIN_U_W /* 6121 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 6134 /* 6125 */ MCD_OPC_CheckPredicate, 8, 173, 29, // Skip to: 13726 /* 6129 */ MCD_OPC_Decode, 217, 8, 140, 1, // Opcode: MIN_U_D /* 6134 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 6147 /* 6138 */ MCD_OPC_CheckPredicate, 8, 160, 29, // Skip to: 13726 /* 6142 */ MCD_OPC_Decode, 165, 8, 137, 1, // Opcode: MAX_A_B /* 6147 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 6160 /* 6151 */ MCD_OPC_CheckPredicate, 8, 147, 29, // Skip to: 13726 /* 6155 */ MCD_OPC_Decode, 167, 8, 138, 1, // Opcode: MAX_A_H /* 6160 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 6173 /* 6164 */ MCD_OPC_CheckPredicate, 8, 134, 29, // Skip to: 13726 /* 6168 */ MCD_OPC_Decode, 168, 8, 139, 1, // Opcode: MAX_A_W /* 6173 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 6186 /* 6177 */ MCD_OPC_CheckPredicate, 8, 121, 29, // Skip to: 13726 /* 6181 */ MCD_OPC_Decode, 166, 8, 140, 1, // Opcode: MAX_A_D /* 6186 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 6199 /* 6190 */ MCD_OPC_CheckPredicate, 8, 108, 29, // Skip to: 13726 /* 6194 */ MCD_OPC_Decode, 206, 8, 137, 1, // Opcode: MIN_A_B /* 6199 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 6212 /* 6203 */ MCD_OPC_CheckPredicate, 8, 95, 29, // Skip to: 13726 /* 6207 */ MCD_OPC_Decode, 208, 8, 138, 1, // Opcode: MIN_A_H /* 6212 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 6225 /* 6216 */ MCD_OPC_CheckPredicate, 8, 82, 29, // Skip to: 13726 /* 6220 */ MCD_OPC_Decode, 209, 8, 139, 1, // Opcode: MIN_A_W /* 6225 */ MCD_OPC_FilterValue, 31, 73, 29, // Skip to: 13726 /* 6229 */ MCD_OPC_CheckPredicate, 8, 69, 29, // Skip to: 13726 /* 6233 */ MCD_OPC_Decode, 207, 8, 140, 1, // Opcode: MIN_A_D /* 6238 */ MCD_OPC_FilterValue, 15, 7, 1, // Skip to: 6505 /* 6242 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 6245 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6258 /* 6249 */ MCD_OPC_CheckPredicate, 8, 49, 29, // Skip to: 13726 /* 6253 */ MCD_OPC_Decode, 234, 2, 137, 1, // Opcode: CEQ_B /* 6258 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 6271 /* 6262 */ MCD_OPC_CheckPredicate, 8, 36, 29, // Skip to: 13726 /* 6266 */ MCD_OPC_Decode, 236, 2, 138, 1, // Opcode: CEQ_H /* 6271 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 6284 /* 6275 */ MCD_OPC_CheckPredicate, 8, 23, 29, // Skip to: 13726 /* 6279 */ MCD_OPC_Decode, 237, 2, 139, 1, // Opcode: CEQ_W /* 6284 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 6297 /* 6288 */ MCD_OPC_CheckPredicate, 8, 10, 29, // Skip to: 13726 /* 6292 */ MCD_OPC_Decode, 235, 2, 140, 1, // Opcode: CEQ_D /* 6297 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 6310 /* 6301 */ MCD_OPC_CheckPredicate, 8, 253, 28, // Skip to: 13726 /* 6305 */ MCD_OPC_Decode, 144, 3, 137, 1, // Opcode: CLT_S_B /* 6310 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 6323 /* 6314 */ MCD_OPC_CheckPredicate, 8, 240, 28, // Skip to: 13726 /* 6318 */ MCD_OPC_Decode, 146, 3, 138, 1, // Opcode: CLT_S_H /* 6323 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 6336 /* 6327 */ MCD_OPC_CheckPredicate, 8, 227, 28, // Skip to: 13726 /* 6331 */ MCD_OPC_Decode, 147, 3, 139, 1, // Opcode: CLT_S_W /* 6336 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 6349 /* 6340 */ MCD_OPC_CheckPredicate, 8, 214, 28, // Skip to: 13726 /* 6344 */ MCD_OPC_Decode, 145, 3, 140, 1, // Opcode: CLT_S_D /* 6349 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 6362 /* 6353 */ MCD_OPC_CheckPredicate, 8, 201, 28, // Skip to: 13726 /* 6357 */ MCD_OPC_Decode, 148, 3, 137, 1, // Opcode: CLT_U_B /* 6362 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 6375 /* 6366 */ MCD_OPC_CheckPredicate, 8, 188, 28, // Skip to: 13726 /* 6370 */ MCD_OPC_Decode, 150, 3, 138, 1, // Opcode: CLT_U_H /* 6375 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 6388 /* 6379 */ MCD_OPC_CheckPredicate, 8, 175, 28, // Skip to: 13726 /* 6383 */ MCD_OPC_Decode, 151, 3, 139, 1, // Opcode: CLT_U_W /* 6388 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 6401 /* 6392 */ MCD_OPC_CheckPredicate, 8, 162, 28, // Skip to: 13726 /* 6396 */ MCD_OPC_Decode, 149, 3, 140, 1, // Opcode: CLT_U_D /* 6401 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 6414 /* 6405 */ MCD_OPC_CheckPredicate, 8, 149, 28, // Skip to: 13726 /* 6409 */ MCD_OPC_Decode, 253, 2, 137, 1, // Opcode: CLE_S_B /* 6414 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 6427 /* 6418 */ MCD_OPC_CheckPredicate, 8, 136, 28, // Skip to: 13726 /* 6422 */ MCD_OPC_Decode, 255, 2, 138, 1, // Opcode: CLE_S_H /* 6427 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 6440 /* 6431 */ MCD_OPC_CheckPredicate, 8, 123, 28, // Skip to: 13726 /* 6435 */ MCD_OPC_Decode, 128, 3, 139, 1, // Opcode: CLE_S_W /* 6440 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 6453 /* 6444 */ MCD_OPC_CheckPredicate, 8, 110, 28, // Skip to: 13726 /* 6448 */ MCD_OPC_Decode, 254, 2, 140, 1, // Opcode: CLE_S_D /* 6453 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 6466 /* 6457 */ MCD_OPC_CheckPredicate, 8, 97, 28, // Skip to: 13726 /* 6461 */ MCD_OPC_Decode, 129, 3, 137, 1, // Opcode: CLE_U_B /* 6466 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 6479 /* 6470 */ MCD_OPC_CheckPredicate, 8, 84, 28, // Skip to: 13726 /* 6474 */ MCD_OPC_Decode, 131, 3, 138, 1, // Opcode: CLE_U_H /* 6479 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 6492 /* 6483 */ MCD_OPC_CheckPredicate, 8, 71, 28, // Skip to: 13726 /* 6487 */ MCD_OPC_Decode, 132, 3, 139, 1, // Opcode: CLE_U_W /* 6492 */ MCD_OPC_FilterValue, 23, 62, 28, // Skip to: 13726 /* 6496 */ MCD_OPC_CheckPredicate, 8, 58, 28, // Skip to: 13726 /* 6500 */ MCD_OPC_Decode, 130, 3, 140, 1, // Opcode: CLE_U_D /* 6505 */ MCD_OPC_FilterValue, 16, 147, 1, // Skip to: 6912 /* 6509 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 6512 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6524 /* 6516 */ MCD_OPC_CheckPredicate, 8, 38, 28, // Skip to: 13726 /* 6520 */ MCD_OPC_Decode, 68, 137, 1, // Opcode: ADD_A_B /* 6524 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 6536 /* 6528 */ MCD_OPC_CheckPredicate, 8, 26, 28, // Skip to: 13726 /* 6532 */ MCD_OPC_Decode, 70, 138, 1, // Opcode: ADD_A_H /* 6536 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 6548 /* 6540 */ MCD_OPC_CheckPredicate, 8, 14, 28, // Skip to: 13726 /* 6544 */ MCD_OPC_Decode, 71, 139, 1, // Opcode: ADD_A_W /* 6548 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 6560 /* 6552 */ MCD_OPC_CheckPredicate, 8, 2, 28, // Skip to: 13726 /* 6556 */ MCD_OPC_Decode, 69, 140, 1, // Opcode: ADD_A_D /* 6560 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 6572 /* 6564 */ MCD_OPC_CheckPredicate, 8, 246, 27, // Skip to: 13726 /* 6568 */ MCD_OPC_Decode, 40, 137, 1, // Opcode: ADDS_A_B /* 6572 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 6584 /* 6576 */ MCD_OPC_CheckPredicate, 8, 234, 27, // Skip to: 13726 /* 6580 */ MCD_OPC_Decode, 42, 138, 1, // Opcode: ADDS_A_H /* 6584 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 6596 /* 6588 */ MCD_OPC_CheckPredicate, 8, 222, 27, // Skip to: 13726 /* 6592 */ MCD_OPC_Decode, 43, 139, 1, // Opcode: ADDS_A_W /* 6596 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 6608 /* 6600 */ MCD_OPC_CheckPredicate, 8, 210, 27, // Skip to: 13726 /* 6604 */ MCD_OPC_Decode, 41, 140, 1, // Opcode: ADDS_A_D /* 6608 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 6620 /* 6612 */ MCD_OPC_CheckPredicate, 8, 198, 27, // Skip to: 13726 /* 6616 */ MCD_OPC_Decode, 44, 137, 1, // Opcode: ADDS_S_B /* 6620 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 6632 /* 6624 */ MCD_OPC_CheckPredicate, 8, 186, 27, // Skip to: 13726 /* 6628 */ MCD_OPC_Decode, 46, 138, 1, // Opcode: ADDS_S_H /* 6632 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 6644 /* 6636 */ MCD_OPC_CheckPredicate, 8, 174, 27, // Skip to: 13726 /* 6640 */ MCD_OPC_Decode, 47, 139, 1, // Opcode: ADDS_S_W /* 6644 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 6656 /* 6648 */ MCD_OPC_CheckPredicate, 8, 162, 27, // Skip to: 13726 /* 6652 */ MCD_OPC_Decode, 45, 140, 1, // Opcode: ADDS_S_D /* 6656 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 6668 /* 6660 */ MCD_OPC_CheckPredicate, 8, 150, 27, // Skip to: 13726 /* 6664 */ MCD_OPC_Decode, 48, 137, 1, // Opcode: ADDS_U_B /* 6668 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 6680 /* 6672 */ MCD_OPC_CheckPredicate, 8, 138, 27, // Skip to: 13726 /* 6676 */ MCD_OPC_Decode, 50, 138, 1, // Opcode: ADDS_U_H /* 6680 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 6692 /* 6684 */ MCD_OPC_CheckPredicate, 8, 126, 27, // Skip to: 13726 /* 6688 */ MCD_OPC_Decode, 51, 139, 1, // Opcode: ADDS_U_W /* 6692 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 6704 /* 6696 */ MCD_OPC_CheckPredicate, 8, 114, 27, // Skip to: 13726 /* 6700 */ MCD_OPC_Decode, 49, 140, 1, // Opcode: ADDS_U_D /* 6704 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 6717 /* 6708 */ MCD_OPC_CheckPredicate, 8, 102, 27, // Skip to: 13726 /* 6712 */ MCD_OPC_Decode, 147, 1, 137, 1, // Opcode: AVE_S_B /* 6717 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 6730 /* 6721 */ MCD_OPC_CheckPredicate, 8, 89, 27, // Skip to: 13726 /* 6725 */ MCD_OPC_Decode, 149, 1, 138, 1, // Opcode: AVE_S_H /* 6730 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 6743 /* 6734 */ MCD_OPC_CheckPredicate, 8, 76, 27, // Skip to: 13726 /* 6738 */ MCD_OPC_Decode, 150, 1, 139, 1, // Opcode: AVE_S_W /* 6743 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 6756 /* 6747 */ MCD_OPC_CheckPredicate, 8, 63, 27, // Skip to: 13726 /* 6751 */ MCD_OPC_Decode, 148, 1, 140, 1, // Opcode: AVE_S_D /* 6756 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 6769 /* 6760 */ MCD_OPC_CheckPredicate, 8, 50, 27, // Skip to: 13726 /* 6764 */ MCD_OPC_Decode, 151, 1, 137, 1, // Opcode: AVE_U_B /* 6769 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 6782 /* 6773 */ MCD_OPC_CheckPredicate, 8, 37, 27, // Skip to: 13726 /* 6777 */ MCD_OPC_Decode, 153, 1, 138, 1, // Opcode: AVE_U_H /* 6782 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 6795 /* 6786 */ MCD_OPC_CheckPredicate, 8, 24, 27, // Skip to: 13726 /* 6790 */ MCD_OPC_Decode, 154, 1, 139, 1, // Opcode: AVE_U_W /* 6795 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 6808 /* 6799 */ MCD_OPC_CheckPredicate, 8, 11, 27, // Skip to: 13726 /* 6803 */ MCD_OPC_Decode, 152, 1, 140, 1, // Opcode: AVE_U_D /* 6808 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 6821 /* 6812 */ MCD_OPC_CheckPredicate, 8, 254, 26, // Skip to: 13726 /* 6816 */ MCD_OPC_Decode, 139, 1, 137, 1, // Opcode: AVER_S_B /* 6821 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 6834 /* 6825 */ MCD_OPC_CheckPredicate, 8, 241, 26, // Skip to: 13726 /* 6829 */ MCD_OPC_Decode, 141, 1, 138, 1, // Opcode: AVER_S_H /* 6834 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 6847 /* 6838 */ MCD_OPC_CheckPredicate, 8, 228, 26, // Skip to: 13726 /* 6842 */ MCD_OPC_Decode, 142, 1, 139, 1, // Opcode: AVER_S_W /* 6847 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 6860 /* 6851 */ MCD_OPC_CheckPredicate, 8, 215, 26, // Skip to: 13726 /* 6855 */ MCD_OPC_Decode, 140, 1, 140, 1, // Opcode: AVER_S_D /* 6860 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 6873 /* 6864 */ MCD_OPC_CheckPredicate, 8, 202, 26, // Skip to: 13726 /* 6868 */ MCD_OPC_Decode, 143, 1, 137, 1, // Opcode: AVER_U_B /* 6873 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 6886 /* 6877 */ MCD_OPC_CheckPredicate, 8, 189, 26, // Skip to: 13726 /* 6881 */ MCD_OPC_Decode, 145, 1, 138, 1, // Opcode: AVER_U_H /* 6886 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 6899 /* 6890 */ MCD_OPC_CheckPredicate, 8, 176, 26, // Skip to: 13726 /* 6894 */ MCD_OPC_Decode, 146, 1, 139, 1, // Opcode: AVER_U_W /* 6899 */ MCD_OPC_FilterValue, 31, 167, 26, // Skip to: 13726 /* 6903 */ MCD_OPC_CheckPredicate, 8, 163, 26, // Skip to: 13726 /* 6907 */ MCD_OPC_Decode, 144, 1, 140, 1, // Opcode: AVER_U_D /* 6912 */ MCD_OPC_FilterValue, 17, 51, 1, // Skip to: 7223 /* 6916 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 6919 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 6932 /* 6923 */ MCD_OPC_CheckPredicate, 8, 143, 26, // Skip to: 13726 /* 6927 */ MCD_OPC_Decode, 206, 12, 137, 1, // Opcode: SUBS_S_B /* 6932 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 6945 /* 6936 */ MCD_OPC_CheckPredicate, 8, 130, 26, // Skip to: 13726 /* 6940 */ MCD_OPC_Decode, 208, 12, 138, 1, // Opcode: SUBS_S_H /* 6945 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 6958 /* 6949 */ MCD_OPC_CheckPredicate, 8, 117, 26, // Skip to: 13726 /* 6953 */ MCD_OPC_Decode, 209, 12, 139, 1, // Opcode: SUBS_S_W /* 6958 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 6971 /* 6962 */ MCD_OPC_CheckPredicate, 8, 104, 26, // Skip to: 13726 /* 6966 */ MCD_OPC_Decode, 207, 12, 140, 1, // Opcode: SUBS_S_D /* 6971 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 6984 /* 6975 */ MCD_OPC_CheckPredicate, 8, 91, 26, // Skip to: 13726 /* 6979 */ MCD_OPC_Decode, 210, 12, 137, 1, // Opcode: SUBS_U_B /* 6984 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 6997 /* 6988 */ MCD_OPC_CheckPredicate, 8, 78, 26, // Skip to: 13726 /* 6992 */ MCD_OPC_Decode, 212, 12, 138, 1, // Opcode: SUBS_U_H /* 6997 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 7010 /* 7001 */ MCD_OPC_CheckPredicate, 8, 65, 26, // Skip to: 13726 /* 7005 */ MCD_OPC_Decode, 213, 12, 139, 1, // Opcode: SUBS_U_W /* 7010 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 7023 /* 7014 */ MCD_OPC_CheckPredicate, 8, 52, 26, // Skip to: 13726 /* 7018 */ MCD_OPC_Decode, 211, 12, 140, 1, // Opcode: SUBS_U_D /* 7023 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 7036 /* 7027 */ MCD_OPC_CheckPredicate, 8, 39, 26, // Skip to: 13726 /* 7031 */ MCD_OPC_Decode, 198, 12, 137, 1, // Opcode: SUBSUS_U_B /* 7036 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 7049 /* 7040 */ MCD_OPC_CheckPredicate, 8, 26, 26, // Skip to: 13726 /* 7044 */ MCD_OPC_Decode, 200, 12, 138, 1, // Opcode: SUBSUS_U_H /* 7049 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 7062 /* 7053 */ MCD_OPC_CheckPredicate, 8, 13, 26, // Skip to: 13726 /* 7057 */ MCD_OPC_Decode, 201, 12, 139, 1, // Opcode: SUBSUS_U_W /* 7062 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 7075 /* 7066 */ MCD_OPC_CheckPredicate, 8, 0, 26, // Skip to: 13726 /* 7070 */ MCD_OPC_Decode, 199, 12, 140, 1, // Opcode: SUBSUS_U_D /* 7075 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 7088 /* 7079 */ MCD_OPC_CheckPredicate, 8, 243, 25, // Skip to: 13726 /* 7083 */ MCD_OPC_Decode, 202, 12, 137, 1, // Opcode: SUBSUU_S_B /* 7088 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 7101 /* 7092 */ MCD_OPC_CheckPredicate, 8, 230, 25, // Skip to: 13726 /* 7096 */ MCD_OPC_Decode, 204, 12, 138, 1, // Opcode: SUBSUU_S_H /* 7101 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 7114 /* 7105 */ MCD_OPC_CheckPredicate, 8, 217, 25, // Skip to: 13726 /* 7109 */ MCD_OPC_Decode, 205, 12, 139, 1, // Opcode: SUBSUU_S_W /* 7114 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 7127 /* 7118 */ MCD_OPC_CheckPredicate, 8, 204, 25, // Skip to: 13726 /* 7122 */ MCD_OPC_Decode, 203, 12, 140, 1, // Opcode: SUBSUU_S_D /* 7127 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 7139 /* 7131 */ MCD_OPC_CheckPredicate, 8, 191, 25, // Skip to: 13726 /* 7135 */ MCD_OPC_Decode, 97, 137, 1, // Opcode: ASUB_S_B /* 7139 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 7151 /* 7143 */ MCD_OPC_CheckPredicate, 8, 179, 25, // Skip to: 13726 /* 7147 */ MCD_OPC_Decode, 99, 138, 1, // Opcode: ASUB_S_H /* 7151 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 7163 /* 7155 */ MCD_OPC_CheckPredicate, 8, 167, 25, // Skip to: 13726 /* 7159 */ MCD_OPC_Decode, 100, 139, 1, // Opcode: ASUB_S_W /* 7163 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 7175 /* 7167 */ MCD_OPC_CheckPredicate, 8, 155, 25, // Skip to: 13726 /* 7171 */ MCD_OPC_Decode, 98, 140, 1, // Opcode: ASUB_S_D /* 7175 */ MCD_OPC_FilterValue, 20, 8, 0, // Skip to: 7187 /* 7179 */ MCD_OPC_CheckPredicate, 8, 143, 25, // Skip to: 13726 /* 7183 */ MCD_OPC_Decode, 101, 137, 1, // Opcode: ASUB_U_B /* 7187 */ MCD_OPC_FilterValue, 21, 8, 0, // Skip to: 7199 /* 7191 */ MCD_OPC_CheckPredicate, 8, 131, 25, // Skip to: 13726 /* 7195 */ MCD_OPC_Decode, 103, 138, 1, // Opcode: ASUB_U_H /* 7199 */ MCD_OPC_FilterValue, 22, 8, 0, // Skip to: 7211 /* 7203 */ MCD_OPC_CheckPredicate, 8, 119, 25, // Skip to: 13726 /* 7207 */ MCD_OPC_Decode, 104, 139, 1, // Opcode: ASUB_U_W /* 7211 */ MCD_OPC_FilterValue, 23, 111, 25, // Skip to: 13726 /* 7215 */ MCD_OPC_CheckPredicate, 8, 107, 25, // Skip to: 13726 /* 7219 */ MCD_OPC_Decode, 102, 140, 1, // Opcode: ASUB_U_D /* 7223 */ MCD_OPC_FilterValue, 18, 111, 1, // Skip to: 7594 /* 7227 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 7230 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7243 /* 7234 */ MCD_OPC_CheckPredicate, 8, 88, 25, // Skip to: 13726 /* 7238 */ MCD_OPC_Decode, 213, 9, 137, 1, // Opcode: MULV_B /* 7243 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 7256 /* 7247 */ MCD_OPC_CheckPredicate, 8, 75, 25, // Skip to: 13726 /* 7251 */ MCD_OPC_Decode, 215, 9, 138, 1, // Opcode: MULV_H /* 7256 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 7269 /* 7260 */ MCD_OPC_CheckPredicate, 8, 62, 25, // Skip to: 13726 /* 7264 */ MCD_OPC_Decode, 216, 9, 139, 1, // Opcode: MULV_W /* 7269 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 7282 /* 7273 */ MCD_OPC_CheckPredicate, 8, 49, 25, // Skip to: 13726 /* 7277 */ MCD_OPC_Decode, 214, 9, 140, 1, // Opcode: MULV_D /* 7282 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 7295 /* 7286 */ MCD_OPC_CheckPredicate, 8, 36, 25, // Skip to: 13726 /* 7290 */ MCD_OPC_Decode, 138, 8, 141, 1, // Opcode: MADDV_B /* 7295 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 7308 /* 7299 */ MCD_OPC_CheckPredicate, 8, 23, 25, // Skip to: 13726 /* 7303 */ MCD_OPC_Decode, 140, 8, 142, 1, // Opcode: MADDV_H /* 7308 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 7321 /* 7312 */ MCD_OPC_CheckPredicate, 8, 10, 25, // Skip to: 13726 /* 7316 */ MCD_OPC_Decode, 141, 8, 143, 1, // Opcode: MADDV_W /* 7321 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 7334 /* 7325 */ MCD_OPC_CheckPredicate, 8, 253, 24, // Skip to: 13726 /* 7329 */ MCD_OPC_Decode, 139, 8, 144, 1, // Opcode: MADDV_D /* 7334 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 7347 /* 7338 */ MCD_OPC_CheckPredicate, 8, 240, 24, // Skip to: 13726 /* 7342 */ MCD_OPC_Decode, 156, 9, 141, 1, // Opcode: MSUBV_B /* 7347 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 7360 /* 7351 */ MCD_OPC_CheckPredicate, 8, 227, 24, // Skip to: 13726 /* 7355 */ MCD_OPC_Decode, 158, 9, 142, 1, // Opcode: MSUBV_H /* 7360 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 7373 /* 7364 */ MCD_OPC_CheckPredicate, 8, 214, 24, // Skip to: 13726 /* 7368 */ MCD_OPC_Decode, 159, 9, 143, 1, // Opcode: MSUBV_W /* 7373 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 7386 /* 7377 */ MCD_OPC_CheckPredicate, 8, 201, 24, // Skip to: 13726 /* 7381 */ MCD_OPC_Decode, 157, 9, 144, 1, // Opcode: MSUBV_D /* 7386 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 7399 /* 7390 */ MCD_OPC_CheckPredicate, 8, 188, 24, // Skip to: 13726 /* 7394 */ MCD_OPC_Decode, 185, 4, 137, 1, // Opcode: DIV_S_B /* 7399 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 7412 /* 7403 */ MCD_OPC_CheckPredicate, 8, 175, 24, // Skip to: 13726 /* 7407 */ MCD_OPC_Decode, 187, 4, 138, 1, // Opcode: DIV_S_H /* 7412 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 7425 /* 7416 */ MCD_OPC_CheckPredicate, 8, 162, 24, // Skip to: 13726 /* 7420 */ MCD_OPC_Decode, 188, 4, 139, 1, // Opcode: DIV_S_W /* 7425 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 7438 /* 7429 */ MCD_OPC_CheckPredicate, 8, 149, 24, // Skip to: 13726 /* 7433 */ MCD_OPC_Decode, 186, 4, 140, 1, // Opcode: DIV_S_D /* 7438 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 7451 /* 7442 */ MCD_OPC_CheckPredicate, 8, 136, 24, // Skip to: 13726 /* 7446 */ MCD_OPC_Decode, 189, 4, 137, 1, // Opcode: DIV_U_B /* 7451 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 7464 /* 7455 */ MCD_OPC_CheckPredicate, 8, 123, 24, // Skip to: 13726 /* 7459 */ MCD_OPC_Decode, 191, 4, 138, 1, // Opcode: DIV_U_H /* 7464 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 7477 /* 7468 */ MCD_OPC_CheckPredicate, 8, 110, 24, // Skip to: 13726 /* 7472 */ MCD_OPC_Decode, 192, 4, 139, 1, // Opcode: DIV_U_W /* 7477 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 7490 /* 7481 */ MCD_OPC_CheckPredicate, 8, 97, 24, // Skip to: 13726 /* 7485 */ MCD_OPC_Decode, 190, 4, 140, 1, // Opcode: DIV_U_D /* 7490 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 7503 /* 7494 */ MCD_OPC_CheckPredicate, 8, 84, 24, // Skip to: 13726 /* 7498 */ MCD_OPC_Decode, 225, 8, 137, 1, // Opcode: MOD_S_B /* 7503 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 7516 /* 7507 */ MCD_OPC_CheckPredicate, 8, 71, 24, // Skip to: 13726 /* 7511 */ MCD_OPC_Decode, 227, 8, 138, 1, // Opcode: MOD_S_H /* 7516 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 7529 /* 7520 */ MCD_OPC_CheckPredicate, 8, 58, 24, // Skip to: 13726 /* 7524 */ MCD_OPC_Decode, 228, 8, 139, 1, // Opcode: MOD_S_W /* 7529 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 7542 /* 7533 */ MCD_OPC_CheckPredicate, 8, 45, 24, // Skip to: 13726 /* 7537 */ MCD_OPC_Decode, 226, 8, 140, 1, // Opcode: MOD_S_D /* 7542 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 7555 /* 7546 */ MCD_OPC_CheckPredicate, 8, 32, 24, // Skip to: 13726 /* 7550 */ MCD_OPC_Decode, 229, 8, 137, 1, // Opcode: MOD_U_B /* 7555 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 7568 /* 7559 */ MCD_OPC_CheckPredicate, 8, 19, 24, // Skip to: 13726 /* 7563 */ MCD_OPC_Decode, 231, 8, 138, 1, // Opcode: MOD_U_H /* 7568 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 7581 /* 7572 */ MCD_OPC_CheckPredicate, 8, 6, 24, // Skip to: 13726 /* 7576 */ MCD_OPC_Decode, 232, 8, 139, 1, // Opcode: MOD_U_W /* 7581 */ MCD_OPC_FilterValue, 31, 253, 23, // Skip to: 13726 /* 7585 */ MCD_OPC_CheckPredicate, 8, 249, 23, // Skip to: 13726 /* 7589 */ MCD_OPC_Decode, 230, 8, 140, 1, // Opcode: MOD_U_D /* 7594 */ MCD_OPC_FilterValue, 19, 237, 0, // Skip to: 7835 /* 7598 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 7601 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 7614 /* 7605 */ MCD_OPC_CheckPredicate, 8, 229, 23, // Skip to: 13726 /* 7609 */ MCD_OPC_Decode, 212, 4, 145, 1, // Opcode: DOTP_S_H /* 7614 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 7627 /* 7618 */ MCD_OPC_CheckPredicate, 8, 216, 23, // Skip to: 13726 /* 7622 */ MCD_OPC_Decode, 213, 4, 146, 1, // Opcode: DOTP_S_W /* 7627 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 7640 /* 7631 */ MCD_OPC_CheckPredicate, 8, 203, 23, // Skip to: 13726 /* 7635 */ MCD_OPC_Decode, 211, 4, 147, 1, // Opcode: DOTP_S_D /* 7640 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 7653 /* 7644 */ MCD_OPC_CheckPredicate, 8, 190, 23, // Skip to: 13726 /* 7648 */ MCD_OPC_Decode, 215, 4, 145, 1, // Opcode: DOTP_U_H /* 7653 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 7666 /* 7657 */ MCD_OPC_CheckPredicate, 8, 177, 23, // Skip to: 13726 /* 7661 */ MCD_OPC_Decode, 216, 4, 146, 1, // Opcode: DOTP_U_W /* 7666 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 7679 /* 7670 */ MCD_OPC_CheckPredicate, 8, 164, 23, // Skip to: 13726 /* 7674 */ MCD_OPC_Decode, 214, 4, 147, 1, // Opcode: DOTP_U_D /* 7679 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 7692 /* 7683 */ MCD_OPC_CheckPredicate, 8, 151, 23, // Skip to: 13726 /* 7687 */ MCD_OPC_Decode, 218, 4, 148, 1, // Opcode: DPADD_S_H /* 7692 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 7705 /* 7696 */ MCD_OPC_CheckPredicate, 8, 138, 23, // Skip to: 13726 /* 7700 */ MCD_OPC_Decode, 219, 4, 149, 1, // Opcode: DPADD_S_W /* 7705 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 7718 /* 7709 */ MCD_OPC_CheckPredicate, 8, 125, 23, // Skip to: 13726 /* 7713 */ MCD_OPC_Decode, 217, 4, 150, 1, // Opcode: DPADD_S_D /* 7718 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 7731 /* 7722 */ MCD_OPC_CheckPredicate, 8, 112, 23, // Skip to: 13726 /* 7726 */ MCD_OPC_Decode, 221, 4, 148, 1, // Opcode: DPADD_U_H /* 7731 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 7744 /* 7735 */ MCD_OPC_CheckPredicate, 8, 99, 23, // Skip to: 13726 /* 7739 */ MCD_OPC_Decode, 222, 4, 149, 1, // Opcode: DPADD_U_W /* 7744 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 7757 /* 7748 */ MCD_OPC_CheckPredicate, 8, 86, 23, // Skip to: 13726 /* 7752 */ MCD_OPC_Decode, 220, 4, 150, 1, // Opcode: DPADD_U_D /* 7757 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 7770 /* 7761 */ MCD_OPC_CheckPredicate, 8, 73, 23, // Skip to: 13726 /* 7765 */ MCD_OPC_Decode, 237, 4, 148, 1, // Opcode: DPSUB_S_H /* 7770 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 7783 /* 7774 */ MCD_OPC_CheckPredicate, 8, 60, 23, // Skip to: 13726 /* 7778 */ MCD_OPC_Decode, 238, 4, 149, 1, // Opcode: DPSUB_S_W /* 7783 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 7796 /* 7787 */ MCD_OPC_CheckPredicate, 8, 47, 23, // Skip to: 13726 /* 7791 */ MCD_OPC_Decode, 236, 4, 150, 1, // Opcode: DPSUB_S_D /* 7796 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 7809 /* 7800 */ MCD_OPC_CheckPredicate, 8, 34, 23, // Skip to: 13726 /* 7804 */ MCD_OPC_Decode, 240, 4, 148, 1, // Opcode: DPSUB_U_H /* 7809 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 7822 /* 7813 */ MCD_OPC_CheckPredicate, 8, 21, 23, // Skip to: 13726 /* 7817 */ MCD_OPC_Decode, 241, 4, 149, 1, // Opcode: DPSUB_U_W /* 7822 */ MCD_OPC_FilterValue, 23, 12, 23, // Skip to: 13726 /* 7826 */ MCD_OPC_CheckPredicate, 8, 8, 23, // Skip to: 13726 /* 7830 */ MCD_OPC_Decode, 239, 4, 150, 1, // Opcode: DPSUB_U_D /* 7835 */ MCD_OPC_FilterValue, 20, 163, 1, // Skip to: 8258 /* 7839 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 7842 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 7855 /* 7846 */ MCD_OPC_CheckPredicate, 8, 244, 22, // Skip to: 13726 /* 7850 */ MCD_OPC_Decode, 221, 11, 151, 1, // Opcode: SLD_B /* 7855 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 7868 /* 7859 */ MCD_OPC_CheckPredicate, 8, 231, 22, // Skip to: 13726 /* 7863 */ MCD_OPC_Decode, 223, 11, 152, 1, // Opcode: SLD_H /* 7868 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 7881 /* 7872 */ MCD_OPC_CheckPredicate, 8, 218, 22, // Skip to: 13726 /* 7876 */ MCD_OPC_Decode, 224, 11, 153, 1, // Opcode: SLD_W /* 7881 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 7894 /* 7885 */ MCD_OPC_CheckPredicate, 8, 205, 22, // Skip to: 13726 /* 7889 */ MCD_OPC_Decode, 222, 11, 154, 1, // Opcode: SLD_D /* 7894 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 7907 /* 7898 */ MCD_OPC_CheckPredicate, 8, 192, 22, // Skip to: 13726 /* 7902 */ MCD_OPC_Decode, 135, 12, 155, 1, // Opcode: SPLAT_B /* 7907 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 7920 /* 7911 */ MCD_OPC_CheckPredicate, 8, 179, 22, // Skip to: 13726 /* 7915 */ MCD_OPC_Decode, 137, 12, 156, 1, // Opcode: SPLAT_H /* 7920 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 7933 /* 7924 */ MCD_OPC_CheckPredicate, 8, 166, 22, // Skip to: 13726 /* 7928 */ MCD_OPC_Decode, 138, 12, 157, 1, // Opcode: SPLAT_W /* 7933 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 7946 /* 7937 */ MCD_OPC_CheckPredicate, 8, 153, 22, // Skip to: 13726 /* 7941 */ MCD_OPC_Decode, 136, 12, 158, 1, // Opcode: SPLAT_D /* 7946 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 7959 /* 7950 */ MCD_OPC_CheckPredicate, 8, 140, 22, // Skip to: 13726 /* 7954 */ MCD_OPC_Decode, 149, 10, 137, 1, // Opcode: PCKEV_B /* 7959 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 7972 /* 7963 */ MCD_OPC_CheckPredicate, 8, 127, 22, // Skip to: 13726 /* 7967 */ MCD_OPC_Decode, 151, 10, 138, 1, // Opcode: PCKEV_H /* 7972 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 7985 /* 7976 */ MCD_OPC_CheckPredicate, 8, 114, 22, // Skip to: 13726 /* 7980 */ MCD_OPC_Decode, 152, 10, 139, 1, // Opcode: PCKEV_W /* 7985 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 7998 /* 7989 */ MCD_OPC_CheckPredicate, 8, 101, 22, // Skip to: 13726 /* 7993 */ MCD_OPC_Decode, 150, 10, 140, 1, // Opcode: PCKEV_D /* 7998 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 8011 /* 8002 */ MCD_OPC_CheckPredicate, 8, 88, 22, // Skip to: 13726 /* 8006 */ MCD_OPC_Decode, 153, 10, 137, 1, // Opcode: PCKOD_B /* 8011 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 8024 /* 8015 */ MCD_OPC_CheckPredicate, 8, 75, 22, // Skip to: 13726 /* 8019 */ MCD_OPC_Decode, 155, 10, 138, 1, // Opcode: PCKOD_H /* 8024 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 8037 /* 8028 */ MCD_OPC_CheckPredicate, 8, 62, 22, // Skip to: 13726 /* 8032 */ MCD_OPC_Decode, 156, 10, 139, 1, // Opcode: PCKOD_W /* 8037 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 8050 /* 8041 */ MCD_OPC_CheckPredicate, 8, 49, 22, // Skip to: 13726 /* 8045 */ MCD_OPC_Decode, 154, 10, 140, 1, // Opcode: PCKOD_D /* 8050 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 8063 /* 8054 */ MCD_OPC_CheckPredicate, 8, 36, 22, // Skip to: 13726 /* 8058 */ MCD_OPC_Decode, 216, 6, 137, 1, // Opcode: ILVL_B /* 8063 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 8076 /* 8067 */ MCD_OPC_CheckPredicate, 8, 23, 22, // Skip to: 13726 /* 8071 */ MCD_OPC_Decode, 218, 6, 138, 1, // Opcode: ILVL_H /* 8076 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 8089 /* 8080 */ MCD_OPC_CheckPredicate, 8, 10, 22, // Skip to: 13726 /* 8084 */ MCD_OPC_Decode, 219, 6, 139, 1, // Opcode: ILVL_W /* 8089 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 8102 /* 8093 */ MCD_OPC_CheckPredicate, 8, 253, 21, // Skip to: 13726 /* 8097 */ MCD_OPC_Decode, 217, 6, 140, 1, // Opcode: ILVL_D /* 8102 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 8115 /* 8106 */ MCD_OPC_CheckPredicate, 8, 240, 21, // Skip to: 13726 /* 8110 */ MCD_OPC_Decode, 224, 6, 137, 1, // Opcode: ILVR_B /* 8115 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 8128 /* 8119 */ MCD_OPC_CheckPredicate, 8, 227, 21, // Skip to: 13726 /* 8123 */ MCD_OPC_Decode, 226, 6, 138, 1, // Opcode: ILVR_H /* 8128 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 8141 /* 8132 */ MCD_OPC_CheckPredicate, 8, 214, 21, // Skip to: 13726 /* 8136 */ MCD_OPC_Decode, 227, 6, 139, 1, // Opcode: ILVR_W /* 8141 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 8154 /* 8145 */ MCD_OPC_CheckPredicate, 8, 201, 21, // Skip to: 13726 /* 8149 */ MCD_OPC_Decode, 225, 6, 140, 1, // Opcode: ILVR_D /* 8154 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 8167 /* 8158 */ MCD_OPC_CheckPredicate, 8, 188, 21, // Skip to: 13726 /* 8162 */ MCD_OPC_Decode, 212, 6, 137, 1, // Opcode: ILVEV_B /* 8167 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 8180 /* 8171 */ MCD_OPC_CheckPredicate, 8, 175, 21, // Skip to: 13726 /* 8175 */ MCD_OPC_Decode, 214, 6, 138, 1, // Opcode: ILVEV_H /* 8180 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 8193 /* 8184 */ MCD_OPC_CheckPredicate, 8, 162, 21, // Skip to: 13726 /* 8188 */ MCD_OPC_Decode, 215, 6, 139, 1, // Opcode: ILVEV_W /* 8193 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 8206 /* 8197 */ MCD_OPC_CheckPredicate, 8, 149, 21, // Skip to: 13726 /* 8201 */ MCD_OPC_Decode, 213, 6, 140, 1, // Opcode: ILVEV_D /* 8206 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 8219 /* 8210 */ MCD_OPC_CheckPredicate, 8, 136, 21, // Skip to: 13726 /* 8214 */ MCD_OPC_Decode, 220, 6, 137, 1, // Opcode: ILVOD_B /* 8219 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 8232 /* 8223 */ MCD_OPC_CheckPredicate, 8, 123, 21, // Skip to: 13726 /* 8227 */ MCD_OPC_Decode, 222, 6, 138, 1, // Opcode: ILVOD_H /* 8232 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 8245 /* 8236 */ MCD_OPC_CheckPredicate, 8, 110, 21, // Skip to: 13726 /* 8240 */ MCD_OPC_Decode, 223, 6, 139, 1, // Opcode: ILVOD_W /* 8245 */ MCD_OPC_FilterValue, 31, 101, 21, // Skip to: 13726 /* 8249 */ MCD_OPC_CheckPredicate, 8, 97, 21, // Skip to: 13726 /* 8253 */ MCD_OPC_Decode, 221, 6, 140, 1, // Opcode: ILVOD_D /* 8258 */ MCD_OPC_FilterValue, 21, 59, 1, // Skip to: 8577 /* 8262 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 8265 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8278 /* 8269 */ MCD_OPC_CheckPredicate, 8, 77, 21, // Skip to: 13726 /* 8273 */ MCD_OPC_Decode, 227, 13, 141, 1, // Opcode: VSHF_B /* 8278 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 8291 /* 8282 */ MCD_OPC_CheckPredicate, 8, 64, 21, // Skip to: 13726 /* 8286 */ MCD_OPC_Decode, 229, 13, 142, 1, // Opcode: VSHF_H /* 8291 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 8304 /* 8295 */ MCD_OPC_CheckPredicate, 8, 51, 21, // Skip to: 13726 /* 8299 */ MCD_OPC_Decode, 230, 13, 143, 1, // Opcode: VSHF_W /* 8304 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 8317 /* 8308 */ MCD_OPC_CheckPredicate, 8, 38, 21, // Skip to: 13726 /* 8312 */ MCD_OPC_Decode, 228, 13, 144, 1, // Opcode: VSHF_D /* 8317 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 8330 /* 8321 */ MCD_OPC_CheckPredicate, 8, 25, 21, // Skip to: 13726 /* 8325 */ MCD_OPC_Decode, 148, 12, 137, 1, // Opcode: SRAR_B /* 8330 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 8343 /* 8334 */ MCD_OPC_CheckPredicate, 8, 12, 21, // Skip to: 13726 /* 8338 */ MCD_OPC_Decode, 150, 12, 138, 1, // Opcode: SRAR_H /* 8343 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 8356 /* 8347 */ MCD_OPC_CheckPredicate, 8, 255, 20, // Skip to: 13726 /* 8351 */ MCD_OPC_Decode, 151, 12, 139, 1, // Opcode: SRAR_W /* 8356 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 8369 /* 8360 */ MCD_OPC_CheckPredicate, 8, 242, 20, // Skip to: 13726 /* 8364 */ MCD_OPC_Decode, 149, 12, 140, 1, // Opcode: SRAR_D /* 8369 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 8382 /* 8373 */ MCD_OPC_CheckPredicate, 8, 229, 20, // Skip to: 13726 /* 8377 */ MCD_OPC_Decode, 169, 12, 137, 1, // Opcode: SRLR_B /* 8382 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 8395 /* 8386 */ MCD_OPC_CheckPredicate, 8, 216, 20, // Skip to: 13726 /* 8390 */ MCD_OPC_Decode, 171, 12, 138, 1, // Opcode: SRLR_H /* 8395 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 8408 /* 8399 */ MCD_OPC_CheckPredicate, 8, 203, 20, // Skip to: 13726 /* 8403 */ MCD_OPC_Decode, 172, 12, 139, 1, // Opcode: SRLR_W /* 8408 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 8421 /* 8412 */ MCD_OPC_CheckPredicate, 8, 190, 20, // Skip to: 13726 /* 8416 */ MCD_OPC_Decode, 170, 12, 140, 1, // Opcode: SRLR_D /* 8421 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 8434 /* 8425 */ MCD_OPC_CheckPredicate, 8, 177, 20, // Skip to: 13726 /* 8429 */ MCD_OPC_Decode, 201, 6, 145, 1, // Opcode: HADD_S_H /* 8434 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 8447 /* 8438 */ MCD_OPC_CheckPredicate, 8, 164, 20, // Skip to: 13726 /* 8442 */ MCD_OPC_Decode, 202, 6, 146, 1, // Opcode: HADD_S_W /* 8447 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 8460 /* 8451 */ MCD_OPC_CheckPredicate, 8, 151, 20, // Skip to: 13726 /* 8455 */ MCD_OPC_Decode, 200, 6, 147, 1, // Opcode: HADD_S_D /* 8460 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 8473 /* 8464 */ MCD_OPC_CheckPredicate, 8, 138, 20, // Skip to: 13726 /* 8468 */ MCD_OPC_Decode, 204, 6, 145, 1, // Opcode: HADD_U_H /* 8473 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 8486 /* 8477 */ MCD_OPC_CheckPredicate, 8, 125, 20, // Skip to: 13726 /* 8481 */ MCD_OPC_Decode, 205, 6, 146, 1, // Opcode: HADD_U_W /* 8486 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 8499 /* 8490 */ MCD_OPC_CheckPredicate, 8, 112, 20, // Skip to: 13726 /* 8494 */ MCD_OPC_Decode, 203, 6, 147, 1, // Opcode: HADD_U_D /* 8499 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 8512 /* 8503 */ MCD_OPC_CheckPredicate, 8, 99, 20, // Skip to: 13726 /* 8507 */ MCD_OPC_Decode, 207, 6, 145, 1, // Opcode: HSUB_S_H /* 8512 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 8525 /* 8516 */ MCD_OPC_CheckPredicate, 8, 86, 20, // Skip to: 13726 /* 8520 */ MCD_OPC_Decode, 208, 6, 146, 1, // Opcode: HSUB_S_W /* 8525 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 8538 /* 8529 */ MCD_OPC_CheckPredicate, 8, 73, 20, // Skip to: 13726 /* 8533 */ MCD_OPC_Decode, 206, 6, 147, 1, // Opcode: HSUB_S_D /* 8538 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 8551 /* 8542 */ MCD_OPC_CheckPredicate, 8, 60, 20, // Skip to: 13726 /* 8546 */ MCD_OPC_Decode, 210, 6, 145, 1, // Opcode: HSUB_U_H /* 8551 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 8564 /* 8555 */ MCD_OPC_CheckPredicate, 8, 47, 20, // Skip to: 13726 /* 8559 */ MCD_OPC_Decode, 211, 6, 146, 1, // Opcode: HSUB_U_W /* 8564 */ MCD_OPC_FilterValue, 31, 38, 20, // Skip to: 13726 /* 8568 */ MCD_OPC_CheckPredicate, 8, 34, 20, // Skip to: 13726 /* 8572 */ MCD_OPC_Decode, 209, 6, 147, 1, // Opcode: HSUB_U_D /* 8577 */ MCD_OPC_FilterValue, 25, 230, 1, // Skip to: 9067 /* 8581 */ MCD_OPC_ExtractField, 20, 6, // Inst{25-20} ... /* 8584 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8597 /* 8588 */ MCD_OPC_CheckPredicate, 8, 14, 20, // Skip to: 13726 /* 8592 */ MCD_OPC_Decode, 217, 11, 159, 1, // Opcode: SLDI_B /* 8597 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 8616 /* 8601 */ MCD_OPC_CheckPredicate, 8, 1, 20, // Skip to: 13726 /* 8605 */ MCD_OPC_CheckField, 19, 1, 0, 251, 19, // Skip to: 13726 /* 8611 */ MCD_OPC_Decode, 219, 11, 160, 1, // Opcode: SLDI_H /* 8616 */ MCD_OPC_FilterValue, 3, 54, 0, // Skip to: 8674 /* 8620 */ MCD_OPC_ExtractField, 18, 2, // Inst{19-18} ... /* 8623 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8636 /* 8627 */ MCD_OPC_CheckPredicate, 8, 231, 19, // Skip to: 13726 /* 8631 */ MCD_OPC_Decode, 220, 11, 161, 1, // Opcode: SLDI_W /* 8636 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 8655 /* 8640 */ MCD_OPC_CheckPredicate, 8, 218, 19, // Skip to: 13726 /* 8644 */ MCD_OPC_CheckField, 17, 1, 0, 212, 19, // Skip to: 13726 /* 8650 */ MCD_OPC_Decode, 218, 11, 162, 1, // Opcode: SLDI_D /* 8655 */ MCD_OPC_FilterValue, 3, 203, 19, // Skip to: 13726 /* 8659 */ MCD_OPC_CheckPredicate, 8, 199, 19, // Skip to: 13726 /* 8663 */ MCD_OPC_CheckField, 16, 2, 2, 193, 19, // Skip to: 13726 /* 8669 */ MCD_OPC_Decode, 212, 3, 163, 1, // Opcode: CTCMSA /* 8674 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 8687 /* 8678 */ MCD_OPC_CheckPredicate, 8, 180, 19, // Skip to: 13726 /* 8682 */ MCD_OPC_Decode, 131, 12, 164, 1, // Opcode: SPLATI_B /* 8687 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 8706 /* 8691 */ MCD_OPC_CheckPredicate, 8, 167, 19, // Skip to: 13726 /* 8695 */ MCD_OPC_CheckField, 19, 1, 0, 161, 19, // Skip to: 13726 /* 8701 */ MCD_OPC_Decode, 133, 12, 165, 1, // Opcode: SPLATI_H /* 8706 */ MCD_OPC_FilterValue, 7, 54, 0, // Skip to: 8764 /* 8710 */ MCD_OPC_ExtractField, 18, 2, // Inst{19-18} ... /* 8713 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8726 /* 8717 */ MCD_OPC_CheckPredicate, 8, 141, 19, // Skip to: 13726 /* 8721 */ MCD_OPC_Decode, 134, 12, 166, 1, // Opcode: SPLATI_W /* 8726 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 8745 /* 8730 */ MCD_OPC_CheckPredicate, 8, 128, 19, // Skip to: 13726 /* 8734 */ MCD_OPC_CheckField, 17, 1, 0, 122, 19, // Skip to: 13726 /* 8740 */ MCD_OPC_Decode, 132, 12, 167, 1, // Opcode: SPLATI_D /* 8745 */ MCD_OPC_FilterValue, 3, 113, 19, // Skip to: 13726 /* 8749 */ MCD_OPC_CheckPredicate, 8, 109, 19, // Skip to: 13726 /* 8753 */ MCD_OPC_CheckField, 16, 2, 2, 103, 19, // Skip to: 13726 /* 8759 */ MCD_OPC_Decode, 240, 2, 168, 1, // Opcode: CFCMSA /* 8764 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 8777 /* 8768 */ MCD_OPC_CheckPredicate, 8, 90, 19, // Skip to: 13726 /* 8772 */ MCD_OPC_Decode, 202, 3, 169, 1, // Opcode: COPY_S_B /* 8777 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 8796 /* 8781 */ MCD_OPC_CheckPredicate, 8, 77, 19, // Skip to: 13726 /* 8785 */ MCD_OPC_CheckField, 19, 1, 0, 71, 19, // Skip to: 13726 /* 8791 */ MCD_OPC_Decode, 204, 3, 170, 1, // Opcode: COPY_S_H /* 8796 */ MCD_OPC_FilterValue, 11, 54, 0, // Skip to: 8854 /* 8800 */ MCD_OPC_ExtractField, 18, 2, // Inst{19-18} ... /* 8803 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8816 /* 8807 */ MCD_OPC_CheckPredicate, 8, 51, 19, // Skip to: 13726 /* 8811 */ MCD_OPC_Decode, 205, 3, 171, 1, // Opcode: COPY_S_W /* 8816 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 8835 /* 8820 */ MCD_OPC_CheckPredicate, 14, 38, 19, // Skip to: 13726 /* 8824 */ MCD_OPC_CheckField, 17, 1, 0, 32, 19, // Skip to: 13726 /* 8830 */ MCD_OPC_Decode, 203, 3, 172, 1, // Opcode: COPY_S_D /* 8835 */ MCD_OPC_FilterValue, 3, 23, 19, // Skip to: 13726 /* 8839 */ MCD_OPC_CheckPredicate, 8, 19, 19, // Skip to: 13726 /* 8843 */ MCD_OPC_CheckField, 16, 2, 2, 13, 19, // Skip to: 13726 /* 8849 */ MCD_OPC_Decode, 235, 8, 173, 1, // Opcode: MOVE_V /* 8854 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 8867 /* 8858 */ MCD_OPC_CheckPredicate, 8, 0, 19, // Skip to: 13726 /* 8862 */ MCD_OPC_Decode, 206, 3, 169, 1, // Opcode: COPY_U_B /* 8867 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 8886 /* 8871 */ MCD_OPC_CheckPredicate, 8, 243, 18, // Skip to: 13726 /* 8875 */ MCD_OPC_CheckField, 19, 1, 0, 237, 18, // Skip to: 13726 /* 8881 */ MCD_OPC_Decode, 208, 3, 170, 1, // Opcode: COPY_U_H /* 8886 */ MCD_OPC_FilterValue, 15, 35, 0, // Skip to: 8925 /* 8890 */ MCD_OPC_ExtractField, 18, 2, // Inst{19-18} ... /* 8893 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8906 /* 8897 */ MCD_OPC_CheckPredicate, 8, 217, 18, // Skip to: 13726 /* 8901 */ MCD_OPC_Decode, 209, 3, 171, 1, // Opcode: COPY_U_W /* 8906 */ MCD_OPC_FilterValue, 2, 208, 18, // Skip to: 13726 /* 8910 */ MCD_OPC_CheckPredicate, 14, 204, 18, // Skip to: 13726 /* 8914 */ MCD_OPC_CheckField, 17, 1, 0, 198, 18, // Skip to: 13726 /* 8920 */ MCD_OPC_Decode, 207, 3, 172, 1, // Opcode: COPY_U_D /* 8925 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 8938 /* 8929 */ MCD_OPC_CheckPredicate, 8, 185, 18, // Skip to: 13726 /* 8933 */ MCD_OPC_Decode, 229, 6, 174, 1, // Opcode: INSERT_B /* 8938 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 8957 /* 8942 */ MCD_OPC_CheckPredicate, 8, 172, 18, // Skip to: 13726 /* 8946 */ MCD_OPC_CheckField, 19, 1, 0, 166, 18, // Skip to: 13726 /* 8952 */ MCD_OPC_Decode, 237, 6, 175, 1, // Opcode: INSERT_H /* 8957 */ MCD_OPC_FilterValue, 19, 35, 0, // Skip to: 8996 /* 8961 */ MCD_OPC_ExtractField, 18, 2, // Inst{19-18} ... /* 8964 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 8977 /* 8968 */ MCD_OPC_CheckPredicate, 8, 146, 18, // Skip to: 13726 /* 8972 */ MCD_OPC_Decode, 239, 6, 176, 1, // Opcode: INSERT_W /* 8977 */ MCD_OPC_FilterValue, 2, 137, 18, // Skip to: 13726 /* 8981 */ MCD_OPC_CheckPredicate, 14, 133, 18, // Skip to: 13726 /* 8985 */ MCD_OPC_CheckField, 17, 1, 0, 127, 18, // Skip to: 13726 /* 8991 */ MCD_OPC_Decode, 231, 6, 177, 1, // Opcode: INSERT_D /* 8996 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 9009 /* 9000 */ MCD_OPC_CheckPredicate, 8, 114, 18, // Skip to: 13726 /* 9004 */ MCD_OPC_Decode, 242, 6, 178, 1, // Opcode: INSVE_B /* 9009 */ MCD_OPC_FilterValue, 22, 15, 0, // Skip to: 9028 /* 9013 */ MCD_OPC_CheckPredicate, 8, 101, 18, // Skip to: 13726 /* 9017 */ MCD_OPC_CheckField, 19, 1, 0, 95, 18, // Skip to: 13726 /* 9023 */ MCD_OPC_Decode, 244, 6, 178, 1, // Opcode: INSVE_H /* 9028 */ MCD_OPC_FilterValue, 23, 86, 18, // Skip to: 13726 /* 9032 */ MCD_OPC_ExtractField, 18, 2, // Inst{19-18} ... /* 9035 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9048 /* 9039 */ MCD_OPC_CheckPredicate, 8, 75, 18, // Skip to: 13726 /* 9043 */ MCD_OPC_Decode, 245, 6, 178, 1, // Opcode: INSVE_W /* 9048 */ MCD_OPC_FilterValue, 2, 66, 18, // Skip to: 13726 /* 9052 */ MCD_OPC_CheckPredicate, 8, 62, 18, // Skip to: 13726 /* 9056 */ MCD_OPC_CheckField, 17, 1, 0, 56, 18, // Skip to: 13726 /* 9062 */ MCD_OPC_Decode, 243, 6, 178, 1, // Opcode: INSVE_D /* 9067 */ MCD_OPC_FilterValue, 26, 163, 1, // Skip to: 9490 /* 9071 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 9074 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9087 /* 9078 */ MCD_OPC_CheckPredicate, 8, 36, 18, // Skip to: 13726 /* 9082 */ MCD_OPC_Decode, 178, 5, 139, 1, // Opcode: FCAF_W /* 9087 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 9100 /* 9091 */ MCD_OPC_CheckPredicate, 8, 23, 18, // Skip to: 13726 /* 9095 */ MCD_OPC_Decode, 177, 5, 140, 1, // Opcode: FCAF_D /* 9100 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 9113 /* 9104 */ MCD_OPC_CheckPredicate, 8, 10, 18, // Skip to: 13726 /* 9108 */ MCD_OPC_Decode, 205, 5, 139, 1, // Opcode: FCUN_W /* 9113 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 9126 /* 9117 */ MCD_OPC_CheckPredicate, 8, 253, 17, // Skip to: 13726 /* 9121 */ MCD_OPC_Decode, 204, 5, 140, 1, // Opcode: FCUN_D /* 9126 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 9139 /* 9130 */ MCD_OPC_CheckPredicate, 8, 240, 17, // Skip to: 13726 /* 9134 */ MCD_OPC_Decode, 180, 5, 139, 1, // Opcode: FCEQ_W /* 9139 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 9152 /* 9143 */ MCD_OPC_CheckPredicate, 8, 227, 17, // Skip to: 13726 /* 9147 */ MCD_OPC_Decode, 179, 5, 140, 1, // Opcode: FCEQ_D /* 9152 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 9165 /* 9156 */ MCD_OPC_CheckPredicate, 8, 214, 17, // Skip to: 13726 /* 9160 */ MCD_OPC_Decode, 197, 5, 139, 1, // Opcode: FCUEQ_W /* 9165 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 9178 /* 9169 */ MCD_OPC_CheckPredicate, 8, 201, 17, // Skip to: 13726 /* 9173 */ MCD_OPC_Decode, 196, 5, 140, 1, // Opcode: FCUEQ_D /* 9178 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 9191 /* 9182 */ MCD_OPC_CheckPredicate, 8, 188, 17, // Skip to: 13726 /* 9186 */ MCD_OPC_Decode, 186, 5, 139, 1, // Opcode: FCLT_W /* 9191 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 9204 /* 9195 */ MCD_OPC_CheckPredicate, 8, 175, 17, // Skip to: 13726 /* 9199 */ MCD_OPC_Decode, 185, 5, 140, 1, // Opcode: FCLT_D /* 9204 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 9217 /* 9208 */ MCD_OPC_CheckPredicate, 8, 162, 17, // Skip to: 13726 /* 9212 */ MCD_OPC_Decode, 201, 5, 139, 1, // Opcode: FCULT_W /* 9217 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 9230 /* 9221 */ MCD_OPC_CheckPredicate, 8, 149, 17, // Skip to: 13726 /* 9225 */ MCD_OPC_Decode, 200, 5, 140, 1, // Opcode: FCULT_D /* 9230 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 9243 /* 9234 */ MCD_OPC_CheckPredicate, 8, 136, 17, // Skip to: 13726 /* 9238 */ MCD_OPC_Decode, 184, 5, 139, 1, // Opcode: FCLE_W /* 9243 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 9256 /* 9247 */ MCD_OPC_CheckPredicate, 8, 123, 17, // Skip to: 13726 /* 9251 */ MCD_OPC_Decode, 183, 5, 140, 1, // Opcode: FCLE_D /* 9256 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 9269 /* 9260 */ MCD_OPC_CheckPredicate, 8, 110, 17, // Skip to: 13726 /* 9264 */ MCD_OPC_Decode, 199, 5, 139, 1, // Opcode: FCULE_W /* 9269 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 9282 /* 9273 */ MCD_OPC_CheckPredicate, 8, 97, 17, // Skip to: 13726 /* 9277 */ MCD_OPC_Decode, 198, 5, 140, 1, // Opcode: FCULE_D /* 9282 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 9295 /* 9286 */ MCD_OPC_CheckPredicate, 8, 84, 17, // Skip to: 13726 /* 9290 */ MCD_OPC_Decode, 154, 6, 139, 1, // Opcode: FSAF_W /* 9295 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 9308 /* 9299 */ MCD_OPC_CheckPredicate, 8, 71, 17, // Skip to: 13726 /* 9303 */ MCD_OPC_Decode, 153, 6, 140, 1, // Opcode: FSAF_D /* 9308 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 9321 /* 9312 */ MCD_OPC_CheckPredicate, 8, 58, 17, // Skip to: 13726 /* 9316 */ MCD_OPC_Decode, 188, 6, 139, 1, // Opcode: FSUN_W /* 9321 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 9334 /* 9325 */ MCD_OPC_CheckPredicate, 8, 45, 17, // Skip to: 13726 /* 9329 */ MCD_OPC_Decode, 187, 6, 140, 1, // Opcode: FSUN_D /* 9334 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 9347 /* 9338 */ MCD_OPC_CheckPredicate, 8, 32, 17, // Skip to: 13726 /* 9342 */ MCD_OPC_Decode, 156, 6, 139, 1, // Opcode: FSEQ_W /* 9347 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 9360 /* 9351 */ MCD_OPC_CheckPredicate, 8, 19, 17, // Skip to: 13726 /* 9355 */ MCD_OPC_Decode, 155, 6, 140, 1, // Opcode: FSEQ_D /* 9360 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 9373 /* 9364 */ MCD_OPC_CheckPredicate, 8, 6, 17, // Skip to: 13726 /* 9368 */ MCD_OPC_Decode, 180, 6, 139, 1, // Opcode: FSUEQ_W /* 9373 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 9386 /* 9377 */ MCD_OPC_CheckPredicate, 8, 249, 16, // Skip to: 13726 /* 9381 */ MCD_OPC_Decode, 179, 6, 140, 1, // Opcode: FSUEQ_D /* 9386 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 9399 /* 9390 */ MCD_OPC_CheckPredicate, 8, 236, 16, // Skip to: 13726 /* 9394 */ MCD_OPC_Decode, 160, 6, 139, 1, // Opcode: FSLT_W /* 9399 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 9412 /* 9403 */ MCD_OPC_CheckPredicate, 8, 223, 16, // Skip to: 13726 /* 9407 */ MCD_OPC_Decode, 159, 6, 140, 1, // Opcode: FSLT_D /* 9412 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 9425 /* 9416 */ MCD_OPC_CheckPredicate, 8, 210, 16, // Skip to: 13726 /* 9420 */ MCD_OPC_Decode, 184, 6, 139, 1, // Opcode: FSULT_W /* 9425 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 9438 /* 9429 */ MCD_OPC_CheckPredicate, 8, 197, 16, // Skip to: 13726 /* 9433 */ MCD_OPC_Decode, 183, 6, 140, 1, // Opcode: FSULT_D /* 9438 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 9451 /* 9442 */ MCD_OPC_CheckPredicate, 8, 184, 16, // Skip to: 13726 /* 9446 */ MCD_OPC_Decode, 158, 6, 139, 1, // Opcode: FSLE_W /* 9451 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 9464 /* 9455 */ MCD_OPC_CheckPredicate, 8, 171, 16, // Skip to: 13726 /* 9459 */ MCD_OPC_Decode, 157, 6, 140, 1, // Opcode: FSLE_D /* 9464 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 9477 /* 9468 */ MCD_OPC_CheckPredicate, 8, 158, 16, // Skip to: 13726 /* 9472 */ MCD_OPC_Decode, 182, 6, 139, 1, // Opcode: FSULE_W /* 9477 */ MCD_OPC_FilterValue, 31, 149, 16, // Skip to: 13726 /* 9481 */ MCD_OPC_CheckPredicate, 8, 145, 16, // Skip to: 13726 /* 9485 */ MCD_OPC_Decode, 181, 6, 140, 1, // Opcode: FSULE_D /* 9490 */ MCD_OPC_FilterValue, 27, 85, 1, // Skip to: 9835 /* 9494 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 9497 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 9510 /* 9501 */ MCD_OPC_CheckPredicate, 8, 125, 16, // Skip to: 13726 /* 9505 */ MCD_OPC_Decode, 176, 5, 139, 1, // Opcode: FADD_W /* 9510 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 9523 /* 9514 */ MCD_OPC_CheckPredicate, 8, 112, 16, // Skip to: 13726 /* 9518 */ MCD_OPC_Decode, 170, 5, 140, 1, // Opcode: FADD_D /* 9523 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 9536 /* 9527 */ MCD_OPC_CheckPredicate, 8, 99, 16, // Skip to: 13726 /* 9531 */ MCD_OPC_Decode, 178, 6, 139, 1, // Opcode: FSUB_W /* 9536 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 9549 /* 9540 */ MCD_OPC_CheckPredicate, 8, 86, 16, // Skip to: 13726 /* 9544 */ MCD_OPC_Decode, 172, 6, 140, 1, // Opcode: FSUB_D /* 9549 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 9562 /* 9553 */ MCD_OPC_CheckPredicate, 8, 73, 16, // Skip to: 13726 /* 9557 */ MCD_OPC_Decode, 141, 6, 139, 1, // Opcode: FMUL_W /* 9562 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 9575 /* 9566 */ MCD_OPC_CheckPredicate, 8, 60, 16, // Skip to: 13726 /* 9570 */ MCD_OPC_Decode, 135, 6, 140, 1, // Opcode: FMUL_D /* 9575 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 9588 /* 9579 */ MCD_OPC_CheckPredicate, 8, 47, 16, // Skip to: 13726 /* 9583 */ MCD_OPC_Decode, 212, 5, 139, 1, // Opcode: FDIV_W /* 9588 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 9601 /* 9592 */ MCD_OPC_CheckPredicate, 8, 34, 16, // Skip to: 13726 /* 9596 */ MCD_OPC_Decode, 206, 5, 140, 1, // Opcode: FDIV_D /* 9601 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 9614 /* 9605 */ MCD_OPC_CheckPredicate, 8, 21, 16, // Skip to: 13726 /* 9609 */ MCD_OPC_Decode, 247, 5, 143, 1, // Opcode: FMADD_W /* 9614 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 9627 /* 9618 */ MCD_OPC_CheckPredicate, 8, 8, 16, // Skip to: 13726 /* 9622 */ MCD_OPC_Decode, 246, 5, 144, 1, // Opcode: FMADD_D /* 9627 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 9640 /* 9631 */ MCD_OPC_CheckPredicate, 8, 251, 15, // Skip to: 13726 /* 9635 */ MCD_OPC_Decode, 134, 6, 143, 1, // Opcode: FMSUB_W /* 9640 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 9653 /* 9644 */ MCD_OPC_CheckPredicate, 8, 238, 15, // Skip to: 13726 /* 9648 */ MCD_OPC_Decode, 133, 6, 144, 1, // Opcode: FMSUB_D /* 9653 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 9666 /* 9657 */ MCD_OPC_CheckPredicate, 8, 225, 15, // Skip to: 13726 /* 9661 */ MCD_OPC_Decode, 217, 5, 139, 1, // Opcode: FEXP2_W /* 9666 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 9679 /* 9670 */ MCD_OPC_CheckPredicate, 8, 212, 15, // Skip to: 13726 /* 9674 */ MCD_OPC_Decode, 215, 5, 140, 1, // Opcode: FEXP2_D /* 9679 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 9692 /* 9683 */ MCD_OPC_CheckPredicate, 8, 199, 15, // Skip to: 13726 /* 9687 */ MCD_OPC_Decode, 213, 5, 179, 1, // Opcode: FEXDO_H /* 9692 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 9705 /* 9696 */ MCD_OPC_CheckPredicate, 8, 186, 15, // Skip to: 13726 /* 9700 */ MCD_OPC_Decode, 214, 5, 180, 1, // Opcode: FEXDO_W /* 9705 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 9718 /* 9709 */ MCD_OPC_CheckPredicate, 8, 173, 15, // Skip to: 13726 /* 9713 */ MCD_OPC_Decode, 193, 6, 179, 1, // Opcode: FTQ_H /* 9718 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 9731 /* 9722 */ MCD_OPC_CheckPredicate, 8, 160, 15, // Skip to: 13726 /* 9726 */ MCD_OPC_Decode, 194, 6, 180, 1, // Opcode: FTQ_W /* 9731 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 9744 /* 9735 */ MCD_OPC_CheckPredicate, 8, 147, 15, // Skip to: 13726 /* 9739 */ MCD_OPC_Decode, 255, 5, 139, 1, // Opcode: FMIN_W /* 9744 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 9757 /* 9748 */ MCD_OPC_CheckPredicate, 8, 134, 15, // Skip to: 13726 /* 9752 */ MCD_OPC_Decode, 254, 5, 140, 1, // Opcode: FMIN_D /* 9757 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 9770 /* 9761 */ MCD_OPC_CheckPredicate, 8, 121, 15, // Skip to: 13726 /* 9765 */ MCD_OPC_Decode, 253, 5, 139, 1, // Opcode: FMIN_A_W /* 9770 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 9783 /* 9774 */ MCD_OPC_CheckPredicate, 8, 108, 15, // Skip to: 13726 /* 9778 */ MCD_OPC_Decode, 252, 5, 140, 1, // Opcode: FMIN_A_D /* 9783 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 9796 /* 9787 */ MCD_OPC_CheckPredicate, 8, 95, 15, // Skip to: 13726 /* 9791 */ MCD_OPC_Decode, 251, 5, 139, 1, // Opcode: FMAX_W /* 9796 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 9809 /* 9800 */ MCD_OPC_CheckPredicate, 8, 82, 15, // Skip to: 13726 /* 9804 */ MCD_OPC_Decode, 250, 5, 140, 1, // Opcode: FMAX_D /* 9809 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 9822 /* 9813 */ MCD_OPC_CheckPredicate, 8, 69, 15, // Skip to: 13726 /* 9817 */ MCD_OPC_Decode, 249, 5, 139, 1, // Opcode: FMAX_A_W /* 9822 */ MCD_OPC_FilterValue, 31, 60, 15, // Skip to: 13726 /* 9826 */ MCD_OPC_CheckPredicate, 8, 56, 15, // Skip to: 13726 /* 9830 */ MCD_OPC_Decode, 248, 5, 140, 1, // Opcode: FMAX_A_D /* 9835 */ MCD_OPC_FilterValue, 28, 59, 1, // Skip to: 10154 /* 9839 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 9842 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 9855 /* 9846 */ MCD_OPC_CheckPredicate, 8, 36, 15, // Skip to: 13726 /* 9850 */ MCD_OPC_Decode, 195, 5, 139, 1, // Opcode: FCOR_W /* 9855 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 9868 /* 9859 */ MCD_OPC_CheckPredicate, 8, 23, 15, // Skip to: 13726 /* 9863 */ MCD_OPC_Decode, 194, 5, 140, 1, // Opcode: FCOR_D /* 9868 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 9881 /* 9872 */ MCD_OPC_CheckPredicate, 8, 10, 15, // Skip to: 13726 /* 9876 */ MCD_OPC_Decode, 203, 5, 139, 1, // Opcode: FCUNE_W /* 9881 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 9894 /* 9885 */ MCD_OPC_CheckPredicate, 8, 253, 14, // Skip to: 13726 /* 9889 */ MCD_OPC_Decode, 202, 5, 140, 1, // Opcode: FCUNE_D /* 9894 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 9907 /* 9898 */ MCD_OPC_CheckPredicate, 8, 240, 14, // Skip to: 13726 /* 9902 */ MCD_OPC_Decode, 193, 5, 139, 1, // Opcode: FCNE_W /* 9907 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 9920 /* 9911 */ MCD_OPC_CheckPredicate, 8, 227, 14, // Skip to: 13726 /* 9915 */ MCD_OPC_Decode, 192, 5, 140, 1, // Opcode: FCNE_D /* 9920 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 9933 /* 9924 */ MCD_OPC_CheckPredicate, 8, 214, 14, // Skip to: 13726 /* 9928 */ MCD_OPC_Decode, 219, 9, 138, 1, // Opcode: MUL_Q_H /* 9933 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 9946 /* 9937 */ MCD_OPC_CheckPredicate, 8, 201, 14, // Skip to: 13726 /* 9941 */ MCD_OPC_Decode, 220, 9, 139, 1, // Opcode: MUL_Q_W /* 9946 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 9959 /* 9950 */ MCD_OPC_CheckPredicate, 8, 188, 14, // Skip to: 13726 /* 9954 */ MCD_OPC_Decode, 147, 8, 142, 1, // Opcode: MADD_Q_H /* 9959 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 9972 /* 9963 */ MCD_OPC_CheckPredicate, 8, 175, 14, // Skip to: 13726 /* 9967 */ MCD_OPC_Decode, 148, 8, 143, 1, // Opcode: MADD_Q_W /* 9972 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 9985 /* 9976 */ MCD_OPC_CheckPredicate, 8, 162, 14, // Skip to: 13726 /* 9980 */ MCD_OPC_Decode, 165, 9, 142, 1, // Opcode: MSUB_Q_H /* 9985 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 9998 /* 9989 */ MCD_OPC_CheckPredicate, 8, 149, 14, // Skip to: 13726 /* 9993 */ MCD_OPC_Decode, 166, 9, 143, 1, // Opcode: MSUB_Q_W /* 9998 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 10011 /* 10002 */ MCD_OPC_CheckPredicate, 8, 136, 14, // Skip to: 13726 /* 10006 */ MCD_OPC_Decode, 164, 6, 139, 1, // Opcode: FSOR_W /* 10011 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 10024 /* 10015 */ MCD_OPC_CheckPredicate, 8, 123, 14, // Skip to: 13726 /* 10019 */ MCD_OPC_Decode, 163, 6, 140, 1, // Opcode: FSOR_D /* 10024 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 10037 /* 10028 */ MCD_OPC_CheckPredicate, 8, 110, 14, // Skip to: 13726 /* 10032 */ MCD_OPC_Decode, 186, 6, 139, 1, // Opcode: FSUNE_W /* 10037 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 10050 /* 10041 */ MCD_OPC_CheckPredicate, 8, 97, 14, // Skip to: 13726 /* 10045 */ MCD_OPC_Decode, 185, 6, 140, 1, // Opcode: FSUNE_D /* 10050 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 10063 /* 10054 */ MCD_OPC_CheckPredicate, 8, 84, 14, // Skip to: 13726 /* 10058 */ MCD_OPC_Decode, 162, 6, 139, 1, // Opcode: FSNE_W /* 10063 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 10076 /* 10067 */ MCD_OPC_CheckPredicate, 8, 71, 14, // Skip to: 13726 /* 10071 */ MCD_OPC_Decode, 161, 6, 140, 1, // Opcode: FSNE_D /* 10076 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 10089 /* 10080 */ MCD_OPC_CheckPredicate, 8, 58, 14, // Skip to: 13726 /* 10084 */ MCD_OPC_Decode, 202, 9, 138, 1, // Opcode: MULR_Q_H /* 10089 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 10102 /* 10093 */ MCD_OPC_CheckPredicate, 8, 45, 14, // Skip to: 13726 /* 10097 */ MCD_OPC_Decode, 203, 9, 139, 1, // Opcode: MULR_Q_W /* 10102 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 10115 /* 10106 */ MCD_OPC_CheckPredicate, 8, 32, 14, // Skip to: 13726 /* 10110 */ MCD_OPC_Decode, 133, 8, 142, 1, // Opcode: MADDR_Q_H /* 10115 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 10128 /* 10119 */ MCD_OPC_CheckPredicate, 8, 19, 14, // Skip to: 13726 /* 10123 */ MCD_OPC_Decode, 134, 8, 143, 1, // Opcode: MADDR_Q_W /* 10128 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 10141 /* 10132 */ MCD_OPC_CheckPredicate, 8, 6, 14, // Skip to: 13726 /* 10136 */ MCD_OPC_Decode, 151, 9, 142, 1, // Opcode: MSUBR_Q_H /* 10141 */ MCD_OPC_FilterValue, 29, 253, 13, // Skip to: 13726 /* 10145 */ MCD_OPC_CheckPredicate, 8, 249, 13, // Skip to: 13726 /* 10149 */ MCD_OPC_Decode, 152, 9, 143, 1, // Opcode: MSUBR_Q_W /* 10154 */ MCD_OPC_FilterValue, 30, 219, 2, // Skip to: 10889 /* 10158 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 10161 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10173 /* 10165 */ MCD_OPC_CheckPredicate, 8, 229, 13, // Skip to: 13726 /* 10169 */ MCD_OPC_Decode, 89, 137, 1, // Opcode: AND_V /* 10173 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 10186 /* 10177 */ MCD_OPC_CheckPredicate, 8, 217, 13, // Skip to: 13726 /* 10181 */ MCD_OPC_Decode, 138, 10, 137, 1, // Opcode: OR_V /* 10186 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 10199 /* 10190 */ MCD_OPC_CheckPredicate, 8, 204, 13, // Skip to: 13726 /* 10194 */ MCD_OPC_Decode, 254, 9, 137, 1, // Opcode: NOR_V /* 10199 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 10212 /* 10203 */ MCD_OPC_CheckPredicate, 8, 191, 13, // Skip to: 13726 /* 10207 */ MCD_OPC_Decode, 241, 13, 137, 1, // Opcode: XOR_V /* 10212 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 10225 /* 10216 */ MCD_OPC_CheckPredicate, 8, 178, 13, // Skip to: 13726 /* 10220 */ MCD_OPC_Decode, 142, 2, 141, 1, // Opcode: BMNZ_V /* 10225 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 10238 /* 10229 */ MCD_OPC_CheckPredicate, 8, 165, 13, // Skip to: 13726 /* 10233 */ MCD_OPC_Decode, 144, 2, 141, 1, // Opcode: BMZ_V /* 10238 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 10251 /* 10242 */ MCD_OPC_CheckPredicate, 8, 152, 13, // Skip to: 13726 /* 10246 */ MCD_OPC_Decode, 179, 2, 141, 1, // Opcode: BSEL_V /* 10251 */ MCD_OPC_FilterValue, 24, 211, 0, // Skip to: 10466 /* 10255 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 10258 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10271 /* 10262 */ MCD_OPC_CheckPredicate, 8, 132, 13, // Skip to: 13726 /* 10266 */ MCD_OPC_Decode, 231, 5, 181, 1, // Opcode: FILL_B /* 10271 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 10284 /* 10275 */ MCD_OPC_CheckPredicate, 8, 119, 13, // Skip to: 13726 /* 10279 */ MCD_OPC_Decode, 235, 5, 182, 1, // Opcode: FILL_H /* 10284 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 10297 /* 10288 */ MCD_OPC_CheckPredicate, 8, 106, 13, // Skip to: 13726 /* 10292 */ MCD_OPC_Decode, 236, 5, 183, 1, // Opcode: FILL_W /* 10297 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 10310 /* 10301 */ MCD_OPC_CheckPredicate, 14, 93, 13, // Skip to: 13726 /* 10305 */ MCD_OPC_Decode, 232, 5, 184, 1, // Opcode: FILL_D /* 10310 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 10323 /* 10314 */ MCD_OPC_CheckPredicate, 8, 80, 13, // Skip to: 13726 /* 10318 */ MCD_OPC_Decode, 157, 10, 173, 1, // Opcode: PCNT_B /* 10323 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 10336 /* 10327 */ MCD_OPC_CheckPredicate, 8, 67, 13, // Skip to: 13726 /* 10331 */ MCD_OPC_Decode, 159, 10, 185, 1, // Opcode: PCNT_H /* 10336 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 10349 /* 10340 */ MCD_OPC_CheckPredicate, 8, 54, 13, // Skip to: 13726 /* 10344 */ MCD_OPC_Decode, 160, 10, 186, 1, // Opcode: PCNT_W /* 10349 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 10362 /* 10353 */ MCD_OPC_CheckPredicate, 8, 41, 13, // Skip to: 13726 /* 10357 */ MCD_OPC_Decode, 158, 10, 187, 1, // Opcode: PCNT_D /* 10362 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 10375 /* 10366 */ MCD_OPC_CheckPredicate, 8, 28, 13, // Skip to: 13726 /* 10370 */ MCD_OPC_Decode, 231, 9, 173, 1, // Opcode: NLOC_B /* 10375 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 10388 /* 10379 */ MCD_OPC_CheckPredicate, 8, 15, 13, // Skip to: 13726 /* 10383 */ MCD_OPC_Decode, 233, 9, 185, 1, // Opcode: NLOC_H /* 10388 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 10401 /* 10392 */ MCD_OPC_CheckPredicate, 8, 2, 13, // Skip to: 13726 /* 10396 */ MCD_OPC_Decode, 234, 9, 186, 1, // Opcode: NLOC_W /* 10401 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 10414 /* 10405 */ MCD_OPC_CheckPredicate, 8, 245, 12, // Skip to: 13726 /* 10409 */ MCD_OPC_Decode, 232, 9, 187, 1, // Opcode: NLOC_D /* 10414 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 10427 /* 10418 */ MCD_OPC_CheckPredicate, 8, 232, 12, // Skip to: 13726 /* 10422 */ MCD_OPC_Decode, 235, 9, 173, 1, // Opcode: NLZC_B /* 10427 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 10440 /* 10431 */ MCD_OPC_CheckPredicate, 8, 219, 12, // Skip to: 13726 /* 10435 */ MCD_OPC_Decode, 237, 9, 185, 1, // Opcode: NLZC_H /* 10440 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 10453 /* 10444 */ MCD_OPC_CheckPredicate, 8, 206, 12, // Skip to: 13726 /* 10448 */ MCD_OPC_Decode, 238, 9, 186, 1, // Opcode: NLZC_W /* 10453 */ MCD_OPC_FilterValue, 15, 197, 12, // Skip to: 13726 /* 10457 */ MCD_OPC_CheckPredicate, 8, 193, 12, // Skip to: 13726 /* 10461 */ MCD_OPC_Decode, 236, 9, 187, 1, // Opcode: NLZC_D /* 10466 */ MCD_OPC_FilterValue, 25, 184, 12, // Skip to: 13726 /* 10470 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 10473 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10486 /* 10477 */ MCD_OPC_CheckPredicate, 8, 173, 12, // Skip to: 13726 /* 10481 */ MCD_OPC_Decode, 182, 5, 186, 1, // Opcode: FCLASS_W /* 10486 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 10499 /* 10490 */ MCD_OPC_CheckPredicate, 8, 160, 12, // Skip to: 13726 /* 10494 */ MCD_OPC_Decode, 181, 5, 187, 1, // Opcode: FCLASS_D /* 10499 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 10512 /* 10503 */ MCD_OPC_CheckPredicate, 8, 147, 12, // Skip to: 13726 /* 10507 */ MCD_OPC_Decode, 196, 6, 186, 1, // Opcode: FTRUNC_S_W /* 10512 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 10525 /* 10516 */ MCD_OPC_CheckPredicate, 8, 134, 12, // Skip to: 13726 /* 10520 */ MCD_OPC_Decode, 195, 6, 187, 1, // Opcode: FTRUNC_S_D /* 10525 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 10538 /* 10529 */ MCD_OPC_CheckPredicate, 8, 121, 12, // Skip to: 13726 /* 10533 */ MCD_OPC_Decode, 198, 6, 186, 1, // Opcode: FTRUNC_U_W /* 10538 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 10551 /* 10542 */ MCD_OPC_CheckPredicate, 8, 108, 12, // Skip to: 13726 /* 10546 */ MCD_OPC_Decode, 197, 6, 187, 1, // Opcode: FTRUNC_U_D /* 10551 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 10564 /* 10555 */ MCD_OPC_CheckPredicate, 8, 95, 12, // Skip to: 13726 /* 10559 */ MCD_OPC_Decode, 171, 6, 186, 1, // Opcode: FSQRT_W /* 10564 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 10577 /* 10568 */ MCD_OPC_CheckPredicate, 8, 82, 12, // Skip to: 13726 /* 10572 */ MCD_OPC_Decode, 165, 6, 187, 1, // Opcode: FSQRT_D /* 10577 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 10590 /* 10581 */ MCD_OPC_CheckPredicate, 8, 69, 12, // Skip to: 13726 /* 10585 */ MCD_OPC_Decode, 152, 6, 186, 1, // Opcode: FRSQRT_W /* 10590 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 10603 /* 10594 */ MCD_OPC_CheckPredicate, 8, 56, 12, // Skip to: 13726 /* 10598 */ MCD_OPC_Decode, 151, 6, 187, 1, // Opcode: FRSQRT_D /* 10603 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 10616 /* 10607 */ MCD_OPC_CheckPredicate, 8, 43, 12, // Skip to: 13726 /* 10611 */ MCD_OPC_Decode, 148, 6, 186, 1, // Opcode: FRCP_W /* 10616 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 10629 /* 10620 */ MCD_OPC_CheckPredicate, 8, 30, 12, // Skip to: 13726 /* 10624 */ MCD_OPC_Decode, 147, 6, 187, 1, // Opcode: FRCP_D /* 10629 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 10642 /* 10633 */ MCD_OPC_CheckPredicate, 8, 17, 12, // Skip to: 13726 /* 10637 */ MCD_OPC_Decode, 150, 6, 186, 1, // Opcode: FRINT_W /* 10642 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 10655 /* 10646 */ MCD_OPC_CheckPredicate, 8, 4, 12, // Skip to: 13726 /* 10650 */ MCD_OPC_Decode, 149, 6, 187, 1, // Opcode: FRINT_D /* 10655 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 10668 /* 10659 */ MCD_OPC_CheckPredicate, 8, 247, 11, // Skip to: 13726 /* 10663 */ MCD_OPC_Decode, 238, 5, 186, 1, // Opcode: FLOG2_W /* 10668 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 10681 /* 10672 */ MCD_OPC_CheckPredicate, 8, 234, 11, // Skip to: 13726 /* 10676 */ MCD_OPC_Decode, 237, 5, 187, 1, // Opcode: FLOG2_D /* 10681 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 10694 /* 10685 */ MCD_OPC_CheckPredicate, 8, 221, 11, // Skip to: 13726 /* 10689 */ MCD_OPC_Decode, 220, 5, 188, 1, // Opcode: FEXUPL_W /* 10694 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 10707 /* 10698 */ MCD_OPC_CheckPredicate, 8, 208, 11, // Skip to: 13726 /* 10702 */ MCD_OPC_Decode, 219, 5, 189, 1, // Opcode: FEXUPL_D /* 10707 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 10720 /* 10711 */ MCD_OPC_CheckPredicate, 8, 195, 11, // Skip to: 13726 /* 10715 */ MCD_OPC_Decode, 222, 5, 188, 1, // Opcode: FEXUPR_W /* 10720 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 10733 /* 10724 */ MCD_OPC_CheckPredicate, 8, 182, 11, // Skip to: 13726 /* 10728 */ MCD_OPC_Decode, 221, 5, 189, 1, // Opcode: FEXUPR_D /* 10733 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 10746 /* 10737 */ MCD_OPC_CheckPredicate, 8, 169, 11, // Skip to: 13726 /* 10741 */ MCD_OPC_Decode, 228, 5, 188, 1, // Opcode: FFQL_W /* 10746 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 10759 /* 10750 */ MCD_OPC_CheckPredicate, 8, 156, 11, // Skip to: 13726 /* 10754 */ MCD_OPC_Decode, 227, 5, 189, 1, // Opcode: FFQL_D /* 10759 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 10772 /* 10763 */ MCD_OPC_CheckPredicate, 8, 143, 11, // Skip to: 13726 /* 10767 */ MCD_OPC_Decode, 230, 5, 188, 1, // Opcode: FFQR_W /* 10772 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 10785 /* 10776 */ MCD_OPC_CheckPredicate, 8, 130, 11, // Skip to: 13726 /* 10780 */ MCD_OPC_Decode, 229, 5, 189, 1, // Opcode: FFQR_D /* 10785 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 10798 /* 10789 */ MCD_OPC_CheckPredicate, 8, 117, 11, // Skip to: 13726 /* 10793 */ MCD_OPC_Decode, 190, 6, 186, 1, // Opcode: FTINT_S_W /* 10798 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 10811 /* 10802 */ MCD_OPC_CheckPredicate, 8, 104, 11, // Skip to: 13726 /* 10806 */ MCD_OPC_Decode, 189, 6, 187, 1, // Opcode: FTINT_S_D /* 10811 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 10824 /* 10815 */ MCD_OPC_CheckPredicate, 8, 91, 11, // Skip to: 13726 /* 10819 */ MCD_OPC_Decode, 192, 6, 186, 1, // Opcode: FTINT_U_W /* 10824 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 10837 /* 10828 */ MCD_OPC_CheckPredicate, 8, 78, 11, // Skip to: 13726 /* 10832 */ MCD_OPC_Decode, 191, 6, 187, 1, // Opcode: FTINT_U_D /* 10837 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 10850 /* 10841 */ MCD_OPC_CheckPredicate, 8, 65, 11, // Skip to: 13726 /* 10845 */ MCD_OPC_Decode, 224, 5, 186, 1, // Opcode: FFINT_S_W /* 10850 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 10863 /* 10854 */ MCD_OPC_CheckPredicate, 8, 52, 11, // Skip to: 13726 /* 10858 */ MCD_OPC_Decode, 223, 5, 187, 1, // Opcode: FFINT_S_D /* 10863 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 10876 /* 10867 */ MCD_OPC_CheckPredicate, 8, 39, 11, // Skip to: 13726 /* 10871 */ MCD_OPC_Decode, 226, 5, 186, 1, // Opcode: FFINT_U_W /* 10876 */ MCD_OPC_FilterValue, 31, 30, 11, // Skip to: 13726 /* 10880 */ MCD_OPC_CheckPredicate, 8, 26, 11, // Skip to: 13726 /* 10884 */ MCD_OPC_Decode, 225, 5, 187, 1, // Opcode: FFINT_U_D /* 10889 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 10902 /* 10893 */ MCD_OPC_CheckPredicate, 8, 13, 11, // Skip to: 13726 /* 10897 */ MCD_OPC_Decode, 177, 7, 190, 1, // Opcode: LD_B /* 10902 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 10915 /* 10906 */ MCD_OPC_CheckPredicate, 8, 0, 11, // Skip to: 13726 /* 10910 */ MCD_OPC_Decode, 179, 7, 190, 1, // Opcode: LD_H /* 10915 */ MCD_OPC_FilterValue, 34, 9, 0, // Skip to: 10928 /* 10919 */ MCD_OPC_CheckPredicate, 8, 243, 10, // Skip to: 13726 /* 10923 */ MCD_OPC_Decode, 180, 7, 190, 1, // Opcode: LD_W /* 10928 */ MCD_OPC_FilterValue, 35, 9, 0, // Skip to: 10941 /* 10932 */ MCD_OPC_CheckPredicate, 8, 230, 10, // Skip to: 13726 /* 10936 */ MCD_OPC_Decode, 178, 7, 190, 1, // Opcode: LD_D /* 10941 */ MCD_OPC_FilterValue, 36, 9, 0, // Skip to: 10954 /* 10945 */ MCD_OPC_CheckPredicate, 8, 217, 10, // Skip to: 13726 /* 10949 */ MCD_OPC_Decode, 186, 12, 190, 1, // Opcode: ST_B /* 10954 */ MCD_OPC_FilterValue, 37, 9, 0, // Skip to: 10967 /* 10958 */ MCD_OPC_CheckPredicate, 8, 204, 10, // Skip to: 13726 /* 10962 */ MCD_OPC_Decode, 188, 12, 190, 1, // Opcode: ST_H /* 10967 */ MCD_OPC_FilterValue, 38, 9, 0, // Skip to: 10980 /* 10971 */ MCD_OPC_CheckPredicate, 8, 191, 10, // Skip to: 13726 /* 10975 */ MCD_OPC_Decode, 189, 12, 190, 1, // Opcode: ST_W /* 10980 */ MCD_OPC_FilterValue, 39, 182, 10, // Skip to: 13726 /* 10984 */ MCD_OPC_CheckPredicate, 8, 178, 10, // Skip to: 13726 /* 10988 */ MCD_OPC_Decode, 187, 12, 190, 1, // Opcode: ST_D /* 10993 */ MCD_OPC_FilterValue, 31, 113, 9, // Skip to: 13414 /* 10997 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 11000 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11013 /* 11004 */ MCD_OPC_CheckPredicate, 6, 158, 10, // Skip to: 13726 /* 11008 */ MCD_OPC_Decode, 145, 5, 191, 1, // Opcode: EXT /* 11013 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 11026 /* 11017 */ MCD_OPC_CheckPredicate, 6, 145, 10, // Skip to: 13726 /* 11021 */ MCD_OPC_Decode, 228, 6, 192, 1, // Opcode: INS /* 11026 */ MCD_OPC_FilterValue, 10, 42, 0, // Skip to: 11072 /* 11030 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 11033 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11046 /* 11037 */ MCD_OPC_CheckPredicate, 12, 125, 10, // Skip to: 13726 /* 11041 */ MCD_OPC_Decode, 236, 7, 193, 1, // Opcode: LWX /* 11046 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 11059 /* 11050 */ MCD_OPC_CheckPredicate, 12, 112, 10, // Skip to: 13726 /* 11054 */ MCD_OPC_Decode, 187, 7, 193, 1, // Opcode: LHX /* 11059 */ MCD_OPC_FilterValue, 6, 103, 10, // Skip to: 13726 /* 11063 */ MCD_OPC_CheckPredicate, 12, 99, 10, // Skip to: 13726 /* 11067 */ MCD_OPC_Decode, 156, 7, 193, 1, // Opcode: LBUX /* 11072 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 11091 /* 11076 */ MCD_OPC_CheckPredicate, 12, 86, 10, // Skip to: 13726 /* 11080 */ MCD_OPC_CheckField, 6, 10, 0, 80, 10, // Skip to: 13726 /* 11086 */ MCD_OPC_Decode, 241, 6, 194, 1, // Opcode: INSV /* 11091 */ MCD_OPC_FilterValue, 16, 51, 1, // Skip to: 11402 /* 11095 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 11098 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11110 /* 11102 */ MCD_OPC_CheckPredicate, 12, 60, 10, // Skip to: 13726 /* 11106 */ MCD_OPC_Decode, 56, 195, 1, // Opcode: ADDU_QB /* 11110 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 11123 /* 11114 */ MCD_OPC_CheckPredicate, 12, 48, 10, // Skip to: 13726 /* 11118 */ MCD_OPC_Decode, 218, 12, 195, 1, // Opcode: SUBU_QB /* 11123 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 11135 /* 11127 */ MCD_OPC_CheckPredicate, 12, 35, 10, // Skip to: 13726 /* 11131 */ MCD_OPC_Decode, 58, 195, 1, // Opcode: ADDU_S_QB /* 11135 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 11148 /* 11139 */ MCD_OPC_CheckPredicate, 12, 23, 10, // Skip to: 13726 /* 11143 */ MCD_OPC_Decode, 220, 12, 195, 1, // Opcode: SUBU_S_QB /* 11148 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 11161 /* 11152 */ MCD_OPC_CheckPredicate, 12, 10, 10, // Skip to: 13726 /* 11156 */ MCD_OPC_Decode, 196, 9, 195, 1, // Opcode: MULEU_S_PH_QBL /* 11161 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 11174 /* 11165 */ MCD_OPC_CheckPredicate, 12, 253, 9, // Skip to: 13726 /* 11169 */ MCD_OPC_Decode, 197, 9, 195, 1, // Opcode: MULEU_S_PH_QBR /* 11174 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 11186 /* 11178 */ MCD_OPC_CheckPredicate, 30, 240, 9, // Skip to: 13726 /* 11182 */ MCD_OPC_Decode, 55, 195, 1, // Opcode: ADDU_PH /* 11186 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 11199 /* 11190 */ MCD_OPC_CheckPredicate, 30, 228, 9, // Skip to: 13726 /* 11194 */ MCD_OPC_Decode, 217, 12, 195, 1, // Opcode: SUBU_PH /* 11199 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 11211 /* 11203 */ MCD_OPC_CheckPredicate, 12, 215, 9, // Skip to: 13726 /* 11207 */ MCD_OPC_Decode, 36, 195, 1, // Opcode: ADDQ_PH /* 11211 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 11224 /* 11215 */ MCD_OPC_CheckPredicate, 12, 203, 9, // Skip to: 13726 /* 11219 */ MCD_OPC_Decode, 195, 12, 195, 1, // Opcode: SUBQ_PH /* 11224 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 11236 /* 11228 */ MCD_OPC_CheckPredicate, 30, 190, 9, // Skip to: 13726 /* 11232 */ MCD_OPC_Decode, 57, 195, 1, // Opcode: ADDU_S_PH /* 11236 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 11249 /* 11240 */ MCD_OPC_CheckPredicate, 30, 178, 9, // Skip to: 13726 /* 11244 */ MCD_OPC_Decode, 219, 12, 195, 1, // Opcode: SUBU_S_PH /* 11249 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 11261 /* 11253 */ MCD_OPC_CheckPredicate, 12, 165, 9, // Skip to: 13726 /* 11257 */ MCD_OPC_Decode, 37, 195, 1, // Opcode: ADDQ_S_PH /* 11261 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 11274 /* 11265 */ MCD_OPC_CheckPredicate, 12, 153, 9, // Skip to: 13726 /* 11269 */ MCD_OPC_Decode, 196, 12, 195, 1, // Opcode: SUBQ_S_PH /* 11274 */ MCD_OPC_FilterValue, 16, 7, 0, // Skip to: 11285 /* 11278 */ MCD_OPC_CheckPredicate, 12, 140, 9, // Skip to: 13726 /* 11282 */ MCD_OPC_Decode, 39, 35, // Opcode: ADDSC /* 11285 */ MCD_OPC_FilterValue, 17, 7, 0, // Skip to: 11296 /* 11289 */ MCD_OPC_CheckPredicate, 12, 129, 9, // Skip to: 13726 /* 11293 */ MCD_OPC_Decode, 67, 35, // Opcode: ADDWC /* 11296 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 11308 /* 11300 */ MCD_OPC_CheckPredicate, 12, 118, 9, // Skip to: 13726 /* 11304 */ MCD_OPC_Decode, 223, 8, 35, // Opcode: MODSUB /* 11308 */ MCD_OPC_FilterValue, 20, 15, 0, // Skip to: 11327 /* 11312 */ MCD_OPC_CheckPredicate, 12, 106, 9, // Skip to: 13726 /* 11316 */ MCD_OPC_CheckField, 16, 5, 0, 100, 9, // Skip to: 13726 /* 11322 */ MCD_OPC_Decode, 236, 10, 196, 1, // Opcode: RADDU_W_QB /* 11327 */ MCD_OPC_FilterValue, 22, 7, 0, // Skip to: 11338 /* 11331 */ MCD_OPC_CheckPredicate, 12, 87, 9, // Skip to: 13726 /* 11335 */ MCD_OPC_Decode, 38, 35, // Opcode: ADDQ_S_W /* 11338 */ MCD_OPC_FilterValue, 23, 8, 0, // Skip to: 11350 /* 11342 */ MCD_OPC_CheckPredicate, 12, 76, 9, // Skip to: 13726 /* 11346 */ MCD_OPC_Decode, 197, 12, 35, // Opcode: SUBQ_S_W /* 11350 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 11363 /* 11354 */ MCD_OPC_CheckPredicate, 12, 64, 9, // Skip to: 13726 /* 11358 */ MCD_OPC_Decode, 194, 9, 197, 1, // Opcode: MULEQ_S_W_PHL /* 11363 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 11376 /* 11367 */ MCD_OPC_CheckPredicate, 12, 51, 9, // Skip to: 13726 /* 11371 */ MCD_OPC_Decode, 195, 9, 197, 1, // Opcode: MULEQ_S_W_PHR /* 11376 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 11389 /* 11380 */ MCD_OPC_CheckPredicate, 30, 38, 9, // Skip to: 13726 /* 11384 */ MCD_OPC_Decode, 200, 9, 195, 1, // Opcode: MULQ_S_PH /* 11389 */ MCD_OPC_FilterValue, 31, 29, 9, // Skip to: 13726 /* 11393 */ MCD_OPC_CheckPredicate, 12, 25, 9, // Skip to: 13726 /* 11397 */ MCD_OPC_Decode, 198, 9, 195, 1, // Opcode: MULQ_RS_PH /* 11402 */ MCD_OPC_FilterValue, 17, 69, 1, // Skip to: 11731 /* 11406 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 11409 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 11428 /* 11413 */ MCD_OPC_CheckPredicate, 12, 5, 9, // Skip to: 13726 /* 11417 */ MCD_OPC_CheckField, 11, 5, 0, 255, 8, // Skip to: 13726 /* 11423 */ MCD_OPC_Decode, 161, 3, 198, 1, // Opcode: CMPU_EQ_QB /* 11428 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 11447 /* 11432 */ MCD_OPC_CheckPredicate, 12, 242, 8, // Skip to: 13726 /* 11436 */ MCD_OPC_CheckField, 11, 5, 0, 236, 8, // Skip to: 13726 /* 11442 */ MCD_OPC_Decode, 163, 3, 198, 1, // Opcode: CMPU_LT_QB /* 11447 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 11466 /* 11451 */ MCD_OPC_CheckPredicate, 12, 223, 8, // Skip to: 13726 /* 11455 */ MCD_OPC_CheckField, 11, 5, 0, 217, 8, // Skip to: 13726 /* 11461 */ MCD_OPC_Decode, 162, 3, 198, 1, // Opcode: CMPU_LE_QB /* 11466 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 11479 /* 11470 */ MCD_OPC_CheckPredicate, 12, 204, 8, // Skip to: 13726 /* 11474 */ MCD_OPC_Decode, 162, 10, 195, 1, // Opcode: PICK_QB /* 11479 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 11492 /* 11483 */ MCD_OPC_CheckPredicate, 12, 191, 8, // Skip to: 13726 /* 11487 */ MCD_OPC_Decode, 158, 3, 197, 1, // Opcode: CMPGU_EQ_QB /* 11492 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 11505 /* 11496 */ MCD_OPC_CheckPredicate, 12, 178, 8, // Skip to: 13726 /* 11500 */ MCD_OPC_Decode, 160, 3, 197, 1, // Opcode: CMPGU_LT_QB /* 11505 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 11518 /* 11509 */ MCD_OPC_CheckPredicate, 12, 165, 8, // Skip to: 13726 /* 11513 */ MCD_OPC_Decode, 159, 3, 197, 1, // Opcode: CMPGU_LE_QB /* 11518 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 11537 /* 11522 */ MCD_OPC_CheckPredicate, 12, 152, 8, // Skip to: 13726 /* 11526 */ MCD_OPC_CheckField, 11, 5, 0, 146, 8, // Skip to: 13726 /* 11532 */ MCD_OPC_Decode, 165, 3, 198, 1, // Opcode: CMP_EQ_PH /* 11537 */ MCD_OPC_FilterValue, 9, 15, 0, // Skip to: 11556 /* 11541 */ MCD_OPC_CheckPredicate, 12, 133, 8, // Skip to: 13726 /* 11545 */ MCD_OPC_CheckField, 11, 5, 0, 127, 8, // Skip to: 13726 /* 11551 */ MCD_OPC_Decode, 173, 3, 198, 1, // Opcode: CMP_LT_PH /* 11556 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 11575 /* 11560 */ MCD_OPC_CheckPredicate, 12, 114, 8, // Skip to: 13726 /* 11564 */ MCD_OPC_CheckField, 11, 5, 0, 108, 8, // Skip to: 13726 /* 11570 */ MCD_OPC_Decode, 170, 3, 198, 1, // Opcode: CMP_LE_PH /* 11575 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 11588 /* 11579 */ MCD_OPC_CheckPredicate, 12, 95, 8, // Skip to: 13726 /* 11583 */ MCD_OPC_Decode, 161, 10, 195, 1, // Opcode: PICK_PH /* 11588 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 11601 /* 11592 */ MCD_OPC_CheckPredicate, 12, 82, 8, // Skip to: 13726 /* 11596 */ MCD_OPC_Decode, 176, 10, 195, 1, // Opcode: PRECRQ_QB_PH /* 11601 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 11614 /* 11605 */ MCD_OPC_CheckPredicate, 30, 69, 8, // Skip to: 13726 /* 11609 */ MCD_OPC_Decode, 178, 10, 195, 1, // Opcode: PRECR_QB_PH /* 11614 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 11627 /* 11618 */ MCD_OPC_CheckPredicate, 12, 56, 8, // Skip to: 13726 /* 11622 */ MCD_OPC_Decode, 146, 10, 195, 1, // Opcode: PACKRL_PH /* 11627 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 11640 /* 11631 */ MCD_OPC_CheckPredicate, 12, 43, 8, // Skip to: 13726 /* 11635 */ MCD_OPC_Decode, 174, 10, 195, 1, // Opcode: PRECRQU_S_QB_PH /* 11640 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 11653 /* 11644 */ MCD_OPC_CheckPredicate, 12, 30, 8, // Skip to: 13726 /* 11648 */ MCD_OPC_Decode, 175, 10, 199, 1, // Opcode: PRECRQ_PH_W /* 11653 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 11666 /* 11657 */ MCD_OPC_CheckPredicate, 12, 17, 8, // Skip to: 13726 /* 11661 */ MCD_OPC_Decode, 177, 10, 199, 1, // Opcode: PRECRQ_RS_PH_W /* 11666 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 11679 /* 11670 */ MCD_OPC_CheckPredicate, 30, 4, 8, // Skip to: 13726 /* 11674 */ MCD_OPC_Decode, 155, 3, 197, 1, // Opcode: CMPGDU_EQ_QB /* 11679 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 11692 /* 11683 */ MCD_OPC_CheckPredicate, 30, 247, 7, // Skip to: 13726 /* 11687 */ MCD_OPC_Decode, 157, 3, 197, 1, // Opcode: CMPGDU_LT_QB /* 11692 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 11705 /* 11696 */ MCD_OPC_CheckPredicate, 30, 234, 7, // Skip to: 13726 /* 11700 */ MCD_OPC_Decode, 156, 3, 197, 1, // Opcode: CMPGDU_LE_QB /* 11705 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 11718 /* 11709 */ MCD_OPC_CheckPredicate, 30, 221, 7, // Skip to: 13726 /* 11713 */ MCD_OPC_Decode, 179, 10, 200, 1, // Opcode: PRECR_SRA_PH_W /* 11718 */ MCD_OPC_FilterValue, 31, 212, 7, // Skip to: 13726 /* 11722 */ MCD_OPC_CheckPredicate, 30, 208, 7, // Skip to: 13726 /* 11726 */ MCD_OPC_Decode, 180, 10, 200, 1, // Opcode: PRECR_SRA_R_PH_W /* 11731 */ MCD_OPC_FilterValue, 18, 74, 1, // Skip to: 12065 /* 11735 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 11738 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 11756 /* 11742 */ MCD_OPC_CheckPredicate, 30, 188, 7, // Skip to: 13726 /* 11746 */ MCD_OPC_CheckField, 21, 5, 0, 182, 7, // Skip to: 13726 /* 11752 */ MCD_OPC_Decode, 23, 201, 1, // Opcode: ABSQ_S_QB /* 11756 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 11769 /* 11760 */ MCD_OPC_CheckPredicate, 12, 170, 7, // Skip to: 13726 /* 11764 */ MCD_OPC_Decode, 244, 10, 202, 1, // Opcode: REPL_QB /* 11769 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 11788 /* 11773 */ MCD_OPC_CheckPredicate, 12, 157, 7, // Skip to: 13726 /* 11777 */ MCD_OPC_CheckField, 21, 5, 0, 151, 7, // Skip to: 13726 /* 11783 */ MCD_OPC_Decode, 242, 10, 203, 1, // Opcode: REPLV_QB /* 11788 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 11807 /* 11792 */ MCD_OPC_CheckPredicate, 12, 138, 7, // Skip to: 13726 /* 11796 */ MCD_OPC_CheckField, 21, 5, 0, 132, 7, // Skip to: 13726 /* 11802 */ MCD_OPC_Decode, 164, 10, 201, 1, // Opcode: PRECEQU_PH_QBL /* 11807 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 11826 /* 11811 */ MCD_OPC_CheckPredicate, 12, 119, 7, // Skip to: 13726 /* 11815 */ MCD_OPC_CheckField, 21, 5, 0, 113, 7, // Skip to: 13726 /* 11821 */ MCD_OPC_Decode, 166, 10, 201, 1, // Opcode: PRECEQU_PH_QBR /* 11826 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 11845 /* 11830 */ MCD_OPC_CheckPredicate, 12, 100, 7, // Skip to: 13726 /* 11834 */ MCD_OPC_CheckField, 21, 5, 0, 94, 7, // Skip to: 13726 /* 11840 */ MCD_OPC_Decode, 165, 10, 201, 1, // Opcode: PRECEQU_PH_QBLA /* 11845 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 11864 /* 11849 */ MCD_OPC_CheckPredicate, 12, 81, 7, // Skip to: 13726 /* 11853 */ MCD_OPC_CheckField, 21, 5, 0, 75, 7, // Skip to: 13726 /* 11859 */ MCD_OPC_Decode, 167, 10, 201, 1, // Opcode: PRECEQU_PH_QBRA /* 11864 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 11882 /* 11868 */ MCD_OPC_CheckPredicate, 12, 62, 7, // Skip to: 13726 /* 11872 */ MCD_OPC_CheckField, 21, 5, 0, 56, 7, // Skip to: 13726 /* 11878 */ MCD_OPC_Decode, 22, 201, 1, // Opcode: ABSQ_S_PH /* 11882 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 11895 /* 11886 */ MCD_OPC_CheckPredicate, 12, 44, 7, // Skip to: 13726 /* 11890 */ MCD_OPC_Decode, 243, 10, 202, 1, // Opcode: REPL_PH /* 11895 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 11914 /* 11899 */ MCD_OPC_CheckPredicate, 12, 31, 7, // Skip to: 13726 /* 11903 */ MCD_OPC_CheckField, 21, 5, 0, 25, 7, // Skip to: 13726 /* 11909 */ MCD_OPC_Decode, 241, 10, 203, 1, // Opcode: REPLV_PH /* 11914 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 11933 /* 11918 */ MCD_OPC_CheckPredicate, 12, 12, 7, // Skip to: 13726 /* 11922 */ MCD_OPC_CheckField, 21, 5, 0, 6, 7, // Skip to: 13726 /* 11928 */ MCD_OPC_Decode, 168, 10, 204, 1, // Opcode: PRECEQ_W_PHL /* 11933 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 11952 /* 11937 */ MCD_OPC_CheckPredicate, 12, 249, 6, // Skip to: 13726 /* 11941 */ MCD_OPC_CheckField, 21, 5, 0, 243, 6, // Skip to: 13726 /* 11947 */ MCD_OPC_Decode, 169, 10, 204, 1, // Opcode: PRECEQ_W_PHR /* 11952 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 11970 /* 11956 */ MCD_OPC_CheckPredicate, 12, 230, 6, // Skip to: 13726 /* 11960 */ MCD_OPC_CheckField, 21, 5, 0, 224, 6, // Skip to: 13726 /* 11966 */ MCD_OPC_Decode, 24, 205, 1, // Opcode: ABSQ_S_W /* 11970 */ MCD_OPC_FilterValue, 27, 15, 0, // Skip to: 11989 /* 11974 */ MCD_OPC_CheckPredicate, 12, 212, 6, // Skip to: 13726 /* 11978 */ MCD_OPC_CheckField, 21, 5, 0, 206, 6, // Skip to: 13726 /* 11984 */ MCD_OPC_Decode, 249, 1, 205, 1, // Opcode: BITREV /* 11989 */ MCD_OPC_FilterValue, 28, 15, 0, // Skip to: 12008 /* 11993 */ MCD_OPC_CheckPredicate, 12, 193, 6, // Skip to: 13726 /* 11997 */ MCD_OPC_CheckField, 21, 5, 0, 187, 6, // Skip to: 13726 /* 12003 */ MCD_OPC_Decode, 170, 10, 201, 1, // Opcode: PRECEU_PH_QBL /* 12008 */ MCD_OPC_FilterValue, 29, 15, 0, // Skip to: 12027 /* 12012 */ MCD_OPC_CheckPredicate, 12, 174, 6, // Skip to: 13726 /* 12016 */ MCD_OPC_CheckField, 21, 5, 0, 168, 6, // Skip to: 13726 /* 12022 */ MCD_OPC_Decode, 172, 10, 201, 1, // Opcode: PRECEU_PH_QBR /* 12027 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 12046 /* 12031 */ MCD_OPC_CheckPredicate, 12, 155, 6, // Skip to: 13726 /* 12035 */ MCD_OPC_CheckField, 21, 5, 0, 149, 6, // Skip to: 13726 /* 12041 */ MCD_OPC_Decode, 171, 10, 201, 1, // Opcode: PRECEU_PH_QBLA /* 12046 */ MCD_OPC_FilterValue, 31, 140, 6, // Skip to: 13726 /* 12050 */ MCD_OPC_CheckPredicate, 12, 136, 6, // Skip to: 13726 /* 12054 */ MCD_OPC_CheckField, 21, 5, 0, 130, 6, // Skip to: 13726 /* 12060 */ MCD_OPC_Decode, 173, 10, 201, 1, // Opcode: PRECEU_PH_QBRA /* 12065 */ MCD_OPC_FilterValue, 19, 31, 1, // Skip to: 12356 /* 12069 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 12072 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 12085 /* 12076 */ MCD_OPC_CheckPredicate, 12, 110, 6, // Skip to: 13726 /* 12080 */ MCD_OPC_Decode, 199, 11, 206, 1, // Opcode: SHLL_QB /* 12085 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 12098 /* 12089 */ MCD_OPC_CheckPredicate, 12, 97, 6, // Skip to: 13726 /* 12093 */ MCD_OPC_Decode, 215, 11, 206, 1, // Opcode: SHRL_QB /* 12098 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 12111 /* 12102 */ MCD_OPC_CheckPredicate, 12, 84, 6, // Skip to: 13726 /* 12106 */ MCD_OPC_Decode, 195, 11, 207, 1, // Opcode: SHLLV_QB /* 12111 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 12124 /* 12115 */ MCD_OPC_CheckPredicate, 12, 71, 6, // Skip to: 13726 /* 12119 */ MCD_OPC_Decode, 213, 11, 207, 1, // Opcode: SHRLV_QB /* 12124 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 12137 /* 12128 */ MCD_OPC_CheckPredicate, 30, 58, 6, // Skip to: 13726 /* 12132 */ MCD_OPC_Decode, 208, 11, 206, 1, // Opcode: SHRA_QB /* 12137 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 12150 /* 12141 */ MCD_OPC_CheckPredicate, 30, 45, 6, // Skip to: 13726 /* 12145 */ MCD_OPC_Decode, 210, 11, 206, 1, // Opcode: SHRA_R_QB /* 12150 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 12163 /* 12154 */ MCD_OPC_CheckPredicate, 30, 32, 6, // Skip to: 13726 /* 12158 */ MCD_OPC_Decode, 203, 11, 207, 1, // Opcode: SHRAV_QB /* 12163 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 12176 /* 12167 */ MCD_OPC_CheckPredicate, 30, 19, 6, // Skip to: 13726 /* 12171 */ MCD_OPC_Decode, 205, 11, 207, 1, // Opcode: SHRAV_R_QB /* 12176 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 12189 /* 12180 */ MCD_OPC_CheckPredicate, 12, 6, 6, // Skip to: 13726 /* 12184 */ MCD_OPC_Decode, 198, 11, 206, 1, // Opcode: SHLL_PH /* 12189 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 12202 /* 12193 */ MCD_OPC_CheckPredicate, 12, 249, 5, // Skip to: 13726 /* 12197 */ MCD_OPC_Decode, 207, 11, 206, 1, // Opcode: SHRA_PH /* 12202 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 12215 /* 12206 */ MCD_OPC_CheckPredicate, 12, 236, 5, // Skip to: 13726 /* 12210 */ MCD_OPC_Decode, 194, 11, 207, 1, // Opcode: SHLLV_PH /* 12215 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 12228 /* 12219 */ MCD_OPC_CheckPredicate, 12, 223, 5, // Skip to: 13726 /* 12223 */ MCD_OPC_Decode, 202, 11, 207, 1, // Opcode: SHRAV_PH /* 12228 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 12241 /* 12232 */ MCD_OPC_CheckPredicate, 12, 210, 5, // Skip to: 13726 /* 12236 */ MCD_OPC_Decode, 200, 11, 206, 1, // Opcode: SHLL_S_PH /* 12241 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 12254 /* 12245 */ MCD_OPC_CheckPredicate, 12, 197, 5, // Skip to: 13726 /* 12249 */ MCD_OPC_Decode, 209, 11, 206, 1, // Opcode: SHRA_R_PH /* 12254 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 12267 /* 12258 */ MCD_OPC_CheckPredicate, 12, 184, 5, // Skip to: 13726 /* 12262 */ MCD_OPC_Decode, 196, 11, 207, 1, // Opcode: SHLLV_S_PH /* 12267 */ MCD_OPC_FilterValue, 15, 9, 0, // Skip to: 12280 /* 12271 */ MCD_OPC_CheckPredicate, 12, 171, 5, // Skip to: 13726 /* 12275 */ MCD_OPC_Decode, 204, 11, 207, 1, // Opcode: SHRAV_R_PH /* 12280 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 12293 /* 12284 */ MCD_OPC_CheckPredicate, 12, 158, 5, // Skip to: 13726 /* 12288 */ MCD_OPC_Decode, 201, 11, 208, 1, // Opcode: SHLL_S_W /* 12293 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 12306 /* 12297 */ MCD_OPC_CheckPredicate, 12, 145, 5, // Skip to: 13726 /* 12301 */ MCD_OPC_Decode, 211, 11, 208, 1, // Opcode: SHRA_R_W /* 12306 */ MCD_OPC_FilterValue, 22, 8, 0, // Skip to: 12318 /* 12310 */ MCD_OPC_CheckPredicate, 12, 132, 5, // Skip to: 13726 /* 12314 */ MCD_OPC_Decode, 197, 11, 36, // Opcode: SHLLV_S_W /* 12318 */ MCD_OPC_FilterValue, 23, 8, 0, // Skip to: 12330 /* 12322 */ MCD_OPC_CheckPredicate, 12, 120, 5, // Skip to: 13726 /* 12326 */ MCD_OPC_Decode, 206, 11, 36, // Opcode: SHRAV_R_W /* 12330 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 12343 /* 12334 */ MCD_OPC_CheckPredicate, 30, 108, 5, // Skip to: 13726 /* 12338 */ MCD_OPC_Decode, 214, 11, 206, 1, // Opcode: SHRL_PH /* 12343 */ MCD_OPC_FilterValue, 27, 99, 5, // Skip to: 13726 /* 12347 */ MCD_OPC_CheckPredicate, 30, 95, 5, // Skip to: 13726 /* 12351 */ MCD_OPC_Decode, 212, 11, 207, 1, // Opcode: SHRLV_PH /* 12356 */ MCD_OPC_FilterValue, 24, 199, 0, // Skip to: 12559 /* 12360 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 12363 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12375 /* 12367 */ MCD_OPC_CheckPredicate, 30, 75, 5, // Skip to: 13726 /* 12371 */ MCD_OPC_Decode, 53, 195, 1, // Opcode: ADDUH_QB /* 12375 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 12388 /* 12379 */ MCD_OPC_CheckPredicate, 30, 63, 5, // Skip to: 13726 /* 12383 */ MCD_OPC_Decode, 215, 12, 195, 1, // Opcode: SUBUH_QB /* 12388 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 12400 /* 12392 */ MCD_OPC_CheckPredicate, 30, 50, 5, // Skip to: 13726 /* 12396 */ MCD_OPC_Decode, 54, 195, 1, // Opcode: ADDUH_R_QB /* 12400 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 12413 /* 12404 */ MCD_OPC_CheckPredicate, 30, 38, 5, // Skip to: 13726 /* 12408 */ MCD_OPC_Decode, 216, 12, 195, 1, // Opcode: SUBUH_R_QB /* 12413 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 12425 /* 12417 */ MCD_OPC_CheckPredicate, 30, 25, 5, // Skip to: 13726 /* 12421 */ MCD_OPC_Decode, 32, 195, 1, // Opcode: ADDQH_PH /* 12425 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 12438 /* 12429 */ MCD_OPC_CheckPredicate, 30, 13, 5, // Skip to: 13726 /* 12433 */ MCD_OPC_Decode, 191, 12, 195, 1, // Opcode: SUBQH_PH /* 12438 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 12450 /* 12442 */ MCD_OPC_CheckPredicate, 30, 0, 5, // Skip to: 13726 /* 12446 */ MCD_OPC_Decode, 33, 195, 1, // Opcode: ADDQH_R_PH /* 12450 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 12463 /* 12454 */ MCD_OPC_CheckPredicate, 30, 244, 4, // Skip to: 13726 /* 12458 */ MCD_OPC_Decode, 192, 12, 195, 1, // Opcode: SUBQH_R_PH /* 12463 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 12476 /* 12467 */ MCD_OPC_CheckPredicate, 30, 231, 4, // Skip to: 13726 /* 12471 */ MCD_OPC_Decode, 218, 9, 195, 1, // Opcode: MUL_PH /* 12476 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 12489 /* 12480 */ MCD_OPC_CheckPredicate, 30, 218, 4, // Skip to: 13726 /* 12484 */ MCD_OPC_Decode, 222, 9, 195, 1, // Opcode: MUL_S_PH /* 12489 */ MCD_OPC_FilterValue, 16, 7, 0, // Skip to: 12500 /* 12493 */ MCD_OPC_CheckPredicate, 30, 205, 4, // Skip to: 13726 /* 12497 */ MCD_OPC_Decode, 35, 35, // Opcode: ADDQH_W /* 12500 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 12512 /* 12504 */ MCD_OPC_CheckPredicate, 30, 194, 4, // Skip to: 13726 /* 12508 */ MCD_OPC_Decode, 194, 12, 35, // Opcode: SUBQH_W /* 12512 */ MCD_OPC_FilterValue, 18, 7, 0, // Skip to: 12523 /* 12516 */ MCD_OPC_CheckPredicate, 30, 182, 4, // Skip to: 13726 /* 12520 */ MCD_OPC_Decode, 34, 35, // Opcode: ADDQH_R_W /* 12523 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 12535 /* 12527 */ MCD_OPC_CheckPredicate, 30, 171, 4, // Skip to: 13726 /* 12531 */ MCD_OPC_Decode, 193, 12, 35, // Opcode: SUBQH_R_W /* 12535 */ MCD_OPC_FilterValue, 22, 8, 0, // Skip to: 12547 /* 12539 */ MCD_OPC_CheckPredicate, 30, 159, 4, // Skip to: 13726 /* 12543 */ MCD_OPC_Decode, 201, 9, 35, // Opcode: MULQ_S_W /* 12547 */ MCD_OPC_FilterValue, 23, 151, 4, // Skip to: 13726 /* 12551 */ MCD_OPC_CheckPredicate, 30, 147, 4, // Skip to: 13726 /* 12555 */ MCD_OPC_Decode, 199, 9, 35, // Opcode: MULQ_RS_W /* 12559 */ MCD_OPC_FilterValue, 32, 60, 0, // Skip to: 12623 /* 12563 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 12566 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 12585 /* 12570 */ MCD_OPC_CheckPredicate, 6, 128, 4, // Skip to: 13726 /* 12574 */ MCD_OPC_CheckField, 21, 5, 0, 122, 4, // Skip to: 13726 /* 12580 */ MCD_OPC_Decode, 234, 13, 205, 1, // Opcode: WSBH /* 12585 */ MCD_OPC_FilterValue, 16, 15, 0, // Skip to: 12604 /* 12589 */ MCD_OPC_CheckPredicate, 6, 109, 4, // Skip to: 13726 /* 12593 */ MCD_OPC_CheckField, 21, 5, 0, 103, 4, // Skip to: 13726 /* 12599 */ MCD_OPC_Decode, 168, 11, 205, 1, // Opcode: SEB /* 12604 */ MCD_OPC_FilterValue, 24, 94, 4, // Skip to: 13726 /* 12608 */ MCD_OPC_CheckPredicate, 6, 90, 4, // Skip to: 13726 /* 12612 */ MCD_OPC_CheckField, 21, 5, 0, 84, 4, // Skip to: 13726 /* 12618 */ MCD_OPC_Decode, 171, 11, 205, 1, // Opcode: SEH /* 12623 */ MCD_OPC_FilterValue, 48, 143, 1, // Skip to: 13026 /* 12627 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 12630 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12648 /* 12634 */ MCD_OPC_CheckPredicate, 30, 64, 4, // Skip to: 13726 /* 12638 */ MCD_OPC_CheckField, 13, 3, 0, 58, 4, // Skip to: 13726 /* 12644 */ MCD_OPC_Decode, 230, 4, 116, // Opcode: DPA_W_PH /* 12648 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12666 /* 12652 */ MCD_OPC_CheckPredicate, 30, 46, 4, // Skip to: 13726 /* 12656 */ MCD_OPC_CheckField, 13, 3, 0, 40, 4, // Skip to: 13726 /* 12662 */ MCD_OPC_Decode, 245, 4, 116, // Opcode: DPS_W_PH /* 12666 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 12684 /* 12670 */ MCD_OPC_CheckPredicate, 30, 28, 4, // Skip to: 13726 /* 12674 */ MCD_OPC_CheckField, 13, 3, 0, 22, 4, // Skip to: 13726 /* 12680 */ MCD_OPC_Decode, 205, 9, 116, // Opcode: MULSA_W_PH /* 12684 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 12702 /* 12688 */ MCD_OPC_CheckPredicate, 12, 10, 4, // Skip to: 13726 /* 12692 */ MCD_OPC_CheckField, 13, 3, 0, 4, 4, // Skip to: 13726 /* 12698 */ MCD_OPC_Decode, 227, 4, 116, // Opcode: DPAU_H_QBL /* 12702 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 12720 /* 12706 */ MCD_OPC_CheckPredicate, 12, 248, 3, // Skip to: 13726 /* 12710 */ MCD_OPC_CheckField, 13, 3, 0, 242, 3, // Skip to: 13726 /* 12716 */ MCD_OPC_Decode, 226, 4, 116, // Opcode: DPAQ_S_W_PH /* 12720 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 12738 /* 12724 */ MCD_OPC_CheckPredicate, 12, 230, 3, // Skip to: 13726 /* 12728 */ MCD_OPC_CheckField, 13, 3, 0, 224, 3, // Skip to: 13726 /* 12734 */ MCD_OPC_Decode, 235, 4, 116, // Opcode: DPSQ_S_W_PH /* 12738 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 12756 /* 12742 */ MCD_OPC_CheckPredicate, 12, 212, 3, // Skip to: 13726 /* 12746 */ MCD_OPC_CheckField, 13, 3, 0, 206, 3, // Skip to: 13726 /* 12752 */ MCD_OPC_Decode, 204, 9, 116, // Opcode: MULSAQ_S_W_PH /* 12756 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 12774 /* 12760 */ MCD_OPC_CheckPredicate, 12, 194, 3, // Skip to: 13726 /* 12764 */ MCD_OPC_CheckField, 13, 3, 0, 188, 3, // Skip to: 13726 /* 12770 */ MCD_OPC_Decode, 228, 4, 116, // Opcode: DPAU_H_QBR /* 12774 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 12792 /* 12778 */ MCD_OPC_CheckPredicate, 30, 176, 3, // Skip to: 13726 /* 12782 */ MCD_OPC_CheckField, 13, 3, 0, 170, 3, // Skip to: 13726 /* 12788 */ MCD_OPC_Decode, 229, 4, 116, // Opcode: DPAX_W_PH /* 12792 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 12810 /* 12796 */ MCD_OPC_CheckPredicate, 30, 158, 3, // Skip to: 13726 /* 12800 */ MCD_OPC_CheckField, 13, 3, 0, 152, 3, // Skip to: 13726 /* 12806 */ MCD_OPC_Decode, 244, 4, 116, // Opcode: DPSX_W_PH /* 12810 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 12828 /* 12814 */ MCD_OPC_CheckPredicate, 12, 140, 3, // Skip to: 13726 /* 12818 */ MCD_OPC_CheckField, 13, 3, 0, 134, 3, // Skip to: 13726 /* 12824 */ MCD_OPC_Decode, 242, 4, 116, // Opcode: DPSU_H_QBL /* 12828 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 12846 /* 12832 */ MCD_OPC_CheckPredicate, 12, 122, 3, // Skip to: 13726 /* 12836 */ MCD_OPC_CheckField, 13, 3, 0, 116, 3, // Skip to: 13726 /* 12842 */ MCD_OPC_Decode, 225, 4, 116, // Opcode: DPAQ_SA_L_W /* 12846 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 12864 /* 12850 */ MCD_OPC_CheckPredicate, 12, 104, 3, // Skip to: 13726 /* 12854 */ MCD_OPC_CheckField, 13, 3, 0, 98, 3, // Skip to: 13726 /* 12860 */ MCD_OPC_Decode, 234, 4, 116, // Opcode: DPSQ_SA_L_W /* 12864 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 12882 /* 12868 */ MCD_OPC_CheckPredicate, 12, 86, 3, // Skip to: 13726 /* 12872 */ MCD_OPC_CheckField, 13, 3, 0, 80, 3, // Skip to: 13726 /* 12878 */ MCD_OPC_Decode, 243, 4, 116, // Opcode: DPSU_H_QBR /* 12882 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 12900 /* 12886 */ MCD_OPC_CheckPredicate, 12, 68, 3, // Skip to: 13726 /* 12890 */ MCD_OPC_CheckField, 13, 3, 0, 62, 3, // Skip to: 13726 /* 12896 */ MCD_OPC_Decode, 151, 8, 116, // Opcode: MAQ_SA_W_PHL /* 12900 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 12918 /* 12904 */ MCD_OPC_CheckPredicate, 12, 50, 3, // Skip to: 13726 /* 12908 */ MCD_OPC_CheckField, 13, 3, 0, 44, 3, // Skip to: 13726 /* 12914 */ MCD_OPC_Decode, 152, 8, 116, // Opcode: MAQ_SA_W_PHR /* 12918 */ MCD_OPC_FilterValue, 20, 14, 0, // Skip to: 12936 /* 12922 */ MCD_OPC_CheckPredicate, 12, 32, 3, // Skip to: 13726 /* 12926 */ MCD_OPC_CheckField, 13, 3, 0, 26, 3, // Skip to: 13726 /* 12932 */ MCD_OPC_Decode, 153, 8, 116, // Opcode: MAQ_S_W_PHL /* 12936 */ MCD_OPC_FilterValue, 22, 14, 0, // Skip to: 12954 /* 12940 */ MCD_OPC_CheckPredicate, 12, 14, 3, // Skip to: 13726 /* 12944 */ MCD_OPC_CheckField, 13, 3, 0, 8, 3, // Skip to: 13726 /* 12950 */ MCD_OPC_Decode, 154, 8, 116, // Opcode: MAQ_S_W_PHR /* 12954 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 12972 /* 12958 */ MCD_OPC_CheckPredicate, 30, 252, 2, // Skip to: 13726 /* 12962 */ MCD_OPC_CheckField, 13, 3, 0, 246, 2, // Skip to: 13726 /* 12968 */ MCD_OPC_Decode, 224, 4, 116, // Opcode: DPAQX_S_W_PH /* 12972 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 12990 /* 12976 */ MCD_OPC_CheckPredicate, 30, 234, 2, // Skip to: 13726 /* 12980 */ MCD_OPC_CheckField, 13, 3, 0, 228, 2, // Skip to: 13726 /* 12986 */ MCD_OPC_Decode, 233, 4, 116, // Opcode: DPSQX_S_W_PH /* 12990 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 13008 /* 12994 */ MCD_OPC_CheckPredicate, 30, 216, 2, // Skip to: 13726 /* 12998 */ MCD_OPC_CheckField, 13, 3, 0, 210, 2, // Skip to: 13726 /* 13004 */ MCD_OPC_Decode, 223, 4, 116, // Opcode: DPAQX_SA_W_PH /* 13008 */ MCD_OPC_FilterValue, 27, 202, 2, // Skip to: 13726 /* 13012 */ MCD_OPC_CheckPredicate, 30, 198, 2, // Skip to: 13726 /* 13016 */ MCD_OPC_CheckField, 13, 3, 0, 192, 2, // Skip to: 13726 /* 13022 */ MCD_OPC_Decode, 232, 4, 116, // Opcode: DPSQX_SA_W_PH /* 13026 */ MCD_OPC_FilterValue, 49, 41, 0, // Skip to: 13071 /* 13030 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 13033 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13045 /* 13037 */ MCD_OPC_CheckPredicate, 30, 173, 2, // Skip to: 13726 /* 13041 */ MCD_OPC_Decode, 96, 209, 1, // Opcode: APPEND /* 13045 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 13058 /* 13049 */ MCD_OPC_CheckPredicate, 30, 161, 2, // Skip to: 13726 /* 13053 */ MCD_OPC_Decode, 184, 10, 209, 1, // Opcode: PREPEND /* 13058 */ MCD_OPC_FilterValue, 16, 152, 2, // Skip to: 13726 /* 13062 */ MCD_OPC_CheckPredicate, 30, 148, 2, // Skip to: 13726 /* 13066 */ MCD_OPC_Decode, 169, 1, 209, 1, // Opcode: BALIGN /* 13071 */ MCD_OPC_FilterValue, 56, 58, 1, // Skip to: 13389 /* 13075 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 13078 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 13097 /* 13082 */ MCD_OPC_CheckPredicate, 12, 128, 2, // Skip to: 13726 /* 13086 */ MCD_OPC_CheckField, 13, 3, 0, 122, 2, // Skip to: 13726 /* 13092 */ MCD_OPC_Decode, 157, 5, 210, 1, // Opcode: EXTR_W /* 13097 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 13116 /* 13101 */ MCD_OPC_CheckPredicate, 12, 109, 2, // Skip to: 13726 /* 13105 */ MCD_OPC_CheckField, 13, 3, 0, 103, 2, // Skip to: 13726 /* 13111 */ MCD_OPC_Decode, 153, 5, 211, 1, // Opcode: EXTRV_W /* 13116 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 13135 /* 13120 */ MCD_OPC_CheckPredicate, 12, 90, 2, // Skip to: 13726 /* 13124 */ MCD_OPC_CheckField, 13, 3, 0, 84, 2, // Skip to: 13726 /* 13130 */ MCD_OPC_Decode, 146, 5, 210, 1, // Opcode: EXTP /* 13135 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 13154 /* 13139 */ MCD_OPC_CheckPredicate, 12, 71, 2, // Skip to: 13726 /* 13143 */ MCD_OPC_CheckField, 13, 3, 0, 65, 2, // Skip to: 13726 /* 13149 */ MCD_OPC_Decode, 149, 5, 211, 1, // Opcode: EXTPV /* 13154 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 13173 /* 13158 */ MCD_OPC_CheckPredicate, 12, 52, 2, // Skip to: 13726 /* 13162 */ MCD_OPC_CheckField, 13, 3, 0, 46, 2, // Skip to: 13726 /* 13168 */ MCD_OPC_Decode, 155, 5, 210, 1, // Opcode: EXTR_R_W /* 13173 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 13192 /* 13177 */ MCD_OPC_CheckPredicate, 12, 33, 2, // Skip to: 13726 /* 13181 */ MCD_OPC_CheckField, 13, 3, 0, 27, 2, // Skip to: 13726 /* 13187 */ MCD_OPC_Decode, 151, 5, 211, 1, // Opcode: EXTRV_R_W /* 13192 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 13211 /* 13196 */ MCD_OPC_CheckPredicate, 12, 14, 2, // Skip to: 13726 /* 13200 */ MCD_OPC_CheckField, 13, 3, 0, 8, 2, // Skip to: 13726 /* 13206 */ MCD_OPC_Decode, 154, 5, 210, 1, // Opcode: EXTR_RS_W /* 13211 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 13230 /* 13215 */ MCD_OPC_CheckPredicate, 12, 251, 1, // Skip to: 13726 /* 13219 */ MCD_OPC_CheckField, 13, 3, 0, 245, 1, // Skip to: 13726 /* 13225 */ MCD_OPC_Decode, 150, 5, 211, 1, // Opcode: EXTRV_RS_W /* 13230 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 13249 /* 13234 */ MCD_OPC_CheckPredicate, 12, 232, 1, // Skip to: 13726 /* 13238 */ MCD_OPC_CheckField, 13, 3, 0, 226, 1, // Skip to: 13726 /* 13244 */ MCD_OPC_Decode, 147, 5, 210, 1, // Opcode: EXTPDP /* 13249 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 13268 /* 13253 */ MCD_OPC_CheckPredicate, 12, 213, 1, // Skip to: 13726 /* 13257 */ MCD_OPC_CheckField, 13, 3, 0, 207, 1, // Skip to: 13726 /* 13263 */ MCD_OPC_Decode, 148, 5, 211, 1, // Opcode: EXTPDPV /* 13268 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 13287 /* 13272 */ MCD_OPC_CheckPredicate, 12, 194, 1, // Skip to: 13726 /* 13276 */ MCD_OPC_CheckField, 13, 3, 0, 188, 1, // Skip to: 13726 /* 13282 */ MCD_OPC_Decode, 156, 5, 210, 1, // Opcode: EXTR_S_H /* 13287 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 13306 /* 13291 */ MCD_OPC_CheckPredicate, 12, 175, 1, // Skip to: 13726 /* 13295 */ MCD_OPC_CheckField, 13, 3, 0, 169, 1, // Skip to: 13726 /* 13301 */ MCD_OPC_Decode, 152, 5, 211, 1, // Opcode: EXTRV_S_H /* 13306 */ MCD_OPC_FilterValue, 18, 9, 0, // Skip to: 13319 /* 13310 */ MCD_OPC_CheckPredicate, 12, 156, 1, // Skip to: 13726 /* 13314 */ MCD_OPC_Decode, 237, 10, 212, 1, // Opcode: RDDSP /* 13319 */ MCD_OPC_FilterValue, 19, 9, 0, // Skip to: 13332 /* 13323 */ MCD_OPC_CheckPredicate, 12, 143, 1, // Skip to: 13726 /* 13327 */ MCD_OPC_Decode, 233, 13, 213, 1, // Opcode: WRDSP /* 13332 */ MCD_OPC_FilterValue, 26, 15, 0, // Skip to: 13351 /* 13336 */ MCD_OPC_CheckPredicate, 12, 130, 1, // Skip to: 13726 /* 13340 */ MCD_OPC_CheckField, 13, 7, 0, 124, 1, // Skip to: 13726 /* 13346 */ MCD_OPC_Decode, 192, 11, 214, 1, // Opcode: SHILO /* 13351 */ MCD_OPC_FilterValue, 27, 15, 0, // Skip to: 13370 /* 13355 */ MCD_OPC_CheckPredicate, 12, 111, 1, // Skip to: 13726 /* 13359 */ MCD_OPC_CheckField, 13, 8, 0, 105, 1, // Skip to: 13726 /* 13365 */ MCD_OPC_Decode, 193, 11, 215, 1, // Opcode: SHILOV /* 13370 */ MCD_OPC_FilterValue, 31, 96, 1, // Skip to: 13726 /* 13374 */ MCD_OPC_CheckPredicate, 12, 92, 1, // Skip to: 13726 /* 13378 */ MCD_OPC_CheckField, 13, 8, 0, 86, 1, // Skip to: 13726 /* 13384 */ MCD_OPC_Decode, 180, 9, 215, 1, // Opcode: MTHLIP /* 13389 */ MCD_OPC_FilterValue, 59, 77, 1, // Skip to: 13726 /* 13393 */ MCD_OPC_CheckPredicate, 5, 73, 1, // Skip to: 13726 /* 13397 */ MCD_OPC_CheckField, 21, 5, 0, 67, 1, // Skip to: 13726 /* 13403 */ MCD_OPC_CheckField, 6, 5, 0, 61, 1, // Skip to: 13726 /* 13409 */ MCD_OPC_Decode, 238, 10, 216, 1, // Opcode: RDHWR /* 13414 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 13427 /* 13418 */ MCD_OPC_CheckPredicate, 5, 48, 1, // Skip to: 13726 /* 13422 */ MCD_OPC_Decode, 153, 7, 217, 1, // Opcode: LB /* 13427 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 13440 /* 13431 */ MCD_OPC_CheckPredicate, 5, 35, 1, // Skip to: 13726 /* 13435 */ MCD_OPC_Decode, 184, 7, 217, 1, // Opcode: LH /* 13440 */ MCD_OPC_FilterValue, 34, 9, 0, // Skip to: 13453 /* 13444 */ MCD_OPC_CheckPredicate, 11, 22, 1, // Skip to: 13726 /* 13448 */ MCD_OPC_Decode, 222, 7, 217, 1, // Opcode: LWL /* 13453 */ MCD_OPC_FilterValue, 35, 9, 0, // Skip to: 13466 /* 13457 */ MCD_OPC_CheckPredicate, 1, 9, 1, // Skip to: 13726 /* 13461 */ MCD_OPC_Decode, 213, 7, 217, 1, // Opcode: LW /* 13466 */ MCD_OPC_FilterValue, 36, 9, 0, // Skip to: 13479 /* 13470 */ MCD_OPC_CheckPredicate, 5, 252, 0, // Skip to: 13726 /* 13474 */ MCD_OPC_Decode, 158, 7, 217, 1, // Opcode: LBu /* 13479 */ MCD_OPC_FilterValue, 37, 9, 0, // Skip to: 13492 /* 13483 */ MCD_OPC_CheckPredicate, 5, 239, 0, // Skip to: 13726 /* 13487 */ MCD_OPC_Decode, 189, 7, 217, 1, // Opcode: LHu /* 13492 */ MCD_OPC_FilterValue, 38, 9, 0, // Skip to: 13505 /* 13496 */ MCD_OPC_CheckPredicate, 11, 226, 0, // Skip to: 13726 /* 13500 */ MCD_OPC_Decode, 230, 7, 217, 1, // Opcode: LWR /* 13505 */ MCD_OPC_FilterValue, 40, 9, 0, // Skip to: 13518 /* 13509 */ MCD_OPC_CheckPredicate, 5, 213, 0, // Skip to: 13726 /* 13513 */ MCD_OPC_Decode, 142, 11, 217, 1, // Opcode: SB /* 13518 */ MCD_OPC_FilterValue, 41, 9, 0, // Skip to: 13531 /* 13522 */ MCD_OPC_CheckPredicate, 5, 200, 0, // Skip to: 13726 /* 13526 */ MCD_OPC_Decode, 186, 11, 217, 1, // Opcode: SH /* 13531 */ MCD_OPC_FilterValue, 42, 9, 0, // Skip to: 13544 /* 13535 */ MCD_OPC_CheckPredicate, 11, 187, 0, // Skip to: 13726 /* 13539 */ MCD_OPC_Decode, 243, 12, 217, 1, // Opcode: SWL /* 13544 */ MCD_OPC_FilterValue, 43, 9, 0, // Skip to: 13557 /* 13548 */ MCD_OPC_CheckPredicate, 1, 174, 0, // Skip to: 13726 /* 13552 */ MCD_OPC_Decode, 235, 12, 217, 1, // Opcode: SW /* 13557 */ MCD_OPC_FilterValue, 46, 9, 0, // Skip to: 13570 /* 13561 */ MCD_OPC_CheckPredicate, 11, 161, 0, // Skip to: 13726 /* 13565 */ MCD_OPC_Decode, 250, 12, 217, 1, // Opcode: SWR /* 13570 */ MCD_OPC_FilterValue, 47, 9, 0, // Skip to: 13583 /* 13574 */ MCD_OPC_CheckPredicate, 31, 148, 0, // Skip to: 13726 /* 13578 */ MCD_OPC_Decode, 220, 2, 218, 1, // Opcode: CACHE /* 13583 */ MCD_OPC_FilterValue, 48, 9, 0, // Skip to: 13596 /* 13587 */ MCD_OPC_CheckPredicate, 32, 135, 0, // Skip to: 13726 /* 13591 */ MCD_OPC_Decode, 193, 7, 217, 1, // Opcode: LL /* 13596 */ MCD_OPC_FilterValue, 49, 9, 0, // Skip to: 13609 /* 13600 */ MCD_OPC_CheckPredicate, 5, 122, 0, // Skip to: 13726 /* 13604 */ MCD_OPC_Decode, 216, 7, 219, 1, // Opcode: LWC1 /* 13609 */ MCD_OPC_FilterValue, 50, 9, 0, // Skip to: 13622 /* 13613 */ MCD_OPC_CheckPredicate, 33, 109, 0, // Skip to: 13726 /* 13617 */ MCD_OPC_Decode, 218, 7, 220, 1, // Opcode: LWC2 /* 13622 */ MCD_OPC_FilterValue, 51, 9, 0, // Skip to: 13635 /* 13626 */ MCD_OPC_CheckPredicate, 31, 96, 0, // Skip to: 13726 /* 13630 */ MCD_OPC_Decode, 181, 10, 218, 1, // Opcode: PREF /* 13635 */ MCD_OPC_FilterValue, 53, 9, 0, // Skip to: 13648 /* 13639 */ MCD_OPC_CheckPredicate, 34, 83, 0, // Skip to: 13726 /* 13643 */ MCD_OPC_Decode, 162, 7, 219, 1, // Opcode: LDC1 /* 13648 */ MCD_OPC_FilterValue, 54, 9, 0, // Skip to: 13661 /* 13652 */ MCD_OPC_CheckPredicate, 35, 70, 0, // Skip to: 13726 /* 13656 */ MCD_OPC_Decode, 165, 7, 220, 1, // Opcode: LDC2 /* 13661 */ MCD_OPC_FilterValue, 56, 9, 0, // Skip to: 13674 /* 13665 */ MCD_OPC_CheckPredicate, 32, 57, 0, // Skip to: 13726 /* 13669 */ MCD_OPC_Decode, 146, 11, 217, 1, // Opcode: SC /* 13674 */ MCD_OPC_FilterValue, 57, 9, 0, // Skip to: 13687 /* 13678 */ MCD_OPC_CheckPredicate, 5, 44, 0, // Skip to: 13726 /* 13682 */ MCD_OPC_Decode, 238, 12, 219, 1, // Opcode: SWC1 /* 13687 */ MCD_OPC_FilterValue, 58, 9, 0, // Skip to: 13700 /* 13691 */ MCD_OPC_CheckPredicate, 33, 31, 0, // Skip to: 13726 /* 13695 */ MCD_OPC_Decode, 240, 12, 220, 1, // Opcode: SWC2 /* 13700 */ MCD_OPC_FilterValue, 61, 9, 0, // Skip to: 13713 /* 13704 */ MCD_OPC_CheckPredicate, 34, 18, 0, // Skip to: 13726 /* 13708 */ MCD_OPC_Decode, 156, 11, 219, 1, // Opcode: SDC1 /* 13713 */ MCD_OPC_FilterValue, 62, 9, 0, // Skip to: 13726 /* 13717 */ MCD_OPC_CheckPredicate, 35, 5, 0, // Skip to: 13726 /* 13721 */ MCD_OPC_Decode, 159, 11, 220, 1, // Opcode: SDC2 /* 13726 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableMips32r6_64r632[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 0, 205, 1, // Skip to: 468 /* 7 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 10 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 29 /* 14 */ MCD_OPC_CheckPredicate, 36, 37, 7, // Skip to: 1847 /* 18 */ MCD_OPC_CheckField, 8, 3, 0, 31, 7, // Skip to: 1847 /* 24 */ MCD_OPC_Decode, 206, 7, 221, 1, // Opcode: LSA_R6 /* 29 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 47 /* 33 */ MCD_OPC_CheckPredicate, 36, 18, 7, // Skip to: 1847 /* 37 */ MCD_OPC_CheckField, 6, 15, 16, 12, 7, // Skip to: 1847 /* 43 */ MCD_OPC_Decode, 142, 7, 61, // Opcode: JR_HB_R6 /* 47 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 59 /* 51 */ MCD_OPC_CheckPredicate, 36, 0, 7, // Skip to: 1847 /* 55 */ MCD_OPC_Decode, 155, 11, 64, // Opcode: SDBBP_R6 /* 59 */ MCD_OPC_FilterValue, 16, 20, 0, // Skip to: 83 /* 63 */ MCD_OPC_CheckPredicate, 36, 244, 6, // Skip to: 1847 /* 67 */ MCD_OPC_CheckField, 16, 5, 0, 238, 6, // Skip to: 1847 /* 73 */ MCD_OPC_CheckField, 6, 5, 1, 232, 6, // Skip to: 1847 /* 79 */ MCD_OPC_Decode, 154, 3, 62, // Opcode: CLZ_R6 /* 83 */ MCD_OPC_FilterValue, 17, 20, 0, // Skip to: 107 /* 87 */ MCD_OPC_CheckPredicate, 36, 220, 6, // Skip to: 1847 /* 91 */ MCD_OPC_CheckField, 16, 5, 0, 214, 6, // Skip to: 1847 /* 97 */ MCD_OPC_CheckField, 6, 5, 1, 208, 6, // Skip to: 1847 /* 103 */ MCD_OPC_Decode, 135, 3, 62, // Opcode: CLO_R6 /* 107 */ MCD_OPC_FilterValue, 18, 21, 0, // Skip to: 132 /* 111 */ MCD_OPC_CheckPredicate, 37, 196, 6, // Skip to: 1847 /* 115 */ MCD_OPC_CheckField, 16, 5, 0, 190, 6, // Skip to: 1847 /* 121 */ MCD_OPC_CheckField, 6, 5, 1, 184, 6, // Skip to: 1847 /* 127 */ MCD_OPC_Decode, 171, 4, 222, 1, // Opcode: DCLZ_R6 /* 132 */ MCD_OPC_FilterValue, 19, 21, 0, // Skip to: 157 /* 136 */ MCD_OPC_CheckPredicate, 37, 171, 6, // Skip to: 1847 /* 140 */ MCD_OPC_CheckField, 16, 5, 0, 165, 6, // Skip to: 1847 /* 146 */ MCD_OPC_CheckField, 6, 5, 1, 159, 6, // Skip to: 1847 /* 152 */ MCD_OPC_Decode, 169, 4, 222, 1, // Opcode: DCLO_R6 /* 157 */ MCD_OPC_FilterValue, 21, 15, 0, // Skip to: 176 /* 161 */ MCD_OPC_CheckPredicate, 37, 146, 6, // Skip to: 1847 /* 165 */ MCD_OPC_CheckField, 8, 3, 0, 140, 6, // Skip to: 1847 /* 171 */ MCD_OPC_Decode, 195, 4, 223, 1, // Opcode: DLSA_R6 /* 176 */ MCD_OPC_FilterValue, 24, 27, 0, // Skip to: 207 /* 180 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 183 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 195 /* 187 */ MCD_OPC_CheckPredicate, 36, 120, 6, // Skip to: 1847 /* 191 */ MCD_OPC_Decode, 221, 9, 35, // Opcode: MUL_R6 /* 195 */ MCD_OPC_FilterValue, 3, 112, 6, // Skip to: 1847 /* 199 */ MCD_OPC_CheckPredicate, 36, 108, 6, // Skip to: 1847 /* 203 */ MCD_OPC_Decode, 191, 9, 35, // Opcode: MUH /* 207 */ MCD_OPC_FilterValue, 25, 27, 0, // Skip to: 238 /* 211 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 214 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 226 /* 218 */ MCD_OPC_CheckPredicate, 36, 89, 6, // Skip to: 1847 /* 222 */ MCD_OPC_Decode, 212, 9, 35, // Opcode: MULU /* 226 */ MCD_OPC_FilterValue, 3, 81, 6, // Skip to: 1847 /* 230 */ MCD_OPC_CheckPredicate, 36, 77, 6, // Skip to: 1847 /* 234 */ MCD_OPC_Decode, 192, 9, 35, // Opcode: MUHU /* 238 */ MCD_OPC_FilterValue, 26, 27, 0, // Skip to: 269 /* 242 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 245 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 257 /* 249 */ MCD_OPC_CheckPredicate, 36, 58, 6, // Skip to: 1847 /* 253 */ MCD_OPC_Decode, 183, 4, 35, // Opcode: DIV /* 257 */ MCD_OPC_FilterValue, 3, 50, 6, // Skip to: 1847 /* 261 */ MCD_OPC_CheckPredicate, 36, 46, 6, // Skip to: 1847 /* 265 */ MCD_OPC_Decode, 222, 8, 35, // Opcode: MOD /* 269 */ MCD_OPC_FilterValue, 27, 27, 0, // Skip to: 300 /* 273 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 276 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 288 /* 280 */ MCD_OPC_CheckPredicate, 36, 27, 6, // Skip to: 1847 /* 284 */ MCD_OPC_Decode, 184, 4, 35, // Opcode: DIVU /* 288 */ MCD_OPC_FilterValue, 3, 19, 6, // Skip to: 1847 /* 292 */ MCD_OPC_CheckPredicate, 36, 15, 6, // Skip to: 1847 /* 296 */ MCD_OPC_Decode, 224, 8, 35, // Opcode: MODU /* 300 */ MCD_OPC_FilterValue, 28, 29, 0, // Skip to: 333 /* 304 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 307 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 320 /* 311 */ MCD_OPC_CheckPredicate, 37, 252, 5, // Skip to: 1847 /* 315 */ MCD_OPC_Decode, 210, 4, 224, 1, // Opcode: DMUL_R6 /* 320 */ MCD_OPC_FilterValue, 3, 243, 5, // Skip to: 1847 /* 324 */ MCD_OPC_CheckPredicate, 37, 239, 5, // Skip to: 1847 /* 328 */ MCD_OPC_Decode, 204, 4, 224, 1, // Opcode: DMUH /* 333 */ MCD_OPC_FilterValue, 29, 29, 0, // Skip to: 366 /* 337 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 340 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 353 /* 344 */ MCD_OPC_CheckPredicate, 37, 219, 5, // Skip to: 1847 /* 348 */ MCD_OPC_Decode, 209, 4, 224, 1, // Opcode: DMULU /* 353 */ MCD_OPC_FilterValue, 3, 210, 5, // Skip to: 1847 /* 357 */ MCD_OPC_CheckPredicate, 37, 206, 5, // Skip to: 1847 /* 361 */ MCD_OPC_Decode, 205, 4, 224, 1, // Opcode: DMUHU /* 366 */ MCD_OPC_FilterValue, 30, 29, 0, // Skip to: 399 /* 370 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 373 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 386 /* 377 */ MCD_OPC_CheckPredicate, 37, 186, 5, // Skip to: 1847 /* 381 */ MCD_OPC_Decode, 172, 4, 224, 1, // Opcode: DDIV /* 386 */ MCD_OPC_FilterValue, 3, 177, 5, // Skip to: 1847 /* 390 */ MCD_OPC_CheckPredicate, 37, 173, 5, // Skip to: 1847 /* 394 */ MCD_OPC_Decode, 199, 4, 224, 1, // Opcode: DMOD /* 399 */ MCD_OPC_FilterValue, 31, 29, 0, // Skip to: 432 /* 403 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 406 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 419 /* 410 */ MCD_OPC_CheckPredicate, 37, 153, 5, // Skip to: 1847 /* 414 */ MCD_OPC_Decode, 173, 4, 224, 1, // Opcode: DDIVU /* 419 */ MCD_OPC_FilterValue, 3, 144, 5, // Skip to: 1847 /* 423 */ MCD_OPC_CheckPredicate, 37, 140, 5, // Skip to: 1847 /* 427 */ MCD_OPC_Decode, 200, 4, 224, 1, // Opcode: DMODU /* 432 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 450 /* 436 */ MCD_OPC_CheckPredicate, 38, 127, 5, // Skip to: 1847 /* 440 */ MCD_OPC_CheckField, 6, 5, 0, 121, 5, // Skip to: 1847 /* 446 */ MCD_OPC_Decode, 174, 11, 35, // Opcode: SELEQZ /* 450 */ MCD_OPC_FilterValue, 55, 113, 5, // Skip to: 1847 /* 454 */ MCD_OPC_CheckPredicate, 38, 109, 5, // Skip to: 1847 /* 458 */ MCD_OPC_CheckField, 6, 5, 0, 103, 5, // Skip to: 1847 /* 464 */ MCD_OPC_Decode, 178, 11, 35, // Opcode: SELNEZ /* 468 */ MCD_OPC_FilterValue, 1, 47, 0, // Skip to: 519 /* 472 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ... /* 475 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 488 /* 479 */ MCD_OPC_CheckPredicate, 37, 84, 5, // Skip to: 1847 /* 483 */ MCD_OPC_Decode, 163, 4, 225, 1, // Opcode: DAHI /* 488 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 506 /* 492 */ MCD_OPC_CheckPredicate, 36, 71, 5, // Skip to: 1847 /* 496 */ MCD_OPC_CheckField, 21, 5, 0, 65, 5, // Skip to: 1847 /* 502 */ MCD_OPC_Decode, 167, 1, 75, // Opcode: BAL /* 506 */ MCD_OPC_FilterValue, 30, 57, 5, // Skip to: 1847 /* 510 */ MCD_OPC_CheckPredicate, 37, 53, 5, // Skip to: 1847 /* 514 */ MCD_OPC_Decode, 165, 4, 225, 1, // Opcode: DATI /* 519 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 532 /* 523 */ MCD_OPC_CheckPredicate, 36, 40, 5, // Skip to: 1847 /* 527 */ MCD_OPC_Decode, 220, 1, 226, 1, // Opcode: BGEZALC /* 532 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 545 /* 536 */ MCD_OPC_CheckPredicate, 36, 27, 5, // Skip to: 1847 /* 540 */ MCD_OPC_Decode, 134, 2, 227, 1, // Opcode: BLTZALC /* 545 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 558 /* 549 */ MCD_OPC_CheckPredicate, 36, 14, 5, // Skip to: 1847 /* 553 */ MCD_OPC_Decode, 208, 1, 228, 1, // Opcode: BEQC /* 558 */ MCD_OPC_FilterValue, 15, 8, 0, // Skip to: 570 /* 562 */ MCD_OPC_CheckPredicate, 36, 1, 5, // Skip to: 1847 /* 566 */ MCD_OPC_Decode, 137, 1, 47, // Opcode: AUI /* 570 */ MCD_OPC_FilterValue, 17, 5, 3, // Skip to: 1347 /* 574 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 577 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 590 /* 581 */ MCD_OPC_CheckPredicate, 36, 238, 4, // Skip to: 1847 /* 585 */ MCD_OPC_Decode, 180, 1, 229, 1, // Opcode: BC1EQZ /* 590 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 603 /* 594 */ MCD_OPC_CheckPredicate, 36, 225, 4, // Skip to: 1847 /* 598 */ MCD_OPC_Decode, 184, 1, 229, 1, // Opcode: BC1NEZ /* 603 */ MCD_OPC_FilterValue, 16, 150, 0, // Skip to: 757 /* 607 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 610 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 623 /* 614 */ MCD_OPC_CheckPredicate, 36, 205, 4, // Skip to: 1847 /* 618 */ MCD_OPC_Decode, 183, 11, 230, 1, // Opcode: SEL_S /* 623 */ MCD_OPC_FilterValue, 20, 8, 0, // Skip to: 635 /* 627 */ MCD_OPC_CheckPredicate, 36, 192, 4, // Skip to: 1847 /* 631 */ MCD_OPC_Decode, 177, 11, 93, // Opcode: SELEQZ_S /* 635 */ MCD_OPC_FilterValue, 23, 8, 0, // Skip to: 647 /* 639 */ MCD_OPC_CheckPredicate, 36, 180, 4, // Skip to: 1847 /* 643 */ MCD_OPC_Decode, 181, 11, 93, // Opcode: SELNEZ_S /* 647 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 660 /* 651 */ MCD_OPC_CheckPredicate, 36, 168, 4, // Skip to: 1847 /* 655 */ MCD_OPC_Decode, 132, 8, 231, 1, // Opcode: MADDF_S /* 660 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 673 /* 664 */ MCD_OPC_CheckPredicate, 36, 155, 4, // Skip to: 1847 /* 668 */ MCD_OPC_Decode, 150, 9, 231, 1, // Opcode: MSUBF_S /* 673 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 691 /* 677 */ MCD_OPC_CheckPredicate, 36, 142, 4, // Skip to: 1847 /* 681 */ MCD_OPC_CheckField, 16, 5, 0, 136, 4, // Skip to: 1847 /* 687 */ MCD_OPC_Decode, 246, 10, 94, // Opcode: RINT_S /* 691 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 709 /* 695 */ MCD_OPC_CheckPredicate, 36, 124, 4, // Skip to: 1847 /* 699 */ MCD_OPC_CheckField, 16, 5, 0, 118, 4, // Skip to: 1847 /* 705 */ MCD_OPC_Decode, 244, 2, 94, // Opcode: CLASS_S /* 709 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 721 /* 713 */ MCD_OPC_CheckPredicate, 36, 106, 4, // Skip to: 1847 /* 717 */ MCD_OPC_Decode, 211, 8, 93, // Opcode: MIN_S /* 721 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 733 /* 725 */ MCD_OPC_CheckPredicate, 36, 94, 4, // Skip to: 1847 /* 729 */ MCD_OPC_Decode, 170, 8, 93, // Opcode: MAX_S /* 733 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 745 /* 737 */ MCD_OPC_CheckPredicate, 36, 82, 4, // Skip to: 1847 /* 741 */ MCD_OPC_Decode, 197, 8, 93, // Opcode: MINA_S /* 745 */ MCD_OPC_FilterValue, 31, 74, 4, // Skip to: 1847 /* 749 */ MCD_OPC_CheckPredicate, 36, 70, 4, // Skip to: 1847 /* 753 */ MCD_OPC_Decode, 156, 8, 93, // Opcode: MAXA_S /* 757 */ MCD_OPC_FilterValue, 17, 156, 0, // Skip to: 917 /* 761 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 764 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 777 /* 768 */ MCD_OPC_CheckPredicate, 36, 51, 4, // Skip to: 1847 /* 772 */ MCD_OPC_Decode, 182, 11, 232, 1, // Opcode: SEL_D /* 777 */ MCD_OPC_FilterValue, 20, 9, 0, // Skip to: 790 /* 781 */ MCD_OPC_CheckPredicate, 36, 38, 4, // Skip to: 1847 /* 785 */ MCD_OPC_Decode, 176, 11, 233, 1, // Opcode: SELEQZ_D /* 790 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 803 /* 794 */ MCD_OPC_CheckPredicate, 36, 25, 4, // Skip to: 1847 /* 798 */ MCD_OPC_Decode, 180, 11, 233, 1, // Opcode: SELNEZ_D /* 803 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 816 /* 807 */ MCD_OPC_CheckPredicate, 36, 12, 4, // Skip to: 1847 /* 811 */ MCD_OPC_Decode, 131, 8, 234, 1, // Opcode: MADDF_D /* 816 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 829 /* 820 */ MCD_OPC_CheckPredicate, 36, 255, 3, // Skip to: 1847 /* 824 */ MCD_OPC_Decode, 149, 9, 234, 1, // Opcode: MSUBF_D /* 829 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 847 /* 833 */ MCD_OPC_CheckPredicate, 36, 242, 3, // Skip to: 1847 /* 837 */ MCD_OPC_CheckField, 16, 5, 0, 236, 3, // Skip to: 1847 /* 843 */ MCD_OPC_Decode, 245, 10, 105, // Opcode: RINT_D /* 847 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 865 /* 851 */ MCD_OPC_CheckPredicate, 36, 224, 3, // Skip to: 1847 /* 855 */ MCD_OPC_CheckField, 16, 5, 0, 218, 3, // Skip to: 1847 /* 861 */ MCD_OPC_Decode, 243, 2, 105, // Opcode: CLASS_D /* 865 */ MCD_OPC_FilterValue, 28, 9, 0, // Skip to: 878 /* 869 */ MCD_OPC_CheckPredicate, 36, 206, 3, // Skip to: 1847 /* 873 */ MCD_OPC_Decode, 210, 8, 233, 1, // Opcode: MIN_D /* 878 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 891 /* 882 */ MCD_OPC_CheckPredicate, 36, 193, 3, // Skip to: 1847 /* 886 */ MCD_OPC_Decode, 169, 8, 233, 1, // Opcode: MAX_D /* 891 */ MCD_OPC_FilterValue, 30, 9, 0, // Skip to: 904 /* 895 */ MCD_OPC_CheckPredicate, 36, 180, 3, // Skip to: 1847 /* 899 */ MCD_OPC_Decode, 196, 8, 233, 1, // Opcode: MINA_D /* 904 */ MCD_OPC_FilterValue, 31, 171, 3, // Skip to: 1847 /* 908 */ MCD_OPC_CheckPredicate, 36, 167, 3, // Skip to: 1847 /* 912 */ MCD_OPC_Decode, 155, 8, 233, 1, // Opcode: MAXA_D /* 917 */ MCD_OPC_FilterValue, 20, 211, 0, // Skip to: 1132 /* 921 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 924 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 937 /* 928 */ MCD_OPC_CheckPredicate, 36, 147, 3, // Skip to: 1847 /* 932 */ MCD_OPC_Decode, 168, 3, 235, 1, // Opcode: CMP_F_S /* 937 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 950 /* 941 */ MCD_OPC_CheckPredicate, 36, 134, 3, // Skip to: 1847 /* 945 */ MCD_OPC_Decode, 198, 3, 235, 1, // Opcode: CMP_UN_S /* 950 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 963 /* 954 */ MCD_OPC_CheckPredicate, 36, 121, 3, // Skip to: 1847 /* 958 */ MCD_OPC_Decode, 166, 3, 235, 1, // Opcode: CMP_EQ_S /* 963 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 976 /* 967 */ MCD_OPC_CheckPredicate, 36, 108, 3, // Skip to: 1847 /* 971 */ MCD_OPC_Decode, 192, 3, 235, 1, // Opcode: CMP_UEQ_S /* 976 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 989 /* 980 */ MCD_OPC_CheckPredicate, 36, 95, 3, // Skip to: 1847 /* 984 */ MCD_OPC_Decode, 174, 3, 235, 1, // Opcode: CMP_LT_S /* 989 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 1002 /* 993 */ MCD_OPC_CheckPredicate, 36, 82, 3, // Skip to: 1847 /* 997 */ MCD_OPC_Decode, 196, 3, 235, 1, // Opcode: CMP_ULT_S /* 1002 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 1015 /* 1006 */ MCD_OPC_CheckPredicate, 36, 69, 3, // Skip to: 1847 /* 1010 */ MCD_OPC_Decode, 171, 3, 235, 1, // Opcode: CMP_LE_S /* 1015 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 1028 /* 1019 */ MCD_OPC_CheckPredicate, 36, 56, 3, // Skip to: 1847 /* 1023 */ MCD_OPC_Decode, 194, 3, 235, 1, // Opcode: CMP_ULE_S /* 1028 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 1041 /* 1032 */ MCD_OPC_CheckPredicate, 36, 43, 3, // Skip to: 1847 /* 1036 */ MCD_OPC_Decode, 176, 3, 235, 1, // Opcode: CMP_SAF_S /* 1041 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 1054 /* 1045 */ MCD_OPC_CheckPredicate, 36, 30, 3, // Skip to: 1847 /* 1049 */ MCD_OPC_Decode, 190, 3, 235, 1, // Opcode: CMP_SUN_S /* 1054 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 1067 /* 1058 */ MCD_OPC_CheckPredicate, 36, 17, 3, // Skip to: 1847 /* 1062 */ MCD_OPC_Decode, 178, 3, 235, 1, // Opcode: CMP_SEQ_S /* 1067 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 1080 /* 1071 */ MCD_OPC_CheckPredicate, 36, 4, 3, // Skip to: 1847 /* 1075 */ MCD_OPC_Decode, 184, 3, 235, 1, // Opcode: CMP_SUEQ_S /* 1080 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 1093 /* 1084 */ MCD_OPC_CheckPredicate, 36, 247, 2, // Skip to: 1847 /* 1088 */ MCD_OPC_Decode, 182, 3, 235, 1, // Opcode: CMP_SLT_S /* 1093 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1106 /* 1097 */ MCD_OPC_CheckPredicate, 36, 234, 2, // Skip to: 1847 /* 1101 */ MCD_OPC_Decode, 188, 3, 235, 1, // Opcode: CMP_SULT_S /* 1106 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 1119 /* 1110 */ MCD_OPC_CheckPredicate, 36, 221, 2, // Skip to: 1847 /* 1114 */ MCD_OPC_Decode, 180, 3, 235, 1, // Opcode: CMP_SLE_S /* 1119 */ MCD_OPC_FilterValue, 15, 212, 2, // Skip to: 1847 /* 1123 */ MCD_OPC_CheckPredicate, 36, 208, 2, // Skip to: 1847 /* 1127 */ MCD_OPC_Decode, 186, 3, 235, 1, // Opcode: CMP_SULE_S /* 1132 */ MCD_OPC_FilterValue, 21, 199, 2, // Skip to: 1847 /* 1136 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 1139 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1152 /* 1143 */ MCD_OPC_CheckPredicate, 36, 188, 2, // Skip to: 1847 /* 1147 */ MCD_OPC_Decode, 167, 3, 236, 1, // Opcode: CMP_F_D /* 1152 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 1165 /* 1156 */ MCD_OPC_CheckPredicate, 36, 175, 2, // Skip to: 1847 /* 1160 */ MCD_OPC_Decode, 197, 3, 236, 1, // Opcode: CMP_UN_D /* 1165 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 1178 /* 1169 */ MCD_OPC_CheckPredicate, 36, 162, 2, // Skip to: 1847 /* 1173 */ MCD_OPC_Decode, 164, 3, 236, 1, // Opcode: CMP_EQ_D /* 1178 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 1191 /* 1182 */ MCD_OPC_CheckPredicate, 36, 149, 2, // Skip to: 1847 /* 1186 */ MCD_OPC_Decode, 191, 3, 236, 1, // Opcode: CMP_UEQ_D /* 1191 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 1204 /* 1195 */ MCD_OPC_CheckPredicate, 36, 136, 2, // Skip to: 1847 /* 1199 */ MCD_OPC_Decode, 172, 3, 236, 1, // Opcode: CMP_LT_D /* 1204 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 1217 /* 1208 */ MCD_OPC_CheckPredicate, 36, 123, 2, // Skip to: 1847 /* 1212 */ MCD_OPC_Decode, 195, 3, 236, 1, // Opcode: CMP_ULT_D /* 1217 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 1230 /* 1221 */ MCD_OPC_CheckPredicate, 36, 110, 2, // Skip to: 1847 /* 1225 */ MCD_OPC_Decode, 169, 3, 236, 1, // Opcode: CMP_LE_D /* 1230 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 1243 /* 1234 */ MCD_OPC_CheckPredicate, 36, 97, 2, // Skip to: 1847 /* 1238 */ MCD_OPC_Decode, 193, 3, 236, 1, // Opcode: CMP_ULE_D /* 1243 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 1256 /* 1247 */ MCD_OPC_CheckPredicate, 36, 84, 2, // Skip to: 1847 /* 1251 */ MCD_OPC_Decode, 175, 3, 236, 1, // Opcode: CMP_SAF_D /* 1256 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 1269 /* 1260 */ MCD_OPC_CheckPredicate, 36, 71, 2, // Skip to: 1847 /* 1264 */ MCD_OPC_Decode, 189, 3, 236, 1, // Opcode: CMP_SUN_D /* 1269 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 1282 /* 1273 */ MCD_OPC_CheckPredicate, 36, 58, 2, // Skip to: 1847 /* 1277 */ MCD_OPC_Decode, 177, 3, 236, 1, // Opcode: CMP_SEQ_D /* 1282 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 1295 /* 1286 */ MCD_OPC_CheckPredicate, 36, 45, 2, // Skip to: 1847 /* 1290 */ MCD_OPC_Decode, 183, 3, 236, 1, // Opcode: CMP_SUEQ_D /* 1295 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 1308 /* 1299 */ MCD_OPC_CheckPredicate, 36, 32, 2, // Skip to: 1847 /* 1303 */ MCD_OPC_Decode, 181, 3, 236, 1, // Opcode: CMP_SLT_D /* 1308 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1321 /* 1312 */ MCD_OPC_CheckPredicate, 36, 19, 2, // Skip to: 1847 /* 1316 */ MCD_OPC_Decode, 187, 3, 236, 1, // Opcode: CMP_SULT_D /* 1321 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 1334 /* 1325 */ MCD_OPC_CheckPredicate, 36, 6, 2, // Skip to: 1847 /* 1329 */ MCD_OPC_Decode, 179, 3, 236, 1, // Opcode: CMP_SLE_D /* 1334 */ MCD_OPC_FilterValue, 15, 253, 1, // Skip to: 1847 /* 1338 */ MCD_OPC_CheckPredicate, 36, 249, 1, // Skip to: 1847 /* 1342 */ MCD_OPC_Decode, 185, 3, 236, 1, // Opcode: CMP_SULE_D /* 1347 */ MCD_OPC_FilterValue, 18, 81, 0, // Skip to: 1432 /* 1351 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 1354 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 1367 /* 1358 */ MCD_OPC_CheckPredicate, 36, 229, 1, // Skip to: 1847 /* 1362 */ MCD_OPC_Decode, 188, 1, 237, 1, // Opcode: BC2EQZ /* 1367 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 1380 /* 1371 */ MCD_OPC_CheckPredicate, 36, 216, 1, // Skip to: 1847 /* 1375 */ MCD_OPC_Decode, 219, 7, 238, 1, // Opcode: LWC2_R6 /* 1380 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 1393 /* 1384 */ MCD_OPC_CheckPredicate, 36, 203, 1, // Skip to: 1847 /* 1388 */ MCD_OPC_Decode, 241, 12, 238, 1, // Opcode: SWC2_R6 /* 1393 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 1406 /* 1397 */ MCD_OPC_CheckPredicate, 36, 190, 1, // Skip to: 1847 /* 1401 */ MCD_OPC_Decode, 191, 1, 237, 1, // Opcode: BC2NEZ /* 1406 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 1419 /* 1410 */ MCD_OPC_CheckPredicate, 36, 177, 1, // Skip to: 1847 /* 1414 */ MCD_OPC_Decode, 166, 7, 238, 1, // Opcode: LDC2_R6 /* 1419 */ MCD_OPC_FilterValue, 15, 168, 1, // Skip to: 1847 /* 1423 */ MCD_OPC_CheckPredicate, 36, 164, 1, // Skip to: 1847 /* 1427 */ MCD_OPC_Decode, 160, 11, 238, 1, // Opcode: SDC2_R6 /* 1432 */ MCD_OPC_FilterValue, 22, 9, 0, // Skip to: 1445 /* 1436 */ MCD_OPC_CheckPredicate, 36, 151, 1, // Skip to: 1847 /* 1440 */ MCD_OPC_Decode, 224, 1, 239, 1, // Opcode: BGEZC /* 1445 */ MCD_OPC_FilterValue, 23, 9, 0, // Skip to: 1458 /* 1449 */ MCD_OPC_CheckPredicate, 36, 138, 1, // Skip to: 1847 /* 1453 */ MCD_OPC_Decode, 138, 2, 240, 1, // Opcode: BLTZC /* 1458 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 1471 /* 1462 */ MCD_OPC_CheckPredicate, 36, 125, 1, // Skip to: 1847 /* 1466 */ MCD_OPC_Decode, 147, 2, 241, 1, // Opcode: BNEC /* 1471 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 1484 /* 1475 */ MCD_OPC_CheckPredicate, 37, 112, 1, // Skip to: 1847 /* 1479 */ MCD_OPC_Decode, 166, 4, 242, 1, // Opcode: DAUI /* 1484 */ MCD_OPC_FilterValue, 31, 182, 0, // Skip to: 1670 /* 1488 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 1491 */ MCD_OPC_FilterValue, 32, 40, 0, // Skip to: 1535 /* 1495 */ MCD_OPC_ExtractField, 8, 3, // Inst{10-8} ... /* 1498 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 1523 /* 1502 */ MCD_OPC_CheckPredicate, 36, 85, 1, // Skip to: 1847 /* 1506 */ MCD_OPC_CheckField, 21, 5, 0, 79, 1, // Skip to: 1847 /* 1512 */ MCD_OPC_CheckField, 6, 2, 0, 73, 1, // Skip to: 1847 /* 1518 */ MCD_OPC_Decode, 250, 1, 205, 1, // Opcode: BITSWAP /* 1523 */ MCD_OPC_FilterValue, 2, 64, 1, // Skip to: 1847 /* 1527 */ MCD_OPC_CheckPredicate, 36, 60, 1, // Skip to: 1847 /* 1531 */ MCD_OPC_Decode, 81, 221, 1, // Opcode: ALIGN /* 1535 */ MCD_OPC_FilterValue, 36, 41, 0, // Skip to: 1580 /* 1539 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 1542 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 1567 /* 1546 */ MCD_OPC_CheckPredicate, 37, 41, 1, // Skip to: 1847 /* 1550 */ MCD_OPC_CheckField, 21, 5, 0, 35, 1, // Skip to: 1847 /* 1556 */ MCD_OPC_CheckField, 6, 3, 0, 29, 1, // Skip to: 1847 /* 1562 */ MCD_OPC_Decode, 167, 4, 243, 1, // Opcode: DBITSWAP /* 1567 */ MCD_OPC_FilterValue, 1, 20, 1, // Skip to: 1847 /* 1571 */ MCD_OPC_CheckPredicate, 37, 16, 1, // Skip to: 1847 /* 1575 */ MCD_OPC_Decode, 164, 4, 244, 1, // Opcode: DALIGN /* 1580 */ MCD_OPC_FilterValue, 37, 15, 0, // Skip to: 1599 /* 1584 */ MCD_OPC_CheckPredicate, 36, 3, 1, // Skip to: 1847 /* 1588 */ MCD_OPC_CheckField, 6, 1, 0, 253, 0, // Skip to: 1847 /* 1594 */ MCD_OPC_Decode, 222, 2, 245, 1, // Opcode: CACHE_R6 /* 1599 */ MCD_OPC_FilterValue, 38, 9, 0, // Skip to: 1612 /* 1603 */ MCD_OPC_CheckPredicate, 36, 240, 0, // Skip to: 1847 /* 1607 */ MCD_OPC_Decode, 150, 11, 246, 1, // Opcode: SC_R6 /* 1612 */ MCD_OPC_FilterValue, 39, 9, 0, // Skip to: 1625 /* 1616 */ MCD_OPC_CheckPredicate, 36, 227, 0, // Skip to: 1847 /* 1620 */ MCD_OPC_Decode, 148, 11, 246, 1, // Opcode: SCD_R6 /* 1625 */ MCD_OPC_FilterValue, 53, 15, 0, // Skip to: 1644 /* 1629 */ MCD_OPC_CheckPredicate, 36, 214, 0, // Skip to: 1847 /* 1633 */ MCD_OPC_CheckField, 6, 1, 0, 208, 0, // Skip to: 1847 /* 1639 */ MCD_OPC_Decode, 183, 10, 245, 1, // Opcode: PREF_R6 /* 1644 */ MCD_OPC_FilterValue, 54, 9, 0, // Skip to: 1657 /* 1648 */ MCD_OPC_CheckPredicate, 36, 195, 0, // Skip to: 1847 /* 1652 */ MCD_OPC_Decode, 197, 7, 246, 1, // Opcode: LL_R6 /* 1657 */ MCD_OPC_FilterValue, 55, 186, 0, // Skip to: 1847 /* 1661 */ MCD_OPC_CheckPredicate, 36, 182, 0, // Skip to: 1847 /* 1665 */ MCD_OPC_Decode, 195, 7, 246, 1, // Opcode: LLD_R6 /* 1670 */ MCD_OPC_FilterValue, 50, 9, 0, // Skip to: 1683 /* 1674 */ MCD_OPC_CheckPredicate, 36, 169, 0, // Skip to: 1847 /* 1678 */ MCD_OPC_Decode, 175, 1, 247, 1, // Opcode: BC /* 1683 */ MCD_OPC_FilterValue, 54, 23, 0, // Skip to: 1710 /* 1687 */ MCD_OPC_CheckPredicate, 36, 10, 0, // Skip to: 1701 /* 1691 */ MCD_OPC_CheckField, 21, 5, 0, 4, 0, // Skip to: 1701 /* 1697 */ MCD_OPC_Decode, 135, 7, 52, // Opcode: JIC /* 1701 */ MCD_OPC_CheckPredicate, 36, 142, 0, // Skip to: 1847 /* 1705 */ MCD_OPC_Decode, 212, 1, 248, 1, // Opcode: BEQZC /* 1710 */ MCD_OPC_FilterValue, 58, 9, 0, // Skip to: 1723 /* 1714 */ MCD_OPC_CheckPredicate, 36, 129, 0, // Skip to: 1847 /* 1718 */ MCD_OPC_Decode, 168, 1, 247, 1, // Opcode: BALC /* 1723 */ MCD_OPC_FilterValue, 59, 93, 0, // Skip to: 1820 /* 1727 */ MCD_OPC_ExtractField, 19, 2, // Inst{20-19} ... /* 1730 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1742 /* 1734 */ MCD_OPC_CheckPredicate, 36, 109, 0, // Skip to: 1847 /* 1738 */ MCD_OPC_Decode, 26, 249, 1, // Opcode: ADDIUPC /* 1742 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 1755 /* 1746 */ MCD_OPC_CheckPredicate, 36, 97, 0, // Skip to: 1847 /* 1750 */ MCD_OPC_Decode, 228, 7, 249, 1, // Opcode: LWPC /* 1755 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 1768 /* 1759 */ MCD_OPC_CheckPredicate, 36, 84, 0, // Skip to: 1847 /* 1763 */ MCD_OPC_Decode, 234, 7, 249, 1, // Opcode: LWUPC /* 1768 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 1847 /* 1772 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 1775 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1788 /* 1779 */ MCD_OPC_CheckPredicate, 37, 64, 0, // Skip to: 1847 /* 1783 */ MCD_OPC_Decode, 173, 7, 250, 1, // Opcode: LDPC /* 1788 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 1847 /* 1792 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 1795 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 1808 /* 1799 */ MCD_OPC_CheckPredicate, 36, 44, 0, // Skip to: 1847 /* 1803 */ MCD_OPC_Decode, 138, 1, 251, 1, // Opcode: AUIPC /* 1808 */ MCD_OPC_FilterValue, 3, 35, 0, // Skip to: 1847 /* 1812 */ MCD_OPC_CheckPredicate, 36, 31, 0, // Skip to: 1847 /* 1816 */ MCD_OPC_Decode, 82, 251, 1, // Opcode: ALUIPC /* 1820 */ MCD_OPC_FilterValue, 62, 23, 0, // Skip to: 1847 /* 1824 */ MCD_OPC_CheckPredicate, 36, 10, 0, // Skip to: 1838 /* 1828 */ MCD_OPC_CheckField, 21, 5, 0, 4, 0, // Skip to: 1838 /* 1834 */ MCD_OPC_Decode, 134, 7, 52, // Opcode: JIALC /* 1838 */ MCD_OPC_CheckPredicate, 36, 5, 0, // Skip to: 1847 /* 1842 */ MCD_OPC_Decode, 159, 2, 248, 1, // Opcode: BNEZC /* 1847 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableMips32r6_64r6_GP6432[] = { /* 0 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ... /* 3 */ MCD_OPC_FilterValue, 53, 15, 0, // Skip to: 22 /* 7 */ MCD_OPC_CheckPredicate, 39, 30, 0, // Skip to: 41 /* 11 */ MCD_OPC_CheckField, 26, 6, 0, 24, 0, // Skip to: 41 /* 17 */ MCD_OPC_Decode, 175, 11, 224, 1, // Opcode: SELEQZ64 /* 22 */ MCD_OPC_FilterValue, 55, 15, 0, // Skip to: 41 /* 26 */ MCD_OPC_CheckPredicate, 39, 11, 0, // Skip to: 41 /* 30 */ MCD_OPC_CheckField, 26, 6, 0, 5, 0, // Skip to: 41 /* 36 */ MCD_OPC_Decode, 179, 11, 224, 1, // Opcode: SELNEZ64 /* 41 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableMips6432[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 0, 112, 1, // Skip to: 375 /* 7 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 10 */ MCD_OPC_FilterValue, 20, 15, 0, // Skip to: 29 /* 14 */ MCD_OPC_CheckPredicate, 19, 42, 9, // Skip to: 2364 /* 18 */ MCD_OPC_CheckField, 6, 5, 0, 36, 9, // Skip to: 2364 /* 24 */ MCD_OPC_Decode, 255, 4, 252, 1, // Opcode: DSLLV /* 29 */ MCD_OPC_FilterValue, 22, 29, 0, // Skip to: 62 /* 33 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 36 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 49 /* 40 */ MCD_OPC_CheckPredicate, 19, 16, 9, // Skip to: 2364 /* 44 */ MCD_OPC_Decode, 133, 5, 252, 1, // Opcode: DSRLV /* 49 */ MCD_OPC_FilterValue, 1, 7, 9, // Skip to: 2364 /* 53 */ MCD_OPC_CheckPredicate, 40, 3, 9, // Skip to: 2364 /* 57 */ MCD_OPC_Decode, 248, 4, 252, 1, // Opcode: DROTRV /* 62 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 81 /* 66 */ MCD_OPC_CheckPredicate, 19, 246, 8, // Skip to: 2364 /* 70 */ MCD_OPC_CheckField, 6, 5, 0, 240, 8, // Skip to: 2364 /* 76 */ MCD_OPC_Decode, 130, 5, 252, 1, // Opcode: DSRAV /* 81 */ MCD_OPC_FilterValue, 28, 15, 0, // Skip to: 100 /* 85 */ MCD_OPC_CheckPredicate, 41, 227, 8, // Skip to: 2364 /* 89 */ MCD_OPC_CheckField, 6, 10, 0, 221, 8, // Skip to: 2364 /* 95 */ MCD_OPC_Decode, 207, 4, 253, 1, // Opcode: DMULT /* 100 */ MCD_OPC_FilterValue, 29, 15, 0, // Skip to: 119 /* 104 */ MCD_OPC_CheckPredicate, 41, 208, 8, // Skip to: 2364 /* 108 */ MCD_OPC_CheckField, 6, 10, 0, 202, 8, // Skip to: 2364 /* 114 */ MCD_OPC_Decode, 208, 4, 253, 1, // Opcode: DMULTu /* 119 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 138 /* 123 */ MCD_OPC_CheckPredicate, 41, 189, 8, // Skip to: 2364 /* 127 */ MCD_OPC_CheckField, 6, 10, 0, 183, 8, // Skip to: 2364 /* 133 */ MCD_OPC_Decode, 250, 4, 253, 1, // Opcode: DSDIV /* 138 */ MCD_OPC_FilterValue, 31, 15, 0, // Skip to: 157 /* 142 */ MCD_OPC_CheckPredicate, 41, 170, 8, // Skip to: 2364 /* 146 */ MCD_OPC_CheckField, 6, 10, 0, 164, 8, // Skip to: 2364 /* 152 */ MCD_OPC_Decode, 136, 5, 253, 1, // Opcode: DUDIV /* 157 */ MCD_OPC_FilterValue, 44, 15, 0, // Skip to: 176 /* 161 */ MCD_OPC_CheckPredicate, 19, 151, 8, // Skip to: 2364 /* 165 */ MCD_OPC_CheckField, 6, 5, 0, 145, 8, // Skip to: 2364 /* 171 */ MCD_OPC_Decode, 159, 4, 224, 1, // Opcode: DADD /* 176 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 195 /* 180 */ MCD_OPC_CheckPredicate, 19, 132, 8, // Skip to: 2364 /* 184 */ MCD_OPC_CheckField, 6, 5, 0, 126, 8, // Skip to: 2364 /* 190 */ MCD_OPC_Decode, 162, 4, 224, 1, // Opcode: DADDu /* 195 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 214 /* 199 */ MCD_OPC_CheckPredicate, 19, 113, 8, // Skip to: 2364 /* 203 */ MCD_OPC_CheckField, 6, 5, 0, 107, 8, // Skip to: 2364 /* 209 */ MCD_OPC_Decode, 134, 5, 224, 1, // Opcode: DSUB /* 214 */ MCD_OPC_FilterValue, 47, 15, 0, // Skip to: 233 /* 218 */ MCD_OPC_CheckPredicate, 19, 94, 8, // Skip to: 2364 /* 222 */ MCD_OPC_CheckField, 6, 5, 0, 88, 8, // Skip to: 2364 /* 228 */ MCD_OPC_Decode, 135, 5, 224, 1, // Opcode: DSUBu /* 233 */ MCD_OPC_FilterValue, 56, 15, 0, // Skip to: 252 /* 237 */ MCD_OPC_CheckPredicate, 19, 75, 8, // Skip to: 2364 /* 241 */ MCD_OPC_CheckField, 21, 5, 0, 69, 8, // Skip to: 2364 /* 247 */ MCD_OPC_Decode, 252, 4, 254, 1, // Opcode: DSLL /* 252 */ MCD_OPC_FilterValue, 58, 29, 0, // Skip to: 285 /* 256 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 259 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 272 /* 263 */ MCD_OPC_CheckPredicate, 19, 49, 8, // Skip to: 2364 /* 267 */ MCD_OPC_Decode, 131, 5, 254, 1, // Opcode: DSRL /* 272 */ MCD_OPC_FilterValue, 1, 40, 8, // Skip to: 2364 /* 276 */ MCD_OPC_CheckPredicate, 40, 36, 8, // Skip to: 2364 /* 280 */ MCD_OPC_Decode, 246, 4, 254, 1, // Opcode: DROTR /* 285 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 304 /* 289 */ MCD_OPC_CheckPredicate, 19, 23, 8, // Skip to: 2364 /* 293 */ MCD_OPC_CheckField, 21, 5, 0, 17, 8, // Skip to: 2364 /* 299 */ MCD_OPC_Decode, 128, 5, 254, 1, // Opcode: DSRA /* 304 */ MCD_OPC_FilterValue, 60, 15, 0, // Skip to: 323 /* 308 */ MCD_OPC_CheckPredicate, 19, 4, 8, // Skip to: 2364 /* 312 */ MCD_OPC_CheckField, 21, 5, 0, 254, 7, // Skip to: 2364 /* 318 */ MCD_OPC_Decode, 253, 4, 254, 1, // Opcode: DSLL32 /* 323 */ MCD_OPC_FilterValue, 62, 29, 0, // Skip to: 356 /* 327 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 330 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 343 /* 334 */ MCD_OPC_CheckPredicate, 19, 234, 7, // Skip to: 2364 /* 338 */ MCD_OPC_Decode, 132, 5, 254, 1, // Opcode: DSRL32 /* 343 */ MCD_OPC_FilterValue, 1, 225, 7, // Skip to: 2364 /* 347 */ MCD_OPC_CheckPredicate, 40, 221, 7, // Skip to: 2364 /* 351 */ MCD_OPC_Decode, 247, 4, 254, 1, // Opcode: DROTR32 /* 356 */ MCD_OPC_FilterValue, 63, 212, 7, // Skip to: 2364 /* 360 */ MCD_OPC_CheckPredicate, 19, 208, 7, // Skip to: 2364 /* 364 */ MCD_OPC_CheckField, 21, 5, 0, 202, 7, // Skip to: 2364 /* 370 */ MCD_OPC_Decode, 129, 5, 254, 1, // Opcode: DSRA32 /* 375 */ MCD_OPC_FilterValue, 16, 41, 0, // Skip to: 420 /* 379 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 382 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 401 /* 386 */ MCD_OPC_CheckPredicate, 42, 182, 7, // Skip to: 2364 /* 390 */ MCD_OPC_CheckField, 3, 8, 0, 176, 7, // Skip to: 2364 /* 396 */ MCD_OPC_Decode, 196, 4, 255, 1, // Opcode: DMFC0 /* 401 */ MCD_OPC_FilterValue, 5, 167, 7, // Skip to: 2364 /* 405 */ MCD_OPC_CheckPredicate, 42, 163, 7, // Skip to: 2364 /* 409 */ MCD_OPC_CheckField, 3, 8, 0, 157, 7, // Skip to: 2364 /* 415 */ MCD_OPC_Decode, 201, 4, 255, 1, // Opcode: DMTC0 /* 420 */ MCD_OPC_FilterValue, 17, 222, 3, // Skip to: 1414 /* 424 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 427 */ MCD_OPC_FilterValue, 0, 54, 0, // Skip to: 485 /* 431 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 434 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 453 /* 438 */ MCD_OPC_CheckPredicate, 43, 130, 7, // Skip to: 2364 /* 442 */ MCD_OPC_CheckField, 6, 5, 0, 124, 7, // Skip to: 2364 /* 448 */ MCD_OPC_Decode, 184, 8, 128, 2, // Opcode: MFHC1_D64 /* 453 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 472 /* 457 */ MCD_OPC_CheckPredicate, 43, 111, 7, // Skip to: 2364 /* 461 */ MCD_OPC_CheckField, 6, 5, 0, 105, 7, // Skip to: 2364 /* 467 */ MCD_OPC_Decode, 174, 9, 129, 2, // Opcode: MTHC1_D64 /* 472 */ MCD_OPC_FilterValue, 17, 96, 7, // Skip to: 2364 /* 476 */ MCD_OPC_CheckPredicate, 44, 92, 7, // Skip to: 2364 /* 480 */ MCD_OPC_Decode, 172, 5, 233, 1, // Opcode: FADD_D64 /* 485 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 504 /* 489 */ MCD_OPC_CheckPredicate, 44, 79, 7, // Skip to: 2364 /* 493 */ MCD_OPC_CheckField, 21, 5, 17, 73, 7, // Skip to: 2364 /* 499 */ MCD_OPC_Decode, 174, 6, 233, 1, // Opcode: FSUB_D64 /* 504 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 523 /* 508 */ MCD_OPC_CheckPredicate, 44, 60, 7, // Skip to: 2364 /* 512 */ MCD_OPC_CheckField, 21, 5, 17, 54, 7, // Skip to: 2364 /* 518 */ MCD_OPC_Decode, 137, 6, 233, 1, // Opcode: FMUL_D64 /* 523 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 542 /* 527 */ MCD_OPC_CheckPredicate, 44, 41, 7, // Skip to: 2364 /* 531 */ MCD_OPC_CheckField, 21, 5, 17, 35, 7, // Skip to: 2364 /* 537 */ MCD_OPC_Decode, 208, 5, 233, 1, // Opcode: FDIV_D64 /* 542 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 561 /* 546 */ MCD_OPC_CheckPredicate, 45, 22, 7, // Skip to: 2364 /* 550 */ MCD_OPC_CheckField, 16, 10, 160, 4, 15, 7, // Skip to: 2364 /* 557 */ MCD_OPC_Decode, 167, 6, 105, // Opcode: FSQRT_D64 /* 561 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 580 /* 565 */ MCD_OPC_CheckPredicate, 44, 3, 7, // Skip to: 2364 /* 569 */ MCD_OPC_CheckField, 16, 10, 160, 4, 252, 6, // Skip to: 2364 /* 576 */ MCD_OPC_Decode, 165, 5, 105, // Opcode: FABS_D64 /* 580 */ MCD_OPC_FilterValue, 6, 15, 0, // Skip to: 599 /* 584 */ MCD_OPC_CheckPredicate, 44, 240, 6, // Skip to: 2364 /* 588 */ MCD_OPC_CheckField, 16, 10, 160, 4, 233, 6, // Skip to: 2364 /* 595 */ MCD_OPC_Decode, 130, 6, 105, // Opcode: FMOV_D64 /* 599 */ MCD_OPC_FilterValue, 7, 15, 0, // Skip to: 618 /* 603 */ MCD_OPC_CheckPredicate, 44, 221, 6, // Skip to: 2364 /* 607 */ MCD_OPC_CheckField, 16, 10, 160, 4, 214, 6, // Skip to: 2364 /* 614 */ MCD_OPC_Decode, 143, 6, 105, // Opcode: FNEG_D64 /* 618 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 651 /* 622 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 625 */ MCD_OPC_FilterValue, 128, 4, 8, 0, // Skip to: 638 /* 630 */ MCD_OPC_CheckPredicate, 44, 194, 6, // Skip to: 2364 /* 634 */ MCD_OPC_Decode, 252, 10, 98, // Opcode: ROUND_L_S /* 638 */ MCD_OPC_FilterValue, 160, 4, 185, 6, // Skip to: 2364 /* 643 */ MCD_OPC_CheckPredicate, 44, 181, 6, // Skip to: 2364 /* 647 */ MCD_OPC_Decode, 251, 10, 105, // Opcode: ROUND_L_D64 /* 651 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 684 /* 655 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 658 */ MCD_OPC_FilterValue, 128, 4, 8, 0, // Skip to: 671 /* 663 */ MCD_OPC_CheckPredicate, 44, 161, 6, // Skip to: 2364 /* 667 */ MCD_OPC_Decode, 215, 13, 98, // Opcode: TRUNC_L_S /* 671 */ MCD_OPC_FilterValue, 160, 4, 152, 6, // Skip to: 2364 /* 676 */ MCD_OPC_CheckPredicate, 44, 148, 6, // Skip to: 2364 /* 680 */ MCD_OPC_Decode, 214, 13, 105, // Opcode: TRUNC_L_D64 /* 684 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 717 /* 688 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 691 */ MCD_OPC_FilterValue, 128, 4, 8, 0, // Skip to: 704 /* 696 */ MCD_OPC_CheckPredicate, 44, 128, 6, // Skip to: 2364 /* 700 */ MCD_OPC_Decode, 224, 2, 98, // Opcode: CEIL_L_S /* 704 */ MCD_OPC_FilterValue, 160, 4, 119, 6, // Skip to: 2364 /* 709 */ MCD_OPC_CheckPredicate, 44, 115, 6, // Skip to: 2364 /* 713 */ MCD_OPC_Decode, 223, 2, 105, // Opcode: CEIL_L_D64 /* 717 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 750 /* 721 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 724 */ MCD_OPC_FilterValue, 128, 4, 8, 0, // Skip to: 737 /* 729 */ MCD_OPC_CheckPredicate, 44, 95, 6, // Skip to: 2364 /* 733 */ MCD_OPC_Decode, 240, 5, 98, // Opcode: FLOOR_L_S /* 737 */ MCD_OPC_FilterValue, 160, 4, 86, 6, // Skip to: 2364 /* 742 */ MCD_OPC_CheckPredicate, 44, 82, 6, // Skip to: 2364 /* 746 */ MCD_OPC_Decode, 239, 5, 105, // Opcode: FLOOR_L_D64 /* 750 */ MCD_OPC_FilterValue, 12, 16, 0, // Skip to: 770 /* 754 */ MCD_OPC_CheckPredicate, 45, 70, 6, // Skip to: 2364 /* 758 */ MCD_OPC_CheckField, 16, 10, 160, 4, 63, 6, // Skip to: 2364 /* 765 */ MCD_OPC_Decode, 254, 10, 130, 2, // Opcode: ROUND_W_D64 /* 770 */ MCD_OPC_FilterValue, 13, 16, 0, // Skip to: 790 /* 774 */ MCD_OPC_CheckPredicate, 45, 50, 6, // Skip to: 2364 /* 778 */ MCD_OPC_CheckField, 16, 10, 160, 4, 43, 6, // Skip to: 2364 /* 785 */ MCD_OPC_Decode, 217, 13, 130, 2, // Opcode: TRUNC_W_D64 /* 790 */ MCD_OPC_FilterValue, 14, 16, 0, // Skip to: 810 /* 794 */ MCD_OPC_CheckPredicate, 45, 30, 6, // Skip to: 2364 /* 798 */ MCD_OPC_CheckField, 16, 10, 160, 4, 23, 6, // Skip to: 2364 /* 805 */ MCD_OPC_Decode, 226, 2, 130, 2, // Opcode: CEIL_W_D64 /* 810 */ MCD_OPC_FilterValue, 15, 16, 0, // Skip to: 830 /* 814 */ MCD_OPC_CheckPredicate, 45, 10, 6, // Skip to: 2364 /* 818 */ MCD_OPC_CheckField, 16, 10, 160, 4, 3, 6, // Skip to: 2364 /* 825 */ MCD_OPC_Decode, 242, 5, 130, 2, // Opcode: FLOOR_W_D64 /* 830 */ MCD_OPC_FilterValue, 17, 41, 0, // Skip to: 875 /* 834 */ MCD_OPC_ExtractField, 16, 2, // Inst{17-16} ... /* 837 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 856 /* 841 */ MCD_OPC_CheckPredicate, 46, 239, 5, // Skip to: 2364 /* 845 */ MCD_OPC_CheckField, 21, 5, 17, 233, 5, // Skip to: 2364 /* 851 */ MCD_OPC_Decode, 238, 8, 131, 2, // Opcode: MOVF_D64 /* 856 */ MCD_OPC_FilterValue, 1, 224, 5, // Skip to: 2364 /* 860 */ MCD_OPC_CheckPredicate, 46, 220, 5, // Skip to: 2364 /* 864 */ MCD_OPC_CheckField, 21, 5, 17, 214, 5, // Skip to: 2364 /* 870 */ MCD_OPC_Decode, 130, 9, 131, 2, // Opcode: MOVT_D64 /* 875 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 894 /* 879 */ MCD_OPC_CheckPredicate, 46, 201, 5, // Skip to: 2364 /* 883 */ MCD_OPC_CheckField, 21, 5, 17, 195, 5, // Skip to: 2364 /* 889 */ MCD_OPC_Decode, 142, 9, 132, 2, // Opcode: MOVZ_I_D64 /* 894 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 913 /* 898 */ MCD_OPC_CheckPredicate, 46, 182, 5, // Skip to: 2364 /* 902 */ MCD_OPC_CheckField, 21, 5, 17, 176, 5, // Skip to: 2364 /* 908 */ MCD_OPC_Decode, 250, 8, 132, 2, // Opcode: MOVN_I_D64 /* 913 */ MCD_OPC_FilterValue, 32, 31, 0, // Skip to: 948 /* 917 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 920 */ MCD_OPC_FilterValue, 160, 4, 9, 0, // Skip to: 934 /* 925 */ MCD_OPC_CheckPredicate, 44, 155, 5, // Skip to: 2364 /* 929 */ MCD_OPC_Decode, 226, 3, 130, 2, // Opcode: CVT_S_D64 /* 934 */ MCD_OPC_FilterValue, 160, 5, 145, 5, // Skip to: 2364 /* 939 */ MCD_OPC_CheckPredicate, 44, 141, 5, // Skip to: 2364 /* 943 */ MCD_OPC_Decode, 227, 3, 130, 2, // Opcode: CVT_S_L /* 948 */ MCD_OPC_FilterValue, 33, 42, 0, // Skip to: 994 /* 952 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 955 */ MCD_OPC_FilterValue, 128, 4, 8, 0, // Skip to: 968 /* 960 */ MCD_OPC_CheckPredicate, 44, 120, 5, // Skip to: 2364 /* 964 */ MCD_OPC_Decode, 217, 3, 98, // Opcode: CVT_D64_S /* 968 */ MCD_OPC_FilterValue, 128, 5, 8, 0, // Skip to: 981 /* 973 */ MCD_OPC_CheckPredicate, 44, 107, 5, // Skip to: 2364 /* 977 */ MCD_OPC_Decode, 218, 3, 98, // Opcode: CVT_D64_W /* 981 */ MCD_OPC_FilterValue, 160, 5, 98, 5, // Skip to: 2364 /* 986 */ MCD_OPC_CheckPredicate, 44, 94, 5, // Skip to: 2364 /* 990 */ MCD_OPC_Decode, 216, 3, 105, // Opcode: CVT_D64_L /* 994 */ MCD_OPC_FilterValue, 36, 16, 0, // Skip to: 1014 /* 998 */ MCD_OPC_CheckPredicate, 44, 82, 5, // Skip to: 2364 /* 1002 */ MCD_OPC_CheckField, 16, 10, 160, 4, 75, 5, // Skip to: 2364 /* 1009 */ MCD_OPC_Decode, 231, 3, 130, 2, // Opcode: CVT_W_D64 /* 1014 */ MCD_OPC_FilterValue, 48, 21, 0, // Skip to: 1039 /* 1018 */ MCD_OPC_CheckPredicate, 47, 62, 5, // Skip to: 2364 /* 1022 */ MCD_OPC_CheckField, 21, 5, 17, 56, 5, // Skip to: 2364 /* 1028 */ MCD_OPC_CheckField, 6, 5, 0, 50, 5, // Skip to: 2364 /* 1034 */ MCD_OPC_Decode, 239, 3, 133, 2, // Opcode: C_F_D64 /* 1039 */ MCD_OPC_FilterValue, 49, 21, 0, // Skip to: 1064 /* 1043 */ MCD_OPC_CheckPredicate, 47, 37, 5, // Skip to: 2364 /* 1047 */ MCD_OPC_CheckField, 21, 5, 17, 31, 5, // Skip to: 2364 /* 1053 */ MCD_OPC_CheckField, 6, 5, 0, 25, 5, // Skip to: 2364 /* 1059 */ MCD_OPC_Decode, 153, 4, 133, 2, // Opcode: C_UN_D64 /* 1064 */ MCD_OPC_FilterValue, 50, 21, 0, // Skip to: 1089 /* 1068 */ MCD_OPC_CheckPredicate, 47, 12, 5, // Skip to: 2364 /* 1072 */ MCD_OPC_CheckField, 21, 5, 17, 6, 5, // Skip to: 2364 /* 1078 */ MCD_OPC_CheckField, 6, 5, 0, 0, 5, // Skip to: 2364 /* 1084 */ MCD_OPC_Decode, 236, 3, 133, 2, // Opcode: C_EQ_D64 /* 1089 */ MCD_OPC_FilterValue, 51, 21, 0, // Skip to: 1114 /* 1093 */ MCD_OPC_CheckPredicate, 47, 243, 4, // Skip to: 2364 /* 1097 */ MCD_OPC_CheckField, 21, 5, 17, 237, 4, // Skip to: 2364 /* 1103 */ MCD_OPC_CheckField, 6, 5, 0, 231, 4, // Skip to: 2364 /* 1109 */ MCD_OPC_Decode, 144, 4, 133, 2, // Opcode: C_UEQ_D64 /* 1114 */ MCD_OPC_FilterValue, 52, 21, 0, // Skip to: 1139 /* 1118 */ MCD_OPC_CheckPredicate, 47, 218, 4, // Skip to: 2364 /* 1122 */ MCD_OPC_CheckField, 21, 5, 17, 212, 4, // Skip to: 2364 /* 1128 */ MCD_OPC_CheckField, 6, 5, 0, 206, 4, // Skip to: 2364 /* 1134 */ MCD_OPC_Decode, 135, 4, 133, 2, // Opcode: C_OLT_D64 /* 1139 */ MCD_OPC_FilterValue, 53, 21, 0, // Skip to: 1164 /* 1143 */ MCD_OPC_CheckPredicate, 47, 193, 4, // Skip to: 2364 /* 1147 */ MCD_OPC_CheckField, 21, 5, 17, 187, 4, // Skip to: 2364 /* 1153 */ MCD_OPC_CheckField, 6, 5, 0, 181, 4, // Skip to: 2364 /* 1159 */ MCD_OPC_Decode, 150, 4, 133, 2, // Opcode: C_ULT_D64 /* 1164 */ MCD_OPC_FilterValue, 54, 21, 0, // Skip to: 1189 /* 1168 */ MCD_OPC_CheckPredicate, 47, 168, 4, // Skip to: 2364 /* 1172 */ MCD_OPC_CheckField, 21, 5, 17, 162, 4, // Skip to: 2364 /* 1178 */ MCD_OPC_CheckField, 6, 5, 0, 156, 4, // Skip to: 2364 /* 1184 */ MCD_OPC_Decode, 132, 4, 133, 2, // Opcode: C_OLE_D64 /* 1189 */ MCD_OPC_FilterValue, 55, 21, 0, // Skip to: 1214 /* 1193 */ MCD_OPC_CheckPredicate, 47, 143, 4, // Skip to: 2364 /* 1197 */ MCD_OPC_CheckField, 21, 5, 17, 137, 4, // Skip to: 2364 /* 1203 */ MCD_OPC_CheckField, 6, 5, 0, 131, 4, // Skip to: 2364 /* 1209 */ MCD_OPC_Decode, 147, 4, 133, 2, // Opcode: C_ULE_D64 /* 1214 */ MCD_OPC_FilterValue, 56, 21, 0, // Skip to: 1239 /* 1218 */ MCD_OPC_CheckPredicate, 47, 118, 4, // Skip to: 2364 /* 1222 */ MCD_OPC_CheckField, 21, 5, 17, 112, 4, // Skip to: 2364 /* 1228 */ MCD_OPC_CheckField, 6, 5, 0, 106, 4, // Skip to: 2364 /* 1234 */ MCD_OPC_Decode, 141, 4, 133, 2, // Opcode: C_SF_D64 /* 1239 */ MCD_OPC_FilterValue, 57, 21, 0, // Skip to: 1264 /* 1243 */ MCD_OPC_CheckPredicate, 47, 93, 4, // Skip to: 2364 /* 1247 */ MCD_OPC_CheckField, 21, 5, 17, 87, 4, // Skip to: 2364 /* 1253 */ MCD_OPC_CheckField, 6, 5, 0, 81, 4, // Skip to: 2364 /* 1259 */ MCD_OPC_Decode, 251, 3, 133, 2, // Opcode: C_NGLE_D64 /* 1264 */ MCD_OPC_FilterValue, 58, 21, 0, // Skip to: 1289 /* 1268 */ MCD_OPC_CheckPredicate, 47, 68, 4, // Skip to: 2364 /* 1272 */ MCD_OPC_CheckField, 21, 5, 17, 62, 4, // Skip to: 2364 /* 1278 */ MCD_OPC_CheckField, 6, 5, 0, 56, 4, // Skip to: 2364 /* 1284 */ MCD_OPC_Decode, 138, 4, 133, 2, // Opcode: C_SEQ_D64 /* 1289 */ MCD_OPC_FilterValue, 59, 21, 0, // Skip to: 1314 /* 1293 */ MCD_OPC_CheckPredicate, 47, 43, 4, // Skip to: 2364 /* 1297 */ MCD_OPC_CheckField, 21, 5, 17, 37, 4, // Skip to: 2364 /* 1303 */ MCD_OPC_CheckField, 6, 5, 0, 31, 4, // Skip to: 2364 /* 1309 */ MCD_OPC_Decode, 254, 3, 133, 2, // Opcode: C_NGL_D64 /* 1314 */ MCD_OPC_FilterValue, 60, 21, 0, // Skip to: 1339 /* 1318 */ MCD_OPC_CheckPredicate, 47, 18, 4, // Skip to: 2364 /* 1322 */ MCD_OPC_CheckField, 21, 5, 17, 12, 4, // Skip to: 2364 /* 1328 */ MCD_OPC_CheckField, 6, 5, 0, 6, 4, // Skip to: 2364 /* 1334 */ MCD_OPC_Decode, 245, 3, 133, 2, // Opcode: C_LT_D64 /* 1339 */ MCD_OPC_FilterValue, 61, 21, 0, // Skip to: 1364 /* 1343 */ MCD_OPC_CheckPredicate, 47, 249, 3, // Skip to: 2364 /* 1347 */ MCD_OPC_CheckField, 21, 5, 17, 243, 3, // Skip to: 2364 /* 1353 */ MCD_OPC_CheckField, 6, 5, 0, 237, 3, // Skip to: 2364 /* 1359 */ MCD_OPC_Decode, 248, 3, 133, 2, // Opcode: C_NGE_D64 /* 1364 */ MCD_OPC_FilterValue, 62, 21, 0, // Skip to: 1389 /* 1368 */ MCD_OPC_CheckPredicate, 47, 224, 3, // Skip to: 2364 /* 1372 */ MCD_OPC_CheckField, 21, 5, 17, 218, 3, // Skip to: 2364 /* 1378 */ MCD_OPC_CheckField, 6, 5, 0, 212, 3, // Skip to: 2364 /* 1384 */ MCD_OPC_Decode, 242, 3, 133, 2, // Opcode: C_LE_D64 /* 1389 */ MCD_OPC_FilterValue, 63, 203, 3, // Skip to: 2364 /* 1393 */ MCD_OPC_CheckPredicate, 47, 199, 3, // Skip to: 2364 /* 1397 */ MCD_OPC_CheckField, 21, 5, 17, 193, 3, // Skip to: 2364 /* 1403 */ MCD_OPC_CheckField, 6, 5, 0, 187, 3, // Skip to: 2364 /* 1409 */ MCD_OPC_Decode, 129, 4, 133, 2, // Opcode: C_NGT_D64 /* 1414 */ MCD_OPC_FilterValue, 18, 41, 0, // Skip to: 1459 /* 1418 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 1421 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 1440 /* 1425 */ MCD_OPC_CheckPredicate, 42, 167, 3, // Skip to: 2364 /* 1429 */ MCD_OPC_CheckField, 3, 8, 0, 161, 3, // Skip to: 2364 /* 1435 */ MCD_OPC_Decode, 198, 4, 255, 1, // Opcode: DMFC2 /* 1440 */ MCD_OPC_FilterValue, 5, 152, 3, // Skip to: 2364 /* 1444 */ MCD_OPC_CheckPredicate, 42, 148, 3, // Skip to: 2364 /* 1448 */ MCD_OPC_CheckField, 3, 8, 0, 142, 3, // Skip to: 2364 /* 1454 */ MCD_OPC_Decode, 203, 4, 255, 1, // Opcode: DMTC2 /* 1459 */ MCD_OPC_FilterValue, 19, 131, 0, // Skip to: 1594 /* 1463 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 1466 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 1485 /* 1470 */ MCD_OPC_CheckPredicate, 48, 122, 3, // Skip to: 2364 /* 1474 */ MCD_OPC_CheckField, 11, 5, 0, 116, 3, // Skip to: 2364 /* 1480 */ MCD_OPC_Decode, 176, 7, 134, 2, // Opcode: LDXC164 /* 1485 */ MCD_OPC_FilterValue, 5, 15, 0, // Skip to: 1504 /* 1489 */ MCD_OPC_CheckPredicate, 49, 103, 3, // Skip to: 2364 /* 1493 */ MCD_OPC_CheckField, 11, 5, 0, 97, 3, // Skip to: 2364 /* 1499 */ MCD_OPC_Decode, 208, 7, 134, 2, // Opcode: LUXC164 /* 1504 */ MCD_OPC_FilterValue, 9, 15, 0, // Skip to: 1523 /* 1508 */ MCD_OPC_CheckPredicate, 48, 84, 3, // Skip to: 2364 /* 1512 */ MCD_OPC_CheckField, 6, 5, 0, 78, 3, // Skip to: 2364 /* 1518 */ MCD_OPC_Decode, 167, 11, 135, 2, // Opcode: SDXC164 /* 1523 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 1542 /* 1527 */ MCD_OPC_CheckPredicate, 49, 65, 3, // Skip to: 2364 /* 1531 */ MCD_OPC_CheckField, 6, 5, 0, 59, 3, // Skip to: 2364 /* 1537 */ MCD_OPC_Decode, 233, 12, 135, 2, // Opcode: SUXC164 /* 1542 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 1555 /* 1546 */ MCD_OPC_CheckPredicate, 48, 46, 3, // Skip to: 2364 /* 1550 */ MCD_OPC_Decode, 144, 8, 136, 2, // Opcode: MADD_D64 /* 1555 */ MCD_OPC_FilterValue, 41, 9, 0, // Skip to: 1568 /* 1559 */ MCD_OPC_CheckPredicate, 48, 33, 3, // Skip to: 2364 /* 1563 */ MCD_OPC_Decode, 162, 9, 136, 2, // Opcode: MSUB_D64 /* 1568 */ MCD_OPC_FilterValue, 49, 9, 0, // Skip to: 1581 /* 1572 */ MCD_OPC_CheckPredicate, 48, 20, 3, // Skip to: 2364 /* 1576 */ MCD_OPC_Decode, 241, 9, 136, 2, // Opcode: NMADD_D64 /* 1581 */ MCD_OPC_FilterValue, 57, 11, 3, // Skip to: 2364 /* 1585 */ MCD_OPC_CheckPredicate, 48, 7, 3, // Skip to: 2364 /* 1589 */ MCD_OPC_Decode, 246, 9, 136, 2, // Opcode: NMSUB_D64 /* 1594 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 1607 /* 1598 */ MCD_OPC_CheckPredicate, 41, 250, 2, // Skip to: 2364 /* 1602 */ MCD_OPC_Decode, 160, 4, 137, 2, // Opcode: DADDi /* 1607 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 1620 /* 1611 */ MCD_OPC_CheckPredicate, 19, 237, 2, // Skip to: 2364 /* 1615 */ MCD_OPC_Decode, 161, 4, 137, 2, // Opcode: DADDiu /* 1620 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 1633 /* 1624 */ MCD_OPC_CheckPredicate, 41, 224, 2, // Skip to: 2364 /* 1628 */ MCD_OPC_Decode, 172, 7, 217, 1, // Opcode: LDL /* 1633 */ MCD_OPC_FilterValue, 27, 9, 0, // Skip to: 1646 /* 1637 */ MCD_OPC_CheckPredicate, 41, 211, 2, // Skip to: 2364 /* 1641 */ MCD_OPC_Decode, 174, 7, 217, 1, // Opcode: LDR /* 1646 */ MCD_OPC_FilterValue, 28, 159, 1, // Skip to: 2065 /* 1650 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 1653 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 1672 /* 1657 */ MCD_OPC_CheckPredicate, 50, 191, 2, // Skip to: 2364 /* 1661 */ MCD_OPC_CheckField, 6, 5, 0, 185, 2, // Skip to: 2364 /* 1667 */ MCD_OPC_Decode, 206, 4, 224, 1, // Opcode: DMUL /* 1672 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 1691 /* 1676 */ MCD_OPC_CheckPredicate, 50, 172, 2, // Skip to: 2364 /* 1680 */ MCD_OPC_CheckField, 6, 15, 0, 166, 2, // Skip to: 2364 /* 1686 */ MCD_OPC_Decode, 185, 9, 138, 2, // Opcode: MTM0 /* 1691 */ MCD_OPC_FilterValue, 9, 15, 0, // Skip to: 1710 /* 1695 */ MCD_OPC_CheckPredicate, 50, 153, 2, // Skip to: 2364 /* 1699 */ MCD_OPC_CheckField, 6, 15, 0, 147, 2, // Skip to: 2364 /* 1705 */ MCD_OPC_Decode, 188, 9, 138, 2, // Opcode: MTP0 /* 1710 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 1729 /* 1714 */ MCD_OPC_CheckPredicate, 50, 134, 2, // Skip to: 2364 /* 1718 */ MCD_OPC_CheckField, 6, 15, 0, 128, 2, // Skip to: 2364 /* 1724 */ MCD_OPC_Decode, 189, 9, 138, 2, // Opcode: MTP1 /* 1729 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 1748 /* 1733 */ MCD_OPC_CheckPredicate, 50, 115, 2, // Skip to: 2364 /* 1737 */ MCD_OPC_CheckField, 6, 15, 0, 109, 2, // Skip to: 2364 /* 1743 */ MCD_OPC_Decode, 190, 9, 138, 2, // Opcode: MTP2 /* 1748 */ MCD_OPC_FilterValue, 12, 15, 0, // Skip to: 1767 /* 1752 */ MCD_OPC_CheckPredicate, 50, 96, 2, // Skip to: 2364 /* 1756 */ MCD_OPC_CheckField, 6, 15, 0, 90, 2, // Skip to: 2364 /* 1762 */ MCD_OPC_Decode, 186, 9, 138, 2, // Opcode: MTM1 /* 1767 */ MCD_OPC_FilterValue, 13, 15, 0, // Skip to: 1786 /* 1771 */ MCD_OPC_CheckPredicate, 50, 77, 2, // Skip to: 2364 /* 1775 */ MCD_OPC_CheckField, 6, 15, 0, 71, 2, // Skip to: 2364 /* 1781 */ MCD_OPC_Decode, 187, 9, 138, 2, // Opcode: MTM2 /* 1786 */ MCD_OPC_FilterValue, 15, 15, 0, // Skip to: 1805 /* 1790 */ MCD_OPC_CheckPredicate, 50, 58, 2, // Skip to: 2364 /* 1794 */ MCD_OPC_CheckField, 6, 5, 0, 52, 2, // Skip to: 2364 /* 1800 */ MCD_OPC_Decode, 226, 13, 224, 1, // Opcode: VMULU /* 1805 */ MCD_OPC_FilterValue, 16, 15, 0, // Skip to: 1824 /* 1809 */ MCD_OPC_CheckPredicate, 50, 39, 2, // Skip to: 2364 /* 1813 */ MCD_OPC_CheckField, 6, 5, 0, 33, 2, // Skip to: 2364 /* 1819 */ MCD_OPC_Decode, 225, 13, 224, 1, // Opcode: VMM0 /* 1824 */ MCD_OPC_FilterValue, 17, 15, 0, // Skip to: 1843 /* 1828 */ MCD_OPC_CheckPredicate, 50, 20, 2, // Skip to: 2364 /* 1832 */ MCD_OPC_CheckField, 6, 5, 0, 14, 2, // Skip to: 2364 /* 1838 */ MCD_OPC_Decode, 224, 13, 224, 1, // Opcode: V3MULU /* 1843 */ MCD_OPC_FilterValue, 36, 15, 0, // Skip to: 1862 /* 1847 */ MCD_OPC_CheckPredicate, 51, 1, 2, // Skip to: 2364 /* 1851 */ MCD_OPC_CheckField, 6, 5, 0, 251, 1, // Skip to: 2364 /* 1857 */ MCD_OPC_Decode, 170, 4, 139, 2, // Opcode: DCLZ /* 1862 */ MCD_OPC_FilterValue, 37, 15, 0, // Skip to: 1881 /* 1866 */ MCD_OPC_CheckPredicate, 51, 238, 1, // Skip to: 2364 /* 1870 */ MCD_OPC_CheckField, 6, 5, 0, 232, 1, // Skip to: 2364 /* 1876 */ MCD_OPC_Decode, 168, 4, 139, 2, // Opcode: DCLO /* 1881 */ MCD_OPC_FilterValue, 40, 15, 0, // Skip to: 1900 /* 1885 */ MCD_OPC_CheckPredicate, 50, 219, 1, // Skip to: 2364 /* 1889 */ MCD_OPC_CheckField, 6, 5, 0, 213, 1, // Skip to: 2364 /* 1895 */ MCD_OPC_Decode, 166, 1, 224, 1, // Opcode: BADDu /* 1900 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 1919 /* 1904 */ MCD_OPC_CheckPredicate, 50, 200, 1, // Skip to: 2364 /* 1908 */ MCD_OPC_CheckField, 6, 5, 0, 194, 1, // Skip to: 2364 /* 1914 */ MCD_OPC_Decode, 184, 11, 224, 1, // Opcode: SEQ /* 1919 */ MCD_OPC_FilterValue, 43, 15, 0, // Skip to: 1938 /* 1923 */ MCD_OPC_CheckPredicate, 50, 181, 1, // Skip to: 2364 /* 1927 */ MCD_OPC_CheckField, 6, 5, 0, 175, 1, // Skip to: 2364 /* 1933 */ MCD_OPC_Decode, 252, 11, 224, 1, // Opcode: SNE /* 1938 */ MCD_OPC_FilterValue, 44, 20, 0, // Skip to: 1962 /* 1942 */ MCD_OPC_CheckPredicate, 50, 162, 1, // Skip to: 2364 /* 1946 */ MCD_OPC_CheckField, 16, 5, 0, 156, 1, // Skip to: 2364 /* 1952 */ MCD_OPC_CheckField, 6, 5, 0, 150, 1, // Skip to: 2364 /* 1958 */ MCD_OPC_Decode, 163, 10, 62, // Opcode: POP /* 1962 */ MCD_OPC_FilterValue, 45, 21, 0, // Skip to: 1987 /* 1966 */ MCD_OPC_CheckPredicate, 50, 138, 1, // Skip to: 2364 /* 1970 */ MCD_OPC_CheckField, 16, 5, 0, 132, 1, // Skip to: 2364 /* 1976 */ MCD_OPC_CheckField, 6, 5, 0, 126, 1, // Skip to: 2364 /* 1982 */ MCD_OPC_Decode, 231, 4, 222, 1, // Opcode: DPOP /* 1987 */ MCD_OPC_FilterValue, 46, 9, 0, // Skip to: 2000 /* 1991 */ MCD_OPC_CheckPredicate, 50, 113, 1, // Skip to: 2364 /* 1995 */ MCD_OPC_Decode, 185, 11, 140, 2, // Opcode: SEQi /* 2000 */ MCD_OPC_FilterValue, 47, 9, 0, // Skip to: 2013 /* 2004 */ MCD_OPC_CheckPredicate, 50, 100, 1, // Skip to: 2364 /* 2008 */ MCD_OPC_Decode, 253, 11, 140, 2, // Opcode: SNEi /* 2013 */ MCD_OPC_FilterValue, 50, 9, 0, // Skip to: 2026 /* 2017 */ MCD_OPC_CheckPredicate, 50, 87, 1, // Skip to: 2364 /* 2021 */ MCD_OPC_Decode, 241, 2, 141, 2, // Opcode: CINS /* 2026 */ MCD_OPC_FilterValue, 51, 9, 0, // Skip to: 2039 /* 2030 */ MCD_OPC_CheckPredicate, 50, 74, 1, // Skip to: 2364 /* 2034 */ MCD_OPC_Decode, 242, 2, 141, 2, // Opcode: CINS32 /* 2039 */ MCD_OPC_FilterValue, 58, 9, 0, // Skip to: 2052 /* 2043 */ MCD_OPC_CheckPredicate, 50, 61, 1, // Skip to: 2364 /* 2047 */ MCD_OPC_Decode, 158, 5, 141, 2, // Opcode: EXTS /* 2052 */ MCD_OPC_FilterValue, 59, 52, 1, // Skip to: 2364 /* 2056 */ MCD_OPC_CheckPredicate, 50, 48, 1, // Skip to: 2364 /* 2060 */ MCD_OPC_Decode, 159, 5, 141, 2, // Opcode: EXTS32 /* 2065 */ MCD_OPC_FilterValue, 31, 126, 0, // Skip to: 2195 /* 2069 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 2072 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 2085 /* 2076 */ MCD_OPC_CheckPredicate, 6, 28, 1, // Skip to: 2364 /* 2080 */ MCD_OPC_Decode, 177, 4, 142, 2, // Opcode: DEXTM /* 2085 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 2098 /* 2089 */ MCD_OPC_CheckPredicate, 6, 15, 1, // Skip to: 2364 /* 2093 */ MCD_OPC_Decode, 178, 4, 142, 2, // Opcode: DEXTU /* 2098 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 2111 /* 2102 */ MCD_OPC_CheckPredicate, 6, 2, 1, // Skip to: 2364 /* 2106 */ MCD_OPC_Decode, 176, 4, 142, 2, // Opcode: DEXT /* 2111 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 2124 /* 2115 */ MCD_OPC_CheckPredicate, 6, 245, 0, // Skip to: 2364 /* 2119 */ MCD_OPC_Decode, 181, 4, 143, 2, // Opcode: DINSM /* 2124 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 2137 /* 2128 */ MCD_OPC_CheckPredicate, 6, 232, 0, // Skip to: 2364 /* 2132 */ MCD_OPC_Decode, 182, 4, 143, 2, // Opcode: DINSU /* 2137 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 2150 /* 2141 */ MCD_OPC_CheckPredicate, 6, 219, 0, // Skip to: 2364 /* 2145 */ MCD_OPC_Decode, 180, 4, 143, 2, // Opcode: DINS /* 2150 */ MCD_OPC_FilterValue, 36, 210, 0, // Skip to: 2364 /* 2154 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 2157 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 2176 /* 2161 */ MCD_OPC_CheckPredicate, 40, 199, 0, // Skip to: 2364 /* 2165 */ MCD_OPC_CheckField, 21, 5, 0, 193, 0, // Skip to: 2364 /* 2171 */ MCD_OPC_Decode, 249, 4, 243, 1, // Opcode: DSBH /* 2176 */ MCD_OPC_FilterValue, 5, 184, 0, // Skip to: 2364 /* 2180 */ MCD_OPC_CheckPredicate, 40, 180, 0, // Skip to: 2364 /* 2184 */ MCD_OPC_CheckField, 21, 5, 0, 174, 0, // Skip to: 2364 /* 2190 */ MCD_OPC_Decode, 251, 4, 243, 1, // Opcode: DSHD /* 2195 */ MCD_OPC_FilterValue, 39, 9, 0, // Skip to: 2208 /* 2199 */ MCD_OPC_CheckPredicate, 19, 161, 0, // Skip to: 2364 /* 2203 */ MCD_OPC_Decode, 241, 7, 217, 1, // Opcode: LWu /* 2208 */ MCD_OPC_FilterValue, 44, 9, 0, // Skip to: 2221 /* 2212 */ MCD_OPC_CheckPredicate, 41, 148, 0, // Skip to: 2364 /* 2216 */ MCD_OPC_Decode, 164, 11, 217, 1, // Opcode: SDL /* 2221 */ MCD_OPC_FilterValue, 45, 9, 0, // Skip to: 2234 /* 2225 */ MCD_OPC_CheckPredicate, 41, 135, 0, // Skip to: 2364 /* 2229 */ MCD_OPC_Decode, 165, 11, 217, 1, // Opcode: SDR /* 2234 */ MCD_OPC_FilterValue, 50, 9, 0, // Skip to: 2247 /* 2238 */ MCD_OPC_CheckPredicate, 50, 122, 0, // Skip to: 2364 /* 2242 */ MCD_OPC_Decode, 171, 1, 144, 2, // Opcode: BBIT0 /* 2247 */ MCD_OPC_FilterValue, 52, 9, 0, // Skip to: 2260 /* 2251 */ MCD_OPC_CheckPredicate, 41, 109, 0, // Skip to: 2364 /* 2255 */ MCD_OPC_Decode, 194, 7, 217, 1, // Opcode: LLD /* 2260 */ MCD_OPC_FilterValue, 53, 9, 0, // Skip to: 2273 /* 2264 */ MCD_OPC_CheckPredicate, 52, 96, 0, // Skip to: 2364 /* 2268 */ MCD_OPC_Decode, 163, 7, 219, 1, // Opcode: LDC164 /* 2273 */ MCD_OPC_FilterValue, 54, 9, 0, // Skip to: 2286 /* 2277 */ MCD_OPC_CheckPredicate, 50, 83, 0, // Skip to: 2364 /* 2281 */ MCD_OPC_Decode, 172, 1, 144, 2, // Opcode: BBIT032 /* 2286 */ MCD_OPC_FilterValue, 55, 9, 0, // Skip to: 2299 /* 2290 */ MCD_OPC_CheckPredicate, 19, 70, 0, // Skip to: 2364 /* 2294 */ MCD_OPC_Decode, 161, 7, 217, 1, // Opcode: LD /* 2299 */ MCD_OPC_FilterValue, 58, 9, 0, // Skip to: 2312 /* 2303 */ MCD_OPC_CheckPredicate, 50, 57, 0, // Skip to: 2364 /* 2307 */ MCD_OPC_Decode, 173, 1, 144, 2, // Opcode: BBIT1 /* 2312 */ MCD_OPC_FilterValue, 60, 9, 0, // Skip to: 2325 /* 2316 */ MCD_OPC_CheckPredicate, 41, 44, 0, // Skip to: 2364 /* 2320 */ MCD_OPC_Decode, 147, 11, 217, 1, // Opcode: SCD /* 2325 */ MCD_OPC_FilterValue, 61, 9, 0, // Skip to: 2338 /* 2329 */ MCD_OPC_CheckPredicate, 52, 31, 0, // Skip to: 2364 /* 2333 */ MCD_OPC_Decode, 157, 11, 219, 1, // Opcode: SDC164 /* 2338 */ MCD_OPC_FilterValue, 62, 9, 0, // Skip to: 2351 /* 2342 */ MCD_OPC_CheckPredicate, 50, 18, 0, // Skip to: 2364 /* 2346 */ MCD_OPC_Decode, 174, 1, 144, 2, // Opcode: BBIT132 /* 2351 */ MCD_OPC_FilterValue, 63, 9, 0, // Skip to: 2364 /* 2355 */ MCD_OPC_CheckPredicate, 19, 5, 0, // Skip to: 2364 /* 2359 */ MCD_OPC_Decode, 151, 11, 217, 1, // Opcode: SD /* 2364 */ MCD_OPC_Fail, 0 }; static bool getbool(uint64_t b) { return b != 0; } static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { switch (Idx) { default: // llvm_unreachable("Invalid index!"); case 0: return getbool((Bits & Mips_FeatureMips16)); case 1: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureMicroMips)); case 2: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips2) && !(Bits & Mips_FeatureMicroMips)); case 3: return getbool((Bits & Mips_FeatureMicroMips)); case 4: return getbool((Bits & Mips_FeatureMips32) && (Bits & Mips_FeatureMicroMips)); case 5: return getbool(!(Bits & Mips_FeatureMips16)); case 6: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips32r2)); case 7: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips4_32) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 8: return getbool((Bits & Mips_FeatureMSA)); case 9: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips32) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 10: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips32)); case 11: return getbool(!(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && !(Bits & Mips_FeatureMicroMips)); case 12: return getbool((Bits & Mips_FeatureDSP)); case 13: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 14: return getbool((Bits & Mips_FeatureMSA) && (Bits & Mips_FeatureMips64)); case 15: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips2)); case 16: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 17: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips3_32)); case 18: return getbool(!(Bits & Mips_FeatureMicroMips)); case 19: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips3)); case 20: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips32r2) && !(Bits & Mips_FeatureFP64Bit)); case 21: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureFP64Bit)); case 22: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips3_32r2)); case 23: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips2) && !(Bits & Mips_FeatureFP64Bit)); case 24: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips4_32) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 25: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && !(Bits & Mips_FeatureFP64Bit)); case 26: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips4_32r2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 27: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips4_32r2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && !(Bits & Mips_FeatureMicroMips)); case 28: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips5_32r2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 29: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips4_32r2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 30: return getbool((Bits & Mips_FeatureDSPR2)); case 31: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips3_32) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 32: return getbool((Bits & Mips_FeatureMips2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && !(Bits & Mips_FeatureMicroMips)); case 33: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && !(Bits & Mips_FeatureMicroMips)); case 34: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips2)); case 35: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && !(Bits & Mips_FeatureMicroMips)); case 36: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips32r6)); case 37: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips64r6)); case 38: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureGP64Bit) && (Bits & Mips_FeatureMips32r6)); case 39: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureGP64Bit) && (Bits & Mips_FeatureMips32r6)); case 40: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips64r2)); case 41: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips3) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 42: return getbool((Bits & Mips_FeatureMips64)); case 43: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips32r2) && (Bits & Mips_FeatureFP64Bit)); case 44: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureFP64Bit)); case 45: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips2) && (Bits & Mips_FeatureFP64Bit)); case 46: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips4_32) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 47: return getbool(!(Bits & Mips_FeatureMips16) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6) && (Bits & Mips_FeatureFP64Bit)); case 48: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips4_32r2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 49: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips5_32r2) && !(Bits & Mips_FeatureMips32r6) && !(Bits & Mips_FeatureMips64r6)); case 50: return getbool((Bits & Mips_FeatureCnMips)); case 51: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureMips64) && !(Bits & Mips_FeatureMips64r6)); case 52: return getbool(!(Bits & Mips_FeatureMips16) && (Bits & Mips_FeatureFP64Bit) && (Bits & Mips_FeatureMips2)); } } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ return S; \ case 1: \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 2: \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 3: \ tmp = 0; \ tmp |= fieldname(insn, 3, 2) << 3; \ tmp |= fieldname(insn, 5, 3) << 0; \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 4: \ tmp = fieldname(insn, 0, 4); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 5: \ tmp = fieldname(insn, 2, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 6: \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 7: \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = 0; \ tmp |= fieldname(insn, 0, 5) << 0; \ tmp |= fieldname(insn, 16, 5) << 11; \ tmp |= fieldname(insn, 21, 6) << 5; \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 9: \ tmp = fieldname(insn, 5, 3); \ if (DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 10: \ if (DecodeFMem3(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 11: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 12: \ if (DecodeMemMMImm4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 13: \ tmp = fieldname(insn, 5, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 15: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeANDI16Imm(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 16: \ tmp = fieldname(insn, 3, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 3, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 3, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 18: \ if (DecodeMemMMReglistImm4Lsl2(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 19: \ tmp = fieldname(insn, 0, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 20: \ tmp = fieldname(insn, 0, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 21: \ tmp = fieldname(insn, 0, 5); \ if (DecodeUImm5lsl2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 22: \ if (DecodeMemMMSPImm5Lsl2(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 23: \ tmp = fieldname(insn, 5, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 5, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 4); \ if (DecodeSimm4(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 1, 9); \ if (DecodeSimm9SP(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 25: \ if (DecodeMemMMGPImm7Lsl2(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 3); \ if (DecodeAddiur2Simm7(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 6); \ if (DecodeUImm6Lsl2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 7, 3); \ if (DecodeMovePRegPair(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 3); \ if (DecodeGPRMM16MovePRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 3); \ if (DecodeGPRMM16MovePRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 7); \ if (DecodeBranchTarget7MM(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 0, 10); \ if (DecodeBranchTarget10MM(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 7, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 7); \ if (DecodeLiSimm7(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 33: \ tmp = fieldname(insn, 16, 10); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 6, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 34: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeInsSize(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 37: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 38: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 39: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeExtSize(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 40: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 41: \ tmp = fieldname(insn, 16, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 42: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 43: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 44: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 45: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 46: \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 47: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 48: \ if (DecodeMemMMImm16(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 49: \ if (DecodeMemMMImm12(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 50: \ if (DecodeCacheOpMM(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 51: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTargetMM(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 52: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 53: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 54: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 3); \ if (DecodeFCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 55: \ if (DecodeJumpTargetMM(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 56: \ tmp = fieldname(insn, 23, 3); \ if (DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 23); \ if (DecodeSimm23Lsl2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 57: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTargetMM(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 58: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 59: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ if (DecodeFCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 60: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 2); \ if (DecodeLSAImm(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 61: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 62: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 63: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 64: \ tmp = fieldname(insn, 6, 20); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 65: \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 66: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 67: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 68: \ tmp = fieldname(insn, 11, 2); \ if (DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 69: \ tmp = fieldname(insn, 11, 2); \ if (DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 70: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 2); \ if (DecodeLSAImm(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 71: \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 72: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 73: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 74: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 75: \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 76: \ if (DecodeSyncI(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 77: \ if (DecodeJumpTarget(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 78: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 79: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 80: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 81: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 82: \ tmp = fieldname(insn, 18, 3); \ if (DecodeCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 83: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 84: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 85: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeCCRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 86: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 87: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 88: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 89: \ tmp = fieldname(insn, 11, 5); \ if (DecodeCCRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 90: \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 91: \ tmp = fieldname(insn, 18, 3); \ if (DecodeFCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 92: \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 93: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 94: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 95: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ if (DecodeFCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 96: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 97: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 98: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 99: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 100: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 101: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 102: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 103: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ if (DecodeFCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 104: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 105: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 106: \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 107: \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 108: \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 109: \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 110: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 111: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 112: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 113: \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 114: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 115: \ tmp = fieldname(insn, 6, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 116: \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 117: \ tmp = 0; \ tmp |= fieldname(insn, 11, 5) << 0; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 118: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 119: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 120: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 121: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 122: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 123: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 124: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 125: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 126: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 127: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 128: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 129: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 130: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 131: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 132: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 133: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 134: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 135: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 136: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 137: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 138: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 139: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 140: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 141: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 142: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 143: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 144: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 145: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 146: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 147: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 148: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 149: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 150: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 151: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 152: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 153: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 154: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 155: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 156: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 157: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 158: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 159: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 160: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 161: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 162: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 163: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 164: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 165: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 166: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 167: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 168: \ tmp = fieldname(insn, 6, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 169: \ tmp = fieldname(insn, 6, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 170: \ tmp = fieldname(insn, 6, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 171: \ tmp = fieldname(insn, 6, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 172: \ tmp = fieldname(insn, 6, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 173: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 174: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 175: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 176: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 177: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 178: \ if (DecodeINSVE_DF_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 179: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 180: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 181: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 182: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 183: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 184: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 185: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 186: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 187: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 188: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 189: \ tmp = fieldname(insn, 6, 5); \ if (DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 190: \ if (DecodeMSA128Mem(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 191: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeExtSize(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 192: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeInsSize(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 193: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 194: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 195: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 196: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 197: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 198: \ tmp = fieldname(insn, 21, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 199: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 200: \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 201: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 202: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 203: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 204: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 205: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 206: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 207: \ tmp = fieldname(insn, 11, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeDSPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 208: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 209: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 210: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 211: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 212: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 213: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 214: \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 6); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 215: \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 216: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 217: \ if (DecodeMem(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 218: \ if (DecodeCacheOp(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 219: \ if (DecodeFMem(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 220: \ if (DecodeFMem2(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 221: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 222: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 223: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 224: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 225: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 226: \ if (DecodeBlezGroupBranch_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 227: \ if (DecodeBgtzGroupBranch_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 228: \ if (DecodeAddiGroupBranch_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 229: \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 230: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 231: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 232: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 233: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 234: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 235: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 236: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 237: \ tmp = fieldname(insn, 16, 5); \ if (DecodeCOP2RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 238: \ if (DecodeFMemCop2R6(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 239: \ if (DecodeBlezlGroupBranch_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 240: \ if (DecodeBgtzlGroupBranch_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 241: \ if (DecodeDaddiGroupBranch_4(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 242: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 243: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 244: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 245: \ if (DecodeCacheOpR6(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 246: \ if (DecodeSpecial3LlSc(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 247: \ tmp = fieldname(insn, 0, 26); \ if (DecodeBranchTarget26(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 248: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 21); \ if (DecodeBranchTarget21(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 249: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 19); \ if (DecodeSimm19Lsl2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 250: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 18); \ if (DecodeSimm18Lsl3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 251: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 252: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 253: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 254: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 255: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 3); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 256: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 257: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 258: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 259: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ if (DecodeFCCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 260: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 261: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 262: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 263: \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePtrRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 264: \ tmp = fieldname(insn, 6, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeFGR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 265: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (DecodeSimm16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 266: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 267: \ tmp = 0; \ tmp |= fieldname(insn, 11, 5) << 0; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 268: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 269: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 270: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeExtSize(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 271: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeInsSize(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 272: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 16); \ if (DecodeBranchTarget(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, MCRegisterInfo *MRI, int feature) \ { \ uint64_t Bits = getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction, uint32_t) DecodeToMCInst(decodeToMCInst, fieldFromInstruction, uint32_t) DecodeInstruction(decodeInstruction, fieldFromInstruction, decodeToMCInst, uint32_t) capstone-sys-0.11.0/capstone/arch/Mips/MipsGenInstrInfo.inc010066400017500001750000001316431363402546700220200ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { Mips_PHI = 0, Mips_INLINEASM = 1, Mips_CFI_INSTRUCTION = 2, Mips_EH_LABEL = 3, Mips_GC_LABEL = 4, Mips_KILL = 5, Mips_EXTRACT_SUBREG = 6, Mips_INSERT_SUBREG = 7, Mips_IMPLICIT_DEF = 8, Mips_SUBREG_TO_REG = 9, Mips_COPY_TO_REGCLASS = 10, Mips_DBG_VALUE = 11, Mips_REG_SEQUENCE = 12, Mips_COPY = 13, Mips_BUNDLE = 14, Mips_LIFETIME_START = 15, Mips_LIFETIME_END = 16, Mips_STACKMAP = 17, Mips_PATCHPOINT = 18, Mips_LOAD_STACK_GUARD = 19, Mips_STATEPOINT = 20, Mips_FRAME_ALLOC = 21, Mips_ABSQ_S_PH = 22, Mips_ABSQ_S_QB = 23, Mips_ABSQ_S_W = 24, Mips_ADD = 25, Mips_ADDIUPC = 26, Mips_ADDIUPC_MM = 27, Mips_ADDIUR1SP_MM = 28, Mips_ADDIUR2_MM = 29, Mips_ADDIUS5_MM = 30, Mips_ADDIUSP_MM = 31, Mips_ADDQH_PH = 32, Mips_ADDQH_R_PH = 33, Mips_ADDQH_R_W = 34, Mips_ADDQH_W = 35, Mips_ADDQ_PH = 36, Mips_ADDQ_S_PH = 37, Mips_ADDQ_S_W = 38, Mips_ADDSC = 39, Mips_ADDS_A_B = 40, Mips_ADDS_A_D = 41, Mips_ADDS_A_H = 42, Mips_ADDS_A_W = 43, Mips_ADDS_S_B = 44, Mips_ADDS_S_D = 45, Mips_ADDS_S_H = 46, Mips_ADDS_S_W = 47, Mips_ADDS_U_B = 48, Mips_ADDS_U_D = 49, Mips_ADDS_U_H = 50, Mips_ADDS_U_W = 51, Mips_ADDU16_MM = 52, Mips_ADDUH_QB = 53, Mips_ADDUH_R_QB = 54, Mips_ADDU_PH = 55, Mips_ADDU_QB = 56, Mips_ADDU_S_PH = 57, Mips_ADDU_S_QB = 58, Mips_ADDVI_B = 59, Mips_ADDVI_D = 60, Mips_ADDVI_H = 61, Mips_ADDVI_W = 62, Mips_ADDV_B = 63, Mips_ADDV_D = 64, Mips_ADDV_H = 65, Mips_ADDV_W = 66, Mips_ADDWC = 67, Mips_ADD_A_B = 68, Mips_ADD_A_D = 69, Mips_ADD_A_H = 70, Mips_ADD_A_W = 71, Mips_ADD_MM = 72, Mips_ADDi = 73, Mips_ADDi_MM = 74, Mips_ADDiu = 75, Mips_ADDiu_MM = 76, Mips_ADDu = 77, Mips_ADDu_MM = 78, Mips_ADJCALLSTACKDOWN = 79, Mips_ADJCALLSTACKUP = 80, Mips_ALIGN = 81, Mips_ALUIPC = 82, Mips_AND = 83, Mips_AND16_MM = 84, Mips_AND64 = 85, Mips_ANDI16_MM = 86, Mips_ANDI_B = 87, Mips_AND_MM = 88, Mips_AND_V = 89, Mips_AND_V_D_PSEUDO = 90, Mips_AND_V_H_PSEUDO = 91, Mips_AND_V_W_PSEUDO = 92, Mips_ANDi = 93, Mips_ANDi64 = 94, Mips_ANDi_MM = 95, Mips_APPEND = 96, Mips_ASUB_S_B = 97, Mips_ASUB_S_D = 98, Mips_ASUB_S_H = 99, Mips_ASUB_S_W = 100, Mips_ASUB_U_B = 101, Mips_ASUB_U_D = 102, Mips_ASUB_U_H = 103, Mips_ASUB_U_W = 104, Mips_ATOMIC_CMP_SWAP_I16 = 105, Mips_ATOMIC_CMP_SWAP_I32 = 106, Mips_ATOMIC_CMP_SWAP_I64 = 107, Mips_ATOMIC_CMP_SWAP_I8 = 108, Mips_ATOMIC_LOAD_ADD_I16 = 109, Mips_ATOMIC_LOAD_ADD_I32 = 110, Mips_ATOMIC_LOAD_ADD_I64 = 111, Mips_ATOMIC_LOAD_ADD_I8 = 112, Mips_ATOMIC_LOAD_AND_I16 = 113, Mips_ATOMIC_LOAD_AND_I32 = 114, Mips_ATOMIC_LOAD_AND_I64 = 115, Mips_ATOMIC_LOAD_AND_I8 = 116, Mips_ATOMIC_LOAD_NAND_I16 = 117, Mips_ATOMIC_LOAD_NAND_I32 = 118, Mips_ATOMIC_LOAD_NAND_I64 = 119, Mips_ATOMIC_LOAD_NAND_I8 = 120, Mips_ATOMIC_LOAD_OR_I16 = 121, Mips_ATOMIC_LOAD_OR_I32 = 122, Mips_ATOMIC_LOAD_OR_I64 = 123, Mips_ATOMIC_LOAD_OR_I8 = 124, Mips_ATOMIC_LOAD_SUB_I16 = 125, Mips_ATOMIC_LOAD_SUB_I32 = 126, Mips_ATOMIC_LOAD_SUB_I64 = 127, Mips_ATOMIC_LOAD_SUB_I8 = 128, Mips_ATOMIC_LOAD_XOR_I16 = 129, Mips_ATOMIC_LOAD_XOR_I32 = 130, Mips_ATOMIC_LOAD_XOR_I64 = 131, Mips_ATOMIC_LOAD_XOR_I8 = 132, Mips_ATOMIC_SWAP_I16 = 133, Mips_ATOMIC_SWAP_I32 = 134, Mips_ATOMIC_SWAP_I64 = 135, Mips_ATOMIC_SWAP_I8 = 136, Mips_AUI = 137, Mips_AUIPC = 138, Mips_AVER_S_B = 139, Mips_AVER_S_D = 140, Mips_AVER_S_H = 141, Mips_AVER_S_W = 142, Mips_AVER_U_B = 143, Mips_AVER_U_D = 144, Mips_AVER_U_H = 145, Mips_AVER_U_W = 146, Mips_AVE_S_B = 147, Mips_AVE_S_D = 148, Mips_AVE_S_H = 149, Mips_AVE_S_W = 150, Mips_AVE_U_B = 151, Mips_AVE_U_D = 152, Mips_AVE_U_H = 153, Mips_AVE_U_W = 154, Mips_AddiuRxImmX16 = 155, Mips_AddiuRxPcImmX16 = 156, Mips_AddiuRxRxImm16 = 157, Mips_AddiuRxRxImmX16 = 158, Mips_AddiuRxRyOffMemX16 = 159, Mips_AddiuSpImm16 = 160, Mips_AddiuSpImmX16 = 161, Mips_AdduRxRyRz16 = 162, Mips_AndRxRxRy16 = 163, Mips_B = 164, Mips_B16_MM = 165, Mips_BADDu = 166, Mips_BAL = 167, Mips_BALC = 168, Mips_BALIGN = 169, Mips_BAL_BR = 170, Mips_BBIT0 = 171, Mips_BBIT032 = 172, Mips_BBIT1 = 173, Mips_BBIT132 = 174, Mips_BC = 175, Mips_BC0F = 176, Mips_BC0FL = 177, Mips_BC0T = 178, Mips_BC0TL = 179, Mips_BC1EQZ = 180, Mips_BC1F = 181, Mips_BC1FL = 182, Mips_BC1F_MM = 183, Mips_BC1NEZ = 184, Mips_BC1T = 185, Mips_BC1TL = 186, Mips_BC1T_MM = 187, Mips_BC2EQZ = 188, Mips_BC2F = 189, Mips_BC2FL = 190, Mips_BC2NEZ = 191, Mips_BC2T = 192, Mips_BC2TL = 193, Mips_BC3F = 194, Mips_BC3FL = 195, Mips_BC3T = 196, Mips_BC3TL = 197, Mips_BCLRI_B = 198, Mips_BCLRI_D = 199, Mips_BCLRI_H = 200, Mips_BCLRI_W = 201, Mips_BCLR_B = 202, Mips_BCLR_D = 203, Mips_BCLR_H = 204, Mips_BCLR_W = 205, Mips_BEQ = 206, Mips_BEQ64 = 207, Mips_BEQC = 208, Mips_BEQL = 209, Mips_BEQZ16_MM = 210, Mips_BEQZALC = 211, Mips_BEQZC = 212, Mips_BEQZC_MM = 213, Mips_BEQ_MM = 214, Mips_BGEC = 215, Mips_BGEUC = 216, Mips_BGEZ = 217, Mips_BGEZ64 = 218, Mips_BGEZAL = 219, Mips_BGEZALC = 220, Mips_BGEZALL = 221, Mips_BGEZALS_MM = 222, Mips_BGEZAL_MM = 223, Mips_BGEZC = 224, Mips_BGEZL = 225, Mips_BGEZ_MM = 226, Mips_BGTZ = 227, Mips_BGTZ64 = 228, Mips_BGTZALC = 229, Mips_BGTZC = 230, Mips_BGTZL = 231, Mips_BGTZ_MM = 232, Mips_BINSLI_B = 233, Mips_BINSLI_D = 234, Mips_BINSLI_H = 235, Mips_BINSLI_W = 236, Mips_BINSL_B = 237, Mips_BINSL_D = 238, Mips_BINSL_H = 239, Mips_BINSL_W = 240, Mips_BINSRI_B = 241, Mips_BINSRI_D = 242, Mips_BINSRI_H = 243, Mips_BINSRI_W = 244, Mips_BINSR_B = 245, Mips_BINSR_D = 246, Mips_BINSR_H = 247, Mips_BINSR_W = 248, Mips_BITREV = 249, Mips_BITSWAP = 250, Mips_BLEZ = 251, Mips_BLEZ64 = 252, Mips_BLEZALC = 253, Mips_BLEZC = 254, Mips_BLEZL = 255, Mips_BLEZ_MM = 256, Mips_BLTC = 257, Mips_BLTUC = 258, Mips_BLTZ = 259, Mips_BLTZ64 = 260, Mips_BLTZAL = 261, Mips_BLTZALC = 262, Mips_BLTZALL = 263, Mips_BLTZALS_MM = 264, Mips_BLTZAL_MM = 265, Mips_BLTZC = 266, Mips_BLTZL = 267, Mips_BLTZ_MM = 268, Mips_BMNZI_B = 269, Mips_BMNZ_V = 270, Mips_BMZI_B = 271, Mips_BMZ_V = 272, Mips_BNE = 273, Mips_BNE64 = 274, Mips_BNEC = 275, Mips_BNEGI_B = 276, Mips_BNEGI_D = 277, Mips_BNEGI_H = 278, Mips_BNEGI_W = 279, Mips_BNEG_B = 280, Mips_BNEG_D = 281, Mips_BNEG_H = 282, Mips_BNEG_W = 283, Mips_BNEL = 284, Mips_BNEZ16_MM = 285, Mips_BNEZALC = 286, Mips_BNEZC = 287, Mips_BNEZC_MM = 288, Mips_BNE_MM = 289, Mips_BNVC = 290, Mips_BNZ_B = 291, Mips_BNZ_D = 292, Mips_BNZ_H = 293, Mips_BNZ_V = 294, Mips_BNZ_W = 295, Mips_BOVC = 296, Mips_BPOSGE32 = 297, Mips_BPOSGE32_PSEUDO = 298, Mips_BREAK = 299, Mips_BREAK16_MM = 300, Mips_BREAK_MM = 301, Mips_BSELI_B = 302, Mips_BSEL_D_PSEUDO = 303, Mips_BSEL_FD_PSEUDO = 304, Mips_BSEL_FW_PSEUDO = 305, Mips_BSEL_H_PSEUDO = 306, Mips_BSEL_V = 307, Mips_BSEL_W_PSEUDO = 308, Mips_BSETI_B = 309, Mips_BSETI_D = 310, Mips_BSETI_H = 311, Mips_BSETI_W = 312, Mips_BSET_B = 313, Mips_BSET_D = 314, Mips_BSET_H = 315, Mips_BSET_W = 316, Mips_BZ_B = 317, Mips_BZ_D = 318, Mips_BZ_H = 319, Mips_BZ_V = 320, Mips_BZ_W = 321, Mips_B_MM_Pseudo = 322, Mips_BeqzRxImm16 = 323, Mips_BeqzRxImmX16 = 324, Mips_Bimm16 = 325, Mips_BimmX16 = 326, Mips_BnezRxImm16 = 327, Mips_BnezRxImmX16 = 328, Mips_Break16 = 329, Mips_Bteqz16 = 330, Mips_BteqzT8CmpX16 = 331, Mips_BteqzT8CmpiX16 = 332, Mips_BteqzT8SltX16 = 333, Mips_BteqzT8SltiX16 = 334, Mips_BteqzT8SltiuX16 = 335, Mips_BteqzT8SltuX16 = 336, Mips_BteqzX16 = 337, Mips_Btnez16 = 338, Mips_BtnezT8CmpX16 = 339, Mips_BtnezT8CmpiX16 = 340, Mips_BtnezT8SltX16 = 341, Mips_BtnezT8SltiX16 = 342, Mips_BtnezT8SltiuX16 = 343, Mips_BtnezT8SltuX16 = 344, Mips_BtnezX16 = 345, Mips_BuildPairF64 = 346, Mips_BuildPairF64_64 = 347, Mips_CACHE = 348, Mips_CACHE_MM = 349, Mips_CACHE_R6 = 350, Mips_CEIL_L_D64 = 351, Mips_CEIL_L_S = 352, Mips_CEIL_W_D32 = 353, Mips_CEIL_W_D64 = 354, Mips_CEIL_W_MM = 355, Mips_CEIL_W_S = 356, Mips_CEIL_W_S_MM = 357, Mips_CEQI_B = 358, Mips_CEQI_D = 359, Mips_CEQI_H = 360, Mips_CEQI_W = 361, Mips_CEQ_B = 362, Mips_CEQ_D = 363, Mips_CEQ_H = 364, Mips_CEQ_W = 365, Mips_CFC1 = 366, Mips_CFC1_MM = 367, Mips_CFCMSA = 368, Mips_CINS = 369, Mips_CINS32 = 370, Mips_CLASS_D = 371, Mips_CLASS_S = 372, Mips_CLEI_S_B = 373, Mips_CLEI_S_D = 374, Mips_CLEI_S_H = 375, Mips_CLEI_S_W = 376, Mips_CLEI_U_B = 377, Mips_CLEI_U_D = 378, Mips_CLEI_U_H = 379, Mips_CLEI_U_W = 380, Mips_CLE_S_B = 381, Mips_CLE_S_D = 382, Mips_CLE_S_H = 383, Mips_CLE_S_W = 384, Mips_CLE_U_B = 385, Mips_CLE_U_D = 386, Mips_CLE_U_H = 387, Mips_CLE_U_W = 388, Mips_CLO = 389, Mips_CLO_MM = 390, Mips_CLO_R6 = 391, Mips_CLTI_S_B = 392, Mips_CLTI_S_D = 393, Mips_CLTI_S_H = 394, Mips_CLTI_S_W = 395, Mips_CLTI_U_B = 396, Mips_CLTI_U_D = 397, Mips_CLTI_U_H = 398, Mips_CLTI_U_W = 399, Mips_CLT_S_B = 400, Mips_CLT_S_D = 401, Mips_CLT_S_H = 402, Mips_CLT_S_W = 403, Mips_CLT_U_B = 404, Mips_CLT_U_D = 405, Mips_CLT_U_H = 406, Mips_CLT_U_W = 407, Mips_CLZ = 408, Mips_CLZ_MM = 409, Mips_CLZ_R6 = 410, Mips_CMPGDU_EQ_QB = 411, Mips_CMPGDU_LE_QB = 412, Mips_CMPGDU_LT_QB = 413, Mips_CMPGU_EQ_QB = 414, Mips_CMPGU_LE_QB = 415, Mips_CMPGU_LT_QB = 416, Mips_CMPU_EQ_QB = 417, Mips_CMPU_LE_QB = 418, Mips_CMPU_LT_QB = 419, Mips_CMP_EQ_D = 420, Mips_CMP_EQ_PH = 421, Mips_CMP_EQ_S = 422, Mips_CMP_F_D = 423, Mips_CMP_F_S = 424, Mips_CMP_LE_D = 425, Mips_CMP_LE_PH = 426, Mips_CMP_LE_S = 427, Mips_CMP_LT_D = 428, Mips_CMP_LT_PH = 429, Mips_CMP_LT_S = 430, Mips_CMP_SAF_D = 431, Mips_CMP_SAF_S = 432, Mips_CMP_SEQ_D = 433, Mips_CMP_SEQ_S = 434, Mips_CMP_SLE_D = 435, Mips_CMP_SLE_S = 436, Mips_CMP_SLT_D = 437, Mips_CMP_SLT_S = 438, Mips_CMP_SUEQ_D = 439, Mips_CMP_SUEQ_S = 440, Mips_CMP_SULE_D = 441, Mips_CMP_SULE_S = 442, Mips_CMP_SULT_D = 443, Mips_CMP_SULT_S = 444, Mips_CMP_SUN_D = 445, Mips_CMP_SUN_S = 446, Mips_CMP_UEQ_D = 447, Mips_CMP_UEQ_S = 448, Mips_CMP_ULE_D = 449, Mips_CMP_ULE_S = 450, Mips_CMP_ULT_D = 451, Mips_CMP_ULT_S = 452, Mips_CMP_UN_D = 453, Mips_CMP_UN_S = 454, Mips_CONSTPOOL_ENTRY = 455, Mips_COPY_FD_PSEUDO = 456, Mips_COPY_FW_PSEUDO = 457, Mips_COPY_S_B = 458, Mips_COPY_S_D = 459, Mips_COPY_S_H = 460, Mips_COPY_S_W = 461, Mips_COPY_U_B = 462, Mips_COPY_U_D = 463, Mips_COPY_U_H = 464, Mips_COPY_U_W = 465, Mips_CTC1 = 466, Mips_CTC1_MM = 467, Mips_CTCMSA = 468, Mips_CVT_D32_S = 469, Mips_CVT_D32_W = 470, Mips_CVT_D32_W_MM = 471, Mips_CVT_D64_L = 472, Mips_CVT_D64_S = 473, Mips_CVT_D64_W = 474, Mips_CVT_D_S_MM = 475, Mips_CVT_L_D64 = 476, Mips_CVT_L_D64_MM = 477, Mips_CVT_L_S = 478, Mips_CVT_L_S_MM = 479, Mips_CVT_S_D32 = 480, Mips_CVT_S_D32_MM = 481, Mips_CVT_S_D64 = 482, Mips_CVT_S_L = 483, Mips_CVT_S_W = 484, Mips_CVT_S_W_MM = 485, Mips_CVT_W_D32 = 486, Mips_CVT_W_D64 = 487, Mips_CVT_W_MM = 488, Mips_CVT_W_S = 489, Mips_CVT_W_S_MM = 490, Mips_C_EQ_D32 = 491, Mips_C_EQ_D64 = 492, Mips_C_EQ_S = 493, Mips_C_F_D32 = 494, Mips_C_F_D64 = 495, Mips_C_F_S = 496, Mips_C_LE_D32 = 497, Mips_C_LE_D64 = 498, Mips_C_LE_S = 499, Mips_C_LT_D32 = 500, Mips_C_LT_D64 = 501, Mips_C_LT_S = 502, Mips_C_NGE_D32 = 503, Mips_C_NGE_D64 = 504, Mips_C_NGE_S = 505, Mips_C_NGLE_D32 = 506, Mips_C_NGLE_D64 = 507, Mips_C_NGLE_S = 508, Mips_C_NGL_D32 = 509, Mips_C_NGL_D64 = 510, Mips_C_NGL_S = 511, Mips_C_NGT_D32 = 512, Mips_C_NGT_D64 = 513, Mips_C_NGT_S = 514, Mips_C_OLE_D32 = 515, Mips_C_OLE_D64 = 516, Mips_C_OLE_S = 517, Mips_C_OLT_D32 = 518, Mips_C_OLT_D64 = 519, Mips_C_OLT_S = 520, Mips_C_SEQ_D32 = 521, Mips_C_SEQ_D64 = 522, Mips_C_SEQ_S = 523, Mips_C_SF_D32 = 524, Mips_C_SF_D64 = 525, Mips_C_SF_S = 526, Mips_C_UEQ_D32 = 527, Mips_C_UEQ_D64 = 528, Mips_C_UEQ_S = 529, Mips_C_ULE_D32 = 530, Mips_C_ULE_D64 = 531, Mips_C_ULE_S = 532, Mips_C_ULT_D32 = 533, Mips_C_ULT_D64 = 534, Mips_C_ULT_S = 535, Mips_C_UN_D32 = 536, Mips_C_UN_D64 = 537, Mips_C_UN_S = 538, Mips_CmpRxRy16 = 539, Mips_CmpiRxImm16 = 540, Mips_CmpiRxImmX16 = 541, Mips_Constant32 = 542, Mips_DADD = 543, Mips_DADDi = 544, Mips_DADDiu = 545, Mips_DADDu = 546, Mips_DAHI = 547, Mips_DALIGN = 548, Mips_DATI = 549, Mips_DAUI = 550, Mips_DBITSWAP = 551, Mips_DCLO = 552, Mips_DCLO_R6 = 553, Mips_DCLZ = 554, Mips_DCLZ_R6 = 555, Mips_DDIV = 556, Mips_DDIVU = 557, Mips_DERET = 558, Mips_DERET_MM = 559, Mips_DEXT = 560, Mips_DEXTM = 561, Mips_DEXTU = 562, Mips_DI = 563, Mips_DINS = 564, Mips_DINSM = 565, Mips_DINSU = 566, Mips_DIV = 567, Mips_DIVU = 568, Mips_DIV_S_B = 569, Mips_DIV_S_D = 570, Mips_DIV_S_H = 571, Mips_DIV_S_W = 572, Mips_DIV_U_B = 573, Mips_DIV_U_D = 574, Mips_DIV_U_H = 575, Mips_DIV_U_W = 576, Mips_DI_MM = 577, Mips_DLSA = 578, Mips_DLSA_R6 = 579, Mips_DMFC0 = 580, Mips_DMFC1 = 581, Mips_DMFC2 = 582, Mips_DMOD = 583, Mips_DMODU = 584, Mips_DMTC0 = 585, Mips_DMTC1 = 586, Mips_DMTC2 = 587, Mips_DMUH = 588, Mips_DMUHU = 589, Mips_DMUL = 590, Mips_DMULT = 591, Mips_DMULTu = 592, Mips_DMULU = 593, Mips_DMUL_R6 = 594, Mips_DOTP_S_D = 595, Mips_DOTP_S_H = 596, Mips_DOTP_S_W = 597, Mips_DOTP_U_D = 598, Mips_DOTP_U_H = 599, Mips_DOTP_U_W = 600, Mips_DPADD_S_D = 601, Mips_DPADD_S_H = 602, Mips_DPADD_S_W = 603, Mips_DPADD_U_D = 604, Mips_DPADD_U_H = 605, Mips_DPADD_U_W = 606, Mips_DPAQX_SA_W_PH = 607, Mips_DPAQX_S_W_PH = 608, Mips_DPAQ_SA_L_W = 609, Mips_DPAQ_S_W_PH = 610, Mips_DPAU_H_QBL = 611, Mips_DPAU_H_QBR = 612, Mips_DPAX_W_PH = 613, Mips_DPA_W_PH = 614, Mips_DPOP = 615, Mips_DPSQX_SA_W_PH = 616, Mips_DPSQX_S_W_PH = 617, Mips_DPSQ_SA_L_W = 618, Mips_DPSQ_S_W_PH = 619, Mips_DPSUB_S_D = 620, Mips_DPSUB_S_H = 621, Mips_DPSUB_S_W = 622, Mips_DPSUB_U_D = 623, Mips_DPSUB_U_H = 624, Mips_DPSUB_U_W = 625, Mips_DPSU_H_QBL = 626, Mips_DPSU_H_QBR = 627, Mips_DPSX_W_PH = 628, Mips_DPS_W_PH = 629, Mips_DROTR = 630, Mips_DROTR32 = 631, Mips_DROTRV = 632, Mips_DSBH = 633, Mips_DSDIV = 634, Mips_DSHD = 635, Mips_DSLL = 636, Mips_DSLL32 = 637, Mips_DSLL64_32 = 638, Mips_DSLLV = 639, Mips_DSRA = 640, Mips_DSRA32 = 641, Mips_DSRAV = 642, Mips_DSRL = 643, Mips_DSRL32 = 644, Mips_DSRLV = 645, Mips_DSUB = 646, Mips_DSUBu = 647, Mips_DUDIV = 648, Mips_DivRxRy16 = 649, Mips_DivuRxRy16 = 650, Mips_EHB = 651, Mips_EHB_MM = 652, Mips_EI = 653, Mips_EI_MM = 654, Mips_ERET = 655, Mips_ERET_MM = 656, Mips_EXT = 657, Mips_EXTP = 658, Mips_EXTPDP = 659, Mips_EXTPDPV = 660, Mips_EXTPV = 661, Mips_EXTRV_RS_W = 662, Mips_EXTRV_R_W = 663, Mips_EXTRV_S_H = 664, Mips_EXTRV_W = 665, Mips_EXTR_RS_W = 666, Mips_EXTR_R_W = 667, Mips_EXTR_S_H = 668, Mips_EXTR_W = 669, Mips_EXTS = 670, Mips_EXTS32 = 671, Mips_EXT_MM = 672, Mips_ExtractElementF64 = 673, Mips_ExtractElementF64_64 = 674, Mips_FABS_D = 675, Mips_FABS_D32 = 676, Mips_FABS_D64 = 677, Mips_FABS_MM = 678, Mips_FABS_S = 679, Mips_FABS_S_MM = 680, Mips_FABS_W = 681, Mips_FADD_D = 682, Mips_FADD_D32 = 683, Mips_FADD_D64 = 684, Mips_FADD_MM = 685, Mips_FADD_S = 686, Mips_FADD_S_MM = 687, Mips_FADD_W = 688, Mips_FCAF_D = 689, Mips_FCAF_W = 690, Mips_FCEQ_D = 691, Mips_FCEQ_W = 692, Mips_FCLASS_D = 693, Mips_FCLASS_W = 694, Mips_FCLE_D = 695, Mips_FCLE_W = 696, Mips_FCLT_D = 697, Mips_FCLT_W = 698, Mips_FCMP_D32 = 699, Mips_FCMP_D32_MM = 700, Mips_FCMP_D64 = 701, Mips_FCMP_S32 = 702, Mips_FCMP_S32_MM = 703, Mips_FCNE_D = 704, Mips_FCNE_W = 705, Mips_FCOR_D = 706, Mips_FCOR_W = 707, Mips_FCUEQ_D = 708, Mips_FCUEQ_W = 709, Mips_FCULE_D = 710, Mips_FCULE_W = 711, Mips_FCULT_D = 712, Mips_FCULT_W = 713, Mips_FCUNE_D = 714, Mips_FCUNE_W = 715, Mips_FCUN_D = 716, Mips_FCUN_W = 717, Mips_FDIV_D = 718, Mips_FDIV_D32 = 719, Mips_FDIV_D64 = 720, Mips_FDIV_MM = 721, Mips_FDIV_S = 722, Mips_FDIV_S_MM = 723, Mips_FDIV_W = 724, Mips_FEXDO_H = 725, Mips_FEXDO_W = 726, Mips_FEXP2_D = 727, Mips_FEXP2_D_1_PSEUDO = 728, Mips_FEXP2_W = 729, Mips_FEXP2_W_1_PSEUDO = 730, Mips_FEXUPL_D = 731, Mips_FEXUPL_W = 732, Mips_FEXUPR_D = 733, Mips_FEXUPR_W = 734, Mips_FFINT_S_D = 735, Mips_FFINT_S_W = 736, Mips_FFINT_U_D = 737, Mips_FFINT_U_W = 738, Mips_FFQL_D = 739, Mips_FFQL_W = 740, Mips_FFQR_D = 741, Mips_FFQR_W = 742, Mips_FILL_B = 743, Mips_FILL_D = 744, Mips_FILL_FD_PSEUDO = 745, Mips_FILL_FW_PSEUDO = 746, Mips_FILL_H = 747, Mips_FILL_W = 748, Mips_FLOG2_D = 749, Mips_FLOG2_W = 750, Mips_FLOOR_L_D64 = 751, Mips_FLOOR_L_S = 752, Mips_FLOOR_W_D32 = 753, Mips_FLOOR_W_D64 = 754, Mips_FLOOR_W_MM = 755, Mips_FLOOR_W_S = 756, Mips_FLOOR_W_S_MM = 757, Mips_FMADD_D = 758, Mips_FMADD_W = 759, Mips_FMAX_A_D = 760, Mips_FMAX_A_W = 761, Mips_FMAX_D = 762, Mips_FMAX_W = 763, Mips_FMIN_A_D = 764, Mips_FMIN_A_W = 765, Mips_FMIN_D = 766, Mips_FMIN_W = 767, Mips_FMOV_D32 = 768, Mips_FMOV_D32_MM = 769, Mips_FMOV_D64 = 770, Mips_FMOV_S = 771, Mips_FMOV_S_MM = 772, Mips_FMSUB_D = 773, Mips_FMSUB_W = 774, Mips_FMUL_D = 775, Mips_FMUL_D32 = 776, Mips_FMUL_D64 = 777, Mips_FMUL_MM = 778, Mips_FMUL_S = 779, Mips_FMUL_S_MM = 780, Mips_FMUL_W = 781, Mips_FNEG_D32 = 782, Mips_FNEG_D64 = 783, Mips_FNEG_MM = 784, Mips_FNEG_S = 785, Mips_FNEG_S_MM = 786, Mips_FRCP_D = 787, Mips_FRCP_W = 788, Mips_FRINT_D = 789, Mips_FRINT_W = 790, Mips_FRSQRT_D = 791, Mips_FRSQRT_W = 792, Mips_FSAF_D = 793, Mips_FSAF_W = 794, Mips_FSEQ_D = 795, Mips_FSEQ_W = 796, Mips_FSLE_D = 797, Mips_FSLE_W = 798, Mips_FSLT_D = 799, Mips_FSLT_W = 800, Mips_FSNE_D = 801, Mips_FSNE_W = 802, Mips_FSOR_D = 803, Mips_FSOR_W = 804, Mips_FSQRT_D = 805, Mips_FSQRT_D32 = 806, Mips_FSQRT_D64 = 807, Mips_FSQRT_MM = 808, Mips_FSQRT_S = 809, Mips_FSQRT_S_MM = 810, Mips_FSQRT_W = 811, Mips_FSUB_D = 812, Mips_FSUB_D32 = 813, Mips_FSUB_D64 = 814, Mips_FSUB_MM = 815, Mips_FSUB_S = 816, Mips_FSUB_S_MM = 817, Mips_FSUB_W = 818, Mips_FSUEQ_D = 819, Mips_FSUEQ_W = 820, Mips_FSULE_D = 821, Mips_FSULE_W = 822, Mips_FSULT_D = 823, Mips_FSULT_W = 824, Mips_FSUNE_D = 825, Mips_FSUNE_W = 826, Mips_FSUN_D = 827, Mips_FSUN_W = 828, Mips_FTINT_S_D = 829, Mips_FTINT_S_W = 830, Mips_FTINT_U_D = 831, Mips_FTINT_U_W = 832, Mips_FTQ_H = 833, Mips_FTQ_W = 834, Mips_FTRUNC_S_D = 835, Mips_FTRUNC_S_W = 836, Mips_FTRUNC_U_D = 837, Mips_FTRUNC_U_W = 838, Mips_GotPrologue16 = 839, Mips_HADD_S_D = 840, Mips_HADD_S_H = 841, Mips_HADD_S_W = 842, Mips_HADD_U_D = 843, Mips_HADD_U_H = 844, Mips_HADD_U_W = 845, Mips_HSUB_S_D = 846, Mips_HSUB_S_H = 847, Mips_HSUB_S_W = 848, Mips_HSUB_U_D = 849, Mips_HSUB_U_H = 850, Mips_HSUB_U_W = 851, Mips_ILVEV_B = 852, Mips_ILVEV_D = 853, Mips_ILVEV_H = 854, Mips_ILVEV_W = 855, Mips_ILVL_B = 856, Mips_ILVL_D = 857, Mips_ILVL_H = 858, Mips_ILVL_W = 859, Mips_ILVOD_B = 860, Mips_ILVOD_D = 861, Mips_ILVOD_H = 862, Mips_ILVOD_W = 863, Mips_ILVR_B = 864, Mips_ILVR_D = 865, Mips_ILVR_H = 866, Mips_ILVR_W = 867, Mips_INS = 868, Mips_INSERT_B = 869, Mips_INSERT_B_VIDX_PSEUDO = 870, Mips_INSERT_D = 871, Mips_INSERT_D_VIDX_PSEUDO = 872, Mips_INSERT_FD_PSEUDO = 873, Mips_INSERT_FD_VIDX_PSEUDO = 874, Mips_INSERT_FW_PSEUDO = 875, Mips_INSERT_FW_VIDX_PSEUDO = 876, Mips_INSERT_H = 877, Mips_INSERT_H_VIDX_PSEUDO = 878, Mips_INSERT_W = 879, Mips_INSERT_W_VIDX_PSEUDO = 880, Mips_INSV = 881, Mips_INSVE_B = 882, Mips_INSVE_D = 883, Mips_INSVE_H = 884, Mips_INSVE_W = 885, Mips_INS_MM = 886, Mips_J = 887, Mips_JAL = 888, Mips_JALR = 889, Mips_JALR16_MM = 890, Mips_JALR64 = 891, Mips_JALR64Pseudo = 892, Mips_JALRPseudo = 893, Mips_JALRS16_MM = 894, Mips_JALRS_MM = 895, Mips_JALR_HB = 896, Mips_JALR_MM = 897, Mips_JALS_MM = 898, Mips_JALX = 899, Mips_JALX_MM = 900, Mips_JAL_MM = 901, Mips_JIALC = 902, Mips_JIC = 903, Mips_JR = 904, Mips_JR16_MM = 905, Mips_JR64 = 906, Mips_JRADDIUSP = 907, Mips_JRC16_MM = 908, Mips_JR_HB = 909, Mips_JR_HB_R6 = 910, Mips_JR_MM = 911, Mips_J_MM = 912, Mips_Jal16 = 913, Mips_JalB16 = 914, Mips_JalOneReg = 915, Mips_JalTwoReg = 916, Mips_JrRa16 = 917, Mips_JrcRa16 = 918, Mips_JrcRx16 = 919, Mips_JumpLinkReg16 = 920, Mips_LB = 921, Mips_LB64 = 922, Mips_LBU16_MM = 923, Mips_LBUX = 924, Mips_LB_MM = 925, Mips_LBu = 926, Mips_LBu64 = 927, Mips_LBu_MM = 928, Mips_LD = 929, Mips_LDC1 = 930, Mips_LDC164 = 931, Mips_LDC1_MM = 932, Mips_LDC2 = 933, Mips_LDC2_R6 = 934, Mips_LDC3 = 935, Mips_LDI_B = 936, Mips_LDI_D = 937, Mips_LDI_H = 938, Mips_LDI_W = 939, Mips_LDL = 940, Mips_LDPC = 941, Mips_LDR = 942, Mips_LDXC1 = 943, Mips_LDXC164 = 944, Mips_LD_B = 945, Mips_LD_D = 946, Mips_LD_H = 947, Mips_LD_W = 948, Mips_LEA_ADDiu = 949, Mips_LEA_ADDiu64 = 950, Mips_LEA_ADDiu_MM = 951, Mips_LH = 952, Mips_LH64 = 953, Mips_LHU16_MM = 954, Mips_LHX = 955, Mips_LH_MM = 956, Mips_LHu = 957, Mips_LHu64 = 958, Mips_LHu_MM = 959, Mips_LI16_MM = 960, Mips_LL = 961, Mips_LLD = 962, Mips_LLD_R6 = 963, Mips_LL_MM = 964, Mips_LL_R6 = 965, Mips_LOAD_ACC128 = 966, Mips_LOAD_ACC64 = 967, Mips_LOAD_ACC64DSP = 968, Mips_LOAD_CCOND_DSP = 969, Mips_LONG_BRANCH_ADDiu = 970, Mips_LONG_BRANCH_DADDiu = 971, Mips_LONG_BRANCH_LUi = 972, Mips_LSA = 973, Mips_LSA_R6 = 974, Mips_LUXC1 = 975, Mips_LUXC164 = 976, Mips_LUXC1_MM = 977, Mips_LUi = 978, Mips_LUi64 = 979, Mips_LUi_MM = 980, Mips_LW = 981, Mips_LW16_MM = 982, Mips_LW64 = 983, Mips_LWC1 = 984, Mips_LWC1_MM = 985, Mips_LWC2 = 986, Mips_LWC2_R6 = 987, Mips_LWC3 = 988, Mips_LWGP_MM = 989, Mips_LWL = 990, Mips_LWL64 = 991, Mips_LWL_MM = 992, Mips_LWM16_MM = 993, Mips_LWM32_MM = 994, Mips_LWM_MM = 995, Mips_LWPC = 996, Mips_LWP_MM = 997, Mips_LWR = 998, Mips_LWR64 = 999, Mips_LWR_MM = 1000, Mips_LWSP_MM = 1001, Mips_LWUPC = 1002, Mips_LWU_MM = 1003, Mips_LWX = 1004, Mips_LWXC1 = 1005, Mips_LWXC1_MM = 1006, Mips_LWXS_MM = 1007, Mips_LW_MM = 1008, Mips_LWu = 1009, Mips_LbRxRyOffMemX16 = 1010, Mips_LbuRxRyOffMemX16 = 1011, Mips_LhRxRyOffMemX16 = 1012, Mips_LhuRxRyOffMemX16 = 1013, Mips_LiRxImm16 = 1014, Mips_LiRxImmAlignX16 = 1015, Mips_LiRxImmX16 = 1016, Mips_LoadAddr32Imm = 1017, Mips_LoadAddr32Reg = 1018, Mips_LoadImm32Reg = 1019, Mips_LoadImm64Reg = 1020, Mips_LwConstant32 = 1021, Mips_LwRxPcTcp16 = 1022, Mips_LwRxPcTcpX16 = 1023, Mips_LwRxRyOffMemX16 = 1024, Mips_LwRxSpImmX16 = 1025, Mips_MADD = 1026, Mips_MADDF_D = 1027, Mips_MADDF_S = 1028, Mips_MADDR_Q_H = 1029, Mips_MADDR_Q_W = 1030, Mips_MADDU = 1031, Mips_MADDU_DSP = 1032, Mips_MADDU_MM = 1033, Mips_MADDV_B = 1034, Mips_MADDV_D = 1035, Mips_MADDV_H = 1036, Mips_MADDV_W = 1037, Mips_MADD_D32 = 1038, Mips_MADD_D32_MM = 1039, Mips_MADD_D64 = 1040, Mips_MADD_DSP = 1041, Mips_MADD_MM = 1042, Mips_MADD_Q_H = 1043, Mips_MADD_Q_W = 1044, Mips_MADD_S = 1045, Mips_MADD_S_MM = 1046, Mips_MAQ_SA_W_PHL = 1047, Mips_MAQ_SA_W_PHR = 1048, Mips_MAQ_S_W_PHL = 1049, Mips_MAQ_S_W_PHR = 1050, Mips_MAXA_D = 1051, Mips_MAXA_S = 1052, Mips_MAXI_S_B = 1053, Mips_MAXI_S_D = 1054, Mips_MAXI_S_H = 1055, Mips_MAXI_S_W = 1056, Mips_MAXI_U_B = 1057, Mips_MAXI_U_D = 1058, Mips_MAXI_U_H = 1059, Mips_MAXI_U_W = 1060, Mips_MAX_A_B = 1061, Mips_MAX_A_D = 1062, Mips_MAX_A_H = 1063, Mips_MAX_A_W = 1064, Mips_MAX_D = 1065, Mips_MAX_S = 1066, Mips_MAX_S_B = 1067, Mips_MAX_S_D = 1068, Mips_MAX_S_H = 1069, Mips_MAX_S_W = 1070, Mips_MAX_U_B = 1071, Mips_MAX_U_D = 1072, Mips_MAX_U_H = 1073, Mips_MAX_U_W = 1074, Mips_MFC0 = 1075, Mips_MFC1 = 1076, Mips_MFC1_MM = 1077, Mips_MFC2 = 1078, Mips_MFHC1_D32 = 1079, Mips_MFHC1_D64 = 1080, Mips_MFHC1_MM = 1081, Mips_MFHI = 1082, Mips_MFHI16_MM = 1083, Mips_MFHI64 = 1084, Mips_MFHI_DSP = 1085, Mips_MFHI_MM = 1086, Mips_MFLO = 1087, Mips_MFLO16_MM = 1088, Mips_MFLO64 = 1089, Mips_MFLO_DSP = 1090, Mips_MFLO_MM = 1091, Mips_MINA_D = 1092, Mips_MINA_S = 1093, Mips_MINI_S_B = 1094, Mips_MINI_S_D = 1095, Mips_MINI_S_H = 1096, Mips_MINI_S_W = 1097, Mips_MINI_U_B = 1098, Mips_MINI_U_D = 1099, Mips_MINI_U_H = 1100, Mips_MINI_U_W = 1101, Mips_MIN_A_B = 1102, Mips_MIN_A_D = 1103, Mips_MIN_A_H = 1104, Mips_MIN_A_W = 1105, Mips_MIN_D = 1106, Mips_MIN_S = 1107, Mips_MIN_S_B = 1108, Mips_MIN_S_D = 1109, Mips_MIN_S_H = 1110, Mips_MIN_S_W = 1111, Mips_MIN_U_B = 1112, Mips_MIN_U_D = 1113, Mips_MIN_U_H = 1114, Mips_MIN_U_W = 1115, Mips_MIPSeh_return32 = 1116, Mips_MIPSeh_return64 = 1117, Mips_MOD = 1118, Mips_MODSUB = 1119, Mips_MODU = 1120, Mips_MOD_S_B = 1121, Mips_MOD_S_D = 1122, Mips_MOD_S_H = 1123, Mips_MOD_S_W = 1124, Mips_MOD_U_B = 1125, Mips_MOD_U_D = 1126, Mips_MOD_U_H = 1127, Mips_MOD_U_W = 1128, Mips_MOVE16_MM = 1129, Mips_MOVEP_MM = 1130, Mips_MOVE_V = 1131, Mips_MOVF_D32 = 1132, Mips_MOVF_D32_MM = 1133, Mips_MOVF_D64 = 1134, Mips_MOVF_I = 1135, Mips_MOVF_I64 = 1136, Mips_MOVF_I_MM = 1137, Mips_MOVF_S = 1138, Mips_MOVF_S_MM = 1139, Mips_MOVN_I64_D64 = 1140, Mips_MOVN_I64_I = 1141, Mips_MOVN_I64_I64 = 1142, Mips_MOVN_I64_S = 1143, Mips_MOVN_I_D32 = 1144, Mips_MOVN_I_D32_MM = 1145, Mips_MOVN_I_D64 = 1146, Mips_MOVN_I_I = 1147, Mips_MOVN_I_I64 = 1148, Mips_MOVN_I_MM = 1149, Mips_MOVN_I_S = 1150, Mips_MOVN_I_S_MM = 1151, Mips_MOVT_D32 = 1152, Mips_MOVT_D32_MM = 1153, Mips_MOVT_D64 = 1154, Mips_MOVT_I = 1155, Mips_MOVT_I64 = 1156, Mips_MOVT_I_MM = 1157, Mips_MOVT_S = 1158, Mips_MOVT_S_MM = 1159, Mips_MOVZ_I64_D64 = 1160, Mips_MOVZ_I64_I = 1161, Mips_MOVZ_I64_I64 = 1162, Mips_MOVZ_I64_S = 1163, Mips_MOVZ_I_D32 = 1164, Mips_MOVZ_I_D32_MM = 1165, Mips_MOVZ_I_D64 = 1166, Mips_MOVZ_I_I = 1167, Mips_MOVZ_I_I64 = 1168, Mips_MOVZ_I_MM = 1169, Mips_MOVZ_I_S = 1170, Mips_MOVZ_I_S_MM = 1171, Mips_MSUB = 1172, Mips_MSUBF_D = 1173, Mips_MSUBF_S = 1174, Mips_MSUBR_Q_H = 1175, Mips_MSUBR_Q_W = 1176, Mips_MSUBU = 1177, Mips_MSUBU_DSP = 1178, Mips_MSUBU_MM = 1179, Mips_MSUBV_B = 1180, Mips_MSUBV_D = 1181, Mips_MSUBV_H = 1182, Mips_MSUBV_W = 1183, Mips_MSUB_D32 = 1184, Mips_MSUB_D32_MM = 1185, Mips_MSUB_D64 = 1186, Mips_MSUB_DSP = 1187, Mips_MSUB_MM = 1188, Mips_MSUB_Q_H = 1189, Mips_MSUB_Q_W = 1190, Mips_MSUB_S = 1191, Mips_MSUB_S_MM = 1192, Mips_MTC0 = 1193, Mips_MTC1 = 1194, Mips_MTC1_MM = 1195, Mips_MTC2 = 1196, Mips_MTHC1_D32 = 1197, Mips_MTHC1_D64 = 1198, Mips_MTHC1_MM = 1199, Mips_MTHI = 1200, Mips_MTHI64 = 1201, Mips_MTHI_DSP = 1202, Mips_MTHI_MM = 1203, Mips_MTHLIP = 1204, Mips_MTLO = 1205, Mips_MTLO64 = 1206, Mips_MTLO_DSP = 1207, Mips_MTLO_MM = 1208, Mips_MTM0 = 1209, Mips_MTM1 = 1210, Mips_MTM2 = 1211, Mips_MTP0 = 1212, Mips_MTP1 = 1213, Mips_MTP2 = 1214, Mips_MUH = 1215, Mips_MUHU = 1216, Mips_MUL = 1217, Mips_MULEQ_S_W_PHL = 1218, Mips_MULEQ_S_W_PHR = 1219, Mips_MULEU_S_PH_QBL = 1220, Mips_MULEU_S_PH_QBR = 1221, Mips_MULQ_RS_PH = 1222, Mips_MULQ_RS_W = 1223, Mips_MULQ_S_PH = 1224, Mips_MULQ_S_W = 1225, Mips_MULR_Q_H = 1226, Mips_MULR_Q_W = 1227, Mips_MULSAQ_S_W_PH = 1228, Mips_MULSA_W_PH = 1229, Mips_MULT = 1230, Mips_MULTU_DSP = 1231, Mips_MULT_DSP = 1232, Mips_MULT_MM = 1233, Mips_MULTu = 1234, Mips_MULTu_MM = 1235, Mips_MULU = 1236, Mips_MULV_B = 1237, Mips_MULV_D = 1238, Mips_MULV_H = 1239, Mips_MULV_W = 1240, Mips_MUL_MM = 1241, Mips_MUL_PH = 1242, Mips_MUL_Q_H = 1243, Mips_MUL_Q_W = 1244, Mips_MUL_R6 = 1245, Mips_MUL_S_PH = 1246, Mips_Mfhi16 = 1247, Mips_Mflo16 = 1248, Mips_Move32R16 = 1249, Mips_MoveR3216 = 1250, Mips_MultRxRy16 = 1251, Mips_MultRxRyRz16 = 1252, Mips_MultuRxRy16 = 1253, Mips_MultuRxRyRz16 = 1254, Mips_NLOC_B = 1255, Mips_NLOC_D = 1256, Mips_NLOC_H = 1257, Mips_NLOC_W = 1258, Mips_NLZC_B = 1259, Mips_NLZC_D = 1260, Mips_NLZC_H = 1261, Mips_NLZC_W = 1262, Mips_NMADD_D32 = 1263, Mips_NMADD_D32_MM = 1264, Mips_NMADD_D64 = 1265, Mips_NMADD_S = 1266, Mips_NMADD_S_MM = 1267, Mips_NMSUB_D32 = 1268, Mips_NMSUB_D32_MM = 1269, Mips_NMSUB_D64 = 1270, Mips_NMSUB_S = 1271, Mips_NMSUB_S_MM = 1272, Mips_NOP = 1273, Mips_NOR = 1274, Mips_NOR64 = 1275, Mips_NORI_B = 1276, Mips_NOR_MM = 1277, Mips_NOR_V = 1278, Mips_NOR_V_D_PSEUDO = 1279, Mips_NOR_V_H_PSEUDO = 1280, Mips_NOR_V_W_PSEUDO = 1281, Mips_NOT16_MM = 1282, Mips_NegRxRy16 = 1283, Mips_NotRxRy16 = 1284, Mips_OR = 1285, Mips_OR16_MM = 1286, Mips_OR64 = 1287, Mips_ORI_B = 1288, Mips_OR_MM = 1289, Mips_OR_V = 1290, Mips_OR_V_D_PSEUDO = 1291, Mips_OR_V_H_PSEUDO = 1292, Mips_OR_V_W_PSEUDO = 1293, Mips_ORi = 1294, Mips_ORi64 = 1295, Mips_ORi_MM = 1296, Mips_OrRxRxRy16 = 1297, Mips_PACKRL_PH = 1298, Mips_PAUSE = 1299, Mips_PAUSE_MM = 1300, Mips_PCKEV_B = 1301, Mips_PCKEV_D = 1302, Mips_PCKEV_H = 1303, Mips_PCKEV_W = 1304, Mips_PCKOD_B = 1305, Mips_PCKOD_D = 1306, Mips_PCKOD_H = 1307, Mips_PCKOD_W = 1308, Mips_PCNT_B = 1309, Mips_PCNT_D = 1310, Mips_PCNT_H = 1311, Mips_PCNT_W = 1312, Mips_PICK_PH = 1313, Mips_PICK_QB = 1314, Mips_POP = 1315, Mips_PRECEQU_PH_QBL = 1316, Mips_PRECEQU_PH_QBLA = 1317, Mips_PRECEQU_PH_QBR = 1318, Mips_PRECEQU_PH_QBRA = 1319, Mips_PRECEQ_W_PHL = 1320, Mips_PRECEQ_W_PHR = 1321, Mips_PRECEU_PH_QBL = 1322, Mips_PRECEU_PH_QBLA = 1323, Mips_PRECEU_PH_QBR = 1324, Mips_PRECEU_PH_QBRA = 1325, Mips_PRECRQU_S_QB_PH = 1326, Mips_PRECRQ_PH_W = 1327, Mips_PRECRQ_QB_PH = 1328, Mips_PRECRQ_RS_PH_W = 1329, Mips_PRECR_QB_PH = 1330, Mips_PRECR_SRA_PH_W = 1331, Mips_PRECR_SRA_R_PH_W = 1332, Mips_PREF = 1333, Mips_PREF_MM = 1334, Mips_PREF_R6 = 1335, Mips_PREPEND = 1336, Mips_PseudoCMPU_EQ_QB = 1337, Mips_PseudoCMPU_LE_QB = 1338, Mips_PseudoCMPU_LT_QB = 1339, Mips_PseudoCMP_EQ_PH = 1340, Mips_PseudoCMP_LE_PH = 1341, Mips_PseudoCMP_LT_PH = 1342, Mips_PseudoCVT_D32_W = 1343, Mips_PseudoCVT_D64_L = 1344, Mips_PseudoCVT_D64_W = 1345, Mips_PseudoCVT_S_L = 1346, Mips_PseudoCVT_S_W = 1347, Mips_PseudoDMULT = 1348, Mips_PseudoDMULTu = 1349, Mips_PseudoDSDIV = 1350, Mips_PseudoDUDIV = 1351, Mips_PseudoIndirectBranch = 1352, Mips_PseudoIndirectBranch64 = 1353, Mips_PseudoMADD = 1354, Mips_PseudoMADDU = 1355, Mips_PseudoMFHI = 1356, Mips_PseudoMFHI64 = 1357, Mips_PseudoMFLO = 1358, Mips_PseudoMFLO64 = 1359, Mips_PseudoMSUB = 1360, Mips_PseudoMSUBU = 1361, Mips_PseudoMTLOHI = 1362, Mips_PseudoMTLOHI64 = 1363, Mips_PseudoMTLOHI_DSP = 1364, Mips_PseudoMULT = 1365, Mips_PseudoMULTu = 1366, Mips_PseudoPICK_PH = 1367, Mips_PseudoPICK_QB = 1368, Mips_PseudoReturn = 1369, Mips_PseudoReturn64 = 1370, Mips_PseudoSDIV = 1371, Mips_PseudoSELECTFP_F_D32 = 1372, Mips_PseudoSELECTFP_F_D64 = 1373, Mips_PseudoSELECTFP_F_I = 1374, Mips_PseudoSELECTFP_F_I64 = 1375, Mips_PseudoSELECTFP_F_S = 1376, Mips_PseudoSELECTFP_T_D32 = 1377, Mips_PseudoSELECTFP_T_D64 = 1378, Mips_PseudoSELECTFP_T_I = 1379, Mips_PseudoSELECTFP_T_I64 = 1380, Mips_PseudoSELECTFP_T_S = 1381, Mips_PseudoSELECT_D32 = 1382, Mips_PseudoSELECT_D64 = 1383, Mips_PseudoSELECT_I = 1384, Mips_PseudoSELECT_I64 = 1385, Mips_PseudoSELECT_S = 1386, Mips_PseudoUDIV = 1387, Mips_RADDU_W_QB = 1388, Mips_RDDSP = 1389, Mips_RDHWR = 1390, Mips_RDHWR64 = 1391, Mips_RDHWR_MM = 1392, Mips_REPLV_PH = 1393, Mips_REPLV_QB = 1394, Mips_REPL_PH = 1395, Mips_REPL_QB = 1396, Mips_RINT_D = 1397, Mips_RINT_S = 1398, Mips_ROTR = 1399, Mips_ROTRV = 1400, Mips_ROTRV_MM = 1401, Mips_ROTR_MM = 1402, Mips_ROUND_L_D64 = 1403, Mips_ROUND_L_S = 1404, Mips_ROUND_W_D32 = 1405, Mips_ROUND_W_D64 = 1406, Mips_ROUND_W_MM = 1407, Mips_ROUND_W_S = 1408, Mips_ROUND_W_S_MM = 1409, Mips_Restore16 = 1410, Mips_RestoreX16 = 1411, Mips_RetRA = 1412, Mips_RetRA16 = 1413, Mips_SAT_S_B = 1414, Mips_SAT_S_D = 1415, Mips_SAT_S_H = 1416, Mips_SAT_S_W = 1417, Mips_SAT_U_B = 1418, Mips_SAT_U_D = 1419, Mips_SAT_U_H = 1420, Mips_SAT_U_W = 1421, Mips_SB = 1422, Mips_SB16_MM = 1423, Mips_SB64 = 1424, Mips_SB_MM = 1425, Mips_SC = 1426, Mips_SCD = 1427, Mips_SCD_R6 = 1428, Mips_SC_MM = 1429, Mips_SC_R6 = 1430, Mips_SD = 1431, Mips_SDBBP = 1432, Mips_SDBBP16_MM = 1433, Mips_SDBBP_MM = 1434, Mips_SDBBP_R6 = 1435, Mips_SDC1 = 1436, Mips_SDC164 = 1437, Mips_SDC1_MM = 1438, Mips_SDC2 = 1439, Mips_SDC2_R6 = 1440, Mips_SDC3 = 1441, Mips_SDIV = 1442, Mips_SDIV_MM = 1443, Mips_SDL = 1444, Mips_SDR = 1445, Mips_SDXC1 = 1446, Mips_SDXC164 = 1447, Mips_SEB = 1448, Mips_SEB64 = 1449, Mips_SEB_MM = 1450, Mips_SEH = 1451, Mips_SEH64 = 1452, Mips_SEH_MM = 1453, Mips_SELEQZ = 1454, Mips_SELEQZ64 = 1455, Mips_SELEQZ_D = 1456, Mips_SELEQZ_S = 1457, Mips_SELNEZ = 1458, Mips_SELNEZ64 = 1459, Mips_SELNEZ_D = 1460, Mips_SELNEZ_S = 1461, Mips_SEL_D = 1462, Mips_SEL_S = 1463, Mips_SEQ = 1464, Mips_SEQi = 1465, Mips_SH = 1466, Mips_SH16_MM = 1467, Mips_SH64 = 1468, Mips_SHF_B = 1469, Mips_SHF_H = 1470, Mips_SHF_W = 1471, Mips_SHILO = 1472, Mips_SHILOV = 1473, Mips_SHLLV_PH = 1474, Mips_SHLLV_QB = 1475, Mips_SHLLV_S_PH = 1476, Mips_SHLLV_S_W = 1477, Mips_SHLL_PH = 1478, Mips_SHLL_QB = 1479, Mips_SHLL_S_PH = 1480, Mips_SHLL_S_W = 1481, Mips_SHRAV_PH = 1482, Mips_SHRAV_QB = 1483, Mips_SHRAV_R_PH = 1484, Mips_SHRAV_R_QB = 1485, Mips_SHRAV_R_W = 1486, Mips_SHRA_PH = 1487, Mips_SHRA_QB = 1488, Mips_SHRA_R_PH = 1489, Mips_SHRA_R_QB = 1490, Mips_SHRA_R_W = 1491, Mips_SHRLV_PH = 1492, Mips_SHRLV_QB = 1493, Mips_SHRL_PH = 1494, Mips_SHRL_QB = 1495, Mips_SH_MM = 1496, Mips_SLDI_B = 1497, Mips_SLDI_D = 1498, Mips_SLDI_H = 1499, Mips_SLDI_W = 1500, Mips_SLD_B = 1501, Mips_SLD_D = 1502, Mips_SLD_H = 1503, Mips_SLD_W = 1504, Mips_SLL = 1505, Mips_SLL16_MM = 1506, Mips_SLL64_32 = 1507, Mips_SLL64_64 = 1508, Mips_SLLI_B = 1509, Mips_SLLI_D = 1510, Mips_SLLI_H = 1511, Mips_SLLI_W = 1512, Mips_SLLV = 1513, Mips_SLLV_MM = 1514, Mips_SLL_B = 1515, Mips_SLL_D = 1516, Mips_SLL_H = 1517, Mips_SLL_MM = 1518, Mips_SLL_W = 1519, Mips_SLT = 1520, Mips_SLT64 = 1521, Mips_SLT_MM = 1522, Mips_SLTi = 1523, Mips_SLTi64 = 1524, Mips_SLTi_MM = 1525, Mips_SLTiu = 1526, Mips_SLTiu64 = 1527, Mips_SLTiu_MM = 1528, Mips_SLTu = 1529, Mips_SLTu64 = 1530, Mips_SLTu_MM = 1531, Mips_SNE = 1532, Mips_SNEi = 1533, Mips_SNZ_B_PSEUDO = 1534, Mips_SNZ_D_PSEUDO = 1535, Mips_SNZ_H_PSEUDO = 1536, Mips_SNZ_V_PSEUDO = 1537, Mips_SNZ_W_PSEUDO = 1538, Mips_SPLATI_B = 1539, Mips_SPLATI_D = 1540, Mips_SPLATI_H = 1541, Mips_SPLATI_W = 1542, Mips_SPLAT_B = 1543, Mips_SPLAT_D = 1544, Mips_SPLAT_H = 1545, Mips_SPLAT_W = 1546, Mips_SRA = 1547, Mips_SRAI_B = 1548, Mips_SRAI_D = 1549, Mips_SRAI_H = 1550, Mips_SRAI_W = 1551, Mips_SRARI_B = 1552, Mips_SRARI_D = 1553, Mips_SRARI_H = 1554, Mips_SRARI_W = 1555, Mips_SRAR_B = 1556, Mips_SRAR_D = 1557, Mips_SRAR_H = 1558, Mips_SRAR_W = 1559, Mips_SRAV = 1560, Mips_SRAV_MM = 1561, Mips_SRA_B = 1562, Mips_SRA_D = 1563, Mips_SRA_H = 1564, Mips_SRA_MM = 1565, Mips_SRA_W = 1566, Mips_SRL = 1567, Mips_SRL16_MM = 1568, Mips_SRLI_B = 1569, Mips_SRLI_D = 1570, Mips_SRLI_H = 1571, Mips_SRLI_W = 1572, Mips_SRLRI_B = 1573, Mips_SRLRI_D = 1574, Mips_SRLRI_H = 1575, Mips_SRLRI_W = 1576, Mips_SRLR_B = 1577, Mips_SRLR_D = 1578, Mips_SRLR_H = 1579, Mips_SRLR_W = 1580, Mips_SRLV = 1581, Mips_SRLV_MM = 1582, Mips_SRL_B = 1583, Mips_SRL_D = 1584, Mips_SRL_H = 1585, Mips_SRL_MM = 1586, Mips_SRL_W = 1587, Mips_SSNOP = 1588, Mips_SSNOP_MM = 1589, Mips_STORE_ACC128 = 1590, Mips_STORE_ACC64 = 1591, Mips_STORE_ACC64DSP = 1592, Mips_STORE_CCOND_DSP = 1593, Mips_ST_B = 1594, Mips_ST_D = 1595, Mips_ST_H = 1596, Mips_ST_W = 1597, Mips_SUB = 1598, Mips_SUBQH_PH = 1599, Mips_SUBQH_R_PH = 1600, Mips_SUBQH_R_W = 1601, Mips_SUBQH_W = 1602, Mips_SUBQ_PH = 1603, Mips_SUBQ_S_PH = 1604, Mips_SUBQ_S_W = 1605, Mips_SUBSUS_U_B = 1606, Mips_SUBSUS_U_D = 1607, Mips_SUBSUS_U_H = 1608, Mips_SUBSUS_U_W = 1609, Mips_SUBSUU_S_B = 1610, Mips_SUBSUU_S_D = 1611, Mips_SUBSUU_S_H = 1612, Mips_SUBSUU_S_W = 1613, Mips_SUBS_S_B = 1614, Mips_SUBS_S_D = 1615, Mips_SUBS_S_H = 1616, Mips_SUBS_S_W = 1617, Mips_SUBS_U_B = 1618, Mips_SUBS_U_D = 1619, Mips_SUBS_U_H = 1620, Mips_SUBS_U_W = 1621, Mips_SUBU16_MM = 1622, Mips_SUBUH_QB = 1623, Mips_SUBUH_R_QB = 1624, Mips_SUBU_PH = 1625, Mips_SUBU_QB = 1626, Mips_SUBU_S_PH = 1627, Mips_SUBU_S_QB = 1628, Mips_SUBVI_B = 1629, Mips_SUBVI_D = 1630, Mips_SUBVI_H = 1631, Mips_SUBVI_W = 1632, Mips_SUBV_B = 1633, Mips_SUBV_D = 1634, Mips_SUBV_H = 1635, Mips_SUBV_W = 1636, Mips_SUB_MM = 1637, Mips_SUBu = 1638, Mips_SUBu_MM = 1639, Mips_SUXC1 = 1640, Mips_SUXC164 = 1641, Mips_SUXC1_MM = 1642, Mips_SW = 1643, Mips_SW16_MM = 1644, Mips_SW64 = 1645, Mips_SWC1 = 1646, Mips_SWC1_MM = 1647, Mips_SWC2 = 1648, Mips_SWC2_R6 = 1649, Mips_SWC3 = 1650, Mips_SWL = 1651, Mips_SWL64 = 1652, Mips_SWL_MM = 1653, Mips_SWM16_MM = 1654, Mips_SWM32_MM = 1655, Mips_SWM_MM = 1656, Mips_SWP_MM = 1657, Mips_SWR = 1658, Mips_SWR64 = 1659, Mips_SWR_MM = 1660, Mips_SWSP_MM = 1661, Mips_SWXC1 = 1662, Mips_SWXC1_MM = 1663, Mips_SW_MM = 1664, Mips_SYNC = 1665, Mips_SYNCI = 1666, Mips_SYNC_MM = 1667, Mips_SYSCALL = 1668, Mips_SYSCALL_MM = 1669, Mips_SZ_B_PSEUDO = 1670, Mips_SZ_D_PSEUDO = 1671, Mips_SZ_H_PSEUDO = 1672, Mips_SZ_V_PSEUDO = 1673, Mips_SZ_W_PSEUDO = 1674, Mips_Save16 = 1675, Mips_SaveX16 = 1676, Mips_SbRxRyOffMemX16 = 1677, Mips_SebRx16 = 1678, Mips_SehRx16 = 1679, Mips_SelBeqZ = 1680, Mips_SelBneZ = 1681, Mips_SelTBteqZCmp = 1682, Mips_SelTBteqZCmpi = 1683, Mips_SelTBteqZSlt = 1684, Mips_SelTBteqZSlti = 1685, Mips_SelTBteqZSltiu = 1686, Mips_SelTBteqZSltu = 1687, Mips_SelTBtneZCmp = 1688, Mips_SelTBtneZCmpi = 1689, Mips_SelTBtneZSlt = 1690, Mips_SelTBtneZSlti = 1691, Mips_SelTBtneZSltiu = 1692, Mips_SelTBtneZSltu = 1693, Mips_ShRxRyOffMemX16 = 1694, Mips_SllX16 = 1695, Mips_SllvRxRy16 = 1696, Mips_SltCCRxRy16 = 1697, Mips_SltRxRy16 = 1698, Mips_SltiCCRxImmX16 = 1699, Mips_SltiRxImm16 = 1700, Mips_SltiRxImmX16 = 1701, Mips_SltiuCCRxImmX16 = 1702, Mips_SltiuRxImm16 = 1703, Mips_SltiuRxImmX16 = 1704, Mips_SltuCCRxRy16 = 1705, Mips_SltuRxRy16 = 1706, Mips_SltuRxRyRz16 = 1707, Mips_SraX16 = 1708, Mips_SravRxRy16 = 1709, Mips_SrlX16 = 1710, Mips_SrlvRxRy16 = 1711, Mips_SubuRxRyRz16 = 1712, Mips_SwRxRyOffMemX16 = 1713, Mips_SwRxSpImmX16 = 1714, Mips_TAILCALL = 1715, Mips_TAILCALL64_R = 1716, Mips_TAILCALL_R = 1717, Mips_TEQ = 1718, Mips_TEQI = 1719, Mips_TEQI_MM = 1720, Mips_TEQ_MM = 1721, Mips_TGE = 1722, Mips_TGEI = 1723, Mips_TGEIU = 1724, Mips_TGEIU_MM = 1725, Mips_TGEI_MM = 1726, Mips_TGEU = 1727, Mips_TGEU_MM = 1728, Mips_TGE_MM = 1729, Mips_TLBP = 1730, Mips_TLBP_MM = 1731, Mips_TLBR = 1732, Mips_TLBR_MM = 1733, Mips_TLBWI = 1734, Mips_TLBWI_MM = 1735, Mips_TLBWR = 1736, Mips_TLBWR_MM = 1737, Mips_TLT = 1738, Mips_TLTI = 1739, Mips_TLTIU_MM = 1740, Mips_TLTI_MM = 1741, Mips_TLTU = 1742, Mips_TLTU_MM = 1743, Mips_TLT_MM = 1744, Mips_TNE = 1745, Mips_TNEI = 1746, Mips_TNEI_MM = 1747, Mips_TNE_MM = 1748, Mips_TRAP = 1749, Mips_TRUNC_L_D64 = 1750, Mips_TRUNC_L_S = 1751, Mips_TRUNC_W_D32 = 1752, Mips_TRUNC_W_D64 = 1753, Mips_TRUNC_W_MM = 1754, Mips_TRUNC_W_S = 1755, Mips_TRUNC_W_S_MM = 1756, Mips_TTLTIU = 1757, Mips_UDIV = 1758, Mips_UDIV_MM = 1759, Mips_V3MULU = 1760, Mips_VMM0 = 1761, Mips_VMULU = 1762, Mips_VSHF_B = 1763, Mips_VSHF_D = 1764, Mips_VSHF_H = 1765, Mips_VSHF_W = 1766, Mips_WAIT = 1767, Mips_WAIT_MM = 1768, Mips_WRDSP = 1769, Mips_WSBH = 1770, Mips_WSBH_MM = 1771, Mips_XOR = 1772, Mips_XOR16_MM = 1773, Mips_XOR64 = 1774, Mips_XORI_B = 1775, Mips_XOR_MM = 1776, Mips_XOR_V = 1777, Mips_XOR_V_D_PSEUDO = 1778, Mips_XOR_V_H_PSEUDO = 1779, Mips_XOR_V_W_PSEUDO = 1780, Mips_XORi = 1781, Mips_XORi64 = 1782, Mips_XORi_MM = 1783, Mips_XorRxRxRy16 = 1784, Mips_INSTRUCTION_LIST_END = 1785 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/Mips/MipsGenRegisterInfo.inc010066400017500001750000002020161363402546700224760ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { Mips_NoRegister, Mips_AT = 1, Mips_DSPCCond = 2, Mips_DSPCarry = 3, Mips_DSPEFI = 4, Mips_DSPOutFlag = 5, Mips_DSPPos = 6, Mips_DSPSCount = 7, Mips_FP = 8, Mips_GP = 9, Mips_MSAAccess = 10, Mips_MSACSR = 11, Mips_MSAIR = 12, Mips_MSAMap = 13, Mips_MSAModify = 14, Mips_MSARequest = 15, Mips_MSASave = 16, Mips_MSAUnmap = 17, Mips_PC = 18, Mips_RA = 19, Mips_SP = 20, Mips_ZERO = 21, Mips_A0 = 22, Mips_A1 = 23, Mips_A2 = 24, Mips_A3 = 25, Mips_AC0 = 26, Mips_AC1 = 27, Mips_AC2 = 28, Mips_AC3 = 29, Mips_AT_64 = 30, Mips_CC0 = 31, Mips_CC1 = 32, Mips_CC2 = 33, Mips_CC3 = 34, Mips_CC4 = 35, Mips_CC5 = 36, Mips_CC6 = 37, Mips_CC7 = 38, Mips_COP20 = 39, Mips_COP21 = 40, Mips_COP22 = 41, Mips_COP23 = 42, Mips_COP24 = 43, Mips_COP25 = 44, Mips_COP26 = 45, Mips_COP27 = 46, Mips_COP28 = 47, Mips_COP29 = 48, Mips_COP30 = 49, Mips_COP31 = 50, Mips_COP32 = 51, Mips_COP33 = 52, Mips_COP34 = 53, Mips_COP35 = 54, Mips_COP36 = 55, Mips_COP37 = 56, Mips_COP38 = 57, Mips_COP39 = 58, Mips_COP210 = 59, Mips_COP211 = 60, Mips_COP212 = 61, Mips_COP213 = 62, Mips_COP214 = 63, Mips_COP215 = 64, Mips_COP216 = 65, Mips_COP217 = 66, Mips_COP218 = 67, Mips_COP219 = 68, Mips_COP220 = 69, Mips_COP221 = 70, Mips_COP222 = 71, Mips_COP223 = 72, Mips_COP224 = 73, Mips_COP225 = 74, Mips_COP226 = 75, Mips_COP227 = 76, Mips_COP228 = 77, Mips_COP229 = 78, Mips_COP230 = 79, Mips_COP231 = 80, Mips_COP310 = 81, Mips_COP311 = 82, Mips_COP312 = 83, Mips_COP313 = 84, Mips_COP314 = 85, Mips_COP315 = 86, Mips_COP316 = 87, Mips_COP317 = 88, Mips_COP318 = 89, Mips_COP319 = 90, Mips_COP320 = 91, Mips_COP321 = 92, Mips_COP322 = 93, Mips_COP323 = 94, Mips_COP324 = 95, Mips_COP325 = 96, Mips_COP326 = 97, Mips_COP327 = 98, Mips_COP328 = 99, Mips_COP329 = 100, Mips_COP330 = 101, Mips_COP331 = 102, Mips_D0 = 103, Mips_D1 = 104, Mips_D2 = 105, Mips_D3 = 106, Mips_D4 = 107, Mips_D5 = 108, Mips_D6 = 109, Mips_D7 = 110, Mips_D8 = 111, Mips_D9 = 112, Mips_D10 = 113, Mips_D11 = 114, Mips_D12 = 115, Mips_D13 = 116, Mips_D14 = 117, Mips_D15 = 118, Mips_DSPOutFlag20 = 119, Mips_DSPOutFlag21 = 120, Mips_DSPOutFlag22 = 121, Mips_DSPOutFlag23 = 122, Mips_F0 = 123, Mips_F1 = 124, Mips_F2 = 125, Mips_F3 = 126, Mips_F4 = 127, Mips_F5 = 128, Mips_F6 = 129, Mips_F7 = 130, Mips_F8 = 131, Mips_F9 = 132, Mips_F10 = 133, Mips_F11 = 134, Mips_F12 = 135, Mips_F13 = 136, Mips_F14 = 137, Mips_F15 = 138, Mips_F16 = 139, Mips_F17 = 140, Mips_F18 = 141, Mips_F19 = 142, Mips_F20 = 143, Mips_F21 = 144, Mips_F22 = 145, Mips_F23 = 146, Mips_F24 = 147, Mips_F25 = 148, Mips_F26 = 149, Mips_F27 = 150, Mips_F28 = 151, Mips_F29 = 152, Mips_F30 = 153, Mips_F31 = 154, Mips_FCC0 = 155, Mips_FCC1 = 156, Mips_FCC2 = 157, Mips_FCC3 = 158, Mips_FCC4 = 159, Mips_FCC5 = 160, Mips_FCC6 = 161, Mips_FCC7 = 162, Mips_FCR0 = 163, Mips_FCR1 = 164, Mips_FCR2 = 165, Mips_FCR3 = 166, Mips_FCR4 = 167, Mips_FCR5 = 168, Mips_FCR6 = 169, Mips_FCR7 = 170, Mips_FCR8 = 171, Mips_FCR9 = 172, Mips_FCR10 = 173, Mips_FCR11 = 174, Mips_FCR12 = 175, Mips_FCR13 = 176, Mips_FCR14 = 177, Mips_FCR15 = 178, Mips_FCR16 = 179, Mips_FCR17 = 180, Mips_FCR18 = 181, Mips_FCR19 = 182, Mips_FCR20 = 183, Mips_FCR21 = 184, Mips_FCR22 = 185, Mips_FCR23 = 186, Mips_FCR24 = 187, Mips_FCR25 = 188, Mips_FCR26 = 189, Mips_FCR27 = 190, Mips_FCR28 = 191, Mips_FCR29 = 192, Mips_FCR30 = 193, Mips_FCR31 = 194, Mips_FP_64 = 195, Mips_F_HI0 = 196, Mips_F_HI1 = 197, Mips_F_HI2 = 198, Mips_F_HI3 = 199, Mips_F_HI4 = 200, Mips_F_HI5 = 201, Mips_F_HI6 = 202, Mips_F_HI7 = 203, Mips_F_HI8 = 204, Mips_F_HI9 = 205, Mips_F_HI10 = 206, Mips_F_HI11 = 207, Mips_F_HI12 = 208, Mips_F_HI13 = 209, Mips_F_HI14 = 210, Mips_F_HI15 = 211, Mips_F_HI16 = 212, Mips_F_HI17 = 213, Mips_F_HI18 = 214, Mips_F_HI19 = 215, Mips_F_HI20 = 216, Mips_F_HI21 = 217, Mips_F_HI22 = 218, Mips_F_HI23 = 219, Mips_F_HI24 = 220, Mips_F_HI25 = 221, Mips_F_HI26 = 222, Mips_F_HI27 = 223, Mips_F_HI28 = 224, Mips_F_HI29 = 225, Mips_F_HI30 = 226, Mips_F_HI31 = 227, Mips_GP_64 = 228, Mips_HI0 = 229, Mips_HI1 = 230, Mips_HI2 = 231, Mips_HI3 = 232, Mips_HWR0 = 233, Mips_HWR1 = 234, Mips_HWR2 = 235, Mips_HWR3 = 236, Mips_HWR4 = 237, Mips_HWR5 = 238, Mips_HWR6 = 239, Mips_HWR7 = 240, Mips_HWR8 = 241, Mips_HWR9 = 242, Mips_HWR10 = 243, Mips_HWR11 = 244, Mips_HWR12 = 245, Mips_HWR13 = 246, Mips_HWR14 = 247, Mips_HWR15 = 248, Mips_HWR16 = 249, Mips_HWR17 = 250, Mips_HWR18 = 251, Mips_HWR19 = 252, Mips_HWR20 = 253, Mips_HWR21 = 254, Mips_HWR22 = 255, Mips_HWR23 = 256, Mips_HWR24 = 257, Mips_HWR25 = 258, Mips_HWR26 = 259, Mips_HWR27 = 260, Mips_HWR28 = 261, Mips_HWR29 = 262, Mips_HWR30 = 263, Mips_HWR31 = 264, Mips_K0 = 265, Mips_K1 = 266, Mips_LO0 = 267, Mips_LO1 = 268, Mips_LO2 = 269, Mips_LO3 = 270, Mips_MPL0 = 271, Mips_MPL1 = 272, Mips_MPL2 = 273, Mips_P0 = 274, Mips_P1 = 275, Mips_P2 = 276, Mips_RA_64 = 277, Mips_S0 = 278, Mips_S1 = 279, Mips_S2 = 280, Mips_S3 = 281, Mips_S4 = 282, Mips_S5 = 283, Mips_S6 = 284, Mips_S7 = 285, Mips_SP_64 = 286, Mips_T0 = 287, Mips_T1 = 288, Mips_T2 = 289, Mips_T3 = 290, Mips_T4 = 291, Mips_T5 = 292, Mips_T6 = 293, Mips_T7 = 294, Mips_T8 = 295, Mips_T9 = 296, Mips_V0 = 297, Mips_V1 = 298, Mips_W0 = 299, Mips_W1 = 300, Mips_W2 = 301, Mips_W3 = 302, Mips_W4 = 303, Mips_W5 = 304, Mips_W6 = 305, Mips_W7 = 306, Mips_W8 = 307, Mips_W9 = 308, Mips_W10 = 309, Mips_W11 = 310, Mips_W12 = 311, Mips_W13 = 312, Mips_W14 = 313, Mips_W15 = 314, Mips_W16 = 315, Mips_W17 = 316, Mips_W18 = 317, Mips_W19 = 318, Mips_W20 = 319, Mips_W21 = 320, Mips_W22 = 321, Mips_W23 = 322, Mips_W24 = 323, Mips_W25 = 324, Mips_W26 = 325, Mips_W27 = 326, Mips_W28 = 327, Mips_W29 = 328, Mips_W30 = 329, Mips_W31 = 330, Mips_ZERO_64 = 331, Mips_A0_64 = 332, Mips_A1_64 = 333, Mips_A2_64 = 334, Mips_A3_64 = 335, Mips_AC0_64 = 336, Mips_D0_64 = 337, Mips_D1_64 = 338, Mips_D2_64 = 339, Mips_D3_64 = 340, Mips_D4_64 = 341, Mips_D5_64 = 342, Mips_D6_64 = 343, Mips_D7_64 = 344, Mips_D8_64 = 345, Mips_D9_64 = 346, Mips_D10_64 = 347, Mips_D11_64 = 348, Mips_D12_64 = 349, Mips_D13_64 = 350, Mips_D14_64 = 351, Mips_D15_64 = 352, Mips_D16_64 = 353, Mips_D17_64 = 354, Mips_D18_64 = 355, Mips_D19_64 = 356, Mips_D20_64 = 357, Mips_D21_64 = 358, Mips_D22_64 = 359, Mips_D23_64 = 360, Mips_D24_64 = 361, Mips_D25_64 = 362, Mips_D26_64 = 363, Mips_D27_64 = 364, Mips_D28_64 = 365, Mips_D29_64 = 366, Mips_D30_64 = 367, Mips_D31_64 = 368, Mips_DSPOutFlag16_19 = 369, Mips_HI0_64 = 370, Mips_K0_64 = 371, Mips_K1_64 = 372, Mips_LO0_64 = 373, Mips_S0_64 = 374, Mips_S1_64 = 375, Mips_S2_64 = 376, Mips_S3_64 = 377, Mips_S4_64 = 378, Mips_S5_64 = 379, Mips_S6_64 = 380, Mips_S7_64 = 381, Mips_T0_64 = 382, Mips_T1_64 = 383, Mips_T2_64 = 384, Mips_T3_64 = 385, Mips_T4_64 = 386, Mips_T5_64 = 387, Mips_T6_64 = 388, Mips_T7_64 = 389, Mips_T8_64 = 390, Mips_T9_64 = 391, Mips_V0_64 = 392, Mips_V1_64 = 393, Mips_NUM_TARGET_REGS // 394 }; // Register classes enum { Mips_OddSPRegClassID = 0, Mips_CCRRegClassID = 1, Mips_COP2RegClassID = 2, Mips_COP3RegClassID = 3, Mips_DSPRRegClassID = 4, Mips_FGR32RegClassID = 5, Mips_FGRCCRegClassID = 6, Mips_FGRH32RegClassID = 7, Mips_GPR32RegClassID = 8, Mips_HWRegsRegClassID = 9, Mips_OddSP_with_sub_hiRegClassID = 10, Mips_FGR32_and_OddSPRegClassID = 11, Mips_FGRH32_and_OddSPRegClassID = 12, Mips_OddSP_with_sub_hi_with_sub_hi_in_FGRH32RegClassID = 13, Mips_CPU16RegsPlusSPRegClassID = 14, Mips_CCRegClassID = 15, Mips_CPU16RegsRegClassID = 16, Mips_FCCRegClassID = 17, Mips_GPRMM16RegClassID = 18, Mips_GPRMM16MovePRegClassID = 19, Mips_GPRMM16ZeroRegClassID = 20, Mips_MSACtrlRegClassID = 21, Mips_OddSP_with_sub_hi_with_sub_hi_in_FGR32RegClassID = 22, Mips_CPU16Regs_and_GPRMM16ZeroRegClassID = 23, Mips_CPU16Regs_and_GPRMM16MovePRegClassID = 24, Mips_GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 25, Mips_HI32DSPRegClassID = 26, Mips_LO32DSPRegClassID = 27, Mips_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 28, Mips_CPURARegRegClassID = 29, Mips_CPUSPRegRegClassID = 30, Mips_DSPCCRegClassID = 31, Mips_HI32RegClassID = 32, Mips_LO32RegClassID = 33, Mips_FGR64RegClassID = 34, Mips_GPR64RegClassID = 35, Mips_AFGR64RegClassID = 36, Mips_FGR64_and_OddSPRegClassID = 37, Mips_GPR64_with_sub_32_in_CPU16RegsPlusSPRegClassID = 38, Mips_AFGR64_and_OddSPRegClassID = 39, Mips_GPR64_with_sub_32_in_CPU16RegsRegClassID = 40, Mips_GPR64_with_sub_32_in_GPRMM16MovePRegClassID = 41, Mips_GPR64_with_sub_32_in_GPRMM16ZeroRegClassID = 42, Mips_GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClassID = 43, Mips_ACC64DSPRegClassID = 44, Mips_GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClassID = 45, Mips_GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 46, Mips_GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 47, Mips_OCTEON_MPLRegClassID = 48, Mips_OCTEON_PRegClassID = 49, Mips_ACC64RegClassID = 50, Mips_GPR64_with_sub_32_in_CPURARegRegClassID = 51, Mips_GPR64_with_sub_32_in_CPUSPRegRegClassID = 52, Mips_HI64RegClassID = 53, Mips_LO64RegClassID = 54, Mips_MSA128BRegClassID = 55, Mips_MSA128DRegClassID = 56, Mips_MSA128HRegClassID = 57, Mips_MSA128WRegClassID = 58, Mips_MSA128B_with_sub_64_in_OddSPRegClassID = 59, Mips_MSA128WEvensRegClassID = 60, Mips_ACC128RegClassID = 61, }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static MCPhysReg MipsRegDiffLists[] = { /* 0 */ 0, 0, /* 2 */ 4, 1, 1, 1, 1, 0, /* 8 */ 364, 65286, 1, 1, 1, 0, /* 14 */ 20, 1, 0, /* 17 */ 21, 1, 0, /* 20 */ 22, 1, 0, /* 23 */ 23, 1, 0, /* 26 */ 24, 1, 0, /* 29 */ 25, 1, 0, /* 32 */ 26, 1, 0, /* 35 */ 27, 1, 0, /* 38 */ 28, 1, 0, /* 41 */ 29, 1, 0, /* 44 */ 30, 1, 0, /* 47 */ 31, 1, 0, /* 50 */ 32, 1, 0, /* 53 */ 33, 1, 0, /* 56 */ 34, 1, 0, /* 59 */ 35, 1, 0, /* 62 */ 65439, 1, 0, /* 65 */ 65513, 1, 0, /* 68 */ 3, 0, /* 70 */ 4, 0, /* 72 */ 6, 0, /* 74 */ 11, 0, /* 76 */ 12, 0, /* 78 */ 22, 0, /* 80 */ 23, 0, /* 82 */ 29, 0, /* 84 */ 30, 0, /* 86 */ 65308, 72, 0, /* 89 */ 65346, 72, 0, /* 92 */ 38, 65322, 73, 0, /* 96 */ 95, 0, /* 98 */ 96, 0, /* 100 */ 106, 0, /* 102 */ 187, 0, /* 104 */ 219, 0, /* 106 */ 258, 0, /* 108 */ 266, 0, /* 110 */ 310, 0, /* 112 */ 65031, 0, /* 114 */ 65108, 0, /* 116 */ 65172, 0, /* 118 */ 65226, 0, /* 120 */ 65229, 0, /* 122 */ 65270, 0, /* 124 */ 65278, 0, /* 126 */ 65295, 0, /* 128 */ 65317, 0, /* 130 */ 37, 65430, 103, 65395, 65333, 0, /* 136 */ 65349, 0, /* 138 */ 65395, 0, /* 140 */ 65410, 0, /* 142 */ 65415, 0, /* 144 */ 65419, 0, /* 146 */ 65420, 0, /* 148 */ 65421, 0, /* 150 */ 65422, 0, /* 152 */ 65430, 0, /* 154 */ 65440, 0, /* 156 */ 65441, 0, /* 158 */ 141, 65498, 0, /* 161 */ 65516, 234, 65498, 0, /* 165 */ 65515, 235, 65498, 0, /* 169 */ 65514, 236, 65498, 0, /* 173 */ 65513, 237, 65498, 0, /* 177 */ 65512, 238, 65498, 0, /* 181 */ 65511, 239, 65498, 0, /* 185 */ 65510, 240, 65498, 0, /* 189 */ 65509, 241, 65498, 0, /* 193 */ 65508, 242, 65498, 0, /* 197 */ 65507, 243, 65498, 0, /* 201 */ 65506, 244, 65498, 0, /* 205 */ 65505, 245, 65498, 0, /* 209 */ 65504, 246, 65498, 0, /* 213 */ 65503, 247, 65498, 0, /* 217 */ 65502, 248, 65498, 0, /* 221 */ 65501, 249, 65498, 0, /* 225 */ 65500, 250, 65498, 0, /* 229 */ 65295, 347, 65499, 0, /* 233 */ 65333, 344, 65502, 0, /* 237 */ 65507, 0, /* 239 */ 65510, 0, /* 241 */ 65511, 0, /* 243 */ 65512, 0, /* 245 */ 65516, 0, /* 247 */ 65521, 0, /* 249 */ 65522, 0, /* 251 */ 65535, 0, }; static uint16_t MipsSubRegIdxLists[] = { /* 0 */ 1, 0, /* 2 */ 3, 4, 5, 6, 7, 0, /* 8 */ 2, 9, 8, 0, /* 12 */ 9, 1, 8, 10, 11, 0, }; static MCRegisterDesc MipsRegDesc[] = { // Descriptors { 6, 0, 0, 0, 0, 0 }, { 2007, 1, 82, 1, 4017, 0 }, { 2010, 1, 1, 1, 4017, 0 }, { 2102, 1, 1, 1, 4017, 0 }, { 1973, 1, 1, 1, 4017, 0 }, { 2027, 8, 1, 2, 32, 4 }, { 2054, 1, 1, 1, 1089, 0 }, { 2071, 1, 1, 1, 1089, 0 }, { 1985, 1, 102, 1, 1089, 0 }, { 1988, 1, 104, 1, 1089, 0 }, { 2061, 1, 1, 1, 1089, 0 }, { 2000, 1, 1, 1, 1089, 0 }, { 1994, 1, 1, 1, 1089, 0 }, { 2038, 1, 1, 1, 1089, 0 }, { 2092, 1, 1, 1, 1089, 0 }, { 2081, 1, 1, 1, 1089, 0 }, { 2019, 1, 1, 1, 1089, 0 }, { 2045, 1, 1, 1, 1089, 0 }, { 1970, 1, 1, 1, 1089, 0 }, { 1967, 1, 106, 1, 1089, 0 }, { 1991, 1, 108, 1, 1089, 0 }, { 1980, 1, 110, 1, 1089, 0 }, { 152, 1, 110, 1, 1089, 0 }, { 365, 1, 110, 1, 1089, 0 }, { 537, 1, 110, 1, 1089, 0 }, { 703, 1, 110, 1, 1089, 0 }, { 155, 190, 110, 9, 1042, 10 }, { 368, 190, 1, 9, 1042, 10 }, { 540, 190, 1, 9, 1042, 10 }, { 706, 190, 1, 9, 1042, 10 }, { 1271, 237, 1, 0, 0, 2 }, { 160, 1, 1, 1, 1153, 0 }, { 373, 1, 1, 1, 1153, 0 }, { 545, 1, 1, 1, 1153, 0 }, { 711, 1, 1, 1, 1153, 0 }, { 1278, 1, 1, 1, 1153, 0 }, { 1412, 1, 1, 1, 1153, 0 }, { 1542, 1, 1, 1, 1153, 0 }, { 1672, 1, 1, 1, 1153, 0 }, { 70, 1, 1, 1, 1153, 0 }, { 283, 1, 1, 1, 1153, 0 }, { 496, 1, 1, 1, 1153, 0 }, { 662, 1, 1, 1, 1153, 0 }, { 820, 1, 1, 1, 1153, 0 }, { 1383, 1, 1, 1, 1153, 0 }, { 1513, 1, 1, 1, 1153, 0 }, { 1643, 1, 1, 1, 1153, 0 }, { 1773, 1, 1, 1, 1153, 0 }, { 1911, 1, 1, 1, 1153, 0 }, { 130, 1, 1, 1, 1153, 0 }, { 343, 1, 1, 1, 1153, 0 }, { 531, 1, 1, 1, 1153, 0 }, { 697, 1, 1, 1, 1153, 0 }, { 842, 1, 1, 1, 1153, 0 }, { 1405, 1, 1, 1, 1153, 0 }, { 1535, 1, 1, 1, 1153, 0 }, { 1665, 1, 1, 1, 1153, 0 }, { 1795, 1, 1, 1, 1153, 0 }, { 1933, 1, 1, 1, 1153, 0 }, { 0, 1, 1, 1, 1153, 0 }, { 213, 1, 1, 1, 1153, 0 }, { 426, 1, 1, 1, 1153, 0 }, { 592, 1, 1, 1, 1153, 0 }, { 750, 1, 1, 1, 1153, 0 }, { 1313, 1, 1, 1, 1153, 0 }, { 1447, 1, 1, 1, 1153, 0 }, { 1577, 1, 1, 1, 1153, 0 }, { 1707, 1, 1, 1, 1153, 0 }, { 1829, 1, 1, 1, 1153, 0 }, { 45, 1, 1, 1, 1153, 0 }, { 258, 1, 1, 1, 1153, 0 }, { 471, 1, 1, 1, 1153, 0 }, { 637, 1, 1, 1, 1153, 0 }, { 795, 1, 1, 1, 1153, 0 }, { 1358, 1, 1, 1, 1153, 0 }, { 1488, 1, 1, 1, 1153, 0 }, { 1618, 1, 1, 1, 1153, 0 }, { 1748, 1, 1, 1, 1153, 0 }, { 1886, 1, 1, 1, 1153, 0 }, { 105, 1, 1, 1, 1153, 0 }, { 318, 1, 1, 1, 1153, 0 }, { 7, 1, 1, 1, 1153, 0 }, { 220, 1, 1, 1, 1153, 0 }, { 433, 1, 1, 1, 1153, 0 }, { 599, 1, 1, 1, 1153, 0 }, { 757, 1, 1, 1, 1153, 0 }, { 1320, 1, 1, 1, 1153, 0 }, { 1454, 1, 1, 1, 1153, 0 }, { 1584, 1, 1, 1, 1153, 0 }, { 1714, 1, 1, 1, 1153, 0 }, { 1836, 1, 1, 1, 1153, 0 }, { 52, 1, 1, 1, 1153, 0 }, { 265, 1, 1, 1, 1153, 0 }, { 478, 1, 1, 1, 1153, 0 }, { 644, 1, 1, 1, 1153, 0 }, { 802, 1, 1, 1, 1153, 0 }, { 1365, 1, 1, 1, 1153, 0 }, { 1495, 1, 1, 1, 1153, 0 }, { 1625, 1, 1, 1, 1153, 0 }, { 1755, 1, 1, 1, 1153, 0 }, { 1893, 1, 1, 1, 1153, 0 }, { 112, 1, 1, 1, 1153, 0 }, { 325, 1, 1, 1, 1153, 0 }, { 164, 14, 1, 9, 994, 10 }, { 377, 17, 1, 9, 994, 10 }, { 549, 20, 1, 9, 994, 10 }, { 715, 23, 1, 9, 994, 10 }, { 1282, 26, 1, 9, 994, 10 }, { 1416, 29, 1, 9, 994, 10 }, { 1546, 32, 1, 9, 994, 10 }, { 1676, 35, 1, 9, 994, 10 }, { 1801, 38, 1, 9, 994, 10 }, { 1939, 41, 1, 9, 994, 10 }, { 14, 44, 1, 9, 994, 10 }, { 227, 47, 1, 9, 994, 10 }, { 440, 50, 1, 9, 994, 10 }, { 606, 53, 1, 9, 994, 10 }, { 764, 56, 1, 9, 994, 10 }, { 1327, 59, 1, 9, 994, 10 }, { 92, 1, 150, 1, 2401, 0 }, { 305, 1, 148, 1, 2401, 0 }, { 518, 1, 146, 1, 2401, 0 }, { 684, 1, 144, 1, 2401, 0 }, { 167, 1, 161, 1, 3985, 0 }, { 380, 1, 165, 1, 3985, 0 }, { 552, 1, 165, 1, 3985, 0 }, { 718, 1, 169, 1, 3985, 0 }, { 1285, 1, 169, 1, 3985, 0 }, { 1419, 1, 173, 1, 3985, 0 }, { 1549, 1, 173, 1, 3985, 0 }, { 1679, 1, 177, 1, 3985, 0 }, { 1804, 1, 177, 1, 3985, 0 }, { 1942, 1, 181, 1, 3985, 0 }, { 18, 1, 181, 1, 3985, 0 }, { 231, 1, 185, 1, 3985, 0 }, { 444, 1, 185, 1, 3985, 0 }, { 610, 1, 189, 1, 3985, 0 }, { 768, 1, 189, 1, 3985, 0 }, { 1331, 1, 193, 1, 3985, 0 }, { 1461, 1, 193, 1, 3985, 0 }, { 1591, 1, 197, 1, 3985, 0 }, { 1721, 1, 197, 1, 3985, 0 }, { 1843, 1, 201, 1, 3985, 0 }, { 59, 1, 201, 1, 3985, 0 }, { 272, 1, 205, 1, 3985, 0 }, { 485, 1, 205, 1, 3985, 0 }, { 651, 1, 209, 1, 3985, 0 }, { 809, 1, 209, 1, 3985, 0 }, { 1372, 1, 213, 1, 3985, 0 }, { 1502, 1, 213, 1, 3985, 0 }, { 1632, 1, 217, 1, 3985, 0 }, { 1762, 1, 217, 1, 3985, 0 }, { 1900, 1, 221, 1, 3985, 0 }, { 119, 1, 221, 1, 3985, 0 }, { 332, 1, 225, 1, 3985, 0 }, { 159, 1, 1, 1, 3985, 0 }, { 372, 1, 1, 1, 3985, 0 }, { 544, 1, 1, 1, 3985, 0 }, { 710, 1, 1, 1, 3985, 0 }, { 1277, 1, 1, 1, 3985, 0 }, { 1411, 1, 1, 1, 3985, 0 }, { 1541, 1, 1, 1, 3985, 0 }, { 1671, 1, 1, 1, 3985, 0 }, { 191, 1, 1, 1, 3985, 0 }, { 404, 1, 1, 1, 3985, 0 }, { 573, 1, 1, 1, 3985, 0 }, { 731, 1, 1, 1, 3985, 0 }, { 1294, 1, 1, 1, 3985, 0 }, { 1428, 1, 1, 1, 3985, 0 }, { 1558, 1, 1, 1, 3985, 0 }, { 1688, 1, 1, 1, 3985, 0 }, { 1813, 1, 1, 1, 3985, 0 }, { 1951, 1, 1, 1, 3985, 0 }, { 29, 1, 1, 1, 3985, 0 }, { 242, 1, 1, 1, 3985, 0 }, { 455, 1, 1, 1, 3985, 0 }, { 621, 1, 1, 1, 3985, 0 }, { 779, 1, 1, 1, 3985, 0 }, { 1342, 1, 1, 1, 3985, 0 }, { 1472, 1, 1, 1, 3985, 0 }, { 1602, 1, 1, 1, 3985, 0 }, { 1732, 1, 1, 1, 3985, 0 }, { 1854, 1, 1, 1, 3985, 0 }, { 76, 1, 1, 1, 3985, 0 }, { 289, 1, 1, 1, 3985, 0 }, { 502, 1, 1, 1, 3985, 0 }, { 668, 1, 1, 1, 3985, 0 }, { 826, 1, 1, 1, 3985, 0 }, { 1389, 1, 1, 1, 3985, 0 }, { 1519, 1, 1, 1, 3985, 0 }, { 1649, 1, 1, 1, 3985, 0 }, { 1779, 1, 1, 1, 3985, 0 }, { 1917, 1, 1, 1, 3985, 0 }, { 136, 1, 1, 1, 3985, 0 }, { 349, 1, 1, 1, 3985, 0 }, { 1253, 136, 1, 0, 1184, 2 }, { 170, 1, 158, 1, 3953, 0 }, { 383, 1, 158, 1, 3953, 0 }, { 555, 1, 158, 1, 3953, 0 }, { 721, 1, 158, 1, 3953, 0 }, { 1288, 1, 158, 1, 3953, 0 }, { 1422, 1, 158, 1, 3953, 0 }, { 1552, 1, 158, 1, 3953, 0 }, { 1682, 1, 158, 1, 3953, 0 }, { 1807, 1, 158, 1, 3953, 0 }, { 1945, 1, 158, 1, 3953, 0 }, { 22, 1, 158, 1, 3953, 0 }, { 235, 1, 158, 1, 3953, 0 }, { 448, 1, 158, 1, 3953, 0 }, { 614, 1, 158, 1, 3953, 0 }, { 772, 1, 158, 1, 3953, 0 }, { 1335, 1, 158, 1, 3953, 0 }, { 1465, 1, 158, 1, 3953, 0 }, { 1595, 1, 158, 1, 3953, 0 }, { 1725, 1, 158, 1, 3953, 0 }, { 1847, 1, 158, 1, 3953, 0 }, { 63, 1, 158, 1, 3953, 0 }, { 276, 1, 158, 1, 3953, 0 }, { 489, 1, 158, 1, 3953, 0 }, { 655, 1, 158, 1, 3953, 0 }, { 813, 1, 158, 1, 3953, 0 }, { 1376, 1, 158, 1, 3953, 0 }, { 1506, 1, 158, 1, 3953, 0 }, { 1636, 1, 158, 1, 3953, 0 }, { 1766, 1, 158, 1, 3953, 0 }, { 1904, 1, 158, 1, 3953, 0 }, { 123, 1, 158, 1, 3953, 0 }, { 336, 1, 158, 1, 3953, 0 }, { 1259, 128, 1, 0, 1216, 2 }, { 172, 1, 233, 1, 1826, 0 }, { 385, 1, 134, 1, 1826, 0 }, { 557, 1, 134, 1, 1826, 0 }, { 723, 1, 134, 1, 1826, 0 }, { 196, 1, 1, 1, 3921, 0 }, { 409, 1, 1, 1, 3921, 0 }, { 578, 1, 1, 1, 3921, 0 }, { 736, 1, 1, 1, 3921, 0 }, { 1299, 1, 1, 1, 3921, 0 }, { 1433, 1, 1, 1, 3921, 0 }, { 1563, 1, 1, 1, 3921, 0 }, { 1693, 1, 1, 1, 3921, 0 }, { 1818, 1, 1, 1, 3921, 0 }, { 1956, 1, 1, 1, 3921, 0 }, { 35, 1, 1, 1, 3921, 0 }, { 248, 1, 1, 1, 3921, 0 }, { 461, 1, 1, 1, 3921, 0 }, { 627, 1, 1, 1, 3921, 0 }, { 785, 1, 1, 1, 3921, 0 }, { 1348, 1, 1, 1, 3921, 0 }, { 1478, 1, 1, 1, 3921, 0 }, { 1608, 1, 1, 1, 3921, 0 }, { 1738, 1, 1, 1, 3921, 0 }, { 1860, 1, 1, 1, 3921, 0 }, { 82, 1, 1, 1, 3921, 0 }, { 295, 1, 1, 1, 3921, 0 }, { 508, 1, 1, 1, 3921, 0 }, { 674, 1, 1, 1, 3921, 0 }, { 832, 1, 1, 1, 3921, 0 }, { 1395, 1, 1, 1, 3921, 0 }, { 1525, 1, 1, 1, 3921, 0 }, { 1655, 1, 1, 1, 3921, 0 }, { 1785, 1, 1, 1, 3921, 0 }, { 1923, 1, 1, 1, 3921, 0 }, { 142, 1, 1, 1, 3921, 0 }, { 355, 1, 1, 1, 3921, 0 }, { 176, 1, 100, 1, 3921, 0 }, { 389, 1, 100, 1, 3921, 0 }, { 184, 1, 229, 1, 1794, 0 }, { 397, 1, 126, 1, 1794, 0 }, { 566, 1, 126, 1, 1794, 0 }, { 727, 1, 126, 1, 1794, 0 }, { 179, 1, 1, 1, 3889, 0 }, { 392, 1, 1, 1, 3889, 0 }, { 561, 1, 1, 1, 3889, 0 }, { 188, 1, 1, 1, 3889, 0 }, { 401, 1, 1, 1, 3889, 0 }, { 570, 1, 1, 1, 3889, 0 }, { 1239, 124, 1, 0, 1248, 2 }, { 201, 1, 98, 1, 3857, 0 }, { 414, 1, 98, 1, 3857, 0 }, { 583, 1, 98, 1, 3857, 0 }, { 741, 1, 98, 1, 3857, 0 }, { 1304, 1, 98, 1, 3857, 0 }, { 1438, 1, 98, 1, 3857, 0 }, { 1568, 1, 98, 1, 3857, 0 }, { 1698, 1, 98, 1, 3857, 0 }, { 1265, 122, 1, 0, 1280, 2 }, { 204, 1, 96, 1, 3825, 0 }, { 417, 1, 96, 1, 3825, 0 }, { 586, 1, 96, 1, 3825, 0 }, { 744, 1, 96, 1, 3825, 0 }, { 1307, 1, 96, 1, 3825, 0 }, { 1441, 1, 96, 1, 3825, 0 }, { 1571, 1, 96, 1, 3825, 0 }, { 1701, 1, 96, 1, 3825, 0 }, { 1823, 1, 96, 1, 3825, 0 }, { 1961, 1, 96, 1, 3825, 0 }, { 207, 1, 96, 1, 3825, 0 }, { 420, 1, 96, 1, 3825, 0 }, { 210, 92, 1, 8, 1425, 10 }, { 423, 92, 1, 8, 1425, 10 }, { 589, 92, 1, 8, 1425, 10 }, { 747, 92, 1, 8, 1425, 10 }, { 1310, 92, 1, 8, 1425, 10 }, { 1444, 92, 1, 8, 1425, 10 }, { 1574, 92, 1, 8, 1425, 10 }, { 1704, 92, 1, 8, 1425, 10 }, { 1826, 92, 1, 8, 1425, 10 }, { 1964, 92, 1, 8, 1425, 10 }, { 41, 92, 1, 8, 1425, 10 }, { 254, 92, 1, 8, 1425, 10 }, { 467, 92, 1, 8, 1425, 10 }, { 633, 92, 1, 8, 1425, 10 }, { 791, 92, 1, 8, 1425, 10 }, { 1354, 92, 1, 8, 1425, 10 }, { 1484, 92, 1, 8, 1425, 10 }, { 1614, 92, 1, 8, 1425, 10 }, { 1744, 92, 1, 8, 1425, 10 }, { 1866, 92, 1, 8, 1425, 10 }, { 88, 92, 1, 8, 1425, 10 }, { 301, 92, 1, 8, 1425, 10 }, { 514, 92, 1, 8, 1425, 10 }, { 680, 92, 1, 8, 1425, 10 }, { 838, 92, 1, 8, 1425, 10 }, { 1401, 92, 1, 8, 1425, 10 }, { 1531, 92, 1, 8, 1425, 10 }, { 1661, 92, 1, 8, 1425, 10 }, { 1791, 92, 1, 8, 1425, 10 }, { 1929, 92, 1, 8, 1425, 10 }, { 148, 92, 1, 8, 1425, 10 }, { 361, 92, 1, 8, 1425, 10 }, { 1245, 118, 1, 0, 1921, 2 }, { 869, 118, 1, 0, 1921, 2 }, { 947, 118, 1, 0, 1921, 2 }, { 997, 118, 1, 0, 1921, 2 }, { 1035, 118, 1, 0, 1921, 2 }, { 875, 130, 1, 12, 656, 10 }, { 882, 93, 159, 9, 1377, 10 }, { 953, 93, 159, 9, 1377, 10 }, { 1003, 93, 159, 9, 1377, 10 }, { 1041, 93, 159, 9, 1377, 10 }, { 1073, 93, 159, 9, 1377, 10 }, { 1105, 93, 159, 9, 1377, 10 }, { 1137, 93, 159, 9, 1377, 10 }, { 1169, 93, 159, 9, 1377, 10 }, { 1201, 93, 159, 9, 1377, 10 }, { 1227, 93, 159, 9, 1377, 10 }, { 848, 93, 159, 9, 1377, 10 }, { 926, 93, 159, 9, 1377, 10 }, { 983, 93, 159, 9, 1377, 10 }, { 1021, 93, 159, 9, 1377, 10 }, { 1059, 93, 159, 9, 1377, 10 }, { 1091, 93, 159, 9, 1377, 10 }, { 1123, 93, 159, 9, 1377, 10 }, { 1155, 93, 159, 9, 1377, 10 }, { 1187, 93, 159, 9, 1377, 10 }, { 1213, 93, 159, 9, 1377, 10 }, { 855, 93, 159, 9, 1377, 10 }, { 933, 93, 159, 9, 1377, 10 }, { 990, 93, 159, 9, 1377, 10 }, { 1028, 93, 159, 9, 1377, 10 }, { 1066, 93, 159, 9, 1377, 10 }, { 1098, 93, 159, 9, 1377, 10 }, { 1130, 93, 159, 9, 1377, 10 }, { 1162, 93, 159, 9, 1377, 10 }, { 1194, 93, 159, 9, 1377, 10 }, { 1220, 93, 159, 9, 1377, 10 }, { 862, 93, 159, 9, 1377, 10 }, { 940, 93, 159, 9, 1377, 10 }, { 1870, 1, 116, 1, 1120, 0 }, { 888, 138, 235, 0, 1344, 2 }, { 895, 152, 1, 0, 2241, 2 }, { 959, 152, 1, 0, 2241, 2 }, { 901, 152, 231, 0, 1312, 2 }, { 908, 154, 1, 0, 2273, 2 }, { 965, 154, 1, 0, 2273, 2 }, { 1009, 154, 1, 0, 2273, 2 }, { 1047, 154, 1, 0, 2273, 2 }, { 1079, 154, 1, 0, 2273, 2 }, { 1111, 154, 1, 0, 2273, 2 }, { 1143, 154, 1, 0, 2273, 2 }, { 1175, 154, 1, 0, 2273, 2 }, { 914, 156, 1, 0, 2273, 2 }, { 971, 156, 1, 0, 2273, 2 }, { 1015, 156, 1, 0, 2273, 2 }, { 1053, 156, 1, 0, 2273, 2 }, { 1085, 156, 1, 0, 2273, 2 }, { 1117, 156, 1, 0, 2273, 2 }, { 1149, 156, 1, 0, 2273, 2 }, { 1181, 156, 1, 0, 2273, 2 }, { 1207, 156, 1, 0, 2273, 2 }, { 1233, 156, 1, 0, 2273, 2 }, { 920, 156, 1, 0, 2273, 2 }, { 977, 156, 1, 0, 2273, 2 }, }; // OddSP Register Class... static MCPhysReg OddSP[] = { Mips_F1, Mips_F3, Mips_F5, Mips_F7, Mips_F9, Mips_F11, Mips_F13, Mips_F15, Mips_F17, Mips_F19, Mips_F21, Mips_F23, Mips_F25, Mips_F27, Mips_F29, Mips_F31, Mips_F_HI1, Mips_F_HI3, Mips_F_HI5, Mips_F_HI7, Mips_F_HI9, Mips_F_HI11, Mips_F_HI13, Mips_F_HI15, Mips_F_HI17, Mips_F_HI19, Mips_F_HI21, Mips_F_HI23, Mips_F_HI25, Mips_F_HI27, Mips_F_HI29, Mips_F_HI31, Mips_D1, Mips_D3, Mips_D5, Mips_D7, Mips_D9, Mips_D11, Mips_D13, Mips_D15, Mips_D1_64, Mips_D3_64, Mips_D5_64, Mips_D7_64, Mips_D9_64, Mips_D11_64, Mips_D13_64, Mips_D15_64, Mips_D17_64, Mips_D19_64, Mips_D21_64, Mips_D23_64, Mips_D25_64, Mips_D27_64, Mips_D29_64, Mips_D31_64, }; // OddSP Bit set. static uint8_t OddSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x50, 0x55, 0x55, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0xaa, 0xaa, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x55, 0x55, 0x01, }; // CCR Register Class... static MCPhysReg CCR[] = { Mips_FCR0, Mips_FCR1, Mips_FCR2, Mips_FCR3, Mips_FCR4, Mips_FCR5, Mips_FCR6, Mips_FCR7, Mips_FCR8, Mips_FCR9, Mips_FCR10, Mips_FCR11, Mips_FCR12, Mips_FCR13, Mips_FCR14, Mips_FCR15, Mips_FCR16, Mips_FCR17, Mips_FCR18, Mips_FCR19, Mips_FCR20, Mips_FCR21, Mips_FCR22, Mips_FCR23, Mips_FCR24, Mips_FCR25, Mips_FCR26, Mips_FCR27, Mips_FCR28, Mips_FCR29, Mips_FCR30, Mips_FCR31, }; // CCR Bit set. static uint8_t CCRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // COP2 Register Class... static MCPhysReg COP2[] = { Mips_COP20, Mips_COP21, Mips_COP22, Mips_COP23, Mips_COP24, Mips_COP25, Mips_COP26, Mips_COP27, Mips_COP28, Mips_COP29, Mips_COP210, Mips_COP211, Mips_COP212, Mips_COP213, Mips_COP214, Mips_COP215, Mips_COP216, Mips_COP217, Mips_COP218, Mips_COP219, Mips_COP220, Mips_COP221, Mips_COP222, Mips_COP223, Mips_COP224, Mips_COP225, Mips_COP226, Mips_COP227, Mips_COP228, Mips_COP229, Mips_COP230, Mips_COP231, }; // COP2 Bit set. static uint8_t COP2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x01, 0xf8, 0xff, 0xff, 0x01, }; // COP3 Register Class... static MCPhysReg COP3[] = { Mips_COP30, Mips_COP31, Mips_COP32, Mips_COP33, Mips_COP34, Mips_COP35, Mips_COP36, Mips_COP37, Mips_COP38, Mips_COP39, Mips_COP310, Mips_COP311, Mips_COP312, Mips_COP313, Mips_COP314, Mips_COP315, Mips_COP316, Mips_COP317, Mips_COP318, Mips_COP319, Mips_COP320, Mips_COP321, Mips_COP322, Mips_COP323, Mips_COP324, Mips_COP325, Mips_COP326, Mips_COP327, Mips_COP328, Mips_COP329, Mips_COP330, Mips_COP331, }; // COP3 Bit set. static uint8_t COP3Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0x00, 0xfe, 0xff, 0x7f, }; // DSPR Register Class... static MCPhysReg DSPR[] = { Mips_ZERO, Mips_AT, Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, Mips_T0, Mips_T1, Mips_T2, Mips_T3, Mips_T4, Mips_T5, Mips_T6, Mips_T7, Mips_S0, Mips_S1, Mips_S2, Mips_S3, Mips_S4, Mips_S5, Mips_S6, Mips_S7, Mips_T8, Mips_T9, Mips_K0, Mips_K1, Mips_GP, Mips_SP, Mips_FP, Mips_RA, }; // DSPR Bit set. static uint8_t DSPRBits[] = { 0x02, 0x03, 0xf8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0xc0, 0xbf, 0xff, 0x07, }; // FGR32 Register Class... static MCPhysReg FGR32[] = { Mips_F0, Mips_F1, Mips_F2, Mips_F3, Mips_F4, Mips_F5, Mips_F6, Mips_F7, Mips_F8, Mips_F9, Mips_F10, Mips_F11, Mips_F12, Mips_F13, Mips_F14, Mips_F15, Mips_F16, Mips_F17, Mips_F18, Mips_F19, Mips_F20, Mips_F21, Mips_F22, Mips_F23, Mips_F24, Mips_F25, Mips_F26, Mips_F27, Mips_F28, Mips_F29, Mips_F30, Mips_F31, }; // FGR32 Bit set. static uint8_t FGR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // FGRCC Register Class... static MCPhysReg FGRCC[] = { Mips_F0, Mips_F1, Mips_F2, Mips_F3, Mips_F4, Mips_F5, Mips_F6, Mips_F7, Mips_F8, Mips_F9, Mips_F10, Mips_F11, Mips_F12, Mips_F13, Mips_F14, Mips_F15, Mips_F16, Mips_F17, Mips_F18, Mips_F19, Mips_F20, Mips_F21, Mips_F22, Mips_F23, Mips_F24, Mips_F25, Mips_F26, Mips_F27, Mips_F28, Mips_F29, Mips_F30, Mips_F31, }; // FGRCC Bit set. static uint8_t FGRCCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // FGRH32 Register Class... static MCPhysReg FGRH32[] = { Mips_F_HI0, Mips_F_HI1, Mips_F_HI2, Mips_F_HI3, Mips_F_HI4, Mips_F_HI5, Mips_F_HI6, Mips_F_HI7, Mips_F_HI8, Mips_F_HI9, Mips_F_HI10, Mips_F_HI11, Mips_F_HI12, Mips_F_HI13, Mips_F_HI14, Mips_F_HI15, Mips_F_HI16, Mips_F_HI17, Mips_F_HI18, Mips_F_HI19, Mips_F_HI20, Mips_F_HI21, Mips_F_HI22, Mips_F_HI23, Mips_F_HI24, Mips_F_HI25, Mips_F_HI26, Mips_F_HI27, Mips_F_HI28, Mips_F_HI29, Mips_F_HI30, Mips_F_HI31, }; // FGRH32 Bit set. static uint8_t FGRH32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // GPR32 Register Class... static MCPhysReg GPR32[] = { Mips_ZERO, Mips_AT, Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, Mips_T0, Mips_T1, Mips_T2, Mips_T3, Mips_T4, Mips_T5, Mips_T6, Mips_T7, Mips_S0, Mips_S1, Mips_S2, Mips_S3, Mips_S4, Mips_S5, Mips_S6, Mips_S7, Mips_T8, Mips_T9, Mips_K0, Mips_K1, Mips_GP, Mips_SP, Mips_FP, Mips_RA, }; // GPR32 Bit set. static uint8_t GPR32Bits[] = { 0x02, 0x03, 0xf8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0xc0, 0xbf, 0xff, 0x07, }; // HWRegs Register Class... static MCPhysReg HWRegs[] = { Mips_HWR0, Mips_HWR1, Mips_HWR2, Mips_HWR3, Mips_HWR4, Mips_HWR5, Mips_HWR6, Mips_HWR7, Mips_HWR8, Mips_HWR9, Mips_HWR10, Mips_HWR11, Mips_HWR12, Mips_HWR13, Mips_HWR14, Mips_HWR15, Mips_HWR16, Mips_HWR17, Mips_HWR18, Mips_HWR19, Mips_HWR20, Mips_HWR21, Mips_HWR22, Mips_HWR23, Mips_HWR24, Mips_HWR25, Mips_HWR26, Mips_HWR27, Mips_HWR28, Mips_HWR29, Mips_HWR30, Mips_HWR31, }; // HWRegs Bit set. static uint8_t HWRegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, }; // OddSP_with_sub_hi Register Class... static MCPhysReg OddSP_with_sub_hi[] = { Mips_D1, Mips_D3, Mips_D5, Mips_D7, Mips_D9, Mips_D11, Mips_D13, Mips_D15, Mips_D1_64, Mips_D3_64, Mips_D5_64, Mips_D7_64, Mips_D9_64, Mips_D11_64, Mips_D13_64, Mips_D15_64, Mips_D17_64, Mips_D19_64, Mips_D21_64, Mips_D23_64, Mips_D25_64, Mips_D27_64, Mips_D29_64, Mips_D31_64, }; // OddSP_with_sub_hi Bit set. static uint8_t OddSP_with_sub_hiBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x55, 0x55, 0x01, }; // FGR32_and_OddSP Register Class... static MCPhysReg FGR32_and_OddSP[] = { Mips_F1, Mips_F3, Mips_F5, Mips_F7, Mips_F9, Mips_F11, Mips_F13, Mips_F15, Mips_F17, Mips_F19, Mips_F21, Mips_F23, Mips_F25, Mips_F27, Mips_F29, Mips_F31, }; // FGR32_and_OddSP Bit set. static uint8_t FGR32_and_OddSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x55, 0x55, 0x05, }; // FGRH32_and_OddSP Register Class... static MCPhysReg FGRH32_and_OddSP[] = { Mips_F_HI1, Mips_F_HI3, Mips_F_HI5, Mips_F_HI7, Mips_F_HI9, Mips_F_HI11, Mips_F_HI13, Mips_F_HI15, Mips_F_HI17, Mips_F_HI19, Mips_F_HI21, Mips_F_HI23, Mips_F_HI25, Mips_F_HI27, Mips_F_HI29, Mips_F_HI31, }; // FGRH32_and_OddSP Bit set. static uint8_t FGRH32_and_OddSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0xaa, 0xaa, 0x0a, }; // OddSP_with_sub_hi_with_sub_hi_in_FGRH32 Register Class... static MCPhysReg OddSP_with_sub_hi_with_sub_hi_in_FGRH32[] = { Mips_D1_64, Mips_D3_64, Mips_D5_64, Mips_D7_64, Mips_D9_64, Mips_D11_64, Mips_D13_64, Mips_D15_64, Mips_D17_64, Mips_D19_64, Mips_D21_64, Mips_D23_64, Mips_D25_64, Mips_D27_64, Mips_D29_64, Mips_D31_64, }; // OddSP_with_sub_hi_with_sub_hi_in_FGRH32 Bit set. static uint8_t OddSP_with_sub_hi_with_sub_hi_in_FGRH32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x55, 0x55, 0x01, }; // CPU16RegsPlusSP Register Class... static MCPhysReg CPU16RegsPlusSP[] = { Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, Mips_S0, Mips_S1, Mips_SP, }; // CPU16RegsPlusSP Bit set. static uint8_t CPU16RegsPlusSPBits[] = { 0x00, 0x00, 0xd0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x06, }; // CC Register Class... static MCPhysReg CC[] = { Mips_CC0, Mips_CC1, Mips_CC2, Mips_CC3, Mips_CC4, Mips_CC5, Mips_CC6, Mips_CC7, }; // CC Bit set. static uint8_t CCBits[] = { 0x00, 0x00, 0x00, 0x80, 0x7f, }; // CPU16Regs Register Class... static MCPhysReg CPU16Regs[] = { Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, Mips_S0, Mips_S1, }; // CPU16Regs Bit set. static uint8_t CPU16RegsBits[] = { 0x00, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x06, }; // FCC Register Class... static MCPhysReg FCC[] = { Mips_FCC0, Mips_FCC1, Mips_FCC2, Mips_FCC3, Mips_FCC4, Mips_FCC5, Mips_FCC6, Mips_FCC7, }; // FCC Bit set. static uint8_t FCCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, }; // GPRMM16 Register Class... static MCPhysReg GPRMM16[] = { Mips_S0, Mips_S1, Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, }; // GPRMM16 Bit set. static uint8_t GPRMM16Bits[] = { 0x00, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x06, }; // GPRMM16MoveP Register Class... static MCPhysReg GPRMM16MoveP[] = { Mips_ZERO, Mips_S1, Mips_V0, Mips_V1, Mips_S0, Mips_S2, Mips_S3, Mips_S4, }; // GPRMM16MoveP Bit set. static uint8_t GPRMM16MovePBits[] = { 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x06, }; // GPRMM16Zero Register Class... static MCPhysReg GPRMM16Zero[] = { Mips_ZERO, Mips_S1, Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, }; // GPRMM16Zero Bit set. static uint8_t GPRMM16ZeroBits[] = { 0x00, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x06, }; // MSACtrl Register Class... static MCPhysReg MSACtrl[] = { Mips_MSAIR, Mips_MSACSR, Mips_MSAAccess, Mips_MSASave, Mips_MSAModify, Mips_MSARequest, Mips_MSAMap, Mips_MSAUnmap, }; // MSACtrl Bit set. static uint8_t MSACtrlBits[] = { 0x00, 0xfc, 0x03, }; // OddSP_with_sub_hi_with_sub_hi_in_FGR32 Register Class... static MCPhysReg OddSP_with_sub_hi_with_sub_hi_in_FGR32[] = { Mips_D1, Mips_D3, Mips_D5, Mips_D7, Mips_D9, Mips_D11, Mips_D13, Mips_D15, }; // OddSP_with_sub_hi_with_sub_hi_in_FGR32 Bit set. static uint8_t OddSP_with_sub_hi_with_sub_hi_in_FGR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, }; // CPU16Regs_and_GPRMM16Zero Register Class... static MCPhysReg CPU16Regs_and_GPRMM16Zero[] = { Mips_S1, Mips_V0, Mips_V1, Mips_A0, Mips_A1, Mips_A2, Mips_A3, }; // CPU16Regs_and_GPRMM16Zero Bit set. static uint8_t CPU16Regs_and_GPRMM16ZeroBits[] = { 0x00, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x06, }; // CPU16Regs_and_GPRMM16MoveP Register Class... static MCPhysReg CPU16Regs_and_GPRMM16MoveP[] = { Mips_S1, Mips_V0, Mips_V1, Mips_S0, }; // CPU16Regs_and_GPRMM16MoveP Bit set. static uint8_t CPU16Regs_and_GPRMM16MovePBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x06, }; // GPRMM16MoveP_and_GPRMM16Zero Register Class... static MCPhysReg GPRMM16MoveP_and_GPRMM16Zero[] = { Mips_ZERO, Mips_S1, Mips_V0, Mips_V1, }; // GPRMM16MoveP_and_GPRMM16Zero Bit set. static uint8_t GPRMM16MoveP_and_GPRMM16ZeroBits[] = { 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x06, }; // HI32DSP Register Class... static MCPhysReg HI32DSP[] = { Mips_HI0, Mips_HI1, Mips_HI2, Mips_HI3, }; // HI32DSP Bit set. static uint8_t HI32DSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, }; // LO32DSP Register Class... static MCPhysReg LO32DSP[] = { Mips_LO0, Mips_LO1, Mips_LO2, Mips_LO3, }; // LO32DSP Bit set. static uint8_t LO32DSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, }; // GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero Register Class... static MCPhysReg GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero[] = { Mips_S1, Mips_V0, Mips_V1, }; // GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero Bit set. static uint8_t GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x06, }; // CPURAReg Register Class... static MCPhysReg CPURAReg[] = { Mips_RA, }; // CPURAReg Bit set. static uint8_t CPURARegBits[] = { 0x00, 0x00, 0x08, }; // CPUSPReg Register Class... static MCPhysReg CPUSPReg[] = { Mips_SP, }; // CPUSPReg Bit set. static uint8_t CPUSPRegBits[] = { 0x00, 0x00, 0x10, }; // DSPCC Register Class... static MCPhysReg DSPCC[] = { Mips_DSPCCond, }; // DSPCC Bit set. static uint8_t DSPCCBits[] = { 0x04, }; // HI32 Register Class... static MCPhysReg HI32[] = { Mips_HI0, }; // HI32 Bit set. static uint8_t HI32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, }; // LO32 Register Class... static MCPhysReg LO32[] = { Mips_LO0, }; // LO32 Bit set. static uint8_t LO32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, }; // FGR64 Register Class... static MCPhysReg FGR64[] = { Mips_D0_64, Mips_D1_64, Mips_D2_64, Mips_D3_64, Mips_D4_64, Mips_D5_64, Mips_D6_64, Mips_D7_64, Mips_D8_64, Mips_D9_64, Mips_D10_64, Mips_D11_64, Mips_D12_64, Mips_D13_64, Mips_D14_64, Mips_D15_64, Mips_D16_64, Mips_D17_64, Mips_D18_64, Mips_D19_64, Mips_D20_64, Mips_D21_64, Mips_D22_64, Mips_D23_64, Mips_D24_64, Mips_D25_64, Mips_D26_64, Mips_D27_64, Mips_D28_64, Mips_D29_64, Mips_D30_64, Mips_D31_64, }; // FGR64 Bit set. static uint8_t FGR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, }; // GPR64 Register Class... static MCPhysReg GPR64[] = { Mips_ZERO_64, Mips_AT_64, Mips_V0_64, Mips_V1_64, Mips_A0_64, Mips_A1_64, Mips_A2_64, Mips_A3_64, Mips_T0_64, Mips_T1_64, Mips_T2_64, Mips_T3_64, Mips_T4_64, Mips_T5_64, Mips_T6_64, Mips_T7_64, Mips_S0_64, Mips_S1_64, Mips_S2_64, Mips_S3_64, Mips_S4_64, Mips_S5_64, Mips_S6_64, Mips_S7_64, Mips_T8_64, Mips_T9_64, Mips_K0_64, Mips_K1_64, Mips_GP_64, Mips_SP_64, Mips_FP_64, Mips_RA_64, }; // GPR64 Bit set. static uint8_t GPR64Bits[] = { 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0xd8, 0xff, 0xff, 0x03, }; // AFGR64 Register Class... static MCPhysReg AFGR64[] = { Mips_D0, Mips_D1, Mips_D2, Mips_D3, Mips_D4, Mips_D5, Mips_D6, Mips_D7, Mips_D8, Mips_D9, Mips_D10, Mips_D11, Mips_D12, Mips_D13, Mips_D14, Mips_D15, }; // AFGR64 Bit set. static uint8_t AFGR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, }; // FGR64_and_OddSP Register Class... static MCPhysReg FGR64_and_OddSP[] = { Mips_D1_64, Mips_D3_64, Mips_D5_64, Mips_D7_64, Mips_D9_64, Mips_D11_64, Mips_D13_64, Mips_D15_64, Mips_D17_64, Mips_D19_64, Mips_D21_64, Mips_D23_64, Mips_D25_64, Mips_D27_64, Mips_D29_64, Mips_D31_64, }; // FGR64_and_OddSP Bit set. static uint8_t FGR64_and_OddSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x55, 0x55, 0x01, }; // GPR64_with_sub_32_in_CPU16RegsPlusSP Register Class... static MCPhysReg GPR64_with_sub_32_in_CPU16RegsPlusSP[] = { Mips_V0_64, Mips_V1_64, Mips_A0_64, Mips_A1_64, Mips_A2_64, Mips_A3_64, Mips_S0_64, Mips_S1_64, Mips_SP_64, }; // GPR64_with_sub_32_in_CPU16RegsPlusSP Bit set. static uint8_t GPR64_with_sub_32_in_CPU16RegsPlusSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x03, }; // AFGR64_and_OddSP Register Class... static MCPhysReg AFGR64_and_OddSP[] = { Mips_D1, Mips_D3, Mips_D5, Mips_D7, Mips_D9, Mips_D11, Mips_D13, Mips_D15, }; // AFGR64_and_OddSP Bit set. static uint8_t AFGR64_and_OddSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, }; // GPR64_with_sub_32_in_CPU16Regs Register Class... static MCPhysReg GPR64_with_sub_32_in_CPU16Regs[] = { Mips_V0_64, Mips_V1_64, Mips_A0_64, Mips_A1_64, Mips_A2_64, Mips_A3_64, Mips_S0_64, Mips_S1_64, }; // GPR64_with_sub_32_in_CPU16Regs Bit set. static uint8_t GPR64_with_sub_32_in_CPU16RegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x03, }; // GPR64_with_sub_32_in_GPRMM16MoveP Register Class... static MCPhysReg GPR64_with_sub_32_in_GPRMM16MoveP[] = { Mips_ZERO_64, Mips_V0_64, Mips_V1_64, Mips_S0_64, Mips_S1_64, Mips_S2_64, Mips_S3_64, Mips_S4_64, }; // GPR64_with_sub_32_in_GPRMM16MoveP Bit set. static uint8_t GPR64_with_sub_32_in_GPRMM16MovePBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x03, }; // GPR64_with_sub_32_in_GPRMM16Zero Register Class... static MCPhysReg GPR64_with_sub_32_in_GPRMM16Zero[] = { Mips_ZERO_64, Mips_V0_64, Mips_V1_64, Mips_A0_64, Mips_A1_64, Mips_A2_64, Mips_A3_64, Mips_S1_64, }; // GPR64_with_sub_32_in_GPRMM16Zero Bit set. static uint8_t GPR64_with_sub_32_in_GPRMM16ZeroBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x03, }; // GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16Zero Register Class... static MCPhysReg GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16Zero[] = { Mips_V0_64, Mips_V1_64, Mips_A0_64, Mips_A1_64, Mips_A2_64, Mips_A3_64, Mips_S1_64, }; // GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16Zero Bit set. static uint8_t GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x03, }; // ACC64DSP Register Class... static MCPhysReg ACC64DSP[] = { Mips_AC0, Mips_AC1, Mips_AC2, Mips_AC3, }; // ACC64DSP Bit set. static uint8_t ACC64DSPBits[] = { 0x00, 0x00, 0x00, 0x3c, }; // GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MoveP Register Class... static MCPhysReg GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MoveP[] = { Mips_V0_64, Mips_V1_64, Mips_S0_64, Mips_S1_64, }; // GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MoveP Bit set. static uint8_t GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x03, }; // GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16Zero Register Class... static MCPhysReg GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16Zero[] = { Mips_ZERO_64, Mips_V0_64, Mips_V1_64, Mips_S1_64, }; // GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16Zero Bit set. static uint8_t GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x03, }; // GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero Register Class... static MCPhysReg GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero[] = { Mips_V0_64, Mips_V1_64, Mips_S1_64, }; // GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero Bit set. static uint8_t GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x03, }; // OCTEON_MPL Register Class... static MCPhysReg OCTEON_MPL[] = { Mips_MPL0, Mips_MPL1, Mips_MPL2, }; // OCTEON_MPL Bit set. static uint8_t OCTEON_MPLBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x03, }; // OCTEON_P Register Class... static MCPhysReg OCTEON_P[] = { Mips_P0, Mips_P1, Mips_P2, }; // OCTEON_P Bit set. static uint8_t OCTEON_PBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, }; // ACC64 Register Class... static MCPhysReg ACC64[] = { Mips_AC0, }; // ACC64 Bit set. static uint8_t ACC64Bits[] = { 0x00, 0x00, 0x00, 0x04, }; // GPR64_with_sub_32_in_CPURAReg Register Class... static MCPhysReg GPR64_with_sub_32_in_CPURAReg[] = { Mips_RA_64, }; // GPR64_with_sub_32_in_CPURAReg Bit set. static uint8_t GPR64_with_sub_32_in_CPURARegBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, }; // GPR64_with_sub_32_in_CPUSPReg Register Class... static MCPhysReg GPR64_with_sub_32_in_CPUSPReg[] = { Mips_SP_64, }; // GPR64_with_sub_32_in_CPUSPReg Bit set. static uint8_t GPR64_with_sub_32_in_CPUSPRegBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, }; // HI64 Register Class... static MCPhysReg HI64[] = { Mips_HI0_64, }; // HI64 Bit set. static uint8_t HI64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, }; // LO64 Register Class... static MCPhysReg LO64[] = { Mips_LO0_64, }; // LO64 Bit set. static uint8_t LO64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, }; // MSA128B Register Class... static MCPhysReg MSA128B[] = { Mips_W0, Mips_W1, Mips_W2, Mips_W3, Mips_W4, Mips_W5, Mips_W6, Mips_W7, Mips_W8, Mips_W9, Mips_W10, Mips_W11, Mips_W12, Mips_W13, Mips_W14, Mips_W15, Mips_W16, Mips_W17, Mips_W18, Mips_W19, Mips_W20, Mips_W21, Mips_W22, Mips_W23, Mips_W24, Mips_W25, Mips_W26, Mips_W27, Mips_W28, Mips_W29, Mips_W30, Mips_W31, }; // MSA128B Bit set. static uint8_t MSA128BBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // MSA128D Register Class... static MCPhysReg MSA128D[] = { Mips_W0, Mips_W1, Mips_W2, Mips_W3, Mips_W4, Mips_W5, Mips_W6, Mips_W7, Mips_W8, Mips_W9, Mips_W10, Mips_W11, Mips_W12, Mips_W13, Mips_W14, Mips_W15, Mips_W16, Mips_W17, Mips_W18, Mips_W19, Mips_W20, Mips_W21, Mips_W22, Mips_W23, Mips_W24, Mips_W25, Mips_W26, Mips_W27, Mips_W28, Mips_W29, Mips_W30, Mips_W31, }; // MSA128D Bit set. static uint8_t MSA128DBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // MSA128H Register Class... static MCPhysReg MSA128H[] = { Mips_W0, Mips_W1, Mips_W2, Mips_W3, Mips_W4, Mips_W5, Mips_W6, Mips_W7, Mips_W8, Mips_W9, Mips_W10, Mips_W11, Mips_W12, Mips_W13, Mips_W14, Mips_W15, Mips_W16, Mips_W17, Mips_W18, Mips_W19, Mips_W20, Mips_W21, Mips_W22, Mips_W23, Mips_W24, Mips_W25, Mips_W26, Mips_W27, Mips_W28, Mips_W29, Mips_W30, Mips_W31, }; // MSA128H Bit set. static uint8_t MSA128HBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // MSA128W Register Class... static MCPhysReg MSA128W[] = { Mips_W0, Mips_W1, Mips_W2, Mips_W3, Mips_W4, Mips_W5, Mips_W6, Mips_W7, Mips_W8, Mips_W9, Mips_W10, Mips_W11, Mips_W12, Mips_W13, Mips_W14, Mips_W15, Mips_W16, Mips_W17, Mips_W18, Mips_W19, Mips_W20, Mips_W21, Mips_W22, Mips_W23, Mips_W24, Mips_W25, Mips_W26, Mips_W27, Mips_W28, Mips_W29, Mips_W30, Mips_W31, }; // MSA128W Bit set. static uint8_t MSA128WBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // MSA128B_with_sub_64_in_OddSP Register Class... static MCPhysReg MSA128B_with_sub_64_in_OddSP[] = { Mips_W1, Mips_W3, Mips_W5, Mips_W7, Mips_W9, Mips_W11, Mips_W13, Mips_W15, Mips_W17, Mips_W19, Mips_W21, Mips_W23, Mips_W25, Mips_W27, Mips_W29, Mips_W31, }; // MSA128B_with_sub_64_in_OddSP Bit set. static uint8_t MSA128B_with_sub_64_in_OddSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x55, 0x55, 0x05, }; // MSA128WEvens Register Class... static MCPhysReg MSA128WEvens[] = { Mips_W0, Mips_W2, Mips_W4, Mips_W6, Mips_W8, Mips_W10, Mips_W12, Mips_W14, Mips_W16, Mips_W18, Mips_W20, Mips_W22, Mips_W24, Mips_W26, Mips_W28, Mips_W30, }; // MSA128WEvens Bit set. static uint8_t MSA128WEvensBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0xaa, 0xaa, 0xaa, 0x02, }; // ACC128 Register Class... static MCPhysReg ACC128[] = { Mips_AC0_64, }; // ACC128 Bit set. static uint8_t ACC128Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, }; static MCRegisterClass MipsMCRegisterClasses[] = { { OddSP, OddSPBits, 236, 56, sizeof(OddSPBits), Mips_OddSPRegClassID, 4, 4, 1, 0 }, { CCR, CCRBits, 432, 32, sizeof(CCRBits), Mips_CCRRegClassID, 4, 4, 1, 0 }, { COP2, COP2Bits, 95, 32, sizeof(COP2Bits), Mips_COP2RegClassID, 4, 4, 1, 0 }, { COP3, COP3Bits, 100, 32, sizeof(COP3Bits), Mips_COP3RegClassID, 4, 4, 1, 0 }, { DSPR, DSPRBits, 436, 32, sizeof(DSPRBits), Mips_DSPRRegClassID, 4, 4, 1, 1 }, { FGR32, FGR32Bits, 83, 32, sizeof(FGR32Bits), Mips_FGR32RegClassID, 4, 4, 1, 1 }, { FGRCC, FGRCCBits, 167, 32, sizeof(FGRCCBits), Mips_FGRCCRegClassID, 4, 4, 1, 1 }, { FGRH32, FGRH32Bits, 33, 32, sizeof(FGRH32Bits), Mips_FGRH32RegClassID, 4, 4, 1, 0 }, { GPR32, GPR32Bits, 89, 32, sizeof(GPR32Bits), Mips_GPR32RegClassID, 4, 4, 1, 1 }, { HWRegs, HWRegsBits, 760, 32, sizeof(HWRegsBits), Mips_HWRegsRegClassID, 4, 4, 1, 0 }, { OddSP_with_sub_hi, OddSP_with_sub_hiBits, 509, 24, sizeof(OddSP_with_sub_hiBits), Mips_OddSP_with_sub_hiRegClassID, 4, 4, 1, 0 }, { FGR32_and_OddSP, FGR32_and_OddSPBits, 242, 16, sizeof(FGR32_and_OddSPBits), Mips_FGR32_and_OddSPRegClassID, 4, 4, 1, 1 }, { FGRH32_and_OddSP, FGRH32_and_OddSPBits, 225, 16, sizeof(FGRH32_and_OddSPBits), Mips_FGRH32_and_OddSPRegClassID, 4, 4, 1, 0 }, { OddSP_with_sub_hi_with_sub_hi_in_FGRH32, OddSP_with_sub_hi_with_sub_hi_in_FGRH32Bits, 0, 16, sizeof(OddSP_with_sub_hi_with_sub_hi_in_FGRH32Bits), Mips_OddSP_with_sub_hi_with_sub_hi_in_FGRH32RegClassID, 4, 4, 1, 0 }, { CPU16RegsPlusSP, CPU16RegsPlusSPBits, 325, 9, sizeof(CPU16RegsPlusSPBits), Mips_CPU16RegsPlusSPRegClassID, 4, 4, 1, 1 }, { CC, CCBits, 158, 8, sizeof(CCBits), Mips_CCRegClassID, 4, 4, 1, 0 }, { CPU16Regs, CPU16RegsBits, 750, 8, sizeof(CPU16RegsBits), Mips_CPU16RegsRegClassID, 4, 4, 1, 1 }, { FCC, FCCBits, 157, 8, sizeof(FCCBits), Mips_FCCRegClassID, 4, 4, 1, 0 }, { GPRMM16, GPRMM16Bits, 134, 8, sizeof(GPRMM16Bits), Mips_GPRMM16RegClassID, 4, 4, 1, 1 }, { GPRMM16MoveP, GPRMM16MovePBits, 385, 8, sizeof(GPRMM16MovePBits), Mips_GPRMM16MovePRegClassID, 4, 4, 1, 1 }, { GPRMM16Zero, GPRMM16ZeroBits, 573, 8, sizeof(GPRMM16ZeroBits), Mips_GPRMM16ZeroRegClassID, 4, 4, 1, 1 }, { MSACtrl, MSACtrlBits, 527, 8, sizeof(MSACtrlBits), Mips_MSACtrlRegClassID, 4, 4, 1, 1 }, { OddSP_with_sub_hi_with_sub_hi_in_FGR32, OddSP_with_sub_hi_with_sub_hi_in_FGR32Bits, 50, 8, sizeof(OddSP_with_sub_hi_with_sub_hi_in_FGR32Bits), Mips_OddSP_with_sub_hi_with_sub_hi_in_FGR32RegClassID, 4, 4, 1, 0 }, { CPU16Regs_and_GPRMM16Zero, CPU16Regs_and_GPRMM16ZeroBits, 623, 7, sizeof(CPU16Regs_and_GPRMM16ZeroBits), Mips_CPU16Regs_and_GPRMM16ZeroRegClassID, 4, 4, 1, 1 }, { CPU16Regs_and_GPRMM16MoveP, CPU16Regs_and_GPRMM16MovePBits, 371, 4, sizeof(CPU16Regs_and_GPRMM16MovePBits), Mips_CPU16Regs_and_GPRMM16MovePRegClassID, 4, 4, 1, 1 }, { GPRMM16MoveP_and_GPRMM16Zero, GPRMM16MoveP_and_GPRMM16ZeroBits, 556, 4, sizeof(GPRMM16MoveP_and_GPRMM16ZeroBits), Mips_GPRMM16MoveP_and_GPRMM16ZeroRegClassID, 4, 4, 1, 1 }, { HI32DSP, HI32DSPBits, 200, 4, sizeof(HI32DSPBits), Mips_HI32DSPRegClassID, 4, 4, 1, 1 }, { LO32DSP, LO32DSPBits, 208, 4, sizeof(LO32DSPBits), Mips_LO32DSPRegClassID, 4, 4, 1, 1 }, { GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero, GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroBits, 606, 3, sizeof(GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroBits), Mips_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID, 4, 4, 1, 1 }, { CPURAReg, CPURARegBits, 470, 1, sizeof(CPURARegBits), Mips_CPURARegRegClassID, 4, 4, 1, 0 }, { CPUSPReg, CPUSPRegBits, 500, 1, sizeof(CPUSPRegBits), Mips_CPUSPRegRegClassID, 4, 4, 1, 0 }, { DSPCC, DSPCCBits, 161, 1, sizeof(DSPCCBits), Mips_DSPCCRegClassID, 4, 4, 1, 1 }, { HI32, HI32Bits, 40, 1, sizeof(HI32Bits), Mips_HI32RegClassID, 4, 4, 1, 1 }, { LO32, LO32Bits, 45, 1, sizeof(LO32Bits), Mips_LO32RegClassID, 4, 4, 1, 1 }, { FGR64, FGR64Bits, 122, 32, sizeof(FGR64Bits), Mips_FGR64RegClassID, 8, 8, 1, 1 }, { GPR64, GPR64Bits, 128, 32, sizeof(GPR64Bits), Mips_GPR64RegClassID, 8, 8, 1, 1 }, { AFGR64, AFGR64Bits, 121, 16, sizeof(AFGR64Bits), Mips_AFGR64RegClassID, 8, 8, 1, 1 }, { FGR64_and_OddSP, FGR64_and_OddSPBits, 259, 16, sizeof(FGR64_and_OddSPBits), Mips_FGR64_and_OddSPRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_CPU16RegsPlusSP, GPR64_with_sub_32_in_CPU16RegsPlusSPBits, 304, 9, sizeof(GPR64_with_sub_32_in_CPU16RegsPlusSPBits), Mips_GPR64_with_sub_32_in_CPU16RegsPlusSPRegClassID, 8, 8, 1, 1 }, { AFGR64_and_OddSP, AFGR64_and_OddSPBits, 258, 8, sizeof(AFGR64_and_OddSPBits), Mips_AFGR64_and_OddSPRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_CPU16Regs, GPR64_with_sub_32_in_CPU16RegsBits, 729, 8, sizeof(GPR64_with_sub_32_in_CPU16RegsBits), Mips_GPR64_with_sub_32_in_CPU16RegsRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_GPRMM16MoveP, GPR64_with_sub_32_in_GPRMM16MovePBits, 398, 8, sizeof(GPR64_with_sub_32_in_GPRMM16MovePBits), Mips_GPR64_with_sub_32_in_GPRMM16MovePRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_GPRMM16Zero, GPR64_with_sub_32_in_GPRMM16ZeroBits, 696, 8, sizeof(GPR64_with_sub_32_in_GPRMM16ZeroBits), Mips_GPR64_with_sub_32_in_GPRMM16ZeroRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16Zero, GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroBits, 649, 7, sizeof(GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroBits), Mips_GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClassID, 8, 8, 1, 1 }, { ACC64DSP, ACC64DSPBits, 216, 4, sizeof(ACC64DSPBits), Mips_ACC64DSPRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MoveP, GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePBits, 350, 4, sizeof(GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePBits), Mips_GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16Zero, GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroBits, 535, 4, sizeof(GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroBits), Mips_GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16Zero, GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroBits, 585, 3, sizeof(GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroBits), Mips_GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID, 8, 8, 1, 1 }, { OCTEON_MPL, OCTEON_MPLBits, 189, 3, sizeof(OCTEON_MPLBits), Mips_OCTEON_MPLRegClassID, 8, 8, 1, 0 }, { OCTEON_P, OCTEON_PBits, 341, 3, sizeof(OCTEON_PBits), Mips_OCTEON_PRegClassID, 8, 8, 1, 0 }, { ACC64, ACC64Bits, 105, 1, sizeof(ACC64Bits), Mips_ACC64RegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_CPURAReg, GPR64_with_sub_32_in_CPURARegBits, 449, 1, sizeof(GPR64_with_sub_32_in_CPURARegBits), Mips_GPR64_with_sub_32_in_CPURARegRegClassID, 8, 8, 1, 1 }, { GPR64_with_sub_32_in_CPUSPReg, GPR64_with_sub_32_in_CPUSPRegBits, 479, 1, sizeof(GPR64_with_sub_32_in_CPUSPRegBits), Mips_GPR64_with_sub_32_in_CPUSPRegRegClassID, 8, 8, 1, 1 }, { HI64, HI64Bits, 111, 1, sizeof(HI64Bits), Mips_HI64RegClassID, 8, 8, 1, 1 }, { LO64, LO64Bits, 116, 1, sizeof(LO64Bits), Mips_LO64RegClassID, 8, 8, 1, 1 }, { MSA128B, MSA128BBits, 149, 32, sizeof(MSA128BBits), Mips_MSA128BRegClassID, 16, 16, 1, 1 }, { MSA128D, MSA128DBits, 173, 32, sizeof(MSA128DBits), Mips_MSA128DRegClassID, 16, 16, 1, 1 }, { MSA128H, MSA128HBits, 181, 32, sizeof(MSA128HBits), Mips_MSA128HRegClassID, 16, 16, 1, 1 }, { MSA128W, MSA128WBits, 441, 32, sizeof(MSA128WBits), Mips_MSA128WRegClassID, 16, 16, 1, 1 }, { MSA128B_with_sub_64_in_OddSP, MSA128B_with_sub_64_in_OddSPBits, 275, 16, sizeof(MSA128B_with_sub_64_in_OddSPBits), Mips_MSA128B_with_sub_64_in_OddSPRegClassID, 16, 16, 1, 1 }, { MSA128WEvens, MSA128WEvensBits, 767, 16, sizeof(MSA128WEvensBits), Mips_MSA128WEvensRegClassID, 16, 16, 1, 1 }, { ACC128, ACC128Bits, 142, 1, sizeof(ACC128Bits), Mips_ACC128RegClassID, 16, 16, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/Mips/MipsGenSubtargetInfo.inc010066400017500001750000000041751363402546700226600ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Subtarget Enumeration Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM #define Mips_FeatureCnMips (1ULL << 0) #define Mips_FeatureDSP (1ULL << 1) #define Mips_FeatureDSPR2 (1ULL << 2) #define Mips_FeatureFP64Bit (1ULL << 3) #define Mips_FeatureFPXX (1ULL << 4) #define Mips_FeatureGP64Bit (1ULL << 5) #define Mips_FeatureMSA (1ULL << 6) #define Mips_FeatureMicroMips (1ULL << 7) #define Mips_FeatureMips1 (1ULL << 8) #define Mips_FeatureMips2 (1ULL << 9) #define Mips_FeatureMips3 (1ULL << 10) #define Mips_FeatureMips3_32 (1ULL << 11) #define Mips_FeatureMips3_32r2 (1ULL << 12) #define Mips_FeatureMips4 (1ULL << 13) #define Mips_FeatureMips4_32 (1ULL << 14) #define Mips_FeatureMips4_32r2 (1ULL << 15) #define Mips_FeatureMips5 (1ULL << 16) #define Mips_FeatureMips5_32r2 (1ULL << 17) #define Mips_FeatureMips16 (1ULL << 18) #define Mips_FeatureMips32 (1ULL << 19) #define Mips_FeatureMips32r2 (1ULL << 20) #define Mips_FeatureMips32r3 (1ULL << 21) #define Mips_FeatureMips32r5 (1ULL << 22) #define Mips_FeatureMips32r6 (1ULL << 23) #define Mips_FeatureMips64 (1ULL << 24) #define Mips_FeatureMips64r2 (1ULL << 25) #define Mips_FeatureMips64r3 (1ULL << 26) #define Mips_FeatureMips64r5 (1ULL << 27) #define Mips_FeatureMips64r6 (1ULL << 28) #define Mips_FeatureNaN2008 (1ULL << 29) #define Mips_FeatureNoABICalls (1ULL << 30) #define Mips_FeatureNoOddSPReg (1ULL << 31) #define Mips_FeatureSingleFloat (1ULL << 32) #define Mips_FeatureVFPU (1ULL << 33) #endif // GET_SUBTARGETINFO_ENUM capstone-sys-0.11.0/capstone/arch/Mips/MipsInstPrinter.c010066400017500001750000000266521363402546700214100ustar0000000000000000//===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax ------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an Mips MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_MIPS #include #include #include // debug #include #include "MipsInstPrinter.h" #include "../../MCInst.h" #include "../../utils.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "MipsMapping.h" #include "MipsInstPrinter.h" static void printUnsignedImm(MCInst *MI, int opNum, SStream *O); static char *printAliasInstr(MCInst *MI, SStream *O, void *info); static char *printAlias(MCInst *MI, SStream *OS); // These enumeration declarations were originally in MipsInstrInfo.h but // had to be moved here to avoid circular dependencies between // LLVMMipsCodeGen and LLVMMipsAsmPrinter. // Mips Condition Codes typedef enum Mips_CondCode { // To be used with float branch True Mips_FCOND_F, Mips_FCOND_UN, Mips_FCOND_OEQ, Mips_FCOND_UEQ, Mips_FCOND_OLT, Mips_FCOND_ULT, Mips_FCOND_OLE, Mips_FCOND_ULE, Mips_FCOND_SF, Mips_FCOND_NGLE, Mips_FCOND_SEQ, Mips_FCOND_NGL, Mips_FCOND_LT, Mips_FCOND_NGE, Mips_FCOND_LE, Mips_FCOND_NGT, // To be used with float branch False // This conditions have the same mnemonic as the // above ones, but are used with a branch False; Mips_FCOND_T, Mips_FCOND_OR, Mips_FCOND_UNE, Mips_FCOND_ONE, Mips_FCOND_UGE, Mips_FCOND_OGE, Mips_FCOND_UGT, Mips_FCOND_OGT, Mips_FCOND_ST, Mips_FCOND_GLE, Mips_FCOND_SNE, Mips_FCOND_GL, Mips_FCOND_NLT, Mips_FCOND_GE, Mips_FCOND_NLE, Mips_FCOND_GT } Mips_CondCode; #define GET_INSTRINFO_ENUM #include "MipsGenInstrInfo.inc" static const char *getRegisterName(unsigned RegNo); static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI); static void set_mem_access(MCInst *MI, bool status) { MI->csh->doing_mem = status; if (MI->csh->detail != CS_OPT_ON) return; if (status) { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_MEM; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = MIPS_REG_INVALID; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.disp = 0; } else { // done, create the next operand slot MI->flat_insn->detail->mips.op_count++; } } static bool isReg(MCInst *MI, unsigned OpNo, unsigned R) { return (MCOperand_isReg(MCInst_getOperand(MI, OpNo)) && MCOperand_getReg(MCInst_getOperand(MI, OpNo)) == R); } static const char* MipsFCCToString(Mips_CondCode CC) { switch (CC) { default: return 0; // never reach case Mips_FCOND_F: case Mips_FCOND_T: return "f"; case Mips_FCOND_UN: case Mips_FCOND_OR: return "un"; case Mips_FCOND_OEQ: case Mips_FCOND_UNE: return "eq"; case Mips_FCOND_UEQ: case Mips_FCOND_ONE: return "ueq"; case Mips_FCOND_OLT: case Mips_FCOND_UGE: return "olt"; case Mips_FCOND_ULT: case Mips_FCOND_OGE: return "ult"; case Mips_FCOND_OLE: case Mips_FCOND_UGT: return "ole"; case Mips_FCOND_ULE: case Mips_FCOND_OGT: return "ule"; case Mips_FCOND_SF: case Mips_FCOND_ST: return "sf"; case Mips_FCOND_NGLE: case Mips_FCOND_GLE: return "ngle"; case Mips_FCOND_SEQ: case Mips_FCOND_SNE: return "seq"; case Mips_FCOND_NGL: case Mips_FCOND_GL: return "ngl"; case Mips_FCOND_LT: case Mips_FCOND_NLT: return "lt"; case Mips_FCOND_NGE: case Mips_FCOND_GE: return "nge"; case Mips_FCOND_LE: case Mips_FCOND_NLE: return "le"; case Mips_FCOND_NGT: case Mips_FCOND_GT: return "ngt"; } } static void printRegName(SStream *OS, unsigned RegNo) { SStream_concat(OS, "$%s", getRegisterName(RegNo)); } void Mips_printInst(MCInst *MI, SStream *O, void *info) { char *mnem; switch (MCInst_getOpcode(MI)) { default: break; case Mips_Save16: case Mips_SaveX16: case Mips_Restore16: case Mips_RestoreX16: return; } // Try to print any aliases first. mnem = printAliasInstr(MI, O, info); if (!mnem) { mnem = printAlias(MI, O); if (!mnem) { printInstruction(MI, O, NULL); } } if (mnem) { // fixup instruction id due to the change in alias instruction MCInst_setOpcodePub(MI, Mips_map_insn(mnem)); cs_mem_free(mnem); } } static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op; if (OpNo >= MI->size) return; Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned int reg = MCOperand_getReg(Op); printRegName(O, reg); reg = Mips_map_register(reg); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = reg; } else { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_REG; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].reg = reg; MI->flat_insn->detail->mips.op_count++; } } } else if (MCOperand_isImm(Op)) { int64_t imm = MCOperand_getImm(Op); if (MI->csh->doing_mem) { if (imm) { // only print Imm offset if it is not 0 printInt64(O, imm); } if (MI->csh->detail) MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.disp = imm; } else { printInt64(O, imm); if (MI->csh->detail) { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = imm; MI->flat_insn->detail->mips.op_count++; } } } } static void printUnsignedImm(MCInst *MI, int opNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, opNum); if (MCOperand_isImm(MO)) { int64_t imm = MCOperand_getImm(MO); printInt64(O, imm); if (MI->csh->detail) { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = (unsigned short int)imm; MI->flat_insn->detail->mips.op_count++; } } else printOperand(MI, opNum, O); } static void printUnsignedImm8(MCInst *MI, int opNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, opNum); if (MCOperand_isImm(MO)) { uint8_t imm = (uint8_t)MCOperand_getImm(MO); if (imm > HEX_THRESHOLD) SStream_concat(O, "0x%x", imm); else SStream_concat(O, "%u", imm); if (MI->csh->detail) { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = imm; MI->flat_insn->detail->mips.op_count++; } } else printOperand(MI, opNum, O); } static void printMemOperand(MCInst *MI, int opNum, SStream *O) { // Load/Store memory operands -- imm($reg) // If PIC target the target is loaded as the // pattern lw $25,%call16($28) // opNum can be invalid if instruction had reglist as operand. // MemOperand is always last operand of instruction (base + offset). switch (MCInst_getOpcode(MI)) { default: break; case Mips_SWM32_MM: case Mips_LWM32_MM: case Mips_SWM16_MM: case Mips_LWM16_MM: opNum = MCInst_getNumOperands(MI) - 2; break; } set_mem_access(MI, true); printOperand(MI, opNum + 1, O); SStream_concat0(O, "("); printOperand(MI, opNum, O); SStream_concat0(O, ")"); set_mem_access(MI, false); } // TODO??? static void printMemOperandEA(MCInst *MI, int opNum, SStream *O) { // when using stack locations for not load/store instructions // print the same way as all normal 3 operand instructions. printOperand(MI, opNum, O); SStream_concat0(O, ", "); printOperand(MI, opNum + 1, O); return; } static void printFCCOperand(MCInst *MI, int opNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, opNum); SStream_concat0(O, MipsFCCToString((Mips_CondCode)MCOperand_getImm(MO))); } static void printRegisterPair(MCInst *MI, int opNum, SStream *O) { printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, opNum))); } static char *printAlias1(const char *Str, MCInst *MI, unsigned OpNo, SStream *OS) { SStream_concat(OS, "%s\t", Str); printOperand(MI, OpNo, OS); return cs_strdup(Str); } static char *printAlias2(const char *Str, MCInst *MI, unsigned OpNo0, unsigned OpNo1, SStream *OS) { char *tmp; tmp = printAlias1(Str, MI, OpNo0, OS); SStream_concat0(OS, ", "); printOperand(MI, OpNo1, OS); return tmp; } #define GET_REGINFO_ENUM #include "MipsGenRegisterInfo.inc" static char *printAlias(MCInst *MI, SStream *OS) { switch (MCInst_getOpcode(MI)) { case Mips_BEQ: case Mips_BEQ_MM: // beq $zero, $zero, $L2 => b $L2 // beq $r0, $zero, $L2 => beqz $r0, $L2 if (isReg(MI, 0, Mips_ZERO) && isReg(MI, 1, Mips_ZERO)) return printAlias1("b", MI, 2, OS); if (isReg(MI, 1, Mips_ZERO)) return printAlias2("beqz", MI, 0, 2, OS); return NULL; case Mips_BEQ64: // beq $r0, $zero, $L2 => beqz $r0, $L2 if (isReg(MI, 1, Mips_ZERO_64)) return printAlias2("beqz", MI, 0, 2, OS); return NULL; case Mips_BNE: // bne $r0, $zero, $L2 => bnez $r0, $L2 if (isReg(MI, 1, Mips_ZERO)) return printAlias2("bnez", MI, 0, 2, OS); return NULL; case Mips_BNE64: // bne $r0, $zero, $L2 => bnez $r0, $L2 if (isReg(MI, 1, Mips_ZERO_64)) return printAlias2("bnez", MI, 0, 2, OS); return NULL; case Mips_BGEZAL: // bgezal $zero, $L1 => bal $L1 if (isReg(MI, 0, Mips_ZERO)) return printAlias1("bal", MI, 1, OS); return NULL; case Mips_BC1T: // bc1t $fcc0, $L1 => bc1t $L1 if (isReg(MI, 0, Mips_FCC0)) return printAlias1("bc1t", MI, 1, OS); return NULL; case Mips_BC1F: // bc1f $fcc0, $L1 => bc1f $L1 if (isReg(MI, 0, Mips_FCC0)) return printAlias1("bc1f", MI, 1, OS); return NULL; case Mips_JALR: // jalr $ra, $r1 => jalr $r1 if (isReg(MI, 0, Mips_RA)) return printAlias1("jalr", MI, 1, OS); return NULL; case Mips_JALR64: // jalr $ra, $r1 => jalr $r1 if (isReg(MI, 0, Mips_RA_64)) return printAlias1("jalr", MI, 1, OS); return NULL; case Mips_NOR: case Mips_NOR_MM: // nor $r0, $r1, $zero => not $r0, $r1 if (isReg(MI, 2, Mips_ZERO)) return printAlias2("not", MI, 0, 1, OS); return NULL; case Mips_NOR64: // nor $r0, $r1, $zero => not $r0, $r1 if (isReg(MI, 2, Mips_ZERO_64)) return printAlias2("not", MI, 0, 1, OS); return NULL; case Mips_OR: // or $r0, $r1, $zero => move $r0, $r1 if (isReg(MI, 2, Mips_ZERO)) return printAlias2("move", MI, 0, 1, OS); return NULL; default: return NULL; } } static void printRegisterList(MCInst *MI, int opNum, SStream *O) { int i, e, reg; // - 2 because register List is always first operand of instruction and it is // always followed by memory operand (base + offset). for (i = opNum, e = MCInst_getNumOperands(MI) - 2; i != e; ++i) { if (i != opNum) SStream_concat0(O, ", "); reg = MCOperand_getReg(MCInst_getOperand(MI, i)); printRegName(O, reg); if (MI->csh->detail) { MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_REG; MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].reg = reg; MI->flat_insn->detail->mips.op_count++; } } } #define PRINT_ALIAS_INSTR #include "MipsGenAsmWriter.inc" #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsInstPrinter.h010066400017500001750000000013531363402546700214040ustar0000000000000000//=== MipsInstPrinter.h - Convert Mips MCInst to assembly syntax -*- C++ -*-==// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints a Mips MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_MIPSINSTPRINTER_H #define CS_MIPSINSTPRINTER_H #include "../../MCInst.h" #include "../../SStream.h" void Mips_printInst(MCInst *MI, SStream *O, void *info); #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsMapping.c010066400017500001750000000775301363402546700205230ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_MIPS #include // debug #include #include "../../utils.h" #include "MipsMapping.h" #define GET_INSTRINFO_ENUM #include "MipsGenInstrInfo.inc" #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { MIPS_REG_INVALID, NULL }, { MIPS_REG_PC, "pc"}, //{ MIPS_REG_0, "0"}, { MIPS_REG_0, "zero"}, { MIPS_REG_1, "at"}, //{ MIPS_REG_1, "1"}, { MIPS_REG_2, "v0"}, //{ MIPS_REG_2, "2"}, { MIPS_REG_3, "v1"}, //{ MIPS_REG_3, "3"}, { MIPS_REG_4, "a0"}, //{ MIPS_REG_4, "4"}, { MIPS_REG_5, "a1"}, //{ MIPS_REG_5, "5"}, { MIPS_REG_6, "a2"}, //{ MIPS_REG_6, "6"}, { MIPS_REG_7, "a3"}, //{ MIPS_REG_7, "7"}, { MIPS_REG_8, "t0"}, //{ MIPS_REG_8, "8"}, { MIPS_REG_9, "t1"}, //{ MIPS_REG_9, "9"}, { MIPS_REG_10, "t2"}, //{ MIPS_REG_10, "10"}, { MIPS_REG_11, "t3"}, //{ MIPS_REG_11, "11"}, { MIPS_REG_12, "t4"}, //{ MIPS_REG_12, "12"}, { MIPS_REG_13, "t5"}, //{ MIPS_REG_13, "13"}, { MIPS_REG_14, "t6"}, //{ MIPS_REG_14, "14"}, { MIPS_REG_15, "t7"}, //{ MIPS_REG_15, "15"}, { MIPS_REG_16, "s0"}, //{ MIPS_REG_16, "16"}, { MIPS_REG_17, "s1"}, //{ MIPS_REG_17, "17"}, { MIPS_REG_18, "s2"}, //{ MIPS_REG_18, "18"}, { MIPS_REG_19, "s3"}, //{ MIPS_REG_19, "19"}, { MIPS_REG_20, "s4"}, //{ MIPS_REG_20, "20"}, { MIPS_REG_21, "s5"}, //{ MIPS_REG_21, "21"}, { MIPS_REG_22, "s6"}, //{ MIPS_REG_22, "22"}, { MIPS_REG_23, "s7"}, //{ MIPS_REG_23, "23"}, { MIPS_REG_24, "t8"}, //{ MIPS_REG_24, "24"}, { MIPS_REG_25, "t9"}, //{ MIPS_REG_25, "25"}, { MIPS_REG_26, "k0"}, //{ MIPS_REG_26, "26"}, { MIPS_REG_27, "k1"}, //{ MIPS_REG_27, "27"}, { MIPS_REG_28, "gp"}, //{ MIPS_REG_28, "28"}, { MIPS_REG_29, "sp"}, //{ MIPS_REG_29, "29"}, { MIPS_REG_30, "fp"}, //{ MIPS_REG_30, "30"}, { MIPS_REG_31, "ra"}, //{ MIPS_REG_31, "31"}, { MIPS_REG_DSPCCOND, "dspccond"}, { MIPS_REG_DSPCARRY, "dspcarry"}, { MIPS_REG_DSPEFI, "dspefi"}, { MIPS_REG_DSPOUTFLAG, "dspoutflag"}, { MIPS_REG_DSPOUTFLAG16_19, "dspoutflag16_19"}, { MIPS_REG_DSPOUTFLAG20, "dspoutflag20"}, { MIPS_REG_DSPOUTFLAG21, "dspoutflag21"}, { MIPS_REG_DSPOUTFLAG22, "dspoutflag22"}, { MIPS_REG_DSPOUTFLAG23, "dspoutflag23"}, { MIPS_REG_DSPPOS, "dsppos"}, { MIPS_REG_DSPSCOUNT, "dspscount"}, { MIPS_REG_AC0, "ac0"}, { MIPS_REG_AC1, "ac1"}, { MIPS_REG_AC2, "ac2"}, { MIPS_REG_AC3, "ac3"}, { MIPS_REG_CC0, "cc0"}, { MIPS_REG_CC1, "cc1"}, { MIPS_REG_CC2, "cc2"}, { MIPS_REG_CC3, "cc3"}, { MIPS_REG_CC4, "cc4"}, { MIPS_REG_CC5, "cc5"}, { MIPS_REG_CC6, "cc6"}, { MIPS_REG_CC7, "cc7"}, { MIPS_REG_F0, "f0"}, { MIPS_REG_F1, "f1"}, { MIPS_REG_F2, "f2"}, { MIPS_REG_F3, "f3"}, { MIPS_REG_F4, "f4"}, { MIPS_REG_F5, "f5"}, { MIPS_REG_F6, "f6"}, { MIPS_REG_F7, "f7"}, { MIPS_REG_F8, "f8"}, { MIPS_REG_F9, "f9"}, { MIPS_REG_F10, "f10"}, { MIPS_REG_F11, "f11"}, { MIPS_REG_F12, "f12"}, { MIPS_REG_F13, "f13"}, { MIPS_REG_F14, "f14"}, { MIPS_REG_F15, "f15"}, { MIPS_REG_F16, "f16"}, { MIPS_REG_F17, "f17"}, { MIPS_REG_F18, "f18"}, { MIPS_REG_F19, "f19"}, { MIPS_REG_F20, "f20"}, { MIPS_REG_F21, "f21"}, { MIPS_REG_F22, "f22"}, { MIPS_REG_F23, "f23"}, { MIPS_REG_F24, "f24"}, { MIPS_REG_F25, "f25"}, { MIPS_REG_F26, "f26"}, { MIPS_REG_F27, "f27"}, { MIPS_REG_F28, "f28"}, { MIPS_REG_F29, "f29"}, { MIPS_REG_F30, "f30"}, { MIPS_REG_F31, "f31"}, { MIPS_REG_FCC0, "fcc0"}, { MIPS_REG_FCC1, "fcc1"}, { MIPS_REG_FCC2, "fcc2"}, { MIPS_REG_FCC3, "fcc3"}, { MIPS_REG_FCC4, "fcc4"}, { MIPS_REG_FCC5, "fcc5"}, { MIPS_REG_FCC6, "fcc6"}, { MIPS_REG_FCC7, "fcc7"}, { MIPS_REG_W0, "w0"}, { MIPS_REG_W1, "w1"}, { MIPS_REG_W2, "w2"}, { MIPS_REG_W3, "w3"}, { MIPS_REG_W4, "w4"}, { MIPS_REG_W5, "w5"}, { MIPS_REG_W6, "w6"}, { MIPS_REG_W7, "w7"}, { MIPS_REG_W8, "w8"}, { MIPS_REG_W9, "w9"}, { MIPS_REG_W10, "w10"}, { MIPS_REG_W11, "w11"}, { MIPS_REG_W12, "w12"}, { MIPS_REG_W13, "w13"}, { MIPS_REG_W14, "w14"}, { MIPS_REG_W15, "w15"}, { MIPS_REG_W16, "w16"}, { MIPS_REG_W17, "w17"}, { MIPS_REG_W18, "w18"}, { MIPS_REG_W19, "w19"}, { MIPS_REG_W20, "w20"}, { MIPS_REG_W21, "w21"}, { MIPS_REG_W22, "w22"}, { MIPS_REG_W23, "w23"}, { MIPS_REG_W24, "w24"}, { MIPS_REG_W25, "w25"}, { MIPS_REG_W26, "w26"}, { MIPS_REG_W27, "w27"}, { MIPS_REG_W28, "w28"}, { MIPS_REG_W29, "w29"}, { MIPS_REG_W30, "w30"}, { MIPS_REG_W31, "w31"}, { MIPS_REG_HI, "hi"}, { MIPS_REG_LO, "lo"}, { MIPS_REG_P0, "p0"}, { MIPS_REG_P1, "p1"}, { MIPS_REG_P2, "p2"}, { MIPS_REG_MPL0, "mpl0"}, { MIPS_REG_MPL1, "mpl1"}, { MIPS_REG_MPL2, "mpl2"}, }; #endif const char *Mips_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } static insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "MipsMappingInsn.inc" }; // given internal insn id, return public instruction info void Mips_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { unsigned int i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = MIPS_GRP_JUMP; insn->detail->groups_count++; } #endif } } } static const name_map insn_name_maps[] = { { MIPS_INS_INVALID, NULL }, { MIPS_INS_ABSQ_S, "absq_s" }, { MIPS_INS_ADD, "add" }, { MIPS_INS_ADDIUPC, "addiupc" }, { MIPS_INS_ADDIUR1SP, "addiur1sp" }, { MIPS_INS_ADDIUR2, "addiur2" }, { MIPS_INS_ADDIUS5, "addius5" }, { MIPS_INS_ADDIUSP, "addiusp" }, { MIPS_INS_ADDQH, "addqh" }, { MIPS_INS_ADDQH_R, "addqh_r" }, { MIPS_INS_ADDQ, "addq" }, { MIPS_INS_ADDQ_S, "addq_s" }, { MIPS_INS_ADDSC, "addsc" }, { MIPS_INS_ADDS_A, "adds_a" }, { MIPS_INS_ADDS_S, "adds_s" }, { MIPS_INS_ADDS_U, "adds_u" }, { MIPS_INS_ADDU16, "addu16" }, { MIPS_INS_ADDUH, "adduh" }, { MIPS_INS_ADDUH_R, "adduh_r" }, { MIPS_INS_ADDU, "addu" }, { MIPS_INS_ADDU_S, "addu_s" }, { MIPS_INS_ADDVI, "addvi" }, { MIPS_INS_ADDV, "addv" }, { MIPS_INS_ADDWC, "addwc" }, { MIPS_INS_ADD_A, "add_a" }, { MIPS_INS_ADDI, "addi" }, { MIPS_INS_ADDIU, "addiu" }, { MIPS_INS_ALIGN, "align" }, { MIPS_INS_ALUIPC, "aluipc" }, { MIPS_INS_AND, "and" }, { MIPS_INS_AND16, "and16" }, { MIPS_INS_ANDI16, "andi16" }, { MIPS_INS_ANDI, "andi" }, { MIPS_INS_APPEND, "append" }, { MIPS_INS_ASUB_S, "asub_s" }, { MIPS_INS_ASUB_U, "asub_u" }, { MIPS_INS_AUI, "aui" }, { MIPS_INS_AUIPC, "auipc" }, { MIPS_INS_AVER_S, "aver_s" }, { MIPS_INS_AVER_U, "aver_u" }, { MIPS_INS_AVE_S, "ave_s" }, { MIPS_INS_AVE_U, "ave_u" }, { MIPS_INS_B16, "b16" }, { MIPS_INS_BADDU, "baddu" }, { MIPS_INS_BAL, "bal" }, { MIPS_INS_BALC, "balc" }, { MIPS_INS_BALIGN, "balign" }, { MIPS_INS_BBIT0, "bbit0" }, { MIPS_INS_BBIT032, "bbit032" }, { MIPS_INS_BBIT1, "bbit1" }, { MIPS_INS_BBIT132, "bbit132" }, { MIPS_INS_BC, "bc" }, { MIPS_INS_BC0F, "bc0f" }, { MIPS_INS_BC0FL, "bc0fl" }, { MIPS_INS_BC0T, "bc0t" }, { MIPS_INS_BC0TL, "bc0tl" }, { MIPS_INS_BC1EQZ, "bc1eqz" }, { MIPS_INS_BC1F, "bc1f" }, { MIPS_INS_BC1FL, "bc1fl" }, { MIPS_INS_BC1NEZ, "bc1nez" }, { MIPS_INS_BC1T, "bc1t" }, { MIPS_INS_BC1TL, "bc1tl" }, { MIPS_INS_BC2EQZ, "bc2eqz" }, { MIPS_INS_BC2F, "bc2f" }, { MIPS_INS_BC2FL, "bc2fl" }, { MIPS_INS_BC2NEZ, "bc2nez" }, { MIPS_INS_BC2T, "bc2t" }, { MIPS_INS_BC2TL, "bc2tl" }, { MIPS_INS_BC3F, "bc3f" }, { MIPS_INS_BC3FL, "bc3fl" }, { MIPS_INS_BC3T, "bc3t" }, { MIPS_INS_BC3TL, "bc3tl" }, { MIPS_INS_BCLRI, "bclri" }, { MIPS_INS_BCLR, "bclr" }, { MIPS_INS_BEQ, "beq" }, { MIPS_INS_BEQC, "beqc" }, { MIPS_INS_BEQL, "beql" }, { MIPS_INS_BEQZ16, "beqz16" }, { MIPS_INS_BEQZALC, "beqzalc" }, { MIPS_INS_BEQZC, "beqzc" }, { MIPS_INS_BGEC, "bgec" }, { MIPS_INS_BGEUC, "bgeuc" }, { MIPS_INS_BGEZ, "bgez" }, { MIPS_INS_BGEZAL, "bgezal" }, { MIPS_INS_BGEZALC, "bgezalc" }, { MIPS_INS_BGEZALL, "bgezall" }, { MIPS_INS_BGEZALS, "bgezals" }, { MIPS_INS_BGEZC, "bgezc" }, { MIPS_INS_BGEZL, "bgezl" }, { MIPS_INS_BGTZ, "bgtz" }, { MIPS_INS_BGTZALC, "bgtzalc" }, { MIPS_INS_BGTZC, "bgtzc" }, { MIPS_INS_BGTZL, "bgtzl" }, { MIPS_INS_BINSLI, "binsli" }, { MIPS_INS_BINSL, "binsl" }, { MIPS_INS_BINSRI, "binsri" }, { MIPS_INS_BINSR, "binsr" }, { MIPS_INS_BITREV, "bitrev" }, { MIPS_INS_BITSWAP, "bitswap" }, { MIPS_INS_BLEZ, "blez" }, { MIPS_INS_BLEZALC, "blezalc" }, { MIPS_INS_BLEZC, "blezc" }, { MIPS_INS_BLEZL, "blezl" }, { MIPS_INS_BLTC, "bltc" }, { MIPS_INS_BLTUC, "bltuc" }, { MIPS_INS_BLTZ, "bltz" }, { MIPS_INS_BLTZAL, "bltzal" }, { MIPS_INS_BLTZALC, "bltzalc" }, { MIPS_INS_BLTZALL, "bltzall" }, { MIPS_INS_BLTZALS, "bltzals" }, { MIPS_INS_BLTZC, "bltzc" }, { MIPS_INS_BLTZL, "bltzl" }, { MIPS_INS_BMNZI, "bmnzi" }, { MIPS_INS_BMNZ, "bmnz" }, { MIPS_INS_BMZI, "bmzi" }, { MIPS_INS_BMZ, "bmz" }, { MIPS_INS_BNE, "bne" }, { MIPS_INS_BNEC, "bnec" }, { MIPS_INS_BNEGI, "bnegi" }, { MIPS_INS_BNEG, "bneg" }, { MIPS_INS_BNEL, "bnel" }, { MIPS_INS_BNEZ16, "bnez16" }, { MIPS_INS_BNEZALC, "bnezalc" }, { MIPS_INS_BNEZC, "bnezc" }, { MIPS_INS_BNVC, "bnvc" }, { MIPS_INS_BNZ, "bnz" }, { MIPS_INS_BOVC, "bovc" }, { MIPS_INS_BPOSGE32, "bposge32" }, { MIPS_INS_BREAK, "break" }, { MIPS_INS_BREAK16, "break16" }, { MIPS_INS_BSELI, "bseli" }, { MIPS_INS_BSEL, "bsel" }, { MIPS_INS_BSETI, "bseti" }, { MIPS_INS_BSET, "bset" }, { MIPS_INS_BZ, "bz" }, { MIPS_INS_BEQZ, "beqz" }, { MIPS_INS_B, "b" }, { MIPS_INS_BNEZ, "bnez" }, { MIPS_INS_BTEQZ, "bteqz" }, { MIPS_INS_BTNEZ, "btnez" }, { MIPS_INS_CACHE, "cache" }, { MIPS_INS_CEIL, "ceil" }, { MIPS_INS_CEQI, "ceqi" }, { MIPS_INS_CEQ, "ceq" }, { MIPS_INS_CFC1, "cfc1" }, { MIPS_INS_CFCMSA, "cfcmsa" }, { MIPS_INS_CINS, "cins" }, { MIPS_INS_CINS32, "cins32" }, { MIPS_INS_CLASS, "class" }, { MIPS_INS_CLEI_S, "clei_s" }, { MIPS_INS_CLEI_U, "clei_u" }, { MIPS_INS_CLE_S, "cle_s" }, { MIPS_INS_CLE_U, "cle_u" }, { MIPS_INS_CLO, "clo" }, { MIPS_INS_CLTI_S, "clti_s" }, { MIPS_INS_CLTI_U, "clti_u" }, { MIPS_INS_CLT_S, "clt_s" }, { MIPS_INS_CLT_U, "clt_u" }, { MIPS_INS_CLZ, "clz" }, { MIPS_INS_CMPGDU, "cmpgdu" }, { MIPS_INS_CMPGU, "cmpgu" }, { MIPS_INS_CMPU, "cmpu" }, { MIPS_INS_CMP, "cmp" }, { MIPS_INS_COPY_S, "copy_s" }, { MIPS_INS_COPY_U, "copy_u" }, { MIPS_INS_CTC1, "ctc1" }, { MIPS_INS_CTCMSA, "ctcmsa" }, { MIPS_INS_CVT, "cvt" }, { MIPS_INS_C, "c" }, { MIPS_INS_CMPI, "cmpi" }, { MIPS_INS_DADD, "dadd" }, { MIPS_INS_DADDI, "daddi" }, { MIPS_INS_DADDIU, "daddiu" }, { MIPS_INS_DADDU, "daddu" }, { MIPS_INS_DAHI, "dahi" }, { MIPS_INS_DALIGN, "dalign" }, { MIPS_INS_DATI, "dati" }, { MIPS_INS_DAUI, "daui" }, { MIPS_INS_DBITSWAP, "dbitswap" }, { MIPS_INS_DCLO, "dclo" }, { MIPS_INS_DCLZ, "dclz" }, { MIPS_INS_DDIV, "ddiv" }, { MIPS_INS_DDIVU, "ddivu" }, { MIPS_INS_DERET, "deret" }, { MIPS_INS_DEXT, "dext" }, { MIPS_INS_DEXTM, "dextm" }, { MIPS_INS_DEXTU, "dextu" }, { MIPS_INS_DI, "di" }, { MIPS_INS_DINS, "dins" }, { MIPS_INS_DINSM, "dinsm" }, { MIPS_INS_DINSU, "dinsu" }, { MIPS_INS_DIV, "div" }, { MIPS_INS_DIVU, "divu" }, { MIPS_INS_DIV_S, "div_s" }, { MIPS_INS_DIV_U, "div_u" }, { MIPS_INS_DLSA, "dlsa" }, { MIPS_INS_DMFC0, "dmfc0" }, { MIPS_INS_DMFC1, "dmfc1" }, { MIPS_INS_DMFC2, "dmfc2" }, { MIPS_INS_DMOD, "dmod" }, { MIPS_INS_DMODU, "dmodu" }, { MIPS_INS_DMTC0, "dmtc0" }, { MIPS_INS_DMTC1, "dmtc1" }, { MIPS_INS_DMTC2, "dmtc2" }, { MIPS_INS_DMUH, "dmuh" }, { MIPS_INS_DMUHU, "dmuhu" }, { MIPS_INS_DMUL, "dmul" }, { MIPS_INS_DMULT, "dmult" }, { MIPS_INS_DMULTU, "dmultu" }, { MIPS_INS_DMULU, "dmulu" }, { MIPS_INS_DOTP_S, "dotp_s" }, { MIPS_INS_DOTP_U, "dotp_u" }, { MIPS_INS_DPADD_S, "dpadd_s" }, { MIPS_INS_DPADD_U, "dpadd_u" }, { MIPS_INS_DPAQX_SA, "dpaqx_sa" }, { MIPS_INS_DPAQX_S, "dpaqx_s" }, { MIPS_INS_DPAQ_SA, "dpaq_sa" }, { MIPS_INS_DPAQ_S, "dpaq_s" }, { MIPS_INS_DPAU, "dpau" }, { MIPS_INS_DPAX, "dpax" }, { MIPS_INS_DPA, "dpa" }, { MIPS_INS_DPOP, "dpop" }, { MIPS_INS_DPSQX_SA, "dpsqx_sa" }, { MIPS_INS_DPSQX_S, "dpsqx_s" }, { MIPS_INS_DPSQ_SA, "dpsq_sa" }, { MIPS_INS_DPSQ_S, "dpsq_s" }, { MIPS_INS_DPSUB_S, "dpsub_s" }, { MIPS_INS_DPSUB_U, "dpsub_u" }, { MIPS_INS_DPSU, "dpsu" }, { MIPS_INS_DPSX, "dpsx" }, { MIPS_INS_DPS, "dps" }, { MIPS_INS_DROTR, "drotr" }, { MIPS_INS_DROTR32, "drotr32" }, { MIPS_INS_DROTRV, "drotrv" }, { MIPS_INS_DSBH, "dsbh" }, { MIPS_INS_DSHD, "dshd" }, { MIPS_INS_DSLL, "dsll" }, { MIPS_INS_DSLL32, "dsll32" }, { MIPS_INS_DSLLV, "dsllv" }, { MIPS_INS_DSRA, "dsra" }, { MIPS_INS_DSRA32, "dsra32" }, { MIPS_INS_DSRAV, "dsrav" }, { MIPS_INS_DSRL, "dsrl" }, { MIPS_INS_DSRL32, "dsrl32" }, { MIPS_INS_DSRLV, "dsrlv" }, { MIPS_INS_DSUB, "dsub" }, { MIPS_INS_DSUBU, "dsubu" }, { MIPS_INS_EHB, "ehb" }, { MIPS_INS_EI, "ei" }, { MIPS_INS_ERET, "eret" }, { MIPS_INS_EXT, "ext" }, { MIPS_INS_EXTP, "extp" }, { MIPS_INS_EXTPDP, "extpdp" }, { MIPS_INS_EXTPDPV, "extpdpv" }, { MIPS_INS_EXTPV, "extpv" }, { MIPS_INS_EXTRV_RS, "extrv_rs" }, { MIPS_INS_EXTRV_R, "extrv_r" }, { MIPS_INS_EXTRV_S, "extrv_s" }, { MIPS_INS_EXTRV, "extrv" }, { MIPS_INS_EXTR_RS, "extr_rs" }, { MIPS_INS_EXTR_R, "extr_r" }, { MIPS_INS_EXTR_S, "extr_s" }, { MIPS_INS_EXTR, "extr" }, { MIPS_INS_EXTS, "exts" }, { MIPS_INS_EXTS32, "exts32" }, { MIPS_INS_ABS, "abs" }, { MIPS_INS_FADD, "fadd" }, { MIPS_INS_FCAF, "fcaf" }, { MIPS_INS_FCEQ, "fceq" }, { MIPS_INS_FCLASS, "fclass" }, { MIPS_INS_FCLE, "fcle" }, { MIPS_INS_FCLT, "fclt" }, { MIPS_INS_FCNE, "fcne" }, { MIPS_INS_FCOR, "fcor" }, { MIPS_INS_FCUEQ, "fcueq" }, { MIPS_INS_FCULE, "fcule" }, { MIPS_INS_FCULT, "fcult" }, { MIPS_INS_FCUNE, "fcune" }, { MIPS_INS_FCUN, "fcun" }, { MIPS_INS_FDIV, "fdiv" }, { MIPS_INS_FEXDO, "fexdo" }, { MIPS_INS_FEXP2, "fexp2" }, { MIPS_INS_FEXUPL, "fexupl" }, { MIPS_INS_FEXUPR, "fexupr" }, { MIPS_INS_FFINT_S, "ffint_s" }, { MIPS_INS_FFINT_U, "ffint_u" }, { MIPS_INS_FFQL, "ffql" }, { MIPS_INS_FFQR, "ffqr" }, { MIPS_INS_FILL, "fill" }, { MIPS_INS_FLOG2, "flog2" }, { MIPS_INS_FLOOR, "floor" }, { MIPS_INS_FMADD, "fmadd" }, { MIPS_INS_FMAX_A, "fmax_a" }, { MIPS_INS_FMAX, "fmax" }, { MIPS_INS_FMIN_A, "fmin_a" }, { MIPS_INS_FMIN, "fmin" }, { MIPS_INS_MOV, "mov" }, { MIPS_INS_FMSUB, "fmsub" }, { MIPS_INS_FMUL, "fmul" }, { MIPS_INS_MUL, "mul" }, { MIPS_INS_NEG, "neg" }, { MIPS_INS_FRCP, "frcp" }, { MIPS_INS_FRINT, "frint" }, { MIPS_INS_FRSQRT, "frsqrt" }, { MIPS_INS_FSAF, "fsaf" }, { MIPS_INS_FSEQ, "fseq" }, { MIPS_INS_FSLE, "fsle" }, { MIPS_INS_FSLT, "fslt" }, { MIPS_INS_FSNE, "fsne" }, { MIPS_INS_FSOR, "fsor" }, { MIPS_INS_FSQRT, "fsqrt" }, { MIPS_INS_SQRT, "sqrt" }, { MIPS_INS_FSUB, "fsub" }, { MIPS_INS_SUB, "sub" }, { MIPS_INS_FSUEQ, "fsueq" }, { MIPS_INS_FSULE, "fsule" }, { MIPS_INS_FSULT, "fsult" }, { MIPS_INS_FSUNE, "fsune" }, { MIPS_INS_FSUN, "fsun" }, { MIPS_INS_FTINT_S, "ftint_s" }, { MIPS_INS_FTINT_U, "ftint_u" }, { MIPS_INS_FTQ, "ftq" }, { MIPS_INS_FTRUNC_S, "ftrunc_s" }, { MIPS_INS_FTRUNC_U, "ftrunc_u" }, { MIPS_INS_HADD_S, "hadd_s" }, { MIPS_INS_HADD_U, "hadd_u" }, { MIPS_INS_HSUB_S, "hsub_s" }, { MIPS_INS_HSUB_U, "hsub_u" }, { MIPS_INS_ILVEV, "ilvev" }, { MIPS_INS_ILVL, "ilvl" }, { MIPS_INS_ILVOD, "ilvod" }, { MIPS_INS_ILVR, "ilvr" }, { MIPS_INS_INS, "ins" }, { MIPS_INS_INSERT, "insert" }, { MIPS_INS_INSV, "insv" }, { MIPS_INS_INSVE, "insve" }, { MIPS_INS_J, "j" }, { MIPS_INS_JAL, "jal" }, { MIPS_INS_JALR, "jalr" }, { MIPS_INS_JALRS16, "jalrs16" }, { MIPS_INS_JALRS, "jalrs" }, { MIPS_INS_JALS, "jals" }, { MIPS_INS_JALX, "jalx" }, { MIPS_INS_JIALC, "jialc" }, { MIPS_INS_JIC, "jic" }, { MIPS_INS_JR, "jr" }, { MIPS_INS_JR16, "jr16" }, { MIPS_INS_JRADDIUSP, "jraddiusp" }, { MIPS_INS_JRC, "jrc" }, { MIPS_INS_JALRC, "jalrc" }, { MIPS_INS_LB, "lb" }, { MIPS_INS_LBU16, "lbu16" }, { MIPS_INS_LBUX, "lbux" }, { MIPS_INS_LBU, "lbu" }, { MIPS_INS_LD, "ld" }, { MIPS_INS_LDC1, "ldc1" }, { MIPS_INS_LDC2, "ldc2" }, { MIPS_INS_LDC3, "ldc3" }, { MIPS_INS_LDI, "ldi" }, { MIPS_INS_LDL, "ldl" }, { MIPS_INS_LDPC, "ldpc" }, { MIPS_INS_LDR, "ldr" }, { MIPS_INS_LDXC1, "ldxc1" }, { MIPS_INS_LH, "lh" }, { MIPS_INS_LHU16, "lhu16" }, { MIPS_INS_LHX, "lhx" }, { MIPS_INS_LHU, "lhu" }, { MIPS_INS_LI16, "li16" }, { MIPS_INS_LL, "ll" }, { MIPS_INS_LLD, "lld" }, { MIPS_INS_LSA, "lsa" }, { MIPS_INS_LUXC1, "luxc1" }, { MIPS_INS_LUI, "lui" }, { MIPS_INS_LW, "lw" }, { MIPS_INS_LW16, "lw16" }, { MIPS_INS_LWC1, "lwc1" }, { MIPS_INS_LWC2, "lwc2" }, { MIPS_INS_LWC3, "lwc3" }, { MIPS_INS_LWL, "lwl" }, { MIPS_INS_LWM16, "lwm16" }, { MIPS_INS_LWM32, "lwm32" }, { MIPS_INS_LWPC, "lwpc" }, { MIPS_INS_LWP, "lwp" }, { MIPS_INS_LWR, "lwr" }, { MIPS_INS_LWUPC, "lwupc" }, { MIPS_INS_LWU, "lwu" }, { MIPS_INS_LWX, "lwx" }, { MIPS_INS_LWXC1, "lwxc1" }, { MIPS_INS_LWXS, "lwxs" }, { MIPS_INS_LI, "li" }, { MIPS_INS_MADD, "madd" }, { MIPS_INS_MADDF, "maddf" }, { MIPS_INS_MADDR_Q, "maddr_q" }, { MIPS_INS_MADDU, "maddu" }, { MIPS_INS_MADDV, "maddv" }, { MIPS_INS_MADD_Q, "madd_q" }, { MIPS_INS_MAQ_SA, "maq_sa" }, { MIPS_INS_MAQ_S, "maq_s" }, { MIPS_INS_MAXA, "maxa" }, { MIPS_INS_MAXI_S, "maxi_s" }, { MIPS_INS_MAXI_U, "maxi_u" }, { MIPS_INS_MAX_A, "max_a" }, { MIPS_INS_MAX, "max" }, { MIPS_INS_MAX_S, "max_s" }, { MIPS_INS_MAX_U, "max_u" }, { MIPS_INS_MFC0, "mfc0" }, { MIPS_INS_MFC1, "mfc1" }, { MIPS_INS_MFC2, "mfc2" }, { MIPS_INS_MFHC1, "mfhc1" }, { MIPS_INS_MFHI, "mfhi" }, { MIPS_INS_MFLO, "mflo" }, { MIPS_INS_MINA, "mina" }, { MIPS_INS_MINI_S, "mini_s" }, { MIPS_INS_MINI_U, "mini_u" }, { MIPS_INS_MIN_A, "min_a" }, { MIPS_INS_MIN, "min" }, { MIPS_INS_MIN_S, "min_s" }, { MIPS_INS_MIN_U, "min_u" }, { MIPS_INS_MOD, "mod" }, { MIPS_INS_MODSUB, "modsub" }, { MIPS_INS_MODU, "modu" }, { MIPS_INS_MOD_S, "mod_s" }, { MIPS_INS_MOD_U, "mod_u" }, { MIPS_INS_MOVE, "move" }, { MIPS_INS_MOVEP, "movep" }, { MIPS_INS_MOVF, "movf" }, { MIPS_INS_MOVN, "movn" }, { MIPS_INS_MOVT, "movt" }, { MIPS_INS_MOVZ, "movz" }, { MIPS_INS_MSUB, "msub" }, { MIPS_INS_MSUBF, "msubf" }, { MIPS_INS_MSUBR_Q, "msubr_q" }, { MIPS_INS_MSUBU, "msubu" }, { MIPS_INS_MSUBV, "msubv" }, { MIPS_INS_MSUB_Q, "msub_q" }, { MIPS_INS_MTC0, "mtc0" }, { MIPS_INS_MTC1, "mtc1" }, { MIPS_INS_MTC2, "mtc2" }, { MIPS_INS_MTHC1, "mthc1" }, { MIPS_INS_MTHI, "mthi" }, { MIPS_INS_MTHLIP, "mthlip" }, { MIPS_INS_MTLO, "mtlo" }, { MIPS_INS_MTM0, "mtm0" }, { MIPS_INS_MTM1, "mtm1" }, { MIPS_INS_MTM2, "mtm2" }, { MIPS_INS_MTP0, "mtp0" }, { MIPS_INS_MTP1, "mtp1" }, { MIPS_INS_MTP2, "mtp2" }, { MIPS_INS_MUH, "muh" }, { MIPS_INS_MUHU, "muhu" }, { MIPS_INS_MULEQ_S, "muleq_s" }, { MIPS_INS_MULEU_S, "muleu_s" }, { MIPS_INS_MULQ_RS, "mulq_rs" }, { MIPS_INS_MULQ_S, "mulq_s" }, { MIPS_INS_MULR_Q, "mulr_q" }, { MIPS_INS_MULSAQ_S, "mulsaq_s" }, { MIPS_INS_MULSA, "mulsa" }, { MIPS_INS_MULT, "mult" }, { MIPS_INS_MULTU, "multu" }, { MIPS_INS_MULU, "mulu" }, { MIPS_INS_MULV, "mulv" }, { MIPS_INS_MUL_Q, "mul_q" }, { MIPS_INS_MUL_S, "mul_s" }, { MIPS_INS_NLOC, "nloc" }, { MIPS_INS_NLZC, "nlzc" }, { MIPS_INS_NMADD, "nmadd" }, { MIPS_INS_NMSUB, "nmsub" }, { MIPS_INS_NOR, "nor" }, { MIPS_INS_NORI, "nori" }, { MIPS_INS_NOT16, "not16" }, { MIPS_INS_NOT, "not" }, { MIPS_INS_OR, "or" }, { MIPS_INS_OR16, "or16" }, { MIPS_INS_ORI, "ori" }, { MIPS_INS_PACKRL, "packrl" }, { MIPS_INS_PAUSE, "pause" }, { MIPS_INS_PCKEV, "pckev" }, { MIPS_INS_PCKOD, "pckod" }, { MIPS_INS_PCNT, "pcnt" }, { MIPS_INS_PICK, "pick" }, { MIPS_INS_POP, "pop" }, { MIPS_INS_PRECEQU, "precequ" }, { MIPS_INS_PRECEQ, "preceq" }, { MIPS_INS_PRECEU, "preceu" }, { MIPS_INS_PRECRQU_S, "precrqu_s" }, { MIPS_INS_PRECRQ, "precrq" }, { MIPS_INS_PRECRQ_RS, "precrq_rs" }, { MIPS_INS_PRECR, "precr" }, { MIPS_INS_PRECR_SRA, "precr_sra" }, { MIPS_INS_PRECR_SRA_R, "precr_sra_r" }, { MIPS_INS_PREF, "pref" }, { MIPS_INS_PREPEND, "prepend" }, { MIPS_INS_RADDU, "raddu" }, { MIPS_INS_RDDSP, "rddsp" }, { MIPS_INS_RDHWR, "rdhwr" }, { MIPS_INS_REPLV, "replv" }, { MIPS_INS_REPL, "repl" }, { MIPS_INS_RINT, "rint" }, { MIPS_INS_ROTR, "rotr" }, { MIPS_INS_ROTRV, "rotrv" }, { MIPS_INS_ROUND, "round" }, { MIPS_INS_SAT_S, "sat_s" }, { MIPS_INS_SAT_U, "sat_u" }, { MIPS_INS_SB, "sb" }, { MIPS_INS_SB16, "sb16" }, { MIPS_INS_SC, "sc" }, { MIPS_INS_SCD, "scd" }, { MIPS_INS_SD, "sd" }, { MIPS_INS_SDBBP, "sdbbp" }, { MIPS_INS_SDBBP16, "sdbbp16" }, { MIPS_INS_SDC1, "sdc1" }, { MIPS_INS_SDC2, "sdc2" }, { MIPS_INS_SDC3, "sdc3" }, { MIPS_INS_SDL, "sdl" }, { MIPS_INS_SDR, "sdr" }, { MIPS_INS_SDXC1, "sdxc1" }, { MIPS_INS_SEB, "seb" }, { MIPS_INS_SEH, "seh" }, { MIPS_INS_SELEQZ, "seleqz" }, { MIPS_INS_SELNEZ, "selnez" }, { MIPS_INS_SEL, "sel" }, { MIPS_INS_SEQ, "seq" }, { MIPS_INS_SEQI, "seqi" }, { MIPS_INS_SH, "sh" }, { MIPS_INS_SH16, "sh16" }, { MIPS_INS_SHF, "shf" }, { MIPS_INS_SHILO, "shilo" }, { MIPS_INS_SHILOV, "shilov" }, { MIPS_INS_SHLLV, "shllv" }, { MIPS_INS_SHLLV_S, "shllv_s" }, { MIPS_INS_SHLL, "shll" }, { MIPS_INS_SHLL_S, "shll_s" }, { MIPS_INS_SHRAV, "shrav" }, { MIPS_INS_SHRAV_R, "shrav_r" }, { MIPS_INS_SHRA, "shra" }, { MIPS_INS_SHRA_R, "shra_r" }, { MIPS_INS_SHRLV, "shrlv" }, { MIPS_INS_SHRL, "shrl" }, { MIPS_INS_SLDI, "sldi" }, { MIPS_INS_SLD, "sld" }, { MIPS_INS_SLL, "sll" }, { MIPS_INS_SLL16, "sll16" }, { MIPS_INS_SLLI, "slli" }, { MIPS_INS_SLLV, "sllv" }, { MIPS_INS_SLT, "slt" }, { MIPS_INS_SLTI, "slti" }, { MIPS_INS_SLTIU, "sltiu" }, { MIPS_INS_SLTU, "sltu" }, { MIPS_INS_SNE, "sne" }, { MIPS_INS_SNEI, "snei" }, { MIPS_INS_SPLATI, "splati" }, { MIPS_INS_SPLAT, "splat" }, { MIPS_INS_SRA, "sra" }, { MIPS_INS_SRAI, "srai" }, { MIPS_INS_SRARI, "srari" }, { MIPS_INS_SRAR, "srar" }, { MIPS_INS_SRAV, "srav" }, { MIPS_INS_SRL, "srl" }, { MIPS_INS_SRL16, "srl16" }, { MIPS_INS_SRLI, "srli" }, { MIPS_INS_SRLRI, "srlri" }, { MIPS_INS_SRLR, "srlr" }, { MIPS_INS_SRLV, "srlv" }, { MIPS_INS_SSNOP, "ssnop" }, { MIPS_INS_ST, "st" }, { MIPS_INS_SUBQH, "subqh" }, { MIPS_INS_SUBQH_R, "subqh_r" }, { MIPS_INS_SUBQ, "subq" }, { MIPS_INS_SUBQ_S, "subq_s" }, { MIPS_INS_SUBSUS_U, "subsus_u" }, { MIPS_INS_SUBSUU_S, "subsuu_s" }, { MIPS_INS_SUBS_S, "subs_s" }, { MIPS_INS_SUBS_U, "subs_u" }, { MIPS_INS_SUBU16, "subu16" }, { MIPS_INS_SUBUH, "subuh" }, { MIPS_INS_SUBUH_R, "subuh_r" }, { MIPS_INS_SUBU, "subu" }, { MIPS_INS_SUBU_S, "subu_s" }, { MIPS_INS_SUBVI, "subvi" }, { MIPS_INS_SUBV, "subv" }, { MIPS_INS_SUXC1, "suxc1" }, { MIPS_INS_SW, "sw" }, { MIPS_INS_SW16, "sw16" }, { MIPS_INS_SWC1, "swc1" }, { MIPS_INS_SWC2, "swc2" }, { MIPS_INS_SWC3, "swc3" }, { MIPS_INS_SWL, "swl" }, { MIPS_INS_SWM16, "swm16" }, { MIPS_INS_SWM32, "swm32" }, { MIPS_INS_SWP, "swp" }, { MIPS_INS_SWR, "swr" }, { MIPS_INS_SWXC1, "swxc1" }, { MIPS_INS_SYNC, "sync" }, { MIPS_INS_SYNCI, "synci" }, { MIPS_INS_SYSCALL, "syscall" }, { MIPS_INS_TEQ, "teq" }, { MIPS_INS_TEQI, "teqi" }, { MIPS_INS_TGE, "tge" }, { MIPS_INS_TGEI, "tgei" }, { MIPS_INS_TGEIU, "tgeiu" }, { MIPS_INS_TGEU, "tgeu" }, { MIPS_INS_TLBP, "tlbp" }, { MIPS_INS_TLBR, "tlbr" }, { MIPS_INS_TLBWI, "tlbwi" }, { MIPS_INS_TLBWR, "tlbwr" }, { MIPS_INS_TLT, "tlt" }, { MIPS_INS_TLTI, "tlti" }, { MIPS_INS_TLTIU, "tltiu" }, { MIPS_INS_TLTU, "tltu" }, { MIPS_INS_TNE, "tne" }, { MIPS_INS_TNEI, "tnei" }, { MIPS_INS_TRUNC, "trunc" }, { MIPS_INS_V3MULU, "v3mulu" }, { MIPS_INS_VMM0, "vmm0" }, { MIPS_INS_VMULU, "vmulu" }, { MIPS_INS_VSHF, "vshf" }, { MIPS_INS_WAIT, "wait" }, { MIPS_INS_WRDSP, "wrdsp" }, { MIPS_INS_WSBH, "wsbh" }, { MIPS_INS_XOR, "xor" }, { MIPS_INS_XOR16, "xor16" }, { MIPS_INS_XORI, "xori" }, // alias instructions { MIPS_INS_NOP, "nop" }, { MIPS_INS_NEGU, "negu" }, { MIPS_INS_JALR_HB, "jalr.hb" }, { MIPS_INS_JR_HB, "jr.hb" }, }; const char *Mips_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET if (id >= MIPS_INS_ENDING) return NULL; return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { MIPS_GRP_INVALID, NULL }, { MIPS_GRP_JUMP, "jump" }, { MIPS_GRP_CALL, "call" }, { MIPS_GRP_RET, "ret" }, { MIPS_GRP_INT, "int" }, { MIPS_GRP_IRET, "iret" }, { MIPS_GRP_PRIVILEGE, "privileged" }, { MIPS_GRP_BRANCH_RELATIVE, "branch_relative" }, // architecture-specific groups { MIPS_GRP_BITCOUNT, "bitcount" }, { MIPS_GRP_DSP, "dsp" }, { MIPS_GRP_DSPR2, "dspr2" }, { MIPS_GRP_FPIDX, "fpidx" }, { MIPS_GRP_MSA, "msa" }, { MIPS_GRP_MIPS32R2, "mips32r2" }, { MIPS_GRP_MIPS64, "mips64" }, { MIPS_GRP_MIPS64R2, "mips64r2" }, { MIPS_GRP_SEINREG, "seinreg" }, { MIPS_GRP_STDENC, "stdenc" }, { MIPS_GRP_SWAP, "swap" }, { MIPS_GRP_MICROMIPS, "micromips" }, { MIPS_GRP_MIPS16MODE, "mips16mode" }, { MIPS_GRP_FP64BIT, "fp64bit" }, { MIPS_GRP_NONANSFPMATH, "nonansfpmath" }, { MIPS_GRP_NOTFP64BIT, "notfp64bit" }, { MIPS_GRP_NOTINMICROMIPS, "notinmicromips" }, { MIPS_GRP_NOTNACL, "notnacl" }, { MIPS_GRP_NOTMIPS32R6, "notmips32r6" }, { MIPS_GRP_NOTMIPS64R6, "notmips64r6" }, { MIPS_GRP_CNMIPS, "cnmips" }, { MIPS_GRP_MIPS32, "mips32" }, { MIPS_GRP_MIPS32R6, "mips32r6" }, { MIPS_GRP_MIPS64R6, "mips64r6" }, { MIPS_GRP_MIPS2, "mips2" }, { MIPS_GRP_MIPS3, "mips3" }, { MIPS_GRP_MIPS3_32, "mips3_32"}, { MIPS_GRP_MIPS3_32R2, "mips3_32r2" }, { MIPS_GRP_MIPS4_32, "mips4_32" }, { MIPS_GRP_MIPS4_32R2, "mips4_32r2" }, { MIPS_GRP_MIPS5_32R2, "mips5_32r2" }, { MIPS_GRP_GP32BIT, "gp32bit" }, { MIPS_GRP_GP64BIT, "gp64bit" }, }; #endif const char *Mips_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // map instruction name to public instruction ID mips_reg Mips_map_insn(const char *name) { // handle special alias first unsigned int i; // NOTE: skip first NULL name in insn_name_maps i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); return (i != -1)? i : MIPS_REG_INVALID; } // map internal raw register to 'public' register mips_reg Mips_map_register(unsigned int r) { // for some reasons different Mips modes can map different register number to // the same Mips register. this function handles the issue for exposing Mips // operands by mapping internal registers to 'public' register. static const unsigned int map[] = { 0, MIPS_REG_AT, MIPS_REG_DSPCCOND, MIPS_REG_DSPCARRY, MIPS_REG_DSPEFI, MIPS_REG_DSPOUTFLAG, MIPS_REG_DSPPOS, MIPS_REG_DSPSCOUNT, MIPS_REG_FP, MIPS_REG_GP, MIPS_REG_2, MIPS_REG_1, MIPS_REG_0, MIPS_REG_6, MIPS_REG_4, MIPS_REG_5, MIPS_REG_3, MIPS_REG_7, MIPS_REG_PC, MIPS_REG_RA, MIPS_REG_SP, MIPS_REG_ZERO, MIPS_REG_A0, MIPS_REG_A1, MIPS_REG_A2, MIPS_REG_A3, MIPS_REG_AC0, MIPS_REG_AC1, MIPS_REG_AC2, MIPS_REG_AC3, MIPS_REG_AT, MIPS_REG_CC0, MIPS_REG_CC1, MIPS_REG_CC2, MIPS_REG_CC3, MIPS_REG_CC4, MIPS_REG_CC5, MIPS_REG_CC6, MIPS_REG_CC7, MIPS_REG_0, MIPS_REG_1, MIPS_REG_2, MIPS_REG_3, MIPS_REG_4, MIPS_REG_5, MIPS_REG_6, MIPS_REG_7, MIPS_REG_8, MIPS_REG_9, MIPS_REG_0, MIPS_REG_1, MIPS_REG_2, MIPS_REG_3, MIPS_REG_4, MIPS_REG_5, MIPS_REG_6, MIPS_REG_7, MIPS_REG_8, MIPS_REG_9, MIPS_REG_10, MIPS_REG_11, MIPS_REG_12, MIPS_REG_13, MIPS_REG_14, MIPS_REG_15, MIPS_REG_16, MIPS_REG_17, MIPS_REG_18, MIPS_REG_19, MIPS_REG_20, MIPS_REG_21, MIPS_REG_22, MIPS_REG_23, MIPS_REG_24, MIPS_REG_25, MIPS_REG_26, MIPS_REG_27, MIPS_REG_28, MIPS_REG_29, MIPS_REG_30, MIPS_REG_31, MIPS_REG_10, MIPS_REG_11, MIPS_REG_12, MIPS_REG_13, MIPS_REG_14, MIPS_REG_15, MIPS_REG_16, MIPS_REG_17, MIPS_REG_18, MIPS_REG_19, MIPS_REG_20, MIPS_REG_21, MIPS_REG_22, MIPS_REG_23, MIPS_REG_24, MIPS_REG_25, MIPS_REG_26, MIPS_REG_27, MIPS_REG_28, MIPS_REG_29, MIPS_REG_30, MIPS_REG_31, MIPS_REG_F0, MIPS_REG_F2, MIPS_REG_F4, MIPS_REG_F6, MIPS_REG_F8, MIPS_REG_F10, MIPS_REG_F12, MIPS_REG_F14, MIPS_REG_F16, MIPS_REG_F18, MIPS_REG_F20, MIPS_REG_F22, MIPS_REG_F24, MIPS_REG_F26, MIPS_REG_F28, MIPS_REG_F30, MIPS_REG_DSPOUTFLAG20, MIPS_REG_DSPOUTFLAG21, MIPS_REG_DSPOUTFLAG22, MIPS_REG_DSPOUTFLAG23, MIPS_REG_F0, MIPS_REG_F1, MIPS_REG_F2, MIPS_REG_F3, MIPS_REG_F4, MIPS_REG_F5, MIPS_REG_F6, MIPS_REG_F7, MIPS_REG_F8, MIPS_REG_F9, MIPS_REG_F10, MIPS_REG_F11, MIPS_REG_F12, MIPS_REG_F13, MIPS_REG_F14, MIPS_REG_F15, MIPS_REG_F16, MIPS_REG_F17, MIPS_REG_F18, MIPS_REG_F19, MIPS_REG_F20, MIPS_REG_F21, MIPS_REG_F22, MIPS_REG_F23, MIPS_REG_F24, MIPS_REG_F25, MIPS_REG_F26, MIPS_REG_F27, MIPS_REG_F28, MIPS_REG_F29, MIPS_REG_F30, MIPS_REG_F31, MIPS_REG_FCC0, MIPS_REG_FCC1, MIPS_REG_FCC2, MIPS_REG_FCC3, MIPS_REG_FCC4, MIPS_REG_FCC5, MIPS_REG_FCC6, MIPS_REG_FCC7, MIPS_REG_0, MIPS_REG_1, MIPS_REG_2, MIPS_REG_3, MIPS_REG_4, MIPS_REG_5, MIPS_REG_6, MIPS_REG_7, MIPS_REG_8, MIPS_REG_9, MIPS_REG_10, MIPS_REG_11, MIPS_REG_12, MIPS_REG_13, MIPS_REG_14, MIPS_REG_15, MIPS_REG_16, MIPS_REG_17, MIPS_REG_18, MIPS_REG_19, MIPS_REG_20, MIPS_REG_21, MIPS_REG_22, MIPS_REG_23, MIPS_REG_24, MIPS_REG_25, MIPS_REG_26, MIPS_REG_27, MIPS_REG_28, MIPS_REG_29, MIPS_REG_30, MIPS_REG_31, MIPS_REG_FP, MIPS_REG_F0, MIPS_REG_F1, MIPS_REG_F2, MIPS_REG_F3, MIPS_REG_F4, MIPS_REG_F5, MIPS_REG_F6, MIPS_REG_F7, MIPS_REG_F8, MIPS_REG_F9, MIPS_REG_F10, MIPS_REG_F11, MIPS_REG_F12, MIPS_REG_F13, MIPS_REG_F14, MIPS_REG_F15, MIPS_REG_F16, MIPS_REG_F17, MIPS_REG_F18, MIPS_REG_F19, MIPS_REG_F20, MIPS_REG_F21, MIPS_REG_F22, MIPS_REG_F23, MIPS_REG_F24, MIPS_REG_F25, MIPS_REG_F26, MIPS_REG_F27, MIPS_REG_F28, MIPS_REG_F29, MIPS_REG_F30, MIPS_REG_F31, MIPS_REG_GP, MIPS_REG_AC0, MIPS_REG_AC1, MIPS_REG_AC2, MIPS_REG_AC3, 0, 0, 0, 0, MIPS_REG_4, MIPS_REG_5, MIPS_REG_6, MIPS_REG_7, MIPS_REG_8, MIPS_REG_9, MIPS_REG_10, MIPS_REG_11, MIPS_REG_12, MIPS_REG_13, MIPS_REG_14, MIPS_REG_15, MIPS_REG_16, MIPS_REG_17, MIPS_REG_18, MIPS_REG_19, MIPS_REG_20, MIPS_REG_21, MIPS_REG_22, MIPS_REG_23, MIPS_REG_24, MIPS_REG_25, MIPS_REG_26, MIPS_REG_27, MIPS_REG_28, MIPS_REG_29, MIPS_REG_30, MIPS_REG_31, MIPS_REG_K0, MIPS_REG_K1, MIPS_REG_AC0, MIPS_REG_AC1, MIPS_REG_AC2, MIPS_REG_AC3, MIPS_REG_MPL0, MIPS_REG_MPL1, MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, MIPS_REG_RA, MIPS_REG_S0, MIPS_REG_S1, MIPS_REG_S2, MIPS_REG_S3, MIPS_REG_S4, MIPS_REG_S5, MIPS_REG_S6, MIPS_REG_S7, MIPS_REG_SP, MIPS_REG_T0, MIPS_REG_T1, MIPS_REG_T2, MIPS_REG_T3, MIPS_REG_T4, MIPS_REG_T5, MIPS_REG_T6, MIPS_REG_T7, MIPS_REG_T8, MIPS_REG_T9, MIPS_REG_V0, MIPS_REG_V1, MIPS_REG_W0, MIPS_REG_W1, MIPS_REG_W2, MIPS_REG_W3, MIPS_REG_W4, MIPS_REG_W5, MIPS_REG_W6, MIPS_REG_W7, MIPS_REG_W8, MIPS_REG_W9, MIPS_REG_W10, MIPS_REG_W11, MIPS_REG_W12, MIPS_REG_W13, MIPS_REG_W14, MIPS_REG_W15, MIPS_REG_W16, MIPS_REG_W17, MIPS_REG_W18, MIPS_REG_W19, MIPS_REG_W20, MIPS_REG_W21, MIPS_REG_W22, MIPS_REG_W23, MIPS_REG_W24, MIPS_REG_W25, MIPS_REG_W26, MIPS_REG_W27, MIPS_REG_W28, MIPS_REG_W29, MIPS_REG_W30, MIPS_REG_W31, MIPS_REG_ZERO, MIPS_REG_A0, MIPS_REG_A1, MIPS_REG_A2, MIPS_REG_A3, MIPS_REG_AC0, MIPS_REG_F0, MIPS_REG_F1, MIPS_REG_F2, MIPS_REG_F3, MIPS_REG_F4, MIPS_REG_F5, MIPS_REG_F6, MIPS_REG_F7, MIPS_REG_F8, MIPS_REG_F9, MIPS_REG_F10, MIPS_REG_F11, MIPS_REG_F12, MIPS_REG_F13, MIPS_REG_F14, MIPS_REG_F15, MIPS_REG_F16, MIPS_REG_F17, MIPS_REG_F18, MIPS_REG_F19, MIPS_REG_F20, MIPS_REG_F21, MIPS_REG_F22, MIPS_REG_F23, MIPS_REG_F24, MIPS_REG_F25, MIPS_REG_F26, MIPS_REG_F27, MIPS_REG_F28, MIPS_REG_F29, MIPS_REG_F30, MIPS_REG_F31, MIPS_REG_DSPOUTFLAG16_19, MIPS_REG_HI, MIPS_REG_K0, MIPS_REG_K1, MIPS_REG_LO, MIPS_REG_S0, MIPS_REG_S1, MIPS_REG_S2, MIPS_REG_S3, MIPS_REG_S4, MIPS_REG_S5, MIPS_REG_S6, MIPS_REG_S7, MIPS_REG_T0, MIPS_REG_T1, MIPS_REG_T2, MIPS_REG_T3, MIPS_REG_T4, MIPS_REG_T5, MIPS_REG_T6, MIPS_REG_T7, MIPS_REG_T8, MIPS_REG_T9, MIPS_REG_V0, MIPS_REG_V1 }; if (r < ARR_SIZE(map)) return map[r]; // cannot find this register return 0; } #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsMapping.h010066400017500001750000000012771363402546700205230ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_MIPS_MAP_H #define CS_MIPS_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *Mips_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void Mips_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *Mips_insn_name(csh handle, unsigned int id); const char *Mips_group_name(csh handle, unsigned int id); // map instruction name to instruction ID mips_reg Mips_map_insn(const char *name); // map internal raw register to 'public' register mips_reg Mips_map_register(unsigned int r); #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsMappingInsn.inc010066400017500001750000005674701363402546700217110ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { Mips_ABSQ_S_PH, MIPS_INS_ABSQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ABSQ_S_QB, MIPS_INS_ABSQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ABSQ_S_W, MIPS_INS_ABSQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADD, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ADDIUPC, MIPS_INS_ADDIUPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_ADDIUPC_MM, MIPS_INS_ADDIUPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDIUR1SP_MM, MIPS_INS_ADDIUR1SP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDIUR2_MM, MIPS_INS_ADDIUR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDIUS5_MM, MIPS_INS_ADDIUS5, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDIUSP_MM, MIPS_INS_ADDIUSP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDQH_PH, MIPS_INS_ADDQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDQH_R_PH, MIPS_INS_ADDQH_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDQH_R_W, MIPS_INS_ADDQH_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDQH_W, MIPS_INS_ADDQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDQ_PH, MIPS_INS_ADDQ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADDQ_S_PH, MIPS_INS_ADDQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADDQ_S_W, MIPS_INS_ADDQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADDSC, MIPS_INS_ADDSC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCARRY, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADDS_A_B, MIPS_INS_ADDS_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_A_D, MIPS_INS_ADDS_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_A_H, MIPS_INS_ADDS_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_A_W, MIPS_INS_ADDS_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_S_B, MIPS_INS_ADDS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_S_D, MIPS_INS_ADDS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_S_H, MIPS_INS_ADDS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_S_W, MIPS_INS_ADDS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_U_B, MIPS_INS_ADDS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_U_D, MIPS_INS_ADDS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_U_H, MIPS_INS_ADDS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDS_U_W, MIPS_INS_ADDS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDU16_MM, MIPS_INS_ADDU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDUH_QB, MIPS_INS_ADDUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDUH_R_QB, MIPS_INS_ADDUH_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDU_PH, MIPS_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDU_QB, MIPS_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADDU_S_PH, MIPS_INS_ADDU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ADDU_S_QB, MIPS_INS_ADDU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADDVI_B, MIPS_INS_ADDVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDVI_D, MIPS_INS_ADDVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDVI_H, MIPS_INS_ADDVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDVI_W, MIPS_INS_ADDVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDV_B, MIPS_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDV_D, MIPS_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDV_H, MIPS_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDV_W, MIPS_INS_ADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADDWC, MIPS_INS_ADDWC, #ifndef CAPSTONE_DIET { MIPS_REG_DSPCARRY, 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_ADD_A_B, MIPS_INS_ADD_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADD_A_D, MIPS_INS_ADD_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADD_A_H, MIPS_INS_ADD_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADD_A_W, MIPS_INS_ADD_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ADD_MM, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDi, MIPS_INS_ADDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_ADDi_MM, MIPS_INS_ADDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDiu, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDiu_MM, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ADDu, MIPS_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ADDu_MM, MIPS_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ALIGN, MIPS_INS_ALIGN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_ALUIPC, MIPS_INS_ALUIPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_AND, MIPS_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_AND16_MM, MIPS_INS_AND16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_AND64, MIPS_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ANDI16_MM, MIPS_INS_ANDI16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ANDI_B, MIPS_INS_ANDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AND_MM, MIPS_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_AND_V, MIPS_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ANDi, MIPS_INS_ANDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_ANDi64, MIPS_INS_ANDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ANDi_MM, MIPS_INS_ANDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_APPEND, MIPS_INS_APPEND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_ASUB_S_B, MIPS_INS_ASUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_S_D, MIPS_INS_ASUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_S_H, MIPS_INS_ASUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_S_W, MIPS_INS_ASUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_U_B, MIPS_INS_ASUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_U_D, MIPS_INS_ASUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_U_H, MIPS_INS_ASUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ASUB_U_W, MIPS_INS_ASUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AUI, MIPS_INS_AUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_AUIPC, MIPS_INS_AUIPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_AVER_S_B, MIPS_INS_AVER_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_S_D, MIPS_INS_AVER_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_S_H, MIPS_INS_AVER_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_S_W, MIPS_INS_AVER_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_U_B, MIPS_INS_AVER_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_U_D, MIPS_INS_AVER_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_U_H, MIPS_INS_AVER_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVER_U_W, MIPS_INS_AVER_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_S_B, MIPS_INS_AVE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_S_D, MIPS_INS_AVE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_S_H, MIPS_INS_AVE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_S_W, MIPS_INS_AVE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_U_B, MIPS_INS_AVE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_U_D, MIPS_INS_AVE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_U_H, MIPS_INS_AVE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AVE_U_W, MIPS_INS_AVE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_AddiuRxImmX16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AddiuRxPcImmX16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AddiuRxRxImm16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AddiuRxRxImmX16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AddiuRxRyOffMemX16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AddiuSpImm16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { MIPS_REG_SP, 0 }, { MIPS_REG_SP, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AddiuSpImmX16, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { MIPS_REG_SP, 0 }, { MIPS_REG_SP, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AdduRxRyRz16, MIPS_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_AndRxRxRy16, MIPS_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_B16_MM, MIPS_INS_B16, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BADDu, MIPS_INS_BADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_BAL, MIPS_INS_BAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BALC, MIPS_INS_BALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BALIGN, MIPS_INS_BALIGN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_BBIT0, MIPS_INS_BBIT0, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_CNMIPS, 0 }, 1, 0 #endif }, { Mips_BBIT032, MIPS_INS_BBIT032, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_CNMIPS, 0 }, 1, 0 #endif }, { Mips_BBIT1, MIPS_INS_BBIT1, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_CNMIPS, 0 }, 1, 0 #endif }, { Mips_BBIT132, MIPS_INS_BBIT132, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_CNMIPS, 0 }, 1, 0 #endif }, { Mips_BC, MIPS_INS_BC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BC0F, MIPS_INS_BC0F, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC0FL, MIPS_INS_BC0FL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC0T, MIPS_INS_BC0T, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC0TL, MIPS_INS_BC0TL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC1EQZ, MIPS_INS_BC1EQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BC1F, MIPS_INS_BC1F, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC1FL, MIPS_INS_BC1FL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC1F_MM, MIPS_INS_BC1F, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BC1NEZ, MIPS_INS_BC1NEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BC1T, MIPS_INS_BC1T, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC1TL, MIPS_INS_BC1TL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC1T_MM, MIPS_INS_BC1T, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BC2EQZ, MIPS_INS_BC2EQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BC2F, MIPS_INS_BC2F, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC2FL, MIPS_INS_BC2FL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC2NEZ, MIPS_INS_BC2NEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BC2T, MIPS_INS_BC2T, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC2TL, MIPS_INS_BC2TL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC3F, MIPS_INS_BC3F, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC3FL, MIPS_INS_BC3FL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC3T, MIPS_INS_BC3T, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BC3TL, MIPS_INS_BC3TL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BCLRI_B, MIPS_INS_BCLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLRI_D, MIPS_INS_BCLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLRI_H, MIPS_INS_BCLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLRI_W, MIPS_INS_BCLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLR_B, MIPS_INS_BCLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLR_D, MIPS_INS_BCLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLR_H, MIPS_INS_BCLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BCLR_W, MIPS_INS_BCLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BEQ, MIPS_INS_BEQ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BEQ64, MIPS_INS_BEQ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BEQC, MIPS_INS_BEQC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BEQL, MIPS_INS_BEQL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BEQZ16_MM, MIPS_INS_BEQZ16, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BEQZALC, MIPS_INS_BEQZALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BEQZC, MIPS_INS_BEQZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BEQZC_MM, MIPS_INS_BEQZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BEQ_MM, MIPS_INS_BEQ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BGEC, MIPS_INS_BGEC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BGEUC, MIPS_INS_BGEUC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BGEZ, MIPS_INS_BGEZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BGEZ64, MIPS_INS_BGEZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BGEZAL, MIPS_INS_BGEZAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_BGEZALC, MIPS_INS_BGEZALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BGEZALL, MIPS_INS_BGEZALL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_BGEZALS_MM, MIPS_INS_BGEZALS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_BGEZAL_MM, MIPS_INS_BGEZAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_BGEZC, MIPS_INS_BGEZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BGEZL, MIPS_INS_BGEZL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BGEZ_MM, MIPS_INS_BGEZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BGTZ, MIPS_INS_BGTZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BGTZ64, MIPS_INS_BGTZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BGTZALC, MIPS_INS_BGTZALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BGTZC, MIPS_INS_BGTZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BGTZL, MIPS_INS_BGTZL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BGTZ_MM, MIPS_INS_BGTZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BINSLI_B, MIPS_INS_BINSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSLI_D, MIPS_INS_BINSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSLI_H, MIPS_INS_BINSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSLI_W, MIPS_INS_BINSLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSL_B, MIPS_INS_BINSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSL_D, MIPS_INS_BINSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSL_H, MIPS_INS_BINSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSL_W, MIPS_INS_BINSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSRI_B, MIPS_INS_BINSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSRI_D, MIPS_INS_BINSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSRI_H, MIPS_INS_BINSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSRI_W, MIPS_INS_BINSRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSR_B, MIPS_INS_BINSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSR_D, MIPS_INS_BINSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSR_H, MIPS_INS_BINSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BINSR_W, MIPS_INS_BINSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BITREV, MIPS_INS_BITREV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_BITSWAP, MIPS_INS_BITSWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_BLEZ, MIPS_INS_BLEZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BLEZ64, MIPS_INS_BLEZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BLEZALC, MIPS_INS_BLEZALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BLEZC, MIPS_INS_BLEZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BLEZL, MIPS_INS_BLEZL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BLEZ_MM, MIPS_INS_BLEZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BLTC, MIPS_INS_BLTC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BLTUC, MIPS_INS_BLTUC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BLTZ, MIPS_INS_BLTZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BLTZ64, MIPS_INS_BLTZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BLTZAL, MIPS_INS_BLTZAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_BLTZALC, MIPS_INS_BLTZALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BLTZALL, MIPS_INS_BLTZALL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_BLTZALS_MM, MIPS_INS_BLTZALS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_BLTZAL_MM, MIPS_INS_BLTZAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_BLTZC, MIPS_INS_BLTZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BLTZL, MIPS_INS_BLTZL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BLTZ_MM, MIPS_INS_BLTZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BMNZI_B, MIPS_INS_BMNZI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BMNZ_V, MIPS_INS_BMNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BMZI_B, MIPS_INS_BMZI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BMZ_V, MIPS_INS_BMZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNE, MIPS_INS_BNE, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BNE64, MIPS_INS_BNE, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_BNEC, MIPS_INS_BNEC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BNEGI_B, MIPS_INS_BNEGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEGI_D, MIPS_INS_BNEGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEGI_H, MIPS_INS_BNEGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEGI_W, MIPS_INS_BNEGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEG_B, MIPS_INS_BNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEG_D, MIPS_INS_BNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEG_H, MIPS_INS_BNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEG_W, MIPS_INS_BNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BNEL, MIPS_INS_BNEL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0 #endif }, { Mips_BNEZ16_MM, MIPS_INS_BNEZ16, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BNEZALC, MIPS_INS_BNEZALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BNEZC, MIPS_INS_BNEZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BNEZC_MM, MIPS_INS_BNEZC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BNE_MM, MIPS_INS_BNE, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MICROMIPS, 0 }, 1, 0 #endif }, { Mips_BNVC, MIPS_INS_BNVC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BNZ_B, MIPS_INS_BNZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BNZ_D, MIPS_INS_BNZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BNZ_H, MIPS_INS_BNZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BNZ_V, MIPS_INS_BNZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BNZ_W, MIPS_INS_BNZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BOVC, MIPS_INS_BOVC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0 #endif }, { Mips_BPOSGE32, MIPS_INS_BPOSGE32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_DSP, 0 }, 1, 0 #endif }, { Mips_BREAK, MIPS_INS_BREAK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_BREAK16_MM, MIPS_INS_BREAK16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_BREAK_MM, MIPS_INS_BREAK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_BSELI_B, MIPS_INS_BSELI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSEL_V, MIPS_INS_BSEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSETI_B, MIPS_INS_BSETI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSETI_D, MIPS_INS_BSETI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSETI_H, MIPS_INS_BSETI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSETI_W, MIPS_INS_BSETI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSET_B, MIPS_INS_BSET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSET_D, MIPS_INS_BSET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSET_H, MIPS_INS_BSET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BSET_W, MIPS_INS_BSET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_BZ_B, MIPS_INS_BZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BZ_D, MIPS_INS_BZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BZ_H, MIPS_INS_BZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BZ_V, MIPS_INS_BZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BZ_W, MIPS_INS_BZ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MSA, 0 }, 1, 0 #endif }, { Mips_BeqzRxImm16, MIPS_INS_BEQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_BeqzRxImmX16, MIPS_INS_BEQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_Bimm16, MIPS_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_BimmX16, MIPS_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_BnezRxImm16, MIPS_INS_BNEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_BnezRxImmX16, MIPS_INS_BNEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_Break16, MIPS_INS_BREAK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_Bteqz16, MIPS_INS_BTEQZ, #ifndef CAPSTONE_DIET { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_BteqzX16, MIPS_INS_BTEQZ, #ifndef CAPSTONE_DIET { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_Btnez16, MIPS_INS_BTNEZ, #ifndef CAPSTONE_DIET { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_BtnezX16, MIPS_INS_BTNEZ, #ifndef CAPSTONE_DIET { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_BRANCH_RELATIVE, MIPS_GRP_MIPS16MODE, 0 }, 1, 0 #endif }, { Mips_CACHE, MIPS_INS_CACHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_CACHE_MM, MIPS_INS_CACHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CACHE_R6, MIPS_INS_CACHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CEIL_L_D64, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CEIL_L_S, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CEIL_W_D32, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_CEIL_W_D64, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CEIL_W_MM, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CEIL_W_S, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_CEIL_W_S_MM, MIPS_INS_CEIL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CEQI_B, MIPS_INS_CEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQI_D, MIPS_INS_CEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQI_H, MIPS_INS_CEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQI_W, MIPS_INS_CEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQ_B, MIPS_INS_CEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQ_D, MIPS_INS_CEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQ_H, MIPS_INS_CEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CEQ_W, MIPS_INS_CEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CFC1, MIPS_INS_CFC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_CFC1_MM, MIPS_INS_CFC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CFCMSA, MIPS_INS_CFCMSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CINS, MIPS_INS_CINS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_CINS32, MIPS_INS_CINS32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_CLASS_D, MIPS_INS_CLASS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CLASS_S, MIPS_INS_CLASS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CLEI_S_B, MIPS_INS_CLEI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_S_D, MIPS_INS_CLEI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_S_H, MIPS_INS_CLEI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_S_W, MIPS_INS_CLEI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_U_B, MIPS_INS_CLEI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_U_D, MIPS_INS_CLEI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_U_H, MIPS_INS_CLEI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLEI_U_W, MIPS_INS_CLEI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_S_B, MIPS_INS_CLE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_S_D, MIPS_INS_CLE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_S_H, MIPS_INS_CLE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_S_W, MIPS_INS_CLE_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_U_B, MIPS_INS_CLE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_U_D, MIPS_INS_CLE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_U_H, MIPS_INS_CLE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLE_U_W, MIPS_INS_CLE_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLO, MIPS_INS_CLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_CLO_MM, MIPS_INS_CLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CLO_R6, MIPS_INS_CLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CLTI_S_B, MIPS_INS_CLTI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_S_D, MIPS_INS_CLTI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_S_H, MIPS_INS_CLTI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_S_W, MIPS_INS_CLTI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_U_B, MIPS_INS_CLTI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_U_D, MIPS_INS_CLTI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_U_H, MIPS_INS_CLTI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLTI_U_W, MIPS_INS_CLTI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_S_B, MIPS_INS_CLT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_S_D, MIPS_INS_CLT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_S_H, MIPS_INS_CLT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_S_W, MIPS_INS_CLT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_U_B, MIPS_INS_CLT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_U_D, MIPS_INS_CLT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_U_H, MIPS_INS_CLT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLT_U_W, MIPS_INS_CLT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CLZ, MIPS_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_CLZ_MM, MIPS_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CLZ_R6, MIPS_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMPGDU_EQ_QB, MIPS_INS_CMPGDU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_CMPGDU_LE_QB, MIPS_INS_CMPGDU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_CMPGDU_LT_QB, MIPS_INS_CMPGDU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_CMPGU_EQ_QB, MIPS_INS_CMPGU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMPGU_LE_QB, MIPS_INS_CMPGU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMPGU_LT_QB, MIPS_INS_CMPGU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMPU_EQ_QB, MIPS_INS_CMPU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMPU_LE_QB, MIPS_INS_CMPU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMPU_LT_QB, MIPS_INS_CMPU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMP_EQ_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_EQ_PH, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMP_EQ_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_F_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_F_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_LE_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_LE_PH, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMP_LE_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_LT_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_LT_PH, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_CMP_LT_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SAF_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SAF_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SEQ_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SEQ_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SLE_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SLE_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SLT_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SLT_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SUEQ_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SUEQ_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SULE_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SULE_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SULT_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SULT_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SUN_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_SUN_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_UEQ_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_UEQ_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_ULE_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_ULE_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_ULT_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_ULT_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_UN_D, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_CMP_UN_S, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_COPY_S_B, MIPS_INS_COPY_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_COPY_S_D, MIPS_INS_COPY_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_COPY_S_H, MIPS_INS_COPY_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_COPY_S_W, MIPS_INS_COPY_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_COPY_U_B, MIPS_INS_COPY_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_COPY_U_D, MIPS_INS_COPY_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_COPY_U_H, MIPS_INS_COPY_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_COPY_U_W, MIPS_INS_COPY_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CTC1, MIPS_INS_CTC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_CTC1_MM, MIPS_INS_CTC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CTCMSA, MIPS_INS_CTCMSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_CVT_D32_S, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_D32_W, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_D32_W_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_D64_L, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_D64_S, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_D64_W, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_D_S_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_L_D64, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32R2, 0 }, 0, 0 #endif }, { Mips_CVT_L_D64_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_L_S, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32R2, 0 }, 0, 0 #endif }, { Mips_CVT_L_S_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_S_D32, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_S_D32_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_S_D64, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_S_L, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_S_W, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_CVT_S_W_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_W_D32, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_W_D64, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_CVT_W_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_CVT_W_S, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_CVT_W_S_MM, MIPS_INS_CVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_C_EQ_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_EQ_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_EQ_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_F_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_F_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_F_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_LE_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_LE_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_LE_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_LT_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_LT_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_LT_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_NGE_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGE_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGE_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_NGLE_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGLE_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGLE_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_NGL_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGL_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGL_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_NGT_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGT_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_NGT_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_OLE_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_OLE_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_OLE_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_OLT_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_OLT_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_OLT_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_SEQ_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_SEQ_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_SEQ_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_SF_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_SF_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_SF_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_UEQ_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_UEQ_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_UEQ_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_ULE_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_ULE_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_ULE_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_ULT_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_ULT_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_ULT_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_C_UN_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_C_UN_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_C_UN_S, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_CmpRxRy16, MIPS_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_CmpiRxImm16, MIPS_INS_CMPI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_CmpiRxImmX16, MIPS_INS_CMPI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_DADD, MIPS_INS_DADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DADDi, MIPS_INS_DADDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DADDiu, MIPS_INS_DADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DADDu, MIPS_INS_DADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DAHI, MIPS_INS_DAHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DALIGN, MIPS_INS_DALIGN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DATI, MIPS_INS_DATI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DAUI, MIPS_INS_DAUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DBITSWAP, MIPS_INS_DBITSWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DCLO, MIPS_INS_DCLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DCLO_R6, MIPS_INS_DCLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DCLZ, MIPS_INS_DCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DCLZ_R6, MIPS_INS_DCLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DDIV, MIPS_INS_DDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DDIVU, MIPS_INS_DDIVU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DERET, MIPS_INS_DERET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0 #endif }, { Mips_DERET_MM, MIPS_INS_DERET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_DEXT, MIPS_INS_DEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DEXTM, MIPS_INS_DEXTM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DEXTU, MIPS_INS_DEXTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DI, MIPS_INS_DI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DINS, MIPS_INS_DINS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DINSM, MIPS_INS_DINSM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DINSU, MIPS_INS_DINSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_DIV, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_DIVU, MIPS_INS_DIVU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_DIV_S_B, MIPS_INS_DIV_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_S_D, MIPS_INS_DIV_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_S_H, MIPS_INS_DIV_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_S_W, MIPS_INS_DIV_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_U_B, MIPS_INS_DIV_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_U_D, MIPS_INS_DIV_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_U_H, MIPS_INS_DIV_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DIV_U_W, MIPS_INS_DIV_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DI_MM, MIPS_INS_DI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_DLSA, MIPS_INS_DLSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_DLSA_R6, MIPS_INS_DLSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMFC0, MIPS_INS_DMFC0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_DMFC1, MIPS_INS_DMFC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DMFC2, MIPS_INS_DMFC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_DMOD, MIPS_INS_DMOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMODU, MIPS_INS_DMODU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMTC0, MIPS_INS_DMTC0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_DMTC1, MIPS_INS_DMTC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DMTC2, MIPS_INS_DMTC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_DMUH, MIPS_INS_DMUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMUHU, MIPS_INS_DMUHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMUL, MIPS_INS_DMUL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_DMULT, MIPS_INS_DMULT, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMULTu, MIPS_INS_DMULTU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMULU, MIPS_INS_DMULU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DMUL_R6, MIPS_INS_DMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_DOTP_S_D, MIPS_INS_DOTP_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DOTP_S_H, MIPS_INS_DOTP_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DOTP_S_W, MIPS_INS_DOTP_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DOTP_U_D, MIPS_INS_DOTP_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DOTP_U_H, MIPS_INS_DOTP_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DOTP_U_W, MIPS_INS_DOTP_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPADD_S_D, MIPS_INS_DPADD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPADD_S_H, MIPS_INS_DPADD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPADD_S_W, MIPS_INS_DPADD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPADD_U_D, MIPS_INS_DPADD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPADD_U_H, MIPS_INS_DPADD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPADD_U_W, MIPS_INS_DPADD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPAQX_SA_W_PH, MIPS_INS_DPAQX_SA, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPAQX_S_W_PH, MIPS_INS_DPAQX_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPAQ_SA_L_W, MIPS_INS_DPAQ_SA, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPAQ_S_W_PH, MIPS_INS_DPAQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPAU_H_QBL, MIPS_INS_DPAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPAU_H_QBR, MIPS_INS_DPAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPAX_W_PH, MIPS_INS_DPAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPA_W_PH, MIPS_INS_DPA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPOP, MIPS_INS_DPOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_DPSQX_SA_W_PH, MIPS_INS_DPSQX_SA, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPSQX_S_W_PH, MIPS_INS_DPSQX_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPSQ_SA_L_W, MIPS_INS_DPSQ_SA, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPSQ_S_W_PH, MIPS_INS_DPSQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPSUB_S_D, MIPS_INS_DPSUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPSUB_S_H, MIPS_INS_DPSUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPSUB_S_W, MIPS_INS_DPSUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPSUB_U_D, MIPS_INS_DPSUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPSUB_U_H, MIPS_INS_DPSUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPSUB_U_W, MIPS_INS_DPSUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_DPSU_H_QBL, MIPS_INS_DPSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPSU_H_QBR, MIPS_INS_DPSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_DPSX_W_PH, MIPS_INS_DPSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DPS_W_PH, MIPS_INS_DPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_DROTR, MIPS_INS_DROTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0 #endif }, { Mips_DROTR32, MIPS_INS_DROTR32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0 #endif }, { Mips_DROTRV, MIPS_INS_DROTRV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0 #endif }, { Mips_DSBH, MIPS_INS_DSBH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0 #endif }, { Mips_DSDIV, MIPS_INS_DDIV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DSHD, MIPS_INS_DSHD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0 #endif }, { Mips_DSLL, MIPS_INS_DSLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSLL32, MIPS_INS_DSLL32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSLL64_32, MIPS_INS_DSLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_DSLLV, MIPS_INS_DSLLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSRA, MIPS_INS_DSRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSRA32, MIPS_INS_DSRA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSRAV, MIPS_INS_DSRAV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSRL, MIPS_INS_DSRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSRL32, MIPS_INS_DSRL32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSRLV, MIPS_INS_DSRLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSUB, MIPS_INS_DSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DSUBu, MIPS_INS_DSUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_DUDIV, MIPS_INS_DDIVU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_DivRxRy16, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_DivuRxRy16, MIPS_INS_DIVU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_EHB, MIPS_INS_EHB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_EHB_MM, MIPS_INS_EHB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_EI, MIPS_INS_EI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_EI_MM, MIPS_INS_EI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ERET, MIPS_INS_ERET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, 0 }, 0, 0 #endif }, { Mips_ERET_MM, MIPS_INS_ERET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_EXT, MIPS_INS_EXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_EXTP, MIPS_INS_EXTP, #ifndef CAPSTONE_DIET { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTPDP, MIPS_INS_EXTPDP, #ifndef CAPSTONE_DIET { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPPOS, MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTPDPV, MIPS_INS_EXTPDPV, #ifndef CAPSTONE_DIET { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPPOS, MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTPV, MIPS_INS_EXTPV, #ifndef CAPSTONE_DIET { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTRV_RS_W, MIPS_INS_EXTRV_RS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTRV_R_W, MIPS_INS_EXTRV_R, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTRV_S_H, MIPS_INS_EXTRV_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTRV_W, MIPS_INS_EXTRV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTR_RS_W, MIPS_INS_EXTR_RS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTR_R_W, MIPS_INS_EXTR_R, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTR_S_H, MIPS_INS_EXTR_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTR_W, MIPS_INS_EXTR, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_EXTS, MIPS_INS_EXTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_EXTS32, MIPS_INS_EXTS32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_EXT_MM, MIPS_INS_EXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FABS_D32, MIPS_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FABS_D64, MIPS_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FABS_MM, MIPS_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FABS_S, MIPS_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FABS_S_MM, MIPS_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FADD_D, MIPS_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FADD_D32, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FADD_D64, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FADD_MM, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FADD_S, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FADD_S_MM, MIPS_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FADD_W, MIPS_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCAF_D, MIPS_INS_FCAF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCAF_W, MIPS_INS_FCAF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCEQ_D, MIPS_INS_FCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCEQ_W, MIPS_INS_FCEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCLASS_D, MIPS_INS_FCLASS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCLASS_W, MIPS_INS_FCLASS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCLE_D, MIPS_INS_FCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCLE_W, MIPS_INS_FCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCLT_D, MIPS_INS_FCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCLT_W, MIPS_INS_FCLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCMP_D32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FCMP_D32_MM, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FCMP_D64, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FCMP_S32, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_FCMP_S32_MM, MIPS_INS_C, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FCNE_D, MIPS_INS_FCNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCNE_W, MIPS_INS_FCNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCOR_D, MIPS_INS_FCOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCOR_W, MIPS_INS_FCOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCUEQ_D, MIPS_INS_FCUEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCUEQ_W, MIPS_INS_FCUEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCULE_D, MIPS_INS_FCULE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCULE_W, MIPS_INS_FCULE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCULT_D, MIPS_INS_FCULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCULT_W, MIPS_INS_FCULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCUNE_D, MIPS_INS_FCUNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCUNE_W, MIPS_INS_FCUNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCUN_D, MIPS_INS_FCUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FCUN_W, MIPS_INS_FCUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FDIV_D, MIPS_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FDIV_D32, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FDIV_D64, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FDIV_MM, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FDIV_S, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FDIV_S_MM, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FDIV_W, MIPS_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXDO_H, MIPS_INS_FEXDO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXDO_W, MIPS_INS_FEXDO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXP2_D, MIPS_INS_FEXP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXP2_W, MIPS_INS_FEXP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXUPL_D, MIPS_INS_FEXUPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXUPL_W, MIPS_INS_FEXUPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXUPR_D, MIPS_INS_FEXUPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FEXUPR_W, MIPS_INS_FEXUPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFINT_S_D, MIPS_INS_FFINT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFINT_S_W, MIPS_INS_FFINT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFINT_U_D, MIPS_INS_FFINT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFINT_U_W, MIPS_INS_FFINT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFQL_D, MIPS_INS_FFQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFQL_W, MIPS_INS_FFQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFQR_D, MIPS_INS_FFQR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FFQR_W, MIPS_INS_FFQR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FILL_B, MIPS_INS_FILL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FILL_D, MIPS_INS_FILL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_FILL_H, MIPS_INS_FILL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FILL_W, MIPS_INS_FILL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FLOG2_D, MIPS_INS_FLOG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FLOG2_W, MIPS_INS_FLOG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FLOOR_L_D64, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FLOOR_L_S, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FLOOR_W_D32, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FLOOR_W_D64, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FLOOR_W_MM, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FLOOR_W_S, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_FLOOR_W_S_MM, MIPS_INS_FLOOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FMADD_D, MIPS_INS_FMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMADD_W, MIPS_INS_FMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMAX_A_D, MIPS_INS_FMAX_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMAX_A_W, MIPS_INS_FMAX_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMAX_D, MIPS_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMAX_W, MIPS_INS_FMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMIN_A_D, MIPS_INS_FMIN_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMIN_A_W, MIPS_INS_FMIN_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMIN_D, MIPS_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMIN_W, MIPS_INS_FMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMOV_D32, MIPS_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FMOV_D32_MM, MIPS_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FMOV_D64, MIPS_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FMOV_S, MIPS_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FMOV_S_MM, MIPS_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FMSUB_D, MIPS_INS_FMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMSUB_W, MIPS_INS_FMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMUL_D, MIPS_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FMUL_D32, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FMUL_D64, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FMUL_MM, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FMUL_S, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FMUL_S_MM, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FMUL_W, MIPS_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FNEG_D32, MIPS_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FNEG_D64, MIPS_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FNEG_MM, MIPS_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FNEG_S, MIPS_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FNEG_S_MM, MIPS_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FRCP_D, MIPS_INS_FRCP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FRCP_W, MIPS_INS_FRCP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FRINT_D, MIPS_INS_FRINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FRINT_W, MIPS_INS_FRINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FRSQRT_D, MIPS_INS_FRSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FRSQRT_W, MIPS_INS_FRSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSAF_D, MIPS_INS_FSAF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSAF_W, MIPS_INS_FSAF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSEQ_D, MIPS_INS_FSEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSEQ_W, MIPS_INS_FSEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSLE_D, MIPS_INS_FSLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSLE_W, MIPS_INS_FSLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSLT_D, MIPS_INS_FSLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSLT_W, MIPS_INS_FSLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSNE_D, MIPS_INS_FSNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSNE_W, MIPS_INS_FSNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSOR_D, MIPS_INS_FSOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSOR_W, MIPS_INS_FSOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSQRT_D, MIPS_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSQRT_D32, MIPS_INS_SQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FSQRT_D64, MIPS_INS_SQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FSQRT_MM, MIPS_INS_SQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FSQRT_S, MIPS_INS_SQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_FSQRT_S_MM, MIPS_INS_SQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FSQRT_W, MIPS_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUB_D, MIPS_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUB_D32, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_FSUB_D64, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_FSUB_MM, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FSUB_S, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_FSUB_S_MM, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_FSUB_W, MIPS_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUEQ_D, MIPS_INS_FSUEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUEQ_W, MIPS_INS_FSUEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSULE_D, MIPS_INS_FSULE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSULE_W, MIPS_INS_FSULE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSULT_D, MIPS_INS_FSULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSULT_W, MIPS_INS_FSULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUNE_D, MIPS_INS_FSUNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUNE_W, MIPS_INS_FSUNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUN_D, MIPS_INS_FSUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FSUN_W, MIPS_INS_FSUN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTINT_S_D, MIPS_INS_FTINT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTINT_S_W, MIPS_INS_FTINT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTINT_U_D, MIPS_INS_FTINT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTINT_U_W, MIPS_INS_FTINT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTQ_H, MIPS_INS_FTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTQ_W, MIPS_INS_FTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTRUNC_S_D, MIPS_INS_FTRUNC_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTRUNC_S_W, MIPS_INS_FTRUNC_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTRUNC_U_D, MIPS_INS_FTRUNC_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_FTRUNC_U_W, MIPS_INS_FTRUNC_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HADD_S_D, MIPS_INS_HADD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HADD_S_H, MIPS_INS_HADD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HADD_S_W, MIPS_INS_HADD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HADD_U_D, MIPS_INS_HADD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HADD_U_H, MIPS_INS_HADD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HADD_U_W, MIPS_INS_HADD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HSUB_S_D, MIPS_INS_HSUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HSUB_S_H, MIPS_INS_HSUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HSUB_S_W, MIPS_INS_HSUB_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HSUB_U_D, MIPS_INS_HSUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HSUB_U_H, MIPS_INS_HSUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_HSUB_U_W, MIPS_INS_HSUB_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVEV_B, MIPS_INS_ILVEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVEV_D, MIPS_INS_ILVEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVEV_H, MIPS_INS_ILVEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVEV_W, MIPS_INS_ILVEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVL_B, MIPS_INS_ILVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVL_D, MIPS_INS_ILVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVL_H, MIPS_INS_ILVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVL_W, MIPS_INS_ILVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVOD_B, MIPS_INS_ILVOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVOD_D, MIPS_INS_ILVOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVOD_H, MIPS_INS_ILVOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVOD_W, MIPS_INS_ILVOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVR_B, MIPS_INS_ILVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVR_D, MIPS_INS_ILVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVR_H, MIPS_INS_ILVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ILVR_W, MIPS_INS_ILVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INS, MIPS_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_INSERT_B, MIPS_INS_INSERT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INSERT_D, MIPS_INS_INSERT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_INSERT_H, MIPS_INS_INSERT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INSERT_W, MIPS_INS_INSERT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INSV, MIPS_INS_INSV, #ifndef CAPSTONE_DIET { MIPS_REG_DSPPOS, MIPS_REG_DSPSCOUNT, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_INSVE_B, MIPS_INS_INSVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INSVE_D, MIPS_INS_INSVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INSVE_H, MIPS_INS_INSVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INSVE_W, MIPS_INS_INSVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_INS_MM, MIPS_INS_INS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_J, MIPS_INS_J, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0 #endif }, { Mips_JAL, MIPS_INS_JAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_JALR, MIPS_INS_JALR, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_JALR16_MM, MIPS_INS_JALR, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_JALR64, MIPS_INS_JALR, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_JALRS16_MM, MIPS_INS_JALRS16, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_JALRS_MM, MIPS_INS_JALRS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_JALR_HB, MIPS_INS_JALR_HB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_CALL, 0 }, 0, 1 #endif }, { Mips_JALR_MM, MIPS_INS_JALR, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_JALS_MM, MIPS_INS_JALS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_JALX, MIPS_INS_JALX, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_JALX_MM, MIPS_INS_JALX, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_JAL_MM, MIPS_INS_JAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_JIALC, MIPS_INS_JIALC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_JIC, MIPS_INS_JIC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_JR, MIPS_INS_JR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 1, 1 #endif }, { Mips_JR16_MM, MIPS_INS_JR16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1 #endif }, { Mips_JR64, MIPS_INS_JR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 1, 1 #endif }, { Mips_JRADDIUSP, MIPS_INS_JRADDIUSP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1 #endif }, { Mips_JRC16_MM, MIPS_INS_JRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1 #endif }, { Mips_JR_HB, MIPS_INS_JR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 1 #endif }, { Mips_JR_HB_R6, MIPS_INS_JR_HB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 1 #endif }, { Mips_JR_MM, MIPS_INS_JR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1 #endif }, { Mips_J_MM, MIPS_INS_J, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_Jal16, MIPS_INS_JAL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_JrRa16, MIPS_INS_JR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1 #endif }, { Mips_JrcRa16, MIPS_INS_JRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1 #endif }, { Mips_JrcRx16, MIPS_INS_JRC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1 #endif }, { Mips_JumpLinkReg16, MIPS_INS_JALRC, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, MIPS_GRP_CALL, 0 }, 0, 0 #endif }, { Mips_LB, MIPS_INS_LB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LB64, MIPS_INS_LB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LBU16_MM, MIPS_INS_LBU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LBUX, MIPS_INS_LBUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_LB_MM, MIPS_INS_LB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LBu, MIPS_INS_LBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LBu64, MIPS_INS_LBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LBu_MM, MIPS_INS_LBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LD, MIPS_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_LDC1, MIPS_INS_LDC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_LDC164, MIPS_INS_LDC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_LDC1_MM, MIPS_INS_LDC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LDC2, MIPS_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LDC2_R6, MIPS_INS_LDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LDC3, MIPS_INS_LDC3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LDI_B, MIPS_INS_LDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LDI_D, MIPS_INS_LDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LDI_H, MIPS_INS_LDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LDI_W, MIPS_INS_LDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LDL, MIPS_INS_LDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_LDPC, MIPS_INS_LDPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0 #endif }, { Mips_LDR, MIPS_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_LDXC1, MIPS_INS_LDXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, 0 }, 0, 0 #endif }, { Mips_LDXC164, MIPS_INS_LDXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_LD_B, MIPS_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LD_D, MIPS_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LD_H, MIPS_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LD_W, MIPS_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LEA_ADDiu, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LEA_ADDiu64, MIPS_INS_DADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LEA_ADDiu_MM, MIPS_INS_ADDIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LH, MIPS_INS_LH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LH64, MIPS_INS_LH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LHU16_MM, MIPS_INS_LHU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LHX, MIPS_INS_LHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_LH_MM, MIPS_INS_LH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LHu, MIPS_INS_LHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LHu64, MIPS_INS_LHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LHu_MM, MIPS_INS_LHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LI16_MM, MIPS_INS_LI16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LL, MIPS_INS_LL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LLD, MIPS_INS_LLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_LLD_R6, MIPS_INS_LLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LL_MM, MIPS_INS_LL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LL_R6, MIPS_INS_LL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LSA, MIPS_INS_LSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_LSA_R6, MIPS_INS_LSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LUXC1, MIPS_INS_LUXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0 #endif }, { Mips_LUXC164, MIPS_INS_LUXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_LUXC1_MM, MIPS_INS_LUXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LUi, MIPS_INS_LUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LUi64, MIPS_INS_LUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LUi_MM, MIPS_INS_LUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LW, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LW16_MM, MIPS_INS_LW16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LW64, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LWC1, MIPS_INS_LWC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LWC1_MM, MIPS_INS_LWC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWC2, MIPS_INS_LWC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWC2_R6, MIPS_INS_LWC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LWC3, MIPS_INS_LWC3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWGP_MM, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWL, MIPS_INS_LWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWL64, MIPS_INS_LWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LWL_MM, MIPS_INS_LWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWM16_MM, MIPS_INS_LWM16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWM32_MM, MIPS_INS_LWM32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWPC, MIPS_INS_LWPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LWP_MM, MIPS_INS_LWP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWR, MIPS_INS_LWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWR64, MIPS_INS_LWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_LWR_MM, MIPS_INS_LWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWSP_MM, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWUPC, MIPS_INS_LWUPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_LWU_MM, MIPS_INS_LWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWX, MIPS_INS_LWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_LWXC1, MIPS_INS_LWXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0 #endif }, { Mips_LWXC1_MM, MIPS_INS_LWXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWXS_MM, MIPS_INS_LWXS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LW_MM, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_LWu, MIPS_INS_LWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_LbRxRyOffMemX16, MIPS_INS_LB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LbuRxRyOffMemX16, MIPS_INS_LBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LhRxRyOffMemX16, MIPS_INS_LH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LhuRxRyOffMemX16, MIPS_INS_LHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LiRxImm16, MIPS_INS_LI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LiRxImmX16, MIPS_INS_LI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LwRxPcTcp16, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LwRxPcTcpX16, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LwRxRyOffMemX16, MIPS_INS_LW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_LwRxSpImmX16, MIPS_INS_LW, #ifndef CAPSTONE_DIET { MIPS_REG_SP, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_MADD, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MADDF_D, MIPS_INS_MADDF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MADDF_S, MIPS_INS_MADDF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MADDR_Q_H, MIPS_INS_MADDR_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADDR_Q_W, MIPS_INS_MADDR_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADDU, MIPS_INS_MADDU, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MADDU_DSP, MIPS_INS_MADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MADDU_MM, MIPS_INS_MADDU, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MADDV_B, MIPS_INS_MADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADDV_D, MIPS_INS_MADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADDV_H, MIPS_INS_MADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADDV_W, MIPS_INS_MADDV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADD_D32, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MADD_D32_MM, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MADD_D64, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MADD_DSP, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MADD_MM, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MADD_Q_H, MIPS_INS_MADD_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADD_Q_W, MIPS_INS_MADD_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MADD_S, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MADD_S_MM, MIPS_INS_MADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MAQ_SA_W_PHL, MIPS_INS_MAQ_SA, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MAQ_SA_W_PHR, MIPS_INS_MAQ_SA, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MAQ_S_W_PHL, MIPS_INS_MAQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MAQ_S_W_PHR, MIPS_INS_MAQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MAXA_D, MIPS_INS_MAXA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MAXA_S, MIPS_INS_MAXA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MAXI_S_B, MIPS_INS_MAXI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_S_D, MIPS_INS_MAXI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_S_H, MIPS_INS_MAXI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_S_W, MIPS_INS_MAXI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_U_B, MIPS_INS_MAXI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_U_D, MIPS_INS_MAXI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_U_H, MIPS_INS_MAXI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAXI_U_W, MIPS_INS_MAXI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_A_B, MIPS_INS_MAX_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_A_D, MIPS_INS_MAX_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_A_H, MIPS_INS_MAX_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_A_W, MIPS_INS_MAX_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_D, MIPS_INS_MAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MAX_S, MIPS_INS_MAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MAX_S_B, MIPS_INS_MAX_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_S_D, MIPS_INS_MAX_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_S_H, MIPS_INS_MAX_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_S_W, MIPS_INS_MAX_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_U_B, MIPS_INS_MAX_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_U_D, MIPS_INS_MAX_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_U_H, MIPS_INS_MAX_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MAX_U_W, MIPS_INS_MAX_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MFC0, MIPS_INS_MFC0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0 #endif }, { Mips_MFC1, MIPS_INS_MFC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_MFC1_MM, MIPS_INS_MFC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFC2, MIPS_INS_MFC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_MFHC1_D32, MIPS_INS_MFHC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_MFHC1_D64, MIPS_INS_MFHC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_MFHC1_MM, MIPS_INS_MFHC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFHI, MIPS_INS_MFHI, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFHI16_MM, MIPS_INS_MFHI, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFHI64, MIPS_INS_MFHI, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MFHI_DSP, MIPS_INS_MFHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MFHI_MM, MIPS_INS_MFHI, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFLO, MIPS_INS_MFLO, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFLO16_MM, MIPS_INS_MFLO, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MFLO64, MIPS_INS_MFLO, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MFLO_DSP, MIPS_INS_MFLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MFLO_MM, MIPS_INS_MFLO, #ifndef CAPSTONE_DIET { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MINA_D, MIPS_INS_MINA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MINA_S, MIPS_INS_MINA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MINI_S_B, MIPS_INS_MINI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_S_D, MIPS_INS_MINI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_S_H, MIPS_INS_MINI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_S_W, MIPS_INS_MINI_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_U_B, MIPS_INS_MINI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_U_D, MIPS_INS_MINI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_U_H, MIPS_INS_MINI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MINI_U_W, MIPS_INS_MINI_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_A_B, MIPS_INS_MIN_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_A_D, MIPS_INS_MIN_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_A_H, MIPS_INS_MIN_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_A_W, MIPS_INS_MIN_A, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_D, MIPS_INS_MIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MIN_S, MIPS_INS_MIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MIN_S_B, MIPS_INS_MIN_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_S_D, MIPS_INS_MIN_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_S_H, MIPS_INS_MIN_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_S_W, MIPS_INS_MIN_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_U_B, MIPS_INS_MIN_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_U_D, MIPS_INS_MIN_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_U_H, MIPS_INS_MIN_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MIN_U_W, MIPS_INS_MIN_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD, MIPS_INS_MOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MODSUB, MIPS_INS_MODSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MODU, MIPS_INS_MODU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MOD_S_B, MIPS_INS_MOD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_S_D, MIPS_INS_MOD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_S_H, MIPS_INS_MOD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_S_W, MIPS_INS_MOD_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_U_B, MIPS_INS_MOD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_U_D, MIPS_INS_MOD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_U_H, MIPS_INS_MOD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOD_U_W, MIPS_INS_MOD_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOVE16_MM, MIPS_INS_MOVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVEP_MM, MIPS_INS_MOVEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVE_V, MIPS_INS_MOVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MOVF_D32, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVF_D32_MM, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVF_D64, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVF_I, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVF_I64, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0 #endif }, { Mips_MOVF_I_MM, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVF_S, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVF_S_MM, MIPS_INS_MOVF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVN_I64_D64, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I64_I, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I64_I64, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I64_S, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0 #endif }, { Mips_MOVN_I_D32, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I_D32_MM, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVN_I_D64, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I_I, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I_I64, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I_MM, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVN_I_S, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVN_I_S_MM, MIPS_INS_MOVN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVT_D32, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVT_D32_MM, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVT_D64, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVT_I, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVT_I64, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0 #endif }, { Mips_MOVT_I_MM, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVT_S, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVT_S_MM, MIPS_INS_MOVT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVZ_I64_D64, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I64_I, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I64_I64, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I64_S, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_MIPS64, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_D32, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_D32_MM, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_D64, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_I, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_I64, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_MM, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_S, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MOVZ_I_S_MM, MIPS_INS_MOVZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MSUB, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MSUBF_D, MIPS_INS_MSUBF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MSUBF_S, MIPS_INS_MSUBF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MSUBR_Q_H, MIPS_INS_MSUBR_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUBR_Q_W, MIPS_INS_MSUBR_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUBU, MIPS_INS_MSUBU, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MSUBU_DSP, MIPS_INS_MSUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MSUBU_MM, MIPS_INS_MSUBU, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MSUBV_B, MIPS_INS_MSUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUBV_D, MIPS_INS_MSUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUBV_H, MIPS_INS_MSUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUBV_W, MIPS_INS_MSUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUB_D32, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MSUB_D32_MM, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MSUB_D64, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MSUB_DSP, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MSUB_MM, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MSUB_Q_H, MIPS_INS_MSUB_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUB_Q_W, MIPS_INS_MSUB_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MSUB_S, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MSUB_S_MM, MIPS_INS_MSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MTC0, MIPS_INS_MTC0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0 #endif }, { Mips_MTC1, MIPS_INS_MTC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_MTC1_MM, MIPS_INS_MTC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MTC2, MIPS_INS_MTC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_MTHC1_D32, MIPS_INS_MTHC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_MTHC1_D64, MIPS_INS_MTHC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_MTHC1_MM, MIPS_INS_MTHC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MTHI, MIPS_INS_MTHI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MTHI64, MIPS_INS_MTHI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MTHI_DSP, MIPS_INS_MTHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MTHI_MM, MIPS_INS_MTHI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MTHLIP, MIPS_INS_MTHLIP, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPPOS, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MTLO, MIPS_INS_MTLO, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MTLO64, MIPS_INS_MTLO, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MTLO_DSP, MIPS_INS_MTLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MTLO_MM, MIPS_INS_MTLO, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MTM0, MIPS_INS_MTM0, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_MPL0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_MTM1, MIPS_INS_MTM1, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_MPL1, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_MTM2, MIPS_INS_MTM2, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_MTP0, MIPS_INS_MTP0, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_P0, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_MTP1, MIPS_INS_MTP1, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_P1, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_MTP2, MIPS_INS_MTP2, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_MUH, MIPS_INS_MUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MUHU, MIPS_INS_MUHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MUL, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MULEQ_S_W_PHL, MIPS_INS_MULEQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULEQ_S_W_PHR, MIPS_INS_MULEQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULEU_S_PH_QBL, MIPS_INS_MULEU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULEU_S_PH_QBR, MIPS_INS_MULEU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULQ_RS_PH, MIPS_INS_MULQ_RS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULQ_RS_W, MIPS_INS_MULQ_RS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_MULQ_S_PH, MIPS_INS_MULQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_MULQ_S_W, MIPS_INS_MULQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_MULR_Q_H, MIPS_INS_MULR_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MULR_Q_W, MIPS_INS_MULR_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MULSAQ_S_W_PH, MIPS_INS_MULSAQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULSA_W_PH, MIPS_INS_MULSA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_MULT, MIPS_INS_MULT, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MULTU_DSP, MIPS_INS_MULTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULT_DSP, MIPS_INS_MULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_MULT_MM, MIPS_INS_MULT, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MULTu, MIPS_INS_MULTU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_MULTu_MM, MIPS_INS_MULTU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MULU, MIPS_INS_MULU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MULV_B, MIPS_INS_MULV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MULV_D, MIPS_INS_MULV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MULV_H, MIPS_INS_MULV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MULV_W, MIPS_INS_MULV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MUL_MM, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_MUL_PH, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_MUL_Q_H, MIPS_INS_MUL_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MUL_Q_W, MIPS_INS_MUL_Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_MUL_R6, MIPS_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_MUL_S_PH, MIPS_INS_MUL_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_Mfhi16, MIPS_INS_MFHI, #ifndef CAPSTONE_DIET { MIPS_REG_HI0, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_Mflo16, MIPS_INS_MFLO, #ifndef CAPSTONE_DIET { MIPS_REG_LO0, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_Move32R16, MIPS_INS_MOVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_MoveR3216, MIPS_INS_MOVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_NLOC_B, MIPS_INS_NLOC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLOC_D, MIPS_INS_NLOC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLOC_H, MIPS_INS_NLOC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLOC_W, MIPS_INS_NLOC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLZC_B, MIPS_INS_NLZC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLZC_D, MIPS_INS_NLZC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLZC_H, MIPS_INS_NLZC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NLZC_W, MIPS_INS_NLZC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NMADD_D32, MIPS_INS_NMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0 #endif }, { Mips_NMADD_D32_MM, MIPS_INS_NMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_NMADD_D64, MIPS_INS_NMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0 #endif }, { Mips_NMADD_S, MIPS_INS_NMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0 #endif }, { Mips_NMADD_S_MM, MIPS_INS_NMADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_NMSUB_D32, MIPS_INS_NMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0 #endif }, { Mips_NMSUB_D32_MM, MIPS_INS_NMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_NMSUB_D64, MIPS_INS_NMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0 #endif }, { Mips_NMSUB_S, MIPS_INS_NMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0 #endif }, { Mips_NMSUB_S_MM, MIPS_INS_NMSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_NOR, MIPS_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_NOR64, MIPS_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_NORI_B, MIPS_INS_NORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NOR_MM, MIPS_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_NOR_V, MIPS_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_NOT16_MM, MIPS_INS_NOT16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_NegRxRy16, MIPS_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_NotRxRy16, MIPS_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_OR, MIPS_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_OR16_MM, MIPS_INS_OR16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_OR64, MIPS_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ORI_B, MIPS_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_OR_MM, MIPS_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_OR_V, MIPS_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ORi, MIPS_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ORi64, MIPS_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_ORi_MM, MIPS_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_OrRxRxRy16, MIPS_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_PACKRL_PH, MIPS_INS_PACKRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PAUSE, MIPS_INS_PAUSE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_PAUSE_MM, MIPS_INS_PAUSE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_PCKEV_B, MIPS_INS_PCKEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKEV_D, MIPS_INS_PCKEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKEV_H, MIPS_INS_PCKEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKEV_W, MIPS_INS_PCKEV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKOD_B, MIPS_INS_PCKOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKOD_D, MIPS_INS_PCKOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKOD_H, MIPS_INS_PCKOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCKOD_W, MIPS_INS_PCKOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCNT_B, MIPS_INS_PCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCNT_D, MIPS_INS_PCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCNT_H, MIPS_INS_PCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PCNT_W, MIPS_INS_PCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_PICK_PH, MIPS_INS_PICK, #ifndef CAPSTONE_DIET { MIPS_REG_DSPCCOND, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PICK_QB, MIPS_INS_PICK, #ifndef CAPSTONE_DIET { MIPS_REG_DSPCCOND, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_POP, MIPS_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_PRECEQU_PH_QBL, MIPS_INS_PRECEQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEQU_PH_QBLA, MIPS_INS_PRECEQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEQU_PH_QBR, MIPS_INS_PRECEQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEQU_PH_QBRA, MIPS_INS_PRECEQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEQ_W_PHL, MIPS_INS_PRECEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEQ_W_PHR, MIPS_INS_PRECEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEU_PH_QBL, MIPS_INS_PRECEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEU_PH_QBLA, MIPS_INS_PRECEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEU_PH_QBR, MIPS_INS_PRECEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECEU_PH_QBRA, MIPS_INS_PRECEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECRQU_S_QB_PH, MIPS_INS_PRECRQU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECRQ_PH_W, MIPS_INS_PRECRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECRQ_QB_PH, MIPS_INS_PRECRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECRQ_RS_PH_W, MIPS_INS_PRECRQ_RS, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_PRECR_QB_PH, MIPS_INS_PRECR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_PRECR_SRA_PH_W, MIPS_INS_PRECR_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_PRECR_SRA_R_PH_W, MIPS_INS_PRECR_SRA_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_PREF, MIPS_INS_PREF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_PREF_MM, MIPS_INS_PREF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_PREF_R6, MIPS_INS_PREF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_PREPEND, MIPS_INS_PREPEND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_RADDU_W_QB, MIPS_INS_RADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_RDDSP, MIPS_INS_RDDSP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_RDHWR, MIPS_INS_RDHWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_RDHWR64, MIPS_INS_RDHWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_RDHWR_MM, MIPS_INS_RDHWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_REPLV_PH, MIPS_INS_REPLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_REPLV_QB, MIPS_INS_REPLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_REPL_PH, MIPS_INS_REPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_REPL_QB, MIPS_INS_REPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_RINT_D, MIPS_INS_RINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_RINT_S, MIPS_INS_RINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_ROTR, MIPS_INS_ROTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_ROTRV, MIPS_INS_ROTRV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_ROTRV_MM, MIPS_INS_ROTRV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ROTR_MM, MIPS_INS_ROTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ROUND_L_D64, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_ROUND_L_S, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_ROUND_W_D32, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_ROUND_W_D64, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_ROUND_W_MM, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ROUND_W_S, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_ROUND_W_S_MM, MIPS_INS_ROUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SAT_S_B, MIPS_INS_SAT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_S_D, MIPS_INS_SAT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_S_H, MIPS_INS_SAT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_S_W, MIPS_INS_SAT_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_U_B, MIPS_INS_SAT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_U_D, MIPS_INS_SAT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_U_H, MIPS_INS_SAT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SAT_U_W, MIPS_INS_SAT_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SB, MIPS_INS_SB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SB16_MM, MIPS_INS_SB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SB64, MIPS_INS_SB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SB_MM, MIPS_INS_SB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SC, MIPS_INS_SC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SCD, MIPS_INS_SCD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SCD_R6, MIPS_INS_SCD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SC_MM, MIPS_INS_SC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SC_R6, MIPS_INS_SC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SD, MIPS_INS_SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0 #endif }, { Mips_SDBBP, MIPS_INS_SDBBP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SDBBP16_MM, MIPS_INS_SDBBP16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SDBBP_MM, MIPS_INS_SDBBP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SDBBP_R6, MIPS_INS_SDBBP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SDC1, MIPS_INS_SDC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_SDC164, MIPS_INS_SDC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_SDC1_MM, MIPS_INS_SDC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SDC2, MIPS_INS_SDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SDC2_R6, MIPS_INS_SDC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SDC3, MIPS_INS_SDC3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SDIV, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SDIV_MM, MIPS_INS_DIV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SDL, MIPS_INS_SDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SDR, MIPS_INS_SDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SDXC1, MIPS_INS_SDXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, 0 }, 0, 0 #endif }, { Mips_SDXC164, MIPS_INS_SDXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SEB, MIPS_INS_SEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_SEB64, MIPS_INS_SEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_SEB_MM, MIPS_INS_SEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SEH, MIPS_INS_SEH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_SEH64, MIPS_INS_SEH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_SEH_MM, MIPS_INS_SEH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SELEQZ, MIPS_INS_SELEQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP32BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELEQZ64, MIPS_INS_SELEQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP64BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELEQZ_D, MIPS_INS_SELEQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELEQZ_S, MIPS_INS_SELEQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELNEZ, MIPS_INS_SELNEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP32BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELNEZ64, MIPS_INS_SELNEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP64BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELNEZ_D, MIPS_INS_SELNEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SELNEZ_S, MIPS_INS_SELNEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SEL_D, MIPS_INS_SEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SEL_S, MIPS_INS_SEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SEQ, MIPS_INS_SEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_SEQi, MIPS_INS_SEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_SH, MIPS_INS_SH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SH16_MM, MIPS_INS_SH16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SH64, MIPS_INS_SH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SHF_B, MIPS_INS_SHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SHF_H, MIPS_INS_SHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SHF_W, MIPS_INS_SHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SHILO, MIPS_INS_SHILO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHILOV, MIPS_INS_SHILOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLLV_PH, MIPS_INS_SHLLV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLLV_QB, MIPS_INS_SHLLV, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLLV_S_PH, MIPS_INS_SHLLV_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLLV_S_W, MIPS_INS_SHLLV_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLL_PH, MIPS_INS_SHLL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLL_QB, MIPS_INS_SHLL, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLL_S_PH, MIPS_INS_SHLL_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHLL_S_W, MIPS_INS_SHLL_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRAV_PH, MIPS_INS_SHRAV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRAV_QB, MIPS_INS_SHRAV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SHRAV_R_PH, MIPS_INS_SHRAV_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRAV_R_QB, MIPS_INS_SHRAV_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SHRAV_R_W, MIPS_INS_SHRAV_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRA_PH, MIPS_INS_SHRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRA_QB, MIPS_INS_SHRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SHRA_R_PH, MIPS_INS_SHRA_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRA_R_QB, MIPS_INS_SHRA_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SHRA_R_W, MIPS_INS_SHRA_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRLV_PH, MIPS_INS_SHRLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SHRLV_QB, MIPS_INS_SHRLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SHRL_PH, MIPS_INS_SHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SHRL_QB, MIPS_INS_SHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SH_MM, MIPS_INS_SH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLDI_B, MIPS_INS_SLDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLDI_D, MIPS_INS_SLDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLDI_H, MIPS_INS_SLDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLDI_W, MIPS_INS_SLDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLD_B, MIPS_INS_SLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLD_D, MIPS_INS_SLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLD_H, MIPS_INS_SLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLD_W, MIPS_INS_SLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLL, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLL16_MM, MIPS_INS_SLL16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLL64_32, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLL64_64, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLLI_B, MIPS_INS_SLLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLLI_D, MIPS_INS_SLLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLLI_H, MIPS_INS_SLLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLLI_W, MIPS_INS_SLLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLLV, MIPS_INS_SLLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLLV_MM, MIPS_INS_SLLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLL_B, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLL_D, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLL_H, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLL_MM, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLL_W, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SLT, MIPS_INS_SLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLT64, MIPS_INS_SLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLT_MM, MIPS_INS_SLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLTi, MIPS_INS_SLTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLTi64, MIPS_INS_SLTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLTi_MM, MIPS_INS_SLTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLTiu, MIPS_INS_SLTIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLTiu64, MIPS_INS_SLTIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLTiu_MM, MIPS_INS_SLTIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SLTu, MIPS_INS_SLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLTu64, MIPS_INS_SLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SLTu_MM, MIPS_INS_SLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SNE, MIPS_INS_SNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_SNEi, MIPS_INS_SNEI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_SPLATI_B, MIPS_INS_SPLATI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLATI_D, MIPS_INS_SPLATI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLATI_H, MIPS_INS_SPLATI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLATI_W, MIPS_INS_SPLATI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLAT_B, MIPS_INS_SPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLAT_D, MIPS_INS_SPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLAT_H, MIPS_INS_SPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SPLAT_W, MIPS_INS_SPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRA, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SRAI_B, MIPS_INS_SRAI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAI_D, MIPS_INS_SRAI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAI_H, MIPS_INS_SRAI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAI_W, MIPS_INS_SRAI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRARI_B, MIPS_INS_SRARI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRARI_D, MIPS_INS_SRARI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRARI_H, MIPS_INS_SRARI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRARI_W, MIPS_INS_SRARI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAR_B, MIPS_INS_SRAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAR_D, MIPS_INS_SRAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAR_H, MIPS_INS_SRAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAR_W, MIPS_INS_SRAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRAV, MIPS_INS_SRAV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SRAV_MM, MIPS_INS_SRAV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SRA_B, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRA_D, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRA_H, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRA_MM, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SRA_W, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRL, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SRL16_MM, MIPS_INS_SRL16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SRLI_B, MIPS_INS_SRLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLI_D, MIPS_INS_SRLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLI_H, MIPS_INS_SRLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLI_W, MIPS_INS_SRLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLRI_B, MIPS_INS_SRLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLRI_D, MIPS_INS_SRLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLRI_H, MIPS_INS_SRLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLRI_W, MIPS_INS_SRLRI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLR_B, MIPS_INS_SRLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLR_D, MIPS_INS_SRLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLR_H, MIPS_INS_SRLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLR_W, MIPS_INS_SRLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRLV, MIPS_INS_SRLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SRLV_MM, MIPS_INS_SRLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SRL_B, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRL_D, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRL_H, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SRL_MM, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SRL_W, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SSNOP, MIPS_INS_SSNOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SSNOP_MM, MIPS_INS_SSNOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_ST_B, MIPS_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ST_D, MIPS_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ST_H, MIPS_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_ST_W, MIPS_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUB, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SUBQH_PH, MIPS_INS_SUBQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBQH_R_PH, MIPS_INS_SUBQH_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBQH_R_W, MIPS_INS_SUBQH_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBQH_W, MIPS_INS_SUBQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBQ_PH, MIPS_INS_SUBQ, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SUBQ_S_PH, MIPS_INS_SUBQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SUBQ_S_W, MIPS_INS_SUBQ_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SUBSUS_U_B, MIPS_INS_SUBSUS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUS_U_D, MIPS_INS_SUBSUS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUS_U_H, MIPS_INS_SUBSUS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUS_U_W, MIPS_INS_SUBSUS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUU_S_B, MIPS_INS_SUBSUU_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUU_S_D, MIPS_INS_SUBSUU_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUU_S_H, MIPS_INS_SUBSUU_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBSUU_S_W, MIPS_INS_SUBSUU_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_S_B, MIPS_INS_SUBS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_S_D, MIPS_INS_SUBS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_S_H, MIPS_INS_SUBS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_S_W, MIPS_INS_SUBS_S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_U_B, MIPS_INS_SUBS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_U_D, MIPS_INS_SUBS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_U_H, MIPS_INS_SUBS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBS_U_W, MIPS_INS_SUBS_U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBU16_MM, MIPS_INS_SUBU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SUBUH_QB, MIPS_INS_SUBUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBUH_R_QB, MIPS_INS_SUBUH_R, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBU_PH, MIPS_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBU_QB, MIPS_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SUBU_S_PH, MIPS_INS_SUBU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0 #endif }, { Mips_SUBU_S_QB, MIPS_INS_SUBU_S, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_SUBVI_B, MIPS_INS_SUBVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBVI_D, MIPS_INS_SUBVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBVI_H, MIPS_INS_SUBVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBVI_W, MIPS_INS_SUBVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBV_B, MIPS_INS_SUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBV_D, MIPS_INS_SUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBV_H, MIPS_INS_SUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUBV_W, MIPS_INS_SUBV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_SUB_MM, MIPS_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SUBu, MIPS_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SUBu_MM, MIPS_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SUXC1, MIPS_INS_SUXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0 #endif }, { Mips_SUXC164, MIPS_INS_SUXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_SUXC1_MM, MIPS_INS_SUXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SW, MIPS_INS_SW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SW16_MM, MIPS_INS_SW16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SW64, MIPS_INS_SW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SWC1, MIPS_INS_SWC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SWC1_MM, MIPS_INS_SWC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWC2, MIPS_INS_SWC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWC2_R6, MIPS_INS_SWC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0 #endif }, { Mips_SWC3, MIPS_INS_SWC3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWL, MIPS_INS_SWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWL64, MIPS_INS_SWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SWL_MM, MIPS_INS_SWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWM16_MM, MIPS_INS_SWM16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWM32_MM, MIPS_INS_SWM32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWP_MM, MIPS_INS_SWP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWR, MIPS_INS_SWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWR64, MIPS_INS_SWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_SWR_MM, MIPS_INS_SWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWSP_MM, MIPS_INS_SW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SWXC1, MIPS_INS_SWXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0 #endif }, { Mips_SWXC1_MM, MIPS_INS_SWXC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SW_MM, MIPS_INS_SW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SYNC, MIPS_INS_SYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0 #endif }, { Mips_SYNCI, MIPS_INS_SYNCI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_SYNC_MM, MIPS_INS_SYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_SYSCALL, MIPS_INS_SYSCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_INT, 0 }, 0, 0 #endif }, { Mips_SYSCALL_MM, MIPS_INS_SYSCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_INT, 0 }, 0, 0 #endif }, { Mips_SbRxRyOffMemX16, MIPS_INS_SB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SebRx16, MIPS_INS_SEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SehRx16, MIPS_INS_SEH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_ShRxRyOffMemX16, MIPS_INS_SH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SllX16, MIPS_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SllvRxRy16, MIPS_INS_SLLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SltRxRy16, MIPS_INS_SLT, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SltiRxImm16, MIPS_INS_SLTI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SltiRxImmX16, MIPS_INS_SLTI, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SltiuRxImm16, MIPS_INS_SLTIU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SltiuRxImmX16, MIPS_INS_SLTIU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SltuRxRy16, MIPS_INS_SLTU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SraX16, MIPS_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SravRxRy16, MIPS_INS_SRAV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SrlX16, MIPS_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SrlvRxRy16, MIPS_INS_SRLV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SubuRxRyRz16, MIPS_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SwRxRyOffMemX16, MIPS_INS_SW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_SwRxSpImmX16, MIPS_INS_SW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, { Mips_TEQ, MIPS_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TEQI, MIPS_INS_TEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_TEQI_MM, MIPS_INS_TEQI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TEQ_MM, MIPS_INS_TEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TGE, MIPS_INS_TGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TGEI, MIPS_INS_TGEI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_TGEIU, MIPS_INS_TGEIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_TGEIU_MM, MIPS_INS_TGEIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TGEI_MM, MIPS_INS_TGEI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TGEU, MIPS_INS_TGEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TGEU_MM, MIPS_INS_TGEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TGE_MM, MIPS_INS_TGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLBP, MIPS_INS_TLBP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_TLBP_MM, MIPS_INS_TLBP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLBR, MIPS_INS_TLBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_TLBR_MM, MIPS_INS_TLBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLBWI, MIPS_INS_TLBWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_TLBWI_MM, MIPS_INS_TLBWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLBWR, MIPS_INS_TLBWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_TLBWR_MM, MIPS_INS_TLBWR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLT, MIPS_INS_TLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TLTI, MIPS_INS_TLTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_TLTIU_MM, MIPS_INS_TLTIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLTI_MM, MIPS_INS_TLTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLTU, MIPS_INS_TLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TLTU_MM, MIPS_INS_TLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TLT_MM, MIPS_INS_TLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TNE, MIPS_INS_TNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TNEI, MIPS_INS_TNEI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_TNEI_MM, MIPS_INS_TNEI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TNE_MM, MIPS_INS_TNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TRUNC_L_D64, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_TRUNC_L_S, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_TRUNC_W_D32, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0 #endif }, { Mips_TRUNC_W_D64, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0 #endif }, { Mips_TRUNC_W_MM, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TRUNC_W_S, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0 #endif }, { Mips_TRUNC_W_S_MM, MIPS_INS_TRUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_TTLTIU, MIPS_INS_TLTIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_UDIV, MIPS_INS_DIVU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0 #endif }, { Mips_UDIV_MM, MIPS_INS_DIVU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_V3MULU, MIPS_INS_V3MULU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_VMM0, MIPS_INS_VMM0, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_MPL0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_VMULU, MIPS_INS_VMULU, #ifndef CAPSTONE_DIET { 0 }, { MIPS_REG_MPL1, MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0 #endif }, { Mips_VSHF_B, MIPS_INS_VSHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_VSHF_D, MIPS_INS_VSHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_VSHF_H, MIPS_INS_VSHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_VSHF_W, MIPS_INS_VSHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_WAIT, MIPS_INS_WAIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_WAIT_MM, MIPS_INS_WAIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_WRDSP, MIPS_INS_WRDSP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0 #endif }, { Mips_WSBH, MIPS_INS_WSBH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0 #endif }, { Mips_WSBH_MM, MIPS_INS_WSBH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_XOR, MIPS_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 #endif }, { Mips_XOR16_MM, MIPS_INS_XOR16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_XOR64, MIPS_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_XORI_B, MIPS_INS_XORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_XOR_MM, MIPS_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_XOR_V, MIPS_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0 #endif }, { Mips_XORi, MIPS_INS_XORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_XORi64, MIPS_INS_XORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 #endif }, { Mips_XORi_MM, MIPS_INS_XORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 #endif }, { Mips_XorRxRxRy16, MIPS_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/Mips/MipsModule.c010066400017500001750000000020001363402546700203310ustar0000000000000000/* Capstone Disassembly Engine */ /* By Dang Hoang Vu 2013 */ #ifdef CAPSTONE_HAS_MIPS #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "MipsDisassembler.h" #include "MipsInstPrinter.h" #include "MipsMapping.h" #include "MipsModule.h" // Returns mode value with implied bits set static cs_mode updated_mode(cs_mode mode) { if (mode & CS_MODE_MIPS32R6) { mode |= CS_MODE_32; } return mode; } cs_err Mips_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); Mips_init(mri); ud->printer = Mips_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->reg_name = Mips_reg_name; ud->insn_id = Mips_get_insn_id; ud->insn_name = Mips_insn_name; ud->group_name = Mips_group_name; ud->disasm = Mips_getInstruction; return CS_ERR_OK; } cs_err Mips_option(cs_struct *handle, cs_opt_type type, size_t value) { if (type == CS_OPT_MODE) { handle->mode = updated_mode(value); return CS_ERR_OK; } return CS_ERR_OPTION; } #endif capstone-sys-0.11.0/capstone/arch/Mips/MipsModule.h010066400017500001750000000004351363402546700203500ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_MIPS_MODULE_H #define CS_MIPS_MODULE_H #include "../../utils.h" cs_err Mips_global_init(cs_struct *ud); cs_err Mips_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCDisassembler.c010066400017500001750000000272511363402546700216610ustar0000000000000000//===------ PPCDisassembler.cpp - Disassembler for PowerPC ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_POWERPC #include // DEBUG #include #include #include "../../cs_priv.h" #include "../../utils.h" #include "PPCDisassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" #include "../../MathExtras.h" #define GET_REGINFO_ENUM #include "PPCGenRegisterInfo.inc" // FIXME: These can be generated by TableGen from the existing register // encoding values! static const unsigned CRRegs[] = { PPC_CR0, PPC_CR1, PPC_CR2, PPC_CR3, PPC_CR4, PPC_CR5, PPC_CR6, PPC_CR7 }; static const unsigned CRBITRegs[] = { PPC_CR0LT, PPC_CR0GT, PPC_CR0EQ, PPC_CR0UN, PPC_CR1LT, PPC_CR1GT, PPC_CR1EQ, PPC_CR1UN, PPC_CR2LT, PPC_CR2GT, PPC_CR2EQ, PPC_CR2UN, PPC_CR3LT, PPC_CR3GT, PPC_CR3EQ, PPC_CR3UN, PPC_CR4LT, PPC_CR4GT, PPC_CR4EQ, PPC_CR4UN, PPC_CR5LT, PPC_CR5GT, PPC_CR5EQ, PPC_CR5UN, PPC_CR6LT, PPC_CR6GT, PPC_CR6EQ, PPC_CR6UN, PPC_CR7LT, PPC_CR7GT, PPC_CR7EQ, PPC_CR7UN }; static const unsigned FRegs[] = { PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F14, PPC_F15, PPC_F16, PPC_F17, PPC_F18, PPC_F19, PPC_F20, PPC_F21, PPC_F22, PPC_F23, PPC_F24, PPC_F25, PPC_F26, PPC_F27, PPC_F28, PPC_F29, PPC_F30, PPC_F31 }; static const unsigned VRegs[] = { PPC_V0, PPC_V1, PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19, PPC_V20, PPC_V21, PPC_V22, PPC_V23, PPC_V24, PPC_V25, PPC_V26, PPC_V27, PPC_V28, PPC_V29, PPC_V30, PPC_V31 }; static const unsigned VSRegs[] = { PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL14, PPC_VSL15, PPC_VSL16, PPC_VSL17, PPC_VSL18, PPC_VSL19, PPC_VSL20, PPC_VSL21, PPC_VSL22, PPC_VSL23, PPC_VSL24, PPC_VSL25, PPC_VSL26, PPC_VSL27, PPC_VSL28, PPC_VSL29, PPC_VSL30, PPC_VSL31, PPC_VSH0, PPC_VSH1, PPC_VSH2, PPC_VSH3, PPC_VSH4, PPC_VSH5, PPC_VSH6, PPC_VSH7, PPC_VSH8, PPC_VSH9, PPC_VSH10, PPC_VSH11, PPC_VSH12, PPC_VSH13, PPC_VSH14, PPC_VSH15, PPC_VSH16, PPC_VSH17, PPC_VSH18, PPC_VSH19, PPC_VSH20, PPC_VSH21, PPC_VSH22, PPC_VSH23, PPC_VSH24, PPC_VSH25, PPC_VSH26, PPC_VSH27, PPC_VSH28, PPC_VSH29, PPC_VSH30, PPC_VSH31 }; static const unsigned VSFRegs[] = { PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F14, PPC_F15, PPC_F16, PPC_F17, PPC_F18, PPC_F19, PPC_F20, PPC_F21, PPC_F22, PPC_F23, PPC_F24, PPC_F25, PPC_F26, PPC_F27, PPC_F28, PPC_F29, PPC_F30, PPC_F31, PPC_VF0, PPC_VF1, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF20, PPC_VF21, PPC_VF22, PPC_VF23, PPC_VF24, PPC_VF25, PPC_VF26, PPC_VF27, PPC_VF28, PPC_VF29, PPC_VF30, PPC_VF31 }; static const unsigned GPRegs[] = { PPC_R0, PPC_R1, PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R13, PPC_R14, PPC_R15, PPC_R16, PPC_R17, PPC_R18, PPC_R19, PPC_R20, PPC_R21, PPC_R22, PPC_R23, PPC_R24, PPC_R25, PPC_R26, PPC_R27, PPC_R28, PPC_R29, PPC_R30, PPC_R31 }; static const unsigned GP0Regs[] = { PPC_ZERO, PPC_R1, PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R13, PPC_R14, PPC_R15, PPC_R16, PPC_R17, PPC_R18, PPC_R19, PPC_R20, PPC_R21, PPC_R22, PPC_R23, PPC_R24, PPC_R25, PPC_R26, PPC_R27, PPC_R28, PPC_R29, PPC_R30, PPC_R31 }; static const unsigned G8Regs[] = { PPC_X0, PPC_X1, PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X13, PPC_X14, PPC_X15, PPC_X16, PPC_X17, PPC_X18, PPC_X19, PPC_X20, PPC_X21, PPC_X22, PPC_X23, PPC_X24, PPC_X25, PPC_X26, PPC_X27, PPC_X28, PPC_X29, PPC_X30, PPC_X31 }; static const unsigned QFRegs[] = { PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF14, PPC_QF15, PPC_QF16, PPC_QF17, PPC_QF18, PPC_QF19, PPC_QF20, PPC_QF21, PPC_QF22, PPC_QF23, PPC_QF24, PPC_QF25, PPC_QF26, PPC_QF27, PPC_QF28, PPC_QF29, PPC_QF30, PPC_QF31 }; static uint64_t getFeatureBits(int feature) { // enable all features return (uint64_t)-1; } static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo, const unsigned *Regs) { // assert(RegNo < N && "Invalid register number"); MCOperand_CreateReg0(Inst, Regs[RegNo]); return MCDisassembler_Success; } static DecodeStatus DecodeCRRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, CRRegs); } static DecodeStatus DecodeCRBITRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, CRBITRegs); } static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, FRegs); } static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, FRegs); } static DecodeStatus DecodeVRRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, VRegs); } static DecodeStatus DecodeVSRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, VSRegs); } static DecodeStatus DecodeVSFRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, VSFRegs); } static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, GPRegs); } static DecodeStatus DecodeGPRC_NOR0RegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, GP0Regs); } static DecodeStatus DecodeG8RCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, G8Regs); } #define DecodePointerLikeRegClass0 DecodeGPRCRegisterClass #define DecodePointerLikeRegClass1 DecodeGPRC_NOR0RegisterClass static DecodeStatus DecodeQFRCRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, QFRegs); } #define DecodeQSRCRegisterClass DecodeQFRCRegisterClass #define DecodeQBRCRegisterClass DecodeQFRCRegisterClass static DecodeStatus decodeUImmOperand(MCInst *Inst, uint64_t Imm, int64_t Address, const void *Decoder, unsigned N) { //assert(isUInt(Imm) && "Invalid immediate"); MCOperand_CreateImm0(Inst, Imm); return MCDisassembler_Success; } static DecodeStatus decodeSImmOperand(MCInst *Inst, uint64_t Imm, int64_t Address, const void *Decoder, unsigned N) { // assert(isUInt(Imm) && "Invalid immediate"); MCOperand_CreateImm0(Inst, SignExtend64(Imm, N)); return MCDisassembler_Success; } #define GET_INSTRINFO_ENUM #include "PPCGenInstrInfo.inc" static DecodeStatus decodeMemRIOperands(MCInst *Inst, uint64_t Imm, int64_t Address, const void *Decoder) { // Decode the memri field (imm, reg), which has the low 16-bits as the // displacement and the next 5 bits as the register #. uint64_t Base = Imm >> 16; uint64_t Disp = Imm & 0xFFFF; // assert(Base < 32 && "Invalid base register"); if (Base >= 32) return MCDisassembler_Fail; switch (MCInst_getOpcode(Inst)) { default: break; case PPC_LBZU: case PPC_LHAU: case PPC_LHZU: case PPC_LWZU: case PPC_LFSU: case PPC_LFDU: // Add the tied output operand. MCOperand_CreateReg0(Inst, GP0Regs[Base]); break; case PPC_STBU: case PPC_STHU: case PPC_STWU: case PPC_STFSU: case PPC_STFDU: MCInst_insert0(Inst, 0, MCOperand_CreateReg1(Inst, GP0Regs[Base])); break; } MCOperand_CreateImm0(Inst, SignExtend64(Disp, 16)); MCOperand_CreateReg0(Inst, GP0Regs[Base]); return MCDisassembler_Success; } static DecodeStatus decodeMemRIXOperands(MCInst *Inst, uint64_t Imm, int64_t Address, const void *Decoder) { // Decode the memrix field (imm, reg), which has the low 14-bits as the // displacement and the next 5 bits as the register #. uint64_t Base = Imm >> 14; uint64_t Disp = Imm & 0x3FFF; // assert(Base < 32 && "Invalid base register"); if (MCInst_getOpcode(Inst) == PPC_LDU) // Add the tied output operand. MCOperand_CreateReg0(Inst, GP0Regs[Base]); else if (MCInst_getOpcode(Inst) == PPC_STDU) MCInst_insert0(Inst, 0, MCOperand_CreateReg1(Inst, GP0Regs[Base])); MCOperand_CreateImm0(Inst, SignExtend64(Disp << 2, 16)); MCOperand_CreateReg0(Inst, GP0Regs[Base]); return MCDisassembler_Success; } static DecodeStatus decodeCRBitMOperand(MCInst *Inst, uint64_t Imm, int64_t Address, const void *Decoder) { // The cr bit encoding is 0x80 >> cr_reg_num. unsigned Zeros = CountTrailingZeros_64(Imm); // assert(Zeros < 8 && "Invalid CR bit value"); if (Zeros >=8) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, CRRegs[7 - Zeros]); return MCDisassembler_Success; } #include "PPCGenDisassemblerTables.inc" static DecodeStatus getInstruction(MCInst *MI, const uint8_t *code, size_t code_len, uint16_t *Size, uint64_t Address, MCRegisterInfo *MRI) { uint32_t insn; DecodeStatus result; // Get the four bytes of the instruction. if (code_len < 4) { // not enough data *Size = 0; return MCDisassembler_Fail; } // The instruction is big-endian encoded. if (MODE_IS_BIG_ENDIAN(MI->csh->mode)) insn = ((uint32_t) code[0] << 24) | (code[1] << 16) | (code[2] << 8) | (code[3] << 0); else insn = ((uint32_t) code[3] << 24) | (code[2] << 16) | (code[1] << 8) | (code[0] << 0); if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, ppc)+sizeof(cs_ppc)); } if (MI->csh->mode & CS_MODE_QPX) { result = decodeInstruction_4(DecoderTableQPX32, MI, insn, Address, 4); if (result != MCDisassembler_Fail) { *Size = 4; return result; } MCInst_clear(MI); } result = decodeInstruction_4(DecoderTable32, MI, insn, Address, 4); if (result != MCDisassembler_Fail) { *Size = 4; return result; } // report error MCInst_clear(MI); *Size = 0; return MCDisassembler_Fail; } bool PPC_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info) { DecodeStatus status = getInstruction(instr, code, code_len, size, address, (MCRegisterInfo *)info); return status == MCDisassembler_Success; } #define GET_REGINFO_MC_DESC #include "PPCGenRegisterInfo.inc" void PPC_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(PPCRegDesc, 310, RA, PC, PPCMCRegisterClasses, 23, PPCRegUnitRoots, 138, PPCRegDiffLists, PPCLaneMaskLists, PPCRegStrings, PPCRegClassStrings, PPCSubRegIdxLists, 8, PPCSubRegIdxRanges, PPCRegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, PPCRegDesc, 310, 0, 0, PPCMCRegisterClasses, 23, 0, 0, PPCRegDiffLists, 0, PPCSubRegIdxLists, 8, 0); } #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCDisassembler.h010066400017500001750000000006461363402546700216650ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_PPCDISASSEMBLER_H #define CS_PPCDISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" void PPC_init(MCRegisterInfo *MRI); bool PPC_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCGenAsmWriter.inc010066400017500001750000011433631363402546700221460ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include // debug #include /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 10419U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 10412U, // BUNDLE 10746U, // LIFETIME_START 10399U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 19093U, // ADD4 19093U, // ADD4TLS 16801U, // ADD4o 19093U, // ADD8 19093U, // ADD8TLS 19093U, // ADD8TLS_ 16801U, // ADD8o 18937U, // ADDC 18937U, // ADDC8 16741U, // ADDC8o 16741U, // ADDCo 19414U, // ADDE 19414U, // ADDE8 16924U, // ADDE8o 16924U, // ADDEo 19978U, // ADDI 19978U, // ADDI8 18982U, // ADDIC 18982U, // ADDIC8 16771U, // ADDICo 22885U, // ADDIS 22885U, // ADDIS8 10190U, // ADDISdtprelHA 9129U, // ADDISdtprelHA32 10173U, // ADDISgotTprelHA 10145U, // ADDIStlsgdHA 10159U, // ADDIStlsldHA 10133U, // ADDIStocHA 10524U, // ADDIdtprelL 9332U, // ADDIdtprelL32 10487U, // ADDItlsgdL 9289U, // ADDItlsgdL32 10570U, // ADDItlsgdLADDR 9384U, // ADDItlsgdLADDR32 10499U, // ADDItlsldL 9303U, // ADDItlsldL32 10586U, // ADDItlsldLADDR 9402U, // ADDItlsldLADDR32 10477U, // ADDItocL 268454930U, // ADDME 268454930U, // ADDME8 268452395U, // ADDME8o 268452395U, // ADDMEo 268454994U, // ADDZE 268454994U, // ADDZE8 268452428U, // ADDZE8o 268452428U, // ADDZEo 296482U, // ADJCALLSTACKDOWN 8947253U, // ADJCALLSTACKUP 19252U, // AND 19252U, // AND8 16863U, // AND8o 18946U, // ANDC 18946U, // ANDC8 16748U, // ANDC8o 16748U, // ANDCo 17561U, // ANDISo 17561U, // ANDISo8 17080U, // ANDIo 17080U, // ANDIo8 10681U, // ANDIo_1_EQ_BIT 10083U, // ANDIo_1_EQ_BIT8 10697U, // ANDIo_1_GT_BIT 10100U, // ANDIo_1_GT_BIT8 16863U, // ANDo 554190291U, // ATOMIC_CMP_SWAP_I16 554190269U, // ATOMIC_CMP_SWAP_I32 9529U, // ATOMIC_CMP_SWAP_I64 10001U, // ATOMIC_CMP_SWAP_I8 9748U, // ATOMIC_LOAD_ADD_I16 9167U, // ATOMIC_LOAD_ADD_I32 9469U, // ATOMIC_LOAD_ADD_I64 9940U, // ATOMIC_LOAD_ADD_I8 9791U, // ATOMIC_LOAD_AND_I16 9210U, // ATOMIC_LOAD_AND_I32 9628U, // ATOMIC_LOAD_AND_I64 9981U, // ATOMIC_LOAD_AND_I8 9769U, // ATOMIC_LOAD_NAND_I16 9188U, // ATOMIC_LOAD_NAND_I32 9490U, // ATOMIC_LOAD_NAND_I64 9960U, // ATOMIC_LOAD_NAND_I8 9850U, // ATOMIC_LOAD_OR_I16 9269U, // ATOMIC_LOAD_OR_I32 9571U, // ATOMIC_LOAD_OR_I64 10040U, // ATOMIC_LOAD_OR_I8 9727U, // ATOMIC_LOAD_SUB_I16 9146U, // ATOMIC_LOAD_SUB_I32 9448U, // ATOMIC_LOAD_SUB_I64 9906U, // ATOMIC_LOAD_SUB_I8 9829U, // ATOMIC_LOAD_XOR_I16 9248U, // ATOMIC_LOAD_XOR_I32 9550U, // ATOMIC_LOAD_XOR_I64 10021U, // ATOMIC_LOAD_XOR_I8 9812U, // ATOMIC_SWAP_I16 9231U, // ATOMIC_SWAP_I32 9512U, // ATOMIC_SWAP_I64 10117U, // ATOMIC_SWAP_I8 10880U, // ATTN 313588U, // B 329423U, // BA 25182312U, // BC 879125U, // BCC 1141269U, // BCCA 1403413U, // BCCCTR 1403413U, // BCCCTR8 1665557U, // BCCCTRL 1665557U, // BCCCTRL8 1927701U, // BCCL 2189845U, // BCCLA 2451989U, // BCCLR 2714133U, // BCCLRL 2900122U, // BCCTR 2900122U, // BCCTR8 2900178U, // BCCTR8n 2900100U, // BCCTRL 2900100U, // BCCTRL8 2900158U, // BCCTRL8n 2900158U, // BCCTRLn 2900178U, // BCCTRn 25182320U, // BCL 2900112U, // BCLR 2900089U, // BCLRL 2900148U, // BCLRLn 2900169U, // BCLRn 311373U, // BCLalways 25182380U, // BCLn 10917U, // BCTR 10917U, // BCTR8 10874U, // BCTRL 10874U, // BCTRL8 98394U, // BCTRL8_LDinto_toc 25182373U, // BCn 320294U, // BDNZ 320294U, // BDNZ8 329961U, // BDNZA 327936U, // BDNZAm 327721U, // BDNZAp 315560U, // BDNZL 329734U, // BDNZLA 327920U, // BDNZLAm 327705U, // BDNZLAp 10910U, // BDNZLR 10910U, // BDNZLR8 10866U, // BDNZLRL 9081U, // BDNZLRLm 9049U, // BDNZLRLp 9097U, // BDNZLRm 9065U, // BDNZLRp 311567U, // BDNZLm 311352U, // BDNZLp 311581U, // BDNZm 311366U, // BDNZp 320232U, // BDZ 320232U, // BDZ8 329955U, // BDZA 327929U, // BDZAm 327714U, // BDZAp 315554U, // BDZL 329727U, // BDZLA 327912U, // BDZLAm 327697U, // BDZLAp 10904U, // BDZLR 10904U, // BDZLR8 10859U, // BDZLRL 9073U, // BDZLRLm 9041U, // BDZLRLp 9090U, // BDZLRm 9058U, // BDZLRp 311560U, // BDZLm 311345U, // BDZLp 311575U, // BDZm 311360U, // BDZp 315437U, // BL 315437U, // BL8 3199021U, // BL8_NOP 3264557U, // BL8_NOP_TLS 380973U, // BL8_TLS 380973U, // BL8_TLS_ 329716U, // BLA 329716U, // BLA8 3213300U, // BLA8_NOP 10900U, // BLR 10900U, // BLR8 10854U, // BLRL 380973U, // BL_TLS 19031U, // BRINC 19992U, // CLRLSLDI 17060U, // CLRLSLDIo 20334U, // CLRLSLWI 17158U, // CLRLSLWIo 20027U, // CLRRDI 17087U, // CLRRDIo 20375U, // CLRRWI 17187U, // CLRRWIo 18707U, // CMPB 18707U, // CMPB8 19296U, // CMPD 20020U, // CMPDI 19230U, // CMPLD 19984U, // CMPLDI 24018U, // CMPLW 20318U, // CMPLWI 24258U, // CMPW 20368U, // CMPWI 268454862U, // CNTLZD 268452371U, // CNTLZDo 268459932U, // CNTLZW 268459932U, // CNTLZW8 268453215U, // CNTLZW8o 268453215U, // CNTLZWo 9713U, // CR6SET 9699U, // CR6UNSET 19282U, // CRAND 18952U, // CRANDC 23565U, // CREQV 19266U, // CRNAND 22356U, // CRNOR 22370U, // CROR 19052U, // CRORC 33577997U, // CRSET 33576822U, // CRUNSET 22390U, // CRXOR 132813U, // DCBA 134241U, // DCBF 134619U, // DCBI 138004U, // DCBST 137959U, // DCBT 138016U, // DCBTST 139997U, // DCBZ 135323U, // DCBZL 268455405U, // DCCCI 19393U, // DIVD 23421U, // DIVDU 17630U, // DIVDUo 16908U, // DIVDo 24461U, // DIVW 23526U, // DIVWU 17647U, // DIVWUo 17752U, // DIVWo 416157U, // DSS 10847U, // DSSALL 847420187U, // DST 847420187U, // DST64 847420200U, // DSTST 847420200U, // DSTST64 847420213U, // DSTSTT 847420213U, // DSTSTT64 847420207U, // DSTT 847420207U, // DSTT64 10213U, // DYNALLOC 9870U, // DYNALLOC8 9347U, // EH_SjLj_LongJmp32 9591U, // EH_SjLj_LongJmp64 9366U, // EH_SjLj_SetJmp32 9610U, // EH_SjLj_SetJmp64 311297U, // EH_SjLj_Setup 23560U, // EQV 23560U, // EQV8 17662U, // EQV8o 17662U, // EQVo 268457944U, // EVABS 50355624U, // EVADDIW 268459087U, // EVADDSMIAAW 268459219U, // EVADDSSIAAW 268459153U, // EVADDUMIAAW 268459285U, // EVADDUSIAAW 23902U, // EVADDW 19289U, // EVAND 18960U, // EVANDC 22237U, // EVCMPEQ 22964U, // EVCMPGTS 23472U, // EVCMPGTU 22974U, // EVCMPLTS 23482U, // EVCMPLTU 268459753U, // EVCNTLSW 268459930U, // EVCNTLZW 23109U, // EVDIVWS 23524U, // EVDIVWU 23572U, // EVEQV 268454247U, // EVEXTSB 268455278U, // EVEXTSH 58739421U, // EVLDD 24589U, // EVLDDX 58739957U, // EVLDH 24693U, // EVLDHX 58744166U, // EVLDW 25233U, // EVLDWX 58743462U, // EVLHHESPLAT 24986U, // EVLHHESPLATX 58743487U, // EVLHHOSSPLAT 25013U, // EVLHHOSSPLATX 58743501U, // EVLHHOUSPLAT 25028U, // EVLHHOUSPLATX 58739699U, // EVLWHE 24664U, // EVLWHEX 58743188U, // EVLWHOS 24966U, // EVLWHOSX 58743699U, // EVLWHOU 25144U, // EVLWHOUX 58743475U, // EVLWHSPLAT 25000U, // EVLWHSPLATX 58743515U, // EVLWWSPLAT 25043U, // EVLWWSPLATX 20091U, // EVMERGEHI 21072U, // EVMERGEHILO 21061U, // EVMERGELO 20102U, // EVMERGELOHI 18003U, // EVMHEGSMFAA 20878U, // EVMHEGSMFAN 18051U, // EVMHEGSMIAA 20926U, // EVMHEGSMIAN 18088U, // EVMHEGUMIAA 20963U, // EVMHEGUMIAN 19565U, // EVMHESMF 18136U, // EVMHESMFA 23579U, // EVMHESMFAAW 24050U, // EVMHESMFANW 20145U, // EVMHESMI 18227U, // EVMHESMIA 23644U, // EVMHESMIAAW 24102U, // EVMHESMIANW 19640U, // EVMHESSF 18179U, // EVMHESSFA 23605U, // EVMHESSFAAW 24076U, // EVMHESSFANW 23776U, // EVMHESSIAAW 24180U, // EVMHESSIANW 20184U, // EVMHEUMI 18270U, // EVMHEUMIA 23710U, // EVMHEUMIAAW 24141U, // EVMHEUMIANW 23842U, // EVMHEUSIAAW 24219U, // EVMHEUSIANW 18016U, // EVMHOGSMFAA 20891U, // EVMHOGSMFAN 18064U, // EVMHOGSMIAA 20939U, // EVMHOGSMIAN 18101U, // EVMHOGUMIAA 20976U, // EVMHOGUMIAN 19585U, // EVMHOSMF 18158U, // EVMHOSMFA 23592U, // EVMHOSMFAAW 24063U, // EVMHOSMFANW 20165U, // EVMHOSMI 18249U, // EVMHOSMIA 23684U, // EVMHOSMIAAW 24128U, // EVMHOSMIANW 19660U, // EVMHOSSF 18201U, // EVMHOSSFA 23618U, // EVMHOSSFAAW 24089U, // EVMHOSSFANW 23816U, // EVMHOSSIAAW 24206U, // EVMHOSSIANW 20214U, // EVMHOUMI 18303U, // EVMHOUMIA 23750U, // EVMHOUMIAAW 24167U, // EVMHOUMIANW 23882U, // EVMHOUSIAAW 24245U, // EVMHOUSIANW 268453902U, // EVMRA 19575U, // EVMWHSMF 18147U, // EVMWHSMFA 20155U, // EVMWHSMI 18238U, // EVMWHSMIA 19650U, // EVMWHSSF 18190U, // EVMWHSSFA 20194U, // EVMWHUMI 18281U, // EVMWHUMIA 23671U, // EVMWLSMIAAW 24115U, // EVMWLSMIANW 23803U, // EVMWLSSIAAW 24193U, // EVMWLSSIANW 20204U, // EVMWLUMI 18292U, // EVMWLUMIA 23737U, // EVMWLUMIAAW 24154U, // EVMWLUMIANW 23869U, // EVMWLUSIAAW 24232U, // EVMWLUSIANW 19595U, // EVMWSMF 18169U, // EVMWSMFA 18029U, // EVMWSMFAA 20904U, // EVMWSMFAN 20175U, // EVMWSMI 18260U, // EVMWSMIA 18077U, // EVMWSMIAA 20952U, // EVMWSMIAN 19670U, // EVMWSSF 18212U, // EVMWSSFA 18040U, // EVMWSSFAA 20915U, // EVMWSSFAN 20224U, // EVMWUMI 18314U, // EVMWUMIA 18114U, // EVMWUMIAA 20989U, // EVMWUMIAN 19274U, // EVNAND 268455143U, // EVNEG 22363U, // EVNOR 22376U, // EVOR 19059U, // EVORC 24025U, // EVRLW 20326U, // EVRLWI 268459373U, // EVRNDW 24032U, // EVSLW 20352U, // EVSLWI 268455536U, // EVSPLATFI 268455748U, // EVSPLATI 22904U, // EVSRWIS 23434U, // EVSRWIU 23046U, // EVSRWS 23510U, // EVSRWU 58739428U, // EVSTDD 24597U, // EVSTDDX 58739964U, // EVSTDH 24701U, // EVSTDHX 58744181U, // EVSTDW 25241U, // EVSTDWX 58739707U, // EVSTWHE 24673U, // EVSTWHEX 58741308U, // EVSTWHO 24794U, // EVSTWHOX 58739785U, // EVSTWWE 24683U, // EVSTWWEX 58741353U, // EVSTWWO 24804U, // EVSTWWOX 268459113U, // EVSUBFSMIAAW 268459245U, // EVSUBFSSIAAW 268459179U, // EVSUBFUMIAAW 268459311U, // EVSUBFUSIAAW 23933U, // EVSUBFW 67132806U, // EVSUBIFW 22397U, // EVXOR 20002U, // EXTLDI 17071U, // EXTLDIo 20360U, // EXTLWI 17178U, // EXTLWIo 20051U, // EXTRDI 17114U, // EXTRDIo 20399U, // EXTRWI 17214U, // EXTRWIo 268454249U, // EXTSB 268454249U, // EXTSB8 268454249U, // EXTSB8_32_64 268452143U, // EXTSB8o 268452143U, // EXTSBo 268455280U, // EXTSH 268455280U, // EXTSH8 268455280U, // EXTSH8_32_64 268452478U, // EXTSH8o 268452478U, // EXTSHo 268459790U, // EXTSW 268459790U, // EXTSW_32_64 268453178U, // EXTSW_32_64o 268453178U, // EXTSWo 10885U, // EnforceIEIO 268457929U, // FABSD 268452914U, // FABSDo 268457929U, // FABSS 268452914U, // FABSSo 19092U, // FADD 22583U, // FADDS 17500U, // FADDSo 16800U, // FADDo 0U, // FADDrtz 268454656U, // FCFID 268458121U, // FCFIDS 268452983U, // FCFIDSo 268458848U, // FCFIDU 268458450U, // FCFIDUS 268453042U, // FCFIDUSo 268453077U, // FCFIDUo 268452288U, // FCFIDo 23452U, // FCMPUD 23452U, // FCMPUS 21013U, // FCPSGND 17278U, // FCPSGNDo 21013U, // FCPSGNS 17278U, // FCPSGNSo 268454665U, // FCTID 268460846U, // FCTIDUZ 268453264U, // FCTIDUZo 268460783U, // FCTIDZ 268453248U, // FCTIDZo 268452296U, // FCTIDo 268459443U, // FCTIW 268460857U, // FCTIWUZ 268453274U, // FCTIWUZo 268460868U, // FCTIWZ 268453284U, // FCTIWZo 268453139U, // FCTIWo 23551U, // FDIV 23039U, // FDIVS 17596U, // FDIVSo 17655U, // FDIVo 19100U, // FMADD 22592U, // FMADDS 17508U, // FMADDSo 16807U, // FMADDo 268457792U, // FMR 268452896U, // FMRo 18891U, // FMSUB 22562U, // FMSUBS 17481U, // FMSUBSo 16713U, // FMSUBo 20607U, // FMUL 22915U, // FMULS 17569U, // FMULSo 17247U, // FMULo 268457937U, // FNABSD 268452921U, // FNABSDo 268457937U, // FNABSS 268452921U, // FNABSSo 268455137U, // FNEGD 268452460U, // FNEGDo 268455137U, // FNEGS 268452460U, // FNEGSo 19109U, // FNMADD 22602U, // FNMADDS 17517U, // FNMADDSo 16815U, // FNMADDo 18900U, // FNMSUB 22572U, // FNMSUBS 17490U, // FNMSUBSo 16721U, // FNMSUBo 268454954U, // FRE 268458203U, // FRES 268452992U, // FRESo 268452412U, // FREo 268456252U, // FRIMD 268452710U, // FRIMDo 268456252U, // FRIMS 268452710U, // FRIMSo 268456486U, // FRIND 268452743U, // FRINDo 268456486U, // FRINS 268452743U, // FRINSo 268457336U, // FRIPD 268452829U, // FRIPDo 268457336U, // FRIPS 268452829U, // FRIPSo 268460832U, // FRIZD 268453257U, // FRIZDo 268460832U, // FRIZS 268453257U, // FRIZSo 268457576U, // FRSP 268452860U, // FRSPo 268454969U, // FRSQRTE 268458211U, // FRSQRTES 268452999U, // FRSQRTESo 268452418U, // FRSQRTEo 20559U, // FSELD 17240U, // FSELDo 20559U, // FSELS 17240U, // FSELSo 268458765U, // FSQRT 268458440U, // FSQRTS 268453033U, // FSQRTSo 268453060U, // FSQRTo 18883U, // FSUB 22553U, // FSUBS 17473U, // FSUBSo 16706U, // FSUBo 10616U, // GETtlsADDR 9435U, // GETtlsADDR32 10602U, // GETtlsldADDR 9420U, // GETtlsldADDR32 134625U, // ICBI 187117U, // ICBT 268455412U, // ICCCI 20344U, // INSLWI 17169U, // INSLWIo 20035U, // INSRDI 17096U, // INSRDIo 20383U, // INSRWI 17196U, // INSRWIo 20565U, // ISEL 20565U, // ISEL8 10783U, // ISYNC 75515893U, // LA 58738677U, // LAx 58745571U, // LBZ 58745571U, // LBZ8 24770U, // LBZCIX 83909613U, // LBZU 83909613U, // LBZU8 92299889U, // LBZUX 92299889U, // LBZUX8 285237953U, // LBZX 285237953U, // LBZX8 58739475U, // LD 285237511U, // LDARX 285237525U, // LDBRX 24739U, // LDCIX 83909490U, // LDU 92299805U, // LDUX 285237300U, // LDX 10511U, // LDgotTprelL 9317U, // LDgotTprelL32 10795U, // LDtoc 10736U, // LDtocBA 10736U, // LDtocCPT 10459U, // LDtocJTI 10469U, // LDtocL 58739436U, // LFD 83909449U, // LFDU 92299788U, // LFDUX 285237280U, // LFDX 285237207U, // LFIWAX 285237967U, // LFIWZX 58743027U, // LFS 83909539U, // LFSU 92299865U, // LFSUX 285237613U, // LFSX 58738478U, // LHA 58738478U, // LHA8 83909437U, // LHAU 83909437U, // LHAU8 92299744U, // LHAUX 92299744U, // LHAUX8 285237190U, // LHAX 285237190U, // LHAX8 285237540U, // LHBRX 285237540U, // LHBRX8 58745591U, // LHZ 58745591U, // LHZ8 24778U, // LHZCIX 83909619U, // LHZU 83909619U, // LHZU8 92299896U, // LHZUX 92299896U, // LHZUX8 285237959U, // LHZX 285237959U, // LHZX8 100683414U, // LI 100683414U, // LI8 100686188U, // LIS 100686188U, // LIS8 58744295U, // LMW 20407U, // LSWI 285237221U, // LVEBX 285237382U, // LVEHX 285237922U, // LVEWX 285233271U, // LVSL 285235116U, // LVSR 285237894U, // LVX 285233294U, // LVXL 58738709U, // LWA 285237518U, // LWARX 92299751U, // LWAUX 285237215U, // LWAX 285237215U, // LWAX_32 58738709U, // LWA_32 285237555U, // LWBRX 285237555U, // LWBRX8 58745676U, // LWZ 58745676U, // LWZ8 24786U, // LWZCIX 83909625U, // LWZU 83909625U, // LWZU8 92299903U, // LWZUX 92299903U, // LWZUX8 285237975U, // LWZX 285237975U, // LWZX8 10802U, // LWZtoc 285237315U, // LXSDX 285237156U, // LXVD2X 285237596U, // LXVDSX 285237173U, // LXVW4X 415475U, // MBAR 268455060U, // MCRF 268458232U, // MCRFS 284430U, // MFCR 284430U, // MFCR8 284601U, // MFCTR 284601U, // MFCTR8 268457721U, // MFDCR 284909U, // MFFS 279698U, // MFFSo 284466U, // MFLR 284466U, // MFLR8 284568U, // MFMSR 109071514U, // MFOCRF 109071514U, // MFOCRF8 268457860U, // MFSPR 117462930U, // MFSR 268456492U, // MFSRIN 268454264U, // MFTB 3430276U, // MFTB8 3692420U, // MFVRSAVE 3692420U, // MFVRSAVEv 284444U, // MFVSCR 10789U, // MSYNC 268455082U, // MTCRF 268455082U, // MTCRF8 284608U, // MTCTR 284608U, // MTCTR8 284608U, // MTCTR8loop 284608U, // MTCTRloop 302159623U, // MTDCR 411053U, // MTFSB0 411061U, // MTFSB1 19633U, // MTFSF 20072U, // MTFSFI 17123U, // MTFSFIo 268455089U, // MTFSFb 16996U, // MTFSFo 284472U, // MTLR 284472U, // MTLR8 268457887U, // MTMSR 268454758U, // MTMSRD 199842U, // MTOCRF 199842U, // MTOCRF8 268457867U, // MTSPR 219046U, // MTSR 268456500U, // MTSRIN 278748U, // MTVRSAVE 426204U, // MTVRSAVEv 284452U, // MTVSCR 19191U, // MULHD 23382U, // MULHDU 17612U, // MULHDUo 16824U, // MULHDo 23969U, // MULHW 23492U, // MULHWU 17638U, // MULHWUo 17675U, // MULHWo 19223U, // MULLD 16848U, // MULLDo 20122U, // MULLI 20122U, // MULLI8 24011U, // MULLW 17691U, // MULLWo 10640U, // MoveGOTtoLR 10628U, // MovePCtoLR 10070U, // MovePCtoLR8 19260U, // NAND 19260U, // NAND8 16862U, // NAND8o 16862U, // NANDo 268455138U, // NEG 268455138U, // NEG8 268452461U, // NEG8o 268452461U, // NEGo 10896U, // NOP 9105U, // NOP_GT_PWR6 9117U, // NOP_GT_PWR7 22351U, // NOR 22351U, // NOR8 17446U, // NOR8o 17446U, // NORo 22344U, // OR 22344U, // OR8 17447U, // OR8o 19047U, // ORC 19047U, // ORC8 16787U, // ORC8o 16787U, // ORCo 20276U, // ORI 20276U, // ORI8 22898U, // ORIS 22898U, // ORIS8 17447U, // ORo 268454799U, // POPCNTD 268459823U, // POPCNTW 10713U, // PPC32GOT 10723U, // PPC32PICGOT 20233U, // QVALIGNI 20233U, // QVALIGNIb 20233U, // QVALIGNIs 20281U, // QVESPLATI 20281U, // QVESPLATIb 20281U, // QVESPLATIs 268457927U, // QVFABS 268457927U, // QVFABSs 19090U, // QVFADD 22581U, // QVFADDS 22581U, // QVFADDSs 268454654U, // QVFCFID 268458119U, // QVFCFIDS 268458846U, // QVFCFIDU 268458448U, // QVFCFIDUS 268454654U, // QVFCFIDb 22227U, // QVFCMPEQ 22227U, // QVFCMPEQb 22227U, // QVFCMPEQbs 23283U, // QVFCMPGT 23283U, // QVFCMPGTb 23283U, // QVFCMPGTbs 23299U, // QVFCMPLT 23299U, // QVFCMPLTb 23299U, // QVFCMPLTbs 21011U, // QVFCPSGN 21011U, // QVFCPSGNs 268454663U, // QVFCTID 268458856U, // QVFCTIDU 268460844U, // QVFCTIDUZ 268460781U, // QVFCTIDZ 268454663U, // QVFCTIDb 268459441U, // QVFCTIW 268458956U, // QVFCTIWU 268460855U, // QVFCTIWUZ 268460866U, // QVFCTIWZ 20513U, // QVFLOGICAL 20513U, // QVFLOGICALb 20513U, // QVFLOGICALs 19098U, // QVFMADD 22590U, // QVFMADDS 22590U, // QVFMADDSs 268457790U, // QVFMR 268457790U, // QVFMRb 268457790U, // QVFMRs 18889U, // QVFMSUB 22560U, // QVFMSUBS 22560U, // QVFMSUBSs 20605U, // QVFMUL 22913U, // QVFMULS 22913U, // QVFMULSs 268457935U, // QVFNABS 268457935U, // QVFNABSs 268455135U, // QVFNEG 268455135U, // QVFNEGs 19107U, // QVFNMADD 22600U, // QVFNMADDS 22600U, // QVFNMADDSs 18898U, // QVFNMSUB 22570U, // QVFNMSUBS 22570U, // QVFNMSUBSs 20817U, // QVFPERM 20817U, // QVFPERMs 268454952U, // QVFRE 268458201U, // QVFRES 268458201U, // QVFRESs 268456250U, // QVFRIM 268456250U, // QVFRIMs 268456484U, // QVFRIN 268456484U, // QVFRINs 268457334U, // QVFRIP 268457334U, // QVFRIPs 268460830U, // QVFRIZ 268460830U, // QVFRIZs 268457574U, // QVFRSP 268457574U, // QVFRSPs 268454967U, // QVFRSQRTE 268458209U, // QVFRSQRTES 268458209U, // QVFRSQRTESs 20557U, // QVFSEL 20557U, // QVFSELb 20557U, // QVFSELbb 20557U, // QVFSELbs 18881U, // QVFSUB 22551U, // QVFSUBS 22551U, // QVFSUBSs 21000U, // QVFTSTNAN 21000U, // QVFTSTNANb 21000U, // QVFTSTNANbs 19144U, // QVFXMADD 22640U, // QVFXMADDS 20613U, // QVFXMUL 22922U, // QVFXMULS 19117U, // QVFXXCPNMADD 22611U, // QVFXXCPNMADDS 19154U, // QVFXXMADD 22651U, // QVFXXMADDS 19131U, // QVFXXNPMADD 22626U, // QVFXXNPMADDS 125849083U, // QVGPCI 285237749U, // QVLFCDUX 285231221U, // QVLFCDUXA 285237242U, // QVLFCDX 285231141U, // QVLFCDXA 285237826U, // QVLFCSUX 285231265U, // QVLFCSUXA 285237577U, // QVLFCSX 285231181U, // QVLFCSXA 285237577U, // QVLFCSXs 92299786U, // QVLFDUX 285231244U, // QVLFDUXA 285237278U, // QVLFDX 285231162U, // QVLFDXA 285237278U, // QVLFDXb 285237205U, // QVLFIWAX 285231130U, // QVLFIWAXA 285237965U, // QVLFIWZX 285231320U, // QVLFIWZXA 92299863U, // QVLFSUX 285231288U, // QVLFSUXA 285237611U, // QVLFSX 285231202U, // QVLFSXA 285237611U, // QVLFSXb 285237611U, // QVLFSXs 285237295U, // QVLPCLDX 285237628U, // QVLPCLSX 3957116U, // QVLPCLSXint 285237305U, // QVLPCRDX 285237648U, // QVLPCRSX 285237759U, // QVSTFCDUX 285231232U, // QVSTFCDUXA 285233139U, // QVSTFCDUXI 285231042U, // QVSTFCDUXIA 285237251U, // QVSTFCDX 285231151U, // QVSTFCDXA 285233097U, // QVSTFCDXI 285230996U, // QVSTFCDXIA 285237836U, // QVSTFCSUX 285231276U, // QVSTFCSUXA 285233162U, // QVSTFCSUXI 285231067U, // QVSTFCSUXIA 285237586U, // QVSTFCSX 285231191U, // QVSTFCSXA 285233118U, // QVSTFCSXI 285231019U, // QVSTFCSXIA 285237586U, // QVSTFCSXs 92447251U, // QVSTFDUX 285231254U, // QVSTFDUXA 285233151U, // QVSTFDUXI 285231055U, // QVSTFDUXIA 285237286U, // QVSTFDX 285231171U, // QVSTFDXA 285233108U, // QVSTFDXI 285231008U, // QVSTFDXIA 285237286U, // QVSTFDXb 285237937U, // QVSTFIWX 285231309U, // QVSTFIWXA 92447328U, // QVSTFSUX 285231298U, // QVSTFSUXA 285233174U, // QVSTFSUXI 285231080U, // QVSTFSUXIA 92447328U, // QVSTFSUXs 285237619U, // QVSTFSX 285231211U, // QVSTFSXA 285233129U, // QVSTFSXI 285231031U, // QVSTFSXIA 285237619U, // QVSTFSXs 10548U, // RESTORE_CR 10653U, // RESTORE_CRBIT 10429U, // RESTORE_VRSAVE 10827U, // RFCI 10838U, // RFDI 10843U, // RFI 10810U, // RFID 10832U, // RFMCI 20534U, // RLDCL 17223U, // RLDCLo 22272U, // RLDCR 17423U, // RLDCRo 18989U, // RLDIC 20541U, // RLDICL 20541U, // RLDICL_32_64 17231U, // RLDICLo 22292U, // RLDICR 17431U, // RLDICRo 16779U, // RLDICo 1115704993U, // RLDIMI 1115701996U, // RLDIMIo 1384140457U, // RLWIMI 1384140457U, // RLWIMI8 1384137461U, // RLWIMI8o 1384137461U, // RLWIMIo 20802U, // RLWINM 20802U, // RLWINM8 17261U, // RLWINM8o 17261U, // RLWINMo 20810U, // RLWNM 20810U, // RLWNM8 17270U, // RLWNM8o 17270U, // RLWNMo 20043U, // ROTRDI 17105U, // ROTRDIo 20391U, // ROTRWI 17205U, // ROTRWIo 10205U, // ReadTB 281210U, // SC 9649U, // SELECT_CC_F4 9881U, // SELECT_CC_F8 9674U, // SELECT_CC_I4 9926U, // SELECT_CC_I8 10223U, // SELECT_CC_QBRC 10252U, // SELECT_CC_QFRC 10341U, // SELECT_CC_QSRC 10312U, // SELECT_CC_VRRC 10281U, // SELECT_CC_VSFRC 10370U, // SELECT_CC_VSRC 9663U, // SELECT_F4 9895U, // SELECT_F8 9688U, // SELECT_I4 10059U, // SELECT_I8 10239U, // SELECT_QBRC 10268U, // SELECT_QFRC 10357U, // SELECT_QSRC 10328U, // SELECT_VRRC 10298U, // SELECT_VSFRC 10386U, // SELECT_VSRC 10761U, // SLBIA 281604U, // SLBIE 268454876U, // SLBMFEE 268454959U, // SLBMTE 19244U, // SLD 19996U, // SLDI 17064U, // SLDIo 16856U, // SLDo 24034U, // SLW 24034U, // SLW8 17699U, // SLW8o 20338U, // SLWI 17162U, // SLWIo 17699U, // SLWo 10560U, // SPILL_CR 10668U, // SPILL_CRBIT 10445U, // SPILL_VRSAVE 19084U, // SRAD 19971U, // SRADI 17052U, // SRADIo 16793U, // SRADo 23896U, // SRAW 20302U, // SRAWI 17150U, // SRAWIo 17668U, // SRAWo 19305U, // SRD 20037U, // SRDI 17098U, // SRDIo 16869U, // SRDo 24265U, // SRW 24265U, // SRW8 17705U, // SRW8o 20385U, // SRWI 17198U, // SRWIo 17705U, // SRWo 58739088U, // STB 58739088U, // STB8 24731U, // STBCIX 84056899U, // STBU 84056899U, // STBU8 92447214U, // STBUX 92447214U, // STBUX8 285237236U, // STBX 285237236U, // STBX8 58739608U, // STD 285237532U, // STDBRX 24746U, // STDCIX 285230440U, // STDCX 84056951U, // STDU 92447267U, // STDUX 285237330U, // STDX 58739441U, // STFD 84056911U, // STFDU 92447253U, // STFDUX 285237288U, // STFDX 285237939U, // STFIWX 58743039U, // STFS 84057001U, // STFSU 92447330U, // STFSUX 285237621U, // STFSX 58740113U, // STH 58740113U, // STH8 285237547U, // STHBRX 24754U, // STHCIX 84056964U, // STHU 84056964U, // STHU8 92447281U, // STHUX 92447281U, // STHUX8 285237397U, // STHX 285237397U, // STHX8 58744300U, // STMW 20413U, // STSWI 285237228U, // STVEBX 285237389U, // STVEHX 285237929U, // STVEWX 285237899U, // STVX 285233300U, // STVXL 58744632U, // STW 58744632U, // STW8 285237562U, // STWBRX 24762U, // STWCIX 285230448U, // STWCX 84057054U, // STWU 84057054U, // STWU8 92447338U, // STWUX 92447338U, // STWUX8 285237947U, // STWX 285237947U, // STWX8 285237322U, // STXSDX 285237164U, // STXVD2X 285237181U, // STXVW4X 19559U, // SUBF 19559U, // SUBF8 16989U, // SUBF8o 18968U, // SUBFC 18968U, // SUBFC8 16755U, // SUBFC8o 16755U, // SUBFCo 19436U, // SUBFE 19436U, // SUBFE8 16931U, // SUBFE8o 16931U, // SUBFEo 18996U, // SUBFIC 18996U, // SUBFIC8 268454937U, // SUBFME 268454937U, // SUBFME8 268452403U, // SUBFME8o 268452403U, // SUBFMEo 268455001U, // SUBFZE 268455001U, // SUBFZE8 268452436U, // SUBFZE8o 268452436U, // SUBFZEo 16989U, // SUBFo 19943U, // SUBI 18975U, // SUBIC 16763U, // SUBICo 22878U, // SUBIS 281182U, // SYNC 313588U, // TAILB 313588U, // TAILB8 329423U, // TAILBA 329423U, // TAILBA8 10917U, // TAILBCTR 10917U, // TAILBCTR8 269026886U, // TCRETURNai 269026793U, // TCRETURNai8 269011582U, // TCRETURNdi 269010423U, // TCRETURNdi8 268981990U, // TCRETURNri 268977669U, // TCRETURNri8 150420U, // TD 151131U, // TDI 10767U, // TLBIA 4361227U, // TLBIE 282693U, // TLBIEL 268459980U, // TLBIVAX 281360U, // TLBLD 282259U, // TLBLI 10815U, // TLBRE 19489U, // TLBRE2 268460354U, // TLBSX 24898U, // TLBSX2 17784U, // TLBSX2D 10775U, // TLBSYNC 10821U, // TLBWE 19522U, // TLBWE2 10891U, // TRAP 155425U, // TW 151492U, // TWI 268453395U, // UPDATE_VRSAVE 10537U, // UpdateGBR 24390U, // VADDCUW 21753U, // VADDFP 22514U, // VADDSBS 22831U, // VADDSHS 23073U, // VADDSWS 20674U, // VADDUBM 22542U, // VADDUBS 20702U, // VADDUDM 20741U, // VADDUHM 22859U, // VADDUHS 20860U, // VADDUWM 23100U, // VADDUWS 19290U, // VAND 18961U, // VANDC 18728U, // VAVGSB 19759U, // VAVGSH 24279U, // VAVGSW 18846U, // VAVGUB 19871U, // VAVGUH 24408U, // VAVGUW 1652580708U, // VCFSX 1879073124U, // VCFSX_0 1652580906U, // VCFUX 1879073322U, // VCFUX_0 268454382U, // VCLZB 268454855U, // VCLZD 268455380U, // VCLZH 268459923U, // VCLZW 21717U, // VCMPBFP 17330U, // VCMPBFPo 21816U, // VCMPEQFP 17351U, // VCMPEQFPo 18871U, // VCMPEQUB 16695U, // VCMPEQUBo 19365U, // VCMPEQUD 16886U, // VCMPEQUDo 19896U, // VCMPEQUH 17030U, // VCMPEQUHo 24433U, // VCMPEQUW 17730U, // VCMPEQUWo 21770U, // VCMPGEFP 17340U, // VCMPGEFPo 21826U, // VCMPGTFP 17362U, // VCMPGTFPo 18781U, // VCMPGTSB 16676U, // VCMPGTSBo 19324U, // VCMPGTSD 16875U, // VCMPGTSDo 19812U, // VCMPGTSH 17011U, // VCMPGTSHo 24324U, // VCMPGTSW 17711U, // VCMPGTSWo 18908U, // VCMPGTUB 16730U, // VCMPGTUBo 19375U, // VCMPGTUD 16897U, // VCMPGTUDo 19906U, // VCMPGTUH 17041U, // VCMPGTUHo 24443U, // VCMPGTUW 17741U, // VCMPGTUWo 1652578966U, // VCTSXS 1879071382U, // VCTSXS_0 1652578974U, // VCTUXS 1879071390U, // VCTUXS_0 23573U, // VEQV 268457243U, // VEXPTEFP 268457217U, // VLOGEFP 21744U, // VMADDFP 21836U, // VMAXFP 18800U, // VMAXSB 19334U, // VMAXSD 19831U, // VMAXSH 24341U, // VMAXSW 18918U, // VMAXUB 19385U, // VMAXUD 19916U, // VMAXUH 24453U, // VMAXUW 22808U, // VMHADDSHS 22819U, // VMHRADDSHS 19357U, // VMIDUD 21808U, // VMINFP 18764U, // VMINSB 19316U, // VMINSD 19795U, // VMINSH 24307U, // VMINSW 18854U, // VMINUB 19879U, // VMINUH 24416U, // VMINUW 20730U, // VMLADDUHM 18679U, // VMRGHB 19716U, // VMRGHH 23952U, // VMRGHW 18687U, // VMRGLB 19724U, // VMRGLH 23994U, // VMRGLW 20655U, // VMSUMMBM 20711U, // VMSUMSHM 22840U, // VMSUMSHS 20683U, // VMSUMUBM 20750U, // VMSUMUHM 22868U, // VMSUMUHS 18719U, // VMULESB 19750U, // VMULESH 24270U, // VMULESW 18837U, // VMULEUB 19862U, // VMULEUH 24399U, // VMULEUW 18772U, // VMULOSB 19803U, // VMULOSH 24315U, // VMULOSW 18862U, // VMULOUB 19887U, // VMULOUH 24424U, // VMULOUW 20869U, // VMULUWM 19275U, // VNAND 21726U, // VNMSUBFP 22364U, // VNOR 22377U, // VOR 19060U, // VORC 20826U, // VPERM 24823U, // VPKPX 22946U, // VPKSHSS 23003U, // VPKSHUS 22955U, // VPKSWSS 23021U, // VPKSWUS 20833U, // VPKUHUM 23012U, // VPKUHUS 20842U, // VPKUWUM 23030U, // VPKUWUS 268454278U, // VPOPCNTB 268454798U, // VPOPCNTD 268455303U, // VPOPCNTH 268459822U, // VPOPCNTW 268457236U, // VREFP 268456216U, // VRFIM 268456477U, // VRFIN 268457300U, // VRFIP 268460796U, // VRFIZ 18695U, // VRLB 19237U, // VRLD 19732U, // VRLH 24026U, // VRLW 268457253U, // VRSQRTEFP 20571U, // VSEL 20600U, // VSL 18701U, // VSLB 19243U, // VSLD 20243U, // VSLDOI 19738U, // VSLH 21085U, // VSLO 24033U, // VSLW 1652574590U, // VSPLTB 1652575615U, // VSPLTH 134236473U, // VSPLTISB 134237504U, // VSPLTISH 134242015U, // VSPLTISW 1652580125U, // VSPLTW 22445U, // VSR 18672U, // VSRAB 19083U, // VSRAD 19694U, // VSRAH 23895U, // VSRAW 18713U, // VSRB 19310U, // VSRD 19744U, // VSRH 21091U, // VSRO 24264U, // VSRW 24381U, // VSUBCUW 21736U, // VSUBFP 22505U, // VSUBSBS 22799U, // VSUBSHS 23064U, // VSUBSWS 20665U, // VSUBUBM 22533U, // VSUBUBS 20693U, // VSUBUDM 20721U, // VSUBUHM 22850U, // VSUBUHS 20851U, // VSUBUWM 23091U, // VSUBUWS 23054U, // VSUM2SWS 22495U, // VSUM4SBS 22789U, // VSUM4SHS 22523U, // VSUM4UBS 23082U, // VSUMSWS 268460270U, // VUPKHPX 268454192U, // VUPKHSB 268455223U, // VUPKHSH 268460286U, // VUPKLPX 268454211U, // VUPKLSB 268455242U, // VUPKLSH 22398U, // VXOR 33576830U, // V_SET0 33576830U, // V_SET0B 33576830U, // V_SET0H 4480735U, // V_SETALLONES 4480735U, // V_SETALLONESB 4480735U, // V_SETALLONESH 285437U, // WAIT 281573U, // WRTEE 282208U, // WRTEEI 22385U, // XOR 22385U, // XOR8 17452U, // XOR8o 20275U, // XORI 20275U, // XORI8 22897U, // XORIS 22897U, // XORIS8 17452U, // XORo 268457014U, // XSABSDP 21216U, // XSADDDP 21497U, // XSCMPODP 21629U, // XSCMPUDP 21457U, // XSCPSGNDP 268457543U, // XSCVDPSP 268458129U, // XSCVDPSXDS 268458574U, // XSCVDPSXWS 268458165U, // XSCVDPUXDS 268458610U, // XSCVDPUXWS 268456963U, // XSCVSPDP 268456690U, // XSCVSXDDP 268456712U, // XSCVUXDDP 21639U, // XSDIVDP 2189447864U, // XSMADDADP 2189448123U, // XSMADDMDP 21699U, // XSMAXDP 21479U, // XSMINDP 2189447818U, // XSMSUBADP 2189448077U, // XSMSUBMDP 21347U, // XSMULDP 268456994U, // XSNABSDP 268456785U, // XSNEGDP 2189447840U, // XSNMADDADP 2189448099U, // XSNMADDMDP 2189447794U, // XSNMSUBADP 2189448053U, // XSNMSUBMDP 268455707U, // XSRDPI 268454460U, // XSRDPIC 268456223U, // XSRDPIM 268457307U, // XSRDPIP 268460803U, // XSRDPIZ 268456745U, // XSREDP 268456761U, // XSRSQRTEDP 268457043U, // XSSQRTDP 21198U, // XSSUBDP 21648U, // XSTDIVDP 268457053U, // XSTSQRTDP 268457023U, // XVABSDP 268457592U, // XVABSSP 21225U, // XVADDDP 21941U, // XVADDSP 21527U, // XVCMPEQDP 17306U, // XVCMPEQDPo 22107U, // XVCMPEQSP 17392U, // XVCMPEQSPo 21278U, // XVCMPGEDP 17294U, // XVCMPGEDPo 21972U, // XVCMPGESP 17380U, // XVCMPGESPo 21576U, // XVCMPGTDP 17318U, // XVCMPGTDPo 22145U, // XVCMPGTSP 17411U, // XVCMPGTSPo 21468U, // XVCPSGNDP 22067U, // XVCPSGNSP 268457553U, // XVCVDPSP 268458141U, // XVCVDPSXDS 268458586U, // XVCVDPSXWS 268458177U, // XVCVDPUXDS 268458622U, // XVCVDPUXWS 268456973U, // XVCVSPDP 268458153U, // XVCVSPSXDS 268458598U, // XVCVSPSXWS 268458189U, // XVCVSPUXDS 268458634U, // XVCVSPUXWS 268456701U, // XVCVSXDDP 268457406U, // XVCVSXDSP 268457133U, // XVCVSXWDP 268457652U, // XVCVSXWSP 268456723U, // XVCVUXDDP 268457417U, // XVCVUXDSP 268457144U, // XVCVUXWDP 268457663U, // XVCVUXWSP 21668U, // XVDIVDP 22187U, // XVDIVSP 2189447875U, // XVMADDADP 2189448609U, // XVMADDASP 2189448134U, // XVMADDMDP 2189448744U, // XVMADDMSP 21708U, // XVMAXDP 22218U, // XVMAXSP 21488U, // XVMINDP 22078U, // XVMINSP 2189447829U, // XVMSUBADP 2189448586U, // XVMSUBASP 2189448088U, // XVMSUBMDP 2189448721U, // XVMSUBMSP 21356U, // XVMULDP 22012U, // XVMULSP 268457004U, // XVNABSDP 268457582U, // XVNABSSP 268456794U, // XVNEGDP 268457459U, // XVNEGSP 2189447852U, // XVNMADDADP 2189448597U, // XVNMADDASP 2189448111U, // XVNMADDMDP 2189448732U, // XVNMADDMSP 2189447806U, // XVNMSUBADP 2189448574U, // XVNMSUBASP 2189448065U, // XVNMSUBMDP 2189448709U, // XVNMSUBMSP 268455715U, // XVRDPI 268454469U, // XVRDPIC 268456232U, // XVRDPIM 268457316U, // XVRDPIP 268460812U, // XVRDPIZ 268456753U, // XVREDP 268457439U, // XVRESP 268455723U, // XVRSPI 268454478U, // XVRSPIC 268456241U, // XVRSPIM 268457325U, // XVRSPIP 268460821U, // XVRSPIZ 268456773U, // XVRSQRTEDP 268457447U, // XVRSQRTESP 268457075U, // XVSQRTDP 268457623U, // XVSQRTSP 21207U, // XVSUBDP 21932U, // XVSUBSP 21658U, // XVTDIVDP 22177U, // XVTDIVSP 268457064U, // XVTSQRTDP 268457612U, // XVTSQRTSP 19249U, // XXLAND 18943U, // XXLANDC 23557U, // XXLEQV 19257U, // XXLNAND 22348U, // XXLNOR 22341U, // XXLOR 19044U, // XXLORC 22341U, // XXLORf 22382U, // XXLXOR 23960U, // XXMRGHW 24002U, // XXMRGLW 20010U, // XXPERMDI 20577U, // XXSEL 20309U, // XXSLDWI 24357U, // XXSPLTW 150005U, // gBC 149203U, // gBCA 153522U, // gBCCTR 151663U, // gBCCTRL 151601U, // gBCL 149497U, // gBCLA 153388U, // gBCLR 151656U, // gBCLRL 0U }; static const uint16_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // ADD4 0U, // ADD4TLS 0U, // ADD4o 0U, // ADD8 0U, // ADD8TLS 0U, // ADD8TLS_ 0U, // ADD8o 0U, // ADDC 0U, // ADDC8 0U, // ADDC8o 0U, // ADDCo 0U, // ADDE 0U, // ADDE8 0U, // ADDE8o 0U, // ADDEo 1U, // ADDI 1U, // ADDI8 1U, // ADDIC 1U, // ADDIC8 1U, // ADDICo 1U, // ADDIS 1U, // ADDIS8 0U, // ADDISdtprelHA 0U, // ADDISdtprelHA32 0U, // ADDISgotTprelHA 0U, // ADDIStlsgdHA 0U, // ADDIStlsldHA 0U, // ADDIStocHA 0U, // ADDIdtprelL 0U, // ADDIdtprelL32 0U, // ADDItlsgdL 0U, // ADDItlsgdL32 0U, // ADDItlsgdLADDR 0U, // ADDItlsgdLADDR32 0U, // ADDItlsldL 0U, // ADDItlsldL32 0U, // ADDItlsldLADDR 0U, // ADDItlsldLADDR32 0U, // ADDItocL 0U, // ADDME 0U, // ADDME8 0U, // ADDME8o 0U, // ADDMEo 0U, // ADDZE 0U, // ADDZE8 0U, // ADDZE8o 0U, // ADDZEo 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 0U, // AND 0U, // AND8 0U, // AND8o 0U, // ANDC 0U, // ANDC8 0U, // ANDC8o 0U, // ANDCo 2U, // ANDISo 2U, // ANDISo8 2U, // ANDIo 2U, // ANDIo8 0U, // ANDIo_1_EQ_BIT 0U, // ANDIo_1_EQ_BIT8 0U, // ANDIo_1_GT_BIT 0U, // ANDIo_1_GT_BIT8 0U, // ANDo 0U, // ATOMIC_CMP_SWAP_I16 0U, // ATOMIC_CMP_SWAP_I32 0U, // ATOMIC_CMP_SWAP_I64 0U, // ATOMIC_CMP_SWAP_I8 0U, // ATOMIC_LOAD_ADD_I16 0U, // ATOMIC_LOAD_ADD_I32 0U, // ATOMIC_LOAD_ADD_I64 0U, // ATOMIC_LOAD_ADD_I8 0U, // ATOMIC_LOAD_AND_I16 0U, // ATOMIC_LOAD_AND_I32 0U, // ATOMIC_LOAD_AND_I64 0U, // ATOMIC_LOAD_AND_I8 0U, // ATOMIC_LOAD_NAND_I16 0U, // ATOMIC_LOAD_NAND_I32 0U, // ATOMIC_LOAD_NAND_I64 0U, // ATOMIC_LOAD_NAND_I8 0U, // ATOMIC_LOAD_OR_I16 0U, // ATOMIC_LOAD_OR_I32 0U, // ATOMIC_LOAD_OR_I64 0U, // ATOMIC_LOAD_OR_I8 0U, // ATOMIC_LOAD_SUB_I16 0U, // ATOMIC_LOAD_SUB_I32 0U, // ATOMIC_LOAD_SUB_I64 0U, // ATOMIC_LOAD_SUB_I8 0U, // ATOMIC_LOAD_XOR_I16 0U, // ATOMIC_LOAD_XOR_I32 0U, // ATOMIC_LOAD_XOR_I64 0U, // ATOMIC_LOAD_XOR_I8 0U, // ATOMIC_SWAP_I16 0U, // ATOMIC_SWAP_I32 0U, // ATOMIC_SWAP_I64 0U, // ATOMIC_SWAP_I8 0U, // ATTN 0U, // B 0U, // BA 0U, // BC 0U, // BCC 0U, // BCCA 0U, // BCCCTR 0U, // BCCCTR8 0U, // BCCCTRL 0U, // BCCCTRL8 0U, // BCCL 0U, // BCCLA 0U, // BCCLR 0U, // BCCLRL 0U, // BCCTR 0U, // BCCTR8 0U, // BCCTR8n 0U, // BCCTRL 0U, // BCCTRL8 0U, // BCCTRL8n 0U, // BCCTRLn 0U, // BCCTRn 0U, // BCL 0U, // BCLR 0U, // BCLRL 0U, // BCLRLn 0U, // BCLRn 0U, // BCLalways 0U, // BCLn 0U, // BCTR 0U, // BCTR8 0U, // BCTRL 0U, // BCTRL8 0U, // BCTRL8_LDinto_toc 0U, // BCn 0U, // BDNZ 0U, // BDNZ8 0U, // BDNZA 0U, // BDNZAm 0U, // BDNZAp 0U, // BDNZL 0U, // BDNZLA 0U, // BDNZLAm 0U, // BDNZLAp 0U, // BDNZLR 0U, // BDNZLR8 0U, // BDNZLRL 0U, // BDNZLRLm 0U, // BDNZLRLp 0U, // BDNZLRm 0U, // BDNZLRp 0U, // BDNZLm 0U, // BDNZLp 0U, // BDNZm 0U, // BDNZp 0U, // BDZ 0U, // BDZ8 0U, // BDZA 0U, // BDZAm 0U, // BDZAp 0U, // BDZL 0U, // BDZLA 0U, // BDZLAm 0U, // BDZLAp 0U, // BDZLR 0U, // BDZLR8 0U, // BDZLRL 0U, // BDZLRLm 0U, // BDZLRLp 0U, // BDZLRm 0U, // BDZLRp 0U, // BDZLm 0U, // BDZLp 0U, // BDZm 0U, // BDZp 0U, // BL 0U, // BL8 0U, // BL8_NOP 0U, // BL8_NOP_TLS 0U, // BL8_TLS 0U, // BL8_TLS_ 0U, // BLA 0U, // BLA8 0U, // BLA8_NOP 0U, // BLR 0U, // BLR8 0U, // BLRL 0U, // BL_TLS 0U, // BRINC 19U, // CLRLSLDI 19U, // CLRLSLDIo 52U, // CLRLSLWI 52U, // CLRLSLWIo 3U, // CLRRDI 3U, // CLRRDIo 4U, // CLRRWI 4U, // CLRRWIo 0U, // CMPB 0U, // CMPB8 0U, // CMPD 1U, // CMPDI 0U, // CMPLD 2U, // CMPLDI 0U, // CMPLW 2U, // CMPLWI 0U, // CMPW 1U, // CMPWI 0U, // CNTLZD 0U, // CNTLZDo 0U, // CNTLZW 0U, // CNTLZW8 0U, // CNTLZW8o 0U, // CNTLZWo 0U, // CR6SET 0U, // CR6UNSET 0U, // CRAND 0U, // CRANDC 0U, // CREQV 0U, // CRNAND 0U, // CRNOR 0U, // CROR 0U, // CRORC 5U, // CRSET 5U, // CRUNSET 0U, // CRXOR 0U, // DCBA 0U, // DCBF 0U, // DCBI 0U, // DCBST 0U, // DCBT 0U, // DCBTST 0U, // DCBZ 0U, // DCBZL 0U, // DCCCI 0U, // DIVD 0U, // DIVDU 0U, // DIVDUo 0U, // DIVDo 0U, // DIVW 0U, // DIVWU 0U, // DIVWUo 0U, // DIVWo 0U, // DSS 0U, // DSSALL 0U, // DST 0U, // DST64 0U, // DSTST 0U, // DSTST64 0U, // DSTSTT 0U, // DSTSTT64 0U, // DSTT 0U, // DSTT64 0U, // DYNALLOC 0U, // DYNALLOC8 0U, // EH_SjLj_LongJmp32 0U, // EH_SjLj_LongJmp64 0U, // EH_SjLj_SetJmp32 0U, // EH_SjLj_SetJmp64 0U, // EH_SjLj_Setup 0U, // EQV 0U, // EQV8 0U, // EQV8o 0U, // EQVo 0U, // EVABS 0U, // EVADDIW 0U, // EVADDSMIAAW 0U, // EVADDSSIAAW 0U, // EVADDUMIAAW 0U, // EVADDUSIAAW 0U, // EVADDW 0U, // EVAND 0U, // EVANDC 0U, // EVCMPEQ 0U, // EVCMPGTS 0U, // EVCMPGTU 0U, // EVCMPLTS 0U, // EVCMPLTU 0U, // EVCNTLSW 0U, // EVCNTLZW 0U, // EVDIVWS 0U, // EVDIVWU 0U, // EVEQV 0U, // EVEXTSB 0U, // EVEXTSH 0U, // EVLDD 0U, // EVLDDX 0U, // EVLDH 0U, // EVLDHX 0U, // EVLDW 0U, // EVLDWX 0U, // EVLHHESPLAT 0U, // EVLHHESPLATX 0U, // EVLHHOSSPLAT 0U, // EVLHHOSSPLATX 0U, // EVLHHOUSPLAT 0U, // EVLHHOUSPLATX 0U, // EVLWHE 0U, // EVLWHEX 0U, // EVLWHOS 0U, // EVLWHOSX 0U, // EVLWHOU 0U, // EVLWHOUX 0U, // EVLWHSPLAT 0U, // EVLWHSPLATX 0U, // EVLWWSPLAT 0U, // EVLWWSPLATX 0U, // EVMERGEHI 0U, // EVMERGEHILO 0U, // EVMERGELO 0U, // EVMERGELOHI 0U, // EVMHEGSMFAA 0U, // EVMHEGSMFAN 0U, // EVMHEGSMIAA 0U, // EVMHEGSMIAN 0U, // EVMHEGUMIAA 0U, // EVMHEGUMIAN 0U, // EVMHESMF 0U, // EVMHESMFA 0U, // EVMHESMFAAW 0U, // EVMHESMFANW 0U, // EVMHESMI 0U, // EVMHESMIA 0U, // EVMHESMIAAW 0U, // EVMHESMIANW 0U, // EVMHESSF 0U, // EVMHESSFA 0U, // EVMHESSFAAW 0U, // EVMHESSFANW 0U, // EVMHESSIAAW 0U, // EVMHESSIANW 0U, // EVMHEUMI 0U, // EVMHEUMIA 0U, // EVMHEUMIAAW 0U, // EVMHEUMIANW 0U, // EVMHEUSIAAW 0U, // EVMHEUSIANW 0U, // EVMHOGSMFAA 0U, // EVMHOGSMFAN 0U, // EVMHOGSMIAA 0U, // EVMHOGSMIAN 0U, // EVMHOGUMIAA 0U, // EVMHOGUMIAN 0U, // EVMHOSMF 0U, // EVMHOSMFA 0U, // EVMHOSMFAAW 0U, // EVMHOSMFANW 0U, // EVMHOSMI 0U, // EVMHOSMIA 0U, // EVMHOSMIAAW 0U, // EVMHOSMIANW 0U, // EVMHOSSF 0U, // EVMHOSSFA 0U, // EVMHOSSFAAW 0U, // EVMHOSSFANW 0U, // EVMHOSSIAAW 0U, // EVMHOSSIANW 0U, // EVMHOUMI 0U, // EVMHOUMIA 0U, // EVMHOUMIAAW 0U, // EVMHOUMIANW 0U, // EVMHOUSIAAW 0U, // EVMHOUSIANW 0U, // EVMRA 0U, // EVMWHSMF 0U, // EVMWHSMFA 0U, // EVMWHSMI 0U, // EVMWHSMIA 0U, // EVMWHSSF 0U, // EVMWHSSFA 0U, // EVMWHUMI 0U, // EVMWHUMIA 0U, // EVMWLSMIAAW 0U, // EVMWLSMIANW 0U, // EVMWLSSIAAW 0U, // EVMWLSSIANW 0U, // EVMWLUMI 0U, // EVMWLUMIA 0U, // EVMWLUMIAAW 0U, // EVMWLUMIANW 0U, // EVMWLUSIAAW 0U, // EVMWLUSIANW 0U, // EVMWSMF 0U, // EVMWSMFA 0U, // EVMWSMFAA 0U, // EVMWSMFAN 0U, // EVMWSMI 0U, // EVMWSMIA 0U, // EVMWSMIAA 0U, // EVMWSMIAN 0U, // EVMWSSF 0U, // EVMWSSFA 0U, // EVMWSSFAA 0U, // EVMWSSFAN 0U, // EVMWUMI 0U, // EVMWUMIA 0U, // EVMWUMIAA 0U, // EVMWUMIAN 0U, // EVNAND 0U, // EVNEG 0U, // EVNOR 0U, // EVOR 0U, // EVORC 0U, // EVRLW 4U, // EVRLWI 0U, // EVRNDW 0U, // EVSLW 4U, // EVSLWI 0U, // EVSPLATFI 0U, // EVSPLATI 4U, // EVSRWIS 4U, // EVSRWIU 0U, // EVSRWS 0U, // EVSRWU 0U, // EVSTDD 0U, // EVSTDDX 0U, // EVSTDH 0U, // EVSTDHX 0U, // EVSTDW 0U, // EVSTDWX 0U, // EVSTWHE 0U, // EVSTWHEX 0U, // EVSTWHO 0U, // EVSTWHOX 0U, // EVSTWWE 0U, // EVSTWWEX 0U, // EVSTWWO 0U, // EVSTWWOX 0U, // EVSUBFSMIAAW 0U, // EVSUBFSSIAAW 0U, // EVSUBFUMIAAW 0U, // EVSUBFUSIAAW 0U, // EVSUBFW 0U, // EVSUBIFW 0U, // EVXOR 19U, // EXTLDI 19U, // EXTLDIo 52U, // EXTLWI 52U, // EXTLWIo 19U, // EXTRDI 19U, // EXTRDIo 52U, // EXTRWI 52U, // EXTRWIo 0U, // EXTSB 0U, // EXTSB8 0U, // EXTSB8_32_64 0U, // EXTSB8o 0U, // EXTSBo 0U, // EXTSH 0U, // EXTSH8 0U, // EXTSH8_32_64 0U, // EXTSH8o 0U, // EXTSHo 0U, // EXTSW 0U, // EXTSW_32_64 0U, // EXTSW_32_64o 0U, // EXTSWo 0U, // EnforceIEIO 0U, // FABSD 0U, // FABSDo 0U, // FABSS 0U, // FABSSo 0U, // FADD 0U, // FADDS 0U, // FADDSo 0U, // FADDo 0U, // FADDrtz 0U, // FCFID 0U, // FCFIDS 0U, // FCFIDSo 0U, // FCFIDU 0U, // FCFIDUS 0U, // FCFIDUSo 0U, // FCFIDUo 0U, // FCFIDo 0U, // FCMPUD 0U, // FCMPUS 0U, // FCPSGND 0U, // FCPSGNDo 0U, // FCPSGNS 0U, // FCPSGNSo 0U, // FCTID 0U, // FCTIDUZ 0U, // FCTIDUZo 0U, // FCTIDZ 0U, // FCTIDZo 0U, // FCTIDo 0U, // FCTIW 0U, // FCTIWUZ 0U, // FCTIWUZo 0U, // FCTIWZ 0U, // FCTIWZo 0U, // FCTIWo 0U, // FDIV 0U, // FDIVS 0U, // FDIVSo 0U, // FDIVo 80U, // FMADD 80U, // FMADDS 80U, // FMADDSo 80U, // FMADDo 0U, // FMR 0U, // FMRo 80U, // FMSUB 80U, // FMSUBS 80U, // FMSUBSo 80U, // FMSUBo 0U, // FMUL 0U, // FMULS 0U, // FMULSo 0U, // FMULo 0U, // FNABSD 0U, // FNABSDo 0U, // FNABSS 0U, // FNABSSo 0U, // FNEGD 0U, // FNEGDo 0U, // FNEGS 0U, // FNEGSo 80U, // FNMADD 80U, // FNMADDS 80U, // FNMADDSo 80U, // FNMADDo 80U, // FNMSUB 80U, // FNMSUBS 80U, // FNMSUBSo 80U, // FNMSUBo 0U, // FRE 0U, // FRES 0U, // FRESo 0U, // FREo 0U, // FRIMD 0U, // FRIMDo 0U, // FRIMS 0U, // FRIMSo 0U, // FRIND 0U, // FRINDo 0U, // FRINS 0U, // FRINSo 0U, // FRIPD 0U, // FRIPDo 0U, // FRIPS 0U, // FRIPSo 0U, // FRIZD 0U, // FRIZDo 0U, // FRIZS 0U, // FRIZSo 0U, // FRSP 0U, // FRSPo 0U, // FRSQRTE 0U, // FRSQRTES 0U, // FRSQRTESo 0U, // FRSQRTEo 80U, // FSELD 80U, // FSELDo 80U, // FSELS 80U, // FSELSo 0U, // FSQRT 0U, // FSQRTS 0U, // FSQRTSo 0U, // FSQRTo 0U, // FSUB 0U, // FSUBS 0U, // FSUBSo 0U, // FSUBo 0U, // GETtlsADDR 0U, // GETtlsADDR32 0U, // GETtlsldADDR 0U, // GETtlsldADDR32 0U, // ICBI 0U, // ICBT 0U, // ICCCI 52U, // INSLWI 52U, // INSLWIo 19U, // INSRDI 19U, // INSRDIo 52U, // INSRWI 52U, // INSRWIo 80U, // ISEL 80U, // ISEL8 0U, // ISYNC 0U, // LA 0U, // LAx 0U, // LBZ 0U, // LBZ8 0U, // LBZCIX 0U, // LBZU 0U, // LBZU8 0U, // LBZUX 0U, // LBZUX8 0U, // LBZX 0U, // LBZX8 0U, // LD 0U, // LDARX 0U, // LDBRX 0U, // LDCIX 0U, // LDU 0U, // LDUX 0U, // LDX 0U, // LDgotTprelL 0U, // LDgotTprelL32 0U, // LDtoc 0U, // LDtocBA 0U, // LDtocCPT 0U, // LDtocJTI 0U, // LDtocL 0U, // LFD 0U, // LFDU 0U, // LFDUX 0U, // LFDX 0U, // LFIWAX 0U, // LFIWZX 0U, // LFS 0U, // LFSU 0U, // LFSUX 0U, // LFSX 0U, // LHA 0U, // LHA8 0U, // LHAU 0U, // LHAU8 0U, // LHAUX 0U, // LHAUX8 0U, // LHAX 0U, // LHAX8 0U, // LHBRX 0U, // LHBRX8 0U, // LHZ 0U, // LHZ8 0U, // LHZCIX 0U, // LHZU 0U, // LHZU8 0U, // LHZUX 0U, // LHZUX8 0U, // LHZX 0U, // LHZX8 0U, // LI 0U, // LI8 0U, // LIS 0U, // LIS8 0U, // LMW 4U, // LSWI 0U, // LVEBX 0U, // LVEHX 0U, // LVEWX 0U, // LVSL 0U, // LVSR 0U, // LVX 0U, // LVXL 0U, // LWA 0U, // LWARX 0U, // LWAUX 0U, // LWAX 0U, // LWAX_32 0U, // LWA_32 0U, // LWBRX 0U, // LWBRX8 0U, // LWZ 0U, // LWZ8 0U, // LWZCIX 0U, // LWZU 0U, // LWZU8 0U, // LWZUX 0U, // LWZUX8 0U, // LWZX 0U, // LWZX8 0U, // LWZtoc 0U, // LXSDX 0U, // LXVD2X 0U, // LXVDSX 0U, // LXVW4X 0U, // MBAR 0U, // MCRF 0U, // MCRFS 0U, // MFCR 0U, // MFCR8 0U, // MFCTR 0U, // MFCTR8 0U, // MFDCR 0U, // MFFS 0U, // MFFSo 0U, // MFLR 0U, // MFLR8 0U, // MFMSR 0U, // MFOCRF 0U, // MFOCRF8 0U, // MFSPR 0U, // MFSR 0U, // MFSRIN 0U, // MFTB 0U, // MFTB8 0U, // MFVRSAVE 0U, // MFVRSAVEv 0U, // MFVSCR 0U, // MSYNC 0U, // MTCRF 0U, // MTCRF8 0U, // MTCTR 0U, // MTCTR8 0U, // MTCTR8loop 0U, // MTCTRloop 0U, // MTDCR 0U, // MTFSB0 0U, // MTFSB1 80U, // MTFSF 0U, // MTFSFI 0U, // MTFSFIo 0U, // MTFSFb 80U, // MTFSFo 0U, // MTLR 0U, // MTLR8 0U, // MTMSR 0U, // MTMSRD 0U, // MTOCRF 0U, // MTOCRF8 0U, // MTSPR 0U, // MTSR 0U, // MTSRIN 0U, // MTVRSAVE 0U, // MTVRSAVEv 0U, // MTVSCR 0U, // MULHD 0U, // MULHDU 0U, // MULHDUo 0U, // MULHDo 0U, // MULHW 0U, // MULHWU 0U, // MULHWUo 0U, // MULHWo 0U, // MULLD 0U, // MULLDo 1U, // MULLI 1U, // MULLI8 0U, // MULLW 0U, // MULLWo 0U, // MoveGOTtoLR 0U, // MovePCtoLR 0U, // MovePCtoLR8 0U, // NAND 0U, // NAND8 0U, // NAND8o 0U, // NANDo 0U, // NEG 0U, // NEG8 0U, // NEG8o 0U, // NEGo 0U, // NOP 0U, // NOP_GT_PWR6 0U, // NOP_GT_PWR7 0U, // NOR 0U, // NOR8 0U, // NOR8o 0U, // NORo 0U, // OR 0U, // OR8 0U, // OR8o 0U, // ORC 0U, // ORC8 0U, // ORC8o 0U, // ORCo 2U, // ORI 2U, // ORI8 2U, // ORIS 2U, // ORIS8 0U, // ORo 0U, // POPCNTD 0U, // POPCNTW 0U, // PPC32GOT 0U, // PPC32PICGOT 112U, // QVALIGNI 112U, // QVALIGNIb 112U, // QVALIGNIs 6U, // QVESPLATI 6U, // QVESPLATIb 6U, // QVESPLATIs 0U, // QVFABS 0U, // QVFABSs 0U, // QVFADD 0U, // QVFADDS 0U, // QVFADDSs 0U, // QVFCFID 0U, // QVFCFIDS 0U, // QVFCFIDU 0U, // QVFCFIDUS 0U, // QVFCFIDb 0U, // QVFCMPEQ 0U, // QVFCMPEQb 0U, // QVFCMPEQbs 0U, // QVFCMPGT 0U, // QVFCMPGTb 0U, // QVFCMPGTbs 0U, // QVFCMPLT 0U, // QVFCMPLTb 0U, // QVFCMPLTbs 0U, // QVFCPSGN 0U, // QVFCPSGNs 0U, // QVFCTID 0U, // QVFCTIDU 0U, // QVFCTIDUZ 0U, // QVFCTIDZ 0U, // QVFCTIDb 0U, // QVFCTIW 0U, // QVFCTIWU 0U, // QVFCTIWUZ 0U, // QVFCTIWZ 144U, // QVFLOGICAL 144U, // QVFLOGICALb 144U, // QVFLOGICALs 7U, // QVFMADD 7U, // QVFMADDS 7U, // QVFMADDSs 0U, // QVFMR 0U, // QVFMRb 0U, // QVFMRs 7U, // QVFMSUB 7U, // QVFMSUBS 7U, // QVFMSUBSs 0U, // QVFMUL 0U, // QVFMULS 0U, // QVFMULSs 0U, // QVFNABS 0U, // QVFNABSs 0U, // QVFNEG 0U, // QVFNEGs 7U, // QVFNMADD 7U, // QVFNMADDS 7U, // QVFNMADDSs 7U, // QVFNMSUB 7U, // QVFNMSUBS 7U, // QVFNMSUBSs 80U, // QVFPERM 80U, // QVFPERMs 0U, // QVFRE 0U, // QVFRES 0U, // QVFRESs 0U, // QVFRIM 0U, // QVFRIMs 0U, // QVFRIN 0U, // QVFRINs 0U, // QVFRIP 0U, // QVFRIPs 0U, // QVFRIZ 0U, // QVFRIZs 0U, // QVFRSP 0U, // QVFRSPs 0U, // QVFRSQRTE 0U, // QVFRSQRTES 0U, // QVFRSQRTESs 7U, // QVFSEL 7U, // QVFSELb 7U, // QVFSELbb 7U, // QVFSELbs 0U, // QVFSUB 0U, // QVFSUBS 0U, // QVFSUBSs 0U, // QVFTSTNAN 0U, // QVFTSTNANb 0U, // QVFTSTNANbs 7U, // QVFXMADD 7U, // QVFXMADDS 0U, // QVFXMUL 0U, // QVFXMULS 7U, // QVFXXCPNMADD 7U, // QVFXXCPNMADDS 7U, // QVFXXMADD 7U, // QVFXXMADDS 7U, // QVFXXNPMADD 7U, // QVFXXNPMADDS 0U, // QVGPCI 0U, // QVLFCDUX 0U, // QVLFCDUXA 0U, // QVLFCDX 0U, // QVLFCDXA 0U, // QVLFCSUX 0U, // QVLFCSUXA 0U, // QVLFCSX 0U, // QVLFCSXA 0U, // QVLFCSXs 0U, // QVLFDUX 0U, // QVLFDUXA 0U, // QVLFDX 0U, // QVLFDXA 0U, // QVLFDXb 0U, // QVLFIWAX 0U, // QVLFIWAXA 0U, // QVLFIWZX 0U, // QVLFIWZXA 0U, // QVLFSUX 0U, // QVLFSUXA 0U, // QVLFSX 0U, // QVLFSXA 0U, // QVLFSXb 0U, // QVLFSXs 0U, // QVLPCLDX 0U, // QVLPCLSX 0U, // QVLPCLSXint 0U, // QVLPCRDX 0U, // QVLPCRSX 0U, // QVSTFCDUX 0U, // QVSTFCDUXA 0U, // QVSTFCDUXI 0U, // QVSTFCDUXIA 0U, // QVSTFCDX 0U, // QVSTFCDXA 0U, // QVSTFCDXI 0U, // QVSTFCDXIA 0U, // QVSTFCSUX 0U, // QVSTFCSUXA 0U, // QVSTFCSUXI 0U, // QVSTFCSUXIA 0U, // QVSTFCSX 0U, // QVSTFCSXA 0U, // QVSTFCSXI 0U, // QVSTFCSXIA 0U, // QVSTFCSXs 0U, // QVSTFDUX 0U, // QVSTFDUXA 0U, // QVSTFDUXI 0U, // QVSTFDUXIA 0U, // QVSTFDX 0U, // QVSTFDXA 0U, // QVSTFDXI 0U, // QVSTFDXIA 0U, // QVSTFDXb 0U, // QVSTFIWX 0U, // QVSTFIWXA 0U, // QVSTFSUX 0U, // QVSTFSUXA 0U, // QVSTFSUXI 0U, // QVSTFSUXIA 0U, // QVSTFSUXs 0U, // QVSTFSX 0U, // QVSTFSXA 0U, // QVSTFSXI 0U, // QVSTFSXIA 0U, // QVSTFSXs 0U, // RESTORE_CR 0U, // RESTORE_CRBIT 0U, // RESTORE_VRSAVE 0U, // RFCI 0U, // RFDI 0U, // RFI 0U, // RFID 0U, // RFMCI 16U, // RLDCL 16U, // RLDCLo 16U, // RLDCR 16U, // RLDCRo 19U, // RLDIC 19U, // RLDICL 19U, // RLDICL_32_64 19U, // RLDICLo 19U, // RLDICR 19U, // RLDICRo 19U, // RLDICo 0U, // RLDIMI 0U, // RLDIMIo 0U, // RLWIMI 0U, // RLWIMI8 0U, // RLWIMI8o 0U, // RLWIMIo 308U, // RLWINM 308U, // RLWINM8 308U, // RLWINM8o 308U, // RLWINMo 304U, // RLWNM 304U, // RLWNM8 304U, // RLWNM8o 304U, // RLWNMo 3U, // ROTRDI 3U, // ROTRDIo 4U, // ROTRWI 4U, // ROTRWIo 0U, // ReadTB 0U, // SC 0U, // SELECT_CC_F4 0U, // SELECT_CC_F8 0U, // SELECT_CC_I4 0U, // SELECT_CC_I8 0U, // SELECT_CC_QBRC 0U, // SELECT_CC_QFRC 0U, // SELECT_CC_QSRC 0U, // SELECT_CC_VRRC 0U, // SELECT_CC_VSFRC 0U, // SELECT_CC_VSRC 0U, // SELECT_F4 0U, // SELECT_F8 0U, // SELECT_I4 0U, // SELECT_I8 0U, // SELECT_QBRC 0U, // SELECT_QFRC 0U, // SELECT_QSRC 0U, // SELECT_VRRC 0U, // SELECT_VSFRC 0U, // SELECT_VSRC 0U, // SLBIA 0U, // SLBIE 0U, // SLBMFEE 0U, // SLBMTE 0U, // SLD 3U, // SLDI 3U, // SLDIo 0U, // SLDo 0U, // SLW 0U, // SLW8 0U, // SLW8o 4U, // SLWI 4U, // SLWIo 0U, // SLWo 0U, // SPILL_CR 0U, // SPILL_CRBIT 0U, // SPILL_VRSAVE 0U, // SRAD 3U, // SRADI 3U, // SRADIo 0U, // SRADo 0U, // SRAW 4U, // SRAWI 4U, // SRAWIo 0U, // SRAWo 0U, // SRD 3U, // SRDI 3U, // SRDIo 0U, // SRDo 0U, // SRW 0U, // SRW8 0U, // SRW8o 4U, // SRWI 4U, // SRWIo 0U, // SRWo 0U, // STB 0U, // STB8 0U, // STBCIX 0U, // STBU 0U, // STBU8 0U, // STBUX 0U, // STBUX8 0U, // STBX 0U, // STBX8 0U, // STD 0U, // STDBRX 0U, // STDCIX 0U, // STDCX 0U, // STDU 0U, // STDUX 0U, // STDX 0U, // STFD 0U, // STFDU 0U, // STFDUX 0U, // STFDX 0U, // STFIWX 0U, // STFS 0U, // STFSU 0U, // STFSUX 0U, // STFSX 0U, // STH 0U, // STH8 0U, // STHBRX 0U, // STHCIX 0U, // STHU 0U, // STHU8 0U, // STHUX 0U, // STHUX8 0U, // STHX 0U, // STHX8 0U, // STMW 4U, // STSWI 0U, // STVEBX 0U, // STVEHX 0U, // STVEWX 0U, // STVX 0U, // STVXL 0U, // STW 0U, // STW8 0U, // STWBRX 0U, // STWCIX 0U, // STWCX 0U, // STWU 0U, // STWU8 0U, // STWUX 0U, // STWUX8 0U, // STWX 0U, // STWX8 0U, // STXSDX 0U, // STXVD2X 0U, // STXVW4X 0U, // SUBF 0U, // SUBF8 0U, // SUBF8o 0U, // SUBFC 0U, // SUBFC8 0U, // SUBFC8o 0U, // SUBFCo 0U, // SUBFE 0U, // SUBFE8 0U, // SUBFE8o 0U, // SUBFEo 1U, // SUBFIC 1U, // SUBFIC8 0U, // SUBFME 0U, // SUBFME8 0U, // SUBFME8o 0U, // SUBFMEo 0U, // SUBFZE 0U, // SUBFZE8 0U, // SUBFZE8o 0U, // SUBFZEo 0U, // SUBFo 1U, // SUBI 1U, // SUBIC 1U, // SUBICo 1U, // SUBIS 0U, // SYNC 0U, // TAILB 0U, // TAILB8 0U, // TAILBA 0U, // TAILBA8 0U, // TAILBCTR 0U, // TAILBCTR8 0U, // TCRETURNai 0U, // TCRETURNai8 0U, // TCRETURNdi 0U, // TCRETURNdi8 0U, // TCRETURNri 0U, // TCRETURNri8 0U, // TD 1U, // TDI 0U, // TLBIA 0U, // TLBIE 0U, // TLBIEL 0U, // TLBIVAX 0U, // TLBLD 0U, // TLBLI 0U, // TLBRE 0U, // TLBRE2 0U, // TLBSX 0U, // TLBSX2 0U, // TLBSX2D 0U, // TLBSYNC 0U, // TLBWE 0U, // TLBWE2 0U, // TRAP 0U, // TW 1U, // TWI 0U, // UPDATE_VRSAVE 0U, // UpdateGBR 0U, // VADDCUW 0U, // VADDFP 0U, // VADDSBS 0U, // VADDSHS 0U, // VADDSWS 0U, // VADDUBM 0U, // VADDUBS 0U, // VADDUDM 0U, // VADDUHM 0U, // VADDUHS 0U, // VADDUWM 0U, // VADDUWS 0U, // VAND 0U, // VANDC 0U, // VAVGSB 0U, // VAVGSH 0U, // VAVGSW 0U, // VAVGUB 0U, // VAVGUH 0U, // VAVGUW 0U, // VCFSX 0U, // VCFSX_0 0U, // VCFUX 0U, // VCFUX_0 0U, // VCLZB 0U, // VCLZD 0U, // VCLZH 0U, // VCLZW 0U, // VCMPBFP 0U, // VCMPBFPo 0U, // VCMPEQFP 0U, // VCMPEQFPo 0U, // VCMPEQUB 0U, // VCMPEQUBo 0U, // VCMPEQUD 0U, // VCMPEQUDo 0U, // VCMPEQUH 0U, // VCMPEQUHo 0U, // VCMPEQUW 0U, // VCMPEQUWo 0U, // VCMPGEFP 0U, // VCMPGEFPo 0U, // VCMPGTFP 0U, // VCMPGTFPo 0U, // VCMPGTSB 0U, // VCMPGTSBo 0U, // VCMPGTSD 0U, // VCMPGTSDo 0U, // VCMPGTSH 0U, // VCMPGTSHo 0U, // VCMPGTSW 0U, // VCMPGTSWo 0U, // VCMPGTUB 0U, // VCMPGTUBo 0U, // VCMPGTUD 0U, // VCMPGTUDo 0U, // VCMPGTUH 0U, // VCMPGTUHo 0U, // VCMPGTUW 0U, // VCMPGTUWo 0U, // VCTSXS 0U, // VCTSXS_0 0U, // VCTUXS 0U, // VCTUXS_0 0U, // VEQV 0U, // VEXPTEFP 0U, // VLOGEFP 80U, // VMADDFP 0U, // VMAXFP 0U, // VMAXSB 0U, // VMAXSD 0U, // VMAXSH 0U, // VMAXSW 0U, // VMAXUB 0U, // VMAXUD 0U, // VMAXUH 0U, // VMAXUW 80U, // VMHADDSHS 80U, // VMHRADDSHS 0U, // VMIDUD 0U, // VMINFP 0U, // VMINSB 0U, // VMINSD 0U, // VMINSH 0U, // VMINSW 0U, // VMINUB 0U, // VMINUH 0U, // VMINUW 80U, // VMLADDUHM 0U, // VMRGHB 0U, // VMRGHH 0U, // VMRGHW 0U, // VMRGLB 0U, // VMRGLH 0U, // VMRGLW 80U, // VMSUMMBM 80U, // VMSUMSHM 80U, // VMSUMSHS 80U, // VMSUMUBM 80U, // VMSUMUHM 80U, // VMSUMUHS 0U, // VMULESB 0U, // VMULESH 0U, // VMULESW 0U, // VMULEUB 0U, // VMULEUH 0U, // VMULEUW 0U, // VMULOSB 0U, // VMULOSH 0U, // VMULOSW 0U, // VMULOUB 0U, // VMULOUH 0U, // VMULOUW 0U, // VMULUWM 0U, // VNAND 80U, // VNMSUBFP 0U, // VNOR 0U, // VOR 0U, // VORC 80U, // VPERM 0U, // VPKPX 0U, // VPKSHSS 0U, // VPKSHUS 0U, // VPKSWSS 0U, // VPKSWUS 0U, // VPKUHUM 0U, // VPKUHUS 0U, // VPKUWUM 0U, // VPKUWUS 0U, // VPOPCNTB 0U, // VPOPCNTD 0U, // VPOPCNTH 0U, // VPOPCNTW 0U, // VREFP 0U, // VRFIM 0U, // VRFIN 0U, // VRFIP 0U, // VRFIZ 0U, // VRLB 0U, // VRLD 0U, // VRLH 0U, // VRLW 0U, // VRSQRTEFP 80U, // VSEL 0U, // VSL 0U, // VSLB 0U, // VSLD 48U, // VSLDOI 0U, // VSLH 0U, // VSLO 0U, // VSLW 0U, // VSPLTB 0U, // VSPLTH 0U, // VSPLTISB 0U, // VSPLTISH 0U, // VSPLTISW 0U, // VSPLTW 0U, // VSR 0U, // VSRAB 0U, // VSRAD 0U, // VSRAH 0U, // VSRAW 0U, // VSRB 0U, // VSRD 0U, // VSRH 0U, // VSRO 0U, // VSRW 0U, // VSUBCUW 0U, // VSUBFP 0U, // VSUBSBS 0U, // VSUBSHS 0U, // VSUBSWS 0U, // VSUBUBM 0U, // VSUBUBS 0U, // VSUBUDM 0U, // VSUBUHM 0U, // VSUBUHS 0U, // VSUBUWM 0U, // VSUBUWS 0U, // VSUM2SWS 0U, // VSUM4SBS 0U, // VSUM4SHS 0U, // VSUM4UBS 0U, // VSUMSWS 0U, // VUPKHPX 0U, // VUPKHSB 0U, // VUPKHSH 0U, // VUPKLPX 0U, // VUPKLSB 0U, // VUPKLSH 0U, // VXOR 5U, // V_SET0 5U, // V_SET0B 5U, // V_SET0H 0U, // V_SETALLONES 0U, // V_SETALLONESB 0U, // V_SETALLONESH 0U, // WAIT 0U, // WRTEE 0U, // WRTEEI 0U, // XOR 0U, // XOR8 0U, // XOR8o 2U, // XORI 2U, // XORI8 2U, // XORIS 2U, // XORIS8 0U, // XORo 0U, // XSABSDP 0U, // XSADDDP 0U, // XSCMPODP 0U, // XSCMPUDP 0U, // XSCPSGNDP 0U, // XSCVDPSP 0U, // XSCVDPSXDS 0U, // XSCVDPSXWS 0U, // XSCVDPUXDS 0U, // XSCVDPUXWS 0U, // XSCVSPDP 0U, // XSCVSXDDP 0U, // XSCVUXDDP 0U, // XSDIVDP 0U, // XSMADDADP 0U, // XSMADDMDP 0U, // XSMAXDP 0U, // XSMINDP 0U, // XSMSUBADP 0U, // XSMSUBMDP 0U, // XSMULDP 0U, // XSNABSDP 0U, // XSNEGDP 0U, // XSNMADDADP 0U, // XSNMADDMDP 0U, // XSNMSUBADP 0U, // XSNMSUBMDP 0U, // XSRDPI 0U, // XSRDPIC 0U, // XSRDPIM 0U, // XSRDPIP 0U, // XSRDPIZ 0U, // XSREDP 0U, // XSRSQRTEDP 0U, // XSSQRTDP 0U, // XSSUBDP 0U, // XSTDIVDP 0U, // XSTSQRTDP 0U, // XVABSDP 0U, // XVABSSP 0U, // XVADDDP 0U, // XVADDSP 0U, // XVCMPEQDP 0U, // XVCMPEQDPo 0U, // XVCMPEQSP 0U, // XVCMPEQSPo 0U, // XVCMPGEDP 0U, // XVCMPGEDPo 0U, // XVCMPGESP 0U, // XVCMPGESPo 0U, // XVCMPGTDP 0U, // XVCMPGTDPo 0U, // XVCMPGTSP 0U, // XVCMPGTSPo 0U, // XVCPSGNDP 0U, // XVCPSGNSP 0U, // XVCVDPSP 0U, // XVCVDPSXDS 0U, // XVCVDPSXWS 0U, // XVCVDPUXDS 0U, // XVCVDPUXWS 0U, // XVCVSPDP 0U, // XVCVSPSXDS 0U, // XVCVSPSXWS 0U, // XVCVSPUXDS 0U, // XVCVSPUXWS 0U, // XVCVSXDDP 0U, // XVCVSXDSP 0U, // XVCVSXWDP 0U, // XVCVSXWSP 0U, // XVCVUXDDP 0U, // XVCVUXDSP 0U, // XVCVUXWDP 0U, // XVCVUXWSP 0U, // XVDIVDP 0U, // XVDIVSP 0U, // XVMADDADP 0U, // XVMADDASP 0U, // XVMADDMDP 0U, // XVMADDMSP 0U, // XVMAXDP 0U, // XVMAXSP 0U, // XVMINDP 0U, // XVMINSP 0U, // XVMSUBADP 0U, // XVMSUBASP 0U, // XVMSUBMDP 0U, // XVMSUBMSP 0U, // XVMULDP 0U, // XVMULSP 0U, // XVNABSDP 0U, // XVNABSSP 0U, // XVNEGDP 0U, // XVNEGSP 0U, // XVNMADDADP 0U, // XVNMADDASP 0U, // XVNMADDMDP 0U, // XVNMADDMSP 0U, // XVNMSUBADP 0U, // XVNMSUBASP 0U, // XVNMSUBMDP 0U, // XVNMSUBMSP 0U, // XVRDPI 0U, // XVRDPIC 0U, // XVRDPIM 0U, // XVRDPIP 0U, // XVRDPIZ 0U, // XVREDP 0U, // XVRESP 0U, // XVRSPI 0U, // XVRSPIC 0U, // XVRSPIM 0U, // XVRSPIP 0U, // XVRSPIZ 0U, // XVRSQRTEDP 0U, // XVRSQRTESP 0U, // XVSQRTDP 0U, // XVSQRTSP 0U, // XVSUBDP 0U, // XVSUBSP 0U, // XVTDIVDP 0U, // XVTDIVSP 0U, // XVTSQRTDP 0U, // XVTSQRTSP 0U, // XXLAND 0U, // XXLANDC 0U, // XXLEQV 0U, // XXLNAND 0U, // XXLNOR 0U, // XXLOR 0U, // XXLORC 0U, // XXLORf 0U, // XXLXOR 0U, // XXMRGHW 0U, // XXMRGLW 112U, // XXPERMDI 80U, // XXSEL 112U, // XXSLDWI 6U, // XXSPLTW 8U, // gBC 9U, // gBCA 0U, // gBCCTR 0U, // gBCCTRL 8U, // gBCL 9U, // gBCLA 0U, // gBCLR 0U, // gBCLRL 0U }; #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ '#', 'E', 'H', '_', 'S', 'j', 'L', 'j', '_', 'S', 'e', 't', 'u', 'p', 9, 0, /* 16 */ 'b', 'd', 'z', 'l', 'a', '+', 32, 0, /* 24 */ 'b', 'd', 'n', 'z', 'l', 'a', '+', 32, 0, /* 33 */ 'b', 'd', 'z', 'a', '+', 32, 0, /* 40 */ 'b', 'd', 'n', 'z', 'a', '+', 32, 0, /* 48 */ 'b', 'd', 'z', 'l', '+', 32, 0, /* 55 */ 'b', 'd', 'n', 'z', 'l', '+', 32, 0, /* 63 */ 'b', 'd', 'z', '+', 32, 0, /* 69 */ 'b', 'd', 'n', 'z', '+', 32, 0, /* 76 */ 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0, /* 3990 */ 'c', 'l', 'r', 'r', 'w', 'i', 32, 0, /* 3998 */ 'i', 'n', 's', 'r', 'w', 'i', 32, 0, /* 4006 */ 'r', 'o', 't', 'r', 'w', 'i', 32, 0, /* 4014 */ 'e', 'x', 't', 'r', 'w', 'i', 32, 0, /* 4022 */ 'l', 's', 'w', 'i', 32, 0, /* 4028 */ 's', 't', 's', 'w', 'i', 32, 0, /* 4035 */ 't', 'w', 'i', 32, 0, /* 4040 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'x', 'i', 32, 0, /* 4051 */ 'q', 'v', 's', 't', 'f', 'd', 'x', 'i', 32, 0, /* 4061 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'x', 'i', 32, 0, /* 4072 */ 'q', 'v', 's', 't', 'f', 's', 'x', 'i', 32, 0, /* 4082 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'u', 'x', 'i', 32, 0, /* 4094 */ 'q', 'v', 's', 't', 'f', 'd', 'u', 'x', 'i', 32, 0, /* 4105 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'u', 'x', 'i', 32, 0, /* 4117 */ 'q', 'v', 's', 't', 'f', 's', 'u', 'x', 'i', 32, 0, /* 4128 */ 'q', 'v', 'f', 'l', 'o', 'g', 'i', 'c', 'a', 'l', 32, 0, /* 4140 */ 'b', 'l', 32, 0, /* 4144 */ 'b', 'c', 'l', 32, 0, /* 4149 */ 'r', 'l', 'd', 'c', 'l', 32, 0, /* 4156 */ 'r', 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'm', 32, 0, /* 4326 */ 'v', 'm', 's', 'u', 'm', 's', 'h', 'm', 32, 0, /* 4336 */ 'v', 's', 'u', 'b', 'u', 'h', 'm', 32, 0, /* 4345 */ 'v', 'm', 'l', 'a', 'd', 'd', 'u', 'h', 'm', 32, 0, /* 4356 */ 'v', 'a', 'd', 'd', 'u', 'h', 'm', 32, 0, /* 4365 */ 'v', 'm', 's', 'u', 'm', 'u', 'h', 'm', 32, 0, /* 4375 */ 'v', 'r', 'f', 'i', 'm', 32, 0, /* 4382 */ 'x', 's', 'r', 'd', 'p', 'i', 'm', 32, 0, /* 4391 */ 'x', 'v', 'r', 'd', 'p', 'i', 'm', 32, 0, /* 4400 */ 'x', 'v', 'r', 's', 'p', 'i', 'm', 32, 0, /* 4409 */ 'q', 'v', 'f', 'r', 'i', 'm', 32, 0, /* 4417 */ 'r', 'l', 'w', 'i', 'n', 'm', 32, 0, /* 4425 */ 'r', 'l', 'w', 'n', 'm', 32, 0, /* 4432 */ 'q', 'v', 'f', 'p', 'e', 'r', 'm', 32, 0, /* 4441 */ 'v', 'p', 'e', 'r', 'm', 32, 0, /* 4448 */ 'v', 'p', 'k', 'u', 'h', 'u', 'm', 32, 0, /* 4457 */ 'v', 'p', 'k', 'u', 'w', 'u', 'm', 32, 0, /* 4466 */ 'v', 's', 'u', 'b', 'u', 'w', 'm', 32, 0, /* 4475 */ 'v', 'a', 'd', 'd', 'u', 'w', 'm', 32, 0, /* 4484 */ 'v', 'm', 'u', 'l', 'u', 'w', 'm', 32, 0, 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4667 */ 'e', 'v', 's', 't', 'w', 'h', 'o', 32, 0, /* 4676 */ 'e', 'v', 'm', 'e', 'r', 'g', 'e', 'l', 'o', 32, 0, /* 4687 */ 'e', 'v', 'm', 'e', 'r', 'g', 'e', 'h', 'i', 'l', 'o', 32, 0, /* 4700 */ 'v', 's', 'l', 'o', 32, 0, /* 4706 */ 'v', 's', 'r', 'o', 32, 0, /* 4712 */ 'e', 'v', 's', 't', 'w', 'w', 'o', 32, 0, /* 4721 */ 'x', 's', 'n', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, /* 4733 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, /* 4745 */ 'x', 's', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, /* 4756 */ 'x', 'v', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, /* 4767 */ 'x', 's', 'n', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, /* 4779 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, /* 4791 */ 'x', 's', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, /* 4802 */ 'x', 'v', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, /* 4813 */ 'x', 's', 's', 'u', 'b', 'd', 'p', 32, 0, /* 4822 */ 'x', 'v', 's', 'u', 'b', 'd', 'p', 32, 0, /* 4831 */ 'x', 's', 'a', 'd', 'd', 'd', 'p', 32, 0, /* 4840 */ 'x', 'v', 'a', 'd', 'd', 'd', 'p', 32, 0, /* 4849 */ 'x', 's', 'c', 'v', 's', 'x', 'd', 'd', 'p', 32, 0, /* 4860 */ 'x', 'v', 'c', 'v', 's', 'x', 'd', 'd', 'p', 32, 0, /* 4871 */ 'x', 's', 'c', 'v', 'u', 'x', 'd', 'd', 'p', 32, 0, /* 4882 */ 'x', 'v', 'c', 'v', 'u', 'x', 'd', 'd', 'p', 32, 0, /* 4893 */ 'x', 'v', 'c', 'm', 'p', 'g', 'e', 'd', 'p', 32, 0, /* 4904 */ 'x', 's', 'r', 'e', 'd', 'p', 32, 0, /* 4912 */ 'x', 'v', 'r', 'e', 'd', 'p', 32, 0, /* 4920 */ 'x', 's', 'r', 's', 'q', 'r', 't', 'e', 'd', 'p', 32, 0, /* 4932 */ 'x', 'v', 'r', 's', 'q', 'r', 't', 'e', 'd', 'p', 32, 0, /* 4944 */ 'x', 's', 'n', 'e', 'g', 'd', 'p', 32, 0, /* 4953 */ 'x', 'v', 'n', 'e', 'g', 'd', 'p', 32, 0, /* 4962 */ 'x', 's', 'm', 'u', 'l', 'd', 'p', 32, 0, /* 4971 */ 'x', 'v', 'm', 'u', 'l', 'd', 'p', 32, 0, /* 4980 */ 'x', 's', 'n', 'm', 's', 'u', 'b', 'm', 'd', 'p', 32, 0, /* 4992 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'm', 'd', 'p', 32, 0, /* 5004 */ 'x', 's', 'm', 's', 'u', 'b', 'm', 'd', 'p', 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5359 */ 'v', 'm', 'a', 'd', 'd', 'f', 'p', 32, 0, /* 5368 */ 'v', 'a', 'd', 'd', 'f', 'p', 32, 0, /* 5376 */ 'v', 'l', 'o', 'g', 'e', 'f', 'p', 32, 0, /* 5385 */ 'v', 'c', 'm', 'p', 'g', 'e', 'f', 'p', 32, 0, /* 5395 */ 'v', 'r', 'e', 'f', 'p', 32, 0, /* 5402 */ 'v', 'e', 'x', 'p', 't', 'e', 'f', 'p', 32, 0, /* 5412 */ 'v', 'r', 's', 'q', 'r', 't', 'e', 'f', 'p', 32, 0, /* 5423 */ 'v', 'm', 'i', 'n', 'f', 'p', 32, 0, /* 5431 */ 'v', 'c', 'm', 'p', 'e', 'q', 'f', 'p', 32, 0, /* 5441 */ 'v', 'c', 'm', 'p', 'g', 't', 'f', 'p', 32, 0, /* 5451 */ 'v', 'm', 'a', 'x', 'f', 'p', 32, 0, /* 5459 */ 'v', 'r', 'f', 'i', 'p', 32, 0, /* 5466 */ 'x', 's', 'r', 'd', 'p', 'i', 'p', 32, 0, /* 5475 */ 'x', 'v', 'r', 'd', 'p', 'i', 'p', 32, 0, /* 5484 */ 'x', 'v', 'r', 's', 'p', 'i', 'p', 32, 0, /* 5493 */ 'q', 'v', 'f', 'r', 'i', 'p', 32, 0, /* 5501 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'a', 's', 'p', 32, 0, /* 5513 */ 'x', 'v', 'm', 's', 'u', 'b', 'a', 's', 'p', 32, 0, /* 5524 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'a', 's', 'p', 32, 0, /* 5536 */ 'x', 'v', 'm', 'a', 'd', 'd', 'a', 's', 'p', 32, 0, /* 5547 */ 'x', 'v', 's', 'u', 'b', 's', 'p', 32, 0, /* 5556 */ 'x', 'v', 'a', 'd', 'd', 's', 'p', 32, 0, /* 5565 */ 'x', 'v', 'c', 'v', 's', 'x', 'd', 's', 'p', 32, 0, /* 5576 */ 'x', 'v', 'c', 'v', 'u', 'x', 'd', 's', 'p', 32, 0, /* 5587 */ 'x', 'v', 'c', 'm', 'p', 'g', 'e', 's', 'p', 32, 0, /* 5598 */ 'x', 'v', 'r', 'e', 's', 'p', 32, 0, /* 5606 */ 'x', 'v', 'r', 's', 'q', 'r', 't', 'e', 's', 'p', 32, 0, /* 5618 */ 'x', 'v', 'n', 'e', 'g', 's', 'p', 32, 0, /* 5627 */ 'x', 'v', 'm', 'u', 'l', 's', 'p', 32, 0, /* 5636 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'm', 's', 'p', 32, 0, /* 5648 */ 'x', 'v', 'm', 's', 'u', 'b', 'm', 's', 'p', 32, 0, /* 5659 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'm', 's', 'p', 32, 0, /* 5671 */ 'x', 'v', 'm', 'a', 'd', 'd', 'm', 's', 'p', 32, 0, /* 5682 */ 'x', 'v', 'c', 'p', 's', 'g', 'n', 's', 'p', 32, 0, /* 5693 */ 'x', 'v', 'm', 'i', 'n', 's', 'p', 32, 0, /* 5702 */ 'x', 's', 'c', 'v', 'd', 'p', 's', 'p', 32, 0, /* 5712 */ 'x', 'v', 'c', 'v', 'd', 'p', 's', 'p', 32, 0, /* 5722 */ 'x', 'v', 'c', 'm', 'p', 'e', 'q', 's', 'p', 32, 0, /* 5733 */ 'q', 'v', 'f', 'r', 's', 'p', 32, 0, /* 5741 */ 'x', 'v', 'n', 'a', 'b', 's', 's', 'p', 32, 0, /* 5751 */ 'x', 'v', 'a', 'b', 's', 's', 'p', 32, 0, /* 5760 */ 'x', 'v', 'c', 'm', 'p', 'g', 't', 's', 'p', 32, 0, /* 5771 */ 'x', 'v', 't', 's', 'q', 'r', 't', 's', 'p', 32, 0, /* 5782 */ 'x', 'v', 's', 'q', 'r', 't', 's', 'p', 32, 0, /* 5792 */ 'x', 'v', 't', 'd', 'i', 'v', 's', 'p', 32, 0, /* 5802 */ 'x', 'v', 'd', 'i', 'v', 's', 'p', 32, 0, /* 5811 */ 'x', 'v', 'c', 'v', 's', 'x', 'w', 's', 'p', 32, 0, /* 5822 */ 'x', 'v', 'c', 'v', 'u', 'x', 'w', 's', 'p', 32, 0, /* 5833 */ 'x', 'v', 'm', 'a', 'x', 's', 'p', 32, 0, /* 5842 */ 'q', 'v', 'f', 'c', 'm', 'p', 'e', 'q', 32, 0, /* 5852 */ 'e', 'v', 'c', 'm', 'p', 'e', 'q', 32, 0, /* 5861 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'r', 32, 0, /* 5874 */ 'm', 'b', 'a', 'r', 32, 0, /* 5880 */ 'm', 'f', 'd', 'c', 'r', 32, 0, /* 5887 */ 'r', 'l', 'd', 'c', 'r', 32, 0, /* 5894 */ 'm', 't', 'd', 'c', 'r', 32, 0, /* 5901 */ 'm', 'f', 'c', 'r', 32, 0, /* 5907 */ 'r', 'l', 'd', 'i', 'c', 'r', 32, 0, /* 5915 */ 'm', 'f', 'v', 's', 'c', 'r', 32, 0, /* 5923 */ 'm', 't', 'v', 's', 'c', 'r', 32, 0, /* 5931 */ 'b', 'c', 'l', 'r', 32, 0, /* 5937 */ 'm', 'f', 'l', 'r', 32, 0, /* 5943 */ 'm', 't', 'l', 'r', 32, 0, /* 5949 */ 'q', 'v', 'f', 'm', 'r', 32, 0, /* 5956 */ 'x', 'x', 'l', 'o', 'r', 32, 0, /* 5963 */ 'x', 'x', 'l', 'n', 'o', 'r', 32, 0, /* 5971 */ 'c', 'r', 'n', 'o', 'r', 32, 0, /* 5978 */ 'e', 'v', 'n', 'o', 'r', 32, 0, /* 5985 */ 'c', 'r', 'o', 'r', 32, 0, /* 5991 */ 'e', 'v', 'o', 'r', 32, 0, /* 5997 */ 'x', 'x', 'l', 'x', 'o', 'r', 32, 0, /* 6005 */ 'c', 'r', 'x', 'o', 'r', 32, 0, /* 6012 */ 'e', 'v', 'x', 'o', 'r', 32, 0, /* 6019 */ 'm', 'f', 's', 'p', 'r', 32, 0, /* 6026 */ 'm', 't', 's', 'p', 'r', 32, 0, /* 6033 */ 'm', 'f', 's', 'r', 32, 0, /* 6039 */ 'm', 'f', 'm', 's', 'r', 32, 0, /* 6046 */ 'm', 't', 'm', 's', 'r', 32, 0, /* 6053 */ 'm', 't', 's', 'r', 32, 0, /* 6059 */ 'l', 'v', 's', 'r', 32, 0, /* 6065 */ 'b', 'c', 'c', 't', 'r', 32, 0, /* 6072 */ 'm', 'f', 'c', 't', 'r', 32, 0, /* 6079 */ 'm', 't', 'c', 't', 'r', 32, 0, /* 6086 */ 'q', 'v', 'f', 'a', 'b', 's', 32, 0, /* 6094 */ 'q', 'v', 'f', 'n', 'a', 'b', 's', 32, 0, /* 6103 */ 'e', 'v', 'a', 'b', 's', 32, 0, /* 6110 */ 'v', 's', 'u', 'm', '4', 's', 'b', 's', 32, 0, /* 6120 */ 'v', 's', 'u', 'b', 's', 'b', 's', 32, 0, /* 6129 */ 'v', 'a', 'd', 'd', 's', 'b', 's', 32, 0, /* 6138 */ 'v', 's', 'u', 'm', '4', 'u', 'b', 's', 32, 0, /* 6148 */ 'v', 's', 'u', 'b', 'u', 'b', 's', 32, 0, /* 6157 */ 'v', 'a', 'd', 'd', 'u', 'b', 's', 32, 0, /* 6166 */ 'q', 'v', 'f', 's', 'u', 'b', 's', 32, 0, /* 6175 */ 'q', 'v', 'f', 'm', 's', 'u', 'b', 's', 32, 0, /* 6185 */ 'q', 'v', 'f', 'n', 'm', 's', 'u', 'b', 's', 32, 0, /* 6196 */ 'q', 'v', 'f', 'a', 'd', 'd', 's', 32, 0, /* 6205 */ 'q', 'v', 'f', 'm', 'a', 'd', 'd', 's', 32, 0, /* 6215 */ 'q', 'v', 'f', 'n', 'm', 'a', 'd', 'd', 's', 32, 0, /* 6226 */ 'q', 'v', 'f', 'x', 'x', 'c', 'p', 'n', 'm', 'a', 'd', 'd', 's', 32, 0, /* 6241 */ 'q', 'v', 'f', 'x', 'x', 'n', 'p', 'm', 'a', 'd', 'd', 's', 32, 0, /* 6255 */ 'q', 'v', 'f', 'x', 'm', 'a', 'd', 'd', 's', 32, 0, /* 6266 */ 'q', 'v', 'f', 'x', 'x', 'm', 'a', 'd', 'd', 's', 32, 0, /* 6278 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 's', 32, 0, /* 6288 */ 'x', 's', 'c', 'v', 'd', 'p', 's', 'x', 'd', 's', 32, 0, /* 6300 */ 'x', 'v', 'c', 'v', 'd', 'p', 's', 'x', 'd', 's', 32, 0, /* 6312 */ 'x', 'v', 'c', 'v', 's', 'p', 's', 'x', 'd', 's', 32, 0, /* 6324 */ 'x', 's', 'c', 'v', 'd', 'p', 'u', 'x', 'd', 's', 32, 0, /* 6336 */ 'x', 'v', 'c', 'v', 'd', 'p', 'u', 'x', 'd', 's', 32, 0, /* 6348 */ 'x', 'v', 'c', 'v', 's', 'p', 'u', 'x', 'd', 's', 32, 0, /* 6360 */ 'q', 'v', 'f', 'r', 'e', 's', 32, 0, /* 6368 */ 'q', 'v', 'f', 'r', 's', 'q', 'r', 't', 'e', 's', 32, 0, /* 6380 */ 'm', 'f', 'f', 's', 32, 0, /* 6386 */ 'l', 'f', 's', 32, 0, /* 6391 */ 'm', 'c', 'r', 'f', 's', 32, 0, /* 6398 */ 's', 't', 'f', 's', 32, 0, /* 6404 */ 'v', 's', 'u', 'm', '4', 's', 'h', 's', 32, 0, /* 6414 */ 'v', 's', 'u', 'b', 's', 'h', 's', 32, 0, /* 6423 */ 'v', 'm', 'h', 'a', 'd', 'd', 's', 'h', 's', 32, 0, /* 6434 */ 'v', 'm', 'h', 'r', 'a', 'd', 'd', 's', 'h', 's', 32, 0, /* 6446 */ 'v', 'a', 'd', 'd', 's', 'h', 's', 32, 0, /* 6455 */ 'v', 'm', 's', 'u', 'm', 's', 'h', 's', 32, 0, /* 6465 */ 'v', 's', 'u', 'b', 'u', 'h', 's', 32, 0, /* 6474 */ 'v', 'a', 'd', 'd', 'u', 'h', 's', 32, 0, /* 6483 */ 'v', 'm', 's', 'u', 'm', 'u', 'h', 's', 32, 0, /* 6493 */ 's', 'u', 'b', 'i', 's', 32, 0, /* 6500 */ 'a', 'd', 'd', 'i', 's', 32, 0, /* 6507 */ 'l', 'i', 's', 32, 0, /* 6512 */ 'x', 'o', 'r', 'i', 's', 32, 0, /* 6519 */ 'e', 'v', 's', 'r', 'w', 'i', 's', 32, 0, /* 6528 */ 'q', 'v', 'f', 'm', 'u', 'l', 's', 32, 0, /* 6537 */ 'q', 'v', 'f', 'x', 'm', 'u', 'l', 's', 32, 0, /* 6547 */ 'e', 'v', 'l', 'w', 'h', 'o', 's', 32, 0, /* 6556 */ 'd', 's', 's', 32, 0, /* 6561 */ 'v', 'p', 'k', 's', 'h', 's', 's', 32, 0, /* 6570 */ 'v', 'p', 'k', 's', 'w', 's', 's', 32, 0, /* 6579 */ 'e', 'v', 'c', 'm', 'p', 'g', 't', 's', 32, 0, /* 6589 */ 'e', 'v', 'c', 'm', 'p', 'l', 't', 's', 32, 0, /* 6599 */ 'f', 's', 'q', 'r', 't', 's', 32, 0, /* 6607 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 'u', 's', 32, 0, /* 6618 */ 'v', 'p', 'k', 's', 'h', 'u', 's', 32, 0, /* 6627 */ 'v', 'p', 'k', 'u', 'h', 'u', 's', 32, 0, /* 6636 */ 'v', 'p', 'k', 's', 'w', 'u', 's', 32, 0, /* 6645 */ 'v', 'p', 'k', 'u', 'w', 'u', 's', 32, 0, /* 6654 */ 'f', 'd', 'i', 'v', 's', 32, 0, /* 6661 */ 'e', 'v', 's', 'r', 'w', 's', 32, 0, /* 6669 */ 'v', 's', 'u', 'm', '2', 's', 'w', 's', 32, 0, /* 6679 */ 'v', 's', 'u', 'b', 's', 'w', 's', 32, 0, /* 6688 */ 'v', 'a', 'd', 'd', 's', 'w', 's', 32, 0, /* 6697 */ 'v', 's', 'u', 'm', 's', 'w', 's', 32, 0, /* 6706 */ 'v', 's', 'u', 'b', 'u', 'w', 's', 32, 0, /* 6715 */ 'v', 'a', 'd', 'd', 'u', 'w', 's', 32, 0, /* 6724 */ 'e', 'v', 'd', 'i', 'v', 'w', 's', 32, 0, /* 6733 */ 'x', 's', 'c', 'v', 'd', 'p', 's', 'x', 'w', 's', 32, 0, /* 6745 */ 'x', 'v', 'c', 'v', 'd', 'p', 's', 'x', 'w', 's', 32, 0, /* 6757 */ 'x', 'v', 'c', 'v', 's', 'p', 's', 'x', 'w', 's', 32, 0, /* 6769 */ 'x', 's', 'c', 'v', 'd', 'p', 'u', 'x', 'w', 's', 32, 0, /* 6781 */ 'x', 'v', 'c', 'v', 'd', 'p', 'u', 'x', 'w', 's', 32, 0, /* 6793 */ 'x', 'v', 'c', 'v', 's', 'p', 'u', 'x', 'w', 's', 32, 0, /* 6805 */ 'v', 'c', 't', 's', 'x', 's', 32, 0, /* 6813 */ 'v', 'c', 't', 'u', 'x', 's', 32, 0, /* 6821 */ 'e', 'v', 'l', 'h', 'h', 'e', 's', 'p', 'l', 'a', 't', 32, 0, /* 6834 */ 'e', 'v', 'l', 'w', 'h', 's', 'p', 'l', 'a', 't', 32, 0, /* 6846 */ 'e', 'v', 'l', 'h', 'h', 'o', 's', 's', 'p', 'l', 'a', 't', 32, 0, /* 6860 */ 'e', 'v', 'l', 'h', 'h', 'o', 'u', 's', 'p', 'l', 'a', 't', 32, 0, /* 6874 */ 'e', 'v', 'l', 'w', 'w', 's', 'p', 'l', 'a', 't', 32, 0, /* 6886 */ 'd', 'c', 'b', 't', 32, 0, /* 6892 */ 'i', 'c', 'b', 't', 32, 0, /* 6898 */ 'q', 'v', 'f', 'c', 'm', 'p', 'g', 't', 32, 0, /* 6908 */ 'w', 'a', 'i', 't', 32, 0, /* 6914 */ 'q', 'v', 'f', 'c', 'm', 'p', 'l', 't', 32, 0, /* 6924 */ 'f', 's', 'q', 'r', 't', 32, 0, /* 6931 */ 'd', 'c', 'b', 's', 't', 32, 0, /* 6938 */ 'd', 's', 't', 32, 0, /* 6943 */ 'd', 'c', 'b', 't', 's', 't', 32, 0, /* 6951 */ 'd', 's', 't', 's', 't', 32, 0, /* 6958 */ 'd', 's', 't', 't', 32, 0, /* 6964 */ 'd', 's', 't', 's', 't', 't', 32, 0, /* 6972 */ 'l', 'h', 'a', 'u', 32, 0, /* 6978 */ 's', 't', 'b', 'u', 32, 0, /* 6984 */ 'l', 'f', 'd', 'u', 32, 0, /* 6990 */ 's', 't', 'f', 'd', 'u', 32, 0, /* 6997 */ 'm', 'u', 'l', 'h', 'd', 'u', 32, 0, /* 7005 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 'u', 32, 0, /* 7015 */ 'q', 'v', 'f', 'c', 't', 'i', 'd', 'u', 32, 0, /* 7025 */ 'l', 'd', 'u', 32, 0, /* 7030 */ 's', 't', 'd', 'u', 32, 0, /* 7036 */ 'd', 'i', 'v', 'd', 'u', 32, 0, /* 7043 */ 's', 't', 'h', 'u', 32, 0, /* 7049 */ 'e', 'v', 's', 'r', 'w', 'i', 'u', 32, 0, /* 7058 */ 'e', 'v', 'l', 'w', 'h', 'o', 'u', 32, 0, /* 7067 */ 'f', 'c', 'm', 'p', 'u', 32, 0, /* 7074 */ 'l', 'f', 's', 'u', 32, 0, /* 7080 */ 's', 't', 'f', 's', 'u', 32, 0, /* 7087 */ 'e', 'v', 'c', 'm', 'p', 'g', 't', 'u', 32, 0, /* 7097 */ 'e', 'v', 'c', 'm', 'p', 'l', 't', 'u', 32, 0, /* 7107 */ 'm', 'u', 'l', 'h', 'w', 'u', 32, 0, /* 7115 */ 'q', 'v', 'f', 'c', 't', 'i', 'w', 'u', 32, 0, /* 7125 */ 'e', 'v', 's', 'r', 'w', 'u', 32, 0, /* 7133 */ 's', 't', 'w', 'u', 32, 0, /* 7139 */ 'e', 'v', 'd', 'i', 'v', 'w', 'u', 32, 0, /* 7148 */ 'l', 'b', 'z', 'u', 32, 0, /* 7154 */ 'l', 'h', 'z', 'u', 32, 0, /* 7160 */ 'l', 'w', 'z', 'u', 32, 0, /* 7166 */ 'f', 'd', 'i', 'v', 32, 0, /* 7172 */ 'x', 'x', 'l', 'e', 'q', 'v', 32, 0, /* 7180 */ 'c', 'r', 'e', 'q', 'v', 32, 0, /* 7187 */ 'e', 'v', 'e', 'q', 'v', 32, 0, /* 7194 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'f', 'a', 'a', 'w', 32, 0, /* 7207 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'f', 'a', 'a', 'w', 32, 0, /* 7220 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'f', 'a', 'a', 'w', 32, 0, /* 7233 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'f', 'a', 'a', 'w', 32, 0, /* 7246 */ 'e', 'v', 'a', 'd', 'd', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7259 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7272 */ 'e', 'v', 's', 'u', 'b', 'f', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7286 */ 'e', 'v', 'm', 'w', 'l', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7299 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7312 */ 'e', 'v', 'a', 'd', 'd', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7325 */ 'e', 'v', 'm', 'h', 'e', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7338 */ 'e', 'v', 's', 'u', 'b', 'f', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7352 */ 'e', 'v', 'm', 'w', 'l', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7365 */ 'e', 'v', 'm', 'h', 'o', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, /* 7378 */ 'e', 'v', 'a', 'd', 'd', 's', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7391 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7404 */ 'e', 'v', 's', 'u', 'b', 'f', 's', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7418 */ 'e', 'v', 'm', 'w', 'l', 's', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7431 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7444 */ 'e', 'v', 'a', 'd', 'd', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7457 */ 'e', 'v', 'm', 'h', 'e', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7470 */ 'e', 'v', 's', 'u', 'b', 'f', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7484 */ 'e', 'v', 'm', 'w', 'l', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7497 */ 'e', 'v', 'm', 'h', 'o', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, /* 7510 */ 'v', 's', 'r', 'a', 'w', 32, 0, /* 7517 */ 'e', 'v', 'a', 'd', 'd', 'w', 32, 0, /* 7525 */ 'e', 'v', 'l', 'd', 'w', 32, 0, /* 7532 */ 'e', 'v', 'r', 'n', 'd', 'w', 32, 0, /* 7540 */ 'e', 'v', 's', 't', 'd', 'w', 32, 0, /* 7548 */ 'e', 'v', 's', 'u', 'b', 'f', 'w', 32, 0, /* 7557 */ 'e', 'v', 's', 'u', 'b', 'i', 'f', 'w', 32, 0, /* 7567 */ 'v', 'm', 'r', 'g', 'h', 'w', 32, 0, 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10000 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', '_', 'S', 'W', 'A', 'P', '_', 'I', '8', 0, /* 10020 */ 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'X', 'O', 'R', '_', 'I', '8', 0, /* 10039 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'O', 'R', '_', 'I', '8', 0, /* 10058 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'I', '8', 0, /* 10069 */ '#', 'M', 'o', 'v', 'e', 'P', 'C', 't', 'o', 'L', 'R', '8', 0, /* 10082 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'E', 'Q', '_', 'B', 'I', 'T', '8', 0, /* 10099 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'G', 'T', '_', 'B', 'I', 'T', '8', 0, /* 10116 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'S', 'W', 'A', 'P', '_', 'i', '8', 0, /* 10132 */ '#', 'A', 'D', 'D', 'I', 'S', 't', 'o', 'c', 'H', 'A', 0, /* 10144 */ '#', 'A', 'D', 'D', 'I', 'S', 't', 'l', 's', 'g', 'd', 'H', 'A', 0, /* 10158 */ '#', 'A', 'D', 'D', 'I', 'S', 't', 'l', 's', 'l', 'd', 'H', 'A', 0, /* 10172 */ '#', 'A', 'D', 'D', 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'S', 'R', 'C', 0, /* 10356 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'Q', 'S', 'R', 'C', 0, /* 10369 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'V', 'S', 'R', 'C', 0, /* 10385 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'V', 'S', 'R', 'C', 0, /* 10398 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 10411 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 10418 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 10428 */ '#', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '_', 'V', 'R', 'S', 'A', 'V', 'E', 0, /* 10444 */ '#', 'S', 'P', 'I', 'L', 'L', '_', 'V', 'R', 'S', 'A', 'V', 'E', 0, /* 10458 */ '#', 'L', 'D', 't', 'o', 'c', 'J', 'T', 'I', 0, /* 10468 */ '#', 'L', 'D', 't', 'o', 'c', 'L', 0, /* 10476 */ '#', 'A', 'D', 'D', 'I', 't', 'o', 'c', 'L', 0, /* 10486 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'g', 'd', 'L', 0, /* 10498 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'l', 'd', 'L', 0, /* 10510 */ '#', 'L', 'D', 'g', 'o', 't', 'T', 'p', 'r', 'e', 'l', 'L', 0, /* 10523 */ '#', 'A', 'D', 'D', 'I', 'd', 't', 'p', 'r', 'e', 'l', 'L', 0, /* 10536 */ '#', 'U', 'p', 'd', 'a', 't', 'e', 'G', 'B', 'R', 0, /* 10547 */ '#', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '_', 'C', 'R', 0, /* 10559 */ '#', 'S', 'P', 'I', 'L', 'L', '_', 'C', 'R', 0, /* 10569 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'g', 'd', 'L', 'A', 'D', 'D', 'R', 0, /* 10585 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'l', 'd', 'L', 'A', 'D', 'D', 'R', 0, /* 10601 */ '#', 'G', 'E', 'T', 't', 'l', 's', 'l', 'd', 'A', 'D', 'D', 'R', 0, /* 10615 */ '#', 'G', 'E', 'T', 't', 'l', 's', 'A', 'D', 'D', 'R', 0, /* 10627 */ '#', 'M', 'o', 'v', 'e', 'P', 'C', 't', 'o', 'L', 'R', 0, /* 10639 */ '#', 'M', 'o', 'v', 'e', 'G', 'O', 'T', 't', 'o', 'L', 'R', 0, /* 10652 */ '#', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '_', 'C', 'R', 'B', 'I', 'T', 0, /* 10667 */ '#', 'S', 'P', 'I', 'L', 'L', '_', 'C', 'R', 'B', 'I', 'T', 0, /* 10680 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'E', 'Q', '_', 'B', 'I', 'T', 0, /* 10696 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'G', 'T', '_', 'B', 'I', 'T', 0, /* 10712 */ '#', 'P', 'P', 'C', '3', '2', 'G', 'O', 'T', 0, /* 10722 */ '#', 'P', 'P', 'C', '3', '2', 'P', 'I', 'C', 'G', 'O', 'T', 0, /* 10735 */ '#', 'L', 'D', 't', 'o', 'c', 'C', 'P', 'T', 0, /* 10745 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 10760 */ 's', 'l', 'b', 'i', 'a', 0, /* 10766 */ 't', 'l', 'b', 'i', 'a', 0, /* 10772 */ 'b', 0, /* 10774 */ 't', 'l', 'b', 's', 'y', 'n', 'c', 0, /* 10782 */ 'i', 's', 'y', 'n', 'c', 0, /* 10788 */ 'm', 's', 'y', 'n', 'c', 0, /* 10794 */ '#', 'L', 'D', 't', 'o', 'c', 0, /* 10801 */ '#', 'L', 'W', 'Z', 't', 'o', 'c', 0, /* 10809 */ 'r', 'f', 'i', 'd', 0, /* 10814 */ 't', 'l', 'b', 'r', 'e', 0, /* 10820 */ 't', 'l', 'b', 'w', 'e', 0, /* 10826 */ 'r', 'f', 'c', 'i', 0, /* 10831 */ 'r', 'f', 'm', 'c', 'i', 0, /* 10837 */ 'r', 'f', 'd', 'i', 0, /* 10842 */ 'r', 'f', 'i', 0, /* 10846 */ 'd', 's', 's', 'a', 'l', 'l', 0, /* 10853 */ 'b', 'l', 'r', 'l', 0, /* 10858 */ 'b', 'd', 'z', 'l', 'r', 'l', 0, /* 10865 */ 'b', 'd', 'n', 'z', 'l', 'r', 'l', 0, /* 10873 */ 'b', 'c', 't', 'r', 'l', 0, /* 10879 */ 'a', 't', 't', 'n', 0, /* 10884 */ 'e', 'i', 'e', 'i', 'o', 0, /* 10890 */ 't', 'r', 'a', 'p', 0, /* 10895 */ 'n', 'o', 'p', 0, /* 10899 */ 'b', 'l', 'r', 0, /* 10903 */ 'b', 'd', 'z', 'l', 'r', 0, /* 10909 */ 'b', 'd', 'n', 'z', 'l', 'r', 0, /* 10916 */ 'b', 'c', 't', 'r', 0, }; #endif // Emit the opcode for the instruction. unsigned int opcode = MCInst_getOpcode(MI); uint64_t Bits1 = OpInfo[opcode]; uint64_t Bits2 = OpInfo2[opcode]; uint64_t Bits = (Bits2 << 32) | Bits1; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 16383)-1); #endif // Fragment 0 encoded into 4 bits for 14 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 14) & 15); switch ((Bits >> 14) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, ADDISdtprelHA, ADDISd... return; break; case 1: // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... printOperand(MI, 0, O); break; case 2: // ADJCALLSTACKDOWN, ADJCALLSTACKUP printU16ImmOperand(MI, 0, O); break; case 3: // B, BCLalways, BDNZ, BDNZ8, BDNZL, BDNZLm, BDNZLp, BDNZm, BDNZp, BDZ, B... printBranchOperand(MI, 0, O); break; case 4: // BA, BDNZA, BDNZAm, BDNZAp, BDNZLA, BDNZLAm, BDNZLAp, BDZA, BDZAm, BDZA... printAbsBranchOperand(MI, 0, O); break; case 5: // BCC, BCCA, BCCCTR, BCCCTR8, BCCCTRL, BCCCTRL8, BCCL, BCCLA, BCCLR, BCC... printPredicateOperand(MI, 0, O, "cc"); break; case 6: // BCTRL8_LDinto_toc printMemRegImm(MI, 0, O); return; break; case 7: // BL8_NOP_TLS, BL8_TLS, BL8_TLS_, BL_TLS printTLSCall(MI, 0, O); break; case 8: // DCBA, DCBF, DCBI, DCBST, DCBT, DCBTST, DCBZ, DCBZL, ICBI printMemRegReg(MI, 0, O); return; break; case 9: // DSS, MBAR, MTFSB0, MTFSB1, TD, TDI, TW, TWI, gBC, gBCA, gBCCTR, gBCCTR... printU5ImmOperand(MI, 0, O); break; case 10: // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, MTDCR, MTV... printOperand(MI, 1, O); break; case 11: // ICBT printU4ImmOperand(MI, 0, O); SStream_concat0(O, ", "); printMemRegReg(MI, 1, O); return; break; case 12: // MTOCRF, MTOCRF8 printcrbitm(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 13: // MTSR printU4ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; } // Fragment 1 encoded into 5 bits for 18 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 31); switch ((Bits >> 18) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... SStream_concat0(O, ", "); break; case 1: // ADJCALLSTACKDOWN, B, BA, BCLalways, BDNZ, BDNZ8, BDNZA, BDNZAm, BDNZAp... return; break; case 2: // ADJCALLSTACKUP, ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, TCRETURNai, ... SStream_concat0(O, " "); break; case 3: // BCC printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printBranchOperand(MI, 2, O); return; break; case 4: // BCCA SStream_concat0(O, "a"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printAbsBranchOperand(MI, 2, O); return; break; case 5: // BCCCTR, BCCCTR8 SStream_concat0(O, "ctr"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); return; break; case 6: // BCCCTRL, BCCCTRL8 SStream_concat0(O, "ctrl"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); return; break; case 7: // BCCL SStream_concat0(O, "l"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printBranchOperand(MI, 2, O); return; break; case 8: // BCCLA SStream_concat0(O, "la"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printAbsBranchOperand(MI, 2, O); return; break; case 9: // BCCLR SStream_concat0(O, "lr"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); return; break; case 10: // BCCLRL SStream_concat0(O, "lrl"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat0(O, " "); printPredicateOperand(MI, 0, O, "reg"); return; break; case 11: // BCCTR, BCCTR8, BCCTR8n, BCCTRL, BCCTRL8, BCCTRL8n, BCCTRLn, BCCTRn, BC... SStream_concat0(O, ", 0"); return; break; case 12: // BL8_NOP, BL8_NOP_TLS, BLA8_NOP SStream_concat0(O, "\n\tnop"); // qq return; break; case 13: // MFTB8 SStream_concat0(O, ", 268"); op_addImm(MI, 268); return; break; case 14: // MFVRSAVE, MFVRSAVEv SStream_concat0(O, ", 256"); op_addImm(MI, 256); return; break; case 15: // QVLPCLSXint SStream_concat0(O, ", 0, "); op_addImm(MI, 0); printOperand(MI, 1, O); return; break; case 16: // TLBIE SStream_concat0(O, ","); printOperand(MI, 0, O); return; break; case 17: // V_SETALLONES, V_SETALLONESB, V_SETALLONESH SStream_concat0(O, ", -1"); op_addImm(MI, -1); return; break; } // Fragment 2 encoded into 5 bits for 17 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 23) & 31); switch ((Bits >> 23) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... printOperand(MI, 1, O); break; case 1: // ADJCALLSTACKUP printU16ImmOperand(MI, 1, O); return; break; case 2: // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, LBZX, LBZX8, LDARX, LDBRX, L... printMemRegReg(MI, 1, O); break; case 3: // BC, BCL, BCLn, BCn printBranchOperand(MI, 1, O); return; break; case 4: // CRSET, CRUNSET, MTDCR, V_SET0, V_SET0B, V_SET0H printOperand(MI, 0, O); break; case 5: // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, RLDIMI, RL... printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 6: // EVADDIW printU5ImmOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 7: // EVLDD, EVLDH, EVLDW, EVLHHESPLAT, EVLHHOSSPLAT, EVLHHOUSPLAT, EVLWHE, ... printMemRegImm(MI, 1, O); return; break; case 8: // EVSUBIFW printU5ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 9: // LA printS16ImmOperand(MI, 2, O); SStream_concat0(O, "("); printOperand(MI, 1, O); SStream_concat0(O, ")"); return; break; case 10: // LBZU, LBZU8, LDU, LFDU, LFSU, LHAU, LHAU8, LHZU, LHZU8, LWZU, LWZU8, S... printMemRegImm(MI, 2, O); return; break; case 11: // LBZUX, LBZUX8, LDUX, LFDUX, LFSUX, LHAUX, LHAUX8, LHZUX, LHZUX8, LWAUX... printMemRegReg(MI, 2, O); return; break; case 12: // LI, LI8, LIS, LIS8 printS16ImmOperand(MI, 1, O); return; break; case 13: // MFOCRF, MFOCRF8 printcrbitm(MI, 1, O); return; break; case 14: // MFSR printU4ImmOperand(MI, 1, O); return; break; case 15: // QVGPCI printU12ImmOperand(MI, 1, O); return; break; case 16: // VSPLTISB, VSPLTISH, VSPLTISW printS5ImmOperand(MI, 1, O); return; break; } // Fragment 3 encoded into 4 bits for 9 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 28) & 15); switch ((Bits >> 28) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... SStream_concat0(O, ", "); break; case 1: // ADDME, ADDME8, ADDME8o, ADDMEo, ADDZE, ADDZE8, ADDZE8o, ADDZEo, CNTLZD... return; break; case 2: // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32 SStream_concat0(O, " "); printOperand(MI, 3, O); SStream_concat0(O, " "); printOperand(MI, 4, O); return; break; case 3: // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64 printU5ImmOperand(MI, 0, O); return; break; case 4: // RLDIMI, RLDIMIo printU6ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printU6ImmOperand(MI, 4, O); return; break; case 5: // RLWIMI, RLWIMI8, RLWIMI8o, RLWIMIo printU5ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printU5ImmOperand(MI, 4, O); SStream_concat0(O, ", "); printU5ImmOperand(MI, 5, O); return; break; case 6: // VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTH, VSPLTW printU5ImmOperand(MI, 1, O); return; break; case 7: // VCFSX_0, VCFUX_0, VCTSXS_0, VCTUXS_0 SStream_concat0(O, ", 0"); return; break; case 8: // XSMADDADP, XSMADDMDP, XSMSUBADP, XSMSUBMDP, XSNMADDADP, XSNMADDMDP, XS... printOperand(MI, 3, O); return; break; } // Fragment 4 encoded into 4 bits for 10 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 32) & 15); switch ((Bits >> 32) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... printOperand(MI, 2, O); break; case 1: // ADDI, ADDI8, ADDIC, ADDIC8, ADDICo, ADDIS, ADDIS8, CMPDI, CMPWI, MULLI... printS16ImmOperand(MI, 2, O); return; break; case 2: // ANDISo, ANDISo8, ANDIo, ANDIo8, CMPLDI, CMPLWI, ORI, ORI8, ORIS, ORIS8... printU16ImmOperand(MI, 2, O); return; break; case 3: // CLRLSLDI, CLRLSLDIo, CLRRDI, CLRRDIo, EXTLDI, EXTLDIo, EXTRDI, EXTRDIo... printU6ImmOperand(MI, 2, O); break; case 4: // CLRLSLWI, CLRLSLWIo, CLRRWI, CLRRWIo, EVRLWI, EVSLWI, EVSRWIS, EVSRWIU... printU5ImmOperand(MI, 2, O); break; case 5: // CRSET, CRUNSET, V_SET0, V_SET0B, V_SET0H printOperand(MI, 0, O); return; break; case 6: // QVESPLATI, QVESPLATIb, QVESPLATIs, XXSPLTW printU2ImmOperand(MI, 2, O); return; break; case 7: // QVFMADD, QVFMADDS, QVFMADDSs, QVFMSUB, QVFMSUBS, QVFMSUBSs, QVFNMADD, ... printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 8: // gBC, gBCL printBranchOperand(MI, 2, O); return; break; case 9: // gBCA, gBCLA printAbsBranchOperand(MI, 2, O); return; break; } // Fragment 5 encoded into 1 bits for 2 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 36) & 1); if ((Bits >> 36) & 1) { // CLRLSLDI, CLRLSLDIo, CLRLSLWI, CLRLSLWIo, EXTLDI, EXTLDIo, EXTLWI, EXT... SStream_concat0(O, ", "); } else { // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... return; } // Fragment 6 encoded into 3 bits for 5 unique commands. //printf("Frag-6: %"PRIu64"\n", (Bits >> 37) & 7); switch ((Bits >> 37) & 7) { default: // llvm_unreachable("Invalid command number."); case 0: // CLRLSLDI, CLRLSLDIo, EXTLDI, EXTLDIo, EXTRDI, EXTRDIo, INSRDI, INSRDIo... printU6ImmOperand(MI, 3, O); return; break; case 1: // CLRLSLWI, CLRLSLWIo, EXTLWI, EXTLWIo, EXTRWI, EXTRWIo, INSLWI, INSLWIo... printU5ImmOperand(MI, 3, O); break; case 2: // FMADD, FMADDS, FMADDSo, FMADDo, FMSUB, FMSUBS, FMSUBSo, FMSUBo, FNMADD... printOperand(MI, 3, O); return; break; case 3: // QVALIGNI, QVALIGNIb, QVALIGNIs, XXPERMDI, XXSLDWI printU2ImmOperand(MI, 3, O); return; break; case 4: // QVFLOGICAL, QVFLOGICALb, QVFLOGICALs printU12ImmOperand(MI, 3, O); return; break; } // Fragment 7 encoded into 1 bits for 2 unique commands. //printf("Frag-7: %"PRIu64"\n", (Bits >> 40) & 1); if ((Bits >> 40) & 1) { // RLWINM, RLWINM8, RLWINM8o, RLWINMo, RLWNM, RLWNM8, RLWNM8o, RLWNMo SStream_concat0(O, ", "); printU5ImmOperand(MI, 4, O); return; } else { // CLRLSLWI, CLRLSLWIo, EXTLWI, EXTLWIo, EXTRWI, EXTRWIo, INSLWI, INSLWIo... return; } } #ifndef CAPSTONE_DIET /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 310 && "Invalid register number!"); static const char AsmStrs[] = { /* 0 */ '*', '*', 'R', 'O', 'U', 'N', 'D', 'I', 'N', 'G', 32, 'M', 'O', 'D', 'E', '*', '*', 0, /* 18 */ '*', '*', 'F', 'R', 'A', 'M', 'E', 32, 'P', 'O', 'I', 'N', 'T', 'E', 'R', '*', '*', 0, /* 36 */ '*', '*', 'B', 'A', 'S', 'E', 32, 'P', 'O', 'I', 'N', 'T', 'E', 'R', '*', '*', 0, /* 53 */ 'f', '1', '0', 0, /* 57 */ 'q', '1', '0', 0, /* 61 */ 'r', '1', '0', 0, /* 65 */ 'v', 's', '1', '0', 0, /* 70 */ 'v', '1', '0', 0, /* 74 */ 'f', '2', '0', 0, /* 78 */ 'q', '2', '0', 0, /* 82 */ 'r', '2', '0', 0, /* 86 */ 'v', 's', '2', '0', 0, /* 91 */ 'v', '2', '0', 0, /* 95 */ 'f', '3', '0', 0, /* 99 */ 'q', '3', '0', 0, /* 103 */ 'r', '3', '0', 0, /* 107 */ 'v', 's', '3', '0', 0, /* 112 */ 'v', '3', '0', 0, /* 116 */ 'v', 's', '4', '0', 0, /* 121 */ 'v', 's', '5', '0', 0, /* 126 */ 'v', 's', '6', '0', 0, /* 131 */ 'f', '0', 0, /* 134 */ 'q', '0', 0, /* 137 */ 'c', 'r', '0', 0, /* 141 */ 'v', 's', '0', 0, /* 145 */ 'v', '0', 0, /* 148 */ 'f', '1', '1', 0, /* 152 */ 'q', '1', '1', 0, /* 156 */ 'r', '1', '1', 0, /* 160 */ 'v', 's', '1', '1', 0, /* 165 */ 'v', '1', '1', 0, /* 169 */ 'f', '2', '1', 0, /* 173 */ 'q', '2', '1', 0, /* 177 */ 'r', '2', '1', 0, /* 181 */ 'v', 's', '2', '1', 0, /* 186 */ 'v', '2', '1', 0, /* 190 */ 'f', '3', '1', 0, /* 194 */ 'q', '3', '1', 0, /* 198 */ 'r', '3', '1', 0, /* 202 */ 'v', 's', '3', '1', 0, /* 207 */ 'v', '3', '1', 0, /* 211 */ 'v', 's', '4', '1', 0, /* 216 */ 'v', 's', '5', '1', 0, /* 221 */ 'v', 's', '6', '1', 0, /* 226 */ 'f', '1', 0, /* 229 */ 'q', '1', 0, /* 232 */ 'c', 'r', '1', 0, /* 236 */ 'v', 's', '1', 0, /* 240 */ 'v', '1', 0, /* 243 */ 'f', '1', '2', 0, /* 247 */ 'q', '1', '2', 0, /* 251 */ 'r', '1', '2', 0, /* 255 */ 'v', 's', '1', '2', 0, /* 260 */ 'v', '1', '2', 0, /* 264 */ 'f', '2', '2', 0, /* 268 */ 'q', '2', '2', 0, /* 272 */ 'r', '2', '2', 0, /* 276 */ 'v', 's', '2', '2', 0, /* 281 */ 'v', '2', '2', 0, /* 285 */ 'v', 's', '3', '2', 0, /* 290 */ 'v', 's', '4', '2', 0, /* 295 */ 'v', 's', '5', '2', 0, /* 300 */ 'v', 's', '6', '2', 0, /* 305 */ 'f', '2', 0, /* 308 */ 'q', '2', 0, /* 311 */ 'c', 'r', '2', 0, /* 315 */ 'v', 's', '2', 0, /* 319 */ 'v', '2', 0, /* 322 */ 'f', '1', '3', 0, /* 326 */ 'q', '1', '3', 0, /* 330 */ 'r', '1', '3', 0, /* 334 */ 'v', 's', '1', '3', 0, /* 339 */ 'v', '1', '3', 0, /* 343 */ 'f', '2', '3', 0, /* 347 */ 'q', '2', '3', 0, /* 351 */ 'r', '2', '3', 0, /* 355 */ 'v', 's', '2', '3', 0, /* 360 */ 'v', '2', '3', 0, /* 364 */ 'v', 's', '3', '3', 0, /* 369 */ 'v', 's', '4', '3', 0, /* 374 */ 'v', 's', '5', '3', 0, /* 379 */ 'v', 's', '6', '3', 0, /* 384 */ 'f', '3', 0, /* 387 */ 'q', '3', 0, /* 390 */ 'c', 'r', '3', 0, /* 394 */ 'v', 's', '3', 0, /* 398 */ 'v', '3', 0, /* 401 */ 'f', '1', '4', 0, /* 405 */ 'q', '1', '4', 0, /* 409 */ 'r', '1', '4', 0, /* 413 */ 'v', 's', '1', '4', 0, /* 418 */ 'v', '1', '4', 0, /* 422 */ 'f', '2', '4', 0, /* 426 */ 'q', '2', '4', 0, /* 430 */ 'r', '2', '4', 0, /* 434 */ 'v', 's', '2', '4', 0, /* 439 */ 'v', '2', '4', 0, /* 443 */ 'v', 's', '3', '4', 0, /* 448 */ 'v', 's', '4', '4', 0, /* 453 */ 'v', 's', '5', '4', 0, /* 458 */ 'f', '4', 0, /* 461 */ 'q', '4', 0, /* 464 */ 'c', 'r', '4', 0, /* 468 */ 'v', 's', '4', 0, /* 472 */ 'v', '4', 0, /* 475 */ 'f', '1', '5', 0, /* 479 */ 'q', '1', '5', 0, /* 483 */ 'r', '1', '5', 0, /* 487 */ 'v', 's', '1', '5', 0, /* 492 */ 'v', '1', '5', 0, /* 496 */ 'f', '2', '5', 0, /* 500 */ 'q', '2', '5', 0, /* 504 */ 'r', '2', '5', 0, /* 508 */ 'v', 's', '2', '5', 0, /* 513 */ 'v', '2', '5', 0, /* 517 */ 'v', 's', '3', '5', 0, /* 522 */ 'v', 's', '4', '5', 0, /* 527 */ 'v', 's', '5', '5', 0, /* 532 */ 'f', '5', 0, /* 535 */ 'q', '5', 0, /* 538 */ 'c', 'r', '5', 0, /* 542 */ 'v', 's', '5', 0, /* 546 */ 'v', '5', 0, /* 549 */ 'f', '1', '6', 0, /* 553 */ 'q', '1', '6', 0, /* 557 */ 'r', '1', '6', 0, /* 561 */ 'v', 's', '1', '6', 0, /* 566 */ 'v', '1', '6', 0, /* 570 */ 'f', '2', '6', 0, /* 574 */ 'q', '2', '6', 0, /* 578 */ 'r', '2', '6', 0, /* 582 */ 'v', 's', '2', '6', 0, /* 587 */ 'v', '2', '6', 0, /* 591 */ 'v', 's', '3', '6', 0, /* 596 */ 'v', 's', '4', '6', 0, /* 601 */ 'v', 's', '5', '6', 0, /* 606 */ 'f', '6', 0, /* 609 */ 'q', '6', 0, /* 612 */ 'c', 'r', '6', 0, /* 616 */ 'v', 's', '6', 0, /* 620 */ 'v', '6', 0, /* 623 */ 'f', '1', '7', 0, /* 627 */ 'q', '1', '7', 0, /* 631 */ 'r', '1', '7', 0, /* 635 */ 'v', 's', '1', '7', 0, /* 640 */ 'v', '1', '7', 0, /* 644 */ 'f', '2', '7', 0, /* 648 */ 'q', '2', '7', 0, /* 652 */ 'r', '2', '7', 0, /* 656 */ 'v', 's', '2', '7', 0, /* 661 */ 'v', '2', '7', 0, /* 665 */ 'v', 's', '3', '7', 0, /* 670 */ 'v', 's', '4', '7', 0, /* 675 */ 'v', 's', '5', '7', 0, /* 680 */ 'f', '7', 0, /* 683 */ 'q', '7', 0, /* 686 */ 'c', 'r', '7', 0, /* 690 */ 'v', 's', '7', 0, /* 694 */ 'v', '7', 0, /* 697 */ 'f', '1', '8', 0, /* 701 */ 'q', '1', '8', 0, /* 705 */ 'r', '1', '8', 0, /* 709 */ 'v', 's', '1', '8', 0, /* 714 */ 'v', '1', '8', 0, /* 718 */ 'f', '2', '8', 0, /* 722 */ 'q', '2', '8', 0, /* 726 */ 'r', '2', '8', 0, /* 730 */ 'v', 's', '2', '8', 0, /* 735 */ 'v', '2', '8', 0, /* 739 */ 'v', 's', '3', '8', 0, /* 744 */ 'v', 's', '4', '8', 0, /* 749 */ 'v', 's', '5', '8', 0, /* 754 */ 'f', '8', 0, /* 757 */ 'q', '8', 0, /* 760 */ 'r', '8', 0, /* 763 */ 'v', 's', '8', 0, /* 767 */ 'v', '8', 0, /* 770 */ 'f', '1', '9', 0, /* 774 */ 'q', '1', '9', 0, /* 778 */ 'r', '1', '9', 0, /* 782 */ 'v', 's', '1', '9', 0, /* 787 */ 'v', '1', '9', 0, /* 791 */ 'f', '2', '9', 0, /* 795 */ 'q', '2', '9', 0, /* 799 */ 'r', '2', '9', 0, /* 803 */ 'v', 's', '2', '9', 0, /* 808 */ 'v', '2', '9', 0, /* 812 */ 'v', 's', '3', '9', 0, /* 817 */ 'v', 's', '4', '9', 0, /* 822 */ 'v', 's', '5', '9', 0, /* 827 */ 'f', '9', 0, /* 830 */ 'q', '9', 0, /* 833 */ 'r', '9', 0, /* 836 */ 'v', 's', '9', 0, /* 840 */ 'v', '9', 0, /* 843 */ 'c', 'a', 0, /* 846 */ 'v', 'r', 's', 'a', 'v', 'e', 0, /* 853 */ 'l', 'r', 0, /* 856 */ 'c', 't', 'r', 0, }; static const uint16_t RegAsmOffset[] = { 36, 843, 856, 18, 853, 0, 846, 55, 36, 137, 232, 311, 390, 464, 538, 612, 686, 856, 131, 226, 305, 384, 458, 532, 606, 680, 754, 827, 53, 148, 243, 322, 401, 475, 549, 623, 697, 770, 74, 169, 264, 343, 422, 496, 570, 644, 718, 791, 95, 190, 18, 853, 134, 229, 308, 387, 461, 535, 609, 683, 757, 830, 57, 152, 247, 326, 405, 479, 553, 627, 701, 774, 78, 173, 268, 347, 426, 500, 574, 648, 722, 795, 99, 194, 138, 233, 312, 391, 465, 539, 613, 687, 760, 833, 61, 156, 251, 330, 409, 483, 557, 631, 705, 778, 82, 177, 272, 351, 430, 504, 578, 652, 726, 799, 103, 198, 145, 240, 319, 398, 472, 546, 620, 694, 767, 840, 70, 165, 260, 339, 418, 492, 566, 640, 714, 787, 91, 186, 281, 360, 439, 513, 587, 661, 735, 808, 112, 207, 285, 364, 443, 517, 591, 665, 739, 812, 116, 211, 290, 369, 448, 522, 596, 670, 744, 817, 121, 216, 295, 374, 453, 527, 601, 675, 749, 822, 126, 221, 300, 379, 285, 364, 443, 517, 591, 665, 739, 812, 116, 211, 290, 369, 448, 522, 596, 670, 744, 817, 121, 216, 295, 374, 453, 527, 601, 675, 749, 822, 126, 221, 300, 379, 141, 236, 315, 394, 468, 542, 616, 690, 763, 836, 65, 160, 255, 334, 413, 487, 561, 635, 709, 782, 86, 181, 276, 355, 434, 508, 582, 656, 730, 803, 107, 202, 138, 233, 312, 391, 465, 539, 613, 687, 760, 833, 61, 156, 251, 330, 409, 483, 557, 631, 705, 778, 82, 177, 272, 351, 430, 504, 578, 652, 726, 799, 103, 198, 55, 245, 551, 54, 402, 698, 265, 571, 96, 150, 477, 772, 323, 624, 170, 497, 792, 55, 403, 699, 244, 550, 75, 423, 719, 324, 625, 149, 476, 771, 344, 645, 191, }; //assert (*(AsmStrs+RegAsmOffset[RegNo-1]) && // "Invalid alt name index for register!"); //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; } #endif #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { switch (PrintMethodIdx) { default: // llvm_unreachable("Unknown PrintMethod kind"); break; case 0: printBranchOperand(MI, OpIdx, OS); break; case 1: printAbsBranchOperand(MI, OpIdx, OS); break; case 2: printS16ImmOperand(MI, OpIdx, OS); break; case 3: printU16ImmOperand(MI, OpIdx, OS); break; case 4: printU6ImmOperand(MI, OpIdx, OS); break; case 5: printU5ImmOperand(MI, OpIdx, OS); break; } } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case PPC_BCC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 12, crrc:$cc, condbrtarget:$dst) AsmString = "blt $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 12, CR0, condbrtarget:$dst) AsmString = "blt $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 14, crrc:$cc, condbrtarget:$dst) AsmString = "blt- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 14, CR0, condbrtarget:$dst) AsmString = "blt- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 15, crrc:$cc, condbrtarget:$dst) AsmString = "blt+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 15, CR0, condbrtarget:$dst) AsmString = "blt+ $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 44, crrc:$cc, condbrtarget:$dst) AsmString = "bgt $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 44, CR0, condbrtarget:$dst) AsmString = "bgt $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 46, crrc:$cc, condbrtarget:$dst) AsmString = "bgt- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 46, CR0, condbrtarget:$dst) AsmString = "bgt- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 47, crrc:$cc, condbrtarget:$dst) AsmString = "bgt+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 47, CR0, condbrtarget:$dst) AsmString = "bgt+ $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 76, crrc:$cc, condbrtarget:$dst) AsmString = "beq $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 76, CR0, condbrtarget:$dst) AsmString = "beq $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 78, crrc:$cc, condbrtarget:$dst) AsmString = "beq- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 78, CR0, condbrtarget:$dst) AsmString = "beq- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 79, crrc:$cc, condbrtarget:$dst) AsmString = "beq+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 79, CR0, condbrtarget:$dst) AsmString = "beq+ $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 68, crrc:$cc, condbrtarget:$dst) AsmString = "bne $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 68, CR0, condbrtarget:$dst) AsmString = "bne $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 70, crrc:$cc, condbrtarget:$dst) AsmString = "bne- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 70, CR0, condbrtarget:$dst) AsmString = "bne- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCC 71, crrc:$cc, condbrtarget:$dst) AsmString = "bne+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCC 71, CR0, condbrtarget:$dst) AsmString = "bne+ $\xFF\x03\x01"; break; } return NULL; case PPC_BCCA: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 12, crrc:$cc, abscondbrtarget:$dst) AsmString = "blta $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 12, CR0, abscondbrtarget:$dst) AsmString = "blta $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 14, crrc:$cc, abscondbrtarget:$dst) AsmString = "blta- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 14, CR0, abscondbrtarget:$dst) AsmString = "blta- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 15, crrc:$cc, abscondbrtarget:$dst) AsmString = "blta+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 15, CR0, abscondbrtarget:$dst) AsmString = "blta+ $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 44, crrc:$cc, abscondbrtarget:$dst) AsmString = "bgta $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 44, CR0, abscondbrtarget:$dst) AsmString = "bgta $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 46, crrc:$cc, abscondbrtarget:$dst) AsmString = "bgta- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 46, CR0, abscondbrtarget:$dst) AsmString = "bgta- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 47, crrc:$cc, abscondbrtarget:$dst) AsmString = "bgta+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 47, CR0, abscondbrtarget:$dst) AsmString = "bgta+ $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 76, crrc:$cc, abscondbrtarget:$dst) AsmString = "beqa $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 76, CR0, abscondbrtarget:$dst) AsmString = "beqa $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 78, crrc:$cc, abscondbrtarget:$dst) AsmString = "beqa- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 78, CR0, abscondbrtarget:$dst) AsmString = "beqa- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 79, crrc:$cc, abscondbrtarget:$dst) AsmString = "beqa+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 79, CR0, abscondbrtarget:$dst) AsmString = "beqa+ $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 68, crrc:$cc, abscondbrtarget:$dst) AsmString = "bnea $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 68, CR0, abscondbrtarget:$dst) AsmString = "bnea $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 70, crrc:$cc, abscondbrtarget:$dst) AsmString = "bnea- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 70, CR0, abscondbrtarget:$dst) AsmString = "bnea- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCA 71, crrc:$cc, abscondbrtarget:$dst) AsmString = "bnea+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCA 71, CR0, abscondbrtarget:$dst) AsmString = "bnea+ $\xFF\x03\x02"; break; } return NULL; case PPC_BCCCTR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 12, crrc:$cc) AsmString = "bltctr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 12, CR0) AsmString = "bltctr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 14, crrc:$cc) AsmString = "bltctr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 14, CR0) AsmString = "bltctr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 15, crrc:$cc) AsmString = "bltctr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 15, CR0) AsmString = "bltctr+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 44, crrc:$cc) AsmString = "bgtctr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 44, CR0) AsmString = "bgtctr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 46, crrc:$cc) AsmString = "bgtctr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 46, CR0) AsmString = "bgtctr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 47, crrc:$cc) AsmString = "bgtctr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 47, CR0) AsmString = "bgtctr+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 76, crrc:$cc) AsmString = "beqctr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 76, CR0) AsmString = "beqctr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 78, crrc:$cc) AsmString = "beqctr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 78, CR0) AsmString = "beqctr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 79, crrc:$cc) AsmString = "beqctr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 79, CR0) AsmString = "beqctr+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 68, crrc:$cc) AsmString = "bnectr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 68, CR0) AsmString = "bnectr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 70, crrc:$cc) AsmString = "bnectr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 70, CR0) AsmString = "bnectr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTR 71, crrc:$cc) AsmString = "bnectr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTR 71, CR0) AsmString = "bnectr+"; break; } return NULL; case PPC_BCCCTRL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 12, crrc:$cc) AsmString = "bltctrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 12, CR0) AsmString = "bltctrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 14, crrc:$cc) AsmString = "bltctrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 14, CR0) AsmString = "bltctrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 15, crrc:$cc) AsmString = "bltctrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 15, CR0) AsmString = "bltctrl+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 44, crrc:$cc) AsmString = "bgtctrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 44, CR0) AsmString = "bgtctrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 46, crrc:$cc) AsmString = "bgtctrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 46, CR0) AsmString = "bgtctrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 47, crrc:$cc) AsmString = "bgtctrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 47, CR0) AsmString = "bgtctrl+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 76, crrc:$cc) AsmString = "beqctrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 76, CR0) AsmString = "beqctrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 78, crrc:$cc) AsmString = "beqctrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 78, CR0) AsmString = "beqctrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 79, crrc:$cc) AsmString = "beqctrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 79, CR0) AsmString = "beqctrl+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 68, crrc:$cc) AsmString = "bnectrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 68, CR0) AsmString = "bnectrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 70, crrc:$cc) AsmString = "bnectrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 70, CR0) AsmString = "bnectrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCCTRL 71, crrc:$cc) AsmString = "bnectrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCCTRL 71, CR0) AsmString = "bnectrl+"; break; } return NULL; case PPC_BCCL: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 12, crrc:$cc, condbrtarget:$dst) AsmString = "bltl $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 12, CR0, condbrtarget:$dst) AsmString = "bltl $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 14, crrc:$cc, condbrtarget:$dst) AsmString = "bltl- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 14, CR0, condbrtarget:$dst) AsmString = "bltl- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 15, crrc:$cc, condbrtarget:$dst) AsmString = "bltl+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 15, CR0, condbrtarget:$dst) AsmString = "bltl+ $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 44, crrc:$cc, condbrtarget:$dst) AsmString = "bgtl $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 44, CR0, condbrtarget:$dst) AsmString = "bgtl $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 46, crrc:$cc, condbrtarget:$dst) AsmString = "bgtl- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 46, CR0, condbrtarget:$dst) AsmString = "bgtl- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 47, crrc:$cc, condbrtarget:$dst) AsmString = "bgtl+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 47, CR0, condbrtarget:$dst) AsmString = "bgtl+ $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 76, crrc:$cc, condbrtarget:$dst) AsmString = "beql $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 76, CR0, condbrtarget:$dst) AsmString = "beql $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 78, crrc:$cc, condbrtarget:$dst) AsmString = "beql- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 78, CR0, condbrtarget:$dst) AsmString = "beql- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 79, crrc:$cc, condbrtarget:$dst) AsmString = "beql+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 79, CR0, condbrtarget:$dst) AsmString = "beql+ $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 68, crrc:$cc, condbrtarget:$dst) AsmString = "bnel $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 68, CR0, condbrtarget:$dst) AsmString = "bnel $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 70, crrc:$cc, condbrtarget:$dst) AsmString = "bnel- $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 70, CR0, condbrtarget:$dst) AsmString = "bnel- $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCL 71, crrc:$cc, condbrtarget:$dst) AsmString = "bnel+ $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCL 71, CR0, condbrtarget:$dst) AsmString = "bnel+ $\xFF\x03\x01"; break; } return NULL; case PPC_BCCLA: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 12, crrc:$cc, abscondbrtarget:$dst) AsmString = "bltla $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 12, CR0, abscondbrtarget:$dst) AsmString = "bltla $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 14, crrc:$cc, abscondbrtarget:$dst) AsmString = "bltla- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 14, CR0, abscondbrtarget:$dst) AsmString = "bltla- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 15, crrc:$cc, abscondbrtarget:$dst) AsmString = "bltla+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 15, CR0, abscondbrtarget:$dst) AsmString = "bltla+ $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 44, crrc:$cc, abscondbrtarget:$dst) AsmString = "bgtla $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 44, CR0, abscondbrtarget:$dst) AsmString = "bgtla $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 46, crrc:$cc, abscondbrtarget:$dst) AsmString = "bgtla- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 46, CR0, abscondbrtarget:$dst) AsmString = "bgtla- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 47, crrc:$cc, abscondbrtarget:$dst) AsmString = "bgtla+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 47, CR0, abscondbrtarget:$dst) AsmString = "bgtla+ $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 76, crrc:$cc, abscondbrtarget:$dst) AsmString = "beqla $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 76, CR0, abscondbrtarget:$dst) AsmString = "beqla $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 78, crrc:$cc, abscondbrtarget:$dst) AsmString = "beqla- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 78, CR0, abscondbrtarget:$dst) AsmString = "beqla- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 79, crrc:$cc, abscondbrtarget:$dst) AsmString = "beqla+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 79, CR0, abscondbrtarget:$dst) AsmString = "beqla+ $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 68, crrc:$cc, abscondbrtarget:$dst) AsmString = "bnela $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 68, CR0, abscondbrtarget:$dst) AsmString = "bnela $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 70, crrc:$cc, abscondbrtarget:$dst) AsmString = "bnela- $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 70, CR0, abscondbrtarget:$dst) AsmString = "bnela- $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLA 71, crrc:$cc, abscondbrtarget:$dst) AsmString = "bnela+ $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLA 71, CR0, abscondbrtarget:$dst) AsmString = "bnela+ $\xFF\x03\x02"; break; } return NULL; case PPC_BCCLR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 12, crrc:$cc) AsmString = "bltlr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 12, CR0) AsmString = "bltlr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 14, crrc:$cc) AsmString = "bltlr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 14, CR0) AsmString = "bltlr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 15, crrc:$cc) AsmString = "bltlr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 15, CR0) AsmString = "bltlr+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 44, crrc:$cc) AsmString = "bgtlr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 44, CR0) AsmString = "bgtlr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 46, crrc:$cc) AsmString = "bgtlr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 46, CR0) AsmString = "bgtlr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 47, crrc:$cc) AsmString = "bgtlr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 47, CR0) AsmString = "bgtlr+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 76, crrc:$cc) AsmString = "beqlr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 76, CR0) AsmString = "beqlr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 78, crrc:$cc) AsmString = "beqlr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 78, CR0) AsmString = "beqlr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 79, crrc:$cc) AsmString = "beqlr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 79, CR0) AsmString = "beqlr+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 68, crrc:$cc) AsmString = "bnelr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 68, CR0) AsmString = "bnelr"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 70, crrc:$cc) AsmString = "bnelr- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 70, CR0) AsmString = "bnelr-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLR 71, crrc:$cc) AsmString = "bnelr+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLR 71, CR0) AsmString = "bnelr+"; break; } return NULL; case PPC_BCCLRL: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 12, crrc:$cc) AsmString = "bltlrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 12, CR0) AsmString = "bltlrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 14, crrc:$cc) AsmString = "bltlrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 14, CR0) AsmString = "bltlrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 15, crrc:$cc) AsmString = "bltlrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 15, CR0) AsmString = "bltlrl+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 44, crrc:$cc) AsmString = "bgtlrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 44, CR0) AsmString = "bgtlrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 46, crrc:$cc) AsmString = "bgtlrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 46, CR0) AsmString = "bgtlrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 47, crrc:$cc) AsmString = "bgtlrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 47, CR0) AsmString = "bgtlrl+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 76, crrc:$cc) AsmString = "beqlrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 76, CR0) AsmString = "beqlrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 78, crrc:$cc) AsmString = "beqlrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 78, CR0) AsmString = "beqlrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 79, crrc:$cc) AsmString = "beqlrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 79, CR0) AsmString = "beqlrl+"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 68, crrc:$cc) AsmString = "bnelrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 68, CR0) AsmString = "bnelrl"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 70, crrc:$cc) AsmString = "bnelrl- $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 70, CR0) AsmString = "bnelrl-"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { // (BCCLRL 71, crrc:$cc) AsmString = "bnelrl+ $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { // (BCCLRL 71, CR0) AsmString = "bnelrl+"; break; } return NULL; case PPC_CMPD: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (CMPD CR0, g8rc:$rA, g8rc:$rB) AsmString = "cmpd $\x02, $\x03"; break; } return NULL; case PPC_CMPDI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (CMPDI CR0, g8rc:$rA, s16imm64:$imm) AsmString = "cmpdi $\x02, $\xFF\x03\x03"; break; } return NULL; case PPC_CMPLD: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (CMPLD CR0, g8rc:$rA, g8rc:$rB) AsmString = "cmpld $\x02, $\x03"; break; } return NULL; case PPC_CMPLDI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (CMPLDI CR0, g8rc:$rA, u16imm64:$imm) AsmString = "cmpldi $\x02, $\xFF\x03\x04"; break; } return NULL; case PPC_CMPLW: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (CMPLW CR0, gprc:$rA, gprc:$rB) AsmString = "cmplw $\x02, $\x03"; break; } return NULL; case PPC_CMPLWI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (CMPLWI CR0, gprc:$rA, u16imm:$imm) AsmString = "cmplwi $\x02, $\xFF\x03\x04"; break; } return NULL; case PPC_CMPW: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (CMPW CR0, gprc:$rA, gprc:$rB) AsmString = "cmpw $\x02, $\x03"; break; } return NULL; case PPC_CMPWI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (CMPWI CR0, gprc:$rA, s16imm:$imm) AsmString = "cmpwi $\x02, $\xFF\x03\x03"; break; } return NULL; case PPC_CNTLZW: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (CNTLZW gprc:$rA, gprc:$rS) AsmString = "cntlz $\x01, $\x02"; break; } return NULL; case PPC_CNTLZWo: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (CNTLZWo gprc:$rA, gprc:$rS) AsmString = "cntlz. $\x01, $\x02"; break; } return NULL; case PPC_CREQV: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) AsmString = "crset $\x01"; break; } return NULL; case PPC_CRNOR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (CRNOR crbitrc:$bx, crbitrc:$by, crbitrc:$by) AsmString = "crnot $\x01, $\x02"; break; } return NULL; case PPC_CROR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by) AsmString = "crmove $\x01, $\x02"; break; } return NULL; case PPC_CRXOR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { // (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) AsmString = "crclr $\x01"; break; } return NULL; case PPC_MBAR: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (MBAR 0) AsmString = "mbar"; break; } return NULL; case PPC_MFDCR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 128) { // (MFDCR gprc:$Rx, 128) AsmString = "mfbr0 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 129) { // (MFDCR gprc:$Rx, 129) AsmString = "mfbr1 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 130) { // (MFDCR gprc:$Rx, 130) AsmString = "mfbr2 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 131) { // (MFDCR gprc:$Rx, 131) AsmString = "mfbr3 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 132) { // (MFDCR gprc:$Rx, 132) AsmString = "mfbr4 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 133) { // (MFDCR gprc:$Rx, 133) AsmString = "mfbr5 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 134) { // (MFDCR gprc:$Rx, 134) AsmString = "mfbr6 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 135) { // (MFDCR gprc:$Rx, 135) AsmString = "mfbr7 $\x01"; break; } return NULL; case PPC_MFSPR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (MFSPR gprc:$Rx, 1) AsmString = "mfxer $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (MFSPR gprc:$Rx, 4) AsmString = "mfrtcu $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (MFSPR gprc:$Rx, 5) AsmString = "mfrtcl $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 17) { // (MFSPR gprc:$Rx, 17) AsmString = "mfdscr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 18) { // (MFSPR gprc:$Rx, 18) AsmString = "mfdsisr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 19) { // (MFSPR gprc:$Rx, 19) AsmString = "mfdar $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 990) { // (MFSPR gprc:$Rx, 990) AsmString = "mfsrr2 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 991) { // (MFSPR gprc:$Rx, 991) AsmString = "mfsrr3 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 28) { // (MFSPR gprc:$Rx, 28) AsmString = "mfcfar $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 29) { // (MFSPR gprc:$Rx, 29) AsmString = "mfamr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 48) { // (MFSPR gprc:$Rx, 48) AsmString = "mfpid $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 989) { // (MFSPR gprc:$Rx, 989) AsmString = "mftblo $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 988) { // (MFSPR gprc:$Rx, 988) AsmString = "mftbhi $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 536) { // (MFSPR gprc:$Rx, 536) AsmString = "mfdbatu $\x01, 0"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 538) { // (MFSPR gprc:$Rx, 538) AsmString = "mfdbatu $\x01, 1"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 540) { // (MFSPR gprc:$Rx, 540) AsmString = "mfdbatu $\x01, 2"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 542) { // (MFSPR gprc:$Rx, 542) AsmString = "mfdbatu $\x01, 3"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 537) { // (MFSPR gprc:$Rx, 537) AsmString = "mfdbatl $\x01, 0"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 539) { // (MFSPR gprc:$Rx, 539) AsmString = "mfdbatl $\x01, 1"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 541) { // (MFSPR gprc:$Rx, 541) AsmString = "mfdbatl $\x01, 2"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 543) { // (MFSPR gprc:$Rx, 543) AsmString = "mfdbatl $\x01, 3"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 528) { // (MFSPR gprc:$Rx, 528) AsmString = "mfibatu $\x01, 0"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 530) { // (MFSPR gprc:$Rx, 530) AsmString = "mfibatu $\x01, 1"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 532) { // (MFSPR gprc:$Rx, 532) AsmString = "mfibatu $\x01, 2"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 534) { // (MFSPR gprc:$Rx, 534) AsmString = "mfibatu $\x01, 3"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 529) { // (MFSPR gprc:$Rx, 529) AsmString = "mfibatl $\x01, 0"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 531) { // (MFSPR gprc:$Rx, 531) AsmString = "mfibatl $\x01, 1"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 533) { // (MFSPR gprc:$Rx, 533) AsmString = "mfibatl $\x01, 2"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 535) { // (MFSPR gprc:$Rx, 535) AsmString = "mfibatl $\x01, 3"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1018) { // (MFSPR gprc:$Rx, 1018) AsmString = "mfdccr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1019) { // (MFSPR gprc:$Rx, 1019) AsmString = "mficcr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 981) { // (MFSPR gprc:$Rx, 981) AsmString = "mfdear $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 980) { // (MFSPR gprc:$Rx, 980) AsmString = "mfesr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 512) { // (MFSPR gprc:$Rx, 512) AsmString = "mfspefscr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 986) { // (MFSPR gprc:$Rx, 986) AsmString = "mftcr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 280) { // (MFSPR gprc:$RT, 280) AsmString = "mfasr $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 287) { // (MFSPR gprc:$RT, 287) AsmString = "mfpvr $\x01"; break; } return NULL; case PPC_MFTB: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 269) { // (MFTB gprc:$Rx, 269) AsmString = "mftbu $\x01"; break; } return NULL; case PPC_MTCRF8: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 255 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (MTCRF8 255, g8rc:$rA) AsmString = "mtcr $\x02"; break; } return NULL; case PPC_MTDCR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 128) { // (MTDCR gprc:$Rx, 128) AsmString = "mtbr0 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 129) { // (MTDCR gprc:$Rx, 129) AsmString = "mtbr1 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 130) { // (MTDCR gprc:$Rx, 130) AsmString = "mtbr2 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 131) { // (MTDCR gprc:$Rx, 131) AsmString = "mtbr3 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 132) { // (MTDCR gprc:$Rx, 132) AsmString = "mtbr4 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 133) { // (MTDCR gprc:$Rx, 133) AsmString = "mtbr5 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 134) { // (MTDCR gprc:$Rx, 134) AsmString = "mtbr6 $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 135) { // (MTDCR gprc:$Rx, 135) AsmString = "mtbr7 $\x01"; break; } return NULL; case PPC_MTFSF: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_F8RCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (MTFSF i32imm:$FLM, f8rc:$FRB, 0, 0) AsmString = "mtfsf $\x01, $\x02"; break; } return NULL; case PPC_MTFSFI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (MTFSFI crrc:$BF, i32imm:$U, 0) AsmString = "mtfsfi $\x01, $\x02"; break; } return NULL; case PPC_MTFSFIo: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (MTFSFIo crrc:$BF, i32imm:$U, 0) AsmString = "mtfsfi. $\x01, $\x02"; break; } return NULL; case PPC_MTFSFo: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_F8RCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (MTFSFo i32imm:$FLM, f8rc:$FRB, 0, 0) AsmString = "mtfsf. $\x01, $\x02"; break; } return NULL; case PPC_MTMSR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (MTMSR gprc:$RS, 0) AsmString = "mtmsr $\x01"; break; } return NULL; case PPC_MTMSRD: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (MTMSRD gprc:$RS, 0) AsmString = "mtmsrd $\x01"; break; } return NULL; case PPC_MTSPR: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 1, gprc:$Rx) AsmString = "mtxer $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 17 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 17, gprc:$Rx) AsmString = "mtdscr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 18 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 18, gprc:$Rx) AsmString = "mtdsisr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 19 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 19, gprc:$Rx) AsmString = "mtdar $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 990 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 990, gprc:$Rx) AsmString = "mtsrr2 $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 991 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 991, gprc:$Rx) AsmString = "mtsrr3 $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 28 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 28, gprc:$Rx) AsmString = "mtcfar $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 29 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 29, gprc:$Rx) AsmString = "mtamr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 48 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 48, gprc:$Rx) AsmString = "mtpid $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 284 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 284, gprc:$Rx) AsmString = "mttbl $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 285 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 285, gprc:$Rx) AsmString = "mttbu $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 989 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 989, gprc:$Rx) AsmString = "mttblo $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 988 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 988, gprc:$Rx) AsmString = "mttbhi $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 536 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 536, gprc:$Rx) AsmString = "mtdbatu 0, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 538 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 538, gprc:$Rx) AsmString = "mtdbatu 1, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 540 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 540, gprc:$Rx) AsmString = "mtdbatu 2, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 542 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 542, gprc:$Rx) AsmString = "mtdbatu 3, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 537 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 537, gprc:$Rx) AsmString = "mtdbatl 0, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 539 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 539, gprc:$Rx) AsmString = "mtdbatl 1, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 541 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 541, gprc:$Rx) AsmString = "mtdbatl 2, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 543 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 543, gprc:$Rx) AsmString = "mtdbatl 3, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 528 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 528, gprc:$Rx) AsmString = "mtibatu 0, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 530 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 530, gprc:$Rx) AsmString = "mtibatu 1, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 532 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 532, gprc:$Rx) AsmString = "mtibatu 2, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 534 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 534, gprc:$Rx) AsmString = "mtibatu 3, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 529 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 529, gprc:$Rx) AsmString = "mtibatl 0, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 531 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 531, gprc:$Rx) AsmString = "mtibatl 1, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 533 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 533, gprc:$Rx) AsmString = "mtibatl 2, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 535 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 535, gprc:$Rx) AsmString = "mtibatl 3, $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1018 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 1018, gprc:$Rx) AsmString = "mtdccr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1019 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 1019, gprc:$Rx) AsmString = "mticcr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 981 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 981, gprc:$Rx) AsmString = "mtdear $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 980 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 980, gprc:$Rx) AsmString = "mtesr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 512 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 512, gprc:$Rx) AsmString = "mtspefscr $\x02"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 986 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (MTSPR 986, gprc:$Rx) AsmString = "mttcr $\x02"; break; } return NULL; case PPC_NOR8: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (NOR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) AsmString = "not $\x01, $\x02"; break; } return NULL; case PPC_NOR8o: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (NOR8o g8rc:$rA, g8rc:$rB, g8rc:$rB) AsmString = "not. $\x01, $\x02"; break; } return NULL; case PPC_OR8: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) AsmString = "mr $\x01, $\x02"; break; } return NULL; case PPC_OR8o: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (OR8o g8rc:$rA, g8rc:$rB, g8rc:$rB) AsmString = "mr. $\x01, $\x02"; break; } return NULL; case PPC_QVFLOGICALb: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0) AsmString = "qvfclr $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 1) AsmString = "qvfand $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 4) AsmString = "qvfandc $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 5) AsmString = "qvfctfb $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 6) AsmString = "qvfxor $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 7) AsmString = "qvfor $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 8) AsmString = "qvfnor $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 9) AsmString = "qvfequ $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 10) AsmString = "qvfnot $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 13) AsmString = "qvforc $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 14) AsmString = "qvfnand $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 15) AsmString = "qvfset $\x01"; break; } return NULL; case PPC_RLDCL: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (RLDCL g8rc:$rA, g8rc:$rS, gprc:$rB, 0) AsmString = "rotld $\x01, $\x02, $\x03"; break; } return NULL; case PPC_RLDCLo: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (RLDCLo g8rc:$rA, g8rc:$rS, gprc:$rB, 0) AsmString = "rotld. $\x01, $\x02, $\x03"; break; } return NULL; case PPC_RLDICL: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (RLDICL g8rc:$rA, g8rc:$rS, u6imm:$n, 0) AsmString = "rotldi $\x01, $\x02, $\xFF\x03\x05"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (RLDICL g8rc:$rA, g8rc:$rS, 0, u6imm:$n) AsmString = "clrldi $\x01, $\x02, $\xFF\x04\x05"; break; } return NULL; case PPC_RLDICLo: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (RLDICLo g8rc:$rA, g8rc:$rS, u6imm:$n, 0) AsmString = "rotldi. $\x01, $\x02, $\xFF\x03\x05"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (RLDICLo g8rc:$rA, g8rc:$rS, 0, u6imm:$n) AsmString = "clrldi. $\x01, $\x02, $\xFF\x04\x05"; break; } return NULL; case PPC_RLWINM: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { // (RLWINM gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) AsmString = "rotlwi $\x01, $\x02, $\xFF\x03\x06"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { // (RLWINM gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) AsmString = "clrlwi $\x01, $\x02, $\xFF\x04\x06"; break; } return NULL; case PPC_RLWINMo: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { // (RLWINMo gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) AsmString = "rotlwi. $\x01, $\x02, $\xFF\x03\x06"; break; } if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { // (RLWINMo gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) AsmString = "clrlwi. $\x01, $\x02, $\xFF\x04\x06"; break; } return NULL; case PPC_RLWNM: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { // (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) AsmString = "rotlw $\x01, $\x02, $\x03"; break; } return NULL; case PPC_RLWNMo: if (MCInst_getNumOperands(MI) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && MCOperand_isImm(MCInst_getOperand(MI, 4)) && MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { // (RLWNMo gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) AsmString = "rotlw. $\x01, $\x02, $\x03"; break; } return NULL; case PPC_SC: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (SC 0) AsmString = "sc"; break; } return NULL; case PPC_SUBF8: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB) AsmString = "sub $\x01, $\x03, $\x02"; break; } return NULL; case PPC_SUBF8o: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (SUBF8o g8rc:$rA, g8rc:$rC, g8rc:$rB) AsmString = "sub. $\x01, $\x03, $\x02"; break; } return NULL; case PPC_SUBFC8: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB) AsmString = "subc $\x01, $\x03, $\x02"; break; } return NULL; case PPC_SUBFC8o: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (SUBFC8o g8rc:$rA, g8rc:$rC, g8rc:$rB) AsmString = "subc. $\x01, $\x03, $\x02"; break; } return NULL; case PPC_SYNC: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { // (SYNC 1) AsmString = "lwsync"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { // (SYNC 2) AsmString = "ptesync"; break; } return NULL; case PPC_TD: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 16, g8rc:$rA, g8rc:$rB) AsmString = "tdlt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 4, g8rc:$rA, g8rc:$rB) AsmString = "tdeq $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 8, g8rc:$rA, g8rc:$rB) AsmString = "tdgt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 24, g8rc:$rA, g8rc:$rB) AsmString = "tdne $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 2, g8rc:$rA, g8rc:$rB) AsmString = "tdllt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 1, g8rc:$rA, g8rc:$rB) AsmString = "tdlgt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { // (TD 31, g8rc:$rA, g8rc:$rB) AsmString = "tdu $\x02, $\x03"; break; } return NULL; case PPC_TDI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 16, g8rc:$rA, s16imm:$imm) AsmString = "tdlti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 4, g8rc:$rA, s16imm:$imm) AsmString = "tdeqi $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 8, g8rc:$rA, s16imm:$imm) AsmString = "tdgti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 24, g8rc:$rA, s16imm:$imm) AsmString = "tdnei $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 2, g8rc:$rA, s16imm:$imm) AsmString = "tdllti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 1, g8rc:$rA, s16imm:$imm) AsmString = "tdlgti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { // (TDI 31, g8rc:$rA, s16imm:$imm) AsmString = "tdui $\x02, $\xFF\x03\x03"; break; } return NULL; case PPC_TLBIE: if (MCInst_getNumOperands(MI) == 2 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_R0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TLBIE R0, gprc:$RB) AsmString = "tlbie $\x02"; break; } return NULL; case PPC_TLBRE2: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TLBRE2 gprc:$RS, gprc:$A, 0) AsmString = "tlbrehi $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (TLBRE2 gprc:$RS, gprc:$A, 1) AsmString = "tlbrelo $\x01, $\x02"; break; } return NULL; case PPC_TLBWE2: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TLBWE2 gprc:$RS, gprc:$A, 0) AsmString = "tlbwehi $\x01, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (TLBWE2 gprc:$RS, gprc:$A, 1) AsmString = "tlbwelo $\x01, $\x02"; break; } return NULL; case PPC_TW: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 16, gprc:$rA, gprc:$rB) AsmString = "twlt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 4, gprc:$rA, gprc:$rB) AsmString = "tweq $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 8, gprc:$rA, gprc:$rB) AsmString = "twgt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 24, gprc:$rA, gprc:$rB) AsmString = "twne $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 2, gprc:$rA, gprc:$rB) AsmString = "twllt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 1, gprc:$rA, gprc:$rB) AsmString = "twlgt $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { // (TW 31, gprc:$rA, gprc:$rB) AsmString = "twu $\x02, $\x03"; break; } return NULL; case PPC_TWI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 16, gprc:$rA, s16imm:$imm) AsmString = "twlti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 4, gprc:$rA, s16imm:$imm) AsmString = "tweqi $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 8, gprc:$rA, s16imm:$imm) AsmString = "twgti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 24, gprc:$rA, s16imm:$imm) AsmString = "twnei $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 2, gprc:$rA, s16imm:$imm) AsmString = "twllti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 1, gprc:$rA, s16imm:$imm) AsmString = "twlgti $\x02, $\xFF\x03\x03"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { // (TWI 31, gprc:$rA, s16imm:$imm) AsmString = "twui $\x02, $\xFF\x03\x03"; break; } return NULL; case PPC_WAIT: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { // (WAIT 0) AsmString = "wait"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { // (WAIT 1) AsmString = "waitrsv"; break; } if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { // (WAIT 2) AsmString = "waitimpl"; break; } return NULL; case PPC_XORI: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_R0 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_R0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (XORI R0, R0, 0) AsmString = "xnop"; break; } return NULL; case PPC_XVCPSGNDP: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB) AsmString = "xvmovdp $\x01, $\x02"; break; } return NULL; case PPC_XVCPSGNSP: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { // (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB) AsmString = "xvmovsp $\x01, $\x02"; break; } return NULL; case PPC_XXPERMDI: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0) AsmString = "xxspltd $\x01, $\x02, 0"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3) AsmString = "xxspltd $\x01, $\x02, 1"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) AsmString = "xxmrghd $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3) AsmString = "xxmrgld $\x01, $\x02, $\x03"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2) AsmString = "xxswapd $\x01, $\x02"; break; } return NULL; case PPC_gBC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBC 8, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdnzt $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBC 0, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdnzf $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBC 10, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdzt $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBC 2, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdzf $\x02, $\xFF\x03\x01"; break; } return NULL; case PPC_gBCA: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCA 8, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdnzta $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCA 0, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdnzfa $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCA 10, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdzta $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCA 2, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdzfa $\x02, $\xFF\x03\x02"; break; } return NULL; case PPC_gBCCTR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCCTR u5imm:$bo, crbitrc:$bi, 0) AsmString = "bcctr $\xFF\x01\x06, $\x02"; break; } return NULL; case PPC_gBCCTRL: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCCTRL u5imm:$bo, crbitrc:$bi, 0) AsmString = "bcctrl $\xFF\x01\x06, $\x02"; break; } return NULL; case PPC_gBCL: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCL 8, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdnztl $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCL 0, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdnzfl $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCL 10, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdztl $\x02, $\xFF\x03\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCL 2, crbitrc:$bi, condbrtarget:$dst) AsmString = "bdzfl $\x02, $\xFF\x03\x01"; break; } return NULL; case PPC_gBCLA: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCLA 8, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdnztla $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCLA 0, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdnzfla $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCLA 10, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdztla $\x02, $\xFF\x03\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { // (gBCLA 2, crbitrc:$bi, abscondbrtarget:$dst) AsmString = "bdzfla $\x02, $\xFF\x03\x02"; break; } return NULL; case PPC_gBCLR: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLR u5imm:$bo, crbitrc:$bi, 0) AsmString = "bclr $\xFF\x01\x06, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLR 8, crbitrc:$bi, 0) AsmString = "bdnztlr $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLR 0, crbitrc:$bi, 0) AsmString = "bdnzflr $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLR 10, crbitrc:$bi, 0) AsmString = "bdztlr $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLR 2, crbitrc:$bi, 0) AsmString = "bdzflr $\x02"; break; } return NULL; case PPC_gBCLRL: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLRL u5imm:$bo, crbitrc:$bi, 0) AsmString = "bclrl $\xFF\x01\x06, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLRL 8, crbitrc:$bi, 0) AsmString = "bdnztlrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLRL 0, crbitrc:$bi, 0) AsmString = "bdnzflrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLRL 10, crbitrc:$bi, 0) AsmString = "bdztlrl $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (gBCLRL 2, crbitrc:$bi, 0) AsmString = "bdzflrl $\x02"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc010066400017500001750000007225671363402546700240110ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * PPC Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, \ unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } // FieldFromInstruction(fieldFromInstruction_2, uint16_t) FieldFromInstruction(fieldFromInstruction_4, uint32_t) static const uint8_t DecoderTable32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 17 /* 7 */ MCD_OPC_CheckField, 1, 10, 128, 2, 231, 38, // Skip to: 9973 /* 14 */ MCD_OPC_Decode, 119, 0, // Opcode: ATTN /* 17 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 25 /* 21 */ MCD_OPC_Decode, 247, 8, 1, // Opcode: TDI /* 25 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 33 /* 29 */ MCD_OPC_Decode, 136, 9, 2, // Opcode: TWI /* 33 */ MCD_OPC_FilterValue, 4, 223, 6, // Skip to: 1796 /* 37 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 40 */ MCD_OPC_FilterValue, 0, 179, 0, // Skip to: 223 /* 44 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 47 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 55 /* 51 */ MCD_OPC_Decode, 144, 9, 3, // Opcode: VADDUBM /* 55 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 63 /* 59 */ MCD_OPC_Decode, 147, 9, 3, // Opcode: VADDUHM /* 63 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 71 /* 67 */ MCD_OPC_Decode, 149, 9, 3, // Opcode: VADDUWM /* 71 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 79 /* 75 */ MCD_OPC_Decode, 146, 9, 3, // Opcode: VADDUDM /* 79 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 87 /* 83 */ MCD_OPC_Decode, 139, 9, 3, // Opcode: VADDCUW /* 87 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 95 /* 91 */ MCD_OPC_Decode, 145, 9, 3, // Opcode: VADDUBS /* 95 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 103 /* 99 */ MCD_OPC_Decode, 148, 9, 3, // Opcode: VADDUHS /* 103 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 111 /* 107 */ MCD_OPC_Decode, 150, 9, 3, // Opcode: VADDUWS /* 111 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 119 /* 115 */ MCD_OPC_Decode, 141, 9, 3, // Opcode: VADDSBS /* 119 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 127 /* 123 */ MCD_OPC_Decode, 142, 9, 3, // Opcode: VADDSHS /* 127 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 135 /* 131 */ MCD_OPC_Decode, 143, 9, 3, // Opcode: VADDSWS /* 135 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 143 /* 139 */ MCD_OPC_Decode, 183, 10, 3, // Opcode: VSUBUBM /* 143 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 151 /* 147 */ MCD_OPC_Decode, 186, 10, 3, // Opcode: VSUBUHM /* 151 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 159 /* 155 */ MCD_OPC_Decode, 188, 10, 3, // Opcode: VSUBUWM /* 159 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 167 /* 163 */ MCD_OPC_Decode, 185, 10, 3, // Opcode: VSUBUDM /* 167 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 175 /* 171 */ MCD_OPC_Decode, 178, 10, 3, // Opcode: VSUBCUW /* 175 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 183 /* 179 */ MCD_OPC_Decode, 184, 10, 3, // Opcode: VSUBUBS /* 183 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 191 /* 187 */ MCD_OPC_Decode, 187, 10, 3, // Opcode: VSUBUHS /* 191 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 199 /* 195 */ MCD_OPC_Decode, 189, 10, 3, // Opcode: VSUBUWS /* 199 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 207 /* 203 */ MCD_OPC_Decode, 180, 10, 3, // Opcode: VSUBSBS /* 207 */ MCD_OPC_FilterValue, 29, 4, 0, // Skip to: 215 /* 211 */ MCD_OPC_Decode, 181, 10, 3, // Opcode: VSUBSHS /* 215 */ MCD_OPC_FilterValue, 30, 26, 38, // Skip to: 9973 /* 219 */ MCD_OPC_Decode, 182, 10, 3, // Opcode: VSUBSWS /* 223 */ MCD_OPC_FilterValue, 2, 235, 0, // Skip to: 462 /* 227 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 230 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 238 /* 234 */ MCD_OPC_Decode, 212, 9, 3, // Opcode: VMAXUB /* 238 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 246 /* 242 */ MCD_OPC_Decode, 214, 9, 3, // Opcode: VMAXUH /* 246 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 254 /* 250 */ MCD_OPC_Decode, 215, 9, 3, // Opcode: VMAXUW /* 254 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 262 /* 258 */ MCD_OPC_Decode, 213, 9, 3, // Opcode: VMAXUD /* 262 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 270 /* 266 */ MCD_OPC_Decode, 208, 9, 3, // Opcode: VMAXSB /* 270 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 278 /* 274 */ MCD_OPC_Decode, 210, 9, 3, // Opcode: VMAXSH /* 278 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 286 /* 282 */ MCD_OPC_Decode, 211, 9, 3, // Opcode: VMAXSW /* 286 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 294 /* 290 */ MCD_OPC_Decode, 209, 9, 3, // Opcode: VMAXSD /* 294 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 302 /* 298 */ MCD_OPC_Decode, 224, 9, 3, // Opcode: VMINUB /* 302 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 310 /* 306 */ MCD_OPC_Decode, 225, 9, 3, // Opcode: VMINUH /* 310 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 318 /* 314 */ MCD_OPC_Decode, 226, 9, 3, // Opcode: VMINUW /* 318 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 326 /* 322 */ MCD_OPC_Decode, 218, 9, 3, // Opcode: VMIDUD /* 326 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 334 /* 330 */ MCD_OPC_Decode, 220, 9, 3, // Opcode: VMINSB /* 334 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 342 /* 338 */ MCD_OPC_Decode, 222, 9, 3, // Opcode: VMINSH /* 342 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 350 /* 346 */ MCD_OPC_Decode, 223, 9, 3, // Opcode: VMINSW /* 350 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 358 /* 354 */ MCD_OPC_Decode, 221, 9, 3, // Opcode: VMINSD /* 358 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 366 /* 362 */ MCD_OPC_Decode, 156, 9, 3, // Opcode: VAVGUB /* 366 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 374 /* 370 */ MCD_OPC_Decode, 157, 9, 3, // Opcode: VAVGUH /* 374 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 382 /* 378 */ MCD_OPC_Decode, 158, 9, 3, // Opcode: VAVGUW /* 382 */ MCD_OPC_FilterValue, 20, 4, 0, // Skip to: 390 /* 386 */ MCD_OPC_Decode, 153, 9, 3, // Opcode: VAVGSB /* 390 */ MCD_OPC_FilterValue, 21, 4, 0, // Skip to: 398 /* 394 */ MCD_OPC_Decode, 154, 9, 3, // Opcode: VAVGSH /* 398 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 406 /* 402 */ MCD_OPC_Decode, 155, 9, 3, // Opcode: VAVGSW /* 406 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 420 /* 410 */ MCD_OPC_CheckField, 16, 5, 0, 85, 37, // Skip to: 9973 /* 416 */ MCD_OPC_Decode, 163, 9, 4, // Opcode: VCLZB /* 420 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 434 /* 424 */ MCD_OPC_CheckField, 16, 5, 0, 71, 37, // Skip to: 9973 /* 430 */ MCD_OPC_Decode, 165, 9, 4, // Opcode: VCLZH /* 434 */ MCD_OPC_FilterValue, 30, 10, 0, // Skip to: 448 /* 438 */ MCD_OPC_CheckField, 16, 5, 0, 57, 37, // Skip to: 9973 /* 444 */ MCD_OPC_Decode, 166, 9, 4, // Opcode: VCLZW /* 448 */ MCD_OPC_FilterValue, 31, 49, 37, // Skip to: 9973 /* 452 */ MCD_OPC_CheckField, 16, 5, 0, 43, 37, // Skip to: 9973 /* 458 */ MCD_OPC_Decode, 164, 9, 4, // Opcode: VCLZD /* 462 */ MCD_OPC_FilterValue, 3, 59, 0, // Skip to: 525 /* 466 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 469 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 483 /* 473 */ MCD_OPC_CheckField, 16, 5, 0, 22, 37, // Skip to: 9973 /* 479 */ MCD_OPC_Decode, 140, 10, 4, // Opcode: VPOPCNTB /* 483 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 497 /* 487 */ MCD_OPC_CheckField, 16, 5, 0, 8, 37, // Skip to: 9973 /* 493 */ MCD_OPC_Decode, 142, 10, 4, // Opcode: VPOPCNTH /* 497 */ MCD_OPC_FilterValue, 30, 10, 0, // Skip to: 511 /* 501 */ MCD_OPC_CheckField, 16, 5, 0, 250, 36, // Skip to: 9973 /* 507 */ MCD_OPC_Decode, 143, 10, 4, // Opcode: VPOPCNTW /* 511 */ MCD_OPC_FilterValue, 31, 242, 36, // Skip to: 9973 /* 515 */ MCD_OPC_CheckField, 16, 5, 0, 236, 36, // Skip to: 9973 /* 521 */ MCD_OPC_Decode, 141, 10, 4, // Opcode: VPOPCNTD /* 525 */ MCD_OPC_FilterValue, 4, 239, 0, // Skip to: 768 /* 529 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 532 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 540 /* 536 */ MCD_OPC_Decode, 149, 10, 3, // Opcode: VRLB /* 540 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 548 /* 544 */ MCD_OPC_Decode, 151, 10, 3, // Opcode: VRLH /* 548 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 556 /* 552 */ MCD_OPC_Decode, 152, 10, 3, // Opcode: VRLW /* 556 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 564 /* 560 */ MCD_OPC_Decode, 150, 10, 3, // Opcode: VRLD /* 564 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 572 /* 568 */ MCD_OPC_Decode, 156, 10, 3, // Opcode: VSLB /* 572 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 580 /* 576 */ MCD_OPC_Decode, 159, 10, 3, // Opcode: VSLH /* 580 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 588 /* 584 */ MCD_OPC_Decode, 161, 10, 3, // Opcode: VSLW /* 588 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 596 /* 592 */ MCD_OPC_Decode, 155, 10, 3, // Opcode: VSL /* 596 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 604 /* 600 */ MCD_OPC_Decode, 173, 10, 3, // Opcode: VSRB /* 604 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 612 /* 608 */ MCD_OPC_Decode, 175, 10, 3, // Opcode: VSRH /* 612 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 620 /* 616 */ MCD_OPC_Decode, 177, 10, 3, // Opcode: VSRW /* 620 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 628 /* 624 */ MCD_OPC_Decode, 168, 10, 3, // Opcode: VSR /* 628 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 636 /* 632 */ MCD_OPC_Decode, 169, 10, 3, // Opcode: VSRAB /* 636 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 644 /* 640 */ MCD_OPC_Decode, 171, 10, 3, // Opcode: VSRAH /* 644 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 652 /* 648 */ MCD_OPC_Decode, 172, 10, 3, // Opcode: VSRAW /* 652 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 660 /* 656 */ MCD_OPC_Decode, 170, 10, 3, // Opcode: VSRAD /* 660 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 668 /* 664 */ MCD_OPC_Decode, 151, 9, 3, // Opcode: VAND /* 668 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 676 /* 672 */ MCD_OPC_Decode, 152, 9, 3, // Opcode: VANDC /* 676 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 684 /* 680 */ MCD_OPC_Decode, 128, 10, 3, // Opcode: VOR /* 684 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 692 /* 688 */ MCD_OPC_Decode, 201, 10, 3, // Opcode: VXOR /* 692 */ MCD_OPC_FilterValue, 20, 4, 0, // Skip to: 700 /* 696 */ MCD_OPC_Decode, 255, 9, 3, // Opcode: VNOR /* 700 */ MCD_OPC_FilterValue, 21, 4, 0, // Skip to: 708 /* 704 */ MCD_OPC_Decode, 129, 10, 3, // Opcode: VORC /* 708 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 716 /* 712 */ MCD_OPC_Decode, 253, 9, 3, // Opcode: VNAND /* 716 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 724 /* 720 */ MCD_OPC_Decode, 157, 10, 3, // Opcode: VSLD /* 724 */ MCD_OPC_FilterValue, 24, 10, 0, // Skip to: 738 /* 728 */ MCD_OPC_CheckField, 11, 10, 0, 23, 36, // Skip to: 9973 /* 734 */ MCD_OPC_Decode, 198, 5, 5, // Opcode: MFVSCR /* 738 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 752 /* 742 */ MCD_OPC_CheckField, 16, 10, 0, 9, 36, // Skip to: 9973 /* 748 */ MCD_OPC_Decode, 225, 5, 6, // Opcode: MTVSCR /* 752 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 760 /* 756 */ MCD_OPC_Decode, 203, 9, 3, // Opcode: VEQV /* 760 */ MCD_OPC_FilterValue, 27, 249, 35, // Skip to: 9973 /* 764 */ MCD_OPC_Decode, 174, 10, 3, // Opcode: VSRD /* 768 */ MCD_OPC_FilterValue, 6, 211, 0, // Skip to: 983 /* 772 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 775 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 783 /* 779 */ MCD_OPC_Decode, 171, 9, 3, // Opcode: VCMPEQUB /* 783 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 791 /* 787 */ MCD_OPC_Decode, 175, 9, 3, // Opcode: VCMPEQUH /* 791 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 799 /* 795 */ MCD_OPC_Decode, 177, 9, 3, // Opcode: VCMPEQUW /* 799 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 807 /* 803 */ MCD_OPC_Decode, 169, 9, 3, // Opcode: VCMPEQFP /* 807 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 815 /* 811 */ MCD_OPC_Decode, 179, 9, 3, // Opcode: VCMPGEFP /* 815 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 823 /* 819 */ MCD_OPC_Decode, 191, 9, 3, // Opcode: VCMPGTUB /* 823 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 831 /* 827 */ MCD_OPC_Decode, 195, 9, 3, // Opcode: VCMPGTUH /* 831 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 839 /* 835 */ MCD_OPC_Decode, 197, 9, 3, // Opcode: VCMPGTUW /* 839 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 847 /* 843 */ MCD_OPC_Decode, 181, 9, 3, // Opcode: VCMPGTFP /* 847 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 855 /* 851 */ MCD_OPC_Decode, 183, 9, 3, // Opcode: VCMPGTSB /* 855 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 863 /* 859 */ MCD_OPC_Decode, 187, 9, 3, // Opcode: VCMPGTSH /* 863 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 871 /* 867 */ MCD_OPC_Decode, 189, 9, 3, // Opcode: VCMPGTSW /* 871 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 879 /* 875 */ MCD_OPC_Decode, 167, 9, 3, // Opcode: VCMPBFP /* 879 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 887 /* 883 */ MCD_OPC_Decode, 172, 9, 3, // Opcode: VCMPEQUBo /* 887 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 895 /* 891 */ MCD_OPC_Decode, 176, 9, 3, // Opcode: VCMPEQUHo /* 895 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 903 /* 899 */ MCD_OPC_Decode, 178, 9, 3, // Opcode: VCMPEQUWo /* 903 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 911 /* 907 */ MCD_OPC_Decode, 170, 9, 3, // Opcode: VCMPEQFPo /* 911 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 919 /* 915 */ MCD_OPC_Decode, 180, 9, 3, // Opcode: VCMPGEFPo /* 919 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 927 /* 923 */ MCD_OPC_Decode, 192, 9, 3, // Opcode: VCMPGTUBo /* 927 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 935 /* 931 */ MCD_OPC_Decode, 196, 9, 3, // Opcode: VCMPGTUHo /* 935 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 943 /* 939 */ MCD_OPC_Decode, 198, 9, 3, // Opcode: VCMPGTUWo /* 943 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 951 /* 947 */ MCD_OPC_Decode, 182, 9, 3, // Opcode: VCMPGTFPo /* 951 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 959 /* 955 */ MCD_OPC_Decode, 184, 9, 3, // Opcode: VCMPGTSBo /* 959 */ MCD_OPC_FilterValue, 29, 4, 0, // Skip to: 967 /* 963 */ MCD_OPC_Decode, 188, 9, 3, // Opcode: VCMPGTSHo /* 967 */ MCD_OPC_FilterValue, 30, 4, 0, // Skip to: 975 /* 971 */ MCD_OPC_Decode, 190, 9, 3, // Opcode: VCMPGTSWo /* 975 */ MCD_OPC_FilterValue, 31, 34, 35, // Skip to: 9973 /* 979 */ MCD_OPC_Decode, 168, 9, 3, // Opcode: VCMPBFPo /* 983 */ MCD_OPC_FilterValue, 7, 51, 0, // Skip to: 1038 /* 987 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 990 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 998 /* 994 */ MCD_OPC_Decode, 173, 9, 3, // Opcode: VCMPEQUD /* 998 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 1006 /* 1002 */ MCD_OPC_Decode, 193, 9, 3, // Opcode: VCMPGTUD /* 1006 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 1014 /* 1010 */ MCD_OPC_Decode, 185, 9, 3, // Opcode: VCMPGTSD /* 1014 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 1022 /* 1018 */ MCD_OPC_Decode, 174, 9, 3, // Opcode: VCMPEQUDo /* 1022 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 1030 /* 1026 */ MCD_OPC_Decode, 194, 9, 3, // Opcode: VCMPGTUDo /* 1030 */ MCD_OPC_FilterValue, 31, 235, 34, // Skip to: 9973 /* 1034 */ MCD_OPC_Decode, 186, 9, 3, // Opcode: VCMPGTSDo /* 1038 */ MCD_OPC_FilterValue, 8, 139, 0, // Skip to: 1181 /* 1042 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1045 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1053 /* 1049 */ MCD_OPC_Decode, 249, 9, 3, // Opcode: VMULOUB /* 1053 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1061 /* 1057 */ MCD_OPC_Decode, 250, 9, 3, // Opcode: VMULOUH /* 1061 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 1069 /* 1065 */ MCD_OPC_Decode, 251, 9, 3, // Opcode: VMULOUW /* 1069 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1077 /* 1073 */ MCD_OPC_Decode, 246, 9, 3, // Opcode: VMULOSB /* 1077 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 1085 /* 1081 */ MCD_OPC_Decode, 247, 9, 3, // Opcode: VMULOSH /* 1085 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 1093 /* 1089 */ MCD_OPC_Decode, 248, 9, 3, // Opcode: VMULOSW /* 1093 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 1101 /* 1097 */ MCD_OPC_Decode, 243, 9, 3, // Opcode: VMULEUB /* 1101 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 1109 /* 1105 */ MCD_OPC_Decode, 244, 9, 3, // Opcode: VMULEUH /* 1109 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 1117 /* 1113 */ MCD_OPC_Decode, 245, 9, 3, // Opcode: VMULEUW /* 1117 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 1125 /* 1121 */ MCD_OPC_Decode, 240, 9, 3, // Opcode: VMULESB /* 1125 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 1133 /* 1129 */ MCD_OPC_Decode, 241, 9, 3, // Opcode: VMULESH /* 1133 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 1141 /* 1137 */ MCD_OPC_Decode, 242, 9, 3, // Opcode: VMULESW /* 1141 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 1149 /* 1145 */ MCD_OPC_Decode, 193, 10, 3, // Opcode: VSUM4UBS /* 1149 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 1157 /* 1153 */ MCD_OPC_Decode, 192, 10, 3, // Opcode: VSUM4SHS /* 1157 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 1165 /* 1161 */ MCD_OPC_Decode, 190, 10, 3, // Opcode: VSUM2SWS /* 1165 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 1173 /* 1169 */ MCD_OPC_Decode, 191, 10, 3, // Opcode: VSUM4SBS /* 1173 */ MCD_OPC_FilterValue, 30, 92, 34, // Skip to: 9973 /* 1177 */ MCD_OPC_Decode, 194, 10, 3, // Opcode: VSUMSWS /* 1181 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 1195 /* 1185 */ MCD_OPC_CheckField, 6, 5, 2, 78, 34, // Skip to: 9973 /* 1191 */ MCD_OPC_Decode, 252, 9, 3, // Opcode: VMULUWM /* 1195 */ MCD_OPC_FilterValue, 10, 179, 0, // Skip to: 1378 /* 1199 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1202 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1210 /* 1206 */ MCD_OPC_Decode, 140, 9, 3, // Opcode: VADDFP /* 1210 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1218 /* 1214 */ MCD_OPC_Decode, 179, 10, 3, // Opcode: VSUBFP /* 1218 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 1232 /* 1222 */ MCD_OPC_CheckField, 16, 5, 0, 41, 34, // Skip to: 9973 /* 1228 */ MCD_OPC_Decode, 144, 10, 4, // Opcode: VREFP /* 1232 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 1246 /* 1236 */ MCD_OPC_CheckField, 16, 5, 0, 27, 34, // Skip to: 9973 /* 1242 */ MCD_OPC_Decode, 153, 10, 4, // Opcode: VRSQRTEFP /* 1246 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 1260 /* 1250 */ MCD_OPC_CheckField, 16, 5, 0, 13, 34, // Skip to: 9973 /* 1256 */ MCD_OPC_Decode, 204, 9, 4, // Opcode: VEXPTEFP /* 1260 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 1274 /* 1264 */ MCD_OPC_CheckField, 16, 5, 0, 255, 33, // Skip to: 9973 /* 1270 */ MCD_OPC_Decode, 205, 9, 4, // Opcode: VLOGEFP /* 1274 */ MCD_OPC_FilterValue, 8, 10, 0, // Skip to: 1288 /* 1278 */ MCD_OPC_CheckField, 16, 5, 0, 241, 33, // Skip to: 9973 /* 1284 */ MCD_OPC_Decode, 146, 10, 4, // Opcode: VRFIN /* 1288 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 1302 /* 1292 */ MCD_OPC_CheckField, 16, 5, 0, 227, 33, // Skip to: 9973 /* 1298 */ MCD_OPC_Decode, 148, 10, 4, // Opcode: VRFIZ /* 1302 */ MCD_OPC_FilterValue, 10, 10, 0, // Skip to: 1316 /* 1306 */ MCD_OPC_CheckField, 16, 5, 0, 213, 33, // Skip to: 9973 /* 1312 */ MCD_OPC_Decode, 147, 10, 4, // Opcode: VRFIP /* 1316 */ MCD_OPC_FilterValue, 11, 10, 0, // Skip to: 1330 /* 1320 */ MCD_OPC_CheckField, 16, 5, 0, 199, 33, // Skip to: 9973 /* 1326 */ MCD_OPC_Decode, 145, 10, 4, // Opcode: VRFIM /* 1330 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 1338 /* 1334 */ MCD_OPC_Decode, 161, 9, 7, // Opcode: VCFUX /* 1338 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 1346 /* 1342 */ MCD_OPC_Decode, 159, 9, 7, // Opcode: VCFSX /* 1346 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 1354 /* 1350 */ MCD_OPC_Decode, 201, 9, 7, // Opcode: VCTUXS /* 1354 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 1362 /* 1358 */ MCD_OPC_Decode, 199, 9, 7, // Opcode: VCTSXS /* 1362 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 1370 /* 1366 */ MCD_OPC_Decode, 207, 9, 3, // Opcode: VMAXFP /* 1370 */ MCD_OPC_FilterValue, 17, 151, 33, // Skip to: 9973 /* 1374 */ MCD_OPC_Decode, 219, 9, 3, // Opcode: VMINFP /* 1378 */ MCD_OPC_FilterValue, 12, 133, 0, // Skip to: 1515 /* 1382 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1385 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1393 /* 1389 */ MCD_OPC_Decode, 228, 9, 3, // Opcode: VMRGHB /* 1393 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1401 /* 1397 */ MCD_OPC_Decode, 229, 9, 3, // Opcode: VMRGHH /* 1401 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 1409 /* 1405 */ MCD_OPC_Decode, 230, 9, 3, // Opcode: VMRGHW /* 1409 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1417 /* 1413 */ MCD_OPC_Decode, 231, 9, 3, // Opcode: VMRGLB /* 1417 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 1425 /* 1421 */ MCD_OPC_Decode, 232, 9, 3, // Opcode: VMRGLH /* 1425 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 1433 /* 1429 */ MCD_OPC_Decode, 233, 9, 3, // Opcode: VMRGLW /* 1433 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 1441 /* 1437 */ MCD_OPC_Decode, 162, 10, 7, // Opcode: VSPLTB /* 1441 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 1449 /* 1445 */ MCD_OPC_Decode, 163, 10, 7, // Opcode: VSPLTH /* 1449 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 1457 /* 1453 */ MCD_OPC_Decode, 167, 10, 7, // Opcode: VSPLTW /* 1457 */ MCD_OPC_FilterValue, 12, 10, 0, // Skip to: 1471 /* 1461 */ MCD_OPC_CheckField, 11, 5, 0, 58, 33, // Skip to: 9973 /* 1467 */ MCD_OPC_Decode, 164, 10, 8, // Opcode: VSPLTISB /* 1471 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 1485 /* 1475 */ MCD_OPC_CheckField, 11, 5, 0, 44, 33, // Skip to: 9973 /* 1481 */ MCD_OPC_Decode, 165, 10, 8, // Opcode: VSPLTISH /* 1485 */ MCD_OPC_FilterValue, 14, 10, 0, // Skip to: 1499 /* 1489 */ MCD_OPC_CheckField, 11, 5, 0, 30, 33, // Skip to: 9973 /* 1495 */ MCD_OPC_Decode, 166, 10, 8, // Opcode: VSPLTISW /* 1499 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 1507 /* 1503 */ MCD_OPC_Decode, 160, 10, 3, // Opcode: VSLO /* 1507 */ MCD_OPC_FilterValue, 17, 14, 33, // Skip to: 9973 /* 1511 */ MCD_OPC_Decode, 176, 10, 3, // Opcode: VSRO /* 1515 */ MCD_OPC_FilterValue, 14, 159, 0, // Skip to: 1678 /* 1519 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1522 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1530 /* 1526 */ MCD_OPC_Decode, 136, 10, 3, // Opcode: VPKUHUM /* 1530 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1538 /* 1534 */ MCD_OPC_Decode, 138, 10, 3, // Opcode: VPKUWUM /* 1538 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 1546 /* 1542 */ MCD_OPC_Decode, 137, 10, 3, // Opcode: VPKUHUS /* 1546 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 1554 /* 1550 */ MCD_OPC_Decode, 139, 10, 3, // Opcode: VPKUWUS /* 1554 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1562 /* 1558 */ MCD_OPC_Decode, 133, 10, 3, // Opcode: VPKSHUS /* 1562 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 1570 /* 1566 */ MCD_OPC_Decode, 135, 10, 3, // Opcode: VPKSWUS /* 1570 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 1578 /* 1574 */ MCD_OPC_Decode, 132, 10, 3, // Opcode: VPKSHSS /* 1578 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 1586 /* 1582 */ MCD_OPC_Decode, 134, 10, 3, // Opcode: VPKSWSS /* 1586 */ MCD_OPC_FilterValue, 8, 10, 0, // Skip to: 1600 /* 1590 */ MCD_OPC_CheckField, 16, 5, 0, 185, 32, // Skip to: 9973 /* 1596 */ MCD_OPC_Decode, 196, 10, 4, // Opcode: VUPKHSB /* 1600 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 1614 /* 1604 */ MCD_OPC_CheckField, 16, 5, 0, 171, 32, // Skip to: 9973 /* 1610 */ MCD_OPC_Decode, 197, 10, 4, // Opcode: VUPKHSH /* 1614 */ MCD_OPC_FilterValue, 10, 10, 0, // Skip to: 1628 /* 1618 */ MCD_OPC_CheckField, 16, 5, 0, 157, 32, // Skip to: 9973 /* 1624 */ MCD_OPC_Decode, 199, 10, 4, // Opcode: VUPKLSB /* 1628 */ MCD_OPC_FilterValue, 11, 10, 0, // Skip to: 1642 /* 1632 */ MCD_OPC_CheckField, 16, 5, 0, 143, 32, // Skip to: 9973 /* 1638 */ MCD_OPC_Decode, 200, 10, 4, // Opcode: VUPKLSH /* 1642 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 1650 /* 1646 */ MCD_OPC_Decode, 131, 10, 3, // Opcode: VPKPX /* 1650 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 1664 /* 1654 */ MCD_OPC_CheckField, 16, 5, 0, 121, 32, // Skip to: 9973 /* 1660 */ MCD_OPC_Decode, 195, 10, 4, // Opcode: VUPKHPX /* 1664 */ MCD_OPC_FilterValue, 15, 113, 32, // Skip to: 9973 /* 1668 */ MCD_OPC_CheckField, 16, 5, 0, 107, 32, // Skip to: 9973 /* 1674 */ MCD_OPC_Decode, 198, 10, 4, // Opcode: VUPKLPX /* 1678 */ MCD_OPC_FilterValue, 32, 4, 0, // Skip to: 1686 /* 1682 */ MCD_OPC_Decode, 216, 9, 9, // Opcode: VMHADDSHS /* 1686 */ MCD_OPC_FilterValue, 33, 4, 0, // Skip to: 1694 /* 1690 */ MCD_OPC_Decode, 217, 9, 9, // Opcode: VMHRADDSHS /* 1694 */ MCD_OPC_FilterValue, 34, 4, 0, // Skip to: 1702 /* 1698 */ MCD_OPC_Decode, 227, 9, 9, // Opcode: VMLADDUHM /* 1702 */ MCD_OPC_FilterValue, 36, 4, 0, // Skip to: 1710 /* 1706 */ MCD_OPC_Decode, 237, 9, 9, // Opcode: VMSUMUBM /* 1710 */ MCD_OPC_FilterValue, 37, 4, 0, // Skip to: 1718 /* 1714 */ MCD_OPC_Decode, 234, 9, 9, // Opcode: VMSUMMBM /* 1718 */ MCD_OPC_FilterValue, 38, 4, 0, // Skip to: 1726 /* 1722 */ MCD_OPC_Decode, 238, 9, 9, // Opcode: VMSUMUHM /* 1726 */ MCD_OPC_FilterValue, 39, 4, 0, // Skip to: 1734 /* 1730 */ MCD_OPC_Decode, 239, 9, 9, // Opcode: VMSUMUHS /* 1734 */ MCD_OPC_FilterValue, 40, 4, 0, // Skip to: 1742 /* 1738 */ MCD_OPC_Decode, 235, 9, 9, // Opcode: VMSUMSHM /* 1742 */ MCD_OPC_FilterValue, 41, 4, 0, // Skip to: 1750 /* 1746 */ MCD_OPC_Decode, 236, 9, 9, // Opcode: VMSUMSHS /* 1750 */ MCD_OPC_FilterValue, 42, 4, 0, // Skip to: 1758 /* 1754 */ MCD_OPC_Decode, 154, 10, 9, // Opcode: VSEL /* 1758 */ MCD_OPC_FilterValue, 43, 4, 0, // Skip to: 1766 /* 1762 */ MCD_OPC_Decode, 130, 10, 9, // Opcode: VPERM /* 1766 */ MCD_OPC_FilterValue, 44, 10, 0, // Skip to: 1780 /* 1770 */ MCD_OPC_CheckField, 10, 1, 0, 5, 32, // Skip to: 9973 /* 1776 */ MCD_OPC_Decode, 158, 10, 10, // Opcode: VSLDOI /* 1780 */ MCD_OPC_FilterValue, 46, 4, 0, // Skip to: 1788 /* 1784 */ MCD_OPC_Decode, 206, 9, 11, // Opcode: VMADDFP /* 1788 */ MCD_OPC_FilterValue, 47, 245, 31, // Skip to: 9973 /* 1792 */ MCD_OPC_Decode, 254, 9, 11, // Opcode: VNMSUBFP /* 1796 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 1804 /* 1800 */ MCD_OPC_Decode, 236, 5, 12, // Opcode: MULLI /* 1804 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 1812 /* 1808 */ MCD_OPC_Decode, 218, 8, 12, // Opcode: SUBFIC /* 1812 */ MCD_OPC_FilterValue, 10, 19, 0, // Skip to: 1835 /* 1816 */ MCD_OPC_ExtractField, 21, 2, // Inst{22-21} ... /* 1819 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1827 /* 1823 */ MCD_OPC_Decode, 223, 1, 13, // Opcode: CMPLWI /* 1827 */ MCD_OPC_FilterValue, 1, 206, 31, // Skip to: 9973 /* 1831 */ MCD_OPC_Decode, 221, 1, 14, // Opcode: CMPLDI /* 1835 */ MCD_OPC_FilterValue, 11, 19, 0, // Skip to: 1858 /* 1839 */ MCD_OPC_ExtractField, 21, 2, // Inst{22-21} ... /* 1842 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1850 /* 1846 */ MCD_OPC_Decode, 225, 1, 15, // Opcode: CMPWI /* 1850 */ MCD_OPC_FilterValue, 1, 183, 31, // Skip to: 9973 /* 1854 */ MCD_OPC_Decode, 219, 1, 16, // Opcode: CMPDI /* 1858 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 1865 /* 1862 */ MCD_OPC_Decode, 39, 12, // Opcode: ADDIC /* 1865 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 1872 /* 1869 */ MCD_OPC_Decode, 41, 12, // Opcode: ADDICo /* 1872 */ MCD_OPC_FilterValue, 14, 13, 0, // Skip to: 1889 /* 1876 */ MCD_OPC_CheckField, 16, 5, 0, 4, 0, // Skip to: 1886 /* 1882 */ MCD_OPC_Decode, 141, 5, 17, // Opcode: LI /* 1886 */ MCD_OPC_Decode, 37, 18, // Opcode: ADDI /* 1889 */ MCD_OPC_FilterValue, 15, 13, 0, // Skip to: 1906 /* 1893 */ MCD_OPC_CheckField, 16, 5, 0, 4, 0, // Skip to: 1903 /* 1899 */ MCD_OPC_Decode, 143, 5, 17, // Opcode: LIS /* 1903 */ MCD_OPC_Decode, 42, 18, // Opcode: ADDIS /* 1906 */ MCD_OPC_FilterValue, 16, 7, 1, // Skip to: 2173 /* 1910 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 1913 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 1978 /* 1917 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 1920 */ MCD_OPC_FilterValue, 128, 4, 4, 0, // Skip to: 1929 /* 1925 */ MCD_OPC_Decode, 154, 1, 19, // Opcode: BDNZ /* 1929 */ MCD_OPC_FilterValue, 192, 4, 4, 0, // Skip to: 1938 /* 1934 */ MCD_OPC_Decode, 174, 1, 19, // Opcode: BDZ /* 1938 */ MCD_OPC_FilterValue, 128, 6, 4, 0, // Skip to: 1947 /* 1943 */ MCD_OPC_Decode, 172, 1, 19, // Opcode: BDNZm /* 1947 */ MCD_OPC_FilterValue, 160, 6, 4, 0, // Skip to: 1956 /* 1952 */ MCD_OPC_Decode, 173, 1, 19, // Opcode: BDNZp /* 1956 */ MCD_OPC_FilterValue, 192, 6, 4, 0, // Skip to: 1965 /* 1961 */ MCD_OPC_Decode, 192, 1, 19, // Opcode: BDZm /* 1965 */ MCD_OPC_FilterValue, 224, 6, 4, 0, // Skip to: 1974 /* 1970 */ MCD_OPC_Decode, 193, 1, 19, // Opcode: BDZp /* 1974 */ MCD_OPC_Decode, 230, 11, 20, // Opcode: gBC /* 1978 */ MCD_OPC_FilterValue, 1, 61, 0, // Skip to: 2043 /* 1982 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 1985 */ MCD_OPC_FilterValue, 128, 4, 4, 0, // Skip to: 1994 /* 1990 */ MCD_OPC_Decode, 159, 1, 19, // Opcode: BDNZL /* 1994 */ MCD_OPC_FilterValue, 192, 4, 4, 0, // Skip to: 2003 /* 1999 */ MCD_OPC_Decode, 179, 1, 19, // Opcode: BDZL /* 2003 */ MCD_OPC_FilterValue, 128, 6, 4, 0, // Skip to: 2012 /* 2008 */ MCD_OPC_Decode, 170, 1, 19, // Opcode: BDNZLm /* 2012 */ MCD_OPC_FilterValue, 160, 6, 4, 0, // Skip to: 2021 /* 2017 */ MCD_OPC_Decode, 171, 1, 19, // Opcode: BDNZLp /* 2021 */ MCD_OPC_FilterValue, 192, 6, 4, 0, // Skip to: 2030 /* 2026 */ MCD_OPC_Decode, 190, 1, 19, // Opcode: BDZLm /* 2030 */ MCD_OPC_FilterValue, 224, 6, 4, 0, // Skip to: 2039 /* 2035 */ MCD_OPC_Decode, 191, 1, 19, // Opcode: BDZLp /* 2039 */ MCD_OPC_Decode, 234, 11, 20, // Opcode: gBCL /* 2043 */ MCD_OPC_FilterValue, 2, 61, 0, // Skip to: 2108 /* 2047 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 2050 */ MCD_OPC_FilterValue, 128, 4, 4, 0, // Skip to: 2059 /* 2055 */ MCD_OPC_Decode, 156, 1, 19, // Opcode: BDNZA /* 2059 */ MCD_OPC_FilterValue, 192, 4, 4, 0, // Skip to: 2068 /* 2064 */ MCD_OPC_Decode, 176, 1, 19, // Opcode: BDZA /* 2068 */ MCD_OPC_FilterValue, 128, 6, 4, 0, // Skip to: 2077 /* 2073 */ MCD_OPC_Decode, 157, 1, 19, // Opcode: BDNZAm /* 2077 */ MCD_OPC_FilterValue, 160, 6, 4, 0, // Skip to: 2086 /* 2082 */ MCD_OPC_Decode, 158, 1, 19, // Opcode: BDNZAp /* 2086 */ MCD_OPC_FilterValue, 192, 6, 4, 0, // Skip to: 2095 /* 2091 */ MCD_OPC_Decode, 177, 1, 19, // Opcode: BDZAm /* 2095 */ MCD_OPC_FilterValue, 224, 6, 4, 0, // Skip to: 2104 /* 2100 */ MCD_OPC_Decode, 178, 1, 19, // Opcode: BDZAp /* 2104 */ MCD_OPC_Decode, 231, 11, 20, // Opcode: gBCA /* 2108 */ MCD_OPC_FilterValue, 3, 181, 30, // Skip to: 9973 /* 2112 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 2115 */ MCD_OPC_FilterValue, 128, 4, 4, 0, // Skip to: 2124 /* 2120 */ MCD_OPC_Decode, 160, 1, 19, // Opcode: BDNZLA /* 2124 */ MCD_OPC_FilterValue, 192, 4, 4, 0, // Skip to: 2133 /* 2129 */ MCD_OPC_Decode, 180, 1, 19, // Opcode: BDZLA /* 2133 */ MCD_OPC_FilterValue, 128, 6, 4, 0, // Skip to: 2142 /* 2138 */ MCD_OPC_Decode, 161, 1, 19, // Opcode: BDNZLAm /* 2142 */ MCD_OPC_FilterValue, 160, 6, 4, 0, // Skip to: 2151 /* 2147 */ MCD_OPC_Decode, 162, 1, 19, // Opcode: BDNZLAp /* 2151 */ MCD_OPC_FilterValue, 192, 6, 4, 0, // Skip to: 2160 /* 2156 */ MCD_OPC_Decode, 181, 1, 19, // Opcode: BDZLAm /* 2160 */ MCD_OPC_FilterValue, 224, 6, 4, 0, // Skip to: 2169 /* 2165 */ MCD_OPC_Decode, 182, 1, 19, // Opcode: BDZLAp /* 2169 */ MCD_OPC_Decode, 235, 11, 20, // Opcode: gBCLA /* 2173 */ MCD_OPC_FilterValue, 17, 10, 0, // Skip to: 2187 /* 2177 */ MCD_OPC_CheckField, 1, 1, 1, 110, 30, // Skip to: 9973 /* 2183 */ MCD_OPC_Decode, 223, 7, 21, // Opcode: SC /* 2187 */ MCD_OPC_FilterValue, 18, 33, 0, // Skip to: 2224 /* 2191 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 2194 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 2201 /* 2198 */ MCD_OPC_Decode, 120, 22, // Opcode: B /* 2201 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2209 /* 2205 */ MCD_OPC_Decode, 194, 1, 22, // Opcode: BL /* 2209 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 2216 /* 2213 */ MCD_OPC_Decode, 121, 22, // Opcode: BA /* 2216 */ MCD_OPC_FilterValue, 3, 73, 30, // Skip to: 9973 /* 2220 */ MCD_OPC_Decode, 200, 1, 22, // Opcode: BLA /* 2224 */ MCD_OPC_FilterValue, 19, 235, 1, // Skip to: 2719 /* 2228 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ... /* 2231 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 2251 /* 2235 */ MCD_OPC_CheckField, 21, 2, 0, 52, 30, // Skip to: 9973 /* 2241 */ MCD_OPC_CheckField, 11, 7, 0, 46, 30, // Skip to: 9973 /* 2247 */ MCD_OPC_Decode, 177, 5, 23, // Opcode: MCRF /* 2251 */ MCD_OPC_FilterValue, 32, 119, 0, // Skip to: 2374 /* 2255 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 2258 */ MCD_OPC_FilterValue, 0, 31, 30, // Skip to: 9973 /* 2262 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 2265 */ MCD_OPC_FilterValue, 128, 4, 10, 0, // Skip to: 2280 /* 2270 */ MCD_OPC_CheckField, 11, 2, 0, 94, 0, // Skip to: 2370 /* 2276 */ MCD_OPC_Decode, 163, 1, 0, // Opcode: BDNZLR /* 2280 */ MCD_OPC_FilterValue, 192, 4, 10, 0, // Skip to: 2295 /* 2285 */ MCD_OPC_CheckField, 11, 2, 0, 79, 0, // Skip to: 2370 /* 2291 */ MCD_OPC_Decode, 183, 1, 0, // Opcode: BDZLR /* 2295 */ MCD_OPC_FilterValue, 128, 5, 10, 0, // Skip to: 2310 /* 2300 */ MCD_OPC_CheckField, 11, 2, 0, 64, 0, // Skip to: 2370 /* 2306 */ MCD_OPC_Decode, 203, 1, 0, // Opcode: BLR /* 2310 */ MCD_OPC_FilterValue, 128, 6, 10, 0, // Skip to: 2325 /* 2315 */ MCD_OPC_CheckField, 11, 2, 0, 49, 0, // Skip to: 2370 /* 2321 */ MCD_OPC_Decode, 168, 1, 0, // Opcode: BDNZLRm /* 2325 */ MCD_OPC_FilterValue, 160, 6, 10, 0, // Skip to: 2340 /* 2330 */ MCD_OPC_CheckField, 11, 2, 0, 34, 0, // Skip to: 2370 /* 2336 */ MCD_OPC_Decode, 169, 1, 0, // Opcode: BDNZLRp /* 2340 */ MCD_OPC_FilterValue, 192, 6, 10, 0, // Skip to: 2355 /* 2345 */ MCD_OPC_CheckField, 11, 2, 0, 19, 0, // Skip to: 2370 /* 2351 */ MCD_OPC_Decode, 188, 1, 0, // Opcode: BDZLRm /* 2355 */ MCD_OPC_FilterValue, 224, 6, 10, 0, // Skip to: 2370 /* 2360 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 2370 /* 2366 */ MCD_OPC_Decode, 189, 1, 0, // Opcode: BDZLRp /* 2370 */ MCD_OPC_Decode, 236, 11, 24, // Opcode: gBCLR /* 2374 */ MCD_OPC_FilterValue, 33, 119, 0, // Skip to: 2497 /* 2378 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 2381 */ MCD_OPC_FilterValue, 0, 164, 29, // Skip to: 9973 /* 2385 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... /* 2388 */ MCD_OPC_FilterValue, 128, 4, 10, 0, // Skip to: 2403 /* 2393 */ MCD_OPC_CheckField, 11, 2, 0, 94, 0, // Skip to: 2493 /* 2399 */ MCD_OPC_Decode, 165, 1, 0, // Opcode: BDNZLRL /* 2403 */ MCD_OPC_FilterValue, 192, 4, 10, 0, // Skip to: 2418 /* 2408 */ MCD_OPC_CheckField, 11, 2, 0, 79, 0, // Skip to: 2493 /* 2414 */ MCD_OPC_Decode, 185, 1, 0, // Opcode: BDZLRL /* 2418 */ MCD_OPC_FilterValue, 128, 5, 10, 0, // Skip to: 2433 /* 2423 */ MCD_OPC_CheckField, 11, 2, 0, 64, 0, // Skip to: 2493 /* 2429 */ MCD_OPC_Decode, 205, 1, 0, // Opcode: BLRL /* 2433 */ MCD_OPC_FilterValue, 128, 6, 10, 0, // Skip to: 2448 /* 2438 */ MCD_OPC_CheckField, 11, 2, 0, 49, 0, // Skip to: 2493 /* 2444 */ MCD_OPC_Decode, 166, 1, 0, // Opcode: BDNZLRLm /* 2448 */ MCD_OPC_FilterValue, 160, 6, 10, 0, // Skip to: 2463 /* 2453 */ MCD_OPC_CheckField, 11, 2, 0, 34, 0, // Skip to: 2493 /* 2459 */ MCD_OPC_Decode, 167, 1, 0, // Opcode: BDNZLRLp /* 2463 */ MCD_OPC_FilterValue, 192, 6, 10, 0, // Skip to: 2478 /* 2468 */ MCD_OPC_CheckField, 11, 2, 0, 19, 0, // Skip to: 2493 /* 2474 */ MCD_OPC_Decode, 186, 1, 0, // Opcode: BDZLRLm /* 2478 */ MCD_OPC_FilterValue, 224, 6, 10, 0, // Skip to: 2493 /* 2483 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 2493 /* 2489 */ MCD_OPC_Decode, 187, 1, 0, // Opcode: BDZLRLp /* 2493 */ MCD_OPC_Decode, 237, 11, 24, // Opcode: gBCLRL /* 2497 */ MCD_OPC_FilterValue, 36, 10, 0, // Skip to: 2511 /* 2501 */ MCD_OPC_CheckField, 11, 15, 0, 42, 29, // Skip to: 9973 /* 2507 */ MCD_OPC_Decode, 191, 7, 0, // Opcode: RFID /* 2511 */ MCD_OPC_FilterValue, 66, 4, 0, // Skip to: 2519 /* 2515 */ MCD_OPC_Decode, 238, 1, 25, // Opcode: CRNOR /* 2519 */ MCD_OPC_FilterValue, 76, 10, 0, // Skip to: 2533 /* 2523 */ MCD_OPC_CheckField, 11, 15, 0, 20, 29, // Skip to: 9973 /* 2529 */ MCD_OPC_Decode, 192, 7, 0, // Opcode: RFMCI /* 2533 */ MCD_OPC_FilterValue, 78, 10, 0, // Skip to: 2547 /* 2537 */ MCD_OPC_CheckField, 11, 15, 0, 6, 29, // Skip to: 9973 /* 2543 */ MCD_OPC_Decode, 189, 7, 0, // Opcode: RFDI /* 2547 */ MCD_OPC_FilterValue, 100, 10, 0, // Skip to: 2561 /* 2551 */ MCD_OPC_CheckField, 11, 15, 0, 248, 28, // Skip to: 9973 /* 2557 */ MCD_OPC_Decode, 190, 7, 0, // Opcode: RFI /* 2561 */ MCD_OPC_FilterValue, 102, 10, 0, // Skip to: 2575 /* 2565 */ MCD_OPC_CheckField, 11, 15, 0, 234, 28, // Skip to: 9973 /* 2571 */ MCD_OPC_Decode, 188, 7, 0, // Opcode: RFCI /* 2575 */ MCD_OPC_FilterValue, 130, 2, 4, 0, // Skip to: 2584 /* 2580 */ MCD_OPC_Decode, 235, 1, 25, // Opcode: CRANDC /* 2584 */ MCD_OPC_FilterValue, 172, 2, 10, 0, // Skip to: 2599 /* 2589 */ MCD_OPC_CheckField, 11, 15, 0, 210, 28, // Skip to: 9973 /* 2595 */ MCD_OPC_Decode, 214, 4, 0, // Opcode: ISYNC /* 2599 */ MCD_OPC_FilterValue, 130, 3, 4, 0, // Skip to: 2608 /* 2604 */ MCD_OPC_Decode, 243, 1, 25, // Opcode: CRXOR /* 2608 */ MCD_OPC_FilterValue, 194, 3, 4, 0, // Skip to: 2617 /* 2613 */ MCD_OPC_Decode, 237, 1, 25, // Opcode: CRNAND /* 2617 */ MCD_OPC_FilterValue, 130, 4, 4, 0, // Skip to: 2626 /* 2622 */ MCD_OPC_Decode, 234, 1, 25, // Opcode: CRAND /* 2626 */ MCD_OPC_FilterValue, 194, 4, 4, 0, // Skip to: 2635 /* 2631 */ MCD_OPC_Decode, 236, 1, 25, // Opcode: CREQV /* 2635 */ MCD_OPC_FilterValue, 194, 6, 4, 0, // Skip to: 2644 /* 2640 */ MCD_OPC_Decode, 240, 1, 25, // Opcode: CRORC /* 2644 */ MCD_OPC_FilterValue, 130, 7, 4, 0, // Skip to: 2653 /* 2649 */ MCD_OPC_Decode, 239, 1, 25, // Opcode: CROR /* 2653 */ MCD_OPC_FilterValue, 160, 8, 28, 0, // Skip to: 2686 /* 2658 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 2661 */ MCD_OPC_FilterValue, 0, 140, 28, // Skip to: 9973 /* 2665 */ MCD_OPC_CheckField, 16, 10, 128, 5, 10, 0, // Skip to: 2682 /* 2672 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 2682 /* 2678 */ MCD_OPC_Decode, 148, 1, 0, // Opcode: BCTR /* 2682 */ MCD_OPC_Decode, 232, 11, 24, // Opcode: gBCCTR /* 2686 */ MCD_OPC_FilterValue, 161, 8, 114, 28, // Skip to: 9973 /* 2691 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ... /* 2694 */ MCD_OPC_FilterValue, 0, 107, 28, // Skip to: 9973 /* 2698 */ MCD_OPC_CheckField, 16, 10, 128, 5, 10, 0, // Skip to: 2715 /* 2705 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 2715 /* 2711 */ MCD_OPC_Decode, 150, 1, 0, // Opcode: BCTRL /* 2715 */ MCD_OPC_Decode, 233, 11, 24, // Opcode: gBCCTRL /* 2719 */ MCD_OPC_FilterValue, 20, 19, 0, // Skip to: 2742 /* 2723 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2726 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2734 /* 2730 */ MCD_OPC_Decode, 206, 7, 26, // Opcode: RLWIMI /* 2734 */ MCD_OPC_FilterValue, 1, 67, 28, // Skip to: 9973 /* 2738 */ MCD_OPC_Decode, 209, 7, 26, // Opcode: RLWIMIo /* 2742 */ MCD_OPC_FilterValue, 21, 19, 0, // Skip to: 2765 /* 2746 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2749 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2757 /* 2753 */ MCD_OPC_Decode, 210, 7, 27, // Opcode: RLWINM /* 2757 */ MCD_OPC_FilterValue, 1, 44, 28, // Skip to: 9973 /* 2761 */ MCD_OPC_Decode, 213, 7, 27, // Opcode: RLWINMo /* 2765 */ MCD_OPC_FilterValue, 23, 19, 0, // Skip to: 2788 /* 2769 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2772 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2780 /* 2776 */ MCD_OPC_Decode, 214, 7, 28, // Opcode: RLWNM /* 2780 */ MCD_OPC_FilterValue, 1, 21, 28, // Skip to: 9973 /* 2784 */ MCD_OPC_Decode, 217, 7, 28, // Opcode: RLWNMo /* 2788 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 2806 /* 2792 */ MCD_OPC_CheckField, 0, 26, 0, 4, 0, // Skip to: 2802 /* 2798 */ MCD_OPC_Decode, 251, 5, 0, // Opcode: NOP /* 2802 */ MCD_OPC_Decode, 137, 6, 29, // Opcode: ORI /* 2806 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 2814 /* 2810 */ MCD_OPC_Decode, 139, 6, 29, // Opcode: ORIS /* 2814 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 2822 /* 2818 */ MCD_OPC_Decode, 214, 10, 29, // Opcode: XORI /* 2822 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 2830 /* 2826 */ MCD_OPC_Decode, 216, 10, 29, // Opcode: XORIS /* 2830 */ MCD_OPC_FilterValue, 28, 3, 0, // Skip to: 2837 /* 2834 */ MCD_OPC_Decode, 80, 29, // Opcode: ANDIo /* 2837 */ MCD_OPC_FilterValue, 29, 3, 0, // Skip to: 2844 /* 2841 */ MCD_OPC_Decode, 78, 29, // Opcode: ANDISo /* 2844 */ MCD_OPC_FilterValue, 30, 134, 0, // Skip to: 2982 /* 2848 */ MCD_OPC_ExtractField, 2, 3, // Inst{4-2} ... /* 2851 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 2874 /* 2855 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2858 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2866 /* 2862 */ MCD_OPC_Decode, 198, 7, 30, // Opcode: RLDICL /* 2866 */ MCD_OPC_FilterValue, 1, 191, 27, // Skip to: 9973 /* 2870 */ MCD_OPC_Decode, 200, 7, 30, // Opcode: RLDICLo /* 2874 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 2897 /* 2878 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2881 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2889 /* 2885 */ MCD_OPC_Decode, 201, 7, 30, // Opcode: RLDICR /* 2889 */ MCD_OPC_FilterValue, 1, 168, 27, // Skip to: 9973 /* 2893 */ MCD_OPC_Decode, 202, 7, 30, // Opcode: RLDICRo /* 2897 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 2920 /* 2901 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2904 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2912 /* 2908 */ MCD_OPC_Decode, 197, 7, 30, // Opcode: RLDIC /* 2912 */ MCD_OPC_FilterValue, 1, 145, 27, // Skip to: 9973 /* 2916 */ MCD_OPC_Decode, 203, 7, 30, // Opcode: RLDICo /* 2920 */ MCD_OPC_FilterValue, 3, 19, 0, // Skip to: 2943 /* 2924 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 2927 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2935 /* 2931 */ MCD_OPC_Decode, 204, 7, 31, // Opcode: RLDIMI /* 2935 */ MCD_OPC_FilterValue, 1, 122, 27, // Skip to: 9973 /* 2939 */ MCD_OPC_Decode, 205, 7, 31, // Opcode: RLDIMIo /* 2943 */ MCD_OPC_FilterValue, 4, 114, 27, // Skip to: 9973 /* 2947 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 2950 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2958 /* 2954 */ MCD_OPC_Decode, 193, 7, 32, // Opcode: RLDCL /* 2958 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2966 /* 2962 */ MCD_OPC_Decode, 194, 7, 32, // Opcode: RLDCLo /* 2966 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 2974 /* 2970 */ MCD_OPC_Decode, 195, 7, 32, // Opcode: RLDCR /* 2974 */ MCD_OPC_FilterValue, 3, 83, 27, // Skip to: 9973 /* 2978 */ MCD_OPC_Decode, 196, 7, 32, // Opcode: RLDCRo /* 2982 */ MCD_OPC_FilterValue, 31, 179, 12, // Skip to: 6237 /* 2986 */ MCD_OPC_ExtractField, 2, 4, // Inst{5-2} ... /* 2989 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 3066 /* 2993 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 2996 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 3031 /* 3000 */ MCD_OPC_ExtractField, 21, 2, // Inst{22-21} ... /* 3003 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 3017 /* 3007 */ MCD_OPC_CheckField, 0, 2, 0, 48, 27, // Skip to: 9973 /* 3013 */ MCD_OPC_Decode, 224, 1, 33, // Opcode: CMPW /* 3017 */ MCD_OPC_FilterValue, 1, 40, 27, // Skip to: 9973 /* 3021 */ MCD_OPC_CheckField, 0, 2, 0, 34, 27, // Skip to: 9973 /* 3027 */ MCD_OPC_Decode, 218, 1, 34, // Opcode: CMPD /* 3031 */ MCD_OPC_FilterValue, 1, 26, 27, // Skip to: 9973 /* 3035 */ MCD_OPC_ExtractField, 21, 2, // Inst{22-21} ... /* 3038 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 3052 /* 3042 */ MCD_OPC_CheckField, 0, 2, 0, 13, 27, // Skip to: 9973 /* 3048 */ MCD_OPC_Decode, 222, 1, 33, // Opcode: CMPLW /* 3052 */ MCD_OPC_FilterValue, 1, 5, 27, // Skip to: 9973 /* 3056 */ MCD_OPC_CheckField, 0, 2, 0, 255, 26, // Skip to: 9973 /* 3062 */ MCD_OPC_Decode, 220, 1, 34, // Opcode: CMPLD /* 3066 */ MCD_OPC_FilterValue, 1, 65, 0, // Skip to: 3135 /* 3070 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3073 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 3093 /* 3077 */ MCD_OPC_CheckField, 16, 1, 0, 234, 26, // Skip to: 9973 /* 3083 */ MCD_OPC_CheckField, 1, 1, 1, 228, 26, // Skip to: 9973 /* 3089 */ MCD_OPC_Decode, 209, 10, 35, // Opcode: WRTEE /* 3093 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 3107 /* 3097 */ MCD_OPC_CheckField, 1, 1, 1, 214, 26, // Skip to: 9973 /* 3103 */ MCD_OPC_Decode, 210, 10, 36, // Opcode: WRTEEI /* 3107 */ MCD_OPC_FilterValue, 10, 10, 0, // Skip to: 3121 /* 3111 */ MCD_OPC_CheckField, 0, 2, 2, 200, 26, // Skip to: 9973 /* 3117 */ MCD_OPC_Decode, 183, 5, 37, // Opcode: MFDCR /* 3121 */ MCD_OPC_FilterValue, 14, 192, 26, // Skip to: 9973 /* 3125 */ MCD_OPC_CheckField, 0, 2, 2, 186, 26, // Skip to: 9973 /* 3131 */ MCD_OPC_Decode, 206, 5, 37, // Opcode: MTDCR /* 3135 */ MCD_OPC_FilterValue, 2, 44, 0, // Skip to: 3183 /* 3139 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3142 */ MCD_OPC_FilterValue, 0, 23, 0, // Skip to: 3169 /* 3146 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3149 */ MCD_OPC_FilterValue, 0, 164, 26, // Skip to: 9973 /* 3153 */ MCD_OPC_CheckField, 11, 15, 128, 248, 1, 4, 0, // Skip to: 3165 /* 3161 */ MCD_OPC_Decode, 134, 9, 0, // Opcode: TRAP /* 3165 */ MCD_OPC_Decode, 135, 9, 38, // Opcode: TW /* 3169 */ MCD_OPC_FilterValue, 2, 144, 26, // Skip to: 9973 /* 3173 */ MCD_OPC_CheckField, 0, 2, 0, 138, 26, // Skip to: 9973 /* 3179 */ MCD_OPC_Decode, 246, 8, 39, // Opcode: TD /* 3183 */ MCD_OPC_FilterValue, 3, 201, 0, // Skip to: 3388 /* 3187 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3190 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 3213 /* 3194 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3197 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 3205 /* 3201 */ MCD_OPC_Decode, 150, 5, 40, // Opcode: LVSL /* 3205 */ MCD_OPC_FilterValue, 2, 108, 26, // Skip to: 9973 /* 3209 */ MCD_OPC_Decode, 147, 5, 40, // Opcode: LVEBX /* 3213 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 3236 /* 3217 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3220 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 3228 /* 3224 */ MCD_OPC_Decode, 151, 5, 40, // Opcode: LVSR /* 3228 */ MCD_OPC_FilterValue, 2, 85, 26, // Skip to: 9973 /* 3232 */ MCD_OPC_Decode, 148, 5, 40, // Opcode: LVEHX /* 3236 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 3250 /* 3240 */ MCD_OPC_CheckField, 0, 2, 2, 71, 26, // Skip to: 9973 /* 3246 */ MCD_OPC_Decode, 149, 5, 40, // Opcode: LVEWX /* 3250 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 3264 /* 3254 */ MCD_OPC_CheckField, 0, 2, 2, 57, 26, // Skip to: 9973 /* 3260 */ MCD_OPC_Decode, 152, 5, 40, // Opcode: LVX /* 3264 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 3278 /* 3268 */ MCD_OPC_CheckField, 0, 2, 2, 43, 26, // Skip to: 9973 /* 3274 */ MCD_OPC_Decode, 188, 8, 40, // Opcode: STVEBX /* 3278 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 3292 /* 3282 */ MCD_OPC_CheckField, 0, 2, 2, 29, 26, // Skip to: 9973 /* 3288 */ MCD_OPC_Decode, 189, 8, 40, // Opcode: STVEHX /* 3292 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 3306 /* 3296 */ MCD_OPC_CheckField, 0, 2, 2, 15, 26, // Skip to: 9973 /* 3302 */ MCD_OPC_Decode, 190, 8, 40, // Opcode: STVEWX /* 3306 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 3320 /* 3310 */ MCD_OPC_CheckField, 0, 2, 2, 1, 26, // Skip to: 9973 /* 3316 */ MCD_OPC_Decode, 191, 8, 40, // Opcode: STVX /* 3320 */ MCD_OPC_FilterValue, 11, 10, 0, // Skip to: 3334 /* 3324 */ MCD_OPC_CheckField, 0, 2, 2, 243, 25, // Skip to: 9973 /* 3330 */ MCD_OPC_Decode, 153, 5, 40, // Opcode: LVXL /* 3334 */ MCD_OPC_FilterValue, 14, 16, 0, // Skip to: 3354 /* 3338 */ MCD_OPC_CheckField, 21, 5, 0, 229, 25, // Skip to: 9973 /* 3344 */ MCD_OPC_CheckField, 0, 2, 0, 223, 25, // Skip to: 9973 /* 3350 */ MCD_OPC_Decode, 252, 1, 41, // Opcode: DCCCI /* 3354 */ MCD_OPC_FilterValue, 15, 10, 0, // Skip to: 3368 /* 3358 */ MCD_OPC_CheckField, 0, 2, 2, 209, 25, // Skip to: 9973 /* 3364 */ MCD_OPC_Decode, 192, 8, 40, // Opcode: STVXL /* 3368 */ MCD_OPC_FilterValue, 30, 201, 25, // Skip to: 9973 /* 3372 */ MCD_OPC_CheckField, 21, 5, 0, 195, 25, // Skip to: 9973 /* 3378 */ MCD_OPC_CheckField, 0, 2, 0, 189, 25, // Skip to: 9973 /* 3384 */ MCD_OPC_Decode, 205, 4, 41, // Opcode: ICCCI /* 3388 */ MCD_OPC_FilterValue, 4, 22, 1, // Skip to: 3670 /* 3392 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3395 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 3434 /* 3399 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3402 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 3410 /* 3406 */ MCD_OPC_Decode, 210, 8, 42, // Opcode: SUBFC /* 3410 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 3418 /* 3414 */ MCD_OPC_Decode, 213, 8, 42, // Opcode: SUBFCo /* 3418 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3426 /* 3422 */ MCD_OPC_Decode, 227, 5, 43, // Opcode: MULHDU /* 3426 */ MCD_OPC_FilterValue, 3, 143, 25, // Skip to: 9973 /* 3430 */ MCD_OPC_Decode, 228, 5, 43, // Opcode: MULHDUo /* 3434 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 3457 /* 3438 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3441 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 3449 /* 3445 */ MCD_OPC_Decode, 207, 8, 42, // Opcode: SUBF /* 3449 */ MCD_OPC_FilterValue, 1, 120, 25, // Skip to: 9973 /* 3453 */ MCD_OPC_Decode, 228, 8, 42, // Opcode: SUBFo /* 3457 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 3480 /* 3461 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3464 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3472 /* 3468 */ MCD_OPC_Decode, 226, 5, 43, // Opcode: MULHD /* 3472 */ MCD_OPC_FilterValue, 3, 97, 25, // Skip to: 9973 /* 3476 */ MCD_OPC_Decode, 229, 5, 43, // Opcode: MULHDo /* 3480 */ MCD_OPC_FilterValue, 3, 31, 0, // Skip to: 3515 /* 3484 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3487 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 3501 /* 3491 */ MCD_OPC_CheckField, 11, 5, 0, 76, 25, // Skip to: 9973 /* 3497 */ MCD_OPC_Decode, 247, 5, 44, // Opcode: NEG /* 3501 */ MCD_OPC_FilterValue, 1, 68, 25, // Skip to: 9973 /* 3505 */ MCD_OPC_CheckField, 11, 5, 0, 62, 25, // Skip to: 9973 /* 3511 */ MCD_OPC_Decode, 250, 5, 44, // Opcode: NEGo /* 3515 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 3538 /* 3519 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3522 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 3530 /* 3526 */ MCD_OPC_Decode, 214, 8, 42, // Opcode: SUBFE /* 3530 */ MCD_OPC_FilterValue, 1, 39, 25, // Skip to: 9973 /* 3534 */ MCD_OPC_Decode, 217, 8, 42, // Opcode: SUBFEo /* 3538 */ MCD_OPC_FilterValue, 6, 31, 0, // Skip to: 3573 /* 3542 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3545 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 3559 /* 3549 */ MCD_OPC_CheckField, 11, 5, 0, 18, 25, // Skip to: 9973 /* 3555 */ MCD_OPC_Decode, 224, 8, 44, // Opcode: SUBFZE /* 3559 */ MCD_OPC_FilterValue, 1, 10, 25, // Skip to: 9973 /* 3563 */ MCD_OPC_CheckField, 11, 5, 0, 4, 25, // Skip to: 9973 /* 3569 */ MCD_OPC_Decode, 227, 8, 44, // Opcode: SUBFZEo /* 3573 */ MCD_OPC_FilterValue, 7, 47, 0, // Skip to: 3624 /* 3577 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3580 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 3594 /* 3584 */ MCD_OPC_CheckField, 11, 5, 0, 239, 24, // Skip to: 9973 /* 3590 */ MCD_OPC_Decode, 220, 8, 44, // Opcode: SUBFME /* 3594 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 3608 /* 3598 */ MCD_OPC_CheckField, 11, 5, 0, 225, 24, // Skip to: 9973 /* 3604 */ MCD_OPC_Decode, 223, 8, 44, // Opcode: SUBFMEo /* 3608 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3616 /* 3612 */ MCD_OPC_Decode, 234, 5, 43, // Opcode: MULLD /* 3616 */ MCD_OPC_FilterValue, 3, 209, 24, // Skip to: 9973 /* 3620 */ MCD_OPC_Decode, 235, 5, 43, // Opcode: MULLDo /* 3624 */ MCD_OPC_FilterValue, 14, 19, 0, // Skip to: 3647 /* 3628 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3631 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3639 /* 3635 */ MCD_OPC_Decode, 254, 1, 43, // Opcode: DIVDU /* 3639 */ MCD_OPC_FilterValue, 3, 186, 24, // Skip to: 9973 /* 3643 */ MCD_OPC_Decode, 255, 1, 43, // Opcode: DIVDUo /* 3647 */ MCD_OPC_FilterValue, 15, 178, 24, // Skip to: 9973 /* 3651 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3654 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3662 /* 3658 */ MCD_OPC_Decode, 253, 1, 43, // Opcode: DIVD /* 3662 */ MCD_OPC_FilterValue, 3, 163, 24, // Skip to: 9973 /* 3666 */ MCD_OPC_Decode, 128, 2, 43, // Opcode: DIVDo /* 3670 */ MCD_OPC_FilterValue, 5, 233, 0, // Skip to: 3907 /* 3674 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3677 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 3714 /* 3681 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3684 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 3691 /* 3688 */ MCD_OPC_Decode, 29, 42, // Opcode: ADDC /* 3691 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 3698 /* 3695 */ MCD_OPC_Decode, 32, 42, // Opcode: ADDCo /* 3698 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3706 /* 3702 */ MCD_OPC_Decode, 231, 5, 42, // Opcode: MULHWU /* 3706 */ MCD_OPC_FilterValue, 3, 119, 24, // Skip to: 9973 /* 3710 */ MCD_OPC_Decode, 232, 5, 42, // Opcode: MULHWUo /* 3714 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 3737 /* 3718 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3721 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3729 /* 3725 */ MCD_OPC_Decode, 230, 5, 42, // Opcode: MULHW /* 3729 */ MCD_OPC_FilterValue, 3, 96, 24, // Skip to: 9973 /* 3733 */ MCD_OPC_Decode, 233, 5, 42, // Opcode: MULHWo /* 3737 */ MCD_OPC_FilterValue, 4, 17, 0, // Skip to: 3758 /* 3741 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3744 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 3751 /* 3748 */ MCD_OPC_Decode, 33, 42, // Opcode: ADDE /* 3751 */ MCD_OPC_FilterValue, 1, 74, 24, // Skip to: 9973 /* 3755 */ MCD_OPC_Decode, 36, 42, // Opcode: ADDEo /* 3758 */ MCD_OPC_FilterValue, 6, 29, 0, // Skip to: 3791 /* 3762 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3765 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 3778 /* 3769 */ MCD_OPC_CheckField, 11, 5, 0, 54, 24, // Skip to: 9973 /* 3775 */ MCD_OPC_Decode, 65, 44, // Opcode: ADDZE /* 3778 */ MCD_OPC_FilterValue, 1, 47, 24, // Skip to: 9973 /* 3782 */ MCD_OPC_CheckField, 11, 5, 0, 41, 24, // Skip to: 9973 /* 3788 */ MCD_OPC_Decode, 68, 44, // Opcode: ADDZEo /* 3791 */ MCD_OPC_FilterValue, 7, 45, 0, // Skip to: 3840 /* 3795 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3798 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 3811 /* 3802 */ MCD_OPC_CheckField, 11, 5, 0, 21, 24, // Skip to: 9973 /* 3808 */ MCD_OPC_Decode, 61, 44, // Opcode: ADDME /* 3811 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 3824 /* 3815 */ MCD_OPC_CheckField, 11, 5, 0, 8, 24, // Skip to: 9973 /* 3821 */ MCD_OPC_Decode, 64, 44, // Opcode: ADDMEo /* 3824 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3832 /* 3828 */ MCD_OPC_Decode, 238, 5, 42, // Opcode: MULLW /* 3832 */ MCD_OPC_FilterValue, 3, 249, 23, // Skip to: 9973 /* 3836 */ MCD_OPC_Decode, 239, 5, 42, // Opcode: MULLWo /* 3840 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 3861 /* 3844 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3847 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 3854 /* 3851 */ MCD_OPC_Decode, 22, 42, // Opcode: ADD4 /* 3854 */ MCD_OPC_FilterValue, 1, 227, 23, // Skip to: 9973 /* 3858 */ MCD_OPC_Decode, 24, 42, // Opcode: ADD4o /* 3861 */ MCD_OPC_FilterValue, 14, 19, 0, // Skip to: 3884 /* 3865 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3868 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3876 /* 3872 */ MCD_OPC_Decode, 130, 2, 42, // Opcode: DIVWU /* 3876 */ MCD_OPC_FilterValue, 3, 205, 23, // Skip to: 9973 /* 3880 */ MCD_OPC_Decode, 131, 2, 42, // Opcode: DIVWUo /* 3884 */ MCD_OPC_FilterValue, 15, 197, 23, // Skip to: 9973 /* 3888 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 3891 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 3899 /* 3895 */ MCD_OPC_Decode, 129, 2, 42, // Opcode: DIVW /* 3899 */ MCD_OPC_FilterValue, 3, 182, 23, // Skip to: 9973 /* 3903 */ MCD_OPC_Decode, 132, 2, 42, // Opcode: DIVWo /* 3907 */ MCD_OPC_FilterValue, 6, 101, 0, // Skip to: 4012 /* 3911 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 3914 */ MCD_OPC_FilterValue, 10, 10, 0, // Skip to: 3928 /* 3918 */ MCD_OPC_CheckField, 1, 1, 0, 161, 23, // Skip to: 9973 /* 3924 */ MCD_OPC_Decode, 174, 5, 45, // Opcode: LXVDSX /* 3928 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 3942 /* 3932 */ MCD_OPC_CheckField, 1, 1, 0, 147, 23, // Skip to: 9973 /* 3938 */ MCD_OPC_Decode, 172, 5, 46, // Opcode: LXSDX /* 3942 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 3956 /* 3946 */ MCD_OPC_CheckField, 1, 1, 0, 133, 23, // Skip to: 9973 /* 3952 */ MCD_OPC_Decode, 204, 8, 46, // Opcode: STXSDX /* 3956 */ MCD_OPC_FilterValue, 24, 10, 0, // Skip to: 3970 /* 3960 */ MCD_OPC_CheckField, 1, 1, 0, 119, 23, // Skip to: 9973 /* 3966 */ MCD_OPC_Decode, 175, 5, 45, // Opcode: LXVW4X /* 3970 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 3984 /* 3974 */ MCD_OPC_CheckField, 1, 1, 0, 105, 23, // Skip to: 9973 /* 3980 */ MCD_OPC_Decode, 173, 5, 45, // Opcode: LXVD2X /* 3984 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 3998 /* 3988 */ MCD_OPC_CheckField, 1, 1, 0, 91, 23, // Skip to: 9973 /* 3994 */ MCD_OPC_Decode, 206, 8, 45, // Opcode: STXVW4X /* 3998 */ MCD_OPC_FilterValue, 30, 83, 23, // Skip to: 9973 /* 4002 */ MCD_OPC_CheckField, 1, 1, 0, 77, 23, // Skip to: 9973 /* 4008 */ MCD_OPC_Decode, 205, 8, 45, // Opcode: STXVD2X /* 4012 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 4026 /* 4016 */ MCD_OPC_CheckField, 0, 2, 2, 63, 23, // Skip to: 9973 /* 4022 */ MCD_OPC_Decode, 212, 4, 47, // Opcode: ISEL /* 4026 */ MCD_OPC_FilterValue, 8, 43, 0, // Skip to: 4073 /* 4030 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4033 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 4053 /* 4037 */ MCD_OPC_CheckField, 6, 6, 4, 42, 23, // Skip to: 9973 /* 4043 */ MCD_OPC_CheckField, 0, 2, 0, 36, 23, // Skip to: 9973 /* 4049 */ MCD_OPC_Decode, 200, 5, 48, // Opcode: MTCRF /* 4053 */ MCD_OPC_FilterValue, 1, 28, 23, // Skip to: 9973 /* 4057 */ MCD_OPC_CheckField, 6, 6, 4, 22, 23, // Skip to: 9973 /* 4063 */ MCD_OPC_CheckField, 0, 2, 0, 16, 23, // Skip to: 9973 /* 4069 */ MCD_OPC_Decode, 218, 5, 49, // Opcode: MTOCRF /* 4073 */ MCD_OPC_FilterValue, 9, 246, 1, // Skip to: 4579 /* 4077 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 4080 */ MCD_OPC_FilterValue, 0, 43, 0, // Skip to: 4127 /* 4084 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 4087 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 4107 /* 4091 */ MCD_OPC_CheckField, 11, 9, 0, 244, 22, // Skip to: 9973 /* 4097 */ MCD_OPC_CheckField, 0, 2, 2, 238, 22, // Skip to: 9973 /* 4103 */ MCD_OPC_Decode, 179, 5, 35, // Opcode: MFCR /* 4107 */ MCD_OPC_FilterValue, 1, 230, 22, // Skip to: 9973 /* 4111 */ MCD_OPC_CheckField, 11, 1, 0, 224, 22, // Skip to: 9973 /* 4117 */ MCD_OPC_CheckField, 0, 2, 2, 218, 22, // Skip to: 9973 /* 4123 */ MCD_OPC_Decode, 189, 5, 50, // Opcode: MFOCRF /* 4127 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 4147 /* 4131 */ MCD_OPC_CheckField, 11, 10, 0, 204, 22, // Skip to: 9973 /* 4137 */ MCD_OPC_CheckField, 0, 2, 2, 198, 22, // Skip to: 9973 /* 4143 */ MCD_OPC_Decode, 188, 5, 35, // Opcode: MFMSR /* 4147 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 4161 /* 4151 */ MCD_OPC_CheckField, 1, 1, 0, 184, 22, // Skip to: 9973 /* 4157 */ MCD_OPC_Decode, 216, 5, 51, // Opcode: MTMSR /* 4161 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 4175 /* 4165 */ MCD_OPC_CheckField, 1, 1, 0, 170, 22, // Skip to: 9973 /* 4171 */ MCD_OPC_Decode, 217, 5, 51, // Opcode: MTMSRD /* 4175 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 4189 /* 4179 */ MCD_OPC_CheckField, 1, 1, 0, 156, 22, // Skip to: 9973 /* 4185 */ MCD_OPC_Decode, 221, 5, 52, // Opcode: MTSR /* 4189 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 4203 /* 4193 */ MCD_OPC_CheckField, 1, 1, 0, 142, 22, // Skip to: 9973 /* 4199 */ MCD_OPC_Decode, 222, 5, 53, // Opcode: MTSRIN /* 4203 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 4223 /* 4207 */ MCD_OPC_CheckField, 16, 10, 0, 128, 22, // Skip to: 9973 /* 4213 */ MCD_OPC_CheckField, 0, 2, 0, 122, 22, // Skip to: 9973 /* 4219 */ MCD_OPC_Decode, 250, 8, 54, // Opcode: TLBIEL /* 4223 */ MCD_OPC_FilterValue, 9, 16, 0, // Skip to: 4243 /* 4227 */ MCD_OPC_CheckField, 16, 5, 0, 108, 22, // Skip to: 9973 /* 4233 */ MCD_OPC_CheckField, 0, 2, 0, 102, 22, // Skip to: 9973 /* 4239 */ MCD_OPC_Decode, 249, 8, 53, // Opcode: TLBIE /* 4243 */ MCD_OPC_FilterValue, 10, 32, 0, // Skip to: 4279 /* 4247 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4250 */ MCD_OPC_FilterValue, 2, 87, 22, // Skip to: 9973 /* 4254 */ MCD_OPC_ExtractField, 11, 10, // Inst{20-11} ... /* 4257 */ MCD_OPC_FilterValue, 128, 2, 4, 0, // Skip to: 4266 /* 4262 */ MCD_OPC_Decode, 186, 5, 35, // Opcode: MFLR /* 4266 */ MCD_OPC_FilterValue, 160, 2, 4, 0, // Skip to: 4275 /* 4271 */ MCD_OPC_Decode, 181, 5, 35, // Opcode: MFCTR /* 4275 */ MCD_OPC_Decode, 191, 5, 37, // Opcode: MFSPR /* 4279 */ MCD_OPC_FilterValue, 11, 25, 0, // Skip to: 4308 /* 4283 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4286 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 4300 /* 4290 */ MCD_OPC_CheckField, 11, 15, 0, 45, 22, // Skip to: 9973 /* 4296 */ MCD_OPC_Decode, 248, 8, 0, // Opcode: TLBIA /* 4300 */ MCD_OPC_FilterValue, 2, 37, 22, // Skip to: 9973 /* 4304 */ MCD_OPC_Decode, 194, 5, 37, // Opcode: MFTB /* 4308 */ MCD_OPC_FilterValue, 12, 16, 0, // Skip to: 4328 /* 4312 */ MCD_OPC_CheckField, 16, 5, 0, 23, 22, // Skip to: 9973 /* 4318 */ MCD_OPC_CheckField, 0, 2, 0, 17, 22, // Skip to: 9973 /* 4324 */ MCD_OPC_Decode, 247, 7, 53, // Opcode: SLBMTE /* 4328 */ MCD_OPC_FilterValue, 13, 16, 0, // Skip to: 4348 /* 4332 */ MCD_OPC_CheckField, 16, 10, 0, 3, 22, // Skip to: 9973 /* 4338 */ MCD_OPC_CheckField, 0, 2, 0, 253, 21, // Skip to: 9973 /* 4344 */ MCD_OPC_Decode, 245, 7, 54, // Opcode: SLBIE /* 4348 */ MCD_OPC_FilterValue, 14, 32, 0, // Skip to: 4384 /* 4352 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4355 */ MCD_OPC_FilterValue, 2, 238, 21, // Skip to: 9973 /* 4359 */ MCD_OPC_ExtractField, 11, 10, // Inst{20-11} ... /* 4362 */ MCD_OPC_FilterValue, 128, 2, 4, 0, // Skip to: 4371 /* 4367 */ MCD_OPC_Decode, 214, 5, 35, // Opcode: MTLR /* 4371 */ MCD_OPC_FilterValue, 160, 2, 4, 0, // Skip to: 4380 /* 4376 */ MCD_OPC_Decode, 202, 5, 35, // Opcode: MTCTR /* 4380 */ MCD_OPC_Decode, 220, 5, 55, // Opcode: MTSPR /* 4384 */ MCD_OPC_FilterValue, 15, 16, 0, // Skip to: 4404 /* 4388 */ MCD_OPC_CheckField, 11, 15, 0, 203, 21, // Skip to: 9973 /* 4394 */ MCD_OPC_CheckField, 0, 2, 0, 197, 21, // Skip to: 9973 /* 4400 */ MCD_OPC_Decode, 244, 7, 0, // Opcode: SLBIA /* 4404 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 4418 /* 4408 */ MCD_OPC_CheckField, 1, 1, 1, 183, 21, // Skip to: 9973 /* 4414 */ MCD_OPC_Decode, 192, 5, 52, // Opcode: MFSR /* 4418 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 4432 /* 4422 */ MCD_OPC_CheckField, 1, 1, 1, 169, 21, // Skip to: 9973 /* 4428 */ MCD_OPC_Decode, 193, 5, 53, // Opcode: MFSRIN /* 4432 */ MCD_OPC_FilterValue, 24, 16, 0, // Skip to: 4452 /* 4436 */ MCD_OPC_CheckField, 21, 5, 0, 155, 21, // Skip to: 9973 /* 4442 */ MCD_OPC_CheckField, 0, 2, 0, 149, 21, // Skip to: 9973 /* 4448 */ MCD_OPC_Decode, 251, 8, 41, // Opcode: TLBIVAX /* 4452 */ MCD_OPC_FilterValue, 28, 43, 0, // Skip to: 4499 /* 4456 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4459 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4477 /* 4463 */ MCD_OPC_CheckField, 21, 5, 0, 4, 0, // Skip to: 4473 /* 4469 */ MCD_OPC_Decode, 128, 9, 41, // Opcode: TLBSX /* 4473 */ MCD_OPC_Decode, 129, 9, 42, // Opcode: TLBSX2 /* 4477 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 4485 /* 4481 */ MCD_OPC_Decode, 130, 9, 42, // Opcode: TLBSX2D /* 4485 */ MCD_OPC_FilterValue, 2, 108, 21, // Skip to: 9973 /* 4489 */ MCD_OPC_CheckField, 16, 5, 0, 102, 21, // Skip to: 9973 /* 4495 */ MCD_OPC_Decode, 246, 7, 53, // Opcode: SLBMFEE /* 4499 */ MCD_OPC_FilterValue, 29, 21, 0, // Skip to: 4524 /* 4503 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4506 */ MCD_OPC_FilterValue, 0, 87, 21, // Skip to: 9973 /* 4510 */ MCD_OPC_CheckField, 11, 15, 0, 4, 0, // Skip to: 4520 /* 4516 */ MCD_OPC_Decode, 254, 8, 0, // Opcode: TLBRE /* 4520 */ MCD_OPC_Decode, 255, 8, 56, // Opcode: TLBRE2 /* 4524 */ MCD_OPC_FilterValue, 30, 31, 0, // Skip to: 4559 /* 4528 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4531 */ MCD_OPC_FilterValue, 0, 62, 21, // Skip to: 9973 /* 4535 */ MCD_OPC_CheckField, 11, 15, 0, 4, 0, // Skip to: 4545 /* 4541 */ MCD_OPC_Decode, 132, 9, 0, // Opcode: TLBWE /* 4545 */ MCD_OPC_CheckField, 16, 10, 0, 4, 0, // Skip to: 4555 /* 4551 */ MCD_OPC_Decode, 252, 8, 54, // Opcode: TLBLD /* 4555 */ MCD_OPC_Decode, 133, 9, 56, // Opcode: TLBWE2 /* 4559 */ MCD_OPC_FilterValue, 31, 34, 21, // Skip to: 9973 /* 4563 */ MCD_OPC_CheckField, 16, 10, 0, 28, 21, // Skip to: 9973 /* 4569 */ MCD_OPC_CheckField, 0, 2, 0, 22, 21, // Skip to: 9973 /* 4575 */ MCD_OPC_Decode, 253, 8, 54, // Opcode: TLBLI /* 4579 */ MCD_OPC_FilterValue, 10, 22, 1, // Skip to: 4861 /* 4583 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 4586 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 4609 /* 4590 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4593 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 4601 /* 4597 */ MCD_OPC_Decode, 155, 5, 57, // Opcode: LWARX /* 4601 */ MCD_OPC_FilterValue, 2, 248, 20, // Skip to: 9973 /* 4605 */ MCD_OPC_Decode, 232, 4, 58, // Opcode: LDX /* 4609 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 4623 /* 4613 */ MCD_OPC_CheckField, 0, 2, 2, 234, 20, // Skip to: 9973 /* 4619 */ MCD_OPC_Decode, 231, 4, 59, // Opcode: LDUX /* 4623 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 4637 /* 4627 */ MCD_OPC_CheckField, 0, 2, 0, 220, 20, // Skip to: 9973 /* 4633 */ MCD_OPC_Decode, 227, 4, 58, // Opcode: LDARX /* 4637 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 4651 /* 4641 */ MCD_OPC_CheckField, 0, 2, 2, 206, 20, // Skip to: 9973 /* 4647 */ MCD_OPC_Decode, 166, 8, 58, // Opcode: STDX /* 4651 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 4665 /* 4655 */ MCD_OPC_CheckField, 0, 2, 2, 192, 20, // Skip to: 9973 /* 4661 */ MCD_OPC_Decode, 165, 8, 60, // Opcode: STDUX /* 4665 */ MCD_OPC_FilterValue, 10, 10, 0, // Skip to: 4679 /* 4669 */ MCD_OPC_CheckField, 0, 2, 2, 178, 20, // Skip to: 9973 /* 4675 */ MCD_OPC_Decode, 157, 5, 58, // Opcode: LWAX /* 4679 */ MCD_OPC_FilterValue, 11, 10, 0, // Skip to: 4693 /* 4683 */ MCD_OPC_CheckField, 0, 2, 2, 164, 20, // Skip to: 9973 /* 4689 */ MCD_OPC_Decode, 156, 5, 59, // Opcode: LWAUX /* 4693 */ MCD_OPC_FilterValue, 16, 10, 0, // Skip to: 4707 /* 4697 */ MCD_OPC_CheckField, 0, 2, 0, 150, 20, // Skip to: 9973 /* 4703 */ MCD_OPC_Decode, 228, 4, 58, // Opcode: LDBRX /* 4707 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 4721 /* 4711 */ MCD_OPC_CheckField, 0, 2, 2, 136, 20, // Skip to: 9973 /* 4717 */ MCD_OPC_Decode, 146, 5, 61, // Opcode: LSWI /* 4721 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 4735 /* 4725 */ MCD_OPC_CheckField, 0, 2, 0, 122, 20, // Skip to: 9973 /* 4731 */ MCD_OPC_Decode, 161, 8, 58, // Opcode: STDBRX /* 4735 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 4749 /* 4739 */ MCD_OPC_CheckField, 0, 2, 2, 108, 20, // Skip to: 9973 /* 4745 */ MCD_OPC_Decode, 187, 8, 61, // Opcode: STSWI /* 4749 */ MCD_OPC_FilterValue, 24, 10, 0, // Skip to: 4763 /* 4753 */ MCD_OPC_CheckField, 0, 2, 2, 94, 20, // Skip to: 9973 /* 4759 */ MCD_OPC_Decode, 164, 5, 42, // Opcode: LWZCIX /* 4763 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 4777 /* 4767 */ MCD_OPC_CheckField, 0, 2, 2, 80, 20, // Skip to: 9973 /* 4773 */ MCD_OPC_Decode, 134, 5, 42, // Opcode: LHZCIX /* 4777 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 4791 /* 4781 */ MCD_OPC_CheckField, 0, 2, 2, 66, 20, // Skip to: 9973 /* 4787 */ MCD_OPC_Decode, 219, 4, 42, // Opcode: LBZCIX /* 4791 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 4805 /* 4795 */ MCD_OPC_CheckField, 0, 2, 2, 52, 20, // Skip to: 9973 /* 4801 */ MCD_OPC_Decode, 229, 4, 42, // Opcode: LDCIX /* 4805 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 4819 /* 4809 */ MCD_OPC_CheckField, 0, 2, 2, 38, 20, // Skip to: 9973 /* 4815 */ MCD_OPC_Decode, 196, 8, 42, // Opcode: STWCIX /* 4819 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 4833 /* 4823 */ MCD_OPC_CheckField, 0, 2, 2, 24, 20, // Skip to: 9973 /* 4829 */ MCD_OPC_Decode, 179, 8, 42, // Opcode: STHCIX /* 4833 */ MCD_OPC_FilterValue, 30, 10, 0, // Skip to: 4847 /* 4837 */ MCD_OPC_CheckField, 0, 2, 2, 10, 20, // Skip to: 9973 /* 4843 */ MCD_OPC_Decode, 153, 8, 42, // Opcode: STBCIX /* 4847 */ MCD_OPC_FilterValue, 31, 2, 20, // Skip to: 9973 /* 4851 */ MCD_OPC_CheckField, 0, 2, 2, 252, 19, // Skip to: 9973 /* 4857 */ MCD_OPC_Decode, 162, 8, 42, // Opcode: STDCIX /* 4861 */ MCD_OPC_FilterValue, 11, 227, 2, // Skip to: 5604 /* 4865 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 4868 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 4897 /* 4872 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4875 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 4889 /* 4879 */ MCD_OPC_CheckField, 25, 1, 0, 224, 19, // Skip to: 9973 /* 4885 */ MCD_OPC_Decode, 204, 4, 62, // Opcode: ICBT /* 4889 */ MCD_OPC_FilterValue, 2, 216, 19, // Skip to: 9973 /* 4893 */ MCD_OPC_Decode, 169, 5, 57, // Opcode: LWZX /* 4897 */ MCD_OPC_FilterValue, 1, 25, 0, // Skip to: 4926 /* 4901 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4904 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 4918 /* 4908 */ MCD_OPC_CheckField, 21, 5, 0, 195, 19, // Skip to: 9973 /* 4914 */ MCD_OPC_Decode, 247, 1, 63, // Opcode: DCBST /* 4918 */ MCD_OPC_FilterValue, 2, 187, 19, // Skip to: 9973 /* 4922 */ MCD_OPC_Decode, 167, 5, 64, // Opcode: LWZUX /* 4926 */ MCD_OPC_FilterValue, 2, 25, 0, // Skip to: 4955 /* 4930 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4933 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 4947 /* 4937 */ MCD_OPC_CheckField, 21, 5, 0, 166, 19, // Skip to: 9973 /* 4943 */ MCD_OPC_Decode, 245, 1, 63, // Opcode: DCBF /* 4947 */ MCD_OPC_FilterValue, 2, 158, 19, // Skip to: 9973 /* 4951 */ MCD_OPC_Decode, 224, 4, 57, // Opcode: LBZX /* 4955 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 4969 /* 4959 */ MCD_OPC_CheckField, 0, 2, 2, 144, 19, // Skip to: 9973 /* 4965 */ MCD_OPC_Decode, 222, 4, 64, // Opcode: LBZUX /* 4969 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 4992 /* 4973 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 4976 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 4984 /* 4980 */ MCD_OPC_Decode, 197, 8, 57, // Opcode: STWCX /* 4984 */ MCD_OPC_FilterValue, 2, 121, 19, // Skip to: 9973 /* 4988 */ MCD_OPC_Decode, 202, 8, 57, // Opcode: STWX /* 4992 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 5006 /* 4996 */ MCD_OPC_CheckField, 0, 2, 2, 107, 19, // Skip to: 9973 /* 5002 */ MCD_OPC_Decode, 200, 8, 65, // Opcode: STWUX /* 5006 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 5029 /* 5010 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5013 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 5021 /* 5017 */ MCD_OPC_Decode, 163, 8, 58, // Opcode: STDCX /* 5021 */ MCD_OPC_FilterValue, 2, 84, 19, // Skip to: 9973 /* 5025 */ MCD_OPC_Decode, 158, 8, 57, // Opcode: STBX /* 5029 */ MCD_OPC_FilterValue, 7, 25, 0, // Skip to: 5058 /* 5033 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5036 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5050 /* 5040 */ MCD_OPC_CheckField, 21, 5, 0, 63, 19, // Skip to: 9973 /* 5046 */ MCD_OPC_Decode, 249, 1, 63, // Opcode: DCBTST /* 5050 */ MCD_OPC_FilterValue, 2, 55, 19, // Skip to: 9973 /* 5054 */ MCD_OPC_Decode, 156, 8, 65, // Opcode: STBUX /* 5058 */ MCD_OPC_FilterValue, 8, 25, 0, // Skip to: 5087 /* 5062 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5065 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5079 /* 5069 */ MCD_OPC_CheckField, 21, 5, 0, 34, 19, // Skip to: 9973 /* 5075 */ MCD_OPC_Decode, 248, 1, 63, // Opcode: DCBT /* 5079 */ MCD_OPC_FilterValue, 2, 26, 19, // Skip to: 9973 /* 5083 */ MCD_OPC_Decode, 139, 5, 57, // Opcode: LHZX /* 5087 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 5101 /* 5091 */ MCD_OPC_CheckField, 0, 2, 2, 12, 19, // Skip to: 9973 /* 5097 */ MCD_OPC_Decode, 137, 5, 64, // Opcode: LHZUX /* 5101 */ MCD_OPC_FilterValue, 10, 34, 0, // Skip to: 5139 /* 5105 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5108 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 5131 /* 5112 */ MCD_OPC_ExtractField, 23, 3, // Inst{25-23} ... /* 5115 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5123 /* 5119 */ MCD_OPC_Decode, 135, 2, 66, // Opcode: DST /* 5123 */ MCD_OPC_FilterValue, 4, 238, 18, // Skip to: 9973 /* 5127 */ MCD_OPC_Decode, 141, 2, 66, // Opcode: DSTT /* 5131 */ MCD_OPC_FilterValue, 2, 230, 18, // Skip to: 9973 /* 5135 */ MCD_OPC_Decode, 128, 5, 57, // Opcode: LHAX /* 5139 */ MCD_OPC_FilterValue, 11, 34, 0, // Skip to: 5177 /* 5143 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5146 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 5169 /* 5150 */ MCD_OPC_ExtractField, 23, 3, // Inst{25-23} ... /* 5153 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5161 /* 5157 */ MCD_OPC_Decode, 137, 2, 66, // Opcode: DSTST /* 5161 */ MCD_OPC_FilterValue, 4, 200, 18, // Skip to: 9973 /* 5165 */ MCD_OPC_Decode, 139, 2, 66, // Opcode: DSTSTT /* 5169 */ MCD_OPC_FilterValue, 2, 192, 18, // Skip to: 9973 /* 5173 */ MCD_OPC_Decode, 254, 4, 64, // Opcode: LHAUX /* 5177 */ MCD_OPC_FilterValue, 12, 10, 0, // Skip to: 5191 /* 5181 */ MCD_OPC_CheckField, 0, 2, 2, 178, 18, // Skip to: 9973 /* 5187 */ MCD_OPC_Decode, 184, 8, 57, // Opcode: STHX /* 5191 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 5205 /* 5195 */ MCD_OPC_CheckField, 0, 2, 2, 164, 18, // Skip to: 9973 /* 5201 */ MCD_OPC_Decode, 182, 8, 65, // Opcode: STHUX /* 5205 */ MCD_OPC_FilterValue, 14, 16, 0, // Skip to: 5225 /* 5209 */ MCD_OPC_CheckField, 21, 5, 0, 150, 18, // Skip to: 9973 /* 5215 */ MCD_OPC_CheckField, 0, 2, 0, 144, 18, // Skip to: 9973 /* 5221 */ MCD_OPC_Decode, 246, 1, 63, // Opcode: DCBI /* 5225 */ MCD_OPC_FilterValue, 16, 19, 0, // Skip to: 5248 /* 5229 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5232 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5240 /* 5236 */ MCD_OPC_Decode, 160, 5, 57, // Opcode: LWBRX /* 5240 */ MCD_OPC_FilterValue, 2, 121, 18, // Skip to: 9973 /* 5244 */ MCD_OPC_Decode, 249, 4, 67, // Opcode: LFSX /* 5248 */ MCD_OPC_FilterValue, 17, 25, 0, // Skip to: 5277 /* 5252 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5255 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5269 /* 5259 */ MCD_OPC_CheckField, 11, 15, 0, 100, 18, // Skip to: 9973 /* 5265 */ MCD_OPC_Decode, 131, 9, 0, // Opcode: TLBSYNC /* 5269 */ MCD_OPC_FilterValue, 2, 92, 18, // Skip to: 9973 /* 5273 */ MCD_OPC_Decode, 248, 4, 68, // Opcode: LFSUX /* 5277 */ MCD_OPC_FilterValue, 18, 31, 0, // Skip to: 5312 /* 5281 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5284 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 5304 /* 5288 */ MCD_OPC_CheckField, 23, 3, 0, 71, 18, // Skip to: 9973 /* 5294 */ MCD_OPC_CheckField, 11, 10, 0, 65, 18, // Skip to: 9973 /* 5300 */ MCD_OPC_Decode, 233, 8, 69, // Opcode: SYNC /* 5304 */ MCD_OPC_FilterValue, 2, 57, 18, // Skip to: 9973 /* 5308 */ MCD_OPC_Decode, 243, 4, 70, // Opcode: LFDX /* 5312 */ MCD_OPC_FilterValue, 19, 10, 0, // Skip to: 5326 /* 5316 */ MCD_OPC_CheckField, 0, 2, 2, 43, 18, // Skip to: 9973 /* 5322 */ MCD_OPC_Decode, 242, 4, 71, // Opcode: LFDUX /* 5326 */ MCD_OPC_FilterValue, 20, 19, 0, // Skip to: 5349 /* 5330 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5333 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5341 /* 5337 */ MCD_OPC_Decode, 195, 8, 57, // Opcode: STWBRX /* 5341 */ MCD_OPC_FilterValue, 2, 20, 18, // Skip to: 9973 /* 5345 */ MCD_OPC_Decode, 175, 8, 67, // Opcode: STFSX /* 5349 */ MCD_OPC_FilterValue, 21, 10, 0, // Skip to: 5363 /* 5353 */ MCD_OPC_CheckField, 0, 2, 2, 6, 18, // Skip to: 9973 /* 5359 */ MCD_OPC_Decode, 174, 8, 72, // Opcode: STFSUX /* 5363 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 5377 /* 5367 */ MCD_OPC_CheckField, 0, 2, 2, 248, 17, // Skip to: 9973 /* 5373 */ MCD_OPC_Decode, 170, 8, 70, // Opcode: STFDX /* 5377 */ MCD_OPC_FilterValue, 23, 25, 0, // Skip to: 5406 /* 5381 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5384 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5398 /* 5388 */ MCD_OPC_CheckField, 21, 5, 0, 227, 17, // Skip to: 9973 /* 5394 */ MCD_OPC_Decode, 244, 1, 63, // Opcode: DCBA /* 5398 */ MCD_OPC_FilterValue, 2, 219, 17, // Skip to: 9973 /* 5402 */ MCD_OPC_Decode, 169, 8, 73, // Opcode: STFDUX /* 5406 */ MCD_OPC_FilterValue, 24, 10, 0, // Skip to: 5420 /* 5410 */ MCD_OPC_CheckField, 0, 2, 0, 205, 17, // Skip to: 9973 /* 5416 */ MCD_OPC_Decode, 130, 5, 57, // Opcode: LHBRX /* 5420 */ MCD_OPC_FilterValue, 25, 43, 0, // Skip to: 5467 /* 5424 */ MCD_OPC_ExtractField, 23, 3, // Inst{25-23} ... /* 5427 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 5447 /* 5431 */ MCD_OPC_CheckField, 11, 10, 0, 184, 17, // Skip to: 9973 /* 5437 */ MCD_OPC_CheckField, 0, 2, 0, 178, 17, // Skip to: 9973 /* 5443 */ MCD_OPC_Decode, 133, 2, 74, // Opcode: DSS /* 5447 */ MCD_OPC_FilterValue, 4, 170, 17, // Skip to: 9973 /* 5451 */ MCD_OPC_CheckField, 11, 12, 0, 164, 17, // Skip to: 9973 /* 5457 */ MCD_OPC_CheckField, 0, 2, 0, 158, 17, // Skip to: 9973 /* 5463 */ MCD_OPC_Decode, 134, 2, 0, // Opcode: DSSALL /* 5467 */ MCD_OPC_FilterValue, 26, 41, 0, // Skip to: 5512 /* 5471 */ MCD_OPC_ExtractField, 1, 1, // Inst{1} ... /* 5474 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 5498 /* 5478 */ MCD_OPC_CheckField, 11, 15, 0, 10, 0, // Skip to: 5494 /* 5484 */ MCD_OPC_CheckField, 0, 1, 0, 4, 0, // Skip to: 5494 /* 5490 */ MCD_OPC_Decode, 219, 3, 0, // Opcode: EnforceIEIO /* 5494 */ MCD_OPC_Decode, 176, 5, 75, // Opcode: MBAR /* 5498 */ MCD_OPC_FilterValue, 1, 119, 17, // Skip to: 9973 /* 5502 */ MCD_OPC_CheckField, 0, 1, 0, 113, 17, // Skip to: 9973 /* 5508 */ MCD_OPC_Decode, 244, 4, 70, // Opcode: LFIWAX /* 5512 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 5526 /* 5516 */ MCD_OPC_CheckField, 0, 2, 2, 99, 17, // Skip to: 9973 /* 5522 */ MCD_OPC_Decode, 245, 4, 70, // Opcode: LFIWZX /* 5526 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 5540 /* 5530 */ MCD_OPC_CheckField, 0, 2, 0, 85, 17, // Skip to: 9973 /* 5536 */ MCD_OPC_Decode, 178, 8, 57, // Opcode: STHBRX /* 5540 */ MCD_OPC_FilterValue, 30, 25, 0, // Skip to: 5569 /* 5544 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5547 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5561 /* 5551 */ MCD_OPC_CheckField, 21, 5, 0, 64, 17, // Skip to: 9973 /* 5557 */ MCD_OPC_Decode, 203, 4, 63, // Opcode: ICBI /* 5561 */ MCD_OPC_FilterValue, 2, 56, 17, // Skip to: 9973 /* 5565 */ MCD_OPC_Decode, 171, 8, 70, // Opcode: STFIWX /* 5569 */ MCD_OPC_FilterValue, 31, 48, 17, // Skip to: 9973 /* 5573 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ... /* 5576 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5590 /* 5580 */ MCD_OPC_CheckField, 0, 2, 0, 35, 17, // Skip to: 9973 /* 5586 */ MCD_OPC_Decode, 250, 1, 63, // Opcode: DCBZ /* 5590 */ MCD_OPC_FilterValue, 1, 27, 17, // Skip to: 9973 /* 5594 */ MCD_OPC_CheckField, 0, 2, 0, 21, 17, // Skip to: 9973 /* 5600 */ MCD_OPC_Decode, 251, 1, 63, // Opcode: DCBZL /* 5604 */ MCD_OPC_FilterValue, 12, 95, 0, // Skip to: 5703 /* 5608 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 5611 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 5634 /* 5615 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5618 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5626 /* 5622 */ MCD_OPC_Decode, 252, 7, 76, // Opcode: SLW /* 5626 */ MCD_OPC_FilterValue, 1, 247, 16, // Skip to: 9973 /* 5630 */ MCD_OPC_Decode, 129, 8, 76, // Opcode: SLWo /* 5634 */ MCD_OPC_FilterValue, 16, 19, 0, // Skip to: 5657 /* 5638 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5641 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5649 /* 5645 */ MCD_OPC_Decode, 145, 8, 76, // Opcode: SRW /* 5649 */ MCD_OPC_FilterValue, 1, 224, 16, // Skip to: 9973 /* 5653 */ MCD_OPC_Decode, 150, 8, 76, // Opcode: SRWo /* 5657 */ MCD_OPC_FilterValue, 24, 19, 0, // Skip to: 5680 /* 5661 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5664 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5672 /* 5668 */ MCD_OPC_Decode, 137, 8, 76, // Opcode: SRAW /* 5672 */ MCD_OPC_FilterValue, 1, 201, 16, // Skip to: 9973 /* 5676 */ MCD_OPC_Decode, 140, 8, 76, // Opcode: SRAWo /* 5680 */ MCD_OPC_FilterValue, 25, 193, 16, // Skip to: 9973 /* 5684 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5687 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5695 /* 5691 */ MCD_OPC_Decode, 138, 8, 77, // Opcode: SRAWI /* 5695 */ MCD_OPC_FilterValue, 1, 178, 16, // Skip to: 9973 /* 5699 */ MCD_OPC_Decode, 139, 8, 77, // Opcode: SRAWIo /* 5703 */ MCD_OPC_FilterValue, 13, 47, 1, // Skip to: 6010 /* 5707 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 5710 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 5761 /* 5714 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5717 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5731 /* 5721 */ MCD_OPC_CheckField, 11, 5, 0, 150, 16, // Skip to: 9973 /* 5727 */ MCD_OPC_Decode, 228, 1, 78, // Opcode: CNTLZW /* 5731 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 5745 /* 5735 */ MCD_OPC_CheckField, 11, 5, 0, 136, 16, // Skip to: 9973 /* 5741 */ MCD_OPC_Decode, 231, 1, 78, // Opcode: CNTLZWo /* 5745 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 5753 /* 5749 */ MCD_OPC_Decode, 248, 7, 79, // Opcode: SLD /* 5753 */ MCD_OPC_FilterValue, 3, 120, 16, // Skip to: 9973 /* 5757 */ MCD_OPC_Decode, 251, 7, 79, // Opcode: SLDo /* 5761 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 5796 /* 5765 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5768 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5782 /* 5772 */ MCD_OPC_CheckField, 11, 5, 0, 99, 16, // Skip to: 9973 /* 5778 */ MCD_OPC_Decode, 226, 1, 80, // Opcode: CNTLZD /* 5782 */ MCD_OPC_FilterValue, 1, 91, 16, // Skip to: 9973 /* 5786 */ MCD_OPC_CheckField, 11, 5, 0, 85, 16, // Skip to: 9973 /* 5792 */ MCD_OPC_Decode, 227, 1, 80, // Opcode: CNTLZDo /* 5796 */ MCD_OPC_FilterValue, 11, 16, 0, // Skip to: 5816 /* 5800 */ MCD_OPC_CheckField, 11, 5, 0, 71, 16, // Skip to: 9973 /* 5806 */ MCD_OPC_CheckField, 0, 2, 0, 65, 16, // Skip to: 9973 /* 5812 */ MCD_OPC_Decode, 143, 6, 78, // Opcode: POPCNTW /* 5816 */ MCD_OPC_FilterValue, 15, 16, 0, // Skip to: 5836 /* 5820 */ MCD_OPC_CheckField, 11, 5, 0, 51, 16, // Skip to: 9973 /* 5826 */ MCD_OPC_CheckField, 0, 2, 0, 45, 16, // Skip to: 9973 /* 5832 */ MCD_OPC_Decode, 142, 6, 80, // Opcode: POPCNTD /* 5836 */ MCD_OPC_FilterValue, 16, 19, 0, // Skip to: 5859 /* 5840 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5843 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 5851 /* 5847 */ MCD_OPC_Decode, 141, 8, 79, // Opcode: SRD /* 5851 */ MCD_OPC_FilterValue, 3, 22, 16, // Skip to: 9973 /* 5855 */ MCD_OPC_Decode, 144, 8, 79, // Opcode: SRDo /* 5859 */ MCD_OPC_FilterValue, 24, 19, 0, // Skip to: 5882 /* 5863 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5866 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5874 /* 5870 */ MCD_OPC_Decode, 133, 8, 79, // Opcode: SRAD /* 5874 */ MCD_OPC_FilterValue, 1, 255, 15, // Skip to: 9973 /* 5878 */ MCD_OPC_Decode, 136, 8, 79, // Opcode: SRADo /* 5882 */ MCD_OPC_FilterValue, 25, 19, 0, // Skip to: 5905 /* 5886 */ MCD_OPC_ExtractField, 0, 1, // Inst{0} ... /* 5889 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5897 /* 5893 */ MCD_OPC_Decode, 134, 8, 81, // Opcode: SRADI /* 5897 */ MCD_OPC_FilterValue, 1, 232, 15, // Skip to: 9973 /* 5901 */ MCD_OPC_Decode, 135, 8, 81, // Opcode: SRADIo /* 5905 */ MCD_OPC_FilterValue, 28, 31, 0, // Skip to: 5940 /* 5909 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5912 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5926 /* 5916 */ MCD_OPC_CheckField, 11, 5, 0, 211, 15, // Skip to: 9973 /* 5922 */ MCD_OPC_Decode, 210, 3, 78, // Opcode: EXTSH /* 5926 */ MCD_OPC_FilterValue, 1, 203, 15, // Skip to: 9973 /* 5930 */ MCD_OPC_CheckField, 11, 5, 0, 197, 15, // Skip to: 9973 /* 5936 */ MCD_OPC_Decode, 214, 3, 78, // Opcode: EXTSHo /* 5940 */ MCD_OPC_FilterValue, 29, 31, 0, // Skip to: 5975 /* 5944 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5947 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5961 /* 5951 */ MCD_OPC_CheckField, 11, 5, 0, 176, 15, // Skip to: 9973 /* 5957 */ MCD_OPC_Decode, 205, 3, 78, // Opcode: EXTSB /* 5961 */ MCD_OPC_FilterValue, 1, 168, 15, // Skip to: 9973 /* 5965 */ MCD_OPC_CheckField, 11, 5, 0, 162, 15, // Skip to: 9973 /* 5971 */ MCD_OPC_Decode, 209, 3, 78, // Opcode: EXTSBo /* 5975 */ MCD_OPC_FilterValue, 30, 154, 15, // Skip to: 9973 /* 5979 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 5982 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5996 /* 5986 */ MCD_OPC_CheckField, 11, 5, 0, 141, 15, // Skip to: 9973 /* 5992 */ MCD_OPC_Decode, 215, 3, 80, // Opcode: EXTSW /* 5996 */ MCD_OPC_FilterValue, 1, 133, 15, // Skip to: 9973 /* 6000 */ MCD_OPC_CheckField, 11, 5, 0, 127, 15, // Skip to: 9973 /* 6006 */ MCD_OPC_Decode, 218, 3, 80, // Opcode: EXTSWo /* 6010 */ MCD_OPC_FilterValue, 14, 197, 0, // Skip to: 6211 /* 6014 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 6017 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 6038 /* 6021 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6024 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 6031 /* 6028 */ MCD_OPC_Decode, 71, 76, // Opcode: AND /* 6031 */ MCD_OPC_FilterValue, 1, 98, 15, // Skip to: 9973 /* 6035 */ MCD_OPC_Decode, 86, 76, // Opcode: ANDo /* 6038 */ MCD_OPC_FilterValue, 1, 17, 0, // Skip to: 6059 /* 6042 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6045 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 6052 /* 6049 */ MCD_OPC_Decode, 74, 76, // Opcode: ANDC /* 6052 */ MCD_OPC_FilterValue, 1, 77, 15, // Skip to: 9973 /* 6056 */ MCD_OPC_Decode, 77, 76, // Opcode: ANDCo /* 6059 */ MCD_OPC_FilterValue, 3, 19, 0, // Skip to: 6082 /* 6063 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6066 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6074 /* 6070 */ MCD_OPC_Decode, 254, 5, 76, // Opcode: NOR /* 6074 */ MCD_OPC_FilterValue, 1, 55, 15, // Skip to: 9973 /* 6078 */ MCD_OPC_Decode, 129, 6, 76, // Opcode: NORo /* 6082 */ MCD_OPC_FilterValue, 8, 19, 0, // Skip to: 6105 /* 6086 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6089 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6097 /* 6093 */ MCD_OPC_Decode, 150, 2, 76, // Opcode: EQV /* 6097 */ MCD_OPC_FilterValue, 1, 32, 15, // Skip to: 9973 /* 6101 */ MCD_OPC_Decode, 153, 2, 76, // Opcode: EQVo /* 6105 */ MCD_OPC_FilterValue, 9, 19, 0, // Skip to: 6128 /* 6109 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6112 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6120 /* 6116 */ MCD_OPC_Decode, 211, 10, 76, // Opcode: XOR /* 6120 */ MCD_OPC_FilterValue, 1, 9, 15, // Skip to: 9973 /* 6124 */ MCD_OPC_Decode, 218, 10, 76, // Opcode: XORo /* 6128 */ MCD_OPC_FilterValue, 12, 19, 0, // Skip to: 6151 /* 6132 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6135 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6143 /* 6139 */ MCD_OPC_Decode, 133, 6, 76, // Opcode: ORC /* 6143 */ MCD_OPC_FilterValue, 1, 242, 14, // Skip to: 9973 /* 6147 */ MCD_OPC_Decode, 136, 6, 76, // Opcode: ORCo /* 6151 */ MCD_OPC_FilterValue, 13, 19, 0, // Skip to: 6174 /* 6155 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6158 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6166 /* 6162 */ MCD_OPC_Decode, 130, 6, 76, // Opcode: OR /* 6166 */ MCD_OPC_FilterValue, 1, 219, 14, // Skip to: 9973 /* 6170 */ MCD_OPC_Decode, 141, 6, 76, // Opcode: ORo /* 6174 */ MCD_OPC_FilterValue, 14, 19, 0, // Skip to: 6197 /* 6178 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6181 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6189 /* 6185 */ MCD_OPC_Decode, 243, 5, 76, // Opcode: NAND /* 6189 */ MCD_OPC_FilterValue, 1, 196, 14, // Skip to: 9973 /* 6193 */ MCD_OPC_Decode, 246, 5, 76, // Opcode: NANDo /* 6197 */ MCD_OPC_FilterValue, 15, 188, 14, // Skip to: 9973 /* 6201 */ MCD_OPC_CheckField, 0, 2, 0, 182, 14, // Skip to: 9973 /* 6207 */ MCD_OPC_Decode, 216, 1, 76, // Opcode: CMPB /* 6211 */ MCD_OPC_FilterValue, 15, 174, 14, // Skip to: 9973 /* 6215 */ MCD_OPC_CheckField, 23, 3, 0, 168, 14, // Skip to: 9973 /* 6221 */ MCD_OPC_CheckField, 6, 15, 1, 162, 14, // Skip to: 9973 /* 6227 */ MCD_OPC_CheckField, 0, 2, 0, 156, 14, // Skip to: 9973 /* 6233 */ MCD_OPC_Decode, 208, 10, 69, // Opcode: WAIT /* 6237 */ MCD_OPC_FilterValue, 32, 4, 0, // Skip to: 6245 /* 6241 */ MCD_OPC_Decode, 162, 5, 82, // Opcode: LWZ /* 6245 */ MCD_OPC_FilterValue, 33, 4, 0, // Skip to: 6253 /* 6249 */ MCD_OPC_Decode, 165, 5, 82, // Opcode: LWZU /* 6253 */ MCD_OPC_FilterValue, 34, 4, 0, // Skip to: 6261 /* 6257 */ MCD_OPC_Decode, 217, 4, 82, // Opcode: LBZ /* 6261 */ MCD_OPC_FilterValue, 35, 4, 0, // Skip to: 6269 /* 6265 */ MCD_OPC_Decode, 220, 4, 82, // Opcode: LBZU /* 6269 */ MCD_OPC_FilterValue, 36, 4, 0, // Skip to: 6277 /* 6273 */ MCD_OPC_Decode, 193, 8, 82, // Opcode: STW /* 6277 */ MCD_OPC_FilterValue, 37, 4, 0, // Skip to: 6285 /* 6281 */ MCD_OPC_Decode, 198, 8, 82, // Opcode: STWU /* 6285 */ MCD_OPC_FilterValue, 38, 4, 0, // Skip to: 6293 /* 6289 */ MCD_OPC_Decode, 151, 8, 82, // Opcode: STB /* 6293 */ MCD_OPC_FilterValue, 39, 4, 0, // Skip to: 6301 /* 6297 */ MCD_OPC_Decode, 154, 8, 82, // Opcode: STBU /* 6301 */ MCD_OPC_FilterValue, 40, 4, 0, // Skip to: 6309 /* 6305 */ MCD_OPC_Decode, 132, 5, 82, // Opcode: LHZ /* 6309 */ MCD_OPC_FilterValue, 41, 4, 0, // Skip to: 6317 /* 6313 */ MCD_OPC_Decode, 135, 5, 82, // Opcode: LHZU /* 6317 */ MCD_OPC_FilterValue, 42, 4, 0, // Skip to: 6325 /* 6321 */ MCD_OPC_Decode, 250, 4, 82, // Opcode: LHA /* 6325 */ MCD_OPC_FilterValue, 43, 4, 0, // Skip to: 6333 /* 6329 */ MCD_OPC_Decode, 252, 4, 82, // Opcode: LHAU /* 6333 */ MCD_OPC_FilterValue, 44, 4, 0, // Skip to: 6341 /* 6337 */ MCD_OPC_Decode, 176, 8, 82, // Opcode: STH /* 6341 */ MCD_OPC_FilterValue, 45, 4, 0, // Skip to: 6349 /* 6345 */ MCD_OPC_Decode, 180, 8, 82, // Opcode: STHU /* 6349 */ MCD_OPC_FilterValue, 46, 4, 0, // Skip to: 6357 /* 6353 */ MCD_OPC_Decode, 145, 5, 82, // Opcode: LMW /* 6357 */ MCD_OPC_FilterValue, 47, 4, 0, // Skip to: 6365 /* 6361 */ MCD_OPC_Decode, 186, 8, 82, // Opcode: STMW /* 6365 */ MCD_OPC_FilterValue, 48, 4, 0, // Skip to: 6373 /* 6369 */ MCD_OPC_Decode, 246, 4, 83, // Opcode: LFS /* 6373 */ MCD_OPC_FilterValue, 49, 4, 0, // Skip to: 6381 /* 6377 */ MCD_OPC_Decode, 247, 4, 83, // Opcode: LFSU /* 6381 */ MCD_OPC_FilterValue, 50, 4, 0, // Skip to: 6389 /* 6385 */ MCD_OPC_Decode, 240, 4, 84, // Opcode: LFD /* 6389 */ MCD_OPC_FilterValue, 51, 4, 0, // Skip to: 6397 /* 6393 */ MCD_OPC_Decode, 241, 4, 84, // Opcode: LFDU /* 6397 */ MCD_OPC_FilterValue, 52, 4, 0, // Skip to: 6405 /* 6401 */ MCD_OPC_Decode, 172, 8, 83, // Opcode: STFS /* 6405 */ MCD_OPC_FilterValue, 53, 4, 0, // Skip to: 6413 /* 6409 */ MCD_OPC_Decode, 173, 8, 83, // Opcode: STFSU /* 6413 */ MCD_OPC_FilterValue, 54, 4, 0, // Skip to: 6421 /* 6417 */ MCD_OPC_Decode, 167, 8, 84, // Opcode: STFD /* 6421 */ MCD_OPC_FilterValue, 55, 4, 0, // Skip to: 6429 /* 6425 */ MCD_OPC_Decode, 168, 8, 84, // Opcode: STFDU /* 6429 */ MCD_OPC_FilterValue, 58, 27, 0, // Skip to: 6460 /* 6433 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 6436 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6444 /* 6440 */ MCD_OPC_Decode, 226, 4, 85, // Opcode: LD /* 6444 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 6452 /* 6448 */ MCD_OPC_Decode, 230, 4, 85, // Opcode: LDU /* 6452 */ MCD_OPC_FilterValue, 2, 189, 13, // Skip to: 9973 /* 6456 */ MCD_OPC_Decode, 154, 5, 85, // Opcode: LWA /* 6460 */ MCD_OPC_FilterValue, 59, 113, 1, // Skip to: 6833 /* 6464 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 6467 */ MCD_OPC_FilterValue, 28, 31, 0, // Skip to: 6502 /* 6471 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 6474 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 6488 /* 6478 */ MCD_OPC_CheckField, 16, 5, 0, 161, 13, // Skip to: 9973 /* 6484 */ MCD_OPC_Decode, 230, 3, 86, // Opcode: FCFIDS /* 6488 */ MCD_OPC_FilterValue, 30, 153, 13, // Skip to: 9973 /* 6492 */ MCD_OPC_CheckField, 16, 5, 0, 147, 13, // Skip to: 9973 /* 6498 */ MCD_OPC_Decode, 233, 3, 86, // Opcode: FCFIDUS /* 6502 */ MCD_OPC_FilterValue, 29, 31, 0, // Skip to: 6537 /* 6506 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 6509 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 6523 /* 6513 */ MCD_OPC_CheckField, 16, 5, 0, 126, 13, // Skip to: 9973 /* 6519 */ MCD_OPC_Decode, 231, 3, 86, // Opcode: FCFIDSo /* 6523 */ MCD_OPC_FilterValue, 30, 118, 13, // Skip to: 9973 /* 6527 */ MCD_OPC_CheckField, 16, 5, 0, 112, 13, // Skip to: 9973 /* 6533 */ MCD_OPC_Decode, 234, 3, 86, // Opcode: FCFIDUSo /* 6537 */ MCD_OPC_FilterValue, 36, 10, 0, // Skip to: 6551 /* 6541 */ MCD_OPC_CheckField, 6, 5, 0, 98, 13, // Skip to: 9973 /* 6547 */ MCD_OPC_Decode, 128, 4, 87, // Opcode: FDIVS /* 6551 */ MCD_OPC_FilterValue, 37, 10, 0, // Skip to: 6565 /* 6555 */ MCD_OPC_CheckField, 6, 5, 0, 84, 13, // Skip to: 9973 /* 6561 */ MCD_OPC_Decode, 129, 4, 87, // Opcode: FDIVSo /* 6565 */ MCD_OPC_FilterValue, 40, 10, 0, // Skip to: 6579 /* 6569 */ MCD_OPC_CheckField, 6, 5, 0, 70, 13, // Skip to: 9973 /* 6575 */ MCD_OPC_Decode, 196, 4, 87, // Opcode: FSUBS /* 6579 */ MCD_OPC_FilterValue, 41, 10, 0, // Skip to: 6593 /* 6583 */ MCD_OPC_CheckField, 6, 5, 0, 56, 13, // Skip to: 9973 /* 6589 */ MCD_OPC_Decode, 197, 4, 87, // Opcode: FSUBSo /* 6593 */ MCD_OPC_FilterValue, 42, 10, 0, // Skip to: 6607 /* 6597 */ MCD_OPC_CheckField, 6, 5, 0, 42, 13, // Skip to: 9973 /* 6603 */ MCD_OPC_Decode, 225, 3, 87, // Opcode: FADDS /* 6607 */ MCD_OPC_FilterValue, 43, 10, 0, // Skip to: 6621 /* 6611 */ MCD_OPC_CheckField, 6, 5, 0, 28, 13, // Skip to: 9973 /* 6617 */ MCD_OPC_Decode, 226, 3, 87, // Opcode: FADDSo /* 6621 */ MCD_OPC_FilterValue, 44, 16, 0, // Skip to: 6641 /* 6625 */ MCD_OPC_CheckField, 16, 5, 0, 14, 13, // Skip to: 9973 /* 6631 */ MCD_OPC_CheckField, 6, 5, 0, 8, 13, // Skip to: 9973 /* 6637 */ MCD_OPC_Decode, 192, 4, 88, // Opcode: FSQRTS /* 6641 */ MCD_OPC_FilterValue, 45, 16, 0, // Skip to: 6661 /* 6645 */ MCD_OPC_CheckField, 16, 5, 0, 250, 12, // Skip to: 9973 /* 6651 */ MCD_OPC_CheckField, 6, 5, 0, 244, 12, // Skip to: 9973 /* 6657 */ MCD_OPC_Decode, 193, 4, 88, // Opcode: FSQRTSo /* 6661 */ MCD_OPC_FilterValue, 48, 16, 0, // Skip to: 6681 /* 6665 */ MCD_OPC_CheckField, 16, 5, 0, 230, 12, // Skip to: 9973 /* 6671 */ MCD_OPC_CheckField, 6, 5, 0, 224, 12, // Skip to: 9973 /* 6677 */ MCD_OPC_Decode, 162, 4, 88, // Opcode: FRES /* 6681 */ MCD_OPC_FilterValue, 49, 16, 0, // Skip to: 6701 /* 6685 */ MCD_OPC_CheckField, 16, 5, 0, 210, 12, // Skip to: 9973 /* 6691 */ MCD_OPC_CheckField, 6, 5, 0, 204, 12, // Skip to: 9973 /* 6697 */ MCD_OPC_Decode, 163, 4, 88, // Opcode: FRESo /* 6701 */ MCD_OPC_FilterValue, 50, 10, 0, // Skip to: 6715 /* 6705 */ MCD_OPC_CheckField, 11, 5, 0, 190, 12, // Skip to: 9973 /* 6711 */ MCD_OPC_Decode, 142, 4, 89, // Opcode: FMULS /* 6715 */ MCD_OPC_FilterValue, 51, 10, 0, // Skip to: 6729 /* 6719 */ MCD_OPC_CheckField, 11, 5, 0, 176, 12, // Skip to: 9973 /* 6725 */ MCD_OPC_Decode, 143, 4, 89, // Opcode: FMULSo /* 6729 */ MCD_OPC_FilterValue, 52, 16, 0, // Skip to: 6749 /* 6733 */ MCD_OPC_CheckField, 16, 5, 0, 162, 12, // Skip to: 9973 /* 6739 */ MCD_OPC_CheckField, 6, 5, 0, 156, 12, // Skip to: 9973 /* 6745 */ MCD_OPC_Decode, 184, 4, 88, // Opcode: FRSQRTES /* 6749 */ MCD_OPC_FilterValue, 53, 16, 0, // Skip to: 6769 /* 6753 */ MCD_OPC_CheckField, 16, 5, 0, 142, 12, // Skip to: 9973 /* 6759 */ MCD_OPC_CheckField, 6, 5, 0, 136, 12, // Skip to: 9973 /* 6765 */ MCD_OPC_Decode, 185, 4, 88, // Opcode: FRSQRTESo /* 6769 */ MCD_OPC_FilterValue, 56, 4, 0, // Skip to: 6777 /* 6773 */ MCD_OPC_Decode, 138, 4, 90, // Opcode: FMSUBS /* 6777 */ MCD_OPC_FilterValue, 57, 4, 0, // Skip to: 6785 /* 6781 */ MCD_OPC_Decode, 139, 4, 90, // Opcode: FMSUBSo /* 6785 */ MCD_OPC_FilterValue, 58, 4, 0, // Skip to: 6793 /* 6789 */ MCD_OPC_Decode, 132, 4, 90, // Opcode: FMADDS /* 6793 */ MCD_OPC_FilterValue, 59, 4, 0, // Skip to: 6801 /* 6797 */ MCD_OPC_Decode, 133, 4, 90, // Opcode: FMADDSo /* 6801 */ MCD_OPC_FilterValue, 60, 4, 0, // Skip to: 6809 /* 6805 */ MCD_OPC_Decode, 158, 4, 90, // Opcode: FNMSUBS /* 6809 */ MCD_OPC_FilterValue, 61, 4, 0, // Skip to: 6817 /* 6813 */ MCD_OPC_Decode, 159, 4, 90, // Opcode: FNMSUBSo /* 6817 */ MCD_OPC_FilterValue, 62, 4, 0, // Skip to: 6825 /* 6821 */ MCD_OPC_Decode, 154, 4, 90, // Opcode: FNMADDS /* 6825 */ MCD_OPC_FilterValue, 63, 72, 12, // Skip to: 9973 /* 6829 */ MCD_OPC_Decode, 155, 4, 90, // Opcode: FNMADDSo /* 6833 */ MCD_OPC_FilterValue, 60, 32, 8, // Skip to: 8917 /* 6837 */ MCD_OPC_ExtractField, 4, 2, // Inst{5-4} ... /* 6840 */ MCD_OPC_FilterValue, 0, 16, 2, // Skip to: 7372 /* 6844 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 6847 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 6870 /* 6851 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6854 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6862 /* 6858 */ MCD_OPC_Decode, 220, 10, 91, // Opcode: XSADDDP /* 6862 */ MCD_OPC_FilterValue, 1, 35, 12, // Skip to: 9973 /* 6866 */ MCD_OPC_Decode, 233, 10, 92, // Opcode: XSMADDADP /* 6870 */ MCD_OPC_FilterValue, 5, 19, 0, // Skip to: 6893 /* 6874 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6877 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6885 /* 6881 */ MCD_OPC_Decode, 254, 10, 91, // Opcode: XSSUBDP /* 6885 */ MCD_OPC_FilterValue, 1, 12, 12, // Skip to: 9973 /* 6889 */ MCD_OPC_Decode, 234, 10, 92, // Opcode: XSMADDMDP /* 6893 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 6916 /* 6897 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6900 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6908 /* 6904 */ MCD_OPC_Decode, 239, 10, 91, // Opcode: XSMULDP /* 6908 */ MCD_OPC_FilterValue, 1, 245, 11, // Skip to: 9973 /* 6912 */ MCD_OPC_Decode, 237, 10, 92, // Opcode: XSMSUBADP /* 6916 */ MCD_OPC_FilterValue, 7, 19, 0, // Skip to: 6939 /* 6920 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6923 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6931 /* 6927 */ MCD_OPC_Decode, 232, 10, 91, // Opcode: XSDIVDP /* 6931 */ MCD_OPC_FilterValue, 1, 222, 11, // Skip to: 9973 /* 6935 */ MCD_OPC_Decode, 238, 10, 92, // Opcode: XSMSUBMDP /* 6939 */ MCD_OPC_FilterValue, 8, 19, 0, // Skip to: 6962 /* 6943 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6946 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6954 /* 6950 */ MCD_OPC_Decode, 132, 11, 93, // Opcode: XVADDSP /* 6954 */ MCD_OPC_FilterValue, 1, 199, 11, // Skip to: 9973 /* 6958 */ MCD_OPC_Decode, 168, 11, 94, // Opcode: XVMADDASP /* 6962 */ MCD_OPC_FilterValue, 9, 19, 0, // Skip to: 6985 /* 6966 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6969 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6977 /* 6973 */ MCD_OPC_Decode, 210, 11, 93, // Opcode: XVSUBSP /* 6977 */ MCD_OPC_FilterValue, 1, 176, 11, // Skip to: 9973 /* 6981 */ MCD_OPC_Decode, 170, 11, 94, // Opcode: XVMADDMSP /* 6985 */ MCD_OPC_FilterValue, 10, 19, 0, // Skip to: 7008 /* 6989 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 6992 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7000 /* 6996 */ MCD_OPC_Decode, 180, 11, 93, // Opcode: XVMULSP /* 7000 */ MCD_OPC_FilterValue, 1, 153, 11, // Skip to: 9973 /* 7004 */ MCD_OPC_Decode, 176, 11, 94, // Opcode: XVMSUBASP /* 7008 */ MCD_OPC_FilterValue, 11, 19, 0, // Skip to: 7031 /* 7012 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7015 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7023 /* 7019 */ MCD_OPC_Decode, 166, 11, 93, // Opcode: XVDIVSP /* 7023 */ MCD_OPC_FilterValue, 1, 130, 11, // Skip to: 9973 /* 7027 */ MCD_OPC_Decode, 178, 11, 94, // Opcode: XVMSUBMSP /* 7031 */ MCD_OPC_FilterValue, 12, 19, 0, // Skip to: 7054 /* 7035 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7038 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7046 /* 7042 */ MCD_OPC_Decode, 131, 11, 93, // Opcode: XVADDDP /* 7046 */ MCD_OPC_FilterValue, 1, 107, 11, // Skip to: 9973 /* 7050 */ MCD_OPC_Decode, 167, 11, 94, // Opcode: XVMADDADP /* 7054 */ MCD_OPC_FilterValue, 13, 19, 0, // Skip to: 7077 /* 7058 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7061 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7069 /* 7065 */ MCD_OPC_Decode, 209, 11, 93, // Opcode: XVSUBDP /* 7069 */ MCD_OPC_FilterValue, 1, 84, 11, // Skip to: 9973 /* 7073 */ MCD_OPC_Decode, 169, 11, 94, // Opcode: XVMADDMDP /* 7077 */ MCD_OPC_FilterValue, 14, 19, 0, // Skip to: 7100 /* 7081 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7084 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7092 /* 7088 */ MCD_OPC_Decode, 179, 11, 93, // Opcode: XVMULDP /* 7092 */ MCD_OPC_FilterValue, 1, 61, 11, // Skip to: 9973 /* 7096 */ MCD_OPC_Decode, 175, 11, 94, // Opcode: XVMSUBADP /* 7100 */ MCD_OPC_FilterValue, 15, 19, 0, // Skip to: 7123 /* 7104 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7107 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7115 /* 7111 */ MCD_OPC_Decode, 165, 11, 93, // Opcode: XVDIVDP /* 7115 */ MCD_OPC_FilterValue, 1, 38, 11, // Skip to: 9973 /* 7119 */ MCD_OPC_Decode, 177, 11, 94, // Opcode: XVMSUBMDP /* 7123 */ MCD_OPC_FilterValue, 20, 19, 0, // Skip to: 7146 /* 7127 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7130 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7138 /* 7134 */ MCD_OPC_Decode, 235, 10, 91, // Opcode: XSMAXDP /* 7138 */ MCD_OPC_FilterValue, 1, 15, 11, // Skip to: 9973 /* 7142 */ MCD_OPC_Decode, 242, 10, 92, // Opcode: XSNMADDADP /* 7146 */ MCD_OPC_FilterValue, 21, 19, 0, // Skip to: 7169 /* 7150 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7153 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7161 /* 7157 */ MCD_OPC_Decode, 236, 10, 91, // Opcode: XSMINDP /* 7161 */ MCD_OPC_FilterValue, 1, 248, 10, // Skip to: 9973 /* 7165 */ MCD_OPC_Decode, 243, 10, 92, // Opcode: XSNMADDMDP /* 7169 */ MCD_OPC_FilterValue, 22, 19, 0, // Skip to: 7192 /* 7173 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7176 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7184 /* 7180 */ MCD_OPC_Decode, 223, 10, 91, // Opcode: XSCPSGNDP /* 7184 */ MCD_OPC_FilterValue, 1, 225, 10, // Skip to: 9973 /* 7188 */ MCD_OPC_Decode, 244, 10, 92, // Opcode: XSNMSUBADP /* 7192 */ MCD_OPC_FilterValue, 23, 10, 0, // Skip to: 7206 /* 7196 */ MCD_OPC_CheckField, 3, 1, 1, 211, 10, // Skip to: 9973 /* 7202 */ MCD_OPC_Decode, 245, 10, 92, // Opcode: XSNMSUBMDP /* 7206 */ MCD_OPC_FilterValue, 24, 19, 0, // Skip to: 7229 /* 7210 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7213 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7221 /* 7217 */ MCD_OPC_Decode, 172, 11, 93, // Opcode: XVMAXSP /* 7221 */ MCD_OPC_FilterValue, 1, 188, 10, // Skip to: 9973 /* 7225 */ MCD_OPC_Decode, 186, 11, 94, // Opcode: XVNMADDASP /* 7229 */ MCD_OPC_FilterValue, 25, 19, 0, // Skip to: 7252 /* 7233 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7236 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7244 /* 7240 */ MCD_OPC_Decode, 174, 11, 93, // Opcode: XVMINSP /* 7244 */ MCD_OPC_FilterValue, 1, 165, 10, // Skip to: 9973 /* 7248 */ MCD_OPC_Decode, 188, 11, 94, // Opcode: XVNMADDMSP /* 7252 */ MCD_OPC_FilterValue, 26, 19, 0, // Skip to: 7275 /* 7256 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7259 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7267 /* 7263 */ MCD_OPC_Decode, 146, 11, 93, // Opcode: XVCPSGNSP /* 7267 */ MCD_OPC_FilterValue, 1, 142, 10, // Skip to: 9973 /* 7271 */ MCD_OPC_Decode, 190, 11, 94, // Opcode: XVNMSUBASP /* 7275 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 7289 /* 7279 */ MCD_OPC_CheckField, 3, 1, 1, 128, 10, // Skip to: 9973 /* 7285 */ MCD_OPC_Decode, 192, 11, 94, // Opcode: XVNMSUBMSP /* 7289 */ MCD_OPC_FilterValue, 28, 19, 0, // Skip to: 7312 /* 7293 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7296 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7304 /* 7300 */ MCD_OPC_Decode, 171, 11, 93, // Opcode: XVMAXDP /* 7304 */ MCD_OPC_FilterValue, 1, 105, 10, // Skip to: 9973 /* 7308 */ MCD_OPC_Decode, 185, 11, 94, // Opcode: XVNMADDADP /* 7312 */ MCD_OPC_FilterValue, 29, 19, 0, // Skip to: 7335 /* 7316 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7319 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7327 /* 7323 */ MCD_OPC_Decode, 173, 11, 93, // Opcode: XVMINDP /* 7327 */ MCD_OPC_FilterValue, 1, 82, 10, // Skip to: 9973 /* 7331 */ MCD_OPC_Decode, 187, 11, 94, // Opcode: XVNMADDMDP /* 7335 */ MCD_OPC_FilterValue, 30, 19, 0, // Skip to: 7358 /* 7339 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7342 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7350 /* 7346 */ MCD_OPC_Decode, 145, 11, 93, // Opcode: XVCPSGNDP /* 7350 */ MCD_OPC_FilterValue, 1, 59, 10, // Skip to: 9973 /* 7354 */ MCD_OPC_Decode, 189, 11, 94, // Opcode: XVNMSUBADP /* 7358 */ MCD_OPC_FilterValue, 31, 51, 10, // Skip to: 9973 /* 7362 */ MCD_OPC_CheckField, 3, 1, 1, 45, 10, // Skip to: 9973 /* 7368 */ MCD_OPC_Decode, 191, 11, 94, // Opcode: XVNMSUBMDP /* 7372 */ MCD_OPC_FilterValue, 1, 130, 1, // Skip to: 7762 /* 7376 */ MCD_OPC_ExtractField, 6, 2, // Inst{7-6} ... /* 7379 */ MCD_OPC_FilterValue, 0, 100, 0, // Skip to: 7483 /* 7383 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7386 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 7424 /* 7390 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 7393 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7401 /* 7397 */ MCD_OPC_Decode, 228, 11, 95, // Opcode: XXSLDWI /* 7401 */ MCD_OPC_FilterValue, 1, 8, 10, // Skip to: 9973 /* 7405 */ MCD_OPC_ExtractField, 8, 2, // Inst{9-8} ... /* 7408 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7416 /* 7412 */ MCD_OPC_Decode, 215, 11, 93, // Opcode: XXLAND /* 7416 */ MCD_OPC_FilterValue, 1, 249, 9, // Skip to: 9973 /* 7420 */ MCD_OPC_Decode, 219, 11, 93, // Opcode: XXLNOR /* 7424 */ MCD_OPC_FilterValue, 1, 241, 9, // Skip to: 9973 /* 7428 */ MCD_OPC_ExtractField, 8, 3, // Inst{10-8} ... /* 7431 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 7451 /* 7435 */ MCD_OPC_CheckField, 21, 2, 0, 228, 9, // Skip to: 9973 /* 7441 */ MCD_OPC_CheckField, 0, 1, 0, 222, 9, // Skip to: 9973 /* 7447 */ MCD_OPC_Decode, 222, 10, 96, // Opcode: XSCMPUDP /* 7451 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 7459 /* 7455 */ MCD_OPC_Decode, 135, 11, 93, // Opcode: XVCMPEQSP /* 7459 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 7467 /* 7463 */ MCD_OPC_Decode, 133, 11, 93, // Opcode: XVCMPEQDP /* 7467 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 7475 /* 7471 */ MCD_OPC_Decode, 136, 11, 93, // Opcode: XVCMPEQSPo /* 7475 */ MCD_OPC_FilterValue, 7, 190, 9, // Skip to: 9973 /* 7479 */ MCD_OPC_Decode, 134, 11, 93, // Opcode: XVCMPEQDPo /* 7483 */ MCD_OPC_FilterValue, 1, 100, 0, // Skip to: 7587 /* 7487 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7490 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 7528 /* 7494 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 7497 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7505 /* 7501 */ MCD_OPC_Decode, 226, 11, 95, // Opcode: XXPERMDI /* 7505 */ MCD_OPC_FilterValue, 1, 160, 9, // Skip to: 9973 /* 7509 */ MCD_OPC_ExtractField, 8, 2, // Inst{9-8} ... /* 7512 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7520 /* 7516 */ MCD_OPC_Decode, 216, 11, 93, // Opcode: XXLANDC /* 7520 */ MCD_OPC_FilterValue, 1, 145, 9, // Skip to: 9973 /* 7524 */ MCD_OPC_Decode, 221, 11, 93, // Opcode: XXLORC /* 7528 */ MCD_OPC_FilterValue, 1, 137, 9, // Skip to: 9973 /* 7532 */ MCD_OPC_ExtractField, 8, 3, // Inst{10-8} ... /* 7535 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 7555 /* 7539 */ MCD_OPC_CheckField, 21, 2, 0, 124, 9, // Skip to: 9973 /* 7545 */ MCD_OPC_CheckField, 0, 1, 0, 118, 9, // Skip to: 9973 /* 7551 */ MCD_OPC_Decode, 221, 10, 96, // Opcode: XSCMPODP /* 7555 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 7563 /* 7559 */ MCD_OPC_Decode, 143, 11, 93, // Opcode: XVCMPGTSP /* 7563 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 7571 /* 7567 */ MCD_OPC_Decode, 141, 11, 93, // Opcode: XVCMPGTDP /* 7571 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 7579 /* 7575 */ MCD_OPC_Decode, 144, 11, 93, // Opcode: XVCMPGTSPo /* 7579 */ MCD_OPC_FilterValue, 7, 86, 9, // Skip to: 9973 /* 7583 */ MCD_OPC_Decode, 142, 11, 93, // Opcode: XVCMPGTDPo /* 7587 */ MCD_OPC_FilterValue, 2, 136, 0, // Skip to: 7727 /* 7591 */ MCD_OPC_ExtractField, 8, 3, // Inst{10-8} ... /* 7594 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 7608 /* 7598 */ MCD_OPC_CheckField, 3, 1, 0, 65, 9, // Skip to: 9973 /* 7604 */ MCD_OPC_Decode, 224, 11, 93, // Opcode: XXMRGHW /* 7608 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 7622 /* 7612 */ MCD_OPC_CheckField, 3, 1, 0, 51, 9, // Skip to: 9973 /* 7618 */ MCD_OPC_Decode, 225, 11, 93, // Opcode: XXMRGLW /* 7622 */ MCD_OPC_FilterValue, 2, 31, 0, // Skip to: 7657 /* 7626 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7629 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 7649 /* 7633 */ MCD_OPC_CheckField, 18, 3, 0, 30, 9, // Skip to: 9973 /* 7639 */ MCD_OPC_CheckField, 2, 1, 0, 24, 9, // Skip to: 9973 /* 7645 */ MCD_OPC_Decode, 229, 11, 97, // Opcode: XXSPLTW /* 7649 */ MCD_OPC_FilterValue, 1, 16, 9, // Skip to: 9973 /* 7653 */ MCD_OPC_Decode, 139, 11, 93, // Opcode: XVCMPGESP /* 7657 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 7671 /* 7661 */ MCD_OPC_CheckField, 3, 1, 1, 2, 9, // Skip to: 9973 /* 7667 */ MCD_OPC_Decode, 137, 11, 93, // Opcode: XVCMPGEDP /* 7671 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 7685 /* 7675 */ MCD_OPC_CheckField, 3, 1, 0, 244, 8, // Skip to: 9973 /* 7681 */ MCD_OPC_Decode, 220, 11, 93, // Opcode: XXLOR /* 7685 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 7699 /* 7689 */ MCD_OPC_CheckField, 3, 1, 0, 230, 8, // Skip to: 9973 /* 7695 */ MCD_OPC_Decode, 218, 11, 93, // Opcode: XXLNAND /* 7699 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 7713 /* 7703 */ MCD_OPC_CheckField, 3, 1, 1, 216, 8, // Skip to: 9973 /* 7709 */ MCD_OPC_Decode, 140, 11, 93, // Opcode: XVCMPGESPo /* 7713 */ MCD_OPC_FilterValue, 7, 208, 8, // Skip to: 9973 /* 7717 */ MCD_OPC_CheckField, 3, 1, 1, 202, 8, // Skip to: 9973 /* 7723 */ MCD_OPC_Decode, 138, 11, 93, // Opcode: XVCMPGEDPo /* 7727 */ MCD_OPC_FilterValue, 3, 194, 8, // Skip to: 9973 /* 7731 */ MCD_OPC_ExtractField, 8, 3, // Inst{10-8} ... /* 7734 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 7748 /* 7738 */ MCD_OPC_CheckField, 3, 1, 0, 181, 8, // Skip to: 9973 /* 7744 */ MCD_OPC_Decode, 223, 11, 93, // Opcode: XXLXOR /* 7748 */ MCD_OPC_FilterValue, 5, 173, 8, // Skip to: 9973 /* 7752 */ MCD_OPC_CheckField, 3, 1, 0, 167, 8, // Skip to: 9973 /* 7758 */ MCD_OPC_Decode, 217, 11, 93, // Opcode: XXLEQV /* 7762 */ MCD_OPC_FilterValue, 2, 119, 4, // Skip to: 8909 /* 7766 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 7769 */ MCD_OPC_FilterValue, 4, 59, 0, // Skip to: 7832 /* 7773 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 7776 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 7790 /* 7780 */ MCD_OPC_CheckField, 16, 5, 0, 139, 8, // Skip to: 9973 /* 7786 */ MCD_OPC_Decode, 228, 10, 98, // Opcode: XSCVDPUXWS /* 7790 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 7804 /* 7794 */ MCD_OPC_CheckField, 16, 5, 0, 125, 8, // Skip to: 9973 /* 7800 */ MCD_OPC_Decode, 246, 10, 98, // Opcode: XSRDPI /* 7804 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 7818 /* 7808 */ MCD_OPC_CheckField, 16, 5, 0, 111, 8, // Skip to: 9973 /* 7814 */ MCD_OPC_Decode, 252, 10, 98, // Opcode: XSRSQRTEDP /* 7818 */ MCD_OPC_FilterValue, 3, 103, 8, // Skip to: 9973 /* 7822 */ MCD_OPC_CheckField, 16, 5, 0, 97, 8, // Skip to: 9973 /* 7828 */ MCD_OPC_Decode, 253, 10, 98, // Opcode: XSSQRTDP /* 7832 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 7881 /* 7836 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 7839 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 7853 /* 7843 */ MCD_OPC_CheckField, 16, 5, 0, 76, 8, // Skip to: 9973 /* 7849 */ MCD_OPC_Decode, 226, 10, 98, // Opcode: XSCVDPSXWS /* 7853 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 7867 /* 7857 */ MCD_OPC_CheckField, 16, 5, 0, 62, 8, // Skip to: 9973 /* 7863 */ MCD_OPC_Decode, 250, 10, 98, // Opcode: XSRDPIZ /* 7867 */ MCD_OPC_FilterValue, 2, 54, 8, // Skip to: 9973 /* 7871 */ MCD_OPC_CheckField, 16, 5, 0, 48, 8, // Skip to: 9973 /* 7877 */ MCD_OPC_Decode, 251, 10, 98, // Opcode: XSREDP /* 7881 */ MCD_OPC_FilterValue, 6, 51, 0, // Skip to: 7936 /* 7885 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 7888 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 7902 /* 7892 */ MCD_OPC_CheckField, 16, 5, 0, 27, 8, // Skip to: 9973 /* 7898 */ MCD_OPC_Decode, 249, 10, 98, // Opcode: XSRDPIP /* 7902 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 7922 /* 7906 */ MCD_OPC_CheckField, 16, 7, 0, 13, 8, // Skip to: 9973 /* 7912 */ MCD_OPC_CheckField, 0, 1, 0, 7, 8, // Skip to: 9973 /* 7918 */ MCD_OPC_Decode, 128, 11, 99, // Opcode: XSTSQRTDP /* 7922 */ MCD_OPC_FilterValue, 3, 255, 7, // Skip to: 9973 /* 7926 */ MCD_OPC_CheckField, 16, 5, 0, 249, 7, // Skip to: 9973 /* 7932 */ MCD_OPC_Decode, 247, 10, 98, // Opcode: XSRDPIC /* 7936 */ MCD_OPC_FilterValue, 7, 43, 0, // Skip to: 7983 /* 7940 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 7943 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 7963 /* 7947 */ MCD_OPC_CheckField, 16, 5, 0, 228, 7, // Skip to: 9973 /* 7953 */ MCD_OPC_CheckField, 2, 1, 1, 222, 7, // Skip to: 9973 /* 7959 */ MCD_OPC_Decode, 248, 10, 98, // Opcode: XSRDPIM /* 7963 */ MCD_OPC_FilterValue, 1, 214, 7, // Skip to: 9973 /* 7967 */ MCD_OPC_CheckField, 21, 2, 0, 208, 7, // Skip to: 9973 /* 7973 */ MCD_OPC_CheckField, 0, 1, 0, 202, 7, // Skip to: 9973 /* 7979 */ MCD_OPC_Decode, 255, 10, 96, // Opcode: XSTDIVDP /* 7983 */ MCD_OPC_FilterValue, 8, 59, 0, // Skip to: 8046 /* 7987 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 7990 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8004 /* 7994 */ MCD_OPC_CheckField, 16, 5, 0, 181, 7, // Skip to: 9973 /* 8000 */ MCD_OPC_Decode, 156, 11, 100, // Opcode: XVCVSPUXWS /* 8004 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 8018 /* 8008 */ MCD_OPC_CheckField, 16, 5, 0, 167, 7, // Skip to: 9973 /* 8014 */ MCD_OPC_Decode, 200, 11, 100, // Opcode: XVRSPI /* 8018 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 8032 /* 8022 */ MCD_OPC_CheckField, 16, 5, 0, 153, 7, // Skip to: 9973 /* 8028 */ MCD_OPC_Decode, 206, 11, 100, // Opcode: XVRSQRTESP /* 8032 */ MCD_OPC_FilterValue, 3, 145, 7, // Skip to: 9973 /* 8036 */ MCD_OPC_CheckField, 16, 5, 0, 139, 7, // Skip to: 9973 /* 8042 */ MCD_OPC_Decode, 208, 11, 100, // Opcode: XVSQRTSP /* 8046 */ MCD_OPC_FilterValue, 9, 45, 0, // Skip to: 8095 /* 8050 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8053 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8067 /* 8057 */ MCD_OPC_CheckField, 16, 5, 0, 118, 7, // Skip to: 9973 /* 8063 */ MCD_OPC_Decode, 154, 11, 100, // Opcode: XVCVSPSXWS /* 8067 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 8081 /* 8071 */ MCD_OPC_CheckField, 16, 5, 0, 104, 7, // Skip to: 9973 /* 8077 */ MCD_OPC_Decode, 204, 11, 100, // Opcode: XVRSPIZ /* 8081 */ MCD_OPC_FilterValue, 2, 96, 7, // Skip to: 9973 /* 8085 */ MCD_OPC_CheckField, 16, 5, 0, 90, 7, // Skip to: 9973 /* 8091 */ MCD_OPC_Decode, 199, 11, 100, // Opcode: XVRESP /* 8095 */ MCD_OPC_FilterValue, 10, 65, 0, // Skip to: 8164 /* 8099 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8102 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8116 /* 8106 */ MCD_OPC_CheckField, 16, 5, 0, 69, 7, // Skip to: 9973 /* 8112 */ MCD_OPC_Decode, 164, 11, 100, // Opcode: XVCVUXWSP /* 8116 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 8130 /* 8120 */ MCD_OPC_CheckField, 16, 5, 0, 55, 7, // Skip to: 9973 /* 8126 */ MCD_OPC_Decode, 203, 11, 100, // Opcode: XVRSPIP /* 8130 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 8150 /* 8134 */ MCD_OPC_CheckField, 16, 7, 0, 41, 7, // Skip to: 9973 /* 8140 */ MCD_OPC_CheckField, 0, 1, 0, 35, 7, // Skip to: 9973 /* 8146 */ MCD_OPC_Decode, 214, 11, 101, // Opcode: XVTSQRTSP /* 8150 */ MCD_OPC_FilterValue, 3, 27, 7, // Skip to: 9973 /* 8154 */ MCD_OPC_CheckField, 16, 5, 0, 21, 7, // Skip to: 9973 /* 8160 */ MCD_OPC_Decode, 201, 11, 100, // Opcode: XVRSPIC /* 8164 */ MCD_OPC_FilterValue, 11, 58, 0, // Skip to: 8226 /* 8168 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 8171 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 8206 /* 8175 */ MCD_OPC_ExtractField, 2, 1, // Inst{2} ... /* 8178 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8192 /* 8182 */ MCD_OPC_CheckField, 16, 5, 0, 249, 6, // Skip to: 9973 /* 8188 */ MCD_OPC_Decode, 160, 11, 100, // Opcode: XVCVSXWSP /* 8192 */ MCD_OPC_FilterValue, 1, 241, 6, // Skip to: 9973 /* 8196 */ MCD_OPC_CheckField, 16, 5, 0, 235, 6, // Skip to: 9973 /* 8202 */ MCD_OPC_Decode, 202, 11, 100, // Opcode: XVRSPIM /* 8206 */ MCD_OPC_FilterValue, 1, 227, 6, // Skip to: 9973 /* 8210 */ MCD_OPC_CheckField, 21, 2, 0, 221, 6, // Skip to: 9973 /* 8216 */ MCD_OPC_CheckField, 0, 1, 0, 215, 6, // Skip to: 9973 /* 8222 */ MCD_OPC_Decode, 212, 11, 102, // Opcode: XVTDIVSP /* 8226 */ MCD_OPC_FilterValue, 12, 59, 0, // Skip to: 8289 /* 8230 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8233 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8247 /* 8237 */ MCD_OPC_CheckField, 16, 5, 0, 194, 6, // Skip to: 9973 /* 8243 */ MCD_OPC_Decode, 151, 11, 100, // Opcode: XVCVDPUXWS /* 8247 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 8261 /* 8251 */ MCD_OPC_CheckField, 16, 5, 0, 180, 6, // Skip to: 9973 /* 8257 */ MCD_OPC_Decode, 193, 11, 100, // Opcode: XVRDPI /* 8261 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 8275 /* 8265 */ MCD_OPC_CheckField, 16, 5, 0, 166, 6, // Skip to: 9973 /* 8271 */ MCD_OPC_Decode, 205, 11, 100, // Opcode: XVRSQRTEDP /* 8275 */ MCD_OPC_FilterValue, 3, 158, 6, // Skip to: 9973 /* 8279 */ MCD_OPC_CheckField, 16, 5, 0, 152, 6, // Skip to: 9973 /* 8285 */ MCD_OPC_Decode, 207, 11, 100, // Opcode: XVSQRTDP /* 8289 */ MCD_OPC_FilterValue, 13, 45, 0, // Skip to: 8338 /* 8293 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8296 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8310 /* 8300 */ MCD_OPC_CheckField, 16, 5, 0, 131, 6, // Skip to: 9973 /* 8306 */ MCD_OPC_Decode, 149, 11, 100, // Opcode: XVCVDPSXWS /* 8310 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 8324 /* 8314 */ MCD_OPC_CheckField, 16, 5, 0, 117, 6, // Skip to: 9973 /* 8320 */ MCD_OPC_Decode, 197, 11, 100, // Opcode: XVRDPIZ /* 8324 */ MCD_OPC_FilterValue, 2, 109, 6, // Skip to: 9973 /* 8328 */ MCD_OPC_CheckField, 16, 5, 0, 103, 6, // Skip to: 9973 /* 8334 */ MCD_OPC_Decode, 198, 11, 100, // Opcode: XVREDP /* 8338 */ MCD_OPC_FilterValue, 14, 65, 0, // Skip to: 8407 /* 8342 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8345 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8359 /* 8349 */ MCD_OPC_CheckField, 16, 5, 0, 82, 6, // Skip to: 9973 /* 8355 */ MCD_OPC_Decode, 163, 11, 100, // Opcode: XVCVUXWDP /* 8359 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 8373 /* 8363 */ MCD_OPC_CheckField, 16, 5, 0, 68, 6, // Skip to: 9973 /* 8369 */ MCD_OPC_Decode, 196, 11, 100, // Opcode: XVRDPIP /* 8373 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 8393 /* 8377 */ MCD_OPC_CheckField, 16, 7, 0, 54, 6, // Skip to: 9973 /* 8383 */ MCD_OPC_CheckField, 0, 1, 0, 48, 6, // Skip to: 9973 /* 8389 */ MCD_OPC_Decode, 213, 11, 101, // Opcode: XVTSQRTDP /* 8393 */ MCD_OPC_FilterValue, 3, 40, 6, // Skip to: 9973 /* 8397 */ MCD_OPC_CheckField, 16, 5, 0, 34, 6, // Skip to: 9973 /* 8403 */ MCD_OPC_Decode, 194, 11, 100, // Opcode: XVRDPIC /* 8407 */ MCD_OPC_FilterValue, 15, 58, 0, // Skip to: 8469 /* 8411 */ MCD_OPC_ExtractField, 3, 1, // Inst{3} ... /* 8414 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 8449 /* 8418 */ MCD_OPC_ExtractField, 2, 1, // Inst{2} ... /* 8421 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8435 /* 8425 */ MCD_OPC_CheckField, 16, 5, 0, 6, 6, // Skip to: 9973 /* 8431 */ MCD_OPC_Decode, 159, 11, 100, // Opcode: XVCVSXWDP /* 8435 */ MCD_OPC_FilterValue, 1, 254, 5, // Skip to: 9973 /* 8439 */ MCD_OPC_CheckField, 16, 5, 0, 248, 5, // Skip to: 9973 /* 8445 */ MCD_OPC_Decode, 195, 11, 100, // Opcode: XVRDPIM /* 8449 */ MCD_OPC_FilterValue, 1, 240, 5, // Skip to: 9973 /* 8453 */ MCD_OPC_CheckField, 21, 2, 0, 234, 5, // Skip to: 9973 /* 8459 */ MCD_OPC_CheckField, 0, 1, 0, 228, 5, // Skip to: 9973 /* 8465 */ MCD_OPC_Decode, 211, 11, 102, // Opcode: XVTDIVDP /* 8469 */ MCD_OPC_FilterValue, 16, 16, 0, // Skip to: 8489 /* 8473 */ MCD_OPC_CheckField, 16, 5, 0, 214, 5, // Skip to: 9973 /* 8479 */ MCD_OPC_CheckField, 2, 2, 1, 208, 5, // Skip to: 9973 /* 8485 */ MCD_OPC_Decode, 224, 10, 98, // Opcode: XSCVDPSP /* 8489 */ MCD_OPC_FilterValue, 20, 31, 0, // Skip to: 8524 /* 8493 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8496 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8510 /* 8500 */ MCD_OPC_CheckField, 16, 5, 0, 187, 5, // Skip to: 9973 /* 8506 */ MCD_OPC_Decode, 227, 10, 98, // Opcode: XSCVDPUXDS /* 8510 */ MCD_OPC_FilterValue, 1, 179, 5, // Skip to: 9973 /* 8514 */ MCD_OPC_CheckField, 16, 5, 0, 173, 5, // Skip to: 9973 /* 8520 */ MCD_OPC_Decode, 229, 10, 98, // Opcode: XSCVSPDP /* 8524 */ MCD_OPC_FilterValue, 21, 31, 0, // Skip to: 8559 /* 8528 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8531 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8545 /* 8535 */ MCD_OPC_CheckField, 16, 5, 0, 152, 5, // Skip to: 9973 /* 8541 */ MCD_OPC_Decode, 225, 10, 98, // Opcode: XSCVDPSXDS /* 8545 */ MCD_OPC_FilterValue, 1, 144, 5, // Skip to: 9973 /* 8549 */ MCD_OPC_CheckField, 16, 5, 0, 138, 5, // Skip to: 9973 /* 8555 */ MCD_OPC_Decode, 219, 10, 98, // Opcode: XSABSDP /* 8559 */ MCD_OPC_FilterValue, 22, 31, 0, // Skip to: 8594 /* 8563 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8566 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8580 /* 8570 */ MCD_OPC_CheckField, 16, 5, 0, 117, 5, // Skip to: 9973 /* 8576 */ MCD_OPC_Decode, 231, 10, 98, // Opcode: XSCVUXDDP /* 8580 */ MCD_OPC_FilterValue, 1, 109, 5, // Skip to: 9973 /* 8584 */ MCD_OPC_CheckField, 16, 5, 0, 103, 5, // Skip to: 9973 /* 8590 */ MCD_OPC_Decode, 240, 10, 98, // Opcode: XSNABSDP /* 8594 */ MCD_OPC_FilterValue, 23, 31, 0, // Skip to: 8629 /* 8598 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8601 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8615 /* 8605 */ MCD_OPC_CheckField, 16, 5, 0, 82, 5, // Skip to: 9973 /* 8611 */ MCD_OPC_Decode, 230, 10, 98, // Opcode: XSCVSXDDP /* 8615 */ MCD_OPC_FilterValue, 1, 74, 5, // Skip to: 9973 /* 8619 */ MCD_OPC_CheckField, 16, 5, 0, 68, 5, // Skip to: 9973 /* 8625 */ MCD_OPC_Decode, 241, 10, 98, // Opcode: XSNEGDP /* 8629 */ MCD_OPC_FilterValue, 24, 31, 0, // Skip to: 8664 /* 8633 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8636 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8650 /* 8640 */ MCD_OPC_CheckField, 16, 5, 0, 47, 5, // Skip to: 9973 /* 8646 */ MCD_OPC_Decode, 155, 11, 100, // Opcode: XVCVSPUXDS /* 8650 */ MCD_OPC_FilterValue, 1, 39, 5, // Skip to: 9973 /* 8654 */ MCD_OPC_CheckField, 16, 5, 0, 33, 5, // Skip to: 9973 /* 8660 */ MCD_OPC_Decode, 147, 11, 100, // Opcode: XVCVDPSP /* 8664 */ MCD_OPC_FilterValue, 25, 31, 0, // Skip to: 8699 /* 8668 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8671 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8685 /* 8675 */ MCD_OPC_CheckField, 16, 5, 0, 12, 5, // Skip to: 9973 /* 8681 */ MCD_OPC_Decode, 153, 11, 100, // Opcode: XVCVSPSXDS /* 8685 */ MCD_OPC_FilterValue, 1, 4, 5, // Skip to: 9973 /* 8689 */ MCD_OPC_CheckField, 16, 5, 0, 254, 4, // Skip to: 9973 /* 8695 */ MCD_OPC_Decode, 130, 11, 100, // Opcode: XVABSSP /* 8699 */ MCD_OPC_FilterValue, 26, 31, 0, // Skip to: 8734 /* 8703 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8706 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8720 /* 8710 */ MCD_OPC_CheckField, 16, 5, 0, 233, 4, // Skip to: 9973 /* 8716 */ MCD_OPC_Decode, 162, 11, 100, // Opcode: XVCVUXDSP /* 8720 */ MCD_OPC_FilterValue, 1, 225, 4, // Skip to: 9973 /* 8724 */ MCD_OPC_CheckField, 16, 5, 0, 219, 4, // Skip to: 9973 /* 8730 */ MCD_OPC_Decode, 182, 11, 100, // Opcode: XVNABSSP /* 8734 */ MCD_OPC_FilterValue, 27, 31, 0, // Skip to: 8769 /* 8738 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8741 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8755 /* 8745 */ MCD_OPC_CheckField, 16, 5, 0, 198, 4, // Skip to: 9973 /* 8751 */ MCD_OPC_Decode, 158, 11, 100, // Opcode: XVCVSXDSP /* 8755 */ MCD_OPC_FilterValue, 1, 190, 4, // Skip to: 9973 /* 8759 */ MCD_OPC_CheckField, 16, 5, 0, 184, 4, // Skip to: 9973 /* 8765 */ MCD_OPC_Decode, 184, 11, 100, // Opcode: XVNEGSP /* 8769 */ MCD_OPC_FilterValue, 28, 31, 0, // Skip to: 8804 /* 8773 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8776 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8790 /* 8780 */ MCD_OPC_CheckField, 16, 5, 0, 163, 4, // Skip to: 9973 /* 8786 */ MCD_OPC_Decode, 150, 11, 100, // Opcode: XVCVDPUXDS /* 8790 */ MCD_OPC_FilterValue, 1, 155, 4, // Skip to: 9973 /* 8794 */ MCD_OPC_CheckField, 16, 5, 0, 149, 4, // Skip to: 9973 /* 8800 */ MCD_OPC_Decode, 152, 11, 100, // Opcode: XVCVSPDP /* 8804 */ MCD_OPC_FilterValue, 29, 31, 0, // Skip to: 8839 /* 8808 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8811 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8825 /* 8815 */ MCD_OPC_CheckField, 16, 5, 0, 128, 4, // Skip to: 9973 /* 8821 */ MCD_OPC_Decode, 148, 11, 100, // Opcode: XVCVDPSXDS /* 8825 */ MCD_OPC_FilterValue, 1, 120, 4, // Skip to: 9973 /* 8829 */ MCD_OPC_CheckField, 16, 5, 0, 114, 4, // Skip to: 9973 /* 8835 */ MCD_OPC_Decode, 129, 11, 100, // Opcode: XVABSDP /* 8839 */ MCD_OPC_FilterValue, 30, 31, 0, // Skip to: 8874 /* 8843 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8846 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8860 /* 8850 */ MCD_OPC_CheckField, 16, 5, 0, 93, 4, // Skip to: 9973 /* 8856 */ MCD_OPC_Decode, 161, 11, 100, // Opcode: XVCVUXDDP /* 8860 */ MCD_OPC_FilterValue, 1, 85, 4, // Skip to: 9973 /* 8864 */ MCD_OPC_CheckField, 16, 5, 0, 79, 4, // Skip to: 9973 /* 8870 */ MCD_OPC_Decode, 181, 11, 100, // Opcode: XVNABSDP /* 8874 */ MCD_OPC_FilterValue, 31, 71, 4, // Skip to: 9973 /* 8878 */ MCD_OPC_ExtractField, 2, 2, // Inst{3-2} ... /* 8881 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8895 /* 8885 */ MCD_OPC_CheckField, 16, 5, 0, 58, 4, // Skip to: 9973 /* 8891 */ MCD_OPC_Decode, 157, 11, 100, // Opcode: XVCVSXDDP /* 8895 */ MCD_OPC_FilterValue, 1, 50, 4, // Skip to: 9973 /* 8899 */ MCD_OPC_CheckField, 16, 5, 0, 44, 4, // Skip to: 9973 /* 8905 */ MCD_OPC_Decode, 183, 11, 100, // Opcode: XVNEGDP /* 8909 */ MCD_OPC_FilterValue, 3, 36, 4, // Skip to: 9973 /* 8913 */ MCD_OPC_Decode, 227, 11, 103, // Opcode: XXSEL /* 8917 */ MCD_OPC_FilterValue, 62, 19, 0, // Skip to: 8940 /* 8921 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ... /* 8924 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 8932 /* 8928 */ MCD_OPC_Decode, 160, 8, 85, // Opcode: STD /* 8932 */ MCD_OPC_FilterValue, 1, 13, 4, // Skip to: 9973 /* 8936 */ MCD_OPC_Decode, 164, 8, 85, // Opcode: STDU /* 8940 */ MCD_OPC_FilterValue, 63, 5, 4, // Skip to: 9973 /* 8944 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 8947 */ MCD_OPC_FilterValue, 0, 37, 0, // Skip to: 8988 /* 8951 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 8954 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 8968 /* 8958 */ MCD_OPC_CheckField, 21, 2, 0, 241, 3, // Skip to: 9973 /* 8964 */ MCD_OPC_Decode, 238, 3, 104, // Opcode: FCMPUS /* 8968 */ MCD_OPC_FilterValue, 2, 233, 3, // Skip to: 9973 /* 8972 */ MCD_OPC_CheckField, 21, 2, 0, 227, 3, // Skip to: 9973 /* 8978 */ MCD_OPC_CheckField, 11, 7, 0, 221, 3, // Skip to: 9973 /* 8984 */ MCD_OPC_Decode, 178, 5, 23, // Opcode: MCRFS /* 8988 */ MCD_OPC_FilterValue, 12, 45, 0, // Skip to: 9037 /* 8992 */ MCD_OPC_ExtractField, 6, 6, // Inst{11-6} ... /* 8995 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 9009 /* 8999 */ MCD_OPC_CheckField, 12, 9, 0, 200, 3, // Skip to: 9973 /* 9005 */ MCD_OPC_Decode, 208, 5, 75, // Opcode: MTFSB1 /* 9009 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 9023 /* 9013 */ MCD_OPC_CheckField, 12, 9, 0, 186, 3, // Skip to: 9973 /* 9019 */ MCD_OPC_Decode, 207, 5, 75, // Opcode: MTFSB0 /* 9023 */ MCD_OPC_FilterValue, 4, 178, 3, // Skip to: 9973 /* 9027 */ MCD_OPC_CheckField, 17, 6, 0, 172, 3, // Skip to: 9973 /* 9033 */ MCD_OPC_Decode, 210, 5, 105, // Opcode: MTFSFI /* 9037 */ MCD_OPC_FilterValue, 13, 16, 0, // Skip to: 9057 /* 9041 */ MCD_OPC_CheckField, 17, 6, 0, 158, 3, // Skip to: 9973 /* 9047 */ MCD_OPC_CheckField, 6, 6, 4, 152, 3, // Skip to: 9973 /* 9053 */ MCD_OPC_Decode, 211, 5, 105, // Opcode: MTFSFIo /* 9057 */ MCD_OPC_FilterValue, 14, 25, 0, // Skip to: 9086 /* 9061 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9064 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 9078 /* 9068 */ MCD_OPC_CheckField, 11, 10, 0, 131, 3, // Skip to: 9973 /* 9074 */ MCD_OPC_Decode, 184, 5, 106, // Opcode: MFFS /* 9078 */ MCD_OPC_FilterValue, 22, 123, 3, // Skip to: 9973 /* 9082 */ MCD_OPC_Decode, 209, 5, 107, // Opcode: MTFSF /* 9086 */ MCD_OPC_FilterValue, 15, 25, 0, // Skip to: 9115 /* 9090 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9093 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 9107 /* 9097 */ MCD_OPC_CheckField, 11, 10, 0, 102, 3, // Skip to: 9973 /* 9103 */ MCD_OPC_Decode, 185, 5, 106, // Opcode: MFFSo /* 9107 */ MCD_OPC_FilterValue, 22, 94, 3, // Skip to: 9973 /* 9111 */ MCD_OPC_Decode, 213, 5, 107, // Opcode: MTFSFo /* 9115 */ MCD_OPC_FilterValue, 16, 123, 0, // Skip to: 9242 /* 9119 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9122 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 9130 /* 9126 */ MCD_OPC_Decode, 241, 3, 87, // Opcode: FCPSGNS /* 9130 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 9144 /* 9134 */ MCD_OPC_CheckField, 16, 5, 0, 65, 3, // Skip to: 9973 /* 9140 */ MCD_OPC_Decode, 151, 4, 88, // Opcode: FNEGS /* 9144 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 9158 /* 9148 */ MCD_OPC_CheckField, 16, 5, 0, 51, 3, // Skip to: 9973 /* 9154 */ MCD_OPC_Decode, 135, 4, 88, // Opcode: FMR /* 9158 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 9172 /* 9162 */ MCD_OPC_CheckField, 16, 5, 0, 37, 3, // Skip to: 9973 /* 9168 */ MCD_OPC_Decode, 147, 4, 88, // Opcode: FNABSS /* 9172 */ MCD_OPC_FilterValue, 8, 10, 0, // Skip to: 9186 /* 9176 */ MCD_OPC_CheckField, 16, 5, 0, 23, 3, // Skip to: 9973 /* 9182 */ MCD_OPC_Decode, 222, 3, 88, // Opcode: FABSS /* 9186 */ MCD_OPC_FilterValue, 12, 10, 0, // Skip to: 9200 /* 9190 */ MCD_OPC_CheckField, 16, 5, 0, 9, 3, // Skip to: 9973 /* 9196 */ MCD_OPC_Decode, 171, 4, 88, // Opcode: FRINS /* 9200 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 9214 /* 9204 */ MCD_OPC_CheckField, 16, 5, 0, 251, 2, // Skip to: 9973 /* 9210 */ MCD_OPC_Decode, 179, 4, 88, // Opcode: FRIZS /* 9214 */ MCD_OPC_FilterValue, 14, 10, 0, // Skip to: 9228 /* 9218 */ MCD_OPC_CheckField, 16, 5, 0, 237, 2, // Skip to: 9973 /* 9224 */ MCD_OPC_Decode, 175, 4, 88, // Opcode: FRIPS /* 9228 */ MCD_OPC_FilterValue, 15, 229, 2, // Skip to: 9973 /* 9232 */ MCD_OPC_CheckField, 16, 5, 0, 223, 2, // Skip to: 9973 /* 9238 */ MCD_OPC_Decode, 167, 4, 88, // Opcode: FRIMS /* 9242 */ MCD_OPC_FilterValue, 17, 123, 0, // Skip to: 9369 /* 9246 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9249 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 9257 /* 9253 */ MCD_OPC_Decode, 242, 3, 87, // Opcode: FCPSGNSo /* 9257 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 9271 /* 9261 */ MCD_OPC_CheckField, 16, 5, 0, 194, 2, // Skip to: 9973 /* 9267 */ MCD_OPC_Decode, 152, 4, 88, // Opcode: FNEGSo /* 9271 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 9285 /* 9275 */ MCD_OPC_CheckField, 16, 5, 0, 180, 2, // Skip to: 9973 /* 9281 */ MCD_OPC_Decode, 136, 4, 88, // Opcode: FMRo /* 9285 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 9299 /* 9289 */ MCD_OPC_CheckField, 16, 5, 0, 166, 2, // Skip to: 9973 /* 9295 */ MCD_OPC_Decode, 148, 4, 88, // Opcode: FNABSSo /* 9299 */ MCD_OPC_FilterValue, 8, 10, 0, // Skip to: 9313 /* 9303 */ MCD_OPC_CheckField, 16, 5, 0, 152, 2, // Skip to: 9973 /* 9309 */ MCD_OPC_Decode, 223, 3, 88, // Opcode: FABSSo /* 9313 */ MCD_OPC_FilterValue, 12, 10, 0, // Skip to: 9327 /* 9317 */ MCD_OPC_CheckField, 16, 5, 0, 138, 2, // Skip to: 9973 /* 9323 */ MCD_OPC_Decode, 172, 4, 88, // Opcode: FRINSo /* 9327 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 9341 /* 9331 */ MCD_OPC_CheckField, 16, 5, 0, 124, 2, // Skip to: 9973 /* 9337 */ MCD_OPC_Decode, 180, 4, 88, // Opcode: FRIZSo /* 9341 */ MCD_OPC_FilterValue, 14, 10, 0, // Skip to: 9355 /* 9345 */ MCD_OPC_CheckField, 16, 5, 0, 110, 2, // Skip to: 9973 /* 9351 */ MCD_OPC_Decode, 176, 4, 88, // Opcode: FRIPSo /* 9355 */ MCD_OPC_FilterValue, 15, 102, 2, // Skip to: 9973 /* 9359 */ MCD_OPC_CheckField, 16, 5, 0, 96, 2, // Skip to: 9973 /* 9365 */ MCD_OPC_Decode, 168, 4, 88, // Opcode: FRIMSo /* 9369 */ MCD_OPC_FilterValue, 24, 16, 0, // Skip to: 9389 /* 9373 */ MCD_OPC_CheckField, 16, 5, 0, 82, 2, // Skip to: 9973 /* 9379 */ MCD_OPC_CheckField, 6, 5, 0, 76, 2, // Skip to: 9973 /* 9385 */ MCD_OPC_Decode, 181, 4, 86, // Opcode: FRSP /* 9389 */ MCD_OPC_FilterValue, 25, 16, 0, // Skip to: 9409 /* 9393 */ MCD_OPC_CheckField, 16, 5, 0, 62, 2, // Skip to: 9973 /* 9399 */ MCD_OPC_CheckField, 6, 5, 0, 56, 2, // Skip to: 9973 /* 9405 */ MCD_OPC_Decode, 182, 4, 86, // Opcode: FRSPo /* 9409 */ MCD_OPC_FilterValue, 28, 59, 0, // Skip to: 9472 /* 9413 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9416 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 9430 /* 9420 */ MCD_OPC_CheckField, 16, 5, 0, 35, 2, // Skip to: 9973 /* 9426 */ MCD_OPC_Decode, 249, 3, 108, // Opcode: FCTIW /* 9430 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 9444 /* 9434 */ MCD_OPC_CheckField, 16, 5, 0, 21, 2, // Skip to: 9973 /* 9440 */ MCD_OPC_Decode, 243, 3, 108, // Opcode: FCTID /* 9444 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 9458 /* 9448 */ MCD_OPC_CheckField, 16, 5, 0, 7, 2, // Skip to: 9973 /* 9454 */ MCD_OPC_Decode, 229, 3, 108, // Opcode: FCFID /* 9458 */ MCD_OPC_FilterValue, 30, 255, 1, // Skip to: 9973 /* 9462 */ MCD_OPC_CheckField, 16, 5, 0, 249, 1, // Skip to: 9973 /* 9468 */ MCD_OPC_Decode, 232, 3, 108, // Opcode: FCFIDU /* 9472 */ MCD_OPC_FilterValue, 29, 59, 0, // Skip to: 9535 /* 9476 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9479 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 9493 /* 9483 */ MCD_OPC_CheckField, 16, 5, 0, 228, 1, // Skip to: 9973 /* 9489 */ MCD_OPC_Decode, 254, 3, 108, // Opcode: FCTIWo /* 9493 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 9507 /* 9497 */ MCD_OPC_CheckField, 16, 5, 0, 214, 1, // Skip to: 9973 /* 9503 */ MCD_OPC_Decode, 248, 3, 108, // Opcode: FCTIDo /* 9507 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 9521 /* 9511 */ MCD_OPC_CheckField, 16, 5, 0, 200, 1, // Skip to: 9973 /* 9517 */ MCD_OPC_Decode, 236, 3, 108, // Opcode: FCFIDo /* 9521 */ MCD_OPC_FilterValue, 30, 192, 1, // Skip to: 9973 /* 9525 */ MCD_OPC_CheckField, 16, 5, 0, 186, 1, // Skip to: 9973 /* 9531 */ MCD_OPC_Decode, 235, 3, 108, // Opcode: FCFIDUo /* 9535 */ MCD_OPC_FilterValue, 30, 59, 0, // Skip to: 9598 /* 9539 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9542 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 9556 /* 9546 */ MCD_OPC_CheckField, 16, 5, 0, 165, 1, // Skip to: 9973 /* 9552 */ MCD_OPC_Decode, 252, 3, 108, // Opcode: FCTIWZ /* 9556 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 9570 /* 9560 */ MCD_OPC_CheckField, 16, 5, 0, 151, 1, // Skip to: 9973 /* 9566 */ MCD_OPC_Decode, 250, 3, 108, // Opcode: FCTIWUZ /* 9570 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 9584 /* 9574 */ MCD_OPC_CheckField, 16, 5, 0, 137, 1, // Skip to: 9973 /* 9580 */ MCD_OPC_Decode, 246, 3, 108, // Opcode: FCTIDZ /* 9584 */ MCD_OPC_FilterValue, 29, 129, 1, // Skip to: 9973 /* 9588 */ MCD_OPC_CheckField, 16, 5, 0, 123, 1, // Skip to: 9973 /* 9594 */ MCD_OPC_Decode, 244, 3, 108, // Opcode: FCTIDUZ /* 9598 */ MCD_OPC_FilterValue, 31, 59, 0, // Skip to: 9661 /* 9602 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 9605 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 9619 /* 9609 */ MCD_OPC_CheckField, 16, 5, 0, 102, 1, // Skip to: 9973 /* 9615 */ MCD_OPC_Decode, 253, 3, 108, // Opcode: FCTIWZo /* 9619 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 9633 /* 9623 */ MCD_OPC_CheckField, 16, 5, 0, 88, 1, // Skip to: 9973 /* 9629 */ MCD_OPC_Decode, 251, 3, 108, // Opcode: FCTIWUZo /* 9633 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 9647 /* 9637 */ MCD_OPC_CheckField, 16, 5, 0, 74, 1, // Skip to: 9973 /* 9643 */ MCD_OPC_Decode, 247, 3, 108, // Opcode: FCTIDZo /* 9647 */ MCD_OPC_FilterValue, 29, 66, 1, // Skip to: 9973 /* 9651 */ MCD_OPC_CheckField, 16, 5, 0, 60, 1, // Skip to: 9973 /* 9657 */ MCD_OPC_Decode, 245, 3, 108, // Opcode: FCTIDUZo /* 9661 */ MCD_OPC_FilterValue, 36, 10, 0, // Skip to: 9675 /* 9665 */ MCD_OPC_CheckField, 6, 5, 0, 46, 1, // Skip to: 9973 /* 9671 */ MCD_OPC_Decode, 255, 3, 109, // Opcode: FDIV /* 9675 */ MCD_OPC_FilterValue, 37, 10, 0, // Skip to: 9689 /* 9679 */ MCD_OPC_CheckField, 6, 5, 0, 32, 1, // Skip to: 9973 /* 9685 */ MCD_OPC_Decode, 130, 4, 109, // Opcode: FDIVo /* 9689 */ MCD_OPC_FilterValue, 40, 10, 0, // Skip to: 9703 /* 9693 */ MCD_OPC_CheckField, 6, 5, 0, 18, 1, // Skip to: 9973 /* 9699 */ MCD_OPC_Decode, 195, 4, 109, // Opcode: FSUB /* 9703 */ MCD_OPC_FilterValue, 41, 10, 0, // Skip to: 9717 /* 9707 */ MCD_OPC_CheckField, 6, 5, 0, 4, 1, // Skip to: 9973 /* 9713 */ MCD_OPC_Decode, 198, 4, 109, // Opcode: FSUBo /* 9717 */ MCD_OPC_FilterValue, 42, 10, 0, // Skip to: 9731 /* 9721 */ MCD_OPC_CheckField, 6, 5, 0, 246, 0, // Skip to: 9973 /* 9727 */ MCD_OPC_Decode, 224, 3, 109, // Opcode: FADD /* 9731 */ MCD_OPC_FilterValue, 43, 10, 0, // Skip to: 9745 /* 9735 */ MCD_OPC_CheckField, 6, 5, 0, 232, 0, // Skip to: 9973 /* 9741 */ MCD_OPC_Decode, 227, 3, 109, // Opcode: FADDo /* 9745 */ MCD_OPC_FilterValue, 44, 16, 0, // Skip to: 9765 /* 9749 */ MCD_OPC_CheckField, 16, 5, 0, 218, 0, // Skip to: 9973 /* 9755 */ MCD_OPC_CheckField, 6, 5, 0, 212, 0, // Skip to: 9973 /* 9761 */ MCD_OPC_Decode, 191, 4, 108, // Opcode: FSQRT /* 9765 */ MCD_OPC_FilterValue, 45, 16, 0, // Skip to: 9785 /* 9769 */ MCD_OPC_CheckField, 16, 5, 0, 198, 0, // Skip to: 9973 /* 9775 */ MCD_OPC_CheckField, 6, 5, 0, 192, 0, // Skip to: 9973 /* 9781 */ MCD_OPC_Decode, 194, 4, 108, // Opcode: FSQRTo /* 9785 */ MCD_OPC_FilterValue, 46, 4, 0, // Skip to: 9793 /* 9789 */ MCD_OPC_Decode, 189, 4, 110, // Opcode: FSELS /* 9793 */ MCD_OPC_FilterValue, 47, 4, 0, // Skip to: 9801 /* 9797 */ MCD_OPC_Decode, 190, 4, 110, // Opcode: FSELSo /* 9801 */ MCD_OPC_FilterValue, 48, 16, 0, // Skip to: 9821 /* 9805 */ MCD_OPC_CheckField, 16, 5, 0, 162, 0, // Skip to: 9973 /* 9811 */ MCD_OPC_CheckField, 6, 5, 0, 156, 0, // Skip to: 9973 /* 9817 */ MCD_OPC_Decode, 161, 4, 108, // Opcode: FRE /* 9821 */ MCD_OPC_FilterValue, 49, 16, 0, // Skip to: 9841 /* 9825 */ MCD_OPC_CheckField, 16, 5, 0, 142, 0, // Skip to: 9973 /* 9831 */ MCD_OPC_CheckField, 6, 5, 0, 136, 0, // Skip to: 9973 /* 9837 */ MCD_OPC_Decode, 164, 4, 108, // Opcode: FREo /* 9841 */ MCD_OPC_FilterValue, 50, 10, 0, // Skip to: 9855 /* 9845 */ MCD_OPC_CheckField, 11, 5, 0, 122, 0, // Skip to: 9973 /* 9851 */ MCD_OPC_Decode, 141, 4, 111, // Opcode: FMUL /* 9855 */ MCD_OPC_FilterValue, 51, 10, 0, // Skip to: 9869 /* 9859 */ MCD_OPC_CheckField, 11, 5, 0, 108, 0, // Skip to: 9973 /* 9865 */ MCD_OPC_Decode, 144, 4, 111, // Opcode: FMULo /* 9869 */ MCD_OPC_FilterValue, 52, 16, 0, // Skip to: 9889 /* 9873 */ MCD_OPC_CheckField, 16, 5, 0, 94, 0, // Skip to: 9973 /* 9879 */ MCD_OPC_CheckField, 6, 5, 0, 88, 0, // Skip to: 9973 /* 9885 */ MCD_OPC_Decode, 183, 4, 108, // Opcode: FRSQRTE /* 9889 */ MCD_OPC_FilterValue, 53, 16, 0, // Skip to: 9909 /* 9893 */ MCD_OPC_CheckField, 16, 5, 0, 74, 0, // Skip to: 9973 /* 9899 */ MCD_OPC_CheckField, 6, 5, 0, 68, 0, // Skip to: 9973 /* 9905 */ MCD_OPC_Decode, 186, 4, 108, // Opcode: FRSQRTEo /* 9909 */ MCD_OPC_FilterValue, 56, 4, 0, // Skip to: 9917 /* 9913 */ MCD_OPC_Decode, 137, 4, 112, // Opcode: FMSUB /* 9917 */ MCD_OPC_FilterValue, 57, 4, 0, // Skip to: 9925 /* 9921 */ MCD_OPC_Decode, 140, 4, 112, // Opcode: FMSUBo /* 9925 */ MCD_OPC_FilterValue, 58, 4, 0, // Skip to: 9933 /* 9929 */ MCD_OPC_Decode, 131, 4, 112, // Opcode: FMADD /* 9933 */ MCD_OPC_FilterValue, 59, 4, 0, // Skip to: 9941 /* 9937 */ MCD_OPC_Decode, 134, 4, 112, // Opcode: FMADDo /* 9941 */ MCD_OPC_FilterValue, 60, 4, 0, // Skip to: 9949 /* 9945 */ MCD_OPC_Decode, 157, 4, 112, // Opcode: FNMSUB /* 9949 */ MCD_OPC_FilterValue, 61, 4, 0, // Skip to: 9957 /* 9953 */ MCD_OPC_Decode, 160, 4, 112, // Opcode: FNMSUBo /* 9957 */ MCD_OPC_FilterValue, 62, 4, 0, // Skip to: 9965 /* 9961 */ MCD_OPC_Decode, 153, 4, 112, // Opcode: FNMADD /* 9965 */ MCD_OPC_FilterValue, 63, 4, 0, // Skip to: 9973 /* 9969 */ MCD_OPC_Decode, 156, 4, 112, // Opcode: FNMADDo /* 9973 */ MCD_OPC_Fail, 0 }; static uint8_t DecoderTableQPX32[] = { /* 0 */ MCD_OPC_ExtractField, 0, 6, // Inst{5-0} ... /* 3 */ MCD_OPC_FilterValue, 0, 59, 0, // Skip to: 66 /* 7 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 10 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 24 /* 14 */ MCD_OPC_CheckField, 26, 6, 4, 68, 7, // Skip to: 1880 /* 20 */ MCD_OPC_Decode, 163, 6, 113, // Opcode: QVFCMPEQb /* 24 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 38 /* 28 */ MCD_OPC_CheckField, 26, 6, 4, 54, 7, // Skip to: 1880 /* 34 */ MCD_OPC_Decode, 166, 6, 113, // Opcode: QVFCMPGTb /* 38 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 52 /* 42 */ MCD_OPC_CheckField, 26, 6, 4, 40, 7, // Skip to: 1880 /* 48 */ MCD_OPC_Decode, 233, 6, 113, // Opcode: QVFTSTNANb /* 52 */ MCD_OPC_FilterValue, 3, 32, 7, // Skip to: 1880 /* 56 */ MCD_OPC_CheckField, 26, 6, 4, 26, 7, // Skip to: 1880 /* 62 */ MCD_OPC_Decode, 169, 6, 113, // Opcode: QVFCMPLTb /* 66 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 89 /* 70 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 73 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 81 /* 77 */ MCD_OPC_Decode, 242, 6, 114, // Opcode: QVFXXMADDS /* 81 */ MCD_OPC_FilterValue, 4, 3, 7, // Skip to: 1880 /* 85 */ MCD_OPC_Decode, 241, 6, 114, // Opcode: QVFXXMADD /* 89 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 112 /* 93 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 96 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 104 /* 100 */ MCD_OPC_Decode, 240, 6, 114, // Opcode: QVFXXCPNMADDS /* 104 */ MCD_OPC_FilterValue, 4, 236, 6, // Skip to: 1880 /* 108 */ MCD_OPC_Decode, 239, 6, 114, // Opcode: QVFXXCPNMADD /* 112 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 132 /* 116 */ MCD_OPC_CheckField, 26, 6, 4, 222, 6, // Skip to: 1880 /* 122 */ MCD_OPC_CheckField, 6, 1, 0, 216, 6, // Skip to: 1880 /* 128 */ MCD_OPC_Decode, 183, 6, 115, // Opcode: QVFLOGICALb /* 132 */ MCD_OPC_FilterValue, 10, 180, 0, // Skip to: 316 /* 136 */ MCD_OPC_ExtractField, 6, 3, // Inst{8-6} ... /* 139 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 153 /* 143 */ MCD_OPC_CheckField, 26, 6, 4, 195, 6, // Skip to: 1880 /* 149 */ MCD_OPC_Decode, 146, 6, 116, // Opcode: QVALIGNI /* 153 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 173 /* 157 */ MCD_OPC_CheckField, 26, 6, 4, 181, 6, // Skip to: 1880 /* 163 */ MCD_OPC_CheckField, 11, 5, 0, 175, 6, // Skip to: 1880 /* 169 */ MCD_OPC_Decode, 149, 6, 117, // Opcode: QVESPLATI /* 173 */ MCD_OPC_FilterValue, 4, 34, 0, // Skip to: 211 /* 177 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 180 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 188 /* 184 */ MCD_OPC_Decode, 245, 6, 118, // Opcode: QVGPCI /* 188 */ MCD_OPC_FilterValue, 31, 152, 6, // Skip to: 1880 /* 192 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 195 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 203 /* 199 */ MCD_OPC_Decode, 161, 7, 119, // Opcode: QVSTFCSXI /* 203 */ MCD_OPC_FilterValue, 2, 137, 6, // Skip to: 1880 /* 207 */ MCD_OPC_Decode, 182, 7, 119, // Opcode: QVSTFSXI /* 211 */ MCD_OPC_FilterValue, 5, 31, 0, // Skip to: 246 /* 215 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 218 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 232 /* 222 */ MCD_OPC_CheckField, 26, 6, 31, 116, 6, // Skip to: 1880 /* 228 */ MCD_OPC_Decode, 157, 7, 119, // Opcode: QVSTFCSUXI /* 232 */ MCD_OPC_FilterValue, 2, 108, 6, // Skip to: 1880 /* 236 */ MCD_OPC_CheckField, 26, 6, 31, 102, 6, // Skip to: 1880 /* 242 */ MCD_OPC_Decode, 177, 7, 119, // Opcode: QVSTFSUXI /* 246 */ MCD_OPC_FilterValue, 6, 31, 0, // Skip to: 281 /* 250 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 253 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 267 /* 257 */ MCD_OPC_CheckField, 26, 6, 31, 81, 6, // Skip to: 1880 /* 263 */ MCD_OPC_Decode, 153, 7, 119, // Opcode: QVSTFCDXI /* 267 */ MCD_OPC_FilterValue, 2, 73, 6, // Skip to: 1880 /* 271 */ MCD_OPC_CheckField, 26, 6, 31, 67, 6, // Skip to: 1880 /* 277 */ MCD_OPC_Decode, 170, 7, 119, // Opcode: QVSTFDXI /* 281 */ MCD_OPC_FilterValue, 7, 59, 6, // Skip to: 1880 /* 285 */ MCD_OPC_ExtractField, 9, 2, // Inst{10-9} ... /* 288 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 302 /* 292 */ MCD_OPC_CheckField, 26, 6, 31, 46, 6, // Skip to: 1880 /* 298 */ MCD_OPC_Decode, 149, 7, 119, // Opcode: QVSTFCDUXI /* 302 */ MCD_OPC_FilterValue, 2, 38, 6, // Skip to: 1880 /* 306 */ MCD_OPC_CheckField, 26, 6, 31, 32, 6, // Skip to: 1880 /* 312 */ MCD_OPC_Decode, 166, 7, 119, // Opcode: QVSTFDUXI /* 316 */ MCD_OPC_FilterValue, 11, 115, 0, // Skip to: 435 /* 320 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 323 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 337 /* 327 */ MCD_OPC_CheckField, 26, 6, 31, 11, 6, // Skip to: 1880 /* 333 */ MCD_OPC_Decode, 162, 7, 119, // Opcode: QVSTFCSXIA /* 337 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 351 /* 341 */ MCD_OPC_CheckField, 26, 6, 31, 253, 5, // Skip to: 1880 /* 347 */ MCD_OPC_Decode, 158, 7, 119, // Opcode: QVSTFCSUXIA /* 351 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 365 /* 355 */ MCD_OPC_CheckField, 26, 6, 31, 239, 5, // Skip to: 1880 /* 361 */ MCD_OPC_Decode, 154, 7, 119, // Opcode: QVSTFCDXIA /* 365 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 379 /* 369 */ MCD_OPC_CheckField, 26, 6, 31, 225, 5, // Skip to: 1880 /* 375 */ MCD_OPC_Decode, 150, 7, 119, // Opcode: QVSTFCDUXIA /* 379 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 393 /* 383 */ MCD_OPC_CheckField, 26, 6, 31, 211, 5, // Skip to: 1880 /* 389 */ MCD_OPC_Decode, 183, 7, 119, // Opcode: QVSTFSXIA /* 393 */ MCD_OPC_FilterValue, 21, 10, 0, // Skip to: 407 /* 397 */ MCD_OPC_CheckField, 26, 6, 31, 197, 5, // Skip to: 1880 /* 403 */ MCD_OPC_Decode, 178, 7, 119, // Opcode: QVSTFSUXIA /* 407 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 421 /* 411 */ MCD_OPC_CheckField, 26, 6, 31, 183, 5, // Skip to: 1880 /* 417 */ MCD_OPC_Decode, 171, 7, 119, // Opcode: QVSTFDXIA /* 421 */ MCD_OPC_FilterValue, 23, 175, 5, // Skip to: 1880 /* 425 */ MCD_OPC_CheckField, 26, 6, 31, 169, 5, // Skip to: 1880 /* 431 */ MCD_OPC_Decode, 167, 7, 119, // Opcode: QVSTFDUXIA /* 435 */ MCD_OPC_FilterValue, 12, 50, 0, // Skip to: 489 /* 439 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 442 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 450 /* 446 */ MCD_OPC_Decode, 207, 6, 114, // Opcode: QVFPERM /* 450 */ MCD_OPC_FilterValue, 31, 146, 5, // Skip to: 1880 /* 454 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 457 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 465 /* 461 */ MCD_OPC_Decode, 146, 7, 119, // Opcode: QVLPCRSX /* 465 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 473 /* 469 */ MCD_OPC_Decode, 145, 7, 119, // Opcode: QVLPCRDX /* 473 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 481 /* 477 */ MCD_OPC_Decode, 143, 7, 119, // Opcode: QVLPCLSX /* 481 */ MCD_OPC_FilterValue, 18, 115, 5, // Skip to: 1880 /* 485 */ MCD_OPC_Decode, 142, 7, 119, // Opcode: QVLPCLDX /* 489 */ MCD_OPC_FilterValue, 14, 13, 1, // Skip to: 762 /* 493 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 496 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 510 /* 500 */ MCD_OPC_CheckField, 26, 6, 31, 94, 5, // Skip to: 1880 /* 506 */ MCD_OPC_Decode, 252, 6, 119, // Opcode: QVLFCSX /* 510 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 524 /* 514 */ MCD_OPC_CheckField, 26, 6, 31, 80, 5, // Skip to: 1880 /* 520 */ MCD_OPC_Decode, 250, 6, 119, // Opcode: QVLFCSUX /* 524 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 538 /* 528 */ MCD_OPC_CheckField, 26, 6, 31, 66, 5, // Skip to: 1880 /* 534 */ MCD_OPC_Decode, 248, 6, 119, // Opcode: QVLFCDX /* 538 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 552 /* 542 */ MCD_OPC_CheckField, 26, 6, 31, 52, 5, // Skip to: 1880 /* 548 */ MCD_OPC_Decode, 246, 6, 119, // Opcode: QVLFCDUX /* 552 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 566 /* 556 */ MCD_OPC_CheckField, 26, 6, 31, 38, 5, // Skip to: 1880 /* 562 */ MCD_OPC_Decode, 159, 7, 119, // Opcode: QVSTFCSX /* 566 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 580 /* 570 */ MCD_OPC_CheckField, 26, 6, 31, 24, 5, // Skip to: 1880 /* 576 */ MCD_OPC_Decode, 155, 7, 119, // Opcode: QVSTFCSUX /* 580 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 594 /* 584 */ MCD_OPC_CheckField, 26, 6, 31, 10, 5, // Skip to: 1880 /* 590 */ MCD_OPC_Decode, 151, 7, 119, // Opcode: QVSTFCDX /* 594 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 608 /* 598 */ MCD_OPC_CheckField, 26, 6, 31, 252, 4, // Skip to: 1880 /* 604 */ MCD_OPC_Decode, 147, 7, 119, // Opcode: QVSTFCDUX /* 608 */ MCD_OPC_FilterValue, 16, 10, 0, // Skip to: 622 /* 612 */ MCD_OPC_CheckField, 26, 6, 31, 238, 4, // Skip to: 1880 /* 618 */ MCD_OPC_Decode, 138, 7, 119, // Opcode: QVLFSX /* 622 */ MCD_OPC_FilterValue, 17, 10, 0, // Skip to: 636 /* 626 */ MCD_OPC_CheckField, 26, 6, 31, 224, 4, // Skip to: 1880 /* 632 */ MCD_OPC_Decode, 136, 7, 120, // Opcode: QVLFSUX /* 636 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 650 /* 640 */ MCD_OPC_CheckField, 26, 6, 31, 210, 4, // Skip to: 1880 /* 646 */ MCD_OPC_Decode, 129, 7, 119, // Opcode: QVLFDX /* 650 */ MCD_OPC_FilterValue, 19, 10, 0, // Skip to: 664 /* 654 */ MCD_OPC_CheckField, 26, 6, 31, 196, 4, // Skip to: 1880 /* 660 */ MCD_OPC_Decode, 255, 6, 121, // Opcode: QVLFDUX /* 664 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 678 /* 668 */ MCD_OPC_CheckField, 26, 6, 31, 182, 4, // Skip to: 1880 /* 674 */ MCD_OPC_Decode, 180, 7, 119, // Opcode: QVSTFSX /* 678 */ MCD_OPC_FilterValue, 21, 10, 0, // Skip to: 692 /* 682 */ MCD_OPC_CheckField, 26, 6, 31, 168, 4, // Skip to: 1880 /* 688 */ MCD_OPC_Decode, 175, 7, 122, // Opcode: QVSTFSUX /* 692 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 706 /* 696 */ MCD_OPC_CheckField, 26, 6, 31, 154, 4, // Skip to: 1880 /* 702 */ MCD_OPC_Decode, 168, 7, 119, // Opcode: QVSTFDX /* 706 */ MCD_OPC_FilterValue, 23, 10, 0, // Skip to: 720 /* 710 */ MCD_OPC_CheckField, 26, 6, 31, 140, 4, // Skip to: 1880 /* 716 */ MCD_OPC_Decode, 164, 7, 123, // Opcode: QVSTFDUX /* 720 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 734 /* 724 */ MCD_OPC_CheckField, 26, 6, 31, 126, 4, // Skip to: 1880 /* 730 */ MCD_OPC_Decode, 134, 7, 119, // Opcode: QVLFIWZX /* 734 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 748 /* 738 */ MCD_OPC_CheckField, 26, 6, 31, 112, 4, // Skip to: 1880 /* 744 */ MCD_OPC_Decode, 132, 7, 119, // Opcode: QVLFIWAX /* 748 */ MCD_OPC_FilterValue, 30, 104, 4, // Skip to: 1880 /* 752 */ MCD_OPC_CheckField, 26, 6, 31, 98, 4, // Skip to: 1880 /* 758 */ MCD_OPC_Decode, 173, 7, 119, // Opcode: QVSTFIWX /* 762 */ MCD_OPC_FilterValue, 15, 13, 1, // Skip to: 1035 /* 766 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 769 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 783 /* 773 */ MCD_OPC_CheckField, 26, 6, 31, 77, 4, // Skip to: 1880 /* 779 */ MCD_OPC_Decode, 253, 6, 119, // Opcode: QVLFCSXA /* 783 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 797 /* 787 */ MCD_OPC_CheckField, 26, 6, 31, 63, 4, // Skip to: 1880 /* 793 */ MCD_OPC_Decode, 251, 6, 119, // Opcode: QVLFCSUXA /* 797 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 811 /* 801 */ MCD_OPC_CheckField, 26, 6, 31, 49, 4, // Skip to: 1880 /* 807 */ MCD_OPC_Decode, 249, 6, 119, // Opcode: QVLFCDXA /* 811 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 825 /* 815 */ MCD_OPC_CheckField, 26, 6, 31, 35, 4, // Skip to: 1880 /* 821 */ MCD_OPC_Decode, 247, 6, 119, // Opcode: QVLFCDUXA /* 825 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 839 /* 829 */ MCD_OPC_CheckField, 26, 6, 31, 21, 4, // Skip to: 1880 /* 835 */ MCD_OPC_Decode, 160, 7, 119, // Opcode: QVSTFCSXA /* 839 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 853 /* 843 */ MCD_OPC_CheckField, 26, 6, 31, 7, 4, // Skip to: 1880 /* 849 */ MCD_OPC_Decode, 156, 7, 119, // Opcode: QVSTFCSUXA /* 853 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 867 /* 857 */ MCD_OPC_CheckField, 26, 6, 31, 249, 3, // Skip to: 1880 /* 863 */ MCD_OPC_Decode, 152, 7, 119, // Opcode: QVSTFCDXA /* 867 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 881 /* 871 */ MCD_OPC_CheckField, 26, 6, 31, 235, 3, // Skip to: 1880 /* 877 */ MCD_OPC_Decode, 148, 7, 119, // Opcode: QVSTFCDUXA /* 881 */ MCD_OPC_FilterValue, 16, 10, 0, // Skip to: 895 /* 885 */ MCD_OPC_CheckField, 26, 6, 31, 221, 3, // Skip to: 1880 /* 891 */ MCD_OPC_Decode, 139, 7, 119, // Opcode: QVLFSXA /* 895 */ MCD_OPC_FilterValue, 17, 10, 0, // Skip to: 909 /* 899 */ MCD_OPC_CheckField, 26, 6, 31, 207, 3, // Skip to: 1880 /* 905 */ MCD_OPC_Decode, 137, 7, 119, // Opcode: QVLFSUXA /* 909 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 923 /* 913 */ MCD_OPC_CheckField, 26, 6, 31, 193, 3, // Skip to: 1880 /* 919 */ MCD_OPC_Decode, 130, 7, 119, // Opcode: QVLFDXA /* 923 */ MCD_OPC_FilterValue, 19, 10, 0, // Skip to: 937 /* 927 */ MCD_OPC_CheckField, 26, 6, 31, 179, 3, // Skip to: 1880 /* 933 */ MCD_OPC_Decode, 128, 7, 119, // Opcode: QVLFDUXA /* 937 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 951 /* 941 */ MCD_OPC_CheckField, 26, 6, 31, 165, 3, // Skip to: 1880 /* 947 */ MCD_OPC_Decode, 181, 7, 119, // Opcode: QVSTFSXA /* 951 */ MCD_OPC_FilterValue, 21, 10, 0, // Skip to: 965 /* 955 */ MCD_OPC_CheckField, 26, 6, 31, 151, 3, // Skip to: 1880 /* 961 */ MCD_OPC_Decode, 176, 7, 119, // Opcode: QVSTFSUXA /* 965 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 979 /* 969 */ MCD_OPC_CheckField, 26, 6, 31, 137, 3, // Skip to: 1880 /* 975 */ MCD_OPC_Decode, 169, 7, 119, // Opcode: QVSTFDXA /* 979 */ MCD_OPC_FilterValue, 23, 10, 0, // Skip to: 993 /* 983 */ MCD_OPC_CheckField, 26, 6, 31, 123, 3, // Skip to: 1880 /* 989 */ MCD_OPC_Decode, 165, 7, 119, // Opcode: QVSTFDUXA /* 993 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 1007 /* 997 */ MCD_OPC_CheckField, 26, 6, 31, 109, 3, // Skip to: 1880 /* 1003 */ MCD_OPC_Decode, 135, 7, 119, // Opcode: QVLFIWZXA /* 1007 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 1021 /* 1011 */ MCD_OPC_CheckField, 26, 6, 31, 95, 3, // Skip to: 1880 /* 1017 */ MCD_OPC_Decode, 133, 7, 119, // Opcode: QVLFIWAXA /* 1021 */ MCD_OPC_FilterValue, 30, 87, 3, // Skip to: 1880 /* 1025 */ MCD_OPC_CheckField, 26, 6, 31, 81, 3, // Skip to: 1880 /* 1031 */ MCD_OPC_Decode, 174, 7, 119, // Opcode: QVSTFIWXA /* 1035 */ MCD_OPC_FilterValue, 16, 177, 0, // Skip to: 1216 /* 1039 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1042 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1056 /* 1046 */ MCD_OPC_CheckField, 26, 6, 4, 60, 3, // Skip to: 1880 /* 1052 */ MCD_OPC_Decode, 171, 6, 124, // Opcode: QVFCPSGN /* 1056 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 1076 /* 1060 */ MCD_OPC_CheckField, 26, 6, 4, 46, 3, // Skip to: 1880 /* 1066 */ MCD_OPC_CheckField, 16, 5, 0, 40, 3, // Skip to: 1880 /* 1072 */ MCD_OPC_Decode, 199, 6, 125, // Opcode: QVFNEG /* 1076 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 1096 /* 1080 */ MCD_OPC_CheckField, 26, 6, 4, 26, 3, // Skip to: 1880 /* 1086 */ MCD_OPC_CheckField, 16, 5, 0, 20, 3, // Skip to: 1880 /* 1092 */ MCD_OPC_Decode, 188, 6, 125, // Opcode: QVFMR /* 1096 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 1116 /* 1100 */ MCD_OPC_CheckField, 26, 6, 4, 6, 3, // Skip to: 1880 /* 1106 */ MCD_OPC_CheckField, 16, 5, 0, 0, 3, // Skip to: 1880 /* 1112 */ MCD_OPC_Decode, 197, 6, 125, // Opcode: QVFNABS /* 1116 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 1136 /* 1120 */ MCD_OPC_CheckField, 26, 6, 4, 242, 2, // Skip to: 1880 /* 1126 */ MCD_OPC_CheckField, 16, 5, 0, 236, 2, // Skip to: 1880 /* 1132 */ MCD_OPC_Decode, 152, 6, 125, // Opcode: QVFABS /* 1136 */ MCD_OPC_FilterValue, 12, 16, 0, // Skip to: 1156 /* 1140 */ MCD_OPC_CheckField, 26, 6, 4, 222, 2, // Skip to: 1880 /* 1146 */ MCD_OPC_CheckField, 16, 5, 0, 216, 2, // Skip to: 1880 /* 1152 */ MCD_OPC_Decode, 214, 6, 125, // Opcode: QVFRIN /* 1156 */ MCD_OPC_FilterValue, 13, 16, 0, // Skip to: 1176 /* 1160 */ MCD_OPC_CheckField, 26, 6, 4, 202, 2, // Skip to: 1880 /* 1166 */ MCD_OPC_CheckField, 16, 5, 0, 196, 2, // Skip to: 1880 /* 1172 */ MCD_OPC_Decode, 218, 6, 125, // Opcode: QVFRIZ /* 1176 */ MCD_OPC_FilterValue, 14, 16, 0, // Skip to: 1196 /* 1180 */ MCD_OPC_CheckField, 26, 6, 4, 182, 2, // Skip to: 1880 /* 1186 */ MCD_OPC_CheckField, 16, 5, 0, 176, 2, // Skip to: 1880 /* 1192 */ MCD_OPC_Decode, 216, 6, 125, // Opcode: QVFRIP /* 1196 */ MCD_OPC_FilterValue, 15, 168, 2, // Skip to: 1880 /* 1200 */ MCD_OPC_CheckField, 26, 6, 4, 162, 2, // Skip to: 1880 /* 1206 */ MCD_OPC_CheckField, 16, 5, 0, 156, 2, // Skip to: 1880 /* 1212 */ MCD_OPC_Decode, 212, 6, 125, // Opcode: QVFRIM /* 1216 */ MCD_OPC_FilterValue, 18, 19, 0, // Skip to: 1239 /* 1220 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1223 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1231 /* 1227 */ MCD_OPC_Decode, 236, 6, 114, // Opcode: QVFXMADDS /* 1231 */ MCD_OPC_FilterValue, 4, 133, 2, // Skip to: 1880 /* 1235 */ MCD_OPC_Decode, 235, 6, 114, // Opcode: QVFXMADD /* 1239 */ MCD_OPC_FilterValue, 22, 19, 0, // Skip to: 1262 /* 1243 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1246 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1254 /* 1250 */ MCD_OPC_Decode, 244, 6, 114, // Opcode: QVFXXNPMADDS /* 1254 */ MCD_OPC_FilterValue, 4, 110, 2, // Skip to: 1880 /* 1258 */ MCD_OPC_Decode, 243, 6, 114, // Opcode: QVFXXNPMADD /* 1262 */ MCD_OPC_FilterValue, 24, 22, 0, // Skip to: 1288 /* 1266 */ MCD_OPC_CheckField, 26, 6, 4, 96, 2, // Skip to: 1880 /* 1272 */ MCD_OPC_CheckField, 16, 5, 0, 90, 2, // Skip to: 1880 /* 1278 */ MCD_OPC_CheckField, 6, 5, 0, 84, 2, // Skip to: 1880 /* 1284 */ MCD_OPC_Decode, 221, 6, 126, // Opcode: QVFRSPs /* 1288 */ MCD_OPC_FilterValue, 28, 153, 0, // Skip to: 1445 /* 1292 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1295 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 1315 /* 1299 */ MCD_OPC_CheckField, 26, 6, 4, 63, 2, // Skip to: 1880 /* 1305 */ MCD_OPC_CheckField, 16, 5, 0, 57, 2, // Skip to: 1880 /* 1311 */ MCD_OPC_Decode, 178, 6, 125, // Opcode: QVFCTIW /* 1315 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 1335 /* 1319 */ MCD_OPC_CheckField, 26, 6, 4, 43, 2, // Skip to: 1880 /* 1325 */ MCD_OPC_CheckField, 16, 5, 0, 37, 2, // Skip to: 1880 /* 1331 */ MCD_OPC_Decode, 179, 6, 125, // Opcode: QVFCTIWU /* 1335 */ MCD_OPC_FilterValue, 25, 16, 0, // Skip to: 1355 /* 1339 */ MCD_OPC_CheckField, 26, 6, 4, 23, 2, // Skip to: 1880 /* 1345 */ MCD_OPC_CheckField, 16, 5, 0, 17, 2, // Skip to: 1880 /* 1351 */ MCD_OPC_Decode, 173, 6, 125, // Opcode: QVFCTID /* 1355 */ MCD_OPC_FilterValue, 26, 31, 0, // Skip to: 1390 /* 1359 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1362 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1376 /* 1366 */ MCD_OPC_CheckField, 16, 5, 0, 252, 1, // Skip to: 1880 /* 1372 */ MCD_OPC_Decode, 158, 6, 125, // Opcode: QVFCFIDS /* 1376 */ MCD_OPC_FilterValue, 4, 244, 1, // Skip to: 1880 /* 1380 */ MCD_OPC_CheckField, 16, 5, 0, 238, 1, // Skip to: 1880 /* 1386 */ MCD_OPC_Decode, 157, 6, 125, // Opcode: QVFCFID /* 1390 */ MCD_OPC_FilterValue, 29, 16, 0, // Skip to: 1410 /* 1394 */ MCD_OPC_CheckField, 26, 6, 4, 224, 1, // Skip to: 1880 /* 1400 */ MCD_OPC_CheckField, 16, 5, 0, 218, 1, // Skip to: 1880 /* 1406 */ MCD_OPC_Decode, 174, 6, 125, // Opcode: QVFCTIDU /* 1410 */ MCD_OPC_FilterValue, 30, 210, 1, // Skip to: 1880 /* 1414 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1417 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1431 /* 1421 */ MCD_OPC_CheckField, 16, 5, 0, 197, 1, // Skip to: 1880 /* 1427 */ MCD_OPC_Decode, 160, 6, 125, // Opcode: QVFCFIDUS /* 1431 */ MCD_OPC_FilterValue, 4, 189, 1, // Skip to: 1880 /* 1435 */ MCD_OPC_CheckField, 16, 5, 0, 183, 1, // Skip to: 1880 /* 1441 */ MCD_OPC_Decode, 159, 6, 125, // Opcode: QVFCFIDU /* 1445 */ MCD_OPC_FilterValue, 30, 83, 0, // Skip to: 1532 /* 1449 */ MCD_OPC_ExtractField, 6, 5, // Inst{10-6} ... /* 1452 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 1472 /* 1456 */ MCD_OPC_CheckField, 26, 6, 4, 162, 1, // Skip to: 1880 /* 1462 */ MCD_OPC_CheckField, 16, 5, 0, 156, 1, // Skip to: 1880 /* 1468 */ MCD_OPC_Decode, 181, 6, 125, // Opcode: QVFCTIWZ /* 1472 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 1492 /* 1476 */ MCD_OPC_CheckField, 26, 6, 4, 142, 1, // Skip to: 1880 /* 1482 */ MCD_OPC_CheckField, 16, 5, 0, 136, 1, // Skip to: 1880 /* 1488 */ MCD_OPC_Decode, 180, 6, 125, // Opcode: QVFCTIWUZ /* 1492 */ MCD_OPC_FilterValue, 25, 16, 0, // Skip to: 1512 /* 1496 */ MCD_OPC_CheckField, 26, 6, 4, 122, 1, // Skip to: 1880 /* 1502 */ MCD_OPC_CheckField, 16, 5, 0, 116, 1, // Skip to: 1880 /* 1508 */ MCD_OPC_Decode, 176, 6, 125, // Opcode: QVFCTIDZ /* 1512 */ MCD_OPC_FilterValue, 29, 108, 1, // Skip to: 1880 /* 1516 */ MCD_OPC_CheckField, 26, 6, 4, 102, 1, // Skip to: 1880 /* 1522 */ MCD_OPC_CheckField, 16, 5, 0, 96, 1, // Skip to: 1880 /* 1528 */ MCD_OPC_Decode, 175, 6, 125, // Opcode: QVFCTIDUZ /* 1532 */ MCD_OPC_FilterValue, 34, 31, 0, // Skip to: 1567 /* 1536 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1539 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1553 /* 1543 */ MCD_OPC_CheckField, 11, 5, 0, 75, 1, // Skip to: 1880 /* 1549 */ MCD_OPC_Decode, 238, 6, 127, // Opcode: QVFXMULS /* 1553 */ MCD_OPC_FilterValue, 4, 67, 1, // Skip to: 1880 /* 1557 */ MCD_OPC_CheckField, 11, 5, 0, 61, 1, // Skip to: 1880 /* 1563 */ MCD_OPC_Decode, 237, 6, 127, // Opcode: QVFXMUL /* 1567 */ MCD_OPC_FilterValue, 40, 32, 0, // Skip to: 1603 /* 1571 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1574 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 1589 /* 1578 */ MCD_OPC_CheckField, 6, 5, 0, 40, 1, // Skip to: 1880 /* 1584 */ MCD_OPC_Decode, 231, 6, 128, 1, // Opcode: QVFSUBSs /* 1589 */ MCD_OPC_FilterValue, 4, 31, 1, // Skip to: 1880 /* 1593 */ MCD_OPC_CheckField, 6, 5, 0, 25, 1, // Skip to: 1880 /* 1599 */ MCD_OPC_Decode, 229, 6, 124, // Opcode: QVFSUB /* 1603 */ MCD_OPC_FilterValue, 42, 32, 0, // Skip to: 1639 /* 1607 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1610 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 1625 /* 1614 */ MCD_OPC_CheckField, 6, 5, 0, 4, 1, // Skip to: 1880 /* 1620 */ MCD_OPC_Decode, 156, 6, 128, 1, // Opcode: QVFADDSs /* 1625 */ MCD_OPC_FilterValue, 4, 251, 0, // Skip to: 1880 /* 1629 */ MCD_OPC_CheckField, 6, 5, 0, 245, 0, // Skip to: 1880 /* 1635 */ MCD_OPC_Decode, 154, 6, 124, // Opcode: QVFADD /* 1639 */ MCD_OPC_FilterValue, 46, 11, 0, // Skip to: 1654 /* 1643 */ MCD_OPC_CheckField, 26, 6, 4, 231, 0, // Skip to: 1880 /* 1649 */ MCD_OPC_Decode, 226, 6, 129, 1, // Opcode: QVFSELb /* 1654 */ MCD_OPC_FilterValue, 48, 43, 0, // Skip to: 1701 /* 1658 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1661 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 1681 /* 1665 */ MCD_OPC_CheckField, 16, 5, 0, 209, 0, // Skip to: 1880 /* 1671 */ MCD_OPC_CheckField, 6, 5, 0, 203, 0, // Skip to: 1880 /* 1677 */ MCD_OPC_Decode, 210, 6, 125, // Opcode: QVFRES /* 1681 */ MCD_OPC_FilterValue, 4, 195, 0, // Skip to: 1880 /* 1685 */ MCD_OPC_CheckField, 16, 5, 0, 189, 0, // Skip to: 1880 /* 1691 */ MCD_OPC_CheckField, 6, 5, 0, 183, 0, // Skip to: 1880 /* 1697 */ MCD_OPC_Decode, 209, 6, 125, // Opcode: QVFRE /* 1701 */ MCD_OPC_FilterValue, 50, 32, 0, // Skip to: 1737 /* 1705 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1708 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 1723 /* 1712 */ MCD_OPC_CheckField, 11, 5, 0, 162, 0, // Skip to: 1880 /* 1718 */ MCD_OPC_Decode, 196, 6, 130, 1, // Opcode: QVFMULSs /* 1723 */ MCD_OPC_FilterValue, 4, 153, 0, // Skip to: 1880 /* 1727 */ MCD_OPC_CheckField, 11, 5, 0, 147, 0, // Skip to: 1880 /* 1733 */ MCD_OPC_Decode, 194, 6, 127, // Opcode: QVFMUL /* 1737 */ MCD_OPC_FilterValue, 52, 43, 0, // Skip to: 1784 /* 1741 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1744 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 1764 /* 1748 */ MCD_OPC_CheckField, 16, 5, 0, 126, 0, // Skip to: 1880 /* 1754 */ MCD_OPC_CheckField, 6, 5, 0, 120, 0, // Skip to: 1880 /* 1760 */ MCD_OPC_Decode, 223, 6, 125, // Opcode: QVFRSQRTES /* 1764 */ MCD_OPC_FilterValue, 4, 112, 0, // Skip to: 1880 /* 1768 */ MCD_OPC_CheckField, 16, 5, 0, 106, 0, // Skip to: 1880 /* 1774 */ MCD_OPC_CheckField, 6, 5, 0, 100, 0, // Skip to: 1880 /* 1780 */ MCD_OPC_Decode, 222, 6, 125, // Opcode: QVFRSQRTE /* 1784 */ MCD_OPC_FilterValue, 56, 20, 0, // Skip to: 1808 /* 1788 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1791 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 1800 /* 1795 */ MCD_OPC_Decode, 193, 6, 131, 1, // Opcode: QVFMSUBSs /* 1800 */ MCD_OPC_FilterValue, 4, 76, 0, // Skip to: 1880 /* 1804 */ MCD_OPC_Decode, 191, 6, 114, // Opcode: QVFMSUB /* 1808 */ MCD_OPC_FilterValue, 58, 20, 0, // Skip to: 1832 /* 1812 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1815 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 1824 /* 1819 */ MCD_OPC_Decode, 187, 6, 131, 1, // Opcode: QVFMADDSs /* 1824 */ MCD_OPC_FilterValue, 4, 52, 0, // Skip to: 1880 /* 1828 */ MCD_OPC_Decode, 185, 6, 114, // Opcode: QVFMADD /* 1832 */ MCD_OPC_FilterValue, 60, 20, 0, // Skip to: 1856 /* 1836 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1839 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 1848 /* 1843 */ MCD_OPC_Decode, 206, 6, 131, 1, // Opcode: QVFNMSUBSs /* 1848 */ MCD_OPC_FilterValue, 4, 28, 0, // Skip to: 1880 /* 1852 */ MCD_OPC_Decode, 204, 6, 114, // Opcode: QVFNMSUB /* 1856 */ MCD_OPC_FilterValue, 62, 20, 0, // Skip to: 1880 /* 1860 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 1863 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 1872 /* 1867 */ MCD_OPC_Decode, 203, 6, 131, 1, // Opcode: QVFNMADDSs /* 1872 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1880 /* 1876 */ MCD_OPC_Decode, 201, 6, 114, // Opcode: QVFNMADD /* 1880 */ MCD_OPC_Fail, 0 }; static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { //llvm_unreachable("Invalid index!"); return true; } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, const void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ return S; \ case 1: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 2: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 3: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 4: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 5: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 6: \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 7: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 9: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 4); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 11: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 12: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 13: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 15: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 16: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 18: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRC_NOR0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeSImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 19: \ tmp = fieldname(insn, 2, 14); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 20: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeCRBITRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 2, 14); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 21: \ tmp = fieldname(insn, 5, 7); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 22: \ tmp = fieldname(insn, 2, 24); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 23: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeCRBITRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 25: \ tmp = fieldname(insn, 21, 5); \ if (DecodeCRBITRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeCRBITRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeCRBITRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 16) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 5, 1) << 5; \ tmp |= fieldname(insn, 6, 5) << 0; \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 5, 1) << 5; \ tmp |= fieldname(insn, 6, 5) << 0; \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 5, 1) << 5; \ tmp |= fieldname(insn, 6, 5) << 0; \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 33: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 34: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 15, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 37: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 11, 5) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 38: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 39: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 40: \ tmp = fieldname(insn, 21, 5); \ if (DecodeVRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 41: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 42: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 43: \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 44: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 45: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 46: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 47: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRC_NOR0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeCRBITRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 48: \ tmp = fieldname(insn, 12, 8); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 49: \ tmp = fieldname(insn, 12, 8); \ if (decodeCRBitMOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 50: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 8); \ if (decodeCRBitMOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 51: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 52: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 53: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 54: \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 55: \ tmp = 0; \ tmp |= fieldname(insn, 11, 5) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 56: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 57: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 58: \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 59: \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 60: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 61: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 62: \ tmp = fieldname(insn, 21, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 63: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 64: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 65: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 66: \ tmp = fieldname(insn, 21, 2); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 67: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 68: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 69: \ tmp = fieldname(insn, 21, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 70: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 71: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 72: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 73: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 74: \ tmp = fieldname(insn, 21, 2); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 75: \ tmp = fieldname(insn, 21, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 76: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 77: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 78: \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 79: \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 80: \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 81: \ tmp = fieldname(insn, 16, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 82: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 21); \ if (decodeMemRIOperands(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 83: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 21); \ if (decodeMemRIOperands(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 84: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 21); \ if (decodeMemRIOperands(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 85: \ tmp = fieldname(insn, 21, 5); \ if (DecodeG8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 2, 19); \ if (decodeMemRIXOperands(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 86: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 87: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 88: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 89: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 90: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 91: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 92: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 93: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 94: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 95: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 96: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 97: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 98: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 99: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 100: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 101: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 102: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 103: \ tmp = 0; \ tmp |= fieldname(insn, 0, 1) << 5; \ tmp |= fieldname(insn, 21, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 2, 1) << 5; \ tmp |= fieldname(insn, 16, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 1, 1) << 5; \ tmp |= fieldname(insn, 11, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 3, 1) << 5; \ tmp |= fieldname(insn, 6, 5) << 0; \ if (DecodeVSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 104: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 105: \ tmp = fieldname(insn, 23, 3); \ if (DecodeCRRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 106: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 107: \ tmp = fieldname(insn, 17, 8); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 11, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 1); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 16, 1); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 108: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 109: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 110: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 111: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 112: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 113: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQBRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 114: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 115: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQBRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQBRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQBRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 7, 4); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 116: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 9, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 117: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 9, 2); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 118: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 9, 12); \ if (decodeUImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 119: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 120: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 121: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 122: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 123: \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodePointerLikeRegClass1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodePointerLikeRegClass0(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 124: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 125: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 126: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 127: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 128: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 129: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQBRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeQFRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 130: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 131: \ tmp = fieldname(insn, 21, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 6, 5); \ if (DecodeQSRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ } \ } // DecodeToMCInst(decodeToMCInst_2, fieldFromInstruction_2, uint16_t) DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, \ int feature) \ { \ uint64_t Bits = getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } //DecodeInstruction(decodeInstruction_2, fieldFromInstruction_2, decodeToMCInst_2, uint16_t) DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t) capstone-sys-0.11.0/capstone/arch/PowerPC/PPCGenInstrInfo.inc010066400017500001750000001071101363402546700221310ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { PPC_PHI = 0, PPC_INLINEASM = 1, PPC_CFI_INSTRUCTION = 2, PPC_EH_LABEL = 3, PPC_GC_LABEL = 4, PPC_KILL = 5, PPC_EXTRACT_SUBREG = 6, PPC_INSERT_SUBREG = 7, PPC_IMPLICIT_DEF = 8, PPC_SUBREG_TO_REG = 9, PPC_COPY_TO_REGCLASS = 10, PPC_DBG_VALUE = 11, PPC_REG_SEQUENCE = 12, PPC_COPY = 13, PPC_BUNDLE = 14, PPC_LIFETIME_START = 15, PPC_LIFETIME_END = 16, PPC_STACKMAP = 17, PPC_PATCHPOINT = 18, PPC_LOAD_STACK_GUARD = 19, PPC_STATEPOINT = 20, PPC_FRAME_ALLOC = 21, PPC_ADD4 = 22, PPC_ADD4TLS = 23, PPC_ADD4o = 24, PPC_ADD8 = 25, PPC_ADD8TLS = 26, PPC_ADD8TLS_ = 27, PPC_ADD8o = 28, PPC_ADDC = 29, PPC_ADDC8 = 30, PPC_ADDC8o = 31, PPC_ADDCo = 32, PPC_ADDE = 33, PPC_ADDE8 = 34, PPC_ADDE8o = 35, PPC_ADDEo = 36, PPC_ADDI = 37, PPC_ADDI8 = 38, PPC_ADDIC = 39, PPC_ADDIC8 = 40, PPC_ADDICo = 41, PPC_ADDIS = 42, PPC_ADDIS8 = 43, PPC_ADDISdtprelHA = 44, PPC_ADDISdtprelHA32 = 45, PPC_ADDISgotTprelHA = 46, PPC_ADDIStlsgdHA = 47, PPC_ADDIStlsldHA = 48, PPC_ADDIStocHA = 49, PPC_ADDIdtprelL = 50, PPC_ADDIdtprelL32 = 51, PPC_ADDItlsgdL = 52, PPC_ADDItlsgdL32 = 53, PPC_ADDItlsgdLADDR = 54, PPC_ADDItlsgdLADDR32 = 55, PPC_ADDItlsldL = 56, PPC_ADDItlsldL32 = 57, PPC_ADDItlsldLADDR = 58, PPC_ADDItlsldLADDR32 = 59, PPC_ADDItocL = 60, PPC_ADDME = 61, PPC_ADDME8 = 62, PPC_ADDME8o = 63, PPC_ADDMEo = 64, PPC_ADDZE = 65, PPC_ADDZE8 = 66, PPC_ADDZE8o = 67, PPC_ADDZEo = 68, PPC_ADJCALLSTACKDOWN = 69, PPC_ADJCALLSTACKUP = 70, PPC_AND = 71, PPC_AND8 = 72, PPC_AND8o = 73, PPC_ANDC = 74, PPC_ANDC8 = 75, PPC_ANDC8o = 76, PPC_ANDCo = 77, PPC_ANDISo = 78, PPC_ANDISo8 = 79, PPC_ANDIo = 80, PPC_ANDIo8 = 81, PPC_ANDIo_1_EQ_BIT = 82, PPC_ANDIo_1_EQ_BIT8 = 83, PPC_ANDIo_1_GT_BIT = 84, PPC_ANDIo_1_GT_BIT8 = 85, PPC_ANDo = 86, PPC_ATOMIC_CMP_SWAP_I16 = 87, PPC_ATOMIC_CMP_SWAP_I32 = 88, PPC_ATOMIC_CMP_SWAP_I64 = 89, PPC_ATOMIC_CMP_SWAP_I8 = 90, PPC_ATOMIC_LOAD_ADD_I16 = 91, PPC_ATOMIC_LOAD_ADD_I32 = 92, PPC_ATOMIC_LOAD_ADD_I64 = 93, PPC_ATOMIC_LOAD_ADD_I8 = 94, PPC_ATOMIC_LOAD_AND_I16 = 95, PPC_ATOMIC_LOAD_AND_I32 = 96, PPC_ATOMIC_LOAD_AND_I64 = 97, PPC_ATOMIC_LOAD_AND_I8 = 98, PPC_ATOMIC_LOAD_NAND_I16 = 99, PPC_ATOMIC_LOAD_NAND_I32 = 100, PPC_ATOMIC_LOAD_NAND_I64 = 101, PPC_ATOMIC_LOAD_NAND_I8 = 102, PPC_ATOMIC_LOAD_OR_I16 = 103, PPC_ATOMIC_LOAD_OR_I32 = 104, PPC_ATOMIC_LOAD_OR_I64 = 105, PPC_ATOMIC_LOAD_OR_I8 = 106, PPC_ATOMIC_LOAD_SUB_I16 = 107, PPC_ATOMIC_LOAD_SUB_I32 = 108, PPC_ATOMIC_LOAD_SUB_I64 = 109, PPC_ATOMIC_LOAD_SUB_I8 = 110, PPC_ATOMIC_LOAD_XOR_I16 = 111, PPC_ATOMIC_LOAD_XOR_I32 = 112, PPC_ATOMIC_LOAD_XOR_I64 = 113, PPC_ATOMIC_LOAD_XOR_I8 = 114, PPC_ATOMIC_SWAP_I16 = 115, PPC_ATOMIC_SWAP_I32 = 116, PPC_ATOMIC_SWAP_I64 = 117, PPC_ATOMIC_SWAP_I8 = 118, PPC_ATTN = 119, PPC_B = 120, PPC_BA = 121, PPC_BC = 122, PPC_BCC = 123, PPC_BCCA = 124, PPC_BCCCTR = 125, PPC_BCCCTR8 = 126, PPC_BCCCTRL = 127, PPC_BCCCTRL8 = 128, PPC_BCCL = 129, PPC_BCCLA = 130, PPC_BCCLR = 131, PPC_BCCLRL = 132, PPC_BCCTR = 133, PPC_BCCTR8 = 134, PPC_BCCTR8n = 135, PPC_BCCTRL = 136, PPC_BCCTRL8 = 137, PPC_BCCTRL8n = 138, PPC_BCCTRLn = 139, PPC_BCCTRn = 140, PPC_BCL = 141, PPC_BCLR = 142, PPC_BCLRL = 143, PPC_BCLRLn = 144, PPC_BCLRn = 145, PPC_BCLalways = 146, PPC_BCLn = 147, PPC_BCTR = 148, PPC_BCTR8 = 149, PPC_BCTRL = 150, PPC_BCTRL8 = 151, PPC_BCTRL8_LDinto_toc = 152, PPC_BCn = 153, PPC_BDNZ = 154, PPC_BDNZ8 = 155, PPC_BDNZA = 156, PPC_BDNZAm = 157, PPC_BDNZAp = 158, PPC_BDNZL = 159, PPC_BDNZLA = 160, PPC_BDNZLAm = 161, PPC_BDNZLAp = 162, PPC_BDNZLR = 163, PPC_BDNZLR8 = 164, PPC_BDNZLRL = 165, PPC_BDNZLRLm = 166, PPC_BDNZLRLp = 167, PPC_BDNZLRm = 168, PPC_BDNZLRp = 169, PPC_BDNZLm = 170, PPC_BDNZLp = 171, PPC_BDNZm = 172, PPC_BDNZp = 173, PPC_BDZ = 174, PPC_BDZ8 = 175, PPC_BDZA = 176, PPC_BDZAm = 177, PPC_BDZAp = 178, PPC_BDZL = 179, PPC_BDZLA = 180, PPC_BDZLAm = 181, PPC_BDZLAp = 182, PPC_BDZLR = 183, PPC_BDZLR8 = 184, PPC_BDZLRL = 185, PPC_BDZLRLm = 186, PPC_BDZLRLp = 187, PPC_BDZLRm = 188, PPC_BDZLRp = 189, PPC_BDZLm = 190, PPC_BDZLp = 191, PPC_BDZm = 192, PPC_BDZp = 193, PPC_BL = 194, PPC_BL8 = 195, PPC_BL8_NOP = 196, PPC_BL8_NOP_TLS = 197, PPC_BL8_TLS = 198, PPC_BL8_TLS_ = 199, PPC_BLA = 200, PPC_BLA8 = 201, PPC_BLA8_NOP = 202, PPC_BLR = 203, PPC_BLR8 = 204, PPC_BLRL = 205, PPC_BL_TLS = 206, PPC_BRINC = 207, PPC_CLRLSLDI = 208, PPC_CLRLSLDIo = 209, PPC_CLRLSLWI = 210, PPC_CLRLSLWIo = 211, PPC_CLRRDI = 212, PPC_CLRRDIo = 213, PPC_CLRRWI = 214, PPC_CLRRWIo = 215, PPC_CMPB = 216, PPC_CMPB8 = 217, PPC_CMPD = 218, PPC_CMPDI = 219, PPC_CMPLD = 220, PPC_CMPLDI = 221, PPC_CMPLW = 222, PPC_CMPLWI = 223, PPC_CMPW = 224, PPC_CMPWI = 225, PPC_CNTLZD = 226, PPC_CNTLZDo = 227, PPC_CNTLZW = 228, PPC_CNTLZW8 = 229, PPC_CNTLZW8o = 230, PPC_CNTLZWo = 231, PPC_CR6SET = 232, PPC_CR6UNSET = 233, PPC_CRAND = 234, PPC_CRANDC = 235, PPC_CREQV = 236, PPC_CRNAND = 237, PPC_CRNOR = 238, PPC_CROR = 239, PPC_CRORC = 240, PPC_CRSET = 241, PPC_CRUNSET = 242, PPC_CRXOR = 243, PPC_DCBA = 244, PPC_DCBF = 245, PPC_DCBI = 246, PPC_DCBST = 247, PPC_DCBT = 248, PPC_DCBTST = 249, PPC_DCBZ = 250, PPC_DCBZL = 251, PPC_DCCCI = 252, PPC_DIVD = 253, PPC_DIVDU = 254, PPC_DIVDUo = 255, PPC_DIVDo = 256, PPC_DIVW = 257, PPC_DIVWU = 258, PPC_DIVWUo = 259, PPC_DIVWo = 260, PPC_DSS = 261, PPC_DSSALL = 262, PPC_DST = 263, PPC_DST64 = 264, PPC_DSTST = 265, PPC_DSTST64 = 266, PPC_DSTSTT = 267, PPC_DSTSTT64 = 268, PPC_DSTT = 269, PPC_DSTT64 = 270, PPC_DYNALLOC = 271, PPC_DYNALLOC8 = 272, PPC_EH_SjLj_LongJmp32 = 273, PPC_EH_SjLj_LongJmp64 = 274, PPC_EH_SjLj_SetJmp32 = 275, PPC_EH_SjLj_SetJmp64 = 276, PPC_EH_SjLj_Setup = 277, PPC_EQV = 278, PPC_EQV8 = 279, PPC_EQV8o = 280, PPC_EQVo = 281, PPC_EVABS = 282, PPC_EVADDIW = 283, PPC_EVADDSMIAAW = 284, PPC_EVADDSSIAAW = 285, PPC_EVADDUMIAAW = 286, PPC_EVADDUSIAAW = 287, PPC_EVADDW = 288, PPC_EVAND = 289, PPC_EVANDC = 290, PPC_EVCMPEQ = 291, PPC_EVCMPGTS = 292, PPC_EVCMPGTU = 293, PPC_EVCMPLTS = 294, PPC_EVCMPLTU = 295, PPC_EVCNTLSW = 296, PPC_EVCNTLZW = 297, PPC_EVDIVWS = 298, PPC_EVDIVWU = 299, PPC_EVEQV = 300, PPC_EVEXTSB = 301, PPC_EVEXTSH = 302, PPC_EVLDD = 303, PPC_EVLDDX = 304, PPC_EVLDH = 305, PPC_EVLDHX = 306, PPC_EVLDW = 307, PPC_EVLDWX = 308, PPC_EVLHHESPLAT = 309, PPC_EVLHHESPLATX = 310, PPC_EVLHHOSSPLAT = 311, PPC_EVLHHOSSPLATX = 312, PPC_EVLHHOUSPLAT = 313, PPC_EVLHHOUSPLATX = 314, PPC_EVLWHE = 315, PPC_EVLWHEX = 316, PPC_EVLWHOS = 317, PPC_EVLWHOSX = 318, PPC_EVLWHOU = 319, PPC_EVLWHOUX = 320, PPC_EVLWHSPLAT = 321, PPC_EVLWHSPLATX = 322, PPC_EVLWWSPLAT = 323, PPC_EVLWWSPLATX = 324, PPC_EVMERGEHI = 325, PPC_EVMERGEHILO = 326, PPC_EVMERGELO = 327, PPC_EVMERGELOHI = 328, PPC_EVMHEGSMFAA = 329, PPC_EVMHEGSMFAN = 330, PPC_EVMHEGSMIAA = 331, PPC_EVMHEGSMIAN = 332, PPC_EVMHEGUMIAA = 333, PPC_EVMHEGUMIAN = 334, PPC_EVMHESMF = 335, PPC_EVMHESMFA = 336, PPC_EVMHESMFAAW = 337, PPC_EVMHESMFANW = 338, PPC_EVMHESMI = 339, PPC_EVMHESMIA = 340, PPC_EVMHESMIAAW = 341, PPC_EVMHESMIANW = 342, PPC_EVMHESSF = 343, PPC_EVMHESSFA = 344, PPC_EVMHESSFAAW = 345, PPC_EVMHESSFANW = 346, PPC_EVMHESSIAAW = 347, PPC_EVMHESSIANW = 348, PPC_EVMHEUMI = 349, PPC_EVMHEUMIA = 350, PPC_EVMHEUMIAAW = 351, PPC_EVMHEUMIANW = 352, PPC_EVMHEUSIAAW = 353, PPC_EVMHEUSIANW = 354, PPC_EVMHOGSMFAA = 355, PPC_EVMHOGSMFAN = 356, PPC_EVMHOGSMIAA = 357, PPC_EVMHOGSMIAN = 358, PPC_EVMHOGUMIAA = 359, PPC_EVMHOGUMIAN = 360, PPC_EVMHOSMF = 361, PPC_EVMHOSMFA = 362, PPC_EVMHOSMFAAW = 363, PPC_EVMHOSMFANW = 364, PPC_EVMHOSMI = 365, PPC_EVMHOSMIA = 366, PPC_EVMHOSMIAAW = 367, PPC_EVMHOSMIANW = 368, PPC_EVMHOSSF = 369, PPC_EVMHOSSFA = 370, PPC_EVMHOSSFAAW = 371, PPC_EVMHOSSFANW = 372, PPC_EVMHOSSIAAW = 373, PPC_EVMHOSSIANW = 374, PPC_EVMHOUMI = 375, PPC_EVMHOUMIA = 376, PPC_EVMHOUMIAAW = 377, PPC_EVMHOUMIANW = 378, PPC_EVMHOUSIAAW = 379, PPC_EVMHOUSIANW = 380, PPC_EVMRA = 381, PPC_EVMWHSMF = 382, PPC_EVMWHSMFA = 383, PPC_EVMWHSMI = 384, PPC_EVMWHSMIA = 385, PPC_EVMWHSSF = 386, PPC_EVMWHSSFA = 387, PPC_EVMWHUMI = 388, PPC_EVMWHUMIA = 389, PPC_EVMWLSMIAAW = 390, PPC_EVMWLSMIANW = 391, PPC_EVMWLSSIAAW = 392, PPC_EVMWLSSIANW = 393, PPC_EVMWLUMI = 394, PPC_EVMWLUMIA = 395, PPC_EVMWLUMIAAW = 396, PPC_EVMWLUMIANW = 397, PPC_EVMWLUSIAAW = 398, PPC_EVMWLUSIANW = 399, PPC_EVMWSMF = 400, PPC_EVMWSMFA = 401, PPC_EVMWSMFAA = 402, PPC_EVMWSMFAN = 403, PPC_EVMWSMI = 404, PPC_EVMWSMIA = 405, PPC_EVMWSMIAA = 406, PPC_EVMWSMIAN = 407, PPC_EVMWSSF = 408, PPC_EVMWSSFA = 409, PPC_EVMWSSFAA = 410, PPC_EVMWSSFAN = 411, PPC_EVMWUMI = 412, PPC_EVMWUMIA = 413, PPC_EVMWUMIAA = 414, PPC_EVMWUMIAN = 415, PPC_EVNAND = 416, PPC_EVNEG = 417, PPC_EVNOR = 418, PPC_EVOR = 419, PPC_EVORC = 420, PPC_EVRLW = 421, PPC_EVRLWI = 422, PPC_EVRNDW = 423, PPC_EVSLW = 424, PPC_EVSLWI = 425, PPC_EVSPLATFI = 426, PPC_EVSPLATI = 427, PPC_EVSRWIS = 428, PPC_EVSRWIU = 429, PPC_EVSRWS = 430, PPC_EVSRWU = 431, PPC_EVSTDD = 432, PPC_EVSTDDX = 433, PPC_EVSTDH = 434, PPC_EVSTDHX = 435, PPC_EVSTDW = 436, PPC_EVSTDWX = 437, PPC_EVSTWHE = 438, PPC_EVSTWHEX = 439, PPC_EVSTWHO = 440, PPC_EVSTWHOX = 441, PPC_EVSTWWE = 442, PPC_EVSTWWEX = 443, PPC_EVSTWWO = 444, PPC_EVSTWWOX = 445, PPC_EVSUBFSMIAAW = 446, PPC_EVSUBFSSIAAW = 447, PPC_EVSUBFUMIAAW = 448, PPC_EVSUBFUSIAAW = 449, PPC_EVSUBFW = 450, PPC_EVSUBIFW = 451, PPC_EVXOR = 452, PPC_EXTLDI = 453, PPC_EXTLDIo = 454, PPC_EXTLWI = 455, PPC_EXTLWIo = 456, PPC_EXTRDI = 457, PPC_EXTRDIo = 458, PPC_EXTRWI = 459, PPC_EXTRWIo = 460, PPC_EXTSB = 461, PPC_EXTSB8 = 462, PPC_EXTSB8_32_64 = 463, PPC_EXTSB8o = 464, PPC_EXTSBo = 465, PPC_EXTSH = 466, PPC_EXTSH8 = 467, PPC_EXTSH8_32_64 = 468, PPC_EXTSH8o = 469, PPC_EXTSHo = 470, PPC_EXTSW = 471, PPC_EXTSW_32_64 = 472, PPC_EXTSW_32_64o = 473, PPC_EXTSWo = 474, PPC_EnforceIEIO = 475, PPC_FABSD = 476, PPC_FABSDo = 477, PPC_FABSS = 478, PPC_FABSSo = 479, PPC_FADD = 480, PPC_FADDS = 481, PPC_FADDSo = 482, PPC_FADDo = 483, PPC_FADDrtz = 484, PPC_FCFID = 485, PPC_FCFIDS = 486, PPC_FCFIDSo = 487, PPC_FCFIDU = 488, PPC_FCFIDUS = 489, PPC_FCFIDUSo = 490, PPC_FCFIDUo = 491, PPC_FCFIDo = 492, PPC_FCMPUD = 493, PPC_FCMPUS = 494, PPC_FCPSGND = 495, PPC_FCPSGNDo = 496, PPC_FCPSGNS = 497, PPC_FCPSGNSo = 498, PPC_FCTID = 499, PPC_FCTIDUZ = 500, PPC_FCTIDUZo = 501, PPC_FCTIDZ = 502, PPC_FCTIDZo = 503, PPC_FCTIDo = 504, PPC_FCTIW = 505, PPC_FCTIWUZ = 506, PPC_FCTIWUZo = 507, PPC_FCTIWZ = 508, PPC_FCTIWZo = 509, PPC_FCTIWo = 510, PPC_FDIV = 511, PPC_FDIVS = 512, PPC_FDIVSo = 513, PPC_FDIVo = 514, PPC_FMADD = 515, PPC_FMADDS = 516, PPC_FMADDSo = 517, PPC_FMADDo = 518, PPC_FMR = 519, PPC_FMRo = 520, PPC_FMSUB = 521, PPC_FMSUBS = 522, PPC_FMSUBSo = 523, PPC_FMSUBo = 524, PPC_FMUL = 525, PPC_FMULS = 526, PPC_FMULSo = 527, PPC_FMULo = 528, PPC_FNABSD = 529, PPC_FNABSDo = 530, PPC_FNABSS = 531, PPC_FNABSSo = 532, PPC_FNEGD = 533, PPC_FNEGDo = 534, PPC_FNEGS = 535, PPC_FNEGSo = 536, PPC_FNMADD = 537, PPC_FNMADDS = 538, PPC_FNMADDSo = 539, PPC_FNMADDo = 540, PPC_FNMSUB = 541, PPC_FNMSUBS = 542, PPC_FNMSUBSo = 543, PPC_FNMSUBo = 544, PPC_FRE = 545, PPC_FRES = 546, PPC_FRESo = 547, PPC_FREo = 548, PPC_FRIMD = 549, PPC_FRIMDo = 550, PPC_FRIMS = 551, PPC_FRIMSo = 552, PPC_FRIND = 553, PPC_FRINDo = 554, PPC_FRINS = 555, PPC_FRINSo = 556, PPC_FRIPD = 557, PPC_FRIPDo = 558, PPC_FRIPS = 559, PPC_FRIPSo = 560, PPC_FRIZD = 561, PPC_FRIZDo = 562, PPC_FRIZS = 563, PPC_FRIZSo = 564, PPC_FRSP = 565, PPC_FRSPo = 566, PPC_FRSQRTE = 567, PPC_FRSQRTES = 568, PPC_FRSQRTESo = 569, PPC_FRSQRTEo = 570, PPC_FSELD = 571, PPC_FSELDo = 572, PPC_FSELS = 573, PPC_FSELSo = 574, PPC_FSQRT = 575, PPC_FSQRTS = 576, PPC_FSQRTSo = 577, PPC_FSQRTo = 578, PPC_FSUB = 579, PPC_FSUBS = 580, PPC_FSUBSo = 581, PPC_FSUBo = 582, PPC_GETtlsADDR = 583, PPC_GETtlsADDR32 = 584, PPC_GETtlsldADDR = 585, PPC_GETtlsldADDR32 = 586, PPC_ICBI = 587, PPC_ICBT = 588, PPC_ICCCI = 589, PPC_INSLWI = 590, PPC_INSLWIo = 591, PPC_INSRDI = 592, PPC_INSRDIo = 593, PPC_INSRWI = 594, PPC_INSRWIo = 595, PPC_ISEL = 596, PPC_ISEL8 = 597, PPC_ISYNC = 598, PPC_LA = 599, PPC_LAx = 600, PPC_LBZ = 601, PPC_LBZ8 = 602, PPC_LBZCIX = 603, PPC_LBZU = 604, PPC_LBZU8 = 605, PPC_LBZUX = 606, PPC_LBZUX8 = 607, PPC_LBZX = 608, PPC_LBZX8 = 609, PPC_LD = 610, PPC_LDARX = 611, PPC_LDBRX = 612, PPC_LDCIX = 613, PPC_LDU = 614, PPC_LDUX = 615, PPC_LDX = 616, PPC_LDgotTprelL = 617, PPC_LDgotTprelL32 = 618, PPC_LDtoc = 619, PPC_LDtocBA = 620, PPC_LDtocCPT = 621, PPC_LDtocJTI = 622, PPC_LDtocL = 623, PPC_LFD = 624, PPC_LFDU = 625, PPC_LFDUX = 626, PPC_LFDX = 627, PPC_LFIWAX = 628, PPC_LFIWZX = 629, PPC_LFS = 630, PPC_LFSU = 631, PPC_LFSUX = 632, PPC_LFSX = 633, PPC_LHA = 634, PPC_LHA8 = 635, PPC_LHAU = 636, PPC_LHAU8 = 637, PPC_LHAUX = 638, PPC_LHAUX8 = 639, PPC_LHAX = 640, PPC_LHAX8 = 641, PPC_LHBRX = 642, PPC_LHBRX8 = 643, PPC_LHZ = 644, PPC_LHZ8 = 645, PPC_LHZCIX = 646, PPC_LHZU = 647, PPC_LHZU8 = 648, PPC_LHZUX = 649, PPC_LHZUX8 = 650, PPC_LHZX = 651, PPC_LHZX8 = 652, PPC_LI = 653, PPC_LI8 = 654, PPC_LIS = 655, PPC_LIS8 = 656, PPC_LMW = 657, PPC_LSWI = 658, PPC_LVEBX = 659, PPC_LVEHX = 660, PPC_LVEWX = 661, PPC_LVSL = 662, PPC_LVSR = 663, PPC_LVX = 664, PPC_LVXL = 665, PPC_LWA = 666, PPC_LWARX = 667, PPC_LWAUX = 668, PPC_LWAX = 669, PPC_LWAX_32 = 670, PPC_LWA_32 = 671, PPC_LWBRX = 672, PPC_LWBRX8 = 673, PPC_LWZ = 674, PPC_LWZ8 = 675, PPC_LWZCIX = 676, PPC_LWZU = 677, PPC_LWZU8 = 678, PPC_LWZUX = 679, PPC_LWZUX8 = 680, PPC_LWZX = 681, PPC_LWZX8 = 682, PPC_LWZtoc = 683, PPC_LXSDX = 684, PPC_LXVD2X = 685, PPC_LXVDSX = 686, PPC_LXVW4X = 687, PPC_MBAR = 688, PPC_MCRF = 689, PPC_MCRFS = 690, PPC_MFCR = 691, PPC_MFCR8 = 692, PPC_MFCTR = 693, PPC_MFCTR8 = 694, PPC_MFDCR = 695, PPC_MFFS = 696, PPC_MFFSo = 697, PPC_MFLR = 698, PPC_MFLR8 = 699, PPC_MFMSR = 700, PPC_MFOCRF = 701, PPC_MFOCRF8 = 702, PPC_MFSPR = 703, PPC_MFSR = 704, PPC_MFSRIN = 705, PPC_MFTB = 706, PPC_MFTB8 = 707, PPC_MFVRSAVE = 708, PPC_MFVRSAVEv = 709, PPC_MFVSCR = 710, PPC_MSYNC = 711, PPC_MTCRF = 712, PPC_MTCRF8 = 713, PPC_MTCTR = 714, PPC_MTCTR8 = 715, PPC_MTCTR8loop = 716, PPC_MTCTRloop = 717, PPC_MTDCR = 718, PPC_MTFSB0 = 719, PPC_MTFSB1 = 720, PPC_MTFSF = 721, PPC_MTFSFI = 722, PPC_MTFSFIo = 723, PPC_MTFSFb = 724, PPC_MTFSFo = 725, PPC_MTLR = 726, PPC_MTLR8 = 727, PPC_MTMSR = 728, PPC_MTMSRD = 729, PPC_MTOCRF = 730, PPC_MTOCRF8 = 731, PPC_MTSPR = 732, PPC_MTSR = 733, PPC_MTSRIN = 734, PPC_MTVRSAVE = 735, PPC_MTVRSAVEv = 736, PPC_MTVSCR = 737, PPC_MULHD = 738, PPC_MULHDU = 739, PPC_MULHDUo = 740, PPC_MULHDo = 741, PPC_MULHW = 742, PPC_MULHWU = 743, PPC_MULHWUo = 744, PPC_MULHWo = 745, PPC_MULLD = 746, PPC_MULLDo = 747, PPC_MULLI = 748, PPC_MULLI8 = 749, PPC_MULLW = 750, PPC_MULLWo = 751, PPC_MoveGOTtoLR = 752, PPC_MovePCtoLR = 753, PPC_MovePCtoLR8 = 754, PPC_NAND = 755, PPC_NAND8 = 756, PPC_NAND8o = 757, PPC_NANDo = 758, PPC_NEG = 759, PPC_NEG8 = 760, PPC_NEG8o = 761, PPC_NEGo = 762, PPC_NOP = 763, PPC_NOP_GT_PWR6 = 764, PPC_NOP_GT_PWR7 = 765, PPC_NOR = 766, PPC_NOR8 = 767, PPC_NOR8o = 768, PPC_NORo = 769, PPC_OR = 770, PPC_OR8 = 771, PPC_OR8o = 772, PPC_ORC = 773, PPC_ORC8 = 774, PPC_ORC8o = 775, PPC_ORCo = 776, PPC_ORI = 777, PPC_ORI8 = 778, PPC_ORIS = 779, PPC_ORIS8 = 780, PPC_ORo = 781, PPC_POPCNTD = 782, PPC_POPCNTW = 783, PPC_PPC32GOT = 784, PPC_PPC32PICGOT = 785, PPC_QVALIGNI = 786, PPC_QVALIGNIb = 787, PPC_QVALIGNIs = 788, PPC_QVESPLATI = 789, PPC_QVESPLATIb = 790, PPC_QVESPLATIs = 791, PPC_QVFABS = 792, PPC_QVFABSs = 793, PPC_QVFADD = 794, PPC_QVFADDS = 795, PPC_QVFADDSs = 796, PPC_QVFCFID = 797, PPC_QVFCFIDS = 798, PPC_QVFCFIDU = 799, PPC_QVFCFIDUS = 800, PPC_QVFCFIDb = 801, PPC_QVFCMPEQ = 802, PPC_QVFCMPEQb = 803, PPC_QVFCMPEQbs = 804, PPC_QVFCMPGT = 805, PPC_QVFCMPGTb = 806, PPC_QVFCMPGTbs = 807, PPC_QVFCMPLT = 808, PPC_QVFCMPLTb = 809, PPC_QVFCMPLTbs = 810, PPC_QVFCPSGN = 811, PPC_QVFCPSGNs = 812, PPC_QVFCTID = 813, PPC_QVFCTIDU = 814, PPC_QVFCTIDUZ = 815, PPC_QVFCTIDZ = 816, PPC_QVFCTIDb = 817, PPC_QVFCTIW = 818, PPC_QVFCTIWU = 819, PPC_QVFCTIWUZ = 820, PPC_QVFCTIWZ = 821, PPC_QVFLOGICAL = 822, PPC_QVFLOGICALb = 823, PPC_QVFLOGICALs = 824, PPC_QVFMADD = 825, PPC_QVFMADDS = 826, PPC_QVFMADDSs = 827, PPC_QVFMR = 828, PPC_QVFMRb = 829, PPC_QVFMRs = 830, PPC_QVFMSUB = 831, PPC_QVFMSUBS = 832, PPC_QVFMSUBSs = 833, PPC_QVFMUL = 834, PPC_QVFMULS = 835, PPC_QVFMULSs = 836, PPC_QVFNABS = 837, PPC_QVFNABSs = 838, PPC_QVFNEG = 839, PPC_QVFNEGs = 840, PPC_QVFNMADD = 841, PPC_QVFNMADDS = 842, PPC_QVFNMADDSs = 843, PPC_QVFNMSUB = 844, PPC_QVFNMSUBS = 845, PPC_QVFNMSUBSs = 846, PPC_QVFPERM = 847, PPC_QVFPERMs = 848, PPC_QVFRE = 849, PPC_QVFRES = 850, PPC_QVFRESs = 851, PPC_QVFRIM = 852, PPC_QVFRIMs = 853, PPC_QVFRIN = 854, PPC_QVFRINs = 855, PPC_QVFRIP = 856, PPC_QVFRIPs = 857, PPC_QVFRIZ = 858, PPC_QVFRIZs = 859, PPC_QVFRSP = 860, PPC_QVFRSPs = 861, PPC_QVFRSQRTE = 862, PPC_QVFRSQRTES = 863, PPC_QVFRSQRTESs = 864, PPC_QVFSEL = 865, PPC_QVFSELb = 866, PPC_QVFSELbb = 867, PPC_QVFSELbs = 868, PPC_QVFSUB = 869, PPC_QVFSUBS = 870, PPC_QVFSUBSs = 871, PPC_QVFTSTNAN = 872, PPC_QVFTSTNANb = 873, PPC_QVFTSTNANbs = 874, PPC_QVFXMADD = 875, PPC_QVFXMADDS = 876, PPC_QVFXMUL = 877, PPC_QVFXMULS = 878, PPC_QVFXXCPNMADD = 879, PPC_QVFXXCPNMADDS = 880, PPC_QVFXXMADD = 881, PPC_QVFXXMADDS = 882, PPC_QVFXXNPMADD = 883, PPC_QVFXXNPMADDS = 884, PPC_QVGPCI = 885, PPC_QVLFCDUX = 886, PPC_QVLFCDUXA = 887, PPC_QVLFCDX = 888, PPC_QVLFCDXA = 889, PPC_QVLFCSUX = 890, PPC_QVLFCSUXA = 891, PPC_QVLFCSX = 892, PPC_QVLFCSXA = 893, PPC_QVLFCSXs = 894, PPC_QVLFDUX = 895, PPC_QVLFDUXA = 896, PPC_QVLFDX = 897, PPC_QVLFDXA = 898, PPC_QVLFDXb = 899, PPC_QVLFIWAX = 900, PPC_QVLFIWAXA = 901, PPC_QVLFIWZX = 902, PPC_QVLFIWZXA = 903, PPC_QVLFSUX = 904, PPC_QVLFSUXA = 905, PPC_QVLFSX = 906, PPC_QVLFSXA = 907, PPC_QVLFSXb = 908, PPC_QVLFSXs = 909, PPC_QVLPCLDX = 910, PPC_QVLPCLSX = 911, PPC_QVLPCLSXint = 912, PPC_QVLPCRDX = 913, PPC_QVLPCRSX = 914, PPC_QVSTFCDUX = 915, PPC_QVSTFCDUXA = 916, PPC_QVSTFCDUXI = 917, PPC_QVSTFCDUXIA = 918, PPC_QVSTFCDX = 919, PPC_QVSTFCDXA = 920, PPC_QVSTFCDXI = 921, PPC_QVSTFCDXIA = 922, PPC_QVSTFCSUX = 923, PPC_QVSTFCSUXA = 924, PPC_QVSTFCSUXI = 925, PPC_QVSTFCSUXIA = 926, PPC_QVSTFCSX = 927, PPC_QVSTFCSXA = 928, PPC_QVSTFCSXI = 929, PPC_QVSTFCSXIA = 930, PPC_QVSTFCSXs = 931, PPC_QVSTFDUX = 932, PPC_QVSTFDUXA = 933, PPC_QVSTFDUXI = 934, PPC_QVSTFDUXIA = 935, PPC_QVSTFDX = 936, PPC_QVSTFDXA = 937, PPC_QVSTFDXI = 938, PPC_QVSTFDXIA = 939, PPC_QVSTFDXb = 940, PPC_QVSTFIWX = 941, PPC_QVSTFIWXA = 942, PPC_QVSTFSUX = 943, PPC_QVSTFSUXA = 944, PPC_QVSTFSUXI = 945, PPC_QVSTFSUXIA = 946, PPC_QVSTFSUXs = 947, PPC_QVSTFSX = 948, PPC_QVSTFSXA = 949, PPC_QVSTFSXI = 950, PPC_QVSTFSXIA = 951, PPC_QVSTFSXs = 952, PPC_RESTORE_CR = 953, PPC_RESTORE_CRBIT = 954, PPC_RESTORE_VRSAVE = 955, PPC_RFCI = 956, PPC_RFDI = 957, PPC_RFI = 958, PPC_RFID = 959, PPC_RFMCI = 960, PPC_RLDCL = 961, PPC_RLDCLo = 962, PPC_RLDCR = 963, PPC_RLDCRo = 964, PPC_RLDIC = 965, PPC_RLDICL = 966, PPC_RLDICL_32_64 = 967, PPC_RLDICLo = 968, PPC_RLDICR = 969, PPC_RLDICRo = 970, PPC_RLDICo = 971, PPC_RLDIMI = 972, PPC_RLDIMIo = 973, PPC_RLWIMI = 974, PPC_RLWIMI8 = 975, PPC_RLWIMI8o = 976, PPC_RLWIMIo = 977, PPC_RLWINM = 978, PPC_RLWINM8 = 979, PPC_RLWINM8o = 980, PPC_RLWINMo = 981, PPC_RLWNM = 982, PPC_RLWNM8 = 983, PPC_RLWNM8o = 984, PPC_RLWNMo = 985, PPC_ROTRDI = 986, PPC_ROTRDIo = 987, PPC_ROTRWI = 988, PPC_ROTRWIo = 989, PPC_ReadTB = 990, PPC_SC = 991, PPC_SELECT_CC_F4 = 992, PPC_SELECT_CC_F8 = 993, PPC_SELECT_CC_I4 = 994, PPC_SELECT_CC_I8 = 995, PPC_SELECT_CC_QBRC = 996, PPC_SELECT_CC_QFRC = 997, PPC_SELECT_CC_QSRC = 998, PPC_SELECT_CC_VRRC = 999, PPC_SELECT_CC_VSFRC = 1000, PPC_SELECT_CC_VSRC = 1001, PPC_SELECT_F4 = 1002, PPC_SELECT_F8 = 1003, PPC_SELECT_I4 = 1004, PPC_SELECT_I8 = 1005, PPC_SELECT_QBRC = 1006, PPC_SELECT_QFRC = 1007, PPC_SELECT_QSRC = 1008, PPC_SELECT_VRRC = 1009, PPC_SELECT_VSFRC = 1010, PPC_SELECT_VSRC = 1011, PPC_SLBIA = 1012, PPC_SLBIE = 1013, PPC_SLBMFEE = 1014, PPC_SLBMTE = 1015, PPC_SLD = 1016, PPC_SLDI = 1017, PPC_SLDIo = 1018, PPC_SLDo = 1019, PPC_SLW = 1020, PPC_SLW8 = 1021, PPC_SLW8o = 1022, PPC_SLWI = 1023, PPC_SLWIo = 1024, PPC_SLWo = 1025, PPC_SPILL_CR = 1026, PPC_SPILL_CRBIT = 1027, PPC_SPILL_VRSAVE = 1028, PPC_SRAD = 1029, PPC_SRADI = 1030, PPC_SRADIo = 1031, PPC_SRADo = 1032, PPC_SRAW = 1033, PPC_SRAWI = 1034, PPC_SRAWIo = 1035, PPC_SRAWo = 1036, PPC_SRD = 1037, PPC_SRDI = 1038, PPC_SRDIo = 1039, PPC_SRDo = 1040, PPC_SRW = 1041, PPC_SRW8 = 1042, PPC_SRW8o = 1043, PPC_SRWI = 1044, PPC_SRWIo = 1045, PPC_SRWo = 1046, PPC_STB = 1047, PPC_STB8 = 1048, PPC_STBCIX = 1049, PPC_STBU = 1050, PPC_STBU8 = 1051, PPC_STBUX = 1052, PPC_STBUX8 = 1053, PPC_STBX = 1054, PPC_STBX8 = 1055, PPC_STD = 1056, PPC_STDBRX = 1057, PPC_STDCIX = 1058, PPC_STDCX = 1059, PPC_STDU = 1060, PPC_STDUX = 1061, PPC_STDX = 1062, PPC_STFD = 1063, PPC_STFDU = 1064, PPC_STFDUX = 1065, PPC_STFDX = 1066, PPC_STFIWX = 1067, PPC_STFS = 1068, PPC_STFSU = 1069, PPC_STFSUX = 1070, PPC_STFSX = 1071, PPC_STH = 1072, PPC_STH8 = 1073, PPC_STHBRX = 1074, PPC_STHCIX = 1075, PPC_STHU = 1076, PPC_STHU8 = 1077, PPC_STHUX = 1078, PPC_STHUX8 = 1079, PPC_STHX = 1080, PPC_STHX8 = 1081, PPC_STMW = 1082, PPC_STSWI = 1083, PPC_STVEBX = 1084, PPC_STVEHX = 1085, PPC_STVEWX = 1086, PPC_STVX = 1087, PPC_STVXL = 1088, PPC_STW = 1089, PPC_STW8 = 1090, PPC_STWBRX = 1091, PPC_STWCIX = 1092, PPC_STWCX = 1093, PPC_STWU = 1094, PPC_STWU8 = 1095, PPC_STWUX = 1096, PPC_STWUX8 = 1097, PPC_STWX = 1098, PPC_STWX8 = 1099, PPC_STXSDX = 1100, PPC_STXVD2X = 1101, PPC_STXVW4X = 1102, PPC_SUBF = 1103, PPC_SUBF8 = 1104, PPC_SUBF8o = 1105, PPC_SUBFC = 1106, PPC_SUBFC8 = 1107, PPC_SUBFC8o = 1108, PPC_SUBFCo = 1109, PPC_SUBFE = 1110, PPC_SUBFE8 = 1111, PPC_SUBFE8o = 1112, PPC_SUBFEo = 1113, PPC_SUBFIC = 1114, PPC_SUBFIC8 = 1115, PPC_SUBFME = 1116, PPC_SUBFME8 = 1117, PPC_SUBFME8o = 1118, PPC_SUBFMEo = 1119, PPC_SUBFZE = 1120, PPC_SUBFZE8 = 1121, PPC_SUBFZE8o = 1122, PPC_SUBFZEo = 1123, PPC_SUBFo = 1124, PPC_SUBI = 1125, PPC_SUBIC = 1126, PPC_SUBICo = 1127, PPC_SUBIS = 1128, PPC_SYNC = 1129, PPC_TAILB = 1130, PPC_TAILB8 = 1131, PPC_TAILBA = 1132, PPC_TAILBA8 = 1133, PPC_TAILBCTR = 1134, PPC_TAILBCTR8 = 1135, PPC_TCRETURNai = 1136, PPC_TCRETURNai8 = 1137, PPC_TCRETURNdi = 1138, PPC_TCRETURNdi8 = 1139, PPC_TCRETURNri = 1140, PPC_TCRETURNri8 = 1141, PPC_TD = 1142, PPC_TDI = 1143, PPC_TLBIA = 1144, PPC_TLBIE = 1145, PPC_TLBIEL = 1146, PPC_TLBIVAX = 1147, PPC_TLBLD = 1148, PPC_TLBLI = 1149, PPC_TLBRE = 1150, PPC_TLBRE2 = 1151, PPC_TLBSX = 1152, PPC_TLBSX2 = 1153, PPC_TLBSX2D = 1154, PPC_TLBSYNC = 1155, PPC_TLBWE = 1156, PPC_TLBWE2 = 1157, PPC_TRAP = 1158, PPC_TW = 1159, PPC_TWI = 1160, PPC_UPDATE_VRSAVE = 1161, PPC_UpdateGBR = 1162, PPC_VADDCUW = 1163, PPC_VADDFP = 1164, PPC_VADDSBS = 1165, PPC_VADDSHS = 1166, PPC_VADDSWS = 1167, PPC_VADDUBM = 1168, PPC_VADDUBS = 1169, PPC_VADDUDM = 1170, PPC_VADDUHM = 1171, PPC_VADDUHS = 1172, PPC_VADDUWM = 1173, PPC_VADDUWS = 1174, PPC_VAND = 1175, PPC_VANDC = 1176, PPC_VAVGSB = 1177, PPC_VAVGSH = 1178, PPC_VAVGSW = 1179, PPC_VAVGUB = 1180, PPC_VAVGUH = 1181, PPC_VAVGUW = 1182, PPC_VCFSX = 1183, PPC_VCFSX_0 = 1184, PPC_VCFUX = 1185, PPC_VCFUX_0 = 1186, PPC_VCLZB = 1187, PPC_VCLZD = 1188, PPC_VCLZH = 1189, PPC_VCLZW = 1190, PPC_VCMPBFP = 1191, PPC_VCMPBFPo = 1192, PPC_VCMPEQFP = 1193, PPC_VCMPEQFPo = 1194, PPC_VCMPEQUB = 1195, PPC_VCMPEQUBo = 1196, PPC_VCMPEQUD = 1197, PPC_VCMPEQUDo = 1198, PPC_VCMPEQUH = 1199, PPC_VCMPEQUHo = 1200, PPC_VCMPEQUW = 1201, PPC_VCMPEQUWo = 1202, PPC_VCMPGEFP = 1203, PPC_VCMPGEFPo = 1204, PPC_VCMPGTFP = 1205, PPC_VCMPGTFPo = 1206, PPC_VCMPGTSB = 1207, PPC_VCMPGTSBo = 1208, PPC_VCMPGTSD = 1209, PPC_VCMPGTSDo = 1210, PPC_VCMPGTSH = 1211, PPC_VCMPGTSHo = 1212, PPC_VCMPGTSW = 1213, PPC_VCMPGTSWo = 1214, PPC_VCMPGTUB = 1215, PPC_VCMPGTUBo = 1216, PPC_VCMPGTUD = 1217, PPC_VCMPGTUDo = 1218, PPC_VCMPGTUH = 1219, PPC_VCMPGTUHo = 1220, PPC_VCMPGTUW = 1221, PPC_VCMPGTUWo = 1222, PPC_VCTSXS = 1223, PPC_VCTSXS_0 = 1224, PPC_VCTUXS = 1225, PPC_VCTUXS_0 = 1226, PPC_VEQV = 1227, PPC_VEXPTEFP = 1228, PPC_VLOGEFP = 1229, PPC_VMADDFP = 1230, PPC_VMAXFP = 1231, PPC_VMAXSB = 1232, PPC_VMAXSD = 1233, PPC_VMAXSH = 1234, PPC_VMAXSW = 1235, PPC_VMAXUB = 1236, PPC_VMAXUD = 1237, PPC_VMAXUH = 1238, PPC_VMAXUW = 1239, PPC_VMHADDSHS = 1240, PPC_VMHRADDSHS = 1241, PPC_VMIDUD = 1242, PPC_VMINFP = 1243, PPC_VMINSB = 1244, PPC_VMINSD = 1245, PPC_VMINSH = 1246, PPC_VMINSW = 1247, PPC_VMINUB = 1248, PPC_VMINUH = 1249, PPC_VMINUW = 1250, PPC_VMLADDUHM = 1251, PPC_VMRGHB = 1252, PPC_VMRGHH = 1253, PPC_VMRGHW = 1254, PPC_VMRGLB = 1255, PPC_VMRGLH = 1256, PPC_VMRGLW = 1257, PPC_VMSUMMBM = 1258, PPC_VMSUMSHM = 1259, PPC_VMSUMSHS = 1260, PPC_VMSUMUBM = 1261, PPC_VMSUMUHM = 1262, PPC_VMSUMUHS = 1263, PPC_VMULESB = 1264, PPC_VMULESH = 1265, PPC_VMULESW = 1266, PPC_VMULEUB = 1267, PPC_VMULEUH = 1268, PPC_VMULEUW = 1269, PPC_VMULOSB = 1270, PPC_VMULOSH = 1271, PPC_VMULOSW = 1272, PPC_VMULOUB = 1273, PPC_VMULOUH = 1274, PPC_VMULOUW = 1275, PPC_VMULUWM = 1276, PPC_VNAND = 1277, PPC_VNMSUBFP = 1278, PPC_VNOR = 1279, PPC_VOR = 1280, PPC_VORC = 1281, PPC_VPERM = 1282, PPC_VPKPX = 1283, PPC_VPKSHSS = 1284, PPC_VPKSHUS = 1285, PPC_VPKSWSS = 1286, PPC_VPKSWUS = 1287, PPC_VPKUHUM = 1288, PPC_VPKUHUS = 1289, PPC_VPKUWUM = 1290, PPC_VPKUWUS = 1291, PPC_VPOPCNTB = 1292, PPC_VPOPCNTD = 1293, PPC_VPOPCNTH = 1294, PPC_VPOPCNTW = 1295, PPC_VREFP = 1296, PPC_VRFIM = 1297, PPC_VRFIN = 1298, PPC_VRFIP = 1299, PPC_VRFIZ = 1300, PPC_VRLB = 1301, PPC_VRLD = 1302, PPC_VRLH = 1303, PPC_VRLW = 1304, PPC_VRSQRTEFP = 1305, PPC_VSEL = 1306, PPC_VSL = 1307, PPC_VSLB = 1308, PPC_VSLD = 1309, PPC_VSLDOI = 1310, PPC_VSLH = 1311, PPC_VSLO = 1312, PPC_VSLW = 1313, PPC_VSPLTB = 1314, PPC_VSPLTH = 1315, PPC_VSPLTISB = 1316, PPC_VSPLTISH = 1317, PPC_VSPLTISW = 1318, PPC_VSPLTW = 1319, PPC_VSR = 1320, PPC_VSRAB = 1321, PPC_VSRAD = 1322, PPC_VSRAH = 1323, PPC_VSRAW = 1324, PPC_VSRB = 1325, PPC_VSRD = 1326, PPC_VSRH = 1327, PPC_VSRO = 1328, PPC_VSRW = 1329, PPC_VSUBCUW = 1330, PPC_VSUBFP = 1331, PPC_VSUBSBS = 1332, PPC_VSUBSHS = 1333, PPC_VSUBSWS = 1334, PPC_VSUBUBM = 1335, PPC_VSUBUBS = 1336, PPC_VSUBUDM = 1337, PPC_VSUBUHM = 1338, PPC_VSUBUHS = 1339, PPC_VSUBUWM = 1340, PPC_VSUBUWS = 1341, PPC_VSUM2SWS = 1342, PPC_VSUM4SBS = 1343, PPC_VSUM4SHS = 1344, PPC_VSUM4UBS = 1345, PPC_VSUMSWS = 1346, PPC_VUPKHPX = 1347, PPC_VUPKHSB = 1348, PPC_VUPKHSH = 1349, PPC_VUPKLPX = 1350, PPC_VUPKLSB = 1351, PPC_VUPKLSH = 1352, PPC_VXOR = 1353, PPC_V_SET0 = 1354, PPC_V_SET0B = 1355, PPC_V_SET0H = 1356, PPC_V_SETALLONES = 1357, PPC_V_SETALLONESB = 1358, PPC_V_SETALLONESH = 1359, PPC_WAIT = 1360, PPC_WRTEE = 1361, PPC_WRTEEI = 1362, PPC_XOR = 1363, PPC_XOR8 = 1364, PPC_XOR8o = 1365, PPC_XORI = 1366, PPC_XORI8 = 1367, PPC_XORIS = 1368, PPC_XORIS8 = 1369, PPC_XORo = 1370, PPC_XSABSDP = 1371, PPC_XSADDDP = 1372, PPC_XSCMPODP = 1373, PPC_XSCMPUDP = 1374, PPC_XSCPSGNDP = 1375, PPC_XSCVDPSP = 1376, PPC_XSCVDPSXDS = 1377, PPC_XSCVDPSXWS = 1378, PPC_XSCVDPUXDS = 1379, PPC_XSCVDPUXWS = 1380, PPC_XSCVSPDP = 1381, PPC_XSCVSXDDP = 1382, PPC_XSCVUXDDP = 1383, PPC_XSDIVDP = 1384, PPC_XSMADDADP = 1385, PPC_XSMADDMDP = 1386, PPC_XSMAXDP = 1387, PPC_XSMINDP = 1388, PPC_XSMSUBADP = 1389, PPC_XSMSUBMDP = 1390, PPC_XSMULDP = 1391, PPC_XSNABSDP = 1392, PPC_XSNEGDP = 1393, PPC_XSNMADDADP = 1394, PPC_XSNMADDMDP = 1395, PPC_XSNMSUBADP = 1396, PPC_XSNMSUBMDP = 1397, PPC_XSRDPI = 1398, PPC_XSRDPIC = 1399, PPC_XSRDPIM = 1400, PPC_XSRDPIP = 1401, PPC_XSRDPIZ = 1402, PPC_XSREDP = 1403, PPC_XSRSQRTEDP = 1404, PPC_XSSQRTDP = 1405, PPC_XSSUBDP = 1406, PPC_XSTDIVDP = 1407, PPC_XSTSQRTDP = 1408, PPC_XVABSDP = 1409, PPC_XVABSSP = 1410, PPC_XVADDDP = 1411, PPC_XVADDSP = 1412, PPC_XVCMPEQDP = 1413, PPC_XVCMPEQDPo = 1414, PPC_XVCMPEQSP = 1415, PPC_XVCMPEQSPo = 1416, PPC_XVCMPGEDP = 1417, PPC_XVCMPGEDPo = 1418, PPC_XVCMPGESP = 1419, PPC_XVCMPGESPo = 1420, PPC_XVCMPGTDP = 1421, PPC_XVCMPGTDPo = 1422, PPC_XVCMPGTSP = 1423, PPC_XVCMPGTSPo = 1424, PPC_XVCPSGNDP = 1425, PPC_XVCPSGNSP = 1426, PPC_XVCVDPSP = 1427, PPC_XVCVDPSXDS = 1428, PPC_XVCVDPSXWS = 1429, PPC_XVCVDPUXDS = 1430, PPC_XVCVDPUXWS = 1431, PPC_XVCVSPDP = 1432, PPC_XVCVSPSXDS = 1433, PPC_XVCVSPSXWS = 1434, PPC_XVCVSPUXDS = 1435, PPC_XVCVSPUXWS = 1436, PPC_XVCVSXDDP = 1437, PPC_XVCVSXDSP = 1438, PPC_XVCVSXWDP = 1439, PPC_XVCVSXWSP = 1440, PPC_XVCVUXDDP = 1441, PPC_XVCVUXDSP = 1442, PPC_XVCVUXWDP = 1443, PPC_XVCVUXWSP = 1444, PPC_XVDIVDP = 1445, PPC_XVDIVSP = 1446, PPC_XVMADDADP = 1447, PPC_XVMADDASP = 1448, PPC_XVMADDMDP = 1449, PPC_XVMADDMSP = 1450, PPC_XVMAXDP = 1451, PPC_XVMAXSP = 1452, PPC_XVMINDP = 1453, PPC_XVMINSP = 1454, PPC_XVMSUBADP = 1455, PPC_XVMSUBASP = 1456, PPC_XVMSUBMDP = 1457, PPC_XVMSUBMSP = 1458, PPC_XVMULDP = 1459, PPC_XVMULSP = 1460, PPC_XVNABSDP = 1461, PPC_XVNABSSP = 1462, PPC_XVNEGDP = 1463, PPC_XVNEGSP = 1464, PPC_XVNMADDADP = 1465, PPC_XVNMADDASP = 1466, PPC_XVNMADDMDP = 1467, PPC_XVNMADDMSP = 1468, PPC_XVNMSUBADP = 1469, PPC_XVNMSUBASP = 1470, PPC_XVNMSUBMDP = 1471, PPC_XVNMSUBMSP = 1472, PPC_XVRDPI = 1473, PPC_XVRDPIC = 1474, PPC_XVRDPIM = 1475, PPC_XVRDPIP = 1476, PPC_XVRDPIZ = 1477, PPC_XVREDP = 1478, PPC_XVRESP = 1479, PPC_XVRSPI = 1480, PPC_XVRSPIC = 1481, PPC_XVRSPIM = 1482, PPC_XVRSPIP = 1483, PPC_XVRSPIZ = 1484, PPC_XVRSQRTEDP = 1485, PPC_XVRSQRTESP = 1486, PPC_XVSQRTDP = 1487, PPC_XVSQRTSP = 1488, PPC_XVSUBDP = 1489, PPC_XVSUBSP = 1490, PPC_XVTDIVDP = 1491, PPC_XVTDIVSP = 1492, PPC_XVTSQRTDP = 1493, PPC_XVTSQRTSP = 1494, PPC_XXLAND = 1495, PPC_XXLANDC = 1496, PPC_XXLEQV = 1497, PPC_XXLNAND = 1498, PPC_XXLNOR = 1499, PPC_XXLOR = 1500, PPC_XXLORC = 1501, PPC_XXLORf = 1502, PPC_XXLXOR = 1503, PPC_XXMRGHW = 1504, PPC_XXMRGLW = 1505, PPC_XXPERMDI = 1506, PPC_XXSEL = 1507, PPC_XXSLDWI = 1508, PPC_XXSPLTW = 1509, PPC_gBC = 1510, PPC_gBCA = 1511, PPC_gBCCTR = 1512, PPC_gBCCTRL = 1513, PPC_gBCL = 1514, PPC_gBCLA = 1515, PPC_gBCLR = 1516, PPC_gBCLRL = 1517, PPC_INSTRUCTION_LIST_END = 1518 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/PowerPC/PPCGenRegisterInfo.inc010066400017500001750000000757271363402546700226400ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { PPC_NoRegister, PPC_BP = 1, PPC_CARRY = 2, PPC_CTR = 3, PPC_FP = 4, PPC_LR = 5, PPC_RM = 6, PPC_VRSAVE = 7, PPC_ZERO = 8, PPC_BP8 = 9, PPC_CR0 = 10, PPC_CR1 = 11, PPC_CR2 = 12, PPC_CR3 = 13, PPC_CR4 = 14, PPC_CR5 = 15, PPC_CR6 = 16, PPC_CR7 = 17, PPC_CTR8 = 18, PPC_F0 = 19, PPC_F1 = 20, PPC_F2 = 21, PPC_F3 = 22, PPC_F4 = 23, PPC_F5 = 24, PPC_F6 = 25, PPC_F7 = 26, PPC_F8 = 27, PPC_F9 = 28, PPC_F10 = 29, PPC_F11 = 30, PPC_F12 = 31, PPC_F13 = 32, PPC_F14 = 33, PPC_F15 = 34, PPC_F16 = 35, PPC_F17 = 36, PPC_F18 = 37, PPC_F19 = 38, PPC_F20 = 39, PPC_F21 = 40, PPC_F22 = 41, PPC_F23 = 42, PPC_F24 = 43, PPC_F25 = 44, PPC_F26 = 45, PPC_F27 = 46, PPC_F28 = 47, PPC_F29 = 48, PPC_F30 = 49, PPC_F31 = 50, PPC_FP8 = 51, PPC_LR8 = 52, PPC_QF0 = 53, PPC_QF1 = 54, PPC_QF2 = 55, PPC_QF3 = 56, PPC_QF4 = 57, PPC_QF5 = 58, PPC_QF6 = 59, PPC_QF7 = 60, PPC_QF8 = 61, PPC_QF9 = 62, PPC_QF10 = 63, PPC_QF11 = 64, PPC_QF12 = 65, PPC_QF13 = 66, PPC_QF14 = 67, PPC_QF15 = 68, PPC_QF16 = 69, PPC_QF17 = 70, PPC_QF18 = 71, PPC_QF19 = 72, PPC_QF20 = 73, PPC_QF21 = 74, PPC_QF22 = 75, PPC_QF23 = 76, PPC_QF24 = 77, PPC_QF25 = 78, PPC_QF26 = 79, PPC_QF27 = 80, PPC_QF28 = 81, PPC_QF29 = 82, PPC_QF30 = 83, PPC_QF31 = 84, PPC_R0 = 85, PPC_R1 = 86, PPC_R2 = 87, PPC_R3 = 88, PPC_R4 = 89, PPC_R5 = 90, PPC_R6 = 91, PPC_R7 = 92, PPC_R8 = 93, PPC_R9 = 94, PPC_R10 = 95, PPC_R11 = 96, PPC_R12 = 97, PPC_R13 = 98, PPC_R14 = 99, PPC_R15 = 100, PPC_R16 = 101, PPC_R17 = 102, PPC_R18 = 103, PPC_R19 = 104, PPC_R20 = 105, PPC_R21 = 106, PPC_R22 = 107, PPC_R23 = 108, PPC_R24 = 109, PPC_R25 = 110, PPC_R26 = 111, PPC_R27 = 112, PPC_R28 = 113, PPC_R29 = 114, PPC_R30 = 115, PPC_R31 = 116, PPC_V0 = 117, PPC_V1 = 118, PPC_V2 = 119, PPC_V3 = 120, PPC_V4 = 121, PPC_V5 = 122, PPC_V6 = 123, PPC_V7 = 124, PPC_V8 = 125, PPC_V9 = 126, PPC_V10 = 127, PPC_V11 = 128, PPC_V12 = 129, PPC_V13 = 130, PPC_V14 = 131, PPC_V15 = 132, PPC_V16 = 133, PPC_V17 = 134, PPC_V18 = 135, PPC_V19 = 136, PPC_V20 = 137, PPC_V21 = 138, PPC_V22 = 139, PPC_V23 = 140, PPC_V24 = 141, PPC_V25 = 142, PPC_V26 = 143, PPC_V27 = 144, PPC_V28 = 145, PPC_V29 = 146, PPC_V30 = 147, PPC_V31 = 148, PPC_VF0 = 149, PPC_VF1 = 150, PPC_VF2 = 151, PPC_VF3 = 152, PPC_VF4 = 153, PPC_VF5 = 154, PPC_VF6 = 155, PPC_VF7 = 156, PPC_VF8 = 157, PPC_VF9 = 158, PPC_VF10 = 159, PPC_VF11 = 160, PPC_VF12 = 161, PPC_VF13 = 162, PPC_VF14 = 163, PPC_VF15 = 164, PPC_VF16 = 165, PPC_VF17 = 166, PPC_VF18 = 167, PPC_VF19 = 168, PPC_VF20 = 169, PPC_VF21 = 170, PPC_VF22 = 171, PPC_VF23 = 172, PPC_VF24 = 173, PPC_VF25 = 174, PPC_VF26 = 175, PPC_VF27 = 176, PPC_VF28 = 177, PPC_VF29 = 178, PPC_VF30 = 179, PPC_VF31 = 180, PPC_VSH0 = 181, PPC_VSH1 = 182, PPC_VSH2 = 183, PPC_VSH3 = 184, PPC_VSH4 = 185, PPC_VSH5 = 186, PPC_VSH6 = 187, PPC_VSH7 = 188, PPC_VSH8 = 189, PPC_VSH9 = 190, PPC_VSH10 = 191, PPC_VSH11 = 192, PPC_VSH12 = 193, PPC_VSH13 = 194, PPC_VSH14 = 195, PPC_VSH15 = 196, PPC_VSH16 = 197, PPC_VSH17 = 198, PPC_VSH18 = 199, PPC_VSH19 = 200, PPC_VSH20 = 201, PPC_VSH21 = 202, PPC_VSH22 = 203, PPC_VSH23 = 204, PPC_VSH24 = 205, PPC_VSH25 = 206, PPC_VSH26 = 207, PPC_VSH27 = 208, PPC_VSH28 = 209, PPC_VSH29 = 210, PPC_VSH30 = 211, PPC_VSH31 = 212, PPC_VSL0 = 213, PPC_VSL1 = 214, PPC_VSL2 = 215, PPC_VSL3 = 216, PPC_VSL4 = 217, PPC_VSL5 = 218, PPC_VSL6 = 219, PPC_VSL7 = 220, PPC_VSL8 = 221, PPC_VSL9 = 222, PPC_VSL10 = 223, PPC_VSL11 = 224, PPC_VSL12 = 225, PPC_VSL13 = 226, PPC_VSL14 = 227, PPC_VSL15 = 228, PPC_VSL16 = 229, PPC_VSL17 = 230, PPC_VSL18 = 231, PPC_VSL19 = 232, PPC_VSL20 = 233, PPC_VSL21 = 234, PPC_VSL22 = 235, PPC_VSL23 = 236, PPC_VSL24 = 237, PPC_VSL25 = 238, PPC_VSL26 = 239, PPC_VSL27 = 240, PPC_VSL28 = 241, PPC_VSL29 = 242, PPC_VSL30 = 243, PPC_VSL31 = 244, PPC_X0 = 245, PPC_X1 = 246, PPC_X2 = 247, PPC_X3 = 248, PPC_X4 = 249, PPC_X5 = 250, PPC_X6 = 251, PPC_X7 = 252, PPC_X8 = 253, PPC_X9 = 254, PPC_X10 = 255, PPC_X11 = 256, PPC_X12 = 257, PPC_X13 = 258, PPC_X14 = 259, PPC_X15 = 260, PPC_X16 = 261, PPC_X17 = 262, PPC_X18 = 263, PPC_X19 = 264, PPC_X20 = 265, PPC_X21 = 266, PPC_X22 = 267, PPC_X23 = 268, PPC_X24 = 269, PPC_X25 = 270, PPC_X26 = 271, PPC_X27 = 272, PPC_X28 = 273, PPC_X29 = 274, PPC_X30 = 275, PPC_X31 = 276, PPC_ZERO8 = 277, PPC_CR0EQ = 278, PPC_CR1EQ = 279, PPC_CR2EQ = 280, PPC_CR3EQ = 281, PPC_CR4EQ = 282, PPC_CR5EQ = 283, PPC_CR6EQ = 284, PPC_CR7EQ = 285, PPC_CR0GT = 286, PPC_CR1GT = 287, PPC_CR2GT = 288, PPC_CR3GT = 289, PPC_CR4GT = 290, PPC_CR5GT = 291, PPC_CR6GT = 292, PPC_CR7GT = 293, PPC_CR0LT = 294, PPC_CR1LT = 295, PPC_CR2LT = 296, PPC_CR3LT = 297, PPC_CR4LT = 298, PPC_CR5LT = 299, PPC_CR6LT = 300, PPC_CR7LT = 301, PPC_CR0UN = 302, PPC_CR1UN = 303, PPC_CR2UN = 304, PPC_CR3UN = 305, PPC_CR4UN = 306, PPC_CR5UN = 307, PPC_CR6UN = 308, PPC_CR7UN = 309, PPC_NUM_TARGET_REGS // 310 }; // Register classes enum { PPC_GPRCRegClassID = 0, PPC_GPRC_NOR0RegClassID = 1, PPC_GPRC_and_GPRC_NOR0RegClassID = 2, PPC_CRBITRCRegClassID = 3, PPC_F4RCRegClassID = 4, PPC_CRRCRegClassID = 5, PPC_CARRYRCRegClassID = 6, PPC_CTRRCRegClassID = 7, PPC_VRSAVERCRegClassID = 8, PPC_VSFRCRegClassID = 9, PPC_G8RCRegClassID = 10, PPC_G8RC_NOX0RegClassID = 11, PPC_G8RC_and_G8RC_NOX0RegClassID = 12, PPC_F8RCRegClassID = 13, PPC_VFRCRegClassID = 14, PPC_CTRRC8RegClassID = 15, PPC_VSRCRegClassID = 16, PPC_QSRCRegClassID = 17, PPC_VRRCRegClassID = 18, PPC_VSHRCRegClassID = 19, PPC_VSLRCRegClassID = 20, PPC_QBRCRegClassID = 21, PPC_QFRCRegClassID = 22, }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg PPCRegDiffLists[] = { /* 0 */ 0, 0, /* 2 */ 65504, 1, 1, 1, 0, /* 7 */ 3, 0, /* 9 */ 8, 0, /* 11 */ 22, 0, /* 13 */ 284, 65528, 65528, 24, 0, /* 18 */ 65472, 32, 0, /* 21 */ 47, 0, /* 23 */ 65504, 64, 0, /* 26 */ 73, 0, /* 28 */ 34, 160, 0, /* 31 */ 269, 0, /* 33 */ 64339, 0, /* 35 */ 64368, 0, /* 37 */ 64401, 0, /* 39 */ 64434, 0, /* 41 */ 64712, 0, /* 43 */ 65244, 0, /* 45 */ 65252, 0, /* 47 */ 65260, 0, /* 49 */ 65267, 0, /* 51 */ 65268, 0, /* 53 */ 65342, 0, /* 55 */ 65364, 0, /* 57 */ 65365, 0, /* 59 */ 65376, 0, /* 61 */ 65461, 0, /* 63 */ 65489, 0, /* 65 */ 65493, 0, /* 67 */ 65502, 0, /* 69 */ 65524, 0, /* 71 */ 65525, 0, /* 73 */ 65528, 0, /* 75 */ 65535, 0, }; static const uint16_t PPCSubRegIdxLists[] = { /* 0 */ 1, 0, /* 2 */ 3, 2, 0, /* 5 */ 6, 5, 4, 7, 0, }; static MCRegisterDesc PPCRegDesc[] = { // Descriptors { 4, 0, 0, 0, 0, 0 }, { 1109, 1, 9, 1, 1201, 0 }, { 1266, 1, 1, 1, 1201, 0 }, { 1166, 1, 1, 1, 1201, 0 }, { 1112, 1, 21, 1, 1201, 0 }, { 1163, 1, 1, 1, 1201, 0 }, { 1053, 1, 1, 1, 1201, 0 }, { 1046, 1, 1, 1, 1201, 0 }, { 1104, 1, 31, 1, 1201, 0 }, { 928, 73, 1, 0, 0, 2 }, { 120, 13, 1, 5, 36, 6 }, { 250, 13, 1, 5, 36, 6 }, { 346, 13, 1, 5, 36, 6 }, { 442, 13, 1, 5, 36, 6 }, { 538, 13, 1, 5, 36, 6 }, { 634, 13, 1, 5, 36, 6 }, { 730, 13, 1, 5, 36, 6 }, { 826, 13, 1, 5, 36, 6 }, { 940, 1, 1, 1, 177, 0 }, { 103, 1, 28, 1, 177, 0 }, { 233, 1, 28, 1, 177, 0 }, { 329, 1, 28, 1, 177, 0 }, { 425, 1, 28, 1, 177, 0 }, { 521, 1, 28, 1, 177, 0 }, { 617, 1, 28, 1, 177, 0 }, { 713, 1, 28, 1, 177, 0 }, { 809, 1, 28, 1, 177, 0 }, { 905, 1, 28, 1, 177, 0 }, { 1020, 1, 28, 1, 177, 0 }, { 1, 1, 28, 1, 177, 0 }, { 131, 1, 28, 1, 177, 0 }, { 261, 1, 28, 1, 177, 0 }, { 357, 1, 28, 1, 177, 0 }, { 453, 1, 28, 1, 177, 0 }, { 549, 1, 28, 1, 177, 0 }, { 645, 1, 28, 1, 177, 0 }, { 741, 1, 28, 1, 177, 0 }, { 837, 1, 28, 1, 177, 0 }, { 952, 1, 28, 1, 177, 0 }, { 35, 1, 28, 1, 177, 0 }, { 165, 1, 28, 1, 177, 0 }, { 295, 1, 28, 1, 177, 0 }, { 391, 1, 28, 1, 177, 0 }, { 487, 1, 28, 1, 177, 0 }, { 583, 1, 28, 1, 177, 0 }, { 679, 1, 28, 1, 177, 0 }, { 775, 1, 28, 1, 177, 0 }, { 871, 1, 28, 1, 177, 0 }, { 986, 1, 28, 1, 177, 0 }, { 69, 1, 28, 1, 177, 0 }, { 199, 1, 28, 1, 177, 0 }, { 932, 63, 1, 0, 112, 2 }, { 936, 1, 1, 1, 416, 0 }, { 102, 67, 1, 3, 1105, 4 }, { 232, 67, 1, 3, 1105, 4 }, { 328, 67, 1, 3, 1105, 4 }, { 424, 67, 1, 3, 1105, 4 }, { 520, 67, 1, 3, 1105, 4 }, { 616, 67, 1, 3, 1105, 4 }, { 712, 67, 1, 3, 1105, 4 }, { 808, 67, 1, 3, 1105, 4 }, { 904, 67, 1, 3, 1105, 4 }, { 1019, 67, 1, 3, 1105, 4 }, { 0, 67, 1, 3, 1105, 4 }, { 130, 67, 1, 3, 1105, 4 }, { 260, 67, 1, 3, 1105, 4 }, { 356, 67, 1, 3, 1105, 4 }, { 452, 67, 1, 3, 1105, 4 }, { 548, 67, 1, 3, 1105, 4 }, { 644, 67, 1, 3, 1105, 4 }, { 740, 67, 1, 3, 1105, 4 }, { 836, 67, 1, 3, 1105, 4 }, { 951, 67, 1, 3, 1105, 4 }, { 34, 67, 1, 3, 1105, 4 }, { 164, 67, 1, 3, 1105, 4 }, { 294, 67, 1, 3, 1105, 4 }, { 390, 67, 1, 3, 1105, 4 }, { 486, 67, 1, 3, 1105, 4 }, { 582, 67, 1, 3, 1105, 4 }, { 678, 67, 1, 3, 1105, 4 }, { 774, 67, 1, 3, 1105, 4 }, { 870, 67, 1, 3, 1105, 4 }, { 985, 67, 1, 3, 1105, 4 }, { 68, 67, 1, 3, 1105, 4 }, { 198, 67, 1, 3, 1105, 4 }, { 121, 1, 29, 1, 1137, 0 }, { 251, 1, 29, 1, 1137, 0 }, { 347, 1, 29, 1, 1137, 0 }, { 443, 1, 29, 1, 1137, 0 }, { 539, 1, 29, 1, 1137, 0 }, { 635, 1, 29, 1, 1137, 0 }, { 731, 1, 29, 1, 1137, 0 }, { 827, 1, 29, 1, 1137, 0 }, { 937, 1, 29, 1, 1137, 0 }, { 1037, 1, 29, 1, 1137, 0 }, { 22, 1, 29, 1, 1137, 0 }, { 152, 1, 29, 1, 1137, 0 }, { 282, 1, 29, 1, 1137, 0 }, { 378, 1, 29, 1, 1137, 0 }, { 474, 1, 29, 1, 1137, 0 }, { 570, 1, 29, 1, 1137, 0 }, { 666, 1, 29, 1, 1137, 0 }, { 762, 1, 29, 1, 1137, 0 }, { 858, 1, 29, 1, 1137, 0 }, { 973, 1, 29, 1, 1137, 0 }, { 56, 1, 29, 1, 1137, 0 }, { 186, 1, 29, 1, 1137, 0 }, { 316, 1, 29, 1, 1137, 0 }, { 412, 1, 29, 1, 1137, 0 }, { 508, 1, 29, 1, 1137, 0 }, { 604, 1, 29, 1, 1137, 0 }, { 700, 1, 29, 1, 1137, 0 }, { 796, 1, 29, 1, 1137, 0 }, { 892, 1, 29, 1, 1137, 0 }, { 1007, 1, 29, 1, 1137, 0 }, { 90, 1, 29, 1, 1137, 0 }, { 220, 1, 29, 1, 1137, 0 }, { 124, 19, 24, 3, 1137, 4 }, { 254, 19, 24, 3, 1137, 4 }, { 350, 19, 24, 3, 1137, 4 }, { 446, 19, 24, 3, 1137, 4 }, { 542, 19, 24, 3, 1137, 4 }, { 638, 19, 24, 3, 1137, 4 }, { 734, 19, 24, 3, 1137, 4 }, { 830, 19, 24, 3, 1137, 4 }, { 945, 19, 24, 3, 1137, 4 }, { 1040, 19, 24, 3, 1137, 4 }, { 26, 19, 24, 3, 1137, 4 }, { 156, 19, 24, 3, 1137, 4 }, { 286, 19, 24, 3, 1137, 4 }, { 382, 19, 24, 3, 1137, 4 }, { 478, 19, 24, 3, 1137, 4 }, { 574, 19, 24, 3, 1137, 4 }, { 670, 19, 24, 3, 1137, 4 }, { 766, 19, 24, 3, 1137, 4 }, { 862, 19, 24, 3, 1137, 4 }, { 977, 19, 24, 3, 1137, 4 }, { 60, 19, 24, 3, 1137, 4 }, { 190, 19, 24, 3, 1137, 4 }, { 320, 19, 24, 3, 1137, 4 }, { 416, 19, 24, 3, 1137, 4 }, { 512, 19, 24, 3, 1137, 4 }, { 608, 19, 24, 3, 1137, 4 }, { 704, 19, 24, 3, 1137, 4 }, { 800, 19, 24, 3, 1137, 4 }, { 896, 19, 24, 3, 1137, 4 }, { 1011, 19, 24, 3, 1137, 4 }, { 94, 19, 24, 3, 1137, 4 }, { 224, 19, 24, 3, 1137, 4 }, { 106, 1, 23, 1, 1041, 0 }, { 236, 1, 23, 1, 1041, 0 }, { 332, 1, 23, 1, 1041, 0 }, { 428, 1, 23, 1, 1041, 0 }, { 524, 1, 23, 1, 1041, 0 }, { 620, 1, 23, 1, 1041, 0 }, { 716, 1, 23, 1, 1041, 0 }, { 812, 1, 23, 1, 1041, 0 }, { 908, 1, 23, 1, 1041, 0 }, { 1023, 1, 23, 1, 1041, 0 }, { 5, 1, 23, 1, 1041, 0 }, { 135, 1, 23, 1, 1041, 0 }, { 265, 1, 23, 1, 1041, 0 }, { 361, 1, 23, 1, 1041, 0 }, { 457, 1, 23, 1, 1041, 0 }, { 553, 1, 23, 1, 1041, 0 }, { 649, 1, 23, 1, 1041, 0 }, { 745, 1, 23, 1, 1041, 0 }, { 841, 1, 23, 1, 1041, 0 }, { 956, 1, 23, 1, 1041, 0 }, { 39, 1, 23, 1, 1041, 0 }, { 169, 1, 23, 1, 1041, 0 }, { 299, 1, 23, 1, 1041, 0 }, { 395, 1, 23, 1, 1041, 0 }, { 491, 1, 23, 1, 1041, 0 }, { 587, 1, 23, 1, 1041, 0 }, { 683, 1, 23, 1, 1041, 0 }, { 779, 1, 23, 1, 1041, 0 }, { 875, 1, 23, 1, 1041, 0 }, { 990, 1, 23, 1, 1041, 0 }, { 73, 1, 23, 1, 1041, 0 }, { 203, 1, 23, 1, 1041, 0 }, { 110, 18, 1, 2, 977, 4 }, { 240, 18, 1, 2, 977, 4 }, { 336, 18, 1, 2, 977, 4 }, { 432, 18, 1, 2, 977, 4 }, { 528, 18, 1, 2, 977, 4 }, { 624, 18, 1, 2, 977, 4 }, { 720, 18, 1, 2, 977, 4 }, { 816, 18, 1, 2, 977, 4 }, { 912, 18, 1, 2, 977, 4 }, { 1027, 18, 1, 2, 977, 4 }, { 10, 18, 1, 2, 977, 4 }, { 140, 18, 1, 2, 977, 4 }, { 270, 18, 1, 2, 977, 4 }, { 366, 18, 1, 2, 977, 4 }, { 462, 18, 1, 2, 977, 4 }, { 558, 18, 1, 2, 977, 4 }, { 654, 18, 1, 2, 977, 4 }, { 750, 18, 1, 2, 977, 4 }, { 846, 18, 1, 2, 977, 4 }, { 961, 18, 1, 2, 977, 4 }, { 44, 18, 1, 2, 977, 4 }, { 174, 18, 1, 2, 977, 4 }, { 304, 18, 1, 2, 977, 4 }, { 400, 18, 1, 2, 977, 4 }, { 496, 18, 1, 2, 977, 4 }, { 592, 18, 1, 2, 977, 4 }, { 688, 18, 1, 2, 977, 4 }, { 784, 18, 1, 2, 977, 4 }, { 880, 18, 1, 2, 977, 4 }, { 995, 18, 1, 2, 977, 4 }, { 78, 18, 1, 2, 977, 4 }, { 208, 18, 1, 2, 977, 4 }, { 115, 53, 1, 3, 881, 4 }, { 245, 53, 1, 3, 881, 4 }, { 341, 53, 1, 3, 881, 4 }, { 437, 53, 1, 3, 881, 4 }, { 533, 53, 1, 3, 881, 4 }, { 629, 53, 1, 3, 881, 4 }, { 725, 53, 1, 3, 881, 4 }, { 821, 53, 1, 3, 881, 4 }, { 917, 53, 1, 3, 881, 4 }, { 1032, 53, 1, 3, 881, 4 }, { 16, 53, 1, 3, 881, 4 }, { 146, 53, 1, 3, 881, 4 }, { 276, 53, 1, 3, 881, 4 }, { 372, 53, 1, 3, 881, 4 }, { 468, 53, 1, 3, 881, 4 }, { 564, 53, 1, 3, 881, 4 }, { 660, 53, 1, 3, 881, 4 }, { 756, 53, 1, 3, 881, 4 }, { 852, 53, 1, 3, 881, 4 }, { 967, 53, 1, 3, 881, 4 }, { 50, 53, 1, 3, 881, 4 }, { 180, 53, 1, 3, 881, 4 }, { 310, 53, 1, 3, 881, 4 }, { 406, 53, 1, 3, 881, 4 }, { 502, 53, 1, 3, 881, 4 }, { 598, 53, 1, 3, 881, 4 }, { 694, 53, 1, 3, 881, 4 }, { 790, 53, 1, 3, 881, 4 }, { 886, 53, 1, 3, 881, 4 }, { 1001, 53, 1, 3, 881, 4 }, { 84, 53, 1, 3, 881, 4 }, { 214, 53, 1, 3, 881, 4 }, { 127, 59, 1, 0, 913, 2 }, { 257, 59, 1, 0, 913, 2 }, { 353, 59, 1, 0, 913, 2 }, { 449, 59, 1, 0, 913, 2 }, { 545, 59, 1, 0, 913, 2 }, { 641, 59, 1, 0, 913, 2 }, { 737, 59, 1, 0, 913, 2 }, { 833, 59, 1, 0, 913, 2 }, { 948, 59, 1, 0, 913, 2 }, { 1043, 59, 1, 0, 913, 2 }, { 30, 59, 1, 0, 913, 2 }, { 160, 59, 1, 0, 913, 2 }, { 290, 59, 1, 0, 913, 2 }, { 386, 59, 1, 0, 913, 2 }, { 482, 59, 1, 0, 913, 2 }, { 578, 59, 1, 0, 913, 2 }, { 674, 59, 1, 0, 913, 2 }, { 770, 59, 1, 0, 913, 2 }, { 866, 59, 1, 0, 913, 2 }, { 981, 59, 1, 0, 913, 2 }, { 64, 59, 1, 0, 913, 2 }, { 194, 59, 1, 0, 913, 2 }, { 324, 59, 1, 0, 913, 2 }, { 420, 59, 1, 0, 913, 2 }, { 516, 59, 1, 0, 913, 2 }, { 612, 59, 1, 0, 913, 2 }, { 708, 59, 1, 0, 913, 2 }, { 804, 59, 1, 0, 913, 2 }, { 900, 59, 1, 0, 913, 2 }, { 1015, 59, 1, 0, 913, 2 }, { 98, 59, 1, 0, 913, 2 }, { 228, 59, 1, 0, 913, 2 }, { 922, 49, 1, 0, 659, 2 }, { 1115, 1, 51, 1, 659, 0 }, { 1121, 1, 51, 1, 628, 0 }, { 1127, 1, 51, 1, 628, 0 }, { 1133, 1, 51, 1, 628, 0 }, { 1139, 1, 51, 1, 628, 0 }, { 1145, 1, 51, 1, 628, 0 }, { 1151, 1, 51, 1, 628, 0 }, { 1157, 1, 51, 1, 628, 0 }, { 1170, 1, 47, 1, 596, 0 }, { 1176, 1, 47, 1, 596, 0 }, { 1182, 1, 47, 1, 596, 0 }, { 1188, 1, 47, 1, 596, 0 }, { 1194, 1, 47, 1, 596, 0 }, { 1200, 1, 47, 1, 596, 0 }, { 1206, 1, 47, 1, 596, 0 }, { 1212, 1, 47, 1, 596, 0 }, { 1218, 1, 45, 1, 564, 0 }, { 1224, 1, 45, 1, 564, 0 }, { 1230, 1, 45, 1, 564, 0 }, { 1236, 1, 45, 1, 564, 0 }, { 1242, 1, 45, 1, 564, 0 }, { 1248, 1, 45, 1, 564, 0 }, { 1254, 1, 45, 1, 564, 0 }, { 1260, 1, 45, 1, 564, 0 }, { 1056, 1, 43, 1, 532, 0 }, { 1062, 1, 43, 1, 532, 0 }, { 1068, 1, 43, 1, 532, 0 }, { 1074, 1, 43, 1, 532, 0 }, { 1080, 1, 43, 1, 532, 0 }, { 1086, 1, 43, 1, 532, 0 }, { 1092, 1, 43, 1, 532, 0 }, { 1098, 1, 43, 1, 532, 0 }, }; // GPRC Register Class... static const MCPhysReg GPRC[] = { PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R0, PPC_R1, PPC_FP, PPC_BP, }; // GPRC Bit set. static uint8_t GPRCBits[] = { 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // GPRC_NOR0 Register Class... static const MCPhysReg GPRC_NOR0[] = { PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R1, PPC_FP, PPC_BP, PPC_ZERO, }; // GPRC_NOR0 Bit set. static uint8_t GPRC_NOR0Bits[] = { 0x12, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, }; // GPRC_and_GPRC_NOR0 Register Class... static const MCPhysReg GPRC_and_GPRC_NOR0[] = { PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R1, PPC_FP, PPC_BP, }; // GPRC_and_GPRC_NOR0 Bit set. static uint8_t GPRC_and_GPRC_NOR0Bits[] = { 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, }; // CRBITRC Register Class... static const MCPhysReg CRBITRC[] = { PPC_CR2LT, PPC_CR2GT, PPC_CR2EQ, PPC_CR2UN, PPC_CR3LT, PPC_CR3GT, PPC_CR3EQ, PPC_CR3UN, PPC_CR4LT, PPC_CR4GT, PPC_CR4EQ, PPC_CR4UN, PPC_CR5LT, PPC_CR5GT, PPC_CR5EQ, PPC_CR5UN, PPC_CR6LT, PPC_CR6GT, PPC_CR6EQ, PPC_CR6UN, PPC_CR7LT, PPC_CR7GT, PPC_CR7EQ, PPC_CR7UN, PPC_CR1LT, PPC_CR1GT, PPC_CR1EQ, PPC_CR1UN, PPC_CR0LT, PPC_CR0GT, PPC_CR0EQ, PPC_CR0UN, }; // CRBITRC Bit set. static uint8_t CRBITRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, }; // F4RC Register Class... static const MCPhysReg F4RC[] = { PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, }; // F4RC Bit set. static uint8_t F4RCBits[] = { 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // CRRC Register Class... static const MCPhysReg CRRC[] = { PPC_CR0, PPC_CR1, PPC_CR5, PPC_CR6, PPC_CR7, PPC_CR2, PPC_CR3, PPC_CR4, }; // CRRC Bit set. static uint8_t CRRCBits[] = { 0x00, 0xfc, 0x03, }; // CARRYRC Register Class... static const MCPhysReg CARRYRC[] = { PPC_CARRY, }; // CARRYRC Bit set. static const uint8_t CARRYRCBits[] = { 0x04, }; // CTRRC Register Class... static const MCPhysReg CTRRC[] = { PPC_CTR, }; // CTRRC Bit set. static uint8_t CTRRCBits[] = { 0x08, }; // VRSAVERC Register Class... static const MCPhysReg VRSAVERC[] = { PPC_VRSAVE, }; // VRSAVERC Bit set. static uint8_t VRSAVERCBits[] = { 0x80, }; // VSFRC Register Class... static const MCPhysReg VSFRC[] = { PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20, }; // VSFRC Bit set. static uint8_t VSFRCBits[] = { 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // G8RC Register Class... static const MCPhysReg G8RC[] = { PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X0, PPC_X1, PPC_FP8, PPC_BP8, }; // G8RC Bit set. static uint8_t G8RCBits[] = { 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // G8RC_NOX0 Register Class... static const MCPhysReg G8RC_NOX0[] = { PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X1, PPC_FP8, PPC_BP8, PPC_ZERO8, }; // G8RC_NOX0 Bit set. static uint8_t G8RC_NOX0Bits[] = { 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, }; // G8RC_and_G8RC_NOX0 Register Class... static const MCPhysReg G8RC_and_G8RC_NOX0[] = { PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X1, PPC_FP8, PPC_BP8, }; // G8RC_and_G8RC_NOX0 Bit set. static uint8_t G8RC_and_G8RC_NOX0Bits[] = { 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, }; // F8RC Register Class... static const MCPhysReg F8RC[] = { PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, }; // F8RC Bit set. static uint8_t F8RCBits[] = { 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // VFRC Register Class... static const MCPhysReg VFRC[] = { PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20, }; // VFRC Bit set. static uint8_t VFRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // CTRRC8 Register Class... static const MCPhysReg CTRRC8[] = { PPC_CTR8, }; // CTRRC8 Bit set. static uint8_t CTRRC8Bits[] = { 0x00, 0x00, 0x04, }; // VSRC Register Class... static const MCPhysReg VSRC[] = { PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL31, PPC_VSL30, PPC_VSL29, PPC_VSL28, PPC_VSL27, PPC_VSL26, PPC_VSL25, PPC_VSL24, PPC_VSL23, PPC_VSL22, PPC_VSL21, PPC_VSL20, PPC_VSL19, PPC_VSL18, PPC_VSL17, PPC_VSL16, PPC_VSL15, PPC_VSL14, PPC_VSH2, PPC_VSH3, PPC_VSH4, PPC_VSH5, PPC_VSH0, PPC_VSH1, PPC_VSH6, PPC_VSH7, PPC_VSH8, PPC_VSH9, PPC_VSH10, PPC_VSH11, PPC_VSH12, PPC_VSH13, PPC_VSH14, PPC_VSH15, PPC_VSH16, PPC_VSH17, PPC_VSH18, PPC_VSH19, PPC_VSH31, PPC_VSH30, PPC_VSH29, PPC_VSH28, PPC_VSH27, PPC_VSH26, PPC_VSH25, PPC_VSH24, PPC_VSH23, PPC_VSH22, PPC_VSH21, PPC_VSH20, }; // VSRC Bit set. static uint8_t VSRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, }; // QSRC Register Class... static MCPhysReg QSRC[] = { PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF31, PPC_QF30, PPC_QF29, PPC_QF28, PPC_QF27, PPC_QF26, PPC_QF25, PPC_QF24, PPC_QF23, PPC_QF22, PPC_QF21, PPC_QF20, PPC_QF19, PPC_QF18, PPC_QF17, PPC_QF16, PPC_QF15, PPC_QF14, }; // QSRC Bit set. static uint8_t QSRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // VRRC Register Class... static const MCPhysReg VRRC[] = { PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V0, PPC_V1, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19, PPC_V31, PPC_V30, PPC_V29, PPC_V28, PPC_V27, PPC_V26, PPC_V25, PPC_V24, PPC_V23, PPC_V22, PPC_V21, PPC_V20, }; // VRRC Bit set. static uint8_t VRRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // VSHRC Register Class... static const MCPhysReg VSHRC[] = { PPC_VSH2, PPC_VSH3, PPC_VSH4, PPC_VSH5, PPC_VSH0, PPC_VSH1, PPC_VSH6, PPC_VSH7, PPC_VSH8, PPC_VSH9, PPC_VSH10, PPC_VSH11, PPC_VSH12, PPC_VSH13, PPC_VSH14, PPC_VSH15, PPC_VSH16, PPC_VSH17, PPC_VSH18, PPC_VSH19, PPC_VSH31, PPC_VSH30, PPC_VSH29, PPC_VSH28, PPC_VSH27, PPC_VSH26, PPC_VSH25, PPC_VSH24, PPC_VSH23, PPC_VSH22, PPC_VSH21, PPC_VSH20, }; // VSHRC Bit set. static uint8_t VSHRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // VSLRC Register Class... static const MCPhysReg VSLRC[] = { PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL31, PPC_VSL30, PPC_VSL29, PPC_VSL28, PPC_VSL27, PPC_VSL26, PPC_VSL25, PPC_VSL24, PPC_VSL23, PPC_VSL22, PPC_VSL21, PPC_VSL20, PPC_VSL19, PPC_VSL18, PPC_VSL17, PPC_VSL16, PPC_VSL15, PPC_VSL14, }; // VSLRC Bit set. static uint8_t VSLRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // QBRC Register Class... static MCPhysReg QBRC[] = { PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF31, PPC_QF30, PPC_QF29, PPC_QF28, PPC_QF27, PPC_QF26, PPC_QF25, PPC_QF24, PPC_QF23, PPC_QF22, PPC_QF21, PPC_QF20, PPC_QF19, PPC_QF18, PPC_QF17, PPC_QF16, PPC_QF15, PPC_QF14, }; // QBRC Bit set. static uint8_t QBRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; // QFRC Register Class... static MCPhysReg QFRC[] = { PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF31, PPC_QF30, PPC_QF29, PPC_QF28, PPC_QF27, PPC_QF26, PPC_QF25, PPC_QF24, PPC_QF23, PPC_QF22, PPC_QF21, PPC_QF20, PPC_QF19, PPC_QF18, PPC_QF17, PPC_QF16, PPC_QF15, PPC_QF14, }; // QFRC Bit set. static uint8_t QFRCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f, }; static MCRegisterClass PPCMCRegisterClasses[] = { { GPRC, GPRCBits, 102, 34, sizeof(GPRCBits), PPC_GPRCRegClassID, 4, 4, 1, 1 }, { GPRC_NOR0, GPRC_NOR0Bits, 9, 34, sizeof(GPRC_NOR0Bits), PPC_GPRC_NOR0RegClassID, 4, 4, 1, 1 }, { GPRC_and_GPRC_NOR0, GPRC_and_GPRC_NOR0Bits, 0, 33, sizeof(GPRC_and_GPRC_NOR0Bits), PPC_GPRC_and_GPRC_NOR0RegClassID, 4, 4, 1, 1 }, { CRBITRC, CRBITRCBits, 133, 32, sizeof(CRBITRCBits), PPC_CRBITRCRegClassID, 4, 4, 1, 1 }, { F4RC, F4RCBits, 45, 32, sizeof(F4RCBits), PPC_F4RCRegClassID, 4, 4, 1, 1 }, { CRRC, CRRCBits, 107, 8, sizeof(CRRCBits), PPC_CRRCRegClassID, 4, 4, 1, 1 }, { CARRYRC, CARRYRCBits, 141, 1, sizeof(CARRYRCBits), PPC_CARRYRCRegClassID, 4, 4, -1, 1 }, { CTRRC, CTRRCBits, 112, 1, sizeof(CTRRCBits), PPC_CTRRCRegClassID, 4, 4, 1, 0 }, { VRSAVERC, VRSAVERCBits, 65, 1, sizeof(VRSAVERCBits), PPC_VRSAVERCRegClassID, 4, 4, 1, 1 }, { VSFRC, VSFRCBits, 79, 64, sizeof(VSFRCBits), PPC_VSFRCRegClassID, 8, 8, 1, 1 }, { G8RC, G8RCBits, 55, 34, sizeof(G8RCBits), PPC_G8RCRegClassID, 8, 8, 1, 1 }, { G8RC_NOX0, G8RC_NOX0Bits, 28, 34, sizeof(G8RC_NOX0Bits), PPC_G8RC_NOX0RegClassID, 8, 8, 1, 1 }, { G8RC_and_G8RC_NOX0, G8RC_and_G8RC_NOX0Bits, 19, 33, sizeof(G8RC_and_G8RC_NOX0Bits), PPC_G8RC_and_G8RC_NOX0RegClassID, 8, 8, 1, 1 }, { F8RC, F8RCBits, 50, 32, sizeof(F8RCBits), PPC_F8RCRegClassID, 8, 8, 1, 1 }, { VFRC, VFRCBits, 85, 32, sizeof(VFRCBits), PPC_VFRCRegClassID, 8, 8, 1, 1 }, { CTRRC8, CTRRC8Bits, 38, 1, sizeof(CTRRC8Bits), PPC_CTRRC8RegClassID, 8, 8, 1, 0 }, { VSRC, VSRCBits, 128, 64, sizeof(VSRCBits), PPC_VSRCRegClassID, 16, 16, 1, 1 }, { QSRC, QSRCBits, 123, 32, sizeof(QSRCBits), PPC_QSRCRegClassID, 16, 16, 1, 1 }, { VRRC, VRRCBits, 118, 32, sizeof(VRRCBits), PPC_VRRCRegClassID, 16, 16, 1, 1 }, { VSHRC, VSHRCBits, 90, 32, sizeof(VSHRCBits), PPC_VSHRCRegClassID, 16, 16, 1, 1 }, { VSLRC, VSLRCBits, 96, 32, sizeof(VSLRCBits), PPC_VSLRCRegClassID, 16, 16, 1, 1 }, { QBRC, QBRCBits, 60, 32, sizeof(QBRCBits), PPC_QBRCRegClassID, 32, 32, 1, 1 }, { QFRC, QFRCBits, 74, 32, sizeof(QFRCBits), PPC_QFRCRegClassID, 32, 32, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc010066400017500001750000000056221363402546700227770ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Subtarget Enumeration Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM #define PPC_DeprecatedDST (1ULL << 0) #define PPC_DeprecatedMFTB (1ULL << 1) #define PPC_Directive32 (1ULL << 2) #define PPC_Directive64 (1ULL << 3) #define PPC_Directive440 (1ULL << 4) #define PPC_Directive601 (1ULL << 5) #define PPC_Directive602 (1ULL << 6) #define PPC_Directive603 (1ULL << 7) #define PPC_Directive604 (1ULL << 8) #define PPC_Directive620 (1ULL << 9) #define PPC_Directive750 (1ULL << 10) #define PPC_Directive970 (1ULL << 11) #define PPC_Directive7400 (1ULL << 12) #define PPC_DirectiveA2 (1ULL << 13) #define PPC_DirectiveE500mc (1ULL << 14) #define PPC_DirectiveE5500 (1ULL << 15) #define PPC_DirectivePwr3 (1ULL << 16) #define PPC_DirectivePwr4 (1ULL << 17) #define PPC_DirectivePwr5 (1ULL << 18) #define PPC_DirectivePwr5x (1ULL << 19) #define PPC_DirectivePwr6 (1ULL << 20) #define PPC_DirectivePwr6x (1ULL << 21) #define PPC_DirectivePwr7 (1ULL << 22) #define PPC_DirectivePwr8 (1ULL << 23) #define PPC_Feature64Bit (1ULL << 24) #define PPC_Feature64BitRegs (1ULL << 25) #define PPC_FeatureAltivec (1ULL << 26) #define PPC_FeatureBookE (1ULL << 27) #define PPC_FeatureCMPB (1ULL << 28) #define PPC_FeatureCRBits (1ULL << 29) #define PPC_FeatureE500 (1ULL << 30) #define PPC_FeatureFCPSGN (1ULL << 31) #define PPC_FeatureFPCVT (1ULL << 32) #define PPC_FeatureFPRND (1ULL << 33) #define PPC_FeatureFRE (1ULL << 34) #define PPC_FeatureFRES (1ULL << 35) #define PPC_FeatureFRSQRTE (1ULL << 36) #define PPC_FeatureFRSQRTES (1ULL << 37) #define PPC_FeatureFSqrt (1ULL << 38) #define PPC_FeatureICBT (1ULL << 39) #define PPC_FeatureISEL (1ULL << 40) #define PPC_FeatureInvariantFunctionDescriptors (1ULL << 41) #define PPC_FeatureLDBRX (1ULL << 42) #define PPC_FeatureLFIWAX (1ULL << 43) #define PPC_FeatureMFOCRF (1ULL << 44) #define PPC_FeatureMSYNC (1ULL << 45) #define PPC_FeatureP8Altivec (1ULL << 46) #define PPC_FeatureP8Vector (1ULL << 47) #define PPC_FeaturePOPCNTD (1ULL << 48) #define PPC_FeaturePPC4xx (1ULL << 49) #define PPC_FeaturePPC6xx (1ULL << 50) #define PPC_FeatureQPX (1ULL << 51) #define PPC_FeatureRecipPrec (1ULL << 52) #define PPC_FeatureSPE (1ULL << 53) #define PPC_FeatureSTFIWX (1ULL << 54) #define PPC_FeatureVSX (1ULL << 55) #endif // GET_SUBTARGETINFO_ENUM capstone-sys-0.11.0/capstone/arch/PowerPC/PPCInstPrinter.c010066400017500001750000000672041363403403300215140ustar0000000000000000//===-- PPCInstPrinter.cpp - Convert PPC MCInst to assembly syntax --------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an PPC MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_POWERPC #include #include #include #include "PPCInstPrinter.h" #include "PPCPredicates.h" #include "../../MCInst.h" #include "../../utils.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../MathExtras.h" #include "PPCMapping.h" #ifndef CAPSTONE_DIET static const char *getRegisterName(unsigned RegNo); #endif static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI); static void printAbsBranchOperand(MCInst *MI, unsigned OpNo, SStream *O); static char *printAliasInstr(MCInst *MI, SStream *OS, void *info); static char *printAliasInstrEx(MCInst *MI, SStream *OS, void *info); static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS); #if 0 static void printRegName(SStream *OS, unsigned RegNo) { char *RegName = getRegisterName(RegNo); if (RegName[0] == 'q' /* QPX */) { // The system toolchain on the BG/Q does not understand QPX register names // in .cfi_* directives, so print the name of the floating-point // subregister instead. RegName[0] = 'f'; } SStream_concat0(OS, RegName); } #endif static void set_mem_access(MCInst *MI, bool status) { if (MI->csh->detail != CS_OPT_ON) return; MI->csh->doing_mem = status; if (status) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_MEM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.base = PPC_REG_INVALID; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.disp = 0; } else { // done, create the next operand slot MI->flat_insn->detail->ppc.op_count++; } } void PPC_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) { if (((cs_struct *)ud)->detail != CS_OPT_ON) return; // check if this insn has branch hint if (strrchr(insn_asm, '+') != NULL && !strstr(insn_asm, ".+")) { insn->detail->ppc.bh = PPC_BH_PLUS; } else if (strrchr(insn_asm, '-') != NULL) { insn->detail->ppc.bh = PPC_BH_MINUS; } } #define GET_INSTRINFO_ENUM #include "PPCGenInstrInfo.inc" static int isBOCTRBranch(unsigned int op) { return ((op >= PPC_BDNZ) && (op <= PPC_BDZp)); } void PPC_printInst(MCInst *MI, SStream *O, void *Info) { char *mnem; // Check for slwi/srwi mnemonics. if (MCInst_getOpcode(MI) == PPC_RLWINM) { unsigned char SH = (unsigned char)MCOperand_getImm(MCInst_getOperand(MI, 2)); unsigned char MB = (unsigned char)MCOperand_getImm(MCInst_getOperand(MI, 3)); unsigned char ME = (unsigned char)MCOperand_getImm(MCInst_getOperand(MI, 4)); bool useSubstituteMnemonic = false; if (SH <= 31 && MB == 0 && ME == (31-SH)) { SStream_concat0(O, "slwi\t"); MCInst_setOpcodePub(MI, PPC_INS_SLWI); useSubstituteMnemonic = true; } if (SH <= 31 && MB == (32-SH) && ME == 31) { SStream_concat0(O, "srwi\t"); MCInst_setOpcodePub(MI, PPC_INS_SRWI); useSubstituteMnemonic = true; SH = 32-SH; } if (useSubstituteMnemonic) { printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); if (SH > HEX_THRESHOLD) SStream_concat(O, ", 0x%x", (unsigned int)SH); else SStream_concat(O, ", %u", (unsigned int)SH); if (MI->csh->detail) { cs_ppc *ppc = &MI->flat_insn->detail->ppc; ppc->operands[ppc->op_count].type = PPC_OP_IMM; ppc->operands[ppc->op_count].imm = SH; ++ppc->op_count; } return; } } if ((MCInst_getOpcode(MI) == PPC_OR || MCInst_getOpcode(MI) == PPC_OR8) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 2))) { SStream_concat0(O, "mr\t"); MCInst_setOpcodePub(MI, PPC_INS_MR); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; } if (MCInst_getOpcode(MI) == PPC_RLDICR) { unsigned char SH = (unsigned char)MCOperand_getImm(MCInst_getOperand(MI, 2)); unsigned char ME = (unsigned char)MCOperand_getImm(MCInst_getOperand(MI, 3)); // rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH if (63-SH == ME) { SStream_concat0(O, "sldi\t"); MCInst_setOpcodePub(MI, PPC_INS_SLDI); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); if (SH > HEX_THRESHOLD) SStream_concat(O, ", 0x%x", (unsigned int)SH); else SStream_concat(O, ", %u", (unsigned int)SH); return; } } if ((MCInst_getOpcode(MI) == PPC_gBC)||(MCInst_getOpcode(MI) == PPC_gBCA)|| (MCInst_getOpcode(MI) == PPC_gBCL)||(MCInst_getOpcode(MI) == PPC_gBCLA)) { int64_t bd = MCOperand_getImm(MCInst_getOperand(MI, 2)); bd = SignExtend64(bd, 14); MCOperand_setImm(MCInst_getOperand(MI, 2),bd); } if (isBOCTRBranch(MCInst_getOpcode(MI))) { if (MCOperand_isImm(MCInst_getOperand(MI,0))) { int64_t bd = MCOperand_getImm(MCInst_getOperand(MI, 0)); bd = SignExtend64(bd, 14); MCOperand_setImm(MCInst_getOperand(MI, 0), bd); } } if ((MCInst_getOpcode(MI) == PPC_B)||(MCInst_getOpcode(MI) == PPC_BA)|| (MCInst_getOpcode(MI) == PPC_BL)||(MCInst_getOpcode(MI) == PPC_BLA)) { int64_t bd = MCOperand_getImm(MCInst_getOperand(MI, 0)); bd = SignExtend64(bd, 24); MCOperand_setImm(MCInst_getOperand(MI, 0),bd); } // consider our own alias instructions first mnem = printAliasInstrEx(MI, O, Info); if (!mnem) mnem = printAliasInstr(MI, O, Info); if (mnem != NULL) { if (strlen(mnem) > 0) { // check to remove the last letter of ('.', '-', '+') if (mnem[strlen(mnem) - 1] == '-' || mnem[strlen(mnem) - 1] == '+' || mnem[strlen(mnem) - 1] == '.') mnem[strlen(mnem) - 1] = '\0'; MCInst_setOpcodePub(MI, PPC_map_insn(mnem)); if (MI->csh->detail) { struct ppc_alias alias; if (PPC_alias_insn(mnem, &alias)) { MI->flat_insn->detail->ppc.bc = (ppc_bc)alias.cc; } } } cs_mem_free(mnem); } else printInstruction(MI, O, NULL); } enum ppc_bc_hint { PPC_BC_LT_MINUS = (0 << 5) | 14, PPC_BC_LE_MINUS = (1 << 5) | 6, PPC_BC_EQ_MINUS = (2 << 5) | 14, PPC_BC_GE_MINUS = (0 << 5) | 6, PPC_BC_GT_MINUS = (1 << 5) | 14, PPC_BC_NE_MINUS = (2 << 5) | 6, PPC_BC_UN_MINUS = (3 << 5) | 14, PPC_BC_NU_MINUS = (3 << 5) | 6, PPC_BC_LT_PLUS = (0 << 5) | 15, PPC_BC_LE_PLUS = (1 << 5) | 7, PPC_BC_EQ_PLUS = (2 << 5) | 15, PPC_BC_GE_PLUS = (0 << 5) | 7, PPC_BC_GT_PLUS = (1 << 5) | 15, PPC_BC_NE_PLUS = (2 << 5) | 7, PPC_BC_UN_PLUS = (3 << 5) | 15, PPC_BC_NU_PLUS = (3 << 5) | 7, }; // normalize CC to remove _MINUS & _PLUS static int cc_normalize(int cc) { switch(cc) { default: return cc; case PPC_BC_LT_MINUS: return PPC_BC_LT; case PPC_BC_LE_MINUS: return PPC_BC_LE; case PPC_BC_EQ_MINUS: return PPC_BC_EQ; case PPC_BC_GE_MINUS: return PPC_BC_GE; case PPC_BC_GT_MINUS: return PPC_BC_GT; case PPC_BC_NE_MINUS: return PPC_BC_NE; case PPC_BC_UN_MINUS: return PPC_BC_UN; case PPC_BC_NU_MINUS: return PPC_BC_NU; case PPC_BC_LT_PLUS : return PPC_BC_LT; case PPC_BC_LE_PLUS : return PPC_BC_LE; case PPC_BC_EQ_PLUS : return PPC_BC_EQ; case PPC_BC_GE_PLUS : return PPC_BC_GE; case PPC_BC_GT_PLUS : return PPC_BC_GT; case PPC_BC_NE_PLUS : return PPC_BC_NE; case PPC_BC_UN_PLUS : return PPC_BC_UN; case PPC_BC_NU_PLUS : return PPC_BC_NU; } } static void printPredicateOperand(MCInst *MI, unsigned OpNo, SStream *O, const char *Modifier) { unsigned Code = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); MI->flat_insn->detail->ppc.bc = (ppc_bc)cc_normalize(Code); if (!strcmp(Modifier, "cc")) { switch ((ppc_predicate)Code) { default: // unreachable case PPC_PRED_LT_MINUS: case PPC_PRED_LT_PLUS: case PPC_PRED_LT: SStream_concat0(O, "lt"); return; case PPC_PRED_LE_MINUS: case PPC_PRED_LE_PLUS: case PPC_PRED_LE: SStream_concat0(O, "le"); return; case PPC_PRED_EQ_MINUS: case PPC_PRED_EQ_PLUS: case PPC_PRED_EQ: SStream_concat0(O, "eq"); return; case PPC_PRED_GE_MINUS: case PPC_PRED_GE_PLUS: case PPC_PRED_GE: SStream_concat0(O, "ge"); return; case PPC_PRED_GT_MINUS: case PPC_PRED_GT_PLUS: case PPC_PRED_GT: SStream_concat0(O, "gt"); return; case PPC_PRED_NE_MINUS: case PPC_PRED_NE_PLUS: case PPC_PRED_NE: SStream_concat0(O, "ne"); return; case PPC_PRED_UN_MINUS: case PPC_PRED_UN_PLUS: case PPC_PRED_UN: SStream_concat0(O, "un"); return; case PPC_PRED_NU_MINUS: case PPC_PRED_NU_PLUS: case PPC_PRED_NU: SStream_concat0(O, "nu"); return; case PPC_PRED_BIT_SET: case PPC_PRED_BIT_UNSET: // llvm_unreachable("Invalid use of bit predicate code"); SStream_concat0(O, "invalid-predicate"); return; } } if (!strcmp(Modifier, "pm")) { switch ((ppc_predicate)Code) { case PPC_PRED_LT: case PPC_PRED_LE: case PPC_PRED_EQ: case PPC_PRED_GE: case PPC_PRED_GT: case PPC_PRED_NE: case PPC_PRED_UN: case PPC_PRED_NU: return; case PPC_PRED_LT_MINUS: case PPC_PRED_LE_MINUS: case PPC_PRED_EQ_MINUS: case PPC_PRED_GE_MINUS: case PPC_PRED_GT_MINUS: case PPC_PRED_NE_MINUS: case PPC_PRED_UN_MINUS: case PPC_PRED_NU_MINUS: SStream_concat0(O, "-"); return; case PPC_PRED_LT_PLUS: case PPC_PRED_LE_PLUS: case PPC_PRED_EQ_PLUS: case PPC_PRED_GE_PLUS: case PPC_PRED_GT_PLUS: case PPC_PRED_NE_PLUS: case PPC_PRED_UN_PLUS: case PPC_PRED_NU_PLUS: SStream_concat0(O, "+"); return; case PPC_PRED_BIT_SET: case PPC_PRED_BIT_UNSET: // llvm_unreachable("Invalid use of bit predicate code"); SStream_concat0(O, "invalid-predicate"); return; default: // unreachable return; } // llvm_unreachable("Invalid predicate code"); } //assert(StringRef(Modifier) == "reg" && // "Need to specify 'cc', 'pm' or 'reg' as predicate op modifier!"); printOperand(MI, OpNo + 1, O); } static void printU2ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { unsigned int Value = (int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); //assert(Value <= 3 && "Invalid u2imm argument!"); if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Value; MI->flat_insn->detail->ppc.op_count++; } } static void printU4ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { unsigned int Value = (int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); //assert(Value <= 15 && "Invalid u4imm argument!"); if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Value; MI->flat_insn->detail->ppc.op_count++; } } static void printS5ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { int Value = (int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); Value = SignExtend32(Value, 5); printInt32(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Value; MI->flat_insn->detail->ppc.op_count++; } } static void printU5ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { unsigned int Value = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); //assert(Value <= 31 && "Invalid u5imm argument!"); printUInt32(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Value; MI->flat_insn->detail->ppc.op_count++; } } static void printU6ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { unsigned int Value = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); //assert(Value <= 63 && "Invalid u6imm argument!"); printUInt32(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Value; MI->flat_insn->detail->ppc.op_count++; } } static void printU12ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { unsigned short Value = (unsigned short)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); // assert(Value <= 4095 && "Invalid u12imm argument!"); if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Value; MI->flat_insn->detail->ppc.op_count++; } } static void printS16ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { if (MCOperand_isImm(MCInst_getOperand(MI, OpNo))) { unsigned short Imm = (unsigned short)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); if (Imm > HEX_THRESHOLD) SStream_concat(O, "0x%x", Imm); else SStream_concat(O, "%u", Imm); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Imm; MI->flat_insn->detail->ppc.op_count++; } } else printOperand(MI, OpNo, O); } static void printS16ImmOperand_Mem(MCInst *MI, unsigned OpNo, SStream *O) { if (MCOperand_isImm(MCInst_getOperand(MI, OpNo))) { short Imm = (short)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); if (Imm >= 0) { if (Imm > HEX_THRESHOLD) SStream_concat(O, "0x%x", Imm); else SStream_concat(O, "%u", Imm); } else { if (Imm < -HEX_THRESHOLD) SStream_concat(O, "-0x%x", -Imm); else SStream_concat(O, "-%u", -Imm); } if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.disp = Imm; } else { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Imm; MI->flat_insn->detail->ppc.op_count++; } } } else printOperand(MI, OpNo, O); } static void printU16ImmOperand(MCInst *MI, unsigned OpNo, SStream *O) { if (MCOperand_isImm(MCInst_getOperand(MI, OpNo))) { unsigned short Imm = (unsigned short)MCOperand_getImm(MCInst_getOperand(MI, OpNo)); if (Imm > HEX_THRESHOLD) SStream_concat(O, "0x%x", Imm); else SStream_concat(O, "%u", Imm); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = Imm; MI->flat_insn->detail->ppc.op_count++; } } else printOperand(MI, OpNo, O); } static void printBranchOperand(MCInst *MI, unsigned OpNo, SStream *O) { if (!MCOperand_isImm(MCInst_getOperand(MI, OpNo))) { printOperand(MI, OpNo, O); return; } // Branches can take an immediate operand. This is used by the branch // selection pass to print .+8, an eight byte displacement from the PC. printAbsBranchOperand(MI, OpNo, O); } static void printAbsBranchOperand(MCInst *MI, unsigned OpNo, SStream *O) { int64_t imm; if (!MCOperand_isImm(MCInst_getOperand(MI, OpNo))) { printOperand(MI, OpNo, O); return; } imm = MCOperand_getImm(MCInst_getOperand(MI, OpNo)) * 4; if (!PPC_abs_branch(MI->csh, MCInst_getOpcode(MI))) { imm = MI->address + imm; } SStream_concat(O, "0x%"PRIx64, imm); if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = imm; MI->flat_insn->detail->ppc.op_count++; } } #define GET_REGINFO_ENUM #include "PPCGenRegisterInfo.inc" static void printcrbitm(MCInst *MI, unsigned OpNo, SStream *O) { unsigned RegNo, tmp; unsigned CCReg = MCOperand_getReg(MCInst_getOperand(MI, OpNo)); switch (CCReg) { default: // llvm_unreachable("Unknown CR register"); case PPC_CR0: RegNo = 0; break; case PPC_CR1: RegNo = 1; break; case PPC_CR2: RegNo = 2; break; case PPC_CR3: RegNo = 3; break; case PPC_CR4: RegNo = 4; break; case PPC_CR5: RegNo = 5; break; case PPC_CR6: RegNo = 6; break; case PPC_CR7: RegNo = 7; break; } tmp = 0x80 >> RegNo; if (tmp > HEX_THRESHOLD) SStream_concat(O, "0x%x", tmp); else SStream_concat(O, "%u", tmp); } static void printMemRegImm(MCInst *MI, unsigned OpNo, SStream *O) { set_mem_access(MI, true); printS16ImmOperand_Mem(MI, OpNo, O); SStream_concat0(O, "("); if (MCOperand_getReg(MCInst_getOperand(MI, OpNo + 1)) == PPC_R0) SStream_concat0(O, "0"); else printOperand(MI, OpNo + 1, O); SStream_concat0(O, ")"); set_mem_access(MI, false); } static void printMemRegReg(MCInst *MI, unsigned OpNo, SStream *O) { // When used as the base register, r0 reads constant zero rather than // the value contained in the register. For this reason, the darwin // assembler requires that we print r0 as 0 (no r) when used as the base. if (MCOperand_getReg(MCInst_getOperand(MI, OpNo)) == PPC_R0) SStream_concat0(O, "0"); else printOperand(MI, OpNo, O); SStream_concat0(O, ", "); printOperand(MI, OpNo + 1, O); } static void printTLSCall(MCInst *MI, unsigned OpNo, SStream *O) { set_mem_access(MI, true); //printBranchOperand(MI, OpNo, O); // On PPC64, VariantKind is VK_None, but on PPC32, it's VK_PLT, and it must // come at the _end_ of the expression. SStream_concat0(O, "("); printOperand(MI, OpNo + 1, O); SStream_concat0(O, ")"); set_mem_access(MI, false); } #ifndef CAPSTONE_DIET /// stripRegisterPrefix - This method strips the character prefix from a /// register name so that only the number is left. Used by for linux asm. static const char *stripRegisterPrefix(const char *RegName) { switch (RegName[0]) { case 'r': case 'f': case 'q': // for QPX case 'v': if (RegName[1] == 's') return RegName + 2; return RegName + 1; case 'c': if (RegName[1] == 'r') return RegName + 2; } return RegName; } #endif static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned reg = MCOperand_getReg(Op); #ifndef CAPSTONE_DIET const char *RegName = getRegisterName(reg); #endif // map to public register reg = PPC_map_register(reg); #ifndef CAPSTONE_DIET // The linux and AIX assembler does not take register prefixes. if (MI->csh->syntax == CS_OPT_SYNTAX_NOREGNAME) RegName = stripRegisterPrefix(RegName); SStream_concat0(O, RegName); #endif if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.base = reg; } else { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_REG; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].reg = reg; MI->flat_insn->detail->ppc.op_count++; } } return; } if (MCOperand_isImm(Op)) { int32_t imm = (int32_t)MCOperand_getImm(Op); printInt32(O, imm); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.disp = (int32_t)imm; } else { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = imm; MI->flat_insn->detail->ppc.op_count++; } } } } static void op_addImm(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_IMM; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].imm = v; MI->flat_insn->detail->ppc.op_count++; } } static void op_addReg(MCInst *MI, unsigned int reg) { if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_REG; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].reg = reg; MI->flat_insn->detail->ppc.op_count++; } } static void op_addBC(MCInst *MI, unsigned int bc) { if (MI->csh->detail) { MI->flat_insn->detail->ppc.bc = (ppc_bc)bc; } } #define CREQ (0) #define CRGT (1) #define CRLT (2) #define CRUN (3) static int getBICRCond(int bi) { return (bi-PPC_CR0EQ) >> 3; } static int getBICR(int bi) { return ((bi - PPC_CR0EQ) & 7) + PPC_CR0; } static char *printAliasInstrEx(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) SStream ss; const char *opCode; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; int decCtr = false, needComma = false; MCRegisterInfo *MRI = (MCRegisterInfo *)info; SStream_Init(&ss); switch (MCInst_getOpcode(MI)) { default: return NULL; case PPC_gBC: opCode = "b%s"; break; case PPC_gBCA: opCode = "b%sa"; break; case PPC_gBCCTR: opCode = "b%sctr"; break; case PPC_gBCCTRL: opCode = "b%sctrl"; break; case PPC_gBCL: opCode = "b%sl"; break; case PPC_gBCLA: opCode = "b%sla"; break; case PPC_gBCLR: opCode = "b%slr"; break; case PPC_gBCLRL: opCode = "b%slrl"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) >= 0) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) <= 1)) { SStream_concat(&ss, opCode, "dnzf"); decCtr = true; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) >= 2) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) <= 3)) { SStream_concat(&ss, opCode, "dzf"); decCtr = true; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) >= 4) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) <= 7) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { int cr = getBICRCond(MCOperand_getReg(MCInst_getOperand(MI, 1))); switch(cr) { case CREQ: SStream_concat(&ss, opCode, "ne"); break; case CRGT: SStream_concat(&ss, opCode, "le"); break; case CRLT: SStream_concat(&ss, opCode, "ge"); break; case CRUN: SStream_concat(&ss, opCode, "ns"); break; } if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 6) SStream_concat0(&ss, "-"); if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 7) SStream_concat0(&ss, "+"); decCtr = false; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) >= 8) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) <= 9)) { SStream_concat(&ss, opCode, "dnzt"); decCtr = true; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) >= 10) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) <= 11)) { SStream_concat(&ss, opCode, "dzt"); decCtr = true; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) >= 12) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) <= 15) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { int cr = getBICRCond(MCOperand_getReg(MCInst_getOperand(MI, 1))); switch(cr) { case CREQ: SStream_concat(&ss, opCode, "eq"); break; case CRGT: SStream_concat(&ss, opCode, "gt"); break; case CRLT: SStream_concat(&ss, opCode, "lt"); break; case CRUN: SStream_concat(&ss, opCode, "so"); break; } if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14) SStream_concat0(&ss, "-"); if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) SStream_concat0(&ss, "+"); decCtr = false; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && ((MCOperand_getImm(MCInst_getOperand(MI, 0)) & 0x12)== 16)) { SStream_concat(&ss, opCode, "dnz"); if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24) SStream_concat0(&ss, "-"); if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 25) SStream_concat0(&ss, "+"); needComma = false; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && ((MCOperand_getImm(MCInst_getOperand(MI, 0)) & 0x12)== 18)) { SStream_concat(&ss, opCode, "dz"); if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 26) SStream_concat0(&ss, "-"); if (MCOperand_getImm(MCInst_getOperand(MI, 0)) == 27) SStream_concat0(&ss, "+"); needComma = false; } if (MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getImm(MCInst_getOperand(MI, 0)) < 16)) { int cr = getBICR(MCOperand_getReg(MCInst_getOperand(MI, 1))); if (decCtr) { needComma = true; SStream_concat0(&ss, " "); if (cr > PPC_CR0) { SStream_concat(&ss, "4*cr%d+", cr - PPC_CR0); } cr = getBICRCond(MCOperand_getReg(MCInst_getOperand(MI, 1))); switch(cr) { case CREQ: SStream_concat0(&ss, "eq"); op_addBC(MI, PPC_BC_EQ); break; case CRGT: SStream_concat0(&ss, "gt"); op_addBC(MI, PPC_BC_GT); break; case CRLT: SStream_concat0(&ss, "lt"); op_addBC(MI, PPC_BC_LT); break; case CRUN: SStream_concat0(&ss, "so"); op_addBC(MI, PPC_BC_SO); break; } cr = getBICR(MCOperand_getReg(MCInst_getOperand(MI, 1))); if (cr > PPC_CR0) { if (MI->csh->detail) { MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_CRX; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].crx.scale = 4; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].crx.reg = PPC_REG_CR0 + cr - PPC_CR0; MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].crx.cond = MI->flat_insn->detail->ppc.bc; MI->flat_insn->detail->ppc.op_count++; } } } else { if (cr > PPC_CR0) { needComma = true; SStream_concat(&ss, " cr%d", cr - PPC_CR0); op_addReg(MI, PPC_REG_CR0 + cr - PPC_CR0); } } } if (MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) != 0) { if (needComma) SStream_concat0(&ss, ","); SStream_concat0(&ss, " $\xFF\x03\x01"); } tmp = cs_strdup(ss.buffer); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #define PRINT_ALIAS_INSTR #include "PPCGenAsmWriter.inc" #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCInstPrinter.h010066400017500001750000000005701363402546700215250ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_PPCINSTPRINTER_H #define CS_PPCINSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void PPC_printInst(MCInst *MI, SStream *O, void *Info); void PPC_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCMapping.c010066400017500001750000001464751363403403300206360ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_POWERPC #include // debug #include #include "../../utils.h" #include "PPCMapping.h" #define GET_INSTRINFO_ENUM #include "PPCGenInstrInfo.inc" #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { PPC_REG_INVALID, NULL }, { PPC_REG_CARRY, "ca" }, { PPC_REG_CR0, "cr0" }, { PPC_REG_CR1, "cr1" }, { PPC_REG_CR2, "cr2" }, { PPC_REG_CR3, "cr3" }, { PPC_REG_CR4, "cr4" }, { PPC_REG_CR5, "cr5" }, { PPC_REG_CR6, "cr6" }, { PPC_REG_CR7, "cr7" }, { PPC_REG_CTR, "ctr" }, { PPC_REG_F0, "f0" }, { PPC_REG_F1, "f1" }, { PPC_REG_F2, "f2" }, { PPC_REG_F3, "f3" }, { PPC_REG_F4, "f4" }, { PPC_REG_F5, "f5" }, { PPC_REG_F6, "f6" }, { PPC_REG_F7, "f7" }, { PPC_REG_F8, "f8" }, { PPC_REG_F9, "f9" }, { PPC_REG_F10, "f10" }, { PPC_REG_F11, "f11" }, { PPC_REG_F12, "f12" }, { PPC_REG_F13, "f13" }, { PPC_REG_F14, "f14" }, { PPC_REG_F15, "f15" }, { PPC_REG_F16, "f16" }, { PPC_REG_F17, "f17" }, { PPC_REG_F18, "f18" }, { PPC_REG_F19, "f19" }, { PPC_REG_F20, "f20" }, { PPC_REG_F21, "f21" }, { PPC_REG_F22, "f22" }, { PPC_REG_F23, "f23" }, { PPC_REG_F24, "f24" }, { PPC_REG_F25, "f25" }, { PPC_REG_F26, "f26" }, { PPC_REG_F27, "f27" }, { PPC_REG_F28, "f28" }, { PPC_REG_F29, "f29" }, { PPC_REG_F30, "f30" }, { PPC_REG_F31, "f31" }, { PPC_REG_LR, "lr" }, { PPC_REG_R0, "r0" }, { PPC_REG_R1, "r1" }, { PPC_REG_R2, "r2" }, { PPC_REG_R3, "r3" }, { PPC_REG_R4, "r4" }, { PPC_REG_R5, "r5" }, { PPC_REG_R6, "r6" }, { PPC_REG_R7, "r7" }, { PPC_REG_R8, "r8" }, { PPC_REG_R9, "r9" }, { PPC_REG_R10, "r10" }, { PPC_REG_R11, "r11" }, { PPC_REG_R12, "r12" }, { PPC_REG_R13, "r13" }, { PPC_REG_R14, "r14" }, { PPC_REG_R15, "r15" }, { PPC_REG_R16, "r16" }, { PPC_REG_R17, "r17" }, { PPC_REG_R18, "r18" }, { PPC_REG_R19, "r19" }, { PPC_REG_R20, "r20" }, { PPC_REG_R21, "r21" }, { PPC_REG_R22, "r22" }, { PPC_REG_R23, "r23" }, { PPC_REG_R24, "r24" }, { PPC_REG_R25, "r25" }, { PPC_REG_R26, "r26" }, { PPC_REG_R27, "r27" }, { PPC_REG_R28, "r28" }, { PPC_REG_R29, "r29" }, { PPC_REG_R30, "r30" }, { PPC_REG_R31, "r31" }, { PPC_REG_V0, "v0" }, { PPC_REG_V1, "v1" }, { PPC_REG_V2, "v2" }, { PPC_REG_V3, "v3" }, { PPC_REG_V4, "v4" }, { PPC_REG_V5, "v5" }, { PPC_REG_V6, "v6" }, { PPC_REG_V7, "v7" }, { PPC_REG_V8, "v8" }, { PPC_REG_V9, "v9" }, { PPC_REG_V10, "v10" }, { PPC_REG_V11, "v11" }, { PPC_REG_V12, "v12" }, { PPC_REG_V13, "v13" }, { PPC_REG_V14, "v14" }, { PPC_REG_V15, "v15" }, { PPC_REG_V16, "v16" }, { PPC_REG_V17, "v17" }, { PPC_REG_V18, "v18" }, { PPC_REG_V19, "v19" }, { PPC_REG_V20, "v20" }, { PPC_REG_V21, "v21" }, { PPC_REG_V22, "v22" }, { PPC_REG_V23, "v23" }, { PPC_REG_V24, "v24" }, { PPC_REG_V25, "v25" }, { PPC_REG_V26, "v26" }, { PPC_REG_V27, "v27" }, { PPC_REG_V28, "v28" }, { PPC_REG_V29, "v29" }, { PPC_REG_V30, "v30" }, { PPC_REG_V31, "v31" }, { PPC_REG_VRSAVE, "vrsave" }, { PPC_REG_VS0, "vs0"}, { PPC_REG_VS1, "vs1"}, { PPC_REG_VS2, "vs2"}, { PPC_REG_VS3, "vs3"}, { PPC_REG_VS4, "vs4"}, { PPC_REG_VS5, "vs5"}, { PPC_REG_VS6, "vs6"}, { PPC_REG_VS7, "vs7"}, { PPC_REG_VS8, "vs8"}, { PPC_REG_VS9, "vs9"}, { PPC_REG_VS10, "vs10"}, { PPC_REG_VS11, "vs11"}, { PPC_REG_VS12, "vs12"}, { PPC_REG_VS13, "vs13"}, { PPC_REG_VS14, "vs14"}, { PPC_REG_VS15, "vs15"}, { PPC_REG_VS16, "vs16"}, { PPC_REG_VS17, "vs17"}, { PPC_REG_VS18, "vs18"}, { PPC_REG_VS19, "vs19"}, { PPC_REG_VS20, "vs20"}, { PPC_REG_VS21, "vs21"}, { PPC_REG_VS22, "vs22"}, { PPC_REG_VS23, "vs23"}, { PPC_REG_VS24, "vs24"}, { PPC_REG_VS25, "vs25"}, { PPC_REG_VS26, "vs26"}, { PPC_REG_VS27, "vs27"}, { PPC_REG_VS28, "vs28"}, { PPC_REG_VS29, "vs29"}, { PPC_REG_VS30, "vs30"}, { PPC_REG_VS31, "vs31"}, { PPC_REG_VS32, "vs32"}, { PPC_REG_VS33, "vs33"}, { PPC_REG_VS34, "vs34"}, { PPC_REG_VS35, "vs35"}, { PPC_REG_VS36, "vs36"}, { PPC_REG_VS37, "vs37"}, { PPC_REG_VS38, "vs38"}, { PPC_REG_VS39, "vs39"}, { PPC_REG_VS40, "vs40"}, { PPC_REG_VS41, "vs41"}, { PPC_REG_VS42, "vs42"}, { PPC_REG_VS43, "vs43"}, { PPC_REG_VS44, "vs44"}, { PPC_REG_VS45, "vs45"}, { PPC_REG_VS46, "vs46"}, { PPC_REG_VS47, "vs47"}, { PPC_REG_VS48, "vs48"}, { PPC_REG_VS49, "vs49"}, { PPC_REG_VS50, "vs50"}, { PPC_REG_VS51, "vs51"}, { PPC_REG_VS52, "vs52"}, { PPC_REG_VS53, "vs53"}, { PPC_REG_VS54, "vs54"}, { PPC_REG_VS55, "vs55"}, { PPC_REG_VS56, "vs56"}, { PPC_REG_VS57, "vs57"}, { PPC_REG_VS58, "vs58"}, { PPC_REG_VS59, "vs59"}, { PPC_REG_VS60, "vs60"}, { PPC_REG_VS61, "vs61"}, { PPC_REG_VS62, "vs62"}, { PPC_REG_VS63, "vs63"}, { PPC_REG_Q0, "q0" }, { PPC_REG_Q1, "q1" }, { PPC_REG_Q2, "q2" }, { PPC_REG_Q3, "q3" }, { PPC_REG_Q4, "q4" }, { PPC_REG_Q5, "q5" }, { PPC_REG_Q6, "q6" }, { PPC_REG_Q7, "q7" }, { PPC_REG_Q8, "q8" }, { PPC_REG_Q9, "q9" }, { PPC_REG_Q10, "q10" }, { PPC_REG_Q11, "q11" }, { PPC_REG_Q12, "q12" }, { PPC_REG_Q13, "q13" }, { PPC_REG_Q14, "q14" }, { PPC_REG_Q15, "q15" }, { PPC_REG_Q16, "q16" }, { PPC_REG_Q17, "q17" }, { PPC_REG_Q18, "q18" }, { PPC_REG_Q19, "q19" }, { PPC_REG_Q20, "q20" }, { PPC_REG_Q21, "q21" }, { PPC_REG_Q22, "q22" }, { PPC_REG_Q23, "q23" }, { PPC_REG_Q24, "q24" }, { PPC_REG_Q25, "q25" }, { PPC_REG_Q26, "q26" }, { PPC_REG_Q27, "q27" }, { PPC_REG_Q28, "q28" }, { PPC_REG_Q29, "q29" }, { PPC_REG_Q30, "q30" }, { PPC_REG_Q31, "q31" }, // extras { PPC_REG_RM, "rm" }, { PPC_REG_CTR8, "ctr8" }, { PPC_REG_LR8, "lr8" }, { PPC_REG_CR1EQ, "cr1eq" }, { PPC_REG_X2, "x2" }, }; #endif const char *PPC_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } static const insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "PPCMappingInsn.inc" }; // given internal insn id, return public instruction info void PPC_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { int i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET cs_struct handle; handle.detail = h->detail; memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = PPC_GRP_JUMP; insn->detail->groups_count++; } insn->detail->ppc.update_cr0 = cs_reg_write((csh)&handle, insn, PPC_REG_CR0); #endif } } } #ifndef CAPSTONE_DIET static const name_map insn_name_maps[] = { { PPC_INS_INVALID, NULL }, { PPC_INS_ADD, "add" }, { PPC_INS_ADDC, "addc" }, { PPC_INS_ADDE, "adde" }, { PPC_INS_ADDI, "addi" }, { PPC_INS_ADDIC, "addic" }, { PPC_INS_ADDIS, "addis" }, { PPC_INS_ADDME, "addme" }, { PPC_INS_ADDZE, "addze" }, { PPC_INS_AND, "and" }, { PPC_INS_ANDC, "andc" }, { PPC_INS_ANDIS, "andis" }, { PPC_INS_ANDI, "andi" }, { PPC_INS_ATTN, "attn" }, { PPC_INS_B, "b" }, { PPC_INS_BA, "ba" }, { PPC_INS_BC, "bc" }, { PPC_INS_BCCTR, "bcctr" }, { PPC_INS_BCCTRL, "bcctrl" }, { PPC_INS_BCL, "bcl" }, { PPC_INS_BCLR, "bclr" }, { PPC_INS_BCLRL, "bclrl" }, { PPC_INS_BCTR, "bctr" }, { PPC_INS_BCTRL, "bctrl" }, { PPC_INS_BCT, "bct" }, { PPC_INS_BDNZ, "bdnz" }, { PPC_INS_BDNZA, "bdnza" }, { PPC_INS_BDNZL, "bdnzl" }, { PPC_INS_BDNZLA, "bdnzla" }, { PPC_INS_BDNZLR, "bdnzlr" }, { PPC_INS_BDNZLRL, "bdnzlrl" }, { PPC_INS_BDZ, "bdz" }, { PPC_INS_BDZA, "bdza" }, { PPC_INS_BDZL, "bdzl" }, { PPC_INS_BDZLA, "bdzla" }, { PPC_INS_BDZLR, "bdzlr" }, { PPC_INS_BDZLRL, "bdzlrl" }, { PPC_INS_BL, "bl" }, { PPC_INS_BLA, "bla" }, { PPC_INS_BLR, "blr" }, { PPC_INS_BLRL, "blrl" }, { PPC_INS_BRINC, "brinc" }, { PPC_INS_CMPB, "cmpb" }, { PPC_INS_CMPD, "cmpd" }, { PPC_INS_CMPDI, "cmpdi" }, { PPC_INS_CMPLD, "cmpld" }, { PPC_INS_CMPLDI, "cmpldi" }, { PPC_INS_CMPLW, "cmplw" }, { PPC_INS_CMPLWI, "cmplwi" }, { PPC_INS_CMPW, "cmpw" }, { PPC_INS_CMPWI, "cmpwi" }, { PPC_INS_CNTLZD, "cntlzd" }, { PPC_INS_CNTLZW, "cntlzw" }, { PPC_INS_CREQV, "creqv" }, { PPC_INS_CRXOR, "crxor" }, { PPC_INS_CRAND, "crand" }, { PPC_INS_CRANDC, "crandc" }, { PPC_INS_CRNAND, "crnand" }, { PPC_INS_CRNOR, "crnor" }, { PPC_INS_CROR, "cror" }, { PPC_INS_CRORC, "crorc" }, { PPC_INS_DCBA, "dcba" }, { PPC_INS_DCBF, "dcbf" }, { PPC_INS_DCBI, "dcbi" }, { PPC_INS_DCBST, "dcbst" }, { PPC_INS_DCBT, "dcbt" }, { PPC_INS_DCBTST, "dcbtst" }, { PPC_INS_DCBZ, "dcbz" }, { PPC_INS_DCBZL, "dcbzl" }, { PPC_INS_DCCCI, "dccci" }, { PPC_INS_DIVD, "divd" }, { PPC_INS_DIVDU, "divdu" }, { PPC_INS_DIVW, "divw" }, { PPC_INS_DIVWU, "divwu" }, { PPC_INS_DSS, "dss" }, { PPC_INS_DSSALL, "dssall" }, { PPC_INS_DST, "dst" }, { PPC_INS_DSTST, "dstst" }, { PPC_INS_DSTSTT, "dststt" }, { PPC_INS_DSTT, "dstt" }, { PPC_INS_EQV, "eqv" }, { PPC_INS_EVABS, "evabs" }, { PPC_INS_EVADDIW, "evaddiw" }, { PPC_INS_EVADDSMIAAW, "evaddsmiaaw" }, { PPC_INS_EVADDSSIAAW, "evaddssiaaw" }, { PPC_INS_EVADDUMIAAW, "evaddumiaaw" }, { PPC_INS_EVADDUSIAAW, "evaddusiaaw" }, { PPC_INS_EVADDW, "evaddw" }, { PPC_INS_EVAND, "evand" }, { PPC_INS_EVANDC, "evandc" }, { PPC_INS_EVCMPEQ, "evcmpeq" }, { PPC_INS_EVCMPGTS, "evcmpgts" }, { PPC_INS_EVCMPGTU, "evcmpgtu" }, { PPC_INS_EVCMPLTS, "evcmplts" }, { PPC_INS_EVCMPLTU, "evcmpltu" }, { PPC_INS_EVCNTLSW, "evcntlsw" }, { PPC_INS_EVCNTLZW, "evcntlzw" }, { PPC_INS_EVDIVWS, "evdivws" }, { PPC_INS_EVDIVWU, "evdivwu" }, { PPC_INS_EVEQV, "eveqv" }, { PPC_INS_EVEXTSB, "evextsb" }, { PPC_INS_EVEXTSH, "evextsh" }, { PPC_INS_EVLDD, "evldd" }, { PPC_INS_EVLDDX, "evlddx" }, { PPC_INS_EVLDH, "evldh" }, { PPC_INS_EVLDHX, "evldhx" }, { PPC_INS_EVLDW, "evldw" }, { PPC_INS_EVLDWX, "evldwx" }, { PPC_INS_EVLHHESPLAT, "evlhhesplat" }, { PPC_INS_EVLHHESPLATX, "evlhhesplatx" }, { PPC_INS_EVLHHOSSPLAT, "evlhhossplat" }, { PPC_INS_EVLHHOSSPLATX, "evlhhossplatx" }, { PPC_INS_EVLHHOUSPLAT, "evlhhousplat" }, { PPC_INS_EVLHHOUSPLATX, "evlhhousplatx" }, { PPC_INS_EVLWHE, "evlwhe" }, { PPC_INS_EVLWHEX, "evlwhex" }, { PPC_INS_EVLWHOS, "evlwhos" }, { PPC_INS_EVLWHOSX, "evlwhosx" }, { PPC_INS_EVLWHOU, "evlwhou" }, { PPC_INS_EVLWHOUX, "evlwhoux" }, { PPC_INS_EVLWHSPLAT, "evlwhsplat" }, { PPC_INS_EVLWHSPLATX, "evlwhsplatx" }, { PPC_INS_EVLWWSPLAT, "evlwwsplat" }, { PPC_INS_EVLWWSPLATX, "evlwwsplatx" }, { PPC_INS_EVMERGEHI, "evmergehi" }, { PPC_INS_EVMERGEHILO, "evmergehilo" }, { PPC_INS_EVMERGELO, "evmergelo" }, { PPC_INS_EVMERGELOHI, "evmergelohi" }, { PPC_INS_EVMHEGSMFAA, "evmhegsmfaa" }, { PPC_INS_EVMHEGSMFAN, "evmhegsmfan" }, { PPC_INS_EVMHEGSMIAA, "evmhegsmiaa" }, { PPC_INS_EVMHEGSMIAN, "evmhegsmian" }, { PPC_INS_EVMHEGUMIAA, "evmhegumiaa" }, { PPC_INS_EVMHEGUMIAN, "evmhegumian" }, { PPC_INS_EVMHESMF, "evmhesmf" }, { PPC_INS_EVMHESMFA, "evmhesmfa" }, { PPC_INS_EVMHESMFAAW, "evmhesmfaaw" }, { PPC_INS_EVMHESMFANW, "evmhesmfanw" }, { PPC_INS_EVMHESMI, "evmhesmi" }, { PPC_INS_EVMHESMIA, "evmhesmia" }, { PPC_INS_EVMHESMIAAW, "evmhesmiaaw" }, { PPC_INS_EVMHESMIANW, "evmhesmianw" }, { PPC_INS_EVMHESSF, "evmhessf" }, { PPC_INS_EVMHESSFA, "evmhessfa" }, { PPC_INS_EVMHESSFAAW, "evmhessfaaw" }, { PPC_INS_EVMHESSFANW, "evmhessfanw" }, { PPC_INS_EVMHESSIAAW, "evmhessiaaw" }, { PPC_INS_EVMHESSIANW, "evmhessianw" }, { PPC_INS_EVMHEUMI, "evmheumi" }, { PPC_INS_EVMHEUMIA, "evmheumia" }, { PPC_INS_EVMHEUMIAAW, "evmheumiaaw" }, { PPC_INS_EVMHEUMIANW, "evmheumianw" }, { PPC_INS_EVMHEUSIAAW, "evmheusiaaw" }, { PPC_INS_EVMHEUSIANW, "evmheusianw" }, { PPC_INS_EVMHOGSMFAA, "evmhogsmfaa" }, { PPC_INS_EVMHOGSMFAN, "evmhogsmfan" }, { PPC_INS_EVMHOGSMIAA, "evmhogsmiaa" }, { PPC_INS_EVMHOGSMIAN, "evmhogsmian" }, { PPC_INS_EVMHOGUMIAA, "evmhogumiaa" }, { PPC_INS_EVMHOGUMIAN, "evmhogumian" }, { PPC_INS_EVMHOSMF, "evmhosmf" }, { PPC_INS_EVMHOSMFA, "evmhosmfa" }, { PPC_INS_EVMHOSMFAAW, "evmhosmfaaw" }, { PPC_INS_EVMHOSMFANW, "evmhosmfanw" }, { PPC_INS_EVMHOSMI, "evmhosmi" }, { PPC_INS_EVMHOSMIA, "evmhosmia" }, { PPC_INS_EVMHOSMIAAW, "evmhosmiaaw" }, { PPC_INS_EVMHOSMIANW, "evmhosmianw" }, { PPC_INS_EVMHOSSF, "evmhossf" }, { PPC_INS_EVMHOSSFA, "evmhossfa" }, { PPC_INS_EVMHOSSFAAW, "evmhossfaaw" }, { PPC_INS_EVMHOSSFANW, "evmhossfanw" }, { PPC_INS_EVMHOSSIAAW, "evmhossiaaw" }, { PPC_INS_EVMHOSSIANW, "evmhossianw" }, { PPC_INS_EVMHOUMI, "evmhoumi" }, { PPC_INS_EVMHOUMIA, "evmhoumia" }, { PPC_INS_EVMHOUMIAAW, "evmhoumiaaw" }, { PPC_INS_EVMHOUMIANW, "evmhoumianw" }, { PPC_INS_EVMHOUSIAAW, "evmhousiaaw" }, { PPC_INS_EVMHOUSIANW, "evmhousianw" }, { PPC_INS_EVMRA, "evmra" }, { PPC_INS_EVMWHSMF, "evmwhsmf" }, { PPC_INS_EVMWHSMFA, "evmwhsmfa" }, { PPC_INS_EVMWHSMI, "evmwhsmi" }, { PPC_INS_EVMWHSMIA, "evmwhsmia" }, { PPC_INS_EVMWHSSF, "evmwhssf" }, { PPC_INS_EVMWHSSFA, "evmwhssfa" }, { PPC_INS_EVMWHUMI, "evmwhumi" }, { PPC_INS_EVMWHUMIA, "evmwhumia" }, { PPC_INS_EVMWLSMIAAW, "evmwlsmiaaw" }, { PPC_INS_EVMWLSMIANW, "evmwlsmianw" }, { PPC_INS_EVMWLSSIAAW, "evmwlssiaaw" }, { PPC_INS_EVMWLSSIANW, "evmwlssianw" }, { PPC_INS_EVMWLUMI, "evmwlumi" }, { PPC_INS_EVMWLUMIA, "evmwlumia" }, { PPC_INS_EVMWLUMIAAW, "evmwlumiaaw" }, { PPC_INS_EVMWLUMIANW, "evmwlumianw" }, { PPC_INS_EVMWLUSIAAW, "evmwlusiaaw" }, { PPC_INS_EVMWLUSIANW, "evmwlusianw" }, { PPC_INS_EVMWSMF, "evmwsmf" }, { PPC_INS_EVMWSMFA, "evmwsmfa" }, { PPC_INS_EVMWSMFAA, "evmwsmfaa" }, { PPC_INS_EVMWSMFAN, "evmwsmfan" }, { PPC_INS_EVMWSMI, "evmwsmi" }, { PPC_INS_EVMWSMIA, "evmwsmia" }, { PPC_INS_EVMWSMIAA, "evmwsmiaa" }, { PPC_INS_EVMWSMIAN, "evmwsmian" }, { PPC_INS_EVMWSSF, "evmwssf" }, { PPC_INS_EVMWSSFA, "evmwssfa" }, { PPC_INS_EVMWSSFAA, "evmwssfaa" }, { PPC_INS_EVMWSSFAN, "evmwssfan" }, { PPC_INS_EVMWUMI, "evmwumi" }, { PPC_INS_EVMWUMIA, "evmwumia" }, { PPC_INS_EVMWUMIAA, "evmwumiaa" }, { PPC_INS_EVMWUMIAN, "evmwumian" }, { PPC_INS_EVNAND, "evnand" }, { PPC_INS_EVNEG, "evneg" }, { PPC_INS_EVNOR, "evnor" }, { PPC_INS_EVOR, "evor" }, { PPC_INS_EVORC, "evorc" }, { PPC_INS_EVRLW, "evrlw" }, { PPC_INS_EVRLWI, "evrlwi" }, { PPC_INS_EVRNDW, "evrndw" }, { PPC_INS_EVSLW, "evslw" }, { PPC_INS_EVSLWI, "evslwi" }, { PPC_INS_EVSPLATFI, "evsplatfi" }, { PPC_INS_EVSPLATI, "evsplati" }, { PPC_INS_EVSRWIS, "evsrwis" }, { PPC_INS_EVSRWIU, "evsrwiu" }, { PPC_INS_EVSRWS, "evsrws" }, { PPC_INS_EVSRWU, "evsrwu" }, { PPC_INS_EVSTDD, "evstdd" }, { PPC_INS_EVSTDDX, "evstddx" }, { PPC_INS_EVSTDH, "evstdh" }, { PPC_INS_EVSTDHX, "evstdhx" }, { PPC_INS_EVSTDW, "evstdw" }, { PPC_INS_EVSTDWX, "evstdwx" }, { PPC_INS_EVSTWHE, "evstwhe" }, { PPC_INS_EVSTWHEX, "evstwhex" }, { PPC_INS_EVSTWHO, "evstwho" }, { PPC_INS_EVSTWHOX, "evstwhox" }, { PPC_INS_EVSTWWE, "evstwwe" }, { PPC_INS_EVSTWWEX, "evstwwex" }, { PPC_INS_EVSTWWO, "evstwwo" }, { PPC_INS_EVSTWWOX, "evstwwox" }, { PPC_INS_EVSUBFSMIAAW, "evsubfsmiaaw" }, { PPC_INS_EVSUBFSSIAAW, "evsubfssiaaw" }, { PPC_INS_EVSUBFUMIAAW, "evsubfumiaaw" }, { PPC_INS_EVSUBFUSIAAW, "evsubfusiaaw" }, { PPC_INS_EVSUBFW, "evsubfw" }, { PPC_INS_EVSUBIFW, "evsubifw" }, { PPC_INS_EVXOR, "evxor" }, { PPC_INS_EXTSB, "extsb" }, { PPC_INS_EXTSH, "extsh" }, { PPC_INS_EXTSW, "extsw" }, { PPC_INS_EIEIO, "eieio" }, { PPC_INS_FABS, "fabs" }, { PPC_INS_FADD, "fadd" }, { PPC_INS_FADDS, "fadds" }, { PPC_INS_FCFID, "fcfid" }, { PPC_INS_FCFIDS, "fcfids" }, { PPC_INS_FCFIDU, "fcfidu" }, { PPC_INS_FCFIDUS, "fcfidus" }, { PPC_INS_FCMPU, "fcmpu" }, { PPC_INS_FCPSGN, "fcpsgn" }, { PPC_INS_FCTID, "fctid" }, { PPC_INS_FCTIDUZ, "fctiduz" }, { PPC_INS_FCTIDZ, "fctidz" }, { PPC_INS_FCTIW, "fctiw" }, { PPC_INS_FCTIWUZ, "fctiwuz" }, { PPC_INS_FCTIWZ, "fctiwz" }, { PPC_INS_FDIV, "fdiv" }, { PPC_INS_FDIVS, "fdivs" }, { PPC_INS_FMADD, "fmadd" }, { PPC_INS_FMADDS, "fmadds" }, { PPC_INS_FMR, "fmr" }, { PPC_INS_FMSUB, "fmsub" }, { PPC_INS_FMSUBS, "fmsubs" }, { PPC_INS_FMUL, "fmul" }, { PPC_INS_FMULS, "fmuls" }, { PPC_INS_FNABS, "fnabs" }, { PPC_INS_FNEG, "fneg" }, { PPC_INS_FNMADD, "fnmadd" }, { PPC_INS_FNMADDS, "fnmadds" }, { PPC_INS_FNMSUB, "fnmsub" }, { PPC_INS_FNMSUBS, "fnmsubs" }, { PPC_INS_FRE, "fre" }, { PPC_INS_FRES, "fres" }, { PPC_INS_FRIM, "frim" }, { PPC_INS_FRIN, "frin" }, { PPC_INS_FRIP, "frip" }, { PPC_INS_FRIZ, "friz" }, { PPC_INS_FRSP, "frsp" }, { PPC_INS_FRSQRTE, "frsqrte" }, { PPC_INS_FRSQRTES, "frsqrtes" }, { PPC_INS_FSEL, "fsel" }, { PPC_INS_FSQRT, "fsqrt" }, { PPC_INS_FSQRTS, "fsqrts" }, { PPC_INS_FSUB, "fsub" }, { PPC_INS_FSUBS, "fsubs" }, { PPC_INS_ICBI, "icbi" }, { PPC_INS_ICBT, "icbt" }, { PPC_INS_ICCCI, "iccci" }, { PPC_INS_ISEL, "isel" }, { PPC_INS_ISYNC, "isync" }, { PPC_INS_LA, "la" }, { PPC_INS_LBZ, "lbz" }, { PPC_INS_LBZCIX, "lbzcix" }, { PPC_INS_LBZU, "lbzu" }, { PPC_INS_LBZUX, "lbzux" }, { PPC_INS_LBZX, "lbzx" }, { PPC_INS_LD, "ld" }, { PPC_INS_LDARX, "ldarx" }, { PPC_INS_LDBRX, "ldbrx" }, { PPC_INS_LDCIX, "ldcix" }, { PPC_INS_LDU, "ldu" }, { PPC_INS_LDUX, "ldux" }, { PPC_INS_LDX, "ldx" }, { PPC_INS_LFD, "lfd" }, { PPC_INS_LFDU, "lfdu" }, { PPC_INS_LFDUX, "lfdux" }, { PPC_INS_LFDX, "lfdx" }, { PPC_INS_LFIWAX, "lfiwax" }, { PPC_INS_LFIWZX, "lfiwzx" }, { PPC_INS_LFS, "lfs" }, { PPC_INS_LFSU, "lfsu" }, { PPC_INS_LFSUX, "lfsux" }, { PPC_INS_LFSX, "lfsx" }, { PPC_INS_LHA, "lha" }, { PPC_INS_LHAU, "lhau" }, { PPC_INS_LHAUX, "lhaux" }, { PPC_INS_LHAX, "lhax" }, { PPC_INS_LHBRX, "lhbrx" }, { PPC_INS_LHZ, "lhz" }, { PPC_INS_LHZCIX, "lhzcix" }, { PPC_INS_LHZU, "lhzu" }, { PPC_INS_LHZUX, "lhzux" }, { PPC_INS_LHZX, "lhzx" }, { PPC_INS_LI, "li" }, { PPC_INS_LIS, "lis" }, { PPC_INS_LMW, "lmw" }, { PPC_INS_LSWI, "lswi" }, { PPC_INS_LVEBX, "lvebx" }, { PPC_INS_LVEHX, "lvehx" }, { PPC_INS_LVEWX, "lvewx" }, { PPC_INS_LVSL, "lvsl" }, { PPC_INS_LVSR, "lvsr" }, { PPC_INS_LVX, "lvx" }, { PPC_INS_LVXL, "lvxl" }, { PPC_INS_LWA, "lwa" }, { PPC_INS_LWARX, "lwarx" }, { PPC_INS_LWAUX, "lwaux" }, { PPC_INS_LWAX, "lwax" }, { PPC_INS_LWBRX, "lwbrx" }, { PPC_INS_LWZ, "lwz" }, { PPC_INS_LWZCIX, "lwzcix" }, { PPC_INS_LWZU, "lwzu" }, { PPC_INS_LWZUX, "lwzux" }, { PPC_INS_LWZX, "lwzx" }, { PPC_INS_LXSDX, "lxsdx" }, { PPC_INS_LXVD2X, "lxvd2x" }, { PPC_INS_LXVDSX, "lxvdsx" }, { PPC_INS_LXVW4X, "lxvw4x" }, { PPC_INS_MBAR, "mbar" }, { PPC_INS_MCRF, "mcrf" }, { PPC_INS_MCRFS, "mcrfs" }, { PPC_INS_MFCR, "mfcr" }, { PPC_INS_MFCTR, "mfctr" }, { PPC_INS_MFDCR, "mfdcr" }, { PPC_INS_MFFS, "mffs" }, { PPC_INS_MFLR, "mflr" }, { PPC_INS_MFMSR, "mfmsr" }, { PPC_INS_MFOCRF, "mfocrf" }, { PPC_INS_MFSPR, "mfspr" }, { PPC_INS_MFSR, "mfsr" }, { PPC_INS_MFSRIN, "mfsrin" }, { PPC_INS_MFTB, "mftb" }, { PPC_INS_MFVSCR, "mfvscr" }, { PPC_INS_MSYNC, "msync" }, { PPC_INS_MTCRF, "mtcrf" }, { PPC_INS_MTCTR, "mtctr" }, { PPC_INS_MTDCR, "mtdcr" }, { PPC_INS_MTFSB0, "mtfsb0" }, { PPC_INS_MTFSB1, "mtfsb1" }, { PPC_INS_MTFSF, "mtfsf" }, { PPC_INS_MTFSFI, "mtfsfi" }, { PPC_INS_MTLR, "mtlr" }, { PPC_INS_MTMSR, "mtmsr" }, { PPC_INS_MTMSRD, "mtmsrd" }, { PPC_INS_MTOCRF, "mtocrf" }, { PPC_INS_MTSPR, "mtspr" }, { PPC_INS_MTSR, "mtsr" }, { PPC_INS_MTSRIN, "mtsrin" }, { PPC_INS_MTVSCR, "mtvscr" }, { PPC_INS_MULHD, "mulhd" }, { PPC_INS_MULHDU, "mulhdu" }, { PPC_INS_MULHW, "mulhw" }, { PPC_INS_MULHWU, "mulhwu" }, { PPC_INS_MULLD, "mulld" }, { PPC_INS_MULLI, "mulli" }, { PPC_INS_MULLW, "mullw" }, { PPC_INS_NAND, "nand" }, { PPC_INS_NEG, "neg" }, { PPC_INS_NOP, "nop" }, { PPC_INS_ORI, "ori" }, { PPC_INS_NOR, "nor" }, { PPC_INS_OR, "or" }, { PPC_INS_ORC, "orc" }, { PPC_INS_ORIS, "oris" }, { PPC_INS_POPCNTD, "popcntd" }, { PPC_INS_POPCNTW, "popcntw" }, { PPC_INS_QVALIGNI, "qvaligni" }, { PPC_INS_QVESPLATI, "qvesplati" }, { PPC_INS_QVFABS, "qvfabs" }, { PPC_INS_QVFADD, "qvfadd" }, { PPC_INS_QVFADDS, "qvfadds" }, { PPC_INS_QVFCFID, "qvfcfid" }, { PPC_INS_QVFCFIDS, "qvfcfids" }, { PPC_INS_QVFCFIDU, "qvfcfidu" }, { PPC_INS_QVFCFIDUS, "qvfcfidus" }, { PPC_INS_QVFCMPEQ, "qvfcmpeq" }, { PPC_INS_QVFCMPGT, "qvfcmpgt" }, { PPC_INS_QVFCMPLT, "qvfcmplt" }, { PPC_INS_QVFCPSGN, "qvfcpsgn" }, { PPC_INS_QVFCTID, "qvfctid" }, { PPC_INS_QVFCTIDU, "qvfctidu" }, { PPC_INS_QVFCTIDUZ, "qvfctiduz" }, { PPC_INS_QVFCTIDZ, "qvfctidz" }, { PPC_INS_QVFCTIW, "qvfctiw" }, { PPC_INS_QVFCTIWU, "qvfctiwu" }, { PPC_INS_QVFCTIWUZ, "qvfctiwuz" }, { PPC_INS_QVFCTIWZ, "qvfctiwz" }, { PPC_INS_QVFLOGICAL, "qvflogical" }, { PPC_INS_QVFMADD, "qvfmadd" }, { PPC_INS_QVFMADDS, "qvfmadds" }, { PPC_INS_QVFMR, "qvfmr" }, { PPC_INS_QVFMSUB, "qvfmsub" }, { PPC_INS_QVFMSUBS, "qvfmsubs" }, { PPC_INS_QVFMUL, "qvfmul" }, { PPC_INS_QVFMULS, "qvfmuls" }, { PPC_INS_QVFNABS, "qvfnabs" }, { PPC_INS_QVFNEG, "qvfneg" }, { PPC_INS_QVFNMADD, "qvfnmadd" }, { PPC_INS_QVFNMADDS, "qvfnmadds" }, { PPC_INS_QVFNMSUB, "qvfnmsub" }, { PPC_INS_QVFNMSUBS, "qvfnmsubs" }, { PPC_INS_QVFPERM, "qvfperm" }, { PPC_INS_QVFRE, "qvfre" }, { PPC_INS_QVFRES, "qvfres" }, { PPC_INS_QVFRIM, "qvfrim" }, { PPC_INS_QVFRIN, "qvfrin" }, { PPC_INS_QVFRIP, "qvfrip" }, { PPC_INS_QVFRIZ, "qvfriz" }, { PPC_INS_QVFRSP, "qvfrsp" }, { PPC_INS_QVFRSQRTE, "qvfrsqrte" }, { PPC_INS_QVFRSQRTES, "qvfrsqrtes" }, { PPC_INS_QVFSEL, "qvfsel" }, { PPC_INS_QVFSUB, "qvfsub" }, { PPC_INS_QVFSUBS, "qvfsubs" }, { PPC_INS_QVFTSTNAN, "qvftstnan" }, { PPC_INS_QVFXMADD, "qvfxmadd" }, { PPC_INS_QVFXMADDS, "qvfxmadds" }, { PPC_INS_QVFXMUL, "qvfxmul" }, { PPC_INS_QVFXMULS, "qvfxmuls" }, { PPC_INS_QVFXXCPNMADD, "qvfxxcpnmadd" }, { PPC_INS_QVFXXCPNMADDS, "qvfxxcpnmadds" }, { PPC_INS_QVFXXMADD, "qvfxxmadd" }, { PPC_INS_QVFXXMADDS, "qvfxxmadds" }, { PPC_INS_QVFXXNPMADD, "qvfxxnpmadd" }, { PPC_INS_QVFXXNPMADDS, "qvfxxnpmadds" }, { PPC_INS_QVGPCI, "qvgpci" }, { PPC_INS_QVLFCDUX, "qvlfcdux" }, { PPC_INS_QVLFCDUXA, "qvlfcduxa" }, { PPC_INS_QVLFCDX, "qvlfcdx" }, { PPC_INS_QVLFCDXA, "qvlfcdxa" }, { PPC_INS_QVLFCSUX, "qvlfcsux" }, { PPC_INS_QVLFCSUXA, "qvlfcsuxa" }, { PPC_INS_QVLFCSX, "qvlfcsx" }, { PPC_INS_QVLFCSXA, "qvlfcsxa" }, { PPC_INS_QVLFDUX, "qvlfdux" }, { PPC_INS_QVLFDUXA, "qvlfduxa" }, { PPC_INS_QVLFDX, "qvlfdx" }, { PPC_INS_QVLFDXA, "qvlfdxa" }, { PPC_INS_QVLFIWAX, "qvlfiwax" }, { PPC_INS_QVLFIWAXA, "qvlfiwaxa" }, { PPC_INS_QVLFIWZX, "qvlfiwzx" }, { PPC_INS_QVLFIWZXA, "qvlfiwzxa" }, { PPC_INS_QVLFSUX, "qvlfsux" }, { PPC_INS_QVLFSUXA, "qvlfsuxa" }, { PPC_INS_QVLFSX, "qvlfsx" }, { PPC_INS_QVLFSXA, "qvlfsxa" }, { PPC_INS_QVLPCLDX, "qvlpcldx" }, { PPC_INS_QVLPCLSX, "qvlpclsx" }, { PPC_INS_QVLPCRDX, "qvlpcrdx" }, { PPC_INS_QVLPCRSX, "qvlpcrsx" }, { PPC_INS_QVSTFCDUX, "qvstfcdux" }, { PPC_INS_QVSTFCDUXA, "qvstfcduxa" }, { PPC_INS_QVSTFCDUXI, "qvstfcduxi" }, { PPC_INS_QVSTFCDUXIA, "qvstfcduxia" }, { PPC_INS_QVSTFCDX, "qvstfcdx" }, { PPC_INS_QVSTFCDXA, "qvstfcdxa" }, { PPC_INS_QVSTFCDXI, "qvstfcdxi" }, { PPC_INS_QVSTFCDXIA, "qvstfcdxia" }, { PPC_INS_QVSTFCSUX, "qvstfcsux" }, { PPC_INS_QVSTFCSUXA, "qvstfcsuxa" }, { PPC_INS_QVSTFCSUXI, "qvstfcsuxi" }, { PPC_INS_QVSTFCSUXIA, "qvstfcsuxia" }, { PPC_INS_QVSTFCSX, "qvstfcsx" }, { PPC_INS_QVSTFCSXA, "qvstfcsxa" }, { PPC_INS_QVSTFCSXI, "qvstfcsxi" }, { PPC_INS_QVSTFCSXIA, "qvstfcsxia" }, { PPC_INS_QVSTFDUX, "qvstfdux" }, { PPC_INS_QVSTFDUXA, "qvstfduxa" }, { PPC_INS_QVSTFDUXI, "qvstfduxi" }, { PPC_INS_QVSTFDUXIA, "qvstfduxia" }, { PPC_INS_QVSTFDX, "qvstfdx" }, { PPC_INS_QVSTFDXA, "qvstfdxa" }, { PPC_INS_QVSTFDXI, "qvstfdxi" }, { PPC_INS_QVSTFDXIA, "qvstfdxia" }, { PPC_INS_QVSTFIWX, "qvstfiwx" }, { PPC_INS_QVSTFIWXA, "qvstfiwxa" }, { PPC_INS_QVSTFSUX, "qvstfsux" }, { PPC_INS_QVSTFSUXA, "qvstfsuxa" }, { PPC_INS_QVSTFSUXI, "qvstfsuxi" }, { PPC_INS_QVSTFSUXIA, "qvstfsuxia" }, { PPC_INS_QVSTFSX, "qvstfsx" }, { PPC_INS_QVSTFSXA, "qvstfsxa" }, { PPC_INS_QVSTFSXI, "qvstfsxi" }, { PPC_INS_QVSTFSXIA, "qvstfsxia" }, { PPC_INS_RFCI, "rfci" }, { PPC_INS_RFDI, "rfdi" }, { PPC_INS_RFI, "rfi" }, { PPC_INS_RFID, "rfid" }, { PPC_INS_RFMCI, "rfmci" }, { PPC_INS_RLDCL, "rldcl" }, { PPC_INS_RLDCR, "rldcr" }, { PPC_INS_RLDIC, "rldic" }, { PPC_INS_RLDICL, "rldicl" }, { PPC_INS_RLDICR, "rldicr" }, { PPC_INS_RLDIMI, "rldimi" }, { PPC_INS_RLWIMI, "rlwimi" }, { PPC_INS_RLWINM, "rlwinm" }, { PPC_INS_RLWNM, "rlwnm" }, { PPC_INS_SC, "sc" }, { PPC_INS_SLBIA, "slbia" }, { PPC_INS_SLBIE, "slbie" }, { PPC_INS_SLBMFEE, "slbmfee" }, { PPC_INS_SLBMTE, "slbmte" }, { PPC_INS_SLD, "sld" }, { PPC_INS_SLW, "slw" }, { PPC_INS_SRAD, "srad" }, { PPC_INS_SRADI, "sradi" }, { PPC_INS_SRAW, "sraw" }, { PPC_INS_SRAWI, "srawi" }, { PPC_INS_SRD, "srd" }, { PPC_INS_SRW, "srw" }, { PPC_INS_STB, "stb" }, { PPC_INS_STBCIX, "stbcix" }, { PPC_INS_STBU, "stbu" }, { PPC_INS_STBUX, "stbux" }, { PPC_INS_STBX, "stbx" }, { PPC_INS_STD, "std" }, { PPC_INS_STDBRX, "stdbrx" }, { PPC_INS_STDCIX, "stdcix" }, { PPC_INS_STDCX, "stdcx" }, { PPC_INS_STDU, "stdu" }, { PPC_INS_STDUX, "stdux" }, { PPC_INS_STDX, "stdx" }, { PPC_INS_STFD, "stfd" }, { PPC_INS_STFDU, "stfdu" }, { PPC_INS_STFDUX, "stfdux" }, { PPC_INS_STFDX, "stfdx" }, { PPC_INS_STFIWX, "stfiwx" }, { PPC_INS_STFS, "stfs" }, { PPC_INS_STFSU, "stfsu" }, { PPC_INS_STFSUX, "stfsux" }, { PPC_INS_STFSX, "stfsx" }, { PPC_INS_STH, "sth" }, { PPC_INS_STHBRX, "sthbrx" }, { PPC_INS_STHCIX, "sthcix" }, { PPC_INS_STHU, "sthu" }, { PPC_INS_STHUX, "sthux" }, { PPC_INS_STHX, "sthx" }, { PPC_INS_STMW, "stmw" }, { PPC_INS_STSWI, "stswi" }, { PPC_INS_STVEBX, "stvebx" }, { PPC_INS_STVEHX, "stvehx" }, { PPC_INS_STVEWX, "stvewx" }, { PPC_INS_STVX, "stvx" }, { PPC_INS_STVXL, "stvxl" }, { PPC_INS_STW, "stw" }, { PPC_INS_STWBRX, "stwbrx" }, { PPC_INS_STWCIX, "stwcix" }, { PPC_INS_STWCX, "stwcx" }, { PPC_INS_STWU, "stwu" }, { PPC_INS_STWUX, "stwux" }, { PPC_INS_STWX, "stwx" }, { PPC_INS_STXSDX, "stxsdx" }, { PPC_INS_STXVD2X, "stxvd2x" }, { PPC_INS_STXVW4X, "stxvw4x" }, { PPC_INS_SUBF, "subf" }, { PPC_INS_SUBFC, "subfc" }, { PPC_INS_SUBFE, "subfe" }, { PPC_INS_SUBFIC, "subfic" }, { PPC_INS_SUBFME, "subfme" }, { PPC_INS_SUBFZE, "subfze" }, { PPC_INS_SYNC, "sync" }, { PPC_INS_TD, "td" }, { PPC_INS_TDI, "tdi" }, { PPC_INS_TLBIA, "tlbia" }, { PPC_INS_TLBIE, "tlbie" }, { PPC_INS_TLBIEL, "tlbiel" }, { PPC_INS_TLBIVAX, "tlbivax" }, { PPC_INS_TLBLD, "tlbld" }, { PPC_INS_TLBLI, "tlbli" }, { PPC_INS_TLBRE, "tlbre" }, { PPC_INS_TLBSX, "tlbsx" }, { PPC_INS_TLBSYNC, "tlbsync" }, { PPC_INS_TLBWE, "tlbwe" }, { PPC_INS_TRAP, "trap" }, { PPC_INS_TW, "tw" }, { PPC_INS_TWI, "twi" }, { PPC_INS_VADDCUW, "vaddcuw" }, { PPC_INS_VADDFP, "vaddfp" }, { PPC_INS_VADDSBS, "vaddsbs" }, { PPC_INS_VADDSHS, "vaddshs" }, { PPC_INS_VADDSWS, "vaddsws" }, { PPC_INS_VADDUBM, "vaddubm" }, { PPC_INS_VADDUBS, "vaddubs" }, { PPC_INS_VADDUDM, "vaddudm" }, { PPC_INS_VADDUHM, "vadduhm" }, { PPC_INS_VADDUHS, "vadduhs" }, { PPC_INS_VADDUWM, "vadduwm" }, { PPC_INS_VADDUWS, "vadduws" }, { PPC_INS_VAND, "vand" }, { PPC_INS_VANDC, "vandc" }, { PPC_INS_VAVGSB, "vavgsb" }, { PPC_INS_VAVGSH, "vavgsh" }, { PPC_INS_VAVGSW, "vavgsw" }, { PPC_INS_VAVGUB, "vavgub" }, { PPC_INS_VAVGUH, "vavguh" }, { PPC_INS_VAVGUW, "vavguw" }, { PPC_INS_VCFSX, "vcfsx" }, { PPC_INS_VCFUX, "vcfux" }, { PPC_INS_VCLZB, "vclzb" }, { PPC_INS_VCLZD, "vclzd" }, { PPC_INS_VCLZH, "vclzh" }, { PPC_INS_VCLZW, "vclzw" }, { PPC_INS_VCMPBFP, "vcmpbfp" }, { PPC_INS_VCMPEQFP, "vcmpeqfp" }, { PPC_INS_VCMPEQUB, "vcmpequb" }, { PPC_INS_VCMPEQUD, "vcmpequd" }, { PPC_INS_VCMPEQUH, "vcmpequh" }, { PPC_INS_VCMPEQUW, "vcmpequw" }, { PPC_INS_VCMPGEFP, "vcmpgefp" }, { PPC_INS_VCMPGTFP, "vcmpgtfp" }, { PPC_INS_VCMPGTSB, "vcmpgtsb" }, { PPC_INS_VCMPGTSD, "vcmpgtsd" }, { PPC_INS_VCMPGTSH, "vcmpgtsh" }, { PPC_INS_VCMPGTSW, "vcmpgtsw" }, { PPC_INS_VCMPGTUB, "vcmpgtub" }, { PPC_INS_VCMPGTUD, "vcmpgtud" }, { PPC_INS_VCMPGTUH, "vcmpgtuh" }, { PPC_INS_VCMPGTUW, "vcmpgtuw" }, { PPC_INS_VCTSXS, "vctsxs" }, { PPC_INS_VCTUXS, "vctuxs" }, { PPC_INS_VEQV, "veqv" }, { PPC_INS_VEXPTEFP, "vexptefp" }, { PPC_INS_VLOGEFP, "vlogefp" }, { PPC_INS_VMADDFP, "vmaddfp" }, { PPC_INS_VMAXFP, "vmaxfp" }, { PPC_INS_VMAXSB, "vmaxsb" }, { PPC_INS_VMAXSD, "vmaxsd" }, { PPC_INS_VMAXSH, "vmaxsh" }, { PPC_INS_VMAXSW, "vmaxsw" }, { PPC_INS_VMAXUB, "vmaxub" }, { PPC_INS_VMAXUD, "vmaxud" }, { PPC_INS_VMAXUH, "vmaxuh" }, { PPC_INS_VMAXUW, "vmaxuw" }, { PPC_INS_VMHADDSHS, "vmhaddshs" }, { PPC_INS_VMHRADDSHS, "vmhraddshs" }, { PPC_INS_VMINUD, "vminud" }, { PPC_INS_VMINFP, "vminfp" }, { PPC_INS_VMINSB, "vminsb" }, { PPC_INS_VMINSD, "vminsd" }, { PPC_INS_VMINSH, "vminsh" }, { PPC_INS_VMINSW, "vminsw" }, { PPC_INS_VMINUB, "vminub" }, { PPC_INS_VMINUH, "vminuh" }, { PPC_INS_VMINUW, "vminuw" }, { PPC_INS_VMLADDUHM, "vmladduhm" }, { PPC_INS_VMRGHB, "vmrghb" }, { PPC_INS_VMRGHH, "vmrghh" }, { PPC_INS_VMRGHW, "vmrghw" }, { PPC_INS_VMRGLB, "vmrglb" }, { PPC_INS_VMRGLH, "vmrglh" }, { PPC_INS_VMRGLW, "vmrglw" }, { PPC_INS_VMSUMMBM, "vmsummbm" }, { PPC_INS_VMSUMSHM, "vmsumshm" }, { PPC_INS_VMSUMSHS, "vmsumshs" }, { PPC_INS_VMSUMUBM, "vmsumubm" }, { PPC_INS_VMSUMUHM, "vmsumuhm" }, { PPC_INS_VMSUMUHS, "vmsumuhs" }, { PPC_INS_VMULESB, "vmulesb" }, { PPC_INS_VMULESH, "vmulesh" }, { PPC_INS_VMULESW, "vmulesw" }, { PPC_INS_VMULEUB, "vmuleub" }, { PPC_INS_VMULEUH, "vmuleuh" }, { PPC_INS_VMULEUW, "vmuleuw" }, { PPC_INS_VMULOSB, "vmulosb" }, { PPC_INS_VMULOSH, "vmulosh" }, { PPC_INS_VMULOSW, "vmulosw" }, { PPC_INS_VMULOUB, "vmuloub" }, { PPC_INS_VMULOUH, "vmulouh" }, { PPC_INS_VMULOUW, "vmulouw" }, { PPC_INS_VMULUWM, "vmuluwm" }, { PPC_INS_VNAND, "vnand" }, { PPC_INS_VNMSUBFP, "vnmsubfp" }, { PPC_INS_VNOR, "vnor" }, { PPC_INS_VOR, "vor" }, { PPC_INS_VORC, "vorc" }, { PPC_INS_VPERM, "vperm" }, { PPC_INS_VPKPX, "vpkpx" }, { PPC_INS_VPKSHSS, "vpkshss" }, { PPC_INS_VPKSHUS, "vpkshus" }, { PPC_INS_VPKSWSS, "vpkswss" }, { PPC_INS_VPKSWUS, "vpkswus" }, { PPC_INS_VPKUHUM, "vpkuhum" }, { PPC_INS_VPKUHUS, "vpkuhus" }, { PPC_INS_VPKUWUM, "vpkuwum" }, { PPC_INS_VPKUWUS, "vpkuwus" }, { PPC_INS_VPOPCNTB, "vpopcntb" }, { PPC_INS_VPOPCNTD, "vpopcntd" }, { PPC_INS_VPOPCNTH, "vpopcnth" }, { PPC_INS_VPOPCNTW, "vpopcntw" }, { PPC_INS_VREFP, "vrefp" }, { PPC_INS_VRFIM, "vrfim" }, { PPC_INS_VRFIN, "vrfin" }, { PPC_INS_VRFIP, "vrfip" }, { PPC_INS_VRFIZ, "vrfiz" }, { PPC_INS_VRLB, "vrlb" }, { PPC_INS_VRLD, "vrld" }, { PPC_INS_VRLH, "vrlh" }, { PPC_INS_VRLW, "vrlw" }, { PPC_INS_VRSQRTEFP, "vrsqrtefp" }, { PPC_INS_VSEL, "vsel" }, { PPC_INS_VSL, "vsl" }, { PPC_INS_VSLB, "vslb" }, { PPC_INS_VSLD, "vsld" }, { PPC_INS_VSLDOI, "vsldoi" }, { PPC_INS_VSLH, "vslh" }, { PPC_INS_VSLO, "vslo" }, { PPC_INS_VSLW, "vslw" }, { PPC_INS_VSPLTB, "vspltb" }, { PPC_INS_VSPLTH, "vsplth" }, { PPC_INS_VSPLTISB, "vspltisb" }, { PPC_INS_VSPLTISH, "vspltish" }, { PPC_INS_VSPLTISW, "vspltisw" }, { PPC_INS_VSPLTW, "vspltw" }, { PPC_INS_VSR, "vsr" }, { PPC_INS_VSRAB, "vsrab" }, { PPC_INS_VSRAD, "vsrad" }, { PPC_INS_VSRAH, "vsrah" }, { PPC_INS_VSRAW, "vsraw" }, { PPC_INS_VSRB, "vsrb" }, { PPC_INS_VSRD, "vsrd" }, { PPC_INS_VSRH, "vsrh" }, { PPC_INS_VSRO, "vsro" }, { PPC_INS_VSRW, "vsrw" }, { PPC_INS_VSUBCUW, "vsubcuw" }, { PPC_INS_VSUBFP, "vsubfp" }, { PPC_INS_VSUBSBS, "vsubsbs" }, { PPC_INS_VSUBSHS, "vsubshs" }, { PPC_INS_VSUBSWS, "vsubsws" }, { PPC_INS_VSUBUBM, "vsububm" }, { PPC_INS_VSUBUBS, "vsububs" }, { PPC_INS_VSUBUDM, "vsubudm" }, { PPC_INS_VSUBUHM, "vsubuhm" }, { PPC_INS_VSUBUHS, "vsubuhs" }, { PPC_INS_VSUBUWM, "vsubuwm" }, { PPC_INS_VSUBUWS, "vsubuws" }, { PPC_INS_VSUM2SWS, "vsum2sws" }, { PPC_INS_VSUM4SBS, "vsum4sbs" }, { PPC_INS_VSUM4SHS, "vsum4shs" }, { PPC_INS_VSUM4UBS, "vsum4ubs" }, { PPC_INS_VSUMSWS, "vsumsws" }, { PPC_INS_VUPKHPX, "vupkhpx" }, { PPC_INS_VUPKHSB, "vupkhsb" }, { PPC_INS_VUPKHSH, "vupkhsh" }, { PPC_INS_VUPKLPX, "vupklpx" }, { PPC_INS_VUPKLSB, "vupklsb" }, { PPC_INS_VUPKLSH, "vupklsh" }, { PPC_INS_VXOR, "vxor" }, { PPC_INS_WAIT, "wait" }, { PPC_INS_WRTEE, "wrtee" }, { PPC_INS_WRTEEI, "wrteei" }, { PPC_INS_XOR, "xor" }, { PPC_INS_XORI, "xori" }, { PPC_INS_XORIS, "xoris" }, { PPC_INS_XSABSDP, "xsabsdp" }, { PPC_INS_XSADDDP, "xsadddp" }, { PPC_INS_XSCMPODP, "xscmpodp" }, { PPC_INS_XSCMPUDP, "xscmpudp" }, { PPC_INS_XSCPSGNDP, "xscpsgndp" }, { PPC_INS_XSCVDPSP, "xscvdpsp" }, { PPC_INS_XSCVDPSXDS, "xscvdpsxds" }, { PPC_INS_XSCVDPSXWS, "xscvdpsxws" }, { PPC_INS_XSCVDPUXDS, "xscvdpuxds" }, { PPC_INS_XSCVDPUXWS, "xscvdpuxws" }, { PPC_INS_XSCVSPDP, "xscvspdp" }, { PPC_INS_XSCVSXDDP, "xscvsxddp" }, { PPC_INS_XSCVUXDDP, "xscvuxddp" }, { PPC_INS_XSDIVDP, "xsdivdp" }, { PPC_INS_XSMADDADP, "xsmaddadp" }, { PPC_INS_XSMADDMDP, "xsmaddmdp" }, { PPC_INS_XSMAXDP, "xsmaxdp" }, { PPC_INS_XSMINDP, "xsmindp" }, { PPC_INS_XSMSUBADP, "xsmsubadp" }, { PPC_INS_XSMSUBMDP, "xsmsubmdp" }, { PPC_INS_XSMULDP, "xsmuldp" }, { PPC_INS_XSNABSDP, "xsnabsdp" }, { PPC_INS_XSNEGDP, "xsnegdp" }, { PPC_INS_XSNMADDADP, "xsnmaddadp" }, { PPC_INS_XSNMADDMDP, "xsnmaddmdp" }, { PPC_INS_XSNMSUBADP, "xsnmsubadp" }, { PPC_INS_XSNMSUBMDP, "xsnmsubmdp" }, { PPC_INS_XSRDPI, "xsrdpi" }, { PPC_INS_XSRDPIC, "xsrdpic" }, { PPC_INS_XSRDPIM, "xsrdpim" }, { PPC_INS_XSRDPIP, "xsrdpip" }, { PPC_INS_XSRDPIZ, "xsrdpiz" }, { PPC_INS_XSREDP, "xsredp" }, { PPC_INS_XSRSQRTEDP, "xsrsqrtedp" }, { PPC_INS_XSSQRTDP, "xssqrtdp" }, { PPC_INS_XSSUBDP, "xssubdp" }, { PPC_INS_XSTDIVDP, "xstdivdp" }, { PPC_INS_XSTSQRTDP, "xstsqrtdp" }, { PPC_INS_XVABSDP, "xvabsdp" }, { PPC_INS_XVABSSP, "xvabssp" }, { PPC_INS_XVADDDP, "xvadddp" }, { PPC_INS_XVADDSP, "xvaddsp" }, { PPC_INS_XVCMPEQDP, "xvcmpeqdp" }, { PPC_INS_XVCMPEQSP, "xvcmpeqsp" }, { PPC_INS_XVCMPGEDP, "xvcmpgedp" }, { PPC_INS_XVCMPGESP, "xvcmpgesp" }, { PPC_INS_XVCMPGTDP, "xvcmpgtdp" }, { PPC_INS_XVCMPGTSP, "xvcmpgtsp" }, { PPC_INS_XVCPSGNDP, "xvcpsgndp" }, { PPC_INS_XVCPSGNSP, "xvcpsgnsp" }, { PPC_INS_XVCVDPSP, "xvcvdpsp" }, { PPC_INS_XVCVDPSXDS, "xvcvdpsxds" }, { PPC_INS_XVCVDPSXWS, "xvcvdpsxws" }, { PPC_INS_XVCVDPUXDS, "xvcvdpuxds" }, { PPC_INS_XVCVDPUXWS, "xvcvdpuxws" }, { PPC_INS_XVCVSPDP, "xvcvspdp" }, { PPC_INS_XVCVSPSXDS, "xvcvspsxds" }, { PPC_INS_XVCVSPSXWS, "xvcvspsxws" }, { PPC_INS_XVCVSPUXDS, "xvcvspuxds" }, { PPC_INS_XVCVSPUXWS, "xvcvspuxws" }, { PPC_INS_XVCVSXDDP, "xvcvsxddp" }, { PPC_INS_XVCVSXDSP, "xvcvsxdsp" }, { PPC_INS_XVCVSXWDP, "xvcvsxwdp" }, { PPC_INS_XVCVSXWSP, "xvcvsxwsp" }, { PPC_INS_XVCVUXDDP, "xvcvuxddp" }, { PPC_INS_XVCVUXDSP, "xvcvuxdsp" }, { PPC_INS_XVCVUXWDP, "xvcvuxwdp" }, { PPC_INS_XVCVUXWSP, "xvcvuxwsp" }, { PPC_INS_XVDIVDP, "xvdivdp" }, { PPC_INS_XVDIVSP, "xvdivsp" }, { PPC_INS_XVMADDADP, "xvmaddadp" }, { PPC_INS_XVMADDASP, "xvmaddasp" }, { PPC_INS_XVMADDMDP, "xvmaddmdp" }, { PPC_INS_XVMADDMSP, "xvmaddmsp" }, { PPC_INS_XVMAXDP, "xvmaxdp" }, { PPC_INS_XVMAXSP, "xvmaxsp" }, { PPC_INS_XVMINDP, "xvmindp" }, { PPC_INS_XVMINSP, "xvminsp" }, { PPC_INS_XVMSUBADP, "xvmsubadp" }, { PPC_INS_XVMSUBASP, "xvmsubasp" }, { PPC_INS_XVMSUBMDP, "xvmsubmdp" }, { PPC_INS_XVMSUBMSP, "xvmsubmsp" }, { PPC_INS_XVMULDP, "xvmuldp" }, { PPC_INS_XVMULSP, "xvmulsp" }, { PPC_INS_XVNABSDP, "xvnabsdp" }, { PPC_INS_XVNABSSP, "xvnabssp" }, { PPC_INS_XVNEGDP, "xvnegdp" }, { PPC_INS_XVNEGSP, "xvnegsp" }, { PPC_INS_XVNMADDADP, "xvnmaddadp" }, { PPC_INS_XVNMADDASP, "xvnmaddasp" }, { PPC_INS_XVNMADDMDP, "xvnmaddmdp" }, { PPC_INS_XVNMADDMSP, "xvnmaddmsp" }, { PPC_INS_XVNMSUBADP, "xvnmsubadp" }, { PPC_INS_XVNMSUBASP, "xvnmsubasp" }, { PPC_INS_XVNMSUBMDP, "xvnmsubmdp" }, { PPC_INS_XVNMSUBMSP, "xvnmsubmsp" }, { PPC_INS_XVRDPI, "xvrdpi" }, { PPC_INS_XVRDPIC, "xvrdpic" }, { PPC_INS_XVRDPIM, "xvrdpim" }, { PPC_INS_XVRDPIP, "xvrdpip" }, { PPC_INS_XVRDPIZ, "xvrdpiz" }, { PPC_INS_XVREDP, "xvredp" }, { PPC_INS_XVRESP, "xvresp" }, { PPC_INS_XVRSPI, "xvrspi" }, { PPC_INS_XVRSPIC, "xvrspic" }, { PPC_INS_XVRSPIM, "xvrspim" }, { PPC_INS_XVRSPIP, "xvrspip" }, { PPC_INS_XVRSPIZ, "xvrspiz" }, { PPC_INS_XVRSQRTEDP, "xvrsqrtedp" }, { PPC_INS_XVRSQRTESP, "xvrsqrtesp" }, { PPC_INS_XVSQRTDP, "xvsqrtdp" }, { PPC_INS_XVSQRTSP, "xvsqrtsp" }, { PPC_INS_XVSUBDP, "xvsubdp" }, { PPC_INS_XVSUBSP, "xvsubsp" }, { PPC_INS_XVTDIVDP, "xvtdivdp" }, { PPC_INS_XVTDIVSP, "xvtdivsp" }, { PPC_INS_XVTSQRTDP, "xvtsqrtdp" }, { PPC_INS_XVTSQRTSP, "xvtsqrtsp" }, { PPC_INS_XXLAND, "xxland" }, { PPC_INS_XXLANDC, "xxlandc" }, { PPC_INS_XXLEQV, "xxleqv" }, { PPC_INS_XXLNAND, "xxlnand" }, { PPC_INS_XXLNOR, "xxlnor" }, { PPC_INS_XXLOR, "xxlor" }, { PPC_INS_XXLORC, "xxlorc" }, { PPC_INS_XXLXOR, "xxlxor" }, { PPC_INS_XXMRGHW, "xxmrghw" }, { PPC_INS_XXMRGLW, "xxmrglw" }, { PPC_INS_XXPERMDI, "xxpermdi" }, { PPC_INS_XXSEL, "xxsel" }, { PPC_INS_XXSLDWI, "xxsldwi" }, { PPC_INS_XXSPLTW, "xxspltw" }, { PPC_INS_BCA, "bca" }, { PPC_INS_BCLA, "bcla" }, // extra & alias instructions { PPC_INS_SLWI, "slwi" }, { PPC_INS_SRWI, "srwi" }, { PPC_INS_SLDI, "sldi" }, { PPC_INS_BTA, "bta" }, { PPC_INS_CRSET, "crset" }, { PPC_INS_CRNOT, "crnot" }, { PPC_INS_CRMOVE, "crmove" }, { PPC_INS_CRCLR, "crclr" }, { PPC_INS_MFBR0, "mfbr0" }, { PPC_INS_MFBR1, "mfbr1" }, { PPC_INS_MFBR2, "mfbr2" }, { PPC_INS_MFBR3, "mfbr3" }, { PPC_INS_MFBR4, "mfbr4" }, { PPC_INS_MFBR5, "mfbr5" }, { PPC_INS_MFBR6, "mfbr6" }, { PPC_INS_MFBR7, "mfbr7" }, { PPC_INS_MFXER, "mfxer" }, { PPC_INS_MFRTCU, "mfrtcu" }, { PPC_INS_MFRTCL, "mfrtcl" }, { PPC_INS_MFDSCR, "mfdscr" }, { PPC_INS_MFDSISR, "mfdsisr" }, { PPC_INS_MFDAR, "mfdar" }, { PPC_INS_MFSRR2, "mfsrr2" }, { PPC_INS_MFSRR3, "mfsrr3" }, { PPC_INS_MFCFAR, "mfcfar" }, { PPC_INS_MFAMR, "mfamr" }, { PPC_INS_MFPID, "mfpid" }, { PPC_INS_MFTBLO, "mftblo" }, { PPC_INS_MFTBHI, "mftbhi" }, { PPC_INS_MFDBATU, "mfdbatu" }, { PPC_INS_MFDBATL, "mfdbatl" }, { PPC_INS_MFIBATU, "mfibatu" }, { PPC_INS_MFIBATL, "mfibatl" }, { PPC_INS_MFDCCR, "mfdccr" }, { PPC_INS_MFICCR, "mficcr" }, { PPC_INS_MFDEAR, "mfdear" }, { PPC_INS_MFESR, "mfesr" }, { PPC_INS_MFSPEFSCR, "mfspefscr" }, { PPC_INS_MFTCR, "mftcr" }, { PPC_INS_MFASR, "mfasr" }, { PPC_INS_MFPVR, "mfpvr" }, { PPC_INS_MFTBU, "mftbu" }, { PPC_INS_MTCR, "mtcr" }, { PPC_INS_MTBR0, "mtbr0" }, { PPC_INS_MTBR1, "mtbr1" }, { PPC_INS_MTBR2, "mtbr2" }, { PPC_INS_MTBR3, "mtbr3" }, { PPC_INS_MTBR4, "mtbr4" }, { PPC_INS_MTBR5, "mtbr5" }, { PPC_INS_MTBR6, "mtbr6" }, { PPC_INS_MTBR7, "mtbr7" }, { PPC_INS_MTXER, "mtxer" }, { PPC_INS_MTDSCR, "mtdscr" }, { PPC_INS_MTDSISR, "mtdsisr" }, { PPC_INS_MTDAR, "mtdar" }, { PPC_INS_MTSRR2, "mtsrr2" }, { PPC_INS_MTSRR3, "mtsrr3" }, { PPC_INS_MTCFAR, "mtcfar" }, { PPC_INS_MTAMR, "mtamr" }, { PPC_INS_MTPID, "mtpid" }, { PPC_INS_MTTBL, "mttbl" }, { PPC_INS_MTTBU, "mttbu" }, { PPC_INS_MTTBLO, "mttblo" }, { PPC_INS_MTTBHI, "mttbhi" }, { PPC_INS_MTDBATU, "mtdbatu" }, { PPC_INS_MTDBATL, "mtdbatl" }, { PPC_INS_MTIBATU, "mtibatu" }, { PPC_INS_MTIBATL, "mtibatl" }, { PPC_INS_MTDCCR, "mtdccr" }, { PPC_INS_MTICCR, "mticcr" }, { PPC_INS_MTDEAR, "mtdear" }, { PPC_INS_MTESR, "mtesr" }, { PPC_INS_MTSPEFSCR, "mtspefscr" }, { PPC_INS_MTTCR, "mttcr" }, { PPC_INS_NOT, "not" }, { PPC_INS_MR, "mr" }, { PPC_INS_ROTLD, "rotld" }, { PPC_INS_ROTLDI, "rotldi" }, { PPC_INS_CLRLDI, "clrldi" }, { PPC_INS_ROTLWI, "rotlwi" }, { PPC_INS_CLRLWI, "clrlwi" }, { PPC_INS_ROTLW, "rotlw" }, { PPC_INS_SUB, "sub" }, { PPC_INS_SUBC, "subc" }, { PPC_INS_LWSYNC, "lwsync" }, { PPC_INS_PTESYNC, "ptesync" }, { PPC_INS_TDLT, "tdlt" }, { PPC_INS_TDEQ, "tdeq" }, { PPC_INS_TDGT, "tdgt" }, { PPC_INS_TDNE, "tdne" }, { PPC_INS_TDLLT, "tdllt" }, { PPC_INS_TDLGT, "tdlgt" }, { PPC_INS_TDU, "tdu" }, { PPC_INS_TDLTI, "tdlti" }, { PPC_INS_TDEQI, "tdeqi" }, { PPC_INS_TDGTI, "tdgti" }, { PPC_INS_TDNEI, "tdnei" }, { PPC_INS_TDLLTI, "tdllti" }, { PPC_INS_TDLGTI, "tdlgti" }, { PPC_INS_TDUI, "tdui" }, { PPC_INS_TLBREHI, "tlbrehi" }, { PPC_INS_TLBRELO, "tlbrelo" }, { PPC_INS_TLBWEHI, "tlbwehi" }, { PPC_INS_TLBWELO, "tlbwelo" }, { PPC_INS_TWLT, "twlt" }, { PPC_INS_TWEQ, "tweq" }, { PPC_INS_TWGT, "twgt" }, { PPC_INS_TWNE, "twne" }, { PPC_INS_TWLLT, "twllt" }, { PPC_INS_TWLGT, "twlgt" }, { PPC_INS_TWU, "twu" }, { PPC_INS_TWLTI, "twlti" }, { PPC_INS_TWEQI, "tweqi" }, { PPC_INS_TWGTI, "twgti" }, { PPC_INS_TWNEI, "twnei" }, { PPC_INS_TWLLTI, "twllti" }, { PPC_INS_TWLGTI, "twlgti" }, { PPC_INS_TWUI, "twui" }, { PPC_INS_WAITRSV, "waitrsv" }, { PPC_INS_WAITIMPL, "waitimpl" }, { PPC_INS_XNOP, "xnop" }, { PPC_INS_XVMOVDP, "xvmovdp" }, { PPC_INS_XVMOVSP, "xvmovsp" }, { PPC_INS_XXSPLTD, "xxspltd" }, { PPC_INS_XXMRGHD, "xxmrghd" }, { PPC_INS_XXMRGLD, "xxmrgld" }, { PPC_INS_XXSWAPD, "xxswapd" }, { PPC_INS_BT, "bt" }, { PPC_INS_BF, "bf" }, { PPC_INS_BDNZT, "bdnzt" }, { PPC_INS_BDNZF, "bdnzf" }, { PPC_INS_BDZF, "bdzf" }, { PPC_INS_BDZT, "bdzt" }, { PPC_INS_BFA, "bfa" }, { PPC_INS_BDNZTA, "bdnzta" }, { PPC_INS_BDNZFA, "bdnzfa" }, { PPC_INS_BDZTA, "bdzta" }, { PPC_INS_BDZFA, "bdzfa" }, { PPC_INS_BTCTR, "btctr" }, { PPC_INS_BFCTR, "bfctr" }, { PPC_INS_BTCTRL, "btctrl" }, { PPC_INS_BFCTRL, "bfctrl" }, { PPC_INS_BTL, "btl" }, { PPC_INS_BFL, "bfl" }, { PPC_INS_BDNZTL, "bdnztl" }, { PPC_INS_BDNZFL, "bdnzfl" }, { PPC_INS_BDZTL, "bdztl" }, { PPC_INS_BDZFL, "bdzfl" }, { PPC_INS_BTLA, "btla" }, { PPC_INS_BFLA, "bfla" }, { PPC_INS_BDNZTLA, "bdnztla" }, { PPC_INS_BDNZFLA, "bdnzfla" }, { PPC_INS_BDZTLA, "bdztla" }, { PPC_INS_BDZFLA, "bdzfla" }, { PPC_INS_BTLR, "btlr" }, { PPC_INS_BFLR, "bflr" }, { PPC_INS_BDNZTLR, "bdnztlr" }, { PPC_INS_BDZTLR, "bdztlr" }, { PPC_INS_BDZFLR, "bdzflr" }, { PPC_INS_BTLRL, "btlrl" }, { PPC_INS_BFLRL, "bflrl" }, { PPC_INS_BDNZTLRL, "bdnztlrl" }, { PPC_INS_BDNZFLRL, "bdnzflrl" }, { PPC_INS_BDZTLRL, "bdztlrl" }, { PPC_INS_BDZFLRL, "bdzflrl" }, // QPX { PPC_INS_QVFAND, "qvfand" }, { PPC_INS_QVFCLR, "qvfclr" }, { PPC_INS_QVFANDC, "qvfandc" }, { PPC_INS_QVFCTFB, "qvfctfb" }, { PPC_INS_QVFXOR, "qvfxor" }, { PPC_INS_QVFOR, "qvfor" }, { PPC_INS_QVFNOR, "qvfnor" }, { PPC_INS_QVFEQU, "qvfequ" }, { PPC_INS_QVFNOT, "qvfnot" }, { PPC_INS_QVFORC, "qvforc" }, { PPC_INS_QVFNAND, "qvfnand" }, { PPC_INS_QVFSET, "qvfset" }, }; // special alias insn static const name_map alias_insn_names[] = { { 0, NULL } }; #endif const char *PPC_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET unsigned int i; if (id >= PPC_INS_ENDING) return NULL; // handle special alias first for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { if (alias_insn_names[i].id == id) return alias_insn_names[i].name; } return insn_name_maps[id].name; #else return NULL; #endif } // map instruction name to public instruction ID ppc_insn PPC_map_insn(const char *name) { unsigned int i; for(i = 1; i < ARR_SIZE(insn_name_maps); i++) { if (!strcmp(name, insn_name_maps[i].name)) return i; } // not found return PPC_INS_INVALID; } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { PPC_GRP_INVALID, NULL }, { PPC_GRP_JUMP, "jump" }, // architecture-specific groups { PPC_GRP_ALTIVEC, "altivec" }, { PPC_GRP_MODE32, "mode32" }, { PPC_GRP_MODE64, "mode64" }, { PPC_GRP_BOOKE, "booke" }, { PPC_GRP_NOTBOOKE, "notbooke" }, { PPC_GRP_SPE, "spe" }, { PPC_GRP_VSX, "vsx" }, { PPC_GRP_E500, "e500" }, { PPC_GRP_PPC4XX, "ppc4xx" }, { PPC_GRP_PPC6XX, "ppc6xx" }, { PPC_GRP_ICBT, "icbt" }, { PPC_GRP_P8ALTIVEC, "p8altivec" }, { PPC_GRP_P8VECTOR, "p8vector" }, { PPC_GRP_QPX, "qpx" }, }; #endif const char *PPC_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // map internal raw register to 'public' register ppc_reg PPC_map_register(unsigned int r) { static unsigned int map[] = { 0, 0, PPC_REG_CARRY, PPC_REG_CTR, 0, PPC_REG_LR, 0, PPC_REG_VRSAVE, PPC_REG_R0, 0, PPC_REG_CR0, PPC_REG_CR1, PPC_REG_CR2, PPC_REG_CR3, PPC_REG_CR4, PPC_REG_CR5, PPC_REG_CR6, PPC_REG_CR7, PPC_REG_CTR, PPC_REG_F0, PPC_REG_F1, PPC_REG_F2, PPC_REG_F3, PPC_REG_F4, PPC_REG_F5, PPC_REG_F6, PPC_REG_F7, PPC_REG_F8, PPC_REG_F9, PPC_REG_F10, PPC_REG_F11, PPC_REG_F12, PPC_REG_F13, PPC_REG_F14, PPC_REG_F15, PPC_REG_F16, PPC_REG_F17, PPC_REG_F18, PPC_REG_F19, PPC_REG_F20, PPC_REG_F21, PPC_REG_F22, PPC_REG_F23, PPC_REG_F24, PPC_REG_F25, PPC_REG_F26, PPC_REG_F27, PPC_REG_F28, PPC_REG_F29, PPC_REG_F30, PPC_REG_F31, 0, PPC_REG_LR, PPC_REG_Q0, PPC_REG_Q1, PPC_REG_Q2, PPC_REG_Q3, PPC_REG_Q4, PPC_REG_Q5, PPC_REG_Q6, PPC_REG_Q7, PPC_REG_Q8, PPC_REG_Q9, PPC_REG_Q10, PPC_REG_Q11, PPC_REG_Q12, PPC_REG_Q13, PPC_REG_Q14, PPC_REG_Q15, PPC_REG_Q16, PPC_REG_Q17, PPC_REG_Q18, PPC_REG_Q19, PPC_REG_Q20, PPC_REG_Q21, PPC_REG_Q22, PPC_REG_Q23, PPC_REG_Q24, PPC_REG_Q25, PPC_REG_Q26, PPC_REG_Q27, PPC_REG_Q28, PPC_REG_Q29, PPC_REG_Q30, PPC_REG_Q31, PPC_REG_R0, PPC_REG_R1, PPC_REG_R2, PPC_REG_R3, PPC_REG_R4, PPC_REG_R5, PPC_REG_R6, PPC_REG_R7, PPC_REG_R8, PPC_REG_R9, PPC_REG_R10, PPC_REG_R11, PPC_REG_R12, PPC_REG_R13, PPC_REG_R14, PPC_REG_R15, PPC_REG_R16, PPC_REG_R17, PPC_REG_R18, PPC_REG_R19, PPC_REG_R20, PPC_REG_R21, PPC_REG_R22, PPC_REG_R23, PPC_REG_R24, PPC_REG_R25, PPC_REG_R26, PPC_REG_R27, PPC_REG_R28, PPC_REG_R29, PPC_REG_R30, PPC_REG_R31, PPC_REG_V0, PPC_REG_V1, PPC_REG_V2, PPC_REG_V3, PPC_REG_V4, PPC_REG_V5, PPC_REG_V6, PPC_REG_V7, PPC_REG_V8, PPC_REG_V9, PPC_REG_V10, PPC_REG_V11, PPC_REG_V12, PPC_REG_V13, PPC_REG_V14, PPC_REG_V15, PPC_REG_V16, PPC_REG_V17, PPC_REG_V18, PPC_REG_V19, PPC_REG_V20, PPC_REG_V21, PPC_REG_V22, PPC_REG_V23, PPC_REG_V24, PPC_REG_V25, PPC_REG_V26, PPC_REG_V27, PPC_REG_V28, PPC_REG_V29, PPC_REG_V30, PPC_REG_V31, PPC_REG_VS32, PPC_REG_VS33, PPC_REG_VS34, PPC_REG_VS35, PPC_REG_VS36, PPC_REG_VS37, PPC_REG_VS38, PPC_REG_VS39, PPC_REG_VS40, PPC_REG_VS41, PPC_REG_VS42, PPC_REG_VS43, PPC_REG_VS44, PPC_REG_VS45, PPC_REG_VS46, PPC_REG_VS47, PPC_REG_VS48, PPC_REG_VS49, PPC_REG_VS50, PPC_REG_VS51, PPC_REG_VS52, PPC_REG_VS53, PPC_REG_VS54, PPC_REG_VS55, PPC_REG_VS56, PPC_REG_VS57, PPC_REG_VS58, PPC_REG_VS59, PPC_REG_VS60, PPC_REG_VS61, PPC_REG_VS62, PPC_REG_VS63, PPC_REG_VS32, PPC_REG_VS33, PPC_REG_VS34, PPC_REG_VS35, PPC_REG_VS36, PPC_REG_VS37, PPC_REG_VS38, PPC_REG_VS39, PPC_REG_VS40, PPC_REG_VS41, PPC_REG_VS42, PPC_REG_VS43, PPC_REG_VS44, PPC_REG_VS45, PPC_REG_VS46, PPC_REG_VS47, PPC_REG_VS48, PPC_REG_VS49, PPC_REG_VS50, PPC_REG_VS51, PPC_REG_VS52, PPC_REG_VS53, PPC_REG_VS54, PPC_REG_VS55, PPC_REG_VS56, PPC_REG_VS57, PPC_REG_VS58, PPC_REG_VS59, PPC_REG_VS60, PPC_REG_VS61, PPC_REG_VS62, PPC_REG_VS63, PPC_REG_VS0, PPC_REG_VS1, PPC_REG_VS2, PPC_REG_VS3, PPC_REG_VS4, PPC_REG_VS5, PPC_REG_VS6, PPC_REG_VS7, PPC_REG_VS8, PPC_REG_VS9, PPC_REG_VS10, PPC_REG_VS11, PPC_REG_VS12, PPC_REG_VS13, PPC_REG_VS14, PPC_REG_VS15, PPC_REG_VS16, PPC_REG_VS17, PPC_REG_VS18, PPC_REG_VS19, PPC_REG_VS20, PPC_REG_VS21, PPC_REG_VS22, PPC_REG_VS23, PPC_REG_VS24, PPC_REG_VS25, PPC_REG_VS26, PPC_REG_VS27, PPC_REG_VS28, PPC_REG_VS29, PPC_REG_VS30, PPC_REG_VS31, PPC_REG_R0, PPC_REG_R1, PPC_REG_R2, PPC_REG_R3, PPC_REG_R4, PPC_REG_R5, PPC_REG_R6, PPC_REG_R7, PPC_REG_R8, PPC_REG_R9, PPC_REG_R10, PPC_REG_R11, PPC_REG_R12, PPC_REG_R13, PPC_REG_R14, PPC_REG_R15, PPC_REG_R16, PPC_REG_R17, PPC_REG_R18, PPC_REG_R19, PPC_REG_R20, PPC_REG_R21, PPC_REG_R22, PPC_REG_R23, PPC_REG_R24, PPC_REG_R25, PPC_REG_R26, PPC_REG_R27, PPC_REG_R28, PPC_REG_R29, PPC_REG_R30, PPC_REG_R31, PPC_REG_R0, PPC_REG_R2, PPC_REG_R6, PPC_REG_R10, PPC_REG_R14, PPC_REG_R18, PPC_REG_R22, PPC_REG_R26, PPC_REG_R30, PPC_REG_R1, PPC_REG_R5, PPC_REG_R9, PPC_REG_R13, PPC_REG_R17, PPC_REG_R21, PPC_REG_R25, PPC_REG_R29, PPC_REG_R0, PPC_REG_R4, PPC_REG_R8, PPC_REG_R12, PPC_REG_R16, PPC_REG_R20, PPC_REG_R24, PPC_REG_R28, PPC_REG_R3, PPC_REG_R7, PPC_REG_R11, PPC_REG_R15, PPC_REG_R19, PPC_REG_R23, PPC_REG_R27, PPC_REG_R31 }; if (r < ARR_SIZE(map)) return map[r]; // cannot find this register return 0; } static const struct ppc_alias alias_insn_name_maps[] = { //{ PPC_INS_BTA, "bta" }, { PPC_INS_B, PPC_BC_LT, "blt" }, { PPC_INS_B, PPC_BC_LE, "ble" }, { PPC_INS_B, PPC_BC_EQ, "beq" }, { PPC_INS_B, PPC_BC_GE, "bge" }, { PPC_INS_B, PPC_BC_GT, "bgt" }, { PPC_INS_B, PPC_BC_NE, "bne" }, { PPC_INS_B, PPC_BC_UN, "bun" }, { PPC_INS_B, PPC_BC_NU, "bnu" }, { PPC_INS_B, PPC_BC_SO, "bso" }, { PPC_INS_B, PPC_BC_NS, "bns" }, { PPC_INS_BA, PPC_BC_LT, "blta" }, { PPC_INS_BA, PPC_BC_LE, "blea" }, { PPC_INS_BA, PPC_BC_EQ, "beqa" }, { PPC_INS_BA, PPC_BC_GE, "bgea" }, { PPC_INS_BA, PPC_BC_GT, "bgta" }, { PPC_INS_BA, PPC_BC_NE, "bnea" }, { PPC_INS_BA, PPC_BC_UN, "buna" }, { PPC_INS_BA, PPC_BC_NU, "bnua" }, { PPC_INS_BA, PPC_BC_SO, "bsoa" }, { PPC_INS_BA, PPC_BC_NS, "bnsa" }, { PPC_INS_BCTR, PPC_BC_LT, "bltctr" }, { PPC_INS_BCTR, PPC_BC_LE, "blectr" }, { PPC_INS_BCTR, PPC_BC_EQ, "beqctr" }, { PPC_INS_BCTR, PPC_BC_GE, "bgectr" }, { PPC_INS_BCTR, PPC_BC_GT, "bgtctr" }, { PPC_INS_BCTR, PPC_BC_NE, "bnectr" }, { PPC_INS_BCTR, PPC_BC_UN, "bunctr" }, { PPC_INS_BCTR, PPC_BC_NU, "bnuctr" }, { PPC_INS_BCTR, PPC_BC_SO, "bsoctr" }, { PPC_INS_BCTR, PPC_BC_NS, "bnsctr" }, { PPC_INS_BCTRL, PPC_BC_LT, "bltctrl" }, { PPC_INS_BCTRL, PPC_BC_LE, "blectrl" }, { PPC_INS_BCTRL, PPC_BC_EQ, "beqctrl" }, { PPC_INS_BCTRL, PPC_BC_GE, "bgectrl" }, { PPC_INS_BCTRL, PPC_BC_GT, "bgtctrl" }, { PPC_INS_BCTRL, PPC_BC_NE, "bnectrl" }, { PPC_INS_BCTRL, PPC_BC_UN, "bunctrl" }, { PPC_INS_BCTRL, PPC_BC_NU, "bnuctrl" }, { PPC_INS_BCTRL, PPC_BC_SO, "bsoctrl" }, { PPC_INS_BCTRL, PPC_BC_NS, "bnsctrl" }, { PPC_INS_BL, PPC_BC_LT, "bltl" }, { PPC_INS_BL, PPC_BC_LE, "blel" }, { PPC_INS_BL, PPC_BC_EQ, "beql" }, { PPC_INS_BL, PPC_BC_GE, "bgel" }, { PPC_INS_BL, PPC_BC_GT, "bgtl" }, { PPC_INS_BL, PPC_BC_NE, "bnel" }, { PPC_INS_BL, PPC_BC_UN, "bunl" }, { PPC_INS_BL, PPC_BC_NU, "bnul" }, { PPC_INS_BL, PPC_BC_SO, "bsol" }, { PPC_INS_BL, PPC_BC_NS, "bnsl" }, { PPC_INS_BLA, PPC_BC_LT, "bltla" }, { PPC_INS_BLA, PPC_BC_LE, "blela" }, { PPC_INS_BLA, PPC_BC_EQ, "beqla" }, { PPC_INS_BLA, PPC_BC_GE, "bgela" }, { PPC_INS_BLA, PPC_BC_GT, "bgtla" }, { PPC_INS_BLA, PPC_BC_NE, "bnela" }, { PPC_INS_BLA, PPC_BC_UN, "bunla" }, { PPC_INS_BLA, PPC_BC_NU, "bnula" }, { PPC_INS_BLA, PPC_BC_SO, "bsola" }, { PPC_INS_BLA, PPC_BC_NS, "bnsla" }, { PPC_INS_BLR, PPC_BC_LT, "bltlr" }, { PPC_INS_BLR, PPC_BC_LE, "blelr" }, { PPC_INS_BLR, PPC_BC_EQ, "beqlr" }, { PPC_INS_BLR, PPC_BC_GE, "bgelr" }, { PPC_INS_BLR, PPC_BC_GT, "bgtlr" }, { PPC_INS_BLR, PPC_BC_NE, "bnelr" }, { PPC_INS_BLR, PPC_BC_UN, "bunlr" }, { PPC_INS_BLR, PPC_BC_NU, "bnulr" }, { PPC_INS_BLR, PPC_BC_SO, "bsolr" }, { PPC_INS_BLR, PPC_BC_NS, "bnslr" }, { PPC_INS_BLRL, PPC_BC_LT, "bltlrl" }, { PPC_INS_BLRL, PPC_BC_LE, "blelrl" }, { PPC_INS_BLRL, PPC_BC_EQ, "beqlrl" }, { PPC_INS_BLRL, PPC_BC_GE, "bgelrl" }, { PPC_INS_BLRL, PPC_BC_GT, "bgtlrl" }, { PPC_INS_BLRL, PPC_BC_NE, "bnelrl" }, { PPC_INS_BLRL, PPC_BC_UN, "bunlrl" }, { PPC_INS_BLRL, PPC_BC_NU, "bnulrl" }, { PPC_INS_BLRL, PPC_BC_SO, "bsolrl" }, { PPC_INS_BLRL, PPC_BC_NS, "bnslrl" }, }; // given alias mnemonic, return instruction ID & CC bool PPC_alias_insn(const char *name, struct ppc_alias *alias) { size_t i; for(i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) { if (!strcmp(name, alias_insn_name_maps[i].mnem)) { alias->id = alias_insn_name_maps[i].id; alias->cc = alias_insn_name_maps[i].cc; return true; } } // not found return false; } // check if this insn is relative branch bool PPC_abs_branch(cs_struct *h, unsigned int id) { unsigned int i; // list all absolute branch instructions static const unsigned int insn_abs[] = { PPC_BA, PPC_BCCA, PPC_BCCLA, PPC_BDNZA, PPC_BDNZAm, PPC_BDNZAp, PPC_BDNZLA, PPC_BDNZLAm, PPC_BDNZLAp, PPC_BDZA, PPC_BDZAm, PPC_BDZAp, PPC_BDZLAm, PPC_BDZLAp, PPC_BLA, PPC_gBCA, PPC_gBCLA, PPC_BDZLA, 0 }; for (i = 0; insn_abs[i]; i++) { if (id == insn_abs[i]) { return true; } } // not found return false; } #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCMapping.h010066400017500001750000000017711363403403300206300ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_PPC_MAP_H #define CS_PPC_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *PPC_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void PPC_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *PPC_insn_name(csh handle, unsigned int id); const char *PPC_group_name(csh handle, unsigned int id); // map internal raw register to 'public' register ppc_reg PPC_map_register(unsigned int r); struct ppc_alias { unsigned int id; // instruction id int cc; // code condition const char *mnem; }; // given alias mnemonic, return instruction ID & CC bool PPC_alias_insn(const char *name, struct ppc_alias *alias); // check if this insn is relative branch bool PPC_abs_branch(cs_struct *h, unsigned int id); // map instruction name to public instruction ID ppc_insn PPC_map_insn(const char *name); #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCMappingInsn.inc010066400017500001750000004304151363402546700220160ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { PPC_ADD4, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADD4TLS, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADD4o, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADD8, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADD8TLS, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADD8TLS_, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADD8o, PPC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDC, PPC_INS_ADDC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDC8, PPC_INS_ADDC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDC8o, PPC_INS_ADDC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDCo, PPC_INS_ADDC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDE, PPC_INS_ADDE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDE8, PPC_INS_ADDE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDE8o, PPC_INS_ADDE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDEo, PPC_INS_ADDE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDI, PPC_INS_ADDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDI8, PPC_INS_ADDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDIC, PPC_INS_ADDIC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDIC8, PPC_INS_ADDIC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDICo, PPC_INS_ADDIC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDIS, PPC_INS_ADDIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDIS8, PPC_INS_ADDIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDME, PPC_INS_ADDME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDME8, PPC_INS_ADDME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDME8o, PPC_INS_ADDME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDMEo, PPC_INS_ADDME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDZE, PPC_INS_ADDZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDZE8, PPC_INS_ADDZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDZE8o, PPC_INS_ADDZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ADDZEo, PPC_INS_ADDZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_AND, PPC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_AND8, PPC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_AND8o, PPC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDC, PPC_INS_ANDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDC8, PPC_INS_ANDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDC8o, PPC_INS_ANDC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDCo, PPC_INS_ANDC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDISo, PPC_INS_ANDIS, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDISo8, PPC_INS_ANDIS, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDIo, PPC_INS_ANDI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDIo8, PPC_INS_ANDI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ANDo, PPC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ATTN, PPC_INS_ATTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_B, PPC_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BA, PPC_INS_BA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BC, PPC_INS_BC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BCC, PPC_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BCCA, PPC_INS_BA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BCCCTR, PPC_INS_BCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1 #endif }, { PPC_BCCCTR8, PPC_INS_BCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1 #endif }, { PPC_BCCCTRL, PPC_INS_BCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCCCTRL8, PPC_INS_BCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0 #endif }, { PPC_BCCL, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCCLA, PPC_INS_BLA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCCLR, PPC_INS_BLR, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BCCLRL, PPC_INS_BLRL, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCCTR, PPC_INS_BCCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1 #endif }, { PPC_BCCTR8, PPC_INS_BCCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1 #endif }, { PPC_BCCTR8n, PPC_INS_BCCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1 #endif }, { PPC_BCCTRL, PPC_INS_BCCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCCTRL8, PPC_INS_BCCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0 #endif }, { PPC_BCCTRL8n, PPC_INS_BCCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0 #endif }, { PPC_BCCTRLn, PPC_INS_BCCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCCTRn, PPC_INS_BCCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1 #endif }, { PPC_BCL, PPC_INS_BCL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCLR, PPC_INS_BCLR, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BCLRL, PPC_INS_BCLRL, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCLRLn, PPC_INS_BCLRL, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCLRn, PPC_INS_BCLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BCLalways, PPC_INS_BCL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCLn, PPC_INS_BCL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BCTR, PPC_INS_BCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1 #endif }, { PPC_BCTR8, PPC_INS_BCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1 #endif }, { PPC_BCTRL, PPC_INS_BCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { PPC_GRP_MODE32, 0 }, 0, 0 #endif }, { PPC_BCTRL8, PPC_INS_BCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0 #endif }, { PPC_BCTRL8_LDinto_toc, PPC_INS_BCT, // FIXME #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, PPC_REG_X2, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0 #endif }, { PPC_BCn, PPC_INS_BC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZ, PPC_INS_BDNZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZ8, PPC_INS_BDNZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZA, PPC_INS_BDNZA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZAm, PPC_INS_BDNZA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZAp, PPC_INS_BDNZA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZL, PPC_INS_BDNZL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLA, PPC_INS_BDNZLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLAm, PPC_INS_BDNZLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLAp, PPC_INS_BDNZLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLR, PPC_INS_BDNZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZLR8, PPC_INS_BDNZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_RM, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZLRL, PPC_INS_BDNZLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLRLm, PPC_INS_BDNZLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLRLp, PPC_INS_BDNZLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLRm, PPC_INS_BDNZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZLRp, PPC_INS_BDNZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZLm, PPC_INS_BDNZL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZLp, PPC_INS_BDNZL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDNZm, PPC_INS_BDNZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDNZp, PPC_INS_BDNZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZ, PPC_INS_BDZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZ8, PPC_INS_BDZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZA, PPC_INS_BDZA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZAm, PPC_INS_BDZA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZAp, PPC_INS_BDZA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZL, PPC_INS_BDZL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLA, PPC_INS_BDZLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLAm, PPC_INS_BDZLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLAp, PPC_INS_BDZLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLR, PPC_INS_BDZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZLR8, PPC_INS_BDZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_RM, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZLRL, PPC_INS_BDZLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLRLm, PPC_INS_BDZLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLRLp, PPC_INS_BDZLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLRm, PPC_INS_BDZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZLRp, PPC_INS_BDZLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZLm, PPC_INS_BDZL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZLp, PPC_INS_BDZL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BDZm, PPC_INS_BDZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BDZp, PPC_INS_BDZ, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0 #endif }, { PPC_BL, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BL8, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BL8_NOP, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BL8_NOP_TLS, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BL8_TLS, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BL8_TLS_, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BLA, PPC_INS_BLA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BLA8, PPC_INS_BLA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BLA8_NOP, PPC_INS_BLA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_BLR, PPC_INS_BLR, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE32, 0 }, 0, 0 #endif }, { PPC_BLR8, PPC_INS_BLR, #ifndef CAPSTONE_DIET { PPC_REG_LR8, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 0, 0 #endif }, { PPC_BLRL, PPC_INS_BLRL, #ifndef CAPSTONE_DIET { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BL_TLS, PPC_INS_BL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_BRINC, PPC_INS_BRINC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_CMPB, PPC_INS_CMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPB8, PPC_INS_CMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPD, PPC_INS_CMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPDI, PPC_INS_CMPDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPLD, PPC_INS_CMPLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPLDI, PPC_INS_CMPLDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPLW, PPC_INS_CMPLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPLWI, PPC_INS_CMPLWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPW, PPC_INS_CMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CMPWI, PPC_INS_CMPWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CNTLZD, PPC_INS_CNTLZD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CNTLZDo, PPC_INS_CNTLZD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_CNTLZW, PPC_INS_CNTLZW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CNTLZW8, PPC_INS_CNTLZW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CNTLZW8o, PPC_INS_CNTLZW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_CNTLZWo, PPC_INS_CNTLZW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_CR6SET, PPC_INS_CREQV, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1EQ, 0 }, { 0 }, 0, 0 #endif }, { PPC_CR6UNSET, PPC_INS_CRXOR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1EQ, 0 }, { 0 }, 0, 0 #endif }, { PPC_CRAND, PPC_INS_CRAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRANDC, PPC_INS_CRANDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CREQV, PPC_INS_CREQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRNAND, PPC_INS_CRNAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRNOR, PPC_INS_CRNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CROR, PPC_INS_CROR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRORC, PPC_INS_CRORC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRSET, PPC_INS_CREQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRUNSET, PPC_INS_CRXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_CRXOR, PPC_INS_CRXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBA, PPC_INS_DCBA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBF, PPC_INS_DCBF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBI, PPC_INS_DCBI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBST, PPC_INS_DCBST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBT, PPC_INS_DCBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBTST, PPC_INS_DCBTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBZ, PPC_INS_DCBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCBZL, PPC_INS_DCBZL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DCCCI, PPC_INS_DCCCI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_DIVD, PPC_INS_DIVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVDU, PPC_INS_DIVDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVDUo, PPC_INS_DIVDU, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVDo, PPC_INS_DIVD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVW, PPC_INS_DIVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVWU, PPC_INS_DIVWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVWUo, PPC_INS_DIVWU, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_DIVWo, PPC_INS_DIVW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_DSS, PPC_INS_DSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSSALL, PPC_INS_DSSALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DST, PPC_INS_DST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DST64, PPC_INS_DST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSTST, PPC_INS_DSTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSTST64, PPC_INS_DSTST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSTSTT, PPC_INS_DSTSTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSTSTT64, PPC_INS_DSTSTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSTT, PPC_INS_DSTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_DSTT64, PPC_INS_DSTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_EQV, PPC_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EQV8, PPC_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EQV8o, PPC_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EQVo, PPC_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EVABS, PPC_INS_EVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVADDIW, PPC_INS_EVADDIW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVADDSMIAAW, PPC_INS_EVADDSMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVADDSSIAAW, PPC_INS_EVADDSSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVADDUMIAAW, PPC_INS_EVADDUMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVADDUSIAAW, PPC_INS_EVADDUSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVADDW, PPC_INS_EVADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVAND, PPC_INS_EVAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVANDC, PPC_INS_EVANDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCMPEQ, PPC_INS_EVCMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCMPGTS, PPC_INS_EVCMPGTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCMPGTU, PPC_INS_EVCMPGTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCMPLTS, PPC_INS_EVCMPLTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCMPLTU, PPC_INS_EVCMPLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCNTLSW, PPC_INS_EVCNTLSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVCNTLZW, PPC_INS_EVCNTLZW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVDIVWS, PPC_INS_EVDIVWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVDIVWU, PPC_INS_EVDIVWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVEQV, PPC_INS_EVEQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVEXTSB, PPC_INS_EVEXTSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVEXTSH, PPC_INS_EVEXTSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLDD, PPC_INS_EVLDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLDDX, PPC_INS_EVLDDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLDH, PPC_INS_EVLDH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLDHX, PPC_INS_EVLDHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLDW, PPC_INS_EVLDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLDWX, PPC_INS_EVLDWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLHHESPLAT, PPC_INS_EVLHHESPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLHHESPLATX, PPC_INS_EVLHHESPLATX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLHHOSSPLAT, PPC_INS_EVLHHOSSPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLHHOSSPLATX, PPC_INS_EVLHHOSSPLATX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLHHOUSPLAT, PPC_INS_EVLHHOUSPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLHHOUSPLATX, PPC_INS_EVLHHOUSPLATX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHE, PPC_INS_EVLWHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHEX, PPC_INS_EVLWHEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHOS, PPC_INS_EVLWHOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHOSX, PPC_INS_EVLWHOSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHOU, PPC_INS_EVLWHOU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHOUX, PPC_INS_EVLWHOUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHSPLAT, PPC_INS_EVLWHSPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWHSPLATX, PPC_INS_EVLWHSPLATX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWWSPLAT, PPC_INS_EVLWWSPLAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVLWWSPLATX, PPC_INS_EVLWWSPLATX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMERGEHI, PPC_INS_EVMERGEHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMERGEHILO, PPC_INS_EVMERGEHILO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMERGELO, PPC_INS_EVMERGELO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMERGELOHI, PPC_INS_EVMERGELOHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEGSMFAA, PPC_INS_EVMHEGSMFAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEGSMFAN, PPC_INS_EVMHEGSMFAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEGSMIAA, PPC_INS_EVMHEGSMIAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEGSMIAN, PPC_INS_EVMHEGSMIAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEGUMIAA, PPC_INS_EVMHEGUMIAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEGUMIAN, PPC_INS_EVMHEGUMIAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMF, PPC_INS_EVMHESMF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMFA, PPC_INS_EVMHESMFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMFAAW, PPC_INS_EVMHESMFAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMFANW, PPC_INS_EVMHESMFANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMI, PPC_INS_EVMHESMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMIA, PPC_INS_EVMHESMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMIAAW, PPC_INS_EVMHESMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESMIANW, PPC_INS_EVMHESMIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESSF, PPC_INS_EVMHESSF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESSFA, PPC_INS_EVMHESSFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESSFAAW, PPC_INS_EVMHESSFAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESSFANW, PPC_INS_EVMHESSFANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESSIAAW, PPC_INS_EVMHESSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHESSIANW, PPC_INS_EVMHESSIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEUMI, PPC_INS_EVMHEUMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEUMIA, PPC_INS_EVMHEUMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEUMIAAW, PPC_INS_EVMHEUMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEUMIANW, PPC_INS_EVMHEUMIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEUSIAAW, PPC_INS_EVMHEUSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHEUSIANW, PPC_INS_EVMHEUSIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOGSMFAA, PPC_INS_EVMHOGSMFAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOGSMFAN, PPC_INS_EVMHOGSMFAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOGSMIAA, PPC_INS_EVMHOGSMIAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOGSMIAN, PPC_INS_EVMHOGSMIAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOGUMIAA, PPC_INS_EVMHOGUMIAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOGUMIAN, PPC_INS_EVMHOGUMIAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMF, PPC_INS_EVMHOSMF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMFA, PPC_INS_EVMHOSMFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMFAAW, PPC_INS_EVMHOSMFAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMFANW, PPC_INS_EVMHOSMFANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMI, PPC_INS_EVMHOSMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMIA, PPC_INS_EVMHOSMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMIAAW, PPC_INS_EVMHOSMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSMIANW, PPC_INS_EVMHOSMIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSSF, PPC_INS_EVMHOSSF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSSFA, PPC_INS_EVMHOSSFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSSFAAW, PPC_INS_EVMHOSSFAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSSFANW, PPC_INS_EVMHOSSFANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSSIAAW, PPC_INS_EVMHOSSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOSSIANW, PPC_INS_EVMHOSSIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOUMI, PPC_INS_EVMHOUMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOUMIA, PPC_INS_EVMHOUMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOUMIAAW, PPC_INS_EVMHOUMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOUMIANW, PPC_INS_EVMHOUMIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOUSIAAW, PPC_INS_EVMHOUSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMHOUSIANW, PPC_INS_EVMHOUSIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMRA, PPC_INS_EVMRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHSMF, PPC_INS_EVMWHSMF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHSMFA, PPC_INS_EVMWHSMFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHSMI, PPC_INS_EVMWHSMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHSMIA, PPC_INS_EVMWHSMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHSSF, PPC_INS_EVMWHSSF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHSSFA, PPC_INS_EVMWHSSFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHUMI, PPC_INS_EVMWHUMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWHUMIA, PPC_INS_EVMWHUMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLSMIAAW, PPC_INS_EVMWLSMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLSMIANW, PPC_INS_EVMWLSMIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLSSIAAW, PPC_INS_EVMWLSSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLSSIANW, PPC_INS_EVMWLSSIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLUMI, PPC_INS_EVMWLUMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLUMIA, PPC_INS_EVMWLUMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLUMIAAW, PPC_INS_EVMWLUMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLUMIANW, PPC_INS_EVMWLUMIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLUSIAAW, PPC_INS_EVMWLUSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWLUSIANW, PPC_INS_EVMWLUSIANW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMF, PPC_INS_EVMWSMF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMFA, PPC_INS_EVMWSMFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMFAA, PPC_INS_EVMWSMFAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMFAN, PPC_INS_EVMWSMFAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMI, PPC_INS_EVMWSMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMIA, PPC_INS_EVMWSMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMIAA, PPC_INS_EVMWSMIAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSMIAN, PPC_INS_EVMWSMIAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSSF, PPC_INS_EVMWSSF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSSFA, PPC_INS_EVMWSSFA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSSFAA, PPC_INS_EVMWSSFAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWSSFAN, PPC_INS_EVMWSSFAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWUMI, PPC_INS_EVMWUMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWUMIA, PPC_INS_EVMWUMIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWUMIAA, PPC_INS_EVMWUMIAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVMWUMIAN, PPC_INS_EVMWUMIAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVNAND, PPC_INS_EVNAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVNEG, PPC_INS_EVNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVNOR, PPC_INS_EVNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVOR, PPC_INS_EVOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVORC, PPC_INS_EVORC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVRLW, PPC_INS_EVRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVRLWI, PPC_INS_EVRLWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVRNDW, PPC_INS_EVRNDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSLW, PPC_INS_EVSLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSLWI, PPC_INS_EVSLWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSPLATFI, PPC_INS_EVSPLATFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSPLATI, PPC_INS_EVSPLATI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSRWIS, PPC_INS_EVSRWIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSRWIU, PPC_INS_EVSRWIU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSRWS, PPC_INS_EVSRWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSRWU, PPC_INS_EVSRWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTDD, PPC_INS_EVSTDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTDDX, PPC_INS_EVSTDDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTDH, PPC_INS_EVSTDH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTDHX, PPC_INS_EVSTDHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTDW, PPC_INS_EVSTDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTDWX, PPC_INS_EVSTDWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWHE, PPC_INS_EVSTWHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWHEX, PPC_INS_EVSTWHEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWHO, PPC_INS_EVSTWHO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWHOX, PPC_INS_EVSTWHOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWWE, PPC_INS_EVSTWWE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWWEX, PPC_INS_EVSTWWEX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWWO, PPC_INS_EVSTWWO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSTWWOX, PPC_INS_EVSTWWOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSUBFSMIAAW, PPC_INS_EVSUBFSMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSUBFSSIAAW, PPC_INS_EVSUBFSSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSUBFUMIAAW, PPC_INS_EVSUBFUMIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSUBFUSIAAW, PPC_INS_EVSUBFUSIAAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSUBFW, PPC_INS_EVSUBFW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVSUBIFW, PPC_INS_EVSUBIFW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EVXOR, PPC_INS_EVXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0 #endif }, { PPC_EXTSB, PPC_INS_EXTSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSB8, PPC_INS_EXTSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSB8_32_64, PPC_INS_EXTSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSB8o, PPC_INS_EXTSB, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSBo, PPC_INS_EXTSB, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSH, PPC_INS_EXTSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSH8, PPC_INS_EXTSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSH8_32_64, PPC_INS_EXTSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSH8o, PPC_INS_EXTSH, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSHo, PPC_INS_EXTSH, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSW, PPC_INS_EXTSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSW_32_64, PPC_INS_EXTSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSW_32_64o, PPC_INS_EXTSW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EXTSWo, PPC_INS_EXTSW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_EnforceIEIO, PPC_INS_EIEIO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FABSD, PPC_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FABSDo, PPC_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FABSS, PPC_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FABSSo, PPC_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FADD, PPC_INS_FADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FADDS, PPC_INS_FADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FADDSo, PPC_INS_FADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FADDo, PPC_INS_FADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFID, PPC_INS_FCFID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDS, PPC_INS_FCFIDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDSo, PPC_INS_FCFIDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDU, PPC_INS_FCFIDU, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDUS, PPC_INS_FCFIDUS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDUSo, PPC_INS_FCFIDUS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDUo, PPC_INS_FCFIDU, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCFIDo, PPC_INS_FCFID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCMPUD, PPC_INS_FCMPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCMPUS, PPC_INS_FCMPU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCPSGND, PPC_INS_FCPSGN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCPSGNDo, PPC_INS_FCPSGN, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCPSGNS, PPC_INS_FCPSGN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCPSGNSo, PPC_INS_FCPSGN, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTID, PPC_INS_FCTID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIDUZ, PPC_INS_FCTIDUZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIDUZo, PPC_INS_FCTIDUZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIDZ, PPC_INS_FCTIDZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIDZo, PPC_INS_FCTIDZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIDo, PPC_INS_FCTID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIW, PPC_INS_FCTIW, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIWUZ, PPC_INS_FCTIWUZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIWUZo, PPC_INS_FCTIWUZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIWZ, PPC_INS_FCTIWZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIWZo, PPC_INS_FCTIWZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FCTIWo, PPC_INS_FCTIW, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FDIV, PPC_INS_FDIV, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FDIVS, PPC_INS_FDIVS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FDIVSo, PPC_INS_FDIVS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FDIVo, PPC_INS_FDIV, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMADD, PPC_INS_FMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMADDS, PPC_INS_FMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMADDSo, PPC_INS_FMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMADDo, PPC_INS_FMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMR, PPC_INS_FMR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMRo, PPC_INS_FMR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMSUB, PPC_INS_FMSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMSUBS, PPC_INS_FMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMSUBSo, PPC_INS_FMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMSUBo, PPC_INS_FMSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMUL, PPC_INS_FMUL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMULS, PPC_INS_FMULS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FMULSo, PPC_INS_FMULS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FMULo, PPC_INS_FMUL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNABSD, PPC_INS_FNABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNABSDo, PPC_INS_FNABS, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNABSS, PPC_INS_FNABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNABSSo, PPC_INS_FNABS, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNEGD, PPC_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNEGDo, PPC_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNEGS, PPC_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNEGSo, PPC_INS_FNEG, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMADD, PPC_INS_FNMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMADDS, PPC_INS_FNMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMADDSo, PPC_INS_FNMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMADDo, PPC_INS_FNMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMSUB, PPC_INS_FNMSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMSUBS, PPC_INS_FNMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMSUBSo, PPC_INS_FNMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FNMSUBo, PPC_INS_FNMSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRE, PPC_INS_FRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRES, PPC_INS_FRES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRESo, PPC_INS_FRES, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FREo, PPC_INS_FRE, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIMD, PPC_INS_FRIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIMDo, PPC_INS_FRIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIMS, PPC_INS_FRIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIMSo, PPC_INS_FRIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIND, PPC_INS_FRIN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRINDo, PPC_INS_FRIN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRINS, PPC_INS_FRIN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRINSo, PPC_INS_FRIN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIPD, PPC_INS_FRIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIPDo, PPC_INS_FRIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIPS, PPC_INS_FRIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIPSo, PPC_INS_FRIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIZD, PPC_INS_FRIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIZDo, PPC_INS_FRIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIZS, PPC_INS_FRIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRIZSo, PPC_INS_FRIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRSP, PPC_INS_FRSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRSPo, PPC_INS_FRSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRSQRTE, PPC_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRSQRTES, PPC_INS_FRSQRTES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FRSQRTESo, PPC_INS_FRSQRTES, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FRSQRTEo, PPC_INS_FRSQRTE, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FSELD, PPC_INS_FSEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FSELDo, PPC_INS_FSEL, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FSELS, PPC_INS_FSEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FSELSo, PPC_INS_FSEL, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FSQRT, PPC_INS_FSQRT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FSQRTS, PPC_INS_FSQRTS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FSQRTSo, PPC_INS_FSQRTS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FSQRTo, PPC_INS_FSQRT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FSUB, PPC_INS_FSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FSUBS, PPC_INS_FSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_FSUBSo, PPC_INS_FSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_FSUBo, PPC_INS_FSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_ICBI, PPC_INS_ICBI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ICBT, PPC_INS_ICBT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ICBT, 0 }, 0, 0 #endif }, { PPC_ICCCI, PPC_INS_ICCCI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_ISEL, PPC_INS_ISEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ISEL8, PPC_INS_ISEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ISYNC, PPC_INS_ISYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LA, PPC_INS_LA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZ, PPC_INS_LBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZ8, PPC_INS_LBZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZCIX, PPC_INS_LBZCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZU, PPC_INS_LBZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZU8, PPC_INS_LBZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZUX, PPC_INS_LBZUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZUX8, PPC_INS_LBZUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZX, PPC_INS_LBZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LBZX8, PPC_INS_LBZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LD, PPC_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LDARX, PPC_INS_LDARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LDBRX, PPC_INS_LDBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LDCIX, PPC_INS_LDCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LDU, PPC_INS_LDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LDUX, PPC_INS_LDUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LDX, PPC_INS_LDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFD, PPC_INS_LFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFDU, PPC_INS_LFDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFDUX, PPC_INS_LFDUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFDX, PPC_INS_LFDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFIWAX, PPC_INS_LFIWAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFIWZX, PPC_INS_LFIWZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFS, PPC_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFSU, PPC_INS_LFSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFSUX, PPC_INS_LFSUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LFSX, PPC_INS_LFSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHA, PPC_INS_LHA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHA8, PPC_INS_LHA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHAU, PPC_INS_LHAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHAU8, PPC_INS_LHAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHAUX, PPC_INS_LHAUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHAUX8, PPC_INS_LHAUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHAX, PPC_INS_LHAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHAX8, PPC_INS_LHAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHBRX, PPC_INS_LHBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHBRX8, PPC_INS_LHBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZ, PPC_INS_LHZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZ8, PPC_INS_LHZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZCIX, PPC_INS_LHZCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZU, PPC_INS_LHZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZU8, PPC_INS_LHZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZUX, PPC_INS_LHZUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZUX8, PPC_INS_LHZUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZX, PPC_INS_LHZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LHZX8, PPC_INS_LHZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LI, PPC_INS_LI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LI8, PPC_INS_LI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LIS, PPC_INS_LIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LIS8, PPC_INS_LIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LMW, PPC_INS_LMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LSWI, PPC_INS_LSWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LVEBX, PPC_INS_LVEBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LVEHX, PPC_INS_LVEHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LVEWX, PPC_INS_LVEWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LVSL, PPC_INS_LVSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LVSR, PPC_INS_LVSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LVX, PPC_INS_LVX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LVXL, PPC_INS_LVXL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_LWA, PPC_INS_LWA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWARX, PPC_INS_LWARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWAUX, PPC_INS_LWAUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWAX, PPC_INS_LWAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWAX_32, PPC_INS_LWAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWA_32, PPC_INS_LWA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWBRX, PPC_INS_LWBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWBRX8, PPC_INS_LWBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZ, PPC_INS_LWZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZ8, PPC_INS_LWZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZCIX, PPC_INS_LWZCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZU, PPC_INS_LWZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZU8, PPC_INS_LWZU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZUX, PPC_INS_LWZUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZUX8, PPC_INS_LWZUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZX, PPC_INS_LWZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LWZX8, PPC_INS_LWZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_LXSDX, PPC_INS_LXSDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_LXVD2X, PPC_INS_LXVD2X, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_LXVDSX, PPC_INS_LXVDSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_LXVW4X, PPC_INS_LXVW4X, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_MBAR, PPC_INS_MBAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_MCRF, PPC_INS_MCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MCRFS, PPC_INS_MCRFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFCR, PPC_INS_MFCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFCR8, PPC_INS_MFCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFCTR, PPC_INS_MFCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFCTR8, PPC_INS_MFCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFDCR, PPC_INS_MFDCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_MFFS, PPC_INS_MFFS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFFSo, PPC_INS_MFFS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0 #endif }, { PPC_MFLR, PPC_INS_MFLR, #ifndef CAPSTONE_DIET { PPC_REG_LR, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFLR8, PPC_INS_MFLR, #ifndef CAPSTONE_DIET { PPC_REG_LR8, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFMSR, PPC_INS_MFMSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFOCRF, PPC_INS_MFOCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFOCRF8, PPC_INS_MFOCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFSPR, PPC_INS_MFSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFSR, PPC_INS_MFSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFSRIN, PPC_INS_MFSRIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFTB, PPC_INS_MFTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFTB8, PPC_INS_MFSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFVRSAVE, PPC_INS_MFSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFVRSAVEv, PPC_INS_MFSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MFVSCR, PPC_INS_MFVSCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_MSYNC, PPC_INS_MSYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTCRF, PPC_INS_MTCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTCRF8, PPC_INS_MTCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTCTR, PPC_INS_MTCTR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTCTR8, PPC_INS_MTCTR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTCTR8loop, PPC_INS_MTCTR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTCTRloop, PPC_INS_MTCTR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTDCR, PPC_INS_MTDCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_MTFSB0, PPC_INS_MTFSB0, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTFSB1, PPC_INS_MTFSB1, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTFSF, PPC_INS_MTFSF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTFSFI, PPC_INS_MTFSFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTFSFIo, PPC_INS_MTFSFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTFSFb, PPC_INS_MTFSF, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTFSFo, PPC_INS_MTFSF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTLR, PPC_INS_MTLR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTLR8, PPC_INS_MTLR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0 #endif }, { PPC_MTMSR, PPC_INS_MTMSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTMSRD, PPC_INS_MTMSRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTOCRF, PPC_INS_MTOCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTOCRF8, PPC_INS_MTOCRF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTSPR, PPC_INS_MTSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTSR, PPC_INS_MTSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTSRIN, PPC_INS_MTSRIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTVRSAVE, PPC_INS_MTSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTVRSAVEv, PPC_INS_MTSPR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MTVSCR, PPC_INS_MTVSCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_MULHD, PPC_INS_MULHD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHDU, PPC_INS_MULHDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHDUo, PPC_INS_MULHDU, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHDo, PPC_INS_MULHD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHW, PPC_INS_MULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHWU, PPC_INS_MULHWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHWUo, PPC_INS_MULHWU, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_MULHWo, PPC_INS_MULHW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_MULLD, PPC_INS_MULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULLDo, PPC_INS_MULLD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_MULLI, PPC_INS_MULLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULLI8, PPC_INS_MULLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULLW, PPC_INS_MULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_MULLWo, PPC_INS_MULLW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_NAND, PPC_INS_NAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NAND8, PPC_INS_NAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NAND8o, PPC_INS_NAND, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_NANDo, PPC_INS_NAND, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_NEG, PPC_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NEG8, PPC_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NEG8o, PPC_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_NEGo, PPC_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_NOP, PPC_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NOP_GT_PWR6, PPC_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NOP_GT_PWR7, PPC_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NOR, PPC_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NOR8, PPC_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_NOR8o, PPC_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_NORo, PPC_INS_NOR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_OR, PPC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_OR8, PPC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_OR8o, PPC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ORC, PPC_INS_ORC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ORC8, PPC_INS_ORC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ORC8o, PPC_INS_ORC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ORCo, PPC_INS_ORC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_ORI, PPC_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ORI8, PPC_INS_ORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ORIS, PPC_INS_ORIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ORIS8, PPC_INS_ORIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_ORo, PPC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_POPCNTD, PPC_INS_POPCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_POPCNTW, PPC_INS_POPCNTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_QVALIGNI, PPC_INS_QVALIGNI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVALIGNIb, PPC_INS_QVALIGNI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVALIGNIs, PPC_INS_QVALIGNI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVESPLATI, PPC_INS_QVESPLATI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVESPLATIb, PPC_INS_QVESPLATI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVESPLATIs, PPC_INS_QVESPLATI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFABS, PPC_INS_QVFABS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFABSs, PPC_INS_QVFABS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFADD, PPC_INS_QVFADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFADDS, PPC_INS_QVFADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFADDSs, PPC_INS_QVFADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCFID, PPC_INS_QVFCFID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCFIDS, PPC_INS_QVFCFIDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCFIDU, PPC_INS_QVFCFIDU, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCFIDUS, PPC_INS_QVFCFIDUS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCFIDb, PPC_INS_QVFCFID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPEQ, PPC_INS_QVFCMPEQ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPEQb, PPC_INS_QVFCMPEQ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPEQbs, PPC_INS_QVFCMPEQ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPGT, PPC_INS_QVFCMPGT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPGTb, PPC_INS_QVFCMPGT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPGTbs, PPC_INS_QVFCMPGT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPLT, PPC_INS_QVFCMPLT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPLTb, PPC_INS_QVFCMPLT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCMPLTbs, PPC_INS_QVFCMPLT, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCPSGN, PPC_INS_QVFCPSGN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCPSGNs, PPC_INS_QVFCPSGN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTID, PPC_INS_QVFCTID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIDU, PPC_INS_QVFCTIDU, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIDUZ, PPC_INS_QVFCTIDUZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIDZ, PPC_INS_QVFCTIDZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIDb, PPC_INS_QVFCTID, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIW, PPC_INS_QVFCTIW, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIWU, PPC_INS_QVFCTIWU, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIWUZ, PPC_INS_QVFCTIWUZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFCTIWZ, PPC_INS_QVFCTIWZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFLOGICAL, PPC_INS_QVFLOGICAL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFLOGICALb, PPC_INS_QVFLOGICAL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFLOGICALs, PPC_INS_QVFLOGICAL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMADD, PPC_INS_QVFMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMADDS, PPC_INS_QVFMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMADDSs, PPC_INS_QVFMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMR, PPC_INS_QVFMR, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMRb, PPC_INS_QVFMR, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMRs, PPC_INS_QVFMR, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMSUB, PPC_INS_QVFMSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMSUBS, PPC_INS_QVFMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMSUBSs, PPC_INS_QVFMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMUL, PPC_INS_QVFMUL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMULS, PPC_INS_QVFMULS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFMULSs, PPC_INS_QVFMULS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNABS, PPC_INS_QVFNABS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNABSs, PPC_INS_QVFNABS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNEG, PPC_INS_QVFNEG, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNEGs, PPC_INS_QVFNEG, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNMADD, PPC_INS_QVFNMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNMADDS, PPC_INS_QVFNMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNMADDSs, PPC_INS_QVFNMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNMSUB, PPC_INS_QVFNMSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNMSUBS, PPC_INS_QVFNMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFNMSUBSs, PPC_INS_QVFNMSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFPERM, PPC_INS_QVFPERM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFPERMs, PPC_INS_QVFPERM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRE, PPC_INS_QVFRE, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRES, PPC_INS_QVFRES, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRESs, PPC_INS_QVFRES, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIM, PPC_INS_QVFRIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIMs, PPC_INS_QVFRIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIN, PPC_INS_QVFRIN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRINs, PPC_INS_QVFRIN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIP, PPC_INS_QVFRIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIPs, PPC_INS_QVFRIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIZ, PPC_INS_QVFRIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRIZs, PPC_INS_QVFRIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRSP, PPC_INS_QVFRSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRSPs, PPC_INS_QVFRSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRSQRTE, PPC_INS_QVFRSQRTE, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRSQRTES, PPC_INS_QVFRSQRTES, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFRSQRTESs, PPC_INS_QVFRSQRTES, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSEL, PPC_INS_QVFSEL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSELb, PPC_INS_QVFSEL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSELbb, PPC_INS_QVFSEL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSELbs, PPC_INS_QVFSEL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSUB, PPC_INS_QVFSUB, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSUBS, PPC_INS_QVFSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFSUBSs, PPC_INS_QVFSUBS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFTSTNAN, PPC_INS_QVFTSTNAN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFTSTNANb, PPC_INS_QVFTSTNAN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFTSTNANbs, PPC_INS_QVFTSTNAN, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXMADD, PPC_INS_QVFXMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXMADDS, PPC_INS_QVFXMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXMUL, PPC_INS_QVFXMUL, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXMULS, PPC_INS_QVFXMULS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXXCPNMADD, PPC_INS_QVFXXCPNMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXXCPNMADDS, PPC_INS_QVFXXCPNMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXXMADD, PPC_INS_QVFXXMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXXMADDS, PPC_INS_QVFXXMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXXNPMADD, PPC_INS_QVFXXNPMADD, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVFXXNPMADDS, PPC_INS_QVFXXNPMADDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVGPCI, PPC_INS_QVGPCI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCDUX, PPC_INS_QVLFCDUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCDUXA, PPC_INS_QVLFCDUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCDX, PPC_INS_QVLFCDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCDXA, PPC_INS_QVLFCDXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCSUX, PPC_INS_QVLFCSUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCSUXA, PPC_INS_QVLFCSUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCSX, PPC_INS_QVLFCSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCSXA, PPC_INS_QVLFCSXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFCSXs, PPC_INS_QVLFCSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFDUX, PPC_INS_QVLFDUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFDUXA, PPC_INS_QVLFDUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFDX, PPC_INS_QVLFDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFDXA, PPC_INS_QVLFDXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFDXb, PPC_INS_QVLFDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFIWAX, PPC_INS_QVLFIWAX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFIWAXA, PPC_INS_QVLFIWAXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFIWZX, PPC_INS_QVLFIWZX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFIWZXA, PPC_INS_QVLFIWZXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFSUX, PPC_INS_QVLFSUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFSUXA, PPC_INS_QVLFSUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFSX, PPC_INS_QVLFSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFSXA, PPC_INS_QVLFSXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFSXb, PPC_INS_QVLFSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLFSXs, PPC_INS_QVLFSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLPCLDX, PPC_INS_QVLPCLDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLPCLSX, PPC_INS_QVLPCLSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLPCLSXint, PPC_INS_QVLPCLSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLPCRDX, PPC_INS_QVLPCRDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVLPCRSX, PPC_INS_QVLPCRSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDUX, PPC_INS_QVSTFCDUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDUXA, PPC_INS_QVSTFCDUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDUXI, PPC_INS_QVSTFCDUXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDUXIA, PPC_INS_QVSTFCDUXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDX, PPC_INS_QVSTFCDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDXA, PPC_INS_QVSTFCDXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDXI, PPC_INS_QVSTFCDXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCDXIA, PPC_INS_QVSTFCDXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSUX, PPC_INS_QVSTFCSUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSUXA, PPC_INS_QVSTFCSUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSUXI, PPC_INS_QVSTFCSUXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSUXIA, PPC_INS_QVSTFCSUXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSX, PPC_INS_QVSTFCSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSXA, PPC_INS_QVSTFCSXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSXI, PPC_INS_QVSTFCSXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSXIA, PPC_INS_QVSTFCSXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFCSXs, PPC_INS_QVSTFCSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDUX, PPC_INS_QVSTFDUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDUXA, PPC_INS_QVSTFDUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDUXI, PPC_INS_QVSTFDUXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDUXIA, PPC_INS_QVSTFDUXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDX, PPC_INS_QVSTFDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDXA, PPC_INS_QVSTFDXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDXI, PPC_INS_QVSTFDXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDXIA, PPC_INS_QVSTFDXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFDXb, PPC_INS_QVSTFDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFIWX, PPC_INS_QVSTFIWX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFIWXA, PPC_INS_QVSTFIWXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSUX, PPC_INS_QVSTFSUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSUXA, PPC_INS_QVSTFSUXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSUXI, PPC_INS_QVSTFSUXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSUXIA, PPC_INS_QVSTFSUXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSUXs, PPC_INS_QVSTFSUX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSX, PPC_INS_QVSTFSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSXA, PPC_INS_QVSTFSXA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSXI, PPC_INS_QVSTFSXI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSXIA, PPC_INS_QVSTFSXIA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_QVSTFSXs, PPC_INS_QVSTFSX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0 #endif }, { PPC_RFCI, PPC_INS_RFCI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_RFDI, PPC_INS_RFDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_E500, 0 }, 0, 0 #endif }, { PPC_RFI, PPC_INS_RFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_RFID, PPC_INS_RFID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RFMCI, PPC_INS_RFMCI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_E500, 0 }, 0, 0 #endif }, { PPC_RLDCL, PPC_INS_RLDCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDCLo, PPC_INS_RLDCL, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDCR, PPC_INS_RLDCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDCRo, PPC_INS_RLDCR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDIC, PPC_INS_RLDIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDICL, PPC_INS_RLDICL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDICL_32_64, PPC_INS_RLDICL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDICLo, PPC_INS_RLDICL, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDICR, PPC_INS_RLDICR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDICRo, PPC_INS_RLDICR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDICo, PPC_INS_RLDIC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDIMI, PPC_INS_RLDIMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLDIMIo, PPC_INS_RLDIMI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWIMI, PPC_INS_RLWIMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWIMI8, PPC_INS_RLWIMI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWIMI8o, PPC_INS_RLWIMI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWIMIo, PPC_INS_RLWIMI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWINM, PPC_INS_RLWINM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWINM8, PPC_INS_RLWINM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWINM8o, PPC_INS_RLWINM, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWINMo, PPC_INS_RLWINM, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWNM, PPC_INS_RLWNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWNM8, PPC_INS_RLWNM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWNM8o, PPC_INS_RLWNM, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_RLWNMo, PPC_INS_RLWNM, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SC, PPC_INS_SC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLBIA, PPC_INS_SLBIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLBIE, PPC_INS_SLBIE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLBMFEE, PPC_INS_SLBMFEE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLBMTE, PPC_INS_SLBMTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLD, PPC_INS_SLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLDo, PPC_INS_SLD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SLW, PPC_INS_SLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLW8, PPC_INS_SLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SLW8o, PPC_INS_SLW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SLWo, PPC_INS_SLW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRAD, PPC_INS_SRAD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRADI, PPC_INS_SRADI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRADIo, PPC_INS_SRADI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRADo, PPC_INS_SRAD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRAW, PPC_INS_SRAW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRAWI, PPC_INS_SRAWI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRAWIo, PPC_INS_SRAWI, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRAWo, PPC_INS_SRAW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRD, PPC_INS_SRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SRDo, PPC_INS_SRD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRW, PPC_INS_SRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SRW8, PPC_INS_SRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SRW8o, PPC_INS_SRW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SRWo, PPC_INS_SRW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_STB, PPC_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STB8, PPC_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBCIX, PPC_INS_STBCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBU, PPC_INS_STBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBU8, PPC_INS_STBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBUX, PPC_INS_STBUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBUX8, PPC_INS_STBUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBX, PPC_INS_STBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STBX8, PPC_INS_STBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STD, PPC_INS_STD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STDBRX, PPC_INS_STDBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STDCIX, PPC_INS_STDCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STDCX, PPC_INS_STDCX, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_STDU, PPC_INS_STDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STDUX, PPC_INS_STDUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STDX, PPC_INS_STDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFD, PPC_INS_STFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFDU, PPC_INS_STFDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFDUX, PPC_INS_STFDUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFDX, PPC_INS_STFDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFIWX, PPC_INS_STFIWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFS, PPC_INS_STFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFSU, PPC_INS_STFSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFSUX, PPC_INS_STFSUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STFSX, PPC_INS_STFSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STH, PPC_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STH8, PPC_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHBRX, PPC_INS_STHBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHCIX, PPC_INS_STHCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHU, PPC_INS_STHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHU8, PPC_INS_STHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHUX, PPC_INS_STHUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHUX8, PPC_INS_STHUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHX, PPC_INS_STHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STHX8, PPC_INS_STHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STMW, PPC_INS_STMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STSWI, PPC_INS_STSWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STVEBX, PPC_INS_STVEBX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_STVEHX, PPC_INS_STVEHX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_STVEWX, PPC_INS_STVEWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_STVX, PPC_INS_STVX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_STVXL, PPC_INS_STVXL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_STW, PPC_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STW8, PPC_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWBRX, PPC_INS_STWBRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWCIX, PPC_INS_STWCIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWCX, PPC_INS_STWCX, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_STWU, PPC_INS_STWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWU8, PPC_INS_STWU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWUX, PPC_INS_STWUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWUX8, PPC_INS_STWUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWX, PPC_INS_STWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STWX8, PPC_INS_STWX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_STXSDX, PPC_INS_STXSDX, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_STXVD2X, PPC_INS_STXVD2X, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_STXVW4X, PPC_INS_STXVW4X, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_SUBF, PPC_INS_SUBF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBF8, PPC_INS_SUBF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBF8o, PPC_INS_SUBF, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFC, PPC_INS_SUBFC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFC8, PPC_INS_SUBFC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFC8o, PPC_INS_SUBFC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFCo, PPC_INS_SUBFC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFE, PPC_INS_SUBFE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFE8, PPC_INS_SUBFE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFE8o, PPC_INS_SUBFE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFEo, PPC_INS_SUBFE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFIC, PPC_INS_SUBFIC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFIC8, PPC_INS_SUBFIC, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFME, PPC_INS_SUBFME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFME8, PPC_INS_SUBFME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFME8o, PPC_INS_SUBFME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFMEo, PPC_INS_SUBFME, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFZE, PPC_INS_SUBFZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFZE8, PPC_INS_SUBFZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFZE8o, PPC_INS_SUBFZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFZEo, PPC_INS_SUBFZE, #ifndef CAPSTONE_DIET { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SUBFo, PPC_INS_SUBF, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_SYNC, PPC_INS_SYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TAILB, PPC_INS_B, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_TAILB8, PPC_INS_B, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_TAILBA, PPC_INS_BA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_TAILBA8, PPC_INS_BA, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { PPC_TAILBCTR, PPC_INS_BCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE32, 0 }, 1, 1 #endif }, { PPC_TAILBCTR8, PPC_INS_BCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR8, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1 #endif }, { PPC_TD, PPC_INS_TD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TDI, PPC_INS_TDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TLBIA, PPC_INS_TLBIA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TLBIE, PPC_INS_TLBIE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TLBIEL, PPC_INS_TLBIEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TLBIVAX, PPC_INS_TLBIVAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_TLBLD, PPC_INS_TLBLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC6XX, 0 }, 0, 0 #endif }, { PPC_TLBLI, PPC_INS_TLBLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC6XX, 0 }, 0, 0 #endif }, { PPC_TLBRE, PPC_INS_TLBRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_TLBRE2, PPC_INS_TLBRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_TLBSX, PPC_INS_TLBSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_TLBSX2, PPC_INS_TLBSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_TLBSX2D, PPC_INS_TLBSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_TLBSYNC, PPC_INS_TLBSYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TLBWE, PPC_INS_TLBWE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_TLBWE2, PPC_INS_TLBWE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0 #endif }, { PPC_TRAP, PPC_INS_TRAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TW, PPC_INS_TW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_TWI, PPC_INS_TWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_VADDCUW, PPC_INS_VADDCUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDFP, PPC_INS_VADDFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDSBS, PPC_INS_VADDSBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDSHS, PPC_INS_VADDSHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDSWS, PPC_INS_VADDSWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUBM, PPC_INS_VADDUBM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUBS, PPC_INS_VADDUBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUDM, PPC_INS_VADDUDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUHM, PPC_INS_VADDUHM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUHS, PPC_INS_VADDUHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUWM, PPC_INS_VADDUWM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VADDUWS, PPC_INS_VADDUWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAND, PPC_INS_VAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VANDC, PPC_INS_VANDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAVGSB, PPC_INS_VAVGSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAVGSH, PPC_INS_VAVGSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAVGSW, PPC_INS_VAVGSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAVGUB, PPC_INS_VAVGUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAVGUH, PPC_INS_VAVGUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VAVGUW, PPC_INS_VAVGUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCFSX, PPC_INS_VCFSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCFSX_0, PPC_INS_VCFSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCFUX, PPC_INS_VCFUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCFUX_0, PPC_INS_VCFUX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCLZB, PPC_INS_VCLZB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCLZD, PPC_INS_VCLZD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCLZH, PPC_INS_VCLZH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCLZW, PPC_INS_VCLZW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPBFP, PPC_INS_VCMPBFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPBFPo, PPC_INS_VCMPBFP, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQFP, PPC_INS_VCMPEQFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQFPo, PPC_INS_VCMPEQFP, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUB, PPC_INS_VCMPEQUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUBo, PPC_INS_VCMPEQUB, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUD, PPC_INS_VCMPEQUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUDo, PPC_INS_VCMPEQUD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUH, PPC_INS_VCMPEQUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUHo, PPC_INS_VCMPEQUH, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUW, PPC_INS_VCMPEQUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPEQUWo, PPC_INS_VCMPEQUW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGEFP, PPC_INS_VCMPGEFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGEFPo, PPC_INS_VCMPGEFP, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTFP, PPC_INS_VCMPGTFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTFPo, PPC_INS_VCMPGTFP, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSB, PPC_INS_VCMPGTSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSBo, PPC_INS_VCMPGTSB, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSD, PPC_INS_VCMPGTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSDo, PPC_INS_VCMPGTSD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSH, PPC_INS_VCMPGTSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSHo, PPC_INS_VCMPGTSH, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSW, PPC_INS_VCMPGTSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTSWo, PPC_INS_VCMPGTSW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUB, PPC_INS_VCMPGTUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUBo, PPC_INS_VCMPGTUB, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUD, PPC_INS_VCMPGTUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUDo, PPC_INS_VCMPGTUD, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUH, PPC_INS_VCMPGTUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUHo, PPC_INS_VCMPGTUH, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUW, PPC_INS_VCMPGTUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCMPGTUWo, PPC_INS_VCMPGTUW, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCTSXS, PPC_INS_VCTSXS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCTSXS_0, PPC_INS_VCTSXS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCTUXS, PPC_INS_VCTUXS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VCTUXS_0, PPC_INS_VCTUXS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VEQV, PPC_INS_VEQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VEXPTEFP, PPC_INS_VEXPTEFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VLOGEFP, PPC_INS_VLOGEFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMADDFP, PPC_INS_VMADDFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXFP, PPC_INS_VMAXFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXSB, PPC_INS_VMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXSD, PPC_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXSH, PPC_INS_VMAXSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXSW, PPC_INS_VMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXUB, PPC_INS_VMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXUD, PPC_INS_VMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXUH, PPC_INS_VMAXUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMAXUW, PPC_INS_VMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMHADDSHS, PPC_INS_VMHADDSHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMHRADDSHS, PPC_INS_VMHRADDSHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMIDUD, PPC_INS_VMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINFP, PPC_INS_VMINFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINSB, PPC_INS_VMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINSD, PPC_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINSH, PPC_INS_VMINSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINSW, PPC_INS_VMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINUB, PPC_INS_VMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINUH, PPC_INS_VMINUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMINUW, PPC_INS_VMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMLADDUHM, PPC_INS_VMLADDUHM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMRGHB, PPC_INS_VMRGHB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMRGHH, PPC_INS_VMRGHH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMRGHW, PPC_INS_VMRGHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMRGLB, PPC_INS_VMRGLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMRGLH, PPC_INS_VMRGLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMRGLW, PPC_INS_VMRGLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMSUMMBM, PPC_INS_VMSUMMBM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMSUMSHM, PPC_INS_VMSUMSHM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMSUMSHS, PPC_INS_VMSUMSHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMSUMUBM, PPC_INS_VMSUMUBM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMSUMUHM, PPC_INS_VMSUMUHM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMSUMUHS, PPC_INS_VMSUMUHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULESB, PPC_INS_VMULESB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULESH, PPC_INS_VMULESH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULESW, PPC_INS_VMULESW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULEUB, PPC_INS_VMULEUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULEUH, PPC_INS_VMULEUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULEUW, PPC_INS_VMULEUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULOSB, PPC_INS_VMULOSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULOSH, PPC_INS_VMULOSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULOSW, PPC_INS_VMULOSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULOUB, PPC_INS_VMULOUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULOUH, PPC_INS_VMULOUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULOUW, PPC_INS_VMULOUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VMULUWM, PPC_INS_VMULUWM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VNAND, PPC_INS_VNAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VNMSUBFP, PPC_INS_VNMSUBFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VNOR, PPC_INS_VNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VOR, PPC_INS_VOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VORC, PPC_INS_VORC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPERM, PPC_INS_VPERM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKPX, PPC_INS_VPKPX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKSHSS, PPC_INS_VPKSHSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKSHUS, PPC_INS_VPKSHUS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKSWSS, PPC_INS_VPKSWSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKSWUS, PPC_INS_VPKSWUS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKUHUM, PPC_INS_VPKUHUM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKUHUS, PPC_INS_VPKUHUS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKUWUM, PPC_INS_VPKUWUM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPKUWUS, PPC_INS_VPKUWUS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPOPCNTB, PPC_INS_VPOPCNTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPOPCNTD, PPC_INS_VPOPCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPOPCNTH, PPC_INS_VPOPCNTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VPOPCNTW, PPC_INS_VPOPCNTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VREFP, PPC_INS_VREFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRFIM, PPC_INS_VRFIM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRFIN, PPC_INS_VRFIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRFIP, PPC_INS_VRFIP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRFIZ, PPC_INS_VRFIZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRLB, PPC_INS_VRLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRLD, PPC_INS_VRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRLH, PPC_INS_VRLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRLW, PPC_INS_VRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VRSQRTEFP, PPC_INS_VRSQRTEFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSEL, PPC_INS_VSEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSL, PPC_INS_VSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSLB, PPC_INS_VSLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSLD, PPC_INS_VSLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSLDOI, PPC_INS_VSLDOI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSLH, PPC_INS_VSLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSLO, PPC_INS_VSLO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSLW, PPC_INS_VSLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSPLTB, PPC_INS_VSPLTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSPLTH, PPC_INS_VSPLTH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSPLTISB, PPC_INS_VSPLTISB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSPLTISH, PPC_INS_VSPLTISH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSPLTISW, PPC_INS_VSPLTISW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSPLTW, PPC_INS_VSPLTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSR, PPC_INS_VSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRAB, PPC_INS_VSRAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRAD, PPC_INS_VSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRAH, PPC_INS_VSRAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRAW, PPC_INS_VSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRB, PPC_INS_VSRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRD, PPC_INS_VSRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRH, PPC_INS_VSRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRO, PPC_INS_VSRO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSRW, PPC_INS_VSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBCUW, PPC_INS_VSUBCUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBFP, PPC_INS_VSUBFP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBSBS, PPC_INS_VSUBSBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBSHS, PPC_INS_VSUBSHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBSWS, PPC_INS_VSUBSWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUBM, PPC_INS_VSUBUBM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUBS, PPC_INS_VSUBUBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUDM, PPC_INS_VSUBUDM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUHM, PPC_INS_VSUBUHM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUHS, PPC_INS_VSUBUHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUWM, PPC_INS_VSUBUWM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUBUWS, PPC_INS_VSUBUWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUM2SWS, PPC_INS_VSUM2SWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUM4SBS, PPC_INS_VSUM4SBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUM4SHS, PPC_INS_VSUM4SHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUM4UBS, PPC_INS_VSUM4UBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VSUMSWS, PPC_INS_VSUMSWS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VUPKHPX, PPC_INS_VUPKHPX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VUPKHSB, PPC_INS_VUPKHSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VUPKHSH, PPC_INS_VUPKHSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VUPKLPX, PPC_INS_VUPKLPX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VUPKLSB, PPC_INS_VUPKLSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VUPKLSH, PPC_INS_VUPKLSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_VXOR, PPC_INS_VXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_V_SET0, PPC_INS_VXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_V_SET0B, PPC_INS_VXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_V_SET0H, PPC_INS_VXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_V_SETALLONES, PPC_INS_VSPLTISW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_V_SETALLONESB, PPC_INS_VSPLTISW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_V_SETALLONESH, PPC_INS_VSPLTISW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0 #endif }, { PPC_WAIT, PPC_INS_WAIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_WRTEE, PPC_INS_WRTEE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_WRTEEI, PPC_INS_WRTEEI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0 #endif }, { PPC_XOR, PPC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_XOR8, PPC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_XOR8o, PPC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_XORI, PPC_INS_XORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_XORI8, PPC_INS_XORI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_XORIS, PPC_INS_XORIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_XORIS8, PPC_INS_XORIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { PPC_XORo, PPC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0 #endif }, { PPC_XSABSDP, PPC_INS_XSABSDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSADDDP, PPC_INS_XSADDDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCMPODP, PPC_INS_XSCMPODP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCMPUDP, PPC_INS_XSCMPUDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCPSGNDP, PPC_INS_XSCPSGNDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVDPSP, PPC_INS_XSCVDPSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVDPSXDS, PPC_INS_XSCVDPSXDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVDPSXWS, PPC_INS_XSCVDPSXWS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVDPUXDS, PPC_INS_XSCVDPUXDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVDPUXWS, PPC_INS_XSCVDPUXWS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVSPDP, PPC_INS_XSCVSPDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVSXDDP, PPC_INS_XSCVSXDDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSCVUXDDP, PPC_INS_XSCVUXDDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSDIVDP, PPC_INS_XSDIVDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMADDADP, PPC_INS_XSMADDADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMADDMDP, PPC_INS_XSMADDMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMAXDP, PPC_INS_XSMAXDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMINDP, PPC_INS_XSMINDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMSUBADP, PPC_INS_XSMSUBADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMSUBMDP, PPC_INS_XSMSUBMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSMULDP, PPC_INS_XSMULDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSNABSDP, PPC_INS_XSNABSDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSNEGDP, PPC_INS_XSNEGDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSNMADDADP, PPC_INS_XSNMADDADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSNMADDMDP, PPC_INS_XSNMADDMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSNMSUBADP, PPC_INS_XSNMSUBADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSNMSUBMDP, PPC_INS_XSNMSUBMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSRDPI, PPC_INS_XSRDPI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSRDPIC, PPC_INS_XSRDPIC, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSRDPIM, PPC_INS_XSRDPIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSRDPIP, PPC_INS_XSRDPIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSRDPIZ, PPC_INS_XSRDPIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSREDP, PPC_INS_XSREDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSRSQRTEDP, PPC_INS_XSRSQRTEDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSSQRTDP, PPC_INS_XSSQRTDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSSUBDP, PPC_INS_XSSUBDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSTDIVDP, PPC_INS_XSTDIVDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XSTSQRTDP, PPC_INS_XSTSQRTDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVABSDP, PPC_INS_XVABSDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVABSSP, PPC_INS_XVABSSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVADDDP, PPC_INS_XVADDDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVADDSP, PPC_INS_XVADDSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPEQDP, PPC_INS_XVCMPEQDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPEQDPo, PPC_INS_XVCMPEQDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPEQSP, PPC_INS_XVCMPEQSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPEQSPo, PPC_INS_XVCMPEQSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGEDP, PPC_INS_XVCMPGEDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGEDPo, PPC_INS_XVCMPGEDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGESP, PPC_INS_XVCMPGESP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGESPo, PPC_INS_XVCMPGESP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGTDP, PPC_INS_XVCMPGTDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGTDPo, PPC_INS_XVCMPGTDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGTSP, PPC_INS_XVCMPGTSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCMPGTSPo, PPC_INS_XVCMPGTSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCPSGNDP, PPC_INS_XVCPSGNDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCPSGNSP, PPC_INS_XVCPSGNSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVDPSP, PPC_INS_XVCVDPSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVDPSXDS, PPC_INS_XVCVDPSXDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVDPSXWS, PPC_INS_XVCVDPSXWS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVDPUXDS, PPC_INS_XVCVDPUXDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVDPUXWS, PPC_INS_XVCVDPUXWS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSPDP, PPC_INS_XVCVSPDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSPSXDS, PPC_INS_XVCVSPSXDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSPSXWS, PPC_INS_XVCVSPSXWS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSPUXDS, PPC_INS_XVCVSPUXDS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSPUXWS, PPC_INS_XVCVSPUXWS, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSXDDP, PPC_INS_XVCVSXDDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSXDSP, PPC_INS_XVCVSXDSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSXWDP, PPC_INS_XVCVSXWDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVSXWSP, PPC_INS_XVCVSXWSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVUXDDP, PPC_INS_XVCVUXDDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVUXDSP, PPC_INS_XVCVUXDSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVUXWDP, PPC_INS_XVCVUXWDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVCVUXWSP, PPC_INS_XVCVUXWSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVDIVDP, PPC_INS_XVDIVDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVDIVSP, PPC_INS_XVDIVSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMADDADP, PPC_INS_XVMADDADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMADDASP, PPC_INS_XVMADDASP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMADDMDP, PPC_INS_XVMADDMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMADDMSP, PPC_INS_XVMADDMSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMAXDP, PPC_INS_XVMAXDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMAXSP, PPC_INS_XVMAXSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMINDP, PPC_INS_XVMINDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMINSP, PPC_INS_XVMINSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMSUBADP, PPC_INS_XVMSUBADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMSUBASP, PPC_INS_XVMSUBASP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMSUBMDP, PPC_INS_XVMSUBMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMSUBMSP, PPC_INS_XVMSUBMSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMULDP, PPC_INS_XVMULDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVMULSP, PPC_INS_XVMULSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNABSDP, PPC_INS_XVNABSDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNABSSP, PPC_INS_XVNABSSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNEGDP, PPC_INS_XVNEGDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNEGSP, PPC_INS_XVNEGSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMADDADP, PPC_INS_XVNMADDADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMADDASP, PPC_INS_XVNMADDASP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMADDMDP, PPC_INS_XVNMADDMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMADDMSP, PPC_INS_XVNMADDMSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMSUBADP, PPC_INS_XVNMSUBADP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMSUBASP, PPC_INS_XVNMSUBASP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMSUBMDP, PPC_INS_XVNMSUBMDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVNMSUBMSP, PPC_INS_XVNMSUBMSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRDPI, PPC_INS_XVRDPI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRDPIC, PPC_INS_XVRDPIC, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRDPIM, PPC_INS_XVRDPIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRDPIP, PPC_INS_XVRDPIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRDPIZ, PPC_INS_XVRDPIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVREDP, PPC_INS_XVREDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRESP, PPC_INS_XVRESP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSPI, PPC_INS_XVRSPI, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSPIC, PPC_INS_XVRSPIC, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSPIM, PPC_INS_XVRSPIM, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSPIP, PPC_INS_XVRSPIP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSPIZ, PPC_INS_XVRSPIZ, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSQRTEDP, PPC_INS_XVRSQRTEDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVRSQRTESP, PPC_INS_XVRSQRTESP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVSQRTDP, PPC_INS_XVSQRTDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVSQRTSP, PPC_INS_XVSQRTSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVSUBDP, PPC_INS_XVSUBDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVSUBSP, PPC_INS_XVSUBSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVTDIVDP, PPC_INS_XVTDIVDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVTDIVSP, PPC_INS_XVTDIVSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVTSQRTDP, PPC_INS_XVTSQRTDP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XVTSQRTSP, PPC_INS_XVTSQRTSP, #ifndef CAPSTONE_DIET { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXLAND, PPC_INS_XXLAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXLANDC, PPC_INS_XXLANDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXLEQV, PPC_INS_XXLEQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0 #endif }, { PPC_XXLNAND, PPC_INS_XXLNAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0 #endif }, { PPC_XXLNOR, PPC_INS_XXLNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXLOR, PPC_INS_XXLOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXLORC, PPC_INS_XXLORC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0 #endif }, { PPC_XXLORf, PPC_INS_XXLOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXLXOR, PPC_INS_XXLXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXMRGHW, PPC_INS_XXMRGHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXMRGLW, PPC_INS_XXMRGLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXPERMDI, PPC_INS_XXPERMDI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXSEL, PPC_INS_XXSEL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXSLDWI, PPC_INS_XXSLDWI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_XXSPLTW, PPC_INS_XXSPLTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0 #endif }, { PPC_gBC, PPC_INS_BC, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCA, PPC_INS_BCA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCCTR, PPC_INS_BCCTR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCCTRL, PPC_INS_BCCTRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCL, PPC_INS_BCL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCLA, PPC_INS_BCLA, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCLR, PPC_INS_BCLR, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, { PPC_gBCLRL, PPC_INS_BCLRL, #ifndef CAPSTONE_DIET { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/PowerPC/PPCModule.c010066400017500001750000000016641363402546700204710ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_POWERPC #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "PPCDisassembler.h" #include "PPCInstPrinter.h" #include "PPCMapping.h" #include "PPCModule.h" cs_err PPC_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = (MCRegisterInfo *) cs_mem_malloc(sizeof(*mri)); PPC_init(mri); ud->printer = PPC_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = PPC_getInstruction; ud->post_printer = PPC_post_printer; ud->reg_name = PPC_reg_name; ud->insn_id = PPC_get_insn_id; ud->insn_name = PPC_insn_name; ud->group_name = PPC_group_name; return CS_ERR_OK; } cs_err PPC_option(cs_struct *handle, cs_opt_type type, size_t value) { if (type == CS_OPT_SYNTAX) handle->syntax = (int) value; if (type == CS_OPT_MODE) { handle->mode = (cs_mode)value; } return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCModule.h010066400017500001750000000004411363402546700204660ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_POWERPC_MODULE_H #define CS_POWERPC_MODULE_H #include "../../utils.h" cs_err PPC_global_init(cs_struct *ud); cs_err PPC_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/PowerPC/PPCPredicates.h010066400017500001750000000042031363402546700213240ustar0000000000000000//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file describes the PowerPC branch predicates. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_POWERPC_PPCPREDICATES_H #define CS_POWERPC_PPCPREDICATES_H #include "capstone/ppc.h" // NOTE: duplicate of ppc_bc in ppc.h to maitain code compatibility with LLVM typedef enum ppc_predicate { PPC_PRED_LT = (0 << 5) | 12, PPC_PRED_LE = (1 << 5) | 4, PPC_PRED_EQ = (2 << 5) | 12, PPC_PRED_GE = (0 << 5) | 4, PPC_PRED_GT = (1 << 5) | 12, PPC_PRED_NE = (2 << 5) | 4, PPC_PRED_UN = (3 << 5) | 12, PPC_PRED_NU = (3 << 5) | 4, PPC_PRED_LT_MINUS = (0 << 5) | 14, PPC_PRED_LE_MINUS = (1 << 5) | 6, PPC_PRED_EQ_MINUS = (2 << 5) | 14, PPC_PRED_GE_MINUS = (0 << 5) | 6, PPC_PRED_GT_MINUS = (1 << 5) | 14, PPC_PRED_NE_MINUS = (2 << 5) | 6, PPC_PRED_UN_MINUS = (3 << 5) | 14, PPC_PRED_NU_MINUS = (3 << 5) | 6, PPC_PRED_LT_PLUS = (0 << 5) | 15, PPC_PRED_LE_PLUS = (1 << 5) | 7, PPC_PRED_EQ_PLUS = (2 << 5) | 15, PPC_PRED_GE_PLUS = (0 << 5) | 7, PPC_PRED_GT_PLUS = (1 << 5) | 15, PPC_PRED_NE_PLUS = (2 << 5) | 7, PPC_PRED_UN_PLUS = (3 << 5) | 15, PPC_PRED_NU_PLUS = (3 << 5) | 7, // When dealing with individual condition-register bits, we have simple set // and unset predicates. PPC_PRED_BIT_SET = 1024, PPC_PRED_BIT_UNSET = 1025 } ppc_predicate; /// Invert the specified predicate. != -> ==, < -> >=. ppc_predicate InvertPredicate(ppc_predicate Opcode); /// Assume the condition register is set by MI(a,b), return the predicate if /// we modify the instructions such that condition register is set by MI(b,a). ppc_predicate getSwappedPredicate(ppc_predicate Opcode); #endif capstone-sys-0.11.0/capstone/arch/Sparc/Sparc.h010066400017500001750000000040041363402546700174760ustar0000000000000000//===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the entry points for global functions defined in the LLVM // Sparc back-end. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SPARC_TARGET_SPARC_H #define CS_SPARC_TARGET_SPARC_H #include "capstone/sparc.h" inline static const char *SPARCCondCodeToString(sparc_cc CC) { switch (CC) { default: return NULL; // unreachable case SPARC_CC_ICC_A: return "a"; case SPARC_CC_ICC_N: return "n"; case SPARC_CC_ICC_NE: return "ne"; case SPARC_CC_ICC_E: return "e"; case SPARC_CC_ICC_G: return "g"; case SPARC_CC_ICC_LE: return "le"; case SPARC_CC_ICC_GE: return "ge"; case SPARC_CC_ICC_L: return "l"; case SPARC_CC_ICC_GU: return "gu"; case SPARC_CC_ICC_LEU: return "leu"; case SPARC_CC_ICC_CC: return "cc"; case SPARC_CC_ICC_CS: return "cs"; case SPARC_CC_ICC_POS: return "pos"; case SPARC_CC_ICC_NEG: return "neg"; case SPARC_CC_ICC_VC: return "vc"; case SPARC_CC_ICC_VS: return "vs"; case SPARC_CC_FCC_A: return "a"; case SPARC_CC_FCC_N: return "n"; case SPARC_CC_FCC_U: return "u"; case SPARC_CC_FCC_G: return "g"; case SPARC_CC_FCC_UG: return "ug"; case SPARC_CC_FCC_L: return "l"; case SPARC_CC_FCC_UL: return "ul"; case SPARC_CC_FCC_LG: return "lg"; case SPARC_CC_FCC_NE: return "ne"; case SPARC_CC_FCC_E: return "e"; case SPARC_CC_FCC_UE: return "ue"; case SPARC_CC_FCC_GE: return "ge"; case SPARC_CC_FCC_UGE: return "uge"; case SPARC_CC_FCC_LE: return "le"; case SPARC_CC_FCC_ULE: return "ule"; case SPARC_CC_FCC_O: return "o"; } } #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcDisassembler.c010066400017500001750000000313011363402546700220270ustar0000000000000000//===------ SparcDisassembler.cpp - Disassembler for PowerPC ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SPARC #include // DEBUG #include #include #include "../../cs_priv.h" #include "../../utils.h" #include "SparcDisassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" #include "../../MathExtras.h" #define GET_REGINFO_MC_DESC #define GET_REGINFO_ENUM #include "SparcGenRegisterInfo.inc" static const unsigned IntRegDecoderTable[] = { SP_G0, SP_G1, SP_G2, SP_G3, SP_G4, SP_G5, SP_G6, SP_G7, SP_O0, SP_O1, SP_O2, SP_O3, SP_O4, SP_O5, SP_O6, SP_O7, SP_L0, SP_L1, SP_L2, SP_L3, SP_L4, SP_L5, SP_L6, SP_L7, SP_I0, SP_I1, SP_I2, SP_I3, SP_I4, SP_I5, SP_I6, SP_I7 }; static const unsigned FPRegDecoderTable[] = { SP_F0, SP_F1, SP_F2, SP_F3, SP_F4, SP_F5, SP_F6, SP_F7, SP_F8, SP_F9, SP_F10, SP_F11, SP_F12, SP_F13, SP_F14, SP_F15, SP_F16, SP_F17, SP_F18, SP_F19, SP_F20, SP_F21, SP_F22, SP_F23, SP_F24, SP_F25, SP_F26, SP_F27, SP_F28, SP_F29, SP_F30, SP_F31 }; static const unsigned DFPRegDecoderTable[] = { SP_D0, SP_D16, SP_D1, SP_D17, SP_D2, SP_D18, SP_D3, SP_D19, SP_D4, SP_D20, SP_D5, SP_D21, SP_D6, SP_D22, SP_D7, SP_D23, SP_D8, SP_D24, SP_D9, SP_D25, SP_D10, SP_D26, SP_D11, SP_D27, SP_D12, SP_D28, SP_D13, SP_D29, SP_D14, SP_D30, SP_D15, SP_D31 }; static const unsigned QFPRegDecoderTable[] = { SP_Q0, SP_Q8, ~0U, ~0U, SP_Q1, SP_Q9, ~0U, ~0U, SP_Q2, SP_Q10, ~0U, ~0U, SP_Q3, SP_Q11, ~0U, ~0U, SP_Q4, SP_Q12, ~0U, ~0U, SP_Q5, SP_Q13, ~0U, ~0U, SP_Q6, SP_Q14, ~0U, ~0U, SP_Q7, SP_Q15, ~0U, ~0U }; static const unsigned FCCRegDecoderTable[] = { SP_FCC0, SP_FCC1, SP_FCC2, SP_FCC3 }; static uint64_t getFeatureBits(int mode) { // support everything return (uint64_t)-1; } static DecodeStatus DecodeIntRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = IntRegDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeI64RegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = IntRegDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeFPRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = FPRegDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeDFPRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = DFPRegDecoderTable[RegNo]; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeQFPRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 31) return MCDisassembler_Fail; Reg = QFPRegDecoderTable[RegNo]; if (Reg == ~0U) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeFCCRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { if (RegNo > 3) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, FCCRegDecoderTable[RegNo]); return MCDisassembler_Success; } static DecodeStatus DecodeLoadInt(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLoadFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLoadDFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLoadQFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeStoreInt(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeStoreFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeStoreDFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeStoreQFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeCall(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSIMM13(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeJMPL(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeReturn(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeSWAP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder); #define GET_SUBTARGETINFO_ENUM #include "SparcGenSubtargetInfo.inc" #include "SparcGenDisassemblerTables.inc" /// readInstruction - read four bytes and return 32 bit word. static DecodeStatus readInstruction32(const uint8_t *code, size_t len, uint32_t *Insn) { if (len < 4) // not enough data return MCDisassembler_Fail; // Encoded as a big-endian 32-bit word in the stream. *Insn = (code[3] << 0) | (code[2] << 8) | (code[1] << 16) | ((uint32_t) code[0] << 24); return MCDisassembler_Success; } bool Sparc_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *MI, uint16_t *size, uint64_t address, void *info) { uint32_t Insn; DecodeStatus Result; Result = readInstruction32(code, code_len, &Insn); if (Result == MCDisassembler_Fail) return false; if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, sparc)+sizeof(cs_sparc)); } Result = decodeInstruction_4(DecoderTableSparc32, MI, Insn, address, (MCRegisterInfo *)info, 0); if (Result != MCDisassembler_Fail) { *size = 4; return true; } return false; } typedef DecodeStatus (*DecodeFunc)(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeMem(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder, bool isLoad, DecodeFunc DecodeRD) { DecodeStatus status; unsigned rd = fieldFromInstruction_4(insn, 25, 5); unsigned rs1 = fieldFromInstruction_4(insn, 14, 5); bool isImm = fieldFromInstruction_4(insn, 13, 1) != 0; unsigned rs2 = 0; unsigned simm13 = 0; if (isImm) simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); else rs2 = fieldFromInstruction_4(insn, 0, 5); if (isLoad) { status = DecodeRD(MI, rd, Address, Decoder); if (status != MCDisassembler_Success) return status; } // Decode rs1. status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); if (status != MCDisassembler_Success) return status; // Decode imm|rs2. if (isImm) MCOperand_CreateImm0(MI, simm13); else { status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); if (status != MCDisassembler_Success) return status; } if (!isLoad) { status = DecodeRD(MI, rd, Address, Decoder); if (status != MCDisassembler_Success) return status; } return MCDisassembler_Success; } static DecodeStatus DecodeLoadInt(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, true, DecodeIntRegsRegisterClass); } static DecodeStatus DecodeLoadFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, true, DecodeFPRegsRegisterClass); } static DecodeStatus DecodeLoadDFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, true, DecodeDFPRegsRegisterClass); } static DecodeStatus DecodeLoadQFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, true, DecodeQFPRegsRegisterClass); } static DecodeStatus DecodeStoreInt(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, false, DecodeIntRegsRegisterClass); } static DecodeStatus DecodeStoreFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, false, DecodeFPRegsRegisterClass); } static DecodeStatus DecodeStoreDFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, false, DecodeDFPRegsRegisterClass); } static DecodeStatus DecodeStoreQFP(MCInst *Inst, unsigned insn, uint64_t Address, const void *Decoder) { return DecodeMem(Inst, insn, Address, Decoder, false, DecodeQFPRegsRegisterClass); } static DecodeStatus DecodeCall(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder) { unsigned tgt = fieldFromInstruction_4(insn, 0, 30); tgt <<= 2; MCOperand_CreateImm0(MI, tgt); return MCDisassembler_Success; } static DecodeStatus DecodeSIMM13(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder) { unsigned tgt = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); MCOperand_CreateImm0(MI, tgt); return MCDisassembler_Success; } static DecodeStatus DecodeJMPL(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder) { DecodeStatus status; unsigned rd = fieldFromInstruction_4(insn, 25, 5); unsigned rs1 = fieldFromInstruction_4(insn, 14, 5); unsigned isImm = fieldFromInstruction_4(insn, 13, 1); unsigned rs2 = 0; unsigned simm13 = 0; if (isImm) simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); else rs2 = fieldFromInstruction_4(insn, 0, 5); // Decode RD. status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder); if (status != MCDisassembler_Success) return status; // Decode RS1. status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); if (status != MCDisassembler_Success) return status; // Decode RS1 | SIMM13. if (isImm) MCOperand_CreateImm0(MI, simm13); else { status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); if (status != MCDisassembler_Success) return status; } return MCDisassembler_Success; } static DecodeStatus DecodeReturn(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder) { DecodeStatus status; unsigned rs1 = fieldFromInstruction_4(insn, 14, 5); unsigned isImm = fieldFromInstruction_4(insn, 13, 1); unsigned rs2 = 0; unsigned simm13 = 0; if (isImm) simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); else rs2 = fieldFromInstruction_4(insn, 0, 5); // Decode RS1. status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); if (status != MCDisassembler_Success) return status; // Decode RS2 | SIMM13. if (isImm) MCOperand_CreateImm0(MI, simm13); else { status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); if (status != MCDisassembler_Success) return status; } return MCDisassembler_Success; } static DecodeStatus DecodeSWAP(MCInst *MI, unsigned insn, uint64_t Address, const void *Decoder) { DecodeStatus status; unsigned rd = fieldFromInstruction_4(insn, 25, 5); unsigned rs1 = fieldFromInstruction_4(insn, 14, 5); unsigned isImm = fieldFromInstruction_4(insn, 13, 1); unsigned rs2 = 0; unsigned simm13 = 0; if (isImm) simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); else rs2 = fieldFromInstruction_4(insn, 0, 5); // Decode RD. status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder); if (status != MCDisassembler_Success) return status; // Decode RS1. status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); if (status != MCDisassembler_Success) return status; // Decode RS1 | SIMM13. if (isImm) MCOperand_CreateImm0(MI, simm13); else { status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); if (status != MCDisassembler_Success) return status; } return MCDisassembler_Success; } void Sparc_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(SparcRegDesc, 119, RA, PC, SparcMCRegisterClasses, 8, SparcRegUnitRoots, 86, SparcRegDiffLists, SparcRegStrings, SparcSubRegIdxLists, 7, SparcSubRegIdxRanges, SparcRegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, SparcRegDesc, 119, 0, 0, SparcMCRegisterClasses, 8, 0, 0, SparcRegDiffLists, 0, SparcSubRegIdxLists, 7, 0); } #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcDisassembler.h010066400017500001750000000006561363402546700220450ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SPARCDISASSEMBLER_H #define CS_SPARCDISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" void Sparc_init(MCRegisterInfo *MRI); bool Sparc_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcGenAsmWriter.inc010066400017500001750000006772341363402546700223350ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include // debug #include /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 2452U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 2445U, // BUNDLE 2462U, // LIFETIME_START 2432U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 4688U, // ADDCCri 4688U, // ADDCCrr 5925U, // ADDCri 5925U, // ADDCrr 4772U, // ADDEri 4772U, // ADDErr 4786U, // ADDXC 4678U, // ADDXCCC 4808U, // ADDXri 4808U, // ADDXrr 4808U, // ADDri 4808U, // ADDrr 74166U, // ADJCALLSTACKDOWN 74185U, // ADJCALLSTACKUP 5497U, // ALIGNADDR 5127U, // ALIGNADDRL 4695U, // ANDCCri 4695U, // ANDCCrr 4718U, // ANDNCCri 4718U, // ANDNCCrr 5182U, // ANDNri 5182U, // ANDNrr 5182U, // ANDXNrr 4876U, // ANDXri 4876U, // ANDXrr 4876U, // ANDri 4876U, // ANDrr 4502U, // ARRAY16 4255U, // ARRAY32 4526U, // ARRAY8 0U, // ATOMIC_LOAD_ADD_32 0U, // ATOMIC_LOAD_ADD_64 0U, // ATOMIC_LOAD_AND_32 0U, // ATOMIC_LOAD_AND_64 0U, // ATOMIC_LOAD_MAX_32 0U, // ATOMIC_LOAD_MAX_64 0U, // ATOMIC_LOAD_MIN_32 0U, // ATOMIC_LOAD_MIN_64 0U, // ATOMIC_LOAD_NAND_32 0U, // ATOMIC_LOAD_NAND_64 0U, // ATOMIC_LOAD_OR_32 0U, // ATOMIC_LOAD_OR_64 0U, // ATOMIC_LOAD_SUB_32 0U, // ATOMIC_LOAD_SUB_64 0U, // ATOMIC_LOAD_UMAX_32 0U, // ATOMIC_LOAD_UMAX_64 0U, // ATOMIC_LOAD_UMIN_32 0U, // ATOMIC_LOAD_UMIN_64 0U, // ATOMIC_LOAD_XOR_32 0U, // ATOMIC_LOAD_XOR_64 0U, // ATOMIC_SWAP_64 74271U, // BA 1194492U, // BCOND 1260028U, // BCONDA 17659U, // BINDri 17659U, // BINDrr 5065U, // BMASK 145915U, // BPFCC 211451U, // BPFCCA 276987U, // BPFCCANT 342523U, // BPFCCNT 2106465U, // BPGEZapn 2105838U, // BPGEZapt 2106532U, // BPGEZnapn 2107288U, // BPGEZnapt 2106489U, // BPGZapn 2105856U, // BPGZapt 2106552U, // BPGZnapn 2107384U, // BPGZnapt 1456636U, // BPICC 473596U, // BPICCA 539132U, // BPICCANT 604668U, // BPICCNT 2106477U, // BPLEZapn 2105847U, // BPLEZapt 2106542U, // BPLEZnapn 2107337U, // BPLEZnapt 2106500U, // BPLZapn 2105864U, // BPLZapt 2106561U, // BPLZnapn 2107428U, // BPLZnapt 2106511U, // BPNZapn 2105872U, // BPNZapt 2106570U, // BPNZnapn 2107472U, // BPNZnapt 1718780U, // BPXCC 735740U, // BPXCCA 801276U, // BPXCCANT 866812U, // BPXCCNT 2106522U, // BPZapn 2105880U, // BPZapt 2106579U, // BPZnapn 2107505U, // BPZnapt 4983U, // BSHUFFLE 74742U, // CALL 17398U, // CALLri 17398U, // CALLrr 924148U, // CASXrr 924129U, // CASrr 74001U, // CMASK16 73833U, // CMASK32 74150U, // CMASK8 2106607U, // CMPri 2106607U, // CMPrr 4332U, // EDGE16 5081U, // EDGE16L 5198U, // EDGE16LN 5165U, // EDGE16N 4164U, // EDGE32 5072U, // EDGE32L 5188U, // EDGE32LN 5156U, // EDGE32N 4511U, // EDGE8 5090U, // EDGE8L 5208U, // EDGE8LN 5174U, // EDGE8N 1053516U, // FABSD 1054031U, // FABSQ 1054376U, // FABSS 4813U, // FADDD 5383U, // FADDQ 5645U, // FADDS 4648U, // FALIGNADATA 4875U, // FAND 4112U, // FANDNOT1 5544U, // FANDNOT1S 4271U, // FANDNOT2 5591U, // FANDNOT2S 5677U, // FANDS 1194491U, // FBCOND 1260027U, // FBCONDA 4394U, // FCHKSM16 2106173U, // FCMPD 4413U, // FCMPEQ16 4226U, // FCMPEQ32 4432U, // FCMPGT16 4245U, // FCMPGT32 4340U, // FCMPLE16 4172U, // FCMPLE32 4350U, // FCMPNE16 4182U, // FCMPNE32 2106696U, // FCMPQ 2107005U, // FCMPS 4960U, // FDIVD 5475U, // FDIVQ 5815U, // FDIVS 5405U, // FDMULQ 1053620U, // FDTOI 1053996U, // FDTOQ 1054305U, // FDTOS 1054536U, // FDTOX 1053464U, // FEXPAND 4820U, // FHADDD 5652U, // FHADDS 4800U, // FHSUBD 5637U, // FHSUBS 1053473U, // FITOD 1054003U, // FITOQ 1054312U, // FITOS 6300484U, // FLCMPD 6301316U, // FLCMPS 2606U, // FLUSHW 4404U, // FMEAN16 1053543U, // FMOVD 1006078U, // FMOVD_FCC 23484926U, // FMOVD_ICC 23747070U, // FMOVD_XCC 1054058U, // FMOVQ 1006102U, // FMOVQ_FCC 23484950U, // FMOVQ_ICC 23747094U, // FMOVQ_XCC 6018U, // FMOVRGEZD 6029U, // FMOVRGEZQ 6056U, // FMOVRGEZS 6116U, // FMOVRGZD 6126U, // FMOVRGZQ 6150U, // FMOVRGZS 6067U, // FMOVRLEZD 6078U, // FMOVRLEZQ 6105U, // FMOVRLEZS 6160U, // FMOVRLZD 6170U, // FMOVRLZQ 6194U, // FMOVRLZS 6204U, // FMOVRNZD 6214U, // FMOVRNZQ 6238U, // FMOVRNZS 6009U, // FMOVRZD 6248U, // FMOVRZQ 6269U, // FMOVRZS 1054398U, // FMOVS 1006114U, // FMOVS_FCC 23484962U, // FMOVS_ICC 23747106U, // FMOVS_XCC 4490U, // FMUL8SUX16 4465U, // FMUL8ULX16 4442U, // FMUL8X16 5098U, // FMUL8X16AL 5849U, // FMUL8X16AU 4860U, // FMULD 4477U, // FMULD8SUX16 4452U, // FMULD8ULX16 5413U, // FMULQ 5714U, // FMULS 4837U, // FNADDD 5669U, // FNADDS 4881U, // FNAND 5684U, // FNANDS 1053429U, // FNEGD 1053974U, // FNEGQ 1054283U, // FNEGS 4828U, // FNHADDD 5660U, // FNHADDS 4828U, // FNMULD 5660U, // FNMULS 5513U, // FNOR 5778U, // FNORS 1052698U, // FNOT1 1054131U, // FNOT1S 1052857U, // FNOT2 1054178U, // FNOT2S 5660U, // FNSMULD 74625U, // FONE 75324U, // FONES 5508U, // FOR 4129U, // FORNOT1 5563U, // FORNOT1S 4288U, // FORNOT2 5610U, // FORNOT2S 5772U, // FORS 1052936U, // FPACK16 4192U, // FPACK32 1054507U, // FPACKFIX 4323U, // FPADD16 5620U, // FPADD16S 4155U, // FPADD32 5573U, // FPADD32S 4297U, // FPADD64 4974U, // FPMERGE 4314U, // FPSUB16 4580U, // FPSUB16S 4146U, // FPSUB32 4570U, // FPSUB32S 1053480U, // FQTOD 1053627U, // FQTOI 1054319U, // FQTOS 1054552U, // FQTOX 4423U, // FSLAS16 4236U, // FSLAS32 4378U, // FSLL16 4210U, // FSLL32 4867U, // FSMULD 1053523U, // FSQRTD 1054038U, // FSQRTQ 1054383U, // FSQRTS 4306U, // FSRA16 4138U, // FSRA32 1052681U, // FSRC1 1054112U, // FSRC1S 1052840U, // FSRC2 1054159U, // FSRC2S 4386U, // FSRL16 4218U, // FSRL32 1053487U, // FSTOD 1053634U, // FSTOI 1054010U, // FSTOQ 1054559U, // FSTOX 4793U, // FSUBD 5376U, // FSUBQ 5630U, // FSUBS 5519U, // FXNOR 5785U, // FXNORS 5526U, // FXOR 5793U, // FXORS 1053494U, // FXTOD 1054017U, // FXTOQ 1054326U, // FXTOS 74984U, // FZERO 75353U, // FZEROS 24584U, // GETPCX 1078273U, // JMPLri 1078273U, // JMPLrr 1997243U, // LDDFri 1997243U, // LDDFrr 1997249U, // LDFri 1997249U, // LDFrr 1997275U, // LDQFri 1997275U, // LDQFrr 1997229U, // LDSBri 1997229U, // LDSBrr 1997254U, // LDSHri 1997254U, // LDSHrr 1997287U, // LDSWri 1997287U, // LDSWrr 1997236U, // LDUBri 1997236U, // LDUBrr 1997261U, // LDUHri 1997261U, // LDUHrr 1997294U, // LDXri 1997294U, // LDXrr 1997249U, // LDri 1997249U, // LDrr 33480U, // LEAX_ADDri 33480U, // LEA_ADDri 1054405U, // LZCNT 75121U, // MEMBARi 1054543U, // MOVDTOX 1006122U, // MOVFCCri 1006122U, // MOVFCCrr 23484970U, // MOVICCri 23484970U, // MOVICCrr 6047U, // MOVRGEZri 6047U, // MOVRGEZrr 6142U, // MOVRGZri 6142U, // MOVRGZrr 6096U, // MOVRLEZri 6096U, // MOVRLEZrr 6186U, // MOVRLZri 6186U, // MOVRLZrr 6230U, // MOVRNZri 6230U, // MOVRNZrr 6262U, // MOVRRZri 6262U, // MOVRRZrr 1054469U, // MOVSTOSW 1054479U, // MOVSTOUW 1054543U, // MOVWTOS 23747114U, // MOVXCCri 23747114U, // MOVXCCrr 1054543U, // MOVXTOD 5954U, // MULXri 5954U, // MULXrr 2578U, // NOP 4735U, // ORCCri 4735U, // ORCCrr 4726U, // ORNCCri 4726U, // ORNCCrr 5339U, // ORNri 5339U, // ORNrr 5339U, // ORXNrr 5509U, // ORXri 5509U, // ORXrr 5509U, // ORri 5509U, // ORrr 5836U, // PDIST 5344U, // PDISTN 1053356U, // POPCrr 73729U, // RDY 4999U, // RESTOREri 4999U, // RESTORErr 76132U, // RET 76141U, // RETL 18131U, // RETTri 18131U, // RETTrr 5008U, // SAVEri 5008U, // SAVErr 4748U, // SDIVCCri 4748U, // SDIVCCrr 5995U, // SDIVXri 5995U, // SDIVXrr 5861U, // SDIVri 5861U, // SDIVrr 2182U, // SELECT_CC_DFP_FCC 2293U, // SELECT_CC_DFP_ICC 2238U, // SELECT_CC_FP_FCC 2349U, // SELECT_CC_FP_ICC 2265U, // SELECT_CC_Int_FCC 2376U, // SELECT_CC_Int_ICC 2210U, // SELECT_CC_QFP_FCC 2321U, // SELECT_CC_QFP_ICC 1053595U, // SETHIXi 1053595U, // SETHIi 2569U, // SHUTDOWN 2564U, // SIAM 5941U, // SLLXri 5941U, // SLLXrr 5116U, // SLLri 5116U, // SLLrr 4702U, // SMULCCri 4702U, // SMULCCrr 5144U, // SMULri 5144U, // SMULrr 5913U, // SRAXri 5913U, // SRAXrr 4643U, // SRAri 4643U, // SRArr 5947U, // SRLXri 5947U, // SRLXrr 5139U, // SRLri 5139U, // SRLrr 2588U, // STBAR 37428U, // STBri 37428U, // STBrr 37723U, // STDFri 37723U, // STDFrr 38607U, // STFri 38607U, // STFrr 37782U, // STHri 37782U, // STHrr 38238U, // STQFri 38238U, // STQFrr 38758U, // STXri 38758U, // STXrr 38607U, // STri 38607U, // STrr 4671U, // SUBCCri 4671U, // SUBCCrr 5919U, // SUBCri 5919U, // SUBCrr 4764U, // SUBEri 4764U, // SUBErr 4665U, // SUBXri 4665U, // SUBXrr 4665U, // SUBri 4665U, // SUBrr 1997268U, // SWAPri 1997268U, // SWAPrr 2422U, // TA3 2427U, // TA5 5883U, // TADDCCTVri 5883U, // TADDCCTVrr 4687U, // TADDCCri 4687U, // TADDCCrr 9873960U, // TICCri 9873960U, // TICCrr 37753544U, // TLS_ADDXrr 37753544U, // TLS_ADDrr 2106358U, // TLS_CALL 39746030U, // TLS_LDXrr 39745985U, // TLS_LDrr 5873U, // TSUBCCTVri 5873U, // TSUBCCTVrr 4670U, // TSUBCCri 4670U, // TSUBCCrr 10136104U, // TXCCri 10136104U, // TXCCrr 4756U, // UDIVCCri 4756U, // UDIVCCrr 6002U, // UDIVXri 6002U, // UDIVXrr 5867U, // UDIVri 5867U, // UDIVrr 4710U, // UMULCCri 4710U, // UMULCCrr 5026U, // UMULXHI 5150U, // UMULri 5150U, // UMULrr 74996U, // UNIMP 6300477U, // V9FCMPD 6300397U, // V9FCMPED 6300942U, // V9FCMPEQ 6301251U, // V9FCMPES 6301000U, // V9FCMPQ 6301309U, // V9FCMPS 47614U, // V9FMOVD_FCC 47638U, // V9FMOVQ_FCC 47650U, // V9FMOVS_FCC 47658U, // V9MOVFCCri 47658U, // V9MOVFCCrr 14689692U, // WRYri 14689692U, // WRYrr 5953U, // XMULX 5035U, // XMULXHI 4733U, // XNORCCri 4733U, // XNORCCrr 5520U, // XNORXrr 5520U, // XNORri 5520U, // XNORrr 4741U, // XORCCri 4741U, // XORCCrr 5527U, // XORXri 5527U, // XORXrr 5527U, // XORri 5527U, // XORrr 0U }; #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'r', 'd', 32, '%', 'y', ',', 32, 0, /* 8 */ 'f', 's', 'r', 'c', '1', 32, 0, /* 15 */ 'f', 'a', 'n', 'd', 'n', 'o', 't', '1', 32, 0, /* 25 */ 'f', 'n', 'o', 't', '1', 32, 0, /* 32 */ 'f', 'o', 'r', 'n', 'o', 't', '1', 32, 0, /* 41 */ 'f', 's', 'r', 'a', '3', '2', 32, 0, /* 49 */ 'f', 'p', 's', 'u', 'b', '3', '2', 32, 0, /* 58 */ 'f', 'p', 'a', 'd', 'd', '3', '2', 32, 0, /* 67 */ 'e', 'd', 'g', 'e', '3', '2', 32, 0, /* 75 */ 'f', 'c', 'm', 'p', 'l', 'e', '3', '2', 32, 0, /* 85 */ 'f', 'c', 'm', 'p', 'n', 'e', '3', '2', 32, 0, /* 95 */ 'f', 'p', 'a', 'c', 'k', '3', '2', 32, 0, /* 104 */ 'c', 'm', 'a', 's', 'k', '3', '2', 32, 0, /* 113 */ 'f', 's', 'l', 'l', '3', '2', 32, 0, /* 121 */ 'f', 's', 'r', 'l', '3', '2', 32, 0, /* 129 */ 'f', 'c', 'm', 'p', 'e', 'q', '3', '2', 32, 0, /* 139 */ 'f', 's', 'l', 'a', 's', '3', '2', 32, 0, /* 148 */ 'f', 'c', 'm', 'p', 'g', 't', '3', '2', 32, 0, /* 158 */ 'a', 'r', 'r', 'a', 'y', '3', '2', 32, 0, /* 167 */ 'f', 's', 'r', 'c', '2', 32, 0, /* 174 */ 'f', 'a', 'n', 'd', 'n', 'o', 't', '2', 32, 0, /* 184 */ 'f', 'n', 'o', 't', '2', 32, 0, /* 191 */ 'f', 'o', 'r', 'n', 'o', 't', '2', 32, 0, /* 200 */ 'f', 'p', 'a', 'd', 'd', '6', '4', 32, 0, /* 209 */ 'f', 's', 'r', 'a', '1', '6', 32, 0, /* 217 */ 'f', 'p', 's', 'u', 'b', '1', '6', 32, 0, /* 226 */ 'f', 'p', 'a', 'd', 'd', '1', '6', 32, 0, /* 235 */ 'e', 'd', 'g', 'e', '1', '6', 32, 0, /* 243 */ 'f', 'c', 'm', 'p', 'l', 'e', '1', '6', 32, 0, /* 253 */ 'f', 'c', 'm', 'p', 'n', 'e', '1', '6', 32, 0, /* 263 */ 'f', 'p', 'a', 'c', 'k', '1', '6', 32, 0, /* 272 */ 'c', 'm', 'a', 's', 'k', '1', '6', 32, 0, /* 281 */ 'f', 's', 'l', 'l', '1', '6', 32, 0, /* 289 */ 'f', 's', 'r', 'l', '1', '6', 32, 0, /* 297 */ 'f', 'c', 'h', 'k', 's', 'm', '1', '6', 32, 0, /* 307 */ 'f', 'm', 'e', 'a', 'n', '1', '6', 32, 0, /* 316 */ 'f', 'c', 'm', 'p', 'e', 'q', '1', '6', 32, 0, /* 326 */ 'f', 's', 'l', 'a', 's', '1', '6', 32, 0, /* 335 */ 'f', 'c', 'm', 'p', 'g', 't', '1', '6', 32, 0, /* 345 */ 'f', 'm', 'u', 'l', '8', 'x', '1', '6', 32, 0, /* 355 */ 'f', 'm', 'u', 'l', 'd', '8', 'u', 'l', 'x', '1', '6', 32, 0, /* 368 */ 'f', 'm', 'u', 'l', '8', 'u', 'l', 'x', '1', '6', 32, 0, /* 380 */ 'f', 'm', 'u', 'l', 'd', '8', 's', 'u', 'x', '1', '6', 32, 0, /* 393 */ 'f', 'm', 'u', 'l', '8', 's', 'u', 'x', '1', '6', 32, 0, /* 405 */ 'a', 'r', 'r', 'a', 'y', '1', '6', 32, 0, /* 414 */ 'e', 'd', 'g', 'e', '8', 32, 0, /* 421 */ 'c', 'm', 'a', 's', 'k', '8', 32, 0, /* 429 */ 'a', 'r', 'r', 'a', 'y', '8', 32, 0, /* 437 */ '!', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 32, 0, /* 456 */ '!', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 32, 0, /* 473 */ 'f', 'p', 's', 'u', 'b', '3', '2', 'S', 32, 0, /* 483 */ 'f', 'p', 's', 'u', 'b', '1', '6', 'S', 32, 0, /* 493 */ 'b', 'r', 'g', 'e', 'z', ',', 'a', 32, 0, /* 502 */ 'b', 'r', 'l', 'e', 'z', ',', 'a', 32, 0, /* 511 */ 'b', 'r', 'g', 'z', ',', 'a', 32, 0, /* 519 */ 'b', 'r', 'l', 'z', ',', 'a', 32, 0, /* 527 */ 'b', 'r', 'n', 'z', ',', 'a', 32, 0, /* 535 */ 'b', 'r', 'z', ',', 'a', 32, 0, /* 542 */ 'b', 'a', 32, 0, /* 546 */ 's', 'r', 'a', 32, 0, /* 551 */ 'f', 'a', 'l', 'i', 'g', 'n', 'd', 'a', 't', 'a', 32, 0, /* 563 */ 's', 't', 'b', 32, 0, /* 568 */ 's', 'u', 'b', 32, 0, /* 573 */ 't', 's', 'u', 'b', 'c', 'c', 32, 0, /* 581 */ 'a', 'd', 'd', 'x', 'c', 'c', 'c', 32, 0, /* 590 */ 't', 'a', 'd', 'd', 'c', 'c', 32, 0, /* 598 */ 'a', 'n', 'd', 'c', 'c', 32, 0, /* 605 */ 's', 'm', 'u', 'l', 'c', 'c', 32, 0, /* 613 */ 'u', 'm', 'u', 'l', 'c', 'c', 32, 0, /* 621 */ 'a', 'n', 'd', 'n', 'c', 'c', 32, 0, /* 629 */ 'o', 'r', 'n', 'c', 'c', 32, 0, /* 636 */ 'x', 'n', 'o', 'r', 'c', 'c', 32, 0, /* 644 */ 'x', 'o', 'r', 'c', 'c', 32, 0, /* 651 */ 's', 'd', 'i', 'v', 'c', 'c', 32, 0, /* 659 */ 'u', 'd', 'i', 'v', 'c', 'c', 32, 0, /* 667 */ 's', 'u', 'b', 'x', 'c', 'c', 32, 0, /* 675 */ 'a', 'd', 'd', 'x', 'c', 'c', 32, 0, /* 683 */ 'p', 'o', 'p', 'c', 32, 0, /* 689 */ 'a', 'd', 'd', 'x', 'c', 32, 0, /* 696 */ 'f', 's', 'u', 'b', 'd', 32, 0, /* 703 */ 'f', 'h', 's', 'u', 'b', 'd', 32, 0, /* 711 */ 'a', 'd', 'd', 32, 0, /* 716 */ 'f', 'a', 'd', 'd', 'd', 32, 0, /* 723 */ 'f', 'h', 'a', 'd', 'd', 'd', 32, 0, /* 731 */ 'f', 'n', 'h', 'a', 'd', 'd', 'd', 32, 0, /* 740 */ 'f', 'n', 'a', 'd', 'd', 'd', 32, 0, /* 748 */ 'f', 'c', 'm', 'p', 'e', 'd', 32, 0, /* 756 */ 'f', 'n', 'e', 'g', 'd', 32, 0, /* 763 */ 'f', 'm', 'u', 'l', 'd', 32, 0, /* 770 */ 'f', 's', 'm', 'u', 'l', 'd', 32, 0, /* 778 */ 'f', 'a', 'n', 'd', 32, 0, /* 784 */ 'f', 'n', 'a', 'n', 'd', 32, 0, /* 791 */ 'f', 'e', 'x', 'p', 'a', 'n', 'd', 32, 0, /* 800 */ 'f', 'i', 't', 'o', 'd', 32, 0, /* 807 */ 'f', 'q', 't', 'o', 'd', 32, 0, /* 814 */ 'f', 's', 't', 'o', 'd', 32, 0, /* 821 */ 'f', 'x', 't', 'o', 'd', 32, 0, /* 828 */ 'f', 'c', 'm', 'p', 'd', 32, 0, /* 835 */ 'f', 'l', 'c', 'm', 'p', 'd', 32, 0, /* 843 */ 'f', 'a', 'b', 's', 'd', 32, 0, /* 850 */ 'f', 's', 'q', 'r', 't', 'd', 32, 0, /* 858 */ 's', 't', 'd', 32, 0, /* 863 */ 'f', 'd', 'i', 'v', 'd', 32, 0, /* 870 */ 'f', 'm', 'o', 'v', 'd', 32, 0, /* 877 */ 'f', 'p', 'm', 'e', 'r', 'g', 'e', 32, 0, /* 886 */ 'b', 's', 'h', 'u', 'f', 'f', 'l', 'e', 32, 0, /* 896 */ 'f', 'o', 'n', 'e', 32, 0, /* 902 */ 'r', 'e', 's', 't', 'o', 'r', 'e', 32, 0, /* 911 */ 's', 'a', 'v', 'e', 32, 0, /* 917 */ 's', 't', 'h', 32, 0, /* 922 */ 's', 'e', 't', 'h', 'i', 32, 0, /* 929 */ 'u', 'm', 'u', 'l', 'x', 'h', 'i', 32, 0, /* 938 */ 'x', 'm', 'u', 'l', 'x', 'h', 'i', 32, 0, /* 947 */ 'f', 'd', 't', 'o', 'i', 32, 0, /* 954 */ 'f', 'q', 't', 'o', 'i', 32, 0, /* 961 */ 'f', 's', 't', 'o', 'i', 32, 0, /* 968 */ 'b', 'm', 'a', 's', 'k', 32, 0, /* 975 */ 'e', 'd', 'g', 'e', '3', '2', 'l', 32, 0, /* 984 */ 'e', 'd', 'g', 'e', '1', '6', 'l', 32, 0, /* 993 */ 'e', 'd', 'g', 'e', '8', 'l', 32, 0, /* 1001 */ 'f', 'm', 'u', 'l', '8', 'x', '1', '6', 'a', 'l', 32, 0, /* 1013 */ 'c', 'a', 'l', 'l', 32, 0, /* 1019 */ 's', 'l', 'l', 32, 0, /* 1024 */ 'j', 'm', 'p', 'l', 32, 0, /* 1030 */ 'a', 'l', 'i', 'g', 'n', 'a', 'd', 'd', 'r', 'l', 32, 0, /* 1042 */ 's', 'r', 'l', 32, 0, /* 1047 */ 's', 'm', 'u', 'l', 32, 0, /* 1053 */ 'u', 'm', 'u', 'l', 32, 0, /* 1059 */ 'e', 'd', 'g', 'e', '3', '2', 'n', 32, 0, /* 1068 */ 'e', 'd', 'g', 'e', '1', '6', 'n', 32, 0, /* 1077 */ 'e', 'd', 'g', 'e', '8', 'n', 32, 0, /* 1085 */ 'a', 'n', 'd', 'n', 32, 0, /* 1091 */ 'e', 'd', 'g', 'e', '3', '2', 'l', 'n', 32, 0, /* 1101 */ 'e', 'd', 'g', 'e', '1', '6', 'l', 'n', 32, 0, /* 1111 */ 'e', 'd', 'g', 'e', '8', 'l', 'n', 32, 0, /* 1120 */ 'b', 'r', 'g', 'e', 'z', ',', 'a', ',', 'p', 'n', 32, 0, /* 1132 */ 'b', 'r', 'l', 'e', 'z', ',', 'a', ',', 'p', 'n', 32, 0, /* 1144 */ 'b', 'r', 'g', 'z', ',', 'a', ',', 'p', 'n', 32, 0, /* 1155 */ 'b', 'r', 'l', 'z', ',', 'a', ',', 'p', 'n', 32, 0, /* 1166 */ 'b', 'r', 'n', 'z', ',', 'a', ',', 'p', 'n', 32, 0, /* 1177 */ 'b', 'r', 'z', ',', 'a', ',', 'p', 'n', 32, 0, /* 1187 */ 'b', 'r', 'g', 'e', 'z', ',', 'p', 'n', 32, 0, /* 1197 */ 'b', 'r', 'l', 'e', 'z', ',', 'p', 'n', 32, 0, /* 1207 */ 'b', 'r', 'g', 'z', ',', 'p', 'n', 32, 0, /* 1216 */ 'b', 'r', 'l', 'z', ',', 'p', 'n', 32, 0, /* 1225 */ 'b', 'r', 'n', 'z', ',', 'p', 'n', 32, 0, /* 1234 */ 'b', 'r', 'z', ',', 'p', 'n', 32, 0, /* 1242 */ 'o', 'r', 'n', 32, 0, /* 1247 */ 'p', 'd', 'i', 's', 't', 'n', 32, 0, /* 1255 */ 'f', 'z', 'e', 'r', 'o', 32, 0, /* 1262 */ 'c', 'm', 'p', 32, 0, /* 1267 */ 'u', 'n', 'i', 'm', 'p', 32, 0, /* 1274 */ 'j', 'm', 'p', 32, 0, /* 1279 */ 'f', 's', 'u', 'b', 'q', 32, 0, /* 1286 */ 'f', 'a', 'd', 'd', 'q', 32, 0, /* 1293 */ 'f', 'c', 'm', 'p', 'e', 'q', 32, 0, /* 1301 */ 'f', 'n', 'e', 'g', 'q', 32, 0, /* 1308 */ 'f', 'd', 'm', 'u', 'l', 'q', 32, 0, /* 1316 */ 'f', 'm', 'u', 'l', 'q', 32, 0, /* 1323 */ 'f', 'd', 't', 'o', 'q', 32, 0, /* 1330 */ 'f', 'i', 't', 'o', 'q', 32, 0, /* 1337 */ 'f', 's', 't', 'o', 'q', 32, 0, /* 1344 */ 'f', 'x', 't', 'o', 'q', 32, 0, /* 1351 */ 'f', 'c', 'm', 'p', 'q', 32, 0, /* 1358 */ 'f', 'a', 'b', 's', 'q', 32, 0, /* 1365 */ 'f', 's', 'q', 'r', 't', 'q', 32, 0, /* 1373 */ 's', 't', 'q', 32, 0, /* 1378 */ 'f', 'd', 'i', 'v', 'q', 32, 0, /* 1385 */ 'f', 'm', 'o', 'v', 'q', 32, 0, /* 1392 */ 'm', 'e', 'm', 'b', 'a', 'r', 32, 0, /* 1400 */ 'a', 'l', 'i', 'g', 'n', 'a', 'd', 'd', 'r', 32, 0, /* 1411 */ 'f', 'o', 'r', 32, 0, /* 1416 */ 'f', 'n', 'o', 'r', 32, 0, /* 1422 */ 'f', 'x', 'n', 'o', 'r', 32, 0, /* 1429 */ 'f', 'x', 'o', 'r', 32, 0, /* 1435 */ 'w', 'r', 32, 0, /* 1439 */ 'f', 's', 'r', 'c', '1', 's', 32, 0, /* 1447 */ 'f', 'a', 'n', 'd', 'n', 'o', 't', '1', 's', 32, 0, /* 1458 */ 'f', 'n', 'o', 't', '1', 's', 32, 0, /* 1466 */ 'f', 'o', 'r', 'n', 'o', 't', '1', 's', 32, 0, /* 1476 */ 'f', 'p', 'a', 'd', 'd', '3', '2', 's', 32, 0, /* 1486 */ 'f', 's', 'r', 'c', '2', 's', 32, 0, /* 1494 */ 'f', 'a', 'n', 'd', 'n', 'o', 't', '2', 's', 32, 0, /* 1505 */ 'f', 'n', 'o', 't', '2', 's', 32, 0, /* 1513 */ 'f', 'o', 'r', 'n', 'o', 't', '2', 's', 32, 0, /* 1523 */ 'f', 'p', 'a', 'd', 'd', '1', '6', 's', 32, 0, /* 1533 */ 'f', 's', 'u', 'b', 's', 32, 0, /* 1540 */ 'f', 'h', 's', 'u', 'b', 's', 32, 0, /* 1548 */ 'f', 'a', 'd', 'd', 's', 32, 0, /* 1555 */ 'f', 'h', 'a', 'd', 'd', 's', 32, 0, /* 1563 */ 'f', 'n', 'h', 'a', 'd', 'd', 's', 32, 0, /* 1572 */ 'f', 'n', 'a', 'd', 'd', 's', 32, 0, /* 1580 */ 'f', 'a', 'n', 'd', 's', 32, 0, /* 1587 */ 'f', 'n', 'a', 'n', 'd', 's', 32, 0, /* 1595 */ 'f', 'o', 'n', 'e', 's', 32, 0, /* 1602 */ 'f', 'c', 'm', 'p', 'e', 's', 32, 0, /* 1610 */ 'f', 'n', 'e', 'g', 's', 32, 0, /* 1617 */ 'f', 'm', 'u', 'l', 's', 32, 0, /* 1624 */ 'f', 'z', 'e', 'r', 'o', 's', 32, 0, /* 1632 */ 'f', 'd', 't', 'o', 's', 32, 0, /* 1639 */ 'f', 'i', 't', 'o', 's', 32, 0, /* 1646 */ 'f', 'q', 't', 'o', 's', 32, 0, /* 1653 */ 'f', 'x', 't', 'o', 's', 32, 0, /* 1660 */ 'f', 'c', 'm', 'p', 's', 32, 0, /* 1667 */ 'f', 'l', 'c', 'm', 'p', 's', 32, 0, /* 1675 */ 'f', 'o', 'r', 's', 32, 0, /* 1681 */ 'f', 'n', 'o', 'r', 's', 32, 0, /* 1688 */ 'f', 'x', 'n', 'o', 'r', 's', 32, 0, /* 1696 */ 'f', 'x', 'o', 'r', 's', 32, 0, /* 1703 */ 'f', 'a', 'b', 's', 's', 32, 0, /* 1710 */ 'f', 's', 'q', 'r', 't', 's', 32, 0, /* 1718 */ 'f', 'd', 'i', 'v', 's', 32, 0, /* 1725 */ 'f', 'm', 'o', 'v', 's', 32, 0, /* 1732 */ 'l', 'z', 'c', 'n', 't', 32, 0, /* 1739 */ 'p', 'd', 'i', 's', 't', 32, 0, /* 1746 */ 'r', 'e', 't', 't', 32, 0, /* 1752 */ 'f', 'm', 'u', 'l', '8', 'x', '1', '6', 'a', 'u', 32, 0, /* 1764 */ 's', 'd', 'i', 'v', 32, 0, /* 1770 */ 'u', 'd', 'i', 'v', 32, 0, /* 1776 */ 't', 's', 'u', 'b', 'c', 'c', 't', 'v', 32, 0, /* 1786 */ 't', 'a', 'd', 'd', 'c', 'c', 't', 'v', 32, 0, /* 1796 */ 'm', 'o', 'v', 's', 't', 'o', 's', 'w', 32, 0, /* 1806 */ 'm', 'o', 'v', 's', 't', 'o', 'u', 'w', 32, 0, /* 1816 */ 's', 'r', 'a', 'x', 32, 0, /* 1822 */ 's', 'u', 'b', 'x', 32, 0, /* 1828 */ 'a', 'd', 'd', 'x', 32, 0, /* 1834 */ 'f', 'p', 'a', 'c', 'k', 'f', 'i', 'x', 32, 0, /* 1844 */ 's', 'l', 'l', 'x', 32, 0, /* 1850 */ 's', 'r', 'l', 'x', 32, 0, /* 1856 */ 'x', 'm', 'u', 'l', 'x', 32, 0, /* 1863 */ 'f', 'd', 't', 'o', 'x', 32, 0, /* 1870 */ 'm', 'o', 'v', 'd', 't', 'o', 'x', 32, 0, /* 1879 */ 'f', 'q', 't', 'o', 'x', 32, 0, /* 1886 */ 'f', 's', 't', 'o', 'x', 32, 0, /* 1893 */ 's', 't', 'x', 32, 0, /* 1898 */ 's', 'd', 'i', 'v', 'x', 32, 0, /* 1905 */ 'u', 'd', 'i', 'v', 'x', 32, 0, /* 1912 */ 'f', 'm', 'o', 'v', 'r', 'd', 'z', 32, 0, /* 1921 */ 'f', 'm', 'o', 'v', 'r', 'd', 'g', 'e', 'z', 32, 0, /* 1932 */ 'f', 'm', 'o', 'v', 'r', 'q', 'g', 'e', 'z', 32, 0, /* 1943 */ 'b', 'r', 'g', 'e', 'z', 32, 0, /* 1950 */ 'm', 'o', 'v', 'r', 'g', 'e', 'z', 32, 0, /* 1959 */ 'f', 'm', 'o', 'v', 'r', 's', 'g', 'e', 'z', 32, 0, /* 1970 */ 'f', 'm', 'o', 'v', 'r', 'd', 'l', 'e', 'z', 32, 0, /* 1981 */ 'f', 'm', 'o', 'v', 'r', 'q', 'l', 'e', 'z', 32, 0, /* 1992 */ 'b', 'r', 'l', 'e', 'z', 32, 0, /* 1999 */ 'm', 'o', 'v', 'r', 'l', 'e', 'z', 32, 0, /* 2008 */ 'f', 'm', 'o', 'v', 'r', 's', 'l', 'e', 'z', 32, 0, /* 2019 */ 'f', 'm', 'o', 'v', 'r', 'd', 'g', 'z', 32, 0, /* 2029 */ 'f', 'm', 'o', 'v', 'r', 'q', 'g', 'z', 32, 0, /* 2039 */ 'b', 'r', 'g', 'z', 32, 0, /* 2045 */ 'm', 'o', 'v', 'r', 'g', 'z', 32, 0, /* 2053 */ 'f', 'm', 'o', 'v', 'r', 's', 'g', 'z', 32, 0, /* 2063 */ 'f', 'm', 'o', 'v', 'r', 'd', 'l', 'z', 32, 0, /* 2073 */ 'f', 'm', 'o', 'v', 'r', 'q', 'l', 'z', 32, 0, /* 2083 */ 'b', 'r', 'l', 'z', 32, 0, /* 2089 */ 'm', 'o', 'v', 'r', 'l', 'z', 32, 0, /* 2097 */ 'f', 'm', 'o', 'v', 'r', 's', 'l', 'z', 32, 0, /* 2107 */ 'f', 'm', 'o', 'v', 'r', 'd', 'n', 'z', 32, 0, /* 2117 */ 'f', 'm', 'o', 'v', 'r', 'q', 'n', 'z', 32, 0, /* 2127 */ 'b', 'r', 'n', 'z', 32, 0, /* 2133 */ 'm', 'o', 'v', 'r', 'n', 'z', 32, 0, /* 2141 */ 'f', 'm', 'o', 'v', 'r', 's', 'n', 'z', 32, 0, /* 2151 */ 'f', 'm', 'o', 'v', 'r', 'q', 'z', 32, 0, /* 2160 */ 'b', 'r', 'z', 32, 0, /* 2165 */ 'm', 'o', 'v', 'r', 'z', 32, 0, /* 2172 */ 'f', 'm', 'o', 'v', 'r', 's', 'z', 32, 0, /* 2181 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'D', 'F', 'P', '_', 'F', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2209 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'P', '_', 'F', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2237 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', 'P', '_', 'F', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2264 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', 'n', 't', '_', 'F', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2292 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'D', 'F', 'P', '_', 'I', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2320 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'P', '_', 'I', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2348 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', 'P', '_', 'I', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2375 */ ';', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', 'n', 't', '_', 'I', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2403 */ 'j', 'm', 'p', 32, '%', 'i', '7', '+', 0, /* 2412 */ 'j', 'm', 'p', 32, '%', 'o', '7', '+', 0, /* 2421 */ 't', 'a', 32, '3', 0, /* 2426 */ 't', 'a', 32, '5', 0, /* 2431 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 2444 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 2451 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 2461 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 2476 */ 'l', 'd', 's', 'b', 32, '[', 0, /* 2483 */ 'l', 'd', 'u', 'b', 32, '[', 0, /* 2490 */ 'l', 'd', 'd', 32, '[', 0, /* 2496 */ 'l', 'd', 32, '[', 0, /* 2501 */ 'l', 'd', 's', 'h', 32, '[', 0, /* 2508 */ 'l', 'd', 'u', 'h', 32, '[', 0, /* 2515 */ 's', 'w', 'a', 'p', 32, '[', 0, /* 2522 */ 'l', 'd', 'q', 32, '[', 0, /* 2528 */ 'c', 'a', 's', 32, '[', 0, /* 2534 */ 'l', 'd', 's', 'w', 32, '[', 0, /* 2541 */ 'l', 'd', 'x', 32, '[', 0, /* 2547 */ 'c', 'a', 's', 'x', 32, '[', 0, /* 2554 */ 'f', 'b', 0, /* 2557 */ 'f', 'm', 'o', 'v', 'd', 0, /* 2563 */ 's', 'i', 'a', 'm', 0, /* 2568 */ 's', 'h', 'u', 't', 'd', 'o', 'w', 'n', 0, /* 2577 */ 'n', 'o', 'p', 0, /* 2581 */ 'f', 'm', 'o', 'v', 'q', 0, /* 2587 */ 's', 't', 'b', 'a', 'r', 0, /* 2593 */ 'f', 'm', 'o', 'v', 's', 0, /* 2599 */ 't', 0, /* 2601 */ 'm', 'o', 'v', 0, /* 2605 */ 'f', 'l', 'u', 's', 'h', 'w', 0, }; #endif // Emit the opcode for the instruction. uint32_t Bits = OpInfo[MCInst_getOpcode(MI)]; #ifndef CAPSTONE_DIET // assert(Bits != 0 && "Cannot print this instruction."); SStream_concat0(O, AsmStrs+(Bits & 4095)-1); #endif // Fragment 0 encoded into 4 bits for 12 unique commands. // printf("Frag-0: %u\n", (Bits >> 12) & 15); switch ((Bits >> 12) & 15) { default: // unreachable. case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, FLUSHW, NOP, SELECT_C... return; break; case 1: // ADDCCri, ADDCCrr, ADDCri, ADDCrr, ADDEri, ADDErr, ADDXC, ADDXCCC, ADDX... printOperand(MI, 1, O); break; case 2: // ADJCALLSTACKDOWN, ADJCALLSTACKUP, BA, BPGEZapn, BPGEZapt, BPGEZnapn, B... printOperand(MI, 0, O); break; case 3: // BCOND, BCONDA, BPFCC, BPFCCA, BPFCCANT, BPFCCNT, BPICC, BPICCA, BPICCA... printCCOperand(MI, 1, O); break; case 4: // BINDri, BINDrr, CALLri, CALLrr, RETTri, RETTrr printMemOperand(MI, 0, O, NULL); return; break; case 5: // FMOVD_FCC, FMOVD_ICC, FMOVD_XCC, FMOVQ_FCC, FMOVQ_ICC, FMOVQ_XCC, FMOV... printCCOperand(MI, 3, O); break; case 6: // GETPCX printGetPCX(MI, 0, O); return; break; case 7: // JMPLri, JMPLrr, LDDFri, LDDFrr, LDFri, LDFrr, LDQFri, LDQFrr, LDSBri, ... printMemOperand(MI, 1, O, NULL); break; case 8: // LEAX_ADDri, LEA_ADDri printMemOperand(MI, 1, O, "arith"); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 9: // STBri, STBrr, STDFri, STDFrr, STFri, STFrr, STHri, STHrr, STQFri, STQF... printOperand(MI, 2, O); SStream_concat0(O, ", ["); printMemOperand(MI, 0, O, NULL); SStream_concat0(O, "]"); return; break; case 10: // TICCri, TICCrr, TXCCri, TXCCrr printCCOperand(MI, 2, O); break; case 11: // V9FMOVD_FCC, V9FMOVQ_FCC, V9FMOVS_FCC, V9MOVFCCri, V9MOVFCCrr printCCOperand(MI, 4, O); SStream_concat0(O, " "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; } // Fragment 1 encoded into 4 bits for 16 unique commands. // printf("Frag-1: %u\n", (Bits >> 16) & 15); switch ((Bits >> 16) & 15) { default: // unreachable. case 0: // ADDCCri, ADDCCrr, ADDCri, ADDCrr, ADDEri, ADDErr, ADDXC, ADDXCCC, ADDX... SStream_concat0(O, ", "); break; case 1: // ADJCALLSTACKDOWN, ADJCALLSTACKUP, BA, CALL, CMASK16, CMASK32, CMASK8, ... return; break; case 2: // BCOND, BPFCC, FBCOND SStream_concat0(O, " "); break; case 3: // BCONDA, BPFCCA, FBCONDA SStream_concat0(O, ",a "); Sparc_add_hint(MI, SPARC_HINT_A); break; case 4: // BPFCCANT SStream_concat0(O, ",a,pn "); Sparc_add_hint(MI, SPARC_HINT_A + SPARC_HINT_PN); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 5: // BPFCCNT SStream_concat0(O, ",pn "); Sparc_add_hint(MI, SPARC_HINT_PN); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 6: // BPICC, FMOVD_ICC, FMOVQ_ICC, FMOVS_ICC, MOVICCri, MOVICCrr, TICCri, TI... SStream_concat0(O, " %icc, "); Sparc_add_reg(MI, SPARC_REG_ICC); break; case 7: // BPICCA SStream_concat0(O, ",a %icc, "); Sparc_add_hint(MI, SPARC_HINT_A); Sparc_add_reg(MI, SPARC_REG_ICC); printOperand(MI, 0, O); return; break; case 8: // BPICCANT SStream_concat0(O, ",a,pn %icc, "); Sparc_add_hint(MI, SPARC_HINT_A + SPARC_HINT_PN); Sparc_add_reg(MI, SPARC_REG_ICC); printOperand(MI, 0, O); return; break; case 9: // BPICCNT SStream_concat0(O, ",pn %icc, "); Sparc_add_hint(MI, SPARC_HINT_PN); Sparc_add_reg(MI, SPARC_REG_ICC); printOperand(MI, 0, O); return; break; case 10: // BPXCC, FMOVD_XCC, FMOVQ_XCC, FMOVS_XCC, MOVXCCri, MOVXCCrr, TXCCri, TX... SStream_concat0(O, " %xcc, "); Sparc_add_reg(MI, SPARC_REG_XCC); break; case 11: // BPXCCA SStream_concat0(O, ",a %xcc, "); Sparc_add_hint(MI, SPARC_HINT_A); Sparc_add_reg(MI, SPARC_REG_XCC); printOperand(MI, 0, O); return; break; case 12: // BPXCCANT SStream_concat0(O, ",a,pn %xcc, "); Sparc_add_hint(MI, SPARC_HINT_A + SPARC_HINT_PN); Sparc_add_reg(MI, SPARC_REG_XCC); printOperand(MI, 0, O); return; break; case 13: // BPXCCNT SStream_concat0(O, ",pn %xcc, "); Sparc_add_hint(MI, SPARC_HINT_PN); Sparc_add_reg(MI, SPARC_REG_XCC); printOperand(MI, 0, O); return; break; case 14: // CASXrr, CASrr, LDDFri, LDDFrr, LDFri, LDFrr, LDQFri, LDQFrr, LDSBri, L... SStream_concat0(O, "], "); break; case 15: // FMOVD_FCC, FMOVQ_FCC, FMOVS_FCC, MOVFCCri, MOVFCCrr SStream_concat0(O, " %fcc0, "); Sparc_add_reg(MI, SPARC_REG_FCC0); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; } // Fragment 2 encoded into 2 bits for 3 unique commands. // printf("Frag-2: %u\n", (Bits >> 20) & 3); switch ((Bits >> 20) & 3) { default: // unreachable. case 0: // ADDCCri, ADDCCrr, ADDCri, ADDCrr, ADDEri, ADDErr, ADDXC, ADDXCCC, ADDX... printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 1: // BCOND, BCONDA, BPICC, BPXCC, FABSD, FABSQ, FABSS, FBCOND, FBCONDA, FDT... printOperand(MI, 0, O); break; case 2: // BPGEZapn, BPGEZapt, BPGEZnapn, BPGEZnapt, BPGZapn, BPGZapt, BPGZnapn, ... printOperand(MI, 1, O); break; } // Fragment 3 encoded into 2 bits for 4 unique commands. // printf("Frag-3: %u\n", (Bits >> 22) & 3); switch ((Bits >> 22) & 3) { default: // unreachable. case 0: // ADDCCri, ADDCCrr, ADDCri, ADDCrr, ADDEri, ADDErr, ADDXC, ADDXCCC, ADDX... return; break; case 1: // FLCMPD, FLCMPS, FMOVD_ICC, FMOVD_XCC, FMOVQ_ICC, FMOVQ_XCC, FMOVS_ICC,... SStream_concat0(O, ", "); break; case 2: // TICCri, TICCrr, TXCCri, TXCCrr SStream_concat0(O, " + "); // qq printOperand(MI, 1, O); return; break; case 3: // WRYri, WRYrr SStream_concat0(O, ", %y"); Sparc_add_reg(MI, SPARC_REG_Y); return; break; } // Fragment 4 encoded into 2 bits for 3 unique commands. // printf("Frag-4: %u\n", (Bits >> 24) & 3); switch ((Bits >> 24) & 3) { default: // unreachable. case 0: // FLCMPD, FLCMPS, V9FCMPD, V9FCMPED, V9FCMPEQ, V9FCMPES, V9FCMPQ, V9FCMP... printOperand(MI, 2, O); return; break; case 1: // FMOVD_ICC, FMOVD_XCC, FMOVQ_ICC, FMOVQ_XCC, FMOVS_ICC, FMOVS_XCC, MOVI... printOperand(MI, 0, O); return; break; case 2: // TLS_ADDXrr, TLS_ADDrr, TLS_LDXrr, TLS_LDrr printOperand(MI, 3, O); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 119 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'f', '1', '0', 0, /* 4 */ 'f', '2', '0', 0, /* 8 */ 'f', '3', '0', 0, /* 12 */ 'f', '4', '0', 0, /* 16 */ 'f', '5', '0', 0, /* 20 */ 'f', '6', '0', 0, /* 24 */ 'f', 'c', 'c', '0', 0, /* 29 */ 'f', '0', 0, /* 32 */ 'g', '0', 0, /* 35 */ 'i', '0', 0, /* 38 */ 'l', '0', 0, /* 41 */ 'o', '0', 0, /* 44 */ 'f', '1', '1', 0, /* 48 */ 'f', '2', '1', 0, /* 52 */ 'f', '3', '1', 0, /* 56 */ 'f', 'c', 'c', '1', 0, /* 61 */ 'f', '1', 0, /* 64 */ 'g', '1', 0, /* 67 */ 'i', '1', 0, /* 70 */ 'l', '1', 0, /* 73 */ 'o', '1', 0, /* 76 */ 'f', '1', '2', 0, /* 80 */ 'f', '2', '2', 0, /* 84 */ 'f', '3', '2', 0, /* 88 */ 'f', '4', '2', 0, /* 92 */ 'f', '5', '2', 0, /* 96 */ 'f', '6', '2', 0, /* 100 */ 'f', 'c', 'c', '2', 0, /* 105 */ 'f', '2', 0, /* 108 */ 'g', '2', 0, /* 111 */ 'i', '2', 0, /* 114 */ 'l', '2', 0, /* 117 */ 'o', '2', 0, /* 120 */ 'f', '1', '3', 0, /* 124 */ 'f', '2', '3', 0, /* 128 */ 'f', 'c', 'c', '3', 0, /* 133 */ 'f', '3', 0, /* 136 */ 'g', '3', 0, /* 139 */ 'i', '3', 0, /* 142 */ 'l', '3', 0, /* 145 */ 'o', '3', 0, /* 148 */ 'f', '1', '4', 0, /* 152 */ 'f', '2', '4', 0, /* 156 */ 'f', '3', '4', 0, /* 160 */ 'f', '4', '4', 0, /* 164 */ 'f', '5', '4', 0, /* 168 */ 'f', '4', 0, /* 171 */ 'g', '4', 0, /* 174 */ 'i', '4', 0, /* 177 */ 'l', '4', 0, /* 180 */ 'o', '4', 0, /* 183 */ 'f', '1', '5', 0, /* 187 */ 'f', '2', '5', 0, /* 191 */ 'f', '5', 0, /* 194 */ 'g', '5', 0, /* 197 */ 'i', '5', 0, /* 200 */ 'l', '5', 0, /* 203 */ 'o', '5', 0, /* 206 */ 'f', '1', '6', 0, /* 210 */ 'f', '2', '6', 0, /* 214 */ 'f', '3', '6', 0, /* 218 */ 'f', '4', '6', 0, /* 222 */ 'f', '5', '6', 0, /* 226 */ 'f', '6', 0, /* 229 */ 'g', '6', 0, /* 232 */ 'l', '6', 0, /* 235 */ 'f', '1', '7', 0, /* 239 */ 'f', '2', '7', 0, /* 243 */ 'f', '7', 0, /* 246 */ 'g', '7', 0, /* 249 */ 'i', '7', 0, /* 252 */ 'l', '7', 0, /* 255 */ 'o', '7', 0, /* 258 */ 'f', '1', '8', 0, /* 262 */ 'f', '2', '8', 0, /* 266 */ 'f', '3', '8', 0, /* 270 */ 'f', '4', '8', 0, /* 274 */ 'f', '5', '8', 0, /* 278 */ 'f', '8', 0, /* 281 */ 'f', '1', '9', 0, /* 285 */ 'f', '2', '9', 0, /* 289 */ 'f', '9', 0, /* 292 */ 'i', 'c', 'c', 0, /* 296 */ 'f', 'p', 0, /* 299 */ 's', 'p', 0, /* 302 */ 'y', 0, }; static const uint16_t RegAsmOffset[] = { 292, 302, 29, 105, 168, 226, 278, 0, 76, 148, 206, 258, 4, 80, 152, 210, 262, 8, 84, 156, 214, 266, 12, 88, 160, 218, 270, 16, 92, 164, 222, 274, 20, 96, 29, 61, 105, 133, 168, 191, 226, 243, 278, 289, 0, 44, 76, 120, 148, 183, 206, 235, 258, 281, 4, 48, 80, 124, 152, 187, 210, 239, 262, 285, 8, 52, 24, 56, 100, 128, 32, 64, 108, 136, 171, 194, 229, 246, 35, 67, 111, 139, 174, 197, 296, 249, 38, 70, 114, 142, 177, 200, 232, 252, 41, 73, 117, 145, 180, 203, 299, 255, 29, 168, 278, 76, 206, 4, 152, 262, 84, 214, 12, 160, 270, 92, 222, 20, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case SP_BCOND: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8) { // (BCOND brtarget:$imm, 8) AsmString = "ba $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BCOND brtarget:$imm, 0) AsmString = "bn $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9) { // (BCOND brtarget:$imm, 9) AsmString = "bne $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (BCOND brtarget:$imm, 1) AsmString = "be $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10) { // (BCOND brtarget:$imm, 10) AsmString = "bg $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2) { // (BCOND brtarget:$imm, 2) AsmString = "ble $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11) { // (BCOND brtarget:$imm, 11) AsmString = "bge $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3) { // (BCOND brtarget:$imm, 3) AsmString = "bl $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12) { // (BCOND brtarget:$imm, 12) AsmString = "bgu $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (BCOND brtarget:$imm, 4) AsmString = "bleu $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13) { // (BCOND brtarget:$imm, 13) AsmString = "bcc $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (BCOND brtarget:$imm, 5) AsmString = "bcs $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14) { // (BCOND brtarget:$imm, 14) AsmString = "bpos $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6) { // (BCOND brtarget:$imm, 6) AsmString = "bneg $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15) { // (BCOND brtarget:$imm, 15) AsmString = "bvc $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7) { // (BCOND brtarget:$imm, 7) AsmString = "bvs $\x01"; break; } return NULL; case SP_BCONDA: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8) { // (BCONDA brtarget:$imm, 8) AsmString = "ba,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BCONDA brtarget:$imm, 0) AsmString = "bn,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9) { // (BCONDA brtarget:$imm, 9) AsmString = "bne,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (BCONDA brtarget:$imm, 1) AsmString = "be,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10) { // (BCONDA brtarget:$imm, 10) AsmString = "bg,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2) { // (BCONDA brtarget:$imm, 2) AsmString = "ble,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11) { // (BCONDA brtarget:$imm, 11) AsmString = "bge,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3) { // (BCONDA brtarget:$imm, 3) AsmString = "bl,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12) { // (BCONDA brtarget:$imm, 12) AsmString = "bgu,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (BCONDA brtarget:$imm, 4) AsmString = "bleu,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13) { // (BCONDA brtarget:$imm, 13) AsmString = "bcc,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (BCONDA brtarget:$imm, 5) AsmString = "bcs,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14) { // (BCONDA brtarget:$imm, 14) AsmString = "bpos,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6) { // (BCONDA brtarget:$imm, 6) AsmString = "bneg,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15) { // (BCONDA brtarget:$imm, 15) AsmString = "bvc,a $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7) { // (BCONDA brtarget:$imm, 7) AsmString = "bvs,a $\x01"; break; } return NULL; case SP_BPFCCANT: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 0, FCCRegs:$cc) AsmString = "fba,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 8, FCCRegs:$cc) AsmString = "fbn,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 7, FCCRegs:$cc) AsmString = "fbu,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 6, FCCRegs:$cc) AsmString = "fbg,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 5, FCCRegs:$cc) AsmString = "fbug,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 4, FCCRegs:$cc) AsmString = "fbl,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 3, FCCRegs:$cc) AsmString = "fbul,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 2, FCCRegs:$cc) AsmString = "fblg,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 1, FCCRegs:$cc) AsmString = "fbne,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 9, FCCRegs:$cc) AsmString = "fbe,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 10, FCCRegs:$cc) AsmString = "fbue,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 11, FCCRegs:$cc) AsmString = "fbge,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 12, FCCRegs:$cc) AsmString = "fbuge,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 13, FCCRegs:$cc) AsmString = "fble,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 14, FCCRegs:$cc) AsmString = "fbule,a,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCANT brtarget:$imm, 15, FCCRegs:$cc) AsmString = "fbo,a,pn $\x03, $\x01"; break; } return NULL; case SP_BPFCCNT: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 0, FCCRegs:$cc) AsmString = "fba,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 8, FCCRegs:$cc) AsmString = "fbn,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 7, FCCRegs:$cc) AsmString = "fbu,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 6, FCCRegs:$cc) AsmString = "fbg,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 5, FCCRegs:$cc) AsmString = "fbug,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 4, FCCRegs:$cc) AsmString = "fbl,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 3, FCCRegs:$cc) AsmString = "fbul,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 2, FCCRegs:$cc) AsmString = "fblg,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 1, FCCRegs:$cc) AsmString = "fbne,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 9, FCCRegs:$cc) AsmString = "fbe,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 10, FCCRegs:$cc) AsmString = "fbue,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 11, FCCRegs:$cc) AsmString = "fbge,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 12, FCCRegs:$cc) AsmString = "fbuge,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 13, FCCRegs:$cc) AsmString = "fble,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 14, FCCRegs:$cc) AsmString = "fbule,pn $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 2)) { // (BPFCCNT brtarget:$imm, 15, FCCRegs:$cc) AsmString = "fbo,pn $\x03, $\x01"; break; } return NULL; case SP_BPICCANT: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8) { // (BPICCANT brtarget:$imm, 8) AsmString = "ba,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BPICCANT brtarget:$imm, 0) AsmString = "bn,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9) { // (BPICCANT brtarget:$imm, 9) AsmString = "bne,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (BPICCANT brtarget:$imm, 1) AsmString = "be,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10) { // (BPICCANT brtarget:$imm, 10) AsmString = "bg,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2) { // (BPICCANT brtarget:$imm, 2) AsmString = "ble,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11) { // (BPICCANT brtarget:$imm, 11) AsmString = "bge,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3) { // (BPICCANT brtarget:$imm, 3) AsmString = "bl,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12) { // (BPICCANT brtarget:$imm, 12) AsmString = "bgu,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (BPICCANT brtarget:$imm, 4) AsmString = "bleu,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13) { // (BPICCANT brtarget:$imm, 13) AsmString = "bcc,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (BPICCANT brtarget:$imm, 5) AsmString = "bcs,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14) { // (BPICCANT brtarget:$imm, 14) AsmString = "bpos,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6) { // (BPICCANT brtarget:$imm, 6) AsmString = "bneg,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15) { // (BPICCANT brtarget:$imm, 15) AsmString = "bvc,a,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7) { // (BPICCANT brtarget:$imm, 7) AsmString = "bvs,a,pn %icc, $\x01"; break; } return NULL; case SP_BPICCNT: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8) { // (BPICCNT brtarget:$imm, 8) AsmString = "ba,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BPICCNT brtarget:$imm, 0) AsmString = "bn,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9) { // (BPICCNT brtarget:$imm, 9) AsmString = "bne,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (BPICCNT brtarget:$imm, 1) AsmString = "be,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10) { // (BPICCNT brtarget:$imm, 10) AsmString = "bg,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2) { // (BPICCNT brtarget:$imm, 2) AsmString = "ble,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11) { // (BPICCNT brtarget:$imm, 11) AsmString = "bge,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3) { // (BPICCNT brtarget:$imm, 3) AsmString = "bl,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12) { // (BPICCNT brtarget:$imm, 12) AsmString = "bgu,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (BPICCNT brtarget:$imm, 4) AsmString = "bleu,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13) { // (BPICCNT brtarget:$imm, 13) AsmString = "bcc,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (BPICCNT brtarget:$imm, 5) AsmString = "bcs,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14) { // (BPICCNT brtarget:$imm, 14) AsmString = "bpos,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6) { // (BPICCNT brtarget:$imm, 6) AsmString = "bneg,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15) { // (BPICCNT brtarget:$imm, 15) AsmString = "bvc,pn %icc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7) { // (BPICCNT brtarget:$imm, 7) AsmString = "bvs,pn %icc, $\x01"; break; } return NULL; case SP_BPXCCANT: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8) { // (BPXCCANT brtarget:$imm, 8) AsmString = "ba,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BPXCCANT brtarget:$imm, 0) AsmString = "bn,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9) { // (BPXCCANT brtarget:$imm, 9) AsmString = "bne,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (BPXCCANT brtarget:$imm, 1) AsmString = "be,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10) { // (BPXCCANT brtarget:$imm, 10) AsmString = "bg,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2) { // (BPXCCANT brtarget:$imm, 2) AsmString = "ble,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11) { // (BPXCCANT brtarget:$imm, 11) AsmString = "bge,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3) { // (BPXCCANT brtarget:$imm, 3) AsmString = "bl,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12) { // (BPXCCANT brtarget:$imm, 12) AsmString = "bgu,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (BPXCCANT brtarget:$imm, 4) AsmString = "bleu,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13) { // (BPXCCANT brtarget:$imm, 13) AsmString = "bcc,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (BPXCCANT brtarget:$imm, 5) AsmString = "bcs,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14) { // (BPXCCANT brtarget:$imm, 14) AsmString = "bpos,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6) { // (BPXCCANT brtarget:$imm, 6) AsmString = "bneg,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15) { // (BPXCCANT brtarget:$imm, 15) AsmString = "bvc,a,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7) { // (BPXCCANT brtarget:$imm, 7) AsmString = "bvs,a,pn %xcc, $\x01"; break; } return NULL; case SP_BPXCCNT: if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 8) { // (BPXCCNT brtarget:$imm, 8) AsmString = "ba,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { // (BPXCCNT brtarget:$imm, 0) AsmString = "bn,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 9) { // (BPXCCNT brtarget:$imm, 9) AsmString = "bne,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { // (BPXCCNT brtarget:$imm, 1) AsmString = "be,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 10) { // (BPXCCNT brtarget:$imm, 10) AsmString = "bg,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 2) { // (BPXCCNT brtarget:$imm, 2) AsmString = "ble,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 11) { // (BPXCCNT brtarget:$imm, 11) AsmString = "bge,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 3) { // (BPXCCNT brtarget:$imm, 3) AsmString = "bl,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 12) { // (BPXCCNT brtarget:$imm, 12) AsmString = "bgu,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { // (BPXCCNT brtarget:$imm, 4) AsmString = "bleu,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 13) { // (BPXCCNT brtarget:$imm, 13) AsmString = "bcc,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { // (BPXCCNT brtarget:$imm, 5) AsmString = "bcs,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 14) { // (BPXCCNT brtarget:$imm, 14) AsmString = "bpos,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 6) { // (BPXCCNT brtarget:$imm, 6) AsmString = "bneg,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 15) { // (BPXCCNT brtarget:$imm, 15) AsmString = "bvc,pn %xcc, $\x01"; break; } if (MCInst_getNumOperands(MI) == 2 && MCOperand_isImm(MCInst_getOperand(MI, 1)) && MCOperand_getImm(MCInst_getOperand(MI, 1)) == 7) { // (BPXCCNT brtarget:$imm, 7) AsmString = "bvs,pn %xcc, $\x01"; break; } return NULL; case SP_FMOVD_ICC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 8) AsmString = "fmovda %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 0) AsmString = "fmovdn %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 9) AsmString = "fmovdne %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 1) AsmString = "fmovde %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 10) AsmString = "fmovdg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 2) AsmString = "fmovdle %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 11) AsmString = "fmovdge %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 3) AsmString = "fmovdl %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 12) AsmString = "fmovdgu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 4) AsmString = "fmovdleu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 13) AsmString = "fmovdcc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 5) AsmString = "fmovdcs %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 14) AsmString = "fmovdpos %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 6) AsmString = "fmovdneg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 15) AsmString = "fmovdvc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (FMOVD_ICC DFPRegs:$rd, DFPRegs:$rs2, 7) AsmString = "fmovdvs %icc, $\x02, $\x01"; break; } return NULL; case SP_FMOVD_XCC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 8) AsmString = "fmovda %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 0) AsmString = "fmovdn %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 9) AsmString = "fmovdne %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 1) AsmString = "fmovde %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 10) AsmString = "fmovdg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 2) AsmString = "fmovdle %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 11) AsmString = "fmovdge %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 3) AsmString = "fmovdl %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 12) AsmString = "fmovdgu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 4) AsmString = "fmovdleu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 13) AsmString = "fmovdcc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 5) AsmString = "fmovdcs %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 14) AsmString = "fmovdpos %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 6) AsmString = "fmovdneg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 15) AsmString = "fmovdvc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (FMOVD_XCC DFPRegs:$rd, DFPRegs:$rs2, 7) AsmString = "fmovdvs %xcc, $\x02, $\x01"; break; } return NULL; case SP_FMOVQ_ICC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 8) AsmString = "fmovqa %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 0) AsmString = "fmovqn %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 9) AsmString = "fmovqne %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 1) AsmString = "fmovqe %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 10) AsmString = "fmovqg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 2) AsmString = "fmovqle %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 11) AsmString = "fmovqge %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 3) AsmString = "fmovql %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 12) AsmString = "fmovqgu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 4) AsmString = "fmovqleu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 13) AsmString = "fmovqcc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 5) AsmString = "fmovqcs %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 14) AsmString = "fmovqpos %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 6) AsmString = "fmovqneg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 15) AsmString = "fmovqvc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, 7) AsmString = "fmovqvs %icc, $\x02, $\x01"; break; } return NULL; case SP_FMOVQ_XCC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 8) AsmString = "fmovqa %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 0) AsmString = "fmovqn %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 9) AsmString = "fmovqne %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 1) AsmString = "fmovqe %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 10) AsmString = "fmovqg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 2) AsmString = "fmovqle %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 11) AsmString = "fmovqge %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 3) AsmString = "fmovql %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 12) AsmString = "fmovqgu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 4) AsmString = "fmovqleu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 13) AsmString = "fmovqcc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 5) AsmString = "fmovqcs %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 14) AsmString = "fmovqpos %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 6) AsmString = "fmovqneg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 15) AsmString = "fmovqvc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, 7) AsmString = "fmovqvs %xcc, $\x02, $\x01"; break; } return NULL; case SP_FMOVS_ICC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 8) AsmString = "fmovsa %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 0) AsmString = "fmovsn %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 9) AsmString = "fmovsne %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 1) AsmString = "fmovse %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 10) AsmString = "fmovsg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 2) AsmString = "fmovsle %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 11) AsmString = "fmovsge %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 3) AsmString = "fmovsl %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 12) AsmString = "fmovsgu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 4) AsmString = "fmovsleu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 13) AsmString = "fmovscc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 5) AsmString = "fmovscs %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 14) AsmString = "fmovspos %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 6) AsmString = "fmovsneg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 15) AsmString = "fmovsvc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (FMOVS_ICC FPRegs:$rd, FPRegs:$rs2, 7) AsmString = "fmovsvs %icc, $\x02, $\x01"; break; } return NULL; case SP_FMOVS_XCC: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 8) AsmString = "fmovsa %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 0) AsmString = "fmovsn %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 9) AsmString = "fmovsne %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 1) AsmString = "fmovse %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 10) AsmString = "fmovsg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 2) AsmString = "fmovsle %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 11) AsmString = "fmovsge %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 3) AsmString = "fmovsl %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 12) AsmString = "fmovsgu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 4) AsmString = "fmovsleu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 13) AsmString = "fmovscc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 5) AsmString = "fmovscs %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 14) AsmString = "fmovspos %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 6) AsmString = "fmovsneg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 15) AsmString = "fmovsvc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (FMOVS_XCC FPRegs:$rd, FPRegs:$rs2, 7) AsmString = "fmovsvs %xcc, $\x02, $\x01"; break; } return NULL; case SP_MOVICCri: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 8) AsmString = "mova %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 0) AsmString = "movn %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 9) AsmString = "movne %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 1) AsmString = "move %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 10) AsmString = "movg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 2) AsmString = "movle %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 11) AsmString = "movge %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 3) AsmString = "movl %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 12) AsmString = "movgu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 4) AsmString = "movleu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 13) AsmString = "movcc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 5) AsmString = "movcs %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 14) AsmString = "movpos %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 6) AsmString = "movneg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 15) AsmString = "movvc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (MOVICCri IntRegs:$rd, i32imm:$simm11, 7) AsmString = "movvs %icc, $\x02, $\x01"; break; } return NULL; case SP_MOVICCrr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 8) AsmString = "mova %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 0) AsmString = "movn %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 9) AsmString = "movne %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 1) AsmString = "move %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 10) AsmString = "movg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 2) AsmString = "movle %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 11) AsmString = "movge %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 3) AsmString = "movl %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 12) AsmString = "movgu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 4) AsmString = "movleu %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 13) AsmString = "movcc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 5) AsmString = "movcs %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 14) AsmString = "movpos %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 6) AsmString = "movneg %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 15) AsmString = "movvc %icc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (MOVICCrr IntRegs:$rd, IntRegs:$rs2, 7) AsmString = "movvs %icc, $\x02, $\x01"; break; } return NULL; case SP_MOVXCCri: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 8) AsmString = "mova %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 0) AsmString = "movn %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 9) AsmString = "movne %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 1) AsmString = "move %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 10) AsmString = "movg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 2) AsmString = "movle %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 11) AsmString = "movge %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 3) AsmString = "movl %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 12) AsmString = "movgu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 4) AsmString = "movleu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 13) AsmString = "movcc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 5) AsmString = "movcs %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 14) AsmString = "movpos %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 6) AsmString = "movneg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 15) AsmString = "movvc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (MOVXCCri IntRegs:$rd, i32imm:$simm11, 7) AsmString = "movvs %xcc, $\x02, $\x01"; break; } return NULL; case SP_MOVXCCrr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 8) AsmString = "mova %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 0) AsmString = "movn %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 9) AsmString = "movne %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 1) AsmString = "move %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 10) AsmString = "movg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 2) AsmString = "movle %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 11) AsmString = "movge %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 3) AsmString = "movl %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 12) AsmString = "movgu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 4) AsmString = "movleu %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 13) AsmString = "movcc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 5) AsmString = "movcs %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 14) AsmString = "movpos %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 6) AsmString = "movneg %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 15) AsmString = "movvc %xcc, $\x02, $\x01"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (MOVXCCrr IntRegs:$rd, IntRegs:$rs2, 7) AsmString = "movvs %xcc, $\x02, $\x01"; break; } return NULL; case SP_ORri: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == SP_G0) { // (ORri IntRegs:$rd, G0, i32imm:$simm13) AsmString = "mov $\x03, $\x01"; break; } return NULL; case SP_ORrr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_getReg(MCInst_getOperand(MI, 1)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2)) { // (ORrr IntRegs:$rd, G0, IntRegs:$rs2) AsmString = "mov $\x03, $\x01"; break; } return NULL; case SP_RESTORErr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_getReg(MCInst_getOperand(MI, 1)) == SP_G0 && MCOperand_getReg(MCInst_getOperand(MI, 2)) == SP_G0) { // (RESTORErr G0, G0, G0) AsmString = "restore"; break; } return NULL; case SP_RET: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8) { // (RET 8) AsmString = "ret"; break; } return NULL; case SP_RETL: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8) { // (RETL 8) AsmString = "retl"; break; } return NULL; case SP_TXCCri: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 8) AsmString = "ta %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (TXCCri G0, i32imm:$imm, 8) AsmString = "ta %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 0) AsmString = "tn %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TXCCri G0, i32imm:$imm, 0) AsmString = "tn %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 9) AsmString = "tne %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (TXCCri G0, i32imm:$imm, 9) AsmString = "tne %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 1) AsmString = "te %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (TXCCri G0, i32imm:$imm, 1) AsmString = "te %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 10) AsmString = "tg %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (TXCCri G0, i32imm:$imm, 10) AsmString = "tg %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 2) AsmString = "tle %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (TXCCri G0, i32imm:$imm, 2) AsmString = "tle %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 11) AsmString = "tge %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (TXCCri G0, i32imm:$imm, 11) AsmString = "tge %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 3) AsmString = "tl %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (TXCCri G0, i32imm:$imm, 3) AsmString = "tl %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 12) AsmString = "tgu %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (TXCCri G0, i32imm:$imm, 12) AsmString = "tgu %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 4) AsmString = "tleu %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (TXCCri G0, i32imm:$imm, 4) AsmString = "tleu %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 13) AsmString = "tcc %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (TXCCri G0, i32imm:$imm, 13) AsmString = "tcc %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 5) AsmString = "tcs %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (TXCCri G0, i32imm:$imm, 5) AsmString = "tcs %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 14) AsmString = "tpos %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (TXCCri G0, i32imm:$imm, 14) AsmString = "tpos %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 6) AsmString = "tneg %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (TXCCri G0, i32imm:$imm, 6) AsmString = "tneg %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 15) AsmString = "tvc %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (TXCCri G0, i32imm:$imm, 15) AsmString = "tvc %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (TXCCri IntRegs:$rs1, i32imm:$imm, 7) AsmString = "tvs %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (TXCCri G0, i32imm:$imm, 7) AsmString = "tvs %xcc, $\x02"; break; } return NULL; case SP_TXCCrr: if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 8) AsmString = "ta %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { // (TXCCrr G0, IntRegs:$rs2, 8) AsmString = "ta %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 0) AsmString = "tn %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { // (TXCCrr G0, IntRegs:$rs2, 0) AsmString = "tn %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 9) AsmString = "tne %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 9) { // (TXCCrr G0, IntRegs:$rs2, 9) AsmString = "tne %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 1) AsmString = "te %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { // (TXCCrr G0, IntRegs:$rs2, 1) AsmString = "te %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 10) AsmString = "tg %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 10) { // (TXCCrr G0, IntRegs:$rs2, 10) AsmString = "tg %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 2) AsmString = "tle %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 2) { // (TXCCrr G0, IntRegs:$rs2, 2) AsmString = "tle %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 11) AsmString = "tge %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 11) { // (TXCCrr G0, IntRegs:$rs2, 11) AsmString = "tge %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 3) AsmString = "tl %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 3) { // (TXCCrr G0, IntRegs:$rs2, 3) AsmString = "tl %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 12) AsmString = "tgu %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 12) { // (TXCCrr G0, IntRegs:$rs2, 12) AsmString = "tgu %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 4) AsmString = "tleu %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 4) { // (TXCCrr G0, IntRegs:$rs2, 4) AsmString = "tleu %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 13) AsmString = "tcc %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 13) { // (TXCCrr G0, IntRegs:$rs2, 13) AsmString = "tcc %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 5) AsmString = "tcs %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 5) { // (TXCCrr G0, IntRegs:$rs2, 5) AsmString = "tcs %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 14) AsmString = "tpos %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 14) { // (TXCCrr G0, IntRegs:$rs2, 14) AsmString = "tpos %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 6) AsmString = "tneg %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 6) { // (TXCCrr G0, IntRegs:$rs2, 6) AsmString = "tneg %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 15) AsmString = "tvc %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 15) { // (TXCCrr G0, IntRegs:$rs2, 15) AsmString = "tvc %xcc, $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (TXCCrr IntRegs:$rs1, IntRegs:$rs2, 7) AsmString = "tvs %xcc, $\x01 + $\x02"; break; } if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_G0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 7) { // (TXCCrr G0, IntRegs:$rs2, 7) AsmString = "tvs %xcc, $\x02"; break; } return NULL; case SP_V9FCMPD: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_FCC0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2)) { // (V9FCMPD FCC0, DFPRegs:$rs1, DFPRegs:$rs2) AsmString = "fcmpd $\x02, $\x03"; break; } return NULL; case SP_V9FCMPED: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_FCC0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2)) { // (V9FCMPED FCC0, DFPRegs:$rs1, DFPRegs:$rs2) AsmString = "fcmped $\x02, $\x03"; break; } return NULL; case SP_V9FCMPEQ: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_FCC0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2)) { // (V9FCMPEQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2) AsmString = "fcmpeq $\x02, $\x03"; break; } return NULL; case SP_V9FCMPES: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_FCC0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2)) { // (V9FCMPES FCC0, FPRegs:$rs1, FPRegs:$rs2) AsmString = "fcmpes $\x02, $\x03"; break; } return NULL; case SP_V9FCMPQ: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_FCC0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2)) { // (V9FCMPQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2) AsmString = "fcmpq $\x02, $\x03"; break; } return NULL; case SP_V9FCMPS: if (MCInst_getNumOperands(MI) == 3 && MCOperand_getReg(MCInst_getOperand(MI, 0)) == SP_FCC0 && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2)) { // (V9FCMPS FCC0, FPRegs:$rs1, FPRegs:$rs2) AsmString = "fcmps $\x02, $\x03"; break; } return NULL; case SP_V9FMOVD_FCC: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 0) AsmString = "fmovda $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 8) AsmString = "fmovdn $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 7) AsmString = "fmovdu $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 6) AsmString = "fmovdg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 5) AsmString = "fmovdug $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 4) AsmString = "fmovdl $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 3) AsmString = "fmovdul $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 2) AsmString = "fmovdlg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 1) AsmString = "fmovdne $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 9) AsmString = "fmovde $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 10) AsmString = "fmovdue $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 11) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 11) AsmString = "fmovdge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 12) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 12) AsmString = "fmovduge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 13) AsmString = "fmovdle $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 14) AsmString = "fmovdule $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_DFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (V9FMOVD_FCC DFPRegs:$rd, FCCRegs:$cc, DFPRegs:$rs2, 15) AsmString = "fmovdo $\x02, $\x03, $\x01"; break; } return NULL; case SP_V9FMOVQ_FCC: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 0) AsmString = "fmovqa $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 8) AsmString = "fmovqn $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 7) AsmString = "fmovqu $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 6) AsmString = "fmovqg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 5) AsmString = "fmovqug $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 4) AsmString = "fmovql $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 3) AsmString = "fmovqul $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 2) AsmString = "fmovqlg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 1) AsmString = "fmovqne $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 9) AsmString = "fmovqe $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 10) AsmString = "fmovque $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 11) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 11) AsmString = "fmovqge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 12) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 12) AsmString = "fmovquge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 13) AsmString = "fmovqle $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 14) AsmString = "fmovqule $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_QFPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (V9FMOVQ_FCC QFPRegs:$rd, FCCRegs:$cc, QFPRegs:$rs2, 15) AsmString = "fmovqo $\x02, $\x03, $\x01"; break; } return NULL; case SP_V9FMOVS_FCC: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 0) AsmString = "fmovsa $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 8) AsmString = "fmovsn $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 7) AsmString = "fmovsu $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 6) AsmString = "fmovsg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 5) AsmString = "fmovsug $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 4) AsmString = "fmovsl $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 3) AsmString = "fmovsul $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 2) AsmString = "fmovslg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 1) AsmString = "fmovsne $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 9) AsmString = "fmovse $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 10) AsmString = "fmovsue $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 11) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 11) AsmString = "fmovsge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 12) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 12) AsmString = "fmovsuge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 13) AsmString = "fmovsle $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 14) AsmString = "fmovsule $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_FPRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (V9FMOVS_FCC FPRegs:$rd, FCCRegs:$cc, FPRegs:$rs2, 15) AsmString = "fmovso $\x02, $\x03, $\x01"; break; } return NULL; case SP_V9MOVFCCri: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 0) AsmString = "mova $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 8) AsmString = "movn $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 7) AsmString = "movu $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 6) AsmString = "movg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 5) AsmString = "movug $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 4) AsmString = "movl $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 3) AsmString = "movul $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 2) AsmString = "movlg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 1) AsmString = "movne $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 9) AsmString = "move $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 10) AsmString = "movue $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 11) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 11) AsmString = "movge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 12) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 12) AsmString = "movuge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 13) AsmString = "movle $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 14) AsmString = "movule $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (V9MOVFCCri IntRegs:$rd, FCCRegs:$cc, i32imm:$simm11, 15) AsmString = "movo $\x02, $\x03, $\x01"; break; } return NULL; case SP_V9MOVFCCrr: if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 0) AsmString = "mova $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 8) AsmString = "movn $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 7) AsmString = "movu $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 6) AsmString = "movg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 5) AsmString = "movug $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 4) AsmString = "movl $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 3) AsmString = "movul $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 2) AsmString = "movlg $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 1) AsmString = "movne $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 9) AsmString = "move $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 10) AsmString = "movue $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 11) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 11) AsmString = "movge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 12) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 12) AsmString = "movuge $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 13) AsmString = "movle $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 14) AsmString = "movule $\x02, $\x03, $\x01"; break; } if (MCInst_getNumOperands(MI) == 4 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 0) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && GETREGCLASS_CONTAIN(SP_FCCRegsRegClassID, 1) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && GETREGCLASS_CONTAIN(SP_IntRegsRegClassID, 2) && MCOperand_isImm(MCInst_getOperand(MI, 3)) && MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { // (V9MOVFCCrr IntRegs:$rd, FCCRegs:$cc, IntRegs:$rs2, 15) AsmString = "movo $\x02, $\x03, $\x01"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); if (strstr(AsmOps, "icc")) Sparc_addReg(MI, SPARC_REG_ICC); if (strstr(AsmOps, "xcc")) Sparc_addReg(MI, SPARC_REG_XCC); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/Sparc/SparcGenDisassemblerTables.inc010066400017500001750000003471431363402546700241610ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * Sparc Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static const uint8_t DecoderTableSparc32[] = { /* 0 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ... /* 3 */ MCD_OPC_FilterValue, 0, 13, 2, // Skip to: 532 /* 7 */ MCD_OPC_ExtractField, 22, 3, // Inst{24-22} ... /* 10 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 24 /* 14 */ MCD_OPC_CheckField, 25, 5, 0, 163, 22, // Skip to: 5815 /* 20 */ MCD_OPC_Decode, 211, 3, 0, // Opcode: UNIMP /* 24 */ MCD_OPC_FilterValue, 1, 103, 0, // Skip to: 131 /* 28 */ MCD_OPC_ExtractField, 19, 3, // Inst{21-19} ... /* 31 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 60 /* 35 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 38 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 49 /* 42 */ MCD_OPC_CheckPredicate, 0, 137, 22, // Skip to: 5815 /* 46 */ MCD_OPC_Decode, 94, 1, // Opcode: BPICCNT /* 49 */ MCD_OPC_FilterValue, 1, 130, 22, // Skip to: 5815 /* 53 */ MCD_OPC_CheckPredicate, 0, 126, 22, // Skip to: 5815 /* 57 */ MCD_OPC_Decode, 93, 1, // Opcode: BPICCANT /* 60 */ MCD_OPC_FilterValue, 1, 25, 0, // Skip to: 89 /* 64 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 67 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 78 /* 71 */ MCD_OPC_CheckPredicate, 0, 108, 22, // Skip to: 5815 /* 75 */ MCD_OPC_Decode, 91, 1, // Opcode: BPICC /* 78 */ MCD_OPC_FilterValue, 1, 101, 22, // Skip to: 5815 /* 82 */ MCD_OPC_CheckPredicate, 0, 97, 22, // Skip to: 5815 /* 86 */ MCD_OPC_Decode, 92, 1, // Opcode: BPICCA /* 89 */ MCD_OPC_FilterValue, 4, 17, 0, // Skip to: 110 /* 93 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 96 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 103 /* 100 */ MCD_OPC_Decode, 110, 1, // Opcode: BPXCCNT /* 103 */ MCD_OPC_FilterValue, 1, 76, 22, // Skip to: 5815 /* 107 */ MCD_OPC_Decode, 109, 1, // Opcode: BPXCCANT /* 110 */ MCD_OPC_FilterValue, 5, 69, 22, // Skip to: 5815 /* 114 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 117 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 124 /* 121 */ MCD_OPC_Decode, 107, 1, // Opcode: BPXCC /* 124 */ MCD_OPC_FilterValue, 1, 55, 22, // Skip to: 5815 /* 128 */ MCD_OPC_Decode, 108, 1, // Opcode: BPXCCA /* 131 */ MCD_OPC_FilterValue, 2, 26, 0, // Skip to: 161 /* 135 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 138 */ MCD_OPC_FilterValue, 0, 12, 0, // Skip to: 154 /* 142 */ MCD_OPC_CheckField, 25, 4, 8, 3, 0, // Skip to: 151 /* 148 */ MCD_OPC_Decode, 73, 0, // Opcode: BA /* 151 */ MCD_OPC_Decode, 74, 2, // Opcode: BCOND /* 154 */ MCD_OPC_FilterValue, 1, 25, 22, // Skip to: 5815 /* 158 */ MCD_OPC_Decode, 75, 2, // Opcode: BCONDA /* 161 */ MCD_OPC_FilterValue, 3, 255, 0, // Skip to: 420 /* 165 */ MCD_OPC_ExtractField, 25, 5, // Inst{29-25} ... /* 168 */ MCD_OPC_FilterValue, 1, 17, 0, // Skip to: 189 /* 172 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 175 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 182 /* 179 */ MCD_OPC_Decode, 113, 3, // Opcode: BPZnapn /* 182 */ MCD_OPC_FilterValue, 1, 253, 21, // Skip to: 5815 /* 186 */ MCD_OPC_Decode, 114, 3, // Opcode: BPZnapt /* 189 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 210 /* 193 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 196 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 203 /* 200 */ MCD_OPC_Decode, 97, 3, // Opcode: BPLEZnapn /* 203 */ MCD_OPC_FilterValue, 1, 232, 21, // Skip to: 5815 /* 207 */ MCD_OPC_Decode, 98, 3, // Opcode: BPLEZnapt /* 210 */ MCD_OPC_FilterValue, 3, 17, 0, // Skip to: 231 /* 214 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 217 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 224 /* 221 */ MCD_OPC_Decode, 101, 3, // Opcode: BPLZnapn /* 224 */ MCD_OPC_FilterValue, 1, 211, 21, // Skip to: 5815 /* 228 */ MCD_OPC_Decode, 102, 3, // Opcode: BPLZnapt /* 231 */ MCD_OPC_FilterValue, 5, 17, 0, // Skip to: 252 /* 235 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 238 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 245 /* 242 */ MCD_OPC_Decode, 105, 3, // Opcode: BPNZnapn /* 245 */ MCD_OPC_FilterValue, 1, 190, 21, // Skip to: 5815 /* 249 */ MCD_OPC_Decode, 106, 3, // Opcode: BPNZnapt /* 252 */ MCD_OPC_FilterValue, 6, 17, 0, // Skip to: 273 /* 256 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 259 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 266 /* 263 */ MCD_OPC_Decode, 89, 3, // Opcode: BPGZnapn /* 266 */ MCD_OPC_FilterValue, 1, 169, 21, // Skip to: 5815 /* 270 */ MCD_OPC_Decode, 90, 3, // Opcode: BPGZnapt /* 273 */ MCD_OPC_FilterValue, 7, 17, 0, // Skip to: 294 /* 277 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 280 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 287 /* 284 */ MCD_OPC_Decode, 85, 3, // Opcode: BPGEZnapn /* 287 */ MCD_OPC_FilterValue, 1, 148, 21, // Skip to: 5815 /* 291 */ MCD_OPC_Decode, 86, 3, // Opcode: BPGEZnapt /* 294 */ MCD_OPC_FilterValue, 17, 17, 0, // Skip to: 315 /* 298 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 301 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 308 /* 305 */ MCD_OPC_Decode, 111, 3, // Opcode: BPZapn /* 308 */ MCD_OPC_FilterValue, 1, 127, 21, // Skip to: 5815 /* 312 */ MCD_OPC_Decode, 112, 3, // Opcode: BPZapt /* 315 */ MCD_OPC_FilterValue, 18, 17, 0, // Skip to: 336 /* 319 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 322 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 329 /* 326 */ MCD_OPC_Decode, 95, 3, // Opcode: BPLEZapn /* 329 */ MCD_OPC_FilterValue, 1, 106, 21, // Skip to: 5815 /* 333 */ MCD_OPC_Decode, 96, 3, // Opcode: BPLEZapt /* 336 */ MCD_OPC_FilterValue, 19, 17, 0, // Skip to: 357 /* 340 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 343 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 350 /* 347 */ MCD_OPC_Decode, 99, 3, // Opcode: BPLZapn /* 350 */ MCD_OPC_FilterValue, 1, 85, 21, // Skip to: 5815 /* 354 */ MCD_OPC_Decode, 100, 3, // Opcode: BPLZapt /* 357 */ MCD_OPC_FilterValue, 21, 17, 0, // Skip to: 378 /* 361 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 364 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 371 /* 368 */ MCD_OPC_Decode, 103, 3, // Opcode: BPNZapn /* 371 */ MCD_OPC_FilterValue, 1, 64, 21, // Skip to: 5815 /* 375 */ MCD_OPC_Decode, 104, 3, // Opcode: BPNZapt /* 378 */ MCD_OPC_FilterValue, 22, 17, 0, // Skip to: 399 /* 382 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 385 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 392 /* 389 */ MCD_OPC_Decode, 87, 3, // Opcode: BPGZapn /* 392 */ MCD_OPC_FilterValue, 1, 43, 21, // Skip to: 5815 /* 396 */ MCD_OPC_Decode, 88, 3, // Opcode: BPGZapt /* 399 */ MCD_OPC_FilterValue, 23, 36, 21, // Skip to: 5815 /* 403 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 406 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 413 /* 410 */ MCD_OPC_Decode, 83, 3, // Opcode: BPGEZapn /* 413 */ MCD_OPC_FilterValue, 1, 22, 21, // Skip to: 5815 /* 417 */ MCD_OPC_Decode, 84, 3, // Opcode: BPGEZapt /* 420 */ MCD_OPC_FilterValue, 4, 20, 0, // Skip to: 444 /* 424 */ MCD_OPC_CheckField, 25, 5, 0, 10, 0, // Skip to: 440 /* 430 */ MCD_OPC_CheckField, 0, 22, 0, 4, 0, // Skip to: 440 /* 436 */ MCD_OPC_Decode, 224, 2, 4, // Opcode: NOP /* 440 */ MCD_OPC_Decode, 135, 3, 5, // Opcode: SETHIi /* 444 */ MCD_OPC_FilterValue, 5, 61, 0, // Skip to: 509 /* 448 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ... /* 451 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 480 /* 455 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 458 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 469 /* 462 */ MCD_OPC_CheckPredicate, 0, 229, 20, // Skip to: 5815 /* 466 */ MCD_OPC_Decode, 82, 6, // Opcode: BPFCCNT /* 469 */ MCD_OPC_FilterValue, 1, 222, 20, // Skip to: 5815 /* 473 */ MCD_OPC_CheckPredicate, 0, 218, 20, // Skip to: 5815 /* 477 */ MCD_OPC_Decode, 81, 6, // Opcode: BPFCCANT /* 480 */ MCD_OPC_FilterValue, 1, 211, 20, // Skip to: 5815 /* 484 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 487 */ MCD_OPC_FilterValue, 0, 7, 0, // Skip to: 498 /* 491 */ MCD_OPC_CheckPredicate, 0, 200, 20, // Skip to: 5815 /* 495 */ MCD_OPC_Decode, 79, 6, // Opcode: BPFCC /* 498 */ MCD_OPC_FilterValue, 1, 193, 20, // Skip to: 5815 /* 502 */ MCD_OPC_CheckPredicate, 0, 189, 20, // Skip to: 5815 /* 506 */ MCD_OPC_Decode, 80, 6, // Opcode: BPFCCA /* 509 */ MCD_OPC_FilterValue, 6, 182, 20, // Skip to: 5815 /* 513 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 516 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 524 /* 520 */ MCD_OPC_Decode, 151, 1, 2, // Opcode: FBCOND /* 524 */ MCD_OPC_FilterValue, 1, 167, 20, // Skip to: 5815 /* 528 */ MCD_OPC_Decode, 152, 1, 2, // Opcode: FBCONDA /* 532 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 539 /* 536 */ MCD_OPC_Decode, 116, 7, // Opcode: CALL /* 539 */ MCD_OPC_FilterValue, 2, 87, 18, // Skip to: 5238 /* 543 */ MCD_OPC_ExtractField, 19, 6, // Inst{24-19} ... /* 546 */ MCD_OPC_FilterValue, 0, 23, 0, // Skip to: 573 /* 550 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 553 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 566 /* 557 */ MCD_OPC_CheckField, 5, 8, 0, 132, 20, // Skip to: 5815 /* 563 */ MCD_OPC_Decode, 33, 8, // Opcode: ADDrr /* 566 */ MCD_OPC_FilterValue, 1, 125, 20, // Skip to: 5815 /* 570 */ MCD_OPC_Decode, 32, 9, // Opcode: ADDri /* 573 */ MCD_OPC_FilterValue, 1, 23, 0, // Skip to: 600 /* 577 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 580 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 593 /* 584 */ MCD_OPC_CheckField, 5, 8, 0, 105, 20, // Skip to: 5815 /* 590 */ MCD_OPC_Decode, 48, 8, // Opcode: ANDrr /* 593 */ MCD_OPC_FilterValue, 1, 98, 20, // Skip to: 5815 /* 597 */ MCD_OPC_Decode, 47, 9, // Opcode: ANDri /* 600 */ MCD_OPC_FilterValue, 2, 25, 0, // Skip to: 629 /* 604 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 607 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 621 /* 611 */ MCD_OPC_CheckField, 5, 8, 0, 78, 20, // Skip to: 5815 /* 617 */ MCD_OPC_Decode, 235, 2, 8, // Opcode: ORrr /* 621 */ MCD_OPC_FilterValue, 1, 70, 20, // Skip to: 5815 /* 625 */ MCD_OPC_Decode, 234, 2, 9, // Opcode: ORri /* 629 */ MCD_OPC_FilterValue, 3, 25, 0, // Skip to: 658 /* 633 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 636 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 650 /* 640 */ MCD_OPC_CheckField, 5, 8, 0, 49, 20, // Skip to: 5815 /* 646 */ MCD_OPC_Decode, 237, 3, 8, // Opcode: XORrr /* 650 */ MCD_OPC_FilterValue, 1, 41, 20, // Skip to: 5815 /* 654 */ MCD_OPC_Decode, 236, 3, 9, // Opcode: XORri /* 658 */ MCD_OPC_FilterValue, 4, 25, 0, // Skip to: 687 /* 662 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 665 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 679 /* 669 */ MCD_OPC_CheckField, 5, 8, 0, 20, 20, // Skip to: 5815 /* 675 */ MCD_OPC_Decode, 178, 3, 8, // Opcode: SUBrr /* 679 */ MCD_OPC_FilterValue, 1, 12, 20, // Skip to: 5815 /* 683 */ MCD_OPC_Decode, 177, 3, 9, // Opcode: SUBri /* 687 */ MCD_OPC_FilterValue, 5, 23, 0, // Skip to: 714 /* 691 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 694 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 707 /* 698 */ MCD_OPC_CheckField, 5, 8, 0, 247, 19, // Skip to: 5815 /* 704 */ MCD_OPC_Decode, 43, 8, // Opcode: ANDNrr /* 707 */ MCD_OPC_FilterValue, 1, 240, 19, // Skip to: 5815 /* 711 */ MCD_OPC_Decode, 42, 9, // Opcode: ANDNri /* 714 */ MCD_OPC_FilterValue, 6, 25, 0, // Skip to: 743 /* 718 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 721 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 735 /* 725 */ MCD_OPC_CheckField, 5, 8, 0, 220, 19, // Skip to: 5815 /* 731 */ MCD_OPC_Decode, 230, 2, 8, // Opcode: ORNrr /* 735 */ MCD_OPC_FilterValue, 1, 212, 19, // Skip to: 5815 /* 739 */ MCD_OPC_Decode, 229, 2, 9, // Opcode: ORNri /* 743 */ MCD_OPC_FilterValue, 7, 25, 0, // Skip to: 772 /* 747 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 750 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 764 /* 754 */ MCD_OPC_CheckField, 5, 8, 0, 191, 19, // Skip to: 5815 /* 760 */ MCD_OPC_Decode, 231, 3, 8, // Opcode: XNORrr /* 764 */ MCD_OPC_FilterValue, 1, 183, 19, // Skip to: 5815 /* 768 */ MCD_OPC_Decode, 230, 3, 9, // Opcode: XNORri /* 772 */ MCD_OPC_FilterValue, 8, 23, 0, // Skip to: 799 /* 776 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 779 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 792 /* 783 */ MCD_OPC_CheckField, 5, 8, 0, 162, 19, // Skip to: 5815 /* 789 */ MCD_OPC_Decode, 25, 8, // Opcode: ADDCrr /* 792 */ MCD_OPC_FilterValue, 1, 155, 19, // Skip to: 5815 /* 796 */ MCD_OPC_Decode, 24, 9, // Opcode: ADDCri /* 799 */ MCD_OPC_FilterValue, 9, 25, 0, // Skip to: 828 /* 803 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 806 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 820 /* 810 */ MCD_OPC_CheckField, 5, 8, 0, 135, 19, // Skip to: 5815 /* 816 */ MCD_OPC_Decode, 223, 2, 10, // Opcode: MULXrr /* 820 */ MCD_OPC_FilterValue, 1, 127, 19, // Skip to: 5815 /* 824 */ MCD_OPC_Decode, 222, 2, 11, // Opcode: MULXri /* 828 */ MCD_OPC_FilterValue, 10, 25, 0, // Skip to: 857 /* 832 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 835 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 849 /* 839 */ MCD_OPC_CheckField, 5, 8, 0, 106, 19, // Skip to: 5815 /* 845 */ MCD_OPC_Decode, 210, 3, 8, // Opcode: UMULrr /* 849 */ MCD_OPC_FilterValue, 1, 98, 19, // Skip to: 5815 /* 853 */ MCD_OPC_Decode, 209, 3, 9, // Opcode: UMULri /* 857 */ MCD_OPC_FilterValue, 11, 25, 0, // Skip to: 886 /* 861 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 864 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 878 /* 868 */ MCD_OPC_CheckField, 5, 8, 0, 77, 19, // Skip to: 5815 /* 874 */ MCD_OPC_Decode, 145, 3, 8, // Opcode: SMULrr /* 878 */ MCD_OPC_FilterValue, 1, 69, 19, // Skip to: 5815 /* 882 */ MCD_OPC_Decode, 144, 3, 9, // Opcode: SMULri /* 886 */ MCD_OPC_FilterValue, 12, 25, 0, // Skip to: 915 /* 890 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 893 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 907 /* 897 */ MCD_OPC_CheckField, 5, 8, 0, 48, 19, // Skip to: 5815 /* 903 */ MCD_OPC_Decode, 172, 3, 8, // Opcode: SUBCrr /* 907 */ MCD_OPC_FilterValue, 1, 40, 19, // Skip to: 5815 /* 911 */ MCD_OPC_Decode, 171, 3, 9, // Opcode: SUBCri /* 915 */ MCD_OPC_FilterValue, 13, 25, 0, // Skip to: 944 /* 919 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 922 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 936 /* 926 */ MCD_OPC_CheckField, 5, 8, 0, 19, 19, // Skip to: 5815 /* 932 */ MCD_OPC_Decode, 203, 3, 10, // Opcode: UDIVXrr /* 936 */ MCD_OPC_FilterValue, 1, 11, 19, // Skip to: 5815 /* 940 */ MCD_OPC_Decode, 202, 3, 11, // Opcode: UDIVXri /* 944 */ MCD_OPC_FilterValue, 14, 25, 0, // Skip to: 973 /* 948 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 951 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 965 /* 955 */ MCD_OPC_CheckField, 5, 8, 0, 246, 18, // Skip to: 5815 /* 961 */ MCD_OPC_Decode, 205, 3, 8, // Opcode: UDIVrr /* 965 */ MCD_OPC_FilterValue, 1, 238, 18, // Skip to: 5815 /* 969 */ MCD_OPC_Decode, 204, 3, 9, // Opcode: UDIVri /* 973 */ MCD_OPC_FilterValue, 15, 25, 0, // Skip to: 1002 /* 977 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 980 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 994 /* 984 */ MCD_OPC_CheckField, 5, 8, 0, 217, 18, // Skip to: 5815 /* 990 */ MCD_OPC_Decode, 253, 2, 8, // Opcode: SDIVrr /* 994 */ MCD_OPC_FilterValue, 1, 209, 18, // Skip to: 5815 /* 998 */ MCD_OPC_Decode, 252, 2, 9, // Opcode: SDIVri /* 1002 */ MCD_OPC_FilterValue, 16, 23, 0, // Skip to: 1029 /* 1006 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1009 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1022 /* 1013 */ MCD_OPC_CheckField, 5, 8, 0, 188, 18, // Skip to: 5815 /* 1019 */ MCD_OPC_Decode, 23, 8, // Opcode: ADDCCrr /* 1022 */ MCD_OPC_FilterValue, 1, 181, 18, // Skip to: 5815 /* 1026 */ MCD_OPC_Decode, 22, 9, // Opcode: ADDCCri /* 1029 */ MCD_OPC_FilterValue, 17, 23, 0, // Skip to: 1056 /* 1033 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1036 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1049 /* 1040 */ MCD_OPC_CheckField, 5, 8, 0, 161, 18, // Skip to: 5815 /* 1046 */ MCD_OPC_Decode, 39, 8, // Opcode: ANDCCrr /* 1049 */ MCD_OPC_FilterValue, 1, 154, 18, // Skip to: 5815 /* 1053 */ MCD_OPC_Decode, 38, 9, // Opcode: ANDCCri /* 1056 */ MCD_OPC_FilterValue, 18, 25, 0, // Skip to: 1085 /* 1060 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1063 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1077 /* 1067 */ MCD_OPC_CheckField, 5, 8, 0, 134, 18, // Skip to: 5815 /* 1073 */ MCD_OPC_Decode, 226, 2, 8, // Opcode: ORCCrr /* 1077 */ MCD_OPC_FilterValue, 1, 126, 18, // Skip to: 5815 /* 1081 */ MCD_OPC_Decode, 225, 2, 9, // Opcode: ORCCri /* 1085 */ MCD_OPC_FilterValue, 19, 25, 0, // Skip to: 1114 /* 1089 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1092 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1106 /* 1096 */ MCD_OPC_CheckField, 5, 8, 0, 105, 18, // Skip to: 5815 /* 1102 */ MCD_OPC_Decode, 233, 3, 8, // Opcode: XORCCrr /* 1106 */ MCD_OPC_FilterValue, 1, 97, 18, // Skip to: 5815 /* 1110 */ MCD_OPC_Decode, 232, 3, 9, // Opcode: XORCCri /* 1114 */ MCD_OPC_FilterValue, 20, 44, 0, // Skip to: 1162 /* 1118 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1121 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 1145 /* 1125 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... /* 1128 */ MCD_OPC_FilterValue, 0, 75, 18, // Skip to: 5815 /* 1132 */ MCD_OPC_CheckField, 25, 5, 0, 3, 0, // Skip to: 1141 /* 1138 */ MCD_OPC_Decode, 125, 12, // Opcode: CMPrr /* 1141 */ MCD_OPC_Decode, 170, 3, 8, // Opcode: SUBCCrr /* 1145 */ MCD_OPC_FilterValue, 1, 58, 18, // Skip to: 5815 /* 1149 */ MCD_OPC_CheckField, 25, 5, 0, 3, 0, // Skip to: 1158 /* 1155 */ MCD_OPC_Decode, 124, 13, // Opcode: CMPri /* 1158 */ MCD_OPC_Decode, 169, 3, 9, // Opcode: SUBCCri /* 1162 */ MCD_OPC_FilterValue, 21, 23, 0, // Skip to: 1189 /* 1166 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1169 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1182 /* 1173 */ MCD_OPC_CheckField, 5, 8, 0, 28, 18, // Skip to: 5815 /* 1179 */ MCD_OPC_Decode, 41, 8, // Opcode: ANDNCCrr /* 1182 */ MCD_OPC_FilterValue, 1, 21, 18, // Skip to: 5815 /* 1186 */ MCD_OPC_Decode, 40, 9, // Opcode: ANDNCCri /* 1189 */ MCD_OPC_FilterValue, 22, 25, 0, // Skip to: 1218 /* 1193 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1196 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1210 /* 1200 */ MCD_OPC_CheckField, 5, 8, 0, 1, 18, // Skip to: 5815 /* 1206 */ MCD_OPC_Decode, 228, 2, 8, // Opcode: ORNCCrr /* 1210 */ MCD_OPC_FilterValue, 1, 249, 17, // Skip to: 5815 /* 1214 */ MCD_OPC_Decode, 227, 2, 9, // Opcode: ORNCCri /* 1218 */ MCD_OPC_FilterValue, 23, 25, 0, // Skip to: 1247 /* 1222 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1225 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1239 /* 1229 */ MCD_OPC_CheckField, 5, 8, 0, 228, 17, // Skip to: 5815 /* 1235 */ MCD_OPC_Decode, 228, 3, 8, // Opcode: XNORCCrr /* 1239 */ MCD_OPC_FilterValue, 1, 220, 17, // Skip to: 5815 /* 1243 */ MCD_OPC_Decode, 227, 3, 9, // Opcode: XNORCCri /* 1247 */ MCD_OPC_FilterValue, 24, 23, 0, // Skip to: 1274 /* 1251 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1254 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1267 /* 1258 */ MCD_OPC_CheckField, 5, 8, 0, 199, 17, // Skip to: 5815 /* 1264 */ MCD_OPC_Decode, 27, 8, // Opcode: ADDErr /* 1267 */ MCD_OPC_FilterValue, 1, 192, 17, // Skip to: 5815 /* 1271 */ MCD_OPC_Decode, 26, 9, // Opcode: ADDEri /* 1274 */ MCD_OPC_FilterValue, 26, 25, 0, // Skip to: 1303 /* 1278 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1281 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1295 /* 1285 */ MCD_OPC_CheckField, 5, 8, 0, 172, 17, // Skip to: 5815 /* 1291 */ MCD_OPC_Decode, 207, 3, 8, // Opcode: UMULCCrr /* 1295 */ MCD_OPC_FilterValue, 1, 164, 17, // Skip to: 5815 /* 1299 */ MCD_OPC_Decode, 206, 3, 9, // Opcode: UMULCCri /* 1303 */ MCD_OPC_FilterValue, 27, 25, 0, // Skip to: 1332 /* 1307 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1310 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1324 /* 1314 */ MCD_OPC_CheckField, 5, 8, 0, 143, 17, // Skip to: 5815 /* 1320 */ MCD_OPC_Decode, 143, 3, 8, // Opcode: SMULCCrr /* 1324 */ MCD_OPC_FilterValue, 1, 135, 17, // Skip to: 5815 /* 1328 */ MCD_OPC_Decode, 142, 3, 9, // Opcode: SMULCCri /* 1332 */ MCD_OPC_FilterValue, 28, 25, 0, // Skip to: 1361 /* 1336 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1339 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1353 /* 1343 */ MCD_OPC_CheckField, 5, 8, 0, 114, 17, // Skip to: 5815 /* 1349 */ MCD_OPC_Decode, 174, 3, 8, // Opcode: SUBErr /* 1353 */ MCD_OPC_FilterValue, 1, 106, 17, // Skip to: 5815 /* 1357 */ MCD_OPC_Decode, 173, 3, 9, // Opcode: SUBEri /* 1361 */ MCD_OPC_FilterValue, 30, 25, 0, // Skip to: 1390 /* 1365 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1368 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1382 /* 1372 */ MCD_OPC_CheckField, 5, 8, 0, 85, 17, // Skip to: 5815 /* 1378 */ MCD_OPC_Decode, 201, 3, 8, // Opcode: UDIVCCrr /* 1382 */ MCD_OPC_FilterValue, 1, 77, 17, // Skip to: 5815 /* 1386 */ MCD_OPC_Decode, 200, 3, 9, // Opcode: UDIVCCri /* 1390 */ MCD_OPC_FilterValue, 31, 25, 0, // Skip to: 1419 /* 1394 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1397 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1411 /* 1401 */ MCD_OPC_CheckField, 5, 8, 0, 56, 17, // Skip to: 5815 /* 1407 */ MCD_OPC_Decode, 249, 2, 8, // Opcode: SDIVCCrr /* 1411 */ MCD_OPC_FilterValue, 1, 48, 17, // Skip to: 5815 /* 1415 */ MCD_OPC_Decode, 248, 2, 9, // Opcode: SDIVCCri /* 1419 */ MCD_OPC_FilterValue, 32, 25, 0, // Skip to: 1448 /* 1423 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1426 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1440 /* 1430 */ MCD_OPC_CheckField, 5, 8, 0, 27, 17, // Skip to: 5815 /* 1436 */ MCD_OPC_Decode, 186, 3, 8, // Opcode: TADDCCrr /* 1440 */ MCD_OPC_FilterValue, 1, 19, 17, // Skip to: 5815 /* 1444 */ MCD_OPC_Decode, 185, 3, 9, // Opcode: TADDCCri /* 1448 */ MCD_OPC_FilterValue, 33, 25, 0, // Skip to: 1477 /* 1452 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1455 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1469 /* 1459 */ MCD_OPC_CheckField, 5, 8, 0, 254, 16, // Skip to: 5815 /* 1465 */ MCD_OPC_Decode, 197, 3, 8, // Opcode: TSUBCCrr /* 1469 */ MCD_OPC_FilterValue, 1, 246, 16, // Skip to: 5815 /* 1473 */ MCD_OPC_Decode, 196, 3, 9, // Opcode: TSUBCCri /* 1477 */ MCD_OPC_FilterValue, 34, 25, 0, // Skip to: 1506 /* 1481 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1484 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1498 /* 1488 */ MCD_OPC_CheckField, 5, 8, 0, 225, 16, // Skip to: 5815 /* 1494 */ MCD_OPC_Decode, 184, 3, 8, // Opcode: TADDCCTVrr /* 1498 */ MCD_OPC_FilterValue, 1, 217, 16, // Skip to: 5815 /* 1502 */ MCD_OPC_Decode, 183, 3, 9, // Opcode: TADDCCTVri /* 1506 */ MCD_OPC_FilterValue, 35, 25, 0, // Skip to: 1535 /* 1510 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1513 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1527 /* 1517 */ MCD_OPC_CheckField, 5, 8, 0, 196, 16, // Skip to: 5815 /* 1523 */ MCD_OPC_Decode, 195, 3, 8, // Opcode: TSUBCCTVrr /* 1527 */ MCD_OPC_FilterValue, 1, 188, 16, // Skip to: 5815 /* 1531 */ MCD_OPC_Decode, 194, 3, 9, // Opcode: TSUBCCTVri /* 1535 */ MCD_OPC_FilterValue, 37, 50, 0, // Skip to: 1589 /* 1539 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1542 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 1571 /* 1546 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 1549 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1563 /* 1553 */ MCD_OPC_CheckField, 5, 7, 0, 160, 16, // Skip to: 5815 /* 1559 */ MCD_OPC_Decode, 141, 3, 8, // Opcode: SLLrr /* 1563 */ MCD_OPC_FilterValue, 1, 152, 16, // Skip to: 5815 /* 1567 */ MCD_OPC_Decode, 139, 3, 14, // Opcode: SLLXrr /* 1571 */ MCD_OPC_FilterValue, 1, 144, 16, // Skip to: 5815 /* 1575 */ MCD_OPC_CheckField, 12, 1, 1, 4, 0, // Skip to: 1585 /* 1581 */ MCD_OPC_Decode, 138, 3, 15, // Opcode: SLLXri /* 1585 */ MCD_OPC_Decode, 140, 3, 9, // Opcode: SLLri /* 1589 */ MCD_OPC_FilterValue, 38, 50, 0, // Skip to: 1643 /* 1593 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1596 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 1625 /* 1600 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 1603 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1617 /* 1607 */ MCD_OPC_CheckField, 5, 7, 0, 106, 16, // Skip to: 5815 /* 1613 */ MCD_OPC_Decode, 153, 3, 8, // Opcode: SRLrr /* 1617 */ MCD_OPC_FilterValue, 1, 98, 16, // Skip to: 5815 /* 1621 */ MCD_OPC_Decode, 151, 3, 14, // Opcode: SRLXrr /* 1625 */ MCD_OPC_FilterValue, 1, 90, 16, // Skip to: 5815 /* 1629 */ MCD_OPC_CheckField, 12, 1, 1, 4, 0, // Skip to: 1639 /* 1635 */ MCD_OPC_Decode, 150, 3, 15, // Opcode: SRLXri /* 1639 */ MCD_OPC_Decode, 152, 3, 9, // Opcode: SRLri /* 1643 */ MCD_OPC_FilterValue, 39, 50, 0, // Skip to: 1697 /* 1647 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1650 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 1679 /* 1654 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 1657 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1671 /* 1661 */ MCD_OPC_CheckField, 5, 7, 0, 52, 16, // Skip to: 5815 /* 1667 */ MCD_OPC_Decode, 149, 3, 8, // Opcode: SRArr /* 1671 */ MCD_OPC_FilterValue, 1, 44, 16, // Skip to: 5815 /* 1675 */ MCD_OPC_Decode, 147, 3, 14, // Opcode: SRAXrr /* 1679 */ MCD_OPC_FilterValue, 1, 36, 16, // Skip to: 5815 /* 1683 */ MCD_OPC_CheckField, 12, 1, 1, 4, 0, // Skip to: 1693 /* 1689 */ MCD_OPC_Decode, 146, 3, 15, // Opcode: SRAXri /* 1693 */ MCD_OPC_Decode, 148, 3, 9, // Opcode: SRAri /* 1697 */ MCD_OPC_FilterValue, 40, 55, 0, // Skip to: 1756 /* 1701 */ MCD_OPC_ExtractField, 13, 6, // Inst{18-13} ... /* 1704 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1718 /* 1708 */ MCD_OPC_CheckField, 0, 13, 0, 5, 16, // Skip to: 5815 /* 1714 */ MCD_OPC_Decode, 239, 2, 4, // Opcode: RDY /* 1718 */ MCD_OPC_FilterValue, 30, 16, 0, // Skip to: 1738 /* 1722 */ MCD_OPC_CheckField, 25, 5, 0, 247, 15, // Skip to: 5815 /* 1728 */ MCD_OPC_CheckField, 0, 13, 0, 241, 15, // Skip to: 5815 /* 1734 */ MCD_OPC_Decode, 154, 3, 4, // Opcode: STBAR /* 1738 */ MCD_OPC_FilterValue, 31, 233, 15, // Skip to: 5815 /* 1742 */ MCD_OPC_CheckPredicate, 0, 229, 15, // Skip to: 5815 /* 1746 */ MCD_OPC_CheckField, 25, 5, 0, 223, 15, // Skip to: 5815 /* 1752 */ MCD_OPC_Decode, 198, 2, 16, // Opcode: MEMBARi /* 1756 */ MCD_OPC_FilterValue, 43, 20, 0, // Skip to: 1780 /* 1760 */ MCD_OPC_CheckPredicate, 0, 211, 15, // Skip to: 5815 /* 1764 */ MCD_OPC_CheckField, 25, 5, 0, 205, 15, // Skip to: 5815 /* 1770 */ MCD_OPC_CheckField, 0, 19, 0, 199, 15, // Skip to: 5815 /* 1776 */ MCD_OPC_Decode, 183, 1, 4, // Opcode: FLUSHW /* 1780 */ MCD_OPC_FilterValue, 44, 123, 0, // Skip to: 1907 /* 1784 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1787 */ MCD_OPC_FilterValue, 0, 56, 0, // Skip to: 1847 /* 1791 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 1794 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 1820 /* 1798 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 1812 /* 1802 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 1812 /* 1808 */ MCD_OPC_Decode, 201, 2, 17, // Opcode: MOVFCCrr /* 1812 */ MCD_OPC_CheckPredicate, 0, 159, 15, // Skip to: 5815 /* 1816 */ MCD_OPC_Decode, 222, 3, 18, // Opcode: V9MOVFCCrr /* 1820 */ MCD_OPC_FilterValue, 1, 151, 15, // Skip to: 5815 /* 1824 */ MCD_OPC_ExtractField, 11, 2, // Inst{12-11} ... /* 1827 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1839 /* 1831 */ MCD_OPC_CheckPredicate, 0, 140, 15, // Skip to: 5815 /* 1835 */ MCD_OPC_Decode, 203, 2, 17, // Opcode: MOVICCrr /* 1839 */ MCD_OPC_FilterValue, 2, 132, 15, // Skip to: 5815 /* 1843 */ MCD_OPC_Decode, 220, 2, 17, // Opcode: MOVXCCrr /* 1847 */ MCD_OPC_FilterValue, 1, 124, 15, // Skip to: 5815 /* 1851 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 1854 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 1880 /* 1858 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 1872 /* 1862 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 1872 /* 1868 */ MCD_OPC_Decode, 200, 2, 19, // Opcode: MOVFCCri /* 1872 */ MCD_OPC_CheckPredicate, 0, 99, 15, // Skip to: 5815 /* 1876 */ MCD_OPC_Decode, 221, 3, 20, // Opcode: V9MOVFCCri /* 1880 */ MCD_OPC_FilterValue, 1, 91, 15, // Skip to: 5815 /* 1884 */ MCD_OPC_ExtractField, 11, 2, // Inst{12-11} ... /* 1887 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1899 /* 1891 */ MCD_OPC_CheckPredicate, 0, 80, 15, // Skip to: 5815 /* 1895 */ MCD_OPC_Decode, 202, 2, 19, // Opcode: MOVICCri /* 1899 */ MCD_OPC_FilterValue, 2, 72, 15, // Skip to: 5815 /* 1903 */ MCD_OPC_Decode, 219, 2, 19, // Opcode: MOVXCCri /* 1907 */ MCD_OPC_FilterValue, 45, 25, 0, // Skip to: 1936 /* 1911 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 1914 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1928 /* 1918 */ MCD_OPC_CheckField, 5, 8, 0, 51, 15, // Skip to: 5815 /* 1924 */ MCD_OPC_Decode, 251, 2, 10, // Opcode: SDIVXrr /* 1928 */ MCD_OPC_FilterValue, 1, 43, 15, // Skip to: 5815 /* 1932 */ MCD_OPC_Decode, 250, 2, 11, // Opcode: SDIVXri /* 1936 */ MCD_OPC_FilterValue, 46, 14, 0, // Skip to: 1954 /* 1940 */ MCD_OPC_CheckPredicate, 0, 31, 15, // Skip to: 5815 /* 1944 */ MCD_OPC_CheckField, 5, 14, 0, 25, 15, // Skip to: 5815 /* 1950 */ MCD_OPC_Decode, 238, 2, 21, // Opcode: POPCrr /* 1954 */ MCD_OPC_FilterValue, 47, 135, 0, // Skip to: 2093 /* 1958 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ... /* 1961 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 1975 /* 1965 */ MCD_OPC_CheckField, 5, 5, 0, 4, 15, // Skip to: 5815 /* 1971 */ MCD_OPC_Decode, 215, 2, 14, // Opcode: MOVRRZrr /* 1975 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 1989 /* 1979 */ MCD_OPC_CheckField, 5, 5, 0, 246, 14, // Skip to: 5815 /* 1985 */ MCD_OPC_Decode, 209, 2, 14, // Opcode: MOVRLEZrr /* 1989 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 2003 /* 1993 */ MCD_OPC_CheckField, 5, 5, 0, 232, 14, // Skip to: 5815 /* 1999 */ MCD_OPC_Decode, 211, 2, 14, // Opcode: MOVRLZrr /* 2003 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 2017 /* 2007 */ MCD_OPC_CheckField, 5, 5, 0, 218, 14, // Skip to: 5815 /* 2013 */ MCD_OPC_Decode, 213, 2, 14, // Opcode: MOVRNZrr /* 2017 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 2031 /* 2021 */ MCD_OPC_CheckField, 5, 5, 0, 204, 14, // Skip to: 5815 /* 2027 */ MCD_OPC_Decode, 207, 2, 14, // Opcode: MOVRGZrr /* 2031 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 2045 /* 2035 */ MCD_OPC_CheckField, 5, 5, 0, 190, 14, // Skip to: 5815 /* 2041 */ MCD_OPC_Decode, 205, 2, 14, // Opcode: MOVRGEZrr /* 2045 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 2053 /* 2049 */ MCD_OPC_Decode, 214, 2, 22, // Opcode: MOVRRZri /* 2053 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 2061 /* 2057 */ MCD_OPC_Decode, 208, 2, 22, // Opcode: MOVRLEZri /* 2061 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 2069 /* 2065 */ MCD_OPC_Decode, 210, 2, 22, // Opcode: MOVRLZri /* 2069 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 2077 /* 2073 */ MCD_OPC_Decode, 212, 2, 22, // Opcode: MOVRNZri /* 2077 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 2085 /* 2081 */ MCD_OPC_Decode, 206, 2, 22, // Opcode: MOVRGZri /* 2085 */ MCD_OPC_FilterValue, 15, 142, 14, // Skip to: 5815 /* 2089 */ MCD_OPC_Decode, 204, 2, 22, // Opcode: MOVRGEZri /* 2093 */ MCD_OPC_FilterValue, 48, 37, 0, // Skip to: 2134 /* 2097 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 2100 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 2120 /* 2104 */ MCD_OPC_CheckField, 25, 5, 0, 121, 14, // Skip to: 5815 /* 2110 */ MCD_OPC_CheckField, 5, 8, 0, 115, 14, // Skip to: 5815 /* 2116 */ MCD_OPC_Decode, 224, 3, 12, // Opcode: WRYrr /* 2120 */ MCD_OPC_FilterValue, 1, 107, 14, // Skip to: 5815 /* 2124 */ MCD_OPC_CheckField, 25, 5, 0, 101, 14, // Skip to: 5815 /* 2130 */ MCD_OPC_Decode, 223, 3, 13, // Opcode: WRYri /* 2134 */ MCD_OPC_FilterValue, 52, 197, 2, // Skip to: 2847 /* 2138 */ MCD_OPC_ExtractField, 5, 9, // Inst{13-5} ... /* 2141 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 2155 /* 2145 */ MCD_OPC_CheckField, 14, 5, 0, 80, 14, // Skip to: 5815 /* 2151 */ MCD_OPC_Decode, 211, 1, 23, // Opcode: FMOVS /* 2155 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 2173 /* 2159 */ MCD_OPC_CheckPredicate, 0, 68, 14, // Skip to: 5815 /* 2163 */ MCD_OPC_CheckField, 14, 5, 0, 62, 14, // Skip to: 5815 /* 2169 */ MCD_OPC_Decode, 185, 1, 24, // Opcode: FMOVD /* 2173 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 2191 /* 2177 */ MCD_OPC_CheckPredicate, 0, 50, 14, // Skip to: 5815 /* 2181 */ MCD_OPC_CheckField, 14, 5, 0, 44, 14, // Skip to: 5815 /* 2187 */ MCD_OPC_Decode, 189, 1, 25, // Opcode: FMOVQ /* 2191 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 2205 /* 2195 */ MCD_OPC_CheckField, 14, 5, 0, 30, 14, // Skip to: 5815 /* 2201 */ MCD_OPC_Decode, 231, 1, 23, // Opcode: FNEGS /* 2205 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 2223 /* 2209 */ MCD_OPC_CheckPredicate, 0, 18, 14, // Skip to: 5815 /* 2213 */ MCD_OPC_CheckField, 14, 5, 0, 12, 14, // Skip to: 5815 /* 2219 */ MCD_OPC_Decode, 229, 1, 24, // Opcode: FNEGD /* 2223 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 2241 /* 2227 */ MCD_OPC_CheckPredicate, 0, 0, 14, // Skip to: 5815 /* 2231 */ MCD_OPC_CheckField, 14, 5, 0, 250, 13, // Skip to: 5815 /* 2237 */ MCD_OPC_Decode, 230, 1, 25, // Opcode: FNEGQ /* 2241 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 2255 /* 2245 */ MCD_OPC_CheckField, 14, 5, 0, 236, 13, // Skip to: 5815 /* 2251 */ MCD_OPC_Decode, 140, 1, 23, // Opcode: FABSS /* 2255 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 2273 /* 2259 */ MCD_OPC_CheckPredicate, 0, 224, 13, // Skip to: 5815 /* 2263 */ MCD_OPC_CheckField, 14, 5, 0, 218, 13, // Skip to: 5815 /* 2269 */ MCD_OPC_Decode, 138, 1, 24, // Opcode: FABSD /* 2273 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 2291 /* 2277 */ MCD_OPC_CheckPredicate, 0, 206, 13, // Skip to: 5815 /* 2281 */ MCD_OPC_CheckField, 14, 5, 0, 200, 13, // Skip to: 5815 /* 2287 */ MCD_OPC_Decode, 139, 1, 25, // Opcode: FABSQ /* 2291 */ MCD_OPC_FilterValue, 41, 10, 0, // Skip to: 2305 /* 2295 */ MCD_OPC_CheckField, 14, 5, 0, 186, 13, // Skip to: 5815 /* 2301 */ MCD_OPC_Decode, 147, 2, 23, // Opcode: FSQRTS /* 2305 */ MCD_OPC_FilterValue, 42, 10, 0, // Skip to: 2319 /* 2309 */ MCD_OPC_CheckField, 14, 5, 0, 172, 13, // Skip to: 5815 /* 2315 */ MCD_OPC_Decode, 145, 2, 24, // Opcode: FSQRTD /* 2319 */ MCD_OPC_FilterValue, 43, 10, 0, // Skip to: 2333 /* 2323 */ MCD_OPC_CheckField, 14, 5, 0, 158, 13, // Skip to: 5815 /* 2329 */ MCD_OPC_Decode, 146, 2, 25, // Opcode: FSQRTQ /* 2333 */ MCD_OPC_FilterValue, 65, 4, 0, // Skip to: 2341 /* 2337 */ MCD_OPC_Decode, 143, 1, 26, // Opcode: FADDS /* 2341 */ MCD_OPC_FilterValue, 66, 4, 0, // Skip to: 2349 /* 2345 */ MCD_OPC_Decode, 141, 1, 27, // Opcode: FADDD /* 2349 */ MCD_OPC_FilterValue, 67, 4, 0, // Skip to: 2357 /* 2353 */ MCD_OPC_Decode, 142, 1, 28, // Opcode: FADDQ /* 2357 */ MCD_OPC_FilterValue, 69, 4, 0, // Skip to: 2365 /* 2361 */ MCD_OPC_Decode, 162, 2, 26, // Opcode: FSUBS /* 2365 */ MCD_OPC_FilterValue, 70, 4, 0, // Skip to: 2373 /* 2369 */ MCD_OPC_Decode, 160, 2, 27, // Opcode: FSUBD /* 2373 */ MCD_OPC_FilterValue, 71, 4, 0, // Skip to: 2381 /* 2377 */ MCD_OPC_Decode, 161, 2, 28, // Opcode: FSUBQ /* 2381 */ MCD_OPC_FilterValue, 73, 4, 0, // Skip to: 2389 /* 2385 */ MCD_OPC_Decode, 224, 1, 26, // Opcode: FMULS /* 2389 */ MCD_OPC_FilterValue, 74, 4, 0, // Skip to: 2397 /* 2393 */ MCD_OPC_Decode, 220, 1, 27, // Opcode: FMULD /* 2397 */ MCD_OPC_FilterValue, 75, 4, 0, // Skip to: 2405 /* 2401 */ MCD_OPC_Decode, 223, 1, 28, // Opcode: FMULQ /* 2405 */ MCD_OPC_FilterValue, 77, 4, 0, // Skip to: 2413 /* 2409 */ MCD_OPC_Decode, 167, 1, 26, // Opcode: FDIVS /* 2413 */ MCD_OPC_FilterValue, 78, 4, 0, // Skip to: 2421 /* 2417 */ MCD_OPC_Decode, 165, 1, 27, // Opcode: FDIVD /* 2421 */ MCD_OPC_FilterValue, 79, 4, 0, // Skip to: 2429 /* 2425 */ MCD_OPC_Decode, 166, 1, 28, // Opcode: FDIVQ /* 2429 */ MCD_OPC_FilterValue, 81, 8, 0, // Skip to: 2441 /* 2433 */ MCD_OPC_CheckPredicate, 1, 50, 13, // Skip to: 5815 /* 2437 */ MCD_OPC_Decode, 226, 1, 27, // Opcode: FNADDS /* 2441 */ MCD_OPC_FilterValue, 82, 8, 0, // Skip to: 2453 /* 2445 */ MCD_OPC_CheckPredicate, 1, 38, 13, // Skip to: 5815 /* 2449 */ MCD_OPC_Decode, 225, 1, 27, // Opcode: FNADDD /* 2453 */ MCD_OPC_FilterValue, 89, 8, 0, // Skip to: 2465 /* 2457 */ MCD_OPC_CheckPredicate, 1, 26, 13, // Skip to: 5815 /* 2461 */ MCD_OPC_Decode, 235, 1, 27, // Opcode: FNMULS /* 2465 */ MCD_OPC_FilterValue, 90, 8, 0, // Skip to: 2477 /* 2469 */ MCD_OPC_CheckPredicate, 1, 14, 13, // Skip to: 5815 /* 2473 */ MCD_OPC_Decode, 234, 1, 27, // Opcode: FNMULD /* 2477 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 2489 /* 2481 */ MCD_OPC_CheckPredicate, 1, 2, 13, // Skip to: 5815 /* 2485 */ MCD_OPC_Decode, 175, 1, 27, // Opcode: FHADDS /* 2489 */ MCD_OPC_FilterValue, 98, 8, 0, // Skip to: 2501 /* 2493 */ MCD_OPC_CheckPredicate, 1, 246, 12, // Skip to: 5815 /* 2497 */ MCD_OPC_Decode, 174, 1, 27, // Opcode: FHADDD /* 2501 */ MCD_OPC_FilterValue, 101, 8, 0, // Skip to: 2513 /* 2505 */ MCD_OPC_CheckPredicate, 1, 234, 12, // Skip to: 5815 /* 2509 */ MCD_OPC_Decode, 177, 1, 27, // Opcode: FHSUBS /* 2513 */ MCD_OPC_FilterValue, 102, 8, 0, // Skip to: 2525 /* 2517 */ MCD_OPC_CheckPredicate, 1, 222, 12, // Skip to: 5815 /* 2521 */ MCD_OPC_Decode, 176, 1, 27, // Opcode: FHSUBD /* 2525 */ MCD_OPC_FilterValue, 105, 4, 0, // Skip to: 2533 /* 2529 */ MCD_OPC_Decode, 144, 2, 29, // Opcode: FSMULD /* 2533 */ MCD_OPC_FilterValue, 110, 4, 0, // Skip to: 2541 /* 2537 */ MCD_OPC_Decode, 168, 1, 30, // Opcode: FDMULQ /* 2541 */ MCD_OPC_FilterValue, 113, 8, 0, // Skip to: 2553 /* 2545 */ MCD_OPC_CheckPredicate, 1, 194, 12, // Skip to: 5815 /* 2549 */ MCD_OPC_Decode, 233, 1, 27, // Opcode: FNHADDS /* 2553 */ MCD_OPC_FilterValue, 114, 8, 0, // Skip to: 2565 /* 2557 */ MCD_OPC_CheckPredicate, 1, 182, 12, // Skip to: 5815 /* 2561 */ MCD_OPC_Decode, 232, 1, 27, // Opcode: FNHADDD /* 2565 */ MCD_OPC_FilterValue, 121, 8, 0, // Skip to: 2577 /* 2569 */ MCD_OPC_CheckPredicate, 1, 170, 12, // Skip to: 5815 /* 2573 */ MCD_OPC_Decode, 242, 1, 27, // Opcode: FNSMULD /* 2577 */ MCD_OPC_FilterValue, 129, 1, 10, 0, // Skip to: 2592 /* 2582 */ MCD_OPC_CheckField, 14, 5, 0, 155, 12, // Skip to: 5815 /* 2588 */ MCD_OPC_Decode, 159, 2, 31, // Opcode: FSTOX /* 2592 */ MCD_OPC_FilterValue, 130, 1, 10, 0, // Skip to: 2607 /* 2597 */ MCD_OPC_CheckField, 14, 5, 0, 140, 12, // Skip to: 5815 /* 2603 */ MCD_OPC_Decode, 172, 1, 24, // Opcode: FDTOX /* 2607 */ MCD_OPC_FilterValue, 131, 1, 10, 0, // Skip to: 2622 /* 2612 */ MCD_OPC_CheckField, 14, 5, 0, 125, 12, // Skip to: 5815 /* 2618 */ MCD_OPC_Decode, 139, 2, 32, // Opcode: FQTOX /* 2622 */ MCD_OPC_FilterValue, 132, 1, 10, 0, // Skip to: 2637 /* 2627 */ MCD_OPC_CheckField, 14, 5, 0, 110, 12, // Skip to: 5815 /* 2633 */ MCD_OPC_Decode, 169, 2, 33, // Opcode: FXTOS /* 2637 */ MCD_OPC_FilterValue, 136, 1, 10, 0, // Skip to: 2652 /* 2642 */ MCD_OPC_CheckField, 14, 5, 0, 95, 12, // Skip to: 5815 /* 2648 */ MCD_OPC_Decode, 167, 2, 24, // Opcode: FXTOD /* 2652 */ MCD_OPC_FilterValue, 140, 1, 10, 0, // Skip to: 2667 /* 2657 */ MCD_OPC_CheckField, 14, 5, 0, 80, 12, // Skip to: 5815 /* 2663 */ MCD_OPC_Decode, 168, 2, 34, // Opcode: FXTOQ /* 2667 */ MCD_OPC_FilterValue, 196, 1, 10, 0, // Skip to: 2682 /* 2672 */ MCD_OPC_CheckField, 14, 5, 0, 65, 12, // Skip to: 5815 /* 2678 */ MCD_OPC_Decode, 180, 1, 23, // Opcode: FITOS /* 2682 */ MCD_OPC_FilterValue, 198, 1, 10, 0, // Skip to: 2697 /* 2687 */ MCD_OPC_CheckField, 14, 5, 0, 50, 12, // Skip to: 5815 /* 2693 */ MCD_OPC_Decode, 171, 1, 33, // Opcode: FDTOS /* 2697 */ MCD_OPC_FilterValue, 199, 1, 10, 0, // Skip to: 2712 /* 2702 */ MCD_OPC_CheckField, 14, 5, 0, 35, 12, // Skip to: 5815 /* 2708 */ MCD_OPC_Decode, 138, 2, 35, // Opcode: FQTOS /* 2712 */ MCD_OPC_FilterValue, 200, 1, 10, 0, // Skip to: 2727 /* 2717 */ MCD_OPC_CheckField, 14, 5, 0, 20, 12, // Skip to: 5815 /* 2723 */ MCD_OPC_Decode, 178, 1, 31, // Opcode: FITOD /* 2727 */ MCD_OPC_FilterValue, 201, 1, 10, 0, // Skip to: 2742 /* 2732 */ MCD_OPC_CheckField, 14, 5, 0, 5, 12, // Skip to: 5815 /* 2738 */ MCD_OPC_Decode, 156, 2, 31, // Opcode: FSTOD /* 2742 */ MCD_OPC_FilterValue, 203, 1, 10, 0, // Skip to: 2757 /* 2747 */ MCD_OPC_CheckField, 14, 5, 0, 246, 11, // Skip to: 5815 /* 2753 */ MCD_OPC_Decode, 136, 2, 32, // Opcode: FQTOD /* 2757 */ MCD_OPC_FilterValue, 204, 1, 10, 0, // Skip to: 2772 /* 2762 */ MCD_OPC_CheckField, 14, 5, 0, 231, 11, // Skip to: 5815 /* 2768 */ MCD_OPC_Decode, 179, 1, 36, // Opcode: FITOQ /* 2772 */ MCD_OPC_FilterValue, 205, 1, 10, 0, // Skip to: 2787 /* 2777 */ MCD_OPC_CheckField, 14, 5, 0, 216, 11, // Skip to: 5815 /* 2783 */ MCD_OPC_Decode, 158, 2, 36, // Opcode: FSTOQ /* 2787 */ MCD_OPC_FilterValue, 206, 1, 10, 0, // Skip to: 2802 /* 2792 */ MCD_OPC_CheckField, 14, 5, 0, 201, 11, // Skip to: 5815 /* 2798 */ MCD_OPC_Decode, 170, 1, 34, // Opcode: FDTOQ /* 2802 */ MCD_OPC_FilterValue, 209, 1, 10, 0, // Skip to: 2817 /* 2807 */ MCD_OPC_CheckField, 14, 5, 0, 186, 11, // Skip to: 5815 /* 2813 */ MCD_OPC_Decode, 157, 2, 23, // Opcode: FSTOI /* 2817 */ MCD_OPC_FilterValue, 210, 1, 10, 0, // Skip to: 2832 /* 2822 */ MCD_OPC_CheckField, 14, 5, 0, 171, 11, // Skip to: 5815 /* 2828 */ MCD_OPC_Decode, 169, 1, 33, // Opcode: FDTOI /* 2832 */ MCD_OPC_FilterValue, 211, 1, 162, 11, // Skip to: 5815 /* 2837 */ MCD_OPC_CheckField, 14, 5, 0, 156, 11, // Skip to: 5815 /* 2843 */ MCD_OPC_Decode, 137, 2, 35, // Opcode: FQTOI /* 2847 */ MCD_OPC_FilterValue, 53, 70, 2, // Skip to: 3433 /* 2851 */ MCD_OPC_ExtractField, 5, 6, // Inst{10-5} ... /* 2854 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 2933 /* 2858 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 2861 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 2894 /* 2865 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 2868 */ MCD_OPC_FilterValue, 0, 127, 11, // Skip to: 5815 /* 2872 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 2886 /* 2876 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 2886 /* 2882 */ MCD_OPC_Decode, 212, 1, 37, // Opcode: FMOVS_FCC /* 2886 */ MCD_OPC_CheckPredicate, 0, 109, 11, // Skip to: 5815 /* 2890 */ MCD_OPC_Decode, 220, 3, 38, // Opcode: V9FMOVS_FCC /* 2894 */ MCD_OPC_FilterValue, 1, 101, 11, // Skip to: 5815 /* 2898 */ MCD_OPC_ExtractField, 11, 2, // Inst{12-11} ... /* 2901 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2919 /* 2905 */ MCD_OPC_CheckPredicate, 0, 90, 11, // Skip to: 5815 /* 2909 */ MCD_OPC_CheckField, 18, 1, 0, 84, 11, // Skip to: 5815 /* 2915 */ MCD_OPC_Decode, 213, 1, 37, // Opcode: FMOVS_ICC /* 2919 */ MCD_OPC_FilterValue, 2, 76, 11, // Skip to: 5815 /* 2923 */ MCD_OPC_CheckField, 18, 1, 0, 70, 11, // Skip to: 5815 /* 2929 */ MCD_OPC_Decode, 214, 1, 37, // Opcode: FMOVS_XCC /* 2933 */ MCD_OPC_FilterValue, 2, 75, 0, // Skip to: 3012 /* 2937 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 2940 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 2973 /* 2944 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 2947 */ MCD_OPC_FilterValue, 0, 48, 11, // Skip to: 5815 /* 2951 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 2965 /* 2955 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 2965 /* 2961 */ MCD_OPC_Decode, 186, 1, 39, // Opcode: FMOVD_FCC /* 2965 */ MCD_OPC_CheckPredicate, 0, 30, 11, // Skip to: 5815 /* 2969 */ MCD_OPC_Decode, 218, 3, 40, // Opcode: V9FMOVD_FCC /* 2973 */ MCD_OPC_FilterValue, 1, 22, 11, // Skip to: 5815 /* 2977 */ MCD_OPC_ExtractField, 11, 2, // Inst{12-11} ... /* 2980 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2998 /* 2984 */ MCD_OPC_CheckPredicate, 0, 11, 11, // Skip to: 5815 /* 2988 */ MCD_OPC_CheckField, 18, 1, 0, 5, 11, // Skip to: 5815 /* 2994 */ MCD_OPC_Decode, 187, 1, 39, // Opcode: FMOVD_ICC /* 2998 */ MCD_OPC_FilterValue, 2, 253, 10, // Skip to: 5815 /* 3002 */ MCD_OPC_CheckField, 18, 1, 0, 247, 10, // Skip to: 5815 /* 3008 */ MCD_OPC_Decode, 188, 1, 39, // Opcode: FMOVD_XCC /* 3012 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 3091 /* 3016 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 3019 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 3052 /* 3023 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ... /* 3026 */ MCD_OPC_FilterValue, 0, 225, 10, // Skip to: 5815 /* 3030 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 3044 /* 3034 */ MCD_OPC_CheckField, 11, 2, 0, 4, 0, // Skip to: 3044 /* 3040 */ MCD_OPC_Decode, 190, 1, 41, // Opcode: FMOVQ_FCC /* 3044 */ MCD_OPC_CheckPredicate, 0, 207, 10, // Skip to: 5815 /* 3048 */ MCD_OPC_Decode, 219, 3, 42, // Opcode: V9FMOVQ_FCC /* 3052 */ MCD_OPC_FilterValue, 1, 199, 10, // Skip to: 5815 /* 3056 */ MCD_OPC_ExtractField, 11, 2, // Inst{12-11} ... /* 3059 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3077 /* 3063 */ MCD_OPC_CheckPredicate, 0, 188, 10, // Skip to: 5815 /* 3067 */ MCD_OPC_CheckField, 18, 1, 0, 182, 10, // Skip to: 5815 /* 3073 */ MCD_OPC_Decode, 191, 1, 41, // Opcode: FMOVQ_ICC /* 3077 */ MCD_OPC_FilterValue, 2, 174, 10, // Skip to: 5815 /* 3081 */ MCD_OPC_CheckField, 18, 1, 0, 168, 10, // Skip to: 5815 /* 3087 */ MCD_OPC_Decode, 192, 1, 41, // Opcode: FMOVQ_XCC /* 3091 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 3122 /* 3095 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 3098 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3110 /* 3102 */ MCD_OPC_CheckPredicate, 0, 149, 10, // Skip to: 5815 /* 3106 */ MCD_OPC_Decode, 201, 1, 43, // Opcode: FMOVRLEZS /* 3110 */ MCD_OPC_FilterValue, 3, 141, 10, // Skip to: 5815 /* 3114 */ MCD_OPC_CheckPredicate, 0, 137, 10, // Skip to: 5815 /* 3118 */ MCD_OPC_Decode, 198, 1, 43, // Opcode: FMOVRGZS /* 3122 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 3153 /* 3126 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 3129 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3141 /* 3133 */ MCD_OPC_CheckPredicate, 0, 118, 10, // Skip to: 5815 /* 3137 */ MCD_OPC_Decode, 199, 1, 43, // Opcode: FMOVRLEZD /* 3141 */ MCD_OPC_FilterValue, 3, 110, 10, // Skip to: 5815 /* 3145 */ MCD_OPC_CheckPredicate, 0, 106, 10, // Skip to: 5815 /* 3149 */ MCD_OPC_Decode, 196, 1, 43, // Opcode: FMOVRGZD /* 3153 */ MCD_OPC_FilterValue, 7, 27, 0, // Skip to: 3184 /* 3157 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 3160 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3172 /* 3164 */ MCD_OPC_CheckPredicate, 0, 87, 10, // Skip to: 5815 /* 3168 */ MCD_OPC_Decode, 200, 1, 43, // Opcode: FMOVRLEZQ /* 3172 */ MCD_OPC_FilterValue, 3, 79, 10, // Skip to: 5815 /* 3176 */ MCD_OPC_CheckPredicate, 0, 75, 10, // Skip to: 5815 /* 3180 */ MCD_OPC_Decode, 197, 1, 43, // Opcode: FMOVRGZQ /* 3184 */ MCD_OPC_FilterValue, 17, 10, 0, // Skip to: 3198 /* 3188 */ MCD_OPC_CheckField, 11, 3, 1, 61, 10, // Skip to: 5815 /* 3194 */ MCD_OPC_Decode, 217, 3, 44, // Opcode: V9FCMPS /* 3198 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 3212 /* 3202 */ MCD_OPC_CheckField, 11, 3, 1, 47, 10, // Skip to: 5815 /* 3208 */ MCD_OPC_Decode, 212, 3, 45, // Opcode: V9FCMPD /* 3212 */ MCD_OPC_FilterValue, 19, 10, 0, // Skip to: 3226 /* 3216 */ MCD_OPC_CheckField, 11, 3, 1, 33, 10, // Skip to: 5815 /* 3222 */ MCD_OPC_Decode, 216, 3, 46, // Opcode: V9FCMPQ /* 3226 */ MCD_OPC_FilterValue, 21, 10, 0, // Skip to: 3240 /* 3230 */ MCD_OPC_CheckField, 11, 3, 1, 19, 10, // Skip to: 5815 /* 3236 */ MCD_OPC_Decode, 215, 3, 44, // Opcode: V9FCMPES /* 3240 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 3254 /* 3244 */ MCD_OPC_CheckField, 11, 3, 1, 5, 10, // Skip to: 5815 /* 3250 */ MCD_OPC_Decode, 213, 3, 45, // Opcode: V9FCMPED /* 3254 */ MCD_OPC_FilterValue, 23, 10, 0, // Skip to: 3268 /* 3258 */ MCD_OPC_CheckField, 11, 3, 1, 247, 9, // Skip to: 5815 /* 3264 */ MCD_OPC_Decode, 214, 3, 46, // Opcode: V9FCMPEQ /* 3268 */ MCD_OPC_FilterValue, 37, 51, 0, // Skip to: 3323 /* 3272 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 3275 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3287 /* 3279 */ MCD_OPC_CheckPredicate, 0, 228, 9, // Skip to: 5815 /* 3283 */ MCD_OPC_Decode, 210, 1, 43, // Opcode: FMOVRZS /* 3287 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3299 /* 3291 */ MCD_OPC_CheckPredicate, 0, 216, 9, // Skip to: 5815 /* 3295 */ MCD_OPC_Decode, 204, 1, 43, // Opcode: FMOVRLZS /* 3299 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3311 /* 3303 */ MCD_OPC_CheckPredicate, 0, 204, 9, // Skip to: 5815 /* 3307 */ MCD_OPC_Decode, 207, 1, 43, // Opcode: FMOVRNZS /* 3311 */ MCD_OPC_FilterValue, 3, 196, 9, // Skip to: 5815 /* 3315 */ MCD_OPC_CheckPredicate, 0, 192, 9, // Skip to: 5815 /* 3319 */ MCD_OPC_Decode, 195, 1, 43, // Opcode: FMOVRGEZS /* 3323 */ MCD_OPC_FilterValue, 38, 51, 0, // Skip to: 3378 /* 3327 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 3330 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3342 /* 3334 */ MCD_OPC_CheckPredicate, 0, 173, 9, // Skip to: 5815 /* 3338 */ MCD_OPC_Decode, 208, 1, 43, // Opcode: FMOVRZD /* 3342 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3354 /* 3346 */ MCD_OPC_CheckPredicate, 0, 161, 9, // Skip to: 5815 /* 3350 */ MCD_OPC_Decode, 202, 1, 43, // Opcode: FMOVRLZD /* 3354 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3366 /* 3358 */ MCD_OPC_CheckPredicate, 0, 149, 9, // Skip to: 5815 /* 3362 */ MCD_OPC_Decode, 205, 1, 43, // Opcode: FMOVRNZD /* 3366 */ MCD_OPC_FilterValue, 3, 141, 9, // Skip to: 5815 /* 3370 */ MCD_OPC_CheckPredicate, 0, 137, 9, // Skip to: 5815 /* 3374 */ MCD_OPC_Decode, 193, 1, 43, // Opcode: FMOVRGEZD /* 3378 */ MCD_OPC_FilterValue, 39, 129, 9, // Skip to: 5815 /* 3382 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ... /* 3385 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3397 /* 3389 */ MCD_OPC_CheckPredicate, 0, 118, 9, // Skip to: 5815 /* 3393 */ MCD_OPC_Decode, 209, 1, 43, // Opcode: FMOVRZQ /* 3397 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3409 /* 3401 */ MCD_OPC_CheckPredicate, 0, 106, 9, // Skip to: 5815 /* 3405 */ MCD_OPC_Decode, 203, 1, 43, // Opcode: FMOVRLZQ /* 3409 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3421 /* 3413 */ MCD_OPC_CheckPredicate, 0, 94, 9, // Skip to: 5815 /* 3417 */ MCD_OPC_Decode, 206, 1, 43, // Opcode: FMOVRNZQ /* 3421 */ MCD_OPC_FilterValue, 3, 86, 9, // Skip to: 5815 /* 3425 */ MCD_OPC_CheckPredicate, 0, 82, 9, // Skip to: 5815 /* 3429 */ MCD_OPC_Decode, 194, 1, 43, // Opcode: FMOVRGEZQ /* 3433 */ MCD_OPC_FilterValue, 54, 18, 6, // Skip to: 4991 /* 3437 */ MCD_OPC_ExtractField, 5, 9, // Inst{13-5} ... /* 3440 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3452 /* 3444 */ MCD_OPC_CheckPredicate, 2, 63, 9, // Skip to: 5815 /* 3448 */ MCD_OPC_Decode, 134, 1, 10, // Opcode: EDGE8 /* 3452 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3464 /* 3456 */ MCD_OPC_CheckPredicate, 3, 51, 9, // Skip to: 5815 /* 3460 */ MCD_OPC_Decode, 137, 1, 10, // Opcode: EDGE8N /* 3464 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3476 /* 3468 */ MCD_OPC_CheckPredicate, 2, 39, 9, // Skip to: 5815 /* 3472 */ MCD_OPC_Decode, 135, 1, 10, // Opcode: EDGE8L /* 3476 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 3488 /* 3480 */ MCD_OPC_CheckPredicate, 3, 27, 9, // Skip to: 5815 /* 3484 */ MCD_OPC_Decode, 136, 1, 10, // Opcode: EDGE8LN /* 3488 */ MCD_OPC_FilterValue, 4, 7, 0, // Skip to: 3499 /* 3492 */ MCD_OPC_CheckPredicate, 2, 15, 9, // Skip to: 5815 /* 3496 */ MCD_OPC_Decode, 126, 10, // Opcode: EDGE16 /* 3499 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 3511 /* 3503 */ MCD_OPC_CheckPredicate, 3, 4, 9, // Skip to: 5815 /* 3507 */ MCD_OPC_Decode, 129, 1, 10, // Opcode: EDGE16N /* 3511 */ MCD_OPC_FilterValue, 6, 7, 0, // Skip to: 3522 /* 3515 */ MCD_OPC_CheckPredicate, 2, 248, 8, // Skip to: 5815 /* 3519 */ MCD_OPC_Decode, 127, 10, // Opcode: EDGE16L /* 3522 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 3534 /* 3526 */ MCD_OPC_CheckPredicate, 3, 237, 8, // Skip to: 5815 /* 3530 */ MCD_OPC_Decode, 128, 1, 10, // Opcode: EDGE16LN /* 3534 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 3546 /* 3538 */ MCD_OPC_CheckPredicate, 2, 225, 8, // Skip to: 5815 /* 3542 */ MCD_OPC_Decode, 130, 1, 10, // Opcode: EDGE32 /* 3546 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 3558 /* 3550 */ MCD_OPC_CheckPredicate, 3, 213, 8, // Skip to: 5815 /* 3554 */ MCD_OPC_Decode, 133, 1, 10, // Opcode: EDGE32N /* 3558 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 3570 /* 3562 */ MCD_OPC_CheckPredicate, 2, 201, 8, // Skip to: 5815 /* 3566 */ MCD_OPC_Decode, 131, 1, 10, // Opcode: EDGE32L /* 3570 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 3582 /* 3574 */ MCD_OPC_CheckPredicate, 3, 189, 8, // Skip to: 5815 /* 3578 */ MCD_OPC_Decode, 132, 1, 10, // Opcode: EDGE32LN /* 3582 */ MCD_OPC_FilterValue, 16, 7, 0, // Skip to: 3593 /* 3586 */ MCD_OPC_CheckPredicate, 2, 177, 8, // Skip to: 5815 /* 3590 */ MCD_OPC_Decode, 51, 10, // Opcode: ARRAY8 /* 3593 */ MCD_OPC_FilterValue, 17, 7, 0, // Skip to: 3604 /* 3597 */ MCD_OPC_CheckPredicate, 1, 166, 8, // Skip to: 5815 /* 3601 */ MCD_OPC_Decode, 28, 10, // Opcode: ADDXC /* 3604 */ MCD_OPC_FilterValue, 18, 7, 0, // Skip to: 3615 /* 3608 */ MCD_OPC_CheckPredicate, 2, 155, 8, // Skip to: 5815 /* 3612 */ MCD_OPC_Decode, 49, 10, // Opcode: ARRAY16 /* 3615 */ MCD_OPC_FilterValue, 19, 7, 0, // Skip to: 3626 /* 3619 */ MCD_OPC_CheckPredicate, 1, 144, 8, // Skip to: 5815 /* 3623 */ MCD_OPC_Decode, 29, 10, // Opcode: ADDXCCC /* 3626 */ MCD_OPC_FilterValue, 20, 7, 0, // Skip to: 3637 /* 3630 */ MCD_OPC_CheckPredicate, 2, 133, 8, // Skip to: 5815 /* 3634 */ MCD_OPC_Decode, 50, 10, // Opcode: ARRAY32 /* 3637 */ MCD_OPC_FilterValue, 22, 8, 0, // Skip to: 3649 /* 3641 */ MCD_OPC_CheckPredicate, 1, 122, 8, // Skip to: 5815 /* 3645 */ MCD_OPC_Decode, 208, 3, 10, // Opcode: UMULXHI /* 3649 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 3667 /* 3653 */ MCD_OPC_CheckPredicate, 1, 110, 8, // Skip to: 5815 /* 3657 */ MCD_OPC_CheckField, 14, 5, 0, 104, 8, // Skip to: 5815 /* 3663 */ MCD_OPC_Decode, 197, 2, 47, // Opcode: LZCNT /* 3667 */ MCD_OPC_FilterValue, 24, 7, 0, // Skip to: 3678 /* 3671 */ MCD_OPC_CheckPredicate, 2, 92, 8, // Skip to: 5815 /* 3675 */ MCD_OPC_Decode, 36, 10, // Opcode: ALIGNADDR /* 3678 */ MCD_OPC_FilterValue, 25, 7, 0, // Skip to: 3689 /* 3682 */ MCD_OPC_CheckPredicate, 3, 81, 8, // Skip to: 5815 /* 3686 */ MCD_OPC_Decode, 78, 10, // Opcode: BMASK /* 3689 */ MCD_OPC_FilterValue, 26, 7, 0, // Skip to: 3700 /* 3693 */ MCD_OPC_CheckPredicate, 2, 70, 8, // Skip to: 5815 /* 3697 */ MCD_OPC_Decode, 37, 10, // Opcode: ALIGNADDRL /* 3700 */ MCD_OPC_FilterValue, 27, 19, 0, // Skip to: 3723 /* 3704 */ MCD_OPC_CheckPredicate, 1, 59, 8, // Skip to: 5815 /* 3708 */ MCD_OPC_CheckField, 25, 5, 0, 53, 8, // Skip to: 5815 /* 3714 */ MCD_OPC_CheckField, 14, 5, 0, 47, 8, // Skip to: 5815 /* 3720 */ MCD_OPC_Decode, 123, 48, // Opcode: CMASK8 /* 3723 */ MCD_OPC_FilterValue, 28, 7, 0, // Skip to: 3734 /* 3727 */ MCD_OPC_CheckPredicate, 3, 36, 8, // Skip to: 5815 /* 3731 */ MCD_OPC_Decode, 115, 27, // Opcode: BSHUFFLE /* 3734 */ MCD_OPC_FilterValue, 29, 19, 0, // Skip to: 3757 /* 3738 */ MCD_OPC_CheckPredicate, 1, 25, 8, // Skip to: 5815 /* 3742 */ MCD_OPC_CheckField, 25, 5, 0, 19, 8, // Skip to: 5815 /* 3748 */ MCD_OPC_CheckField, 14, 5, 0, 13, 8, // Skip to: 5815 /* 3754 */ MCD_OPC_Decode, 121, 48, // Opcode: CMASK16 /* 3757 */ MCD_OPC_FilterValue, 31, 19, 0, // Skip to: 3780 /* 3761 */ MCD_OPC_CheckPredicate, 1, 2, 8, // Skip to: 5815 /* 3765 */ MCD_OPC_CheckField, 25, 5, 0, 252, 7, // Skip to: 5815 /* 3771 */ MCD_OPC_CheckField, 14, 5, 0, 246, 7, // Skip to: 5815 /* 3777 */ MCD_OPC_Decode, 122, 48, // Opcode: CMASK32 /* 3780 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 3792 /* 3784 */ MCD_OPC_CheckPredicate, 2, 235, 7, // Skip to: 5815 /* 3788 */ MCD_OPC_Decode, 159, 1, 49, // Opcode: FCMPLE16 /* 3792 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 3804 /* 3796 */ MCD_OPC_CheckPredicate, 1, 223, 7, // Skip to: 5815 /* 3800 */ MCD_OPC_Decode, 142, 2, 27, // Opcode: FSLL16 /* 3804 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 3816 /* 3808 */ MCD_OPC_CheckPredicate, 2, 211, 7, // Skip to: 5815 /* 3812 */ MCD_OPC_Decode, 161, 1, 49, // Opcode: FCMPNE16 /* 3816 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 3828 /* 3820 */ MCD_OPC_CheckPredicate, 1, 199, 7, // Skip to: 5815 /* 3824 */ MCD_OPC_Decode, 154, 2, 27, // Opcode: FSRL16 /* 3828 */ MCD_OPC_FilterValue, 36, 8, 0, // Skip to: 3840 /* 3832 */ MCD_OPC_CheckPredicate, 2, 187, 7, // Skip to: 5815 /* 3836 */ MCD_OPC_Decode, 160, 1, 49, // Opcode: FCMPLE32 /* 3840 */ MCD_OPC_FilterValue, 37, 8, 0, // Skip to: 3852 /* 3844 */ MCD_OPC_CheckPredicate, 1, 175, 7, // Skip to: 5815 /* 3848 */ MCD_OPC_Decode, 143, 2, 27, // Opcode: FSLL32 /* 3852 */ MCD_OPC_FilterValue, 38, 8, 0, // Skip to: 3864 /* 3856 */ MCD_OPC_CheckPredicate, 2, 163, 7, // Skip to: 5815 /* 3860 */ MCD_OPC_Decode, 162, 1, 49, // Opcode: FCMPNE32 /* 3864 */ MCD_OPC_FilterValue, 39, 8, 0, // Skip to: 3876 /* 3868 */ MCD_OPC_CheckPredicate, 1, 151, 7, // Skip to: 5815 /* 3872 */ MCD_OPC_Decode, 155, 2, 27, // Opcode: FSRL32 /* 3876 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 3888 /* 3880 */ MCD_OPC_CheckPredicate, 2, 139, 7, // Skip to: 5815 /* 3884 */ MCD_OPC_Decode, 157, 1, 49, // Opcode: FCMPGT16 /* 3888 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 3900 /* 3892 */ MCD_OPC_CheckPredicate, 1, 127, 7, // Skip to: 5815 /* 3896 */ MCD_OPC_Decode, 140, 2, 27, // Opcode: FSLAS16 /* 3900 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 3912 /* 3904 */ MCD_OPC_CheckPredicate, 2, 115, 7, // Skip to: 5815 /* 3908 */ MCD_OPC_Decode, 155, 1, 49, // Opcode: FCMPEQ16 /* 3912 */ MCD_OPC_FilterValue, 43, 8, 0, // Skip to: 3924 /* 3916 */ MCD_OPC_CheckPredicate, 1, 103, 7, // Skip to: 5815 /* 3920 */ MCD_OPC_Decode, 148, 2, 27, // Opcode: FSRA16 /* 3924 */ MCD_OPC_FilterValue, 44, 8, 0, // Skip to: 3936 /* 3928 */ MCD_OPC_CheckPredicate, 2, 91, 7, // Skip to: 5815 /* 3932 */ MCD_OPC_Decode, 158, 1, 49, // Opcode: FCMPGT32 /* 3936 */ MCD_OPC_FilterValue, 45, 8, 0, // Skip to: 3948 /* 3940 */ MCD_OPC_CheckPredicate, 1, 79, 7, // Skip to: 5815 /* 3944 */ MCD_OPC_Decode, 141, 2, 27, // Opcode: FSLAS32 /* 3948 */ MCD_OPC_FilterValue, 46, 8, 0, // Skip to: 3960 /* 3952 */ MCD_OPC_CheckPredicate, 2, 67, 7, // Skip to: 5815 /* 3956 */ MCD_OPC_Decode, 156, 1, 49, // Opcode: FCMPEQ32 /* 3960 */ MCD_OPC_FilterValue, 47, 8, 0, // Skip to: 3972 /* 3964 */ MCD_OPC_CheckPredicate, 1, 55, 7, // Skip to: 5815 /* 3968 */ MCD_OPC_Decode, 149, 2, 27, // Opcode: FSRA32 /* 3972 */ MCD_OPC_FilterValue, 49, 8, 0, // Skip to: 3984 /* 3976 */ MCD_OPC_CheckPredicate, 2, 43, 7, // Skip to: 5815 /* 3980 */ MCD_OPC_Decode, 217, 1, 27, // Opcode: FMUL8X16 /* 3984 */ MCD_OPC_FilterValue, 51, 8, 0, // Skip to: 3996 /* 3988 */ MCD_OPC_CheckPredicate, 2, 31, 7, // Skip to: 5815 /* 3992 */ MCD_OPC_Decode, 219, 1, 27, // Opcode: FMUL8X16AU /* 3996 */ MCD_OPC_FilterValue, 53, 8, 0, // Skip to: 4008 /* 4000 */ MCD_OPC_CheckPredicate, 2, 19, 7, // Skip to: 5815 /* 4004 */ MCD_OPC_Decode, 218, 1, 27, // Opcode: FMUL8X16AL /* 4008 */ MCD_OPC_FilterValue, 54, 8, 0, // Skip to: 4020 /* 4012 */ MCD_OPC_CheckPredicate, 2, 7, 7, // Skip to: 5815 /* 4016 */ MCD_OPC_Decode, 215, 1, 27, // Opcode: FMUL8SUX16 /* 4020 */ MCD_OPC_FilterValue, 55, 8, 0, // Skip to: 4032 /* 4024 */ MCD_OPC_CheckPredicate, 2, 251, 6, // Skip to: 5815 /* 4028 */ MCD_OPC_Decode, 216, 1, 27, // Opcode: FMUL8ULX16 /* 4032 */ MCD_OPC_FilterValue, 56, 8, 0, // Skip to: 4044 /* 4036 */ MCD_OPC_CheckPredicate, 2, 239, 6, // Skip to: 5815 /* 4040 */ MCD_OPC_Decode, 221, 1, 27, // Opcode: FMULD8SUX16 /* 4044 */ MCD_OPC_FilterValue, 57, 8, 0, // Skip to: 4056 /* 4048 */ MCD_OPC_CheckPredicate, 2, 227, 6, // Skip to: 5815 /* 4052 */ MCD_OPC_Decode, 222, 1, 27, // Opcode: FMULD8ULX16 /* 4056 */ MCD_OPC_FilterValue, 58, 8, 0, // Skip to: 4068 /* 4060 */ MCD_OPC_CheckPredicate, 2, 215, 6, // Skip to: 5815 /* 4064 */ MCD_OPC_Decode, 252, 1, 27, // Opcode: FPACK32 /* 4068 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 4086 /* 4072 */ MCD_OPC_CheckPredicate, 2, 203, 6, // Skip to: 5815 /* 4076 */ MCD_OPC_CheckField, 14, 5, 0, 197, 6, // Skip to: 5815 /* 4082 */ MCD_OPC_Decode, 251, 1, 24, // Opcode: FPACK16 /* 4086 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 4104 /* 4090 */ MCD_OPC_CheckPredicate, 2, 185, 6, // Skip to: 5815 /* 4094 */ MCD_OPC_CheckField, 14, 5, 0, 179, 6, // Skip to: 5815 /* 4100 */ MCD_OPC_Decode, 253, 1, 24, // Opcode: FPACKFIX /* 4104 */ MCD_OPC_FilterValue, 62, 8, 0, // Skip to: 4116 /* 4108 */ MCD_OPC_CheckPredicate, 2, 167, 6, // Skip to: 5815 /* 4112 */ MCD_OPC_Decode, 236, 2, 27, // Opcode: PDIST /* 4116 */ MCD_OPC_FilterValue, 63, 8, 0, // Skip to: 4128 /* 4120 */ MCD_OPC_CheckPredicate, 1, 155, 6, // Skip to: 5815 /* 4124 */ MCD_OPC_Decode, 237, 2, 27, // Opcode: PDISTN /* 4128 */ MCD_OPC_FilterValue, 64, 8, 0, // Skip to: 4140 /* 4132 */ MCD_OPC_CheckPredicate, 1, 143, 6, // Skip to: 5815 /* 4136 */ MCD_OPC_Decode, 184, 1, 27, // Opcode: FMEAN16 /* 4140 */ MCD_OPC_FilterValue, 66, 8, 0, // Skip to: 4152 /* 4144 */ MCD_OPC_CheckPredicate, 1, 131, 6, // Skip to: 5815 /* 4148 */ MCD_OPC_Decode, 130, 2, 27, // Opcode: FPADD64 /* 4152 */ MCD_OPC_FilterValue, 68, 8, 0, // Skip to: 4164 /* 4156 */ MCD_OPC_CheckPredicate, 1, 119, 6, // Skip to: 5815 /* 4160 */ MCD_OPC_Decode, 153, 1, 27, // Opcode: FCHKSM16 /* 4164 */ MCD_OPC_FilterValue, 72, 8, 0, // Skip to: 4176 /* 4168 */ MCD_OPC_CheckPredicate, 2, 107, 6, // Skip to: 5815 /* 4172 */ MCD_OPC_Decode, 144, 1, 27, // Opcode: FALIGNADATA /* 4176 */ MCD_OPC_FilterValue, 75, 8, 0, // Skip to: 4188 /* 4180 */ MCD_OPC_CheckPredicate, 2, 95, 6, // Skip to: 5815 /* 4184 */ MCD_OPC_Decode, 131, 2, 27, // Opcode: FPMERGE /* 4188 */ MCD_OPC_FilterValue, 77, 14, 0, // Skip to: 4206 /* 4192 */ MCD_OPC_CheckPredicate, 2, 83, 6, // Skip to: 5815 /* 4196 */ MCD_OPC_CheckField, 14, 5, 0, 77, 6, // Skip to: 5815 /* 4202 */ MCD_OPC_Decode, 173, 1, 24, // Opcode: FEXPAND /* 4206 */ MCD_OPC_FilterValue, 80, 8, 0, // Skip to: 4218 /* 4210 */ MCD_OPC_CheckPredicate, 2, 65, 6, // Skip to: 5815 /* 4214 */ MCD_OPC_Decode, 254, 1, 27, // Opcode: FPADD16 /* 4218 */ MCD_OPC_FilterValue, 81, 8, 0, // Skip to: 4230 /* 4222 */ MCD_OPC_CheckPredicate, 2, 53, 6, // Skip to: 5815 /* 4226 */ MCD_OPC_Decode, 255, 1, 27, // Opcode: FPADD16S /* 4230 */ MCD_OPC_FilterValue, 82, 8, 0, // Skip to: 4242 /* 4234 */ MCD_OPC_CheckPredicate, 2, 41, 6, // Skip to: 5815 /* 4238 */ MCD_OPC_Decode, 128, 2, 27, // Opcode: FPADD32 /* 4242 */ MCD_OPC_FilterValue, 83, 8, 0, // Skip to: 4254 /* 4246 */ MCD_OPC_CheckPredicate, 2, 29, 6, // Skip to: 5815 /* 4250 */ MCD_OPC_Decode, 129, 2, 27, // Opcode: FPADD32S /* 4254 */ MCD_OPC_FilterValue, 84, 8, 0, // Skip to: 4266 /* 4258 */ MCD_OPC_CheckPredicate, 2, 17, 6, // Skip to: 5815 /* 4262 */ MCD_OPC_Decode, 132, 2, 27, // Opcode: FPSUB16 /* 4266 */ MCD_OPC_FilterValue, 85, 8, 0, // Skip to: 4278 /* 4270 */ MCD_OPC_CheckPredicate, 2, 5, 6, // Skip to: 5815 /* 4274 */ MCD_OPC_Decode, 133, 2, 27, // Opcode: FPSUB16S /* 4278 */ MCD_OPC_FilterValue, 86, 8, 0, // Skip to: 4290 /* 4282 */ MCD_OPC_CheckPredicate, 2, 249, 5, // Skip to: 5815 /* 4286 */ MCD_OPC_Decode, 134, 2, 27, // Opcode: FPSUB32 /* 4290 */ MCD_OPC_FilterValue, 87, 8, 0, // Skip to: 4302 /* 4294 */ MCD_OPC_CheckPredicate, 2, 237, 5, // Skip to: 5815 /* 4298 */ MCD_OPC_Decode, 135, 2, 27, // Opcode: FPSUB32S /* 4302 */ MCD_OPC_FilterValue, 96, 20, 0, // Skip to: 4326 /* 4306 */ MCD_OPC_CheckPredicate, 2, 225, 5, // Skip to: 5815 /* 4310 */ MCD_OPC_CheckField, 14, 5, 0, 219, 5, // Skip to: 5815 /* 4316 */ MCD_OPC_CheckField, 0, 5, 0, 213, 5, // Skip to: 5815 /* 4322 */ MCD_OPC_Decode, 170, 2, 50, // Opcode: FZERO /* 4326 */ MCD_OPC_FilterValue, 97, 20, 0, // Skip to: 4350 /* 4330 */ MCD_OPC_CheckPredicate, 2, 201, 5, // Skip to: 5815 /* 4334 */ MCD_OPC_CheckField, 14, 5, 0, 195, 5, // Skip to: 5815 /* 4340 */ MCD_OPC_CheckField, 0, 5, 0, 189, 5, // Skip to: 5815 /* 4346 */ MCD_OPC_Decode, 171, 2, 51, // Opcode: FZEROS /* 4350 */ MCD_OPC_FilterValue, 98, 8, 0, // Skip to: 4362 /* 4354 */ MCD_OPC_CheckPredicate, 2, 177, 5, // Skip to: 5815 /* 4358 */ MCD_OPC_Decode, 236, 1, 27, // Opcode: FNOR /* 4362 */ MCD_OPC_FilterValue, 99, 8, 0, // Skip to: 4374 /* 4366 */ MCD_OPC_CheckPredicate, 2, 165, 5, // Skip to: 5815 /* 4370 */ MCD_OPC_Decode, 237, 1, 26, // Opcode: FNORS /* 4374 */ MCD_OPC_FilterValue, 100, 8, 0, // Skip to: 4386 /* 4378 */ MCD_OPC_CheckPredicate, 2, 153, 5, // Skip to: 5815 /* 4382 */ MCD_OPC_Decode, 148, 1, 27, // Opcode: FANDNOT2 /* 4386 */ MCD_OPC_FilterValue, 101, 8, 0, // Skip to: 4398 /* 4390 */ MCD_OPC_CheckPredicate, 2, 141, 5, // Skip to: 5815 /* 4394 */ MCD_OPC_Decode, 149, 1, 26, // Opcode: FANDNOT2S /* 4398 */ MCD_OPC_FilterValue, 102, 14, 0, // Skip to: 4416 /* 4402 */ MCD_OPC_CheckPredicate, 2, 129, 5, // Skip to: 5815 /* 4406 */ MCD_OPC_CheckField, 14, 5, 0, 123, 5, // Skip to: 5815 /* 4412 */ MCD_OPC_Decode, 240, 1, 24, // Opcode: FNOT2 /* 4416 */ MCD_OPC_FilterValue, 103, 14, 0, // Skip to: 4434 /* 4420 */ MCD_OPC_CheckPredicate, 2, 111, 5, // Skip to: 5815 /* 4424 */ MCD_OPC_CheckField, 14, 5, 0, 105, 5, // Skip to: 5815 /* 4430 */ MCD_OPC_Decode, 241, 1, 23, // Opcode: FNOT2S /* 4434 */ MCD_OPC_FilterValue, 104, 8, 0, // Skip to: 4446 /* 4438 */ MCD_OPC_CheckPredicate, 2, 93, 5, // Skip to: 5815 /* 4442 */ MCD_OPC_Decode, 146, 1, 27, // Opcode: FANDNOT1 /* 4446 */ MCD_OPC_FilterValue, 105, 8, 0, // Skip to: 4458 /* 4450 */ MCD_OPC_CheckPredicate, 2, 81, 5, // Skip to: 5815 /* 4454 */ MCD_OPC_Decode, 147, 1, 26, // Opcode: FANDNOT1S /* 4458 */ MCD_OPC_FilterValue, 106, 14, 0, // Skip to: 4476 /* 4462 */ MCD_OPC_CheckPredicate, 2, 69, 5, // Skip to: 5815 /* 4466 */ MCD_OPC_CheckField, 0, 5, 0, 63, 5, // Skip to: 5815 /* 4472 */ MCD_OPC_Decode, 238, 1, 52, // Opcode: FNOT1 /* 4476 */ MCD_OPC_FilterValue, 107, 14, 0, // Skip to: 4494 /* 4480 */ MCD_OPC_CheckPredicate, 2, 51, 5, // Skip to: 5815 /* 4484 */ MCD_OPC_CheckField, 0, 5, 0, 45, 5, // Skip to: 5815 /* 4490 */ MCD_OPC_Decode, 239, 1, 53, // Opcode: FNOT1S /* 4494 */ MCD_OPC_FilterValue, 108, 8, 0, // Skip to: 4506 /* 4498 */ MCD_OPC_CheckPredicate, 2, 33, 5, // Skip to: 5815 /* 4502 */ MCD_OPC_Decode, 165, 2, 27, // Opcode: FXOR /* 4506 */ MCD_OPC_FilterValue, 109, 8, 0, // Skip to: 4518 /* 4510 */ MCD_OPC_CheckPredicate, 2, 21, 5, // Skip to: 5815 /* 4514 */ MCD_OPC_Decode, 166, 2, 26, // Opcode: FXORS /* 4518 */ MCD_OPC_FilterValue, 110, 8, 0, // Skip to: 4530 /* 4522 */ MCD_OPC_CheckPredicate, 2, 9, 5, // Skip to: 5815 /* 4526 */ MCD_OPC_Decode, 227, 1, 27, // Opcode: FNAND /* 4530 */ MCD_OPC_FilterValue, 111, 8, 0, // Skip to: 4542 /* 4534 */ MCD_OPC_CheckPredicate, 2, 253, 4, // Skip to: 5815 /* 4538 */ MCD_OPC_Decode, 228, 1, 26, // Opcode: FNANDS /* 4542 */ MCD_OPC_FilterValue, 112, 8, 0, // Skip to: 4554 /* 4546 */ MCD_OPC_CheckPredicate, 2, 241, 4, // Skip to: 5815 /* 4550 */ MCD_OPC_Decode, 145, 1, 27, // Opcode: FAND /* 4554 */ MCD_OPC_FilterValue, 113, 8, 0, // Skip to: 4566 /* 4558 */ MCD_OPC_CheckPredicate, 2, 229, 4, // Skip to: 5815 /* 4562 */ MCD_OPC_Decode, 150, 1, 26, // Opcode: FANDS /* 4566 */ MCD_OPC_FilterValue, 114, 8, 0, // Skip to: 4578 /* 4570 */ MCD_OPC_CheckPredicate, 2, 217, 4, // Skip to: 5815 /* 4574 */ MCD_OPC_Decode, 163, 2, 27, // Opcode: FXNOR /* 4578 */ MCD_OPC_FilterValue, 115, 8, 0, // Skip to: 4590 /* 4582 */ MCD_OPC_CheckPredicate, 2, 205, 4, // Skip to: 5815 /* 4586 */ MCD_OPC_Decode, 164, 2, 26, // Opcode: FXNORS /* 4590 */ MCD_OPC_FilterValue, 116, 14, 0, // Skip to: 4608 /* 4594 */ MCD_OPC_CheckPredicate, 2, 193, 4, // Skip to: 5815 /* 4598 */ MCD_OPC_CheckField, 0, 5, 0, 187, 4, // Skip to: 5815 /* 4604 */ MCD_OPC_Decode, 150, 2, 52, // Opcode: FSRC1 /* 4608 */ MCD_OPC_FilterValue, 117, 14, 0, // Skip to: 4626 /* 4612 */ MCD_OPC_CheckPredicate, 2, 175, 4, // Skip to: 5815 /* 4616 */ MCD_OPC_CheckField, 0, 5, 0, 169, 4, // Skip to: 5815 /* 4622 */ MCD_OPC_Decode, 151, 2, 53, // Opcode: FSRC1S /* 4626 */ MCD_OPC_FilterValue, 118, 8, 0, // Skip to: 4638 /* 4630 */ MCD_OPC_CheckPredicate, 2, 157, 4, // Skip to: 5815 /* 4634 */ MCD_OPC_Decode, 248, 1, 27, // Opcode: FORNOT2 /* 4638 */ MCD_OPC_FilterValue, 119, 8, 0, // Skip to: 4650 /* 4642 */ MCD_OPC_CheckPredicate, 2, 145, 4, // Skip to: 5815 /* 4646 */ MCD_OPC_Decode, 249, 1, 26, // Opcode: FORNOT2S /* 4650 */ MCD_OPC_FilterValue, 120, 14, 0, // Skip to: 4668 /* 4654 */ MCD_OPC_CheckPredicate, 2, 133, 4, // Skip to: 5815 /* 4658 */ MCD_OPC_CheckField, 14, 5, 0, 127, 4, // Skip to: 5815 /* 4664 */ MCD_OPC_Decode, 152, 2, 24, // Opcode: FSRC2 /* 4668 */ MCD_OPC_FilterValue, 121, 14, 0, // Skip to: 4686 /* 4672 */ MCD_OPC_CheckPredicate, 2, 115, 4, // Skip to: 5815 /* 4676 */ MCD_OPC_CheckField, 14, 5, 0, 109, 4, // Skip to: 5815 /* 4682 */ MCD_OPC_Decode, 153, 2, 23, // Opcode: FSRC2S /* 4686 */ MCD_OPC_FilterValue, 122, 8, 0, // Skip to: 4698 /* 4690 */ MCD_OPC_CheckPredicate, 2, 97, 4, // Skip to: 5815 /* 4694 */ MCD_OPC_Decode, 246, 1, 27, // Opcode: FORNOT1 /* 4698 */ MCD_OPC_FilterValue, 123, 8, 0, // Skip to: 4710 /* 4702 */ MCD_OPC_CheckPredicate, 2, 85, 4, // Skip to: 5815 /* 4706 */ MCD_OPC_Decode, 247, 1, 26, // Opcode: FORNOT1S /* 4710 */ MCD_OPC_FilterValue, 124, 8, 0, // Skip to: 4722 /* 4714 */ MCD_OPC_CheckPredicate, 2, 73, 4, // Skip to: 5815 /* 4718 */ MCD_OPC_Decode, 245, 1, 27, // Opcode: FOR /* 4722 */ MCD_OPC_FilterValue, 125, 8, 0, // Skip to: 4734 /* 4726 */ MCD_OPC_CheckPredicate, 2, 61, 4, // Skip to: 5815 /* 4730 */ MCD_OPC_Decode, 250, 1, 26, // Opcode: FORS /* 4734 */ MCD_OPC_FilterValue, 126, 20, 0, // Skip to: 4758 /* 4738 */ MCD_OPC_CheckPredicate, 2, 49, 4, // Skip to: 5815 /* 4742 */ MCD_OPC_CheckField, 14, 5, 0, 43, 4, // Skip to: 5815 /* 4748 */ MCD_OPC_CheckField, 0, 5, 0, 37, 4, // Skip to: 5815 /* 4754 */ MCD_OPC_Decode, 243, 1, 50, // Opcode: FONE /* 4758 */ MCD_OPC_FilterValue, 127, 20, 0, // Skip to: 4782 /* 4762 */ MCD_OPC_CheckPredicate, 2, 25, 4, // Skip to: 5815 /* 4766 */ MCD_OPC_CheckField, 14, 5, 0, 19, 4, // Skip to: 5815 /* 4772 */ MCD_OPC_CheckField, 0, 5, 0, 13, 4, // Skip to: 5815 /* 4778 */ MCD_OPC_Decode, 244, 1, 51, // Opcode: FONES /* 4782 */ MCD_OPC_FilterValue, 128, 1, 26, 0, // Skip to: 4813 /* 4787 */ MCD_OPC_CheckPredicate, 2, 0, 4, // Skip to: 5815 /* 4791 */ MCD_OPC_CheckField, 25, 5, 0, 250, 3, // Skip to: 5815 /* 4797 */ MCD_OPC_CheckField, 14, 5, 0, 244, 3, // Skip to: 5815 /* 4803 */ MCD_OPC_CheckField, 0, 5, 0, 238, 3, // Skip to: 5815 /* 4809 */ MCD_OPC_Decode, 136, 3, 4, // Opcode: SHUTDOWN /* 4813 */ MCD_OPC_FilterValue, 129, 1, 26, 0, // Skip to: 4844 /* 4818 */ MCD_OPC_CheckPredicate, 3, 225, 3, // Skip to: 5815 /* 4822 */ MCD_OPC_CheckField, 25, 5, 0, 219, 3, // Skip to: 5815 /* 4828 */ MCD_OPC_CheckField, 14, 5, 0, 213, 3, // Skip to: 5815 /* 4834 */ MCD_OPC_CheckField, 0, 5, 0, 207, 3, // Skip to: 5815 /* 4840 */ MCD_OPC_Decode, 137, 3, 4, // Opcode: SIAM /* 4844 */ MCD_OPC_FilterValue, 144, 2, 14, 0, // Skip to: 4863 /* 4849 */ MCD_OPC_CheckPredicate, 1, 194, 3, // Skip to: 5815 /* 4853 */ MCD_OPC_CheckField, 14, 5, 0, 188, 3, // Skip to: 5815 /* 4859 */ MCD_OPC_Decode, 199, 2, 54, // Opcode: MOVDTOX /* 4863 */ MCD_OPC_FilterValue, 145, 2, 14, 0, // Skip to: 4882 /* 4868 */ MCD_OPC_CheckPredicate, 1, 175, 3, // Skip to: 5815 /* 4872 */ MCD_OPC_CheckField, 14, 5, 0, 169, 3, // Skip to: 5815 /* 4878 */ MCD_OPC_Decode, 217, 2, 54, // Opcode: MOVSTOUW /* 4882 */ MCD_OPC_FilterValue, 147, 2, 14, 0, // Skip to: 4901 /* 4887 */ MCD_OPC_CheckPredicate, 1, 156, 3, // Skip to: 5815 /* 4891 */ MCD_OPC_CheckField, 14, 5, 0, 150, 3, // Skip to: 5815 /* 4897 */ MCD_OPC_Decode, 216, 2, 54, // Opcode: MOVSTOSW /* 4901 */ MCD_OPC_FilterValue, 149, 2, 8, 0, // Skip to: 4914 /* 4906 */ MCD_OPC_CheckPredicate, 1, 137, 3, // Skip to: 5815 /* 4910 */ MCD_OPC_Decode, 225, 3, 10, // Opcode: XMULX /* 4914 */ MCD_OPC_FilterValue, 151, 2, 8, 0, // Skip to: 4927 /* 4919 */ MCD_OPC_CheckPredicate, 1, 124, 3, // Skip to: 5815 /* 4923 */ MCD_OPC_Decode, 226, 3, 10, // Opcode: XMULXHI /* 4927 */ MCD_OPC_FilterValue, 152, 2, 14, 0, // Skip to: 4946 /* 4932 */ MCD_OPC_CheckPredicate, 1, 111, 3, // Skip to: 5815 /* 4936 */ MCD_OPC_CheckField, 14, 5, 0, 105, 3, // Skip to: 5815 /* 4942 */ MCD_OPC_Decode, 221, 2, 55, // Opcode: MOVXTOD /* 4946 */ MCD_OPC_FilterValue, 153, 2, 14, 0, // Skip to: 4965 /* 4951 */ MCD_OPC_CheckPredicate, 1, 92, 3, // Skip to: 5815 /* 4955 */ MCD_OPC_CheckField, 14, 5, 0, 86, 3, // Skip to: 5815 /* 4961 */ MCD_OPC_Decode, 218, 2, 55, // Opcode: MOVWTOS /* 4965 */ MCD_OPC_FilterValue, 209, 2, 8, 0, // Skip to: 4978 /* 4970 */ MCD_OPC_CheckPredicate, 1, 73, 3, // Skip to: 5815 /* 4974 */ MCD_OPC_Decode, 182, 1, 45, // Opcode: FLCMPS /* 4978 */ MCD_OPC_FilterValue, 210, 2, 64, 3, // Skip to: 5815 /* 4983 */ MCD_OPC_CheckPredicate, 1, 60, 3, // Skip to: 5815 /* 4987 */ MCD_OPC_Decode, 181, 1, 45, // Opcode: FLCMPD /* 4991 */ MCD_OPC_FilterValue, 56, 25, 0, // Skip to: 5020 /* 4995 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 4998 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5012 /* 5002 */ MCD_OPC_CheckField, 5, 8, 0, 39, 3, // Skip to: 5815 /* 5008 */ MCD_OPC_Decode, 174, 2, 56, // Opcode: JMPLrr /* 5012 */ MCD_OPC_FilterValue, 1, 31, 3, // Skip to: 5815 /* 5016 */ MCD_OPC_Decode, 173, 2, 56, // Opcode: JMPLri /* 5020 */ MCD_OPC_FilterValue, 57, 37, 0, // Skip to: 5061 /* 5024 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5027 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 5047 /* 5031 */ MCD_OPC_CheckField, 25, 5, 0, 10, 3, // Skip to: 5815 /* 5037 */ MCD_OPC_CheckField, 5, 8, 0, 4, 3, // Skip to: 5815 /* 5043 */ MCD_OPC_Decode, 245, 2, 57, // Opcode: RETTrr /* 5047 */ MCD_OPC_FilterValue, 1, 252, 2, // Skip to: 5815 /* 5051 */ MCD_OPC_CheckField, 25, 5, 0, 246, 2, // Skip to: 5815 /* 5057 */ MCD_OPC_Decode, 244, 2, 57, // Opcode: RETTri /* 5061 */ MCD_OPC_FilterValue, 58, 115, 0, // Skip to: 5180 /* 5065 */ MCD_OPC_ExtractField, 8, 6, // Inst{13-8} ... /* 5068 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 5088 /* 5072 */ MCD_OPC_CheckField, 29, 1, 0, 225, 2, // Skip to: 5815 /* 5078 */ MCD_OPC_CheckField, 5, 3, 0, 219, 2, // Skip to: 5815 /* 5084 */ MCD_OPC_Decode, 188, 3, 58, // Opcode: TICCrr /* 5088 */ MCD_OPC_FilterValue, 16, 16, 0, // Skip to: 5108 /* 5092 */ MCD_OPC_CheckField, 29, 1, 0, 205, 2, // Skip to: 5815 /* 5098 */ MCD_OPC_CheckField, 5, 3, 0, 199, 2, // Skip to: 5815 /* 5104 */ MCD_OPC_Decode, 199, 3, 58, // Opcode: TXCCrr /* 5108 */ MCD_OPC_FilterValue, 32, 54, 0, // Skip to: 5166 /* 5112 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ... /* 5115 */ MCD_OPC_FilterValue, 0, 184, 2, // Skip to: 5815 /* 5119 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ... /* 5122 */ MCD_OPC_FilterValue, 3, 16, 0, // Skip to: 5142 /* 5126 */ MCD_OPC_CheckField, 25, 4, 0, 30, 0, // Skip to: 5162 /* 5132 */ MCD_OPC_CheckField, 14, 5, 1, 24, 0, // Skip to: 5162 /* 5138 */ MCD_OPC_Decode, 181, 3, 4, // Opcode: TA3 /* 5142 */ MCD_OPC_FilterValue, 5, 16, 0, // Skip to: 5162 /* 5146 */ MCD_OPC_CheckField, 25, 4, 8, 10, 0, // Skip to: 5162 /* 5152 */ MCD_OPC_CheckField, 14, 5, 0, 4, 0, // Skip to: 5162 /* 5158 */ MCD_OPC_Decode, 182, 3, 4, // Opcode: TA5 /* 5162 */ MCD_OPC_Decode, 187, 3, 59, // Opcode: TICCri /* 5166 */ MCD_OPC_FilterValue, 48, 133, 2, // Skip to: 5815 /* 5170 */ MCD_OPC_CheckField, 29, 1, 0, 127, 2, // Skip to: 5815 /* 5176 */ MCD_OPC_Decode, 198, 3, 59, // Opcode: TXCCri /* 5180 */ MCD_OPC_FilterValue, 60, 25, 0, // Skip to: 5209 /* 5184 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5187 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5201 /* 5191 */ MCD_OPC_CheckField, 5, 8, 0, 106, 2, // Skip to: 5815 /* 5197 */ MCD_OPC_Decode, 247, 2, 8, // Opcode: SAVErr /* 5201 */ MCD_OPC_FilterValue, 1, 98, 2, // Skip to: 5815 /* 5205 */ MCD_OPC_Decode, 246, 2, 9, // Opcode: SAVEri /* 5209 */ MCD_OPC_FilterValue, 61, 90, 2, // Skip to: 5815 /* 5213 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5216 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5230 /* 5220 */ MCD_OPC_CheckField, 5, 8, 0, 77, 2, // Skip to: 5815 /* 5226 */ MCD_OPC_Decode, 241, 2, 8, // Opcode: RESTORErr /* 5230 */ MCD_OPC_FilterValue, 1, 69, 2, // Skip to: 5815 /* 5234 */ MCD_OPC_Decode, 240, 2, 9, // Opcode: RESTOREri /* 5238 */ MCD_OPC_FilterValue, 3, 61, 2, // Skip to: 5815 /* 5242 */ MCD_OPC_ExtractField, 19, 6, // Inst{24-19} ... /* 5245 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 5274 /* 5249 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5252 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5266 /* 5256 */ MCD_OPC_CheckField, 5, 8, 0, 41, 2, // Skip to: 5815 /* 5262 */ MCD_OPC_Decode, 194, 2, 60, // Opcode: LDrr /* 5266 */ MCD_OPC_FilterValue, 1, 33, 2, // Skip to: 5815 /* 5270 */ MCD_OPC_Decode, 193, 2, 60, // Opcode: LDri /* 5274 */ MCD_OPC_FilterValue, 1, 25, 0, // Skip to: 5303 /* 5278 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5281 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5295 /* 5285 */ MCD_OPC_CheckField, 5, 8, 0, 12, 2, // Skip to: 5815 /* 5291 */ MCD_OPC_Decode, 188, 2, 60, // Opcode: LDUBrr /* 5295 */ MCD_OPC_FilterValue, 1, 4, 2, // Skip to: 5815 /* 5299 */ MCD_OPC_Decode, 187, 2, 60, // Opcode: LDUBri /* 5303 */ MCD_OPC_FilterValue, 2, 25, 0, // Skip to: 5332 /* 5307 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5310 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5324 /* 5314 */ MCD_OPC_CheckField, 5, 8, 0, 239, 1, // Skip to: 5815 /* 5320 */ MCD_OPC_Decode, 190, 2, 60, // Opcode: LDUHrr /* 5324 */ MCD_OPC_FilterValue, 1, 231, 1, // Skip to: 5815 /* 5328 */ MCD_OPC_Decode, 189, 2, 60, // Opcode: LDUHri /* 5332 */ MCD_OPC_FilterValue, 4, 25, 0, // Skip to: 5361 /* 5336 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5339 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5353 /* 5343 */ MCD_OPC_CheckField, 5, 8, 0, 210, 1, // Skip to: 5815 /* 5349 */ MCD_OPC_Decode, 168, 3, 61, // Opcode: STrr /* 5353 */ MCD_OPC_FilterValue, 1, 202, 1, // Skip to: 5815 /* 5357 */ MCD_OPC_Decode, 167, 3, 61, // Opcode: STri /* 5361 */ MCD_OPC_FilterValue, 5, 25, 0, // Skip to: 5390 /* 5365 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5368 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5382 /* 5372 */ MCD_OPC_CheckField, 5, 8, 0, 181, 1, // Skip to: 5815 /* 5378 */ MCD_OPC_Decode, 156, 3, 61, // Opcode: STBrr /* 5382 */ MCD_OPC_FilterValue, 1, 173, 1, // Skip to: 5815 /* 5386 */ MCD_OPC_Decode, 155, 3, 61, // Opcode: STBri /* 5390 */ MCD_OPC_FilterValue, 6, 25, 0, // Skip to: 5419 /* 5394 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5397 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5411 /* 5401 */ MCD_OPC_CheckField, 5, 8, 0, 152, 1, // Skip to: 5815 /* 5407 */ MCD_OPC_Decode, 162, 3, 61, // Opcode: STHrr /* 5411 */ MCD_OPC_FilterValue, 1, 144, 1, // Skip to: 5815 /* 5415 */ MCD_OPC_Decode, 161, 3, 61, // Opcode: STHri /* 5419 */ MCD_OPC_FilterValue, 8, 25, 0, // Skip to: 5448 /* 5423 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5426 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5440 /* 5430 */ MCD_OPC_CheckField, 5, 8, 0, 123, 1, // Skip to: 5815 /* 5436 */ MCD_OPC_Decode, 186, 2, 60, // Opcode: LDSWrr /* 5440 */ MCD_OPC_FilterValue, 1, 115, 1, // Skip to: 5815 /* 5444 */ MCD_OPC_Decode, 185, 2, 60, // Opcode: LDSWri /* 5448 */ MCD_OPC_FilterValue, 9, 25, 0, // Skip to: 5477 /* 5452 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5455 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5469 /* 5459 */ MCD_OPC_CheckField, 5, 8, 0, 94, 1, // Skip to: 5815 /* 5465 */ MCD_OPC_Decode, 182, 2, 60, // Opcode: LDSBrr /* 5469 */ MCD_OPC_FilterValue, 1, 86, 1, // Skip to: 5815 /* 5473 */ MCD_OPC_Decode, 181, 2, 60, // Opcode: LDSBri /* 5477 */ MCD_OPC_FilterValue, 10, 25, 0, // Skip to: 5506 /* 5481 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5484 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5498 /* 5488 */ MCD_OPC_CheckField, 5, 8, 0, 65, 1, // Skip to: 5815 /* 5494 */ MCD_OPC_Decode, 184, 2, 60, // Opcode: LDSHrr /* 5498 */ MCD_OPC_FilterValue, 1, 57, 1, // Skip to: 5815 /* 5502 */ MCD_OPC_Decode, 183, 2, 60, // Opcode: LDSHri /* 5506 */ MCD_OPC_FilterValue, 11, 25, 0, // Skip to: 5535 /* 5510 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5513 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5527 /* 5517 */ MCD_OPC_CheckField, 5, 8, 0, 36, 1, // Skip to: 5815 /* 5523 */ MCD_OPC_Decode, 192, 2, 60, // Opcode: LDXrr /* 5527 */ MCD_OPC_FilterValue, 1, 28, 1, // Skip to: 5815 /* 5531 */ MCD_OPC_Decode, 191, 2, 60, // Opcode: LDXri /* 5535 */ MCD_OPC_FilterValue, 14, 25, 0, // Skip to: 5564 /* 5539 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5542 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5556 /* 5546 */ MCD_OPC_CheckField, 5, 8, 0, 7, 1, // Skip to: 5815 /* 5552 */ MCD_OPC_Decode, 166, 3, 61, // Opcode: STXrr /* 5556 */ MCD_OPC_FilterValue, 1, 255, 0, // Skip to: 5815 /* 5560 */ MCD_OPC_Decode, 165, 3, 61, // Opcode: STXri /* 5564 */ MCD_OPC_FilterValue, 15, 25, 0, // Skip to: 5593 /* 5568 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5571 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5585 /* 5575 */ MCD_OPC_CheckField, 5, 8, 0, 234, 0, // Skip to: 5815 /* 5581 */ MCD_OPC_Decode, 180, 3, 62, // Opcode: SWAPrr /* 5585 */ MCD_OPC_FilterValue, 1, 226, 0, // Skip to: 5815 /* 5589 */ MCD_OPC_Decode, 179, 3, 62, // Opcode: SWAPri /* 5593 */ MCD_OPC_FilterValue, 32, 25, 0, // Skip to: 5622 /* 5597 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5600 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5614 /* 5604 */ MCD_OPC_CheckField, 5, 8, 0, 205, 0, // Skip to: 5815 /* 5610 */ MCD_OPC_Decode, 178, 2, 63, // Opcode: LDFrr /* 5614 */ MCD_OPC_FilterValue, 1, 197, 0, // Skip to: 5815 /* 5618 */ MCD_OPC_Decode, 177, 2, 63, // Opcode: LDFri /* 5622 */ MCD_OPC_FilterValue, 34, 33, 0, // Skip to: 5659 /* 5626 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5629 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5647 /* 5633 */ MCD_OPC_CheckPredicate, 0, 178, 0, // Skip to: 5815 /* 5637 */ MCD_OPC_CheckField, 5, 8, 0, 172, 0, // Skip to: 5815 /* 5643 */ MCD_OPC_Decode, 180, 2, 64, // Opcode: LDQFrr /* 5647 */ MCD_OPC_FilterValue, 1, 164, 0, // Skip to: 5815 /* 5651 */ MCD_OPC_CheckPredicate, 0, 160, 0, // Skip to: 5815 /* 5655 */ MCD_OPC_Decode, 179, 2, 64, // Opcode: LDQFri /* 5659 */ MCD_OPC_FilterValue, 35, 25, 0, // Skip to: 5688 /* 5663 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5666 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5680 /* 5670 */ MCD_OPC_CheckField, 5, 8, 0, 139, 0, // Skip to: 5815 /* 5676 */ MCD_OPC_Decode, 176, 2, 65, // Opcode: LDDFrr /* 5680 */ MCD_OPC_FilterValue, 1, 131, 0, // Skip to: 5815 /* 5684 */ MCD_OPC_Decode, 175, 2, 65, // Opcode: LDDFri /* 5688 */ MCD_OPC_FilterValue, 36, 25, 0, // Skip to: 5717 /* 5692 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5695 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5709 /* 5699 */ MCD_OPC_CheckField, 5, 8, 0, 110, 0, // Skip to: 5815 /* 5705 */ MCD_OPC_Decode, 160, 3, 66, // Opcode: STFrr /* 5709 */ MCD_OPC_FilterValue, 1, 102, 0, // Skip to: 5815 /* 5713 */ MCD_OPC_Decode, 159, 3, 66, // Opcode: STFri /* 5717 */ MCD_OPC_FilterValue, 38, 33, 0, // Skip to: 5754 /* 5721 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5724 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5742 /* 5728 */ MCD_OPC_CheckPredicate, 0, 83, 0, // Skip to: 5815 /* 5732 */ MCD_OPC_CheckField, 5, 8, 0, 77, 0, // Skip to: 5815 /* 5738 */ MCD_OPC_Decode, 164, 3, 67, // Opcode: STQFrr /* 5742 */ MCD_OPC_FilterValue, 1, 69, 0, // Skip to: 5815 /* 5746 */ MCD_OPC_CheckPredicate, 0, 65, 0, // Skip to: 5815 /* 5750 */ MCD_OPC_Decode, 163, 3, 67, // Opcode: STQFri /* 5754 */ MCD_OPC_FilterValue, 39, 25, 0, // Skip to: 5783 /* 5758 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ... /* 5761 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 5775 /* 5765 */ MCD_OPC_CheckField, 5, 8, 0, 44, 0, // Skip to: 5815 /* 5771 */ MCD_OPC_Decode, 158, 3, 68, // Opcode: STDFrr /* 5775 */ MCD_OPC_FilterValue, 1, 36, 0, // Skip to: 5815 /* 5779 */ MCD_OPC_Decode, 157, 3, 68, // Opcode: STDFri /* 5783 */ MCD_OPC_FilterValue, 60, 14, 0, // Skip to: 5801 /* 5787 */ MCD_OPC_CheckPredicate, 0, 24, 0, // Skip to: 5815 /* 5791 */ MCD_OPC_CheckField, 5, 9, 128, 1, 17, 0, // Skip to: 5815 /* 5798 */ MCD_OPC_Decode, 120, 69, // Opcode: CASrr /* 5801 */ MCD_OPC_FilterValue, 62, 10, 0, // Skip to: 5815 /* 5805 */ MCD_OPC_CheckField, 5, 9, 128, 1, 3, 0, // Skip to: 5815 /* 5812 */ MCD_OPC_Decode, 119, 70, // Opcode: CASXrr /* 5815 */ MCD_OPC_Fail, 0 }; static bool getbool(uint64_t b) { return b != 0; } static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { switch (Idx) { default: // llvm_unreachable("Invalid index!"); case 0: return getbool(Bits & Sparc_FeatureV9); case 1: return getbool(Bits & Sparc_FeatureVIS3); case 2: return getbool(Bits & Sparc_FeatureVIS); case 3: return getbool(Bits & Sparc_FeatureVIS2); } } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, const void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ tmp = fieldname(insn, 0, 22); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 1: \ tmp = fieldname(insn, 0, 19); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 25, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 2: \ tmp = fieldname(insn, 0, 22); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 25, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 3: \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 0, 14) << 0; \ tmp |= fieldname(insn, 20, 2) << 14; \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 4: \ return S; \ case 5: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 22); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 6: \ tmp = fieldname(insn, 0, 19); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 25, 4); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 20, 2); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 7: \ tmp = fieldname(insn, 0, 30); \ if (DecodeCall(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 9: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 13); \ if (DecodeSIMM13(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 11: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 13); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 12: \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 13: \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 13); \ if (DecodeSIMM13(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 15: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 16: \ tmp = fieldname(insn, 0, 13); \ if (DecodeSIMM13(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 18: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 19: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 11); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 20: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 11); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 21: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 22: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 23: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 25: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 33: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 34: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 37: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 38: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 39: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 40: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 41: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 42: \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 11, 2); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 43: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 44: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 45: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 46: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 47: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 48: \ tmp = fieldname(insn, 0, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 49: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 50: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 51: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 52: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 53: \ tmp = fieldname(insn, 25, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 54: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 55: \ tmp = fieldname(insn, 25, 5); \ if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 56: \ if (DecodeJMPL(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 57: \ if (DecodeReturn(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 58: \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 59: \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 8); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 25, 4); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 60: \ if (DecodeLoadInt(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 61: \ if (DecodeStoreInt(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 62: \ if (DecodeSWAP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 63: \ if (DecodeLoadFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 64: \ if (DecodeLoadQFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 65: \ if (DecodeLoadDFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 66: \ if (DecodeStoreFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 67: \ if (DecodeStoreQFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 68: \ if (DecodeStoreDFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 69: \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 70: \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 14, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 25, 5); \ if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \ { \ uint64_t Bits = getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction_4, uint32_t) DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t) capstone-sys-0.11.0/capstone/arch/Sparc/SparcGenInstrInfo.inc010066400017500001750000000267571363402546700223310ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { SP_PHI = 0, SP_INLINEASM = 1, SP_CFI_INSTRUCTION = 2, SP_EH_LABEL = 3, SP_GC_LABEL = 4, SP_KILL = 5, SP_EXTRACT_SUBREG = 6, SP_INSERT_SUBREG = 7, SP_IMPLICIT_DEF = 8, SP_SUBREG_TO_REG = 9, SP_COPY_TO_REGCLASS = 10, SP_DBG_VALUE = 11, SP_REG_SEQUENCE = 12, SP_COPY = 13, SP_BUNDLE = 14, SP_LIFETIME_START = 15, SP_LIFETIME_END = 16, SP_STACKMAP = 17, SP_PATCHPOINT = 18, SP_LOAD_STACK_GUARD = 19, SP_STATEPOINT = 20, SP_FRAME_ALLOC = 21, SP_ADDCCri = 22, SP_ADDCCrr = 23, SP_ADDCri = 24, SP_ADDCrr = 25, SP_ADDEri = 26, SP_ADDErr = 27, SP_ADDXC = 28, SP_ADDXCCC = 29, SP_ADDXri = 30, SP_ADDXrr = 31, SP_ADDri = 32, SP_ADDrr = 33, SP_ADJCALLSTACKDOWN = 34, SP_ADJCALLSTACKUP = 35, SP_ALIGNADDR = 36, SP_ALIGNADDRL = 37, SP_ANDCCri = 38, SP_ANDCCrr = 39, SP_ANDNCCri = 40, SP_ANDNCCrr = 41, SP_ANDNri = 42, SP_ANDNrr = 43, SP_ANDXNrr = 44, SP_ANDXri = 45, SP_ANDXrr = 46, SP_ANDri = 47, SP_ANDrr = 48, SP_ARRAY16 = 49, SP_ARRAY32 = 50, SP_ARRAY8 = 51, SP_ATOMIC_LOAD_ADD_32 = 52, SP_ATOMIC_LOAD_ADD_64 = 53, SP_ATOMIC_LOAD_AND_32 = 54, SP_ATOMIC_LOAD_AND_64 = 55, SP_ATOMIC_LOAD_MAX_32 = 56, SP_ATOMIC_LOAD_MAX_64 = 57, SP_ATOMIC_LOAD_MIN_32 = 58, SP_ATOMIC_LOAD_MIN_64 = 59, SP_ATOMIC_LOAD_NAND_32 = 60, SP_ATOMIC_LOAD_NAND_64 = 61, SP_ATOMIC_LOAD_OR_32 = 62, SP_ATOMIC_LOAD_OR_64 = 63, SP_ATOMIC_LOAD_SUB_32 = 64, SP_ATOMIC_LOAD_SUB_64 = 65, SP_ATOMIC_LOAD_UMAX_32 = 66, SP_ATOMIC_LOAD_UMAX_64 = 67, SP_ATOMIC_LOAD_UMIN_32 = 68, SP_ATOMIC_LOAD_UMIN_64 = 69, SP_ATOMIC_LOAD_XOR_32 = 70, SP_ATOMIC_LOAD_XOR_64 = 71, SP_ATOMIC_SWAP_64 = 72, SP_BA = 73, SP_BCOND = 74, SP_BCONDA = 75, SP_BINDri = 76, SP_BINDrr = 77, SP_BMASK = 78, SP_BPFCC = 79, SP_BPFCCA = 80, SP_BPFCCANT = 81, SP_BPFCCNT = 82, SP_BPGEZapn = 83, SP_BPGEZapt = 84, SP_BPGEZnapn = 85, SP_BPGEZnapt = 86, SP_BPGZapn = 87, SP_BPGZapt = 88, SP_BPGZnapn = 89, SP_BPGZnapt = 90, SP_BPICC = 91, SP_BPICCA = 92, SP_BPICCANT = 93, SP_BPICCNT = 94, SP_BPLEZapn = 95, SP_BPLEZapt = 96, SP_BPLEZnapn = 97, SP_BPLEZnapt = 98, SP_BPLZapn = 99, SP_BPLZapt = 100, SP_BPLZnapn = 101, SP_BPLZnapt = 102, SP_BPNZapn = 103, SP_BPNZapt = 104, SP_BPNZnapn = 105, SP_BPNZnapt = 106, SP_BPXCC = 107, SP_BPXCCA = 108, SP_BPXCCANT = 109, SP_BPXCCNT = 110, SP_BPZapn = 111, SP_BPZapt = 112, SP_BPZnapn = 113, SP_BPZnapt = 114, SP_BSHUFFLE = 115, SP_CALL = 116, SP_CALLri = 117, SP_CALLrr = 118, SP_CASXrr = 119, SP_CASrr = 120, SP_CMASK16 = 121, SP_CMASK32 = 122, SP_CMASK8 = 123, SP_CMPri = 124, SP_CMPrr = 125, SP_EDGE16 = 126, SP_EDGE16L = 127, SP_EDGE16LN = 128, SP_EDGE16N = 129, SP_EDGE32 = 130, SP_EDGE32L = 131, SP_EDGE32LN = 132, SP_EDGE32N = 133, SP_EDGE8 = 134, SP_EDGE8L = 135, SP_EDGE8LN = 136, SP_EDGE8N = 137, SP_FABSD = 138, SP_FABSQ = 139, SP_FABSS = 140, SP_FADDD = 141, SP_FADDQ = 142, SP_FADDS = 143, SP_FALIGNADATA = 144, SP_FAND = 145, SP_FANDNOT1 = 146, SP_FANDNOT1S = 147, SP_FANDNOT2 = 148, SP_FANDNOT2S = 149, SP_FANDS = 150, SP_FBCOND = 151, SP_FBCONDA = 152, SP_FCHKSM16 = 153, SP_FCMPD = 154, SP_FCMPEQ16 = 155, SP_FCMPEQ32 = 156, SP_FCMPGT16 = 157, SP_FCMPGT32 = 158, SP_FCMPLE16 = 159, SP_FCMPLE32 = 160, SP_FCMPNE16 = 161, SP_FCMPNE32 = 162, SP_FCMPQ = 163, SP_FCMPS = 164, SP_FDIVD = 165, SP_FDIVQ = 166, SP_FDIVS = 167, SP_FDMULQ = 168, SP_FDTOI = 169, SP_FDTOQ = 170, SP_FDTOS = 171, SP_FDTOX = 172, SP_FEXPAND = 173, SP_FHADDD = 174, SP_FHADDS = 175, SP_FHSUBD = 176, SP_FHSUBS = 177, SP_FITOD = 178, SP_FITOQ = 179, SP_FITOS = 180, SP_FLCMPD = 181, SP_FLCMPS = 182, SP_FLUSHW = 183, SP_FMEAN16 = 184, SP_FMOVD = 185, SP_FMOVD_FCC = 186, SP_FMOVD_ICC = 187, SP_FMOVD_XCC = 188, SP_FMOVQ = 189, SP_FMOVQ_FCC = 190, SP_FMOVQ_ICC = 191, SP_FMOVQ_XCC = 192, SP_FMOVRGEZD = 193, SP_FMOVRGEZQ = 194, SP_FMOVRGEZS = 195, SP_FMOVRGZD = 196, SP_FMOVRGZQ = 197, SP_FMOVRGZS = 198, SP_FMOVRLEZD = 199, SP_FMOVRLEZQ = 200, SP_FMOVRLEZS = 201, SP_FMOVRLZD = 202, SP_FMOVRLZQ = 203, SP_FMOVRLZS = 204, SP_FMOVRNZD = 205, SP_FMOVRNZQ = 206, SP_FMOVRNZS = 207, SP_FMOVRZD = 208, SP_FMOVRZQ = 209, SP_FMOVRZS = 210, SP_FMOVS = 211, SP_FMOVS_FCC = 212, SP_FMOVS_ICC = 213, SP_FMOVS_XCC = 214, SP_FMUL8SUX16 = 215, SP_FMUL8ULX16 = 216, SP_FMUL8X16 = 217, SP_FMUL8X16AL = 218, SP_FMUL8X16AU = 219, SP_FMULD = 220, SP_FMULD8SUX16 = 221, SP_FMULD8ULX16 = 222, SP_FMULQ = 223, SP_FMULS = 224, SP_FNADDD = 225, SP_FNADDS = 226, SP_FNAND = 227, SP_FNANDS = 228, SP_FNEGD = 229, SP_FNEGQ = 230, SP_FNEGS = 231, SP_FNHADDD = 232, SP_FNHADDS = 233, SP_FNMULD = 234, SP_FNMULS = 235, SP_FNOR = 236, SP_FNORS = 237, SP_FNOT1 = 238, SP_FNOT1S = 239, SP_FNOT2 = 240, SP_FNOT2S = 241, SP_FNSMULD = 242, SP_FONE = 243, SP_FONES = 244, SP_FOR = 245, SP_FORNOT1 = 246, SP_FORNOT1S = 247, SP_FORNOT2 = 248, SP_FORNOT2S = 249, SP_FORS = 250, SP_FPACK16 = 251, SP_FPACK32 = 252, SP_FPACKFIX = 253, SP_FPADD16 = 254, SP_FPADD16S = 255, SP_FPADD32 = 256, SP_FPADD32S = 257, SP_FPADD64 = 258, SP_FPMERGE = 259, SP_FPSUB16 = 260, SP_FPSUB16S = 261, SP_FPSUB32 = 262, SP_FPSUB32S = 263, SP_FQTOD = 264, SP_FQTOI = 265, SP_FQTOS = 266, SP_FQTOX = 267, SP_FSLAS16 = 268, SP_FSLAS32 = 269, SP_FSLL16 = 270, SP_FSLL32 = 271, SP_FSMULD = 272, SP_FSQRTD = 273, SP_FSQRTQ = 274, SP_FSQRTS = 275, SP_FSRA16 = 276, SP_FSRA32 = 277, SP_FSRC1 = 278, SP_FSRC1S = 279, SP_FSRC2 = 280, SP_FSRC2S = 281, SP_FSRL16 = 282, SP_FSRL32 = 283, SP_FSTOD = 284, SP_FSTOI = 285, SP_FSTOQ = 286, SP_FSTOX = 287, SP_FSUBD = 288, SP_FSUBQ = 289, SP_FSUBS = 290, SP_FXNOR = 291, SP_FXNORS = 292, SP_FXOR = 293, SP_FXORS = 294, SP_FXTOD = 295, SP_FXTOQ = 296, SP_FXTOS = 297, SP_FZERO = 298, SP_FZEROS = 299, SP_GETPCX = 300, SP_JMPLri = 301, SP_JMPLrr = 302, SP_LDDFri = 303, SP_LDDFrr = 304, SP_LDFri = 305, SP_LDFrr = 306, SP_LDQFri = 307, SP_LDQFrr = 308, SP_LDSBri = 309, SP_LDSBrr = 310, SP_LDSHri = 311, SP_LDSHrr = 312, SP_LDSWri = 313, SP_LDSWrr = 314, SP_LDUBri = 315, SP_LDUBrr = 316, SP_LDUHri = 317, SP_LDUHrr = 318, SP_LDXri = 319, SP_LDXrr = 320, SP_LDri = 321, SP_LDrr = 322, SP_LEAX_ADDri = 323, SP_LEA_ADDri = 324, SP_LZCNT = 325, SP_MEMBARi = 326, SP_MOVDTOX = 327, SP_MOVFCCri = 328, SP_MOVFCCrr = 329, SP_MOVICCri = 330, SP_MOVICCrr = 331, SP_MOVRGEZri = 332, SP_MOVRGEZrr = 333, SP_MOVRGZri = 334, SP_MOVRGZrr = 335, SP_MOVRLEZri = 336, SP_MOVRLEZrr = 337, SP_MOVRLZri = 338, SP_MOVRLZrr = 339, SP_MOVRNZri = 340, SP_MOVRNZrr = 341, SP_MOVRRZri = 342, SP_MOVRRZrr = 343, SP_MOVSTOSW = 344, SP_MOVSTOUW = 345, SP_MOVWTOS = 346, SP_MOVXCCri = 347, SP_MOVXCCrr = 348, SP_MOVXTOD = 349, SP_MULXri = 350, SP_MULXrr = 351, SP_NOP = 352, SP_ORCCri = 353, SP_ORCCrr = 354, SP_ORNCCri = 355, SP_ORNCCrr = 356, SP_ORNri = 357, SP_ORNrr = 358, SP_ORXNrr = 359, SP_ORXri = 360, SP_ORXrr = 361, SP_ORri = 362, SP_ORrr = 363, SP_PDIST = 364, SP_PDISTN = 365, SP_POPCrr = 366, SP_RDY = 367, SP_RESTOREri = 368, SP_RESTORErr = 369, SP_RET = 370, SP_RETL = 371, SP_RETTri = 372, SP_RETTrr = 373, SP_SAVEri = 374, SP_SAVErr = 375, SP_SDIVCCri = 376, SP_SDIVCCrr = 377, SP_SDIVXri = 378, SP_SDIVXrr = 379, SP_SDIVri = 380, SP_SDIVrr = 381, SP_SELECT_CC_DFP_FCC = 382, SP_SELECT_CC_DFP_ICC = 383, SP_SELECT_CC_FP_FCC = 384, SP_SELECT_CC_FP_ICC = 385, SP_SELECT_CC_Int_FCC = 386, SP_SELECT_CC_Int_ICC = 387, SP_SELECT_CC_QFP_FCC = 388, SP_SELECT_CC_QFP_ICC = 389, SP_SETHIXi = 390, SP_SETHIi = 391, SP_SHUTDOWN = 392, SP_SIAM = 393, SP_SLLXri = 394, SP_SLLXrr = 395, SP_SLLri = 396, SP_SLLrr = 397, SP_SMULCCri = 398, SP_SMULCCrr = 399, SP_SMULri = 400, SP_SMULrr = 401, SP_SRAXri = 402, SP_SRAXrr = 403, SP_SRAri = 404, SP_SRArr = 405, SP_SRLXri = 406, SP_SRLXrr = 407, SP_SRLri = 408, SP_SRLrr = 409, SP_STBAR = 410, SP_STBri = 411, SP_STBrr = 412, SP_STDFri = 413, SP_STDFrr = 414, SP_STFri = 415, SP_STFrr = 416, SP_STHri = 417, SP_STHrr = 418, SP_STQFri = 419, SP_STQFrr = 420, SP_STXri = 421, SP_STXrr = 422, SP_STri = 423, SP_STrr = 424, SP_SUBCCri = 425, SP_SUBCCrr = 426, SP_SUBCri = 427, SP_SUBCrr = 428, SP_SUBEri = 429, SP_SUBErr = 430, SP_SUBXri = 431, SP_SUBXrr = 432, SP_SUBri = 433, SP_SUBrr = 434, SP_SWAPri = 435, SP_SWAPrr = 436, SP_TA3 = 437, SP_TA5 = 438, SP_TADDCCTVri = 439, SP_TADDCCTVrr = 440, SP_TADDCCri = 441, SP_TADDCCrr = 442, SP_TICCri = 443, SP_TICCrr = 444, SP_TLS_ADDXrr = 445, SP_TLS_ADDrr = 446, SP_TLS_CALL = 447, SP_TLS_LDXrr = 448, SP_TLS_LDrr = 449, SP_TSUBCCTVri = 450, SP_TSUBCCTVrr = 451, SP_TSUBCCri = 452, SP_TSUBCCrr = 453, SP_TXCCri = 454, SP_TXCCrr = 455, SP_UDIVCCri = 456, SP_UDIVCCrr = 457, SP_UDIVXri = 458, SP_UDIVXrr = 459, SP_UDIVri = 460, SP_UDIVrr = 461, SP_UMULCCri = 462, SP_UMULCCrr = 463, SP_UMULXHI = 464, SP_UMULri = 465, SP_UMULrr = 466, SP_UNIMP = 467, SP_V9FCMPD = 468, SP_V9FCMPED = 469, SP_V9FCMPEQ = 470, SP_V9FCMPES = 471, SP_V9FCMPQ = 472, SP_V9FCMPS = 473, SP_V9FMOVD_FCC = 474, SP_V9FMOVQ_FCC = 475, SP_V9FMOVS_FCC = 476, SP_V9MOVFCCri = 477, SP_V9MOVFCCrr = 478, SP_WRYri = 479, SP_WRYrr = 480, SP_XMULX = 481, SP_XMULXHI = 482, SP_XNORCCri = 483, SP_XNORCCrr = 484, SP_XNORXrr = 485, SP_XNORri = 486, SP_XNORrr = 487, SP_XORCCri = 488, SP_XORCCrr = 489, SP_XORXri = 490, SP_XORXrr = 491, SP_XORri = 492, SP_XORrr = 493, SP_INSTRUCTION_LIST_END = 494 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/Sparc/SparcGenRegisterInfo.inc010066400017500001750000000311461363402546700230020ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { SP_NoRegister, SP_ICC = 1, SP_Y = 2, SP_D0 = 3, SP_D1 = 4, SP_D2 = 5, SP_D3 = 6, SP_D4 = 7, SP_D5 = 8, SP_D6 = 9, SP_D7 = 10, SP_D8 = 11, SP_D9 = 12, SP_D10 = 13, SP_D11 = 14, SP_D12 = 15, SP_D13 = 16, SP_D14 = 17, SP_D15 = 18, SP_D16 = 19, SP_D17 = 20, SP_D18 = 21, SP_D19 = 22, SP_D20 = 23, SP_D21 = 24, SP_D22 = 25, SP_D23 = 26, SP_D24 = 27, SP_D25 = 28, SP_D26 = 29, SP_D27 = 30, SP_D28 = 31, SP_D29 = 32, SP_D30 = 33, SP_D31 = 34, SP_F0 = 35, SP_F1 = 36, SP_F2 = 37, SP_F3 = 38, SP_F4 = 39, SP_F5 = 40, SP_F6 = 41, SP_F7 = 42, SP_F8 = 43, SP_F9 = 44, SP_F10 = 45, SP_F11 = 46, SP_F12 = 47, SP_F13 = 48, SP_F14 = 49, SP_F15 = 50, SP_F16 = 51, SP_F17 = 52, SP_F18 = 53, SP_F19 = 54, SP_F20 = 55, SP_F21 = 56, SP_F22 = 57, SP_F23 = 58, SP_F24 = 59, SP_F25 = 60, SP_F26 = 61, SP_F27 = 62, SP_F28 = 63, SP_F29 = 64, SP_F30 = 65, SP_F31 = 66, SP_FCC0 = 67, SP_FCC1 = 68, SP_FCC2 = 69, SP_FCC3 = 70, SP_G0 = 71, SP_G1 = 72, SP_G2 = 73, SP_G3 = 74, SP_G4 = 75, SP_G5 = 76, SP_G6 = 77, SP_G7 = 78, SP_I0 = 79, SP_I1 = 80, SP_I2 = 81, SP_I3 = 82, SP_I4 = 83, SP_I5 = 84, SP_I6 = 85, SP_I7 = 86, SP_L0 = 87, SP_L1 = 88, SP_L2 = 89, SP_L3 = 90, SP_L4 = 91, SP_L5 = 92, SP_L6 = 93, SP_L7 = 94, SP_O0 = 95, SP_O1 = 96, SP_O2 = 97, SP_O3 = 98, SP_O4 = 99, SP_O5 = 100, SP_O6 = 101, SP_O7 = 102, SP_Q0 = 103, SP_Q1 = 104, SP_Q2 = 105, SP_Q3 = 106, SP_Q4 = 107, SP_Q5 = 108, SP_Q6 = 109, SP_Q7 = 110, SP_Q8 = 111, SP_Q9 = 112, SP_Q10 = 113, SP_Q11 = 114, SP_Q12 = 115, SP_Q13 = 116, SP_Q14 = 117, SP_Q15 = 118, SP_NUM_TARGET_REGS // 119 }; // Register classes enum { SP_FCCRegsRegClassID = 0, SP_FPRegsRegClassID = 1, SP_IntRegsRegClassID = 2, SP_DFPRegsRegClassID = 3, SP_I64RegsRegClassID = 4, SP_DFPRegs_with_sub_evenRegClassID = 5, SP_QFPRegsRegClassID = 6, SP_QFPRegs_with_sub_evenRegClassID = 7 }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg SparcRegDiffLists[] = { /* 0 */ 65126, 1, 1, 1, 0, /* 5 */ 32, 1, 0, /* 8 */ 65436, 32, 1, 65504, 33, 1, 0, /* 15 */ 34, 1, 0, /* 18 */ 65437, 34, 1, 65502, 35, 1, 0, /* 25 */ 36, 1, 0, /* 28 */ 65438, 36, 1, 65500, 37, 1, 0, /* 35 */ 38, 1, 0, /* 38 */ 65439, 38, 1, 65498, 39, 1, 0, /* 45 */ 40, 1, 0, /* 48 */ 65440, 40, 1, 65496, 41, 1, 0, /* 55 */ 42, 1, 0, /* 58 */ 65441, 42, 1, 65494, 43, 1, 0, /* 65 */ 44, 1, 0, /* 68 */ 65442, 44, 1, 65492, 45, 1, 0, /* 75 */ 46, 1, 0, /* 78 */ 65443, 46, 1, 65490, 47, 1, 0, /* 85 */ 65348, 1, 0, /* 88 */ 65444, 1, 0, /* 91 */ 65445, 1, 0, /* 94 */ 65446, 1, 0, /* 97 */ 65447, 1, 0, /* 100 */ 65448, 1, 0, /* 103 */ 65449, 1, 0, /* 106 */ 65450, 1, 0, /* 109 */ 65451, 1, 0, /* 112 */ 65532, 1, 0, /* 115 */ 15, 0, /* 117 */ 84, 0, /* 119 */ 85, 0, /* 121 */ 86, 0, /* 123 */ 87, 0, /* 125 */ 88, 0, /* 127 */ 89, 0, /* 129 */ 90, 0, /* 131 */ 91, 0, /* 133 */ 65488, 92, 0, /* 136 */ 65489, 92, 0, /* 139 */ 65489, 93, 0, /* 142 */ 65490, 93, 0, /* 145 */ 65491, 93, 0, /* 148 */ 65491, 94, 0, /* 151 */ 65492, 94, 0, /* 154 */ 65493, 94, 0, /* 157 */ 65493, 95, 0, /* 160 */ 65494, 95, 0, /* 163 */ 65495, 95, 0, /* 166 */ 65495, 96, 0, /* 169 */ 65496, 96, 0, /* 172 */ 65497, 96, 0, /* 175 */ 65497, 97, 0, /* 178 */ 65498, 97, 0, /* 181 */ 65499, 97, 0, /* 184 */ 65499, 98, 0, /* 187 */ 65500, 98, 0, /* 190 */ 65501, 98, 0, /* 193 */ 65501, 99, 0, /* 196 */ 65502, 99, 0, /* 199 */ 65503, 99, 0, /* 202 */ 65503, 100, 0, /* 205 */ 65504, 100, 0, /* 208 */ 65503, 0, /* 210 */ 65519, 0, /* 212 */ 65535, 0, }; static const uint16_t SparcSubRegIdxLists[] = { /* 0 */ 1, 3, 0, /* 3 */ 2, 4, 0, /* 6 */ 2, 1, 3, 4, 5, 6, 0, }; static MCRegisterDesc SparcRegDesc[] = { // Descriptors { 3, 0, 0, 0, 0, 0 }, { 406, 4, 4, 2, 3393, 0 }, { 410, 4, 4, 2, 3393, 0 }, { 33, 5, 203, 0, 1794, 2 }, { 87, 12, 194, 0, 1794, 2 }, { 133, 15, 194, 0, 1794, 2 }, { 179, 22, 185, 0, 1794, 2 }, { 220, 25, 185, 0, 1794, 2 }, { 261, 32, 176, 0, 1794, 2 }, { 298, 35, 176, 0, 1794, 2 }, { 335, 42, 167, 0, 1794, 2 }, { 372, 45, 167, 0, 1794, 2 }, { 397, 52, 158, 0, 1794, 2 }, { 0, 55, 158, 0, 1794, 2 }, { 54, 62, 149, 0, 1794, 2 }, { 108, 65, 149, 0, 1794, 2 }, { 154, 72, 140, 0, 1794, 2 }, { 200, 75, 140, 0, 1794, 2 }, { 241, 82, 134, 0, 1794, 2 }, { 282, 4, 134, 2, 1841, 0 }, { 319, 4, 131, 2, 1841, 0 }, { 356, 4, 131, 2, 1841, 0 }, { 381, 4, 129, 2, 1841, 0 }, { 12, 4, 129, 2, 1841, 0 }, { 66, 4, 127, 2, 1841, 0 }, { 120, 4, 127, 2, 1841, 0 }, { 166, 4, 125, 2, 1841, 0 }, { 212, 4, 125, 2, 1841, 0 }, { 253, 4, 123, 2, 1841, 0 }, { 290, 4, 123, 2, 1841, 0 }, { 327, 4, 121, 2, 1841, 0 }, { 364, 4, 121, 2, 1841, 0 }, { 389, 4, 119, 2, 1841, 0 }, { 20, 4, 119, 2, 1841, 0 }, { 74, 4, 117, 2, 1841, 0 }, { 36, 4, 205, 2, 3329, 0 }, { 90, 4, 202, 2, 3329, 0 }, { 136, 4, 199, 2, 3329, 0 }, { 182, 4, 196, 2, 3329, 0 }, { 223, 4, 196, 2, 3329, 0 }, { 264, 4, 193, 2, 3329, 0 }, { 301, 4, 190, 2, 3329, 0 }, { 338, 4, 187, 2, 3329, 0 }, { 375, 4, 187, 2, 3329, 0 }, { 400, 4, 184, 2, 3329, 0 }, { 4, 4, 181, 2, 3329, 0 }, { 58, 4, 178, 2, 3329, 0 }, { 112, 4, 178, 2, 3329, 0 }, { 158, 4, 175, 2, 3329, 0 }, { 204, 4, 172, 2, 3329, 0 }, { 245, 4, 169, 2, 3329, 0 }, { 286, 4, 169, 2, 3329, 0 }, { 323, 4, 166, 2, 3329, 0 }, { 360, 4, 163, 2, 3329, 0 }, { 385, 4, 160, 2, 3329, 0 }, { 16, 4, 160, 2, 3329, 0 }, { 70, 4, 157, 2, 3329, 0 }, { 124, 4, 154, 2, 3329, 0 }, { 170, 4, 151, 2, 3329, 0 }, { 216, 4, 151, 2, 3329, 0 }, { 257, 4, 148, 2, 3329, 0 }, { 294, 4, 145, 2, 3329, 0 }, { 331, 4, 142, 2, 3329, 0 }, { 368, 4, 142, 2, 3329, 0 }, { 393, 4, 139, 2, 3329, 0 }, { 24, 4, 136, 2, 3329, 0 }, { 78, 4, 133, 2, 3329, 0 }, { 28, 4, 4, 2, 3361, 0 }, { 82, 4, 4, 2, 3361, 0 }, { 128, 4, 4, 2, 3361, 0 }, { 174, 4, 4, 2, 3361, 0 }, { 39, 4, 4, 2, 3361, 0 }, { 93, 4, 4, 2, 3361, 0 }, { 139, 4, 4, 2, 3361, 0 }, { 185, 4, 4, 2, 3361, 0 }, { 226, 4, 4, 2, 3361, 0 }, { 267, 4, 4, 2, 3361, 0 }, { 304, 4, 4, 2, 3361, 0 }, { 341, 4, 4, 2, 3361, 0 }, { 42, 4, 4, 2, 3361, 0 }, { 96, 4, 4, 2, 3361, 0 }, { 142, 4, 4, 2, 3361, 0 }, { 188, 4, 4, 2, 3361, 0 }, { 229, 4, 4, 2, 3361, 0 }, { 270, 4, 4, 2, 3361, 0 }, { 307, 4, 4, 2, 3361, 0 }, { 344, 4, 4, 2, 3361, 0 }, { 45, 4, 4, 2, 3361, 0 }, { 99, 4, 4, 2, 3361, 0 }, { 145, 4, 4, 2, 3361, 0 }, { 191, 4, 4, 2, 3361, 0 }, { 232, 4, 4, 2, 3361, 0 }, { 273, 4, 4, 2, 3361, 0 }, { 310, 4, 4, 2, 3361, 0 }, { 347, 4, 4, 2, 3361, 0 }, { 48, 4, 4, 2, 3361, 0 }, { 102, 4, 4, 2, 3361, 0 }, { 148, 4, 4, 2, 3361, 0 }, { 194, 4, 4, 2, 3361, 0 }, { 235, 4, 4, 2, 3361, 0 }, { 276, 4, 4, 2, 3361, 0 }, { 313, 4, 4, 2, 3361, 0 }, { 350, 4, 4, 2, 3361, 0 }, { 51, 8, 4, 6, 4, 5 }, { 105, 18, 4, 6, 4, 5 }, { 151, 28, 4, 6, 4, 5 }, { 197, 38, 4, 6, 4, 5 }, { 238, 48, 4, 6, 4, 5 }, { 279, 58, 4, 6, 4, 5 }, { 316, 68, 4, 6, 4, 5 }, { 353, 78, 4, 6, 4, 5 }, { 378, 88, 4, 3, 1362, 10 }, { 403, 91, 4, 3, 1362, 10 }, { 8, 94, 4, 3, 1362, 10 }, { 62, 97, 4, 3, 1362, 10 }, { 116, 100, 4, 3, 1362, 10 }, { 162, 103, 4, 3, 1362, 10 }, { 208, 106, 4, 3, 1362, 10 }, { 249, 109, 4, 3, 1362, 10 }, }; // FCCRegs Register Class... static const MCPhysReg FCCRegs[] = { SP_FCC0, SP_FCC1, SP_FCC2, SP_FCC3, }; // FCCRegs Bit set. static const uint8_t FCCRegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, }; // FPRegs Register Class... static const MCPhysReg FPRegs[] = { SP_F0, SP_F1, SP_F2, SP_F3, SP_F4, SP_F5, SP_F6, SP_F7, SP_F8, SP_F9, SP_F10, SP_F11, SP_F12, SP_F13, SP_F14, SP_F15, SP_F16, SP_F17, SP_F18, SP_F19, SP_F20, SP_F21, SP_F22, SP_F23, SP_F24, SP_F25, SP_F26, SP_F27, SP_F28, SP_F29, SP_F30, SP_F31, }; // FPRegs Bit set. static const uint8_t FPRegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, }; // IntRegs Register Class... static const MCPhysReg IntRegs[] = { SP_I0, SP_I1, SP_I2, SP_I3, SP_I4, SP_I5, SP_I6, SP_I7, SP_G0, SP_G1, SP_G2, SP_G3, SP_G4, SP_G5, SP_G6, SP_G7, SP_L0, SP_L1, SP_L2, SP_L3, SP_L4, SP_L5, SP_L6, SP_L7, SP_O0, SP_O1, SP_O2, SP_O3, SP_O4, SP_O5, SP_O6, SP_O7, }; // IntRegs Bit set. static const uint8_t IntRegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, }; // DFPRegs Register Class... static const MCPhysReg DFPRegs[] = { SP_D0, SP_D1, SP_D2, SP_D3, SP_D4, SP_D5, SP_D6, SP_D7, SP_D8, SP_D9, SP_D10, SP_D11, SP_D12, SP_D13, SP_D14, SP_D15, SP_D16, SP_D17, SP_D18, SP_D19, SP_D20, SP_D21, SP_D22, SP_D23, SP_D24, SP_D25, SP_D26, SP_D27, SP_D28, SP_D29, SP_D30, SP_D31, }; // DFPRegs Bit set. static const uint8_t DFPRegsBits[] = { 0xf8, 0xff, 0xff, 0xff, 0x07, }; // I64Regs Register Class... static const MCPhysReg I64Regs[] = { SP_I0, SP_I1, SP_I2, SP_I3, SP_I4, SP_I5, SP_I6, SP_I7, SP_G0, SP_G1, SP_G2, SP_G3, SP_G4, SP_G5, SP_G6, SP_G7, SP_L0, SP_L1, SP_L2, SP_L3, SP_L4, SP_L5, SP_L6, SP_L7, SP_O0, SP_O1, SP_O2, SP_O3, SP_O4, SP_O5, SP_O6, SP_O7, }; // I64Regs Bit set. static const uint8_t I64RegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, }; // DFPRegs_with_sub_even Register Class... static const MCPhysReg DFPRegs_with_sub_even[] = { SP_D0, SP_D1, SP_D2, SP_D3, SP_D4, SP_D5, SP_D6, SP_D7, SP_D8, SP_D9, SP_D10, SP_D11, SP_D12, SP_D13, SP_D14, SP_D15, }; // DFPRegs_with_sub_even Bit set. static const uint8_t DFPRegs_with_sub_evenBits[] = { 0xf8, 0xff, 0x07, }; // QFPRegs Register Class... static const MCPhysReg QFPRegs[] = { SP_Q0, SP_Q1, SP_Q2, SP_Q3, SP_Q4, SP_Q5, SP_Q6, SP_Q7, SP_Q8, SP_Q9, SP_Q10, SP_Q11, SP_Q12, SP_Q13, SP_Q14, SP_Q15, }; // QFPRegs Bit set. static const uint8_t QFPRegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, }; // QFPRegs_with_sub_even Register Class... static const MCPhysReg QFPRegs_with_sub_even[] = { SP_Q0, SP_Q1, SP_Q2, SP_Q3, SP_Q4, SP_Q5, SP_Q6, SP_Q7, }; // QFPRegs_with_sub_even Bit set. static const uint8_t QFPRegs_with_sub_evenBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, }; static MCRegisterClass SparcMCRegisterClasses[] = { { FCCRegs, FCCRegsBits, 52, 4, sizeof(FCCRegsBits), SP_FCCRegsRegClassID, 0, 0, 1, 1 }, { FPRegs, FPRegsBits, 61, 32, sizeof(FPRegsBits), SP_FPRegsRegClassID, 4, 4, 1, 1 }, { IntRegs, IntRegsBits, 76, 32, sizeof(IntRegsBits), SP_IntRegsRegClassID, 4, 4, 1, 1 }, { DFPRegs, DFPRegsBits, 60, 32, sizeof(DFPRegsBits), SP_DFPRegsRegClassID, 8, 8, 1, 1 }, { I64Regs, I64RegsBits, 44, 32, sizeof(I64RegsBits), SP_I64RegsRegClassID, 8, 8, 1, 1 }, { DFPRegs_with_sub_even, DFPRegs_with_sub_evenBits, 0, 16, sizeof(DFPRegs_with_sub_evenBits), SP_DFPRegs_with_sub_evenRegClassID, 8, 8, 1, 1 }, { QFPRegs, QFPRegsBits, 68, 16, sizeof(QFPRegsBits), SP_QFPRegsRegClassID, 16, 16, 1, 1 }, { QFPRegs_with_sub_even, QFPRegs_with_sub_evenBits, 22, 8, sizeof(QFPRegs_with_sub_evenBits), SP_QFPRegs_with_sub_evenRegClassID, 16, 16, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/Sparc/SparcGenSubtargetInfo.inc010066400017500001750000000020201363402546700231430ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Subtarget Enumeration Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM enum { Sparc_FeatureHardQuad = 1ULL << 0, Sparc_FeatureV8Deprecated = 1ULL << 1, Sparc_FeatureV9 = 1ULL << 2, Sparc_FeatureVIS = 1ULL << 3, Sparc_FeatureVIS2 = 1ULL << 4, Sparc_FeatureVIS3 = 1ULL << 5, Sparc_UsePopc = 1ULL << 6 }; #endif // GET_SUBTARGETINFO_ENUM capstone-sys-0.11.0/capstone/arch/Sparc/SparcInstPrinter.c010066400017500001750000000311601363402546700216760ustar0000000000000000//===-- SparcInstPrinter.cpp - Convert Sparc MCInst to assembly syntax --------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an Sparc MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SPARC #ifdef _MSC_VER #define _CRT_SECURE_NO_WARNINGS #endif #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable:28719) // disable MSVC's warning on strncpy() #endif #include #include #include #include #include "SparcInstPrinter.h" #include "../../MCInst.h" #include "../../utils.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../MathExtras.h" #include "SparcMapping.h" #include "Sparc.h" static const char *getRegisterName(unsigned RegNo); static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI); static void printMemOperand(MCInst *MI, int opNum, SStream *O, const char *Modifier); static void printOperand(MCInst *MI, int opNum, SStream *O); static void Sparc_add_hint(MCInst *MI, unsigned int hint) { if (MI->csh->detail) { MI->flat_insn->detail->sparc.hint = hint; } } static void Sparc_add_reg(MCInst *MI, unsigned int reg) { if (MI->csh->detail) { MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_REG; MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].reg = reg; MI->flat_insn->detail->sparc.op_count++; } } static void set_mem_access(MCInst *MI, bool status) { if (MI->csh->detail != CS_OPT_ON) return; MI->csh->doing_mem = status; if (status) { MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_MEM; MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.base = SPARC_REG_INVALID; MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.disp = 0; } else { // done, create the next operand slot MI->flat_insn->detail->sparc.op_count++; } } void Sparc_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) { if (((cs_struct *)ud)->detail != CS_OPT_ON) return; // fix up some instructions if (insn->id == SPARC_INS_CASX) { // first op is actually a memop, not regop insn->detail->sparc.operands[0].type = SPARC_OP_MEM; insn->detail->sparc.operands[0].mem.base = (uint8_t)insn->detail->sparc.operands[0].reg; insn->detail->sparc.operands[0].mem.disp = 0; } } static void printRegName(SStream *OS, unsigned RegNo) { SStream_concat0(OS, "%"); SStream_concat0(OS, getRegisterName(RegNo)); } #define GET_INSTRINFO_ENUM #include "SparcGenInstrInfo.inc" #define GET_REGINFO_ENUM #include "SparcGenRegisterInfo.inc" static bool printSparcAliasInstr(MCInst *MI, SStream *O) { switch (MCInst_getOpcode(MI)) { default: return false; case SP_JMPLrr: case SP_JMPLri: if (MCInst_getNumOperands(MI) != 3) return false; if (!MCOperand_isReg(MCInst_getOperand(MI, 0))) return false; switch (MCOperand_getReg(MCInst_getOperand(MI, 0))) { default: return false; case SP_G0: // jmp $addr | ret | retl if (MCOperand_isImm(MCInst_getOperand(MI, 2)) && MCOperand_getImm(MCInst_getOperand(MI, 2)) == 8) { switch(MCOperand_getReg(MCInst_getOperand(MI, 1))) { default: break; case SP_I7: SStream_concat0(O, "ret"); MCInst_setOpcodePub(MI, SPARC_INS_RET); return true; case SP_O7: SStream_concat0(O, "retl"); MCInst_setOpcodePub(MI, SPARC_INS_RETL); return true; } } SStream_concat0(O, "jmp\t"); MCInst_setOpcodePub(MI, SPARC_INS_JMP); printMemOperand(MI, 1, O, NULL); return true; case SP_O7: // call $addr SStream_concat0(O, "call "); MCInst_setOpcodePub(MI, SPARC_INS_CALL); printMemOperand(MI, 1, O, NULL); return true; } case SP_V9FCMPS: case SP_V9FCMPD: case SP_V9FCMPQ: case SP_V9FCMPES: case SP_V9FCMPED: case SP_V9FCMPEQ: if (MI->csh->mode & CS_MODE_V9 || (MCInst_getNumOperands(MI) != 3) || (!MCOperand_isReg(MCInst_getOperand(MI, 0))) || (MCOperand_getReg(MCInst_getOperand(MI, 0)) != SP_FCC0)) return false; // if V8, skip printing %fcc0. switch(MCInst_getOpcode(MI)) { default: case SP_V9FCMPS: SStream_concat0(O, "fcmps\t"); MCInst_setOpcodePub(MI, SPARC_INS_FCMPS); break; case SP_V9FCMPD: SStream_concat0(O, "fcmpd\t"); MCInst_setOpcodePub(MI, SPARC_INS_FCMPD); break; case SP_V9FCMPQ: SStream_concat0(O, "fcmpq\t"); MCInst_setOpcodePub(MI, SPARC_INS_FCMPQ); break; case SP_V9FCMPES: SStream_concat0(O, "fcmpes\t"); MCInst_setOpcodePub(MI, SPARC_INS_FCMPES); break; case SP_V9FCMPED: SStream_concat0(O, "fcmped\t"); MCInst_setOpcodePub(MI, SPARC_INS_FCMPED); break; case SP_V9FCMPEQ: SStream_concat0(O, "fcmpeq\t"); MCInst_setOpcodePub(MI, SPARC_INS_FCMPEQ); break; } printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return true; } } static void printOperand(MCInst *MI, int opNum, SStream *O) { int64_t Imm; unsigned reg; MCOperand *MO = MCInst_getOperand(MI, opNum); if (MCOperand_isReg(MO)) { reg = MCOperand_getReg(MO); printRegName(O, reg); reg = Sparc_map_register(reg); if (MI->csh->detail) { if (MI->csh->doing_mem) { if (MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.base) MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.index = (uint8_t)reg; else MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.base = (uint8_t)reg; } else { MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_REG; MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].reg = reg; MI->flat_insn->detail->sparc.op_count++; } } return; } if (MCOperand_isImm(MO)) { Imm = (int)MCOperand_getImm(MO); // Conditional branches displacements needs to be signextended to be // able to jump backwards. // // Displacements are measured as the number of instructions forward or // backward, so they need to be multiplied by 4 switch (MI->Opcode) { case SP_CALL: // Imm = SignExtend32(Imm, 30); Imm += MI->address; break; // Branch on integer condition with prediction (BPcc) // Branch on floating point condition with prediction (FBPfcc) case SP_BPICC: case SP_BPICCA: case SP_BPICCANT: case SP_BPICCNT: case SP_BPXCC: case SP_BPXCCA: case SP_BPXCCANT: case SP_BPXCCNT: case SP_BPFCC: case SP_BPFCCA: case SP_BPFCCANT: case SP_BPFCCNT: Imm = SignExtend32(Imm, 19); Imm = MI->address + Imm * 4; break; // Branch on integer condition (Bicc) // Branch on floating point condition (FBfcc) case SP_BA: case SP_BCOND: case SP_BCONDA: case SP_FBCOND: case SP_FBCONDA: Imm = SignExtend32(Imm, 22); Imm = MI->address + Imm * 4; break; // Branch on integer register with prediction (BPr) case SP_BPGEZapn: case SP_BPGEZapt: case SP_BPGEZnapn: case SP_BPGEZnapt: case SP_BPGZapn: case SP_BPGZapt: case SP_BPGZnapn: case SP_BPGZnapt: case SP_BPLEZapn: case SP_BPLEZapt: case SP_BPLEZnapn: case SP_BPLEZnapt: case SP_BPLZapn: case SP_BPLZapt: case SP_BPLZnapn: case SP_BPLZnapt: case SP_BPNZapn: case SP_BPNZapt: case SP_BPNZnapn: case SP_BPNZnapt: case SP_BPZapn: case SP_BPZapt: case SP_BPZnapn: case SP_BPZnapt: Imm = SignExtend32(Imm, 16); Imm = MI->address + Imm * 4; break; } printInt64(O, Imm); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.disp = Imm; } else { MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_IMM; MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].imm = Imm; MI->flat_insn->detail->sparc.op_count++; } } } return; } static void printMemOperand(MCInst *MI, int opNum, SStream *O, const char *Modifier) { MCOperand *MO; set_mem_access(MI, true); printOperand(MI, opNum, O); // If this is an ADD operand, emit it like normal operands. if (Modifier && !strcmp(Modifier, "arith")) { SStream_concat0(O, ", "); printOperand(MI, opNum + 1, O); set_mem_access(MI, false); return; } MO = MCInst_getOperand(MI, opNum + 1); if (MCOperand_isReg(MO) && (MCOperand_getReg(MO) == SP_G0)) { set_mem_access(MI, false); return; // don't print "+%g0" } if (MCOperand_isImm(MO) && (MCOperand_getImm(MO) == 0)) { set_mem_access(MI, false); return; // don't print "+0" } SStream_concat0(O, "+"); // qq printOperand(MI, opNum + 1, O); set_mem_access(MI, false); } static void printCCOperand(MCInst *MI, int opNum, SStream *O) { int CC = (int)MCOperand_getImm(MCInst_getOperand(MI, opNum)) + 256; switch (MCInst_getOpcode(MI)) { default: break; case SP_FBCOND: case SP_FBCONDA: case SP_BPFCC: case SP_BPFCCA: case SP_BPFCCNT: case SP_BPFCCANT: case SP_MOVFCCrr: case SP_V9MOVFCCrr: case SP_MOVFCCri: case SP_V9MOVFCCri: case SP_FMOVS_FCC: case SP_V9FMOVS_FCC: case SP_FMOVD_FCC: case SP_V9FMOVD_FCC: case SP_FMOVQ_FCC: case SP_V9FMOVQ_FCC: // Make sure CC is a fp conditional flag. CC = (CC < 16+256) ? (CC + 16) : CC; break; } SStream_concat0(O, SPARCCondCodeToString((sparc_cc)CC)); if (MI->csh->detail) MI->flat_insn->detail->sparc.cc = (sparc_cc)CC; } static bool printGetPCX(MCInst *MI, unsigned opNum, SStream *O) { return true; } #define PRINT_ALIAS_INSTR #include "SparcGenAsmWriter.inc" void Sparc_printInst(MCInst *MI, SStream *O, void *Info) { char *mnem, *p; char instr[64]; // Sparc has no instruction this long mnem = printAliasInstr(MI, O, Info); if (mnem) { // fixup instruction id due to the change in alias instruction strncpy(instr, mnem, sizeof(instr)); instr[sizeof(instr) - 1] = '\0'; // does this contains hint with a coma? p = strchr(instr, ','); if (p) *p = '\0'; // now instr only has instruction mnemonic MCInst_setOpcodePub(MI, Sparc_map_insn(instr)); switch(MCInst_getOpcode(MI)) { case SP_BCOND: case SP_BCONDA: case SP_BPICCANT: case SP_BPICCNT: case SP_BPXCCANT: case SP_BPXCCNT: case SP_TXCCri: case SP_TXCCrr: if (MI->csh->detail) { // skip 'b', 't' MI->flat_insn->detail->sparc.cc = Sparc_map_ICC(instr + 1); MI->flat_insn->detail->sparc.hint = Sparc_map_hint(mnem); } break; case SP_BPFCCANT: case SP_BPFCCNT: if (MI->csh->detail) { // skip 'fb' MI->flat_insn->detail->sparc.cc = Sparc_map_FCC(instr + 2); MI->flat_insn->detail->sparc.hint = Sparc_map_hint(mnem); } break; case SP_FMOVD_ICC: case SP_FMOVD_XCC: case SP_FMOVQ_ICC: case SP_FMOVQ_XCC: case SP_FMOVS_ICC: case SP_FMOVS_XCC: if (MI->csh->detail) { // skip 'fmovd', 'fmovq', 'fmovs' MI->flat_insn->detail->sparc.cc = Sparc_map_ICC(instr + 5); MI->flat_insn->detail->sparc.hint = Sparc_map_hint(mnem); } break; case SP_MOVICCri: case SP_MOVICCrr: case SP_MOVXCCri: case SP_MOVXCCrr: if (MI->csh->detail) { // skip 'mov' MI->flat_insn->detail->sparc.cc = Sparc_map_ICC(instr + 3); MI->flat_insn->detail->sparc.hint = Sparc_map_hint(mnem); } break; case SP_V9FMOVD_FCC: case SP_V9FMOVQ_FCC: case SP_V9FMOVS_FCC: if (MI->csh->detail) { // skip 'fmovd', 'fmovq', 'fmovs' MI->flat_insn->detail->sparc.cc = Sparc_map_FCC(instr + 5); MI->flat_insn->detail->sparc.hint = Sparc_map_hint(mnem); } break; case SP_V9MOVFCCri: case SP_V9MOVFCCrr: if (MI->csh->detail) { // skip 'mov' MI->flat_insn->detail->sparc.cc = Sparc_map_FCC(instr + 3); MI->flat_insn->detail->sparc.hint = Sparc_map_hint(mnem); } break; default: break; } cs_mem_free(mnem); } else { if (!printSparcAliasInstr(MI, O)) printInstruction(MI, O, NULL); } } void Sparc_addReg(MCInst *MI, int reg) { if (MI->csh->detail) { MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_REG; MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].reg = reg; MI->flat_insn->detail->sparc.op_count++; } } #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcInstPrinter.h010066400017500001750000000006511363402546700217040ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SPARCINSTPRINTER_H #define CS_SPARCINSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void Sparc_printInst(MCInst *MI, SStream *O, void *Info); void Sparc_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); void Sparc_addReg(MCInst *MI, int reg); #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcMapping.c010066400017500001750000000456771363402546700210320ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SPARC #include // debug #include #include "../../utils.h" #include "SparcMapping.h" #define GET_INSTRINFO_ENUM #include "SparcGenInstrInfo.inc" #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { SPARC_REG_INVALID, NULL }, { SPARC_REG_F0, "f0"}, { SPARC_REG_F1, "f1"}, { SPARC_REG_F2, "f2"}, { SPARC_REG_F3, "f3"}, { SPARC_REG_F4, "f4"}, { SPARC_REG_F5, "f5"}, { SPARC_REG_F6, "f6"}, { SPARC_REG_F7, "f7"}, { SPARC_REG_F8, "f8"}, { SPARC_REG_F9, "f9"}, { SPARC_REG_F10, "f10"}, { SPARC_REG_F11, "f11"}, { SPARC_REG_F12, "f12"}, { SPARC_REG_F13, "f13"}, { SPARC_REG_F14, "f14"}, { SPARC_REG_F15, "f15"}, { SPARC_REG_F16, "f16"}, { SPARC_REG_F17, "f17"}, { SPARC_REG_F18, "f18"}, { SPARC_REG_F19, "f19"}, { SPARC_REG_F20, "f20"}, { SPARC_REG_F21, "f21"}, { SPARC_REG_F22, "f22"}, { SPARC_REG_F23, "f23"}, { SPARC_REG_F24, "f24"}, { SPARC_REG_F25, "f25"}, { SPARC_REG_F26, "f26"}, { SPARC_REG_F27, "f27"}, { SPARC_REG_F28, "f28"}, { SPARC_REG_F29, "f29"}, { SPARC_REG_F30, "f30"}, { SPARC_REG_F31, "f31"}, { SPARC_REG_F32, "f32"}, { SPARC_REG_F34, "f34"}, { SPARC_REG_F36, "f36"}, { SPARC_REG_F38, "f38"}, { SPARC_REG_F40, "f40"}, { SPARC_REG_F42, "f42"}, { SPARC_REG_F44, "f44"}, { SPARC_REG_F46, "f46"}, { SPARC_REG_F48, "f48"}, { SPARC_REG_F50, "f50"}, { SPARC_REG_F52, "f52"}, { SPARC_REG_F54, "f54"}, { SPARC_REG_F56, "f56"}, { SPARC_REG_F58, "f58"}, { SPARC_REG_F60, "f60"}, { SPARC_REG_F62, "f62"}, { SPARC_REG_FCC0, "fcc0"}, { SPARC_REG_FCC1, "fcc1"}, { SPARC_REG_FCC2, "fcc2"}, { SPARC_REG_FCC3, "fcc3"}, { SPARC_REG_FP, "fp"}, { SPARC_REG_G0, "g0"}, { SPARC_REG_G1, "g1"}, { SPARC_REG_G2, "g2"}, { SPARC_REG_G3, "g3"}, { SPARC_REG_G4, "g4"}, { SPARC_REG_G5, "g5"}, { SPARC_REG_G6, "g6"}, { SPARC_REG_G7, "g7"}, { SPARC_REG_I0, "i0"}, { SPARC_REG_I1, "i1"}, { SPARC_REG_I2, "i2"}, { SPARC_REG_I3, "i3"}, { SPARC_REG_I4, "i4"}, { SPARC_REG_I5, "i5"}, { SPARC_REG_I7, "i7"}, { SPARC_REG_ICC, "icc"}, { SPARC_REG_L0, "l0"}, { SPARC_REG_L1, "l1"}, { SPARC_REG_L2, "l2"}, { SPARC_REG_L3, "l3"}, { SPARC_REG_L4, "l4"}, { SPARC_REG_L5, "l5"}, { SPARC_REG_L6, "l6"}, { SPARC_REG_L7, "l7"}, { SPARC_REG_O0, "o0"}, { SPARC_REG_O1, "o1"}, { SPARC_REG_O2, "o2"}, { SPARC_REG_O3, "o3"}, { SPARC_REG_O4, "o4"}, { SPARC_REG_O5, "o5"}, { SPARC_REG_O7, "o7"}, { SPARC_REG_SP, "sp"}, { SPARC_REG_Y, "y"}, // special registers { SPARC_REG_XCC, "xcc"}, }; #endif const char *Sparc_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } static const insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "SparcMappingInsn.inc" }; static struct hint_map { unsigned int id; uint8_t hints; } const insn_hints[] = { { SP_BPGEZapn, SPARC_HINT_A | SPARC_HINT_PN }, { SP_BPGEZapt, SPARC_HINT_A | SPARC_HINT_PT }, { SP_BPGEZnapn, SPARC_HINT_PN }, { SP_BPGZapn, SPARC_HINT_A | SPARC_HINT_PN }, { SP_BPGZapt, SPARC_HINT_A | SPARC_HINT_PT }, { SP_BPGZnapn, SPARC_HINT_PN }, { SP_BPLEZapn, SPARC_HINT_A | SPARC_HINT_PN }, { SP_BPLEZapt, SPARC_HINT_A | SPARC_HINT_PT }, { SP_BPLEZnapn, SPARC_HINT_PN }, { SP_BPLZapn, SPARC_HINT_A | SPARC_HINT_PN }, { SP_BPLZapt, SPARC_HINT_A | SPARC_HINT_PT }, { SP_BPLZnapn, SPARC_HINT_PN }, { SP_BPNZapn, SPARC_HINT_A | SPARC_HINT_PN }, { SP_BPNZapt, SPARC_HINT_A | SPARC_HINT_PT }, { SP_BPNZnapn, SPARC_HINT_PN }, { SP_BPZapn, SPARC_HINT_A | SPARC_HINT_PN }, { SP_BPZapt, SPARC_HINT_A | SPARC_HINT_PT }, { SP_BPZnapn, SPARC_HINT_PN }, }; // given internal insn id, return public instruction info void Sparc_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { unsigned short i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = SPARC_GRP_JUMP; insn->detail->groups_count++; } #endif // hint code for (i = 0; i < ARR_SIZE(insn_hints); i++) { if (id == insn_hints[i].id) { insn->detail->sparc.hint = insn_hints[i].hints; break; } } } } } static const name_map insn_name_maps[] = { { SPARC_INS_INVALID, NULL }, { SPARC_INS_ADDCC, "addcc" }, { SPARC_INS_ADDX, "addx" }, { SPARC_INS_ADDXCC, "addxcc" }, { SPARC_INS_ADDXC, "addxc" }, { SPARC_INS_ADDXCCC, "addxccc" }, { SPARC_INS_ADD, "add" }, { SPARC_INS_ALIGNADDR, "alignaddr" }, { SPARC_INS_ALIGNADDRL, "alignaddrl" }, { SPARC_INS_ANDCC, "andcc" }, { SPARC_INS_ANDNCC, "andncc" }, { SPARC_INS_ANDN, "andn" }, { SPARC_INS_AND, "and" }, { SPARC_INS_ARRAY16, "array16" }, { SPARC_INS_ARRAY32, "array32" }, { SPARC_INS_ARRAY8, "array8" }, { SPARC_INS_B, "b" }, { SPARC_INS_JMP, "jmp" }, { SPARC_INS_BMASK, "bmask" }, { SPARC_INS_FB, "fb" }, { SPARC_INS_BRGEZ, "brgez" }, { SPARC_INS_BRGZ, "brgz" }, { SPARC_INS_BRLEZ, "brlez" }, { SPARC_INS_BRLZ, "brlz" }, { SPARC_INS_BRNZ, "brnz" }, { SPARC_INS_BRZ, "brz" }, { SPARC_INS_BSHUFFLE, "bshuffle" }, { SPARC_INS_CALL, "call" }, { SPARC_INS_CASX, "casx" }, { SPARC_INS_CAS, "cas" }, { SPARC_INS_CMASK16, "cmask16" }, { SPARC_INS_CMASK32, "cmask32" }, { SPARC_INS_CMASK8, "cmask8" }, { SPARC_INS_CMP, "cmp" }, { SPARC_INS_EDGE16, "edge16" }, { SPARC_INS_EDGE16L, "edge16l" }, { SPARC_INS_EDGE16LN, "edge16ln" }, { SPARC_INS_EDGE16N, "edge16n" }, { SPARC_INS_EDGE32, "edge32" }, { SPARC_INS_EDGE32L, "edge32l" }, { SPARC_INS_EDGE32LN, "edge32ln" }, { SPARC_INS_EDGE32N, "edge32n" }, { SPARC_INS_EDGE8, "edge8" }, { SPARC_INS_EDGE8L, "edge8l" }, { SPARC_INS_EDGE8LN, "edge8ln" }, { SPARC_INS_EDGE8N, "edge8n" }, { SPARC_INS_FABSD, "fabsd" }, { SPARC_INS_FABSQ, "fabsq" }, { SPARC_INS_FABSS, "fabss" }, { SPARC_INS_FADDD, "faddd" }, { SPARC_INS_FADDQ, "faddq" }, { SPARC_INS_FADDS, "fadds" }, { SPARC_INS_FALIGNDATA, "faligndata" }, { SPARC_INS_FAND, "fand" }, { SPARC_INS_FANDNOT1, "fandnot1" }, { SPARC_INS_FANDNOT1S, "fandnot1s" }, { SPARC_INS_FANDNOT2, "fandnot2" }, { SPARC_INS_FANDNOT2S, "fandnot2s" }, { SPARC_INS_FANDS, "fands" }, { SPARC_INS_FCHKSM16, "fchksm16" }, { SPARC_INS_FCMPD, "fcmpd" }, { SPARC_INS_FCMPEQ16, "fcmpeq16" }, { SPARC_INS_FCMPEQ32, "fcmpeq32" }, { SPARC_INS_FCMPGT16, "fcmpgt16" }, { SPARC_INS_FCMPGT32, "fcmpgt32" }, { SPARC_INS_FCMPLE16, "fcmple16" }, { SPARC_INS_FCMPLE32, "fcmple32" }, { SPARC_INS_FCMPNE16, "fcmpne16" }, { SPARC_INS_FCMPNE32, "fcmpne32" }, { SPARC_INS_FCMPQ, "fcmpq" }, { SPARC_INS_FCMPS, "fcmps" }, { SPARC_INS_FDIVD, "fdivd" }, { SPARC_INS_FDIVQ, "fdivq" }, { SPARC_INS_FDIVS, "fdivs" }, { SPARC_INS_FDMULQ, "fdmulq" }, { SPARC_INS_FDTOI, "fdtoi" }, { SPARC_INS_FDTOQ, "fdtoq" }, { SPARC_INS_FDTOS, "fdtos" }, { SPARC_INS_FDTOX, "fdtox" }, { SPARC_INS_FEXPAND, "fexpand" }, { SPARC_INS_FHADDD, "fhaddd" }, { SPARC_INS_FHADDS, "fhadds" }, { SPARC_INS_FHSUBD, "fhsubd" }, { SPARC_INS_FHSUBS, "fhsubs" }, { SPARC_INS_FITOD, "fitod" }, { SPARC_INS_FITOQ, "fitoq" }, { SPARC_INS_FITOS, "fitos" }, { SPARC_INS_FLCMPD, "flcmpd" }, { SPARC_INS_FLCMPS, "flcmps" }, { SPARC_INS_FLUSHW, "flushw" }, { SPARC_INS_FMEAN16, "fmean16" }, { SPARC_INS_FMOVD, "fmovd" }, { SPARC_INS_FMOVQ, "fmovq" }, { SPARC_INS_FMOVRDGEZ, "fmovrdgez" }, { SPARC_INS_FMOVRQGEZ, "fmovrqgez" }, { SPARC_INS_FMOVRSGEZ, "fmovrsgez" }, { SPARC_INS_FMOVRDGZ, "fmovrdgz" }, { SPARC_INS_FMOVRQGZ, "fmovrqgz" }, { SPARC_INS_FMOVRSGZ, "fmovrsgz" }, { SPARC_INS_FMOVRDLEZ, "fmovrdlez" }, { SPARC_INS_FMOVRQLEZ, "fmovrqlez" }, { SPARC_INS_FMOVRSLEZ, "fmovrslez" }, { SPARC_INS_FMOVRDLZ, "fmovrdlz" }, { SPARC_INS_FMOVRQLZ, "fmovrqlz" }, { SPARC_INS_FMOVRSLZ, "fmovrslz" }, { SPARC_INS_FMOVRDNZ, "fmovrdnz" }, { SPARC_INS_FMOVRQNZ, "fmovrqnz" }, { SPARC_INS_FMOVRSNZ, "fmovrsnz" }, { SPARC_INS_FMOVRDZ, "fmovrdz" }, { SPARC_INS_FMOVRQZ, "fmovrqz" }, { SPARC_INS_FMOVRSZ, "fmovrsz" }, { SPARC_INS_FMOVS, "fmovs" }, { SPARC_INS_FMUL8SUX16, "fmul8sux16" }, { SPARC_INS_FMUL8ULX16, "fmul8ulx16" }, { SPARC_INS_FMUL8X16, "fmul8x16" }, { SPARC_INS_FMUL8X16AL, "fmul8x16al" }, { SPARC_INS_FMUL8X16AU, "fmul8x16au" }, { SPARC_INS_FMULD, "fmuld" }, { SPARC_INS_FMULD8SUX16, "fmuld8sux16" }, { SPARC_INS_FMULD8ULX16, "fmuld8ulx16" }, { SPARC_INS_FMULQ, "fmulq" }, { SPARC_INS_FMULS, "fmuls" }, { SPARC_INS_FNADDD, "fnaddd" }, { SPARC_INS_FNADDS, "fnadds" }, { SPARC_INS_FNAND, "fnand" }, { SPARC_INS_FNANDS, "fnands" }, { SPARC_INS_FNEGD, "fnegd" }, { SPARC_INS_FNEGQ, "fnegq" }, { SPARC_INS_FNEGS, "fnegs" }, { SPARC_INS_FNHADDD, "fnhaddd" }, { SPARC_INS_FNHADDS, "fnhadds" }, { SPARC_INS_FNOR, "fnor" }, { SPARC_INS_FNORS, "fnors" }, { SPARC_INS_FNOT1, "fnot1" }, { SPARC_INS_FNOT1S, "fnot1s" }, { SPARC_INS_FNOT2, "fnot2" }, { SPARC_INS_FNOT2S, "fnot2s" }, { SPARC_INS_FONE, "fone" }, { SPARC_INS_FONES, "fones" }, { SPARC_INS_FOR, "for" }, { SPARC_INS_FORNOT1, "fornot1" }, { SPARC_INS_FORNOT1S, "fornot1s" }, { SPARC_INS_FORNOT2, "fornot2" }, { SPARC_INS_FORNOT2S, "fornot2s" }, { SPARC_INS_FORS, "fors" }, { SPARC_INS_FPACK16, "fpack16" }, { SPARC_INS_FPACK32, "fpack32" }, { SPARC_INS_FPACKFIX, "fpackfix" }, { SPARC_INS_FPADD16, "fpadd16" }, { SPARC_INS_FPADD16S, "fpadd16s" }, { SPARC_INS_FPADD32, "fpadd32" }, { SPARC_INS_FPADD32S, "fpadd32s" }, { SPARC_INS_FPADD64, "fpadd64" }, { SPARC_INS_FPMERGE, "fpmerge" }, { SPARC_INS_FPSUB16, "fpsub16" }, { SPARC_INS_FPSUB16S, "fpsub16s" }, { SPARC_INS_FPSUB32, "fpsub32" }, { SPARC_INS_FPSUB32S, "fpsub32s" }, { SPARC_INS_FQTOD, "fqtod" }, { SPARC_INS_FQTOI, "fqtoi" }, { SPARC_INS_FQTOS, "fqtos" }, { SPARC_INS_FQTOX, "fqtox" }, { SPARC_INS_FSLAS16, "fslas16" }, { SPARC_INS_FSLAS32, "fslas32" }, { SPARC_INS_FSLL16, "fsll16" }, { SPARC_INS_FSLL32, "fsll32" }, { SPARC_INS_FSMULD, "fsmuld" }, { SPARC_INS_FSQRTD, "fsqrtd" }, { SPARC_INS_FSQRTQ, "fsqrtq" }, { SPARC_INS_FSQRTS, "fsqrts" }, { SPARC_INS_FSRA16, "fsra16" }, { SPARC_INS_FSRA32, "fsra32" }, { SPARC_INS_FSRC1, "fsrc1" }, { SPARC_INS_FSRC1S, "fsrc1s" }, { SPARC_INS_FSRC2, "fsrc2" }, { SPARC_INS_FSRC2S, "fsrc2s" }, { SPARC_INS_FSRL16, "fsrl16" }, { SPARC_INS_FSRL32, "fsrl32" }, { SPARC_INS_FSTOD, "fstod" }, { SPARC_INS_FSTOI, "fstoi" }, { SPARC_INS_FSTOQ, "fstoq" }, { SPARC_INS_FSTOX, "fstox" }, { SPARC_INS_FSUBD, "fsubd" }, { SPARC_INS_FSUBQ, "fsubq" }, { SPARC_INS_FSUBS, "fsubs" }, { SPARC_INS_FXNOR, "fxnor" }, { SPARC_INS_FXNORS, "fxnors" }, { SPARC_INS_FXOR, "fxor" }, { SPARC_INS_FXORS, "fxors" }, { SPARC_INS_FXTOD, "fxtod" }, { SPARC_INS_FXTOQ, "fxtoq" }, { SPARC_INS_FXTOS, "fxtos" }, { SPARC_INS_FZERO, "fzero" }, { SPARC_INS_FZEROS, "fzeros" }, { SPARC_INS_JMPL, "jmpl" }, { SPARC_INS_LDD, "ldd" }, { SPARC_INS_LD, "ld" }, { SPARC_INS_LDQ, "ldq" }, { SPARC_INS_LDSB, "ldsb" }, { SPARC_INS_LDSH, "ldsh" }, { SPARC_INS_LDSW, "ldsw" }, { SPARC_INS_LDUB, "ldub" }, { SPARC_INS_LDUH, "lduh" }, { SPARC_INS_LDX, "ldx" }, { SPARC_INS_LZCNT, "lzcnt" }, { SPARC_INS_MEMBAR, "membar" }, { SPARC_INS_MOVDTOX, "movdtox" }, { SPARC_INS_MOV, "mov" }, { SPARC_INS_MOVRGEZ, "movrgez" }, { SPARC_INS_MOVRGZ, "movrgz" }, { SPARC_INS_MOVRLEZ, "movrlez" }, { SPARC_INS_MOVRLZ, "movrlz" }, { SPARC_INS_MOVRNZ, "movrnz" }, { SPARC_INS_MOVRZ, "movrz" }, { SPARC_INS_MOVSTOSW, "movstosw" }, { SPARC_INS_MOVSTOUW, "movstouw" }, { SPARC_INS_MULX, "mulx" }, { SPARC_INS_NOP, "nop" }, { SPARC_INS_ORCC, "orcc" }, { SPARC_INS_ORNCC, "orncc" }, { SPARC_INS_ORN, "orn" }, { SPARC_INS_OR, "or" }, { SPARC_INS_PDIST, "pdist" }, { SPARC_INS_PDISTN, "pdistn" }, { SPARC_INS_POPC, "popc" }, { SPARC_INS_RD, "rd" }, { SPARC_INS_RESTORE, "restore" }, { SPARC_INS_RETT, "rett" }, { SPARC_INS_SAVE, "save" }, { SPARC_INS_SDIVCC, "sdivcc" }, { SPARC_INS_SDIVX, "sdivx" }, { SPARC_INS_SDIV, "sdiv" }, { SPARC_INS_SETHI, "sethi" }, { SPARC_INS_SHUTDOWN, "shutdown" }, { SPARC_INS_SIAM, "siam" }, { SPARC_INS_SLLX, "sllx" }, { SPARC_INS_SLL, "sll" }, { SPARC_INS_SMULCC, "smulcc" }, { SPARC_INS_SMUL, "smul" }, { SPARC_INS_SRAX, "srax" }, { SPARC_INS_SRA, "sra" }, { SPARC_INS_SRLX, "srlx" }, { SPARC_INS_SRL, "srl" }, { SPARC_INS_STBAR, "stbar" }, { SPARC_INS_STB, "stb" }, { SPARC_INS_STD, "std" }, { SPARC_INS_ST, "st" }, { SPARC_INS_STH, "sth" }, { SPARC_INS_STQ, "stq" }, { SPARC_INS_STX, "stx" }, { SPARC_INS_SUBCC, "subcc" }, { SPARC_INS_SUBX, "subx" }, { SPARC_INS_SUBXCC, "subxcc" }, { SPARC_INS_SUB, "sub" }, { SPARC_INS_SWAP, "swap" }, { SPARC_INS_TADDCCTV, "taddcctv" }, { SPARC_INS_TADDCC, "taddcc" }, { SPARC_INS_T, "t" }, { SPARC_INS_TSUBCCTV, "tsubcctv" }, { SPARC_INS_TSUBCC, "tsubcc" }, { SPARC_INS_UDIVCC, "udivcc" }, { SPARC_INS_UDIVX, "udivx" }, { SPARC_INS_UDIV, "udiv" }, { SPARC_INS_UMULCC, "umulcc" }, { SPARC_INS_UMULXHI, "umulxhi" }, { SPARC_INS_UMUL, "umul" }, { SPARC_INS_UNIMP, "unimp" }, { SPARC_INS_FCMPED, "fcmped" }, { SPARC_INS_FCMPEQ, "fcmpeq" }, { SPARC_INS_FCMPES, "fcmpes" }, { SPARC_INS_WR, "wr" }, { SPARC_INS_XMULX, "xmulx" }, { SPARC_INS_XMULXHI, "xmulxhi" }, { SPARC_INS_XNORCC, "xnorcc" }, { SPARC_INS_XNOR, "xnor" }, { SPARC_INS_XORCC, "xorcc" }, { SPARC_INS_XOR, "xor" }, // alias instructions { SPARC_INS_RET, "ret" }, { SPARC_INS_RETL, "retl" }, }; #ifndef CAPSTONE_DIET // special alias insn static const name_map alias_insn_names[] = { { 0, NULL } }; #endif const char *Sparc_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET unsigned int i; if (id >= SPARC_INS_ENDING) return NULL; // handle special alias first for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { if (alias_insn_names[i].id == id) return alias_insn_names[i].name; } return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { SPARC_GRP_INVALID, NULL }, { SPARC_GRP_JUMP, "jump" }, // architecture-specific groups { SPARC_GRP_HARDQUAD, "hardquad" }, { SPARC_GRP_V9, "v9" }, { SPARC_GRP_VIS, "vis" }, { SPARC_GRP_VIS2, "vis2" }, { SPARC_GRP_VIS3, "vis3" }, { SPARC_GRP_32BIT, "32bit" }, { SPARC_GRP_64BIT, "64bit" }, }; #endif const char *Sparc_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // map internal raw register to 'public' register sparc_reg Sparc_map_register(unsigned int r) { static const unsigned int map[] = { 0, SPARC_REG_ICC, SPARC_REG_Y, SPARC_REG_F0, SPARC_REG_F2, SPARC_REG_F4, SPARC_REG_F6, SPARC_REG_F8, SPARC_REG_F10, SPARC_REG_F12, SPARC_REG_F14, SPARC_REG_F16, SPARC_REG_F18, SPARC_REG_F20, SPARC_REG_F22, SPARC_REG_F24, SPARC_REG_F26, SPARC_REG_F28, SPARC_REG_F30, SPARC_REG_F32, SPARC_REG_F34, SPARC_REG_F36, SPARC_REG_F38, SPARC_REG_F40, SPARC_REG_F42, SPARC_REG_F44, SPARC_REG_F46, SPARC_REG_F48, SPARC_REG_F50, SPARC_REG_F52, SPARC_REG_F54, SPARC_REG_F56, SPARC_REG_F58, SPARC_REG_F60, SPARC_REG_F62, SPARC_REG_F0, SPARC_REG_F1, SPARC_REG_F2, SPARC_REG_F3, SPARC_REG_F4, SPARC_REG_F5, SPARC_REG_F6, SPARC_REG_F7, SPARC_REG_F8, SPARC_REG_F9, SPARC_REG_F10, SPARC_REG_F11, SPARC_REG_F12, SPARC_REG_F13, SPARC_REG_F14, SPARC_REG_F15, SPARC_REG_F16, SPARC_REG_F17, SPARC_REG_F18, SPARC_REG_F19, SPARC_REG_F20, SPARC_REG_F21, SPARC_REG_F22, SPARC_REG_F23, SPARC_REG_F24, SPARC_REG_F25, SPARC_REG_F26, SPARC_REG_F27, SPARC_REG_F28, SPARC_REG_F29, SPARC_REG_F30, SPARC_REG_F31, SPARC_REG_FCC0, SPARC_REG_FCC1, SPARC_REG_FCC2, SPARC_REG_FCC3, SPARC_REG_G0, SPARC_REG_G1, SPARC_REG_G2, SPARC_REG_G3, SPARC_REG_G4, SPARC_REG_G5, SPARC_REG_G6, SPARC_REG_G7, SPARC_REG_I0, SPARC_REG_I1, SPARC_REG_I2, SPARC_REG_I3, SPARC_REG_I4, SPARC_REG_I5, SPARC_REG_FP, SPARC_REG_I7, SPARC_REG_L0, SPARC_REG_L1, SPARC_REG_L2, SPARC_REG_L3, SPARC_REG_L4, SPARC_REG_L5, SPARC_REG_L6, SPARC_REG_L7, SPARC_REG_O0, SPARC_REG_O1, SPARC_REG_O2, SPARC_REG_O3, SPARC_REG_O4, SPARC_REG_O5, SPARC_REG_SP, SPARC_REG_O7, SPARC_REG_F0, SPARC_REG_F4, SPARC_REG_F8, SPARC_REG_F12, SPARC_REG_F16, SPARC_REG_F20, SPARC_REG_F24, SPARC_REG_F28, SPARC_REG_F32, SPARC_REG_F36, SPARC_REG_F40, SPARC_REG_F44, SPARC_REG_F48, SPARC_REG_F52, SPARC_REG_F56, SPARC_REG_F60, }; if (r < ARR_SIZE(map)) return map[r]; // cannot find this register return 0; } // map instruction name to instruction ID (public) sparc_reg Sparc_map_insn(const char *name) { unsigned int i; // NOTE: skip first NULL name in insn_name_maps i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name); return (i != -1)? i : SPARC_REG_INVALID; } // NOTE: put strings in the order of string length since // we are going to compare with mnemonic to find out CC static const name_map alias_icc_maps[] = { { SPARC_CC_ICC_LEU, "leu" }, { SPARC_CC_ICC_POS, "pos" }, { SPARC_CC_ICC_NEG, "neg" }, { SPARC_CC_ICC_NE, "ne" }, { SPARC_CC_ICC_LE, "le" }, { SPARC_CC_ICC_GE, "ge" }, { SPARC_CC_ICC_GU, "gu" }, { SPARC_CC_ICC_CC, "cc" }, { SPARC_CC_ICC_CS, "cs" }, { SPARC_CC_ICC_VC, "vc" }, { SPARC_CC_ICC_VS, "vs" }, { SPARC_CC_ICC_A, "a" }, { SPARC_CC_ICC_N, "n" }, { SPARC_CC_ICC_E, "e" }, { SPARC_CC_ICC_G, "g" }, { SPARC_CC_ICC_L, "l" }, }; static const name_map alias_fcc_maps[] = { { SPARC_CC_FCC_UGE, "uge" }, { SPARC_CC_FCC_ULE, "ule" }, { SPARC_CC_FCC_UG, "ug" }, { SPARC_CC_FCC_UL, "ul" }, { SPARC_CC_FCC_LG, "lg" }, { SPARC_CC_FCC_NE, "ne" }, { SPARC_CC_FCC_UE, "ue" }, { SPARC_CC_FCC_GE, "ge" }, { SPARC_CC_FCC_LE, "le" }, { SPARC_CC_FCC_A, "a" }, { SPARC_CC_FCC_N, "n" }, { SPARC_CC_FCC_U, "u" }, { SPARC_CC_FCC_G, "g" }, { SPARC_CC_FCC_L, "l" }, { SPARC_CC_FCC_E, "e" }, { SPARC_CC_FCC_O, "o" }, }; // map CC string to CC id sparc_cc Sparc_map_ICC(const char *name) { unsigned int i; i = name2id(alias_icc_maps, ARR_SIZE(alias_icc_maps), name); return (i != -1)? i : SPARC_CC_INVALID; } sparc_cc Sparc_map_FCC(const char *name) { unsigned int i; i = name2id(alias_fcc_maps, ARR_SIZE(alias_fcc_maps), name); return (i != -1)? i : SPARC_CC_INVALID; } static const name_map hint_maps[] = { { SPARC_HINT_A, ",a" }, { SPARC_HINT_A | SPARC_HINT_PN, ",a,pn" }, { SPARC_HINT_PN, ",pn" }, }; sparc_hint Sparc_map_hint(const char *name) { size_t i, l1, l2; l1 = strlen(name); for(i = 0; i < ARR_SIZE(hint_maps); i++) { l2 = strlen(hint_maps[i].name); if (l1 > l2) { // compare the last part of @name with this hint string if (!strcmp(hint_maps[i].name, name + (l1 - l2))) return hint_maps[i].id; } } return SPARC_HINT_INVALID; } #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcMapping.h010066400017500001750000000016301363402546700210140ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SPARC_MAP_H #define CS_SPARC_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *Sparc_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void Sparc_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *Sparc_insn_name(csh handle, unsigned int id); const char *Sparc_group_name(csh handle, unsigned int id); // map internal raw register to 'public' register sparc_reg Sparc_map_register(unsigned int r); // map instruction name to instruction ID (public) // this is for alias instructions only sparc_reg Sparc_map_insn(const char *name); // map CC string to CC id sparc_cc Sparc_map_ICC(const char *name); sparc_cc Sparc_map_FCC(const char *name); sparc_hint Sparc_map_hint(const char *name); #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcMappingInsn.inc010066400017500001750000001320131363402546700221660ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { SP_ADDCCri, SPARC_INS_ADDCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ADDCCrr, SPARC_INS_ADDCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ADDCri, SPARC_INS_ADDX, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ADDCrr, SPARC_INS_ADDX, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ADDEri, SPARC_INS_ADDXCC, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ADDErr, SPARC_INS_ADDXCC, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ADDXC, SPARC_INS_ADDXC, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_ADDXCCC, SPARC_INS_ADDXCCC, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_ADDXri, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ADDXrr, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ADDri, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ADDrr, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ALIGNADDR, SPARC_INS_ALIGNADDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_ALIGNADDRL, SPARC_INS_ALIGNADDRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_ANDCCri, SPARC_INS_ANDCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ANDCCrr, SPARC_INS_ANDCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ANDNCCri, SPARC_INS_ANDNCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ANDNCCrr, SPARC_INS_ANDNCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ANDNri, SPARC_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ANDNrr, SPARC_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ANDXNrr, SPARC_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ANDXri, SPARC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ANDXrr, SPARC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ANDri, SPARC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ANDrr, SPARC_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ARRAY16, SPARC_INS_ARRAY16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_ARRAY32, SPARC_INS_ARRAY32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_ARRAY8, SPARC_INS_ARRAY8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_BA, SPARC_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SP_BCOND, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SP_BCONDA, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SP_BINDri, SPARC_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { SP_BINDrr, SPARC_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { SP_BMASK, SPARC_INS_BMASK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_BPFCC, SPARC_INS_FB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPFCCA, SPARC_INS_FB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPFCCANT, SPARC_INS_FB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPFCCNT, SPARC_INS_FB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPGEZapn, SPARC_INS_BRGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGEZapt, SPARC_INS_BRGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGEZnapn, SPARC_INS_BRGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGEZnapt, SPARC_INS_BRGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGZapn, SPARC_INS_BRGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGZapt, SPARC_INS_BRGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGZnapn, SPARC_INS_BRGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPGZnapt, SPARC_INS_BRGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPICC, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPICCA, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPICCANT, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPICCNT, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0 #endif }, { SP_BPLEZapn, SPARC_INS_BRLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLEZapt, SPARC_INS_BRLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLEZnapn, SPARC_INS_BRLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLEZnapt, SPARC_INS_BRLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLZapn, SPARC_INS_BRLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLZapt, SPARC_INS_BRLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLZnapn, SPARC_INS_BRLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPLZnapt, SPARC_INS_BRLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPNZapn, SPARC_INS_BRNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPNZapt, SPARC_INS_BRNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPNZnapn, SPARC_INS_BRNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPNZnapt, SPARC_INS_BRNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPXCC, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPXCCA, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPXCCANT, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPXCCNT, SPARC_INS_B, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPZapn, SPARC_INS_BRZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPZapt, SPARC_INS_BRZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPZnapn, SPARC_INS_BRZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BPZnapt, SPARC_INS_BRZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0 #endif }, { SP_BSHUFFLE, SPARC_INS_BSHUFFLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_CALL, SPARC_INS_CALL, #ifndef CAPSTONE_DIET { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_CALLri, SPARC_INS_CALL, #ifndef CAPSTONE_DIET { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_CALLrr, SPARC_INS_CALL, #ifndef CAPSTONE_DIET { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_CASXrr, SPARC_INS_CASX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_CASrr, SPARC_INS_CAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_CMASK16, SPARC_INS_CMASK16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_CMASK32, SPARC_INS_CMASK32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_CMASK8, SPARC_INS_CMASK8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_CMPri, SPARC_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_CMPrr, SPARC_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_EDGE16, SPARC_INS_EDGE16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_EDGE16L, SPARC_INS_EDGE16L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_EDGE16LN, SPARC_INS_EDGE16LN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_EDGE16N, SPARC_INS_EDGE16N, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_EDGE32, SPARC_INS_EDGE32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_EDGE32L, SPARC_INS_EDGE32L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_EDGE32LN, SPARC_INS_EDGE32LN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_EDGE32N, SPARC_INS_EDGE32N, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_EDGE8, SPARC_INS_EDGE8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_EDGE8L, SPARC_INS_EDGE8L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_EDGE8LN, SPARC_INS_EDGE8LN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_EDGE8N, SPARC_INS_EDGE8N, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_FABSD, SPARC_INS_FABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FABSQ, SPARC_INS_FABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FABSS, SPARC_INS_FABSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FADDD, SPARC_INS_FADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FADDQ, SPARC_INS_FADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FADDS, SPARC_INS_FADDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FALIGNADATA, SPARC_INS_FALIGNDATA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FAND, SPARC_INS_FAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FANDNOT1, SPARC_INS_FANDNOT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FANDNOT1S, SPARC_INS_FANDNOT1S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FANDNOT2, SPARC_INS_FANDNOT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FANDNOT2S, SPARC_INS_FANDNOT2S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FANDS, SPARC_INS_FANDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FBCOND, SPARC_INS_FB, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SP_FBCONDA, SPARC_INS_FB, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SP_FCHKSM16, SPARC_INS_FCHKSM16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FCMPD, SPARC_INS_FCMPD, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_FCC0, 0 }, { 0 }, 0, 0 #endif }, { SP_FCMPEQ16, SPARC_INS_FCMPEQ16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPEQ32, SPARC_INS_FCMPEQ32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPGT16, SPARC_INS_FCMPGT16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPGT32, SPARC_INS_FCMPGT32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPLE16, SPARC_INS_FCMPLE16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPLE32, SPARC_INS_FCMPLE32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPNE16, SPARC_INS_FCMPNE16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPNE32, SPARC_INS_FCMPNE32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FCMPQ, SPARC_INS_FCMPQ, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_FCC0, 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FCMPS, SPARC_INS_FCMPS, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_FCC0, 0 }, { 0 }, 0, 0 #endif }, { SP_FDIVD, SPARC_INS_FDIVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FDIVQ, SPARC_INS_FDIVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FDIVS, SPARC_INS_FDIVS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FDMULQ, SPARC_INS_FDMULQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FDTOI, SPARC_INS_FDTOI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FDTOQ, SPARC_INS_FDTOQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FDTOS, SPARC_INS_FDTOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FDTOX, SPARC_INS_FDTOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FEXPAND, SPARC_INS_FEXPAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FHADDD, SPARC_INS_FHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FHADDS, SPARC_INS_FHADDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FHSUBD, SPARC_INS_FHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FHSUBS, SPARC_INS_FHSUBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FITOD, SPARC_INS_FITOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FITOQ, SPARC_INS_FITOQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FITOS, SPARC_INS_FITOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FLCMPD, SPARC_INS_FLCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FLCMPS, SPARC_INS_FLCMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FLUSHW, SPARC_INS_FLUSHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMEAN16, SPARC_INS_FMEAN16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FMOVD, SPARC_INS_FMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVD_FCC, SPARC_INS_FMOVD, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVD_ICC, SPARC_INS_FMOVD, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVD_XCC, SPARC_INS_FMOVD, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FMOVQ, SPARC_INS_FMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVQ_FCC, SPARC_INS_FMOVQ, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVQ_ICC, SPARC_INS_FMOVQ, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVQ_XCC, SPARC_INS_FMOVQ, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FMOVRGEZD, SPARC_INS_FMOVRDGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRGEZQ, SPARC_INS_FMOVRQGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRGEZS, SPARC_INS_FMOVRSGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRGZD, SPARC_INS_FMOVRDGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRGZQ, SPARC_INS_FMOVRQGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRGZS, SPARC_INS_FMOVRSGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRLEZD, SPARC_INS_FMOVRDLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRLEZQ, SPARC_INS_FMOVRQLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRLEZS, SPARC_INS_FMOVRSLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRLZD, SPARC_INS_FMOVRDLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRLZQ, SPARC_INS_FMOVRQLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRLZS, SPARC_INS_FMOVRSLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRNZD, SPARC_INS_FMOVRDNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRNZQ, SPARC_INS_FMOVRQNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRNZS, SPARC_INS_FMOVRSNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRZD, SPARC_INS_FMOVRDZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRZQ, SPARC_INS_FMOVRQZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVRZS, SPARC_INS_FMOVRSZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVS, SPARC_INS_FMOVS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FMOVS_FCC, SPARC_INS_FMOVS, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVS_ICC, SPARC_INS_FMOVS, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FMOVS_XCC, SPARC_INS_FMOVS, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FMUL8SUX16, SPARC_INS_FMUL8SUX16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMUL8ULX16, SPARC_INS_FMUL8ULX16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMUL8X16, SPARC_INS_FMUL8X16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMUL8X16AL, SPARC_INS_FMUL8X16AL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMUL8X16AU, SPARC_INS_FMUL8X16AU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMULD, SPARC_INS_FMULD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FMULD8SUX16, SPARC_INS_FMULD8SUX16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMULD8ULX16, SPARC_INS_FMULD8ULX16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FMULQ, SPARC_INS_FMULQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FMULS, SPARC_INS_FMULS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FNADDD, SPARC_INS_FNADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FNADDS, SPARC_INS_FNADDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FNAND, SPARC_INS_FNAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNANDS, SPARC_INS_FNANDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNEGD, SPARC_INS_FNEGD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FNEGQ, SPARC_INS_FNEGQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_FNEGS, SPARC_INS_FNEGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FNHADDD, SPARC_INS_FNHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FNHADDS, SPARC_INS_FNHADDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FNMULD, SPARC_INS_FNHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FNMULS, SPARC_INS_FNHADDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FNOR, SPARC_INS_FNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNORS, SPARC_INS_FNORS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNOT1, SPARC_INS_FNOT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNOT1S, SPARC_INS_FNOT1S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNOT2, SPARC_INS_FNOT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNOT2S, SPARC_INS_FNOT2S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FNSMULD, SPARC_INS_FNHADDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FONE, SPARC_INS_FONE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FONES, SPARC_INS_FONES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FOR, SPARC_INS_FOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FORNOT1, SPARC_INS_FORNOT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FORNOT1S, SPARC_INS_FORNOT1S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FORNOT2, SPARC_INS_FORNOT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FORNOT2S, SPARC_INS_FORNOT2S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FORS, SPARC_INS_FORS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPACK16, SPARC_INS_FPACK16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPACK32, SPARC_INS_FPACK32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPACKFIX, SPARC_INS_FPACKFIX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPADD16, SPARC_INS_FPADD16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPADD16S, SPARC_INS_FPADD16S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPADD32, SPARC_INS_FPADD32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPADD32S, SPARC_INS_FPADD32S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPADD64, SPARC_INS_FPADD64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FPMERGE, SPARC_INS_FPMERGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPSUB16, SPARC_INS_FPSUB16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPSUB16S, SPARC_INS_FPSUB16S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPSUB32, SPARC_INS_FPSUB32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FPSUB32S, SPARC_INS_FPSUB32S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FQTOD, SPARC_INS_FQTOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FQTOI, SPARC_INS_FQTOI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FQTOS, SPARC_INS_FQTOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FQTOX, SPARC_INS_FQTOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FSLAS16, SPARC_INS_FSLAS16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSLAS32, SPARC_INS_FSLAS32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSLL16, SPARC_INS_FSLL16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSLL32, SPARC_INS_FSLL32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSMULD, SPARC_INS_FSMULD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FSQRTD, SPARC_INS_FSQRTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FSQRTQ, SPARC_INS_FSQRTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FSQRTS, SPARC_INS_FSQRTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FSRA16, SPARC_INS_FSRA16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSRA32, SPARC_INS_FSRA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSRC1, SPARC_INS_FSRC1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FSRC1S, SPARC_INS_FSRC1S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FSRC2, SPARC_INS_FSRC2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FSRC2S, SPARC_INS_FSRC2S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FSRL16, SPARC_INS_FSRL16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSRL32, SPARC_INS_FSRL32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_FSTOD, SPARC_INS_FSTOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FSTOI, SPARC_INS_FSTOI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FSTOQ, SPARC_INS_FSTOQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FSTOX, SPARC_INS_FSTOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FSUBD, SPARC_INS_FSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FSUBQ, SPARC_INS_FSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_FSUBS, SPARC_INS_FSUBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_FXNOR, SPARC_INS_FXNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FXNORS, SPARC_INS_FXNORS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FXOR, SPARC_INS_FXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FXORS, SPARC_INS_FXORS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FXTOD, SPARC_INS_FXTOD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FXTOQ, SPARC_INS_FXTOQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FXTOS, SPARC_INS_FXTOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_FZERO, SPARC_INS_FZERO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_FZEROS, SPARC_INS_FZEROS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_JMPLri, SPARC_INS_JMPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_JMPLrr, SPARC_INS_JMPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDDFri, SPARC_INS_LDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDDFrr, SPARC_INS_LDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDFri, SPARC_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDFrr, SPARC_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDQFri, SPARC_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_LDQFrr, SPARC_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_LDSBri, SPARC_INS_LDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDSBrr, SPARC_INS_LDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDSHri, SPARC_INS_LDSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDSHrr, SPARC_INS_LDSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDSWri, SPARC_INS_LDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_LDSWrr, SPARC_INS_LDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_LDUBri, SPARC_INS_LDUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDUBrr, SPARC_INS_LDUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDUHri, SPARC_INS_LDUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDUHrr, SPARC_INS_LDUH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDXri, SPARC_INS_LDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_LDXrr, SPARC_INS_LDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_LDri, SPARC_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LDrr, SPARC_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_LEAX_ADDri, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_LEA_ADDri, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_32BIT, 0 }, 0, 0 #endif }, { SP_LZCNT, SPARC_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_MEMBARi, SPARC_INS_MEMBAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_MOVDTOX, SPARC_INS_MOVDTOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_MOVFCCri, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_MOVFCCrr, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_MOVICCri, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_MOVICCrr, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_MOVRGEZri, SPARC_INS_MOVRGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRGEZrr, SPARC_INS_MOVRGEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRGZri, SPARC_INS_MOVRGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRGZrr, SPARC_INS_MOVRGZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRLEZri, SPARC_INS_MOVRLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRLEZrr, SPARC_INS_MOVRLEZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRLZri, SPARC_INS_MOVRLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRLZrr, SPARC_INS_MOVRLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRNZri, SPARC_INS_MOVRNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRNZrr, SPARC_INS_MOVRNZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRRZri, SPARC_INS_MOVRZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVRRZrr, SPARC_INS_MOVRZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVSTOSW, SPARC_INS_MOVSTOSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_MOVSTOUW, SPARC_INS_MOVSTOUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_MOVWTOS, SPARC_INS_MOVDTOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_MOVXCCri, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVXCCrr, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MOVXTOD, SPARC_INS_MOVDTOX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_MULXri, SPARC_INS_MULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_MULXrr, SPARC_INS_MULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_NOP, SPARC_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ORCCri, SPARC_INS_ORCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ORCCrr, SPARC_INS_ORCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ORNCCri, SPARC_INS_ORNCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ORNCCrr, SPARC_INS_ORNCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_ORNri, SPARC_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ORNrr, SPARC_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ORXNrr, SPARC_INS_ORN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ORXri, SPARC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ORXrr, SPARC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_ORri, SPARC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_ORrr, SPARC_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_PDIST, SPARC_INS_PDIST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_PDISTN, SPARC_INS_PDISTN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_POPCrr, SPARC_INS_POPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_RDY, SPARC_INS_RD, #ifndef CAPSTONE_DIET { SPARC_REG_Y, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_RESTOREri, SPARC_INS_RESTORE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_RESTORErr, SPARC_INS_RESTORE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_RET, SPARC_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_RETL, SPARC_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_RETTri, SPARC_INS_RETT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_RETTrr, SPARC_INS_RETT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SAVEri, SPARC_INS_SAVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SAVErr, SPARC_INS_SAVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SDIVCCri, SPARC_INS_SDIVCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SDIVCCrr, SPARC_INS_SDIVCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SDIVXri, SPARC_INS_SDIVX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SDIVXrr, SPARC_INS_SDIVX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SDIVri, SPARC_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_SDIVrr, SPARC_INS_SDIV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_SETHIXi, SPARC_INS_SETHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SETHIi, SPARC_INS_SETHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SHUTDOWN, SPARC_INS_SHUTDOWN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0 #endif }, { SP_SIAM, SPARC_INS_SIAM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0 #endif }, { SP_SLLXri, SPARC_INS_SLLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SLLXrr, SPARC_INS_SLLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SLLri, SPARC_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SLLrr, SPARC_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SMULCCri, SPARC_INS_SMULCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SMULCCrr, SPARC_INS_SMULCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SMULri, SPARC_INS_SMUL, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_SMULrr, SPARC_INS_SMUL, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_SRAXri, SPARC_INS_SRAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SRAXrr, SPARC_INS_SRAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SRAri, SPARC_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SRArr, SPARC_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SRLXri, SPARC_INS_SRLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SRLXrr, SPARC_INS_SRLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SRLri, SPARC_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SRLrr, SPARC_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STBAR, SPARC_INS_STBAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STBri, SPARC_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STBrr, SPARC_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STDFri, SPARC_INS_STD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STDFrr, SPARC_INS_STD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STFri, SPARC_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STFrr, SPARC_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STHri, SPARC_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STHrr, SPARC_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STQFri, SPARC_INS_STQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_STQFrr, SPARC_INS_STQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_STXri, SPARC_INS_STX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_STXrr, SPARC_INS_STX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_STri, SPARC_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_STrr, SPARC_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SUBCCri, SPARC_INS_SUBCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SUBCCrr, SPARC_INS_SUBCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SUBCri, SPARC_INS_SUBX, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SUBCrr, SPARC_INS_SUBX, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SUBEri, SPARC_INS_SUBXCC, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SUBErr, SPARC_INS_SUBXCC, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_SUBXri, SPARC_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SUBXrr, SPARC_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_SUBri, SPARC_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SUBrr, SPARC_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SWAPri, SPARC_INS_SWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_SWAPrr, SPARC_INS_SWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TA3, SPARC_INS_T, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TA5, SPARC_INS_T, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TADDCCTVri, SPARC_INS_TADDCCTV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TADDCCTVrr, SPARC_INS_TADDCCTV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TADDCCri, SPARC_INS_TADDCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TADDCCrr, SPARC_INS_TADDCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TICCri, SPARC_INS_T, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TICCrr, SPARC_INS_T, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TLS_ADDXrr, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_TLS_ADDrr, SPARC_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TLS_CALL, SPARC_INS_CALL, #ifndef CAPSTONE_DIET { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TLS_LDXrr, SPARC_INS_LDX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_TLS_LDrr, SPARC_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_TSUBCCTVri, SPARC_INS_TSUBCCTV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TSUBCCTVrr, SPARC_INS_TSUBCCTV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TSUBCCri, SPARC_INS_TSUBCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TSUBCCrr, SPARC_INS_TSUBCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_TXCCri, SPARC_INS_T, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_TXCCrr, SPARC_INS_T, #ifndef CAPSTONE_DIET { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_UDIVCCri, SPARC_INS_UDIVCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_UDIVCCrr, SPARC_INS_UDIVCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_UDIVXri, SPARC_INS_UDIVX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_UDIVXrr, SPARC_INS_UDIVX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_UDIVri, SPARC_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_UDIVrr, SPARC_INS_UDIV, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_UMULCCri, SPARC_INS_UMULCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_UMULCCrr, SPARC_INS_UMULCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_UMULXHI, SPARC_INS_UMULXHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_UMULri, SPARC_INS_UMUL, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_UMULrr, SPARC_INS_UMUL, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_UNIMP, SPARC_INS_UNIMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_V9FCMPD, SPARC_INS_FCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_V9FCMPED, SPARC_INS_FCMPED, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_V9FCMPEQ, SPARC_INS_FCMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_V9FCMPES, SPARC_INS_FCMPES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_V9FCMPQ, SPARC_INS_FCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0 #endif }, { SP_V9FCMPS, SPARC_INS_FCMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_V9FMOVD_FCC, SPARC_INS_FMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_V9FMOVQ_FCC, SPARC_INS_FMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_V9FMOVS_FCC, SPARC_INS_FMOVS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_V9MOVFCCri, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_V9MOVFCCrr, SPARC_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0 #endif }, { SP_WRYri, SPARC_INS_WR, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_WRYrr, SPARC_INS_WR, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0 #endif }, { SP_XMULX, SPARC_INS_XMULX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_XMULXHI, SPARC_INS_XMULXHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0 #endif }, { SP_XNORCCri, SPARC_INS_XNORCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_XNORCCrr, SPARC_INS_XNORCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_XNORXrr, SPARC_INS_XNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_XNORri, SPARC_INS_XNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_XNORrr, SPARC_INS_XNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_XORCCri, SPARC_INS_XORCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_XORCCrr, SPARC_INS_XORCC, #ifndef CAPSTONE_DIET { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0 #endif }, { SP_XORXri, SPARC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_XORXrr, SPARC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0 #endif }, { SP_XORri, SPARC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SP_XORrr, SPARC_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/Sparc/SparcModule.c010066400017500001750000000016731363402546700206500ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SPARC #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "SparcDisassembler.h" #include "SparcInstPrinter.h" #include "SparcMapping.h" #include "SparcModule.h" cs_err Sparc_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); Sparc_init(mri); ud->printer = Sparc_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = Sparc_getInstruction; ud->post_printer = Sparc_post_printer; ud->reg_name = Sparc_reg_name; ud->insn_id = Sparc_get_insn_id; ud->insn_name = Sparc_insn_name; ud->group_name = Sparc_group_name; return CS_ERR_OK; } cs_err Sparc_option(cs_struct *handle, cs_opt_type type, size_t value) { if (type == CS_OPT_SYNTAX) handle->syntax = (int) value; if (type == CS_OPT_MODE) { handle->mode = (cs_mode)value; } return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/Sparc/SparcModule.h010066400017500001750000000004411363402546700206450ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_SPARC_MODULE_H #define CS_SPARC_MODULE_H #include "../../utils.h" cs_err Sparc_global_init(cs_struct *ud); cs_err Sparc_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZDisassembler.c010066400017500001750000000233461363402546700227550ustar0000000000000000//===------ SystemZDisassembler.cpp - Disassembler for PowerPC ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SYSZ #include // DEBUG #include #include #include "../../cs_priv.h" #include "../../utils.h" #include "SystemZDisassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" #include "../../MathExtras.h" #include "SystemZMCTargetDesc.h" static uint64_t getFeatureBits(int mode) { // support everything return (uint64_t)-1; } static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo, const unsigned *Regs) { //assert(RegNo < 16 && "Invalid register"); RegNo = Regs[RegNo]; if (RegNo == 0) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, (unsigned)RegNo); return MCDisassembler_Success; } static DecodeStatus DecodeGR32BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_GR32Regs); } static DecodeStatus DecodeGRH32BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_GRH32Regs); } static DecodeStatus DecodeGR64BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_GR64Regs); } static DecodeStatus DecodeGR128BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_GR128Regs); } static DecodeStatus DecodeADDR64BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_GR64Regs); } static DecodeStatus DecodeFP32BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_FP32Regs); } static DecodeStatus DecodeFP64BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_FP64Regs); } static DecodeStatus DecodeFP128BitRegisterClass(MCInst *Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { return decodeRegisterClass(Inst, RegNo, SystemZMC_FP128Regs); } static DecodeStatus decodeUImmOperand(MCInst *Inst, uint64_t Imm) { //assert(isUInt(Imm) && "Invalid immediate"); MCOperand_CreateImm0(Inst, Imm); return MCDisassembler_Success; } static DecodeStatus decodeSImmOperand(MCInst *Inst, uint64_t Imm, unsigned N) { //assert(isUInt(Imm) && "Invalid immediate"); MCOperand_CreateImm0(Inst, SignExtend64(Imm, N)); return MCDisassembler_Success; } static DecodeStatus decodeAccessRegOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand(Inst, Imm); } static DecodeStatus decodeU4ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand(Inst, Imm); } static DecodeStatus decodeU6ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand(Inst, Imm); } static DecodeStatus decodeU8ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand(Inst, Imm); } static DecodeStatus decodeU16ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand(Inst, Imm); } static DecodeStatus decodeU32ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeUImmOperand(Inst, Imm); } static DecodeStatus decodeS8ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeSImmOperand(Inst, Imm, 8); } static DecodeStatus decodeS16ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeSImmOperand(Inst, Imm, 16); } static DecodeStatus decodeS32ImmOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodeSImmOperand(Inst, Imm, 32); } static DecodeStatus decodePCDBLOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, unsigned N) { //assert(isUInt(Imm) && "Invalid PC-relative offset"); MCOperand_CreateImm0(Inst, SignExtend64(Imm, N) * 2 + Address); return MCDisassembler_Success; } static DecodeStatus decodePC16DBLOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodePCDBLOperand(Inst, Imm, Address, 16); } static DecodeStatus decodePC32DBLOperand(MCInst *Inst, uint64_t Imm, uint64_t Address, const void *Decoder) { return decodePCDBLOperand(Inst, Imm, Address, 32); } static DecodeStatus decodeBDAddr12Operand(MCInst *Inst, uint64_t Field, const unsigned *Regs) { uint64_t Base = Field >> 12; uint64_t Disp = Field & 0xfff; //assert(Base < 16 && "Invalid BDAddr12"); MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); MCOperand_CreateImm0(Inst, Disp); return MCDisassembler_Success; } static DecodeStatus decodeBDAddr20Operand(MCInst *Inst, uint64_t Field, const unsigned *Regs) { uint64_t Base = Field >> 20; uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); //assert(Base < 16 && "Invalid BDAddr20"); MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); return MCDisassembler_Success; } static DecodeStatus decodeBDXAddr12Operand(MCInst *Inst, uint64_t Field, const unsigned *Regs) { uint64_t Index = Field >> 16; uint64_t Base = (Field >> 12) & 0xf; uint64_t Disp = Field & 0xfff; //assert(Index < 16 && "Invalid BDXAddr12"); MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); MCOperand_CreateImm0(Inst, Disp); MCOperand_CreateReg0(Inst, Index == 0 ? 0 : Regs[Index]); return MCDisassembler_Success; } static DecodeStatus decodeBDXAddr20Operand(MCInst *Inst, uint64_t Field, const unsigned *Regs) { uint64_t Index = Field >> 24; uint64_t Base = (Field >> 20) & 0xf; uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); //assert(Index < 16 && "Invalid BDXAddr20"); MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); MCOperand_CreateReg0(Inst, Index == 0 ? 0 : Regs[Index]); return MCDisassembler_Success; } static DecodeStatus decodeBDLAddr12Len8Operand(MCInst *Inst, uint64_t Field, const unsigned *Regs) { uint64_t Length = Field >> 16; uint64_t Base = (Field >> 12) & 0xf; uint64_t Disp = Field & 0xfff; //assert(Length < 256 && "Invalid BDLAddr12Len8"); MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); MCOperand_CreateImm0(Inst, Disp); MCOperand_CreateImm0(Inst, Length + 1); return MCDisassembler_Success; } static DecodeStatus decodeBDAddr32Disp12Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDAddr12Operand(Inst, Field, SystemZMC_GR32Regs); } static DecodeStatus decodeBDAddr32Disp20Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDAddr20Operand(Inst, Field, SystemZMC_GR32Regs); } static DecodeStatus decodeBDAddr64Disp12Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDAddr12Operand(Inst, Field, SystemZMC_GR64Regs); } static DecodeStatus decodeBDAddr64Disp20Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDAddr20Operand(Inst, Field, SystemZMC_GR64Regs); } static DecodeStatus decodeBDXAddr64Disp12Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDXAddr12Operand(Inst, Field, SystemZMC_GR64Regs); } static DecodeStatus decodeBDXAddr64Disp20Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDXAddr20Operand(Inst, Field, SystemZMC_GR64Regs); } static DecodeStatus decodeBDLAddr64Disp12Len8Operand(MCInst *Inst, uint64_t Field, uint64_t Address, const void *Decoder) { return decodeBDLAddr12Len8Operand(Inst, Field, SystemZMC_GR64Regs); } #define GET_SUBTARGETINFO_ENUM #include "SystemZGenSubtargetInfo.inc" #include "SystemZGenDisassemblerTables.inc" bool SystemZ_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *MI, uint16_t *size, uint64_t address, void *info) { uint64_t Inst; const uint8_t *Table; uint16_t I; // The top 2 bits of the first byte specify the size. if (*code < 0x40) { *size = 2; Table = DecoderTable16; } else if (*code < 0xc0) { *size = 4; Table = DecoderTable32; } else { *size = 6; Table = DecoderTable48; } if (code_len < *size) // short of input data return false; if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, sysz)+sizeof(cs_sysz)); } // Construct the instruction. Inst = 0; for (I = 0; I < *size; ++I) Inst = (Inst << 8) | code[I]; return decodeInstruction(Table, MI, Inst, address, info, 0); } #define GET_REGINFO_ENUM #define GET_REGINFO_MC_DESC #include "SystemZGenRegisterInfo.inc" void SystemZ_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(SystemZRegDesc, 98, RA, PC, SystemZMCRegisterClasses, 12, SystemZRegUnitRoots, 49, SystemZRegDiffLists, SystemZRegStrings, SystemZSubRegIdxLists, 7, SystemZSubRegIdxRanges, SystemZRegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, SystemZRegDesc, 98, 0, 0, SystemZMCRegisterClasses, 12, 0, 0, SystemZRegDiffLists, 0, SystemZSubRegIdxLists, 7, 0); } #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZDisassembler.h010066400017500001750000000006601363402546700227540ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SYSZDISASSEMBLER_H #define CS_SYSZDISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" void SystemZ_init(MCRegisterInfo *MRI); bool SystemZ_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZGenAsmWriter.inc010066400017500001750000001642051363402546700232360ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include // debug #include /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 3946U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 3939U, // BUNDLE 3956U, // LIFETIME_START 3926U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 4099U, // A 4160U, // ADB 1055559U, // ADBR 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 0U, // ADJDYNALLOC 4205U, // AEB 1055678U, // AEBR 0U, // AEXT128_64 2103171U, // AFI 0U, // AFIMux 5195U, // AG 5068U, // AGF 2103181U, // AGFI 1056088U, // AGFR 3151831U, // AGHI 37755030U, // AGHIK 1056164U, // AGR 171972799U, // AGRK 75807U, // AGSI 5397U, // AH 3151821U, // AHI 37755024U, // AHIK 0U, // AHIMux 0U, // AHIMuxK 7917U, // AHY 2102663U, // AIH 6413U, // AL 4271U, // ALC 5239U, // ALCG 1056176U, // ALCGR 1056003U, // ALCR 5248949U, // ALFI 5272U, // ALG 5078U, // ALGF 5248921U, // ALGFI 1056101U, // ALGFR 37755037U, // ALGHSIK 1056196U, // ALGR 171972805U, // ALGRK 37755046U, // ALHSIK 1056312U, // ALR 171972843U, // ALRK 7975U, // ALY 1055554U, // AR 171972794U, // ARK 75802U, // ASI 0U, // ATOMIC_CMP_SWAPW 0U, // ATOMIC_LOADW_AFI 0U, // ATOMIC_LOADW_AR 0U, // ATOMIC_LOADW_MAX 0U, // ATOMIC_LOADW_MIN 0U, // ATOMIC_LOADW_NILH 0U, // ATOMIC_LOADW_NILHi 0U, // ATOMIC_LOADW_NR 0U, // ATOMIC_LOADW_NRi 0U, // ATOMIC_LOADW_OILH 0U, // ATOMIC_LOADW_OR 0U, // ATOMIC_LOADW_SR 0U, // ATOMIC_LOADW_UMAX 0U, // ATOMIC_LOADW_UMIN 0U, // ATOMIC_LOADW_XILF 0U, // ATOMIC_LOADW_XR 0U, // ATOMIC_LOAD_AFI 0U, // ATOMIC_LOAD_AGFI 0U, // ATOMIC_LOAD_AGHI 0U, // ATOMIC_LOAD_AGR 0U, // ATOMIC_LOAD_AHI 0U, // ATOMIC_LOAD_AR 0U, // ATOMIC_LOAD_MAX_32 0U, // ATOMIC_LOAD_MAX_64 0U, // ATOMIC_LOAD_MIN_32 0U, // ATOMIC_LOAD_MIN_64 0U, // ATOMIC_LOAD_NGR 0U, // ATOMIC_LOAD_NGRi 0U, // ATOMIC_LOAD_NIHF64 0U, // ATOMIC_LOAD_NIHF64i 0U, // ATOMIC_LOAD_NIHH64 0U, // ATOMIC_LOAD_NIHH64i 0U, // ATOMIC_LOAD_NIHL64 0U, // ATOMIC_LOAD_NIHL64i 0U, // ATOMIC_LOAD_NILF 0U, // ATOMIC_LOAD_NILF64 0U, // ATOMIC_LOAD_NILF64i 0U, // ATOMIC_LOAD_NILFi 0U, // ATOMIC_LOAD_NILH 0U, // ATOMIC_LOAD_NILH64 0U, // ATOMIC_LOAD_NILH64i 0U, // ATOMIC_LOAD_NILHi 0U, // ATOMIC_LOAD_NILL 0U, // ATOMIC_LOAD_NILL64 0U, // ATOMIC_LOAD_NILL64i 0U, // ATOMIC_LOAD_NILLi 0U, // ATOMIC_LOAD_NR 0U, // ATOMIC_LOAD_NRi 0U, // ATOMIC_LOAD_OGR 0U, // ATOMIC_LOAD_OIHF64 0U, // ATOMIC_LOAD_OIHH64 0U, // ATOMIC_LOAD_OIHL64 0U, // ATOMIC_LOAD_OILF 0U, // ATOMIC_LOAD_OILF64 0U, // ATOMIC_LOAD_OILH 0U, // ATOMIC_LOAD_OILH64 0U, // ATOMIC_LOAD_OILL 0U, // ATOMIC_LOAD_OILL64 0U, // ATOMIC_LOAD_OR 0U, // ATOMIC_LOAD_SGR 0U, // ATOMIC_LOAD_SR 0U, // ATOMIC_LOAD_UMAX_32 0U, // ATOMIC_LOAD_UMAX_64 0U, // ATOMIC_LOAD_UMIN_32 0U, // ATOMIC_LOAD_UMIN_64 0U, // ATOMIC_LOAD_XGR 0U, // ATOMIC_LOAD_XIHF64 0U, // ATOMIC_LOAD_XILF 0U, // ATOMIC_LOAD_XILF64 0U, // ATOMIC_LOAD_XR 0U, // ATOMIC_SWAPW 0U, // ATOMIC_SWAP_32 0U, // ATOMIC_SWAP_64 1055887U, // AXBR 7880U, // AY 6438135U, // AsmBCR 209101U, // AsmBRC 211230U, // AsmBRCL 74455135U, // AsmCGIJ 306190455U, // AsmCGRJ 74455130U, // AsmCIJ 75503717U, // AsmCLGIJ 306190461U, // AsmCLGRJ 75503724U, // AsmCLIJ 306190468U, // AsmCLRJ 306190450U, // AsmCRJ 269613U, // AsmEBR 16910U, // AsmEJ 16650U, // AsmEJG 9441518U, // AsmELOC 9441531U, // AsmELOCG 1053631U, // AsmELOCGR 1053624U, // AsmELOCR 10490100U, // AsmESTOC 10490114U, // AsmESTOCG 269843U, // AsmHBR 269618U, // AsmHEBR 16695U, // AsmHEJ 16687U, // AsmHEJG 9441551U, // AsmHELOC 9441566U, // AsmHELOCG 1053187U, // AsmHELOCGR 1053179U, // AsmHELOCR 10490134U, // AsmHESTOC 10490150U, // AsmHESTOCG 17817U, // AsmHJ 17745U, // AsmHJG 9442596U, // AsmHLOC 9442626U, // AsmHLOCG 1054578U, // AsmHLOCGR 1054571U, // AsmHLOCR 10491178U, // AsmHSTOC 10491209U, // AsmHSTOCG 108009100U, // AsmJEAltCGI 440407728U, // AsmJEAltCGR 108009092U, // AsmJEAltCI 109057685U, // AsmJEAltCLGI 440407737U, // AsmJEAltCLGR 109057695U, // AsmJEAltCLI 440407747U, // AsmJEAltCLR 440407720U, // AsmJEAltCR 108007954U, // AsmJECGI 440406574U, // AsmJECGR 108007948U, // AsmJECI 109056537U, // AsmJECLGI 440406581U, // AsmJECLGR 109056545U, // AsmJECLI 440406589U, // AsmJECLR 440406568U, // AsmJECR 108008157U, // AsmJHAltCGI 440406785U, // AsmJHAltCGR 108008149U, // AsmJHAltCI 109056742U, // AsmJHAltCLGI 440406794U, // AsmJHAltCLGR 109056752U, // AsmJHAltCLI 440406804U, // AsmJHAltCLR 440406777U, // AsmJHAltCR 108008861U, // AsmJHCGI 440407481U, // AsmJHCGR 108008855U, // AsmJHCI 109057444U, // AsmJHCLGI 440407488U, // AsmJHCLGR 109057452U, // AsmJHCLI 440407496U, // AsmJHCLR 440407475U, // AsmJHCR 108009961U, // AsmJHEAltCGI 440408585U, // AsmJHEAltCGR 108009954U, // AsmJHEAltCI 109058545U, // AsmJHEAltCLGI 440408593U, // AsmJHEAltCLGR 109058554U, // AsmJHEAltCLI 440408602U, // AsmJHEAltCLR 440408578U, // AsmJHEAltCR 108007740U, // AsmJHECGI 440406364U, // AsmJHECGR 108007733U, // AsmJHECI 109056324U, // AsmJHECLGI 440406372U, // AsmJHECLGR 109056333U, // AsmJHECLI 440406381U, // AsmJHECLR 440406357U, // AsmJHECR 108007848U, // AsmJLAltCGI 440406476U, // AsmJLAltCGR 108007840U, // AsmJLAltCI 109056433U, // AsmJLAltCLGI 440406485U, // AsmJLAltCLGR 109056443U, // AsmJLAltCLI 440406495U, // AsmJLAltCLR 440406468U, // AsmJLAltCR 108009825U, // AsmJLCGI 440408445U, // AsmJLCGR 108009819U, // AsmJLCI 109058408U, // AsmJLCLGI 440408452U, // AsmJLCLGR 109058416U, // AsmJLCLI 440408460U, // AsmJLCLR 440408439U, // AsmJLCR 108009249U, // AsmJLEAltCGI 440407873U, // AsmJLEAltCGR 108009242U, // AsmJLEAltCI 109057833U, // AsmJLEAltCLGI 440407881U, // AsmJLEAltCLGR 109057842U, // AsmJLEAltCLI 440407890U, // AsmJLEAltCLR 440407866U, // AsmJLEAltCR 108008049U, // AsmJLECGI 440406673U, // AsmJLECGR 108008042U, // AsmJLECI 109056633U, // AsmJLECLGI 440406681U, // AsmJLECLGR 109056642U, // AsmJLECLI 440406690U, // AsmJLECLR 440406666U, // AsmJLECR 108008302U, // AsmJLHAltCGI 440406926U, // AsmJLHAltCGR 108008295U, // AsmJLHAltCI 109056886U, // AsmJLHAltCLGI 440406934U, // AsmJLHAltCLGR 109056895U, // AsmJLHAltCLI 440406943U, // AsmJLHAltCLR 440406919U, // AsmJLHAltCR 108008981U, // AsmJLHCGI 440407605U, // AsmJLHCGR 108008974U, // AsmJLHCI 109057565U, // AsmJLHCLGI 440407613U, // AsmJLHCLGR 109057574U, // AsmJLHCLI 440407622U, // AsmJLHCLR 440407598U, // AsmJLHCR 269885U, // AsmLBR 269631U, // AsmLEBR 17004U, // AsmLEJ 16996U, // AsmLEJG 9441860U, // AsmLELOC 9441875U, // AsmLELOCG 1053496U, // AsmLELOCGR 1053488U, // AsmLELOCR 10490443U, // AsmLESTOC 10490459U, // AsmLESTOCG 269855U, // AsmLHBR 17936U, // AsmLHJ 17903U, // AsmLHJG 9442767U, // AsmLHLOC 9442782U, // AsmLHLOCG 1054439U, // AsmLHLOCGR 1054431U, // AsmLHLOCR 10491350U, // AsmLHSTOC 10491366U, // AsmLHSTOCG 18781U, // AsmLJ 18743U, // AsmLJG 9443601U, // AsmLLOC 9443624U, // AsmLLOCG 1055326U, // AsmLLOCGR 1055289U, // AsmLLOCR 579866818U, // AsmLOC 579867773U, // AsmLOCG 705699255U, // AsmLOCGR 705699087U, // AsmLOCR 10492183U, // AsmLSTOC 10492207U, // AsmLSTOCG 269644U, // AsmNEBR 17257U, // AsmNEJ 17249U, // AsmNEJG 9442113U, // AsmNELOC 9442128U, // AsmNELOCG 1053615U, // AsmNELOCGR 1053607U, // AsmNELOCR 10490696U, // AsmNESTOC 10490712U, // AsmNESTOCG 269874U, // AsmNHBR 269624U, // AsmNHEBR 16802U, // AsmNHEJ 16793U, // AsmNHEJG 9441653U, // AsmNHELOC 9441670U, // AsmNHELOCG 1053169U, // AsmNHELOCGR 1053160U, // AsmNHELOCR 10490237U, // AsmNHESTOC 10490255U, // AsmNHESTOCG 18204U, // AsmNHJ 18196U, // AsmNHJG 9443060U, // AsmNHLOC 9443075U, // AsmNHLOCG 1054562U, // AsmNHLOCGR 1054554U, // AsmNHLOCR 10491643U, // AsmNHSTOC 10491659U, // AsmNHSTOCG 269900U, // AsmNLBR 269637U, // AsmNLEBR 17111U, // AsmNLEJ 17102U, // AsmNLEJG 9441962U, // AsmNLELOC 9441979U, // AsmNLELOCG 1053478U, // AsmNLELOCGR 1053469U, // AsmNLELOCR 10490546U, // AsmNLESTOC 10490564U, // AsmNLESTOCG 269867U, // AsmNLHBR 18054U, // AsmNLHJ 18045U, // AsmNLHJG 9442905U, // AsmNLHLOC 9442922U, // AsmNLHLOCG 1054421U, // AsmNLHLOCGR 1054412U, // AsmNLHLOCR 10491489U, // AsmNLHSTOC 10491507U, // AsmNLHSTOCG 18916U, // AsmNLJ 18908U, // AsmNLJG 9443772U, // AsmNLLOC 9443787U, // AsmNLLOCG 1055274U, // AsmNLLOCGR 1055266U, // AsmNLLOCR 10492355U, // AsmNLSTOC 10492371U, // AsmNLSTOCG 269921U, // AsmNOBR 19228U, // AsmNOJ 19222U, // AsmNOJG 9444086U, // AsmNOLOC 9444101U, // AsmNOLOCG 1055529U, // AsmNOLOCGR 1055521U, // AsmNOLOCR 10492669U, // AsmNOSTOC 10492685U, // AsmNOSTOCG 269916U, // AsmOBR 19186U, // AsmOJ 19181U, // AsmOJG 9444049U, // AsmOLOC 9444062U, // AsmOLOCG 1055545U, // AsmOLOCGR 1055538U, // AsmOLOCR 10492631U, // AsmOSTOC 10492645U, // AsmOSTOCG 715133127U, // AsmSTOC 715134083U, // AsmSTOCG 4202092U, // BASR 269129U, // BR 11542157U, // BRAS 11541175U, // BRASL 24476U, // BRC 24471U, // BRCL 12590747U, // BRCT 12588273U, // BRCTG 13635752U, // C 13635653U, // CDB 4201294U, // CDBR 4201519U, // CDFBR 4201564U, // CDGBR 719330365U, // CDLFBR 719330410U, // CDLGBR 13635698U, // CEB 4201413U, // CEBR 4201526U, // CEFBR 4201571U, // CEGBR 719330373U, // CELFBR 719330418U, // CELGBR 14687073U, // CFDBR 14687200U, // CFEBR 15734664U, // CFI 0U, // CFIMux 14687402U, // CFXBR 13636729U, // CG 14687088U, // CGDBR 14687215U, // CGEBR 13636561U, // CGF 15734675U, // CGFI 4201823U, // CGFR 16783943U, // CGFRL 13636932U, // CGH 17831901U, // CGHI 16783994U, // CGHRL 337971U, // CGHSI 421790U, // CGIJ 4201906U, // CGR 19034034U, // CGRJ 16783968U, // CGRL 14687417U, // CGXBR 13636896U, // CH 13636608U, // CHF 337986U, // CHHSI 17831890U, // CHI 16783988U, // CHRL 337957U, // CHSI 13639410U, // CHY 15734156U, // CIH 421786U, // CIJ 13637907U, // CL 28852U, // CLC 0U, // CLCLoop 0U, // CLCSequence 719330152U, // CLFDBR 719330279U, // CLFEBR 469035U, // CLFHSI 19929019U, // CLFI 0U, // CLFIMux 719330481U, // CLFXBR 13636773U, // CLG 719330167U, // CLGDBR 719330294U, // CLGEBR 13636572U, // CLGF 19928992U, // CLGFI 4201836U, // CLGFR 16783950U, // CLGFRL 16784001U, // CLGHRL 469050U, // CLGHSI 552867U, // CLGIJ 4201930U, // CLGR 19034039U, // CLGRJ 16783974U, // CLGRL 719330496U, // CLGXBR 13636644U, // CLHF 469065U, // CLHHSI 16784017U, // CLHRL 600077U, // CLI 19928465U, // CLIH 552873U, // CLIJ 601868U, // CLIY 0U, // CLMux 4202050U, // CLR 19034045U, // CLRJ 16784038U, // CLRL 4202149U, // CLST 0U, // CLSTLoop 13639468U, // CLY 0U, // CMux 171973920U, // CPSDRdd 171973920U, // CPSDRds 171973920U, // CPSDRsd 171973920U, // CPSDRss 4201720U, // CR 19034030U, // CRJ 16783931U, // CRL 839917203U, // CS 839914722U, // CSG 839917379U, // CSY 4201622U, // CXBR 4201557U, // CXFBR 4201602U, // CXGBR 719330381U, // CXLFBR 719330426U, // CXLGBR 13639373U, // CY 0U, // CallBASR 0U, // CallBR 0U, // CallBRASL 0U, // CallJG 0U, // CondStore16 0U, // CondStore16Inv 0U, // CondStore16Mux 0U, // CondStore16MuxInv 0U, // CondStore32 0U, // CondStore32Inv 0U, // CondStore64 0U, // CondStore64Inv 0U, // CondStore8 0U, // CondStore8Inv 0U, // CondStore8Mux 0U, // CondStore8MuxInv 0U, // CondStoreF32 0U, // CondStoreF32Inv 0U, // CondStoreF64 0U, // CondStoreF64Inv 4170U, // DDB 1055572U, // DDBR 4216U, // DEB 1055692U, // DEBR 6436U, // DL 5290U, // DLG 1056208U, // DLGR 1056327U, // DLR 5351U, // DSG 5102U, // DSGF 1056143U, // DSGFR 1056245U, // DSGR 1055901U, // DXBR 20978497U, // EAR 14687103U, // FIDBR 719327250U, // FIDBRA 14687230U, // FIEBR 719327258U, // FIEBRA 14687432U, // FIXBR 719327282U, // FIXBRA 4201960U, // FLOGR 0U, // GOT 4267U, // IC 4267U, // IC32 7884U, // IC32Y 7884U, // ICY 0U, // IIFMux 19928069U, // IIHF 0U, // IIHF64 22025564U, // IIHH 0U, // IIHH64 22026556U, // IIHL 0U, // IIHL64 0U, // IIHMux 19928106U, // IILF 0U, // IILF64 22025717U, // IILH 0U, // IILH64 22026643U, // IILL 0U, // IILL64 0U, // IILMux 268990U, // IPM 18524U, // J 17554U, // JG 13637902U, // L 0U, // L128 13635590U, // LA 977276929U, // LAA 977278025U, // LAAG 977279243U, // LAAL 977278102U, // LAALG 977279687U, // LAN 977278166U, // LANG 977279692U, // LAO 977278172U, // LAOG 16783923U, // LARL 977280706U, // LAX 977278223U, // LAXG 13639367U, // LAY 13635745U, // LB 13636889U, // LBH 0U, // LBMux 4201610U, // LBR 4201293U, // LCDBR 4201412U, // LCEBR 4201822U, // LCGFR 4201905U, // LCGR 4201732U, // LCR 4201621U, // LCXBR 13635813U, // LD 13635703U, // LDEB 4201419U, // LDEBR 4201918U, // LDGR 4201755U, // LDR 4201628U, // LDXBR 719327266U, // LDXBRA 13639383U, // LDY 13636167U, // LE 4201306U, // LEDBR 719327242U, // LEDBRA 4201792U, // LER 4201635U, // LEXBR 719327274U, // LEXBRA 13639394U, // LEY 13636919U, // LFH 13636761U, // LG 13635739U, // LGB 4201580U, // LGBR 4201749U, // LGDR 13636567U, // LGF 15734682U, // LGFI 4201830U, // LGFR 16783951U, // LGFRL 13636951U, // LGH 17831907U, // LGHI 4202009U, // LGHR 16784002U, // LGHRL 4201925U, // LGR 16783975U, // LGRL 13637074U, // LH 13636982U, // LHH 17831933U, // LHI 0U, // LHIMux 0U, // LHMux 4202016U, // LHR 16784018U, // LHRL 13639415U, // LHY 13635769U, // LLC 13636894U, // LLCH 0U, // LLCMux 4201737U, // LLCR 0U, // LLCRMux 13635749U, // LLGC 4201724U, // LLGCR 13636578U, // LLGF 4201843U, // LLGFR 16783958U, // LLGFRL 13636950U, // LLGH 4202008U, // LLGHR 16784009U, // LLGHRL 13637198U, // LLH 13636981U, // LLHH 0U, // LLHMux 4202021U, // LLHR 16784024U, // LLHRL 0U, // LLHRMux 19928075U, // LLIHF 23074146U, // LLIHH 23075138U, // LLIHL 19928112U, // LLILF 23074299U, // LLILH 23075225U, // LLILL 977278155U, // LMG 0U, // LMux 4201356U, // LNDBR 4201477U, // LNEBR 4201857U, // LNGFR 4201954U, // LNGR 4202071U, // LNR 4201685U, // LNXBR 36739U, // LOC 36748U, // LOCG 40903U, // LOCGR 40898U, // LOCR 4201363U, // LPDBR 4201484U, // LPEBR 4201864U, // LPGFR 4201967U, // LPGR 4202087U, // LPR 4201692U, // LPXBR 4202041U, // LR 16784039U, // LRL 0U, // LRMux 13639351U, // LRV 13636866U, // LRVG 4201991U, // LRVGR 4202108U, // LRVR 13639329U, // LT 4201384U, // LTDBR 4201384U, // LTDBRCompare 4201505U, // LTEBR 4201505U, // LTEBRCompare 13636856U, // LTG 13636602U, // LTGF 4201885U, // LTGFR 4201985U, // LTGR 4202103U, // LTR 4201712U, // LTXBR 4201712U, // LTXBRCompare 0U, // LX 13635680U, // LXDB 4201391U, // LXDBR 13635733U, // LXEB 4201512U, // LXEBR 4202114U, // LXR 13639464U, // LY 269607U, // LZDR 269650U, // LZER 269959U, // LZXR 1108348991U, // MADB 1242569542U, // MADBR 1108349036U, // MAEB 1242569661U, // MAEBR 4175U, // MDB 1055622U, // MDBR 4221U, // MDEB 1055698U, // MDEBR 4227U, // MEEB 1055705U, // MEEBR 3151849U, // MGHI 5872U, // MH 3151874U, // MHI 7932U, // MHY 5307U, // MLG 1056214U, // MLGR 7831U, // MS 1108349018U, // MSDB 1242569633U, // MSDBR 1108349071U, // MSEB 1242569754U, // MSEBR 2103239U, // MSFI 5356U, // MSG 5108U, // MSGF 2103214U, // MSGFI 1056150U, // MSGFR 1056251U, // MSGR 1056370U, // MSR 8008U, // MSY 28887U, // MVC 0U, // MVCLoop 0U, // MVCSequence 337903U, // MVGHI 337910U, // MVHHI 337927U, // MVHI 600145U, // MVI 601884U, // MVIY 4202161U, // MVST 0U, // MVSTLoop 1055951U, // MXBR 4198U, // MXDB 1055670U, // MXDBR 6857U, // N 28862U, // NC 0U, // NCLoop 0U, // NCSequence 5336U, // NG 1056227U, // NGR 171972819U, // NGRK 600082U, // NI 0U, // NIFMux 5248018U, // NIHF 0U, // NIHF64 22025577U, // NIHH 0U, // NIHH64 22026569U, // NIHL 0U, // NIHL64 0U, // NIHMux 5248055U, // NILF 0U, // NILF64 22025730U, // NILH 0U, // NILH64 22026656U, // NILL 0U, // NILL64 0U, // NILMux 601874U, // NIY 1056344U, // NR 171972855U, // NRK 7995U, // NY 6862U, // O 28867U, // OC 0U, // OCLoop 0U, // OCSequence 5342U, // OG 1056234U, // OGR 171972825U, // OGRK 600086U, // OI 0U, // OIFMux 5248024U, // OIHF 0U, // OIHF64 22025583U, // OIHH 0U, // OIHH64 22026575U, // OIHL 0U, // OIHL64 0U, // OIHMux 5248061U, // OILF 0U, // OILF64 22025736U, // OILH 0U, // OILH64 22026662U, // OILL 0U, // OILL64 0U, // OILMux 601879U, // OIY 1056349U, // OR 171972860U, // ORK 7999U, // OY 667872U, // PFD 211520U, // PFDRL 1376785499U, // RISBG 1376785499U, // RISBG32 1376785546U, // RISBHG 0U, // RISBHH 0U, // RISBHL 1376785565U, // RISBLG 0U, // RISBLH 0U, // RISBLL 0U, // RISBMux 977279410U, // RLL 977278127U, // RLLG 1376785506U, // RNSBG 1376785513U, // ROSBG 1376785520U, // RXSBG 0U, // Return 7824U, // S 4187U, // SDB 1055650U, // SDBR 4240U, // SEB 1055771U, // SEBR 5347U, // SG 5103U, // SGF 1056144U, // SGFR 1056246U, // SGR 171972831U, // SGRK 6010U, // SH 7937U, // SHY 6842U, // SL 4256U, // SLB 5205U, // SLBG 1055881U, // SLBR 5248961U, // SLFI 5318U, // SLG 1056169U, // SLGBR 5096U, // SLGF 5248935U, // SLGFI 1056122U, // SLGFR 1056220U, // SLGR 171972812U, // SLGRK 9443767U, // SLL 977278133U, // SLLG 977279150U, // SLLK 1056338U, // SLR 171972849U, // SLRK 7985U, // SLY 13635668U, // SQDB 4201370U, // SQDBR 13635721U, // SQEB 4201491U, // SQEBR 4201699U, // SQXBR 1056366U, // SR 9441338U, // SRA 977278031U, // SRAG 977279114U, // SRAK 171972865U, // SRK 9444012U, // SRL 977278144U, // SRLG 977279156U, // SRLK 4202155U, // SRST 0U, // SRSTLoop 13639335U, // ST 0U, // ST128 13635794U, // STC 13636913U, // STCH 0U, // STCMux 13639377U, // STCY 13635817U, // STD 13639388U, // STDY 13636551U, // STE 13639399U, // STEY 13636924U, // STFH 13636861U, // STG 16783981U, // STGRL 13637502U, // STH 13636993U, // STHH 0U, // STHMux 16784031U, // STHRL 13639430U, // STHY 977278160U, // STMG 0U, // STMux 44935U, // STOC 44945U, // STOCG 16784049U, // STRL 13639356U, // STRV 13636872U, // STRVG 0U, // STX 13639501U, // STY 1055978U, // SXBR 8004U, // SY 0U, // Select32 0U, // Select32Mux 0U, // Select64 0U, // SelectF128 0U, // SelectF32 0U, // SelectF64 0U, // Serialize 0U, // TLS_GDCALL 0U, // TLS_LDCALL 600771U, // TM 23074171U, // TMHH 0U, // TMHH64 23075157U, // TMHL 0U, // TMHL64 0U, // TMHMux 23074387U, // TMLH 0U, // TMLH64 23075244U, // TMLL 0U, // TMLL64 0U, // TMLMux 601910U, // TMY 7876U, // X 28892U, // XC 0U, // XCLoop 0U, // XCSequence 5393U, // XG 1056270U, // XGR 171972837U, // XGRK 600150U, // XI 0U, // XIFMux 5248030U, // XIHF 0U, // XIHF64 5248067U, // XILF 0U, // XILF64 601890U, // XIY 1056387U, // XR 171972870U, // XRK 8018U, // XY 0U, // ZEXT128_32 0U, // ZEXT128_64 0U }; #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'l', 'a', 'a', 9, 0, /* 5 */ 'l', 'a', 9, 0, /* 9 */ 'l', 'e', 'd', 'b', 'r', 'a', 9, 0, /* 17 */ 'f', 'i', 'd', 'b', 'r', 'a', 9, 0, /* 25 */ 'f', 'i', 'e', 'b', 'r', 'a', 9, 0, /* 33 */ 'l', 'd', 'x', 'b', 'r', 'a', 9, 0, /* 41 */ 'l', 'e', 'x', 'b', 'r', 'a', 9, 0, /* 49 */ 'f', 'i', 'x', 'b', 'r', 'a', 9, 0, /* 57 */ 's', 'r', 'a', 9, 0, /* 62 */ 'm', 'a', 'd', 'b', 9, 0, /* 68 */ 'c', 'd', 'b', 9, 0, /* 73 */ 'd', 'd', 'b', 9, 0, /* 78 */ 'm', 'd', 'b', 9, 0, /* 83 */ 's', 'q', 'd', 'b', 9, 0, /* 89 */ 'm', 's', 'd', 'b', 9, 0, /* 95 */ 'l', 'x', 'd', 'b', 9, 0, /* 101 */ 'm', 'x', 'd', 'b', 9, 0, /* 107 */ 'm', 'a', 'e', 'b', 9, 0, /* 113 */ 'c', 'e', 'b', 9, 0, /* 118 */ 'l', 'd', 'e', 'b', 9, 0, /* 124 */ 'm', 'd', 'e', 'b', 9, 0, /* 130 */ 'm', 'e', 'e', 'b', 9, 0, /* 136 */ 's', 'q', 'e', 'b', 9, 0, /* 142 */ 'm', 's', 'e', 'b', 9, 0, /* 148 */ 'l', 'x', 'e', 'b', 9, 0, /* 154 */ 'l', 'g', 'b', 9, 0, /* 159 */ 's', 'l', 'b', 9, 0, /* 164 */ 'l', 'l', 'g', 'c', 9, 0, /* 170 */ 'i', 'c', 9, 0, /* 174 */ 'a', 'l', 'c', 9, 0, /* 179 */ 'c', 'l', 'c', 9, 0, /* 184 */ 'l', 'l', 'c', 9, 0, /* 189 */ 'n', 'c', 9, 0, /* 193 */ 'l', 'o', 'c', 9, 0, /* 198 */ 's', 't', 'o', 'c', 9, 0, /* 204 */ 'b', 'r', 'c', 9, 0, /* 209 */ 's', 't', 'c', 9, 0, /* 214 */ 'm', 'v', 'c', 9, 0, /* 219 */ 'x', 'c', 9, 0, /* 223 */ 'p', 'f', 'd', 9, 0, /* 228 */ 'l', 'd', 9, 0, /* 232 */ 's', 't', 'd', 9, 0, /* 237 */ 'l', 'o', 'c', 'e', 9, 0, /* 243 */ 's', 't', 'o', 'c', 'e', 9, 0, /* 250 */ 'l', 'o', 'c', 'g', 'e', 9, 0, /* 257 */ 's', 't', 'o', 'c', 'g', 'e', 9, 0, /* 265 */ 'j', 'g', 'e', 9, 0, /* 270 */ 'l', 'o', 'c', 'h', 'e', 9, 0, /* 277 */ 's', 't', 'o', 'c', 'h', 'e', 9, 0, /* 285 */ 'l', 'o', 'c', 'g', 'h', 'e', 9, 0, /* 293 */ 's', 't', 'o', 'c', 'g', 'h', 'e', 9, 0, /* 302 */ 'j', 'g', 'h', 'e', 9, 0, /* 308 */ 'c', 'i', 'j', 'h', 'e', 9, 0, /* 315 */ 'c', 'g', 'i', 'j', 'h', 'e', 9, 0, /* 323 */ 'c', 'l', 'g', 'i', 'j', 'h', 'e', 9, 0, /* 332 */ 'c', 'l', 'i', 'j', 'h', 'e', 9, 0, /* 340 */ 'c', 'r', 'j', 'h', 'e', 9, 0, /* 347 */ 'c', 'g', 'r', 'j', 'h', 'e', 9, 0, /* 355 */ 'c', 'l', 'g', 'r', 'j', 'h', 'e', 9, 0, /* 364 */ 'c', 'l', 'r', 'j', 'h', 'e', 9, 0, /* 372 */ 'l', 'o', 'c', 'n', 'h', 'e', 9, 0, /* 380 */ 's', 't', 'o', 'c', 'n', 'h', 'e', 9, 0, /* 389 */ 'l', 'o', 'c', 'g', 'n', 'h', 'e', 9, 0, /* 398 */ 's', 't', 'o', 'c', 'g', 'n', 'h', 'e', 9, 0, /* 408 */ 'j', 'g', 'n', 'h', 'e', 9, 0, /* 415 */ 'c', 'i', 'j', 'n', 'h', 'e', 9, 0, /* 423 */ 'c', 'g', 'i', 'j', 'n', 'h', 'e', 9, 0, /* 432 */ 'c', 'l', 'g', 'i', 'j', 'n', 'h', 'e', 9, 0, /* 442 */ 'c', 'l', 'i', 'j', 'n', 'h', 'e', 9, 0, /* 451 */ 'c', 'r', 'j', 'n', 'h', 'e', 9, 0, /* 459 */ 'c', 'g', 'r', 'j', 'n', 'h', 'e', 9, 0, /* 468 */ 'c', 'l', 'g', 'r', 'j', 'n', 'h', 'e', 9, 0, /* 478 */ 'c', 'l', 'r', 'j', 'n', 'h', 'e', 9, 0, /* 487 */ 'l', 'o', 'c', 'r', 'n', 'h', 'e', 9, 0, /* 496 */ 'l', 'o', 'c', 'g', 'r', 'n', 'h', 'e', 9, 0, /* 506 */ 'l', 'o', 'c', 'r', 'h', 'e', 9, 0, /* 514 */ 'l', 'o', 'c', 'g', 'r', 'h', 'e', 9, 0, /* 523 */ 'c', 'i', 'j', 'e', 9, 0, /* 529 */ 'c', 'g', 'i', 'j', 'e', 9, 0, /* 536 */ 'c', 'l', 'g', 'i', 'j', 'e', 9, 0, /* 544 */ 'c', 'l', 'i', 'j', 'e', 9, 0, /* 551 */ 'c', 'r', 'j', 'e', 9, 0, /* 557 */ 'c', 'g', 'r', 'j', 'e', 9, 0, /* 564 */ 'c', 'l', 'g', 'r', 'j', 'e', 9, 0, /* 572 */ 'c', 'l', 'r', 'j', 'e', 9, 0, /* 579 */ 'l', 'o', 'c', 'l', 'e', 9, 0, /* 586 */ 's', 't', 'o', 'c', 'l', 'e', 9, 0, /* 594 */ 'l', 'o', 'c', 'g', 'l', 'e', 9, 0, /* 602 */ 's', 't', 'o', 'c', 'g', 'l', 'e', 9, 0, /* 611 */ 'j', 'g', 'l', 'e', 9, 0, /* 617 */ 'c', 'i', 'j', 'l', 'e', 9, 0, /* 624 */ 'c', 'g', 'i', 'j', 'l', 'e', 9, 0, /* 632 */ 'c', 'l', 'g', 'i', 'j', 'l', 'e', 9, 0, /* 641 */ 'c', 'l', 'i', 'j', 'l', 'e', 9, 0, /* 649 */ 'c', 'r', 'j', 'l', 'e', 9, 0, /* 656 */ 'c', 'g', 'r', 'j', 'l', 'e', 9, 0, /* 664 */ 'c', 'l', 'g', 'r', 'j', 'l', 'e', 9, 0, /* 673 */ 'c', 'l', 'r', 'j', 'l', 'e', 9, 0, /* 681 */ 'l', 'o', 'c', 'n', 'l', 'e', 9, 0, /* 689 */ 's', 't', 'o', 'c', 'n', 'l', 'e', 9, 0, /* 698 */ 'l', 'o', 'c', 'g', 'n', 'l', 'e', 9, 0, /* 707 */ 's', 't', 'o', 'c', 'g', 'n', 'l', 'e', 9, 0, /* 717 */ 'j', 'g', 'n', 'l', 'e', 9, 0, /* 724 */ 'c', 'i', 'j', 'n', 'l', 'e', 9, 0, /* 732 */ 'c', 'g', 'i', 'j', 'n', 'l', 'e', 9, 0, /* 741 */ 'c', 'l', 'g', 'i', 'j', 'n', 'l', 'e', 9, 0, /* 751 */ 'c', 'l', 'i', 'j', 'n', 'l', 'e', 9, 0, /* 760 */ 'c', 'r', 'j', 'n', 'l', 'e', 9, 0, /* 768 */ 'c', 'g', 'r', 'j', 'n', 'l', 'e', 9, 0, /* 777 */ 'c', 'l', 'g', 'r', 'j', 'n', 'l', 'e', 9, 0, /* 787 */ 'c', 'l', 'r', 'j', 'n', 'l', 'e', 9, 0, /* 796 */ 'l', 'o', 'c', 'r', 'n', 'l', 'e', 9, 0, /* 805 */ 'l', 'o', 'c', 'g', 'r', 'n', 'l', 'e', 9, 0, /* 815 */ 'l', 'o', 'c', 'r', 'l', 'e', 9, 0, /* 823 */ 'l', 'o', 'c', 'g', 'r', 'l', 'e', 9, 0, /* 832 */ 'l', 'o', 'c', 'n', 'e', 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0, /* 1173 */ 'l', 'a', 'a', 'l', 'g', 9, 0, /* 1180 */ 'r', 'i', 's', 'b', 'l', 'g', 9, 0, /* 1188 */ 'c', 'l', 'g', 9, 0, /* 1193 */ 'd', 'l', 'g', 9, 0, /* 1198 */ 'r', 'l', 'l', 'g', 9, 0, /* 1204 */ 's', 'l', 'l', 'g', 9, 0, /* 1210 */ 'm', 'l', 'g', 9, 0, /* 1215 */ 's', 'r', 'l', 'g', 9, 0, /* 1221 */ 's', 'l', 'g', 9, 0, /* 1226 */ 'l', 'm', 'g', 9, 0, /* 1231 */ 's', 't', 'm', 'g', 9, 0, /* 1237 */ 'l', 'a', 'n', 'g', 9, 0, /* 1243 */ 'l', 'a', 'o', 'g', 9, 0, /* 1249 */ 'c', 's', 'g', 9, 0, /* 1254 */ 'd', 's', 'g', 9, 0, /* 1259 */ 'm', 's', 'g', 9, 0, /* 1264 */ 'b', 'r', 'c', 't', 'g', 9, 0, /* 1271 */ 'l', 't', 'g', 9, 0, /* 1276 */ 's', 't', 'g', 9, 0, /* 1281 */ 'l', 'r', 'v', 'g', 9, 0, /* 1287 */ 's', 't', 'r', 'v', 'g', 9, 0, /* 1294 */ 'l', 'a', 'x', 'g', 9, 0, /* 1300 */ 'a', 'h', 9, 0, /* 1304 */ 'l', 'b', 'h', 9, 0, /* 1309 */ 'l', 'l', 'c', 'h', 9, 0, /* 1315 */ 'l', 'o', 'c', 'h', 9, 0, /* 1321 */ 's', 't', 'o', 'c', 'h', 9, 0, /* 1328 */ 's', 't', 'c', 'h', 9, 0, /* 1334 */ 'l', 'f', 'h', 9, 0, /* 1339 */ 's', 't', 'f', 'h', 9, 0, /* 1345 */ 'l', 'o', 'c', 'g', 'h', 9, 0, /* 1352 */ 's', 't', 'o', 'c', 'g', 'h', 9, 0, /* 1360 */ 'j', 'g', 'h', 9, 0, /* 1365 */ 'l', 'l', 'g', 'h', 9, 0, /* 1371 */ 'i', 'i', 'h', 'h', 9, 0, /* 1377 */ 'l', 'l', 'i', 'h', 'h', 9, 0, /* 1384 */ 'n', 'i', 'h', 'h', 9, 0, /* 1390 */ 'o', 'i', 'h', 'h', 9, 0, /* 1396 */ 'l', 'l', 'h', 'h', 9, 0, /* 1402 */ 't', 'm', 'h', 'h', 9, 0, /* 1408 */ 's', 't', 'h', 'h', 9, 0, /* 1414 */ 'a', 'i', 'h', 9, 0, /* 1419 */ 'c', 'i', 'h', 9, 0, /* 1424 */ 'c', 'l', 'i', 'h', 9, 0, /* 1430 */ 'c', 'i', 'j', 'h', 9, 0, /* 1436 */ 'c', 'g', 'i', 'j', 'h', 9, 0, /* 1443 */ 'c', 'l', 'g', 'i', 'j', 'h', 9, 0, /* 1451 */ 'c', 'l', 'i', 'j', 'h', 9, 0, /* 1458 */ 'c', 'r', 'j', 'h', 9, 0, /* 1464 */ 'c', 'g', 'r', 'j', 'h', 9, 0, /* 1471 */ 'c', 'l', 'g', 'r', 'j', 'h', 9, 0, /* 1479 */ 'c', 'l', 'r', 'j', 'h', 9, 0, /* 1486 */ 'l', 'o', 'c', 'l', 'h', 9, 0, /* 1493 */ 's', 't', 'o', 'c', 'l', 'h', 9, 0, /* 1501 */ 'l', 'o', 'c', 'g', 'l', 'h', 9, 0, /* 1509 */ 's', 't', 'o', 'c', 'g', 'l', 'h', 9, 0, /* 1518 */ 'j', 'g', 'l', 'h', 9, 0, /* 1524 */ 'i', 'i', 'l', 'h', 9, 0, /* 1530 */ 'l', 'l', 'i', 'l', 'h', 9, 0, /* 1537 */ 'n', 'i', 'l', 'h', 9, 0, /* 1543 */ 'o', 'i', 'l', 'h', 9, 0, /* 1549 */ 'c', 'i', 'j', 'l', 'h', 9, 0, /* 1556 */ 'c', 'g', 'i', 'j', 'l', 'h', 9, 0, /* 1564 */ 'c', 'l', 'g', 'i', 'j', 'l', 'h', 9, 0, /* 1573 */ 'c', 'l', 'i', 'j', 'l', 'h', 9, 0, /* 1581 */ 'c', 'r', 'j', 'l', 'h', 9, 0, /* 1588 */ 'c', 'g', 'r', 'j', 'l', 'h', 9, 0, /* 1596 */ 'c', 'l', 'g', 'r', 'j', 'l', 'h', 9, 0, /* 1605 */ 'c', 'l', 'r', 'j', 'l', 'h', 9, 0, /* 1613 */ 'l', 'l', 'h', 9, 0, /* 1618 */ 't', 'm', 'l', 'h', 9, 0, /* 1624 */ 'l', 'o', 'c', 'n', 'l', 'h', 9, 0, /* 1632 */ 's', 't', 'o', 'c', 'n', 'l', 'h', 9, 0, /* 1641 */ 'l', 'o', 'c', 'g', 'n', 'l', 'h', 9, 0, /* 1650 */ 's', 't', 'o', 'c', 'g', 'n', 'l', 'h', 9, 0, /* 1660 */ 'j', 'g', 'n', 'l', 'h', 9, 0, /* 1667 */ 'c', 'i', 'j', 'n', 'l', 'h', 9, 0, /* 1675 */ 'c', 'g', 'i', 'j', 'n', 'l', 'h', 9, 0, /* 1684 */ 'c', 'l', 'g', 'i', 'j', 'n', 'l', 'h', 9, 0, /* 1694 */ 'c', 'l', 'i', 'j', 'n', 'l', 'h', 9, 0, /* 1703 */ 'c', 'r', 'j', 'n', 'l', 'h', 9, 0, /* 1711 */ 'c', 'g', 'r', 'j', 'n', 'l', 'h', 9, 0, /* 1720 */ 'c', 'l', 'g', 'r', 'j', 'n', 'l', 'h', 9, 0, /* 1730 */ 'c', 'l', 'r', 'j', 'n', 'l', 'h', 9, 0, /* 1739 */ 'l', 'o', 'c', 'r', 'n', 'l', 'h', 9, 0, /* 1748 */ 'l', 'o', 'c', 'g', 'r', 'n', 'l', 'h', 9, 0, /* 1758 */ 'l', 'o', 'c', 'r', 'l', 'h', 9, 0, /* 1766 */ 'l', 'o', 'c', 'g', 'r', 'l', 'h', 9, 0, /* 1775 */ 'm', 'h', 9, 0, /* 1779 */ 'l', 'o', 'c', 'n', 'h', 9, 0, /* 1786 */ 's', 't', 'o', 'c', 'n', 'h', 9, 0, /* 1794 */ 'l', 'o', 'c', 'g', 'n', 'h', 9, 0, /* 1802 */ 's', 't', 'o', 'c', 'g', 'n', 'h', 9, 0, /* 1811 */ 'j', 'g', 'n', 'h', 9, 0, /* 1817 */ 'c', 'i', 'j', 'n', 'h', 9, 0, /* 1824 */ 'c', 'g', 'i', 'j', 'n', 'h', 9, 0, /* 1832 */ 'c', 'l', 'g', 'i', 'j', 'n', 'h', 9, 0, /* 1841 */ 'c', 'l', 'i', 'j', 'n', 'h', 9, 0, /* 1849 */ 'c', 'r', 'j', 'n', 'h', 9, 0, /* 1856 */ 'c', 'g', 'r', 'j', 'n', 'h', 9, 0, /* 1864 */ 'c', 'l', 'g', 'r', 'j', 'n', 'h', 9, 0, /* 1873 */ 'c', 'l', 'r', 'j', 'n', 'h', 9, 0, /* 1881 */ 'l', 'o', 'c', 'r', 'n', 'h', 9, 0, /* 1889 */ 'l', 'o', 'c', 'g', 'r', 'n', 'h', 9, 0, /* 1898 */ 'l', 'o', 'c', 'r', 'h', 9, 0, /* 1905 */ 'l', 'o', 'c', 'g', 'r', 'h', 9, 0, /* 1913 */ 's', 'h', 9, 0, /* 1917 */ 's', 't', 'h', 9, 0, /* 1922 */ 'a', 'f', 'i', 9, 0, /* 1927 */ 'c', 'f', 'i', 9, 0, /* 1932 */ 'a', 'g', 'f', 'i', 9, 0, /* 1938 */ 'c', 'g', 'f', 'i', 9, 0, /* 1944 */ 'a', 'l', 'g', 'f', 'i', 9, 0, /* 1951 */ 'c', 'l', 'g', 'f', 'i', 9, 0, /* 1958 */ 's', 'l', 'g', 'f', 'i', 9, 0, /* 1965 */ 'm', 's', 'g', 'f', 'i', 9, 0, /* 1972 */ 'a', 'l', 'f', 'i', 9, 0, /* 1978 */ 'c', 'l', 'f', 'i', 9, 0, /* 1984 */ 's', 'l', 'f', 'i', 9, 0, /* 1990 */ 'm', 's', 'f', 'i', 9, 0, /* 1996 */ 'a', 'h', 'i', 9, 0, /* 2001 */ 'c', 'h', 'i', 9, 0, /* 2006 */ 'a', 'g', 'h', 'i', 9, 0, /* 2012 */ 'c', 'g', 'h', 'i', 9, 0, /* 2018 */ 'l', 'g', 'h', 'i', 9, 0, /* 2024 */ 'm', 'g', 'h', 'i', 9, 0, /* 2030 */ 'm', 'v', 'g', 'h', 'i', 9, 0, /* 2037 */ 'm', 'v', 'h', 'h', 'i', 9, 0, /* 2044 */ 'l', 'h', 'i', 9, 0, /* 2049 */ 'm', 'h', 'i', 9, 0, /* 2054 */ 'm', 'v', 'h', 'i', 9, 0, /* 2060 */ 'c', 'l', 'i', 9, 0, /* 2065 */ 'n', 'i', 9, 0, /* 2069 */ 'o', 'i', 9, 0, /* 2073 */ 'a', 's', 'i', 9, 0, /* 2078 */ 'a', 'g', 's', 'i', 9, 0, /* 2084 */ 'c', 'h', 's', 'i', 9, 0, /* 2090 */ 'c', 'l', 'f', 'h', 's', 'i', 9, 0, /* 2098 */ 'c', 'g', 'h', 's', 'i', 9, 0, /* 2105 */ 'c', 'l', 'g', 'h', 's', 'i', 9, 0, /* 2113 */ 'c', 'h', 'h', 's', 'i', 9, 0, /* 2120 */ 'c', 'l', 'h', 'h', 's', 'i', 9, 0, /* 2128 */ 'm', 'v', 'i', 9, 0, /* 2133 */ 'x', 'i', 9, 0, /* 2137 */ 'c', 'i', 'j', 9, 0, /* 2142 */ 'c', 'g', 'i', 'j', 9, 0, /* 2148 */ 'c', 'l', 'g', 'i', 'j', 9, 0, /* 2155 */ 'c', 'l', 'i', 'j', 9, 0, /* 2161 */ 'c', 'r', 'j', 9, 0, /* 2166 */ 'c', 'g', 'r', 'j', 9, 0, /* 2172 */ 'c', 'l', 'g', 'r', 'j', 9, 0, /* 2179 */ 'c', 'l', 'r', 'j', 9, 0, /* 2185 */ 's', 'r', 'a', 'k', 9, 0, /* 2191 */ 'a', 'h', 'i', 'k', 9, 0, /* 2197 */ 'a', 'g', 'h', 'i', 'k', 9, 0, /* 2204 */ 'a', 'l', 'g', 'h', 's', 'i', 'k', 9, 0, /* 2213 */ 'a', 'l', 'h', 's', 'i', 'k', 9, 0, /* 2221 */ 's', 'l', 'l', 'k', 9, 0, /* 2227 */ 's', 'r', 'l', 'k', 9, 0, /* 2233 */ 'a', 'r', 'k', 9, 0, /* 2238 */ 'a', 'g', 'r', 'k', 9, 0, /* 2244 */ 'a', 'l', 'g', 'r', 'k', 9, 0, /* 2251 */ 's', 'l', 'g', 'r', 'k', 9, 0, /* 2258 */ 'n', 'g', 'r', 'k', 9, 0, /* 2264 */ 'o', 'g', 'r', 'k', 9, 0, /* 2270 */ 's', 'g', 'r', 'k', 9, 0, /* 2276 */ 'x', 'g', 'r', 'k', 9, 0, /* 2282 */ 'a', 'l', 'r', 'k', 9, 0, /* 2288 */ 's', 'l', 'r', 'k', 9, 0, /* 2294 */ 'n', 'r', 'k', 9, 0, /* 2299 */ 'o', 'r', 'k', 9, 0, /* 2304 */ 's', 'r', 'k', 9, 0, /* 2309 */ 'x', 'r', 'k', 9, 0, /* 2314 */ 'l', 'a', 'a', 'l', 9, 0, /* 2320 */ 'l', 'o', 'c', 'l', 9, 0, /* 2326 */ 's', 't', 'o', 'c', 'l', 9, 0, /* 2333 */ 'b', 'r', 'c', 'l', 9, 0, /* 2339 */ 'd', 'l', 9, 0, /* 2343 */ 'l', 'o', 'c', 'g', 'l', 9, 0, /* 2350 */ 's', 't', 'o', 'c', 'g', 'l', 9, 0, /* 2358 */ 'j', 'g', 'l', 9, 0, /* 2363 */ 'i', 'i', 'h', 'l', 9, 0, /* 2369 */ 'l', 'l', 'i', 'h', 'l', 9, 0, /* 2376 */ 'n', 'i', 'h', 'l', 9, 0, /* 2382 */ 'o', 'i', 'h', 'l', 9, 0, /* 2388 */ 't', 'm', 'h', 'l', 9, 0, /* 2394 */ 'c', 'i', 'j', 'l', 9, 0, /* 2400 */ 'c', 'g', 'i', 'j', 'l', 9, 0, /* 2407 */ 'c', 'l', 'g', 'i', 'j', 'l', 9, 0, /* 2415 */ 'c', 'l', 'i', 'j', 'l', 9, 0, /* 2422 */ 'c', 'r', 'j', 'l', 9, 0, /* 2428 */ 'c', 'g', 'r', 'j', 'l', 9, 0, /* 2435 */ 'c', 'l', 'g', 'r', 'j', 'l', 9, 0, /* 2443 */ 'c', 'l', 'r', 'j', 'l', 9, 0, /* 2450 */ 'i', 'i', 'l', 'l', 9, 0, /* 2456 */ 'l', 'l', 'i', 'l', 'l', 9, 0, /* 2463 */ 'n', 'i', 'l', 'l', 9, 0, /* 2469 */ 'o', 'i', 'l', 'l', 9, 0, /* 2475 */ 't', 'm', 'l', 'l', 9, 0, /* 2481 */ 'r', 'l', 'l', 9, 0, /* 2486 */ 's', 'l', 'l', 9, 0, /* 2491 */ 'l', 'o', 'c', 'n', 'l', 9, 0, /* 2498 */ 's', 't', 'o', 'c', 'n', 'l', 9, 0, /* 2506 */ 'l', 'o', 'c', 'g', 'n', 'l', 9, 0, /* 2514 */ 's', 't', 'o', 'c', 'g', 'n', 'l', 9, 0, /* 2523 */ 'j', 'g', 'n', 'l', 9, 0, /* 2529 */ 'c', 'i', 'j', 'n', 'l', 9, 0, /* 2536 */ 'c', 'g', 'i', 'j', 'n', 'l', 9, 0, /* 2544 */ 'c', 'l', 'g', 'i', 'j', 'n', 'l', 9, 0, /* 2553 */ 'c', 'l', 'i', 'j', 'n', 'l', 9, 0, /* 2561 */ 'c', 'r', 'j', 'n', 'l', 9, 0, /* 2568 */ 'c', 'g', 'r', 'j', 'n', 'l', 9, 0, /* 2576 */ 'c', 'l', 'g', 'r', 'j', 'n', 'l', 9, 0, /* 2585 */ 'c', 'l', 'r', 'j', 'n', 'l', 9, 0, /* 2593 */ 'l', 'o', 'c', 'r', 'n', 'l', 9, 0, /* 2601 */ 'l', 'o', 'c', 'g', 'r', 'n', 'l', 9, 0, /* 2610 */ 'l', 'a', 'r', 'l', 9, 0, /* 2616 */ 'l', 'o', 'c', 'r', 'l', 9, 0, /* 2623 */ 'p', 'f', 'd', 'r', 'l', 9, 0, /* 2630 */ 'c', 'g', 'f', 'r', 'l', 9, 0, /* 2637 */ 'c', 'l', 'g', 'f', 'r', 'l', 9, 0, /* 2645 */ 'l', 'l', 'g', 'f', 'r', 'l', 9, 0, /* 2653 */ 'l', 'o', 'c', 'g', 'r', 'l', 9, 0, /* 2661 */ 'c', 'l', 'g', 'r', 'l', 9, 0, /* 2668 */ 's', 't', 'g', 'r', 'l', 9, 0, /* 2675 */ 'c', 'h', 'r', 'l', 9, 0, /* 2681 */ 'c', 'g', 'h', 'r', 'l', 9, 0, /* 2688 */ 'c', 'l', 'g', 'h', 'r', 'l', 9, 0, /* 2696 */ 'l', 'l', 'g', 'h', 'r', 'l', 9, 0, /* 2704 */ 'c', 'l', 'h', 'r', 'l', 9, 0, /* 2711 */ 'l', 'l', 'h', 'r', 'l', 9, 0, /* 2718 */ 's', 't', 'h', 'r', 'l', 9, 0, /* 2725 */ 'c', 'l', 'r', 'l', 9, 0, /* 2731 */ 's', 'r', 'l', 9, 0, /* 2736 */ 's', 't', 'r', 'l', 9, 0, /* 2742 */ 'b', 'r', 'a', 's', 'l', 9, 0, /* 2749 */ 'i', 'p', 'm', 9, 0, /* 2754 */ 't', 'm', 9, 0, /* 2758 */ 'l', 'a', 'n', 9, 0, /* 2763 */ 'l', 'a', 'o', 9, 0, /* 2768 */ 'l', 'o', 'c', 'o', 9, 0, /* 2774 */ 's', 't', 'o', 'c', 'o', 9, 0, /* 2781 */ 'l', 'o', 'c', 'g', 'o', 9, 0, /* 2788 */ 's', 't', 'o', 'c', 'g', 'o', 9, 0, /* 2796 */ 'j', 'g', 'o', 9, 0, /* 2801 */ 'j', 'o', 9, 0, /* 2805 */ 'l', 'o', 'c', 'n', 'o', 9, 0, /* 2812 */ 's', 't', 'o', 'c', 'n', 'o', 9, 0, /* 2820 */ 'l', 'o', 'c', 'g', 'n', 'o', 9, 0, /* 2828 */ 's', 't', 'o', 'c', 'g', 'n', 'o', 9, 0, /* 2837 */ 'j', 'g', 'n', 'o', 9, 0, /* 2843 */ 'j', 'n', 'o', 9, 0, /* 2848 */ 'l', 'o', 'c', 'r', 'n', 'o', 9, 0, /* 2856 */ 'l', 'o', 'c', 'g', 'r', 'n', 'o', 9, 0, /* 2865 */ 'l', 'o', 'c', 'r', 'o', 9, 0, /* 2872 */ 'l', 'o', 'c', 'g', 'r', 'o', 9, 0, /* 2880 */ 'e', 'a', 'r', 9, 0, /* 2885 */ 'm', 'a', 'd', 'b', 'r', 9, 0, /* 2892 */ 'l', 'c', 'd', 'b', 'r', 9, 0, /* 2899 */ 'd', 'd', 'b', 'r', 9, 0, /* 2905 */ 'l', 'e', 'd', 'b', 'r', 9, 0, /* 2912 */ 'c', 'f', 'd', 'b', 'r', 9, 0, /* 2919 */ 'c', 'l', 'f', 'd', 'b', 'r', 9, 0, /* 2927 */ 'c', 'g', 'd', 'b', 'r', 9, 0, /* 2934 */ 'c', 'l', 'g', 'd', 'b', 'r', 9, 0, /* 2942 */ 'f', 'i', 'd', 'b', 'r', 9, 0, /* 2949 */ 'm', 'd', 'b', 'r', 9, 0, /* 2955 */ 'l', 'n', 'd', 'b', 'r', 9, 0, /* 2962 */ 'l', 'p', 'd', 'b', 'r', 9, 0, /* 2969 */ 's', 'q', 'd', 'b', 'r', 9, 0, /* 2976 */ 'm', 's', 'd', 'b', 'r', 9, 0, /* 2983 */ 'l', 't', 'd', 'b', 'r', 9, 0, /* 2990 */ 'l', 'x', 'd', 'b', 'r', 9, 0, /* 2997 */ 'm', 'x', 'd', 'b', 'r', 9, 0, /* 3004 */ 'm', 'a', 'e', 'b', 'r', 9, 0, /* 3011 */ 'l', 'c', 'e', 'b', 'r', 9, 0, /* 3018 */ 'l', 'd', 'e', 'b', 'r', 9, 0, /* 3025 */ 'm', 'd', 'e', 'b', 'r', 9, 0, /* 3032 */ 'm', 'e', 'e', 'b', 'r', 9, 0, /* 3039 */ 'c', 'f', 'e', 'b', 'r', 9, 0, /* 3046 */ 'c', 'l', 'f', 'e', 'b', 'r', 9, 0, /* 3054 */ 'c', 'g', 'e', 'b', 'r', 9, 0, /* 3061 */ 'c', 'l', 'g', 'e', 'b', 'r', 9, 0, /* 3069 */ 'f', 'i', 'e', 'b', 'r', 9, 0, /* 3076 */ 'l', 'n', 'e', 'b', 'r', 9, 0, /* 3083 */ 'l', 'p', 'e', 'b', 'r', 9, 0, /* 3090 */ 's', 'q', 'e', 'b', 'r', 9, 0, /* 3097 */ 'm', 's', 'e', 'b', 'r', 9, 0, /* 3104 */ 'l', 't', 'e', 'b', 'r', 9, 0, /* 3111 */ 'l', 'x', 'e', 'b', 'r', 9, 0, /* 3118 */ 'c', 'd', 'f', 'b', 'r', 9, 0, /* 3125 */ 'c', 'e', 'f', 'b', 'r', 9, 0, /* 3132 */ 'c', 'd', 'l', 'f', 'b', 'r', 9, 0, /* 3140 */ 'c', 'e', 'l', 'f', 'b', 'r', 9, 0, /* 3148 */ 'c', 'x', 'l', 'f', 'b', 'r', 9, 0, /* 3156 */ 'c', 'x', 'f', 'b', 'r', 9, 0, /* 3163 */ 'c', 'd', 'g', 'b', 'r', 9, 0, /* 3170 */ 'c', 'e', 'g', 'b', 'r', 9, 0, /* 3177 */ 'c', 'd', 'l', 'g', 'b', 'r', 9, 0, /* 3185 */ 'c', 'e', 'l', 'g', 'b', 'r', 9, 0, /* 3193 */ 'c', 'x', 'l', 'g', 'b', 'r', 9, 0, /* 3201 */ 'c', 'x', 'g', 'b', 'r', 9, 0, /* 3208 */ 's', 'l', 'b', 'r', 9, 0, /* 3214 */ 'a', 'x', 'b', 'r', 9, 0, /* 3220 */ 'l', 'c', 'x', 'b', 'r', 9, 0, /* 3227 */ 'l', 'd', 'x', 'b', 'r', 9, 0, /* 3234 */ 'l', 'e', 'x', 'b', 'r', 9, 0, /* 3241 */ 'c', 'f', 'x', 'b', 'r', 9, 0, /* 3248 */ 'c', 'l', 'f', 'x', 'b', 'r', 9, 0, /* 3256 */ 'c', 'g', 'x', 'b', 'r', 9, 0, /* 3263 */ 'c', 'l', 'g', 'x', 'b', 'r', 9, 0, /* 3271 */ 'f', 'i', 'x', 'b', 'r', 9, 0, /* 3278 */ 'm', 'x', 'b', 'r', 9, 0, /* 3284 */ 'l', 'n', 'x', 'b', 'r', 9, 0, /* 3291 */ 'l', 'p', 'x', 'b', 'r', 9, 0, /* 3298 */ 's', 'q', 'x', 'b', 'r', 9, 0, /* 3305 */ 's', 'x', 'b', 'r', 9, 0, /* 3311 */ 'l', 't', 'x', 'b', 'r', 9, 0, /* 3318 */ 'b', 'c', 'r', 9, 0, /* 3323 */ 'l', 'l', 'g', 'c', 'r', 9, 0, /* 3330 */ 'a', 'l', 'c', 'r', 9, 0, /* 3336 */ 'l', 'l', 'c', 'r', 9, 0, /* 3342 */ 'l', 'o', 'c', 'r', 9, 0, /* 3348 */ 'l', 'g', 'd', 'r', 9, 0, /* 3354 */ 'l', 'd', 'r', 9, 0, /* 3359 */ 'c', 'p', 's', 'd', 'r', 9, 0, /* 3366 */ 'l', 'z', 'd', 'r', 9, 0, /* 3372 */ 'b', 'e', 'r', 9, 0, /* 3377 */ 'b', 'h', 'e', 'r', 9, 0, /* 3383 */ 'b', 'n', 'h', 'e', 'r', 9, 0, /* 3390 */ 'b', 'l', 'e', 'r', 9, 0, /* 3396 */ 'b', 'n', 'l', 'e', 'r', 9, 0, /* 3403 */ 'b', 'n', 'e', 'r', 9, 0, /* 3409 */ 'l', 'z', 'e', 'r', 9, 0, /* 3415 */ 'a', 'g', 'f', 'r', 9, 0, /* 3421 */ 'l', 'c', 'g', 'f', 'r', 9, 0, /* 3428 */ 'a', 'l', 'g', 'f', 'r', 9, 0, /* 3435 */ 'c', 'l', 'g', 'f', 'r', 9, 0, /* 3442 */ 'l', 'l', 'g', 'f', 'r', 9, 0, /* 3449 */ 's', 'l', 'g', 'f', 'r', 9, 0, /* 3456 */ 'l', 'n', 'g', 'f', 'r', 9, 0, /* 3463 */ 'l', 'p', 'g', 'f', 'r', 9, 0, /* 3470 */ 'd', 's', 'g', 'f', 'r', 9, 0, /* 3477 */ 'm', 's', 'g', 'f', 'r', 9, 0, /* 3484 */ 'l', 't', 'g', 'f', 'r', 9, 0, /* 3491 */ 'a', 'g', 'r', 9, 0, /* 3496 */ 's', 'l', 'b', 'g', 'r', 9, 0, /* 3503 */ 'a', 'l', 'c', 'g', 'r', 9, 0, /* 3510 */ 'l', 'o', 'c', 'g', 'r', 9, 0, /* 3517 */ 'l', 'd', 'g', 'r', 9, 0, /* 3523 */ 'a', 'l', 'g', 'r', 9, 0, /* 3529 */ 'c', 'l', 'g', 'r', 9, 0, /* 3535 */ 'd', 'l', 'g', 'r', 9, 0, /* 3541 */ 'm', 'l', 'g', 'r', 9, 0, /* 3547 */ 's', 'l', 'g', 'r', 9, 0, /* 3553 */ 'l', 'n', 'g', 'r', 9, 0, /* 3559 */ 'f', 'l', 'o', 'g', 'r', 9, 0, /* 3566 */ 'l', 'p', 'g', 'r', 9, 0, /* 3572 */ 'd', 's', 'g', 'r', 9, 0, /* 3578 */ 'm', 's', 'g', 'r', 9, 0, /* 3584 */ 'l', 't', 'g', 'r', 9, 0, /* 3590 */ 'l', 'r', 'v', 'g', 'r', 9, 0, /* 3597 */ 'x', 'g', 'r', 9, 0, /* 3602 */ 'b', 'h', 'r', 9, 0, /* 3607 */ 'l', 'l', 'g', 'h', 'r', 9, 0, /* 3614 */ 'b', 'l', 'h', 'r', 9, 0, /* 3620 */ 'l', 'l', 'h', 'r', 9, 0, /* 3626 */ 'b', 'n', 'l', 'h', 'r', 9, 0, /* 3633 */ 'b', 'n', 'h', 'r', 9, 0, /* 3639 */ 'a', 'l', 'r', 9, 0, /* 3644 */ 'b', 'l', 'r', 9, 0, /* 3649 */ 'c', 'l', 'r', 9, 0, /* 3654 */ 'd', 'l', 'r', 9, 0, /* 3659 */ 'b', 'n', 'l', 'r', 9, 0, /* 3665 */ 's', 'l', 'r', 9, 0, /* 3670 */ 'l', 'n', 'r', 9, 0, /* 3675 */ 'b', 'o', 'r', 9, 0, /* 3680 */ 'b', 'n', 'o', 'r', 9, 0, /* 3686 */ 'l', 'p', 'r', 9, 0, /* 3691 */ 'b', 'a', 's', 'r', 9, 0, /* 3697 */ 'm', 's', 'r', 9, 0, /* 3702 */ 'l', 't', 'r', 9, 0, /* 3707 */ 'l', 'r', 'v', 'r', 9, 0, /* 3713 */ 'l', 'x', 'r', 9, 0, /* 3718 */ 'l', 'z', 'x', 'r', 9, 0, /* 3724 */ 'b', 'r', 'a', 's', 9, 0, /* 3730 */ 'c', 's', 9, 0, /* 3734 */ 'm', 's', 9, 0, /* 3738 */ 'b', 'r', 'c', 't', 9, 0, /* 3744 */ 'l', 't', 9, 0, /* 3748 */ 'c', 'l', 's', 't', 9, 0, /* 3754 */ 's', 'r', 's', 't', 9, 0, /* 3760 */ 'm', 'v', 's', 't', 9, 0, /* 3766 */ 'l', 'r', 'v', 9, 0, /* 3771 */ 's', 't', 'r', 'v', 9, 0, /* 3777 */ 'l', 'a', 'x', 9, 0, /* 3782 */ 'l', 'a', 'y', 9, 0, /* 3787 */ 'i', 'c', 'y', 9, 0, /* 3792 */ 's', 't', 'c', 'y', 9, 0, /* 3798 */ 'l', 'd', 'y', 9, 0, /* 3803 */ 's', 't', 'd', 'y', 9, 0, /* 3809 */ 'l', 'e', 'y', 9, 0, /* 3814 */ 's', 't', 'e', 'y', 9, 0, /* 3820 */ 'a', 'h', 'y', 9, 0, /* 3825 */ 'c', 'h', 'y', 9, 0, /* 3830 */ 'l', 'h', 'y', 9, 0, /* 3835 */ 'm', 'h', 'y', 9, 0, /* 3840 */ 's', 'h', 'y', 9, 0, /* 3845 */ 's', 't', 'h', 'y', 9, 0, /* 3851 */ 'c', 'l', 'i', 'y', 9, 0, /* 3857 */ 'n', 'i', 'y', 9, 0, /* 3862 */ 'o', 'i', 'y', 9, 0, /* 3867 */ 'm', 'v', 'i', 'y', 9, 0, /* 3873 */ 'x', 'i', 'y', 9, 0, /* 3878 */ 'a', 'l', 'y', 9, 0, /* 3883 */ 'c', 'l', 'y', 9, 0, /* 3888 */ 's', 'l', 'y', 9, 0, /* 3893 */ 't', 'm', 'y', 9, 0, /* 3898 */ 'n', 'y', 9, 0, /* 3902 */ 'o', 'y', 9, 0, /* 3906 */ 'c', 's', 'y', 9, 0, /* 3911 */ 'm', 's', 'y', 9, 0, /* 3916 */ 's', 't', 'y', 9, 0, /* 3921 */ 'x', 'y', 9, 0, /* 3925 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 3938 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 3945 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 3955 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 3970 */ 'l', 'o', 'c', 0, /* 3974 */ 's', 't', 'o', 'c', 0, /* 3979 */ 'l', 'o', 'c', 'g', 0, /* 3984 */ 's', 't', 'o', 'c', 'g', 0, /* 3990 */ 'j', 'g', 0, /* 3993 */ 'c', 'i', 'j', 0, /* 3997 */ 'c', 'g', 'i', 'j', 0, /* 4002 */ 'c', 'l', 'g', 'i', 'j', 0, /* 4008 */ 'c', 'l', 'i', 'j', 0, /* 4013 */ 'c', 'r', 'j', 0, /* 4017 */ 'c', 'g', 'r', 'j', 0, /* 4022 */ 'c', 'l', 'g', 'r', 'j', 0, /* 4028 */ 'c', 'l', 'r', 'j', 0, /* 4033 */ 'l', 'o', 'c', 'r', 0, /* 4038 */ 'l', 'o', 'c', 'g', 'r', 0, }; #endif // Emit the opcode for the instruction. uint32_t Bits = OpInfo[MCInst_getOpcode(MI)]; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 4095)-1); #endif // Fragment 0 encoded into 4 bits for 11 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 15); switch ((Bits >> 12) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END return; break; case 1: // A, ADB, ADBR, AEB, AEBR, AFI, AG, AGF, AGFI, AGFR, AGHI, AGHIK, AGR, A... printOperand(MI, 0, O); break; case 2: // AGSI, ASI, CGHSI, CHHSI, CHSI, CLFHSI, CLGHSI, CLHHSI, CLI, CLIY, MVGH... printBDAddrOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 3: // AsmBCR, AsmBRC, AsmBRCL, PFD, PFDRL printU4ImmOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 4: // AsmEJ, AsmEJG, AsmHEJ, AsmHEJG, AsmHJ, AsmHJG, AsmLEJ, AsmLEJG, AsmLHJ... printPCRelOperand(MI, 0, O); return; break; case 5: // BRC, BRCL printCond4Operand(MI, 1, O); SStream_concat0(O, "\t"); printPCRelOperand(MI, 2, O); return; break; case 6: // CGIJ, CGRJ, CIJ, CLGIJ, CLGRJ, CLIJ, CLRJ, CRJ printCond4Operand(MI, 2, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 7: // CLC, MVC, NC, OC, XC printBDLAddrOperand(MI, 0, O); SStream_concat0(O, ", "); printBDAddrOperand(MI, 3, O); return; break; case 8: // LOC, LOCG printCond4Operand(MI, 5, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printBDAddrOperand(MI, 2, O); return; break; case 9: // LOCGR, LOCR printCond4Operand(MI, 3, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 10: // STOC, STOCG printCond4Operand(MI, 4, O); SStream_concat0(O, "\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); printBDAddrOperand(MI, 1, O); return; break; } // Fragment 1 encoded into 4 bits for 11 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 16) & 15); switch ((Bits >> 16) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // A, ADB, ADBR, AEB, AEBR, AFI, AG, AGF, AGFI, AGFR, AGHI, AGHIK, AGR, A... SStream_concat0(O, ", "); break; case 1: // AGSI, ASI printS8ImmOperand(MI, 2, O); return; break; case 2: // AsmBCR, CGRJ, CLGRJ, CLRJ, CRJ printOperand(MI, 1, O); break; case 3: // AsmBRC, AsmBRCL, PFDRL printPCRelOperand(MI, 1, O); return; break; case 4: // AsmEBR, AsmHBR, AsmHEBR, AsmLBR, AsmLEBR, AsmLHBR, AsmNEBR, AsmNHBR, A... return; break; case 5: // CGHSI, CHHSI, CHSI, MVGHI, MVHHI, MVHI printS16ImmOperand(MI, 2, O); return; break; case 6: // CGIJ, CIJ printS8ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printPCRelOperand(MI, 3, O); return; break; case 7: // CLFHSI, CLGHSI, CLHHSI printU16ImmOperand(MI, 2, O); return; break; case 8: // CLGIJ, CLIJ printU8ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printPCRelOperand(MI, 3, O); return; break; case 9: // CLI, CLIY, MVI, MVIY, NI, NIY, OI, OIY, TM, TMY, XI, XIY printU8ImmOperand(MI, 2, O); return; break; case 10: // PFD printBDXAddrOperand(MI, 1, O); return; break; } // Fragment 2 encoded into 5 bits for 23 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 20) & 31); switch ((Bits >> 20) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // A, ADB, AEB, AG, AGF, AH, AHY, AL, ALC, ALCG, ALG, ALGF, ALY, AY, DDB,... printBDXAddrOperand(MI, 2, O); return; break; case 1: // ADBR, AEBR, AGFR, AGR, ALCGR, ALCR, ALGFR, ALGR, ALR, AR, AXBR, AsmELO... printOperand(MI, 2, O); break; case 2: // AFI, AGFI, AIH, MSFI, MSGFI printS32ImmOperand(MI, 2, O); return; break; case 3: // AGHI, AHI, MGHI, MHI printS16ImmOperand(MI, 2, O); return; break; case 4: // AGHIK, AGRK, AHIK, ALGHSIK, ALGRK, ALHSIK, ALRK, ARK, AsmCGRJ, AsmCLGR... printOperand(MI, 1, O); break; case 5: // ALFI, ALGFI, NIHF, NILF, OIHF, OILF, SLFI, SLGFI, XIHF, XILF printU32ImmOperand(MI, 2, O); return; break; case 6: // AsmBCR return; break; case 7: // AsmCGIJ, AsmCIJ, AsmJEAltCGI, AsmJEAltCI, AsmJECGI, AsmJECI, AsmJHAltC... printS8ImmOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 8: // AsmCLGIJ, AsmCLIJ, AsmJEAltCLGI, AsmJEAltCLI, AsmJECLGI, AsmJECLI, Asm... printU8ImmOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 9: // AsmELOC, AsmELOCG, AsmHELOC, AsmHELOCG, AsmHLOC, AsmHLOCG, AsmLELOC, A... printBDAddrOperand(MI, 2, O); break; case 10: // AsmESTOC, AsmESTOCG, AsmHESTOC, AsmHESTOCG, AsmHSTOC, AsmHSTOCG, AsmLE... printBDAddrOperand(MI, 1, O); break; case 11: // BRAS, BRASL printPCRelTLSOperand(MI, 1, O); return; break; case 12: // BRCT, BRCTG printPCRelOperand(MI, 2, O); return; break; case 13: // C, CDB, CEB, CG, CGF, CGH, CH, CHF, CHY, CL, CLG, CLGF, CLHF, CLY, CY,... printBDXAddrOperand(MI, 1, O); return; break; case 14: // CDLFBR, CDLGBR, CELFBR, CELGBR, CFDBR, CFEBR, CFXBR, CGDBR, CGEBR, CGX... printU4ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); break; case 15: // CFI, CGFI, CIH, LGFI printS32ImmOperand(MI, 1, O); return; break; case 16: // CGFRL, CGHRL, CGRL, CHRL, CLGFRL, CLGHRL, CLGRL, CLHRL, CLRL, CRL, LAR... printPCRelOperand(MI, 1, O); return; break; case 17: // CGHI, CHI, LGHI, LHI printS16ImmOperand(MI, 1, O); return; break; case 18: // CGRJ, CLGRJ, CLRJ, CRJ SStream_concat0(O, ", "); printPCRelOperand(MI, 3, O); return; break; case 19: // CLFI, CLGFI, CLIH, IIHF, IILF, LLIHF, LLILF printU32ImmOperand(MI, 1, O); return; break; case 20: // EAR printAccessRegOperand(MI, 1, O); return; break; case 21: // IIHH, IIHL, IILH, IILL, NIHH, NIHL, NILH, NILL, OIHH, OIHL, OILH, OILL printU16ImmOperand(MI, 2, O); return; break; case 22: // LLIHH, LLIHL, LLILH, LLILL, TMHH, TMHL, TMLH, TMLL printU16ImmOperand(MI, 1, O); return; break; } // Fragment 3 encoded into 2 bits for 4 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 25) & 3); switch ((Bits >> 25) & 3) { default: // llvm_unreachable("Invalid command number."); case 0: // ADBR, AEBR, AGFR, AGR, ALCGR, ALCR, ALGFR, ALGR, ALR, AR, AXBR, AsmELO... return; break; case 1: // AGHIK, AGRK, AHIK, ALGHSIK, ALGRK, ALHSIK, ALRK, ARK, AsmCGRJ, AsmCLGR... SStream_concat0(O, ", "); break; case 2: // AsmCGIJ, AsmCIJ, AsmCLGIJ, AsmCLIJ printU4ImmOperand(MI, 2, O); SStream_concat0(O, ", "); printPCRelOperand(MI, 3, O); return; break; case 3: // AsmJEAltCGI, AsmJEAltCI, AsmJEAltCLGI, AsmJEAltCLI, AsmJECGI, AsmJECI,... printPCRelOperand(MI, 2, O); return; break; } // Fragment 4 encoded into 4 bits for 11 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 27) & 15); switch ((Bits >> 27) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // AGHIK, AHIK, ALGHSIK, ALHSIK printS16ImmOperand(MI, 2, O); return; break; case 1: // AGRK, ALGRK, ALRK, ARK, CPSDRdd, CPSDRds, CPSDRsd, CPSDRss, NGRK, NRK,... printOperand(MI, 2, O); return; break; case 2: // AsmCGRJ, AsmCLGRJ, AsmCLRJ, AsmCRJ printU4ImmOperand(MI, 2, O); SStream_concat0(O, ", "); printPCRelOperand(MI, 3, O); return; break; case 3: // AsmJEAltCGR, AsmJEAltCLGR, AsmJEAltCLR, AsmJEAltCR, AsmJECGR, AsmJECLG... printPCRelOperand(MI, 2, O); return; break; case 4: // AsmLOC, AsmLOCG printU4ImmOperand(MI, 4, O); return; break; case 5: // AsmLOCGR, AsmLOCR, AsmSTOC, AsmSTOCG, CDLFBR, CDLGBR, CELFBR, CELGBR, ... printU4ImmOperand(MI, 3, O); return; break; case 6: // CS, CSG, CSY printBDAddrOperand(MI, 3, O); return; break; case 7: // LAA, LAAG, LAAL, LAALG, LAN, LANG, LAO, LAOG, LAX, LAXG, LMG, RLL, RLL... printBDAddrOperand(MI, 2, O); return; break; case 8: // MADB, MAEB, MSDB, MSEB printBDXAddrOperand(MI, 3, O); return; break; case 9: // MADBR, MAEBR, MSDBR, MSEBR printOperand(MI, 3, O); return; break; case 10: // RISBG, RISBG32, RISBHG, RISBLG, RNSBG, ROSBG, RXSBG printU8ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printU8ImmOperand(MI, 4, O); SStream_concat0(O, ", "); printU6ImmOperand(MI, 5, O); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 98 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'f', '1', '0', 0, /* 4 */ 'r', '1', '0', 0, /* 8 */ 'f', '0', 0, /* 11 */ 'r', '0', 0, /* 14 */ 'f', '1', '1', 0, /* 18 */ 'r', '1', '1', 0, /* 22 */ 'f', '1', 0, /* 25 */ 'r', '1', 0, /* 28 */ 'f', '1', '2', 0, /* 32 */ 'r', '1', '2', 0, /* 36 */ 'f', '2', 0, /* 39 */ 'r', '2', 0, /* 42 */ 'f', '1', '3', 0, /* 46 */ 'r', '1', '3', 0, /* 50 */ 'f', '3', 0, /* 53 */ 'r', '3', 0, /* 56 */ 'f', '1', '4', 0, /* 60 */ 'r', '1', '4', 0, /* 64 */ 'f', '4', 0, /* 67 */ 'r', '4', 0, /* 70 */ 'f', '1', '5', 0, /* 74 */ 'r', '1', '5', 0, /* 78 */ 'f', '5', 0, /* 81 */ 'r', '5', 0, /* 84 */ 'f', '6', 0, /* 87 */ 'r', '6', 0, /* 90 */ 'f', '7', 0, /* 93 */ 'r', '7', 0, /* 96 */ 'f', '8', 0, /* 99 */ 'r', '8', 0, /* 102 */ 'f', '9', 0, /* 105 */ 'r', '9', 0, /* 108 */ 'c', 'c', 0, }; static const uint8_t RegAsmOffset[] = { 108, 8, 22, 36, 50, 64, 78, 84, 90, 96, 102, 0, 14, 28, 42, 56, 70, 8, 22, 64, 78, 96, 102, 28, 42, 8, 22, 36, 50, 64, 78, 84, 90, 96, 102, 0, 14, 28, 42, 56, 70, 11, 25, 39, 53, 67, 81, 87, 93, 99, 105, 4, 18, 32, 46, 60, 74, 11, 25, 39, 53, 67, 81, 87, 93, 99, 105, 4, 18, 32, 46, 60, 74, 11, 25, 39, 53, 67, 81, 87, 93, 99, 105, 4, 18, 32, 46, 60, 74, 11, 39, 67, 87, 99, 4, 32, 60, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset); i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc010066400017500001750000005361471363402546700251010ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * SystemZ Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static const uint8_t DecoderTable16[] = { /* 0 */ MCD_OPC_ExtractField, 8, 8, // Inst{15-8} ... /* 3 */ MCD_OPC_FilterValue, 7, 127, 0, // Skip to: 134 /* 7 */ MCD_OPC_ExtractField, 4, 4, // Inst{7-4} ... /* 10 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 18 /* 14 */ MCD_OPC_Decode, 244, 2, 0, // Opcode: AsmOBR /* 18 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 26 /* 22 */ MCD_OPC_Decode, 164, 1, 0, // Opcode: AsmHBR /* 26 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 34 /* 30 */ MCD_OPC_Decode, 209, 2, 0, // Opcode: AsmNLEBR /* 34 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 42 /* 38 */ MCD_OPC_Decode, 150, 2, 0, // Opcode: AsmLBR /* 42 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 50 /* 46 */ MCD_OPC_Decode, 191, 2, 0, // Opcode: AsmNHEBR /* 50 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 58 /* 54 */ MCD_OPC_Decode, 160, 2, 0, // Opcode: AsmLHBR /* 58 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 66 /* 62 */ MCD_OPC_Decode, 181, 2, 0, // Opcode: AsmNEBR /* 66 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 74 /* 70 */ MCD_OPC_Decode, 155, 1, 0, // Opcode: AsmEBR /* 74 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 82 /* 78 */ MCD_OPC_Decode, 218, 2, 0, // Opcode: AsmNLHBR /* 82 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 90 /* 86 */ MCD_OPC_Decode, 165, 1, 0, // Opcode: AsmHEBR /* 90 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 98 /* 94 */ MCD_OPC_Decode, 208, 2, 0, // Opcode: AsmNLBR /* 98 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 106 /* 102 */ MCD_OPC_Decode, 151, 2, 0, // Opcode: AsmLEBR /* 106 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 114 /* 110 */ MCD_OPC_Decode, 190, 2, 0, // Opcode: AsmNHBR /* 114 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 122 /* 118 */ MCD_OPC_Decode, 235, 2, 0, // Opcode: AsmNOBR /* 122 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 130 /* 126 */ MCD_OPC_Decode, 128, 3, 0, // Opcode: BR /* 130 */ MCD_OPC_Decode, 144, 1, 1, // Opcode: AsmBCR /* 134 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 142 /* 138 */ MCD_OPC_Decode, 255, 2, 2, // Opcode: BASR /* 142 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 150 /* 146 */ MCD_OPC_Decode, 145, 5, 3, // Opcode: LPR /* 150 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 158 /* 154 */ MCD_OPC_Decode, 135, 5, 3, // Opcode: LNR /* 158 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 166 /* 162 */ MCD_OPC_Decode, 163, 5, 3, // Opcode: LTR /* 166 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 174 /* 170 */ MCD_OPC_Decode, 192, 4, 3, // Opcode: LCR /* 174 */ MCD_OPC_FilterValue, 20, 4, 0, // Skip to: 182 /* 178 */ MCD_OPC_Decode, 242, 5, 4, // Opcode: NR /* 182 */ MCD_OPC_FilterValue, 21, 4, 0, // Skip to: 190 /* 186 */ MCD_OPC_Decode, 210, 3, 3, // Opcode: CLR /* 190 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 198 /* 194 */ MCD_OPC_Decode, 141, 6, 4, // Opcode: OR /* 198 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 206 /* 202 */ MCD_OPC_Decode, 142, 7, 4, // Opcode: XR /* 206 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 214 /* 210 */ MCD_OPC_Decode, 147, 5, 3, // Opcode: LR /* 214 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 222 /* 218 */ MCD_OPC_Decode, 221, 3, 3, // Opcode: CR /* 222 */ MCD_OPC_FilterValue, 26, 3, 0, // Skip to: 229 /* 226 */ MCD_OPC_Decode, 66, 4, // Opcode: AR /* 229 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 237 /* 233 */ MCD_OPC_Decode, 196, 6, 4, // Opcode: SR /* 237 */ MCD_OPC_FilterValue, 30, 3, 0, // Skip to: 244 /* 241 */ MCD_OPC_Decode, 63, 4, // Opcode: ALR /* 244 */ MCD_OPC_FilterValue, 31, 4, 0, // Skip to: 252 /* 248 */ MCD_OPC_Decode, 188, 6, 4, // Opcode: SLR /* 252 */ MCD_OPC_FilterValue, 40, 4, 0, // Skip to: 260 /* 256 */ MCD_OPC_Decode, 198, 4, 5, // Opcode: LDR /* 260 */ MCD_OPC_FilterValue, 56, 4, 0, // Skip to: 268 /* 264 */ MCD_OPC_Decode, 205, 4, 6, // Opcode: LER /* 268 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTable32[] = { /* 0 */ MCD_OPC_ExtractField, 24, 8, // Inst{31-24} ... /* 3 */ MCD_OPC_FilterValue, 64, 4, 0, // Skip to: 11 /* 7 */ MCD_OPC_Decode, 219, 6, 7, // Opcode: STH /* 11 */ MCD_OPC_FilterValue, 65, 4, 0, // Skip to: 19 /* 15 */ MCD_OPC_Decode, 171, 4, 8, // Opcode: LA /* 19 */ MCD_OPC_FilterValue, 66, 4, 0, // Skip to: 27 /* 23 */ MCD_OPC_Decode, 208, 6, 7, // Opcode: STC /* 27 */ MCD_OPC_FilterValue, 67, 4, 0, // Skip to: 35 /* 31 */ MCD_OPC_Decode, 147, 4, 9, // Opcode: IC /* 35 */ MCD_OPC_FilterValue, 72, 4, 0, // Skip to: 43 /* 39 */ MCD_OPC_Decode, 224, 4, 7, // Opcode: LH /* 43 */ MCD_OPC_FilterValue, 73, 4, 0, // Skip to: 51 /* 47 */ MCD_OPC_Decode, 169, 3, 7, // Opcode: CH /* 51 */ MCD_OPC_FilterValue, 74, 3, 0, // Skip to: 58 /* 55 */ MCD_OPC_Decode, 42, 10, // Opcode: AH /* 58 */ MCD_OPC_FilterValue, 75, 4, 0, // Skip to: 66 /* 62 */ MCD_OPC_Decode, 171, 6, 10, // Opcode: SH /* 66 */ MCD_OPC_FilterValue, 76, 4, 0, // Skip to: 74 /* 70 */ MCD_OPC_Decode, 187, 5, 10, // Opcode: MH /* 74 */ MCD_OPC_FilterValue, 80, 4, 0, // Skip to: 82 /* 78 */ MCD_OPC_Decode, 206, 6, 7, // Opcode: ST /* 82 */ MCD_OPC_FilterValue, 84, 4, 0, // Skip to: 90 /* 86 */ MCD_OPC_Decode, 218, 5, 10, // Opcode: N /* 90 */ MCD_OPC_FilterValue, 85, 4, 0, // Skip to: 98 /* 94 */ MCD_OPC_Decode, 178, 3, 7, // Opcode: CL /* 98 */ MCD_OPC_FilterValue, 86, 4, 0, // Skip to: 106 /* 102 */ MCD_OPC_Decode, 245, 5, 10, // Opcode: O /* 106 */ MCD_OPC_FilterValue, 87, 4, 0, // Skip to: 114 /* 110 */ MCD_OPC_Decode, 128, 7, 10, // Opcode: X /* 114 */ MCD_OPC_FilterValue, 88, 4, 0, // Skip to: 122 /* 118 */ MCD_OPC_Decode, 169, 4, 7, // Opcode: L /* 122 */ MCD_OPC_FilterValue, 89, 4, 0, // Skip to: 130 /* 126 */ MCD_OPC_Decode, 135, 3, 7, // Opcode: C /* 130 */ MCD_OPC_FilterValue, 90, 3, 0, // Skip to: 137 /* 134 */ MCD_OPC_Decode, 22, 10, // Opcode: A /* 137 */ MCD_OPC_FilterValue, 91, 4, 0, // Skip to: 145 /* 141 */ MCD_OPC_Decode, 161, 6, 10, // Opcode: S /* 145 */ MCD_OPC_FilterValue, 94, 3, 0, // Skip to: 152 /* 149 */ MCD_OPC_Decode, 49, 10, // Opcode: AL /* 152 */ MCD_OPC_FilterValue, 95, 4, 0, // Skip to: 160 /* 156 */ MCD_OPC_Decode, 173, 6, 10, // Opcode: SL /* 160 */ MCD_OPC_FilterValue, 96, 4, 0, // Skip to: 168 /* 164 */ MCD_OPC_Decode, 212, 6, 11, // Opcode: STD /* 168 */ MCD_OPC_FilterValue, 104, 4, 0, // Skip to: 176 /* 172 */ MCD_OPC_Decode, 194, 4, 11, // Opcode: LD /* 176 */ MCD_OPC_FilterValue, 112, 4, 0, // Skip to: 184 /* 180 */ MCD_OPC_Decode, 214, 6, 12, // Opcode: STE /* 184 */ MCD_OPC_FilterValue, 113, 4, 0, // Skip to: 192 /* 188 */ MCD_OPC_Decode, 192, 5, 10, // Opcode: MS /* 192 */ MCD_OPC_FilterValue, 120, 4, 0, // Skip to: 200 /* 196 */ MCD_OPC_Decode, 202, 4, 12, // Opcode: LE /* 200 */ MCD_OPC_FilterValue, 136, 1, 10, 0, // Skip to: 215 /* 205 */ MCD_OPC_CheckField, 16, 4, 0, 218, 11, // Skip to: 3245 /* 211 */ MCD_OPC_Decode, 201, 6, 13, // Opcode: SRL /* 215 */ MCD_OPC_FilterValue, 137, 1, 10, 0, // Skip to: 230 /* 220 */ MCD_OPC_CheckField, 16, 4, 0, 203, 11, // Skip to: 3245 /* 226 */ MCD_OPC_Decode, 185, 6, 13, // Opcode: SLL /* 230 */ MCD_OPC_FilterValue, 138, 1, 10, 0, // Skip to: 245 /* 235 */ MCD_OPC_CheckField, 16, 4, 0, 188, 11, // Skip to: 3245 /* 241 */ MCD_OPC_Decode, 197, 6, 13, // Opcode: SRA /* 245 */ MCD_OPC_FilterValue, 145, 1, 4, 0, // Skip to: 254 /* 250 */ MCD_OPC_Decode, 244, 6, 14, // Opcode: TM /* 254 */ MCD_OPC_FilterValue, 146, 1, 4, 0, // Skip to: 263 /* 259 */ MCD_OPC_Decode, 211, 5, 14, // Opcode: MVI /* 263 */ MCD_OPC_FilterValue, 148, 1, 4, 0, // Skip to: 272 /* 268 */ MCD_OPC_Decode, 225, 5, 14, // Opcode: NI /* 272 */ MCD_OPC_FilterValue, 149, 1, 4, 0, // Skip to: 281 /* 277 */ MCD_OPC_Decode, 205, 3, 14, // Opcode: CLI /* 281 */ MCD_OPC_FilterValue, 150, 1, 4, 0, // Skip to: 290 /* 286 */ MCD_OPC_Decode, 252, 5, 14, // Opcode: OI /* 290 */ MCD_OPC_FilterValue, 151, 1, 4, 0, // Skip to: 299 /* 295 */ MCD_OPC_Decode, 135, 7, 14, // Opcode: XI /* 299 */ MCD_OPC_FilterValue, 165, 1, 131, 0, // Skip to: 435 /* 304 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 307 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 315 /* 311 */ MCD_OPC_Decode, 154, 4, 15, // Opcode: IIHH /* 315 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 323 /* 319 */ MCD_OPC_Decode, 156, 4, 15, // Opcode: IIHL /* 323 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 331 /* 327 */ MCD_OPC_Decode, 161, 4, 16, // Opcode: IILH /* 331 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 339 /* 335 */ MCD_OPC_Decode, 163, 4, 16, // Opcode: IILL /* 339 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 347 /* 343 */ MCD_OPC_Decode, 229, 5, 15, // Opcode: NIHH /* 347 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 355 /* 351 */ MCD_OPC_Decode, 231, 5, 15, // Opcode: NIHL /* 355 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 363 /* 359 */ MCD_OPC_Decode, 236, 5, 16, // Opcode: NILH /* 363 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 371 /* 367 */ MCD_OPC_Decode, 238, 5, 16, // Opcode: NILL /* 371 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 379 /* 375 */ MCD_OPC_Decode, 128, 6, 15, // Opcode: OIHH /* 379 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 387 /* 383 */ MCD_OPC_Decode, 130, 6, 15, // Opcode: OIHL /* 387 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 395 /* 391 */ MCD_OPC_Decode, 135, 6, 16, // Opcode: OILH /* 395 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 403 /* 399 */ MCD_OPC_Decode, 137, 6, 16, // Opcode: OILL /* 403 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 411 /* 407 */ MCD_OPC_Decode, 252, 4, 17, // Opcode: LLIHH /* 411 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 419 /* 415 */ MCD_OPC_Decode, 253, 4, 17, // Opcode: LLIHL /* 419 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 427 /* 423 */ MCD_OPC_Decode, 255, 4, 17, // Opcode: LLILH /* 427 */ MCD_OPC_FilterValue, 15, 254, 10, // Skip to: 3245 /* 431 */ MCD_OPC_Decode, 128, 5, 17, // Opcode: LLILL /* 435 */ MCD_OPC_FilterValue, 167, 1, 252, 0, // Skip to: 692 /* 440 */ MCD_OPC_ExtractField, 16, 4, // Inst{19-16} ... /* 443 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 451 /* 447 */ MCD_OPC_Decode, 250, 6, 18, // Opcode: TMLH /* 451 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 459 /* 455 */ MCD_OPC_Decode, 252, 6, 18, // Opcode: TMLL /* 459 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 467 /* 463 */ MCD_OPC_Decode, 245, 6, 19, // Opcode: TMHH /* 467 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 475 /* 471 */ MCD_OPC_Decode, 247, 6, 19, // Opcode: TMHL /* 475 */ MCD_OPC_FilterValue, 4, 127, 0, // Skip to: 606 /* 479 */ MCD_OPC_ExtractField, 20, 4, // Inst{23-20} ... /* 482 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 490 /* 486 */ MCD_OPC_Decode, 245, 2, 20, // Opcode: AsmOJ /* 490 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 498 /* 494 */ MCD_OPC_Decode, 174, 1, 20, // Opcode: AsmHJ /* 498 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 506 /* 502 */ MCD_OPC_Decode, 210, 2, 20, // Opcode: AsmNLEJ /* 506 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 514 /* 510 */ MCD_OPC_Decode, 169, 2, 20, // Opcode: AsmLJ /* 514 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 522 /* 518 */ MCD_OPC_Decode, 192, 2, 20, // Opcode: AsmNHEJ /* 522 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 530 /* 526 */ MCD_OPC_Decode, 161, 2, 20, // Opcode: AsmLHJ /* 530 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 538 /* 534 */ MCD_OPC_Decode, 182, 2, 20, // Opcode: AsmNEJ /* 538 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 546 /* 542 */ MCD_OPC_Decode, 156, 1, 20, // Opcode: AsmEJ /* 546 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 554 /* 550 */ MCD_OPC_Decode, 219, 2, 20, // Opcode: AsmNLHJ /* 554 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 562 /* 558 */ MCD_OPC_Decode, 166, 1, 20, // Opcode: AsmHEJ /* 562 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 570 /* 566 */ MCD_OPC_Decode, 227, 2, 20, // Opcode: AsmNLJ /* 570 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 578 /* 574 */ MCD_OPC_Decode, 152, 2, 20, // Opcode: AsmLEJ /* 578 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 586 /* 582 */ MCD_OPC_Decode, 200, 2, 20, // Opcode: AsmNHJ /* 586 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 594 /* 590 */ MCD_OPC_Decode, 236, 2, 20, // Opcode: AsmNOJ /* 594 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 602 /* 598 */ MCD_OPC_Decode, 167, 4, 20, // Opcode: J /* 602 */ MCD_OPC_Decode, 145, 1, 21, // Opcode: AsmBRC /* 606 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 614 /* 610 */ MCD_OPC_Decode, 129, 3, 22, // Opcode: BRAS /* 614 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 622 /* 618 */ MCD_OPC_Decode, 133, 3, 23, // Opcode: BRCT /* 622 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 630 /* 626 */ MCD_OPC_Decode, 134, 3, 24, // Opcode: BRCTG /* 630 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 638 /* 634 */ MCD_OPC_Decode, 226, 4, 25, // Opcode: LHI /* 638 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 646 /* 642 */ MCD_OPC_Decode, 219, 4, 26, // Opcode: LGHI /* 646 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 653 /* 650 */ MCD_OPC_Decode, 43, 27, // Opcode: AHI /* 653 */ MCD_OPC_FilterValue, 11, 3, 0, // Skip to: 660 /* 657 */ MCD_OPC_Decode, 37, 28, // Opcode: AGHI /* 660 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 668 /* 664 */ MCD_OPC_Decode, 188, 5, 27, // Opcode: MHI /* 668 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 676 /* 672 */ MCD_OPC_Decode, 186, 5, 28, // Opcode: MGHI /* 676 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 684 /* 680 */ MCD_OPC_Decode, 172, 3, 25, // Opcode: CHI /* 684 */ MCD_OPC_FilterValue, 15, 253, 9, // Skip to: 3245 /* 688 */ MCD_OPC_Decode, 161, 3, 26, // Opcode: CGHI /* 692 */ MCD_OPC_FilterValue, 178, 1, 68, 0, // Skip to: 765 /* 697 */ MCD_OPC_ExtractField, 8, 16, // Inst{23-8} ... /* 700 */ MCD_OPC_FilterValue, 128, 68, 10, 0, // Skip to: 715 /* 705 */ MCD_OPC_CheckField, 0, 4, 0, 230, 9, // Skip to: 3245 /* 711 */ MCD_OPC_Decode, 166, 4, 29, // Opcode: IPM /* 715 */ MCD_OPC_FilterValue, 128, 158, 1, 4, 0, // Skip to: 725 /* 721 */ MCD_OPC_Decode, 138, 4, 30, // Opcode: EAR /* 725 */ MCD_OPC_FilterValue, 128, 164, 1, 4, 0, // Skip to: 735 /* 731 */ MCD_OPC_Decode, 203, 5, 4, // Opcode: MSR /* 735 */ MCD_OPC_FilterValue, 128, 170, 1, 4, 0, // Skip to: 745 /* 741 */ MCD_OPC_Decode, 213, 5, 31, // Opcode: MVST /* 745 */ MCD_OPC_FilterValue, 128, 186, 1, 4, 0, // Skip to: 755 /* 751 */ MCD_OPC_Decode, 213, 3, 31, // Opcode: CLST /* 755 */ MCD_OPC_FilterValue, 128, 188, 1, 180, 9, // Skip to: 3245 /* 761 */ MCD_OPC_Decode, 204, 6, 31, // Opcode: SRST /* 765 */ MCD_OPC_FilterValue, 179, 1, 109, 4, // Skip to: 1903 /* 770 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 773 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 787 /* 777 */ MCD_OPC_CheckField, 8, 8, 0, 158, 9, // Skip to: 3245 /* 783 */ MCD_OPC_Decode, 142, 5, 6, // Opcode: LPEBR /* 787 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 801 /* 791 */ MCD_OPC_CheckField, 8, 8, 0, 144, 9, // Skip to: 3245 /* 797 */ MCD_OPC_Decode, 132, 5, 6, // Opcode: LNEBR /* 801 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 815 /* 805 */ MCD_OPC_CheckField, 8, 8, 0, 130, 9, // Skip to: 3245 /* 811 */ MCD_OPC_Decode, 157, 5, 6, // Opcode: LTEBR /* 815 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 829 /* 819 */ MCD_OPC_CheckField, 8, 8, 0, 116, 9, // Skip to: 3245 /* 825 */ MCD_OPC_Decode, 189, 4, 6, // Opcode: LCEBR /* 829 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 843 /* 833 */ MCD_OPC_CheckField, 8, 8, 0, 102, 9, // Skip to: 3245 /* 839 */ MCD_OPC_Decode, 196, 4, 32, // Opcode: LDEBR /* 843 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 857 /* 847 */ MCD_OPC_CheckField, 8, 8, 0, 88, 9, // Skip to: 3245 /* 853 */ MCD_OPC_Decode, 168, 5, 33, // Opcode: LXDBR /* 857 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 871 /* 861 */ MCD_OPC_CheckField, 8, 8, 0, 74, 9, // Skip to: 3245 /* 867 */ MCD_OPC_Decode, 170, 5, 34, // Opcode: LXEBR /* 871 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 885 /* 875 */ MCD_OPC_CheckField, 8, 8, 0, 60, 9, // Skip to: 3245 /* 881 */ MCD_OPC_Decode, 217, 5, 35, // Opcode: MXDBR /* 885 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 899 /* 889 */ MCD_OPC_CheckField, 8, 8, 0, 46, 9, // Skip to: 3245 /* 895 */ MCD_OPC_Decode, 143, 3, 6, // Opcode: CEBR /* 899 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 912 /* 903 */ MCD_OPC_CheckField, 8, 8, 0, 32, 9, // Skip to: 3245 /* 909 */ MCD_OPC_Decode, 29, 36, // Opcode: AEBR /* 912 */ MCD_OPC_FilterValue, 11, 10, 0, // Skip to: 926 /* 916 */ MCD_OPC_CheckField, 8, 8, 0, 19, 9, // Skip to: 3245 /* 922 */ MCD_OPC_Decode, 165, 6, 36, // Opcode: SEBR /* 926 */ MCD_OPC_FilterValue, 12, 10, 0, // Skip to: 940 /* 930 */ MCD_OPC_CheckField, 8, 8, 0, 5, 9, // Skip to: 3245 /* 936 */ MCD_OPC_Decode, 183, 5, 37, // Opcode: MDEBR /* 940 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 954 /* 944 */ MCD_OPC_CheckField, 8, 8, 0, 247, 8, // Skip to: 3245 /* 950 */ MCD_OPC_Decode, 128, 4, 36, // Opcode: DEBR /* 954 */ MCD_OPC_FilterValue, 14, 10, 0, // Skip to: 968 /* 958 */ MCD_OPC_CheckField, 8, 4, 0, 233, 8, // Skip to: 3245 /* 964 */ MCD_OPC_Decode, 179, 5, 38, // Opcode: MAEBR /* 968 */ MCD_OPC_FilterValue, 15, 10, 0, // Skip to: 982 /* 972 */ MCD_OPC_CheckField, 8, 4, 0, 219, 8, // Skip to: 3245 /* 978 */ MCD_OPC_Decode, 196, 5, 38, // Opcode: MSEBR /* 982 */ MCD_OPC_FilterValue, 16, 10, 0, // Skip to: 996 /* 986 */ MCD_OPC_CheckField, 8, 8, 0, 205, 8, // Skip to: 3245 /* 992 */ MCD_OPC_Decode, 141, 5, 5, // Opcode: LPDBR /* 996 */ MCD_OPC_FilterValue, 17, 10, 0, // Skip to: 1010 /* 1000 */ MCD_OPC_CheckField, 8, 8, 0, 191, 8, // Skip to: 3245 /* 1006 */ MCD_OPC_Decode, 131, 5, 5, // Opcode: LNDBR /* 1010 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 1024 /* 1014 */ MCD_OPC_CheckField, 8, 8, 0, 177, 8, // Skip to: 3245 /* 1020 */ MCD_OPC_Decode, 155, 5, 5, // Opcode: LTDBR /* 1024 */ MCD_OPC_FilterValue, 19, 10, 0, // Skip to: 1038 /* 1028 */ MCD_OPC_CheckField, 8, 8, 0, 163, 8, // Skip to: 3245 /* 1034 */ MCD_OPC_Decode, 188, 4, 5, // Opcode: LCDBR /* 1038 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 1052 /* 1042 */ MCD_OPC_CheckField, 8, 8, 0, 149, 8, // Skip to: 3245 /* 1048 */ MCD_OPC_Decode, 194, 6, 6, // Opcode: SQEBR /* 1052 */ MCD_OPC_FilterValue, 21, 10, 0, // Skip to: 1066 /* 1056 */ MCD_OPC_CheckField, 8, 8, 0, 135, 8, // Skip to: 3245 /* 1062 */ MCD_OPC_Decode, 192, 6, 5, // Opcode: SQDBR /* 1066 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 1080 /* 1070 */ MCD_OPC_CheckField, 8, 8, 0, 121, 8, // Skip to: 3245 /* 1076 */ MCD_OPC_Decode, 195, 6, 39, // Opcode: SQXBR /* 1080 */ MCD_OPC_FilterValue, 23, 10, 0, // Skip to: 1094 /* 1084 */ MCD_OPC_CheckField, 8, 8, 0, 107, 8, // Skip to: 3245 /* 1090 */ MCD_OPC_Decode, 185, 5, 36, // Opcode: MEEBR /* 1094 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 1108 /* 1098 */ MCD_OPC_CheckField, 8, 8, 0, 93, 8, // Skip to: 3245 /* 1104 */ MCD_OPC_Decode, 137, 3, 5, // Opcode: CDBR /* 1108 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 1121 /* 1112 */ MCD_OPC_CheckField, 8, 8, 0, 79, 8, // Skip to: 3245 /* 1118 */ MCD_OPC_Decode, 24, 40, // Opcode: ADBR /* 1121 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 1135 /* 1125 */ MCD_OPC_CheckField, 8, 8, 0, 66, 8, // Skip to: 3245 /* 1131 */ MCD_OPC_Decode, 163, 6, 40, // Opcode: SDBR /* 1135 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 1149 /* 1139 */ MCD_OPC_CheckField, 8, 8, 0, 52, 8, // Skip to: 3245 /* 1145 */ MCD_OPC_Decode, 181, 5, 40, // Opcode: MDBR /* 1149 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 1163 /* 1153 */ MCD_OPC_CheckField, 8, 8, 0, 38, 8, // Skip to: 3245 /* 1159 */ MCD_OPC_Decode, 254, 3, 40, // Opcode: DDBR /* 1163 */ MCD_OPC_FilterValue, 30, 10, 0, // Skip to: 1177 /* 1167 */ MCD_OPC_CheckField, 8, 4, 0, 24, 8, // Skip to: 3245 /* 1173 */ MCD_OPC_Decode, 177, 5, 41, // Opcode: MADBR /* 1177 */ MCD_OPC_FilterValue, 31, 10, 0, // Skip to: 1191 /* 1181 */ MCD_OPC_CheckField, 8, 4, 0, 10, 8, // Skip to: 3245 /* 1187 */ MCD_OPC_Decode, 194, 5, 41, // Opcode: MSDBR /* 1191 */ MCD_OPC_FilterValue, 64, 10, 0, // Skip to: 1205 /* 1195 */ MCD_OPC_CheckField, 8, 8, 0, 252, 7, // Skip to: 3245 /* 1201 */ MCD_OPC_Decode, 146, 5, 39, // Opcode: LPXBR /* 1205 */ MCD_OPC_FilterValue, 65, 10, 0, // Skip to: 1219 /* 1209 */ MCD_OPC_CheckField, 8, 8, 0, 238, 7, // Skip to: 3245 /* 1215 */ MCD_OPC_Decode, 136, 5, 39, // Opcode: LNXBR /* 1219 */ MCD_OPC_FilterValue, 66, 10, 0, // Skip to: 1233 /* 1223 */ MCD_OPC_CheckField, 8, 8, 0, 224, 7, // Skip to: 3245 /* 1229 */ MCD_OPC_Decode, 164, 5, 39, // Opcode: LTXBR /* 1233 */ MCD_OPC_FilterValue, 67, 10, 0, // Skip to: 1247 /* 1237 */ MCD_OPC_CheckField, 8, 8, 0, 210, 7, // Skip to: 3245 /* 1243 */ MCD_OPC_Decode, 193, 4, 39, // Opcode: LCXBR /* 1247 */ MCD_OPC_FilterValue, 68, 18, 0, // Skip to: 1269 /* 1251 */ MCD_OPC_CheckField, 8, 8, 0, 4, 0, // Skip to: 1261 /* 1257 */ MCD_OPC_Decode, 203, 4, 42, // Opcode: LEDBR /* 1261 */ MCD_OPC_CheckPredicate, 0, 188, 7, // Skip to: 3245 /* 1265 */ MCD_OPC_Decode, 204, 4, 43, // Opcode: LEDBRA /* 1269 */ MCD_OPC_FilterValue, 69, 18, 0, // Skip to: 1291 /* 1273 */ MCD_OPC_CheckField, 8, 8, 0, 4, 0, // Skip to: 1283 /* 1279 */ MCD_OPC_Decode, 199, 4, 39, // Opcode: LDXBR /* 1283 */ MCD_OPC_CheckPredicate, 0, 166, 7, // Skip to: 3245 /* 1287 */ MCD_OPC_Decode, 200, 4, 44, // Opcode: LDXBRA /* 1291 */ MCD_OPC_FilterValue, 70, 18, 0, // Skip to: 1313 /* 1295 */ MCD_OPC_CheckField, 8, 8, 0, 4, 0, // Skip to: 1305 /* 1301 */ MCD_OPC_Decode, 206, 4, 39, // Opcode: LEXBR /* 1305 */ MCD_OPC_CheckPredicate, 0, 144, 7, // Skip to: 3245 /* 1309 */ MCD_OPC_Decode, 207, 4, 44, // Opcode: LEXBRA /* 1313 */ MCD_OPC_FilterValue, 71, 18, 0, // Skip to: 1335 /* 1317 */ MCD_OPC_CheckField, 8, 4, 0, 4, 0, // Skip to: 1327 /* 1323 */ MCD_OPC_Decode, 143, 4, 45, // Opcode: FIXBR /* 1327 */ MCD_OPC_CheckPredicate, 0, 122, 7, // Skip to: 3245 /* 1331 */ MCD_OPC_Decode, 144, 4, 44, // Opcode: FIXBRA /* 1335 */ MCD_OPC_FilterValue, 73, 10, 0, // Skip to: 1349 /* 1339 */ MCD_OPC_CheckField, 8, 8, 0, 108, 7, // Skip to: 3245 /* 1345 */ MCD_OPC_Decode, 227, 3, 39, // Opcode: CXBR /* 1349 */ MCD_OPC_FilterValue, 74, 10, 0, // Skip to: 1363 /* 1353 */ MCD_OPC_CheckField, 8, 8, 0, 94, 7, // Skip to: 3245 /* 1359 */ MCD_OPC_Decode, 142, 1, 46, // Opcode: AXBR /* 1363 */ MCD_OPC_FilterValue, 75, 10, 0, // Skip to: 1377 /* 1367 */ MCD_OPC_CheckField, 8, 8, 0, 80, 7, // Skip to: 3245 /* 1373 */ MCD_OPC_Decode, 233, 6, 46, // Opcode: SXBR /* 1377 */ MCD_OPC_FilterValue, 76, 10, 0, // Skip to: 1391 /* 1381 */ MCD_OPC_CheckField, 8, 8, 0, 66, 7, // Skip to: 3245 /* 1387 */ MCD_OPC_Decode, 215, 5, 46, // Opcode: MXBR /* 1391 */ MCD_OPC_FilterValue, 77, 10, 0, // Skip to: 1405 /* 1395 */ MCD_OPC_CheckField, 8, 8, 0, 52, 7, // Skip to: 3245 /* 1401 */ MCD_OPC_Decode, 137, 4, 46, // Opcode: DXBR /* 1405 */ MCD_OPC_FilterValue, 87, 18, 0, // Skip to: 1427 /* 1409 */ MCD_OPC_CheckField, 8, 4, 0, 4, 0, // Skip to: 1419 /* 1415 */ MCD_OPC_Decode, 141, 4, 47, // Opcode: FIEBR /* 1419 */ MCD_OPC_CheckPredicate, 0, 30, 7, // Skip to: 3245 /* 1423 */ MCD_OPC_Decode, 142, 4, 48, // Opcode: FIEBRA /* 1427 */ MCD_OPC_FilterValue, 95, 18, 0, // Skip to: 1449 /* 1431 */ MCD_OPC_CheckField, 8, 4, 0, 4, 0, // Skip to: 1441 /* 1437 */ MCD_OPC_Decode, 139, 4, 49, // Opcode: FIDBR /* 1441 */ MCD_OPC_CheckPredicate, 0, 8, 7, // Skip to: 3245 /* 1445 */ MCD_OPC_Decode, 140, 4, 50, // Opcode: FIDBRA /* 1449 */ MCD_OPC_FilterValue, 101, 10, 0, // Skip to: 1463 /* 1453 */ MCD_OPC_CheckField, 8, 8, 0, 250, 6, // Skip to: 3245 /* 1459 */ MCD_OPC_Decode, 171, 5, 39, // Opcode: LXR /* 1463 */ MCD_OPC_FilterValue, 114, 10, 0, // Skip to: 1477 /* 1467 */ MCD_OPC_CheckField, 8, 4, 0, 236, 6, // Skip to: 3245 /* 1473 */ MCD_OPC_Decode, 217, 3, 51, // Opcode: CPSDRdd /* 1477 */ MCD_OPC_FilterValue, 116, 16, 0, // Skip to: 1497 /* 1481 */ MCD_OPC_CheckField, 8, 8, 0, 222, 6, // Skip to: 3245 /* 1487 */ MCD_OPC_CheckField, 0, 4, 0, 216, 6, // Skip to: 3245 /* 1493 */ MCD_OPC_Decode, 174, 5, 52, // Opcode: LZER /* 1497 */ MCD_OPC_FilterValue, 117, 16, 0, // Skip to: 1517 /* 1501 */ MCD_OPC_CheckField, 8, 8, 0, 202, 6, // Skip to: 3245 /* 1507 */ MCD_OPC_CheckField, 0, 4, 0, 196, 6, // Skip to: 3245 /* 1513 */ MCD_OPC_Decode, 173, 5, 53, // Opcode: LZDR /* 1517 */ MCD_OPC_FilterValue, 118, 16, 0, // Skip to: 1537 /* 1521 */ MCD_OPC_CheckField, 8, 8, 0, 182, 6, // Skip to: 3245 /* 1527 */ MCD_OPC_CheckField, 0, 4, 0, 176, 6, // Skip to: 3245 /* 1533 */ MCD_OPC_Decode, 175, 5, 54, // Opcode: LZXR /* 1537 */ MCD_OPC_FilterValue, 144, 1, 8, 0, // Skip to: 1550 /* 1542 */ MCD_OPC_CheckPredicate, 0, 163, 6, // Skip to: 3245 /* 1546 */ MCD_OPC_Decode, 146, 3, 55, // Opcode: CELFBR /* 1550 */ MCD_OPC_FilterValue, 145, 1, 8, 0, // Skip to: 1563 /* 1555 */ MCD_OPC_CheckPredicate, 0, 150, 6, // Skip to: 3245 /* 1559 */ MCD_OPC_Decode, 140, 3, 56, // Opcode: CDLFBR /* 1563 */ MCD_OPC_FilterValue, 146, 1, 8, 0, // Skip to: 1576 /* 1568 */ MCD_OPC_CheckPredicate, 0, 137, 6, // Skip to: 3245 /* 1572 */ MCD_OPC_Decode, 230, 3, 57, // Opcode: CXLFBR /* 1576 */ MCD_OPC_FilterValue, 148, 1, 10, 0, // Skip to: 1591 /* 1581 */ MCD_OPC_CheckField, 8, 8, 0, 122, 6, // Skip to: 3245 /* 1587 */ MCD_OPC_Decode, 144, 3, 58, // Opcode: CEFBR /* 1591 */ MCD_OPC_FilterValue, 149, 1, 10, 0, // Skip to: 1606 /* 1596 */ MCD_OPC_CheckField, 8, 8, 0, 107, 6, // Skip to: 3245 /* 1602 */ MCD_OPC_Decode, 138, 3, 59, // Opcode: CDFBR /* 1606 */ MCD_OPC_FilterValue, 150, 1, 10, 0, // Skip to: 1621 /* 1611 */ MCD_OPC_CheckField, 8, 8, 0, 92, 6, // Skip to: 3245 /* 1617 */ MCD_OPC_Decode, 228, 3, 60, // Opcode: CXFBR /* 1621 */ MCD_OPC_FilterValue, 152, 1, 10, 0, // Skip to: 1636 /* 1626 */ MCD_OPC_CheckField, 8, 4, 0, 77, 6, // Skip to: 3245 /* 1632 */ MCD_OPC_Decode, 149, 3, 61, // Opcode: CFEBR /* 1636 */ MCD_OPC_FilterValue, 153, 1, 10, 0, // Skip to: 1651 /* 1641 */ MCD_OPC_CheckField, 8, 4, 0, 62, 6, // Skip to: 3245 /* 1647 */ MCD_OPC_Decode, 148, 3, 62, // Opcode: CFDBR /* 1651 */ MCD_OPC_FilterValue, 154, 1, 10, 0, // Skip to: 1666 /* 1656 */ MCD_OPC_CheckField, 8, 4, 0, 47, 6, // Skip to: 3245 /* 1662 */ MCD_OPC_Decode, 152, 3, 63, // Opcode: CFXBR /* 1666 */ MCD_OPC_FilterValue, 156, 1, 8, 0, // Skip to: 1679 /* 1671 */ MCD_OPC_CheckPredicate, 0, 34, 6, // Skip to: 3245 /* 1675 */ MCD_OPC_Decode, 183, 3, 64, // Opcode: CLFEBR /* 1679 */ MCD_OPC_FilterValue, 157, 1, 8, 0, // Skip to: 1692 /* 1684 */ MCD_OPC_CheckPredicate, 0, 21, 6, // Skip to: 3245 /* 1688 */ MCD_OPC_Decode, 182, 3, 65, // Opcode: CLFDBR /* 1692 */ MCD_OPC_FilterValue, 158, 1, 8, 0, // Skip to: 1705 /* 1697 */ MCD_OPC_CheckPredicate, 0, 8, 6, // Skip to: 3245 /* 1701 */ MCD_OPC_Decode, 187, 3, 66, // Opcode: CLFXBR /* 1705 */ MCD_OPC_FilterValue, 160, 1, 8, 0, // Skip to: 1718 /* 1710 */ MCD_OPC_CheckPredicate, 0, 251, 5, // Skip to: 3245 /* 1714 */ MCD_OPC_Decode, 147, 3, 67, // Opcode: CELGBR /* 1718 */ MCD_OPC_FilterValue, 161, 1, 8, 0, // Skip to: 1731 /* 1723 */ MCD_OPC_CheckPredicate, 0, 238, 5, // Skip to: 3245 /* 1727 */ MCD_OPC_Decode, 141, 3, 68, // Opcode: CDLGBR /* 1731 */ MCD_OPC_FilterValue, 162, 1, 8, 0, // Skip to: 1744 /* 1736 */ MCD_OPC_CheckPredicate, 0, 225, 5, // Skip to: 3245 /* 1740 */ MCD_OPC_Decode, 231, 3, 69, // Opcode: CXLGBR /* 1744 */ MCD_OPC_FilterValue, 164, 1, 10, 0, // Skip to: 1759 /* 1749 */ MCD_OPC_CheckField, 8, 8, 0, 210, 5, // Skip to: 3245 /* 1755 */ MCD_OPC_Decode, 145, 3, 70, // Opcode: CEGBR /* 1759 */ MCD_OPC_FilterValue, 165, 1, 10, 0, // Skip to: 1774 /* 1764 */ MCD_OPC_CheckField, 8, 8, 0, 195, 5, // Skip to: 3245 /* 1770 */ MCD_OPC_Decode, 139, 3, 71, // Opcode: CDGBR /* 1774 */ MCD_OPC_FilterValue, 166, 1, 10, 0, // Skip to: 1789 /* 1779 */ MCD_OPC_CheckField, 8, 8, 0, 180, 5, // Skip to: 3245 /* 1785 */ MCD_OPC_Decode, 229, 3, 72, // Opcode: CXGBR /* 1789 */ MCD_OPC_FilterValue, 168, 1, 10, 0, // Skip to: 1804 /* 1794 */ MCD_OPC_CheckField, 8, 4, 0, 165, 5, // Skip to: 3245 /* 1800 */ MCD_OPC_Decode, 155, 3, 73, // Opcode: CGEBR /* 1804 */ MCD_OPC_FilterValue, 169, 1, 10, 0, // Skip to: 1819 /* 1809 */ MCD_OPC_CheckField, 8, 4, 0, 150, 5, // Skip to: 3245 /* 1815 */ MCD_OPC_Decode, 154, 3, 74, // Opcode: CGDBR /* 1819 */ MCD_OPC_FilterValue, 170, 1, 10, 0, // Skip to: 1834 /* 1824 */ MCD_OPC_CheckField, 8, 4, 0, 135, 5, // Skip to: 3245 /* 1830 */ MCD_OPC_Decode, 168, 3, 75, // Opcode: CGXBR /* 1834 */ MCD_OPC_FilterValue, 172, 1, 8, 0, // Skip to: 1847 /* 1839 */ MCD_OPC_CheckPredicate, 0, 122, 5, // Skip to: 3245 /* 1843 */ MCD_OPC_Decode, 190, 3, 76, // Opcode: CLGEBR /* 1847 */ MCD_OPC_FilterValue, 173, 1, 8, 0, // Skip to: 1860 /* 1852 */ MCD_OPC_CheckPredicate, 0, 109, 5, // Skip to: 3245 /* 1856 */ MCD_OPC_Decode, 189, 3, 77, // Opcode: CLGDBR /* 1860 */ MCD_OPC_FilterValue, 174, 1, 8, 0, // Skip to: 1873 /* 1865 */ MCD_OPC_CheckPredicate, 0, 96, 5, // Skip to: 3245 /* 1869 */ MCD_OPC_Decode, 201, 3, 78, // Opcode: CLGXBR /* 1873 */ MCD_OPC_FilterValue, 193, 1, 10, 0, // Skip to: 1888 /* 1878 */ MCD_OPC_CheckField, 8, 8, 0, 81, 5, // Skip to: 3245 /* 1884 */ MCD_OPC_Decode, 197, 4, 71, // Opcode: LDGR /* 1888 */ MCD_OPC_FilterValue, 205, 1, 72, 5, // Skip to: 3245 /* 1893 */ MCD_OPC_CheckField, 8, 8, 0, 66, 5, // Skip to: 3245 /* 1899 */ MCD_OPC_Decode, 213, 4, 79, // Opcode: LGDR /* 1903 */ MCD_OPC_FilterValue, 185, 1, 48, 5, // Skip to: 3236 /* 1908 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ... /* 1911 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1925 /* 1915 */ MCD_OPC_CheckField, 8, 8, 0, 44, 5, // Skip to: 3245 /* 1921 */ MCD_OPC_Decode, 144, 5, 80, // Opcode: LPGR /* 1925 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 1939 /* 1929 */ MCD_OPC_CheckField, 8, 8, 0, 30, 5, // Skip to: 3245 /* 1935 */ MCD_OPC_Decode, 134, 5, 80, // Opcode: LNGR /* 1939 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 1953 /* 1943 */ MCD_OPC_CheckField, 8, 8, 0, 16, 5, // Skip to: 3245 /* 1949 */ MCD_OPC_Decode, 162, 5, 80, // Opcode: LTGR /* 1953 */ MCD_OPC_FilterValue, 3, 10, 0, // Skip to: 1967 /* 1957 */ MCD_OPC_CheckField, 8, 8, 0, 2, 5, // Skip to: 3245 /* 1963 */ MCD_OPC_Decode, 191, 4, 80, // Opcode: LCGR /* 1967 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 1981 /* 1971 */ MCD_OPC_CheckField, 8, 8, 0, 244, 4, // Skip to: 3245 /* 1977 */ MCD_OPC_Decode, 222, 4, 80, // Opcode: LGR /* 1981 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 1995 /* 1985 */ MCD_OPC_CheckField, 8, 8, 0, 230, 4, // Skip to: 3245 /* 1991 */ MCD_OPC_Decode, 212, 4, 80, // Opcode: LGBR /* 1995 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 2009 /* 1999 */ MCD_OPC_CheckField, 8, 8, 0, 216, 4, // Skip to: 3245 /* 2005 */ MCD_OPC_Decode, 220, 4, 80, // Opcode: LGHR /* 2009 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 2022 /* 2013 */ MCD_OPC_CheckField, 8, 8, 0, 202, 4, // Skip to: 3245 /* 2019 */ MCD_OPC_Decode, 39, 81, // Opcode: AGR /* 2022 */ MCD_OPC_FilterValue, 9, 10, 0, // Skip to: 2036 /* 2026 */ MCD_OPC_CheckField, 8, 8, 0, 189, 4, // Skip to: 3245 /* 2032 */ MCD_OPC_Decode, 169, 6, 81, // Opcode: SGR /* 2036 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 2049 /* 2040 */ MCD_OPC_CheckField, 8, 8, 0, 175, 4, // Skip to: 3245 /* 2046 */ MCD_OPC_Decode, 60, 81, // Opcode: ALGR /* 2049 */ MCD_OPC_FilterValue, 11, 10, 0, // Skip to: 2063 /* 2053 */ MCD_OPC_CheckField, 8, 8, 0, 162, 4, // Skip to: 3245 /* 2059 */ MCD_OPC_Decode, 183, 6, 81, // Opcode: SLGR /* 2063 */ MCD_OPC_FilterValue, 12, 10, 0, // Skip to: 2077 /* 2067 */ MCD_OPC_CheckField, 8, 8, 0, 148, 4, // Skip to: 3245 /* 2073 */ MCD_OPC_Decode, 202, 5, 81, // Opcode: MSGR /* 2077 */ MCD_OPC_FilterValue, 13, 10, 0, // Skip to: 2091 /* 2081 */ MCD_OPC_CheckField, 8, 8, 0, 134, 4, // Skip to: 3245 /* 2087 */ MCD_OPC_Decode, 136, 4, 82, // Opcode: DSGR /* 2091 */ MCD_OPC_FilterValue, 15, 10, 0, // Skip to: 2105 /* 2095 */ MCD_OPC_CheckField, 8, 8, 0, 120, 4, // Skip to: 3245 /* 2101 */ MCD_OPC_Decode, 152, 5, 80, // Opcode: LRVGR /* 2105 */ MCD_OPC_FilterValue, 16, 10, 0, // Skip to: 2119 /* 2109 */ MCD_OPC_CheckField, 8, 8, 0, 106, 4, // Skip to: 3245 /* 2115 */ MCD_OPC_Decode, 143, 5, 83, // Opcode: LPGFR /* 2119 */ MCD_OPC_FilterValue, 17, 10, 0, // Skip to: 2133 /* 2123 */ MCD_OPC_CheckField, 8, 8, 0, 92, 4, // Skip to: 3245 /* 2129 */ MCD_OPC_Decode, 133, 5, 83, // Opcode: LNGFR /* 2133 */ MCD_OPC_FilterValue, 18, 10, 0, // Skip to: 2147 /* 2137 */ MCD_OPC_CheckField, 8, 8, 0, 78, 4, // Skip to: 3245 /* 2143 */ MCD_OPC_Decode, 161, 5, 80, // Opcode: LTGFR /* 2147 */ MCD_OPC_FilterValue, 19, 10, 0, // Skip to: 2161 /* 2151 */ MCD_OPC_CheckField, 8, 8, 0, 64, 4, // Skip to: 3245 /* 2157 */ MCD_OPC_Decode, 190, 4, 83, // Opcode: LCGFR /* 2161 */ MCD_OPC_FilterValue, 20, 10, 0, // Skip to: 2175 /* 2165 */ MCD_OPC_CheckField, 8, 8, 0, 50, 4, // Skip to: 3245 /* 2171 */ MCD_OPC_Decode, 216, 4, 83, // Opcode: LGFR /* 2175 */ MCD_OPC_FilterValue, 22, 10, 0, // Skip to: 2189 /* 2179 */ MCD_OPC_CheckField, 8, 8, 0, 36, 4, // Skip to: 3245 /* 2185 */ MCD_OPC_Decode, 240, 4, 83, // Opcode: LLGFR /* 2189 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 2202 /* 2193 */ MCD_OPC_CheckField, 8, 8, 0, 22, 4, // Skip to: 3245 /* 2199 */ MCD_OPC_Decode, 36, 84, // Opcode: AGFR /* 2202 */ MCD_OPC_FilterValue, 25, 10, 0, // Skip to: 2216 /* 2206 */ MCD_OPC_CheckField, 8, 8, 0, 9, 4, // Skip to: 3245 /* 2212 */ MCD_OPC_Decode, 168, 6, 84, // Opcode: SGFR /* 2216 */ MCD_OPC_FilterValue, 26, 9, 0, // Skip to: 2229 /* 2220 */ MCD_OPC_CheckField, 8, 8, 0, 251, 3, // Skip to: 3245 /* 2226 */ MCD_OPC_Decode, 58, 84, // Opcode: ALGFR /* 2229 */ MCD_OPC_FilterValue, 27, 10, 0, // Skip to: 2243 /* 2233 */ MCD_OPC_CheckField, 8, 8, 0, 238, 3, // Skip to: 3245 /* 2239 */ MCD_OPC_Decode, 182, 6, 84, // Opcode: SLGFR /* 2243 */ MCD_OPC_FilterValue, 28, 10, 0, // Skip to: 2257 /* 2247 */ MCD_OPC_CheckField, 8, 8, 0, 224, 3, // Skip to: 3245 /* 2253 */ MCD_OPC_Decode, 201, 5, 84, // Opcode: MSGFR /* 2257 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 2271 /* 2261 */ MCD_OPC_CheckField, 8, 8, 0, 210, 3, // Skip to: 3245 /* 2267 */ MCD_OPC_Decode, 135, 4, 85, // Opcode: DSGFR /* 2271 */ MCD_OPC_FilterValue, 31, 10, 0, // Skip to: 2285 /* 2275 */ MCD_OPC_CheckField, 8, 8, 0, 196, 3, // Skip to: 3245 /* 2281 */ MCD_OPC_Decode, 153, 5, 3, // Opcode: LRVR /* 2285 */ MCD_OPC_FilterValue, 32, 10, 0, // Skip to: 2299 /* 2289 */ MCD_OPC_CheckField, 8, 8, 0, 182, 3, // Skip to: 3245 /* 2295 */ MCD_OPC_Decode, 165, 3, 80, // Opcode: CGR /* 2299 */ MCD_OPC_FilterValue, 33, 10, 0, // Skip to: 2313 /* 2303 */ MCD_OPC_CheckField, 8, 8, 0, 168, 3, // Skip to: 3245 /* 2309 */ MCD_OPC_Decode, 198, 3, 80, // Opcode: CLGR /* 2313 */ MCD_OPC_FilterValue, 38, 10, 0, // Skip to: 2327 /* 2317 */ MCD_OPC_CheckField, 8, 8, 0, 154, 3, // Skip to: 3245 /* 2323 */ MCD_OPC_Decode, 187, 4, 3, // Opcode: LBR /* 2327 */ MCD_OPC_FilterValue, 39, 10, 0, // Skip to: 2341 /* 2331 */ MCD_OPC_CheckField, 8, 8, 0, 140, 3, // Skip to: 3245 /* 2337 */ MCD_OPC_Decode, 229, 4, 3, // Opcode: LHR /* 2341 */ MCD_OPC_FilterValue, 48, 10, 0, // Skip to: 2355 /* 2345 */ MCD_OPC_CheckField, 8, 8, 0, 126, 3, // Skip to: 3245 /* 2351 */ MCD_OPC_Decode, 158, 3, 83, // Opcode: CGFR /* 2355 */ MCD_OPC_FilterValue, 49, 10, 0, // Skip to: 2369 /* 2359 */ MCD_OPC_CheckField, 8, 8, 0, 112, 3, // Skip to: 3245 /* 2365 */ MCD_OPC_Decode, 193, 3, 83, // Opcode: CLGFR /* 2369 */ MCD_OPC_FilterValue, 128, 1, 10, 0, // Skip to: 2384 /* 2374 */ MCD_OPC_CheckField, 8, 8, 0, 97, 3, // Skip to: 3245 /* 2380 */ MCD_OPC_Decode, 223, 5, 81, // Opcode: NGR /* 2384 */ MCD_OPC_FilterValue, 129, 1, 10, 0, // Skip to: 2399 /* 2389 */ MCD_OPC_CheckField, 8, 8, 0, 82, 3, // Skip to: 3245 /* 2395 */ MCD_OPC_Decode, 250, 5, 81, // Opcode: OGR /* 2399 */ MCD_OPC_FilterValue, 130, 1, 10, 0, // Skip to: 2414 /* 2404 */ MCD_OPC_CheckField, 8, 8, 0, 67, 3, // Skip to: 3245 /* 2410 */ MCD_OPC_Decode, 133, 7, 81, // Opcode: XGR /* 2414 */ MCD_OPC_FilterValue, 131, 1, 10, 0, // Skip to: 2429 /* 2419 */ MCD_OPC_CheckField, 8, 8, 0, 52, 3, // Skip to: 3245 /* 2425 */ MCD_OPC_Decode, 145, 4, 86, // Opcode: FLOGR /* 2429 */ MCD_OPC_FilterValue, 132, 1, 10, 0, // Skip to: 2444 /* 2434 */ MCD_OPC_CheckField, 8, 8, 0, 37, 3, // Skip to: 3245 /* 2440 */ MCD_OPC_Decode, 238, 4, 80, // Opcode: LLGCR /* 2444 */ MCD_OPC_FilterValue, 133, 1, 10, 0, // Skip to: 2459 /* 2449 */ MCD_OPC_CheckField, 8, 8, 0, 22, 3, // Skip to: 3245 /* 2455 */ MCD_OPC_Decode, 243, 4, 80, // Opcode: LLGHR /* 2459 */ MCD_OPC_FilterValue, 134, 1, 10, 0, // Skip to: 2474 /* 2464 */ MCD_OPC_CheckField, 8, 8, 0, 7, 3, // Skip to: 3245 /* 2470 */ MCD_OPC_Decode, 191, 5, 82, // Opcode: MLGR /* 2474 */ MCD_OPC_FilterValue, 135, 1, 10, 0, // Skip to: 2489 /* 2479 */ MCD_OPC_CheckField, 8, 8, 0, 248, 2, // Skip to: 3245 /* 2485 */ MCD_OPC_Decode, 131, 4, 82, // Opcode: DLGR /* 2489 */ MCD_OPC_FilterValue, 136, 1, 9, 0, // Skip to: 2503 /* 2494 */ MCD_OPC_CheckField, 8, 8, 0, 233, 2, // Skip to: 3245 /* 2500 */ MCD_OPC_Decode, 52, 81, // Opcode: ALCGR /* 2503 */ MCD_OPC_FilterValue, 137, 1, 10, 0, // Skip to: 2518 /* 2508 */ MCD_OPC_CheckField, 8, 8, 0, 219, 2, // Skip to: 3245 /* 2514 */ MCD_OPC_Decode, 179, 6, 81, // Opcode: SLGBR /* 2518 */ MCD_OPC_FilterValue, 148, 1, 10, 0, // Skip to: 2533 /* 2523 */ MCD_OPC_CheckField, 8, 8, 0, 204, 2, // Skip to: 3245 /* 2529 */ MCD_OPC_Decode, 235, 4, 3, // Opcode: LLCR /* 2533 */ MCD_OPC_FilterValue, 149, 1, 10, 0, // Skip to: 2548 /* 2538 */ MCD_OPC_CheckField, 8, 8, 0, 189, 2, // Skip to: 3245 /* 2544 */ MCD_OPC_Decode, 248, 4, 3, // Opcode: LLHR /* 2548 */ MCD_OPC_FilterValue, 151, 1, 10, 0, // Skip to: 2563 /* 2553 */ MCD_OPC_CheckField, 8, 8, 0, 174, 2, // Skip to: 3245 /* 2559 */ MCD_OPC_Decode, 132, 4, 85, // Opcode: DLR /* 2563 */ MCD_OPC_FilterValue, 152, 1, 9, 0, // Skip to: 2577 /* 2568 */ MCD_OPC_CheckField, 8, 8, 0, 159, 2, // Skip to: 3245 /* 2574 */ MCD_OPC_Decode, 53, 4, // Opcode: ALCR /* 2577 */ MCD_OPC_FilterValue, 153, 1, 10, 0, // Skip to: 2592 /* 2582 */ MCD_OPC_CheckField, 8, 8, 0, 145, 2, // Skip to: 3245 /* 2588 */ MCD_OPC_Decode, 176, 6, 4, // Opcode: SLBR /* 2592 */ MCD_OPC_FilterValue, 226, 1, 186, 0, // Skip to: 2783 /* 2597 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2600 */ MCD_OPC_FilterValue, 0, 129, 2, // Skip to: 3245 /* 2604 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 2607 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 2619 /* 2611 */ MCD_OPC_CheckPredicate, 1, 160, 0, // Skip to: 2775 /* 2615 */ MCD_OPC_Decode, 249, 2, 81, // Opcode: AsmOLOCGR /* 2619 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 2631 /* 2623 */ MCD_OPC_CheckPredicate, 1, 148, 0, // Skip to: 2775 /* 2627 */ MCD_OPC_Decode, 178, 1, 81, // Opcode: AsmHLOCGR /* 2631 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2643 /* 2635 */ MCD_OPC_CheckPredicate, 1, 136, 0, // Skip to: 2775 /* 2639 */ MCD_OPC_Decode, 214, 2, 81, // Opcode: AsmNLELOCGR /* 2643 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 2655 /* 2647 */ MCD_OPC_CheckPredicate, 1, 124, 0, // Skip to: 2775 /* 2651 */ MCD_OPC_Decode, 173, 2, 81, // Opcode: AsmLLOCGR /* 2655 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 2667 /* 2659 */ MCD_OPC_CheckPredicate, 1, 112, 0, // Skip to: 2775 /* 2663 */ MCD_OPC_Decode, 196, 2, 81, // Opcode: AsmNHELOCGR /* 2667 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 2679 /* 2671 */ MCD_OPC_CheckPredicate, 1, 100, 0, // Skip to: 2775 /* 2675 */ MCD_OPC_Decode, 165, 2, 81, // Opcode: AsmLHLOCGR /* 2679 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 2691 /* 2683 */ MCD_OPC_CheckPredicate, 1, 88, 0, // Skip to: 2775 /* 2687 */ MCD_OPC_Decode, 186, 2, 81, // Opcode: AsmNELOCGR /* 2691 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 2703 /* 2695 */ MCD_OPC_CheckPredicate, 1, 76, 0, // Skip to: 2775 /* 2699 */ MCD_OPC_Decode, 160, 1, 81, // Opcode: AsmELOCGR /* 2703 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 2715 /* 2707 */ MCD_OPC_CheckPredicate, 1, 64, 0, // Skip to: 2775 /* 2711 */ MCD_OPC_Decode, 223, 2, 81, // Opcode: AsmNLHLOCGR /* 2715 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 2727 /* 2719 */ MCD_OPC_CheckPredicate, 1, 52, 0, // Skip to: 2775 /* 2723 */ MCD_OPC_Decode, 170, 1, 81, // Opcode: AsmHELOCGR /* 2727 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 2739 /* 2731 */ MCD_OPC_CheckPredicate, 1, 40, 0, // Skip to: 2775 /* 2735 */ MCD_OPC_Decode, 231, 2, 81, // Opcode: AsmNLLOCGR /* 2739 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 2751 /* 2743 */ MCD_OPC_CheckPredicate, 1, 28, 0, // Skip to: 2775 /* 2747 */ MCD_OPC_Decode, 156, 2, 81, // Opcode: AsmLELOCGR /* 2751 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 2763 /* 2755 */ MCD_OPC_CheckPredicate, 1, 16, 0, // Skip to: 2775 /* 2759 */ MCD_OPC_Decode, 204, 2, 81, // Opcode: AsmNHLOCGR /* 2763 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 2775 /* 2767 */ MCD_OPC_CheckPredicate, 1, 4, 0, // Skip to: 2775 /* 2771 */ MCD_OPC_Decode, 240, 2, 81, // Opcode: AsmNOLOCGR /* 2775 */ MCD_OPC_CheckPredicate, 1, 210, 1, // Skip to: 3245 /* 2779 */ MCD_OPC_Decode, 177, 2, 87, // Opcode: AsmLOCGR /* 2783 */ MCD_OPC_FilterValue, 228, 1, 14, 0, // Skip to: 2802 /* 2788 */ MCD_OPC_CheckPredicate, 2, 197, 1, // Skip to: 3245 /* 2792 */ MCD_OPC_CheckField, 8, 4, 0, 191, 1, // Skip to: 3245 /* 2798 */ MCD_OPC_Decode, 224, 5, 88, // Opcode: NGRK /* 2802 */ MCD_OPC_FilterValue, 230, 1, 14, 0, // Skip to: 2821 /* 2807 */ MCD_OPC_CheckPredicate, 2, 178, 1, // Skip to: 3245 /* 2811 */ MCD_OPC_CheckField, 8, 4, 0, 172, 1, // Skip to: 3245 /* 2817 */ MCD_OPC_Decode, 251, 5, 88, // Opcode: OGRK /* 2821 */ MCD_OPC_FilterValue, 231, 1, 14, 0, // Skip to: 2840 /* 2826 */ MCD_OPC_CheckPredicate, 2, 159, 1, // Skip to: 3245 /* 2830 */ MCD_OPC_CheckField, 8, 4, 0, 153, 1, // Skip to: 3245 /* 2836 */ MCD_OPC_Decode, 134, 7, 88, // Opcode: XGRK /* 2840 */ MCD_OPC_FilterValue, 232, 1, 13, 0, // Skip to: 2858 /* 2845 */ MCD_OPC_CheckPredicate, 2, 140, 1, // Skip to: 3245 /* 2849 */ MCD_OPC_CheckField, 8, 4, 0, 134, 1, // Skip to: 3245 /* 2855 */ MCD_OPC_Decode, 40, 88, // Opcode: AGRK /* 2858 */ MCD_OPC_FilterValue, 233, 1, 14, 0, // Skip to: 2877 /* 2863 */ MCD_OPC_CheckPredicate, 2, 122, 1, // Skip to: 3245 /* 2867 */ MCD_OPC_CheckField, 8, 4, 0, 116, 1, // Skip to: 3245 /* 2873 */ MCD_OPC_Decode, 170, 6, 88, // Opcode: SGRK /* 2877 */ MCD_OPC_FilterValue, 234, 1, 13, 0, // Skip to: 2895 /* 2882 */ MCD_OPC_CheckPredicate, 2, 103, 1, // Skip to: 3245 /* 2886 */ MCD_OPC_CheckField, 8, 4, 0, 97, 1, // Skip to: 3245 /* 2892 */ MCD_OPC_Decode, 61, 88, // Opcode: ALGRK /* 2895 */ MCD_OPC_FilterValue, 235, 1, 14, 0, // Skip to: 2914 /* 2900 */ MCD_OPC_CheckPredicate, 2, 85, 1, // Skip to: 3245 /* 2904 */ MCD_OPC_CheckField, 8, 4, 0, 79, 1, // Skip to: 3245 /* 2910 */ MCD_OPC_Decode, 184, 6, 88, // Opcode: SLGRK /* 2914 */ MCD_OPC_FilterValue, 242, 1, 186, 0, // Skip to: 3105 /* 2919 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2922 */ MCD_OPC_FilterValue, 0, 63, 1, // Skip to: 3245 /* 2926 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 2929 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 2941 /* 2933 */ MCD_OPC_CheckPredicate, 1, 160, 0, // Skip to: 3097 /* 2937 */ MCD_OPC_Decode, 250, 2, 4, // Opcode: AsmOLOCR /* 2941 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 2953 /* 2945 */ MCD_OPC_CheckPredicate, 1, 148, 0, // Skip to: 3097 /* 2949 */ MCD_OPC_Decode, 179, 1, 4, // Opcode: AsmHLOCR /* 2953 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2965 /* 2957 */ MCD_OPC_CheckPredicate, 1, 136, 0, // Skip to: 3097 /* 2961 */ MCD_OPC_Decode, 215, 2, 4, // Opcode: AsmNLELOCR /* 2965 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 2977 /* 2969 */ MCD_OPC_CheckPredicate, 1, 124, 0, // Skip to: 3097 /* 2973 */ MCD_OPC_Decode, 174, 2, 4, // Opcode: AsmLLOCR /* 2977 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 2989 /* 2981 */ MCD_OPC_CheckPredicate, 1, 112, 0, // Skip to: 3097 /* 2985 */ MCD_OPC_Decode, 197, 2, 4, // Opcode: AsmNHELOCR /* 2989 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 3001 /* 2993 */ MCD_OPC_CheckPredicate, 1, 100, 0, // Skip to: 3097 /* 2997 */ MCD_OPC_Decode, 166, 2, 4, // Opcode: AsmLHLOCR /* 3001 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 3013 /* 3005 */ MCD_OPC_CheckPredicate, 1, 88, 0, // Skip to: 3097 /* 3009 */ MCD_OPC_Decode, 187, 2, 4, // Opcode: AsmNELOCR /* 3013 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 3025 /* 3017 */ MCD_OPC_CheckPredicate, 1, 76, 0, // Skip to: 3097 /* 3021 */ MCD_OPC_Decode, 161, 1, 4, // Opcode: AsmELOCR /* 3025 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 3037 /* 3029 */ MCD_OPC_CheckPredicate, 1, 64, 0, // Skip to: 3097 /* 3033 */ MCD_OPC_Decode, 224, 2, 4, // Opcode: AsmNLHLOCR /* 3037 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 3049 /* 3041 */ MCD_OPC_CheckPredicate, 1, 52, 0, // Skip to: 3097 /* 3045 */ MCD_OPC_Decode, 171, 1, 4, // Opcode: AsmHELOCR /* 3049 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 3061 /* 3053 */ MCD_OPC_CheckPredicate, 1, 40, 0, // Skip to: 3097 /* 3057 */ MCD_OPC_Decode, 232, 2, 4, // Opcode: AsmNLLOCR /* 3061 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 3073 /* 3065 */ MCD_OPC_CheckPredicate, 1, 28, 0, // Skip to: 3097 /* 3069 */ MCD_OPC_Decode, 157, 2, 4, // Opcode: AsmLELOCR /* 3073 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 3085 /* 3077 */ MCD_OPC_CheckPredicate, 1, 16, 0, // Skip to: 3097 /* 3081 */ MCD_OPC_Decode, 205, 2, 4, // Opcode: AsmNHLOCR /* 3085 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 3097 /* 3089 */ MCD_OPC_CheckPredicate, 1, 4, 0, // Skip to: 3097 /* 3093 */ MCD_OPC_Decode, 241, 2, 4, // Opcode: AsmNOLOCR /* 3097 */ MCD_OPC_CheckPredicate, 1, 144, 0, // Skip to: 3245 /* 3101 */ MCD_OPC_Decode, 178, 2, 89, // Opcode: AsmLOCR /* 3105 */ MCD_OPC_FilterValue, 244, 1, 14, 0, // Skip to: 3124 /* 3110 */ MCD_OPC_CheckPredicate, 2, 131, 0, // Skip to: 3245 /* 3114 */ MCD_OPC_CheckField, 8, 4, 0, 125, 0, // Skip to: 3245 /* 3120 */ MCD_OPC_Decode, 243, 5, 90, // Opcode: NRK /* 3124 */ MCD_OPC_FilterValue, 246, 1, 14, 0, // Skip to: 3143 /* 3129 */ MCD_OPC_CheckPredicate, 2, 112, 0, // Skip to: 3245 /* 3133 */ MCD_OPC_CheckField, 8, 4, 0, 106, 0, // Skip to: 3245 /* 3139 */ MCD_OPC_Decode, 142, 6, 90, // Opcode: ORK /* 3143 */ MCD_OPC_FilterValue, 247, 1, 14, 0, // Skip to: 3162 /* 3148 */ MCD_OPC_CheckPredicate, 2, 93, 0, // Skip to: 3245 /* 3152 */ MCD_OPC_CheckField, 8, 4, 0, 87, 0, // Skip to: 3245 /* 3158 */ MCD_OPC_Decode, 143, 7, 90, // Opcode: XRK /* 3162 */ MCD_OPC_FilterValue, 248, 1, 13, 0, // Skip to: 3180 /* 3167 */ MCD_OPC_CheckPredicate, 2, 74, 0, // Skip to: 3245 /* 3171 */ MCD_OPC_CheckField, 8, 4, 0, 68, 0, // Skip to: 3245 /* 3177 */ MCD_OPC_Decode, 67, 90, // Opcode: ARK /* 3180 */ MCD_OPC_FilterValue, 249, 1, 14, 0, // Skip to: 3199 /* 3185 */ MCD_OPC_CheckPredicate, 2, 56, 0, // Skip to: 3245 /* 3189 */ MCD_OPC_CheckField, 8, 4, 0, 50, 0, // Skip to: 3245 /* 3195 */ MCD_OPC_Decode, 200, 6, 90, // Opcode: SRK /* 3199 */ MCD_OPC_FilterValue, 250, 1, 13, 0, // Skip to: 3217 /* 3204 */ MCD_OPC_CheckPredicate, 2, 37, 0, // Skip to: 3245 /* 3208 */ MCD_OPC_CheckField, 8, 4, 0, 31, 0, // Skip to: 3245 /* 3214 */ MCD_OPC_Decode, 64, 90, // Opcode: ALRK /* 3217 */ MCD_OPC_FilterValue, 251, 1, 23, 0, // Skip to: 3245 /* 3222 */ MCD_OPC_CheckPredicate, 2, 19, 0, // Skip to: 3245 /* 3226 */ MCD_OPC_CheckField, 8, 4, 0, 13, 0, // Skip to: 3245 /* 3232 */ MCD_OPC_Decode, 189, 6, 90, // Opcode: SLRK /* 3236 */ MCD_OPC_FilterValue, 186, 1, 4, 0, // Skip to: 3245 /* 3241 */ MCD_OPC_Decode, 224, 3, 91, // Opcode: CS /* 3245 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTable48[] = { /* 0 */ MCD_OPC_ExtractField, 40, 8, // Inst{47-40} ... /* 3 */ MCD_OPC_FilterValue, 192, 1, 238, 0, // Skip to: 246 /* 8 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 11 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 19 /* 15 */ MCD_OPC_Decode, 180, 4, 92, // Opcode: LARL /* 19 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 27 /* 23 */ MCD_OPC_Decode, 215, 4, 93, // Opcode: LGFI /* 27 */ MCD_OPC_FilterValue, 4, 127, 0, // Skip to: 158 /* 31 */ MCD_OPC_ExtractField, 36, 4, // Inst{39-36} ... /* 34 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 42 /* 38 */ MCD_OPC_Decode, 246, 2, 94, // Opcode: AsmOJG /* 42 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 50 /* 46 */ MCD_OPC_Decode, 175, 1, 94, // Opcode: AsmHJG /* 50 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 58 /* 54 */ MCD_OPC_Decode, 211, 2, 94, // Opcode: AsmNLEJG /* 58 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 66 /* 62 */ MCD_OPC_Decode, 170, 2, 94, // Opcode: AsmLJG /* 66 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 74 /* 70 */ MCD_OPC_Decode, 193, 2, 94, // Opcode: AsmNHEJG /* 74 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 82 /* 78 */ MCD_OPC_Decode, 162, 2, 94, // Opcode: AsmLHJG /* 82 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 90 /* 86 */ MCD_OPC_Decode, 183, 2, 94, // Opcode: AsmNEJG /* 90 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 98 /* 94 */ MCD_OPC_Decode, 157, 1, 94, // Opcode: AsmEJG /* 98 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 106 /* 102 */ MCD_OPC_Decode, 220, 2, 94, // Opcode: AsmNLHJG /* 106 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 114 /* 110 */ MCD_OPC_Decode, 167, 1, 94, // Opcode: AsmHEJG /* 114 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 122 /* 118 */ MCD_OPC_Decode, 228, 2, 94, // Opcode: AsmNLJG /* 122 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 130 /* 126 */ MCD_OPC_Decode, 153, 2, 94, // Opcode: AsmLEJG /* 130 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 138 /* 134 */ MCD_OPC_Decode, 201, 2, 94, // Opcode: AsmNHJG /* 138 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 146 /* 142 */ MCD_OPC_Decode, 237, 2, 94, // Opcode: AsmNOJG /* 146 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 154 /* 150 */ MCD_OPC_Decode, 168, 4, 94, // Opcode: JG /* 154 */ MCD_OPC_Decode, 146, 1, 95, // Opcode: AsmBRCL /* 158 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 166 /* 162 */ MCD_OPC_Decode, 130, 3, 92, // Opcode: BRASL /* 166 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 174 /* 170 */ MCD_OPC_Decode, 137, 7, 96, // Opcode: XIHF /* 174 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 182 /* 178 */ MCD_OPC_Decode, 139, 7, 97, // Opcode: XILF /* 182 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 190 /* 186 */ MCD_OPC_Decode, 152, 4, 98, // Opcode: IIHF /* 190 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 198 /* 194 */ MCD_OPC_Decode, 159, 4, 99, // Opcode: IILF /* 198 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 206 /* 202 */ MCD_OPC_Decode, 227, 5, 96, // Opcode: NIHF /* 206 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 214 /* 210 */ MCD_OPC_Decode, 234, 5, 97, // Opcode: NILF /* 214 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 222 /* 218 */ MCD_OPC_Decode, 254, 5, 96, // Opcode: OIHF /* 222 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 230 /* 226 */ MCD_OPC_Decode, 133, 6, 97, // Opcode: OILF /* 230 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 238 /* 234 */ MCD_OPC_Decode, 251, 4, 100, // Opcode: LLIHF /* 238 */ MCD_OPC_FilterValue, 15, 214, 12, // Skip to: 3528 /* 242 */ MCD_OPC_Decode, 254, 4, 100, // Opcode: LLILF /* 246 */ MCD_OPC_FilterValue, 194, 1, 95, 0, // Skip to: 346 /* 251 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 254 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 262 /* 258 */ MCD_OPC_Decode, 200, 5, 101, // Opcode: MSGFI /* 262 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 270 /* 266 */ MCD_OPC_Decode, 197, 5, 102, // Opcode: MSFI /* 270 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 278 /* 274 */ MCD_OPC_Decode, 181, 6, 103, // Opcode: SLGFI /* 278 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 286 /* 282 */ MCD_OPC_Decode, 177, 6, 97, // Opcode: SLFI /* 286 */ MCD_OPC_FilterValue, 8, 3, 0, // Skip to: 293 /* 290 */ MCD_OPC_Decode, 35, 101, // Opcode: AGFI /* 293 */ MCD_OPC_FilterValue, 9, 3, 0, // Skip to: 300 /* 297 */ MCD_OPC_Decode, 31, 102, // Opcode: AFI /* 300 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 307 /* 304 */ MCD_OPC_Decode, 57, 103, // Opcode: ALGFI /* 307 */ MCD_OPC_FilterValue, 11, 3, 0, // Skip to: 314 /* 311 */ MCD_OPC_Decode, 54, 97, // Opcode: ALFI /* 314 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 322 /* 318 */ MCD_OPC_Decode, 157, 3, 93, // Opcode: CGFI /* 322 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 330 /* 326 */ MCD_OPC_Decode, 150, 3, 104, // Opcode: CFI /* 330 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 338 /* 334 */ MCD_OPC_Decode, 192, 3, 100, // Opcode: CLGFI /* 338 */ MCD_OPC_FilterValue, 15, 114, 12, // Skip to: 3528 /* 342 */ MCD_OPC_Decode, 185, 3, 99, // Opcode: CLFI /* 346 */ MCD_OPC_FilterValue, 196, 1, 91, 0, // Skip to: 442 /* 351 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 354 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 362 /* 358 */ MCD_OPC_Decode, 249, 4, 105, // Opcode: LLHRL /* 362 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 370 /* 366 */ MCD_OPC_Decode, 221, 4, 92, // Opcode: LGHRL /* 370 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 378 /* 374 */ MCD_OPC_Decode, 230, 4, 105, // Opcode: LHRL /* 378 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 386 /* 382 */ MCD_OPC_Decode, 244, 4, 92, // Opcode: LLGHRL /* 386 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 394 /* 390 */ MCD_OPC_Decode, 222, 6, 105, // Opcode: STHRL /* 394 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 402 /* 398 */ MCD_OPC_Decode, 223, 4, 92, // Opcode: LGRL /* 402 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 410 /* 406 */ MCD_OPC_Decode, 218, 6, 92, // Opcode: STGRL /* 410 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 418 /* 414 */ MCD_OPC_Decode, 217, 4, 92, // Opcode: LGFRL /* 418 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 426 /* 422 */ MCD_OPC_Decode, 148, 5, 105, // Opcode: LRL /* 426 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 434 /* 430 */ MCD_OPC_Decode, 241, 4, 92, // Opcode: LLGFRL /* 434 */ MCD_OPC_FilterValue, 15, 18, 12, // Skip to: 3528 /* 438 */ MCD_OPC_Decode, 228, 6, 105, // Opcode: STRL /* 442 */ MCD_OPC_FilterValue, 198, 1, 91, 0, // Skip to: 538 /* 447 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 450 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 458 /* 454 */ MCD_OPC_Decode, 145, 6, 95, // Opcode: PFDRL /* 458 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 466 /* 462 */ MCD_OPC_Decode, 162, 3, 92, // Opcode: CGHRL /* 466 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 474 /* 470 */ MCD_OPC_Decode, 173, 3, 105, // Opcode: CHRL /* 474 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 482 /* 478 */ MCD_OPC_Decode, 195, 3, 92, // Opcode: CLGHRL /* 482 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 490 /* 486 */ MCD_OPC_Decode, 204, 3, 105, // Opcode: CLHRL /* 490 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 498 /* 494 */ MCD_OPC_Decode, 167, 3, 92, // Opcode: CGRL /* 498 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 506 /* 502 */ MCD_OPC_Decode, 200, 3, 92, // Opcode: CLGRL /* 506 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 514 /* 510 */ MCD_OPC_Decode, 159, 3, 92, // Opcode: CGFRL /* 514 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 522 /* 518 */ MCD_OPC_Decode, 223, 3, 105, // Opcode: CRL /* 522 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 530 /* 526 */ MCD_OPC_Decode, 194, 3, 92, // Opcode: CLGFRL /* 530 */ MCD_OPC_FilterValue, 15, 178, 11, // Skip to: 3528 /* 534 */ MCD_OPC_Decode, 212, 3, 105, // Opcode: CLRL /* 538 */ MCD_OPC_FilterValue, 204, 1, 38, 0, // Skip to: 581 /* 543 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 546 */ MCD_OPC_FilterValue, 8, 7, 0, // Skip to: 557 /* 550 */ MCD_OPC_CheckPredicate, 3, 158, 11, // Skip to: 3528 /* 554 */ MCD_OPC_Decode, 48, 106, // Opcode: AIH /* 557 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 569 /* 561 */ MCD_OPC_CheckPredicate, 3, 147, 11, // Skip to: 3528 /* 565 */ MCD_OPC_Decode, 176, 3, 107, // Opcode: CIH /* 569 */ MCD_OPC_FilterValue, 15, 139, 11, // Skip to: 3528 /* 573 */ MCD_OPC_CheckPredicate, 3, 135, 11, // Skip to: 3528 /* 577 */ MCD_OPC_Decode, 206, 3, 99, // Opcode: CLIH /* 581 */ MCD_OPC_FilterValue, 210, 1, 4, 0, // Skip to: 590 /* 586 */ MCD_OPC_Decode, 205, 5, 108, // Opcode: MVC /* 590 */ MCD_OPC_FilterValue, 212, 1, 4, 0, // Skip to: 599 /* 595 */ MCD_OPC_Decode, 219, 5, 108, // Opcode: NC /* 599 */ MCD_OPC_FilterValue, 213, 1, 4, 0, // Skip to: 608 /* 604 */ MCD_OPC_Decode, 179, 3, 108, // Opcode: CLC /* 608 */ MCD_OPC_FilterValue, 214, 1, 4, 0, // Skip to: 617 /* 613 */ MCD_OPC_Decode, 246, 5, 108, // Opcode: OC /* 617 */ MCD_OPC_FilterValue, 215, 1, 4, 0, // Skip to: 626 /* 622 */ MCD_OPC_Decode, 129, 7, 108, // Opcode: XC /* 626 */ MCD_OPC_FilterValue, 227, 1, 163, 2, // Skip to: 1306 /* 631 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ... /* 634 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 642 /* 638 */ MCD_OPC_Decode, 159, 5, 109, // Opcode: LTG /* 642 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 650 /* 646 */ MCD_OPC_Decode, 210, 4, 109, // Opcode: LG /* 650 */ MCD_OPC_FilterValue, 8, 3, 0, // Skip to: 657 /* 654 */ MCD_OPC_Decode, 33, 110, // Opcode: AG /* 657 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 665 /* 661 */ MCD_OPC_Decode, 166, 6, 110, // Opcode: SG /* 665 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 672 /* 669 */ MCD_OPC_Decode, 55, 110, // Opcode: ALG /* 672 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 680 /* 676 */ MCD_OPC_Decode, 178, 6, 110, // Opcode: SLG /* 680 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 688 /* 684 */ MCD_OPC_Decode, 198, 5, 110, // Opcode: MSG /* 688 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 696 /* 692 */ MCD_OPC_Decode, 133, 4, 111, // Opcode: DSG /* 696 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 704 /* 700 */ MCD_OPC_Decode, 151, 5, 109, // Opcode: LRVG /* 704 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 712 /* 708 */ MCD_OPC_Decode, 154, 5, 112, // Opcode: LT /* 712 */ MCD_OPC_FilterValue, 20, 4, 0, // Skip to: 720 /* 716 */ MCD_OPC_Decode, 214, 4, 109, // Opcode: LGF /* 720 */ MCD_OPC_FilterValue, 21, 4, 0, // Skip to: 728 /* 724 */ MCD_OPC_Decode, 218, 4, 109, // Opcode: LGH /* 728 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 736 /* 732 */ MCD_OPC_Decode, 239, 4, 109, // Opcode: LLGF /* 736 */ MCD_OPC_FilterValue, 24, 3, 0, // Skip to: 743 /* 740 */ MCD_OPC_Decode, 34, 110, // Opcode: AGF /* 743 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 751 /* 747 */ MCD_OPC_Decode, 167, 6, 110, // Opcode: SGF /* 751 */ MCD_OPC_FilterValue, 26, 3, 0, // Skip to: 758 /* 755 */ MCD_OPC_Decode, 56, 110, // Opcode: ALGF /* 758 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 766 /* 762 */ MCD_OPC_Decode, 180, 6, 110, // Opcode: SLGF /* 766 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 774 /* 770 */ MCD_OPC_Decode, 199, 5, 110, // Opcode: MSGF /* 774 */ MCD_OPC_FilterValue, 29, 4, 0, // Skip to: 782 /* 778 */ MCD_OPC_Decode, 134, 4, 111, // Opcode: DSGF /* 782 */ MCD_OPC_FilterValue, 30, 4, 0, // Skip to: 790 /* 786 */ MCD_OPC_Decode, 150, 5, 112, // Opcode: LRV /* 790 */ MCD_OPC_FilterValue, 32, 4, 0, // Skip to: 798 /* 794 */ MCD_OPC_Decode, 153, 3, 109, // Opcode: CG /* 798 */ MCD_OPC_FilterValue, 33, 4, 0, // Skip to: 806 /* 802 */ MCD_OPC_Decode, 188, 3, 109, // Opcode: CLG /* 806 */ MCD_OPC_FilterValue, 36, 4, 0, // Skip to: 814 /* 810 */ MCD_OPC_Decode, 217, 6, 109, // Opcode: STG /* 814 */ MCD_OPC_FilterValue, 47, 4, 0, // Skip to: 822 /* 818 */ MCD_OPC_Decode, 230, 6, 109, // Opcode: STRVG /* 822 */ MCD_OPC_FilterValue, 48, 4, 0, // Skip to: 830 /* 826 */ MCD_OPC_Decode, 156, 3, 109, // Opcode: CGF /* 830 */ MCD_OPC_FilterValue, 49, 4, 0, // Skip to: 838 /* 834 */ MCD_OPC_Decode, 191, 3, 109, // Opcode: CLGF /* 838 */ MCD_OPC_FilterValue, 50, 4, 0, // Skip to: 846 /* 842 */ MCD_OPC_Decode, 160, 5, 109, // Opcode: LTGF /* 846 */ MCD_OPC_FilterValue, 52, 4, 0, // Skip to: 854 /* 850 */ MCD_OPC_Decode, 160, 3, 109, // Opcode: CGH /* 854 */ MCD_OPC_FilterValue, 54, 4, 0, // Skip to: 862 /* 858 */ MCD_OPC_Decode, 144, 6, 113, // Opcode: PFD /* 862 */ MCD_OPC_FilterValue, 62, 4, 0, // Skip to: 870 /* 866 */ MCD_OPC_Decode, 229, 6, 112, // Opcode: STRV /* 870 */ MCD_OPC_FilterValue, 80, 4, 0, // Skip to: 878 /* 874 */ MCD_OPC_Decode, 232, 6, 112, // Opcode: STY /* 878 */ MCD_OPC_FilterValue, 81, 4, 0, // Skip to: 886 /* 882 */ MCD_OPC_Decode, 204, 5, 114, // Opcode: MSY /* 886 */ MCD_OPC_FilterValue, 84, 4, 0, // Skip to: 894 /* 890 */ MCD_OPC_Decode, 244, 5, 114, // Opcode: NY /* 894 */ MCD_OPC_FilterValue, 85, 4, 0, // Skip to: 902 /* 898 */ MCD_OPC_Decode, 215, 3, 112, // Opcode: CLY /* 902 */ MCD_OPC_FilterValue, 86, 4, 0, // Skip to: 910 /* 906 */ MCD_OPC_Decode, 143, 6, 114, // Opcode: OY /* 910 */ MCD_OPC_FilterValue, 87, 4, 0, // Skip to: 918 /* 914 */ MCD_OPC_Decode, 144, 7, 114, // Opcode: XY /* 918 */ MCD_OPC_FilterValue, 88, 4, 0, // Skip to: 926 /* 922 */ MCD_OPC_Decode, 172, 5, 112, // Opcode: LY /* 926 */ MCD_OPC_FilterValue, 89, 4, 0, // Skip to: 934 /* 930 */ MCD_OPC_Decode, 232, 3, 112, // Opcode: CY /* 934 */ MCD_OPC_FilterValue, 90, 4, 0, // Skip to: 942 /* 938 */ MCD_OPC_Decode, 143, 1, 114, // Opcode: AY /* 942 */ MCD_OPC_FilterValue, 91, 4, 0, // Skip to: 950 /* 946 */ MCD_OPC_Decode, 234, 6, 114, // Opcode: SY /* 950 */ MCD_OPC_FilterValue, 94, 3, 0, // Skip to: 957 /* 954 */ MCD_OPC_Decode, 65, 114, // Opcode: ALY /* 957 */ MCD_OPC_FilterValue, 95, 4, 0, // Skip to: 965 /* 961 */ MCD_OPC_Decode, 190, 6, 114, // Opcode: SLY /* 965 */ MCD_OPC_FilterValue, 112, 4, 0, // Skip to: 973 /* 969 */ MCD_OPC_Decode, 223, 6, 112, // Opcode: STHY /* 973 */ MCD_OPC_FilterValue, 113, 4, 0, // Skip to: 981 /* 977 */ MCD_OPC_Decode, 183, 4, 109, // Opcode: LAY /* 981 */ MCD_OPC_FilterValue, 114, 4, 0, // Skip to: 989 /* 985 */ MCD_OPC_Decode, 211, 6, 112, // Opcode: STCY /* 989 */ MCD_OPC_FilterValue, 115, 4, 0, // Skip to: 997 /* 993 */ MCD_OPC_Decode, 150, 4, 110, // Opcode: ICY /* 997 */ MCD_OPC_FilterValue, 118, 4, 0, // Skip to: 1005 /* 1001 */ MCD_OPC_Decode, 184, 4, 112, // Opcode: LB /* 1005 */ MCD_OPC_FilterValue, 119, 4, 0, // Skip to: 1013 /* 1009 */ MCD_OPC_Decode, 211, 4, 109, // Opcode: LGB /* 1013 */ MCD_OPC_FilterValue, 120, 4, 0, // Skip to: 1021 /* 1017 */ MCD_OPC_Decode, 231, 4, 112, // Opcode: LHY /* 1021 */ MCD_OPC_FilterValue, 121, 4, 0, // Skip to: 1029 /* 1025 */ MCD_OPC_Decode, 175, 3, 112, // Opcode: CHY /* 1029 */ MCD_OPC_FilterValue, 122, 3, 0, // Skip to: 1036 /* 1033 */ MCD_OPC_Decode, 47, 114, // Opcode: AHY /* 1036 */ MCD_OPC_FilterValue, 123, 4, 0, // Skip to: 1044 /* 1040 */ MCD_OPC_Decode, 172, 6, 114, // Opcode: SHY /* 1044 */ MCD_OPC_FilterValue, 124, 4, 0, // Skip to: 1052 /* 1048 */ MCD_OPC_Decode, 189, 5, 114, // Opcode: MHY /* 1052 */ MCD_OPC_FilterValue, 128, 1, 4, 0, // Skip to: 1061 /* 1057 */ MCD_OPC_Decode, 222, 5, 110, // Opcode: NG /* 1061 */ MCD_OPC_FilterValue, 129, 1, 4, 0, // Skip to: 1070 /* 1066 */ MCD_OPC_Decode, 249, 5, 110, // Opcode: OG /* 1070 */ MCD_OPC_FilterValue, 130, 1, 4, 0, // Skip to: 1079 /* 1075 */ MCD_OPC_Decode, 132, 7, 110, // Opcode: XG /* 1079 */ MCD_OPC_FilterValue, 134, 1, 4, 0, // Skip to: 1088 /* 1084 */ MCD_OPC_Decode, 190, 5, 111, // Opcode: MLG /* 1088 */ MCD_OPC_FilterValue, 135, 1, 4, 0, // Skip to: 1097 /* 1093 */ MCD_OPC_Decode, 130, 4, 111, // Opcode: DLG /* 1097 */ MCD_OPC_FilterValue, 136, 1, 3, 0, // Skip to: 1105 /* 1102 */ MCD_OPC_Decode, 51, 110, // Opcode: ALCG /* 1105 */ MCD_OPC_FilterValue, 137, 1, 4, 0, // Skip to: 1114 /* 1110 */ MCD_OPC_Decode, 175, 6, 110, // Opcode: SLBG /* 1114 */ MCD_OPC_FilterValue, 144, 1, 4, 0, // Skip to: 1123 /* 1119 */ MCD_OPC_Decode, 237, 4, 109, // Opcode: LLGC /* 1123 */ MCD_OPC_FilterValue, 145, 1, 4, 0, // Skip to: 1132 /* 1128 */ MCD_OPC_Decode, 242, 4, 109, // Opcode: LLGH /* 1132 */ MCD_OPC_FilterValue, 148, 1, 4, 0, // Skip to: 1141 /* 1137 */ MCD_OPC_Decode, 232, 4, 112, // Opcode: LLC /* 1141 */ MCD_OPC_FilterValue, 149, 1, 4, 0, // Skip to: 1150 /* 1146 */ MCD_OPC_Decode, 245, 4, 112, // Opcode: LLH /* 1150 */ MCD_OPC_FilterValue, 151, 1, 4, 0, // Skip to: 1159 /* 1155 */ MCD_OPC_Decode, 129, 4, 111, // Opcode: DL /* 1159 */ MCD_OPC_FilterValue, 152, 1, 3, 0, // Skip to: 1167 /* 1164 */ MCD_OPC_Decode, 50, 114, // Opcode: ALC /* 1167 */ MCD_OPC_FilterValue, 153, 1, 4, 0, // Skip to: 1176 /* 1172 */ MCD_OPC_Decode, 174, 6, 114, // Opcode: SLB /* 1176 */ MCD_OPC_FilterValue, 192, 1, 8, 0, // Skip to: 1189 /* 1181 */ MCD_OPC_CheckPredicate, 3, 39, 9, // Skip to: 3528 /* 1185 */ MCD_OPC_Decode, 185, 4, 115, // Opcode: LBH /* 1189 */ MCD_OPC_FilterValue, 194, 1, 8, 0, // Skip to: 1202 /* 1194 */ MCD_OPC_CheckPredicate, 3, 26, 9, // Skip to: 3528 /* 1198 */ MCD_OPC_Decode, 233, 4, 112, // Opcode: LLCH /* 1202 */ MCD_OPC_FilterValue, 195, 1, 8, 0, // Skip to: 1215 /* 1207 */ MCD_OPC_CheckPredicate, 3, 13, 9, // Skip to: 3528 /* 1211 */ MCD_OPC_Decode, 209, 6, 115, // Opcode: STCH /* 1215 */ MCD_OPC_FilterValue, 196, 1, 8, 0, // Skip to: 1228 /* 1220 */ MCD_OPC_CheckPredicate, 3, 0, 9, // Skip to: 3528 /* 1224 */ MCD_OPC_Decode, 225, 4, 115, // Opcode: LHH /* 1228 */ MCD_OPC_FilterValue, 198, 1, 8, 0, // Skip to: 1241 /* 1233 */ MCD_OPC_CheckPredicate, 3, 243, 8, // Skip to: 3528 /* 1237 */ MCD_OPC_Decode, 246, 4, 112, // Opcode: LLHH /* 1241 */ MCD_OPC_FilterValue, 199, 1, 8, 0, // Skip to: 1254 /* 1246 */ MCD_OPC_CheckPredicate, 3, 230, 8, // Skip to: 3528 /* 1250 */ MCD_OPC_Decode, 220, 6, 115, // Opcode: STHH /* 1254 */ MCD_OPC_FilterValue, 202, 1, 8, 0, // Skip to: 1267 /* 1259 */ MCD_OPC_CheckPredicate, 3, 217, 8, // Skip to: 3528 /* 1263 */ MCD_OPC_Decode, 209, 4, 115, // Opcode: LFH /* 1267 */ MCD_OPC_FilterValue, 203, 1, 8, 0, // Skip to: 1280 /* 1272 */ MCD_OPC_CheckPredicate, 3, 204, 8, // Skip to: 3528 /* 1276 */ MCD_OPC_Decode, 216, 6, 115, // Opcode: STFH /* 1280 */ MCD_OPC_FilterValue, 205, 1, 8, 0, // Skip to: 1293 /* 1285 */ MCD_OPC_CheckPredicate, 3, 191, 8, // Skip to: 3528 /* 1289 */ MCD_OPC_Decode, 170, 3, 115, // Opcode: CHF /* 1293 */ MCD_OPC_FilterValue, 207, 1, 182, 8, // Skip to: 3528 /* 1298 */ MCD_OPC_CheckPredicate, 3, 178, 8, // Skip to: 3528 /* 1302 */ MCD_OPC_Decode, 202, 3, 115, // Opcode: CLHF /* 1306 */ MCD_OPC_FilterValue, 229, 1, 75, 0, // Skip to: 1386 /* 1311 */ MCD_OPC_ExtractField, 32, 8, // Inst{39-32} ... /* 1314 */ MCD_OPC_FilterValue, 68, 4, 0, // Skip to: 1322 /* 1318 */ MCD_OPC_Decode, 209, 5, 116, // Opcode: MVHHI /* 1322 */ MCD_OPC_FilterValue, 72, 4, 0, // Skip to: 1330 /* 1326 */ MCD_OPC_Decode, 208, 5, 116, // Opcode: MVGHI /* 1330 */ MCD_OPC_FilterValue, 76, 4, 0, // Skip to: 1338 /* 1334 */ MCD_OPC_Decode, 210, 5, 116, // Opcode: MVHI /* 1338 */ MCD_OPC_FilterValue, 84, 4, 0, // Skip to: 1346 /* 1342 */ MCD_OPC_Decode, 171, 3, 116, // Opcode: CHHSI /* 1346 */ MCD_OPC_FilterValue, 85, 4, 0, // Skip to: 1354 /* 1350 */ MCD_OPC_Decode, 203, 3, 117, // Opcode: CLHHSI /* 1354 */ MCD_OPC_FilterValue, 88, 4, 0, // Skip to: 1362 /* 1358 */ MCD_OPC_Decode, 163, 3, 116, // Opcode: CGHSI /* 1362 */ MCD_OPC_FilterValue, 89, 4, 0, // Skip to: 1370 /* 1366 */ MCD_OPC_Decode, 196, 3, 117, // Opcode: CLGHSI /* 1370 */ MCD_OPC_FilterValue, 92, 4, 0, // Skip to: 1378 /* 1374 */ MCD_OPC_Decode, 174, 3, 116, // Opcode: CHSI /* 1378 */ MCD_OPC_FilterValue, 93, 98, 8, // Skip to: 3528 /* 1382 */ MCD_OPC_Decode, 184, 3, 117, // Opcode: CLFHSI /* 1386 */ MCD_OPC_FilterValue, 235, 1, 54, 4, // Skip to: 2469 /* 1391 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ... /* 1394 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1402 /* 1398 */ MCD_OPC_Decode, 129, 5, 118, // Opcode: LMG /* 1402 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 1410 /* 1406 */ MCD_OPC_Decode, 198, 6, 119, // Opcode: SRAG /* 1410 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 1418 /* 1414 */ MCD_OPC_Decode, 202, 6, 119, // Opcode: SRLG /* 1418 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 1426 /* 1422 */ MCD_OPC_Decode, 186, 6, 119, // Opcode: SLLG /* 1426 */ MCD_OPC_FilterValue, 20, 4, 0, // Skip to: 1434 /* 1430 */ MCD_OPC_Decode, 226, 3, 120, // Opcode: CSY /* 1434 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 1442 /* 1438 */ MCD_OPC_Decode, 156, 6, 119, // Opcode: RLLG /* 1442 */ MCD_OPC_FilterValue, 29, 4, 0, // Skip to: 1450 /* 1446 */ MCD_OPC_Decode, 155, 6, 121, // Opcode: RLL /* 1450 */ MCD_OPC_FilterValue, 36, 4, 0, // Skip to: 1458 /* 1454 */ MCD_OPC_Decode, 224, 6, 118, // Opcode: STMG /* 1458 */ MCD_OPC_FilterValue, 48, 4, 0, // Skip to: 1466 /* 1462 */ MCD_OPC_Decode, 225, 3, 122, // Opcode: CSG /* 1466 */ MCD_OPC_FilterValue, 81, 4, 0, // Skip to: 1474 /* 1470 */ MCD_OPC_Decode, 255, 6, 123, // Opcode: TMY /* 1474 */ MCD_OPC_FilterValue, 82, 4, 0, // Skip to: 1482 /* 1478 */ MCD_OPC_Decode, 212, 5, 123, // Opcode: MVIY /* 1482 */ MCD_OPC_FilterValue, 84, 4, 0, // Skip to: 1490 /* 1486 */ MCD_OPC_Decode, 241, 5, 123, // Opcode: NIY /* 1490 */ MCD_OPC_FilterValue, 85, 4, 0, // Skip to: 1498 /* 1494 */ MCD_OPC_Decode, 208, 3, 123, // Opcode: CLIY /* 1498 */ MCD_OPC_FilterValue, 86, 4, 0, // Skip to: 1506 /* 1502 */ MCD_OPC_Decode, 140, 6, 123, // Opcode: OIY /* 1506 */ MCD_OPC_FilterValue, 87, 4, 0, // Skip to: 1514 /* 1510 */ MCD_OPC_Decode, 141, 7, 123, // Opcode: XIY /* 1514 */ MCD_OPC_FilterValue, 106, 3, 0, // Skip to: 1521 /* 1518 */ MCD_OPC_Decode, 68, 124, // Opcode: ASI /* 1521 */ MCD_OPC_FilterValue, 122, 3, 0, // Skip to: 1528 /* 1525 */ MCD_OPC_Decode, 41, 124, // Opcode: AGSI /* 1528 */ MCD_OPC_FilterValue, 220, 1, 8, 0, // Skip to: 1541 /* 1533 */ MCD_OPC_CheckPredicate, 2, 199, 7, // Skip to: 3528 /* 1537 */ MCD_OPC_Decode, 199, 6, 121, // Opcode: SRAK /* 1541 */ MCD_OPC_FilterValue, 222, 1, 8, 0, // Skip to: 1554 /* 1546 */ MCD_OPC_CheckPredicate, 2, 186, 7, // Skip to: 3528 /* 1550 */ MCD_OPC_Decode, 203, 6, 121, // Opcode: SRLK /* 1554 */ MCD_OPC_FilterValue, 223, 1, 8, 0, // Skip to: 1567 /* 1559 */ MCD_OPC_CheckPredicate, 2, 173, 7, // Skip to: 3528 /* 1563 */ MCD_OPC_Decode, 187, 6, 121, // Opcode: SLLK /* 1567 */ MCD_OPC_FilterValue, 226, 1, 179, 0, // Skip to: 1751 /* 1572 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 1575 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1587 /* 1579 */ MCD_OPC_CheckPredicate, 1, 160, 0, // Skip to: 1743 /* 1583 */ MCD_OPC_Decode, 248, 2, 125, // Opcode: AsmOLOCG /* 1587 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1599 /* 1591 */ MCD_OPC_CheckPredicate, 1, 148, 0, // Skip to: 1743 /* 1595 */ MCD_OPC_Decode, 177, 1, 125, // Opcode: AsmHLOCG /* 1599 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1611 /* 1603 */ MCD_OPC_CheckPredicate, 1, 136, 0, // Skip to: 1743 /* 1607 */ MCD_OPC_Decode, 213, 2, 125, // Opcode: AsmNLELOCG /* 1611 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 1623 /* 1615 */ MCD_OPC_CheckPredicate, 1, 124, 0, // Skip to: 1743 /* 1619 */ MCD_OPC_Decode, 172, 2, 125, // Opcode: AsmLLOCG /* 1623 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 1635 /* 1627 */ MCD_OPC_CheckPredicate, 1, 112, 0, // Skip to: 1743 /* 1631 */ MCD_OPC_Decode, 195, 2, 125, // Opcode: AsmNHELOCG /* 1635 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 1647 /* 1639 */ MCD_OPC_CheckPredicate, 1, 100, 0, // Skip to: 1743 /* 1643 */ MCD_OPC_Decode, 164, 2, 125, // Opcode: AsmLHLOCG /* 1647 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 1659 /* 1651 */ MCD_OPC_CheckPredicate, 1, 88, 0, // Skip to: 1743 /* 1655 */ MCD_OPC_Decode, 185, 2, 125, // Opcode: AsmNELOCG /* 1659 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1671 /* 1663 */ MCD_OPC_CheckPredicate, 1, 76, 0, // Skip to: 1743 /* 1667 */ MCD_OPC_Decode, 159, 1, 125, // Opcode: AsmELOCG /* 1671 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1683 /* 1675 */ MCD_OPC_CheckPredicate, 1, 64, 0, // Skip to: 1743 /* 1679 */ MCD_OPC_Decode, 222, 2, 125, // Opcode: AsmNLHLOCG /* 1683 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1695 /* 1687 */ MCD_OPC_CheckPredicate, 1, 52, 0, // Skip to: 1743 /* 1691 */ MCD_OPC_Decode, 169, 1, 125, // Opcode: AsmHELOCG /* 1695 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1707 /* 1699 */ MCD_OPC_CheckPredicate, 1, 40, 0, // Skip to: 1743 /* 1703 */ MCD_OPC_Decode, 230, 2, 125, // Opcode: AsmNLLOCG /* 1707 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 1719 /* 1711 */ MCD_OPC_CheckPredicate, 1, 28, 0, // Skip to: 1743 /* 1715 */ MCD_OPC_Decode, 155, 2, 125, // Opcode: AsmLELOCG /* 1719 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 1731 /* 1723 */ MCD_OPC_CheckPredicate, 1, 16, 0, // Skip to: 1743 /* 1727 */ MCD_OPC_Decode, 203, 2, 125, // Opcode: AsmNHLOCG /* 1731 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 1743 /* 1735 */ MCD_OPC_CheckPredicate, 1, 4, 0, // Skip to: 1743 /* 1739 */ MCD_OPC_Decode, 239, 2, 125, // Opcode: AsmNOLOCG /* 1743 */ MCD_OPC_CheckPredicate, 1, 245, 6, // Skip to: 3528 /* 1747 */ MCD_OPC_Decode, 176, 2, 126, // Opcode: AsmLOCG /* 1751 */ MCD_OPC_FilterValue, 227, 1, 180, 0, // Skip to: 1936 /* 1756 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 1759 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1771 /* 1763 */ MCD_OPC_CheckPredicate, 1, 160, 0, // Skip to: 1927 /* 1767 */ MCD_OPC_Decode, 252, 2, 127, // Opcode: AsmOSTOCG /* 1771 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1783 /* 1775 */ MCD_OPC_CheckPredicate, 1, 148, 0, // Skip to: 1927 /* 1779 */ MCD_OPC_Decode, 181, 1, 127, // Opcode: AsmHSTOCG /* 1783 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1795 /* 1787 */ MCD_OPC_CheckPredicate, 1, 136, 0, // Skip to: 1927 /* 1791 */ MCD_OPC_Decode, 217, 2, 127, // Opcode: AsmNLESTOCG /* 1795 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 1807 /* 1799 */ MCD_OPC_CheckPredicate, 1, 124, 0, // Skip to: 1927 /* 1803 */ MCD_OPC_Decode, 180, 2, 127, // Opcode: AsmLSTOCG /* 1807 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 1819 /* 1811 */ MCD_OPC_CheckPredicate, 1, 112, 0, // Skip to: 1927 /* 1815 */ MCD_OPC_Decode, 199, 2, 127, // Opcode: AsmNHESTOCG /* 1819 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 1831 /* 1823 */ MCD_OPC_CheckPredicate, 1, 100, 0, // Skip to: 1927 /* 1827 */ MCD_OPC_Decode, 168, 2, 127, // Opcode: AsmLHSTOCG /* 1831 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 1843 /* 1835 */ MCD_OPC_CheckPredicate, 1, 88, 0, // Skip to: 1927 /* 1839 */ MCD_OPC_Decode, 189, 2, 127, // Opcode: AsmNESTOCG /* 1843 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1855 /* 1847 */ MCD_OPC_CheckPredicate, 1, 76, 0, // Skip to: 1927 /* 1851 */ MCD_OPC_Decode, 163, 1, 127, // Opcode: AsmESTOCG /* 1855 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1867 /* 1859 */ MCD_OPC_CheckPredicate, 1, 64, 0, // Skip to: 1927 /* 1863 */ MCD_OPC_Decode, 226, 2, 127, // Opcode: AsmNLHSTOCG /* 1867 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1879 /* 1871 */ MCD_OPC_CheckPredicate, 1, 52, 0, // Skip to: 1927 /* 1875 */ MCD_OPC_Decode, 173, 1, 127, // Opcode: AsmHESTOCG /* 1879 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1891 /* 1883 */ MCD_OPC_CheckPredicate, 1, 40, 0, // Skip to: 1927 /* 1887 */ MCD_OPC_Decode, 234, 2, 127, // Opcode: AsmNLSTOCG /* 1891 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 1903 /* 1895 */ MCD_OPC_CheckPredicate, 1, 28, 0, // Skip to: 1927 /* 1899 */ MCD_OPC_Decode, 159, 2, 127, // Opcode: AsmLESTOCG /* 1903 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 1915 /* 1907 */ MCD_OPC_CheckPredicate, 1, 16, 0, // Skip to: 1927 /* 1911 */ MCD_OPC_Decode, 207, 2, 127, // Opcode: AsmNHSTOCG /* 1915 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 1927 /* 1919 */ MCD_OPC_CheckPredicate, 1, 4, 0, // Skip to: 1927 /* 1923 */ MCD_OPC_Decode, 243, 2, 127, // Opcode: AsmNOSTOCG /* 1927 */ MCD_OPC_CheckPredicate, 1, 61, 6, // Skip to: 3528 /* 1931 */ MCD_OPC_Decode, 254, 2, 128, 1, // Opcode: AsmSTOCG /* 1936 */ MCD_OPC_FilterValue, 228, 1, 8, 0, // Skip to: 1949 /* 1941 */ MCD_OPC_CheckPredicate, 4, 47, 6, // Skip to: 3528 /* 1945 */ MCD_OPC_Decode, 177, 4, 118, // Opcode: LANG /* 1949 */ MCD_OPC_FilterValue, 230, 1, 8, 0, // Skip to: 1962 /* 1954 */ MCD_OPC_CheckPredicate, 4, 34, 6, // Skip to: 3528 /* 1958 */ MCD_OPC_Decode, 179, 4, 118, // Opcode: LAOG /* 1962 */ MCD_OPC_FilterValue, 231, 1, 8, 0, // Skip to: 1975 /* 1967 */ MCD_OPC_CheckPredicate, 4, 21, 6, // Skip to: 3528 /* 1971 */ MCD_OPC_Decode, 182, 4, 118, // Opcode: LAXG /* 1975 */ MCD_OPC_FilterValue, 232, 1, 8, 0, // Skip to: 1988 /* 1980 */ MCD_OPC_CheckPredicate, 4, 8, 6, // Skip to: 3528 /* 1984 */ MCD_OPC_Decode, 173, 4, 118, // Opcode: LAAG /* 1988 */ MCD_OPC_FilterValue, 234, 1, 8, 0, // Skip to: 2001 /* 1993 */ MCD_OPC_CheckPredicate, 4, 251, 5, // Skip to: 3528 /* 1997 */ MCD_OPC_Decode, 175, 4, 118, // Opcode: LAALG /* 2001 */ MCD_OPC_FilterValue, 242, 1, 194, 0, // Skip to: 2200 /* 2006 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 2009 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 2022 /* 2013 */ MCD_OPC_CheckPredicate, 1, 174, 0, // Skip to: 2191 /* 2017 */ MCD_OPC_Decode, 247, 2, 129, 1, // Opcode: AsmOLOC /* 2022 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 2035 /* 2026 */ MCD_OPC_CheckPredicate, 1, 161, 0, // Skip to: 2191 /* 2030 */ MCD_OPC_Decode, 176, 1, 129, 1, // Opcode: AsmHLOC /* 2035 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 2048 /* 2039 */ MCD_OPC_CheckPredicate, 1, 148, 0, // Skip to: 2191 /* 2043 */ MCD_OPC_Decode, 212, 2, 129, 1, // Opcode: AsmNLELOC /* 2048 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 2061 /* 2052 */ MCD_OPC_CheckPredicate, 1, 135, 0, // Skip to: 2191 /* 2056 */ MCD_OPC_Decode, 171, 2, 129, 1, // Opcode: AsmLLOC /* 2061 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 2074 /* 2065 */ MCD_OPC_CheckPredicate, 1, 122, 0, // Skip to: 2191 /* 2069 */ MCD_OPC_Decode, 194, 2, 129, 1, // Opcode: AsmNHELOC /* 2074 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 2087 /* 2078 */ MCD_OPC_CheckPredicate, 1, 109, 0, // Skip to: 2191 /* 2082 */ MCD_OPC_Decode, 163, 2, 129, 1, // Opcode: AsmLHLOC /* 2087 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 2100 /* 2091 */ MCD_OPC_CheckPredicate, 1, 96, 0, // Skip to: 2191 /* 2095 */ MCD_OPC_Decode, 184, 2, 129, 1, // Opcode: AsmNELOC /* 2100 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 2113 /* 2104 */ MCD_OPC_CheckPredicate, 1, 83, 0, // Skip to: 2191 /* 2108 */ MCD_OPC_Decode, 158, 1, 129, 1, // Opcode: AsmELOC /* 2113 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 2126 /* 2117 */ MCD_OPC_CheckPredicate, 1, 70, 0, // Skip to: 2191 /* 2121 */ MCD_OPC_Decode, 221, 2, 129, 1, // Opcode: AsmNLHLOC /* 2126 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 2139 /* 2130 */ MCD_OPC_CheckPredicate, 1, 57, 0, // Skip to: 2191 /* 2134 */ MCD_OPC_Decode, 168, 1, 129, 1, // Opcode: AsmHELOC /* 2139 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 2152 /* 2143 */ MCD_OPC_CheckPredicate, 1, 44, 0, // Skip to: 2191 /* 2147 */ MCD_OPC_Decode, 229, 2, 129, 1, // Opcode: AsmNLLOC /* 2152 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 2165 /* 2156 */ MCD_OPC_CheckPredicate, 1, 31, 0, // Skip to: 2191 /* 2160 */ MCD_OPC_Decode, 154, 2, 129, 1, // Opcode: AsmLELOC /* 2165 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2178 /* 2169 */ MCD_OPC_CheckPredicate, 1, 18, 0, // Skip to: 2191 /* 2173 */ MCD_OPC_Decode, 202, 2, 129, 1, // Opcode: AsmNHLOC /* 2178 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 2191 /* 2182 */ MCD_OPC_CheckPredicate, 1, 5, 0, // Skip to: 2191 /* 2186 */ MCD_OPC_Decode, 238, 2, 129, 1, // Opcode: AsmNOLOC /* 2191 */ MCD_OPC_CheckPredicate, 1, 53, 5, // Skip to: 3528 /* 2195 */ MCD_OPC_Decode, 175, 2, 130, 1, // Opcode: AsmLOC /* 2200 */ MCD_OPC_FilterValue, 243, 1, 194, 0, // Skip to: 2399 /* 2205 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 2208 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 2221 /* 2212 */ MCD_OPC_CheckPredicate, 1, 174, 0, // Skip to: 2390 /* 2216 */ MCD_OPC_Decode, 251, 2, 131, 1, // Opcode: AsmOSTOC /* 2221 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 2234 /* 2225 */ MCD_OPC_CheckPredicate, 1, 161, 0, // Skip to: 2390 /* 2229 */ MCD_OPC_Decode, 180, 1, 131, 1, // Opcode: AsmHSTOC /* 2234 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 2247 /* 2238 */ MCD_OPC_CheckPredicate, 1, 148, 0, // Skip to: 2390 /* 2242 */ MCD_OPC_Decode, 216, 2, 131, 1, // Opcode: AsmNLESTOC /* 2247 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 2260 /* 2251 */ MCD_OPC_CheckPredicate, 1, 135, 0, // Skip to: 2390 /* 2255 */ MCD_OPC_Decode, 179, 2, 131, 1, // Opcode: AsmLSTOC /* 2260 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 2273 /* 2264 */ MCD_OPC_CheckPredicate, 1, 122, 0, // Skip to: 2390 /* 2268 */ MCD_OPC_Decode, 198, 2, 131, 1, // Opcode: AsmNHESTOC /* 2273 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 2286 /* 2277 */ MCD_OPC_CheckPredicate, 1, 109, 0, // Skip to: 2390 /* 2281 */ MCD_OPC_Decode, 167, 2, 131, 1, // Opcode: AsmLHSTOC /* 2286 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 2299 /* 2290 */ MCD_OPC_CheckPredicate, 1, 96, 0, // Skip to: 2390 /* 2294 */ MCD_OPC_Decode, 188, 2, 131, 1, // Opcode: AsmNESTOC /* 2299 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 2312 /* 2303 */ MCD_OPC_CheckPredicate, 1, 83, 0, // Skip to: 2390 /* 2307 */ MCD_OPC_Decode, 162, 1, 131, 1, // Opcode: AsmESTOC /* 2312 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 2325 /* 2316 */ MCD_OPC_CheckPredicate, 1, 70, 0, // Skip to: 2390 /* 2320 */ MCD_OPC_Decode, 225, 2, 131, 1, // Opcode: AsmNLHSTOC /* 2325 */ MCD_OPC_FilterValue, 10, 9, 0, // Skip to: 2338 /* 2329 */ MCD_OPC_CheckPredicate, 1, 57, 0, // Skip to: 2390 /* 2333 */ MCD_OPC_Decode, 172, 1, 131, 1, // Opcode: AsmHESTOC /* 2338 */ MCD_OPC_FilterValue, 11, 9, 0, // Skip to: 2351 /* 2342 */ MCD_OPC_CheckPredicate, 1, 44, 0, // Skip to: 2390 /* 2346 */ MCD_OPC_Decode, 233, 2, 131, 1, // Opcode: AsmNLSTOC /* 2351 */ MCD_OPC_FilterValue, 12, 9, 0, // Skip to: 2364 /* 2355 */ MCD_OPC_CheckPredicate, 1, 31, 0, // Skip to: 2390 /* 2359 */ MCD_OPC_Decode, 158, 2, 131, 1, // Opcode: AsmLESTOC /* 2364 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 2377 /* 2368 */ MCD_OPC_CheckPredicate, 1, 18, 0, // Skip to: 2390 /* 2372 */ MCD_OPC_Decode, 206, 2, 131, 1, // Opcode: AsmNHSTOC /* 2377 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 2390 /* 2381 */ MCD_OPC_CheckPredicate, 1, 5, 0, // Skip to: 2390 /* 2385 */ MCD_OPC_Decode, 242, 2, 131, 1, // Opcode: AsmNOSTOC /* 2390 */ MCD_OPC_CheckPredicate, 1, 110, 4, // Skip to: 3528 /* 2394 */ MCD_OPC_Decode, 253, 2, 132, 1, // Opcode: AsmSTOC /* 2399 */ MCD_OPC_FilterValue, 244, 1, 9, 0, // Skip to: 2413 /* 2404 */ MCD_OPC_CheckPredicate, 4, 96, 4, // Skip to: 3528 /* 2408 */ MCD_OPC_Decode, 176, 4, 133, 1, // Opcode: LAN /* 2413 */ MCD_OPC_FilterValue, 246, 1, 9, 0, // Skip to: 2427 /* 2418 */ MCD_OPC_CheckPredicate, 4, 82, 4, // Skip to: 3528 /* 2422 */ MCD_OPC_Decode, 178, 4, 133, 1, // Opcode: LAO /* 2427 */ MCD_OPC_FilterValue, 247, 1, 9, 0, // Skip to: 2441 /* 2432 */ MCD_OPC_CheckPredicate, 4, 68, 4, // Skip to: 3528 /* 2436 */ MCD_OPC_Decode, 181, 4, 133, 1, // Opcode: LAX /* 2441 */ MCD_OPC_FilterValue, 248, 1, 9, 0, // Skip to: 2455 /* 2446 */ MCD_OPC_CheckPredicate, 4, 54, 4, // Skip to: 3528 /* 2450 */ MCD_OPC_Decode, 172, 4, 133, 1, // Opcode: LAA /* 2455 */ MCD_OPC_FilterValue, 250, 1, 44, 4, // Skip to: 3528 /* 2460 */ MCD_OPC_CheckPredicate, 4, 40, 4, // Skip to: 3528 /* 2464 */ MCD_OPC_Decode, 174, 4, 133, 1, // Opcode: LAAL /* 2469 */ MCD_OPC_FilterValue, 236, 1, 185, 2, // Skip to: 3171 /* 2474 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ... /* 2477 */ MCD_OPC_FilterValue, 81, 9, 0, // Skip to: 2490 /* 2481 */ MCD_OPC_CheckPredicate, 3, 19, 4, // Skip to: 3528 /* 2485 */ MCD_OPC_Decode, 151, 6, 134, 1, // Opcode: RISBLG /* 2490 */ MCD_OPC_FilterValue, 84, 5, 0, // Skip to: 2499 /* 2494 */ MCD_OPC_Decode, 157, 6, 135, 1, // Opcode: RNSBG /* 2499 */ MCD_OPC_FilterValue, 85, 5, 0, // Skip to: 2508 /* 2503 */ MCD_OPC_Decode, 146, 6, 135, 1, // Opcode: RISBG /* 2508 */ MCD_OPC_FilterValue, 86, 5, 0, // Skip to: 2517 /* 2512 */ MCD_OPC_Decode, 158, 6, 135, 1, // Opcode: ROSBG /* 2517 */ MCD_OPC_FilterValue, 87, 5, 0, // Skip to: 2526 /* 2521 */ MCD_OPC_Decode, 159, 6, 135, 1, // Opcode: RXSBG /* 2526 */ MCD_OPC_FilterValue, 93, 9, 0, // Skip to: 2539 /* 2530 */ MCD_OPC_CheckPredicate, 3, 226, 3, // Skip to: 3528 /* 2534 */ MCD_OPC_Decode, 148, 6, 136, 1, // Opcode: RISBHG /* 2539 */ MCD_OPC_FilterValue, 100, 69, 0, // Skip to: 2612 /* 2543 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2546 */ MCD_OPC_FilterValue, 0, 210, 3, // Skip to: 3528 /* 2550 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 2553 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2562 /* 2557 */ MCD_OPC_Decode, 207, 1, 137, 1, // Opcode: AsmJHCGR /* 2562 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2571 /* 2566 */ MCD_OPC_Decode, 239, 1, 137, 1, // Opcode: AsmJLCGR /* 2571 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2580 /* 2575 */ MCD_OPC_Decode, 143, 2, 137, 1, // Opcode: AsmJLHCGR /* 2580 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 2589 /* 2584 */ MCD_OPC_Decode, 191, 1, 137, 1, // Opcode: AsmJECGR /* 2589 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 2598 /* 2593 */ MCD_OPC_Decode, 223, 1, 137, 1, // Opcode: AsmJHECGR /* 2598 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 2607 /* 2602 */ MCD_OPC_Decode, 255, 1, 137, 1, // Opcode: AsmJLECGR /* 2607 */ MCD_OPC_Decode, 148, 1, 138, 1, // Opcode: AsmCGRJ /* 2612 */ MCD_OPC_FilterValue, 101, 69, 0, // Skip to: 2685 /* 2616 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2619 */ MCD_OPC_FilterValue, 0, 137, 3, // Skip to: 3528 /* 2623 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 2626 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2635 /* 2630 */ MCD_OPC_Decode, 210, 1, 137, 1, // Opcode: AsmJHCLGR /* 2635 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2644 /* 2639 */ MCD_OPC_Decode, 242, 1, 137, 1, // Opcode: AsmJLCLGR /* 2644 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2653 /* 2648 */ MCD_OPC_Decode, 146, 2, 137, 1, // Opcode: AsmJLHCLGR /* 2653 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 2662 /* 2657 */ MCD_OPC_Decode, 194, 1, 137, 1, // Opcode: AsmJECLGR /* 2662 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 2671 /* 2666 */ MCD_OPC_Decode, 226, 1, 137, 1, // Opcode: AsmJHECLGR /* 2671 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 2680 /* 2675 */ MCD_OPC_Decode, 130, 2, 137, 1, // Opcode: AsmJLECLGR /* 2680 */ MCD_OPC_Decode, 151, 1, 138, 1, // Opcode: AsmCLGRJ /* 2685 */ MCD_OPC_FilterValue, 118, 69, 0, // Skip to: 2758 /* 2689 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2692 */ MCD_OPC_FilterValue, 0, 64, 3, // Skip to: 3528 /* 2696 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 2699 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2708 /* 2703 */ MCD_OPC_Decode, 213, 1, 139, 1, // Opcode: AsmJHCR /* 2708 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2717 /* 2712 */ MCD_OPC_Decode, 245, 1, 139, 1, // Opcode: AsmJLCR /* 2717 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2726 /* 2721 */ MCD_OPC_Decode, 149, 2, 139, 1, // Opcode: AsmJLHCR /* 2726 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 2735 /* 2730 */ MCD_OPC_Decode, 197, 1, 139, 1, // Opcode: AsmJECR /* 2735 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 2744 /* 2739 */ MCD_OPC_Decode, 229, 1, 139, 1, // Opcode: AsmJHECR /* 2744 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 2753 /* 2748 */ MCD_OPC_Decode, 133, 2, 139, 1, // Opcode: AsmJLECR /* 2753 */ MCD_OPC_Decode, 154, 1, 140, 1, // Opcode: AsmCRJ /* 2758 */ MCD_OPC_FilterValue, 119, 69, 0, // Skip to: 2831 /* 2762 */ MCD_OPC_ExtractField, 8, 4, // Inst{11-8} ... /* 2765 */ MCD_OPC_FilterValue, 0, 247, 2, // Skip to: 3528 /* 2769 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ... /* 2772 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2781 /* 2776 */ MCD_OPC_Decode, 212, 1, 139, 1, // Opcode: AsmJHCLR /* 2781 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2790 /* 2785 */ MCD_OPC_Decode, 244, 1, 139, 1, // Opcode: AsmJLCLR /* 2790 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2799 /* 2794 */ MCD_OPC_Decode, 148, 2, 139, 1, // Opcode: AsmJLHCLR /* 2799 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 2808 /* 2803 */ MCD_OPC_Decode, 196, 1, 139, 1, // Opcode: AsmJECLR /* 2808 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 2817 /* 2812 */ MCD_OPC_Decode, 228, 1, 139, 1, // Opcode: AsmJHECLR /* 2817 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 2826 /* 2821 */ MCD_OPC_Decode, 132, 2, 139, 1, // Opcode: AsmJLECLR /* 2826 */ MCD_OPC_Decode, 153, 1, 140, 1, // Opcode: AsmCLRJ /* 2831 */ MCD_OPC_FilterValue, 124, 62, 0, // Skip to: 2897 /* 2835 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 2838 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2847 /* 2842 */ MCD_OPC_Decode, 206, 1, 141, 1, // Opcode: AsmJHCGI /* 2847 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2856 /* 2851 */ MCD_OPC_Decode, 238, 1, 141, 1, // Opcode: AsmJLCGI /* 2856 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2865 /* 2860 */ MCD_OPC_Decode, 142, 2, 141, 1, // Opcode: AsmJLHCGI /* 2865 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 2874 /* 2869 */ MCD_OPC_Decode, 190, 1, 141, 1, // Opcode: AsmJECGI /* 2874 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 2883 /* 2878 */ MCD_OPC_Decode, 222, 1, 141, 1, // Opcode: AsmJHECGI /* 2883 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 2892 /* 2887 */ MCD_OPC_Decode, 254, 1, 141, 1, // Opcode: AsmJLECGI /* 2892 */ MCD_OPC_Decode, 147, 1, 142, 1, // Opcode: AsmCGIJ /* 2897 */ MCD_OPC_FilterValue, 125, 62, 0, // Skip to: 2963 /* 2901 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 2904 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2913 /* 2908 */ MCD_OPC_Decode, 209, 1, 143, 1, // Opcode: AsmJHCLGI /* 2913 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2922 /* 2917 */ MCD_OPC_Decode, 241, 1, 143, 1, // Opcode: AsmJLCLGI /* 2922 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2931 /* 2926 */ MCD_OPC_Decode, 145, 2, 143, 1, // Opcode: AsmJLHCLGI /* 2931 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 2940 /* 2935 */ MCD_OPC_Decode, 193, 1, 143, 1, // Opcode: AsmJECLGI /* 2940 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 2949 /* 2944 */ MCD_OPC_Decode, 225, 1, 143, 1, // Opcode: AsmJHECLGI /* 2949 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 2958 /* 2953 */ MCD_OPC_Decode, 129, 2, 143, 1, // Opcode: AsmJLECLGI /* 2958 */ MCD_OPC_Decode, 150, 1, 144, 1, // Opcode: AsmCLGIJ /* 2963 */ MCD_OPC_FilterValue, 126, 62, 0, // Skip to: 3029 /* 2967 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 2970 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 2979 /* 2974 */ MCD_OPC_Decode, 208, 1, 145, 1, // Opcode: AsmJHCI /* 2979 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 2988 /* 2983 */ MCD_OPC_Decode, 240, 1, 145, 1, // Opcode: AsmJLCI /* 2988 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 2997 /* 2992 */ MCD_OPC_Decode, 144, 2, 145, 1, // Opcode: AsmJLHCI /* 2997 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 3006 /* 3001 */ MCD_OPC_Decode, 192, 1, 145, 1, // Opcode: AsmJECI /* 3006 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 3015 /* 3010 */ MCD_OPC_Decode, 224, 1, 145, 1, // Opcode: AsmJHECI /* 3015 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 3024 /* 3019 */ MCD_OPC_Decode, 128, 2, 145, 1, // Opcode: AsmJLECI /* 3024 */ MCD_OPC_Decode, 149, 1, 146, 1, // Opcode: AsmCIJ /* 3029 */ MCD_OPC_FilterValue, 127, 62, 0, // Skip to: 3095 /* 3033 */ MCD_OPC_ExtractField, 32, 4, // Inst{35-32} ... /* 3036 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 3045 /* 3040 */ MCD_OPC_Decode, 211, 1, 147, 1, // Opcode: AsmJHCLI /* 3045 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 3054 /* 3049 */ MCD_OPC_Decode, 243, 1, 147, 1, // Opcode: AsmJLCLI /* 3054 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 3063 /* 3058 */ MCD_OPC_Decode, 147, 2, 147, 1, // Opcode: AsmJLHCLI /* 3063 */ MCD_OPC_FilterValue, 8, 5, 0, // Skip to: 3072 /* 3067 */ MCD_OPC_Decode, 195, 1, 147, 1, // Opcode: AsmJECLI /* 3072 */ MCD_OPC_FilterValue, 10, 5, 0, // Skip to: 3081 /* 3076 */ MCD_OPC_Decode, 227, 1, 147, 1, // Opcode: AsmJHECLI /* 3081 */ MCD_OPC_FilterValue, 12, 5, 0, // Skip to: 3090 /* 3085 */ MCD_OPC_Decode, 131, 2, 147, 1, // Opcode: AsmJLECLI /* 3090 */ MCD_OPC_Decode, 152, 1, 148, 1, // Opcode: AsmCLIJ /* 3095 */ MCD_OPC_FilterValue, 216, 1, 14, 0, // Skip to: 3114 /* 3100 */ MCD_OPC_CheckPredicate, 2, 168, 1, // Skip to: 3528 /* 3104 */ MCD_OPC_CheckField, 8, 8, 0, 162, 1, // Skip to: 3528 /* 3110 */ MCD_OPC_Decode, 44, 149, 1, // Opcode: AHIK /* 3114 */ MCD_OPC_FilterValue, 217, 1, 14, 0, // Skip to: 3133 /* 3119 */ MCD_OPC_CheckPredicate, 2, 149, 1, // Skip to: 3528 /* 3123 */ MCD_OPC_CheckField, 8, 8, 0, 143, 1, // Skip to: 3528 /* 3129 */ MCD_OPC_Decode, 38, 150, 1, // Opcode: AGHIK /* 3133 */ MCD_OPC_FilterValue, 218, 1, 14, 0, // Skip to: 3152 /* 3138 */ MCD_OPC_CheckPredicate, 2, 130, 1, // Skip to: 3528 /* 3142 */ MCD_OPC_CheckField, 8, 8, 0, 124, 1, // Skip to: 3528 /* 3148 */ MCD_OPC_Decode, 62, 149, 1, // Opcode: ALHSIK /* 3152 */ MCD_OPC_FilterValue, 219, 1, 115, 1, // Skip to: 3528 /* 3157 */ MCD_OPC_CheckPredicate, 2, 111, 1, // Skip to: 3528 /* 3161 */ MCD_OPC_CheckField, 8, 8, 0, 105, 1, // Skip to: 3528 /* 3167 */ MCD_OPC_Decode, 59, 150, 1, // Opcode: ALGHSIK /* 3171 */ MCD_OPC_FilterValue, 237, 1, 96, 1, // Skip to: 3528 /* 3176 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ... /* 3179 */ MCD_OPC_FilterValue, 4, 11, 0, // Skip to: 3194 /* 3183 */ MCD_OPC_CheckField, 8, 8, 0, 83, 1, // Skip to: 3528 /* 3189 */ MCD_OPC_Decode, 195, 4, 151, 1, // Opcode: LDEB /* 3194 */ MCD_OPC_FilterValue, 5, 11, 0, // Skip to: 3209 /* 3198 */ MCD_OPC_CheckField, 8, 8, 0, 68, 1, // Skip to: 3528 /* 3204 */ MCD_OPC_Decode, 167, 5, 152, 1, // Opcode: LXDB /* 3209 */ MCD_OPC_FilterValue, 6, 11, 0, // Skip to: 3224 /* 3213 */ MCD_OPC_CheckField, 8, 8, 0, 53, 1, // Skip to: 3528 /* 3219 */ MCD_OPC_Decode, 169, 5, 152, 1, // Opcode: LXEB /* 3224 */ MCD_OPC_FilterValue, 7, 11, 0, // Skip to: 3239 /* 3228 */ MCD_OPC_CheckField, 8, 8, 0, 38, 1, // Skip to: 3528 /* 3234 */ MCD_OPC_Decode, 216, 5, 153, 1, // Opcode: MXDB /* 3239 */ MCD_OPC_FilterValue, 9, 11, 0, // Skip to: 3254 /* 3243 */ MCD_OPC_CheckField, 8, 8, 0, 23, 1, // Skip to: 3528 /* 3249 */ MCD_OPC_Decode, 142, 3, 154, 1, // Opcode: CEB /* 3254 */ MCD_OPC_FilterValue, 10, 10, 0, // Skip to: 3268 /* 3258 */ MCD_OPC_CheckField, 8, 8, 0, 8, 1, // Skip to: 3528 /* 3264 */ MCD_OPC_Decode, 28, 155, 1, // Opcode: AEB /* 3268 */ MCD_OPC_FilterValue, 11, 11, 0, // Skip to: 3283 /* 3272 */ MCD_OPC_CheckField, 8, 8, 0, 250, 0, // Skip to: 3528 /* 3278 */ MCD_OPC_Decode, 164, 6, 155, 1, // Opcode: SEB /* 3283 */ MCD_OPC_FilterValue, 12, 11, 0, // Skip to: 3298 /* 3287 */ MCD_OPC_CheckField, 8, 8, 0, 235, 0, // Skip to: 3528 /* 3293 */ MCD_OPC_Decode, 182, 5, 156, 1, // Opcode: MDEB /* 3298 */ MCD_OPC_FilterValue, 13, 11, 0, // Skip to: 3313 /* 3302 */ MCD_OPC_CheckField, 8, 8, 0, 220, 0, // Skip to: 3528 /* 3308 */ MCD_OPC_Decode, 255, 3, 155, 1, // Opcode: DEB /* 3313 */ MCD_OPC_FilterValue, 14, 11, 0, // Skip to: 3328 /* 3317 */ MCD_OPC_CheckField, 8, 4, 0, 205, 0, // Skip to: 3528 /* 3323 */ MCD_OPC_Decode, 178, 5, 157, 1, // Opcode: MAEB /* 3328 */ MCD_OPC_FilterValue, 15, 11, 0, // Skip to: 3343 /* 3332 */ MCD_OPC_CheckField, 8, 4, 0, 190, 0, // Skip to: 3528 /* 3338 */ MCD_OPC_Decode, 195, 5, 157, 1, // Opcode: MSEB /* 3343 */ MCD_OPC_FilterValue, 20, 11, 0, // Skip to: 3358 /* 3347 */ MCD_OPC_CheckField, 8, 8, 0, 175, 0, // Skip to: 3528 /* 3353 */ MCD_OPC_Decode, 193, 6, 154, 1, // Opcode: SQEB /* 3358 */ MCD_OPC_FilterValue, 21, 11, 0, // Skip to: 3373 /* 3362 */ MCD_OPC_CheckField, 8, 8, 0, 160, 0, // Skip to: 3528 /* 3368 */ MCD_OPC_Decode, 191, 6, 151, 1, // Opcode: SQDB /* 3373 */ MCD_OPC_FilterValue, 23, 11, 0, // Skip to: 3388 /* 3377 */ MCD_OPC_CheckField, 8, 8, 0, 145, 0, // Skip to: 3528 /* 3383 */ MCD_OPC_Decode, 184, 5, 155, 1, // Opcode: MEEB /* 3388 */ MCD_OPC_FilterValue, 25, 11, 0, // Skip to: 3403 /* 3392 */ MCD_OPC_CheckField, 8, 8, 0, 130, 0, // Skip to: 3528 /* 3398 */ MCD_OPC_Decode, 136, 3, 151, 1, // Opcode: CDB /* 3403 */ MCD_OPC_FilterValue, 26, 10, 0, // Skip to: 3417 /* 3407 */ MCD_OPC_CheckField, 8, 8, 0, 115, 0, // Skip to: 3528 /* 3413 */ MCD_OPC_Decode, 23, 156, 1, // Opcode: ADB /* 3417 */ MCD_OPC_FilterValue, 27, 11, 0, // Skip to: 3432 /* 3421 */ MCD_OPC_CheckField, 8, 8, 0, 101, 0, // Skip to: 3528 /* 3427 */ MCD_OPC_Decode, 162, 6, 156, 1, // Opcode: SDB /* 3432 */ MCD_OPC_FilterValue, 28, 11, 0, // Skip to: 3447 /* 3436 */ MCD_OPC_CheckField, 8, 8, 0, 86, 0, // Skip to: 3528 /* 3442 */ MCD_OPC_Decode, 180, 5, 156, 1, // Opcode: MDB /* 3447 */ MCD_OPC_FilterValue, 29, 11, 0, // Skip to: 3462 /* 3451 */ MCD_OPC_CheckField, 8, 8, 0, 71, 0, // Skip to: 3528 /* 3457 */ MCD_OPC_Decode, 253, 3, 156, 1, // Opcode: DDB /* 3462 */ MCD_OPC_FilterValue, 30, 11, 0, // Skip to: 3477 /* 3466 */ MCD_OPC_CheckField, 8, 4, 0, 56, 0, // Skip to: 3528 /* 3472 */ MCD_OPC_Decode, 176, 5, 158, 1, // Opcode: MADB /* 3477 */ MCD_OPC_FilterValue, 31, 11, 0, // Skip to: 3492 /* 3481 */ MCD_OPC_CheckField, 8, 4, 0, 41, 0, // Skip to: 3528 /* 3487 */ MCD_OPC_Decode, 193, 5, 158, 1, // Opcode: MSDB /* 3492 */ MCD_OPC_FilterValue, 100, 5, 0, // Skip to: 3501 /* 3496 */ MCD_OPC_Decode, 208, 4, 159, 1, // Opcode: LEY /* 3501 */ MCD_OPC_FilterValue, 101, 5, 0, // Skip to: 3510 /* 3505 */ MCD_OPC_Decode, 201, 4, 160, 1, // Opcode: LDY /* 3510 */ MCD_OPC_FilterValue, 102, 5, 0, // Skip to: 3519 /* 3514 */ MCD_OPC_Decode, 215, 6, 159, 1, // Opcode: STEY /* 3519 */ MCD_OPC_FilterValue, 103, 5, 0, // Skip to: 3528 /* 3523 */ MCD_OPC_Decode, 213, 6, 160, 1, // Opcode: STDY /* 3528 */ MCD_OPC_Fail, 0 }; static bool getbool(uint64_t b) { return b != 0; } static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { switch (Idx) { default: // llvm_unreachable("Invalid index!"); case 0: return getbool((Bits & SystemZ_FeatureFPExtension)); case 1: return getbool((Bits & SystemZ_FeatureLoadStoreOnCond)); case 2: return getbool((Bits & SystemZ_FeatureDistinctOps)); case 3: return getbool((Bits & SystemZ_FeatureHighWord)); case 4: return getbool((Bits & SystemZ_FeatureInterlockedAccess1)); } } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, const void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ tmp = fieldname(insn, 0, 4); \ if (DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 1: \ tmp = fieldname(insn, 4, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 2: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 3: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 4: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 5: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 6: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 7: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 9: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 11: \ tmp = fieldname(insn, 20, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 12: \ tmp = fieldname(insn, 20, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 13: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeBDAddr32Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 0, 16); \ if (decodeBDAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 15: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeU16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 16: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeU16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeU16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 18: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeU16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 19: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeU16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 20: \ tmp = fieldname(insn, 0, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 21: \ tmp = fieldname(insn, 20, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 22: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 23: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 25: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (decodeAccessRegOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 33: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 34: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 37: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 38: \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 39: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 40: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 41: \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 42: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 43: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 44: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 45: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 46: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 47: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 48: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 49: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 50: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 51: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 52: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 53: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 54: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 55: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 56: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 57: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 58: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 59: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 60: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 61: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 62: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 63: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 64: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 65: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 66: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 67: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 68: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 69: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 70: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 71: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 72: \ tmp = fieldname(insn, 4, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 73: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 74: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 75: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 76: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 77: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 78: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 79: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 80: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 81: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 82: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 83: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 84: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 85: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 86: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 87: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 88: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 89: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 90: \ tmp = fieldname(insn, 4, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 91: \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 20, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeBDAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 92: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodePC32DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 93: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeS32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 94: \ tmp = fieldname(insn, 0, 32); \ if (decodePC32DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 95: \ tmp = fieldname(insn, 36, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodePC32DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 96: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeU32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 97: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeU32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 98: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeU32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 99: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeU32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 100: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeU32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 101: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeS32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 102: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeS32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 103: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeU32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 104: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeS32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 105: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodePC32DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 106: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeS32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 107: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 32); \ if (decodeS32ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 108: \ tmp = fieldname(insn, 16, 24); \ if (decodeBDLAddr64Disp12Len8Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeBDAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 109: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 110: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 111: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 112: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 113: \ tmp = fieldname(insn, 36, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 114: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 115: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 116: \ tmp = fieldname(insn, 16, 16); \ if (decodeBDAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 117: \ tmp = fieldname(insn, 16, 16); \ if (decodeBDAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 16); \ if (decodeU16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 118: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 119: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr32Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 120: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 121: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr32Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 122: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 123: \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 124: \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 8); \ if (decodeS8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 125: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 126: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 127: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 128: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 129: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 130: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 131: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 132: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 133: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 24); \ if (decodeBDAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 134: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 24, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU6ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 135: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 24, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU6ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 136: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 24, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU6ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 137: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 138: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 139: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 140: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 141: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeS8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 142: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeS8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 143: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 144: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 145: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeS8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 146: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeS8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 147: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 148: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 8); \ if (decodeU8ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (decodeU4ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodePC16DBLOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 149: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 150: \ tmp = fieldname(insn, 36, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 32, 4); \ if (DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 16); \ if (decodeS16ImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 151: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 152: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 153: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 154: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 155: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 156: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 157: \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 158: \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 20); \ if (decodeBDXAddr64Disp12Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 159: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 160: \ tmp = fieldname(insn, 36, 4); \ if (DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 8, 28); \ if (decodeBDXAddr64Disp20Operand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \ { \ uint64_t Bits = getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction, uint64_t) DecodeToMCInst(decodeToMCInst, fieldFromInstruction, uint64_t) DecodeInstruction(decodeInstruction, fieldFromInstruction, decodeToMCInst, uint64_t) capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZGenInstrInfo.inc010066400017500001750000000612461363402546700232350ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { SystemZ_PHI = 0, SystemZ_INLINEASM = 1, SystemZ_CFI_INSTRUCTION = 2, SystemZ_EH_LABEL = 3, SystemZ_GC_LABEL = 4, SystemZ_KILL = 5, SystemZ_EXTRACT_SUBREG = 6, SystemZ_INSERT_SUBREG = 7, SystemZ_IMPLICIT_DEF = 8, SystemZ_SUBREG_TO_REG = 9, SystemZ_COPY_TO_REGCLASS = 10, SystemZ_DBG_VALUE = 11, SystemZ_REG_SEQUENCE = 12, SystemZ_COPY = 13, SystemZ_BUNDLE = 14, SystemZ_LIFETIME_START = 15, SystemZ_LIFETIME_END = 16, SystemZ_STACKMAP = 17, SystemZ_PATCHPOINT = 18, SystemZ_LOAD_STACK_GUARD = 19, SystemZ_STATEPOINT = 20, SystemZ_FRAME_ALLOC = 21, SystemZ_A = 22, SystemZ_ADB = 23, SystemZ_ADBR = 24, SystemZ_ADJCALLSTACKDOWN = 25, SystemZ_ADJCALLSTACKUP = 26, SystemZ_ADJDYNALLOC = 27, SystemZ_AEB = 28, SystemZ_AEBR = 29, SystemZ_AEXT128_64 = 30, SystemZ_AFI = 31, SystemZ_AFIMux = 32, SystemZ_AG = 33, SystemZ_AGF = 34, SystemZ_AGFI = 35, SystemZ_AGFR = 36, SystemZ_AGHI = 37, SystemZ_AGHIK = 38, SystemZ_AGR = 39, SystemZ_AGRK = 40, SystemZ_AGSI = 41, SystemZ_AH = 42, SystemZ_AHI = 43, SystemZ_AHIK = 44, SystemZ_AHIMux = 45, SystemZ_AHIMuxK = 46, SystemZ_AHY = 47, SystemZ_AIH = 48, SystemZ_AL = 49, SystemZ_ALC = 50, SystemZ_ALCG = 51, SystemZ_ALCGR = 52, SystemZ_ALCR = 53, SystemZ_ALFI = 54, SystemZ_ALG = 55, SystemZ_ALGF = 56, SystemZ_ALGFI = 57, SystemZ_ALGFR = 58, SystemZ_ALGHSIK = 59, SystemZ_ALGR = 60, SystemZ_ALGRK = 61, SystemZ_ALHSIK = 62, SystemZ_ALR = 63, SystemZ_ALRK = 64, SystemZ_ALY = 65, SystemZ_AR = 66, SystemZ_ARK = 67, SystemZ_ASI = 68, SystemZ_ATOMIC_CMP_SWAPW = 69, SystemZ_ATOMIC_LOADW_AFI = 70, SystemZ_ATOMIC_LOADW_AR = 71, SystemZ_ATOMIC_LOADW_MAX = 72, SystemZ_ATOMIC_LOADW_MIN = 73, SystemZ_ATOMIC_LOADW_NILH = 74, SystemZ_ATOMIC_LOADW_NILHi = 75, SystemZ_ATOMIC_LOADW_NR = 76, SystemZ_ATOMIC_LOADW_NRi = 77, SystemZ_ATOMIC_LOADW_OILH = 78, SystemZ_ATOMIC_LOADW_OR = 79, SystemZ_ATOMIC_LOADW_SR = 80, SystemZ_ATOMIC_LOADW_UMAX = 81, SystemZ_ATOMIC_LOADW_UMIN = 82, SystemZ_ATOMIC_LOADW_XILF = 83, SystemZ_ATOMIC_LOADW_XR = 84, SystemZ_ATOMIC_LOAD_AFI = 85, SystemZ_ATOMIC_LOAD_AGFI = 86, SystemZ_ATOMIC_LOAD_AGHI = 87, SystemZ_ATOMIC_LOAD_AGR = 88, SystemZ_ATOMIC_LOAD_AHI = 89, SystemZ_ATOMIC_LOAD_AR = 90, SystemZ_ATOMIC_LOAD_MAX_32 = 91, SystemZ_ATOMIC_LOAD_MAX_64 = 92, SystemZ_ATOMIC_LOAD_MIN_32 = 93, SystemZ_ATOMIC_LOAD_MIN_64 = 94, SystemZ_ATOMIC_LOAD_NGR = 95, SystemZ_ATOMIC_LOAD_NGRi = 96, SystemZ_ATOMIC_LOAD_NIHF64 = 97, SystemZ_ATOMIC_LOAD_NIHF64i = 98, SystemZ_ATOMIC_LOAD_NIHH64 = 99, SystemZ_ATOMIC_LOAD_NIHH64i = 100, SystemZ_ATOMIC_LOAD_NIHL64 = 101, SystemZ_ATOMIC_LOAD_NIHL64i = 102, SystemZ_ATOMIC_LOAD_NILF = 103, SystemZ_ATOMIC_LOAD_NILF64 = 104, SystemZ_ATOMIC_LOAD_NILF64i = 105, SystemZ_ATOMIC_LOAD_NILFi = 106, SystemZ_ATOMIC_LOAD_NILH = 107, SystemZ_ATOMIC_LOAD_NILH64 = 108, SystemZ_ATOMIC_LOAD_NILH64i = 109, SystemZ_ATOMIC_LOAD_NILHi = 110, SystemZ_ATOMIC_LOAD_NILL = 111, SystemZ_ATOMIC_LOAD_NILL64 = 112, SystemZ_ATOMIC_LOAD_NILL64i = 113, SystemZ_ATOMIC_LOAD_NILLi = 114, SystemZ_ATOMIC_LOAD_NR = 115, SystemZ_ATOMIC_LOAD_NRi = 116, SystemZ_ATOMIC_LOAD_OGR = 117, SystemZ_ATOMIC_LOAD_OIHF64 = 118, SystemZ_ATOMIC_LOAD_OIHH64 = 119, SystemZ_ATOMIC_LOAD_OIHL64 = 120, SystemZ_ATOMIC_LOAD_OILF = 121, SystemZ_ATOMIC_LOAD_OILF64 = 122, SystemZ_ATOMIC_LOAD_OILH = 123, SystemZ_ATOMIC_LOAD_OILH64 = 124, SystemZ_ATOMIC_LOAD_OILL = 125, SystemZ_ATOMIC_LOAD_OILL64 = 126, SystemZ_ATOMIC_LOAD_OR = 127, SystemZ_ATOMIC_LOAD_SGR = 128, SystemZ_ATOMIC_LOAD_SR = 129, SystemZ_ATOMIC_LOAD_UMAX_32 = 130, SystemZ_ATOMIC_LOAD_UMAX_64 = 131, SystemZ_ATOMIC_LOAD_UMIN_32 = 132, SystemZ_ATOMIC_LOAD_UMIN_64 = 133, SystemZ_ATOMIC_LOAD_XGR = 134, SystemZ_ATOMIC_LOAD_XIHF64 = 135, SystemZ_ATOMIC_LOAD_XILF = 136, SystemZ_ATOMIC_LOAD_XILF64 = 137, SystemZ_ATOMIC_LOAD_XR = 138, SystemZ_ATOMIC_SWAPW = 139, SystemZ_ATOMIC_SWAP_32 = 140, SystemZ_ATOMIC_SWAP_64 = 141, SystemZ_AXBR = 142, SystemZ_AY = 143, SystemZ_AsmBCR = 144, SystemZ_AsmBRC = 145, SystemZ_AsmBRCL = 146, SystemZ_AsmCGIJ = 147, SystemZ_AsmCGRJ = 148, SystemZ_AsmCIJ = 149, SystemZ_AsmCLGIJ = 150, SystemZ_AsmCLGRJ = 151, SystemZ_AsmCLIJ = 152, SystemZ_AsmCLRJ = 153, SystemZ_AsmCRJ = 154, SystemZ_AsmEBR = 155, SystemZ_AsmEJ = 156, SystemZ_AsmEJG = 157, SystemZ_AsmELOC = 158, SystemZ_AsmELOCG = 159, SystemZ_AsmELOCGR = 160, SystemZ_AsmELOCR = 161, SystemZ_AsmESTOC = 162, SystemZ_AsmESTOCG = 163, SystemZ_AsmHBR = 164, SystemZ_AsmHEBR = 165, SystemZ_AsmHEJ = 166, SystemZ_AsmHEJG = 167, SystemZ_AsmHELOC = 168, SystemZ_AsmHELOCG = 169, SystemZ_AsmHELOCGR = 170, SystemZ_AsmHELOCR = 171, SystemZ_AsmHESTOC = 172, SystemZ_AsmHESTOCG = 173, SystemZ_AsmHJ = 174, SystemZ_AsmHJG = 175, SystemZ_AsmHLOC = 176, SystemZ_AsmHLOCG = 177, SystemZ_AsmHLOCGR = 178, SystemZ_AsmHLOCR = 179, SystemZ_AsmHSTOC = 180, SystemZ_AsmHSTOCG = 181, SystemZ_AsmJEAltCGI = 182, SystemZ_AsmJEAltCGR = 183, SystemZ_AsmJEAltCI = 184, SystemZ_AsmJEAltCLGI = 185, SystemZ_AsmJEAltCLGR = 186, SystemZ_AsmJEAltCLI = 187, SystemZ_AsmJEAltCLR = 188, SystemZ_AsmJEAltCR = 189, SystemZ_AsmJECGI = 190, SystemZ_AsmJECGR = 191, SystemZ_AsmJECI = 192, SystemZ_AsmJECLGI = 193, SystemZ_AsmJECLGR = 194, SystemZ_AsmJECLI = 195, SystemZ_AsmJECLR = 196, SystemZ_AsmJECR = 197, SystemZ_AsmJHAltCGI = 198, SystemZ_AsmJHAltCGR = 199, SystemZ_AsmJHAltCI = 200, SystemZ_AsmJHAltCLGI = 201, SystemZ_AsmJHAltCLGR = 202, SystemZ_AsmJHAltCLI = 203, SystemZ_AsmJHAltCLR = 204, SystemZ_AsmJHAltCR = 205, SystemZ_AsmJHCGI = 206, SystemZ_AsmJHCGR = 207, SystemZ_AsmJHCI = 208, SystemZ_AsmJHCLGI = 209, SystemZ_AsmJHCLGR = 210, SystemZ_AsmJHCLI = 211, SystemZ_AsmJHCLR = 212, SystemZ_AsmJHCR = 213, SystemZ_AsmJHEAltCGI = 214, SystemZ_AsmJHEAltCGR = 215, SystemZ_AsmJHEAltCI = 216, SystemZ_AsmJHEAltCLGI = 217, SystemZ_AsmJHEAltCLGR = 218, SystemZ_AsmJHEAltCLI = 219, SystemZ_AsmJHEAltCLR = 220, SystemZ_AsmJHEAltCR = 221, SystemZ_AsmJHECGI = 222, SystemZ_AsmJHECGR = 223, SystemZ_AsmJHECI = 224, SystemZ_AsmJHECLGI = 225, SystemZ_AsmJHECLGR = 226, SystemZ_AsmJHECLI = 227, SystemZ_AsmJHECLR = 228, SystemZ_AsmJHECR = 229, SystemZ_AsmJLAltCGI = 230, SystemZ_AsmJLAltCGR = 231, SystemZ_AsmJLAltCI = 232, SystemZ_AsmJLAltCLGI = 233, SystemZ_AsmJLAltCLGR = 234, SystemZ_AsmJLAltCLI = 235, SystemZ_AsmJLAltCLR = 236, SystemZ_AsmJLAltCR = 237, SystemZ_AsmJLCGI = 238, SystemZ_AsmJLCGR = 239, SystemZ_AsmJLCI = 240, SystemZ_AsmJLCLGI = 241, SystemZ_AsmJLCLGR = 242, SystemZ_AsmJLCLI = 243, SystemZ_AsmJLCLR = 244, SystemZ_AsmJLCR = 245, SystemZ_AsmJLEAltCGI = 246, SystemZ_AsmJLEAltCGR = 247, SystemZ_AsmJLEAltCI = 248, SystemZ_AsmJLEAltCLGI = 249, SystemZ_AsmJLEAltCLGR = 250, SystemZ_AsmJLEAltCLI = 251, SystemZ_AsmJLEAltCLR = 252, SystemZ_AsmJLEAltCR = 253, SystemZ_AsmJLECGI = 254, SystemZ_AsmJLECGR = 255, SystemZ_AsmJLECI = 256, SystemZ_AsmJLECLGI = 257, SystemZ_AsmJLECLGR = 258, SystemZ_AsmJLECLI = 259, SystemZ_AsmJLECLR = 260, SystemZ_AsmJLECR = 261, SystemZ_AsmJLHAltCGI = 262, SystemZ_AsmJLHAltCGR = 263, SystemZ_AsmJLHAltCI = 264, SystemZ_AsmJLHAltCLGI = 265, SystemZ_AsmJLHAltCLGR = 266, SystemZ_AsmJLHAltCLI = 267, SystemZ_AsmJLHAltCLR = 268, SystemZ_AsmJLHAltCR = 269, SystemZ_AsmJLHCGI = 270, SystemZ_AsmJLHCGR = 271, SystemZ_AsmJLHCI = 272, SystemZ_AsmJLHCLGI = 273, SystemZ_AsmJLHCLGR = 274, SystemZ_AsmJLHCLI = 275, SystemZ_AsmJLHCLR = 276, SystemZ_AsmJLHCR = 277, SystemZ_AsmLBR = 278, SystemZ_AsmLEBR = 279, SystemZ_AsmLEJ = 280, SystemZ_AsmLEJG = 281, SystemZ_AsmLELOC = 282, SystemZ_AsmLELOCG = 283, SystemZ_AsmLELOCGR = 284, SystemZ_AsmLELOCR = 285, SystemZ_AsmLESTOC = 286, SystemZ_AsmLESTOCG = 287, SystemZ_AsmLHBR = 288, SystemZ_AsmLHJ = 289, SystemZ_AsmLHJG = 290, SystemZ_AsmLHLOC = 291, SystemZ_AsmLHLOCG = 292, SystemZ_AsmLHLOCGR = 293, SystemZ_AsmLHLOCR = 294, SystemZ_AsmLHSTOC = 295, SystemZ_AsmLHSTOCG = 296, SystemZ_AsmLJ = 297, SystemZ_AsmLJG = 298, SystemZ_AsmLLOC = 299, SystemZ_AsmLLOCG = 300, SystemZ_AsmLLOCGR = 301, SystemZ_AsmLLOCR = 302, SystemZ_AsmLOC = 303, SystemZ_AsmLOCG = 304, SystemZ_AsmLOCGR = 305, SystemZ_AsmLOCR = 306, SystemZ_AsmLSTOC = 307, SystemZ_AsmLSTOCG = 308, SystemZ_AsmNEBR = 309, SystemZ_AsmNEJ = 310, SystemZ_AsmNEJG = 311, SystemZ_AsmNELOC = 312, SystemZ_AsmNELOCG = 313, SystemZ_AsmNELOCGR = 314, SystemZ_AsmNELOCR = 315, SystemZ_AsmNESTOC = 316, SystemZ_AsmNESTOCG = 317, SystemZ_AsmNHBR = 318, SystemZ_AsmNHEBR = 319, SystemZ_AsmNHEJ = 320, SystemZ_AsmNHEJG = 321, SystemZ_AsmNHELOC = 322, SystemZ_AsmNHELOCG = 323, SystemZ_AsmNHELOCGR = 324, SystemZ_AsmNHELOCR = 325, SystemZ_AsmNHESTOC = 326, SystemZ_AsmNHESTOCG = 327, SystemZ_AsmNHJ = 328, SystemZ_AsmNHJG = 329, SystemZ_AsmNHLOC = 330, SystemZ_AsmNHLOCG = 331, SystemZ_AsmNHLOCGR = 332, SystemZ_AsmNHLOCR = 333, SystemZ_AsmNHSTOC = 334, SystemZ_AsmNHSTOCG = 335, SystemZ_AsmNLBR = 336, SystemZ_AsmNLEBR = 337, SystemZ_AsmNLEJ = 338, SystemZ_AsmNLEJG = 339, SystemZ_AsmNLELOC = 340, SystemZ_AsmNLELOCG = 341, SystemZ_AsmNLELOCGR = 342, SystemZ_AsmNLELOCR = 343, SystemZ_AsmNLESTOC = 344, SystemZ_AsmNLESTOCG = 345, SystemZ_AsmNLHBR = 346, SystemZ_AsmNLHJ = 347, SystemZ_AsmNLHJG = 348, SystemZ_AsmNLHLOC = 349, SystemZ_AsmNLHLOCG = 350, SystemZ_AsmNLHLOCGR = 351, SystemZ_AsmNLHLOCR = 352, SystemZ_AsmNLHSTOC = 353, SystemZ_AsmNLHSTOCG = 354, SystemZ_AsmNLJ = 355, SystemZ_AsmNLJG = 356, SystemZ_AsmNLLOC = 357, SystemZ_AsmNLLOCG = 358, SystemZ_AsmNLLOCGR = 359, SystemZ_AsmNLLOCR = 360, SystemZ_AsmNLSTOC = 361, SystemZ_AsmNLSTOCG = 362, SystemZ_AsmNOBR = 363, SystemZ_AsmNOJ = 364, SystemZ_AsmNOJG = 365, SystemZ_AsmNOLOC = 366, SystemZ_AsmNOLOCG = 367, SystemZ_AsmNOLOCGR = 368, SystemZ_AsmNOLOCR = 369, SystemZ_AsmNOSTOC = 370, SystemZ_AsmNOSTOCG = 371, SystemZ_AsmOBR = 372, SystemZ_AsmOJ = 373, SystemZ_AsmOJG = 374, SystemZ_AsmOLOC = 375, SystemZ_AsmOLOCG = 376, SystemZ_AsmOLOCGR = 377, SystemZ_AsmOLOCR = 378, SystemZ_AsmOSTOC = 379, SystemZ_AsmOSTOCG = 380, SystemZ_AsmSTOC = 381, SystemZ_AsmSTOCG = 382, SystemZ_BASR = 383, SystemZ_BR = 384, SystemZ_BRAS = 385, SystemZ_BRASL = 386, SystemZ_BRC = 387, SystemZ_BRCL = 388, SystemZ_BRCT = 389, SystemZ_BRCTG = 390, SystemZ_C = 391, SystemZ_CDB = 392, SystemZ_CDBR = 393, SystemZ_CDFBR = 394, SystemZ_CDGBR = 395, SystemZ_CDLFBR = 396, SystemZ_CDLGBR = 397, SystemZ_CEB = 398, SystemZ_CEBR = 399, SystemZ_CEFBR = 400, SystemZ_CEGBR = 401, SystemZ_CELFBR = 402, SystemZ_CELGBR = 403, SystemZ_CFDBR = 404, SystemZ_CFEBR = 405, SystemZ_CFI = 406, SystemZ_CFIMux = 407, SystemZ_CFXBR = 408, SystemZ_CG = 409, SystemZ_CGDBR = 410, SystemZ_CGEBR = 411, SystemZ_CGF = 412, SystemZ_CGFI = 413, SystemZ_CGFR = 414, SystemZ_CGFRL = 415, SystemZ_CGH = 416, SystemZ_CGHI = 417, SystemZ_CGHRL = 418, SystemZ_CGHSI = 419, SystemZ_CGIJ = 420, SystemZ_CGR = 421, SystemZ_CGRJ = 422, SystemZ_CGRL = 423, SystemZ_CGXBR = 424, SystemZ_CH = 425, SystemZ_CHF = 426, SystemZ_CHHSI = 427, SystemZ_CHI = 428, SystemZ_CHRL = 429, SystemZ_CHSI = 430, SystemZ_CHY = 431, SystemZ_CIH = 432, SystemZ_CIJ = 433, SystemZ_CL = 434, SystemZ_CLC = 435, SystemZ_CLCLoop = 436, SystemZ_CLCSequence = 437, SystemZ_CLFDBR = 438, SystemZ_CLFEBR = 439, SystemZ_CLFHSI = 440, SystemZ_CLFI = 441, SystemZ_CLFIMux = 442, SystemZ_CLFXBR = 443, SystemZ_CLG = 444, SystemZ_CLGDBR = 445, SystemZ_CLGEBR = 446, SystemZ_CLGF = 447, SystemZ_CLGFI = 448, SystemZ_CLGFR = 449, SystemZ_CLGFRL = 450, SystemZ_CLGHRL = 451, SystemZ_CLGHSI = 452, SystemZ_CLGIJ = 453, SystemZ_CLGR = 454, SystemZ_CLGRJ = 455, SystemZ_CLGRL = 456, SystemZ_CLGXBR = 457, SystemZ_CLHF = 458, SystemZ_CLHHSI = 459, SystemZ_CLHRL = 460, SystemZ_CLI = 461, SystemZ_CLIH = 462, SystemZ_CLIJ = 463, SystemZ_CLIY = 464, SystemZ_CLMux = 465, SystemZ_CLR = 466, SystemZ_CLRJ = 467, SystemZ_CLRL = 468, SystemZ_CLST = 469, SystemZ_CLSTLoop = 470, SystemZ_CLY = 471, SystemZ_CMux = 472, SystemZ_CPSDRdd = 473, SystemZ_CPSDRds = 474, SystemZ_CPSDRsd = 475, SystemZ_CPSDRss = 476, SystemZ_CR = 477, SystemZ_CRJ = 478, SystemZ_CRL = 479, SystemZ_CS = 480, SystemZ_CSG = 481, SystemZ_CSY = 482, SystemZ_CXBR = 483, SystemZ_CXFBR = 484, SystemZ_CXGBR = 485, SystemZ_CXLFBR = 486, SystemZ_CXLGBR = 487, SystemZ_CY = 488, SystemZ_CallBASR = 489, SystemZ_CallBR = 490, SystemZ_CallBRASL = 491, SystemZ_CallJG = 492, SystemZ_CondStore16 = 493, SystemZ_CondStore16Inv = 494, SystemZ_CondStore16Mux = 495, SystemZ_CondStore16MuxInv = 496, SystemZ_CondStore32 = 497, SystemZ_CondStore32Inv = 498, SystemZ_CondStore64 = 499, SystemZ_CondStore64Inv = 500, SystemZ_CondStore8 = 501, SystemZ_CondStore8Inv = 502, SystemZ_CondStore8Mux = 503, SystemZ_CondStore8MuxInv = 504, SystemZ_CondStoreF32 = 505, SystemZ_CondStoreF32Inv = 506, SystemZ_CondStoreF64 = 507, SystemZ_CondStoreF64Inv = 508, SystemZ_DDB = 509, SystemZ_DDBR = 510, SystemZ_DEB = 511, SystemZ_DEBR = 512, SystemZ_DL = 513, SystemZ_DLG = 514, SystemZ_DLGR = 515, SystemZ_DLR = 516, SystemZ_DSG = 517, SystemZ_DSGF = 518, SystemZ_DSGFR = 519, SystemZ_DSGR = 520, SystemZ_DXBR = 521, SystemZ_EAR = 522, SystemZ_FIDBR = 523, SystemZ_FIDBRA = 524, SystemZ_FIEBR = 525, SystemZ_FIEBRA = 526, SystemZ_FIXBR = 527, SystemZ_FIXBRA = 528, SystemZ_FLOGR = 529, SystemZ_GOT = 530, SystemZ_IC = 531, SystemZ_IC32 = 532, SystemZ_IC32Y = 533, SystemZ_ICY = 534, SystemZ_IIFMux = 535, SystemZ_IIHF = 536, SystemZ_IIHF64 = 537, SystemZ_IIHH = 538, SystemZ_IIHH64 = 539, SystemZ_IIHL = 540, SystemZ_IIHL64 = 541, SystemZ_IIHMux = 542, SystemZ_IILF = 543, SystemZ_IILF64 = 544, SystemZ_IILH = 545, SystemZ_IILH64 = 546, SystemZ_IILL = 547, SystemZ_IILL64 = 548, SystemZ_IILMux = 549, SystemZ_IPM = 550, SystemZ_J = 551, SystemZ_JG = 552, SystemZ_L = 553, SystemZ_L128 = 554, SystemZ_LA = 555, SystemZ_LAA = 556, SystemZ_LAAG = 557, SystemZ_LAAL = 558, SystemZ_LAALG = 559, SystemZ_LAN = 560, SystemZ_LANG = 561, SystemZ_LAO = 562, SystemZ_LAOG = 563, SystemZ_LARL = 564, SystemZ_LAX = 565, SystemZ_LAXG = 566, SystemZ_LAY = 567, SystemZ_LB = 568, SystemZ_LBH = 569, SystemZ_LBMux = 570, SystemZ_LBR = 571, SystemZ_LCDBR = 572, SystemZ_LCEBR = 573, SystemZ_LCGFR = 574, SystemZ_LCGR = 575, SystemZ_LCR = 576, SystemZ_LCXBR = 577, SystemZ_LD = 578, SystemZ_LDEB = 579, SystemZ_LDEBR = 580, SystemZ_LDGR = 581, SystemZ_LDR = 582, SystemZ_LDXBR = 583, SystemZ_LDXBRA = 584, SystemZ_LDY = 585, SystemZ_LE = 586, SystemZ_LEDBR = 587, SystemZ_LEDBRA = 588, SystemZ_LER = 589, SystemZ_LEXBR = 590, SystemZ_LEXBRA = 591, SystemZ_LEY = 592, SystemZ_LFH = 593, SystemZ_LG = 594, SystemZ_LGB = 595, SystemZ_LGBR = 596, SystemZ_LGDR = 597, SystemZ_LGF = 598, SystemZ_LGFI = 599, SystemZ_LGFR = 600, SystemZ_LGFRL = 601, SystemZ_LGH = 602, SystemZ_LGHI = 603, SystemZ_LGHR = 604, SystemZ_LGHRL = 605, SystemZ_LGR = 606, SystemZ_LGRL = 607, SystemZ_LH = 608, SystemZ_LHH = 609, SystemZ_LHI = 610, SystemZ_LHIMux = 611, SystemZ_LHMux = 612, SystemZ_LHR = 613, SystemZ_LHRL = 614, SystemZ_LHY = 615, SystemZ_LLC = 616, SystemZ_LLCH = 617, SystemZ_LLCMux = 618, SystemZ_LLCR = 619, SystemZ_LLCRMux = 620, SystemZ_LLGC = 621, SystemZ_LLGCR = 622, SystemZ_LLGF = 623, SystemZ_LLGFR = 624, SystemZ_LLGFRL = 625, SystemZ_LLGH = 626, SystemZ_LLGHR = 627, SystemZ_LLGHRL = 628, SystemZ_LLH = 629, SystemZ_LLHH = 630, SystemZ_LLHMux = 631, SystemZ_LLHR = 632, SystemZ_LLHRL = 633, SystemZ_LLHRMux = 634, SystemZ_LLIHF = 635, SystemZ_LLIHH = 636, SystemZ_LLIHL = 637, SystemZ_LLILF = 638, SystemZ_LLILH = 639, SystemZ_LLILL = 640, SystemZ_LMG = 641, SystemZ_LMux = 642, SystemZ_LNDBR = 643, SystemZ_LNEBR = 644, SystemZ_LNGFR = 645, SystemZ_LNGR = 646, SystemZ_LNR = 647, SystemZ_LNXBR = 648, SystemZ_LOC = 649, SystemZ_LOCG = 650, SystemZ_LOCGR = 651, SystemZ_LOCR = 652, SystemZ_LPDBR = 653, SystemZ_LPEBR = 654, SystemZ_LPGFR = 655, SystemZ_LPGR = 656, SystemZ_LPR = 657, SystemZ_LPXBR = 658, SystemZ_LR = 659, SystemZ_LRL = 660, SystemZ_LRMux = 661, SystemZ_LRV = 662, SystemZ_LRVG = 663, SystemZ_LRVGR = 664, SystemZ_LRVR = 665, SystemZ_LT = 666, SystemZ_LTDBR = 667, SystemZ_LTDBRCompare = 668, SystemZ_LTEBR = 669, SystemZ_LTEBRCompare = 670, SystemZ_LTG = 671, SystemZ_LTGF = 672, SystemZ_LTGFR = 673, SystemZ_LTGR = 674, SystemZ_LTR = 675, SystemZ_LTXBR = 676, SystemZ_LTXBRCompare = 677, SystemZ_LX = 678, SystemZ_LXDB = 679, SystemZ_LXDBR = 680, SystemZ_LXEB = 681, SystemZ_LXEBR = 682, SystemZ_LXR = 683, SystemZ_LY = 684, SystemZ_LZDR = 685, SystemZ_LZER = 686, SystemZ_LZXR = 687, SystemZ_MADB = 688, SystemZ_MADBR = 689, SystemZ_MAEB = 690, SystemZ_MAEBR = 691, SystemZ_MDB = 692, SystemZ_MDBR = 693, SystemZ_MDEB = 694, SystemZ_MDEBR = 695, SystemZ_MEEB = 696, SystemZ_MEEBR = 697, SystemZ_MGHI = 698, SystemZ_MH = 699, SystemZ_MHI = 700, SystemZ_MHY = 701, SystemZ_MLG = 702, SystemZ_MLGR = 703, SystemZ_MS = 704, SystemZ_MSDB = 705, SystemZ_MSDBR = 706, SystemZ_MSEB = 707, SystemZ_MSEBR = 708, SystemZ_MSFI = 709, SystemZ_MSG = 710, SystemZ_MSGF = 711, SystemZ_MSGFI = 712, SystemZ_MSGFR = 713, SystemZ_MSGR = 714, SystemZ_MSR = 715, SystemZ_MSY = 716, SystemZ_MVC = 717, SystemZ_MVCLoop = 718, SystemZ_MVCSequence = 719, SystemZ_MVGHI = 720, SystemZ_MVHHI = 721, SystemZ_MVHI = 722, SystemZ_MVI = 723, SystemZ_MVIY = 724, SystemZ_MVST = 725, SystemZ_MVSTLoop = 726, SystemZ_MXBR = 727, SystemZ_MXDB = 728, SystemZ_MXDBR = 729, SystemZ_N = 730, SystemZ_NC = 731, SystemZ_NCLoop = 732, SystemZ_NCSequence = 733, SystemZ_NG = 734, SystemZ_NGR = 735, SystemZ_NGRK = 736, SystemZ_NI = 737, SystemZ_NIFMux = 738, SystemZ_NIHF = 739, SystemZ_NIHF64 = 740, SystemZ_NIHH = 741, SystemZ_NIHH64 = 742, SystemZ_NIHL = 743, SystemZ_NIHL64 = 744, SystemZ_NIHMux = 745, SystemZ_NILF = 746, SystemZ_NILF64 = 747, SystemZ_NILH = 748, SystemZ_NILH64 = 749, SystemZ_NILL = 750, SystemZ_NILL64 = 751, SystemZ_NILMux = 752, SystemZ_NIY = 753, SystemZ_NR = 754, SystemZ_NRK = 755, SystemZ_NY = 756, SystemZ_O = 757, SystemZ_OC = 758, SystemZ_OCLoop = 759, SystemZ_OCSequence = 760, SystemZ_OG = 761, SystemZ_OGR = 762, SystemZ_OGRK = 763, SystemZ_OI = 764, SystemZ_OIFMux = 765, SystemZ_OIHF = 766, SystemZ_OIHF64 = 767, SystemZ_OIHH = 768, SystemZ_OIHH64 = 769, SystemZ_OIHL = 770, SystemZ_OIHL64 = 771, SystemZ_OIHMux = 772, SystemZ_OILF = 773, SystemZ_OILF64 = 774, SystemZ_OILH = 775, SystemZ_OILH64 = 776, SystemZ_OILL = 777, SystemZ_OILL64 = 778, SystemZ_OILMux = 779, SystemZ_OIY = 780, SystemZ_OR = 781, SystemZ_ORK = 782, SystemZ_OY = 783, SystemZ_PFD = 784, SystemZ_PFDRL = 785, SystemZ_RISBG = 786, SystemZ_RISBG32 = 787, SystemZ_RISBHG = 788, SystemZ_RISBHH = 789, SystemZ_RISBHL = 790, SystemZ_RISBLG = 791, SystemZ_RISBLH = 792, SystemZ_RISBLL = 793, SystemZ_RISBMux = 794, SystemZ_RLL = 795, SystemZ_RLLG = 796, SystemZ_RNSBG = 797, SystemZ_ROSBG = 798, SystemZ_RXSBG = 799, SystemZ_Return = 800, SystemZ_S = 801, SystemZ_SDB = 802, SystemZ_SDBR = 803, SystemZ_SEB = 804, SystemZ_SEBR = 805, SystemZ_SG = 806, SystemZ_SGF = 807, SystemZ_SGFR = 808, SystemZ_SGR = 809, SystemZ_SGRK = 810, SystemZ_SH = 811, SystemZ_SHY = 812, SystemZ_SL = 813, SystemZ_SLB = 814, SystemZ_SLBG = 815, SystemZ_SLBR = 816, SystemZ_SLFI = 817, SystemZ_SLG = 818, SystemZ_SLGBR = 819, SystemZ_SLGF = 820, SystemZ_SLGFI = 821, SystemZ_SLGFR = 822, SystemZ_SLGR = 823, SystemZ_SLGRK = 824, SystemZ_SLL = 825, SystemZ_SLLG = 826, SystemZ_SLLK = 827, SystemZ_SLR = 828, SystemZ_SLRK = 829, SystemZ_SLY = 830, SystemZ_SQDB = 831, SystemZ_SQDBR = 832, SystemZ_SQEB = 833, SystemZ_SQEBR = 834, SystemZ_SQXBR = 835, SystemZ_SR = 836, SystemZ_SRA = 837, SystemZ_SRAG = 838, SystemZ_SRAK = 839, SystemZ_SRK = 840, SystemZ_SRL = 841, SystemZ_SRLG = 842, SystemZ_SRLK = 843, SystemZ_SRST = 844, SystemZ_SRSTLoop = 845, SystemZ_ST = 846, SystemZ_ST128 = 847, SystemZ_STC = 848, SystemZ_STCH = 849, SystemZ_STCMux = 850, SystemZ_STCY = 851, SystemZ_STD = 852, SystemZ_STDY = 853, SystemZ_STE = 854, SystemZ_STEY = 855, SystemZ_STFH = 856, SystemZ_STG = 857, SystemZ_STGRL = 858, SystemZ_STH = 859, SystemZ_STHH = 860, SystemZ_STHMux = 861, SystemZ_STHRL = 862, SystemZ_STHY = 863, SystemZ_STMG = 864, SystemZ_STMux = 865, SystemZ_STOC = 866, SystemZ_STOCG = 867, SystemZ_STRL = 868, SystemZ_STRV = 869, SystemZ_STRVG = 870, SystemZ_STX = 871, SystemZ_STY = 872, SystemZ_SXBR = 873, SystemZ_SY = 874, SystemZ_Select32 = 875, SystemZ_Select32Mux = 876, SystemZ_Select64 = 877, SystemZ_SelectF128 = 878, SystemZ_SelectF32 = 879, SystemZ_SelectF64 = 880, SystemZ_Serialize = 881, SystemZ_TLS_GDCALL = 882, SystemZ_TLS_LDCALL = 883, SystemZ_TM = 884, SystemZ_TMHH = 885, SystemZ_TMHH64 = 886, SystemZ_TMHL = 887, SystemZ_TMHL64 = 888, SystemZ_TMHMux = 889, SystemZ_TMLH = 890, SystemZ_TMLH64 = 891, SystemZ_TMLL = 892, SystemZ_TMLL64 = 893, SystemZ_TMLMux = 894, SystemZ_TMY = 895, SystemZ_X = 896, SystemZ_XC = 897, SystemZ_XCLoop = 898, SystemZ_XCSequence = 899, SystemZ_XG = 900, SystemZ_XGR = 901, SystemZ_XGRK = 902, SystemZ_XI = 903, SystemZ_XIFMux = 904, SystemZ_XIHF = 905, SystemZ_XIHF64 = 906, SystemZ_XILF = 907, SystemZ_XILF64 = 908, SystemZ_XIY = 909, SystemZ_XR = 910, SystemZ_XRK = 911, SystemZ_XY = 912, SystemZ_ZEXT128_32 = 913, SystemZ_ZEXT128_64 = 914, SystemZ_INSTRUCTION_LIST_END = 915 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc010066400017500001750000000340211363402546700237110ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { SystemZ_NoRegister, SystemZ_CC = 1, SystemZ_F0D = 2, SystemZ_F1D = 3, SystemZ_F2D = 4, SystemZ_F3D = 5, SystemZ_F4D = 6, SystemZ_F5D = 7, SystemZ_F6D = 8, SystemZ_F7D = 9, SystemZ_F8D = 10, SystemZ_F9D = 11, SystemZ_F10D = 12, SystemZ_F11D = 13, SystemZ_F12D = 14, SystemZ_F13D = 15, SystemZ_F14D = 16, SystemZ_F15D = 17, SystemZ_F0Q = 18, SystemZ_F1Q = 19, SystemZ_F4Q = 20, SystemZ_F5Q = 21, SystemZ_F8Q = 22, SystemZ_F9Q = 23, SystemZ_F12Q = 24, SystemZ_F13Q = 25, SystemZ_F0S = 26, SystemZ_F1S = 27, SystemZ_F2S = 28, SystemZ_F3S = 29, SystemZ_F4S = 30, SystemZ_F5S = 31, SystemZ_F6S = 32, SystemZ_F7S = 33, SystemZ_F8S = 34, SystemZ_F9S = 35, SystemZ_F10S = 36, SystemZ_F11S = 37, SystemZ_F12S = 38, SystemZ_F13S = 39, SystemZ_F14S = 40, SystemZ_F15S = 41, SystemZ_R0D = 42, SystemZ_R1D = 43, SystemZ_R2D = 44, SystemZ_R3D = 45, SystemZ_R4D = 46, SystemZ_R5D = 47, SystemZ_R6D = 48, SystemZ_R7D = 49, SystemZ_R8D = 50, SystemZ_R9D = 51, SystemZ_R10D = 52, SystemZ_R11D = 53, SystemZ_R12D = 54, SystemZ_R13D = 55, SystemZ_R14D = 56, SystemZ_R15D = 57, SystemZ_R0H = 58, SystemZ_R1H = 59, SystemZ_R2H = 60, SystemZ_R3H = 61, SystemZ_R4H = 62, SystemZ_R5H = 63, SystemZ_R6H = 64, SystemZ_R7H = 65, SystemZ_R8H = 66, SystemZ_R9H = 67, SystemZ_R10H = 68, SystemZ_R11H = 69, SystemZ_R12H = 70, SystemZ_R13H = 71, SystemZ_R14H = 72, SystemZ_R15H = 73, SystemZ_R0L = 74, SystemZ_R1L = 75, SystemZ_R2L = 76, SystemZ_R3L = 77, SystemZ_R4L = 78, SystemZ_R5L = 79, SystemZ_R6L = 80, SystemZ_R7L = 81, SystemZ_R8L = 82, SystemZ_R9L = 83, SystemZ_R10L = 84, SystemZ_R11L = 85, SystemZ_R12L = 86, SystemZ_R13L = 87, SystemZ_R14L = 88, SystemZ_R15L = 89, SystemZ_R0Q = 90, SystemZ_R2Q = 91, SystemZ_R4Q = 92, SystemZ_R6Q = 93, SystemZ_R8Q = 94, SystemZ_R10Q = 95, SystemZ_R12Q = 96, SystemZ_R14Q = 97, SystemZ_NUM_TARGET_REGS // 98 }; // Register classes enum { SystemZ_GRX32BitRegClassID = 0, SystemZ_FP32BitRegClassID = 1, SystemZ_GR32BitRegClassID = 2, SystemZ_GRH32BitRegClassID = 3, SystemZ_ADDR32BitRegClassID = 4, SystemZ_CCRegsRegClassID = 5, SystemZ_FP64BitRegClassID = 6, SystemZ_GR64BitRegClassID = 7, SystemZ_ADDR64BitRegClassID = 8, SystemZ_FP128BitRegClassID = 9, SystemZ_GR128BitRegClassID = 10, SystemZ_ADDR128BitRegClassID = 11 }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg SystemZRegDiffLists[] = { /* 0 */ 65193, 1, 1, 1, 0, /* 5 */ 65469, 1, 0, /* 8 */ 65519, 2, 0, /* 11 */ 65521, 2, 0, /* 14 */ 65523, 2, 0, /* 17 */ 65525, 2, 0, /* 20 */ 65512, 8, 0, /* 23 */ 65512, 10, 0, /* 26 */ 65512, 12, 0, /* 29 */ 65512, 14, 0, /* 32 */ 65512, 16, 0, /* 35 */ 65522, 24, 65510, 24, 0, /* 40 */ 65524, 24, 65510, 24, 0, /* 45 */ 65526, 24, 65510, 24, 0, /* 50 */ 65528, 24, 65510, 24, 0, /* 55 */ 65504, 40, 0, /* 58 */ 65520, 40, 0, /* 61 */ 65504, 41, 0, /* 64 */ 65520, 41, 0, /* 67 */ 65504, 42, 0, /* 70 */ 65520, 42, 0, /* 73 */ 65504, 43, 0, /* 76 */ 65520, 43, 0, /* 79 */ 65504, 44, 0, /* 82 */ 65520, 44, 0, /* 85 */ 65504, 45, 0, /* 88 */ 65520, 45, 0, /* 91 */ 65504, 46, 0, /* 94 */ 65520, 46, 0, /* 97 */ 65504, 47, 0, /* 100 */ 65520, 47, 0, /* 103 */ 65504, 48, 0, /* 106 */ 65520, 48, 0, /* 109 */ 65405, 0, /* 111 */ 65438, 0, /* 113 */ 65511, 0, /* 115 */ 65489, 32, 65520, 65519, 32, 65520, 0, /* 122 */ 65490, 32, 65520, 65519, 32, 65520, 0, /* 129 */ 65491, 32, 65520, 65519, 32, 65520, 0, /* 136 */ 65492, 32, 65520, 65519, 32, 65520, 0, /* 143 */ 65493, 32, 65520, 65519, 32, 65520, 0, /* 150 */ 65494, 32, 65520, 65519, 32, 65520, 0, /* 157 */ 65495, 32, 65520, 65519, 32, 65520, 0, /* 164 */ 65496, 32, 65520, 65519, 32, 65520, 0, /* 171 */ 65535, 0, }; static const uint16_t SystemZSubRegIdxLists[] = { /* 0 */ 5, 1, 0, /* 3 */ 6, 1, 2, 3, 0, /* 8 */ 6, 5, 1, 2, 4, 3, 0, }; static MCRegisterDesc SystemZRegDesc[] = { // Descriptors { 2, 0, 0, 0, 0, 0 }, { 0, 4, 4, 2, 2737, 0 }, { 13, 38, 33, 1, 2737, 3 }, { 31, 38, 33, 1, 2737, 3 }, { 49, 38, 30, 1, 2737, 3 }, { 67, 38, 30, 1, 2737, 3 }, { 85, 38, 30, 1, 2737, 3 }, { 103, 38, 30, 1, 2737, 3 }, { 111, 38, 27, 1, 2737, 3 }, { 119, 38, 27, 1, 2737, 3 }, { 127, 38, 27, 1, 2737, 3 }, { 135, 38, 27, 1, 2737, 3 }, { 3, 38, 24, 1, 2737, 3 }, { 21, 38, 24, 1, 2737, 3 }, { 39, 38, 24, 1, 2737, 3 }, { 57, 38, 24, 1, 2737, 3 }, { 75, 38, 21, 1, 2737, 3 }, { 93, 38, 21, 1, 2737, 3 }, { 288, 35, 4, 3, 129, 2 }, { 296, 35, 4, 3, 129, 2 }, { 324, 40, 4, 3, 177, 2 }, { 332, 40, 4, 3, 177, 2 }, { 340, 45, 4, 3, 225, 2 }, { 348, 45, 4, 3, 225, 2 }, { 300, 50, 4, 3, 273, 2 }, { 314, 50, 4, 3, 273, 2 }, { 357, 4, 32, 2, 1809, 0 }, { 366, 4, 32, 2, 1809, 0 }, { 375, 4, 29, 2, 1809, 0 }, { 384, 4, 29, 2, 1809, 0 }, { 393, 4, 29, 2, 1809, 0 }, { 402, 4, 29, 2, 1809, 0 }, { 406, 4, 26, 2, 1809, 0 }, { 410, 4, 26, 2, 1809, 0 }, { 414, 4, 26, 2, 1809, 0 }, { 418, 4, 26, 2, 1809, 0 }, { 352, 4, 23, 2, 1809, 0 }, { 361, 4, 23, 2, 1809, 0 }, { 370, 4, 23, 2, 1809, 0 }, { 379, 4, 23, 2, 1809, 0 }, { 388, 4, 20, 2, 1809, 0 }, { 397, 4, 20, 2, 1809, 0 }, { 17, 119, 104, 0, 82, 7 }, { 35, 119, 98, 0, 82, 7 }, { 53, 119, 98, 0, 82, 7 }, { 71, 119, 92, 0, 82, 7 }, { 89, 119, 92, 0, 82, 7 }, { 107, 119, 86, 0, 82, 7 }, { 115, 119, 86, 0, 82, 7 }, { 123, 119, 80, 0, 82, 7 }, { 131, 119, 80, 0, 82, 7 }, { 139, 119, 74, 0, 82, 7 }, { 8, 119, 74, 0, 82, 7 }, { 26, 119, 68, 0, 82, 7 }, { 44, 119, 68, 0, 82, 7 }, { 62, 119, 62, 0, 82, 7 }, { 80, 119, 62, 0, 82, 7 }, { 98, 119, 56, 0, 82, 7 }, { 148, 4, 106, 2, 1778, 0 }, { 157, 4, 100, 2, 1778, 0 }, { 166, 4, 100, 2, 1778, 0 }, { 175, 4, 94, 2, 1778, 0 }, { 184, 4, 94, 2, 1778, 0 }, { 193, 4, 88, 2, 1778, 0 }, { 197, 4, 88, 2, 1778, 0 }, { 201, 4, 82, 2, 1778, 0 }, { 205, 4, 82, 2, 1778, 0 }, { 209, 4, 76, 2, 1778, 0 }, { 143, 4, 76, 2, 1778, 0 }, { 152, 4, 70, 2, 1778, 0 }, { 161, 4, 70, 2, 1778, 0 }, { 170, 4, 64, 2, 1778, 0 }, { 179, 4, 64, 2, 1778, 0 }, { 188, 4, 58, 2, 1778, 0 }, { 218, 4, 103, 2, 1746, 0 }, { 227, 4, 97, 2, 1746, 0 }, { 236, 4, 97, 2, 1746, 0 }, { 245, 4, 91, 2, 1746, 0 }, { 254, 4, 91, 2, 1746, 0 }, { 263, 4, 85, 2, 1746, 0 }, { 267, 4, 85, 2, 1746, 0 }, { 271, 4, 79, 2, 1746, 0 }, { 275, 4, 79, 2, 1746, 0 }, { 279, 4, 73, 2, 1746, 0 }, { 213, 4, 73, 2, 1746, 0 }, { 222, 4, 67, 2, 1746, 0 }, { 231, 4, 67, 2, 1746, 0 }, { 240, 4, 61, 2, 1746, 0 }, { 249, 4, 61, 2, 1746, 0 }, { 258, 4, 55, 2, 1746, 0 }, { 292, 115, 4, 8, 4, 5 }, { 310, 122, 4, 8, 4, 5 }, { 328, 129, 4, 8, 4, 5 }, { 336, 136, 4, 8, 4, 5 }, { 344, 143, 4, 8, 4, 5 }, { 283, 150, 4, 8, 4, 5 }, { 305, 157, 4, 8, 4, 5 }, { 319, 164, 4, 8, 4, 5 }, }; // GRX32Bit Register Class... static const MCPhysReg GRX32Bit[] = { SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R15L, SystemZ_R15H, SystemZ_R14L, SystemZ_R14H, SystemZ_R13L, SystemZ_R13H, SystemZ_R12L, SystemZ_R12H, SystemZ_R11L, SystemZ_R11H, SystemZ_R10L, SystemZ_R10H, SystemZ_R9L, SystemZ_R9H, SystemZ_R8L, SystemZ_R8H, SystemZ_R7L, SystemZ_R7H, SystemZ_R6L, SystemZ_R6H, }; // GRX32Bit Bit set. static const uint8_t GRX32BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, }; // FP32Bit Register Class... static const MCPhysReg FP32Bit[] = { SystemZ_F0S, SystemZ_F1S, SystemZ_F2S, SystemZ_F3S, SystemZ_F4S, SystemZ_F5S, SystemZ_F6S, SystemZ_F7S, SystemZ_F8S, SystemZ_F9S, SystemZ_F10S, SystemZ_F11S, SystemZ_F12S, SystemZ_F13S, SystemZ_F14S, SystemZ_F15S, }; // FP32Bit Bit set. static const uint8_t FP32BitBits[] = { 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // GR32Bit Register Class... static const MCPhysReg GR32Bit[] = { SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R15L, SystemZ_R14L, SystemZ_R13L, SystemZ_R12L, SystemZ_R11L, SystemZ_R10L, SystemZ_R9L, SystemZ_R8L, SystemZ_R7L, SystemZ_R6L, }; // GR32Bit Bit set. static const uint8_t GR32BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // GRH32Bit Register Class... static const MCPhysReg GRH32Bit[] = { SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R15H, SystemZ_R14H, SystemZ_R13H, SystemZ_R12H, SystemZ_R11H, SystemZ_R10H, SystemZ_R9H, SystemZ_R8H, SystemZ_R7H, SystemZ_R6H, }; // GRH32Bit Bit set. static const uint8_t GRH32BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // ADDR32Bit Register Class... static const MCPhysReg ADDR32Bit[] = { SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R15L, SystemZ_R14L, SystemZ_R13L, SystemZ_R12L, SystemZ_R11L, SystemZ_R10L, SystemZ_R9L, SystemZ_R8L, SystemZ_R7L, SystemZ_R6L, }; // ADDR32Bit Bit set. static const uint8_t ADDR32BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, }; // CCRegs Register Class... static const MCPhysReg CCRegs[] = { SystemZ_CC, }; // CCRegs Bit set. static const uint8_t CCRegsBits[] = { 0x02, }; // FP64Bit Register Class... static const MCPhysReg FP64Bit[] = { SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D, }; // FP64Bit Bit set. static const uint8_t FP64BitBits[] = { 0xfc, 0xff, 0x03, }; // GR64Bit Register Class... static const MCPhysReg GR64Bit[] = { SystemZ_R0D, SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R15D, SystemZ_R14D, SystemZ_R13D, SystemZ_R12D, SystemZ_R11D, SystemZ_R10D, SystemZ_R9D, SystemZ_R8D, SystemZ_R7D, SystemZ_R6D, }; // GR64Bit Bit set. static const uint8_t GR64BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // ADDR64Bit Register Class... static const MCPhysReg ADDR64Bit[] = { SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R15D, SystemZ_R14D, SystemZ_R13D, SystemZ_R12D, SystemZ_R11D, SystemZ_R10D, SystemZ_R9D, SystemZ_R8D, SystemZ_R7D, SystemZ_R6D, }; // ADDR64Bit Bit set. static const uint8_t ADDR64BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, }; // FP128Bit Register Class... static const MCPhysReg FP128Bit[] = { SystemZ_F0Q, SystemZ_F1Q, SystemZ_F4Q, SystemZ_F5Q, SystemZ_F8Q, SystemZ_F9Q, SystemZ_F12Q, SystemZ_F13Q, }; // FP128Bit Bit set. static const uint8_t FP128BitBits[] = { 0x00, 0x00, 0xfc, 0x03, }; // GR128Bit Register Class... static const MCPhysReg GR128Bit[] = { SystemZ_R0Q, SystemZ_R2Q, SystemZ_R4Q, SystemZ_R12Q, SystemZ_R10Q, SystemZ_R8Q, SystemZ_R6Q, SystemZ_R14Q, }; // GR128Bit Bit set. static const uint8_t GR128BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // ADDR128Bit Register Class... static const MCPhysReg ADDR128Bit[] = { SystemZ_R2Q, SystemZ_R4Q, SystemZ_R12Q, SystemZ_R10Q, SystemZ_R8Q, SystemZ_R6Q, SystemZ_R14Q, }; // ADDR128Bit Bit set. static const uint8_t ADDR128BitBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; static MCRegisterClass SystemZMCRegisterClasses[] = { { GRX32Bit, GRX32BitBits, 42, 32, sizeof(GRX32BitBits), SystemZ_GRX32BitRegClassID, 4, 4, 1, 1 }, { FP32Bit, FP32BitBits, 16, 16, sizeof(FP32BitBits), SystemZ_FP32BitRegClassID, 4, 4, 1, 1 }, { GR32Bit, GR32BitBits, 34, 16, sizeof(GR32BitBits), SystemZ_GR32BitRegClassID, 4, 4, 1, 1 }, { GRH32Bit, GRH32BitBits, 7, 16, sizeof(GRH32BitBits), SystemZ_GRH32BitRegClassID, 4, 4, 1, 1 }, { ADDR32Bit, ADDR32BitBits, 24, 15, sizeof(ADDR32BitBits), SystemZ_ADDR32BitRegClassID, 4, 4, 1, 1 }, { CCRegs, CCRegsBits, 0, 1, sizeof(CCRegsBits), SystemZ_CCRegsRegClassID, 4, 4, 1, 1 }, { FP64Bit, FP64BitBits, 51, 16, sizeof(FP64BitBits), SystemZ_FP64BitRegClassID, 8, 8, 1, 1 }, { GR64Bit, GR64BitBits, 69, 16, sizeof(GR64BitBits), SystemZ_GR64BitRegClassID, 8, 8, 1, 1 }, { ADDR64Bit, ADDR64BitBits, 59, 15, sizeof(ADDR64BitBits), SystemZ_ADDR64BitRegClassID, 8, 8, 1, 1 }, { FP128Bit, FP128BitBits, 77, 8, sizeof(FP128BitBits), SystemZ_FP128BitRegClassID, 16, 16, 1, 1 }, { GR128Bit, GR128BitBits, 97, 8, sizeof(GR128BitBits), SystemZ_GR128BitRegClassID, 16, 16, 1, 1 }, { ADDR128Bit, ADDR128BitBits, 86, 7, sizeof(ADDR128BitBits), SystemZ_ADDR128BitRegClassID, 16, 16, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc010066400017500001750000000020551363402546700240670ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Subtarget Enumeration Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM enum { SystemZ_FeatureDistinctOps = 1ULL << 0, SystemZ_FeatureFPExtension = 1ULL << 1, SystemZ_FeatureFastSerialization = 1ULL << 2, SystemZ_FeatureHighWord = 1ULL << 3, SystemZ_FeatureInterlockedAccess1 = 1ULL << 4, SystemZ_FeatureLoadStoreOnCond = 1ULL << 5 }; #endif // GET_SUBTARGETINFO_ENUM capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZInstPrinter.c010066400017500001750000000265221363403403300226050ustar0000000000000000//===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax --------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an SystemZ MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SYSZ #include #include #include #include #include "SystemZInstPrinter.h" #include "../../MCInst.h" #include "../../utils.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../MathExtras.h" #include "SystemZMapping.h" static const char *getRegisterName(unsigned RegNo); void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) { /* if (((cs_struct *)ud)->detail != CS_OPT_ON) return; */ } static void printAddress(MCInst *MI, unsigned Base, int64_t Disp, unsigned Index, SStream *O) { printInt64(O, Disp); if (Base) { SStream_concat0(O, "("); if (Index) SStream_concat(O, "%%%s, ", getRegisterName(Index)); SStream_concat(O, "%%%s)", getRegisterName(Base)); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index); MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; MI->flat_insn->detail->sysz.op_count++; } } else if (!Index) { if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp; MI->flat_insn->detail->sysz.op_count++; } } else { SStream_concat(O, "(%%%s)", getRegisterName(Index)); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index); MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; MI->flat_insn->detail->sysz.op_count++; } } } static void _printOperand(MCInst *MI, MCOperand *MO, SStream *O) { if (MCOperand_isReg(MO)) { unsigned reg; reg = MCOperand_getReg(MO); SStream_concat(O, "%%%s", getRegisterName(reg)); reg = SystemZ_map_register(reg); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_REG; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].reg = reg; MI->flat_insn->detail->sysz.op_count++; } } else if (MCOperand_isImm(MO)) { int64_t Imm = MCOperand_getImm(MO); printInt64(O, Imm); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Imm; MI->flat_insn->detail->sysz.op_count++; } } } static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O) { int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isUInt<4>(Value) && "Invalid u4imm argument"); printInt64(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; MI->flat_insn->detail->sysz.op_count++; } } static void printU6ImmOperand(MCInst *MI, int OpNum, SStream *O) { uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isUInt<6>(Value) && "Invalid u6imm argument"); printUInt32(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O) { int8_t Value = (int8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isInt<8>(Value) && "Invalid s8imm argument"); if (Value >= 0) { if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); } else { if (Value < -HEX_THRESHOLD) SStream_concat(O, "-0x%x", -Value); else SStream_concat(O, "-%u", -Value); } if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O) { uint8_t Value = (uint8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isUInt<8>(Value) && "Invalid u8imm argument"); if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O) { int16_t Value = (int16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isInt<16>(Value) && "Invalid s16imm argument"); if (Value >= 0) { if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); } else { if (Value < -HEX_THRESHOLD) SStream_concat(O, "-0x%x", -Value); else SStream_concat(O, "-%u", -Value); } if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O) { uint16_t Value = (uint16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isUInt<16>(Value) && "Invalid u16imm argument"); if (Value > HEX_THRESHOLD) SStream_concat(O, "0x%x", Value); else SStream_concat(O, "%u", Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O) { int32_t Value = (int32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isInt<32>(Value) && "Invalid s32imm argument"); printInt32(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O) { uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(isUInt<32>(Value) && "Invalid u32imm argument"); printUInt32(O, Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printAccessRegOperand(MCInst *MI, int OpNum, SStream *O) { int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(Value < 16 && "Invalid access register number"); SStream_concat(O, "%%a%u", (unsigned int)Value); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_ACREG; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].reg = (unsigned int)Value; MI->flat_insn->detail->sysz.op_count++; } } static void printPCRelOperand(MCInst *MI, int OpNum, SStream *O) { MCOperand *MO = MCInst_getOperand(MI, OpNum); if (MCOperand_isImm(MO)) { int64_t imm = MCOperand_getImm(MO); printInt64(O, imm); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = imm; MI->flat_insn->detail->sysz.op_count++; } } } static void printPCRelTLSOperand(MCInst *MI, int OpNum, SStream *O) { // Output the PC-relative operand. printPCRelOperand(MI, OpNum, O); } static void printOperand(MCInst *MI, int OpNum, SStream *O) { _printOperand(MI, MCInst_getOperand(MI, OpNum), O); } static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O) { printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)), MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), 0, O); } static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O) { printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)), MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O); } static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O) { unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)); uint64_t Length = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 2)); if (Disp > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, Disp); else SStream_concat(O, "%"PRIu64, Disp); if (Length > HEX_THRESHOLD) SStream_concat(O, "(0x%"PRIx64, Length); else SStream_concat(O, "(%"PRIu64, Length); if (Base) SStream_concat(O, ", %%%s", getRegisterName(Base)); SStream_concat0(O, ")"); if (MI->csh->detail) { MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = Length; MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp; MI->flat_insn->detail->sysz.op_count++; } } static void printCond4Operand(MCInst *MI, int OpNum, SStream *O) { static const char *const CondNames[] = { "o", "h", "nle", "l", "nhe", "lh", "ne", "e", "nlh", "he", "nl", "le", "nh", "no" }; uint64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); // assert(Imm > 0 && Imm < 15 && "Invalid condition"); SStream_concat0(O, CondNames[Imm - 1]); if (MI->csh->detail) MI->flat_insn->detail->sysz.cc = (sysz_cc)Imm; } #define PRINT_ALIAS_INSTR #include "SystemZGenAsmWriter.inc" void SystemZ_printInst(MCInst *MI, SStream *O, void *Info) { printInstruction(MI, O, Info); } #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZInstPrinter.h010066400017500001750000000006021363402546700226140ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SYSZINSTPRINTER_H #define CS_SYSZINSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void SystemZ_printInst(MCInst *MI, SStream *O, void *Info); void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZMCTargetDesc.c010066400017500001750000000053171363402546700226030ustar0000000000000000//===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SYSZ #include "SystemZMCTargetDesc.h" #define GET_REGINFO_ENUM #include "SystemZGenRegisterInfo.inc" const unsigned SystemZMC_GR32Regs[16] = { SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R6L, SystemZ_R7L, SystemZ_R8L, SystemZ_R9L, SystemZ_R10L, SystemZ_R11L, SystemZ_R12L, SystemZ_R13L, SystemZ_R14L, SystemZ_R15L }; const unsigned SystemZMC_GRH32Regs[16] = { SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R6H, SystemZ_R7H, SystemZ_R8H, SystemZ_R9H, SystemZ_R10H, SystemZ_R11H, SystemZ_R12H, SystemZ_R13H, SystemZ_R14H, SystemZ_R15H }; const unsigned SystemZMC_GR64Regs[16] = { SystemZ_R0D, SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R6D, SystemZ_R7D, SystemZ_R8D, SystemZ_R9D, SystemZ_R10D, SystemZ_R11D, SystemZ_R12D, SystemZ_R13D, SystemZ_R14D, SystemZ_R15D }; const unsigned SystemZMC_GR128Regs[16] = { SystemZ_R0Q, 0, SystemZ_R2Q, 0, SystemZ_R4Q, 0, SystemZ_R6Q, 0, SystemZ_R8Q, 0, SystemZ_R10Q, 0, SystemZ_R12Q, 0, SystemZ_R14Q, 0 }; const unsigned SystemZMC_FP32Regs[16] = { SystemZ_F0S, SystemZ_F1S, SystemZ_F2S, SystemZ_F3S, SystemZ_F4S, SystemZ_F5S, SystemZ_F6S, SystemZ_F7S, SystemZ_F8S, SystemZ_F9S, SystemZ_F10S, SystemZ_F11S, SystemZ_F12S, SystemZ_F13S, SystemZ_F14S, SystemZ_F15S }; const unsigned SystemZMC_FP64Regs[16] = { SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D }; const unsigned SystemZMC_FP128Regs[16] = { SystemZ_F0Q, SystemZ_F1Q, 0, 0, SystemZ_F4Q, SystemZ_F5Q, 0, 0, SystemZ_F8Q, SystemZ_F9Q, 0, 0, SystemZ_F12Q, SystemZ_F13Q, 0, 0 }; unsigned SystemZMC_getFirstReg(unsigned Reg) { static unsigned Map[SystemZ_NUM_TARGET_REGS]; static int Initialized = 0; unsigned I; if (!Initialized) { Initialized = 1; for (I = 0; I < 16; ++I) { Map[SystemZMC_GR32Regs[I]] = I; Map[SystemZMC_GRH32Regs[I]] = I; Map[SystemZMC_GR64Regs[I]] = I; Map[SystemZMC_GR128Regs[I]] = I; Map[SystemZMC_FP32Regs[I]] = I; Map[SystemZMC_FP64Regs[I]] = I; Map[SystemZMC_FP128Regs[I]] = I; } } // assert(Reg < SystemZ_NUM_TARGET_REGS); return Map[Reg]; } #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZMCTargetDesc.h010066400017500001750000000033541363402546700226070ustar0000000000000000//===-- SystemZMCTargetDesc.h - SystemZ target descriptions -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SYSTEMZMCTARGETDESC_H #define CS_SYSTEMZMCTARGETDESC_H // Maps of asm register numbers to LLVM register numbers, with 0 indicating // an invalid register. In principle we could use 32-bit and 64-bit register // classes directly, provided that we relegated the GPR allocation order // in SystemZRegisterInfo.td to an AltOrder and left the default order // as %r0-%r15. It seems better to provide the same interface for // all classes though. extern const unsigned SystemZMC_GR32Regs[16]; extern const unsigned SystemZMC_GRH32Regs[16]; extern const unsigned SystemZMC_GR64Regs[16]; extern const unsigned SystemZMC_GR128Regs[16]; extern const unsigned SystemZMC_FP32Regs[16]; extern const unsigned SystemZMC_FP64Regs[16]; extern const unsigned SystemZMC_FP128Regs[16]; // Return the 0-based number of the first architectural register that // contains the given LLVM register. E.g. R1D -> 1. unsigned SystemZMC_getFirstReg(unsigned Reg); // Defines symbolic names for SystemZ registers. // This defines a mapping from register name to register number. //#define GET_REGINFO_ENUM //#include "SystemZGenRegisterInfo.inc" // Defines symbolic names for the SystemZ instructions. //#define GET_INSTRINFO_ENUM //#include "SystemZGenInstrInfo.inc" //#define GET_SUBTARGETINFO_ENUM //#include "SystemZGenSubtargetInfo.inc" #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZMapping.c010066400017500001750000000603611363402546700217310ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SYSZ #include // debug #include #include "../../utils.h" #include "SystemZMapping.h" #define GET_INSTRINFO_ENUM #include "SystemZGenInstrInfo.inc" #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { SYSZ_REG_INVALID, NULL }, { SYSZ_REG_0, "0"}, { SYSZ_REG_1, "1"}, { SYSZ_REG_2, "2"}, { SYSZ_REG_3, "3"}, { SYSZ_REG_4, "4"}, { SYSZ_REG_5, "5"}, { SYSZ_REG_6, "6"}, { SYSZ_REG_7, "7"}, { SYSZ_REG_8, "8"}, { SYSZ_REG_9, "9"}, { SYSZ_REG_10, "10"}, { SYSZ_REG_11, "11"}, { SYSZ_REG_12, "12"}, { SYSZ_REG_13, "13"}, { SYSZ_REG_14, "14"}, { SYSZ_REG_15, "15"}, { SYSZ_REG_CC, "cc"}, { SYSZ_REG_F0, "f0"}, { SYSZ_REG_F1, "f1"}, { SYSZ_REG_F2, "f2"}, { SYSZ_REG_F3, "f3"}, { SYSZ_REG_F4, "f4"}, { SYSZ_REG_F5, "f5"}, { SYSZ_REG_F6, "f6"}, { SYSZ_REG_F7, "f7"}, { SYSZ_REG_F8, "f8"}, { SYSZ_REG_F9, "f9"}, { SYSZ_REG_F10, "f10"}, { SYSZ_REG_F11, "f11"}, { SYSZ_REG_F12, "f12"}, { SYSZ_REG_F13, "f13"}, { SYSZ_REG_F14, "f14"}, { SYSZ_REG_F15, "f15"}, { SYSZ_REG_R0L, "r0l"}, }; #endif const char *SystemZ_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } static const insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "SystemZMappingInsn.inc" }; // given internal insn id, return public instruction info void SystemZ_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { unsigned short i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = SYSZ_GRP_JUMP; insn->detail->groups_count++; } #endif } } } #ifndef CAPSTONE_DIET static const name_map insn_name_maps[] = { { SYSZ_INS_INVALID, NULL }, { SYSZ_INS_A, "a" }, { SYSZ_INS_ADB, "adb" }, { SYSZ_INS_ADBR, "adbr" }, { SYSZ_INS_AEB, "aeb" }, { SYSZ_INS_AEBR, "aebr" }, { SYSZ_INS_AFI, "afi" }, { SYSZ_INS_AG, "ag" }, { SYSZ_INS_AGF, "agf" }, { SYSZ_INS_AGFI, "agfi" }, { SYSZ_INS_AGFR, "agfr" }, { SYSZ_INS_AGHI, "aghi" }, { SYSZ_INS_AGHIK, "aghik" }, { SYSZ_INS_AGR, "agr" }, { SYSZ_INS_AGRK, "agrk" }, { SYSZ_INS_AGSI, "agsi" }, { SYSZ_INS_AH, "ah" }, { SYSZ_INS_AHI, "ahi" }, { SYSZ_INS_AHIK, "ahik" }, { SYSZ_INS_AHY, "ahy" }, { SYSZ_INS_AIH, "aih" }, { SYSZ_INS_AL, "al" }, { SYSZ_INS_ALC, "alc" }, { SYSZ_INS_ALCG, "alcg" }, { SYSZ_INS_ALCGR, "alcgr" }, { SYSZ_INS_ALCR, "alcr" }, { SYSZ_INS_ALFI, "alfi" }, { SYSZ_INS_ALG, "alg" }, { SYSZ_INS_ALGF, "algf" }, { SYSZ_INS_ALGFI, "algfi" }, { SYSZ_INS_ALGFR, "algfr" }, { SYSZ_INS_ALGHSIK, "alghsik" }, { SYSZ_INS_ALGR, "algr" }, { SYSZ_INS_ALGRK, "algrk" }, { SYSZ_INS_ALHSIK, "alhsik" }, { SYSZ_INS_ALR, "alr" }, { SYSZ_INS_ALRK, "alrk" }, { SYSZ_INS_ALY, "aly" }, { SYSZ_INS_AR, "ar" }, { SYSZ_INS_ARK, "ark" }, { SYSZ_INS_ASI, "asi" }, { SYSZ_INS_AXBR, "axbr" }, { SYSZ_INS_AY, "ay" }, { SYSZ_INS_BCR, "bcr" }, { SYSZ_INS_BRC, "brc" }, { SYSZ_INS_BRCL, "brcl" }, { SYSZ_INS_CGIJ, "cgij" }, { SYSZ_INS_CGRJ, "cgrj" }, { SYSZ_INS_CIJ, "cij" }, { SYSZ_INS_CLGIJ, "clgij" }, { SYSZ_INS_CLGRJ, "clgrj" }, { SYSZ_INS_CLIJ, "clij" }, { SYSZ_INS_CLRJ, "clrj" }, { SYSZ_INS_CRJ, "crj" }, { SYSZ_INS_BER, "ber" }, { SYSZ_INS_JE, "je" }, { SYSZ_INS_JGE, "jge" }, { SYSZ_INS_LOCE, "loce" }, { SYSZ_INS_LOCGE, "locge" }, { SYSZ_INS_LOCGRE, "locgre" }, { SYSZ_INS_LOCRE, "locre" }, { SYSZ_INS_STOCE, "stoce" }, { SYSZ_INS_STOCGE, "stocge" }, { SYSZ_INS_BHR, "bhr" }, { SYSZ_INS_BHER, "bher" }, { SYSZ_INS_JHE, "jhe" }, { SYSZ_INS_JGHE, "jghe" }, { SYSZ_INS_LOCHE, "loche" }, { SYSZ_INS_LOCGHE, "locghe" }, { SYSZ_INS_LOCGRHE, "locgrhe" }, { SYSZ_INS_LOCRHE, "locrhe" }, { SYSZ_INS_STOCHE, "stoche" }, { SYSZ_INS_STOCGHE, "stocghe" }, { SYSZ_INS_JH, "jh" }, { SYSZ_INS_JGH, "jgh" }, { SYSZ_INS_LOCH, "loch" }, { SYSZ_INS_LOCGH, "locgh" }, { SYSZ_INS_LOCGRH, "locgrh" }, { SYSZ_INS_LOCRH, "locrh" }, { SYSZ_INS_STOCH, "stoch" }, { SYSZ_INS_STOCGH, "stocgh" }, { SYSZ_INS_CGIJNLH, "cgijnlh" }, { SYSZ_INS_CGRJNLH, "cgrjnlh" }, { SYSZ_INS_CIJNLH, "cijnlh" }, { SYSZ_INS_CLGIJNLH, "clgijnlh" }, { SYSZ_INS_CLGRJNLH, "clgrjnlh" }, { SYSZ_INS_CLIJNLH, "clijnlh" }, { SYSZ_INS_CLRJNLH, "clrjnlh" }, { SYSZ_INS_CRJNLH, "crjnlh" }, { SYSZ_INS_CGIJE, "cgije" }, { SYSZ_INS_CGRJE, "cgrje" }, { SYSZ_INS_CIJE, "cije" }, { SYSZ_INS_CLGIJE, "clgije" }, { SYSZ_INS_CLGRJE, "clgrje" }, { SYSZ_INS_CLIJE, "clije" }, { SYSZ_INS_CLRJE, "clrje" }, { SYSZ_INS_CRJE, "crje" }, { SYSZ_INS_CGIJNLE, "cgijnle" }, { SYSZ_INS_CGRJNLE, "cgrjnle" }, { SYSZ_INS_CIJNLE, "cijnle" }, { SYSZ_INS_CLGIJNLE, "clgijnle" }, { SYSZ_INS_CLGRJNLE, "clgrjnle" }, { SYSZ_INS_CLIJNLE, "clijnle" }, { SYSZ_INS_CLRJNLE, "clrjnle" }, { SYSZ_INS_CRJNLE, "crjnle" }, { SYSZ_INS_CGIJH, "cgijh" }, { SYSZ_INS_CGRJH, "cgrjh" }, { SYSZ_INS_CIJH, "cijh" }, { SYSZ_INS_CLGIJH, "clgijh" }, { SYSZ_INS_CLGRJH, "clgrjh" }, { SYSZ_INS_CLIJH, "clijh" }, { SYSZ_INS_CLRJH, "clrjh" }, { SYSZ_INS_CRJH, "crjh" }, { SYSZ_INS_CGIJNL, "cgijnl" }, { SYSZ_INS_CGRJNL, "cgrjnl" }, { SYSZ_INS_CIJNL, "cijnl" }, { SYSZ_INS_CLGIJNL, "clgijnl" }, { SYSZ_INS_CLGRJNL, "clgrjnl" }, { SYSZ_INS_CLIJNL, "clijnl" }, { SYSZ_INS_CLRJNL, "clrjnl" }, { SYSZ_INS_CRJNL, "crjnl" }, { SYSZ_INS_CGIJHE, "cgijhe" }, { SYSZ_INS_CGRJHE, "cgrjhe" }, { SYSZ_INS_CIJHE, "cijhe" }, { SYSZ_INS_CLGIJHE, "clgijhe" }, { SYSZ_INS_CLGRJHE, "clgrjhe" }, { SYSZ_INS_CLIJHE, "clijhe" }, { SYSZ_INS_CLRJHE, "clrjhe" }, { SYSZ_INS_CRJHE, "crjhe" }, { SYSZ_INS_CGIJNHE, "cgijnhe" }, { SYSZ_INS_CGRJNHE, "cgrjnhe" }, { SYSZ_INS_CIJNHE, "cijnhe" }, { SYSZ_INS_CLGIJNHE, "clgijnhe" }, { SYSZ_INS_CLGRJNHE, "clgrjnhe" }, { SYSZ_INS_CLIJNHE, "clijnhe" }, { SYSZ_INS_CLRJNHE, "clrjnhe" }, { SYSZ_INS_CRJNHE, "crjnhe" }, { SYSZ_INS_CGIJL, "cgijl" }, { SYSZ_INS_CGRJL, "cgrjl" }, { SYSZ_INS_CIJL, "cijl" }, { SYSZ_INS_CLGIJL, "clgijl" }, { SYSZ_INS_CLGRJL, "clgrjl" }, { SYSZ_INS_CLIJL, "clijl" }, { SYSZ_INS_CLRJL, "clrjl" }, { SYSZ_INS_CRJL, "crjl" }, { SYSZ_INS_CGIJNH, "cgijnh" }, { SYSZ_INS_CGRJNH, "cgrjnh" }, { SYSZ_INS_CIJNH, "cijnh" }, { SYSZ_INS_CLGIJNH, "clgijnh" }, { SYSZ_INS_CLGRJNH, "clgrjnh" }, { SYSZ_INS_CLIJNH, "clijnh" }, { SYSZ_INS_CLRJNH, "clrjnh" }, { SYSZ_INS_CRJNH, "crjnh" }, { SYSZ_INS_CGIJLE, "cgijle" }, { SYSZ_INS_CGRJLE, "cgrjle" }, { SYSZ_INS_CIJLE, "cijle" }, { SYSZ_INS_CLGIJLE, "clgijle" }, { SYSZ_INS_CLGRJLE, "clgrjle" }, { SYSZ_INS_CLIJLE, "clijle" }, { SYSZ_INS_CLRJLE, "clrjle" }, { SYSZ_INS_CRJLE, "crjle" }, { SYSZ_INS_CGIJNE, "cgijne" }, { SYSZ_INS_CGRJNE, "cgrjne" }, { SYSZ_INS_CIJNE, "cijne" }, { SYSZ_INS_CLGIJNE, "clgijne" }, { SYSZ_INS_CLGRJNE, "clgrjne" }, { SYSZ_INS_CLIJNE, "clijne" }, { SYSZ_INS_CLRJNE, "clrjne" }, { SYSZ_INS_CRJNE, "crjne" }, { SYSZ_INS_CGIJLH, "cgijlh" }, { SYSZ_INS_CGRJLH, "cgrjlh" }, { SYSZ_INS_CIJLH, "cijlh" }, { SYSZ_INS_CLGIJLH, "clgijlh" }, { SYSZ_INS_CLGRJLH, "clgrjlh" }, { SYSZ_INS_CLIJLH, "clijlh" }, { SYSZ_INS_CLRJLH, "clrjlh" }, { SYSZ_INS_CRJLH, "crjlh" }, { SYSZ_INS_BLR, "blr" }, { SYSZ_INS_BLER, "bler" }, { SYSZ_INS_JLE, "jle" }, { SYSZ_INS_JGLE, "jgle" }, { SYSZ_INS_LOCLE, "locle" }, { SYSZ_INS_LOCGLE, "locgle" }, { SYSZ_INS_LOCGRLE, "locgrle" }, { SYSZ_INS_LOCRLE, "locrle" }, { SYSZ_INS_STOCLE, "stocle" }, { SYSZ_INS_STOCGLE, "stocgle" }, { SYSZ_INS_BLHR, "blhr" }, { SYSZ_INS_JLH, "jlh" }, { SYSZ_INS_JGLH, "jglh" }, { SYSZ_INS_LOCLH, "loclh" }, { SYSZ_INS_LOCGLH, "locglh" }, { SYSZ_INS_LOCGRLH, "locgrlh" }, { SYSZ_INS_LOCRLH, "locrlh" }, { SYSZ_INS_STOCLH, "stoclh" }, { SYSZ_INS_STOCGLH, "stocglh" }, { SYSZ_INS_JL, "jl" }, { SYSZ_INS_JGL, "jgl" }, { SYSZ_INS_LOCL, "locl" }, { SYSZ_INS_LOCGL, "locgl" }, { SYSZ_INS_LOCGRL, "locgrl" }, { SYSZ_INS_LOCRL, "locrl" }, { SYSZ_INS_LOC, "loc" }, { SYSZ_INS_LOCG, "locg" }, { SYSZ_INS_LOCGR, "locgr" }, { SYSZ_INS_LOCR, "locr" }, { SYSZ_INS_STOCL, "stocl" }, { SYSZ_INS_STOCGL, "stocgl" }, { SYSZ_INS_BNER, "bner" }, { SYSZ_INS_JNE, "jne" }, { SYSZ_INS_JGNE, "jgne" }, { SYSZ_INS_LOCNE, "locne" }, { SYSZ_INS_LOCGNE, "locgne" }, { SYSZ_INS_LOCGRNE, "locgrne" }, { SYSZ_INS_LOCRNE, "locrne" }, { SYSZ_INS_STOCNE, "stocne" }, { SYSZ_INS_STOCGNE, "stocgne" }, { SYSZ_INS_BNHR, "bnhr" }, { SYSZ_INS_BNHER, "bnher" }, { SYSZ_INS_JNHE, "jnhe" }, { SYSZ_INS_JGNHE, "jgnhe" }, { SYSZ_INS_LOCNHE, "locnhe" }, { SYSZ_INS_LOCGNHE, "locgnhe" }, { SYSZ_INS_LOCGRNHE, "locgrnhe" }, { SYSZ_INS_LOCRNHE, "locrnhe" }, { SYSZ_INS_STOCNHE, "stocnhe" }, { SYSZ_INS_STOCGNHE, "stocgnhe" }, { SYSZ_INS_JNH, "jnh" }, { SYSZ_INS_JGNH, "jgnh" }, { SYSZ_INS_LOCNH, "locnh" }, { SYSZ_INS_LOCGNH, "locgnh" }, { SYSZ_INS_LOCGRNH, "locgrnh" }, { SYSZ_INS_LOCRNH, "locrnh" }, { SYSZ_INS_STOCNH, "stocnh" }, { SYSZ_INS_STOCGNH, "stocgnh" }, { SYSZ_INS_BNLR, "bnlr" }, { SYSZ_INS_BNLER, "bnler" }, { SYSZ_INS_JNLE, "jnle" }, { SYSZ_INS_JGNLE, "jgnle" }, { SYSZ_INS_LOCNLE, "locnle" }, { SYSZ_INS_LOCGNLE, "locgnle" }, { SYSZ_INS_LOCGRNLE, "locgrnle" }, { SYSZ_INS_LOCRNLE, "locrnle" }, { SYSZ_INS_STOCNLE, "stocnle" }, { SYSZ_INS_STOCGNLE, "stocgnle" }, { SYSZ_INS_BNLHR, "bnlhr" }, { SYSZ_INS_JNLH, "jnlh" }, { SYSZ_INS_JGNLH, "jgnlh" }, { SYSZ_INS_LOCNLH, "locnlh" }, { SYSZ_INS_LOCGNLH, "locgnlh" }, { SYSZ_INS_LOCGRNLH, "locgrnlh" }, { SYSZ_INS_LOCRNLH, "locrnlh" }, { SYSZ_INS_STOCNLH, "stocnlh" }, { SYSZ_INS_STOCGNLH, "stocgnlh" }, { SYSZ_INS_JNL, "jnl" }, { SYSZ_INS_JGNL, "jgnl" }, { SYSZ_INS_LOCNL, "locnl" }, { SYSZ_INS_LOCGNL, "locgnl" }, { SYSZ_INS_LOCGRNL, "locgrnl" }, { SYSZ_INS_LOCRNL, "locrnl" }, { SYSZ_INS_STOCNL, "stocnl" }, { SYSZ_INS_STOCGNL, "stocgnl" }, { SYSZ_INS_BNOR, "bnor" }, { SYSZ_INS_JNO, "jno" }, { SYSZ_INS_JGNO, "jgno" }, { SYSZ_INS_LOCNO, "locno" }, { SYSZ_INS_LOCGNO, "locgno" }, { SYSZ_INS_LOCGRNO, "locgrno" }, { SYSZ_INS_LOCRNO, "locrno" }, { SYSZ_INS_STOCNO, "stocno" }, { SYSZ_INS_STOCGNO, "stocgno" }, { SYSZ_INS_BOR, "bor" }, { SYSZ_INS_JO, "jo" }, { SYSZ_INS_JGO, "jgo" }, { SYSZ_INS_LOCO, "loco" }, { SYSZ_INS_LOCGO, "locgo" }, { SYSZ_INS_LOCGRO, "locgro" }, { SYSZ_INS_LOCRO, "locro" }, { SYSZ_INS_STOCO, "stoco" }, { SYSZ_INS_STOCGO, "stocgo" }, { SYSZ_INS_STOC, "stoc" }, { SYSZ_INS_STOCG, "stocg" }, { SYSZ_INS_BASR, "basr" }, { SYSZ_INS_BR, "br" }, { SYSZ_INS_BRAS, "bras" }, { SYSZ_INS_BRASL, "brasl" }, { SYSZ_INS_J, "j" }, { SYSZ_INS_JG, "jg" }, { SYSZ_INS_BRCT, "brct" }, { SYSZ_INS_BRCTG, "brctg" }, { SYSZ_INS_C, "c" }, { SYSZ_INS_CDB, "cdb" }, { SYSZ_INS_CDBR, "cdbr" }, { SYSZ_INS_CDFBR, "cdfbr" }, { SYSZ_INS_CDGBR, "cdgbr" }, { SYSZ_INS_CDLFBR, "cdlfbr" }, { SYSZ_INS_CDLGBR, "cdlgbr" }, { SYSZ_INS_CEB, "ceb" }, { SYSZ_INS_CEBR, "cebr" }, { SYSZ_INS_CEFBR, "cefbr" }, { SYSZ_INS_CEGBR, "cegbr" }, { SYSZ_INS_CELFBR, "celfbr" }, { SYSZ_INS_CELGBR, "celgbr" }, { SYSZ_INS_CFDBR, "cfdbr" }, { SYSZ_INS_CFEBR, "cfebr" }, { SYSZ_INS_CFI, "cfi" }, { SYSZ_INS_CFXBR, "cfxbr" }, { SYSZ_INS_CG, "cg" }, { SYSZ_INS_CGDBR, "cgdbr" }, { SYSZ_INS_CGEBR, "cgebr" }, { SYSZ_INS_CGF, "cgf" }, { SYSZ_INS_CGFI, "cgfi" }, { SYSZ_INS_CGFR, "cgfr" }, { SYSZ_INS_CGFRL, "cgfrl" }, { SYSZ_INS_CGH, "cgh" }, { SYSZ_INS_CGHI, "cghi" }, { SYSZ_INS_CGHRL, "cghrl" }, { SYSZ_INS_CGHSI, "cghsi" }, { SYSZ_INS_CGR, "cgr" }, { SYSZ_INS_CGRL, "cgrl" }, { SYSZ_INS_CGXBR, "cgxbr" }, { SYSZ_INS_CH, "ch" }, { SYSZ_INS_CHF, "chf" }, { SYSZ_INS_CHHSI, "chhsi" }, { SYSZ_INS_CHI, "chi" }, { SYSZ_INS_CHRL, "chrl" }, { SYSZ_INS_CHSI, "chsi" }, { SYSZ_INS_CHY, "chy" }, { SYSZ_INS_CIH, "cih" }, { SYSZ_INS_CL, "cl" }, { SYSZ_INS_CLC, "clc" }, { SYSZ_INS_CLFDBR, "clfdbr" }, { SYSZ_INS_CLFEBR, "clfebr" }, { SYSZ_INS_CLFHSI, "clfhsi" }, { SYSZ_INS_CLFI, "clfi" }, { SYSZ_INS_CLFXBR, "clfxbr" }, { SYSZ_INS_CLG, "clg" }, { SYSZ_INS_CLGDBR, "clgdbr" }, { SYSZ_INS_CLGEBR, "clgebr" }, { SYSZ_INS_CLGF, "clgf" }, { SYSZ_INS_CLGFI, "clgfi" }, { SYSZ_INS_CLGFR, "clgfr" }, { SYSZ_INS_CLGFRL, "clgfrl" }, { SYSZ_INS_CLGHRL, "clghrl" }, { SYSZ_INS_CLGHSI, "clghsi" }, { SYSZ_INS_CLGR, "clgr" }, { SYSZ_INS_CLGRL, "clgrl" }, { SYSZ_INS_CLGXBR, "clgxbr" }, { SYSZ_INS_CLHF, "clhf" }, { SYSZ_INS_CLHHSI, "clhhsi" }, { SYSZ_INS_CLHRL, "clhrl" }, { SYSZ_INS_CLI, "cli" }, { SYSZ_INS_CLIH, "clih" }, { SYSZ_INS_CLIY, "cliy" }, { SYSZ_INS_CLR, "clr" }, { SYSZ_INS_CLRL, "clrl" }, { SYSZ_INS_CLST, "clst" }, { SYSZ_INS_CLY, "cly" }, { SYSZ_INS_CPSDR, "cpsdr" }, { SYSZ_INS_CR, "cr" }, { SYSZ_INS_CRL, "crl" }, { SYSZ_INS_CS, "cs" }, { SYSZ_INS_CSG, "csg" }, { SYSZ_INS_CSY, "csy" }, { SYSZ_INS_CXBR, "cxbr" }, { SYSZ_INS_CXFBR, "cxfbr" }, { SYSZ_INS_CXGBR, "cxgbr" }, { SYSZ_INS_CXLFBR, "cxlfbr" }, { SYSZ_INS_CXLGBR, "cxlgbr" }, { SYSZ_INS_CY, "cy" }, { SYSZ_INS_DDB, "ddb" }, { SYSZ_INS_DDBR, "ddbr" }, { SYSZ_INS_DEB, "deb" }, { SYSZ_INS_DEBR, "debr" }, { SYSZ_INS_DL, "dl" }, { SYSZ_INS_DLG, "dlg" }, { SYSZ_INS_DLGR, "dlgr" }, { SYSZ_INS_DLR, "dlr" }, { SYSZ_INS_DSG, "dsg" }, { SYSZ_INS_DSGF, "dsgf" }, { SYSZ_INS_DSGFR, "dsgfr" }, { SYSZ_INS_DSGR, "dsgr" }, { SYSZ_INS_DXBR, "dxbr" }, { SYSZ_INS_EAR, "ear" }, { SYSZ_INS_FIDBR, "fidbr" }, { SYSZ_INS_FIDBRA, "fidbra" }, { SYSZ_INS_FIEBR, "fiebr" }, { SYSZ_INS_FIEBRA, "fiebra" }, { SYSZ_INS_FIXBR, "fixbr" }, { SYSZ_INS_FIXBRA, "fixbra" }, { SYSZ_INS_FLOGR, "flogr" }, { SYSZ_INS_IC, "ic" }, { SYSZ_INS_ICY, "icy" }, { SYSZ_INS_IIHF, "iihf" }, { SYSZ_INS_IIHH, "iihh" }, { SYSZ_INS_IIHL, "iihl" }, { SYSZ_INS_IILF, "iilf" }, { SYSZ_INS_IILH, "iilh" }, { SYSZ_INS_IILL, "iill" }, { SYSZ_INS_IPM, "ipm" }, { SYSZ_INS_L, "l" }, { SYSZ_INS_LA, "la" }, { SYSZ_INS_LAA, "laa" }, { SYSZ_INS_LAAG, "laag" }, { SYSZ_INS_LAAL, "laal" }, { SYSZ_INS_LAALG, "laalg" }, { SYSZ_INS_LAN, "lan" }, { SYSZ_INS_LANG, "lang" }, { SYSZ_INS_LAO, "lao" }, { SYSZ_INS_LAOG, "laog" }, { SYSZ_INS_LARL, "larl" }, { SYSZ_INS_LAX, "lax" }, { SYSZ_INS_LAXG, "laxg" }, { SYSZ_INS_LAY, "lay" }, { SYSZ_INS_LB, "lb" }, { SYSZ_INS_LBH, "lbh" }, { SYSZ_INS_LBR, "lbr" }, { SYSZ_INS_LCDBR, "lcdbr" }, { SYSZ_INS_LCEBR, "lcebr" }, { SYSZ_INS_LCGFR, "lcgfr" }, { SYSZ_INS_LCGR, "lcgr" }, { SYSZ_INS_LCR, "lcr" }, { SYSZ_INS_LCXBR, "lcxbr" }, { SYSZ_INS_LD, "ld" }, { SYSZ_INS_LDEB, "ldeb" }, { SYSZ_INS_LDEBR, "ldebr" }, { SYSZ_INS_LDGR, "ldgr" }, { SYSZ_INS_LDR, "ldr" }, { SYSZ_INS_LDXBR, "ldxbr" }, { SYSZ_INS_LDXBRA, "ldxbra" }, { SYSZ_INS_LDY, "ldy" }, { SYSZ_INS_LE, "le" }, { SYSZ_INS_LEDBR, "ledbr" }, { SYSZ_INS_LEDBRA, "ledbra" }, { SYSZ_INS_LER, "ler" }, { SYSZ_INS_LEXBR, "lexbr" }, { SYSZ_INS_LEXBRA, "lexbra" }, { SYSZ_INS_LEY, "ley" }, { SYSZ_INS_LFH, "lfh" }, { SYSZ_INS_LG, "lg" }, { SYSZ_INS_LGB, "lgb" }, { SYSZ_INS_LGBR, "lgbr" }, { SYSZ_INS_LGDR, "lgdr" }, { SYSZ_INS_LGF, "lgf" }, { SYSZ_INS_LGFI, "lgfi" }, { SYSZ_INS_LGFR, "lgfr" }, { SYSZ_INS_LGFRL, "lgfrl" }, { SYSZ_INS_LGH, "lgh" }, { SYSZ_INS_LGHI, "lghi" }, { SYSZ_INS_LGHR, "lghr" }, { SYSZ_INS_LGHRL, "lghrl" }, { SYSZ_INS_LGR, "lgr" }, { SYSZ_INS_LGRL, "lgrl" }, { SYSZ_INS_LH, "lh" }, { SYSZ_INS_LHH, "lhh" }, { SYSZ_INS_LHI, "lhi" }, { SYSZ_INS_LHR, "lhr" }, { SYSZ_INS_LHRL, "lhrl" }, { SYSZ_INS_LHY, "lhy" }, { SYSZ_INS_LLC, "llc" }, { SYSZ_INS_LLCH, "llch" }, { SYSZ_INS_LLCR, "llcr" }, { SYSZ_INS_LLGC, "llgc" }, { SYSZ_INS_LLGCR, "llgcr" }, { SYSZ_INS_LLGF, "llgf" }, { SYSZ_INS_LLGFR, "llgfr" }, { SYSZ_INS_LLGFRL, "llgfrl" }, { SYSZ_INS_LLGH, "llgh" }, { SYSZ_INS_LLGHR, "llghr" }, { SYSZ_INS_LLGHRL, "llghrl" }, { SYSZ_INS_LLH, "llh" }, { SYSZ_INS_LLHH, "llhh" }, { SYSZ_INS_LLHR, "llhr" }, { SYSZ_INS_LLHRL, "llhrl" }, { SYSZ_INS_LLIHF, "llihf" }, { SYSZ_INS_LLIHH, "llihh" }, { SYSZ_INS_LLIHL, "llihl" }, { SYSZ_INS_LLILF, "llilf" }, { SYSZ_INS_LLILH, "llilh" }, { SYSZ_INS_LLILL, "llill" }, { SYSZ_INS_LMG, "lmg" }, { SYSZ_INS_LNDBR, "lndbr" }, { SYSZ_INS_LNEBR, "lnebr" }, { SYSZ_INS_LNGFR, "lngfr" }, { SYSZ_INS_LNGR, "lngr" }, { SYSZ_INS_LNR, "lnr" }, { SYSZ_INS_LNXBR, "lnxbr" }, { SYSZ_INS_LPDBR, "lpdbr" }, { SYSZ_INS_LPEBR, "lpebr" }, { SYSZ_INS_LPGFR, "lpgfr" }, { SYSZ_INS_LPGR, "lpgr" }, { SYSZ_INS_LPR, "lpr" }, { SYSZ_INS_LPXBR, "lpxbr" }, { SYSZ_INS_LR, "lr" }, { SYSZ_INS_LRL, "lrl" }, { SYSZ_INS_LRV, "lrv" }, { SYSZ_INS_LRVG, "lrvg" }, { SYSZ_INS_LRVGR, "lrvgr" }, { SYSZ_INS_LRVR, "lrvr" }, { SYSZ_INS_LT, "lt" }, { SYSZ_INS_LTDBR, "ltdbr" }, { SYSZ_INS_LTEBR, "ltebr" }, { SYSZ_INS_LTG, "ltg" }, { SYSZ_INS_LTGF, "ltgf" }, { SYSZ_INS_LTGFR, "ltgfr" }, { SYSZ_INS_LTGR, "ltgr" }, { SYSZ_INS_LTR, "ltr" }, { SYSZ_INS_LTXBR, "ltxbr" }, { SYSZ_INS_LXDB, "lxdb" }, { SYSZ_INS_LXDBR, "lxdbr" }, { SYSZ_INS_LXEB, "lxeb" }, { SYSZ_INS_LXEBR, "lxebr" }, { SYSZ_INS_LXR, "lxr" }, { SYSZ_INS_LY, "ly" }, { SYSZ_INS_LZDR, "lzdr" }, { SYSZ_INS_LZER, "lzer" }, { SYSZ_INS_LZXR, "lzxr" }, { SYSZ_INS_MADB, "madb" }, { SYSZ_INS_MADBR, "madbr" }, { SYSZ_INS_MAEB, "maeb" }, { SYSZ_INS_MAEBR, "maebr" }, { SYSZ_INS_MDB, "mdb" }, { SYSZ_INS_MDBR, "mdbr" }, { SYSZ_INS_MDEB, "mdeb" }, { SYSZ_INS_MDEBR, "mdebr" }, { SYSZ_INS_MEEB, "meeb" }, { SYSZ_INS_MEEBR, "meebr" }, { SYSZ_INS_MGHI, "mghi" }, { SYSZ_INS_MH, "mh" }, { SYSZ_INS_MHI, "mhi" }, { SYSZ_INS_MHY, "mhy" }, { SYSZ_INS_MLG, "mlg" }, { SYSZ_INS_MLGR, "mlgr" }, { SYSZ_INS_MS, "ms" }, { SYSZ_INS_MSDB, "msdb" }, { SYSZ_INS_MSDBR, "msdbr" }, { SYSZ_INS_MSEB, "mseb" }, { SYSZ_INS_MSEBR, "msebr" }, { SYSZ_INS_MSFI, "msfi" }, { SYSZ_INS_MSG, "msg" }, { SYSZ_INS_MSGF, "msgf" }, { SYSZ_INS_MSGFI, "msgfi" }, { SYSZ_INS_MSGFR, "msgfr" }, { SYSZ_INS_MSGR, "msgr" }, { SYSZ_INS_MSR, "msr" }, { SYSZ_INS_MSY, "msy" }, { SYSZ_INS_MVC, "mvc" }, { SYSZ_INS_MVGHI, "mvghi" }, { SYSZ_INS_MVHHI, "mvhhi" }, { SYSZ_INS_MVHI, "mvhi" }, { SYSZ_INS_MVI, "mvi" }, { SYSZ_INS_MVIY, "mviy" }, { SYSZ_INS_MVST, "mvst" }, { SYSZ_INS_MXBR, "mxbr" }, { SYSZ_INS_MXDB, "mxdb" }, { SYSZ_INS_MXDBR, "mxdbr" }, { SYSZ_INS_N, "n" }, { SYSZ_INS_NC, "nc" }, { SYSZ_INS_NG, "ng" }, { SYSZ_INS_NGR, "ngr" }, { SYSZ_INS_NGRK, "ngrk" }, { SYSZ_INS_NI, "ni" }, { SYSZ_INS_NIHF, "nihf" }, { SYSZ_INS_NIHH, "nihh" }, { SYSZ_INS_NIHL, "nihl" }, { SYSZ_INS_NILF, "nilf" }, { SYSZ_INS_NILH, "nilh" }, { SYSZ_INS_NILL, "nill" }, { SYSZ_INS_NIY, "niy" }, { SYSZ_INS_NR, "nr" }, { SYSZ_INS_NRK, "nrk" }, { SYSZ_INS_NY, "ny" }, { SYSZ_INS_O, "o" }, { SYSZ_INS_OC, "oc" }, { SYSZ_INS_OG, "og" }, { SYSZ_INS_OGR, "ogr" }, { SYSZ_INS_OGRK, "ogrk" }, { SYSZ_INS_OI, "oi" }, { SYSZ_INS_OIHF, "oihf" }, { SYSZ_INS_OIHH, "oihh" }, { SYSZ_INS_OIHL, "oihl" }, { SYSZ_INS_OILF, "oilf" }, { SYSZ_INS_OILH, "oilh" }, { SYSZ_INS_OILL, "oill" }, { SYSZ_INS_OIY, "oiy" }, { SYSZ_INS_OR, "or" }, { SYSZ_INS_ORK, "ork" }, { SYSZ_INS_OY, "oy" }, { SYSZ_INS_PFD, "pfd" }, { SYSZ_INS_PFDRL, "pfdrl" }, { SYSZ_INS_RISBG, "risbg" }, { SYSZ_INS_RISBHG, "risbhg" }, { SYSZ_INS_RISBLG, "risblg" }, { SYSZ_INS_RLL, "rll" }, { SYSZ_INS_RLLG, "rllg" }, { SYSZ_INS_RNSBG, "rnsbg" }, { SYSZ_INS_ROSBG, "rosbg" }, { SYSZ_INS_RXSBG, "rxsbg" }, { SYSZ_INS_S, "s" }, { SYSZ_INS_SDB, "sdb" }, { SYSZ_INS_SDBR, "sdbr" }, { SYSZ_INS_SEB, "seb" }, { SYSZ_INS_SEBR, "sebr" }, { SYSZ_INS_SG, "sg" }, { SYSZ_INS_SGF, "sgf" }, { SYSZ_INS_SGFR, "sgfr" }, { SYSZ_INS_SGR, "sgr" }, { SYSZ_INS_SGRK, "sgrk" }, { SYSZ_INS_SH, "sh" }, { SYSZ_INS_SHY, "shy" }, { SYSZ_INS_SL, "sl" }, { SYSZ_INS_SLB, "slb" }, { SYSZ_INS_SLBG, "slbg" }, { SYSZ_INS_SLBR, "slbr" }, { SYSZ_INS_SLFI, "slfi" }, { SYSZ_INS_SLG, "slg" }, { SYSZ_INS_SLBGR, "slbgr" }, { SYSZ_INS_SLGF, "slgf" }, { SYSZ_INS_SLGFI, "slgfi" }, { SYSZ_INS_SLGFR, "slgfr" }, { SYSZ_INS_SLGR, "slgr" }, { SYSZ_INS_SLGRK, "slgrk" }, { SYSZ_INS_SLL, "sll" }, { SYSZ_INS_SLLG, "sllg" }, { SYSZ_INS_SLLK, "sllk" }, { SYSZ_INS_SLR, "slr" }, { SYSZ_INS_SLRK, "slrk" }, { SYSZ_INS_SLY, "sly" }, { SYSZ_INS_SQDB, "sqdb" }, { SYSZ_INS_SQDBR, "sqdbr" }, { SYSZ_INS_SQEB, "sqeb" }, { SYSZ_INS_SQEBR, "sqebr" }, { SYSZ_INS_SQXBR, "sqxbr" }, { SYSZ_INS_SR, "sr" }, { SYSZ_INS_SRA, "sra" }, { SYSZ_INS_SRAG, "srag" }, { SYSZ_INS_SRAK, "srak" }, { SYSZ_INS_SRK, "srk" }, { SYSZ_INS_SRL, "srl" }, { SYSZ_INS_SRLG, "srlg" }, { SYSZ_INS_SRLK, "srlk" }, { SYSZ_INS_SRST, "srst" }, { SYSZ_INS_ST, "st" }, { SYSZ_INS_STC, "stc" }, { SYSZ_INS_STCH, "stch" }, { SYSZ_INS_STCY, "stcy" }, { SYSZ_INS_STD, "std" }, { SYSZ_INS_STDY, "stdy" }, { SYSZ_INS_STE, "ste" }, { SYSZ_INS_STEY, "stey" }, { SYSZ_INS_STFH, "stfh" }, { SYSZ_INS_STG, "stg" }, { SYSZ_INS_STGRL, "stgrl" }, { SYSZ_INS_STH, "sth" }, { SYSZ_INS_STHH, "sthh" }, { SYSZ_INS_STHRL, "sthrl" }, { SYSZ_INS_STHY, "sthy" }, { SYSZ_INS_STMG, "stmg" }, { SYSZ_INS_STRL, "strl" }, { SYSZ_INS_STRV, "strv" }, { SYSZ_INS_STRVG, "strvg" }, { SYSZ_INS_STY, "sty" }, { SYSZ_INS_SXBR, "sxbr" }, { SYSZ_INS_SY, "sy" }, { SYSZ_INS_TM, "tm" }, { SYSZ_INS_TMHH, "tmhh" }, { SYSZ_INS_TMHL, "tmhl" }, { SYSZ_INS_TMLH, "tmlh" }, { SYSZ_INS_TMLL, "tmll" }, { SYSZ_INS_TMY, "tmy" }, { SYSZ_INS_X, "x" }, { SYSZ_INS_XC, "xc" }, { SYSZ_INS_XG, "xg" }, { SYSZ_INS_XGR, "xgr" }, { SYSZ_INS_XGRK, "xgrk" }, { SYSZ_INS_XI, "xi" }, { SYSZ_INS_XIHF, "xihf" }, { SYSZ_INS_XILF, "xilf" }, { SYSZ_INS_XIY, "xiy" }, { SYSZ_INS_XR, "xr" }, { SYSZ_INS_XRK, "xrk" }, { SYSZ_INS_XY, "xy" }, }; // special alias insn static const name_map alias_insn_names[] = { { 0, NULL } }; #endif const char *SystemZ_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET unsigned int i; if (id >= SYSZ_INS_ENDING) return NULL; // handle special alias first for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { if (alias_insn_names[i].id == id) return alias_insn_names[i].name; } return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { SYSZ_GRP_INVALID, NULL }, { SYSZ_GRP_JUMP, "jump" }, // architecture-specific groups { SYSZ_GRP_DISTINCTOPS, "distinctops" }, { SYSZ_GRP_FPEXTENSION, "fpextension" }, { SYSZ_GRP_HIGHWORD, "highword" }, { SYSZ_GRP_INTERLOCKEDACCESS1, "interlockedaccess1" }, { SYSZ_GRP_LOADSTOREONCOND, "loadstoreoncond" }, }; #endif const char *SystemZ_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // map internal raw register to 'public' register sysz_reg SystemZ_map_register(unsigned int r) { static const unsigned int map[] = { 0, SYSZ_REG_CC, SYSZ_REG_F0, SYSZ_REG_F1, SYSZ_REG_F2, SYSZ_REG_F3, SYSZ_REG_F4, SYSZ_REG_F5, SYSZ_REG_F6, SYSZ_REG_F7, SYSZ_REG_F8, SYSZ_REG_F9, SYSZ_REG_F10, SYSZ_REG_F11, SYSZ_REG_F12, SYSZ_REG_F13, SYSZ_REG_F14, SYSZ_REG_F15, SYSZ_REG_F0, SYSZ_REG_F1, SYSZ_REG_F4, SYSZ_REG_F5, SYSZ_REG_F8, SYSZ_REG_F9, SYSZ_REG_F12, SYSZ_REG_F13, SYSZ_REG_F0, SYSZ_REG_F1, SYSZ_REG_F2, SYSZ_REG_F3, SYSZ_REG_F4, SYSZ_REG_F5, SYSZ_REG_F6, SYSZ_REG_F7, SYSZ_REG_F8, SYSZ_REG_F9, SYSZ_REG_F10, SYSZ_REG_F11, SYSZ_REG_F12, SYSZ_REG_F13, SYSZ_REG_F14, SYSZ_REG_F15, SYSZ_REG_0, SYSZ_REG_1, SYSZ_REG_2, SYSZ_REG_3, SYSZ_REG_4, SYSZ_REG_5, SYSZ_REG_6, SYSZ_REG_7, SYSZ_REG_8, SYSZ_REG_9, SYSZ_REG_10, SYSZ_REG_11, SYSZ_REG_12, SYSZ_REG_13, SYSZ_REG_14, SYSZ_REG_15, SYSZ_REG_0, SYSZ_REG_1, SYSZ_REG_2, SYSZ_REG_3, SYSZ_REG_4, SYSZ_REG_5, SYSZ_REG_6, SYSZ_REG_7, SYSZ_REG_8, SYSZ_REG_9, SYSZ_REG_10, SYSZ_REG_11, SYSZ_REG_12, SYSZ_REG_13, SYSZ_REG_14, SYSZ_REG_15, SYSZ_REG_0, SYSZ_REG_1, SYSZ_REG_2, SYSZ_REG_3, SYSZ_REG_4, SYSZ_REG_5, SYSZ_REG_6, SYSZ_REG_7, SYSZ_REG_8, SYSZ_REG_9, SYSZ_REG_10, SYSZ_REG_11, SYSZ_REG_12, SYSZ_REG_13, SYSZ_REG_14, SYSZ_REG_15, SYSZ_REG_0, SYSZ_REG_2, SYSZ_REG_4, SYSZ_REG_6, SYSZ_REG_8, SYSZ_REG_10, SYSZ_REG_12, SYSZ_REG_14, }; if (r < ARR_SIZE(map)) return map[r]; // cannot find this register return 0; } #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZMapping.h010066400017500001750000000011721363402546700217310ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_SYSZ_MAP_H #define CS_SYSZ_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *SystemZ_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void SystemZ_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *SystemZ_insn_name(csh handle, unsigned int id); const char *SystemZ_group_name(csh handle, unsigned int id); // map internal raw register to 'public' register sysz_reg SystemZ_map_register(unsigned int r); #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZMappingInsn.inc010066400017500001750000002173321363402546700231120ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { SystemZ_A, SYSZ_INS_A, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ADB, SYSZ_INS_ADB, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ADBR, SYSZ_INS_ADBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AEB, SYSZ_INS_AEB, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AEBR, SYSZ_INS_AEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AFI, SYSZ_INS_AFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AG, SYSZ_INS_AG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AGF, SYSZ_INS_AGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AGFI, SYSZ_INS_AGFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AGFR, SYSZ_INS_AGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AGHI, SYSZ_INS_AGHI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AGHIK, SYSZ_INS_AGHIK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_AGR, SYSZ_INS_AGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AGRK, SYSZ_INS_AGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_AGSI, SYSZ_INS_AGSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AH, SYSZ_INS_AH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AHI, SYSZ_INS_AHI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AHIK, SYSZ_INS_AHIK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_AHY, SYSZ_INS_AHY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AIH, SYSZ_INS_AIH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_AL, SYSZ_INS_AL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALC, SYSZ_INS_ALC, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALCG, SYSZ_INS_ALCG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALCGR, SYSZ_INS_ALCGR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALCR, SYSZ_INS_ALCR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALFI, SYSZ_INS_ALFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALG, SYSZ_INS_ALG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALGF, SYSZ_INS_ALGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALGFI, SYSZ_INS_ALGFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALGFR, SYSZ_INS_ALGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALGHSIK, SYSZ_INS_ALGHSIK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_ALGR, SYSZ_INS_ALGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALGRK, SYSZ_INS_ALGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_ALHSIK, SYSZ_INS_ALHSIK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_ALR, SYSZ_INS_ALR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ALRK, SYSZ_INS_ALRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_ALY, SYSZ_INS_ALY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AR, SYSZ_INS_AR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ARK, SYSZ_INS_ARK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_ASI, SYSZ_INS_ASI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AXBR, SYSZ_INS_AXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AY, SYSZ_INS_AY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmBCR, SYSZ_INS_BCR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmBRC, SYSZ_INS_BRC, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmBRCL, SYSZ_INS_BRCL, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCGIJ, SYSZ_INS_CGIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCGRJ, SYSZ_INS_CGRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCIJ, SYSZ_INS_CIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCLGIJ, SYSZ_INS_CLGIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCLGRJ, SYSZ_INS_CLGRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCLIJ, SYSZ_INS_CLIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCLRJ, SYSZ_INS_CLRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmCRJ, SYSZ_INS_CRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_AsmEBR, SYSZ_INS_BER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmEJ, SYSZ_INS_JE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmEJG, SYSZ_INS_JGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmELOC, SYSZ_INS_LOCE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmELOCG, SYSZ_INS_LOCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmELOCGR, SYSZ_INS_LOCGRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmELOCR, SYSZ_INS_LOCRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmESTOC, SYSZ_INS_STOCE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmESTOCG, SYSZ_INS_STOCGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHBR, SYSZ_INS_BHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmHEBR, SYSZ_INS_BHER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmHEJ, SYSZ_INS_JHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmHEJG, SYSZ_INS_JGHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmHELOC, SYSZ_INS_LOCHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHELOCG, SYSZ_INS_LOCGHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHELOCGR, SYSZ_INS_LOCGRHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHELOCR, SYSZ_INS_LOCRHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHESTOC, SYSZ_INS_STOCHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHESTOCG, SYSZ_INS_STOCGHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHJ, SYSZ_INS_JH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmHJG, SYSZ_INS_JGH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmHLOC, SYSZ_INS_LOCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHLOCG, SYSZ_INS_LOCGH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHLOCGR, SYSZ_INS_LOCGRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHLOCR, SYSZ_INS_LOCRH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHSTOC, SYSZ_INS_STOCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmHSTOCG, SYSZ_INS_STOCGH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCGI, SYSZ_INS_CGIJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCGR, SYSZ_INS_CGRJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCI, SYSZ_INS_CIJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCLGI, SYSZ_INS_CLGIJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCLGR, SYSZ_INS_CLGRJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCLI, SYSZ_INS_CLIJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCLR, SYSZ_INS_CLRJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJEAltCR, SYSZ_INS_CRJNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECGI, SYSZ_INS_CGIJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECGR, SYSZ_INS_CGRJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECI, SYSZ_INS_CIJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECLGI, SYSZ_INS_CLGIJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECLGR, SYSZ_INS_CLGRJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECLI, SYSZ_INS_CLIJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECLR, SYSZ_INS_CLRJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJECR, SYSZ_INS_CRJE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCGI, SYSZ_INS_CGIJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCGR, SYSZ_INS_CGRJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCI, SYSZ_INS_CIJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCLGI, SYSZ_INS_CLGIJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCLGR, SYSZ_INS_CLGRJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCLI, SYSZ_INS_CLIJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCLR, SYSZ_INS_CLRJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHAltCR, SYSZ_INS_CRJNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCGI, SYSZ_INS_CGIJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCGR, SYSZ_INS_CGRJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCI, SYSZ_INS_CIJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCLGI, SYSZ_INS_CLGIJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCLGR, SYSZ_INS_CLGRJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCLI, SYSZ_INS_CLIJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCLR, SYSZ_INS_CLRJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHCR, SYSZ_INS_CRJH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCGI, SYSZ_INS_CGIJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCGR, SYSZ_INS_CGRJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCI, SYSZ_INS_CIJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCLGI, SYSZ_INS_CLGIJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCLGR, SYSZ_INS_CLGRJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCLI, SYSZ_INS_CLIJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCLR, SYSZ_INS_CLRJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHEAltCR, SYSZ_INS_CRJNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECGI, SYSZ_INS_CGIJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECGR, SYSZ_INS_CGRJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECI, SYSZ_INS_CIJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECLGI, SYSZ_INS_CLGIJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECLGR, SYSZ_INS_CLGRJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECLI, SYSZ_INS_CLIJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECLR, SYSZ_INS_CLRJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJHECR, SYSZ_INS_CRJHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCGI, SYSZ_INS_CGIJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCGR, SYSZ_INS_CGRJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCI, SYSZ_INS_CIJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCLGI, SYSZ_INS_CLGIJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCLGR, SYSZ_INS_CLGRJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCLI, SYSZ_INS_CLIJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCLR, SYSZ_INS_CLRJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLAltCR, SYSZ_INS_CRJNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCGI, SYSZ_INS_CGIJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCGR, SYSZ_INS_CGRJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCI, SYSZ_INS_CIJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCLGI, SYSZ_INS_CLGIJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCLGR, SYSZ_INS_CLGRJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCLI, SYSZ_INS_CLIJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCLR, SYSZ_INS_CLRJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLCR, SYSZ_INS_CRJL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCGI, SYSZ_INS_CGIJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCGR, SYSZ_INS_CGRJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCI, SYSZ_INS_CIJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCLGI, SYSZ_INS_CLGIJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCLGR, SYSZ_INS_CLGRJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCLI, SYSZ_INS_CLIJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCLR, SYSZ_INS_CLRJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLEAltCR, SYSZ_INS_CRJNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECGI, SYSZ_INS_CGIJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECGR, SYSZ_INS_CGRJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECI, SYSZ_INS_CIJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECLGI, SYSZ_INS_CLGIJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECLGR, SYSZ_INS_CLGRJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECLI, SYSZ_INS_CLIJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECLR, SYSZ_INS_CLRJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLECR, SYSZ_INS_CRJLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCGI, SYSZ_INS_CGIJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCGR, SYSZ_INS_CGRJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCI, SYSZ_INS_CIJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCLGI, SYSZ_INS_CLGIJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCLGR, SYSZ_INS_CLGRJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCLI, SYSZ_INS_CLIJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCLR, SYSZ_INS_CLRJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHAltCR, SYSZ_INS_CRJNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCGI, SYSZ_INS_CGIJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCGR, SYSZ_INS_CGRJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCI, SYSZ_INS_CIJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCLGI, SYSZ_INS_CLGIJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCLGR, SYSZ_INS_CLGRJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCLI, SYSZ_INS_CLIJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCLR, SYSZ_INS_CLRJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmJLHCR, SYSZ_INS_CRJLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLBR, SYSZ_INS_BLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLEBR, SYSZ_INS_BLER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLEJ, SYSZ_INS_JLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLEJG, SYSZ_INS_JGLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLELOC, SYSZ_INS_LOCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLELOCG, SYSZ_INS_LOCGLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLELOCGR, SYSZ_INS_LOCGRLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLELOCR, SYSZ_INS_LOCRLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLESTOC, SYSZ_INS_STOCLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLESTOCG, SYSZ_INS_STOCGLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLHBR, SYSZ_INS_BLHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLHJ, SYSZ_INS_JLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLHJG, SYSZ_INS_JGLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLHLOC, SYSZ_INS_LOCLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLHLOCG, SYSZ_INS_LOCGLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLHLOCGR, SYSZ_INS_LOCGRLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLHLOCR, SYSZ_INS_LOCRLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLHSTOC, SYSZ_INS_STOCLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLHSTOCG, SYSZ_INS_STOCGLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLJ, SYSZ_INS_JL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLJG, SYSZ_INS_JGL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmLLOC, SYSZ_INS_LOCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLLOCG, SYSZ_INS_LOCGL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLLOCGR, SYSZ_INS_LOCGRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLLOCR, SYSZ_INS_LOCRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLOC, SYSZ_INS_LOC, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLOCG, SYSZ_INS_LOCG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLOCGR, SYSZ_INS_LOCGR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLOCR, SYSZ_INS_LOCR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLSTOC, SYSZ_INS_STOCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmLSTOCG, SYSZ_INS_STOCGL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNEBR, SYSZ_INS_BNER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNEJ, SYSZ_INS_JNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNEJG, SYSZ_INS_JGNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNELOC, SYSZ_INS_LOCNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNELOCG, SYSZ_INS_LOCGNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNELOCGR, SYSZ_INS_LOCGRNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNELOCR, SYSZ_INS_LOCRNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNESTOC, SYSZ_INS_STOCNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNESTOCG, SYSZ_INS_STOCGNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHBR, SYSZ_INS_BNHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNHEBR, SYSZ_INS_BNHER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNHEJ, SYSZ_INS_JNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNHEJG, SYSZ_INS_JGNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNHELOC, SYSZ_INS_LOCNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHELOCG, SYSZ_INS_LOCGNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHELOCGR, SYSZ_INS_LOCGRNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHELOCR, SYSZ_INS_LOCRNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHESTOC, SYSZ_INS_STOCNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHESTOCG, SYSZ_INS_STOCGNHE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHJ, SYSZ_INS_JNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNHJG, SYSZ_INS_JGNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNHLOC, SYSZ_INS_LOCNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHLOCG, SYSZ_INS_LOCGNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHLOCGR, SYSZ_INS_LOCGRNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHLOCR, SYSZ_INS_LOCRNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHSTOC, SYSZ_INS_STOCNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNHSTOCG, SYSZ_INS_STOCGNH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLBR, SYSZ_INS_BNLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLEBR, SYSZ_INS_BNLER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLEJ, SYSZ_INS_JNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLEJG, SYSZ_INS_JGNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLELOC, SYSZ_INS_LOCNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLELOCG, SYSZ_INS_LOCGNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLELOCGR, SYSZ_INS_LOCGRNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLELOCR, SYSZ_INS_LOCRNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLESTOC, SYSZ_INS_STOCNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLESTOCG, SYSZ_INS_STOCGNLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLHBR, SYSZ_INS_BNLHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLHJ, SYSZ_INS_JNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLHJG, SYSZ_INS_JGNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLHLOC, SYSZ_INS_LOCNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLHLOCG, SYSZ_INS_LOCGNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLHLOCGR, SYSZ_INS_LOCGRNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLHLOCR, SYSZ_INS_LOCRNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLHSTOC, SYSZ_INS_STOCNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLHSTOCG, SYSZ_INS_STOCGNLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLJ, SYSZ_INS_JNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLJG, SYSZ_INS_JGNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNLLOC, SYSZ_INS_LOCNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLLOCG, SYSZ_INS_LOCGNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLLOCGR, SYSZ_INS_LOCGRNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLLOCR, SYSZ_INS_LOCRNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLSTOC, SYSZ_INS_STOCNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNLSTOCG, SYSZ_INS_STOCGNL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNOBR, SYSZ_INS_BNOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNOJ, SYSZ_INS_JNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNOJG, SYSZ_INS_JGNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmNOLOC, SYSZ_INS_LOCNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNOLOCG, SYSZ_INS_LOCGNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNOLOCGR, SYSZ_INS_LOCGRNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNOLOCR, SYSZ_INS_LOCRNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNOSTOC, SYSZ_INS_STOCNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmNOSTOCG, SYSZ_INS_STOCGNO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmOBR, SYSZ_INS_BOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmOJ, SYSZ_INS_JO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmOJG, SYSZ_INS_JGO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_AsmOLOC, SYSZ_INS_LOCO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmOLOCG, SYSZ_INS_LOCGO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmOLOCGR, SYSZ_INS_LOCGRO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmOLOCR, SYSZ_INS_LOCRO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmOSTOC, SYSZ_INS_STOCO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmOSTOCG, SYSZ_INS_STOCGO, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmSTOC, SYSZ_INS_STOC, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_AsmSTOCG, SYSZ_INS_STOCG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_BASR, SYSZ_INS_BASR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_BR, SYSZ_INS_BR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { SystemZ_BRAS, SYSZ_INS_BRAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_BRASL, SYSZ_INS_BRASL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_BRC, SYSZ_INS_J, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_BRCL, SYSZ_INS_JG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_BRCT, SYSZ_INS_BRCT, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_BRCTG, SYSZ_INS_BRCTG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_C, SYSZ_INS_C, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CDB, SYSZ_INS_CDB, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CDBR, SYSZ_INS_CDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CDFBR, SYSZ_INS_CDFBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CDGBR, SYSZ_INS_CDGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CDLFBR, SYSZ_INS_CDLFBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CDLGBR, SYSZ_INS_CDLGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CEB, SYSZ_INS_CEB, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CEBR, SYSZ_INS_CEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CEFBR, SYSZ_INS_CEFBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CEGBR, SYSZ_INS_CEGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CELFBR, SYSZ_INS_CELFBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CELGBR, SYSZ_INS_CELGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CFDBR, SYSZ_INS_CFDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CFEBR, SYSZ_INS_CFEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CFI, SYSZ_INS_CFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CFXBR, SYSZ_INS_CFXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CG, SYSZ_INS_CG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGDBR, SYSZ_INS_CGDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGEBR, SYSZ_INS_CGEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGF, SYSZ_INS_CGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGFI, SYSZ_INS_CGFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGFR, SYSZ_INS_CGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGFRL, SYSZ_INS_CGFRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGH, SYSZ_INS_CGH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGHI, SYSZ_INS_CGHI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGHRL, SYSZ_INS_CGHRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGHSI, SYSZ_INS_CGHSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGIJ, SYSZ_INS_CGIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CGR, SYSZ_INS_CGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGRJ, SYSZ_INS_CGRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CGRL, SYSZ_INS_CGRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CGXBR, SYSZ_INS_CGXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CH, SYSZ_INS_CH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CHF, SYSZ_INS_CHF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_CHHSI, SYSZ_INS_CHHSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CHI, SYSZ_INS_CHI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CHRL, SYSZ_INS_CHRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CHSI, SYSZ_INS_CHSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CHY, SYSZ_INS_CHY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CIH, SYSZ_INS_CIH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_CIJ, SYSZ_INS_CIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CL, SYSZ_INS_CL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLC, SYSZ_INS_CLC, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLFDBR, SYSZ_INS_CLFDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CLFEBR, SYSZ_INS_CLFEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CLFHSI, SYSZ_INS_CLFHSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLFI, SYSZ_INS_CLFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLFXBR, SYSZ_INS_CLFXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CLG, SYSZ_INS_CLG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGDBR, SYSZ_INS_CLGDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CLGEBR, SYSZ_INS_CLGEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CLGF, SYSZ_INS_CLGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGFI, SYSZ_INS_CLGFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGFR, SYSZ_INS_CLGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGFRL, SYSZ_INS_CLGFRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGHRL, SYSZ_INS_CLGHRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGHSI, SYSZ_INS_CLGHSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGIJ, SYSZ_INS_CLGIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CLGR, SYSZ_INS_CLGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGRJ, SYSZ_INS_CLGRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CLGRL, SYSZ_INS_CLGRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLGXBR, SYSZ_INS_CLGXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CLHF, SYSZ_INS_CLHF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_CLHHSI, SYSZ_INS_CLHHSI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLHRL, SYSZ_INS_CLHRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLI, SYSZ_INS_CLI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLIH, SYSZ_INS_CLIH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_CLIJ, SYSZ_INS_CLIJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CLIY, SYSZ_INS_CLIY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLR, SYSZ_INS_CLR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLRJ, SYSZ_INS_CLRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CLRL, SYSZ_INS_CLRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLST, SYSZ_INS_CLST, #ifndef CAPSTONE_DIET { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CLY, SYSZ_INS_CLY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CPSDRdd, SYSZ_INS_CPSDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CPSDRds, SYSZ_INS_CPSDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CPSDRsd, SYSZ_INS_CPSDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CPSDRss, SYSZ_INS_CPSDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CR, SYSZ_INS_CR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CRJ, SYSZ_INS_CRJ, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0 #endif }, { SystemZ_CRL, SYSZ_INS_CRL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CS, SYSZ_INS_CS, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CSG, SYSZ_INS_CSG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CSY, SYSZ_INS_CSY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CXBR, SYSZ_INS_CXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CXFBR, SYSZ_INS_CXFBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CXGBR, SYSZ_INS_CXGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_CXLFBR, SYSZ_INS_CXLFBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CXLGBR, SYSZ_INS_CXLGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_CY, SYSZ_INS_CY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DDB, SYSZ_INS_DDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DDBR, SYSZ_INS_DDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DEB, SYSZ_INS_DEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DEBR, SYSZ_INS_DEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DL, SYSZ_INS_DL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DLG, SYSZ_INS_DLG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DLGR, SYSZ_INS_DLGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DLR, SYSZ_INS_DLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DSG, SYSZ_INS_DSG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DSGF, SYSZ_INS_DSGF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DSGFR, SYSZ_INS_DSGFR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DSGR, SYSZ_INS_DSGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_DXBR, SYSZ_INS_DXBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_EAR, SYSZ_INS_EAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_FIDBR, SYSZ_INS_FIDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_FIDBRA, SYSZ_INS_FIDBRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_FIEBR, SYSZ_INS_FIEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_FIEBRA, SYSZ_INS_FIEBRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_FIXBR, SYSZ_INS_FIXBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_FIXBRA, SYSZ_INS_FIXBRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_FLOGR, SYSZ_INS_FLOGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IC, SYSZ_INS_IC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IC32, SYSZ_INS_IC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IC32Y, SYSZ_INS_ICY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ICY, SYSZ_INS_ICY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IIHF, SYSZ_INS_IIHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IIHH, SYSZ_INS_IIHH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IIHL, SYSZ_INS_IIHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IILF, SYSZ_INS_IILF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IILH, SYSZ_INS_IILH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IILL, SYSZ_INS_IILL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_IPM, SYSZ_INS_IPM, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_J, SYSZ_INS_J, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_JG, SYSZ_INS_JG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { SystemZ_L, SYSZ_INS_L, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LA, SYSZ_INS_LA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LAA, SYSZ_INS_LAA, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAAG, SYSZ_INS_LAAG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAAL, SYSZ_INS_LAAL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAALG, SYSZ_INS_LAALG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAN, SYSZ_INS_LAN, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LANG, SYSZ_INS_LANG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAO, SYSZ_INS_LAO, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAOG, SYSZ_INS_LAOG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LARL, SYSZ_INS_LARL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LAX, SYSZ_INS_LAX, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAXG, SYSZ_INS_LAXG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0 #endif }, { SystemZ_LAY, SYSZ_INS_LAY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LB, SYSZ_INS_LB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LBH, SYSZ_INS_LBH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_LBR, SYSZ_INS_LBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LCDBR, SYSZ_INS_LCDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LCEBR, SYSZ_INS_LCEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LCGFR, SYSZ_INS_LCGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LCGR, SYSZ_INS_LCGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LCR, SYSZ_INS_LCR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LCXBR, SYSZ_INS_LCXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LD, SYSZ_INS_LD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LDEB, SYSZ_INS_LDEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LDEBR, SYSZ_INS_LDEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LDGR, SYSZ_INS_LDGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LDR, SYSZ_INS_LDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LDXBR, SYSZ_INS_LDXBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LDXBRA, SYSZ_INS_LDXBRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_LDY, SYSZ_INS_LDY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LE, SYSZ_INS_LE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LEDBR, SYSZ_INS_LEDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LEDBRA, SYSZ_INS_LEDBRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_LER, SYSZ_INS_LER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LEXBR, SYSZ_INS_LEXBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LEXBRA, SYSZ_INS_LEXBRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0 #endif }, { SystemZ_LEY, SYSZ_INS_LEY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LFH, SYSZ_INS_LFH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_LG, SYSZ_INS_LG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGB, SYSZ_INS_LGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGBR, SYSZ_INS_LGBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGDR, SYSZ_INS_LGDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGF, SYSZ_INS_LGF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGFI, SYSZ_INS_LGFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGFR, SYSZ_INS_LGFR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGFRL, SYSZ_INS_LGFRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGH, SYSZ_INS_LGH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGHI, SYSZ_INS_LGHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGHR, SYSZ_INS_LGHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGHRL, SYSZ_INS_LGHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGR, SYSZ_INS_LGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LGRL, SYSZ_INS_LGRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LH, SYSZ_INS_LH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LHH, SYSZ_INS_LHH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_LHI, SYSZ_INS_LHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LHR, SYSZ_INS_LHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LHRL, SYSZ_INS_LHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LHY, SYSZ_INS_LHY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLC, SYSZ_INS_LLC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLCH, SYSZ_INS_LLCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_LLCR, SYSZ_INS_LLCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGC, SYSZ_INS_LLGC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGCR, SYSZ_INS_LLGCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGF, SYSZ_INS_LLGF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGFR, SYSZ_INS_LLGFR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGFRL, SYSZ_INS_LLGFRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGH, SYSZ_INS_LLGH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGHR, SYSZ_INS_LLGHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLGHRL, SYSZ_INS_LLGHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLH, SYSZ_INS_LLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLHH, SYSZ_INS_LLHH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_LLHR, SYSZ_INS_LLHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLHRL, SYSZ_INS_LLHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLIHF, SYSZ_INS_LLIHF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLIHH, SYSZ_INS_LLIHH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLIHL, SYSZ_INS_LLIHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLILF, SYSZ_INS_LLILF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLILH, SYSZ_INS_LLILH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LLILL, SYSZ_INS_LLILL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LMG, SYSZ_INS_LMG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LNDBR, SYSZ_INS_LNDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LNEBR, SYSZ_INS_LNEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LNGFR, SYSZ_INS_LNGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LNGR, SYSZ_INS_LNGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LNR, SYSZ_INS_LNR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LNXBR, SYSZ_INS_LNXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LOC, SYSZ_INS_LOC, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_LOCG, SYSZ_INS_LOCG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_LOCGR, SYSZ_INS_LOCGR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_LOCR, SYSZ_INS_LOCR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_LPDBR, SYSZ_INS_LPDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LPEBR, SYSZ_INS_LPEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LPGFR, SYSZ_INS_LPGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LPGR, SYSZ_INS_LPGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LPR, SYSZ_INS_LPR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LPXBR, SYSZ_INS_LPXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LR, SYSZ_INS_LR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LRL, SYSZ_INS_LRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LRV, SYSZ_INS_LRV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LRVG, SYSZ_INS_LRVG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LRVGR, SYSZ_INS_LRVGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LRVR, SYSZ_INS_LRVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LT, SYSZ_INS_LT, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTDBR, SYSZ_INS_LTDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTDBRCompare, SYSZ_INS_LTDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTEBR, SYSZ_INS_LTEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTEBRCompare, SYSZ_INS_LTEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTG, SYSZ_INS_LTG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTGF, SYSZ_INS_LTGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTGFR, SYSZ_INS_LTGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTGR, SYSZ_INS_LTGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTR, SYSZ_INS_LTR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTXBR, SYSZ_INS_LTXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LTXBRCompare, SYSZ_INS_LTXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LXDB, SYSZ_INS_LXDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LXDBR, SYSZ_INS_LXDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LXEB, SYSZ_INS_LXEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LXEBR, SYSZ_INS_LXEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LXR, SYSZ_INS_LXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LY, SYSZ_INS_LY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LZDR, SYSZ_INS_LZDR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LZER, SYSZ_INS_LZER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_LZXR, SYSZ_INS_LZXR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MADB, SYSZ_INS_MADB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MADBR, SYSZ_INS_MADBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MAEB, SYSZ_INS_MAEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MAEBR, SYSZ_INS_MAEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MDB, SYSZ_INS_MDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MDBR, SYSZ_INS_MDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MDEB, SYSZ_INS_MDEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MDEBR, SYSZ_INS_MDEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MEEB, SYSZ_INS_MEEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MEEBR, SYSZ_INS_MEEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MGHI, SYSZ_INS_MGHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MH, SYSZ_INS_MH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MHI, SYSZ_INS_MHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MHY, SYSZ_INS_MHY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MLG, SYSZ_INS_MLG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MLGR, SYSZ_INS_MLGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MS, SYSZ_INS_MS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSDB, SYSZ_INS_MSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSDBR, SYSZ_INS_MSDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSEB, SYSZ_INS_MSEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSEBR, SYSZ_INS_MSEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSFI, SYSZ_INS_MSFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSG, SYSZ_INS_MSG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSGF, SYSZ_INS_MSGF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSGFI, SYSZ_INS_MSGFI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSGFR, SYSZ_INS_MSGFR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSGR, SYSZ_INS_MSGR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSR, SYSZ_INS_MSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MSY, SYSZ_INS_MSY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVC, SYSZ_INS_MVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVGHI, SYSZ_INS_MVGHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVHHI, SYSZ_INS_MVHHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVHI, SYSZ_INS_MVHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVI, SYSZ_INS_MVI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVIY, SYSZ_INS_MVIY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MVST, SYSZ_INS_MVST, #ifndef CAPSTONE_DIET { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MXBR, SYSZ_INS_MXBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MXDB, SYSZ_INS_MXDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_MXDBR, SYSZ_INS_MXDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_N, SYSZ_INS_N, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NC, SYSZ_INS_NC, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NG, SYSZ_INS_NG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NGR, SYSZ_INS_NGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NGRK, SYSZ_INS_NGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_NI, SYSZ_INS_NI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NIHF, SYSZ_INS_NIHF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NIHH, SYSZ_INS_NIHH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NIHL, SYSZ_INS_NIHL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NILF, SYSZ_INS_NILF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NILH, SYSZ_INS_NILH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NILL, SYSZ_INS_NILL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NIY, SYSZ_INS_NIY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NR, SYSZ_INS_NR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_NRK, SYSZ_INS_NRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_NY, SYSZ_INS_NY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_O, SYSZ_INS_O, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OC, SYSZ_INS_OC, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OG, SYSZ_INS_OG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OGR, SYSZ_INS_OGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OGRK, SYSZ_INS_OGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_OI, SYSZ_INS_OI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OIHF, SYSZ_INS_OIHF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OIHH, SYSZ_INS_OIHH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OIHL, SYSZ_INS_OIHL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OILF, SYSZ_INS_OILF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OILH, SYSZ_INS_OILH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OILL, SYSZ_INS_OILL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OIY, SYSZ_INS_OIY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_OR, SYSZ_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ORK, SYSZ_INS_ORK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_OY, SYSZ_INS_OY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_PFD, SYSZ_INS_PFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_PFDRL, SYSZ_INS_PFDRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_RISBG, SYSZ_INS_RISBG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_RISBG32, SYSZ_INS_RISBG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_RISBHG, SYSZ_INS_RISBHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_RISBLG, SYSZ_INS_RISBLG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_RLL, SYSZ_INS_RLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_RLLG, SYSZ_INS_RLLG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_RNSBG, SYSZ_INS_RNSBG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ROSBG, SYSZ_INS_ROSBG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_RXSBG, SYSZ_INS_RXSBG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_S, SYSZ_INS_S, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SDB, SYSZ_INS_SDB, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SDBR, SYSZ_INS_SDBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SEB, SYSZ_INS_SEB, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SEBR, SYSZ_INS_SEBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SG, SYSZ_INS_SG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SGF, SYSZ_INS_SGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SGFR, SYSZ_INS_SGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SGR, SYSZ_INS_SGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SGRK, SYSZ_INS_SGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SH, SYSZ_INS_SH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SHY, SYSZ_INS_SHY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SL, SYSZ_INS_SL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLB, SYSZ_INS_SLB, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLBG, SYSZ_INS_SLBG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLBR, SYSZ_INS_SLBR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLFI, SYSZ_INS_SLFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLG, SYSZ_INS_SLG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLGBR, SYSZ_INS_SLBGR, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLGF, SYSZ_INS_SLGF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLGFI, SYSZ_INS_SLGFI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLGFR, SYSZ_INS_SLGFR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLGR, SYSZ_INS_SLGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLGRK, SYSZ_INS_SLGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SLL, SYSZ_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLLG, SYSZ_INS_SLLG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLLK, SYSZ_INS_SLLK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SLR, SYSZ_INS_SLR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SLRK, SYSZ_INS_SLRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SLY, SYSZ_INS_SLY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SQDB, SYSZ_INS_SQDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SQDBR, SYSZ_INS_SQDBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SQEB, SYSZ_INS_SQEB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SQEBR, SYSZ_INS_SQEBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SQXBR, SYSZ_INS_SQXBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SR, SYSZ_INS_SR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SRA, SYSZ_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SRAG, SYSZ_INS_SRAG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SRAK, SYSZ_INS_SRAK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SRK, SYSZ_INS_SRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SRL, SYSZ_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SRLG, SYSZ_INS_SRLG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SRLK, SYSZ_INS_SRLK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_SRST, SYSZ_INS_SRST, #ifndef CAPSTONE_DIET { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_ST, SYSZ_INS_ST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STC, SYSZ_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STCH, SYSZ_INS_STCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_STCY, SYSZ_INS_STCY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STD, SYSZ_INS_STD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STDY, SYSZ_INS_STDY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STE, SYSZ_INS_STE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STEY, SYSZ_INS_STEY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STFH, SYSZ_INS_STFH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_STG, SYSZ_INS_STG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STGRL, SYSZ_INS_STGRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STH, SYSZ_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STHH, SYSZ_INS_STHH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0 #endif }, { SystemZ_STHRL, SYSZ_INS_STHRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STHY, SYSZ_INS_STHY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STMG, SYSZ_INS_STMG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STOC, SYSZ_INS_STOC, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_STOCG, SYSZ_INS_STOCG, #ifndef CAPSTONE_DIET { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0 #endif }, { SystemZ_STRL, SYSZ_INS_STRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STRV, SYSZ_INS_STRV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STRVG, SYSZ_INS_STRVG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_STY, SYSZ_INS_STY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SXBR, SYSZ_INS_SXBR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_SY, SYSZ_INS_SY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_TM, SYSZ_INS_TM, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_TMHH, SYSZ_INS_TMHH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_TMHL, SYSZ_INS_TMHL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_TMLH, SYSZ_INS_TMLH, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_TMLL, SYSZ_INS_TMLL, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_TMY, SYSZ_INS_TMY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_X, SYSZ_INS_X, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XC, SYSZ_INS_XC, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XG, SYSZ_INS_XG, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XGR, SYSZ_INS_XGR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XGRK, SYSZ_INS_XGRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_XI, SYSZ_INS_XI, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XIHF, SYSZ_INS_XIHF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XILF, SYSZ_INS_XILF, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XIY, SYSZ_INS_XIY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XR, SYSZ_INS_XR, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, { SystemZ_XRK, SYSZ_INS_XRK, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0 #endif }, { SystemZ_XY, SYSZ_INS_XY, #ifndef CAPSTONE_DIET { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZModule.c010066400017500001750000000020211363402546700215500ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_SYSZ #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "SystemZDisassembler.h" #include "SystemZInstPrinter.h" #include "SystemZMapping.h" #include "SystemZModule.h" cs_err SystemZ_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); SystemZ_init(mri); ud->printer = SystemZ_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = SystemZ_getInstruction; ud->post_printer = SystemZ_post_printer; ud->reg_name = SystemZ_reg_name; ud->insn_id = SystemZ_get_insn_id; ud->insn_name = SystemZ_insn_name; ud->group_name = SystemZ_group_name; return CS_ERR_OK; } cs_err SystemZ_option(cs_struct *handle, cs_opt_type type, size_t value) { if (type == CS_OPT_SYNTAX) handle->syntax = (int) value; // Do not set mode because only CS_MODE_BIG_ENDIAN is valid; we cannot // test for CS_MODE_LITTLE_ENDIAN because it is 0 return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/SystemZ/SystemZModule.h010066400017500001750000000004511363402546700215620ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_SYSTEMZ_MODULE_H #define CS_SYSTEMZ_MODULE_H #include "../../utils.h" cs_err SystemZ_global_init(cs_struct *ud); cs_err SystemZ_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c010066400017500001750000000402011363402546700226000ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifdef CAPSTONE_HAS_TMS320C64X #include #include "../../cs_priv.h" #include "../../utils.h" #include "TMS320C64xDisassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" #include "../../MathExtras.h" static uint64_t getFeatureBits(int mode); static DecodeStatus DecodeGPRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder); static DecodeStatus DecodeControlRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder); static DecodeStatus DecodeScst5(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeScst16(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodePCRelScst7(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodePCRelScst10(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodePCRelScst12(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodePCRelScst21(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeMemOperand(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeMemOperandSc(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeMemOperand2(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeRegPair5(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder); static DecodeStatus DecodeRegPair4(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder); static DecodeStatus DecodeCondRegister(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeCondRegisterZero(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeSide(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeParallel(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeCrosspathX1(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeCrosspathX2(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeCrosspathX3(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); static DecodeStatus DecodeNop(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder); #include "TMS320C64xGenDisassemblerTables.inc" #define GET_REGINFO_ENUM #define GET_REGINFO_MC_DESC #include "TMS320C64xGenRegisterInfo.inc" static const unsigned GPRegsDecoderTable[] = { TMS320C64x_A0, TMS320C64x_A1, TMS320C64x_A2, TMS320C64x_A3, TMS320C64x_A4, TMS320C64x_A5, TMS320C64x_A6, TMS320C64x_A7, TMS320C64x_A8, TMS320C64x_A9, TMS320C64x_A10, TMS320C64x_A11, TMS320C64x_A12, TMS320C64x_A13, TMS320C64x_A14, TMS320C64x_A15, TMS320C64x_A16, TMS320C64x_A17, TMS320C64x_A18, TMS320C64x_A19, TMS320C64x_A20, TMS320C64x_A21, TMS320C64x_A22, TMS320C64x_A23, TMS320C64x_A24, TMS320C64x_A25, TMS320C64x_A26, TMS320C64x_A27, TMS320C64x_A28, TMS320C64x_A29, TMS320C64x_A30, TMS320C64x_A31 }; static const unsigned ControlRegsDecoderTable[] = { TMS320C64x_AMR, TMS320C64x_CSR, TMS320C64x_ISR, TMS320C64x_ICR, TMS320C64x_IER, TMS320C64x_ISTP, TMS320C64x_IRP, TMS320C64x_NRP, ~0U, ~0U, TMS320C64x_TSCL, TMS320C64x_TSCH, ~0U, TMS320C64x_ILC, TMS320C64x_RILC, TMS320C64x_REP, TMS320C64x_PCE1, TMS320C64x_DNUM, ~0U, ~0U, ~0U, TMS320C64x_SSR, TMS320C64x_GPLYA, TMS320C64x_GPLYB, TMS320C64x_GFPGFR, TMS320C64x_DIER, TMS320C64x_TSR, TMS320C64x_ITSR, TMS320C64x_NTSR, TMS320C64x_ECR, ~0U, TMS320C64x_IERR }; static uint64_t getFeatureBits(int mode) { // support everything return (uint64_t)-1; } static unsigned getReg(const unsigned *RegTable, unsigned RegNo) { if(RegNo > 31) return ~0U; return RegTable[RegNo]; } static DecodeStatus DecodeGPRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder) { unsigned Reg; if(RegNo > 31) return MCDisassembler_Fail; Reg = getReg(GPRegsDecoderTable, RegNo); if(Reg == ~0U) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeControlRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder) { unsigned Reg; if(RegNo > 31) return MCDisassembler_Fail; Reg = getReg(ControlRegsDecoderTable, RegNo); if(Reg == ~0U) return MCDisassembler_Fail; MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeScst5(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { int32_t imm; imm = Val; /* Sign extend 5 bit value */ if(imm & (1 << (5 - 1))) imm |= ~((1 << 5) - 1); MCOperand_CreateImm0(Inst, imm); return MCDisassembler_Success; } static DecodeStatus DecodeScst16(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { int32_t imm; imm = Val; /* Sign extend 16 bit value */ if(imm & (1 << (16 - 1))) imm |= ~((1 << 16) - 1); MCOperand_CreateImm0(Inst, imm); return MCDisassembler_Success; } static DecodeStatus DecodePCRelScst7(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { int32_t imm; imm = Val; /* Sign extend 7 bit value */ if(imm & (1 << (7 - 1))) imm |= ~((1 << 7) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; } static DecodeStatus DecodePCRelScst10(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { int32_t imm; imm = Val; /* Sign extend 10 bit value */ if(imm & (1 << (10 - 1))) imm |= ~((1 << 10) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; } static DecodeStatus DecodePCRelScst12(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { int32_t imm; imm = Val; /* Sign extend 12 bit value */ if(imm & (1 << (12 - 1))) imm |= ~((1 << 12) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; } static DecodeStatus DecodePCRelScst21(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { int32_t imm; imm = Val; /* Sign extend 21 bit value */ if(imm & (1 << (21 - 1))) imm |= ~((1 << 21) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; } static DecodeStatus DecodeMemOperand(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { return DecodeMemOperandSc(Inst, Val | (1 << 15), Address, Decoder); } static DecodeStatus DecodeMemOperandSc(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { uint8_t scaled, base, offset, mode, unit; unsigned basereg, offsetreg; scaled = (Val >> 15) & 1; base = (Val >> 10) & 0x1f; offset = (Val >> 5) & 0x1f; mode = (Val >> 1) & 0xf; unit = Val & 1; if((base >= TMS320C64X_REG_A0) && (base <= TMS320C64X_REG_A31)) base = (base - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); else if((base >= TMS320C64X_REG_B0) && (base <= TMS320C64X_REG_B31)) base = (base - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); basereg = getReg(GPRegsDecoderTable, base); if (basereg == ~0U) return MCDisassembler_Fail; switch(mode) { case 0: case 1: case 8: case 9: case 10: case 11: MCOperand_CreateImm0(Inst, (scaled << 19) | (basereg << 12) | (offset << 5) | (mode << 1) | unit); break; case 4: case 5: case 12: case 13: case 14: case 15: if((offset >= TMS320C64X_REG_A0) && (offset <= TMS320C64X_REG_A31)) offset = (offset - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); else if((offset >= TMS320C64X_REG_B0) && (offset <= TMS320C64X_REG_B31)) offset = (offset - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); offsetreg = getReg(GPRegsDecoderTable, offset); if (offsetreg == ~0U) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, (scaled << 19) | (basereg << 12) | (offsetreg << 5) | (mode << 1) | unit); break; default: return MCDisassembler_Fail; } return MCDisassembler_Success; } static DecodeStatus DecodeMemOperand2(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { uint16_t offset; unsigned basereg; if(Val & 1) basereg = TMS320C64X_REG_B15; else basereg = TMS320C64X_REG_B14; offset = (Val >> 1) & 0x7fff; MCOperand_CreateImm0(Inst, (offset << 7) | basereg); return MCDisassembler_Success; } static DecodeStatus DecodeRegPair5(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder) { unsigned Reg; if(RegNo > 31) return MCDisassembler_Fail; Reg = getReg(GPRegsDecoderTable, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeRegPair4(MCInst *Inst, unsigned RegNo, uint64_t Address, void *Decoder) { unsigned Reg; if(RegNo > 15) return MCDisassembler_Fail; Reg = getReg(GPRegsDecoderTable, RegNo << 1); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeCondRegister(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: case 7: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_INVALID; break; case 1: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_B0; break; case 2: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_B1; break; case 3: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_B2; break; case 4: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_A1; break; case 5: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_A2; break; case 6: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_A0; break; default: Inst->flat_insn->detail->tms320c64x.condition.reg = TMS320C64X_REG_INVALID; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeCondRegisterZero(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: Inst->flat_insn->detail->tms320c64x.condition.zero = 0; break; case 1: Inst->flat_insn->detail->tms320c64x.condition.zero = 1; break; default: Inst->flat_insn->detail->tms320c64x.condition.zero = 0; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeSide(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; MCOperand *op; int i; /* This is pretty messy, probably we should find a better way */ if(Val == 1) { for(i = 0; i < Inst->size; i++) { op = &Inst->Operands[i]; if(op->Kind == kRegister) { if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); else if((op->RegVal >= TMS320C64X_REG_B0) && (op->RegVal <= TMS320C64X_REG_B31)) op->RegVal = (op->RegVal - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); } } } if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: Inst->flat_insn->detail->tms320c64x.funit.side = 1; break; case 1: Inst->flat_insn->detail->tms320c64x.funit.side = 2; break; default: Inst->flat_insn->detail->tms320c64x.funit.side = 0; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeParallel(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: Inst->flat_insn->detail->tms320c64x.parallel = 0; break; case 1: Inst->flat_insn->detail->tms320c64x.parallel = 1; break; default: Inst->flat_insn->detail->tms320c64x.parallel = -1; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeCrosspathX1(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; MCOperand *op; if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: Inst->flat_insn->detail->tms320c64x.funit.crosspath = 0; break; case 1: Inst->flat_insn->detail->tms320c64x.funit.crosspath = 1; op = &Inst->Operands[0]; if(op->Kind == kRegister) { if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); else if((op->RegVal >= TMS320C64X_REG_B0) && (op->RegVal <= TMS320C64X_REG_B31)) op->RegVal = (op->RegVal - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); } break; default: Inst->flat_insn->detail->tms320c64x.funit.crosspath = -1; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeCrosspathX2(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; MCOperand *op; if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: Inst->flat_insn->detail->tms320c64x.funit.crosspath = 0; break; case 1: Inst->flat_insn->detail->tms320c64x.funit.crosspath = 1; op = &Inst->Operands[1]; if(op->Kind == kRegister) { if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); else if((op->RegVal >= TMS320C64X_REG_B0) && (op->RegVal <= TMS320C64X_REG_B31)) op->RegVal = (op->RegVal - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); } break; default: Inst->flat_insn->detail->tms320c64x.funit.crosspath = -1; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeCrosspathX3(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { DecodeStatus ret = MCDisassembler_Success; MCOperand *op; if(!Inst->flat_insn->detail) return MCDisassembler_Success; switch(Val) { case 0: Inst->flat_insn->detail->tms320c64x.funit.crosspath = 0; break; case 1: Inst->flat_insn->detail->tms320c64x.funit.crosspath = 2; op = &Inst->Operands[2]; if(op->Kind == kRegister) { if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); else if((op->RegVal >= TMS320C64X_REG_B0) && (op->RegVal <= TMS320C64X_REG_B31)) op->RegVal = (op->RegVal - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); } break; default: Inst->flat_insn->detail->tms320c64x.funit.crosspath = -1; ret = MCDisassembler_Fail; break; } return ret; } static DecodeStatus DecodeNop(MCInst *Inst, unsigned Val, uint64_t Address, void *Decoder) { MCOperand_CreateImm0(Inst, Val + 1); return MCDisassembler_Success; } #define GET_INSTRINFO_ENUM #include "TMS320C64xGenInstrInfo.inc" bool TMS320C64x_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *MI, uint16_t *size, uint64_t address, void *info) { uint32_t insn; DecodeStatus result; if(code_len < 4) { *size = 0; return MCDisassembler_Fail; } if(MI->flat_insn->detail) memset(MI->flat_insn->detail, 0, offsetof(cs_detail, tms320c64x)+sizeof(cs_tms320c64x)); insn = (code[3] << 0) | (code[2] << 8) | (code[1] << 16) | ((uint32_t) code[0] << 24); result = decodeInstruction_4(DecoderTable32, MI, insn, address, info, 0); if(result == MCDisassembler_Success) { *size = 4; return true; } MCInst_clear(MI); *size = 0; return false; } void TMS320C64x_init(MCRegisterInfo *MRI) { MCRegisterInfo_InitMCRegisterInfo(MRI, TMS320C64xRegDesc, 90, 0, 0, TMS320C64xMCRegisterClasses, 7, 0, 0, TMS320C64xRegDiffLists, 0, TMS320C64xSubRegIdxLists, 1, 0); } #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h010066400017500001750000000007351363402546700226150ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifndef CS_TMS320C64XDISASSEMBLER_H #define CS_TMS320C64XDISASSEMBLER_H #include #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" void TMS320C64x_init(MCRegisterInfo *MRI); bool TMS320C64x_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc010066400017500001750000000513261363402546700230730ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #include /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 882U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 875U, // BUNDLE 904U, // LIFETIME_START 862U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 1126U, // ABS2_l2_rr 10847U, // ABS_l1_pp 1631U, // ABS_l1_rr 85006U, // ADD2_d2_rrr 85006U, // ADD2_l1_rrr_x2 85006U, // ADD2_s1_rrr 85171U, // ADD4_l1_rrr_x2 91479U, // ADDAB_d1_rir 91479U, // ADDAB_d1_rrr 91541U, // ADDAD_d1_rir 91541U, // ADDAD_d1_rrr 91577U, // ADDAH_d1_rir 91577U, // ADDAH_d1_rrr 91937U, // ADDAW_d1_rir 91937U, // ADDAW_d1_rrr 132488U, // ADDKPC_s3_iir 1518U, // ADDK_s2_ir 233140U, // ADDU_l1_rpp 216756U, // ADDU_l1_rrp_x2 91555U, // ADD_d1_rir 91555U, // ADD_d1_rrr 91555U, // ADD_d2_rir 85411U, // ADD_d2_rrr 232867U, // ADD_l1_ipp 85411U, // ADD_l1_irr 232867U, // ADD_l1_rpp 216483U, // ADD_l1_rrp_x2 85411U, // ADD_l1_rrr_x2 85411U, // ADD_s1_irr 85411U, // ADD_s1_rrr 85542U, // ANDN_d2_rrr 85542U, // ANDN_l1_rrr_x2 85542U, // ANDN_s4_rrr 85416U, // AND_d2_rir 85416U, // AND_d2_rrr 85416U, // AND_l1_irr 85416U, // AND_l1_rrr_x2 85416U, // AND_s1_irr 85416U, // AND_s1_rrr 85019U, // AVG2_m1_rrr 85232U, // AVGU4_m1_rrr 1410U, // BDEC_s8_ir 1196U, // BITC4_m2_rr 307756U, // BNOP_s10_ri 307756U, // BNOP_s9_ii 1654U, // BPOS_s8_ir 53588U, // B_s5_i 53588U, // B_s6_r 892U, // B_s7_irp 898U, // B_s7_nrp 353870U, // CLR_s15_riir 91726U, // CLR_s1_rrr 85080U, // CMPEQ2_s1_rrr 85207U, // CMPEQ4_s1_rrr 101938U, // CMPEQ_l1_ipr 85554U, // CMPEQ_l1_irr 101938U, // CMPEQ_l1_rpr 85554U, // CMPEQ_l1_rrr_x2 85109U, // CMPGT2_s1_rrr 85298U, // CMPGTU4_s1_rrr 102037U, // CMPGT_l1_ipr 85653U, // CMPGT_l1_irr 102037U, // CMPGT_l1_rpr 85653U, // CMPGT_l1_rrr_x2 102150U, // CMPLTU_l1_ipr 85766U, // CMPLTU_l1_irr 102150U, // CMPLTU_l1_rpr 85766U, // CMPLTU_l1_rrr_x2 102044U, // CMPLT_l1_ipr 85660U, // CMPLT_l1_irr 102044U, // CMPLT_l1_rpr 85660U, // CMPLT_l1_rrr_x2 1529U, // DEAL_m2_rr 216145U, // DOTP2_m1_rrp 85073U, // DOTP2_m1_rrr 85065U, // DOTPN2_m1_rrr 85124U, // DOTPNRSU2_m1_rrr 85135U, // DOTPRSU2_m1_rrr 85281U, // DOTPSU4_m1_rrr 85273U, // DOTPU4_m1_rrr 354062U, // EXTU_s15_riir 91918U, // EXTU_s1_rrr 353955U, // EXT_s15_riir 91811U, // EXT_s1_rrr 102142U, // GMPGTU_l1_ipr 85758U, // GMPGTU_l1_irr 102142U, // GMPGTU_l1_rpr 85758U, // GMPGTU_l1_rrr_x2 85321U, // GMPY4_m1_rrr 5800U, // LDBU_d5_mr 6824U, // LDBU_d6_mr 5470U, // LDB_d5_mr 6494U, // LDB_d6_mr 14120U, // LDDW_d7_mp 5818U, // LDHU_d5_mr 6842U, // LDHU_d6_mr 5568U, // LDH_d5_mr 6592U, // LDH_d6_mr 14131U, // LDNDW_d8_mp 5959U, // LDNW_d5_mr 5934U, // LDW_d5_mr 6958U, // LDW_d6_mr 85404U, // LMBD_l1_irr 85404U, // LMBD_l1_rrr_x2 85145U, // MAX2_l1_rrr_x2 85307U, // MAXU4_l1_rrr_x2 85059U, // MIN2_l1_rrr_x2 85266U, // MINU4_l1_rrr_x2 216224U, // MPY2_m1_rrp 85566U, // MPYHIR_m1_rrr 216544U, // MPYHI_m1_rrp 85720U, // MPYHLU_m4_rrr 85516U, // MPYHL_m4_rrr 85728U, // MPYHSLU_m4_rrr 85743U, // MPYHSU_m4_rrr 85613U, // MPYHULS_m4_rrr 85628U, // MPYHUS_m4_rrr 85713U, // MPYHU_m4_rrr 85466U, // MPYH_m4_rrr 85696U, // MPYLHU_m4_rrr 85453U, // MPYLH_m4_rrr 85574U, // MPYLIR_m1_rrr 216551U, // MPYLI_m1_rrp 85704U, // MPYLSHU_m4_rrr 85604U, // MPYLUHS_m4_rrr 216362U, // MPYSU4_m1_rrp 85751U, // MPYSU_m4_irr 85751U, // MPYSU_m4_rrr 216386U, // MPYU4_m1_rrp 85636U, // MPYUS_m4_rrr 85780U, // MPYU_m4_rrr 85849U, // MPY_m4_irr 85849U, // MPY_m4_rrr 1424U, // MVC_s1_rr 1424U, // MVC_s1_rr2 1453U, // MVD_m2_rr 1477U, // MVKLH_s12_ir 1524U, // MVKL_s12_ir 1524U, // MVK_d1_rr 1524U, // MVK_l2_ir 53249U, // NOP_n 2592U, // NORM_l1_pr 1568U, // NORM_l1_rr 85588U, // OR_d2_rir 85588U, // OR_d2_rrr 85588U, // OR_l1_irr 85588U, // OR_l1_rrr_x2 85588U, // OR_s1_irr 85588U, // OR_s1_rrr 85043U, // PACK2_l1_rrr_x2 85043U, // PACK2_s4_rrr 85025U, // PACKH2_l1_rrr_x2 85025U, // PACKH2_s1_rrr 85184U, // PACKH4_l1_rrr_x2 85050U, // PACKHL2_l1_rrr_x2 85050U, // PACKHL2_s1_rrr 85192U, // PACKL4_l1_rrr_x2 85033U, // PACKLH2_l1_rrr_x2 85033U, // PACKLH2_s1_rrr 91667U, // ROTL_m1_rir 91667U, // ROTL_m1_rrr 85005U, // SADD2_s4_rrr 85224U, // SADDU4_s4_rrr 85100U, // SADDUS2_s4_rrr 232866U, // SADD_l1_ipp 85410U, // SADD_l1_irr 232866U, // SADD_l1_rpp 85410U, // SADD_l1_rrr_x2 85410U, // SADD_s1_rrr 2699U, // SAT_l1_pr 353936U, // SET_s15_riir 91792U, // SET_s1_rrr 1535U, // SHFL_m2_rr 85347U, // SHLMB_l1_rrr_x2 85347U, // SHLMB_s4_rrr 223750U, // SHL_s1_pip 223750U, // SHL_s1_prp 222726U, // SHL_s1_rip 91654U, // SHL_s1_rir 222726U, // SHL_s1_rrp 91654U, // SHL_s1_rrr 91232U, // SHR2_s1_rir 91232U, // SHR2_s4_rrr 85354U, // SHRMB_l1_rrr_x2 85354U, // SHRMB_s4_rrr 91261U, // SHRU2_s1_rir 91261U, // SHRU2_s4_rrr 223977U, // SHRU_s1_pip 223977U, // SHRU_s1_prp 91881U, // SHRU_s1_rir 91881U, // SHRU_s1_rrr 223801U, // SHR_s1_pip 223801U, // SHR_s1_prp 91705U, // SHR_s1_rir 91705U, // SHR_s1_rrr 216223U, // SMPY2_m1_rrp 85515U, // SMPYHL_m4_rrr 85465U, // SMPYH_m4_rrr 85452U, // SMPYLH_m4_rrr 85848U, // SMPY_m4_rrr 85042U, // SPACK2_s4_rrr 85248U, // SPACKU4_s4_rrr 91653U, // SSHL_s1_rir 91653U, // SSHL_s1_rrr 85529U, // SSHVL_m1_rrr 85592U, // SSHVR_m1_rrr 232822U, // SSUB_l1_ipp 85366U, // SSUB_l1_irr 85366U, // SSUB_l1_rrr_x1 85366U, // SSUB_l1_rrr_x2 438641U, // STB_d5_rm 504177U, // STB_d6_rm 8001U, // STDW_d7_pm 438740U, // STH_d5_rm 504276U, // STH_d6_rm 7994U, // STNDW_d8_pm 439117U, // STNW_d5_rm 439123U, // STW_d5_rm 504659U, // STW_d6_rm 84999U, // SUB2_d2_rrr 84999U, // SUB2_l1_rrr_x2 84999U, // SUB2_s1_rrr 85158U, // SUB4_l1_rrr_x2 85215U, // SUBABS4_l1_rrr_x2 91472U, // SUBAB_d1_rir 91472U, // SUBAB_d1_rrr 91472U, // SUBAH_d1_rir 91570U, // SUBAH_d1_rrr 91472U, // SUBAW_d1_rir 91930U, // SUBAW_d1_rrr 85372U, // SUBC_l1_rrr_x2 216750U, // SUBU_l1_rrp_x1 216750U, // SUBU_l1_rrp_x2 91511U, // SUB_d1_rir 91511U, // SUB_d1_rrr 85367U, // SUB_d2_rrr 232823U, // SUB_l1_ipp 85367U, // SUB_l1_irr 216439U, // SUB_l1_rrp_x1 216439U, // SUB_l1_rrp_x2 85367U, // SUB_l1_rrr_x1 85367U, // SUB_l1_rrr_x2 85367U, // SUB_s1_irr 85367U, // SUB_s1_rrr 91511U, // SUB_s4_rrr 1232U, // SWAP4_l2_rr 1271U, // UNPKHU4_l2_rr 1271U, // UNPKHU4_s14_rr 1289U, // UNPKLU4_l2_rr 1289U, // UNPKLU4_s14_rr 85587U, // XOR_d2_rir 85587U, // XOR_d2_rrr 85587U, // XOR_l1_irr 85587U, // XOR_l1_rrr_x2 85587U, // XOR_s1_irr 85587U, // XOR_s1_rrr 1044U, // XPND2_m2_rr 1209U, // XPND4_m2_rr 0U }; static char AsmStrs[] = { /* 0 */ 'n', 'o', 'p', 9, 9, 0, /* 6 */ 's', 'u', 'b', '2', 9, 0, /* 12 */ 's', 'a', 'd', 'd', '2', 9, 0, /* 19 */ 'x', 'p', 'n', 'd', '2', 9, 0, /* 26 */ 'a', 'v', 'g', '2', 9, 0, /* 32 */ 'p', 'a', 'c', 'k', 'h', '2', 9, 0, /* 40 */ 'p', 'a', 'c', 'k', 'l', 'h', '2', 9, 0, /* 49 */ 's', 'p', 'a', 'c', 'k', '2', 9, 0, /* 57 */ 'p', 'a', 'c', 'k', 'h', 'l', '2', 9, 0, /* 66 */ 'm', 'i', 'n', '2', 9, 0, /* 72 */ 'd', 'o', 't', 'p', 'n', '2', 9, 0, /* 80 */ 'd', 'o', 't', 'p', '2', 9, 0, /* 87 */ 'c', 'm', 'p', 'e', 'q', '2', 9, 0, /* 95 */ 's', 'h', 'r', '2', 9, 0, /* 101 */ 'a', 'b', 's', '2', 9, 0, /* 107 */ 's', 'a', 'd', 'd', 'u', 's', '2', 9, 0, /* 116 */ 'c', 'm', 'p', 'g', 't', '2', 9, 0, /* 124 */ 's', 'h', 'r', 'u', '2', 9, 0, /* 131 */ 'd', 'o', 't', 'p', 'n', 'r', 's', 'u', '2', 9, 0, /* 142 */ 'd', 'o', 't', 'p', 'r', 's', 'u', '2', 9, 0, /* 152 */ 'm', 'a', 'x', '2', 9, 0, /* 158 */ 's', 'm', 'p', 'y', '2', 9, 0, /* 165 */ 's', 'u', 'b', '4', 9, 0, /* 171 */ 'b', 'i', 't', 'c', '4', 9, 0, /* 178 */ 'a', 'd', 'd', '4', 9, 0, /* 184 */ 'x', 'p', 'n', 'd', '4', 9, 0, /* 191 */ 'p', 'a', 'c', 'k', 'h', '4', 9, 0, /* 199 */ 'p', 'a', 'c', 'k', 'l', '4', 9, 0, /* 207 */ 's', 'w', 'a', 'p', '4', 9, 0, /* 214 */ 'c', 'm', 'p', 'e', 'q', '4', 9, 0, /* 222 */ 's', 'u', 'b', 'a', 'b', 's', '4', 9, 0, /* 231 */ 's', 'a', 'd', 'd', 'u', '4', 9, 0, /* 239 */ 'a', 'v', 'g', 'u', '4', 9, 0, /* 246 */ 'u', 'n', 'p', 'k', 'h', 'u', '4', 9, 0, /* 255 */ 's', 'p', 'a', 'c', 'k', 'u', '4', 9, 0, /* 264 */ 'u', 'n', 'p', 'k', 'l', 'u', '4', 9, 0, /* 273 */ 'm', 'i', 'n', 'u', '4', 9, 0, /* 280 */ 'd', 'o', 't', 'p', 'u', '4', 9, 0, /* 288 */ 'd', 'o', 't', 'p', 's', 'u', '4', 9, 0, /* 297 */ 'm', 'p', 'y', 's', 'u', '4', 9, 0, /* 305 */ 'c', 'm', 'p', 'g', 't', 'u', '4', 9, 0, /* 314 */ 'm', 'a', 'x', 'u', '4', 9, 0, /* 321 */ 'm', 'p', 'y', 'u', '4', 9, 0, /* 328 */ 'g', 'm', 'p', 'y', '4', 9, 0, /* 335 */ 's', 'u', 'b', 'a', 'b', 9, 0, /* 342 */ 'a', 'd', 'd', 'a', 'b', 9, 0, /* 349 */ 'l', 'd', 'b', 9, 0, /* 354 */ 's', 'h', 'l', 'm', 'b', 9, 0, /* 361 */ 's', 'h', 'r', 'm', 'b', 9, 0, /* 368 */ 's', 't', 'b', 9, 0, /* 373 */ 's', 's', 'u', 'b', 9, 0, /* 379 */ 's', 'u', 'b', 'c', 9, 0, /* 385 */ 'b', 'd', 'e', 'c', 9, 0, /* 391 */ 'a', 'd', 'd', 'k', 'p', 'c', 9, 0, /* 399 */ 'm', 'v', 'c', 9, 0, /* 404 */ 'a', 'd', 'd', 'a', 'd', 9, 0, /* 411 */ 'l', 'm', 'b', 'd', 9, 0, /* 417 */ 's', 'a', 'd', 'd', 9, 0, /* 423 */ 'a', 'n', 'd', 9, 0, /* 428 */ 'm', 'v', 'd', 9, 0, /* 433 */ 's', 'u', 'b', 'a', 'h', 9, 0, /* 440 */ 'a', 'd', 'd', 'a', 'h', 9, 0, /* 447 */ 'l', 'd', 'h', 9, 0, /* 452 */ 'm', 'v', 'k', 'l', 'h', 9, 0, /* 459 */ 's', 'm', 'p', 'y', 'l', 'h', 9, 0, /* 467 */ 's', 't', 'h', 9, 0, /* 472 */ 's', 'm', 'p', 'y', 'h', 9, 0, /* 479 */ 'm', 'p', 'y', 'h', 'i', 9, 0, /* 486 */ 'm', 'p', 'y', 'l', 'i', 9, 0, /* 493 */ 'a', 'd', 'd', 'k', 9, 0, /* 499 */ 'm', 'v', 'k', 9, 0, /* 504 */ 'd', 'e', 'a', 'l', 9, 0, /* 510 */ 's', 'h', 'f', 'l', 9, 0, /* 516 */ 's', 's', 'h', 'l', 9, 0, /* 522 */ 's', 'm', 'p', 'y', 'h', 'l', 9, 0, /* 530 */ 'r', 'o', 't', 'l', 9, 0, /* 536 */ 's', 's', 'h', 'v', 'l', 9, 0, /* 543 */ 'n', 'o', 'r', 'm', 9, 0, /* 549 */ 'a', 'n', 'd', 'n', 9, 0, /* 555 */ 'b', 'n', 'o', 'p', 9, 0, /* 561 */ 'c', 'm', 'p', 'e', 'q', 9, 0, /* 568 */ 's', 'h', 'r', 9, 0, /* 573 */ 'm', 'p', 'y', 'h', 'i', 'r', 9, 0, /* 581 */ 'm', 'p', 'y', 'l', 'i', 'r', 9, 0, /* 589 */ 'c', 'l', 'r', 9, 0, /* 594 */ 'x', 'o', 'r', 9, 0, /* 599 */ 's', 's', 'h', 'v', 'r', 9, 0, /* 606 */ 'a', 'b', 's', 9, 0, /* 611 */ 'm', 'p', 'y', 'l', 'u', 'h', 's', 9, 0, /* 620 */ 'm', 'p', 'y', 'h', 'u', 'l', 's', 9, 0, /* 629 */ 'b', 'p', 'o', 's', 9, 0, /* 635 */ 'm', 'p', 'y', 'h', 'u', 's', 9, 0, /* 643 */ 'm', 'p', 'y', 'u', 's', 9, 0, /* 650 */ 's', 'a', 't', 9, 0, /* 655 */ 's', 'e', 't', 9, 0, /* 660 */ 'c', 'm', 'p', 'g', 't', 9, 0, /* 667 */ 'c', 'm', 'p', 'l', 't', 9, 0, /* 674 */ 'e', 'x', 't', 9, 0, /* 679 */ 'l', 'd', 'b', 'u', 9, 0, /* 685 */ 's', 'u', 'b', 'u', 9, 0, /* 691 */ 'a', 'd', 'd', 'u', 9, 0, /* 697 */ 'l', 'd', 'h', 'u', 9, 0, /* 703 */ 'm', 'p', 'y', 'l', 'h', 'u', 9, 0, /* 711 */ 'm', 'p', 'y', 'l', 's', 'h', 'u', 9, 0, /* 720 */ 'm', 'p', 'y', 'h', 'u', 9, 0, /* 727 */ 'm', 'p', 'y', 'h', 'l', 'u', 9, 0, /* 735 */ 'm', 'p', 'y', 'h', 's', 'l', 'u', 9, 0, /* 744 */ 's', 'h', 'r', 'u', 9, 0, /* 750 */ 'm', 'p', 'y', 'h', 's', 'u', 9, 0, /* 758 */ 'm', 'p', 'y', 's', 'u', 9, 0, /* 765 */ 'c', 'm', 'p', 'g', 't', 'u', 9, 0, /* 773 */ 'c', 'm', 'p', 'l', 't', 'u', 9, 0, /* 781 */ 'e', 'x', 't', 'u', 9, 0, /* 787 */ 'm', 'p', 'y', 'u', 9, 0, /* 793 */ 's', 'u', 'b', 'a', 'w', 9, 0, /* 800 */ 'a', 'd', 'd', 'a', 'w', 9, 0, /* 807 */ 'l', 'd', 'd', 'w', 9, 0, /* 813 */ 'l', 'd', 'w', 9, 0, /* 818 */ 'l', 'd', 'n', 'd', 'w', 9, 0, /* 825 */ 's', 't', 'n', 'd', 'w', 9, 0, /* 832 */ 's', 't', 'd', 'w', 9, 0, /* 838 */ 'l', 'd', 'n', 'w', 9, 0, /* 844 */ 's', 't', 'n', 'w', 9, 0, /* 850 */ 's', 't', 'w', 9, 0, /* 855 */ 's', 'm', 'p', 'y', 9, 0, /* 861 */ 'l', 'i', 'f', 'e', 't', 'i', 'm', 'e', '_', 'e', 'n', 'd', 0, /* 874 */ 'b', 'u', 'n', 'd', 'l', 'e', 0, /* 881 */ 'd', 'b', 'g', '_', 'v', 'a', 'l', 'u', 'e', 0, /* 891 */ 'b', 9, 'i', 'r', 'p', 0, /* 897 */ 'b', 9, 'n', 'r', 'p', 0, /* 903 */ 'l', 'i', 'f', 'e', 't', 'i', 'm', 'e', '_', 's', 't', 'a', 'r', 't', 0, }; // Emit the opcode for the instruction. uint32_t Bits = OpInfo[MCInst_getOpcode(MI)]; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 1023)-1); #endif // Fragment 0 encoded into 3 bits for 8 unique commands. switch ((Bits >> 10) & 7) { default: case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, B_s7_irp, B_s7_nrp return; break; case 1: // ABS2_l2_rr, ABS_l1_rr, ADDAB_d1_rir, ADDAB_d1_rrr, ADDAD_d1_rir, ADDAD... printOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 2: // ABS_l1_pp, NORM_l1_pr, SAT_l1_pr, SHL_s1_pip, SHL_s1_prp, SHRU_s1_pip,... printRegPair(MI, 1, O); SStream_concat0(O, ", "); break; case 3: // ADD2_d2_rrr, ADD2_l1_rrr_x2, ADD2_s1_rrr, ADD4_l1_rrr_x2, ADDU_l1_rpp,... printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 4: // BNOP_s10_ri, BNOP_s9_ii, B_s5_i, B_s6_r, NOP_n, STB_d5_rm, STB_d6_rm, ... printOperand(MI, 0, O); break; case 5: // LDBU_d5_mr, LDB_d5_mr, LDDW_d7_mp, LDHU_d5_mr, LDH_d5_mr, LDNDW_d8_mp,... printMemOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 6: // LDBU_d6_mr, LDB_d6_mr, LDHU_d6_mr, LDH_d6_mr, LDW_d6_mr printMemOperand2(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 7: // STDW_d7_pm, STNDW_d8_pm printRegPair(MI, 0, O); SStream_concat0(O, ", "); printMemOperand(MI, 1, O); return; break; } // Fragment 1 encoded into 3 bits for 7 unique commands. switch ((Bits >> 13) & 7) { default: case 0: // ABS2_l2_rr, ABS_l1_rr, ADDKPC_s3_iir, ADDK_s2_ir, BDEC_s8_ir, BITC4_m2... printOperand(MI, 0, O); break; case 1: // ABS_l1_pp, LDDW_d7_mp, LDNDW_d8_mp printRegPair(MI, 0, O); return; break; case 2: // ADD2_d2_rrr, ADD2_l1_rrr_x2, ADD2_s1_rrr, ADD4_l1_rrr_x2, ADDU_l1_rrp_... printOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 3: // ADDAB_d1_rir, ADDAB_d1_rrr, ADDAD_d1_rir, ADDAD_d1_rrr, ADDAH_d1_rir, ... printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 4: // ADDU_l1_rpp, ADD_l1_ipp, ADD_l1_rpp, CMPEQ_l1_ipr, CMPEQ_l1_rpr, CMPGT... printRegPair(MI, 1, O); SStream_concat0(O, ", "); break; case 5: // BNOP_s10_ri, BNOP_s9_ii, STB_d5_rm, STB_d6_rm, STH_d5_rm, STH_d6_rm, S... SStream_concat0(O, ", "); break; case 6: // B_s5_i, B_s6_r, NOP_n return; break; } // Fragment 2 encoded into 3 bits for 8 unique commands. switch ((Bits >> 16) & 7) { default: case 0: // ABS2_l2_rr, ABS_l1_rr, ADDK_s2_ir, BDEC_s8_ir, BITC4_m2_rr, BPOS_s8_ir... return; break; case 1: // ADD2_d2_rrr, ADD2_l1_rrr_x2, ADD2_s1_rrr, ADD4_l1_rrr_x2, ADDAB_d1_rir... printOperand(MI, 0, O); return; break; case 2: // ADDKPC_s3_iir SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 3: // ADDU_l1_rpp, ADDU_l1_rrp_x2, ADD_l1_ipp, ADD_l1_rpp, ADD_l1_rrp_x2, DO... printRegPair(MI, 0, O); return; break; case 4: // BNOP_s10_ri, BNOP_s9_ii printOperand(MI, 1, O); return; break; case 5: // CLR_s15_riir, EXTU_s15_riir, EXT_s15_riir, SET_s15_riir printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 6: // STB_d5_rm, STH_d5_rm, STNW_d5_rm, STW_d5_rm printMemOperand(MI, 1, O); return; break; case 7: // STB_d6_rm, STH_d6_rm, STW_d6_rm printMemOperand2(MI, 1, O); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static char *getRegisterName(unsigned RegNo) { #ifndef CAPSTONE_DIET static char AsmStrs[] = { /* 0 */ 'a', '1', '0', 0, /* 4 */ 'b', '1', '0', 0, /* 8 */ 'a', '2', '0', 0, /* 12 */ 'b', '2', '0', 0, /* 16 */ 'a', '3', '0', 0, /* 20 */ 'b', '3', '0', 0, /* 24 */ 'a', '0', 0, /* 27 */ 'b', '0', 0, /* 30 */ 'a', '1', '1', 0, /* 34 */ 'b', '1', '1', 0, /* 38 */ 'a', '2', '1', 0, /* 42 */ 'b', '2', '1', 0, /* 46 */ 'a', '3', '1', 0, /* 50 */ 'b', '3', '1', 0, /* 54 */ 'a', '1', 0, /* 57 */ 'b', '1', 0, /* 60 */ 'p', 'c', 'e', '1', 0, /* 65 */ 'a', '1', '2', 0, /* 69 */ 'b', '1', '2', 0, /* 73 */ 'a', '2', '2', 0, /* 77 */ 'b', '2', '2', 0, /* 81 */ 'a', '2', 0, /* 84 */ 'b', '2', 0, /* 87 */ 'a', '1', '3', 0, /* 91 */ 'b', '1', '3', 0, /* 95 */ 'a', '2', '3', 0, /* 99 */ 'b', '2', '3', 0, /* 103 */ 'a', '3', 0, /* 106 */ 'b', '3', 0, /* 109 */ 'a', '1', '4', 0, /* 113 */ 'b', '1', '4', 0, /* 117 */ 'a', '2', '4', 0, /* 121 */ 'b', '2', '4', 0, /* 125 */ 'a', '4', 0, /* 128 */ 'b', '4', 0, /* 131 */ 'a', '1', '5', 0, /* 135 */ 'b', '1', '5', 0, /* 139 */ 'a', '2', '5', 0, /* 143 */ 'b', '2', '5', 0, /* 147 */ 'a', '5', 0, /* 150 */ 'b', '5', 0, /* 153 */ 'a', '1', '6', 0, /* 157 */ 'b', '1', '6', 0, /* 161 */ 'a', '2', '6', 0, /* 165 */ 'b', '2', '6', 0, /* 169 */ 'a', '6', 0, /* 172 */ 'b', '6', 0, /* 175 */ 'a', '1', '7', 0, /* 179 */ 'b', '1', '7', 0, /* 183 */ 'a', '2', '7', 0, /* 187 */ 'b', '2', '7', 0, /* 191 */ 'a', '7', 0, /* 194 */ 'b', '7', 0, /* 197 */ 'a', '1', '8', 0, /* 201 */ 'b', '1', '8', 0, /* 205 */ 'a', '2', '8', 0, /* 209 */ 'b', '2', '8', 0, /* 213 */ 'a', '8', 0, /* 216 */ 'b', '8', 0, /* 219 */ 'a', '1', '9', 0, /* 223 */ 'b', '1', '9', 0, /* 227 */ 'a', '2', '9', 0, /* 231 */ 'b', '2', '9', 0, /* 235 */ 'a', '9', 0, /* 238 */ 'b', '9', 0, /* 241 */ 'g', 'p', 'l', 'y', 'a', 0, /* 247 */ 'g', 'p', 'l', 'y', 'b', 0, /* 253 */ 'r', 'i', 'l', 'c', 0, /* 258 */ 't', 's', 'c', 'h', 0, /* 263 */ 't', 's', 'c', 'l', 0, /* 268 */ 'd', 'n', 'u', 'm', 0, /* 273 */ 'r', 'e', 'p', 0, /* 277 */ 'i', 'r', 'p', 0, /* 281 */ 'n', 'r', 'p', 0, /* 285 */ 'i', 's', 't', 'p', 0, /* 290 */ 'e', 'c', 'r', 0, /* 294 */ 'i', 'c', 'r', 0, /* 298 */ 'd', 'i', 'e', 'r', 0, /* 303 */ 'g', 'f', 'p', 'g', 'f', 'r', 0, /* 310 */ 'a', 'm', 'r', 0, /* 314 */ 'i', 'e', 'r', 'r', 0, /* 319 */ 'c', 's', 'r', 0, /* 323 */ 'i', 's', 'r', 0, /* 327 */ 's', 's', 'r', 0, /* 331 */ 'i', 't', 's', 'r', 0, /* 336 */ 'n', 't', 's', 'r', 0, }; static const uint16_t RegAsmOffset[] = { 310, 319, 298, 268, 290, 303, 241, 247, 294, 299, 314, 254, 277, 323, 285, 331, 281, 336, 273, 253, 327, 258, 263, 332, 24, 54, 81, 103, 125, 147, 169, 191, 213, 235, 0, 30, 65, 87, 109, 131, 153, 175, 197, 219, 8, 38, 73, 95, 117, 139, 161, 183, 205, 227, 16, 46, 27, 57, 84, 106, 128, 150, 172, 194, 216, 238, 4, 34, 69, 91, 113, 135, 157, 179, 201, 223, 12, 42, 77, 99, 121, 143, 165, 187, 209, 231, 20, 50, 60, }; return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc010066400017500001750000002365121363402546700247300ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * TMS320C64x Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, \ unsigned numBits) { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static uint8_t DecoderTable32[] = { /* 0 */ MCD_OPC_ExtractField, 2, 5, // Inst{6-2} ... /* 3 */ MCD_OPC_FilterValue, 0, 199, 0, // Skip to: 206 /* 7 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 10 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 30 /* 14 */ MCD_OPC_CheckField, 17, 11, 0, 153, 8, // Skip to: 2221 /* 20 */ MCD_OPC_CheckField, 12, 1, 0, 147, 8, // Skip to: 2221 /* 26 */ MCD_OPC_Decode, 162, 1, 0, // Opcode: NOP_n /* 30 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 38 /* 34 */ MCD_OPC_Decode, 140, 1, 1, // Opcode: MPYH_m4_rrr /* 38 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 46 /* 42 */ MCD_OPC_Decode, 219, 1, 1, // Opcode: SMPYH_m4_rrr /* 46 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 54 /* 50 */ MCD_OPC_Decode, 136, 1, 1, // Opcode: MPYHSU_m4_rrr /* 54 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 62 /* 58 */ MCD_OPC_Decode, 138, 1, 1, // Opcode: MPYHUS_m4_rrr /* 62 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 70 /* 66 */ MCD_OPC_Decode, 139, 1, 1, // Opcode: MPYHU_m4_rrr /* 70 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 78 /* 74 */ MCD_OPC_Decode, 134, 1, 1, // Opcode: MPYHL_m4_rrr /* 78 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 86 /* 82 */ MCD_OPC_Decode, 218, 1, 1, // Opcode: SMPYHL_m4_rrr /* 86 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 94 /* 90 */ MCD_OPC_Decode, 135, 1, 1, // Opcode: MPYHSLU_m4_rrr /* 94 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 102 /* 98 */ MCD_OPC_Decode, 137, 1, 1, // Opcode: MPYHULS_m4_rrr /* 102 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 110 /* 106 */ MCD_OPC_Decode, 133, 1, 1, // Opcode: MPYHLU_m4_rrr /* 110 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 118 /* 114 */ MCD_OPC_Decode, 142, 1, 1, // Opcode: MPYLH_m4_rrr /* 118 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 126 /* 122 */ MCD_OPC_Decode, 220, 1, 1, // Opcode: SMPYLH_m4_rrr /* 126 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 134 /* 130 */ MCD_OPC_Decode, 145, 1, 1, // Opcode: MPYLSHU_m4_rrr /* 134 */ MCD_OPC_FilterValue, 21, 4, 0, // Skip to: 142 /* 138 */ MCD_OPC_Decode, 146, 1, 1, // Opcode: MPYLUHS_m4_rrr /* 142 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 150 /* 146 */ MCD_OPC_Decode, 141, 1, 1, // Opcode: MPYLHU_m4_rrr /* 150 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 158 /* 154 */ MCD_OPC_Decode, 153, 1, 2, // Opcode: MPY_m4_irr /* 158 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 166 /* 162 */ MCD_OPC_Decode, 154, 1, 1, // Opcode: MPY_m4_rrr /* 166 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 174 /* 170 */ MCD_OPC_Decode, 221, 1, 1, // Opcode: SMPY_m4_rrr /* 174 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 182 /* 178 */ MCD_OPC_Decode, 149, 1, 1, // Opcode: MPYSU_m4_rrr /* 182 */ MCD_OPC_FilterValue, 29, 4, 0, // Skip to: 190 /* 186 */ MCD_OPC_Decode, 151, 1, 1, // Opcode: MPYUS_m4_rrr /* 190 */ MCD_OPC_FilterValue, 30, 4, 0, // Skip to: 198 /* 194 */ MCD_OPC_Decode, 148, 1, 2, // Opcode: MPYSU_m4_irr /* 198 */ MCD_OPC_FilterValue, 31, 227, 7, // Skip to: 2221 /* 202 */ MCD_OPC_Decode, 152, 1, 1, // Opcode: MPYU_m4_rrr /* 206 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 219 /* 210 */ MCD_OPC_CheckField, 8, 1, 0, 213, 7, // Skip to: 2221 /* 216 */ MCD_OPC_Decode, 116, 3, // Opcode: LDHU_d5_mr /* 219 */ MCD_OPC_FilterValue, 2, 18, 0, // Skip to: 241 /* 223 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 226 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 233 /* 230 */ MCD_OPC_Decode, 102, 4, // Opcode: EXTU_s15_riir /* 233 */ MCD_OPC_FilterValue, 1, 192, 7, // Skip to: 2221 /* 237 */ MCD_OPC_Decode, 192, 1, 4, // Opcode: SET_s15_riir /* 241 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 248 /* 245 */ MCD_OPC_Decode, 117, 5, // Opcode: LDHU_d6_mr /* 248 */ MCD_OPC_FilterValue, 4, 3, 0, // Skip to: 255 /* 252 */ MCD_OPC_Decode, 68, 6, // Opcode: B_s5_i /* 255 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 268 /* 259 */ MCD_OPC_CheckField, 8, 1, 0, 164, 7, // Skip to: 2221 /* 265 */ MCD_OPC_Decode, 111, 3, // Opcode: LDBU_d5_mr /* 268 */ MCD_OPC_FilterValue, 6, 157, 0, // Skip to: 429 /* 272 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 275 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 283 /* 279 */ MCD_OPC_Decode, 171, 1, 1, // Opcode: PACK2_l1_rrr_x2 /* 283 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 291 /* 287 */ MCD_OPC_Decode, 242, 1, 1, // Opcode: SUB2_l1_rrr_x2 /* 291 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 299 /* 295 */ MCD_OPC_Decode, 176, 1, 1, // Opcode: PACKHL2_l1_rrr_x2 /* 299 */ MCD_OPC_FilterValue, 8, 3, 0, // Skip to: 306 /* 303 */ MCD_OPC_Decode, 45, 7, // Opcode: ADD_l1_ipp /* 306 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 314 /* 310 */ MCD_OPC_Decode, 130, 2, 7, // Opcode: SUB_l1_ipp /* 314 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 322 /* 318 */ MCD_OPC_Decode, 228, 1, 7, // Opcode: SSUB_l1_ipp /* 322 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 330 /* 326 */ MCD_OPC_Decode, 186, 1, 7, // Opcode: SADD_l1_ipp /* 330 */ MCD_OPC_FilterValue, 14, 9, 0, // Skip to: 343 /* 334 */ MCD_OPC_CheckField, 13, 5, 0, 89, 7, // Skip to: 2221 /* 340 */ MCD_OPC_Decode, 23, 8, // Opcode: ABS_l1_pp /* 343 */ MCD_OPC_FilterValue, 16, 10, 0, // Skip to: 357 /* 347 */ MCD_OPC_CheckField, 13, 5, 0, 76, 7, // Skip to: 2221 /* 353 */ MCD_OPC_Decode, 191, 1, 9, // Opcode: SAT_l1_pr /* 357 */ MCD_OPC_FilterValue, 17, 3, 0, // Skip to: 364 /* 361 */ MCD_OPC_Decode, 82, 10, // Opcode: CMPGT_l1_ipr /* 364 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 372 /* 368 */ MCD_OPC_Decode, 129, 1, 1, // Opcode: MINU4_l1_rrr_x2 /* 372 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 379 /* 376 */ MCD_OPC_Decode, 106, 11, // Opcode: GMPGTU_l1_ipr /* 379 */ MCD_OPC_FilterValue, 20, 3, 0, // Skip to: 386 /* 383 */ MCD_OPC_Decode, 76, 10, // Opcode: CMPEQ_l1_ipr /* 386 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 393 /* 390 */ MCD_OPC_Decode, 90, 10, // Opcode: CMPLT_l1_ipr /* 393 */ MCD_OPC_FilterValue, 23, 3, 0, // Skip to: 400 /* 397 */ MCD_OPC_Decode, 86, 11, // Opcode: CMPLTU_l1_ipr /* 400 */ MCD_OPC_FilterValue, 24, 10, 0, // Skip to: 414 /* 404 */ MCD_OPC_CheckField, 13, 5, 0, 19, 7, // Skip to: 2221 /* 410 */ MCD_OPC_Decode, 163, 1, 12, // Opcode: NORM_l1_pr /* 414 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 422 /* 418 */ MCD_OPC_Decode, 178, 1, 1, // Opcode: PACKL4_l1_rrr_x2 /* 422 */ MCD_OPC_FilterValue, 31, 3, 7, // Skip to: 2221 /* 426 */ MCD_OPC_Decode, 53, 1, // Opcode: ANDN_l1_rrr_x2 /* 429 */ MCD_OPC_FilterValue, 7, 3, 0, // Skip to: 436 /* 433 */ MCD_OPC_Decode, 112, 5, // Opcode: LDBU_d6_mr /* 436 */ MCD_OPC_FilterValue, 8, 222, 0, // Skip to: 662 /* 440 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 443 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 464 /* 447 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ... /* 450 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 457 /* 454 */ MCD_OPC_Decode, 67, 13, // Opcode: BPOS_s8_ir /* 457 */ MCD_OPC_FilterValue, 1, 224, 6, // Skip to: 2221 /* 461 */ MCD_OPC_Decode, 63, 13, // Opcode: BDEC_s8_ir /* 464 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 477 /* 468 */ MCD_OPC_CheckField, 12, 1, 0, 211, 6, // Skip to: 2221 /* 474 */ MCD_OPC_Decode, 66, 14, // Opcode: BNOP_s9_ii /* 477 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 484 /* 481 */ MCD_OPC_Decode, 50, 2, // Opcode: ADD_s1_irr /* 484 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 492 /* 488 */ MCD_OPC_Decode, 177, 1, 1, // Opcode: PACKHL2_s1_rrr /* 492 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 500 /* 496 */ MCD_OPC_Decode, 148, 2, 2, // Opcode: XOR_s1_irr /* 500 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 514 /* 504 */ MCD_OPC_CheckField, 13, 5, 0, 175, 6, // Skip to: 2221 /* 510 */ MCD_OPC_Decode, 156, 1, 15, // Opcode: MVC_s1_rr2 /* 514 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 522 /* 518 */ MCD_OPC_Decode, 180, 1, 1, // Opcode: PACKLH2_s1_rrr /* 522 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 530 /* 526 */ MCD_OPC_Decode, 199, 1, 16, // Opcode: SHL_s1_rip /* 530 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 537 /* 534 */ MCD_OPC_Decode, 80, 1, // Opcode: CMPGT2_s1_rrr /* 537 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 545 /* 541 */ MCD_OPC_Decode, 136, 2, 2, // Opcode: SUB_s1_irr /* 545 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 553 /* 549 */ MCD_OPC_Decode, 203, 1, 17, // Opcode: SHR2_s1_rir /* 553 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 561 /* 557 */ MCD_OPC_Decode, 169, 1, 2, // Opcode: OR_s1_irr /* 561 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 568 /* 565 */ MCD_OPC_Decode, 75, 1, // Opcode: CMPEQ4_s1_rrr /* 568 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 575 /* 572 */ MCD_OPC_Decode, 59, 2, // Opcode: AND_s1_irr /* 575 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 583 /* 579 */ MCD_OPC_Decode, 190, 1, 1, // Opcode: SADD_s1_rrr /* 583 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 591 /* 587 */ MCD_OPC_Decode, 224, 1, 17, // Opcode: SSHL_s1_rir /* 591 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 599 /* 595 */ MCD_OPC_Decode, 209, 1, 18, // Opcode: SHRU_s1_pip /* 599 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 607 /* 603 */ MCD_OPC_Decode, 211, 1, 17, // Opcode: SHRU_s1_rir /* 607 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 615 /* 611 */ MCD_OPC_Decode, 197, 1, 19, // Opcode: SHL_s1_pip /* 615 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 623 /* 619 */ MCD_OPC_Decode, 200, 1, 20, // Opcode: SHL_s1_rir /* 623 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 631 /* 627 */ MCD_OPC_Decode, 213, 1, 18, // Opcode: SHR_s1_pip /* 631 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 639 /* 635 */ MCD_OPC_Decode, 215, 1, 17, // Opcode: SHR_s1_rir /* 639 */ MCD_OPC_FilterValue, 30, 42, 6, // Skip to: 2221 /* 643 */ MCD_OPC_ExtractField, 13, 5, // Inst{17-13} ... /* 646 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 654 /* 650 */ MCD_OPC_Decode, 143, 2, 21, // Opcode: UNPKLU4_s14_rr /* 654 */ MCD_OPC_FilterValue, 3, 27, 6, // Skip to: 2221 /* 658 */ MCD_OPC_Decode, 141, 2, 21, // Opcode: UNPKHU4_s14_rr /* 662 */ MCD_OPC_FilterValue, 9, 17, 0, // Skip to: 683 /* 666 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 669 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 676 /* 673 */ MCD_OPC_Decode, 113, 3, // Opcode: LDB_d5_mr /* 676 */ MCD_OPC_FilterValue, 1, 5, 6, // Skip to: 2221 /* 680 */ MCD_OPC_Decode, 120, 22, // Opcode: LDNDW_d8_mp /* 683 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 691 /* 687 */ MCD_OPC_Decode, 159, 1, 23, // Opcode: MVKL_s12_ir /* 691 */ MCD_OPC_FilterValue, 11, 3, 0, // Skip to: 698 /* 695 */ MCD_OPC_Decode, 114, 5, // Opcode: LDB_d6_mr /* 698 */ MCD_OPC_FilterValue, 12, 194, 0, // Skip to: 896 /* 702 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 705 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 713 /* 709 */ MCD_OPC_Decode, 130, 1, 24, // Opcode: MPY2_m1_rrp /* 713 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 720 /* 717 */ MCD_OPC_Decode, 100, 1, // Opcode: DOTPSU4_m1_rrr /* 720 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 728 /* 724 */ MCD_OPC_Decode, 150, 1, 24, // Opcode: MPYU4_m1_rrp /* 728 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 735 /* 732 */ MCD_OPC_Decode, 101, 1, // Opcode: DOTPU4_m1_rrr /* 735 */ MCD_OPC_FilterValue, 6, 3, 0, // Skip to: 742 /* 739 */ MCD_OPC_Decode, 96, 1, // Opcode: DOTP2_m1_rrr /* 742 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 750 /* 746 */ MCD_OPC_Decode, 143, 1, 1, // Opcode: MPYLIR_m1_rrr /* 750 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 758 /* 754 */ MCD_OPC_Decode, 131, 1, 1, // Opcode: MPYHIR_m1_rrr /* 758 */ MCD_OPC_FilterValue, 9, 3, 0, // Skip to: 765 /* 762 */ MCD_OPC_Decode, 62, 1, // Opcode: AVGU4_m1_rrr /* 765 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 773 /* 769 */ MCD_OPC_Decode, 132, 1, 24, // Opcode: MPYHI_m1_rrp /* 773 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 781 /* 777 */ MCD_OPC_Decode, 227, 1, 1, // Opcode: SSHVR_m1_rrr /* 781 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 789 /* 785 */ MCD_OPC_Decode, 226, 1, 1, // Opcode: SSHVL_m1_rrr /* 789 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 797 /* 793 */ MCD_OPC_Decode, 181, 1, 17, // Opcode: ROTL_m1_rir /* 797 */ MCD_OPC_FilterValue, 16, 3, 0, // Skip to: 804 /* 801 */ MCD_OPC_Decode, 52, 1, // Opcode: ANDN_d2_rrr /* 804 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 812 /* 808 */ MCD_OPC_Decode, 166, 1, 1, // Opcode: OR_d2_rrr /* 812 */ MCD_OPC_FilterValue, 18, 3, 0, // Skip to: 819 /* 816 */ MCD_OPC_Decode, 25, 1, // Opcode: ADD2_d2_rrr /* 819 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 826 /* 823 */ MCD_OPC_Decode, 56, 1, // Opcode: AND_d2_rrr /* 826 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 833 /* 830 */ MCD_OPC_Decode, 44, 1, // Opcode: ADD_d2_rrr /* 833 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 841 /* 837 */ MCD_OPC_Decode, 129, 2, 1, // Opcode: SUB_d2_rrr /* 841 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 849 /* 845 */ MCD_OPC_Decode, 145, 2, 1, // Opcode: XOR_d2_rrr /* 849 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 857 /* 853 */ MCD_OPC_Decode, 183, 1, 1, // Opcode: SADD2_s4_rrr /* 857 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 865 /* 861 */ MCD_OPC_Decode, 222, 1, 1, // Opcode: SPACK2_s4_rrr /* 865 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 873 /* 869 */ MCD_OPC_Decode, 223, 1, 1, // Opcode: SPACKU4_s4_rrr /* 873 */ MCD_OPC_FilterValue, 27, 3, 0, // Skip to: 880 /* 877 */ MCD_OPC_Decode, 54, 1, // Opcode: ANDN_s4_rrr /* 880 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 888 /* 884 */ MCD_OPC_Decode, 208, 1, 1, // Opcode: SHRU2_s4_rrr /* 888 */ MCD_OPC_FilterValue, 29, 49, 5, // Skip to: 2221 /* 892 */ MCD_OPC_Decode, 206, 1, 1, // Opcode: SHRMB_s4_rrr /* 896 */ MCD_OPC_FilterValue, 13, 18, 0, // Skip to: 918 /* 900 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 903 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 911 /* 907 */ MCD_OPC_Decode, 232, 1, 3, // Opcode: STB_d5_rm /* 911 */ MCD_OPC_FilterValue, 1, 26, 5, // Skip to: 2221 /* 915 */ MCD_OPC_Decode, 121, 3, // Opcode: LDNW_d5_mr /* 918 */ MCD_OPC_FilterValue, 14, 98, 0, // Skip to: 1020 /* 922 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 925 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 932 /* 929 */ MCD_OPC_Decode, 26, 1, // Opcode: ADD2_l1_rrr_x2 /* 932 */ MCD_OPC_FilterValue, 8, 3, 0, // Skip to: 939 /* 936 */ MCD_OPC_Decode, 47, 25, // Opcode: ADD_l1_rpp /* 939 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 946 /* 943 */ MCD_OPC_Decode, 39, 25, // Opcode: ADDU_l1_rpp /* 946 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 954 /* 950 */ MCD_OPC_Decode, 188, 1, 25, // Opcode: SADD_l1_rpp /* 954 */ MCD_OPC_FilterValue, 16, 4, 0, // Skip to: 962 /* 958 */ MCD_OPC_Decode, 128, 1, 1, // Opcode: MIN2_l1_rrr_x2 /* 962 */ MCD_OPC_FilterValue, 17, 3, 0, // Skip to: 969 /* 966 */ MCD_OPC_Decode, 84, 26, // Opcode: CMPGT_l1_rpr /* 969 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 976 /* 973 */ MCD_OPC_Decode, 108, 26, // Opcode: GMPGTU_l1_rpr /* 976 */ MCD_OPC_FilterValue, 20, 3, 0, // Skip to: 983 /* 980 */ MCD_OPC_Decode, 78, 26, // Opcode: CMPEQ_l1_rpr /* 983 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 990 /* 987 */ MCD_OPC_Decode, 92, 26, // Opcode: CMPLT_l1_rpr /* 990 */ MCD_OPC_FilterValue, 23, 3, 0, // Skip to: 997 /* 994 */ MCD_OPC_Decode, 88, 26, // Opcode: CMPLTU_l1_rpr /* 997 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 1005 /* 1001 */ MCD_OPC_Decode, 195, 1, 1, // Opcode: SHLMB_l1_rrr_x2 /* 1005 */ MCD_OPC_FilterValue, 25, 3, 0, // Skip to: 1012 /* 1009 */ MCD_OPC_Decode, 28, 1, // Opcode: ADD4_l1_rrr_x2 /* 1012 */ MCD_OPC_FilterValue, 26, 181, 4, // Skip to: 2221 /* 1016 */ MCD_OPC_Decode, 175, 1, 1, // Opcode: PACKH4_l1_rrr_x2 /* 1020 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 1028 /* 1024 */ MCD_OPC_Decode, 233, 1, 5, // Opcode: STB_d6_rm /* 1028 */ MCD_OPC_FilterValue, 16, 151, 0, // Skip to: 1183 /* 1032 */ MCD_OPC_ExtractField, 7, 6, // Inst{12-7} ... /* 1035 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 1049 /* 1039 */ MCD_OPC_CheckField, 18, 5, 0, 152, 4, // Skip to: 2221 /* 1045 */ MCD_OPC_Decode, 160, 1, 27, // Opcode: MVK_d1_rr /* 1049 */ MCD_OPC_FilterValue, 16, 3, 0, // Skip to: 1056 /* 1053 */ MCD_OPC_Decode, 42, 28, // Opcode: ADD_d1_rrr /* 1056 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 1064 /* 1060 */ MCD_OPC_Decode, 128, 2, 28, // Opcode: SUB_d1_rrr /* 1064 */ MCD_OPC_FilterValue, 18, 3, 0, // Skip to: 1071 /* 1068 */ MCD_OPC_Decode, 41, 29, // Opcode: ADD_d1_rir /* 1071 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 1079 /* 1075 */ MCD_OPC_Decode, 255, 1, 29, // Opcode: SUB_d1_rir /* 1079 */ MCD_OPC_FilterValue, 48, 3, 0, // Skip to: 1086 /* 1083 */ MCD_OPC_Decode, 30, 28, // Opcode: ADDAB_d1_rrr /* 1086 */ MCD_OPC_FilterValue, 49, 4, 0, // Skip to: 1094 /* 1090 */ MCD_OPC_Decode, 247, 1, 28, // Opcode: SUBAB_d1_rrr /* 1094 */ MCD_OPC_FilterValue, 50, 3, 0, // Skip to: 1101 /* 1098 */ MCD_OPC_Decode, 29, 29, // Opcode: ADDAB_d1_rir /* 1101 */ MCD_OPC_FilterValue, 51, 4, 0, // Skip to: 1109 /* 1105 */ MCD_OPC_Decode, 246, 1, 29, // Opcode: SUBAB_d1_rir /* 1109 */ MCD_OPC_FilterValue, 52, 3, 0, // Skip to: 1116 /* 1113 */ MCD_OPC_Decode, 34, 28, // Opcode: ADDAH_d1_rrr /* 1116 */ MCD_OPC_FilterValue, 53, 4, 0, // Skip to: 1124 /* 1120 */ MCD_OPC_Decode, 249, 1, 28, // Opcode: SUBAH_d1_rrr /* 1124 */ MCD_OPC_FilterValue, 54, 3, 0, // Skip to: 1131 /* 1128 */ MCD_OPC_Decode, 33, 29, // Opcode: ADDAH_d1_rir /* 1131 */ MCD_OPC_FilterValue, 55, 4, 0, // Skip to: 1139 /* 1135 */ MCD_OPC_Decode, 248, 1, 29, // Opcode: SUBAH_d1_rir /* 1139 */ MCD_OPC_FilterValue, 56, 3, 0, // Skip to: 1146 /* 1143 */ MCD_OPC_Decode, 36, 28, // Opcode: ADDAW_d1_rrr /* 1146 */ MCD_OPC_FilterValue, 57, 4, 0, // Skip to: 1154 /* 1150 */ MCD_OPC_Decode, 251, 1, 28, // Opcode: SUBAW_d1_rrr /* 1154 */ MCD_OPC_FilterValue, 58, 3, 0, // Skip to: 1161 /* 1158 */ MCD_OPC_Decode, 35, 29, // Opcode: ADDAW_d1_rir /* 1161 */ MCD_OPC_FilterValue, 59, 4, 0, // Skip to: 1169 /* 1165 */ MCD_OPC_Decode, 250, 1, 29, // Opcode: SUBAW_d1_rir /* 1169 */ MCD_OPC_FilterValue, 60, 3, 0, // Skip to: 1176 /* 1173 */ MCD_OPC_Decode, 32, 28, // Opcode: ADDAD_d1_rrr /* 1176 */ MCD_OPC_FilterValue, 61, 17, 4, // Skip to: 2221 /* 1180 */ MCD_OPC_Decode, 31, 29, // Opcode: ADDAD_d1_rir /* 1183 */ MCD_OPC_FilterValue, 17, 18, 0, // Skip to: 1205 /* 1187 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 1190 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1197 /* 1194 */ MCD_OPC_Decode, 118, 3, // Opcode: LDH_d5_mr /* 1197 */ MCD_OPC_FilterValue, 1, 252, 3, // Skip to: 2221 /* 1201 */ MCD_OPC_Decode, 234, 1, 30, // Opcode: STDW_d7_pm /* 1205 */ MCD_OPC_FilterValue, 18, 17, 0, // Skip to: 1226 /* 1209 */ MCD_OPC_ExtractField, 7, 1, // Inst{7} ... /* 1212 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1219 /* 1216 */ MCD_OPC_Decode, 104, 4, // Opcode: EXT_s15_riir /* 1219 */ MCD_OPC_FilterValue, 1, 230, 3, // Skip to: 2221 /* 1223 */ MCD_OPC_Decode, 72, 4, // Opcode: CLR_s15_riir /* 1226 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 1233 /* 1230 */ MCD_OPC_Decode, 119, 5, // Opcode: LDH_d6_mr /* 1233 */ MCD_OPC_FilterValue, 20, 3, 0, // Skip to: 1240 /* 1237 */ MCD_OPC_Decode, 38, 23, // Opcode: ADDK_s2_ir /* 1240 */ MCD_OPC_FilterValue, 21, 19, 0, // Skip to: 1263 /* 1244 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 1247 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1255 /* 1251 */ MCD_OPC_Decode, 235, 1, 3, // Opcode: STH_d5_rm /* 1255 */ MCD_OPC_FilterValue, 1, 194, 3, // Skip to: 2221 /* 1259 */ MCD_OPC_Decode, 238, 1, 3, // Opcode: STNW_d5_rm /* 1263 */ MCD_OPC_FilterValue, 22, 191, 0, // Skip to: 1458 /* 1267 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 1270 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1277 /* 1274 */ MCD_OPC_Decode, 46, 2, // Opcode: ADD_l1_irr /* 1277 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1285 /* 1281 */ MCD_OPC_Decode, 131, 2, 2, // Opcode: SUB_l1_irr /* 1285 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 1293 /* 1289 */ MCD_OPC_Decode, 229, 1, 2, // Opcode: SSUB_l1_irr /* 1293 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1301 /* 1297 */ MCD_OPC_Decode, 187, 1, 2, // Opcode: SADD_l1_irr /* 1301 */ MCD_OPC_FilterValue, 6, 49, 0, // Skip to: 1354 /* 1305 */ MCD_OPC_ExtractField, 13, 5, // Inst{17-13} ... /* 1308 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1315 /* 1312 */ MCD_OPC_Decode, 24, 21, // Opcode: ABS_l1_rr /* 1315 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1323 /* 1319 */ MCD_OPC_Decode, 139, 2, 21, // Opcode: SWAP4_l2_rr /* 1323 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 1331 /* 1327 */ MCD_OPC_Decode, 142, 2, 21, // Opcode: UNPKLU4_l2_rr /* 1331 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 1339 /* 1335 */ MCD_OPC_Decode, 140, 2, 21, // Opcode: UNPKHU4_l2_rr /* 1339 */ MCD_OPC_FilterValue, 4, 3, 0, // Skip to: 1346 /* 1343 */ MCD_OPC_Decode, 22, 21, // Opcode: ABS2_l2_rr /* 1346 */ MCD_OPC_FilterValue, 5, 103, 3, // Skip to: 2221 /* 1350 */ MCD_OPC_Decode, 161, 1, 31, // Opcode: MVK_l2_ir /* 1354 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 1362 /* 1358 */ MCD_OPC_Decode, 173, 1, 1, // Opcode: PACKH2_l1_rrr_x2 /* 1362 */ MCD_OPC_FilterValue, 16, 3, 0, // Skip to: 1369 /* 1366 */ MCD_OPC_Decode, 126, 1, // Opcode: MAX2_l1_rrr_x2 /* 1369 */ MCD_OPC_FilterValue, 17, 3, 0, // Skip to: 1376 /* 1373 */ MCD_OPC_Decode, 83, 2, // Opcode: CMPGT_l1_irr /* 1376 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 1383 /* 1380 */ MCD_OPC_Decode, 107, 17, // Opcode: GMPGTU_l1_irr /* 1383 */ MCD_OPC_FilterValue, 20, 3, 0, // Skip to: 1390 /* 1387 */ MCD_OPC_Decode, 77, 2, // Opcode: CMPEQ_l1_irr /* 1390 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 1397 /* 1394 */ MCD_OPC_Decode, 91, 2, // Opcode: CMPLT_l1_irr /* 1397 */ MCD_OPC_FilterValue, 22, 4, 0, // Skip to: 1405 /* 1401 */ MCD_OPC_Decode, 245, 1, 1, // Opcode: SUBABS4_l1_rrr_x2 /* 1405 */ MCD_OPC_FilterValue, 23, 3, 0, // Skip to: 1412 /* 1409 */ MCD_OPC_Decode, 87, 17, // Opcode: CMPLTU_l1_irr /* 1412 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 1420 /* 1416 */ MCD_OPC_Decode, 205, 1, 1, // Opcode: SHRMB_l1_rrr_x2 /* 1420 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 1428 /* 1424 */ MCD_OPC_Decode, 244, 1, 1, // Opcode: SUB4_l1_rrr_x2 /* 1428 */ MCD_OPC_FilterValue, 26, 3, 0, // Skip to: 1435 /* 1432 */ MCD_OPC_Decode, 124, 2, // Opcode: LMBD_l1_irr /* 1435 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 1443 /* 1439 */ MCD_OPC_Decode, 146, 2, 2, // Opcode: XOR_l1_irr /* 1443 */ MCD_OPC_FilterValue, 30, 3, 0, // Skip to: 1450 /* 1447 */ MCD_OPC_Decode, 57, 2, // Opcode: AND_l1_irr /* 1450 */ MCD_OPC_FilterValue, 31, 255, 2, // Skip to: 2221 /* 1454 */ MCD_OPC_Decode, 167, 1, 2, // Opcode: OR_l1_irr /* 1458 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 1466 /* 1462 */ MCD_OPC_Decode, 236, 1, 5, // Opcode: STH_d6_rm /* 1466 */ MCD_OPC_FilterValue, 24, 6, 1, // Skip to: 1732 /* 1470 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 1473 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1480 /* 1477 */ MCD_OPC_Decode, 27, 1, // Opcode: ADD2_s1_rrr /* 1480 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 1503 /* 1484 */ MCD_OPC_ExtractField, 12, 16, // Inst{27-12} ... /* 1487 */ MCD_OPC_FilterValue, 128, 3, 3, 0, // Skip to: 1495 /* 1492 */ MCD_OPC_Decode, 70, 32, // Opcode: B_s7_irp /* 1495 */ MCD_OPC_FilterValue, 192, 3, 209, 2, // Skip to: 2221 /* 1500 */ MCD_OPC_Decode, 71, 32, // Opcode: B_s7_nrp /* 1503 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 1516 /* 1507 */ MCD_OPC_CheckField, 12, 1, 0, 196, 2, // Skip to: 2221 /* 1513 */ MCD_OPC_Decode, 37, 33, // Opcode: ADDKPC_s3_iir /* 1516 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 1523 /* 1520 */ MCD_OPC_Decode, 51, 1, // Opcode: ADD_s1_rrr /* 1523 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1531 /* 1527 */ MCD_OPC_Decode, 174, 1, 1, // Opcode: PACKH2_s1_rrr /* 1531 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 1539 /* 1535 */ MCD_OPC_Decode, 149, 2, 1, // Opcode: XOR_s1_rrr /* 1539 */ MCD_OPC_FilterValue, 6, 29, 0, // Skip to: 1572 /* 1543 */ MCD_OPC_ExtractField, 23, 5, // Inst{27-23} ... /* 1546 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 1559 /* 1550 */ MCD_OPC_CheckField, 13, 5, 0, 153, 2, // Skip to: 2221 /* 1556 */ MCD_OPC_Decode, 69, 34, // Opcode: B_s6_r /* 1559 */ MCD_OPC_FilterValue, 1, 146, 2, // Skip to: 2221 /* 1563 */ MCD_OPC_CheckField, 16, 2, 0, 140, 2, // Skip to: 2221 /* 1569 */ MCD_OPC_Decode, 65, 35, // Opcode: BNOP_s10_ri /* 1572 */ MCD_OPC_FilterValue, 7, 10, 0, // Skip to: 1586 /* 1576 */ MCD_OPC_CheckField, 13, 5, 0, 127, 2, // Skip to: 2221 /* 1582 */ MCD_OPC_Decode, 155, 1, 36, // Opcode: MVC_s1_rr /* 1586 */ MCD_OPC_FilterValue, 8, 4, 0, // Skip to: 1594 /* 1590 */ MCD_OPC_Decode, 243, 1, 1, // Opcode: SUB2_s1_rrr /* 1594 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 1602 /* 1598 */ MCD_OPC_Decode, 201, 1, 37, // Opcode: SHL_s1_rrp /* 1602 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 1609 /* 1606 */ MCD_OPC_Decode, 81, 1, // Opcode: CMPGTU4_s1_rrr /* 1609 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 1617 /* 1613 */ MCD_OPC_Decode, 137, 2, 1, // Opcode: SUB_s1_rrr /* 1617 */ MCD_OPC_FilterValue, 12, 4, 0, // Skip to: 1625 /* 1621 */ MCD_OPC_Decode, 207, 1, 17, // Opcode: SHRU2_s1_rir /* 1625 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 1633 /* 1629 */ MCD_OPC_Decode, 170, 1, 1, // Opcode: OR_s1_rrr /* 1633 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 1640 /* 1637 */ MCD_OPC_Decode, 74, 1, // Opcode: CMPEQ2_s1_rrr /* 1640 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 1647 /* 1644 */ MCD_OPC_Decode, 60, 1, // Opcode: AND_s1_rrr /* 1647 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 1655 /* 1651 */ MCD_OPC_Decode, 225, 1, 1, // Opcode: SSHL_s1_rrr /* 1655 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 1663 /* 1659 */ MCD_OPC_Decode, 210, 1, 38, // Opcode: SHRU_s1_prp /* 1663 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 1671 /* 1667 */ MCD_OPC_Decode, 212, 1, 1, // Opcode: SHRU_s1_rrr /* 1671 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 1678 /* 1675 */ MCD_OPC_Decode, 103, 1, // Opcode: EXTU_s1_rrr /* 1678 */ MCD_OPC_FilterValue, 23, 3, 0, // Skip to: 1685 /* 1682 */ MCD_OPC_Decode, 105, 1, // Opcode: EXT_s1_rrr /* 1685 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 1693 /* 1689 */ MCD_OPC_Decode, 198, 1, 25, // Opcode: SHL_s1_prp /* 1693 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 1701 /* 1697 */ MCD_OPC_Decode, 202, 1, 39, // Opcode: SHL_s1_rrr /* 1701 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 1709 /* 1705 */ MCD_OPC_Decode, 214, 1, 38, // Opcode: SHR_s1_prp /* 1709 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 1717 /* 1713 */ MCD_OPC_Decode, 216, 1, 1, // Opcode: SHR_s1_rrr /* 1717 */ MCD_OPC_FilterValue, 29, 4, 0, // Skip to: 1725 /* 1721 */ MCD_OPC_Decode, 193, 1, 1, // Opcode: SET_s1_rrr /* 1725 */ MCD_OPC_FilterValue, 31, 236, 1, // Skip to: 2221 /* 1729 */ MCD_OPC_Decode, 73, 1, // Opcode: CLR_s1_rrr /* 1732 */ MCD_OPC_FilterValue, 25, 17, 0, // Skip to: 1753 /* 1736 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 1739 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1746 /* 1743 */ MCD_OPC_Decode, 122, 3, // Opcode: LDW_d5_mr /* 1746 */ MCD_OPC_FilterValue, 1, 215, 1, // Skip to: 2221 /* 1750 */ MCD_OPC_Decode, 115, 30, // Opcode: LDDW_d7_mp /* 1753 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 1761 /* 1757 */ MCD_OPC_Decode, 158, 1, 23, // Opcode: MVKLH_s12_ir /* 1761 */ MCD_OPC_FilterValue, 27, 3, 0, // Skip to: 1768 /* 1765 */ MCD_OPC_Decode, 123, 5, // Opcode: LDW_d6_mr /* 1768 */ MCD_OPC_FilterValue, 28, 216, 0, // Skip to: 1988 /* 1772 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 1775 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1783 /* 1779 */ MCD_OPC_Decode, 217, 1, 24, // Opcode: SMPY2_m1_rrp /* 1783 */ MCD_OPC_FilterValue, 1, 49, 0, // Skip to: 1836 /* 1787 */ MCD_OPC_ExtractField, 13, 5, // Inst{17-13} ... /* 1790 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 1798 /* 1794 */ MCD_OPC_Decode, 151, 2, 21, // Opcode: XPND4_m2_rr /* 1798 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 1806 /* 1802 */ MCD_OPC_Decode, 150, 2, 21, // Opcode: XPND2_m2_rr /* 1806 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 1814 /* 1810 */ MCD_OPC_Decode, 157, 1, 21, // Opcode: MVD_m2_rr /* 1814 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 1822 /* 1818 */ MCD_OPC_Decode, 194, 1, 21, // Opcode: SHFL_m2_rr /* 1822 */ MCD_OPC_FilterValue, 29, 3, 0, // Skip to: 1829 /* 1826 */ MCD_OPC_Decode, 94, 21, // Opcode: DEAL_m2_rr /* 1829 */ MCD_OPC_FilterValue, 30, 132, 1, // Skip to: 2221 /* 1833 */ MCD_OPC_Decode, 64, 21, // Opcode: BITC4_m2_rr /* 1836 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 1844 /* 1840 */ MCD_OPC_Decode, 147, 1, 24, // Opcode: MPYSU4_m1_rrp /* 1844 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 1851 /* 1848 */ MCD_OPC_Decode, 98, 1, // Opcode: DOTPNRSU2_m1_rrr /* 1851 */ MCD_OPC_FilterValue, 4, 3, 0, // Skip to: 1858 /* 1855 */ MCD_OPC_Decode, 97, 1, // Opcode: DOTPN2_m1_rrr /* 1858 */ MCD_OPC_FilterValue, 5, 3, 0, // Skip to: 1865 /* 1862 */ MCD_OPC_Decode, 95, 24, // Opcode: DOTP2_m1_rrp /* 1865 */ MCD_OPC_FilterValue, 6, 3, 0, // Skip to: 1872 /* 1869 */ MCD_OPC_Decode, 99, 1, // Opcode: DOTPRSU2_m1_rrr /* 1872 */ MCD_OPC_FilterValue, 8, 3, 0, // Skip to: 1879 /* 1876 */ MCD_OPC_Decode, 110, 1, // Opcode: GMPY4_m1_rrr /* 1879 */ MCD_OPC_FilterValue, 9, 3, 0, // Skip to: 1886 /* 1883 */ MCD_OPC_Decode, 61, 1, // Opcode: AVG2_m1_rrr /* 1886 */ MCD_OPC_FilterValue, 10, 4, 0, // Skip to: 1894 /* 1890 */ MCD_OPC_Decode, 144, 1, 24, // Opcode: MPYLI_m1_rrp /* 1894 */ MCD_OPC_FilterValue, 14, 4, 0, // Skip to: 1902 /* 1898 */ MCD_OPC_Decode, 182, 1, 1, // Opcode: ROTL_m1_rrr /* 1902 */ MCD_OPC_FilterValue, 17, 4, 0, // Skip to: 1910 /* 1906 */ MCD_OPC_Decode, 165, 1, 2, // Opcode: OR_d2_rir /* 1910 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 1918 /* 1914 */ MCD_OPC_Decode, 241, 1, 1, // Opcode: SUB2_d2_rrr /* 1918 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 1925 /* 1922 */ MCD_OPC_Decode, 55, 2, // Opcode: AND_d2_rir /* 1925 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 1932 /* 1929 */ MCD_OPC_Decode, 43, 2, // Opcode: ADD_d2_rir /* 1932 */ MCD_OPC_FilterValue, 23, 4, 0, // Skip to: 1940 /* 1936 */ MCD_OPC_Decode, 144, 2, 2, // Opcode: XOR_d2_rir /* 1940 */ MCD_OPC_FilterValue, 24, 4, 0, // Skip to: 1948 /* 1944 */ MCD_OPC_Decode, 185, 1, 1, // Opcode: SADDUS2_s4_rrr /* 1948 */ MCD_OPC_FilterValue, 25, 4, 0, // Skip to: 1956 /* 1952 */ MCD_OPC_Decode, 184, 1, 1, // Opcode: SADDU4_s4_rrr /* 1956 */ MCD_OPC_FilterValue, 26, 4, 0, // Skip to: 1964 /* 1960 */ MCD_OPC_Decode, 138, 2, 1, // Opcode: SUB_s4_rrr /* 1964 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 1972 /* 1968 */ MCD_OPC_Decode, 204, 1, 1, // Opcode: SHR2_s4_rrr /* 1972 */ MCD_OPC_FilterValue, 28, 4, 0, // Skip to: 1980 /* 1976 */ MCD_OPC_Decode, 196, 1, 1, // Opcode: SHLMB_s4_rrr /* 1980 */ MCD_OPC_FilterValue, 31, 237, 0, // Skip to: 2221 /* 1984 */ MCD_OPC_Decode, 172, 1, 1, // Opcode: PACK2_s4_rrr /* 1988 */ MCD_OPC_FilterValue, 29, 19, 0, // Skip to: 2011 /* 1992 */ MCD_OPC_ExtractField, 8, 1, // Inst{8} ... /* 1995 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2003 /* 1999 */ MCD_OPC_Decode, 239, 1, 3, // Opcode: STW_d5_rm /* 2003 */ MCD_OPC_FilterValue, 1, 214, 0, // Skip to: 2221 /* 2007 */ MCD_OPC_Decode, 237, 1, 22, // Opcode: STNDW_d8_pm /* 2011 */ MCD_OPC_FilterValue, 30, 198, 0, // Skip to: 2213 /* 2015 */ MCD_OPC_ExtractField, 7, 5, // Inst{11-7} ... /* 2018 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 2025 /* 2022 */ MCD_OPC_Decode, 49, 1, // Opcode: ADD_l1_rrr_x2 /* 2025 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2033 /* 2029 */ MCD_OPC_Decode, 135, 2, 1, // Opcode: SUB_l1_rrr_x2 /* 2033 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 2041 /* 2037 */ MCD_OPC_Decode, 231, 1, 1, // Opcode: SSUB_l1_rrr_x2 /* 2041 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 2049 /* 2045 */ MCD_OPC_Decode, 189, 1, 1, // Opcode: SADD_l1_rrr_x2 /* 2049 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 2057 /* 2053 */ MCD_OPC_Decode, 134, 2, 39, // Opcode: SUB_l1_rrr_x1 /* 2057 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 2065 /* 2061 */ MCD_OPC_Decode, 179, 1, 1, // Opcode: PACKLH2_l1_rrr_x2 /* 2065 */ MCD_OPC_FilterValue, 7, 4, 0, // Skip to: 2073 /* 2069 */ MCD_OPC_Decode, 230, 1, 39, // Opcode: SSUB_l1_rrr_x1 /* 2073 */ MCD_OPC_FilterValue, 8, 3, 0, // Skip to: 2080 /* 2077 */ MCD_OPC_Decode, 48, 24, // Opcode: ADD_l1_rrp_x2 /* 2080 */ MCD_OPC_FilterValue, 9, 4, 0, // Skip to: 2088 /* 2084 */ MCD_OPC_Decode, 133, 2, 24, // Opcode: SUB_l1_rrp_x2 /* 2088 */ MCD_OPC_FilterValue, 10, 3, 0, // Skip to: 2095 /* 2092 */ MCD_OPC_Decode, 40, 24, // Opcode: ADDU_l1_rrp_x2 /* 2095 */ MCD_OPC_FilterValue, 11, 4, 0, // Skip to: 2103 /* 2099 */ MCD_OPC_Decode, 254, 1, 24, // Opcode: SUBU_l1_rrp_x2 /* 2103 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 2111 /* 2107 */ MCD_OPC_Decode, 132, 2, 37, // Opcode: SUB_l1_rrp_x1 /* 2111 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 2119 /* 2115 */ MCD_OPC_Decode, 253, 1, 37, // Opcode: SUBU_l1_rrp_x1 /* 2119 */ MCD_OPC_FilterValue, 16, 3, 0, // Skip to: 2126 /* 2123 */ MCD_OPC_Decode, 127, 1, // Opcode: MAXU4_l1_rrr_x2 /* 2126 */ MCD_OPC_FilterValue, 17, 3, 0, // Skip to: 2133 /* 2130 */ MCD_OPC_Decode, 85, 1, // Opcode: CMPGT_l1_rrr_x2 /* 2133 */ MCD_OPC_FilterValue, 18, 4, 0, // Skip to: 2141 /* 2137 */ MCD_OPC_Decode, 252, 1, 1, // Opcode: SUBC_l1_rrr_x2 /* 2141 */ MCD_OPC_FilterValue, 19, 3, 0, // Skip to: 2148 /* 2145 */ MCD_OPC_Decode, 109, 1, // Opcode: GMPGTU_l1_rrr_x2 /* 2148 */ MCD_OPC_FilterValue, 20, 3, 0, // Skip to: 2155 /* 2152 */ MCD_OPC_Decode, 79, 1, // Opcode: CMPEQ_l1_rrr_x2 /* 2155 */ MCD_OPC_FilterValue, 21, 3, 0, // Skip to: 2162 /* 2159 */ MCD_OPC_Decode, 93, 1, // Opcode: CMPLT_l1_rrr_x2 /* 2162 */ MCD_OPC_FilterValue, 23, 3, 0, // Skip to: 2169 /* 2166 */ MCD_OPC_Decode, 89, 1, // Opcode: CMPLTU_l1_rrr_x2 /* 2169 */ MCD_OPC_FilterValue, 24, 10, 0, // Skip to: 2183 /* 2173 */ MCD_OPC_CheckField, 13, 5, 0, 42, 0, // Skip to: 2221 /* 2179 */ MCD_OPC_Decode, 164, 1, 21, // Opcode: NORM_l1_rr /* 2183 */ MCD_OPC_FilterValue, 26, 3, 0, // Skip to: 2190 /* 2187 */ MCD_OPC_Decode, 125, 1, // Opcode: LMBD_l1_rrr_x2 /* 2190 */ MCD_OPC_FilterValue, 27, 4, 0, // Skip to: 2198 /* 2194 */ MCD_OPC_Decode, 147, 2, 1, // Opcode: XOR_l1_rrr_x2 /* 2198 */ MCD_OPC_FilterValue, 30, 3, 0, // Skip to: 2205 /* 2202 */ MCD_OPC_Decode, 58, 1, // Opcode: AND_l1_rrr_x2 /* 2205 */ MCD_OPC_FilterValue, 31, 12, 0, // Skip to: 2221 /* 2209 */ MCD_OPC_Decode, 168, 1, 1, // Opcode: OR_l1_rrr_x2 /* 2213 */ MCD_OPC_FilterValue, 31, 4, 0, // Skip to: 2221 /* 2217 */ MCD_OPC_Decode, 240, 1, 5, // Opcode: STW_d6_rm /* 2221 */ MCD_OPC_Fail, 0 }; static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { return true; } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, void *Decoder) { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ tmp = fieldname(insn, 13, 4); \ if (DecodeNop(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 1: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 2: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeScst5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 3: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 9, 14) << 1; \ if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 4: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 8, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 5: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 7, 16); \ if (DecodeMemOperand2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 6: \ tmp = fieldname(insn, 7, 21); \ if (DecodePCRelScst21(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 7: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeScst5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 8: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 9: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeScst5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 11: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 12: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 13: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 10); \ if (DecodePCRelScst10(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 16, 12); \ if (DecodePCRelScst12(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 15: \ tmp = fieldname(insn, 23, 5); \ if (DecodeControlRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 16: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 17: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 18: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 19: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 20: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 21: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 22: \ tmp = fieldname(insn, 24, 4); \ if (DecodeRegPair4(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 9, 15) << 1; \ if (DecodeMemOperandSc(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 23: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 7, 16); \ if (DecodeScst16(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 24: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 25: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 26: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeScst5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 28: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 29: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 30: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= fieldname(insn, 7, 1) << 0; \ tmp |= fieldname(insn, 9, 14) << 1; \ if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeScst5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 32: \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 33: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 16, 7); \ if (DecodePCRelScst7(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 34: \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 3); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX1(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 36: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeControlRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 37: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 38: \ tmp = fieldname(insn, 23, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeRegPair5(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 39: \ tmp = fieldname(insn, 23, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 18, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 13, 5); \ if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 12, 1); \ if (DecodeCrosspathX3(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 29, 3); \ if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 28, 1); \ if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 1, 1); \ if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 1); \ if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, \ MCRegisterInfo *MRI, \ int feature) { \ uint64_t Bits = getFeatureBits(feature); \ uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t) fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType) decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t) decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t) decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned) decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned) decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType) decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType) decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction_4, uint32_t) DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t) capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc010066400017500001750000000227361363402546700230740ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { TMS320C64x_PHI = 0, TMS320C64x_INLINEASM = 1, TMS320C64x_CFI_INSTRUCTION = 2, TMS320C64x_EH_LABEL = 3, TMS320C64x_GC_LABEL = 4, TMS320C64x_KILL = 5, TMS320C64x_EXTRACT_SUBREG = 6, TMS320C64x_INSERT_SUBREG = 7, TMS320C64x_IMPLICIT_DEF = 8, TMS320C64x_SUBREG_TO_REG = 9, TMS320C64x_COPY_TO_REGCLASS = 10, TMS320C64x_DBG_VALUE = 11, TMS320C64x_REG_SEQUENCE = 12, TMS320C64x_COPY = 13, TMS320C64x_BUNDLE = 14, TMS320C64x_LIFETIME_START = 15, TMS320C64x_LIFETIME_END = 16, TMS320C64x_STACKMAP = 17, TMS320C64x_PATCHPOINT = 18, TMS320C64x_LOAD_STACK_GUARD = 19, TMS320C64x_STATEPOINT = 20, TMS320C64x_FRAME_ALLOC = 21, TMS320C64x_ABS2_l2_rr = 22, TMS320C64x_ABS_l1_pp = 23, TMS320C64x_ABS_l1_rr = 24, TMS320C64x_ADD2_d2_rrr = 25, TMS320C64x_ADD2_l1_rrr_x2 = 26, TMS320C64x_ADD2_s1_rrr = 27, TMS320C64x_ADD4_l1_rrr_x2 = 28, TMS320C64x_ADDAB_d1_rir = 29, TMS320C64x_ADDAB_d1_rrr = 30, TMS320C64x_ADDAD_d1_rir = 31, TMS320C64x_ADDAD_d1_rrr = 32, TMS320C64x_ADDAH_d1_rir = 33, TMS320C64x_ADDAH_d1_rrr = 34, TMS320C64x_ADDAW_d1_rir = 35, TMS320C64x_ADDAW_d1_rrr = 36, TMS320C64x_ADDKPC_s3_iir = 37, TMS320C64x_ADDK_s2_ir = 38, TMS320C64x_ADDU_l1_rpp = 39, TMS320C64x_ADDU_l1_rrp_x2 = 40, TMS320C64x_ADD_d1_rir = 41, TMS320C64x_ADD_d1_rrr = 42, TMS320C64x_ADD_d2_rir = 43, TMS320C64x_ADD_d2_rrr = 44, TMS320C64x_ADD_l1_ipp = 45, TMS320C64x_ADD_l1_irr = 46, TMS320C64x_ADD_l1_rpp = 47, TMS320C64x_ADD_l1_rrp_x2 = 48, TMS320C64x_ADD_l1_rrr_x2 = 49, TMS320C64x_ADD_s1_irr = 50, TMS320C64x_ADD_s1_rrr = 51, TMS320C64x_ANDN_d2_rrr = 52, TMS320C64x_ANDN_l1_rrr_x2 = 53, TMS320C64x_ANDN_s4_rrr = 54, TMS320C64x_AND_d2_rir = 55, TMS320C64x_AND_d2_rrr = 56, TMS320C64x_AND_l1_irr = 57, TMS320C64x_AND_l1_rrr_x2 = 58, TMS320C64x_AND_s1_irr = 59, TMS320C64x_AND_s1_rrr = 60, TMS320C64x_AVG2_m1_rrr = 61, TMS320C64x_AVGU4_m1_rrr = 62, TMS320C64x_BDEC_s8_ir = 63, TMS320C64x_BITC4_m2_rr = 64, TMS320C64x_BNOP_s10_ri = 65, TMS320C64x_BNOP_s9_ii = 66, TMS320C64x_BPOS_s8_ir = 67, TMS320C64x_B_s5_i = 68, TMS320C64x_B_s6_r = 69, TMS320C64x_B_s7_irp = 70, TMS320C64x_B_s7_nrp = 71, TMS320C64x_CLR_s15_riir = 72, TMS320C64x_CLR_s1_rrr = 73, TMS320C64x_CMPEQ2_s1_rrr = 74, TMS320C64x_CMPEQ4_s1_rrr = 75, TMS320C64x_CMPEQ_l1_ipr = 76, TMS320C64x_CMPEQ_l1_irr = 77, TMS320C64x_CMPEQ_l1_rpr = 78, TMS320C64x_CMPEQ_l1_rrr_x2 = 79, TMS320C64x_CMPGT2_s1_rrr = 80, TMS320C64x_CMPGTU4_s1_rrr = 81, TMS320C64x_CMPGT_l1_ipr = 82, TMS320C64x_CMPGT_l1_irr = 83, TMS320C64x_CMPGT_l1_rpr = 84, TMS320C64x_CMPGT_l1_rrr_x2 = 85, TMS320C64x_CMPLTU_l1_ipr = 86, TMS320C64x_CMPLTU_l1_irr = 87, TMS320C64x_CMPLTU_l1_rpr = 88, TMS320C64x_CMPLTU_l1_rrr_x2 = 89, TMS320C64x_CMPLT_l1_ipr = 90, TMS320C64x_CMPLT_l1_irr = 91, TMS320C64x_CMPLT_l1_rpr = 92, TMS320C64x_CMPLT_l1_rrr_x2 = 93, TMS320C64x_DEAL_m2_rr = 94, TMS320C64x_DOTP2_m1_rrp = 95, TMS320C64x_DOTP2_m1_rrr = 96, TMS320C64x_DOTPN2_m1_rrr = 97, TMS320C64x_DOTPNRSU2_m1_rrr = 98, TMS320C64x_DOTPRSU2_m1_rrr = 99, TMS320C64x_DOTPSU4_m1_rrr = 100, TMS320C64x_DOTPU4_m1_rrr = 101, TMS320C64x_EXTU_s15_riir = 102, TMS320C64x_EXTU_s1_rrr = 103, TMS320C64x_EXT_s15_riir = 104, TMS320C64x_EXT_s1_rrr = 105, TMS320C64x_GMPGTU_l1_ipr = 106, TMS320C64x_GMPGTU_l1_irr = 107, TMS320C64x_GMPGTU_l1_rpr = 108, TMS320C64x_GMPGTU_l1_rrr_x2 = 109, TMS320C64x_GMPY4_m1_rrr = 110, TMS320C64x_LDBU_d5_mr = 111, TMS320C64x_LDBU_d6_mr = 112, TMS320C64x_LDB_d5_mr = 113, TMS320C64x_LDB_d6_mr = 114, TMS320C64x_LDDW_d7_mp = 115, TMS320C64x_LDHU_d5_mr = 116, TMS320C64x_LDHU_d6_mr = 117, TMS320C64x_LDH_d5_mr = 118, TMS320C64x_LDH_d6_mr = 119, TMS320C64x_LDNDW_d8_mp = 120, TMS320C64x_LDNW_d5_mr = 121, TMS320C64x_LDW_d5_mr = 122, TMS320C64x_LDW_d6_mr = 123, TMS320C64x_LMBD_l1_irr = 124, TMS320C64x_LMBD_l1_rrr_x2 = 125, TMS320C64x_MAX2_l1_rrr_x2 = 126, TMS320C64x_MAXU4_l1_rrr_x2 = 127, TMS320C64x_MIN2_l1_rrr_x2 = 128, TMS320C64x_MINU4_l1_rrr_x2 = 129, TMS320C64x_MPY2_m1_rrp = 130, TMS320C64x_MPYHIR_m1_rrr = 131, TMS320C64x_MPYHI_m1_rrp = 132, TMS320C64x_MPYHLU_m4_rrr = 133, TMS320C64x_MPYHL_m4_rrr = 134, TMS320C64x_MPYHSLU_m4_rrr = 135, TMS320C64x_MPYHSU_m4_rrr = 136, TMS320C64x_MPYHULS_m4_rrr = 137, TMS320C64x_MPYHUS_m4_rrr = 138, TMS320C64x_MPYHU_m4_rrr = 139, TMS320C64x_MPYH_m4_rrr = 140, TMS320C64x_MPYLHU_m4_rrr = 141, TMS320C64x_MPYLH_m4_rrr = 142, TMS320C64x_MPYLIR_m1_rrr = 143, TMS320C64x_MPYLI_m1_rrp = 144, TMS320C64x_MPYLSHU_m4_rrr = 145, TMS320C64x_MPYLUHS_m4_rrr = 146, TMS320C64x_MPYSU4_m1_rrp = 147, TMS320C64x_MPYSU_m4_irr = 148, TMS320C64x_MPYSU_m4_rrr = 149, TMS320C64x_MPYU4_m1_rrp = 150, TMS320C64x_MPYUS_m4_rrr = 151, TMS320C64x_MPYU_m4_rrr = 152, TMS320C64x_MPY_m4_irr = 153, TMS320C64x_MPY_m4_rrr = 154, TMS320C64x_MVC_s1_rr = 155, TMS320C64x_MVC_s1_rr2 = 156, TMS320C64x_MVD_m2_rr = 157, TMS320C64x_MVKLH_s12_ir = 158, TMS320C64x_MVKL_s12_ir = 159, TMS320C64x_MVK_d1_rr = 160, TMS320C64x_MVK_l2_ir = 161, TMS320C64x_NOP_n = 162, TMS320C64x_NORM_l1_pr = 163, TMS320C64x_NORM_l1_rr = 164, TMS320C64x_OR_d2_rir = 165, TMS320C64x_OR_d2_rrr = 166, TMS320C64x_OR_l1_irr = 167, TMS320C64x_OR_l1_rrr_x2 = 168, TMS320C64x_OR_s1_irr = 169, TMS320C64x_OR_s1_rrr = 170, TMS320C64x_PACK2_l1_rrr_x2 = 171, TMS320C64x_PACK2_s4_rrr = 172, TMS320C64x_PACKH2_l1_rrr_x2 = 173, TMS320C64x_PACKH2_s1_rrr = 174, TMS320C64x_PACKH4_l1_rrr_x2 = 175, TMS320C64x_PACKHL2_l1_rrr_x2 = 176, TMS320C64x_PACKHL2_s1_rrr = 177, TMS320C64x_PACKL4_l1_rrr_x2 = 178, TMS320C64x_PACKLH2_l1_rrr_x2 = 179, TMS320C64x_PACKLH2_s1_rrr = 180, TMS320C64x_ROTL_m1_rir = 181, TMS320C64x_ROTL_m1_rrr = 182, TMS320C64x_SADD2_s4_rrr = 183, TMS320C64x_SADDU4_s4_rrr = 184, TMS320C64x_SADDUS2_s4_rrr = 185, TMS320C64x_SADD_l1_ipp = 186, TMS320C64x_SADD_l1_irr = 187, TMS320C64x_SADD_l1_rpp = 188, TMS320C64x_SADD_l1_rrr_x2 = 189, TMS320C64x_SADD_s1_rrr = 190, TMS320C64x_SAT_l1_pr = 191, TMS320C64x_SET_s15_riir = 192, TMS320C64x_SET_s1_rrr = 193, TMS320C64x_SHFL_m2_rr = 194, TMS320C64x_SHLMB_l1_rrr_x2 = 195, TMS320C64x_SHLMB_s4_rrr = 196, TMS320C64x_SHL_s1_pip = 197, TMS320C64x_SHL_s1_prp = 198, TMS320C64x_SHL_s1_rip = 199, TMS320C64x_SHL_s1_rir = 200, TMS320C64x_SHL_s1_rrp = 201, TMS320C64x_SHL_s1_rrr = 202, TMS320C64x_SHR2_s1_rir = 203, TMS320C64x_SHR2_s4_rrr = 204, TMS320C64x_SHRMB_l1_rrr_x2 = 205, TMS320C64x_SHRMB_s4_rrr = 206, TMS320C64x_SHRU2_s1_rir = 207, TMS320C64x_SHRU2_s4_rrr = 208, TMS320C64x_SHRU_s1_pip = 209, TMS320C64x_SHRU_s1_prp = 210, TMS320C64x_SHRU_s1_rir = 211, TMS320C64x_SHRU_s1_rrr = 212, TMS320C64x_SHR_s1_pip = 213, TMS320C64x_SHR_s1_prp = 214, TMS320C64x_SHR_s1_rir = 215, TMS320C64x_SHR_s1_rrr = 216, TMS320C64x_SMPY2_m1_rrp = 217, TMS320C64x_SMPYHL_m4_rrr = 218, TMS320C64x_SMPYH_m4_rrr = 219, TMS320C64x_SMPYLH_m4_rrr = 220, TMS320C64x_SMPY_m4_rrr = 221, TMS320C64x_SPACK2_s4_rrr = 222, TMS320C64x_SPACKU4_s4_rrr = 223, TMS320C64x_SSHL_s1_rir = 224, TMS320C64x_SSHL_s1_rrr = 225, TMS320C64x_SSHVL_m1_rrr = 226, TMS320C64x_SSHVR_m1_rrr = 227, TMS320C64x_SSUB_l1_ipp = 228, TMS320C64x_SSUB_l1_irr = 229, TMS320C64x_SSUB_l1_rrr_x1 = 230, TMS320C64x_SSUB_l1_rrr_x2 = 231, TMS320C64x_STB_d5_rm = 232, TMS320C64x_STB_d6_rm = 233, TMS320C64x_STDW_d7_pm = 234, TMS320C64x_STH_d5_rm = 235, TMS320C64x_STH_d6_rm = 236, TMS320C64x_STNDW_d8_pm = 237, TMS320C64x_STNW_d5_rm = 238, TMS320C64x_STW_d5_rm = 239, TMS320C64x_STW_d6_rm = 240, TMS320C64x_SUB2_d2_rrr = 241, TMS320C64x_SUB2_l1_rrr_x2 = 242, TMS320C64x_SUB2_s1_rrr = 243, TMS320C64x_SUB4_l1_rrr_x2 = 244, TMS320C64x_SUBABS4_l1_rrr_x2 = 245, TMS320C64x_SUBAB_d1_rir = 246, TMS320C64x_SUBAB_d1_rrr = 247, TMS320C64x_SUBAH_d1_rir = 248, TMS320C64x_SUBAH_d1_rrr = 249, TMS320C64x_SUBAW_d1_rir = 250, TMS320C64x_SUBAW_d1_rrr = 251, TMS320C64x_SUBC_l1_rrr_x2 = 252, TMS320C64x_SUBU_l1_rrp_x1 = 253, TMS320C64x_SUBU_l1_rrp_x2 = 254, TMS320C64x_SUB_d1_rir = 255, TMS320C64x_SUB_d1_rrr = 256, TMS320C64x_SUB_d2_rrr = 257, TMS320C64x_SUB_l1_ipp = 258, TMS320C64x_SUB_l1_irr = 259, TMS320C64x_SUB_l1_rrp_x1 = 260, TMS320C64x_SUB_l1_rrp_x2 = 261, TMS320C64x_SUB_l1_rrr_x1 = 262, TMS320C64x_SUB_l1_rrr_x2 = 263, TMS320C64x_SUB_s1_irr = 264, TMS320C64x_SUB_s1_rrr = 265, TMS320C64x_SUB_s4_rrr = 266, TMS320C64x_SWAP4_l2_rr = 267, TMS320C64x_UNPKHU4_l2_rr = 268, TMS320C64x_UNPKHU4_s14_rr = 269, TMS320C64x_UNPKLU4_l2_rr = 270, TMS320C64x_UNPKLU4_s14_rr = 271, TMS320C64x_XOR_d2_rir = 272, TMS320C64x_XOR_d2_rrr = 273, TMS320C64x_XOR_l1_irr = 274, TMS320C64x_XOR_l1_rrr_x2 = 275, TMS320C64x_XOR_s1_irr = 276, TMS320C64x_XOR_s1_rrr = 277, TMS320C64x_XPND2_m2_rr = 278, TMS320C64x_XPND4_m2_rr = 279, TMS320C64x_INSTRUCTION_LIST_END = 280 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc010066400017500001750000000223751363402546700235600ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { TMS320C64x_NoRegister, TMS320C64x_AMR = 1, TMS320C64x_CSR = 2, TMS320C64x_DIER = 3, TMS320C64x_DNUM = 4, TMS320C64x_ECR = 5, TMS320C64x_GFPGFR = 6, TMS320C64x_GPLYA = 7, TMS320C64x_GPLYB = 8, TMS320C64x_ICR = 9, TMS320C64x_IER = 10, TMS320C64x_IERR = 11, TMS320C64x_ILC = 12, TMS320C64x_IRP = 13, TMS320C64x_ISR = 14, TMS320C64x_ISTP = 15, TMS320C64x_ITSR = 16, TMS320C64x_NRP = 17, TMS320C64x_NTSR = 18, TMS320C64x_REP = 19, TMS320C64x_RILC = 20, TMS320C64x_SSR = 21, TMS320C64x_TSCH = 22, TMS320C64x_TSCL = 23, TMS320C64x_TSR = 24, TMS320C64x_A0 = 25, TMS320C64x_A1 = 26, TMS320C64x_A2 = 27, TMS320C64x_A3 = 28, TMS320C64x_A4 = 29, TMS320C64x_A5 = 30, TMS320C64x_A6 = 31, TMS320C64x_A7 = 32, TMS320C64x_A8 = 33, TMS320C64x_A9 = 34, TMS320C64x_A10 = 35, TMS320C64x_A11 = 36, TMS320C64x_A12 = 37, TMS320C64x_A13 = 38, TMS320C64x_A14 = 39, TMS320C64x_A15 = 40, TMS320C64x_A16 = 41, TMS320C64x_A17 = 42, TMS320C64x_A18 = 43, TMS320C64x_A19 = 44, TMS320C64x_A20 = 45, TMS320C64x_A21 = 46, TMS320C64x_A22 = 47, TMS320C64x_A23 = 48, TMS320C64x_A24 = 49, TMS320C64x_A25 = 50, TMS320C64x_A26 = 51, TMS320C64x_A27 = 52, TMS320C64x_A28 = 53, TMS320C64x_A29 = 54, TMS320C64x_A30 = 55, TMS320C64x_A31 = 56, TMS320C64x_B0 = 57, TMS320C64x_B1 = 58, TMS320C64x_B2 = 59, TMS320C64x_B3 = 60, TMS320C64x_B4 = 61, TMS320C64x_B5 = 62, TMS320C64x_B6 = 63, TMS320C64x_B7 = 64, TMS320C64x_B8 = 65, TMS320C64x_B9 = 66, TMS320C64x_B10 = 67, TMS320C64x_B11 = 68, TMS320C64x_B12 = 69, TMS320C64x_B13 = 70, TMS320C64x_B14 = 71, TMS320C64x_B15 = 72, TMS320C64x_B16 = 73, TMS320C64x_B17 = 74, TMS320C64x_B18 = 75, TMS320C64x_B19 = 76, TMS320C64x_B20 = 77, TMS320C64x_B21 = 78, TMS320C64x_B22 = 79, TMS320C64x_B23 = 80, TMS320C64x_B24 = 81, TMS320C64x_B25 = 82, TMS320C64x_B26 = 83, TMS320C64x_B27 = 84, TMS320C64x_B28 = 85, TMS320C64x_B29 = 86, TMS320C64x_B30 = 87, TMS320C64x_B31 = 88, TMS320C64x_PCE1 = 89, TMS320C64x_NUM_TARGET_REGS // 90 }; // Register classes enum { TMS320C64x_GPRegsRegClassID = 0, TMS320C64x_AFRegsRegClassID = 1, TMS320C64x_BFRegsRegClassID = 2, TMS320C64x_ControlRegsRegClassID = 3, }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static MCPhysReg TMS320C64xRegDiffLists[] = { /* 0 */ 65535, 0, }; static uint16_t TMS320C64xSubRegIdxLists[] = { /* 0 */ 0, }; static MCRegisterDesc TMS320C64xRegDesc[] = { // Descriptors { 3, 0, 0, 0, 0 }, { 310, 1, 1, 0, 1 }, { 319, 1, 1, 0, 1 }, { 298, 1, 1, 0, 1 }, { 268, 1, 1, 0, 1 }, { 290, 1, 1, 0, 1 }, { 303, 1, 1, 0, 1 }, { 241, 1, 1, 0, 1 }, { 247, 1, 1, 0, 1 }, { 294, 1, 1, 0, 1 }, { 299, 1, 1, 0, 1 }, { 314, 1, 1, 0, 1 }, { 254, 1, 1, 0, 1 }, { 277, 1, 1, 0, 1 }, { 323, 1, 1, 0, 1 }, { 285, 1, 1, 0, 1 }, { 331, 1, 1, 0, 1 }, { 281, 1, 1, 0, 1 }, { 336, 1, 1, 0, 1 }, { 273, 1, 1, 0, 1 }, { 253, 1, 1, 0, 1 }, { 327, 1, 1, 0, 1 }, { 258, 1, 1, 0, 1 }, { 263, 1, 1, 0, 1 }, { 332, 1, 1, 0, 1 }, { 24, 1, 1, 0, 1 }, { 54, 1, 1, 0, 1 }, { 81, 1, 1, 0, 1 }, { 103, 1, 1, 0, 1 }, { 125, 1, 1, 0, 1 }, { 147, 1, 1, 0, 1 }, { 169, 1, 1, 0, 1 }, { 191, 1, 1, 0, 1 }, { 213, 1, 1, 0, 1 }, { 235, 1, 1, 0, 1 }, { 0, 1, 1, 0, 1 }, { 30, 1, 1, 0, 1 }, { 65, 1, 1, 0, 1 }, { 87, 1, 1, 0, 1 }, { 109, 1, 1, 0, 1 }, { 131, 1, 1, 0, 1 }, { 153, 1, 1, 0, 1 }, { 175, 1, 1, 0, 1 }, { 197, 1, 1, 0, 1 }, { 219, 1, 1, 0, 1 }, { 8, 1, 1, 0, 1 }, { 38, 1, 1, 0, 1 }, { 73, 1, 1, 0, 1 }, { 95, 1, 1, 0, 1 }, { 117, 1, 1, 0, 1 }, { 139, 1, 1, 0, 1 }, { 161, 1, 1, 0, 1 }, { 183, 1, 1, 0, 1 }, { 205, 1, 1, 0, 1 }, { 227, 1, 1, 0, 1 }, { 16, 1, 1, 0, 1 }, { 46, 1, 1, 0, 1 }, { 27, 1, 1, 0, 1 }, { 57, 1, 1, 0, 1 }, { 84, 1, 1, 0, 1 }, { 106, 1, 1, 0, 1 }, { 128, 1, 1, 0, 1 }, { 150, 1, 1, 0, 1 }, { 172, 1, 1, 0, 1 }, { 194, 1, 1, 0, 1 }, { 216, 1, 1, 0, 1 }, { 238, 1, 1, 0, 1 }, { 4, 1, 1, 0, 1 }, { 34, 1, 1, 0, 1 }, { 69, 1, 1, 0, 1 }, { 91, 1, 1, 0, 1 }, { 113, 1, 1, 0, 1 }, { 135, 1, 1, 0, 1 }, { 157, 1, 1, 0, 1 }, { 179, 1, 1, 0, 1 }, { 201, 1, 1, 0, 1 }, { 223, 1, 1, 0, 1 }, { 12, 1, 1, 0, 1 }, { 42, 1, 1, 0, 1 }, { 77, 1, 1, 0, 1 }, { 99, 1, 1, 0, 1 }, { 121, 1, 1, 0, 1 }, { 143, 1, 1, 0, 1 }, { 165, 1, 1, 0, 1 }, { 187, 1, 1, 0, 1 }, { 209, 1, 1, 0, 1 }, { 231, 1, 1, 0, 1 }, { 20, 1, 1, 0, 1 }, { 50, 1, 1, 0, 1 }, { 60, 1, 1, 0, 1 }, }; // GPRegs Register Class... static MCPhysReg GPRegs[] = { TMS320C64x_A0, TMS320C64x_A1, TMS320C64x_A2, TMS320C64x_A3, TMS320C64x_A4, TMS320C64x_A5, TMS320C64x_A6, TMS320C64x_A7, TMS320C64x_A8, TMS320C64x_A9, TMS320C64x_A10, TMS320C64x_A11, TMS320C64x_A12, TMS320C64x_A13, TMS320C64x_A14, TMS320C64x_A15, TMS320C64x_A16, TMS320C64x_A17, TMS320C64x_A18, TMS320C64x_A19, TMS320C64x_A20, TMS320C64x_A21, TMS320C64x_A22, TMS320C64x_A23, TMS320C64x_A24, TMS320C64x_A25, TMS320C64x_A26, TMS320C64x_A27, TMS320C64x_A28, TMS320C64x_A29, TMS320C64x_A30, TMS320C64x_A31, TMS320C64x_B0, TMS320C64x_B1, TMS320C64x_B2, TMS320C64x_B3, TMS320C64x_B4, TMS320C64x_B5, TMS320C64x_B6, TMS320C64x_B7, TMS320C64x_B8, TMS320C64x_B9, TMS320C64x_B10, TMS320C64x_B11, TMS320C64x_B12, TMS320C64x_B13, TMS320C64x_B14, TMS320C64x_B15, TMS320C64x_B16, TMS320C64x_B17, TMS320C64x_B18, TMS320C64x_B19, TMS320C64x_B20, TMS320C64x_B21, TMS320C64x_B22, TMS320C64x_B23, TMS320C64x_B24, TMS320C64x_B25, TMS320C64x_B26, TMS320C64x_B27, TMS320C64x_B28, TMS320C64x_B29, TMS320C64x_B30, TMS320C64x_B31, }; // GPRegs Bit set. static uint8_t GPRegsBits[] = { 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, }; // AFRegs Register Class... static MCPhysReg AFRegs[] = { TMS320C64x_A0, TMS320C64x_A1, TMS320C64x_A2, TMS320C64x_A3, TMS320C64x_A4, TMS320C64x_A5, TMS320C64x_A6, TMS320C64x_A7, TMS320C64x_A8, TMS320C64x_A9, TMS320C64x_A10, TMS320C64x_A11, TMS320C64x_A12, TMS320C64x_A13, TMS320C64x_A14, TMS320C64x_A15, TMS320C64x_A16, TMS320C64x_A17, TMS320C64x_A18, TMS320C64x_A19, TMS320C64x_A20, TMS320C64x_A21, TMS320C64x_A22, TMS320C64x_A23, TMS320C64x_A24, TMS320C64x_A25, TMS320C64x_A26, TMS320C64x_A27, TMS320C64x_A28, TMS320C64x_A29, TMS320C64x_A30, TMS320C64x_A31, }; // AFRegs Bit set. static uint8_t AFRegsBits[] = { 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, }; // BFRegs Register Class... static MCPhysReg BFRegs[] = { TMS320C64x_B0, TMS320C64x_B1, TMS320C64x_B2, TMS320C64x_B3, TMS320C64x_B4, TMS320C64x_B5, TMS320C64x_B6, TMS320C64x_B7, TMS320C64x_B8, TMS320C64x_B9, TMS320C64x_B10, TMS320C64x_B11, TMS320C64x_B12, TMS320C64x_B13, TMS320C64x_B14, TMS320C64x_B15, TMS320C64x_B16, TMS320C64x_B17, TMS320C64x_B18, TMS320C64x_B19, TMS320C64x_B20, TMS320C64x_B21, TMS320C64x_B22, TMS320C64x_B23, TMS320C64x_B24, TMS320C64x_B25, TMS320C64x_B26, TMS320C64x_B27, TMS320C64x_B28, TMS320C64x_B29, TMS320C64x_B30, TMS320C64x_B31, }; // BFRegs Bit set. static uint8_t BFRegsBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, }; // ControlRegs Register Class... static MCPhysReg ControlRegs[] = { TMS320C64x_AMR, TMS320C64x_CSR, TMS320C64x_DIER, TMS320C64x_DNUM, TMS320C64x_ECR, TMS320C64x_GFPGFR, TMS320C64x_GPLYA, TMS320C64x_GPLYB, TMS320C64x_ICR, TMS320C64x_IER, TMS320C64x_IERR, TMS320C64x_ILC, TMS320C64x_IRP, TMS320C64x_ISR, TMS320C64x_ISTP, TMS320C64x_ITSR, TMS320C64x_NRP, TMS320C64x_NTSR, TMS320C64x_PCE1, TMS320C64x_REP, TMS320C64x_RILC, TMS320C64x_SSR, TMS320C64x_TSCH, TMS320C64x_TSCL, TMS320C64x_TSR, }; // ControlRegs Bit set. static uint8_t ControlRegsBits[] = { 0xfe, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, }; static MCRegisterClass TMS320C64xMCRegisterClasses[] = { { GPRegs, GPRegsBits, 64, sizeof(GPRegsBits), TMS320C64x_GPRegsRegClassID, 4, 4, 1, 1 }, { AFRegs, AFRegsBits, 32, sizeof(AFRegsBits), TMS320C64x_AFRegsRegClassID, 4, 4, 1, 1 }, { BFRegs, BFRegsBits, 32, sizeof(BFRegsBits), TMS320C64x_BFRegsRegClassID, 4, 4, 1, 1 }, { ControlRegs, ControlRegsBits, 25, sizeof(ControlRegsBits), TMS320C64x_ControlRegsRegClassID, 4, 4, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c010066400017500001750000000423671363403403300224500ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifdef CAPSTONE_HAS_TMS320C64X #ifdef _MSC_VER // Disable security warnings for strcpy #ifndef _CRT_SECURE_NO_WARNINGS #define _CRT_SECURE_NO_WARNINGS #endif // Banned API Usage : strcpy is a Banned API as listed in dontuse.h for // security purposes. #pragma warning(disable:28719) #endif #include #include #include "TMS320C64xInstPrinter.h" #include "../../MCInst.h" #include "../../utils.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../MathExtras.h" #include "TMS320C64xMapping.h" #include "capstone/tms320c64x.h" static char *getRegisterName(unsigned RegNo); static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static void printMemOperand(MCInst *MI, unsigned OpNo, SStream *O); static void printMemOperand2(MCInst *MI, unsigned OpNo, SStream *O); static void printRegPair(MCInst *MI, unsigned OpNo, SStream *O); void TMS320C64x_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) { SStream ss; char *p, *p2, tmp[8]; unsigned int unit = 0; int i; cs_tms320c64x *tms320c64x; if (mci->csh->detail) { tms320c64x = &mci->flat_insn->detail->tms320c64x; for (i = 0; i < insn->detail->groups_count; i++) { switch(insn->detail->groups[i]) { case TMS320C64X_GRP_FUNIT_D: unit = TMS320C64X_FUNIT_D; break; case TMS320C64X_GRP_FUNIT_L: unit = TMS320C64X_FUNIT_L; break; case TMS320C64X_GRP_FUNIT_M: unit = TMS320C64X_FUNIT_M; break; case TMS320C64X_GRP_FUNIT_S: unit = TMS320C64X_FUNIT_S; break; case TMS320C64X_GRP_FUNIT_NO: unit = TMS320C64X_FUNIT_NO; break; } if (unit != 0) break; } tms320c64x->funit.unit = unit; SStream_Init(&ss); if (tms320c64x->condition.reg != TMS320C64X_REG_INVALID) SStream_concat(&ss, "[%c%s]|", (tms320c64x->condition.zero == 1) ? '!' : '|', cs_reg_name(ud, tms320c64x->condition.reg)); p = strchr(insn_asm, '\t'); if (p != NULL) *p++ = '\0'; SStream_concat0(&ss, insn_asm); if ((p != NULL) && (((p2 = strchr(p, '[')) != NULL) || ((p2 = strchr(p, '(')) != NULL))) { while ((p2 > p) && ((*p2 != 'a') && (*p2 != 'b'))) p2--; if (p2 == p) { strcpy(insn_asm, "Invalid!"); return; } if (*p2 == 'a') strcpy(tmp, "1T"); else strcpy(tmp, "2T"); } else { tmp[0] = '\0'; } switch(tms320c64x->funit.unit) { case TMS320C64X_FUNIT_D: SStream_concat(&ss, ".D%s%u", tmp, tms320c64x->funit.side); break; case TMS320C64X_FUNIT_L: SStream_concat(&ss, ".L%s%u", tmp, tms320c64x->funit.side); break; case TMS320C64X_FUNIT_M: SStream_concat(&ss, ".M%s%u", tmp, tms320c64x->funit.side); break; case TMS320C64X_FUNIT_S: SStream_concat(&ss, ".S%s%u", tmp, tms320c64x->funit.side); break; } if (tms320c64x->funit.crosspath > 0) SStream_concat0(&ss, "X"); if (p != NULL) SStream_concat(&ss, "\t%s", p); if (tms320c64x->parallel != 0) SStream_concat(&ss, "\t||"); /* insn_asm is a buffer from an SStream, so there should be enough space */ strcpy(insn_asm, ss.buffer); } } #define PRINT_ALIAS_INSTR #include "TMS320C64xGenAsmWriter.inc" #define GET_INSTRINFO_ENUM #include "TMS320C64xGenInstrInfo.inc" static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); unsigned reg; if (MCOperand_isReg(Op)) { reg = MCOperand_getReg(Op); if ((MCInst_getOpcode(MI) == TMS320C64x_MVC_s1_rr) && (OpNo == 1)) { switch(reg) { case TMS320C64X_REG_EFR: SStream_concat0(O, "EFR"); break; case TMS320C64X_REG_IFR: SStream_concat0(O, "IFR"); break; default: SStream_concat0(O, getRegisterName(reg)); break; } } else { SStream_concat0(O, getRegisterName(reg)); } if (MI->csh->detail) { MI->flat_insn->detail->tms320c64x.operands[MI->flat_insn->detail->tms320c64x.op_count].type = TMS320C64X_OP_REG; MI->flat_insn->detail->tms320c64x.operands[MI->flat_insn->detail->tms320c64x.op_count].reg = reg; MI->flat_insn->detail->tms320c64x.op_count++; } } else if (MCOperand_isImm(Op)) { int64_t Imm = MCOperand_getImm(Op); if (Imm >= 0) { if (Imm > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, Imm); else SStream_concat(O, "%"PRIu64, Imm); } else { if (Imm < -HEX_THRESHOLD) SStream_concat(O, "-0x%"PRIx64, -Imm); else SStream_concat(O, "-%"PRIu64, -Imm); } if (MI->csh->detail) { MI->flat_insn->detail->tms320c64x.operands[MI->flat_insn->detail->tms320c64x.op_count].type = TMS320C64X_OP_IMM; MI->flat_insn->detail->tms320c64x.operands[MI->flat_insn->detail->tms320c64x.op_count].imm = Imm; MI->flat_insn->detail->tms320c64x.op_count++; } } } static void printMemOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); int64_t Val = MCOperand_getImm(Op); unsigned scaled, base, offset, mode, unit; cs_tms320c64x *tms320c64x; char st, nd; scaled = (Val >> 19) & 1; base = (Val >> 12) & 0x7f; offset = (Val >> 5) & 0x7f; mode = (Val >> 1) & 0xf; unit = Val & 1; if (scaled) { st = '['; nd = ']'; } else { st = '('; nd = ')'; } switch(mode) { case 0: SStream_concat(O, "*-%s%c%u%c", getRegisterName(base), st, offset, nd); break; case 1: SStream_concat(O, "*+%s%c%u%c", getRegisterName(base), st, offset, nd); break; case 4: SStream_concat(O, "*-%s%c%s%c", getRegisterName(base), st, getRegisterName(offset), nd); break; case 5: SStream_concat(O, "*+%s%c%s%c", getRegisterName(base), st, getRegisterName(offset), nd); break; case 8: SStream_concat(O, "*--%s%c%u%c", getRegisterName(base), st, offset, nd); break; case 9: SStream_concat(O, "*++%s%c%u%c", getRegisterName(base), st, offset, nd); break; case 10: SStream_concat(O, "*%s--%c%u%c", getRegisterName(base), st, offset, nd); break; case 11: SStream_concat(O, "*%s++%c%u%c", getRegisterName(base), st, offset, nd); break; case 12: SStream_concat(O, "*--%s%c%s%c", getRegisterName(base), st, getRegisterName(offset), nd); break; case 13: SStream_concat(O, "*++%s%c%s%c", getRegisterName(base), st, getRegisterName(offset), nd); break; case 14: SStream_concat(O, "*%s--%c%s%c", getRegisterName(base), st, getRegisterName(offset), nd); break; case 15: SStream_concat(O, "*%s++%c%s%c", getRegisterName(base), st, getRegisterName(offset), nd); break; } if (MI->csh->detail) { tms320c64x = &MI->flat_insn->detail->tms320c64x; tms320c64x->operands[tms320c64x->op_count].type = TMS320C64X_OP_MEM; tms320c64x->operands[tms320c64x->op_count].mem.base = base; tms320c64x->operands[tms320c64x->op_count].mem.disp = offset; tms320c64x->operands[tms320c64x->op_count].mem.unit = unit + 1; tms320c64x->operands[tms320c64x->op_count].mem.scaled = scaled; switch(mode) { case 0: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_BW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_NO; break; case 1: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_NO; break; case 4: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_REGISTER; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_BW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_NO; break; case 5: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_REGISTER; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_NO; break; case 8: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_BW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_PRE; break; case 9: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_PRE; break; case 10: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_BW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_POST; break; case 11: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_POST; break; case 12: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_REGISTER; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_BW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_PRE; break; case 13: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_REGISTER; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_PRE; break; case 14: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_REGISTER; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_BW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_POST; break; case 15: tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_REGISTER; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_POST; break; } tms320c64x->op_count++; } } static void printMemOperand2(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); int64_t Val = MCOperand_getImm(Op); uint16_t offset; unsigned basereg; cs_tms320c64x *tms320c64x; basereg = Val & 0x7f; offset = (Val >> 7) & 0x7fff; SStream_concat(O, "*+%s[0x%x]", getRegisterName(basereg), offset); if (MI->csh->detail) { tms320c64x = &MI->flat_insn->detail->tms320c64x; tms320c64x->operands[tms320c64x->op_count].type = TMS320C64X_OP_MEM; tms320c64x->operands[tms320c64x->op_count].mem.base = basereg; tms320c64x->operands[tms320c64x->op_count].mem.unit = 2; tms320c64x->operands[tms320c64x->op_count].mem.disp = offset; tms320c64x->operands[tms320c64x->op_count].mem.disptype = TMS320C64X_MEM_DISP_CONSTANT; tms320c64x->operands[tms320c64x->op_count].mem.direction = TMS320C64X_MEM_DIR_FW; tms320c64x->operands[tms320c64x->op_count].mem.modify = TMS320C64X_MEM_MOD_NO; tms320c64x->op_count++; } } static void printRegPair(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); unsigned reg = MCOperand_getReg(Op); cs_tms320c64x *tms320c64x; SStream_concat(O, "%s:%s", getRegisterName(reg + 1), getRegisterName(reg)); if (MI->csh->detail) { tms320c64x = &MI->flat_insn->detail->tms320c64x; tms320c64x->operands[tms320c64x->op_count].type = TMS320C64X_OP_REGPAIR; tms320c64x->operands[tms320c64x->op_count].reg = reg; tms320c64x->op_count++; } } static bool printAliasInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { unsigned opcode = MCInst_getOpcode(MI); MCOperand *op; switch(opcode) { /* ADD.Dx -i, x, y -> SUB.Dx x, i, y */ case TMS320C64x_ADD_d2_rir: /* ADD.L -i, x, y -> SUB.L x, i, y */ case TMS320C64x_ADD_l1_irr: case TMS320C64x_ADD_l1_ipp: /* ADD.S -i, x, y -> SUB.S x, i, y */ case TMS320C64x_ADD_s1_irr: if ((MCInst_getNumOperands(MI) == 3) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && (MCOperand_getImm(MCInst_getOperand(MI, 2)) < 0)) { MCInst_setOpcodePub(MI, TMS320C64X_INS_SUB); op = MCInst_getOperand(MI, 2); MCOperand_setImm(op, -MCOperand_getImm(op)); SStream_concat0(O, "SUB\t"); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* ADD.D 0, x, y -> MV.D x, y */ case TMS320C64x_ADD_d1_rir: /* OR.D x, 0, y -> MV.D x, y */ case TMS320C64x_OR_d2_rir: /* ADD.L 0, x, y -> MV.L x, y */ case TMS320C64x_ADD_l1_irr: case TMS320C64x_ADD_l1_ipp: /* OR.L 0, x, y -> MV.L x, y */ case TMS320C64x_OR_l1_irr: /* ADD.S 0, x, y -> MV.S x, y */ case TMS320C64x_ADD_s1_irr: /* OR.S 0, x, y -> MV.S x, y */ case TMS320C64x_OR_s1_irr: if ((MCInst_getNumOperands(MI) == 3) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && (MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0)) { MCInst_setOpcodePub(MI, TMS320C64X_INS_MV); MI->size--; SStream_concat0(O, "MV\t"); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* XOR.D -1, x, y -> NOT.D x, y */ case TMS320C64x_XOR_d2_rir: /* XOR.L -1, x, y -> NOT.L x, y */ case TMS320C64x_XOR_l1_irr: /* XOR.S -1, x, y -> NOT.S x, y */ case TMS320C64x_XOR_s1_irr: if ((MCInst_getNumOperands(MI) == 3) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && (MCOperand_getImm(MCInst_getOperand(MI, 2)) == -1)) { MCInst_setOpcodePub(MI, TMS320C64X_INS_NOT); MI->size--; SStream_concat0(O, "NOT\t"); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* MVK.D 0, x -> ZERO.D x */ case TMS320C64x_MVK_d1_rr: /* MVK.L 0, x -> ZERO.L x */ case TMS320C64x_MVK_l2_ir: if ((MCInst_getNumOperands(MI) == 2) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isImm(MCInst_getOperand(MI, 1)) && (MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0)) { MCInst_setOpcodePub(MI, TMS320C64X_INS_ZERO); MI->size--; SStream_concat0(O, "ZERO\t"); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* SUB.L x, x, y -> ZERO.L y */ case TMS320C64x_SUB_l1_rrp_x1: /* SUB.S x, x, y -> ZERO.S y */ case TMS320C64x_SUB_s1_rrr: if ((MCInst_getNumOperands(MI) == 3) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && (MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 2)))) { MCInst_setOpcodePub(MI, TMS320C64X_INS_ZERO); MI->size -= 2; SStream_concat0(O, "ZERO\t"); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* SUB.L 0, x, y -> NEG.L x, y */ case TMS320C64x_SUB_l1_irr: case TMS320C64x_SUB_l1_ipp: /* SUB.S 0, x, y -> NEG.S x, y */ case TMS320C64x_SUB_s1_irr: if ((MCInst_getNumOperands(MI) == 3) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_isImm(MCInst_getOperand(MI, 2)) && (MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0)) { MCInst_setOpcodePub(MI, TMS320C64X_INS_NEG); MI->size--; SStream_concat0(O, "NEG\t"); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* PACKLH2.L x, x, y -> SWAP2.L x, y */ case TMS320C64x_PACKLH2_l1_rrr_x2: /* PACKLH2.S x, x, y -> SWAP2.S x, y */ case TMS320C64x_PACKLH2_s1_rrr: if ((MCInst_getNumOperands(MI) == 3) && MCOperand_isReg(MCInst_getOperand(MI, 0)) && MCOperand_isReg(MCInst_getOperand(MI, 1)) && MCOperand_isReg(MCInst_getOperand(MI, 2)) && (MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 2)))) { MCInst_setOpcodePub(MI, TMS320C64X_INS_SWAP2); MI->size--; SStream_concat0(O, "SWAP2\t"); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return true; } break; } switch(opcode) { /* NOP 16 -> IDLE */ /* NOP 1 -> NOP */ case TMS320C64x_NOP_n: if ((MCInst_getNumOperands(MI) == 1) && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getReg(MCInst_getOperand(MI, 0)) == 16)) { MCInst_setOpcodePub(MI, TMS320C64X_INS_IDLE); MI->size--; SStream_concat0(O, "IDLE"); return true; } if ((MCInst_getNumOperands(MI) == 1) && MCOperand_isImm(MCInst_getOperand(MI, 0)) && (MCOperand_getReg(MCInst_getOperand(MI, 0)) == 1)) { MI->size--; SStream_concat0(O, "NOP"); return true; } break; } return false; } void TMS320C64x_printInst(MCInst *MI, SStream *O, void *Info) { if (!printAliasInstruction(MI, O, Info)) printInstruction(MI, O, Info); } #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h010066400017500001750000000006321363402546700224550ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifndef CS_TMS320C64XINSTPRINTER_H #define CS_TMS320C64XINSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void TMS320C64x_printInst(MCInst *MI, SStream *O, void *Info); void TMS320C64x_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xMapping.c010066400017500001750000001313241363402546700215650ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifdef CAPSTONE_HAS_TMS320C64X #include // debug #include #include "../../utils.h" #include "TMS320C64xMapping.h" #define GET_INSTRINFO_ENUM #include "TMS320C64xGenInstrInfo.inc" static name_map reg_name_maps[] = { { TMS320C64X_REG_INVALID, NULL }, { TMS320C64X_REG_AMR, "amr" }, { TMS320C64X_REG_CSR, "csr" }, { TMS320C64X_REG_DIER, "dier" }, { TMS320C64X_REG_DNUM, "dnum" }, { TMS320C64X_REG_ECR, "ecr" }, { TMS320C64X_REG_GFPGFR, "gfpgfr" }, { TMS320C64X_REG_GPLYA, "gplya" }, { TMS320C64X_REG_GPLYB, "gplyb" }, { TMS320C64X_REG_ICR, "icr" }, { TMS320C64X_REG_IER, "ier" }, { TMS320C64X_REG_IERR, "ierr" }, { TMS320C64X_REG_ILC, "ilc" }, { TMS320C64X_REG_IRP, "irp" }, { TMS320C64X_REG_ISR, "isr" }, { TMS320C64X_REG_ISTP, "istp" }, { TMS320C64X_REG_ITSR, "itsr" }, { TMS320C64X_REG_NRP, "nrp" }, { TMS320C64X_REG_NTSR, "ntsr" }, { TMS320C64X_REG_REP, "rep" }, { TMS320C64X_REG_RILC, "rilc" }, { TMS320C64X_REG_SSR, "ssr" }, { TMS320C64X_REG_TSCH, "tsch" }, { TMS320C64X_REG_TSCL, "tscl" }, { TMS320C64X_REG_TSR, "tsr" }, { TMS320C64X_REG_A0, "a0" }, { TMS320C64X_REG_A1, "a1" }, { TMS320C64X_REG_A2, "a2" }, { TMS320C64X_REG_A3, "a3" }, { TMS320C64X_REG_A4, "a4" }, { TMS320C64X_REG_A5, "a5" }, { TMS320C64X_REG_A6, "a6" }, { TMS320C64X_REG_A7, "a7" }, { TMS320C64X_REG_A8, "a8" }, { TMS320C64X_REG_A9, "a9" }, { TMS320C64X_REG_A10, "a10" }, { TMS320C64X_REG_A11, "a11" }, { TMS320C64X_REG_A12, "a12" }, { TMS320C64X_REG_A13, "a13" }, { TMS320C64X_REG_A14, "a14" }, { TMS320C64X_REG_A15, "a15" }, { TMS320C64X_REG_A16, "a16" }, { TMS320C64X_REG_A17, "a17" }, { TMS320C64X_REG_A18, "a18" }, { TMS320C64X_REG_A19, "a19" }, { TMS320C64X_REG_A20, "a20" }, { TMS320C64X_REG_A21, "a21" }, { TMS320C64X_REG_A22, "a22" }, { TMS320C64X_REG_A23, "a23" }, { TMS320C64X_REG_A24, "a24" }, { TMS320C64X_REG_A25, "a25" }, { TMS320C64X_REG_A26, "a26" }, { TMS320C64X_REG_A27, "a27" }, { TMS320C64X_REG_A28, "a28" }, { TMS320C64X_REG_A29, "a29" }, { TMS320C64X_REG_A30, "a30" }, { TMS320C64X_REG_A31, "a31" }, { TMS320C64X_REG_B0, "b0" }, { TMS320C64X_REG_B1, "b1" }, { TMS320C64X_REG_B2, "b2" }, { TMS320C64X_REG_B3, "b3" }, { TMS320C64X_REG_B4, "b4" }, { TMS320C64X_REG_B5, "b5" }, { TMS320C64X_REG_B6, "b6" }, { TMS320C64X_REG_B7, "b7" }, { TMS320C64X_REG_B8, "b8" }, { TMS320C64X_REG_B9, "b9" }, { TMS320C64X_REG_B10, "b10" }, { TMS320C64X_REG_B11, "b11" }, { TMS320C64X_REG_B12, "b12" }, { TMS320C64X_REG_B13, "b13" }, { TMS320C64X_REG_B14, "b14" }, { TMS320C64X_REG_B15, "b15" }, { TMS320C64X_REG_B16, "b16" }, { TMS320C64X_REG_B17, "b17" }, { TMS320C64X_REG_B18, "b18" }, { TMS320C64X_REG_B19, "b19" }, { TMS320C64X_REG_B20, "b20" }, { TMS320C64X_REG_B21, "b21" }, { TMS320C64X_REG_B22, "b22" }, { TMS320C64X_REG_B23, "b23" }, { TMS320C64X_REG_B24, "b24" }, { TMS320C64X_REG_B25, "b25" }, { TMS320C64X_REG_B26, "b26" }, { TMS320C64X_REG_B27, "b27" }, { TMS320C64X_REG_B28, "b28" }, { TMS320C64X_REG_B29, "b29" }, { TMS320C64X_REG_B30, "b30" }, { TMS320C64X_REG_B31, "b31" }, { TMS320C64X_REG_PCE1, "pce1" }, }; const char *TMS320C64x_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } tms320c64x_reg TMS320C64x_reg_id(char *name) { int i; for(i = 1; i < ARR_SIZE(reg_name_maps); i++) { if (!strcmp(name, reg_name_maps[i].name)) return reg_name_maps[i].id; } return 0; } static insn_map insns[] = { { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { TMS320C64x_ABS2_l2_rr, TMS320C64X_INS_ABS2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ABS_l1_pp, TMS320C64X_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ABS_l1_rr, TMS320C64X_INS_ABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD2_d2_rrr, TMS320C64X_INS_ADD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADD2_l1_rrr_x2, TMS320C64X_INS_ADD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD2_s1_rrr, TMS320C64X_INS_ADD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_ADD4_l1_rrr_x2, TMS320C64X_INS_ADD4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAB_d1_rir, TMS320C64X_INS_ADDAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAB_d1_rrr, TMS320C64X_INS_ADDAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAD_d1_rir, TMS320C64X_INS_ADDAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAD_d1_rrr, TMS320C64X_INS_ADDAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAH_d1_rir, TMS320C64X_INS_ADDAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAH_d1_rrr, TMS320C64X_INS_ADDAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAW_d1_rir, TMS320C64X_INS_ADDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDAW_d1_rrr, TMS320C64X_INS_ADDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADDKPC_s3_iir, TMS320C64X_INS_ADDKPC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_ADDK_s2_ir, TMS320C64X_INS_ADDK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_ADDU_l1_rpp, TMS320C64X_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADDU_l1_rrp_x2, TMS320C64X_INS_ADDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_d1_rir, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_d1_rrr, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_d2_rir, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_d2_rrr, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_l1_ipp, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_l1_irr, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_l1_rpp, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_l1_rrp_x2, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_l1_rrr_x2, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_s1_irr, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_ADD_s1_rrr, TMS320C64X_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_ANDN_d2_rrr, TMS320C64X_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_ANDN_l1_rrr_x2, TMS320C64X_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_ANDN_s4_rrr, TMS320C64X_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_AND_d2_rir, TMS320C64X_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_AND_d2_rrr, TMS320C64X_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_AND_l1_irr, TMS320C64X_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_AND_l1_rrr_x2, TMS320C64X_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_AND_s1_irr, TMS320C64X_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_AND_s1_rrr, TMS320C64X_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_AVG2_m1_rrr, TMS320C64X_INS_AVG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_AVGU4_m1_rrr, TMS320C64X_INS_AVGU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_BDEC_s8_ir, TMS320C64X_INS_BDEC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_BITC4_m2_rr, TMS320C64X_INS_BITC4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_BNOP_s10_ri, TMS320C64X_INS_BNOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_BNOP_s9_ii, TMS320C64X_INS_BNOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_BPOS_s8_ir, TMS320C64X_INS_BPOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_B_s5_i, TMS320C64X_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_B_s6_r, TMS320C64X_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_B_s7_irp, TMS320C64X_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_B_s7_nrp, TMS320C64X_INS_B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 1, 0 #endif }, { TMS320C64x_CLR_s15_riir, TMS320C64X_INS_CLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_CLR_s1_rrr, TMS320C64X_INS_CLR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_CMPEQ2_s1_rrr, TMS320C64X_INS_CMPEQ2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_CMPEQ4_s1_rrr, TMS320C64X_INS_CMPEQ4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_CMPEQ_l1_ipr, TMS320C64X_INS_CMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPEQ_l1_irr, TMS320C64X_INS_CMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPEQ_l1_rpr, TMS320C64X_INS_CMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPEQ_l1_rrr_x2, TMS320C64X_INS_CMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPGT2_s1_rrr, TMS320C64X_INS_CMPGT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_CMPGTU4_s1_rrr, TMS320C64X_INS_CMPGTU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_CMPGT_l1_ipr, TMS320C64X_INS_CMPGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPGT_l1_irr, TMS320C64X_INS_CMPGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPGT_l1_rpr, TMS320C64X_INS_CMPGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPGT_l1_rrr_x2, TMS320C64X_INS_CMPGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLTU_l1_ipr, TMS320C64X_INS_CMPLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLTU_l1_irr, TMS320C64X_INS_CMPLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLTU_l1_rpr, TMS320C64X_INS_CMPLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLTU_l1_rrr_x2, TMS320C64X_INS_CMPLTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLT_l1_ipr, TMS320C64X_INS_CMPLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLT_l1_irr, TMS320C64X_INS_CMPLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLT_l1_rpr, TMS320C64X_INS_CMPLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_CMPLT_l1_rrr_x2, TMS320C64X_INS_CMPLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_DEAL_m2_rr, TMS320C64X_INS_DEAL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTP2_m1_rrp, TMS320C64X_INS_DOTP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTP2_m1_rrr, TMS320C64X_INS_DOTP2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTPN2_m1_rrr, TMS320C64X_INS_DOTPN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTPNRSU2_m1_rrr, TMS320C64X_INS_DOTPNRSU2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTPRSU2_m1_rrr, TMS320C64X_INS_DOTPRSU2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTPSU4_m1_rrr, TMS320C64X_INS_DOTPSU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_DOTPU4_m1_rrr, TMS320C64X_INS_DOTPU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_EXTU_s15_riir, TMS320C64X_INS_EXTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_EXTU_s1_rrr, TMS320C64X_INS_EXTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_EXT_s15_riir, TMS320C64X_INS_EXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_EXT_s1_rrr, TMS320C64X_INS_EXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_GMPGTU_l1_ipr, TMS320C64X_INS_GMPGTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_GMPGTU_l1_irr, TMS320C64X_INS_GMPGTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_GMPGTU_l1_rpr, TMS320C64X_INS_GMPGTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_GMPGTU_l1_rrr_x2, TMS320C64X_INS_GMPGTU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_GMPY4_m1_rrr, TMS320C64X_INS_GMPY4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_LDBU_d5_mr, TMS320C64X_INS_LDBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDBU_d6_mr, TMS320C64X_INS_LDBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDB_d5_mr, TMS320C64X_INS_LDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDB_d6_mr, TMS320C64X_INS_LDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDDW_d7_mp, TMS320C64X_INS_LDDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDHU_d5_mr, TMS320C64X_INS_LDHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDHU_d6_mr, TMS320C64X_INS_LDHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDH_d5_mr, TMS320C64X_INS_LDH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDH_d6_mr, TMS320C64X_INS_LDH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDNDW_d8_mp, TMS320C64X_INS_LDNDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDNW_d5_mr, TMS320C64X_INS_LDNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDW_d5_mr, TMS320C64X_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LDW_d6_mr, TMS320C64X_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_LMBD_l1_irr, TMS320C64X_INS_LMBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_LMBD_l1_rrr_x2, TMS320C64X_INS_LMBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_MAX2_l1_rrr_x2, TMS320C64X_INS_MAX2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_MAXU4_l1_rrr_x2, TMS320C64X_INS_MAXU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_MIN2_l1_rrr_x2, TMS320C64X_INS_MIN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_MINU4_l1_rrr_x2, TMS320C64X_INS_MINU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_MPY2_m1_rrp, TMS320C64X_INS_MPY2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHIR_m1_rrr, TMS320C64X_INS_MPYHIR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHI_m1_rrp, TMS320C64X_INS_MPYHI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHLU_m4_rrr, TMS320C64X_INS_MPYHLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHL_m4_rrr, TMS320C64X_INS_MPYHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHSLU_m4_rrr, TMS320C64X_INS_MPYHSLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHSU_m4_rrr, TMS320C64X_INS_MPYHSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHULS_m4_rrr, TMS320C64X_INS_MPYHULS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHUS_m4_rrr, TMS320C64X_INS_MPYHUS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYHU_m4_rrr, TMS320C64X_INS_MPYHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYH_m4_rrr, TMS320C64X_INS_MPYH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYLHU_m4_rrr, TMS320C64X_INS_MPYLHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYLH_m4_rrr, TMS320C64X_INS_MPYLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYLIR_m1_rrr, TMS320C64X_INS_MPYLIR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYLI_m1_rrp, TMS320C64X_INS_MPYLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYLSHU_m4_rrr, TMS320C64X_INS_MPYLSHU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYLUHS_m4_rrr, TMS320C64X_INS_MPYLUHS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYSU4_m1_rrp, TMS320C64X_INS_MPYSU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYSU_m4_irr, TMS320C64X_INS_MPYSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYSU_m4_rrr, TMS320C64X_INS_MPYSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYU4_m1_rrp, TMS320C64X_INS_MPYU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYUS_m4_rrr, TMS320C64X_INS_MPYUS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPYU_m4_rrr, TMS320C64X_INS_MPYU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPY_m4_irr, TMS320C64X_INS_MPY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MPY_m4_rrr, TMS320C64X_INS_MPY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MVC_s1_rr, TMS320C64X_INS_MVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_MVC_s1_rr2, TMS320C64X_INS_MVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_MVD_m2_rr, TMS320C64X_INS_MVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_MVKLH_s12_ir, TMS320C64X_INS_MVKLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_MVKL_s12_ir, TMS320C64X_INS_MVKL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_MVK_d1_rr, TMS320C64X_INS_MVK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_MVK_l2_ir, TMS320C64X_INS_MVK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_NOP_n, TMS320C64X_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_NO, 0 }, 0, 0 #endif }, { TMS320C64x_NORM_l1_pr, TMS320C64X_INS_NORM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_NORM_l1_rr, TMS320C64X_INS_NORM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_OR_d2_rir, TMS320C64X_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_OR_d2_rrr, TMS320C64X_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_OR_l1_irr, TMS320C64X_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_OR_l1_rrr_x2, TMS320C64X_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_OR_s1_irr, TMS320C64X_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_OR_s1_rrr, TMS320C64X_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_PACK2_l1_rrr_x2, TMS320C64X_INS_PACK2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_PACK2_s4_rrr, TMS320C64X_INS_PACK2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_PACKH2_l1_rrr_x2, TMS320C64X_INS_PACKH2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_PACKH2_s1_rrr, TMS320C64X_INS_PACKH2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_PACKH4_l1_rrr_x2, TMS320C64X_INS_PACKH4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_PACKHL2_l1_rrr_x2, TMS320C64X_INS_PACKHL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_PACKHL2_s1_rrr, TMS320C64X_INS_PACKHL2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_PACKL4_l1_rrr_x2, TMS320C64X_INS_PACKL4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_PACKLH2_l1_rrr_x2, TMS320C64X_INS_PACKLH2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_PACKLH2_s1_rrr, TMS320C64X_INS_PACKLH2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_ROTL_m1_rir, TMS320C64X_INS_ROTL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_ROTL_m1_rrr, TMS320C64X_INS_ROTL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SADD2_s4_rrr, TMS320C64X_INS_SADD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SADDU4_s4_rrr, TMS320C64X_INS_SADDU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SADDUS2_s4_rrr, TMS320C64X_INS_SADDUS2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SADD_l1_ipp, TMS320C64X_INS_SADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SADD_l1_irr, TMS320C64X_INS_SADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SADD_l1_rpp, TMS320C64X_INS_SADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SADD_l1_rrr_x2, TMS320C64X_INS_SADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SADD_s1_rrr, TMS320C64X_INS_SADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SAT_l1_pr, TMS320C64X_INS_SAT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SET_s15_riir, TMS320C64X_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SET_s1_rrr, TMS320C64X_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHFL_m2_rr, TMS320C64X_INS_SHFL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SHLMB_l1_rrr_x2, TMS320C64X_INS_SHLMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SHLMB_s4_rrr, TMS320C64X_INS_SHLMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHL_s1_pip, TMS320C64X_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHL_s1_prp, TMS320C64X_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHL_s1_rip, TMS320C64X_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHL_s1_rir, TMS320C64X_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHL_s1_rrp, TMS320C64X_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHL_s1_rrr, TMS320C64X_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHR2_s1_rir, TMS320C64X_INS_SHR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHR2_s4_rrr, TMS320C64X_INS_SHR2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRMB_l1_rrr_x2, TMS320C64X_INS_SHRMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SHRMB_s4_rrr, TMS320C64X_INS_SHRMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRU2_s1_rir, TMS320C64X_INS_SHRU2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRU2_s4_rrr, TMS320C64X_INS_SHRU2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRU_s1_pip, TMS320C64X_INS_SHRU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRU_s1_prp, TMS320C64X_INS_SHRU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRU_s1_rir, TMS320C64X_INS_SHRU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHRU_s1_rrr, TMS320C64X_INS_SHRU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHR_s1_pip, TMS320C64X_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHR_s1_prp, TMS320C64X_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHR_s1_rir, TMS320C64X_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SHR_s1_rrr, TMS320C64X_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SMPY2_m1_rrp, TMS320C64X_INS_SMPY2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SMPYHL_m4_rrr, TMS320C64X_INS_SMPYHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SMPYH_m4_rrr, TMS320C64X_INS_SMPYH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SMPYLH_m4_rrr, TMS320C64X_INS_SMPYLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SMPY_m4_rrr, TMS320C64X_INS_SMPY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SPACK2_s4_rrr, TMS320C64X_INS_SPACK2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SPACKU4_s4_rrr, TMS320C64X_INS_SPACKU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SSHL_s1_rir, TMS320C64X_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SSHL_s1_rrr, TMS320C64X_INS_SSHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SSHVL_m1_rrr, TMS320C64X_INS_SSHVL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SSHVR_m1_rrr, TMS320C64X_INS_SSHVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_SSUB_l1_ipp, TMS320C64X_INS_SSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SSUB_l1_irr, TMS320C64X_INS_SSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SSUB_l1_rrr_x1, TMS320C64X_INS_SSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SSUB_l1_rrr_x2, TMS320C64X_INS_SSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_STB_d5_rm, TMS320C64X_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STB_d6_rm, TMS320C64X_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STDW_d7_pm, TMS320C64X_INS_STDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STH_d5_rm, TMS320C64X_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STH_d6_rm, TMS320C64X_INS_STH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STNDW_d8_pm, TMS320C64X_INS_STNDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STNW_d5_rm, TMS320C64X_INS_STNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STW_d5_rm, TMS320C64X_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_STW_d6_rm, TMS320C64X_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUB2_d2_rrr, TMS320C64X_INS_SUB2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUB2_l1_rrr_x2, TMS320C64X_INS_SUB2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB2_s1_rrr, TMS320C64X_INS_SUB2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SUB4_l1_rrr_x2, TMS320C64X_INS_SUB4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUBABS4_l1_rrr_x2, TMS320C64X_INS_SUBABS4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUBAB_d1_rir, TMS320C64X_INS_SUBAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUBAB_d1_rrr, TMS320C64X_INS_SUBAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUBAH_d1_rir, TMS320C64X_INS_SUBAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUBAH_d1_rrr, TMS320C64X_INS_SUBAH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUBAW_d1_rir, TMS320C64X_INS_SUBAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUBAW_d1_rrr, TMS320C64X_INS_SUBAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUBC_l1_rrr_x2, TMS320C64X_INS_SUBC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUBU_l1_rrp_x1, TMS320C64X_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUBU_l1_rrp_x2, TMS320C64X_INS_SUBU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_d1_rir, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_d1_rrr, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_d2_rrr, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_l1_ipp, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_l1_irr, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_l1_rrp_x1, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_l1_rrp_x2, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_l1_rrr_x1, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_l1_rrr_x2, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_s1_irr, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_s1_rrr, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SUB_s4_rrr, TMS320C64X_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_SWAP4_l2_rr, TMS320C64X_INS_SWAP4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_UNPKHU4_l2_rr, TMS320C64X_INS_UNPKHU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_UNPKHU4_s14_rr, TMS320C64X_INS_UNPKHU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_UNPKLU4_l2_rr, TMS320C64X_INS_UNPKLU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_UNPKLU4_s14_rr, TMS320C64X_INS_UNPKLU4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_XOR_d2_rir, TMS320C64X_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_XOR_d2_rrr, TMS320C64X_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_D, 0 }, 0, 0 #endif }, { TMS320C64x_XOR_l1_irr, TMS320C64X_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_XOR_l1_rrr_x2, TMS320C64X_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_L, 0 }, 0, 0 #endif }, { TMS320C64x_XOR_s1_irr, TMS320C64X_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_XOR_s1_rrr, TMS320C64X_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_S, 0 }, 0, 0 #endif }, { TMS320C64x_XPND2_m2_rr, TMS320C64X_INS_XPND2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, { TMS320C64x_XPND4_m2_rr, TMS320C64X_INS_XPND4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { TMS320C64X_GRP_FUNIT_M, 0 }, 0, 0 #endif }, }; void TMS320C64x_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { unsigned short i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { insn->detail->groups[insn->detail->groups_count] = TMS320C64X_GRP_JUMP; insn->detail->groups_count++; } #endif } } } #ifndef CAPSTONE_DIET //grep TMS320C64X_INS include/capstone/tms320c64x.h | awk '{print "{"$1 "\""tolower(substr($1, 16, length($1)-16))"\"""},"}' static name_map insn_name_maps[] = { {TMS320C64X_INS_INVALID, NULL}, {TMS320C64X_INS_ABS, "abs"}, {TMS320C64X_INS_ABS2, "abs2"}, {TMS320C64X_INS_ADD, "add"}, {TMS320C64X_INS_ADD2, "add2"}, {TMS320C64X_INS_ADD4, "add4"}, {TMS320C64X_INS_ADDAB, "addab"}, {TMS320C64X_INS_ADDAD, "addad"}, {TMS320C64X_INS_ADDAH, "addah"}, {TMS320C64X_INS_ADDAW, "addaw"}, {TMS320C64X_INS_ADDK, "addk"}, {TMS320C64X_INS_ADDKPC, "addkpc"}, {TMS320C64X_INS_ADDU, "addu"}, {TMS320C64X_INS_AND, "and"}, {TMS320C64X_INS_ANDN, "andn"}, {TMS320C64X_INS_AVG2, "avg2"}, {TMS320C64X_INS_AVGU4, "avgu4"}, {TMS320C64X_INS_B, "b"}, {TMS320C64X_INS_BDEC, "bdec"}, {TMS320C64X_INS_BITC4, "bitc4"}, {TMS320C64X_INS_BNOP, "bnop"}, {TMS320C64X_INS_BPOS, "bpos"}, {TMS320C64X_INS_CLR, "clr"}, {TMS320C64X_INS_CMPEQ, "cmpeq"}, {TMS320C64X_INS_CMPEQ2, "cmpeq2"}, {TMS320C64X_INS_CMPEQ4, "cmpeq4"}, {TMS320C64X_INS_CMPGT, "cmpgt"}, {TMS320C64X_INS_CMPGT2, "cmpgt2"}, {TMS320C64X_INS_CMPGTU4, "cmpgtu4"}, {TMS320C64X_INS_CMPLT, "cmplt"}, {TMS320C64X_INS_CMPLTU, "cmpltu"}, {TMS320C64X_INS_DEAL, "deal"}, {TMS320C64X_INS_DOTP2, "dotp2"}, {TMS320C64X_INS_DOTPN2, "dotpn2"}, {TMS320C64X_INS_DOTPNRSU2, "dotpnrsu2"}, {TMS320C64X_INS_DOTPRSU2, "dotprsu2"}, {TMS320C64X_INS_DOTPSU4, "dotpsu4"}, {TMS320C64X_INS_DOTPU4, "dotpu4"}, {TMS320C64X_INS_EXT, "ext"}, {TMS320C64X_INS_EXTU, "extu"}, {TMS320C64X_INS_GMPGTU, "gmpgtu"}, {TMS320C64X_INS_GMPY4, "gmpy4"}, {TMS320C64X_INS_LDB, "ldb"}, {TMS320C64X_INS_LDBU, "ldbu"}, {TMS320C64X_INS_LDDW, "lddw"}, {TMS320C64X_INS_LDH, "ldh"}, {TMS320C64X_INS_LDHU, "ldhu"}, {TMS320C64X_INS_LDNDW, "ldndw"}, {TMS320C64X_INS_LDNW, "ldnw"}, {TMS320C64X_INS_LDW, "ldw"}, {TMS320C64X_INS_LMBD, "lmbd"}, {TMS320C64X_INS_MAX2, "max2"}, {TMS320C64X_INS_MAXU4, "maxu4"}, {TMS320C64X_INS_MIN2, "min2"}, {TMS320C64X_INS_MINU4, "minu4"}, {TMS320C64X_INS_MPY, "mpy"}, {TMS320C64X_INS_MPY2, "mpy2"}, {TMS320C64X_INS_MPYH, "mpyh"}, {TMS320C64X_INS_MPYHI, "mpyhi"}, {TMS320C64X_INS_MPYHIR, "mpyhir"}, {TMS320C64X_INS_MPYHL, "mpyhl"}, {TMS320C64X_INS_MPYHLU, "mpyhlu"}, {TMS320C64X_INS_MPYHSLU, "mpyhslu"}, {TMS320C64X_INS_MPYHSU, "mpyhsu"}, {TMS320C64X_INS_MPYHU, "mpyhu"}, {TMS320C64X_INS_MPYHULS, "mpyhuls"}, {TMS320C64X_INS_MPYHUS, "mpyhus"}, {TMS320C64X_INS_MPYLH, "mpylh"}, {TMS320C64X_INS_MPYLHU, "mpylhu"}, {TMS320C64X_INS_MPYLI, "mpyli"}, {TMS320C64X_INS_MPYLIR, "mpylir"}, {TMS320C64X_INS_MPYLSHU, "mpylshu"}, {TMS320C64X_INS_MPYLUHS, "mpyluhs"}, {TMS320C64X_INS_MPYSU, "mpysu"}, {TMS320C64X_INS_MPYSU4, "mpysu4"}, {TMS320C64X_INS_MPYU, "mpyu"}, {TMS320C64X_INS_MPYU4, "mpyu4"}, {TMS320C64X_INS_MPYUS, "mpyus"}, {TMS320C64X_INS_MVC, "mvc"}, {TMS320C64X_INS_MVD, "mvd"}, {TMS320C64X_INS_MVK, "mvk"}, {TMS320C64X_INS_MVKL, "mvkl"}, {TMS320C64X_INS_MVKLH, "mvklh"}, {TMS320C64X_INS_NOP, "nop"}, {TMS320C64X_INS_NORM, "norm"}, {TMS320C64X_INS_OR, "or"}, {TMS320C64X_INS_PACK2, "pack2"}, {TMS320C64X_INS_PACKH2, "packh2"}, {TMS320C64X_INS_PACKH4, "packh4"}, {TMS320C64X_INS_PACKHL2, "packhl2"}, {TMS320C64X_INS_PACKL4, "packl4"}, {TMS320C64X_INS_PACKLH2, "packlh2"}, {TMS320C64X_INS_ROTL, "rotl"}, {TMS320C64X_INS_SADD, "sadd"}, {TMS320C64X_INS_SADD2, "sadd2"}, {TMS320C64X_INS_SADDU4, "saddu4"}, {TMS320C64X_INS_SADDUS2, "saddus2"}, {TMS320C64X_INS_SAT, "sat"}, {TMS320C64X_INS_SET, "set"}, {TMS320C64X_INS_SHFL, "shfl"}, {TMS320C64X_INS_SHL, "shl"}, {TMS320C64X_INS_SHLMB, "shlmb"}, {TMS320C64X_INS_SHR, "shr"}, {TMS320C64X_INS_SHR2, "shr2"}, {TMS320C64X_INS_SHRMB, "shrmb"}, {TMS320C64X_INS_SHRU, "shru"}, {TMS320C64X_INS_SHRU2, "shru2"}, {TMS320C64X_INS_SMPY, "smpy"}, {TMS320C64X_INS_SMPY2, "smpy2"}, {TMS320C64X_INS_SMPYH, "smpyh"}, {TMS320C64X_INS_SMPYHL, "smpyhl"}, {TMS320C64X_INS_SMPYLH, "smpylh"}, {TMS320C64X_INS_SPACK2, "spack2"}, {TMS320C64X_INS_SPACKU4, "spacku4"}, {TMS320C64X_INS_SSHL, "sshl"}, {TMS320C64X_INS_SSHVL, "sshvl"}, {TMS320C64X_INS_SSHVR, "sshvr"}, {TMS320C64X_INS_SSUB, "ssub"}, {TMS320C64X_INS_STB, "stb"}, {TMS320C64X_INS_STDW, "stdw"}, {TMS320C64X_INS_STH, "sth"}, {TMS320C64X_INS_STNDW, "stndw"}, {TMS320C64X_INS_STNW, "stnw"}, {TMS320C64X_INS_STW, "stw"}, {TMS320C64X_INS_SUB, "sub"}, {TMS320C64X_INS_SUB2, "sub2"}, {TMS320C64X_INS_SUB4, "sub4"}, {TMS320C64X_INS_SUBAB, "subab"}, {TMS320C64X_INS_SUBABS4, "subabs4"}, {TMS320C64X_INS_SUBAH, "subah"}, {TMS320C64X_INS_SUBAW, "subaw"}, {TMS320C64X_INS_SUBC, "subc"}, {TMS320C64X_INS_SUBU, "subu"}, {TMS320C64X_INS_SWAP4, "swap4"}, {TMS320C64X_INS_UNPKHU4, "unpkhu4"}, {TMS320C64X_INS_UNPKLU4, "unpklu4"}, {TMS320C64X_INS_XOR, "xor"}, {TMS320C64X_INS_XPND2, "xpnd2"}, {TMS320C64X_INS_XPND4, "xpnd4"}, {TMS320C64X_INS_IDLE, "idle"}, {TMS320C64X_INS_MV, "mv"}, {TMS320C64X_INS_NEG, "neg"}, {TMS320C64X_INS_NOT, "not"}, {TMS320C64X_INS_SWAP2, "swap2"}, {TMS320C64X_INS_ZERO, "zero"}, }; #endif const char *TMS320C64x_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET if (id >= TMS320C64X_INS_ENDING) return NULL; return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static name_map group_name_maps[] = { { TMS320C64X_GRP_INVALID, NULL }, { TMS320C64X_GRP_FUNIT_D, "funit_d" }, { TMS320C64X_GRP_FUNIT_L, "funit_l" }, { TMS320C64X_GRP_FUNIT_M, "funit_m" }, { TMS320C64X_GRP_FUNIT_S, "funit_s" }, { TMS320C64X_GRP_FUNIT_NO, "funit_no" }, { TMS320C64X_GRP_JUMP, "jump" }, }; #endif const char *TMS320C64x_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET unsigned int i; if (id >= TMS320C64X_GRP_ENDING) return NULL; for (i = 0; i < ARR_SIZE(group_name_maps); i++) { if (group_name_maps[i].id == id) return group_name_maps[i].name; } return group_name_maps[id].name; #else return NULL; #endif } tms320c64x_reg TMS320C64x_map_register(unsigned int r) { static unsigned int map[] = { 0, }; if (r < ARR_SIZE(map)) return map[r]; return 0; } #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xMapping.h010066400017500001750000000013641363402546700215720ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifndef CS_TMS320C64X_MAP_H #define CS_TMS320C64X_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *TMS320C64x_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void TMS320C64x_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *TMS320C64x_insn_name(csh handle, unsigned int id); const char *TMS320C64x_group_name(csh handle, unsigned int id); // map internal raw register to 'public' register tms320c64x_reg TMS320C64x_map_register(unsigned int r); // map register name to register ID tms320c64x_reg TMS320C64x_reg_id(char *name); #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xModule.c010066400017500001750000000016171363402546700214200ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifdef CAPSTONE_HAS_TMS320C64X #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "TMS320C64xDisassembler.h" #include "TMS320C64xInstPrinter.h" #include "TMS320C64xMapping.h" #include "TMS320C64xModule.h" cs_err TMS320C64x_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); TMS320C64x_init(mri); ud->printer = TMS320C64x_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = TMS320C64x_getInstruction; ud->post_printer = TMS320C64x_post_printer; ud->reg_name = TMS320C64x_reg_name; ud->insn_id = TMS320C64x_get_insn_id; ud->insn_name = TMS320C64x_insn_name; ud->group_name = TMS320C64x_group_name; return CS_ERR_OK; } cs_err TMS320C64x_option(cs_struct *handle, cs_opt_type type, size_t value) { return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/TMS320C64x/TMS320C64xModule.h010066400017500001750000000004651363402546700214250ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_TMS320C64X_MODULE_H #define CS_TMS320C64X_MODULE_H #include "../../utils.h" cs_err TMS320C64x_global_init(cs_struct *ud); cs_err TMS320C64x_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/X86/X86ATTInstPrinter.c010066400017500001750000001016311363402546700211020ustar0000000000000000//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file includes code for rendering MCInst instances as AT&T-style // assembly. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ // this code is only relevant when DIET mode is disable #if defined(CAPSTONE_HAS_X86) && !defined(CAPSTONE_DIET) && !defined(CAPSTONE_X86_ATT_DISABLE) #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable:4996) // disable MSVC's warning on strncpy() #pragma warning(disable:28719) // disable MSVC's warning on strncpy() #endif #if !defined(CAPSTONE_HAS_OSXKERNEL) #include #endif #include #if defined(CAPSTONE_HAS_OSXKERNEL) #include #include #else #include #include #endif #include #include "../../utils.h" #include "../../MCInst.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "X86Mapping.h" #include "X86BaseInfo.h" #define GET_INSTRINFO_ENUM #ifdef CAPSTONE_X86_REDUCE #include "X86GenInstrInfo_reduce.inc" #else #include "X86GenInstrInfo.inc" #endif static void printMemReference(MCInst *MI, unsigned Op, SStream *O); static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static void set_mem_access(MCInst *MI, bool status) { if (MI->csh->detail != CS_OPT_ON) return; MI->csh->doing_mem = status; if (!status) // done, create the next operand slot MI->flat_insn->detail->x86.op_count++; } static void printopaquemem(MCInst *MI, unsigned OpNo, SStream *O) { switch(MI->csh->mode) { case CS_MODE_16: switch(MI->flat_insn->id) { default: MI->x86opsize = 2; break; case X86_INS_LJMP: case X86_INS_LCALL: MI->x86opsize = 4; break; case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: MI->x86opsize = 6; break; } break; case CS_MODE_32: switch(MI->flat_insn->id) { default: MI->x86opsize = 4; break; case X86_INS_LJMP: case X86_INS_LCALL: case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: MI->x86opsize = 6; break; } break; case CS_MODE_64: switch(MI->flat_insn->id) { default: MI->x86opsize = 8; break; case X86_INS_LJMP: case X86_INS_LCALL: case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: MI->x86opsize = 10; break; } break; default: // never reach break; } printMemReference(MI, OpNo, O); } static void printi8mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 1; printMemReference(MI, OpNo, O); } static void printi16mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 2; printMemReference(MI, OpNo, O); } static void printi32mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 4; printMemReference(MI, OpNo, O); } static void printi64mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 8; printMemReference(MI, OpNo, O); } static void printi128mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 16; printMemReference(MI, OpNo, O); } #ifndef CAPSTONE_X86_REDUCE static void printi256mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 32; printMemReference(MI, OpNo, O); } static void printi512mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 64; printMemReference(MI, OpNo, O); } static void printf32mem(MCInst *MI, unsigned OpNo, SStream *O) { switch(MCInst_getOpcode(MI)) { default: MI->x86opsize = 4; break; case X86_FBSTPm: case X86_FBLDm: // TODO: fix this in tablegen instead MI->x86opsize = 10; break; case X86_FSTENVm: case X86_FLDENVm: // TODO: fix this in tablegen instead switch(MI->csh->mode) { default: // never reach break; case CS_MODE_16: MI->x86opsize = 14; break; case CS_MODE_32: case CS_MODE_64: MI->x86opsize = 28; break; } break; } printMemReference(MI, OpNo, O); } static void printf64mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 8; printMemReference(MI, OpNo, O); } static void printf80mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 10; printMemReference(MI, OpNo, O); } static void printf128mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 16; printMemReference(MI, OpNo, O); } static void printf256mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 32; printMemReference(MI, OpNo, O); } static void printf512mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 64; printMemReference(MI, OpNo, O); } static void printSSECC(MCInst *MI, unsigned Op, SStream *OS) { uint8_t Imm = (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 7); switch (Imm) { default: break; // never reach case 0: SStream_concat0(OS, "eq"); op_addSseCC(MI, X86_SSE_CC_EQ); break; case 1: SStream_concat0(OS, "lt"); op_addSseCC(MI, X86_SSE_CC_LT); break; case 2: SStream_concat0(OS, "le"); op_addSseCC(MI, X86_SSE_CC_LE); break; case 3: SStream_concat0(OS, "unord"); op_addSseCC(MI, X86_SSE_CC_UNORD); break; case 4: SStream_concat0(OS, "neq"); op_addSseCC(MI, X86_SSE_CC_NEQ); break; case 5: SStream_concat0(OS, "nlt"); op_addSseCC(MI, X86_SSE_CC_NLT); break; case 6: SStream_concat0(OS, "nle"); op_addSseCC(MI, X86_SSE_CC_NLE); break; case 7: SStream_concat0(OS, "ord"); op_addSseCC(MI, X86_SSE_CC_ORD); break; } MI->popcode_adjust = Imm + 1; } static void printAVXCC(MCInst *MI, unsigned Op, SStream *O) { uint8_t Imm = (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f); switch (Imm) { default: break;//printf("Invalid avxcc argument!\n"); break; case 0: SStream_concat0(O, "eq"); op_addAvxCC(MI, X86_AVX_CC_EQ); break; case 1: SStream_concat0(O, "lt"); op_addAvxCC(MI, X86_AVX_CC_LT); break; case 2: SStream_concat0(O, "le"); op_addAvxCC(MI, X86_AVX_CC_LE); break; case 3: SStream_concat0(O, "unord"); op_addAvxCC(MI, X86_AVX_CC_UNORD); break; case 4: SStream_concat0(O, "neq"); op_addAvxCC(MI, X86_AVX_CC_NEQ); break; case 5: SStream_concat0(O, "nlt"); op_addAvxCC(MI, X86_AVX_CC_NLT); break; case 6: SStream_concat0(O, "nle"); op_addAvxCC(MI, X86_AVX_CC_NLE); break; case 7: SStream_concat0(O, "ord"); op_addAvxCC(MI, X86_AVX_CC_ORD); break; case 8: SStream_concat0(O, "eq_uq"); op_addAvxCC(MI, X86_AVX_CC_EQ_UQ); break; case 9: SStream_concat0(O, "nge"); op_addAvxCC(MI, X86_AVX_CC_NGE); break; case 0xa: SStream_concat0(O, "ngt"); op_addAvxCC(MI, X86_AVX_CC_NGT); break; case 0xb: SStream_concat0(O, "false"); op_addAvxCC(MI, X86_AVX_CC_FALSE); break; case 0xc: SStream_concat0(O, "neq_oq"); op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ); break; case 0xd: SStream_concat0(O, "ge"); op_addAvxCC(MI, X86_AVX_CC_GE); break; case 0xe: SStream_concat0(O, "gt"); op_addAvxCC(MI, X86_AVX_CC_GT); break; case 0xf: SStream_concat0(O, "true"); op_addAvxCC(MI, X86_AVX_CC_TRUE); break; case 0x10: SStream_concat0(O, "eq_os"); op_addAvxCC(MI, X86_AVX_CC_EQ_OS); break; case 0x11: SStream_concat0(O, "lt_oq"); op_addAvxCC(MI, X86_AVX_CC_LT_OQ); break; case 0x12: SStream_concat0(O, "le_oq"); op_addAvxCC(MI, X86_AVX_CC_LE_OQ); break; case 0x13: SStream_concat0(O, "unord_s"); op_addAvxCC(MI, X86_AVX_CC_UNORD_S); break; case 0x14: SStream_concat0(O, "neq_us"); op_addAvxCC(MI, X86_AVX_CC_NEQ_US); break; case 0x15: SStream_concat0(O, "nlt_uq"); op_addAvxCC(MI, X86_AVX_CC_NLT_UQ); break; case 0x16: SStream_concat0(O, "nle_uq"); op_addAvxCC(MI, X86_AVX_CC_NLE_UQ); break; case 0x17: SStream_concat0(O, "ord_s"); op_addAvxCC(MI, X86_AVX_CC_ORD_S); break; case 0x18: SStream_concat0(O, "eq_us"); op_addAvxCC(MI, X86_AVX_CC_EQ_US); break; case 0x19: SStream_concat0(O, "nge_uq"); op_addAvxCC(MI, X86_AVX_CC_NGE_UQ); break; case 0x1a: SStream_concat0(O, "ngt_uq"); op_addAvxCC(MI, X86_AVX_CC_NGT_UQ); break; case 0x1b: SStream_concat0(O, "false_os"); op_addAvxCC(MI, X86_AVX_CC_FALSE_OS); break; case 0x1c: SStream_concat0(O, "neq_os"); op_addAvxCC(MI, X86_AVX_CC_NEQ_OS); break; case 0x1d: SStream_concat0(O, "ge_oq"); op_addAvxCC(MI, X86_AVX_CC_GE_OQ); break; case 0x1e: SStream_concat0(O, "gt_oq"); op_addAvxCC(MI, X86_AVX_CC_GT_OQ); break; case 0x1f: SStream_concat0(O, "true_us"); op_addAvxCC(MI, X86_AVX_CC_TRUE_US); break; } MI->popcode_adjust = Imm + 1; } static void printXOPCC(MCInst *MI, unsigned Op, SStream *O) { int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)); switch (Imm) { default: // llvm_unreachable("Invalid xopcc argument!"); case 0: SStream_concat0(O, "lt"); op_addXopCC(MI, X86_XOP_CC_LT); break; case 1: SStream_concat0(O, "le"); op_addXopCC(MI, X86_XOP_CC_LE); break; case 2: SStream_concat0(O, "gt"); op_addXopCC(MI, X86_XOP_CC_GT); break; case 3: SStream_concat0(O, "ge"); op_addXopCC(MI, X86_XOP_CC_GE); break; case 4: SStream_concat0(O, "eq"); op_addXopCC(MI, X86_XOP_CC_EQ); break; case 5: SStream_concat0(O, "neq"); op_addXopCC(MI, X86_XOP_CC_NEQ); break; case 6: SStream_concat0(O, "false"); op_addXopCC(MI, X86_XOP_CC_FALSE); break; case 7: SStream_concat0(O, "true"); op_addXopCC(MI, X86_XOP_CC_TRUE); break; } } static void printRoundingControl(MCInst *MI, unsigned Op, SStream *O) { int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3; switch (Imm) { case 0: SStream_concat0(O, "{rn-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RN); break; case 1: SStream_concat0(O, "{rd-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RD); break; case 2: SStream_concat0(O, "{ru-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RU); break; case 3: SStream_concat0(O, "{rz-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RZ); break; default: break; // nev0er reach } } #endif static void printRegName(SStream *OS, unsigned RegNo); // local printOperand, without updating public operands static void _printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { printRegName(O, MCOperand_getReg(Op)); } else if (MCOperand_isImm(Op)) { // Print X86 immediates as signed values. int64_t imm = MCOperand_getImm(Op); uint8_t encsize; uint8_t opsize = X86_immediate_size(MCInst_getOpcode(MI), &encsize); if (imm < 0) { if (MI->csh->imm_unsigned) { if (opsize) { switch(opsize) { default: break; case 1: imm &= 0xff; break; case 2: imm &= 0xffff; break; case 4: imm &= 0xffffffff; break; } } SStream_concat(O, "$0x%"PRIx64, imm); } else { if (imm < -HEX_THRESHOLD) SStream_concat(O, "$-0x%"PRIx64, -imm); else SStream_concat(O, "$-%"PRIu64, -imm); } } else { if (imm > HEX_THRESHOLD) SStream_concat(O, "$0x%"PRIx64, imm); else SStream_concat(O, "$%"PRIu64, imm); } } } // convert Intel access info to AT&T access info static void get_op_access(cs_struct *h, unsigned int id, uint8_t *access, uint64_t *eflags) { uint8_t count, i; uint8_t *arr = X86_get_op_access(h, id, eflags); if (!arr) { access[0] = 0; return; } // find the non-zero last entry for(count = 0; arr[count]; count++); if (count == 0) return; // copy in reverse order this access array from Intel syntax -> AT&T syntax count--; for(i = 0; i <= count; i++) { if (arr[count - i] != CS_AC_IGNORE) access[i] = arr[count - i]; else access[i] = 0; } } static void printSrcIdx(MCInst *MI, unsigned Op, SStream *O) { MCOperand *SegReg; int reg; if (MI->csh->detail) { uint8_t access[6]; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; } SegReg = MCInst_getOperand(MI, Op+1); reg = MCOperand_getReg(SegReg); // If this has a segment register, print it. if (reg) { _printOperand(MI, Op+1, O); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; } SStream_concat0(O, ":"); } SStream_concat0(O, "("); set_mem_access(MI, true); printOperand(MI, Op, O); SStream_concat0(O, ")"); set_mem_access(MI, false); } static void printDstIdx(MCInst *MI, unsigned Op, SStream *O) { if (MI->csh->detail) { uint8_t access[6]; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; } // DI accesses are always ES-based on non-64bit mode if (MI->csh->mode != CS_MODE_64) { SStream_concat0(O, "%es:("); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_ES; } } else SStream_concat0(O, "("); set_mem_access(MI, true); printOperand(MI, Op, O); SStream_concat0(O, ")"); set_mem_access(MI, false); } static void printSrcIdx8(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 1; printSrcIdx(MI, OpNo, O); } static void printSrcIdx16(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 2; printSrcIdx(MI, OpNo, O); } static void printSrcIdx32(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 4; printSrcIdx(MI, OpNo, O); } static void printSrcIdx64(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 8; printSrcIdx(MI, OpNo, O); } static void printDstIdx8(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 1; printDstIdx(MI, OpNo, O); } static void printDstIdx16(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 2; printDstIdx(MI, OpNo, O); } static void printDstIdx32(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 4; printDstIdx(MI, OpNo, O); } static void printDstIdx64(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 8; printDstIdx(MI, OpNo, O); } static void printMemOffset(MCInst *MI, unsigned Op, SStream *O) { MCOperand *DispSpec = MCInst_getOperand(MI, Op); MCOperand *SegReg = MCInst_getOperand(MI, Op+1); int reg; if (MI->csh->detail) { uint8_t access[6]; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; } // If this has a segment register, print it. reg = MCOperand_getReg(SegReg); if (reg) { _printOperand(MI, Op + 1, O); SStream_concat0(O, ":"); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; } } if (MCOperand_isImm(DispSpec)) { int64_t imm = MCOperand_getImm(DispSpec); if (MI->csh->detail) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm; if (imm < 0) { SStream_concat(O, "0x%"PRIx64, arch_masks[MI->csh->mode] & imm); } else { if (imm > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, imm); else SStream_concat(O, "%"PRIu64, imm); } } if (MI->csh->detail) MI->flat_insn->detail->x86.op_count++; } #ifndef CAPSTONE_X86_REDUCE static void printU8Imm(MCInst *MI, unsigned Op, SStream *O) { uint8_t val = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0xff; if (val > HEX_THRESHOLD) SStream_concat(O, "$0x%x", val); else SStream_concat(O, "$%u", val); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = val; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = 1; MI->flat_insn->detail->x86.op_count++; } } #endif static void printMemOffs8(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 1; printMemOffset(MI, OpNo, O); } static void printMemOffs16(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 2; printMemOffset(MI, OpNo, O); } static void printMemOffs32(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 4; printMemOffset(MI, OpNo, O); } static void printMemOffs64(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 8; printMemOffset(MI, OpNo, O); } /// printPCRelImm - This is used to print an immediate value that ends up /// being encoded as a pc-relative value (e.g. for jumps and calls). These /// print slightly differently than normal immediates. For example, a $ is not /// emitted. static void printPCRelImm(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isImm(Op)) { int64_t imm = MCOperand_getImm(Op) + MI->flat_insn->size + MI->address; // truncat imm for non-64bit if (MI->csh->mode != CS_MODE_64) { imm = imm & 0xffffffff; } if (MI->csh->mode == CS_MODE_16 && (MI->Opcode != X86_JMP_4 && MI->Opcode != X86_CALLpcrel32)) imm = imm & 0xffff; // Hack: X86 16bit with opcode X86_JMP_4 if (MI->csh->mode == CS_MODE_16 && (MI->Opcode == X86_JMP_4 && MI->x86_prefix[2] != 0x66)) imm = imm & 0xffff; // CALL/JMP rel16 is special if (MI->Opcode == X86_CALLpcrel16 || MI->Opcode == X86_JMP_2) imm = imm & 0xffff; if (imm < 0) { SStream_concat(O, "0x%"PRIx64, imm); } else { if (imm > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, imm); else SStream_concat(O, "%"PRIu64, imm); } if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; MI->has_imm = true; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = imm; MI->flat_insn->detail->x86.op_count++; } } } static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned int reg = MCOperand_getReg(Op); printRegName(O, reg); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = reg; } else { uint8_t access[6]; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg]; get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; MI->flat_insn->detail->x86.op_count++; } } } else if (MCOperand_isImm(Op)) { // Print X86 immediates as signed values. uint8_t encsize; int64_t imm = MCOperand_getImm(Op); uint8_t opsize = X86_immediate_size(MCInst_getOpcode(MI), &encsize); if (opsize == 1) // print 1 byte immediate in positive form imm = imm & 0xff; switch(MI->flat_insn->id) { default: if (imm >= 0) { if (imm > HEX_THRESHOLD) SStream_concat(O, "$0x%"PRIx64, imm); else SStream_concat(O, "$%"PRIu64, imm); } else { if (MI->csh->imm_unsigned) { if (opsize) { switch(opsize) { default: break; case 1: imm &= 0xff; break; case 2: imm &= 0xffff; break; case 4: imm &= 0xffffffff; break; } } SStream_concat(O, "$0x%"PRIx64, imm); } else { if (imm == 0x8000000000000000LL) // imm == -imm SStream_concat0(O, "$0x8000000000000000"); else if (imm < -HEX_THRESHOLD) SStream_concat(O, "$-0x%"PRIx64, -imm); else SStream_concat(O, "$-%"PRIu64, -imm); } } break; case X86_INS_MOVABS: // do not print number in negative form SStream_concat(O, "$0x%"PRIx64, imm); break; case X86_INS_IN: case X86_INS_OUT: case X86_INS_INT: // do not print number in negative form imm = imm & 0xff; if (imm >= 0 && imm <= HEX_THRESHOLD) SStream_concat(O, "$%u", imm); else { SStream_concat(O, "$0x%x", imm); } break; case X86_INS_LCALL: case X86_INS_LJMP: // always print address in positive form if (OpNo == 1) { // selector is ptr16 imm = imm & 0xffff; opsize = 2; } SStream_concat(O, "$0x%"PRIx64, imm); break; case X86_INS_AND: case X86_INS_OR: case X86_INS_XOR: // do not print number in negative form if (imm >= 0 && imm <= HEX_THRESHOLD) SStream_concat(O, "$%u", imm); else { imm = arch_masks[opsize? opsize : MI->imm_size] & imm; SStream_concat(O, "$0x%"PRIx64, imm); } break; case X86_INS_RET: case X86_INS_RETF: // RET imm16 if (imm >= 0 && imm <= HEX_THRESHOLD) SStream_concat(O, "$%u", imm); else { imm = 0xffff & imm; SStream_concat(O, "$0x%x", imm); } break; } if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm; } else { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; MI->has_imm = true; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = imm; if (opsize > 0) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = opsize; MI->flat_insn->detail->x86.encoding.imm_size = encsize; } else if (MI->op1_size > 0) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->op1_size; else MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size; MI->flat_insn->detail->x86.op_count++; } } } } static void printMemReference(MCInst *MI, unsigned Op, SStream *O) { MCOperand *BaseReg = MCInst_getOperand(MI, Op + X86_AddrBaseReg); MCOperand *IndexReg = MCInst_getOperand(MI, Op + X86_AddrIndexReg); MCOperand *DispSpec = MCInst_getOperand(MI, Op + X86_AddrDisp); MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); uint64_t ScaleVal; int segreg; int64_t DispVal = 1; if (MI->csh->detail) { uint8_t access[6]; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = MCOperand_getReg(BaseReg); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = MCOperand_getReg(IndexReg); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; } // If this has a segment register, print it. segreg = MCOperand_getReg(SegReg); if (segreg) { _printOperand(MI, Op + X86_AddrSegmentReg, O); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = segreg; } SStream_concat0(O, ":"); } if (MCOperand_isImm(DispSpec)) { DispVal = MCOperand_getImm(DispSpec); if (MI->csh->detail) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = DispVal; if (DispVal) { if (MCOperand_getReg(IndexReg) || MCOperand_getReg(BaseReg)) { printInt64(O, DispVal); } else { // only immediate as address of memory if (DispVal < 0) { SStream_concat(O, "0x%"PRIx64, arch_masks[MI->csh->mode] & DispVal); } else { if (DispVal > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, DispVal); else SStream_concat(O, "%"PRIu64, DispVal); } } } else { } } if (MCOperand_getReg(IndexReg) || MCOperand_getReg(BaseReg)) { SStream_concat0(O, "("); if (MCOperand_getReg(BaseReg)) _printOperand(MI, Op + X86_AddrBaseReg, O); if (MCOperand_getReg(IndexReg)) { SStream_concat0(O, ", "); _printOperand(MI, Op + X86_AddrIndexReg, O); ScaleVal = MCOperand_getImm(MCInst_getOperand(MI, Op + X86_AddrScaleAmt)); if (MI->csh->detail) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal; if (ScaleVal != 1) { SStream_concat(O, ", %u", ScaleVal); } } SStream_concat0(O, ")"); } else { if (!DispVal) SStream_concat0(O, "0"); } if (MI->csh->detail) MI->flat_insn->detail->x86.op_count++; } static void printanymem(MCInst *MI, unsigned OpNo, SStream *O) { switch(MI->Opcode) { default: break; case X86_LEA16r: MI->x86opsize = 2; break; case X86_LEA32r: case X86_LEA64_32r: MI->x86opsize = 4; break; case X86_LEA64r: MI->x86opsize = 8; break; } printMemReference(MI, OpNo, O); } #include "X86InstPrinter.h" #define GET_REGINFO_ENUM #include "X86GenRegisterInfo.inc" // Include the auto-generated portion of the assembly writer. #define PRINT_ALIAS_INSTR #ifdef CAPSTONE_X86_REDUCE #include "X86GenAsmWriter_reduce.inc" #else #include "X86GenAsmWriter.inc" #endif static void printRegName(SStream *OS, unsigned RegNo) { SStream_concat(OS, "%%%s", getRegisterName(RegNo)); } void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info) { char *mnem; x86_reg reg, reg2; enum cs_ac_type access1, access2; int i; // perhaps this instruction does not need printer if (MI->assembly[0]) { strncpy(OS->buffer, MI->assembly, sizeof(OS->buffer)); return; } // Output CALLpcrel32 as "callq" in 64-bit mode. // In Intel annotation it's always emitted as "call". // // TODO: Probably this hack should be redesigned via InstAlias in // InstrInfo.td as soon as Requires clause is supported properly // for InstAlias. if (MI->csh->mode == CS_MODE_64 && MCInst_getOpcode(MI) == X86_CALLpcrel32) { SStream_concat0(OS, "callq\t"); MCInst_setOpcodePub(MI, X86_INS_CALL); printPCRelImm(MI, 0, OS); return; } // Try to print any aliases first. mnem = printAliasInstr(MI, OS, info); if (mnem) cs_mem_free(mnem); else printInstruction(MI, OS, info); // HACK TODO: fix this in machine description switch(MI->flat_insn->id) { default: break; case X86_INS_SYSEXIT: SStream_Init(OS); SStream_concat0(OS, "sysexit"); break; } if (MI->has_imm) { // if op_count > 1, then this operand's size is taken from the destination op if (MI->flat_insn->detail->x86.op_count > 1) { if (MI->flat_insn->id != X86_INS_LCALL && MI->flat_insn->id != X86_INS_LJMP) { for (i = 0; i < MI->flat_insn->detail->x86.op_count; i++) { if (MI->flat_insn->detail->x86.operands[i].type == X86_OP_IMM) MI->flat_insn->detail->x86.operands[i].size = MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].size; } } } else MI->flat_insn->detail->x86.operands[0].size = MI->imm_size; } if (MI->csh->detail) { uint8_t access[6] = {0}; // some instructions need to supply immediate 1 in the first op switch(MCInst_getOpcode(MI)) { default: break; case X86_SHL8r1: case X86_SHL16r1: case X86_SHL32r1: case X86_SHL64r1: case X86_SAL8r1: case X86_SAL16r1: case X86_SAL32r1: case X86_SAL64r1: case X86_SHR8r1: case X86_SHR16r1: case X86_SHR32r1: case X86_SHR64r1: case X86_SAR8r1: case X86_SAR16r1: case X86_SAR32r1: case X86_SAR64r1: case X86_RCL8r1: case X86_RCL16r1: case X86_RCL32r1: case X86_RCL64r1: case X86_RCR8r1: case X86_RCR16r1: case X86_RCR32r1: case X86_RCR64r1: case X86_ROL8r1: case X86_ROL16r1: case X86_ROL32r1: case X86_ROL64r1: case X86_ROR8r1: case X86_ROR16r1: case X86_ROR32r1: case X86_ROR64r1: case X86_SHL8m1: case X86_SHL16m1: case X86_SHL32m1: case X86_SHL64m1: case X86_SAL8m1: case X86_SAL16m1: case X86_SAL32m1: case X86_SAL64m1: case X86_SHR8m1: case X86_SHR16m1: case X86_SHR32m1: case X86_SHR64m1: case X86_SAR8m1: case X86_SAR16m1: case X86_SAR32m1: case X86_SAR64m1: case X86_RCL8m1: case X86_RCL16m1: case X86_RCL32m1: case X86_RCL64m1: case X86_RCR8m1: case X86_RCR16m1: case X86_RCR32m1: case X86_RCR64m1: case X86_ROL8m1: case X86_ROL16m1: case X86_ROL32m1: case X86_ROL64m1: case X86_ROR8m1: case X86_ROR16m1: case X86_ROR32m1: case X86_ROR64m1: // shift all the ops right to leave 1st slot for this new register op memmove(&(MI->flat_insn->detail->x86.operands[1]), &(MI->flat_insn->detail->x86.operands[0]), sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - 1)); MI->flat_insn->detail->x86.operands[0].type = X86_OP_IMM; MI->flat_insn->detail->x86.operands[0].imm = 1; MI->flat_insn->detail->x86.operands[0].size = 1; MI->flat_insn->detail->x86.op_count++; } // special instruction needs to supply register op // first op can be embedded in the asm by llvm. // so we have to add the missing register as the first operand //printf(">>> opcode = %u\n", MCInst_getOpcode(MI)); reg = X86_insn_reg_att(MCInst_getOpcode(MI), &access1); if (reg) { // shift all the ops right to leave 1st slot for this new register op memmove(&(MI->flat_insn->detail->x86.operands[1]), &(MI->flat_insn->detail->x86.operands[0]), sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - 1)); MI->flat_insn->detail->x86.operands[0].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[0].reg = reg; MI->flat_insn->detail->x86.operands[0].size = MI->csh->regsize_map[reg]; MI->flat_insn->detail->x86.operands[0].access = access1; MI->flat_insn->detail->x86.op_count++; } else { if (X86_insn_reg_att2(MCInst_getOpcode(MI), ®, &access1, ®2, &access2)) { MI->flat_insn->detail->x86.operands[0].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[0].reg = reg; MI->flat_insn->detail->x86.operands[0].size = MI->csh->regsize_map[reg]; MI->flat_insn->detail->x86.operands[0].access = access1; MI->flat_insn->detail->x86.operands[1].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[1].reg = reg2; MI->flat_insn->detail->x86.operands[1].size = MI->csh->regsize_map[reg2]; MI->flat_insn->detail->x86.operands[0].access = access2; MI->flat_insn->detail->x86.op_count = 2; } } #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[0].access = access[0]; MI->flat_insn->detail->x86.operands[1].access = access[1]; #endif } } #endif capstone-sys-0.11.0/capstone/arch/X86/X86BaseInfo.h010066400017500001750000000024621363402546700177450ustar0000000000000000//===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains small standalone helper functions and enum definitions for // the X86 target useful for the compiler back-end and the MC libraries. // As such, it deliberately does not include references to LLVM core // code gen types, passes, etc.. // //===----------------------------------------------------------------------===// #ifndef CS_X86_BASEINFO_H #define CS_X86_BASEINFO_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ // Enums for memory operand decoding. Each memory operand is represented with // a 5 operand sequence in the form: // [BaseReg, ScaleAmt, IndexReg, Disp, Segment] // These enums help decode this. enum { X86_AddrBaseReg = 0, X86_AddrScaleAmt = 1, X86_AddrIndexReg = 2, X86_AddrDisp = 3, /// AddrSegmentReg - The operand # of the segment in the memory operand. X86_AddrSegmentReg = 4, /// AddrNumOperands - Total number of operands in a memory reference. X86_AddrNumOperands = 5 }; #endif capstone-sys-0.11.0/capstone/arch/X86/X86Disassembler.c010066400017500001750000001115521363403403300206550ustar0000000000000000//===-- X86Disassembler.cpp - Disassembler for x86 and x86_64 -------------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file is part of the X86 Disassembler. // It contains code to translate the data produced by the decoder into // MCInsts. // Documentation for the disassembler can be found in X86Disassembler.h. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_X86 #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable:4996) // disable MSVC's warning on strncpy() #pragma warning(disable:28719) // disable MSVC's warning on strncpy() #endif #include #if defined(CAPSTONE_HAS_OSXKERNEL) #include #endif #include #include "../../cs_priv.h" #include "X86Disassembler.h" #include "X86DisassemblerDecoderCommon.h" #include "X86DisassemblerDecoder.h" #include "../../MCInst.h" #include "../../utils.h" #include "X86Mapping.h" #define GET_REGINFO_ENUM #define GET_REGINFO_MC_DESC #include "X86GenRegisterInfo.inc" #define GET_INSTRINFO_ENUM #ifdef CAPSTONE_X86_REDUCE #include "X86GenInstrInfo_reduce.inc" #else #include "X86GenInstrInfo.inc" #endif // Fill-ins to make the compiler happy. These constants are never actually // assigned; they are just filler to make an automatically-generated switch // statement work. enum { X86_BX_SI = 500, X86_BX_DI = 501, X86_BP_SI = 502, X86_BP_DI = 503, X86_sib = 504, X86_sib64 = 505 }; // // Private code that translates from struct InternalInstructions to MCInsts. // /// translateRegister - Translates an internal register to the appropriate LLVM /// register, and appends it as an operand to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param reg - The Reg to append. static void translateRegister(MCInst *mcInst, Reg reg) { #define ENTRY(x) X86_##x, static const uint8_t llvmRegnums[] = { ALL_REGS 0 }; #undef ENTRY uint8_t llvmRegnum = llvmRegnums[reg]; MCOperand_CreateReg0(mcInst, llvmRegnum); } static const uint8_t segmentRegnums[SEG_OVERRIDE_max] = { 0, // SEG_OVERRIDE_NONE X86_CS, X86_SS, X86_DS, X86_ES, X86_FS, X86_GS }; /// translateSrcIndex - Appends a source index operand to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param insn - The internal instruction. static bool translateSrcIndex(MCInst *mcInst, InternalInstruction *insn) { unsigned baseRegNo; if (insn->mode == MODE_64BIT) baseRegNo = insn->isPrefix67 ? X86_ESI : X86_RSI; else if (insn->mode == MODE_32BIT) baseRegNo = insn->isPrefix67 ? X86_SI : X86_ESI; else { // assert(insn->mode == MODE_16BIT); baseRegNo = insn->isPrefix67 ? X86_ESI : X86_SI; } MCOperand_CreateReg0(mcInst, baseRegNo); MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); return false; } /// translateDstIndex - Appends a destination index operand to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param insn - The internal instruction. static bool translateDstIndex(MCInst *mcInst, InternalInstruction *insn) { unsigned baseRegNo; if (insn->mode == MODE_64BIT) baseRegNo = insn->isPrefix67 ? X86_EDI : X86_RDI; else if (insn->mode == MODE_32BIT) baseRegNo = insn->isPrefix67 ? X86_DI : X86_EDI; else { // assert(insn->mode == MODE_16BIT); baseRegNo = insn->isPrefix67 ? X86_EDI : X86_DI; } MCOperand_CreateReg0(mcInst, baseRegNo); return false; } /// translateImmediate - Appends an immediate operand to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param immediate - The immediate value to append. /// @param operand - The operand, as stored in the descriptor table. /// @param insn - The internal instruction. static void translateImmediate(MCInst *mcInst, uint64_t immediate, const OperandSpecifier *operand, InternalInstruction *insn) { OperandType type; type = (OperandType)operand->type; if (type == TYPE_RELv) { //isBranch = true; //pcrel = insn->startLocation + insn->immediateOffset + insn->immediateSize; switch (insn->displacementSize) { case 1: if (immediate & 0x80) immediate |= ~(0xffull); break; case 2: if (immediate & 0x8000) immediate |= ~(0xffffull); break; case 4: if (immediate & 0x80000000) immediate |= ~(0xffffffffull); break; case 8: break; default: break; } } // By default sign-extend all X86 immediates based on their encoding. else if (type == TYPE_IMM8 || type == TYPE_IMM16 || type == TYPE_IMM32 || type == TYPE_IMM64 || type == TYPE_IMMv) { switch (operand->encoding) { default: break; case ENCODING_IB: if(immediate & 0x80) immediate |= ~(0xffull); break; case ENCODING_IW: if(immediate & 0x8000) immediate |= ~(0xffffull); break; case ENCODING_ID: if(immediate & 0x80000000) immediate |= ~(0xffffffffull); break; case ENCODING_IO: break; } } else if (type == TYPE_IMM3) { #ifndef CAPSTONE_X86_REDUCE // Check for immediates that printSSECC can't handle. if (immediate >= 8) { unsigned NewOpc = 0; switch (MCInst_getOpcode(mcInst)) { default: break; // never reach case X86_CMPPDrmi: NewOpc = X86_CMPPDrmi_alt; break; case X86_CMPPDrri: NewOpc = X86_CMPPDrri_alt; break; case X86_CMPPSrmi: NewOpc = X86_CMPPSrmi_alt; break; case X86_CMPPSrri: NewOpc = X86_CMPPSrri_alt; break; case X86_CMPSDrm: NewOpc = X86_CMPSDrm_alt; break; case X86_CMPSDrr: NewOpc = X86_CMPSDrr_alt; break; case X86_CMPSSrm: NewOpc = X86_CMPSSrm_alt; break; case X86_CMPSSrr: NewOpc = X86_CMPSSrr_alt; break; case X86_VPCOMBri: NewOpc = X86_VPCOMBri_alt; break; case X86_VPCOMBmi: NewOpc = X86_VPCOMBmi_alt; break; case X86_VPCOMWri: NewOpc = X86_VPCOMWri_alt; break; case X86_VPCOMWmi: NewOpc = X86_VPCOMWmi_alt; break; case X86_VPCOMDri: NewOpc = X86_VPCOMDri_alt; break; case X86_VPCOMDmi: NewOpc = X86_VPCOMDmi_alt; break; case X86_VPCOMQri: NewOpc = X86_VPCOMQri_alt; break; case X86_VPCOMQmi: NewOpc = X86_VPCOMQmi_alt; break; case X86_VPCOMUBri: NewOpc = X86_VPCOMUBri_alt; break; case X86_VPCOMUBmi: NewOpc = X86_VPCOMUBmi_alt; break; case X86_VPCOMUWri: NewOpc = X86_VPCOMUWri_alt; break; case X86_VPCOMUWmi: NewOpc = X86_VPCOMUWmi_alt; break; case X86_VPCOMUDri: NewOpc = X86_VPCOMUDri_alt; break; case X86_VPCOMUDmi: NewOpc = X86_VPCOMUDmi_alt; break; case X86_VPCOMUQri: NewOpc = X86_VPCOMUQri_alt; break; case X86_VPCOMUQmi: NewOpc = X86_VPCOMUQmi_alt; break; } // Switch opcode to the one that doesn't get special printing. if (NewOpc != 0) { MCInst_setOpcode(mcInst, NewOpc); } } #endif } else if (type == TYPE_IMM5) { #ifndef CAPSTONE_X86_REDUCE // Check for immediates that printAVXCC can't handle. if (immediate >= 32) { unsigned NewOpc = 0; switch (MCInst_getOpcode(mcInst)) { default: break; // unexpected opcode case X86_VCMPPDrmi: NewOpc = X86_VCMPPDrmi_alt; break; case X86_VCMPPDrri: NewOpc = X86_VCMPPDrri_alt; break; case X86_VCMPPSrmi: NewOpc = X86_VCMPPSrmi_alt; break; case X86_VCMPPSrri: NewOpc = X86_VCMPPSrri_alt; break; case X86_VCMPSDrm: NewOpc = X86_VCMPSDrm_alt; break; case X86_VCMPSDrr: NewOpc = X86_VCMPSDrr_alt; break; case X86_VCMPSSrm: NewOpc = X86_VCMPSSrm_alt; break; case X86_VCMPSSrr: NewOpc = X86_VCMPSSrr_alt; break; case X86_VCMPPDYrmi: NewOpc = X86_VCMPPDYrmi_alt; break; case X86_VCMPPDYrri: NewOpc = X86_VCMPPDYrri_alt; break; case X86_VCMPPSYrmi: NewOpc = X86_VCMPPSYrmi_alt; break; case X86_VCMPPSYrri: NewOpc = X86_VCMPPSYrri_alt; break; case X86_VCMPPDZrmi: NewOpc = X86_VCMPPDZrmi_alt; break; case X86_VCMPPDZrri: NewOpc = X86_VCMPPDZrri_alt; break; case X86_VCMPPDZrrib: NewOpc = X86_VCMPPDZrrib_alt; break; case X86_VCMPPSZrmi: NewOpc = X86_VCMPPSZrmi_alt; break; case X86_VCMPPSZrri: NewOpc = X86_VCMPPSZrri_alt; break; case X86_VCMPPSZrrib: NewOpc = X86_VCMPPSZrrib_alt; break; case X86_VCMPSDZrm: NewOpc = X86_VCMPSDZrmi_alt; break; case X86_VCMPSDZrr: NewOpc = X86_VCMPSDZrri_alt; break; case X86_VCMPSSZrm: NewOpc = X86_VCMPSSZrmi_alt; break; case X86_VCMPSSZrr: NewOpc = X86_VCMPSSZrri_alt; break; } // Switch opcode to the one that doesn't get special printing. if (NewOpc != 0) { MCInst_setOpcode(mcInst, NewOpc); } } #endif } else if (type == TYPE_AVX512ICC) { #ifndef CAPSTONE_X86_REDUCE if (immediate >= 8 || ((immediate & 0x3) == 3)) { unsigned NewOpc = 0; switch (MCInst_getOpcode(mcInst)) { default: // llvm_unreachable("unexpected opcode"); case X86_VPCMPBZ128rmi: NewOpc = X86_VPCMPBZ128rmi_alt; break; case X86_VPCMPBZ128rmik: NewOpc = X86_VPCMPBZ128rmik_alt; break; case X86_VPCMPBZ128rri: NewOpc = X86_VPCMPBZ128rri_alt; break; case X86_VPCMPBZ128rrik: NewOpc = X86_VPCMPBZ128rrik_alt; break; case X86_VPCMPBZ256rmi: NewOpc = X86_VPCMPBZ256rmi_alt; break; case X86_VPCMPBZ256rmik: NewOpc = X86_VPCMPBZ256rmik_alt; break; case X86_VPCMPBZ256rri: NewOpc = X86_VPCMPBZ256rri_alt; break; case X86_VPCMPBZ256rrik: NewOpc = X86_VPCMPBZ256rrik_alt; break; case X86_VPCMPBZrmi: NewOpc = X86_VPCMPBZrmi_alt; break; case X86_VPCMPBZrmik: NewOpc = X86_VPCMPBZrmik_alt; break; case X86_VPCMPBZrri: NewOpc = X86_VPCMPBZrri_alt; break; case X86_VPCMPBZrrik: NewOpc = X86_VPCMPBZrrik_alt; break; case X86_VPCMPDZ128rmi: NewOpc = X86_VPCMPDZ128rmi_alt; break; case X86_VPCMPDZ128rmib: NewOpc = X86_VPCMPDZ128rmib_alt; break; case X86_VPCMPDZ128rmibk: NewOpc = X86_VPCMPDZ128rmibk_alt; break; case X86_VPCMPDZ128rmik: NewOpc = X86_VPCMPDZ128rmik_alt; break; case X86_VPCMPDZ128rri: NewOpc = X86_VPCMPDZ128rri_alt; break; case X86_VPCMPDZ128rrik: NewOpc = X86_VPCMPDZ128rrik_alt; break; case X86_VPCMPDZ256rmi: NewOpc = X86_VPCMPDZ256rmi_alt; break; case X86_VPCMPDZ256rmib: NewOpc = X86_VPCMPDZ256rmib_alt; break; case X86_VPCMPDZ256rmibk: NewOpc = X86_VPCMPDZ256rmibk_alt; break; case X86_VPCMPDZ256rmik: NewOpc = X86_VPCMPDZ256rmik_alt; break; case X86_VPCMPDZ256rri: NewOpc = X86_VPCMPDZ256rri_alt; break; case X86_VPCMPDZ256rrik: NewOpc = X86_VPCMPDZ256rrik_alt; break; case X86_VPCMPDZrmi: NewOpc = X86_VPCMPDZrmi_alt; break; case X86_VPCMPDZrmib: NewOpc = X86_VPCMPDZrmib_alt; break; case X86_VPCMPDZrmibk: NewOpc = X86_VPCMPDZrmibk_alt; break; case X86_VPCMPDZrmik: NewOpc = X86_VPCMPDZrmik_alt; break; case X86_VPCMPDZrri: NewOpc = X86_VPCMPDZrri_alt; break; case X86_VPCMPDZrrik: NewOpc = X86_VPCMPDZrrik_alt; break; case X86_VPCMPQZ128rmi: NewOpc = X86_VPCMPQZ128rmi_alt; break; case X86_VPCMPQZ128rmib: NewOpc = X86_VPCMPQZ128rmib_alt; break; case X86_VPCMPQZ128rmibk: NewOpc = X86_VPCMPQZ128rmibk_alt; break; case X86_VPCMPQZ128rmik: NewOpc = X86_VPCMPQZ128rmik_alt; break; case X86_VPCMPQZ128rri: NewOpc = X86_VPCMPQZ128rri_alt; break; case X86_VPCMPQZ128rrik: NewOpc = X86_VPCMPQZ128rrik_alt; break; case X86_VPCMPQZ256rmi: NewOpc = X86_VPCMPQZ256rmi_alt; break; case X86_VPCMPQZ256rmib: NewOpc = X86_VPCMPQZ256rmib_alt; break; case X86_VPCMPQZ256rmibk: NewOpc = X86_VPCMPQZ256rmibk_alt; break; case X86_VPCMPQZ256rmik: NewOpc = X86_VPCMPQZ256rmik_alt; break; case X86_VPCMPQZ256rri: NewOpc = X86_VPCMPQZ256rri_alt; break; case X86_VPCMPQZ256rrik: NewOpc = X86_VPCMPQZ256rrik_alt; break; case X86_VPCMPQZrmi: NewOpc = X86_VPCMPQZrmi_alt; break; case X86_VPCMPQZrmib: NewOpc = X86_VPCMPQZrmib_alt; break; case X86_VPCMPQZrmibk: NewOpc = X86_VPCMPQZrmibk_alt; break; case X86_VPCMPQZrmik: NewOpc = X86_VPCMPQZrmik_alt; break; case X86_VPCMPQZrri: NewOpc = X86_VPCMPQZrri_alt; break; case X86_VPCMPQZrrik: NewOpc = X86_VPCMPQZrrik_alt; break; case X86_VPCMPUBZ128rmi: NewOpc = X86_VPCMPUBZ128rmi_alt; break; case X86_VPCMPUBZ128rmik: NewOpc = X86_VPCMPUBZ128rmik_alt; break; case X86_VPCMPUBZ128rri: NewOpc = X86_VPCMPUBZ128rri_alt; break; case X86_VPCMPUBZ128rrik: NewOpc = X86_VPCMPUBZ128rrik_alt; break; case X86_VPCMPUBZ256rmi: NewOpc = X86_VPCMPUBZ256rmi_alt; break; case X86_VPCMPUBZ256rmik: NewOpc = X86_VPCMPUBZ256rmik_alt; break; case X86_VPCMPUBZ256rri: NewOpc = X86_VPCMPUBZ256rri_alt; break; case X86_VPCMPUBZ256rrik: NewOpc = X86_VPCMPUBZ256rrik_alt; break; case X86_VPCMPUBZrmi: NewOpc = X86_VPCMPUBZrmi_alt; break; case X86_VPCMPUBZrmik: NewOpc = X86_VPCMPUBZrmik_alt; break; case X86_VPCMPUBZrri: NewOpc = X86_VPCMPUBZrri_alt; break; case X86_VPCMPUBZrrik: NewOpc = X86_VPCMPUBZrrik_alt; break; case X86_VPCMPUDZ128rmi: NewOpc = X86_VPCMPUDZ128rmi_alt; break; case X86_VPCMPUDZ128rmib: NewOpc = X86_VPCMPUDZ128rmib_alt; break; case X86_VPCMPUDZ128rmibk: NewOpc = X86_VPCMPUDZ128rmibk_alt; break; case X86_VPCMPUDZ128rmik: NewOpc = X86_VPCMPUDZ128rmik_alt; break; case X86_VPCMPUDZ128rri: NewOpc = X86_VPCMPUDZ128rri_alt; break; case X86_VPCMPUDZ128rrik: NewOpc = X86_VPCMPUDZ128rrik_alt; break; case X86_VPCMPUDZ256rmi: NewOpc = X86_VPCMPUDZ256rmi_alt; break; case X86_VPCMPUDZ256rmib: NewOpc = X86_VPCMPUDZ256rmib_alt; break; case X86_VPCMPUDZ256rmibk: NewOpc = X86_VPCMPUDZ256rmibk_alt; break; case X86_VPCMPUDZ256rmik: NewOpc = X86_VPCMPUDZ256rmik_alt; break; case X86_VPCMPUDZ256rri: NewOpc = X86_VPCMPUDZ256rri_alt; break; case X86_VPCMPUDZ256rrik: NewOpc = X86_VPCMPUDZ256rrik_alt; break; case X86_VPCMPUDZrmi: NewOpc = X86_VPCMPUDZrmi_alt; break; case X86_VPCMPUDZrmib: NewOpc = X86_VPCMPUDZrmib_alt; break; case X86_VPCMPUDZrmibk: NewOpc = X86_VPCMPUDZrmibk_alt; break; case X86_VPCMPUDZrmik: NewOpc = X86_VPCMPUDZrmik_alt; break; case X86_VPCMPUDZrri: NewOpc = X86_VPCMPUDZrri_alt; break; case X86_VPCMPUDZrrik: NewOpc = X86_VPCMPUDZrrik_alt; break; case X86_VPCMPUQZ128rmi: NewOpc = X86_VPCMPUQZ128rmi_alt; break; case X86_VPCMPUQZ128rmib: NewOpc = X86_VPCMPUQZ128rmib_alt; break; case X86_VPCMPUQZ128rmibk: NewOpc = X86_VPCMPUQZ128rmibk_alt; break; case X86_VPCMPUQZ128rmik: NewOpc = X86_VPCMPUQZ128rmik_alt; break; case X86_VPCMPUQZ128rri: NewOpc = X86_VPCMPUQZ128rri_alt; break; case X86_VPCMPUQZ128rrik: NewOpc = X86_VPCMPUQZ128rrik_alt; break; case X86_VPCMPUQZ256rmi: NewOpc = X86_VPCMPUQZ256rmi_alt; break; case X86_VPCMPUQZ256rmib: NewOpc = X86_VPCMPUQZ256rmib_alt; break; case X86_VPCMPUQZ256rmibk: NewOpc = X86_VPCMPUQZ256rmibk_alt; break; case X86_VPCMPUQZ256rmik: NewOpc = X86_VPCMPUQZ256rmik_alt; break; case X86_VPCMPUQZ256rri: NewOpc = X86_VPCMPUQZ256rri_alt; break; case X86_VPCMPUQZ256rrik: NewOpc = X86_VPCMPUQZ256rrik_alt; break; case X86_VPCMPUQZrmi: NewOpc = X86_VPCMPUQZrmi_alt; break; case X86_VPCMPUQZrmib: NewOpc = X86_VPCMPUQZrmib_alt; break; case X86_VPCMPUQZrmibk: NewOpc = X86_VPCMPUQZrmibk_alt; break; case X86_VPCMPUQZrmik: NewOpc = X86_VPCMPUQZrmik_alt; break; case X86_VPCMPUQZrri: NewOpc = X86_VPCMPUQZrri_alt; break; case X86_VPCMPUQZrrik: NewOpc = X86_VPCMPUQZrrik_alt; break; case X86_VPCMPUWZ128rmi: NewOpc = X86_VPCMPUWZ128rmi_alt; break; case X86_VPCMPUWZ128rmik: NewOpc = X86_VPCMPUWZ128rmik_alt; break; case X86_VPCMPUWZ128rri: NewOpc = X86_VPCMPUWZ128rri_alt; break; case X86_VPCMPUWZ128rrik: NewOpc = X86_VPCMPUWZ128rrik_alt; break; case X86_VPCMPUWZ256rmi: NewOpc = X86_VPCMPUWZ256rmi_alt; break; case X86_VPCMPUWZ256rmik: NewOpc = X86_VPCMPUWZ256rmik_alt; break; case X86_VPCMPUWZ256rri: NewOpc = X86_VPCMPUWZ256rri_alt; break; case X86_VPCMPUWZ256rrik: NewOpc = X86_VPCMPUWZ256rrik_alt; break; case X86_VPCMPUWZrmi: NewOpc = X86_VPCMPUWZrmi_alt; break; case X86_VPCMPUWZrmik: NewOpc = X86_VPCMPUWZrmik_alt; break; case X86_VPCMPUWZrri: NewOpc = X86_VPCMPUWZrri_alt; break; case X86_VPCMPUWZrrik: NewOpc = X86_VPCMPUWZrrik_alt; break; case X86_VPCMPWZ128rmi: NewOpc = X86_VPCMPWZ128rmi_alt; break; case X86_VPCMPWZ128rmik: NewOpc = X86_VPCMPWZ128rmik_alt; break; case X86_VPCMPWZ128rri: NewOpc = X86_VPCMPWZ128rri_alt; break; case X86_VPCMPWZ128rrik: NewOpc = X86_VPCMPWZ128rrik_alt; break; case X86_VPCMPWZ256rmi: NewOpc = X86_VPCMPWZ256rmi_alt; break; case X86_VPCMPWZ256rmik: NewOpc = X86_VPCMPWZ256rmik_alt; break; case X86_VPCMPWZ256rri: NewOpc = X86_VPCMPWZ256rri_alt; break; case X86_VPCMPWZ256rrik: NewOpc = X86_VPCMPWZ256rrik_alt; break; case X86_VPCMPWZrmi: NewOpc = X86_VPCMPWZrmi_alt; break; case X86_VPCMPWZrmik: NewOpc = X86_VPCMPWZrmik_alt; break; case X86_VPCMPWZrri: NewOpc = X86_VPCMPWZrri_alt; break; case X86_VPCMPWZrrik: NewOpc = X86_VPCMPWZrrik_alt; break; } // Switch opcode to the one that doesn't get special printing. if (NewOpc != 0) { MCInst_setOpcode(mcInst, NewOpc); } } #endif } switch (type) { case TYPE_XMM32: case TYPE_XMM64: case TYPE_XMM128: MCOperand_CreateReg0(mcInst, X86_XMM0 + ((uint32_t)immediate >> 4)); return; case TYPE_XMM256: MCOperand_CreateReg0(mcInst, X86_YMM0 + ((uint32_t)immediate >> 4)); return; case TYPE_XMM512: MCOperand_CreateReg0(mcInst, X86_ZMM0 + ((uint32_t)immediate >> 4)); return; case TYPE_REL8: if(immediate & 0x80) immediate |= ~(0xffull); break; case TYPE_REL32: case TYPE_REL64: if(immediate & 0x80000000) immediate |= ~(0xffffffffull); break; default: // operand is 64 bits wide. Do nothing. break; } MCOperand_CreateImm0(mcInst, immediate); if (type == TYPE_MOFFS8 || type == TYPE_MOFFS16 || type == TYPE_MOFFS32 || type == TYPE_MOFFS64) { MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); } } /// translateRMRegister - Translates a register stored in the R/M field of the /// ModR/M byte to its LLVM equivalent and appends it to an MCInst. /// @param mcInst - The MCInst to append to. /// @param insn - The internal instruction to extract the R/M field /// from. /// @return - 0 on success; -1 otherwise static bool translateRMRegister(MCInst *mcInst, InternalInstruction *insn) { if (insn->eaBase == EA_BASE_sib || insn->eaBase == EA_BASE_sib64) { //debug("A R/M register operand may not have a SIB byte"); return true; } switch (insn->eaBase) { case EA_BASE_NONE: //debug("EA_BASE_NONE for ModR/M base"); return true; #define ENTRY(x) case EA_BASE_##x: ALL_EA_BASES #undef ENTRY //debug("A R/M register operand may not have a base; " // "the operand must be a register."); return true; #define ENTRY(x) \ case EA_REG_##x: \ MCOperand_CreateReg0(mcInst, X86_##x); break; ALL_REGS #undef ENTRY default: //debug("Unexpected EA base register"); return true; } return false; } /// translateRMMemory - Translates a memory operand stored in the Mod and R/M /// fields of an internal instruction (and possibly its SIB byte) to a memory /// operand in LLVM's format, and appends it to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param insn - The instruction to extract Mod, R/M, and SIB fields /// from. /// @return - 0 on success; nonzero otherwise static bool translateRMMemory(MCInst *mcInst, InternalInstruction *insn) { // Addresses in an MCInst are represented as five operands: // 1. basereg (register) The R/M base, or (if there is a SIB) the // SIB base // 2. scaleamount (immediate) 1, or (if there is a SIB) the specified // scale amount // 3. indexreg (register) x86_registerNONE, or (if there is a SIB) // the index (which is multiplied by the // scale amount) // 4. displacement (immediate) 0, or the displacement if there is one // 5. segmentreg (register) x86_registerNONE for now, but could be set // if we have segment overrides bool IndexIs512, IndexIs128, IndexIs256; int scaleAmount, indexReg; #ifndef CAPSTONE_X86_REDUCE uint32_t Opcode; #endif if (insn->eaBase == EA_BASE_sib || insn->eaBase == EA_BASE_sib64) { if (insn->sibBase != SIB_BASE_NONE) { switch (insn->sibBase) { #define ENTRY(x) \ case SIB_BASE_##x: \ MCOperand_CreateReg0(mcInst, X86_##x); break; ALL_SIB_BASES #undef ENTRY default: //debug("Unexpected sibBase"); return true; } } else { MCOperand_CreateReg0(mcInst, 0); } // Check whether we are handling VSIB addressing mode for GATHER. // If sibIndex was set to SIB_INDEX_NONE, index offset is 4 and // we should use SIB_INDEX_XMM4|YMM4 for VSIB. // I don't see a way to get the correct IndexReg in readSIB: // We can tell whether it is VSIB or SIB after instruction ID is decoded, // but instruction ID may not be decoded yet when calling readSIB. #ifndef CAPSTONE_X86_REDUCE Opcode = MCInst_getOpcode(mcInst); #endif IndexIs128 = ( #ifndef CAPSTONE_X86_REDUCE Opcode == X86_VGATHERDPDrm || Opcode == X86_VGATHERDPDYrm || Opcode == X86_VGATHERQPDrm || Opcode == X86_VGATHERDPSrm || Opcode == X86_VGATHERQPSrm || Opcode == X86_VPGATHERDQrm || Opcode == X86_VPGATHERDQYrm || Opcode == X86_VPGATHERQQrm || Opcode == X86_VPGATHERDDrm || Opcode == X86_VPGATHERQDrm || #endif false ); IndexIs256 = ( #ifndef CAPSTONE_X86_REDUCE Opcode == X86_VGATHERQPDYrm || Opcode == X86_VGATHERDPSYrm || Opcode == X86_VGATHERQPSYrm || Opcode == X86_VGATHERDPDZrm || Opcode == X86_VPGATHERDQZrm || Opcode == X86_VPGATHERQQYrm || Opcode == X86_VPGATHERDDYrm || Opcode == X86_VPGATHERQDYrm || #endif false ); IndexIs512 = ( #ifndef CAPSTONE_X86_REDUCE Opcode == X86_VGATHERQPDZrm || Opcode == X86_VGATHERDPSZrm || Opcode == X86_VGATHERQPSZrm || Opcode == X86_VPGATHERQQZrm || Opcode == X86_VPGATHERDDZrm || Opcode == X86_VPGATHERQDZrm || #endif false ); if (IndexIs128 || IndexIs256 || IndexIs512) { unsigned IndexOffset = insn->sibIndex - (insn->addressSize == 8 ? SIB_INDEX_RAX:SIB_INDEX_EAX); SIBIndex IndexBase = IndexIs512 ? SIB_INDEX_ZMM0 : IndexIs256 ? SIB_INDEX_YMM0 : SIB_INDEX_XMM0; insn->sibIndex = (SIBIndex)(IndexBase + (insn->sibIndex == SIB_INDEX_NONE ? 4 : IndexOffset)); } if (insn->sibIndex != SIB_INDEX_NONE) { switch (insn->sibIndex) { default: //debug("Unexpected sibIndex"); return true; #define ENTRY(x) \ case SIB_INDEX_##x: \ indexReg = X86_##x; break; EA_BASES_32BIT EA_BASES_64BIT REGS_XMM REGS_YMM REGS_ZMM #undef ENTRY } } else { indexReg = 0; } scaleAmount = insn->sibScale; } else { switch (insn->eaBase) { case EA_BASE_NONE: if (insn->eaDisplacement == EA_DISP_NONE) { //debug("EA_BASE_NONE and EA_DISP_NONE for ModR/M base"); return true; } if (insn->mode == MODE_64BIT) { if (insn->prefix3 == 0x67) // address-size prefix overrides RIP relative addressing MCOperand_CreateReg0(mcInst, X86_EIP); else MCOperand_CreateReg0(mcInst, X86_RIP); // Section 2.2.1.6 } else { MCOperand_CreateReg0(mcInst, 0); } indexReg = 0; break; case EA_BASE_BX_SI: MCOperand_CreateReg0(mcInst, X86_BX); indexReg = X86_SI; break; case EA_BASE_BX_DI: MCOperand_CreateReg0(mcInst, X86_BX); indexReg = X86_DI; break; case EA_BASE_BP_SI: MCOperand_CreateReg0(mcInst, X86_BP); indexReg = X86_SI; break; case EA_BASE_BP_DI: MCOperand_CreateReg0(mcInst, X86_BP); indexReg = X86_DI; break; default: indexReg = 0; switch (insn->eaBase) { default: //debug("Unexpected eaBase"); return true; // Here, we will use the fill-ins defined above. However, // BX_SI, BX_DI, BP_SI, and BP_DI are all handled above and // sib and sib64 were handled in the top-level if, so they're only // placeholders to keep the compiler happy. #define ENTRY(x) \ case EA_BASE_##x: \ MCOperand_CreateReg0(mcInst, X86_##x); break; ALL_EA_BASES #undef ENTRY #define ENTRY(x) case EA_REG_##x: ALL_REGS #undef ENTRY //debug("A R/M memory operand may not be a register; " // "the base field must be a base."); return true; } } scaleAmount = 1; } MCOperand_CreateImm0(mcInst, scaleAmount); MCOperand_CreateReg0(mcInst, indexReg); MCOperand_CreateImm0(mcInst, insn->displacement); MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); return false; } /// translateRM - Translates an operand stored in the R/M (and possibly SIB) /// byte of an instruction to LLVM form, and appends it to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param operand - The operand, as stored in the descriptor table. /// @param insn - The instruction to extract Mod, R/M, and SIB fields /// from. /// @return - 0 on success; nonzero otherwise static bool translateRM(MCInst *mcInst, const OperandSpecifier *operand, InternalInstruction *insn) { switch (operand->type) { case TYPE_R8: case TYPE_R16: case TYPE_R32: case TYPE_R64: case TYPE_Rv: case TYPE_MM64: case TYPE_XMM: case TYPE_XMM32: case TYPE_XMM64: case TYPE_XMM128: case TYPE_XMM256: case TYPE_XMM512: case TYPE_VK1: case TYPE_VK8: case TYPE_VK16: case TYPE_DEBUGREG: case TYPE_CONTROLREG: return translateRMRegister(mcInst, insn); case TYPE_M: case TYPE_M8: case TYPE_M16: case TYPE_M32: case TYPE_M64: case TYPE_M128: case TYPE_M256: case TYPE_M512: case TYPE_Mv: case TYPE_M32FP: case TYPE_M64FP: case TYPE_M80FP: case TYPE_M1616: case TYPE_M1632: case TYPE_M1664: case TYPE_LEA: return translateRMMemory(mcInst, insn); default: //debug("Unexpected type for a R/M operand"); return true; } } /// translateFPRegister - Translates a stack position on the FPU stack to its /// LLVM form, and appends it to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param stackPos - The stack position to translate. static void translateFPRegister(MCInst *mcInst, uint8_t stackPos) { MCOperand_CreateReg0(mcInst, X86_ST0 + stackPos); } /// translateMaskRegister - Translates a 3-bit mask register number to /// LLVM form, and appends it to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param maskRegNum - Number of mask register from 0 to 7. /// @return - false on success; true otherwise. static bool translateMaskRegister(MCInst *mcInst, uint8_t maskRegNum) { if (maskRegNum >= 8) { // debug("Invalid mask register number"); return true; } MCOperand_CreateReg0(mcInst, X86_K0 + maskRegNum); return false; } /// translateOperand - Translates an operand stored in an internal instruction /// to LLVM's format and appends it to an MCInst. /// /// @param mcInst - The MCInst to append to. /// @param operand - The operand, as stored in the descriptor table. /// @param insn - The internal instruction. /// @return - false on success; true otherwise. static bool translateOperand(MCInst *mcInst, const OperandSpecifier *operand, InternalInstruction *insn) { switch (operand->encoding) { case ENCODING_REG: translateRegister(mcInst, insn->reg); return false; case ENCODING_WRITEMASK: return translateMaskRegister(mcInst, insn->writemask); CASE_ENCODING_RM: return translateRM(mcInst, operand, insn); case ENCODING_CB: case ENCODING_CW: case ENCODING_CD: case ENCODING_CP: case ENCODING_CO: case ENCODING_CT: //debug("Translation of code offsets isn't supported."); return true; case ENCODING_IB: case ENCODING_IW: case ENCODING_ID: case ENCODING_IO: case ENCODING_Iv: case ENCODING_Ia: translateImmediate(mcInst, insn->immediates[insn->numImmediatesTranslated++], operand, insn); return false; case ENCODING_SI: return translateSrcIndex(mcInst, insn); case ENCODING_DI: return translateDstIndex(mcInst, insn); case ENCODING_RB: case ENCODING_RW: case ENCODING_RD: case ENCODING_RO: case ENCODING_Rv: translateRegister(mcInst, insn->opcodeRegister); return false; case ENCODING_FP: translateFPRegister(mcInst, insn->modRM & 7); return false; case ENCODING_VVVV: translateRegister(mcInst, insn->vvvv); return false; case ENCODING_DUP: return translateOperand(mcInst, &insn->operands[operand->type - TYPE_DUP0], insn); default: //debug("Unhandled operand encoding during translation"); return true; } } static bool translateInstruction(MCInst *mcInst, InternalInstruction *insn) { int index; if (!insn->spec) { //debug("Instruction has no specification"); return true; } MCInst_setOpcode(mcInst, insn->instructionID); // If when reading the prefix bytes we determined the overlapping 0xf2 or 0xf3 // prefix bytes should be disassembled as xrelease and xacquire then set the // opcode to those instead of the rep and repne opcodes. #ifndef CAPSTONE_X86_REDUCE if (insn->xAcquireRelease) { if (MCInst_getOpcode(mcInst) == X86_REP_PREFIX) MCInst_setOpcode(mcInst, X86_XRELEASE_PREFIX); else if (MCInst_getOpcode(mcInst) == X86_REPNE_PREFIX) MCInst_setOpcode(mcInst, X86_XACQUIRE_PREFIX); } #endif insn->numImmediatesTranslated = 0; for (index = 0; index < X86_MAX_OPERANDS; ++index) { if (insn->operands[index].encoding != ENCODING_NONE) { if (translateOperand(mcInst, &insn->operands[index], insn)) { return true; } } } return false; } static int reader(const struct reader_info *info, uint8_t *byte, uint64_t address) { if (address - info->offset >= info->size) // out of buffer range return -1; *byte = info->code[address - info->offset]; return 0; } // copy x86 detail information from internal structure to public structure static void update_pub_insn(cs_insn *pub, InternalInstruction *inter) { if (inter->vectorExtensionType != 0) memcpy(pub->detail->x86.opcode, inter->vectorExtensionPrefix, sizeof(pub->detail->x86.opcode)); else { if (inter->twoByteEscape) { if (inter->threeByteEscape) { pub->detail->x86.opcode[0] = inter->twoByteEscape; pub->detail->x86.opcode[1] = inter->threeByteEscape; pub->detail->x86.opcode[2] = inter->opcode; } else { pub->detail->x86.opcode[0] = inter->twoByteEscape; pub->detail->x86.opcode[1] = inter->opcode; } } else { pub->detail->x86.opcode[0] = inter->opcode; } } pub->detail->x86.rex = inter->rexPrefix; pub->detail->x86.addr_size = inter->addressSize; pub->detail->x86.modrm = inter->orgModRM; pub->detail->x86.encoding.modrm_offset = inter->modRMOffset; pub->detail->x86.sib = inter->sib; pub->detail->x86.sib_index = x86_map_sib_index(inter->sibIndex); pub->detail->x86.sib_scale = inter->sibScale; pub->detail->x86.sib_base = x86_map_sib_base(inter->sibBase); pub->detail->x86.disp = inter->displacement; if (inter->consumedDisplacement) { pub->detail->x86.encoding.disp_offset = inter->displacementOffset; pub->detail->x86.encoding.disp_size = inter->displacementSize; } pub->detail->x86.encoding.imm_offset = inter->immediateOffset; if (pub->detail->x86.encoding.imm_size == 0 && inter->immediateOffset != 0) pub->detail->x86.encoding.imm_size = inter->immediateSize; } void X86_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(X86RegDesc, 234, RA, PC, X86MCRegisterClasses, 79, X86RegUnitRoots, 119, X86RegDiffLists, X86RegStrings, X86SubRegIdxLists, 7, X86SubRegIdxRanges, X86RegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, X86RegDesc, 234, 0, 0, X86MCRegisterClasses, 79, 0, 0, X86RegDiffLists, 0, X86SubRegIdxLists, 7, 0); } // Public interface for the disassembler bool X86_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *_info) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; InternalInstruction insn = {0}; struct reader_info info; int ret; bool result; info.code = code; info.size = code_len; info.offset = address; if (instr->flat_insn->detail) { // instr->flat_insn->detail initialization: 3 alternatives // 1. The whole structure, this is how it's done in other arch disassemblers // Probably overkill since cs_detail is huge because of the 36 operands of ARM //memset(instr->flat_insn->detail, 0, sizeof(cs_detail)); // 2. Only the part relevant to x86 memset(instr->flat_insn->detail, 0, offsetof(cs_detail, x86) + sizeof(cs_x86)); // 3. The relevant part except for x86.operands // sizeof(cs_x86) is 0x1c0, sizeof(x86.operands) is 0x180 // marginally faster, should be okay since x86.op_count is set to 0 //memset(instr->flat_insn->detail, 0, offsetof(cs_detail, x86)+offsetof(cs_x86, operands)); } if (handle->mode & CS_MODE_16) ret = decodeInstruction(&insn, reader, &info, address, MODE_16BIT); else if (handle->mode & CS_MODE_32) ret = decodeInstruction(&insn, reader, &info, address, MODE_32BIT); else ret = decodeInstruction(&insn, reader, &info, address, MODE_64BIT); if (ret) { *size = (uint16_t)(insn.readerCursor - address); // handle some special cases here. // FIXME: fix this in the next major update. switch(*size) { default: break; case 2: { unsigned char b1 = 0, b2 = 0; reader(&info, &b1, address); reader(&info, &b2, address + 1); if (b1 == 0x0f && b2 == 0xff) { instr->Opcode = X86_UD0; instr->OpcodePub = X86_INS_UD0; strncpy(instr->assembly, "ud0", 4); if (instr->flat_insn->detail) { instr->flat_insn->detail->x86.opcode[0] = b1; instr->flat_insn->detail->x86.opcode[1] = b2; } return true; } } return false; case 4: { #ifndef CAPSTONE_X86_REDUCE if (handle->mode != CS_MODE_16) { unsigned char b1 = 0, b2 = 0, b3 = 0, b4 = 0; reader(&info, &b1, address); reader(&info, &b2, address + 1); reader(&info, &b3, address + 2); reader(&info, &b4, address + 3); if (b1 == 0xf3 && b2 == 0x0f && b3 == 0x1e && b4 == 0xfa) { instr->Opcode = X86_ENDBR64; instr->OpcodePub = X86_INS_ENDBR64; strncpy(instr->assembly, "endbr64", 8); if (instr->flat_insn->detail) { instr->flat_insn->detail->x86.opcode[0] = b1; instr->flat_insn->detail->x86.opcode[1] = b2; instr->flat_insn->detail->x86.opcode[2] = b3; instr->flat_insn->detail->x86.opcode[3] = b4; } return true; } else if (b1 == 0xf3 && b2 == 0x0f && b3 == 0x1e && b4 == 0xfb) { instr->Opcode = X86_ENDBR32; instr->OpcodePub = X86_INS_ENDBR32; strncpy(instr->assembly, "endbr32", 8); if (instr->flat_insn->detail) { instr->flat_insn->detail->x86.opcode[0] = b1; instr->flat_insn->detail->x86.opcode[1] = b2; instr->flat_insn->detail->x86.opcode[2] = b3; instr->flat_insn->detail->x86.opcode[3] = b4; } return true; } } #endif } return false; } return false; } else { *size = (uint16_t)insn.length; result = (!translateInstruction(instr, &insn)) ? true : false; if (result) { // quick fix for #904. TODO: fix this properly in the next update if (handle->mode & CS_MODE_64) { if (instr->Opcode == X86_LES16rm || instr->Opcode == X86_LES32rm) // LES is invalid in x64 return false; if (instr->Opcode == X86_LDS16rm || instr->Opcode == X86_LDS32rm) // LDS is invalid in x64 return false; } instr->imm_size = insn.immSize; // copy all prefixes instr->x86_prefix[0] = insn.prefix0; instr->x86_prefix[1] = insn.prefix1; instr->x86_prefix[2] = insn.prefix2; instr->x86_prefix[3] = insn.prefix3; instr->xAcquireRelease = insn.xAcquireRelease; if (handle->detail) { update_pub_insn(instr->flat_insn, &insn); } } return result; } } #endif capstone-sys-0.11.0/capstone/arch/X86/X86Disassembler.h010066400017500001750000000105431363402546700206730ustar0000000000000000//===-- X86Disassembler.h - Disassembler for x86 and x86_64 -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // The X86 disassembler is a table-driven disassembler for the 16-, 32-, and // 64-bit X86 instruction sets. The main decode sequence for an assembly // instruction in this disassembler is: // // 1. Read the prefix bytes and determine the attributes of the instruction. // These attributes, recorded in enum attributeBits // (X86DisassemblerDecoderCommon.h), form a bitmask. The table CONTEXTS_SYM // provides a mapping from bitmasks to contexts, which are represented by // enum InstructionContext (ibid.). // // 2. Read the opcode, and determine what kind of opcode it is. The // disassembler distinguishes four kinds of opcodes, which are enumerated in // OpcodeType (X86DisassemblerDecoderCommon.h): one-byte (0xnn), two-byte // (0x0f 0xnn), three-byte-38 (0x0f 0x38 0xnn), or three-byte-3a // (0x0f 0x3a 0xnn). Mandatory prefixes are treated as part of the context. // // 3. Depending on the opcode type, look in one of four ClassDecision structures // (X86DisassemblerDecoderCommon.h). Use the opcode class to determine which // OpcodeDecision (ibid.) to look the opcode in. Look up the opcode, to get // a ModRMDecision (ibid.). // // 4. Some instructions, such as escape opcodes or extended opcodes, or even // instructions that have ModRM*Reg / ModRM*Mem forms in LLVM, need the // ModR/M byte to complete decode. The ModRMDecision's type is an entry from // ModRMDecisionType (X86DisassemblerDecoderCommon.h) that indicates if the // ModR/M byte is required and how to interpret it. // // 5. After resolving the ModRMDecision, the disassembler has a unique ID // of type InstrUID (X86DisassemblerDecoderCommon.h). Looking this ID up in // INSTRUCTIONS_SYM yields the name of the instruction and the encodings and // meanings of its operands. // // 6. For each operand, its encoding is an entry from OperandEncoding // (X86DisassemblerDecoderCommon.h) and its type is an entry from // OperandType (ibid.). The encoding indicates how to read it from the // instruction; the type indicates how to interpret the value once it has // been read. For example, a register operand could be stored in the R/M // field of the ModR/M byte, the REG field of the ModR/M byte, or added to // the main opcode. This is orthogonal from its meaning (an GPR or an XMM // register, for instance). Given this information, the operands can be // extracted and interpreted. // // 7. As the last step, the disassembler translates the instruction information // and operands into a format understandable by the client - in this case, an // MCInst for use by the MC infrastructure. // // The disassembler is broken broadly into two parts: the table emitter that // emits the instruction decode tables discussed above during compilation, and // the disassembler itself. The table emitter is documented in more detail in // utils/TableGen/X86DisassemblerEmitter.h. // // X86Disassembler.h contains the public interface for the disassembler, // adhering to the MCDisassembler interface. // X86Disassembler.cpp contains the code responsible for step 7, and for // invoking the decoder to execute steps 1-6. // X86DisassemblerDecoderCommon.h contains the definitions needed by both the // table emitter and the disassembler. // X86DisassemblerDecoder.h contains the public interface of the decoder, // factored out into C for possible use by other projects. // X86DisassemblerDecoder.c contains the source code of the decoder, which is // responsible for steps 1-6. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_X86_DISASSEMBLER_H #define CS_X86_DISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "X86DisassemblerDecoderCommon.h" bool X86_getInstruction(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); void X86_init(MCRegisterInfo *MRI); #endif capstone-sys-0.11.0/capstone/arch/X86/X86DisassemblerDecoder.c010066400017500001750000002054671363403403300221540ustar0000000000000000/*===-- X86DisassemblerDecoder.c - Disassembler decoder ------------*- C -*-===* * * The LLVM Compiler Infrastructure * * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * *===----------------------------------------------------------------------===* * * This file is part of the X86 Disassembler. * It contains the implementation of the instruction decoder. * Documentation for the disassembler can be found in X86Disassembler.h. * *===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_X86 #include /* for va_*() */ #if defined(CAPSTONE_HAS_OSXKERNEL) #include #else #include /* for exit() */ #endif #include "../../cs_priv.h" #include "../../utils.h" #include "X86DisassemblerDecoder.h" /// Specifies whether a ModR/M byte is needed and (if so) which /// instruction each possible value of the ModR/M byte corresponds to. Once /// this information is known, we have narrowed down to a single instruction. struct ModRMDecision { uint8_t modrm_type; uint16_t instructionIDs; }; /// Specifies which set of ModR/M->instruction tables to look at /// given a particular opcode. struct OpcodeDecision { struct ModRMDecision modRMDecisions[256]; }; /// Specifies which opcode->instruction tables to look at given /// a particular context (set of attributes). Since there are many possible /// contexts, the decoder first uses CONTEXTS_SYM to determine which context /// applies given a specific set of attributes. Hence there are only IC_max /// entries in this table, rather than 2^(ATTR_max). struct ContextDecision { struct OpcodeDecision opcodeDecisions[IC_max]; }; #ifdef CAPSTONE_X86_REDUCE #include "X86GenDisassemblerTables_reduce.inc" #else #include "X86GenDisassemblerTables.inc" #endif //#define GET_INSTRINFO_ENUM #define GET_INSTRINFO_MC_DESC #ifdef CAPSTONE_X86_REDUCE #include "X86GenInstrInfo_reduce.inc" #else #include "X86GenInstrInfo.inc" #endif /* * contextForAttrs - Client for the instruction context table. Takes a set of * attributes and returns the appropriate decode context. * * @param attrMask - Attributes, from the enumeration attributeBits. * @return - The InstructionContext to use when looking up an * an instruction with these attributes. */ static InstructionContext contextForAttrs(uint16_t attrMask) { return CONTEXTS_SYM[attrMask]; } /* * modRMRequired - Reads the appropriate instruction table to determine whether * the ModR/M byte is required to decode a particular instruction. * * @param type - The opcode type (i.e., how many bytes it has). * @param insnContext - The context for the instruction, as returned by * contextForAttrs. * @param opcode - The last byte of the instruction's opcode, not counting * ModR/M extensions and escapes. * @return - true if the ModR/M byte is required, false otherwise. */ static int modRMRequired(OpcodeType type, InstructionContext insnContext, uint16_t opcode) { const struct OpcodeDecision *decision = NULL; const uint8_t *indextable = NULL; uint8_t index; switch (type) { default: case ONEBYTE: decision = ONEBYTE_SYM; indextable = index_x86DisassemblerOneByteOpcodes; break; case TWOBYTE: decision = TWOBYTE_SYM; indextable = index_x86DisassemblerTwoByteOpcodes; break; case THREEBYTE_38: decision = THREEBYTE38_SYM; indextable = index_x86DisassemblerThreeByte38Opcodes; break; case THREEBYTE_3A: decision = THREEBYTE3A_SYM; indextable = index_x86DisassemblerThreeByte3AOpcodes; break; #ifndef CAPSTONE_X86_REDUCE case XOP8_MAP: decision = XOP8_MAP_SYM; indextable = index_x86DisassemblerXOP8Opcodes; break; case XOP9_MAP: decision = XOP9_MAP_SYM; indextable = index_x86DisassemblerXOP9Opcodes; break; case XOPA_MAP: decision = XOPA_MAP_SYM; indextable = index_x86DisassemblerXOPAOpcodes; break; case T3DNOW_MAP: // 3DNow instructions always have ModRM byte return true; #endif } index = indextable[insnContext]; if (index) return decision[index - 1].modRMDecisions[opcode].modrm_type != MODRM_ONEENTRY; else return false; } /* * decode - Reads the appropriate instruction table to obtain the unique ID of * an instruction. * * @param type - See modRMRequired(). * @param insnContext - See modRMRequired(). * @param opcode - See modRMRequired(). * @param modRM - The ModR/M byte if required, or any value if not. * @return - The UID of the instruction, or 0 on failure. */ static InstrUID decode(OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM) { const struct ModRMDecision *dec = NULL; const uint8_t *indextable = NULL; uint8_t index; switch (type) { default: case ONEBYTE: indextable = index_x86DisassemblerOneByteOpcodes; index = indextable[insnContext]; if (index) dec = &ONEBYTE_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; case TWOBYTE: indextable = index_x86DisassemblerTwoByteOpcodes; index = indextable[insnContext]; if (index) dec = &TWOBYTE_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; case THREEBYTE_38: indextable = index_x86DisassemblerThreeByte38Opcodes; index = indextable[insnContext]; if (index) dec = &THREEBYTE38_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; case THREEBYTE_3A: indextable = index_x86DisassemblerThreeByte3AOpcodes; index = indextable[insnContext]; if (index) dec = &THREEBYTE3A_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; #ifndef CAPSTONE_X86_REDUCE case XOP8_MAP: indextable = index_x86DisassemblerXOP8Opcodes; index = indextable[insnContext]; if (index) dec = &XOP8_MAP_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; case XOP9_MAP: indextable = index_x86DisassemblerXOP9Opcodes; index = indextable[insnContext]; if (index) dec = &XOP9_MAP_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; case XOPA_MAP: indextable = index_x86DisassemblerXOPAOpcodes; index = indextable[insnContext]; if (index) dec = &XOPA_MAP_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; case T3DNOW_MAP: indextable = index_x86DisassemblerT3DNOWOpcodes; index = indextable[insnContext]; if (index) dec = &T3DNOW_MAP_SYM[index - 1].modRMDecisions[opcode]; else dec = &emptyTable.modRMDecisions[opcode]; break; #endif } switch (dec->modrm_type) { default: //debug("Corrupt table! Unknown modrm_type"); return 0; case MODRM_ONEENTRY: return modRMTable[dec->instructionIDs]; case MODRM_SPLITRM: if (modFromModRM(modRM) == 0x3) return modRMTable[dec->instructionIDs+1]; return modRMTable[dec->instructionIDs]; case MODRM_SPLITREG: if (modFromModRM(modRM) == 0x3) return modRMTable[dec->instructionIDs+((modRM & 0x38) >> 3)+8]; return modRMTable[dec->instructionIDs+((modRM & 0x38) >> 3)]; case MODRM_SPLITMISC: if (modFromModRM(modRM) == 0x3) return modRMTable[dec->instructionIDs+(modRM & 0x3f)+8]; return modRMTable[dec->instructionIDs+((modRM & 0x38) >> 3)]; case MODRM_FULL: return modRMTable[dec->instructionIDs+modRM]; } } /* * specifierForUID - Given a UID, returns the name and operand specification for * that instruction. * * @param uid - The unique ID for the instruction. This should be returned by * decode(); specifierForUID will not check bounds. * @return - A pointer to the specification for that instruction. */ static const struct InstructionSpecifier *specifierForUID(InstrUID uid) { return &INSTRUCTIONS_SYM[uid]; } /* * consumeByte - Uses the reader function provided by the user to consume one * byte from the instruction's memory and advance the cursor. * * @param insn - The instruction with the reader function to use. The cursor * for this instruction is advanced. * @param byte - A pointer to a pre-allocated memory buffer to be populated * with the data read. * @return - 0 if the read was successful; nonzero otherwise. */ static int consumeByte(struct InternalInstruction *insn, uint8_t *byte) { int ret = insn->reader(insn->readerArg, byte, insn->readerCursor); if (!ret) ++(insn->readerCursor); return ret; } /* * lookAtByte - Like consumeByte, but does not advance the cursor. * * @param insn - See consumeByte(). * @param byte - See consumeByte(). * @return - See consumeByte(). */ static int lookAtByte(struct InternalInstruction *insn, uint8_t *byte) { return insn->reader(insn->readerArg, byte, insn->readerCursor); } static void unconsumeByte(struct InternalInstruction *insn) { insn->readerCursor--; } #define CONSUME_FUNC(name, type) \ static int name(struct InternalInstruction *insn, type *ptr) { \ type combined = 0; \ unsigned offset; \ for (offset = 0; offset < sizeof(type); ++offset) { \ uint8_t byte; \ int ret = insn->reader(insn->readerArg, \ &byte, \ insn->readerCursor + offset); \ if (ret) \ return ret; \ combined = combined | (type)((uint64_t)byte << (offset * 8)); \ } \ *ptr = combined; \ insn->readerCursor += sizeof(type); \ return 0; \ } /* * consume* - Use the reader function provided by the user to consume data * values of various sizes from the instruction's memory and advance the * cursor appropriately. These readers perform endian conversion. * * @param insn - See consumeByte(). * @param ptr - A pointer to a pre-allocated memory of appropriate size to * be populated with the data read. * @return - See consumeByte(). */ CONSUME_FUNC(consumeInt8, int8_t) CONSUME_FUNC(consumeInt16, int16_t) CONSUME_FUNC(consumeInt32, int32_t) CONSUME_FUNC(consumeUInt16, uint16_t) CONSUME_FUNC(consumeUInt32, uint32_t) CONSUME_FUNC(consumeUInt64, uint64_t) /* * setPrefixPresent - Marks that a particular prefix is present at a particular * location. * * @param insn - The instruction to be marked as having the prefix. * @param prefix - The prefix that is present. * @param location - The location where the prefix is located (in the address * space of the instruction's reader). */ static void setPrefixPresent(struct InternalInstruction *insn, uint8_t prefix, uint64_t location) { switch (prefix) { case 0x26: insn->isPrefix26 = true; insn->prefix26 = location; break; case 0x2e: insn->isPrefix2e = true; insn->prefix2e = location; break; case 0x36: insn->isPrefix36 = true; insn->prefix36 = location; break; case 0x3e: insn->isPrefix3e = true; insn->prefix3e = location; break; case 0x64: insn->isPrefix64 = true; insn->prefix64 = location; break; case 0x65: insn->isPrefix65 = true; insn->prefix65 = location; break; case 0x66: insn->isPrefix66 = true; insn->prefix66 = location; break; case 0x67: insn->isPrefix67 = true; insn->prefix67 = location; break; case 0xf0: insn->isPrefixf0 = true; insn->prefixf0 = location; break; case 0xf2: insn->isPrefixf2 = true; insn->prefixf2 = location; break; case 0xf3: insn->isPrefixf3 = true; insn->prefixf3 = location; break; default: break; } } /* * isPrefixAtLocation - Queries an instruction to determine whether a prefix is * present at a given location. * * @param insn - The instruction to be queried. * @param prefix - The prefix. * @param location - The location to query. * @return - Whether the prefix is at that location. */ static bool isPrefixAtLocation(struct InternalInstruction *insn, uint8_t prefix, uint64_t location) { switch (prefix) { case 0x26: if (insn->isPrefix26 && insn->prefix26 == location) return true; break; case 0x2e: if (insn->isPrefix2e && insn->prefix2e == location) return true; break; case 0x36: if (insn->isPrefix36 && insn->prefix36 == location) return true; break; case 0x3e: if (insn->isPrefix3e && insn->prefix3e == location) return true; break; case 0x64: if (insn->isPrefix64 && insn->prefix64 == location) return true; break; case 0x65: if (insn->isPrefix65 && insn->prefix65 == location) return true; break; case 0x66: if (insn->isPrefix66 && insn->prefix66 == location) return true; break; case 0x67: if (insn->isPrefix67 && insn->prefix67 == location) return true; break; case 0xf0: if (insn->isPrefixf0 && insn->prefixf0 == location) return true; break; case 0xf2: if (insn->isPrefixf2 && insn->prefixf2 == location) return true; break; case 0xf3: if (insn->isPrefixf3 && insn->prefixf3 == location) return true; break; default: break; } return false; } /* * readPrefixes - Consumes all of an instruction's prefix bytes, and marks the * instruction as having them. Also sets the instruction's default operand, * address, and other relevant data sizes to report operands correctly. * * @param insn - The instruction whose prefixes are to be read. * @return - 0 if the instruction could be read until the end of the prefix * bytes, and no prefixes conflicted; nonzero otherwise. */ static int readPrefixes(struct InternalInstruction *insn) { bool isPrefix = true; uint64_t prefixLocation; uint8_t byte = 0, nextByte; bool hasAdSize = false; bool hasOpSize = false; //initialize to an impossible value insn->necessaryPrefixLocation = insn->readerCursor - 1; while (isPrefix) { if (insn->mode == MODE_64BIT) { // eliminate consecutive redundant REX bytes in front if (consumeByte(insn, &byte)) return -1; if ((byte & 0xf0) == 0x40) { while(true) { if (lookAtByte(insn, &byte)) // out of input code return -1; if ((byte & 0xf0) == 0x40) { // another REX prefix, but we only remember the last one if (consumeByte(insn, &byte)) return -1; } else break; } // recover the last REX byte if next byte is not a legacy prefix switch (byte) { case 0xf2: /* REPNE/REPNZ */ case 0xf3: /* REP or REPE/REPZ */ case 0xf0: /* LOCK */ case 0x2e: /* CS segment override -OR- Branch not taken */ case 0x36: /* SS segment override -OR- Branch taken */ case 0x3e: /* DS segment override */ case 0x26: /* ES segment override */ case 0x64: /* FS segment override */ case 0x65: /* GS segment override */ case 0x66: /* Operand-size override */ case 0x67: /* Address-size override */ break; default: /* Not a prefix byte */ unconsumeByte(insn); break; } } else { unconsumeByte(insn); } } prefixLocation = insn->readerCursor; /* If we fail reading prefixes, just stop here and let the opcode reader deal with it */ if (consumeByte(insn, &byte)) return -1; if (insn->readerCursor - 1 == insn->startLocation && (byte == 0xf2 || byte == 0xf3)) { if (lookAtByte(insn, &nextByte)) return -1; /* * If the byte is 0xf2 or 0xf3, and any of the following conditions are * met: * - it is followed by a LOCK (0xf0) prefix * - it is followed by an xchg instruction * then it should be disassembled as a xacquire/xrelease not repne/rep. */ if (((nextByte == 0xf0) || ((nextByte & 0xfe) == 0x86 || (nextByte & 0xf8) == 0x90))) insn->xAcquireRelease = byte; /* * Also if the byte is 0xf3, and the following condition is met: * - it is followed by a "mov mem, reg" (opcode 0x88/0x89) or * "mov mem, imm" (opcode 0xc6/0xc7) instructions. * then it should be disassembled as an xrelease not rep. */ if (byte == 0xf3 && (nextByte == 0x88 || nextByte == 0x89 || nextByte == 0xc6 || nextByte == 0xc7)) insn->xAcquireRelease = byte; if (insn->mode == MODE_64BIT && (nextByte & 0xf0) == 0x40) { if (consumeByte(insn, &nextByte)) return -1; if (lookAtByte(insn, &nextByte)) return -1; unconsumeByte(insn); } } switch (byte) { case 0xf2: /* REPNE/REPNZ */ case 0xf3: /* REP or REPE/REPZ */ case 0xf0: /* LOCK */ // only accept the last prefix insn->isPrefixf2 = false; insn->isPrefixf3 = false; insn->isPrefixf0 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix0 = byte; break; case 0x2e: /* CS segment override -OR- Branch not taken */ insn->segmentOverride = SEG_OVERRIDE_CS; // only accept the last prefix insn->isPrefix2e = false; insn->isPrefix36 = false; insn->isPrefix3e = false; insn->isPrefix26 = false; insn->isPrefix64 = false; insn->isPrefix65 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix1 = byte; break; case 0x36: /* SS segment override -OR- Branch taken */ insn->segmentOverride = SEG_OVERRIDE_SS; // only accept the last prefix insn->isPrefix2e = false; insn->isPrefix36 = false; insn->isPrefix3e = false; insn->isPrefix26 = false; insn->isPrefix64 = false; insn->isPrefix65 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix1 = byte; break; case 0x3e: /* DS segment override */ insn->segmentOverride = SEG_OVERRIDE_DS; // only accept the last prefix insn->isPrefix2e = false; insn->isPrefix36 = false; insn->isPrefix3e = false; insn->isPrefix26 = false; insn->isPrefix64 = false; insn->isPrefix65 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix1 = byte; break; case 0x26: /* ES segment override */ insn->segmentOverride = SEG_OVERRIDE_ES; // only accept the last prefix insn->isPrefix2e = false; insn->isPrefix36 = false; insn->isPrefix3e = false; insn->isPrefix26 = false; insn->isPrefix64 = false; insn->isPrefix65 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix1 = byte; break; case 0x64: /* FS segment override */ insn->segmentOverride = SEG_OVERRIDE_FS; // only accept the last prefix insn->isPrefix2e = false; insn->isPrefix36 = false; insn->isPrefix3e = false; insn->isPrefix26 = false; insn->isPrefix64 = false; insn->isPrefix65 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix1 = byte; break; case 0x65: /* GS segment override */ insn->segmentOverride = SEG_OVERRIDE_GS; // only accept the last prefix insn->isPrefix2e = false; insn->isPrefix36 = false; insn->isPrefix3e = false; insn->isPrefix26 = false; insn->isPrefix64 = false; insn->isPrefix65 = false; setPrefixPresent(insn, byte, prefixLocation); insn->prefix1 = byte; break; case 0x66: /* Operand-size override */ hasOpSize = true; setPrefixPresent(insn, byte, prefixLocation); insn->prefix2 = byte; break; case 0x67: /* Address-size override */ hasAdSize = true; setPrefixPresent(insn, byte, prefixLocation); insn->prefix3 = byte; break; default: /* Not a prefix byte */ isPrefix = false; break; } //if (isPrefix) // dbgprintf(insn, "Found prefix 0x%hhx", byte); } insn->vectorExtensionType = TYPE_NO_VEX_XOP; if (byte == 0x62) { uint8_t byte1, byte2; if (consumeByte(insn, &byte1)) { //dbgprintf(insn, "Couldn't read second byte of EVEX prefix"); return -1; } if ((insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) && ((~byte1 & 0xc) == 0xc)) { if (lookAtByte(insn, &byte2)) { //dbgprintf(insn, "Couldn't read third byte of EVEX prefix"); return -1; } if ((byte2 & 0x4) == 0x4) { insn->vectorExtensionType = TYPE_EVEX; } else { unconsumeByte(insn); /* unconsume byte1 */ unconsumeByte(insn); /* unconsume byte */ insn->necessaryPrefixLocation = insn->readerCursor - 2; } if (insn->vectorExtensionType == TYPE_EVEX) { insn->vectorExtensionPrefix[0] = byte; insn->vectorExtensionPrefix[1] = byte1; if (consumeByte(insn, &insn->vectorExtensionPrefix[2])) { //dbgprintf(insn, "Couldn't read third byte of EVEX prefix"); return -1; } if (consumeByte(insn, &insn->vectorExtensionPrefix[3])) { //dbgprintf(insn, "Couldn't read fourth byte of EVEX prefix"); return -1; } /* We simulate the REX prefix for simplicity's sake */ if (insn->mode == MODE_64BIT) { insn->rexPrefix = 0x40 | (wFromEVEX3of4(insn->vectorExtensionPrefix[2]) << 3) | (rFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 2) | (xFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 1) | (bFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 0); } switch (ppFromEVEX3of4(insn->vectorExtensionPrefix[2])) { default: break; case VEX_PREFIX_66: hasOpSize = true; break; } //dbgprintf(insn, "Found EVEX prefix 0x%hhx 0x%hhx 0x%hhx 0x%hhx", // insn->vectorExtensionPrefix[0], insn->vectorExtensionPrefix[1], // insn->vectorExtensionPrefix[2], insn->vectorExtensionPrefix[3]); } } else { // BOUND instruction unconsumeByte(insn); /* unconsume byte1 */ unconsumeByte(insn); /* unconsume byte */ } } else if (byte == 0xc4) { uint8_t byte1; if (lookAtByte(insn, &byte1)) { //dbgprintf(insn, "Couldn't read second byte of VEX"); return -1; } if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) { insn->vectorExtensionType = TYPE_VEX_3B; insn->necessaryPrefixLocation = insn->readerCursor - 1; } else { unconsumeByte(insn); insn->necessaryPrefixLocation = insn->readerCursor - 1; } if (insn->vectorExtensionType == TYPE_VEX_3B) { insn->vectorExtensionPrefix[0] = byte; if (consumeByte(insn, &insn->vectorExtensionPrefix[1])) return -1; if (consumeByte(insn, &insn->vectorExtensionPrefix[2])) return -1; /* We simulate the REX prefix for simplicity's sake */ if (insn->mode == MODE_64BIT) { insn->rexPrefix = 0x40 | (wFromVEX3of3(insn->vectorExtensionPrefix[2]) << 3) | (rFromVEX2of3(insn->vectorExtensionPrefix[1]) << 2) | (xFromVEX2of3(insn->vectorExtensionPrefix[1]) << 1) | (bFromVEX2of3(insn->vectorExtensionPrefix[1]) << 0); } switch (ppFromVEX3of3(insn->vectorExtensionPrefix[2])) { default: break; case VEX_PREFIX_66: hasOpSize = true; break; } } } else if (byte == 0xc5) { uint8_t byte1; if (lookAtByte(insn, &byte1)) { //dbgprintf(insn, "Couldn't read second byte of VEX"); return -1; } if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) { insn->vectorExtensionType = TYPE_VEX_2B; } else { unconsumeByte(insn); } if (insn->vectorExtensionType == TYPE_VEX_2B) { insn->vectorExtensionPrefix[0] = byte; if (consumeByte(insn, &insn->vectorExtensionPrefix[1])) return -1; if (insn->mode == MODE_64BIT) { insn->rexPrefix = 0x40 | (rFromVEX2of2(insn->vectorExtensionPrefix[1]) << 2); } switch (ppFromVEX2of2(insn->vectorExtensionPrefix[1])) { default: break; case VEX_PREFIX_66: hasOpSize = true; break; } } } else if (byte == 0x8f) { uint8_t byte1; if (lookAtByte(insn, &byte1)) { // dbgprintf(insn, "Couldn't read second byte of XOP"); return -1; } if ((byte1 & 0x38) != 0x0) { /* 0 in these 3 bits is a POP instruction. */ insn->vectorExtensionType = TYPE_XOP; insn->necessaryPrefixLocation = insn->readerCursor - 1; } else { unconsumeByte(insn); insn->necessaryPrefixLocation = insn->readerCursor - 1; } if (insn->vectorExtensionType == TYPE_XOP) { insn->vectorExtensionPrefix[0] = byte; if (consumeByte(insn, &insn->vectorExtensionPrefix[1])) return -1; if (consumeByte(insn, &insn->vectorExtensionPrefix[2])) return -1; /* We simulate the REX prefix for simplicity's sake */ if (insn->mode == MODE_64BIT) { insn->rexPrefix = 0x40 | (wFromXOP3of3(insn->vectorExtensionPrefix[2]) << 3) | (rFromXOP2of3(insn->vectorExtensionPrefix[1]) << 2) | (xFromXOP2of3(insn->vectorExtensionPrefix[1]) << 1) | (bFromXOP2of3(insn->vectorExtensionPrefix[1]) << 0); } switch (ppFromXOP3of3(insn->vectorExtensionPrefix[2])) { default: break; case VEX_PREFIX_66: hasOpSize = true; break; } } } else { if (insn->mode == MODE_64BIT) { if ((byte & 0xf0) == 0x40) { uint8_t opcodeByte; while(true) { if (lookAtByte(insn, &opcodeByte)) // out of input code return -1; if ((opcodeByte & 0xf0) == 0x40) { // another REX prefix, but we only remember the last one if (consumeByte(insn, &byte)) return -1; } else break; } insn->rexPrefix = byte; insn->necessaryPrefixLocation = insn->readerCursor - 2; // dbgprintf(insn, "Found REX prefix 0x%hhx", byte); } else { unconsumeByte(insn); insn->necessaryPrefixLocation = insn->readerCursor - 1; } } else { unconsumeByte(insn); insn->necessaryPrefixLocation = insn->readerCursor - 1; } } if (insn->mode == MODE_16BIT) { insn->registerSize = (hasOpSize ? 4 : 2); insn->addressSize = (hasAdSize ? 4 : 2); insn->displacementSize = (hasAdSize ? 4 : 2); insn->immediateSize = (hasOpSize ? 4 : 2); insn->immSize = (hasOpSize ? 4 : 2); } else if (insn->mode == MODE_32BIT) { insn->registerSize = (hasOpSize ? 2 : 4); insn->addressSize = (hasAdSize ? 2 : 4); insn->displacementSize = (hasAdSize ? 2 : 4); insn->immediateSize = (hasOpSize ? 2 : 4); insn->immSize = (hasOpSize ? 2 : 4); } else if (insn->mode == MODE_64BIT) { if (insn->rexPrefix && wFromREX(insn->rexPrefix)) { insn->registerSize = 8; insn->addressSize = (hasAdSize ? 4 : 8); insn->displacementSize = 4; insn->immediateSize = 4; insn->immSize = 4; } else if (insn->rexPrefix) { insn->registerSize = (hasOpSize ? 2 : 4); insn->addressSize = (hasAdSize ? 4 : 8); insn->displacementSize = (hasOpSize ? 2 : 4); insn->immediateSize = (hasOpSize ? 2 : 4); insn->immSize = (hasOpSize ? 2 : 4); } else { insn->registerSize = (hasOpSize ? 2 : 4); insn->addressSize = (hasAdSize ? 4 : 8); insn->displacementSize = (hasOpSize ? 2 : 4); insn->immediateSize = (hasOpSize ? 2 : 4); insn->immSize = (hasOpSize ? 4 : 8); } } return 0; } static int readModRM(struct InternalInstruction *insn); /* * readOpcode - Reads the opcode (excepting the ModR/M byte in the case of * extended or escape opcodes). * * @param insn - The instruction whose opcode is to be read. * @return - 0 if the opcode could be read successfully; nonzero otherwise. */ static int readOpcode(struct InternalInstruction *insn) { /* Determine the length of the primary opcode */ uint8_t current; // printf(">>> readOpcode() = %x\n", insn->readerCursor); insn->opcodeType = ONEBYTE; insn->firstByte = 0x00; if (insn->vectorExtensionType == TYPE_EVEX) { switch (mmFromEVEX2of4(insn->vectorExtensionPrefix[1])) { default: // dbgprintf(insn, "Unhandled mm field for instruction (0x%hhx)", // mmFromEVEX2of4(insn->vectorExtensionPrefix[1])); return -1; case VEX_LOB_0F: insn->opcodeType = TWOBYTE; return consumeByte(insn, &insn->opcode); case VEX_LOB_0F38: insn->opcodeType = THREEBYTE_38; return consumeByte(insn, &insn->opcode); case VEX_LOB_0F3A: insn->opcodeType = THREEBYTE_3A; return consumeByte(insn, &insn->opcode); } } else if (insn->vectorExtensionType == TYPE_VEX_3B) { switch (mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1])) { default: // dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)", // mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1])); return -1; case VEX_LOB_0F: insn->twoByteEscape = 0x0f; insn->opcodeType = TWOBYTE; return consumeByte(insn, &insn->opcode); case VEX_LOB_0F38: insn->twoByteEscape = 0x0f; insn->threeByteEscape = 0x38; insn->opcodeType = THREEBYTE_38; return consumeByte(insn, &insn->opcode); case VEX_LOB_0F3A: insn->twoByteEscape = 0x0f; insn->threeByteEscape = 0x3a; insn->opcodeType = THREEBYTE_3A; return consumeByte(insn, &insn->opcode); } } else if (insn->vectorExtensionType == TYPE_VEX_2B) { insn->twoByteEscape = 0x0f; insn->opcodeType = TWOBYTE; return consumeByte(insn, &insn->opcode); } else if (insn->vectorExtensionType == TYPE_XOP) { switch (mmmmmFromXOP2of3(insn->vectorExtensionPrefix[1])) { default: // dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)", // mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1])); return -1; case XOP_MAP_SELECT_8: // FIXME: twoByteEscape? insn->opcodeType = XOP8_MAP; return consumeByte(insn, &insn->opcode); case XOP_MAP_SELECT_9: // FIXME: twoByteEscape? insn->opcodeType = XOP9_MAP; return consumeByte(insn, &insn->opcode); case XOP_MAP_SELECT_A: // FIXME: twoByteEscape? insn->opcodeType = XOPA_MAP; return consumeByte(insn, &insn->opcode); } } if (consumeByte(insn, ¤t)) return -1; // save this first byte for MOVcr, MOVdr, MOVrc, MOVrd insn->firstByte = current; if (current == 0x0f) { // dbgprintf(insn, "Found a two-byte escape prefix (0x%hhx)", current); insn->twoByteEscape = current; if (consumeByte(insn, ¤t)) return -1; if (current == 0x38) { // dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current); insn->threeByteEscape = current; if (consumeByte(insn, ¤t)) return -1; insn->opcodeType = THREEBYTE_38; } else if (current == 0x3a) { // dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current); insn->threeByteEscape = current; if (consumeByte(insn, ¤t)) return -1; insn->opcodeType = THREEBYTE_3A; } else { #ifndef CAPSTONE_X86_REDUCE switch(current) { default: // dbgprintf(insn, "Didn't find a three-byte escape prefix"); insn->opcodeType = TWOBYTE; break; case 0x0e: // HACK for femms. to be handled properly in next version 3.x insn->opcodeType = T3DNOW_MAP; // this encode does not have ModRM insn->consumedModRM = true; break; case 0x0f: // 3DNow instruction has weird format: ModRM/SIB/displacement + opcode if (readModRM(insn)) return -1; // next is 3DNow opcode if (consumeByte(insn, ¤t)) return -1; insn->opcodeType = T3DNOW_MAP; break; } #endif } } /* * At this point we have consumed the full opcode. * Anything we consume from here on must be unconsumed. */ insn->opcode = current; return 0; } // Hacky for FEMMS #define GET_INSTRINFO_ENUM #ifndef CAPSTONE_X86_REDUCE #include "X86GenInstrInfo.inc" #else #include "X86GenInstrInfo_reduce.inc" #endif /* * getIDWithAttrMask - Determines the ID of an instruction, consuming * the ModR/M byte as appropriate for extended and escape opcodes, * and using a supplied attribute mask. * * @param instructionID - A pointer whose target is filled in with the ID of the * instruction. * @param insn - The instruction whose ID is to be determined. * @param attrMask - The attribute mask to search. * @return - 0 if the ModR/M could be read when needed or was not * needed; nonzero otherwise. */ static int getIDWithAttrMask(uint16_t *instructionID, struct InternalInstruction *insn, uint16_t attrMask) { bool hasModRMExtension; InstructionContext instructionClass; #ifndef CAPSTONE_X86_REDUCE // HACK for femms. to be handled properly in next version 3.x if (insn->opcode == 0x0e && insn->opcodeType == T3DNOW_MAP) { *instructionID = X86_FEMMS; return 0; } #endif if (insn->opcodeType == T3DNOW_MAP) instructionClass = IC_OF; else instructionClass = contextForAttrs(attrMask); hasModRMExtension = modRMRequired(insn->opcodeType, instructionClass, insn->opcode) != 0; if (hasModRMExtension) { if (readModRM(insn)) return -1; *instructionID = decode(insn->opcodeType, instructionClass, insn->opcode, insn->modRM); } else { *instructionID = decode(insn->opcodeType, instructionClass, insn->opcode, 0); } return 0; } /* * is16BitEquivalent - Determines whether two instruction names refer to * equivalent instructions but one is 16-bit whereas the other is not. * * @param orig - The instruction ID that is not 16-bit * @param equiv - The instruction ID that is 16-bit */ static bool is16BitEquivalent(unsigned orig, unsigned equiv) { size_t i; uint16_t idx; if ((idx = x86_16_bit_eq_lookup[orig]) != 0) { for (i = idx - 1; i < ARR_SIZE(x86_16_bit_eq_tbl) && x86_16_bit_eq_tbl[i].first == orig; i++) { if (x86_16_bit_eq_tbl[i].second == equiv) return true; } } return false; } /* * is64Bit - Determines whether this instruction is a 64-bit instruction. * * @param name - The instruction that is not 16-bit */ static bool is64Bit(uint16_t id) { return is_64bit_insn[id]; } /* * getID - Determines the ID of an instruction, consuming the ModR/M byte as * appropriate for extended and escape opcodes. Determines the attributes and * context for the instruction before doing so. * * @param insn - The instruction whose ID is to be determined. * @return - 0 if the ModR/M could be read when needed or was not needed; * nonzero otherwise. */ static int getID(struct InternalInstruction *insn) { uint16_t attrMask; uint16_t instructionID; // printf(">>> getID()\n"); attrMask = ATTR_NONE; if (insn->mode == MODE_64BIT) attrMask |= ATTR_64BIT; if (insn->vectorExtensionType != TYPE_NO_VEX_XOP) { attrMask |= (insn->vectorExtensionType == TYPE_EVEX) ? ATTR_EVEX : ATTR_VEX; if (insn->vectorExtensionType == TYPE_EVEX) { switch (ppFromEVEX3of4(insn->vectorExtensionPrefix[2])) { case VEX_PREFIX_66: attrMask |= ATTR_OPSIZE; break; case VEX_PREFIX_F3: attrMask |= ATTR_XS; break; case VEX_PREFIX_F2: attrMask |= ATTR_XD; break; } if (zFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXKZ; if (bFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXB; if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXK; if (lFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXL; if (l2FromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXL2; } else if (insn->vectorExtensionType == TYPE_VEX_3B) { switch (ppFromVEX3of3(insn->vectorExtensionPrefix[2])) { case VEX_PREFIX_66: attrMask |= ATTR_OPSIZE; break; case VEX_PREFIX_F3: attrMask |= ATTR_XS; break; case VEX_PREFIX_F2: attrMask |= ATTR_XD; break; } if (lFromVEX3of3(insn->vectorExtensionPrefix[2])) attrMask |= ATTR_VEXL; } else if (insn->vectorExtensionType == TYPE_VEX_2B) { switch (ppFromVEX2of2(insn->vectorExtensionPrefix[1])) { case VEX_PREFIX_66: attrMask |= ATTR_OPSIZE; break; case VEX_PREFIX_F3: attrMask |= ATTR_XS; break; case VEX_PREFIX_F2: attrMask |= ATTR_XD; break; } if (lFromVEX2of2(insn->vectorExtensionPrefix[1])) attrMask |= ATTR_VEXL; } else if (insn->vectorExtensionType == TYPE_XOP) { switch (ppFromXOP3of3(insn->vectorExtensionPrefix[2])) { case VEX_PREFIX_66: attrMask |= ATTR_OPSIZE; break; case VEX_PREFIX_F3: attrMask |= ATTR_XS; break; case VEX_PREFIX_F2: attrMask |= ATTR_XD; break; } if (lFromXOP3of3(insn->vectorExtensionPrefix[2])) attrMask |= ATTR_VEXL; } else { return -1; } } else { if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0x66, insn->necessaryPrefixLocation)) { attrMask |= ATTR_OPSIZE; } else if (isPrefixAtLocation(insn, 0x67, insn->necessaryPrefixLocation)) { attrMask |= ATTR_ADSIZE; } else if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0xf3, insn->necessaryPrefixLocation)) { attrMask |= ATTR_XS; } else if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0xf2, insn->necessaryPrefixLocation)) { attrMask |= ATTR_XD; } } if (insn->rexPrefix & 0x08) attrMask |= ATTR_REXW; /* * JCXZ/JECXZ need special handling for 16-bit mode because the meaning * of the AdSize prefix is inverted w.r.t. 32-bit mode. */ if (insn->mode == MODE_16BIT && insn->opcodeType == ONEBYTE && insn->opcode == 0xE3) attrMask ^= ATTR_ADSIZE; if (getIDWithAttrMask(&instructionID, insn, attrMask)) return -1; /* The following clauses compensate for limitations of the tables. */ if (insn->mode != MODE_64BIT && insn->vectorExtensionType != TYPE_NO_VEX_XOP) { /* * The tables can't distinquish between cases where the W-bit is used to * select register size and cases where its a required part of the opcode. */ if ((insn->vectorExtensionType == TYPE_EVEX && wFromEVEX3of4(insn->vectorExtensionPrefix[2])) || (insn->vectorExtensionType == TYPE_VEX_3B && wFromVEX3of3(insn->vectorExtensionPrefix[2])) || (insn->vectorExtensionType == TYPE_XOP && wFromXOP3of3(insn->vectorExtensionPrefix[2]))) { uint16_t instructionIDWithREXW; if (getIDWithAttrMask(&instructionIDWithREXW, insn, attrMask | ATTR_REXW)) { insn->instructionID = instructionID; insn->spec = specifierForUID(instructionID); return 0; } // If not a 64-bit instruction. Switch the opcode. if (!is64Bit(instructionIDWithREXW)) { insn->instructionID = instructionIDWithREXW; insn->spec = specifierForUID(instructionIDWithREXW); return 0; } } } /* * Absolute moves need special handling. * -For 16-bit mode because the meaning of the AdSize and OpSize prefixes are * inverted w.r.t. * -For 32-bit mode we need to ensure the ADSIZE prefix is observed in * any position. */ if (insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) { /* Make sure we observed the prefixes in any position. */ if (insn->isPrefix67) attrMask |= ATTR_ADSIZE; if (insn->isPrefix66) attrMask |= ATTR_OPSIZE; /* In 16-bit, invert the attributes. */ if (insn->mode == MODE_16BIT) attrMask ^= ATTR_ADSIZE | ATTR_OPSIZE; if (getIDWithAttrMask(&instructionID, insn, attrMask)) return -1; insn->instructionID = instructionID; insn->spec = specifierForUID(instructionID); return 0; } if ((insn->mode == MODE_16BIT || insn->isPrefix66) && !(attrMask & ATTR_OPSIZE)) { /* * The instruction tables make no distinction between instructions that * allow OpSize anywhere (i.e., 16-bit operations) and that need it in a * particular spot (i.e., many MMX operations). In general we're * conservative, but in the specific case where OpSize is present but not * in the right place we check if there's a 16-bit operation. */ const struct InstructionSpecifier *spec; uint16_t instructionIDWithOpsize; spec = specifierForUID(instructionID); if (getIDWithAttrMask(&instructionIDWithOpsize, insn, attrMask | ATTR_OPSIZE)) { /* * ModRM required with OpSize but not present; give up and return version * without OpSize set */ insn->instructionID = instructionID; insn->spec = spec; return 0; } if (is16BitEquivalent(instructionID, instructionIDWithOpsize) && (insn->mode == MODE_16BIT) ^ insn->isPrefix66) { insn->instructionID = instructionIDWithOpsize; insn->spec = specifierForUID(instructionIDWithOpsize); } else { insn->instructionID = instructionID; insn->spec = spec; } return 0; } if (insn->opcodeType == ONEBYTE && insn->opcode == 0x90 && insn->rexPrefix & 0x01) { /* * NOOP shouldn't decode as NOOP if REX.b is set. Instead * it should decode as XCHG %r8, %eax. */ const struct InstructionSpecifier *spec; uint16_t instructionIDWithNewOpcode; const struct InstructionSpecifier *specWithNewOpcode; spec = specifierForUID(instructionID); /* Borrow opcode from one of the other XCHGar opcodes */ insn->opcode = 0x91; if (getIDWithAttrMask(&instructionIDWithNewOpcode, insn, attrMask)) { insn->opcode = 0x90; insn->instructionID = instructionID; insn->spec = spec; return 0; } specWithNewOpcode = specifierForUID(instructionIDWithNewOpcode); /* Change back */ insn->opcode = 0x90; insn->instructionID = instructionIDWithNewOpcode; insn->spec = specWithNewOpcode; return 0; } insn->instructionID = instructionID; insn->spec = specifierForUID(insn->instructionID); return 0; } /* * readSIB - Consumes the SIB byte to determine addressing information for an * instruction. * * @param insn - The instruction whose SIB byte is to be read. * @return - 0 if the SIB byte was successfully read; nonzero otherwise. */ static int readSIB(struct InternalInstruction *insn) { SIBIndex sibIndexBase = SIB_INDEX_NONE; SIBBase sibBaseBase = SIB_BASE_NONE; uint8_t index, base; // dbgprintf(insn, "readSIB()"); if (insn->consumedSIB) return 0; insn->consumedSIB = true; switch (insn->addressSize) { case 2: // dbgprintf(insn, "SIB-based addressing doesn't work in 16-bit mode"); return -1; case 4: sibIndexBase = SIB_INDEX_EAX; sibBaseBase = SIB_BASE_EAX; break; case 8: sibIndexBase = SIB_INDEX_RAX; sibBaseBase = SIB_BASE_RAX; break; } if (consumeByte(insn, &insn->sib)) return -1; index = indexFromSIB(insn->sib) | (xFromREX(insn->rexPrefix) << 3); if (insn->vectorExtensionType == TYPE_EVEX) index |= v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4; switch (index) { case 0x4: insn->sibIndex = SIB_INDEX_NONE; break; default: insn->sibIndex = (SIBIndex)(sibIndexBase + index); if (insn->sibIndex == SIB_INDEX_sib || insn->sibIndex == SIB_INDEX_sib64) insn->sibIndex = SIB_INDEX_NONE; break; } switch (scaleFromSIB(insn->sib)) { case 0: insn->sibScale = 1; break; case 1: insn->sibScale = 2; break; case 2: insn->sibScale = 4; break; case 3: insn->sibScale = 8; break; } base = baseFromSIB(insn->sib) | (bFromREX(insn->rexPrefix) << 3); switch (base) { case 0x5: case 0xd: switch (modFromModRM(insn->modRM)) { case 0x0: insn->eaDisplacement = EA_DISP_32; insn->sibBase = SIB_BASE_NONE; break; case 0x1: insn->eaDisplacement = EA_DISP_8; insn->sibBase = (SIBBase)(sibBaseBase + base); break; case 0x2: insn->eaDisplacement = EA_DISP_32; insn->sibBase = (SIBBase)(sibBaseBase + base); break; case 0x3: //debug("Cannot have Mod = 0b11 and a SIB byte"); return -1; } break; default: insn->sibBase = (SIBBase)(sibBaseBase + base); break; } return 0; } /* * readDisplacement - Consumes the displacement of an instruction. * * @param insn - The instruction whose displacement is to be read. * @return - 0 if the displacement byte was successfully read; nonzero * otherwise. */ static int readDisplacement(struct InternalInstruction *insn) { int8_t d8; int16_t d16; int32_t d32; // dbgprintf(insn, "readDisplacement()"); if (insn->consumedDisplacement) return 0; insn->consumedDisplacement = true; insn->displacementOffset = (uint8_t)(insn->readerCursor - insn->startLocation); switch (insn->eaDisplacement) { case EA_DISP_NONE: insn->consumedDisplacement = false; break; case EA_DISP_8: if (consumeInt8(insn, &d8)) return -1; insn->displacement = d8; break; case EA_DISP_16: if (consumeInt16(insn, &d16)) return -1; insn->displacement = d16; break; case EA_DISP_32: if (consumeInt32(insn, &d32)) return -1; insn->displacement = d32; break; } return 0; } /* * readModRM - Consumes all addressing information (ModR/M byte, SIB byte, and * displacement) for an instruction and interprets it. * * @param insn - The instruction whose addressing information is to be read. * @return - 0 if the information was successfully read; nonzero otherwise. */ static int readModRM(struct InternalInstruction *insn) { uint8_t mod, rm, reg; // dbgprintf(insn, "readModRM()"); // already got ModRM byte? if (insn->consumedModRM) return 0; insn->modRMOffset = (uint8_t)(insn->readerCursor - insn->startLocation); if (consumeByte(insn, &insn->modRM)) return -1; // mark that we already got ModRM insn->consumedModRM = true; // save original ModRM for later reference insn->orgModRM = insn->modRM; // handle MOVcr, MOVdr, MOVrc, MOVrd by pretending they have MRM.mod = 3 if ((insn->firstByte == 0x0f && insn->opcodeType == TWOBYTE) && (insn->opcode >= 0x20 && insn->opcode <= 0x23 )) insn->modRM |= 0xC0; mod = modFromModRM(insn->modRM); rm = rmFromModRM(insn->modRM); reg = regFromModRM(insn->modRM); /* * This goes by insn->registerSize to pick the correct register, which messes * up if we're using (say) XMM or 8-bit register operands. That gets fixed in * fixupReg(). */ switch (insn->registerSize) { case 2: insn->regBase = MODRM_REG_AX; insn->eaRegBase = EA_REG_AX; break; case 4: insn->regBase = MODRM_REG_EAX; insn->eaRegBase = EA_REG_EAX; break; case 8: insn->regBase = MODRM_REG_RAX; insn->eaRegBase = EA_REG_RAX; break; } reg |= rFromREX(insn->rexPrefix) << 3; rm |= bFromREX(insn->rexPrefix) << 3; if (insn->vectorExtensionType == TYPE_EVEX) { reg |= r2FromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4; rm |= xFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4; } insn->reg = (Reg)(insn->regBase + reg); switch (insn->addressSize) { case 2: insn->eaBaseBase = EA_BASE_BX_SI; switch (mod) { case 0x0: if (rm == 0x6) { insn->eaBase = EA_BASE_NONE; insn->eaDisplacement = EA_DISP_16; if (readDisplacement(insn)) return -1; } else { insn->eaBase = (EABase)(insn->eaBaseBase + rm); insn->eaDisplacement = EA_DISP_NONE; } break; case 0x1: insn->eaBase = (EABase)(insn->eaBaseBase + rm); insn->eaDisplacement = EA_DISP_8; insn->displacementSize = 1; if (readDisplacement(insn)) return -1; break; case 0x2: insn->eaBase = (EABase)(insn->eaBaseBase + rm); insn->eaDisplacement = EA_DISP_16; if (readDisplacement(insn)) return -1; break; case 0x3: insn->eaBase = (EABase)(insn->eaRegBase + rm); insn->eaDisplacement = EA_DISP_NONE; if (readDisplacement(insn)) return -1; break; } break; case 4: case 8: insn->eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX); switch (mod) { case 0x0: insn->eaDisplacement = EA_DISP_NONE; /* readSIB may override this */ switch (rm) { case 0x14: case 0x4: case 0xc: /* in case REXW.b is set */ insn->eaBase = (insn->addressSize == 4 ? EA_BASE_sib : EA_BASE_sib64); if (readSIB(insn) || readDisplacement(insn)) return -1; break; case 0x5: case 0xd: insn->eaBase = EA_BASE_NONE; insn->eaDisplacement = EA_DISP_32; if (readDisplacement(insn)) return -1; break; default: insn->eaBase = (EABase)(insn->eaBaseBase + rm); break; } break; case 0x1: insn->displacementSize = 1; /* FALLTHROUGH */ case 0x2: insn->eaDisplacement = (mod == 0x1 ? EA_DISP_8 : EA_DISP_32); switch (rm) { case 0x14: case 0x4: case 0xc: /* in case REXW.b is set */ insn->eaBase = EA_BASE_sib; if (readSIB(insn) || readDisplacement(insn)) return -1; break; default: insn->eaBase = (EABase)(insn->eaBaseBase + rm); if (readDisplacement(insn)) return -1; break; } break; case 0x3: insn->eaDisplacement = EA_DISP_NONE; insn->eaBase = (EABase)(insn->eaRegBase + rm); break; } break; } /* switch (insn->addressSize) */ return 0; } #define GENERIC_FIXUP_FUNC(name, base, prefix) \ static uint8_t name(struct InternalInstruction *insn, \ OperandType type, \ uint8_t index, \ uint8_t *valid) { \ *valid = 1; \ switch (type) { \ default: \ *valid = 0; \ return 0; \ case TYPE_Rv: \ return base + index; \ case TYPE_R8: \ if (insn->rexPrefix && \ index >= 4 && index <= 7) { \ return prefix##_SPL + (index - 4); \ } else { \ return prefix##_AL + index; \ } \ case TYPE_R16: \ return prefix##_AX + index; \ case TYPE_R32: \ return prefix##_EAX + index; \ case TYPE_R64: \ return prefix##_RAX + index; \ case TYPE_XMM512: \ return prefix##_ZMM0 + index; \ case TYPE_XMM256: \ return prefix##_YMM0 + index; \ case TYPE_XMM128: \ case TYPE_XMM64: \ case TYPE_XMM32: \ case TYPE_XMM: \ return prefix##_XMM0 + index; \ case TYPE_VK1: \ case TYPE_VK8: \ case TYPE_VK16: \ if (index > 7) \ *valid = 0; \ return prefix##_K0 + index; \ case TYPE_MM64: \ return prefix##_MM0 + (index & 0x7); \ case TYPE_SEGMENTREG: \ if (index > 5) \ *valid = 0; \ return prefix##_ES + index; \ case TYPE_DEBUGREG: \ return prefix##_DR0 + index; \ case TYPE_CONTROLREG: \ return prefix##_CR0 + index; \ } \ } /* * fixup*Value - Consults an operand type to determine the meaning of the * reg or R/M field. If the operand is an XMM operand, for example, an * operand would be XMM0 instead of AX, which readModRM() would otherwise * misinterpret it as. * * @param insn - The instruction containing the operand. * @param type - The operand type. * @param index - The existing value of the field as reported by readModRM(). * @param valid - The address of a uint8_t. The target is set to 1 if the * field is valid for the register class; 0 if not. * @return - The proper value. */ GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase, MODRM_REG) GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG) /* * fixupReg - Consults an operand specifier to determine which of the * fixup*Value functions to use in correcting readModRM()'ss interpretation. * * @param insn - See fixup*Value(). * @param op - The operand specifier. * @return - 0 if fixup was successful; -1 if the register returned was * invalid for its class. */ static int fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) { uint8_t valid; // dbgprintf(insn, "fixupReg()"); switch ((OperandEncoding)op->encoding) { default: //debug("Expected a REG or R/M encoding in fixupReg"); return -1; case ENCODING_VVVV: insn->vvvv = (Reg)fixupRegValue(insn, (OperandType)op->type, insn->vvvv, &valid); if (!valid) return -1; break; case ENCODING_REG: insn->reg = (Reg)fixupRegValue(insn, (OperandType)op->type, (uint8_t)(insn->reg - insn->regBase), &valid); if (!valid) return -1; break; CASE_ENCODING_RM: if (insn->eaBase >= insn->eaRegBase) { insn->eaBase = (EABase)fixupRMValue(insn, (OperandType)op->type, (uint8_t)(insn->eaBase - insn->eaRegBase), &valid); if (!valid) return -1; } break; } return 0; } /* * readOpcodeRegister - Reads an operand from the opcode field of an * instruction and interprets it appropriately given the operand width. * Handles AddRegFrm instructions. * * @param insn - the instruction whose opcode field is to be read. * @param size - The width (in bytes) of the register being specified. * 1 means AL and friends, 2 means AX, 4 means EAX, and 8 means * RAX. * @return - 0 on success; nonzero otherwise. */ static int readOpcodeRegister(struct InternalInstruction *insn, uint8_t size) { // dbgprintf(insn, "readOpcodeRegister()"); if (size == 0) size = insn->registerSize; insn->operandSize = size; switch (size) { case 1: insn->opcodeRegister = (Reg)(MODRM_REG_AL + ((bFromREX(insn->rexPrefix) << 3) | (insn->opcode & 7))); if (insn->rexPrefix && insn->opcodeRegister >= MODRM_REG_AL + 0x4 && insn->opcodeRegister < MODRM_REG_AL + 0x8) { insn->opcodeRegister = (Reg)(MODRM_REG_SPL + (insn->opcodeRegister - MODRM_REG_AL - 4)); } break; case 2: insn->opcodeRegister = (Reg)(MODRM_REG_AX + ((bFromREX(insn->rexPrefix) << 3) | (insn->opcode & 7))); break; case 4: insn->opcodeRegister = (Reg)(MODRM_REG_EAX + ((bFromREX(insn->rexPrefix) << 3) | (insn->opcode & 7))); break; case 8: insn->opcodeRegister = (Reg)(MODRM_REG_RAX + ((bFromREX(insn->rexPrefix) << 3) | (insn->opcode & 7))); break; } return 0; } /* * readImmediate - Consumes an immediate operand from an instruction, given the * desired operand size. * * @param insn - The instruction whose operand is to be read. * @param size - The width (in bytes) of the operand. * @return - 0 if the immediate was successfully consumed; nonzero * otherwise. */ static int readImmediate(struct InternalInstruction *insn, uint8_t size) { uint8_t imm8; uint16_t imm16; uint32_t imm32; uint64_t imm64; // dbgprintf(insn, "readImmediate()"); if (insn->numImmediatesConsumed == 2) { //debug("Already consumed two immediates"); return -1; } if (size == 0) size = insn->immediateSize; else insn->immediateSize = size; insn->immediateOffset = (uint8_t)(insn->readerCursor - insn->startLocation); switch (size) { case 1: if (consumeByte(insn, &imm8)) return -1; insn->immediates[insn->numImmediatesConsumed] = imm8; break; case 2: if (consumeUInt16(insn, &imm16)) return -1; insn->immediates[insn->numImmediatesConsumed] = imm16; break; case 4: if (consumeUInt32(insn, &imm32)) return -1; insn->immediates[insn->numImmediatesConsumed] = imm32; break; case 8: if (consumeUInt64(insn, &imm64)) return -1; insn->immediates[insn->numImmediatesConsumed] = imm64; break; } insn->numImmediatesConsumed++; return 0; } /* * readVVVV - Consumes vvvv from an instruction if it has a VEX prefix. * * @param insn - The instruction whose operand is to be read. * @return - 0 if the vvvv was successfully consumed; nonzero * otherwise. */ static int readVVVV(struct InternalInstruction *insn) { int vvvv; // dbgprintf(insn, "readVVVV()"); if (insn->vectorExtensionType == TYPE_EVEX) vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 | vvvvFromEVEX3of4(insn->vectorExtensionPrefix[2])); else if (insn->vectorExtensionType == TYPE_VEX_3B) vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]); else if (insn->vectorExtensionType == TYPE_VEX_2B) vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]); else if (insn->vectorExtensionType == TYPE_XOP) vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]); else return -1; if (insn->mode != MODE_64BIT) vvvv &= 0x7; insn->vvvv = vvvv; return 0; } /* * readMaskRegister - Reads an mask register from the opcode field of an * instruction. * * @param insn - The instruction whose opcode field is to be read. * @return - 0 on success; nonzero otherwise. */ static int readMaskRegister(struct InternalInstruction *insn) { // dbgprintf(insn, "readMaskRegister()"); if (insn->vectorExtensionType != TYPE_EVEX) return -1; insn->writemask = aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]); return 0; } /* * readOperands - Consults the specifier for an instruction and consumes all * operands for that instruction, interpreting them as it goes. * * @param insn - The instruction whose operands are to be read and interpreted. * @return - 0 if all operands could be read; nonzero otherwise. */ static int readOperands(struct InternalInstruction *insn) { int index; int hasVVVV, needVVVV; int sawRegImm = 0; // printf(">>> readOperands(): ID = %u\n", insn->instructionID); /* If non-zero vvvv specified, need to make sure one of the operands uses it. */ hasVVVV = !readVVVV(insn); needVVVV = hasVVVV && (insn->vvvv != 0); for (index = 0; index < X86_MAX_OPERANDS; ++index) { //printf(">>> encoding[%u] = %u\n", index, x86OperandSets[insn->spec->operands][index].encoding); switch (x86OperandSets[insn->spec->operands][index].encoding) { case ENCODING_NONE: case ENCODING_SI: case ENCODING_DI: break; case ENCODING_REG: CASE_ENCODING_RM: if (readModRM(insn)) return -1; if (fixupReg(insn, &x86OperandSets[insn->spec->operands][index])) return -1; // Apply the AVX512 compressed displacement scaling factor. if (x86OperandSets[insn->spec->operands][index].encoding != ENCODING_REG && insn->eaDisplacement == EA_DISP_8) insn->displacement *= (int64_t)1 << (x86OperandSets[insn->spec->operands][index].encoding - ENCODING_RM); break; case ENCODING_CB: case ENCODING_CW: case ENCODING_CD: case ENCODING_CP: case ENCODING_CO: case ENCODING_CT: // dbgprintf(insn, "We currently don't hande code-offset encodings"); return -1; case ENCODING_IB: if (sawRegImm) { /* Saw a register immediate so don't read again and instead split the previous immediate. FIXME: This is a hack. */ insn->immediates[insn->numImmediatesConsumed] = insn->immediates[insn->numImmediatesConsumed - 1] & 0xf; ++insn->numImmediatesConsumed; break; } if (readImmediate(insn, 1)) return -1; if (x86OperandSets[insn->spec->operands][index].type == TYPE_XMM128 || x86OperandSets[insn->spec->operands][index].type == TYPE_XMM256) sawRegImm = 1; break; case ENCODING_IW: if (readImmediate(insn, 2)) return -1; break; case ENCODING_ID: if (readImmediate(insn, 4)) return -1; break; case ENCODING_IO: if (readImmediate(insn, 8)) return -1; break; case ENCODING_Iv: if (readImmediate(insn, insn->immediateSize)) return -1; break; case ENCODING_Ia: if (readImmediate(insn, insn->addressSize)) return -1; /* Direct memory-offset (moffset) immediate will get mapped to memory operand later. We want the encoding info to reflect that as well. */ insn->displacementOffset = insn->immediateOffset; insn->consumedDisplacement = true; insn->displacementSize = insn->immediateSize; insn->displacement = insn->immediates[insn->numImmediatesConsumed - 1]; insn->immediateOffset = 0; insn->immediateSize = 0; break; case ENCODING_RB: if (readOpcodeRegister(insn, 1)) return -1; break; case ENCODING_RW: if (readOpcodeRegister(insn, 2)) return -1; break; case ENCODING_RD: if (readOpcodeRegister(insn, 4)) return -1; break; case ENCODING_RO: if (readOpcodeRegister(insn, 8)) return -1; break; case ENCODING_Rv: if (readOpcodeRegister(insn, 0)) return -1; break; case ENCODING_FP: break; case ENCODING_VVVV: needVVVV = 0; /* Mark that we have found a VVVV operand. */ if (!hasVVVV) return -1; if (fixupReg(insn, &x86OperandSets[insn->spec->operands][index])) return -1; break; case ENCODING_WRITEMASK: if (readMaskRegister(insn)) return -1; break; case ENCODING_DUP: break; default: // dbgprintf(insn, "Encountered an operand with an unknown encoding."); return -1; } } /* If we didn't find ENCODING_VVVV operand, but non-zero vvvv present, fail */ if (needVVVV) return -1; return 0; } // return True if instruction is illegal to use with prefixes // This also check & fix the isPrefixNN when a prefix is irrelevant. static bool checkPrefix(struct InternalInstruction *insn) { // LOCK prefix if (insn->isPrefixf0) { switch(insn->instructionID) { default: // invalid LOCK return true; // nop dword [rax] case X86_NOOPL: // DEC case X86_DEC16m: case X86_DEC32m: case X86_DEC64m: case X86_DEC8m: // ADC case X86_ADC16mi: case X86_ADC16mi8: case X86_ADC16mr: case X86_ADC32mi: case X86_ADC32mi8: case X86_ADC32mr: case X86_ADC64mi32: case X86_ADC64mi8: case X86_ADC64mr: case X86_ADC8mi: case X86_ADC8mi8: case X86_ADC8mr: case X86_ADC8rm: case X86_ADC16rm: case X86_ADC32rm: case X86_ADC64rm: // ADD case X86_ADD16mi: case X86_ADD16mi8: case X86_ADD16mr: case X86_ADD32mi: case X86_ADD32mi8: case X86_ADD32mr: case X86_ADD64mi32: case X86_ADD64mi8: case X86_ADD64mr: case X86_ADD8mi: case X86_ADD8mi8: case X86_ADD8mr: case X86_ADD8rm: case X86_ADD16rm: case X86_ADD32rm: case X86_ADD64rm: // AND case X86_AND16mi: case X86_AND16mi8: case X86_AND16mr: case X86_AND32mi: case X86_AND32mi8: case X86_AND32mr: case X86_AND64mi32: case X86_AND64mi8: case X86_AND64mr: case X86_AND8mi: case X86_AND8mi8: case X86_AND8mr: case X86_AND8rm: case X86_AND16rm: case X86_AND32rm: case X86_AND64rm: // BTC case X86_BTC16mi8: case X86_BTC16mr: case X86_BTC32mi8: case X86_BTC32mr: case X86_BTC64mi8: case X86_BTC64mr: // BTR case X86_BTR16mi8: case X86_BTR16mr: case X86_BTR32mi8: case X86_BTR32mr: case X86_BTR64mi8: case X86_BTR64mr: // BTS case X86_BTS16mi8: case X86_BTS16mr: case X86_BTS32mi8: case X86_BTS32mr: case X86_BTS64mi8: case X86_BTS64mr: // CMPXCHG case X86_CMPXCHG16B: case X86_CMPXCHG16rm: case X86_CMPXCHG32rm: case X86_CMPXCHG64rm: case X86_CMPXCHG8rm: case X86_CMPXCHG8B: // INC case X86_INC16m: case X86_INC32m: case X86_INC64m: case X86_INC8m: // NEG case X86_NEG16m: case X86_NEG32m: case X86_NEG64m: case X86_NEG8m: // NOT case X86_NOT16m: case X86_NOT32m: case X86_NOT64m: case X86_NOT8m: // OR case X86_OR16mi: case X86_OR16mi8: case X86_OR16mr: case X86_OR32mi: case X86_OR32mi8: case X86_OR32mr: case X86_OR32mrLocked: case X86_OR64mi32: case X86_OR64mi8: case X86_OR64mr: case X86_OR8mi8: case X86_OR8mi: case X86_OR8mr: case X86_OR8rm: case X86_OR16rm: case X86_OR32rm: case X86_OR64rm: // SBB case X86_SBB16mi: case X86_SBB16mi8: case X86_SBB16mr: case X86_SBB32mi: case X86_SBB32mi8: case X86_SBB32mr: case X86_SBB64mi32: case X86_SBB64mi8: case X86_SBB64mr: case X86_SBB8mi: case X86_SBB8mi8: case X86_SBB8mr: // SUB case X86_SUB16mi: case X86_SUB16mi8: case X86_SUB16mr: case X86_SUB32mi: case X86_SUB32mi8: case X86_SUB32mr: case X86_SUB64mi32: case X86_SUB64mi8: case X86_SUB64mr: case X86_SUB8mi8: case X86_SUB8mi: case X86_SUB8mr: case X86_SUB8rm: case X86_SUB16rm: case X86_SUB32rm: case X86_SUB64rm: // XADD case X86_XADD16rm: case X86_XADD32rm: case X86_XADD64rm: case X86_XADD8rm: // XCHG case X86_XCHG16rm: case X86_XCHG32rm: case X86_XCHG64rm: case X86_XCHG8rm: // XOR case X86_XOR16mi: case X86_XOR16mi8: case X86_XOR16mr: case X86_XOR32mi: case X86_XOR32mi8: case X86_XOR32mr: case X86_XOR64mi32: case X86_XOR64mi8: case X86_XOR64mr: case X86_XOR8mi8: case X86_XOR8mi: case X86_XOR8mr: case X86_XOR8rm: case X86_XOR16rm: case X86_XOR32rm: case X86_XOR64rm: // this instruction can be used with LOCK prefix return false; } } // REPNE prefix if (insn->isPrefixf2) { // 0xf2 can be a part of instruction encoding, but not really a prefix. // In such a case, clear it. if (insn->twoByteEscape == 0x0f) { insn->prefix0 = 0; } } // no invalid prefixes return false; } /* * decodeInstruction - Reads and interprets a full instruction provided by the * user. * * @param insn - A pointer to the instruction to be populated. Must be * pre-allocated. * @param reader - The function to be used to read the instruction's bytes. * @param readerArg - A generic argument to be passed to the reader to store * any internal state. * @param startLoc - The address (in the reader's address space) of the first * byte in the instruction. * @param mode - The mode (real mode, IA-32e, or IA-32e in 64-bit mode) to * decode the instruction in. * @return - 0 if instruction is valid; nonzero if not. */ int decodeInstruction(struct InternalInstruction *insn, byteReader_t reader, const void *readerArg, uint64_t startLoc, DisassemblerMode mode) { insn->reader = reader; insn->readerArg = readerArg; insn->startLocation = startLoc; insn->readerCursor = startLoc; insn->mode = mode; if (readPrefixes(insn) || readOpcode(insn) || getID(insn) || insn->instructionID == 0 || checkPrefix(insn) || readOperands(insn)) return -1; insn->length = (size_t)(insn->readerCursor - insn->startLocation); // instruction length must be <= 15 to be valid if (insn->length > 15) return -1; if (insn->operandSize == 0) insn->operandSize = insn->registerSize; insn->operands = &x86OperandSets[insn->spec->operands][0]; return 0; } #endif capstone-sys-0.11.0/capstone/arch/X86/X86DisassemblerDecoder.h010066400017500001750000000477461363403403300221650ustar0000000000000000/*===-- X86DisassemblerDecoderInternal.h - Disassembler decoder ---*- C -*-===* * * The LLVM Compiler Infrastructure * * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * *===----------------------------------------------------------------------===* * * This file is part of the X86 Disassembler. * It contains the public interface of the instruction decoder. * Documentation for the disassembler can be found in X86Disassembler.h. * *===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_X86_DISASSEMBLERDECODER_H #define CS_X86_DISASSEMBLERDECODER_H #if defined(CAPSTONE_HAS_OSXKERNEL) #include #else #include #endif #include "X86DisassemblerDecoderCommon.h" /* * Accessor functions for various fields of an Intel instruction */ #define modFromModRM(modRM) (((modRM) & 0xc0) >> 6) #define regFromModRM(modRM) (((modRM) & 0x38) >> 3) #define rmFromModRM(modRM) ((modRM) & 0x7) #define scaleFromSIB(sib) (((sib) & 0xc0) >> 6) #define indexFromSIB(sib) (((sib) & 0x38) >> 3) #define baseFromSIB(sib) ((sib) & 0x7) #define wFromREX(rex) (((rex) & 0x8) >> 3) #define rFromREX(rex) (((rex) & 0x4) >> 2) #define xFromREX(rex) (((rex) & 0x2) >> 1) #define bFromREX(rex) ((rex) & 0x1) #define rFromEVEX2of4(evex) (((~(evex)) & 0x80) >> 7) #define xFromEVEX2of4(evex) (((~(evex)) & 0x40) >> 6) #define bFromEVEX2of4(evex) (((~(evex)) & 0x20) >> 5) #define r2FromEVEX2of4(evex) (((~(evex)) & 0x10) >> 4) #define mmFromEVEX2of4(evex) ((evex) & 0x3) #define wFromEVEX3of4(evex) (((evex) & 0x80) >> 7) #define vvvvFromEVEX3of4(evex) (((~(evex)) & 0x78) >> 3) #define ppFromEVEX3of4(evex) ((evex) & 0x3) #define zFromEVEX4of4(evex) (((evex) & 0x80) >> 7) #define l2FromEVEX4of4(evex) (((evex) & 0x40) >> 6) #define lFromEVEX4of4(evex) (((evex) & 0x20) >> 5) #define bFromEVEX4of4(evex) (((evex) & 0x10) >> 4) #define v2FromEVEX4of4(evex) (((~evex) & 0x8) >> 3) #define aaaFromEVEX4of4(evex) ((evex) & 0x7) #define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7) #define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6) #define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5) #define mmmmmFromVEX2of3(vex) ((vex) & 0x1f) #define wFromVEX3of3(vex) (((vex) & 0x80) >> 7) #define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3) #define lFromVEX3of3(vex) (((vex) & 0x4) >> 2) #define ppFromVEX3of3(vex) ((vex) & 0x3) #define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7) #define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3) #define lFromVEX2of2(vex) (((vex) & 0x4) >> 2) #define ppFromVEX2of2(vex) ((vex) & 0x3) #define rFromXOP2of3(xop) (((~(xop)) & 0x80) >> 7) #define xFromXOP2of3(xop) (((~(xop)) & 0x40) >> 6) #define bFromXOP2of3(xop) (((~(xop)) & 0x20) >> 5) #define mmmmmFromXOP2of3(xop) ((xop) & 0x1f) #define wFromXOP3of3(xop) (((xop) & 0x80) >> 7) #define vvvvFromXOP3of3(vex) (((~(vex)) & 0x78) >> 3) #define lFromXOP3of3(xop) (((xop) & 0x4) >> 2) #define ppFromXOP3of3(xop) ((xop) & 0x3) /* * These enums represent Intel registers for use by the decoder. */ #define REGS_8BIT \ ENTRY(AL) \ ENTRY(CL) \ ENTRY(DL) \ ENTRY(BL) \ ENTRY(AH) \ ENTRY(CH) \ ENTRY(DH) \ ENTRY(BH) \ ENTRY(R8B) \ ENTRY(R9B) \ ENTRY(R10B) \ ENTRY(R11B) \ ENTRY(R12B) \ ENTRY(R13B) \ ENTRY(R14B) \ ENTRY(R15B) \ ENTRY(SPL) \ ENTRY(BPL) \ ENTRY(SIL) \ ENTRY(DIL) #define EA_BASES_16BIT \ ENTRY(BX_SI) \ ENTRY(BX_DI) \ ENTRY(BP_SI) \ ENTRY(BP_DI) \ ENTRY(SI) \ ENTRY(DI) \ ENTRY(BP) \ ENTRY(BX) \ ENTRY(R8W) \ ENTRY(R9W) \ ENTRY(R10W) \ ENTRY(R11W) \ ENTRY(R12W) \ ENTRY(R13W) \ ENTRY(R14W) \ ENTRY(R15W) #define REGS_16BIT \ ENTRY(AX) \ ENTRY(CX) \ ENTRY(DX) \ ENTRY(BX) \ ENTRY(SP) \ ENTRY(BP) \ ENTRY(SI) \ ENTRY(DI) \ ENTRY(R8W) \ ENTRY(R9W) \ ENTRY(R10W) \ ENTRY(R11W) \ ENTRY(R12W) \ ENTRY(R13W) \ ENTRY(R14W) \ ENTRY(R15W) #define EA_BASES_32BIT \ ENTRY(EAX) \ ENTRY(ECX) \ ENTRY(EDX) \ ENTRY(EBX) \ ENTRY(sib) \ ENTRY(EBP) \ ENTRY(ESI) \ ENTRY(EDI) \ ENTRY(R8D) \ ENTRY(R9D) \ ENTRY(R10D) \ ENTRY(R11D) \ ENTRY(R12D) \ ENTRY(R13D) \ ENTRY(R14D) \ ENTRY(R15D) #define REGS_32BIT \ ENTRY(EAX) \ ENTRY(ECX) \ ENTRY(EDX) \ ENTRY(EBX) \ ENTRY(ESP) \ ENTRY(EBP) \ ENTRY(ESI) \ ENTRY(EDI) \ ENTRY(R8D) \ ENTRY(R9D) \ ENTRY(R10D) \ ENTRY(R11D) \ ENTRY(R12D) \ ENTRY(R13D) \ ENTRY(R14D) \ ENTRY(R15D) #define EA_BASES_64BIT \ ENTRY(RAX) \ ENTRY(RCX) \ ENTRY(RDX) \ ENTRY(RBX) \ ENTRY(sib64) \ ENTRY(RBP) \ ENTRY(RSI) \ ENTRY(RDI) \ ENTRY(R8) \ ENTRY(R9) \ ENTRY(R10) \ ENTRY(R11) \ ENTRY(R12) \ ENTRY(R13) \ ENTRY(R14) \ ENTRY(R15) #define REGS_64BIT \ ENTRY(RAX) \ ENTRY(RCX) \ ENTRY(RDX) \ ENTRY(RBX) \ ENTRY(RSP) \ ENTRY(RBP) \ ENTRY(RSI) \ ENTRY(RDI) \ ENTRY(R8) \ ENTRY(R9) \ ENTRY(R10) \ ENTRY(R11) \ ENTRY(R12) \ ENTRY(R13) \ ENTRY(R14) \ ENTRY(R15) #define REGS_MMX \ ENTRY(MM0) \ ENTRY(MM1) \ ENTRY(MM2) \ ENTRY(MM3) \ ENTRY(MM4) \ ENTRY(MM5) \ ENTRY(MM6) \ ENTRY(MM7) #define REGS_XMM \ ENTRY(XMM0) \ ENTRY(XMM1) \ ENTRY(XMM2) \ ENTRY(XMM3) \ ENTRY(XMM4) \ ENTRY(XMM5) \ ENTRY(XMM6) \ ENTRY(XMM7) \ ENTRY(XMM8) \ ENTRY(XMM9) \ ENTRY(XMM10) \ ENTRY(XMM11) \ ENTRY(XMM12) \ ENTRY(XMM13) \ ENTRY(XMM14) \ ENTRY(XMM15) \ ENTRY(XMM16) \ ENTRY(XMM17) \ ENTRY(XMM18) \ ENTRY(XMM19) \ ENTRY(XMM20) \ ENTRY(XMM21) \ ENTRY(XMM22) \ ENTRY(XMM23) \ ENTRY(XMM24) \ ENTRY(XMM25) \ ENTRY(XMM26) \ ENTRY(XMM27) \ ENTRY(XMM28) \ ENTRY(XMM29) \ ENTRY(XMM30) \ ENTRY(XMM31) #define REGS_YMM \ ENTRY(YMM0) \ ENTRY(YMM1) \ ENTRY(YMM2) \ ENTRY(YMM3) \ ENTRY(YMM4) \ ENTRY(YMM5) \ ENTRY(YMM6) \ ENTRY(YMM7) \ ENTRY(YMM8) \ ENTRY(YMM9) \ ENTRY(YMM10) \ ENTRY(YMM11) \ ENTRY(YMM12) \ ENTRY(YMM13) \ ENTRY(YMM14) \ ENTRY(YMM15) \ ENTRY(YMM16) \ ENTRY(YMM17) \ ENTRY(YMM18) \ ENTRY(YMM19) \ ENTRY(YMM20) \ ENTRY(YMM21) \ ENTRY(YMM22) \ ENTRY(YMM23) \ ENTRY(YMM24) \ ENTRY(YMM25) \ ENTRY(YMM26) \ ENTRY(YMM27) \ ENTRY(YMM28) \ ENTRY(YMM29) \ ENTRY(YMM30) \ ENTRY(YMM31) #define REGS_ZMM \ ENTRY(ZMM0) \ ENTRY(ZMM1) \ ENTRY(ZMM2) \ ENTRY(ZMM3) \ ENTRY(ZMM4) \ ENTRY(ZMM5) \ ENTRY(ZMM6) \ ENTRY(ZMM7) \ ENTRY(ZMM8) \ ENTRY(ZMM9) \ ENTRY(ZMM10) \ ENTRY(ZMM11) \ ENTRY(ZMM12) \ ENTRY(ZMM13) \ ENTRY(ZMM14) \ ENTRY(ZMM15) \ ENTRY(ZMM16) \ ENTRY(ZMM17) \ ENTRY(ZMM18) \ ENTRY(ZMM19) \ ENTRY(ZMM20) \ ENTRY(ZMM21) \ ENTRY(ZMM22) \ ENTRY(ZMM23) \ ENTRY(ZMM24) \ ENTRY(ZMM25) \ ENTRY(ZMM26) \ ENTRY(ZMM27) \ ENTRY(ZMM28) \ ENTRY(ZMM29) \ ENTRY(ZMM30) \ ENTRY(ZMM31) #define REGS_MASKS \ ENTRY(K0) \ ENTRY(K1) \ ENTRY(K2) \ ENTRY(K3) \ ENTRY(K4) \ ENTRY(K5) \ ENTRY(K6) \ ENTRY(K7) #define REGS_SEGMENT \ ENTRY(ES) \ ENTRY(CS) \ ENTRY(SS) \ ENTRY(DS) \ ENTRY(FS) \ ENTRY(GS) #define REGS_DEBUG \ ENTRY(DR0) \ ENTRY(DR1) \ ENTRY(DR2) \ ENTRY(DR3) \ ENTRY(DR4) \ ENTRY(DR5) \ ENTRY(DR6) \ ENTRY(DR7) \ ENTRY(DR8) \ ENTRY(DR9) \ ENTRY(DR10) \ ENTRY(DR11) \ ENTRY(DR12) \ ENTRY(DR13) \ ENTRY(DR14) \ ENTRY(DR15) #define REGS_CONTROL \ ENTRY(CR0) \ ENTRY(CR1) \ ENTRY(CR2) \ ENTRY(CR3) \ ENTRY(CR4) \ ENTRY(CR5) \ ENTRY(CR6) \ ENTRY(CR7) \ ENTRY(CR8) \ ENTRY(CR9) \ ENTRY(CR10) \ ENTRY(CR11) \ ENTRY(CR12) \ ENTRY(CR13) \ ENTRY(CR14) \ ENTRY(CR15) #define ALL_EA_BASES \ EA_BASES_16BIT \ EA_BASES_32BIT \ EA_BASES_64BIT #define ALL_SIB_BASES \ REGS_32BIT \ REGS_64BIT #define ALL_REGS \ REGS_8BIT \ REGS_16BIT \ REGS_32BIT \ REGS_64BIT \ REGS_MMX \ REGS_XMM \ REGS_YMM \ REGS_ZMM \ REGS_MASKS \ REGS_SEGMENT \ REGS_DEBUG \ REGS_CONTROL \ ENTRY(RIP) /* * EABase - All possible values of the base field for effective-address * computations, a.k.a. the Mod and R/M fields of the ModR/M byte. We * distinguish between bases (EA_BASE_*) and registers that just happen to be * referred to when Mod == 0b11 (EA_REG_*). */ typedef enum { EA_BASE_NONE, #define ENTRY(x) EA_BASE_##x, ALL_EA_BASES #undef ENTRY #define ENTRY(x) EA_REG_##x, ALL_REGS #undef ENTRY EA_max } EABase; /* * SIBIndex - All possible values of the SIB index field. * Borrows entries from ALL_EA_BASES with the special case that * sib is synonymous with NONE. * Vector SIB: index can be XMM or YMM. */ typedef enum { SIB_INDEX_NONE, #define ENTRY(x) SIB_INDEX_##x, ALL_EA_BASES REGS_XMM REGS_YMM REGS_ZMM #undef ENTRY SIB_INDEX_max } SIBIndex; /* * SIBBase - All possible values of the SIB base field. */ typedef enum { SIB_BASE_NONE, #define ENTRY(x) SIB_BASE_##x, ALL_SIB_BASES #undef ENTRY SIB_BASE_max } SIBBase; /* * EADisplacement - Possible displacement types for effective-address * computations. */ typedef enum { EA_DISP_NONE, EA_DISP_8, EA_DISP_16, EA_DISP_32 } EADisplacement; /* * Reg - All possible values of the reg field in the ModR/M byte. */ typedef enum { #define ENTRY(x) MODRM_REG_##x, ALL_REGS #undef ENTRY MODRM_REG_max } Reg; /* * SegmentOverride - All possible segment overrides. */ typedef enum { SEG_OVERRIDE_NONE, SEG_OVERRIDE_CS, SEG_OVERRIDE_SS, SEG_OVERRIDE_DS, SEG_OVERRIDE_ES, SEG_OVERRIDE_FS, SEG_OVERRIDE_GS, SEG_OVERRIDE_max } SegmentOverride; /* * VEXLeadingOpcodeByte - Possible values for the VEX.m-mmmm field */ typedef enum { VEX_LOB_0F = 0x1, VEX_LOB_0F38 = 0x2, VEX_LOB_0F3A = 0x3 } VEXLeadingOpcodeByte; typedef enum { XOP_MAP_SELECT_8 = 0x8, XOP_MAP_SELECT_9 = 0x9, XOP_MAP_SELECT_A = 0xA } XOPMapSelect; /* * VEXPrefixCode - Possible values for the VEX.pp/EVEX.pp field */ typedef enum { VEX_PREFIX_NONE = 0x0, VEX_PREFIX_66 = 0x1, VEX_PREFIX_F3 = 0x2, VEX_PREFIX_F2 = 0x3 } VEXPrefixCode; typedef enum { TYPE_NO_VEX_XOP = 0x0, TYPE_VEX_2B = 0x1, TYPE_VEX_3B = 0x2, TYPE_EVEX = 0x3, TYPE_XOP = 0x4 } VectorExtensionType; struct reader_info { const uint8_t *code; uint64_t size; uint64_t offset; }; /* * byteReader_t - Type for the byte reader that the consumer must provide to * the decoder. Reads a single byte from the instruction's address space. * @param arg - A baton that the consumer can associate with any internal * state that it needs. * @param byte - A pointer to a single byte in memory that should be set to * contain the value at address. * @param address - The address in the instruction's address space that should * be read from. * @return - -1 if the byte cannot be read for any reason; 0 otherwise. */ typedef int (*byteReader_t)(const struct reader_info *arg, uint8_t* byte, uint64_t address); /* * dlog_t - Type for the logging function that the consumer can provide to * get debugging output from the decoder. * @param arg - A baton that the consumer can associate with any internal * state that it needs. * @param log - A string that contains the message. Will be reused after * the logger returns. */ typedef void (*dlog_t)(void* arg, const char *log); /// The specification for how to extract and interpret a full instruction and /// its operands. struct InstructionSpecifier { #ifdef CAPSTONE_X86_REDUCE uint8_t operands; #else uint16_t operands; #endif }; /* * The x86 internal instruction, which is produced by the decoder. */ typedef struct InternalInstruction { // from here, all members must be initialized to ZERO to work properly uint8_t operandSize; uint8_t prefix0, prefix1, prefix2, prefix3; /* true if the prefix byte corresponding to the entry is present; false if not */ bool isPrefix26; bool isPrefix2e; bool isPrefix36; bool isPrefix3e; bool isPrefix64; bool isPrefix65; bool isPrefix66; bool isPrefix67; bool isPrefixf0; bool isPrefixf2; bool isPrefixf3; /* contains the location (for use with the reader) of the prefix byte */ uint64_t prefix26; uint64_t prefix2e; uint64_t prefix36; uint64_t prefix3e; uint64_t prefix64; uint64_t prefix65; uint64_t prefix66; uint64_t prefix67; uint64_t prefixf0; uint64_t prefixf2; uint64_t prefixf3; /* The value of the REX prefix, if present */ uint8_t rexPrefix; /* The segment override type */ SegmentOverride segmentOverride; bool consumedModRM; uint8_t orgModRM; // save original modRM because we will modify modRM /* The SIB byte, used for more complex 32- or 64-bit memory operands */ bool consumedSIB; uint8_t sib; /* The displacement, used for memory operands */ bool consumedDisplacement; int64_t displacement; /* The value of the two-byte escape prefix (usually 0x0f) */ uint8_t twoByteEscape; /* The value of the three-byte escape prefix (usually 0x38 or 0x3a) */ uint8_t threeByteEscape; /* SIB state */ SIBIndex sibIndex; uint8_t sibScale; SIBBase sibBase; uint8_t numImmediatesConsumed; /* 0xf2 or 0xf3 is xacquire or xrelease */ uint8_t xAcquireRelease; /* The value of the vector extension prefix(EVEX/VEX/XOP), if present */ uint8_t vectorExtensionPrefix[4]; /* Offsets from the start of the instruction to the pieces of data, which is needed to find relocation entries for adding symbolic operands */ uint8_t displacementOffset; uint8_t immediateOffset; uint8_t modRMOffset; // end-of-zero-members /* Reader interface (C) */ byteReader_t reader; /* Opaque value passed to the reader */ const void* readerArg; /* The address of the next byte to read via the reader */ uint64_t readerCursor; /* Logger interface (C) */ dlog_t dlog; /* Opaque value passed to the logger */ void* dlogArg; /* General instruction information */ /* The mode to disassemble for (64-bit, protected, real) */ DisassemblerMode mode; /* The start of the instruction, usable with the reader */ uint64_t startLocation; /* The length of the instruction, in bytes */ size_t length; /* Prefix state */ /* The type of the vector extension prefix */ VectorExtensionType vectorExtensionType; /* The location where a mandatory prefix would have to be (i.e., right before the opcode, or right before the REX prefix if one is present) */ uint64_t necessaryPrefixLocation; /* Sizes of various critical pieces of data, in bytes */ uint8_t registerSize; uint8_t addressSize; uint8_t displacementSize; uint8_t immediateSize; uint8_t immSize; // immediate size for X86_OP_IMM operand /* opcode state */ /* The last byte of the opcode, not counting any ModR/M extension */ uint8_t opcode; /* decode state */ /* The type of opcode, used for indexing into the array of decode tables */ OpcodeType opcodeType; /* The instruction ID, extracted from the decode table */ uint16_t instructionID; /* The specifier for the instruction, from the instruction info table */ const struct InstructionSpecifier *spec; /* state for additional bytes, consumed during operand decode. Pattern: consumed___ indicates that the byte was already consumed and does not need to be consumed again */ /* The VEX.vvvv field, which contains a third register operand for some AVX instructions */ Reg vvvv; /* The writemask for AVX-512 instructions which is contained in EVEX.aaa */ Reg writemask; /* The ModR/M byte, which contains most register operands and some portion of all memory operands */ uint8_t modRM; // special data to handle MOVcr, MOVdr, MOVrc, MOVrd uint8_t firstByte; // save the first byte in stream /* Immediates. There can be two in some cases */ uint8_t numImmediatesTranslated; uint64_t immediates[2]; /* A register or immediate operand encoded into the opcode */ Reg opcodeRegister; /* Portions of the ModR/M byte */ /* These fields determine the allowable values for the ModR/M fields, which depend on operand and address widths */ EABase eaBaseBase; EABase eaRegBase; Reg regBase; /* The Mod and R/M fields can encode a base for an effective address, or a register. These are separated into two fields here */ EABase eaBase; EADisplacement eaDisplacement; /* The reg field always encodes a register */ Reg reg; const struct OperandSpecifier *operands; } InternalInstruction; /* decodeInstruction - Decode one instruction and store the decoding results in * a buffer provided by the consumer. * @param insn - The buffer to store the instruction in. Allocated by the * consumer. * @param reader - The byteReader_t for the bytes to be read. * @param readerArg - An argument to pass to the reader for storing context * specific to the consumer. May be NULL. * @param logger - The dlog_t to be used in printing status messages from the * disassembler. May be NULL. * @param loggerArg - An argument to pass to the logger for storing context * specific to the logger. May be NULL. * @param startLoc - The address (in the reader's address space) of the first * byte in the instruction. * @param mode - The mode (16-bit, 32-bit, 64-bit) to decode in. * @return - Nonzero if there was an error during decode, 0 otherwise. */ int decodeInstruction(struct InternalInstruction* insn, byteReader_t reader, const void* readerArg, uint64_t startLoc, DisassemblerMode mode); //const char *x86DisassemblerGetInstrName(unsigned Opcode, const void *mii); #endif capstone-sys-0.11.0/capstone/arch/X86/X86DisassemblerDecoderCommon.h010066400017500001750000000771751363402546700233500ustar0000000000000000/*===-- X86DisassemblerDecoderCommon.h - Disassembler decoder -----*- C -*-===* * * The LLVM Compiler Infrastructure * * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * *===----------------------------------------------------------------------===* * * This file is part of the X86 Disassembler. * It contains common definitions used by both the disassembler and the table * generator. * Documentation for the disassembler can be found in X86Disassembler.h. * *===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ /* * This header file provides those definitions that need to be shared between * the decoder and the table generator in a C-friendly manner. */ #ifndef CS_X86_DISASSEMBLERDECODERCOMMON_H #define CS_X86_DISASSEMBLERDECODERCOMMON_H #define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers #define CONTEXTS_SYM x86DisassemblerContexts #define ONEBYTE_SYM x86DisassemblerOneByteOpcodes #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes #define T3DNOW_MAP_SYM x86DisassemblerT3DNOWOpcodes /* * Attributes of an instruction that must be known before the opcode can be * processed correctly. Most of these indicate the presence of particular * prefixes, but ATTR_64BIT is simply an attribute of the decoding context. */ #define ATTRIBUTE_BITS \ ENUM_ENTRY(ATTR_NONE, 0x00) \ ENUM_ENTRY(ATTR_64BIT, (0x1 << 0)) \ ENUM_ENTRY(ATTR_XS, (0x1 << 1)) \ ENUM_ENTRY(ATTR_XD, (0x1 << 2)) \ ENUM_ENTRY(ATTR_REXW, (0x1 << 3)) \ ENUM_ENTRY(ATTR_OPSIZE, (0x1 << 4)) \ ENUM_ENTRY(ATTR_ADSIZE, (0x1 << 5)) \ ENUM_ENTRY(ATTR_VEX, (0x1 << 6)) \ ENUM_ENTRY(ATTR_VEXL, (0x1 << 7)) \ ENUM_ENTRY(ATTR_EVEX, (0x1 << 8)) \ ENUM_ENTRY(ATTR_EVEXL, (0x1 << 9)) \ ENUM_ENTRY(ATTR_EVEXL2, (0x1 << 10)) \ ENUM_ENTRY(ATTR_EVEXK, (0x1 << 11)) \ ENUM_ENTRY(ATTR_EVEXKZ, (0x1 << 12)) \ ENUM_ENTRY(ATTR_EVEXB, (0x1 << 13)) #define ENUM_ENTRY(n, v) n = v, enum attributeBits { ATTRIBUTE_BITS ATTR_max }; #undef ENUM_ENTRY /* * Combinations of the above attributes that are relevant to instruction * decode. Although other combinations are possible, they can be reduced to * these without affecting the ultimately decoded instruction. */ // Class name Rank Rationale for rank assignment #define INSTRUCTION_CONTEXTS \ ENUM_ENTRY(IC, 0, "says nothing about the instruction") \ ENUM_ENTRY(IC_64BIT, 1, "says the instruction applies in " \ "64-bit mode but no more") \ ENUM_ENTRY(IC_OPSIZE, 3, "requires an OPSIZE prefix, so " \ "operands change width") \ ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \ "operands change width") \ ENUM_ENTRY(IC_OF, 2, "requires 0f prefix ") \ ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \ ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \ "but not the operands") \ ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \ "but not the operands") \ ENUM_ENTRY(IC_XD_OPSIZE, 3, "requires an OPSIZE prefix, so " \ "operands change width") \ ENUM_ENTRY(IC_XS_OPSIZE, 3, "requires an OPSIZE prefix, so " \ "operands change width") \ ENUM_ENTRY(IC_64BIT_REXW, 5, "requires a REX.W prefix, so operands "\ "change width; overrides IC_OPSIZE") \ ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \ "prefix") \ ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE") \ ENUM_ENTRY(IC_64BIT_ADSIZE, 3, "Just as meaningful as IC_ADSIZE") \ ENUM_ENTRY(IC_64BIT_OPSIZE_ADSIZE, 4, "Just as meaningful as IC_OPSIZE/" \ "IC_ADSIZE") \ ENUM_ENTRY(IC_64BIT_XD, 6, "XD instructions are SSE; REX.W is " \ "secondary") \ ENUM_ENTRY(IC_64BIT_XS, 6, "Just as meaningful as IC_64BIT_XD") \ ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE") \ ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE") \ ENUM_ENTRY(IC_64BIT_REXW_XS, 7, "OPSIZE could mean a different " \ "opcode") \ ENUM_ENTRY(IC_64BIT_REXW_XD, 7, "Just as meaningful as " \ "IC_64BIT_REXW_XS") \ ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 8, "The Dynamic Duo! Prefer over all " \ "else because this changes most " \ "operands' meaning") \ ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \ ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \ ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \ ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \ ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \ ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \ ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \ ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \ ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix") \ ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")\ ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")\ ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize") \ ENUM_ENTRY(IC_VEX_L_W, 4, "requires VEX, L and W") \ ENUM_ENTRY(IC_VEX_L_W_XS, 5, "requires VEX, L, W and XS prefix") \ ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix") \ ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix") \ ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix") \ ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix") \ ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix") \ ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix") \ ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix") \ ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix") \ ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize") \ ENUM_ENTRY(IC_EVEX_L, 3, "requires EVEX and the L prefix") \ ENUM_ENTRY(IC_EVEX_L_XS, 4, "requires EVEX and the L and XS prefix")\ ENUM_ENTRY(IC_EVEX_L_XD, 4, "requires EVEX and the L and XD prefix")\ ENUM_ENTRY(IC_EVEX_L_OPSIZE, 4, "requires EVEX, L, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_W, 3, "requires EVEX, L and W") \ ENUM_ENTRY(IC_EVEX_L_W_XS, 4, "requires EVEX, L, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L_W_XD, 4, "requires EVEX, L, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L_W_OPSIZE, 4, "requires EVEX, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX_L2, 3, "requires EVEX and the L2 prefix") \ ENUM_ENTRY(IC_EVEX_L2_XS, 4, "requires EVEX and the L2 and XS prefix")\ ENUM_ENTRY(IC_EVEX_L2_XD, 4, "requires EVEX and the L2 and XD prefix")\ ENUM_ENTRY(IC_EVEX_L2_OPSIZE, 4, "requires EVEX, L2, and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_W, 3, "requires EVEX, L2 and W") \ ENUM_ENTRY(IC_EVEX_L2_W_XS, 4, "requires EVEX, L2, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_XD, 4, "requires EVEX, L2, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE, 4, "requires EVEX, L2, W and OpSize") \ ENUM_ENTRY(IC_EVEX_K, 1, "requires an EVEX_K prefix") \ ENUM_ENTRY(IC_EVEX_XS_K, 2, "requires EVEX_K and the XS prefix") \ ENUM_ENTRY(IC_EVEX_XD_K, 2, "requires EVEX_K and the XD prefix") \ ENUM_ENTRY(IC_EVEX_OPSIZE_K, 2, "requires EVEX_K and the OpSize prefix") \ ENUM_ENTRY(IC_EVEX_W_K, 3, "requires EVEX_K and the W prefix") \ ENUM_ENTRY(IC_EVEX_W_XS_K, 4, "requires EVEX_K, W, and XS prefix") \ ENUM_ENTRY(IC_EVEX_W_XD_K, 4, "requires EVEX_K, W, and XD prefix") \ ENUM_ENTRY(IC_EVEX_W_OPSIZE_K, 4, "requires EVEX_K, W, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_K, 3, "requires EVEX_K and the L prefix") \ ENUM_ENTRY(IC_EVEX_L_XS_K, 4, "requires EVEX_K and the L and XS prefix")\ ENUM_ENTRY(IC_EVEX_L_XD_K, 4, "requires EVEX_K and the L and XD prefix")\ ENUM_ENTRY(IC_EVEX_L_OPSIZE_K, 4, "requires EVEX_K, L, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_W_K, 3, "requires EVEX_K, L and W") \ ENUM_ENTRY(IC_EVEX_L_W_XS_K, 4, "requires EVEX_K, L, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L_W_XD_K, 4, "requires EVEX_K, L, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K, 4, "requires EVEX_K, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_K, 3, "requires EVEX_K and the L2 prefix") \ ENUM_ENTRY(IC_EVEX_L2_XS_K, 4, "requires EVEX_K and the L2 and XS prefix")\ ENUM_ENTRY(IC_EVEX_L2_XD_K, 4, "requires EVEX_K and the L2 and XD prefix")\ ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K, 4, "requires EVEX_K, L2, and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_W_K, 3, "requires EVEX_K, L2 and W") \ ENUM_ENTRY(IC_EVEX_L2_W_XS_K, 4, "requires EVEX_K, L2, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize") \ ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix") \ ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix") \ ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix") \ ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix") \ ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix") \ ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix") \ ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix") \ ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_B, 3, "requires EVEX_B and the L prefix") \ ENUM_ENTRY(IC_EVEX_L_XS_B, 4, "requires EVEX_B and the L and XS prefix")\ ENUM_ENTRY(IC_EVEX_L_XD_B, 4, "requires EVEX_B and the L and XD prefix")\ ENUM_ENTRY(IC_EVEX_L_OPSIZE_B, 4, "requires EVEX_B, L, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_W_B, 3, "requires EVEX_B, L and W") \ ENUM_ENTRY(IC_EVEX_L_W_XS_B, 4, "requires EVEX_B, L, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L_W_XD_B, 4, "requires EVEX_B, L, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B, 4, "requires EVEX_B, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_B, 3, "requires EVEX_B and the L2 prefix") \ ENUM_ENTRY(IC_EVEX_L2_XS_B, 4, "requires EVEX_B and the L2 and XS prefix")\ ENUM_ENTRY(IC_EVEX_L2_XD_B, 4, "requires EVEX_B and the L2 and XD prefix")\ ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B, 4, "requires EVEX_B, L2, and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_W_B, 3, "requires EVEX_B, L2 and W") \ ENUM_ENTRY(IC_EVEX_L2_W_XS_B, 4, "requires EVEX_B, L2, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_XD_B, 4, "requires EVEX_B, L2, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4, "requires EVEX_B, L2, W and OpSize") \ ENUM_ENTRY(IC_EVEX_K_B, 1, "requires EVEX_B and EVEX_K prefix") \ ENUM_ENTRY(IC_EVEX_XS_K_B, 2, "requires EVEX_B, EVEX_K and the XS prefix") \ ENUM_ENTRY(IC_EVEX_XD_K_B, 2, "requires EVEX_B, EVEX_K and the XD prefix") \ ENUM_ENTRY(IC_EVEX_OPSIZE_K_B, 2, "requires EVEX_B, EVEX_K and the OpSize prefix") \ ENUM_ENTRY(IC_EVEX_W_K_B, 3, "requires EVEX_B, EVEX_K and the W prefix") \ ENUM_ENTRY(IC_EVEX_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, W, and XS prefix") \ ENUM_ENTRY(IC_EVEX_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, W, and XD prefix") \ ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, W, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_K_B, 3, "requires EVEX_B, EVEX_K and the L prefix") \ ENUM_ENTRY(IC_EVEX_L_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L and XS prefix")\ ENUM_ENTRY(IC_EVEX_L_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L and XD prefix")\ ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_W_K_B, 3, "requires EVEX_B, EVEX_K, L and W") \ ENUM_ENTRY(IC_EVEX_L_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_K_B, 3, "requires EVEX_B, EVEX_K and the L2 prefix") \ ENUM_ENTRY(IC_EVEX_L2_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XS prefix")\ ENUM_ENTRY(IC_EVEX_L2_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XD prefix")\ ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L2, and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_W_K_B, 3, "requires EVEX_B, EVEX_K, L2 and W") \ ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L2, W and OpSize") \ ENUM_ENTRY(IC_EVEX_KZ_B, 1, "requires EVEX_B and EVEX_KZ prefix") \ ENUM_ENTRY(IC_EVEX_XS_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XS prefix") \ ENUM_ENTRY(IC_EVEX_XD_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XD prefix") \ ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the OpSize prefix") \ ENUM_ENTRY(IC_EVEX_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the W prefix") \ ENUM_ENTRY(IC_EVEX_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XS prefix") \ ENUM_ENTRY(IC_EVEX_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XD prefix") \ ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L prefix") \ ENUM_ENTRY(IC_EVEX_L_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XS prefix")\ ENUM_ENTRY(IC_EVEX_L_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XD prefix")\ ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L and W") \ ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L2 prefix") \ ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\ ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\ ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L2 and W") \ ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and OpSize") \ ENUM_ENTRY(IC_EVEX_KZ, 1, "requires an EVEX_KZ prefix") \ ENUM_ENTRY(IC_EVEX_XS_KZ, 2, "requires EVEX_KZ and the XS prefix") \ ENUM_ENTRY(IC_EVEX_XD_KZ, 2, "requires EVEX_KZ and the XD prefix") \ ENUM_ENTRY(IC_EVEX_OPSIZE_KZ, 2, "requires EVEX_KZ and the OpSize prefix") \ ENUM_ENTRY(IC_EVEX_W_KZ, 3, "requires EVEX_KZ and the W prefix") \ ENUM_ENTRY(IC_EVEX_W_XS_KZ, 4, "requires EVEX_KZ, W, and XS prefix") \ ENUM_ENTRY(IC_EVEX_W_XD_KZ, 4, "requires EVEX_KZ, W, and XD prefix") \ ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ, 4, "requires EVEX_KZ, W, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_KZ, 3, "requires EVEX_KZ and the L prefix") \ ENUM_ENTRY(IC_EVEX_L_XS_KZ, 4, "requires EVEX_KZ and the L and XS prefix")\ ENUM_ENTRY(IC_EVEX_L_XD_KZ, 4, "requires EVEX_KZ and the L and XD prefix")\ ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ, 4, "requires EVEX_KZ, L, and OpSize") \ ENUM_ENTRY(IC_EVEX_L_W_KZ, 3, "requires EVEX_KZ, L and W") \ ENUM_ENTRY(IC_EVEX_L_W_XS_KZ, 4, "requires EVEX_KZ, L, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L_W_XD_KZ, 4, "requires EVEX_KZ, L, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L, W and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_KZ, 3, "requires EVEX_KZ and the L2 prefix") \ ENUM_ENTRY(IC_EVEX_L2_XS_KZ, 4, "requires EVEX_KZ and the L2 and XS prefix")\ ENUM_ENTRY(IC_EVEX_L2_XD_KZ, 4, "requires EVEX_KZ and the L2 and XD prefix")\ ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, and OpSize") \ ENUM_ENTRY(IC_EVEX_L2_W_KZ, 3, "requires EVEX_KZ, L2 and W") \ ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ, 4, "requires EVEX_KZ, L2, W and XS prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ, 4, "requires EVEX_KZ, L2, W and XD prefix") \ ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, W and OpSize") #define ENUM_ENTRY(n, r, d) n, typedef enum { INSTRUCTION_CONTEXTS IC_max } InstructionContext; #undef ENUM_ENTRY /* * Opcode types, which determine which decode table to use, both in the Intel * manual and also for the decoder. */ typedef enum { ONEBYTE = 0, TWOBYTE = 1, THREEBYTE_38 = 2, THREEBYTE_3A = 3, XOP8_MAP = 4, XOP9_MAP = 5, XOPA_MAP = 6, T3DNOW_MAP = 7 } OpcodeType; /* * The following structs are used for the hierarchical decode table. After * determining the instruction's class (i.e., which IC_* constant applies to * it), the decoder reads the opcode. Some instructions require specific * values of the ModR/M byte, so the ModR/M byte indexes into the final table. * * If a ModR/M byte is not required, "required" is left unset, and the values * for each instructionID are identical. */ typedef uint16_t InstrUID; /* * ModRMDecisionType - describes the type of ModR/M decision, allowing the * consumer to determine the number of entries in it. * * MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded * instruction is the same. * MODRM_SPLITRM - If the ModR/M byte is between 0x00 and 0xbf, the opcode * corresponds to one instruction; otherwise, it corresponds to * a different instruction. * MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte * divided by 8 is used to select instruction; otherwise, each * value of the ModR/M byte could correspond to a different * instruction. * MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This corresponds to instructions that use reg field as opcode * MODRM_FULL - Potentially, each value of the ModR/M byte could correspond * to a different instruction. */ #define MODRMTYPES \ ENUM_ENTRY(MODRM_ONEENTRY) \ ENUM_ENTRY(MODRM_SPLITRM) \ ENUM_ENTRY(MODRM_SPLITMISC) \ ENUM_ENTRY(MODRM_SPLITREG) \ ENUM_ENTRY(MODRM_FULL) #define ENUM_ENTRY(n) n, typedef enum { MODRMTYPES MODRM_max } ModRMDecisionType; #undef ENUM_ENTRY #define CASE_ENCODING_RM \ case ENCODING_RM: \ case ENCODING_RM_CD2: \ case ENCODING_RM_CD4: \ case ENCODING_RM_CD8: \ case ENCODING_RM_CD16: \ case ENCODING_RM_CD32: \ case ENCODING_RM_CD64 // Physical encodings of instruction operands. #define ENCODINGS \ ENUM_ENTRY(ENCODING_NONE, "") \ ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.") \ ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.") \ ENUM_ENTRY(ENCODING_RM_CD2, "R/M operand with CDisp scaling of 2") \ ENUM_ENTRY(ENCODING_RM_CD4, "R/M operand with CDisp scaling of 4") \ ENUM_ENTRY(ENCODING_RM_CD8, "R/M operand with CDisp scaling of 8") \ ENUM_ENTRY(ENCODING_RM_CD16,"R/M operand with CDisp scaling of 16") \ ENUM_ENTRY(ENCODING_RM_CD32,"R/M operand with CDisp scaling of 32") \ ENUM_ENTRY(ENCODING_RM_CD64,"R/M operand with CDisp scaling of 64") \ ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \ ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.") \ ENUM_ENTRY(ENCODING_CB, "1-byte code offset (possible new CS value)") \ ENUM_ENTRY(ENCODING_CW, "2-byte") \ ENUM_ENTRY(ENCODING_CD, "4-byte") \ ENUM_ENTRY(ENCODING_CP, "6-byte") \ ENUM_ENTRY(ENCODING_CO, "8-byte") \ ENUM_ENTRY(ENCODING_CT, "10-byte") \ ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \ ENUM_ENTRY(ENCODING_IW, "2-byte") \ ENUM_ENTRY(ENCODING_ID, "4-byte") \ ENUM_ENTRY(ENCODING_IO, "8-byte") \ ENUM_ENTRY(ENCODING_RB, "(AL..DIL, R8L..R15L) Register code added to " \ "the opcode byte") \ ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)") \ ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)") \ ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)") \ ENUM_ENTRY(ENCODING_FP, "Position on floating-point stack in ModR/M " \ "byte.") \ ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \ ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \ ENUM_ENTRY(ENCODING_Rv, "Register code of operand size added to the " \ "opcode byte") \ ENUM_ENTRY(ENCODING_DUP, "Duplicate of another operand; ID is encoded " \ "in type") \ ENUM_ENTRY(ENCODING_SI, "Source index; encoded in OpSize/Adsize prefix") \ ENUM_ENTRY(ENCODING_DI, "Destination index; encoded in prefixes") #define ENUM_ENTRY(n, d) n, typedef enum { ENCODINGS ENCODING_max } OperandEncoding; #undef ENUM_ENTRY /* * Semantic interpretations of instruction operands. */ #define TYPES \ ENUM_ENTRY(TYPE_NONE, "") \ ENUM_ENTRY(TYPE_REL8, "1-byte immediate address") \ ENUM_ENTRY(TYPE_REL16, "2-byte") \ ENUM_ENTRY(TYPE_REL32, "4-byte") \ ENUM_ENTRY(TYPE_REL64, "8-byte") \ ENUM_ENTRY(TYPE_PTR1616, "2+2-byte segment+offset address") \ ENUM_ENTRY(TYPE_PTR1632, "2+4-byte") \ ENUM_ENTRY(TYPE_PTR1664, "2+8-byte") \ ENUM_ENTRY(TYPE_R8, "1-byte register operand") \ ENUM_ENTRY(TYPE_R16, "2-byte") \ ENUM_ENTRY(TYPE_R32, "4-byte") \ ENUM_ENTRY(TYPE_R64, "8-byte") \ ENUM_ENTRY(TYPE_IMM8, "1-byte immediate operand") \ ENUM_ENTRY(TYPE_IMM16, "2-byte") \ ENUM_ENTRY(TYPE_IMM32, "4-byte") \ ENUM_ENTRY(TYPE_IMM64, "8-byte") \ ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \ ENUM_ENTRY(TYPE_IMM5, "1-byte immediate operand between 0 and 31") \ ENUM_ENTRY(TYPE_AVX512ICC, "1-byte immediate operand for AVX512 icmp") \ ENUM_ENTRY(TYPE_UIMM8, "1-byte unsigned immediate operand") \ ENUM_ENTRY(TYPE_RM8, "1-byte register or memory operand") \ ENUM_ENTRY(TYPE_RM16, "2-byte") \ ENUM_ENTRY(TYPE_RM32, "4-byte") \ ENUM_ENTRY(TYPE_RM64, "8-byte") \ ENUM_ENTRY(TYPE_M, "Memory operand") \ ENUM_ENTRY(TYPE_M8, "1-byte") \ ENUM_ENTRY(TYPE_M16, "2-byte") \ ENUM_ENTRY(TYPE_M32, "4-byte") \ ENUM_ENTRY(TYPE_M64, "8-byte") \ ENUM_ENTRY(TYPE_LEA, "Effective address") \ ENUM_ENTRY(TYPE_M128, "16-byte (SSE/SSE2)") \ ENUM_ENTRY(TYPE_M256, "256-byte (AVX)") \ ENUM_ENTRY(TYPE_M1616, "2+2-byte segment+offset address") \ ENUM_ENTRY(TYPE_M1632, "2+4-byte") \ ENUM_ENTRY(TYPE_M1664, "2+8-byte") \ ENUM_ENTRY(TYPE_SRCIDX8, "1-byte memory at source index") \ ENUM_ENTRY(TYPE_SRCIDX16, "2-byte memory at source index") \ ENUM_ENTRY(TYPE_SRCIDX32, "4-byte memory at source index") \ ENUM_ENTRY(TYPE_SRCIDX64, "8-byte memory at source index") \ ENUM_ENTRY(TYPE_DSTIDX8, "1-byte memory at destination index") \ ENUM_ENTRY(TYPE_DSTIDX16, "2-byte memory at destination index") \ ENUM_ENTRY(TYPE_DSTIDX32, "4-byte memory at destination index") \ ENUM_ENTRY(TYPE_DSTIDX64, "8-byte memory at destination index") \ ENUM_ENTRY(TYPE_MOFFS8, "1-byte memory offset (relative to segment " \ "base)") \ ENUM_ENTRY(TYPE_MOFFS16, "2-byte") \ ENUM_ENTRY(TYPE_MOFFS32, "4-byte") \ ENUM_ENTRY(TYPE_MOFFS64, "8-byte") \ ENUM_ENTRY(TYPE_SREG, "Byte with single bit set: 0 = ES, 1 = CS, " \ "2 = SS, 3 = DS, 4 = FS, 5 = GS") \ ENUM_ENTRY(TYPE_M32FP, "32-bit IEE754 memory floating-point operand") \ ENUM_ENTRY(TYPE_M64FP, "64-bit") \ ENUM_ENTRY(TYPE_M80FP, "80-bit extended") \ ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack") \ ENUM_ENTRY(TYPE_MM64, "8-byte MMX register") \ ENUM_ENTRY(TYPE_XMM, "XMM register operand") \ ENUM_ENTRY(TYPE_XMM32, "4-byte XMM register or memory operand") \ ENUM_ENTRY(TYPE_XMM64, "8-byte") \ ENUM_ENTRY(TYPE_XMM128, "16-byte") \ ENUM_ENTRY(TYPE_XMM256, "32-byte") \ ENUM_ENTRY(TYPE_XMM512, "64-byte") \ ENUM_ENTRY(TYPE_VK1, "1-bit") \ ENUM_ENTRY(TYPE_VK2, "2-bit") \ ENUM_ENTRY(TYPE_VK4, "4-bit") \ ENUM_ENTRY(TYPE_VK8, "8-bit") \ ENUM_ENTRY(TYPE_VK16, "16-bit") \ ENUM_ENTRY(TYPE_VK32, "32-bit") \ ENUM_ENTRY(TYPE_VK64, "64-bit") \ ENUM_ENTRY(TYPE_XMM0, "Implicit use of XMM0") \ ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand") \ ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand") \ ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand") \ \ ENUM_ENTRY(TYPE_Mv, "Memory operand of operand size") \ ENUM_ENTRY(TYPE_Rv, "Register operand of operand size") \ ENUM_ENTRY(TYPE_IMMv, "Immediate operand of operand size") \ ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \ ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0") \ ENUM_ENTRY(TYPE_DUP1, "operand 1") \ ENUM_ENTRY(TYPE_DUP2, "operand 2") \ ENUM_ENTRY(TYPE_DUP3, "operand 3") \ ENUM_ENTRY(TYPE_DUP4, "operand 4") \ ENUM_ENTRY(TYPE_M512, "512-bit FPU/MMX/XMM/MXCSR state") #define ENUM_ENTRY(n, d) n, typedef enum { TYPES TYPE_max } OperandType; #undef ENUM_ENTRY /* * OperandSpecifier - The specification for how to extract and interpret one * operand. */ typedef struct OperandSpecifier { uint8_t encoding; uint8_t type; } OperandSpecifier; #define X86_MAX_OPERANDS 6 /* * Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode * are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode, * respectively. */ typedef enum { MODE_16BIT, MODE_32BIT, MODE_64BIT } DisassemblerMode; #endif capstone-sys-0.11.0/capstone/arch/X86/X86GenAsmWriter.inc010066400017500001750000023420071363402546700211540ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 12628U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 12621U, // BUNDLE 12693U, // LIFETIME_START 12608U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 12708U, // AAA 17790U, // AAD8i8 21568U, // AAM8i8 13482U, // AAS 13490U, // ABS_F 0U, // ABS_Fp32 0U, // ABS_Fp64 0U, // ABS_Fp80 12259U, // ACQUIRE_MOV16rm 12259U, // ACQUIRE_MOV32rm 12259U, // ACQUIRE_MOV64rm 12259U, // ACQUIRE_MOV8rm 2122900U, // ADC16i16 4236436U, // ADC16mi 4236436U, // ADC16mi8 4236436U, // ADC16mr 6349972U, // ADC16ri 6349972U, // ADC16ri8 6366356U, // ADC16rm 6349972U, // ADC16rr 8447124U, // ADC16rr_REV 10506317U, // ADC32i32 12619853U, // ADC32mi 12619853U, // ADC32mi8 12619853U, // ADC32mr 6344781U, // ADC32ri 6344781U, // ADC32ri8 283201613U, // ADC32rm 6344781U, // ADC32rr 8441933U, // ADC32rr_REV 16799240U, // ADC64i32 18912776U, // ADC64mi32 18912776U, // ADC64mi8 18912776U, // ADC64mr 6346248U, // ADC64ri32 6346248U, // ADC64ri8 283219464U, // ADC64rm 6346248U, // ADC64rr 8443400U, // ADC64rr_REV 20988574U, // ADC8i8 23102110U, // ADC8mi 23102110U, // ADC8mi8 23102110U, // ADC8mr 6341278U, // ADC8ri 6341278U, // ADC8ri8 115358U, // ADC8rm 6341278U, // ADC8rr 8438430U, // ADC8rr_REV 551638031U, // ADCX32rm 8442895U, // ADCX32rr 551656374U, // ADCX64rm 8444854U, // ADCX64rr 2122942U, // ADD16i16 4236478U, // ADD16mi 4236478U, // ADD16mi8 4236478U, // ADD16mr 6350014U, // ADD16ri 6350014U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 6366398U, // ADD16rm 6350014U, // ADD16rr 0U, // ADD16rr_DB 8447166U, // ADD16rr_REV 10506351U, // ADD32i32 12619887U, // ADD32mi 12619887U, // ADD32mi8 12619887U, // ADD32mr 6344815U, // ADD32ri 6344815U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 283201647U, // ADD32rm 6344815U, // ADD32rr 0U, // ADD32rr_DB 8441967U, // ADD32rr_REV 16799340U, // ADD64i32 18912876U, // ADD64mi32 18912876U, // ADD64mi8 18912876U, // ADD64mr 6346348U, // ADD64ri32 0U, // ADD64ri32_DB 6346348U, // ADD64ri8 0U, // ADD64ri8_DB 283219564U, // ADD64rm 6346348U, // ADD64rr 0U, // ADD64rr_DB 8443500U, // ADD64rr_REV 20988594U, // ADD8i8 23102130U, // ADD8mi 23102130U, // ADD8mi8 23102130U, // ADD8mr 6341298U, // ADD8ri 6341298U, // ADD8ri8 115378U, // ADD8rm 6341298U, // ADD8rr 8438450U, // ADD8rr_REV 8522010U, // ADDPDrm 8440090U, // ADDPDrr 8527569U, // ADDPSrm 8445649U, // ADDPSrr 551701609U, // ADDSDrm 551701609U, // ADDSDrm_Int 8440937U, // ADDSDrr 8440937U, // ADDSDrr_Int 551723552U, // ADDSSrm 551723552U, // ADDSSrm_Int 8446496U, // ADDSSrr 8446496U, // ADDSSrr_Int 8521883U, // ADDSUBPDrm 8439963U, // ADDSUBPDrr 8527442U, // ADDSUBPSrm 8445522U, // ADDSUBPSrr 187492U, // ADD_F32m 200814U, // ADD_F64m 220267U, // ADD_FI16m 233589U, // ADD_FI32m 21684U, // ADD_FPrST0 17872U, // ADD_FST0r 0U, // ADD_Fp32 0U, // ADD_Fp32m 0U, // ADD_Fp64 0U, // ADD_Fp64m 0U, // ADD_Fp64m32 0U, // ADD_Fp80 0U, // ADD_Fp80m32 0U, // ADD_Fp80m64 0U, // ADD_FpI16m32 0U, // ADD_FpI16m64 0U, // ADD_FpI16m80 0U, // ADD_FpI32m32 0U, // ADD_FpI32m64 0U, // ADD_FpI32m80 26978U, // ADD_FrST0 12647U, // ADJCALLSTACKDOWN32 12647U, // ADJCALLSTACKDOWN64 12665U, // ADJCALLSTACKUP32 12665U, // ADJCALLSTACKUP64 551801892U, // ADOX32rm 551818276U, // ADOX32rr 551836619U, // ADOX64rm 551820235U, // ADOX64rr 8692540U, // AESDECLASTrm 8446780U, // AESDECLASTrr 8684823U, // AESDECrm 8439063U, // AESDECrr 8692553U, // AESENCLASTrm 8446793U, // AESENCLASTrr 8684871U, // AESENCrm 8439111U, // AESENCrr 312638U, // AESIMCrm 551814462U, // AESIMCrr 25502563U, // AESKEYGENASSIST128rm 811950947U, // AESKEYGENASSIST128rr 2122980U, // AND16i16 4236516U, // AND16mi 4236516U, // AND16mi8 4236516U, // AND16mr 6350052U, // AND16ri 6350052U, // AND16ri8 6366436U, // AND16rm 6350052U, // AND16rr 8447204U, // AND16rr_REV 10506404U, // AND32i32 12619940U, // AND32mi 12619940U, // AND32mi8 12619940U, // AND32mr 6344868U, // AND32ri 6344868U, // AND32ri8 283201700U, // AND32rm 6344868U, // AND32rr 8442020U, // AND32rr_REV 16799431U, // AND64i32 18912967U, // AND64mi32 18912967U, // AND64mi8 18912967U, // AND64mr 6346439U, // AND64ri32 6346439U, // AND64ri8 283219655U, // AND64rm 6346439U, // AND64rr 8443591U, // AND64rr_REV 20988608U, // AND8i8 23102144U, // AND8mi 23102144U, // AND8mi8 23102144U, // AND8mr 6341312U, // AND8ri 6341312U, // AND8ri8 115392U, // AND8rm 6341312U, // AND8rr 8438464U, // AND8rr_REV 283202039U, // ANDN32rm 811651575U, // ANDN32rr 283220218U, // ANDN64rm 811653370U, // ANDN64rr 8522240U, // ANDNPDrm 8440320U, // ANDNPDrr 8527828U, // ANDNPSrm 8445908U, // ANDNPSrr 8522059U, // ANDPDrm 8440139U, // ANDPDrr 8527618U, // ANDPSrm 8445698U, // ANDPSrr 4231766U, // ARPL16mr 551817814U, // ARPL16rr 0U, // AVX2_SETALLONES 0U, // AVX512_512_SET0 0U, // AVX_SET0 832934625U, // BEXTR32rm 811651809U, // BEXTR32rr 835033571U, // BEXTR64rm 811653603U, // BEXTR64rr 832937025U, // BEXTRI32mi 811654209U, // BEXTRI32ri 835034177U, // BEXTRI64mi 811654209U, // BEXTRI64ri 551801240U, // BLCFILL32rm 551817624U, // BLCFILL32rr 551834008U, // BLCFILL64rm 551817624U, // BLCFILL64rr 551800627U, // BLCI32rm 551817011U, // BLCI32rr 551833395U, // BLCI64rm 551817011U, // BLCI64rr 551798055U, // BLCIC32rm 551814439U, // BLCIC32rr 551830823U, // BLCIC64rm 551814439U, // BLCIC64rr 551800827U, // BLCMSK32rm 551817211U, // BLCMSK32rr 551833595U, // BLCMSK64rm 551817211U, // BLCMSK64rr 551803998U, // BLCS32rm 551820382U, // BLCS32rr 551836766U, // BLCS64rm 551820382U, // BLCS64rr 568707419U, // BLENDPDrmi 570820955U, // BLENDPDrri 568712978U, // BLENDPSrmi 570826514U, // BLENDPSrri 8522424U, // BLENDVPDrm0 8440504U, // BLENDVPDrr0 8528077U, // BLENDVPSrm0 8446157U, // BLENDVPSrr0 551801249U, // BLSFILL32rm 551817633U, // BLSFILL32rr 551834017U, // BLSFILL64rm 551817633U, // BLSFILL64rr 551801185U, // BLSI32rm 551817569U, // BLSI32rr 551835727U, // BLSI64rm 551819343U, // BLSI64rr 551798062U, // BLSIC32rm 551814446U, // BLSIC32rr 551830830U, // BLSIC64rm 551814446U, // BLSIC64rr 551801205U, // BLSMSK32rm 551817589U, // BLSMSK32rr 551835743U, // BLSMSK64rm 551819359U, // BLSMSK64rr 551801550U, // BLSR32rm 551817934U, // BLSR32rr 551836093U, // BLSR64rm 551819709U, // BLSR64rr 551798523U, // BOUNDS16rm 551831291U, // BOUNDS32rm 419188U, // BSF16rm 551822708U, // BSF16rr 551801141U, // BSF32rm 551817525U, // BSF32rr 551835683U, // BSF64rm 551819299U, // BSF64rr 419586U, // BSR16rm 551823106U, // BSR16rr 551801544U, // BSR32rm 551817928U, // BSR32rr 551836087U, // BSR64rm 551819703U, // BSR64rr 21012U, // BSWAP32r 22820U, // BSWAP64r 4237315U, // BT16mi8 4237315U, // BT16mr 551823363U, // BT16ri8 551823363U, // BT16rr 12620653U, // BT32mi8 12620653U, // BT32mr 551818093U, // BT32ri8 551818093U, // BT32rr 18913915U, // BT64mi8 18913915U, // BT64mr 551819899U, // BT64ri8 551819899U, // BT64rr 4236461U, // BTC16mi8 4236461U, // BTC16mr 551822509U, // BTC16ri8 551822509U, // BTC16rr 12619871U, // BTC32mi8 12619871U, // BTC32mr 551817311U, // BTC32ri8 551817311U, // BTC32rr 18912794U, // BTC64mi8 18912794U, // BTC64mr 551818778U, // BTC64ri8 551818778U, // BTC64rr 4237073U, // BTR16mi8 4237073U, // BTR16mr 551823121U, // BTR16ri8 551823121U, // BTR16rr 12620501U, // BTR32mi8 12620501U, // BTR32mr 551817941U, // BTR32ri8 551817941U, // BTR32rr 18913741U, // BTR64mi8 18913741U, // BTR64mr 551819725U, // BTR64ri8 551819725U, // BTR64rr 4237257U, // BTS16mi8 4237257U, // BTS16mr 551823305U, // BTS16ri8 551823305U, // BTS16rr 12620632U, // BTS32mi8 12620632U, // BTS32mr 551818072U, // BTS32ri8 551818072U, // BTS32rr 18913892U, // BTS64mi8 18913892U, // BTS64mr 551819876U, // BTS64ri8 551819876U, // BTS64rr 832934234U, // BZHI32rm 811651418U, // BZHI32rr 835033160U, // BZHI64rm 811653192U, // BZHI64rr 225341U, // CALL16m 28733U, // CALL16r 241678U, // CALL32m 28686U, // CALL32r 438303U, // CALL64m 448636U, // CALL64pcrel32 28703U, // CALL64r 452077U, // CALLpcrel16 446891U, // CALLpcrel32 13961U, // CBW 12855U, // CDQ 13427U, // CDQE 13712U, // CHS_F 0U, // CHS_Fp32 0U, // CHS_Fp64 0U, // CHS_Fp80 12777U, // CLAC 12809U, // CLC 12846U, // CLD 462634U, // CLFLUSH 467735U, // CLFLUSHOPT 13020U, // CLGI 13030U, // CLI 13825U, // CLTS 460002U, // CLWB 12813U, // CMC 8463347U, // CMOVA16rm 8446963U, // CMOVA16rr 551637016U, // CMOVA32rm 8441880U, // CMOVA32rr 551654831U, // CMOVA64rm 8443311U, // CMOVA64rr 8463672U, // CMOVAE16rm 8447288U, // CMOVAE16rr 551637194U, // CMOVAE32rm 8442058U, // CMOVAE32rr 551655343U, // CMOVAE64rm 8443823U, // CMOVAE64rr 8463470U, // CMOVB16rm 8447086U, // CMOVB16rr 551637053U, // CMOVB32rm 8441917U, // CMOVB32rr 551654882U, // CMOVB64rm 8443362U, // CMOVB64rr 8463681U, // CMOVBE16rm 8447297U, // CMOVBE16rr 551637203U, // CMOVBE32rm 8442067U, // CMOVBE32rr 551655352U, // CMOVBE64rm 8443832U, // CMOVBE64rr 35671652U, // CMOVBE_F 0U, // CMOVBE_Fp32 0U, // CMOVBE_Fp64 0U, // CMOVBE_Fp80 35669203U, // CMOVB_F 0U, // CMOVB_Fp32 0U, // CMOVB_Fp64 0U, // CMOVB_Fp80 8463717U, // CMOVE16rm 8447333U, // CMOVE16rr 551637293U, // CMOVE32rm 8442157U, // CMOVE32rr 551655451U, // CMOVE64rm 8443931U, // CMOVE64rr 35671774U, // CMOVE_F 0U, // CMOVE_Fp32 0U, // CMOVE_Fp64 0U, // CMOVE_Fp80 8463770U, // CMOVG16rm 8447386U, // CMOVG16rr 551637323U, // CMOVG32rm 8442187U, // CMOVG32rr 551655481U, // CMOVG64rm 8443961U, // CMOVG64rr 8463690U, // CMOVGE16rm 8447306U, // CMOVGE16rr 551637212U, // CMOVGE32rm 8442076U, // CMOVGE32rr 551655361U, // CMOVGE64rm 8443841U, // CMOVGE64rr 8463914U, // CMOVL16rm 8447530U, // CMOVL16rr 551637472U, // CMOVL32rm 8442336U, // CMOVL32rr 551655617U, // CMOVL64rm 8444097U, // CMOVL64rr 8463699U, // CMOVLE16rm 8447315U, // CMOVLE16rr 551637221U, // CMOVLE32rm 8442085U, // CMOVLE32rr 551655370U, // CMOVLE64rm 8443850U, // CMOVLE64rr 35671635U, // CMOVNBE_F 0U, // CMOVNBE_Fp32 0U, // CMOVNBE_Fp64 0U, // CMOVNBE_Fp80 35668840U, // CMOVNB_F 0U, // CMOVNB_Fp32 0U, // CMOVNB_Fp64 0U, // CMOVNB_Fp80 8463708U, // CMOVNE16rm 8447324U, // CMOVNE16rr 551637230U, // CMOVNE32rm 8442094U, // CMOVNE32rr 551655379U, // CMOVNE64rm 8443859U, // CMOVNE64rr 35671725U, // CMOVNE_F 0U, // CMOVNE_Fp32 0U, // CMOVNE_Fp64 0U, // CMOVNE_Fp80 8463963U, // CMOVNO16rm 8447579U, // CMOVNO16rr 551637507U, // CMOVNO32rm 8442371U, // CMOVNO32rr 551655699U, // CMOVNO64rm 8444179U, // CMOVNO64rr 8463995U, // CMOVNP16rm 8447611U, // CMOVNP16rr 551637569U, // CMOVNP32rm 8442433U, // CMOVNP32rr 551655739U, // CMOVNP64rm 8444219U, // CMOVNP64rr 35677053U, // CMOVNP_F 0U, // CMOVNP_Fp32 0U, // CMOVNP_Fp64 0U, // CMOVNP_Fp80 8464296U, // CMOVNS16rm 8447912U, // CMOVNS16rr 551637801U, // CMOVNS32rm 8442665U, // CMOVNS32rr 551655976U, // CMOVNS64rm 8444456U, // CMOVNS64rr 8463972U, // CMOVO16rm 8447588U, // CMOVO16rr 551637516U, // CMOVO32rm 8442380U, // CMOVO32rr 551655708U, // CMOVO64rm 8444188U, // CMOVO64rr 8464016U, // CMOVP16rm 8447632U, // CMOVP16rr 551637620U, // CMOVP32rm 8442484U, // CMOVP32rr 551655754U, // CMOVP64rm 8444234U, // CMOVP64rr 35677092U, // CMOVP_F 0U, // CMOVP_Fp32 0U, // CMOVP_Fp64 0U, // CMOVP_Fp80 8464370U, // CMOVS16rm 8447986U, // CMOVS16rr 551637861U, // CMOVS32rm 8442725U, // CMOVS32rr 551656042U, // CMOVS64rm 8444522U, // CMOVS64rr 11968U, // CMOV_FR32 12155U, // CMOV_FR64 12175U, // CMOV_GR16 11988U, // CMOV_GR32 12195U, // CMOV_GR8 11947U, // CMOV_RFP32 12134U, // CMOV_RFP64 11862U, // CMOV_RFP80 11904U, // CMOV_V16F32 12008U, // CMOV_V2F64 12071U, // CMOV_V2I64 11883U, // CMOV_V4F32 12029U, // CMOV_V4F64 12092U, // CMOV_V4I64 11926U, // CMOV_V8F32 12050U, // CMOV_V8F64 12113U, // CMOV_V8I64 2123374U, // CMP16i16 4236910U, // CMP16mi 4236910U, // CMP16mi8 4236910U, // CMP16mr 551822958U, // CMP16ri 551822958U, // CMP16ri8 419438U, // CMP16rm 551822958U, // CMP16rr 551822958U, // CMP16rr_REV 10506787U, // CMP32i32 12620323U, // CMP32mi 12620323U, // CMP32mi8 12620323U, // CMP32mr 551817763U, // CMP32ri 551817763U, // CMP32ri8 551801379U, // CMP32rm 551817763U, // CMP32rr 551817763U, // CMP32rr_REV 16800053U, // CMP64i32 18913589U, // CMP64mi32 18913589U, // CMP64mi8 18913589U, // CMP64mr 551819573U, // CMP64ri32 551819573U, // CMP64ri8 551835957U, // CMP64rm 551819573U, // CMP64rr 551819573U, // CMP64rr_REV 20988787U, // CMP8i8 23102323U, // CMP8mi 23102323U, // CMP8mi8 23102323U, // CMP8mr 551814003U, // CMP8ri 551814003U, // CMP8ri8 476019U, // CMP8rm 551814003U, // CMP8rr 551814003U, // CMP8rr_REV 1111995373U, // CMPPDrmi 568707608U, // CMPPDrmi_alt 1380447213U, // CMPPDrri 570821144U, // CMPPDrri_alt 1114092525U, // CMPPSrmi 568713204U, // CMPPSrmi_alt 1382544365U, // CMPPSrri 570826740U, // CMPPSrri_alt 1625818148U, // CMPSB 1921496045U, // CMPSDrm 581291207U, // CMPSDrm_alt 1384641517U, // CMPSDrr 570821831U, // CMPSDrr_alt 2162709298U, // CMPSL 2431162929U, // CMPSQ 2730996717U, // CMPSSrm 585491069U, // CMPSSrm_alt 1388835821U, // CMPSSrr 570827389U, // CMPSSrr_alt 2968053681U, // CMPSW 590449U, // CMPXCHG16B 4236680U, // CMPXCHG16rm 551822728U, // CMPXCHG16rr 12620097U, // CMPXCHG32rm 551817537U, // CMPXCHG32rr 18913327U, // CMPXCHG64rm 551819311U, // CMPXCHG64rr 426621U, // CMPXCHG8B 23102195U, // CMPXCHG8rm 551813875U, // CMPXCHG8rr 609436U, // COMISDrm 551816348U, // COMISDrr 614995U, // COMISSrm 551821907U, // COMISSrr 21721U, // COMP_FST0r 20338U, // COM_FIPr 20281U, // COM_FIr 21573U, // COM_FST0r 13774U, // COS_F 0U, // COS_Fp32 0U, // COS_Fp64 0U, // COS_Fp80 12840U, // CPUID 13275U, // CQO 6366155U, // CRC32r32m16 283201546U, // CRC32r32m32 115295U, // CRC32r32m8 6349771U, // CRC32r32r16 6344714U, // CRC32r32r32 6341215U, // CRC32r32r8 283219289U, // CRC32r64m64 115295U, // CRC32r64m8 6346073U, // CRC32r64r64 6341215U, // CRC32r64r8 551831513U, // CVTDQ2PDrm 551815129U, // CVTDQ2PDrr 318883U, // CVTDQ2PSrm 551820707U, // CVTDQ2PSrr 611885U, // CVTPD2DQrm 551818797U, // CVTPD2DQrr 613731U, // CVTPD2PSrm 551820643U, // CVTPD2PSrr 611917U, // CVTPS2DQrm 551818829U, // CVTPS2DQrr 552175600U, // CVTPS2PDrm 551815152U, // CVTPS2PDrr 552177576U, // CVTSD2SI64rm 551817128U, // CVTSD2SI64rr 552177576U, // CVTSD2SIrm 551817128U, // CVTSD2SIrr 552182164U, // CVTSD2SSrm 551821716U, // CVTSD2SSrr 551835440U, // CVTSI2SD64rm 551819056U, // CVTSI2SD64rr 551801010U, // CVTSI2SDrm 551817394U, // CVTSI2SDrr 551836217U, // CVTSI2SS64rm 551819833U, // CVTSI2SS64rr 551801658U, // CVTSI2SSrm 551818042U, // CVTSI2SSrr 552192981U, // CVTSS2SDrm 551816149U, // CVTSS2SDrr 552193983U, // CVTSS2SI64rm 551817151U, // CVTSS2SI64rr 552193983U, // CVTSS2SIrm 551817151U, // CVTSS2SIrr 611873U, // CVTTPD2DQrm 551818785U, // CVTTPD2DQrr 611905U, // CVTTPS2DQrm 551818817U, // CVTTPS2DQrr 552177564U, // CVTTSD2SI64rm 551817116U, // CVTTSD2SI64rr 552177564U, // CVTTSD2SIrm 551817116U, // CVTTSD2SIrr 552193971U, // CVTTSS2SI64rm 551817139U, // CVTTSS2SI64rr 552193971U, // CVTTSS2SIrm 551817139U, // CVTTSS2SIrr 12864U, // CWD 13184U, // CWDE 12712U, // DAA 13486U, // DAS 12593U, // DATA16_PREFIX 222369U, // DEC16m 25761U, // DEC16r 25761U, // DEC16r_alt 233555U, // DEC32m 20563U, // DEC32r 20563U, // DEC32r_alt 431630U, // DEC64m 22030U, // DEC64r 459428U, // DEC8m 17060U, // DEC8r 223423U, // DIV16m 26815U, // DIV16r 234468U, // DIV32m 21476U, // DIV32r 432969U, // DIV64m 23369U, // DIV64r 459981U, // DIV8m 17613U, // DIV8r 8522435U, // DIVPDrm 8440515U, // DIVPDrr 8528088U, // DIVPSrm 8446168U, // DIVPSrr 188694U, // DIVR_F32m 201449U, // DIVR_F64m 221470U, // DIVR_FI16m 234225U, // DIVR_FI32m 21842U, // DIVR_FPrST0 23624U, // DIVR_FST0r 0U, // DIVR_Fp32m 0U, // DIVR_Fp64m 0U, // DIVR_Fp64m32 0U, // DIVR_Fp80m32 0U, // DIVR_Fp80m64 0U, // DIVR_FpI16m32 0U, // DIVR_FpI16m64 0U, // DIVR_FpI16m80 0U, // DIVR_FpI32m32 0U, // DIVR_FpI32m64 0U, // DIVR_FpI32m80 27067U, // DIVR_FrST0 551701756U, // DIVSDrm 551701756U, // DIVSDrm_Int 8441084U, // DIVSDrr 8441084U, // DIVSDrr_Int 551723695U, // DIVSSrm 551723695U, // DIVSSrm_Int 8446639U, // DIVSSrr 8446639U, // DIVSSrr_Int 189154U, // DIV_F32m 201699U, // DIV_F64m 221929U, // DIV_FI16m 234474U, // DIV_FI32m 21767U, // DIV_FPrST0 25516U, // DIV_FST0r 0U, // DIV_Fp32 0U, // DIV_Fp32m 0U, // DIV_Fp64 0U, // DIV_Fp64m 0U, // DIV_Fp64m32 0U, // DIV_Fp80 0U, // DIV_Fp80m32 0U, // DIV_Fp80m64 0U, // DIV_FpI16m32 0U, // DIV_FpI16m64 0U, // DIV_FpI16m80 0U, // DIV_FpI32m32 0U, // DIV_FpI32m64 0U, // DIV_FpI32m80 27052U, // DIV_FrST0 568707601U, // DPPDrmi 570821137U, // DPPDrri 568713197U, // DPPSrmi 570826733U, // DPPSrri 28087U, // EH_RETURN 28087U, // EH_RETURN64 12402U, // EH_SjLj_LongJmp32 12506U, // EH_SjLj_LongJmp64 12421U, // EH_SjLj_SetJmp32 12525U, // EH_SjLj_SetJmp64 447810U, // EH_SjLj_Setup 13762U, // ENCLS 13895U, // ENCLU 283139064U, // ENTER 3271893103U, // EXTRACTPSmr 811950191U, // EXTRACTPSrr 6347236U, // EXTRQ 52828644U, // EXTRQI 12383U, // F2XM1 54797804U, // FARCALL16i 667708U, // FARCALL16m 54792618U, // FARCALL32i 667661U, // FARCALL32m 667678U, // FARCALL64 54797940U, // FARJMP16i 667717U, // FARJMP16m 54792745U, // FARJMP32i 667670U, // FARJMP32m 667700U, // FARJMP64 181858U, // FBLDm 185621U, // FBSTPm 187547U, // FCOM32m 201192U, // FCOM64m 188345U, // FCOMP32m 201264U, // FCOMP64m 13334U, // FCOMPP 13349U, // FDECSTP 13768U, // FEMMS 20077U, // FFREE 220322U, // FICOM16m 233967U, // FICOM32m 221121U, // FICOMP16m 234040U, // FICOMP32m 13357U, // FINCSTP 222362U, // FLDCW16m 189362U, // FLDENVm 12876U, // FLDL2E 13830U, // FLDL2T 12487U, // FLDLG2 12494U, // FLDLN2 13034U, // FLDPI 14185U, // FNCLEX 13859U, // FNINIT 13329U, // FNOP 222387U, // FNSTCW16m 13984U, // FNSTSW16r 190415U, // FNSTSWm 0U, // FP32_TO_INT16_IN_MEM 0U, // FP32_TO_INT32_IN_MEM 0U, // FP32_TO_INT64_IN_MEM 0U, // FP64_TO_INT16_IN_MEM 0U, // FP64_TO_INT32_IN_MEM 0U, // FP64_TO_INT64_IN_MEM 0U, // FP80_TO_INT16_IN_MEM 0U, // FP80_TO_INT32_IN_MEM 0U, // FP80_TO_INT64_IN_MEM 13225U, // FPATAN 13202U, // FPREM 12376U, // FPREM1 13232U, // FPTAN 21691U, // FP_FFREEP 13870U, // FRNDINT 187407U, // FRSTORm 184014U, // FSAVEm 12904U, // FSCALE 13214U, // FSETPM 13779U, // FSINCOS 189370U, // FSTENVm 13197U, // FXAM 662551U, // FXRSTOR 655565U, // FXRSTOR64 659158U, // FXSAVE 655555U, // FXSAVE64 13837U, // FXTRACT 13978U, // FYL2X 12389U, // FYL2XP1 8522240U, // FsANDNPDrm 8440320U, // FsANDNPDrr 8527828U, // FsANDNPSrm 8445908U, // FsANDNPSrr 8522059U, // FsANDPDrm 8440139U, // FsANDPDrr 8527618U, // FsANDPSrm 8445698U, // FsANDPSrr 0U, // FsFLD0SD 0U, // FsFLD0SS 608392U, // FsMOVAPDrm 613959U, // FsMOVAPSrm 8522359U, // FsORPDrm 8440439U, // FsORPDrr 8527955U, // FsORPSrm 8446035U, // FsORPSrr 608391U, // FsVMOVAPDrm 613958U, // FsVMOVAPSrm 8522366U, // FsXORPDrm 8440446U, // FsXORPDrr 8527962U, // FsXORPSrm 8446042U, // FsXORPSrr 8522240U, // FvANDNPDrm 8440320U, // FvANDNPDrr 8527828U, // FvANDNPSrm 8445908U, // FvANDNPSrr 8522059U, // FvANDPDrm 8440139U, // FvANDPDrr 8527618U, // FvANDPSrm 8445698U, // FvANDPSrr 8522359U, // FvORPDrm 8440439U, // FvORPDrr 8527955U, // FvORPSrm 8446035U, // FvORPSrr 8522366U, // FvXORPDrm 8440446U, // FvXORPDrr 8527962U, // FvXORPSrm 8446042U, // FvXORPSrr 12797U, // GETSEC 8522018U, // HADDPDrm 8440098U, // HADDPDrr 8527577U, // HADDPSrm 8445657U, // HADDPSrr 13866U, // HLT 8521905U, // HSUBPDrm 8439985U, // HSUBPDrr 8527464U, // HSUBPSrm 8445544U, // HSUBPSrr 223422U, // IDIV16m 26814U, // IDIV16r 234475U, // IDIV32m 21483U, // IDIV32r 432968U, // IDIV64m 23368U, // IDIV64r 459980U, // IDIV8m 17612U, // IDIV8r 220281U, // ILD_F16m 233626U, // ILD_F32m 430474U, // ILD_F64m 0U, // ILD_Fp16m32 0U, // ILD_Fp16m64 0U, // ILD_Fp16m80 0U, // ILD_Fp32m32 0U, // ILD_Fp32m64 0U, // ILD_Fp32m80 0U, // ILD_Fp64m32 0U, // ILD_Fp64m64 0U, // ILD_Fp64m80 222755U, // IMUL16m 26147U, // IMUL16r 8463907U, // IMUL16rm 56993315U, // IMUL16rmi 56993315U, // IMUL16rmi8 8447523U, // IMUL16rr 811656739U, // IMUL16rri 811656739U, // IMUL16rri8 233945U, // IMUL32m 20953U, // IMUL32r 551637465U, // IMUL32rm 832934361U, // IMUL32rmi 832934361U, // IMUL32rmi8 8442329U, // IMUL32rr 811651545U, // IMUL32rri 811651545U, // IMUL32rri8 432314U, // IMUL64m 22714U, // IMUL64r 551655610U, // IMUL64rm 835033274U, // IMUL64rmi32 835033274U, // IMUL64rmi8 8444090U, // IMUL64rr 811653306U, // IMUL64rri32 811653306U, // IMUL64rri8 459576U, // IMUL8m 17208U, // IMUL8r 2123350U, // IN16ri 13995U, // IN16rr 10506750U, // IN32ri 14074U, // IN32rr 20988771U, // IN8ri 13064U, // IN8rr 222375U, // INC16m 25767U, // INC16r 25767U, // INC16r_alt 233561U, // INC32m 20569U, // INC32r 20569U, // INC32r_alt 431636U, // INC64m 22036U, // INC64r 459434U, // INC8m 17066U, // INC8r 535917U, // INSB 585490565U, // INSERTPSrm 570826885U, // INSERTPSrr 6347507U, // INSERTQ 59398899U, // INSERTQI 552312U, // INSL 585091U, // INSW 25344U, // INT 12397U, // INT1 12501U, // INT3 13270U, // INTO 12871U, // INVD 320261U, // INVEPT32 320261U, // INVEPT64 462570U, // INVLPG 14055U, // INVLPGA32 14123U, // INVLPGA64 312912U, // INVPCID32 312912U, // INVPCID64 312921U, // INVVPID32 312921U, // INVVPID64 13966U, // IRET16 13155U, // IRET32 13398U, // IRET64 221370U, // ISTT_FP16m 234091U, // ISTT_FP32m 430529U, // ISTT_FP64m 0U, // ISTT_Fp16m32 0U, // ISTT_Fp16m64 0U, // ISTT_Fp16m80 0U, // ISTT_Fp32m32 0U, // ISTT_Fp32m64 0U, // ISTT_Fp32m80 0U, // ISTT_Fp64m32 0U, // ISTT_Fp64m64 0U, // ISTT_Fp64m80 221915U, // IST_F16m 234446U, // IST_F32m 221362U, // IST_FP16m 234083U, // IST_FP32m 430520U, // IST_FP64m 0U, // IST_Fp16m32 0U, // IST_Fp16m64 0U, // IST_Fp16m80 0U, // IST_Fp32m32 0U, // IST_Fp32m64 0U, // IST_Fp32m80 0U, // IST_Fp64m32 0U, // IST_Fp64m64 0U, // IST_Fp64m80 1921496045U, // Int_CMPSDrm 1384641517U, // Int_CMPSDrr 2730996717U, // Int_CMPSSrm 1388835821U, // Int_CMPSSrr 609436U, // Int_COMISDrm 551816348U, // Int_COMISDrr 614995U, // Int_COMISSrm 551821907U, // Int_COMISSrr 551707028U, // Int_CVTSD2SSrm 8446356U, // Int_CVTSD2SSrr 551655216U, // Int_CVTSI2SD64rm 8443696U, // Int_CVTSI2SD64rr 551637170U, // Int_CVTSI2SDrm 8442034U, // Int_CVTSI2SDrr 551655993U, // Int_CVTSI2SS64rm 8444473U, // Int_CVTSI2SS64rr 551637818U, // Int_CVTSI2SSrm 8442682U, // Int_CVTSI2SSrr 551717845U, // Int_CVTSS2SDrm 8440789U, // Int_CVTSS2SDrr 552177564U, // Int_CVTTSD2SI64rm 551817116U, // Int_CVTTSD2SI64rr 552177564U, // Int_CVTTSD2SIrm 551817116U, // Int_CVTTSD2SIrr 552193971U, // Int_CVTTSS2SI64rm 551817139U, // Int_CVTTSS2SI64rr 552193971U, // Int_CVTTSS2SIrm 551817139U, // Int_CVTTSS2SIrr 12681U, // Int_MemBarrier 609435U, // Int_UCOMISDrm 551816347U, // Int_UCOMISDrr 614994U, // Int_UCOMISSrm 551821906U, // Int_UCOMISSrr 1921692657U, // Int_VCMPSDrm 1384838129U, // Int_VCMPSDrr 2731193329U, // Int_VCMPSSrm 1389032433U, // Int_VCMPSSrr 609444U, // Int_VCOMISDZrm 551816356U, // Int_VCOMISDZrr 609444U, // Int_VCOMISDrm 551816356U, // Int_VCOMISDrr 615003U, // Int_VCOMISSZrm 551821915U, // Int_VCOMISSZrr 615003U, // Int_VCOMISSrm 551821915U, // Int_VCOMISSrr 283271571U, // Int_VCVTSD2SSrm 811655571U, // Int_VCVTSD2SSrr 283219759U, // Int_VCVTSI2SD64Zrm 811652911U, // Int_VCVTSI2SD64Zrr 283219759U, // Int_VCVTSI2SD64rm 811652911U, // Int_VCVTSI2SD64rr 283201713U, // Int_VCVTSI2SDZrm 811651249U, // Int_VCVTSI2SDZrr 283201713U, // Int_VCVTSI2SDrm 811651249U, // Int_VCVTSI2SDrr 283220536U, // Int_VCVTSI2SS64Zrm 811653688U, // Int_VCVTSI2SS64Zrr 283220536U, // Int_VCVTSI2SS64rm 811653688U, // Int_VCVTSI2SS64rr 283202361U, // Int_VCVTSI2SSZrm 811651897U, // Int_VCVTSI2SSZrr 283202361U, // Int_VCVTSI2SSrm 811651897U, // Int_VCVTSI2SSrr 283282388U, // Int_VCVTSS2SDrm 811650004U, // Int_VCVTSS2SDrr 552177563U, // Int_VCVTTSD2SI64Zrm 551817115U, // Int_VCVTTSD2SI64Zrr 552177563U, // Int_VCVTTSD2SI64rm 551817115U, // Int_VCVTTSD2SI64rr 552177563U, // Int_VCVTTSD2SIZrm 551817115U, // Int_VCVTTSD2SIZrr 552177563U, // Int_VCVTTSD2SIrm 551817115U, // Int_VCVTTSD2SIrr 552177609U, // Int_VCVTTSD2USI64Zrm 551817161U, // Int_VCVTTSD2USI64Zrr 552177609U, // Int_VCVTTSD2USIZrm 551817161U, // Int_VCVTTSD2USIZrr 552193970U, // Int_VCVTTSS2SI64Zrm 551817138U, // Int_VCVTTSS2SI64Zrr 552193970U, // Int_VCVTTSS2SI64rm 551817138U, // Int_VCVTTSS2SI64rr 552193970U, // Int_VCVTTSS2SIZrm 551817138U, // Int_VCVTTSS2SIZrr 552193970U, // Int_VCVTTSS2SIrm 551817138U, // Int_VCVTTSS2SIrr 552194018U, // Int_VCVTTSS2USI64Zrm 551817186U, // Int_VCVTTSS2USI64Zrr 552194018U, // Int_VCVTTSS2USIZrm 551817186U, // Int_VCVTTSS2USIZrr 283219771U, // Int_VCVTUSI2SD64Zrm 811652923U, // Int_VCVTUSI2SD64Zrr 283201725U, // Int_VCVTUSI2SDZrm 811651261U, // Int_VCVTUSI2SDZrr 283220548U, // Int_VCVTUSI2SS64Zrm 811653700U, // Int_VCVTUSI2SS64Zrr 283202373U, // Int_VCVTUSI2SSZrm 811651909U, // Int_VCVTUSI2SSZrr 609434U, // Int_VUCOMISDZrm 551816346U, // Int_VUCOMISDZrr 609434U, // Int_VUCOMISDrm 551816346U, // Int_VUCOMISDrr 614993U, // Int_VUCOMISSZrm 551821905U, // Int_VUCOMISSZrr 614993U, // Int_VUCOMISSrm 551821905U, // Int_VUCOMISSrr 446018U, // JAE_1 446018U, // JAE_2 446018U, // JAE_4 442932U, // JA_1 442932U, // JA_2 442932U, // JA_4 446030U, // JBE_1 446030U, // JBE_2 446030U, // JBE_4 443141U, // JB_1 443141U, // JB_2 443141U, // JB_4 452935U, // JCXZ 452928U, // JECXZ 446089U, // JE_1 446089U, // JE_2 446089U, // JE_4 446068U, // JGE_1 446068U, // JGE_2 446068U, // JGE_4 446182U, // JG_1 446182U, // JG_2 446182U, // JG_4 446093U, // JLE_1 446093U, // JLE_2 446093U, // JLE_4 446833U, // JL_1 446833U, // JL_2 446833U, // JL_4 225350U, // JMP16m 28742U, // JMP16r 241687U, // JMP32m 28695U, // JMP32r 438317U, // JMP64m 28717U, // JMP64r 447700U, // JMP_1 447700U, // JMP_2 447700U, // JMP_4 446105U, // JNE_1 446105U, // JNE_2 446105U, // JNE_4 447636U, // JNO_1 447636U, // JNO_2 447636U, // JNO_4 447720U, // JNP_1 447720U, // JNP_2 447720U, // JNP_4 449706U, // JNS_1 449706U, // JNS_2 449706U, // JNS_4 447632U, // JO_1 447632U, // JO_2 447632U, // JO_4 447683U, // JP_1 447683U, // JP_2 447683U, // JP_4 452941U, // JRCXZ 449672U, // JS_1 449672U, // JS_2 449672U, // JS_4 811647679U, // KANDBrr 811648487U, // KANDDrr 811647826U, // KANDNBrr 811648728U, // KANDNDrr 811653369U, // KANDNQrr 811656773U, // KANDNWrr 811652806U, // KANDQrr 811656419U, // KANDWrr 551814363U, // KMOVBkk 476379U, // KMOVBkm 551814363U, // KMOVBkr 23102683U, // KMOVBmk 551814363U, // KMOVBrk 551816625U, // KMOVDkk 551800241U, // KMOVDkm 551816625U, // KMOVDkr 12619185U, // KMOVDmk 551816625U, // KMOVDrk 551820134U, // KMOVQkk 551836518U, // KMOVQkm 551820134U, // KMOVQkr 18914150U, // KMOVQmk 551820134U, // KMOVQrk 551823557U, // KMOVWkk 420037U, // KMOVWkm 551823557U, // KMOVWkr 4237509U, // KMOVWmk 551823557U, // KMOVWrk 551814255U, // KNOTBrr 551816518U, // KNOTDrr 551820004U, // KNOTQrr 551823452U, // KNOTWrr 811647923U, // KORBrr 811649832U, // KORDrr 811653517U, // KORQrr 551814284U, // KORTESTBrr 551816547U, // KORTESTDrr 551820042U, // KORTESTQrr 551823481U, // KORTESTWrr 811656935U, // KORWrr 0U, // KSET0B 0U, // KSET0W 0U, // KSET1B 0U, // KSET1W 811942702U, // KSHIFTLBri 811943575U, // KSHIFTLDri 811948208U, // KSHIFTLQri 811951641U, // KSHIFTLWri 811942871U, // KSHIFTRBri 811944789U, // KSHIFTRDri 811948499U, // KSHIFTRQri 811951895U, // KSHIFTRWri 811656244U, // KUNPCKBWrr 811647929U, // KXNORBrr 811649838U, // KXNORDrr 811653523U, // KXNORQrr 811656941U, // KXNORWrr 811647943U, // KXORBrr 811649853U, // KXORDrr 811653544U, // KXORQrr 811656955U, // KXORWrr 13001U, // LAHF 419520U, // LAR16rm 551823040U, // LAR16rr 414355U, // LAR32rm 551817875U, // LAR32rr 416117U, // LAR64rm 551819637U, // LAR64rr 4236680U, // LCMPXCHG16 590449U, // LCMPXCHG16B 12620097U, // LCMPXCHG32 18913327U, // LCMPXCHG64 23102195U, // LCMPXCHG8 426621U, // LCMPXCHG8B 320391U, // LDDQUrm 236590U, // LDMXCSR 731008U, // LDS16rm 725770U, // LDS32rm 14192U, // LD_F0 12371U, // LD_F1 187507U, // LD_F32m 200845U, // LD_F64m 746225U, // LD_F80m 0U, // LD_Fp032 0U, // LD_Fp064 0U, // LD_Fp080 0U, // LD_Fp132 0U, // LD_Fp164 0U, // LD_Fp180 0U, // LD_Fp32m 0U, // LD_Fp32m64 0U, // LD_Fp32m80 0U, // LD_Fp64m 0U, // LD_Fp64m80 0U, // LD_Fp80m 18024U, // LD_Frr 762845U, // LEA16r 757778U, // LEA32r 757778U, // LEA64_32r 759193U, // LEA64r 12988U, // LEAVE 12988U, // LEAVE64 731021U, // LES16rm 725783U, // LES32rm 12883U, // LFENCE 731027U, // LFS16rm 725789U, // LFS32rm 727571U, // LFS64rm 665608U, // LGDT16m 660338U, // LGDT32m 662157U, // LGDT64m 731033U, // LGS16rm 725795U, // LGS32rm 727577U, // LGS64rm 665622U, // LIDT16m 660352U, // LIDT32m 662171U, // LIDT64m 223268U, // LLDT16m 26660U, // LLDT16r 223446U, // LMSW16m 26838U, // LMSW16r 4236478U, // LOCK_ADD16mi 4236478U, // LOCK_ADD16mi8 4236478U, // LOCK_ADD16mr 12619887U, // LOCK_ADD32mi 12619887U, // LOCK_ADD32mi8 12619887U, // LOCK_ADD32mr 18912876U, // LOCK_ADD64mi32 18912876U, // LOCK_ADD64mi8 18912876U, // LOCK_ADD64mr 23102130U, // LOCK_ADD8mi 23102130U, // LOCK_ADD8mr 4236516U, // LOCK_AND16mi 4236516U, // LOCK_AND16mi8 4236516U, // LOCK_AND16mr 12619940U, // LOCK_AND32mi 12619940U, // LOCK_AND32mi8 12619940U, // LOCK_AND32mr 18912967U, // LOCK_AND64mi32 18912967U, // LOCK_AND64mi8 18912967U, // LOCK_AND64mr 23102144U, // LOCK_AND8mi 23102144U, // LOCK_AND8mr 222369U, // LOCK_DEC16m 233555U, // LOCK_DEC32m 431630U, // LOCK_DEC64m 459428U, // LOCK_DEC8m 222375U, // LOCK_INC16m 233561U, // LOCK_INC32m 431636U, // LOCK_INC64m 459434U, // LOCK_INC8m 4237032U, // LOCK_OR16mi 4237032U, // LOCK_OR16mi8 4237032U, // LOCK_OR16mr 12620477U, // LOCK_OR32mi 12620477U, // LOCK_OR32mi8 12620477U, // LOCK_OR32mr 18913678U, // LOCK_OR64mi32 18913678U, // LOCK_OR64mi8 18913678U, // LOCK_OR64mr 23102388U, // LOCK_OR8mi 23102388U, // LOCK_OR8mr 13059U, // LOCK_PREFIX 4236384U, // LOCK_SUB16mi 4236384U, // LOCK_SUB16mi8 4236384U, // LOCK_SUB16mr 12619823U, // LOCK_SUB32mi 12619823U, // LOCK_SUB32mi8 12619823U, // LOCK_SUB32mr 18912732U, // LOCK_SUB64mi32 18912732U, // LOCK_SUB64mi8 18912732U, // LOCK_SUB64mr 23102104U, // LOCK_SUB8mi 23102104U, // LOCK_SUB8mr 4237052U, // LOCK_XOR16mi 4237052U, // LOCK_XOR16mi8 4237052U, // LOCK_XOR16mr 12620482U, // LOCK_XOR32mi 12620482U, // LOCK_XOR32mi8 12620482U, // LOCK_XOR32mr 18913705U, // LOCK_XOR64mi32 18913705U, // LOCK_XOR64mi8 18913705U, // LOCK_XOR64mr 23102408U, // LOCK_XOR8mi 23102408U, // LOCK_XOR8mr 21742612U, // LODSB 11277072U, // LODSL 809484U, // LODSQ 2926470U, // LODSW 447737U, // LOOP 446134U, // LOOPE 446110U, // LOOPNE 21397U, // LRETIL 23216U, // LRETIQ 26674U, // LRETIW 13161U, // LRETL 13404U, // LRETQ 13972U, // LRETW 419347U, // LSL16rm 551822867U, // LSL16rr 551801291U, // LSL32rm 551817675U, // LSL32rr 551835810U, // LSL64rm 551819426U, // LSL64rr 731075U, // LSS16rm 725842U, // LSS32rm 727646U, // LSS64rm 223009U, // LTRm 26401U, // LTRr 3504612556U, // LXADD16 3773042813U, // LXADD32 4041479794U, // LXADD64 14942904U, // LXADD8 419916U, // LZCNT16rm 551823436U, // LZCNT16rr 551801771U, // LZCNT32rm 551818155U, // LZCNT32rr 551836364U, // LZCNT64rm 551819980U, // LZCNT64rr 551822223U, // MASKMOVDQU 551822223U, // MASKMOVDQU64 8522455U, // MAXCPDrm 8440535U, // MAXCPDrr 8528108U, // MAXCPSrm 8446188U, // MAXCPSrr 551701773U, // MAXCSDrm 8441101U, // MAXCSDrr 551723711U, // MAXCSSrm 8446655U, // MAXCSSrr 8522455U, // MAXPDrm 8440535U, // MAXPDrr 8528108U, // MAXPSrm 8446188U, // MAXPSrr 551701773U, // MAXSDrm 551701773U, // MAXSDrm_Int 8441101U, // MAXSDrr 8441101U, // MAXSDrr_Int 551723711U, // MAXSSrm 551723711U, // MAXSSrm_Int 8446655U, // MAXSSrr 8446655U, // MAXSSrr_Int 12890U, // MFENCE 8522249U, // MINCPDrm 8440329U, // MINCPDrr 8527837U, // MINCPSrm 8445917U, // MINCPSrr 551701687U, // MINCSDrm 8441015U, // MINCSDrr 551723629U, // MINCSSrm 8446573U, // MINCSSrr 8522249U, // MINPDrm 8440329U, // MINPDrr 8527837U, // MINPSrm 8445917U, // MINPSrr 551701687U, // MINSDrm 551701687U, // MINSDrm_Int 8441015U, // MINSDrr 8441015U, // MINSDrr_Int 551723629U, // MINSSrm 551723629U, // MINSSrm_Int 8446573U, // MINSSrr 8446573U, // MINSSrr_Int 610131U, // MMX_CVTPD2PIirm 551817043U, // MMX_CVTPD2PIirr 551831481U, // MMX_CVTPI2PDirm 551815097U, // MMX_CVTPI2PDirr 551656835U, // MMX_CVTPI2PSirm 8445315U, // MMX_CVTPI2PSirr 552177512U, // MMX_CVTPS2PIirm 551817064U, // MMX_CVTPS2PIirr 610120U, // MMX_CVTTPD2PIirm 551817032U, // MMX_CVTTPD2PIirr 552177501U, // MMX_CVTTPS2PIirm 551817053U, // MMX_CVTTPS2PIirr 13769U, // MMX_EMMS 551820131U, // MMX_MASKMOVQ 551820131U, // MMX_MASKMOVQ64 18910642U, // MMX_MOVD64from64rm 551816626U, // MMX_MOVD64from64rr 551816626U, // MMX_MOVD64grr 12619186U, // MMX_MOVD64mr 551800242U, // MMX_MOVD64rm 551816626U, // MMX_MOVD64rr 551833010U, // MMX_MOVD64to64rm 551816626U, // MMX_MOVD64to64rr 551818630U, // MMX_MOVDQ2Qrr 551818630U, // MMX_MOVFR642Qrr 18914012U, // MMX_MOVNTQmr 551818807U, // MMX_MOVQ2DQrr 551818807U, // MMX_MOVQ2FR64rr 18914151U, // MMX_MOVQ64mr 551836519U, // MMX_MOVQ64rm 551820135U, // MMX_MOVQ64rr 551820135U, // MMX_MOVQ64rr_REV 551830514U, // MMX_PABSBrm64 551814130U, // MMX_PABSBrr64 551832642U, // MMX_PABSDrm64 551816258U, // MMX_PABSDrr64 551839550U, // MMX_PABSWrm64 551823166U, // MMX_PABSWrr64 551658757U, // MMX_PACKSSDWirm 8447237U, // MMX_PACKSSDWirr 551650537U, // MMX_PACKSSWBirm 8439017U, // MMX_PACKSSWBirr 551650548U, // MMX_PACKUSWBirm 8439028U, // MMX_PACKUSWBirr 551649969U, // MMX_PADDBirm 8438449U, // MMX_PADDBirr 551650784U, // MMX_PADDDirm 8439264U, // MMX_PADDDirr 551655019U, // MMX_PADDQirm 8443499U, // MMX_PADDQirr 551650316U, // MMX_PADDSBirm 8438796U, // MMX_PADDSBirr 551659384U, // MMX_PADDSWirm 8447864U, // MMX_PADDSWirr 551650365U, // MMX_PADDUSBirm 8438845U, // MMX_PADDUSBirr 551659497U, // MMX_PADDUSWirm 8447977U, // MMX_PADDUSWirr 551658693U, // MMX_PADDWirm 8447173U, // MMX_PADDWirr 866507776U, // MMX_PALIGNR64irm 570825728U, // MMX_PALIGNR64irr 551654515U, // MMX_PANDNirm 8442995U, // MMX_PANDNirr 551651026U, // MMX_PANDirm 8439506U, // MMX_PANDirr 551650046U, // MMX_PAVGBirm 8438526U, // MMX_PAVGBirr 551658899U, // MMX_PAVGWirm 8447379U, // MMX_PAVGWirr 551650170U, // MMX_PCMPEQBirm 8438650U, // MMX_PCMPEQBirr 551652072U, // MMX_PCMPEQDirm 8440552U, // MMX_PCMPEQDirr 551659161U, // MMX_PCMPEQWirm 8447641U, // MMX_PCMPEQWirr 551650406U, // MMX_PCMPGTBirm 8438886U, // MMX_PCMPGTBirr 551652659U, // MMX_PCMPGTDirm 8441139U, // MMX_PCMPGTDirr 551659578U, // MMX_PCMPGTWirm 8448058U, // MMX_PCMPGTWirr 811951918U, // MMX_PEXTRWirri 551659374U, // MMX_PHADDSWrm64 8447854U, // MMX_PHADDSWrr64 551658684U, // MMX_PHADDWrm64 8447164U, // MMX_PHADDWrr64 551650775U, // MMX_PHADDrm64 8439255U, // MMX_PHADDrr64 551650729U, // MMX_PHSUBDrm64 8439209U, // MMX_PHSUBDrr64 551659355U, // MMX_PHSUBSWrm64 8447835U, // MMX_PHSUBSWrr64 551658590U, // MMX_PHSUBWrm64 8447070U, // MMX_PHSUBWrr64 600172297U, // MMX_PINSRWirmi 570828553U, // MMX_PINSRWirri 551659343U, // MMX_PMADDUBSWrm64 8447823U, // MMX_PMADDUBSWrr64 551652820U, // MMX_PMADDWDirm 8441300U, // MMX_PMADDWDirr 551659515U, // MMX_PMAXSWirm 8447995U, // MMX_PMAXSWirr 551650489U, // MMX_PMAXUBirm 8438969U, // MMX_PMAXUBirr 551659424U, // MMX_PMINSWirm 8447904U, // MMX_PMINSWirr 551650464U, // MMX_PMINUBirm 8438944U, // MMX_PMINUBirr 551813898U, // MMX_PMOVMSKBrr 551659449U, // MMX_PMULHRSWrm64 8447929U, // MMX_PMULHRSWrr64 551659652U, // MMX_PMULHUWirm 8448132U, // MMX_PMULHUWirr 551658936U, // MMX_PMULHWirm 8447416U, // MMX_PMULHWirr 551659005U, // MMX_PMULLWirm 8447485U, // MMX_PMULLWirr 551655312U, // MMX_PMULUDQirm 8443792U, // MMX_PMULUDQirr 551656458U, // MMX_PORirm 8444938U, // MMX_PORirr 551658509U, // MMX_PSADBWirm 8446989U, // MMX_PSADBWirr 551650021U, // MMX_PSHUFBrm64 8438501U, // MMX_PSHUFBrr64 835003770U, // MMX_PSHUFWmi 811951482U, // MMX_PSHUFWri 551650139U, // MMX_PSIGNBrm64 8438619U, // MMX_PSIGNBrr64 551651059U, // MMX_PSIGNDrm64 8439539U, // MMX_PSIGNDrr64 551659086U, // MMX_PSIGNWrm64 8447566U, // MMX_PSIGNWrr64 8734326U, // MMX_PSLLDri 551650934U, // MMX_PSLLDrm 8439414U, // MMX_PSLLDrr 8738948U, // MMX_PSLLQri 551655556U, // MMX_PSLLQrm 8444036U, // MMX_PSLLQrr 8742389U, // MMX_PSLLWri 551658997U, // MMX_PSLLWrm 8447477U, // MMX_PSLLWrr 8734092U, // MMX_PSRADri 551650700U, // MMX_PSRADrm 8439180U, // MMX_PSRADrr 8741868U, // MMX_PSRAWri 551658476U, // MMX_PSRAWrm 8446956U, // MMX_PSRAWrr 8734343U, // MMX_PSRLDri 551650951U, // MMX_PSRLDrm 8439431U, // MMX_PSRLDrr 8738971U, // MMX_PSRLQri 551655579U, // MMX_PSRLQrm 8444059U, // MMX_PSRLQrr 8742412U, // MMX_PSRLWri 551659020U, // MMX_PSRLWrm 8447500U, // MMX_PSRLWrr 551649943U, // MMX_PSUBBirm 8438423U, // MMX_PSUBBirr 551650738U, // MMX_PSUBDirm 8439218U, // MMX_PSUBDirr 551654875U, // MMX_PSUBQirm 8443355U, // MMX_PSUBQirr 551650307U, // MMX_PSUBSBirm 8438787U, // MMX_PSUBSBirr 551659365U, // MMX_PSUBSWirm 8447845U, // MMX_PSUBSWirr 551650355U, // MMX_PSUBUSBirm 8438835U, // MMX_PSUBUSBirr 551659487U, // MMX_PSUBUSWirm 8447967U, // MMX_PSUBUSWirr 551658599U, // MMX_PSUBWirm 8447079U, // MMX_PSUBWirr 551658537U, // MMX_PUNPCKHBWirm 8447017U, // MMX_PUNPCKHBWirr 551655053U, // MMX_PUNPCKHDQirm 8443533U, // MMX_PUNPCKHDQirr 551652830U, // MMX_PUNPCKHWDirm 8441310U, // MMX_PUNPCKHWDirr 551658559U, // MMX_PUNPCKLBWirm 8447039U, // MMX_PUNPCKLBWirr 551655072U, // MMX_PUNPCKLDQirm 8443552U, // MMX_PUNPCKLDQirr 551652842U, // MMX_PUNPCKLWDirm 8441322U, // MMX_PUNPCKLWDirr 551656481U, // MMX_PXORirm 8444961U, // MMX_PXORirr 0U, // MONITOR 13452U, // MONITORrrr 13189U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 2943174U, // MOV16ao16 2943174U, // MOV16ao32 2942789U, // MOV16ao64 4237510U, // MOV16mi 4237510U, // MOV16mr 4237510U, // MOV16ms 847110U, // MOV16o16a 847110U, // MOV16o32a 847073U, // MOV16o64a 551823558U, // MOV16ri 551823558U, // MOV16ri_alt 420038U, // MOV16rm 551823558U, // MOV16rr 551823558U, // MOV16rr_REV 551823558U, // MOV16rs 420038U, // MOV16sm 551823558U, // MOV16sr 11342834U, // MOV32ao16 11342834U, // MOV32ao32 11342593U, // MOV32ao64 551818226U, // MOV32cr 551818226U, // MOV32dr 12620786U, // MOV32mi 12620786U, // MOV32mr 4232178U, // MOV32ms 863545U, // MOV32o16a 863545U, // MOV32o32a 863505U, // MOV32o64a 0U, // MOV32r0 551818226U, // MOV32rc 551818226U, // MOV32rd 551818226U, // MOV32ri 0U, // MOV32ri64 551818226U, // MOV32ri_alt 551801842U, // MOV32rm 551818226U, // MOV32rr 551818226U, // MOV32rr_REV 551818226U, // MOV32rs 414706U, // MOV32sm 551818226U, // MOV32sr 17652583U, // MOV64ao32 17652227U, // MOV64ao64 551820135U, // MOV64cr 551820135U, // MOV64dr 18914151U, // MOV64mi32 18914151U, // MOV64mr 4234087U, // MOV64ms 879969U, // MOV64o32a 879941U, // MOV64o64a 551820135U, // MOV64rc 551820135U, // MOV64rd 551819779U, // MOV64ri 551820135U, // MOV64ri32 551836519U, // MOV64rm 551820135U, // MOV64rr 551820135U, // MOV64rr_REV 551820135U, // MOV64rs 416615U, // MOV64sm 551820135U, // MOV64sr 551833010U, // MOV64toPQIrm 551816626U, // MOV64toPQIrr 551836519U, // MOV64toSDrm 551816626U, // MOV64toSDrr 21857493U, // MOV8ao16 21857493U, // MOV8ao32 21857273U, // MOV8ao64 23102677U, // MOV8mi 23102677U, // MOV8mr 23102677U, // MOV8mr_NOREX 895790U, // MOV8o16a 895790U, // MOV8o32a 895753U, // MOV8o64a 551814357U, // MOV8ri 551814357U, // MOV8ri_alt 476373U, // MOV8rm 476373U, // MOV8rm_NOREX 551814357U, // MOV8rr 551814357U, // MOV8rr_NOREX 551814357U, // MOV8rr_REV 65046664U, // MOVAPDmr 608392U, // MOVAPDrm 551815304U, // MOVAPDrr 551815304U, // MOVAPDrr_REV 65052231U, // MOVAPSmr 613959U, // MOVAPSrm 551820871U, // MOVAPSrr 551820871U, // MOVAPSrr_REV 4236610U, // MOVBE16mr 419138U, // MOVBE16rm 12619988U, // MOVBE32mr 551801044U, // MOVBE32rm 18913209U, // MOVBE64mr 551835577U, // MOVBE64rm 552178979U, // MOVDDUPrm 551818531U, // MOVDDUPrr 551800242U, // MOVDI2PDIrm 551816626U, // MOVDI2PDIrr 551800242U, // MOVDI2SSrm 551816626U, // MOVDI2SSrr 67142212U, // MOVDQAmr 311876U, // MOVDQArm 551813700U, // MOVDQArr 551813700U, // MOVDQArr_REV 67150739U, // MOVDQUmr 320403U, // MOVDQUrm 551822227U, // MOVDQUrr 551822227U, // MOVDQUrr_REV 8445822U, // MOVHLPSrr 69241257U, // MOVHPDmr 551700905U, // MOVHPDrm 69246826U, // MOVHPSmr 551706474U, // MOVHPSrm 8445792U, // MOVLHPSrr 69241307U, // MOVLPDmr 551700955U, // MOVLPDrm 69246886U, // MOVLPSmr 551706534U, // MOVLPSrm 551815602U, // MOVMSKPDrr 551821171U, // MOVMSKPSrr 311865U, // MOVNTDQArm 65050441U, // MOVNTDQmr 18913366U, // MOVNTI_64mr 12620136U, // MOVNTImr 65047187U, // MOVNTPDmr 65052795U, // MOVNTPSmr 69242075U, // MOVNTSD 71344772U, // MOVNTSS 0U, // MOVPC32r 12619186U, // MOVPDI2DImr 551816626U, // MOVPDI2DIrr 18914151U, // MOVPQI2QImr 551820135U, // MOVPQI2QIrr 18910642U, // MOVPQIto64rm 551816626U, // MOVPQIto64rr 551836519U, // MOVQI2PQIrm 902223U, // MOVSB 69242116U, // MOVSDmr 552176900U, // MOVSDrm 8441092U, // MOVSDrr 8441092U, // MOVSDrr_REV 18914151U, // MOVSDto64mr 551816626U, // MOVSDto64rr 611629U, // MOVSHDUPrm 551818541U, // MOVSHDUPrr 922470U, // MOVSL 611640U, // MOVSLDUPrm 551818552U, // MOVSLDUPrr 940651U, // MOVSQ 12619186U, // MOVSS2DImr 551816626U, // MOVSS2DIrr 71344823U, // MOVSSmr 552198839U, // MOVSSrm 8446647U, // MOVSSrr 8446647U, // MOVSSrr_REV 960499U, // MOVSW 484426U, // MOVSX16rm8 551822410U, // MOVSX16rr8 479270U, // MOVSX32_NOREXrm8 551817254U, // MOVSX32_NOREXrr8 414719U, // MOVSX32rm16 479270U, // MOVSX32rm8 551818239U, // MOVSX32rr16 551817254U, // MOVSX32rr8 551819432U, // MOVSX64_NOREXrr32 416645U, // MOVSX64rm16 551803048U, // MOVSX64rm32 551803048U, // MOVSX64rm32_alt 480711U, // MOVSX64rm8 551820165U, // MOVSX64rr16 551819432U, // MOVSX64rr32 551818695U, // MOVSX64rr8 65047215U, // MOVUPDmr 608943U, // MOVUPDrm 551815855U, // MOVUPDrr 551815855U, // MOVUPDrr_REV 65052868U, // MOVUPSmr 614596U, // MOVUPSrm 551821508U, // MOVUPSrr 551821508U, // MOVUPSrr_REV 318311U, // MOVZPQILo2PQIrm 551820135U, // MOVZPQILo2PQIrr 551836519U, // MOVZQI2PQIrm 551816626U, // MOVZQI2PQIrr 484492U, // MOVZX16rm8 551822476U, // MOVZX16rr8 479301U, // MOVZX32_NOREXrm8 551817285U, // MOVZX32_NOREXrr8 414727U, // MOVZX32rm16 479301U, // MOVZX32rm8 551818247U, // MOVZX32rr16 551817285U, // MOVZX32rr8 416686U, // MOVZX64rm16_Q 480768U, // MOVZX64rm8_Q 551820206U, // MOVZX64rr16_Q 551818752U, // MOVZX64rr8_Q 610657292U, // MPSADBWrmi 570827788U, // MPSADBWrri 222756U, // MUL16m 26148U, // MUL16r 233938U, // MUL32m 20946U, // MUL32r 432315U, // MUL64m 22715U, // MUL64r 459577U, // MUL8m 17209U, // MUL8r 8522195U, // MULPDrm 8440275U, // MULPDrr 8527774U, // MULPSrm 8445854U, // MULPSrr 551701678U, // MULSDrm 551701678U, // MULSDrm_Int 8441006U, // MULSDrr 8441006U, // MULSDrr_Int 551723621U, // MULSSrm 551723621U, // MULSSrm_Int 8446565U, // MULSSrr 8446565U, // MULSSrr_Int 283202589U, // MULX32rm 811652125U, // MULX32rr 283220932U, // MULX64rm 811654084U, // MULX64rr 187532U, // MUL_F32m 201169U, // MUL_F64m 220307U, // MUL_FI16m 233944U, // MUL_FI32m 21703U, // MUL_FPrST0 21469U, // MUL_FST0r 0U, // MUL_Fp32 0U, // MUL_Fp32m 0U, // MUL_Fp64 0U, // MUL_Fp64m 0U, // MUL_Fp64m32 0U, // MUL_Fp80 0U, // MUL_Fp80m32 0U, // MUL_Fp80m64 0U, // MUL_FpI16m32 0U, // MUL_FpI16m64 0U, // MUL_FpI16m80 0U, // MUL_FpI32m32 0U, // MUL_FpI32m64 0U, // MUL_FpI32m80 27009U, // MUL_FrST0 13845U, // MWAITrr 222594U, // NEG16m 25986U, // NEG16r 233787U, // NEG32m 20795U, // NEG32r 432169U, // NEG64m 22569U, // NEG64r 459501U, // NEG8m 17133U, // NEG8r 13311U, // NOOP 222852U, // NOOP18_16m4 222852U, // NOOP18_16m5 222852U, // NOOP18_16m6 222852U, // NOOP18_16m7 26244U, // NOOP18_16r4 26244U, // NOOP18_16r5 26244U, // NOOP18_16r6 26244U, // NOOP18_16r7 234058U, // NOOP18_m4 234058U, // NOOP18_m5 234058U, // NOOP18_m6 234058U, // NOOP18_m7 21066U, // NOOP18_r4 21066U, // NOOP18_r5 21066U, // NOOP18_r6 21066U, // NOOP18_r7 283137268U, // NOOP19rr 234058U, // NOOPL 234058U, // NOOPL_19 234058U, // NOOPL_1a 234058U, // NOOPL_1b 234058U, // NOOPL_1c 234058U, // NOOPL_1d 234058U, // NOOPL_1e 222852U, // NOOPW 222852U, // NOOPW_19 222852U, // NOOPW_1a 222852U, // NOOPW_1b 222852U, // NOOPW_1c 222852U, // NOOPW_1d 222852U, // NOOPW_1e 223325U, // NOT16m 26717U, // NOT16r 234427U, // NOT32m 21435U, // NOT32r 432869U, // NOT64m 23269U, // NOT64r 459888U, // NOT8m 17520U, // NOT8r 2123496U, // OR16i16 4237032U, // OR16mi 4237032U, // OR16mi8 4237032U, // OR16mr 6350568U, // OR16ri 6350568U, // OR16ri8 6366952U, // OR16rm 6350568U, // OR16rr 8447720U, // OR16rr_REV 10506941U, // OR32i32 12620477U, // OR32mi 12620477U, // OR32mi8 12620477U, // OR32mr 12620477U, // OR32mrLocked 6345405U, // OR32ri 6345405U, // OR32ri8 283202237U, // OR32rm 6345405U, // OR32rr 8442557U, // OR32rr_REV 16800142U, // OR64i32 18913678U, // OR64mi32 18913678U, // OR64mi8 18913678U, // OR64mr 6347150U, // OR64ri32 6347150U, // OR64ri8 283220366U, // OR64rm 6347150U, // OR64rr 8444302U, // OR64rr_REV 20988852U, // OR8i8 23102388U, // OR8mi 23102388U, // OR8mi8 23102388U, // OR8mr 6341556U, // OR8ri 6341556U, // OR8ri8 115636U, // OR8rm 6341556U, // OR8rr 8438708U, // OR8rr_REV 8522359U, // ORPDrm 8440439U, // ORPDrr 8527955U, // ORPSrm 8446035U, // ORPSrr 27899U, // OUT16ir 14156U, // OUT16rr 27949U, // OUT32ir 14170U, // OUT32rr 27427U, // OUT8ir 14142U, // OUT8rr 76268587U, // OUTSB 76288862U, // OUTSL 76326871U, // OUTSW 312306U, // PABSBrm128 551814130U, // PABSBrr128 314434U, // PABSDrm128 551816258U, // PABSDrr128 321342U, // PABSWrm128 551823166U, // PABSWrr128 8692997U, // PACKSSDWrm 8447237U, // PACKSSDWrr 8684777U, // PACKSSWBrm 8439017U, // PACKSSWBrr 8693008U, // PACKUSDWrm 8447248U, // PACKUSDWrr 8684788U, // PACKUSWBrm 8439028U, // PACKUSWBrr 8684209U, // PADDBrm 8438449U, // PADDBrr 8685024U, // PADDDrm 8439264U, // PADDDrr 8689259U, // PADDQrm 8443499U, // PADDQrr 8684556U, // PADDSBrm 8438796U, // PADDSBrr 8693624U, // PADDSWrm 8447864U, // PADDSWrr 8684605U, // PADDUSBrm 8438845U, // PADDUSBrr 8693737U, // PADDUSWrm 8447977U, // PADDUSWrr 8692933U, // PADDWrm 8447173U, // PADDWrr 610655232U, // PALIGNR128rm 570825728U, // PALIGNR128rr 8688755U, // PANDNrm 8442995U, // PANDNrr 8685266U, // PANDrm 8439506U, // PANDrr 12951U, // PAUSE 8684286U, // PAVGBrm 8438526U, // PAVGBrr 551650374U, // PAVGUSBrm 8438854U, // PAVGUSBrr 8693139U, // PAVGWrm 8447379U, // PAVGWrr 8684738U, // PBLENDVBrm0 8438978U, // PBLENDVBrr0 610657524U, // PBLENDWrmi 570828020U, // PBLENDWrri 610653956U, // PCLMULQDQrm 570824452U, // PCLMULQDQrr 8684410U, // PCMPEQBrm 8438650U, // PCMPEQBrr 8686312U, // PCMPEQDrm 8440552U, // PCMPEQDrr 8690003U, // PCMPEQQrm 8444243U, // PCMPEQQrr 8693401U, // PCMPEQWrm 8447641U, // PCMPEQWrr 0U, // PCMPESTRIMEM 0U, // PCMPESTRIREG 25497476U, // PCMPESTRIrm 811945860U, // PCMPESTRIrr 0U, // PCMPESTRM128MEM 0U, // PCMPESTRM128REG 25498715U, // PCMPESTRM128rm 811947099U, // PCMPESTRM128rr 8684646U, // PCMPGTBrm 8438886U, // PCMPGTBrr 8686899U, // PCMPGTDrm 8441139U, // PCMPGTDrr 8690360U, // PCMPGTQrm 8444600U, // PCMPGTQrr 8693818U, // PCMPGTWrm 8448058U, // PCMPGTWrr 0U, // PCMPISTRIMEM 0U, // PCMPISTRIREG 25497488U, // PCMPISTRIrm 811945872U, // PCMPISTRIrr 0U, // PCMPISTRM128MEM 0U, // PCMPISTRM128REG 25498727U, // PCMPISTRM128rm 811947111U, // PCMPISTRM128rr 13851U, // PCOMMIT 283202076U, // PDEP32rm 811651612U, // PDEP32rr 283220268U, // PDEP64rm 811653420U, // PDEP64rr 283202517U, // PEXT32rm 811652053U, // PEXT32rr 283220756U, // PEXT64rm 811653908U, // PEXT64rr 319095778U, // PEXTRBmr 811942882U, // PEXTRBrr 587533152U, // PEXTRDmr 811944800U, // PEXTRDrr 855972332U, // PEXTRQmr 811948524U, // PEXTRQrr 1124411182U, // PEXTRWmr 811951918U, // PEXTRWri 811951918U, // PEXTRWrr_REV 551831113U, // PF2IDrm 551814729U, // PF2IDrr 551839175U, // PF2IWrm 551822791U, // PF2IWrr 551650558U, // PFACCrm 8439038U, // PFACCrr 551650767U, // PFADDrm 8439247U, // PFADDrr 551655388U, // PFCMPEQrm 8443868U, // PFCMPEQrr 551652985U, // PFCMPGErm 8441465U, // PFCMPGErr 551658231U, // PFCMPGTrm 8446711U, // PFCMPGTrr 551659759U, // PFMAXrm 8448239U, // PFMAXrr 551654530U, // PFMINrm 8443010U, // PFMINrr 551654364U, // PFMULrm 8442844U, // PFMULrr 551650565U, // PFNACCrm 8439045U, // PFNACCrr 551650573U, // PFPNACCrm 8439053U, // PFPNACCrr 551649327U, // PFRCPIT1rm 8437807U, // PFRCPIT1rr 551649416U, // PFRCPIT2rm 8437896U, // PFRCPIT2rr 551834797U, // PFRCPrm 551818413U, // PFRCPrr 551649337U, // PFRSQIT1rm 8437817U, // PFRSQIT1rr 551838514U, // PFRSQRTrm 551822130U, // PFRSQRTrr 551656432U, // PFSUBRrm 8444912U, // PFSUBRrr 551650481U, // PFSUBrm 8438961U, // PFSUBrr 8685015U, // PHADDDrm 8439255U, // PHADDDrr 8693614U, // PHADDSWrm128 8447854U, // PHADDSWrr128 8692924U, // PHADDWrm 8447164U, // PHADDWrr 321705U, // PHMINPOSUWrm128 551823529U, // PHMINPOSUWrr128 8684969U, // PHSUBDrm 8439209U, // PHSUBDrr 8693595U, // PHSUBSWrm128 8447835U, // PHSUBSWrr128 8692830U, // PHSUBWrm 8447070U, // PHSUBWrr 551831097U, // PI2FDrm 551814713U, // PI2FDrr 551839085U, // PI2FWrm 551822701U, // PI2FWrr 614843343U, // PINSRBrm 570819535U, // PINSRBrr 885377869U, // PINSRDrm 570821453U, // PINSRDrr 866507205U, // PINSRQrm 570825157U, // PINSRQrr 600172297U, // PINSRWrmi 570828553U, // PINSRWrri 8693583U, // PMADDUBSWrm128 8447823U, // PMADDUBSWrr128 8687060U, // PMADDWDrm 8441300U, // PMADDWDrr 8684631U, // PMAXSBrm 8438871U, // PMAXSBrr 8686860U, // PMAXSDrm 8441100U, // PMAXSDrr 8693755U, // PMAXSWrm 8447995U, // PMAXSWrr 8684729U, // PMAXUBrm 8438969U, // PMAXUBrr 8686985U, // PMAXUDrm 8441225U, // PMAXUDrr 8693942U, // PMAXUWrm 8448182U, // PMAXUWrr 8684572U, // PMINSBrm 8438812U, // PMINSBrr 8686774U, // PMINSDrm 8441014U, // PMINSDrr 8693664U, // PMINSWrm 8447904U, // PMINSWrr 8684704U, // PMINUBrm 8438944U, // PMINUBrr 8686967U, // PMINUDrm 8441207U, // PMINUDrr 8693911U, // PMINUWrm 8448151U, // PMINUWrr 551813898U, // PMOVMSKBrr 551798202U, // PMOVSXBDrm 551814586U, // PMOVSXBDrr 415211U, // PMOVSXBQrm 551818731U, // PMOVSXBQrr 551838839U, // PMOVSXBWrm 551822455U, // PMOVSXBWrr 551835546U, // PMOVSXDQrm 551819162U, // PMOVSXDQrr 551833133U, // PMOVSXWDrm 551816749U, // PMOVSXWDrr 551803801U, // PMOVSXWQrm 551820185U, // PMOVSXWQrr 551798213U, // PMOVZXBDrm 551814597U, // PMOVZXBDrr 415222U, // PMOVZXBQrm 551818742U, // PMOVZXBQrr 551838850U, // PMOVZXBWrm 551822466U, // PMOVZXBWrr 551835557U, // PMOVZXDQrm 551819173U, // PMOVZXDQrr 551833144U, // PMOVZXWDrm 551816760U, // PMOVZXWDrr 551803812U, // PMOVZXWQrm 551820196U, // PMOVZXWQrr 8689342U, // PMULDQrm 8443582U, // PMULDQrr 8693689U, // PMULHRSWrm128 8447929U, // PMULHRSWrr128 551659224U, // PMULHRWrm 8447704U, // PMULHRWrr 8693892U, // PMULHUWrm 8448132U, // PMULHUWrr 8693176U, // PMULHWrm 8447416U, // PMULHWrr 8685182U, // PMULLDrm 8439422U, // PMULLDrr 8693245U, // PMULLWrm 8447485U, // PMULLWrr 8689552U, // PMULUDQrm 8443792U, // PMULUDQrr 26250U, // POP16r 222858U, // POP16rmm 26250U, // POP16rmr 21072U, // POP32r 234064U, // POP32rmm 21072U, // POP32rmr 22852U, // POP64r 432452U, // POP64rmm 22852U, // POP64rmr 13922U, // POPA16 13084U, // POPA32 419907U, // POPCNT16rm 551823427U, // POPCNT16rr 551801762U, // POPCNT32rm 551818146U, // POPCNT32rr 551836353U, // POPCNT64rm 551819969U, // POPCNT64rr 13544U, // POPDS16 13525U, // POPDS32 13582U, // POPES16 13563U, // POPES32 13935U, // POPF16 13097U, // POPF32 13372U, // POPF64 13639U, // POPFS16 13601U, // POPFS32 13620U, // POPFS64 13696U, // POPGS16 13658U, // POPGS32 13677U, // POPGS64 13816U, // POPSS16 13797U, // POPSS32 8690698U, // PORrm 8444938U, // PORrr 462584U, // PREFETCH 459346U, // PREFETCHNTA 458753U, // PREFETCHT0 458787U, // PREFETCHT1 458876U, // PREFETCHT2 468386U, // PREFETCHW 8692749U, // PSADBWrm 8446989U, // PSADBWrr 8684261U, // PSHUFBrm 8438501U, // PSHUFBrr 25495105U, // PSHUFDmi 811943489U, // PSHUFDri 25503150U, // PSHUFHWmi 811951534U, // PSHUFHWri 25503195U, // PSHUFLWmi 811951579U, // PSHUFLWri 8684379U, // PSIGNBrm 8438619U, // PSIGNBrr 8685299U, // PSIGNDrm 8439539U, // PSIGNDrr 8693326U, // PSIGNWrm 8447566U, // PSIGNWrr 8738476U, // PSLLDQri 8734326U, // PSLLDri 8685174U, // PSLLDrm 8439414U, // PSLLDrr 8738948U, // PSLLQri 8689796U, // PSLLQrm 8444036U, // PSLLQrr 8742389U, // PSLLWri 8693237U, // PSLLWrm 8447477U, // PSLLWrr 8734092U, // PSRADri 8684940U, // PSRADrm 8439180U, // PSRADrr 8741868U, // PSRAWri 8692716U, // PSRAWrm 8446956U, // PSRAWrr 8738485U, // PSRLDQri 8734343U, // PSRLDri 8685191U, // PSRLDrm 8439431U, // PSRLDrr 8738971U, // PSRLQri 8689819U, // PSRLQrm 8444059U, // PSRLQrr 8742412U, // PSRLWri 8693260U, // PSRLWrm 8447500U, // PSRLWrr 8684183U, // PSUBBrm 8438423U, // PSUBBrr 8684978U, // PSUBDrm 8439218U, // PSUBDrr 8689115U, // PSUBQrm 8443355U, // PSUBQrr 8684547U, // PSUBSBrm 8438787U, // PSUBSBrr 8693605U, // PSUBSWrm 8447845U, // PSUBSWrr 8684595U, // PSUBUSBrm 8438835U, // PSUBUSBrr 8693727U, // PSUBUSWrm 8447967U, // PSUBUSWrr 8692839U, // PSUBWrm 8447079U, // PSUBWrr 551831696U, // PSWAPDrm 551815312U, // PSWAPDrr 615254U, // PTESTrm 551822166U, // PTESTrr 8692777U, // PUNPCKHBWrm 8447017U, // PUNPCKHBWrr 8689293U, // PUNPCKHDQrm 8443533U, // PUNPCKHDQrr 8689386U, // PUNPCKHQDQrm 8443626U, // PUNPCKHQDQrr 8687070U, // PUNPCKHWDrm 8441310U, // PUNPCKHWDrr 8692799U, // PUNPCKLBWrm 8447039U, // PUNPCKLBWrr 8689312U, // PUNPCKLDQrm 8443552U, // PUNPCKLDQrr 8689399U, // PUNPCKLQDQrm 8443639U, // PUNPCKLQDQrr 8687082U, // PUNPCKLWDrm 8441322U, // PUNPCKLWDrr 26048U, // PUSH16i8 26048U, // PUSH16r 222656U, // PUSH16rmm 26048U, // PUSH16rmr 20819U, // PUSH32i8 20819U, // PUSH32r 233811U, // PUSH32rmm 20819U, // PUSH32rmr 26048U, // PUSH64i16 22593U, // PUSH64i32 22593U, // PUSH64i8 22593U, // PUSH64r 432193U, // PUSH64rmm 22593U, // PUSH64rmr 13915U, // PUSHA16 13077U, // PUSHA32 13505U, // PUSHCS16 13495U, // PUSHCS32 13534U, // PUSHDS16 13515U, // PUSHDS32 13572U, // PUSHES16 13553U, // PUSHES32 13928U, // PUSHF16 13090U, // PUSHF32 13365U, // PUSHF64 13629U, // PUSHFS16 13591U, // PUSHFS32 13610U, // PUSHFS64 13686U, // PUSHGS16 13648U, // PUSHGS32 13667U, // PUSHGS64 13806U, // PUSHSS16 13787U, // PUSHSS32 26048U, // PUSHi16 20819U, // PUSHi32 8690721U, // PXORrm 8444961U, // PXORrr 223939U, // RCL16m1 224404U, // RCL16mCL 4236756U, // RCL16mi 27331U, // RCL16r1 27796U, // RCL16rCL 8447444U, // RCL16ri 240163U, // RCL32m1 240564U, // RCL32mCL 12620164U, // RCL32mi 27171U, // RCL32r1 27572U, // RCL32rCL 8442244U, // RCL32ri 436851U, // RCL64m1 437284U, // RCL64mCL 18913390U, // RCL64mi 27251U, // RCL64r1 27684U, // RCL64rCL 8444014U, // RCL64ri 469459U, // RCL8m1 469828U, // RCL8mCL 23102234U, // RCL8mi 27091U, // RCL8r1 27460U, // RCL8rCL 8438554U, // RCL8ri 614373U, // RCPPSm 614373U, // RCPPSm_Int 551821285U, // RCPPSr 551821285U, // RCPPSr_Int 552198773U, // RCPSSm 551723637U, // RCPSSm_Int 551821941U, // RCPSSr 8446581U, // RCPSSr_Int 223979U, // RCR16m1 224448U, // RCR16mCL 4237004U, // RCR16mi 27371U, // RCR16r1 27840U, // RCR16rCL 8447692U, // RCR16ri 240203U, // RCR32m1 240608U, // RCR32mCL 12620464U, // RCR32mi 27211U, // RCR32r1 27616U, // RCR32rCL 8442544U, // RCR32ri 436891U, // RCR64m1 437328U, // RCR64mCL 18913665U, // RCR64mi 27291U, // RCR64r1 27728U, // RCR64rCL 8444289U, // RCR64ri 469499U, // RCR8m1 469872U, // RCR8mCL 23102375U, // RCR8mi 27131U, // RCR8r1 27504U, // RCR8rCL 8438695U, // RCR8ri 20727U, // RDFSBASE 22501U, // RDFSBASE64 20749U, // RDGSBASE 22523U, // RDGSBASE64 13460U, // RDMSR 12817U, // RDPMC 25834U, // RDRAND16r 20641U, // RDRAND32r 22240U, // RDRAND64r 25811U, // RDSEED16r 20612U, // RDSEED32r 22147U, // RDSEED64r 12830U, // RDTSC 13280U, // RDTSCP 12214U, // RELEASE_ADD32mi 12214U, // RELEASE_ADD64mi32 12214U, // RELEASE_ADD8mi 12214U, // RELEASE_AND32mi 12214U, // RELEASE_AND64mi32 12214U, // RELEASE_AND8mi 12237U, // RELEASE_DEC16m 12237U, // RELEASE_DEC32m 12237U, // RELEASE_DEC64m 12237U, // RELEASE_DEC8m 12237U, // RELEASE_INC16m 12237U, // RELEASE_INC32m 12237U, // RELEASE_INC64m 12237U, // RELEASE_INC8m 11840U, // RELEASE_MOV16mi 12280U, // RELEASE_MOV16mr 11840U, // RELEASE_MOV32mi 12280U, // RELEASE_MOV32mr 11840U, // RELEASE_MOV64mi32 12280U, // RELEASE_MOV64mr 11840U, // RELEASE_MOV8mi 12280U, // RELEASE_MOV8mr 12214U, // RELEASE_OR32mi 12214U, // RELEASE_OR64mi32 12214U, // RELEASE_OR8mi 12214U, // RELEASE_XOR32mi 12214U, // RELEASE_XOR64mi32 12214U, // RELEASE_XOR8mi 12920U, // REPNE_PREFIX 12761U, // REP_MOVSB_32 12761U, // REP_MOVSB_64 13145U, // REP_MOVSD_32 13145U, // REP_MOVSD_64 13388U, // REP_MOVSQ_64 13951U, // REP_MOVSW_32 13951U, // REP_MOVSW_64 13287U, // REP_PREFIX 12751U, // REP_STOSB_32 12751U, // REP_STOSB_64 13135U, // REP_STOSD_32 13135U, // REP_STOSD_64 13378U, // REP_STOSQ_64 13941U, // REP_STOSW_32 13941U, // REP_STOSW_64 21398U, // RETIL 23217U, // RETIQ 26675U, // RETIW 13156U, // RETL 13399U, // RETQ 13967U, // RETW 12587U, // REX64_PREFIX 223959U, // ROL16m1 224426U, // ROL16mCL 4236805U, // ROL16mi 27351U, // ROL16r1 27818U, // ROL16rCL 8447493U, // ROL16ri 240183U, // ROL32m1 240586U, // ROL32mCL 12620210U, // ROL32mi 27191U, // ROL32r1 27594U, // ROL32rCL 8442290U, // ROL32ri 436871U, // ROL64m1 437306U, // ROL64mCL 18913428U, // ROL64mi 27271U, // ROL64r1 27706U, // ROL64rCL 8444052U, // ROL64ri 469479U, // ROL8m1 469850U, // ROL8mCL 23102248U, // ROL8mi 27111U, // ROL8r1 27482U, // ROL8rCL 8438568U, // ROL8ri 223999U, // ROR16m1 224470U, // ROR16mCL 4237045U, // ROR16mi 27391U, // ROR16r1 27862U, // ROR16rCL 8447733U, // ROR16ri 240223U, // ROR32m1 240630U, // ROR32mCL 12620476U, // ROR32mi 27231U, // ROR32r1 27638U, // ROR32rCL 8442556U, // ROR32ri 436911U, // ROR64m1 437350U, // ROR64mCL 18913698U, // ROR64mi 27311U, // ROR64r1 27750U, // ROR64rCL 8444322U, // ROR64ri 469519U, // ROR8m1 469894U, // ROR8mCL 23102401U, // ROR8mi 27151U, // ROR8r1 27526U, // ROR8rCL 8438721U, // ROR8ri 832934969U, // RORX32mi 811652153U, // RORX32ri 835034080U, // RORX64mi 811654112U, // RORX64ri 82119013U, // ROUNDPDm 811944293U, // ROUNDPDr 82124572U, // ROUNDPSm 811949852U, // ROUNDPSr 581291140U, // ROUNDSDm 570821764U, // ROUNDSDr 570821764U, // ROUNDSDr_Int 585491003U, // ROUNDSSm 570827323U, // ROUNDSSr 570827323U, // ROUNDSSr_Int 13221U, // RSM 614544U, // RSQRTPSm 614544U, // RSQRTPSm_Int 551821456U, // RSQRTPSr 551821456U, // RSQRTPSr_Int 552198798U, // RSQRTSSm 551723662U, // RSQRTSSm_Int 551821966U, // RSQRTSSr 8446606U, // RSQRTSSr_Int 13006U, // SAHF 223929U, // SAL16m1 224393U, // SAL16mCL 4236750U, // SAL16mi 27321U, // SAL16r1 27785U, // SAL16rCL 8447438U, // SAL16ri 240153U, // SAL32m1 240553U, // SAL32mCL 12620158U, // SAL32mi 27161U, // SAL32r1 27561U, // SAL32rCL 8442238U, // SAL32ri 436841U, // SAL64m1 437273U, // SAL64mCL 18913384U, // SAL64mi 27241U, // SAL64r1 27673U, // SAL64rCL 8444008U, // SAL64ri 469449U, // SAL8m1 469817U, // SAL8mCL 23102228U, // SAL8mi 27081U, // SAL8r1 27449U, // SAL8rCL 8438548U, // SAL8ri 12804U, // SALC 223969U, // SAR16m1 224437U, // SAR16mCL 4236998U, // SAR16mi 27361U, // SAR16r1 27829U, // SAR16rCL 8447686U, // SAR16ri 240193U, // SAR32m1 240597U, // SAR32mCL 12620441U, // SAR32mi 27201U, // SAR32r1 27605U, // SAR32rCL 8442521U, // SAR32ri 436881U, // SAR64m1 437317U, // SAR64mCL 18913659U, // SAR64mi 27281U, // SAR64r1 27717U, // SAR64rCL 8444283U, // SAR64ri 469489U, // SAR8m1 469861U, // SAR8mCL 23102369U, // SAR8mi 27121U, // SAR8r1 27493U, // SAR8rCL 8438689U, // SAR8ri 832934955U, // SARX32rm 811652139U, // SARX32rr 835034066U, // SARX64rm 811654098U, // SARX64rr 2122747U, // SBB16i16 4236283U, // SBB16mi 4236283U, // SBB16mi8 4236283U, // SBB16mr 6349819U, // SBB16ri 6349819U, // SBB16ri8 6366203U, // SBB16rm 6349819U, // SBB16rr 8446971U, // SBB16rr_REV 10506272U, // SBB32i32 12619808U, // SBB32mi 12619808U, // SBB32mi8 12619808U, // SBB32mr 6344736U, // SBB32ri 6344736U, // SBB32ri8 283201568U, // SBB32rm 6344736U, // SBB32rr 8441888U, // SBB32rr_REV 16799159U, // SBB64i32 18912695U, // SBB64mi32 18912695U, // SBB64mi8 18912695U, // SBB64mr 6346167U, // SBB64ri32 6346167U, // SBB64ri8 283219383U, // SBB64rm 6346167U, // SBB64rr 8443319U, // SBB64rr_REV 20988560U, // SBB8i8 23102096U, // SBB8mi 23102096U, // SBB8mi8 23102096U, // SBB8mr 6341264U, // SBB8ri 6341264U, // SBB8ri8 115344U, // SBB8rm 6341264U, // SBB8rr 8438416U, // SBB8rr_REV 21496810U, // SCASB 11031290U, // SCASL 17340916U, // SCASQ 2680630U, // SCASW 13717U, // SEG_ALLOCA_32 13717U, // SEG_ALLOCA_64 12971U, // SEH_EndPrologue 12957U, // SEH_Epilogue 28165U, // SEH_PushFrame 28210U, // SEH_PushReg 283143716U, // SEH_SaveReg 283143630U, // SEH_SaveXMM 283143701U, // SEH_SetFrame 28148U, // SEH_StackAlloc 462407U, // SETAEm 20039U, // SETAEr 459340U, // SETAm 16972U, // SETAr 462429U, // SETBEm 20061U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 459871U, // SETBm 17503U, // SETBr 462525U, // SETEm 20157U, // SETEr 462466U, // SETGEm 20098U, // SETGEr 462578U, // SETGm 20210U, // SETGr 462482U, // SETLEm 20114U, // SETLEr 463772U, // SETLm 21404U, // SETLr 462502U, // SETNEm 20134U, // SETNEr 464025U, // SETNOm 21657U, // SETNOr 464109U, // SETNPm 21741U, // SETNPr 466095U, // SETNSm 23727U, // SETNSr 464032U, // SETOm 21664U, // SETOr 464143U, // SETPm 21775U, // SETPr 467663U, // SETSm 25295U, // SETSr 12897U, // SFENCE 665615U, // SGDT16m 660345U, // SGDT32m 662164U, // SGDT64m 8683533U, // SHA1MSG1rm 8437773U, // SHA1MSG1rr 8683609U, // SHA1MSG2rm 8437849U, // SHA1MSG2rr 8687299U, // SHA1NEXTErm 8441539U, // SHA1NEXTErr 610648324U, // SHA1RNDS4rmi 570818820U, // SHA1RNDS4rri 8683543U, // SHA256MSG1rm 8437783U, // SHA256MSG1rr 8683619U, // SHA256MSG2rm 8437859U, // SHA256MSG2rr 8683631U, // SHA256RNDS2rm 8437871U, // SHA256RNDS2rr 223949U, // SHL16m1 224415U, // SHL16mCL 4236774U, // SHL16mi 27341U, // SHL16r1 27807U, // SHL16rCL 8447462U, // SHL16ri 240173U, // SHL32m1 240575U, // SHL32mCL 12620178U, // SHL32mi 27181U, // SHL32r1 27583U, // SHL32rCL 8442258U, // SHL32ri 436861U, // SHL64m1 437295U, // SHL64mCL 18913398U, // SHL64mi 27261U, // SHL64r1 27695U, // SHL64rCL 8444022U, // SHL64ri 469469U, // SHL8m1 469839U, // SHL8mCL 23102242U, // SHL8mi 27101U, // SHL8r1 27471U, // SHL8rCL 8438562U, // SHL8ri 4238449U, // SHLD16mrCL 1124443356U, // SHLD16mri8 8449137U, // SHLD16rrCL 571401436U, // SHLD16rri8 12626833U, // SHLD32mrCL 587567251U, // SHLD32mri8 8448913U, // SHLD32rrCL 571396243U, // SHLD32rri8 18918401U, // SHLD64mrCL 856004248U, // SHLD64mri8 8449025U, // SHLD64rrCL 571397784U, // SHLD64rri8 832934934U, // SHLX32rm 811652118U, // SHLX32rr 835034045U, // SHLX64rm 811654077U, // SHLX64rr 223989U, // SHR16m1 224459U, // SHR16mCL 4237025U, // SHR16mi 27381U, // SHR16r1 27851U, // SHR16rCL 8447713U, // SHR16ri 240213U, // SHR32m1 240619U, // SHR32mCL 12620470U, // SHR32mi 27221U, // SHR32r1 27627U, // SHR32rCL 8442550U, // SHR32ri 436901U, // SHR64m1 437339U, // SHR64mCL 18913671U, // SHR64mi 27301U, // SHR64r1 27739U, // SHR64rCL 8444295U, // SHR64ri 469509U, // SHR8m1 469883U, // SHR8mCL 23102381U, // SHR8mi 27141U, // SHR8r1 27515U, // SHR8rCL 8438701U, // SHR8ri 4238461U, // SHRD16mrCL 1124443389U, // SHRD16mri8 8449149U, // SHRD16rrCL 571401469U, // SHRD16rri8 12626845U, // SHRD32mrCL 587567274U, // SHRD32mri8 8448925U, // SHRD32rrCL 571396266U, // SHRD32rri8 18918413U, // SHRD64mrCL 856004392U, // SHRD64mri8 8449037U, // SHRD64rrCL 571397928U, // SHRD64rri8 832934962U, // SHRX32rm 811652146U, // SHRX32rr 835034073U, // SHRX64rm 811654105U, // SHRX64rr 568707477U, // SHUFPDrmi 570821013U, // SHUFPDrri 568713036U, // SHUFPSrmi 570826572U, // SHUFPSrri 665629U, // SIDT16m 660359U, // SIDT32m 662178U, // SIDT64m 13238U, // SIN_F 0U, // SIN_Fp32 0U, // SIN_Fp64 0U, // SIN_Fp80 14043U, // SKINIT 223275U, // SLDT16m 26667U, // SLDT16r 21390U, // SLDT32r 219817U, // SLDT64m 23209U, // SLDT64r 223453U, // SMSW16m 26845U, // SMSW16r 21496U, // SMSW32r 23422U, // SMSW64r 608925U, // SQRTPDm 551815837U, // SQRTPDr 614545U, // SQRTPSm 551821457U, // SQRTPSr 552176869U, // SQRTSDm 551701733U, // SQRTSDm_Int 551816421U, // SQRTSDr 8441061U, // SQRTSDr_Int 552198799U, // SQRTSSm 551723663U, // SQRTSSm_Int 551821967U, // SQRTSSr 8446607U, // SQRTSSr_Int 13878U, // SQRT_F 0U, // SQRT_Fp32 0U, // SQRT_Fp64 0U, // SQRT_Fp80 12782U, // STAC 12836U, // STC 12860U, // STD 13025U, // STGI 13040U, // STI 236600U, // STMXCSR 535319U, // STOSB 552224U, // STOSL 568660U, // STOSQ 584943U, // STOSW 26407U, // STR16r 21211U, // STR32r 23005U, // STR64r 223015U, // STRm 189141U, // ST_F32m 201672U, // ST_F64m 35673305U, // ST_FCOMPST0r 35673305U, // ST_FCOMPST0r_alt 35673157U, // ST_FCOMST0r 188587U, // ST_FP32m 201308U, // ST_FP64m 746275U, // ST_FP80m 26992U, // ST_FPNCEST0r 27023U, // ST_FPST0r 27023U, // ST_FPST0r_alt 21788U, // ST_FPrr 35671810U, // ST_FXCHST0r 35671810U, // ST_FXCHST0r_alt 0U, // ST_Fp32m 0U, // ST_Fp64m 0U, // ST_Fp64m32 0U, // ST_Fp80m32 0U, // ST_Fp80m64 0U, // ST_FpP32m 0U, // ST_FpP64m 0U, // ST_FpP64m32 0U, // ST_FpP80m 0U, // ST_FpP80m32 0U, // ST_FpP80m64 25437U, // ST_Frr 2122848U, // SUB16i16 4236384U, // SUB16mi 4236384U, // SUB16mi8 4236384U, // SUB16mr 6349920U, // SUB16ri 6349920U, // SUB16ri8 6366304U, // SUB16rm 6349920U, // SUB16rr 8447072U, // SUB16rr_REV 10506287U, // SUB32i32 12619823U, // SUB32mi 12619823U, // SUB32mi8 12619823U, // SUB32mr 6344751U, // SUB32ri 6344751U, // SUB32ri8 283201583U, // SUB32rm 6344751U, // SUB32rr 8441903U, // SUB32rr_REV 16799196U, // SUB64i32 18912732U, // SUB64mi32 18912732U, // SUB64mi8 18912732U, // SUB64mr 6346204U, // SUB64ri32 6346204U, // SUB64ri8 283219420U, // SUB64rm 6346204U, // SUB64rr 8443356U, // SUB64rr_REV 20988568U, // SUB8i8 23102104U, // SUB8mi 23102104U, // SUB8mi8 23102104U, // SUB8mr 6341272U, // SUB8ri 6341272U, // SUB8ri8 115352U, // SUB8rm 6341272U, // SUB8rr 8438424U, // SUB8rr_REV 8521886U, // SUBPDrm 8439966U, // SUBPDrr 8527445U, // SUBPSrm 8445525U, // SUBPSrr 188668U, // SUBR_F32m 201375U, // SUBR_F64m 221444U, // SUBR_FI16m 234151U, // SUBR_FI32m 21670U, // SUBR_FPrST0 23537U, // SUBR_FST0r 0U, // SUBR_Fp32m 0U, // SUBR_Fp64m 0U, // SUBR_Fp64m32 0U, // SUBR_Fp80m32 0U, // SUBR_Fp80m64 0U, // SUBR_FpI16m32 0U, // SUBR_FpI16m64 0U, // SUBR_FpI16m80 0U, // SUBR_FpI32m32 0U, // SUBR_FpI32m64 0U, // SUBR_FpI32m80 26964U, // SUBR_FrST0 551701580U, // SUBSDrm 551701580U, // SUBSDrm_Int 8440908U, // SUBSDrr 8440908U, // SUBSDrr_Int 551723523U, // SUBSSrm 551723523U, // SUBSSrm_Int 8446467U, // SUBSSrr 8446467U, // SUBSSrr_Int 187471U, // SUB_F32m 200750U, // SUB_F64m 220246U, // SUB_FI16m 233525U, // SUB_FI32m 21759U, // SUB_FPrST0 17586U, // SUB_FST0r 0U, // SUB_Fp32 0U, // SUB_Fp32m 0U, // SUB_Fp64 0U, // SUB_Fp64m 0U, // SUB_Fp64m32 0U, // SUB_Fp80 0U, // SUB_Fp80m32 0U, // SUB_Fp80m64 0U, // SUB_FpI16m32 0U, // SUB_FpI16m64 0U, // SUB_FpI16m80 0U, // SUB_FpI32m32 0U, // SUB_FpI32m64 0U, // SUB_FpI32m80 27037U, // SUB_FrST0 13705U, // SWAPGS 13118U, // SYSCALL 13443U, // SYSENTER 13175U, // SYSEXIT 13418U, // SYSEXIT64 13167U, // SYSRET 13410U, // SYSRET64 551798069U, // T1MSKC32rm 551814453U, // T1MSKC32rr 551830837U, // T1MSKC64rm 551814453U, // T1MSKC64rr 447700U, // TAILJMPd 447700U, // TAILJMPd64 447694U, // TAILJMPd64_REX 241687U, // TAILJMPm 438317U, // TAILJMPm64 438311U, // TAILJMPm64_REX 0U, // TAILJMPr 28717U, // TAILJMPr64 28711U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 2123900U, // TEST16i16 4237436U, // TEST16mi 4237436U, // TEST16mi_alt 551823484U, // TEST16ri 551823484U, // TEST16ri_alt 1356884092U, // TEST16rm 551823484U, // TEST16rr 10507201U, // TEST32i32 12620737U, // TEST32mi 12620737U, // TEST32mi_alt 551818177U, // TEST32ri 551818177U, // TEST32ri_alt 1625314241U, // TEST32rm 551818177U, // TEST32rr 16800525U, // TEST64i32 18914061U, // TEST64mi32 18914061U, // TEST64mi32_alt 551820045U, // TEST64ri32 551820045U, // TEST64ri32_alt 1893751565U, // TEST64rm 551820045U, // TEST64rr 20989071U, // TEST8i8 23102607U, // TEST8mi 23102607U, // TEST8mi_alt 551814287U, // TEST8ri 0U, // TEST8ri_NOREX 551814287U, // TEST8ri_alt 2162181263U, // TEST8rm 551814287U, // TEST8rr 12439U, // TLSCall_32 12543U, // TLSCall_64 12452U, // TLS_addr32 12556U, // TLS_addr64 12465U, // TLS_base_addr32 12569U, // TLS_base_addr64 12483U, // TRAP 13890U, // TST_F 0U, // TST_Fp32 0U, // TST_Fp64 0U, // TST_Fp80 419924U, // TZCNT16rm 551823444U, // TZCNT16rr 551801779U, // TZCNT32rm 551818163U, // TZCNT32rr 551836372U, // TZCNT64rm 551819988U, // TZCNT64rr 551800835U, // TZMSK32rm 551817219U, // TZMSK32rr 551833603U, // TZMSK64rm 551817219U, // TZMSK64rr 552176795U, // UCOMISDrm 551816347U, // UCOMISDrr 552198738U, // UCOMISSrm 551821906U, // UCOMISSrr 20346U, // UCOM_FIPr 20288U, // UCOM_FIr 13341U, // UCOM_FPPr 21728U, // UCOM_FPr 0U, // UCOM_FpIr32 0U, // UCOM_FpIr64 0U, // UCOM_FpIr80 0U, // UCOM_Fpr32 0U, // UCOM_Fpr64 0U, // UCOM_Fpr80 21579U, // UCOM_Fr 12716U, // UD2B 8522142U, // UNPCKHPDrm 8440222U, // UNPCKHPDrr 8527701U, // UNPCKHPSrm 8445781U, // UNPCKHPSrr 8522184U, // UNPCKLPDrm 8440264U, // UNPCKLPDrr 8527763U, // UNPCKLPSrm 8445843U, // UNPCKLPSrr 2162191788U, // VAARG_64 812583231U, // VADDPDYrm 811649343U, // VADDPDYrr 811731263U, // VADDPDZ128rm 352471359U, // VADDPDZ128rmb 2500806975U, // VADDPDZ128rmbk 1427081535U, // VADDPDZ128rmbkz 87017791U, // VADDPDZ128rmk 571476287U, // VADDPDZ128rmkz 811649343U, // VADDPDZ128rr 2693810495U, // VADDPDZ128rrk 571394367U, // VADDPDZ128rrkz 812583231U, // VADDPDZ256rm 356665663U, // VADDPDZ256rmb 2505001279U, // VADDPDZ256rmbk 1431275839U, // VADDPDZ256rmbkz 87066943U, // VADDPDZ256rmk 571525439U, // VADDPDZ256rmkz 811649343U, // VADDPDZ256rr 2693810495U, // VADDPDZ256rrk 571394367U, // VADDPDZ256rrkz 1116479U, // VADDPDZrb 87116095U, // VADDPDZrbk 359762239U, // VADDPDZrbkz 812763455U, // VADDPDZrm 360859967U, // VADDPDZrmb 2509195583U, // VADDPDZrmbk 1435470143U, // VADDPDZrmbkz 87165247U, // VADDPDZrmk 571623743U, // VADDPDZrmkz 811649343U, // VADDPDZrr 2693810495U, // VADDPDZrrk 571394367U, // VADDPDZrrkz 811731263U, // VADDPDrm 811649343U, // VADDPDrr 812588790U, // VADDPSYrm 811654902U, // VADDPSYrr 811736822U, // VADDPSZ128rm 356687606U, // VADDPSZ128rmb 2505219830U, // VADDPSZ128rmbk 1431494390U, // VADDPSZ128rmbkz 87023350U, // VADDPSZ128rmk 571481846U, // VADDPSZ128rmkz 811654902U, // VADDPSZ128rr 2693816054U, // VADDPSZ128rrk 571399926U, // VADDPSZ128rrkz 812588790U, // VADDPSZ256rm 360881910U, // VADDPSZ256rmb 2509414134U, // VADDPSZ256rmbk 1435688694U, // VADDPSZ256rmbkz 87072502U, // VADDPSZ256rmk 571530998U, // VADDPSZ256rmkz 811654902U, // VADDPSZ256rr 2693816054U, // VADDPSZ256rrk 571399926U, // VADDPSZ256rrkz 1122038U, // VADDPSZrb 87121654U, // VADDPSZrbk 359767798U, // VADDPSZrbkz 812769014U, // VADDPSZrm 362979062U, // VADDPSZrmb 2511511286U, // VADDPSZrmbk 1437785846U, // VADDPSZrmbkz 87170806U, // VADDPSZrmk 571629302U, // VADDPSZrmkz 811654902U, // VADDPSZrr 2693816054U, // VADDPSZrrk 571399926U, // VADDPSZrrkz 811736822U, // VADDPSrm 811654902U, // VADDPSrr 283266171U, // VADDSDZrm 811732091U, // VADDSDZrm_Int 87018619U, // VADDSDZrm_Intk 571477115U, // VADDSDZrm_Intkz 811650171U, // VADDSDZrr 811650171U, // VADDSDZrr_Int 2693811323U, // VADDSDZrr_Intk 571395195U, // VADDSDZrr_Intkz 1117307U, // VADDSDZrrb 87116923U, // VADDSDZrrbk 359763067U, // VADDSDZrrbkz 283266171U, // VADDSDrm 283266171U, // VADDSDrm_Int 811650171U, // VADDSDrr 811650171U, // VADDSDrr_Int 283288114U, // VADDSSZrm 811737650U, // VADDSSZrm_Int 87024178U, // VADDSSZrm_Intk 571482674U, // VADDSSZrm_Intkz 811655730U, // VADDSSZrr 811655730U, // VADDSSZrr_Int 2693816882U, // VADDSSZrr_Intk 571400754U, // VADDSSZrr_Intkz 1122866U, // VADDSSZrrb 87122482U, // VADDSSZrrbk 359768626U, // VADDSSZrrbkz 283288114U, // VADDSSrm 283288114U, // VADDSSrm_Int 811655730U, // VADDSSrr 811655730U, // VADDSSrr_Int 812583077U, // VADDSUBPDYrm 811649189U, // VADDSUBPDYrr 811731109U, // VADDSUBPDrm 811649189U, // VADDSUBPDrr 812588636U, // VADDSUBPSYrm 811654748U, // VADDSUBPSYrr 811736668U, // VADDSUBPSrm 811654748U, // VADDSUBPSrr 811901755U, // VAESDECLASTrm 811655995U, // VAESDECLASTrr 811894038U, // VAESDECrm 811648278U, // VAESDECrr 811901768U, // VAESENCLASTrm 811656008U, // VAESENCLASTrr 811894086U, // VAESENCrm 811648326U, // VAESENCrr 312637U, // VAESIMCrm 551814461U, // VAESIMCrr 25502562U, // VAESKEYGENASSIST128rm 811950946U, // VAESKEYGENASSIST128rr 365283049U, // VALIGNDrmi 302384873U, // VALIGNDrri 87230185U, // VALIGNDrrik 1441416937U, // VALIGNDrrikz 365287690U, // VALIGNQrmi 302389514U, // VALIGNQrri 87234826U, // VALIGNQrrik 1441421578U, // VALIGNQrrikz 812583423U, // VANDNPDYrm 811649535U, // VANDNPDYrr 811731455U, // VANDNPDrm 811649535U, // VANDNPDrr 812589011U, // VANDNPSYrm 811655123U, // VANDNPSYrr 811737043U, // VANDNPSrm 811655123U, // VANDNPSrr 812583250U, // VANDPDYrm 811649362U, // VANDPDYrr 811731282U, // VANDPDrm 811649362U, // VANDPDrr 812588809U, // VANDPSYrm 811654921U, // VANDPSYrr 811736841U, // VANDPSrm 811654921U, // VANDPSrr 283143644U, // VASTART_SAVE_XMM_REGS 811731435U, // VBLENDMPDZ128rm 352471531U, // VBLENDMPDZ128rmb 1427081707U, // VBLENDMPDZ128rmbk 571476459U, // VBLENDMPDZ128rmk 571476459U, // VBLENDMPDZ128rmkz 811649515U, // VBLENDMPDZ128rr 571394539U, // VBLENDMPDZ128rrk 571394539U, // VBLENDMPDZ128rrkz 812583403U, // VBLENDMPDZ256rm 356665835U, // VBLENDMPDZ256rmb 1431276011U, // VBLENDMPDZ256rmbk 571525611U, // VBLENDMPDZ256rmk 571525611U, // VBLENDMPDZ256rmkz 811649515U, // VBLENDMPDZ256rr 571394539U, // VBLENDMPDZ256rrk 571394539U, // VBLENDMPDZ256rrkz 812763627U, // VBLENDMPDZrm 360860139U, // VBLENDMPDZrmb 1435470315U, // VBLENDMPDZrmbk 571623915U, // VBLENDMPDZrmk 571623915U, // VBLENDMPDZrmkz 811649515U, // VBLENDMPDZrr 571394539U, // VBLENDMPDZrrk 571394539U, // VBLENDMPDZrrkz 811737006U, // VBLENDMPSZ128rm 356687790U, // VBLENDMPSZ128rmb 1431494574U, // VBLENDMPSZ128rmbk 571482030U, // VBLENDMPSZ128rmk 571482030U, // VBLENDMPSZ128rmkz 811655086U, // VBLENDMPSZ128rr 571400110U, // VBLENDMPSZ128rrk 571400110U, // VBLENDMPSZ128rrkz 812588974U, // VBLENDMPSZ256rm 360882094U, // VBLENDMPSZ256rmb 1435688878U, // VBLENDMPSZ256rmbk 571531182U, // VBLENDMPSZ256rmk 571531182U, // VBLENDMPSZ256rmkz 811655086U, // VBLENDMPSZ256rr 571400110U, // VBLENDMPSZ256rrk 571400110U, // VBLENDMPSZ256rrkz 812769198U, // VBLENDMPSZrm 362979246U, // VBLENDMPSZrmb 1437786030U, // VBLENDMPSZrmbk 571629486U, // VBLENDMPSZrmk 571629486U, // VBLENDMPSZrmkz 811655086U, // VBLENDMPSZrr 571400110U, // VBLENDMPSZrrk 571400110U, // VBLENDMPSZrrkz 101042522U, // VBLENDPDYrmi 302385498U, // VBLENDPDYrri 300271962U, // VBLENDPDrmi 302385498U, // VBLENDPDrri 101048081U, // VBLENDPSYrmi 302391057U, // VBLENDPSYrri 300277521U, // VBLENDPSrmi 302391057U, // VBLENDPSrri 101927607U, // VBLENDVPDYrm 302959287U, // VBLENDVPDYrr 301157047U, // VBLENDVPDrm 302959287U, // VBLENDVPDrr 101933260U, // VBLENDVPSYrm 302964940U, // VBLENDVPSYrr 301162700U, // VBLENDVPSrm 302964940U, // VBLENDVPSrr 606679U, // VBROADCASTF128 2693038409U, // VBROADCASTI32X4krm 311625U, // VBROADCASTI32X4rm 2694021524U, // VBROADCASTI64X4krm 1294740U, // VBROADCASTI64X4rm 552176877U, // VBROADCASTSDYrm 551816429U, // VBROADCASTSDYrr 552176877U, // VBROADCASTSDZ256m 552570093U, // VBROADCASTSDZ256mk 551701741U, // VBROADCASTSDZ256mkz 551816429U, // VBROADCASTSDZ256r 2693713133U, // VBROADCASTSDZ256rk 2692795629U, // VBROADCASTSDZ256rkz 552176877U, // VBROADCASTSDZm 552570093U, // VBROADCASTSDZmk 551701741U, // VBROADCASTSDZmkz 551816429U, // VBROADCASTSDZr 2693713133U, // VBROADCASTSDZrk 2692795629U, // VBROADCASTSDZrkz 552198816U, // VBROADCASTSSYrm 551821984U, // VBROADCASTSSYrr 552198816U, // VBROADCASTSSZ128m 552788640U, // VBROADCASTSSZ128mk 551723680U, // VBROADCASTSSZ128mkz 551821984U, // VBROADCASTSSZ128r 2693718688U, // VBROADCASTSSZ128rk 2692801184U, // VBROADCASTSSZ128rkz 552198816U, // VBROADCASTSSZ256m 552788640U, // VBROADCASTSSZ256mk 551723680U, // VBROADCASTSSZ256mkz 551821984U, // VBROADCASTSSZ256r 2693718688U, // VBROADCASTSSZ256rk 2692801184U, // VBROADCASTSSZ256rkz 552198816U, // VBROADCASTSSZm 552788640U, // VBROADCASTSSZmk 551723680U, // VBROADCASTSSZmkz 551821984U, // VBROADCASTSSZr 2693718688U, // VBROADCASTSSZrk 2692801184U, // VBROADCASTSSZrkz 552198816U, // VBROADCASTSSrm 551821984U, // VBROADCASTSSrr 2991240177U, // VCMPPDYrmi 101042711U, // VCMPPDYrmi_alt 1380643825U, // VCMPPDYrri 302385687U, // VCMPPDYrri_alt 3259675633U, // VCMPPDZrmi 103139863U, // VCMPPDZrmi_alt 1380643825U, // VCMPPDZrri 302385687U, // VCMPPDZrri_alt 105575409U, // VCMPPDZrrib 302394766U, // VCMPPDZrrib_alt 1112191985U, // VCMPPDrmi 300272151U, // VCMPPDrmi_alt 1380643825U, // VCMPPDrri 302385687U, // VCMPPDrri_alt 2993337329U, // VCMPPSYrmi 101048307U, // VCMPPSYrmi_alt 1382740977U, // VCMPPSYrri 302391283U, // VCMPPSYrri_alt 3261772785U, // VCMPPSZrmi 103145459U, // VCMPPSZrmi_alt 1382740977U, // VCMPPSZrri 302391283U, // VCMPPSZrri_alt 107672561U, // VCMPPSZrrib 302394781U, // VCMPPSZrrib_alt 1114289137U, // VCMPPSrmi 300277747U, // VCMPPSrmi_alt 1382740977U, // VCMPPSrri 302391283U, // VCMPPSrri_alt 1921692657U, // VCMPSDZrm 312855750U, // VCMPSDZrmi_alt 1384838129U, // VCMPSDZrr 302386374U, // VCMPSDZrri_alt 1921692657U, // VCMPSDrm 312855750U, // VCMPSDrm_alt 1384838129U, // VCMPSDrr 302386374U, // VCMPSDrr_alt 2731193329U, // VCMPSSZrm 317055612U, // VCMPSSZrmi_alt 1389032433U, // VCMPSSZrr 302391932U, // VCMPSSZrri_alt 2731193329U, // VCMPSSrm 317055612U, // VCMPSSrm_alt 1389032433U, // VCMPSSrr 302391932U, // VCMPSSrr_alt 609444U, // VCOMISDZrm 551816356U, // VCOMISDZrr 609444U, // VCOMISDrm 551816356U, // VCOMISDrr 615003U, // VCOMISSZrm 551821915U, // VCOMISSZrr 615003U, // VCOMISSrm 551821915U, // VCOMISSrr 2749729413U, // VCOMPRESSPDZ128mrk 2693712517U, // VCOMPRESSPDZ128rrk 2692795013U, // VCOMPRESSPDZ128rrkz 2793769605U, // VCOMPRESSPDZ256mrk 2693712517U, // VCOMPRESSPDZ256rrk 2692795013U, // VCOMPRESSPDZ256rrkz 2795866757U, // VCOMPRESSPDZmrk 2693712517U, // VCOMPRESSPDZrrk 2692795013U, // VCOMPRESSPDZrrkz 2749735009U, // VCOMPRESSPSZ128mrk 2693718113U, // VCOMPRESSPSZ128rrk 2692800609U, // VCOMPRESSPSZ128rrkz 2793775201U, // VCOMPRESSPSZ256mrk 2693718113U, // VCOMPRESSPSZ256rrk 2692800609U, // VCOMPRESSPSZ256rrkz 2795872353U, // VCOMPRESSPSZmrk 2693718113U, // VCOMPRESSPSZrrk 2692800609U, // VCOMPRESSPSZrrkz 313304U, // VCVTDQ2PDYrm 551815128U, // VCVTDQ2PDYrr 1296344U, // VCVTDQ2PDZrm 551815128U, // VCVTDQ2PDZrr 551831512U, // VCVTDQ2PDrm 551815128U, // VCVTDQ2PDrr 1301922U, // VCVTDQ2PSYrm 551820706U, // VCVTDQ2PSYrr 1318306U, // VCVTDQ2PSZrm 551820706U, // VCVTDQ2PSZrr 1334690U, // VCVTDQ2PSZrrb 318882U, // VCVTDQ2PSrm 551820706U, // VCVTDQ2PSrr 616707U, // VCVTPD2DQXrm 1354024U, // VCVTPD2DQYrm 551823656U, // VCVTPD2DQYrr 1365548U, // VCVTPD2DQZrm 551818796U, // VCVTPD2DQZrr 1332780U, // VCVTPD2DQZrrb 551818796U, // VCVTPD2DQrr 616719U, // VCVTPD2PSXrm 1354036U, // VCVTPD2PSYrm 551823668U, // VCVTPD2PSYrr 1367394U, // VCVTPD2PSZrm 551820642U, // VCVTPD2PSZrr 1334626U, // VCVTPD2PSZrrb 551820642U, // VCVTPD2PSrr 1365855U, // VCVTPD2UDQZrm 551819103U, // VCVTPD2UDQZrr 1333087U, // VCVTPD2UDQZrrb 613741U, // VCVTPH2PSYrm 551820653U, // VCVTPH2PSYrr 1351021U, // VCVTPH2PSZrm 551820653U, // VCVTPH2PSZrr 552181101U, // VCVTPH2PSrm 551820653U, // VCVTPH2PSrr 1349196U, // VCVTPS2DQYrm 551818828U, // VCVTPS2DQYrr 1365580U, // VCVTPS2DQZrm 551818828U, // VCVTPS2DQZrr 1332812U, // VCVTPS2DQZrrb 611916U, // VCVTPS2DQrm 551818828U, // VCVTPS2DQrr 608239U, // VCVTPS2PDYrm 551815151U, // VCVTPS2PDYrr 1345519U, // VCVTPS2PDZrm 551815151U, // VCVTPS2PDZrr 552175599U, // VCVTPS2PDrm 551815151U, // VCVTPS2PDrr 3540324104U, // VCVTPS2PHYmr 811945736U, // VCVTPS2PHYrr 3808759560U, // VCVTPS2PHZmr 811945736U, // VCVTPS2PHZrr 4077195016U, // VCVTPS2PHmr 811945736U, // VCVTPS2PHrr 1365880U, // VCVTPS2UDQZrm 551819128U, // VCVTPS2UDQZrr 1333112U, // VCVTPS2UDQZrrb 552177575U, // VCVTSD2SI64Zrm 551817127U, // VCVTSD2SI64Zrr 552177575U, // VCVTSD2SI64rm 551817127U, // VCVTSD2SI64rr 552177575U, // VCVTSD2SIZrm 551817127U, // VCVTSD2SIZrr 552177575U, // VCVTSD2SIrm 551817127U, // VCVTSD2SIrr 283271571U, // VCVTSD2SSZrm 811655571U, // VCVTSD2SSZrr 283271571U, // VCVTSD2SSrm 811655571U, // VCVTSD2SSrr 552177622U, // VCVTSD2USI64Zrm 551817174U, // VCVTSD2USI64Zrr 552177622U, // VCVTSD2USIZrm 551817174U, // VCVTSD2USIZrr 283219759U, // VCVTSI2SD64rm 811652911U, // VCVTSI2SD64rr 283201713U, // VCVTSI2SDZrm 811651249U, // VCVTSI2SDZrr 283201713U, // VCVTSI2SDrm 811651249U, // VCVTSI2SDrr 283220536U, // VCVTSI2SS64rm 811653688U, // VCVTSI2SS64rr 283202361U, // VCVTSI2SSZrm 811651897U, // VCVTSI2SSZrr 283202361U, // VCVTSI2SSrm 811651897U, // VCVTSI2SSrr 283219759U, // VCVTSI642SDZrm 811652911U, // VCVTSI642SDZrr 283220536U, // VCVTSI642SSZrm 811653688U, // VCVTSI642SSZrr 283282388U, // VCVTSS2SDZrm 811650004U, // VCVTSS2SDZrr 283282388U, // VCVTSS2SDrm 811650004U, // VCVTSS2SDrr 552193982U, // VCVTSS2SI64Zrm 551817150U, // VCVTSS2SI64Zrr 552193982U, // VCVTSS2SI64rm 551817150U, // VCVTSS2SI64rr 552193982U, // VCVTSS2SIZrm 551817150U, // VCVTSS2SIZrr 552193982U, // VCVTSS2SIrm 551817150U, // VCVTSS2SIrr 552194031U, // VCVTSS2USI64Zrm 551817199U, // VCVTSS2USI64Zrr 552194031U, // VCVTSS2USIZrm 551817199U, // VCVTSS2USIZrr 616694U, // VCVTTPD2DQXrm 1354011U, // VCVTTPD2DQYrm 551823643U, // VCVTTPD2DQYrr 1365536U, // VCVTTPD2DQZrm 551818784U, // VCVTTPD2DQZrr 551818784U, // VCVTTPD2DQrr 1365842U, // VCVTTPD2UDQZrm 551819090U, // VCVTTPD2UDQZrr 1349184U, // VCVTTPS2DQYrm 551818816U, // VCVTTPS2DQYrr 1365568U, // VCVTTPS2DQZrm 551818816U, // VCVTTPS2DQZrr 611904U, // VCVTTPS2DQrm 551818816U, // VCVTTPS2DQrr 1365867U, // VCVTTPS2UDQZrm 551819115U, // VCVTTPS2UDQZrr 552177563U, // VCVTTSD2SI64Zrm 551817115U, // VCVTTSD2SI64Zrr 552177563U, // VCVTTSD2SI64rm 551817115U, // VCVTTSD2SI64rr 552177563U, // VCVTTSD2SIZrm 551817115U, // VCVTTSD2SIZrr 552177563U, // VCVTTSD2SIrm 551817115U, // VCVTTSD2SIrr 552177609U, // VCVTTSD2USI64Zrm 551817161U, // VCVTTSD2USI64Zrr 552177609U, // VCVTTSD2USIZrm 551817161U, // VCVTTSD2USIZrr 552193970U, // VCVTTSS2SI64Zrm 551817138U, // VCVTTSS2SI64Zrr 552193970U, // VCVTTSS2SI64rm 551817138U, // VCVTTSS2SI64rr 552193970U, // VCVTTSS2SIZrm 551817138U, // VCVTTSS2SIZrr 552193970U, // VCVTTSS2SIrm 551817138U, // VCVTTSS2SIrr 552194018U, // VCVTTSS2USI64Zrm 551817186U, // VCVTTSS2USI64Zrr 552194018U, // VCVTTSS2USIZrm 551817186U, // VCVTTSS2USIZrr 1345507U, // VCVTUDQ2PDZrm 551815139U, // VCVTUDQ2PDZrr 1367469U, // VCVTUDQ2PSZrm 551820717U, // VCVTUDQ2PSZrr 1334701U, // VCVTUDQ2PSZrrb 283201725U, // VCVTUSI2SDZrm 811651261U, // VCVTUSI2SDZrr 283202373U, // VCVTUSI2SSZrm 811651909U, // VCVTUSI2SSZrr 283219771U, // VCVTUSI642SDZrm 811652923U, // VCVTUSI642SDZrr 283220548U, // VCVTUSI642SSZrm 811653700U, // VCVTUSI642SSZrr 812583618U, // VDIVPDYrm 811649730U, // VDIVPDYrr 811731650U, // VDIVPDZ128rm 352471746U, // VDIVPDZ128rmb 2500807362U, // VDIVPDZ128rmbk 1427081922U, // VDIVPDZ128rmbkz 87018178U, // VDIVPDZ128rmk 571476674U, // VDIVPDZ128rmkz 811649730U, // VDIVPDZ128rr 2693810882U, // VDIVPDZ128rrk 571394754U, // VDIVPDZ128rrkz 812583618U, // VDIVPDZ256rm 356666050U, // VDIVPDZ256rmb 2505001666U, // VDIVPDZ256rmbk 1431276226U, // VDIVPDZ256rmbkz 87067330U, // VDIVPDZ256rmk 571525826U, // VDIVPDZ256rmkz 811649730U, // VDIVPDZ256rr 2693810882U, // VDIVPDZ256rrk 571394754U, // VDIVPDZ256rrkz 1116866U, // VDIVPDZrb 87116482U, // VDIVPDZrbk 359762626U, // VDIVPDZrbkz 812763842U, // VDIVPDZrm 360860354U, // VDIVPDZrmb 2509195970U, // VDIVPDZrmbk 1435470530U, // VDIVPDZrmbkz 87165634U, // VDIVPDZrmk 571624130U, // VDIVPDZrmkz 811649730U, // VDIVPDZrr 2693810882U, // VDIVPDZrrk 571394754U, // VDIVPDZrrkz 811731650U, // VDIVPDrm 811649730U, // VDIVPDrr 812589271U, // VDIVPSYrm 811655383U, // VDIVPSYrr 811737303U, // VDIVPSZ128rm 356688087U, // VDIVPSZ128rmb 2505220311U, // VDIVPSZ128rmbk 1431494871U, // VDIVPSZ128rmbkz 87023831U, // VDIVPSZ128rmk 571482327U, // VDIVPSZ128rmkz 811655383U, // VDIVPSZ128rr 2693816535U, // VDIVPSZ128rrk 571400407U, // VDIVPSZ128rrkz 812589271U, // VDIVPSZ256rm 360882391U, // VDIVPSZ256rmb 2509414615U, // VDIVPSZ256rmbk 1435689175U, // VDIVPSZ256rmbkz 87072983U, // VDIVPSZ256rmk 571531479U, // VDIVPSZ256rmkz 811655383U, // VDIVPSZ256rr 2693816535U, // VDIVPSZ256rrk 571400407U, // VDIVPSZ256rrkz 1122519U, // VDIVPSZrb 87122135U, // VDIVPSZrbk 359768279U, // VDIVPSZrbkz 812769495U, // VDIVPSZrm 362979543U, // VDIVPSZrmb 2511511767U, // VDIVPSZrmbk 1437786327U, // VDIVPSZrmbkz 87171287U, // VDIVPSZrmk 571629783U, // VDIVPSZrmkz 811655383U, // VDIVPSZrr 2693816535U, // VDIVPSZrrk 571400407U, // VDIVPSZrrkz 811737303U, // VDIVPSrm 811655383U, // VDIVPSrr 283266299U, // VDIVSDZrm 811732219U, // VDIVSDZrm_Int 87018747U, // VDIVSDZrm_Intk 571477243U, // VDIVSDZrm_Intkz 811650299U, // VDIVSDZrr 811650299U, // VDIVSDZrr_Int 2693811451U, // VDIVSDZrr_Intk 571395323U, // VDIVSDZrr_Intkz 1117435U, // VDIVSDZrrb 87117051U, // VDIVSDZrrbk 359763195U, // VDIVSDZrrbkz 283266299U, // VDIVSDrm 283266299U, // VDIVSDrm_Int 811650299U, // VDIVSDrr 811650299U, // VDIVSDrr_Int 283288238U, // VDIVSSZrm 811737774U, // VDIVSSZrm_Int 87024302U, // VDIVSSZrm_Intk 571482798U, // VDIVSSZrm_Intkz 811655854U, // VDIVSSZrr 811655854U, // VDIVSSZrr_Int 2693817006U, // VDIVSSZrr_Intk 571400878U, // VDIVSSZrr_Intkz 1122990U, // VDIVSSZrrb 87122606U, // VDIVSSZrrbk 359768750U, // VDIVSSZrrbkz 283288238U, // VDIVSSrm 283288238U, // VDIVSSrm_Int 811655854U, // VDIVSSrr 811655854U, // VDIVSSrr_Int 300272144U, // VDPPDrmi 302385680U, // VDPPDrri 113631212U, // VDPPSYrmi 302391276U, // VDPPSYrri 300277740U, // VDPPSrmi 302391276U, // VDPPSrri 220199U, // VERRm 23591U, // VERRr 222930U, // VERWm 26322U, // VERWr 116705231U, // VEXP2PDm 116705231U, // VEXP2PDmb 2693941199U, // VEXP2PDmbk 2693908431U, // VEXP2PDmbkz 2693941199U, // VEXP2PDmk 2693908431U, // VEXP2PDmkz 551815119U, // VEXP2PDr 551815119U, // VEXP2PDrb 2693711823U, // VEXP2PDrbk 2692794319U, // VEXP2PDrbkz 2693711823U, // VEXP2PDrk 2692794319U, // VEXP2PDrkz 116710809U, // VEXP2PSm 116710809U, // VEXP2PSmb 2693946777U, // VEXP2PSmbk 2693914009U, // VEXP2PSmbkz 2693946777U, // VEXP2PSmk 2693914009U, // VEXP2PSmkz 551820697U, // VEXP2PSr 551820697U, // VEXP2PSrb 2693717401U, // VEXP2PSrbk 2692799897U, // VEXP2PSrbkz 2693717401U, // VEXP2PSrk 2692799897U, // VEXP2PSrkz 2693794119U, // VEXPANDPDZ128rmk 2692876615U, // VEXPANDPDZ128rmkz 2693712199U, // VEXPANDPDZ128rrk 2692794695U, // VEXPANDPDZ128rrkz 2693843271U, // VEXPANDPDZ256rmk 2693728583U, // VEXPANDPDZ256rmkz 2693712199U, // VEXPANDPDZ256rrk 2692794695U, // VEXPANDPDZ256rrkz 2693941575U, // VEXPANDPDZrmk 2693908807U, // VEXPANDPDZrmkz 2693712199U, // VEXPANDPDZrrk 2692794695U, // VEXPANDPDZrrkz 2693799678U, // VEXPANDPSZ128rmk 2692882174U, // VEXPANDPSZ128rmkz 2693717758U, // VEXPANDPSZ128rrk 2692800254U, // VEXPANDPSZ128rrkz 2693848830U, // VEXPANDPSZ256rmk 2693734142U, // VEXPANDPSZ256rmkz 2693717758U, // VEXPANDPSZ256rrk 2692800254U, // VEXPANDPSZ256rrkz 2693947134U, // VEXPANDPSZrmk 2693914366U, // VEXPANDPSZrmkz 2693717758U, // VEXPANDPSZrrk 2692800254U, // VEXPANDPSZrrkz 3540320700U, // VEXTRACTF128mr 811942332U, // VEXTRACTF128rr 3540320527U, // VEXTRACTF32x4rm 811942159U, // VEXTRACTF32x4rr 636109071U, // VEXTRACTF32x4rrk 570818831U, // VEXTRACTF32x4rrkz 3808756058U, // VEXTRACTF64x4rm 811942234U, // VEXTRACTF64x4rr 636109146U, // VEXTRACTF64x4rrk 570818906U, // VEXTRACTF64x4rrkz 50659827U, // VEXTRACTI128mr 811942387U, // VEXTRACTI128rr 50659628U, // VEXTRACTI32x4rm 811942188U, // VEXTRACTI32x4rr 636109100U, // VEXTRACTI32x4rrk 570818860U, // VEXTRACTI32x4rrkz 319095159U, // VEXTRACTI64x4rm 811942263U, // VEXTRACTI64x4rr 636109175U, // VEXTRACTI64x4rrk 570818935U, // VEXTRACTI64x4rrkz 3271893102U, // VEXTRACTPSmr 811950190U, // VEXTRACTPSrr 3271893102U, // VEXTRACTPSzmr 811950190U, // VEXTRACTPSzrr 571475859U, // VFMADD132PDZ128m 1427081107U, // VFMADD132PDZ128mb 571525011U, // VFMADD132PDZ256m 1431275411U, // VFMADD132PDZ256mb 571623315U, // VFMADD132PDZm 1435469715U, // VFMADD132PDZmb 571481415U, // VFMADD132PSZ128m 1431493959U, // VFMADD132PSZ128mb 571530567U, // VFMADD132PSZ256m 1435688263U, // VFMADD132PSZ256mb 571628871U, // VFMADD132PSZm 1437785415U, // VFMADD132PSZmb 301156650U, // VFMADDPD4mr 101927210U, // VFMADDPD4mrY 303040810U, // VFMADDPD4rm 303089962U, // VFMADDPD4rmY 302958890U, // VFMADDPD4rr 302958890U, // VFMADDPD4rrY 302958890U, // VFMADDPD4rrY_REV 302958890U, // VFMADDPD4rr_REV 571476032U, // VFMADDPDZ128v213rm 1427081280U, // VFMADDPDZ128v213rmb 2500806720U, // VFMADDPDZ128v213rmbk 2500806720U, // VFMADDPDZ128v213rmbkz 87017536U, // VFMADDPDZ128v213rmk 118474816U, // VFMADDPDZ128v213rmkz 571394112U, // VFMADDPDZ128v213rr 2693810240U, // VFMADDPDZ128v213rrk 2693810240U, // VFMADDPDZ128v213rrkz 571475773U, // VFMADDPDZ128v231rm 1427081021U, // VFMADDPDZ128v231rmb 2500806461U, // VFMADDPDZ128v231rmbk 2500806461U, // VFMADDPDZ128v231rmbkz 87017277U, // VFMADDPDZ128v231rmk 118474557U, // VFMADDPDZ128v231rmkz 571393853U, // VFMADDPDZ128v231rr 2693809981U, // VFMADDPDZ128v231rrk 2693809981U, // VFMADDPDZ128v231rrkz 571525184U, // VFMADDPDZ256v213rm 1431275584U, // VFMADDPDZ256v213rmb 2505001024U, // VFMADDPDZ256v213rmbk 2505001024U, // VFMADDPDZ256v213rmbkz 87066688U, // VFMADDPDZ256v213rmk 118523968U, // VFMADDPDZ256v213rmkz 571394112U, // VFMADDPDZ256v213rr 2693810240U, // VFMADDPDZ256v213rrk 2693810240U, // VFMADDPDZ256v213rrkz 571524925U, // VFMADDPDZ256v231rm 1431275325U, // VFMADDPDZ256v231rmb 2505000765U, // VFMADDPDZ256v231rmbk 2505000765U, // VFMADDPDZ256v231rmbkz 87066429U, // VFMADDPDZ256v231rmk 118523709U, // VFMADDPDZ256v231rmkz 571393853U, // VFMADDPDZ256v231rr 2693809981U, // VFMADDPDZ256v231rrk 2693809981U, // VFMADDPDZ256v231rrkz 571623488U, // VFMADDPDZv213rm 1435469888U, // VFMADDPDZv213rmb 2509195328U, // VFMADDPDZv213rmbk 2509195328U, // VFMADDPDZv213rmbkz 87164992U, // VFMADDPDZv213rmk 118622272U, // VFMADDPDZv213rmkz 571394112U, // VFMADDPDZv213rr 116492352U, // VFMADDPDZv213rrb 87115840U, // VFMADDPDZv213rrbk 118573120U, // VFMADDPDZv213rrbkz 2693810240U, // VFMADDPDZv213rrk 2693810240U, // VFMADDPDZv213rrkz 571623229U, // VFMADDPDZv231rm 1435469629U, // VFMADDPDZv231rmb 2509195069U, // VFMADDPDZv231rmbk 2509195069U, // VFMADDPDZv231rmbkz 87164733U, // VFMADDPDZv231rmk 118622013U, // VFMADDPDZv231rmkz 571393853U, // VFMADDPDZv231rr 2693809981U, // VFMADDPDZv231rrk 2693809981U, // VFMADDPDZv231rrkz 571475859U, // VFMADDPDr132m 571525011U, // VFMADDPDr132mY 571393939U, // VFMADDPDr132r 571393939U, // VFMADDPDr132rY 571476032U, // VFMADDPDr213m 571525184U, // VFMADDPDr213mY 571394112U, // VFMADDPDr213r 571394112U, // VFMADDPDr213rY 571475773U, // VFMADDPDr231m 571524925U, // VFMADDPDr231mY 571393853U, // VFMADDPDr231r 571393853U, // VFMADDPDr231rY 301162209U, // VFMADDPS4mr 101932769U, // VFMADDPS4mrY 303046369U, // VFMADDPS4rm 303095521U, // VFMADDPS4rmY 302964449U, // VFMADDPS4rr 302964449U, // VFMADDPS4rrY 302964449U, // VFMADDPS4rrY_REV 302964449U, // VFMADDPS4rr_REV 571481599U, // VFMADDPSZ128v213rm 1431494143U, // VFMADDPSZ128v213rmb 2505219583U, // VFMADDPSZ128v213rmbk 2505219583U, // VFMADDPSZ128v213rmbkz 87023103U, // VFMADDPSZ128v213rmk 118480383U, // VFMADDPSZ128v213rmkz 571399679U, // VFMADDPSZ128v213rr 2693815807U, // VFMADDPSZ128v213rrk 2693815807U, // VFMADDPSZ128v213rrkz 571481329U, // VFMADDPSZ128v231rm 1431493873U, // VFMADDPSZ128v231rmb 2505219313U, // VFMADDPSZ128v231rmbk 2505219313U, // VFMADDPSZ128v231rmbkz 87022833U, // VFMADDPSZ128v231rmk 118480113U, // VFMADDPSZ128v231rmkz 571399409U, // VFMADDPSZ128v231rr 2693815537U, // VFMADDPSZ128v231rrk 2693815537U, // VFMADDPSZ128v231rrkz 571530751U, // VFMADDPSZ256v213rm 1435688447U, // VFMADDPSZ256v213rmb 2509413887U, // VFMADDPSZ256v213rmbk 2509413887U, // VFMADDPSZ256v213rmbkz 87072255U, // VFMADDPSZ256v213rmk 118529535U, // VFMADDPSZ256v213rmkz 571399679U, // VFMADDPSZ256v213rr 2693815807U, // VFMADDPSZ256v213rrk 2693815807U, // VFMADDPSZ256v213rrkz 571530481U, // VFMADDPSZ256v231rm 1435688177U, // VFMADDPSZ256v231rmb 2509413617U, // VFMADDPSZ256v231rmbk 2509413617U, // VFMADDPSZ256v231rmbkz 87071985U, // VFMADDPSZ256v231rmk 118529265U, // VFMADDPSZ256v231rmkz 571399409U, // VFMADDPSZ256v231rr 2693815537U, // VFMADDPSZ256v231rrk 2693815537U, // VFMADDPSZ256v231rrkz 571629055U, // VFMADDPSZv213rm 1437785599U, // VFMADDPSZv213rmb 2511511039U, // VFMADDPSZv213rmbk 2511511039U, // VFMADDPSZv213rmbkz 87170559U, // VFMADDPSZv213rmk 118627839U, // VFMADDPSZv213rmkz 571399679U, // VFMADDPSZv213rr 116497919U, // VFMADDPSZv213rrb 87121407U, // VFMADDPSZv213rrbk 118578687U, // VFMADDPSZv213rrbkz 2693815807U, // VFMADDPSZv213rrk 2693815807U, // VFMADDPSZv213rrkz 571628785U, // VFMADDPSZv231rm 1437785329U, // VFMADDPSZv231rmb 2511510769U, // VFMADDPSZv231rmbk 2511510769U, // VFMADDPSZv231rmbkz 87170289U, // VFMADDPSZv231rmk 118627569U, // VFMADDPSZv231rmkz 571399409U, // VFMADDPSZv231rr 2693815537U, // VFMADDPSZv231rrk 2693815537U, // VFMADDPSZv231rrkz 571481415U, // VFMADDPSr132m 571530567U, // VFMADDPSr132mY 571399495U, // VFMADDPSr132r 571399495U, // VFMADDPSr132rY 571481599U, // VFMADDPSr213m 571530751U, // VFMADDPSr213mY 571399679U, // VFMADDPSr213r 571399679U, // VFMADDPSr213rY 571481329U, // VFMADDPSr231m 571530481U, // VFMADDPSr231mY 571399409U, // VFMADDPSr231r 571399409U, // VFMADDPSr231rY 313740390U, // VFMADDSD4mr 313740390U, // VFMADDSD4mr_Int 1357876326U, // VFMADDSD4rm 1357876326U, // VFMADDSD4rm_Int 302959718U, // VFMADDSD4rr 302959718U, // VFMADDSD4rr_Int 302959718U, // VFMADDSD4rr_REV 571476986U, // VFMADDSDZm 571395066U, // VFMADDSDZr 1357876153U, // VFMADDSDr132m 571395001U, // VFMADDSDr132r 1357876218U, // VFMADDSDr213m 571395066U, // VFMADDSDr213r 1357876099U, // VFMADDSDr231m 571394947U, // VFMADDSDr231r 317940253U, // VFMADDSS4mr 317940253U, // VFMADDSS4mr_Int 1358094877U, // VFMADDSS4rm 1358094877U, // VFMADDSS4rm_Int 302965277U, // VFMADDSS4rr 302965277U, // VFMADDSS4rr_Int 302965277U, // VFMADDSS4rr_REV 571482553U, // VFMADDSSZm 571400633U, // VFMADDSSZr 1358094712U, // VFMADDSSr132m 571400568U, // VFMADDSSr132r 1358094777U, // VFMADDSSr213m 571400633U, // VFMADDSSr213r 1358094658U, // VFMADDSSr231m 571400514U, // VFMADDSSr231r 571475800U, // VFMADDSUB132PDZ128m 1427081048U, // VFMADDSUB132PDZ128mb 571524952U, // VFMADDSUB132PDZ256m 1431275352U, // VFMADDSUB132PDZ256mb 571623256U, // VFMADDSUB132PDZm 1435469656U, // VFMADDSUB132PDZmb 571481356U, // VFMADDSUB132PSZ128m 1431493900U, // VFMADDSUB132PSZ128mb 571530508U, // VFMADDSUB132PSZ256m 1435688204U, // VFMADDSUB132PSZ256mb 571628812U, // VFMADDSUB132PSZm 1437785356U, // VFMADDSUB132PSZmb 301156504U, // VFMADDSUBPD4mr 101927064U, // VFMADDSUBPD4mrY 303040664U, // VFMADDSUBPD4rm 303089816U, // VFMADDSUBPD4rmY 302958744U, // VFMADDSUBPD4rr 302958744U, // VFMADDSUBPD4rrY 302958744U, // VFMADDSUBPD4rrY_REV 302958744U, // VFMADDSUBPD4rr_REV 571475973U, // VFMADDSUBPDZ128v213rm 1427081221U, // VFMADDSUBPDZ128v213rmb 2500806661U, // VFMADDSUBPDZ128v213rmbk 2500806661U, // VFMADDSUBPDZ128v213rmbkz 87017477U, // VFMADDSUBPDZ128v213rmk 118474757U, // VFMADDSUBPDZ128v213rmkz 571394053U, // VFMADDSUBPDZ128v213rr 2693810181U, // VFMADDSUBPDZ128v213rrk 2693810181U, // VFMADDSUBPDZ128v213rrkz 571475714U, // VFMADDSUBPDZ128v231rm 1427080962U, // VFMADDSUBPDZ128v231rmb 2500806402U, // VFMADDSUBPDZ128v231rmbk 2500806402U, // VFMADDSUBPDZ128v231rmbkz 87017218U, // VFMADDSUBPDZ128v231rmk 118474498U, // VFMADDSUBPDZ128v231rmkz 571393794U, // VFMADDSUBPDZ128v231rr 2693809922U, // VFMADDSUBPDZ128v231rrk 2693809922U, // VFMADDSUBPDZ128v231rrkz 571525125U, // VFMADDSUBPDZ256v213rm 1431275525U, // VFMADDSUBPDZ256v213rmb 2505000965U, // VFMADDSUBPDZ256v213rmbk 2505000965U, // VFMADDSUBPDZ256v213rmbkz 87066629U, // VFMADDSUBPDZ256v213rmk 118523909U, // VFMADDSUBPDZ256v213rmkz 571394053U, // VFMADDSUBPDZ256v213rr 2693810181U, // VFMADDSUBPDZ256v213rrk 2693810181U, // VFMADDSUBPDZ256v213rrkz 571524866U, // VFMADDSUBPDZ256v231rm 1431275266U, // VFMADDSUBPDZ256v231rmb 2505000706U, // VFMADDSUBPDZ256v231rmbk 2505000706U, // VFMADDSUBPDZ256v231rmbkz 87066370U, // VFMADDSUBPDZ256v231rmk 118523650U, // VFMADDSUBPDZ256v231rmkz 571393794U, // VFMADDSUBPDZ256v231rr 2693809922U, // VFMADDSUBPDZ256v231rrk 2693809922U, // VFMADDSUBPDZ256v231rrkz 571623429U, // VFMADDSUBPDZv213rm 1435469829U, // VFMADDSUBPDZv213rmb 2509195269U, // VFMADDSUBPDZv213rmbk 2509195269U, // VFMADDSUBPDZv213rmbkz 87164933U, // VFMADDSUBPDZv213rmk 118622213U, // VFMADDSUBPDZv213rmkz 571394053U, // VFMADDSUBPDZv213rr 116492293U, // VFMADDSUBPDZv213rrb 87115781U, // VFMADDSUBPDZv213rrbk 118573061U, // VFMADDSUBPDZv213rrbkz 2693810181U, // VFMADDSUBPDZv213rrk 2693810181U, // VFMADDSUBPDZv213rrkz 571623170U, // VFMADDSUBPDZv231rm 1435469570U, // VFMADDSUBPDZv231rmb 2509195010U, // VFMADDSUBPDZv231rmbk 2509195010U, // VFMADDSUBPDZv231rmbkz 87164674U, // VFMADDSUBPDZv231rmk 118621954U, // VFMADDSUBPDZv231rmkz 571393794U, // VFMADDSUBPDZv231rr 2693809922U, // VFMADDSUBPDZv231rrk 2693809922U, // VFMADDSUBPDZv231rrkz 571475800U, // VFMADDSUBPDr132m 571524952U, // VFMADDSUBPDr132mY 571393880U, // VFMADDSUBPDr132r 571393880U, // VFMADDSUBPDr132rY 571475973U, // VFMADDSUBPDr213m 571525125U, // VFMADDSUBPDr213mY 571394053U, // VFMADDSUBPDr213r 571394053U, // VFMADDSUBPDr213rY 571475714U, // VFMADDSUBPDr231m 571524866U, // VFMADDSUBPDr231mY 571393794U, // VFMADDSUBPDr231r 571393794U, // VFMADDSUBPDr231rY 301162063U, // VFMADDSUBPS4mr 101932623U, // VFMADDSUBPS4mrY 303046223U, // VFMADDSUBPS4rm 303095375U, // VFMADDSUBPS4rmY 302964303U, // VFMADDSUBPS4rr 302964303U, // VFMADDSUBPS4rrY 302964303U, // VFMADDSUBPS4rrY_REV 302964303U, // VFMADDSUBPS4rr_REV 571481540U, // VFMADDSUBPSZ128v213rm 1431494084U, // VFMADDSUBPSZ128v213rmb 2505219524U, // VFMADDSUBPSZ128v213rmbk 2505219524U, // VFMADDSUBPSZ128v213rmbkz 87023044U, // VFMADDSUBPSZ128v213rmk 118480324U, // VFMADDSUBPSZ128v213rmkz 571399620U, // VFMADDSUBPSZ128v213rr 2693815748U, // VFMADDSUBPSZ128v213rrk 2693815748U, // VFMADDSUBPSZ128v213rrkz 571481270U, // VFMADDSUBPSZ128v231rm 1431493814U, // VFMADDSUBPSZ128v231rmb 2505219254U, // VFMADDSUBPSZ128v231rmbk 2505219254U, // VFMADDSUBPSZ128v231rmbkz 87022774U, // VFMADDSUBPSZ128v231rmk 118480054U, // VFMADDSUBPSZ128v231rmkz 571399350U, // VFMADDSUBPSZ128v231rr 2693815478U, // VFMADDSUBPSZ128v231rrk 2693815478U, // VFMADDSUBPSZ128v231rrkz 571530692U, // VFMADDSUBPSZ256v213rm 1435688388U, // VFMADDSUBPSZ256v213rmb 2509413828U, // VFMADDSUBPSZ256v213rmbk 2509413828U, // VFMADDSUBPSZ256v213rmbkz 87072196U, // VFMADDSUBPSZ256v213rmk 118529476U, // VFMADDSUBPSZ256v213rmkz 571399620U, // VFMADDSUBPSZ256v213rr 2693815748U, // VFMADDSUBPSZ256v213rrk 2693815748U, // VFMADDSUBPSZ256v213rrkz 571530422U, // VFMADDSUBPSZ256v231rm 1435688118U, // VFMADDSUBPSZ256v231rmb 2509413558U, // VFMADDSUBPSZ256v231rmbk 2509413558U, // VFMADDSUBPSZ256v231rmbkz 87071926U, // VFMADDSUBPSZ256v231rmk 118529206U, // VFMADDSUBPSZ256v231rmkz 571399350U, // VFMADDSUBPSZ256v231rr 2693815478U, // VFMADDSUBPSZ256v231rrk 2693815478U, // VFMADDSUBPSZ256v231rrkz 571628996U, // VFMADDSUBPSZv213rm 1437785540U, // VFMADDSUBPSZv213rmb 2511510980U, // VFMADDSUBPSZv213rmbk 2511510980U, // VFMADDSUBPSZv213rmbkz 87170500U, // VFMADDSUBPSZv213rmk 118627780U, // VFMADDSUBPSZv213rmkz 571399620U, // VFMADDSUBPSZv213rr 116497860U, // VFMADDSUBPSZv213rrb 87121348U, // VFMADDSUBPSZv213rrbk 118578628U, // VFMADDSUBPSZv213rrbkz 2693815748U, // VFMADDSUBPSZv213rrk 2693815748U, // VFMADDSUBPSZv213rrkz 571628726U, // VFMADDSUBPSZv231rm 1437785270U, // VFMADDSUBPSZv231rmb 2511510710U, // VFMADDSUBPSZv231rmbk 2511510710U, // VFMADDSUBPSZv231rmbkz 87170230U, // VFMADDSUBPSZv231rmk 118627510U, // VFMADDSUBPSZv231rmkz 571399350U, // VFMADDSUBPSZv231rr 2693815478U, // VFMADDSUBPSZv231rrk 2693815478U, // VFMADDSUBPSZv231rrkz 571481356U, // VFMADDSUBPSr132m 571530508U, // VFMADDSUBPSr132mY 571399436U, // VFMADDSUBPSr132r 571399436U, // VFMADDSUBPSr132rY 571481540U, // VFMADDSUBPSr213m 571530692U, // VFMADDSUBPSr213mY 571399620U, // VFMADDSUBPSr213r 571399620U, // VFMADDSUBPSr213rY 571481270U, // VFMADDSUBPSr231m 571530422U, // VFMADDSUBPSr231mY 571399350U, // VFMADDSUBPSr231r 571399350U, // VFMADDSUBPSr231rY 571475816U, // VFMSUB132PDZ128m 1427081064U, // VFMSUB132PDZ128mb 571524968U, // VFMSUB132PDZ256m 1431275368U, // VFMSUB132PDZ256mb 571623272U, // VFMSUB132PDZm 1435469672U, // VFMSUB132PDZmb 571481372U, // VFMSUB132PSZ128m 1431493916U, // VFMSUB132PSZ128mb 571530524U, // VFMSUB132PSZ256m 1435688220U, // VFMSUB132PSZ256mb 571628828U, // VFMSUB132PSZm 1437785372U, // VFMSUB132PSZmb 571475843U, // VFMSUBADD132PDZ128m 1427081091U, // VFMSUBADD132PDZ128mb 571524995U, // VFMSUBADD132PDZ256m 1431275395U, // VFMSUBADD132PDZ256mb 571623299U, // VFMSUBADD132PDZm 1435469699U, // VFMSUBADD132PDZmb 571481399U, // VFMSUBADD132PSZ128m 1431493943U, // VFMSUBADD132PSZ128mb 571530551U, // VFMSUBADD132PSZ256m 1435688247U, // VFMSUBADD132PSZ256mb 571628855U, // VFMSUBADD132PSZm 1437785399U, // VFMSUBADD132PSZmb 301156628U, // VFMSUBADDPD4mr 101927188U, // VFMSUBADDPD4mrY 303040788U, // VFMSUBADDPD4rm 303089940U, // VFMSUBADDPD4rmY 302958868U, // VFMSUBADDPD4rr 302958868U, // VFMSUBADDPD4rrY 302958868U, // VFMSUBADDPD4rrY_REV 302958868U, // VFMSUBADDPD4rr_REV 571476016U, // VFMSUBADDPDZ128v213rm 1427081264U, // VFMSUBADDPDZ128v213rmb 2500806704U, // VFMSUBADDPDZ128v213rmbk 2500806704U, // VFMSUBADDPDZ128v213rmbkz 87017520U, // VFMSUBADDPDZ128v213rmk 118474800U, // VFMSUBADDPDZ128v213rmkz 571394096U, // VFMSUBADDPDZ128v213rr 2693810224U, // VFMSUBADDPDZ128v213rrk 2693810224U, // VFMSUBADDPDZ128v213rrkz 571475757U, // VFMSUBADDPDZ128v231rm 1427081005U, // VFMSUBADDPDZ128v231rmb 2500806445U, // VFMSUBADDPDZ128v231rmbk 2500806445U, // VFMSUBADDPDZ128v231rmbkz 87017261U, // VFMSUBADDPDZ128v231rmk 118474541U, // VFMSUBADDPDZ128v231rmkz 571393837U, // VFMSUBADDPDZ128v231rr 2693809965U, // VFMSUBADDPDZ128v231rrk 2693809965U, // VFMSUBADDPDZ128v231rrkz 571525168U, // VFMSUBADDPDZ256v213rm 1431275568U, // VFMSUBADDPDZ256v213rmb 2505001008U, // VFMSUBADDPDZ256v213rmbk 2505001008U, // VFMSUBADDPDZ256v213rmbkz 87066672U, // VFMSUBADDPDZ256v213rmk 118523952U, // VFMSUBADDPDZ256v213rmkz 571394096U, // VFMSUBADDPDZ256v213rr 2693810224U, // VFMSUBADDPDZ256v213rrk 2693810224U, // VFMSUBADDPDZ256v213rrkz 571524909U, // VFMSUBADDPDZ256v231rm 1431275309U, // VFMSUBADDPDZ256v231rmb 2505000749U, // VFMSUBADDPDZ256v231rmbk 2505000749U, // VFMSUBADDPDZ256v231rmbkz 87066413U, // VFMSUBADDPDZ256v231rmk 118523693U, // VFMSUBADDPDZ256v231rmkz 571393837U, // VFMSUBADDPDZ256v231rr 2693809965U, // VFMSUBADDPDZ256v231rrk 2693809965U, // VFMSUBADDPDZ256v231rrkz 571623472U, // VFMSUBADDPDZv213rm 1435469872U, // VFMSUBADDPDZv213rmb 2509195312U, // VFMSUBADDPDZv213rmbk 2509195312U, // VFMSUBADDPDZv213rmbkz 87164976U, // VFMSUBADDPDZv213rmk 118622256U, // VFMSUBADDPDZv213rmkz 571394096U, // VFMSUBADDPDZv213rr 116492336U, // VFMSUBADDPDZv213rrb 87115824U, // VFMSUBADDPDZv213rrbk 118573104U, // VFMSUBADDPDZv213rrbkz 2693810224U, // VFMSUBADDPDZv213rrk 2693810224U, // VFMSUBADDPDZv213rrkz 571623213U, // VFMSUBADDPDZv231rm 1435469613U, // VFMSUBADDPDZv231rmb 2509195053U, // VFMSUBADDPDZv231rmbk 2509195053U, // VFMSUBADDPDZv231rmbkz 87164717U, // VFMSUBADDPDZv231rmk 118621997U, // VFMSUBADDPDZv231rmkz 571393837U, // VFMSUBADDPDZv231rr 2693809965U, // VFMSUBADDPDZv231rrk 2693809965U, // VFMSUBADDPDZv231rrkz 571475843U, // VFMSUBADDPDr132m 571524995U, // VFMSUBADDPDr132mY 571393923U, // VFMSUBADDPDr132r 571393923U, // VFMSUBADDPDr132rY 571476016U, // VFMSUBADDPDr213m 571525168U, // VFMSUBADDPDr213mY 571394096U, // VFMSUBADDPDr213r 571394096U, // VFMSUBADDPDr213rY 571475757U, // VFMSUBADDPDr231m 571524909U, // VFMSUBADDPDr231mY 571393837U, // VFMSUBADDPDr231r 571393837U, // VFMSUBADDPDr231rY 301162187U, // VFMSUBADDPS4mr 101932747U, // VFMSUBADDPS4mrY 303046347U, // VFMSUBADDPS4rm 303095499U, // VFMSUBADDPS4rmY 302964427U, // VFMSUBADDPS4rr 302964427U, // VFMSUBADDPS4rrY 302964427U, // VFMSUBADDPS4rrY_REV 302964427U, // VFMSUBADDPS4rr_REV 571481583U, // VFMSUBADDPSZ128v213rm 1431494127U, // VFMSUBADDPSZ128v213rmb 2505219567U, // VFMSUBADDPSZ128v213rmbk 2505219567U, // VFMSUBADDPSZ128v213rmbkz 87023087U, // VFMSUBADDPSZ128v213rmk 118480367U, // VFMSUBADDPSZ128v213rmkz 571399663U, // VFMSUBADDPSZ128v213rr 2693815791U, // VFMSUBADDPSZ128v213rrk 2693815791U, // VFMSUBADDPSZ128v213rrkz 571481313U, // VFMSUBADDPSZ128v231rm 1431493857U, // VFMSUBADDPSZ128v231rmb 2505219297U, // VFMSUBADDPSZ128v231rmbk 2505219297U, // VFMSUBADDPSZ128v231rmbkz 87022817U, // VFMSUBADDPSZ128v231rmk 118480097U, // VFMSUBADDPSZ128v231rmkz 571399393U, // VFMSUBADDPSZ128v231rr 2693815521U, // VFMSUBADDPSZ128v231rrk 2693815521U, // VFMSUBADDPSZ128v231rrkz 571530735U, // VFMSUBADDPSZ256v213rm 1435688431U, // VFMSUBADDPSZ256v213rmb 2509413871U, // VFMSUBADDPSZ256v213rmbk 2509413871U, // VFMSUBADDPSZ256v213rmbkz 87072239U, // VFMSUBADDPSZ256v213rmk 118529519U, // VFMSUBADDPSZ256v213rmkz 571399663U, // VFMSUBADDPSZ256v213rr 2693815791U, // VFMSUBADDPSZ256v213rrk 2693815791U, // VFMSUBADDPSZ256v213rrkz 571530465U, // VFMSUBADDPSZ256v231rm 1435688161U, // VFMSUBADDPSZ256v231rmb 2509413601U, // VFMSUBADDPSZ256v231rmbk 2509413601U, // VFMSUBADDPSZ256v231rmbkz 87071969U, // VFMSUBADDPSZ256v231rmk 118529249U, // VFMSUBADDPSZ256v231rmkz 571399393U, // VFMSUBADDPSZ256v231rr 2693815521U, // VFMSUBADDPSZ256v231rrk 2693815521U, // VFMSUBADDPSZ256v231rrkz 571629039U, // VFMSUBADDPSZv213rm 1437785583U, // VFMSUBADDPSZv213rmb 2511511023U, // VFMSUBADDPSZv213rmbk 2511511023U, // VFMSUBADDPSZv213rmbkz 87170543U, // VFMSUBADDPSZv213rmk 118627823U, // VFMSUBADDPSZv213rmkz 571399663U, // VFMSUBADDPSZv213rr 116497903U, // VFMSUBADDPSZv213rrb 87121391U, // VFMSUBADDPSZv213rrbk 118578671U, // VFMSUBADDPSZv213rrbkz 2693815791U, // VFMSUBADDPSZv213rrk 2693815791U, // VFMSUBADDPSZv213rrkz 571628769U, // VFMSUBADDPSZv231rm 1437785313U, // VFMSUBADDPSZv231rmb 2511510753U, // VFMSUBADDPSZv231rmbk 2511510753U, // VFMSUBADDPSZv231rmbkz 87170273U, // VFMSUBADDPSZv231rmk 118627553U, // VFMSUBADDPSZv231rmkz 571399393U, // VFMSUBADDPSZv231rr 2693815521U, // VFMSUBADDPSZv231rrk 2693815521U, // VFMSUBADDPSZv231rrkz 571481399U, // VFMSUBADDPSr132m 571530551U, // VFMSUBADDPSr132mY 571399479U, // VFMSUBADDPSr132r 571399479U, // VFMSUBADDPSr132rY 571481583U, // VFMSUBADDPSr213m 571530735U, // VFMSUBADDPSr213mY 571399663U, // VFMSUBADDPSr213r 571399663U, // VFMSUBADDPSr213rY 571481313U, // VFMSUBADDPSr231m 571530465U, // VFMSUBADDPSr231mY 571399393U, // VFMSUBADDPSr231r 571399393U, // VFMSUBADDPSr231rY 301156537U, // VFMSUBPD4mr 101927097U, // VFMSUBPD4mrY 303040697U, // VFMSUBPD4rm 303089849U, // VFMSUBPD4rmY 302958777U, // VFMSUBPD4rr 302958777U, // VFMSUBPD4rrY 302958777U, // VFMSUBPD4rrY_REV 302958777U, // VFMSUBPD4rr_REV 571475989U, // VFMSUBPDZ128v213rm 1427081237U, // VFMSUBPDZ128v213rmb 2500806677U, // VFMSUBPDZ128v213rmbk 2500806677U, // VFMSUBPDZ128v213rmbkz 87017493U, // VFMSUBPDZ128v213rmk 118474773U, // VFMSUBPDZ128v213rmkz 571394069U, // VFMSUBPDZ128v213rr 2693810197U, // VFMSUBPDZ128v213rrk 2693810197U, // VFMSUBPDZ128v213rrkz 571475730U, // VFMSUBPDZ128v231rm 1427080978U, // VFMSUBPDZ128v231rmb 2500806418U, // VFMSUBPDZ128v231rmbk 2500806418U, // VFMSUBPDZ128v231rmbkz 87017234U, // VFMSUBPDZ128v231rmk 118474514U, // VFMSUBPDZ128v231rmkz 571393810U, // VFMSUBPDZ128v231rr 2693809938U, // VFMSUBPDZ128v231rrk 2693809938U, // VFMSUBPDZ128v231rrkz 571525141U, // VFMSUBPDZ256v213rm 1431275541U, // VFMSUBPDZ256v213rmb 2505000981U, // VFMSUBPDZ256v213rmbk 2505000981U, // VFMSUBPDZ256v213rmbkz 87066645U, // VFMSUBPDZ256v213rmk 118523925U, // VFMSUBPDZ256v213rmkz 571394069U, // VFMSUBPDZ256v213rr 2693810197U, // VFMSUBPDZ256v213rrk 2693810197U, // VFMSUBPDZ256v213rrkz 571524882U, // VFMSUBPDZ256v231rm 1431275282U, // VFMSUBPDZ256v231rmb 2505000722U, // VFMSUBPDZ256v231rmbk 2505000722U, // VFMSUBPDZ256v231rmbkz 87066386U, // VFMSUBPDZ256v231rmk 118523666U, // VFMSUBPDZ256v231rmkz 571393810U, // VFMSUBPDZ256v231rr 2693809938U, // VFMSUBPDZ256v231rrk 2693809938U, // VFMSUBPDZ256v231rrkz 571623445U, // VFMSUBPDZv213rm 1435469845U, // VFMSUBPDZv213rmb 2509195285U, // VFMSUBPDZv213rmbk 2509195285U, // VFMSUBPDZv213rmbkz 87164949U, // VFMSUBPDZv213rmk 118622229U, // VFMSUBPDZv213rmkz 571394069U, // VFMSUBPDZv213rr 116492309U, // VFMSUBPDZv213rrb 87115797U, // VFMSUBPDZv213rrbk 118573077U, // VFMSUBPDZv213rrbkz 2693810197U, // VFMSUBPDZv213rrk 2693810197U, // VFMSUBPDZv213rrkz 571623186U, // VFMSUBPDZv231rm 1435469586U, // VFMSUBPDZv231rmb 2509195026U, // VFMSUBPDZv231rmbk 2509195026U, // VFMSUBPDZv231rmbkz 87164690U, // VFMSUBPDZv231rmk 118621970U, // VFMSUBPDZv231rmkz 571393810U, // VFMSUBPDZv231rr 2693809938U, // VFMSUBPDZv231rrk 2693809938U, // VFMSUBPDZv231rrkz 571475816U, // VFMSUBPDr132m 571524968U, // VFMSUBPDr132mY 571393896U, // VFMSUBPDr132r 571393896U, // VFMSUBPDr132rY 571475989U, // VFMSUBPDr213m 571525141U, // VFMSUBPDr213mY 571394069U, // VFMSUBPDr213r 571394069U, // VFMSUBPDr213rY 571475730U, // VFMSUBPDr231m 571524882U, // VFMSUBPDr231mY 571393810U, // VFMSUBPDr231r 571393810U, // VFMSUBPDr231rY 301162096U, // VFMSUBPS4mr 101932656U, // VFMSUBPS4mrY 303046256U, // VFMSUBPS4rm 303095408U, // VFMSUBPS4rmY 302964336U, // VFMSUBPS4rr 302964336U, // VFMSUBPS4rrY 302964336U, // VFMSUBPS4rrY_REV 302964336U, // VFMSUBPS4rr_REV 571481556U, // VFMSUBPSZ128v213rm 1431494100U, // VFMSUBPSZ128v213rmb 2505219540U, // VFMSUBPSZ128v213rmbk 2505219540U, // VFMSUBPSZ128v213rmbkz 87023060U, // VFMSUBPSZ128v213rmk 118480340U, // VFMSUBPSZ128v213rmkz 571399636U, // VFMSUBPSZ128v213rr 2693815764U, // VFMSUBPSZ128v213rrk 2693815764U, // VFMSUBPSZ128v213rrkz 571481286U, // VFMSUBPSZ128v231rm 1431493830U, // VFMSUBPSZ128v231rmb 2505219270U, // VFMSUBPSZ128v231rmbk 2505219270U, // VFMSUBPSZ128v231rmbkz 87022790U, // VFMSUBPSZ128v231rmk 118480070U, // VFMSUBPSZ128v231rmkz 571399366U, // VFMSUBPSZ128v231rr 2693815494U, // VFMSUBPSZ128v231rrk 2693815494U, // VFMSUBPSZ128v231rrkz 571530708U, // VFMSUBPSZ256v213rm 1435688404U, // VFMSUBPSZ256v213rmb 2509413844U, // VFMSUBPSZ256v213rmbk 2509413844U, // VFMSUBPSZ256v213rmbkz 87072212U, // VFMSUBPSZ256v213rmk 118529492U, // VFMSUBPSZ256v213rmkz 571399636U, // VFMSUBPSZ256v213rr 2693815764U, // VFMSUBPSZ256v213rrk 2693815764U, // VFMSUBPSZ256v213rrkz 571530438U, // VFMSUBPSZ256v231rm 1435688134U, // VFMSUBPSZ256v231rmb 2509413574U, // VFMSUBPSZ256v231rmbk 2509413574U, // VFMSUBPSZ256v231rmbkz 87071942U, // VFMSUBPSZ256v231rmk 118529222U, // VFMSUBPSZ256v231rmkz 571399366U, // VFMSUBPSZ256v231rr 2693815494U, // VFMSUBPSZ256v231rrk 2693815494U, // VFMSUBPSZ256v231rrkz 571629012U, // VFMSUBPSZv213rm 1437785556U, // VFMSUBPSZv213rmb 2511510996U, // VFMSUBPSZv213rmbk 2511510996U, // VFMSUBPSZv213rmbkz 87170516U, // VFMSUBPSZv213rmk 118627796U, // VFMSUBPSZv213rmkz 571399636U, // VFMSUBPSZv213rr 116497876U, // VFMSUBPSZv213rrb 87121364U, // VFMSUBPSZv213rrbk 118578644U, // VFMSUBPSZv213rrbkz 2693815764U, // VFMSUBPSZv213rrk 2693815764U, // VFMSUBPSZv213rrkz 571628742U, // VFMSUBPSZv231rm 1437785286U, // VFMSUBPSZv231rmb 2511510726U, // VFMSUBPSZv231rmbk 2511510726U, // VFMSUBPSZv231rmbkz 87170246U, // VFMSUBPSZv231rmk 118627526U, // VFMSUBPSZv231rmkz 571399366U, // VFMSUBPSZv231rr 2693815494U, // VFMSUBPSZv231rrk 2693815494U, // VFMSUBPSZv231rrkz 571481372U, // VFMSUBPSr132m 571530524U, // VFMSUBPSr132mY 571399452U, // VFMSUBPSr132r 571399452U, // VFMSUBPSr132rY 571481556U, // VFMSUBPSr213m 571530708U, // VFMSUBPSr213mY 571399636U, // VFMSUBPSr213r 571399636U, // VFMSUBPSr213rY 571481286U, // VFMSUBPSr231m 571530438U, // VFMSUBPSr231mY 571399366U, // VFMSUBPSr231r 571399366U, // VFMSUBPSr231rY 313740361U, // VFMSUBSD4mr 313740361U, // VFMSUBSD4mr_Int 1357876297U, // VFMSUBSD4rm 1357876297U, // VFMSUBSD4rm_Int 302959689U, // VFMSUBSD4rr 302959689U, // VFMSUBSD4rr_Int 302959689U, // VFMSUBSD4rr_REV 571476959U, // VFMSUBSDZm 571395039U, // VFMSUBSDZr 1357876126U, // VFMSUBSDr132m 571394974U, // VFMSUBSDr132r 1357876191U, // VFMSUBSDr213m 571395039U, // VFMSUBSDr213r 1357876072U, // VFMSUBSDr231m 571394920U, // VFMSUBSDr231r 317940224U, // VFMSUBSS4mr 317940224U, // VFMSUBSS4mr_Int 1358094848U, // VFMSUBSS4rm 1358094848U, // VFMSUBSS4rm_Int 302965248U, // VFMSUBSS4rr 302965248U, // VFMSUBSS4rr_Int 302965248U, // VFMSUBSS4rr_REV 571482526U, // VFMSUBSSZm 571400606U, // VFMSUBSSZr 1358094685U, // VFMSUBSSr132m 571400541U, // VFMSUBSSr132r 1358094750U, // VFMSUBSSr213m 571400606U, // VFMSUBSSr213r 1358094631U, // VFMSUBSSr231m 571400487U, // VFMSUBSSr231r 571475872U, // VFNMADD132PDZ128m 1427081120U, // VFNMADD132PDZ128mb 571525024U, // VFNMADD132PDZ256m 1431275424U, // VFNMADD132PDZ256mb 571623328U, // VFNMADD132PDZm 1435469728U, // VFNMADD132PDZmb 571481428U, // VFNMADD132PSZ128m 1431493972U, // VFNMADD132PSZ128mb 571530580U, // VFNMADD132PSZ256m 1435688276U, // VFNMADD132PSZ256mb 571628884U, // VFNMADD132PSZm 1437785428U, // VFNMADD132PSZmb 301156660U, // VFNMADDPD4mr 101927220U, // VFNMADDPD4mrY 303040820U, // VFNMADDPD4rm 303089972U, // VFNMADDPD4rmY 302958900U, // VFNMADDPD4rr 302958900U, // VFNMADDPD4rrY 302958900U, // VFNMADDPD4rrY_REV 302958900U, // VFNMADDPD4rr_REV 571476045U, // VFNMADDPDZ128v213rm 1427081293U, // VFNMADDPDZ128v213rmb 2500806733U, // VFNMADDPDZ128v213rmbk 2500806733U, // VFNMADDPDZ128v213rmbkz 87017549U, // VFNMADDPDZ128v213rmk 118474829U, // VFNMADDPDZ128v213rmkz 571394125U, // VFNMADDPDZ128v213rr 2693810253U, // VFNMADDPDZ128v213rrk 2693810253U, // VFNMADDPDZ128v213rrkz 571475786U, // VFNMADDPDZ128v231rm 1427081034U, // VFNMADDPDZ128v231rmb 2500806474U, // VFNMADDPDZ128v231rmbk 2500806474U, // VFNMADDPDZ128v231rmbkz 87017290U, // VFNMADDPDZ128v231rmk 118474570U, // VFNMADDPDZ128v231rmkz 571393866U, // VFNMADDPDZ128v231rr 2693809994U, // VFNMADDPDZ128v231rrk 2693809994U, // VFNMADDPDZ128v231rrkz 571525197U, // VFNMADDPDZ256v213rm 1431275597U, // VFNMADDPDZ256v213rmb 2505001037U, // VFNMADDPDZ256v213rmbk 2505001037U, // VFNMADDPDZ256v213rmbkz 87066701U, // VFNMADDPDZ256v213rmk 118523981U, // VFNMADDPDZ256v213rmkz 571394125U, // VFNMADDPDZ256v213rr 2693810253U, // VFNMADDPDZ256v213rrk 2693810253U, // VFNMADDPDZ256v213rrkz 571524938U, // VFNMADDPDZ256v231rm 1431275338U, // VFNMADDPDZ256v231rmb 2505000778U, // VFNMADDPDZ256v231rmbk 2505000778U, // VFNMADDPDZ256v231rmbkz 87066442U, // VFNMADDPDZ256v231rmk 118523722U, // VFNMADDPDZ256v231rmkz 571393866U, // VFNMADDPDZ256v231rr 2693809994U, // VFNMADDPDZ256v231rrk 2693809994U, // VFNMADDPDZ256v231rrkz 571623501U, // VFNMADDPDZv213rm 1435469901U, // VFNMADDPDZv213rmb 2509195341U, // VFNMADDPDZv213rmbk 2509195341U, // VFNMADDPDZv213rmbkz 87165005U, // VFNMADDPDZv213rmk 118622285U, // VFNMADDPDZv213rmkz 571394125U, // VFNMADDPDZv213rr 116492365U, // VFNMADDPDZv213rrb 87115853U, // VFNMADDPDZv213rrbk 118573133U, // VFNMADDPDZv213rrbkz 2693810253U, // VFNMADDPDZv213rrk 2693810253U, // VFNMADDPDZv213rrkz 571623242U, // VFNMADDPDZv231rm 1435469642U, // VFNMADDPDZv231rmb 2509195082U, // VFNMADDPDZv231rmbk 2509195082U, // VFNMADDPDZv231rmbkz 87164746U, // VFNMADDPDZv231rmk 118622026U, // VFNMADDPDZv231rmkz 571393866U, // VFNMADDPDZv231rr 2693809994U, // VFNMADDPDZv231rrk 2693809994U, // VFNMADDPDZv231rrkz 571475872U, // VFNMADDPDr132m 571525024U, // VFNMADDPDr132mY 571393952U, // VFNMADDPDr132r 571393952U, // VFNMADDPDr132rY 571476045U, // VFNMADDPDr213m 571525197U, // VFNMADDPDr213mY 571394125U, // VFNMADDPDr213r 571394125U, // VFNMADDPDr213rY 571475786U, // VFNMADDPDr231m 571524938U, // VFNMADDPDr231mY 571393866U, // VFNMADDPDr231r 571393866U, // VFNMADDPDr231rY 301162219U, // VFNMADDPS4mr 101932779U, // VFNMADDPS4mrY 303046379U, // VFNMADDPS4rm 303095531U, // VFNMADDPS4rmY 302964459U, // VFNMADDPS4rr 302964459U, // VFNMADDPS4rrY 302964459U, // VFNMADDPS4rrY_REV 302964459U, // VFNMADDPS4rr_REV 571481612U, // VFNMADDPSZ128v213rm 1431494156U, // VFNMADDPSZ128v213rmb 2505219596U, // VFNMADDPSZ128v213rmbk 2505219596U, // VFNMADDPSZ128v213rmbkz 87023116U, // VFNMADDPSZ128v213rmk 118480396U, // VFNMADDPSZ128v213rmkz 571399692U, // VFNMADDPSZ128v213rr 2693815820U, // VFNMADDPSZ128v213rrk 2693815820U, // VFNMADDPSZ128v213rrkz 571481342U, // VFNMADDPSZ128v231rm 1431493886U, // VFNMADDPSZ128v231rmb 2505219326U, // VFNMADDPSZ128v231rmbk 2505219326U, // VFNMADDPSZ128v231rmbkz 87022846U, // VFNMADDPSZ128v231rmk 118480126U, // VFNMADDPSZ128v231rmkz 571399422U, // VFNMADDPSZ128v231rr 2693815550U, // VFNMADDPSZ128v231rrk 2693815550U, // VFNMADDPSZ128v231rrkz 571530764U, // VFNMADDPSZ256v213rm 1435688460U, // VFNMADDPSZ256v213rmb 2509413900U, // VFNMADDPSZ256v213rmbk 2509413900U, // VFNMADDPSZ256v213rmbkz 87072268U, // VFNMADDPSZ256v213rmk 118529548U, // VFNMADDPSZ256v213rmkz 571399692U, // VFNMADDPSZ256v213rr 2693815820U, // VFNMADDPSZ256v213rrk 2693815820U, // VFNMADDPSZ256v213rrkz 571530494U, // VFNMADDPSZ256v231rm 1435688190U, // VFNMADDPSZ256v231rmb 2509413630U, // VFNMADDPSZ256v231rmbk 2509413630U, // VFNMADDPSZ256v231rmbkz 87071998U, // VFNMADDPSZ256v231rmk 118529278U, // VFNMADDPSZ256v231rmkz 571399422U, // VFNMADDPSZ256v231rr 2693815550U, // VFNMADDPSZ256v231rrk 2693815550U, // VFNMADDPSZ256v231rrkz 571629068U, // VFNMADDPSZv213rm 1437785612U, // VFNMADDPSZv213rmb 2511511052U, // VFNMADDPSZv213rmbk 2511511052U, // VFNMADDPSZv213rmbkz 87170572U, // VFNMADDPSZv213rmk 118627852U, // VFNMADDPSZv213rmkz 571399692U, // VFNMADDPSZv213rr 116497932U, // VFNMADDPSZv213rrb 87121420U, // VFNMADDPSZv213rrbk 118578700U, // VFNMADDPSZv213rrbkz 2693815820U, // VFNMADDPSZv213rrk 2693815820U, // VFNMADDPSZv213rrkz 571628798U, // VFNMADDPSZv231rm 1437785342U, // VFNMADDPSZv231rmb 2511510782U, // VFNMADDPSZv231rmbk 2511510782U, // VFNMADDPSZv231rmbkz 87170302U, // VFNMADDPSZv231rmk 118627582U, // VFNMADDPSZv231rmkz 571399422U, // VFNMADDPSZv231rr 2693815550U, // VFNMADDPSZv231rrk 2693815550U, // VFNMADDPSZv231rrkz 571481428U, // VFNMADDPSr132m 571530580U, // VFNMADDPSr132mY 571399508U, // VFNMADDPSr132r 571399508U, // VFNMADDPSr132rY 571481612U, // VFNMADDPSr213m 571530764U, // VFNMADDPSr213mY 571399692U, // VFNMADDPSr213r 571399692U, // VFNMADDPSr213rY 571481342U, // VFNMADDPSr231m 571530494U, // VFNMADDPSr231mY 571399422U, // VFNMADDPSr231r 571399422U, // VFNMADDPSr231rY 313740400U, // VFNMADDSD4mr 313740400U, // VFNMADDSD4mr_Int 1357876336U, // VFNMADDSD4rm 1357876336U, // VFNMADDSD4rm_Int 302959728U, // VFNMADDSD4rr 302959728U, // VFNMADDSD4rr_Int 302959728U, // VFNMADDSD4rr_REV 571476999U, // VFNMADDSDZm 571395079U, // VFNMADDSDZr 1357876166U, // VFNMADDSDr132m 571395014U, // VFNMADDSDr132r 1357876231U, // VFNMADDSDr213m 571395079U, // VFNMADDSDr213r 1357876112U, // VFNMADDSDr231m 571394960U, // VFNMADDSDr231r 317940263U, // VFNMADDSS4mr 317940263U, // VFNMADDSS4mr_Int 1358094887U, // VFNMADDSS4rm 1358094887U, // VFNMADDSS4rm_Int 302965287U, // VFNMADDSS4rr 302965287U, // VFNMADDSS4rr_Int 302965287U, // VFNMADDSS4rr_REV 571482566U, // VFNMADDSSZm 571400646U, // VFNMADDSSZr 1358094725U, // VFNMADDSSr132m 571400581U, // VFNMADDSSr132r 1358094790U, // VFNMADDSSr213m 571400646U, // VFNMADDSSr213r 1358094671U, // VFNMADDSSr231m 571400527U, // VFNMADDSSr231r 571475829U, // VFNMSUB132PDZ128m 1427081077U, // VFNMSUB132PDZ128mb 571524981U, // VFNMSUB132PDZ256m 1431275381U, // VFNMSUB132PDZ256mb 571623285U, // VFNMSUB132PDZm 1435469685U, // VFNMSUB132PDZmb 571481385U, // VFNMSUB132PSZ128m 1431493929U, // VFNMSUB132PSZ128mb 571530537U, // VFNMSUB132PSZ256m 1435688233U, // VFNMSUB132PSZ256mb 571628841U, // VFNMSUB132PSZm 1437785385U, // VFNMSUB132PSZmb 301156547U, // VFNMSUBPD4mr 101927107U, // VFNMSUBPD4mrY 303040707U, // VFNMSUBPD4rm 303089859U, // VFNMSUBPD4rmY 302958787U, // VFNMSUBPD4rr 302958787U, // VFNMSUBPD4rrY 302958787U, // VFNMSUBPD4rrY_REV 302958787U, // VFNMSUBPD4rr_REV 571476002U, // VFNMSUBPDZ128v213rm 1427081250U, // VFNMSUBPDZ128v213rmb 2500806690U, // VFNMSUBPDZ128v213rmbk 2500806690U, // VFNMSUBPDZ128v213rmbkz 87017506U, // VFNMSUBPDZ128v213rmk 118474786U, // VFNMSUBPDZ128v213rmkz 571394082U, // VFNMSUBPDZ128v213rr 2693810210U, // VFNMSUBPDZ128v213rrk 2693810210U, // VFNMSUBPDZ128v213rrkz 571475743U, // VFNMSUBPDZ128v231rm 1427080991U, // VFNMSUBPDZ128v231rmb 2500806431U, // VFNMSUBPDZ128v231rmbk 2500806431U, // VFNMSUBPDZ128v231rmbkz 87017247U, // VFNMSUBPDZ128v231rmk 118474527U, // VFNMSUBPDZ128v231rmkz 571393823U, // VFNMSUBPDZ128v231rr 2693809951U, // VFNMSUBPDZ128v231rrk 2693809951U, // VFNMSUBPDZ128v231rrkz 571525154U, // VFNMSUBPDZ256v213rm 1431275554U, // VFNMSUBPDZ256v213rmb 2505000994U, // VFNMSUBPDZ256v213rmbk 2505000994U, // VFNMSUBPDZ256v213rmbkz 87066658U, // VFNMSUBPDZ256v213rmk 118523938U, // VFNMSUBPDZ256v213rmkz 571394082U, // VFNMSUBPDZ256v213rr 2693810210U, // VFNMSUBPDZ256v213rrk 2693810210U, // VFNMSUBPDZ256v213rrkz 571524895U, // VFNMSUBPDZ256v231rm 1431275295U, // VFNMSUBPDZ256v231rmb 2505000735U, // VFNMSUBPDZ256v231rmbk 2505000735U, // VFNMSUBPDZ256v231rmbkz 87066399U, // VFNMSUBPDZ256v231rmk 118523679U, // VFNMSUBPDZ256v231rmkz 571393823U, // VFNMSUBPDZ256v231rr 2693809951U, // VFNMSUBPDZ256v231rrk 2693809951U, // VFNMSUBPDZ256v231rrkz 571623458U, // VFNMSUBPDZv213rm 1435469858U, // VFNMSUBPDZv213rmb 2509195298U, // VFNMSUBPDZv213rmbk 2509195298U, // VFNMSUBPDZv213rmbkz 87164962U, // VFNMSUBPDZv213rmk 118622242U, // VFNMSUBPDZv213rmkz 571394082U, // VFNMSUBPDZv213rr 116492322U, // VFNMSUBPDZv213rrb 87115810U, // VFNMSUBPDZv213rrbk 118573090U, // VFNMSUBPDZv213rrbkz 2693810210U, // VFNMSUBPDZv213rrk 2693810210U, // VFNMSUBPDZv213rrkz 571623199U, // VFNMSUBPDZv231rm 1435469599U, // VFNMSUBPDZv231rmb 2509195039U, // VFNMSUBPDZv231rmbk 2509195039U, // VFNMSUBPDZv231rmbkz 87164703U, // VFNMSUBPDZv231rmk 118621983U, // VFNMSUBPDZv231rmkz 571393823U, // VFNMSUBPDZv231rr 2693809951U, // VFNMSUBPDZv231rrk 2693809951U, // VFNMSUBPDZv231rrkz 571475829U, // VFNMSUBPDr132m 571524981U, // VFNMSUBPDr132mY 571393909U, // VFNMSUBPDr132r 571393909U, // VFNMSUBPDr132rY 571476002U, // VFNMSUBPDr213m 571525154U, // VFNMSUBPDr213mY 571394082U, // VFNMSUBPDr213r 571394082U, // VFNMSUBPDr213rY 571475743U, // VFNMSUBPDr231m 571524895U, // VFNMSUBPDr231mY 571393823U, // VFNMSUBPDr231r 571393823U, // VFNMSUBPDr231rY 301162106U, // VFNMSUBPS4mr 101932666U, // VFNMSUBPS4mrY 303046266U, // VFNMSUBPS4rm 303095418U, // VFNMSUBPS4rmY 302964346U, // VFNMSUBPS4rr 302964346U, // VFNMSUBPS4rrY 302964346U, // VFNMSUBPS4rrY_REV 302964346U, // VFNMSUBPS4rr_REV 571481569U, // VFNMSUBPSZ128v213rm 1431494113U, // VFNMSUBPSZ128v213rmb 2505219553U, // VFNMSUBPSZ128v213rmbk 2505219553U, // VFNMSUBPSZ128v213rmbkz 87023073U, // VFNMSUBPSZ128v213rmk 118480353U, // VFNMSUBPSZ128v213rmkz 571399649U, // VFNMSUBPSZ128v213rr 2693815777U, // VFNMSUBPSZ128v213rrk 2693815777U, // VFNMSUBPSZ128v213rrkz 571481299U, // VFNMSUBPSZ128v231rm 1431493843U, // VFNMSUBPSZ128v231rmb 2505219283U, // VFNMSUBPSZ128v231rmbk 2505219283U, // VFNMSUBPSZ128v231rmbkz 87022803U, // VFNMSUBPSZ128v231rmk 118480083U, // VFNMSUBPSZ128v231rmkz 571399379U, // VFNMSUBPSZ128v231rr 2693815507U, // VFNMSUBPSZ128v231rrk 2693815507U, // VFNMSUBPSZ128v231rrkz 571530721U, // VFNMSUBPSZ256v213rm 1435688417U, // VFNMSUBPSZ256v213rmb 2509413857U, // VFNMSUBPSZ256v213rmbk 2509413857U, // VFNMSUBPSZ256v213rmbkz 87072225U, // VFNMSUBPSZ256v213rmk 118529505U, // VFNMSUBPSZ256v213rmkz 571399649U, // VFNMSUBPSZ256v213rr 2693815777U, // VFNMSUBPSZ256v213rrk 2693815777U, // VFNMSUBPSZ256v213rrkz 571530451U, // VFNMSUBPSZ256v231rm 1435688147U, // VFNMSUBPSZ256v231rmb 2509413587U, // VFNMSUBPSZ256v231rmbk 2509413587U, // VFNMSUBPSZ256v231rmbkz 87071955U, // VFNMSUBPSZ256v231rmk 118529235U, // VFNMSUBPSZ256v231rmkz 571399379U, // VFNMSUBPSZ256v231rr 2693815507U, // VFNMSUBPSZ256v231rrk 2693815507U, // VFNMSUBPSZ256v231rrkz 571629025U, // VFNMSUBPSZv213rm 1437785569U, // VFNMSUBPSZv213rmb 2511511009U, // VFNMSUBPSZv213rmbk 2511511009U, // VFNMSUBPSZv213rmbkz 87170529U, // VFNMSUBPSZv213rmk 118627809U, // VFNMSUBPSZv213rmkz 571399649U, // VFNMSUBPSZv213rr 116497889U, // VFNMSUBPSZv213rrb 87121377U, // VFNMSUBPSZv213rrbk 118578657U, // VFNMSUBPSZv213rrbkz 2693815777U, // VFNMSUBPSZv213rrk 2693815777U, // VFNMSUBPSZv213rrkz 571628755U, // VFNMSUBPSZv231rm 1437785299U, // VFNMSUBPSZv231rmb 2511510739U, // VFNMSUBPSZv231rmbk 2511510739U, // VFNMSUBPSZv231rmbkz 87170259U, // VFNMSUBPSZv231rmk 118627539U, // VFNMSUBPSZv231rmkz 571399379U, // VFNMSUBPSZv231rr 2693815507U, // VFNMSUBPSZv231rrk 2693815507U, // VFNMSUBPSZv231rrkz 571481385U, // VFNMSUBPSr132m 571530537U, // VFNMSUBPSr132mY 571399465U, // VFNMSUBPSr132r 571399465U, // VFNMSUBPSr132rY 571481569U, // VFNMSUBPSr213m 571530721U, // VFNMSUBPSr213mY 571399649U, // VFNMSUBPSr213r 571399649U, // VFNMSUBPSr213rY 571481299U, // VFNMSUBPSr231m 571530451U, // VFNMSUBPSr231mY 571399379U, // VFNMSUBPSr231r 571399379U, // VFNMSUBPSr231rY 313740371U, // VFNMSUBSD4mr 313740371U, // VFNMSUBSD4mr_Int 1357876307U, // VFNMSUBSD4rm 1357876307U, // VFNMSUBSD4rm_Int 302959699U, // VFNMSUBSD4rr 302959699U, // VFNMSUBSD4rr_Int 302959699U, // VFNMSUBSD4rr_REV 571476972U, // VFNMSUBSDZm 571395052U, // VFNMSUBSDZr 1357876139U, // VFNMSUBSDr132m 571394987U, // VFNMSUBSDr132r 1357876204U, // VFNMSUBSDr213m 571395052U, // VFNMSUBSDr213r 1357876085U, // VFNMSUBSDr231m 571394933U, // VFNMSUBSDr231r 317940234U, // VFNMSUBSS4mr 317940234U, // VFNMSUBSS4mr_Int 1358094858U, // VFNMSUBSS4rm 1358094858U, // VFNMSUBSS4rm_Int 302965258U, // VFNMSUBSS4rr 302965258U, // VFNMSUBSS4rr_Int 302965258U, // VFNMSUBSS4rr_REV 571482539U, // VFNMSUBSSZm 571400619U, // VFNMSUBSSZr 1358094698U, // VFNMSUBSSr132m 571400554U, // VFNMSUBSSr132r 1358094763U, // VFNMSUBSSr213m 571400619U, // VFNMSUBSSr213r 1358094644U, // VFNMSUBSSr231m 571400500U, // VFNMSUBSSr231r 608990U, // VFRCZPDrm 1346270U, // VFRCZPDrmY 551815902U, // VFRCZPDrr 551815902U, // VFRCZPDrrY 614643U, // VFRCZPSrm 1351923U, // VFRCZPSrmY 551821555U, // VFRCZPSrr 551821555U, // VFRCZPSrrY 552176924U, // VFRCZSDrm 551816476U, // VFRCZSDrr 552198854U, // VFRCZSSrm 551822022U, // VFRCZSSrr 811731455U, // VFsANDNPDrm 811649535U, // VFsANDNPDrr 811737043U, // VFsANDNPSrm 811655123U, // VFsANDNPSrr 811731282U, // VFsANDPDrm 811649362U, // VFsANDPDrr 811736841U, // VFsANDPSrm 811654921U, // VFsANDPSrr 811731574U, // VFsORPDrm 811649654U, // VFsORPDrr 811737170U, // VFsORPSrm 811655250U, // VFsORPSrr 811731581U, // VFsXORPDrm 811649661U, // VFsXORPDrr 811737177U, // VFsXORPSrm 811655257U, // VFsXORPSrr 811731455U, // VFvANDNPDrm 811649535U, // VFvANDNPDrr 811737043U, // VFvANDNPSrm 811655123U, // VFvANDNPSrr 811731282U, // VFvANDPDrm 811649362U, // VFvANDPDrr 811736841U, // VFvANDPSrm 811654921U, // VFvANDPSrr 811731574U, // VFvORPDrm 811649654U, // VFvORPDrr 811737170U, // VFvORPSrm 811655250U, // VFvORPSrr 811731581U, // VFvXORPDrm 811649661U, // VFvXORPDrr 811737177U, // VFvXORPSrm 811655257U, // VFvXORPSrr 926222702U, // VGATHERDPDYrm 552946030U, // VGATHERDPDZrm 926222702U, // VGATHERDPDrm 928325413U, // VGATHERDPSYrm 552967973U, // VGATHERDPSZrm 928325413U, // VGATHERDPSrm 627296470U, // VGATHERPF0DPDm 627302029U, // VGATHERPF0DPSm 627329567U, // VGATHERPF0QPDm 627335163U, // VGATHERPF0QPSm 627296501U, // VGATHERPF1DPDm 627302060U, // VGATHERPF1DPSm 627329598U, // VGATHERPF1QPDm 627335194U, // VGATHERPF1QPSm 926222941U, // VGATHERQPDYrm 552946269U, // VGATHERQPDZrm 926222941U, // VGATHERQPDrm 928325689U, // VGATHERQPSYrm 552951865U, // VGATHERQPSZrm 928325689U, // VGATHERQPSrm 812583201U, // VHADDPDYrm 811649313U, // VHADDPDYrr 811731233U, // VHADDPDrm 811649313U, // VHADDPDrr 812588760U, // VHADDPSYrm 811654872U, // VHADDPSYrr 811736792U, // VHADDPSrm 811654872U, // VHADDPSrr 812583088U, // VHSUBPDYrm 811649200U, // VHSUBPDYrr 811731120U, // VHSUBPDrm 811649200U, // VHSUBPDrr 812588647U, // VHSUBPSYrm 811654759U, // VHSUBPSYrr 811736679U, // VHSUBPSrm 811654759U, // VHSUBPSrr 300270026U, // VINSERTF128rm 302383562U, // VINSERTF128rr 300269854U, // VINSERTF32x4rm 302383390U, // VINSERTF32x4rr 101040664U, // VINSERTF32x8rm 302383640U, // VINSERTF32x8rr 300269714U, // VINSERTF64x2rm 302383250U, // VINSERTF64x2rr 101040489U, // VINSERTF64x4rm 302383465U, // VINSERTF64x4rr 342213121U, // VINSERTI128rm 302383617U, // VINSERTI128rr 342212923U, // VINSERTI32x4rm 302383419U, // VINSERTI32x4rr 113623590U, // VINSERTI32x8rm 302383654U, // VINSERTI32x8rr 342212768U, // VINSERTI64x2rm 302383264U, // VINSERTI64x2rr 113623430U, // VINSERTI64x4rm 302383494U, // VINSERTI64x4rr 317055108U, // VINSERTPSrm 302391428U, // VINSERTPSrr 317055108U, // VINSERTPSzrm 302391428U, // VINSERTPSzrr 1303430U, // VLDDQUYrm 320390U, // VLDDQUrm 236589U, // VLDMXCSR 551822222U, // VMASKMOVDQU 551822222U, // VMASKMOVDQU64 3808791242U, // VMASKMOVPDYmr 812583626U, // VMASKMOVPDYrm 3540355786U, // VMASKMOVPDmr 811731658U, // VMASKMOVPDrm 3808796895U, // VMASKMOVPSYmr 812589279U, // VMASKMOVPSYrm 3540361439U, // VMASKMOVPSmr 811737311U, // VMASKMOVPSrm 812583638U, // VMAXCPDYrm 811649750U, // VMAXCPDYrr 811731670U, // VMAXCPDrm 811649750U, // VMAXCPDrr 812589291U, // VMAXCPSYrm 811655403U, // VMAXCPSYrr 811737323U, // VMAXCPSrm 811655403U, // VMAXCPSrr 283266324U, // VMAXCSDrm 811650324U, // VMAXCSDrr 283288254U, // VMAXCSSrm 811655870U, // VMAXCSSrr 812583638U, // VMAXPDYrm 811649750U, // VMAXPDYrr 811731670U, // VMAXPDZ128rm 352471766U, // VMAXPDZ128rmb 2500807382U, // VMAXPDZ128rmbk 1427081942U, // VMAXPDZ128rmbkz 87018198U, // VMAXPDZ128rmk 571476694U, // VMAXPDZ128rmkz 811649750U, // VMAXPDZ128rr 2693810902U, // VMAXPDZ128rrk 571394774U, // VMAXPDZ128rrkz 812583638U, // VMAXPDZ256rm 356666070U, // VMAXPDZ256rmb 2505001686U, // VMAXPDZ256rmbk 1431276246U, // VMAXPDZ256rmbkz 87067350U, // VMAXPDZ256rmk 571525846U, // VMAXPDZ256rmkz 811649750U, // VMAXPDZ256rr 2693810902U, // VMAXPDZ256rrk 571394774U, // VMAXPDZ256rrkz 812763862U, // VMAXPDZrm 360860374U, // VMAXPDZrmb 2509195990U, // VMAXPDZrmbk 1435470550U, // VMAXPDZrmbkz 87165654U, // VMAXPDZrmk 571624150U, // VMAXPDZrmkz 811649750U, // VMAXPDZrr 2693810902U, // VMAXPDZrrk 571394774U, // VMAXPDZrrkz 811731670U, // VMAXPDrm 811649750U, // VMAXPDrr 812589291U, // VMAXPSYrm 811655403U, // VMAXPSYrr 811737323U, // VMAXPSZ128rm 356688107U, // VMAXPSZ128rmb 2505220331U, // VMAXPSZ128rmbk 1431494891U, // VMAXPSZ128rmbkz 87023851U, // VMAXPSZ128rmk 571482347U, // VMAXPSZ128rmkz 811655403U, // VMAXPSZ128rr 2693816555U, // VMAXPSZ128rrk 571400427U, // VMAXPSZ128rrkz 812589291U, // VMAXPSZ256rm 360882411U, // VMAXPSZ256rmb 2509414635U, // VMAXPSZ256rmbk 1435689195U, // VMAXPSZ256rmbkz 87073003U, // VMAXPSZ256rmk 571531499U, // VMAXPSZ256rmkz 811655403U, // VMAXPSZ256rr 2693816555U, // VMAXPSZ256rrk 571400427U, // VMAXPSZ256rrkz 812769515U, // VMAXPSZrm 362979563U, // VMAXPSZrmb 2511511787U, // VMAXPSZrmbk 1437786347U, // VMAXPSZrmbkz 87171307U, // VMAXPSZrmk 571629803U, // VMAXPSZrmkz 811655403U, // VMAXPSZrr 2693816555U, // VMAXPSZrrk 571400427U, // VMAXPSZrrkz 811737323U, // VMAXPSrm 811655403U, // VMAXPSrr 283266324U, // VMAXSDZrm 811732244U, // VMAXSDZrm_Int 87018772U, // VMAXSDZrm_Intk 571477268U, // VMAXSDZrm_Intkz 811650324U, // VMAXSDZrr 811650324U, // VMAXSDZrr_Int 2693811476U, // VMAXSDZrr_Intk 571395348U, // VMAXSDZrr_Intkz 811650324U, // VMAXSDZrrb 2693811476U, // VMAXSDZrrbk 571395348U, // VMAXSDZrrbkz 283266324U, // VMAXSDrm 283266324U, // VMAXSDrm_Int 811650324U, // VMAXSDrr 811650324U, // VMAXSDrr_Int 283288254U, // VMAXSSZrm 811737790U, // VMAXSSZrm_Int 87024318U, // VMAXSSZrm_Intk 571482814U, // VMAXSSZrm_Intkz 811655870U, // VMAXSSZrr 811655870U, // VMAXSSZrr_Int 2693817022U, // VMAXSSZrr_Intk 571400894U, // VMAXSSZrr_Intkz 811655870U, // VMAXSSZrrb 2693817022U, // VMAXSSZrrbk 571400894U, // VMAXSSZrrbkz 283288254U, // VMAXSSrm 283288254U, // VMAXSSrm_Int 811655870U, // VMAXSSrr 811655870U, // VMAXSSrr_Int 13111U, // VMCALL 433127U, // VMCLEARm 12823U, // VMFUNC 812583432U, // VMINCPDYrm 811649544U, // VMINCPDYrr 811731464U, // VMINCPDrm 811649544U, // VMINCPDrr 812589020U, // VMINCPSYrm 811655132U, // VMINCPSYrr 811737052U, // VMINCPSrm 811655132U, // VMINCPSrr 283266238U, // VMINCSDrm 811650238U, // VMINCSDrr 283288172U, // VMINCSSrm 811655788U, // VMINCSSrr 812583432U, // VMINPDYrm 811649544U, // VMINPDYrr 811731464U, // VMINPDZ128rm 352471560U, // VMINPDZ128rmb 2500807176U, // VMINPDZ128rmbk 1427081736U, // VMINPDZ128rmbkz 87017992U, // VMINPDZ128rmk 571476488U, // VMINPDZ128rmkz 811649544U, // VMINPDZ128rr 2693810696U, // VMINPDZ128rrk 571394568U, // VMINPDZ128rrkz 812583432U, // VMINPDZ256rm 356665864U, // VMINPDZ256rmb 2505001480U, // VMINPDZ256rmbk 1431276040U, // VMINPDZ256rmbkz 87067144U, // VMINPDZ256rmk 571525640U, // VMINPDZ256rmkz 811649544U, // VMINPDZ256rr 2693810696U, // VMINPDZ256rrk 571394568U, // VMINPDZ256rrkz 812763656U, // VMINPDZrm 360860168U, // VMINPDZrmb 2509195784U, // VMINPDZrmbk 1435470344U, // VMINPDZrmbkz 87165448U, // VMINPDZrmk 571623944U, // VMINPDZrmkz 811649544U, // VMINPDZrr 2693810696U, // VMINPDZrrk 571394568U, // VMINPDZrrkz 811731464U, // VMINPDrm 811649544U, // VMINPDrr 812589020U, // VMINPSYrm 811655132U, // VMINPSYrr 811737052U, // VMINPSZ128rm 356687836U, // VMINPSZ128rmb 2505220060U, // VMINPSZ128rmbk 1431494620U, // VMINPSZ128rmbkz 87023580U, // VMINPSZ128rmk 571482076U, // VMINPSZ128rmkz 811655132U, // VMINPSZ128rr 2693816284U, // VMINPSZ128rrk 571400156U, // VMINPSZ128rrkz 812589020U, // VMINPSZ256rm 360882140U, // VMINPSZ256rmb 2509414364U, // VMINPSZ256rmbk 1435688924U, // VMINPSZ256rmbkz 87072732U, // VMINPSZ256rmk 571531228U, // VMINPSZ256rmkz 811655132U, // VMINPSZ256rr 2693816284U, // VMINPSZ256rrk 571400156U, // VMINPSZ256rrkz 812769244U, // VMINPSZrm 362979292U, // VMINPSZrmb 2511511516U, // VMINPSZrmbk 1437786076U, // VMINPSZrmbkz 87171036U, // VMINPSZrmk 571629532U, // VMINPSZrmkz 811655132U, // VMINPSZrr 2693816284U, // VMINPSZrrk 571400156U, // VMINPSZrrkz 811737052U, // VMINPSrm 811655132U, // VMINPSrr 283266238U, // VMINSDZrm 811732158U, // VMINSDZrm_Int 87018686U, // VMINSDZrm_Intk 571477182U, // VMINSDZrm_Intkz 811650238U, // VMINSDZrr 811650238U, // VMINSDZrr_Int 2693811390U, // VMINSDZrr_Intk 571395262U, // VMINSDZrr_Intkz 811650238U, // VMINSDZrrb 2693811390U, // VMINSDZrrbk 571395262U, // VMINSDZrrbkz 283266238U, // VMINSDrm 283266238U, // VMINSDrm_Int 811650238U, // VMINSDrr 811650238U, // VMINSDrr_Int 283288172U, // VMINSSZrm 811737708U, // VMINSSZrm_Int 87024236U, // VMINSSZrm_Intk 571482732U, // VMINSSZrm_Intkz 811655788U, // VMINSSZrr 811655788U, // VMINSSZrr_Int 2693816940U, // VMINSSZrr_Intk 571400812U, // VMINSSZrr_Intkz 811655788U, // VMINSSZrrb 2693816940U, // VMINSSZrrbk 571400812U, // VMINSSZrrbkz 283288172U, // VMINSSrm 283288172U, // VMINSSrm_Int 811655788U, // VMINSSrr 811655788U, // VMINSSrr_Int 13011U, // VMLAUNCH 14008U, // VMLOAD32 14088U, // VMLOAD64 13103U, // VMMCALL 551820141U, // VMOV64toPQIZrr 551836525U, // VMOV64toPQIrm 551820141U, // VMOV64toPQIrr 551820141U, // VMOV64toSDZrr 551836525U, // VMOV64toSDrm 551820141U, // VMOV64toSDrr 109086855U, // VMOVAPDYmr 1345671U, // VMOVAPDYrm 551815303U, // VMOVAPDYrr 551815303U, // VMOVAPDYrr_REV 65046663U, // VMOVAPDZ128mr 2749728903U, // VMOVAPDZ128mrk 608391U, // VMOVAPDZ128rm 2693793927U, // VMOVAPDZ128rmk 2692876423U, // VMOVAPDZ128rmkz 551815303U, // VMOVAPDZ128rr 551815303U, // VMOVAPDZ128rr_alt 2693712007U, // VMOVAPDZ128rrk 2693712007U, // VMOVAPDZ128rrk_alt 2692794503U, // VMOVAPDZ128rrkz 2692794503U, // VMOVAPDZ128rrkz_alt 109086855U, // VMOVAPDZ256mr 2793769095U, // VMOVAPDZ256mrk 1345671U, // VMOVAPDZ256rm 2693843079U, // VMOVAPDZ256rmk 2693728391U, // VMOVAPDZ256rmkz 551815303U, // VMOVAPDZ256rr 551815303U, // VMOVAPDZ256rr_alt 2693712007U, // VMOVAPDZ256rrk 2693712007U, // VMOVAPDZ256rrk_alt 2692794503U, // VMOVAPDZ256rrkz 2692794503U, // VMOVAPDZ256rrkz_alt 111184007U, // VMOVAPDZmr 2795866247U, // VMOVAPDZmrk 1362055U, // VMOVAPDZrm 2693941383U, // VMOVAPDZrmk 2693908615U, // VMOVAPDZrmkz 551815303U, // VMOVAPDZrr 551815303U, // VMOVAPDZrr_alt 2693712007U, // VMOVAPDZrrk 2693712007U, // VMOVAPDZrrk_alt 2692794503U, // VMOVAPDZrrkz 2692794503U, // VMOVAPDZrrkz_alt 65046663U, // VMOVAPDmr 608391U, // VMOVAPDrm 551815303U, // VMOVAPDrr 551815303U, // VMOVAPDrr_REV 109092422U, // VMOVAPSYmr 1351238U, // VMOVAPSYrm 551820870U, // VMOVAPSYrr 551820870U, // VMOVAPSYrr_REV 65052230U, // VMOVAPSZ128mr 2749734470U, // VMOVAPSZ128mrk 613958U, // VMOVAPSZ128rm 2693799494U, // VMOVAPSZ128rmk 2692881990U, // VMOVAPSZ128rmkz 551820870U, // VMOVAPSZ128rr 551820870U, // VMOVAPSZ128rr_alt 2693717574U, // VMOVAPSZ128rrk 2693717574U, // VMOVAPSZ128rrk_alt 2692800070U, // VMOVAPSZ128rrkz 2692800070U, // VMOVAPSZ128rrkz_alt 109092422U, // VMOVAPSZ256mr 2793774662U, // VMOVAPSZ256mrk 1351238U, // VMOVAPSZ256rm 2693848646U, // VMOVAPSZ256rmk 2693733958U, // VMOVAPSZ256rmkz 551820870U, // VMOVAPSZ256rr 551820870U, // VMOVAPSZ256rr_alt 2693717574U, // VMOVAPSZ256rrk 2693717574U, // VMOVAPSZ256rrk_alt 2692800070U, // VMOVAPSZ256rrkz 2692800070U, // VMOVAPSZ256rrkz_alt 111189574U, // VMOVAPSZmr 2795871814U, // VMOVAPSZmrk 1367622U, // VMOVAPSZrm 2693946950U, // VMOVAPSZrmk 2693914182U, // VMOVAPSZrmkz 551820870U, // VMOVAPSZrr 551820870U, // VMOVAPSZrr_alt 2693717574U, // VMOVAPSZrrk 2693717574U, // VMOVAPSZrrk_alt 2692800070U, // VMOVAPSZrrkz 2692800070U, // VMOVAPSZrrkz_alt 65052230U, // VMOVAPSmr 613958U, // VMOVAPSrm 551820870U, // VMOVAPSrr 551820870U, // VMOVAPSrr_REV 1348898U, // VMOVDDUPYrm 551818530U, // VMOVDDUPYrr 1365282U, // VMOVDDUPZrm 551818530U, // VMOVDDUPZrr 552178978U, // VMOVDDUPrm 551818530U, // VMOVDDUPrr 551800248U, // VMOVDI2PDIZrm 551816632U, // VMOVDI2PDIZrr 551800248U, // VMOVDI2PDIrm 551816632U, // VMOVDI2PDIrr 551800248U, // VMOVDI2SSZrm 551816632U, // VMOVDI2SSZrr 551800248U, // VMOVDI2SSrm 551816632U, // VMOVDI2SSrr 67141699U, // VMOVDQA32Z128mr 2751823939U, // VMOVDQA32Z128mrk 311363U, // VMOVDQA32Z128rm 2694168643U, // VMOVDQA32Z128rmk 2693038147U, // VMOVDQA32Z128rmkz 551813187U, // VMOVDQA32Z128rr 551813187U, // VMOVDQA32Z128rr_alt 2693709891U, // VMOVDQA32Z128rrk 2693709891U, // VMOVDQA32Z128rrk_alt 2692792387U, // VMOVDQA32Z128rrkz 2692792387U, // VMOVDQA32Z128rrkz_alt 123764803U, // VMOVDQA32Z256mr 2808447043U, // VMOVDQA32Z256mrk 1294403U, // VMOVDQA32Z256rm 2694185027U, // VMOVDQA32Z256rmk 2694021187U, // VMOVDQA32Z256rmkz 551813187U, // VMOVDQA32Z256rr 551813187U, // VMOVDQA32Z256rr_alt 2693709891U, // VMOVDQA32Z256rrk 2693709891U, // VMOVDQA32Z256rrk_alt 2692792387U, // VMOVDQA32Z256rrkz 2692792387U, // VMOVDQA32Z256rrkz_alt 125861955U, // VMOVDQA32Zmr 2810544195U, // VMOVDQA32Zmrk 1310787U, // VMOVDQA32Zrm 2694201411U, // VMOVDQA32Zrmk 2694217795U, // VMOVDQA32Zrmkz 551813187U, // VMOVDQA32Zrr 551813187U, // VMOVDQA32Zrr_alt 2693709891U, // VMOVDQA32Zrrk 2693709891U, // VMOVDQA32Zrrk_alt 2692792387U, // VMOVDQA32Zrrkz 2692792387U, // VMOVDQA32Zrrkz_alt 67141806U, // VMOVDQA64Z128mr 2751824046U, // VMOVDQA64Z128mrk 311470U, // VMOVDQA64Z128rm 2694168750U, // VMOVDQA64Z128rmk 2693038254U, // VMOVDQA64Z128rmkz 551813294U, // VMOVDQA64Z128rr 551813294U, // VMOVDQA64Z128rr_alt 2693709998U, // VMOVDQA64Z128rrk 2693709998U, // VMOVDQA64Z128rrk_alt 2692792494U, // VMOVDQA64Z128rrkz 2692792494U, // VMOVDQA64Z128rrkz_alt 123764910U, // VMOVDQA64Z256mr 2808447150U, // VMOVDQA64Z256mrk 1294510U, // VMOVDQA64Z256rm 2694185134U, // VMOVDQA64Z256rmk 2694021294U, // VMOVDQA64Z256rmkz 551813294U, // VMOVDQA64Z256rr 551813294U, // VMOVDQA64Z256rr_alt 2693709998U, // VMOVDQA64Z256rrk 2693709998U, // VMOVDQA64Z256rrk_alt 2692792494U, // VMOVDQA64Z256rrkz 2692792494U, // VMOVDQA64Z256rrkz_alt 125862062U, // VMOVDQA64Zmr 2810544302U, // VMOVDQA64Zmrk 1310894U, // VMOVDQA64Zrm 2694201518U, // VMOVDQA64Zrmk 2694217902U, // VMOVDQA64Zrmkz 551813294U, // VMOVDQA64Zrr 551813294U, // VMOVDQA64Zrr_alt 2693709998U, // VMOVDQA64Zrrk 2693709998U, // VMOVDQA64Zrrk_alt 2692792494U, // VMOVDQA64Zrrkz 2692792494U, // VMOVDQA64Zrrkz_alt 123765315U, // VMOVDQAYmr 1294915U, // VMOVDQAYrm 551813699U, // VMOVDQAYrr 551813699U, // VMOVDQAYrr_REV 67142211U, // VMOVDQAmr 311875U, // VMOVDQArm 551813699U, // VMOVDQArr 551813699U, // VMOVDQArr_REV 67142053U, // VMOVDQU16Z128mr 2751824293U, // VMOVDQU16Z128mrk 311717U, // VMOVDQU16Z128rm 2694168997U, // VMOVDQU16Z128rmk 2693038501U, // VMOVDQU16Z128rmkz 551813541U, // VMOVDQU16Z128rr 551813541U, // VMOVDQU16Z128rr_alt 2693710245U, // VMOVDQU16Z128rrk 2693710245U, // VMOVDQU16Z128rrk_alt 2692792741U, // VMOVDQU16Z128rrkz 2692792741U, // VMOVDQU16Z128rrkz_alt 123765157U, // VMOVDQU16Z256mr 2808447397U, // VMOVDQU16Z256mrk 1294757U, // VMOVDQU16Z256rm 2694185381U, // VMOVDQU16Z256rmk 2694021541U, // VMOVDQU16Z256rmkz 551813541U, // VMOVDQU16Z256rr 551813541U, // VMOVDQU16Z256rr_alt 2693710245U, // VMOVDQU16Z256rrk 2693710245U, // VMOVDQU16Z256rrk_alt 2692792741U, // VMOVDQU16Z256rrkz 2692792741U, // VMOVDQU16Z256rrkz_alt 125862309U, // VMOVDQU16Zmr 2810544549U, // VMOVDQU16Zmrk 1311141U, // VMOVDQU16Zrm 2694201765U, // VMOVDQU16Zrmk 2694218149U, // VMOVDQU16Zrmkz 551813541U, // VMOVDQU16Zrr 551813541U, // VMOVDQU16Zrr_alt 2693710245U, // VMOVDQU16Zrrk 2693710245U, // VMOVDQU16Zrrk_alt 2692792741U, // VMOVDQU16Zrrkz 2692792741U, // VMOVDQU16Zrrkz_alt 67141710U, // VMOVDQU32Z128mr 2751823950U, // VMOVDQU32Z128mrk 311374U, // VMOVDQU32Z128rm 2694168654U, // VMOVDQU32Z128rmk 2693038158U, // VMOVDQU32Z128rmkz 551813198U, // VMOVDQU32Z128rr 551813198U, // VMOVDQU32Z128rr_alt 2693709902U, // VMOVDQU32Z128rrk 2693709902U, // VMOVDQU32Z128rrk_alt 2692792398U, // VMOVDQU32Z128rrkz 2692792398U, // VMOVDQU32Z128rrkz_alt 123764814U, // VMOVDQU32Z256mr 2808447054U, // VMOVDQU32Z256mrk 1294414U, // VMOVDQU32Z256rm 2694185038U, // VMOVDQU32Z256rmk 2694021198U, // VMOVDQU32Z256rmkz 551813198U, // VMOVDQU32Z256rr 551813198U, // VMOVDQU32Z256rr_alt 2693709902U, // VMOVDQU32Z256rrk 2693709902U, // VMOVDQU32Z256rrk_alt 2692792398U, // VMOVDQU32Z256rrkz 2692792398U, // VMOVDQU32Z256rrkz_alt 125861966U, // VMOVDQU32Zmr 2810544206U, // VMOVDQU32Zmrk 1310798U, // VMOVDQU32Zrm 2694201422U, // VMOVDQU32Zrmk 2694217806U, // VMOVDQU32Zrmkz 551813198U, // VMOVDQU32Zrr 551813198U, // VMOVDQU32Zrr_alt 2693709902U, // VMOVDQU32Zrrk 2693709902U, // VMOVDQU32Zrrk_alt 2692792398U, // VMOVDQU32Zrrkz 2692792398U, // VMOVDQU32Zrrkz_alt 67141881U, // VMOVDQU64Z128mr 2751824121U, // VMOVDQU64Z128mrk 311545U, // VMOVDQU64Z128rm 2694168825U, // VMOVDQU64Z128rmk 2693038329U, // VMOVDQU64Z128rmkz 551813369U, // VMOVDQU64Z128rr 551813369U, // VMOVDQU64Z128rr_alt 2693710073U, // VMOVDQU64Z128rrk 2693710073U, // VMOVDQU64Z128rrk_alt 2692792569U, // VMOVDQU64Z128rrkz 2692792569U, // VMOVDQU64Z128rrkz_alt 123764985U, // VMOVDQU64Z256mr 2808447225U, // VMOVDQU64Z256mrk 1294585U, // VMOVDQU64Z256rm 2694185209U, // VMOVDQU64Z256rmk 2694021369U, // VMOVDQU64Z256rmkz 551813369U, // VMOVDQU64Z256rr 551813369U, // VMOVDQU64Z256rr_alt 2693710073U, // VMOVDQU64Z256rrk 2693710073U, // VMOVDQU64Z256rrk_alt 2692792569U, // VMOVDQU64Z256rrkz 2692792569U, // VMOVDQU64Z256rrkz_alt 125862137U, // VMOVDQU64Zmr 2810544377U, // VMOVDQU64Zmrk 1310969U, // VMOVDQU64Zrm 2694201593U, // VMOVDQU64Zrmk 2694217977U, // VMOVDQU64Zrmkz 551813369U, // VMOVDQU64Zrr 551813369U, // VMOVDQU64Zrr_alt 2693710073U, // VMOVDQU64Zrrk 2693710073U, // VMOVDQU64Zrrk_alt 2692792569U, // VMOVDQU64Zrrkz 2692792569U, // VMOVDQU64Zrrkz_alt 67142158U, // VMOVDQU8Z128mr 2751824398U, // VMOVDQU8Z128mrk 311822U, // VMOVDQU8Z128rm 2694169102U, // VMOVDQU8Z128rmk 2693038606U, // VMOVDQU8Z128rmkz 551813646U, // VMOVDQU8Z128rr 551813646U, // VMOVDQU8Z128rr_alt 2693710350U, // VMOVDQU8Z128rrk 2693710350U, // VMOVDQU8Z128rrk_alt 2692792846U, // VMOVDQU8Z128rrkz 2692792846U, // VMOVDQU8Z128rrkz_alt 123765262U, // VMOVDQU8Z256mr 2808447502U, // VMOVDQU8Z256mrk 1294862U, // VMOVDQU8Z256rm 2694185486U, // VMOVDQU8Z256rmk 2694021646U, // VMOVDQU8Z256rmkz 551813646U, // VMOVDQU8Z256rr 551813646U, // VMOVDQU8Z256rr_alt 2693710350U, // VMOVDQU8Z256rrk 2693710350U, // VMOVDQU8Z256rrk_alt 2692792846U, // VMOVDQU8Z256rrkz 2692792846U, // VMOVDQU8Z256rrkz_alt 125862414U, // VMOVDQU8Zmr 2810544654U, // VMOVDQU8Zmrk 1311246U, // VMOVDQU8Zrm 2694201870U, // VMOVDQU8Zrmk 2694218254U, // VMOVDQU8Zrmkz 551813646U, // VMOVDQU8Zrr 551813646U, // VMOVDQU8Zrr_alt 2693710350U, // VMOVDQU8Zrrk 2693710350U, // VMOVDQU8Zrrk_alt 2692792846U, // VMOVDQU8Zrrkz 2692792846U, // VMOVDQU8Zrrkz_alt 123773851U, // VMOVDQUYmr 1303451U, // VMOVDQUYrm 551822235U, // VMOVDQUYrr 551822235U, // VMOVDQUYrr_REV 67150747U, // VMOVDQUmr 320411U, // VMOVDQUrm 551822235U, // VMOVDQUrr 551822235U, // VMOVDQUrr_REV 811655037U, // VMOVHLPSZrr 811655037U, // VMOVHLPSrr 69241256U, // VMOVHPDmr 283265448U, // VMOVHPDrm 69246825U, // VMOVHPSmr 283271017U, // VMOVHPSrm 811655007U, // VMOVLHPSZrr 811655007U, // VMOVLHPSrr 69241306U, // VMOVLPDmr 283265498U, // VMOVLPDrm 69246885U, // VMOVLPSmr 283271077U, // VMOVLPSrm 551815601U, // VMOVMSKPDYrr 551815601U, // VMOVMSKPDrr 551821170U, // VMOVMSKPSYrr 551821170U, // VMOVMSKPSrr 1294904U, // VMOVNTDQAYrm 311864U, // VMOVNTDQAZ128rm 1294904U, // VMOVNTDQAZ256rm 1311288U, // VMOVNTDQAZrm 311864U, // VMOVNTDQArm 109090632U, // VMOVNTDQYmr 67147592U, // VMOVNTDQZ128mr 123770696U, // VMOVNTDQZ256mr 125867848U, // VMOVNTDQZmr 65050440U, // VMOVNTDQmr 109087378U, // VMOVNTPDYmr 65047186U, // VMOVNTPDZ128mr 109087378U, // VMOVNTPDZ256mr 111184530U, // VMOVNTPDZmr 65047186U, // VMOVNTPDmr 109092986U, // VMOVNTPSYmr 65052794U, // VMOVNTPSZ128mr 109092986U, // VMOVNTPSZ256mr 111190138U, // VMOVNTPSZmr 65052794U, // VMOVNTPSmr 12619192U, // VMOVPDI2DIZmr 551816632U, // VMOVPDI2DIZrr 12619192U, // VMOVPDI2DImr 551816632U, // VMOVPDI2DIrr 18914157U, // VMOVPQI2QImr 551820141U, // VMOVPQI2QIrr 18914157U, // VMOVPQIto64Zmr 551820141U, // VMOVPQIto64Zrr 18914157U, // VMOVPQIto64rm 551820141U, // VMOVPQIto64rr 551836525U, // VMOVQI2PQIZrm 551836525U, // VMOVQI2PQIrm 69242115U, // VMOVSDZmr 2753924355U, // VMOVSDZmrk 552176899U, // VMOVSDZrm 811650307U, // VMOVSDZrr 811650307U, // VMOVSDZrr_REV 2693811459U, // VMOVSDZrrk 69242115U, // VMOVSDmr 552176899U, // VMOVSDrm 811650307U, // VMOVSDrr 811650307U, // VMOVSDrr_REV 18914157U, // VMOVSDto64Zmr 551820141U, // VMOVSDto64Zrr 18914157U, // VMOVSDto64mr 551820141U, // VMOVSDto64rr 1348908U, // VMOVSHDUPYrm 551818540U, // VMOVSHDUPYrr 1365292U, // VMOVSHDUPZrm 551818540U, // VMOVSHDUPZrr 611628U, // VMOVSHDUPrm 551818540U, // VMOVSHDUPrr 1348919U, // VMOVSLDUPYrm 551818551U, // VMOVSLDUPYrr 1365303U, // VMOVSLDUPZrm 551818551U, // VMOVSLDUPZrr 611639U, // VMOVSLDUPrm 551818551U, // VMOVSLDUPrr 12619192U, // VMOVSS2DIZmr 551816632U, // VMOVSS2DIZrr 12619192U, // VMOVSS2DImr 551816632U, // VMOVSS2DIrr 71344822U, // VMOVSSZmr 2756027062U, // VMOVSSZmrk 552198838U, // VMOVSSZrm 811655862U, // VMOVSSZrr 811655862U, // VMOVSSZrr_REV 2693817014U, // VMOVSSZrrk 71344822U, // VMOVSSmr 552198838U, // VMOVSSrm 811655862U, // VMOVSSrr 811655862U, // VMOVSSrr_REV 109087406U, // VMOVUPDYmr 1346222U, // VMOVUPDYrm 551815854U, // VMOVUPDYrr 551815854U, // VMOVUPDYrr_REV 65047214U, // VMOVUPDZ128mr 2749729454U, // VMOVUPDZ128mrk 608942U, // VMOVUPDZ128rm 2693794478U, // VMOVUPDZ128rmk 2692876974U, // VMOVUPDZ128rmkz 551815854U, // VMOVUPDZ128rr 551815854U, // VMOVUPDZ128rr_alt 2693712558U, // VMOVUPDZ128rrk 2693712558U, // VMOVUPDZ128rrk_alt 2692795054U, // VMOVUPDZ128rrkz 2692795054U, // VMOVUPDZ128rrkz_alt 109087406U, // VMOVUPDZ256mr 2793769646U, // VMOVUPDZ256mrk 1346222U, // VMOVUPDZ256rm 2693843630U, // VMOVUPDZ256rmk 2693728942U, // VMOVUPDZ256rmkz 551815854U, // VMOVUPDZ256rr 551815854U, // VMOVUPDZ256rr_alt 2693712558U, // VMOVUPDZ256rrk 2693712558U, // VMOVUPDZ256rrk_alt 2692795054U, // VMOVUPDZ256rrkz 2692795054U, // VMOVUPDZ256rrkz_alt 111184558U, // VMOVUPDZmr 2795866798U, // VMOVUPDZmrk 1362606U, // VMOVUPDZrm 2693941934U, // VMOVUPDZrmk 2693909166U, // VMOVUPDZrmkz 551815854U, // VMOVUPDZrr 551815854U, // VMOVUPDZrr_alt 2693712558U, // VMOVUPDZrrk 2693712558U, // VMOVUPDZrrk_alt 2692795054U, // VMOVUPDZrrkz 2692795054U, // VMOVUPDZrrkz_alt 65047214U, // VMOVUPDmr 608942U, // VMOVUPDrm 551815854U, // VMOVUPDrr 551815854U, // VMOVUPDrr_REV 109093059U, // VMOVUPSYmr 1351875U, // VMOVUPSYrm 551821507U, // VMOVUPSYrr 551821507U, // VMOVUPSYrr_REV 65052867U, // VMOVUPSZ128mr 2749735107U, // VMOVUPSZ128mrk 614595U, // VMOVUPSZ128rm 2693800131U, // VMOVUPSZ128rmk 2692882627U, // VMOVUPSZ128rmkz 551821507U, // VMOVUPSZ128rr 551821507U, // VMOVUPSZ128rr_alt 2693718211U, // VMOVUPSZ128rrk 2693718211U, // VMOVUPSZ128rrk_alt 2692800707U, // VMOVUPSZ128rrkz 2692800707U, // VMOVUPSZ128rrkz_alt 109093059U, // VMOVUPSZ256mr 2793775299U, // VMOVUPSZ256mrk 1351875U, // VMOVUPSZ256rm 2693849283U, // VMOVUPSZ256rmk 2693734595U, // VMOVUPSZ256rmkz 551821507U, // VMOVUPSZ256rr 551821507U, // VMOVUPSZ256rr_alt 2693718211U, // VMOVUPSZ256rrk 2693718211U, // VMOVUPSZ256rrk_alt 2692800707U, // VMOVUPSZ256rrkz 2692800707U, // VMOVUPSZ256rrkz_alt 111190211U, // VMOVUPSZmr 2795872451U, // VMOVUPSZmrk 1368259U, // VMOVUPSZrm 2693947587U, // VMOVUPSZrmk 2693914819U, // VMOVUPSZrmkz 551821507U, // VMOVUPSZrr 551821507U, // VMOVUPSZrr_alt 2693718211U, // VMOVUPSZrrk 2693718211U, // VMOVUPSZrrk_alt 2692800707U, // VMOVUPSZrrkz 2692800707U, // VMOVUPSZrrkz_alt 65052867U, // VMOVUPSmr 614595U, // VMOVUPSrm 551821507U, // VMOVUPSrr 551821507U, // VMOVUPSrr_REV 318317U, // VMOVZPQILo2PQIZrm 551820141U, // VMOVZPQILo2PQIZrr 318317U, // VMOVZPQILo2PQIrm 551820141U, // VMOVZPQILo2PQIrr 551836525U, // VMOVZQI2PQIrm 551820141U, // VMOVZQI2PQIrr 113632267U, // VMPSADBWYrmi 302392331U, // VMPSADBWYrri 342221835U, // VMPSADBWrmi 302392331U, // VMPSADBWrri 427662U, // VMPTRLDm 435060U, // VMPTRSTm 12619877U, // VMREAD32rm 551817317U, // VMREAD32rr 18912855U, // VMREAD64rm 551818839U, // VMREAD64rr 12911U, // VMRESUME 14032U, // VMRUN32 14112U, // VMRUN64 14020U, // VMSAVE32 14100U, // VMSAVE64 812583378U, // VMULPDYrm 811649490U, // VMULPDYrr 811731410U, // VMULPDZ128rm 352471506U, // VMULPDZ128rmb 2500807122U, // VMULPDZ128rmbk 1427081682U, // VMULPDZ128rmbkz 87017938U, // VMULPDZ128rmk 571476434U, // VMULPDZ128rmkz 811649490U, // VMULPDZ128rr 2693810642U, // VMULPDZ128rrk 571394514U, // VMULPDZ128rrkz 812583378U, // VMULPDZ256rm 356665810U, // VMULPDZ256rmb 2505001426U, // VMULPDZ256rmbk 1431275986U, // VMULPDZ256rmbkz 87067090U, // VMULPDZ256rmk 571525586U, // VMULPDZ256rmkz 811649490U, // VMULPDZ256rr 2693810642U, // VMULPDZ256rrk 571394514U, // VMULPDZ256rrkz 1116626U, // VMULPDZrb 87116242U, // VMULPDZrbk 359762386U, // VMULPDZrbkz 812763602U, // VMULPDZrm 360860114U, // VMULPDZrmb 2509195730U, // VMULPDZrmbk 1435470290U, // VMULPDZrmbkz 87165394U, // VMULPDZrmk 571623890U, // VMULPDZrmkz 811649490U, // VMULPDZrr 2693810642U, // VMULPDZrrk 571394514U, // VMULPDZrrkz 811731410U, // VMULPDrm 811649490U, // VMULPDrr 812588957U, // VMULPSYrm 811655069U, // VMULPSYrr 811736989U, // VMULPSZ128rm 356687773U, // VMULPSZ128rmb 2505219997U, // VMULPSZ128rmbk 1431494557U, // VMULPSZ128rmbkz 87023517U, // VMULPSZ128rmk 571482013U, // VMULPSZ128rmkz 811655069U, // VMULPSZ128rr 2693816221U, // VMULPSZ128rrk 571400093U, // VMULPSZ128rrkz 812588957U, // VMULPSZ256rm 360882077U, // VMULPSZ256rmb 2509414301U, // VMULPSZ256rmbk 1435688861U, // VMULPSZ256rmbkz 87072669U, // VMULPSZ256rmk 571531165U, // VMULPSZ256rmkz 811655069U, // VMULPSZ256rr 2693816221U, // VMULPSZ256rrk 571400093U, // VMULPSZ256rrkz 1122205U, // VMULPSZrb 87121821U, // VMULPSZrbk 359767965U, // VMULPSZrbkz 812769181U, // VMULPSZrm 362979229U, // VMULPSZrmb 2511511453U, // VMULPSZrmbk 1437786013U, // VMULPSZrmbkz 87170973U, // VMULPSZrmk 571629469U, // VMULPSZrmkz 811655069U, // VMULPSZrr 2693816221U, // VMULPSZrrk 571400093U, // VMULPSZrrkz 811736989U, // VMULPSrm 811655069U, // VMULPSrr 283266221U, // VMULSDZrm 811732141U, // VMULSDZrm_Int 87018669U, // VMULSDZrm_Intk 571477165U, // VMULSDZrm_Intkz 811650221U, // VMULSDZrr 811650221U, // VMULSDZrr_Int 2693811373U, // VMULSDZrr_Intk 571395245U, // VMULSDZrr_Intkz 1117357U, // VMULSDZrrb 87116973U, // VMULSDZrrbk 359763117U, // VMULSDZrrbkz 283266221U, // VMULSDrm 283266221U, // VMULSDrm_Int 811650221U, // VMULSDrr 811650221U, // VMULSDrr_Int 283288164U, // VMULSSZrm 811737700U, // VMULSSZrm_Int 87024228U, // VMULSSZrm_Intk 571482724U, // VMULSSZrm_Intkz 811655780U, // VMULSSZrr 811655780U, // VMULSSZrr_Int 2693816932U, // VMULSSZrr_Intk 571400804U, // VMULSSZrr_Intkz 1122916U, // VMULSSZrrb 87122532U, // VMULSSZrrbk 359768676U, // VMULSSZrrbkz 283288164U, // VMULSSrm 283288164U, // VMULSSrm_Int 811655780U, // VMULSSrr 811655780U, // VMULSSrr_Int 551801123U, // VMWRITE32rm 551817507U, // VMWRITE32rr 551835665U, // VMWRITE64rm 551819281U, // VMWRITE64rr 12994U, // VMXOFF 431241U, // VMXON 812583542U, // VORPDYrm 811649654U, // VORPDYrr 811731574U, // VORPDrm 811649654U, // VORPDrr 812589138U, // VORPSYrm 811655250U, // VORPSYrr 811737170U, // VORPSrm 811655250U, // VORPSrr 312305U, // VPABSBrm128 1295345U, // VPABSBrm256 551814129U, // VPABSBrr128 551814129U, // VPABSBrr256 1313857U, // VPABSDZrm 631491649U, // VPABSDZrmb 631327809U, // VPABSDZrmbk 631327809U, // VPABSDZrmbkz 2694220865U, // VPABSDZrmk 2694220865U, // VPABSDZrmkz 551816257U, // VPABSDZrr 2692795457U, // VPABSDZrrk 2692795457U, // VPABSDZrrkz 314433U, // VPABSDrm128 1297473U, // VPABSDrm256 551816257U, // VPABSDrr128 551816257U, // VPABSDrr256 1317371U, // VPABSQZrm 629430779U, // VPABSQZrmb 629250555U, // VPABSQZrmbk 629250555U, // VPABSQZrmbkz 2694224379U, // VPABSQZrmk 2694224379U, // VPABSQZrmkz 551819771U, // VPABSQZrr 2692798971U, // VPABSQZrrk 2692798971U, // VPABSQZrrkz 321341U, // VPABSWrm128 1304381U, // VPABSWrm256 551823165U, // VPABSWrr128 551823165U, // VPABSWrr256 812885252U, // VPACKSSDWYrm 811656452U, // VPACKSSDWYrr 811902212U, // VPACKSSDWrm 811656452U, // VPACKSSDWrr 812877032U, // VPACKSSWBYrm 811648232U, // VPACKSSWBYrr 811893992U, // VPACKSSWBrm 811648232U, // VPACKSSWBrr 812885263U, // VPACKUSDWYrm 811656463U, // VPACKUSDWYrr 811902223U, // VPACKUSDWrm 811656463U, // VPACKUSDWrr 812877043U, // VPACKUSWBYrm 811648243U, // VPACKUSWBYrr 811894003U, // VPACKUSWBrm 811648243U, // VPACKUSWBrr 812876464U, // VPADDBYrm 811647664U, // VPADDBYrr 811893424U, // VPADDBZ128rm 87474864U, // VPADDBZ128rmk 571851440U, // VPADDBZ128rmkz 811647664U, // VPADDBZ128rr 2693808816U, // VPADDBZ128rrk 571392688U, // VPADDBZ128rrkz 812876464U, // VPADDBZ256rm 1508016U, // VPADDBZ256rmk 571867824U, // VPADDBZ256rmkz 811647664U, // VPADDBZ256rr 2693808816U, // VPADDBZ256rrk 571392688U, // VPADDBZ256rrkz 813073072U, // VPADDBZrm 87507632U, // VPADDBZrmk 571884208U, // VPADDBZrmkz 811647664U, // VPADDBZrr 2693808816U, // VPADDBZrrk 571392688U, // VPADDBZrrkz 811893424U, // VPADDBrm 811647664U, // VPADDBrr 812877279U, // VPADDDYrm 811648479U, // VPADDDYrr 811894239U, // VPADDDZ128rm 356599263U, // VPADDDZ128rmb 2505410015U, // VPADDDZ128rmbk 1431799263U, // VPADDDZ128rmbkz 87475679U, // VPADDDZ128rmk 571852255U, // VPADDDZ128rmkz 811648479U, // VPADDDZ128rr 2693809631U, // VPADDDZ128rrk 571393503U, // VPADDDZ128rrkz 812877279U, // VPADDDZ256rm 360793567U, // VPADDDZ256rmb 2509604319U, // VPADDDZ256rmbk 1435993567U, // VPADDDZ256rmbkz 1508831U, // VPADDDZ256rmk 571868639U, // VPADDDZ256rmkz 811648479U, // VPADDDZ256rr 2693809631U, // VPADDDZ256rrk 571393503U, // VPADDDZ256rrkz 813073887U, // VPADDDZrm 362890719U, // VPADDDZrmb 2511701471U, // VPADDDZrmbk 1438090719U, // VPADDDZrmbkz 87508447U, // VPADDDZrmk 571885023U, // VPADDDZrmkz 811648479U, // VPADDDZrr 2693809631U, // VPADDDZrrk 571393503U, // VPADDDZrrkz 811894239U, // VPADDDrm 811648479U, // VPADDDrr 812881514U, // VPADDQYrm 811652714U, // VPADDQYrr 811898474U, // VPADDQZ128rm 352425578U, // VPADDQZ128rmb 2501203562U, // VPADDQZ128rmbk 1427625578U, // VPADDQZ128rmbkz 87479914U, // VPADDQZ128rmk 571856490U, // VPADDQZ128rmkz 811652714U, // VPADDQZ128rr 2693813866U, // VPADDQZ128rrk 571397738U, // VPADDQZ128rrkz 812881514U, // VPADDQZ256rm 356619882U, // VPADDQZ256rmb 2505397866U, // VPADDQZ256rmbk 1431819882U, // VPADDQZ256rmbkz 1513066U, // VPADDQZ256rmk 571872874U, // VPADDQZ256rmkz 811652714U, // VPADDQZ256rr 2693813866U, // VPADDQZ256rrk 571397738U, // VPADDQZ256rrkz 813078122U, // VPADDQZrm 360814186U, // VPADDQZrmb 2509592170U, // VPADDQZrmbk 1436014186U, // VPADDQZrmbkz 87512682U, // VPADDQZrmk 571889258U, // VPADDQZrmkz 811652714U, // VPADDQZrr 2693813866U, // VPADDQZrrk 571397738U, // VPADDQZrrkz 811898474U, // VPADDQrm 811652714U, // VPADDQrr 812876811U, // VPADDSBYrm 811648011U, // VPADDSBYrr 811893771U, // VPADDSBrm 811648011U, // VPADDSBrr 812885879U, // VPADDSWYrm 811657079U, // VPADDSWYrr 811902839U, // VPADDSWrm 811657079U, // VPADDSWrr 812876860U, // VPADDUSBYrm 811648060U, // VPADDUSBYrr 811893820U, // VPADDUSBrm 811648060U, // VPADDUSBrr 812885992U, // VPADDUSWYrm 811657192U, // VPADDUSWYrr 811902952U, // VPADDUSWrm 811657192U, // VPADDUSWrr 812885188U, // VPADDWYrm 811656388U, // VPADDWYrr 811902148U, // VPADDWZ128rm 87483588U, // VPADDWZ128rmk 571860164U, // VPADDWZ128rmkz 811656388U, // VPADDWZ128rr 2693817540U, // VPADDWZ128rrk 571401412U, // VPADDWZ128rrkz 812885188U, // VPADDWZ256rm 1516740U, // VPADDWZ256rmk 571876548U, // VPADDWZ256rmkz 811656388U, // VPADDWZ256rr 2693817540U, // VPADDWZ256rrk 571401412U, // VPADDWZ256rrkz 813081796U, // VPADDWZrm 87516356U, // VPADDWZrmk 571892932U, // VPADDWZrmkz 811656388U, // VPADDWZrr 2693817540U, // VPADDWZrrk 571401412U, // VPADDWZrrkz 811902148U, // VPADDWrm 811656388U, // VPADDWrr 342219775U, // VPALIGNR128rm 302390271U, // VPALIGNR128rr 113630207U, // VPALIGNR256rm 302390271U, // VPALIGNR256rr 811894254U, // VPANDDZ128rm 356599278U, // VPANDDZ128rmb 2505410030U, // VPANDDZ128rmbk 1431799278U, // VPANDDZ128rmbkz 87475694U, // VPANDDZ128rmk 571852270U, // VPANDDZ128rmkz 811648494U, // VPANDDZ128rr 2693809646U, // VPANDDZ128rrk 571393518U, // VPANDDZ128rrkz 812877294U, // VPANDDZ256rm 360793582U, // VPANDDZ256rmb 2509604334U, // VPANDDZ256rmbk 1435993582U, // VPANDDZ256rmbkz 1508846U, // VPANDDZ256rmk 571868654U, // VPANDDZ256rmkz 811648494U, // VPANDDZ256rr 2693809646U, // VPANDDZ256rrk 571393518U, // VPANDDZ256rrkz 813073902U, // VPANDDZrm 362890734U, // VPANDDZrmb 2511701486U, // VPANDDZrmbk 1438090734U, // VPANDDZrmbkz 87508462U, // VPANDDZrmk 571885038U, // VPANDDZrmkz 811648494U, // VPANDDZrr 2693809646U, // VPANDDZrrk 571393518U, // VPANDDZrrkz 811894496U, // VPANDNDZ128rm 356599520U, // VPANDNDZ128rmb 2505410272U, // VPANDNDZ128rmbk 1431799520U, // VPANDNDZ128rmbkz 87475936U, // VPANDNDZ128rmk 571852512U, // VPANDNDZ128rmkz 811648736U, // VPANDNDZ128rr 2693809888U, // VPANDNDZ128rrk 571393760U, // VPANDNDZ128rrkz 812877536U, // VPANDNDZ256rm 360793824U, // VPANDNDZ256rmb 2509604576U, // VPANDNDZ256rmbk 1435993824U, // VPANDNDZ256rmbkz 1509088U, // VPANDNDZ256rmk 571868896U, // VPANDNDZ256rmkz 811648736U, // VPANDNDZ256rr 2693809888U, // VPANDNDZ256rrk 571393760U, // VPANDNDZ256rrkz 813074144U, // VPANDNDZrm 362890976U, // VPANDNDZrmb 2511701728U, // VPANDNDZrmbk 1438090976U, // VPANDNDZrmbkz 87508704U, // VPANDNDZrmk 571885280U, // VPANDNDZrmkz 811648736U, // VPANDNDZrr 2693809888U, // VPANDNDZrrk 571393760U, // VPANDNDZrrkz 811899137U, // VPANDNQZ128rm 352426241U, // VPANDNQZ128rmb 2501204225U, // VPANDNQZ128rmbk 1427626241U, // VPANDNQZ128rmbkz 87480577U, // VPANDNQZ128rmk 571857153U, // VPANDNQZ128rmkz 811653377U, // VPANDNQZ128rr 2693814529U, // VPANDNQZ128rrk 571398401U, // VPANDNQZ128rrkz 812882177U, // VPANDNQZ256rm 356620545U, // VPANDNQZ256rmb 2505398529U, // VPANDNQZ256rmbk 1431820545U, // VPANDNQZ256rmbkz 1513729U, // VPANDNQZ256rmk 571873537U, // VPANDNQZ256rmkz 811653377U, // VPANDNQZ256rr 2693814529U, // VPANDNQZ256rrk 571398401U, // VPANDNQZ256rrkz 813078785U, // VPANDNQZrm 360814849U, // VPANDNQZrmb 2509592833U, // VPANDNQZrmbk 1436014849U, // VPANDNQZrmbkz 87513345U, // VPANDNQZrmk 571889921U, // VPANDNQZrmkz 811653377U, // VPANDNQZrr 2693814529U, // VPANDNQZrrk 571398401U, // VPANDNQZrrkz 812881010U, // VPANDNYrm 811652210U, // VPANDNYrr 811897970U, // VPANDNrm 811652210U, // VPANDNrr 811898573U, // VPANDQZ128rm 352425677U, // VPANDQZ128rmb 2501203661U, // VPANDQZ128rmbk 1427625677U, // VPANDQZ128rmbkz 87480013U, // VPANDQZ128rmk 571856589U, // VPANDQZ128rmkz 811652813U, // VPANDQZ128rr 2693813965U, // VPANDQZ128rrk 571397837U, // VPANDQZ128rrkz 812881613U, // VPANDQZ256rm 356619981U, // VPANDQZ256rmb 2505397965U, // VPANDQZ256rmbk 1431819981U, // VPANDQZ256rmbkz 1513165U, // VPANDQZ256rmk 571872973U, // VPANDQZ256rmkz 811652813U, // VPANDQZ256rr 2693813965U, // VPANDQZ256rrk 571397837U, // VPANDQZ256rrkz 813078221U, // VPANDQZrm 360814285U, // VPANDQZrmb 2509592269U, // VPANDQZrmbk 1436014285U, // VPANDQZrmbkz 87512781U, // VPANDQZrmk 571889357U, // VPANDQZrmkz 811652813U, // VPANDQZrr 2693813965U, // VPANDQZrrk 571397837U, // VPANDQZrrkz 812877521U, // VPANDYrm 811648721U, // VPANDYrr 811894481U, // VPANDrm 811648721U, // VPANDrr 812876541U, // VPAVGBYrm 811647741U, // VPAVGBYrr 811893501U, // VPAVGBrm 811647741U, // VPAVGBrr 812885394U, // VPAVGWYrm 811656594U, // VPAVGWYrr 811902354U, // VPAVGWrm 811656594U, // VPAVGWrr 113624577U, // VPBLENDDYrmi 302384641U, // VPBLENDDYrri 342214145U, // VPBLENDDrmi 302384641U, // VPBLENDDrri 811893567U, // VPBLENDMBZ128rm 571851583U, // VPBLENDMBZ128rmk 571851583U, // VPBLENDMBZ128rmkz 811647807U, // VPBLENDMBZ128rr 571392831U, // VPBLENDMBZ128rrk 571392831U, // VPBLENDMBZ128rrkz 812876607U, // VPBLENDMBZ256rm 571867967U, // VPBLENDMBZ256rmk 571867967U, // VPBLENDMBZ256rmkz 811647807U, // VPBLENDMBZ256rr 571392831U, // VPBLENDMBZ256rrk 571392831U, // VPBLENDMBZ256rrkz 813073215U, // VPBLENDMBZrm 571884351U, // VPBLENDMBZrmk 571884351U, // VPBLENDMBZrmkz 811647807U, // VPBLENDMBZrr 571392831U, // VPBLENDMBZrrk 571392831U, // VPBLENDMBZrrkz 811894433U, // VPBLENDMDZ128rm 356599457U, // VPBLENDMDZ128rmb 1431799457U, // VPBLENDMDZ128rmbk 571852449U, // VPBLENDMDZ128rmk 571852449U, // VPBLENDMDZ128rmkz 811648673U, // VPBLENDMDZ128rr 571393697U, // VPBLENDMDZ128rrk 571393697U, // VPBLENDMDZ128rrkz 812877473U, // VPBLENDMDZ256rm 360793761U, // VPBLENDMDZ256rmb 1435993761U, // VPBLENDMDZ256rmbk 571868833U, // VPBLENDMDZ256rmk 571868833U, // VPBLENDMDZ256rmkz 811648673U, // VPBLENDMDZ256rr 571393697U, // VPBLENDMDZ256rrk 571393697U, // VPBLENDMDZ256rrkz 813074081U, // VPBLENDMDZrm 362890913U, // VPBLENDMDZrmb 1438090913U, // VPBLENDMDZrmbk 571885217U, // VPBLENDMDZrmk 571885217U, // VPBLENDMDZrmkz 811648673U, // VPBLENDMDZrr 571393697U, // VPBLENDMDZrrk 571393697U, // VPBLENDMDZrrkz 811899081U, // VPBLENDMQZ128rm 352426185U, // VPBLENDMQZ128rmb 1427626185U, // VPBLENDMQZ128rmbk 571857097U, // VPBLENDMQZ128rmk 571857097U, // VPBLENDMQZ128rmkz 811653321U, // VPBLENDMQZ128rr 571398345U, // VPBLENDMQZ128rrk 571398345U, // VPBLENDMQZ128rrkz 812882121U, // VPBLENDMQZ256rm 356620489U, // VPBLENDMQZ256rmb 1431820489U, // VPBLENDMQZ256rmbk 571873481U, // VPBLENDMQZ256rmk 571873481U, // VPBLENDMQZ256rmkz 811653321U, // VPBLENDMQZ256rr 571398345U, // VPBLENDMQZ256rrk 571398345U, // VPBLENDMQZ256rrkz 813078729U, // VPBLENDMQZrm 360814793U, // VPBLENDMQZrmb 1436014793U, // VPBLENDMQZrmbk 571889865U, // VPBLENDMQZrmk 571889865U, // VPBLENDMQZrmkz 811653321U, // VPBLENDMQZrr 571398345U, // VPBLENDMQZrrk 571398345U, // VPBLENDMQZrrkz 811902514U, // VPBLENDMWZ128rm 571860530U, // VPBLENDMWZ128rmk 571860530U, // VPBLENDMWZ128rmkz 811656754U, // VPBLENDMWZ128rr 571401778U, // VPBLENDMWZ128rrk 571401778U, // VPBLENDMWZ128rrkz 812885554U, // VPBLENDMWZ256rm 571876914U, // VPBLENDMWZ256rmk 571876914U, // VPBLENDMWZ256rmkz 811656754U, // VPBLENDMWZ256rr 571401778U, // VPBLENDMWZ256rrk 571401778U, // VPBLENDMWZ256rrkz 813082162U, // VPBLENDMWZrm 571893298U, // VPBLENDMWZrmk 571893298U, // VPBLENDMWZrmkz 811656754U, // VPBLENDMWZrr 571401778U, // VPBLENDMWZrrk 571401778U, // VPBLENDMWZrrkz 114508993U, // VPBLENDVBYrm 302957761U, // VPBLENDVBYrr 343098561U, // VPBLENDVBrm 302957761U, // VPBLENDVBrr 113632499U, // VPBLENDWYrmi 302392563U, // VPBLENDWYrri 342222067U, // VPBLENDWrmi 302392563U, // VPBLENDWrri 476286U, // VPBROADCASTBYrm 551814270U, // VPBROADCASTBYrr 551814270U, // VPBROADCASTBrZ128r 2693710974U, // VPBROADCASTBrZ128rk 2692793470U, // VPBROADCASTBrZ128rkz 551814270U, // VPBROADCASTBrZ256r 2693710974U, // VPBROADCASTBrZ256rk 2692793470U, // VPBROADCASTBrZ256rkz 551814270U, // VPBROADCASTBrZr 2693710974U, // VPBROADCASTBrZrk 2692793470U, // VPBROADCASTBrZrkz 476286U, // VPBROADCASTBrm 551814270U, // VPBROADCASTBrr 551800149U, // VPBROADCASTDYrm 551816533U, // VPBROADCASTDYrr 551636309U, // VPBROADCASTDZkrm 2692795733U, // VPBROADCASTDZkrr 551800149U, // VPBROADCASTDZrm 551816533U, // VPBROADCASTDZrr 551816533U, // VPBROADCASTDrZ128r 2693713237U, // VPBROADCASTDrZ128rk 2692795733U, // VPBROADCASTDrZ128rkz 551816533U, // VPBROADCASTDrZ256r 2693713237U, // VPBROADCASTDrZ256rk 2692795733U, // VPBROADCASTDrZ256rkz 551816533U, // VPBROADCASTDrZr 2693713237U, // VPBROADCASTDrZrk 2692795733U, // VPBROADCASTDrZrkz 551800149U, // VPBROADCASTDrm 551816533U, // VPBROADCASTDrr 551818593U, // VPBROADCASTMB2QZ128rr 551818593U, // VPBROADCASTMB2QZ256rr 551818593U, // VPBROADCASTMB2QZrr 551814509U, // VPBROADCASTMW2DZ128rr 551814509U, // VPBROADCASTMW2DZ256rr 551814509U, // VPBROADCASTMW2DZrr 551836412U, // VPBROADCASTQYrm 551820028U, // VPBROADCASTQYrr 551656188U, // VPBROADCASTQZkrm 2692799228U, // VPBROADCASTQZkrr 551836412U, // VPBROADCASTQZrm 551820028U, // VPBROADCASTQZrr 551820028U, // VPBROADCASTQrZ128r 2693716732U, // VPBROADCASTQrZ128rk 2692799228U, // VPBROADCASTQrZ128rkz 551820028U, // VPBROADCASTQrZ256r 2693716732U, // VPBROADCASTQrZ256rk 2692799228U, // VPBROADCASTQrZ256rkz 551820028U, // VPBROADCASTQrZr 2693716732U, // VPBROADCASTQrZrk 2692799228U, // VPBROADCASTQrZrkz 551836412U, // VPBROADCASTQrm 551820028U, // VPBROADCASTQrr 419947U, // VPBROADCASTWYrm 551823467U, // VPBROADCASTWYrr 551823467U, // VPBROADCASTWrZ128r 2693720171U, // VPBROADCASTWrZ128rk 2692802667U, // VPBROADCASTWrZ128rkz 551823467U, // VPBROADCASTWrZ256r 2693720171U, // VPBROADCASTWrZ256rk 2692802667U, // VPBROADCASTWrZ256rkz 551823467U, // VPBROADCASTWrZr 2693720171U, // VPBROADCASTWrZrk 2692802667U, // VPBROADCASTWrZrkz 419947U, // VPBROADCASTWrm 551823467U, // VPBROADCASTWrr 342218499U, // VPCLMULQDQrm 302388995U, // VPCLMULQDQrr 343106499U, // VPCMOVmr 101934019U, // VPCMOVmrY 303424451U, // VPCMOVrm 303440835U, // VPCMOVrmY 302965699U, // VPCMOVrr 302965699U, // VPCMOVrrY 665498603U, // VPCMPBZ128rmi 342213489U, // VPCMPBZ128rmi_alt 934818795U, // VPCMPBZ128rmik 131613553U, // VPCMPBZ128rmik_alt 1470821355U, // VPCMPBZ128rri 302383985U, // VPCMPBZ128rri_alt 2545464299U, // VPCMPBZ128rrik 1441416049U, // VPCMPBZ128rrik_alt 1202369515U, // VPCMPBZ256rmi 113623921U, // VPCMPBZ256rmi_alt 1471689707U, // VPCMPBZ256rmik 133710705U, // VPCMPBZ256rmik_alt 1470821355U, // VPCMPBZ256rri 302383985U, // VPCMPBZ256rri_alt 2545464299U, // VPCMPBZ256rrik 1441416049U, // VPCMPBZ256rrik_alt 1739240427U, // VPCMPBZrmi 365282161U, // VPCMPBZrmi_alt 2008560619U, // VPCMPBZrmik 1477985137U, // VPCMPBZrmik_alt 1470821355U, // VPCMPBZrri 302383985U, // VPCMPBZrri_alt 2545464299U, // VPCMPBZrrik 1441416049U, // VPCMPBZrrik_alt 673887211U, // VPCMPDZ128rmi 342215139U, // VPCMPDZ128rmi_alt 3895112683U, // VPCMPDZ128rmib 2227554787U, // VPCMPDZ128rmib_alt 2553820139U, // VPCMPDZ128rmibk 2270710243U, // VPCMPDZ128rmibk_alt 943207403U, // VPCMPDZ128rmik 131615203U, // VPCMPDZ128rmik_alt 1479209963U, // VPCMPDZ128rri 302385635U, // VPCMPDZ128rri_alt 2553852907U, // VPCMPDZ128rrik 1441417699U, // VPCMPDZ128rrik_alt 1210758123U, // VPCMPDZ256rmi 113625571U, // VPCMPDZ256rmi_alt 3895112683U, // VPCMPDZ256rmib 2764425699U, // VPCMPDZ256rmib_alt 2553820139U, // VPCMPDZ256rmibk 2807581155U, // VPCMPDZ256rmibk_alt 1480078315U, // VPCMPDZ256rmik 133712355U, // VPCMPDZ256rmik_alt 1479209963U, // VPCMPDZ256rri 302385635U, // VPCMPDZ256rri_alt 2553852907U, // VPCMPDZ256rrik 1441417699U, // VPCMPDZ256rrik_alt 1747629035U, // VPCMPDZrmi 365283811U, // VPCMPDZrmi_alt 3895112683U, // VPCMPDZrmib 3032861155U, // VPCMPDZrmib_alt 2553820139U, // VPCMPDZrmibk 3076016611U, // VPCMPDZrmibk_alt 2016949227U, // VPCMPDZrmik 1477986787U, // VPCMPDZrmik_alt 1479209963U, // VPCMPDZrri 302385635U, // VPCMPDZrri_alt 2553852907U, // VPCMPDZrrik 1441417699U, // VPCMPDZrrik_alt 812876665U, // VPCMPEQBYrm 811647865U, // VPCMPEQBYrr 811893625U, // VPCMPEQBZ128rm 571851641U, // VPCMPEQBZ128rmk 811647865U, // VPCMPEQBZ128rr 571392889U, // VPCMPEQBZ128rrk 812876665U, // VPCMPEQBZ256rm 571868025U, // VPCMPEQBZ256rmk 811647865U, // VPCMPEQBZ256rr 571392889U, // VPCMPEQBZ256rrk 813073273U, // VPCMPEQBZrm 571884409U, // VPCMPEQBZrmk 811647865U, // VPCMPEQBZrr 571392889U, // VPCMPEQBZrrk 811893625U, // VPCMPEQBrm 811647865U, // VPCMPEQBrr 812878567U, // VPCMPEQDYrm 811649767U, // VPCMPEQDYrr 811895527U, // VPCMPEQDZ128rm 356600551U, // VPCMPEQDZ128rmb 1431800551U, // VPCMPEQDZ128rmbk 571853543U, // VPCMPEQDZ128rmk 811649767U, // VPCMPEQDZ128rr 571394791U, // VPCMPEQDZ128rrk 812878567U, // VPCMPEQDZ256rm 360794855U, // VPCMPEQDZ256rmb 1435994855U, // VPCMPEQDZ256rmbk 571869927U, // VPCMPEQDZ256rmk 811649767U, // VPCMPEQDZ256rr 571394791U, // VPCMPEQDZ256rrk 813075175U, // VPCMPEQDZrm 362892007U, // VPCMPEQDZrmb 1438092007U, // VPCMPEQDZrmbk 571886311U, // VPCMPEQDZrmk 811649767U, // VPCMPEQDZrr 571394791U, // VPCMPEQDZrrk 811895527U, // VPCMPEQDrm 811649767U, // VPCMPEQDrr 812882258U, // VPCMPEQQYrm 811653458U, // VPCMPEQQYrr 811899218U, // VPCMPEQQZ128rm 352426322U, // VPCMPEQQZ128rmb 1427626322U, // VPCMPEQQZ128rmbk 571857234U, // VPCMPEQQZ128rmk 811653458U, // VPCMPEQQZ128rr 571398482U, // VPCMPEQQZ128rrk 812882258U, // VPCMPEQQZ256rm 356620626U, // VPCMPEQQZ256rmb 1431820626U, // VPCMPEQQZ256rmbk 571873618U, // VPCMPEQQZ256rmk 811653458U, // VPCMPEQQZ256rr 571398482U, // VPCMPEQQZ256rrk 813078866U, // VPCMPEQQZrm 360814930U, // VPCMPEQQZrmb 1436014930U, // VPCMPEQQZrmbk 571890002U, // VPCMPEQQZrmk 811653458U, // VPCMPEQQZrr 571398482U, // VPCMPEQQZrrk 811899218U, // VPCMPEQQrm 811653458U, // VPCMPEQQrr 812885656U, // VPCMPEQWYrm 811656856U, // VPCMPEQWYrr 811902616U, // VPCMPEQWZ128rm 571860632U, // VPCMPEQWZ128rmk 811656856U, // VPCMPEQWZ128rr 571401880U, // VPCMPEQWZ128rrk 812885656U, // VPCMPEQWZ256rm 571877016U, // VPCMPEQWZ256rmk 811656856U, // VPCMPEQWZ256rr 571401880U, // VPCMPEQWZ256rrk 813082264U, // VPCMPEQWZrm 571893400U, // VPCMPEQWZrmk 811656856U, // VPCMPEQWZrr 571401880U, // VPCMPEQWZrrk 811902616U, // VPCMPEQWrm 811656856U, // VPCMPEQWrr 0U, // VPCMPESTRIMEM 0U, // VPCMPESTRIREG 25497475U, // VPCMPESTRIrm 811945859U, // VPCMPESTRIrr 0U, // VPCMPESTRM128MEM 0U, // VPCMPESTRM128REG 25498714U, // VPCMPESTRM128rm 811947098U, // VPCMPESTRM128rr 812876901U, // VPCMPGTBYrm 811648101U, // VPCMPGTBYrr 811893861U, // VPCMPGTBZ128rm 571851877U, // VPCMPGTBZ128rmk 811648101U, // VPCMPGTBZ128rr 571393125U, // VPCMPGTBZ128rrk 812876901U, // VPCMPGTBZ256rm 571868261U, // VPCMPGTBZ256rmk 811648101U, // VPCMPGTBZ256rr 571393125U, // VPCMPGTBZ256rrk 813073509U, // VPCMPGTBZrm 571884645U, // VPCMPGTBZrmk 811648101U, // VPCMPGTBZrr 571393125U, // VPCMPGTBZrrk 811893861U, // VPCMPGTBrm 811648101U, // VPCMPGTBrr 812879154U, // VPCMPGTDYrm 811650354U, // VPCMPGTDYrr 811896114U, // VPCMPGTDZ128rm 356601138U, // VPCMPGTDZ128rmb 1431801138U, // VPCMPGTDZ128rmbk 571854130U, // VPCMPGTDZ128rmk 811650354U, // VPCMPGTDZ128rr 571395378U, // VPCMPGTDZ128rrk 812879154U, // VPCMPGTDZ256rm 360795442U, // VPCMPGTDZ256rmb 1435995442U, // VPCMPGTDZ256rmbk 571870514U, // VPCMPGTDZ256rmk 811650354U, // VPCMPGTDZ256rr 571395378U, // VPCMPGTDZ256rrk 813075762U, // VPCMPGTDZrm 362892594U, // VPCMPGTDZrmb 1438092594U, // VPCMPGTDZrmbk 571886898U, // VPCMPGTDZrmk 811650354U, // VPCMPGTDZrr 571395378U, // VPCMPGTDZrrk 811896114U, // VPCMPGTDrm 811650354U, // VPCMPGTDrr 812882615U, // VPCMPGTQYrm 811653815U, // VPCMPGTQYrr 811899575U, // VPCMPGTQZ128rm 352426679U, // VPCMPGTQZ128rmb 1427626679U, // VPCMPGTQZ128rmbk 571857591U, // VPCMPGTQZ128rmk 811653815U, // VPCMPGTQZ128rr 571398839U, // VPCMPGTQZ128rrk 812882615U, // VPCMPGTQZ256rm 356620983U, // VPCMPGTQZ256rmb 1431820983U, // VPCMPGTQZ256rmbk 571873975U, // VPCMPGTQZ256rmk 811653815U, // VPCMPGTQZ256rr 571398839U, // VPCMPGTQZ256rrk 813079223U, // VPCMPGTQZrm 360815287U, // VPCMPGTQZrmb 1436015287U, // VPCMPGTQZrmbk 571890359U, // VPCMPGTQZrmk 811653815U, // VPCMPGTQZrr 571398839U, // VPCMPGTQZrrk 811899575U, // VPCMPGTQrm 811653815U, // VPCMPGTQrr 812886073U, // VPCMPGTWYrm 811657273U, // VPCMPGTWYrr 811903033U, // VPCMPGTWZ128rm 571861049U, // VPCMPGTWZ128rmk 811657273U, // VPCMPGTWZ128rr 571402297U, // VPCMPGTWZ128rrk 812886073U, // VPCMPGTWZ256rm 571877433U, // VPCMPGTWZ256rmk 811657273U, // VPCMPGTWZ256rr 571402297U, // VPCMPGTWZ256rrk 813082681U, // VPCMPGTWZrm 571893817U, // VPCMPGTWZrmk 811657273U, // VPCMPGTWZrr 571402297U, // VPCMPGTWZrrk 811903033U, // VPCMPGTWrm 811657273U, // VPCMPGTWrr 0U, // VPCMPISTRIMEM 0U, // VPCMPISTRIREG 25497487U, // VPCMPISTRIrm 811945871U, // VPCMPISTRIrr 0U, // VPCMPISTRM128MEM 0U, // VPCMPISTRM128REG 25498726U, // VPCMPISTRM128rm 811947110U, // VPCMPISTRM128rr 675984363U, // VPCMPQZ128rmi 342219059U, // VPCMPQZ128rmi_alt 4165645291U, // VPCMPQZ128rmib 3282426163U, // VPCMPQZ128rmib_alt 3629659115U, // VPCMPQZ128rmibk 3342358835U, // VPCMPQZ128rmibk_alt 945304555U, // VPCMPQZ128rmik 131619123U, // VPCMPQZ128rmik_alt 1481307115U, // VPCMPQZ128rri 302389555U, // VPCMPQZ128rri_alt 2555950059U, // VPCMPQZ128rrik 1441421619U, // VPCMPQZ128rrik_alt 1212855275U, // VPCMPQZ256rmi 113629491U, // VPCMPQZ256rmi_alt 4165645291U, // VPCMPQZ256rmib 2208684339U, // VPCMPQZ256rmib_alt 3629659115U, // VPCMPQZ256rmibk 2268617011U, // VPCMPQZ256rmibk_alt 1482175467U, // VPCMPQZ256rmik 133716275U, // VPCMPQZ256rmik_alt 1481307115U, // VPCMPQZ256rri 302389555U, // VPCMPQZ256rri_alt 2555950059U, // VPCMPQZ256rrik 1441421619U, // VPCMPQZ256rrik_alt 1749726187U, // VPCMPQZrmi 365287731U, // VPCMPQZrmi_alt 4165645291U, // VPCMPQZrmib 2745555251U, // VPCMPQZrmib_alt 3629659115U, // VPCMPQZrmibk 2805487923U, // VPCMPQZrmibk_alt 2019046379U, // VPCMPQZrmik 1477990707U, // VPCMPQZrmik_alt 1481307115U, // VPCMPQZrri 302389555U, // VPCMPQZrri_alt 2555950059U, // VPCMPQZrrik 1441421619U, // VPCMPQZrrik_alt 678081515U, // VPCMPUBZ128rmi 342213800U, // VPCMPUBZ128rmi_alt 947401707U, // VPCMPUBZ128rmik 131613864U, // VPCMPUBZ128rmik_alt 1483404267U, // VPCMPUBZ128rri 302384296U, // VPCMPUBZ128rri_alt 2558047211U, // VPCMPUBZ128rrik 1441416360U, // VPCMPUBZ128rrik_alt 1214952427U, // VPCMPUBZ256rmi 113624232U, // VPCMPUBZ256rmi_alt 1484272619U, // VPCMPUBZ256rmik 133711016U, // VPCMPUBZ256rmik_alt 1483404267U, // VPCMPUBZ256rri 302384296U, // VPCMPUBZ256rri_alt 2558047211U, // VPCMPUBZ256rrik 1441416360U, // VPCMPUBZ256rrik_alt 1751823339U, // VPCMPUBZrmi 365282472U, // VPCMPUBZrmi_alt 2021143531U, // VPCMPUBZrmik 1477985448U, // VPCMPUBZrmik_alt 1483404267U, // VPCMPUBZrri 302384296U, // VPCMPUBZrri_alt 2558047211U, // VPCMPUBZrrik 1441416360U, // VPCMPUBZrrik_alt 680178667U, // VPCMPUDZ128rmi 342216063U, // VPCMPUDZ128rmi_alt 3901404139U, // VPCMPUDZ128rmib 2227555711U, // VPCMPUDZ128rmib_alt 2560111595U, // VPCMPUDZ128rmibk 2270711167U, // VPCMPUDZ128rmibk_alt 949498859U, // VPCMPUDZ128rmik 131616127U, // VPCMPUDZ128rmik_alt 1485501419U, // VPCMPUDZ128rri 302386559U, // VPCMPUDZ128rri_alt 2560144363U, // VPCMPUDZ128rrik 1441418623U, // VPCMPUDZ128rrik_alt 1217049579U, // VPCMPUDZ256rmi 113626495U, // VPCMPUDZ256rmi_alt 3901404139U, // VPCMPUDZ256rmib 2764426623U, // VPCMPUDZ256rmib_alt 2560111595U, // VPCMPUDZ256rmibk 2807582079U, // VPCMPUDZ256rmibk_alt 1486369771U, // VPCMPUDZ256rmik 133713279U, // VPCMPUDZ256rmik_alt 1485501419U, // VPCMPUDZ256rri 302386559U, // VPCMPUDZ256rri_alt 2560144363U, // VPCMPUDZ256rrik 1441418623U, // VPCMPUDZ256rrik_alt 1753920491U, // VPCMPUDZrmi 365284735U, // VPCMPUDZrmi_alt 3901404139U, // VPCMPUDZrmib 3032862079U, // VPCMPUDZrmib_alt 2560111595U, // VPCMPUDZrmibk 3076017535U, // VPCMPUDZrmibk_alt 2023240683U, // VPCMPUDZrmik 1477987711U, // VPCMPUDZrmik_alt 1485501419U, // VPCMPUDZrri 302386559U, // VPCMPUDZrri_alt 2560144363U, // VPCMPUDZrrik 1441418623U, // VPCMPUDZrrik_alt 682275819U, // VPCMPUQZ128rmi 342219565U, // VPCMPUQZ128rmi_alt 4171936747U, // VPCMPUQZ128rmib 3282426669U, // VPCMPUQZ128rmib_alt 3635950571U, // VPCMPUQZ128rmibk 3342359341U, // VPCMPUQZ128rmibk_alt 951596011U, // VPCMPUQZ128rmik 131619629U, // VPCMPUQZ128rmik_alt 1487598571U, // VPCMPUQZ128rri 302390061U, // VPCMPUQZ128rri_alt 2562241515U, // VPCMPUQZ128rrik 1441422125U, // VPCMPUQZ128rrik_alt 1219146731U, // VPCMPUQZ256rmi 113629997U, // VPCMPUQZ256rmi_alt 4171936747U, // VPCMPUQZ256rmib 2208684845U, // VPCMPUQZ256rmib_alt 3635950571U, // VPCMPUQZ256rmibk 2268617517U, // VPCMPUQZ256rmibk_alt 1488466923U, // VPCMPUQZ256rmik 133716781U, // VPCMPUQZ256rmik_alt 1487598571U, // VPCMPUQZ256rri 302390061U, // VPCMPUQZ256rri_alt 2562241515U, // VPCMPUQZ256rrik 1441422125U, // VPCMPUQZ256rrik_alt 1756017643U, // VPCMPUQZrmi 365288237U, // VPCMPUQZrmi_alt 4171936747U, // VPCMPUQZrmib 2745555757U, // VPCMPUQZrmib_alt 3635950571U, // VPCMPUQZrmibk 2805488429U, // VPCMPUQZrmibk_alt 2025337835U, // VPCMPUQZrmik 1477991213U, // VPCMPUQZrmik_alt 1487598571U, // VPCMPUQZrri 302390061U, // VPCMPUQZrri_alt 2562241515U, // VPCMPUQZrrik 1441422125U, // VPCMPUQZrrik_alt 684372971U, // VPCMPUWZ128rmi 342223007U, // VPCMPUWZ128rmi_alt 953693163U, // VPCMPUWZ128rmik 131623071U, // VPCMPUWZ128rmik_alt 1489695723U, // VPCMPUWZ128rri 302393503U, // VPCMPUWZ128rri_alt 2564338667U, // VPCMPUWZ128rrik 1441425567U, // VPCMPUWZ128rrik_alt 1221243883U, // VPCMPUWZ256rmi 113633439U, // VPCMPUWZ256rmi_alt 1490564075U, // VPCMPUWZ256rmik 133720223U, // VPCMPUWZ256rmik_alt 1489695723U, // VPCMPUWZ256rri 302393503U, // VPCMPUWZ256rri_alt 2564338667U, // VPCMPUWZ256rrik 1441425567U, // VPCMPUWZ256rrik_alt 1758114795U, // VPCMPUWZrmi 365291679U, // VPCMPUWZrmi_alt 2027434987U, // VPCMPUWZrmik 1477994655U, // VPCMPUWZrmik_alt 1489695723U, // VPCMPUWZrri 302393503U, // VPCMPUWZrri_alt 2564338667U, // VPCMPUWZrrik 1441425567U, // VPCMPUWZrrik_alt 686470123U, // VPCMPWZ128rmi 342222444U, // VPCMPWZ128rmi_alt 955790315U, // VPCMPWZ128rmik 131622508U, // VPCMPWZ128rmik_alt 1491792875U, // VPCMPWZ128rri 302392940U, // VPCMPWZ128rri_alt 2566435819U, // VPCMPWZ128rrik 1441425004U, // VPCMPWZ128rrik_alt 1223341035U, // VPCMPWZ256rmi 113632876U, // VPCMPWZ256rmi_alt 1492661227U, // VPCMPWZ256rmik 133719660U, // VPCMPWZ256rmik_alt 1491792875U, // VPCMPWZ256rri 302392940U, // VPCMPWZ256rri_alt 2566435819U, // VPCMPWZ256rrik 1441425004U, // VPCMPWZ256rrik_alt 1760211947U, // VPCMPWZrmi 365291116U, // VPCMPWZrmi_alt 2029532139U, // VPCMPWZrmik 1477994092U, // VPCMPWZrmik_alt 1491792875U, // VPCMPWZrri 302392940U, // VPCMPWZrri_alt 2566435819U, // VPCMPWZrrik 1441425004U, // VPCMPWZrrik_alt 666432408U, // VPCOMBmi 343098186U, // VPCOMBmi_alt 1471755160U, // VPCOMBri 302957386U, // VPCOMBri_alt 674821016U, // VPCOMDmi 343099063U, // VPCOMDmi_alt 1480143768U, // VPCOMDri 302958263U, // VPCOMDri_alt 2751827150U, // VPCOMPRESSDZ128mrk 2693713102U, // VPCOMPRESSDZ128rrk 2692795598U, // VPCOMPRESSDZ128rrkz 2808450254U, // VPCOMPRESSDZ256mrk 2693713102U, // VPCOMPRESSDZ256rrk 2692795598U, // VPCOMPRESSDZ256rrkz 2810547406U, // VPCOMPRESSDZmrk 2693713102U, // VPCOMPRESSDZrrk 2692795598U, // VPCOMPRESSDZrrkz 2751830609U, // VPCOMPRESSQZ128mrk 2693716561U, // VPCOMPRESSQZ128rrk 2692799057U, // VPCOMPRESSQZ128rrkz 2808453713U, // VPCOMPRESSQZ256mrk 2693716561U, // VPCOMPRESSQZ256rrk 2692799057U, // VPCOMPRESSQZ256rrkz 2810550865U, // VPCOMPRESSQZmrk 2693716561U, // VPCOMPRESSQZrrk 2692799057U, // VPCOMPRESSQZrrkz 676918168U, // VPCOMQmi 343103711U, // VPCOMQmi_alt 1482240920U, // VPCOMQri 302962911U, // VPCOMQri_alt 679015320U, // VPCOMUBmi 343098518U, // VPCOMUBmi_alt 1484338072U, // VPCOMUBri 302957718U, // VPCOMUBri_alt 681112472U, // VPCOMUDmi 343100781U, // VPCOMUDmi_alt 1486435224U, // VPCOMUDri 302959981U, // VPCOMUDri_alt 683209624U, // VPCOMUQmi 343104283U, // VPCOMUQmi_alt 1488532376U, // VPCOMUQri 302963483U, // VPCOMUQri_alt 685306776U, // VPCOMUWmi 343107725U, // VPCOMUWmi_alt 1490629528U, // VPCOMUWri 302966925U, // VPCOMUWri_alt 687403928U, // VPCOMWmi 343107133U, // VPCOMWmi_alt 1492726680U, // VPCOMWri 302966333U, // VPCOMWri_alt 1314085U, // VPCONFLICTDrm 631491877U, // VPCONFLICTDrmb 632786213U, // VPCONFLICTDrmbk 631328037U, // VPCONFLICTDrmbkz 2694204709U, // VPCONFLICTDrmk 2694221093U, // VPCONFLICTDrmkz 551816485U, // VPCONFLICTDrr 2693713189U, // VPCONFLICTDrrk 2692795685U, // VPCONFLICTDrrkz 1317504U, // VPCONFLICTQrm 629430912U, // VPCONFLICTQrmb 630708864U, // VPCONFLICTQrmbk 629250688U, // VPCONFLICTQrmbkz 2694208128U, // VPCONFLICTQrmk 2694224512U, // VPCONFLICTQrmkz 551819904U, // VPCONFLICTQrr 2693716608U, // VPCONFLICTQrrk 2692799104U, // VPCONFLICTQrrkz 101040560U, // VPERM2F128rm 302383536U, // VPERM2F128rr 101040615U, // VPERM2I128rm 302383591U, // VPERM2I128rr 812877503U, // VPERMDYrm 811648703U, // VPERMDYrr 813074111U, // VPERMDZrm 811648703U, // VPERMDZrr 571884879U, // VPERMI2Drm 87508303U, // VPERMI2Drmk 118965583U, // VPERMI2Drmkz 571393359U, // VPERMI2Drr 2693809487U, // VPERMI2Drrk 2693809487U, // VPERMI2Drrkz 571885486U, // VPERMI2PDrm 87508910U, // VPERMI2PDrmk 118966190U, // VPERMI2PDrmkz 571393966U, // VPERMI2PDrr 2693810094U, // VPERMI2PDrrk 2693810094U, // VPERMI2PDrrkz 571891064U, // VPERMI2PSrm 87514488U, // VPERMI2PSrmk 118971768U, // VPERMI2PSrmkz 571399544U, // VPERMI2PSrr 2693815672U, // VPERMI2PSrrk 2693815672U, // VPERMI2PSrrkz 571889010U, // VPERMI2Qrm 87512434U, // VPERMI2Qrmk 118969714U, // VPERMI2Qrmkz 571397490U, // VPERMI2Qrr 2693813618U, // VPERMI2Qrrk 2693813618U, // VPERMI2Qrrkz 1226115011U, // VPERMIL2PDmr 3105163203U, // VPERMIL2PDmrY 422905795U, // VPERMIL2PDrm 156567491U, // VPERMIL2PDrmY 303056835U, // VPERMIL2PDrr 303056835U, // VPERMIL2PDrrY 1226120589U, // VPERMIL2PSmr 3105168781U, // VPERMIL2PSmrY 422911373U, // VPERMIL2PSrm 156573069U, // VPERMIL2PSrmY 303062413U, // VPERMIL2PSrr 303062413U, // VPERMIL2PSrrY 157616572U, // VPERMILPDYmi 811944380U, // VPERMILPDYri 812878268U, // VPERMILPDYrm 811649468U, // VPERMILPDYrr 159713724U, // VPERMILPDZmi 811944380U, // VPERMILPDZri 813074876U, // VPERMILPDZrm 811649468U, // VPERMILPDZrr 82119100U, // VPERMILPDmi 811944380U, // VPERMILPDri 811895228U, // VPERMILPDrm 811649468U, // VPERMILPDrr 157622151U, // VPERMILPSYmi 811949959U, // VPERMILPSYri 812883847U, // VPERMILPSYrm 811655047U, // VPERMILPSYrr 159719303U, // VPERMILPSZmi 811949959U, // VPERMILPSZri 813080455U, // VPERMILPSZrm 811655047U, // VPERMILPSZrr 82124679U, // VPERMILPSmi 811949959U, // VPERMILPSri 811900807U, // VPERMILPSrm 811655047U, // VPERMILPSrr 161810934U, // VPERMPDYmi 811944438U, // VPERMPDYri 159713782U, // VPERMPDZmi 811944438U, // VPERMPDZri 812763638U, // VPERMPDZrm 811649526U, // VPERMPDZrr 812883914U, // VPERMPSYrm 811655114U, // VPERMPSYrr 812769226U, // VPERMPSZrm 811655114U, // VPERMPSZrr 161814759U, // VPERMQYmi 811948263U, // VPERMQYri 163911911U, // VPERMQZmi 811948263U, // VPERMQZri 813078759U, // VPERMQZrm 811653351U, // VPERMQZrr 571884899U, // VPERMT2Drm 87508323U, // VPERMT2Drmk 118965603U, // VPERMT2Drmkz 571393379U, // VPERMT2Drr 2693809507U, // VPERMT2Drrk 2693809507U, // VPERMT2Drrkz 571885562U, // VPERMT2PDrm 87508986U, // VPERMT2PDrmk 118966266U, // VPERMT2PDrmkz 571394042U, // VPERMT2PDrr 2693810170U, // VPERMT2PDrrk 2693810170U, // VPERMT2PDrrkz 571891129U, // VPERMT2PSrm 87514553U, // VPERMT2PSrmk 118971833U, // VPERMT2PSrmkz 571399609U, // VPERMT2PSrr 2693815737U, // VPERMT2PSrrk 2693815737U, // VPERMT2PSrrkz 571889039U, // VPERMT2Qrm 87512463U, // VPERMT2Qrmk 118969743U, // VPERMT2Qrmkz 571397519U, // VPERMT2Qrr 2693813647U, // VPERMT2Qrrk 2693813647U, // VPERMT2Qrrkz 2694170102U, // VPEXPANDDZ128rmk 2693039606U, // VPEXPANDDZ128rmkz 2693711350U, // VPEXPANDDZ128rrk 2692793846U, // VPEXPANDDZ128rrkz 2694186486U, // VPEXPANDDZ256rmk 2694022646U, // VPEXPANDDZ256rmkz 2693711350U, // VPEXPANDDZ256rrk 2692793846U, // VPEXPANDDZ256rrkz 2694202870U, // VPEXPANDDZrmk 2694219254U, // VPEXPANDDZrmkz 2693711350U, // VPEXPANDDZrrk 2692793846U, // VPEXPANDDZrrkz 2694174421U, // VPEXPANDQZ128rmk 2693043925U, // VPEXPANDQZ128rmkz 2693715669U, // VPEXPANDQZ128rrk 2692798165U, // VPEXPANDQZ128rrkz 2694190805U, // VPEXPANDQZ256rmk 2694026965U, // VPEXPANDQZ256rmkz 2693715669U, // VPEXPANDQZ256rrk 2692798165U, // VPEXPANDQZ256rrkz 2694207189U, // VPEXPANDQZrmk 2694223573U, // VPEXPANDQZrmkz 2693715669U, // VPEXPANDQZrrk 2692798165U, // VPEXPANDQZrrkz 319095777U, // VPEXTRBmr 811942881U, // VPEXTRBrr 587533151U, // VPEXTRDmr 811944799U, // VPEXTRDrr 855972331U, // VPEXTRQmr 811948523U, // VPEXTRQrr 1124411181U, // VPEXTRWmr 811951917U, // VPEXTRWri 811951917U, // VPEXTRWrr_REV 928318987U, // VPGATHERDDYrm 552961547U, // VPGATHERDDZrm 928318987U, // VPGATHERDDrm 926226191U, // VPGATHERDQYrm 552949519U, // VPGATHERDQZrm 926226191U, // VPGATHERDQrm 928320241U, // VPGATHERQDYrm 552946417U, // VPGATHERQDZrm 928320241U, // VPGATHERQDrm 926226780U, // VPGATHERQQYrm 552950108U, // VPGATHERQQZrm 926226780U, // VPGATHERQQrm 312723U, // VPHADDBDrm 551814547U, // VPHADDBDrr 316861U, // VPHADDBQrm 551818685U, // VPHADDBQrr 320542U, // VPHADDBWrm 551822366U, // VPHADDBWrr 317049U, // VPHADDDQrm 551818873U, // VPHADDDQrr 812877270U, // VPHADDDYrm 811648470U, // VPHADDDYrr 811894230U, // VPHADDDrm 811648470U, // VPHADDDrr 811902829U, // VPHADDSWrm128 812885869U, // VPHADDSWrm256 811657069U, // VPHADDSWrr128 811657069U, // VPHADDSWrr256 312733U, // VPHADDUBDrm 551814557U, // VPHADDUBDrr 316879U, // VPHADDUBQrm 551818703U, // VPHADDUBQrr 320594U, // VPHADDUBWrm 551822418U, // VPHADDUBWrr 317316U, // VPHADDUDQrm 551819140U, // VPHADDUDQrr 314913U, // VPHADDUWDrm 551816737U, // VPHADDUWDrr 318349U, // VPHADDUWQrm 551820173U, // VPHADDUWQrr 314825U, // VPHADDWDrm 551816649U, // VPHADDWDrr 318324U, // VPHADDWQrm 551820148U, // VPHADDWQrr 812885179U, // VPHADDWYrm 811656379U, // VPHADDWYrr 811902139U, // VPHADDWrm 811656379U, // VPHADDWrr 321704U, // VPHMINPOSUWrm128 551823528U, // VPHMINPOSUWrr128 320513U, // VPHSUBBWrm 551822337U, // VPHSUBBWrr 317024U, // VPHSUBDQrm 551818848U, // VPHSUBDQrr 812877224U, // VPHSUBDYrm 811648424U, // VPHSUBDYrr 811894184U, // VPHSUBDrm 811648424U, // VPHSUBDrr 811902810U, // VPHSUBSWrm128 812885850U, // VPHSUBSWrm256 811657050U, // VPHSUBSWrr128 811657050U, // VPHSUBSWrr256 314815U, // VPHSUBWDrm 551816639U, // VPHSUBWDrr 812885085U, // VPHSUBWYrm 811656285U, // VPHSUBWYrr 811902045U, // VPHSUBWrm 811656285U, // VPHSUBWrr 346407886U, // VPINSRBrm 302384078U, // VPINSRBrr 885377868U, // VPINSRDrm 302385996U, // VPINSRDrr 866507204U, // VPINSRQrm 302389700U, // VPINSRQrr 331736840U, // VPINSRWrmi 302393096U, // VPINSRWrri 1314108U, // VPLZCNTDrm 631491900U, // VPLZCNTDrmb 632786236U, // VPLZCNTDrmbk 631328060U, // VPLZCNTDrmbkz 2694204732U, // VPLZCNTDrmk 2694221116U, // VPLZCNTDrmkz 551816508U, // VPLZCNTDrr 2693713212U, // VPLZCNTDrrk 2692795708U, // VPLZCNTDrrkz 1317578U, // VPLZCNTQrm 629430986U, // VPLZCNTQrmb 630708938U, // VPLZCNTQrmbk 629250762U, // VPLZCNTQrmbkz 2694208202U, // VPLZCNTQrmk 2694224586U, // VPLZCNTQrmkz 551819978U, // VPLZCNTQrr 2693716682U, // VPLZCNTQrrk 2692799178U, // VPLZCNTQrrkz 343098916U, // VPMACSDDrm 302958116U, // VPMACSDDrr 343101203U, // VPMACSDQHrm 302960403U, // VPMACSDQHrr 343102076U, // VPMACSDQLrm 302961276U, // VPMACSDQLrr 343098926U, // VPMACSSDDrm 302958126U, // VPMACSSDDrr 343101214U, // VPMACSSDQHrm 302960414U, // VPMACSSDQHrr 343102087U, // VPMACSSDQLrm 302961287U, // VPMACSSDQLrr 343100938U, // VPMACSSWDrm 302960138U, // VPMACSSWDrr 343107812U, // VPMACSSWWrm 302967012U, // VPMACSSWWrr 343100917U, // VPMACSWDrm 302960117U, // VPMACSWDrr 343107788U, // VPMACSWWrm 302966988U, // VPMACSWWrr 343100949U, // VPMADCSSWDrm 302960149U, // VPMADCSSWDrr 343100927U, // VPMADCSWDrm 302960127U, // VPMADCSWDrr 811902798U, // VPMADDUBSWrm128 812885838U, // VPMADDUBSWrm256 811657038U, // VPMADDUBSWrr128 811657038U, // VPMADDUBSWrr256 812879315U, // VPMADDWDYrm 811650515U, // VPMADDWDYrr 811896275U, // VPMADDWDrm 811650515U, // VPMADDWDrr 319131052U, // VPMASKMOVDYmr 812879276U, // VPMASKMOVDYrm 50695596U, // VPMASKMOVDmr 811896236U, // VPMASKMOVDrm 319134561U, // VPMASKMOVQYmr 812882785U, // VPMASKMOVQYrm 50699105U, // VPMASKMOVQmr 811899745U, // VPMASKMOVQrm 812876886U, // VPMAXSBYrm 811648086U, // VPMAXSBYrr 811893846U, // VPMAXSBZ128rm 87475286U, // VPMAXSBZ128rmk 571851862U, // VPMAXSBZ128rmkz 811648086U, // VPMAXSBZ128rr 2693809238U, // VPMAXSBZ128rrk 571393110U, // VPMAXSBZ128rrkz 812876886U, // VPMAXSBZ256rm 1508438U, // VPMAXSBZ256rmk 571868246U, // VPMAXSBZ256rmkz 811648086U, // VPMAXSBZ256rr 2693809238U, // VPMAXSBZ256rrk 571393110U, // VPMAXSBZ256rrkz 813073494U, // VPMAXSBZrm 87508054U, // VPMAXSBZrmk 571884630U, // VPMAXSBZrmkz 811648086U, // VPMAXSBZrr 2693809238U, // VPMAXSBZrrk 571393110U, // VPMAXSBZrrkz 811893846U, // VPMAXSBrm 811648086U, // VPMAXSBrr 812879115U, // VPMAXSDYrm 811650315U, // VPMAXSDYrr 811896075U, // VPMAXSDZ128rm 356601099U, // VPMAXSDZ128rmb 2505411851U, // VPMAXSDZ128rmbk 1431801099U, // VPMAXSDZ128rmbkz 87477515U, // VPMAXSDZ128rmk 571854091U, // VPMAXSDZ128rmkz 811650315U, // VPMAXSDZ128rr 2693811467U, // VPMAXSDZ128rrk 571395339U, // VPMAXSDZ128rrkz 812879115U, // VPMAXSDZ256rm 360795403U, // VPMAXSDZ256rmb 2509606155U, // VPMAXSDZ256rmbk 1435995403U, // VPMAXSDZ256rmbkz 1510667U, // VPMAXSDZ256rmk 571870475U, // VPMAXSDZ256rmkz 811650315U, // VPMAXSDZ256rr 2693811467U, // VPMAXSDZ256rrk 571395339U, // VPMAXSDZ256rrkz 813075723U, // VPMAXSDZrm 362892555U, // VPMAXSDZrmb 2511703307U, // VPMAXSDZrmbk 1438092555U, // VPMAXSDZrmbkz 87510283U, // VPMAXSDZrmk 571886859U, // VPMAXSDZrmkz 811650315U, // VPMAXSDZrr 2693811467U, // VPMAXSDZrrk 571395339U, // VPMAXSDZrrkz 811896075U, // VPMAXSDrm 811650315U, // VPMAXSDrr 811899506U, // VPMAXSQZ128rm 352426610U, // VPMAXSQZ128rmb 2501204594U, // VPMAXSQZ128rmbk 1427626610U, // VPMAXSQZ128rmbkz 87480946U, // VPMAXSQZ128rmk 571857522U, // VPMAXSQZ128rmkz 811653746U, // VPMAXSQZ128rr 2693814898U, // VPMAXSQZ128rrk 571398770U, // VPMAXSQZ128rrkz 812882546U, // VPMAXSQZ256rm 356620914U, // VPMAXSQZ256rmb 2505398898U, // VPMAXSQZ256rmbk 1431820914U, // VPMAXSQZ256rmbkz 1514098U, // VPMAXSQZ256rmk 571873906U, // VPMAXSQZ256rmkz 811653746U, // VPMAXSQZ256rr 2693814898U, // VPMAXSQZ256rrk 571398770U, // VPMAXSQZ256rrkz 813079154U, // VPMAXSQZrm 360815218U, // VPMAXSQZrmb 2509593202U, // VPMAXSQZrmbk 1436015218U, // VPMAXSQZrmbkz 87513714U, // VPMAXSQZrmk 571890290U, // VPMAXSQZrmkz 811653746U, // VPMAXSQZrr 2693814898U, // VPMAXSQZrrk 571398770U, // VPMAXSQZrrkz 812886010U, // VPMAXSWYrm 811657210U, // VPMAXSWYrr 811902970U, // VPMAXSWZ128rm 87484410U, // VPMAXSWZ128rmk 571860986U, // VPMAXSWZ128rmkz 811657210U, // VPMAXSWZ128rr 2693818362U, // VPMAXSWZ128rrk 571402234U, // VPMAXSWZ128rrkz 812886010U, // VPMAXSWZ256rm 1517562U, // VPMAXSWZ256rmk 571877370U, // VPMAXSWZ256rmkz 811657210U, // VPMAXSWZ256rr 2693818362U, // VPMAXSWZ256rrk 571402234U, // VPMAXSWZ256rrkz 813082618U, // VPMAXSWZrm 87517178U, // VPMAXSWZrmk 571893754U, // VPMAXSWZrmkz 811657210U, // VPMAXSWZrr 2693818362U, // VPMAXSWZrrk 571402234U, // VPMAXSWZrrkz 811902970U, // VPMAXSWrm 811657210U, // VPMAXSWrr 812876984U, // VPMAXUBYrm 811648184U, // VPMAXUBYrr 811893944U, // VPMAXUBZ128rm 87475384U, // VPMAXUBZ128rmk 571851960U, // VPMAXUBZ128rmkz 811648184U, // VPMAXUBZ128rr 2693809336U, // VPMAXUBZ128rrk 571393208U, // VPMAXUBZ128rrkz 812876984U, // VPMAXUBZ256rm 1508536U, // VPMAXUBZ256rmk 571868344U, // VPMAXUBZ256rmkz 811648184U, // VPMAXUBZ256rr 2693809336U, // VPMAXUBZ256rrk 571393208U, // VPMAXUBZ256rrkz 813073592U, // VPMAXUBZrm 87508152U, // VPMAXUBZrmk 571884728U, // VPMAXUBZrmkz 811648184U, // VPMAXUBZrr 2693809336U, // VPMAXUBZrrk 571393208U, // VPMAXUBZrrkz 811893944U, // VPMAXUBrm 811648184U, // VPMAXUBrr 812879240U, // VPMAXUDYrm 811650440U, // VPMAXUDYrr 811896200U, // VPMAXUDZ128rm 356601224U, // VPMAXUDZ128rmb 2505411976U, // VPMAXUDZ128rmbk 1431801224U, // VPMAXUDZ128rmbkz 87477640U, // VPMAXUDZ128rmk 571854216U, // VPMAXUDZ128rmkz 811650440U, // VPMAXUDZ128rr 2693811592U, // VPMAXUDZ128rrk 571395464U, // VPMAXUDZ128rrkz 812879240U, // VPMAXUDZ256rm 360795528U, // VPMAXUDZ256rmb 2509606280U, // VPMAXUDZ256rmbk 1435995528U, // VPMAXUDZ256rmbkz 1510792U, // VPMAXUDZ256rmk 571870600U, // VPMAXUDZ256rmkz 811650440U, // VPMAXUDZ256rr 2693811592U, // VPMAXUDZ256rrk 571395464U, // VPMAXUDZ256rrkz 813075848U, // VPMAXUDZrm 362892680U, // VPMAXUDZrmb 2511703432U, // VPMAXUDZrmbk 1438092680U, // VPMAXUDZrmbkz 87510408U, // VPMAXUDZrmk 571886984U, // VPMAXUDZrmkz 811650440U, // VPMAXUDZrr 2693811592U, // VPMAXUDZrrk 571395464U, // VPMAXUDZrrkz 811896200U, // VPMAXUDrm 811650440U, // VPMAXUDrr 811899702U, // VPMAXUQZ128rm 352426806U, // VPMAXUQZ128rmb 2501204790U, // VPMAXUQZ128rmbk 1427626806U, // VPMAXUQZ128rmbkz 87481142U, // VPMAXUQZ128rmk 571857718U, // VPMAXUQZ128rmkz 811653942U, // VPMAXUQZ128rr 2693815094U, // VPMAXUQZ128rrk 571398966U, // VPMAXUQZ128rrkz 812882742U, // VPMAXUQZ256rm 356621110U, // VPMAXUQZ256rmb 2505399094U, // VPMAXUQZ256rmbk 1431821110U, // VPMAXUQZ256rmbkz 1514294U, // VPMAXUQZ256rmk 571874102U, // VPMAXUQZ256rmkz 811653942U, // VPMAXUQZ256rr 2693815094U, // VPMAXUQZ256rrk 571398966U, // VPMAXUQZ256rrkz 813079350U, // VPMAXUQZrm 360815414U, // VPMAXUQZrmb 2509593398U, // VPMAXUQZrmbk 1436015414U, // VPMAXUQZrmbkz 87513910U, // VPMAXUQZrmk 571890486U, // VPMAXUQZrmkz 811653942U, // VPMAXUQZrr 2693815094U, // VPMAXUQZrrk 571398966U, // VPMAXUQZrrkz 812886197U, // VPMAXUWYrm 811657397U, // VPMAXUWYrr 811903157U, // VPMAXUWZ128rm 87484597U, // VPMAXUWZ128rmk 571861173U, // VPMAXUWZ128rmkz 811657397U, // VPMAXUWZ128rr 2693818549U, // VPMAXUWZ128rrk 571402421U, // VPMAXUWZ128rrkz 812886197U, // VPMAXUWZ256rm 1517749U, // VPMAXUWZ256rmk 571877557U, // VPMAXUWZ256rmkz 811657397U, // VPMAXUWZ256rr 2693818549U, // VPMAXUWZ256rrk 571402421U, // VPMAXUWZ256rrkz 813082805U, // VPMAXUWZrm 87517365U, // VPMAXUWZrmk 571893941U, // VPMAXUWZrmkz 811657397U, // VPMAXUWZrr 2693818549U, // VPMAXUWZrrk 571402421U, // VPMAXUWZrrkz 811903157U, // VPMAXUWrm 811657397U, // VPMAXUWrr 812876827U, // VPMINSBYrm 811648027U, // VPMINSBYrr 811893787U, // VPMINSBZ128rm 87475227U, // VPMINSBZ128rmk 571851803U, // VPMINSBZ128rmkz 811648027U, // VPMINSBZ128rr 2693809179U, // VPMINSBZ128rrk 571393051U, // VPMINSBZ128rrkz 812876827U, // VPMINSBZ256rm 1508379U, // VPMINSBZ256rmk 571868187U, // VPMINSBZ256rmkz 811648027U, // VPMINSBZ256rr 2693809179U, // VPMINSBZ256rrk 571393051U, // VPMINSBZ256rrkz 813073435U, // VPMINSBZrm 87507995U, // VPMINSBZrmk 571884571U, // VPMINSBZrmkz 811648027U, // VPMINSBZrr 2693809179U, // VPMINSBZrrk 571393051U, // VPMINSBZrrkz 811893787U, // VPMINSBrm 811648027U, // VPMINSBrr 812879029U, // VPMINSDYrm 811650229U, // VPMINSDYrr 811895989U, // VPMINSDZ128rm 356601013U, // VPMINSDZ128rmb 2505411765U, // VPMINSDZ128rmbk 1431801013U, // VPMINSDZ128rmbkz 87477429U, // VPMINSDZ128rmk 571854005U, // VPMINSDZ128rmkz 811650229U, // VPMINSDZ128rr 2693811381U, // VPMINSDZ128rrk 571395253U, // VPMINSDZ128rrkz 812879029U, // VPMINSDZ256rm 360795317U, // VPMINSDZ256rmb 2509606069U, // VPMINSDZ256rmbk 1435995317U, // VPMINSDZ256rmbkz 1510581U, // VPMINSDZ256rmk 571870389U, // VPMINSDZ256rmkz 811650229U, // VPMINSDZ256rr 2693811381U, // VPMINSDZ256rrk 571395253U, // VPMINSDZ256rrkz 813075637U, // VPMINSDZrm 362892469U, // VPMINSDZrmb 2511703221U, // VPMINSDZrmbk 1438092469U, // VPMINSDZrmbkz 87510197U, // VPMINSDZrmk 571886773U, // VPMINSDZrmkz 811650229U, // VPMINSDZrr 2693811381U, // VPMINSDZrrk 571395253U, // VPMINSDZrrkz 811895989U, // VPMINSDrm 811650229U, // VPMINSDrr 811899423U, // VPMINSQZ128rm 352426527U, // VPMINSQZ128rmb 2501204511U, // VPMINSQZ128rmbk 1427626527U, // VPMINSQZ128rmbkz 87480863U, // VPMINSQZ128rmk 571857439U, // VPMINSQZ128rmkz 811653663U, // VPMINSQZ128rr 2693814815U, // VPMINSQZ128rrk 571398687U, // VPMINSQZ128rrkz 812882463U, // VPMINSQZ256rm 356620831U, // VPMINSQZ256rmb 2505398815U, // VPMINSQZ256rmbk 1431820831U, // VPMINSQZ256rmbkz 1514015U, // VPMINSQZ256rmk 571873823U, // VPMINSQZ256rmkz 811653663U, // VPMINSQZ256rr 2693814815U, // VPMINSQZ256rrk 571398687U, // VPMINSQZ256rrkz 813079071U, // VPMINSQZrm 360815135U, // VPMINSQZrmb 2509593119U, // VPMINSQZrmbk 1436015135U, // VPMINSQZrmbkz 87513631U, // VPMINSQZrmk 571890207U, // VPMINSQZrmkz 811653663U, // VPMINSQZrr 2693814815U, // VPMINSQZrrk 571398687U, // VPMINSQZrrkz 812885919U, // VPMINSWYrm 811657119U, // VPMINSWYrr 811902879U, // VPMINSWZ128rm 87484319U, // VPMINSWZ128rmk 571860895U, // VPMINSWZ128rmkz 811657119U, // VPMINSWZ128rr 2693818271U, // VPMINSWZ128rrk 571402143U, // VPMINSWZ128rrkz 812885919U, // VPMINSWZ256rm 1517471U, // VPMINSWZ256rmk 571877279U, // VPMINSWZ256rmkz 811657119U, // VPMINSWZ256rr 2693818271U, // VPMINSWZ256rrk 571402143U, // VPMINSWZ256rrkz 813082527U, // VPMINSWZrm 87517087U, // VPMINSWZrmk 571893663U, // VPMINSWZrmkz 811657119U, // VPMINSWZrr 2693818271U, // VPMINSWZrrk 571402143U, // VPMINSWZrrkz 811902879U, // VPMINSWrm 811657119U, // VPMINSWrr 812876959U, // VPMINUBYrm 811648159U, // VPMINUBYrr 811893919U, // VPMINUBZ128rm 87475359U, // VPMINUBZ128rmk 571851935U, // VPMINUBZ128rmkz 811648159U, // VPMINUBZ128rr 2693809311U, // VPMINUBZ128rrk 571393183U, // VPMINUBZ128rrkz 812876959U, // VPMINUBZ256rm 1508511U, // VPMINUBZ256rmk 571868319U, // VPMINUBZ256rmkz 811648159U, // VPMINUBZ256rr 2693809311U, // VPMINUBZ256rrk 571393183U, // VPMINUBZ256rrkz 813073567U, // VPMINUBZrm 87508127U, // VPMINUBZrmk 571884703U, // VPMINUBZrmkz 811648159U, // VPMINUBZrr 2693809311U, // VPMINUBZrrk 571393183U, // VPMINUBZrrkz 811893919U, // VPMINUBrm 811648159U, // VPMINUBrr 812879222U, // VPMINUDYrm 811650422U, // VPMINUDYrr 811896182U, // VPMINUDZ128rm 356601206U, // VPMINUDZ128rmb 2505411958U, // VPMINUDZ128rmbk 1431801206U, // VPMINUDZ128rmbkz 87477622U, // VPMINUDZ128rmk 571854198U, // VPMINUDZ128rmkz 811650422U, // VPMINUDZ128rr 2693811574U, // VPMINUDZ128rrk 571395446U, // VPMINUDZ128rrkz 812879222U, // VPMINUDZ256rm 360795510U, // VPMINUDZ256rmb 2509606262U, // VPMINUDZ256rmbk 1435995510U, // VPMINUDZ256rmbkz 1510774U, // VPMINUDZ256rmk 571870582U, // VPMINUDZ256rmkz 811650422U, // VPMINUDZ256rr 2693811574U, // VPMINUDZ256rrk 571395446U, // VPMINUDZ256rrkz 813075830U, // VPMINUDZrm 362892662U, // VPMINUDZrmb 2511703414U, // VPMINUDZrmbk 1438092662U, // VPMINUDZrmbkz 87510390U, // VPMINUDZrmk 571886966U, // VPMINUDZrmkz 811650422U, // VPMINUDZrr 2693811574U, // VPMINUDZrrk 571395446U, // VPMINUDZrrkz 811896182U, // VPMINUDrm 811650422U, // VPMINUDrr 811899684U, // VPMINUQZ128rm 352426788U, // VPMINUQZ128rmb 2501204772U, // VPMINUQZ128rmbk 1427626788U, // VPMINUQZ128rmbkz 87481124U, // VPMINUQZ128rmk 571857700U, // VPMINUQZ128rmkz 811653924U, // VPMINUQZ128rr 2693815076U, // VPMINUQZ128rrk 571398948U, // VPMINUQZ128rrkz 812882724U, // VPMINUQZ256rm 356621092U, // VPMINUQZ256rmb 2505399076U, // VPMINUQZ256rmbk 1431821092U, // VPMINUQZ256rmbkz 1514276U, // VPMINUQZ256rmk 571874084U, // VPMINUQZ256rmkz 811653924U, // VPMINUQZ256rr 2693815076U, // VPMINUQZ256rrk 571398948U, // VPMINUQZ256rrkz 813079332U, // VPMINUQZrm 360815396U, // VPMINUQZrmb 2509593380U, // VPMINUQZrmbk 1436015396U, // VPMINUQZrmbkz 87513892U, // VPMINUQZrmk 571890468U, // VPMINUQZrmkz 811653924U, // VPMINUQZrr 2693815076U, // VPMINUQZrrk 571398948U, // VPMINUQZrrkz 812886166U, // VPMINUWYrm 811657366U, // VPMINUWYrr 811903126U, // VPMINUWZ128rm 87484566U, // VPMINUWZ128rmk 571861142U, // VPMINUWZ128rmkz 811657366U, // VPMINUWZ128rr 2693818518U, // VPMINUWZ128rrk 571402390U, // VPMINUWZ128rrkz 812886166U, // VPMINUWZ256rm 1517718U, // VPMINUWZ256rmk 571877526U, // VPMINUWZ256rmkz 811657366U, // VPMINUWZ256rr 2693818518U, // VPMINUWZ256rrk 571402390U, // VPMINUWZ256rrkz 813082774U, // VPMINUWZrm 87517334U, // VPMINUWZrmk 571893910U, // VPMINUWZrmkz 811657366U, // VPMINUWZrr 2693818518U, // VPMINUWZrrk 571402390U, // VPMINUWZrrkz 811903126U, // VPMINUWrm 811657366U, // VPMINUWrr 67142363U, // VPMOVDBmr 2751824603U, // VPMOVDBmrk 551813851U, // VPMOVDBrr 2692793051U, // VPMOVDBrrk 2692793051U, // VPMOVDBrrkz 123774255U, // VPMOVDWmr 2808456495U, // VPMOVDWmrk 551822639U, // VPMOVDWrr 2692801839U, // VPMOVDWrrk 2692801839U, // VPMOVDWrrkz 551813735U, // VPMOVM2BZ128rr 551813735U, // VPMOVM2BZ256rr 551813735U, // VPMOVM2BZrr 551814489U, // VPMOVM2DZ128rr 551814489U, // VPMOVM2DZ256rr 551814489U, // VPMOVM2DZrr 551818620U, // VPMOVM2QZ128rr 551818620U, // VPMOVM2QZ256rr 551818620U, // VPMOVM2QZrr 551822291U, // VPMOVM2WZ128rr 551822291U, // VPMOVM2WZ256rr 551822291U, // VPMOVM2WZrr 551813897U, // VPMOVMSKBYrr 551813897U, // VPMOVMSKBrr 67142552U, // VPMOVQBmr 2751824792U, // VPMOVQBmrk 551814040U, // VPMOVQBrr 2692793240U, // VPMOVQBrrk 2692793240U, // VPMOVQBrrkz 123767583U, // VPMOVQDmr 2808449823U, // VPMOVQDmrk 551815967U, // VPMOVQDrr 2692795167U, // VPMOVQDrrk 2692795167U, // VPMOVQDrrkz 67151543U, // VPMOVQWmr 2751833783U, // VPMOVQWmrk 551823031U, // VPMOVQWrr 2692802231U, // VPMOVQWrrk 2692802231U, // VPMOVQWrrkz 67142353U, // VPMOVSDBmr 2751824593U, // VPMOVSDBmrk 551813841U, // VPMOVSDBrr 2692793041U, // VPMOVSDBrrk 2692793041U, // VPMOVSDBrrkz 123774245U, // VPMOVSDWmr 2808456485U, // VPMOVSDWmrk 551822629U, // VPMOVSDWrr 2692801829U, // VPMOVSDWrrk 2692801829U, // VPMOVSDWrrkz 67142542U, // VPMOVSQBmr 2751824782U, // VPMOVSQBmrk 551814030U, // VPMOVSQBrr 2692793230U, // VPMOVSQBrrk 2692793230U, // VPMOVSQBrrkz 123767573U, // VPMOVSQDmr 2808449813U, // VPMOVSQDmrk 551815957U, // VPMOVSQDrr 2692795157U, // VPMOVSQDrrk 2692795157U, // VPMOVSQDrrkz 67151533U, // VPMOVSQWmr 2751833773U, // VPMOVSQWmrk 551823021U, // VPMOVSQWrr 2692802221U, // VPMOVSQWrrk 2692802221U, // VPMOVSQWrrkz 551830969U, // VPMOVSXBDYrm 551814585U, // VPMOVSXBDYrr 312761U, // VPMOVSXBDZrm 2693039545U, // VPMOVSXBDZrmk 2693039545U, // VPMOVSXBDZrmkz 551814585U, // VPMOVSXBDZrr 2692793785U, // VPMOVSXBDZrrk 2692793785U, // VPMOVSXBDZrrkz 551798201U, // VPMOVSXBDrm 551814585U, // VPMOVSXBDrr 551802346U, // VPMOVSXBQYrm 551818730U, // VPMOVSXBQYrr 316906U, // VPMOVSXBQZrm 2693043690U, // VPMOVSXBQZrmk 2693043690U, // VPMOVSXBQZrmkz 551818730U, // VPMOVSXBQZrr 2692797930U, // VPMOVSXBQZrrk 2692797930U, // VPMOVSXBQZrrkz 415210U, // VPMOVSXBQrm 551818730U, // VPMOVSXBQrr 320630U, // VPMOVSXBWYrm 551822454U, // VPMOVSXBWYrr 551838838U, // VPMOVSXBWrm 551822454U, // VPMOVSXBWrr 317337U, // VPMOVSXDQYrm 551819161U, // VPMOVSXDQYrr 1300377U, // VPMOVSXDQZrm 2694027161U, // VPMOVSXDQZrmk 2694027161U, // VPMOVSXDQZrmkz 551819161U, // VPMOVSXDQZrr 2692798361U, // VPMOVSXDQZrrk 2692798361U, // VPMOVSXDQZrrkz 551835545U, // VPMOVSXDQrm 551819161U, // VPMOVSXDQrr 314924U, // VPMOVSXWDYrm 551816748U, // VPMOVSXWDYrr 1297964U, // VPMOVSXWDZrm 2694024748U, // VPMOVSXWDZrmk 2694024748U, // VPMOVSXWDZrmkz 551816748U, // VPMOVSXWDZrr 2692795948U, // VPMOVSXWDZrrk 2692795948U, // VPMOVSXWDZrrkz 551833132U, // VPMOVSXWDrm 551816748U, // VPMOVSXWDrr 551836568U, // VPMOVSXWQYrm 551820184U, // VPMOVSXWQYrr 318360U, // VPMOVSXWQZrm 2693045144U, // VPMOVSXWQZrmk 2693045144U, // VPMOVSXWQZrmkz 551820184U, // VPMOVSXWQZrr 2692799384U, // VPMOVSXWQZrrk 2692799384U, // VPMOVSXWQZrrkz 551803800U, // VPMOVSXWQrm 551820184U, // VPMOVSXWQrr 67142342U, // VPMOVUSDBmr 2751824582U, // VPMOVUSDBmrk 551813830U, // VPMOVUSDBrr 2692793030U, // VPMOVUSDBrrk 2692793030U, // VPMOVUSDBrrkz 123774234U, // VPMOVUSDWmr 2808456474U, // VPMOVUSDWmrk 551822618U, // VPMOVUSDWrr 2692801818U, // VPMOVUSDWrrk 2692801818U, // VPMOVUSDWrrkz 67142531U, // VPMOVUSQBmr 2751824771U, // VPMOVUSQBmrk 551814019U, // VPMOVUSQBrr 2692793219U, // VPMOVUSQBrrk 2692793219U, // VPMOVUSQBrrkz 123767562U, // VPMOVUSQDmr 2808449802U, // VPMOVUSQDmrk 551815946U, // VPMOVUSQDrr 2692795146U, // VPMOVUSQDrrk 2692795146U, // VPMOVUSQDrrkz 67151522U, // VPMOVUSQWmr 2751833762U, // VPMOVUSQWmrk 551823010U, // VPMOVUSQWrr 2692802210U, // VPMOVUSQWrrk 2692802210U, // VPMOVUSQWrrkz 551830980U, // VPMOVZXBDYrm 551814596U, // VPMOVZXBDYrr 312772U, // VPMOVZXBDZrm 2693039556U, // VPMOVZXBDZrmk 2693039556U, // VPMOVZXBDZrmkz 551814596U, // VPMOVZXBDZrr 2692793796U, // VPMOVZXBDZrrk 2692793796U, // VPMOVZXBDZrrkz 551798212U, // VPMOVZXBDrm 551814596U, // VPMOVZXBDrr 551802357U, // VPMOVZXBQYrm 551818741U, // VPMOVZXBQYrr 316917U, // VPMOVZXBQZrm 2693043701U, // VPMOVZXBQZrmk 2693043701U, // VPMOVZXBQZrmkz 551818741U, // VPMOVZXBQZrr 2692797941U, // VPMOVZXBQZrrk 2692797941U, // VPMOVZXBQZrrkz 415221U, // VPMOVZXBQrm 551818741U, // VPMOVZXBQrr 320641U, // VPMOVZXBWYrm 551822465U, // VPMOVZXBWYrr 551838849U, // VPMOVZXBWrm 551822465U, // VPMOVZXBWrr 317348U, // VPMOVZXDQYrm 551819172U, // VPMOVZXDQYrr 1300388U, // VPMOVZXDQZrm 2694027172U, // VPMOVZXDQZrmk 2694027172U, // VPMOVZXDQZrmkz 551819172U, // VPMOVZXDQZrr 2692798372U, // VPMOVZXDQZrrk 2692798372U, // VPMOVZXDQZrrkz 551835556U, // VPMOVZXDQrm 551819172U, // VPMOVZXDQrr 314935U, // VPMOVZXWDYrm 551816759U, // VPMOVZXWDYrr 1297975U, // VPMOVZXWDZrm 2694024759U, // VPMOVZXWDZrmk 2694024759U, // VPMOVZXWDZrmkz 551816759U, // VPMOVZXWDZrr 2692795959U, // VPMOVZXWDZrrk 2692795959U, // VPMOVZXWDZrrkz 551833143U, // VPMOVZXWDrm 551816759U, // VPMOVZXWDrr 551836579U, // VPMOVZXWQYrm 551820195U, // VPMOVZXWQYrr 318371U, // VPMOVZXWQZrm 2693045155U, // VPMOVZXWQZrmk 2693045155U, // VPMOVZXWQZrmkz 551820195U, // VPMOVZXWQZrr 2692799395U, // VPMOVZXWQZrrk 2692799395U, // VPMOVZXWQZrrkz 551803811U, // VPMOVZXWQrm 551820195U, // VPMOVZXWQrr 812881597U, // VPMULDQYrm 811652797U, // VPMULDQYrr 813078205U, // VPMULDQZrm 360814269U, // VPMULDQZrmb 1436014269U, // VPMULDQZrmbk 1436014269U, // VPMULDQZrmbkz 571889341U, // VPMULDQZrmk 571889341U, // VPMULDQZrmkz 811652797U, // VPMULDQZrr 571397821U, // VPMULDQZrrk 571397821U, // VPMULDQZrrkz 811898557U, // VPMULDQrm 811652797U, // VPMULDQrr 811902904U, // VPMULHRSWrm128 812885944U, // VPMULHRSWrm256 811657144U, // VPMULHRSWrr128 811657144U, // VPMULHRSWrr256 812886147U, // VPMULHUWYrm 811657347U, // VPMULHUWYrr 811903107U, // VPMULHUWrm 811657347U, // VPMULHUWrr 812885431U, // VPMULHWYrm 811656631U, // VPMULHWYrr 811902391U, // VPMULHWrm 811656631U, // VPMULHWrr 812877437U, // VPMULLDYrm 811648637U, // VPMULLDYrr 811894397U, // VPMULLDZ128rm 356599421U, // VPMULLDZ128rmb 2505410173U, // VPMULLDZ128rmbk 1431799421U, // VPMULLDZ128rmbkz 87475837U, // VPMULLDZ128rmk 571852413U, // VPMULLDZ128rmkz 811648637U, // VPMULLDZ128rr 2693809789U, // VPMULLDZ128rrk 571393661U, // VPMULLDZ128rrkz 812877437U, // VPMULLDZ256rm 360793725U, // VPMULLDZ256rmb 2509604477U, // VPMULLDZ256rmbk 1435993725U, // VPMULLDZ256rmbkz 1508989U, // VPMULLDZ256rmk 571868797U, // VPMULLDZ256rmkz 811648637U, // VPMULLDZ256rr 2693809789U, // VPMULLDZ256rrk 571393661U, // VPMULLDZ256rrkz 813074045U, // VPMULLDZrm 362890877U, // VPMULLDZrmb 2511701629U, // VPMULLDZrmbk 1438090877U, // VPMULLDZrmbkz 87508605U, // VPMULLDZrmk 571885181U, // VPMULLDZrmkz 811648637U, // VPMULLDZrr 2693809789U, // VPMULLDZrrk 571393661U, // VPMULLDZrrkz 811894397U, // VPMULLDrm 811648637U, // VPMULLDrr 811899019U, // VPMULLQZ128rm 352426123U, // VPMULLQZ128rmb 2501204107U, // VPMULLQZ128rmbk 1427626123U, // VPMULLQZ128rmbkz 87480459U, // VPMULLQZ128rmk 571857035U, // VPMULLQZ128rmkz 811653259U, // VPMULLQZ128rr 2693814411U, // VPMULLQZ128rrk 571398283U, // VPMULLQZ128rrkz 812882059U, // VPMULLQZ256rm 356620427U, // VPMULLQZ256rmb 2505398411U, // VPMULLQZ256rmbk 1431820427U, // VPMULLQZ256rmbkz 1513611U, // VPMULLQZ256rmk 571873419U, // VPMULLQZ256rmkz 811653259U, // VPMULLQZ256rr 2693814411U, // VPMULLQZ256rrk 571398283U, // VPMULLQZ256rrkz 813078667U, // VPMULLQZrm 360814731U, // VPMULLQZrmb 2509592715U, // VPMULLQZrmbk 1436014731U, // VPMULLQZrmbkz 87513227U, // VPMULLQZrmk 571889803U, // VPMULLQZrmkz 811653259U, // VPMULLQZrr 2693814411U, // VPMULLQZrrk 571398283U, // VPMULLQZrrkz 812885500U, // VPMULLWYrm 811656700U, // VPMULLWYrr 811902460U, // VPMULLWZ128rm 87483900U, // VPMULLWZ128rmk 571860476U, // VPMULLWZ128rmkz 811656700U, // VPMULLWZ128rr 2693817852U, // VPMULLWZ128rrk 571401724U, // VPMULLWZ128rrkz 812885500U, // VPMULLWZ256rm 1517052U, // VPMULLWZ256rmk 571876860U, // VPMULLWZ256rmkz 811656700U, // VPMULLWZ256rr 2693817852U, // VPMULLWZ256rrk 571401724U, // VPMULLWZ256rrkz 813082108U, // VPMULLWZrm 87516668U, // VPMULLWZrmk 571893244U, // VPMULLWZrmkz 811656700U, // VPMULLWZrr 2693817852U, // VPMULLWZrrk 571401724U, // VPMULLWZrrkz 811902460U, // VPMULLWrm 811656700U, // VPMULLWrr 812881807U, // VPMULUDQYrm 811653007U, // VPMULUDQYrr 813078415U, // VPMULUDQZrm 360814479U, // VPMULUDQZrmb 1436014479U, // VPMULUDQZrmbk 1436014479U, // VPMULUDQZrmbkz 571889551U, // VPMULUDQZrmk 571889551U, // VPMULUDQZrmkz 811653007U, // VPMULUDQZrr 571398031U, // VPMULUDQZrrk 571398031U, // VPMULUDQZrrkz 811898767U, // VPMULUDQrm 811653007U, // VPMULUDQrr 811895606U, // VPORDZ128rm 356600630U, // VPORDZ128rmb 2505411382U, // VPORDZ128rmbk 1431800630U, // VPORDZ128rmbkz 87477046U, // VPORDZ128rmk 571853622U, // VPORDZ128rmkz 811649846U, // VPORDZ128rr 2693810998U, // VPORDZ128rrk 571394870U, // VPORDZ128rrkz 812878646U, // VPORDZ256rm 360794934U, // VPORDZ256rmb 2509605686U, // VPORDZ256rmbk 1435994934U, // VPORDZ256rmbkz 1510198U, // VPORDZ256rmk 571870006U, // VPORDZ256rmkz 811649846U, // VPORDZ256rr 2693810998U, // VPORDZ256rrk 571394870U, // VPORDZ256rrkz 813075254U, // VPORDZrm 362892086U, // VPORDZrmb 2511702838U, // VPORDZrmbk 1438092086U, // VPORDZrmbkz 87509814U, // VPORDZrmk 571886390U, // VPORDZrmkz 811649846U, // VPORDZrr 2693810998U, // VPORDZrrk 571394870U, // VPORDZrrkz 811899291U, // VPORQZ128rm 352426395U, // VPORQZ128rmb 2501204379U, // VPORQZ128rmbk 1427626395U, // VPORQZ128rmbkz 87480731U, // VPORQZ128rmk 571857307U, // VPORQZ128rmkz 811653531U, // VPORQZ128rr 2693814683U, // VPORQZ128rrk 571398555U, // VPORQZ128rrkz 812882331U, // VPORQZ256rm 356620699U, // VPORQZ256rmb 2505398683U, // VPORQZ256rmbk 1431820699U, // VPORQZ256rmbkz 1513883U, // VPORQZ256rmk 571873691U, // VPORQZ256rmkz 811653531U, // VPORQZ256rr 2693814683U, // VPORQZ256rrk 571398555U, // VPORQZ256rrkz 813078939U, // VPORQZrm 360815003U, // VPORQZrmb 2509592987U, // VPORQZrmbk 1436015003U, // VPORQZrmbkz 87513499U, // VPORQZrmk 571890075U, // VPORQZrmkz 811653531U, // VPORQZrr 2693814683U, // VPORQZrrk 571398555U, // VPORQZrrkz 812882953U, // VPORYrm 811654153U, // VPORYrr 811899913U, // VPORrm 811654153U, // VPORrr 343102546U, // VPPERMmr 303420498U, // VPPERMrm 302961746U, // VPPERMrr 25527414U, // VPROTBmi 25527414U, // VPROTBmr 811648118U, // VPROTBri 811893878U, // VPROTBrm 811648118U, // VPROTBrr 25529677U, // VPROTDmi 25529677U, // VPROTDmr 811650381U, // VPROTDri 811896141U, // VPROTDrm 811650381U, // VPROTDrr 25533163U, // VPROTQmi 25533163U, // VPROTQmr 811653867U, // VPROTQri 811899627U, // VPROTQrm 811653867U, // VPROTQrr 25536611U, // VPROTWmi 25536611U, // VPROTWmr 811657315U, // VPROTWri 811903075U, // VPROTWrm 811657315U, // VPROTWrr 812885013U, // VPSADBWYrm 811656213U, // VPSADBWYrr 811901973U, // VPSADBWrm 811656213U, // VPSADBWrr 2712880663U, // VPSCATTERDDZmr 2714982171U, // VPSCATTERDQZmr 2714979069U, // VPSCATTERQDZmr 2714982760U, // VPSCATTERQQZmr 25526920U, // VPSHABmr 811893384U, // VPSHABrm 811647624U, // VPSHABrr 25527683U, // VPSHADmr 811894147U, // VPSHADrm 811648387U, // VPSHADrr 25531807U, // VPSHAQmr 811898271U, // VPSHAQrm 811652511U, // VPSHAQrr 25535459U, // VPSHAWmr 811901923U, // VPSHAWrm 811656163U, // VPSHAWrr 25527072U, // VPSHLBmr 811893536U, // VPSHLBrm 811647776U, // VPSHLBrr 25527917U, // VPSHLDmr 811894381U, // VPSHLDrm 811648621U, // VPSHLDrr 25532532U, // VPSHLQmr 811898996U, // VPSHLQrm 811653236U, // VPSHLQrr 25535972U, // VPSHLWmr 811902436U, // VPSHLWrm 811656676U, // VPSHLWrr 812876516U, // VPSHUFBYrm 811647716U, // VPSHUFBYrr 811893476U, // VPSHUFBrm 811647716U, // VPSHUFBrr 161809984U, // VPSHUFDYmi 811943488U, // VPSHUFDYri 163907136U, // VPSHUFDZmi 811943488U, // VPSHUFDZri 25495104U, // VPSHUFDmi 811943488U, // VPSHUFDri 161818029U, // VPSHUFHWYmi 811951533U, // VPSHUFHWYri 25503149U, // VPSHUFHWmi 811951533U, // VPSHUFHWri 161818074U, // VPSHUFLWYmi 811951578U, // VPSHUFLWYri 25503194U, // VPSHUFLWmi 811951578U, // VPSHUFLWri 812876634U, // VPSIGNBYrm 811647834U, // VPSIGNBYrr 811893594U, // VPSIGNBrm 811647834U, // VPSIGNBrr 812877554U, // VPSIGNDYrm 811648754U, // VPSIGNDYrr 811894514U, // VPSIGNDrm 811648754U, // VPSIGNDrr 812885581U, // VPSIGNWYrm 811656781U, // VPSIGNWYrr 811902541U, // VPSIGNWrm 811656781U, // VPSIGNWrr 811947691U, // VPSLLDQYri 811947691U, // VPSLLDQri 811943541U, // VPSLLDYri 811894389U, // VPSLLDYrm 811648629U, // VPSLLDYrr 3922003573U, // VPSLLDZmi 672679541U, // VPSLLDZmik 633718389U, // VPSLLDZmikz 811943541U, // VPSLLDZri 636110453U, // VPSLLDZrik 570820213U, // VPSLLDZrikz 811894389U, // VPSLLDZrm 167167605U, // VPSLLDZrmk 571852405U, // VPSLLDZrmkz 811648629U, // VPSLLDZrr 2693809781U, // VPSLLDZrrk 571393653U, // VPSLLDZrrkz 811943541U, // VPSLLDri 811894389U, // VPSLLDrm 811648629U, // VPSLLDrr 811948163U, // VPSLLQYri 811899011U, // VPSLLQYrm 811653251U, // VPSLLQYrr 3922008195U, // VPSLLQZmi 672684163U, // VPSLLQZmik 633723011U, // VPSLLQZmikz 811948163U, // VPSLLQZri 636115075U, // VPSLLQZrik 570824835U, // VPSLLQZrikz 811899011U, // VPSLLQZrm 167172227U, // VPSLLQZrmk 571857027U, // VPSLLQZrmkz 811653251U, // VPSLLQZrr 2693814403U, // VPSLLQZrrk 571398275U, // VPSLLQZrrkz 811948163U, // VPSLLQri 811899011U, // VPSLLQrm 811653251U, // VPSLLQrr 812879258U, // VPSLLVDYrm 811650458U, // VPSLLVDYrr 813075866U, // VPSLLVDZrm 167202202U, // VPSLLVDZrmk 571887002U, // VPSLLVDZrmkz 811650458U, // VPSLLVDZrr 2693811610U, // VPSLLVDZrrk 571395482U, // VPSLLVDZrrkz 811896218U, // VPSLLVDrm 811650458U, // VPSLLVDrr 812882767U, // VPSLLVQYrm 811653967U, // VPSLLVQYrr 813079375U, // VPSLLVQZrm 167205711U, // VPSLLVQZrmk 571890511U, // VPSLLVQZrmkz 811653967U, // VPSLLVQZrr 2693815119U, // VPSLLVQZrrk 571398991U, // VPSLLVQZrrkz 811899727U, // VPSLLVQrm 811653967U, // VPSLLVQrr 811951604U, // VPSLLWYri 811902452U, // VPSLLWYrm 811656692U, // VPSLLWYrr 811951604U, // VPSLLWri 811902452U, // VPSLLWrm 811656692U, // VPSLLWrr 811943307U, // VPSRADYri 811894155U, // VPSRADYrm 811648395U, // VPSRADYrr 3922003339U, // VPSRADZmi 672679307U, // VPSRADZmik 633718155U, // VPSRADZmikz 811943307U, // VPSRADZri 636110219U, // VPSRADZrik 570819979U, // VPSRADZrikz 811894155U, // VPSRADZrm 167167371U, // VPSRADZrmk 571852171U, // VPSRADZrmkz 811648395U, // VPSRADZrr 2693809547U, // VPSRADZrrk 571393419U, // VPSRADZrrkz 811943307U, // VPSRADri 811894155U, // VPSRADrm 811648395U, // VPSRADrr 3922007463U, // VPSRAQZmi 672683431U, // VPSRAQZmik 633722279U, // VPSRAQZmikz 811947431U, // VPSRAQZri 636114343U, // VPSRAQZrik 570824103U, // VPSRAQZrikz 811898279U, // VPSRAQZrm 167171495U, // VPSRAQZrmk 571856295U, // VPSRAQZrmkz 811652519U, // VPSRAQZrr 2693813671U, // VPSRAQZrrk 571397543U, // VPSRAQZrrkz 812879249U, // VPSRAVDYrm 811650449U, // VPSRAVDYrr 813075857U, // VPSRAVDZrm 167202193U, // VPSRAVDZrmk 571886993U, // VPSRAVDZrmkz 811650449U, // VPSRAVDZrr 2693811601U, // VPSRAVDZrrk 571395473U, // VPSRAVDZrrkz 811896209U, // VPSRAVDrm 811650449U, // VPSRAVDrr 813079359U, // VPSRAVQZrm 167205695U, // VPSRAVQZrmk 571890495U, // VPSRAVQZrmkz 811653951U, // VPSRAVQZrr 2693815103U, // VPSRAVQZrrk 571398975U, // VPSRAVQZrrkz 811951083U, // VPSRAWYri 811901931U, // VPSRAWYrm 811656171U, // VPSRAWYrr 811951083U, // VPSRAWri 811901931U, // VPSRAWrm 811656171U, // VPSRAWrr 811947700U, // VPSRLDQYri 811947700U, // VPSRLDQri 811943558U, // VPSRLDYri 811894406U, // VPSRLDYrm 811648646U, // VPSRLDYrr 3922003590U, // VPSRLDZmi 672679558U, // VPSRLDZmik 633718406U, // VPSRLDZmikz 811943558U, // VPSRLDZri 636110470U, // VPSRLDZrik 570820230U, // VPSRLDZrikz 811894406U, // VPSRLDZrm 167167622U, // VPSRLDZrmk 571852422U, // VPSRLDZrmkz 811648646U, // VPSRLDZrr 2693809798U, // VPSRLDZrrk 571393670U, // VPSRLDZrrkz 811943558U, // VPSRLDri 811894406U, // VPSRLDrm 811648646U, // VPSRLDrr 811948186U, // VPSRLQYri 811899034U, // VPSRLQYrm 811653274U, // VPSRLQYrr 3922008218U, // VPSRLQZmi 672684186U, // VPSRLQZmik 633723034U, // VPSRLQZmikz 811948186U, // VPSRLQZri 636115098U, // VPSRLQZrik 570824858U, // VPSRLQZrikz 811899034U, // VPSRLQZrm 167172250U, // VPSRLQZrmk 571857050U, // VPSRLQZrmkz 811653274U, // VPSRLQZrr 2693814426U, // VPSRLQZrrk 571398298U, // VPSRLQZrrkz 811948186U, // VPSRLQri 811899034U, // VPSRLQrm 811653274U, // VPSRLQrr 812879267U, // VPSRLVDYrm 811650467U, // VPSRLVDYrr 813075875U, // VPSRLVDZrm 167202211U, // VPSRLVDZrmk 571887011U, // VPSRLVDZrmkz 811650467U, // VPSRLVDZrr 2693811619U, // VPSRLVDZrrk 571395491U, // VPSRLVDZrrkz 811896227U, // VPSRLVDrm 811650467U, // VPSRLVDrr 812882776U, // VPSRLVQYrm 811653976U, // VPSRLVQYrr 813079384U, // VPSRLVQZrm 167205720U, // VPSRLVQZrmk 571890520U, // VPSRLVQZrmkz 811653976U, // VPSRLVQZrr 2693815128U, // VPSRLVQZrrk 571399000U, // VPSRLVQZrrkz 811899736U, // VPSRLVQrm 811653976U, // VPSRLVQrr 811951627U, // VPSRLWYri 811902475U, // VPSRLWYrm 811656715U, // VPSRLWYrr 811951627U, // VPSRLWri 811902475U, // VPSRLWrm 811656715U, // VPSRLWrr 812876438U, // VPSUBBYrm 811647638U, // VPSUBBYrr 811893398U, // VPSUBBZ128rm 87474838U, // VPSUBBZ128rmk 571851414U, // VPSUBBZ128rmkz 811647638U, // VPSUBBZ128rr 2693808790U, // VPSUBBZ128rrk 571392662U, // VPSUBBZ128rrkz 812876438U, // VPSUBBZ256rm 1507990U, // VPSUBBZ256rmk 571867798U, // VPSUBBZ256rmkz 811647638U, // VPSUBBZ256rr 2693808790U, // VPSUBBZ256rrk 571392662U, // VPSUBBZ256rrkz 813073046U, // VPSUBBZrm 87507606U, // VPSUBBZrmk 571884182U, // VPSUBBZrmkz 811647638U, // VPSUBBZrr 2693808790U, // VPSUBBZrrk 571392662U, // VPSUBBZrrkz 811893398U, // VPSUBBrm 811647638U, // VPSUBBrr 812877233U, // VPSUBDYrm 811648433U, // VPSUBDYrr 811894193U, // VPSUBDZ128rm 356599217U, // VPSUBDZ128rmb 2505409969U, // VPSUBDZ128rmbk 1431799217U, // VPSUBDZ128rmbkz 87475633U, // VPSUBDZ128rmk 571852209U, // VPSUBDZ128rmkz 811648433U, // VPSUBDZ128rr 2693809585U, // VPSUBDZ128rrk 571393457U, // VPSUBDZ128rrkz 812877233U, // VPSUBDZ256rm 360793521U, // VPSUBDZ256rmb 2509604273U, // VPSUBDZ256rmbk 1435993521U, // VPSUBDZ256rmbkz 1508785U, // VPSUBDZ256rmk 571868593U, // VPSUBDZ256rmkz 811648433U, // VPSUBDZ256rr 2693809585U, // VPSUBDZ256rrk 571393457U, // VPSUBDZ256rrkz 813073841U, // VPSUBDZrm 362890673U, // VPSUBDZrmb 2511701425U, // VPSUBDZrmbk 1438090673U, // VPSUBDZrmbkz 87508401U, // VPSUBDZrmk 571884977U, // VPSUBDZrmkz 811648433U, // VPSUBDZrr 2693809585U, // VPSUBDZrrk 571393457U, // VPSUBDZrrkz 811894193U, // VPSUBDrm 811648433U, // VPSUBDrr 812881370U, // VPSUBQYrm 811652570U, // VPSUBQYrr 811898330U, // VPSUBQZ128rm 352425434U, // VPSUBQZ128rmb 2501203418U, // VPSUBQZ128rmbk 1427625434U, // VPSUBQZ128rmbkz 87479770U, // VPSUBQZ128rmk 571856346U, // VPSUBQZ128rmkz 811652570U, // VPSUBQZ128rr 2693813722U, // VPSUBQZ128rrk 571397594U, // VPSUBQZ128rrkz 812881370U, // VPSUBQZ256rm 356619738U, // VPSUBQZ256rmb 2505397722U, // VPSUBQZ256rmbk 1431819738U, // VPSUBQZ256rmbkz 1512922U, // VPSUBQZ256rmk 571872730U, // VPSUBQZ256rmkz 811652570U, // VPSUBQZ256rr 2693813722U, // VPSUBQZ256rrk 571397594U, // VPSUBQZ256rrkz 813077978U, // VPSUBQZrm 360814042U, // VPSUBQZrmb 2509592026U, // VPSUBQZrmbk 1436014042U, // VPSUBQZrmbkz 87512538U, // VPSUBQZrmk 571889114U, // VPSUBQZrmkz 811652570U, // VPSUBQZrr 2693813722U, // VPSUBQZrrk 571397594U, // VPSUBQZrrkz 811898330U, // VPSUBQrm 811652570U, // VPSUBQrr 812876802U, // VPSUBSBYrm 811648002U, // VPSUBSBYrr 811893762U, // VPSUBSBrm 811648002U, // VPSUBSBrr 812885860U, // VPSUBSWYrm 811657060U, // VPSUBSWYrr 811902820U, // VPSUBSWrm 811657060U, // VPSUBSWrr 812876850U, // VPSUBUSBYrm 811648050U, // VPSUBUSBYrr 811893810U, // VPSUBUSBrm 811648050U, // VPSUBUSBrr 812885982U, // VPSUBUSWYrm 811657182U, // VPSUBUSWYrr 811902942U, // VPSUBUSWrm 811657182U, // VPSUBUSWrr 812885094U, // VPSUBWYrm 811656294U, // VPSUBWYrr 811902054U, // VPSUBWZ128rm 87483494U, // VPSUBWZ128rmk 571860070U, // VPSUBWZ128rmkz 811656294U, // VPSUBWZ128rr 2693817446U, // VPSUBWZ128rrk 571401318U, // VPSUBWZ128rrkz 812885094U, // VPSUBWZ256rm 1516646U, // VPSUBWZ256rmk 571876454U, // VPSUBWZ256rmkz 811656294U, // VPSUBWZ256rr 2693817446U, // VPSUBWZ256rrk 571401318U, // VPSUBWZ256rrkz 813081702U, // VPSUBWZrm 87516262U, // VPSUBWZrmk 571892838U, // VPSUBWZrmkz 811656294U, // VPSUBWZrr 2693817446U, // VPSUBWZrrk 571401318U, // VPSUBWZrrkz 811902054U, // VPSUBWrm 811656294U, // VPSUBWrr 812762823U, // VPTESTMDZrm 811648711U, // VPTESTMDZrr 812767471U, // VPTESTMQZrm 811653359U, // VPTESTMQZrr 812762796U, // VPTESTNMDZrm 811648684U, // VPTESTNMDZrr 812767444U, // VPTESTNMQZrm 811653332U, // VPTESTNMQZrr 1303381U, // VPTESTYrm 551822165U, // VPTESTYrr 615253U, // VPTESTrm 551822165U, // VPTESTrr 812885032U, // VPUNPCKHBWYrm 811656232U, // VPUNPCKHBWYrr 811901992U, // VPUNPCKHBWrm 811656232U, // VPUNPCKHBWrr 812881548U, // VPUNPCKHDQYrm 811652748U, // VPUNPCKHDQYrr 813078156U, // VPUNPCKHDQZrm 811652748U, // VPUNPCKHDQZrr 811898508U, // VPUNPCKHDQrm 811652748U, // VPUNPCKHDQrr 812881641U, // VPUNPCKHQDQYrm 811652841U, // VPUNPCKHQDQYrr 813078249U, // VPUNPCKHQDQZrm 811652841U, // VPUNPCKHQDQZrr 811898601U, // VPUNPCKHQDQrm 811652841U, // VPUNPCKHQDQrr 812879325U, // VPUNPCKHWDYrm 811650525U, // VPUNPCKHWDYrr 811896285U, // VPUNPCKHWDrm 811650525U, // VPUNPCKHWDrr 812885054U, // VPUNPCKLBWYrm 811656254U, // VPUNPCKLBWYrr 811902014U, // VPUNPCKLBWrm 811656254U, // VPUNPCKLBWrr 812881567U, // VPUNPCKLDQYrm 811652767U, // VPUNPCKLDQYrr 813078175U, // VPUNPCKLDQZrm 811652767U, // VPUNPCKLDQZrr 811898527U, // VPUNPCKLDQrm 811652767U, // VPUNPCKLDQrr 812881654U, // VPUNPCKLQDQYrm 811652854U, // VPUNPCKLQDQYrr 813078262U, // VPUNPCKLQDQZrm 811652854U, // VPUNPCKLQDQZrr 811898614U, // VPUNPCKLQDQrm 811652854U, // VPUNPCKLQDQrr 812879337U, // VPUNPCKLWDYrm 811650537U, // VPUNPCKLWDYrr 811896297U, // VPUNPCKLWDrm 811650537U, // VPUNPCKLWDrr 811895620U, // VPXORDZ128rm 356600644U, // VPXORDZ128rmb 2505411396U, // VPXORDZ128rmbk 1431800644U, // VPXORDZ128rmbkz 87477060U, // VPXORDZ128rmk 571853636U, // VPXORDZ128rmkz 811649860U, // VPXORDZ128rr 2693811012U, // VPXORDZ128rrk 571394884U, // VPXORDZ128rrkz 812878660U, // VPXORDZ256rm 360794948U, // VPXORDZ256rmb 2509605700U, // VPXORDZ256rmbk 1435994948U, // VPXORDZ256rmbkz 1510212U, // VPXORDZ256rmk 571870020U, // VPXORDZ256rmkz 811649860U, // VPXORDZ256rr 2693811012U, // VPXORDZ256rrk 571394884U, // VPXORDZ256rrkz 813075268U, // VPXORDZrm 362892100U, // VPXORDZrmb 2511702852U, // VPXORDZrmbk 1438092100U, // VPXORDZrmbkz 87509828U, // VPXORDZrmk 571886404U, // VPXORDZrmkz 811649860U, // VPXORDZrr 2693811012U, // VPXORDZrrk 571394884U, // VPXORDZrrkz 811899311U, // VPXORQZ128rm 352426415U, // VPXORQZ128rmb 2501204399U, // VPXORQZ128rmbk 1427626415U, // VPXORQZ128rmbkz 87480751U, // VPXORQZ128rmk 571857327U, // VPXORQZ128rmkz 811653551U, // VPXORQZ128rr 2693814703U, // VPXORQZ128rrk 571398575U, // VPXORQZ128rrkz 812882351U, // VPXORQZ256rm 356620719U, // VPXORQZ256rmb 2505398703U, // VPXORQZ256rmbk 1431820719U, // VPXORQZ256rmbkz 1513903U, // VPXORQZ256rmk 571873711U, // VPXORQZ256rmkz 811653551U, // VPXORQZ256rr 2693814703U, // VPXORQZ256rrk 571398575U, // VPXORQZ256rrkz 813078959U, // VPXORQZrm 360815023U, // VPXORQZrmb 2509593007U, // VPXORQZrmbk 1436015023U, // VPXORQZrmbkz 87513519U, // VPXORQZrmk 571890095U, // VPXORQZrmkz 811653551U, // VPXORQZrr 2693814703U, // VPXORQZrrk 571398575U, // VPXORQZrrkz 812882976U, // VPXORYrm 811654176U, // VPXORYrr 811899936U, // VPXORrm 811654176U, // VPXORrr 115951707U, // VRCP14PDZ128m 621381723U, // VRCP14PDZ128mb 621774939U, // VRCP14PDZ128mbk 620906587U, // VRCP14PDZ128mbkz 2693793883U, // VRCP14PDZ128mk 2692876379U, // VRCP14PDZ128mkz 551815259U, // VRCP14PDZ128r 2693711963U, // VRCP14PDZ128rk 2692794459U, // VRCP14PDZ128rkz 116688987U, // VRCP14PDZ256m 625576027U, // VRCP14PDZ256mb 625969243U, // VRCP14PDZ256mbk 625100891U, // VRCP14PDZ256mbkz 2693843035U, // VRCP14PDZ256mk 2693728347U, // VRCP14PDZ256mkz 551815259U, // VRCP14PDZ256r 2693711963U, // VRCP14PDZ256rk 2692794459U, // VRCP14PDZ256rkz 116705371U, // VRCP14PDZm 629770331U, // VRCP14PDZmb 630163547U, // VRCP14PDZmbk 629295195U, // VRCP14PDZmbkz 2693941339U, // VRCP14PDZmk 2693908571U, // VRCP14PDZmkz 551815259U, // VRCP14PDZr 2693711963U, // VRCP14PDZrk 2692794459U, // VRCP14PDZrkz 115957274U, // VRCP14PSZ128m 625597978U, // VRCP14PSZ128mb 626187802U, // VRCP14PSZ128mbk 625122842U, // VRCP14PSZ128mbkz 2693799450U, // VRCP14PSZ128mk 2692881946U, // VRCP14PSZ128mkz 551820826U, // VRCP14PSZ128r 2693717530U, // VRCP14PSZ128rk 2692800026U, // VRCP14PSZ128rkz 116694554U, // VRCP14PSZ256m 629792282U, // VRCP14PSZ256mb 630382106U, // VRCP14PSZ256mbk 629317146U, // VRCP14PSZ256mbkz 2693848602U, // VRCP14PSZ256mk 2693733914U, // VRCP14PSZ256mkz 551820826U, // VRCP14PSZ256r 2693717530U, // VRCP14PSZ256rk 2692800026U, // VRCP14PSZ256rkz 116710938U, // VRCP14PSZm 631889434U, // VRCP14PSZmb 632479258U, // VRCP14PSZmbk 631414298U, // VRCP14PSZmbkz 2693946906U, // VRCP14PSZmk 2693914138U, // VRCP14PSZmkz 551820826U, // VRCP14PSZr 2693717530U, // VRCP14PSZrk 2692800026U, // VRCP14PSZrkz 283266069U, // VRCP14SDrm 811650069U, // VRCP14SDrr 283288020U, // VRCP14SSrm 811655636U, // VRCP14SSrr 116705393U, // VRCP28PDm 116705393U, // VRCP28PDmb 2693941361U, // VRCP28PDmbk 2693908593U, // VRCP28PDmbkz 2693941361U, // VRCP28PDmk 2693908593U, // VRCP28PDmkz 551815281U, // VRCP28PDr 551815281U, // VRCP28PDrb 2693711985U, // VRCP28PDrbk 2692794481U, // VRCP28PDrbkz 2693711985U, // VRCP28PDrk 2692794481U, // VRCP28PDrkz 116710960U, // VRCP28PSm 116710960U, // VRCP28PSmb 2693946928U, // VRCP28PSmbk 2693914160U, // VRCP28PSmbkz 2693946928U, // VRCP28PSmk 2693914160U, // VRCP28PSmkz 551820848U, // VRCP28PSr 551820848U, // VRCP28PSrb 2693717552U, // VRCP28PSrbk 2692800048U, // VRCP28PSrbkz 2693717552U, // VRCP28PSrk 2692800048U, // VRCP28PSrkz 811732011U, // VRCP28SDm 87018539U, // VRCP28SDmk 571477035U, // VRCP28SDmkz 811650091U, // VRCP28SDr 811650091U, // VRCP28SDrb 2693811243U, // VRCP28SDrbk 571395115U, // VRCP28SDrbkz 2693811243U, // VRCP28SDrk 571395115U, // VRCP28SDrkz 811737578U, // VRCP28SSm 87024106U, // VRCP28SSmk 571482602U, // VRCP28SSmkz 811655658U, // VRCP28SSr 811655658U, // VRCP28SSrb 2693816810U, // VRCP28SSrbk 571400682U, // VRCP28SSrbkz 2693816810U, // VRCP28SSrk 571400682U, // VRCP28SSrkz 1351652U, // VRCPPSYm 1351652U, // VRCPPSYm_Int 551821284U, // VRCPPSYr 551821284U, // VRCPPSYr_Int 614372U, // VRCPPSm 614372U, // VRCPPSm_Int 551821284U, // VRCPPSr 551821284U, // VRCPPSr_Int 283288180U, // VRCPSSm 283288180U, // VRCPSSm_Int 811655796U, // VRCPSSr 159713671U, // VRNDSCALEPDZm 811944327U, // VRNDSCALEPDZr 159719230U, // VRNDSCALEPSZm 811949886U, // VRNDSCALEPSZr 300272781U, // VRNDSCALESDm 1657997U, // VRNDSCALESDmk 691555469U, // VRNDSCALESDmkz 302386317U, // VRNDSCALESDr 302386317U, // VRNDSCALESDrb 169020557U, // VRNDSCALESDrbk 1441418381U, // VRNDSCALESDrbkz 87231629U, // VRNDSCALESDrk 1441418381U, // VRNDSCALESDrkz 300278340U, // VRNDSCALESSm 1663556U, // VRNDSCALESSmk 691561028U, // VRNDSCALESSmkz 302391876U, // VRNDSCALESSr 302391876U, // VRNDSCALESSrb 169026116U, // VRNDSCALESSrbk 1441423940U, // VRNDSCALESSrbkz 87237188U, // VRNDSCALESSrk 1441423940U, // VRNDSCALESSrkz 82119012U, // VROUNDPDm 811944292U, // VROUNDPDr 82124571U, // VROUNDPSm 811949851U, // VROUNDPSr 312855683U, // VROUNDSDm 302386307U, // VROUNDSDr 302386307U, // VROUNDSDr_Int 317055546U, // VROUNDSSm 302391866U, // VROUNDSSr 302391866U, // VROUNDSSr_Int 157616484U, // VROUNDYPDm 811944292U, // VROUNDYPDr 157622043U, // VROUNDYPSm 811949851U, // VROUNDYPSr 115951717U, // VRSQRT14PDZ128m 621381733U, // VRSQRT14PDZ128mb 621774949U, // VRSQRT14PDZ128mbk 620906597U, // VRSQRT14PDZ128mbkz 2693793893U, // VRSQRT14PDZ128mk 2692876389U, // VRSQRT14PDZ128mkz 551815269U, // VRSQRT14PDZ128r 2693711973U, // VRSQRT14PDZ128rk 2692794469U, // VRSQRT14PDZ128rkz 116688997U, // VRSQRT14PDZ256m 625576037U, // VRSQRT14PDZ256mb 625969253U, // VRSQRT14PDZ256mbk 625100901U, // VRSQRT14PDZ256mbkz 2693843045U, // VRSQRT14PDZ256mk 2693728357U, // VRSQRT14PDZ256mkz 551815269U, // VRSQRT14PDZ256r 2693711973U, // VRSQRT14PDZ256rk 2692794469U, // VRSQRT14PDZ256rkz 116705381U, // VRSQRT14PDZm 629770341U, // VRSQRT14PDZmb 630163557U, // VRSQRT14PDZmbk 629295205U, // VRSQRT14PDZmbkz 2693941349U, // VRSQRT14PDZmk 2693908581U, // VRSQRT14PDZmkz 551815269U, // VRSQRT14PDZr 2693711973U, // VRSQRT14PDZrk 2692794469U, // VRSQRT14PDZrkz 115957284U, // VRSQRT14PSZ128m 625597988U, // VRSQRT14PSZ128mb 626187812U, // VRSQRT14PSZ128mbk 625122852U, // VRSQRT14PSZ128mbkz 2693799460U, // VRSQRT14PSZ128mk 2692881956U, // VRSQRT14PSZ128mkz 551820836U, // VRSQRT14PSZ128r 2693717540U, // VRSQRT14PSZ128rk 2692800036U, // VRSQRT14PSZ128rkz 116694564U, // VRSQRT14PSZ256m 629792292U, // VRSQRT14PSZ256mb 630382116U, // VRSQRT14PSZ256mbk 629317156U, // VRSQRT14PSZ256mbkz 2693848612U, // VRSQRT14PSZ256mk 2693733924U, // VRSQRT14PSZ256mkz 551820836U, // VRSQRT14PSZ256r 2693717540U, // VRSQRT14PSZ256rk 2692800036U, // VRSQRT14PSZ256rkz 116710948U, // VRSQRT14PSZm 631889444U, // VRSQRT14PSZmb 632479268U, // VRSQRT14PSZmbk 631414308U, // VRSQRT14PSZmbkz 2693946916U, // VRSQRT14PSZmk 2693914148U, // VRSQRT14PSZmkz 551820836U, // VRSQRT14PSZr 2693717540U, // VRSQRT14PSZrk 2692800036U, // VRSQRT14PSZrkz 283266079U, // VRSQRT14SDrm 811650079U, // VRSQRT14SDrr 283288030U, // VRSQRT14SSrm 811655646U, // VRSQRT14SSrr 116705403U, // VRSQRT28PDm 116705403U, // VRSQRT28PDmb 2693941371U, // VRSQRT28PDmbk 2693908603U, // VRSQRT28PDmbkz 2693941371U, // VRSQRT28PDmk 2693908603U, // VRSQRT28PDmkz 551815291U, // VRSQRT28PDr 551815291U, // VRSQRT28PDrb 2693711995U, // VRSQRT28PDrbk 2692794491U, // VRSQRT28PDrbkz 2693711995U, // VRSQRT28PDrk 2692794491U, // VRSQRT28PDrkz 116710970U, // VRSQRT28PSm 116710970U, // VRSQRT28PSmb 2693946938U, // VRSQRT28PSmbk 2693914170U, // VRSQRT28PSmbkz 2693946938U, // VRSQRT28PSmk 2693914170U, // VRSQRT28PSmkz 551820858U, // VRSQRT28PSr 551820858U, // VRSQRT28PSrb 2693717562U, // VRSQRT28PSrbk 2692800058U, // VRSQRT28PSrbkz 2693717562U, // VRSQRT28PSrk 2692800058U, // VRSQRT28PSrkz 811732021U, // VRSQRT28SDm 87018549U, // VRSQRT28SDmk 571477045U, // VRSQRT28SDmkz 811650101U, // VRSQRT28SDr 811650101U, // VRSQRT28SDrb 2693811253U, // VRSQRT28SDrbk 571395125U, // VRSQRT28SDrbkz 2693811253U, // VRSQRT28SDrk 571395125U, // VRSQRT28SDrkz 811737588U, // VRSQRT28SSm 87024116U, // VRSQRT28SSmk 571482612U, // VRSQRT28SSmkz 811655668U, // VRSQRT28SSr 811655668U, // VRSQRT28SSrb 2693816820U, // VRSQRT28SSrbk 571400692U, // VRSQRT28SSrbkz 2693816820U, // VRSQRT28SSrk 571400692U, // VRSQRT28SSrkz 1351823U, // VRSQRTPSYm 1351823U, // VRSQRTPSYm_Int 551821455U, // VRSQRTPSYr 551821455U, // VRSQRTPSYr_Int 614543U, // VRSQRTPSm 614543U, // VRSQRTPSm_Int 551821455U, // VRSQRTPSr 551821455U, // VRSQRTPSr_Int 283288205U, // VRSQRTSSm 283288205U, // VRSQRTSSm_Int 811655821U, // VRSQRTSSr 2714978682U, // VSCATTERDPDZmr 2712887089U, // VSCATTERDPSZmr 627296485U, // VSCATTERPF0DPDm 627302044U, // VSCATTERPF0DPSm 627329582U, // VSCATTERPF0QPDm 627335178U, // VSCATTERPF0QPSm 627296516U, // VSCATTERPF1DPDm 627302075U, // VSCATTERPF1DPSm 627329613U, // VSCATTERPF1QPDm 627335209U, // VSCATTERPF1QPSm 2714978921U, // VSCATTERQPDZmr 2714984517U, // VSCATTERQPSZmr 101042580U, // VSHUFPDYrmi 302385556U, // VSHUFPDYrri 103139732U, // VSHUFPDZrmi 302385556U, // VSHUFPDZrri 300272020U, // VSHUFPDrmi 302385556U, // VSHUFPDrri 101048139U, // VSHUFPSYrmi 302391115U, // VSHUFPSYrri 103145291U, // VSHUFPSZrmi 302391115U, // VSHUFPSZrri 300277579U, // VSHUFPSrmi 302391115U, // VSHUFPSrri 1346204U, // VSQRTPDYm 551815836U, // VSQRTPDYr 115952284U, // VSQRTPDZ128m 621382300U, // VSQRTPDZ128mb 621775516U, // VSQRTPDZ128mbk 620907164U, // VSQRTPDZ128mbkz 2693794460U, // VSQRTPDZ128mk 2692876956U, // VSQRTPDZ128mkz 551815836U, // VSQRTPDZ128r 2693712540U, // VSQRTPDZ128rk 2692795036U, // VSQRTPDZ128rkz 116689564U, // VSQRTPDZ256m 625576604U, // VSQRTPDZ256mb 625969820U, // VSQRTPDZ256mbk 625101468U, // VSQRTPDZ256mbkz 2693843612U, // VSQRTPDZ256mk 2693728924U, // VSQRTPDZ256mkz 551815836U, // VSQRTPDZ256r 2693712540U, // VSQRTPDZ256rk 2692795036U, // VSQRTPDZ256rkz 116705948U, // VSQRTPDZm 629770908U, // VSQRTPDZmb 630164124U, // VSQRTPDZmbk 629295772U, // VSQRTPDZmbkz 2693941916U, // VSQRTPDZmk 2693909148U, // VSQRTPDZmkz 551815836U, // VSQRTPDZr 2693712540U, // VSQRTPDZrk 2692795036U, // VSQRTPDZrkz 608924U, // VSQRTPDm 551815836U, // VSQRTPDr 1351833U, // VSQRTPSYm 551821465U, // VSQRTPSYr 115957913U, // VSQRTPSZ128m 625598617U, // VSQRTPSZ128mb 626188441U, // VSQRTPSZ128mbk 625123481U, // VSQRTPSZ128mbkz 2693800089U, // VSQRTPSZ128mk 2692882585U, // VSQRTPSZ128mkz 551821465U, // VSQRTPSZ128r 2693718169U, // VSQRTPSZ128rk 2692800665U, // VSQRTPSZ128rkz 116695193U, // VSQRTPSZ256m 629792921U, // VSQRTPSZ256mb 630382745U, // VSQRTPSZ256mbk 629317785U, // VSQRTPSZ256mbkz 2693849241U, // VSQRTPSZ256mk 2693734553U, // VSQRTPSZ256mkz 551821465U, // VSQRTPSZ256r 2693718169U, // VSQRTPSZ256rk 2692800665U, // VSQRTPSZ256rkz 116711577U, // VSQRTPSZm 631890073U, // VSQRTPSZmb 632479897U, // VSQRTPSZmbk 631414937U, // VSQRTPSZmbkz 2693947545U, // VSQRTPSZmk 2693914777U, // VSQRTPSZmkz 551821465U, // VSQRTPSZr 2693718169U, // VSQRTPSZrk 2692800665U, // VSQRTPSZrkz 614553U, // VSQRTPSm 551821465U, // VSQRTPSr 283266276U, // VSQRTSDZm 283266276U, // VSQRTSDZm_Int 811650276U, // VSQRTSDZr 811650276U, // VSQRTSDZr_Int 283266276U, // VSQRTSDm 283266276U, // VSQRTSDm_Int 811650276U, // VSQRTSDr 283288215U, // VSQRTSSZm 283288215U, // VSQRTSSZm_Int 811655831U, // VSQRTSSZr 811655831U, // VSQRTSSZr_Int 283288215U, // VSQRTSSm 283288215U, // VSQRTSSm_Int 811655831U, // VSQRTSSr 236599U, // VSTMXCSR 812583118U, // VSUBPDYrm 811649230U, // VSUBPDYrr 811731150U, // VSUBPDZ128rm 352471246U, // VSUBPDZ128rmb 2500806862U, // VSUBPDZ128rmbk 1427081422U, // VSUBPDZ128rmbkz 87017678U, // VSUBPDZ128rmk 571476174U, // VSUBPDZ128rmkz 811649230U, // VSUBPDZ128rr 2693810382U, // VSUBPDZ128rrk 571394254U, // VSUBPDZ128rrkz 812583118U, // VSUBPDZ256rm 356665550U, // VSUBPDZ256rmb 2505001166U, // VSUBPDZ256rmbk 1431275726U, // VSUBPDZ256rmbkz 87066830U, // VSUBPDZ256rmk 571525326U, // VSUBPDZ256rmkz 811649230U, // VSUBPDZ256rr 2693810382U, // VSUBPDZ256rrk 571394254U, // VSUBPDZ256rrkz 1116366U, // VSUBPDZrb 87115982U, // VSUBPDZrbk 359762126U, // VSUBPDZrbkz 812763342U, // VSUBPDZrm 360859854U, // VSUBPDZrmb 2509195470U, // VSUBPDZrmbk 1435470030U, // VSUBPDZrmbkz 87165134U, // VSUBPDZrmk 571623630U, // VSUBPDZrmkz 811649230U, // VSUBPDZrr 2693810382U, // VSUBPDZrrk 571394254U, // VSUBPDZrrkz 811731150U, // VSUBPDrm 811649230U, // VSUBPDrr 812588677U, // VSUBPSYrm 811654789U, // VSUBPSYrr 811736709U, // VSUBPSZ128rm 356687493U, // VSUBPSZ128rmb 2505219717U, // VSUBPSZ128rmbk 1431494277U, // VSUBPSZ128rmbkz 87023237U, // VSUBPSZ128rmk 571481733U, // VSUBPSZ128rmkz 811654789U, // VSUBPSZ128rr 2693815941U, // VSUBPSZ128rrk 571399813U, // VSUBPSZ128rrkz 812588677U, // VSUBPSZ256rm 360881797U, // VSUBPSZ256rmb 2509414021U, // VSUBPSZ256rmbk 1435688581U, // VSUBPSZ256rmbkz 87072389U, // VSUBPSZ256rmk 571530885U, // VSUBPSZ256rmkz 811654789U, // VSUBPSZ256rr 2693815941U, // VSUBPSZ256rrk 571399813U, // VSUBPSZ256rrkz 1121925U, // VSUBPSZrb 87121541U, // VSUBPSZrbk 359767685U, // VSUBPSZrbkz 812768901U, // VSUBPSZrm 362978949U, // VSUBPSZrmb 2511511173U, // VSUBPSZrmbk 1437785733U, // VSUBPSZrmbkz 87170693U, // VSUBPSZrmk 571629189U, // VSUBPSZrmkz 811654789U, // VSUBPSZrr 2693815941U, // VSUBPSZrrk 571399813U, // VSUBPSZrrkz 811736709U, // VSUBPSrm 811654789U, // VSUBPSrr 283266142U, // VSUBSDZrm 811732062U, // VSUBSDZrm_Int 87018590U, // VSUBSDZrm_Intk 571477086U, // VSUBSDZrm_Intkz 811650142U, // VSUBSDZrr 811650142U, // VSUBSDZrr_Int 2693811294U, // VSUBSDZrr_Intk 571395166U, // VSUBSDZrr_Intkz 1117278U, // VSUBSDZrrb 87116894U, // VSUBSDZrrbk 359763038U, // VSUBSDZrrbkz 283266142U, // VSUBSDrm 283266142U, // VSUBSDrm_Int 811650142U, // VSUBSDrr 811650142U, // VSUBSDrr_Int 283288085U, // VSUBSSZrm 811737621U, // VSUBSSZrm_Int 87024149U, // VSUBSSZrm_Intk 571482645U, // VSUBSSZrm_Intkz 811655701U, // VSUBSSZrr 811655701U, // VSUBSSZrr_Int 2693816853U, // VSUBSSZrr_Intk 571400725U, // VSUBSSZrr_Intkz 1122837U, // VSUBSSZrrb 87122453U, // VSUBSSZrrbk 359768597U, // VSUBSSZrrbkz 283288085U, // VSUBSSrm 283288085U, // VSUBSSrm_Int 811655701U, // VSUBSSrr 811655701U, // VSUBSSrr_Int 1346213U, // VTESTPDYrm 551815845U, // VTESTPDYrr 608933U, // VTESTPDrm 551815845U, // VTESTPDrr 1351842U, // VTESTPSYrm 551821474U, // VTESTPSYrr 614562U, // VTESTPSrm 551821474U, // VTESTPSrr 552176794U, // VUCOMISDZrm 551816346U, // VUCOMISDZrr 552176794U, // VUCOMISDrm 551816346U, // VUCOMISDrr 552198737U, // VUCOMISSZrm 551821905U, // VUCOMISSZrr 552198737U, // VUCOMISSrm 551821905U, // VUCOMISSrr 812583325U, // VUNPCKHPDYrm 811649437U, // VUNPCKHPDYrr 812763549U, // VUNPCKHPDZrm 811649437U, // VUNPCKHPDZrr 811731357U, // VUNPCKHPDrm 811649437U, // VUNPCKHPDrr 812588884U, // VUNPCKHPSYrm 811654996U, // VUNPCKHPSYrr 812769108U, // VUNPCKHPSZrm 811654996U, // VUNPCKHPSZrr 811736916U, // VUNPCKHPSrm 811654996U, // VUNPCKHPSrr 812583367U, // VUNPCKLPDYrm 811649479U, // VUNPCKLPDYrr 812763591U, // VUNPCKLPDZrm 811649479U, // VUNPCKLPDZrr 811731399U, // VUNPCKLPDrm 811649479U, // VUNPCKLPDrr 812588946U, // VUNPCKLPSYrm 811655058U, // VUNPCKLPSYrr 812769170U, // VUNPCKLPSZrm 811655058U, // VUNPCKLPSZrr 811736978U, // VUNPCKLPSrm 811655058U, // VUNPCKLPSrr 812583549U, // VXORPDYrm 811649661U, // VXORPDYrr 811731581U, // VXORPDrm 811649661U, // VXORPDrr 812589145U, // VXORPSYrm 811655257U, // VXORPSYrr 811737177U, // VXORPSrm 811655257U, // VXORPSrr 13126U, // VZEROALL 13432U, // VZEROUPPER 0U, // V_SET0 0U, // V_SETALLONES 13846U, // WAIT 12869U, // WBINVD 13243U, // WIN_ALLOCA 13044U, // WIN_FTOL_32 13044U, // WIN_FTOL_64 20738U, // WRFSBASE 22512U, // WRFSBASE64 20760U, // WRGSBASE 22534U, // WRGSBASE64 13466U, // WRMSR 25386U, // XABORT 12926U, // XACQUIRE_PREFIX 4236492U, // XADD16rm 551822540U, // XADD16rr 12619901U, // XADD32rm 551817341U, // XADD32rr 18912882U, // XADD64rm 551818866U, // XADD64rr 23102136U, // XADD8rm 551813816U, // XADD8rr 12638U, // XBEGIN 447610U, // XBEGIN_2 447610U, // XBEGIN_4 2123147U, // XCHG16ar 3504612747U, // XCHG16rm 1357129099U, // XCHG16rr 10506564U, // XCHG32ar 10506564U, // XCHG32ar64 3773043012U, // XCHG32rm 1357123908U, // XCHG32rr 16799794U, // XCHG64ar 4041480242U, // XCHG64rm 1357125682U, // XCHG64rr 14942966U, // XCHG8rm 1357120246U, // XCHG8rr 20226U, // XCH_F 12787U, // XCRYPTCBC 12731U, // XCRYPTCFB 13472U, // XCRYPTCTR 12721U, // XCRYPTECB 12741U, // XCRYPTOFB 12850U, // XEND 13901U, // XGETBV 12771U, // XLAT 2123516U, // XOR16i16 4237052U, // XOR16mi 4237052U, // XOR16mi8 4237052U, // XOR16mr 6350588U, // XOR16ri 6350588U, // XOR16ri8 6366972U, // XOR16rm 6350588U, // XOR16rr 8447740U, // XOR16rr_REV 10506946U, // XOR32i32 12620482U, // XOR32mi 12620482U, // XOR32mi8 12620482U, // XOR32mr 6345410U, // XOR32ri 6345410U, // XOR32ri8 283202242U, // XOR32rm 6345410U, // XOR32rr 8442562U, // XOR32rr_REV 16800169U, // XOR64i32 18913705U, // XOR64mi32 18913705U, // XOR64mi8 18913705U, // XOR64mr 6347177U, // XOR64ri32 6347177U, // XOR64ri8 283220393U, // XOR64rm 6347177U, // XOR64rr 8444329U, // XOR64rr_REV 20988872U, // XOR8i8 23102408U, // XOR8mi 23102408U, // XOR8mi8 23102408U, // XOR8mr 6341576U, // XOR8ri 6341576U, // XOR8ri8 115656U, // XOR8rm 6341576U, // XOR8rr 8438728U, // XOR8rr_REV 8522366U, // XORPDrm 8440446U, // XORPDrr 8527962U, // XORPSrm 8446042U, // XORPSrr 12942U, // XRELEASE_PREFIX 662552U, // XRSTOR 655566U, // XRSTOR64 663821U, // XRSTORS 655586U, // XRSTORS64 659159U, // XSAVE 655556U, // XSAVE64 656671U, // XSAVEC 655545U, // XSAVEC64 664333U, // XSAVEOPT 655597U, // XSAVEOPT64 662656U, // XSAVES 655576U, // XSAVES64 13908U, // XSETBV 12365U, // XSHA1 12600U, // XSHA256 12935U, // XSTORE 13884U, // XTEST 13315U, // fdisi8087_nop 13302U, // feni8087_nop 0U }; static const uint32_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // AAA 0U, // AAD8i8 0U, // AAM8i8 0U, // AAS 0U, // ABS_F 0U, // ABS_Fp32 0U, // ABS_Fp64 0U, // ABS_Fp80 0U, // ACQUIRE_MOV16rm 0U, // ACQUIRE_MOV32rm 0U, // ACQUIRE_MOV64rm 0U, // ACQUIRE_MOV8rm 0U, // ADC16i16 0U, // ADC16mi 0U, // ADC16mi8 0U, // ADC16mr 0U, // ADC16ri 0U, // ADC16ri8 0U, // ADC16rm 0U, // ADC16rr 0U, // ADC16rr_REV 0U, // ADC32i32 0U, // ADC32mi 0U, // ADC32mi8 0U, // ADC32mr 0U, // ADC32ri 0U, // ADC32ri8 0U, // ADC32rm 0U, // ADC32rr 0U, // ADC32rr_REV 0U, // ADC64i32 0U, // ADC64mi32 0U, // ADC64mi8 0U, // ADC64mr 0U, // ADC64ri32 0U, // ADC64ri8 0U, // ADC64rm 0U, // ADC64rr 0U, // ADC64rr_REV 0U, // ADC8i8 0U, // ADC8mi 0U, // ADC8mi8 0U, // ADC8mr 0U, // ADC8ri 0U, // ADC8ri8 0U, // ADC8rm 0U, // ADC8rr 0U, // ADC8rr_REV 0U, // ADCX32rm 0U, // ADCX32rr 0U, // ADCX64rm 0U, // ADCX64rr 0U, // ADD16i16 0U, // ADD16mi 0U, // ADD16mi8 0U, // ADD16mr 0U, // ADD16ri 0U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 0U, // ADD16rm 0U, // ADD16rr 0U, // ADD16rr_DB 0U, // ADD16rr_REV 0U, // ADD32i32 0U, // ADD32mi 0U, // ADD32mi8 0U, // ADD32mr 0U, // ADD32ri 0U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 0U, // ADD32rm 0U, // ADD32rr 0U, // ADD32rr_DB 0U, // ADD32rr_REV 0U, // ADD64i32 0U, // ADD64mi32 0U, // ADD64mi8 0U, // ADD64mr 0U, // ADD64ri32 0U, // ADD64ri32_DB 0U, // ADD64ri8 0U, // ADD64ri8_DB 0U, // ADD64rm 0U, // ADD64rr 0U, // ADD64rr_DB 0U, // ADD64rr_REV 0U, // ADD8i8 0U, // ADD8mi 0U, // ADD8mi8 0U, // ADD8mr 0U, // ADD8ri 0U, // ADD8ri8 0U, // ADD8rm 0U, // ADD8rr 0U, // ADD8rr_REV 0U, // ADDPDrm 0U, // ADDPDrr 0U, // ADDPSrm 0U, // ADDPSrr 0U, // ADDSDrm 0U, // ADDSDrm_Int 0U, // ADDSDrr 0U, // ADDSDrr_Int 0U, // ADDSSrm 0U, // ADDSSrm_Int 0U, // ADDSSrr 0U, // ADDSSrr_Int 0U, // ADDSUBPDrm 0U, // ADDSUBPDrr 0U, // ADDSUBPSrm 0U, // ADDSUBPSrr 0U, // ADD_F32m 0U, // ADD_F64m 0U, // ADD_FI16m 0U, // ADD_FI32m 0U, // ADD_FPrST0 0U, // ADD_FST0r 0U, // ADD_Fp32 0U, // ADD_Fp32m 0U, // ADD_Fp64 0U, // ADD_Fp64m 0U, // ADD_Fp64m32 0U, // ADD_Fp80 0U, // ADD_Fp80m32 0U, // ADD_Fp80m64 0U, // ADD_FpI16m32 0U, // ADD_FpI16m64 0U, // ADD_FpI16m80 0U, // ADD_FpI32m32 0U, // ADD_FpI32m64 0U, // ADD_FpI32m80 0U, // ADD_FrST0 0U, // ADJCALLSTACKDOWN32 0U, // ADJCALLSTACKDOWN64 0U, // ADJCALLSTACKUP32 0U, // ADJCALLSTACKUP64 0U, // ADOX32rm 0U, // ADOX32rr 0U, // ADOX64rm 0U, // ADOX64rr 0U, // AESDECLASTrm 0U, // AESDECLASTrr 0U, // AESDECrm 0U, // AESDECrr 0U, // AESENCLASTrm 0U, // AESENCLASTrr 0U, // AESENCrm 0U, // AESENCrr 0U, // AESIMCrm 0U, // AESIMCrr 0U, // AESKEYGENASSIST128rm 4U, // AESKEYGENASSIST128rr 0U, // AND16i16 0U, // AND16mi 0U, // AND16mi8 0U, // AND16mr 0U, // AND16ri 0U, // AND16ri8 0U, // AND16rm 0U, // AND16rr 0U, // AND16rr_REV 0U, // AND32i32 0U, // AND32mi 0U, // AND32mi8 0U, // AND32mr 0U, // AND32ri 0U, // AND32ri8 0U, // AND32rm 0U, // AND32rr 0U, // AND32rr_REV 0U, // AND64i32 0U, // AND64mi32 0U, // AND64mi8 0U, // AND64mr 0U, // AND64ri32 0U, // AND64ri8 0U, // AND64rm 0U, // AND64rr 0U, // AND64rr_REV 0U, // AND8i8 0U, // AND8mi 0U, // AND8mi8 0U, // AND8mr 0U, // AND8ri 0U, // AND8ri8 0U, // AND8rm 0U, // AND8rr 0U, // AND8rr_REV 72U, // ANDN32rm 4U, // ANDN32rr 72U, // ANDN64rm 4U, // ANDN64rr 0U, // ANDNPDrm 0U, // ANDNPDrr 0U, // ANDNPSrm 0U, // ANDNPSrr 0U, // ANDPDrm 0U, // ANDPDrr 0U, // ANDPSrm 0U, // ANDPSrr 0U, // ARPL16mr 0U, // ARPL16rr 0U, // AVX2_SETALLONES 0U, // AVX512_512_SET0 0U, // AVX_SET0 4U, // BEXTR32rm 4U, // BEXTR32rr 4U, // BEXTR64rm 4U, // BEXTR64rr 4U, // BEXTRI32mi 4U, // BEXTRI32ri 4U, // BEXTRI64mi 4U, // BEXTRI64ri 0U, // BLCFILL32rm 0U, // BLCFILL32rr 0U, // BLCFILL64rm 0U, // BLCFILL64rr 0U, // BLCI32rm 0U, // BLCI32rr 0U, // BLCI64rm 0U, // BLCI64rr 0U, // BLCIC32rm 0U, // BLCIC32rr 0U, // BLCIC64rm 0U, // BLCIC64rr 0U, // BLCMSK32rm 0U, // BLCMSK32rr 0U, // BLCMSK64rm 0U, // BLCMSK64rr 0U, // BLCS32rm 0U, // BLCS32rr 0U, // BLCS64rm 0U, // BLCS64rr 0U, // BLENDPDrmi 0U, // BLENDPDrri 0U, // BLENDPSrmi 0U, // BLENDPSrri 0U, // BLENDVPDrm0 0U, // BLENDVPDrr0 0U, // BLENDVPSrm0 0U, // BLENDVPSrr0 0U, // BLSFILL32rm 0U, // BLSFILL32rr 0U, // BLSFILL64rm 0U, // BLSFILL64rr 0U, // BLSI32rm 0U, // BLSI32rr 0U, // BLSI64rm 0U, // BLSI64rr 0U, // BLSIC32rm 0U, // BLSIC32rr 0U, // BLSIC64rm 0U, // BLSIC64rr 0U, // BLSMSK32rm 0U, // BLSMSK32rr 0U, // BLSMSK64rm 0U, // BLSMSK64rr 0U, // BLSR32rm 0U, // BLSR32rr 0U, // BLSR64rm 0U, // BLSR64rr 0U, // BOUNDS16rm 0U, // BOUNDS32rm 0U, // BSF16rm 0U, // BSF16rr 0U, // BSF32rm 0U, // BSF32rr 0U, // BSF64rm 0U, // BSF64rr 0U, // BSR16rm 0U, // BSR16rr 0U, // BSR32rm 0U, // BSR32rr 0U, // BSR64rm 0U, // BSR64rr 0U, // BSWAP32r 0U, // BSWAP64r 0U, // BT16mi8 0U, // BT16mr 0U, // BT16ri8 0U, // BT16rr 0U, // BT32mi8 0U, // BT32mr 0U, // BT32ri8 0U, // BT32rr 0U, // BT64mi8 0U, // BT64mr 0U, // BT64ri8 0U, // BT64rr 0U, // BTC16mi8 0U, // BTC16mr 0U, // BTC16ri8 0U, // BTC16rr 0U, // BTC32mi8 0U, // BTC32mr 0U, // BTC32ri8 0U, // BTC32rr 0U, // BTC64mi8 0U, // BTC64mr 0U, // BTC64ri8 0U, // BTC64rr 0U, // BTR16mi8 0U, // BTR16mr 0U, // BTR16ri8 0U, // BTR16rr 0U, // BTR32mi8 0U, // BTR32mr 0U, // BTR32ri8 0U, // BTR32rr 0U, // BTR64mi8 0U, // BTR64mr 0U, // BTR64ri8 0U, // BTR64rr 0U, // BTS16mi8 0U, // BTS16mr 0U, // BTS16ri8 0U, // BTS16rr 0U, // BTS32mi8 0U, // BTS32mr 0U, // BTS32ri8 0U, // BTS32rr 0U, // BTS64mi8 0U, // BTS64mr 0U, // BTS64ri8 0U, // BTS64rr 4U, // BZHI32rm 4U, // BZHI32rr 4U, // BZHI64rm 4U, // BZHI64rr 0U, // CALL16m 0U, // CALL16r 0U, // CALL32m 0U, // CALL32r 0U, // CALL64m 0U, // CALL64pcrel32 0U, // CALL64r 0U, // CALLpcrel16 0U, // CALLpcrel32 0U, // CBW 0U, // CDQ 0U, // CDQE 0U, // CHS_F 0U, // CHS_Fp32 0U, // CHS_Fp64 0U, // CHS_Fp80 0U, // CLAC 0U, // CLC 0U, // CLD 0U, // CLFLUSH 0U, // CLFLUSHOPT 0U, // CLGI 0U, // CLI 0U, // CLTS 0U, // CLWB 0U, // CMC 0U, // CMOVA16rm 0U, // CMOVA16rr 0U, // CMOVA32rm 0U, // CMOVA32rr 0U, // CMOVA64rm 0U, // CMOVA64rr 0U, // CMOVAE16rm 0U, // CMOVAE16rr 0U, // CMOVAE32rm 0U, // CMOVAE32rr 0U, // CMOVAE64rm 0U, // CMOVAE64rr 0U, // CMOVB16rm 0U, // CMOVB16rr 0U, // CMOVB32rm 0U, // CMOVB32rr 0U, // CMOVB64rm 0U, // CMOVB64rr 0U, // CMOVBE16rm 0U, // CMOVBE16rr 0U, // CMOVBE32rm 0U, // CMOVBE32rr 0U, // CMOVBE64rm 0U, // CMOVBE64rr 0U, // CMOVBE_F 0U, // CMOVBE_Fp32 0U, // CMOVBE_Fp64 0U, // CMOVBE_Fp80 0U, // CMOVB_F 0U, // CMOVB_Fp32 0U, // CMOVB_Fp64 0U, // CMOVB_Fp80 0U, // CMOVE16rm 0U, // CMOVE16rr 0U, // CMOVE32rm 0U, // CMOVE32rr 0U, // CMOVE64rm 0U, // CMOVE64rr 0U, // CMOVE_F 0U, // CMOVE_Fp32 0U, // CMOVE_Fp64 0U, // CMOVE_Fp80 0U, // CMOVG16rm 0U, // CMOVG16rr 0U, // CMOVG32rm 0U, // CMOVG32rr 0U, // CMOVG64rm 0U, // CMOVG64rr 0U, // CMOVGE16rm 0U, // CMOVGE16rr 0U, // CMOVGE32rm 0U, // CMOVGE32rr 0U, // CMOVGE64rm 0U, // CMOVGE64rr 0U, // CMOVL16rm 0U, // CMOVL16rr 0U, // CMOVL32rm 0U, // CMOVL32rr 0U, // CMOVL64rm 0U, // CMOVL64rr 0U, // CMOVLE16rm 0U, // CMOVLE16rr 0U, // CMOVLE32rm 0U, // CMOVLE32rr 0U, // CMOVLE64rm 0U, // CMOVLE64rr 0U, // CMOVNBE_F 0U, // CMOVNBE_Fp32 0U, // CMOVNBE_Fp64 0U, // CMOVNBE_Fp80 0U, // CMOVNB_F 0U, // CMOVNB_Fp32 0U, // CMOVNB_Fp64 0U, // CMOVNB_Fp80 0U, // CMOVNE16rm 0U, // CMOVNE16rr 0U, // CMOVNE32rm 0U, // CMOVNE32rr 0U, // CMOVNE64rm 0U, // CMOVNE64rr 0U, // CMOVNE_F 0U, // CMOVNE_Fp32 0U, // CMOVNE_Fp64 0U, // CMOVNE_Fp80 0U, // CMOVNO16rm 0U, // CMOVNO16rr 0U, // CMOVNO32rm 0U, // CMOVNO32rr 0U, // CMOVNO64rm 0U, // CMOVNO64rr 0U, // CMOVNP16rm 0U, // CMOVNP16rr 0U, // CMOVNP32rm 0U, // CMOVNP32rr 0U, // CMOVNP64rm 0U, // CMOVNP64rr 0U, // CMOVNP_F 0U, // CMOVNP_Fp32 0U, // CMOVNP_Fp64 0U, // CMOVNP_Fp80 0U, // CMOVNS16rm 0U, // CMOVNS16rr 0U, // CMOVNS32rm 0U, // CMOVNS32rr 0U, // CMOVNS64rm 0U, // CMOVNS64rr 0U, // CMOVO16rm 0U, // CMOVO16rr 0U, // CMOVO32rm 0U, // CMOVO32rr 0U, // CMOVO64rm 0U, // CMOVO64rr 0U, // CMOVP16rm 0U, // CMOVP16rr 0U, // CMOVP32rm 0U, // CMOVP32rr 0U, // CMOVP64rm 0U, // CMOVP64rr 0U, // CMOVP_F 0U, // CMOVP_Fp32 0U, // CMOVP_Fp64 0U, // CMOVP_Fp80 0U, // CMOVS16rm 0U, // CMOVS16rr 0U, // CMOVS32rm 0U, // CMOVS32rr 0U, // CMOVS64rm 0U, // CMOVS64rr 0U, // CMOV_FR32 0U, // CMOV_FR64 0U, // CMOV_GR16 0U, // CMOV_GR32 0U, // CMOV_GR8 0U, // CMOV_RFP32 0U, // CMOV_RFP64 0U, // CMOV_RFP80 0U, // CMOV_V16F32 0U, // CMOV_V2F64 0U, // CMOV_V2I64 0U, // CMOV_V4F32 0U, // CMOV_V4F64 0U, // CMOV_V4I64 0U, // CMOV_V8F32 0U, // CMOV_V8F64 0U, // CMOV_V8I64 0U, // CMP16i16 0U, // CMP16mi 0U, // CMP16mi8 0U, // CMP16mr 0U, // CMP16ri 0U, // CMP16ri8 0U, // CMP16rm 0U, // CMP16rr 0U, // CMP16rr_REV 0U, // CMP32i32 0U, // CMP32mi 0U, // CMP32mi8 0U, // CMP32mr 0U, // CMP32ri 0U, // CMP32ri8 0U, // CMP32rm 0U, // CMP32rr 0U, // CMP32rr_REV 0U, // CMP64i32 0U, // CMP64mi32 0U, // CMP64mi8 0U, // CMP64mr 0U, // CMP64ri32 0U, // CMP64ri8 0U, // CMP64rm 0U, // CMP64rr 0U, // CMP64rr_REV 0U, // CMP8i8 0U, // CMP8mi 0U, // CMP8mi8 0U, // CMP8mr 0U, // CMP8ri 0U, // CMP8ri8 0U, // CMP8rm 0U, // CMP8rr 0U, // CMP8rr_REV 4U, // CMPPDrmi 0U, // CMPPDrmi_alt 72U, // CMPPDrri 0U, // CMPPDrri_alt 4U, // CMPPSrmi 0U, // CMPPSrmi_alt 72U, // CMPPSrri 0U, // CMPPSrri_alt 0U, // CMPSB 4U, // CMPSDrm 0U, // CMPSDrm_alt 72U, // CMPSDrr 0U, // CMPSDrr_alt 0U, // CMPSL 0U, // CMPSQ 4U, // CMPSSrm 0U, // CMPSSrm_alt 72U, // CMPSSrr 0U, // CMPSSrr_alt 0U, // CMPSW 0U, // CMPXCHG16B 0U, // CMPXCHG16rm 0U, // CMPXCHG16rr 0U, // CMPXCHG32rm 0U, // CMPXCHG32rr 0U, // CMPXCHG64rm 0U, // CMPXCHG64rr 0U, // CMPXCHG8B 0U, // CMPXCHG8rm 0U, // CMPXCHG8rr 0U, // COMISDrm 0U, // COMISDrr 0U, // COMISSrm 0U, // COMISSrr 0U, // COMP_FST0r 0U, // COM_FIPr 0U, // COM_FIr 0U, // COM_FST0r 0U, // COS_F 0U, // COS_Fp32 0U, // COS_Fp64 0U, // COS_Fp80 0U, // CPUID 0U, // CQO 0U, // CRC32r32m16 0U, // CRC32r32m32 0U, // CRC32r32m8 0U, // CRC32r32r16 0U, // CRC32r32r32 0U, // CRC32r32r8 0U, // CRC32r64m64 0U, // CRC32r64m8 0U, // CRC32r64r64 0U, // CRC32r64r8 0U, // CVTDQ2PDrm 0U, // CVTDQ2PDrr 0U, // CVTDQ2PSrm 0U, // CVTDQ2PSrr 0U, // CVTPD2DQrm 0U, // CVTPD2DQrr 0U, // CVTPD2PSrm 0U, // CVTPD2PSrr 0U, // CVTPS2DQrm 0U, // CVTPS2DQrr 0U, // CVTPS2PDrm 0U, // CVTPS2PDrr 0U, // CVTSD2SI64rm 0U, // CVTSD2SI64rr 0U, // CVTSD2SIrm 0U, // CVTSD2SIrr 0U, // CVTSD2SSrm 0U, // CVTSD2SSrr 0U, // CVTSI2SD64rm 0U, // CVTSI2SD64rr 0U, // CVTSI2SDrm 0U, // CVTSI2SDrr 0U, // CVTSI2SS64rm 0U, // CVTSI2SS64rr 0U, // CVTSI2SSrm 0U, // CVTSI2SSrr 0U, // CVTSS2SDrm 0U, // CVTSS2SDrr 0U, // CVTSS2SI64rm 0U, // CVTSS2SI64rr 0U, // CVTSS2SIrm 0U, // CVTSS2SIrr 0U, // CVTTPD2DQrm 0U, // CVTTPD2DQrr 0U, // CVTTPS2DQrm 0U, // CVTTPS2DQrr 0U, // CVTTSD2SI64rm 0U, // CVTTSD2SI64rr 0U, // CVTTSD2SIrm 0U, // CVTTSD2SIrr 0U, // CVTTSS2SI64rm 0U, // CVTTSS2SI64rr 0U, // CVTTSS2SIrm 0U, // CVTTSS2SIrr 0U, // CWD 0U, // CWDE 0U, // DAA 0U, // DAS 0U, // DATA16_PREFIX 0U, // DEC16m 0U, // DEC16r 0U, // DEC16r_alt 0U, // DEC32m 0U, // DEC32r 0U, // DEC32r_alt 0U, // DEC64m 0U, // DEC64r 0U, // DEC8m 0U, // DEC8r 0U, // DIV16m 0U, // DIV16r 0U, // DIV32m 0U, // DIV32r 0U, // DIV64m 0U, // DIV64r 0U, // DIV8m 0U, // DIV8r 0U, // DIVPDrm 0U, // DIVPDrr 0U, // DIVPSrm 0U, // DIVPSrr 0U, // DIVR_F32m 0U, // DIVR_F64m 0U, // DIVR_FI16m 0U, // DIVR_FI32m 0U, // DIVR_FPrST0 0U, // DIVR_FST0r 0U, // DIVR_Fp32m 0U, // DIVR_Fp64m 0U, // DIVR_Fp64m32 0U, // DIVR_Fp80m32 0U, // DIVR_Fp80m64 0U, // DIVR_FpI16m32 0U, // DIVR_FpI16m64 0U, // DIVR_FpI16m80 0U, // DIVR_FpI32m32 0U, // DIVR_FpI32m64 0U, // DIVR_FpI32m80 0U, // DIVR_FrST0 0U, // DIVSDrm 0U, // DIVSDrm_Int 0U, // DIVSDrr 0U, // DIVSDrr_Int 0U, // DIVSSrm 0U, // DIVSSrm_Int 0U, // DIVSSrr 0U, // DIVSSrr_Int 0U, // DIV_F32m 0U, // DIV_F64m 0U, // DIV_FI16m 0U, // DIV_FI32m 0U, // DIV_FPrST0 0U, // DIV_FST0r 0U, // DIV_Fp32 0U, // DIV_Fp32m 0U, // DIV_Fp64 0U, // DIV_Fp64m 0U, // DIV_Fp64m32 0U, // DIV_Fp80 0U, // DIV_Fp80m32 0U, // DIV_Fp80m64 0U, // DIV_FpI16m32 0U, // DIV_FpI16m64 0U, // DIV_FpI16m80 0U, // DIV_FpI32m32 0U, // DIV_FpI32m64 0U, // DIV_FpI32m80 0U, // DIV_FrST0 0U, // DPPDrmi 0U, // DPPDrri 0U, // DPPSrmi 0U, // DPPSrri 0U, // EH_RETURN 0U, // EH_RETURN64 0U, // EH_SjLj_LongJmp32 0U, // EH_SjLj_LongJmp64 0U, // EH_SjLj_SetJmp32 0U, // EH_SjLj_SetJmp64 0U, // EH_SjLj_Setup 0U, // ENCLS 0U, // ENCLU 0U, // ENTER 0U, // EXTRACTPSmr 4U, // EXTRACTPSrr 0U, // EXTRQ 0U, // EXTRQI 0U, // F2XM1 0U, // FARCALL16i 0U, // FARCALL16m 0U, // FARCALL32i 0U, // FARCALL32m 0U, // FARCALL64 0U, // FARJMP16i 0U, // FARJMP16m 0U, // FARJMP32i 0U, // FARJMP32m 0U, // FARJMP64 0U, // FBLDm 0U, // FBSTPm 0U, // FCOM32m 0U, // FCOM64m 0U, // FCOMP32m 0U, // FCOMP64m 0U, // FCOMPP 0U, // FDECSTP 0U, // FEMMS 0U, // FFREE 0U, // FICOM16m 0U, // FICOM32m 0U, // FICOMP16m 0U, // FICOMP32m 0U, // FINCSTP 0U, // FLDCW16m 0U, // FLDENVm 0U, // FLDL2E 0U, // FLDL2T 0U, // FLDLG2 0U, // FLDLN2 0U, // FLDPI 0U, // FNCLEX 0U, // FNINIT 0U, // FNOP 0U, // FNSTCW16m 0U, // FNSTSW16r 0U, // FNSTSWm 0U, // FP32_TO_INT16_IN_MEM 0U, // FP32_TO_INT32_IN_MEM 0U, // FP32_TO_INT64_IN_MEM 0U, // FP64_TO_INT16_IN_MEM 0U, // FP64_TO_INT32_IN_MEM 0U, // FP64_TO_INT64_IN_MEM 0U, // FP80_TO_INT16_IN_MEM 0U, // FP80_TO_INT32_IN_MEM 0U, // FP80_TO_INT64_IN_MEM 0U, // FPATAN 0U, // FPREM 0U, // FPREM1 0U, // FPTAN 0U, // FP_FFREEP 0U, // FRNDINT 0U, // FRSTORm 0U, // FSAVEm 0U, // FSCALE 0U, // FSETPM 0U, // FSINCOS 0U, // FSTENVm 0U, // FXAM 0U, // FXRSTOR 0U, // FXRSTOR64 0U, // FXSAVE 0U, // FXSAVE64 0U, // FXTRACT 0U, // FYL2X 0U, // FYL2XP1 0U, // FsANDNPDrm 0U, // FsANDNPDrr 0U, // FsANDNPSrm 0U, // FsANDNPSrr 0U, // FsANDPDrm 0U, // FsANDPDrr 0U, // FsANDPSrm 0U, // FsANDPSrr 0U, // FsFLD0SD 0U, // FsFLD0SS 0U, // FsMOVAPDrm 0U, // FsMOVAPSrm 0U, // FsORPDrm 0U, // FsORPDrr 0U, // FsORPSrm 0U, // FsORPSrr 0U, // FsVMOVAPDrm 0U, // FsVMOVAPSrm 0U, // FsXORPDrm 0U, // FsXORPDrr 0U, // FsXORPSrm 0U, // FsXORPSrr 0U, // FvANDNPDrm 0U, // FvANDNPDrr 0U, // FvANDNPSrm 0U, // FvANDNPSrr 0U, // FvANDPDrm 0U, // FvANDPDrr 0U, // FvANDPSrm 0U, // FvANDPSrr 0U, // FvORPDrm 0U, // FvORPDrr 0U, // FvORPSrm 0U, // FvORPSrr 0U, // FvXORPDrm 0U, // FvXORPDrr 0U, // FvXORPSrm 0U, // FvXORPSrr 0U, // GETSEC 0U, // HADDPDrm 0U, // HADDPDrr 0U, // HADDPSrm 0U, // HADDPSrr 0U, // HLT 0U, // HSUBPDrm 0U, // HSUBPDrr 0U, // HSUBPSrm 0U, // HSUBPSrr 0U, // IDIV16m 0U, // IDIV16r 0U, // IDIV32m 0U, // IDIV32r 0U, // IDIV64m 0U, // IDIV64r 0U, // IDIV8m 0U, // IDIV8r 0U, // ILD_F16m 0U, // ILD_F32m 0U, // ILD_F64m 0U, // ILD_Fp16m32 0U, // ILD_Fp16m64 0U, // ILD_Fp16m80 0U, // ILD_Fp32m32 0U, // ILD_Fp32m64 0U, // ILD_Fp32m80 0U, // ILD_Fp64m32 0U, // ILD_Fp64m64 0U, // ILD_Fp64m80 0U, // IMUL16m 0U, // IMUL16r 0U, // IMUL16rm 0U, // IMUL16rmi 0U, // IMUL16rmi8 0U, // IMUL16rr 4U, // IMUL16rri 4U, // IMUL16rri8 0U, // IMUL32m 0U, // IMUL32r 0U, // IMUL32rm 4U, // IMUL32rmi 4U, // IMUL32rmi8 0U, // IMUL32rr 4U, // IMUL32rri 4U, // IMUL32rri8 0U, // IMUL64m 0U, // IMUL64r 0U, // IMUL64rm 4U, // IMUL64rmi32 4U, // IMUL64rmi8 0U, // IMUL64rr 4U, // IMUL64rri32 4U, // IMUL64rri8 0U, // IMUL8m 0U, // IMUL8r 0U, // IN16ri 0U, // IN16rr 0U, // IN32ri 0U, // IN32rr 0U, // IN8ri 0U, // IN8rr 0U, // INC16m 0U, // INC16r 0U, // INC16r_alt 0U, // INC32m 0U, // INC32r 0U, // INC32r_alt 0U, // INC64m 0U, // INC64r 0U, // INC8m 0U, // INC8r 0U, // INSB 0U, // INSERTPSrm 0U, // INSERTPSrr 0U, // INSERTQ 0U, // INSERTQI 0U, // INSL 0U, // INSW 0U, // INT 0U, // INT1 0U, // INT3 0U, // INTO 0U, // INVD 0U, // INVEPT32 0U, // INVEPT64 0U, // INVLPG 0U, // INVLPGA32 0U, // INVLPGA64 0U, // INVPCID32 0U, // INVPCID64 0U, // INVVPID32 0U, // INVVPID64 0U, // IRET16 0U, // IRET32 0U, // IRET64 0U, // ISTT_FP16m 0U, // ISTT_FP32m 0U, // ISTT_FP64m 0U, // ISTT_Fp16m32 0U, // ISTT_Fp16m64 0U, // ISTT_Fp16m80 0U, // ISTT_Fp32m32 0U, // ISTT_Fp32m64 0U, // ISTT_Fp32m80 0U, // ISTT_Fp64m32 0U, // ISTT_Fp64m64 0U, // ISTT_Fp64m80 0U, // IST_F16m 0U, // IST_F32m 0U, // IST_FP16m 0U, // IST_FP32m 0U, // IST_FP64m 0U, // IST_Fp16m32 0U, // IST_Fp16m64 0U, // IST_Fp16m80 0U, // IST_Fp32m32 0U, // IST_Fp32m64 0U, // IST_Fp32m80 0U, // IST_Fp64m32 0U, // IST_Fp64m64 0U, // IST_Fp64m80 4U, // Int_CMPSDrm 72U, // Int_CMPSDrr 4U, // Int_CMPSSrm 72U, // Int_CMPSSrr 0U, // Int_COMISDrm 0U, // Int_COMISDrr 0U, // Int_COMISSrm 0U, // Int_COMISSrr 0U, // Int_CVTSD2SSrm 0U, // Int_CVTSD2SSrr 0U, // Int_CVTSI2SD64rm 0U, // Int_CVTSI2SD64rr 0U, // Int_CVTSI2SDrm 0U, // Int_CVTSI2SDrr 0U, // Int_CVTSI2SS64rm 0U, // Int_CVTSI2SS64rr 0U, // Int_CVTSI2SSrm 0U, // Int_CVTSI2SSrr 0U, // Int_CVTSS2SDrm 0U, // Int_CVTSS2SDrr 0U, // Int_CVTTSD2SI64rm 0U, // Int_CVTTSD2SI64rr 0U, // Int_CVTTSD2SIrm 0U, // Int_CVTTSD2SIrr 0U, // Int_CVTTSS2SI64rm 0U, // Int_CVTTSS2SI64rr 0U, // Int_CVTTSS2SIrm 0U, // Int_CVTTSS2SIrr 0U, // Int_MemBarrier 0U, // Int_UCOMISDrm 0U, // Int_UCOMISDrr 0U, // Int_UCOMISSrm 0U, // Int_UCOMISSrr 140U, // Int_VCMPSDrm 2248U, // Int_VCMPSDrr 140U, // Int_VCMPSSrm 2248U, // Int_VCMPSSrr 0U, // Int_VCOMISDZrm 0U, // Int_VCOMISDZrr 0U, // Int_VCOMISDrm 0U, // Int_VCOMISDrr 0U, // Int_VCOMISSZrm 0U, // Int_VCOMISSZrr 0U, // Int_VCOMISSrm 0U, // Int_VCOMISSrr 72U, // Int_VCVTSD2SSrm 4U, // Int_VCVTSD2SSrr 72U, // Int_VCVTSI2SD64Zrm 4U, // Int_VCVTSI2SD64Zrr 72U, // Int_VCVTSI2SD64rm 4U, // Int_VCVTSI2SD64rr 72U, // Int_VCVTSI2SDZrm 4U, // Int_VCVTSI2SDZrr 72U, // Int_VCVTSI2SDrm 4U, // Int_VCVTSI2SDrr 72U, // Int_VCVTSI2SS64Zrm 4U, // Int_VCVTSI2SS64Zrr 72U, // Int_VCVTSI2SS64rm 4U, // Int_VCVTSI2SS64rr 72U, // Int_VCVTSI2SSZrm 4U, // Int_VCVTSI2SSZrr 72U, // Int_VCVTSI2SSrm 4U, // Int_VCVTSI2SSrr 72U, // Int_VCVTSS2SDrm 4U, // Int_VCVTSS2SDrr 0U, // Int_VCVTTSD2SI64Zrm 0U, // Int_VCVTTSD2SI64Zrr 0U, // Int_VCVTTSD2SI64rm 0U, // Int_VCVTTSD2SI64rr 0U, // Int_VCVTTSD2SIZrm 0U, // Int_VCVTTSD2SIZrr 0U, // Int_VCVTTSD2SIrm 0U, // Int_VCVTTSD2SIrr 0U, // Int_VCVTTSD2USI64Zrm 0U, // Int_VCVTTSD2USI64Zrr 0U, // Int_VCVTTSD2USIZrm 0U, // Int_VCVTTSD2USIZrr 0U, // Int_VCVTTSS2SI64Zrm 0U, // Int_VCVTTSS2SI64Zrr 0U, // Int_VCVTTSS2SI64rm 0U, // Int_VCVTTSS2SI64rr 0U, // Int_VCVTTSS2SIZrm 0U, // Int_VCVTTSS2SIZrr 0U, // Int_VCVTTSS2SIrm 0U, // Int_VCVTTSS2SIrr 0U, // Int_VCVTTSS2USI64Zrm 0U, // Int_VCVTTSS2USI64Zrr 0U, // Int_VCVTTSS2USIZrm 0U, // Int_VCVTTSS2USIZrr 72U, // Int_VCVTUSI2SD64Zrm 4U, // Int_VCVTUSI2SD64Zrr 72U, // Int_VCVTUSI2SDZrm 4U, // Int_VCVTUSI2SDZrr 72U, // Int_VCVTUSI2SS64Zrm 4U, // Int_VCVTUSI2SS64Zrr 72U, // Int_VCVTUSI2SSZrm 4U, // Int_VCVTUSI2SSZrr 0U, // Int_VUCOMISDZrm 0U, // Int_VUCOMISDZrr 0U, // Int_VUCOMISDrm 0U, // Int_VUCOMISDrr 0U, // Int_VUCOMISSZrm 0U, // Int_VUCOMISSZrr 0U, // Int_VUCOMISSrm 0U, // Int_VUCOMISSrr 0U, // JAE_1 0U, // JAE_2 0U, // JAE_4 0U, // JA_1 0U, // JA_2 0U, // JA_4 0U, // JBE_1 0U, // JBE_2 0U, // JBE_4 0U, // JB_1 0U, // JB_2 0U, // JB_4 0U, // JCXZ 0U, // JECXZ 0U, // JE_1 0U, // JE_2 0U, // JE_4 0U, // JGE_1 0U, // JGE_2 0U, // JGE_4 0U, // JG_1 0U, // JG_2 0U, // JG_4 0U, // JLE_1 0U, // JLE_2 0U, // JLE_4 0U, // JL_1 0U, // JL_2 0U, // JL_4 0U, // JMP16m 0U, // JMP16r 0U, // JMP32m 0U, // JMP32r 0U, // JMP64m 0U, // JMP64r 0U, // JMP_1 0U, // JMP_2 0U, // JMP_4 0U, // JNE_1 0U, // JNE_2 0U, // JNE_4 0U, // JNO_1 0U, // JNO_2 0U, // JNO_4 0U, // JNP_1 0U, // JNP_2 0U, // JNP_4 0U, // JNS_1 0U, // JNS_2 0U, // JNS_4 0U, // JO_1 0U, // JO_2 0U, // JO_4 0U, // JP_1 0U, // JP_2 0U, // JP_4 0U, // JRCXZ 0U, // JS_1 0U, // JS_2 0U, // JS_4 4U, // KANDBrr 4U, // KANDDrr 4U, // KANDNBrr 4U, // KANDNDrr 4U, // KANDNQrr 4U, // KANDNWrr 4U, // KANDQrr 4U, // KANDWrr 0U, // KMOVBkk 0U, // KMOVBkm 0U, // KMOVBkr 0U, // KMOVBmk 0U, // KMOVBrk 0U, // KMOVDkk 0U, // KMOVDkm 0U, // KMOVDkr 0U, // KMOVDmk 0U, // KMOVDrk 0U, // KMOVQkk 0U, // KMOVQkm 0U, // KMOVQkr 0U, // KMOVQmk 0U, // KMOVQrk 0U, // KMOVWkk 0U, // KMOVWkm 0U, // KMOVWkr 0U, // KMOVWmk 0U, // KMOVWrk 0U, // KNOTBrr 0U, // KNOTDrr 0U, // KNOTQrr 0U, // KNOTWrr 4U, // KORBrr 4U, // KORDrr 4U, // KORQrr 0U, // KORTESTBrr 0U, // KORTESTDrr 0U, // KORTESTQrr 0U, // KORTESTWrr 4U, // KORWrr 0U, // KSET0B 0U, // KSET0W 0U, // KSET1B 0U, // KSET1W 4U, // KSHIFTLBri 4U, // KSHIFTLDri 4U, // KSHIFTLQri 4U, // KSHIFTLWri 4U, // KSHIFTRBri 4U, // KSHIFTRDri 4U, // KSHIFTRQri 4U, // KSHIFTRWri 4U, // KUNPCKBWrr 4U, // KXNORBrr 4U, // KXNORDrr 4U, // KXNORQrr 4U, // KXNORWrr 4U, // KXORBrr 4U, // KXORDrr 4U, // KXORQrr 4U, // KXORWrr 0U, // LAHF 0U, // LAR16rm 0U, // LAR16rr 0U, // LAR32rm 0U, // LAR32rr 0U, // LAR64rm 0U, // LAR64rr 0U, // LCMPXCHG16 0U, // LCMPXCHG16B 0U, // LCMPXCHG32 0U, // LCMPXCHG64 0U, // LCMPXCHG8 0U, // LCMPXCHG8B 0U, // LDDQUrm 0U, // LDMXCSR 0U, // LDS16rm 0U, // LDS32rm 0U, // LD_F0 0U, // LD_F1 0U, // LD_F32m 0U, // LD_F64m 0U, // LD_F80m 0U, // LD_Fp032 0U, // LD_Fp064 0U, // LD_Fp080 0U, // LD_Fp132 0U, // LD_Fp164 0U, // LD_Fp180 0U, // LD_Fp32m 0U, // LD_Fp32m64 0U, // LD_Fp32m80 0U, // LD_Fp64m 0U, // LD_Fp64m80 0U, // LD_Fp80m 0U, // LD_Frr 0U, // LEA16r 0U, // LEA32r 0U, // LEA64_32r 0U, // LEA64r 0U, // LEAVE 0U, // LEAVE64 0U, // LES16rm 0U, // LES32rm 0U, // LFENCE 0U, // LFS16rm 0U, // LFS32rm 0U, // LFS64rm 0U, // LGDT16m 0U, // LGDT32m 0U, // LGDT64m 0U, // LGS16rm 0U, // LGS32rm 0U, // LGS64rm 0U, // LIDT16m 0U, // LIDT32m 0U, // LIDT64m 0U, // LLDT16m 0U, // LLDT16r 0U, // LMSW16m 0U, // LMSW16r 0U, // LOCK_ADD16mi 0U, // LOCK_ADD16mi8 0U, // LOCK_ADD16mr 0U, // LOCK_ADD32mi 0U, // LOCK_ADD32mi8 0U, // LOCK_ADD32mr 0U, // LOCK_ADD64mi32 0U, // LOCK_ADD64mi8 0U, // LOCK_ADD64mr 0U, // LOCK_ADD8mi 0U, // LOCK_ADD8mr 0U, // LOCK_AND16mi 0U, // LOCK_AND16mi8 0U, // LOCK_AND16mr 0U, // LOCK_AND32mi 0U, // LOCK_AND32mi8 0U, // LOCK_AND32mr 0U, // LOCK_AND64mi32 0U, // LOCK_AND64mi8 0U, // LOCK_AND64mr 0U, // LOCK_AND8mi 0U, // LOCK_AND8mr 0U, // LOCK_DEC16m 0U, // LOCK_DEC32m 0U, // LOCK_DEC64m 0U, // LOCK_DEC8m 0U, // LOCK_INC16m 0U, // LOCK_INC32m 0U, // LOCK_INC64m 0U, // LOCK_INC8m 0U, // LOCK_OR16mi 0U, // LOCK_OR16mi8 0U, // LOCK_OR16mr 0U, // LOCK_OR32mi 0U, // LOCK_OR32mi8 0U, // LOCK_OR32mr 0U, // LOCK_OR64mi32 0U, // LOCK_OR64mi8 0U, // LOCK_OR64mr 0U, // LOCK_OR8mi 0U, // LOCK_OR8mr 0U, // LOCK_PREFIX 0U, // LOCK_SUB16mi 0U, // LOCK_SUB16mi8 0U, // LOCK_SUB16mr 0U, // LOCK_SUB32mi 0U, // LOCK_SUB32mi8 0U, // LOCK_SUB32mr 0U, // LOCK_SUB64mi32 0U, // LOCK_SUB64mi8 0U, // LOCK_SUB64mr 0U, // LOCK_SUB8mi 0U, // LOCK_SUB8mr 0U, // LOCK_XOR16mi 0U, // LOCK_XOR16mi8 0U, // LOCK_XOR16mr 0U, // LOCK_XOR32mi 0U, // LOCK_XOR32mi8 0U, // LOCK_XOR32mr 0U, // LOCK_XOR64mi32 0U, // LOCK_XOR64mi8 0U, // LOCK_XOR64mr 0U, // LOCK_XOR8mi 0U, // LOCK_XOR8mr 0U, // LODSB 0U, // LODSL 0U, // LODSQ 0U, // LODSW 0U, // LOOP 0U, // LOOPE 0U, // LOOPNE 0U, // LRETIL 0U, // LRETIQ 0U, // LRETIW 0U, // LRETL 0U, // LRETQ 0U, // LRETW 0U, // LSL16rm 0U, // LSL16rr 0U, // LSL32rm 0U, // LSL32rr 0U, // LSL64rm 0U, // LSL64rr 0U, // LSS16rm 0U, // LSS32rm 0U, // LSS64rm 0U, // LTRm 0U, // LTRr 0U, // LXADD16 0U, // LXADD32 0U, // LXADD64 1U, // LXADD8 0U, // LZCNT16rm 0U, // LZCNT16rr 0U, // LZCNT32rm 0U, // LZCNT32rr 0U, // LZCNT64rm 0U, // LZCNT64rr 0U, // MASKMOVDQU 0U, // MASKMOVDQU64 0U, // MAXCPDrm 0U, // MAXCPDrr 0U, // MAXCPSrm 0U, // MAXCPSrr 0U, // MAXCSDrm 0U, // MAXCSDrr 0U, // MAXCSSrm 0U, // MAXCSSrr 0U, // MAXPDrm 0U, // MAXPDrr 0U, // MAXPSrm 0U, // MAXPSrr 0U, // MAXSDrm 0U, // MAXSDrm_Int 0U, // MAXSDrr 0U, // MAXSDrr_Int 0U, // MAXSSrm 0U, // MAXSSrm_Int 0U, // MAXSSrr 0U, // MAXSSrr_Int 0U, // MFENCE 0U, // MINCPDrm 0U, // MINCPDrr 0U, // MINCPSrm 0U, // MINCPSrr 0U, // MINCSDrm 0U, // MINCSDrr 0U, // MINCSSrm 0U, // MINCSSrr 0U, // MINPDrm 0U, // MINPDrr 0U, // MINPSrm 0U, // MINPSrr 0U, // MINSDrm 0U, // MINSDrm_Int 0U, // MINSDrr 0U, // MINSDrr_Int 0U, // MINSSrm 0U, // MINSSrm_Int 0U, // MINSSrr 0U, // MINSSrr_Int 0U, // MMX_CVTPD2PIirm 0U, // MMX_CVTPD2PIirr 0U, // MMX_CVTPI2PDirm 0U, // MMX_CVTPI2PDirr 0U, // MMX_CVTPI2PSirm 0U, // MMX_CVTPI2PSirr 0U, // MMX_CVTPS2PIirm 0U, // MMX_CVTPS2PIirr 0U, // MMX_CVTTPD2PIirm 0U, // MMX_CVTTPD2PIirr 0U, // MMX_CVTTPS2PIirm 0U, // MMX_CVTTPS2PIirr 0U, // MMX_EMMS 0U, // MMX_MASKMOVQ 0U, // MMX_MASKMOVQ64 0U, // MMX_MOVD64from64rm 0U, // MMX_MOVD64from64rr 0U, // MMX_MOVD64grr 0U, // MMX_MOVD64mr 0U, // MMX_MOVD64rm 0U, // MMX_MOVD64rr 0U, // MMX_MOVD64to64rm 0U, // MMX_MOVD64to64rr 0U, // MMX_MOVDQ2Qrr 0U, // MMX_MOVFR642Qrr 0U, // MMX_MOVNTQmr 0U, // MMX_MOVQ2DQrr 0U, // MMX_MOVQ2FR64rr 0U, // MMX_MOVQ64mr 0U, // MMX_MOVQ64rm 0U, // MMX_MOVQ64rr 0U, // MMX_MOVQ64rr_REV 0U, // MMX_PABSBrm64 0U, // MMX_PABSBrr64 0U, // MMX_PABSDrm64 0U, // MMX_PABSDrr64 0U, // MMX_PABSWrm64 0U, // MMX_PABSWrr64 0U, // MMX_PACKSSDWirm 0U, // MMX_PACKSSDWirr 0U, // MMX_PACKSSWBirm 0U, // MMX_PACKSSWBirr 0U, // MMX_PACKUSWBirm 0U, // MMX_PACKUSWBirr 0U, // MMX_PADDBirm 0U, // MMX_PADDBirr 0U, // MMX_PADDDirm 0U, // MMX_PADDDirr 0U, // MMX_PADDQirm 0U, // MMX_PADDQirr 0U, // MMX_PADDSBirm 0U, // MMX_PADDSBirr 0U, // MMX_PADDSWirm 0U, // MMX_PADDSWirr 0U, // MMX_PADDUSBirm 0U, // MMX_PADDUSBirr 0U, // MMX_PADDUSWirm 0U, // MMX_PADDUSWirr 0U, // MMX_PADDWirm 0U, // MMX_PADDWirr 4U, // MMX_PALIGNR64irm 0U, // MMX_PALIGNR64irr 0U, // MMX_PANDNirm 0U, // MMX_PANDNirr 0U, // MMX_PANDirm 0U, // MMX_PANDirr 0U, // MMX_PAVGBirm 0U, // MMX_PAVGBirr 0U, // MMX_PAVGWirm 0U, // MMX_PAVGWirr 0U, // MMX_PCMPEQBirm 0U, // MMX_PCMPEQBirr 0U, // MMX_PCMPEQDirm 0U, // MMX_PCMPEQDirr 0U, // MMX_PCMPEQWirm 0U, // MMX_PCMPEQWirr 0U, // MMX_PCMPGTBirm 0U, // MMX_PCMPGTBirr 0U, // MMX_PCMPGTDirm 0U, // MMX_PCMPGTDirr 0U, // MMX_PCMPGTWirm 0U, // MMX_PCMPGTWirr 4U, // MMX_PEXTRWirri 0U, // MMX_PHADDSWrm64 0U, // MMX_PHADDSWrr64 0U, // MMX_PHADDWrm64 0U, // MMX_PHADDWrr64 0U, // MMX_PHADDrm64 0U, // MMX_PHADDrr64 0U, // MMX_PHSUBDrm64 0U, // MMX_PHSUBDrr64 0U, // MMX_PHSUBSWrm64 0U, // MMX_PHSUBSWrr64 0U, // MMX_PHSUBWrm64 0U, // MMX_PHSUBWrr64 0U, // MMX_PINSRWirmi 0U, // MMX_PINSRWirri 0U, // MMX_PMADDUBSWrm64 0U, // MMX_PMADDUBSWrr64 0U, // MMX_PMADDWDirm 0U, // MMX_PMADDWDirr 0U, // MMX_PMAXSWirm 0U, // MMX_PMAXSWirr 0U, // MMX_PMAXUBirm 0U, // MMX_PMAXUBirr 0U, // MMX_PMINSWirm 0U, // MMX_PMINSWirr 0U, // MMX_PMINUBirm 0U, // MMX_PMINUBirr 0U, // MMX_PMOVMSKBrr 0U, // MMX_PMULHRSWrm64 0U, // MMX_PMULHRSWrr64 0U, // MMX_PMULHUWirm 0U, // MMX_PMULHUWirr 0U, // MMX_PMULHWirm 0U, // MMX_PMULHWirr 0U, // MMX_PMULLWirm 0U, // MMX_PMULLWirr 0U, // MMX_PMULUDQirm 0U, // MMX_PMULUDQirr 0U, // MMX_PORirm 0U, // MMX_PORirr 0U, // MMX_PSADBWirm 0U, // MMX_PSADBWirr 0U, // MMX_PSHUFBrm64 0U, // MMX_PSHUFBrr64 4U, // MMX_PSHUFWmi 4U, // MMX_PSHUFWri 0U, // MMX_PSIGNBrm64 0U, // MMX_PSIGNBrr64 0U, // MMX_PSIGNDrm64 0U, // MMX_PSIGNDrr64 0U, // MMX_PSIGNWrm64 0U, // MMX_PSIGNWrr64 0U, // MMX_PSLLDri 0U, // MMX_PSLLDrm 0U, // MMX_PSLLDrr 0U, // MMX_PSLLQri 0U, // MMX_PSLLQrm 0U, // MMX_PSLLQrr 0U, // MMX_PSLLWri 0U, // MMX_PSLLWrm 0U, // MMX_PSLLWrr 0U, // MMX_PSRADri 0U, // MMX_PSRADrm 0U, // MMX_PSRADrr 0U, // MMX_PSRAWri 0U, // MMX_PSRAWrm 0U, // MMX_PSRAWrr 0U, // MMX_PSRLDri 0U, // MMX_PSRLDrm 0U, // MMX_PSRLDrr 0U, // MMX_PSRLQri 0U, // MMX_PSRLQrm 0U, // MMX_PSRLQrr 0U, // MMX_PSRLWri 0U, // MMX_PSRLWrm 0U, // MMX_PSRLWrr 0U, // MMX_PSUBBirm 0U, // MMX_PSUBBirr 0U, // MMX_PSUBDirm 0U, // MMX_PSUBDirr 0U, // MMX_PSUBQirm 0U, // MMX_PSUBQirr 0U, // MMX_PSUBSBirm 0U, // MMX_PSUBSBirr 0U, // MMX_PSUBSWirm 0U, // MMX_PSUBSWirr 0U, // MMX_PSUBUSBirm 0U, // MMX_PSUBUSBirr 0U, // MMX_PSUBUSWirm 0U, // MMX_PSUBUSWirr 0U, // MMX_PSUBWirm 0U, // MMX_PSUBWirr 0U, // MMX_PUNPCKHBWirm 0U, // MMX_PUNPCKHBWirr 0U, // MMX_PUNPCKHDQirm 0U, // MMX_PUNPCKHDQirr 0U, // MMX_PUNPCKHWDirm 0U, // MMX_PUNPCKHWDirr 0U, // MMX_PUNPCKLBWirm 0U, // MMX_PUNPCKLBWirr 0U, // MMX_PUNPCKLDQirm 0U, // MMX_PUNPCKLDQirr 0U, // MMX_PUNPCKLWDirm 0U, // MMX_PUNPCKLWDirr 0U, // MMX_PXORirm 0U, // MMX_PXORirr 0U, // MONITOR 0U, // MONITORrrr 0U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 0U, // MOV16ao16 0U, // MOV16ao32 0U, // MOV16ao64 0U, // MOV16mi 0U, // MOV16mr 0U, // MOV16ms 0U, // MOV16o16a 0U, // MOV16o32a 0U, // MOV16o64a 0U, // MOV16ri 0U, // MOV16ri_alt 0U, // MOV16rm 0U, // MOV16rr 0U, // MOV16rr_REV 0U, // MOV16rs 0U, // MOV16sm 0U, // MOV16sr 0U, // MOV32ao16 0U, // MOV32ao32 0U, // MOV32ao64 0U, // MOV32cr 0U, // MOV32dr 0U, // MOV32mi 0U, // MOV32mr 0U, // MOV32ms 0U, // MOV32o16a 0U, // MOV32o32a 0U, // MOV32o64a 0U, // MOV32r0 0U, // MOV32rc 0U, // MOV32rd 0U, // MOV32ri 0U, // MOV32ri64 0U, // MOV32ri_alt 0U, // MOV32rm 0U, // MOV32rr 0U, // MOV32rr_REV 0U, // MOV32rs 0U, // MOV32sm 0U, // MOV32sr 0U, // MOV64ao32 0U, // MOV64ao64 0U, // MOV64cr 0U, // MOV64dr 0U, // MOV64mi32 0U, // MOV64mr 0U, // MOV64ms 0U, // MOV64o32a 0U, // MOV64o64a 0U, // MOV64rc 0U, // MOV64rd 0U, // MOV64ri 0U, // MOV64ri32 0U, // MOV64rm 0U, // MOV64rr 0U, // MOV64rr_REV 0U, // MOV64rs 0U, // MOV64sm 0U, // MOV64sr 0U, // MOV64toPQIrm 0U, // MOV64toPQIrr 0U, // MOV64toSDrm 0U, // MOV64toSDrr 0U, // MOV8ao16 0U, // MOV8ao32 0U, // MOV8ao64 0U, // MOV8mi 0U, // MOV8mr 0U, // MOV8mr_NOREX 0U, // MOV8o16a 0U, // MOV8o32a 0U, // MOV8o64a 0U, // MOV8ri 0U, // MOV8ri_alt 0U, // MOV8rm 0U, // MOV8rm_NOREX 0U, // MOV8rr 0U, // MOV8rr_NOREX 0U, // MOV8rr_REV 0U, // MOVAPDmr 0U, // MOVAPDrm 0U, // MOVAPDrr 0U, // MOVAPDrr_REV 0U, // MOVAPSmr 0U, // MOVAPSrm 0U, // MOVAPSrr 0U, // MOVAPSrr_REV 0U, // MOVBE16mr 0U, // MOVBE16rm 0U, // MOVBE32mr 0U, // MOVBE32rm 0U, // MOVBE64mr 0U, // MOVBE64rm 0U, // MOVDDUPrm 0U, // MOVDDUPrr 0U, // MOVDI2PDIrm 0U, // MOVDI2PDIrr 0U, // MOVDI2SSrm 0U, // MOVDI2SSrr 0U, // MOVDQAmr 0U, // MOVDQArm 0U, // MOVDQArr 0U, // MOVDQArr_REV 0U, // MOVDQUmr 0U, // MOVDQUrm 0U, // MOVDQUrr 0U, // MOVDQUrr_REV 0U, // MOVHLPSrr 0U, // MOVHPDmr 0U, // MOVHPDrm 0U, // MOVHPSmr 0U, // MOVHPSrm 0U, // MOVLHPSrr 0U, // MOVLPDmr 0U, // MOVLPDrm 0U, // MOVLPSmr 0U, // MOVLPSrm 0U, // MOVMSKPDrr 0U, // MOVMSKPSrr 0U, // MOVNTDQArm 0U, // MOVNTDQmr 0U, // MOVNTI_64mr 0U, // MOVNTImr 0U, // MOVNTPDmr 0U, // MOVNTPSmr 0U, // MOVNTSD 0U, // MOVNTSS 0U, // MOVPC32r 0U, // MOVPDI2DImr 0U, // MOVPDI2DIrr 0U, // MOVPQI2QImr 0U, // MOVPQI2QIrr 0U, // MOVPQIto64rm 0U, // MOVPQIto64rr 0U, // MOVQI2PQIrm 0U, // MOVSB 0U, // MOVSDmr 0U, // MOVSDrm 0U, // MOVSDrr 0U, // MOVSDrr_REV 0U, // MOVSDto64mr 0U, // MOVSDto64rr 0U, // MOVSHDUPrm 0U, // MOVSHDUPrr 0U, // MOVSL 0U, // MOVSLDUPrm 0U, // MOVSLDUPrr 0U, // MOVSQ 0U, // MOVSS2DImr 0U, // MOVSS2DIrr 0U, // MOVSSmr 0U, // MOVSSrm 0U, // MOVSSrr 0U, // MOVSSrr_REV 0U, // MOVSW 0U, // MOVSX16rm8 0U, // MOVSX16rr8 0U, // MOVSX32_NOREXrm8 0U, // MOVSX32_NOREXrr8 0U, // MOVSX32rm16 0U, // MOVSX32rm8 0U, // MOVSX32rr16 0U, // MOVSX32rr8 0U, // MOVSX64_NOREXrr32 0U, // MOVSX64rm16 0U, // MOVSX64rm32 0U, // MOVSX64rm32_alt 0U, // MOVSX64rm8 0U, // MOVSX64rr16 0U, // MOVSX64rr32 0U, // MOVSX64rr8 0U, // MOVUPDmr 0U, // MOVUPDrm 0U, // MOVUPDrr 0U, // MOVUPDrr_REV 0U, // MOVUPSmr 0U, // MOVUPSrm 0U, // MOVUPSrr 0U, // MOVUPSrr_REV 0U, // MOVZPQILo2PQIrm 0U, // MOVZPQILo2PQIrr 0U, // MOVZQI2PQIrm 0U, // MOVZQI2PQIrr 0U, // MOVZX16rm8 0U, // MOVZX16rr8 0U, // MOVZX32_NOREXrm8 0U, // MOVZX32_NOREXrr8 0U, // MOVZX32rm16 0U, // MOVZX32rm8 0U, // MOVZX32rr16 0U, // MOVZX32rr8 0U, // MOVZX64rm16_Q 0U, // MOVZX64rm8_Q 0U, // MOVZX64rr16_Q 0U, // MOVZX64rr8_Q 0U, // MPSADBWrmi 0U, // MPSADBWrri 0U, // MUL16m 0U, // MUL16r 0U, // MUL32m 0U, // MUL32r 0U, // MUL64m 0U, // MUL64r 0U, // MUL8m 0U, // MUL8r 0U, // MULPDrm 0U, // MULPDrr 0U, // MULPSrm 0U, // MULPSrr 0U, // MULSDrm 0U, // MULSDrm_Int 0U, // MULSDrr 0U, // MULSDrr_Int 0U, // MULSSrm 0U, // MULSSrm_Int 0U, // MULSSrr 0U, // MULSSrr_Int 72U, // MULX32rm 4U, // MULX32rr 72U, // MULX64rm 4U, // MULX64rr 0U, // MUL_F32m 0U, // MUL_F64m 0U, // MUL_FI16m 0U, // MUL_FI32m 0U, // MUL_FPrST0 0U, // MUL_FST0r 0U, // MUL_Fp32 0U, // MUL_Fp32m 0U, // MUL_Fp64 0U, // MUL_Fp64m 0U, // MUL_Fp64m32 0U, // MUL_Fp80 0U, // MUL_Fp80m32 0U, // MUL_Fp80m64 0U, // MUL_FpI16m32 0U, // MUL_FpI16m64 0U, // MUL_FpI16m80 0U, // MUL_FpI32m32 0U, // MUL_FpI32m64 0U, // MUL_FpI32m80 0U, // MUL_FrST0 0U, // MWAITrr 0U, // NEG16m 0U, // NEG16r 0U, // NEG32m 0U, // NEG32r 0U, // NEG64m 0U, // NEG64r 0U, // NEG8m 0U, // NEG8r 0U, // NOOP 0U, // NOOP18_16m4 0U, // NOOP18_16m5 0U, // NOOP18_16m6 0U, // NOOP18_16m7 0U, // NOOP18_16r4 0U, // NOOP18_16r5 0U, // NOOP18_16r6 0U, // NOOP18_16r7 0U, // NOOP18_m4 0U, // NOOP18_m5 0U, // NOOP18_m6 0U, // NOOP18_m7 0U, // NOOP18_r4 0U, // NOOP18_r5 0U, // NOOP18_r6 0U, // NOOP18_r7 0U, // NOOP19rr 0U, // NOOPL 0U, // NOOPL_19 0U, // NOOPL_1a 0U, // NOOPL_1b 0U, // NOOPL_1c 0U, // NOOPL_1d 0U, // NOOPL_1e 0U, // NOOPW 0U, // NOOPW_19 0U, // NOOPW_1a 0U, // NOOPW_1b 0U, // NOOPW_1c 0U, // NOOPW_1d 0U, // NOOPW_1e 0U, // NOT16m 0U, // NOT16r 0U, // NOT32m 0U, // NOT32r 0U, // NOT64m 0U, // NOT64r 0U, // NOT8m 0U, // NOT8r 0U, // OR16i16 0U, // OR16mi 0U, // OR16mi8 0U, // OR16mr 0U, // OR16ri 0U, // OR16ri8 0U, // OR16rm 0U, // OR16rr 0U, // OR16rr_REV 0U, // OR32i32 0U, // OR32mi 0U, // OR32mi8 0U, // OR32mr 0U, // OR32mrLocked 0U, // OR32ri 0U, // OR32ri8 0U, // OR32rm 0U, // OR32rr 0U, // OR32rr_REV 0U, // OR64i32 0U, // OR64mi32 0U, // OR64mi8 0U, // OR64mr 0U, // OR64ri32 0U, // OR64ri8 0U, // OR64rm 0U, // OR64rr 0U, // OR64rr_REV 0U, // OR8i8 0U, // OR8mi 0U, // OR8mi8 0U, // OR8mr 0U, // OR8ri 0U, // OR8ri8 0U, // OR8rm 0U, // OR8rr 0U, // OR8rr_REV 0U, // ORPDrm 0U, // ORPDrr 0U, // ORPSrm 0U, // ORPSrr 0U, // OUT16ir 0U, // OUT16rr 0U, // OUT32ir 0U, // OUT32rr 0U, // OUT8ir 0U, // OUT8rr 0U, // OUTSB 0U, // OUTSL 0U, // OUTSW 0U, // PABSBrm128 0U, // PABSBrr128 0U, // PABSDrm128 0U, // PABSDrr128 0U, // PABSWrm128 0U, // PABSWrr128 0U, // PACKSSDWrm 0U, // PACKSSDWrr 0U, // PACKSSWBrm 0U, // PACKSSWBrr 0U, // PACKUSDWrm 0U, // PACKUSDWrr 0U, // PACKUSWBrm 0U, // PACKUSWBrr 0U, // PADDBrm 0U, // PADDBrr 0U, // PADDDrm 0U, // PADDDrr 0U, // PADDQrm 0U, // PADDQrr 0U, // PADDSBrm 0U, // PADDSBrr 0U, // PADDSWrm 0U, // PADDSWrr 0U, // PADDUSBrm 0U, // PADDUSBrr 0U, // PADDUSWrm 0U, // PADDUSWrr 0U, // PADDWrm 0U, // PADDWrr 0U, // PALIGNR128rm 0U, // PALIGNR128rr 0U, // PANDNrm 0U, // PANDNrr 0U, // PANDrm 0U, // PANDrr 0U, // PAUSE 0U, // PAVGBrm 0U, // PAVGBrr 0U, // PAVGUSBrm 0U, // PAVGUSBrr 0U, // PAVGWrm 0U, // PAVGWrr 0U, // PBLENDVBrm0 0U, // PBLENDVBrr0 0U, // PBLENDWrmi 0U, // PBLENDWrri 0U, // PCLMULQDQrm 0U, // PCLMULQDQrr 0U, // PCMPEQBrm 0U, // PCMPEQBrr 0U, // PCMPEQDrm 0U, // PCMPEQDrr 0U, // PCMPEQQrm 0U, // PCMPEQQrr 0U, // PCMPEQWrm 0U, // PCMPEQWrr 0U, // PCMPESTRIMEM 0U, // PCMPESTRIREG 0U, // PCMPESTRIrm 4U, // PCMPESTRIrr 0U, // PCMPESTRM128MEM 0U, // PCMPESTRM128REG 0U, // PCMPESTRM128rm 4U, // PCMPESTRM128rr 0U, // PCMPGTBrm 0U, // PCMPGTBrr 0U, // PCMPGTDrm 0U, // PCMPGTDrr 0U, // PCMPGTQrm 0U, // PCMPGTQrr 0U, // PCMPGTWrm 0U, // PCMPGTWrr 0U, // PCMPISTRIMEM 0U, // PCMPISTRIREG 0U, // PCMPISTRIrm 4U, // PCMPISTRIrr 0U, // PCMPISTRM128MEM 0U, // PCMPISTRM128REG 0U, // PCMPISTRM128rm 4U, // PCMPISTRM128rr 0U, // PCOMMIT 72U, // PDEP32rm 4U, // PDEP32rr 72U, // PDEP64rm 4U, // PDEP64rr 72U, // PEXT32rm 4U, // PEXT32rr 72U, // PEXT64rm 4U, // PEXT64rr 1U, // PEXTRBmr 4U, // PEXTRBrr 1U, // PEXTRDmr 4U, // PEXTRDrr 1U, // PEXTRQmr 4U, // PEXTRQrr 1U, // PEXTRWmr 4U, // PEXTRWri 4U, // PEXTRWrr_REV 0U, // PF2IDrm 0U, // PF2IDrr 0U, // PF2IWrm 0U, // PF2IWrr 0U, // PFACCrm 0U, // PFACCrr 0U, // PFADDrm 0U, // PFADDrr 0U, // PFCMPEQrm 0U, // PFCMPEQrr 0U, // PFCMPGErm 0U, // PFCMPGErr 0U, // PFCMPGTrm 0U, // PFCMPGTrr 0U, // PFMAXrm 0U, // PFMAXrr 0U, // PFMINrm 0U, // PFMINrr 0U, // PFMULrm 0U, // PFMULrr 0U, // PFNACCrm 0U, // PFNACCrr 0U, // PFPNACCrm 0U, // PFPNACCrr 0U, // PFRCPIT1rm 0U, // PFRCPIT1rr 0U, // PFRCPIT2rm 0U, // PFRCPIT2rr 0U, // PFRCPrm 0U, // PFRCPrr 0U, // PFRSQIT1rm 0U, // PFRSQIT1rr 0U, // PFRSQRTrm 0U, // PFRSQRTrr 0U, // PFSUBRrm 0U, // PFSUBRrr 0U, // PFSUBrm 0U, // PFSUBrr 0U, // PHADDDrm 0U, // PHADDDrr 0U, // PHADDSWrm128 0U, // PHADDSWrr128 0U, // PHADDWrm 0U, // PHADDWrr 0U, // PHMINPOSUWrm128 0U, // PHMINPOSUWrr128 0U, // PHSUBDrm 0U, // PHSUBDrr 0U, // PHSUBSWrm128 0U, // PHSUBSWrr128 0U, // PHSUBWrm 0U, // PHSUBWrr 0U, // PI2FDrm 0U, // PI2FDrr 0U, // PI2FWrm 0U, // PI2FWrr 0U, // PINSRBrm 0U, // PINSRBrr 4U, // PINSRDrm 0U, // PINSRDrr 4U, // PINSRQrm 0U, // PINSRQrr 0U, // PINSRWrmi 0U, // PINSRWrri 0U, // PMADDUBSWrm128 0U, // PMADDUBSWrr128 0U, // PMADDWDrm 0U, // PMADDWDrr 0U, // PMAXSBrm 0U, // PMAXSBrr 0U, // PMAXSDrm 0U, // PMAXSDrr 0U, // PMAXSWrm 0U, // PMAXSWrr 0U, // PMAXUBrm 0U, // PMAXUBrr 0U, // PMAXUDrm 0U, // PMAXUDrr 0U, // PMAXUWrm 0U, // PMAXUWrr 0U, // PMINSBrm 0U, // PMINSBrr 0U, // PMINSDrm 0U, // PMINSDrr 0U, // PMINSWrm 0U, // PMINSWrr 0U, // PMINUBrm 0U, // PMINUBrr 0U, // PMINUDrm 0U, // PMINUDrr 0U, // PMINUWrm 0U, // PMINUWrr 0U, // PMOVMSKBrr 0U, // PMOVSXBDrm 0U, // PMOVSXBDrr 0U, // PMOVSXBQrm 0U, // PMOVSXBQrr 0U, // PMOVSXBWrm 0U, // PMOVSXBWrr 0U, // PMOVSXDQrm 0U, // PMOVSXDQrr 0U, // PMOVSXWDrm 0U, // PMOVSXWDrr 0U, // PMOVSXWQrm 0U, // PMOVSXWQrr 0U, // PMOVZXBDrm 0U, // PMOVZXBDrr 0U, // PMOVZXBQrm 0U, // PMOVZXBQrr 0U, // PMOVZXBWrm 0U, // PMOVZXBWrr 0U, // PMOVZXDQrm 0U, // PMOVZXDQrr 0U, // PMOVZXWDrm 0U, // PMOVZXWDrr 0U, // PMOVZXWQrm 0U, // PMOVZXWQrr 0U, // PMULDQrm 0U, // PMULDQrr 0U, // PMULHRSWrm128 0U, // PMULHRSWrr128 0U, // PMULHRWrm 0U, // PMULHRWrr 0U, // PMULHUWrm 0U, // PMULHUWrr 0U, // PMULHWrm 0U, // PMULHWrr 0U, // PMULLDrm 0U, // PMULLDrr 0U, // PMULLWrm 0U, // PMULLWrr 0U, // PMULUDQrm 0U, // PMULUDQrr 0U, // POP16r 0U, // POP16rmm 0U, // POP16rmr 0U, // POP32r 0U, // POP32rmm 0U, // POP32rmr 0U, // POP64r 0U, // POP64rmm 0U, // POP64rmr 0U, // POPA16 0U, // POPA32 0U, // POPCNT16rm 0U, // POPCNT16rr 0U, // POPCNT32rm 0U, // POPCNT32rr 0U, // POPCNT64rm 0U, // POPCNT64rr 0U, // POPDS16 0U, // POPDS32 0U, // POPES16 0U, // POPES32 0U, // POPF16 0U, // POPF32 0U, // POPF64 0U, // POPFS16 0U, // POPFS32 0U, // POPFS64 0U, // POPGS16 0U, // POPGS32 0U, // POPGS64 0U, // POPSS16 0U, // POPSS32 0U, // PORrm 0U, // PORrr 0U, // PREFETCH 0U, // PREFETCHNTA 0U, // PREFETCHT0 0U, // PREFETCHT1 0U, // PREFETCHT2 0U, // PREFETCHW 0U, // PSADBWrm 0U, // PSADBWrr 0U, // PSHUFBrm 0U, // PSHUFBrr 0U, // PSHUFDmi 4U, // PSHUFDri 0U, // PSHUFHWmi 4U, // PSHUFHWri 0U, // PSHUFLWmi 4U, // PSHUFLWri 0U, // PSIGNBrm 0U, // PSIGNBrr 0U, // PSIGNDrm 0U, // PSIGNDrr 0U, // PSIGNWrm 0U, // PSIGNWrr 0U, // PSLLDQri 0U, // PSLLDri 0U, // PSLLDrm 0U, // PSLLDrr 0U, // PSLLQri 0U, // PSLLQrm 0U, // PSLLQrr 0U, // PSLLWri 0U, // PSLLWrm 0U, // PSLLWrr 0U, // PSRADri 0U, // PSRADrm 0U, // PSRADrr 0U, // PSRAWri 0U, // PSRAWrm 0U, // PSRAWrr 0U, // PSRLDQri 0U, // PSRLDri 0U, // PSRLDrm 0U, // PSRLDrr 0U, // PSRLQri 0U, // PSRLQrm 0U, // PSRLQrr 0U, // PSRLWri 0U, // PSRLWrm 0U, // PSRLWrr 0U, // PSUBBrm 0U, // PSUBBrr 0U, // PSUBDrm 0U, // PSUBDrr 0U, // PSUBQrm 0U, // PSUBQrr 0U, // PSUBSBrm 0U, // PSUBSBrr 0U, // PSUBSWrm 0U, // PSUBSWrr 0U, // PSUBUSBrm 0U, // PSUBUSBrr 0U, // PSUBUSWrm 0U, // PSUBUSWrr 0U, // PSUBWrm 0U, // PSUBWrr 0U, // PSWAPDrm 0U, // PSWAPDrr 0U, // PTESTrm 0U, // PTESTrr 0U, // PUNPCKHBWrm 0U, // PUNPCKHBWrr 0U, // PUNPCKHDQrm 0U, // PUNPCKHDQrr 0U, // PUNPCKHQDQrm 0U, // PUNPCKHQDQrr 0U, // PUNPCKHWDrm 0U, // PUNPCKHWDrr 0U, // PUNPCKLBWrm 0U, // PUNPCKLBWrr 0U, // PUNPCKLDQrm 0U, // PUNPCKLDQrr 0U, // PUNPCKLQDQrm 0U, // PUNPCKLQDQrr 0U, // PUNPCKLWDrm 0U, // PUNPCKLWDrr 0U, // PUSH16i8 0U, // PUSH16r 0U, // PUSH16rmm 0U, // PUSH16rmr 0U, // PUSH32i8 0U, // PUSH32r 0U, // PUSH32rmm 0U, // PUSH32rmr 0U, // PUSH64i16 0U, // PUSH64i32 0U, // PUSH64i8 0U, // PUSH64r 0U, // PUSH64rmm 0U, // PUSH64rmr 0U, // PUSHA16 0U, // PUSHA32 0U, // PUSHCS16 0U, // PUSHCS32 0U, // PUSHDS16 0U, // PUSHDS32 0U, // PUSHES16 0U, // PUSHES32 0U, // PUSHF16 0U, // PUSHF32 0U, // PUSHF64 0U, // PUSHFS16 0U, // PUSHFS32 0U, // PUSHFS64 0U, // PUSHGS16 0U, // PUSHGS32 0U, // PUSHGS64 0U, // PUSHSS16 0U, // PUSHSS32 0U, // PUSHi16 0U, // PUSHi32 0U, // PXORrm 0U, // PXORrr 0U, // RCL16m1 0U, // RCL16mCL 0U, // RCL16mi 0U, // RCL16r1 0U, // RCL16rCL 0U, // RCL16ri 0U, // RCL32m1 0U, // RCL32mCL 0U, // RCL32mi 0U, // RCL32r1 0U, // RCL32rCL 0U, // RCL32ri 0U, // RCL64m1 0U, // RCL64mCL 0U, // RCL64mi 0U, // RCL64r1 0U, // RCL64rCL 0U, // RCL64ri 0U, // RCL8m1 0U, // RCL8mCL 0U, // RCL8mi 0U, // RCL8r1 0U, // RCL8rCL 0U, // RCL8ri 0U, // RCPPSm 0U, // RCPPSm_Int 0U, // RCPPSr 0U, // RCPPSr_Int 0U, // RCPSSm 0U, // RCPSSm_Int 0U, // RCPSSr 0U, // RCPSSr_Int 0U, // RCR16m1 0U, // RCR16mCL 0U, // RCR16mi 0U, // RCR16r1 0U, // RCR16rCL 0U, // RCR16ri 0U, // RCR32m1 0U, // RCR32mCL 0U, // RCR32mi 0U, // RCR32r1 0U, // RCR32rCL 0U, // RCR32ri 0U, // RCR64m1 0U, // RCR64mCL 0U, // RCR64mi 0U, // RCR64r1 0U, // RCR64rCL 0U, // RCR64ri 0U, // RCR8m1 0U, // RCR8mCL 0U, // RCR8mi 0U, // RCR8r1 0U, // RCR8rCL 0U, // RCR8ri 0U, // RDFSBASE 0U, // RDFSBASE64 0U, // RDGSBASE 0U, // RDGSBASE64 0U, // RDMSR 0U, // RDPMC 0U, // RDRAND16r 0U, // RDRAND32r 0U, // RDRAND64r 0U, // RDSEED16r 0U, // RDSEED32r 0U, // RDSEED64r 0U, // RDTSC 0U, // RDTSCP 0U, // RELEASE_ADD32mi 0U, // RELEASE_ADD64mi32 0U, // RELEASE_ADD8mi 0U, // RELEASE_AND32mi 0U, // RELEASE_AND64mi32 0U, // RELEASE_AND8mi 0U, // RELEASE_DEC16m 0U, // RELEASE_DEC32m 0U, // RELEASE_DEC64m 0U, // RELEASE_DEC8m 0U, // RELEASE_INC16m 0U, // RELEASE_INC32m 0U, // RELEASE_INC64m 0U, // RELEASE_INC8m 0U, // RELEASE_MOV16mi 0U, // RELEASE_MOV16mr 0U, // RELEASE_MOV32mi 0U, // RELEASE_MOV32mr 0U, // RELEASE_MOV64mi32 0U, // RELEASE_MOV64mr 0U, // RELEASE_MOV8mi 0U, // RELEASE_MOV8mr 0U, // RELEASE_OR32mi 0U, // RELEASE_OR64mi32 0U, // RELEASE_OR8mi 0U, // RELEASE_XOR32mi 0U, // RELEASE_XOR64mi32 0U, // RELEASE_XOR8mi 0U, // REPNE_PREFIX 0U, // REP_MOVSB_32 0U, // REP_MOVSB_64 0U, // REP_MOVSD_32 0U, // REP_MOVSD_64 0U, // REP_MOVSQ_64 0U, // REP_MOVSW_32 0U, // REP_MOVSW_64 0U, // REP_PREFIX 0U, // REP_STOSB_32 0U, // REP_STOSB_64 0U, // REP_STOSD_32 0U, // REP_STOSD_64 0U, // REP_STOSQ_64 0U, // REP_STOSW_32 0U, // REP_STOSW_64 0U, // RETIL 0U, // RETIQ 0U, // RETIW 0U, // RETL 0U, // RETQ 0U, // RETW 0U, // REX64_PREFIX 0U, // ROL16m1 0U, // ROL16mCL 0U, // ROL16mi 0U, // ROL16r1 0U, // ROL16rCL 0U, // ROL16ri 0U, // ROL32m1 0U, // ROL32mCL 0U, // ROL32mi 0U, // ROL32r1 0U, // ROL32rCL 0U, // ROL32ri 0U, // ROL64m1 0U, // ROL64mCL 0U, // ROL64mi 0U, // ROL64r1 0U, // ROL64rCL 0U, // ROL64ri 0U, // ROL8m1 0U, // ROL8mCL 0U, // ROL8mi 0U, // ROL8r1 0U, // ROL8rCL 0U, // ROL8ri 0U, // ROR16m1 0U, // ROR16mCL 0U, // ROR16mi 0U, // ROR16r1 0U, // ROR16rCL 0U, // ROR16ri 0U, // ROR32m1 0U, // ROR32mCL 0U, // ROR32mi 0U, // ROR32r1 0U, // ROR32rCL 0U, // ROR32ri 0U, // ROR64m1 0U, // ROR64mCL 0U, // ROR64mi 0U, // ROR64r1 0U, // ROR64rCL 0U, // ROR64ri 0U, // ROR8m1 0U, // ROR8mCL 0U, // ROR8mi 0U, // ROR8r1 0U, // ROR8rCL 0U, // ROR8ri 4U, // RORX32mi 4U, // RORX32ri 4U, // RORX64mi 4U, // RORX64ri 0U, // ROUNDPDm 4U, // ROUNDPDr 0U, // ROUNDPSm 4U, // ROUNDPSr 0U, // ROUNDSDm 0U, // ROUNDSDr 0U, // ROUNDSDr_Int 0U, // ROUNDSSm 0U, // ROUNDSSr 0U, // ROUNDSSr_Int 0U, // RSM 0U, // RSQRTPSm 0U, // RSQRTPSm_Int 0U, // RSQRTPSr 0U, // RSQRTPSr_Int 0U, // RSQRTSSm 0U, // RSQRTSSm_Int 0U, // RSQRTSSr 0U, // RSQRTSSr_Int 0U, // SAHF 0U, // SAL16m1 0U, // SAL16mCL 0U, // SAL16mi 0U, // SAL16r1 0U, // SAL16rCL 0U, // SAL16ri 0U, // SAL32m1 0U, // SAL32mCL 0U, // SAL32mi 0U, // SAL32r1 0U, // SAL32rCL 0U, // SAL32ri 0U, // SAL64m1 0U, // SAL64mCL 0U, // SAL64mi 0U, // SAL64r1 0U, // SAL64rCL 0U, // SAL64ri 0U, // SAL8m1 0U, // SAL8mCL 0U, // SAL8mi 0U, // SAL8r1 0U, // SAL8rCL 0U, // SAL8ri 0U, // SALC 0U, // SAR16m1 0U, // SAR16mCL 0U, // SAR16mi 0U, // SAR16r1 0U, // SAR16rCL 0U, // SAR16ri 0U, // SAR32m1 0U, // SAR32mCL 0U, // SAR32mi 0U, // SAR32r1 0U, // SAR32rCL 0U, // SAR32ri 0U, // SAR64m1 0U, // SAR64mCL 0U, // SAR64mi 0U, // SAR64r1 0U, // SAR64rCL 0U, // SAR64ri 0U, // SAR8m1 0U, // SAR8mCL 0U, // SAR8mi 0U, // SAR8r1 0U, // SAR8rCL 0U, // SAR8ri 4U, // SARX32rm 4U, // SARX32rr 4U, // SARX64rm 4U, // SARX64rr 0U, // SBB16i16 0U, // SBB16mi 0U, // SBB16mi8 0U, // SBB16mr 0U, // SBB16ri 0U, // SBB16ri8 0U, // SBB16rm 0U, // SBB16rr 0U, // SBB16rr_REV 0U, // SBB32i32 0U, // SBB32mi 0U, // SBB32mi8 0U, // SBB32mr 0U, // SBB32ri 0U, // SBB32ri8 0U, // SBB32rm 0U, // SBB32rr 0U, // SBB32rr_REV 0U, // SBB64i32 0U, // SBB64mi32 0U, // SBB64mi8 0U, // SBB64mr 0U, // SBB64ri32 0U, // SBB64ri8 0U, // SBB64rm 0U, // SBB64rr 0U, // SBB64rr_REV 0U, // SBB8i8 0U, // SBB8mi 0U, // SBB8mi8 0U, // SBB8mr 0U, // SBB8ri 0U, // SBB8ri8 0U, // SBB8rm 0U, // SBB8rr 0U, // SBB8rr_REV 0U, // SCASB 0U, // SCASL 0U, // SCASQ 0U, // SCASW 0U, // SEG_ALLOCA_32 0U, // SEG_ALLOCA_64 0U, // SEH_EndPrologue 0U, // SEH_Epilogue 0U, // SEH_PushFrame 0U, // SEH_PushReg 0U, // SEH_SaveReg 0U, // SEH_SaveXMM 0U, // SEH_SetFrame 0U, // SEH_StackAlloc 0U, // SETAEm 0U, // SETAEr 0U, // SETAm 0U, // SETAr 0U, // SETBEm 0U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 0U, // SETBm 0U, // SETBr 0U, // SETEm 0U, // SETEr 0U, // SETGEm 0U, // SETGEr 0U, // SETGm 0U, // SETGr 0U, // SETLEm 0U, // SETLEr 0U, // SETLm 0U, // SETLr 0U, // SETNEm 0U, // SETNEr 0U, // SETNOm 0U, // SETNOr 0U, // SETNPm 0U, // SETNPr 0U, // SETNSm 0U, // SETNSr 0U, // SETOm 0U, // SETOr 0U, // SETPm 0U, // SETPr 0U, // SETSm 0U, // SETSr 0U, // SFENCE 0U, // SGDT16m 0U, // SGDT32m 0U, // SGDT64m 0U, // SHA1MSG1rm 0U, // SHA1MSG1rr 0U, // SHA1MSG2rm 0U, // SHA1MSG2rr 0U, // SHA1NEXTErm 0U, // SHA1NEXTErr 0U, // SHA1RNDS4rmi 0U, // SHA1RNDS4rri 0U, // SHA256MSG1rm 0U, // SHA256MSG1rr 0U, // SHA256MSG2rm 0U, // SHA256MSG2rr 0U, // SHA256RNDS2rm 0U, // SHA256RNDS2rr 0U, // SHL16m1 0U, // SHL16mCL 0U, // SHL16mi 0U, // SHL16r1 0U, // SHL16rCL 0U, // SHL16ri 0U, // SHL32m1 0U, // SHL32mCL 0U, // SHL32mi 0U, // SHL32r1 0U, // SHL32rCL 0U, // SHL32ri 0U, // SHL64m1 0U, // SHL64mCL 0U, // SHL64mi 0U, // SHL64r1 0U, // SHL64rCL 0U, // SHL64ri 0U, // SHL8m1 0U, // SHL8mCL 0U, // SHL8mi 0U, // SHL8r1 0U, // SHL8rCL 0U, // SHL8ri 0U, // SHLD16mrCL 1U, // SHLD16mri8 0U, // SHLD16rrCL 0U, // SHLD16rri8 0U, // SHLD32mrCL 1U, // SHLD32mri8 0U, // SHLD32rrCL 0U, // SHLD32rri8 0U, // SHLD64mrCL 1U, // SHLD64mri8 0U, // SHLD64rrCL 0U, // SHLD64rri8 4U, // SHLX32rm 4U, // SHLX32rr 4U, // SHLX64rm 4U, // SHLX64rr 0U, // SHR16m1 0U, // SHR16mCL 0U, // SHR16mi 0U, // SHR16r1 0U, // SHR16rCL 0U, // SHR16ri 0U, // SHR32m1 0U, // SHR32mCL 0U, // SHR32mi 0U, // SHR32r1 0U, // SHR32rCL 0U, // SHR32ri 0U, // SHR64m1 0U, // SHR64mCL 0U, // SHR64mi 0U, // SHR64r1 0U, // SHR64rCL 0U, // SHR64ri 0U, // SHR8m1 0U, // SHR8mCL 0U, // SHR8mi 0U, // SHR8r1 0U, // SHR8rCL 0U, // SHR8ri 0U, // SHRD16mrCL 1U, // SHRD16mri8 0U, // SHRD16rrCL 0U, // SHRD16rri8 0U, // SHRD32mrCL 1U, // SHRD32mri8 0U, // SHRD32rrCL 0U, // SHRD32rri8 0U, // SHRD64mrCL 1U, // SHRD64mri8 0U, // SHRD64rrCL 0U, // SHRD64rri8 4U, // SHRX32rm 4U, // SHRX32rr 4U, // SHRX64rm 4U, // SHRX64rr 0U, // SHUFPDrmi 0U, // SHUFPDrri 0U, // SHUFPSrmi 0U, // SHUFPSrri 0U, // SIDT16m 0U, // SIDT32m 0U, // SIDT64m 0U, // SIN_F 0U, // SIN_Fp32 0U, // SIN_Fp64 0U, // SIN_Fp80 0U, // SKINIT 0U, // SLDT16m 0U, // SLDT16r 0U, // SLDT32r 0U, // SLDT64m 0U, // SLDT64r 0U, // SMSW16m 0U, // SMSW16r 0U, // SMSW32r 0U, // SMSW64r 0U, // SQRTPDm 0U, // SQRTPDr 0U, // SQRTPSm 0U, // SQRTPSr 0U, // SQRTSDm 0U, // SQRTSDm_Int 0U, // SQRTSDr 0U, // SQRTSDr_Int 0U, // SQRTSSm 0U, // SQRTSSm_Int 0U, // SQRTSSr 0U, // SQRTSSr_Int 0U, // SQRT_F 0U, // SQRT_Fp32 0U, // SQRT_Fp64 0U, // SQRT_Fp80 0U, // STAC 0U, // STC 0U, // STD 0U, // STGI 0U, // STI 0U, // STMXCSR 0U, // STOSB 0U, // STOSL 0U, // STOSQ 0U, // STOSW 0U, // STR16r 0U, // STR32r 0U, // STR64r 0U, // STRm 0U, // ST_F32m 0U, // ST_F64m 0U, // ST_FCOMPST0r 0U, // ST_FCOMPST0r_alt 0U, // ST_FCOMST0r 0U, // ST_FP32m 0U, // ST_FP64m 0U, // ST_FP80m 0U, // ST_FPNCEST0r 0U, // ST_FPST0r 0U, // ST_FPST0r_alt 0U, // ST_FPrr 0U, // ST_FXCHST0r 0U, // ST_FXCHST0r_alt 0U, // ST_Fp32m 0U, // ST_Fp64m 0U, // ST_Fp64m32 0U, // ST_Fp80m32 0U, // ST_Fp80m64 0U, // ST_FpP32m 0U, // ST_FpP64m 0U, // ST_FpP64m32 0U, // ST_FpP80m 0U, // ST_FpP80m32 0U, // ST_FpP80m64 0U, // ST_Frr 0U, // SUB16i16 0U, // SUB16mi 0U, // SUB16mi8 0U, // SUB16mr 0U, // SUB16ri 0U, // SUB16ri8 0U, // SUB16rm 0U, // SUB16rr 0U, // SUB16rr_REV 0U, // SUB32i32 0U, // SUB32mi 0U, // SUB32mi8 0U, // SUB32mr 0U, // SUB32ri 0U, // SUB32ri8 0U, // SUB32rm 0U, // SUB32rr 0U, // SUB32rr_REV 0U, // SUB64i32 0U, // SUB64mi32 0U, // SUB64mi8 0U, // SUB64mr 0U, // SUB64ri32 0U, // SUB64ri8 0U, // SUB64rm 0U, // SUB64rr 0U, // SUB64rr_REV 0U, // SUB8i8 0U, // SUB8mi 0U, // SUB8mi8 0U, // SUB8mr 0U, // SUB8ri 0U, // SUB8ri8 0U, // SUB8rm 0U, // SUB8rr 0U, // SUB8rr_REV 0U, // SUBPDrm 0U, // SUBPDrr 0U, // SUBPSrm 0U, // SUBPSrr 0U, // SUBR_F32m 0U, // SUBR_F64m 0U, // SUBR_FI16m 0U, // SUBR_FI32m 0U, // SUBR_FPrST0 0U, // SUBR_FST0r 0U, // SUBR_Fp32m 0U, // SUBR_Fp64m 0U, // SUBR_Fp64m32 0U, // SUBR_Fp80m32 0U, // SUBR_Fp80m64 0U, // SUBR_FpI16m32 0U, // SUBR_FpI16m64 0U, // SUBR_FpI16m80 0U, // SUBR_FpI32m32 0U, // SUBR_FpI32m64 0U, // SUBR_FpI32m80 0U, // SUBR_FrST0 0U, // SUBSDrm 0U, // SUBSDrm_Int 0U, // SUBSDrr 0U, // SUBSDrr_Int 0U, // SUBSSrm 0U, // SUBSSrm_Int 0U, // SUBSSrr 0U, // SUBSSrr_Int 0U, // SUB_F32m 0U, // SUB_F64m 0U, // SUB_FI16m 0U, // SUB_FI32m 0U, // SUB_FPrST0 0U, // SUB_FST0r 0U, // SUB_Fp32 0U, // SUB_Fp32m 0U, // SUB_Fp64 0U, // SUB_Fp64m 0U, // SUB_Fp64m32 0U, // SUB_Fp80 0U, // SUB_Fp80m32 0U, // SUB_Fp80m64 0U, // SUB_FpI16m32 0U, // SUB_FpI16m64 0U, // SUB_FpI16m80 0U, // SUB_FpI32m32 0U, // SUB_FpI32m64 0U, // SUB_FpI32m80 0U, // SUB_FrST0 0U, // SWAPGS 0U, // SYSCALL 0U, // SYSENTER 0U, // SYSEXIT 0U, // SYSEXIT64 0U, // SYSRET 0U, // SYSRET64 0U, // T1MSKC32rm 0U, // T1MSKC32rr 0U, // T1MSKC64rm 0U, // T1MSKC64rr 0U, // TAILJMPd 0U, // TAILJMPd64 0U, // TAILJMPd64_REX 0U, // TAILJMPm 0U, // TAILJMPm64 0U, // TAILJMPm64_REX 0U, // TAILJMPr 0U, // TAILJMPr64 0U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 0U, // TEST16i16 0U, // TEST16mi 0U, // TEST16mi_alt 0U, // TEST16ri 0U, // TEST16ri_alt 1U, // TEST16rm 0U, // TEST16rr 0U, // TEST32i32 0U, // TEST32mi 0U, // TEST32mi_alt 0U, // TEST32ri 0U, // TEST32ri_alt 1U, // TEST32rm 0U, // TEST32rr 0U, // TEST64i32 0U, // TEST64mi32 0U, // TEST64mi32_alt 0U, // TEST64ri32 0U, // TEST64ri32_alt 1U, // TEST64rm 0U, // TEST64rr 0U, // TEST8i8 0U, // TEST8mi 0U, // TEST8mi_alt 0U, // TEST8ri 0U, // TEST8ri_NOREX 0U, // TEST8ri_alt 1U, // TEST8rm 0U, // TEST8rr 0U, // TLSCall_32 0U, // TLSCall_64 0U, // TLS_addr32 0U, // TLS_addr64 0U, // TLS_base_addr32 0U, // TLS_base_addr64 0U, // TRAP 0U, // TST_F 0U, // TST_Fp32 0U, // TST_Fp64 0U, // TST_Fp80 0U, // TZCNT16rm 0U, // TZCNT16rr 0U, // TZCNT32rm 0U, // TZCNT32rr 0U, // TZCNT64rm 0U, // TZCNT64rr 0U, // TZMSK32rm 0U, // TZMSK32rr 0U, // TZMSK64rm 0U, // TZMSK64rr 0U, // UCOMISDrm 0U, // UCOMISDrr 0U, // UCOMISSrm 0U, // UCOMISSrr 0U, // UCOM_FIPr 0U, // UCOM_FIr 0U, // UCOM_FPPr 0U, // UCOM_FPr 0U, // UCOM_FpIr32 0U, // UCOM_FpIr64 0U, // UCOM_FpIr80 0U, // UCOM_Fpr32 0U, // UCOM_Fpr64 0U, // UCOM_Fpr80 0U, // UCOM_Fr 0U, // UD2B 0U, // UNPCKHPDrm 0U, // UNPCKHPDrr 0U, // UNPCKHPSrm 0U, // UNPCKHPSrr 0U, // UNPCKLPDrm 0U, // UNPCKLPDrr 0U, // UNPCKLPSrm 0U, // UNPCKLPSrr 265U, // VAARG_64 4U, // VADDPDYrm 4U, // VADDPDYrr 324U, // VADDPDZ128rm 4168U, // VADDPDZ128rmb 6533U, // VADDPDZ128rmbk 41032U, // VADDPDZ128rmbkz 0U, // VADDPDZ128rmk 10448U, // VADDPDZ128rmkz 324U, // VADDPDZ128rr 469U, // VADDPDZ128rrk 10448U, // VADDPDZ128rrkz 324U, // VADDPDZ256rm 4168U, // VADDPDZ256rmb 6533U, // VADDPDZ256rmbk 41032U, // VADDPDZ256rmbkz 0U, // VADDPDZ256rmk 10448U, // VADDPDZ256rmkz 324U, // VADDPDZ256rr 469U, // VADDPDZ256rrk 10448U, // VADDPDZ256rrkz 0U, // VADDPDZrb 0U, // VADDPDZrbk 24U, // VADDPDZrbkz 324U, // VADDPDZrm 4168U, // VADDPDZrmb 6533U, // VADDPDZrmbk 41032U, // VADDPDZrmbkz 0U, // VADDPDZrmk 10448U, // VADDPDZrmkz 324U, // VADDPDZrr 469U, // VADDPDZrrk 10448U, // VADDPDZrrkz 4U, // VADDPDrm 4U, // VADDPDrr 4U, // VADDPSYrm 4U, // VADDPSYrr 324U, // VADDPSZ128rm 4168U, // VADDPSZ128rmb 6533U, // VADDPSZ128rmbk 41032U, // VADDPSZ128rmbkz 0U, // VADDPSZ128rmk 10448U, // VADDPSZ128rmkz 324U, // VADDPSZ128rr 469U, // VADDPSZ128rrk 10448U, // VADDPSZ128rrkz 324U, // VADDPSZ256rm 4168U, // VADDPSZ256rmb 6533U, // VADDPSZ256rmbk 41032U, // VADDPSZ256rmbkz 0U, // VADDPSZ256rmk 10448U, // VADDPSZ256rmkz 324U, // VADDPSZ256rr 469U, // VADDPSZ256rrk 10448U, // VADDPSZ256rrkz 0U, // VADDPSZrb 0U, // VADDPSZrbk 24U, // VADDPSZrbkz 324U, // VADDPSZrm 4168U, // VADDPSZrmb 6533U, // VADDPSZrmbk 41032U, // VADDPSZrmbkz 0U, // VADDPSZrmk 10448U, // VADDPSZrmkz 324U, // VADDPSZrr 469U, // VADDPSZrrk 10448U, // VADDPSZrrkz 4U, // VADDPSrm 4U, // VADDPSrr 72U, // VADDSDZrm 324U, // VADDSDZrm_Int 0U, // VADDSDZrm_Intk 10448U, // VADDSDZrm_Intkz 4U, // VADDSDZrr 324U, // VADDSDZrr_Int 469U, // VADDSDZrr_Intk 10448U, // VADDSDZrr_Intkz 0U, // VADDSDZrrb 0U, // VADDSDZrrbk 24U, // VADDSDZrrbkz 72U, // VADDSDrm 72U, // VADDSDrm_Int 4U, // VADDSDrr 4U, // VADDSDrr_Int 72U, // VADDSSZrm 324U, // VADDSSZrm_Int 0U, // VADDSSZrm_Intk 10448U, // VADDSSZrm_Intkz 4U, // VADDSSZrr 324U, // VADDSSZrr_Int 469U, // VADDSSZrr_Intk 10448U, // VADDSSZrr_Intkz 0U, // VADDSSZrrb 0U, // VADDSSZrrbk 24U, // VADDSSZrrbkz 72U, // VADDSSrm 72U, // VADDSSrm_Int 4U, // VADDSSrr 4U, // VADDSSrr_Int 4U, // VADDSUBPDYrm 4U, // VADDSUBPDYrr 4U, // VADDSUBPDrm 4U, // VADDSUBPDrr 4U, // VADDSUBPSYrm 4U, // VADDSUBPSYrr 4U, // VADDSUBPSrm 4U, // VADDSUBPSrr 4U, // VAESDECLASTrm 4U, // VAESDECLASTrr 4U, // VAESDECrm 4U, // VAESDECrr 4U, // VAESENCLASTrm 4U, // VAESENCLASTrr 4U, // VAESENCrm 4U, // VAESENCrr 0U, // VAESIMCrm 0U, // VAESIMCrr 0U, // VAESKEYGENASSIST128rm 4U, // VAESKEYGENASSIST128rr 72U, // VALIGNDrmi 4168U, // VALIGNDrri 0U, // VALIGNDrrik 41032U, // VALIGNDrrikz 72U, // VALIGNQrmi 4168U, // VALIGNQrri 0U, // VALIGNQrrik 41032U, // VALIGNQrrikz 4U, // VANDNPDYrm 4U, // VANDNPDYrr 4U, // VANDNPDrm 4U, // VANDNPDrr 4U, // VANDNPSYrm 4U, // VANDNPSYrr 4U, // VANDNPSrm 4U, // VANDNPSrr 4U, // VANDPDYrm 4U, // VANDPDYrr 4U, // VANDPDrm 4U, // VANDPDrr 4U, // VANDPSYrm 4U, // VANDPSYrr 4U, // VANDPSrm 4U, // VANDPSrr 520U, // VASTART_SAVE_XMM_REGS 324U, // VBLENDMPDZ128rm 72U, // VBLENDMPDZ128rmb 73800U, // VBLENDMPDZ128rmbk 6352U, // VBLENDMPDZ128rmk 10448U, // VBLENDMPDZ128rmkz 324U, // VBLENDMPDZ128rr 6352U, // VBLENDMPDZ128rrk 10448U, // VBLENDMPDZ128rrkz 324U, // VBLENDMPDZ256rm 72U, // VBLENDMPDZ256rmb 73800U, // VBLENDMPDZ256rmbk 6352U, // VBLENDMPDZ256rmk 10448U, // VBLENDMPDZ256rmkz 324U, // VBLENDMPDZ256rr 6352U, // VBLENDMPDZ256rrk 10448U, // VBLENDMPDZ256rrkz 324U, // VBLENDMPDZrm 72U, // VBLENDMPDZrmb 73800U, // VBLENDMPDZrmbk 6352U, // VBLENDMPDZrmk 10448U, // VBLENDMPDZrmkz 324U, // VBLENDMPDZrr 6352U, // VBLENDMPDZrrk 10448U, // VBLENDMPDZrrkz 324U, // VBLENDMPSZ128rm 72U, // VBLENDMPSZ128rmb 73800U, // VBLENDMPSZ128rmbk 6352U, // VBLENDMPSZ128rmk 10448U, // VBLENDMPSZ128rmkz 324U, // VBLENDMPSZ128rr 6352U, // VBLENDMPSZ128rrk 10448U, // VBLENDMPSZ128rrkz 324U, // VBLENDMPSZ256rm 72U, // VBLENDMPSZ256rmb 73800U, // VBLENDMPSZ256rmbk 6352U, // VBLENDMPSZ256rmk 10448U, // VBLENDMPSZ256rmkz 324U, // VBLENDMPSZ256rr 6352U, // VBLENDMPSZ256rrk 10448U, // VBLENDMPSZ256rrkz 324U, // VBLENDMPSZrm 72U, // VBLENDMPSZrmb 73800U, // VBLENDMPSZrmbk 6352U, // VBLENDMPSZrmk 10448U, // VBLENDMPSZrmkz 324U, // VBLENDMPSZrr 6352U, // VBLENDMPSZrrk 10448U, // VBLENDMPSZrrkz 0U, // VBLENDPDYrmi 72U, // VBLENDPDYrri 72U, // VBLENDPDrmi 72U, // VBLENDPDrri 0U, // VBLENDPSYrmi 72U, // VBLENDPSYrri 72U, // VBLENDPSrmi 72U, // VBLENDPSrri 0U, // VBLENDVPDYrm 72U, // VBLENDVPDYrr 72U, // VBLENDVPDrm 72U, // VBLENDVPDrr 0U, // VBLENDVPSYrm 72U, // VBLENDVPSYrr 72U, // VBLENDVPSrm 72U, // VBLENDVPSrr 0U, // VBROADCASTF128 589U, // VBROADCASTI32X4krm 0U, // VBROADCASTI32X4rm 589U, // VBROADCASTI64X4krm 0U, // VBROADCASTI64X4rm 0U, // VBROADCASTSDYrm 0U, // VBROADCASTSDYrr 28U, // VBROADCASTSDZ256m 6672U, // VBROADCASTSDZ256mk 10448U, // VBROADCASTSDZ256mkz 28U, // VBROADCASTSDZ256r 469U, // VBROADCASTSDZ256rk 589U, // VBROADCASTSDZ256rkz 28U, // VBROADCASTSDZm 6672U, // VBROADCASTSDZmk 10448U, // VBROADCASTSDZmkz 28U, // VBROADCASTSDZr 469U, // VBROADCASTSDZrk 589U, // VBROADCASTSDZrkz 0U, // VBROADCASTSSYrm 0U, // VBROADCASTSSYrr 28U, // VBROADCASTSSZ128m 6672U, // VBROADCASTSSZ128mk 10448U, // VBROADCASTSSZ128mkz 28U, // VBROADCASTSSZ128r 469U, // VBROADCASTSSZ128rk 589U, // VBROADCASTSSZ128rkz 28U, // VBROADCASTSSZ256m 6672U, // VBROADCASTSSZ256mk 10448U, // VBROADCASTSSZ256mkz 28U, // VBROADCASTSSZ256r 469U, // VBROADCASTSSZ256rk 589U, // VBROADCASTSSZ256rkz 28U, // VBROADCASTSSZm 6672U, // VBROADCASTSSZmk 10448U, // VBROADCASTSSZmkz 28U, // VBROADCASTSSZr 469U, // VBROADCASTSSZrk 589U, // VBROADCASTSSZrkz 0U, // VBROADCASTSSrm 0U, // VBROADCASTSSrr 1U, // VCMPPDYrmi 0U, // VCMPPDYrmi_alt 2248U, // VCMPPDYrri 72U, // VCMPPDYrri_alt 1U, // VCMPPDZrmi 0U, // VCMPPDZrmi_alt 2248U, // VCMPPDZrri 72U, // VCMPPDZrri_alt 0U, // VCMPPDZrrib 72U, // VCMPPDZrrib_alt 140U, // VCMPPDrmi 72U, // VCMPPDrmi_alt 2248U, // VCMPPDrri 72U, // VCMPPDrri_alt 1U, // VCMPPSYrmi 0U, // VCMPPSYrmi_alt 2248U, // VCMPPSYrri 72U, // VCMPPSYrri_alt 1U, // VCMPPSZrmi 0U, // VCMPPSZrmi_alt 2248U, // VCMPPSZrri 72U, // VCMPPSZrri_alt 0U, // VCMPPSZrrib 72U, // VCMPPSZrrib_alt 140U, // VCMPPSrmi 72U, // VCMPPSrmi_alt 2248U, // VCMPPSrri 72U, // VCMPPSrri_alt 140U, // VCMPSDZrm 72U, // VCMPSDZrmi_alt 2248U, // VCMPSDZrr 72U, // VCMPSDZrri_alt 140U, // VCMPSDrm 72U, // VCMPSDrm_alt 2248U, // VCMPSDrr 72U, // VCMPSDrr_alt 140U, // VCMPSSZrm 72U, // VCMPSSZrmi_alt 2248U, // VCMPSSZrr 72U, // VCMPSSZrri_alt 140U, // VCMPSSrm 72U, // VCMPSSrm_alt 2248U, // VCMPSSrr 72U, // VCMPSSrr_alt 0U, // VCOMISDZrm 0U, // VCOMISDZrr 0U, // VCOMISDrm 0U, // VCOMISDrr 0U, // VCOMISSZrm 0U, // VCOMISSZrr 0U, // VCOMISSrm 0U, // VCOMISSrr 673U, // VCOMPRESSPDZ128mrk 661U, // VCOMPRESSPDZ128rrk 589U, // VCOMPRESSPDZ128rrkz 673U, // VCOMPRESSPDZ256mrk 661U, // VCOMPRESSPDZ256rrk 589U, // VCOMPRESSPDZ256rrkz 673U, // VCOMPRESSPDZmrk 661U, // VCOMPRESSPDZrrk 589U, // VCOMPRESSPDZrrkz 673U, // VCOMPRESSPSZ128mrk 661U, // VCOMPRESSPSZ128rrk 589U, // VCOMPRESSPSZ128rrkz 673U, // VCOMPRESSPSZ256mrk 661U, // VCOMPRESSPSZ256rrk 589U, // VCOMPRESSPSZ256rrkz 673U, // VCOMPRESSPSZmrk 661U, // VCOMPRESSPSZrrk 589U, // VCOMPRESSPSZrrkz 0U, // VCVTDQ2PDYrm 0U, // VCVTDQ2PDYrr 0U, // VCVTDQ2PDZrm 0U, // VCVTDQ2PDZrr 0U, // VCVTDQ2PDrm 0U, // VCVTDQ2PDrr 0U, // VCVTDQ2PSYrm 0U, // VCVTDQ2PSYrr 0U, // VCVTDQ2PSZrm 0U, // VCVTDQ2PSZrr 0U, // VCVTDQ2PSZrrb 0U, // VCVTDQ2PSrm 0U, // VCVTDQ2PSrr 0U, // VCVTPD2DQXrm 0U, // VCVTPD2DQYrm 0U, // VCVTPD2DQYrr 0U, // VCVTPD2DQZrm 0U, // VCVTPD2DQZrr 0U, // VCVTPD2DQZrrb 0U, // VCVTPD2DQrr 0U, // VCVTPD2PSXrm 0U, // VCVTPD2PSYrm 0U, // VCVTPD2PSYrr 0U, // VCVTPD2PSZrm 0U, // VCVTPD2PSZrr 0U, // VCVTPD2PSZrrb 0U, // VCVTPD2PSrr 0U, // VCVTPD2UDQZrm 0U, // VCVTPD2UDQZrr 0U, // VCVTPD2UDQZrrb 0U, // VCVTPH2PSYrm 0U, // VCVTPH2PSYrr 0U, // VCVTPH2PSZrm 0U, // VCVTPH2PSZrr 0U, // VCVTPH2PSrm 0U, // VCVTPH2PSrr 0U, // VCVTPS2DQYrm 0U, // VCVTPS2DQYrr 0U, // VCVTPS2DQZrm 0U, // VCVTPS2DQZrr 0U, // VCVTPS2DQZrrb 0U, // VCVTPS2DQrm 0U, // VCVTPS2DQrr 0U, // VCVTPS2PDYrm 0U, // VCVTPS2PDYrr 0U, // VCVTPS2PDZrm 0U, // VCVTPS2PDZrr 0U, // VCVTPS2PDrm 0U, // VCVTPS2PDrr 1U, // VCVTPS2PHYmr 4U, // VCVTPS2PHYrr 1U, // VCVTPS2PHZmr 4U, // VCVTPS2PHZrr 1U, // VCVTPS2PHmr 4U, // VCVTPS2PHrr 0U, // VCVTPS2UDQZrm 0U, // VCVTPS2UDQZrr 0U, // VCVTPS2UDQZrrb 0U, // VCVTSD2SI64Zrm 0U, // VCVTSD2SI64Zrr 0U, // VCVTSD2SI64rm 0U, // VCVTSD2SI64rr 0U, // VCVTSD2SIZrm 0U, // VCVTSD2SIZrr 0U, // VCVTSD2SIrm 0U, // VCVTSD2SIrr 72U, // VCVTSD2SSZrm 4U, // VCVTSD2SSZrr 72U, // VCVTSD2SSrm 4U, // VCVTSD2SSrr 0U, // VCVTSD2USI64Zrm 0U, // VCVTSD2USI64Zrr 0U, // VCVTSD2USIZrm 0U, // VCVTSD2USIZrr 72U, // VCVTSI2SD64rm 4U, // VCVTSI2SD64rr 72U, // VCVTSI2SDZrm 4U, // VCVTSI2SDZrr 72U, // VCVTSI2SDrm 4U, // VCVTSI2SDrr 72U, // VCVTSI2SS64rm 4U, // VCVTSI2SS64rr 72U, // VCVTSI2SSZrm 4U, // VCVTSI2SSZrr 72U, // VCVTSI2SSrm 4U, // VCVTSI2SSrr 72U, // VCVTSI642SDZrm 4U, // VCVTSI642SDZrr 72U, // VCVTSI642SSZrm 4U, // VCVTSI642SSZrr 72U, // VCVTSS2SDZrm 4U, // VCVTSS2SDZrr 72U, // VCVTSS2SDrm 4U, // VCVTSS2SDrr 0U, // VCVTSS2SI64Zrm 0U, // VCVTSS2SI64Zrr 0U, // VCVTSS2SI64rm 0U, // VCVTSS2SI64rr 0U, // VCVTSS2SIZrm 0U, // VCVTSS2SIZrr 0U, // VCVTSS2SIrm 0U, // VCVTSS2SIrr 0U, // VCVTSS2USI64Zrm 0U, // VCVTSS2USI64Zrr 0U, // VCVTSS2USIZrm 0U, // VCVTSS2USIZrr 0U, // VCVTTPD2DQXrm 0U, // VCVTTPD2DQYrm 0U, // VCVTTPD2DQYrr 0U, // VCVTTPD2DQZrm 0U, // VCVTTPD2DQZrr 0U, // VCVTTPD2DQrr 0U, // VCVTTPD2UDQZrm 0U, // VCVTTPD2UDQZrr 0U, // VCVTTPS2DQYrm 0U, // VCVTTPS2DQYrr 0U, // VCVTTPS2DQZrm 0U, // VCVTTPS2DQZrr 0U, // VCVTTPS2DQrm 0U, // VCVTTPS2DQrr 0U, // VCVTTPS2UDQZrm 0U, // VCVTTPS2UDQZrr 0U, // VCVTTSD2SI64Zrm 0U, // VCVTTSD2SI64Zrr 0U, // VCVTTSD2SI64rm 0U, // VCVTTSD2SI64rr 0U, // VCVTTSD2SIZrm 0U, // VCVTTSD2SIZrr 0U, // VCVTTSD2SIrm 0U, // VCVTTSD2SIrr 0U, // VCVTTSD2USI64Zrm 0U, // VCVTTSD2USI64Zrr 0U, // VCVTTSD2USIZrm 0U, // VCVTTSD2USIZrr 0U, // VCVTTSS2SI64Zrm 0U, // VCVTTSS2SI64Zrr 0U, // VCVTTSS2SI64rm 0U, // VCVTTSS2SI64rr 0U, // VCVTTSS2SIZrm 0U, // VCVTTSS2SIZrr 0U, // VCVTTSS2SIrm 0U, // VCVTTSS2SIrr 0U, // VCVTTSS2USI64Zrm 0U, // VCVTTSS2USI64Zrr 0U, // VCVTTSS2USIZrm 0U, // VCVTTSS2USIZrr 0U, // VCVTUDQ2PDZrm 0U, // VCVTUDQ2PDZrr 0U, // VCVTUDQ2PSZrm 0U, // VCVTUDQ2PSZrr 0U, // VCVTUDQ2PSZrrb 72U, // VCVTUSI2SDZrm 4U, // VCVTUSI2SDZrr 72U, // VCVTUSI2SSZrm 4U, // VCVTUSI2SSZrr 72U, // VCVTUSI642SDZrm 4U, // VCVTUSI642SDZrr 72U, // VCVTUSI642SSZrm 4U, // VCVTUSI642SSZrr 4U, // VDIVPDYrm 4U, // VDIVPDYrr 324U, // VDIVPDZ128rm 4168U, // VDIVPDZ128rmb 6533U, // VDIVPDZ128rmbk 41032U, // VDIVPDZ128rmbkz 0U, // VDIVPDZ128rmk 10448U, // VDIVPDZ128rmkz 324U, // VDIVPDZ128rr 469U, // VDIVPDZ128rrk 10448U, // VDIVPDZ128rrkz 324U, // VDIVPDZ256rm 4168U, // VDIVPDZ256rmb 6533U, // VDIVPDZ256rmbk 41032U, // VDIVPDZ256rmbkz 0U, // VDIVPDZ256rmk 10448U, // VDIVPDZ256rmkz 324U, // VDIVPDZ256rr 469U, // VDIVPDZ256rrk 10448U, // VDIVPDZ256rrkz 0U, // VDIVPDZrb 0U, // VDIVPDZrbk 24U, // VDIVPDZrbkz 324U, // VDIVPDZrm 4168U, // VDIVPDZrmb 6533U, // VDIVPDZrmbk 41032U, // VDIVPDZrmbkz 0U, // VDIVPDZrmk 10448U, // VDIVPDZrmkz 324U, // VDIVPDZrr 469U, // VDIVPDZrrk 10448U, // VDIVPDZrrkz 4U, // VDIVPDrm 4U, // VDIVPDrr 4U, // VDIVPSYrm 4U, // VDIVPSYrr 324U, // VDIVPSZ128rm 4168U, // VDIVPSZ128rmb 6533U, // VDIVPSZ128rmbk 41032U, // VDIVPSZ128rmbkz 0U, // VDIVPSZ128rmk 10448U, // VDIVPSZ128rmkz 324U, // VDIVPSZ128rr 469U, // VDIVPSZ128rrk 10448U, // VDIVPSZ128rrkz 324U, // VDIVPSZ256rm 4168U, // VDIVPSZ256rmb 6533U, // VDIVPSZ256rmbk 41032U, // VDIVPSZ256rmbkz 0U, // VDIVPSZ256rmk 10448U, // VDIVPSZ256rmkz 324U, // VDIVPSZ256rr 469U, // VDIVPSZ256rrk 10448U, // VDIVPSZ256rrkz 0U, // VDIVPSZrb 0U, // VDIVPSZrbk 24U, // VDIVPSZrbkz 324U, // VDIVPSZrm 4168U, // VDIVPSZrmb 6533U, // VDIVPSZrmbk 41032U, // VDIVPSZrmbkz 0U, // VDIVPSZrmk 10448U, // VDIVPSZrmkz 324U, // VDIVPSZrr 469U, // VDIVPSZrrk 10448U, // VDIVPSZrrkz 4U, // VDIVPSrm 4U, // VDIVPSrr 72U, // VDIVSDZrm 324U, // VDIVSDZrm_Int 0U, // VDIVSDZrm_Intk 10448U, // VDIVSDZrm_Intkz 4U, // VDIVSDZrr 324U, // VDIVSDZrr_Int 469U, // VDIVSDZrr_Intk 10448U, // VDIVSDZrr_Intkz 0U, // VDIVSDZrrb 0U, // VDIVSDZrrbk 24U, // VDIVSDZrrbkz 72U, // VDIVSDrm 72U, // VDIVSDrm_Int 4U, // VDIVSDrr 4U, // VDIVSDrr_Int 72U, // VDIVSSZrm 324U, // VDIVSSZrm_Int 0U, // VDIVSSZrm_Intk 10448U, // VDIVSSZrm_Intkz 4U, // VDIVSSZrr 324U, // VDIVSSZrr_Int 469U, // VDIVSSZrr_Intk 10448U, // VDIVSSZrr_Intkz 0U, // VDIVSSZrrb 0U, // VDIVSSZrrbk 24U, // VDIVSSZrrbkz 72U, // VDIVSSrm 72U, // VDIVSSrm_Int 4U, // VDIVSSrr 4U, // VDIVSSrr_Int 72U, // VDPPDrmi 72U, // VDPPDrri 0U, // VDPPSYrmi 72U, // VDPPSYrri 72U, // VDPPSrmi 72U, // VDPPSrri 0U, // VERRm 0U, // VERRr 0U, // VERWm 0U, // VERWr 0U, // VEXP2PDm 0U, // VEXP2PDmb 469U, // VEXP2PDmbk 589U, // VEXP2PDmbkz 469U, // VEXP2PDmk 589U, // VEXP2PDmkz 28U, // VEXP2PDr 36U, // VEXP2PDrb 725U, // VEXP2PDrbk 781U, // VEXP2PDrbkz 469U, // VEXP2PDrk 589U, // VEXP2PDrkz 0U, // VEXP2PSm 0U, // VEXP2PSmb 469U, // VEXP2PSmbk 589U, // VEXP2PSmbkz 469U, // VEXP2PSmk 589U, // VEXP2PSmkz 28U, // VEXP2PSr 36U, // VEXP2PSrb 725U, // VEXP2PSrbk 781U, // VEXP2PSrbkz 469U, // VEXP2PSrk 589U, // VEXP2PSrkz 661U, // VEXPANDPDZ128rmk 589U, // VEXPANDPDZ128rmkz 661U, // VEXPANDPDZ128rrk 589U, // VEXPANDPDZ128rrkz 661U, // VEXPANDPDZ256rmk 589U, // VEXPANDPDZ256rmkz 661U, // VEXPANDPDZ256rrk 589U, // VEXPANDPDZ256rrkz 661U, // VEXPANDPDZrmk 589U, // VEXPANDPDZrmkz 661U, // VEXPANDPDZrrk 589U, // VEXPANDPDZrrkz 661U, // VEXPANDPSZ128rmk 589U, // VEXPANDPSZ128rmkz 661U, // VEXPANDPSZ128rrk 589U, // VEXPANDPSZ128rrkz 661U, // VEXPANDPSZ256rmk 589U, // VEXPANDPSZ256rmkz 661U, // VEXPANDPSZ256rrk 589U, // VEXPANDPSZ256rrkz 661U, // VEXPANDPSZrmk 589U, // VEXPANDPSZrmkz 661U, // VEXPANDPSZrrk 589U, // VEXPANDPSZrrkz 1U, // VEXTRACTF128mr 4U, // VEXTRACTF128rr 1U, // VEXTRACTF32x4rm 324U, // VEXTRACTF32x4rr 6672U, // VEXTRACTF32x4rrk 10448U, // VEXTRACTF32x4rrkz 1U, // VEXTRACTF64x4rm 324U, // VEXTRACTF64x4rr 6672U, // VEXTRACTF64x4rrk 10448U, // VEXTRACTF64x4rrkz 2U, // VEXTRACTI128mr 4U, // VEXTRACTI128rr 2U, // VEXTRACTI32x4rm 324U, // VEXTRACTI32x4rr 6672U, // VEXTRACTI32x4rrk 10448U, // VEXTRACTI32x4rrkz 2U, // VEXTRACTI64x4rm 324U, // VEXTRACTI64x4rr 6672U, // VEXTRACTI64x4rrk 10448U, // VEXTRACTI64x4rrkz 0U, // VEXTRACTPSmr 4U, // VEXTRACTPSrr 0U, // VEXTRACTPSzmr 4U, // VEXTRACTPSzrr 0U, // VFMADD132PDZ128m 72U, // VFMADD132PDZ128mb 0U, // VFMADD132PDZ256m 72U, // VFMADD132PDZ256mb 0U, // VFMADD132PDZm 72U, // VFMADD132PDZmb 0U, // VFMADD132PSZ128m 72U, // VFMADD132PSZ128mb 0U, // VFMADD132PSZ256m 72U, // VFMADD132PSZ256mb 0U, // VFMADD132PSZm 72U, // VFMADD132PSZmb 72U, // VFMADDPD4mr 0U, // VFMADDPD4mrY 72U, // VFMADDPD4rm 72U, // VFMADDPD4rmY 72U, // VFMADDPD4rr 72U, // VFMADDPD4rrY 72U, // VFMADDPD4rrY_REV 72U, // VFMADDPD4rr_REV 28U, // VFMADDPDZ128v213rm 4168U, // VFMADDPDZ128v213rmb 6533U, // VFMADDPDZ128v213rmbk 10629U, // VFMADDPDZ128v213rmbkz 0U, // VFMADDPDZ128v213rmk 0U, // VFMADDPDZ128v213rmkz 28U, // VFMADDPDZ128v213rr 469U, // VFMADDPDZ128v213rrk 597U, // VFMADDPDZ128v213rrkz 28U, // VFMADDPDZ128v231rm 4168U, // VFMADDPDZ128v231rmb 6533U, // VFMADDPDZ128v231rmbk 10629U, // VFMADDPDZ128v231rmbkz 0U, // VFMADDPDZ128v231rmk 0U, // VFMADDPDZ128v231rmkz 28U, // VFMADDPDZ128v231rr 469U, // VFMADDPDZ128v231rrk 597U, // VFMADDPDZ128v231rrkz 28U, // VFMADDPDZ256v213rm 4168U, // VFMADDPDZ256v213rmb 6533U, // VFMADDPDZ256v213rmbk 10629U, // VFMADDPDZ256v213rmbkz 0U, // VFMADDPDZ256v213rmk 0U, // VFMADDPDZ256v213rmkz 28U, // VFMADDPDZ256v213rr 469U, // VFMADDPDZ256v213rrk 597U, // VFMADDPDZ256v213rrkz 28U, // VFMADDPDZ256v231rm 4168U, // VFMADDPDZ256v231rmb 6533U, // VFMADDPDZ256v231rmbk 10629U, // VFMADDPDZ256v231rmbkz 0U, // VFMADDPDZ256v231rmk 0U, // VFMADDPDZ256v231rmkz 28U, // VFMADDPDZ256v231rr 469U, // VFMADDPDZ256v231rrk 597U, // VFMADDPDZ256v231rrkz 28U, // VFMADDPDZv213rm 4168U, // VFMADDPDZv213rmb 6533U, // VFMADDPDZv213rmbk 10629U, // VFMADDPDZv213rmbkz 0U, // VFMADDPDZv213rmk 0U, // VFMADDPDZv213rmkz 28U, // VFMADDPDZv213rr 0U, // VFMADDPDZv213rrb 0U, // VFMADDPDZv213rrbk 0U, // VFMADDPDZv213rrbkz 469U, // VFMADDPDZv213rrk 597U, // VFMADDPDZv213rrkz 28U, // VFMADDPDZv231rm 4168U, // VFMADDPDZv231rmb 6533U, // VFMADDPDZv231rmbk 10629U, // VFMADDPDZv231rmbkz 0U, // VFMADDPDZv231rmk 0U, // VFMADDPDZv231rmkz 28U, // VFMADDPDZv231rr 469U, // VFMADDPDZv231rrk 597U, // VFMADDPDZv231rrkz 0U, // VFMADDPDr132m 0U, // VFMADDPDr132mY 0U, // VFMADDPDr132r 0U, // VFMADDPDr132rY 0U, // VFMADDPDr213m 0U, // VFMADDPDr213mY 0U, // VFMADDPDr213r 0U, // VFMADDPDr213rY 0U, // VFMADDPDr231m 0U, // VFMADDPDr231mY 0U, // VFMADDPDr231r 0U, // VFMADDPDr231rY 72U, // VFMADDPS4mr 0U, // VFMADDPS4mrY 72U, // VFMADDPS4rm 72U, // VFMADDPS4rmY 72U, // VFMADDPS4rr 72U, // VFMADDPS4rrY 72U, // VFMADDPS4rrY_REV 72U, // VFMADDPS4rr_REV 28U, // VFMADDPSZ128v213rm 4168U, // VFMADDPSZ128v213rmb 6533U, // VFMADDPSZ128v213rmbk 10629U, // VFMADDPSZ128v213rmbkz 0U, // VFMADDPSZ128v213rmk 0U, // VFMADDPSZ128v213rmkz 28U, // VFMADDPSZ128v213rr 469U, // VFMADDPSZ128v213rrk 597U, // VFMADDPSZ128v213rrkz 28U, // VFMADDPSZ128v231rm 4168U, // VFMADDPSZ128v231rmb 6533U, // VFMADDPSZ128v231rmbk 10629U, // VFMADDPSZ128v231rmbkz 0U, // VFMADDPSZ128v231rmk 0U, // VFMADDPSZ128v231rmkz 28U, // VFMADDPSZ128v231rr 469U, // VFMADDPSZ128v231rrk 597U, // VFMADDPSZ128v231rrkz 28U, // VFMADDPSZ256v213rm 4168U, // VFMADDPSZ256v213rmb 6533U, // VFMADDPSZ256v213rmbk 10629U, // VFMADDPSZ256v213rmbkz 0U, // VFMADDPSZ256v213rmk 0U, // VFMADDPSZ256v213rmkz 28U, // VFMADDPSZ256v213rr 469U, // VFMADDPSZ256v213rrk 597U, // VFMADDPSZ256v213rrkz 28U, // VFMADDPSZ256v231rm 4168U, // VFMADDPSZ256v231rmb 6533U, // VFMADDPSZ256v231rmbk 10629U, // VFMADDPSZ256v231rmbkz 0U, // VFMADDPSZ256v231rmk 0U, // VFMADDPSZ256v231rmkz 28U, // VFMADDPSZ256v231rr 469U, // VFMADDPSZ256v231rrk 597U, // VFMADDPSZ256v231rrkz 28U, // VFMADDPSZv213rm 4168U, // VFMADDPSZv213rmb 6533U, // VFMADDPSZv213rmbk 10629U, // VFMADDPSZv213rmbkz 0U, // VFMADDPSZv213rmk 0U, // VFMADDPSZv213rmkz 28U, // VFMADDPSZv213rr 0U, // VFMADDPSZv213rrb 0U, // VFMADDPSZv213rrbk 0U, // VFMADDPSZv213rrbkz 469U, // VFMADDPSZv213rrk 597U, // VFMADDPSZv213rrkz 28U, // VFMADDPSZv231rm 4168U, // VFMADDPSZv231rmb 6533U, // VFMADDPSZv231rmbk 10629U, // VFMADDPSZv231rmbkz 0U, // VFMADDPSZv231rmk 0U, // VFMADDPSZv231rmkz 28U, // VFMADDPSZv231rr 469U, // VFMADDPSZv231rrk 597U, // VFMADDPSZv231rrkz 0U, // VFMADDPSr132m 0U, // VFMADDPSr132mY 0U, // VFMADDPSr132r 0U, // VFMADDPSr132rY 0U, // VFMADDPSr213m 0U, // VFMADDPSr213mY 0U, // VFMADDPSr213r 0U, // VFMADDPSr213rY 0U, // VFMADDPSr231m 0U, // VFMADDPSr231mY 0U, // VFMADDPSr231r 0U, // VFMADDPSr231rY 72U, // VFMADDSD4mr 72U, // VFMADDSD4mr_Int 2248U, // VFMADDSD4rm 2248U, // VFMADDSD4rm_Int 72U, // VFMADDSD4rr 72U, // VFMADDSD4rr_Int 72U, // VFMADDSD4rr_REV 0U, // VFMADDSDZm 0U, // VFMADDSDZr 72U, // VFMADDSDr132m 0U, // VFMADDSDr132r 72U, // VFMADDSDr213m 0U, // VFMADDSDr213r 72U, // VFMADDSDr231m 0U, // VFMADDSDr231r 72U, // VFMADDSS4mr 72U, // VFMADDSS4mr_Int 2248U, // VFMADDSS4rm 2248U, // VFMADDSS4rm_Int 72U, // VFMADDSS4rr 72U, // VFMADDSS4rr_Int 72U, // VFMADDSS4rr_REV 0U, // VFMADDSSZm 0U, // VFMADDSSZr 72U, // VFMADDSSr132m 0U, // VFMADDSSr132r 72U, // VFMADDSSr213m 0U, // VFMADDSSr213r 72U, // VFMADDSSr231m 0U, // VFMADDSSr231r 0U, // VFMADDSUB132PDZ128m 72U, // VFMADDSUB132PDZ128mb 0U, // VFMADDSUB132PDZ256m 72U, // VFMADDSUB132PDZ256mb 0U, // VFMADDSUB132PDZm 72U, // VFMADDSUB132PDZmb 0U, // VFMADDSUB132PSZ128m 72U, // VFMADDSUB132PSZ128mb 0U, // VFMADDSUB132PSZ256m 72U, // VFMADDSUB132PSZ256mb 0U, // VFMADDSUB132PSZm 72U, // VFMADDSUB132PSZmb 72U, // VFMADDSUBPD4mr 0U, // VFMADDSUBPD4mrY 72U, // VFMADDSUBPD4rm 72U, // VFMADDSUBPD4rmY 72U, // VFMADDSUBPD4rr 72U, // VFMADDSUBPD4rrY 72U, // VFMADDSUBPD4rrY_REV 72U, // VFMADDSUBPD4rr_REV 28U, // VFMADDSUBPDZ128v213rm 4168U, // VFMADDSUBPDZ128v213rmb 6533U, // VFMADDSUBPDZ128v213rmbk 10629U, // VFMADDSUBPDZ128v213rmbkz 0U, // VFMADDSUBPDZ128v213rmk 0U, // VFMADDSUBPDZ128v213rmkz 28U, // VFMADDSUBPDZ128v213rr 469U, // VFMADDSUBPDZ128v213rrk 597U, // VFMADDSUBPDZ128v213rrkz 28U, // VFMADDSUBPDZ128v231rm 4168U, // VFMADDSUBPDZ128v231rmb 6533U, // VFMADDSUBPDZ128v231rmbk 10629U, // VFMADDSUBPDZ128v231rmbkz 0U, // VFMADDSUBPDZ128v231rmk 0U, // VFMADDSUBPDZ128v231rmkz 28U, // VFMADDSUBPDZ128v231rr 469U, // VFMADDSUBPDZ128v231rrk 597U, // VFMADDSUBPDZ128v231rrkz 28U, // VFMADDSUBPDZ256v213rm 4168U, // VFMADDSUBPDZ256v213rmb 6533U, // VFMADDSUBPDZ256v213rmbk 10629U, // VFMADDSUBPDZ256v213rmbkz 0U, // VFMADDSUBPDZ256v213rmk 0U, // VFMADDSUBPDZ256v213rmkz 28U, // VFMADDSUBPDZ256v213rr 469U, // VFMADDSUBPDZ256v213rrk 597U, // VFMADDSUBPDZ256v213rrkz 28U, // VFMADDSUBPDZ256v231rm 4168U, // VFMADDSUBPDZ256v231rmb 6533U, // VFMADDSUBPDZ256v231rmbk 10629U, // VFMADDSUBPDZ256v231rmbkz 0U, // VFMADDSUBPDZ256v231rmk 0U, // VFMADDSUBPDZ256v231rmkz 28U, // VFMADDSUBPDZ256v231rr 469U, // VFMADDSUBPDZ256v231rrk 597U, // VFMADDSUBPDZ256v231rrkz 28U, // VFMADDSUBPDZv213rm 4168U, // VFMADDSUBPDZv213rmb 6533U, // VFMADDSUBPDZv213rmbk 10629U, // VFMADDSUBPDZv213rmbkz 0U, // VFMADDSUBPDZv213rmk 0U, // VFMADDSUBPDZv213rmkz 28U, // VFMADDSUBPDZv213rr 0U, // VFMADDSUBPDZv213rrb 0U, // VFMADDSUBPDZv213rrbk 0U, // VFMADDSUBPDZv213rrbkz 469U, // VFMADDSUBPDZv213rrk 597U, // VFMADDSUBPDZv213rrkz 28U, // VFMADDSUBPDZv231rm 4168U, // VFMADDSUBPDZv231rmb 6533U, // VFMADDSUBPDZv231rmbk 10629U, // VFMADDSUBPDZv231rmbkz 0U, // VFMADDSUBPDZv231rmk 0U, // VFMADDSUBPDZv231rmkz 28U, // VFMADDSUBPDZv231rr 469U, // VFMADDSUBPDZv231rrk 597U, // VFMADDSUBPDZv231rrkz 0U, // VFMADDSUBPDr132m 0U, // VFMADDSUBPDr132mY 0U, // VFMADDSUBPDr132r 0U, // VFMADDSUBPDr132rY 0U, // VFMADDSUBPDr213m 0U, // VFMADDSUBPDr213mY 0U, // VFMADDSUBPDr213r 0U, // VFMADDSUBPDr213rY 0U, // VFMADDSUBPDr231m 0U, // VFMADDSUBPDr231mY 0U, // VFMADDSUBPDr231r 0U, // VFMADDSUBPDr231rY 72U, // VFMADDSUBPS4mr 0U, // VFMADDSUBPS4mrY 72U, // VFMADDSUBPS4rm 72U, // VFMADDSUBPS4rmY 72U, // VFMADDSUBPS4rr 72U, // VFMADDSUBPS4rrY 72U, // VFMADDSUBPS4rrY_REV 72U, // VFMADDSUBPS4rr_REV 28U, // VFMADDSUBPSZ128v213rm 4168U, // VFMADDSUBPSZ128v213rmb 6533U, // VFMADDSUBPSZ128v213rmbk 10629U, // VFMADDSUBPSZ128v213rmbkz 0U, // VFMADDSUBPSZ128v213rmk 0U, // VFMADDSUBPSZ128v213rmkz 28U, // VFMADDSUBPSZ128v213rr 469U, // VFMADDSUBPSZ128v213rrk 597U, // VFMADDSUBPSZ128v213rrkz 28U, // VFMADDSUBPSZ128v231rm 4168U, // VFMADDSUBPSZ128v231rmb 6533U, // VFMADDSUBPSZ128v231rmbk 10629U, // VFMADDSUBPSZ128v231rmbkz 0U, // VFMADDSUBPSZ128v231rmk 0U, // VFMADDSUBPSZ128v231rmkz 28U, // VFMADDSUBPSZ128v231rr 469U, // VFMADDSUBPSZ128v231rrk 597U, // VFMADDSUBPSZ128v231rrkz 28U, // VFMADDSUBPSZ256v213rm 4168U, // VFMADDSUBPSZ256v213rmb 6533U, // VFMADDSUBPSZ256v213rmbk 10629U, // VFMADDSUBPSZ256v213rmbkz 0U, // VFMADDSUBPSZ256v213rmk 0U, // VFMADDSUBPSZ256v213rmkz 28U, // VFMADDSUBPSZ256v213rr 469U, // VFMADDSUBPSZ256v213rrk 597U, // VFMADDSUBPSZ256v213rrkz 28U, // VFMADDSUBPSZ256v231rm 4168U, // VFMADDSUBPSZ256v231rmb 6533U, // VFMADDSUBPSZ256v231rmbk 10629U, // VFMADDSUBPSZ256v231rmbkz 0U, // VFMADDSUBPSZ256v231rmk 0U, // VFMADDSUBPSZ256v231rmkz 28U, // VFMADDSUBPSZ256v231rr 469U, // VFMADDSUBPSZ256v231rrk 597U, // VFMADDSUBPSZ256v231rrkz 28U, // VFMADDSUBPSZv213rm 4168U, // VFMADDSUBPSZv213rmb 6533U, // VFMADDSUBPSZv213rmbk 10629U, // VFMADDSUBPSZv213rmbkz 0U, // VFMADDSUBPSZv213rmk 0U, // VFMADDSUBPSZv213rmkz 28U, // VFMADDSUBPSZv213rr 0U, // VFMADDSUBPSZv213rrb 0U, // VFMADDSUBPSZv213rrbk 0U, // VFMADDSUBPSZv213rrbkz 469U, // VFMADDSUBPSZv213rrk 597U, // VFMADDSUBPSZv213rrkz 28U, // VFMADDSUBPSZv231rm 4168U, // VFMADDSUBPSZv231rmb 6533U, // VFMADDSUBPSZv231rmbk 10629U, // VFMADDSUBPSZv231rmbkz 0U, // VFMADDSUBPSZv231rmk 0U, // VFMADDSUBPSZv231rmkz 28U, // VFMADDSUBPSZv231rr 469U, // VFMADDSUBPSZv231rrk 597U, // VFMADDSUBPSZv231rrkz 0U, // VFMADDSUBPSr132m 0U, // VFMADDSUBPSr132mY 0U, // VFMADDSUBPSr132r 0U, // VFMADDSUBPSr132rY 0U, // VFMADDSUBPSr213m 0U, // VFMADDSUBPSr213mY 0U, // VFMADDSUBPSr213r 0U, // VFMADDSUBPSr213rY 0U, // VFMADDSUBPSr231m 0U, // VFMADDSUBPSr231mY 0U, // VFMADDSUBPSr231r 0U, // VFMADDSUBPSr231rY 0U, // VFMSUB132PDZ128m 72U, // VFMSUB132PDZ128mb 0U, // VFMSUB132PDZ256m 72U, // VFMSUB132PDZ256mb 0U, // VFMSUB132PDZm 72U, // VFMSUB132PDZmb 0U, // VFMSUB132PSZ128m 72U, // VFMSUB132PSZ128mb 0U, // VFMSUB132PSZ256m 72U, // VFMSUB132PSZ256mb 0U, // VFMSUB132PSZm 72U, // VFMSUB132PSZmb 0U, // VFMSUBADD132PDZ128m 72U, // VFMSUBADD132PDZ128mb 0U, // VFMSUBADD132PDZ256m 72U, // VFMSUBADD132PDZ256mb 0U, // VFMSUBADD132PDZm 72U, // VFMSUBADD132PDZmb 0U, // VFMSUBADD132PSZ128m 72U, // VFMSUBADD132PSZ128mb 0U, // VFMSUBADD132PSZ256m 72U, // VFMSUBADD132PSZ256mb 0U, // VFMSUBADD132PSZm 72U, // VFMSUBADD132PSZmb 72U, // VFMSUBADDPD4mr 0U, // VFMSUBADDPD4mrY 72U, // VFMSUBADDPD4rm 72U, // VFMSUBADDPD4rmY 72U, // VFMSUBADDPD4rr 72U, // VFMSUBADDPD4rrY 72U, // VFMSUBADDPD4rrY_REV 72U, // VFMSUBADDPD4rr_REV 28U, // VFMSUBADDPDZ128v213rm 4168U, // VFMSUBADDPDZ128v213rmb 6533U, // VFMSUBADDPDZ128v213rmbk 10629U, // VFMSUBADDPDZ128v213rmbkz 0U, // VFMSUBADDPDZ128v213rmk 0U, // VFMSUBADDPDZ128v213rmkz 28U, // VFMSUBADDPDZ128v213rr 469U, // VFMSUBADDPDZ128v213rrk 597U, // VFMSUBADDPDZ128v213rrkz 28U, // VFMSUBADDPDZ128v231rm 4168U, // VFMSUBADDPDZ128v231rmb 6533U, // VFMSUBADDPDZ128v231rmbk 10629U, // VFMSUBADDPDZ128v231rmbkz 0U, // VFMSUBADDPDZ128v231rmk 0U, // VFMSUBADDPDZ128v231rmkz 28U, // VFMSUBADDPDZ128v231rr 469U, // VFMSUBADDPDZ128v231rrk 597U, // VFMSUBADDPDZ128v231rrkz 28U, // VFMSUBADDPDZ256v213rm 4168U, // VFMSUBADDPDZ256v213rmb 6533U, // VFMSUBADDPDZ256v213rmbk 10629U, // VFMSUBADDPDZ256v213rmbkz 0U, // VFMSUBADDPDZ256v213rmk 0U, // VFMSUBADDPDZ256v213rmkz 28U, // VFMSUBADDPDZ256v213rr 469U, // VFMSUBADDPDZ256v213rrk 597U, // VFMSUBADDPDZ256v213rrkz 28U, // VFMSUBADDPDZ256v231rm 4168U, // VFMSUBADDPDZ256v231rmb 6533U, // VFMSUBADDPDZ256v231rmbk 10629U, // VFMSUBADDPDZ256v231rmbkz 0U, // VFMSUBADDPDZ256v231rmk 0U, // VFMSUBADDPDZ256v231rmkz 28U, // VFMSUBADDPDZ256v231rr 469U, // VFMSUBADDPDZ256v231rrk 597U, // VFMSUBADDPDZ256v231rrkz 28U, // VFMSUBADDPDZv213rm 4168U, // VFMSUBADDPDZv213rmb 6533U, // VFMSUBADDPDZv213rmbk 10629U, // VFMSUBADDPDZv213rmbkz 0U, // VFMSUBADDPDZv213rmk 0U, // VFMSUBADDPDZv213rmkz 28U, // VFMSUBADDPDZv213rr 0U, // VFMSUBADDPDZv213rrb 0U, // VFMSUBADDPDZv213rrbk 0U, // VFMSUBADDPDZv213rrbkz 469U, // VFMSUBADDPDZv213rrk 597U, // VFMSUBADDPDZv213rrkz 28U, // VFMSUBADDPDZv231rm 4168U, // VFMSUBADDPDZv231rmb 6533U, // VFMSUBADDPDZv231rmbk 10629U, // VFMSUBADDPDZv231rmbkz 0U, // VFMSUBADDPDZv231rmk 0U, // VFMSUBADDPDZv231rmkz 28U, // VFMSUBADDPDZv231rr 469U, // VFMSUBADDPDZv231rrk 597U, // VFMSUBADDPDZv231rrkz 0U, // VFMSUBADDPDr132m 0U, // VFMSUBADDPDr132mY 0U, // VFMSUBADDPDr132r 0U, // VFMSUBADDPDr132rY 0U, // VFMSUBADDPDr213m 0U, // VFMSUBADDPDr213mY 0U, // VFMSUBADDPDr213r 0U, // VFMSUBADDPDr213rY 0U, // VFMSUBADDPDr231m 0U, // VFMSUBADDPDr231mY 0U, // VFMSUBADDPDr231r 0U, // VFMSUBADDPDr231rY 72U, // VFMSUBADDPS4mr 0U, // VFMSUBADDPS4mrY 72U, // VFMSUBADDPS4rm 72U, // VFMSUBADDPS4rmY 72U, // VFMSUBADDPS4rr 72U, // VFMSUBADDPS4rrY 72U, // VFMSUBADDPS4rrY_REV 72U, // VFMSUBADDPS4rr_REV 28U, // VFMSUBADDPSZ128v213rm 4168U, // VFMSUBADDPSZ128v213rmb 6533U, // VFMSUBADDPSZ128v213rmbk 10629U, // VFMSUBADDPSZ128v213rmbkz 0U, // VFMSUBADDPSZ128v213rmk 0U, // VFMSUBADDPSZ128v213rmkz 28U, // VFMSUBADDPSZ128v213rr 469U, // VFMSUBADDPSZ128v213rrk 597U, // VFMSUBADDPSZ128v213rrkz 28U, // VFMSUBADDPSZ128v231rm 4168U, // VFMSUBADDPSZ128v231rmb 6533U, // VFMSUBADDPSZ128v231rmbk 10629U, // VFMSUBADDPSZ128v231rmbkz 0U, // VFMSUBADDPSZ128v231rmk 0U, // VFMSUBADDPSZ128v231rmkz 28U, // VFMSUBADDPSZ128v231rr 469U, // VFMSUBADDPSZ128v231rrk 597U, // VFMSUBADDPSZ128v231rrkz 28U, // VFMSUBADDPSZ256v213rm 4168U, // VFMSUBADDPSZ256v213rmb 6533U, // VFMSUBADDPSZ256v213rmbk 10629U, // VFMSUBADDPSZ256v213rmbkz 0U, // VFMSUBADDPSZ256v213rmk 0U, // VFMSUBADDPSZ256v213rmkz 28U, // VFMSUBADDPSZ256v213rr 469U, // VFMSUBADDPSZ256v213rrk 597U, // VFMSUBADDPSZ256v213rrkz 28U, // VFMSUBADDPSZ256v231rm 4168U, // VFMSUBADDPSZ256v231rmb 6533U, // VFMSUBADDPSZ256v231rmbk 10629U, // VFMSUBADDPSZ256v231rmbkz 0U, // VFMSUBADDPSZ256v231rmk 0U, // VFMSUBADDPSZ256v231rmkz 28U, // VFMSUBADDPSZ256v231rr 469U, // VFMSUBADDPSZ256v231rrk 597U, // VFMSUBADDPSZ256v231rrkz 28U, // VFMSUBADDPSZv213rm 4168U, // VFMSUBADDPSZv213rmb 6533U, // VFMSUBADDPSZv213rmbk 10629U, // VFMSUBADDPSZv213rmbkz 0U, // VFMSUBADDPSZv213rmk 0U, // VFMSUBADDPSZv213rmkz 28U, // VFMSUBADDPSZv213rr 0U, // VFMSUBADDPSZv213rrb 0U, // VFMSUBADDPSZv213rrbk 0U, // VFMSUBADDPSZv213rrbkz 469U, // VFMSUBADDPSZv213rrk 597U, // VFMSUBADDPSZv213rrkz 28U, // VFMSUBADDPSZv231rm 4168U, // VFMSUBADDPSZv231rmb 6533U, // VFMSUBADDPSZv231rmbk 10629U, // VFMSUBADDPSZv231rmbkz 0U, // VFMSUBADDPSZv231rmk 0U, // VFMSUBADDPSZv231rmkz 28U, // VFMSUBADDPSZv231rr 469U, // VFMSUBADDPSZv231rrk 597U, // VFMSUBADDPSZv231rrkz 0U, // VFMSUBADDPSr132m 0U, // VFMSUBADDPSr132mY 0U, // VFMSUBADDPSr132r 0U, // VFMSUBADDPSr132rY 0U, // VFMSUBADDPSr213m 0U, // VFMSUBADDPSr213mY 0U, // VFMSUBADDPSr213r 0U, // VFMSUBADDPSr213rY 0U, // VFMSUBADDPSr231m 0U, // VFMSUBADDPSr231mY 0U, // VFMSUBADDPSr231r 0U, // VFMSUBADDPSr231rY 72U, // VFMSUBPD4mr 0U, // VFMSUBPD4mrY 72U, // VFMSUBPD4rm 72U, // VFMSUBPD4rmY 72U, // VFMSUBPD4rr 72U, // VFMSUBPD4rrY 72U, // VFMSUBPD4rrY_REV 72U, // VFMSUBPD4rr_REV 28U, // VFMSUBPDZ128v213rm 4168U, // VFMSUBPDZ128v213rmb 6533U, // VFMSUBPDZ128v213rmbk 10629U, // VFMSUBPDZ128v213rmbkz 0U, // VFMSUBPDZ128v213rmk 0U, // VFMSUBPDZ128v213rmkz 28U, // VFMSUBPDZ128v213rr 469U, // VFMSUBPDZ128v213rrk 597U, // VFMSUBPDZ128v213rrkz 28U, // VFMSUBPDZ128v231rm 4168U, // VFMSUBPDZ128v231rmb 6533U, // VFMSUBPDZ128v231rmbk 10629U, // VFMSUBPDZ128v231rmbkz 0U, // VFMSUBPDZ128v231rmk 0U, // VFMSUBPDZ128v231rmkz 28U, // VFMSUBPDZ128v231rr 469U, // VFMSUBPDZ128v231rrk 597U, // VFMSUBPDZ128v231rrkz 28U, // VFMSUBPDZ256v213rm 4168U, // VFMSUBPDZ256v213rmb 6533U, // VFMSUBPDZ256v213rmbk 10629U, // VFMSUBPDZ256v213rmbkz 0U, // VFMSUBPDZ256v213rmk 0U, // VFMSUBPDZ256v213rmkz 28U, // VFMSUBPDZ256v213rr 469U, // VFMSUBPDZ256v213rrk 597U, // VFMSUBPDZ256v213rrkz 28U, // VFMSUBPDZ256v231rm 4168U, // VFMSUBPDZ256v231rmb 6533U, // VFMSUBPDZ256v231rmbk 10629U, // VFMSUBPDZ256v231rmbkz 0U, // VFMSUBPDZ256v231rmk 0U, // VFMSUBPDZ256v231rmkz 28U, // VFMSUBPDZ256v231rr 469U, // VFMSUBPDZ256v231rrk 597U, // VFMSUBPDZ256v231rrkz 28U, // VFMSUBPDZv213rm 4168U, // VFMSUBPDZv213rmb 6533U, // VFMSUBPDZv213rmbk 10629U, // VFMSUBPDZv213rmbkz 0U, // VFMSUBPDZv213rmk 0U, // VFMSUBPDZv213rmkz 28U, // VFMSUBPDZv213rr 0U, // VFMSUBPDZv213rrb 0U, // VFMSUBPDZv213rrbk 0U, // VFMSUBPDZv213rrbkz 469U, // VFMSUBPDZv213rrk 597U, // VFMSUBPDZv213rrkz 28U, // VFMSUBPDZv231rm 4168U, // VFMSUBPDZv231rmb 6533U, // VFMSUBPDZv231rmbk 10629U, // VFMSUBPDZv231rmbkz 0U, // VFMSUBPDZv231rmk 0U, // VFMSUBPDZv231rmkz 28U, // VFMSUBPDZv231rr 469U, // VFMSUBPDZv231rrk 597U, // VFMSUBPDZv231rrkz 0U, // VFMSUBPDr132m 0U, // VFMSUBPDr132mY 0U, // VFMSUBPDr132r 0U, // VFMSUBPDr132rY 0U, // VFMSUBPDr213m 0U, // VFMSUBPDr213mY 0U, // VFMSUBPDr213r 0U, // VFMSUBPDr213rY 0U, // VFMSUBPDr231m 0U, // VFMSUBPDr231mY 0U, // VFMSUBPDr231r 0U, // VFMSUBPDr231rY 72U, // VFMSUBPS4mr 0U, // VFMSUBPS4mrY 72U, // VFMSUBPS4rm 72U, // VFMSUBPS4rmY 72U, // VFMSUBPS4rr 72U, // VFMSUBPS4rrY 72U, // VFMSUBPS4rrY_REV 72U, // VFMSUBPS4rr_REV 28U, // VFMSUBPSZ128v213rm 4168U, // VFMSUBPSZ128v213rmb 6533U, // VFMSUBPSZ128v213rmbk 10629U, // VFMSUBPSZ128v213rmbkz 0U, // VFMSUBPSZ128v213rmk 0U, // VFMSUBPSZ128v213rmkz 28U, // VFMSUBPSZ128v213rr 469U, // VFMSUBPSZ128v213rrk 597U, // VFMSUBPSZ128v213rrkz 28U, // VFMSUBPSZ128v231rm 4168U, // VFMSUBPSZ128v231rmb 6533U, // VFMSUBPSZ128v231rmbk 10629U, // VFMSUBPSZ128v231rmbkz 0U, // VFMSUBPSZ128v231rmk 0U, // VFMSUBPSZ128v231rmkz 28U, // VFMSUBPSZ128v231rr 469U, // VFMSUBPSZ128v231rrk 597U, // VFMSUBPSZ128v231rrkz 28U, // VFMSUBPSZ256v213rm 4168U, // VFMSUBPSZ256v213rmb 6533U, // VFMSUBPSZ256v213rmbk 10629U, // VFMSUBPSZ256v213rmbkz 0U, // VFMSUBPSZ256v213rmk 0U, // VFMSUBPSZ256v213rmkz 28U, // VFMSUBPSZ256v213rr 469U, // VFMSUBPSZ256v213rrk 597U, // VFMSUBPSZ256v213rrkz 28U, // VFMSUBPSZ256v231rm 4168U, // VFMSUBPSZ256v231rmb 6533U, // VFMSUBPSZ256v231rmbk 10629U, // VFMSUBPSZ256v231rmbkz 0U, // VFMSUBPSZ256v231rmk 0U, // VFMSUBPSZ256v231rmkz 28U, // VFMSUBPSZ256v231rr 469U, // VFMSUBPSZ256v231rrk 597U, // VFMSUBPSZ256v231rrkz 28U, // VFMSUBPSZv213rm 4168U, // VFMSUBPSZv213rmb 6533U, // VFMSUBPSZv213rmbk 10629U, // VFMSUBPSZv213rmbkz 0U, // VFMSUBPSZv213rmk 0U, // VFMSUBPSZv213rmkz 28U, // VFMSUBPSZv213rr 0U, // VFMSUBPSZv213rrb 0U, // VFMSUBPSZv213rrbk 0U, // VFMSUBPSZv213rrbkz 469U, // VFMSUBPSZv213rrk 597U, // VFMSUBPSZv213rrkz 28U, // VFMSUBPSZv231rm 4168U, // VFMSUBPSZv231rmb 6533U, // VFMSUBPSZv231rmbk 10629U, // VFMSUBPSZv231rmbkz 0U, // VFMSUBPSZv231rmk 0U, // VFMSUBPSZv231rmkz 28U, // VFMSUBPSZv231rr 469U, // VFMSUBPSZv231rrk 597U, // VFMSUBPSZv231rrkz 0U, // VFMSUBPSr132m 0U, // VFMSUBPSr132mY 0U, // VFMSUBPSr132r 0U, // VFMSUBPSr132rY 0U, // VFMSUBPSr213m 0U, // VFMSUBPSr213mY 0U, // VFMSUBPSr213r 0U, // VFMSUBPSr213rY 0U, // VFMSUBPSr231m 0U, // VFMSUBPSr231mY 0U, // VFMSUBPSr231r 0U, // VFMSUBPSr231rY 72U, // VFMSUBSD4mr 72U, // VFMSUBSD4mr_Int 2248U, // VFMSUBSD4rm 2248U, // VFMSUBSD4rm_Int 72U, // VFMSUBSD4rr 72U, // VFMSUBSD4rr_Int 72U, // VFMSUBSD4rr_REV 0U, // VFMSUBSDZm 0U, // VFMSUBSDZr 72U, // VFMSUBSDr132m 0U, // VFMSUBSDr132r 72U, // VFMSUBSDr213m 0U, // VFMSUBSDr213r 72U, // VFMSUBSDr231m 0U, // VFMSUBSDr231r 72U, // VFMSUBSS4mr 72U, // VFMSUBSS4mr_Int 2248U, // VFMSUBSS4rm 2248U, // VFMSUBSS4rm_Int 72U, // VFMSUBSS4rr 72U, // VFMSUBSS4rr_Int 72U, // VFMSUBSS4rr_REV 0U, // VFMSUBSSZm 0U, // VFMSUBSSZr 72U, // VFMSUBSSr132m 0U, // VFMSUBSSr132r 72U, // VFMSUBSSr213m 0U, // VFMSUBSSr213r 72U, // VFMSUBSSr231m 0U, // VFMSUBSSr231r 0U, // VFNMADD132PDZ128m 72U, // VFNMADD132PDZ128mb 0U, // VFNMADD132PDZ256m 72U, // VFNMADD132PDZ256mb 0U, // VFNMADD132PDZm 72U, // VFNMADD132PDZmb 0U, // VFNMADD132PSZ128m 72U, // VFNMADD132PSZ128mb 0U, // VFNMADD132PSZ256m 72U, // VFNMADD132PSZ256mb 0U, // VFNMADD132PSZm 72U, // VFNMADD132PSZmb 72U, // VFNMADDPD4mr 0U, // VFNMADDPD4mrY 72U, // VFNMADDPD4rm 72U, // VFNMADDPD4rmY 72U, // VFNMADDPD4rr 72U, // VFNMADDPD4rrY 72U, // VFNMADDPD4rrY_REV 72U, // VFNMADDPD4rr_REV 28U, // VFNMADDPDZ128v213rm 4168U, // VFNMADDPDZ128v213rmb 6533U, // VFNMADDPDZ128v213rmbk 10629U, // VFNMADDPDZ128v213rmbkz 0U, // VFNMADDPDZ128v213rmk 0U, // VFNMADDPDZ128v213rmkz 28U, // VFNMADDPDZ128v213rr 469U, // VFNMADDPDZ128v213rrk 597U, // VFNMADDPDZ128v213rrkz 28U, // VFNMADDPDZ128v231rm 4168U, // VFNMADDPDZ128v231rmb 6533U, // VFNMADDPDZ128v231rmbk 10629U, // VFNMADDPDZ128v231rmbkz 0U, // VFNMADDPDZ128v231rmk 0U, // VFNMADDPDZ128v231rmkz 28U, // VFNMADDPDZ128v231rr 469U, // VFNMADDPDZ128v231rrk 597U, // VFNMADDPDZ128v231rrkz 28U, // VFNMADDPDZ256v213rm 4168U, // VFNMADDPDZ256v213rmb 6533U, // VFNMADDPDZ256v213rmbk 10629U, // VFNMADDPDZ256v213rmbkz 0U, // VFNMADDPDZ256v213rmk 0U, // VFNMADDPDZ256v213rmkz 28U, // VFNMADDPDZ256v213rr 469U, // VFNMADDPDZ256v213rrk 597U, // VFNMADDPDZ256v213rrkz 28U, // VFNMADDPDZ256v231rm 4168U, // VFNMADDPDZ256v231rmb 6533U, // VFNMADDPDZ256v231rmbk 10629U, // VFNMADDPDZ256v231rmbkz 0U, // VFNMADDPDZ256v231rmk 0U, // VFNMADDPDZ256v231rmkz 28U, // VFNMADDPDZ256v231rr 469U, // VFNMADDPDZ256v231rrk 597U, // VFNMADDPDZ256v231rrkz 28U, // VFNMADDPDZv213rm 4168U, // VFNMADDPDZv213rmb 6533U, // VFNMADDPDZv213rmbk 10629U, // VFNMADDPDZv213rmbkz 0U, // VFNMADDPDZv213rmk 0U, // VFNMADDPDZv213rmkz 28U, // VFNMADDPDZv213rr 0U, // VFNMADDPDZv213rrb 0U, // VFNMADDPDZv213rrbk 0U, // VFNMADDPDZv213rrbkz 469U, // VFNMADDPDZv213rrk 597U, // VFNMADDPDZv213rrkz 28U, // VFNMADDPDZv231rm 4168U, // VFNMADDPDZv231rmb 6533U, // VFNMADDPDZv231rmbk 10629U, // VFNMADDPDZv231rmbkz 0U, // VFNMADDPDZv231rmk 0U, // VFNMADDPDZv231rmkz 28U, // VFNMADDPDZv231rr 469U, // VFNMADDPDZv231rrk 597U, // VFNMADDPDZv231rrkz 0U, // VFNMADDPDr132m 0U, // VFNMADDPDr132mY 0U, // VFNMADDPDr132r 0U, // VFNMADDPDr132rY 0U, // VFNMADDPDr213m 0U, // VFNMADDPDr213mY 0U, // VFNMADDPDr213r 0U, // VFNMADDPDr213rY 0U, // VFNMADDPDr231m 0U, // VFNMADDPDr231mY 0U, // VFNMADDPDr231r 0U, // VFNMADDPDr231rY 72U, // VFNMADDPS4mr 0U, // VFNMADDPS4mrY 72U, // VFNMADDPS4rm 72U, // VFNMADDPS4rmY 72U, // VFNMADDPS4rr 72U, // VFNMADDPS4rrY 72U, // VFNMADDPS4rrY_REV 72U, // VFNMADDPS4rr_REV 28U, // VFNMADDPSZ128v213rm 4168U, // VFNMADDPSZ128v213rmb 6533U, // VFNMADDPSZ128v213rmbk 10629U, // VFNMADDPSZ128v213rmbkz 0U, // VFNMADDPSZ128v213rmk 0U, // VFNMADDPSZ128v213rmkz 28U, // VFNMADDPSZ128v213rr 469U, // VFNMADDPSZ128v213rrk 597U, // VFNMADDPSZ128v213rrkz 28U, // VFNMADDPSZ128v231rm 4168U, // VFNMADDPSZ128v231rmb 6533U, // VFNMADDPSZ128v231rmbk 10629U, // VFNMADDPSZ128v231rmbkz 0U, // VFNMADDPSZ128v231rmk 0U, // VFNMADDPSZ128v231rmkz 28U, // VFNMADDPSZ128v231rr 469U, // VFNMADDPSZ128v231rrk 597U, // VFNMADDPSZ128v231rrkz 28U, // VFNMADDPSZ256v213rm 4168U, // VFNMADDPSZ256v213rmb 6533U, // VFNMADDPSZ256v213rmbk 10629U, // VFNMADDPSZ256v213rmbkz 0U, // VFNMADDPSZ256v213rmk 0U, // VFNMADDPSZ256v213rmkz 28U, // VFNMADDPSZ256v213rr 469U, // VFNMADDPSZ256v213rrk 597U, // VFNMADDPSZ256v213rrkz 28U, // VFNMADDPSZ256v231rm 4168U, // VFNMADDPSZ256v231rmb 6533U, // VFNMADDPSZ256v231rmbk 10629U, // VFNMADDPSZ256v231rmbkz 0U, // VFNMADDPSZ256v231rmk 0U, // VFNMADDPSZ256v231rmkz 28U, // VFNMADDPSZ256v231rr 469U, // VFNMADDPSZ256v231rrk 597U, // VFNMADDPSZ256v231rrkz 28U, // VFNMADDPSZv213rm 4168U, // VFNMADDPSZv213rmb 6533U, // VFNMADDPSZv213rmbk 10629U, // VFNMADDPSZv213rmbkz 0U, // VFNMADDPSZv213rmk 0U, // VFNMADDPSZv213rmkz 28U, // VFNMADDPSZv213rr 0U, // VFNMADDPSZv213rrb 0U, // VFNMADDPSZv213rrbk 0U, // VFNMADDPSZv213rrbkz 469U, // VFNMADDPSZv213rrk 597U, // VFNMADDPSZv213rrkz 28U, // VFNMADDPSZv231rm 4168U, // VFNMADDPSZv231rmb 6533U, // VFNMADDPSZv231rmbk 10629U, // VFNMADDPSZv231rmbkz 0U, // VFNMADDPSZv231rmk 0U, // VFNMADDPSZv231rmkz 28U, // VFNMADDPSZv231rr 469U, // VFNMADDPSZv231rrk 597U, // VFNMADDPSZv231rrkz 0U, // VFNMADDPSr132m 0U, // VFNMADDPSr132mY 0U, // VFNMADDPSr132r 0U, // VFNMADDPSr132rY 0U, // VFNMADDPSr213m 0U, // VFNMADDPSr213mY 0U, // VFNMADDPSr213r 0U, // VFNMADDPSr213rY 0U, // VFNMADDPSr231m 0U, // VFNMADDPSr231mY 0U, // VFNMADDPSr231r 0U, // VFNMADDPSr231rY 72U, // VFNMADDSD4mr 72U, // VFNMADDSD4mr_Int 2248U, // VFNMADDSD4rm 2248U, // VFNMADDSD4rm_Int 72U, // VFNMADDSD4rr 72U, // VFNMADDSD4rr_Int 72U, // VFNMADDSD4rr_REV 0U, // VFNMADDSDZm 0U, // VFNMADDSDZr 72U, // VFNMADDSDr132m 0U, // VFNMADDSDr132r 72U, // VFNMADDSDr213m 0U, // VFNMADDSDr213r 72U, // VFNMADDSDr231m 0U, // VFNMADDSDr231r 72U, // VFNMADDSS4mr 72U, // VFNMADDSS4mr_Int 2248U, // VFNMADDSS4rm 2248U, // VFNMADDSS4rm_Int 72U, // VFNMADDSS4rr 72U, // VFNMADDSS4rr_Int 72U, // VFNMADDSS4rr_REV 0U, // VFNMADDSSZm 0U, // VFNMADDSSZr 72U, // VFNMADDSSr132m 0U, // VFNMADDSSr132r 72U, // VFNMADDSSr213m 0U, // VFNMADDSSr213r 72U, // VFNMADDSSr231m 0U, // VFNMADDSSr231r 0U, // VFNMSUB132PDZ128m 72U, // VFNMSUB132PDZ128mb 0U, // VFNMSUB132PDZ256m 72U, // VFNMSUB132PDZ256mb 0U, // VFNMSUB132PDZm 72U, // VFNMSUB132PDZmb 0U, // VFNMSUB132PSZ128m 72U, // VFNMSUB132PSZ128mb 0U, // VFNMSUB132PSZ256m 72U, // VFNMSUB132PSZ256mb 0U, // VFNMSUB132PSZm 72U, // VFNMSUB132PSZmb 72U, // VFNMSUBPD4mr 0U, // VFNMSUBPD4mrY 72U, // VFNMSUBPD4rm 72U, // VFNMSUBPD4rmY 72U, // VFNMSUBPD4rr 72U, // VFNMSUBPD4rrY 72U, // VFNMSUBPD4rrY_REV 72U, // VFNMSUBPD4rr_REV 28U, // VFNMSUBPDZ128v213rm 4168U, // VFNMSUBPDZ128v213rmb 6533U, // VFNMSUBPDZ128v213rmbk 10629U, // VFNMSUBPDZ128v213rmbkz 0U, // VFNMSUBPDZ128v213rmk 0U, // VFNMSUBPDZ128v213rmkz 28U, // VFNMSUBPDZ128v213rr 469U, // VFNMSUBPDZ128v213rrk 597U, // VFNMSUBPDZ128v213rrkz 28U, // VFNMSUBPDZ128v231rm 4168U, // VFNMSUBPDZ128v231rmb 6533U, // VFNMSUBPDZ128v231rmbk 10629U, // VFNMSUBPDZ128v231rmbkz 0U, // VFNMSUBPDZ128v231rmk 0U, // VFNMSUBPDZ128v231rmkz 28U, // VFNMSUBPDZ128v231rr 469U, // VFNMSUBPDZ128v231rrk 597U, // VFNMSUBPDZ128v231rrkz 28U, // VFNMSUBPDZ256v213rm 4168U, // VFNMSUBPDZ256v213rmb 6533U, // VFNMSUBPDZ256v213rmbk 10629U, // VFNMSUBPDZ256v213rmbkz 0U, // VFNMSUBPDZ256v213rmk 0U, // VFNMSUBPDZ256v213rmkz 28U, // VFNMSUBPDZ256v213rr 469U, // VFNMSUBPDZ256v213rrk 597U, // VFNMSUBPDZ256v213rrkz 28U, // VFNMSUBPDZ256v231rm 4168U, // VFNMSUBPDZ256v231rmb 6533U, // VFNMSUBPDZ256v231rmbk 10629U, // VFNMSUBPDZ256v231rmbkz 0U, // VFNMSUBPDZ256v231rmk 0U, // VFNMSUBPDZ256v231rmkz 28U, // VFNMSUBPDZ256v231rr 469U, // VFNMSUBPDZ256v231rrk 597U, // VFNMSUBPDZ256v231rrkz 28U, // VFNMSUBPDZv213rm 4168U, // VFNMSUBPDZv213rmb 6533U, // VFNMSUBPDZv213rmbk 10629U, // VFNMSUBPDZv213rmbkz 0U, // VFNMSUBPDZv213rmk 0U, // VFNMSUBPDZv213rmkz 28U, // VFNMSUBPDZv213rr 0U, // VFNMSUBPDZv213rrb 0U, // VFNMSUBPDZv213rrbk 0U, // VFNMSUBPDZv213rrbkz 469U, // VFNMSUBPDZv213rrk 597U, // VFNMSUBPDZv213rrkz 28U, // VFNMSUBPDZv231rm 4168U, // VFNMSUBPDZv231rmb 6533U, // VFNMSUBPDZv231rmbk 10629U, // VFNMSUBPDZv231rmbkz 0U, // VFNMSUBPDZv231rmk 0U, // VFNMSUBPDZv231rmkz 28U, // VFNMSUBPDZv231rr 469U, // VFNMSUBPDZv231rrk 597U, // VFNMSUBPDZv231rrkz 0U, // VFNMSUBPDr132m 0U, // VFNMSUBPDr132mY 0U, // VFNMSUBPDr132r 0U, // VFNMSUBPDr132rY 0U, // VFNMSUBPDr213m 0U, // VFNMSUBPDr213mY 0U, // VFNMSUBPDr213r 0U, // VFNMSUBPDr213rY 0U, // VFNMSUBPDr231m 0U, // VFNMSUBPDr231mY 0U, // VFNMSUBPDr231r 0U, // VFNMSUBPDr231rY 72U, // VFNMSUBPS4mr 0U, // VFNMSUBPS4mrY 72U, // VFNMSUBPS4rm 72U, // VFNMSUBPS4rmY 72U, // VFNMSUBPS4rr 72U, // VFNMSUBPS4rrY 72U, // VFNMSUBPS4rrY_REV 72U, // VFNMSUBPS4rr_REV 28U, // VFNMSUBPSZ128v213rm 4168U, // VFNMSUBPSZ128v213rmb 6533U, // VFNMSUBPSZ128v213rmbk 10629U, // VFNMSUBPSZ128v213rmbkz 0U, // VFNMSUBPSZ128v213rmk 0U, // VFNMSUBPSZ128v213rmkz 28U, // VFNMSUBPSZ128v213rr 469U, // VFNMSUBPSZ128v213rrk 597U, // VFNMSUBPSZ128v213rrkz 28U, // VFNMSUBPSZ128v231rm 4168U, // VFNMSUBPSZ128v231rmb 6533U, // VFNMSUBPSZ128v231rmbk 10629U, // VFNMSUBPSZ128v231rmbkz 0U, // VFNMSUBPSZ128v231rmk 0U, // VFNMSUBPSZ128v231rmkz 28U, // VFNMSUBPSZ128v231rr 469U, // VFNMSUBPSZ128v231rrk 597U, // VFNMSUBPSZ128v231rrkz 28U, // VFNMSUBPSZ256v213rm 4168U, // VFNMSUBPSZ256v213rmb 6533U, // VFNMSUBPSZ256v213rmbk 10629U, // VFNMSUBPSZ256v213rmbkz 0U, // VFNMSUBPSZ256v213rmk 0U, // VFNMSUBPSZ256v213rmkz 28U, // VFNMSUBPSZ256v213rr 469U, // VFNMSUBPSZ256v213rrk 597U, // VFNMSUBPSZ256v213rrkz 28U, // VFNMSUBPSZ256v231rm 4168U, // VFNMSUBPSZ256v231rmb 6533U, // VFNMSUBPSZ256v231rmbk 10629U, // VFNMSUBPSZ256v231rmbkz 0U, // VFNMSUBPSZ256v231rmk 0U, // VFNMSUBPSZ256v231rmkz 28U, // VFNMSUBPSZ256v231rr 469U, // VFNMSUBPSZ256v231rrk 597U, // VFNMSUBPSZ256v231rrkz 28U, // VFNMSUBPSZv213rm 4168U, // VFNMSUBPSZv213rmb 6533U, // VFNMSUBPSZv213rmbk 10629U, // VFNMSUBPSZv213rmbkz 0U, // VFNMSUBPSZv213rmk 0U, // VFNMSUBPSZv213rmkz 28U, // VFNMSUBPSZv213rr 0U, // VFNMSUBPSZv213rrb 0U, // VFNMSUBPSZv213rrbk 0U, // VFNMSUBPSZv213rrbkz 469U, // VFNMSUBPSZv213rrk 597U, // VFNMSUBPSZv213rrkz 28U, // VFNMSUBPSZv231rm 4168U, // VFNMSUBPSZv231rmb 6533U, // VFNMSUBPSZv231rmbk 10629U, // VFNMSUBPSZv231rmbkz 0U, // VFNMSUBPSZv231rmk 0U, // VFNMSUBPSZv231rmkz 28U, // VFNMSUBPSZv231rr 469U, // VFNMSUBPSZv231rrk 597U, // VFNMSUBPSZv231rrkz 0U, // VFNMSUBPSr132m 0U, // VFNMSUBPSr132mY 0U, // VFNMSUBPSr132r 0U, // VFNMSUBPSr132rY 0U, // VFNMSUBPSr213m 0U, // VFNMSUBPSr213mY 0U, // VFNMSUBPSr213r 0U, // VFNMSUBPSr213rY 0U, // VFNMSUBPSr231m 0U, // VFNMSUBPSr231mY 0U, // VFNMSUBPSr231r 0U, // VFNMSUBPSr231rY 72U, // VFNMSUBSD4mr 72U, // VFNMSUBSD4mr_Int 2248U, // VFNMSUBSD4rm 2248U, // VFNMSUBSD4rm_Int 72U, // VFNMSUBSD4rr 72U, // VFNMSUBSD4rr_Int 72U, // VFNMSUBSD4rr_REV 0U, // VFNMSUBSDZm 0U, // VFNMSUBSDZr 72U, // VFNMSUBSDr132m 0U, // VFNMSUBSDr132r 72U, // VFNMSUBSDr213m 0U, // VFNMSUBSDr213r 72U, // VFNMSUBSDr231m 0U, // VFNMSUBSDr231r 72U, // VFNMSUBSS4mr 72U, // VFNMSUBSS4mr_Int 2248U, // VFNMSUBSS4rm 2248U, // VFNMSUBSS4rm_Int 72U, // VFNMSUBSS4rr 72U, // VFNMSUBSS4rr_Int 72U, // VFNMSUBSS4rr_REV 0U, // VFNMSUBSSZm 0U, // VFNMSUBSSZr 72U, // VFNMSUBSSr132m 0U, // VFNMSUBSSr132r 72U, // VFNMSUBSSr213m 0U, // VFNMSUBSSr213r 72U, // VFNMSUBSSr231m 0U, // VFNMSUBSSr231r 0U, // VFRCZPDrm 0U, // VFRCZPDrmY 0U, // VFRCZPDrr 0U, // VFRCZPDrrY 0U, // VFRCZPSrm 0U, // VFRCZPSrmY 0U, // VFRCZPSrr 0U, // VFRCZPSrrY 0U, // VFRCZSDrm 0U, // VFRCZSDrr 0U, // VFRCZSSrm 0U, // VFRCZSSrr 4U, // VFsANDNPDrm 4U, // VFsANDNPDrr 4U, // VFsANDNPSrm 4U, // VFsANDNPSrr 4U, // VFsANDPDrm 4U, // VFsANDPDrr 4U, // VFsANDPSrm 4U, // VFsANDPSrr 4U, // VFsORPDrm 4U, // VFsORPDrr 4U, // VFsORPSrm 4U, // VFsORPSrr 4U, // VFsXORPDrm 4U, // VFsXORPDrr 4U, // VFsXORPSrm 4U, // VFsXORPSrr 4U, // VFvANDNPDrm 4U, // VFvANDNPDrr 4U, // VFvANDNPSrm 4U, // VFvANDNPSrr 4U, // VFvANDPDrm 4U, // VFvANDPDrr 4U, // VFvANDPSrm 4U, // VFvANDPSrr 4U, // VFvORPDrm 4U, // VFvORPDrr 4U, // VFvORPSrm 4U, // VFvORPSrr 4U, // VFvXORPDrm 4U, // VFvXORPDrr 4U, // VFvXORPSrm 4U, // VFvXORPSrr 4U, // VGATHERDPDYrm 848U, // VGATHERDPDZrm 4U, // VGATHERDPDrm 4U, // VGATHERDPSYrm 848U, // VGATHERDPSZrm 4U, // VGATHERDPSrm 40U, // VGATHERPF0DPDm 40U, // VGATHERPF0DPSm 40U, // VGATHERPF0QPDm 40U, // VGATHERPF0QPSm 40U, // VGATHERPF1DPDm 40U, // VGATHERPF1DPSm 40U, // VGATHERPF1QPDm 40U, // VGATHERPF1QPSm 4U, // VGATHERQPDYrm 848U, // VGATHERQPDZrm 4U, // VGATHERQPDrm 4U, // VGATHERQPSYrm 848U, // VGATHERQPSZrm 4U, // VGATHERQPSrm 4U, // VHADDPDYrm 4U, // VHADDPDYrr 4U, // VHADDPDrm 4U, // VHADDPDrr 4U, // VHADDPSYrm 4U, // VHADDPSYrr 4U, // VHADDPSrm 4U, // VHADDPSrr 4U, // VHSUBPDYrm 4U, // VHSUBPDYrr 4U, // VHSUBPDrm 4U, // VHSUBPDrr 4U, // VHSUBPSYrm 4U, // VHSUBPSYrr 4U, // VHSUBPSrm 4U, // VHSUBPSrr 72U, // VINSERTF128rm 72U, // VINSERTF128rr 72U, // VINSERTF32x4rm 72U, // VINSERTF32x4rr 0U, // VINSERTF32x8rm 72U, // VINSERTF32x8rr 72U, // VINSERTF64x2rm 72U, // VINSERTF64x2rr 0U, // VINSERTF64x4rm 72U, // VINSERTF64x4rr 72U, // VINSERTI128rm 72U, // VINSERTI128rr 72U, // VINSERTI32x4rm 72U, // VINSERTI32x4rr 0U, // VINSERTI32x8rm 72U, // VINSERTI32x8rr 72U, // VINSERTI64x2rm 72U, // VINSERTI64x2rr 0U, // VINSERTI64x4rm 72U, // VINSERTI64x4rr 72U, // VINSERTPSrm 72U, // VINSERTPSrr 72U, // VINSERTPSzrm 72U, // VINSERTPSzrr 0U, // VLDDQUYrm 0U, // VLDDQUrm 0U, // VLDMXCSR 0U, // VMASKMOVDQU 0U, // VMASKMOVDQU64 1U, // VMASKMOVPDYmr 4U, // VMASKMOVPDYrm 1U, // VMASKMOVPDmr 4U, // VMASKMOVPDrm 1U, // VMASKMOVPSYmr 4U, // VMASKMOVPSYrm 1U, // VMASKMOVPSmr 4U, // VMASKMOVPSrm 4U, // VMAXCPDYrm 4U, // VMAXCPDYrr 4U, // VMAXCPDrm 4U, // VMAXCPDrr 4U, // VMAXCPSYrm 4U, // VMAXCPSYrr 4U, // VMAXCPSrm 4U, // VMAXCPSrr 72U, // VMAXCSDrm 4U, // VMAXCSDrr 72U, // VMAXCSSrm 4U, // VMAXCSSrr 4U, // VMAXPDYrm 4U, // VMAXPDYrr 324U, // VMAXPDZ128rm 4168U, // VMAXPDZ128rmb 6533U, // VMAXPDZ128rmbk 41032U, // VMAXPDZ128rmbkz 0U, // VMAXPDZ128rmk 10448U, // VMAXPDZ128rmkz 324U, // VMAXPDZ128rr 469U, // VMAXPDZ128rrk 10448U, // VMAXPDZ128rrkz 324U, // VMAXPDZ256rm 4168U, // VMAXPDZ256rmb 6533U, // VMAXPDZ256rmbk 41032U, // VMAXPDZ256rmbkz 0U, // VMAXPDZ256rmk 10448U, // VMAXPDZ256rmkz 324U, // VMAXPDZ256rr 469U, // VMAXPDZ256rrk 10448U, // VMAXPDZ256rrkz 324U, // VMAXPDZrm 4168U, // VMAXPDZrmb 6533U, // VMAXPDZrmbk 41032U, // VMAXPDZrmbkz 0U, // VMAXPDZrmk 10448U, // VMAXPDZrmkz 324U, // VMAXPDZrr 469U, // VMAXPDZrrk 10448U, // VMAXPDZrrkz 4U, // VMAXPDrm 4U, // VMAXPDrr 4U, // VMAXPSYrm 4U, // VMAXPSYrr 324U, // VMAXPSZ128rm 4168U, // VMAXPSZ128rmb 6533U, // VMAXPSZ128rmbk 41032U, // VMAXPSZ128rmbkz 0U, // VMAXPSZ128rmk 10448U, // VMAXPSZ128rmkz 324U, // VMAXPSZ128rr 469U, // VMAXPSZ128rrk 10448U, // VMAXPSZ128rrkz 324U, // VMAXPSZ256rm 4168U, // VMAXPSZ256rmb 6533U, // VMAXPSZ256rmbk 41032U, // VMAXPSZ256rmbkz 0U, // VMAXPSZ256rmk 10448U, // VMAXPSZ256rmkz 324U, // VMAXPSZ256rr 469U, // VMAXPSZ256rrk 10448U, // VMAXPSZ256rrkz 324U, // VMAXPSZrm 4168U, // VMAXPSZrmb 6533U, // VMAXPSZrmbk 41032U, // VMAXPSZrmbkz 0U, // VMAXPSZrmk 10448U, // VMAXPSZrmkz 324U, // VMAXPSZrr 469U, // VMAXPSZrrk 10448U, // VMAXPSZrrkz 4U, // VMAXPSrm 4U, // VMAXPSrr 72U, // VMAXSDZrm 324U, // VMAXSDZrm_Int 0U, // VMAXSDZrm_Intk 10448U, // VMAXSDZrm_Intkz 4U, // VMAXSDZrr 324U, // VMAXSDZrr_Int 469U, // VMAXSDZrr_Intk 10448U, // VMAXSDZrr_Intkz 900U, // VMAXSDZrrb 725U, // VMAXSDZrrbk 12496U, // VMAXSDZrrbkz 72U, // VMAXSDrm 72U, // VMAXSDrm_Int 4U, // VMAXSDrr 4U, // VMAXSDrr_Int 72U, // VMAXSSZrm 324U, // VMAXSSZrm_Int 0U, // VMAXSSZrm_Intk 10448U, // VMAXSSZrm_Intkz 4U, // VMAXSSZrr 324U, // VMAXSSZrr_Int 469U, // VMAXSSZrr_Intk 10448U, // VMAXSSZrr_Intkz 900U, // VMAXSSZrrb 725U, // VMAXSSZrrbk 12496U, // VMAXSSZrrbkz 72U, // VMAXSSrm 72U, // VMAXSSrm_Int 4U, // VMAXSSrr 4U, // VMAXSSrr_Int 0U, // VMCALL 0U, // VMCLEARm 0U, // VMFUNC 4U, // VMINCPDYrm 4U, // VMINCPDYrr 4U, // VMINCPDrm 4U, // VMINCPDrr 4U, // VMINCPSYrm 4U, // VMINCPSYrr 4U, // VMINCPSrm 4U, // VMINCPSrr 72U, // VMINCSDrm 4U, // VMINCSDrr 72U, // VMINCSSrm 4U, // VMINCSSrr 4U, // VMINPDYrm 4U, // VMINPDYrr 324U, // VMINPDZ128rm 4168U, // VMINPDZ128rmb 6533U, // VMINPDZ128rmbk 41032U, // VMINPDZ128rmbkz 0U, // VMINPDZ128rmk 10448U, // VMINPDZ128rmkz 324U, // VMINPDZ128rr 469U, // VMINPDZ128rrk 10448U, // VMINPDZ128rrkz 324U, // VMINPDZ256rm 4168U, // VMINPDZ256rmb 6533U, // VMINPDZ256rmbk 41032U, // VMINPDZ256rmbkz 0U, // VMINPDZ256rmk 10448U, // VMINPDZ256rmkz 324U, // VMINPDZ256rr 469U, // VMINPDZ256rrk 10448U, // VMINPDZ256rrkz 324U, // VMINPDZrm 4168U, // VMINPDZrmb 6533U, // VMINPDZrmbk 41032U, // VMINPDZrmbkz 0U, // VMINPDZrmk 10448U, // VMINPDZrmkz 324U, // VMINPDZrr 469U, // VMINPDZrrk 10448U, // VMINPDZrrkz 4U, // VMINPDrm 4U, // VMINPDrr 4U, // VMINPSYrm 4U, // VMINPSYrr 324U, // VMINPSZ128rm 4168U, // VMINPSZ128rmb 6533U, // VMINPSZ128rmbk 41032U, // VMINPSZ128rmbkz 0U, // VMINPSZ128rmk 10448U, // VMINPSZ128rmkz 324U, // VMINPSZ128rr 469U, // VMINPSZ128rrk 10448U, // VMINPSZ128rrkz 324U, // VMINPSZ256rm 4168U, // VMINPSZ256rmb 6533U, // VMINPSZ256rmbk 41032U, // VMINPSZ256rmbkz 0U, // VMINPSZ256rmk 10448U, // VMINPSZ256rmkz 324U, // VMINPSZ256rr 469U, // VMINPSZ256rrk 10448U, // VMINPSZ256rrkz 324U, // VMINPSZrm 4168U, // VMINPSZrmb 6533U, // VMINPSZrmbk 41032U, // VMINPSZrmbkz 0U, // VMINPSZrmk 10448U, // VMINPSZrmkz 324U, // VMINPSZrr 469U, // VMINPSZrrk 10448U, // VMINPSZrrkz 4U, // VMINPSrm 4U, // VMINPSrr 72U, // VMINSDZrm 324U, // VMINSDZrm_Int 0U, // VMINSDZrm_Intk 10448U, // VMINSDZrm_Intkz 4U, // VMINSDZrr 324U, // VMINSDZrr_Int 469U, // VMINSDZrr_Intk 10448U, // VMINSDZrr_Intkz 900U, // VMINSDZrrb 725U, // VMINSDZrrbk 12496U, // VMINSDZrrbkz 72U, // VMINSDrm 72U, // VMINSDrm_Int 4U, // VMINSDrr 4U, // VMINSDrr_Int 72U, // VMINSSZrm 324U, // VMINSSZrm_Int 0U, // VMINSSZrm_Intk 10448U, // VMINSSZrm_Intkz 4U, // VMINSSZrr 324U, // VMINSSZrr_Int 469U, // VMINSSZrr_Intk 10448U, // VMINSSZrr_Intkz 900U, // VMINSSZrrb 725U, // VMINSSZrrbk 12496U, // VMINSSZrrbkz 72U, // VMINSSrm 72U, // VMINSSrm_Int 4U, // VMINSSrr 4U, // VMINSSrr_Int 0U, // VMLAUNCH 0U, // VMLOAD32 0U, // VMLOAD64 0U, // VMMCALL 0U, // VMOV64toPQIZrr 0U, // VMOV64toPQIrm 0U, // VMOV64toPQIrr 0U, // VMOV64toSDZrr 0U, // VMOV64toSDrm 0U, // VMOV64toSDrr 0U, // VMOVAPDYmr 0U, // VMOVAPDYrm 0U, // VMOVAPDYrr 0U, // VMOVAPDYrr_REV 0U, // VMOVAPDZ128mr 481U, // VMOVAPDZ128mrk 0U, // VMOVAPDZ128rm 469U, // VMOVAPDZ128rmk 589U, // VMOVAPDZ128rmkz 0U, // VMOVAPDZ128rr 0U, // VMOVAPDZ128rr_alt 469U, // VMOVAPDZ128rrk 469U, // VMOVAPDZ128rrk_alt 589U, // VMOVAPDZ128rrkz 589U, // VMOVAPDZ128rrkz_alt 0U, // VMOVAPDZ256mr 481U, // VMOVAPDZ256mrk 0U, // VMOVAPDZ256rm 469U, // VMOVAPDZ256rmk 589U, // VMOVAPDZ256rmkz 0U, // VMOVAPDZ256rr 0U, // VMOVAPDZ256rr_alt 469U, // VMOVAPDZ256rrk 469U, // VMOVAPDZ256rrk_alt 589U, // VMOVAPDZ256rrkz 589U, // VMOVAPDZ256rrkz_alt 0U, // VMOVAPDZmr 481U, // VMOVAPDZmrk 0U, // VMOVAPDZrm 469U, // VMOVAPDZrmk 589U, // VMOVAPDZrmkz 0U, // VMOVAPDZrr 0U, // VMOVAPDZrr_alt 469U, // VMOVAPDZrrk 469U, // VMOVAPDZrrk_alt 589U, // VMOVAPDZrrkz 589U, // VMOVAPDZrrkz_alt 0U, // VMOVAPDmr 0U, // VMOVAPDrm 0U, // VMOVAPDrr 0U, // VMOVAPDrr_REV 0U, // VMOVAPSYmr 0U, // VMOVAPSYrm 0U, // VMOVAPSYrr 0U, // VMOVAPSYrr_REV 0U, // VMOVAPSZ128mr 481U, // VMOVAPSZ128mrk 0U, // VMOVAPSZ128rm 469U, // VMOVAPSZ128rmk 589U, // VMOVAPSZ128rmkz 0U, // VMOVAPSZ128rr 0U, // VMOVAPSZ128rr_alt 469U, // VMOVAPSZ128rrk 469U, // VMOVAPSZ128rrk_alt 589U, // VMOVAPSZ128rrkz 589U, // VMOVAPSZ128rrkz_alt 0U, // VMOVAPSZ256mr 481U, // VMOVAPSZ256mrk 0U, // VMOVAPSZ256rm 469U, // VMOVAPSZ256rmk 589U, // VMOVAPSZ256rmkz 0U, // VMOVAPSZ256rr 0U, // VMOVAPSZ256rr_alt 469U, // VMOVAPSZ256rrk 469U, // VMOVAPSZ256rrk_alt 589U, // VMOVAPSZ256rrkz 589U, // VMOVAPSZ256rrkz_alt 0U, // VMOVAPSZmr 481U, // VMOVAPSZmrk 0U, // VMOVAPSZrm 469U, // VMOVAPSZrmk 589U, // VMOVAPSZrmkz 0U, // VMOVAPSZrr 0U, // VMOVAPSZrr_alt 469U, // VMOVAPSZrrk 469U, // VMOVAPSZrrk_alt 589U, // VMOVAPSZrrkz 589U, // VMOVAPSZrrkz_alt 0U, // VMOVAPSmr 0U, // VMOVAPSrm 0U, // VMOVAPSrr 0U, // VMOVAPSrr_REV 0U, // VMOVDDUPYrm 0U, // VMOVDDUPYrr 0U, // VMOVDDUPZrm 0U, // VMOVDDUPZrr 0U, // VMOVDDUPrm 0U, // VMOVDDUPrr 0U, // VMOVDI2PDIZrm 0U, // VMOVDI2PDIZrr 0U, // VMOVDI2PDIrm 0U, // VMOVDI2PDIrr 0U, // VMOVDI2SSZrm 0U, // VMOVDI2SSZrr 0U, // VMOVDI2SSrm 0U, // VMOVDI2SSrr 0U, // VMOVDQA32Z128mr 481U, // VMOVDQA32Z128mrk 0U, // VMOVDQA32Z128rm 469U, // VMOVDQA32Z128rmk 589U, // VMOVDQA32Z128rmkz 0U, // VMOVDQA32Z128rr 0U, // VMOVDQA32Z128rr_alt 469U, // VMOVDQA32Z128rrk 469U, // VMOVDQA32Z128rrk_alt 589U, // VMOVDQA32Z128rrkz 589U, // VMOVDQA32Z128rrkz_alt 0U, // VMOVDQA32Z256mr 481U, // VMOVDQA32Z256mrk 0U, // VMOVDQA32Z256rm 469U, // VMOVDQA32Z256rmk 589U, // VMOVDQA32Z256rmkz 0U, // VMOVDQA32Z256rr 0U, // VMOVDQA32Z256rr_alt 469U, // VMOVDQA32Z256rrk 469U, // VMOVDQA32Z256rrk_alt 589U, // VMOVDQA32Z256rrkz 589U, // VMOVDQA32Z256rrkz_alt 0U, // VMOVDQA32Zmr 481U, // VMOVDQA32Zmrk 0U, // VMOVDQA32Zrm 469U, // VMOVDQA32Zrmk 589U, // VMOVDQA32Zrmkz 0U, // VMOVDQA32Zrr 0U, // VMOVDQA32Zrr_alt 469U, // VMOVDQA32Zrrk 469U, // VMOVDQA32Zrrk_alt 589U, // VMOVDQA32Zrrkz 589U, // VMOVDQA32Zrrkz_alt 0U, // VMOVDQA64Z128mr 481U, // VMOVDQA64Z128mrk 0U, // VMOVDQA64Z128rm 469U, // VMOVDQA64Z128rmk 589U, // VMOVDQA64Z128rmkz 0U, // VMOVDQA64Z128rr 0U, // VMOVDQA64Z128rr_alt 469U, // VMOVDQA64Z128rrk 469U, // VMOVDQA64Z128rrk_alt 589U, // VMOVDQA64Z128rrkz 589U, // VMOVDQA64Z128rrkz_alt 0U, // VMOVDQA64Z256mr 481U, // VMOVDQA64Z256mrk 0U, // VMOVDQA64Z256rm 469U, // VMOVDQA64Z256rmk 589U, // VMOVDQA64Z256rmkz 0U, // VMOVDQA64Z256rr 0U, // VMOVDQA64Z256rr_alt 469U, // VMOVDQA64Z256rrk 469U, // VMOVDQA64Z256rrk_alt 589U, // VMOVDQA64Z256rrkz 589U, // VMOVDQA64Z256rrkz_alt 0U, // VMOVDQA64Zmr 481U, // VMOVDQA64Zmrk 0U, // VMOVDQA64Zrm 469U, // VMOVDQA64Zrmk 589U, // VMOVDQA64Zrmkz 0U, // VMOVDQA64Zrr 0U, // VMOVDQA64Zrr_alt 469U, // VMOVDQA64Zrrk 469U, // VMOVDQA64Zrrk_alt 589U, // VMOVDQA64Zrrkz 589U, // VMOVDQA64Zrrkz_alt 0U, // VMOVDQAYmr 0U, // VMOVDQAYrm 0U, // VMOVDQAYrr 0U, // VMOVDQAYrr_REV 0U, // VMOVDQAmr 0U, // VMOVDQArm 0U, // VMOVDQArr 0U, // VMOVDQArr_REV 0U, // VMOVDQU16Z128mr 481U, // VMOVDQU16Z128mrk 0U, // VMOVDQU16Z128rm 469U, // VMOVDQU16Z128rmk 589U, // VMOVDQU16Z128rmkz 0U, // VMOVDQU16Z128rr 0U, // VMOVDQU16Z128rr_alt 469U, // VMOVDQU16Z128rrk 469U, // VMOVDQU16Z128rrk_alt 589U, // VMOVDQU16Z128rrkz 589U, // VMOVDQU16Z128rrkz_alt 0U, // VMOVDQU16Z256mr 481U, // VMOVDQU16Z256mrk 0U, // VMOVDQU16Z256rm 469U, // VMOVDQU16Z256rmk 589U, // VMOVDQU16Z256rmkz 0U, // VMOVDQU16Z256rr 0U, // VMOVDQU16Z256rr_alt 469U, // VMOVDQU16Z256rrk 469U, // VMOVDQU16Z256rrk_alt 589U, // VMOVDQU16Z256rrkz 589U, // VMOVDQU16Z256rrkz_alt 0U, // VMOVDQU16Zmr 481U, // VMOVDQU16Zmrk 0U, // VMOVDQU16Zrm 469U, // VMOVDQU16Zrmk 589U, // VMOVDQU16Zrmkz 0U, // VMOVDQU16Zrr 0U, // VMOVDQU16Zrr_alt 469U, // VMOVDQU16Zrrk 469U, // VMOVDQU16Zrrk_alt 589U, // VMOVDQU16Zrrkz 589U, // VMOVDQU16Zrrkz_alt 0U, // VMOVDQU32Z128mr 481U, // VMOVDQU32Z128mrk 0U, // VMOVDQU32Z128rm 469U, // VMOVDQU32Z128rmk 589U, // VMOVDQU32Z128rmkz 0U, // VMOVDQU32Z128rr 0U, // VMOVDQU32Z128rr_alt 469U, // VMOVDQU32Z128rrk 469U, // VMOVDQU32Z128rrk_alt 589U, // VMOVDQU32Z128rrkz 589U, // VMOVDQU32Z128rrkz_alt 0U, // VMOVDQU32Z256mr 481U, // VMOVDQU32Z256mrk 0U, // VMOVDQU32Z256rm 469U, // VMOVDQU32Z256rmk 589U, // VMOVDQU32Z256rmkz 0U, // VMOVDQU32Z256rr 0U, // VMOVDQU32Z256rr_alt 469U, // VMOVDQU32Z256rrk 469U, // VMOVDQU32Z256rrk_alt 589U, // VMOVDQU32Z256rrkz 589U, // VMOVDQU32Z256rrkz_alt 0U, // VMOVDQU32Zmr 481U, // VMOVDQU32Zmrk 0U, // VMOVDQU32Zrm 469U, // VMOVDQU32Zrmk 589U, // VMOVDQU32Zrmkz 0U, // VMOVDQU32Zrr 0U, // VMOVDQU32Zrr_alt 469U, // VMOVDQU32Zrrk 469U, // VMOVDQU32Zrrk_alt 589U, // VMOVDQU32Zrrkz 589U, // VMOVDQU32Zrrkz_alt 0U, // VMOVDQU64Z128mr 481U, // VMOVDQU64Z128mrk 0U, // VMOVDQU64Z128rm 469U, // VMOVDQU64Z128rmk 589U, // VMOVDQU64Z128rmkz 0U, // VMOVDQU64Z128rr 0U, // VMOVDQU64Z128rr_alt 469U, // VMOVDQU64Z128rrk 469U, // VMOVDQU64Z128rrk_alt 589U, // VMOVDQU64Z128rrkz 589U, // VMOVDQU64Z128rrkz_alt 0U, // VMOVDQU64Z256mr 481U, // VMOVDQU64Z256mrk 0U, // VMOVDQU64Z256rm 469U, // VMOVDQU64Z256rmk 589U, // VMOVDQU64Z256rmkz 0U, // VMOVDQU64Z256rr 0U, // VMOVDQU64Z256rr_alt 469U, // VMOVDQU64Z256rrk 469U, // VMOVDQU64Z256rrk_alt 589U, // VMOVDQU64Z256rrkz 589U, // VMOVDQU64Z256rrkz_alt 0U, // VMOVDQU64Zmr 481U, // VMOVDQU64Zmrk 0U, // VMOVDQU64Zrm 469U, // VMOVDQU64Zrmk 589U, // VMOVDQU64Zrmkz 0U, // VMOVDQU64Zrr 0U, // VMOVDQU64Zrr_alt 469U, // VMOVDQU64Zrrk 469U, // VMOVDQU64Zrrk_alt 589U, // VMOVDQU64Zrrkz 589U, // VMOVDQU64Zrrkz_alt 0U, // VMOVDQU8Z128mr 481U, // VMOVDQU8Z128mrk 0U, // VMOVDQU8Z128rm 469U, // VMOVDQU8Z128rmk 589U, // VMOVDQU8Z128rmkz 0U, // VMOVDQU8Z128rr 0U, // VMOVDQU8Z128rr_alt 469U, // VMOVDQU8Z128rrk 469U, // VMOVDQU8Z128rrk_alt 589U, // VMOVDQU8Z128rrkz 589U, // VMOVDQU8Z128rrkz_alt 0U, // VMOVDQU8Z256mr 481U, // VMOVDQU8Z256mrk 0U, // VMOVDQU8Z256rm 469U, // VMOVDQU8Z256rmk 589U, // VMOVDQU8Z256rmkz 0U, // VMOVDQU8Z256rr 0U, // VMOVDQU8Z256rr_alt 469U, // VMOVDQU8Z256rrk 469U, // VMOVDQU8Z256rrk_alt 589U, // VMOVDQU8Z256rrkz 589U, // VMOVDQU8Z256rrkz_alt 0U, // VMOVDQU8Zmr 481U, // VMOVDQU8Zmrk 0U, // VMOVDQU8Zrm 469U, // VMOVDQU8Zrmk 589U, // VMOVDQU8Zrmkz 0U, // VMOVDQU8Zrr 0U, // VMOVDQU8Zrr_alt 469U, // VMOVDQU8Zrrk 469U, // VMOVDQU8Zrrk_alt 589U, // VMOVDQU8Zrrkz 589U, // VMOVDQU8Zrrkz_alt 0U, // VMOVDQUYmr 0U, // VMOVDQUYrm 0U, // VMOVDQUYrr 0U, // VMOVDQUYrr_REV 0U, // VMOVDQUmr 0U, // VMOVDQUrm 0U, // VMOVDQUrr 0U, // VMOVDQUrr_REV 4U, // VMOVHLPSZrr 4U, // VMOVHLPSrr 0U, // VMOVHPDmr 72U, // VMOVHPDrm 0U, // VMOVHPSmr 72U, // VMOVHPSrm 4U, // VMOVLHPSZrr 4U, // VMOVLHPSrr 0U, // VMOVLPDmr 72U, // VMOVLPDrm 0U, // VMOVLPSmr 72U, // VMOVLPSrm 0U, // VMOVMSKPDYrr 0U, // VMOVMSKPDrr 0U, // VMOVMSKPSYrr 0U, // VMOVMSKPSrr 0U, // VMOVNTDQAYrm 0U, // VMOVNTDQAZ128rm 0U, // VMOVNTDQAZ256rm 0U, // VMOVNTDQAZrm 0U, // VMOVNTDQArm 0U, // VMOVNTDQYmr 0U, // VMOVNTDQZ128mr 0U, // VMOVNTDQZ256mr 0U, // VMOVNTDQZmr 0U, // VMOVNTDQmr 0U, // VMOVNTPDYmr 0U, // VMOVNTPDZ128mr 0U, // VMOVNTPDZ256mr 0U, // VMOVNTPDZmr 0U, // VMOVNTPDmr 0U, // VMOVNTPSYmr 0U, // VMOVNTPSZ128mr 0U, // VMOVNTPSZ256mr 0U, // VMOVNTPSZmr 0U, // VMOVNTPSmr 0U, // VMOVPDI2DIZmr 0U, // VMOVPDI2DIZrr 0U, // VMOVPDI2DImr 0U, // VMOVPDI2DIrr 0U, // VMOVPQI2QImr 0U, // VMOVPQI2QIrr 0U, // VMOVPQIto64Zmr 0U, // VMOVPQIto64Zrr 0U, // VMOVPQIto64rm 0U, // VMOVPQIto64rr 0U, // VMOVQI2PQIZrm 0U, // VMOVQI2PQIrm 0U, // VMOVSDZmr 481U, // VMOVSDZmrk 0U, // VMOVSDZrm 4U, // VMOVSDZrr 4U, // VMOVSDZrr_REV 469U, // VMOVSDZrrk 0U, // VMOVSDmr 0U, // VMOVSDrm 4U, // VMOVSDrr 4U, // VMOVSDrr_REV 0U, // VMOVSDto64Zmr 0U, // VMOVSDto64Zrr 0U, // VMOVSDto64mr 0U, // VMOVSDto64rr 0U, // VMOVSHDUPYrm 0U, // VMOVSHDUPYrr 0U, // VMOVSHDUPZrm 0U, // VMOVSHDUPZrr 0U, // VMOVSHDUPrm 0U, // VMOVSHDUPrr 0U, // VMOVSLDUPYrm 0U, // VMOVSLDUPYrr 0U, // VMOVSLDUPZrm 0U, // VMOVSLDUPZrr 0U, // VMOVSLDUPrm 0U, // VMOVSLDUPrr 0U, // VMOVSS2DIZmr 0U, // VMOVSS2DIZrr 0U, // VMOVSS2DImr 0U, // VMOVSS2DIrr 0U, // VMOVSSZmr 481U, // VMOVSSZmrk 0U, // VMOVSSZrm 4U, // VMOVSSZrr 4U, // VMOVSSZrr_REV 469U, // VMOVSSZrrk 0U, // VMOVSSmr 0U, // VMOVSSrm 4U, // VMOVSSrr 4U, // VMOVSSrr_REV 0U, // VMOVUPDYmr 0U, // VMOVUPDYrm 0U, // VMOVUPDYrr 0U, // VMOVUPDYrr_REV 0U, // VMOVUPDZ128mr 481U, // VMOVUPDZ128mrk 0U, // VMOVUPDZ128rm 469U, // VMOVUPDZ128rmk 589U, // VMOVUPDZ128rmkz 0U, // VMOVUPDZ128rr 0U, // VMOVUPDZ128rr_alt 469U, // VMOVUPDZ128rrk 469U, // VMOVUPDZ128rrk_alt 589U, // VMOVUPDZ128rrkz 589U, // VMOVUPDZ128rrkz_alt 0U, // VMOVUPDZ256mr 481U, // VMOVUPDZ256mrk 0U, // VMOVUPDZ256rm 469U, // VMOVUPDZ256rmk 589U, // VMOVUPDZ256rmkz 0U, // VMOVUPDZ256rr 0U, // VMOVUPDZ256rr_alt 469U, // VMOVUPDZ256rrk 469U, // VMOVUPDZ256rrk_alt 589U, // VMOVUPDZ256rrkz 589U, // VMOVUPDZ256rrkz_alt 0U, // VMOVUPDZmr 481U, // VMOVUPDZmrk 0U, // VMOVUPDZrm 469U, // VMOVUPDZrmk 589U, // VMOVUPDZrmkz 0U, // VMOVUPDZrr 0U, // VMOVUPDZrr_alt 469U, // VMOVUPDZrrk 469U, // VMOVUPDZrrk_alt 589U, // VMOVUPDZrrkz 589U, // VMOVUPDZrrkz_alt 0U, // VMOVUPDmr 0U, // VMOVUPDrm 0U, // VMOVUPDrr 0U, // VMOVUPDrr_REV 0U, // VMOVUPSYmr 0U, // VMOVUPSYrm 0U, // VMOVUPSYrr 0U, // VMOVUPSYrr_REV 0U, // VMOVUPSZ128mr 481U, // VMOVUPSZ128mrk 0U, // VMOVUPSZ128rm 469U, // VMOVUPSZ128rmk 589U, // VMOVUPSZ128rmkz 0U, // VMOVUPSZ128rr 0U, // VMOVUPSZ128rr_alt 469U, // VMOVUPSZ128rrk 469U, // VMOVUPSZ128rrk_alt 589U, // VMOVUPSZ128rrkz 589U, // VMOVUPSZ128rrkz_alt 0U, // VMOVUPSZ256mr 481U, // VMOVUPSZ256mrk 0U, // VMOVUPSZ256rm 469U, // VMOVUPSZ256rmk 589U, // VMOVUPSZ256rmkz 0U, // VMOVUPSZ256rr 0U, // VMOVUPSZ256rr_alt 469U, // VMOVUPSZ256rrk 469U, // VMOVUPSZ256rrk_alt 589U, // VMOVUPSZ256rrkz 589U, // VMOVUPSZ256rrkz_alt 0U, // VMOVUPSZmr 481U, // VMOVUPSZmrk 0U, // VMOVUPSZrm 469U, // VMOVUPSZrmk 589U, // VMOVUPSZrmkz 0U, // VMOVUPSZrr 0U, // VMOVUPSZrr_alt 469U, // VMOVUPSZrrk 469U, // VMOVUPSZrrk_alt 589U, // VMOVUPSZrrkz 589U, // VMOVUPSZrrkz_alt 0U, // VMOVUPSmr 0U, // VMOVUPSrm 0U, // VMOVUPSrr 0U, // VMOVUPSrr_REV 0U, // VMOVZPQILo2PQIZrm 0U, // VMOVZPQILo2PQIZrr 0U, // VMOVZPQILo2PQIrm 0U, // VMOVZPQILo2PQIrr 0U, // VMOVZQI2PQIrm 0U, // VMOVZQI2PQIrr 0U, // VMPSADBWYrmi 72U, // VMPSADBWYrri 72U, // VMPSADBWrmi 72U, // VMPSADBWrri 0U, // VMPTRLDm 0U, // VMPTRSTm 0U, // VMREAD32rm 0U, // VMREAD32rr 0U, // VMREAD64rm 0U, // VMREAD64rr 0U, // VMRESUME 0U, // VMRUN32 0U, // VMRUN64 0U, // VMSAVE32 0U, // VMSAVE64 4U, // VMULPDYrm 4U, // VMULPDYrr 324U, // VMULPDZ128rm 4168U, // VMULPDZ128rmb 6533U, // VMULPDZ128rmbk 41032U, // VMULPDZ128rmbkz 0U, // VMULPDZ128rmk 10448U, // VMULPDZ128rmkz 324U, // VMULPDZ128rr 469U, // VMULPDZ128rrk 10448U, // VMULPDZ128rrkz 324U, // VMULPDZ256rm 4168U, // VMULPDZ256rmb 6533U, // VMULPDZ256rmbk 41032U, // VMULPDZ256rmbkz 0U, // VMULPDZ256rmk 10448U, // VMULPDZ256rmkz 324U, // VMULPDZ256rr 469U, // VMULPDZ256rrk 10448U, // VMULPDZ256rrkz 0U, // VMULPDZrb 0U, // VMULPDZrbk 24U, // VMULPDZrbkz 324U, // VMULPDZrm 4168U, // VMULPDZrmb 6533U, // VMULPDZrmbk 41032U, // VMULPDZrmbkz 0U, // VMULPDZrmk 10448U, // VMULPDZrmkz 324U, // VMULPDZrr 469U, // VMULPDZrrk 10448U, // VMULPDZrrkz 4U, // VMULPDrm 4U, // VMULPDrr 4U, // VMULPSYrm 4U, // VMULPSYrr 324U, // VMULPSZ128rm 4168U, // VMULPSZ128rmb 6533U, // VMULPSZ128rmbk 41032U, // VMULPSZ128rmbkz 0U, // VMULPSZ128rmk 10448U, // VMULPSZ128rmkz 324U, // VMULPSZ128rr 469U, // VMULPSZ128rrk 10448U, // VMULPSZ128rrkz 324U, // VMULPSZ256rm 4168U, // VMULPSZ256rmb 6533U, // VMULPSZ256rmbk 41032U, // VMULPSZ256rmbkz 0U, // VMULPSZ256rmk 10448U, // VMULPSZ256rmkz 324U, // VMULPSZ256rr 469U, // VMULPSZ256rrk 10448U, // VMULPSZ256rrkz 0U, // VMULPSZrb 0U, // VMULPSZrbk 24U, // VMULPSZrbkz 324U, // VMULPSZrm 4168U, // VMULPSZrmb 6533U, // VMULPSZrmbk 41032U, // VMULPSZrmbkz 0U, // VMULPSZrmk 10448U, // VMULPSZrmkz 324U, // VMULPSZrr 469U, // VMULPSZrrk 10448U, // VMULPSZrrkz 4U, // VMULPSrm 4U, // VMULPSrr 72U, // VMULSDZrm 324U, // VMULSDZrm_Int 0U, // VMULSDZrm_Intk 10448U, // VMULSDZrm_Intkz 4U, // VMULSDZrr 324U, // VMULSDZrr_Int 469U, // VMULSDZrr_Intk 10448U, // VMULSDZrr_Intkz 0U, // VMULSDZrrb 0U, // VMULSDZrrbk 24U, // VMULSDZrrbkz 72U, // VMULSDrm 72U, // VMULSDrm_Int 4U, // VMULSDrr 4U, // VMULSDrr_Int 72U, // VMULSSZrm 324U, // VMULSSZrm_Int 0U, // VMULSSZrm_Intk 10448U, // VMULSSZrm_Intkz 4U, // VMULSSZrr 324U, // VMULSSZrr_Int 469U, // VMULSSZrr_Intk 10448U, // VMULSSZrr_Intkz 0U, // VMULSSZrrb 0U, // VMULSSZrrbk 24U, // VMULSSZrrbkz 72U, // VMULSSrm 72U, // VMULSSrm_Int 4U, // VMULSSrr 4U, // VMULSSrr_Int 0U, // VMWRITE32rm 0U, // VMWRITE32rr 0U, // VMWRITE64rm 0U, // VMWRITE64rr 0U, // VMXOFF 0U, // VMXON 4U, // VORPDYrm 4U, // VORPDYrr 4U, // VORPDrm 4U, // VORPDrr 4U, // VORPSYrm 4U, // VORPSYrr 4U, // VORPSrm 4U, // VORPSrr 0U, // VPABSBrm128 0U, // VPABSBrm256 0U, // VPABSBrr128 0U, // VPABSBrr256 0U, // VPABSDZrm 0U, // VPABSDZrmb 6352U, // VPABSDZrmbk 10448U, // VPABSDZrmbkz 461U, // VPABSDZrmk 589U, // VPABSDZrmkz 0U, // VPABSDZrr 461U, // VPABSDZrrk 589U, // VPABSDZrrkz 0U, // VPABSDrm128 0U, // VPABSDrm256 0U, // VPABSDrr128 0U, // VPABSDrr256 0U, // VPABSQZrm 0U, // VPABSQZrmb 6352U, // VPABSQZrmbk 10448U, // VPABSQZrmbkz 461U, // VPABSQZrmk 589U, // VPABSQZrmkz 0U, // VPABSQZrr 461U, // VPABSQZrrk 589U, // VPABSQZrrkz 0U, // VPABSWrm128 0U, // VPABSWrm256 0U, // VPABSWrr128 0U, // VPABSWrr256 4U, // VPACKSSDWYrm 4U, // VPACKSSDWYrr 4U, // VPACKSSDWrm 4U, // VPACKSSDWrr 4U, // VPACKSSWBYrm 4U, // VPACKSSWBYrr 4U, // VPACKSSWBrm 4U, // VPACKSSWBrr 4U, // VPACKUSDWYrm 4U, // VPACKUSDWYrr 4U, // VPACKUSDWrm 4U, // VPACKUSDWrr 4U, // VPACKUSWBYrm 4U, // VPACKUSWBYrr 4U, // VPACKUSWBrm 4U, // VPACKUSWBrr 4U, // VPADDBYrm 4U, // VPADDBYrr 324U, // VPADDBZ128rm 0U, // VPADDBZ128rmk 10448U, // VPADDBZ128rmkz 324U, // VPADDBZ128rr 469U, // VPADDBZ128rrk 10448U, // VPADDBZ128rrkz 324U, // VPADDBZ256rm 0U, // VPADDBZ256rmk 10448U, // VPADDBZ256rmkz 324U, // VPADDBZ256rr 469U, // VPADDBZ256rrk 10448U, // VPADDBZ256rrkz 324U, // VPADDBZrm 0U, // VPADDBZrmk 10448U, // VPADDBZrmkz 324U, // VPADDBZrr 469U, // VPADDBZrrk 10448U, // VPADDBZrrkz 4U, // VPADDBrm 4U, // VPADDBrr 4U, // VPADDDYrm 4U, // VPADDDYrr 324U, // VPADDDZ128rm 4168U, // VPADDDZ128rmb 6533U, // VPADDDZ128rmbk 41032U, // VPADDDZ128rmbkz 0U, // VPADDDZ128rmk 10448U, // VPADDDZ128rmkz 324U, // VPADDDZ128rr 469U, // VPADDDZ128rrk 10448U, // VPADDDZ128rrkz 324U, // VPADDDZ256rm 4168U, // VPADDDZ256rmb 6533U, // VPADDDZ256rmbk 41032U, // VPADDDZ256rmbkz 0U, // VPADDDZ256rmk 10448U, // VPADDDZ256rmkz 324U, // VPADDDZ256rr 469U, // VPADDDZ256rrk 10448U, // VPADDDZ256rrkz 324U, // VPADDDZrm 4168U, // VPADDDZrmb 6533U, // VPADDDZrmbk 41032U, // VPADDDZrmbkz 0U, // VPADDDZrmk 10448U, // VPADDDZrmkz 324U, // VPADDDZrr 469U, // VPADDDZrrk 10448U, // VPADDDZrrkz 4U, // VPADDDrm 4U, // VPADDDrr 4U, // VPADDQYrm 4U, // VPADDQYrr 324U, // VPADDQZ128rm 4168U, // VPADDQZ128rmb 6533U, // VPADDQZ128rmbk 41032U, // VPADDQZ128rmbkz 0U, // VPADDQZ128rmk 10448U, // VPADDQZ128rmkz 324U, // VPADDQZ128rr 469U, // VPADDQZ128rrk 10448U, // VPADDQZ128rrkz 324U, // VPADDQZ256rm 4168U, // VPADDQZ256rmb 6533U, // VPADDQZ256rmbk 41032U, // VPADDQZ256rmbkz 0U, // VPADDQZ256rmk 10448U, // VPADDQZ256rmkz 324U, // VPADDQZ256rr 469U, // VPADDQZ256rrk 10448U, // VPADDQZ256rrkz 324U, // VPADDQZrm 4168U, // VPADDQZrmb 6533U, // VPADDQZrmbk 41032U, // VPADDQZrmbkz 0U, // VPADDQZrmk 10448U, // VPADDQZrmkz 324U, // VPADDQZrr 469U, // VPADDQZrrk 10448U, // VPADDQZrrkz 4U, // VPADDQrm 4U, // VPADDQrr 4U, // VPADDSBYrm 4U, // VPADDSBYrr 4U, // VPADDSBrm 4U, // VPADDSBrr 4U, // VPADDSWYrm 4U, // VPADDSWYrr 4U, // VPADDSWrm 4U, // VPADDSWrr 4U, // VPADDUSBYrm 4U, // VPADDUSBYrr 4U, // VPADDUSBrm 4U, // VPADDUSBrr 4U, // VPADDUSWYrm 4U, // VPADDUSWYrr 4U, // VPADDUSWrm 4U, // VPADDUSWrr 4U, // VPADDWYrm 4U, // VPADDWYrr 324U, // VPADDWZ128rm 0U, // VPADDWZ128rmk 10448U, // VPADDWZ128rmkz 324U, // VPADDWZ128rr 469U, // VPADDWZ128rrk 10448U, // VPADDWZ128rrkz 324U, // VPADDWZ256rm 0U, // VPADDWZ256rmk 10448U, // VPADDWZ256rmkz 324U, // VPADDWZ256rr 469U, // VPADDWZ256rrk 10448U, // VPADDWZ256rrkz 324U, // VPADDWZrm 0U, // VPADDWZrmk 10448U, // VPADDWZrmkz 324U, // VPADDWZrr 469U, // VPADDWZrrk 10448U, // VPADDWZrrkz 4U, // VPADDWrm 4U, // VPADDWrr 72U, // VPALIGNR128rm 72U, // VPALIGNR128rr 0U, // VPALIGNR256rm 72U, // VPALIGNR256rr 324U, // VPANDDZ128rm 4168U, // VPANDDZ128rmb 6533U, // VPANDDZ128rmbk 41032U, // VPANDDZ128rmbkz 0U, // VPANDDZ128rmk 10448U, // VPANDDZ128rmkz 324U, // VPANDDZ128rr 469U, // VPANDDZ128rrk 10448U, // VPANDDZ128rrkz 324U, // VPANDDZ256rm 4168U, // VPANDDZ256rmb 6533U, // VPANDDZ256rmbk 41032U, // VPANDDZ256rmbkz 0U, // VPANDDZ256rmk 10448U, // VPANDDZ256rmkz 324U, // VPANDDZ256rr 469U, // VPANDDZ256rrk 10448U, // VPANDDZ256rrkz 324U, // VPANDDZrm 4168U, // VPANDDZrmb 6533U, // VPANDDZrmbk 41032U, // VPANDDZrmbkz 0U, // VPANDDZrmk 10448U, // VPANDDZrmkz 324U, // VPANDDZrr 469U, // VPANDDZrrk 10448U, // VPANDDZrrkz 324U, // VPANDNDZ128rm 4168U, // VPANDNDZ128rmb 6533U, // VPANDNDZ128rmbk 41032U, // VPANDNDZ128rmbkz 0U, // VPANDNDZ128rmk 10448U, // VPANDNDZ128rmkz 324U, // VPANDNDZ128rr 469U, // VPANDNDZ128rrk 10448U, // VPANDNDZ128rrkz 324U, // VPANDNDZ256rm 4168U, // VPANDNDZ256rmb 6533U, // VPANDNDZ256rmbk 41032U, // VPANDNDZ256rmbkz 0U, // VPANDNDZ256rmk 10448U, // VPANDNDZ256rmkz 324U, // VPANDNDZ256rr 469U, // VPANDNDZ256rrk 10448U, // VPANDNDZ256rrkz 324U, // VPANDNDZrm 4168U, // VPANDNDZrmb 6533U, // VPANDNDZrmbk 41032U, // VPANDNDZrmbkz 0U, // VPANDNDZrmk 10448U, // VPANDNDZrmkz 324U, // VPANDNDZrr 469U, // VPANDNDZrrk 10448U, // VPANDNDZrrkz 324U, // VPANDNQZ128rm 4168U, // VPANDNQZ128rmb 6533U, // VPANDNQZ128rmbk 41032U, // VPANDNQZ128rmbkz 0U, // VPANDNQZ128rmk 10448U, // VPANDNQZ128rmkz 324U, // VPANDNQZ128rr 469U, // VPANDNQZ128rrk 10448U, // VPANDNQZ128rrkz 324U, // VPANDNQZ256rm 4168U, // VPANDNQZ256rmb 6533U, // VPANDNQZ256rmbk 41032U, // VPANDNQZ256rmbkz 0U, // VPANDNQZ256rmk 10448U, // VPANDNQZ256rmkz 324U, // VPANDNQZ256rr 469U, // VPANDNQZ256rrk 10448U, // VPANDNQZ256rrkz 324U, // VPANDNQZrm 4168U, // VPANDNQZrmb 6533U, // VPANDNQZrmbk 41032U, // VPANDNQZrmbkz 0U, // VPANDNQZrmk 10448U, // VPANDNQZrmkz 324U, // VPANDNQZrr 469U, // VPANDNQZrrk 10448U, // VPANDNQZrrkz 4U, // VPANDNYrm 4U, // VPANDNYrr 4U, // VPANDNrm 4U, // VPANDNrr 324U, // VPANDQZ128rm 4168U, // VPANDQZ128rmb 6533U, // VPANDQZ128rmbk 41032U, // VPANDQZ128rmbkz 0U, // VPANDQZ128rmk 10448U, // VPANDQZ128rmkz 324U, // VPANDQZ128rr 469U, // VPANDQZ128rrk 10448U, // VPANDQZ128rrkz 324U, // VPANDQZ256rm 4168U, // VPANDQZ256rmb 6533U, // VPANDQZ256rmbk 41032U, // VPANDQZ256rmbkz 0U, // VPANDQZ256rmk 10448U, // VPANDQZ256rmkz 324U, // VPANDQZ256rr 469U, // VPANDQZ256rrk 10448U, // VPANDQZ256rrkz 324U, // VPANDQZrm 4168U, // VPANDQZrmb 6533U, // VPANDQZrmbk 41032U, // VPANDQZrmbkz 0U, // VPANDQZrmk 10448U, // VPANDQZrmkz 324U, // VPANDQZrr 469U, // VPANDQZrrk 10448U, // VPANDQZrrkz 4U, // VPANDYrm 4U, // VPANDYrr 4U, // VPANDrm 4U, // VPANDrr 4U, // VPAVGBYrm 4U, // VPAVGBYrr 4U, // VPAVGBrm 4U, // VPAVGBrr 4U, // VPAVGWYrm 4U, // VPAVGWYrr 4U, // VPAVGWrm 4U, // VPAVGWrr 0U, // VPBLENDDYrmi 72U, // VPBLENDDYrri 72U, // VPBLENDDrmi 72U, // VPBLENDDrri 324U, // VPBLENDMBZ128rm 6352U, // VPBLENDMBZ128rmk 10448U, // VPBLENDMBZ128rmkz 324U, // VPBLENDMBZ128rr 6352U, // VPBLENDMBZ128rrk 10448U, // VPBLENDMBZ128rrkz 324U, // VPBLENDMBZ256rm 6352U, // VPBLENDMBZ256rmk 10448U, // VPBLENDMBZ256rmkz 324U, // VPBLENDMBZ256rr 6352U, // VPBLENDMBZ256rrk 10448U, // VPBLENDMBZ256rrkz 324U, // VPBLENDMBZrm 6352U, // VPBLENDMBZrmk 10448U, // VPBLENDMBZrmkz 324U, // VPBLENDMBZrr 6352U, // VPBLENDMBZrrk 10448U, // VPBLENDMBZrrkz 324U, // VPBLENDMDZ128rm 72U, // VPBLENDMDZ128rmb 73800U, // VPBLENDMDZ128rmbk 6352U, // VPBLENDMDZ128rmk 10448U, // VPBLENDMDZ128rmkz 324U, // VPBLENDMDZ128rr 6352U, // VPBLENDMDZ128rrk 10448U, // VPBLENDMDZ128rrkz 324U, // VPBLENDMDZ256rm 72U, // VPBLENDMDZ256rmb 73800U, // VPBLENDMDZ256rmbk 6352U, // VPBLENDMDZ256rmk 10448U, // VPBLENDMDZ256rmkz 324U, // VPBLENDMDZ256rr 6352U, // VPBLENDMDZ256rrk 10448U, // VPBLENDMDZ256rrkz 324U, // VPBLENDMDZrm 72U, // VPBLENDMDZrmb 73800U, // VPBLENDMDZrmbk 6352U, // VPBLENDMDZrmk 10448U, // VPBLENDMDZrmkz 324U, // VPBLENDMDZrr 6352U, // VPBLENDMDZrrk 10448U, // VPBLENDMDZrrkz 324U, // VPBLENDMQZ128rm 72U, // VPBLENDMQZ128rmb 73800U, // VPBLENDMQZ128rmbk 6352U, // VPBLENDMQZ128rmk 10448U, // VPBLENDMQZ128rmkz 324U, // VPBLENDMQZ128rr 6352U, // VPBLENDMQZ128rrk 10448U, // VPBLENDMQZ128rrkz 324U, // VPBLENDMQZ256rm 72U, // VPBLENDMQZ256rmb 73800U, // VPBLENDMQZ256rmbk 6352U, // VPBLENDMQZ256rmk 10448U, // VPBLENDMQZ256rmkz 324U, // VPBLENDMQZ256rr 6352U, // VPBLENDMQZ256rrk 10448U, // VPBLENDMQZ256rrkz 324U, // VPBLENDMQZrm 72U, // VPBLENDMQZrmb 73800U, // VPBLENDMQZrmbk 6352U, // VPBLENDMQZrmk 10448U, // VPBLENDMQZrmkz 324U, // VPBLENDMQZrr 6352U, // VPBLENDMQZrrk 10448U, // VPBLENDMQZrrkz 324U, // VPBLENDMWZ128rm 6352U, // VPBLENDMWZ128rmk 10448U, // VPBLENDMWZ128rmkz 324U, // VPBLENDMWZ128rr 6352U, // VPBLENDMWZ128rrk 10448U, // VPBLENDMWZ128rrkz 324U, // VPBLENDMWZ256rm 6352U, // VPBLENDMWZ256rmk 10448U, // VPBLENDMWZ256rmkz 324U, // VPBLENDMWZ256rr 6352U, // VPBLENDMWZ256rrk 10448U, // VPBLENDMWZ256rrkz 324U, // VPBLENDMWZrm 6352U, // VPBLENDMWZrmk 10448U, // VPBLENDMWZrmkz 324U, // VPBLENDMWZrr 6352U, // VPBLENDMWZrrk 10448U, // VPBLENDMWZrrkz 0U, // VPBLENDVBYrm 72U, // VPBLENDVBYrr 72U, // VPBLENDVBrm 72U, // VPBLENDVBrr 0U, // VPBLENDWYrmi 72U, // VPBLENDWYrri 72U, // VPBLENDWrmi 72U, // VPBLENDWrri 0U, // VPBROADCASTBYrm 0U, // VPBROADCASTBYrr 28U, // VPBROADCASTBrZ128r 469U, // VPBROADCASTBrZ128rk 589U, // VPBROADCASTBrZ128rkz 28U, // VPBROADCASTBrZ256r 469U, // VPBROADCASTBrZ256rk 589U, // VPBROADCASTBrZ256rkz 28U, // VPBROADCASTBrZr 469U, // VPBROADCASTBrZrk 589U, // VPBROADCASTBrZrkz 0U, // VPBROADCASTBrm 0U, // VPBROADCASTBrr 0U, // VPBROADCASTDYrm 0U, // VPBROADCASTDYrr 10448U, // VPBROADCASTDZkrm 589U, // VPBROADCASTDZkrr 0U, // VPBROADCASTDZrm 0U, // VPBROADCASTDZrr 28U, // VPBROADCASTDrZ128r 469U, // VPBROADCASTDrZ128rk 589U, // VPBROADCASTDrZ128rkz 28U, // VPBROADCASTDrZ256r 469U, // VPBROADCASTDrZ256rk 589U, // VPBROADCASTDrZ256rkz 28U, // VPBROADCASTDrZr 469U, // VPBROADCASTDrZrk 589U, // VPBROADCASTDrZrkz 0U, // VPBROADCASTDrm 0U, // VPBROADCASTDrr 0U, // VPBROADCASTMB2QZ128rr 0U, // VPBROADCASTMB2QZ256rr 0U, // VPBROADCASTMB2QZrr 0U, // VPBROADCASTMW2DZ128rr 0U, // VPBROADCASTMW2DZ256rr 0U, // VPBROADCASTMW2DZrr 0U, // VPBROADCASTQYrm 0U, // VPBROADCASTQYrr 10448U, // VPBROADCASTQZkrm 589U, // VPBROADCASTQZkrr 0U, // VPBROADCASTQZrm 0U, // VPBROADCASTQZrr 28U, // VPBROADCASTQrZ128r 469U, // VPBROADCASTQrZ128rk 589U, // VPBROADCASTQrZ128rkz 28U, // VPBROADCASTQrZ256r 469U, // VPBROADCASTQrZ256rk 589U, // VPBROADCASTQrZ256rkz 28U, // VPBROADCASTQrZr 469U, // VPBROADCASTQrZrk 589U, // VPBROADCASTQrZrkz 0U, // VPBROADCASTQrm 0U, // VPBROADCASTQrr 0U, // VPBROADCASTWYrm 0U, // VPBROADCASTWYrr 28U, // VPBROADCASTWrZ128r 469U, // VPBROADCASTWrZ128rk 589U, // VPBROADCASTWrZ128rkz 28U, // VPBROADCASTWrZ256r 469U, // VPBROADCASTWrZ256rk 589U, // VPBROADCASTWrZ256rkz 28U, // VPBROADCASTWrZr 469U, // VPBROADCASTWrZrk 589U, // VPBROADCASTWrZrkz 0U, // VPBROADCASTWrm 0U, // VPBROADCASTWrr 72U, // VPCLMULQDQrm 72U, // VPCLMULQDQrr 72U, // VPCMOVmr 0U, // VPCMOVmrY 72U, // VPCMOVrm 72U, // VPCMOVrmY 72U, // VPCMOVrr 72U, // VPCMOVrrY 2U, // VPCMPBZ128rmi 72U, // VPCMPBZ128rmi_alt 2U, // VPCMPBZ128rmik 0U, // VPCMPBZ128rmik_alt 2248U, // VPCMPBZ128rri 72U, // VPCMPBZ128rri_alt 73877U, // VPCMPBZ128rrik 73800U, // VPCMPBZ128rrik_alt 2U, // VPCMPBZ256rmi 0U, // VPCMPBZ256rmi_alt 2U, // VPCMPBZ256rmik 0U, // VPCMPBZ256rmik_alt 2248U, // VPCMPBZ256rri 72U, // VPCMPBZ256rri_alt 73877U, // VPCMPBZ256rrik 73800U, // VPCMPBZ256rrik_alt 2U, // VPCMPBZrmi 72U, // VPCMPBZrmi_alt 2U, // VPCMPBZrmik 73800U, // VPCMPBZrmik_alt 2248U, // VPCMPBZrri 72U, // VPCMPBZrri_alt 73877U, // VPCMPBZrrik 73800U, // VPCMPBZrrik_alt 2U, // VPCMPDZ128rmi 72U, // VPCMPDZ128rmi_alt 2284U, // VPCMPDZ128rmib 142U, // VPCMPDZ128rmib_alt 100910U, // VPCMPDZ128rmibk 73878U, // VPCMPDZ128rmibk_alt 2U, // VPCMPDZ128rmik 0U, // VPCMPDZ128rmik_alt 2248U, // VPCMPDZ128rri 72U, // VPCMPDZ128rri_alt 73877U, // VPCMPDZ128rrik 73800U, // VPCMPDZ128rrik_alt 2U, // VPCMPDZ256rmi 0U, // VPCMPDZ256rmi_alt 2288U, // VPCMPDZ256rmib 142U, // VPCMPDZ256rmib_alt 100914U, // VPCMPDZ256rmibk 73878U, // VPCMPDZ256rmibk_alt 2U, // VPCMPDZ256rmik 0U, // VPCMPDZ256rmik_alt 2248U, // VPCMPDZ256rri 72U, // VPCMPDZ256rri_alt 73877U, // VPCMPDZ256rrik 73800U, // VPCMPDZ256rrik_alt 2U, // VPCMPDZrmi 72U, // VPCMPDZrmi_alt 2292U, // VPCMPDZrmib 142U, // VPCMPDZrmib_alt 100918U, // VPCMPDZrmibk 73878U, // VPCMPDZrmibk_alt 2U, // VPCMPDZrmik 73800U, // VPCMPDZrmik_alt 2248U, // VPCMPDZrri 72U, // VPCMPDZrri_alt 73877U, // VPCMPDZrrik 73800U, // VPCMPDZrrik_alt 4U, // VPCMPEQBYrm 4U, // VPCMPEQBYrr 4U, // VPCMPEQBZ128rm 6352U, // VPCMPEQBZ128rmk 4U, // VPCMPEQBZ128rr 6352U, // VPCMPEQBZ128rrk 4U, // VPCMPEQBZ256rm 6352U, // VPCMPEQBZ256rmk 4U, // VPCMPEQBZ256rr 6352U, // VPCMPEQBZ256rrk 4U, // VPCMPEQBZrm 6352U, // VPCMPEQBZrmk 4U, // VPCMPEQBZrr 6352U, // VPCMPEQBZrrk 4U, // VPCMPEQBrm 4U, // VPCMPEQBrr 4U, // VPCMPEQDYrm 4U, // VPCMPEQDYrr 4U, // VPCMPEQDZ128rm 72U, // VPCMPEQDZ128rmb 73800U, // VPCMPEQDZ128rmbk 6352U, // VPCMPEQDZ128rmk 4U, // VPCMPEQDZ128rr 6352U, // VPCMPEQDZ128rrk 4U, // VPCMPEQDZ256rm 72U, // VPCMPEQDZ256rmb 73800U, // VPCMPEQDZ256rmbk 6352U, // VPCMPEQDZ256rmk 4U, // VPCMPEQDZ256rr 6352U, // VPCMPEQDZ256rrk 4U, // VPCMPEQDZrm 72U, // VPCMPEQDZrmb 73800U, // VPCMPEQDZrmbk 6352U, // VPCMPEQDZrmk 4U, // VPCMPEQDZrr 6352U, // VPCMPEQDZrrk 4U, // VPCMPEQDrm 4U, // VPCMPEQDrr 4U, // VPCMPEQQYrm 4U, // VPCMPEQQYrr 4U, // VPCMPEQQZ128rm 72U, // VPCMPEQQZ128rmb 73800U, // VPCMPEQQZ128rmbk 6352U, // VPCMPEQQZ128rmk 4U, // VPCMPEQQZ128rr 6352U, // VPCMPEQQZ128rrk 4U, // VPCMPEQQZ256rm 72U, // VPCMPEQQZ256rmb 73800U, // VPCMPEQQZ256rmbk 6352U, // VPCMPEQQZ256rmk 4U, // VPCMPEQQZ256rr 6352U, // VPCMPEQQZ256rrk 4U, // VPCMPEQQZrm 72U, // VPCMPEQQZrmb 73800U, // VPCMPEQQZrmbk 6352U, // VPCMPEQQZrmk 4U, // VPCMPEQQZrr 6352U, // VPCMPEQQZrrk 4U, // VPCMPEQQrm 4U, // VPCMPEQQrr 4U, // VPCMPEQWYrm 4U, // VPCMPEQWYrr 4U, // VPCMPEQWZ128rm 6352U, // VPCMPEQWZ128rmk 4U, // VPCMPEQWZ128rr 6352U, // VPCMPEQWZ128rrk 4U, // VPCMPEQWZ256rm 6352U, // VPCMPEQWZ256rmk 4U, // VPCMPEQWZ256rr 6352U, // VPCMPEQWZ256rrk 4U, // VPCMPEQWZrm 6352U, // VPCMPEQWZrmk 4U, // VPCMPEQWZrr 6352U, // VPCMPEQWZrrk 4U, // VPCMPEQWrm 4U, // VPCMPEQWrr 0U, // VPCMPESTRIMEM 0U, // VPCMPESTRIREG 0U, // VPCMPESTRIrm 4U, // VPCMPESTRIrr 0U, // VPCMPESTRM128MEM 0U, // VPCMPESTRM128REG 0U, // VPCMPESTRM128rm 4U, // VPCMPESTRM128rr 4U, // VPCMPGTBYrm 4U, // VPCMPGTBYrr 4U, // VPCMPGTBZ128rm 6352U, // VPCMPGTBZ128rmk 4U, // VPCMPGTBZ128rr 6352U, // VPCMPGTBZ128rrk 4U, // VPCMPGTBZ256rm 6352U, // VPCMPGTBZ256rmk 4U, // VPCMPGTBZ256rr 6352U, // VPCMPGTBZ256rrk 4U, // VPCMPGTBZrm 6352U, // VPCMPGTBZrmk 4U, // VPCMPGTBZrr 6352U, // VPCMPGTBZrrk 4U, // VPCMPGTBrm 4U, // VPCMPGTBrr 4U, // VPCMPGTDYrm 4U, // VPCMPGTDYrr 4U, // VPCMPGTDZ128rm 72U, // VPCMPGTDZ128rmb 73800U, // VPCMPGTDZ128rmbk 6352U, // VPCMPGTDZ128rmk 4U, // VPCMPGTDZ128rr 6352U, // VPCMPGTDZ128rrk 4U, // VPCMPGTDZ256rm 72U, // VPCMPGTDZ256rmb 73800U, // VPCMPGTDZ256rmbk 6352U, // VPCMPGTDZ256rmk 4U, // VPCMPGTDZ256rr 6352U, // VPCMPGTDZ256rrk 4U, // VPCMPGTDZrm 72U, // VPCMPGTDZrmb 73800U, // VPCMPGTDZrmbk 6352U, // VPCMPGTDZrmk 4U, // VPCMPGTDZrr 6352U, // VPCMPGTDZrrk 4U, // VPCMPGTDrm 4U, // VPCMPGTDrr 4U, // VPCMPGTQYrm 4U, // VPCMPGTQYrr 4U, // VPCMPGTQZ128rm 72U, // VPCMPGTQZ128rmb 73800U, // VPCMPGTQZ128rmbk 6352U, // VPCMPGTQZ128rmk 4U, // VPCMPGTQZ128rr 6352U, // VPCMPGTQZ128rrk 4U, // VPCMPGTQZ256rm 72U, // VPCMPGTQZ256rmb 73800U, // VPCMPGTQZ256rmbk 6352U, // VPCMPGTQZ256rmk 4U, // VPCMPGTQZ256rr 6352U, // VPCMPGTQZ256rrk 4U, // VPCMPGTQZrm 72U, // VPCMPGTQZrmb 73800U, // VPCMPGTQZrmbk 6352U, // VPCMPGTQZrmk 4U, // VPCMPGTQZrr 6352U, // VPCMPGTQZrrk 4U, // VPCMPGTQrm 4U, // VPCMPGTQrr 4U, // VPCMPGTWYrm 4U, // VPCMPGTWYrr 4U, // VPCMPGTWZ128rm 6352U, // VPCMPGTWZ128rmk 4U, // VPCMPGTWZ128rr 6352U, // VPCMPGTWZ128rrk 4U, // VPCMPGTWZ256rm 6352U, // VPCMPGTWZ256rmk 4U, // VPCMPGTWZ256rr 6352U, // VPCMPGTWZ256rrk 4U, // VPCMPGTWZrm 6352U, // VPCMPGTWZrmk 4U, // VPCMPGTWZrr 6352U, // VPCMPGTWZrrk 4U, // VPCMPGTWrm 4U, // VPCMPGTWrr 0U, // VPCMPISTRIMEM 0U, // VPCMPISTRIREG 0U, // VPCMPISTRIrm 4U, // VPCMPISTRIrr 0U, // VPCMPISTRM128MEM 0U, // VPCMPISTRM128REG 0U, // VPCMPISTRM128rm 4U, // VPCMPISTRM128rr 2U, // VPCMPQZ128rmi 72U, // VPCMPQZ128rmi_alt 2296U, // VPCMPQZ128rmib 142U, // VPCMPQZ128rmib_alt 100922U, // VPCMPQZ128rmibk 73878U, // VPCMPQZ128rmibk_alt 2U, // VPCMPQZ128rmik 0U, // VPCMPQZ128rmik_alt 2248U, // VPCMPQZ128rri 72U, // VPCMPQZ128rri_alt 73877U, // VPCMPQZ128rrik 73800U, // VPCMPQZ128rrik_alt 2U, // VPCMPQZ256rmi 0U, // VPCMPQZ256rmi_alt 2284U, // VPCMPQZ256rmib 142U, // VPCMPQZ256rmib_alt 100910U, // VPCMPQZ256rmibk 73878U, // VPCMPQZ256rmibk_alt 2U, // VPCMPQZ256rmik 0U, // VPCMPQZ256rmik_alt 2248U, // VPCMPQZ256rri 72U, // VPCMPQZ256rri_alt 73877U, // VPCMPQZ256rrik 73800U, // VPCMPQZ256rrik_alt 2U, // VPCMPQZrmi 72U, // VPCMPQZrmi_alt 2288U, // VPCMPQZrmib 142U, // VPCMPQZrmib_alt 100914U, // VPCMPQZrmibk 73878U, // VPCMPQZrmibk_alt 2U, // VPCMPQZrmik 73800U, // VPCMPQZrmik_alt 2248U, // VPCMPQZrri 72U, // VPCMPQZrri_alt 73877U, // VPCMPQZrrik 73800U, // VPCMPQZrrik_alt 2U, // VPCMPUBZ128rmi 72U, // VPCMPUBZ128rmi_alt 2U, // VPCMPUBZ128rmik 0U, // VPCMPUBZ128rmik_alt 2248U, // VPCMPUBZ128rri 72U, // VPCMPUBZ128rri_alt 73877U, // VPCMPUBZ128rrik 73800U, // VPCMPUBZ128rrik_alt 2U, // VPCMPUBZ256rmi 0U, // VPCMPUBZ256rmi_alt 2U, // VPCMPUBZ256rmik 0U, // VPCMPUBZ256rmik_alt 2248U, // VPCMPUBZ256rri 72U, // VPCMPUBZ256rri_alt 73877U, // VPCMPUBZ256rrik 73800U, // VPCMPUBZ256rrik_alt 2U, // VPCMPUBZrmi 72U, // VPCMPUBZrmi_alt 2U, // VPCMPUBZrmik 73800U, // VPCMPUBZrmik_alt 2248U, // VPCMPUBZrri 72U, // VPCMPUBZrri_alt 73877U, // VPCMPUBZrrik 73800U, // VPCMPUBZrrik_alt 2U, // VPCMPUDZ128rmi 72U, // VPCMPUDZ128rmi_alt 2284U, // VPCMPUDZ128rmib 142U, // VPCMPUDZ128rmib_alt 100910U, // VPCMPUDZ128rmibk 73878U, // VPCMPUDZ128rmibk_alt 2U, // VPCMPUDZ128rmik 0U, // VPCMPUDZ128rmik_alt 2248U, // VPCMPUDZ128rri 72U, // VPCMPUDZ128rri_alt 73877U, // VPCMPUDZ128rrik 73800U, // VPCMPUDZ128rrik_alt 2U, // VPCMPUDZ256rmi 0U, // VPCMPUDZ256rmi_alt 2288U, // VPCMPUDZ256rmib 142U, // VPCMPUDZ256rmib_alt 100914U, // VPCMPUDZ256rmibk 73878U, // VPCMPUDZ256rmibk_alt 2U, // VPCMPUDZ256rmik 0U, // VPCMPUDZ256rmik_alt 2248U, // VPCMPUDZ256rri 72U, // VPCMPUDZ256rri_alt 73877U, // VPCMPUDZ256rrik 73800U, // VPCMPUDZ256rrik_alt 2U, // VPCMPUDZrmi 72U, // VPCMPUDZrmi_alt 2292U, // VPCMPUDZrmib 142U, // VPCMPUDZrmib_alt 100918U, // VPCMPUDZrmibk 73878U, // VPCMPUDZrmibk_alt 2U, // VPCMPUDZrmik 73800U, // VPCMPUDZrmik_alt 2248U, // VPCMPUDZrri 72U, // VPCMPUDZrri_alt 73877U, // VPCMPUDZrrik 73800U, // VPCMPUDZrrik_alt 2U, // VPCMPUQZ128rmi 72U, // VPCMPUQZ128rmi_alt 2296U, // VPCMPUQZ128rmib 142U, // VPCMPUQZ128rmib_alt 100922U, // VPCMPUQZ128rmibk 73878U, // VPCMPUQZ128rmibk_alt 2U, // VPCMPUQZ128rmik 0U, // VPCMPUQZ128rmik_alt 2248U, // VPCMPUQZ128rri 72U, // VPCMPUQZ128rri_alt 73877U, // VPCMPUQZ128rrik 73800U, // VPCMPUQZ128rrik_alt 2U, // VPCMPUQZ256rmi 0U, // VPCMPUQZ256rmi_alt 2284U, // VPCMPUQZ256rmib 142U, // VPCMPUQZ256rmib_alt 100910U, // VPCMPUQZ256rmibk 73878U, // VPCMPUQZ256rmibk_alt 2U, // VPCMPUQZ256rmik 0U, // VPCMPUQZ256rmik_alt 2248U, // VPCMPUQZ256rri 72U, // VPCMPUQZ256rri_alt 73877U, // VPCMPUQZ256rrik 73800U, // VPCMPUQZ256rrik_alt 2U, // VPCMPUQZrmi 72U, // VPCMPUQZrmi_alt 2288U, // VPCMPUQZrmib 142U, // VPCMPUQZrmib_alt 100914U, // VPCMPUQZrmibk 73878U, // VPCMPUQZrmibk_alt 2U, // VPCMPUQZrmik 73800U, // VPCMPUQZrmik_alt 2248U, // VPCMPUQZrri 72U, // VPCMPUQZrri_alt 73877U, // VPCMPUQZrrik 73800U, // VPCMPUQZrrik_alt 2U, // VPCMPUWZ128rmi 72U, // VPCMPUWZ128rmi_alt 2U, // VPCMPUWZ128rmik 0U, // VPCMPUWZ128rmik_alt 2248U, // VPCMPUWZ128rri 72U, // VPCMPUWZ128rri_alt 73877U, // VPCMPUWZ128rrik 73800U, // VPCMPUWZ128rrik_alt 2U, // VPCMPUWZ256rmi 0U, // VPCMPUWZ256rmi_alt 2U, // VPCMPUWZ256rmik 0U, // VPCMPUWZ256rmik_alt 2248U, // VPCMPUWZ256rri 72U, // VPCMPUWZ256rri_alt 73877U, // VPCMPUWZ256rrik 73800U, // VPCMPUWZ256rrik_alt 2U, // VPCMPUWZrmi 72U, // VPCMPUWZrmi_alt 2U, // VPCMPUWZrmik 73800U, // VPCMPUWZrmik_alt 2248U, // VPCMPUWZrri 72U, // VPCMPUWZrri_alt 73877U, // VPCMPUWZrrik 73800U, // VPCMPUWZrrik_alt 2U, // VPCMPWZ128rmi 72U, // VPCMPWZ128rmi_alt 2U, // VPCMPWZ128rmik 0U, // VPCMPWZ128rmik_alt 2248U, // VPCMPWZ128rri 72U, // VPCMPWZ128rri_alt 73877U, // VPCMPWZ128rrik 73800U, // VPCMPWZ128rrik_alt 2U, // VPCMPWZ256rmi 0U, // VPCMPWZ256rmi_alt 2U, // VPCMPWZ256rmik 0U, // VPCMPWZ256rmik_alt 2248U, // VPCMPWZ256rri 72U, // VPCMPWZ256rri_alt 73877U, // VPCMPWZ256rrik 73800U, // VPCMPWZ256rrik_alt 2U, // VPCMPWZrmi 72U, // VPCMPWZrmi_alt 2U, // VPCMPWZrmik 73800U, // VPCMPWZrmik_alt 2248U, // VPCMPWZrri 72U, // VPCMPWZrri_alt 73877U, // VPCMPWZrrik 73800U, // VPCMPWZrrik_alt 2U, // VPCOMBmi 72U, // VPCOMBmi_alt 2248U, // VPCOMBri 72U, // VPCOMBri_alt 2U, // VPCOMDmi 72U, // VPCOMDmi_alt 2248U, // VPCOMDri 72U, // VPCOMDri_alt 673U, // VPCOMPRESSDZ128mrk 661U, // VPCOMPRESSDZ128rrk 589U, // VPCOMPRESSDZ128rrkz 673U, // VPCOMPRESSDZ256mrk 661U, // VPCOMPRESSDZ256rrk 589U, // VPCOMPRESSDZ256rrkz 673U, // VPCOMPRESSDZmrk 661U, // VPCOMPRESSDZrrk 589U, // VPCOMPRESSDZrrkz 673U, // VPCOMPRESSQZ128mrk 661U, // VPCOMPRESSQZ128rrk 589U, // VPCOMPRESSQZ128rrkz 673U, // VPCOMPRESSQZ256mrk 661U, // VPCOMPRESSQZ256rrk 589U, // VPCOMPRESSQZ256rrkz 673U, // VPCOMPRESSQZmrk 661U, // VPCOMPRESSQZrrk 589U, // VPCOMPRESSQZrrkz 2U, // VPCOMQmi 72U, // VPCOMQmi_alt 2248U, // VPCOMQri 72U, // VPCOMQri_alt 2U, // VPCOMUBmi 72U, // VPCOMUBmi_alt 2248U, // VPCOMUBri 72U, // VPCOMUBri_alt 2U, // VPCOMUDmi 72U, // VPCOMUDmi_alt 2248U, // VPCOMUDri 72U, // VPCOMUDri_alt 2U, // VPCOMUQmi 72U, // VPCOMUQmi_alt 2248U, // VPCOMUQri 72U, // VPCOMUQri_alt 2U, // VPCOMUWmi 72U, // VPCOMUWmi_alt 2248U, // VPCOMUWri 72U, // VPCOMUWri_alt 2U, // VPCOMWmi 72U, // VPCOMWmi_alt 2248U, // VPCOMWri 72U, // VPCOMWri_alt 0U, // VPCONFLICTDrm 0U, // VPCONFLICTDrmb 6672U, // VPCONFLICTDrmbk 10448U, // VPCONFLICTDrmbkz 469U, // VPCONFLICTDrmk 589U, // VPCONFLICTDrmkz 28U, // VPCONFLICTDrr 469U, // VPCONFLICTDrrk 589U, // VPCONFLICTDrrkz 0U, // VPCONFLICTQrm 0U, // VPCONFLICTQrmb 6672U, // VPCONFLICTQrmbk 10448U, // VPCONFLICTQrmbkz 469U, // VPCONFLICTQrmk 589U, // VPCONFLICTQrmkz 28U, // VPCONFLICTQrr 469U, // VPCONFLICTQrrk 589U, // VPCONFLICTQrrkz 0U, // VPERM2F128rm 72U, // VPERM2F128rr 0U, // VPERM2I128rm 72U, // VPERM2I128rr 4U, // VPERMDYrm 4U, // VPERMDYrr 4U, // VPERMDZrm 4U, // VPERMDZrr 0U, // VPERMI2Drm 0U, // VPERMI2Drmk 0U, // VPERMI2Drmkz 0U, // VPERMI2Drr 469U, // VPERMI2Drrk 981U, // VPERMI2Drrkz 0U, // VPERMI2PDrm 0U, // VPERMI2PDrmk 0U, // VPERMI2PDrmkz 0U, // VPERMI2PDrr 469U, // VPERMI2PDrrk 981U, // VPERMI2PDrrkz 0U, // VPERMI2PSrm 0U, // VPERMI2PSrmk 0U, // VPERMI2PSrmkz 0U, // VPERMI2PSrr 469U, // VPERMI2PSrrk 981U, // VPERMI2PSrrkz 0U, // VPERMI2Qrm 0U, // VPERMI2Qrmk 0U, // VPERMI2Qrmkz 0U, // VPERMI2Qrr 469U, // VPERMI2Qrrk 981U, // VPERMI2Qrrkz 140U, // VPERMIL2PDmr 1U, // VPERMIL2PDmrY 72U, // VPERMIL2PDrm 0U, // VPERMIL2PDrmY 72U, // VPERMIL2PDrr 72U, // VPERMIL2PDrrY 140U, // VPERMIL2PSmr 1U, // VPERMIL2PSmrY 72U, // VPERMIL2PSrm 0U, // VPERMIL2PSrmY 72U, // VPERMIL2PSrr 72U, // VPERMIL2PSrrY 0U, // VPERMILPDYmi 4U, // VPERMILPDYri 4U, // VPERMILPDYrm 4U, // VPERMILPDYrr 0U, // VPERMILPDZmi 4U, // VPERMILPDZri 4U, // VPERMILPDZrm 4U, // VPERMILPDZrr 0U, // VPERMILPDmi 4U, // VPERMILPDri 4U, // VPERMILPDrm 4U, // VPERMILPDrr 0U, // VPERMILPSYmi 4U, // VPERMILPSYri 4U, // VPERMILPSYrm 4U, // VPERMILPSYrr 0U, // VPERMILPSZmi 4U, // VPERMILPSZri 4U, // VPERMILPSZrm 4U, // VPERMILPSZrr 0U, // VPERMILPSmi 4U, // VPERMILPSri 4U, // VPERMILPSrm 4U, // VPERMILPSrr 0U, // VPERMPDYmi 4U, // VPERMPDYri 0U, // VPERMPDZmi 4U, // VPERMPDZri 4U, // VPERMPDZrm 4U, // VPERMPDZrr 4U, // VPERMPSYrm 4U, // VPERMPSYrr 4U, // VPERMPSZrm 4U, // VPERMPSZrr 0U, // VPERMQYmi 4U, // VPERMQYri 0U, // VPERMQZmi 4U, // VPERMQZri 4U, // VPERMQZrm 4U, // VPERMQZrr 0U, // VPERMT2Drm 0U, // VPERMT2Drmk 0U, // VPERMT2Drmkz 0U, // VPERMT2Drr 469U, // VPERMT2Drrk 981U, // VPERMT2Drrkz 0U, // VPERMT2PDrm 0U, // VPERMT2PDrmk 0U, // VPERMT2PDrmkz 0U, // VPERMT2PDrr 469U, // VPERMT2PDrrk 981U, // VPERMT2PDrrkz 0U, // VPERMT2PSrm 0U, // VPERMT2PSrmk 0U, // VPERMT2PSrmkz 0U, // VPERMT2PSrr 469U, // VPERMT2PSrrk 981U, // VPERMT2PSrrkz 0U, // VPERMT2Qrm 0U, // VPERMT2Qrmk 0U, // VPERMT2Qrmkz 0U, // VPERMT2Qrr 469U, // VPERMT2Qrrk 981U, // VPERMT2Qrrkz 661U, // VPEXPANDDZ128rmk 589U, // VPEXPANDDZ128rmkz 661U, // VPEXPANDDZ128rrk 589U, // VPEXPANDDZ128rrkz 661U, // VPEXPANDDZ256rmk 589U, // VPEXPANDDZ256rmkz 661U, // VPEXPANDDZ256rrk 589U, // VPEXPANDDZ256rrkz 661U, // VPEXPANDDZrmk 589U, // VPEXPANDDZrmkz 661U, // VPEXPANDDZrrk 589U, // VPEXPANDDZrrkz 661U, // VPEXPANDQZ128rmk 589U, // VPEXPANDQZ128rmkz 661U, // VPEXPANDQZ128rrk 589U, // VPEXPANDQZ128rrkz 661U, // VPEXPANDQZ256rmk 589U, // VPEXPANDQZ256rmkz 661U, // VPEXPANDQZ256rrk 589U, // VPEXPANDQZ256rrkz 661U, // VPEXPANDQZrmk 589U, // VPEXPANDQZrmkz 661U, // VPEXPANDQZrrk 589U, // VPEXPANDQZrrkz 1U, // VPEXTRBmr 4U, // VPEXTRBrr 1U, // VPEXTRDmr 4U, // VPEXTRDrr 1U, // VPEXTRQmr 4U, // VPEXTRQrr 1U, // VPEXTRWmr 4U, // VPEXTRWri 4U, // VPEXTRWrr_REV 4U, // VPGATHERDDYrm 848U, // VPGATHERDDZrm 4U, // VPGATHERDDrm 4U, // VPGATHERDQYrm 848U, // VPGATHERDQZrm 4U, // VPGATHERDQrm 4U, // VPGATHERQDYrm 848U, // VPGATHERQDZrm 4U, // VPGATHERQDrm 4U, // VPGATHERQQYrm 848U, // VPGATHERQQZrm 4U, // VPGATHERQQrm 0U, // VPHADDBDrm 0U, // VPHADDBDrr 0U, // VPHADDBQrm 0U, // VPHADDBQrr 0U, // VPHADDBWrm 0U, // VPHADDBWrr 0U, // VPHADDDQrm 0U, // VPHADDDQrr 4U, // VPHADDDYrm 4U, // VPHADDDYrr 4U, // VPHADDDrm 4U, // VPHADDDrr 4U, // VPHADDSWrm128 4U, // VPHADDSWrm256 4U, // VPHADDSWrr128 4U, // VPHADDSWrr256 0U, // VPHADDUBDrm 0U, // VPHADDUBDrr 0U, // VPHADDUBQrm 0U, // VPHADDUBQrr 0U, // VPHADDUBWrm 0U, // VPHADDUBWrr 0U, // VPHADDUDQrm 0U, // VPHADDUDQrr 0U, // VPHADDUWDrm 0U, // VPHADDUWDrr 0U, // VPHADDUWQrm 0U, // VPHADDUWQrr 0U, // VPHADDWDrm 0U, // VPHADDWDrr 0U, // VPHADDWQrm 0U, // VPHADDWQrr 4U, // VPHADDWYrm 4U, // VPHADDWYrr 4U, // VPHADDWrm 4U, // VPHADDWrr 0U, // VPHMINPOSUWrm128 0U, // VPHMINPOSUWrr128 0U, // VPHSUBBWrm 0U, // VPHSUBBWrr 0U, // VPHSUBDQrm 0U, // VPHSUBDQrr 4U, // VPHSUBDYrm 4U, // VPHSUBDYrr 4U, // VPHSUBDrm 4U, // VPHSUBDrr 4U, // VPHSUBSWrm128 4U, // VPHSUBSWrm256 4U, // VPHSUBSWrr128 4U, // VPHSUBSWrr256 0U, // VPHSUBWDrm 0U, // VPHSUBWDrr 4U, // VPHSUBWYrm 4U, // VPHSUBWYrr 4U, // VPHSUBWrm 4U, // VPHSUBWrr 72U, // VPINSRBrm 72U, // VPINSRBrr 140U, // VPINSRDrm 72U, // VPINSRDrr 140U, // VPINSRQrm 72U, // VPINSRQrr 72U, // VPINSRWrmi 72U, // VPINSRWrri 0U, // VPLZCNTDrm 0U, // VPLZCNTDrmb 6672U, // VPLZCNTDrmbk 10448U, // VPLZCNTDrmbkz 469U, // VPLZCNTDrmk 589U, // VPLZCNTDrmkz 28U, // VPLZCNTDrr 469U, // VPLZCNTDrrk 589U, // VPLZCNTDrrkz 0U, // VPLZCNTQrm 0U, // VPLZCNTQrmb 6672U, // VPLZCNTQrmbk 10448U, // VPLZCNTQrmbkz 469U, // VPLZCNTQrmk 589U, // VPLZCNTQrmkz 28U, // VPLZCNTQrr 469U, // VPLZCNTQrrk 589U, // VPLZCNTQrrkz 72U, // VPMACSDDrm 72U, // VPMACSDDrr 72U, // VPMACSDQHrm 72U, // VPMACSDQHrr 72U, // VPMACSDQLrm 72U, // VPMACSDQLrr 72U, // VPMACSSDDrm 72U, // VPMACSSDDrr 72U, // VPMACSSDQHrm 72U, // VPMACSSDQHrr 72U, // VPMACSSDQLrm 72U, // VPMACSSDQLrr 72U, // VPMACSSWDrm 72U, // VPMACSSWDrr 72U, // VPMACSSWWrm 72U, // VPMACSSWWrr 72U, // VPMACSWDrm 72U, // VPMACSWDrr 72U, // VPMACSWWrm 72U, // VPMACSWWrr 72U, // VPMADCSSWDrm 72U, // VPMADCSSWDrr 72U, // VPMADCSWDrm 72U, // VPMADCSWDrr 4U, // VPMADDUBSWrm128 4U, // VPMADDUBSWrm256 4U, // VPMADDUBSWrr128 4U, // VPMADDUBSWrr256 4U, // VPMADDWDYrm 4U, // VPMADDWDYrr 4U, // VPMADDWDrm 4U, // VPMADDWDrr 2U, // VPMASKMOVDYmr 4U, // VPMASKMOVDYrm 2U, // VPMASKMOVDmr 4U, // VPMASKMOVDrm 2U, // VPMASKMOVQYmr 4U, // VPMASKMOVQYrm 2U, // VPMASKMOVQmr 4U, // VPMASKMOVQrm 4U, // VPMAXSBYrm 4U, // VPMAXSBYrr 324U, // VPMAXSBZ128rm 0U, // VPMAXSBZ128rmk 10448U, // VPMAXSBZ128rmkz 324U, // VPMAXSBZ128rr 469U, // VPMAXSBZ128rrk 10448U, // VPMAXSBZ128rrkz 324U, // VPMAXSBZ256rm 0U, // VPMAXSBZ256rmk 10448U, // VPMAXSBZ256rmkz 324U, // VPMAXSBZ256rr 469U, // VPMAXSBZ256rrk 10448U, // VPMAXSBZ256rrkz 324U, // VPMAXSBZrm 0U, // VPMAXSBZrmk 10448U, // VPMAXSBZrmkz 324U, // VPMAXSBZrr 469U, // VPMAXSBZrrk 10448U, // VPMAXSBZrrkz 4U, // VPMAXSBrm 4U, // VPMAXSBrr 4U, // VPMAXSDYrm 4U, // VPMAXSDYrr 324U, // VPMAXSDZ128rm 4168U, // VPMAXSDZ128rmb 6533U, // VPMAXSDZ128rmbk 41032U, // VPMAXSDZ128rmbkz 0U, // VPMAXSDZ128rmk 10448U, // VPMAXSDZ128rmkz 324U, // VPMAXSDZ128rr 469U, // VPMAXSDZ128rrk 10448U, // VPMAXSDZ128rrkz 324U, // VPMAXSDZ256rm 4168U, // VPMAXSDZ256rmb 6533U, // VPMAXSDZ256rmbk 41032U, // VPMAXSDZ256rmbkz 0U, // VPMAXSDZ256rmk 10448U, // VPMAXSDZ256rmkz 324U, // VPMAXSDZ256rr 469U, // VPMAXSDZ256rrk 10448U, // VPMAXSDZ256rrkz 324U, // VPMAXSDZrm 4168U, // VPMAXSDZrmb 6533U, // VPMAXSDZrmbk 41032U, // VPMAXSDZrmbkz 0U, // VPMAXSDZrmk 10448U, // VPMAXSDZrmkz 324U, // VPMAXSDZrr 469U, // VPMAXSDZrrk 10448U, // VPMAXSDZrrkz 4U, // VPMAXSDrm 4U, // VPMAXSDrr 324U, // VPMAXSQZ128rm 4168U, // VPMAXSQZ128rmb 6533U, // VPMAXSQZ128rmbk 41032U, // VPMAXSQZ128rmbkz 0U, // VPMAXSQZ128rmk 10448U, // VPMAXSQZ128rmkz 324U, // VPMAXSQZ128rr 469U, // VPMAXSQZ128rrk 10448U, // VPMAXSQZ128rrkz 324U, // VPMAXSQZ256rm 4168U, // VPMAXSQZ256rmb 6533U, // VPMAXSQZ256rmbk 41032U, // VPMAXSQZ256rmbkz 0U, // VPMAXSQZ256rmk 10448U, // VPMAXSQZ256rmkz 324U, // VPMAXSQZ256rr 469U, // VPMAXSQZ256rrk 10448U, // VPMAXSQZ256rrkz 324U, // VPMAXSQZrm 4168U, // VPMAXSQZrmb 6533U, // VPMAXSQZrmbk 41032U, // VPMAXSQZrmbkz 0U, // VPMAXSQZrmk 10448U, // VPMAXSQZrmkz 324U, // VPMAXSQZrr 469U, // VPMAXSQZrrk 10448U, // VPMAXSQZrrkz 4U, // VPMAXSWYrm 4U, // VPMAXSWYrr 324U, // VPMAXSWZ128rm 0U, // VPMAXSWZ128rmk 10448U, // VPMAXSWZ128rmkz 324U, // VPMAXSWZ128rr 469U, // VPMAXSWZ128rrk 10448U, // VPMAXSWZ128rrkz 324U, // VPMAXSWZ256rm 0U, // VPMAXSWZ256rmk 10448U, // VPMAXSWZ256rmkz 324U, // VPMAXSWZ256rr 469U, // VPMAXSWZ256rrk 10448U, // VPMAXSWZ256rrkz 324U, // VPMAXSWZrm 0U, // VPMAXSWZrmk 10448U, // VPMAXSWZrmkz 324U, // VPMAXSWZrr 469U, // VPMAXSWZrrk 10448U, // VPMAXSWZrrkz 4U, // VPMAXSWrm 4U, // VPMAXSWrr 4U, // VPMAXUBYrm 4U, // VPMAXUBYrr 324U, // VPMAXUBZ128rm 0U, // VPMAXUBZ128rmk 10448U, // VPMAXUBZ128rmkz 324U, // VPMAXUBZ128rr 469U, // VPMAXUBZ128rrk 10448U, // VPMAXUBZ128rrkz 324U, // VPMAXUBZ256rm 0U, // VPMAXUBZ256rmk 10448U, // VPMAXUBZ256rmkz 324U, // VPMAXUBZ256rr 469U, // VPMAXUBZ256rrk 10448U, // VPMAXUBZ256rrkz 324U, // VPMAXUBZrm 0U, // VPMAXUBZrmk 10448U, // VPMAXUBZrmkz 324U, // VPMAXUBZrr 469U, // VPMAXUBZrrk 10448U, // VPMAXUBZrrkz 4U, // VPMAXUBrm 4U, // VPMAXUBrr 4U, // VPMAXUDYrm 4U, // VPMAXUDYrr 324U, // VPMAXUDZ128rm 4168U, // VPMAXUDZ128rmb 6533U, // VPMAXUDZ128rmbk 41032U, // VPMAXUDZ128rmbkz 0U, // VPMAXUDZ128rmk 10448U, // VPMAXUDZ128rmkz 324U, // VPMAXUDZ128rr 469U, // VPMAXUDZ128rrk 10448U, // VPMAXUDZ128rrkz 324U, // VPMAXUDZ256rm 4168U, // VPMAXUDZ256rmb 6533U, // VPMAXUDZ256rmbk 41032U, // VPMAXUDZ256rmbkz 0U, // VPMAXUDZ256rmk 10448U, // VPMAXUDZ256rmkz 324U, // VPMAXUDZ256rr 469U, // VPMAXUDZ256rrk 10448U, // VPMAXUDZ256rrkz 324U, // VPMAXUDZrm 4168U, // VPMAXUDZrmb 6533U, // VPMAXUDZrmbk 41032U, // VPMAXUDZrmbkz 0U, // VPMAXUDZrmk 10448U, // VPMAXUDZrmkz 324U, // VPMAXUDZrr 469U, // VPMAXUDZrrk 10448U, // VPMAXUDZrrkz 4U, // VPMAXUDrm 4U, // VPMAXUDrr 324U, // VPMAXUQZ128rm 4168U, // VPMAXUQZ128rmb 6533U, // VPMAXUQZ128rmbk 41032U, // VPMAXUQZ128rmbkz 0U, // VPMAXUQZ128rmk 10448U, // VPMAXUQZ128rmkz 324U, // VPMAXUQZ128rr 469U, // VPMAXUQZ128rrk 10448U, // VPMAXUQZ128rrkz 324U, // VPMAXUQZ256rm 4168U, // VPMAXUQZ256rmb 6533U, // VPMAXUQZ256rmbk 41032U, // VPMAXUQZ256rmbkz 0U, // VPMAXUQZ256rmk 10448U, // VPMAXUQZ256rmkz 324U, // VPMAXUQZ256rr 469U, // VPMAXUQZ256rrk 10448U, // VPMAXUQZ256rrkz 324U, // VPMAXUQZrm 4168U, // VPMAXUQZrmb 6533U, // VPMAXUQZrmbk 41032U, // VPMAXUQZrmbkz 0U, // VPMAXUQZrmk 10448U, // VPMAXUQZrmkz 324U, // VPMAXUQZrr 469U, // VPMAXUQZrrk 10448U, // VPMAXUQZrrkz 4U, // VPMAXUWYrm 4U, // VPMAXUWYrr 324U, // VPMAXUWZ128rm 0U, // VPMAXUWZ128rmk 10448U, // VPMAXUWZ128rmkz 324U, // VPMAXUWZ128rr 469U, // VPMAXUWZ128rrk 10448U, // VPMAXUWZ128rrkz 324U, // VPMAXUWZ256rm 0U, // VPMAXUWZ256rmk 10448U, // VPMAXUWZ256rmkz 324U, // VPMAXUWZ256rr 469U, // VPMAXUWZ256rrk 10448U, // VPMAXUWZ256rrkz 324U, // VPMAXUWZrm 0U, // VPMAXUWZrmk 10448U, // VPMAXUWZrmkz 324U, // VPMAXUWZrr 469U, // VPMAXUWZrrk 10448U, // VPMAXUWZrrkz 4U, // VPMAXUWrm 4U, // VPMAXUWrr 4U, // VPMINSBYrm 4U, // VPMINSBYrr 324U, // VPMINSBZ128rm 0U, // VPMINSBZ128rmk 10448U, // VPMINSBZ128rmkz 324U, // VPMINSBZ128rr 469U, // VPMINSBZ128rrk 10448U, // VPMINSBZ128rrkz 324U, // VPMINSBZ256rm 0U, // VPMINSBZ256rmk 10448U, // VPMINSBZ256rmkz 324U, // VPMINSBZ256rr 469U, // VPMINSBZ256rrk 10448U, // VPMINSBZ256rrkz 324U, // VPMINSBZrm 0U, // VPMINSBZrmk 10448U, // VPMINSBZrmkz 324U, // VPMINSBZrr 469U, // VPMINSBZrrk 10448U, // VPMINSBZrrkz 4U, // VPMINSBrm 4U, // VPMINSBrr 4U, // VPMINSDYrm 4U, // VPMINSDYrr 324U, // VPMINSDZ128rm 4168U, // VPMINSDZ128rmb 6533U, // VPMINSDZ128rmbk 41032U, // VPMINSDZ128rmbkz 0U, // VPMINSDZ128rmk 10448U, // VPMINSDZ128rmkz 324U, // VPMINSDZ128rr 469U, // VPMINSDZ128rrk 10448U, // VPMINSDZ128rrkz 324U, // VPMINSDZ256rm 4168U, // VPMINSDZ256rmb 6533U, // VPMINSDZ256rmbk 41032U, // VPMINSDZ256rmbkz 0U, // VPMINSDZ256rmk 10448U, // VPMINSDZ256rmkz 324U, // VPMINSDZ256rr 469U, // VPMINSDZ256rrk 10448U, // VPMINSDZ256rrkz 324U, // VPMINSDZrm 4168U, // VPMINSDZrmb 6533U, // VPMINSDZrmbk 41032U, // VPMINSDZrmbkz 0U, // VPMINSDZrmk 10448U, // VPMINSDZrmkz 324U, // VPMINSDZrr 469U, // VPMINSDZrrk 10448U, // VPMINSDZrrkz 4U, // VPMINSDrm 4U, // VPMINSDrr 324U, // VPMINSQZ128rm 4168U, // VPMINSQZ128rmb 6533U, // VPMINSQZ128rmbk 41032U, // VPMINSQZ128rmbkz 0U, // VPMINSQZ128rmk 10448U, // VPMINSQZ128rmkz 324U, // VPMINSQZ128rr 469U, // VPMINSQZ128rrk 10448U, // VPMINSQZ128rrkz 324U, // VPMINSQZ256rm 4168U, // VPMINSQZ256rmb 6533U, // VPMINSQZ256rmbk 41032U, // VPMINSQZ256rmbkz 0U, // VPMINSQZ256rmk 10448U, // VPMINSQZ256rmkz 324U, // VPMINSQZ256rr 469U, // VPMINSQZ256rrk 10448U, // VPMINSQZ256rrkz 324U, // VPMINSQZrm 4168U, // VPMINSQZrmb 6533U, // VPMINSQZrmbk 41032U, // VPMINSQZrmbkz 0U, // VPMINSQZrmk 10448U, // VPMINSQZrmkz 324U, // VPMINSQZrr 469U, // VPMINSQZrrk 10448U, // VPMINSQZrrkz 4U, // VPMINSWYrm 4U, // VPMINSWYrr 324U, // VPMINSWZ128rm 0U, // VPMINSWZ128rmk 10448U, // VPMINSWZ128rmkz 324U, // VPMINSWZ128rr 469U, // VPMINSWZ128rrk 10448U, // VPMINSWZ128rrkz 324U, // VPMINSWZ256rm 0U, // VPMINSWZ256rmk 10448U, // VPMINSWZ256rmkz 324U, // VPMINSWZ256rr 469U, // VPMINSWZ256rrk 10448U, // VPMINSWZ256rrkz 324U, // VPMINSWZrm 0U, // VPMINSWZrmk 10448U, // VPMINSWZrmkz 324U, // VPMINSWZrr 469U, // VPMINSWZrrk 10448U, // VPMINSWZrrkz 4U, // VPMINSWrm 4U, // VPMINSWrr 4U, // VPMINUBYrm 4U, // VPMINUBYrr 324U, // VPMINUBZ128rm 0U, // VPMINUBZ128rmk 10448U, // VPMINUBZ128rmkz 324U, // VPMINUBZ128rr 469U, // VPMINUBZ128rrk 10448U, // VPMINUBZ128rrkz 324U, // VPMINUBZ256rm 0U, // VPMINUBZ256rmk 10448U, // VPMINUBZ256rmkz 324U, // VPMINUBZ256rr 469U, // VPMINUBZ256rrk 10448U, // VPMINUBZ256rrkz 324U, // VPMINUBZrm 0U, // VPMINUBZrmk 10448U, // VPMINUBZrmkz 324U, // VPMINUBZrr 469U, // VPMINUBZrrk 10448U, // VPMINUBZrrkz 4U, // VPMINUBrm 4U, // VPMINUBrr 4U, // VPMINUDYrm 4U, // VPMINUDYrr 324U, // VPMINUDZ128rm 4168U, // VPMINUDZ128rmb 6533U, // VPMINUDZ128rmbk 41032U, // VPMINUDZ128rmbkz 0U, // VPMINUDZ128rmk 10448U, // VPMINUDZ128rmkz 324U, // VPMINUDZ128rr 469U, // VPMINUDZ128rrk 10448U, // VPMINUDZ128rrkz 324U, // VPMINUDZ256rm 4168U, // VPMINUDZ256rmb 6533U, // VPMINUDZ256rmbk 41032U, // VPMINUDZ256rmbkz 0U, // VPMINUDZ256rmk 10448U, // VPMINUDZ256rmkz 324U, // VPMINUDZ256rr 469U, // VPMINUDZ256rrk 10448U, // VPMINUDZ256rrkz 324U, // VPMINUDZrm 4168U, // VPMINUDZrmb 6533U, // VPMINUDZrmbk 41032U, // VPMINUDZrmbkz 0U, // VPMINUDZrmk 10448U, // VPMINUDZrmkz 324U, // VPMINUDZrr 469U, // VPMINUDZrrk 10448U, // VPMINUDZrrkz 4U, // VPMINUDrm 4U, // VPMINUDrr 324U, // VPMINUQZ128rm 4168U, // VPMINUQZ128rmb 6533U, // VPMINUQZ128rmbk 41032U, // VPMINUQZ128rmbkz 0U, // VPMINUQZ128rmk 10448U, // VPMINUQZ128rmkz 324U, // VPMINUQZ128rr 469U, // VPMINUQZ128rrk 10448U, // VPMINUQZ128rrkz 324U, // VPMINUQZ256rm 4168U, // VPMINUQZ256rmb 6533U, // VPMINUQZ256rmbk 41032U, // VPMINUQZ256rmbkz 0U, // VPMINUQZ256rmk 10448U, // VPMINUQZ256rmkz 324U, // VPMINUQZ256rr 469U, // VPMINUQZ256rrk 10448U, // VPMINUQZ256rrkz 324U, // VPMINUQZrm 4168U, // VPMINUQZrmb 6533U, // VPMINUQZrmbk 41032U, // VPMINUQZrmbkz 0U, // VPMINUQZrmk 10448U, // VPMINUQZrmkz 324U, // VPMINUQZrr 469U, // VPMINUQZrrk 10448U, // VPMINUQZrrkz 4U, // VPMINUWYrm 4U, // VPMINUWYrr 324U, // VPMINUWZ128rm 0U, // VPMINUWZ128rmk 10448U, // VPMINUWZ128rmkz 324U, // VPMINUWZ128rr 469U, // VPMINUWZ128rrk 10448U, // VPMINUWZ128rrkz 324U, // VPMINUWZ256rm 0U, // VPMINUWZ256rmk 10448U, // VPMINUWZ256rmkz 324U, // VPMINUWZ256rr 469U, // VPMINUWZ256rrk 10448U, // VPMINUWZ256rrkz 324U, // VPMINUWZrm 0U, // VPMINUWZrmk 10448U, // VPMINUWZrmkz 324U, // VPMINUWZrr 469U, // VPMINUWZrrk 10448U, // VPMINUWZrrkz 4U, // VPMINUWrm 4U, // VPMINUWrr 0U, // VPMOVDBmr 481U, // VPMOVDBmrk 0U, // VPMOVDBrr 461U, // VPMOVDBrrk 589U, // VPMOVDBrrkz 0U, // VPMOVDWmr 481U, // VPMOVDWmrk 0U, // VPMOVDWrr 461U, // VPMOVDWrrk 589U, // VPMOVDWrrkz 0U, // VPMOVM2BZ128rr 0U, // VPMOVM2BZ256rr 0U, // VPMOVM2BZrr 0U, // VPMOVM2DZ128rr 0U, // VPMOVM2DZ256rr 0U, // VPMOVM2DZrr 0U, // VPMOVM2QZ128rr 0U, // VPMOVM2QZ256rr 0U, // VPMOVM2QZrr 0U, // VPMOVM2WZ128rr 0U, // VPMOVM2WZ256rr 0U, // VPMOVM2WZrr 0U, // VPMOVMSKBYrr 0U, // VPMOVMSKBrr 0U, // VPMOVQBmr 481U, // VPMOVQBmrk 0U, // VPMOVQBrr 461U, // VPMOVQBrrk 589U, // VPMOVQBrrkz 0U, // VPMOVQDmr 481U, // VPMOVQDmrk 0U, // VPMOVQDrr 461U, // VPMOVQDrrk 589U, // VPMOVQDrrkz 0U, // VPMOVQWmr 481U, // VPMOVQWmrk 0U, // VPMOVQWrr 461U, // VPMOVQWrrk 589U, // VPMOVQWrrkz 0U, // VPMOVSDBmr 481U, // VPMOVSDBmrk 0U, // VPMOVSDBrr 461U, // VPMOVSDBrrk 589U, // VPMOVSDBrrkz 0U, // VPMOVSDWmr 481U, // VPMOVSDWmrk 0U, // VPMOVSDWrr 461U, // VPMOVSDWrrk 589U, // VPMOVSDWrrkz 0U, // VPMOVSQBmr 481U, // VPMOVSQBmrk 0U, // VPMOVSQBrr 461U, // VPMOVSQBrrk 589U, // VPMOVSQBrrkz 0U, // VPMOVSQDmr 481U, // VPMOVSQDmrk 0U, // VPMOVSQDrr 461U, // VPMOVSQDrrk 589U, // VPMOVSQDrrkz 0U, // VPMOVSQWmr 481U, // VPMOVSQWmrk 0U, // VPMOVSQWrr 461U, // VPMOVSQWrrk 589U, // VPMOVSQWrrkz 0U, // VPMOVSXBDYrm 0U, // VPMOVSXBDYrr 0U, // VPMOVSXBDZrm 653U, // VPMOVSXBDZrmk 589U, // VPMOVSXBDZrmkz 0U, // VPMOVSXBDZrr 653U, // VPMOVSXBDZrrk 589U, // VPMOVSXBDZrrkz 0U, // VPMOVSXBDrm 0U, // VPMOVSXBDrr 0U, // VPMOVSXBQYrm 0U, // VPMOVSXBQYrr 0U, // VPMOVSXBQZrm 653U, // VPMOVSXBQZrmk 589U, // VPMOVSXBQZrmkz 0U, // VPMOVSXBQZrr 653U, // VPMOVSXBQZrrk 589U, // VPMOVSXBQZrrkz 0U, // VPMOVSXBQrm 0U, // VPMOVSXBQrr 0U, // VPMOVSXBWYrm 0U, // VPMOVSXBWYrr 0U, // VPMOVSXBWrm 0U, // VPMOVSXBWrr 0U, // VPMOVSXDQYrm 0U, // VPMOVSXDQYrr 0U, // VPMOVSXDQZrm 653U, // VPMOVSXDQZrmk 589U, // VPMOVSXDQZrmkz 0U, // VPMOVSXDQZrr 653U, // VPMOVSXDQZrrk 589U, // VPMOVSXDQZrrkz 0U, // VPMOVSXDQrm 0U, // VPMOVSXDQrr 0U, // VPMOVSXWDYrm 0U, // VPMOVSXWDYrr 0U, // VPMOVSXWDZrm 653U, // VPMOVSXWDZrmk 589U, // VPMOVSXWDZrmkz 0U, // VPMOVSXWDZrr 653U, // VPMOVSXWDZrrk 589U, // VPMOVSXWDZrrkz 0U, // VPMOVSXWDrm 0U, // VPMOVSXWDrr 0U, // VPMOVSXWQYrm 0U, // VPMOVSXWQYrr 0U, // VPMOVSXWQZrm 653U, // VPMOVSXWQZrmk 589U, // VPMOVSXWQZrmkz 0U, // VPMOVSXWQZrr 653U, // VPMOVSXWQZrrk 589U, // VPMOVSXWQZrrkz 0U, // VPMOVSXWQrm 0U, // VPMOVSXWQrr 0U, // VPMOVUSDBmr 481U, // VPMOVUSDBmrk 0U, // VPMOVUSDBrr 461U, // VPMOVUSDBrrk 589U, // VPMOVUSDBrrkz 0U, // VPMOVUSDWmr 481U, // VPMOVUSDWmrk 0U, // VPMOVUSDWrr 461U, // VPMOVUSDWrrk 589U, // VPMOVUSDWrrkz 0U, // VPMOVUSQBmr 481U, // VPMOVUSQBmrk 0U, // VPMOVUSQBrr 461U, // VPMOVUSQBrrk 589U, // VPMOVUSQBrrkz 0U, // VPMOVUSQDmr 481U, // VPMOVUSQDmrk 0U, // VPMOVUSQDrr 461U, // VPMOVUSQDrrk 589U, // VPMOVUSQDrrkz 0U, // VPMOVUSQWmr 481U, // VPMOVUSQWmrk 0U, // VPMOVUSQWrr 461U, // VPMOVUSQWrrk 589U, // VPMOVUSQWrrkz 0U, // VPMOVZXBDYrm 0U, // VPMOVZXBDYrr 0U, // VPMOVZXBDZrm 653U, // VPMOVZXBDZrmk 589U, // VPMOVZXBDZrmkz 0U, // VPMOVZXBDZrr 653U, // VPMOVZXBDZrrk 589U, // VPMOVZXBDZrrkz 0U, // VPMOVZXBDrm 0U, // VPMOVZXBDrr 0U, // VPMOVZXBQYrm 0U, // VPMOVZXBQYrr 0U, // VPMOVZXBQZrm 653U, // VPMOVZXBQZrmk 589U, // VPMOVZXBQZrmkz 0U, // VPMOVZXBQZrr 653U, // VPMOVZXBQZrrk 589U, // VPMOVZXBQZrrkz 0U, // VPMOVZXBQrm 0U, // VPMOVZXBQrr 0U, // VPMOVZXBWYrm 0U, // VPMOVZXBWYrr 0U, // VPMOVZXBWrm 0U, // VPMOVZXBWrr 0U, // VPMOVZXDQYrm 0U, // VPMOVZXDQYrr 0U, // VPMOVZXDQZrm 653U, // VPMOVZXDQZrmk 589U, // VPMOVZXDQZrmkz 0U, // VPMOVZXDQZrr 653U, // VPMOVZXDQZrrk 589U, // VPMOVZXDQZrrkz 0U, // VPMOVZXDQrm 0U, // VPMOVZXDQrr 0U, // VPMOVZXWDYrm 0U, // VPMOVZXWDYrr 0U, // VPMOVZXWDZrm 653U, // VPMOVZXWDZrmk 589U, // VPMOVZXWDZrmkz 0U, // VPMOVZXWDZrr 653U, // VPMOVZXWDZrrk 589U, // VPMOVZXWDZrrkz 0U, // VPMOVZXWDrm 0U, // VPMOVZXWDrr 0U, // VPMOVZXWQYrm 0U, // VPMOVZXWQYrr 0U, // VPMOVZXWQZrm 653U, // VPMOVZXWQZrmk 589U, // VPMOVZXWQZrmkz 0U, // VPMOVZXWQZrr 653U, // VPMOVZXWQZrrk 589U, // VPMOVZXWQZrrkz 0U, // VPMOVZXWQrm 0U, // VPMOVZXWQrr 4U, // VPMULDQYrm 4U, // VPMULDQYrr 4U, // VPMULDQZrm 72U, // VPMULDQZrmb 73800U, // VPMULDQZrmbk 41032U, // VPMULDQZrmbkz 6352U, // VPMULDQZrmk 10448U, // VPMULDQZrmkz 4U, // VPMULDQZrr 6352U, // VPMULDQZrrk 10448U, // VPMULDQZrrkz 4U, // VPMULDQrm 4U, // VPMULDQrr 4U, // VPMULHRSWrm128 4U, // VPMULHRSWrm256 4U, // VPMULHRSWrr128 4U, // VPMULHRSWrr256 4U, // VPMULHUWYrm 4U, // VPMULHUWYrr 4U, // VPMULHUWrm 4U, // VPMULHUWrr 4U, // VPMULHWYrm 4U, // VPMULHWYrr 4U, // VPMULHWrm 4U, // VPMULHWrr 4U, // VPMULLDYrm 4U, // VPMULLDYrr 324U, // VPMULLDZ128rm 4168U, // VPMULLDZ128rmb 6533U, // VPMULLDZ128rmbk 41032U, // VPMULLDZ128rmbkz 0U, // VPMULLDZ128rmk 10448U, // VPMULLDZ128rmkz 324U, // VPMULLDZ128rr 469U, // VPMULLDZ128rrk 10448U, // VPMULLDZ128rrkz 324U, // VPMULLDZ256rm 4168U, // VPMULLDZ256rmb 6533U, // VPMULLDZ256rmbk 41032U, // VPMULLDZ256rmbkz 0U, // VPMULLDZ256rmk 10448U, // VPMULLDZ256rmkz 324U, // VPMULLDZ256rr 469U, // VPMULLDZ256rrk 10448U, // VPMULLDZ256rrkz 324U, // VPMULLDZrm 4168U, // VPMULLDZrmb 6533U, // VPMULLDZrmbk 41032U, // VPMULLDZrmbkz 0U, // VPMULLDZrmk 10448U, // VPMULLDZrmkz 324U, // VPMULLDZrr 469U, // VPMULLDZrrk 10448U, // VPMULLDZrrkz 4U, // VPMULLDrm 4U, // VPMULLDrr 324U, // VPMULLQZ128rm 4168U, // VPMULLQZ128rmb 6533U, // VPMULLQZ128rmbk 41032U, // VPMULLQZ128rmbkz 0U, // VPMULLQZ128rmk 10448U, // VPMULLQZ128rmkz 324U, // VPMULLQZ128rr 469U, // VPMULLQZ128rrk 10448U, // VPMULLQZ128rrkz 324U, // VPMULLQZ256rm 4168U, // VPMULLQZ256rmb 6533U, // VPMULLQZ256rmbk 41032U, // VPMULLQZ256rmbkz 0U, // VPMULLQZ256rmk 10448U, // VPMULLQZ256rmkz 324U, // VPMULLQZ256rr 469U, // VPMULLQZ256rrk 10448U, // VPMULLQZ256rrkz 324U, // VPMULLQZrm 4168U, // VPMULLQZrmb 6533U, // VPMULLQZrmbk 41032U, // VPMULLQZrmbkz 0U, // VPMULLQZrmk 10448U, // VPMULLQZrmkz 324U, // VPMULLQZrr 469U, // VPMULLQZrrk 10448U, // VPMULLQZrrkz 4U, // VPMULLWYrm 4U, // VPMULLWYrr 324U, // VPMULLWZ128rm 0U, // VPMULLWZ128rmk 10448U, // VPMULLWZ128rmkz 324U, // VPMULLWZ128rr 469U, // VPMULLWZ128rrk 10448U, // VPMULLWZ128rrkz 324U, // VPMULLWZ256rm 0U, // VPMULLWZ256rmk 10448U, // VPMULLWZ256rmkz 324U, // VPMULLWZ256rr 469U, // VPMULLWZ256rrk 10448U, // VPMULLWZ256rrkz 324U, // VPMULLWZrm 0U, // VPMULLWZrmk 10448U, // VPMULLWZrmkz 324U, // VPMULLWZrr 469U, // VPMULLWZrrk 10448U, // VPMULLWZrrkz 4U, // VPMULLWrm 4U, // VPMULLWrr 4U, // VPMULUDQYrm 4U, // VPMULUDQYrr 4U, // VPMULUDQZrm 72U, // VPMULUDQZrmb 73800U, // VPMULUDQZrmbk 41032U, // VPMULUDQZrmbkz 6352U, // VPMULUDQZrmk 10448U, // VPMULUDQZrmkz 4U, // VPMULUDQZrr 6352U, // VPMULUDQZrrk 10448U, // VPMULUDQZrrkz 4U, // VPMULUDQrm 4U, // VPMULUDQrr 324U, // VPORDZ128rm 4168U, // VPORDZ128rmb 6533U, // VPORDZ128rmbk 41032U, // VPORDZ128rmbkz 0U, // VPORDZ128rmk 10448U, // VPORDZ128rmkz 324U, // VPORDZ128rr 469U, // VPORDZ128rrk 10448U, // VPORDZ128rrkz 324U, // VPORDZ256rm 4168U, // VPORDZ256rmb 6533U, // VPORDZ256rmbk 41032U, // VPORDZ256rmbkz 0U, // VPORDZ256rmk 10448U, // VPORDZ256rmkz 324U, // VPORDZ256rr 469U, // VPORDZ256rrk 10448U, // VPORDZ256rrkz 324U, // VPORDZrm 4168U, // VPORDZrmb 6533U, // VPORDZrmbk 41032U, // VPORDZrmbkz 0U, // VPORDZrmk 10448U, // VPORDZrmkz 324U, // VPORDZrr 469U, // VPORDZrrk 10448U, // VPORDZrrkz 324U, // VPORQZ128rm 4168U, // VPORQZ128rmb 6533U, // VPORQZ128rmbk 41032U, // VPORQZ128rmbkz 0U, // VPORQZ128rmk 10448U, // VPORQZ128rmkz 324U, // VPORQZ128rr 469U, // VPORQZ128rrk 10448U, // VPORQZ128rrkz 324U, // VPORQZ256rm 4168U, // VPORQZ256rmb 6533U, // VPORQZ256rmbk 41032U, // VPORQZ256rmbkz 0U, // VPORQZ256rmk 10448U, // VPORQZ256rmkz 324U, // VPORQZ256rr 469U, // VPORQZ256rrk 10448U, // VPORQZ256rrkz 324U, // VPORQZrm 4168U, // VPORQZrmb 6533U, // VPORQZrmbk 41032U, // VPORQZrmbkz 0U, // VPORQZrmk 10448U, // VPORQZrmkz 324U, // VPORQZrr 469U, // VPORQZrrk 10448U, // VPORQZrrkz 4U, // VPORYrm 4U, // VPORYrr 4U, // VPORrm 4U, // VPORrr 72U, // VPPERMmr 72U, // VPPERMrm 72U, // VPPERMrr 0U, // VPROTBmi 0U, // VPROTBmr 4U, // VPROTBri 4U, // VPROTBrm 4U, // VPROTBrr 0U, // VPROTDmi 0U, // VPROTDmr 4U, // VPROTDri 4U, // VPROTDrm 4U, // VPROTDrr 0U, // VPROTQmi 0U, // VPROTQmr 4U, // VPROTQri 4U, // VPROTQrm 4U, // VPROTQrr 0U, // VPROTWmi 0U, // VPROTWmr 4U, // VPROTWri 4U, // VPROTWrm 4U, // VPROTWrr 4U, // VPSADBWYrm 4U, // VPSADBWYrr 4U, // VPSADBWrm 4U, // VPSADBWrr 61U, // VPSCATTERDDZmr 61U, // VPSCATTERDQZmr 61U, // VPSCATTERQDZmr 61U, // VPSCATTERQQZmr 0U, // VPSHABmr 4U, // VPSHABrm 4U, // VPSHABrr 0U, // VPSHADmr 4U, // VPSHADrm 4U, // VPSHADrr 0U, // VPSHAQmr 4U, // VPSHAQrm 4U, // VPSHAQrr 0U, // VPSHAWmr 4U, // VPSHAWrm 4U, // VPSHAWrr 0U, // VPSHLBmr 4U, // VPSHLBrm 4U, // VPSHLBrr 0U, // VPSHLDmr 4U, // VPSHLDrm 4U, // VPSHLDrr 0U, // VPSHLQmr 4U, // VPSHLQrm 4U, // VPSHLQrr 0U, // VPSHLWmr 4U, // VPSHLWrm 4U, // VPSHLWrr 4U, // VPSHUFBYrm 4U, // VPSHUFBYrr 4U, // VPSHUFBrm 4U, // VPSHUFBrr 0U, // VPSHUFDYmi 4U, // VPSHUFDYri 0U, // VPSHUFDZmi 4U, // VPSHUFDZri 0U, // VPSHUFDmi 4U, // VPSHUFDri 0U, // VPSHUFHWYmi 4U, // VPSHUFHWYri 0U, // VPSHUFHWmi 4U, // VPSHUFHWri 0U, // VPSHUFLWYmi 4U, // VPSHUFLWYri 0U, // VPSHUFLWmi 4U, // VPSHUFLWri 4U, // VPSIGNBYrm 4U, // VPSIGNBYrr 4U, // VPSIGNBrm 4U, // VPSIGNBrr 4U, // VPSIGNDYrm 4U, // VPSIGNDYrr 4U, // VPSIGNDrm 4U, // VPSIGNDrr 4U, // VPSIGNWYrm 4U, // VPSIGNWYrr 4U, // VPSIGNWrm 4U, // VPSIGNWrr 4U, // VPSLLDQYri 4U, // VPSLLDQri 4U, // VPSLLDYri 4U, // VPSLLDYrm 4U, // VPSLLDYrr 2U, // VPSLLDZmi 14864U, // VPSLLDZmik 16592U, // VPSLLDZmikz 1028U, // VPSLLDZri 14864U, // VPSLLDZrik 16592U, // VPSLLDZrikz 1028U, // VPSLLDZrm 0U, // VPSLLDZrmk 16592U, // VPSLLDZrmkz 1028U, // VPSLLDZrr 661U, // VPSLLDZrrk 16592U, // VPSLLDZrrkz 4U, // VPSLLDri 4U, // VPSLLDrm 4U, // VPSLLDrr 4U, // VPSLLQYri 4U, // VPSLLQYrm 4U, // VPSLLQYrr 2U, // VPSLLQZmi 14864U, // VPSLLQZmik 16592U, // VPSLLQZmikz 1028U, // VPSLLQZri 14864U, // VPSLLQZrik 16592U, // VPSLLQZrikz 1028U, // VPSLLQZrm 0U, // VPSLLQZrmk 16592U, // VPSLLQZrmkz 1028U, // VPSLLQZrr 661U, // VPSLLQZrrk 16592U, // VPSLLQZrrkz 4U, // VPSLLQri 4U, // VPSLLQrm 4U, // VPSLLQrr 4U, // VPSLLVDYrm 4U, // VPSLLVDYrr 1028U, // VPSLLVDZrm 0U, // VPSLLVDZrmk 16592U, // VPSLLVDZrmkz 1028U, // VPSLLVDZrr 661U, // VPSLLVDZrrk 16592U, // VPSLLVDZrrkz 4U, // VPSLLVDrm 4U, // VPSLLVDrr 4U, // VPSLLVQYrm 4U, // VPSLLVQYrr 1028U, // VPSLLVQZrm 0U, // VPSLLVQZrmk 16592U, // VPSLLVQZrmkz 1028U, // VPSLLVQZrr 661U, // VPSLLVQZrrk 16592U, // VPSLLVQZrrkz 4U, // VPSLLVQrm 4U, // VPSLLVQrr 4U, // VPSLLWYri 4U, // VPSLLWYrm 4U, // VPSLLWYrr 4U, // VPSLLWri 4U, // VPSLLWrm 4U, // VPSLLWrr 4U, // VPSRADYri 4U, // VPSRADYrm 4U, // VPSRADYrr 2U, // VPSRADZmi 14864U, // VPSRADZmik 16592U, // VPSRADZmikz 1028U, // VPSRADZri 14864U, // VPSRADZrik 16592U, // VPSRADZrikz 1028U, // VPSRADZrm 0U, // VPSRADZrmk 16592U, // VPSRADZrmkz 1028U, // VPSRADZrr 661U, // VPSRADZrrk 16592U, // VPSRADZrrkz 4U, // VPSRADri 4U, // VPSRADrm 4U, // VPSRADrr 2U, // VPSRAQZmi 14864U, // VPSRAQZmik 16592U, // VPSRAQZmikz 1028U, // VPSRAQZri 14864U, // VPSRAQZrik 16592U, // VPSRAQZrikz 1028U, // VPSRAQZrm 0U, // VPSRAQZrmk 16592U, // VPSRAQZrmkz 1028U, // VPSRAQZrr 661U, // VPSRAQZrrk 16592U, // VPSRAQZrrkz 4U, // VPSRAVDYrm 4U, // VPSRAVDYrr 1028U, // VPSRAVDZrm 0U, // VPSRAVDZrmk 16592U, // VPSRAVDZrmkz 1028U, // VPSRAVDZrr 661U, // VPSRAVDZrrk 16592U, // VPSRAVDZrrkz 4U, // VPSRAVDrm 4U, // VPSRAVDrr 1028U, // VPSRAVQZrm 0U, // VPSRAVQZrmk 16592U, // VPSRAVQZrmkz 1028U, // VPSRAVQZrr 661U, // VPSRAVQZrrk 16592U, // VPSRAVQZrrkz 4U, // VPSRAWYri 4U, // VPSRAWYrm 4U, // VPSRAWYrr 4U, // VPSRAWri 4U, // VPSRAWrm 4U, // VPSRAWrr 4U, // VPSRLDQYri 4U, // VPSRLDQri 4U, // VPSRLDYri 4U, // VPSRLDYrm 4U, // VPSRLDYrr 2U, // VPSRLDZmi 14864U, // VPSRLDZmik 16592U, // VPSRLDZmikz 1028U, // VPSRLDZri 14864U, // VPSRLDZrik 16592U, // VPSRLDZrikz 1028U, // VPSRLDZrm 0U, // VPSRLDZrmk 16592U, // VPSRLDZrmkz 1028U, // VPSRLDZrr 661U, // VPSRLDZrrk 16592U, // VPSRLDZrrkz 4U, // VPSRLDri 4U, // VPSRLDrm 4U, // VPSRLDrr 4U, // VPSRLQYri 4U, // VPSRLQYrm 4U, // VPSRLQYrr 2U, // VPSRLQZmi 14864U, // VPSRLQZmik 16592U, // VPSRLQZmikz 1028U, // VPSRLQZri 14864U, // VPSRLQZrik 16592U, // VPSRLQZrikz 1028U, // VPSRLQZrm 0U, // VPSRLQZrmk 16592U, // VPSRLQZrmkz 1028U, // VPSRLQZrr 661U, // VPSRLQZrrk 16592U, // VPSRLQZrrkz 4U, // VPSRLQri 4U, // VPSRLQrm 4U, // VPSRLQrr 4U, // VPSRLVDYrm 4U, // VPSRLVDYrr 1028U, // VPSRLVDZrm 0U, // VPSRLVDZrmk 16592U, // VPSRLVDZrmkz 1028U, // VPSRLVDZrr 661U, // VPSRLVDZrrk 16592U, // VPSRLVDZrrkz 4U, // VPSRLVDrm 4U, // VPSRLVDrr 4U, // VPSRLVQYrm 4U, // VPSRLVQYrr 1028U, // VPSRLVQZrm 0U, // VPSRLVQZrmk 16592U, // VPSRLVQZrmkz 1028U, // VPSRLVQZrr 661U, // VPSRLVQZrrk 16592U, // VPSRLVQZrrkz 4U, // VPSRLVQrm 4U, // VPSRLVQrr 4U, // VPSRLWYri 4U, // VPSRLWYrm 4U, // VPSRLWYrr 4U, // VPSRLWri 4U, // VPSRLWrm 4U, // VPSRLWrr 4U, // VPSUBBYrm 4U, // VPSUBBYrr 324U, // VPSUBBZ128rm 0U, // VPSUBBZ128rmk 10448U, // VPSUBBZ128rmkz 324U, // VPSUBBZ128rr 469U, // VPSUBBZ128rrk 10448U, // VPSUBBZ128rrkz 324U, // VPSUBBZ256rm 0U, // VPSUBBZ256rmk 10448U, // VPSUBBZ256rmkz 324U, // VPSUBBZ256rr 469U, // VPSUBBZ256rrk 10448U, // VPSUBBZ256rrkz 324U, // VPSUBBZrm 0U, // VPSUBBZrmk 10448U, // VPSUBBZrmkz 324U, // VPSUBBZrr 469U, // VPSUBBZrrk 10448U, // VPSUBBZrrkz 4U, // VPSUBBrm 4U, // VPSUBBrr 4U, // VPSUBDYrm 4U, // VPSUBDYrr 324U, // VPSUBDZ128rm 4168U, // VPSUBDZ128rmb 6533U, // VPSUBDZ128rmbk 41032U, // VPSUBDZ128rmbkz 0U, // VPSUBDZ128rmk 10448U, // VPSUBDZ128rmkz 324U, // VPSUBDZ128rr 469U, // VPSUBDZ128rrk 10448U, // VPSUBDZ128rrkz 324U, // VPSUBDZ256rm 4168U, // VPSUBDZ256rmb 6533U, // VPSUBDZ256rmbk 41032U, // VPSUBDZ256rmbkz 0U, // VPSUBDZ256rmk 10448U, // VPSUBDZ256rmkz 324U, // VPSUBDZ256rr 469U, // VPSUBDZ256rrk 10448U, // VPSUBDZ256rrkz 324U, // VPSUBDZrm 4168U, // VPSUBDZrmb 6533U, // VPSUBDZrmbk 41032U, // VPSUBDZrmbkz 0U, // VPSUBDZrmk 10448U, // VPSUBDZrmkz 324U, // VPSUBDZrr 469U, // VPSUBDZrrk 10448U, // VPSUBDZrrkz 4U, // VPSUBDrm 4U, // VPSUBDrr 4U, // VPSUBQYrm 4U, // VPSUBQYrr 324U, // VPSUBQZ128rm 4168U, // VPSUBQZ128rmb 6533U, // VPSUBQZ128rmbk 41032U, // VPSUBQZ128rmbkz 0U, // VPSUBQZ128rmk 10448U, // VPSUBQZ128rmkz 324U, // VPSUBQZ128rr 469U, // VPSUBQZ128rrk 10448U, // VPSUBQZ128rrkz 324U, // VPSUBQZ256rm 4168U, // VPSUBQZ256rmb 6533U, // VPSUBQZ256rmbk 41032U, // VPSUBQZ256rmbkz 0U, // VPSUBQZ256rmk 10448U, // VPSUBQZ256rmkz 324U, // VPSUBQZ256rr 469U, // VPSUBQZ256rrk 10448U, // VPSUBQZ256rrkz 324U, // VPSUBQZrm 4168U, // VPSUBQZrmb 6533U, // VPSUBQZrmbk 41032U, // VPSUBQZrmbkz 0U, // VPSUBQZrmk 10448U, // VPSUBQZrmkz 324U, // VPSUBQZrr 469U, // VPSUBQZrrk 10448U, // VPSUBQZrrkz 4U, // VPSUBQrm 4U, // VPSUBQrr 4U, // VPSUBSBYrm 4U, // VPSUBSBYrr 4U, // VPSUBSBrm 4U, // VPSUBSBrr 4U, // VPSUBSWYrm 4U, // VPSUBSWYrr 4U, // VPSUBSWrm 4U, // VPSUBSWrr 4U, // VPSUBUSBYrm 4U, // VPSUBUSBYrr 4U, // VPSUBUSBrm 4U, // VPSUBUSBrr 4U, // VPSUBUSWYrm 4U, // VPSUBUSWYrr 4U, // VPSUBUSWrm 4U, // VPSUBUSWrr 4U, // VPSUBWYrm 4U, // VPSUBWYrr 324U, // VPSUBWZ128rm 0U, // VPSUBWZ128rmk 10448U, // VPSUBWZ128rmkz 324U, // VPSUBWZ128rr 469U, // VPSUBWZ128rrk 10448U, // VPSUBWZ128rrkz 324U, // VPSUBWZ256rm 0U, // VPSUBWZ256rmk 10448U, // VPSUBWZ256rmkz 324U, // VPSUBWZ256rr 469U, // VPSUBWZ256rrk 10448U, // VPSUBWZ256rrkz 324U, // VPSUBWZrm 0U, // VPSUBWZrmk 10448U, // VPSUBWZrmkz 324U, // VPSUBWZrr 469U, // VPSUBWZrrk 10448U, // VPSUBWZrrkz 4U, // VPSUBWrm 4U, // VPSUBWrr 4U, // VPTESTMDZrm 4U, // VPTESTMDZrr 4U, // VPTESTMQZrm 4U, // VPTESTMQZrr 4U, // VPTESTNMDZrm 4U, // VPTESTNMDZrr 4U, // VPTESTNMQZrm 4U, // VPTESTNMQZrr 0U, // VPTESTYrm 0U, // VPTESTYrr 0U, // VPTESTrm 0U, // VPTESTrr 4U, // VPUNPCKHBWYrm 4U, // VPUNPCKHBWYrr 4U, // VPUNPCKHBWrm 4U, // VPUNPCKHBWrr 4U, // VPUNPCKHDQYrm 4U, // VPUNPCKHDQYrr 4U, // VPUNPCKHDQZrm 4U, // VPUNPCKHDQZrr 4U, // VPUNPCKHDQrm 4U, // VPUNPCKHDQrr 4U, // VPUNPCKHQDQYrm 4U, // VPUNPCKHQDQYrr 4U, // VPUNPCKHQDQZrm 4U, // VPUNPCKHQDQZrr 4U, // VPUNPCKHQDQrm 4U, // VPUNPCKHQDQrr 4U, // VPUNPCKHWDYrm 4U, // VPUNPCKHWDYrr 4U, // VPUNPCKHWDrm 4U, // VPUNPCKHWDrr 4U, // VPUNPCKLBWYrm 4U, // VPUNPCKLBWYrr 4U, // VPUNPCKLBWrm 4U, // VPUNPCKLBWrr 4U, // VPUNPCKLDQYrm 4U, // VPUNPCKLDQYrr 4U, // VPUNPCKLDQZrm 4U, // VPUNPCKLDQZrr 4U, // VPUNPCKLDQrm 4U, // VPUNPCKLDQrr 4U, // VPUNPCKLQDQYrm 4U, // VPUNPCKLQDQYrr 4U, // VPUNPCKLQDQZrm 4U, // VPUNPCKLQDQZrr 4U, // VPUNPCKLQDQrm 4U, // VPUNPCKLQDQrr 4U, // VPUNPCKLWDYrm 4U, // VPUNPCKLWDYrr 4U, // VPUNPCKLWDrm 4U, // VPUNPCKLWDrr 324U, // VPXORDZ128rm 4168U, // VPXORDZ128rmb 6533U, // VPXORDZ128rmbk 41032U, // VPXORDZ128rmbkz 0U, // VPXORDZ128rmk 10448U, // VPXORDZ128rmkz 324U, // VPXORDZ128rr 469U, // VPXORDZ128rrk 10448U, // VPXORDZ128rrkz 324U, // VPXORDZ256rm 4168U, // VPXORDZ256rmb 6533U, // VPXORDZ256rmbk 41032U, // VPXORDZ256rmbkz 0U, // VPXORDZ256rmk 10448U, // VPXORDZ256rmkz 324U, // VPXORDZ256rr 469U, // VPXORDZ256rrk 10448U, // VPXORDZ256rrkz 324U, // VPXORDZrm 4168U, // VPXORDZrmb 6533U, // VPXORDZrmbk 41032U, // VPXORDZrmbkz 0U, // VPXORDZrmk 10448U, // VPXORDZrmkz 324U, // VPXORDZrr 469U, // VPXORDZrrk 10448U, // VPXORDZrrkz 324U, // VPXORQZ128rm 4168U, // VPXORQZ128rmb 6533U, // VPXORQZ128rmbk 41032U, // VPXORQZ128rmbkz 0U, // VPXORQZ128rmk 10448U, // VPXORQZ128rmkz 324U, // VPXORQZ128rr 469U, // VPXORQZ128rrk 10448U, // VPXORQZ128rrkz 324U, // VPXORQZ256rm 4168U, // VPXORQZ256rmb 6533U, // VPXORQZ256rmbk 41032U, // VPXORQZ256rmbkz 0U, // VPXORQZ256rmk 10448U, // VPXORQZ256rmkz 324U, // VPXORQZ256rr 469U, // VPXORQZ256rrk 10448U, // VPXORQZ256rrkz 324U, // VPXORQZrm 4168U, // VPXORQZrmb 6533U, // VPXORQZrmbk 41032U, // VPXORQZrmbkz 0U, // VPXORQZrmk 10448U, // VPXORQZrmkz 324U, // VPXORQZrr 469U, // VPXORQZrrk 10448U, // VPXORQZrrkz 4U, // VPXORYrm 4U, // VPXORYrr 4U, // VPXORrm 4U, // VPXORrr 0U, // VRCP14PDZ128m 28U, // VRCP14PDZ128mb 6672U, // VRCP14PDZ128mbk 10448U, // VRCP14PDZ128mbkz 469U, // VRCP14PDZ128mk 589U, // VRCP14PDZ128mkz 28U, // VRCP14PDZ128r 469U, // VRCP14PDZ128rk 589U, // VRCP14PDZ128rkz 0U, // VRCP14PDZ256m 28U, // VRCP14PDZ256mb 6672U, // VRCP14PDZ256mbk 10448U, // VRCP14PDZ256mbkz 469U, // VRCP14PDZ256mk 589U, // VRCP14PDZ256mkz 28U, // VRCP14PDZ256r 469U, // VRCP14PDZ256rk 589U, // VRCP14PDZ256rkz 0U, // VRCP14PDZm 28U, // VRCP14PDZmb 6672U, // VRCP14PDZmbk 10448U, // VRCP14PDZmbkz 469U, // VRCP14PDZmk 589U, // VRCP14PDZmkz 28U, // VRCP14PDZr 469U, // VRCP14PDZrk 589U, // VRCP14PDZrkz 0U, // VRCP14PSZ128m 28U, // VRCP14PSZ128mb 6672U, // VRCP14PSZ128mbk 10448U, // VRCP14PSZ128mbkz 469U, // VRCP14PSZ128mk 589U, // VRCP14PSZ128mkz 28U, // VRCP14PSZ128r 469U, // VRCP14PSZ128rk 589U, // VRCP14PSZ128rkz 0U, // VRCP14PSZ256m 28U, // VRCP14PSZ256mb 6672U, // VRCP14PSZ256mbk 10448U, // VRCP14PSZ256mbkz 469U, // VRCP14PSZ256mk 589U, // VRCP14PSZ256mkz 28U, // VRCP14PSZ256r 469U, // VRCP14PSZ256rk 589U, // VRCP14PSZ256rkz 0U, // VRCP14PSZm 28U, // VRCP14PSZmb 6672U, // VRCP14PSZmbk 10448U, // VRCP14PSZmbkz 469U, // VRCP14PSZmk 589U, // VRCP14PSZmkz 28U, // VRCP14PSZr 469U, // VRCP14PSZrk 589U, // VRCP14PSZrkz 72U, // VRCP14SDrm 4U, // VRCP14SDrr 72U, // VRCP14SSrm 4U, // VRCP14SSrr 0U, // VRCP28PDm 0U, // VRCP28PDmb 469U, // VRCP28PDmbk 589U, // VRCP28PDmbkz 469U, // VRCP28PDmk 589U, // VRCP28PDmkz 28U, // VRCP28PDr 36U, // VRCP28PDrb 725U, // VRCP28PDrbk 781U, // VRCP28PDrbkz 469U, // VRCP28PDrk 589U, // VRCP28PDrkz 0U, // VRCP28PSm 0U, // VRCP28PSmb 469U, // VRCP28PSmbk 589U, // VRCP28PSmbkz 469U, // VRCP28PSmk 589U, // VRCP28PSmkz 28U, // VRCP28PSr 36U, // VRCP28PSrb 725U, // VRCP28PSrbk 781U, // VRCP28PSrbkz 469U, // VRCP28PSrk 589U, // VRCP28PSrkz 324U, // VRCP28SDm 0U, // VRCP28SDmk 10448U, // VRCP28SDmkz 324U, // VRCP28SDr 900U, // VRCP28SDrb 725U, // VRCP28SDrbk 12496U, // VRCP28SDrbkz 469U, // VRCP28SDrk 10448U, // VRCP28SDrkz 324U, // VRCP28SSm 0U, // VRCP28SSmk 10448U, // VRCP28SSmkz 324U, // VRCP28SSr 900U, // VRCP28SSrb 725U, // VRCP28SSrbk 12496U, // VRCP28SSrbkz 469U, // VRCP28SSrk 10448U, // VRCP28SSrkz 0U, // VRCPPSYm 0U, // VRCPPSYm_Int 0U, // VRCPPSYr 0U, // VRCPPSYr_Int 0U, // VRCPPSm 0U, // VRCPPSm_Int 0U, // VRCPPSr 0U, // VRCPPSr_Int 72U, // VRCPSSm 72U, // VRCPSSm_Int 4U, // VRCPSSr 0U, // VRNDSCALEPDZm 4U, // VRNDSCALEPDZr 0U, // VRNDSCALEPSZm 4U, // VRNDSCALEPSZr 4168U, // VRNDSCALESDm 0U, // VRNDSCALESDmk 10448U, // VRNDSCALESDmkz 4168U, // VRNDSCALESDr 18504U, // VRNDSCALESDrb 0U, // VRNDSCALESDrbk 139336U, // VRNDSCALESDrbkz 0U, // VRNDSCALESDrk 41032U, // VRNDSCALESDrkz 4168U, // VRNDSCALESSm 0U, // VRNDSCALESSmk 10448U, // VRNDSCALESSmkz 4168U, // VRNDSCALESSr 18504U, // VRNDSCALESSrb 0U, // VRNDSCALESSrbk 139336U, // VRNDSCALESSrbkz 0U, // VRNDSCALESSrk 41032U, // VRNDSCALESSrkz 0U, // VROUNDPDm 4U, // VROUNDPDr 0U, // VROUNDPSm 4U, // VROUNDPSr 72U, // VROUNDSDm 72U, // VROUNDSDr 72U, // VROUNDSDr_Int 72U, // VROUNDSSm 72U, // VROUNDSSr 72U, // VROUNDSSr_Int 0U, // VROUNDYPDm 4U, // VROUNDYPDr 0U, // VROUNDYPSm 4U, // VROUNDYPSr 0U, // VRSQRT14PDZ128m 28U, // VRSQRT14PDZ128mb 6672U, // VRSQRT14PDZ128mbk 10448U, // VRSQRT14PDZ128mbkz 469U, // VRSQRT14PDZ128mk 589U, // VRSQRT14PDZ128mkz 28U, // VRSQRT14PDZ128r 469U, // VRSQRT14PDZ128rk 589U, // VRSQRT14PDZ128rkz 0U, // VRSQRT14PDZ256m 28U, // VRSQRT14PDZ256mb 6672U, // VRSQRT14PDZ256mbk 10448U, // VRSQRT14PDZ256mbkz 469U, // VRSQRT14PDZ256mk 589U, // VRSQRT14PDZ256mkz 28U, // VRSQRT14PDZ256r 469U, // VRSQRT14PDZ256rk 589U, // VRSQRT14PDZ256rkz 0U, // VRSQRT14PDZm 28U, // VRSQRT14PDZmb 6672U, // VRSQRT14PDZmbk 10448U, // VRSQRT14PDZmbkz 469U, // VRSQRT14PDZmk 589U, // VRSQRT14PDZmkz 28U, // VRSQRT14PDZr 469U, // VRSQRT14PDZrk 589U, // VRSQRT14PDZrkz 0U, // VRSQRT14PSZ128m 28U, // VRSQRT14PSZ128mb 6672U, // VRSQRT14PSZ128mbk 10448U, // VRSQRT14PSZ128mbkz 469U, // VRSQRT14PSZ128mk 589U, // VRSQRT14PSZ128mkz 28U, // VRSQRT14PSZ128r 469U, // VRSQRT14PSZ128rk 589U, // VRSQRT14PSZ128rkz 0U, // VRSQRT14PSZ256m 28U, // VRSQRT14PSZ256mb 6672U, // VRSQRT14PSZ256mbk 10448U, // VRSQRT14PSZ256mbkz 469U, // VRSQRT14PSZ256mk 589U, // VRSQRT14PSZ256mkz 28U, // VRSQRT14PSZ256r 469U, // VRSQRT14PSZ256rk 589U, // VRSQRT14PSZ256rkz 0U, // VRSQRT14PSZm 28U, // VRSQRT14PSZmb 6672U, // VRSQRT14PSZmbk 10448U, // VRSQRT14PSZmbkz 469U, // VRSQRT14PSZmk 589U, // VRSQRT14PSZmkz 28U, // VRSQRT14PSZr 469U, // VRSQRT14PSZrk 589U, // VRSQRT14PSZrkz 72U, // VRSQRT14SDrm 4U, // VRSQRT14SDrr 72U, // VRSQRT14SSrm 4U, // VRSQRT14SSrr 0U, // VRSQRT28PDm 0U, // VRSQRT28PDmb 469U, // VRSQRT28PDmbk 589U, // VRSQRT28PDmbkz 469U, // VRSQRT28PDmk 589U, // VRSQRT28PDmkz 28U, // VRSQRT28PDr 36U, // VRSQRT28PDrb 725U, // VRSQRT28PDrbk 781U, // VRSQRT28PDrbkz 469U, // VRSQRT28PDrk 589U, // VRSQRT28PDrkz 0U, // VRSQRT28PSm 0U, // VRSQRT28PSmb 469U, // VRSQRT28PSmbk 589U, // VRSQRT28PSmbkz 469U, // VRSQRT28PSmk 589U, // VRSQRT28PSmkz 28U, // VRSQRT28PSr 36U, // VRSQRT28PSrb 725U, // VRSQRT28PSrbk 781U, // VRSQRT28PSrbkz 469U, // VRSQRT28PSrk 589U, // VRSQRT28PSrkz 324U, // VRSQRT28SDm 0U, // VRSQRT28SDmk 10448U, // VRSQRT28SDmkz 324U, // VRSQRT28SDr 900U, // VRSQRT28SDrb 725U, // VRSQRT28SDrbk 12496U, // VRSQRT28SDrbkz 469U, // VRSQRT28SDrk 10448U, // VRSQRT28SDrkz 324U, // VRSQRT28SSm 0U, // VRSQRT28SSmk 10448U, // VRSQRT28SSmkz 324U, // VRSQRT28SSr 900U, // VRSQRT28SSrb 725U, // VRSQRT28SSrbk 12496U, // VRSQRT28SSrbkz 469U, // VRSQRT28SSrk 10448U, // VRSQRT28SSrkz 0U, // VRSQRTPSYm 0U, // VRSQRTPSYm_Int 0U, // VRSQRTPSYr 0U, // VRSQRTPSYr_Int 0U, // VRSQRTPSm 0U, // VRSQRTPSm_Int 0U, // VRSQRTPSr 0U, // VRSQRTPSr_Int 72U, // VRSQRTSSm 72U, // VRSQRTSSm_Int 4U, // VRSQRTSSr 61U, // VSCATTERDPDZmr 61U, // VSCATTERDPSZmr 40U, // VSCATTERPF0DPDm 40U, // VSCATTERPF0DPSm 40U, // VSCATTERPF0QPDm 40U, // VSCATTERPF0QPSm 40U, // VSCATTERPF1DPDm 40U, // VSCATTERPF1DPSm 40U, // VSCATTERPF1QPDm 40U, // VSCATTERPF1QPSm 61U, // VSCATTERQPDZmr 61U, // VSCATTERQPSZmr 0U, // VSHUFPDYrmi 72U, // VSHUFPDYrri 0U, // VSHUFPDZrmi 72U, // VSHUFPDZrri 72U, // VSHUFPDrmi 72U, // VSHUFPDrri 0U, // VSHUFPSYrmi 72U, // VSHUFPSYrri 0U, // VSHUFPSZrmi 72U, // VSHUFPSZrri 72U, // VSHUFPSrmi 72U, // VSHUFPSrri 0U, // VSQRTPDYm 0U, // VSQRTPDYr 0U, // VSQRTPDZ128m 28U, // VSQRTPDZ128mb 6672U, // VSQRTPDZ128mbk 10448U, // VSQRTPDZ128mbkz 469U, // VSQRTPDZ128mk 589U, // VSQRTPDZ128mkz 28U, // VSQRTPDZ128r 469U, // VSQRTPDZ128rk 589U, // VSQRTPDZ128rkz 0U, // VSQRTPDZ256m 28U, // VSQRTPDZ256mb 6672U, // VSQRTPDZ256mbk 10448U, // VSQRTPDZ256mbkz 469U, // VSQRTPDZ256mk 589U, // VSQRTPDZ256mkz 28U, // VSQRTPDZ256r 469U, // VSQRTPDZ256rk 589U, // VSQRTPDZ256rkz 0U, // VSQRTPDZm 28U, // VSQRTPDZmb 6672U, // VSQRTPDZmbk 10448U, // VSQRTPDZmbkz 469U, // VSQRTPDZmk 589U, // VSQRTPDZmkz 28U, // VSQRTPDZr 469U, // VSQRTPDZrk 589U, // VSQRTPDZrkz 0U, // VSQRTPDm 0U, // VSQRTPDr 0U, // VSQRTPSYm 0U, // VSQRTPSYr 0U, // VSQRTPSZ128m 28U, // VSQRTPSZ128mb 6672U, // VSQRTPSZ128mbk 10448U, // VSQRTPSZ128mbkz 469U, // VSQRTPSZ128mk 589U, // VSQRTPSZ128mkz 28U, // VSQRTPSZ128r 469U, // VSQRTPSZ128rk 589U, // VSQRTPSZ128rkz 0U, // VSQRTPSZ256m 28U, // VSQRTPSZ256mb 6672U, // VSQRTPSZ256mbk 10448U, // VSQRTPSZ256mbkz 469U, // VSQRTPSZ256mk 589U, // VSQRTPSZ256mkz 28U, // VSQRTPSZ256r 469U, // VSQRTPSZ256rk 589U, // VSQRTPSZ256rkz 0U, // VSQRTPSZm 28U, // VSQRTPSZmb 6672U, // VSQRTPSZmbk 10448U, // VSQRTPSZmbkz 469U, // VSQRTPSZmk 589U, // VSQRTPSZmkz 28U, // VSQRTPSZr 469U, // VSQRTPSZrk 589U, // VSQRTPSZrkz 0U, // VSQRTPSm 0U, // VSQRTPSr 72U, // VSQRTSDZm 72U, // VSQRTSDZm_Int 4U, // VSQRTSDZr 4U, // VSQRTSDZr_Int 72U, // VSQRTSDm 72U, // VSQRTSDm_Int 4U, // VSQRTSDr 72U, // VSQRTSSZm 72U, // VSQRTSSZm_Int 4U, // VSQRTSSZr 4U, // VSQRTSSZr_Int 72U, // VSQRTSSm 72U, // VSQRTSSm_Int 4U, // VSQRTSSr 0U, // VSTMXCSR 4U, // VSUBPDYrm 4U, // VSUBPDYrr 324U, // VSUBPDZ128rm 4168U, // VSUBPDZ128rmb 6533U, // VSUBPDZ128rmbk 41032U, // VSUBPDZ128rmbkz 0U, // VSUBPDZ128rmk 10448U, // VSUBPDZ128rmkz 324U, // VSUBPDZ128rr 469U, // VSUBPDZ128rrk 10448U, // VSUBPDZ128rrkz 324U, // VSUBPDZ256rm 4168U, // VSUBPDZ256rmb 6533U, // VSUBPDZ256rmbk 41032U, // VSUBPDZ256rmbkz 0U, // VSUBPDZ256rmk 10448U, // VSUBPDZ256rmkz 324U, // VSUBPDZ256rr 469U, // VSUBPDZ256rrk 10448U, // VSUBPDZ256rrkz 0U, // VSUBPDZrb 0U, // VSUBPDZrbk 24U, // VSUBPDZrbkz 324U, // VSUBPDZrm 4168U, // VSUBPDZrmb 6533U, // VSUBPDZrmbk 41032U, // VSUBPDZrmbkz 0U, // VSUBPDZrmk 10448U, // VSUBPDZrmkz 324U, // VSUBPDZrr 469U, // VSUBPDZrrk 10448U, // VSUBPDZrrkz 4U, // VSUBPDrm 4U, // VSUBPDrr 4U, // VSUBPSYrm 4U, // VSUBPSYrr 324U, // VSUBPSZ128rm 4168U, // VSUBPSZ128rmb 6533U, // VSUBPSZ128rmbk 41032U, // VSUBPSZ128rmbkz 0U, // VSUBPSZ128rmk 10448U, // VSUBPSZ128rmkz 324U, // VSUBPSZ128rr 469U, // VSUBPSZ128rrk 10448U, // VSUBPSZ128rrkz 324U, // VSUBPSZ256rm 4168U, // VSUBPSZ256rmb 6533U, // VSUBPSZ256rmbk 41032U, // VSUBPSZ256rmbkz 0U, // VSUBPSZ256rmk 10448U, // VSUBPSZ256rmkz 324U, // VSUBPSZ256rr 469U, // VSUBPSZ256rrk 10448U, // VSUBPSZ256rrkz 0U, // VSUBPSZrb 0U, // VSUBPSZrbk 24U, // VSUBPSZrbkz 324U, // VSUBPSZrm 4168U, // VSUBPSZrmb 6533U, // VSUBPSZrmbk 41032U, // VSUBPSZrmbkz 0U, // VSUBPSZrmk 10448U, // VSUBPSZrmkz 324U, // VSUBPSZrr 469U, // VSUBPSZrrk 10448U, // VSUBPSZrrkz 4U, // VSUBPSrm 4U, // VSUBPSrr 72U, // VSUBSDZrm 324U, // VSUBSDZrm_Int 0U, // VSUBSDZrm_Intk 10448U, // VSUBSDZrm_Intkz 4U, // VSUBSDZrr 324U, // VSUBSDZrr_Int 469U, // VSUBSDZrr_Intk 10448U, // VSUBSDZrr_Intkz 0U, // VSUBSDZrrb 0U, // VSUBSDZrrbk 24U, // VSUBSDZrrbkz 72U, // VSUBSDrm 72U, // VSUBSDrm_Int 4U, // VSUBSDrr 4U, // VSUBSDrr_Int 72U, // VSUBSSZrm 324U, // VSUBSSZrm_Int 0U, // VSUBSSZrm_Intk 10448U, // VSUBSSZrm_Intkz 4U, // VSUBSSZrr 324U, // VSUBSSZrr_Int 469U, // VSUBSSZrr_Intk 10448U, // VSUBSSZrr_Intkz 0U, // VSUBSSZrrb 0U, // VSUBSSZrrbk 24U, // VSUBSSZrrbkz 72U, // VSUBSSrm 72U, // VSUBSSrm_Int 4U, // VSUBSSrr 4U, // VSUBSSrr_Int 0U, // VTESTPDYrm 0U, // VTESTPDYrr 0U, // VTESTPDrm 0U, // VTESTPDrr 0U, // VTESTPSYrm 0U, // VTESTPSYrr 0U, // VTESTPSrm 0U, // VTESTPSrr 0U, // VUCOMISDZrm 0U, // VUCOMISDZrr 0U, // VUCOMISDrm 0U, // VUCOMISDrr 0U, // VUCOMISSZrm 0U, // VUCOMISSZrr 0U, // VUCOMISSrm 0U, // VUCOMISSrr 4U, // VUNPCKHPDYrm 4U, // VUNPCKHPDYrr 4U, // VUNPCKHPDZrm 4U, // VUNPCKHPDZrr 4U, // VUNPCKHPDrm 4U, // VUNPCKHPDrr 4U, // VUNPCKHPSYrm 4U, // VUNPCKHPSYrr 4U, // VUNPCKHPSZrm 4U, // VUNPCKHPSZrr 4U, // VUNPCKHPSrm 4U, // VUNPCKHPSrr 4U, // VUNPCKLPDYrm 4U, // VUNPCKLPDYrr 4U, // VUNPCKLPDZrm 4U, // VUNPCKLPDZrr 4U, // VUNPCKLPDrm 4U, // VUNPCKLPDrr 4U, // VUNPCKLPSYrm 4U, // VUNPCKLPSYrr 4U, // VUNPCKLPSZrm 4U, // VUNPCKLPSZrr 4U, // VUNPCKLPSrm 4U, // VUNPCKLPSrr 4U, // VXORPDYrm 4U, // VXORPDYrr 4U, // VXORPDrm 4U, // VXORPDrr 4U, // VXORPSYrm 4U, // VXORPSYrr 4U, // VXORPSrm 4U, // VXORPSrr 0U, // VZEROALL 0U, // VZEROUPPER 0U, // V_SET0 0U, // V_SETALLONES 0U, // WAIT 0U, // WBINVD 0U, // WIN_ALLOCA 0U, // WIN_FTOL_32 0U, // WIN_FTOL_64 0U, // WRFSBASE 0U, // WRFSBASE64 0U, // WRGSBASE 0U, // WRGSBASE64 0U, // WRMSR 0U, // XABORT 0U, // XACQUIRE_PREFIX 0U, // XADD16rm 0U, // XADD16rr 0U, // XADD32rm 0U, // XADD32rr 0U, // XADD64rm 0U, // XADD64rr 0U, // XADD8rm 0U, // XADD8rr 0U, // XBEGIN 0U, // XBEGIN_2 0U, // XBEGIN_4 0U, // XCHG16ar 0U, // XCHG16rm 0U, // XCHG16rr 0U, // XCHG32ar 0U, // XCHG32ar64 0U, // XCHG32rm 0U, // XCHG32rr 0U, // XCHG64ar 0U, // XCHG64rm 0U, // XCHG64rr 1U, // XCHG8rm 0U, // XCHG8rr 0U, // XCH_F 0U, // XCRYPTCBC 0U, // XCRYPTCFB 0U, // XCRYPTCTR 0U, // XCRYPTECB 0U, // XCRYPTOFB 0U, // XEND 0U, // XGETBV 0U, // XLAT 0U, // XOR16i16 0U, // XOR16mi 0U, // XOR16mi8 0U, // XOR16mr 0U, // XOR16ri 0U, // XOR16ri8 0U, // XOR16rm 0U, // XOR16rr 0U, // XOR16rr_REV 0U, // XOR32i32 0U, // XOR32mi 0U, // XOR32mi8 0U, // XOR32mr 0U, // XOR32ri 0U, // XOR32ri8 0U, // XOR32rm 0U, // XOR32rr 0U, // XOR32rr_REV 0U, // XOR64i32 0U, // XOR64mi32 0U, // XOR64mi8 0U, // XOR64mr 0U, // XOR64ri32 0U, // XOR64ri8 0U, // XOR64rm 0U, // XOR64rr 0U, // XOR64rr_REV 0U, // XOR8i8 0U, // XOR8mi 0U, // XOR8mi8 0U, // XOR8mr 0U, // XOR8ri 0U, // XOR8ri8 0U, // XOR8rm 0U, // XOR8rr 0U, // XOR8rr_REV 0U, // XORPDrm 0U, // XORPDrr 0U, // XORPSrm 0U, // XORPSrr 0U, // XRELEASE_PREFIX 0U, // XRSTOR 0U, // XRSTOR64 0U, // XRSTORS 0U, // XRSTORS64 0U, // XSAVE 0U, // XSAVE64 0U, // XSAVEC 0U, // XSAVEC64 0U, // XSAVEOPT 0U, // XSAVEOPT64 0U, // XSAVES 0U, // XSAVES64 0U, // XSETBV 0U, // XSHA1 0U, // XSHA256 0U, // XSTORE 0U, // XTEST 0U, // fdisi8087_nop 0U, // feni8087_nop 0U }; #ifndef CAPSTONE_DIET static char AsmStrs[] = { /* 0 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 't', '0', 9, 0, /* 12 */ 's', 'h', 'a', '1', 'm', 's', 'g', '1', 9, 0, /* 22 */ 's', 'h', 'a', '2', '5', '6', 'm', 's', 'g', '1', 9, 0, /* 34 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 't', '1', 9, 0, /* 46 */ 'p', 'f', 'r', 'c', 'p', 'i', 't', '1', 9, 0, /* 56 */ 'p', 'f', 'r', 's', 'q', 'i', 't', '1', 9, 0, /* 66 */ 'v', 'm', 'o', 'v', 'd', 'q', 'a', '3', '2', 9, 0, /* 77 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '3', '2', 9, 0, /* 88 */ 's', 'h', 'a', '1', 'm', 's', 'g', '2', 9, 0, /* 98 */ 's', 'h', 'a', '2', '5', '6', 'm', 's', 'g', '2', 9, 0, /* 110 */ 's', 'h', 'a', '2', '5', '6', 'r', 'n', 'd', 's', '2', 9, 0, /* 123 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 't', '2', 9, 0, /* 135 */ 'p', 'f', 'r', 'c', 'p', 'i', 't', '2', 9, 0, /* 145 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '6', '4', 'x', '2', 9, 0, /* 159 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '6', '4', 'x', '2', 9, 0, /* 173 */ 'v', 'm', 'o', 'v', 'd', 'q', 'a', '6', '4', 9, 0, /* 184 */ 'x', 's', 'a', 'v', 'e', 'c', '6', '4', 9, 0, /* 194 */ 'f', 'x', 's', 'a', 'v', 'e', '6', '4', 9, 0, /* 204 */ 'f', 'x', 'r', 's', 't', 'o', 'r', '6', '4', 9, 0, /* 215 */ 'x', 's', 'a', 'v', 'e', 's', '6', '4', 9, 0, /* 225 */ 'x', 'r', 's', 't', 'o', 'r', 's', '6', '4', 9, 0, /* 236 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', '6', '4', 9, 0, /* 248 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '6', '4', 9, 0, /* 259 */ 's', 'h', 'a', '1', 'r', 'n', 'd', 's', '4', 9, 0, /* 270 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'f', '3', '2', 'x', '4', 9, 0, /* 285 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '3', '2', 'x', '4', 9, 0, /* 299 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'i', '3', '2', 'x', '4', 9, 0, /* 314 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '3', '2', 'x', '4', 9, 0, /* 328 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'i', '3', '2', 'x', '4', 9, 0, /* 345 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'f', '6', '4', 'x', '4', 9, 0, /* 360 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '6', '4', 'x', '4', 9, 0, /* 374 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'i', '6', '4', 'x', '4', 9, 0, /* 389 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '6', '4', 'x', '4', 9, 0, /* 403 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'i', '6', '4', 'x', '4', 9, 0, /* 420 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '1', '6', 9, 0, /* 431 */ 'v', 'p', 'e', 'r', 'm', '2', 'f', '1', '2', '8', 9, 0, /* 443 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'f', '1', '2', '8', 9, 0, /* 457 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '1', '2', '8', 9, 0, /* 470 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'f', '1', '2', '8', 9, 0, /* 486 */ 'v', 'p', 'e', 'r', 'm', '2', 'i', '1', '2', '8', 9, 0, /* 498 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'i', '1', '2', '8', 9, 0, /* 512 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '1', '2', '8', 9, 0, /* 525 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '8', 9, 0, /* 535 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '3', '2', 'x', '8', 9, 0, /* 549 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '3', '2', 'x', '8', 9, 0, /* 563 */ 'j', 'a', 9, 0, /* 567 */ 'v', 'm', 'o', 'v', 'n', 't', 'd', 'q', 'a', 9, 0, /* 578 */ 'v', 'm', 'o', 'v', 'd', 'q', 'a', 9, 0, /* 587 */ 's', 'e', 't', 'a', 9, 0, /* 593 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 'n', 't', 'a', 9, 0, /* 606 */ 'c', 'r', 'c', '3', '2', 'b', 9, 0, /* 614 */ 'v', 'p', 'm', 'o', 'v', 'm', '2', 'b', 9, 0, /* 624 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '1', '6', 'b', 9, 0, /* 636 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '8', 'b', 9, 0, /* 647 */ 'v', 'p', 's', 'h', 'a', 'b', 9, 0, /* 655 */ 's', 'b', 'b', 'b', 9, 0, /* 661 */ 'v', 'p', 's', 'u', 'b', 'b', 9, 0, /* 669 */ 'a', 'd', 'c', 'b', 9, 0, /* 675 */ 'd', 'e', 'c', 'b', 9, 0, /* 681 */ 'i', 'n', 'c', 'b', 9, 0, /* 687 */ 'v', 'p', 'a', 'd', 'd', 'b', 9, 0, /* 695 */ 'x', 'a', 'd', 'd', 'b', 9, 0, /* 702 */ 'k', 'a', 'n', 'd', 'b', 9, 0, /* 709 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'd', 'b', 9, 0, /* 720 */ 'v', 'p', 'm', 'o', 'v', 's', 'd', 'b', 9, 0, /* 730 */ 'v', 'p', 'm', 'o', 'v', 'd', 'b', 9, 0, /* 739 */ 'v', 'p', 's', 'h', 'u', 'f', 'b', 9, 0, /* 748 */ 'n', 'e', 'g', 'b', 9, 0, /* 754 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', 'b', 9, 0, /* 764 */ 'v', 'p', 'a', 'v', 'g', 'b', 9, 0, /* 772 */ 'j', 'b', 9, 0, /* 776 */ 'v', 'p', 'm', 'o', 'v', 'm', 's', 'k', 'b', 9, 0, /* 787 */ 's', 'a', 'l', 'b', 9, 0, /* 793 */ 'r', 'c', 'l', 'b', 9, 0, /* 799 */ 'v', 'p', 's', 'h', 'l', 'b', 9, 0, /* 807 */ 'r', 'o', 'l', 'b', 9, 0, /* 813 */ 'k', 's', 'h', 'i', 'f', 't', 'l', 'b', 9, 0, /* 823 */ 'i', 'm', 'u', 'l', 'b', 9, 0, /* 830 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'm', 'b', 9, 0, /* 841 */ 'v', 'p', 'c', 'o', 'm', 'b', 9, 0, /* 849 */ 'k', 'a', 'n', 'd', 'n', 'b', 9, 0, /* 857 */ 'v', 'p', 's', 'i', 'g', 'n', 'b', 9, 0, /* 866 */ 'i', 'n', 'b', 9, 0, /* 871 */ 'f', 'c', 'm', 'o', 'v', 'n', 'b', 9, 0, /* 880 */ 'v', 'p', 'c', 'm', 'p', 'b', 9, 0, /* 888 */ 'v', 'p', 'c', 'm', 'p', 'e', 'q', 'b', 9, 0, /* 898 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'q', 'b', 9, 0, /* 909 */ 'v', 'p', 'm', 'o', 'v', 's', 'q', 'b', 9, 0, /* 919 */ 'v', 'p', 'm', 'o', 'v', 'q', 'b', 9, 0, /* 928 */ 's', 'a', 'r', 'b', 9, 0, /* 934 */ 'r', 'c', 'r', 'b', 9, 0, /* 940 */ 's', 'h', 'r', 'b', 9, 0, /* 946 */ 'k', 'o', 'r', 'b', 9, 0, /* 952 */ 'k', 'x', 'n', 'o', 'r', 'b', 9, 0, /* 960 */ 'r', 'o', 'r', 'b', 9, 0, /* 966 */ 'k', 'x', 'o', 'r', 'b', 9, 0, /* 973 */ 'v', 'p', 'i', 'n', 's', 'r', 'b', 9, 0, /* 982 */ 'k', 's', 'h', 'i', 'f', 't', 'r', 'b', 9, 0, /* 992 */ 'v', 'p', 'e', 'x', 't', 'r', 'b', 9, 0, /* 1001 */ 's', 'c', 'a', 's', 'b', 9, 0, /* 1008 */ 'v', 'p', 'a', 'b', 's', 'b', 9, 0, /* 1016 */ 'm', 'o', 'v', 'a', 'b', 's', 'b', 9, 0, /* 1025 */ 'v', 'p', 's', 'u', 'b', 's', 'b', 9, 0, /* 1034 */ 'v', 'p', 'a', 'd', 'd', 's', 'b', 9, 0, /* 1043 */ 'l', 'o', 'd', 's', 'b', 9, 0, /* 1050 */ 'v', 'p', 'm', 'i', 'n', 's', 'b', 9, 0, /* 1059 */ 'c', 'm', 'p', 's', 'b', 9, 0, /* 1066 */ 'o', 'u', 't', 's', 'b', 9, 0, /* 1073 */ 'v', 'p', 's', 'u', 'b', 'u', 's', 'b', 9, 0, /* 1083 */ 'v', 'p', 'a', 'd', 'd', 'u', 's', 'b', 9, 0, /* 1093 */ 'p', 'a', 'v', 'g', 'u', 's', 'b', 9, 0, /* 1102 */ 'm', 'o', 'v', 's', 'b', 9, 0, /* 1109 */ 'v', 'p', 'm', 'a', 'x', 's', 'b', 9, 0, /* 1118 */ 's', 'e', 't', 'b', 9, 0, /* 1124 */ 'v', 'p', 'c', 'm', 'p', 'g', 't', 'b', 9, 0, /* 1134 */ 'k', 'n', 'o', 't', 'b', 9, 0, /* 1141 */ 'v', 'p', 'r', 'o', 't', 'b', 9, 0, /* 1149 */ 'v', 'p', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'b', 9, 0, /* 1163 */ 'k', 'o', 'r', 't', 'e', 's', 't', 'b', 9, 0, /* 1173 */ 'v', 'p', 'c', 'o', 'm', 'u', 'b', 9, 0, /* 1182 */ 'v', 'p', 'm', 'i', 'n', 'u', 'b', 9, 0, /* 1191 */ 'v', 'p', 'c', 'm', 'p', 'u', 'b', 9, 0, /* 1200 */ 'p', 'f', 's', 'u', 'b', 9, 0, /* 1207 */ 'v', 'p', 'm', 'a', 'x', 'u', 'b', 9, 0, /* 1216 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'v', 'b', 9, 0, /* 1227 */ 'i', 'd', 'i', 'v', 'b', 9, 0, /* 1234 */ 'f', 'c', 'm', 'o', 'v', 'b', 9, 0, /* 1242 */ 'k', 'm', 'o', 'v', 'b', 9, 0, /* 1249 */ 'c', 'l', 'w', 'b', 9, 0, /* 1255 */ 'v', 'p', 'a', 'c', 'k', 's', 's', 'w', 'b', 9, 0, /* 1266 */ 'v', 'p', 'a', 'c', 'k', 'u', 's', 'w', 'b', 9, 0, /* 1277 */ 'p', 'f', 'a', 'c', 'c', 9, 0, /* 1284 */ 'p', 'f', 'n', 'a', 'c', 'c', 9, 0, /* 1292 */ 'p', 'f', 'p', 'n', 'a', 'c', 'c', 9, 0, /* 1301 */ 'v', 'a', 'e', 's', 'd', 'e', 'c', 9, 0, /* 1310 */ 'x', 's', 'a', 'v', 'e', 'c', 9, 0, /* 1318 */ 'b', 'l', 'c', 'i', 'c', 9, 0, /* 1325 */ 'b', 'l', 's', 'i', 'c', 9, 0, /* 1332 */ 't', '1', 'm', 's', 'k', 'c', 9, 0, /* 1340 */ 'v', 'a', 'e', 's', 'i', 'm', 'c', 9, 0, /* 1349 */ 'v', 'a', 'e', 's', 'e', 'n', 'c', 9, 0, /* 1358 */ 'v', 'p', 'e', 'r', 'm', 'i', '2', 'd', 9, 0, /* 1368 */ 'v', 'p', 'm', 'o', 'v', 'm', '2', 'd', 9, 0, /* 1378 */ 'v', 'p', 'e', 'r', 'm', 't', '2', 'd', 9, 0, /* 1388 */ 'v', 'p', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'm', 'w', '2', 'd', 9, 0, /* 1405 */ 'a', 'a', 'd', 9, 0, /* 1410 */ 'v', 'p', 's', 'h', 'a', 'd', 9, 0, /* 1418 */ 'v', 'p', 's', 'r', 'a', 'd', 9, 0, /* 1426 */ 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'd', 9, 0, /* 1436 */ 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'd', 9, 0, /* 1447 */ 'v', 'p', 'h', 's', 'u', 'b', 'd', 9, 0, /* 1456 */ 'v', 'p', 's', 'u', 'b', 'd', 9, 0, /* 1464 */ 'v', 'p', 'm', 'o', 'v', 's', 'x', 'b', 'd', 9, 0, /* 1475 */ 'v', 'p', 'm', 'o', 'v', 'z', 'x', 'b', 'd', 9, 0, /* 1486 */ 'p', 'f', 'a', 'd', 'd', 9, 0, /* 1493 */ 'v', 'p', 'h', 'a', 'd', 'd', 'd', 9, 0, /* 1502 */ 'v', 'p', 'a', 'd', 'd', 'd', 9, 0, /* 1510 */ 'k', 'a', 'n', 'd', 'd', 9, 0, /* 1517 */ 'v', 'p', 'a', 'n', 'd', 'd', 9, 0, /* 1525 */ 'v', 'p', 'e', 'x', 'p', 'a', 'n', 'd', 'd', 9, 0, /* 1536 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'd', 9, 0, /* 1546 */ 'v', 'p', 'g', 'a', 't', 'h', 'e', 'r', 'd', 'd', 9, 0, /* 1558 */ 'v', 'p', 's', 'c', 'a', 't', 't', 'e', 'r', 'd', 'd', 9, 0, /* 1571 */ 'v', 'p', 'm', 'a', 'c', 's', 'd', 'd', 9, 0, /* 1581 */ 'v', 'p', 'm', 'a', 'c', 's', 's', 'd', 'd', 9, 0, /* 1592 */ 'p', 'i', '2', 'f', 'd', 9, 0, /* 1599 */ 'v', 'p', 's', 'h', 'u', 'f', 'd', 9, 0, /* 1608 */ 'p', 'f', '2', 'i', 'd', 9, 0, /* 1615 */ 'i', 'n', 'v', 'p', 'c', 'i', 'd', 9, 0, /* 1624 */ 'i', 'n', 'v', 'v', 'p', 'i', 'd', 9, 0, /* 1633 */ 'f', 'b', 'l', 'd', 9, 0, /* 1639 */ 'f', 'l', 'd', 9, 0, /* 1644 */ 'v', 'p', 's', 'h', 'l', 'd', 9, 0, /* 1652 */ 'v', 'p', 's', 'l', 'l', 'd', 9, 0, /* 1660 */ 'v', 'p', 'm', 'u', 'l', 'l', 'd', 9, 0, /* 1669 */ 'v', 'p', 's', 'r', 'l', 'd', 9, 0, /* 1677 */ 'v', 'm', 'p', 't', 'r', 'l', 'd', 9, 0, /* 1686 */ 'k', 's', 'h', 'i', 'f', 't', 'l', 'd', 9, 0, /* 1696 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'm', 'd', 9, 0, /* 1707 */ 'v', 'p', 't', 'e', 's', 't', 'n', 'm', 'd', 9, 0, /* 1718 */ 'v', 'p', 'c', 'o', 'm', 'd', 9, 0, /* 1726 */ 'v', 'p', 'e', 'r', 'm', 'd', 9, 0, /* 1734 */ 'v', 'p', 't', 'e', 's', 't', 'm', 'd', 9, 0, /* 1744 */ 'v', 'p', 'a', 'n', 'd', 9, 0, /* 1751 */ 'k', 'a', 'n', 'd', 'n', 'd', 9, 0, /* 1759 */ 'v', 'p', 'a', 'n', 'd', 'n', 'd', 9, 0, /* 1768 */ 'v', 'a', 'l', 'i', 'g', 'n', 'd', 9, 0, /* 1777 */ 'v', 'p', 's', 'i', 'g', 'n', 'd', 9, 0, /* 1786 */ 'b', 'o', 'u', 'n', 'd', 9, 0, /* 1793 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '2', '3', '1', 'p', 'd', 9, 0, /* 1809 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '3', '1', 'p', 'd', 9, 0, /* 1822 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '3', '1', 'p', 'd', 9, 0, /* 1836 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '2', '3', '1', 'p', 'd', 9, 0, /* 1852 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '3', '1', 'p', 'd', 9, 0, /* 1865 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '3', '1', 'p', 'd', 9, 0, /* 1879 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '1', '3', '2', 'p', 'd', 9, 0, /* 1895 */ 'v', 'f', 'm', 's', 'u', 'b', '1', '3', '2', 'p', 'd', 9, 0, /* 1908 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '1', '3', '2', 'p', 'd', 9, 0, /* 1922 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '1', '3', '2', 'p', 'd', 9, 0, /* 1938 */ 'v', 'f', 'm', 'a', 'd', 'd', '1', '3', '2', 'p', 'd', 9, 0, /* 1951 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '1', '3', '2', 'p', 'd', 9, 0, /* 1965 */ 'v', 'p', 'e', 'r', 'm', 'i', '2', 'p', 'd', 9, 0, /* 1976 */ 'c', 'v', 't', 'p', 'i', '2', 'p', 'd', 9, 0, /* 1986 */ 'v', 'p', 'e', 'r', 'm', 'i', 'l', '2', 'p', 'd', 9, 0, /* 1998 */ 'v', 'e', 'x', 'p', '2', 'p', 'd', 9, 0, /* 2007 */ 'v', 'c', 'v', 't', 'd', 'q', '2', 'p', 'd', 9, 0, /* 2018 */ 'v', 'c', 'v', 't', 'u', 'd', 'q', '2', 'p', 'd', 9, 0, /* 2030 */ 'v', 'c', 'v', 't', 'p', 's', '2', 'p', 'd', 9, 0, /* 2041 */ 'v', 'p', 'e', 'r', 'm', 't', '2', 'p', 'd', 9, 0, /* 2052 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '2', '1', '3', 'p', 'd', 9, 0, /* 2068 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '1', '3', 'p', 'd', 9, 0, /* 2081 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '1', '3', 'p', 'd', 9, 0, /* 2095 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '2', '1', '3', 'p', 'd', 9, 0, /* 2111 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '1', '3', 'p', 'd', 9, 0, /* 2124 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '1', '3', 'p', 'd', 9, 0, /* 2138 */ 'v', 'r', 'c', 'p', '1', '4', 'p', 'd', 9, 0, /* 2148 */ 'v', 'r', 's', 'q', 'r', 't', '1', '4', 'p', 'd', 9, 0, /* 2160 */ 'v', 'r', 'c', 'p', '2', '8', 'p', 'd', 9, 0, /* 2170 */ 'v', 'r', 's', 'q', 'r', 't', '2', '8', 'p', 'd', 9, 0, /* 2182 */ 'v', 'm', 'o', 'v', 'a', 'p', 'd', 9, 0, /* 2191 */ 'p', 's', 'w', 'a', 'p', 'd', 9, 0, /* 2199 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2212 */ 'v', 'a', 'd', 'd', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2223 */ 'v', 'h', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2232 */ 'v', 'f', 'm', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2242 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2253 */ 'v', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2261 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'd', 'p', 'd', 9, 0, /* 2276 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'd', 'p', 'd', 9, 0, /* 2292 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'd', 'p', 'd', 9, 0, /* 2307 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'd', 'p', 'd', 9, 0, /* 2323 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2336 */ 'v', 'h', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2345 */ 'v', 'f', 'm', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2355 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2366 */ 'v', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2374 */ 'v', 'e', 'x', 'p', 'a', 'n', 'd', 'p', 'd', 9, 0, /* 2385 */ 'v', 'a', 'n', 'd', 'p', 'd', 9, 0, /* 2393 */ 'v', 'b', 'l', 'e', 'n', 'd', 'p', 'd', 9, 0, /* 2403 */ 'v', 'r', 'o', 'u', 'n', 'd', 'p', 'd', 9, 0, /* 2413 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'd', 'p', 'd', 9, 0, /* 2425 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'd', 'p', 'd', 9, 0, /* 2438 */ 'v', 'r', 'n', 'd', 's', 'c', 'a', 'l', 'e', 'p', 'd', 9, 0, /* 2451 */ 'v', 's', 'h', 'u', 'f', 'p', 'd', 9, 0, /* 2460 */ 'v', 'u', 'n', 'p', 'c', 'k', 'h', 'p', 'd', 9, 0, /* 2471 */ 'v', 'm', 'o', 'v', 'h', 'p', 'd', 9, 0, /* 2480 */ 'v', 'm', 'o', 'v', 'm', 's', 'k', 'p', 'd', 9, 0, /* 2491 */ 'v', 'p', 'e', 'r', 'm', 'i', 'l', 'p', 'd', 9, 0, /* 2502 */ 'v', 'u', 'n', 'p', 'c', 'k', 'l', 'p', 'd', 9, 0, /* 2513 */ 'v', 'm', 'u', 'l', 'p', 'd', 9, 0, /* 2521 */ 'v', 'm', 'o', 'v', 'l', 'p', 'd', 9, 0, /* 2530 */ 'v', 'p', 'c', 'm', 'p', 'd', 9, 0, /* 2538 */ 'v', 'b', 'l', 'e', 'n', 'd', 'm', 'p', 'd', 9, 0, /* 2549 */ 'v', 'p', 'e', 'r', 'm', 'p', 'd', 9, 0, /* 2558 */ 'v', 'a', 'n', 'd', 'n', 'p', 'd', 9, 0, /* 2567 */ 'v', 'm', 'i', 'n', 'p', 'd', 9, 0, /* 2575 */ 'v', 'd', 'p', 'p', 'd', 9, 0, /* 2582 */ 'v', 'c', 'm', 'p', 'p', 'd', 9, 0, /* 2590 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'q', 'p', 'd', 9, 0, /* 2605 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'q', 'p', 'd', 9, 0, /* 2621 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'q', 'p', 'd', 9, 0, /* 2636 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'q', 'p', 'd', 9, 0, /* 2652 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'q', 'p', 'd', 9, 0, /* 2664 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'q', 'p', 'd', 9, 0, /* 2677 */ 'v', 'o', 'r', 'p', 'd', 9, 0, /* 2684 */ 'v', 'x', 'o', 'r', 'p', 'd', 9, 0, /* 2692 */ 'v', 'c', 'o', 'm', 'p', 'r', 'e', 's', 's', 'p', 'd', 9, 0, /* 2705 */ 'v', 'm', 'o', 'v', 'n', 't', 'p', 'd', 9, 0, /* 2715 */ 'v', 's', 'q', 'r', 't', 'p', 'd', 9, 0, /* 2724 */ 'v', 't', 'e', 's', 't', 'p', 'd', 9, 0, /* 2733 */ 'v', 'm', 'o', 'v', 'u', 'p', 'd', 9, 0, /* 2742 */ 'v', 'b', 'l', 'e', 'n', 'd', 'v', 'p', 'd', 9, 0, /* 2753 */ 'v', 'd', 'i', 'v', 'p', 'd', 9, 0, /* 2761 */ 'v', 'm', 'a', 's', 'k', 'm', 'o', 'v', 'p', 'd', 9, 0, /* 2773 */ 'v', 'm', 'a', 'x', 'p', 'd', 9, 0, /* 2781 */ 'v', 'f', 'r', 'c', 'z', 'p', 'd', 9, 0, /* 2790 */ 'v', 'p', 'c', 'm', 'p', 'e', 'q', 'd', 9, 0, /* 2800 */ 'v', 'p', 'g', 'a', 't', 'h', 'e', 'r', 'q', 'd', 9, 0, /* 2812 */ 'v', 'p', 's', 'c', 'a', 't', 't', 'e', 'r', 'q', 'd', 9, 0, /* 2825 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'q', 'd', 9, 0, /* 2836 */ 'v', 'p', 'm', 'o', 'v', 's', 'q', 'd', 9, 0, /* 2846 */ 'v', 'p', 'm', 'o', 'v', 'q', 'd', 9, 0, /* 2855 */ 'k', 'o', 'r', 'd', 9, 0, /* 2861 */ 'k', 'x', 'n', 'o', 'r', 'd', 9, 0, /* 2869 */ 'v', 'p', 'o', 'r', 'd', 9, 0, /* 2876 */ 'k', 'x', 'o', 'r', 'd', 9, 0, /* 2883 */ 'v', 'p', 'x', 'o', 'r', 'd', 9, 0, /* 2891 */ 'v', 'p', 'i', 'n', 's', 'r', 'd', 9, 0, /* 2900 */ 'k', 's', 'h', 'i', 'f', 't', 'r', 'd', 9, 0, /* 2910 */ 'v', 'p', 'e', 'x', 't', 'r', 'd', 9, 0, /* 2919 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '3', '1', 's', 'd', 9, 0, /* 2932 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '3', '1', 's', 'd', 9, 0, /* 2946 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '3', '1', 's', 'd', 9, 0, /* 2959 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '3', '1', 's', 'd', 9, 0, /* 2973 */ 'v', 'f', 'm', 's', 'u', 'b', '1', '3', '2', 's', 'd', 9, 0, /* 2986 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '1', '3', '2', 's', 'd', 9, 0, /* 3000 */ 'v', 'f', 'm', 'a', 'd', 'd', '1', '3', '2', 's', 'd', 9, 0, /* 3013 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '1', '3', '2', 's', 'd', 9, 0, /* 3027 */ 'v', 'c', 'v', 't', 's', 's', '2', 's', 'd', 9, 0, /* 3038 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '1', '3', 's', 'd', 9, 0, /* 3051 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '1', '3', 's', 'd', 9, 0, /* 3065 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '1', '3', 's', 'd', 9, 0, /* 3078 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '1', '3', 's', 'd', 9, 0, /* 3092 */ 'v', 'r', 'c', 'p', '1', '4', 's', 'd', 9, 0, /* 3102 */ 'v', 'r', 's', 'q', 'r', 't', '1', '4', 's', 'd', 9, 0, /* 3114 */ 'v', 'r', 'c', 'p', '2', '8', 's', 'd', 9, 0, /* 3124 */ 'v', 'r', 's', 'q', 'r', 't', '2', '8', 's', 'd', 9, 0, /* 3136 */ 'v', 'p', 'a', 'b', 's', 'd', 9, 0, /* 3144 */ 'v', 'f', 'm', 's', 'u', 'b', 's', 'd', 9, 0, /* 3154 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', 's', 'd', 9, 0, /* 3165 */ 'v', 's', 'u', 'b', 's', 'd', 9, 0, /* 3173 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'd', 9, 0, /* 3183 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', 's', 'd', 9, 0, /* 3194 */ 'v', 'a', 'd', 'd', 's', 'd', 9, 0, /* 3202 */ 'v', 'r', 'o', 'u', 'n', 'd', 's', 'd', 9, 0, /* 3212 */ 'v', 'r', 'n', 'd', 's', 'c', 'a', 'l', 'e', 's', 'd', 9, 0, /* 3225 */ 'v', 'u', 'c', 'o', 'm', 'i', 's', 'd', 9, 0, /* 3235 */ 'v', 'c', 'o', 'm', 'i', 's', 'd', 9, 0, /* 3244 */ 'v', 'm', 'u', 'l', 's', 'd', 9, 0, /* 3252 */ 'v', 'p', 'm', 'i', 'n', 's', 'd', 9, 0, /* 3261 */ 'v', 'm', 'i', 'n', 's', 'd', 9, 0, /* 3269 */ 'v', 'c', 'm', 'p', 's', 'd', 9, 0, /* 3277 */ 'v', 'p', 'c', 'o', 'm', 'p', 'r', 'e', 's', 's', 'd', 9, 0, /* 3290 */ 'm', 'o', 'v', 'n', 't', 's', 'd', 9, 0, /* 3299 */ 'v', 's', 'q', 'r', 't', 's', 'd', 9, 0, /* 3308 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 's', 'd', 9, 0, /* 3322 */ 'v', 'd', 'i', 'v', 's', 'd', 9, 0, /* 3330 */ 'v', 'm', 'o', 'v', 's', 'd', 9, 0, /* 3338 */ 'v', 'p', 'm', 'a', 'x', 's', 'd', 9, 0, /* 3347 */ 'v', 'm', 'a', 'x', 's', 'd', 9, 0, /* 3355 */ 'v', 'f', 'r', 'c', 'z', 's', 'd', 9, 0, /* 3364 */ 'v', 'p', 'c', 'o', 'n', 'f', 'l', 'i', 'c', 't', 'd', 9, 0, /* 3377 */ 'v', 'p', 'c', 'm', 'p', 'g', 't', 'd', 9, 0, /* 3387 */ 'v', 'p', 'l', 'z', 'c', 'n', 't', 'd', 9, 0, /* 3397 */ 'k', 'n', 'o', 't', 'd', 9, 0, /* 3404 */ 'v', 'p', 'r', 'o', 't', 'd', 9, 0, /* 3412 */ 'v', 'p', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'd', 9, 0, /* 3426 */ 'k', 'o', 'r', 't', 'e', 's', 't', 'd', 9, 0, /* 3436 */ 'v', 'p', 'c', 'o', 'm', 'u', 'd', 9, 0, /* 3445 */ 'v', 'p', 'm', 'i', 'n', 'u', 'd', 9, 0, /* 3454 */ 'v', 'p', 'c', 'm', 'p', 'u', 'd', 9, 0, /* 3463 */ 'v', 'p', 'm', 'a', 'x', 'u', 'd', 9, 0, /* 3472 */ 'v', 'p', 's', 'r', 'a', 'v', 'd', 9, 0, /* 3481 */ 'v', 'p', 's', 'l', 'l', 'v', 'd', 9, 0, /* 3490 */ 'v', 'p', 's', 'r', 'l', 'v', 'd', 9, 0, /* 3499 */ 'v', 'p', 'm', 'a', 's', 'k', 'm', 'o', 'v', 'd', 9, 0, /* 3511 */ 'v', 'm', 'o', 'v', 'd', 9, 0, /* 3518 */ 'v', 'p', 'h', 's', 'u', 'b', 'w', 'd', 9, 0, /* 3528 */ 'v', 'p', 'h', 'a', 'd', 'd', 'w', 'd', 9, 0, /* 3538 */ 'v', 'p', 'm', 'a', 'd', 'd', 'w', 'd', 9, 0, /* 3548 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'h', 'w', 'd', 9, 0, /* 3560 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'l', 'w', 'd', 9, 0, /* 3572 */ 'v', 'p', 'm', 'a', 'c', 's', 'w', 'd', 9, 0, /* 3582 */ 'v', 'p', 'm', 'a', 'd', 'c', 's', 'w', 'd', 9, 0, /* 3593 */ 'v', 'p', 'm', 'a', 'c', 's', 's', 'w', 'd', 9, 0, /* 3604 */ 'v', 'p', 'm', 'a', 'd', 'c', 's', 's', 'w', 'd', 9, 0, /* 3616 */ 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'w', 'd', 9, 0, /* 3627 */ 'v', 'p', 'm', 'o', 'v', 's', 'x', 'w', 'd', 9, 0, /* 3638 */ 'v', 'p', 'm', 'o', 'v', 'z', 'x', 'w', 'd', 9, 0, /* 3649 */ 'j', 'a', 'e', 9, 0, /* 3654 */ 's', 'e', 't', 'a', 'e', 9, 0, /* 3661 */ 'j', 'b', 'e', 9, 0, /* 3666 */ 'f', 'c', 'm', 'o', 'v', 'n', 'b', 'e', 9, 0, /* 3676 */ 's', 'e', 't', 'b', 'e', 9, 0, /* 3683 */ 'f', 'c', 'm', 'o', 'v', 'b', 'e', 9, 0, /* 3692 */ 'f', 'f', 'r', 'e', 'e', 9, 0, /* 3699 */ 'j', 'g', 'e', 9, 0, /* 3704 */ 'p', 'f', 'c', 'm', 'p', 'g', 'e', 9, 0, /* 3713 */ 's', 'e', 't', 'g', 'e', 9, 0, /* 3720 */ 'j', 'e', 9, 0, /* 3724 */ 'j', 'l', 'e', 9, 0, /* 3729 */ 's', 'e', 't', 'l', 'e', 9, 0, /* 3736 */ 'j', 'n', 'e', 9, 0, /* 3741 */ 'l', 'o', 'o', 'p', 'n', 'e', 9, 0, /* 3749 */ 's', 'e', 't', 'n', 'e', 9, 0, /* 3756 */ 'f', 'c', 'm', 'o', 'v', 'n', 'e', 9, 0, /* 3765 */ 'l', 'o', 'o', 'p', 'e', 9, 0, /* 3772 */ 's', 'e', 't', 'e', 9, 0, /* 3778 */ 's', 'h', 'a', '1', 'n', 'e', 'x', 't', 'e', 9, 0, /* 3789 */ 'f', 'n', 's', 'a', 'v', 'e', 9, 0, /* 3797 */ 'f', 'x', 's', 'a', 'v', 'e', 9, 0, /* 3805 */ 'f', 'c', 'm', 'o', 'v', 'e', 9, 0, /* 3813 */ 'j', 'g', 9, 0, /* 3817 */ 'i', 'n', 'v', 'l', 'p', 'g', 9, 0, /* 3825 */ 's', 'e', 't', 'g', 9, 0, /* 3831 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 9, 0, /* 3841 */ 'f', 'x', 'c', 'h', 9, 0, /* 3847 */ 'v', 'c', 'v', 't', 'p', 's', '2', 'p', 'h', 9, 0, /* 3858 */ 'v', 'p', 'm', 'a', 'c', 's', 'd', 'q', 'h', 9, 0, /* 3869 */ 'v', 'p', 'm', 'a', 'c', 's', 's', 'd', 'q', 'h', 9, 0, /* 3881 */ 'c', 'l', 'f', 'l', 'u', 's', 'h', 9, 0, /* 3890 */ 'b', 'l', 'c', 'i', 9, 0, /* 3896 */ 'f', 'c', 'o', 'm', 'i', 9, 0, /* 3903 */ 'f', 'u', 'c', 'o', 'm', 'i', 9, 0, /* 3911 */ 'c', 'v', 't', 't', 'p', 'd', '2', 'p', 'i', 9, 0, /* 3922 */ 'c', 'v', 't', 'p', 'd', '2', 'p', 'i', 9, 0, /* 3932 */ 'c', 'v', 't', 't', 'p', 's', '2', 'p', 'i', 9, 0, /* 3943 */ 'c', 'v', 't', 'p', 's', '2', 'p', 'i', 9, 0, /* 3953 */ 'f', 'c', 'o', 'm', 'i', 'p', 9, 0, /* 3961 */ 'f', 'u', 'c', 'o', 'm', 'i', 'p', 9, 0, /* 3970 */ 'v', 'p', 'c', 'm', 'p', 'e', 's', 't', 'r', 'i', 9, 0, /* 3982 */ 'v', 'p', 'c', 'm', 'p', 'i', 's', 't', 'r', 'i', 9, 0, /* 3994 */ 'v', 'c', 'v', 't', 't', 's', 'd', '2', 's', 'i', 9, 0, /* 4006 */ 'v', 'c', 'v', 't', 's', 'd', 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'l', 9, 0, /* 4529 */ 'r', 'o', 'l', 'l', 9, 0, /* 4535 */ 'f', 'i', 's', 't', 'p', 'l', 'l', 9, 0, /* 4544 */ 'f', 'i', 's', 't', 't', 'p', 'l', 'l', 9, 0, /* 4554 */ 'l', 's', 'l', 'l', 9, 0, /* 4560 */ 'f', 'm', 'u', 'l', 'l', 9, 0, /* 4567 */ 'f', 'i', 'm', 'u', 'l', 'l', 9, 0, /* 4575 */ 'c', 'm', 'o', 'v', 'l', 'l', 9, 0, /* 4583 */ 'f', 'c', 'o', 'm', 'l', 9, 0, /* 4590 */ 'f', 'i', 'c', 'o', 'm', 'l', 9, 0, /* 4598 */ 'a', 'n', 'd', 'n', 'l', 9, 0, /* 4605 */ 'i', 'n', 'l', 9, 0, /* 4610 */ 'c', 'm', 'o', 'v', 'n', 'o', 'l', 9, 0, /* 4619 */ 'c', 'm', 'o', 'v', 'o', 'l', 9, 0, /* 4627 */ 'b', 's', 'w', 'a', 'p', 'l', 9, 0, /* 4635 */ 'p', 'd', 'e', 'p', 'l', 9, 0, /* 4642 */ 'c', 'm', 'p', 'l', 9, 0, /* 4648 */ 'l', 'j', 'm', 'p', 'l', 9, 0, /* 4655 */ 'f', 'c', 'o', 'm', 'p', 'l', 9, 0, /* 4663 */ 'f', 'i', 'c', 'o', 'm', 'p', 'l', 9, 0, /* 4672 */ 'c', 'm', 'o', 'v', 'n', 'p', 'l', 9, 0, /* 4681 */ 'n', 'o', 'p', 'l', 9, 0, /* 4687 */ 'p', 'o', 'p', 'l', 9, 0, /* 4693 */ 'a', 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'l', 9, 0, /* 5034 */ 'l', 'z', 'c', 'n', 't', 'l', 9, 0, /* 5042 */ 't', 'z', 'c', 'n', 't', 'l', 9, 0, /* 5050 */ 'n', 'o', 't', 'l', 9, 0, /* 5056 */ 't', 'e', 's', 't', 'l', 9, 0, /* 5063 */ 'f', 's', 't', 'l', 9, 0, /* 5069 */ 'f', 'i', 's', 't', 'l', 9, 0, /* 5076 */ 'p', 'e', 'x', 't', 'l', 9, 0, /* 5083 */ 'p', 'f', 'm', 'u', 'l', 9, 0, /* 5090 */ 'f', 'd', 'i', 'v', 'l', 9, 0, /* 5097 */ 'f', 'i', 'd', 'i', 'v', 'l', 9, 0, /* 5105 */ 'm', 'o', 'v', 'l', 9, 0, /* 5111 */ 's', 'm', 's', 'w', 'l', 9, 0, /* 5118 */ 'm', 'o', 'v', 's', 'w', 'l', 9, 0, /* 5126 */ 'm', 'o', 'v', 'z', 'w', 'l', 9, 0, /* 5134 */ 'a', 'd', 'c', 'x', 'l', 9, 0, /* 5141 */ 's', 'h', 'l', 'x', 'l', 9, 0, /* 5148 */ 'm', 'u', 'l', 'x', 'l', 9, 0, /* 5155 */ 'a', 'd', 'o', 'x', 'l', 9, 0, /* 5162 */ 's', 'a', 'r', 'x', 'l', 9, 0, /* 5169 */ 's', 'h', 'r', 'x', 'l', 9, 0, /* 5176 */ 'r', 'o', 'r', 'x', 'l', 9, 0, /* 5183 */ 'a', 'a', 'm', 9, 0, /* 5188 */ 'f', 'c', 'o', 'm', 9, 0, /* 5194 */ 'f', 'u', 'c', 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'a', 'q', 9, 0, /* 5542 */ 'v', 'p', 's', 'r', 'a', 'q', 9, 0, /* 5550 */ 'c', 'm', 'o', 'v', 'a', 'q', 9, 0, /* 5558 */ 's', 'b', 'b', 'q', 9, 0, /* 5564 */ 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'q', 9, 0, /* 5574 */ 'm', 'o', 'v', 's', 'b', 'q', 9, 0, /* 5582 */ 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'q', 9, 0, /* 5593 */ 'v', 'p', 's', 'u', 'b', 'q', 9, 0, /* 5601 */ 'c', 'm', 'o', 'v', 'b', 'q', 9, 0, /* 5609 */ 'v', 'p', 'm', 'o', 'v', 's', 'x', 'b', 'q', 9, 0, /* 5620 */ 'v', 'p', 'm', 'o', 'v', 'z', 'x', 'b', 'q', 9, 0, /* 5631 */ 'm', 'o', 'v', 'z', 'b', 'q', 9, 0, /* 5639 */ 'a', 'd', 'c', 'q', 9, 0, /* 5645 */ 'd', 'e', 'c', 'q', 9, 0, /* 5651 */ 'i', 'n', 'c', 'q', 9, 0, /* 5657 */ 'b', 't', 'c', 'q', 9, 0, /* 5663 */ 'v', 'c', 'v', 't', 't', 'p', 'd', '2', 'd', 'q', 9, 0, /* 5675 */ 'v', 'c', 'v', 't', 'p', 'd', '2', 'd', 'q', 9, 0, /* 5686 */ 'm', 'o', 'v', 'q', '2', 'd', 'q', 9, 0, /* 5695 */ 'v', 'c', 'v', 't', 't', 'p', 's', '2', 'd', 'q', 9, 0, /* 5707 */ 'v', 'c', 'v', 't', 'p', 's', '2', 'd', 'q', 9, 0, /* 5718 */ 'v', 'm', 'r', 'e', 'a', 'd', 'q', 9, 0, /* 5727 */ 'v', 'p', 'h', 's', 'u', 'b', 'd', 'q', 9, 0, /* 5737 */ 'v', 'p', 'a', 'd', 'd', 'q', 9, 0, /* 5745 */ 'x', 'a', 'd', 'd', 'q', 9, 0, /* 5752 */ 'v', 'p', 'h', 'a', 'd', 'd', 'd', 'q', 9, 0, /* 5762 */ 'r', 'd', 's', 'e', 'e', 'd', 'q', 9, 0, /* 5771 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'h', 'd', 'q', 9, 0, /* 5783 */ 's', 'h', 'l', 'd', 'q', 9, 0, /* 5790 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'l', 'd', 'q', 9, 0, /* 5802 */ 'v', 'p', 's', 'l', 'l', 'd', 'q', 9, 0, /* 5811 */ 'v', 'p', 's', 'r', 'l', 'd', 'q', 9, 0, /* 5820 */ 'v', 'p', 'm', 'u', 'l', 'd', 'q', 9, 0, /* 5829 */ 'k', 'a', 'n', 'd', 'q', 9, 0, /* 5836 */ 'v', 'p', 'a', 'n', 'd', 'q', 9, 0, /* 5844 */ 'v', 'p', 'e', 'x', 'p', 'a', 'n', 'd', 'q', 9, 0, /* 5855 */ 'r', 'd', 'r', 'a', 'n', 'd', 'q', 9, 0, /* 5864 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'h', 'q', 'd', 'q', 9, 0, /* 5877 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'l', 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9, 0, /* 8146 */ 'v', 'a', 'n', 'd', 'n', 'p', 's', 9, 0, /* 8155 */ 'v', 'm', 'i', 'n', 'p', 's', 9, 0, /* 8163 */ 'v', 'r', 'c', 'p', 'p', 's', 9, 0, /* 8171 */ 'v', 'd', 'p', 'p', 's', 9, 0, /* 8178 */ 'v', 'c', 'm', 'p', 'p', 's', 9, 0, /* 8186 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'q', 'p', 's', 9, 0, /* 8201 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'q', 'p', 's', 9, 0, /* 8217 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'q', 'p', 's', 9, 0, /* 8232 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'q', 'p', 's', 9, 0, /* 8248 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'q', 'p', 's', 9, 0, /* 8260 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'q', 'p', 's', 9, 0, /* 8273 */ 'v', 'o', 'r', 'p', 's', 9, 0, /* 8280 */ 'v', 'x', 'o', 'r', 'p', 's', 9, 0, /* 8288 */ 'v', 'c', 'o', 'm', 'p', 'r', 'e', 's', 's', 'p', 's', 9, 0, /* 8301 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'p', 's', 9, 0, /* 8313 */ 'v', 'm', 'o', 'v', 'n', 't', 'p', 's', 9, 0, /* 8323 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'p', 's', 9, 0, /* 8334 */ 'v', 'r', 's', 'q', 'r', 't', 'p', 's', 9, 0, /* 8344 */ 'v', 's', 'q', 'r', 't', 'p', 's', 9, 0, /* 8353 */ 'v', 't', 'e', 's', 't', 'p', 's', 9, 0, /* 8362 */ 'f', 's', 't', 'p', 's', 9, 0, /* 8369 */ 'f', 'i', 's', 't', 'p', 's', 9, 0, /* 8377 */ 'f', 'i', 's', 't', 't', 'p', 's', 9, 0, /* 8386 */ 'v', 'm', 'o', 'v', 'u', 'p', 's', 9, 0, /* 8395 */ 'v', 'b', 'l', 'e', 'n', 'd', 'v', 'p', 's', 9, 0, /* 8406 */ 'v', 'd', 'i', 'v', 'p', 's', 9, 0, /* 8414 */ 'v', 'm', 'a', 's', 'k', 'm', 'o', 'v', 'p', 's', 9, 0, /* 8426 */ 'v', 'm', 'a', 'x', 'p', 's', 9, 0, /* 8434 */ 'v', 'f', 'r', 'c', 'z', 'p', 's', 9, 0, /* 8443 */ 'f', 's', 'u', 'b', 'r', 's', 9, 0, /* 8451 */ 'f', 'i', 's', 'u', 'b', 'r', 's', 9, 0, /* 8460 */ 'x', 'r', 's', 't', 'o', 'r', 's', 9, 0, /* 8469 */ 'f', 'd', 'i', 'v', 'r', 's', 9, 0, /* 8477 */ 'f', 'i', 'd', 'i', 'v', 'r', 's', 9, 0, /* 8486 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '3', '1', 's', 's', 9, 0, /* 8499 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '3', '1', 's', 's', 9, 0, /* 8513 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '3', '1', 's', 's', 9, 0, /* 8526 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '3', '1', 's', 's', 9, 0, /* 8540 */ 'v', 'f', 'm', 's', 'u', 'b', '1', '3', '2', 's', 's', 9, 0, /* 8553 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '1', '3', '2', 's', 's', 9, 0, /* 8567 */ 'v', 'f', 'm', 'a', 'd', 'd', '1', '3', '2', 's', 's', 9, 0, /* 8580 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '1', '3', '2', 's', 's', 9, 0, /* 8594 */ 'v', 'c', 'v', 't', 's', 'd', '2', 's', 's', 9, 0, /* 8605 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '1', '3', 's', 's', 9, 0, /* 8618 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '1', '3', 's', 's', 9, 0, /* 8632 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '1', '3', 's', 's', 9, 0, /* 8645 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '1', '3', 's', 's', 9, 0, /* 8659 */ 'v', 'r', 'c', 'p', '1', '4', 's', 's', 9, 0, /* 8669 */ 'v', 'r', 's', 'q', 'r', 't', '1', '4', 's', 's', 9, 0, /* 8681 */ 'v', 'r', 'c', 'p', '2', '8', 's', 's', 9, 0, /* 8691 */ 'v', 'r', 's', 'q', 'r', 't', '2', '8', 's', 's', 9, 0, /* 8703 */ 'v', 'f', 'm', 's', 'u', 'b', 's', 's', 9, 0, /* 8713 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', 's', 's', 9, 0, /* 8724 */ 'v', 's', 'u', 'b', 's', 's', 9, 0, /* 8732 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 's', 9, 0, /* 8742 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', 's', 's', 9, 0, /* 8753 */ 'v', 'a', 'd', 'd', 's', 's', 9, 0, /* 8761 */ 'v', 'r', 'o', 'u', 'n', 'd', 's', 's', 9, 0, /* 8771 */ 'v', 'r', 'n', 'd', 's', 'c', 'a', 'l', 'e', 's', 's', 9, 0, /* 8784 */ 'v', 'u', 'c', 'o', 'm', 'i', 's', 's', 9, 0, /* 8794 */ 'v', 'c', 'o', 'm', 'i', 's', 's', 9, 0, /* 8803 */ 'v', 'm', 'u', 'l', 's', 's', 9, 0, /* 8811 */ 'v', 'm', 'i', 'n', 's', 's', 9, 0, /* 8819 */ 'v', 'r', 'c', 'p', 's', 's', 9, 0, /* 8827 */ 'v', 'c', 'm', 'p', 's', 's', 9, 0, /* 8835 */ 'm', 'o', 'v', 'n', 't', 's', 's', 9, 0, /* 8844 */ 'v', 'r', 's', 'q', 'r', 't', 's', 's', 9, 0, /* 8854 */ 'v', 's', 'q', 'r', 't', 's', 's', 9, 0, /* 8863 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 's', 's', 9, 0, /* 8877 */ 'v', 'd', 'i', 'v', 's', 's', 9, 0, /* 8885 */ 'v', 'm', 'o', 'v', 's', 's', 9, 0, /* 8893 */ 'v', 'm', 'a', 'x', 's', 's', 9, 0, /* 8901 */ 'v', 'f', 'r', 'c', 'z', 's', 's', 9, 0, /* 8910 */ 's', 'e', 't', 's', 9, 0, /* 8916 */ 'f', 's', 't', 's', 9, 0, /* 8922 */ 'f', 'i', 's', 't', 's', 9, 0, /* 8929 */ 'f', 'd', 'i', 'v', 's', 9, 0, /* 8936 */ 'f', 'i', 'd', 'i', 'v', 's', 9, 0, /* 8944 */ 'f', 'l', 'd', 't', 9, 0, /* 8950 */ 'p', 'f', 'c', 'm', 'p', 'g', 't', 9, 0, /* 8959 */ 'i', 'n', 't', 9, 0, /* 8964 */ 'i', 'n', 'v', 'e', 'p', 't', 9, 0, /* 8972 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', 9, 0, /* 8982 */ 'c', 'l', 'f', 'l', 'u', 's', 'h', 'o', 'p', 't', 9, 0, /* 8994 */ 'f', 's', 't', 'p', 't', 9, 0, /* 9001 */ 'x', 'a', 'b', 'o', 'r', 't', 9, 0, /* 9009 */ 'p', 'f', 'r', 's', 'q', 'r', 't', 9, 0, /* 9018 */ 'v', 'a', 'e', 's', 'd', 'e', 'c', 'l', 'a', 's', 't', 9, 0, /* 9031 */ 'v', 'a', 'e', 's', 'e', 'n', 'c', 'l', 'a', 's', 't', 9, 0, /* 9044 */ 'v', 'p', 't', 'e', 's', 't', 9, 0, /* 9052 */ 'f', 's', 't', 9, 0, /* 9057 */ 'v', 'a', 'e', 's', 'k', 'e', 'y', 'g', 'e', 'n', 'a', 's', 's', 'i', 's', 't', 9, 0, /* 9075 */ 'v', 'm', 'p', 't', 'r', 's', 't', 9, 0, /* 9084 */ 'f', 'c', 'm', 'o', 'v', 'n', 'u', 9, 0, /* 9093 */ 'v', 'l', 'd', 'd', 'q', 'u', 9, 0, /* 9101 */ 'v', 'm', 'a', 's', 'k', 'm', 'o', 'v', 'd', 'q', 'u', 9, 0, /* 9114 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', 9, 0, /* 9123 */ 'f', 'c', 'm', 'o', 'v', 'u', 9, 0, /* 9131 */ 'f', 'd', 'i', 'v', 9, 0, /* 9137 */ 'f', 'l', 'd', 'e', 'n', 'v', 9, 0, /* 9145 */ 'f', 'n', 's', 't', 'e', 'n', 'v', 9, 0, /* 9154 */ 'v', 'p', 'c', 'm', 'o', 'v', 9, 0, /* 9162 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0, /* 9170 */ 'v', 'p', 'm', 'o', 'v', 'm', '2', 'w', 9, 0, /* 9180 */ 'l', 'e', 'a', 'w', 9, 0, /* 9186 */ 'v', 'p', 's', 'h', 'a', 'w', 9, 0, /* 9194 */ 'v', 'p', 's', 'r', 'a', 'w', 9, 0, /* 9202 */ 'c', 'm', 'o', 'v', 'a', 'w', 9, 0, /* 9210 */ 's', 'b', 'b', 'w', 9, 0, /* 9216 */ 'v', 'p', 'h', 's', 'u', 'b', 'b', 'w', 9, 0, /* 9226 */ 'v', 'm', 'p', 's', 'a', 'd', 'b', 'w', 9, 0, /* 9236 */ 'v', 'p', 's', 'a', 'd', 'b', 'w', 9, 0, /* 9245 */ 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'w', 9, 0, /* 9255 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'h', 'b', 'w', 9, 0, /* 9267 */ 'k', 'u', 'n', 'p', 'c', 'k', 'b', 'w', 9, 0, /* 9277 */ 'v', 'p', 'u', 'n', 'p', 'c', 'k', 'l', 'b', 'w', 9, 0, /* 9289 */ 'm', 'o', 'v', 's', 'b', 'w', 9, 0, /* 9297 */ 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'w', 9, 0, /* 9308 */ 'v', 'p', 'h', 's', 'u', 'b', 'w', 9, 0, /* 9317 */ 'v', 'p', 's', 'u', 'b', 'w', 9, 0, /* 9325 */ 'c', 'm', 'o', 'v', 'b', 'w', 9, 0, /* 9333 */ 'v', 'p', 'm', 'o', 'v', 's', 'x', 'b', 'w', 9, 0, /* 9344 */ 'v', 'p', 'm', 'o', 'v', 'z', 'x', 'b', 'w', 9, 0, /* 9355 */ 'm', 'o', 'v', 'z', 'b', 'w', 9, 0, /* 9363 */ 'a', 'd', 'c', 'w', 9, 0, /* 9369 */ 'f', 'l', 'd', 'c', 'w', 9, 0, /* 9376 */ 'd', 'e', 'c', 'w', 9, 0, /* 9382 */ 'i', 'n', 'c', 'w', 9, 0, /* 9388 */ 'b', 't', 'c', 'w', 9, 0, /* 9394 */ 'f', 'n', 's', 't', 'c', 'w', 9, 0, /* 9402 */ 'v', 'p', 'h', 'a', 'd', 'd', 'w', 9, 0, /* 9411 */ 'v', 'p', 'a', 'd', 'd', 'w', 9, 0, /* 9419 */ 'x', 'a', 'd', 'd', 'w', 9, 0, /* 9426 */ 'r', 'd', 's', 'e', 'e', 'd', 'w', 9, 0, /* 9435 */ 's', 'h', 'l', 'd', 'w', 9, 0, /* 9442 */ 'k', 'a', 'n', 'd', 'w', 9, 0, /* 9449 */ 'r', 'd', 'r', 'a', 'n', 'd', 'w', 9, 0, /* 9458 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'w', 9, 0, /* 9468 */ 's', 'h', 'r', 'd', 'w', 9, 0, /* 9475 */ 'v', 'p', 'a', 'c', 'k', 's', 's', 'd', 'w', 9, 0, /* 9486 */ 'v', 'p', 'a', 'c', 'k', 'u', 's', 'd', 'w', 9, 0, /* 9497 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'd', 'w', 9, 0, /* 9508 */ 'v', 'p', 'm', 'o', 'v', 's', 'd', 'w', 9, 0, /* 9518 */ 'v', 'p', 'm', 'o', 'v', 'd', 'w', 9, 0, /* 9527 */ 'c', 'm', 'o', 'v', 'a', 'e', 'w', 9, 0, /* 9536 */ 'c', 'm', 'o', 'v', 'b', 'e', 'w', 9, 0, /* 9545 */ 'c', 'm', 'o', 'v', 'g', 'e', 'w', 9, 0, /* 9554 */ 'c', 'm', 'o', 'v', 'l', 'e', 'w', 9, 0, /* 9563 */ 'c', 'm', 'o', 'v', 'n', 'e', 'w', 9, 0, /* 9572 */ 'c', 'm', 'o', 'v', 'e', 'w', 9, 0, /* 9580 */ 'p', 'i', '2', 'f', 'w', 9, 0, /* 9587 */ 'b', 's', 'f', 'w', 9, 0, /* 9593 */ 'p', 's', 'h', 'u', 'f', 'w', 9, 0, /* 9601 */ 'n', 'e', 'g', 'w', 9, 0, /* 9607 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', 'w', 9, 0, /* 9617 */ 'v', 'p', 'a', 'v', 'g', 'w', 9, 0, /* 9625 */ 'c', 'm', 'o', 'v', 'g', 'w', 9, 0, /* 9633 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 'w', 9, 0, /* 9644 */ 'v', 'p', 's', 'h', 'u', 'f', 'h', 'w', 9, 0, /* 9654 */ 'v', 'p', 'm', 'u', 'l', 'h', 'w', 9, 0, /* 9663 */ 'p', 'u', 's', 'h', 'w', 9, 0, /* 9670 */ 'p', 'f', '2', 'i', 'w', 9, 0, /* 9677 */ 's', 'a', 'l', 'w', 9, 0, /* 9683 */ 'r', 'c', 'l', 'w', 9, 0, /* 9689 */ 'v', 'p', 's', 'h', 'u', 'f', 'l', 'w', 9, 0, /* 9699 */ 'v', 'p', 's', 'h', 'l', 'w', 9, 0, /* 9707 */ 'l', 'c', 'a', 'l', 'l', 'w', 9, 0, /* 9715 */ 'v', 'p', 's', 'l', 'l', 'w', 9, 0, /* 9723 */ 'v', 'p', 'm', 'u', 'l', 'l', 'w', 9, 0, /* 9732 */ 'r', 'o', 'l', 'w', 9, 0, /* 9738 */ 'v', 'p', 's', 'r', 'l', 'w', 9, 0, /* 9746 */ 'l', 's', 'l', 'w', 9, 0, /* 9752 */ 'k', 's', 'h', 'i', 'f', 't', 'l', 'w', 9, 0, /* 9762 */ 'i', 'm', 'u', 'l', 'w', 9, 0, /* 9769 */ 'c', 'm', 'o', 'v', 'l', 'w', 9, 0, /* 9777 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'm', 'w', 9, 0, /* 9788 */ 'v', 'p', 'c', 'o', 'm', 'w', 9, 0, /* 9796 */ 'k', 'a', 'n', 'd', 'n', 'w', 9, 0, /* 9804 */ 'v', 'p', 's', 'i', 'g', 'n', 'w', 9, 0, /* 9813 */ 'i', 'n', 'w', 9, 0, /* 9818 */ 'c', 'm', 'o', 'v', 'n', 'o', 'w', 9, 0, /* 9827 */ 'c', 'm', 'o', 'v', 'o', 'w', 9, 0, /* 9835 */ 'v', 'p', 'c', 'm', 'p', 'w', 9, 0, /* 9843 */ 'l', 'j', 'm', 'p', 'w', 9, 0, /* 9850 */ 'c', 'm', 'o', 'v', 'n', 'p', 'w', 9, 0, /* 9859 */ 'n', 'o', 'p', 'w', 9, 0, /* 9865 */ 'p', 'o', 'p', 'w', 9, 0, /* 9871 */ 'c', 'm', 'o', 'v', 'p', 'w', 9, 0, /* 9879 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'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '6', '4', 0, /* 12524 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '6', '4', 0, /* 12542 */ '#', 32, 'T', 'L', 'S', 'C', 'a', 'l', 'l', '_', '6', '4', 0, /* 12555 */ '#', 32, 'T', 'L', 'S', '_', 'a', 'd', 'd', 'r', '6', '4', 0, /* 12568 */ '#', 32, 'T', 'L', 'S', '_', 'b', 'a', 's', 'e', '_', 'a', 'd', 'd', 'r', '6', '4', 0, /* 12586 */ 'r', 'e', 'x', '6', '4', 0, /* 12592 */ 'd', 'a', 't', 'a', '1', '6', 0, /* 12599 */ 'x', 's', 'h', 'a', '2', '5', '6', 0, /* 12607 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 12620 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 12627 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 12637 */ '#', 32, 'X', 'B', 'E', 'G', 'I', 'N', 0, /* 12646 */ '#', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 0, /* 12664 */ '#', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 0, /* 12680 */ '#', 'M', 'E', 'M', 'B', 'A', 'R', 'R', 'I', 'E', 'R', 0, /* 12692 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 12707 */ 'a', 'a', 'a', 0, /* 12711 */ 'd', 'a', 'a', 0, /* 12715 */ 'u', 'd', '2', 'b', 0, /* 12720 */ 'x', 'c', 'r', 'y', 'p', 't', 'e', 'c', 'b', 0, /* 12730 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 'f', 'b', 0, /* 12740 */ 'x', 'c', 'r', 'y', 'p', 't', 'o', 'f', 'b', 0, /* 12750 */ 'r', 'e', 'p', ';', 's', 't', 'o', 's', 'b', 0, /* 12760 */ 'r', 'e', 'p', ';', 'm', 'o', 'v', 's', 'b', 0, /* 12770 */ 'x', 'l', 'a', 't', 'b', 0, /* 12776 */ 'c', 'l', 'a', 'c', 0, /* 12781 */ 's', 't', 'a', 'c', 0, /* 12786 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 'b', 'c', 0, /* 12796 */ 'g', 'e', 't', 's', 'e', 'c', 0, /* 12803 */ 's', 'a', 'l', 'c', 0, /* 12808 */ 'c', 'l', 'c', 0, /* 12812 */ 'c', 'm', 'c', 0, /* 12816 */ 'r', 'd', 'p', 'm', 'c', 0, /* 12822 */ 'v', 'm', 'f', 'u', 'n', 'c', 0, /* 12829 */ 'r', 'd', 't', 's', 'c', 0, /* 12835 */ 's', 't', 'c', 0, /* 12839 */ 'c', 'p', 'u', 'i', 'd', 0, /* 12845 */ 'c', 'l', 'd', 0, /* 12849 */ 'x', 'e', 'n', 'd', 0, /* 12854 */ 'c', 'l', 't', 'd', 0, /* 12859 */ 's', 't', 'd', 0, /* 12863 */ 'c', 'w', 't', 'd', 0, /* 12868 */ 'w', 'b', 'i', 'n', 'v', 'd', 0, /* 12875 */ 'f', 'l', 'd', 'l', '2', 'e', 0, /* 12882 */ 'l', 'f', 'e', 'n', 'c', 'e', 0, /* 12889 */ 'm', 'f', 'e', 'n', 'c', 'e', 0, /* 12896 */ 's', 'f', 'e', 'n', 'c', 'e', 0, /* 12903 */ 'f', 's', 'c', 'a', 'l', 'e', 0, /* 12910 */ 'v', 'm', 'r', 'e', 's', 'u', 'm', 'e', 0, /* 12919 */ 'r', 'e', 'p', 'n', 'e', 0, /* 12925 */ 'x', 'a', 'c', 'q', 'u', 'i', 'r', 'e', 0, /* 12934 */ 'x', 's', 't', 'o', 'r', 'e', 0, /* 12941 */ 'x', 'r', 'e', 'l', 'e', 'a', 's', 'e', 0, /* 12950 */ 'p', 'a', 'u', 's', 'e', 0, /* 12956 */ '#', 'S', 'E', 'H', '_', 'E', 'p', 'i', 'l', 'o', 'g', 'u', 'e', 0, /* 12970 */ '#', 'S', 'E', 'H', '_', 'E', 'n', 'd', 'P', 'r', 'o', 'l', 'o', 'g', 'u', 'e', 0, /* 12987 */ 'l', 'e', 'a', 'v', 'e', 0, /* 12993 */ 'v', 'm', 'x', 'o', 'f', 'f', 0, /* 13000 */ 'l', 'a', 'h', 'f', 0, /* 13005 */ 's', 'a', 'h', 'f', 0, /* 13010 */ 'v', 'm', 'l', 'a', 'u', 'n', 'c', 'h', 0, /* 13019 */ 'c', 'l', 'g', 'i', 0, /* 13024 */ 's', 't', 'g', 'i', 0, /* 13029 */ 'c', 'l', 'i', 0, /* 13033 */ 'f', 'l', 'd', 'p', 'i', 0, /* 13039 */ 's', 't', 'i', 0, /* 13043 */ '#', 32, 'w', 'i', 'n', '3', '2', 32, 'f', 'p', 't', 'o', 'u', 'i', 0, /* 13058 */ 'l', 'o', 'c', 'k', 0, /* 13063 */ 'i', 'n', 'b', 9, '%', 'd', 'x', ',', 32, '%', 'a', 'l', 0, /* 13076 */ 'p', 'u', 's', 'h', 'a', 'l', 0, /* 13083 */ 'p', 'o', 'p', 'a', 'l', 0, /* 13089 */ 'p', 'u', 's', 'h', 'f', 'l', 0, /* 13096 */ 'p', 'o', 'p', 'f', 'l', 0, /* 13102 */ 'v', 'm', 'm', 'c', 'a', 'l', 'l', 0, /* 13110 */ 'v', 'm', 'c', 'a', 'l', 'l', 0, /* 13117 */ 's', 'y', 's', 'c', 'a', 'l', 'l', 0, /* 13125 */ 'v', 'z', 'e', 'r', 'o', 'a', 'l', 'l', 0, /* 13134 */ 'r', 'e', 'p', ';', 's', 't', 'o', 's', 'l', 0, /* 13144 */ 'r', 'e', 'p', ';', 'm', 'o', 'v', 's', 'l', 0, /* 13154 */ 'i', 'r', 'e', 't', 'l', 0, /* 13160 */ 'l', 'r', 'e', 't', 'l', 0, /* 13166 */ 's', 'y', 's', 'r', 'e', 't', 'l', 0, /* 13174 */ 's', 'y', 's', 'e', 'x', 'i', 't', 'l', 0, /* 13183 */ 'c', 'w', 't', 'l', 0, /* 13188 */ 'm', 'o', 'n', 't', 'm', 'u', 'l', 0, /* 13196 */ 'f', 'x', 'a', 'm', 0, /* 13201 */ 'f', 'p', 'r', 'e', 'm', 0, /* 13207 */ 'v', 'p', 'c', 'o', 'm', 0, /* 13213 */ 'f', 's', 'e', 't', 'p', 'm', 0, /* 13220 */ 'r', 's', 'm', 0, /* 13224 */ 'f', 'p', 'a', 't', 'a', 'n', 0, /* 13231 */ 'f', 'p', 't', 'a', 'n', 0, /* 13237 */ 'f', 's', 'i', 'n', 0, /* 13242 */ '#', 32, 'd', 'y', 'n', 'a', 'm', 'i', 'c', 32, 's', 't', 'a', 'c', 'k', 32, 'a', 'l', 'l', 'o', 'c', 'a', 't', 'i', 'o', 'n', 0, /* 13269 */ 'i', 'n', 't', 'o', 0, /* 13274 */ 'c', 'q', 't', 'o', 0, /* 13279 */ 'r', 'd', 't', 's', 'c', 'p', 0, /* 13286 */ 'r', 'e', 'p', 0, /* 13290 */ 'v', 'p', 'c', 'm', 'p', 0, /* 13296 */ 'v', 'c', 'm', 'p', 0, /* 13301 */ 'f', 'e', 'n', 'i', '8', '0', '8', '7', '_', 'n', 'o', 'p', 0, /* 13314 */ 'f', 'd', 'i', 's', 'i', '8', '0', '8', '7', '_', 'n', 'o', 'p', 0, /* 13328 */ 'f', 'n', 'o', 'p', 0, /* 13333 */ 'f', 'c', 'o', 'm', 'p', 'p', 0, /* 13340 */ 'f', 'u', 'c', 'o', 'm', 'p', 'p', 0, /* 13348 */ 'f', 'd', 'e', 'c', 's', 't', 'p', 0, /* 13356 */ 'f', 'i', 'n', 'c', 's', 't', 'p', 0, /* 13364 */ 'p', 'u', 's', 'h', 'f', 'q', 0, /* 13371 */ 'p', 'o', 'p', 'f', 'q', 0, /* 13377 */ 'r', 'e', 'p', ';', 's', 't', 'o', 's', 'q', 0, /* 13387 */ 'r', 'e', 'p', ';', 'm', 'o', 'v', 's', 'q', 0, /* 13397 */ 'i', 'r', 'e', 't', 'q', 0, /* 13403 */ 'l', 'r', 'e', 't', 'q', 0, /* 13409 */ 's', 'y', 's', 'r', 'e', 't', 'q', 0, /* 13417 */ 's', 'y', 's', 'e', 'x', 'i', 't', 'q', 0, /* 13426 */ 'c', 'l', 't', 'q', 0, /* 13431 */ 'v', 'z', 'e', 'r', 'o', 'u', 'p', 'p', 'e', 'r', 0, /* 13442 */ 's', 'y', 's', 'e', 'n', 't', 'e', 'r', 0, /* 13451 */ 'm', 'o', 'n', 'i', 't', 'o', 'r', 0, /* 13459 */ 'r', 'd', 'm', 's', 'r', 0, /* 13465 */ 'w', 'r', 'm', 's', 'r', 0, /* 13471 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 't', 'r', 0, /* 13481 */ 'a', 'a', 's', 0, /* 13485 */ 'd', 'a', 's', 0, /* 13489 */ 'f', 'a', 'b', 's', 0, /* 13494 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'c', 's', 0, /* 13504 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'c', 's', 0, /* 13514 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'd', 's', 0, /* 13524 */ 'p', 'o', 'p', 'l', 9, '%', 'd', 's', 0, /* 13533 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'd', 's', 0, /* 13543 */ 'p', 'o', 'p', 'w', 9, '%', 'd', 's', 0, /* 13552 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'e', 's', 0, /* 13562 */ 'p', 'o', 'p', 'l', 9, '%', 'e', 's', 0, /* 13571 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'e', 's', 0, /* 13581 */ 'p', 'o', 'p', 'w', 9, '%', 'e', 's', 0, /* 13590 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'f', 's', 0, /* 13600 */ 'p', 'o', 'p', 'l', 9, '%', 'f', 's', 0, /* 13609 */ 'p', 'u', 's', 'h', 'q', 9, '%', 'f', 's', 0, /* 13619 */ 'p', 'o', 'p', 'q', 9, '%', 'f', 's', 0, /* 13628 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'f', 's', 0, /* 13638 */ 'p', 'o', 'p', 'w', 9, '%', 'f', 's', 0, /* 13647 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'g', 's', 0, /* 13657 */ 'p', 'o', 'p', 'l', 9, '%', 'g', 's', 0, /* 13666 */ 'p', 'u', 's', 'h', 'q', 9, '%', 'g', 's', 0, /* 13676 */ 'p', 'o', 'p', 'q', 9, '%', 'g', 's', 0, /* 13685 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'g', 's', 0, /* 13695 */ 'p', 'o', 'p', 'w', 9, '%', 'g', 's', 0, /* 13704 */ 's', 'w', 'a', 'p', 'g', 's', 0, /* 13711 */ 'f', 'c', 'h', 's', 0, /* 13716 */ '#', 32, 'v', 'a', 'r', 'i', 'a', 'b', 'l', 'e', 32, 's', 'i', 'z', 'e', 'd', 32, 'a', 'l', 'l', 'o', 'c', 'a', 32, 'f', 'o', 'r', 32, 's', 'e', 'g', 'm', 'e', 'n', 't', 'e', 'd', 32, 's', 't', 'a', 'c', 'k', 's', 0, /* 13761 */ 'e', 'n', 'c', 'l', 's', 0, /* 13767 */ 'f', 'e', 'm', 'm', 's', 0, /* 13773 */ 'f', 'c', 'o', 's', 0, /* 13778 */ 'f', 's', 'i', 'n', 'c', 'o', 's', 0, /* 13786 */ 'p', 'u', 's', 'h', 'l', 9, '%', 's', 's', 0, /* 13796 */ 'p', 'o', 'p', 'l', 9, '%', 's', 's', 0, /* 13805 */ 'p', 'u', 's', 'h', 'w', 9, '%', 's', 's', 0, /* 13815 */ 'p', 'o', 'p', 'w', 9, '%', 's', 's', 0, /* 13824 */ 'c', 'l', 't', 's', 0, /* 13829 */ 'f', 'l', 'd', 'l', '2', 't', 0, /* 13836 */ 'f', 'x', 't', 'r', 'a', 'c', 't', 0, /* 13844 */ 'm', 'w', 'a', 'i', 't', 0, /* 13850 */ 'p', 'c', 'o', 'm', 'm', 'i', 't', 0, /* 13858 */ 'f', 'n', 'i', 'n', 'i', 't', 0, /* 13865 */ 'h', 'l', 't', 0, /* 13869 */ 'f', 'r', 'n', 'd', 'i', 'n', 't', 0, /* 13877 */ 'f', 's', 'q', 'r', 't', 0, /* 13883 */ 'x', 't', 'e', 's', 't', 0, /* 13889 */ 'f', 't', 's', 't', 0, /* 13894 */ 'e', 'n', 'c', 'l', 'u', 0, /* 13900 */ 'x', 'g', 'e', 't', 'b', 'v', 0, /* 13907 */ 'x', 's', 'e', 't', 'b', 'v', 0, /* 13914 */ 'p', 'u', 's', 'h', 'a', 'w', 0, /* 13921 */ 'p', 'o', 'p', 'a', 'w', 0, /* 13927 */ 'p', 'u', 's', 'h', 'f', 'w', 0, /* 13934 */ 'p', 'o', 'p', 'f', 'w', 0, /* 13940 */ 'r', 'e', 'p', ';', 's', 't', 'o', 's', 'w', 0, /* 13950 */ 'r', 'e', 'p', ';', 'm', 'o', 'v', 's', 'w', 0, /* 13960 */ 'c', 'b', 't', 'w', 0, /* 13965 */ 'i', 'r', 'e', 't', 'w', 0, /* 13971 */ 'l', 'r', 'e', 't', 'w', 0, /* 13977 */ 'f', 'y', 'l', '2', 'x', 0, /* 13983 */ 'f', 'n', 's', 't', 's', 'w', 9, '%', 'a', 'x', 0, /* 13994 */ 'i', 'n', 'w', 9, '%', 'd', 'x', ',', 32, '%', 'a', 'x', 0, /* 14007 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, '%', 'e', 'a', 'x', 0, /* 14019 */ 'v', 'm', 's', 'a', 'v', 'e', 9, '%', 'e', 'a', 'x', 0, /* 14031 */ 'v', 'm', 'r', 'u', 'n', 9, '%', 'e', 'a', 'x', 0, /* 14042 */ 's', 'k', 'i', 'n', 'i', 't', 9, '%', 'e', 'a', 'x', 0, /* 14054 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, '%', 'e', 'c', 'x', ',', 32, '%', 'e', 'a', 'x', 0, /* 14073 */ 'i', 'n', 'l', 9, '%', 'd', 'x', ',', 32, '%', 'e', 'a', 'x', 0, /* 14087 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, '%', 'r', 'a', 'x', 0, /* 14099 */ 'v', 'm', 's', 'a', 'v', 'e', 9, '%', 'r', 'a', 'x', 0, /* 14111 */ 'v', 'm', 'r', 'u', 'n', 9, '%', 'r', 'a', 'x', 0, /* 14122 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, '%', 'e', 'c', 'x', ',', 32, '%', 'r', 'a', 'x', 0, /* 14141 */ 'o', 'u', 't', 'b', 9, '%', 'a', 'l', ',', 32, '%', 'd', 'x', 0, /* 14155 */ 'o', 'u', 't', 'w', 9, '%', 'a', 'x', ',', 32, '%', 'd', 'x', 0, /* 14169 */ 'o', 'u', 't', 'l', 9, '%', 'e', 'a', 'x', ',', 32, '%', 'd', 'x', 0, /* 14184 */ 'f', 'n', 'c', 'l', 'e', 'x', 0, /* 14191 */ 'f', 'l', 'd', 'z', 0, }; #endif // Emit the opcode for the instruction. unsigned int opcode = MCInst_getOpcode(MI); //printf("> opcode = %u\n", opcode); uint64_t Bits1 = OpInfo[opcode]; uint64_t Bits2 = OpInfo2[opcode]; uint64_t Bits = (Bits2 << 32) | Bits1; // printf("Opcode ID = %u\n", opcode); // assert(Bits != 0 && "Cannot print this instruction."); if (!X86_lockrep(MI, O)) { #ifndef CAPSTONE_DIET // HACK TODO switch(opcode) { default: SStream_concat0(O, AsmStrs+(Bits & 16383)-1); break; case X86_MOV32ms: case X86_MOV32sm: SStream_concat0(O, "movw\t"); break; case X86_ROL32r1: SStream_concat0(O, "rol\t$1, "); break; case X86_LGS64rm: SStream_concat0(O, "lgs\t"); break; case X86_SLDT64m: SStream_concat0(O, "sldt\t"); break; } #endif } // Fragment 0 encoded into 7 bits for 102 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 14) & 127); switch ((Bits >> 14) & 127) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, AAA, AAS, ABS_F, ACQU... return; break; case 1: // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i... printOperand(MI, 0, O); break; case 2: // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC... printOperand(MI, 5, O); SStream_concat0(O, ", "); break; case 3: // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A... printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 4: // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r... printi16mem(MI, 2, O); SStream_concat0(O, ", "); break; case 5: // ADC32rm, ADCX32rm, ADD32rm, AND32rm, ANDN32rm, CMOVA32rm, CMOVAE32rm, ... printi32mem(MI, 2, O); break; case 6: // ADC64rm, ADCX64rm, ADD64rm, AND64rm, ANDN64rm, CMOVA64rm, CMOVAE64rm, ... printi64mem(MI, 2, O); break; case 7: // ADC8rm, ADD8rm, AND8rm, CRC32r32m8, CRC32r64m8, OR8rm, SBB8rm, SUB8rm,... printi8mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 8: // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,... printf128mem(MI, 2, O); SStream_concat0(O, ", "); break; case 9: // ADDSDrm, ADDSDrm_Int, DIVSDrm, DIVSDrm_Int, Int_CVTSD2SSrm, Int_VCVTSD... printf64mem(MI, 2, O); break; case 10: // ADDSSrm, ADDSSrm_Int, DIVSSrm, DIVSSrm_Int, Int_CVTSS2SDrm, Int_VCVTSS... printf32mem(MI, 2, O); break; case 11: // ADD_F32m, DIVR_F32m, DIV_F32m, FBLDm, FBSTPm, FCOM32m, FCOMP32m, FLDEN... printf32mem(MI, 0, O); return; break; case 12: // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MUL_F64m, S... printf64mem(MI, 0, O); return; break; case 13: // ADD_FI16m, CALL16m, DEC16m, DIV16m, DIVR_FI16m, DIV_FI16m, FICOM16m, F... printi16mem(MI, 0, O); return; break; case 14: // ADD_FI32m, CALL32m, DEC32m, DIV32m, DIVR_FI32m, DIV_FI32m, FICOM32m, F... printi32mem(MI, 0, O); return; break; case 15: // ADOX32rm, BLCFILL32rm, BLCI32rm, BLCIC32rm, BLCMSK32rm, BLCS32rm, BLSF... printi32mem(MI, 1, O); break; case 16: // ADOX32rr, ADOX64rr, AESIMCrr, ARPL16rr, BLCFILL32rr, BLCFILL64rr, BLCI... printOperand(MI, 1, O); break; case 17: // ADOX64rm, BLCFILL64rm, BLCI64rm, BLCIC64rm, BLCMSK64rm, BLCS64rm, BLSF... printi64mem(MI, 1, O); break; case 18: // AESDECLASTrm, AESDECrm, AESENCLASTrm, AESENCrm, PACKSSDWrm, PACKSSWBrm... printi128mem(MI, 2, O); SStream_concat0(O, ", "); break; case 19: // AESIMCrm, CVTDQ2PSrm, INVEPT32, INVEPT64, INVPCID32, INVPCID64, INVVPI... printi128mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 20: // AESKEYGENASSIST128rm, EXTRACTPSmr, MMX_PSHUFWmi, PCMPESTRIrm, PCMPESTR... printU8Imm(MI, 6, O); SStream_concat0(O, ", "); break; case 21: // AESKEYGENASSIST128rr, EXTRACTPSrr, KSHIFTLBri, KSHIFTLDri, KSHIFTLQri,... printU8Imm(MI, 2, O); SStream_concat0(O, ", "); break; case 22: // BEXTR32rm, BEXTR64rm, BEXTRI32mi, BEXTRI64mi, BZHI32rm, BZHI64rm, IMUL... printOperand(MI, 6, O); SStream_concat0(O, ", "); break; case 23: // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, CMPSDrm_alt, CMPSS... printU8Imm(MI, 7, O); SStream_concat0(O, ", "); break; case 24: // BLENDPDrri, BLENDPSrri, CMPPDrri_alt, CMPPSrri_alt, CMPSDrr_alt, CMPSS... printU8Imm(MI, 3, O); SStream_concat0(O, ", "); break; case 25: // BSF16rm, BSR16rm, CMP16rm, KMOVWkm, LAR16rm, LAR32rm, LAR64rm, LSL16rm... printi16mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 26: // CALL64m, CMPXCHG8B, DEC64m, DIV64m, IDIV64m, ILD_F64m, IMUL64m, INC64m... printi64mem(MI, 0, O); return; break; case 27: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JAE_1, JAE_2, ... printPCRelImm(MI, 0, O); return; break; case 28: // CLFLUSH, CLFLUSHOPT, CLWB, DEC8m, DIV8m, IDIV8m, IMUL8m, INC8m, INVLPG... printi8mem(MI, 0, O); return; break; case 29: // CMP8rm, KMOVBkm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32_NOREXrm8, M... printi8mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 30: // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm printSSECC(MI, 7, O); break; case 31: // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr printSSECC(MI, 3, O); break; case 32: // CMPSB, INSB, SCASB, STOSB printDstIdx8(MI, 0, O); break; case 33: // CMPSL, INSL, SCASL, STOSL printDstIdx32(MI, 0, O); break; case 34: // CMPSQ, SCASQ, STOSQ printDstIdx64(MI, 0, O); break; case 35: // CMPSW, INSW, SCASW, STOSW printDstIdx16(MI, 0, O); break; case 36: // CMPXCHG16B, LCMPXCHG16B printi128mem(MI, 0, O); return; break; case 37: // COMISDrm, COMISSrm, CVTPD2DQrm, CVTPD2PSrm, CVTPS2DQrm, CVTTPD2DQrm, C... printf128mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 38: // CVTPS2PDrm, CVTSD2SI64rm, CVTSD2SIrm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTS... printf64mem(MI, 1, O); break; case 39: // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_... printf32mem(MI, 1, O); break; case 40: // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR... printopaquemem(MI, 0, O); return; break; case 41: // INSERTQI, VALIGNDrrikz, VALIGNQrrikz, VEXTRACTF32x4rrk, VEXTRACTF64x4r... printU8Imm(MI, 4, O); SStream_concat0(O, ", "); break; case 42: // Int_VCMPSDrm, Int_VCMPSSrm, VCMPPDYrmi, VCMPPDZrmi, VCMPPDrmi, VCMPPSY... printAVXCC(MI, 7, O); break; case 43: // Int_VCMPSDrr, Int_VCMPSSrr, VCMPPDYrri, VCMPPDZrri, VCMPPDZrrib, VCMPP... printAVXCC(MI, 3, O); break; case 44: // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm... printopaquemem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 45: // LD_F80m, ST_FP80m printf80mem(MI, 0, O); return; break; case 46: // LEA16r, LEA32r, LEA64_32r, LEA64r printanymem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 47: // LODSB, OUTSB printSrcIdx8(MI, 0, O); break; case 48: // LODSL, OUTSL printSrcIdx32(MI, 0, O); break; case 49: // LODSQ printSrcIdx64(MI, 0, O); SStream_concat0(O, ", %rax"); op_addReg(MI, X86_REG_RAX); return; break; case 50: // LODSW, OUTSW printSrcIdx16(MI, 0, O); break; case 51: // MOV16ao16, MOV16ao32, MOV16ao64, MOV16o16a, MOV16o32a, MOV16o64a printMemOffs16(MI, 0, O); break; case 52: // MOV32ao16, MOV32ao32, MOV32ao64, MOV32o16a, MOV32o32a, MOV32o64a printMemOffs32(MI, 0, O); break; case 53: // MOV64ao32, MOV64ao64, MOV64o32a, MOV64o64a printMemOffs64(MI, 0, O); break; case 54: // MOV8ao16, MOV8ao32, MOV8ao64, MOV8o16a, MOV8o32a, MOV8o64a printMemOffs8(MI, 0, O); break; case 55: // MOVSB printSrcIdx8(MI, 1, O); SStream_concat0(O, ", "); printDstIdx8(MI, 0, O); return; break; case 56: // MOVSL printSrcIdx32(MI, 1, O); SStream_concat0(O, ", "); printDstIdx32(MI, 0, O); return; break; case 57: // MOVSQ printSrcIdx64(MI, 1, O); SStream_concat0(O, ", "); printDstIdx64(MI, 0, O); return; break; case 58: // MOVSW printSrcIdx16(MI, 1, O); SStream_concat0(O, ", "); printDstIdx16(MI, 0, O); return; break; case 59: // SHLD16rri8, SHLD32rri8, SHLD64rri8, SHRD16rri8, SHRD32rri8, SHRD64rri8... printOperand(MI, 3, O); SStream_concat0(O, ", "); break; case 60: // VADDPDYrm, VADDPDZ256rm, VADDPSYrm, VADDPSZ256rm, VADDSUBPDYrm, VADDSU... printf256mem(MI, 2, O); SStream_concat0(O, ", "); break; case 61: // VADDPDZ128rmbk, VADDPDZ256rmbk, VADDPDZrmbk, VDIVPDZ128rmbk, VDIVPDZ25... printf64mem(MI, 4, O); break; case 62: // VADDPDZ128rmbkz, VADDPDZ256rmbkz, VADDPDZrmbkz, VBLENDMPDZ128rmbk, VBL... printf64mem(MI, 3, O); break; case 63: // VADDPDZ128rmk, VADDPSZ128rmk, VADDSDZrm_Intk, VADDSSZrm_Intk, VDIVPDZ1... printf128mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 64: // VADDPDZ128rmkz, VADDPSZ128rmkz, VADDSDZrm_Intkz, VADDSSZrm_Intkz, VBLE... printf128mem(MI, 3, O); SStream_concat0(O, ", "); break; case 65: // VADDPDZ128rrk, VADDPDZ256rrk, VADDPDZrrk, VADDPSZ128rrk, VADDPSZ256rrk... printOperand(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); break; case 66: // VADDPDZ256rmk, VADDPSZ256rmk, VDIVPDZ256rmk, VDIVPSZ256rmk, VFMADDPDZ2... printf256mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 67: // VADDPDZ256rmkz, VADDPSZ256rmkz, VBLENDMPDZ256rmk, VBLENDMPDZ256rmkz, V... printf256mem(MI, 3, O); SStream_concat0(O, ", "); break; case 68: // VADDPDZrb, VADDPSZrb, VADDSDZrrb, VADDSSZrrb, VDIVPDZrb, VDIVPSZrb, VD... printRoundingControl(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 69: // VADDPDZrbk, VADDPSZrbk, VADDSDZrrbk, VADDSSZrrbk, VDIVPDZrbk, VDIVPSZr... printRoundingControl(MI, 5, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 70: // VADDPDZrbkz, VADDPSZrbkz, VADDSDZrrbkz, VADDSSZrrbkz, VDIVPDZrbkz, VDI... printRoundingControl(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 71: // VADDPDZrm, VADDPSZrm, VBLENDMPDZrm, VBLENDMPSZrm, VDIVPDZrm, VDIVPSZrm... printf512mem(MI, 2, O); SStream_concat0(O, ", "); break; case 72: // VADDPDZrmk, VADDPSZrmk, VDIVPDZrmk, VDIVPSZrmk, VFMADDPDZv213rmk, VFMA... printf512mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 73: // VADDPDZrmkz, VADDPSZrmkz, VBLENDMPDZrmk, VBLENDMPDZrmkz, VBLENDMPSZrmk... printf512mem(MI, 3, O); SStream_concat0(O, ", "); break; case 74: // VADDPSZ128rmbk, VADDPSZ256rmbk, VADDPSZrmbk, VDIVPSZ128rmbk, VDIVPSZ25... printf32mem(MI, 4, O); break; case 75: // VADDPSZ128rmbkz, VADDPSZ256rmbkz, VADDPSZrmbkz, VBLENDMPSZ128rmbk, VBL... printf32mem(MI, 3, O); break; case 76: // VALIGNDrrik, VALIGNQrrik, VRNDSCALESDrbk, VRNDSCALESDrk, VRNDSCALESSrb... printU8Imm(MI, 5, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 77: // VBLENDVPDYrm, VBLENDVPDrm, VBLENDVPSYrm, VBLENDVPSrm, VFMADDPD4mr, VFM... printOperand(MI, 7, O); SStream_concat0(O, ", "); break; case 78: // VBROADCASTI64X4krm, VMOVDQA32Z256rmkz, VMOVDQA64Z256rmkz, VMOVDQU16Z25... printi256mem(MI, 2, O); SStream_concat0(O, ", "); break; case 79: // VBROADCASTI64X4rm, VCVTDQ2PDZrm, VCVTDQ2PSYrm, VLDDQUYrm, VMOVDQA32Z25... printi256mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 80: // VCVTDQ2PSZrm, VMOVDQA32Zrm, VMOVDQA64Zrm, VMOVDQU16Zrm, VMOVDQU32Zrm, ... printi512mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 81: // VCVTDQ2PSZrrb, VCVTPD2DQZrrb, VCVTPD2PSZrrb, VCVTPD2UDQZrrb, VCVTPS2DQ... printRoundingControl(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 82: // VCVTPD2DQYrm, VCVTPD2PSYrm, VCVTPH2PSZrm, VCVTPS2DQYrm, VCVTPS2PDZrm, ... printf256mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 83: // VCVTPD2DQZrm, VCVTPD2PSZrm, VCVTPD2UDQZrm, VCVTPS2DQZrm, VCVTPS2UDQZrm... printf512mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 84: // VGATHERDPDYrm, VGATHERDPDrm, VGATHERDPSYrm, VGATHERDPSrm, VGATHERQPDYr... printOperand(MI, 8, O); SStream_concat0(O, ", "); break; case 85: // VGATHERDPDZrm, VGATHERQPDZrm, VGATHERQPSZrm, VPADDQZ128rmbk, VPADDQZ25... printi64mem(MI, 4, O); break; case 86: // VGATHERDPSZrm, VPADDDZ128rmbk, VPADDDZ256rmbk, VPADDDZrmbk, VPANDDZ128... printi32mem(MI, 4, O); break; case 87: // VMOVDQA32Z128rmk, VMOVDQA64Z128rmk, VMOVDQU16Z128rmk, VMOVDQU32Z128rmk... printi128mem(MI, 3, O); SStream_concat0(O, ", "); break; case 88: // VMOVDQA32Z256rmk, VMOVDQA64Z256rmk, VMOVDQU16Z256rmk, VMOVDQU32Z256rmk... printi256mem(MI, 3, O); SStream_concat0(O, ", "); break; case 89: // VMOVDQA32Zrmk, VMOVDQA64Zrmk, VMOVDQU16Zrmk, VMOVDQU32Zrmk, VMOVDQU64Z... printi512mem(MI, 3, O); SStream_concat0(O, ", "); break; case 90: // VMOVDQA32Zrmkz, VMOVDQA64Zrmkz, VMOVDQU16Zrmkz, VMOVDQU32Zrmkz, VMOVDQ... printi512mem(MI, 2, O); SStream_concat0(O, ", "); break; case 91: // VPADDBZ128rmk, VPADDDZ128rmk, VPADDQZ128rmk, VPADDWZ128rmk, VPANDDZ128... printi128mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 92: // VPADDBZ256rmk, VPADDDZ256rmk, VPADDQZ256rmk, VPADDWZ256rmk, VPANDDZ256... printi256mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); SStream_concat0(O, "}"); return; break; case 93: // VPADDBZrmk, VPADDDZrmk, VPADDQZrmk, VPADDWZrmk, VPANDDZrmk, VPANDNDZrm... printi512mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 94: // VPADDDZ128rmbkz, VPADDDZ256rmbkz, VPADDDZrmbkz, VPANDDZ128rmbkz, VPAND... printi32mem(MI, 3, O); break; case 95: // VPADDQZ128rmbkz, VPADDQZ256rmbkz, VPADDQZrmbkz, VPANDNQZ128rmbkz, VPAN... printi64mem(MI, 3, O); break; case 96: // VPCMPBZ128rmik, VPCMPBZ256rmik, VPCMPBZrmik, VPCMPDZ128rmibk, VPCMPDZ1... printAVXCC(MI, 8, O); break; case 97: // VPCMPBZ128rmik_alt, VPCMPBZ256rmik_alt, VPCMPBZrmik_alt, VPCMPDZ128rmi... printU8Imm(MI, 8, O); SStream_concat0(O, ", "); break; case 98: // VPCMPBZ128rrik, VPCMPBZ256rrik, VPCMPBZrrik, VPCMPDZ128rrik, VPCMPDZ25... printAVXCC(MI, 4, O); break; case 99: // VPCOMBmi, VPCOMDmi, VPCOMQmi, VPCOMUBmi, VPCOMUDmi, VPCOMUQmi, VPCOMUW... printXOPCC(MI, 7, O); break; case 100: // VPCOMBri, VPCOMDri, VPCOMQri, VPCOMUBri, VPCOMUDri, VPCOMUQri, VPCOMUW... printXOPCC(MI, 3, O); break; case 101: // VRNDSCALESDmk, VRNDSCALESSmk printU8Imm(MI, 9, O); SStream_concat0(O, ", "); printf128mem(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 2, O); SStream_concat0(O, "}"); return; break; } // Fragment 1 encoded into 7 bits for 81 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 21) & 127); switch ((Bits >> 21) & 127) { default: // llvm_unreachable("Invalid command number."); case 0: // AAD8i8, AAM8i8, ADD_FPrST0, ADD_FST0r, ADD_FrST0, BSWAP32r, BSWAP64r, ... return; break; case 1: // ADC16i16, ADD16i16, AND16i16, CMP16i16, IN16ri, LODSW, MOV16ao16, MOV1... SStream_concat0(O, ", %ax"); op_addReg(MI, X86_REG_AX); return; break; case 2: // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16... printi16mem(MI, 0, O); return; break; case 3: // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rr, ADC64... printOperand(MI, 1, O); break; case 4: // ADC16rr_REV, ADC32rr_REV, ADC64rr_REV, ADC8rr_REV, ADCX32rr, ADCX64rr,... printOperand(MI, 0, O); break; case 5: // ADC32i32, ADD32i32, AND32i32, CMP32i32, IN32ri, LODSL, MOV32ao16, MOV3... SStream_concat0(O, ", %eax"); op_addReg(MI, X86_REG_EAX); return; break; case 6: // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32... printi32mem(MI, 0, O); return; break; case 7: // ADC32rm, ADC64rm, ADCX32rm, ADCX64rm, ADD32rm, ADD64rm, ADDSDrm, ADDSD... SStream_concat0(O, ", "); break; case 8: // ADC64i32, ADD64i32, AND64i32, CMP64i32, MOV64ao32, MOV64ao64, OR64i32,... SStream_concat0(O, ", %rax"); op_addReg(MI, X86_REG_RAX); return; break; case 9: // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,... printi64mem(MI, 0, O); return; break; case 10: // ADC8i8, ADD8i8, AND8i8, CMP8i8, IN8ri, LODSB, MOV8ao16, MOV8ao32, MOV8... SStream_concat0(O, ", %al"); op_addReg(MI, X86_REG_AL); return; break; case 11: // ADC8mi, ADC8mi8, ADC8mr, ADD8mi, ADD8mi8, ADD8mr, AND8mi, AND8mi8, AND... printi8mem(MI, 0, O); return; break; case 12: // AESKEYGENASSIST128rm, PCMPESTRIrm, PCMPESTRM128rm, PCMPISTRIrm, PCMPIS... printi128mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 13: // BEXTR32rm, BEXTRI32mi, BZHI32rm, IMUL32rmi, IMUL32rmi8, RORX32mi, SARX... printi32mem(MI, 1, O); break; case 14: // BEXTR64rm, BEXTRI64mi, BZHI64rm, IMUL64rmi32, IMUL64rmi8, MMX_PSHUFWmi... printi64mem(MI, 1, O); break; case 15: // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, DPPDrmi, DPPSrmi, ... printf128mem(MI, 2, O); SStream_concat0(O, ", "); break; case 16: // BLENDPDrri, BLENDPSrri, CMPPDrri_alt, CMPPSrri_alt, CMPSDrr_alt, CMPSS... printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 17: // CMOVBE_F, CMOVB_F, CMOVE_F, CMOVNBE_F, CMOVNB_F, CMOVNE_F, CMOVNP_F, C... SStream_concat0(O, ", %st(0)"); op_addReg(MI, X86_REG_ST0); return; break; case 18: // CMPPDrmi, CMPPDrri, VCMPPDYrmi, VCMPPDYrri, VCMPPDZrmi, VCMPPDZrri, VC... SStream_concat0(O, "pd\t"); break; case 19: // CMPPSrmi, CMPPSrri, VCMPPSYrmi, VCMPPSYrri, VCMPPSZrmi, VCMPPSZrri, VC... SStream_concat0(O, "ps\t"); break; case 20: // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr, Int_VCMPSDrm, Int_VCMPSDrr... SStream_concat0(O, "sd\t"); break; case 21: // CMPSDrm_alt, ROUNDSDm, VCMPSDZrmi_alt, VCMPSDrm_alt, VFMADDSD4mr, VFMA... printf64mem(MI, 2, O); SStream_concat0(O, ", "); break; case 22: // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr, Int_VCMPSSrm, Int_VCMPSSrr... SStream_concat0(O, "ss\t"); break; case 23: // CMPSSrm_alt, INSERTPSrm, ROUNDSSm, VCMPSSZrmi_alt, VCMPSSrm_alt, VFMAD... printf32mem(MI, 2, O); SStream_concat0(O, ", "); break; case 24: // EXTRACTPSmr, PEXTRBmr, PEXTRDmr, PEXTRQmr, PEXTRWmr, SHLD16mri8, SHLD3... printOperand(MI, 5, O); SStream_concat0(O, ", "); break; case 25: // EXTRQI printU8Imm(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 26: // FARCALL16i, FARCALL32i, FARJMP16i, FARJMP32i SStream_concat0(O, ":"); printOperand(MI, 0, O); return; break; case 27: // IMUL16rmi, IMUL16rmi8 printi16mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 28: // INSERTQI printU8Imm(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 29: // MMX_PALIGNR64irm, PINSRQrm, VPCMPQZ128rmib_alt, VPCMPQZ256rmib_alt, VP... printi64mem(MI, 2, O); break; case 30: // MMX_PINSRWirmi, PINSRWrmi, VPINSRWrmi printi16mem(MI, 2, O); SStream_concat0(O, ", "); break; case 31: // MOVAPDmr, MOVAPSmr, MOVNTDQmr, MOVNTPDmr, MOVNTPSmr, MOVUPDmr, MOVUPSm... printf128mem(MI, 0, O); break; case 32: // MOVDQAmr, MOVDQUmr, VMOVDQA32Z128mr, VMOVDQA32Z128mrk, VMOVDQA64Z128mr... printi128mem(MI, 0, O); break; case 33: // MOVHPDmr, MOVHPSmr, MOVLPDmr, MOVLPSmr, MOVNTSD, MOVSDmr, VMOVHPDmr, V... printf64mem(MI, 0, O); break; case 34: // MOVNTSS, MOVSSmr, VMOVSSZmr, VMOVSSZmrk, VMOVSSmr printf32mem(MI, 0, O); break; case 35: // MPSADBWrmi, PALIGNR128rm, PBLENDWrmi, PCLMULQDQrm, SHA1RNDS4rmi, VINSE... printi128mem(MI, 2, O); SStream_concat0(O, ", "); break; case 36: // OUTSB, OUTSL, OUTSW SStream_concat0(O, ", %dx"); op_addReg(MI, X86_REG_DX); return; break; case 37: // PINSRBrm, VPINSRBrm printi8mem(MI, 2, O); SStream_concat0(O, ", "); break; case 38: // PINSRDrm, VPCMPDZ128rmib_alt, VPCMPDZ256rmib_alt, VPCMPDZrmib_alt, VPC... printi32mem(MI, 2, O); break; case 39: // ROUNDPDm, ROUNDPSm, VPERMILPDmi, VPERMILPSmi, VROUNDPDm, VROUNDPSm printf128mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 40: // VADDPDZ128rmb, VADDPDZ128rmbk, VADDPDZ128rmbkz, VBLENDMPDZ128rmb, VBLE... SStream_concat0(O, "{1to2}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); break; case 41: // VADDPDZ128rmk, VADDPDZ256rmk, VADDPDZrbk, VADDPDZrmk, VADDPSZ128rmk, V... SStream_concat0(O, "}"); return; break; case 42: // VADDPDZ256rmb, VADDPDZ256rmbk, VADDPDZ256rmbkz, VADDPSZ128rmb, VADDPSZ... SStream_concat0(O, "{1to4}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); break; case 43: // VADDPDZrbkz, VADDPSZrbkz, VADDSDZrrbkz, VADDSSZrrbkz, VDIVPDZrbkz, VDI... SStream_concat0(O, " {"); break; case 44: // VADDPDZrmb, VADDPDZrmbk, VADDPDZrmbkz, VADDPSZ256rmb, VADDPSZ256rmbk, ... SStream_concat0(O, "{1to8}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); break; case 45: // VADDPSZrmb, VADDPSZrmbk, VADDPSZrmbkz, VBLENDMPSZrmb, VBLENDMPSZrmbk, ... SStream_concat0(O, "{1to16}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); break; case 46: // VALIGNDrmi, VALIGNQrmi, VPCMPBZrmi_alt, VPCMPDZrmi_alt, VPCMPQZrmi_alt... printi512mem(MI, 2, O); SStream_concat0(O, ", "); break; case 47: // VALIGNDrrikz, VALIGNQrrikz, VEXTRACTF32x4rrk, VEXTRACTF64x4rrk, VEXTRA... printOperand(MI, 3, O); SStream_concat0(O, ", "); break; case 48: // VBLENDPDYrmi, VBLENDPSYrmi, VBLENDVPDYrm, VBLENDVPSYrm, VCMPPDYrmi_alt... printf256mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 49: // VCMPPDZrmi_alt, VCMPPSZrmi_alt, VSHUFPDZrmi, VSHUFPSZrmi printf512mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 50: // VCMPPDZrrib SStream_concat0(O, "pd\t{sae}, "); op_addAvxSae(MI); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 51: // VCMPPSZrrib SStream_concat0(O, "ps\t{sae}, "); op_addAvxSae(MI); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 52: // VCOMPRESSPDZ256mrk, VCOMPRESSPSZ256mrk, VMOVAPDYmr, VMOVAPDZ256mr, VMO... printf256mem(MI, 0, O); break; case 53: // VCOMPRESSPDZmrk, VCOMPRESSPSZmrk, VMOVAPDZmr, VMOVAPDZmrk, VMOVAPSZmr,... printf512mem(MI, 0, O); break; case 54: // VDPPSYrmi, VINSERTI32x8rm, VINSERTI64x4rm, VMPSADBWYrmi, VPALIGNR256rm... printi256mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 55: // VEXP2PDm, VEXP2PDmb, VEXP2PSm, VEXP2PSmb, VFMADDPDZv213rrb, VFMADDPSZv... return; break; case 56: // VFMADDPDZ128v213rmkz, VFMADDPDZ128v231rmkz, VFMADDPDZ256v213rmkz, VFMA... SStream_concat0(O, "} {z}"); op_addAvxZeroOpmask(MI); return; break; case 57: // VGATHERDPDYrm, VGATHERDPDrm, VGATHERQPDYrm, VGATHERQPDrm, VPCMPQZ128rm... printi64mem(MI, 3, O); break; case 58: // VGATHERDPSYrm, VGATHERDPSrm, VGATHERQPSYrm, VGATHERQPSrm, VPCMPDZ128rm... printi32mem(MI, 3, O); break; case 59: // VMOVDQA32Z256mr, VMOVDQA32Z256mrk, VMOVDQA64Z256mr, VMOVDQA64Z256mrk, ... printi256mem(MI, 0, O); break; case 60: // VMOVDQA32Zmr, VMOVDQA32Zmrk, VMOVDQA64Zmr, VMOVDQA64Zmrk, VMOVDQU16Zmr... printi512mem(MI, 0, O); break; case 61: // VPCMPBZ128rmi, VPCMPBZ128rmik, VPCMPBZ128rri, VPCMPBZ128rrik, VPCMPBZ2... SStream_concat0(O, "b\t"); break; case 62: // VPCMPBZ128rmik_alt, VPCMPDZ128rmik_alt, VPCMPQZ128rmik_alt, VPCMPUBZ12... printi128mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}"); return; break; case 63: // VPCMPBZ256rmik_alt, VPCMPDZ256rmik_alt, VPCMPQZ256rmik_alt, VPCMPUBZ25... printi256mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}"); return; break; case 64: // VPCMPBZrmik_alt, VPCMPDZrmik_alt, VPCMPQZrmik_alt, VPCMPUBZrmik_alt, V... printi512mem(MI, 3, O); SStream_concat0(O, ", "); break; case 65: // VPCMPDZ128rmi, VPCMPDZ128rmib, VPCMPDZ128rmibk, VPCMPDZ128rmik, VPCMPD... SStream_concat0(O, "d\t"); break; case 66: // VPCMPQZ128rmi, VPCMPQZ128rmib, VPCMPQZ128rmibk, VPCMPQZ128rmik, VPCMPQ... SStream_concat0(O, "q\t"); break; case 67: // VPCMPUBZ128rmi, VPCMPUBZ128rmik, VPCMPUBZ128rri, VPCMPUBZ128rrik, VPCM... SStream_concat0(O, "ub\t"); break; case 68: // VPCMPUDZ128rmi, VPCMPUDZ128rmib, VPCMPUDZ128rmibk, VPCMPUDZ128rmik, VP... SStream_concat0(O, "ud\t"); break; case 69: // VPCMPUQZ128rmi, VPCMPUQZ128rmib, VPCMPUQZ128rmibk, VPCMPUQZ128rmik, VP... SStream_concat0(O, "uq\t"); break; case 70: // VPCMPUWZ128rmi, VPCMPUWZ128rmik, VPCMPUWZ128rri, VPCMPUWZ128rrik, VPCM... SStream_concat0(O, "uw\t"); break; case 71: // VPCMPWZ128rmi, VPCMPWZ128rmik, VPCMPWZ128rri, VPCMPWZ128rrik, VPCMPWZ2... SStream_concat0(O, "w\t"); break; case 72: // VPERMIL2PDmr, VPERMIL2PDmrY, VPERMIL2PSmr, VPERMIL2PSmrY printOperand(MI, 7, O); SStream_concat0(O, ", "); break; case 73: // VPERMIL2PDrm, VPERMIL2PSrm, VRNDSCALESDmkz, VRNDSCALESSmkz printf128mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 74: // VPERMIL2PDrmY, VPERMIL2PSrmY printf256mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 75: // VPERMILPDYmi, VPERMILPSYmi, VROUNDYPDm, VROUNDYPSm printf256mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 76: // VPERMILPDZmi, VPERMILPSZmi, VPERMPDZmi, VRNDSCALEPDZm, VRNDSCALEPSZm printf512mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 77: // VPERMPDYmi, VPERMQYmi, VPSHUFDYmi, VPSHUFHWYmi, VPSHUFLWYmi printi256mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 78: // VPERMQZmi, VPSHUFDZmi, VPSLLDZmi, VPSLLQZmi, VPSRADZmi, VPSRAQZmi, VPS... printi512mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 79: // VPSLLDZrmk, VPSLLQZrmk, VPSLLVDZrmk, VPSLLVQZrmk, VPSRADZrmk, VPSRAQZr... SStream_concat0(O, "} "); return; break; case 80: // VRNDSCALESDrbk, VRNDSCALESSrbk SStream_concat0(O, "}{sae}"); op_addAvxSae(MI); return; break; } // Fragment 2 encoded into 6 bits for 47 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 28) & 63); switch ((Bits >> 28) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, A... return; break; case 1: // ADC32rm, ADC64rm, ADD32rm, ADD64rm, AND32rm, AND64rm, ANDN32rm, ANDN64... printOperand(MI, 1, O); break; case 2: // ADCX32rm, ADCX64rm, ADDSDrm, ADDSDrm_Int, ADDSSrm, ADDSSrm_Int, ADOX32... printOperand(MI, 0, O); break; case 3: // AESKEYGENASSIST128rr, ANDN32rr, ANDN64rr, BEXTR32rm, BEXTR32rr, BEXTR6... SStream_concat0(O, ", "); break; case 4: // CMPPDrmi, CMPPSrmi, VCMPPDrmi, VCMPPSrmi, VPERMIL2PDmr, VPERMIL2PSmr printf128mem(MI, 2, O); SStream_concat0(O, ", "); break; case 5: // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC... printOperand(MI, 2, O); break; case 6: // CMPSB printSrcIdx8(MI, 1, O); return; break; case 7: // CMPSDrm, Int_CMPSDrm, Int_VCMPSDrm, VCMPSDZrm, VCMPSDrm printf64mem(MI, 2, O); SStream_concat0(O, ", "); break; case 8: // CMPSL printSrcIdx32(MI, 1, O); return; break; case 9: // CMPSQ printSrcIdx64(MI, 1, O); return; break; case 10: // CMPSSrm, Int_CMPSSrm, Int_VCMPSSrm, VCMPSSZrm, VCMPSSrm printf32mem(MI, 2, O); SStream_concat0(O, ", "); break; case 11: // CMPSW printSrcIdx16(MI, 1, O); return; break; case 12: // EXTRACTPSmr, VEXTRACTPSmr, VEXTRACTPSzmr printf32mem(MI, 0, O); return; break; case 13: // LXADD16, XCHG16rm printi16mem(MI, 2, O); return; break; case 14: // LXADD32, VPCMPDZ128rmib, VPCMPDZ256rmib, VPCMPDZrmib, VPCMPUDZ128rmib,... printi32mem(MI, 2, O); break; case 15: // LXADD64, VPCMPQZ128rmib, VPCMPQZ256rmib, VPCMPQZrmib, VPCMPUQZ128rmib,... printi64mem(MI, 2, O); break; case 16: // LXADD8, XCHG8rm printi8mem(MI, 2, O); return; break; case 17: // PEXTRBmr, VPEXTRBmr printi8mem(MI, 0, O); return; break; case 18: // PEXTRDmr, SHLD32mri8, SHRD32mri8, VPEXTRDmr printi32mem(MI, 0, O); return; break; case 19: // PEXTRQmr, SHLD64mri8, SHRD64mri8, VPEXTRQmr printi64mem(MI, 0, O); return; break; case 20: // PEXTRWmr, SHLD16mri8, SHRD16mri8, VPEXTRWmr printi16mem(MI, 0, O); return; break; case 21: // TEST16rm printi16mem(MI, 1, O); return; break; case 22: // TEST32rm printi32mem(MI, 1, O); return; break; case 23: // TEST64rm printi64mem(MI, 1, O); return; break; case 24: // TEST8rm, VAARG_64 printi8mem(MI, 1, O); break; case 25: // VADDPDZ128rmbk, VADDPDZ256rmbk, VADDPDZrmbk, VADDPSZ128rmbk, VADDPSZ25... printOperand(MI, 3, O); SStream_concat0(O, ", "); break; case 26: // VADDPDZ128rrk, VADDPDZ256rrk, VADDPDZrrk, VADDPSZ128rrk, VADDPSZ256rrk... SStream_concat0(O, " {"); break; case 27: // VCMPPDYrmi, VCMPPSYrmi, VPERMIL2PDmrY, VPERMIL2PSmrY printf256mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 28: // VCMPPDZrmi, VCMPPSZrmi printf512mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 29: // VCVTPS2PHYmr, VEXTRACTF128mr, VEXTRACTF32x4rm, VMASKMOVPDmr, VMASKMOVP... printf128mem(MI, 0, O); return; break; case 30: // VCVTPS2PHZmr, VEXTRACTF64x4rm, VMASKMOVPDYmr, VMASKMOVPSYmr printf256mem(MI, 0, O); return; break; case 31: // VCVTPS2PHmr printf64mem(MI, 0, O); return; break; case 32: // VEXTRACTI128mr, VEXTRACTI32x4rm, VPMASKMOVDmr, VPMASKMOVQmr printi128mem(MI, 0, O); return; break; case 33: // VEXTRACTI64x4rm, VPMASKMOVDYmr, VPMASKMOVQYmr printi256mem(MI, 0, O); return; break; case 34: // VPCMPBZ128rmi, VPCMPDZ128rmi, VPCMPQZ128rmi, VPCMPUBZ128rmi, VPCMPUDZ1... printi128mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 35: // VPCMPBZ128rmik, VPCMPDZ128rmik, VPCMPQZ128rmik, VPCMPUBZ128rmik, VPCMP... printi128mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}"); return; break; case 36: // VPCMPBZ256rmi, VPCMPDZ256rmi, VPCMPQZ256rmi, VPCMPUBZ256rmi, VPCMPUDZ2... printi256mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 37: // VPCMPBZ256rmik, VPCMPDZ256rmik, VPCMPQZ256rmik, VPCMPUBZ256rmik, VPCMP... printi256mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}"); return; break; case 38: // VPCMPBZrmi, VPCMPDZrmi, VPCMPQZrmi, VPCMPUBZrmi, VPCMPUDZrmi, VPCMPUQZ... printi512mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 39: // VPCMPBZrmik, VPCMPDZrmik, VPCMPQZrmik, VPCMPUBZrmik, VPCMPUDZrmik, VPC... printi512mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}"); return; break; case 40: // VPCMPDZ128rmib_alt, VPCMPDZ128rmibk_alt, VPCMPQZ256rmib_alt, VPCMPQZ25... SStream_concat0(O, "{1to4}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); break; case 41: // VPCMPDZ128rmibk, VPCMPDZ256rmibk, VPCMPDZrmibk, VPCMPUDZ128rmibk, VPCM... printi32mem(MI, 3, O); break; case 42: // VPCMPDZ256rmib_alt, VPCMPDZ256rmibk_alt, VPCMPQZrmib_alt, VPCMPQZrmibk... SStream_concat0(O, "{1to8}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); break; case 43: // VPCMPDZrmib_alt, VPCMPDZrmibk_alt, VPCMPUDZrmib_alt, VPCMPUDZrmibk_alt SStream_concat0(O, "{1to16}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); break; case 44: // VPCMPQZ128rmib_alt, VPCMPQZ128rmibk_alt, VPCMPUQZ128rmib_alt, VPCMPUQZ... SStream_concat0(O, "{1to2}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); break; case 45: // VPCMPQZ128rmibk, VPCMPQZ256rmibk, VPCMPQZrmibk, VPCMPUQZ128rmibk, VPCM... printi64mem(MI, 3, O); break; case 46: // VPSLLDZmi, VPSLLQZmi, VPSRADZmi, VPSRAQZmi, VPSRLDZmi, VPSRLQZmi return; break; } // Fragment 3 encoded into 4 bits for 16 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 34) & 15); switch ((Bits >> 34) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC32rm, ADC64rm, ADCX32rm, ADCX64rm, ADD32rm, ADD64rm, ADDSDrm, ADDSD... return; break; case 1: // AESKEYGENASSIST128rr, ANDN32rr, ANDN64rr, BEXTR32rm, BEXTR32rr, BEXTR6... printOperand(MI, 0, O); break; case 2: // ANDN32rm, ANDN64rm, CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr,... SStream_concat0(O, ", "); break; case 3: // Int_VCMPSDrm, Int_VCMPSSrm, VBROADCASTI32X4krm, VBROADCASTI64X4krm, VB... printOperand(MI, 1, O); break; case 4: // VADDPDZ128rmkz, VADDPDZ128rrkz, VADDPDZ256rmkz, VADDPDZ256rrkz, VADDPD... SStream_concat0(O, " {"); break; case 5: // VADDPDZ128rrk, VADDPDZ256rrk, VADDPDZrrk, VADDPSZ128rrk, VADDPSZ256rrk... printOperand(MI, 2, O); break; case 6: // VADDPDZrbkz, VADDPSZrbkz, VADDSDZrrbkz, VADDSSZrrbkz, VDIVPDZrbkz, VDI... SStream_concat0(O, "} {z}"); op_addAvxZeroOpmask(MI); return; break; case 7: // VBROADCASTSDZ256m, VBROADCASTSDZ256r, VBROADCASTSDZm, VBROADCASTSDZr, ... return; break; case 8: // VCOMPRESSPDZ128mrk, VCOMPRESSPDZ256mrk, VCOMPRESSPDZmrk, VCOMPRESSPSZ1... printOperand(MI, 5, O); break; case 9: // VEXP2PDrb, VEXP2PSrb, VRCP28PDrb, VRCP28PSrb, VRSQRT28PDrb, VRSQRT28PS... SStream_concat0(O, " {sae}"); op_addAvxSae(MI); return; break; case 10: // VGATHERPF0DPDm, VGATHERPF0DPSm, VGATHERPF0QPDm, VGATHERPF0QPSm, VGATHE... SStream_concat0(O, "}"); return; break; case 11: // VPCMPDZ128rmib, VPCMPDZ128rmibk, VPCMPQZ256rmib, VPCMPQZ256rmibk, VPCM... SStream_concat0(O, "{1to4}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); break; case 12: // VPCMPDZ256rmib, VPCMPDZ256rmibk, VPCMPQZrmib, VPCMPQZrmibk, VPCMPUDZ25... SStream_concat0(O, "{1to8}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); break; case 13: // VPCMPDZrmib, VPCMPDZrmibk, VPCMPUDZrmib, VPCMPUDZrmibk SStream_concat0(O, "{1to16}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); break; case 14: // VPCMPQZ128rmib, VPCMPQZ128rmibk, VPCMPUQZ128rmib, VPCMPUQZ128rmibk SStream_concat0(O, "{1to2}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); break; case 15: // VPSCATTERDDZmr, VPSCATTERDQZmr, VPSCATTERQDZmr, VPSCATTERQQZmr, VSCATT... printOperand(MI, 6, O); SStream_concat0(O, "}"); return; break; } // Fragment 4 encoded into 5 bits for 17 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 38) & 31); switch ((Bits >> 38) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // AESKEYGENASSIST128rr, ANDN32rr, ANDN64rr, BEXTR32rm, BEXTR32rr, BEXTR6... return; break; case 1: // ANDN32rm, ANDN64rm, CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr,... printOperand(MI, 0, O); break; case 2: // Int_VCMPSDrm, Int_VCMPSSrm, VCMPPDrmi, VCMPPSrmi, VCMPSDZrm, VCMPSDrm,... SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 3: // Int_VCMPSDrr, Int_VCMPSSrr, VADDPDZ128rmkz, VADDPDZ128rrkz, VADDPDZ256... printOperand(MI, 1, O); break; case 4: // VAARG_64 printOperand(MI, 6, O); SStream_concat0(O, ", "); printOperand(MI, 7, O); SStream_concat0(O, ", "); printOperand(MI, 8, O); return; break; case 5: // VADDPDZ128rm, VADDPDZ128rr, VADDPDZ256rm, VADDPDZ256rr, VADDPDZrm, VAD... return; break; case 6: // VADDPDZ128rmbk, VADDPDZ256rmbk, VADDPDZrmbk, VADDPSZ128rmbk, VADDPSZ25... SStream_concat0(O, " {"); printOperand(MI, 2, O); break; case 7: // VADDPDZ128rrk, VADDPDZ256rrk, VADDPDZrrk, VADDPSZ128rrk, VADDPSZ256rrk... SStream_concat0(O, "}"); return; break; case 8: // VASTART_SAVE_XMM_REGS, VBROADCASTSDZ256mk, VBROADCASTSDZmk, VBROADCAST... printOperand(MI, 2, O); break; case 9: // VBROADCASTI32X4krm, VBROADCASTI64X4krm, VBROADCASTSDZ256rkz, VBROADCAS... SStream_concat0(O, "} {z}"); op_addAvxZeroOpmask(MI); return; break; case 10: // VCOMPRESSPDZ128mrk, VCOMPRESSPDZ128rrk, VCOMPRESSPDZ256mrk, VCOMPRESSP... SStream_concat0(O, "} "); return; break; case 11: // VEXP2PDrbk, VEXP2PSrbk, VMAXSDZrrbk, VMAXSSZrrbk, VMINSDZrrbk, VMINSSZ... SStream_concat0(O, "}{sae}"); op_addAvxSae(MI); return; break; case 12: // VEXP2PDrbkz, VEXP2PSrbkz, VRCP28PDrbkz, VRCP28PSrbkz, VRSQRT28PDrbkz, ... SStream_concat0(O, "} {z}{sae}"); op_addAvxSae(MI); op_addAvxZeroOpmask(MI); return; break; case 13: // VGATHERDPDZrm, VGATHERDPSZrm, VGATHERQPDZrm, VGATHERQPSZrm, VPGATHERDD... printOperand(MI, 3, O); SStream_concat0(O, "}"); return; break; case 14: // VMAXSDZrrb, VMAXSSZrrb, VMINSDZrrb, VMINSSZrrb, VRCP28SDrb, VRCP28SSrb... SStream_concat0(O, " {sae}"); op_addAvxSae(MI); return; break; case 15: // VPERMI2Drrkz, VPERMI2PDrrkz, VPERMI2PSrrkz, VPERMI2Qrrkz, VPERMT2Drrkz... SStream_concat0(O, "} {z} "); op_addAvxZeroOpmask(MI); return; break; case 16: // VPSLLDZri, VPSLLDZrm, VPSLLDZrr, VPSLLQZri, VPSLLQZrm, VPSLLQZrr, VPSL... return; break; } // Fragment 5 encoded into 4 bits for 10 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 43) & 15); switch ((Bits >> 43) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ANDN32rm, ANDN64rm, CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr,... return; break; case 1: // Int_VCMPSDrr, Int_VCMPSSrr, VCMPPDYrri, VCMPPDZrri, VCMPPDrri, VCMPPSY... SStream_concat0(O, ", "); printOperand(MI, 0, O); break; case 2: // VADDPDZ128rmb, VADDPDZ256rmb, VADDPDZrmb, VADDPSZ128rmb, VADDPSZ256rmb... return; break; case 3: // VADDPDZ128rmbk, VADDPDZ256rmbk, VADDPDZrmbk, VADDPSZ128rmbk, VADDPSZ25... SStream_concat0(O, "}"); return; break; case 4: // VADDPDZ128rmbkz, VADDPDZ256rmbkz, VADDPDZrmbkz, VADDPSZ128rmbkz, VADDP... SStream_concat0(O, " {"); printOperand(MI, 1, O); break; case 5: // VADDPDZ128rmkz, VADDPDZ128rrkz, VADDPDZ256rmkz, VADDPDZ256rrkz, VADDPD... SStream_concat0(O, "} {z}"); op_addAvxZeroOpmask(MI); return; break; case 6: // VMAXSDZrrbkz, VMAXSSZrrbkz, VMINSDZrrbkz, VMINSSZrrbkz, VRCP28SDrbkz, ... SStream_concat0(O, "} {z}{sae}"); op_addAvxSae(MI); op_addAvxZeroOpmask(MI); return; break; case 7: // VPSLLDZmik, VPSLLDZrik, VPSLLQZmik, VPSLLQZrik, VPSRADZmik, VPSRADZrik... SStream_concat0(O, "} "); return; break; case 8: // VPSLLDZmikz, VPSLLDZrikz, VPSLLDZrmkz, VPSLLDZrrkz, VPSLLQZmikz, VPSLL... SStream_concat0(O, "} {z} "); op_addAvxZeroOpmask(MI); return; break; case 9: // VRNDSCALESDrb, VRNDSCALESSrb SStream_concat0(O, " {sae}"); op_addAvxSae(MI); return; break; } // Fragment 6 encoded into 3 bits for 5 unique commands. //printf("Frag-6: %"PRIu64"\n", (Bits >> 47) & 7); switch ((Bits >> 47) & 7) { default: // llvm_unreachable("Invalid command number."); case 0: // Int_VCMPSDrr, Int_VCMPSSrr, VCMPPDYrri, VCMPPDZrri, VCMPPDrri, VCMPPSY... return; break; case 1: // VADDPDZ128rmbkz, VADDPDZ256rmbkz, VADDPDZrmbkz, VADDPSZ128rmbkz, VADDP... SStream_concat0(O, "} {z}"); op_addAvxZeroOpmask(MI); return; break; case 2: // VBLENDMPDZ128rmbk, VBLENDMPDZ256rmbk, VBLENDMPDZrmbk, VBLENDMPSZ128rmb... SStream_concat0(O, "}"); return; break; case 3: // VPCMPDZ128rmibk, VPCMPDZ256rmibk, VPCMPDZrmibk, VPCMPQZ128rmibk, VPCMP... SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}"); return; break; case 4: // VRNDSCALESDrbkz, VRNDSCALESSrbkz SStream_concat0(O, "} {z}{sae}"); op_addAvxSae(MI); op_addAvxZeroOpmask(MI); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 242 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 's', 't', '(', '0', ')', 0, /* 6 */ 's', 't', '(', '1', ')', 0, /* 12 */ 's', 't', '(', '2', ')', 0, /* 18 */ 's', 't', '(', '3', ')', 0, /* 24 */ 's', 't', '(', '4', ')', 0, /* 30 */ 's', 't', '(', '5', ')', 0, /* 36 */ 's', 't', '(', '6', ')', 0, /* 42 */ 's', 't', '(', '7', ')', 0, /* 48 */ 'x', 'm', 'm', '1', '0', 0, /* 54 */ 'y', 'm', 'm', '1', '0', 0, /* 60 */ 'z', 'm', 'm', '1', '0', 0, /* 66 */ 'c', 'r', '1', '0', 0, /* 71 */ 'd', 'r', '1', '0', 0, /* 76 */ 'x', 'm', 'm', '2', '0', 0, /* 82 */ 'y', 'm', 'm', '2', '0', 0, /* 88 */ 'z', 'm', 'm', '2', '0', 0, /* 94 */ 'x', 'm', 'm', '3', '0', 0, /* 100 */ 'y', 'm', 'm', '3', '0', 0, /* 106 */ 'z', 'm', 'm', '3', '0', 0, /* 112 */ 'k', '0', 0, /* 115 */ 'x', 'm', 'm', '0', 0, /* 120 */ 'y', 'm', 'm', '0', 0, /* 125 */ 'z', 'm', 'm', '0', 0, /* 130 */ 'f', 'p', '0', 0, /* 134 */ 'c', 'r', '0', 0, /* 138 */ 'd', 'r', '0', 0, /* 142 */ 'x', 'm', 'm', '1', '1', 0, /* 148 */ 'y', 'm', 'm', '1', '1', 0, /* 154 */ 'z', 'm', 'm', '1', '1', 0, /* 160 */ 'c', 'r', '1', '1', 0, /* 165 */ 'd', 'r', '1', '1', 0, /* 170 */ 'x', 'm', 'm', '2', '1', 0, /* 176 */ 'y', 'm', 'm', '2', '1', 0, /* 182 */ 'z', 'm', 'm', '2', '1', 0, /* 188 */ 'x', 'm', 'm', '3', '1', 0, /* 194 */ 'y', 'm', 'm', '3', '1', 0, /* 200 */ 'z', 'm', 'm', '3', '1', 0, /* 206 */ 'k', '1', 0, /* 209 */ 'x', 'm', 'm', '1', 0, /* 214 */ 'y', 'm', 'm', '1', 0, /* 219 */ 'z', 'm', 'm', '1', 0, /* 224 */ 'f', 'p', '1', 0, /* 228 */ 'c', 'r', '1', 0, /* 232 */ 'd', 'r', '1', 0, /* 236 */ 'x', 'm', 'm', '1', '2', 0, /* 242 */ 'y', 'm', 'm', '1', '2', 0, /* 248 */ 'z', 'm', 'm', '1', '2', 0, /* 254 */ 'c', 'r', '1', '2', 0, /* 259 */ 'd', 'r', '1', '2', 0, /* 264 */ 'x', 'm', 'm', '2', '2', 0, /* 270 */ 'y', 'm', 'm', '2', '2', 0, /* 276 */ 'z', 'm', 'm', '2', '2', 0, /* 282 */ 'k', '2', 0, /* 285 */ 'x', 'm', 'm', '2', 0, /* 290 */ 'y', 'm', 'm', '2', 0, /* 295 */ 'z', 'm', 'm', '2', 0, /* 300 */ 'f', 'p', '2', 0, /* 304 */ 'c', 'r', '2', 0, /* 308 */ 'd', 'r', '2', 0, /* 312 */ 'x', 'm', 'm', '1', '3', 0, /* 318 */ 'y', 'm', 'm', '1', '3', 0, /* 324 */ 'z', 'm', 'm', '1', '3', 0, /* 330 */ 'c', 'r', '1', '3', 0, /* 335 */ 'd', 'r', '1', '3', 0, /* 340 */ 'x', 'm', 'm', '2', '3', 0, /* 346 */ 'y', 'm', 'm', '2', '3', 0, /* 352 */ 'z', 'm', 'm', '2', '3', 0, /* 358 */ 'k', '3', 0, /* 361 */ 'x', 'm', 'm', '3', 0, /* 366 */ 'y', 'm', 'm', '3', 0, /* 371 */ 'z', 'm', 'm', '3', 0, /* 376 */ 'f', 'p', '3', 0, /* 380 */ 'c', 'r', '3', 0, /* 384 */ 'd', 'r', '3', 0, /* 388 */ 'x', 'm', 'm', '1', '4', 0, /* 394 */ 'y', 'm', 'm', '1', '4', 0, /* 400 */ 'z', 'm', 'm', '1', '4', 0, /* 406 */ 'c', 'r', '1', '4', 0, /* 411 */ 'd', 'r', '1', '4', 0, /* 416 */ 'x', 'm', 'm', '2', '4', 0, /* 422 */ 'y', 'm', 'm', '2', '4', 0, /* 428 */ 'z', 'm', 'm', '2', '4', 0, /* 434 */ 'k', '4', 0, /* 437 */ 'x', 'm', 'm', '4', 0, /* 442 */ 'y', 'm', 'm', '4', 0, /* 447 */ 'z', 'm', 'm', '4', 0, /* 452 */ 'f', 'p', '4', 0, /* 456 */ 'c', 'r', '4', 0, /* 460 */ 'd', 'r', '4', 0, /* 464 */ 'x', 'm', 'm', '1', '5', 0, /* 470 */ 'y', 'm', 'm', '1', '5', 0, /* 476 */ 'z', 'm', 'm', '1', '5', 0, /* 482 */ 'c', 'r', '1', '5', 0, /* 487 */ 'd', 'r', '1', '5', 0, /* 492 */ 'x', 'm', 'm', '2', '5', 0, /* 498 */ 'y', 'm', 'm', '2', '5', 0, /* 504 */ 'z', 'm', 'm', '2', '5', 0, /* 510 */ 'k', '5', 0, /* 513 */ 'x', 'm', 'm', '5', 0, /* 518 */ 'y', 'm', 'm', '5', 0, /* 523 */ 'z', 'm', 'm', '5', 0, /* 528 */ 'f', 'p', '5', 0, /* 532 */ 'c', 'r', '5', 0, /* 536 */ 'd', 'r', '5', 0, /* 540 */ 'x', 'm', 'm', '1', '6', 0, /* 546 */ 'y', 'm', 'm', '1', '6', 0, /* 552 */ 'z', 'm', 'm', '1', '6', 0, /* 558 */ 'x', 'm', 'm', '2', '6', 0, /* 564 */ 'y', 'm', 'm', '2', '6', 0, /* 570 */ 'z', 'm', 'm', '2', '6', 0, /* 576 */ 'k', '6', 0, /* 579 */ 'x', 'm', 'm', '6', 0, /* 584 */ 'y', 'm', 'm', '6', 0, /* 589 */ 'z', 'm', 'm', '6', 0, /* 594 */ 'f', 'p', '6', 0, /* 598 */ 'c', 'r', '6', 0, /* 602 */ 'd', 'r', '6', 0, /* 606 */ 'x', 'm', 'm', '1', '7', 0, /* 612 */ 'y', 'm', 'm', '1', '7', 0, /* 618 */ 'z', 'm', 'm', '1', '7', 0, /* 624 */ 'x', 'm', 'm', '2', '7', 0, /* 630 */ 'y', 'm', 'm', '2', '7', 0, /* 636 */ 'z', 'm', 'm', '2', '7', 0, /* 642 */ 'k', '7', 0, /* 645 */ 'x', 'm', 'm', '7', 0, /* 650 */ 'y', 'm', 'm', '7', 0, /* 655 */ 'z', 'm', 'm', '7', 0, /* 660 */ 'f', 'p', '7', 0, /* 664 */ 'c', 'r', '7', 0, /* 668 */ 'd', 'r', '7', 0, /* 672 */ 'x', 'm', 'm', '1', '8', 0, /* 678 */ 'y', 'm', 'm', '1', '8', 0, /* 684 */ 'z', 'm', 'm', '1', '8', 0, /* 690 */ 'x', 'm', 'm', '2', '8', 0, /* 696 */ 'y', 'm', 'm', '2', '8', 0, /* 702 */ 'z', 'm', 'm', '2', '8', 0, /* 708 */ 'x', 'm', 'm', '8', 0, /* 713 */ 'y', 'm', 'm', '8', 0, /* 718 */ 'z', 'm', 'm', '8', 0, /* 723 */ 'c', 'r', '8', 0, /* 727 */ 'd', 'r', '8', 0, /* 731 */ 'x', 'm', 'm', '1', '9', 0, /* 737 */ 'y', 'm', 'm', '1', '9', 0, /* 743 */ 'z', 'm', 'm', '1', '9', 0, /* 749 */ 'x', 'm', 'm', '2', '9', 0, /* 755 */ 'y', 'm', 'm', '2', '9', 0, /* 761 */ 'z', 'm', 'm', '2', '9', 0, /* 767 */ 'x', 'm', 'm', '9', 0, /* 772 */ 'y', 'm', 'm', '9', 0, /* 777 */ 'z', 'm', 'm', '9', 0, /* 782 */ 'c', 'r', '9', 0, /* 786 */ 'd', 'r', '9', 0, /* 790 */ 'r', '1', '0', 'b', 0, /* 795 */ 'r', '1', '1', 'b', 0, /* 800 */ 'r', '1', '2', 'b', 0, /* 805 */ 'r', '1', '3', 'b', 0, /* 810 */ 'r', '1', '4', 'b', 0, /* 815 */ 'r', '1', '5', 'b', 0, /* 820 */ 'r', '8', 'b', 0, /* 824 */ 'r', '9', 'b', 0, /* 828 */ 'r', '1', '0', 'd', 0, /* 833 */ 'r', '1', '1', 'd', 0, /* 838 */ 'r', '1', '2', 'd', 0, /* 843 */ 'r', '1', '3', 'd', 0, /* 848 */ 'r', '1', '4', 'd', 0, /* 853 */ 'r', '1', '5', 'd', 0, /* 858 */ 'r', '8', 'd', 0, /* 862 */ 'r', '9', 'd', 0, /* 866 */ 'a', 'h', 0, /* 869 */ 'b', 'h', 0, /* 872 */ 'c', 'h', 0, /* 875 */ 'd', 'h', 0, /* 878 */ 'e', 'd', 'i', 0, /* 882 */ 'r', 'd', 'i', 0, /* 886 */ 'e', 's', 'i', 0, /* 890 */ 'r', 's', 'i', 0, /* 894 */ 'a', 'l', 0, /* 897 */ 'b', 'l', 0, /* 900 */ 'c', 'l', 0, /* 903 */ 'd', 'l', 0, /* 906 */ 'd', 'i', 'l', 0, /* 910 */ 's', 'i', 'l', 0, /* 914 */ 'b', 'p', 'l', 0, /* 918 */ 's', 'p', 'l', 0, /* 922 */ 'e', 'b', 'p', 0, /* 926 */ 'r', 'b', 'p', 0, /* 930 */ 'e', 'i', 'p', 0, /* 934 */ 'r', 'i', 'p', 0, /* 938 */ 'e', 's', 'p', 0, /* 942 */ 'r', 's', 'p', 0, /* 946 */ 'c', 's', 0, /* 949 */ 'd', 's', 0, /* 952 */ 'e', 's', 0, /* 955 */ 'f', 's', 0, /* 958 */ 'f', 'l', 'a', 'g', 's', 0, /* 964 */ 's', 's', 0, /* 967 */ 'r', '1', '0', 'w', 0, /* 972 */ 'r', '1', '1', 'w', 0, /* 977 */ 'r', '1', '2', 'w', 0, /* 982 */ 'r', '1', '3', 'w', 0, /* 987 */ 'r', '1', '4', 'w', 0, /* 992 */ 'r', '1', '5', 'w', 0, /* 997 */ 'r', '8', 'w', 0, /* 1001 */ 'r', '9', 'w', 0, /* 1005 */ 'f', 'p', 's', 'w', 0, /* 1010 */ 'e', 'a', 'x', 0, /* 1014 */ 'r', 'a', 'x', 0, /* 1018 */ 'e', 'b', 'x', 0, /* 1022 */ 'r', 'b', 'x', 0, /* 1026 */ 'e', 'c', 'x', 0, /* 1030 */ 'r', 'c', 'x', 0, /* 1034 */ 'e', 'd', 'x', 0, /* 1038 */ 'r', 'd', 'x', 0, /* 1042 */ 'e', 'i', 'z', 0, /* 1046 */ 'r', 'i', 'z', 0, }; static const uint16_t RegAsmOffset[] = { 866, 894, 1011, 869, 897, 923, 914, 1019, 872, 900, 946, 1027, 875, 879, 906, 903, 949, 1035, 1010, 922, 1018, 1026, 878, 1034, 958, 930, 1042, 952, 886, 938, 1005, 955, 961, 931, 1014, 926, 1022, 1030, 882, 1038, 934, 1046, 890, 942, 887, 910, 939, 918, 964, 134, 228, 304, 380, 456, 532, 598, 664, 723, 782, 66, 160, 254, 330, 406, 482, 138, 232, 308, 384, 460, 536, 602, 668, 727, 786, 71, 165, 259, 335, 411, 487, 130, 224, 300, 376, 452, 528, 594, 660, 112, 206, 282, 358, 434, 510, 576, 642, 116, 210, 286, 362, 438, 514, 580, 646, 724, 783, 67, 161, 255, 331, 407, 483, 0, 6, 12, 18, 24, 30, 36, 42, 115, 209, 285, 361, 437, 513, 579, 645, 708, 767, 48, 142, 236, 312, 388, 464, 540, 606, 672, 731, 76, 170, 264, 340, 416, 492, 558, 624, 690, 749, 94, 188, 120, 214, 290, 366, 442, 518, 584, 650, 713, 772, 54, 148, 242, 318, 394, 470, 546, 612, 678, 737, 82, 176, 270, 346, 422, 498, 564, 630, 696, 755, 100, 194, 125, 219, 295, 371, 447, 523, 589, 655, 718, 777, 60, 154, 248, 324, 400, 476, 552, 618, 684, 743, 88, 182, 276, 352, 428, 504, 570, 636, 702, 761, 106, 200, 820, 824, 790, 795, 800, 805, 810, 815, 858, 862, 828, 833, 838, 843, 848, 853, 997, 1001, 967, 972, 977, 982, 987, 992, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { switch (PrintMethodIdx) { default: // llvm_unreachable("Unknown PrintMethod kind"); break; case 0: printf64mem(MI, OpIdx, OS); break; } } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case X86_AAD8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAD8i8 10) AsmString = "aad"; break; } return NULL; case X86_AAM8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAM8i8 10) AsmString = "aam"; break; } return NULL; case X86_CVTSD2SI64rm: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(X86_GR64RegClassID, 0)) { // (CVTSD2SI64rm GR64:$dst, sdmem:$src) AsmString = "cvtsd2siq $\xFF\x02\x01, $\x01"; break; } return NULL; case X86_XSTORE: if (MCInst_getNumOperands(MI) == 0) { // (XSTORE) AsmString = "xstorerng"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/X86/X86GenAsmWriter1.inc010066400017500001750000023114061363402546700212340ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 9999U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 9992U, // BUNDLE 10064U, // LIFETIME_START 9979U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 10079U, // AAA 17687U, // AAD8i8 20595U, // AAM8i8 10824U, // AAS 10832U, // ABS_F 0U, // ABS_Fp32 0U, // ABS_Fp64 0U, // ABS_Fp80 9694U, // ACQUIRE_MOV16rm 9694U, // ACQUIRE_MOV32rm 9694U, // ACQUIRE_MOV64rm 9694U, // ACQUIRE_MOV8rm 25075U, // ADC16i16 1082528U, // ADC16mi 1082528U, // ADC16mi8 1082528U, // ADC16mr 34653344U, // ADC16ri 34653344U, // ADC16ri8 68207776U, // ADC16rm 34653344U, // ADC16rr 34620576U, // ADC16rr_REV 25211U, // ADC32i32 1115296U, // ADC32mi 1115296U, // ADC32mi8 1115296U, // ADC32mr 34653344U, // ADC32ri 34653344U, // ADC32ri8 101762208U, // ADC32rm 34653344U, // ADC32rr 34620576U, // ADC32rr_REV 25359U, // ADC64i32 1131680U, // ADC64mi32 1131680U, // ADC64mi8 1131680U, // ADC64mr 34653344U, // ADC64ri32 34653344U, // ADC64ri8 135316640U, // ADC64rm 34653344U, // ADC64rr 34620576U, // ADC64rr_REV 24973U, // ADC8i8 1148064U, // ADC8mi 1148064U, // ADC8mi8 1148064U, // ADC8mr 34653344U, // ADC8ri 34653344U, // ADC8ri8 168871072U, // ADC8rm 34653344U, // ADC8rr 34620576U, // ADC8rr_REV 101736526U, // ADCX32rm 34627662U, // ADCX32rr 135290958U, // ADCX64rm 34627662U, // ADCX64rr 25084U, // ADD16i16 1082738U, // ADD16mi 1082738U, // ADD16mi8 1082738U, // ADD16mr 34653554U, // ADD16ri 34653554U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 68207986U, // ADD16rm 34653554U, // ADD16rr 0U, // ADD16rr_DB 34620786U, // ADD16rr_REV 25221U, // ADD32i32 1115506U, // ADD32mi 1115506U, // ADD32mi8 1115506U, // ADD32mr 34653554U, // ADD32ri 34653554U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 101762418U, // ADD32rm 34653554U, // ADD32rr 0U, // ADD32rr_DB 34620786U, // ADD32rr_REV 25369U, // ADD64i32 1131890U, // ADD64mi32 1131890U, // ADD64mi8 1131890U, // ADD64mr 34653554U, // ADD64ri32 0U, // ADD64ri32_DB 34653554U, // ADD64ri8 0U, // ADD64ri8_DB 135316850U, // ADD64rm 34653554U, // ADD64rr 0U, // ADD64rr_DB 34620786U, // ADD64rr_REV 24982U, // ADD8i8 1148274U, // ADD8mi 1148274U, // ADD8mi8 1148274U, // ADD8mr 34653554U, // ADD8ri 34653554U, // ADD8ri8 168871282U, // ADD8rm 34653554U, // ADD8rr 34620786U, // ADD8rr_REV 202393760U, // ADDPDrm 34621600U, // ADDPDrr 202397810U, // ADDPSrm 34625650U, // ADDPSrr 235949006U, // ADDSDrm 235949006U, // ADDSDrm_Int 34622414U, // ADDSDrr 34622414U, // ADDSDrr_Int 269507407U, // ADDSSrm 269507407U, // ADDSSrm_Int 34626383U, // ADDSSrr 34626383U, // ADDSSrr_Int 202393695U, // ADDSUBPDrm 34621535U, // ADDSUBPDrr 202397745U, // ADDSUBPSrm 34625585U, // ADDSUBPSrr 116081U, // ADD_F32m 132465U, // ADD_F64m 34167U, // ADD_FI16m 66935U, // ADD_FI32m 20740U, // ADD_FPrST0 17777U, // ADD_FST0r 0U, // ADD_Fp32 0U, // ADD_Fp32m 0U, // ADD_Fp64 0U, // ADD_Fp64m 0U, // ADD_Fp64m32 0U, // ADD_Fp80 0U, // ADD_Fp80m32 0U, // ADD_Fp80m64 0U, // ADD_FpI16m32 0U, // ADD_FpI16m64 0U, // ADD_FpI16m80 0U, // ADD_FpI32m32 0U, // ADD_FpI32m64 0U, // ADD_FpI32m80 2114929U, // ADD_FrST0 10018U, // ADJCALLSTACKDOWN32 10018U, // ADJCALLSTACKDOWN64 10036U, // ADJCALLSTACKUP32 10036U, // ADJCALLSTACKUP64 303063136U, // ADOX32rm 336617568U, // ADOX32rr 370172000U, // ADOX64rm 336617568U, // ADOX64rr 403725462U, // AESDECLASTrm 34626710U, // AESDECLASTrr 403719334U, // AESDECrm 34620582U, // AESDECrr 403725475U, // AESENCLASTrm 34626723U, // AESENCLASTrr 403719382U, // AESENCrm 34620630U, // AESENCrr 437273805U, // AESIMCrm 336610509U, // AESIMCrr 2584763587U, // AESKEYGENASSIST128rm 2484100291U, // AESKEYGENASSIST128rr 25093U, // AND16i16 1083023U, // AND16mi 1083023U, // AND16mi8 1083023U, // AND16mr 34653839U, // AND16ri 34653839U, // AND16ri8 68208271U, // AND16rm 34653839U, // AND16rr 34621071U, // AND16rr_REV 25231U, // AND32i32 1115791U, // AND32mi 1115791U, // AND32mi8 1115791U, // AND32mr 34653839U, // AND32ri 34653839U, // AND32ri8 101762703U, // AND32rm 34653839U, // AND32rr 34621071U, // AND32rr_REV 25379U, // AND64i32 1132175U, // AND64mi32 1132175U, // AND64mi8 1132175U, // AND64mr 34653839U, // AND64ri32 34653839U, // AND64ri8 135317135U, // AND64rm 34653839U, // AND64rr 34621071U, // AND64rr_REV 24991U, // AND8i8 1148559U, // AND8mi 1148559U, // AND8mi8 1148559U, // AND8mr 34653839U, // AND8ri 34653839U, // AND8ri8 168871567U, // AND8rm 34653839U, // AND8rr 34621071U, // AND8rr_REV 2484097198U, // ANDN32rm 2484097198U, // ANDN32rr 2484097198U, // ANDN64rm 2484097198U, // ANDN64rr 202393990U, // ANDNPDrm 34621830U, // ANDNPDrr 202398052U, // ANDNPSrm 34625892U, // ANDNPSrr 202393809U, // ANDPDrm 34621649U, // ANDPDrr 202397859U, // ANDPSrm 34625699U, // ANDPSrr 1085494U, // ARPL16mr 336613430U, // ARPL16rr 0U, // AVX2_SETALLONES 0U, // AVX512_512_SET0 0U, // AVX_SET0 2450544189U, // BEXTR32rm 2484098621U, // BEXTR32rr 2517653053U, // BEXTR64rm 2484098621U, // BEXTR64rr 2450544189U, // BEXTRI32mi 2484098621U, // BEXTRI32ri 2517653053U, // BEXTRI64mi 2484098621U, // BEXTRI64ri 303058975U, // BLCFILL32rm 336613407U, // BLCFILL32rr 370167839U, // BLCFILL64rm 336613407U, // BLCFILL64rr 303058706U, // BLCI32rm 336613138U, // BLCI32rr 370167570U, // BLCI64rm 336613138U, // BLCI64rr 303056054U, // BLCIC32rm 336610486U, // BLCIC32rr 370164918U, // BLCIC64rm 336610486U, // BLCIC64rr 303058926U, // BLCMSK32rm 336613358U, // BLCMSK32rr 370167790U, // BLCMSK64rm 336613358U, // BLCMSK64rr 303060571U, // BLCS32rm 336615003U, // BLCS32rr 370169435U, // BLCS64rm 336615003U, // BLCS64rr 2349877473U, // BLENDPDrmi 2182105313U, // BLENDPDrri 2349881523U, // BLENDPSrmi 2182109363U, // BLENDPSrri 202394112U, // BLENDVPDrm0 34621952U, // BLENDVPDrr0 202398215U, // BLENDVPSrm0 34626055U, // BLENDVPSrr0 303058984U, // BLSFILL32rm 336613416U, // BLSFILL32rr 370167848U, // BLSFILL64rm 336613416U, // BLSFILL64rr 303058862U, // BLSI32rm 336613294U, // BLSI32rr 370167726U, // BLSI64rm 336613294U, // BLSI64rr 303056061U, // BLSIC32rm 336610493U, // BLSIC32rr 370164925U, // BLSIC64rm 336610493U, // BLSIC64rr 303058934U, // BLSMSK32rm 336613366U, // BLSMSK32rr 370167798U, // BLSMSK64rm 336613366U, // BLSMSK64rr 303060520U, // BLSR32rm 336614952U, // BLSR32rr 370169384U, // BLSR64rm 336614952U, // BLSR64rr 303056575U, // BOUNDS16rm 370165439U, // BOUNDS32rm 470830751U, // BSF16rm 336613023U, // BSF16rr 303058591U, // BSF32rm 336613023U, // BSF32rr 370167455U, // BSF64rm 336613023U, // BSF64rr 470832655U, // BSR16rm 336614927U, // BSR16rr 303060495U, // BSR32rm 336614927U, // BSR32rr 370169359U, // BSR64rm 336614927U, // BSR64rr 20719U, // BSWAP32r 20719U, // BSWAP64r 1088528U, // BT16mi8 1088528U, // BT16mr 336616464U, // BT16ri8 336616464U, // BT16rr 1121296U, // BT32mi8 1121296U, // BT32mr 336616464U, // BT32ri8 336616464U, // BT32rr 1137680U, // BT64mi8 1137680U, // BT64mr 336616464U, // BT64ri8 336616464U, // BT64rr 1082595U, // BTC16mi8 1082595U, // BTC16mr 336610531U, // BTC16ri8 336610531U, // BTC16rr 1115363U, // BTC32mi8 1115363U, // BTC32mr 336610531U, // BTC32ri8 336610531U, // BTC32rr 1131747U, // BTC64mi8 1131747U, // BTC64mr 336610531U, // BTC64ri8 336610531U, // BTC64rr 1087022U, // BTR16mi8 1087022U, // BTR16mr 336614958U, // BTR16ri8 336614958U, // BTR16rr 1119790U, // BTR32mi8 1119790U, // BTR32mr 336614958U, // BTR32ri8 336614958U, // BTR32rr 1136174U, // BTR64mi8 1136174U, // BTR64mr 336614958U, // BTR64ri8 336614958U, // BTR64rr 1088510U, // BTS16mi8 1088510U, // BTS16mr 336616446U, // BTS16ri8 336616446U, // BTS16rr 1121278U, // BTS32mi8 1121278U, // BTS32mr 336616446U, // BTS32ri8 336616446U, // BTS32rr 1137662U, // BTS64mi8 1137662U, // BTS64mr 336616446U, // BTS64ri8 336616446U, // BTS64rr 2450542360U, // BZHI32rm 2484096792U, // BZHI32rr 2517651224U, // BZHI64rm 2484096792U, // BZHI64rr 36889U, // CALL16m 20505U, // CALL16r 69657U, // CALL32m 20505U, // CALL32r 86041U, // CALL64m 151577U, // CALL64pcrel32 20505U, // CALL64r 151577U, // CALLpcrel16 151577U, // CALLpcrel32 11125U, // CBW 10725U, // CDQ 10335U, // CDQE 10912U, // CHS_F 0U, // CHS_Fp32 0U, // CHS_Fp64 0U, // CHS_Fp80 10148U, // CLAC 10180U, // CLC 10230U, // CLD 102147U, // CLFLUSH 105592U, // CLFLUSHOPT 10450U, // CLGI 10460U, // CLI 11002U, // CLTS 99436U, // CLWB 10184U, // CMC 68174443U, // CMOVA16rm 34620011U, // CMOVA16rr 101728875U, // CMOVA32rm 34620011U, // CMOVA32rr 135283307U, // CMOVA64rm 34620011U, // CMOVA64rr 68177346U, // CMOVAE16rm 34622914U, // CMOVAE16rr 101731778U, // CMOVAE32rm 34622914U, // CMOVAE32rr 135286210U, // CMOVAE64rm 34622914U, // CMOVAE64rr 68174942U, // CMOVB16rm 34620510U, // CMOVB16rr 101729374U, // CMOVB32rm 34620510U, // CMOVB32rr 135283806U, // CMOVB64rm 34620510U, // CMOVB64rr 68177366U, // CMOVBE16rm 34622934U, // CMOVBE16rr 101731798U, // CMOVBE32rm 34622934U, // CMOVBE32rr 135286230U, // CMOVBE64rm 34622934U, // CMOVBE64rr 24815U, // CMOVBE_F 0U, // CMOVBE_Fp32 0U, // CMOVBE_Fp64 0U, // CMOVBE_Fp80 24783U, // CMOVB_F 0U, // CMOVB_Fp32 0U, // CMOVB_Fp64 0U, // CMOVB_Fp80 68177560U, // CMOVE16rm 34623128U, // CMOVE16rr 101731992U, // CMOVE32rm 34623128U, // CMOVE32rr 135286424U, // CMOVE64rm 34623128U, // CMOVE64rr 24847U, // CMOVE_F 0U, // CMOVE_Fp32 0U, // CMOVE_Fp64 0U, // CMOVE_Fp80 68177610U, // CMOVG16rm 34623178U, // CMOVG16rr 101732042U, // CMOVG32rm 34623178U, // CMOVG32rr 135286474U, // CMOVG64rm 34623178U, // CMOVG64rr 68177411U, // CMOVGE16rm 34622979U, // CMOVGE16rr 101731843U, // CMOVGE32rm 34622979U, // CMOVGE32rr 135286275U, // CMOVGE64rm 34622979U, // CMOVGE64rr 68178028U, // CMOVL16rm 34623596U, // CMOVL16rr 101732460U, // CMOVL32rm 34623596U, // CMOVL32rr 135286892U, // CMOVL64rm 34623596U, // CMOVL64rr 68177435U, // CMOVLE16rm 34623003U, // CMOVLE16rr 101731867U, // CMOVLE32rm 34623003U, // CMOVLE32rr 135286299U, // CMOVLE64rm 34623003U, // CMOVLE64rr 24798U, // CMOVNBE_F 0U, // CMOVNBE_Fp32 0U, // CMOVNBE_Fp64 0U, // CMOVNBE_Fp80 24767U, // CMOVNB_F 0U, // CMOVNB_Fp32 0U, // CMOVNB_Fp64 0U, // CMOVNB_Fp80 68177463U, // CMOVNE16rm 34623031U, // CMOVNE16rr 101731895U, // CMOVNE32rm 34623031U, // CMOVNE32rr 135286327U, // CMOVNE64rm 34623031U, // CMOVNE64rr 24831U, // CMOVNE_F 0U, // CMOVNE_Fp32 0U, // CMOVNE_Fp64 0U, // CMOVNE_Fp80 68178138U, // CMOVNO16rm 34623706U, // CMOVNO16rr 101732570U, // CMOVNO32rm 34623706U, // CMOVNO32rr 135287002U, // CMOVNO64rm 34623706U, // CMOVNO64rr 68178269U, // CMOVNP16rm 34623837U, // CMOVNP16rr 101732701U, // CMOVNP32rm 34623837U, // CMOVNP32rr 135287133U, // CMOVNP64rm 34623837U, // CMOVNP64rr 24902U, // CMOVNP_F 0U, // CMOVNP_Fp32 0U, // CMOVNP_Fp64 0U, // CMOVNP_Fp80 68179597U, // CMOVNS16rm 34625165U, // CMOVNS16rr 101734029U, // CMOVNS32rm 34625165U, // CMOVNS32rr 135288461U, // CMOVNS64rm 34625165U, // CMOVNS64rr 68178152U, // CMOVO16rm 34623720U, // CMOVO16rr 101732584U, // CMOVO32rm 34623720U, // CMOVO32rr 135287016U, // CMOVO64rm 34623720U, // CMOVO64rr 68178398U, // CMOVP16rm 34623966U, // CMOVP16rr 101732830U, // CMOVP32rm 34623966U, // CMOVP32rr 135287262U, // CMOVP64rm 34623966U, // CMOVP64rr 24918U, // CMOVP_F 0U, // CMOVP_Fp32 0U, // CMOVP_Fp64 0U, // CMOVP_Fp80 68181001U, // CMOVS16rm 34626569U, // CMOVS16rr 101735433U, // CMOVS32rm 34626569U, // CMOVS32rr 135289865U, // CMOVS64rm 34626569U, // CMOVS64rr 9403U, // CMOV_FR32 9590U, // CMOV_FR64 9610U, // CMOV_GR16 9423U, // CMOV_GR32 9630U, // CMOV_GR8 9382U, // CMOV_RFP32 9569U, // CMOV_RFP64 9297U, // CMOV_RFP80 9339U, // CMOV_V16F32 9443U, // CMOV_V2F64 9506U, // CMOV_V2I64 9318U, // CMOV_V4F32 9464U, // CMOV_V4F64 9527U, // CMOV_V4I64 9361U, // CMOV_V8F32 9485U, // CMOV_V8F64 9548U, // CMOV_V8I64 25120U, // CMP16i16 1085732U, // CMP16mi 1085732U, // CMP16mi8 1085732U, // CMP16mr 336613668U, // CMP16ri 336613668U, // CMP16ri8 470831396U, // CMP16rm 336613668U, // CMP16rr 336613668U, // CMP16rr_REV 25285U, // CMP32i32 1118500U, // CMP32mi 1118500U, // CMP32mi8 1118500U, // CMP32mr 336613668U, // CMP32ri 336613668U, // CMP32ri8 303059236U, // CMP32rm 336613668U, // CMP32rr 336613668U, // CMP32rr_REV 25400U, // CMP64i32 1134884U, // CMP64mi32 1134884U, // CMP64mi8 1134884U, // CMP64mr 336613668U, // CMP64ri32 336613668U, // CMP64ri8 370168100U, // CMP64rm 336613668U, // CMP64rr 336613668U, // CMP64rr_REV 25008U, // CMP8i8 1151268U, // CMP8mi 1151268U, // CMP8mi8 1151268U, // CMP8mr 336613668U, // CMP8ri 336613668U, // CMP8ri8 504385828U, // CMP8rm 336613668U, // CMP8rr 336613668U, // CMP8rr_REV 204646813U, // CMPPDrmi 2349877662U, // CMPPDrmi_alt 36891037U, // CMPPDrri 2182105502U, // CMPPDrri_alt 205695389U, // CMPPSrmi 2349881732U, // CMPPSrmi_alt 37939613U, // CMPPSrri 2182109572U, // CMPPSrri_alt 197558U, // CMPSB 240298397U, // CMPSDrm 2383432755U, // CMPSDrm_alt 38988189U, // CMPSDrr 2182106163U, // CMPSDrr_alt 216115U, // CMPSL 234670U, // CMPSQ 274901405U, // CMPSSrm 2416991148U, // CMPSSrm_alt 40036765U, // CMPSSrr 2182110124U, // CMPSSrr_alt 253825U, // CMPSW 262780U, // CMPXCHG16B 1085103U, // CMPXCHG16rm 336613039U, // CMPXCHG16rr 1117871U, // CMPXCHG32rm 336613039U, // CMPXCHG32rr 1134255U, // CMPXCHG64rm 336613039U, // CMPXCHG64rr 82568U, // CMPXCHG8B 1150639U, // CMPXCHG8rm 336613039U, // CMPXCHG8rr 537938945U, // COMISDrm 336612353U, // COMISDrr 537942914U, // COMISSrm 336616322U, // COMISSrr 20794U, // COMP_FST0r 20311U, // COM_FIPr 20254U, // COM_FIr 20600U, // COM_FST0r 10974U, // COS_F 0U, // COS_Fp32 0U, // COS_Fp64 0U, // COS_Fp80 10224U, // CPUID 10631U, // CQO 68206670U, // CRC32r32m16 101761102U, // CRC32r32m32 168869966U, // CRC32r32m8 34652238U, // CRC32r32r16 34652238U, // CRC32r32r32 34652238U, // CRC32r32r8 135315534U, // CRC32r64m64 168869966U, // CRC32r64m8 34652238U, // CRC32r64r64 34652238U, // CRC32r64r8 370165661U, // CVTDQ2PDrm 336611229U, // CVTDQ2PDrr 437278594U, // CVTDQ2PSrm 336615298U, // CVTDQ2PSrr 537940589U, // CVTPD2DQrm 336613997U, // CVTPD2DQrr 537941826U, // CVTPD2PSrm 336615234U, // CVTPD2PSrr 537940621U, // CVTPS2DQrm 336614029U, // CVTPS2DQrr 571492276U, // CVTPS2PDrm 336611252U, // CVTPS2PDrr 571494285U, // CVTSD2SI64rm 336613261U, // CVTSD2SI64rr 571494285U, // CVTSD2SIrm 336613261U, // CVTSD2SIrr 571497132U, // CVTSD2SSrm 336616108U, // CVTSD2SSrr 370166563U, // CVTSI2SD64rm 336612131U, // CVTSI2SD64rr 303057699U, // CVTSI2SDrm 336612131U, // CVTSI2SDrr 370170551U, // CVTSI2SS64rm 336616119U, // CVTSI2SS64rr 303061687U, // CVTSI2SSrm 336616119U, // CVTSI2SSrr 605047610U, // CVTSS2SDrm 336612154U, // CVTSS2SDrr 605048740U, // CVTSS2SI64rm 336613284U, // CVTSS2SI64rr 605048740U, // CVTSS2SIrm 336613284U, // CVTSS2SIrr 537940577U, // CVTTPD2DQrm 336613985U, // CVTTPD2DQrr 537940609U, // CVTTPS2DQrm 336614017U, // CVTTPS2DQrr 571494273U, // CVTTSD2SI64rm 336613249U, // CVTTSD2SI64rr 571494273U, // CVTTSD2SIrm 336613249U, // CVTTSD2SIrr 605048728U, // CVTTSS2SI64rm 336613272U, // CVTTSS2SI64rr 605048728U, // CVTTSS2SIrm 336613272U, // CVTTSS2SIrr 10276U, // CWD 10308U, // CWDE 10083U, // DAA 10828U, // DAS 9964U, // DATA16_PREFIX 33961U, // DEC16m 17577U, // DEC16r 17577U, // DEC16r_alt 66729U, // DEC32m 17577U, // DEC32r 17577U, // DEC32r_alt 83113U, // DEC64m 17577U, // DEC64r 99497U, // DEC8m 17577U, // DEC8r 40199U, // DIV16m 23815U, // DIV16r 72967U, // DIV32m 23815U, // DIV32r 89351U, // DIV64m 23815U, // DIV64r 105735U, // DIV8m 23815U, // DIV8r 202394123U, // DIVPDrm 34621963U, // DIVPDrr 202398226U, // DIVPSrm 34626066U, // DIVPSrr 120388U, // DIVR_F32m 136772U, // DIVR_F64m 38475U, // DIVR_FI16m 71243U, // DIVR_FI32m 20861U, // DIVR_FPrST0 22084U, // DIVR_FST0r 0U, // DIVR_Fp32m 0U, // DIVR_Fp64m 0U, // DIVR_Fp64m32 0U, // DIVR_Fp80m32 0U, // DIVR_Fp80m64 0U, // DIVR_FpI16m32 0U, // DIVR_FpI16m64 0U, // DIVR_FpI16m80 0U, // DIVR_FpI32m32 0U, // DIVR_FpI32m64 0U, // DIVR_FpI32m80 2119236U, // DIVR_FrST0 235949160U, // DIVSDrm 235949160U, // DIVSDrm_Int 34622568U, // DIVSDrr 34622568U, // DIVSDrr_Int 269507550U, // DIVSSrm 269507550U, // DIVSSrm_Int 34626526U, // DIVSSrr 34626526U, // DIVSSrr_Int 122118U, // DIV_F32m 138502U, // DIV_F64m 40204U, // DIV_FI16m 72972U, // DIV_FI32m 20951U, // DIV_FPrST0 23814U, // DIV_FST0r 0U, // DIV_Fp32 0U, // DIV_Fp32m 0U, // DIV_Fp64 0U, // DIV_Fp64m 0U, // DIV_Fp64m32 0U, // DIV_Fp80 0U, // DIV_Fp80m32 0U, // DIV_Fp80m64 0U, // DIV_FpI16m32 0U, // DIV_FpI16m64 0U, // DIV_FpI16m80 0U, // DIV_FpI32m32 0U, // DIV_FpI32m64 0U, // DIV_FpI32m80 2120966U, // DIV_FrST0 2349877655U, // DPPDrmi 2182105495U, // DPPDrri 2349881725U, // DPPSrmi 2182109565U, // DPPSrri 25522U, // EH_RETURN 25522U, // EH_RETURN64 9773U, // EH_SjLj_LongJmp32 9877U, // EH_SjLj_LongJmp64 9792U, // EH_SjLj_SetJmp32 9896U, // EH_SjLj_SetJmp64 152007U, // EH_SjLj_Setup 10962U, // ENCLS 11092U, // ENCLU 336614864U, // ENTER 2148653505U, // EXTRACTPSmr 2484099521U, // EXTRACTPSrr 34657423U, // EXTRQ 2786120847U, // EXTRQI 9754U, // F2XM1 7393304U, // FARCALL16i 282648U, // FARCALL16m 7393304U, // FARCALL32i 282648U, // FARCALL32m 282648U, // FARCALL64 7393588U, // FARJMP16i 282932U, // FARJMP16m 7393588U, // FARJMP32i 282932U, // FARJMP32m 282932U, // FARJMP64 116248U, // FBLDm 119179U, // FBSTPm 118904U, // FCOM32m 135288U, // FCOM64m 119098U, // FCOMP32m 135482U, // FCOMP64m 10694U, // FCOMPP 10709U, // FDECSTP 10968U, // FEMMS 19943U, // FFREE 36990U, // FICOM16m 69758U, // FICOM32m 37185U, // FICOMP16m 69953U, // FICOMP32m 10717U, // FINCSTP 40385U, // FLDCW16m 122131U, // FLDENVm 10280U, // FLDL2E 11007U, // FLDL2T 9858U, // FLDLG2 9865U, // FLDLN2 10464U, // FLDPI 11328U, // FNCLEX 11048U, // FNINIT 10689U, // FNOP 40392U, // FNSTCW16m 11155U, // FNSTSW16r 122771U, // FNSTSWm 0U, // FP32_TO_INT16_IN_MEM 0U, // FP32_TO_INT32_IN_MEM 0U, // FP32_TO_INT64_IN_MEM 0U, // FP64_TO_INT16_IN_MEM 0U, // FP64_TO_INT32_IN_MEM 0U, // FP64_TO_INT64_IN_MEM 0U, // FP80_TO_INT16_IN_MEM 0U, // FP80_TO_INT32_IN_MEM 0U, // FP80_TO_INT64_IN_MEM 10586U, // FPATAN 10563U, // FPREM 9747U, // FPREM1 10593U, // FPTAN 20753U, // FP_FFREEP 11067U, // FRNDINT 120305U, // FRSTORm 118408U, // FSAVEm 10313U, // FSCALE 10575U, // FSETPM 10979U, // FSINCOS 122139U, // FSTENVm 10558U, // FXAM 284153U, // FXRSTOR 278740U, // FXRSTOR64 282256U, // FXSAVE 278730U, // FXSAVE64 11014U, // FXTRACT 11149U, // FYL2X 9760U, // FYL2XP1 202393990U, // FsANDNPDrm 34621830U, // FsANDNPDrr 202398052U, // FsANDNPSrm 34625892U, // FsANDNPSrr 202393809U, // FsANDPDrm 34621649U, // FsANDPDrr 202397859U, // FsANDPSrm 34625699U, // FsANDPSrr 0U, // FsFLD0SD 0U, // FsFLD0SS 537937996U, // FsMOVAPDrm 537942054U, // FsMOVAPSrm 202394047U, // FsORPDrm 34621887U, // FsORPDrr 202398117U, // FsORPSrm 34625957U, // FsORPSrr 537937995U, // FsVMOVAPDrm 537942053U, // FsVMOVAPSrm 202394054U, // FsXORPDrm 34621894U, // FsXORPDrr 202398124U, // FsXORPSrm 34625964U, // FsXORPSrr 202393990U, // FvANDNPDrm 34621830U, // FvANDNPDrr 202398052U, // FvANDNPSrm 34625892U, // FvANDNPSrr 202393809U, // FvANDPDrm 34621649U, // FvANDPDrr 202397859U, // FvANDPSrm 34625699U, // FvANDPSrr 202394047U, // FvORPDrm 34621887U, // FvORPDrr 202398117U, // FvORPSrm 34625957U, // FvORPSrr 202394054U, // FvXORPDrm 34621894U, // FvXORPDrr 202398124U, // FvXORPSrm 34625964U, // FvXORPSrr 10168U, // GETSEC 202393768U, // HADDPDrm 34621608U, // HADDPDrr 202397818U, // HADDPSrm 34625658U, // HADDPSrr 11063U, // HLT 202393717U, // HSUBPDrm 34621557U, // HSUBPDrr 202397767U, // HSUBPSrm 34625607U, // HSUBPSrr 40205U, // IDIV16m 23821U, // IDIV16r 72973U, // IDIV32m 23821U, // IDIV32r 89357U, // IDIV64m 23821U, // IDIV64r 105741U, // IDIV8m 23821U, // IDIV8r 34347U, // ILD_F16m 67115U, // ILD_F32m 83499U, // ILD_F64m 0U, // ILD_Fp16m32 0U, // ILD_Fp16m64 0U, // ILD_Fp16m80 0U, // ILD_Fp32m32 0U, // ILD_Fp32m64 0U, // ILD_Fp32m80 0U, // ILD_Fp64m32 0U, // ILD_Fp64m64 0U, // ILD_Fp64m80 36966U, // IMUL16m 20582U, // IMUL16r 68178022U, // IMUL16rm 2618314854U, // IMUL16rmi 2618314854U, // IMUL16rmi8 34623590U, // IMUL16rr 2484097126U, // IMUL16rri 2484097126U, // IMUL16rri8 69734U, // IMUL32m 20582U, // IMUL32r 101732454U, // IMUL32rm 2450542694U, // IMUL32rmi 2450542694U, // IMUL32rmi8 34623590U, // IMUL32rr 2484097126U, // IMUL32rri 2484097126U, // IMUL32rri8 86118U, // IMUL64m 20582U, // IMUL64r 135286886U, // IMUL64rm 2517651558U, // IMUL64rmi32 2517651558U, // IMUL64rmi8 34623590U, // IMUL64rr 2484097126U, // IMUL64rri32 2484097126U, // IMUL64rri8 102502U, // IMUL8m 20582U, // IMUL8r 25112U, // IN16ri 11307U, // IN16rr 25276U, // IN32ri 11317U, // IN32rr 25000U, // IN8ri 11297U, // IN8rr 34014U, // INC16m 17630U, // INC16r 17630U, // INC16r_alt 66782U, // INC32m 17630U, // INC32r 17630U, // INC32r_alt 83166U, // INC64m 17630U, // INC64r 99550U, // INC8m 17630U, // INC8r 8684457U, // INSB 2416990679U, // INSERTPSrm 2182109655U, // INSERTPSrr 34657546U, // INSERTQ 2182141194U, // INSERTQI 8703005U, // INSL 8724340U, // INSW 23644U, // INT 9768U, // INT1 9872U, // INT3 10635U, // INTO 10271U, // INVD 437279846U, // INVEPT32 437279846U, // INVEPT64 102076U, // INVLPG 11263U, // INVLPGA32 11280U, // INVLPGA64 437274118U, // INVPCID32 437274118U, // INVPCID64 437274127U, // INVVPID32 437274127U, // INVVPID64 11022U, // IRET16 10259U, // IRET32 10768U, // IRET64 37279U, // ISTT_FP16m 70047U, // ISTT_FP32m 86431U, // ISTT_FP64m 0U, // ISTT_Fp16m32 0U, // ISTT_Fp16m64 0U, // ISTT_Fp16m80 0U, // ISTT_Fp32m32 0U, // ISTT_Fp32m64 0U, // ISTT_Fp32m80 0U, // ISTT_Fp64m32 0U, // ISTT_Fp64m64 0U, // ISTT_Fp64m80 40124U, // IST_F16m 72892U, // IST_F32m 37272U, // IST_FP16m 70040U, // IST_FP32m 86424U, // IST_FP64m 0U, // IST_Fp16m32 0U, // IST_Fp16m64 0U, // IST_Fp16m80 0U, // IST_Fp32m32 0U, // IST_Fp32m64 0U, // IST_Fp32m80 0U, // IST_Fp64m32 0U, // IST_Fp64m64 0U, // IST_Fp64m80 240298397U, // Int_CMPSDrm 38988189U, // Int_CMPSDrr 274901405U, // Int_CMPSSrm 40036765U, // Int_CMPSSrr 537938945U, // Int_COMISDrm 336612353U, // Int_COMISDrr 537942914U, // Int_COMISSrm 336616322U, // Int_COMISSrr 235952812U, // Int_CVTSD2SSrm 34626220U, // Int_CVTSD2SSrr 135285539U, // Int_CVTSI2SD64rm 34622243U, // Int_CVTSI2SD64rr 101731107U, // Int_CVTSI2SDrm 34622243U, // Int_CVTSI2SDrr 135289527U, // Int_CVTSI2SS64rm 34626231U, // Int_CVTSI2SS64rr 101735095U, // Int_CVTSI2SSrm 34626231U, // Int_CVTSI2SSrr 269503290U, // Int_CVTSS2SDrm 34622266U, // Int_CVTSS2SDrr 571494273U, // Int_CVTTSD2SI64rm 336613249U, // Int_CVTTSD2SI64rr 571494273U, // Int_CVTTSD2SIrm 336613249U, // Int_CVTTSD2SIrr 605048728U, // Int_CVTTSS2SI64rm 336613272U, // Int_CVTTSS2SI64rr 605048728U, // Int_CVTTSS2SIrm 336613272U, // Int_CVTTSS2SIrr 10052U, // Int_MemBarrier 537938944U, // Int_UCOMISDrm 336612352U, // Int_UCOMISDrr 537942913U, // Int_UCOMISSrm 336616321U, // Int_UCOMISSrr 2488625569U, // Int_VCMPSDrm 2488641953U, // Int_VCMPSDrr 2489674145U, // Int_VCMPSSrm 2489690529U, // Int_VCMPSSrr 537938953U, // Int_VCOMISDZrm 336612361U, // Int_VCOMISDZrr 537938953U, // Int_VCOMISDrm 336612361U, // Int_VCOMISDrr 537942922U, // Int_VCOMISSZrm 336616330U, // Int_VCOMISSZrr 537942922U, // Int_VCOMISSrm 336616330U, // Int_VCOMISSrr 2484099755U, // Int_VCVTSD2SSrm 2484099755U, // Int_VCVTSD2SSrr 2484095778U, // Int_VCVTSI2SD64Zrm 2484095778U, // Int_VCVTSI2SD64Zrr 2484095778U, // Int_VCVTSI2SD64rm 2484095778U, // Int_VCVTSI2SD64rr 2484095778U, // Int_VCVTSI2SDZrm 2484095778U, // Int_VCVTSI2SDZrr 2484095778U, // Int_VCVTSI2SDrm 2484095778U, // Int_VCVTSI2SDrr 2484099766U, // Int_VCVTSI2SS64Zrm 2484099766U, // Int_VCVTSI2SS64Zrr 2484099766U, // Int_VCVTSI2SS64rm 2484099766U, // Int_VCVTSI2SS64rr 2484099766U, // Int_VCVTSI2SSZrm 2484099766U, // Int_VCVTSI2SSZrr 2484099766U, // Int_VCVTSI2SSrm 2484099766U, // Int_VCVTSI2SSrr 2484095801U, // Int_VCVTSS2SDrm 2484095801U, // Int_VCVTSS2SDrr 571494272U, // Int_VCVTTSD2SI64Zrm 336613248U, // Int_VCVTTSD2SI64Zrr 571494272U, // Int_VCVTTSD2SI64rm 336613248U, // Int_VCVTTSD2SI64rr 571494272U, // Int_VCVTTSD2SIZrm 336613248U, // Int_VCVTTSD2SIZrr 571494272U, // Int_VCVTTSD2SIrm 336613248U, // Int_VCVTTSD2SIrr 571494324U, // Int_VCVTTSD2USI64Zrm 336613300U, // Int_VCVTTSD2USI64Zrr 571494324U, // Int_VCVTTSD2USIZrm 336613300U, // Int_VCVTTSD2USIZrr 605048727U, // Int_VCVTTSS2SI64Zrm 336613271U, // Int_VCVTTSS2SI64Zrr 605048727U, // Int_VCVTTSS2SI64rm 336613271U, // Int_VCVTTSS2SI64rr 605048727U, // Int_VCVTTSS2SIZrm 336613271U, // Int_VCVTTSS2SIZrr 605048727U, // Int_VCVTTSS2SIrm 336613271U, // Int_VCVTTSS2SIrr 605048781U, // Int_VCVTTSS2USI64Zrm 336613325U, // Int_VCVTTSS2USI64Zrr 605048781U, // Int_VCVTTSS2USIZrm 336613325U, // Int_VCVTTSS2USIZrr 2484095789U, // Int_VCVTUSI2SD64Zrm 2484095789U, // Int_VCVTUSI2SD64Zrr 2484095789U, // Int_VCVTUSI2SDZrm 2484095789U, // Int_VCVTUSI2SDZrr 2484099777U, // Int_VCVTUSI2SS64Zrm 2484099777U, // Int_VCVTUSI2SS64Zrr 2484099777U, // Int_VCVTUSI2SSZrm 2484099777U, // Int_VCVTUSI2SSZrr 537938943U, // Int_VUCOMISDZrm 336612351U, // Int_VUCOMISDZrr 537938943U, // Int_VUCOMISDrm 336612351U, // Int_VUCOMISDrr 537942912U, // Int_VUCOMISSZrm 336616320U, // Int_VUCOMISSZrr 537942912U, // Int_VUCOMISSrm 336616320U, // Int_VUCOMISSrr 150966U, // JAE_1 150966U, // JAE_2 150966U, // JAE_4 148032U, // JA_1 148032U, // JA_2 148032U, // JA_4 150986U, // JBE_1 150986U, // JBE_2 150986U, // JBE_4 148198U, // JB_1 148198U, // JB_2 148198U, // JB_4 155826U, // JCXZ 155819U, // JECXZ 151051U, // JE_1 151051U, // JE_2 151051U, // JE_4 151022U, // JGE_1 151022U, // JGE_2 151022U, // JGE_4 151224U, // JG_1 151224U, // JG_2 151224U, // JG_4 151055U, // JLE_1 151055U, // JLE_2 151055U, // JLE_4 151572U, // JL_1 151572U, // JL_2 151572U, // JL_4 37167U, // JMP16m 20783U, // JMP16r 69935U, // JMP32m 20783U, // JMP32r 86319U, // JMP64m 20783U, // JMP64r 151855U, // JMP_1 151855U, // JMP_2 151855U, // JMP_4 151075U, // JNE_1 151075U, // JNE_2 151075U, // JNE_4 151758U, // JNO_1 151758U, // JNO_2 151758U, // JNO_4 151889U, // JNP_1 151889U, // JNP_2 151889U, // JNP_4 153217U, // JNS_1 153217U, // JNS_2 153217U, // JNS_4 151754U, // JO_1 151754U, // JO_2 151754U, // JO_4 151833U, // JP_1 151833U, // JP_2 151833U, // JP_4 155832U, // JRCXZ 153213U, // JS_1 153213U, // JS_2 153213U, // JS_4 2484093616U, // KANDBrr 2484094357U, // KANDDrr 2484093722U, // KANDNBrr 2484094620U, // KANDNDrr 2484098065U, // KANDNQrr 2484100778U, // KANDNWrr 2484097766U, // KANDQrr 2484100577U, // KANDWrr 336610405U, // KMOVBkk 504382565U, // KMOVBkm 336610405U, // KMOVBkr 1148005U, // KMOVBmk 336610405U, // KMOVBrk 336612637U, // KMOVDkk 303058205U, // KMOVDkm 336612637U, // KMOVDkr 1117469U, // KMOVDmk 336612637U, // KMOVDrk 336614767U, // KMOVQkk 370169199U, // KMOVQkm 336614767U, // KMOVQkr 1135983U, // KMOVQmk 336614767U, // KMOVQrk 336617515U, // KMOVWkk 470835243U, // KMOVWkm 336617515U, // KMOVWkr 1089579U, // KMOVWmk 336617515U, // KMOVWrk 336610298U, // KNOTBrr 336612530U, // KNOTDrr 336614651U, // KNOTQrr 336617417U, // KNOTWrr 2484093787U, // KORBrr 2484095606U, // KORDrr 2484098134U, // KORQrr 336610327U, // KORTESTBrr 336612559U, // KORTESTDrr 336614689U, // KORTESTQrr 336617446U, // KORTESTWrr 2484100858U, // KORWrr 0U, // KSET0B 0U, // KSET0W 0U, // KSET1B 0U, // KSET1W 2484093693U, // KSHIFTLBri 2484094547U, // KSHIFTLDri 2484098007U, // KSHIFTLQri 2484100749U, // KSHIFTLWri 2484093817U, // KSHIFTRBri 2484095651U, // KSHIFTRDri 2484098179U, // KSHIFTRQri 2484100888U, // KSHIFTRWri 2484100473U, // KUNPCKBWrr 2484093793U, // KXNORBrr 2484095612U, // KXNORDrr 2484098140U, // KXNORQrr 2484100864U, // KXNORWrr 2484093801U, // KXORBrr 2484095627U, // KXORDrr 2484098155U, // KXORQrr 2484100872U, // KXORWrr 10415U, // LAHF 470832561U, // LAR16rm 336614833U, // LAR16rr 470832561U, // LAR32rm 336614833U, // LAR32rr 470832561U, // LAR64rm 336614833U, // LAR64rr 1085103U, // LCMPXCHG16 262780U, // LCMPXCHG16B 1117871U, // LCMPXCHG32 1134255U, // LCMPXCHG64 1150639U, // LCMPXCHG8 82568U, // LCMPXCHG8B 437279977U, // LDDQUrm 71189U, // LDMXCSR 672159329U, // LDS16rm 672159329U, // LDS32rm 11335U, // LD_F0 9742U, // LD_F1 116254U, // LD_F32m 132638U, // LD_F64m 378398U, // LD_F80m 0U, // LD_Fp032 0U, // LD_Fp064 0U, // LD_Fp080 0U, // LD_Fp132 0U, // LD_Fp164 0U, // LD_Fp180 0U, // LD_Fp32m 0U, // LD_Fp32m64 0U, // LD_Fp32m80 0U, // LD_Fp64m 0U, // LD_Fp64m80 0U, // LD_Fp80m 17950U, // LD_Frr 705708603U, // LEA16r 705708603U, // LEA32r 705708603U, // LEA64_32r 705708603U, // LEA64r 10402U, // LEAVE 10402U, // LEAVE64 672159334U, // LES16rm 672159334U, // LES32rm 10287U, // LFENCE 672159347U, // LFS16rm 672159347U, // LFS32rm 672159347U, // LFS64rm 285716U, // LGDT16m 285716U, // LGDT32m 285716U, // LGDT64m 672159352U, // LGS16rm 672159352U, // LGS32rm 672159352U, // LGS64rm 285728U, // LIDT16m 285728U, // LIDT32m 285728U, // LIDT64m 39980U, // LLDT16m 23596U, // LLDT16r 40805U, // LMSW16m 24421U, // LMSW16r 1082738U, // LOCK_ADD16mi 1082738U, // LOCK_ADD16mi8 1082738U, // LOCK_ADD16mr 1115506U, // LOCK_ADD32mi 1115506U, // LOCK_ADD32mi8 1115506U, // LOCK_ADD32mr 1131890U, // LOCK_ADD64mi32 1131890U, // LOCK_ADD64mi8 1131890U, // LOCK_ADD64mr 1148274U, // LOCK_ADD8mi 1148274U, // LOCK_ADD8mr 1083023U, // LOCK_AND16mi 1083023U, // LOCK_AND16mi8 1083023U, // LOCK_AND16mr 1115791U, // LOCK_AND32mi 1115791U, // LOCK_AND32mi8 1115791U, // LOCK_AND32mr 1132175U, // LOCK_AND64mi32 1132175U, // LOCK_AND64mi8 1132175U, // LOCK_AND64mr 1148559U, // LOCK_AND8mi 1148559U, // LOCK_AND8mr 33961U, // LOCK_DEC16m 66729U, // LOCK_DEC32m 83113U, // LOCK_DEC64m 99497U, // LOCK_DEC8m 34014U, // LOCK_INC16m 66782U, // LOCK_INC32m 83166U, // LOCK_INC64m 99550U, // LOCK_INC8m 1086952U, // LOCK_OR16mi 1086952U, // LOCK_OR16mi8 1086952U, // LOCK_OR16mr 1119720U, // LOCK_OR32mi 1119720U, // LOCK_OR32mi8 1119720U, // LOCK_OR32mr 1136104U, // LOCK_OR64mi32 1136104U, // LOCK_OR64mi8 1136104U, // LOCK_OR64mr 1152488U, // LOCK_OR8mi 1152488U, // LOCK_OR8mr 10489U, // LOCK_PREFIX 1082430U, // LOCK_SUB16mi 1082430U, // LOCK_SUB16mi8 1082430U, // LOCK_SUB16mr 1115198U, // LOCK_SUB32mi 1115198U, // LOCK_SUB32mi8 1115198U, // LOCK_SUB32mr 1131582U, // LOCK_SUB64mi32 1131582U, // LOCK_SUB64mi8 1131582U, // LOCK_SUB64mr 1147966U, // LOCK_SUB8mi 1147966U, // LOCK_SUB8mr 1086980U, // LOCK_XOR16mi 1086980U, // LOCK_XOR16mi8 1086980U, // LOCK_XOR16mr 1119748U, // LOCK_XOR32mi 1119748U, // LOCK_XOR32mi8 1119748U, // LOCK_XOR32mr 1136132U, // LOCK_XOR64mi32 1136132U, // LOCK_XOR64mi8 1136132U, // LOCK_XOR64mr 1152516U, // LOCK_XOR8mi 1152516U, // LOCK_XOR8mr 401785U, // LODSB 418469U, // LODSL 435022U, // LODSQ 451164U, // LODSW 151914U, // LOOP 151103U, // LOOPE 151080U, // LOOPNE 20132U, // LRETIL 21423U, // LRETIQ 20132U, // LRETIW 10436U, // LRETL 10742U, // LRETQ 10436U, // LRETW 470831187U, // LSL16rm 336613459U, // LSL16rr 303059027U, // LSL32rm 336613459U, // LSL32rr 370167891U, // LSL64rm 336613459U, // LSL64rr 672160662U, // LSS16rm 672160662U, // LSS32rm 672160662U, // LSS64rm 38451U, // LTRm 22067U, // LTRr 460158U, // LXADD16 476542U, // LXADD32 492926U, // LXADD64 509310U, // LXADD8 470834254U, // LZCNT16rm 336616526U, // LZCNT16rr 303062094U, // LZCNT32rm 336616526U, // LZCNT32rr 370170958U, // LZCNT64rm 336616526U, // LZCNT64rr 336616689U, // MASKMOVDQU 336616689U, // MASKMOVDQU64 202394143U, // MAXCPDrm 34621983U, // MAXCPDrr 202398246U, // MAXCPSrm 34626086U, // MAXCPSrr 235949177U, // MAXCSDrm 34622585U, // MAXCSDrr 269507566U, // MAXCSSrm 34626542U, // MAXCSSrr 202394143U, // MAXPDrm 34621983U, // MAXPDrr 202398246U, // MAXPSrm 34626086U, // MAXPSrr 235949177U, // MAXSDrm 235949177U, // MAXSDrm_Int 34622585U, // MAXSDrr 34622585U, // MAXSDrr_Int 269507566U, // MAXSSrm 269507566U, // MAXSSrm_Int 34626542U, // MAXSSrr 34626542U, // MAXSSrr_Int 10294U, // MFENCE 202393999U, // MINCPDrm 34621839U, // MINCPDrr 202398061U, // MINCPSrm 34625901U, // MINCPSrr 235949084U, // MINCSDrm 34622492U, // MINCSDrr 269507484U, // MINCSSrm 34626460U, // MINCSSrr 202393999U, // MINPDrm 34621839U, // MINPDrr 202398061U, // MINPSrm 34625901U, // MINPSrr 235949084U, // MINSDrm 235949084U, // MINSDrm_Int 34622492U, // MINSDrr 34622492U, // MINSDrr_Int 269507484U, // MINSSrm 269507484U, // MINSSrm_Int 34626460U, // MINSSrr 34626460U, // MINSSrr_Int 537939768U, // MMX_CVTPD2PIirm 336613176U, // MMX_CVTPD2PIirr 370165629U, // MMX_CVTPI2PDirm 336611197U, // MMX_CVTPI2PDirr 135288674U, // MMX_CVTPI2PSirm 34625378U, // MMX_CVTPI2PSirr 571494221U, // MMX_CVTPS2PIirm 336613197U, // MMX_CVTPS2PIirr 537939757U, // MMX_CVTTPD2PIirm 336613165U, // MMX_CVTTPD2PIirr 571494210U, // MMX_CVTTPS2PIirm 336613186U, // MMX_CVTTPS2PIirr 10969U, // MMX_EMMS 336614764U, // MMX_MASKMOVQ 336614764U, // MMX_MASKMOVQ64 1133854U, // MMX_MOVD64from64rm 336612638U, // MMX_MOVD64from64rr 336612638U, // MMX_MOVD64grr 1117470U, // MMX_MOVD64mr 303058206U, // MMX_MOVD64rm 336612638U, // MMX_MOVD64rr 370167070U, // MMX_MOVD64to64rm 336612638U, // MMX_MOVD64to64rr 336613898U, // MMX_MOVDQ2Qrr 336613898U, // MMX_MOVFR642Qrr 1135859U, // MMX_MOVNTQmr 336614007U, // MMX_MOVQ2DQrr 336614007U, // MMX_MOVQ2FR64rr 1135984U, // MMX_MOVQ64mr 370169200U, // MMX_MOVQ64rm 336614768U, // MMX_MOVQ64rr 336614768U, // MMX_MOVQ64rr_REV 370164621U, // MMX_PABSBrm64 336610189U, // MMX_PABSBrr64 370166695U, // MMX_PABSDrm64 336612263U, // MMX_PABSDrr64 370171692U, // MMX_PABSWrm64 336617260U, // MMX_PABSWrr64 135290355U, // MMX_PACKSSDWirm 34627059U, // MMX_PACKSSDWirr 135283827U, // MMX_PACKSSWBirm 34620531U, // MMX_PACKSSWBirr 135283838U, // MMX_PACKUSWBirm 34620542U, // MMX_PACKUSWBirr 135283369U, // MMX_PADDBirm 34620073U, // MMX_PADDBirr 135284110U, // MMX_PADDDirm 34620814U, // MMX_PADDDirr 135287458U, // MMX_PADDQirm 34624162U, // MMX_PADDQirr 135283614U, // MMX_PADDSBirm 34620318U, // MMX_PADDSBirr 135290717U, // MMX_PADDSWirm 34627421U, // MMX_PADDSWirr 135283656U, // MMX_PADDUSBirm 34620360U, // MMX_PADDUSBirr 135290790U, // MMX_PADDUSWirm 34627494U, // MMX_PADDUSWirr 135290330U, // MMX_PADDWirm 34627034U, // MMX_PADDWirr 2282771933U, // MMX_PALIGNR64irm 2182108637U, // MMX_PALIGNR64irr 135286957U, // MMX_PANDNirm 34623661U, // MMX_PANDNirr 135284366U, // MMX_PANDirm 34621070U, // MMX_PANDirr 135283423U, // MMX_PAVGBirm 34620127U, // MMX_PAVGBirr 135290422U, // MMX_PAVGWirm 34627126U, // MMX_PAVGWirr 135283508U, // MMX_PCMPEQBirm 34620212U, // MMX_PCMPEQBirr 135285296U, // MMX_PCMPEQDirm 34622000U, // MMX_PCMPEQDirr 135290564U, // MMX_PCMPEQWirm 34627268U, // MMX_PCMPEQWirr 135283697U, // MMX_PCMPGTBirm 34620401U, // MMX_PCMPGTBirr 135285919U, // MMX_PCMPGTDirm 34622623U, // MMX_PCMPGTDirr 135290816U, // MMX_PCMPGTWirm 34627520U, // MMX_PCMPGTWirr 2484100899U, // MMX_PEXTRWirri 135290707U, // MMX_PHADDSWrm64 34627411U, // MMX_PHADDSWrr64 135290321U, // MMX_PHADDWrm64 34627025U, // MMX_PHADDWrr64 135284101U, // MMX_PHADDrm64 34620805U, // MMX_PHADDrr64 135284042U, // MMX_PHSUBDrm64 34620746U, // MMX_PHSUBDrr64 135290688U, // MMX_PHSUBSWrm64 34627392U, // MMX_PHSUBSWrr64 135290267U, // MMX_PHSUBWrm64 34626971U, // MMX_PHSUBWrr64 2215665424U, // MMX_PINSRWirmi 2182110992U, // MMX_PINSRWirri 135290676U, // MMX_PMADDUBSWrm64 34627380U, // MMX_PMADDUBSWrr64 135286080U, // MMX_PMADDWDirm 34622784U, // MMX_PMADDWDirr 135290807U, // MMX_PMAXSWirm 34627511U, // MMX_PMAXSWirr 135283787U, // MMX_PMAXUBirm 34620491U, // MMX_PMAXUBirr 135290738U, // MMX_PMINSWirm 34627442U, // MMX_PMINSWirr 135283755U, // MMX_PMINUBirm 34620459U, // MMX_PMINUBirr 336610027U, // MMX_PMOVMSKBrr 135290761U, // MMX_PMULHRSWrm64 34627465U, // MMX_PMULHRSWrr64 135290865U, // MMX_PMULHUWirm 34627569U, // MMX_PMULHUWirr 135290451U, // MMX_PMULHWirm 34627155U, // MMX_PMULHWirr 135290493U, // MMX_PMULLWirm 34627197U, // MMX_PMULLWirr 135287687U, // MMX_PMULUDQirm 34624391U, // MMX_PMULUDQirr 135288295U, // MMX_PORirm 34624999U, // MMX_PORirr 135290194U, // MMX_PSADBWirm 34626898U, // MMX_PSADBWirr 135283414U, // MMX_PSHUFBrm64 34620118U, // MMX_PSHUFBrr64 2517655085U, // MMX_PSHUFWmi 2484100653U, // MMX_PSHUFWri 135283491U, // MMX_PSIGNBrm64 34620195U, // MMX_PSIGNBrr64 135284407U, // MMX_PSIGNDrm64 34621111U, // MMX_PSIGNDrr64 135290547U, // MMX_PSIGNWrm64 34627251U, // MMX_PSIGNWrr64 638600754U, // MMX_PSLLDri 135284274U, // MMX_PSLLDrm 34620978U, // MMX_PSLLDrr 638604223U, // MMX_PSLLQri 135287743U, // MMX_PSLLQrm 34624447U, // MMX_PSLLQrr 638606965U, // MMX_PSLLWri 135290485U, // MMX_PSLLWrm 34627189U, // MMX_PSLLWrr 638600493U, // MMX_PSRADri 135284013U, // MMX_PSRADrm 34620717U, // MMX_PSRADrr 638606655U, // MMX_PSRAWri 135290175U, // MMX_PSRAWrm 34626879U, // MMX_PSRAWrr 638600771U, // MMX_PSRLDri 135284291U, // MMX_PSRLDrm 34620995U, // MMX_PSRLDrr 638604240U, // MMX_PSRLQri 135287760U, // MMX_PSRLQrm 34624464U, // MMX_PSRLQrr 638606982U, // MMX_PSRLWri 135290502U, // MMX_PSRLWrm 34627206U, // MMX_PSRLWrr 135283361U, // MMX_PSUBBirm 34620065U, // MMX_PSUBBirr 135284051U, // MMX_PSUBDirm 34620755U, // MMX_PSUBDirr 135287363U, // MMX_PSUBQirm 34624067U, // MMX_PSUBQirr 135283605U, // MMX_PSUBSBirm 34620309U, // MMX_PSUBSBirr 135290698U, // MMX_PSUBSWirm 34627402U, // MMX_PSUBSWirr 135283646U, // MMX_PSUBUSBirm 34620350U, // MMX_PSUBUSBirr 135290780U, // MMX_PSUBUSWirm 34627484U, // MMX_PSUBUSWirr 135290276U, // MMX_PSUBWirm 34626980U, // MMX_PSUBWirr 135290222U, // MMX_PUNPCKHBWirm 34626926U, // MMX_PUNPCKHBWirr 135287476U, // MMX_PUNPCKHDQirm 34624180U, // MMX_PUNPCKHDQirr 135286090U, // MMX_PUNPCKHWDirm 34622794U, // MMX_PUNPCKHWDirr 135290244U, // MMX_PUNPCKLBWirm 34626948U, // MMX_PUNPCKLBWirr 135287488U, // MMX_PUNPCKLDQirm 34624192U, // MMX_PUNPCKLDQirr 135286102U, // MMX_PUNPCKLWDirm 34622806U, // MMX_PUNPCKLWDirr 135288323U, // MMX_PXORirm 34625027U, // MMX_PXORirr 0U, // MONITOR 10794U, // MONITORrrr 10550U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 533064U, // MOV16ao16 533064U, // MOV16ao32 533042U, // MOV16ao64 1088807U, // MOV16mi 1088807U, // MOV16mr 1088807U, // MOV16ms 9968935U, // MOV16o16a 9968935U, // MOV16o32a 9967187U, // MOV16o64a 336616743U, // MOV16ri 336616743U, // MOV16ri_alt 470834471U, // MOV16rm 336616743U, // MOV16rr 336616743U, // MOV16rr_REV 336616743U, // MOV16rs 470834471U, // MOV16sm 336616743U, // MOV16sr 549617U, // MOV32ao16 549617U, // MOV32ao32 549593U, // MOV32ao64 336616743U, // MOV32cr 336616743U, // MOV32dr 1121575U, // MOV32mi 1121575U, // MOV32mr 1088807U, // MOV32ms 11033895U, // MOV32o16a 11033895U, // MOV32o32a 11032147U, // MOV32o64a 0U, // MOV32r0 336616743U, // MOV32rc 336616743U, // MOV32rd 336616743U, // MOV32ri 0U, // MOV32ri64 336616743U, // MOV32ri_alt 303062311U, // MOV32rm 336616743U, // MOV32rr 336616743U, // MOV32rr_REV 336616743U, // MOV32rs 470834471U, // MOV32sm 336616743U, // MOV32sr 566140U, // MOV64ao32 566116U, // MOV64ao64 336616743U, // MOV64cr 336616743U, // MOV64dr 1137959U, // MOV64mi32 1137959U, // MOV64mr 1088807U, // MOV64ms 12098855U, // MOV64o32a 12097107U, // MOV64o64a 336616743U, // MOV64rc 336616743U, // MOV64rd 336614995U, // MOV64ri 336616743U, // MOV64ri32 370171175U, // MOV64rm 336616743U, // MOV64rr 336616743U, // MOV64rr_REV 336616743U, // MOV64rs 470834471U, // MOV64sm 336616743U, // MOV64sr 370169200U, // MOV64toPQIrm 336614768U, // MOV64toPQIrr 370169200U, // MOV64toSDrm 336614768U, // MOV64toSDrr 582104U, // MOV8ao16 582104U, // MOV8ao32 582082U, // MOV8ao64 1154343U, // MOV8mi 1154343U, // MOV8mr 1154343U, // MOV8mr_NOREX 13163815U, // MOV8o16a 13163815U, // MOV8o32a 13162067U, // MOV8o64a 336616743U, // MOV8ri 336616743U, // MOV8ri_alt 504388903U, // MOV8rm 504388903U, // MOV8rm_NOREX 336616743U, // MOV8rr 336616743U, // MOV8rr_NOREX 336616743U, // MOV8rr_REV 1640524U, // MOVAPDmr 537937996U, // MOVAPDrm 336611404U, // MOVAPDrr 336611404U, // MOVAPDrr_REV 1644582U, // MOVAPSmr 537942054U, // MOVAPSrm 336615462U, // MOVAPSrr 336615462U, // MOVAPSrr_REV 1084887U, // MOVBE16mr 470830551U, // MOVBE16rm 1117655U, // MOVBE32mr 303058391U, // MOVBE32rm 1134039U, // MOVBE64mr 370167255U, // MOVBE64rm 571494824U, // MOVDDUPrm 336613800U, // MOVDDUPrr 303058206U, // MOVDI2PDIrm 336612638U, // MOVDI2PDIrr 303058206U, // MOVDI2SSrm 336612638U, // MOVDI2SSrr 1311312U, // MOVDQAmr 437273168U, // MOVDQArm 336609872U, // MOVDQArr 336609872U, // MOVDQArr_REV 1318133U, // MOVDQUmr 437279989U, // MOVDQUrm 336616693U, // MOVDQUrr 336616693U, // MOVDQUrr_REV 34625823U, // MOVHLPSrr 1181999U, // MOVHPDmr 235948335U, // MOVHPDrm 1186059U, // MOVHPSmr 235952395U, // MOVHPSrm 34625793U, // MOVLHPSrr 1182049U, // MOVLPDmr 235948385U, // MOVLPDrm 1186119U, // MOVLPSmr 235952455U, // MOVLPSrm 336611640U, // MOVMSKPDrr 336615700U, // MOVMSKPSrr 437273157U, // MOVNTDQArm 1643328U, // MOVNTDQmr 1134566U, // MOVNTI_64mr 1118182U, // MOVNTImr 1640923U, // MOVNTPDmr 1645005U, // MOVNTPSmr 1182791U, // MOVNTSD 1170355U, // MOVNTSS 0U, // MOVPC32r 1117470U, // MOVPDI2DImr 336612638U, // MOVPDI2DIrr 1135984U, // MOVPQI2QImr 336614768U, // MOVPQI2QIrr 1135984U, // MOVPQIto64rm 336614768U, // MOVPQIto64rr 370169200U, // MOVQI2PQIrm 739541978U, // MOVSB 1182832U, // MOVSDmr 571493488U, // MOVSDrm 34622576U, // MOVSDrr 34622576U, // MOVSDrr_REV 1135984U, // MOVSDto64mr 336614768U, // MOVSDto64rr 537940402U, // MOVSHDUPrm 336613810U, // MOVSHDUPrr 773114992U, // MOVSL 537940413U, // MOVSLDUPrm 336613821U, // MOVSLDUPrr 806966466U, // MOVSQ 1117470U, // MOVSS2DImr 336612638U, // MOVSS2DIrr 1170406U, // MOVSSmr 605051878U, // MOVSSrm 34626534U, // MOVSSrr 34626534U, // MOVSSrr_REV 840245167U, // MOVSW 504389789U, // MOVSX16rm8 336617629U, // MOVSX16rr8 504389789U, // MOVSX32_NOREXrm8 336617629U, // MOVSX32_NOREXrr8 470835357U, // MOVSX32rm16 504389789U, // MOVSX32rm8 336617629U, // MOVSX32rr16 336617629U, // MOVSX32rr8 336612782U, // MOVSX64_NOREXrr32 470835357U, // MOVSX64rm16 303058350U, // MOVSX64rm32 303058350U, // MOVSX64rm32_alt 504389789U, // MOVSX64rm8 336617629U, // MOVSX64rr16 336612782U, // MOVSX64rr32 336617629U, // MOVSX64rr8 1640951U, // MOVUPDmr 537938423U, // MOVUPDrm 336611831U, // MOVUPDrr 336611831U, // MOVUPDrr_REV 1645054U, // MOVUPSmr 537942526U, // MOVUPSrm 336615934U, // MOVUPSrr 336615934U, // MOVUPSrr_REV 437278064U, // MOVZPQILo2PQIrm 336614768U, // MOVZPQILo2PQIrr 370169200U, // MOVZQI2PQIrm 336614768U, // MOVZQI2PQIrr 504389796U, // MOVZX16rm8 336617636U, // MOVZX16rr8 504389796U, // MOVZX32_NOREXrm8 336617636U, // MOVZX32_NOREXrr8 470835364U, // MOVZX32rm16 504389796U, // MOVZX32rm8 336617636U, // MOVZX32rr16 336617636U, // MOVZX32rr8 470835364U, // MOVZX64rm16_Q 504389796U, // MOVZX64rm8_Q 336617636U, // MOVZX64rr16_Q 336617636U, // MOVZX64rr8_Q 2551209297U, // MPSADBWrmi 2182110545U, // MPSADBWrri 36960U, // MUL16m 20576U, // MUL16r 69728U, // MUL32m 20576U, // MUL32r 86112U, // MUL64m 20576U, // MUL64r 102496U, // MUL8m 20576U, // MUL8r 202393945U, // MULPDrm 34621785U, // MULPDrr 202398015U, // MULPSrm 34625855U, // MULPSrr 235949075U, // MULSDrm 235949075U, // MULSDrm_Int 34622483U, // MULSDrr 34622483U, // MULSDrr_Int 269507476U, // MULSSrm 269507476U, // MULSSrm_Int 34626452U, // MULSSrr 34626452U, // MULSSrr_Int 2484101210U, // MULX32rm 2484101210U, // MULX32rr 2484101210U, // MULX64rm 2484101210U, // MULX64rr 118879U, // MUL_F32m 135263U, // MUL_F64m 36965U, // MUL_FI16m 69733U, // MUL_FI32m 20765U, // MUL_FPrST0 20575U, // MUL_FST0r 0U, // MUL_Fp32 0U, // MUL_Fp32m 0U, // MUL_Fp64 0U, // MUL_Fp64m 0U, // MUL_Fp64m32 0U, // MUL_Fp80 0U, // MUL_Fp80m32 0U, // MUL_Fp80m64 0U, // MUL_FpI16m32 0U, // MUL_FpI16m64 0U, // MUL_FpI16m80 0U, // MUL_FpI32m32 0U, // MUL_FpI32m64 0U, // MUL_FpI32m80 2117727U, // MUL_FrST0 11034U, // MWAITrr 36522U, // NEG16m 20138U, // NEG16r 69290U, // NEG32m 20138U, // NEG32r 85674U, // NEG64m 20138U, // NEG64r 102058U, // NEG8m 20138U, // NEG8r 10671U, // NOOP 37221U, // NOOP18_16m4 37221U, // NOOP18_16m5 37221U, // NOOP18_16m6 37221U, // NOOP18_16m7 20837U, // NOOP18_16r4 20837U, // NOOP18_16r5 20837U, // NOOP18_16r6 20837U, // NOOP18_16r7 69989U, // NOOP18_m4 69989U, // NOOP18_m5 69989U, // NOOP18_m6 69989U, // NOOP18_m7 20837U, // NOOP18_r4 20837U, // NOOP18_r5 20837U, // NOOP18_r6 20837U, // NOOP18_r7 873517413U, // NOOP19rr 69989U, // NOOPL 69989U, // NOOPL_19 69989U, // NOOPL_1a 69989U, // NOOPL_1b 69989U, // NOOPL_1c 69989U, // NOOPL_1d 69989U, // NOOPL_1e 37221U, // NOOPW 37221U, // NOOPW_19 37221U, // NOOPW_1a 37221U, // NOOPW_1b 37221U, // NOOPW_1c 37221U, // NOOPW_1d 37221U, // NOOPW_1e 40033U, // NOT16m 23649U, // NOT16r 72801U, // NOT32m 23649U, // NOT32r 89185U, // NOT64m 23649U, // NOT64r 105569U, // NOT8m 23649U, // NOT8r 25130U, // OR16i16 1086952U, // OR16mi 1086952U, // OR16mi8 1086952U, // OR16mr 34657768U, // OR16ri 34657768U, // OR16ri8 68212200U, // OR16rm 34657768U, // OR16rr 34625000U, // OR16rr_REV 25296U, // OR32i32 1119720U, // OR32mi 1119720U, // OR32mi8 1119720U, // OR32mr 1119720U, // OR32mrLocked 34657768U, // OR32ri 34657768U, // OR32ri8 101766632U, // OR32rm 34657768U, // OR32rr 34625000U, // OR32rr_REV 25435U, // OR64i32 1136104U, // OR64mi32 1136104U, // OR64mi8 1136104U, // OR64mr 34657768U, // OR64ri32 34657768U, // OR64ri8 135321064U, // OR64rm 34657768U, // OR64rr 34625000U, // OR64rr_REV 25018U, // OR8i8 1152488U, // OR8mi 1152488U, // OR8mi8 1152488U, // OR8mr 34657768U, // OR8ri 34657768U, // OR8ri8 168875496U, // OR8rm 34657768U, // OR8rr 34625000U, // OR8rr_REV 202394047U, // ORPDrm 34621887U, // ORPDrr 202398117U, // ORPSrm 34625957U, // ORPSrr 9460957U, // OUT16ir 11165U, // OUT16rr 10509533U, // OUT32ir 11219U, // OUT32rr 12606685U, // OUT8ir 10494U, // OUT8rr 402310U, // OUTSB 418705U, // OUTSL 451484U, // OUTSW 437273485U, // PABSBrm128 336610189U, // PABSBrr128 437275559U, // PABSDrm128 336612263U, // PABSDrr128 437280556U, // PABSWrm128 336617260U, // PABSWrr128 403725811U, // PACKSSDWrm 34627059U, // PACKSSDWrr 403719283U, // PACKSSWBrm 34620531U, // PACKSSWBrr 403725822U, // PACKUSDWrm 34627070U, // PACKUSDWrr 403719294U, // PACKUSWBrm 34620542U, // PACKUSWBrr 403718825U, // PADDBrm 34620073U, // PADDBrr 403719566U, // PADDDrm 34620814U, // PADDDrr 403722914U, // PADDQrm 34624162U, // PADDQrr 403719070U, // PADDSBrm 34620318U, // PADDSBrr 403726173U, // PADDSWrm 34627421U, // PADDSWrr 403719112U, // PADDUSBrm 34620360U, // PADDUSBrr 403726246U, // PADDUSWrm 34627494U, // PADDUSWrr 403725786U, // PADDWrm 34627034U, // PADDWrr 2551207389U, // PALIGNR128rm 2182108637U, // PALIGNR128rr 403722413U, // PANDNrm 34623661U, // PANDNrr 403719822U, // PANDrm 34621070U, // PANDrr 10365U, // PAUSE 403718879U, // PAVGBrm 34620127U, // PAVGBrr 135283665U, // PAVGUSBrm 34620369U, // PAVGUSBrr 403725878U, // PAVGWrm 34627126U, // PAVGWrr 403719252U, // PBLENDVBrm0 34620500U, // PBLENDVBrr0 2551209449U, // PBLENDWrmi 2182110697U, // PBLENDWrri 2551206683U, // PCLMULQDQrm 2182107931U, // PCLMULQDQrr 403718964U, // PCMPEQBrm 34620212U, // PCMPEQBrr 403720752U, // PCMPEQDrm 34622000U, // PCMPEQDrr 403723316U, // PCMPEQQrm 34624564U, // PCMPEQQrr 403726020U, // PCMPEQWrm 34627268U, // PCMPEQWrr 0U, // PCMPESTRIMEM 0U, // PCMPESTRIREG 2584760169U, // PCMPESTRIrm 2484096873U, // PCMPESTRIrr 0U, // PCMPESTRM128MEM 0U, // PCMPESTRM128REG 2584760469U, // PCMPESTRM128rm 2484097173U, // PCMPESTRM128rr 403719153U, // PCMPGTBrm 34620401U, // PCMPGTBrr 403721375U, // PCMPGTDrm 34622623U, // PCMPGTDrr 403723488U, // PCMPGTQrm 34624736U, // PCMPGTQrr 403726272U, // PCMPGTWrm 34627520U, // PCMPGTWrr 0U, // PCMPISTRIMEM 0U, // PCMPISTRIREG 2584760181U, // PCMPISTRIrm 2484096885U, // PCMPISTRIrr 0U, // PCMPISTRM128MEM 0U, // PCMPISTRM128REG 2584760481U, // PCMPISTRM128rm 2484097185U, // PCMPISTRM128rr 11040U, // PCOMMIT 2484097291U, // PDEP32rm 2484097291U, // PDEP32rr 2484097291U, // PDEP64rm 2484097291U, // PDEP64rr 2484100322U, // PEXT32rm 2484100322U, // PEXT32rr 2484100322U, // PEXT64rm 2484100322U, // PEXT64rr 2148631428U, // PEXTRBmr 2484093828U, // PEXTRBrr 2148600494U, // PEXTRDmr 2484095662U, // PEXTRDrr 2148619406U, // PEXTRQmr 2484098190U, // PEXTRQrr 2148572963U, // PEXTRWmr 2484100899U, // PEXTRWri 2484100899U, // PEXTRWrr_REV 370165247U, // PF2IDrm 336610815U, // PF2IDrr 370171483U, // PF2IWrm 336617051U, // PF2IWrr 135283848U, // PFACCrm 34620552U, // PFACCrr 135284080U, // PFADDrm 34620784U, // PFADDrr 135287718U, // PFCMPEQrm 34624422U, // PFCMPEQrr 135286259U, // PFCMPGErm 34622963U, // PFCMPGErr 135289917U, // PFCMPGTrm 34626621U, // PFCMPGTrr 135290951U, // PFMAXrm 34627655U, // PFMAXrr 135286972U, // PFMINrm 34623676U, // PFMINrr 135286878U, // PFMULrm 34623582U, // PFMULrr 135283855U, // PFNACCrm 34620559U, // PFNACCrr 135283863U, // PFPNACCrm 34620567U, // PFPNACCrr 135282735U, // PFRCPIT1rm 34619439U, // PFRCPIT1rr 135282831U, // PFRCPIT2rm 34619535U, // PFRCPIT2rr 370168061U, // PFRCPrm 336613629U, // PFRCPrr 135282745U, // PFRSQIT1rm 34619449U, // PFRSQIT1rr 370171020U, // PFRSQRTrm 336616588U, // PFRSQRTrr 135288251U, // PFSUBRrm 34624955U, // PFSUBRrr 135283772U, // PFSUBrm 34620476U, // PFSUBrr 403719557U, // PHADDDrm 34620805U, // PHADDDrr 403726163U, // PHADDSWrm128 34627411U, // PHADDSWrr128 403725777U, // PHADDWrm 34627025U, // PHADDWrr 437280790U, // PHMINPOSUWrm128 336617494U, // PHMINPOSUWrr128 403719498U, // PHSUBDrm 34620746U, // PHSUBDrr 403726144U, // PHSUBSWrm128 34627392U, // PHSUBSWrr128 403725723U, // PHSUBWrm 34626971U, // PHSUBWrr 370165231U, // PI2FDrm 336610799U, // PI2FDrr 370171430U, // PI2FWrm 336616998U, // PI2FWrr 2316321649U, // PINSRBrm 2182103921U, // PINSRBrr 2249214619U, // PINSRDrm 2182105755U, // PINSRDrr 2282771579U, // PINSRQrm 2182108283U, // PINSRQrr 2215665424U, // PINSRWrmi 2182110992U, // PINSRWrri 403726132U, // PMADDUBSWrm128 34627380U, // PMADDUBSWrr128 403721536U, // PMADDWDrm 34622784U, // PMADDWDrr 403719138U, // PMAXSBrm 34620386U, // PMAXSBrr 403721336U, // PMAXSDrm 34622584U, // PMAXSDrr 403726263U, // PMAXSWrm 34627511U, // PMAXSWrr 403719243U, // PMAXUBrm 34620491U, // PMAXUBrr 403721461U, // PMAXUDrm 34622709U, // PMAXUDrr 403726371U, // PMAXUWrm 34627619U, // PMAXUWrr 403719079U, // PMINSBrm 34620327U, // PMINSBrr 403721243U, // PMINSDrm 34622491U, // PMINSDrr 403726194U, // PMINSWrm 34627442U, // PMINSWrr 403719211U, // PMINUBrm 34620459U, // PMINUBrr 403721443U, // PMINUDrm 34622691U, // PMINUDrr 403726340U, // PMINUWrm 34627588U, // PMINUWrr 336610027U, // PMOVMSKBrr 303056219U, // PMOVSXBDrm 336610651U, // PMOVSXBDrr 470831691U, // PMOVSXBQrm 336613963U, // PMOVSXBQrr 370171308U, // PMOVSXBWrm 336616876U, // PMOVSXBWrr 370168721U, // PMOVSXDQrm 336614289U, // PMOVSXDQrr 370167193U, // PMOVSXWDrm 336612761U, // PMOVSXWDrr 303060371U, // PMOVSXWQrm 336614803U, // PMOVSXWQrr 303056230U, // PMOVZXBDrm 336610662U, // PMOVZXBDrr 470831702U, // PMOVZXBQrm 336613974U, // PMOVZXBQrr 370171319U, // PMOVZXBWrm 336616887U, // PMOVZXBWrr 370168732U, // PMOVZXDQrm 336614300U, // PMOVZXDQrr 370167204U, // PMOVZXWDrm 336612772U, // PMOVZXWDrr 303060382U, // PMOVZXWQrm 336614814U, // PMOVZXWQrr 403722974U, // PMULDQrm 34624222U, // PMULDQrr 403726217U, // PMULHRSWrm128 34627465U, // PMULHRSWrr128 135290609U, // PMULHRWrm 34627313U, // PMULHRWrr 403726321U, // PMULHUWrm 34627569U, // PMULHUWrr 403725907U, // PMULHWrm 34627155U, // PMULHWrr 403719738U, // PMULLDrm 34620986U, // PMULLDrr 403725949U, // PMULLWrm 34627197U, // PMULLWrr 403723143U, // PMULUDQrm 34624391U, // PMULUDQrr 20848U, // POP16r 37232U, // POP16rmm 20848U, // POP16rmr 20848U, // POP32r 70000U, // POP32rmm 20848U, // POP32rmr 20848U, // POP64r 86384U, // POP64rmm 20848U, // POP64rmr 11119U, // POPA16 10512U, // POPA32 470834246U, // POPCNT16rm 336616518U, // POPCNT16rr 303062086U, // POPCNT32rm 336616518U, // POPCNT32rr 370170950U, // POPCNT64rm 336616518U, // POPCNT64rr 10853U, // POPDS16 10853U, // POPDS32 10868U, // POPES16 10868U, // POPES32 10431U, // POPF16 10218U, // POPF32 10736U, // POPF64 10883U, // POPFS16 10883U, // POPFS32 10883U, // POPFS64 10898U, // POPGS16 10898U, // POPGS32 10898U, // POPGS64 10995U, // POPSS16 10995U, // POPSS32 403723751U, // PORrm 34624999U, // PORrr 102097U, // PREFETCH 98910U, // PREFETCHNTA 98305U, // PREFETCHT0 98339U, // PREFETCHT1 98435U, // PREFETCHT2 106045U, // PREFETCHW 403725650U, // PSADBWrm 34626898U, // PSADBWrr 403718870U, // PSHUFBrm 34620118U, // PSHUFBrr 2584757751U, // PSHUFDmi 2484094455U, // PSHUFDri 2584763977U, // PSHUFHWmi 2484100681U, // PSHUFHWri 2584764003U, // PSHUFLWmi 2484100707U, // PSHUFLWri 403718947U, // PSIGNBrm 34620195U, // PSIGNBrr 403719863U, // PSIGNDrm 34621111U, // PSIGNDrr 403726003U, // PSIGNWrm 34627251U, // PSIGNWrr 638603980U, // PSLLDQri 638600754U, // PSLLDri 403719730U, // PSLLDrm 34620978U, // PSLLDrr 638604223U, // PSLLQri 403723199U, // PSLLQrm 34624447U, // PSLLQrr 638606965U, // PSLLWri 403725941U, // PSLLWrm 34627189U, // PSLLWrr 638600493U, // PSRADri 403719469U, // PSRADrm 34620717U, // PSRADrr 638606655U, // PSRAWri 403725631U, // PSRAWrm 34626879U, // PSRAWrr 638603989U, // PSRLDQri 638600771U, // PSRLDri 403719747U, // PSRLDrm 34620995U, // PSRLDrr 638604240U, // PSRLQri 403723216U, // PSRLQrm 34624464U, // PSRLQrr 638606982U, // PSRLWri 403725958U, // PSRLWrm 34627206U, // PSRLWrr 403718817U, // PSUBBrm 34620065U, // PSUBBrr 403719507U, // PSUBDrm 34620755U, // PSUBDrr 403722819U, // PSUBQrm 34624067U, // PSUBQrr 403719061U, // PSUBSBrm 34620309U, // PSUBSBrr 403726154U, // PSUBSWrm 34627402U, // PSUBSWrr 403719102U, // PSUBUSBrm 34620350U, // PSUBUSBrr 403726236U, // PSUBUSWrm 34627484U, // PSUBUSWrr 403725732U, // PSUBWrm 34626980U, // PSUBWrr 370165844U, // PSWAPDrm 336611412U, // PSWAPDrr 537943216U, // PTESTrm 336616624U, // PTESTrr 403725678U, // PUNPCKHBWrm 34626926U, // PUNPCKHBWrr 403722932U, // PUNPCKHDQrm 34624180U, // PUNPCKHDQrr 403723009U, // PUNPCKHQDQrm 34624257U, // PUNPCKHQDQrr 403721546U, // PUNPCKHWDrm 34622794U, // PUNPCKHWDrr 403725700U, // PUNPCKLBWrm 34626948U, // PUNPCKLBWrr 403722944U, // PUNPCKLDQrm 34624192U, // PUNPCKLDQrr 403723022U, // PUNPCKLQDQrm 34624270U, // PUNPCKLQDQrr 403721558U, // PUNPCKLWDrm 34622806U, // PUNPCKLWDrr 20236U, // PUSH16i8 20236U, // PUSH16r 36620U, // PUSH16rmm 20236U, // PUSH16rmr 20236U, // PUSH32i8 20236U, // PUSH32r 69388U, // PUSH32rmm 20236U, // PUSH32rmr 20236U, // PUSH64i16 20236U, // PUSH64i32 20236U, // PUSH64i8 20236U, // PUSH64r 85772U, // PUSH64rmm 20236U, // PUSH64rmr 11112U, // PUSHA16 10505U, // PUSHA32 10837U, // PUSHCS16 10837U, // PUSHCS32 10845U, // PUSHDS16 10845U, // PUSHDS32 10860U, // PUSHES16 10860U, // PUSHES32 10425U, // PUSHF16 10211U, // PUSHF32 10729U, // PUSHF64 10875U, // PUSHFS16 10875U, // PUSHFS32 10875U, // PUSHFS64 10890U, // PUSHGS16 10890U, // PUSHGS32 10890U, // PUSHGS64 10987U, // PUSHSS16 10987U, // PUSHSS32 20236U, // PUSHi16 20236U, // PUSHi32 403723779U, // PXORrm 34625027U, // PXORrr 13668362U, // RCL16m1 14716938U, // RCL16mCL 1085450U, // RCL16mi 13651978U, // RCL16r1 14700554U, // RCL16rCL 34623498U, // RCL16ri 13701130U, // RCL32m1 14749706U, // RCL32mCL 1118218U, // RCL32mi 13651978U, // RCL32r1 14700554U, // RCL32rCL 34623498U, // RCL32ri 13717514U, // RCL64m1 14766090U, // RCL64mCL 1134602U, // RCL64mi 13651978U, // RCL64r1 14700554U, // RCL64rCL 34623498U, // RCL64ri 13733898U, // RCL8m1 14782474U, // RCL8mCL 1150986U, // RCL8mi 13651978U, // RCL8r1 14700554U, // RCL8rCL 34623498U, // RCL8ri 537942389U, // RCPPSm 537942389U, // RCPPSm_Int 336615797U, // RCPPSr 336615797U, // RCPPSr_Int 605051812U, // RCPSSm 269507492U, // RCPSSm_Int 336616356U, // RCPSSr 34626468U, // RCPSSr_Int 13669835U, // RCR16m1 14718411U, // RCR16mCL 1086923U, // RCR16mi 13653451U, // RCR16r1 14702027U, // RCR16rCL 34624971U, // RCR16ri 13702603U, // RCR32m1 14751179U, // RCR32mCL 1119691U, // RCR32mi 13653451U, // RCR32r1 14702027U, // RCR32rCL 34624971U, // RCR32ri 13718987U, // RCR64m1 14767563U, // RCR64mCL 1136075U, // RCR64mi 13653451U, // RCR64r1 14702027U, // RCR64rCL 34624971U, // RCR64ri 13735371U, // RCR8m1 14783947U, // RCR8mCL 1152459U, // RCR8mi 13653451U, // RCR8r1 14702027U, // RCR8rCL 34624971U, // RCR8ri 20038U, // RDFSBASE 20038U, // RDFSBASE64 20058U, // RDGSBASE 20058U, // RDGSBASE64 10802U, // RDMSR 10188U, // RDPMC 18068U, // RDRAND16r 18068U, // RDRAND32r 18068U, // RDRAND64r 17895U, // RDSEED16r 17895U, // RDSEED32r 17895U, // RDSEED64r 10201U, // RDTSC 10640U, // RDTSCP 9649U, // RELEASE_ADD32mi 9649U, // RELEASE_ADD64mi32 9649U, // RELEASE_ADD8mi 9649U, // RELEASE_AND32mi 9649U, // RELEASE_AND64mi32 9649U, // RELEASE_AND8mi 9672U, // RELEASE_DEC16m 9672U, // RELEASE_DEC32m 9672U, // RELEASE_DEC64m 9672U, // RELEASE_DEC8m 9672U, // RELEASE_INC16m 9672U, // RELEASE_INC32m 9672U, // RELEASE_INC64m 9672U, // RELEASE_INC8m 9275U, // RELEASE_MOV16mi 9715U, // RELEASE_MOV16mr 9275U, // RELEASE_MOV32mi 9715U, // RELEASE_MOV32mr 9275U, // RELEASE_MOV64mi32 9715U, // RELEASE_MOV64mr 9275U, // RELEASE_MOV8mi 9715U, // RELEASE_MOV8mr 9649U, // RELEASE_OR32mi 9649U, // RELEASE_OR64mi32 9649U, // RELEASE_OR8mi 9649U, // RELEASE_XOR32mi 9649U, // RELEASE_XOR64mi32 9649U, // RELEASE_XOR8mi 10329U, // REPNE_PREFIX 10132U, // REP_MOVSB_32 10132U, // REP_MOVSB_64 10249U, // REP_MOVSD_32 10249U, // REP_MOVSD_64 10758U, // REP_MOVSQ_64 11139U, // REP_MOVSW_32 11139U, // REP_MOVSW_64 10647U, // REP_PREFIX 10122U, // REP_STOSB_32 10122U, // REP_STOSB_64 10239U, // REP_STOSD_32 10239U, // REP_STOSD_64 10748U, // REP_STOSQ_64 11129U, // REP_STOSW_32 11129U, // REP_STOSW_64 23608U, // RETIL 23608U, // RETIQ 23608U, // RETIW 11023U, // RETL 11023U, // RETQ 11023U, // RETW 9958U, // REX64_PREFIX 13668401U, // ROL16m1 14716977U, // ROL16mCL 1085489U, // ROL16mi 13652017U, // ROL16r1 14700593U, // ROL16rCL 34623537U, // ROL16ri 13701169U, // ROL32m1 14749745U, // ROL32mCL 1118257U, // ROL32mi 13652017U, // ROL32r1 14700593U, // ROL32rCL 34623537U, // ROL32ri 13717553U, // ROL64m1 14766129U, // ROL64mCL 1134641U, // ROL64mi 13652017U, // ROL64r1 14700593U, // ROL64rCL 34623537U, // ROL64ri 13733937U, // ROL8m1 14782513U, // ROL8mCL 1151025U, // ROL8mi 13652017U, // ROL8r1 14700593U, // ROL8rCL 34623537U, // ROL8ri 13669868U, // ROR16m1 14718444U, // ROR16mCL 1086956U, // ROR16mi 13653484U, // ROR16r1 14702060U, // ROR16rCL 34625004U, // ROR16ri 13702636U, // ROR32m1 14751212U, // ROR32mCL 1119724U, // ROR32mi 13653484U, // ROR32r1 14702060U, // ROR32rCL 34625004U, // ROR32ri 13719020U, // ROR64m1 14767596U, // ROR64mCL 1136108U, // ROR64mi 13653484U, // ROR64r1 14702060U, // ROR64rCL 34625004U, // ROR64ri 13735404U, // ROR8m1 14783980U, // ROR8mCL 1152492U, // ROR8mi 13653484U, // ROR8r1 14702060U, // ROR8rCL 34625004U, // ROR8ri 2450546827U, // RORX32mi 2484101259U, // RORX32ri 2517655691U, // RORX64mi 2484101259U, // RORX64ri 2685421803U, // ROUNDPDm 2484095211U, // ROUNDPDr 2685425853U, // ROUNDPSm 2484099261U, // ROUNDPSr 2383432681U, // ROUNDSDm 2182106089U, // ROUNDSDr 2182106089U, // ROUNDSDr_Int 2416991082U, // ROUNDSSm 2182110058U, // ROUNDSSr 2182110058U, // ROUNDSSr_Int 10582U, // RSM 537942498U, // RSQRTPSm 537942498U, // RSQRTPSm_Int 336615906U, // RSQRTPSr 336615906U, // RSQRTPSr_Int 605051837U, // RSQRTSSm 269507517U, // RSQRTSSm_Int 336616381U, // RSQRTSSr 34626493U, // RSQRTSSr_Int 10420U, // SAHF 13668357U, // SAL16m1 14716933U, // SAL16mCL 1085445U, // SAL16mi 13651973U, // SAL16r1 14700549U, // SAL16rCL 34623493U, // SAL16ri 13701125U, // SAL32m1 14749701U, // SAL32mCL 1118213U, // SAL32mi 13651973U, // SAL32r1 14700549U, // SAL32rCL 34623493U, // SAL32ri 13717509U, // SAL64m1 14766085U, // SAL64mCL 1134597U, // SAL64mi 13651973U, // SAL64r1 14700549U, // SAL64rCL 34623493U, // SAL64ri 13733893U, // SAL8m1 14782469U, // SAL8mCL 1150981U, // SAL8mi 13651973U, // SAL8r1 14700549U, // SAL8rCL 34623493U, // SAL8ri 10175U, // SALC 13669814U, // SAR16m1 14718390U, // SAR16mCL 1086902U, // SAR16mi 13653430U, // SAR16r1 14702006U, // SAR16rCL 34624950U, // SAR16ri 13702582U, // SAR32m1 14751158U, // SAR32mCL 1119670U, // SAR32mi 13653430U, // SAR32r1 14702006U, // SAR32rCL 34624950U, // SAR32ri 13718966U, // SAR64m1 14767542U, // SAR64mCL 1136054U, // SAR64mi 13653430U, // SAR64r1 14702006U, // SAR64rCL 34624950U, // SAR64ri 13735350U, // SAR8m1 14783926U, // SAR8mCL 1152438U, // SAR8mi 13653430U, // SAR8r1 14702006U, // SAR8rCL 34624950U, // SAR8ri 2450546815U, // SARX32rm 2484101247U, // SARX32rr 2517655679U, // SARX64rm 2484101247U, // SARX64rr 25057U, // SBB16i16 1082011U, // SBB16mi 1082011U, // SBB16mi8 1082011U, // SBB16mr 34652827U, // SBB16ri 34652827U, // SBB16ri8 68207259U, // SBB16rm 34652827U, // SBB16rr 34620059U, // SBB16rr_REV 25191U, // SBB32i32 1114779U, // SBB32mi 1114779U, // SBB32mi8 1114779U, // SBB32mr 34652827U, // SBB32ri 34652827U, // SBB32ri8 101761691U, // SBB32rm 34652827U, // SBB32rr 34620059U, // SBB32rr_REV 25339U, // SBB64i32 1131163U, // SBB64mi32 1131163U, // SBB64mi8 1131163U, // SBB64mr 34652827U, // SBB64ri32 34652827U, // SBB64ri8 135316123U, // SBB64rm 34652827U, // SBB64rr 34620059U, // SBB64rr_REV 24933U, // SBB8i8 1147547U, // SBB8mi 1147547U, // SBB8mi8 1147547U, // SBB8mr 34652827U, // SBB8ri 34652827U, // SBB8ri8 168870555U, // SBB8rm 34652827U, // SBB8rr 34620059U, // SBB8rr_REV 303470U, // SCASB 320153U, // SCASL 615234U, // SCASQ 336465U, // SCASW 10917U, // SEG_ALLOCA_32 10917U, // SEG_ALLOCA_64 10385U, // SEH_EndPrologue 10371U, // SEH_Epilogue 25600U, // SEH_PushFrame 25645U, // SEH_PushReg 336618527U, // SEH_SaveReg 336618441U, // SEH_SaveXMM 336618512U, // SEH_SetFrame 25583U, // SEH_StackAlloc 101819U, // SETAEm 19899U, // SETAEr 98904U, // SETAm 16984U, // SETAr 101839U, // SETBEm 19919U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 99306U, // SETBm 17386U, // SETBr 101998U, // SETEm 20078U, // SETEr 101884U, // SETGEm 19964U, // SETGEr 102084U, // SETGm 20164U, // SETGr 101908U, // SETLEm 19988U, // SETLEr 102488U, // SETLm 20568U, // SETLr 101936U, // SETNEm 20016U, // SETNEr 102611U, // SETNOm 20691U, // SETNOr 102742U, // SETNPm 20822U, // SETNPr 104070U, // SETNSm 22150U, // SETNSr 102626U, // SETOm 20706U, // SETOr 102789U, // SETPm 20869U, // SETPr 105475U, // SETSm 23555U, // SETSr 10301U, // SFENCE 285722U, // SGDT16m 285722U, // SGDT32m 285722U, // SGDT64m 403718157U, // SHA1MSG1rm 34619405U, // SHA1MSG1rr 403718240U, // SHA1MSG2rm 34619488U, // SHA1MSG2rr 403721853U, // SHA1NEXTErm 34623101U, // SHA1NEXTErr 2551202059U, // SHA1RNDS4rmi 2182103307U, // SHA1RNDS4rri 403718167U, // SHA256MSG1rm 34619415U, // SHA256MSG1rr 403718250U, // SHA256MSG2rm 34619498U, // SHA256MSG2rr 403718262U, // SHA256RNDS2rm 34619510U, // SHA256RNDS2rr 13668367U, // SHL16m1 14716943U, // SHL16mCL 1085455U, // SHL16mi 13651983U, // SHL16r1 14700559U, // SHL16rCL 34623503U, // SHL16ri 13701135U, // SHL32m1 14749711U, // SHL32mCL 1118223U, // SHL32mi 13651983U, // SHL32r1 14700559U, // SHL32rCL 34623503U, // SHL32ri 13717519U, // SHL64m1 14766095U, // SHL64mCL 1134607U, // SHL64mi 13651983U, // SHL64r1 14700559U, // SHL64rCL 34623503U, // SHL64ri 13733903U, // SHL8m1 14782479U, // SHL8mCL 1150991U, // SHL8mi 13651983U, // SHL8r1 14700559U, // SHL8rCL 34623503U, // SHL8ri 1082917U, // SHLD16mrCL 2148566565U, // SHLD16mri8 34620965U, // SHLD16rrCL 2182104613U, // SHLD16rri8 1115685U, // SHLD32mrCL 2148599333U, // SHLD32mri8 34620965U, // SHLD32rrCL 2182104613U, // SHLD32rri8 1132069U, // SHLD64mrCL 2148615717U, // SHLD64mri8 34620965U, // SHLD64rrCL 2182104613U, // SHLD64rri8 2450546772U, // SHLX32rm 2484101204U, // SHLX32rr 2517655636U, // SHLX64rm 2484101204U, // SHLX64rr 13669847U, // SHR16m1 14718423U, // SHR16mCL 1086935U, // SHR16mi 13653463U, // SHR16r1 14702039U, // SHR16rCL 34624983U, // SHR16ri 13702615U, // SHR32m1 14751191U, // SHR32mCL 1119703U, // SHR32mi 13653463U, // SHR32r1 14702039U, // SHR32rCL 34624983U, // SHR32ri 13718999U, // SHR64m1 14767575U, // SHR64mCL 1136087U, // SHR64mi 13653463U, // SHR64r1 14702039U, // SHR64rCL 34624983U, // SHR64ri 13735383U, // SHR8m1 14783959U, // SHR8mCL 1152471U, // SHR8mi 13653463U, // SHR8r1 14702039U, // SHR8rCL 34624983U, // SHR8ri 1084016U, // SHRD16mrCL 2148567664U, // SHRD16mri8 34622064U, // SHRD16rrCL 2182105712U, // SHRD16rri8 1116784U, // SHRD32mrCL 2148600432U, // SHRD32mri8 34622064U, // SHRD32rrCL 2182105712U, // SHRD32rri8 1133168U, // SHRD64mrCL 2148616816U, // SHRD64mri8 34622064U, // SHRD64rrCL 2182105712U, // SHRD64rri8 2450546821U, // SHRX32rm 2484101253U, // SHRX32rr 2517655685U, // SHRX64rm 2484101253U, // SHRX64rr 2349877531U, // SHUFPDrmi 2182105371U, // SHUFPDrri 2349881581U, // SHUFPSrmi 2182109421U, // SHUFPSrri 285734U, // SIDT16m 285734U, // SIDT32m 285734U, // SIDT64m 10599U, // SIN_F 0U, // SIN_Fp32 0U, // SIN_Fp64 0U, // SIN_Fp80 11208U, // SKINIT 39986U, // SLDT16m 23602U, // SLDT16r 23602U, // SLDT32r 39986U, // SLDT64m 23602U, // SLDT64r 40811U, // SMSW16m 24427U, // SMSW16r 24427U, // SMSW32r 24427U, // SMSW64r 537938405U, // SQRTPDm 336611813U, // SQRTPDr 537942499U, // SQRTPSm 336615907U, // SQRTPSr 571493457U, // SQRTSDm 235949137U, // SQRTSDm_Int 336612433U, // SQRTSDr 34622545U, // SQRTSDr_Int 605051838U, // SQRTSSm 269507518U, // SQRTSSm_Int 336616382U, // SQRTSSr 34626494U, // SQRTSSr_Int 11075U, // SQRT_F 0U, // SQRT_Fp32 0U, // SQRT_Fp64 0U, // SQRT_Fp80 10153U, // STAC 10207U, // STC 10265U, // STD 10455U, // STGI 10470U, // STI 71199U, // STMXCSR 12878767U, // STOSB 10800171U, // STOSL 12145831U, // STOSQ 9772922U, // STOSW 22072U, // STR16r 22072U, // STR32r 22072U, // STR64r 38456U, // STRm 122039U, // ST_F32m 138423U, // ST_F64m 24888U, // ST_FCOMPST0r 24888U, // ST_FCOMPST0r_alt 24875U, // ST_FCOMST0r 119186U, // ST_FP32m 135570U, // ST_FP64m 381330U, // ST_FP80m 2117086U, // ST_FPNCEST0r 2118034U, // ST_FPST0r 2118034U, // ST_FPST0r_alt 20882U, // ST_FPrr 24862U, // ST_FXCHST0r 24862U, // ST_FXCHST0r_alt 0U, // ST_Fp32m 0U, // ST_Fp64m 0U, // ST_Fp64m32 0U, // ST_Fp80m32 0U, // ST_Fp80m64 0U, // ST_FpP32m 0U, // ST_FpP64m 0U, // ST_FpP64m32 0U, // ST_FpP80m 0U, // ST_FpP80m32 0U, // ST_FpP80m64 23735U, // ST_Frr 25066U, // SUB16i16 1082430U, // SUB16mi 1082430U, // SUB16mi8 1082430U, // SUB16mr 34653246U, // SUB16ri 34653246U, // SUB16ri8 68207678U, // SUB16rm 34653246U, // SUB16rr 34620478U, // SUB16rr_REV 25201U, // SUB32i32 1115198U, // SUB32mi 1115198U, // SUB32mi8 1115198U, // SUB32mr 34653246U, // SUB32ri 34653246U, // SUB32ri8 101762110U, // SUB32rm 34653246U, // SUB32rr 34620478U, // SUB32rr_REV 25349U, // SUB64i32 1131582U, // SUB64mi32 1131582U, // SUB64mi8 1131582U, // SUB64mr 34653246U, // SUB64ri32 34653246U, // SUB64ri8 135316542U, // SUB64rm 34653246U, // SUB64rr 34620478U, // SUB64rr_REV 24964U, // SUB8i8 1147966U, // SUB8mi 1147966U, // SUB8mi8 1147966U, // SUB8mr 34653246U, // SUB8ri 34653246U, // SUB8ri8 168870974U, // SUB8rm 34653246U, // SUB8rr 34620478U, // SUB8rr_REV 202393698U, // SUBPDrm 34621538U, // SUBPDrr 202397748U, // SUBPSrm 34625588U, // SUBPSrr 120252U, // SUBR_F32m 136636U, // SUBR_F64m 38339U, // SUBR_FI16m 71107U, // SUBR_FI32m 20853U, // SUBR_FPrST0 21948U, // SUBR_FST0r 0U, // SUBR_Fp32m 0U, // SUBR_Fp64m 0U, // SUBR_Fp64m32 0U, // SUBR_Fp80m32 0U, // SUBR_Fp80m64 0U, // SUBR_FpI16m32 0U, // SUBR_FpI16m64 0U, // SUBR_FpI16m80 0U, // SUBR_FpI32m32 0U, // SUBR_FpI32m64 0U, // SUBR_FpI32m80 2119100U, // SUBR_FrST0 235948977U, // SUBSDrm 235948977U, // SUBSDrm_Int 34622385U, // SUBSDrr 34622385U, // SUBSDrr_Int 269507378U, // SUBSSrm 269507378U, // SUBSSrm_Int 34626354U, // SUBSSrr 34626354U, // SUBSSrr_Int 115773U, // SUB_F32m 132157U, // SUB_F64m 33859U, // SUB_FI16m 66627U, // SUB_FI32m 20726U, // SUB_FPrST0 17469U, // SUB_FST0r 0U, // SUB_Fp32 0U, // SUB_Fp32m 0U, // SUB_Fp64 0U, // SUB_Fp64m 0U, // SUB_Fp64m32 0U, // SUB_Fp80 0U, // SUB_Fp80m32 0U, // SUB_Fp80m64 0U, // SUB_FpI16m32 0U, // SUB_FpI16m64 0U, // SUB_FpI16m80 0U, // SUB_FpI32m32 0U, // SUB_FpI32m64 0U, // SUB_FpI32m80 2114621U, // SUB_FrST0 10905U, // SWAPGS 10533U, // SYSCALL 10785U, // SYSENTER 11055U, // SYSEXIT 11055U, // SYSEXIT64 11027U, // SYSRET 11027U, // SYSRET64 303056068U, // T1MSKC32rm 336610500U, // T1MSKC32rr 370164932U, // T1MSKC64rm 336610500U, // T1MSKC64rr 151855U, // TAILJMPd 151855U, // TAILJMPd64 151849U, // TAILJMPd64_REX 69935U, // TAILJMPm 86319U, // TAILJMPm64 86313U, // TAILJMPm64_REX 0U, // TAILJMPr 20783U, // TAILJMPr64 20777U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 25150U, // TEST16i16 1088689U, // TEST16mi 1088689U, // TEST16mi_alt 336616625U, // TEST16ri 336616625U, // TEST16ri_alt 629937U, // TEST16rm 336616625U, // TEST16rr 25318U, // TEST32i32 1121457U, // TEST32mi 1121457U, // TEST32mi_alt 336616625U, // TEST32ri 336616625U, // TEST32ri_alt 874110129U, // TEST32rm 336616625U, // TEST32rr 25457U, // TEST64i32 1137841U, // TEST64mi32 1137841U, // TEST64mi32_alt 336616625U, // TEST64ri32 336616625U, // TEST64ri32_alt 874126513U, // TEST64rm 336616625U, // TEST64rr 25038U, // TEST8i8 1154225U, // TEST8mi 1154225U, // TEST8mi_alt 336616625U, // TEST8ri 0U, // TEST8ri_NOREX 336616625U, // TEST8ri_alt 679089U, // TEST8rm 336616625U, // TEST8rr 9810U, // TLSCall_32 9914U, // TLSCall_64 9823U, // TLS_addr32 9927U, // TLS_addr64 9836U, // TLS_base_addr32 9940U, // TLS_base_addr64 9854U, // TRAP 11087U, // TST_F 0U, // TST_Fp32 0U, // TST_Fp64 0U, // TST_Fp80 470834261U, // TZCNT16rm 336616533U, // TZCNT16rr 303062101U, // TZCNT32rm 336616533U, // TZCNT32rr 370170965U, // TZCNT64rm 336616533U, // TZCNT64rr 303058942U, // TZMSK32rm 336613374U, // TZMSK32rr 370167806U, // TZMSK64rm 336613374U, // TZMSK64rr 571493376U, // UCOMISDrm 336612352U, // UCOMISDrr 605051777U, // UCOMISSrm 336616321U, // UCOMISSrr 20319U, // UCOM_FIPr 20261U, // UCOM_FIr 10701U, // UCOM_FPPr 20809U, // UCOM_FPr 0U, // UCOM_FpIr32 0U, // UCOM_FpIr64 0U, // UCOM_FpIr80 0U, // UCOM_Fpr32 0U, // UCOM_Fpr64 0U, // UCOM_Fpr80 20613U, // UCOM_Fr 10087U, // UD2B 202393892U, // UNPCKHPDrm 34621732U, // UNPCKHPDrr 202397942U, // UNPCKHPSrm 34625782U, // UNPCKHPSrr 202393934U, // UNPCKLPDrm 34621774U, // UNPCKLPDrr 202398004U, // UNPCKLPSrm 34625844U, // UNPCKLPSrr 2651874215U, // VAARG_64 2484095173U, // VADDPDYrm 2484095173U, // VADDPDYrr 2498775237U, // VADDPDZ128rm 2498775237U, // VADDPDZ128rmb 2197833925U, // VADDPDZ128rmbk 352340165U, // VADDPDZ128rmbkz 2197833925U, // VADDPDZ128rmk 352340165U, // VADDPDZ128rmkz 2498775237U, // VADDPDZ128rr 2197833925U, // VADDPDZ128rrk 352340165U, // VADDPDZ128rrkz 2498775237U, // VADDPDZ256rm 2498775237U, // VADDPDZ256rmb 2197833925U, // VADDPDZ256rmbk 352340165U, // VADDPDZ256rmbkz 2197833925U, // VADDPDZ256rmk 352340165U, // VADDPDZ256rmkz 2498775237U, // VADDPDZ256rr 2197833925U, // VADDPDZ256rrk 352340165U, // VADDPDZ256rrkz 2498775237U, // VADDPDZrb 2197833925U, // VADDPDZrbk 352340165U, // VADDPDZrbkz 2498775237U, // VADDPDZrm 2498775237U, // VADDPDZrmb 2197833925U, // VADDPDZrmbk 352340165U, // VADDPDZrmbkz 2197833925U, // VADDPDZrmk 352340165U, // VADDPDZrmkz 2498775237U, // VADDPDZrr 2197833925U, // VADDPDZrrk 352340165U, // VADDPDZrrkz 2484095173U, // VADDPDrm 2484095173U, // VADDPDrr 2484099223U, // VADDPSYrm 2484099223U, // VADDPSYrr 2498779287U, // VADDPSZ128rm 2498779287U, // VADDPSZ128rmb 2197837975U, // VADDPSZ128rmbk 352344215U, // VADDPSZ128rmbkz 2197837975U, // VADDPSZ128rmk 352344215U, // VADDPSZ128rmkz 2498779287U, // VADDPSZ128rr 2197837975U, // VADDPSZ128rrk 352344215U, // VADDPSZ128rrkz 2498779287U, // VADDPSZ256rm 2498779287U, // VADDPSZ256rmb 2197837975U, // VADDPSZ256rmbk 352344215U, // VADDPSZ256rmbkz 2197837975U, // VADDPSZ256rmk 352344215U, // VADDPSZ256rmkz 2498779287U, // VADDPSZ256rr 2197837975U, // VADDPSZ256rrk 352344215U, // VADDPSZ256rrkz 2498779287U, // VADDPSZrb 2197837975U, // VADDPSZrbk 352344215U, // VADDPSZrbkz 2498779287U, // VADDPSZrm 2498779287U, // VADDPSZrmb 2197837975U, // VADDPSZrmbk 352344215U, // VADDPSZrmbkz 2197837975U, // VADDPSZrmk 352344215U, // VADDPSZrmkz 2498779287U, // VADDPSZrr 2197837975U, // VADDPSZrrk 352344215U, // VADDPSZrrkz 2484099223U, // VADDPSrm 2484099223U, // VADDPSrr 2484095968U, // VADDSDZrm 2498776032U, // VADDSDZrm_Int 2197834720U, // VADDSDZrm_Intk 352340960U, // VADDSDZrm_Intkz 2484095968U, // VADDSDZrr 2498776032U, // VADDSDZrr_Int 2197834720U, // VADDSDZrr_Intk 352340960U, // VADDSDZrr_Intkz 2498776032U, // VADDSDZrrb 2197834720U, // VADDSDZrrbk 352340960U, // VADDSDZrrbkz 2484095968U, // VADDSDrm 2484095968U, // VADDSDrm_Int 2484095968U, // VADDSDrr 2484095968U, // VADDSDrr_Int 2484099937U, // VADDSSZrm 2498780001U, // VADDSSZrm_Int 2197838689U, // VADDSSZrm_Intk 352344929U, // VADDSSZrm_Intkz 2484099937U, // VADDSSZrr 2498780001U, // VADDSSZrr_Int 2197838689U, // VADDSSZrr_Intk 352344929U, // VADDSSZrr_Intkz 2498780001U, // VADDSSZrrb 2197838689U, // VADDSSZrrbk 352344929U, // VADDSSZrrbkz 2484099937U, // VADDSSrm 2484099937U, // VADDSSrm_Int 2484099937U, // VADDSSrr 2484099937U, // VADDSSrr_Int 2484095081U, // VADDSUBPDYrm 2484095081U, // VADDSUBPDYrr 2484095081U, // VADDSUBPDrm 2484095081U, // VADDSUBPDrr 2484099131U, // VADDSUBPSYrm 2484099131U, // VADDSUBPSYrr 2484099131U, // VADDSUBPSrm 2484099131U, // VADDSUBPSrr 2484100245U, // VAESDECLASTrm 2484100245U, // VAESDECLASTrr 2484094117U, // VAESDECrm 2484094117U, // VAESDECrr 2484100258U, // VAESENCLASTrm 2484100258U, // VAESENCLASTrr 2484094165U, // VAESENCrm 2484094165U, // VAESENCrr 437273804U, // VAESIMCrm 336610508U, // VAESIMCrr 2584763586U, // VAESKEYGENASSIST128rm 2484100290U, // VAESKEYGENASSIST128rr 2484094637U, // VALIGNDrmi 2498774701U, // VALIGNDrri 2197833389U, // VALIGNDrrik 352339629U, // VALIGNDrrikz 2484098082U, // VALIGNQrmi 2498778146U, // VALIGNQrri 2197836834U, // VALIGNQrrik 352343074U, // VALIGNQrrikz 2484095365U, // VANDNPDYrm 2484095365U, // VANDNPDYrr 2484095365U, // VANDNPDrm 2484095365U, // VANDNPDrr 2484099427U, // VANDNPSYrm 2484099427U, // VANDNPSYrr 2484099427U, // VANDNPSrm 2484099427U, // VANDNPSrr 2484095192U, // VANDPDYrm 2484095192U, // VANDPDYrr 2484095192U, // VANDPDrm 2484095192U, // VANDPDrr 2484099242U, // VANDPSYrm 2484099242U, // VANDPSYrr 2484099242U, // VANDPSrm 2484099242U, // VANDPSrr 2484102103U, // VASTART_SAVE_XMM_REGS 219171185U, // VBLENDMPDZ128rm 2484095345U, // VBLENDMPDZ128rmb 2499823985U, // VBLENDMPDZ128rmbk 2499823985U, // VBLENDMPDZ128rmk 352340337U, // VBLENDMPDZ128rmkz 2484095345U, // VBLENDMPDZ128rr 2499823985U, // VBLENDMPDZ128rrk 352340337U, // VBLENDMPDZ128rrkz 923814257U, // VBLENDMPDZ256rm 2484095345U, // VBLENDMPDZ256rmb 2499823985U, // VBLENDMPDZ256rmbk 2499823985U, // VBLENDMPDZ256rmk 352340337U, // VBLENDMPDZ256rmkz 2484095345U, // VBLENDMPDZ256rr 2499823985U, // VBLENDMPDZ256rrk 352340337U, // VBLENDMPDZ256rrkz 957368689U, // VBLENDMPDZrm 2484095345U, // VBLENDMPDZrmb 2499823985U, // VBLENDMPDZrmbk 2499823985U, // VBLENDMPDZrmk 352340337U, // VBLENDMPDZrmkz 2484095345U, // VBLENDMPDZrr 2499823985U, // VBLENDMPDZrrk 352340337U, // VBLENDMPDZrrkz 219175247U, // VBLENDMPSZ128rm 2484099407U, // VBLENDMPSZ128rmb 2499828047U, // VBLENDMPSZ128rmbk 2499828047U, // VBLENDMPSZ128rmk 352344399U, // VBLENDMPSZ128rmkz 2484099407U, // VBLENDMPSZ128rr 2499828047U, // VBLENDMPSZ128rrk 352344399U, // VBLENDMPSZ128rrkz 923818319U, // VBLENDMPSZ256rm 2484099407U, // VBLENDMPSZ256rmb 2499828047U, // VBLENDMPSZ256rmbk 2499828047U, // VBLENDMPSZ256rmk 352344399U, // VBLENDMPSZ256rmkz 2484099407U, // VBLENDMPSZ256rr 2499828047U, // VBLENDMPSZ256rrk 352344399U, // VBLENDMPSZ256rrkz 957372751U, // VBLENDMPSZrm 2484099407U, // VBLENDMPSZrmb 2499828047U, // VBLENDMPSZrmbk 2499828047U, // VBLENDMPSZrmk 352344399U, // VBLENDMPSZrmkz 2484099407U, // VBLENDMPSZrr 2499828047U, // VBLENDMPSZrrk 352344399U, // VBLENDMPSZrrkz 2484095200U, // VBLENDPDYrmi 2484095200U, // VBLENDPDYrri 2484095200U, // VBLENDPDrmi 2484095200U, // VBLENDPDrri 2484099250U, // VBLENDPSYrmi 2484099250U, // VBLENDPSYrri 2484099250U, // VBLENDPSrmi 2484099250U, // VBLENDPSrri 2484095487U, // VBLENDVPDYrm 2484095487U, // VBLENDVPDYrr 2484095487U, // VBLENDVPDrm 2484095487U, // VBLENDVPDrr 2484099590U, // VBLENDVPSYrm 2484099590U, // VBLENDVPSYrr 2484099590U, // VBLENDVPSrm 2484099590U, // VBLENDVPSrr 537936350U, // VBROADCASTF128 352338256U, // VBROADCASTI32X4krm 437272912U, // VBROADCASTI32X4rm 352338331U, // VBROADCASTI64X4krm 974143899U, // VBROADCASTI64X4rm 571493465U, // VBROADCASTSDYrm 336612441U, // VBROADCASTSDYrr 586173529U, // VBROADCASTSDZ256m 2197834841U, // VBROADCASTSDZ256mk 352341081U, // VBROADCASTSDZ256mkz 351292505U, // VBROADCASTSDZ256r 2197834841U, // VBROADCASTSDZ256rk 352341081U, // VBROADCASTSDZ256rkz 586173529U, // VBROADCASTSDZm 2197834841U, // VBROADCASTSDZmk 352341081U, // VBROADCASTSDZmkz 351292505U, // VBROADCASTSDZr 2197834841U, // VBROADCASTSDZrk 352341081U, // VBROADCASTSDZrkz 605051855U, // VBROADCASTSSYrm 336616399U, // VBROADCASTSSYrr 619731919U, // VBROADCASTSSZ128m 2197838799U, // VBROADCASTSSZ128mk 352345039U, // VBROADCASTSSZ128mkz 351296463U, // VBROADCASTSSZ128r 2197838799U, // VBROADCASTSSZ128rk 352345039U, // VBROADCASTSSZ128rkz 619731919U, // VBROADCASTSSZ256m 2197838799U, // VBROADCASTSSZ256mk 352345039U, // VBROADCASTSSZ256mkz 351296463U, // VBROADCASTSSZ256r 2197838799U, // VBROADCASTSSZ256rk 352345039U, // VBROADCASTSSZ256rkz 619731919U, // VBROADCASTSSZm 2197838799U, // VBROADCASTSSZmk 352345039U, // VBROADCASTSSZmkz 351296463U, // VBROADCASTSSZr 2197838799U, // VBROADCASTSSZrk 352345039U, // VBROADCASTSSZrkz 605051855U, // VBROADCASTSSrm 336616399U, // VBROADCASTSSrr 2486528417U, // VCMPPDYrmi 2484095389U, // VCMPPDYrmi_alt 2486544801U, // VCMPPDYrri 2484095389U, // VCMPPDYrri_alt 2486528417U, // VCMPPDZrmi 2484095389U, // VCMPPDZrmi_alt 2486544801U, // VCMPPDZrri 2484095389U, // VCMPPDZrri_alt 2486544801U, // VCMPPDZrrib 2484095389U, // VCMPPDZrrib_alt 2486528417U, // VCMPPDrmi 2484095389U, // VCMPPDrmi_alt 2486544801U, // VCMPPDrri 2484095389U, // VCMPPDrri_alt 2487576993U, // VCMPPSYrmi 2484099459U, // VCMPPSYrmi_alt 2487593377U, // VCMPPSYrri 2484099459U, // VCMPPSYrri_alt 2487576993U, // VCMPPSZrmi 2484099459U, // VCMPPSZrmi_alt 2487593377U, // VCMPPSZrri 2484099459U, // VCMPPSZrri_alt 2487593377U, // VCMPPSZrrib 2484099459U, // VCMPPSZrrib_alt 2487576993U, // VCMPPSrmi 2484099459U, // VCMPPSrmi_alt 2487593377U, // VCMPPSrri 2484099459U, // VCMPPSrri_alt 2488625569U, // VCMPSDZrm 2484096050U, // VCMPSDZrmi_alt 2488641953U, // VCMPSDZrr 2484096050U, // VCMPSDZrri_alt 2488625569U, // VCMPSDrm 2484096050U, // VCMPSDrm_alt 2488641953U, // VCMPSDrr 2484096050U, // VCMPSDrr_alt 2489674145U, // VCMPSSZrm 2484100011U, // VCMPSSZrmi_alt 2489690529U, // VCMPSSZrr 2484100011U, // VCMPSSZrri_alt 2489674145U, // VCMPSSrm 2484100011U, // VCMPSSrm_alt 2489690529U, // VCMPSSrr 2484100011U, // VCMPSSrr_alt 537938953U, // VCOMISDZrm 336612361U, // VCOMISDZrr 537938953U, // VCOMISDrm 336612361U, // VCOMISDrr 537942922U, // VCOMISSZrm 336616330U, // VCOMISSZrr 537942922U, // VCOMISSrm 336616330U, // VCOMISSrr 2164853197U, // VCOMPRESSPDZ128mrk 2197834189U, // VCOMPRESSPDZ128rrk 352340429U, // VCOMPRESSPDZ128rrkz 2164951501U, // VCOMPRESSPDZ256mrk 2197834189U, // VCOMPRESSPDZ256rrk 352340429U, // VCOMPRESSPDZ256rrkz 2164967885U, // VCOMPRESSPDZmrk 2197834189U, // VCOMPRESSPDZrrk 352340429U, // VCOMPRESSPDZrrkz 2164857267U, // VCOMPRESSPSZ128mrk 2197838259U, // VCOMPRESSPSZ128rrk 352344499U, // VCOMPRESSPSZ128rrkz 2164955571U, // VCOMPRESSPSZ256mrk 2197838259U, // VCOMPRESSPSZ256rrk 352344499U, // VCOMPRESSPSZ256rrkz 2164971955U, // VCOMPRESSPSZmrk 2197838259U, // VCOMPRESSPSZrrk 352344499U, // VCOMPRESSPSZrrkz 437274524U, // VCVTDQ2PDYrm 336611228U, // VCVTDQ2PDYrr 974145436U, // VCVTDQ2PDZrm 336611228U, // VCVTDQ2PDZrr 370165660U, // VCVTDQ2PDrm 336611228U, // VCVTDQ2PDrr 974149505U, // VCVTDQ2PSYrm 336615297U, // VCVTDQ2PSYrr 1007703937U, // VCVTDQ2PSZrm 336615297U, // VCVTDQ2PSZrr 2484098945U, // VCVTDQ2PSZrrb 437278593U, // VCVTDQ2PSrm 336615297U, // VCVTDQ2PSrr 537944179U, // VCVTPD2DQXrm 1041257068U, // VCVTPD2DQYrm 336613996U, // VCVTPD2DQYrr 1074811500U, // VCVTPD2DQZrm 336613996U, // VCVTPD2DQZrr 2484097644U, // VCVTPD2DQZrrb 336613996U, // VCVTPD2DQrr 537944209U, // VCVTPD2PSXrm 1041258305U, // VCVTPD2PSYrm 336615233U, // VCVTPD2PSYrr 1074812737U, // VCVTPD2PSZrm 336615233U, // VCVTPD2PSZrr 2484098881U, // VCVTPD2PSZrrb 336615233U, // VCVTPD2PSrr 1074811734U, // VCVTPD2UDQZrm 336614230U, // VCVTPD2UDQZrr 2484097878U, // VCVTPD2UDQZrrb 537941836U, // VCVTPH2PSYrm 336615244U, // VCVTPH2PSYrr 1041258316U, // VCVTPH2PSZrm 336615244U, // VCVTPH2PSZrr 571496268U, // VCVTPH2PSrm 336615244U, // VCVTPH2PSrr 1041257100U, // VCVTPS2DQYrm 336614028U, // VCVTPS2DQYrr 1074811532U, // VCVTPS2DQZrm 336614028U, // VCVTPS2DQZrr 2484097676U, // VCVTPS2DQZrrb 537940620U, // VCVTPS2DQrm 336614028U, // VCVTPS2DQrr 537937843U, // VCVTPS2PDYrm 336611251U, // VCVTPS2PDYrr 1041254323U, // VCVTPS2PDZrm 336611251U, // VCVTPS2PDZrr 571492275U, // VCVTPS2PDrm 336611251U, // VCVTPS2PDrr 2149125857U, // VCVTPS2PHYmr 2484096737U, // VCVTPS2PHYrr 2149224161U, // VCVTPS2PHZmr 2484096737U, // VCVTPS2PHZrr 2148667105U, // VCVTPS2PHmr 2484096737U, // VCVTPS2PHrr 1074811759U, // VCVTPS2UDQZrm 336614255U, // VCVTPS2UDQZrr 2484097903U, // VCVTPS2UDQZrrb 571494284U, // VCVTSD2SI64Zrm 336613260U, // VCVTSD2SI64Zrr 571494284U, // VCVTSD2SI64rm 336613260U, // VCVTSD2SI64rr 571494284U, // VCVTSD2SIZrm 336613260U, // VCVTSD2SIZrr 571494284U, // VCVTSD2SIrm 336613260U, // VCVTSD2SIrr 2484099755U, // VCVTSD2SSZrm 2484099755U, // VCVTSD2SSZrr 2484099755U, // VCVTSD2SSrm 2484099755U, // VCVTSD2SSrr 571494337U, // VCVTSD2USI64Zrm 336613313U, // VCVTSD2USI64Zrr 571494337U, // VCVTSD2USIZrm 336613313U, // VCVTSD2USIZrr 2484095778U, // VCVTSI2SD64rm 2484095778U, // VCVTSI2SD64rr 2484095778U, // VCVTSI2SDZrm 2484095778U, // VCVTSI2SDZrr 2484095778U, // VCVTSI2SDrm 2484095778U, // VCVTSI2SDrr 2484099766U, // VCVTSI2SS64rm 2484099766U, // VCVTSI2SS64rr 2484099766U, // VCVTSI2SSZrm 2484099766U, // VCVTSI2SSZrr 2484099766U, // VCVTSI2SSrm 2484099766U, // VCVTSI2SSrr 2484095778U, // VCVTSI642SDZrm 2484095778U, // VCVTSI642SDZrr 2484099766U, // VCVTSI642SSZrm 2484099766U, // VCVTSI642SSZrr 2484095801U, // VCVTSS2SDZrm 2484095801U, // VCVTSS2SDZrr 2484095801U, // VCVTSS2SDrm 2484095801U, // VCVTSS2SDrr 605048739U, // VCVTSS2SI64Zrm 336613283U, // VCVTSS2SI64Zrr 605048739U, // VCVTSS2SI64rm 336613283U, // VCVTSS2SI64rr 605048739U, // VCVTSS2SIZrm 336613283U, // VCVTSS2SIZrr 605048739U, // VCVTSS2SIrm 336613283U, // VCVTSS2SIrr 605048794U, // VCVTSS2USI64Zrm 336613338U, // VCVTSS2USI64Zrr 605048794U, // VCVTSS2USIZrm 336613338U, // VCVTSS2USIZrr 537944166U, // VCVTTPD2DQXrm 1041257056U, // VCVTTPD2DQYrm 336613984U, // VCVTTPD2DQYrr 1074811488U, // VCVTTPD2DQZrm 336613984U, // VCVTTPD2DQZrr 336613984U, // VCVTTPD2DQrr 1074811721U, // VCVTTPD2UDQZrm 336614217U, // VCVTTPD2UDQZrr 1041257088U, // VCVTTPS2DQYrm 336614016U, // VCVTTPS2DQYrr 1074811520U, // VCVTTPS2DQZrm 336614016U, // VCVTTPS2DQZrr 537940608U, // VCVTTPS2DQrm 336614016U, // VCVTTPS2DQrr 1074811746U, // VCVTTPS2UDQZrm 336614242U, // VCVTTPS2UDQZrr 571494272U, // VCVTTSD2SI64Zrm 336613248U, // VCVTTSD2SI64Zrr 571494272U, // VCVTTSD2SI64rm 336613248U, // VCVTTSD2SI64rr 571494272U, // VCVTTSD2SIZrm 336613248U, // VCVTTSD2SIZrr 571494272U, // VCVTTSD2SIrm 336613248U, // VCVTTSD2SIrr 571494324U, // VCVTTSD2USI64Zrm 336613300U, // VCVTTSD2USI64Zrr 571494324U, // VCVTTSD2USIZrm 336613300U, // VCVTTSD2USIZrr 605048727U, // VCVTTSS2SI64Zrm 336613271U, // VCVTTSS2SI64Zrr 605048727U, // VCVTTSS2SI64rm 336613271U, // VCVTTSS2SI64rr 605048727U, // VCVTTSS2SIZrm 336613271U, // VCVTTSS2SIZrr 605048727U, // VCVTTSS2SIrm 336613271U, // VCVTTSS2SIrr 605048781U, // VCVTTSS2USI64Zrm 336613325U, // VCVTTSS2USI64Zrr 605048781U, // VCVTTSS2USIZrm 336613325U, // VCVTTSS2USIZrr 1041254311U, // VCVTUDQ2PDZrm 336611239U, // VCVTUDQ2PDZrr 1074812812U, // VCVTUDQ2PSZrm 336615308U, // VCVTUDQ2PSZrr 2484098956U, // VCVTUDQ2PSZrrb 2484095789U, // VCVTUSI2SDZrm 2484095789U, // VCVTUSI2SDZrr 2484099777U, // VCVTUSI2SSZrm 2484099777U, // VCVTUSI2SSZrr 2484095789U, // VCVTUSI642SDZrm 2484095789U, // VCVTUSI642SDZrr 2484099777U, // VCVTUSI642SSZrm 2484099777U, // VCVTUSI642SSZrr 2484095498U, // VDIVPDYrm 2484095498U, // VDIVPDYrr 2498775562U, // VDIVPDZ128rm 2498775562U, // VDIVPDZ128rmb 2197834250U, // VDIVPDZ128rmbk 352340490U, // VDIVPDZ128rmbkz 2197834250U, // VDIVPDZ128rmk 352340490U, // VDIVPDZ128rmkz 2498775562U, // VDIVPDZ128rr 2197834250U, // VDIVPDZ128rrk 352340490U, // VDIVPDZ128rrkz 2498775562U, // VDIVPDZ256rm 2498775562U, // VDIVPDZ256rmb 2197834250U, // VDIVPDZ256rmbk 352340490U, // VDIVPDZ256rmbkz 2197834250U, // VDIVPDZ256rmk 352340490U, // VDIVPDZ256rmkz 2498775562U, // VDIVPDZ256rr 2197834250U, // VDIVPDZ256rrk 352340490U, // VDIVPDZ256rrkz 2498775562U, // VDIVPDZrb 2197834250U, // VDIVPDZrbk 352340490U, // VDIVPDZrbkz 2498775562U, // VDIVPDZrm 2498775562U, // VDIVPDZrmb 2197834250U, // VDIVPDZrmbk 352340490U, // VDIVPDZrmbkz 2197834250U, // VDIVPDZrmk 352340490U, // VDIVPDZrmkz 2498775562U, // VDIVPDZrr 2197834250U, // VDIVPDZrrk 352340490U, // VDIVPDZrrkz 2484095498U, // VDIVPDrm 2484095498U, // VDIVPDrr 2484099601U, // VDIVPSYrm 2484099601U, // VDIVPSYrr 2498779665U, // VDIVPSZ128rm 2498779665U, // VDIVPSZ128rmb 2197838353U, // VDIVPSZ128rmbk 352344593U, // VDIVPSZ128rmbkz 2197838353U, // VDIVPSZ128rmk 352344593U, // VDIVPSZ128rmkz 2498779665U, // VDIVPSZ128rr 2197838353U, // VDIVPSZ128rrk 352344593U, // VDIVPSZ128rrkz 2498779665U, // VDIVPSZ256rm 2498779665U, // VDIVPSZ256rmb 2197838353U, // VDIVPSZ256rmbk 352344593U, // VDIVPSZ256rmbkz 2197838353U, // VDIVPSZ256rmk 352344593U, // VDIVPSZ256rmkz 2498779665U, // VDIVPSZ256rr 2197838353U, // VDIVPSZ256rrk 352344593U, // VDIVPSZ256rrkz 2498779665U, // VDIVPSZrb 2197838353U, // VDIVPSZrbk 352344593U, // VDIVPSZrbkz 2498779665U, // VDIVPSZrm 2498779665U, // VDIVPSZrmb 2197838353U, // VDIVPSZrmbk 352344593U, // VDIVPSZrmbkz 2197838353U, // VDIVPSZrmk 352344593U, // VDIVPSZrmkz 2498779665U, // VDIVPSZrr 2197838353U, // VDIVPSZrrk 352344593U, // VDIVPSZrrkz 2484099601U, // VDIVPSrm 2484099601U, // VDIVPSrr 2484096103U, // VDIVSDZrm 2498776167U, // VDIVSDZrm_Int 2197834855U, // VDIVSDZrm_Intk 352341095U, // VDIVSDZrm_Intkz 2484096103U, // VDIVSDZrr 2498776167U, // VDIVSDZrr_Int 2197834855U, // VDIVSDZrr_Intk 352341095U, // VDIVSDZrr_Intkz 2498776167U, // VDIVSDZrrb 2197834855U, // VDIVSDZrrbk 352341095U, // VDIVSDZrrbkz 2484096103U, // VDIVSDrm 2484096103U, // VDIVSDrm_Int 2484096103U, // VDIVSDrr 2484096103U, // VDIVSDrr_Int 2484100061U, // VDIVSSZrm 2498780125U, // VDIVSSZrm_Int 2197838813U, // VDIVSSZrm_Intk 352345053U, // VDIVSSZrm_Intkz 2484100061U, // VDIVSSZrr 2498780125U, // VDIVSSZrr_Int 2197838813U, // VDIVSSZrr_Intk 352345053U, // VDIVSSZrr_Intkz 2498780125U, // VDIVSSZrrb 2197838813U, // VDIVSSZrrbk 352345053U, // VDIVSSZrrbkz 2484100061U, // VDIVSSrm 2484100061U, // VDIVSSrm_Int 2484100061U, // VDIVSSrr 2484100061U, // VDIVSSrr_Int 2484095382U, // VDPPDrmi 2484095382U, // VDPPDrri 2484099452U, // VDPPSYrmi 2484099452U, // VDPPSYrri 2484099452U, // VDPPSrmi 2484099452U, // VDPPSrri 38409U, // VERRm 22025U, // VERRr 40683U, // VERWm 24299U, // VERWr 1089488787U, // VEXP2PDm 1089488787U, // VEXP2PDmb 2197833619U, // VEXP2PDmbk 352339859U, // VEXP2PDmbkz 2197833619U, // VEXP2PDmk 352339859U, // VEXP2PDmkz 351291283U, // VEXP2PDr 1126188947U, // VEXP2PDrb 2197833619U, // VEXP2PDrbk 352339859U, // VEXP2PDrbkz 2197833619U, // VEXP2PDrk 352339859U, // VEXP2PDrkz 1089492856U, // VEXP2PSm 1089492856U, // VEXP2PSmb 2197837688U, // VEXP2PSmbk 352343928U, // VEXP2PSmbkz 2197837688U, // VEXP2PSmk 352343928U, // VEXP2PSmkz 351295352U, // VEXP2PSr 1126193016U, // VEXP2PSrb 2197837688U, // VEXP2PSrbk 352343928U, // VEXP2PSrbkz 2197837688U, // VEXP2PSrk 352343928U, // VEXP2PSrkz 2197833933U, // VEXPANDPDZ128rmk 352340173U, // VEXPANDPDZ128rmkz 2197833933U, // VEXPANDPDZ128rrk 352340173U, // VEXPANDPDZ128rrkz 2197833933U, // VEXPANDPDZ256rmk 352340173U, // VEXPANDPDZ256rmkz 2197833933U, // VEXPANDPDZ256rrk 352340173U, // VEXPANDPDZ256rrkz 2197833933U, // VEXPANDPDZrmk 352340173U, // VEXPANDPDZrmkz 2197833933U, // VEXPANDPDZrrk 352340173U, // VEXPANDPDZrrkz 2197837983U, // VEXPANDPSZ128rmk 352344223U, // VEXPANDPSZ128rmkz 2197837983U, // VEXPANDPSZ128rrk 352344223U, // VEXPANDPSZ128rrkz 2197837983U, // VEXPANDPSZ256rmk 352344223U, // VEXPANDPSZ256rmkz 2197837983U, // VEXPANDPSZ256rrk 352344223U, // VEXPANDPSZ256rrkz 2197837983U, // VEXPANDPSZrmk 352344223U, // VEXPANDPSZrmkz 2197837983U, // VEXPANDPSZrrk 352344223U, // VEXPANDPSZrrkz 2149122499U, // VEXTRACTF128mr 2484093379U, // VEXTRACTF128rr 2149122326U, // VEXTRACTF32x4rm 2498773270U, // VEXTRACTF32x4rr 2197831958U, // VEXTRACTF32x4rrk 352338198U, // VEXTRACTF32x4rrkz 2149220705U, // VEXTRACTF64x4rm 2498773345U, // VEXTRACTF64x4rr 2197832033U, // VEXTRACTF64x4rrk 352338273U, // VEXTRACTF64x4rrkz 2148794874U, // VEXTRACTI128mr 2484093434U, // VEXTRACTI128rr 2148794675U, // VEXTRACTI32x4rm 2498773299U, // VEXTRACTI32x4rr 2197831987U, // VEXTRACTI32x4rrk 352338227U, // VEXTRACTI32x4rrkz 2149253502U, // VEXTRACTI64x4rm 2498773374U, // VEXTRACTI64x4rr 2197832062U, // VEXTRACTI64x4rrk 352338302U, // VEXTRACTI64x4rrkz 2148653504U, // VEXTRACTPSmr 2484099520U, // VEXTRACTPSrr 2148653504U, // VEXTRACTPSzmr 2484099520U, // VEXTRACTPSzrr 2182104919U, // VFMADD132PDZ128m 2182104919U, // VFMADD132PDZ128mb 2182104919U, // VFMADD132PDZ256m 2182104919U, // VFMADD132PDZ256mb 2182104919U, // VFMADD132PDZm 2182104919U, // VFMADD132PDZmb 2182108966U, // VFMADD132PSZ128m 2182108966U, // VFMADD132PSZ128mb 2182108966U, // VFMADD132PSZ256m 2182108966U, // VFMADD132PSZ256mb 2182108966U, // VFMADD132PSZm 2182108966U, // VFMADD132PSZmb 2484095152U, // VFMADDPD4mr 2484095152U, // VFMADDPD4mrY 2484095152U, // VFMADDPD4rm 2484095152U, // VFMADDPD4rmY 2484095152U, // VFMADDPD4rr 2484095152U, // VFMADDPD4rrY 2484095152U, // VFMADDPD4rrY_REV 2484095152U, // VFMADDPD4rr_REV 2196785156U, // VFMADDPDZ128v213rm 2196785156U, // VFMADDPDZ128v213rmb 2197833732U, // VFMADDPDZ128v213rmbk 50350084U, // VFMADDPDZ128v213rmbkz 2197833732U, // VFMADDPDZ128v213rmk 50350084U, // VFMADDPDZ128v213rmkz 2196785156U, // VFMADDPDZ128v213rr 2197833732U, // VFMADDPDZ128v213rrk 50350084U, // VFMADDPDZ128v213rrkz 2196784897U, // VFMADDPDZ128v231rm 2196784897U, // VFMADDPDZ128v231rmb 2197833473U, // VFMADDPDZ128v231rmbk 50349825U, // VFMADDPDZ128v231rmbkz 2197833473U, // VFMADDPDZ128v231rmk 50349825U, // VFMADDPDZ128v231rmkz 2196784897U, // VFMADDPDZ128v231rr 2197833473U, // VFMADDPDZ128v231rrk 50349825U, // VFMADDPDZ128v231rrkz 2196785156U, // VFMADDPDZ256v213rm 2196785156U, // VFMADDPDZ256v213rmb 2197833732U, // VFMADDPDZ256v213rmbk 50350084U, // VFMADDPDZ256v213rmbkz 2197833732U, // VFMADDPDZ256v213rmk 50350084U, // VFMADDPDZ256v213rmkz 2196785156U, // VFMADDPDZ256v213rr 2197833732U, // VFMADDPDZ256v213rrk 50350084U, // VFMADDPDZ256v213rrkz 2196784897U, // VFMADDPDZ256v231rm 2196784897U, // VFMADDPDZ256v231rmb 2197833473U, // VFMADDPDZ256v231rmbk 50349825U, // VFMADDPDZ256v231rmbkz 2197833473U, // VFMADDPDZ256v231rmk 50349825U, // VFMADDPDZ256v231rmkz 2196784897U, // VFMADDPDZ256v231rr 2197833473U, // VFMADDPDZ256v231rrk 50349825U, // VFMADDPDZ256v231rrkz 2196785156U, // VFMADDPDZv213rm 2196785156U, // VFMADDPDZv213rmb 2197833732U, // VFMADDPDZv213rmbk 50350084U, // VFMADDPDZv213rmbkz 2197833732U, // VFMADDPDZv213rmk 50350084U, // VFMADDPDZv213rmkz 2196785156U, // VFMADDPDZv213rr 2196785156U, // VFMADDPDZv213rrb 2197833732U, // VFMADDPDZv213rrbk 50350084U, // VFMADDPDZv213rrbkz 2197833732U, // VFMADDPDZv213rrk 50350084U, // VFMADDPDZv213rrkz 2196784897U, // VFMADDPDZv231rm 2196784897U, // VFMADDPDZv231rmb 2197833473U, // VFMADDPDZv231rmbk 50349825U, // VFMADDPDZv231rmbkz 2197833473U, // VFMADDPDZv231rmk 50349825U, // VFMADDPDZv231rmkz 2196784897U, // VFMADDPDZv231rr 2197833473U, // VFMADDPDZv231rrk 50349825U, // VFMADDPDZv231rrkz 2182104919U, // VFMADDPDr132m 2182104919U, // VFMADDPDr132mY 2182104919U, // VFMADDPDr132r 2182104919U, // VFMADDPDr132rY 2182105092U, // VFMADDPDr213m 2182105092U, // VFMADDPDr213mY 2182105092U, // VFMADDPDr213r 2182105092U, // VFMADDPDr213rY 2182104833U, // VFMADDPDr231m 2182104833U, // VFMADDPDr231mY 2182104833U, // VFMADDPDr231r 2182104833U, // VFMADDPDr231rY 2484099202U, // VFMADDPS4mr 2484099202U, // VFMADDPS4mrY 2484099202U, // VFMADDPS4rm 2484099202U, // VFMADDPS4rmY 2484099202U, // VFMADDPS4rr 2484099202U, // VFMADDPS4rrY 2484099202U, // VFMADDPS4rrY_REV 2484099202U, // VFMADDPS4rr_REV 2196789214U, // VFMADDPSZ128v213rm 2196789214U, // VFMADDPSZ128v213rmb 2197837790U, // VFMADDPSZ128v213rmbk 50354142U, // VFMADDPSZ128v213rmbkz 2197837790U, // VFMADDPSZ128v213rmk 50354142U, // VFMADDPSZ128v213rmkz 2196789214U, // VFMADDPSZ128v213rr 2197837790U, // VFMADDPSZ128v213rrk 50354142U, // VFMADDPSZ128v213rrkz 2196788944U, // VFMADDPSZ128v231rm 2196788944U, // VFMADDPSZ128v231rmb 2197837520U, // VFMADDPSZ128v231rmbk 50353872U, // VFMADDPSZ128v231rmbkz 2197837520U, // VFMADDPSZ128v231rmk 50353872U, // VFMADDPSZ128v231rmkz 2196788944U, // VFMADDPSZ128v231rr 2197837520U, // VFMADDPSZ128v231rrk 50353872U, // VFMADDPSZ128v231rrkz 2196789214U, // VFMADDPSZ256v213rm 2196789214U, // VFMADDPSZ256v213rmb 2197837790U, // VFMADDPSZ256v213rmbk 50354142U, // VFMADDPSZ256v213rmbkz 2197837790U, // VFMADDPSZ256v213rmk 50354142U, // VFMADDPSZ256v213rmkz 2196789214U, // VFMADDPSZ256v213rr 2197837790U, // VFMADDPSZ256v213rrk 50354142U, // VFMADDPSZ256v213rrkz 2196788944U, // VFMADDPSZ256v231rm 2196788944U, // VFMADDPSZ256v231rmb 2197837520U, // VFMADDPSZ256v231rmbk 50353872U, // VFMADDPSZ256v231rmbkz 2197837520U, // VFMADDPSZ256v231rmk 50353872U, // VFMADDPSZ256v231rmkz 2196788944U, // VFMADDPSZ256v231rr 2197837520U, // VFMADDPSZ256v231rrk 50353872U, // VFMADDPSZ256v231rrkz 2196789214U, // VFMADDPSZv213rm 2196789214U, // VFMADDPSZv213rmb 2197837790U, // VFMADDPSZv213rmbk 50354142U, // VFMADDPSZv213rmbkz 2197837790U, // VFMADDPSZv213rmk 50354142U, // VFMADDPSZv213rmkz 2196789214U, // VFMADDPSZv213rr 2196789214U, // VFMADDPSZv213rrb 2197837790U, // VFMADDPSZv213rrbk 50354142U, // VFMADDPSZv213rrbkz 2197837790U, // VFMADDPSZv213rrk 50354142U, // VFMADDPSZv213rrkz 2196788944U, // VFMADDPSZv231rm 2196788944U, // VFMADDPSZv231rmb 2197837520U, // VFMADDPSZv231rmbk 50353872U, // VFMADDPSZv231rmbkz 2197837520U, // VFMADDPSZv231rmk 50353872U, // VFMADDPSZv231rmkz 2196788944U, // VFMADDPSZv231rr 2197837520U, // VFMADDPSZv231rrk 50353872U, // VFMADDPSZv231rrkz 2182108966U, // VFMADDPSr132m 2182108966U, // VFMADDPSr132mY 2182108966U, // VFMADDPSr132r 2182108966U, // VFMADDPSr132rY 2182109150U, // VFMADDPSr213m 2182109150U, // VFMADDPSr213mY 2182109150U, // VFMADDPSr213r 2182109150U, // VFMADDPSr213rY 2182108880U, // VFMADDPSr231m 2182108880U, // VFMADDPSr231mY 2182108880U, // VFMADDPSr231r 2182108880U, // VFMADDPSr231rY 2484095947U, // VFMADDSD4mr 2484095947U, // VFMADDSD4mr_Int 2484095947U, // VFMADDSD4rm 2484095947U, // VFMADDSD4rm_Int 2484095947U, // VFMADDSD4rr 2484095947U, // VFMADDSD4rr_Int 2484095947U, // VFMADDSD4rr_REV 2182105951U, // VFMADDSDZm 2182105951U, // VFMADDSDZr 2182105863U, // VFMADDSDr132m 2182105863U, // VFMADDSDr132r 2182105951U, // VFMADDSDr213m 2182105951U, // VFMADDSDr213r 2182105809U, // VFMADDSDr231m 2182105809U, // VFMADDSDr231r 2484099916U, // VFMADDSS4mr 2484099916U, // VFMADDSS4mr_Int 2484099916U, // VFMADDSS4rm 2484099916U, // VFMADDSS4rm_Int 2484099916U, // VFMADDSS4rr 2484099916U, // VFMADDSS4rr_Int 2484099916U, // VFMADDSS4rr_REV 2182109928U, // VFMADDSSZm 2182109928U, // VFMADDSSZr 2182109840U, // VFMADDSSr132m 2182109840U, // VFMADDSSr132r 2182109928U, // VFMADDSSr213m 2182109928U, // VFMADDSSr213r 2182109786U, // VFMADDSSr231m 2182109786U, // VFMADDSSr231r 2182104860U, // VFMADDSUB132PDZ128m 2182104860U, // VFMADDSUB132PDZ128mb 2182104860U, // VFMADDSUB132PDZ256m 2182104860U, // VFMADDSUB132PDZ256mb 2182104860U, // VFMADDSUB132PDZm 2182104860U, // VFMADDSUB132PDZmb 2182108907U, // VFMADDSUB132PSZ128m 2182108907U, // VFMADDSUB132PSZ128mb 2182108907U, // VFMADDSUB132PSZ256m 2182108907U, // VFMADDSUB132PSZ256mb 2182108907U, // VFMADDSUB132PSZm 2182108907U, // VFMADDSUB132PSZmb 2484095068U, // VFMADDSUBPD4mr 2484095068U, // VFMADDSUBPD4mrY 2484095068U, // VFMADDSUBPD4rm 2484095068U, // VFMADDSUBPD4rmY 2484095068U, // VFMADDSUBPD4rr 2484095068U, // VFMADDSUBPD4rrY 2484095068U, // VFMADDSUBPD4rrY_REV 2484095068U, // VFMADDSUBPD4rr_REV 2196785097U, // VFMADDSUBPDZ128v213rm 2196785097U, // VFMADDSUBPDZ128v213rmb 2197833673U, // VFMADDSUBPDZ128v213rmbk 50350025U, // VFMADDSUBPDZ128v213rmbkz 2197833673U, // VFMADDSUBPDZ128v213rmk 50350025U, // VFMADDSUBPDZ128v213rmkz 2196785097U, // VFMADDSUBPDZ128v213rr 2197833673U, // VFMADDSUBPDZ128v213rrk 50350025U, // VFMADDSUBPDZ128v213rrkz 2196784838U, // VFMADDSUBPDZ128v231rm 2196784838U, // VFMADDSUBPDZ128v231rmb 2197833414U, // VFMADDSUBPDZ128v231rmbk 50349766U, // VFMADDSUBPDZ128v231rmbkz 2197833414U, // VFMADDSUBPDZ128v231rmk 50349766U, // VFMADDSUBPDZ128v231rmkz 2196784838U, // VFMADDSUBPDZ128v231rr 2197833414U, // VFMADDSUBPDZ128v231rrk 50349766U, // VFMADDSUBPDZ128v231rrkz 2196785097U, // VFMADDSUBPDZ256v213rm 2196785097U, // VFMADDSUBPDZ256v213rmb 2197833673U, // VFMADDSUBPDZ256v213rmbk 50350025U, // VFMADDSUBPDZ256v213rmbkz 2197833673U, // VFMADDSUBPDZ256v213rmk 50350025U, // VFMADDSUBPDZ256v213rmkz 2196785097U, // VFMADDSUBPDZ256v213rr 2197833673U, // VFMADDSUBPDZ256v213rrk 50350025U, // VFMADDSUBPDZ256v213rrkz 2196784838U, // VFMADDSUBPDZ256v231rm 2196784838U, // VFMADDSUBPDZ256v231rmb 2197833414U, // VFMADDSUBPDZ256v231rmbk 50349766U, // VFMADDSUBPDZ256v231rmbkz 2197833414U, // VFMADDSUBPDZ256v231rmk 50349766U, // VFMADDSUBPDZ256v231rmkz 2196784838U, // VFMADDSUBPDZ256v231rr 2197833414U, // VFMADDSUBPDZ256v231rrk 50349766U, // VFMADDSUBPDZ256v231rrkz 2196785097U, // VFMADDSUBPDZv213rm 2196785097U, // VFMADDSUBPDZv213rmb 2197833673U, // VFMADDSUBPDZv213rmbk 50350025U, // VFMADDSUBPDZv213rmbkz 2197833673U, // VFMADDSUBPDZv213rmk 50350025U, // VFMADDSUBPDZv213rmkz 2196785097U, // VFMADDSUBPDZv213rr 2196785097U, // VFMADDSUBPDZv213rrb 2197833673U, // VFMADDSUBPDZv213rrbk 50350025U, // VFMADDSUBPDZv213rrbkz 2197833673U, // VFMADDSUBPDZv213rrk 50350025U, // VFMADDSUBPDZv213rrkz 2196784838U, // VFMADDSUBPDZv231rm 2196784838U, // VFMADDSUBPDZv231rmb 2197833414U, // VFMADDSUBPDZv231rmbk 50349766U, // VFMADDSUBPDZv231rmbkz 2197833414U, // VFMADDSUBPDZv231rmk 50349766U, // VFMADDSUBPDZv231rmkz 2196784838U, // VFMADDSUBPDZv231rr 2197833414U, // VFMADDSUBPDZv231rrk 50349766U, // VFMADDSUBPDZv231rrkz 2182104860U, // VFMADDSUBPDr132m 2182104860U, // VFMADDSUBPDr132mY 2182104860U, // VFMADDSUBPDr132r 2182104860U, // VFMADDSUBPDr132rY 2182105033U, // VFMADDSUBPDr213m 2182105033U, // VFMADDSUBPDr213mY 2182105033U, // VFMADDSUBPDr213r 2182105033U, // VFMADDSUBPDr213rY 2182104774U, // VFMADDSUBPDr231m 2182104774U, // VFMADDSUBPDr231mY 2182104774U, // VFMADDSUBPDr231r 2182104774U, // VFMADDSUBPDr231rY 2484099118U, // VFMADDSUBPS4mr 2484099118U, // VFMADDSUBPS4mrY 2484099118U, // VFMADDSUBPS4rm 2484099118U, // VFMADDSUBPS4rmY 2484099118U, // VFMADDSUBPS4rr 2484099118U, // VFMADDSUBPS4rrY 2484099118U, // VFMADDSUBPS4rrY_REV 2484099118U, // VFMADDSUBPS4rr_REV 2196789155U, // VFMADDSUBPSZ128v213rm 2196789155U, // VFMADDSUBPSZ128v213rmb 2197837731U, // VFMADDSUBPSZ128v213rmbk 50354083U, // VFMADDSUBPSZ128v213rmbkz 2197837731U, // VFMADDSUBPSZ128v213rmk 50354083U, // VFMADDSUBPSZ128v213rmkz 2196789155U, // VFMADDSUBPSZ128v213rr 2197837731U, // VFMADDSUBPSZ128v213rrk 50354083U, // VFMADDSUBPSZ128v213rrkz 2196788885U, // VFMADDSUBPSZ128v231rm 2196788885U, // VFMADDSUBPSZ128v231rmb 2197837461U, // VFMADDSUBPSZ128v231rmbk 50353813U, // VFMADDSUBPSZ128v231rmbkz 2197837461U, // VFMADDSUBPSZ128v231rmk 50353813U, // VFMADDSUBPSZ128v231rmkz 2196788885U, // VFMADDSUBPSZ128v231rr 2197837461U, // VFMADDSUBPSZ128v231rrk 50353813U, // VFMADDSUBPSZ128v231rrkz 2196789155U, // VFMADDSUBPSZ256v213rm 2196789155U, // VFMADDSUBPSZ256v213rmb 2197837731U, // VFMADDSUBPSZ256v213rmbk 50354083U, // VFMADDSUBPSZ256v213rmbkz 2197837731U, // VFMADDSUBPSZ256v213rmk 50354083U, // VFMADDSUBPSZ256v213rmkz 2196789155U, // VFMADDSUBPSZ256v213rr 2197837731U, // VFMADDSUBPSZ256v213rrk 50354083U, // VFMADDSUBPSZ256v213rrkz 2196788885U, // VFMADDSUBPSZ256v231rm 2196788885U, // VFMADDSUBPSZ256v231rmb 2197837461U, // VFMADDSUBPSZ256v231rmbk 50353813U, // VFMADDSUBPSZ256v231rmbkz 2197837461U, // VFMADDSUBPSZ256v231rmk 50353813U, // VFMADDSUBPSZ256v231rmkz 2196788885U, // VFMADDSUBPSZ256v231rr 2197837461U, // VFMADDSUBPSZ256v231rrk 50353813U, // VFMADDSUBPSZ256v231rrkz 2196789155U, // VFMADDSUBPSZv213rm 2196789155U, // VFMADDSUBPSZv213rmb 2197837731U, // VFMADDSUBPSZv213rmbk 50354083U, // VFMADDSUBPSZv213rmbkz 2197837731U, // VFMADDSUBPSZv213rmk 50354083U, // VFMADDSUBPSZv213rmkz 2196789155U, // VFMADDSUBPSZv213rr 2196789155U, // VFMADDSUBPSZv213rrb 2197837731U, // VFMADDSUBPSZv213rrbk 50354083U, // VFMADDSUBPSZv213rrbkz 2197837731U, // VFMADDSUBPSZv213rrk 50354083U, // VFMADDSUBPSZv213rrkz 2196788885U, // VFMADDSUBPSZv231rm 2196788885U, // VFMADDSUBPSZv231rmb 2197837461U, // VFMADDSUBPSZv231rmbk 50353813U, // VFMADDSUBPSZv231rmbkz 2197837461U, // VFMADDSUBPSZv231rmk 50353813U, // VFMADDSUBPSZv231rmkz 2196788885U, // VFMADDSUBPSZv231rr 2197837461U, // VFMADDSUBPSZv231rrk 50353813U, // VFMADDSUBPSZv231rrkz 2182108907U, // VFMADDSUBPSr132m 2182108907U, // VFMADDSUBPSr132mY 2182108907U, // VFMADDSUBPSr132r 2182108907U, // VFMADDSUBPSr132rY 2182109091U, // VFMADDSUBPSr213m 2182109091U, // VFMADDSUBPSr213mY 2182109091U, // VFMADDSUBPSr213r 2182109091U, // VFMADDSUBPSr213rY 2182108821U, // VFMADDSUBPSr231m 2182108821U, // VFMADDSUBPSr231mY 2182108821U, // VFMADDSUBPSr231r 2182108821U, // VFMADDSUBPSr231rY 2182104876U, // VFMSUB132PDZ128m 2182104876U, // VFMSUB132PDZ128mb 2182104876U, // VFMSUB132PDZ256m 2182104876U, // VFMSUB132PDZ256mb 2182104876U, // VFMSUB132PDZm 2182104876U, // VFMSUB132PDZmb 2182108923U, // VFMSUB132PSZ128m 2182108923U, // VFMSUB132PSZ128mb 2182108923U, // VFMSUB132PSZ256m 2182108923U, // VFMSUB132PSZ256mb 2182108923U, // VFMSUB132PSZm 2182108923U, // VFMSUB132PSZmb 2182104903U, // VFMSUBADD132PDZ128m 2182104903U, // VFMSUBADD132PDZ128mb 2182104903U, // VFMSUBADD132PDZ256m 2182104903U, // VFMSUBADD132PDZ256mb 2182104903U, // VFMSUBADD132PDZm 2182104903U, // VFMSUBADD132PDZmb 2182108950U, // VFMSUBADD132PSZ128m 2182108950U, // VFMSUBADD132PSZ128mb 2182108950U, // VFMSUBADD132PSZ256m 2182108950U, // VFMSUBADD132PSZ256mb 2182108950U, // VFMSUBADD132PSZm 2182108950U, // VFMSUBADD132PSZmb 2484095130U, // VFMSUBADDPD4mr 2484095130U, // VFMSUBADDPD4mrY 2484095130U, // VFMSUBADDPD4rm 2484095130U, // VFMSUBADDPD4rmY 2484095130U, // VFMSUBADDPD4rr 2484095130U, // VFMSUBADDPD4rrY 2484095130U, // VFMSUBADDPD4rrY_REV 2484095130U, // VFMSUBADDPD4rr_REV 2196785140U, // VFMSUBADDPDZ128v213rm 2196785140U, // VFMSUBADDPDZ128v213rmb 2197833716U, // VFMSUBADDPDZ128v213rmbk 50350068U, // VFMSUBADDPDZ128v213rmbkz 2197833716U, // VFMSUBADDPDZ128v213rmk 50350068U, // VFMSUBADDPDZ128v213rmkz 2196785140U, // VFMSUBADDPDZ128v213rr 2197833716U, // VFMSUBADDPDZ128v213rrk 50350068U, // VFMSUBADDPDZ128v213rrkz 2196784881U, // VFMSUBADDPDZ128v231rm 2196784881U, // VFMSUBADDPDZ128v231rmb 2197833457U, // VFMSUBADDPDZ128v231rmbk 50349809U, // VFMSUBADDPDZ128v231rmbkz 2197833457U, // VFMSUBADDPDZ128v231rmk 50349809U, // VFMSUBADDPDZ128v231rmkz 2196784881U, // VFMSUBADDPDZ128v231rr 2197833457U, // VFMSUBADDPDZ128v231rrk 50349809U, // VFMSUBADDPDZ128v231rrkz 2196785140U, // VFMSUBADDPDZ256v213rm 2196785140U, // VFMSUBADDPDZ256v213rmb 2197833716U, // VFMSUBADDPDZ256v213rmbk 50350068U, // VFMSUBADDPDZ256v213rmbkz 2197833716U, // VFMSUBADDPDZ256v213rmk 50350068U, // VFMSUBADDPDZ256v213rmkz 2196785140U, // VFMSUBADDPDZ256v213rr 2197833716U, // VFMSUBADDPDZ256v213rrk 50350068U, // VFMSUBADDPDZ256v213rrkz 2196784881U, // VFMSUBADDPDZ256v231rm 2196784881U, // VFMSUBADDPDZ256v231rmb 2197833457U, // VFMSUBADDPDZ256v231rmbk 50349809U, // VFMSUBADDPDZ256v231rmbkz 2197833457U, // VFMSUBADDPDZ256v231rmk 50349809U, // VFMSUBADDPDZ256v231rmkz 2196784881U, // VFMSUBADDPDZ256v231rr 2197833457U, // VFMSUBADDPDZ256v231rrk 50349809U, // VFMSUBADDPDZ256v231rrkz 2196785140U, // VFMSUBADDPDZv213rm 2196785140U, // VFMSUBADDPDZv213rmb 2197833716U, // VFMSUBADDPDZv213rmbk 50350068U, // VFMSUBADDPDZv213rmbkz 2197833716U, // VFMSUBADDPDZv213rmk 50350068U, // VFMSUBADDPDZv213rmkz 2196785140U, // VFMSUBADDPDZv213rr 2196785140U, // VFMSUBADDPDZv213rrb 2197833716U, // VFMSUBADDPDZv213rrbk 50350068U, // VFMSUBADDPDZv213rrbkz 2197833716U, // VFMSUBADDPDZv213rrk 50350068U, // VFMSUBADDPDZv213rrkz 2196784881U, // VFMSUBADDPDZv231rm 2196784881U, // VFMSUBADDPDZv231rmb 2197833457U, // VFMSUBADDPDZv231rmbk 50349809U, // VFMSUBADDPDZv231rmbkz 2197833457U, // VFMSUBADDPDZv231rmk 50349809U, // VFMSUBADDPDZv231rmkz 2196784881U, // VFMSUBADDPDZv231rr 2197833457U, // VFMSUBADDPDZv231rrk 50349809U, // VFMSUBADDPDZv231rrkz 2182104903U, // VFMSUBADDPDr132m 2182104903U, // VFMSUBADDPDr132mY 2182104903U, // VFMSUBADDPDr132r 2182104903U, // VFMSUBADDPDr132rY 2182105076U, // VFMSUBADDPDr213m 2182105076U, // VFMSUBADDPDr213mY 2182105076U, // VFMSUBADDPDr213r 2182105076U, // VFMSUBADDPDr213rY 2182104817U, // VFMSUBADDPDr231m 2182104817U, // VFMSUBADDPDr231mY 2182104817U, // VFMSUBADDPDr231r 2182104817U, // VFMSUBADDPDr231rY 2484099180U, // VFMSUBADDPS4mr 2484099180U, // VFMSUBADDPS4mrY 2484099180U, // VFMSUBADDPS4rm 2484099180U, // VFMSUBADDPS4rmY 2484099180U, // VFMSUBADDPS4rr 2484099180U, // VFMSUBADDPS4rrY 2484099180U, // VFMSUBADDPS4rrY_REV 2484099180U, // VFMSUBADDPS4rr_REV 2196789198U, // VFMSUBADDPSZ128v213rm 2196789198U, // VFMSUBADDPSZ128v213rmb 2197837774U, // VFMSUBADDPSZ128v213rmbk 50354126U, // VFMSUBADDPSZ128v213rmbkz 2197837774U, // VFMSUBADDPSZ128v213rmk 50354126U, // VFMSUBADDPSZ128v213rmkz 2196789198U, // VFMSUBADDPSZ128v213rr 2197837774U, // VFMSUBADDPSZ128v213rrk 50354126U, // VFMSUBADDPSZ128v213rrkz 2196788928U, // VFMSUBADDPSZ128v231rm 2196788928U, // VFMSUBADDPSZ128v231rmb 2197837504U, // VFMSUBADDPSZ128v231rmbk 50353856U, // VFMSUBADDPSZ128v231rmbkz 2197837504U, // VFMSUBADDPSZ128v231rmk 50353856U, // VFMSUBADDPSZ128v231rmkz 2196788928U, // VFMSUBADDPSZ128v231rr 2197837504U, // VFMSUBADDPSZ128v231rrk 50353856U, // VFMSUBADDPSZ128v231rrkz 2196789198U, // VFMSUBADDPSZ256v213rm 2196789198U, // VFMSUBADDPSZ256v213rmb 2197837774U, // VFMSUBADDPSZ256v213rmbk 50354126U, // VFMSUBADDPSZ256v213rmbkz 2197837774U, // VFMSUBADDPSZ256v213rmk 50354126U, // VFMSUBADDPSZ256v213rmkz 2196789198U, // VFMSUBADDPSZ256v213rr 2197837774U, // VFMSUBADDPSZ256v213rrk 50354126U, // VFMSUBADDPSZ256v213rrkz 2196788928U, // VFMSUBADDPSZ256v231rm 2196788928U, // VFMSUBADDPSZ256v231rmb 2197837504U, // VFMSUBADDPSZ256v231rmbk 50353856U, // VFMSUBADDPSZ256v231rmbkz 2197837504U, // VFMSUBADDPSZ256v231rmk 50353856U, // VFMSUBADDPSZ256v231rmkz 2196788928U, // VFMSUBADDPSZ256v231rr 2197837504U, // VFMSUBADDPSZ256v231rrk 50353856U, // VFMSUBADDPSZ256v231rrkz 2196789198U, // VFMSUBADDPSZv213rm 2196789198U, // VFMSUBADDPSZv213rmb 2197837774U, // VFMSUBADDPSZv213rmbk 50354126U, // VFMSUBADDPSZv213rmbkz 2197837774U, // VFMSUBADDPSZv213rmk 50354126U, // VFMSUBADDPSZv213rmkz 2196789198U, // VFMSUBADDPSZv213rr 2196789198U, // VFMSUBADDPSZv213rrb 2197837774U, // VFMSUBADDPSZv213rrbk 50354126U, // VFMSUBADDPSZv213rrbkz 2197837774U, // VFMSUBADDPSZv213rrk 50354126U, // VFMSUBADDPSZv213rrkz 2196788928U, // VFMSUBADDPSZv231rm 2196788928U, // VFMSUBADDPSZv231rmb 2197837504U, // VFMSUBADDPSZv231rmbk 50353856U, // VFMSUBADDPSZv231rmbkz 2197837504U, // VFMSUBADDPSZv231rmk 50353856U, // VFMSUBADDPSZv231rmkz 2196788928U, // VFMSUBADDPSZv231rr 2197837504U, // VFMSUBADDPSZv231rrk 50353856U, // VFMSUBADDPSZv231rrkz 2182108950U, // VFMSUBADDPSr132m 2182108950U, // VFMSUBADDPSr132mY 2182108950U, // VFMSUBADDPSr132r 2182108950U, // VFMSUBADDPSr132rY 2182109134U, // VFMSUBADDPSr213m 2182109134U, // VFMSUBADDPSr213mY 2182109134U, // VFMSUBADDPSr213r 2182109134U, // VFMSUBADDPSr213rY 2182108864U, // VFMSUBADDPSr231m 2182108864U, // VFMSUBADDPSr231mY 2182108864U, // VFMSUBADDPSr231r 2182108864U, // VFMSUBADDPSr231rY 2484095101U, // VFMSUBPD4mr 2484095101U, // VFMSUBPD4mrY 2484095101U, // VFMSUBPD4rm 2484095101U, // VFMSUBPD4rmY 2484095101U, // VFMSUBPD4rr 2484095101U, // VFMSUBPD4rrY 2484095101U, // VFMSUBPD4rrY_REV 2484095101U, // VFMSUBPD4rr_REV 2196785113U, // VFMSUBPDZ128v213rm 2196785113U, // VFMSUBPDZ128v213rmb 2197833689U, // VFMSUBPDZ128v213rmbk 50350041U, // VFMSUBPDZ128v213rmbkz 2197833689U, // VFMSUBPDZ128v213rmk 50350041U, // VFMSUBPDZ128v213rmkz 2196785113U, // VFMSUBPDZ128v213rr 2197833689U, // VFMSUBPDZ128v213rrk 50350041U, // VFMSUBPDZ128v213rrkz 2196784854U, // VFMSUBPDZ128v231rm 2196784854U, // VFMSUBPDZ128v231rmb 2197833430U, // VFMSUBPDZ128v231rmbk 50349782U, // VFMSUBPDZ128v231rmbkz 2197833430U, // VFMSUBPDZ128v231rmk 50349782U, // VFMSUBPDZ128v231rmkz 2196784854U, // VFMSUBPDZ128v231rr 2197833430U, // VFMSUBPDZ128v231rrk 50349782U, // VFMSUBPDZ128v231rrkz 2196785113U, // VFMSUBPDZ256v213rm 2196785113U, // VFMSUBPDZ256v213rmb 2197833689U, // VFMSUBPDZ256v213rmbk 50350041U, // VFMSUBPDZ256v213rmbkz 2197833689U, // VFMSUBPDZ256v213rmk 50350041U, // VFMSUBPDZ256v213rmkz 2196785113U, // VFMSUBPDZ256v213rr 2197833689U, // VFMSUBPDZ256v213rrk 50350041U, // VFMSUBPDZ256v213rrkz 2196784854U, // VFMSUBPDZ256v231rm 2196784854U, // VFMSUBPDZ256v231rmb 2197833430U, // VFMSUBPDZ256v231rmbk 50349782U, // VFMSUBPDZ256v231rmbkz 2197833430U, // VFMSUBPDZ256v231rmk 50349782U, // VFMSUBPDZ256v231rmkz 2196784854U, // VFMSUBPDZ256v231rr 2197833430U, // VFMSUBPDZ256v231rrk 50349782U, // VFMSUBPDZ256v231rrkz 2196785113U, // VFMSUBPDZv213rm 2196785113U, // VFMSUBPDZv213rmb 2197833689U, // VFMSUBPDZv213rmbk 50350041U, // VFMSUBPDZv213rmbkz 2197833689U, // VFMSUBPDZv213rmk 50350041U, // VFMSUBPDZv213rmkz 2196785113U, // VFMSUBPDZv213rr 2196785113U, // VFMSUBPDZv213rrb 2197833689U, // VFMSUBPDZv213rrbk 50350041U, // VFMSUBPDZv213rrbkz 2197833689U, // VFMSUBPDZv213rrk 50350041U, // VFMSUBPDZv213rrkz 2196784854U, // VFMSUBPDZv231rm 2196784854U, // VFMSUBPDZv231rmb 2197833430U, // VFMSUBPDZv231rmbk 50349782U, // VFMSUBPDZv231rmbkz 2197833430U, // VFMSUBPDZv231rmk 50349782U, // VFMSUBPDZv231rmkz 2196784854U, // VFMSUBPDZv231rr 2197833430U, // VFMSUBPDZv231rrk 50349782U, // VFMSUBPDZv231rrkz 2182104876U, // VFMSUBPDr132m 2182104876U, // VFMSUBPDr132mY 2182104876U, // VFMSUBPDr132r 2182104876U, // VFMSUBPDr132rY 2182105049U, // VFMSUBPDr213m 2182105049U, // VFMSUBPDr213mY 2182105049U, // VFMSUBPDr213r 2182105049U, // VFMSUBPDr213rY 2182104790U, // VFMSUBPDr231m 2182104790U, // VFMSUBPDr231mY 2182104790U, // VFMSUBPDr231r 2182104790U, // VFMSUBPDr231rY 2484099151U, // VFMSUBPS4mr 2484099151U, // VFMSUBPS4mrY 2484099151U, // VFMSUBPS4rm 2484099151U, // VFMSUBPS4rmY 2484099151U, // VFMSUBPS4rr 2484099151U, // VFMSUBPS4rrY 2484099151U, // VFMSUBPS4rrY_REV 2484099151U, // VFMSUBPS4rr_REV 2196789171U, // VFMSUBPSZ128v213rm 2196789171U, // VFMSUBPSZ128v213rmb 2197837747U, // VFMSUBPSZ128v213rmbk 50354099U, // VFMSUBPSZ128v213rmbkz 2197837747U, // VFMSUBPSZ128v213rmk 50354099U, // VFMSUBPSZ128v213rmkz 2196789171U, // VFMSUBPSZ128v213rr 2197837747U, // VFMSUBPSZ128v213rrk 50354099U, // VFMSUBPSZ128v213rrkz 2196788901U, // VFMSUBPSZ128v231rm 2196788901U, // VFMSUBPSZ128v231rmb 2197837477U, // VFMSUBPSZ128v231rmbk 50353829U, // VFMSUBPSZ128v231rmbkz 2197837477U, // VFMSUBPSZ128v231rmk 50353829U, // VFMSUBPSZ128v231rmkz 2196788901U, // VFMSUBPSZ128v231rr 2197837477U, // VFMSUBPSZ128v231rrk 50353829U, // VFMSUBPSZ128v231rrkz 2196789171U, // VFMSUBPSZ256v213rm 2196789171U, // VFMSUBPSZ256v213rmb 2197837747U, // VFMSUBPSZ256v213rmbk 50354099U, // VFMSUBPSZ256v213rmbkz 2197837747U, // VFMSUBPSZ256v213rmk 50354099U, // VFMSUBPSZ256v213rmkz 2196789171U, // VFMSUBPSZ256v213rr 2197837747U, // VFMSUBPSZ256v213rrk 50354099U, // VFMSUBPSZ256v213rrkz 2196788901U, // VFMSUBPSZ256v231rm 2196788901U, // VFMSUBPSZ256v231rmb 2197837477U, // VFMSUBPSZ256v231rmbk 50353829U, // VFMSUBPSZ256v231rmbkz 2197837477U, // VFMSUBPSZ256v231rmk 50353829U, // VFMSUBPSZ256v231rmkz 2196788901U, // VFMSUBPSZ256v231rr 2197837477U, // VFMSUBPSZ256v231rrk 50353829U, // VFMSUBPSZ256v231rrkz 2196789171U, // VFMSUBPSZv213rm 2196789171U, // VFMSUBPSZv213rmb 2197837747U, // VFMSUBPSZv213rmbk 50354099U, // VFMSUBPSZv213rmbkz 2197837747U, // VFMSUBPSZv213rmk 50354099U, // VFMSUBPSZv213rmkz 2196789171U, // VFMSUBPSZv213rr 2196789171U, // VFMSUBPSZv213rrb 2197837747U, // VFMSUBPSZv213rrbk 50354099U, // VFMSUBPSZv213rrbkz 2197837747U, // VFMSUBPSZv213rrk 50354099U, // VFMSUBPSZv213rrkz 2196788901U, // VFMSUBPSZv231rm 2196788901U, // VFMSUBPSZv231rmb 2197837477U, // VFMSUBPSZv231rmbk 50353829U, // VFMSUBPSZv231rmbkz 2197837477U, // VFMSUBPSZv231rmk 50353829U, // VFMSUBPSZv231rmkz 2196788901U, // VFMSUBPSZv231rr 2197837477U, // VFMSUBPSZv231rrk 50353829U, // VFMSUBPSZv231rrkz 2182108923U, // VFMSUBPSr132m 2182108923U, // VFMSUBPSr132mY 2182108923U, // VFMSUBPSr132r 2182108923U, // VFMSUBPSr132rY 2182109107U, // VFMSUBPSr213m 2182109107U, // VFMSUBPSr213mY 2182109107U, // VFMSUBPSr213r 2182109107U, // VFMSUBPSr213rY 2182108837U, // VFMSUBPSr231m 2182108837U, // VFMSUBPSr231mY 2182108837U, // VFMSUBPSr231r 2182108837U, // VFMSUBPSr231rY 2484095918U, // VFMSUBSD4mr 2484095918U, // VFMSUBSD4mr_Int 2484095918U, // VFMSUBSD4rm 2484095918U, // VFMSUBSD4rm_Int 2484095918U, // VFMSUBSD4rr 2484095918U, // VFMSUBSD4rr_Int 2484095918U, // VFMSUBSD4rr_REV 2182105924U, // VFMSUBSDZm 2182105924U, // VFMSUBSDZr 2182105836U, // VFMSUBSDr132m 2182105836U, // VFMSUBSDr132r 2182105924U, // VFMSUBSDr213m 2182105924U, // VFMSUBSDr213r 2182105782U, // VFMSUBSDr231m 2182105782U, // VFMSUBSDr231r 2484099887U, // VFMSUBSS4mr 2484099887U, // VFMSUBSS4mr_Int 2484099887U, // VFMSUBSS4rm 2484099887U, // VFMSUBSS4rm_Int 2484099887U, // VFMSUBSS4rr 2484099887U, // VFMSUBSS4rr_Int 2484099887U, // VFMSUBSS4rr_REV 2182109901U, // VFMSUBSSZm 2182109901U, // VFMSUBSSZr 2182109813U, // VFMSUBSSr132m 2182109813U, // VFMSUBSSr132r 2182109901U, // VFMSUBSSr213m 2182109901U, // VFMSUBSSr213r 2182109759U, // VFMSUBSSr231m 2182109759U, // VFMSUBSSr231r 2182104932U, // VFNMADD132PDZ128m 2182104932U, // VFNMADD132PDZ128mb 2182104932U, // VFNMADD132PDZ256m 2182104932U, // VFNMADD132PDZ256mb 2182104932U, // VFNMADD132PDZm 2182104932U, // VFNMADD132PDZmb 2182108979U, // VFNMADD132PSZ128m 2182108979U, // VFNMADD132PSZ128mb 2182108979U, // VFNMADD132PSZ256m 2182108979U, // VFNMADD132PSZ256mb 2182108979U, // VFNMADD132PSZm 2182108979U, // VFNMADD132PSZmb 2484095162U, // VFNMADDPD4mr 2484095162U, // VFNMADDPD4mrY 2484095162U, // VFNMADDPD4rm 2484095162U, // VFNMADDPD4rmY 2484095162U, // VFNMADDPD4rr 2484095162U, // VFNMADDPD4rrY 2484095162U, // VFNMADDPD4rrY_REV 2484095162U, // VFNMADDPD4rr_REV 2196785169U, // VFNMADDPDZ128v213rm 2196785169U, // VFNMADDPDZ128v213rmb 2197833745U, // VFNMADDPDZ128v213rmbk 50350097U, // VFNMADDPDZ128v213rmbkz 2197833745U, // VFNMADDPDZ128v213rmk 50350097U, // VFNMADDPDZ128v213rmkz 2196785169U, // VFNMADDPDZ128v213rr 2197833745U, // VFNMADDPDZ128v213rrk 50350097U, // VFNMADDPDZ128v213rrkz 2196784910U, // VFNMADDPDZ128v231rm 2196784910U, // VFNMADDPDZ128v231rmb 2197833486U, // VFNMADDPDZ128v231rmbk 50349838U, // VFNMADDPDZ128v231rmbkz 2197833486U, // VFNMADDPDZ128v231rmk 50349838U, // VFNMADDPDZ128v231rmkz 2196784910U, // VFNMADDPDZ128v231rr 2197833486U, // VFNMADDPDZ128v231rrk 50349838U, // VFNMADDPDZ128v231rrkz 2196785169U, // VFNMADDPDZ256v213rm 2196785169U, // VFNMADDPDZ256v213rmb 2197833745U, // VFNMADDPDZ256v213rmbk 50350097U, // VFNMADDPDZ256v213rmbkz 2197833745U, // VFNMADDPDZ256v213rmk 50350097U, // VFNMADDPDZ256v213rmkz 2196785169U, // VFNMADDPDZ256v213rr 2197833745U, // VFNMADDPDZ256v213rrk 50350097U, // VFNMADDPDZ256v213rrkz 2196784910U, // VFNMADDPDZ256v231rm 2196784910U, // VFNMADDPDZ256v231rmb 2197833486U, // VFNMADDPDZ256v231rmbk 50349838U, // VFNMADDPDZ256v231rmbkz 2197833486U, // VFNMADDPDZ256v231rmk 50349838U, // VFNMADDPDZ256v231rmkz 2196784910U, // VFNMADDPDZ256v231rr 2197833486U, // VFNMADDPDZ256v231rrk 50349838U, // VFNMADDPDZ256v231rrkz 2196785169U, // VFNMADDPDZv213rm 2196785169U, // VFNMADDPDZv213rmb 2197833745U, // VFNMADDPDZv213rmbk 50350097U, // VFNMADDPDZv213rmbkz 2197833745U, // VFNMADDPDZv213rmk 50350097U, // VFNMADDPDZv213rmkz 2196785169U, // VFNMADDPDZv213rr 2196785169U, // VFNMADDPDZv213rrb 2197833745U, // VFNMADDPDZv213rrbk 50350097U, // VFNMADDPDZv213rrbkz 2197833745U, // VFNMADDPDZv213rrk 50350097U, // VFNMADDPDZv213rrkz 2196784910U, // VFNMADDPDZv231rm 2196784910U, // VFNMADDPDZv231rmb 2197833486U, // VFNMADDPDZv231rmbk 50349838U, // VFNMADDPDZv231rmbkz 2197833486U, // VFNMADDPDZv231rmk 50349838U, // VFNMADDPDZv231rmkz 2196784910U, // VFNMADDPDZv231rr 2197833486U, // VFNMADDPDZv231rrk 50349838U, // VFNMADDPDZv231rrkz 2182104932U, // VFNMADDPDr132m 2182104932U, // VFNMADDPDr132mY 2182104932U, // VFNMADDPDr132r 2182104932U, // VFNMADDPDr132rY 2182105105U, // VFNMADDPDr213m 2182105105U, // VFNMADDPDr213mY 2182105105U, // VFNMADDPDr213r 2182105105U, // VFNMADDPDr213rY 2182104846U, // VFNMADDPDr231m 2182104846U, // VFNMADDPDr231mY 2182104846U, // VFNMADDPDr231r 2182104846U, // VFNMADDPDr231rY 2484099212U, // VFNMADDPS4mr 2484099212U, // VFNMADDPS4mrY 2484099212U, // VFNMADDPS4rm 2484099212U, // VFNMADDPS4rmY 2484099212U, // VFNMADDPS4rr 2484099212U, // VFNMADDPS4rrY 2484099212U, // VFNMADDPS4rrY_REV 2484099212U, // VFNMADDPS4rr_REV 2196789227U, // VFNMADDPSZ128v213rm 2196789227U, // VFNMADDPSZ128v213rmb 2197837803U, // VFNMADDPSZ128v213rmbk 50354155U, // VFNMADDPSZ128v213rmbkz 2197837803U, // VFNMADDPSZ128v213rmk 50354155U, // VFNMADDPSZ128v213rmkz 2196789227U, // VFNMADDPSZ128v213rr 2197837803U, // VFNMADDPSZ128v213rrk 50354155U, // VFNMADDPSZ128v213rrkz 2196788957U, // VFNMADDPSZ128v231rm 2196788957U, // VFNMADDPSZ128v231rmb 2197837533U, // VFNMADDPSZ128v231rmbk 50353885U, // VFNMADDPSZ128v231rmbkz 2197837533U, // VFNMADDPSZ128v231rmk 50353885U, // VFNMADDPSZ128v231rmkz 2196788957U, // VFNMADDPSZ128v231rr 2197837533U, // VFNMADDPSZ128v231rrk 50353885U, // VFNMADDPSZ128v231rrkz 2196789227U, // VFNMADDPSZ256v213rm 2196789227U, // VFNMADDPSZ256v213rmb 2197837803U, // VFNMADDPSZ256v213rmbk 50354155U, // VFNMADDPSZ256v213rmbkz 2197837803U, // VFNMADDPSZ256v213rmk 50354155U, // VFNMADDPSZ256v213rmkz 2196789227U, // VFNMADDPSZ256v213rr 2197837803U, // VFNMADDPSZ256v213rrk 50354155U, // VFNMADDPSZ256v213rrkz 2196788957U, // VFNMADDPSZ256v231rm 2196788957U, // VFNMADDPSZ256v231rmb 2197837533U, // VFNMADDPSZ256v231rmbk 50353885U, // VFNMADDPSZ256v231rmbkz 2197837533U, // VFNMADDPSZ256v231rmk 50353885U, // VFNMADDPSZ256v231rmkz 2196788957U, // VFNMADDPSZ256v231rr 2197837533U, // VFNMADDPSZ256v231rrk 50353885U, // VFNMADDPSZ256v231rrkz 2196789227U, // VFNMADDPSZv213rm 2196789227U, // VFNMADDPSZv213rmb 2197837803U, // VFNMADDPSZv213rmbk 50354155U, // VFNMADDPSZv213rmbkz 2197837803U, // VFNMADDPSZv213rmk 50354155U, // VFNMADDPSZv213rmkz 2196789227U, // VFNMADDPSZv213rr 2196789227U, // VFNMADDPSZv213rrb 2197837803U, // VFNMADDPSZv213rrbk 50354155U, // VFNMADDPSZv213rrbkz 2197837803U, // VFNMADDPSZv213rrk 50354155U, // VFNMADDPSZv213rrkz 2196788957U, // VFNMADDPSZv231rm 2196788957U, // VFNMADDPSZv231rmb 2197837533U, // VFNMADDPSZv231rmbk 50353885U, // VFNMADDPSZv231rmbkz 2197837533U, // VFNMADDPSZv231rmk 50353885U, // VFNMADDPSZv231rmkz 2196788957U, // VFNMADDPSZv231rr 2197837533U, // VFNMADDPSZv231rrk 50353885U, // VFNMADDPSZv231rrkz 2182108979U, // VFNMADDPSr132m 2182108979U, // VFNMADDPSr132mY 2182108979U, // VFNMADDPSr132r 2182108979U, // VFNMADDPSr132rY 2182109163U, // VFNMADDPSr213m 2182109163U, // VFNMADDPSr213mY 2182109163U, // VFNMADDPSr213r 2182109163U, // VFNMADDPSr213rY 2182108893U, // VFNMADDPSr231m 2182108893U, // VFNMADDPSr231mY 2182108893U, // VFNMADDPSr231r 2182108893U, // VFNMADDPSr231rY 2484095957U, // VFNMADDSD4mr 2484095957U, // VFNMADDSD4mr_Int 2484095957U, // VFNMADDSD4rm 2484095957U, // VFNMADDSD4rm_Int 2484095957U, // VFNMADDSD4rr 2484095957U, // VFNMADDSD4rr_Int 2484095957U, // VFNMADDSD4rr_REV 2182105964U, // VFNMADDSDZm 2182105964U, // VFNMADDSDZr 2182105876U, // VFNMADDSDr132m 2182105876U, // VFNMADDSDr132r 2182105964U, // VFNMADDSDr213m 2182105964U, // VFNMADDSDr213r 2182105822U, // VFNMADDSDr231m 2182105822U, // VFNMADDSDr231r 2484099926U, // VFNMADDSS4mr 2484099926U, // VFNMADDSS4mr_Int 2484099926U, // VFNMADDSS4rm 2484099926U, // VFNMADDSS4rm_Int 2484099926U, // VFNMADDSS4rr 2484099926U, // VFNMADDSS4rr_Int 2484099926U, // VFNMADDSS4rr_REV 2182109941U, // VFNMADDSSZm 2182109941U, // VFNMADDSSZr 2182109853U, // VFNMADDSSr132m 2182109853U, // VFNMADDSSr132r 2182109941U, // VFNMADDSSr213m 2182109941U, // VFNMADDSSr213r 2182109799U, // VFNMADDSSr231m 2182109799U, // VFNMADDSSr231r 2182104889U, // VFNMSUB132PDZ128m 2182104889U, // VFNMSUB132PDZ128mb 2182104889U, // VFNMSUB132PDZ256m 2182104889U, // VFNMSUB132PDZ256mb 2182104889U, // VFNMSUB132PDZm 2182104889U, // VFNMSUB132PDZmb 2182108936U, // VFNMSUB132PSZ128m 2182108936U, // VFNMSUB132PSZ128mb 2182108936U, // VFNMSUB132PSZ256m 2182108936U, // VFNMSUB132PSZ256mb 2182108936U, // VFNMSUB132PSZm 2182108936U, // VFNMSUB132PSZmb 2484095111U, // VFNMSUBPD4mr 2484095111U, // VFNMSUBPD4mrY 2484095111U, // VFNMSUBPD4rm 2484095111U, // VFNMSUBPD4rmY 2484095111U, // VFNMSUBPD4rr 2484095111U, // VFNMSUBPD4rrY 2484095111U, // VFNMSUBPD4rrY_REV 2484095111U, // VFNMSUBPD4rr_REV 2196785126U, // VFNMSUBPDZ128v213rm 2196785126U, // VFNMSUBPDZ128v213rmb 2197833702U, // VFNMSUBPDZ128v213rmbk 50350054U, // VFNMSUBPDZ128v213rmbkz 2197833702U, // VFNMSUBPDZ128v213rmk 50350054U, // VFNMSUBPDZ128v213rmkz 2196785126U, // VFNMSUBPDZ128v213rr 2197833702U, // VFNMSUBPDZ128v213rrk 50350054U, // VFNMSUBPDZ128v213rrkz 2196784867U, // VFNMSUBPDZ128v231rm 2196784867U, // VFNMSUBPDZ128v231rmb 2197833443U, // VFNMSUBPDZ128v231rmbk 50349795U, // VFNMSUBPDZ128v231rmbkz 2197833443U, // VFNMSUBPDZ128v231rmk 50349795U, // VFNMSUBPDZ128v231rmkz 2196784867U, // VFNMSUBPDZ128v231rr 2197833443U, // VFNMSUBPDZ128v231rrk 50349795U, // VFNMSUBPDZ128v231rrkz 2196785126U, // VFNMSUBPDZ256v213rm 2196785126U, // VFNMSUBPDZ256v213rmb 2197833702U, // VFNMSUBPDZ256v213rmbk 50350054U, // VFNMSUBPDZ256v213rmbkz 2197833702U, // VFNMSUBPDZ256v213rmk 50350054U, // VFNMSUBPDZ256v213rmkz 2196785126U, // VFNMSUBPDZ256v213rr 2197833702U, // VFNMSUBPDZ256v213rrk 50350054U, // VFNMSUBPDZ256v213rrkz 2196784867U, // VFNMSUBPDZ256v231rm 2196784867U, // VFNMSUBPDZ256v231rmb 2197833443U, // VFNMSUBPDZ256v231rmbk 50349795U, // VFNMSUBPDZ256v231rmbkz 2197833443U, // VFNMSUBPDZ256v231rmk 50349795U, // VFNMSUBPDZ256v231rmkz 2196784867U, // VFNMSUBPDZ256v231rr 2197833443U, // VFNMSUBPDZ256v231rrk 50349795U, // VFNMSUBPDZ256v231rrkz 2196785126U, // VFNMSUBPDZv213rm 2196785126U, // VFNMSUBPDZv213rmb 2197833702U, // VFNMSUBPDZv213rmbk 50350054U, // VFNMSUBPDZv213rmbkz 2197833702U, // VFNMSUBPDZv213rmk 50350054U, // VFNMSUBPDZv213rmkz 2196785126U, // VFNMSUBPDZv213rr 2196785126U, // VFNMSUBPDZv213rrb 2197833702U, // VFNMSUBPDZv213rrbk 50350054U, // VFNMSUBPDZv213rrbkz 2197833702U, // VFNMSUBPDZv213rrk 50350054U, // VFNMSUBPDZv213rrkz 2196784867U, // VFNMSUBPDZv231rm 2196784867U, // VFNMSUBPDZv231rmb 2197833443U, // VFNMSUBPDZv231rmbk 50349795U, // VFNMSUBPDZv231rmbkz 2197833443U, // VFNMSUBPDZv231rmk 50349795U, // VFNMSUBPDZv231rmkz 2196784867U, // VFNMSUBPDZv231rr 2197833443U, // VFNMSUBPDZv231rrk 50349795U, // VFNMSUBPDZv231rrkz 2182104889U, // VFNMSUBPDr132m 2182104889U, // VFNMSUBPDr132mY 2182104889U, // VFNMSUBPDr132r 2182104889U, // VFNMSUBPDr132rY 2182105062U, // VFNMSUBPDr213m 2182105062U, // VFNMSUBPDr213mY 2182105062U, // VFNMSUBPDr213r 2182105062U, // VFNMSUBPDr213rY 2182104803U, // VFNMSUBPDr231m 2182104803U, // VFNMSUBPDr231mY 2182104803U, // VFNMSUBPDr231r 2182104803U, // VFNMSUBPDr231rY 2484099161U, // VFNMSUBPS4mr 2484099161U, // VFNMSUBPS4mrY 2484099161U, // VFNMSUBPS4rm 2484099161U, // VFNMSUBPS4rmY 2484099161U, // VFNMSUBPS4rr 2484099161U, // VFNMSUBPS4rrY 2484099161U, // VFNMSUBPS4rrY_REV 2484099161U, // VFNMSUBPS4rr_REV 2196789184U, // VFNMSUBPSZ128v213rm 2196789184U, // VFNMSUBPSZ128v213rmb 2197837760U, // VFNMSUBPSZ128v213rmbk 50354112U, // VFNMSUBPSZ128v213rmbkz 2197837760U, // VFNMSUBPSZ128v213rmk 50354112U, // VFNMSUBPSZ128v213rmkz 2196789184U, // VFNMSUBPSZ128v213rr 2197837760U, // VFNMSUBPSZ128v213rrk 50354112U, // VFNMSUBPSZ128v213rrkz 2196788914U, // VFNMSUBPSZ128v231rm 2196788914U, // VFNMSUBPSZ128v231rmb 2197837490U, // VFNMSUBPSZ128v231rmbk 50353842U, // VFNMSUBPSZ128v231rmbkz 2197837490U, // VFNMSUBPSZ128v231rmk 50353842U, // VFNMSUBPSZ128v231rmkz 2196788914U, // VFNMSUBPSZ128v231rr 2197837490U, // VFNMSUBPSZ128v231rrk 50353842U, // VFNMSUBPSZ128v231rrkz 2196789184U, // VFNMSUBPSZ256v213rm 2196789184U, // VFNMSUBPSZ256v213rmb 2197837760U, // VFNMSUBPSZ256v213rmbk 50354112U, // VFNMSUBPSZ256v213rmbkz 2197837760U, // VFNMSUBPSZ256v213rmk 50354112U, // VFNMSUBPSZ256v213rmkz 2196789184U, // VFNMSUBPSZ256v213rr 2197837760U, // VFNMSUBPSZ256v213rrk 50354112U, // VFNMSUBPSZ256v213rrkz 2196788914U, // VFNMSUBPSZ256v231rm 2196788914U, // VFNMSUBPSZ256v231rmb 2197837490U, // VFNMSUBPSZ256v231rmbk 50353842U, // VFNMSUBPSZ256v231rmbkz 2197837490U, // VFNMSUBPSZ256v231rmk 50353842U, // VFNMSUBPSZ256v231rmkz 2196788914U, // VFNMSUBPSZ256v231rr 2197837490U, // VFNMSUBPSZ256v231rrk 50353842U, // VFNMSUBPSZ256v231rrkz 2196789184U, // VFNMSUBPSZv213rm 2196789184U, // VFNMSUBPSZv213rmb 2197837760U, // VFNMSUBPSZv213rmbk 50354112U, // VFNMSUBPSZv213rmbkz 2197837760U, // VFNMSUBPSZv213rmk 50354112U, // VFNMSUBPSZv213rmkz 2196789184U, // VFNMSUBPSZv213rr 2196789184U, // VFNMSUBPSZv213rrb 2197837760U, // VFNMSUBPSZv213rrbk 50354112U, // VFNMSUBPSZv213rrbkz 2197837760U, // VFNMSUBPSZv213rrk 50354112U, // VFNMSUBPSZv213rrkz 2196788914U, // VFNMSUBPSZv231rm 2196788914U, // VFNMSUBPSZv231rmb 2197837490U, // VFNMSUBPSZv231rmbk 50353842U, // VFNMSUBPSZv231rmbkz 2197837490U, // VFNMSUBPSZv231rmk 50353842U, // VFNMSUBPSZv231rmkz 2196788914U, // VFNMSUBPSZv231rr 2197837490U, // VFNMSUBPSZv231rrk 50353842U, // VFNMSUBPSZv231rrkz 2182108936U, // VFNMSUBPSr132m 2182108936U, // VFNMSUBPSr132mY 2182108936U, // VFNMSUBPSr132r 2182108936U, // VFNMSUBPSr132rY 2182109120U, // VFNMSUBPSr213m 2182109120U, // VFNMSUBPSr213mY 2182109120U, // VFNMSUBPSr213r 2182109120U, // VFNMSUBPSr213rY 2182108850U, // VFNMSUBPSr231m 2182108850U, // VFNMSUBPSr231mY 2182108850U, // VFNMSUBPSr231r 2182108850U, // VFNMSUBPSr231rY 2484095928U, // VFNMSUBSD4mr 2484095928U, // VFNMSUBSD4mr_Int 2484095928U, // VFNMSUBSD4rm 2484095928U, // VFNMSUBSD4rm_Int 2484095928U, // VFNMSUBSD4rr 2484095928U, // VFNMSUBSD4rr_Int 2484095928U, // VFNMSUBSD4rr_REV 2182105937U, // VFNMSUBSDZm 2182105937U, // VFNMSUBSDZr 2182105849U, // VFNMSUBSDr132m 2182105849U, // VFNMSUBSDr132r 2182105937U, // VFNMSUBSDr213m 2182105937U, // VFNMSUBSDr213r 2182105795U, // VFNMSUBSDr231m 2182105795U, // VFNMSUBSDr231r 2484099897U, // VFNMSUBSS4mr 2484099897U, // VFNMSUBSS4mr_Int 2484099897U, // VFNMSUBSS4rm 2484099897U, // VFNMSUBSS4rm_Int 2484099897U, // VFNMSUBSS4rr 2484099897U, // VFNMSUBSS4rr_Int 2484099897U, // VFNMSUBSS4rr_REV 2182109914U, // VFNMSUBSSZm 2182109914U, // VFNMSUBSSZr 2182109826U, // VFNMSUBSSr132m 2182109826U, // VFNMSUBSSr132r 2182109914U, // VFNMSUBSSr213m 2182109914U, // VFNMSUBSSr213r 2182109772U, // VFNMSUBSSr231m 2182109772U, // VFNMSUBSSr231r 537938470U, // VFRCZPDrm 1041254950U, // VFRCZPDrmY 336611878U, // VFRCZPDrr 336611878U, // VFRCZPDrrY 537942573U, // VFRCZPSrm 1041259053U, // VFRCZPSrmY 336615981U, // VFRCZPSrr 336615981U, // VFRCZPSrrY 571493512U, // VFRCZSDrm 336612488U, // VFRCZSDrr 605051893U, // VFRCZSSrm 336616437U, // VFRCZSSrr 2484095365U, // VFsANDNPDrm 2484095365U, // VFsANDNPDrr 2484099427U, // VFsANDNPSrm 2484099427U, // VFsANDNPSrr 2484095192U, // VFsANDPDrm 2484095192U, // VFsANDPDrr 2484099242U, // VFsANDPSrm 2484099242U, // VFsANDPSrr 2484095422U, // VFsORPDrm 2484095422U, // VFsORPDrr 2484099492U, // VFsORPSrm 2484099492U, // VFsORPSrr 2484095429U, // VFsXORPDrm 2484095429U, // VFsXORPDrr 2484099499U, // VFsXORPSrm 2484099499U, // VFsXORPSrr 2484095365U, // VFvANDNPDrm 2484095365U, // VFvANDNPDrr 2484099427U, // VFvANDNPSrm 2484099427U, // VFvANDNPSrr 2484095192U, // VFvANDPDrm 2484095192U, // VFvANDPDrr 2484099242U, // VFvANDPSrm 2484099242U, // VFvANDPSrr 2484095422U, // VFvORPDrm 2484095422U, // VFvORPDrr 2484099492U, // VFvORPSrm 2484099492U, // VFvORPSrr 2484095429U, // VFvXORPDrm 2484095429U, // VFvXORPDrr 2484099499U, // VFvXORPSrm 2484099499U, // VFvXORPSrr 1141917940U, // VGATHERDPDYrm 3338684660U, // VGATHERDPDZrm 1141917940U, // VGATHERDPDrm 1209030854U, // VGATHERDPSYrm 1191205062U, // VGATHERDPSZrm 1209030854U, // VGATHERDPSrm 321940556U, // VGATHERPF0DPDm 321940688U, // VGATHERPF0DPSm 389049486U, // VGATHERPF0QPDm 389049618U, // VGATHERPF0QPSm 321940589U, // VGATHERPF1DPDm 321940721U, // VGATHERPF1DPSm 389049519U, // VGATHERPF1QPDm 389049651U, // VGATHERPF1QPSm 1141918117U, // VGATHERQPDYrm 3338684837U, // VGATHERQPDZrm 1141918117U, // VGATHERQPDrm 1209031051U, // VGATHERQPSYrm 3338688907U, // VGATHERQPSZrm 1209031051U, // VGATHERQPSrm 2484095143U, // VHADDPDYrm 2484095143U, // VHADDPDYrr 2484095143U, // VHADDPDrm 2484095143U, // VHADDPDrr 2484099193U, // VHADDPSYrm 2484099193U, // VHADDPSYrr 2484099193U, // VHADDPSrm 2484099193U, // VHADDPSrr 2484095092U, // VHSUBPDYrm 2484095092U, // VHSUBPDYrr 2484095092U, // VHSUBPDrm 2484095092U, // VHSUBPDrr 2484099142U, // VHSUBPSYrm 2484099142U, // VHSUBPSYrr 2484099142U, // VHSUBPSrm 2484099142U, // VHSUBPSrr 2484093393U, // VINSERTF128rm 2484093393U, // VINSERTF128rr 2484093221U, // VINSERTF32x4rm 2484093221U, // VINSERTF32x4rr 2484093471U, // VINSERTF32x8rm 2484093471U, // VINSERTF32x8rr 2484093081U, // VINSERTF64x2rm 2484093081U, // VINSERTF64x2rr 2484093296U, // VINSERTF64x4rm 2484093296U, // VINSERTF64x4rr 2484093448U, // VINSERTI128rm 2484093448U, // VINSERTI128rr 2484093250U, // VINSERTI32x4rm 2484093250U, // VINSERTI32x4rr 2484093485U, // VINSERTI32x8rm 2484093485U, // VINSERTI32x8rr 2484093095U, // VINSERTI64x2rm 2484093095U, // VINSERTI64x2rr 2484093325U, // VINSERTI64x4rm 2484093325U, // VINSERTI64x4rr 2484099542U, // VINSERTPSrm 2484099542U, // VINSERTPSrr 2484099542U, // VINSERTPSzrm 2484099542U, // VINSERTPSzrr 974150888U, // VLDDQUYrm 437279976U, // VLDDQUrm 71188U, // VLDMXCSR 336616688U, // VMASKMOVDQU 336616688U, // VMASKMOVDQU64 2149222930U, // VMASKMOVPDYmr 2484095506U, // VMASKMOVPDYrm 2149124626U, // VMASKMOVPDmr 2484095506U, // VMASKMOVPDrm 2149227033U, // VMASKMOVPSYmr 2484099609U, // VMASKMOVPSYrm 2149128729U, // VMASKMOVPSmr 2484099609U, // VMASKMOVPSrm 2484095518U, // VMAXCPDYrm 2484095518U, // VMAXCPDYrr 2484095518U, // VMAXCPDrm 2484095518U, // VMAXCPDrr 2484099621U, // VMAXCPSYrm 2484099621U, // VMAXCPSYrr 2484099621U, // VMAXCPSrm 2484099621U, // VMAXCPSrr 2484096128U, // VMAXCSDrm 2484096128U, // VMAXCSDrr 2484100077U, // VMAXCSSrm 2484100077U, // VMAXCSSrr 2484095518U, // VMAXPDYrm 2484095518U, // VMAXPDYrr 2498775582U, // VMAXPDZ128rm 2498775582U, // VMAXPDZ128rmb 2197834270U, // VMAXPDZ128rmbk 352340510U, // VMAXPDZ128rmbkz 2197834270U, // VMAXPDZ128rmk 352340510U, // VMAXPDZ128rmkz 2498775582U, // VMAXPDZ128rr 2197834270U, // VMAXPDZ128rrk 352340510U, // VMAXPDZ128rrkz 2498775582U, // VMAXPDZ256rm 2498775582U, // VMAXPDZ256rmb 2197834270U, // VMAXPDZ256rmbk 352340510U, // VMAXPDZ256rmbkz 2197834270U, // VMAXPDZ256rmk 352340510U, // VMAXPDZ256rmkz 2498775582U, // VMAXPDZ256rr 2197834270U, // VMAXPDZ256rrk 352340510U, // VMAXPDZ256rrkz 2498775582U, // VMAXPDZrm 2498775582U, // VMAXPDZrmb 2197834270U, // VMAXPDZrmbk 352340510U, // VMAXPDZrmbkz 2197834270U, // VMAXPDZrmk 352340510U, // VMAXPDZrmkz 2498775582U, // VMAXPDZrr 2197834270U, // VMAXPDZrrk 352340510U, // VMAXPDZrrkz 2484095518U, // VMAXPDrm 2484095518U, // VMAXPDrr 2484099621U, // VMAXPSYrm 2484099621U, // VMAXPSYrr 2498779685U, // VMAXPSZ128rm 2498779685U, // VMAXPSZ128rmb 2197838373U, // VMAXPSZ128rmbk 352344613U, // VMAXPSZ128rmbkz 2197838373U, // VMAXPSZ128rmk 352344613U, // VMAXPSZ128rmkz 2498779685U, // VMAXPSZ128rr 2197838373U, // VMAXPSZ128rrk 352344613U, // VMAXPSZ128rrkz 2498779685U, // VMAXPSZ256rm 2498779685U, // VMAXPSZ256rmb 2197838373U, // VMAXPSZ256rmbk 352344613U, // VMAXPSZ256rmbkz 2197838373U, // VMAXPSZ256rmk 352344613U, // VMAXPSZ256rmkz 2498779685U, // VMAXPSZ256rr 2197838373U, // VMAXPSZ256rrk 352344613U, // VMAXPSZ256rrkz 2498779685U, // VMAXPSZrm 2498779685U, // VMAXPSZrmb 2197838373U, // VMAXPSZrmbk 352344613U, // VMAXPSZrmbkz 2197838373U, // VMAXPSZrmk 352344613U, // VMAXPSZrmkz 2498779685U, // VMAXPSZrr 2197838373U, // VMAXPSZrrk 352344613U, // VMAXPSZrrkz 2484099621U, // VMAXPSrm 2484099621U, // VMAXPSrr 2484096128U, // VMAXSDZrm 2498776192U, // VMAXSDZrm_Int 2197834880U, // VMAXSDZrm_Intk 352341120U, // VMAXSDZrm_Intkz 2484096128U, // VMAXSDZrr 2498776192U, // VMAXSDZrr_Int 2197834880U, // VMAXSDZrr_Intk 352341120U, // VMAXSDZrr_Intkz 3407891584U, // VMAXSDZrrb 2197834880U, // VMAXSDZrrbk 352341120U, // VMAXSDZrrbkz 2484096128U, // VMAXSDrm 2484096128U, // VMAXSDrm_Int 2484096128U, // VMAXSDrr 2484096128U, // VMAXSDrr_Int 2484100077U, // VMAXSSZrm 2498780141U, // VMAXSSZrm_Int 2197838829U, // VMAXSSZrm_Intk 352345069U, // VMAXSSZrm_Intkz 2484100077U, // VMAXSSZrr 2498780141U, // VMAXSSZrr_Int 2197838829U, // VMAXSSZrr_Intk 352345069U, // VMAXSSZrr_Intkz 3407895533U, // VMAXSSZrrb 2197838829U, // VMAXSSZrrbk 352345069U, // VMAXSSZrrbkz 2484100077U, // VMAXSSrm 2484100077U, // VMAXSSrm_Int 2484100077U, // VMAXSSrr 2484100077U, // VMAXSSrr_Int 10526U, // VMCALL 87464U, // VMCLEARm 10194U, // VMFUNC 2484095374U, // VMINCPDYrm 2484095374U, // VMINCPDYrr 2484095374U, // VMINCPDrm 2484095374U, // VMINCPDrr 2484099436U, // VMINCPSYrm 2484099436U, // VMINCPSYrr 2484099436U, // VMINCPSrm 2484099436U, // VMINCPSrr 2484096035U, // VMINCSDrm 2484096035U, // VMINCSDrr 2484099995U, // VMINCSSrm 2484099995U, // VMINCSSrr 2484095374U, // VMINPDYrm 2484095374U, // VMINPDYrr 2498775438U, // VMINPDZ128rm 2498775438U, // VMINPDZ128rmb 2197834126U, // VMINPDZ128rmbk 352340366U, // VMINPDZ128rmbkz 2197834126U, // VMINPDZ128rmk 352340366U, // VMINPDZ128rmkz 2498775438U, // VMINPDZ128rr 2197834126U, // VMINPDZ128rrk 352340366U, // VMINPDZ128rrkz 2498775438U, // VMINPDZ256rm 2498775438U, // VMINPDZ256rmb 2197834126U, // VMINPDZ256rmbk 352340366U, // VMINPDZ256rmbkz 2197834126U, // VMINPDZ256rmk 352340366U, // VMINPDZ256rmkz 2498775438U, // VMINPDZ256rr 2197834126U, // VMINPDZ256rrk 352340366U, // VMINPDZ256rrkz 2498775438U, // VMINPDZrm 2498775438U, // VMINPDZrmb 2197834126U, // VMINPDZrmbk 352340366U, // VMINPDZrmbkz 2197834126U, // VMINPDZrmk 352340366U, // VMINPDZrmkz 2498775438U, // VMINPDZrr 2197834126U, // VMINPDZrrk 352340366U, // VMINPDZrrkz 2484095374U, // VMINPDrm 2484095374U, // VMINPDrr 2484099436U, // VMINPSYrm 2484099436U, // VMINPSYrr 2498779500U, // VMINPSZ128rm 2498779500U, // VMINPSZ128rmb 2197838188U, // VMINPSZ128rmbk 352344428U, // VMINPSZ128rmbkz 2197838188U, // VMINPSZ128rmk 352344428U, // VMINPSZ128rmkz 2498779500U, // VMINPSZ128rr 2197838188U, // VMINPSZ128rrk 352344428U, // VMINPSZ128rrkz 2498779500U, // VMINPSZ256rm 2498779500U, // VMINPSZ256rmb 2197838188U, // VMINPSZ256rmbk 352344428U, // VMINPSZ256rmbkz 2197838188U, // VMINPSZ256rmk 352344428U, // VMINPSZ256rmkz 2498779500U, // VMINPSZ256rr 2197838188U, // VMINPSZ256rrk 352344428U, // VMINPSZ256rrkz 2498779500U, // VMINPSZrm 2498779500U, // VMINPSZrmb 2197838188U, // VMINPSZrmbk 352344428U, // VMINPSZrmbkz 2197838188U, // VMINPSZrmk 352344428U, // VMINPSZrmkz 2498779500U, // VMINPSZrr 2197838188U, // VMINPSZrrk 352344428U, // VMINPSZrrkz 2484099436U, // VMINPSrm 2484099436U, // VMINPSrr 2484096035U, // VMINSDZrm 2498776099U, // VMINSDZrm_Int 2197834787U, // VMINSDZrm_Intk 352341027U, // VMINSDZrm_Intkz 2484096035U, // VMINSDZrr 2498776099U, // VMINSDZrr_Int 2197834787U, // VMINSDZrr_Intk 352341027U, // VMINSDZrr_Intkz 3407891491U, // VMINSDZrrb 2197834787U, // VMINSDZrrbk 352341027U, // VMINSDZrrbkz 2484096035U, // VMINSDrm 2484096035U, // VMINSDrm_Int 2484096035U, // VMINSDrr 2484096035U, // VMINSDrr_Int 2484099995U, // VMINSSZrm 2498780059U, // VMINSSZrm_Int 2197838747U, // VMINSSZrm_Intk 352344987U, // VMINSSZrm_Intkz 2484099995U, // VMINSSZrr 2498780059U, // VMINSSZrr_Int 2197838747U, // VMINSSZrr_Intk 352344987U, // VMINSSZrr_Intkz 3407895451U, // VMINSSZrrb 2197838747U, // VMINSSZrrbk 352344987U, // VMINSSZrrbkz 2484099995U, // VMINSSrm 2484099995U, // VMINSSrm_Int 2484099995U, // VMINSSrr 2484099995U, // VMINSSrr_Int 10441U, // VMLAUNCH 11176U, // VMLOAD32 11231U, // VMLOAD64 10518U, // VMMCALL 336614774U, // VMOV64toPQIZrr 370169206U, // VMOV64toPQIrm 336614774U, // VMOV64toPQIrr 336614774U, // VMOV64toSDZrr 370169206U, // VMOV64toSDrm 336614774U, // VMOV64toSDrr 1738827U, // VMOVAPDYmr 1041254475U, // VMOVAPDYrm 336611403U, // VMOVAPDYrr 336611403U, // VMOVAPDYrr_REV 1640523U, // VMOVAPDZ128mr 2164852811U, // VMOVAPDZ128mrk 537937995U, // VMOVAPDZ128rm 2197833803U, // VMOVAPDZ128rmk 352340043U, // VMOVAPDZ128rmkz 336611403U, // VMOVAPDZ128rr 336611403U, // VMOVAPDZ128rr_alt 2197833803U, // VMOVAPDZ128rrk 2197833803U, // VMOVAPDZ128rrk_alt 352340043U, // VMOVAPDZ128rrkz 352340043U, // VMOVAPDZ128rrkz_alt 1738827U, // VMOVAPDZ256mr 2164951115U, // VMOVAPDZ256mrk 1041254475U, // VMOVAPDZ256rm 2197833803U, // VMOVAPDZ256rmk 352340043U, // VMOVAPDZ256rmkz 336611403U, // VMOVAPDZ256rr 336611403U, // VMOVAPDZ256rr_alt 2197833803U, // VMOVAPDZ256rrk 2197833803U, // VMOVAPDZ256rrk_alt 352340043U, // VMOVAPDZ256rrkz 352340043U, // VMOVAPDZ256rrkz_alt 1755211U, // VMOVAPDZmr 2164967499U, // VMOVAPDZmrk 1074808907U, // VMOVAPDZrm 2197833803U, // VMOVAPDZrmk 352340043U, // VMOVAPDZrmkz 336611403U, // VMOVAPDZrr 336611403U, // VMOVAPDZrr_alt 2197833803U, // VMOVAPDZrrk 2197833803U, // VMOVAPDZrrk_alt 352340043U, // VMOVAPDZrrkz 352340043U, // VMOVAPDZrrkz_alt 1640523U, // VMOVAPDmr 537937995U, // VMOVAPDrm 336611403U, // VMOVAPDrr 336611403U, // VMOVAPDrr_REV 1742885U, // VMOVAPSYmr 1041258533U, // VMOVAPSYrm 336615461U, // VMOVAPSYrr 336615461U, // VMOVAPSYrr_REV 1644581U, // VMOVAPSZ128mr 2164856869U, // VMOVAPSZ128mrk 537942053U, // VMOVAPSZ128rm 2197837861U, // VMOVAPSZ128rmk 352344101U, // VMOVAPSZ128rmkz 336615461U, // VMOVAPSZ128rr 336615461U, // VMOVAPSZ128rr_alt 2197837861U, // VMOVAPSZ128rrk 2197837861U, // VMOVAPSZ128rrk_alt 352344101U, // VMOVAPSZ128rrkz 352344101U, // VMOVAPSZ128rrkz_alt 1742885U, // VMOVAPSZ256mr 2164955173U, // VMOVAPSZ256mrk 1041258533U, // VMOVAPSZ256rm 2197837861U, // VMOVAPSZ256rmk 352344101U, // VMOVAPSZ256rmkz 336615461U, // VMOVAPSZ256rr 336615461U, // VMOVAPSZ256rr_alt 2197837861U, // VMOVAPSZ256rrk 2197837861U, // VMOVAPSZ256rrk_alt 352344101U, // VMOVAPSZ256rrkz 352344101U, // VMOVAPSZ256rrkz_alt 1759269U, // VMOVAPSZmr 2164971557U, // VMOVAPSZmrk 1074812965U, // VMOVAPSZrm 2197837861U, // VMOVAPSZrmk 352344101U, // VMOVAPSZrmkz 336615461U, // VMOVAPSZrr 336615461U, // VMOVAPSZrr_alt 2197837861U, // VMOVAPSZrrk 2197837861U, // VMOVAPSZrrk_alt 352344101U, // VMOVAPSZrrkz 352344101U, // VMOVAPSZrrkz_alt 1644581U, // VMOVAPSmr 537942053U, // VMOVAPSrm 336615461U, // VMOVAPSrr 336615461U, // VMOVAPSrr_REV 1041256871U, // VMOVDDUPYrm 336613799U, // VMOVDDUPYrr 1074811303U, // VMOVDDUPZrm 336613799U, // VMOVDDUPZrr 571494823U, // VMOVDDUPrm 336613799U, // VMOVDDUPrr 303058212U, // VMOVDI2PDIZrm 336612644U, // VMOVDI2PDIZrr 303058212U, // VMOVDI2PDIrm 336612644U, // VMOVDI2PDIrr 303058212U, // VMOVDI2SSZrm 336612644U, // VMOVDI2SSZrr 303058212U, // VMOVDI2SSrm 336612644U, // VMOVDI2SSrr 1310787U, // VMOVDQA32Z128mr 2164523075U, // VMOVDQA32Z128mrk 437272643U, // VMOVDQA32Z128rm 2197831747U, // VMOVDQA32Z128rmk 352337987U, // VMOVDQA32Z128rmkz 336609347U, // VMOVDQA32Z128rr 336609347U, // VMOVDQA32Z128rr_alt 2197831747U, // VMOVDQA32Z128rrk 2197831747U, // VMOVDQA32Z128rrk_alt 352337987U, // VMOVDQA32Z128rrkz 352337987U, // VMOVDQA32Z128rrkz_alt 1769539U, // VMOVDQA32Z256mr 2164981827U, // VMOVDQA32Z256mrk 974143555U, // VMOVDQA32Z256rm 2197831747U, // VMOVDQA32Z256rmk 352337987U, // VMOVDQA32Z256rmkz 336609347U, // VMOVDQA32Z256rr 336609347U, // VMOVDQA32Z256rr_alt 2197831747U, // VMOVDQA32Z256rrk 2197831747U, // VMOVDQA32Z256rrk_alt 352337987U, // VMOVDQA32Z256rrkz 352337987U, // VMOVDQA32Z256rrkz_alt 1785923U, // VMOVDQA32Zmr 2164998211U, // VMOVDQA32Zmrk 1007697987U, // VMOVDQA32Zrm 2197831747U, // VMOVDQA32Zrmk 352337987U, // VMOVDQA32Zrmkz 336609347U, // VMOVDQA32Zrr 336609347U, // VMOVDQA32Zrr_alt 2197831747U, // VMOVDQA32Zrrk 2197831747U, // VMOVDQA32Zrrk_alt 352337987U, // VMOVDQA32Zrrkz 352337987U, // VMOVDQA32Zrrkz_alt 1310901U, // VMOVDQA64Z128mr 2164523189U, // VMOVDQA64Z128mrk 437272757U, // VMOVDQA64Z128rm 2197831861U, // VMOVDQA64Z128rmk 352338101U, // VMOVDQA64Z128rmkz 336609461U, // VMOVDQA64Z128rr 336609461U, // VMOVDQA64Z128rr_alt 2197831861U, // VMOVDQA64Z128rrk 2197831861U, // VMOVDQA64Z128rrk_alt 352338101U, // VMOVDQA64Z128rrkz 352338101U, // VMOVDQA64Z128rrkz_alt 1769653U, // VMOVDQA64Z256mr 2164981941U, // VMOVDQA64Z256mrk 974143669U, // VMOVDQA64Z256rm 2197831861U, // VMOVDQA64Z256rmk 352338101U, // VMOVDQA64Z256rmkz 336609461U, // VMOVDQA64Z256rr 336609461U, // VMOVDQA64Z256rr_alt 2197831861U, // VMOVDQA64Z256rrk 2197831861U, // VMOVDQA64Z256rrk_alt 352338101U, // VMOVDQA64Z256rrkz 352338101U, // VMOVDQA64Z256rrkz_alt 1786037U, // VMOVDQA64Zmr 2164998325U, // VMOVDQA64Zmrk 1007698101U, // VMOVDQA64Zrm 2197831861U, // VMOVDQA64Zrmk 352338101U, // VMOVDQA64Zrmkz 336609461U, // VMOVDQA64Zrr 336609461U, // VMOVDQA64Zrr_alt 2197831861U, // VMOVDQA64Zrrk 2197831861U, // VMOVDQA64Zrrk_alt 352338101U, // VMOVDQA64Zrrkz 352338101U, // VMOVDQA64Zrrkz_alt 1770063U, // VMOVDQAYmr 974144079U, // VMOVDQAYrm 336609871U, // VMOVDQAYrr 336609871U, // VMOVDQAYrr_REV 1311311U, // VMOVDQAmr 437273167U, // VMOVDQArm 336609871U, // VMOVDQArr 336609871U, // VMOVDQArr_REV 1311148U, // VMOVDQU16Z128mr 2164523436U, // VMOVDQU16Z128mrk 437273004U, // VMOVDQU16Z128rm 2197832108U, // VMOVDQU16Z128rmk 352338348U, // VMOVDQU16Z128rmkz 336609708U, // VMOVDQU16Z128rr 336609708U, // VMOVDQU16Z128rr_alt 2197832108U, // VMOVDQU16Z128rrk 2197832108U, // VMOVDQU16Z128rrk_alt 352338348U, // VMOVDQU16Z128rrkz 352338348U, // VMOVDQU16Z128rrkz_alt 1769900U, // VMOVDQU16Z256mr 2164982188U, // VMOVDQU16Z256mrk 974143916U, // VMOVDQU16Z256rm 2197832108U, // VMOVDQU16Z256rmk 352338348U, // VMOVDQU16Z256rmkz 336609708U, // VMOVDQU16Z256rr 336609708U, // VMOVDQU16Z256rr_alt 2197832108U, // VMOVDQU16Z256rrk 2197832108U, // VMOVDQU16Z256rrk_alt 352338348U, // VMOVDQU16Z256rrkz 352338348U, // VMOVDQU16Z256rrkz_alt 1786284U, // VMOVDQU16Zmr 2164998572U, // VMOVDQU16Zmrk 1007698348U, // VMOVDQU16Zrm 2197832108U, // VMOVDQU16Zrmk 352338348U, // VMOVDQU16Zrmkz 336609708U, // VMOVDQU16Zrr 336609708U, // VMOVDQU16Zrr_alt 2197832108U, // VMOVDQU16Zrrk 2197832108U, // VMOVDQU16Zrrk_alt 352338348U, // VMOVDQU16Zrrkz 352338348U, // VMOVDQU16Zrrkz_alt 1310805U, // VMOVDQU32Z128mr 2164523093U, // VMOVDQU32Z128mrk 437272661U, // VMOVDQU32Z128rm 2197831765U, // VMOVDQU32Z128rmk 352338005U, // VMOVDQU32Z128rmkz 336609365U, // VMOVDQU32Z128rr 336609365U, // VMOVDQU32Z128rr_alt 2197831765U, // VMOVDQU32Z128rrk 2197831765U, // VMOVDQU32Z128rrk_alt 352338005U, // VMOVDQU32Z128rrkz 352338005U, // VMOVDQU32Z128rrkz_alt 1769557U, // VMOVDQU32Z256mr 2164981845U, // VMOVDQU32Z256mrk 974143573U, // VMOVDQU32Z256rm 2197831765U, // VMOVDQU32Z256rmk 352338005U, // VMOVDQU32Z256rmkz 336609365U, // VMOVDQU32Z256rr 336609365U, // VMOVDQU32Z256rr_alt 2197831765U, // VMOVDQU32Z256rrk 2197831765U, // VMOVDQU32Z256rrk_alt 352338005U, // VMOVDQU32Z256rrkz 352338005U, // VMOVDQU32Z256rrkz_alt 1785941U, // VMOVDQU32Zmr 2164998229U, // VMOVDQU32Zmrk 1007698005U, // VMOVDQU32Zrm 2197831765U, // VMOVDQU32Zrmk 352338005U, // VMOVDQU32Zrmkz 336609365U, // VMOVDQU32Zrr 336609365U, // VMOVDQU32Zrr_alt 2197831765U, // VMOVDQU32Zrrk 2197831765U, // VMOVDQU32Zrrk_alt 352338005U, // VMOVDQU32Zrrkz 352338005U, // VMOVDQU32Zrrkz_alt 1310976U, // VMOVDQU64Z128mr 2164523264U, // VMOVDQU64Z128mrk 437272832U, // VMOVDQU64Z128rm 2197831936U, // VMOVDQU64Z128rmk 352338176U, // VMOVDQU64Z128rmkz 336609536U, // VMOVDQU64Z128rr 336609536U, // VMOVDQU64Z128rr_alt 2197831936U, // VMOVDQU64Z128rrk 2197831936U, // VMOVDQU64Z128rrk_alt 352338176U, // VMOVDQU64Z128rrkz 352338176U, // VMOVDQU64Z128rrkz_alt 1769728U, // VMOVDQU64Z256mr 2164982016U, // VMOVDQU64Z256mrk 974143744U, // VMOVDQU64Z256rm 2197831936U, // VMOVDQU64Z256rmk 352338176U, // VMOVDQU64Z256rmkz 336609536U, // VMOVDQU64Z256rr 336609536U, // VMOVDQU64Z256rr_alt 2197831936U, // VMOVDQU64Z256rrk 2197831936U, // VMOVDQU64Z256rrk_alt 352338176U, // VMOVDQU64Z256rrkz 352338176U, // VMOVDQU64Z256rrkz_alt 1786112U, // VMOVDQU64Zmr 2164998400U, // VMOVDQU64Zmrk 1007698176U, // VMOVDQU64Zrm 2197831936U, // VMOVDQU64Zrmk 352338176U, // VMOVDQU64Zrmkz 336609536U, // VMOVDQU64Zrr 336609536U, // VMOVDQU64Zrr_alt 2197831936U, // VMOVDQU64Zrrk 2197831936U, // VMOVDQU64Zrrk_alt 352338176U, // VMOVDQU64Zrrkz 352338176U, // VMOVDQU64Zrrkz_alt 1311253U, // VMOVDQU8Z128mr 2164523541U, // VMOVDQU8Z128mrk 437273109U, // VMOVDQU8Z128rm 2197832213U, // VMOVDQU8Z128rmk 352338453U, // VMOVDQU8Z128rmkz 336609813U, // VMOVDQU8Z128rr 336609813U, // VMOVDQU8Z128rr_alt 2197832213U, // VMOVDQU8Z128rrk 2197832213U, // VMOVDQU8Z128rrk_alt 352338453U, // VMOVDQU8Z128rrkz 352338453U, // VMOVDQU8Z128rrkz_alt 1770005U, // VMOVDQU8Z256mr 2164982293U, // VMOVDQU8Z256mrk 974144021U, // VMOVDQU8Z256rm 2197832213U, // VMOVDQU8Z256rmk 352338453U, // VMOVDQU8Z256rmkz 336609813U, // VMOVDQU8Z256rr 336609813U, // VMOVDQU8Z256rr_alt 2197832213U, // VMOVDQU8Z256rrk 2197832213U, // VMOVDQU8Z256rrk_alt 352338453U, // VMOVDQU8Z256rrkz 352338453U, // VMOVDQU8Z256rrkz_alt 1786389U, // VMOVDQU8Zmr 2164998677U, // VMOVDQU8Zmrk 1007698453U, // VMOVDQU8Zrm 2197832213U, // VMOVDQU8Zrmk 352338453U, // VMOVDQU8Zrmkz 336609813U, // VMOVDQU8Zrr 336609813U, // VMOVDQU8Zrr_alt 2197832213U, // VMOVDQU8Zrrk 2197832213U, // VMOVDQU8Zrrk_alt 352338453U, // VMOVDQU8Zrrkz 352338453U, // VMOVDQU8Zrrkz_alt 1776893U, // VMOVDQUYmr 974150909U, // VMOVDQUYrm 336616701U, // VMOVDQUYrr 336616701U, // VMOVDQUYrr_REV 1318141U, // VMOVDQUmr 437279997U, // VMOVDQUrm 336616701U, // VMOVDQUrr 336616701U, // VMOVDQUrr_REV 2484099358U, // VMOVHLPSZrr 2484099358U, // VMOVHLPSrr 1181998U, // VMOVHPDmr 2484095278U, // VMOVHPDrm 1186058U, // VMOVHPSmr 2484099338U, // VMOVHPSrm 2484099328U, // VMOVLHPSZrr 2484099328U, // VMOVLHPSrr 1182048U, // VMOVLPDmr 2484095328U, // VMOVLPDrm 1186118U, // VMOVLPSmr 2484099398U, // VMOVLPSrm 336611639U, // VMOVMSKPDYrr 336611639U, // VMOVMSKPDrr 336615699U, // VMOVMSKPSYrr 336615699U, // VMOVMSKPSrr 974144068U, // VMOVNTDQAYrm 437273156U, // VMOVNTDQAZ128rm 974144068U, // VMOVNTDQAZ256rm 1007698500U, // VMOVNTDQAZrm 437273156U, // VMOVNTDQArm 1741631U, // VMOVNTDQYmr 1315647U, // VMOVNTDQZ128mr 1774399U, // VMOVNTDQZ256mr 1790783U, // VMOVNTDQZmr 1643327U, // VMOVNTDQmr 1739226U, // VMOVNTPDYmr 1640922U, // VMOVNTPDZ128mr 1739226U, // VMOVNTPDZ256mr 1755610U, // VMOVNTPDZmr 1640922U, // VMOVNTPDmr 1743308U, // VMOVNTPSYmr 1645004U, // VMOVNTPSZ128mr 1743308U, // VMOVNTPSZ256mr 1759692U, // VMOVNTPSZmr 1645004U, // VMOVNTPSmr 1117476U, // VMOVPDI2DIZmr 336612644U, // VMOVPDI2DIZrr 1117476U, // VMOVPDI2DImr 336612644U, // VMOVPDI2DIrr 1135990U, // VMOVPQI2QImr 336614774U, // VMOVPQI2QIrr 1135990U, // VMOVPQIto64Zmr 336614774U, // VMOVPQIto64Zrr 1135990U, // VMOVPQIto64rm 336614774U, // VMOVPQIto64rr 370169206U, // VMOVQI2PQIZrm 370169206U, // VMOVQI2PQIrm 1182831U, // VMOVSDZmr 2164395119U, // VMOVSDZmrk 571493487U, // VMOVSDZrm 2484096111U, // VMOVSDZrr 2484096111U, // VMOVSDZrr_REV 2197834863U, // VMOVSDZrrk 1182831U, // VMOVSDmr 571493487U, // VMOVSDrm 2484096111U, // VMOVSDrr 2484096111U, // VMOVSDrr_REV 1135990U, // VMOVSDto64Zmr 336614774U, // VMOVSDto64Zrr 1135990U, // VMOVSDto64mr 336614774U, // VMOVSDto64rr 1041256881U, // VMOVSHDUPYrm 336613809U, // VMOVSHDUPYrr 1074811313U, // VMOVSHDUPZrm 336613809U, // VMOVSHDUPZrr 537940401U, // VMOVSHDUPrm 336613809U, // VMOVSHDUPrr 1041256892U, // VMOVSLDUPYrm 336613820U, // VMOVSLDUPYrr 1074811324U, // VMOVSLDUPZrm 336613820U, // VMOVSLDUPZrr 537940412U, // VMOVSLDUPrm 336613820U, // VMOVSLDUPrr 1117476U, // VMOVSS2DIZmr 336612644U, // VMOVSS2DIZrr 1117476U, // VMOVSS2DImr 336612644U, // VMOVSS2DIrr 1170405U, // VMOVSSZmr 2164382693U, // VMOVSSZmrk 605051877U, // VMOVSSZrm 2484100069U, // VMOVSSZrr 2484100069U, // VMOVSSZrr_REV 2197838821U, // VMOVSSZrrk 1170405U, // VMOVSSmr 605051877U, // VMOVSSrm 2484100069U, // VMOVSSrr 2484100069U, // VMOVSSrr_REV 1739254U, // VMOVUPDYmr 1041254902U, // VMOVUPDYrm 336611830U, // VMOVUPDYrr 336611830U, // VMOVUPDYrr_REV 1640950U, // VMOVUPDZ128mr 2164853238U, // VMOVUPDZ128mrk 537938422U, // VMOVUPDZ128rm 2197834230U, // VMOVUPDZ128rmk 352340470U, // VMOVUPDZ128rmkz 336611830U, // VMOVUPDZ128rr 336611830U, // VMOVUPDZ128rr_alt 2197834230U, // VMOVUPDZ128rrk 2197834230U, // VMOVUPDZ128rrk_alt 352340470U, // VMOVUPDZ128rrkz 352340470U, // VMOVUPDZ128rrkz_alt 1739254U, // VMOVUPDZ256mr 2164951542U, // VMOVUPDZ256mrk 1041254902U, // VMOVUPDZ256rm 2197834230U, // VMOVUPDZ256rmk 352340470U, // VMOVUPDZ256rmkz 336611830U, // VMOVUPDZ256rr 336611830U, // VMOVUPDZ256rr_alt 2197834230U, // VMOVUPDZ256rrk 2197834230U, // VMOVUPDZ256rrk_alt 352340470U, // VMOVUPDZ256rrkz 352340470U, // VMOVUPDZ256rrkz_alt 1755638U, // VMOVUPDZmr 2164967926U, // VMOVUPDZmrk 1074809334U, // VMOVUPDZrm 2197834230U, // VMOVUPDZrmk 352340470U, // VMOVUPDZrmkz 336611830U, // VMOVUPDZrr 336611830U, // VMOVUPDZrr_alt 2197834230U, // VMOVUPDZrrk 2197834230U, // VMOVUPDZrrk_alt 352340470U, // VMOVUPDZrrkz 352340470U, // VMOVUPDZrrkz_alt 1640950U, // VMOVUPDmr 537938422U, // VMOVUPDrm 336611830U, // VMOVUPDrr 336611830U, // VMOVUPDrr_REV 1743357U, // VMOVUPSYmr 1041259005U, // VMOVUPSYrm 336615933U, // VMOVUPSYrr 336615933U, // VMOVUPSYrr_REV 1645053U, // VMOVUPSZ128mr 2164857341U, // VMOVUPSZ128mrk 537942525U, // VMOVUPSZ128rm 2197838333U, // VMOVUPSZ128rmk 352344573U, // VMOVUPSZ128rmkz 336615933U, // VMOVUPSZ128rr 336615933U, // VMOVUPSZ128rr_alt 2197838333U, // VMOVUPSZ128rrk 2197838333U, // VMOVUPSZ128rrk_alt 352344573U, // VMOVUPSZ128rrkz 352344573U, // VMOVUPSZ128rrkz_alt 1743357U, // VMOVUPSZ256mr 2164955645U, // VMOVUPSZ256mrk 1041259005U, // VMOVUPSZ256rm 2197838333U, // VMOVUPSZ256rmk 352344573U, // VMOVUPSZ256rmkz 336615933U, // VMOVUPSZ256rr 336615933U, // VMOVUPSZ256rr_alt 2197838333U, // VMOVUPSZ256rrk 2197838333U, // VMOVUPSZ256rrk_alt 352344573U, // VMOVUPSZ256rrkz 352344573U, // VMOVUPSZ256rrkz_alt 1759741U, // VMOVUPSZmr 2164972029U, // VMOVUPSZmrk 1074813437U, // VMOVUPSZrm 2197838333U, // VMOVUPSZrmk 352344573U, // VMOVUPSZrmkz 336615933U, // VMOVUPSZrr 336615933U, // VMOVUPSZrr_alt 2197838333U, // VMOVUPSZrrk 2197838333U, // VMOVUPSZrrk_alt 352344573U, // VMOVUPSZrrkz 352344573U, // VMOVUPSZrrkz_alt 1645053U, // VMOVUPSmr 537942525U, // VMOVUPSrm 336615933U, // VMOVUPSrr 336615933U, // VMOVUPSrr_REV 437278070U, // VMOVZPQILo2PQIZrm 336614774U, // VMOVZPQILo2PQIZrr 437278070U, // VMOVZPQILo2PQIrm 336614774U, // VMOVZPQILo2PQIrr 370169206U, // VMOVZQI2PQIrm 336614774U, // VMOVZQI2PQIrr 2484100432U, // VMPSADBWYrmi 2484100432U, // VMPSADBWYrri 2484100432U, // VMPSADBWrmi 2484100432U, // VMPSADBWrri 83530U, // VMPTRLDm 89300U, // VMPTRSTm 1115420U, // VMREAD32rm 336610588U, // VMREAD32rr 1131804U, // VMREAD64rm 336610588U, // VMREAD64rr 10320U, // VMRESUME 11198U, // VMRUN32 11253U, // VMRUN64 11187U, // VMSAVE32 11242U, // VMSAVE64 2484095320U, // VMULPDYrm 2484095320U, // VMULPDYrr 2498775384U, // VMULPDZ128rm 2498775384U, // VMULPDZ128rmb 2197834072U, // VMULPDZ128rmbk 352340312U, // VMULPDZ128rmbkz 2197834072U, // VMULPDZ128rmk 352340312U, // VMULPDZ128rmkz 2498775384U, // VMULPDZ128rr 2197834072U, // VMULPDZ128rrk 352340312U, // VMULPDZ128rrkz 2498775384U, // VMULPDZ256rm 2498775384U, // VMULPDZ256rmb 2197834072U, // VMULPDZ256rmbk 352340312U, // VMULPDZ256rmbkz 2197834072U, // VMULPDZ256rmk 352340312U, // VMULPDZ256rmkz 2498775384U, // VMULPDZ256rr 2197834072U, // VMULPDZ256rrk 352340312U, // VMULPDZ256rrkz 2498775384U, // VMULPDZrb 2197834072U, // VMULPDZrbk 352340312U, // VMULPDZrbkz 2498775384U, // VMULPDZrm 2498775384U, // VMULPDZrmb 2197834072U, // VMULPDZrmbk 352340312U, // VMULPDZrmbkz 2197834072U, // VMULPDZrmk 352340312U, // VMULPDZrmkz 2498775384U, // VMULPDZrr 2197834072U, // VMULPDZrrk 352340312U, // VMULPDZrrkz 2484095320U, // VMULPDrm 2484095320U, // VMULPDrr 2484099390U, // VMULPSYrm 2484099390U, // VMULPSYrr 2498779454U, // VMULPSZ128rm 2498779454U, // VMULPSZ128rmb 2197838142U, // VMULPSZ128rmbk 352344382U, // VMULPSZ128rmbkz 2197838142U, // VMULPSZ128rmk 352344382U, // VMULPSZ128rmkz 2498779454U, // VMULPSZ128rr 2197838142U, // VMULPSZ128rrk 352344382U, // VMULPSZ128rrkz 2498779454U, // VMULPSZ256rm 2498779454U, // VMULPSZ256rmb 2197838142U, // VMULPSZ256rmbk 352344382U, // VMULPSZ256rmbkz 2197838142U, // VMULPSZ256rmk 352344382U, // VMULPSZ256rmkz 2498779454U, // VMULPSZ256rr 2197838142U, // VMULPSZ256rrk 352344382U, // VMULPSZ256rrkz 2498779454U, // VMULPSZrb 2197838142U, // VMULPSZrbk 352344382U, // VMULPSZrbkz 2498779454U, // VMULPSZrm 2498779454U, // VMULPSZrmb 2197838142U, // VMULPSZrmbk 352344382U, // VMULPSZrmbkz 2197838142U, // VMULPSZrmk 352344382U, // VMULPSZrmkz 2498779454U, // VMULPSZrr 2197838142U, // VMULPSZrrk 352344382U, // VMULPSZrrkz 2484099390U, // VMULPSrm 2484099390U, // VMULPSrr 2484096018U, // VMULSDZrm 2498776082U, // VMULSDZrm_Int 2197834770U, // VMULSDZrm_Intk 352341010U, // VMULSDZrm_Intkz 2484096018U, // VMULSDZrr 2498776082U, // VMULSDZrr_Int 2197834770U, // VMULSDZrr_Intk 352341010U, // VMULSDZrr_Intkz 2498776082U, // VMULSDZrrb 2197834770U, // VMULSDZrrbk 352341010U, // VMULSDZrrbkz 2484096018U, // VMULSDrm 2484096018U, // VMULSDrm_Int 2484096018U, // VMULSDrr 2484096018U, // VMULSDrr_Int 2484099987U, // VMULSSZrm 2498780051U, // VMULSSZrm_Int 2197838739U, // VMULSSZrm_Intk 352344979U, // VMULSSZrm_Intkz 2484099987U, // VMULSSZrr 2498780051U, // VMULSSZrr_Int 2197838739U, // VMULSSZrr_Intk 352344979U, // VMULSSZrr_Intkz 2498780051U, // VMULSSZrrb 2197838739U, // VMULSSZrrbk 352344979U, // VMULSSZrrbkz 2484099987U, // VMULSSrm 2484099987U, // VMULSSrm_Int 2484099987U, // VMULSSrr 2484099987U, // VMULSSrr_Int 303058548U, // VMWRITE32rm 336612980U, // VMWRITE32rr 370167412U, // VMWRITE64rm 336612980U, // VMWRITE64rr 10408U, // VMXOFF 86211U, // VMXON 2484095422U, // VORPDYrm 2484095422U, // VORPDYrr 2484095422U, // VORPDrm 2484095422U, // VORPDrr 2484099492U, // VORPSYrm 2484099492U, // VORPSYrr 2484099492U, // VORPSrm 2484099492U, // VORPSrr 437273484U, // VPABSBrm128 974144396U, // VPABSBrm256 336610188U, // VPABSBrr128 336610188U, // VPABSBrr256 1007700902U, // VPABSDZrm 303057830U, // VPABSDZrmb 2499824550U, // VPABSDZrmbk 352340902U, // VPABSDZrmbkz 2499824550U, // VPABSDZrmk 352340902U, // VPABSDZrmkz 336612262U, // VPABSDZrr 2499824550U, // VPABSDZrrk 352340902U, // VPABSDZrrkz 437275558U, // VPABSDrm128 974146470U, // VPABSDrm256 336612262U, // VPABSDrr128 336612262U, // VPABSDrr256 1007703190U, // VPABSQZrm 2517652630U, // VPABSQZrmb 2499826838U, // VPABSQZrmbk 352343190U, // VPABSQZrmbkz 2499826838U, // VPABSQZrmk 352343190U, // VPABSQZrmkz 336614550U, // VPABSQZrr 2499826838U, // VPABSQZrrk 352343190U, // VPABSQZrrkz 437280555U, // VPABSWrm128 974151467U, // VPABSWrm256 336617259U, // VPABSWrr128 336617259U, // VPABSWrr256 2484100594U, // VPACKSSDWYrm 2484100594U, // VPACKSSDWYrr 2484100594U, // VPACKSSDWrm 2484100594U, // VPACKSSDWrr 2484094066U, // VPACKSSWBYrm 2484094066U, // VPACKSSWBYrr 2484094066U, // VPACKSSWBrm 2484094066U, // VPACKSSWBrr 2484100605U, // VPACKUSDWYrm 2484100605U, // VPACKUSDWYrr 2484100605U, // VPACKUSDWrm 2484100605U, // VPACKUSDWrr 2484094077U, // VPACKUSWBYrm 2484094077U, // VPACKUSWBYrr 2484094077U, // VPACKUSWBrm 2484094077U, // VPACKUSWBrr 2484093608U, // VPADDBYrm 2484093608U, // VPADDBYrr 2498773672U, // VPADDBZ128rm 2197832360U, // VPADDBZ128rmk 352338600U, // VPADDBZ128rmkz 2498773672U, // VPADDBZ128rr 2197832360U, // VPADDBZ128rrk 352338600U, // VPADDBZ128rrkz 2498773672U, // VPADDBZ256rm 2197832360U, // VPADDBZ256rmk 352338600U, // VPADDBZ256rmkz 2498773672U, // VPADDBZ256rr 2197832360U, // VPADDBZ256rrk 352338600U, // VPADDBZ256rrkz 2498773672U, // VPADDBZrm 2197832360U, // VPADDBZrmk 352338600U, // VPADDBZrmkz 2498773672U, // VPADDBZrr 2197832360U, // VPADDBZrrk 352338600U, // VPADDBZrrkz 2484093608U, // VPADDBrm 2484093608U, // VPADDBrr 2484094349U, // VPADDDYrm 2484094349U, // VPADDDYrr 2498774413U, // VPADDDZ128rm 2498774413U, // VPADDDZ128rmb 2197833101U, // VPADDDZ128rmbk 352339341U, // VPADDDZ128rmbkz 2197833101U, // VPADDDZ128rmk 352339341U, // VPADDDZ128rmkz 2498774413U, // VPADDDZ128rr 2197833101U, // VPADDDZ128rrk 352339341U, // VPADDDZ128rrkz 2498774413U, // VPADDDZ256rm 2498774413U, // VPADDDZ256rmb 2197833101U, // VPADDDZ256rmbk 352339341U, // VPADDDZ256rmbkz 2197833101U, // VPADDDZ256rmk 352339341U, // VPADDDZ256rmkz 2498774413U, // VPADDDZ256rr 2197833101U, // VPADDDZ256rrk 352339341U, // VPADDDZ256rrkz 2498774413U, // VPADDDZrm 2498774413U, // VPADDDZrmb 2197833101U, // VPADDDZrmbk 352339341U, // VPADDDZrmbkz 2197833101U, // VPADDDZrmk 352339341U, // VPADDDZrmkz 2498774413U, // VPADDDZrr 2197833101U, // VPADDDZrrk 352339341U, // VPADDDZrrkz 2484094349U, // VPADDDrm 2484094349U, // VPADDDrr 2484097697U, // VPADDQYrm 2484097697U, // VPADDQYrr 2498777761U, // VPADDQZ128rm 2498777761U, // VPADDQZ128rmb 2197836449U, // VPADDQZ128rmbk 352342689U, // VPADDQZ128rmbkz 2197836449U, // VPADDQZ128rmk 352342689U, // VPADDQZ128rmkz 2498777761U, // VPADDQZ128rr 2197836449U, // VPADDQZ128rrk 352342689U, // VPADDQZ128rrkz 2498777761U, // VPADDQZ256rm 2498777761U, // VPADDQZ256rmb 2197836449U, // VPADDQZ256rmbk 352342689U, // VPADDQZ256rmbkz 2197836449U, // VPADDQZ256rmk 352342689U, // VPADDQZ256rmkz 2498777761U, // VPADDQZ256rr 2197836449U, // VPADDQZ256rrk 352342689U, // VPADDQZ256rrkz 2498777761U, // VPADDQZrm 2498777761U, // VPADDQZrmb 2197836449U, // VPADDQZrmbk 352342689U, // VPADDQZrmbkz 2197836449U, // VPADDQZrmk 352342689U, // VPADDQZrmkz 2498777761U, // VPADDQZrr 2197836449U, // VPADDQZrrk 352342689U, // VPADDQZrrkz 2484097697U, // VPADDQrm 2484097697U, // VPADDQrr 2484093853U, // VPADDSBYrm 2484093853U, // VPADDSBYrr 2484093853U, // VPADDSBrm 2484093853U, // VPADDSBrr 2484100956U, // VPADDSWYrm 2484100956U, // VPADDSWYrr 2484100956U, // VPADDSWrm 2484100956U, // VPADDSWrr 2484093895U, // VPADDUSBYrm 2484093895U, // VPADDUSBYrr 2484093895U, // VPADDUSBrm 2484093895U, // VPADDUSBrr 2484101029U, // VPADDUSWYrm 2484101029U, // VPADDUSWYrr 2484101029U, // VPADDUSWrm 2484101029U, // VPADDUSWrr 2484100569U, // VPADDWYrm 2484100569U, // VPADDWYrr 2498780633U, // VPADDWZ128rm 2197839321U, // VPADDWZ128rmk 352345561U, // VPADDWZ128rmkz 2498780633U, // VPADDWZ128rr 2197839321U, // VPADDWZ128rrk 352345561U, // VPADDWZ128rrkz 2498780633U, // VPADDWZ256rm 2197839321U, // VPADDWZ256rmk 352345561U, // VPADDWZ256rmkz 2498780633U, // VPADDWZ256rr 2197839321U, // VPADDWZ256rrk 352345561U, // VPADDWZ256rrkz 2498780633U, // VPADDWZrm 2197839321U, // VPADDWZrmk 352345561U, // VPADDWZrmkz 2498780633U, // VPADDWZrr 2197839321U, // VPADDWZrrk 352345561U, // VPADDWZrrkz 2484100569U, // VPADDWrm 2484100569U, // VPADDWrr 2484098524U, // VPALIGNR128rm 2484098524U, // VPALIGNR128rr 2484098524U, // VPALIGNR256rm 2484098524U, // VPALIGNR256rr 2498774428U, // VPANDDZ128rm 2498774428U, // VPANDDZ128rmb 2197833116U, // VPANDDZ128rmbk 352339356U, // VPANDDZ128rmbkz 2197833116U, // VPANDDZ128rmk 352339356U, // VPANDDZ128rmkz 2498774428U, // VPANDDZ128rr 2197833116U, // VPANDDZ128rrk 352339356U, // VPANDDZ128rrkz 2498774428U, // VPANDDZ256rm 2498774428U, // VPANDDZ256rmb 2197833116U, // VPANDDZ256rmbk 352339356U, // VPANDDZ256rmbkz 2197833116U, // VPANDDZ256rmk 352339356U, // VPANDDZ256rmkz 2498774428U, // VPANDDZ256rr 2197833116U, // VPANDDZ256rrk 352339356U, // VPANDDZ256rrkz 2498774428U, // VPANDDZrm 2498774428U, // VPANDDZrmb 2197833116U, // VPANDDZrmbk 352339356U, // VPANDDZrmbkz 2197833116U, // VPANDDZrmk 352339356U, // VPANDDZrmkz 2498774428U, // VPANDDZrr 2197833116U, // VPANDDZrrk 352339356U, // VPANDDZrrkz 2498774692U, // VPANDNDZ128rm 2498774692U, // VPANDNDZ128rmb 2197833380U, // VPANDNDZ128rmbk 352339620U, // VPANDNDZ128rmbkz 2197833380U, // VPANDNDZ128rmk 352339620U, // VPANDNDZ128rmkz 2498774692U, // VPANDNDZ128rr 2197833380U, // VPANDNDZ128rrk 352339620U, // VPANDNDZ128rrkz 2498774692U, // VPANDNDZ256rm 2498774692U, // VPANDNDZ256rmb 2197833380U, // VPANDNDZ256rmbk 352339620U, // VPANDNDZ256rmbkz 2197833380U, // VPANDNDZ256rmk 352339620U, // VPANDNDZ256rmkz 2498774692U, // VPANDNDZ256rr 2197833380U, // VPANDNDZ256rrk 352339620U, // VPANDNDZ256rrkz 2498774692U, // VPANDNDZrm 2498774692U, // VPANDNDZrmb 2197833380U, // VPANDNDZrmbk 352339620U, // VPANDNDZrmbkz 2197833380U, // VPANDNDZrmk 352339620U, // VPANDNDZrmkz 2498774692U, // VPANDNDZrr 2197833380U, // VPANDNDZrrk 352339620U, // VPANDNDZrrkz 2498778137U, // VPANDNQZ128rm 2498778137U, // VPANDNQZ128rmb 2197836825U, // VPANDNQZ128rmbk 352343065U, // VPANDNQZ128rmbkz 2197836825U, // VPANDNQZ128rmk 352343065U, // VPANDNQZ128rmkz 2498778137U, // VPANDNQZ128rr 2197836825U, // VPANDNQZ128rrk 352343065U, // VPANDNQZ128rrkz 2498778137U, // VPANDNQZ256rm 2498778137U, // VPANDNQZ256rmb 2197836825U, // VPANDNQZ256rmbk 352343065U, // VPANDNQZ256rmbkz 2197836825U, // VPANDNQZ256rmk 352343065U, // VPANDNQZ256rmkz 2498778137U, // VPANDNQZ256rr 2197836825U, // VPANDNQZ256rrk 352343065U, // VPANDNQZ256rrkz 2498778137U, // VPANDNQZrm 2498778137U, // VPANDNQZrmb 2197836825U, // VPANDNQZrmbk 352343065U, // VPANDNQZrmbkz 2197836825U, // VPANDNQZrmk 352343065U, // VPANDNQZrmkz 2498778137U, // VPANDNQZrr 2197836825U, // VPANDNQZrrk 352343065U, // VPANDNQZrrkz 2484097196U, // VPANDNYrm 2484097196U, // VPANDNYrr 2484097196U, // VPANDNrm 2484097196U, // VPANDNrr 2498777837U, // VPANDQZ128rm 2498777837U, // VPANDQZ128rmb 2197836525U, // VPANDQZ128rmbk 352342765U, // VPANDQZ128rmbkz 2197836525U, // VPANDQZ128rmk 352342765U, // VPANDQZ128rmkz 2498777837U, // VPANDQZ128rr 2197836525U, // VPANDQZ128rrk 352342765U, // VPANDQZ128rrkz 2498777837U, // VPANDQZ256rm 2498777837U, // VPANDQZ256rmb 2197836525U, // VPANDQZ256rmbk 352342765U, // VPANDQZ256rmbkz 2197836525U, // VPANDQZ256rmk 352342765U, // VPANDQZ256rmkz 2498777837U, // VPANDQZ256rr 2197836525U, // VPANDQZ256rrk 352342765U, // VPANDQZ256rrkz 2498777837U, // VPANDQZrm 2498777837U, // VPANDQZrmb 2197836525U, // VPANDQZrmbk 352342765U, // VPANDQZrmbkz 2197836525U, // VPANDQZrmk 352342765U, // VPANDQZrmkz 2498777837U, // VPANDQZrr 2197836525U, // VPANDQZrrk 352342765U, // VPANDQZrrkz 2484094605U, // VPANDYrm 2484094605U, // VPANDYrr 2484094605U, // VPANDrm 2484094605U, // VPANDrr 2484093662U, // VPAVGBYrm 2484093662U, // VPAVGBYrr 2484093662U, // VPAVGBrm 2484093662U, // VPAVGBrr 2484100661U, // VPAVGWYrm 2484100661U, // VPAVGWYrr 2484100661U, // VPAVGWrm 2484100661U, // VPAVGWrr 2484094383U, // VPBLENDDYrmi 2484094383U, // VPBLENDDYrri 2484094383U, // VPBLENDDrmi 2484094383U, // VPBLENDDrri 420496135U, // VPBLENDMBZ128rm 2499822343U, // VPBLENDMBZ128rmk 352338695U, // VPBLENDMBZ128rmkz 2484093703U, // VPBLENDMBZ128rr 2499822343U, // VPBLENDMBZ128rrk 352338695U, // VPBLENDMBZ128rrkz 1292911367U, // VPBLENDMBZ256rm 2499822343U, // VPBLENDMBZ256rmk 352338695U, // VPBLENDMBZ256rmkz 2484093703U, // VPBLENDMBZ256rr 2499822343U, // VPBLENDMBZ256rrk 352338695U, // VPBLENDMBZ256rrkz 1326465799U, // VPBLENDMBZrm 2499822343U, // VPBLENDMBZrmk 352338695U, // VPBLENDMBZrmkz 2484093703U, // VPBLENDMBZrr 2499822343U, // VPBLENDMBZrrk 352338695U, // VPBLENDMBZrrkz 420496989U, // VPBLENDMDZ128rm 2484094557U, // VPBLENDMDZ128rmb 2499823197U, // VPBLENDMDZ128rmbk 2499823197U, // VPBLENDMDZ128rmk 352339549U, // VPBLENDMDZ128rmkz 2484094557U, // VPBLENDMDZ128rr 2499823197U, // VPBLENDMDZ128rrk 352339549U, // VPBLENDMDZ128rrkz 1292912221U, // VPBLENDMDZ256rm 2484094557U, // VPBLENDMDZ256rmb 2499823197U, // VPBLENDMDZ256rmbk 2499823197U, // VPBLENDMDZ256rmk 352339549U, // VPBLENDMDZ256rmkz 2484094557U, // VPBLENDMDZ256rr 2499823197U, // VPBLENDMDZ256rrk 352339549U, // VPBLENDMDZ256rrkz 1326466653U, // VPBLENDMDZrm 2484094557U, // VPBLENDMDZrmb 2499823197U, // VPBLENDMDZrmbk 2499823197U, // VPBLENDMDZrmk 352339549U, // VPBLENDMDZrmkz 2484094557U, // VPBLENDMDZrr 2499823197U, // VPBLENDMDZrrk 352339549U, // VPBLENDMDZrrkz 420500449U, // VPBLENDMQZ128rm 2484098017U, // VPBLENDMQZ128rmb 2499826657U, // VPBLENDMQZ128rmbk 2499826657U, // VPBLENDMQZ128rmk 352343009U, // VPBLENDMQZ128rmkz 2484098017U, // VPBLENDMQZ128rr 2499826657U, // VPBLENDMQZ128rrk 352343009U, // VPBLENDMQZ128rrkz 1292915681U, // VPBLENDMQZ256rm 2484098017U, // VPBLENDMQZ256rmb 2499826657U, // VPBLENDMQZ256rmbk 2499826657U, // VPBLENDMQZ256rmk 352343009U, // VPBLENDMQZ256rmkz 2484098017U, // VPBLENDMQZ256rr 2499826657U, // VPBLENDMQZ256rrk 352343009U, // VPBLENDMQZ256rrkz 1326470113U, // VPBLENDMQZrm 2484098017U, // VPBLENDMQZrmb 2499826657U, // VPBLENDMQZrmbk 2499826657U, // VPBLENDMQZrmk 352343009U, // VPBLENDMQZrmkz 2484098017U, // VPBLENDMQZrr 2499826657U, // VPBLENDMQZrrk 352343009U, // VPBLENDMQZrrkz 420503191U, // VPBLENDMWZ128rm 2499829399U, // VPBLENDMWZ128rmk 352345751U, // VPBLENDMWZ128rmkz 2484100759U, // VPBLENDMWZ128rr 2499829399U, // VPBLENDMWZ128rrk 352345751U, // VPBLENDMWZ128rrkz 1292918423U, // VPBLENDMWZ256rm 2499829399U, // VPBLENDMWZ256rmk 352345751U, // VPBLENDMWZ256rmkz 2484100759U, // VPBLENDMWZ256rr 2499829399U, // VPBLENDMWZ256rrk 352345751U, // VPBLENDMWZ256rrkz 1326472855U, // VPBLENDMWZrm 2499829399U, // VPBLENDMWZrmk 352345751U, // VPBLENDMWZrmkz 2484100759U, // VPBLENDMWZrr 2499829399U, // VPBLENDMWZrrk 352345751U, // VPBLENDMWZrrkz 2484094035U, // VPBLENDVBYrm 2484094035U, // VPBLENDVBYrr 2484094035U, // VPBLENDVBrm 2484094035U, // VPBLENDVBrr 2484100584U, // VPBLENDWYrmi 2484100584U, // VPBLENDWYrri 2484100584U, // VPBLENDWrmi 2484100584U, // VPBLENDWrri 504382473U, // VPBROADCASTBYrm 336610313U, // VPBROADCASTBYrr 351290377U, // VPBROADCASTBrZ128r 2197832713U, // VPBROADCASTBrZ128rk 352338953U, // VPBROADCASTBrZ128rkz 351290377U, // VPBROADCASTBrZ256r 2197832713U, // VPBROADCASTBrZ256rk 352338953U, // VPBROADCASTBrZ256rkz 351290377U, // VPBROADCASTBrZr 2197832713U, // VPBROADCASTBrZrk 352338953U, // VPBROADCASTBrZrkz 504382473U, // VPBROADCASTBrm 336610313U, // VPBROADCASTBrr 303058113U, // VPBROADCASTDYrm 336612545U, // VPBROADCASTDYrr 352341185U, // VPBROADCASTDZkrm 352341185U, // VPBROADCASTDZkrr 303058113U, // VPBROADCASTDZrm 336612545U, // VPBROADCASTDZrr 351292609U, // VPBROADCASTDrZ128r 2197834945U, // VPBROADCASTDrZ128rk 352341185U, // VPBROADCASTDrZ128rkz 351292609U, // VPBROADCASTDrZ256r 2197834945U, // VPBROADCASTDrZ256rk 352341185U, // VPBROADCASTDrZ256rkz 351292609U, // VPBROADCASTDrZr 2197834945U, // VPBROADCASTDrZrk 352341185U, // VPBROADCASTDrZrkz 303058113U, // VPBROADCASTDrm 336612545U, // VPBROADCASTDrr 336613861U, // VPBROADCASTMB2QZ128rr 336613861U, // VPBROADCASTMB2QZ256rr 336613861U, // VPBROADCASTMB2QZrr 336610566U, // VPBROADCASTMW2DZ128rr 336610566U, // VPBROADCASTMW2DZ256rr 336610566U, // VPBROADCASTMW2DZrr 370169107U, // VPBROADCASTQYrm 336614675U, // VPBROADCASTQYrr 352343315U, // VPBROADCASTQZkrm 352343315U, // VPBROADCASTQZkrr 370169107U, // VPBROADCASTQZrm 336614675U, // VPBROADCASTQZrr 351294739U, // VPBROADCASTQrZ128r 2197837075U, // VPBROADCASTQrZ128rk 352343315U, // VPBROADCASTQrZ128rkz 351294739U, // VPBROADCASTQrZ256r 2197837075U, // VPBROADCASTQrZ256rk 352343315U, // VPBROADCASTQrZ256rkz 351294739U, // VPBROADCASTQrZr 2197837075U, // VPBROADCASTQrZrk 352343315U, // VPBROADCASTQrZrkz 370169107U, // VPBROADCASTQrm 336614675U, // VPBROADCASTQrr 470835160U, // VPBROADCASTWYrm 336617432U, // VPBROADCASTWYrr 351297496U, // VPBROADCASTWrZ128r 2197839832U, // VPBROADCASTWrZ128rk 352346072U, // VPBROADCASTWrZ128rkz 351297496U, // VPBROADCASTWrZ256r 2197839832U, // VPBROADCASTWrZ256rk 352346072U, // VPBROADCASTWrZ256rkz 351297496U, // VPBROADCASTWrZr 2197839832U, // VPBROADCASTWrZrk 352346072U, // VPBROADCASTWrZrkz 470835160U, // VPBROADCASTWrm 336617432U, // VPBROADCASTWrr 2484097818U, // VPCLMULQDQrm 2484097818U, // VPCLMULQDQrr 2484100388U, // VPCMOVmr 2484100388U, // VPCMOVmrY 2484100388U, // VPCMOVrm 2484100388U, // VPCMOVrmY 2484100388U, // VPCMOVrr 2484100388U, // VPCMOVrrY 1262840219U, // VPCMPBZ128rmi 2484093739U, // VPCMPBZ128rmi_alt 3511396763U, // VPCMPBZ128rmik 2499822379U, // VPCMPBZ128rmik_alt 1262856603U, // VPCMPBZ128rri 2484093739U, // VPCMPBZ128rri_alt 1363929499U, // VPCMPBZ128rrik 2499822379U, // VPCMPBZ128rrik_alt 1262840219U, // VPCMPBZ256rmi 2484093739U, // VPCMPBZ256rmi_alt 3511396763U, // VPCMPBZ256rmik 2499822379U, // VPCMPBZ256rmik_alt 1262856603U, // VPCMPBZ256rri 2484093739U, // VPCMPBZ256rri_alt 1363929499U, // VPCMPBZ256rrik 2499822379U, // VPCMPBZ256rrik_alt 1262840219U, // VPCMPBZrmi 2484093739U, // VPCMPBZrmi_alt 1363913115U, // VPCMPBZrmik 2499822379U, // VPCMPBZrmik_alt 1262856603U, // VPCMPBZrri 2484093739U, // VPCMPBZrri_alt 1363929499U, // VPCMPBZrrik 2499822379U, // VPCMPBZrrik_alt 1263888795U, // VPCMPDZ128rmi 2484095337U, // VPCMPDZ128rmi_alt 1263888795U, // VPCMPDZ128rmib 2484095337U, // VPCMPDZ128rmib_alt 3512445339U, // VPCMPDZ128rmibk 2499823977U, // VPCMPDZ128rmibk_alt 3512445339U, // VPCMPDZ128rmik 2499823977U, // VPCMPDZ128rmik_alt 1263905179U, // VPCMPDZ128rri 2484095337U, // VPCMPDZ128rri_alt 1364978075U, // VPCMPDZ128rrik 2499823977U, // VPCMPDZ128rrik_alt 1263888795U, // VPCMPDZ256rmi 2484095337U, // VPCMPDZ256rmi_alt 1263888795U, // VPCMPDZ256rmib 2484095337U, // VPCMPDZ256rmib_alt 3512445339U, // VPCMPDZ256rmibk 2499823977U, // VPCMPDZ256rmibk_alt 3512445339U, // VPCMPDZ256rmik 2499823977U, // VPCMPDZ256rmik_alt 1263905179U, // VPCMPDZ256rri 2484095337U, // VPCMPDZ256rri_alt 1364978075U, // VPCMPDZ256rrik 2499823977U, // VPCMPDZ256rrik_alt 1263888795U, // VPCMPDZrmi 2484095337U, // VPCMPDZrmi_alt 1263888795U, // VPCMPDZrmib 2484095337U, // VPCMPDZrmib_alt 3512445339U, // VPCMPDZrmibk 2499823977U, // VPCMPDZrmibk_alt 1364961691U, // VPCMPDZrmik 2499823977U, // VPCMPDZrmik_alt 1263905179U, // VPCMPDZrri 2484095337U, // VPCMPDZrri_alt 1364978075U, // VPCMPDZrrik 2499823977U, // VPCMPDZrrik_alt 2484093747U, // VPCMPEQBYrm 2484093747U, // VPCMPEQBYrr 2484093747U, // VPCMPEQBZ128rm 2499822387U, // VPCMPEQBZ128rmk 2484093747U, // VPCMPEQBZ128rr 2499822387U, // VPCMPEQBZ128rrk 2484093747U, // VPCMPEQBZ256rm 2499822387U, // VPCMPEQBZ256rmk 2484093747U, // VPCMPEQBZ256rr 2499822387U, // VPCMPEQBZ256rrk 2484093747U, // VPCMPEQBZrm 2499822387U, // VPCMPEQBZrmk 2484093747U, // VPCMPEQBZrr 2499822387U, // VPCMPEQBZrrk 2484093747U, // VPCMPEQBrm 2484093747U, // VPCMPEQBrr 2484095535U, // VPCMPEQDYrm 2484095535U, // VPCMPEQDYrr 2484095535U, // VPCMPEQDZ128rm 2484095535U, // VPCMPEQDZ128rmb 2499824175U, // VPCMPEQDZ128rmbk 2499824175U, // VPCMPEQDZ128rmk 2484095535U, // VPCMPEQDZ128rr 2499824175U, // VPCMPEQDZ128rrk 2484095535U, // VPCMPEQDZ256rm 2484095535U, // VPCMPEQDZ256rmb 2499824175U, // VPCMPEQDZ256rmbk 2499824175U, // VPCMPEQDZ256rmk 2484095535U, // VPCMPEQDZ256rr 2499824175U, // VPCMPEQDZ256rrk 2484095535U, // VPCMPEQDZrm 2484095535U, // VPCMPEQDZrmb 2499824175U, // VPCMPEQDZrmbk 2499824175U, // VPCMPEQDZrmk 2484095535U, // VPCMPEQDZrr 2499824175U, // VPCMPEQDZrrk 2484095535U, // VPCMPEQDrm 2484095535U, // VPCMPEQDrr 2484098099U, // VPCMPEQQYrm 2484098099U, // VPCMPEQQYrr 2484098099U, // VPCMPEQQZ128rm 2484098099U, // VPCMPEQQZ128rmb 2499826739U, // VPCMPEQQZ128rmbk 2499826739U, // VPCMPEQQZ128rmk 2484098099U, // VPCMPEQQZ128rr 2499826739U, // VPCMPEQQZ128rrk 2484098099U, // VPCMPEQQZ256rm 2484098099U, // VPCMPEQQZ256rmb 2499826739U, // VPCMPEQQZ256rmbk 2499826739U, // VPCMPEQQZ256rmk 2484098099U, // VPCMPEQQZ256rr 2499826739U, // VPCMPEQQZ256rrk 2484098099U, // VPCMPEQQZrm 2484098099U, // VPCMPEQQZrmb 2499826739U, // VPCMPEQQZrmbk 2499826739U, // VPCMPEQQZrmk 2484098099U, // VPCMPEQQZrr 2499826739U, // VPCMPEQQZrrk 2484098099U, // VPCMPEQQrm 2484098099U, // VPCMPEQQrr 2484100803U, // VPCMPEQWYrm 2484100803U, // VPCMPEQWYrr 2484100803U, // VPCMPEQWZ128rm 2499829443U, // VPCMPEQWZ128rmk 2484100803U, // VPCMPEQWZ128rr 2499829443U, // VPCMPEQWZ128rrk 2484100803U, // VPCMPEQWZ256rm 2499829443U, // VPCMPEQWZ256rmk 2484100803U, // VPCMPEQWZ256rr 2499829443U, // VPCMPEQWZ256rrk 2484100803U, // VPCMPEQWZrm 2499829443U, // VPCMPEQWZrmk 2484100803U, // VPCMPEQWZrr 2499829443U, // VPCMPEQWZrrk 2484100803U, // VPCMPEQWrm 2484100803U, // VPCMPEQWrr 0U, // VPCMPESTRIMEM 0U, // VPCMPESTRIREG 2584760168U, // VPCMPESTRIrm 2484096872U, // VPCMPESTRIrr 0U, // VPCMPESTRM128MEM 0U, // VPCMPESTRM128REG 2584760468U, // VPCMPESTRM128rm 2484097172U, // VPCMPESTRM128rr 2484093936U, // VPCMPGTBYrm 2484093936U, // VPCMPGTBYrr 2484093936U, // VPCMPGTBZ128rm 2499822576U, // VPCMPGTBZ128rmk 2484093936U, // VPCMPGTBZ128rr 2499822576U, // VPCMPGTBZ128rrk 2484093936U, // VPCMPGTBZ256rm 2499822576U, // VPCMPGTBZ256rmk 2484093936U, // VPCMPGTBZ256rr 2499822576U, // VPCMPGTBZ256rrk 2484093936U, // VPCMPGTBZrm 2499822576U, // VPCMPGTBZrmk 2484093936U, // VPCMPGTBZrr 2499822576U, // VPCMPGTBZrrk 2484093936U, // VPCMPGTBrm 2484093936U, // VPCMPGTBrr 2484096158U, // VPCMPGTDYrm 2484096158U, // VPCMPGTDYrr 2484096158U, // VPCMPGTDZ128rm 2484096158U, // VPCMPGTDZ128rmb 2499824798U, // VPCMPGTDZ128rmbk 2499824798U, // VPCMPGTDZ128rmk 2484096158U, // VPCMPGTDZ128rr 2499824798U, // VPCMPGTDZ128rrk 2484096158U, // VPCMPGTDZ256rm 2484096158U, // VPCMPGTDZ256rmb 2499824798U, // VPCMPGTDZ256rmbk 2499824798U, // VPCMPGTDZ256rmk 2484096158U, // VPCMPGTDZ256rr 2499824798U, // VPCMPGTDZ256rrk 2484096158U, // VPCMPGTDZrm 2484096158U, // VPCMPGTDZrmb 2499824798U, // VPCMPGTDZrmbk 2499824798U, // VPCMPGTDZrmk 2484096158U, // VPCMPGTDZrr 2499824798U, // VPCMPGTDZrrk 2484096158U, // VPCMPGTDrm 2484096158U, // VPCMPGTDrr 2484098271U, // VPCMPGTQYrm 2484098271U, // VPCMPGTQYrr 2484098271U, // VPCMPGTQZ128rm 2484098271U, // VPCMPGTQZ128rmb 2499826911U, // VPCMPGTQZ128rmbk 2499826911U, // VPCMPGTQZ128rmk 2484098271U, // VPCMPGTQZ128rr 2499826911U, // VPCMPGTQZ128rrk 2484098271U, // VPCMPGTQZ256rm 2484098271U, // VPCMPGTQZ256rmb 2499826911U, // VPCMPGTQZ256rmbk 2499826911U, // VPCMPGTQZ256rmk 2484098271U, // VPCMPGTQZ256rr 2499826911U, // VPCMPGTQZ256rrk 2484098271U, // VPCMPGTQZrm 2484098271U, // VPCMPGTQZrmb 2499826911U, // VPCMPGTQZrmbk 2499826911U, // VPCMPGTQZrmk 2484098271U, // VPCMPGTQZrr 2499826911U, // VPCMPGTQZrrk 2484098271U, // VPCMPGTQrm 2484098271U, // VPCMPGTQrr 2484101055U, // VPCMPGTWYrm 2484101055U, // VPCMPGTWYrr 2484101055U, // VPCMPGTWZ128rm 2499829695U, // VPCMPGTWZ128rmk 2484101055U, // VPCMPGTWZ128rr 2499829695U, // VPCMPGTWZ128rrk 2484101055U, // VPCMPGTWZ256rm 2499829695U, // VPCMPGTWZ256rmk 2484101055U, // VPCMPGTWZ256rr 2499829695U, // VPCMPGTWZ256rrk 2484101055U, // VPCMPGTWZrm 2499829695U, // VPCMPGTWZrmk 2484101055U, // VPCMPGTWZrr 2499829695U, // VPCMPGTWZrrk 2484101055U, // VPCMPGTWrm 2484101055U, // VPCMPGTWrr 0U, // VPCMPISTRIMEM 0U, // VPCMPISTRIREG 2584760180U, // VPCMPISTRIrm 2484096884U, // VPCMPISTRIrr 0U, // VPCMPISTRM128MEM 0U, // VPCMPISTRM128REG 2584760480U, // VPCMPISTRM128rm 2484097184U, // VPCMPISTRM128rr 1264937371U, // VPCMPQZ128rmi 2484098091U, // VPCMPQZ128rmi_alt 1264937371U, // VPCMPQZ128rmib 2484098091U, // VPCMPQZ128rmib_alt 1366010267U, // VPCMPQZ128rmibk 2499826731U, // VPCMPQZ128rmibk_alt 3513493915U, // VPCMPQZ128rmik 2499826731U, // VPCMPQZ128rmik_alt 1264953755U, // VPCMPQZ128rri 2484098091U, // VPCMPQZ128rri_alt 1366026651U, // VPCMPQZ128rrik 2499826731U, // VPCMPQZ128rrik_alt 1264937371U, // VPCMPQZ256rmi 2484098091U, // VPCMPQZ256rmi_alt 1264937371U, // VPCMPQZ256rmib 2484098091U, // VPCMPQZ256rmib_alt 1366010267U, // VPCMPQZ256rmibk 2499826731U, // VPCMPQZ256rmibk_alt 3513493915U, // VPCMPQZ256rmik 2499826731U, // VPCMPQZ256rmik_alt 1264953755U, // VPCMPQZ256rri 2484098091U, // VPCMPQZ256rri_alt 1366026651U, // VPCMPQZ256rrik 2499826731U, // VPCMPQZ256rrik_alt 1264937371U, // VPCMPQZrmi 2484098091U, // VPCMPQZrmi_alt 1264937371U, // VPCMPQZrmib 2484098091U, // VPCMPQZrmib_alt 1366010267U, // VPCMPQZrmibk 2499826731U, // VPCMPQZrmibk_alt 1366010267U, // VPCMPQZrmik 2499826731U, // VPCMPQZrmik_alt 1264953755U, // VPCMPQZrri 2484098091U, // VPCMPQZrri_alt 1366026651U, // VPCMPQZrrik 2499826731U, // VPCMPQZrrik_alt 1265985947U, // VPCMPUBZ128rmi 2484094003U, // VPCMPUBZ128rmi_alt 3514542491U, // VPCMPUBZ128rmik 2499822643U, // VPCMPUBZ128rmik_alt 1266002331U, // VPCMPUBZ128rri 2484094003U, // VPCMPUBZ128rri_alt 1367075227U, // VPCMPUBZ128rrik 2499822643U, // VPCMPUBZ128rrik_alt 1265985947U, // VPCMPUBZ256rmi 2484094003U, // VPCMPUBZ256rmi_alt 3514542491U, // VPCMPUBZ256rmik 2499822643U, // VPCMPUBZ256rmik_alt 1266002331U, // VPCMPUBZ256rri 2484094003U, // VPCMPUBZ256rri_alt 1367075227U, // VPCMPUBZ256rrik 2499822643U, // VPCMPUBZ256rrik_alt 1265985947U, // VPCMPUBZrmi 2484094003U, // VPCMPUBZrmi_alt 1367058843U, // VPCMPUBZrmik 2499822643U, // VPCMPUBZrmik_alt 1266002331U, // VPCMPUBZrri 2484094003U, // VPCMPUBZrri_alt 1367075227U, // VPCMPUBZrrik 2499822643U, // VPCMPUBZrrik_alt 1267034523U, // VPCMPUDZ128rmi 2484096235U, // VPCMPUDZ128rmi_alt 1267034523U, // VPCMPUDZ128rmib 2484096235U, // VPCMPUDZ128rmib_alt 3515591067U, // VPCMPUDZ128rmibk 2499824875U, // VPCMPUDZ128rmibk_alt 3515591067U, // VPCMPUDZ128rmik 2499824875U, // VPCMPUDZ128rmik_alt 1267050907U, // VPCMPUDZ128rri 2484096235U, // VPCMPUDZ128rri_alt 1368123803U, // VPCMPUDZ128rrik 2499824875U, // VPCMPUDZ128rrik_alt 1267034523U, // VPCMPUDZ256rmi 2484096235U, // VPCMPUDZ256rmi_alt 1267034523U, // VPCMPUDZ256rmib 2484096235U, // VPCMPUDZ256rmib_alt 3515591067U, // VPCMPUDZ256rmibk 2499824875U, // VPCMPUDZ256rmibk_alt 3515591067U, // VPCMPUDZ256rmik 2499824875U, // VPCMPUDZ256rmik_alt 1267050907U, // VPCMPUDZ256rri 2484096235U, // VPCMPUDZ256rri_alt 1368123803U, // VPCMPUDZ256rrik 2499824875U, // VPCMPUDZ256rrik_alt 1267034523U, // VPCMPUDZrmi 2484096235U, // VPCMPUDZrmi_alt 1267034523U, // VPCMPUDZrmib 2484096235U, // VPCMPUDZrmib_alt 3515591067U, // VPCMPUDZrmibk 2499824875U, // VPCMPUDZrmibk_alt 1368107419U, // VPCMPUDZrmik 2499824875U, // VPCMPUDZrmik_alt 1267050907U, // VPCMPUDZrri 2484096235U, // VPCMPUDZrri_alt 1368123803U, // VPCMPUDZrrik 2499824875U, // VPCMPUDZrrik_alt 1268083099U, // VPCMPUQZ128rmi 2484098365U, // VPCMPUQZ128rmi_alt 1268083099U, // VPCMPUQZ128rmib 2484098365U, // VPCMPUQZ128rmib_alt 1369155995U, // VPCMPUQZ128rmibk 2499827005U, // VPCMPUQZ128rmibk_alt 3516639643U, // VPCMPUQZ128rmik 2499827005U, // VPCMPUQZ128rmik_alt 1268099483U, // VPCMPUQZ128rri 2484098365U, // VPCMPUQZ128rri_alt 1369172379U, // VPCMPUQZ128rrik 2499827005U, // VPCMPUQZ128rrik_alt 1268083099U, // VPCMPUQZ256rmi 2484098365U, // VPCMPUQZ256rmi_alt 1268083099U, // VPCMPUQZ256rmib 2484098365U, // VPCMPUQZ256rmib_alt 1369155995U, // VPCMPUQZ256rmibk 2499827005U, // VPCMPUQZ256rmibk_alt 3516639643U, // VPCMPUQZ256rmik 2499827005U, // VPCMPUQZ256rmik_alt 1268099483U, // VPCMPUQZ256rri 2484098365U, // VPCMPUQZ256rri_alt 1369172379U, // VPCMPUQZ256rrik 2499827005U, // VPCMPUQZ256rrik_alt 1268083099U, // VPCMPUQZrmi 2484098365U, // VPCMPUQZrmi_alt 1268083099U, // VPCMPUQZrmib 2484098365U, // VPCMPUQZrmib_alt 1369155995U, // VPCMPUQZrmibk 2499827005U, // VPCMPUQZrmibk_alt 1369155995U, // VPCMPUQZrmik 2499827005U, // VPCMPUQZrmik_alt 1268099483U, // VPCMPUQZrri 2484098365U, // VPCMPUQZrri_alt 1369172379U, // VPCMPUQZrrik 2499827005U, // VPCMPUQZrrik_alt 1269131675U, // VPCMPUWZ128rmi 2484101132U, // VPCMPUWZ128rmi_alt 3517688219U, // VPCMPUWZ128rmik 2499829772U, // VPCMPUWZ128rmik_alt 1269148059U, // VPCMPUWZ128rri 2484101132U, // VPCMPUWZ128rri_alt 1370220955U, // VPCMPUWZ128rrik 2499829772U, // VPCMPUWZ128rrik_alt 1269131675U, // VPCMPUWZ256rmi 2484101132U, // VPCMPUWZ256rmi_alt 3517688219U, // VPCMPUWZ256rmik 2499829772U, // VPCMPUWZ256rmik_alt 1269148059U, // VPCMPUWZ256rri 2484101132U, // VPCMPUWZ256rri_alt 1370220955U, // VPCMPUWZ256rrik 2499829772U, // VPCMPUWZ256rrik_alt 1269131675U, // VPCMPUWZrmi 2484101132U, // VPCMPUWZrmi_alt 1370204571U, // VPCMPUWZrmik 2499829772U, // VPCMPUWZrmik_alt 1269148059U, // VPCMPUWZrri 2484101132U, // VPCMPUWZrri_alt 1370220955U, // VPCMPUWZrrik 2499829772U, // VPCMPUWZrrik_alt 1270180251U, // VPCMPWZ128rmi 2484100795U, // VPCMPWZ128rmi_alt 3518736795U, // VPCMPWZ128rmik 2499829435U, // VPCMPWZ128rmik_alt 1270196635U, // VPCMPWZ128rri 2484100795U, // VPCMPWZ128rri_alt 1371269531U, // VPCMPWZ128rrik 2499829435U, // VPCMPWZ128rrik_alt 1270180251U, // VPCMPWZ256rmi 2484100795U, // VPCMPWZ256rmi_alt 3518736795U, // VPCMPWZ256rmik 2499829435U, // VPCMPWZ256rmik_alt 1270196635U, // VPCMPWZ256rri 2484100795U, // VPCMPWZ256rri_alt 1371269531U, // VPCMPWZ256rrik 2499829435U, // VPCMPWZ256rrik_alt 1270180251U, // VPCMPWZrmi 2484100795U, // VPCMPWZrmi_alt 1371253147U, // VPCMPWZrmik 2499829435U, // VPCMPWZrmik_alt 1270196635U, // VPCMPWZrri 2484100795U, // VPCMPWZrri_alt 1371269531U, // VPCMPWZrrik 2499829435U, // VPCMPWZrrik_alt 1263282505U, // VPCOMBmi 2484093714U, // VPCOMBmi_alt 1263298889U, // VPCOMBri 2484093714U, // VPCOMBri_alt 1264331081U, // VPCOMDmi 2484094579U, // VPCOMDmi_alt 1264347465U, // VPCOMDri 2484094579U, // VPCOMDri_alt 2164526138U, // VPCOMPRESSDZ128mrk 2197834810U, // VPCOMPRESSDZ128rrk 352341050U, // VPCOMPRESSDZ128rrkz 2164984890U, // VPCOMPRESSDZ256mrk 2197834810U, // VPCOMPRESSDZ256rrk 352341050U, // VPCOMPRESSDZ256rrkz 2165001274U, // VPCOMPRESSDZmrk 2197834810U, // VPCOMPRESSDZrrk 352341050U, // VPCOMPRESSDZrrkz 2164528309U, // VPCOMPRESSQZ128mrk 2197836981U, // VPCOMPRESSQZ128rrk 352343221U, // VPCOMPRESSQZ128rrkz 2164987061U, // VPCOMPRESSQZ256mrk 2197836981U, // VPCOMPRESSQZ256rrk 352343221U, // VPCOMPRESSQZ256rrkz 2165003445U, // VPCOMPRESSQZmrk 2197836981U, // VPCOMPRESSQZrrk 352343221U, // VPCOMPRESSQZrrkz 1265379657U, // VPCOMQmi 2484098039U, // VPCOMQmi_alt 1265396041U, // VPCOMQri 2484098039U, // VPCOMQri_alt 1266428233U, // VPCOMUBmi 2484093985U, // VPCOMUBmi_alt 1266444617U, // VPCOMUBri 2484093985U, // VPCOMUBri_alt 1267476809U, // VPCOMUDmi 2484096217U, // VPCOMUDmi_alt 1267493193U, // VPCOMUDri 2484096217U, // VPCOMUDri_alt 1268525385U, // VPCOMUQmi 2484098347U, // VPCOMUQmi_alt 1268541769U, // VPCOMUQri 2484098347U, // VPCOMUQri_alt 1269573961U, // VPCOMUWmi 2484101114U, // VPCOMUWmi_alt 1269590345U, // VPCOMUWri 2484101114U, // VPCOMUWri_alt 1270622537U, // VPCOMWmi 2484100770U, // VPCOMWmi_alt 1270638921U, // VPCOMWri 2484100770U, // VPCOMWri_alt 1007701137U, // VPCONFLICTDrm 303058065U, // VPCONFLICTDrmb 2197834897U, // VPCONFLICTDrmbk 352341137U, // VPCONFLICTDrmbkz 2197834897U, // VPCONFLICTDrmk 352341137U, // VPCONFLICTDrmkz 336612497U, // VPCONFLICTDrr 2197834897U, // VPCONFLICTDrrk 352341137U, // VPCONFLICTDrrkz 1007703250U, // VPCONFLICTQrm 2517652690U, // VPCONFLICTQrmb 2197837010U, // VPCONFLICTQrmbk 352343250U, // VPCONFLICTQrmbkz 2197837010U, // VPCONFLICTQrmk 352343250U, // VPCONFLICTQrmkz 336614610U, // VPCONFLICTQrr 2197837010U, // VPCONFLICTQrrk 352343250U, // VPCONFLICTQrrkz 2484093367U, // VPERM2F128rm 2484093367U, // VPERM2F128rr 2484093422U, // VPERM2I128rm 2484093422U, // VPERM2I128rr 2484094587U, // VPERMDYrm 2484094587U, // VPERMDYrr 2484094587U, // VPERMDZrm 2484094587U, // VPERMDZrr 2182104296U, // VPERMI2Drm 2197832936U, // VPERMI2Drmk 50349288U, // VPERMI2Drmkz 2182104296U, // VPERMI2Drr 2197832936U, // VPERMI2Drrk 50349288U, // VPERMI2Drrkz 2182104946U, // VPERMI2PDrm 2197833586U, // VPERMI2PDrmk 50349938U, // VPERMI2PDrmkz 2182104946U, // VPERMI2PDrr 2197833586U, // VPERMI2PDrrk 50349938U, // VPERMI2PDrrkz 2182109015U, // VPERMI2PSrm 2197837655U, // VPERMI2PSrmk 50354007U, // VPERMI2PSrmkz 2182109015U, // VPERMI2PSrr 2197837655U, // VPERMI2PSrrk 50354007U, // VPERMI2PSrrkz 2182107638U, // VPERMI2Qrm 2197836278U, // VPERMI2Qrmk 50352630U, // VPERMI2Qrmkz 2182107638U, // VPERMI2Qrr 2197836278U, // VPERMI2Qrrk 50352630U, // VPERMI2Qrrkz 2484094855U, // VPERMIL2PDmr 2484094855U, // VPERMIL2PDmrY 2484094855U, // VPERMIL2PDrm 2484094855U, // VPERMIL2PDrmY 2484094855U, // VPERMIL2PDrr 2484094855U, // VPERMIL2PDrrY 2484098924U, // VPERMIL2PSmr 2484098924U, // VPERMIL2PSmrY 2484098924U, // VPERMIL2PSrm 2484098924U, // VPERMIL2PSrmY 2484098924U, // VPERMIL2PSrr 2484098924U, // VPERMIL2PSrrY 3188738370U, // VPERMILPDYmi 2484095298U, // VPERMILPDYri 2484095298U, // VPERMILPDYrm 2484095298U, // VPERMILPDYrr 3222292802U, // VPERMILPDZmi 2484095298U, // VPERMILPDZri 2484095298U, // VPERMILPDZrm 2484095298U, // VPERMILPDZrr 2685421890U, // VPERMILPDmi 2484095298U, // VPERMILPDri 2484095298U, // VPERMILPDrm 2484095298U, // VPERMILPDrr 3188742440U, // VPERMILPSYmi 2484099368U, // VPERMILPSYri 2484099368U, // VPERMILPSYrm 2484099368U, // VPERMILPSYrr 3222296872U, // VPERMILPSZmi 2484099368U, // VPERMILPSZri 2484099368U, // VPERMILPSZrm 2484099368U, // VPERMILPSZrr 2685425960U, // VPERMILPSmi 2484099368U, // VPERMILPSri 2484099368U, // VPERMILPSrm 2484099368U, // VPERMILPSrr 3121629564U, // VPERMPDYmi 2484095356U, // VPERMPDYri 3222292860U, // VPERMPDZmi 2484095356U, // VPERMPDZri 2484095356U, // VPERMPDZrm 2484095356U, // VPERMPDZrr 2484099418U, // VPERMPSYrm 2484099418U, // VPERMPSYrr 2484099418U, // VPERMPSZrm 2484099418U, // VPERMPSZrr 3121632255U, // VPERMQYmi 2484098047U, // VPERMQYri 3155186687U, // VPERMQZmi 2484098047U, // VPERMQZri 2484098047U, // VPERMQZrm 2484098047U, // VPERMQZrr 2182104316U, // VPERMT2Drm 2197832956U, // VPERMT2Drmk 50349308U, // VPERMT2Drmkz 2182104316U, // VPERMT2Drr 2197832956U, // VPERMT2Drrk 50349308U, // VPERMT2Drrkz 2182105022U, // VPERMT2PDrm 2197833662U, // VPERMT2PDrmk 50350014U, // VPERMT2PDrmkz 2182105022U, // VPERMT2PDrr 2197833662U, // VPERMT2PDrrk 50350014U, // VPERMT2PDrrkz 2182109080U, // VPERMT2PSrm 2197837720U, // VPERMT2PSrmk 50354072U, // VPERMT2PSrmkz 2182109080U, // VPERMT2PSrr 2197837720U, // VPERMT2PSrrk 50354072U, // VPERMT2PSrrkz 2182107667U, // VPERMT2Qrm 2197836307U, // VPERMT2Qrmk 50352659U, // VPERMT2Qrmkz 2182107667U, // VPERMT2Qrr 2197836307U, // VPERMT2Qrrk 50352659U, // VPERMT2Qrrkz 2197833124U, // VPEXPANDDZ128rmk 352339364U, // VPEXPANDDZ128rmkz 2197833124U, // VPEXPANDDZ128rrk 352339364U, // VPEXPANDDZ128rrkz 2197833124U, // VPEXPANDDZ256rmk 352339364U, // VPEXPANDDZ256rmkz 2197833124U, // VPEXPANDDZ256rrk 352339364U, // VPEXPANDDZ256rrkz 2197833124U, // VPEXPANDDZrmk 352339364U, // VPEXPANDDZrmkz 2197833124U, // VPEXPANDDZrrk 352339364U, // VPEXPANDDZrrkz 2197836533U, // VPEXPANDQZ128rmk 352342773U, // VPEXPANDQZ128rmkz 2197836533U, // VPEXPANDQZ128rrk 352342773U, // VPEXPANDQZ128rrkz 2197836533U, // VPEXPANDQZ256rmk 352342773U, // VPEXPANDQZ256rmkz 2197836533U, // VPEXPANDQZ256rrk 352342773U, // VPEXPANDQZ256rrkz 2197836533U, // VPEXPANDQZrmk 352342773U, // VPEXPANDQZrmkz 2197836533U, // VPEXPANDQZrrk 352342773U, // VPEXPANDQZrrkz 2148631427U, // VPEXTRBmr 2484093827U, // VPEXTRBrr 2148600493U, // VPEXTRDmr 2484095661U, // VPEXTRDrr 2148619405U, // VPEXTRQmr 2484098189U, // VPEXTRQrr 2148572962U, // VPEXTRWmr 2484100898U, // VPEXTRWri 2484100898U, // VPEXTRWrr_REV 1209025977U, // VPGATHERDDYrm 1191200185U, // VPGATHERDDZrm 1209025977U, // VPGATHERDDrm 1141920550U, // VPGATHERDQYrm 3338687270U, // VPGATHERDQZrm 1141920550U, // VPGATHERDQrm 1209027129U, // VPGATHERQDYrm 3338684985U, // VPGATHERQDZrm 1209027129U, // VPGATHERQDrm 1141920829U, // VPGATHERQQYrm 3338687549U, // VPGATHERQQZrm 1141920829U, // VPGATHERQQrm 437273908U, // VPHADDBDrm 336610612U, // VPHADDBDrr 437277229U, // VPHADDBQrm 336613933U, // VPHADDBQrr 437280099U, // VPHADDBWrm 336616803U, // VPHADDBWrr 437277353U, // VPHADDDQrm 336614057U, // VPHADDDQrr 2484094340U, // VPHADDDYrm 2484094340U, // VPHADDDYrr 2484094340U, // VPHADDDrm 2484094340U, // VPHADDDrr 2484100946U, // VPHADDSWrm128 2484100946U, // VPHADDSWrm256 2484100946U, // VPHADDSWrr128 2484100946U, // VPHADDSWrr256 437273918U, // VPHADDUBDrm 336610622U, // VPHADDUBDrr 437277239U, // VPHADDUBQrm 336613943U, // VPHADDUBQrr 437280143U, // VPHADDUBWrm 336616847U, // VPHADDUBWrr 437277563U, // VPHADDUDQrm 336614267U, // VPHADDUDQrr 437276045U, // VPHADDUWDrm 336612749U, // VPHADDUWDrr 437278087U, // VPHADDUWQrm 336614791U, // VPHADDUWQrr 437275957U, // VPHADDWDrm 336612661U, // VPHADDWDrr 437278077U, // VPHADDWQrm 336614781U, // VPHADDWQrr 2484100560U, // VPHADDWYrm 2484100560U, // VPHADDWYrr 2484100560U, // VPHADDWrm 2484100560U, // VPHADDWrr 437280789U, // VPHMINPOSUWrm128 336617493U, // VPHMINPOSUWrr128 437280070U, // VPHSUBBWrm 336616774U, // VPHSUBBWrr 437277335U, // VPHSUBDQrm 336614039U, // VPHSUBDQrr 2484094281U, // VPHSUBDYrm 2484094281U, // VPHSUBDYrr 2484094281U, // VPHSUBDrm 2484094281U, // VPHSUBDrr 2484100927U, // VPHSUBSWrm128 2484100927U, // VPHSUBSWrm256 2484100927U, // VPHSUBSWrr128 2484100927U, // VPHSUBSWrr256 437275947U, // VPHSUBWDrm 336612651U, // VPHSUBWDrr 2484100506U, // VPHSUBWYrm 2484100506U, // VPHSUBWYrr 2484100506U, // VPHSUBWrm 2484100506U, // VPHSUBWrr 2484093808U, // VPINSRBrm 2484093808U, // VPINSRBrr 2484095642U, // VPINSRDrm 2484095642U, // VPINSRDrr 2484098170U, // VPINSRQrm 2484098170U, // VPINSRQrr 2484100879U, // VPINSRWrmi 2484100879U, // VPINSRWrri 1007701160U, // VPLZCNTDrm 303058088U, // VPLZCNTDrmb 2197834920U, // VPLZCNTDrmbk 352341160U, // VPLZCNTDrmbkz 2197834920U, // VPLZCNTDrmk 352341160U, // VPLZCNTDrmkz 336612520U, // VPLZCNTDrr 2197834920U, // VPLZCNTDrrk 352341160U, // VPLZCNTDrrkz 1007703273U, // VPLZCNTQrm 2517652713U, // VPLZCNTQrmb 2197837033U, // VPLZCNTQrmbk 352343273U, // VPLZCNTQrmbkz 2197837033U, // VPLZCNTQrmk 352343273U, // VPLZCNTQrmkz 336614633U, // VPLZCNTQrr 2197837033U, // VPLZCNTQrrk 352343273U, // VPLZCNTQrrkz 2484094418U, // VPMACSDDrm 2484094418U, // VPMACSDDrr 2484096748U, // VPMACSDQHrm 2484096748U, // VPMACSDQHrr 2484097084U, // VPMACSDQLrm 2484097084U, // VPMACSDQLrr 2484094428U, // VPMACSSDDrm 2484094428U, // VPMACSSDDrr 2484096759U, // VPMACSSDQHrm 2484096759U, // VPMACSSDQHrr 2484097095U, // VPMACSSDQLrm 2484097095U, // VPMACSSDQLrr 2484096374U, // VPMACSSWDrm 2484096374U, // VPMACSSWDrr 2484101180U, // VPMACSSWWrm 2484101180U, // VPMACSSWWrr 2484096353U, // VPMACSWDrm 2484096353U, // VPMACSWDrr 2484101170U, // VPMACSWWrm 2484101170U, // VPMACSWWrr 2484096385U, // VPMADCSSWDrm 2484096385U, // VPMADCSSWDrr 2484096363U, // VPMADCSWDrm 2484096363U, // VPMADCSWDrr 2484100915U, // VPMADDUBSWrm128 2484100915U, // VPMADDUBSWrm256 2484100915U, // VPMADDUBSWrr128 2484100915U, // VPMADDUBSWrr256 2484096319U, // VPMADDWDYrm 2484096319U, // VPMADDWDYrr 2484096319U, // VPMADDWDrm 2484096319U, // VPMADDWDrr 2149256472U, // VPMASKMOVDYmr 2484096280U, // VPMASKMOVDYrm 2148797720U, // VPMASKMOVDmr 2484096280U, // VPMASKMOVDrm 2149258602U, // VPMASKMOVQYmr 2484098410U, // VPMASKMOVQYrm 2148799850U, // VPMASKMOVQmr 2484098410U, // VPMASKMOVQrm 2484093921U, // VPMAXSBYrm 2484093921U, // VPMAXSBYrr 2498773985U, // VPMAXSBZ128rm 2197832673U, // VPMAXSBZ128rmk 352338913U, // VPMAXSBZ128rmkz 2498773985U, // VPMAXSBZ128rr 2197832673U, // VPMAXSBZ128rrk 352338913U, // VPMAXSBZ128rrkz 2498773985U, // VPMAXSBZ256rm 2197832673U, // VPMAXSBZ256rmk 352338913U, // VPMAXSBZ256rmkz 2498773985U, // VPMAXSBZ256rr 2197832673U, // VPMAXSBZ256rrk 352338913U, // VPMAXSBZ256rrkz 2498773985U, // VPMAXSBZrm 2197832673U, // VPMAXSBZrmk 352338913U, // VPMAXSBZrmkz 2498773985U, // VPMAXSBZrr 2197832673U, // VPMAXSBZrrk 352338913U, // VPMAXSBZrrkz 2484093921U, // VPMAXSBrm 2484093921U, // VPMAXSBrr 2484096119U, // VPMAXSDYrm 2484096119U, // VPMAXSDYrr 2498776183U, // VPMAXSDZ128rm 2498776183U, // VPMAXSDZ128rmb 2197834871U, // VPMAXSDZ128rmbk 352341111U, // VPMAXSDZ128rmbkz 2197834871U, // VPMAXSDZ128rmk 352341111U, // VPMAXSDZ128rmkz 2498776183U, // VPMAXSDZ128rr 2197834871U, // VPMAXSDZ128rrk 352341111U, // VPMAXSDZ128rrkz 2498776183U, // VPMAXSDZ256rm 2498776183U, // VPMAXSDZ256rmb 2197834871U, // VPMAXSDZ256rmbk 352341111U, // VPMAXSDZ256rmbkz 2197834871U, // VPMAXSDZ256rmk 352341111U, // VPMAXSDZ256rmkz 2498776183U, // VPMAXSDZ256rr 2197834871U, // VPMAXSDZ256rrk 352341111U, // VPMAXSDZ256rrkz 2498776183U, // VPMAXSDZrm 2498776183U, // VPMAXSDZrmb 2197834871U, // VPMAXSDZrmbk 352341111U, // VPMAXSDZrmbkz 2197834871U, // VPMAXSDZrmk 352341111U, // VPMAXSDZrmkz 2498776183U, // VPMAXSDZrr 2197834871U, // VPMAXSDZrrk 352341111U, // VPMAXSDZrrkz 2484096119U, // VPMAXSDrm 2484096119U, // VPMAXSDrr 2498778313U, // VPMAXSQZ128rm 2498778313U, // VPMAXSQZ128rmb 2197837001U, // VPMAXSQZ128rmbk 352343241U, // VPMAXSQZ128rmbkz 2197837001U, // VPMAXSQZ128rmk 352343241U, // VPMAXSQZ128rmkz 2498778313U, // VPMAXSQZ128rr 2197837001U, // VPMAXSQZ128rrk 352343241U, // VPMAXSQZ128rrkz 2498778313U, // VPMAXSQZ256rm 2498778313U, // VPMAXSQZ256rmb 2197837001U, // VPMAXSQZ256rmbk 352343241U, // VPMAXSQZ256rmbkz 2197837001U, // VPMAXSQZ256rmk 352343241U, // VPMAXSQZ256rmkz 2498778313U, // VPMAXSQZ256rr 2197837001U, // VPMAXSQZ256rrk 352343241U, // VPMAXSQZ256rrkz 2498778313U, // VPMAXSQZrm 2498778313U, // VPMAXSQZrmb 2197837001U, // VPMAXSQZrmbk 352343241U, // VPMAXSQZrmbkz 2197837001U, // VPMAXSQZrmk 352343241U, // VPMAXSQZrmkz 2498778313U, // VPMAXSQZrr 2197837001U, // VPMAXSQZrrk 352343241U, // VPMAXSQZrrkz 2484101046U, // VPMAXSWYrm 2484101046U, // VPMAXSWYrr 2498781110U, // VPMAXSWZ128rm 2197839798U, // VPMAXSWZ128rmk 352346038U, // VPMAXSWZ128rmkz 2498781110U, // VPMAXSWZ128rr 2197839798U, // VPMAXSWZ128rrk 352346038U, // VPMAXSWZ128rrkz 2498781110U, // VPMAXSWZ256rm 2197839798U, // VPMAXSWZ256rmk 352346038U, // VPMAXSWZ256rmkz 2498781110U, // VPMAXSWZ256rr 2197839798U, // VPMAXSWZ256rrk 352346038U, // VPMAXSWZ256rrkz 2498781110U, // VPMAXSWZrm 2197839798U, // VPMAXSWZrmk 352346038U, // VPMAXSWZrmkz 2498781110U, // VPMAXSWZrr 2197839798U, // VPMAXSWZrrk 352346038U, // VPMAXSWZrrkz 2484101046U, // VPMAXSWrm 2484101046U, // VPMAXSWrr 2484094026U, // VPMAXUBYrm 2484094026U, // VPMAXUBYrr 2498774090U, // VPMAXUBZ128rm 2197832778U, // VPMAXUBZ128rmk 352339018U, // VPMAXUBZ128rmkz 2498774090U, // VPMAXUBZ128rr 2197832778U, // VPMAXUBZ128rrk 352339018U, // VPMAXUBZ128rrkz 2498774090U, // VPMAXUBZ256rm 2197832778U, // VPMAXUBZ256rmk 352339018U, // VPMAXUBZ256rmkz 2498774090U, // VPMAXUBZ256rr 2197832778U, // VPMAXUBZ256rrk 352339018U, // VPMAXUBZ256rrkz 2498774090U, // VPMAXUBZrm 2197832778U, // VPMAXUBZrmk 352339018U, // VPMAXUBZrmkz 2498774090U, // VPMAXUBZrr 2197832778U, // VPMAXUBZrrk 352339018U, // VPMAXUBZrrkz 2484094026U, // VPMAXUBrm 2484094026U, // VPMAXUBrr 2484096244U, // VPMAXUDYrm 2484096244U, // VPMAXUDYrr 2498776308U, // VPMAXUDZ128rm 2498776308U, // VPMAXUDZ128rmb 2197834996U, // VPMAXUDZ128rmbk 352341236U, // VPMAXUDZ128rmbkz 2197834996U, // VPMAXUDZ128rmk 352341236U, // VPMAXUDZ128rmkz 2498776308U, // VPMAXUDZ128rr 2197834996U, // VPMAXUDZ128rrk 352341236U, // VPMAXUDZ128rrkz 2498776308U, // VPMAXUDZ256rm 2498776308U, // VPMAXUDZ256rmb 2197834996U, // VPMAXUDZ256rmbk 352341236U, // VPMAXUDZ256rmbkz 2197834996U, // VPMAXUDZ256rmk 352341236U, // VPMAXUDZ256rmkz 2498776308U, // VPMAXUDZ256rr 2197834996U, // VPMAXUDZ256rrk 352341236U, // VPMAXUDZ256rrkz 2498776308U, // VPMAXUDZrm 2498776308U, // VPMAXUDZrmb 2197834996U, // VPMAXUDZrmbk 352341236U, // VPMAXUDZrmbkz 2197834996U, // VPMAXUDZrmk 352341236U, // VPMAXUDZrmkz 2498776308U, // VPMAXUDZrr 2197834996U, // VPMAXUDZrrk 352341236U, // VPMAXUDZrrkz 2484096244U, // VPMAXUDrm 2484096244U, // VPMAXUDrr 2498778438U, // VPMAXUQZ128rm 2498778438U, // VPMAXUQZ128rmb 2197837126U, // VPMAXUQZ128rmbk 352343366U, // VPMAXUQZ128rmbkz 2197837126U, // VPMAXUQZ128rmk 352343366U, // VPMAXUQZ128rmkz 2498778438U, // VPMAXUQZ128rr 2197837126U, // VPMAXUQZ128rrk 352343366U, // VPMAXUQZ128rrkz 2498778438U, // VPMAXUQZ256rm 2498778438U, // VPMAXUQZ256rmb 2197837126U, // VPMAXUQZ256rmbk 352343366U, // VPMAXUQZ256rmbkz 2197837126U, // VPMAXUQZ256rmk 352343366U, // VPMAXUQZ256rmkz 2498778438U, // VPMAXUQZ256rr 2197837126U, // VPMAXUQZ256rrk 352343366U, // VPMAXUQZ256rrkz 2498778438U, // VPMAXUQZrm 2498778438U, // VPMAXUQZrmb 2197837126U, // VPMAXUQZrmbk 352343366U, // VPMAXUQZrmbkz 2197837126U, // VPMAXUQZrmk 352343366U, // VPMAXUQZrmkz 2498778438U, // VPMAXUQZrr 2197837126U, // VPMAXUQZrrk 352343366U, // VPMAXUQZrrkz 2484101154U, // VPMAXUWYrm 2484101154U, // VPMAXUWYrr 2498781218U, // VPMAXUWZ128rm 2197839906U, // VPMAXUWZ128rmk 352346146U, // VPMAXUWZ128rmkz 2498781218U, // VPMAXUWZ128rr 2197839906U, // VPMAXUWZ128rrk 352346146U, // VPMAXUWZ128rrkz 2498781218U, // VPMAXUWZ256rm 2197839906U, // VPMAXUWZ256rmk 352346146U, // VPMAXUWZ256rmkz 2498781218U, // VPMAXUWZ256rr 2197839906U, // VPMAXUWZ256rrk 352346146U, // VPMAXUWZ256rrkz 2498781218U, // VPMAXUWZrm 2197839906U, // VPMAXUWZrmk 352346146U, // VPMAXUWZrmkz 2498781218U, // VPMAXUWZrr 2197839906U, // VPMAXUWZrrk 352346146U, // VPMAXUWZrrkz 2484101154U, // VPMAXUWrm 2484101154U, // VPMAXUWrr 2484093862U, // VPMINSBYrm 2484093862U, // VPMINSBYrr 2498773926U, // VPMINSBZ128rm 2197832614U, // VPMINSBZ128rmk 352338854U, // VPMINSBZ128rmkz 2498773926U, // VPMINSBZ128rr 2197832614U, // VPMINSBZ128rrk 352338854U, // VPMINSBZ128rrkz 2498773926U, // VPMINSBZ256rm 2197832614U, // VPMINSBZ256rmk 352338854U, // VPMINSBZ256rmkz 2498773926U, // VPMINSBZ256rr 2197832614U, // VPMINSBZ256rrk 352338854U, // VPMINSBZ256rrkz 2498773926U, // VPMINSBZrm 2197832614U, // VPMINSBZrmk 352338854U, // VPMINSBZrmkz 2498773926U, // VPMINSBZrr 2197832614U, // VPMINSBZrrk 352338854U, // VPMINSBZrrkz 2484093862U, // VPMINSBrm 2484093862U, // VPMINSBrr 2484096026U, // VPMINSDYrm 2484096026U, // VPMINSDYrr 2498776090U, // VPMINSDZ128rm 2498776090U, // VPMINSDZ128rmb 2197834778U, // VPMINSDZ128rmbk 352341018U, // VPMINSDZ128rmbkz 2197834778U, // VPMINSDZ128rmk 352341018U, // VPMINSDZ128rmkz 2498776090U, // VPMINSDZ128rr 2197834778U, // VPMINSDZ128rrk 352341018U, // VPMINSDZ128rrkz 2498776090U, // VPMINSDZ256rm 2498776090U, // VPMINSDZ256rmb 2197834778U, // VPMINSDZ256rmbk 352341018U, // VPMINSDZ256rmbkz 2197834778U, // VPMINSDZ256rmk 352341018U, // VPMINSDZ256rmkz 2498776090U, // VPMINSDZ256rr 2197834778U, // VPMINSDZ256rrk 352341018U, // VPMINSDZ256rrkz 2498776090U, // VPMINSDZrm 2498776090U, // VPMINSDZrmb 2197834778U, // VPMINSDZrmbk 352341018U, // VPMINSDZrmbkz 2197834778U, // VPMINSDZrmk 352341018U, // VPMINSDZrmkz 2498776090U, // VPMINSDZrr 2197834778U, // VPMINSDZrrk 352341018U, // VPMINSDZrrkz 2484096026U, // VPMINSDrm 2484096026U, // VPMINSDrr 2498778270U, // VPMINSQZ128rm 2498778270U, // VPMINSQZ128rmb 2197836958U, // VPMINSQZ128rmbk 352343198U, // VPMINSQZ128rmbkz 2197836958U, // VPMINSQZ128rmk 352343198U, // VPMINSQZ128rmkz 2498778270U, // VPMINSQZ128rr 2197836958U, // VPMINSQZ128rrk 352343198U, // VPMINSQZ128rrkz 2498778270U, // VPMINSQZ256rm 2498778270U, // VPMINSQZ256rmb 2197836958U, // VPMINSQZ256rmbk 352343198U, // VPMINSQZ256rmbkz 2197836958U, // VPMINSQZ256rmk 352343198U, // VPMINSQZ256rmkz 2498778270U, // VPMINSQZ256rr 2197836958U, // VPMINSQZ256rrk 352343198U, // VPMINSQZ256rrkz 2498778270U, // VPMINSQZrm 2498778270U, // VPMINSQZrmb 2197836958U, // VPMINSQZrmbk 352343198U, // VPMINSQZrmbkz 2197836958U, // VPMINSQZrmk 352343198U, // VPMINSQZrmkz 2498778270U, // VPMINSQZrr 2197836958U, // VPMINSQZrrk 352343198U, // VPMINSQZrrkz 2484100977U, // VPMINSWYrm 2484100977U, // VPMINSWYrr 2498781041U, // VPMINSWZ128rm 2197839729U, // VPMINSWZ128rmk 352345969U, // VPMINSWZ128rmkz 2498781041U, // VPMINSWZ128rr 2197839729U, // VPMINSWZ128rrk 352345969U, // VPMINSWZ128rrkz 2498781041U, // VPMINSWZ256rm 2197839729U, // VPMINSWZ256rmk 352345969U, // VPMINSWZ256rmkz 2498781041U, // VPMINSWZ256rr 2197839729U, // VPMINSWZ256rrk 352345969U, // VPMINSWZ256rrkz 2498781041U, // VPMINSWZrm 2197839729U, // VPMINSWZrmk 352345969U, // VPMINSWZrmkz 2498781041U, // VPMINSWZrr 2197839729U, // VPMINSWZrrk 352345969U, // VPMINSWZrrkz 2484100977U, // VPMINSWrm 2484100977U, // VPMINSWrr 2484093994U, // VPMINUBYrm 2484093994U, // VPMINUBYrr 2498774058U, // VPMINUBZ128rm 2197832746U, // VPMINUBZ128rmk 352338986U, // VPMINUBZ128rmkz 2498774058U, // VPMINUBZ128rr 2197832746U, // VPMINUBZ128rrk 352338986U, // VPMINUBZ128rrkz 2498774058U, // VPMINUBZ256rm 2197832746U, // VPMINUBZ256rmk 352338986U, // VPMINUBZ256rmkz 2498774058U, // VPMINUBZ256rr 2197832746U, // VPMINUBZ256rrk 352338986U, // VPMINUBZ256rrkz 2498774058U, // VPMINUBZrm 2197832746U, // VPMINUBZrmk 352338986U, // VPMINUBZrmkz 2498774058U, // VPMINUBZrr 2197832746U, // VPMINUBZrrk 352338986U, // VPMINUBZrrkz 2484093994U, // VPMINUBrm 2484093994U, // VPMINUBrr 2484096226U, // VPMINUDYrm 2484096226U, // VPMINUDYrr 2498776290U, // VPMINUDZ128rm 2498776290U, // VPMINUDZ128rmb 2197834978U, // VPMINUDZ128rmbk 352341218U, // VPMINUDZ128rmbkz 2197834978U, // VPMINUDZ128rmk 352341218U, // VPMINUDZ128rmkz 2498776290U, // VPMINUDZ128rr 2197834978U, // VPMINUDZ128rrk 352341218U, // VPMINUDZ128rrkz 2498776290U, // VPMINUDZ256rm 2498776290U, // VPMINUDZ256rmb 2197834978U, // VPMINUDZ256rmbk 352341218U, // VPMINUDZ256rmbkz 2197834978U, // VPMINUDZ256rmk 352341218U, // VPMINUDZ256rmkz 2498776290U, // VPMINUDZ256rr 2197834978U, // VPMINUDZ256rrk 352341218U, // VPMINUDZ256rrkz 2498776290U, // VPMINUDZrm 2498776290U, // VPMINUDZrmb 2197834978U, // VPMINUDZrmbk 352341218U, // VPMINUDZrmbkz 2197834978U, // VPMINUDZrmk 352341218U, // VPMINUDZrmkz 2498776290U, // VPMINUDZrr 2197834978U, // VPMINUDZrrk 352341218U, // VPMINUDZrrkz 2484096226U, // VPMINUDrm 2484096226U, // VPMINUDrr 2498778420U, // VPMINUQZ128rm 2498778420U, // VPMINUQZ128rmb 2197837108U, // VPMINUQZ128rmbk 352343348U, // VPMINUQZ128rmbkz 2197837108U, // VPMINUQZ128rmk 352343348U, // VPMINUQZ128rmkz 2498778420U, // VPMINUQZ128rr 2197837108U, // VPMINUQZ128rrk 352343348U, // VPMINUQZ128rrkz 2498778420U, // VPMINUQZ256rm 2498778420U, // VPMINUQZ256rmb 2197837108U, // VPMINUQZ256rmbk 352343348U, // VPMINUQZ256rmbkz 2197837108U, // VPMINUQZ256rmk 352343348U, // VPMINUQZ256rmkz 2498778420U, // VPMINUQZ256rr 2197837108U, // VPMINUQZ256rrk 352343348U, // VPMINUQZ256rrkz 2498778420U, // VPMINUQZrm 2498778420U, // VPMINUQZrmb 2197837108U, // VPMINUQZrmbk 352343348U, // VPMINUQZrmbkz 2197837108U, // VPMINUQZrmk 352343348U, // VPMINUQZrmkz 2498778420U, // VPMINUQZrr 2197837108U, // VPMINUQZrrk 352343348U, // VPMINUQZrrkz 2484101123U, // VPMINUWYrm 2484101123U, // VPMINUWYrr 2498781187U, // VPMINUWZ128rm 2197839875U, // VPMINUWZ128rmk 352346115U, // VPMINUWZ128rmkz 2498781187U, // VPMINUWZ128rr 2197839875U, // VPMINUWZ128rrk 352346115U, // VPMINUWZ128rrkz 2498781187U, // VPMINUWZ256rm 2197839875U, // VPMINUWZ256rmk 352346115U, // VPMINUWZ256rmkz 2498781187U, // VPMINUWZ256rr 2197839875U, // VPMINUWZ256rrk 352346115U, // VPMINUWZ256rrkz 2498781187U, // VPMINUWZrm 2197839875U, // VPMINUWZrmk 352346115U, // VPMINUWZrmkz 2498781187U, // VPMINUWZrr 2197839875U, // VPMINUWZrrk 352346115U, // VPMINUWZrrkz 2484101123U, // VPMINUWrm 2484101123U, // VPMINUWrr 1311436U, // VPMOVDBmr 2164523724U, // VPMOVDBmrk 336609996U, // VPMOVDBrr 2499822284U, // VPMOVDBrrk 352338636U, // VPMOVDBrrkz 1777181U, // VPMOVDWmr 2164989469U, // VPMOVDWmrk 336616989U, // VPMOVDWrr 2499829277U, // VPMOVDWrrk 352345629U, // VPMOVDWrrkz 336609906U, // VPMOVM2BZ128rr 336609906U, // VPMOVM2BZ256rr 336609906U, // VPMOVM2BZrr 336610546U, // VPMOVM2DZ128rr 336610546U, // VPMOVM2DZ256rr 336610546U, // VPMOVM2DZrr 336613888U, // VPMOVM2QZ128rr 336613888U, // VPMOVM2QZ256rr 336613888U, // VPMOVM2QZrr 336616748U, // VPMOVM2WZ128rr 336616748U, // VPMOVM2WZ256rr 336616748U, // VPMOVM2WZrr 336610026U, // VPMOVMSKBYrr 336610026U, // VPMOVMSKBrr 1311570U, // VPMOVQBmr 2164523858U, // VPMOVQBmrk 336610130U, // VPMOVQBrr 2499822418U, // VPMOVQBrrk 352338770U, // VPMOVQBrrkz 1772135U, // VPMOVQDmr 2164984423U, // VPMOVQDmrk 336611943U, // VPMOVQDrr 2499824231U, // VPMOVQDrrk 352340583U, // VPMOVQDrrkz 1318626U, // VPMOVQWmr 2164530914U, // VPMOVQWmrk 336617186U, // VPMOVQWrr 2499829474U, // VPMOVQWrrk 352345826U, // VPMOVQWrrkz 1311426U, // VPMOVSDBmr 2164523714U, // VPMOVSDBmrk 336609986U, // VPMOVSDBrr 2499822274U, // VPMOVSDBrrk 352338626U, // VPMOVSDBrrkz 1777171U, // VPMOVSDWmr 2164989459U, // VPMOVSDWmrk 336616979U, // VPMOVSDWrr 2499829267U, // VPMOVSDWrrk 352345619U, // VPMOVSDWrrkz 1311560U, // VPMOVSQBmr 2164523848U, // VPMOVSQBmrk 336610120U, // VPMOVSQBrr 2499822408U, // VPMOVSQBrrk 352338760U, // VPMOVSQBrrkz 1772125U, // VPMOVSQDmr 2164984413U, // VPMOVSQDmrk 336611933U, // VPMOVSQDrr 2499824221U, // VPMOVSQDrrk 352340573U, // VPMOVSQDrrkz 1318616U, // VPMOVSQWmr 2164530904U, // VPMOVSQWmrk 336617176U, // VPMOVSQWrr 2499829464U, // VPMOVSQWrrk 352345816U, // VPMOVSQWrrkz 370165082U, // VPMOVSXBDYrm 336610650U, // VPMOVSXBDYrr 437273946U, // VPMOVSXBDZrm 2499822938U, // VPMOVSXBDZrmk 352339290U, // VPMOVSXBDZrmkz 336610650U, // VPMOVSXBDZrr 2499822938U, // VPMOVSXBDZrrk 352339290U, // VPMOVSXBDZrrkz 303056218U, // VPMOVSXBDrm 336610650U, // VPMOVSXBDrr 303059530U, // VPMOVSXBQYrm 336613962U, // VPMOVSXBQYrr 437277258U, // VPMOVSXBQZrm 2499826250U, // VPMOVSXBQZrmk 352342602U, // VPMOVSXBQZrmkz 336613962U, // VPMOVSXBQZrr 2499826250U, // VPMOVSXBQZrrk 352342602U, // VPMOVSXBQZrrkz 470831690U, // VPMOVSXBQrm 336613962U, // VPMOVSXBQrr 437280171U, // VPMOVSXBWYrm 336616875U, // VPMOVSXBWYrr 370171307U, // VPMOVSXBWrm 336616875U, // VPMOVSXBWrr 437277584U, // VPMOVSXDQYrm 336614288U, // VPMOVSXDQYrr 974148496U, // VPMOVSXDQZrm 2499826576U, // VPMOVSXDQZrmk 352342928U, // VPMOVSXDQZrmkz 336614288U, // VPMOVSXDQZrr 2499826576U, // VPMOVSXDQZrrk 352342928U, // VPMOVSXDQZrrkz 370168720U, // VPMOVSXDQrm 336614288U, // VPMOVSXDQrr 437276056U, // VPMOVSXWDYrm 336612760U, // VPMOVSXWDYrr 974146968U, // VPMOVSXWDZrm 2499825048U, // VPMOVSXWDZrmk 352341400U, // VPMOVSXWDZrmkz 336612760U, // VPMOVSXWDZrr 2499825048U, // VPMOVSXWDZrrk 352341400U, // VPMOVSXWDZrrkz 370167192U, // VPMOVSXWDrm 336612760U, // VPMOVSXWDrr 370169234U, // VPMOVSXWQYrm 336614802U, // VPMOVSXWQYrr 437278098U, // VPMOVSXWQZrm 2499827090U, // VPMOVSXWQZrmk 352343442U, // VPMOVSXWQZrmkz 336614802U, // VPMOVSXWQZrr 2499827090U, // VPMOVSXWQZrrk 352343442U, // VPMOVSXWQZrrkz 303060370U, // VPMOVSXWQrm 336614802U, // VPMOVSXWQrr 1311415U, // VPMOVUSDBmr 2164523703U, // VPMOVUSDBmrk 336609975U, // VPMOVUSDBrr 2499822263U, // VPMOVUSDBrrk 352338615U, // VPMOVUSDBrrkz 1777160U, // VPMOVUSDWmr 2164989448U, // VPMOVUSDWmrk 336616968U, // VPMOVUSDWrr 2499829256U, // VPMOVUSDWrrk 352345608U, // VPMOVUSDWrrkz 1311549U, // VPMOVUSQBmr 2164523837U, // VPMOVUSQBmrk 336610109U, // VPMOVUSQBrr 2499822397U, // VPMOVUSQBrrk 352338749U, // VPMOVUSQBrrkz 1772114U, // VPMOVUSQDmr 2164984402U, // VPMOVUSQDmrk 336611922U, // VPMOVUSQDrr 2499824210U, // VPMOVUSQDrrk 352340562U, // VPMOVUSQDrrkz 1318605U, // VPMOVUSQWmr 2164530893U, // VPMOVUSQWmrk 336617165U, // VPMOVUSQWrr 2499829453U, // VPMOVUSQWrrk 352345805U, // VPMOVUSQWrrkz 370165093U, // VPMOVZXBDYrm 336610661U, // VPMOVZXBDYrr 437273957U, // VPMOVZXBDZrm 2499822949U, // VPMOVZXBDZrmk 352339301U, // VPMOVZXBDZrmkz 336610661U, // VPMOVZXBDZrr 2499822949U, // VPMOVZXBDZrrk 352339301U, // VPMOVZXBDZrrkz 303056229U, // VPMOVZXBDrm 336610661U, // VPMOVZXBDrr 303059541U, // VPMOVZXBQYrm 336613973U, // VPMOVZXBQYrr 437277269U, // VPMOVZXBQZrm 2499826261U, // VPMOVZXBQZrmk 352342613U, // VPMOVZXBQZrmkz 336613973U, // VPMOVZXBQZrr 2499826261U, // VPMOVZXBQZrrk 352342613U, // VPMOVZXBQZrrkz 470831701U, // VPMOVZXBQrm 336613973U, // VPMOVZXBQrr 437280182U, // VPMOVZXBWYrm 336616886U, // VPMOVZXBWYrr 370171318U, // VPMOVZXBWrm 336616886U, // VPMOVZXBWrr 437277595U, // VPMOVZXDQYrm 336614299U, // VPMOVZXDQYrr 974148507U, // VPMOVZXDQZrm 2499826587U, // VPMOVZXDQZrmk 352342939U, // VPMOVZXDQZrmkz 336614299U, // VPMOVZXDQZrr 2499826587U, // VPMOVZXDQZrrk 352342939U, // VPMOVZXDQZrrkz 370168731U, // VPMOVZXDQrm 336614299U, // VPMOVZXDQrr 437276067U, // VPMOVZXWDYrm 336612771U, // VPMOVZXWDYrr 974146979U, // VPMOVZXWDZrm 2499825059U, // VPMOVZXWDZrmk 352341411U, // VPMOVZXWDZrmkz 336612771U, // VPMOVZXWDZrr 2499825059U, // VPMOVZXWDZrrk 352341411U, // VPMOVZXWDZrrkz 370167203U, // VPMOVZXWDrm 336612771U, // VPMOVZXWDrr 370169245U, // VPMOVZXWQYrm 336614813U, // VPMOVZXWQYrr 437278109U, // VPMOVZXWQZrm 2499827101U, // VPMOVZXWQZrmk 352343453U, // VPMOVZXWQZrmkz 336614813U, // VPMOVZXWQZrr 2499827101U, // VPMOVZXWQZrrk 352343453U, // VPMOVZXWQZrrkz 303060381U, // VPMOVZXWQrm 336614813U, // VPMOVZXWQrr 2484097757U, // VPMULDQYrm 2484097757U, // VPMULDQYrr 2484097757U, // VPMULDQZrm 2484097757U, // VPMULDQZrmb 2499826397U, // VPMULDQZrmbk 352342749U, // VPMULDQZrmbkz 2499826397U, // VPMULDQZrmk 352342749U, // VPMULDQZrmkz 2484097757U, // VPMULDQZrr 2499826397U, // VPMULDQZrrk 352342749U, // VPMULDQZrrkz 2484097757U, // VPMULDQrm 2484097757U, // VPMULDQrr 2484101000U, // VPMULHRSWrm128 2484101000U, // VPMULHRSWrm256 2484101000U, // VPMULHRSWrr128 2484101000U, // VPMULHRSWrr256 2484101104U, // VPMULHUWYrm 2484101104U, // VPMULHUWYrr 2484101104U, // VPMULHUWrm 2484101104U, // VPMULHUWrr 2484100690U, // VPMULHWYrm 2484100690U, // VPMULHWYrr 2484100690U, // VPMULHWrm 2484100690U, // VPMULHWrr 2484094521U, // VPMULLDYrm 2484094521U, // VPMULLDYrr 2498774585U, // VPMULLDZ128rm 2498774585U, // VPMULLDZ128rmb 2197833273U, // VPMULLDZ128rmbk 352339513U, // VPMULLDZ128rmbkz 2197833273U, // VPMULLDZ128rmk 352339513U, // VPMULLDZ128rmkz 2498774585U, // VPMULLDZ128rr 2197833273U, // VPMULLDZ128rrk 352339513U, // VPMULLDZ128rrkz 2498774585U, // VPMULLDZ256rm 2498774585U, // VPMULLDZ256rmb 2197833273U, // VPMULLDZ256rmbk 352339513U, // VPMULLDZ256rmbkz 2197833273U, // VPMULLDZ256rmk 352339513U, // VPMULLDZ256rmkz 2498774585U, // VPMULLDZ256rr 2197833273U, // VPMULLDZ256rrk 352339513U, // VPMULLDZ256rrkz 2498774585U, // VPMULLDZrm 2498774585U, // VPMULLDZrmb 2197833273U, // VPMULLDZrmbk 352339513U, // VPMULLDZrmbkz 2197833273U, // VPMULLDZrmk 352339513U, // VPMULLDZrmkz 2498774585U, // VPMULLDZrr 2197833273U, // VPMULLDZrrk 352339513U, // VPMULLDZrrkz 2484094521U, // VPMULLDrm 2484094521U, // VPMULLDrr 2498778054U, // VPMULLQZ128rm 2498778054U, // VPMULLQZ128rmb 2197836742U, // VPMULLQZ128rmbk 352342982U, // VPMULLQZ128rmbkz 2197836742U, // VPMULLQZ128rmk 352342982U, // VPMULLQZ128rmkz 2498778054U, // VPMULLQZ128rr 2197836742U, // VPMULLQZ128rrk 352342982U, // VPMULLQZ128rrkz 2498778054U, // VPMULLQZ256rm 2498778054U, // VPMULLQZ256rmb 2197836742U, // VPMULLQZ256rmbk 352342982U, // VPMULLQZ256rmbkz 2197836742U, // VPMULLQZ256rmk 352342982U, // VPMULLQZ256rmkz 2498778054U, // VPMULLQZ256rr 2197836742U, // VPMULLQZ256rrk 352342982U, // VPMULLQZ256rrkz 2498778054U, // VPMULLQZrm 2498778054U, // VPMULLQZrmb 2197836742U, // VPMULLQZrmbk 352342982U, // VPMULLQZrmbkz 2197836742U, // VPMULLQZrmk 352342982U, // VPMULLQZrmkz 2498778054U, // VPMULLQZrr 2197836742U, // VPMULLQZrrk 352342982U, // VPMULLQZrrkz 2484100732U, // VPMULLWYrm 2484100732U, // VPMULLWYrr 2498780796U, // VPMULLWZ128rm 2197839484U, // VPMULLWZ128rmk 352345724U, // VPMULLWZ128rmkz 2498780796U, // VPMULLWZ128rr 2197839484U, // VPMULLWZ128rrk 352345724U, // VPMULLWZ128rrkz 2498780796U, // VPMULLWZ256rm 2197839484U, // VPMULLWZ256rmk 352345724U, // VPMULLWZ256rmkz 2498780796U, // VPMULLWZ256rr 2197839484U, // VPMULLWZ256rrk 352345724U, // VPMULLWZ256rrkz 2498780796U, // VPMULLWZrm 2197839484U, // VPMULLWZrmk 352345724U, // VPMULLWZrmkz 2498780796U, // VPMULLWZrr 2197839484U, // VPMULLWZrrk 352345724U, // VPMULLWZrrkz 2484100732U, // VPMULLWrm 2484100732U, // VPMULLWrr 2484097926U, // VPMULUDQYrm 2484097926U, // VPMULUDQYrr 2484097926U, // VPMULUDQZrm 2484097926U, // VPMULUDQZrmb 2499826566U, // VPMULUDQZrmbk 352342918U, // VPMULUDQZrmbkz 2499826566U, // VPMULUDQZrmk 352342918U, // VPMULUDQZrmkz 2484097926U, // VPMULUDQZrr 2499826566U, // VPMULUDQZrrk 352342918U, // VPMULUDQZrrkz 2484097926U, // VPMULUDQrm 2484097926U, // VPMULUDQrr 2498775684U, // VPORDZ128rm 2498775684U, // VPORDZ128rmb 2197834372U, // VPORDZ128rmbk 352340612U, // VPORDZ128rmbkz 2197834372U, // VPORDZ128rmk 352340612U, // VPORDZ128rmkz 2498775684U, // VPORDZ128rr 2197834372U, // VPORDZ128rrk 352340612U, // VPORDZ128rrkz 2498775684U, // VPORDZ256rm 2498775684U, // VPORDZ256rmb 2197834372U, // VPORDZ256rmbk 352340612U, // VPORDZ256rmbkz 2197834372U, // VPORDZ256rmk 352340612U, // VPORDZ256rmkz 2498775684U, // VPORDZ256rr 2197834372U, // VPORDZ256rrk 352340612U, // VPORDZ256rrkz 2498775684U, // VPORDZrm 2498775684U, // VPORDZrmb 2197834372U, // VPORDZrmbk 352340612U, // VPORDZrmbkz 2197834372U, // VPORDZrmk 352340612U, // VPORDZrmkz 2498775684U, // VPORDZrr 2197834372U, // VPORDZrrk 352340612U, // VPORDZrrkz 2498778212U, // VPORQZ128rm 2498778212U, // VPORQZ128rmb 2197836900U, // VPORQZ128rmbk 352343140U, // VPORQZ128rmbkz 2197836900U, // VPORQZ128rmk 352343140U, // VPORQZ128rmkz 2498778212U, // VPORQZ128rr 2197836900U, // VPORQZ128rrk 352343140U, // VPORQZ128rrkz 2498778212U, // VPORQZ256rm 2498778212U, // VPORQZ256rmb 2197836900U, // VPORQZ256rmbk 352343140U, // VPORQZ256rmbkz 2197836900U, // VPORQZ256rmk 352343140U, // VPORQZ256rmkz 2498778212U, // VPORQZ256rr 2197836900U, // VPORQZ256rrk 352343140U, // VPORQZ256rrkz 2498778212U, // VPORQZrm 2498778212U, // VPORQZrmb 2197836900U, // VPORQZrmbk 352343140U, // VPORQZrmbkz 2197836900U, // VPORQZrmk 352343140U, // VPORQZrmkz 2498778212U, // VPORQZrr 2197836900U, // VPORQZrrk 352343140U, // VPORQZrrkz 2484098534U, // VPORYrm 2484098534U, // VPORYrr 2484098534U, // VPORrm 2484098534U, // VPORrr 2484097164U, // VPPERMmr 2484097164U, // VPPERMrm 2484097164U, // VPPERMrr 2584757249U, // VPROTBmi 2584757249U, // VPROTBmr 2484093953U, // VPROTBri 2484093953U, // VPROTBrm 2484093953U, // VPROTBrr 2584759481U, // VPROTDmi 2584759481U, // VPROTDmr 2484096185U, // VPROTDri 2484096185U, // VPROTDrm 2484096185U, // VPROTDrr 2584761602U, // VPROTQmi 2584761602U, // VPROTQmr 2484098306U, // VPROTQri 2484098306U, // VPROTQrm 2484098306U, // VPROTQrr 2584764368U, // VPROTWmi 2584764368U, // VPROTWmr 2484101072U, // VPROTWri 2484101072U, // VPROTWrm 2484101072U, // VPROTWrr 2484100442U, // VPSADBWYrm 2484100442U, // VPSADBWYrr 2484100442U, // VPSADBWrm 2484100442U, // VPSADBWrr 1393149381U, // VPSCATTERDDZmr 1393169202U, // VPSCATTERDQZmr 1393166917U, // VPSCATTERQDZmr 1393169481U, // VPSCATTERQQZmr 2584756883U, // VPSHABmr 2484093587U, // VPSHABrm 2484093587U, // VPSHABrr 2584757540U, // VPSHADmr 2484094244U, // VPSHADrm 2484094244U, // VPSHADrr 2584760861U, // VPSHAQmr 2484097565U, // VPSHAQrm 2484097565U, // VPSHAQrr 2584763702U, // VPSHAWmr 2484100406U, // VPSHAWrm 2484100406U, // VPSHAWrr 2584756981U, // VPSHLBmr 2484093685U, // VPSHLBrm 2484093685U, // VPSHLBrr 2584757795U, // VPSHLDmr 2484094499U, // VPSHLDrm 2484094499U, // VPSHLDrr 2584761270U, // VPSHLQmr 2484097974U, // VPSHLQrm 2484097974U, // VPSHLQrr 2584764012U, // VPSHLWmr 2484100716U, // VPSHLWrm 2484100716U, // VPSHLWrr 2484093653U, // VPSHUFBYrm 2484093653U, // VPSHUFBYrr 2484093653U, // VPSHUFBrm 2484093653U, // VPSHUFBrr 3121628662U, // VPSHUFDYmi 2484094454U, // VPSHUFDYri 3155183094U, // VPSHUFDZmi 2484094454U, // VPSHUFDZri 2584757750U, // VPSHUFDmi 2484094454U, // VPSHUFDri 3121634888U, // VPSHUFHWYmi 2484100680U, // VPSHUFHWYri 2584763976U, // VPSHUFHWmi 2484100680U, // VPSHUFHWri 3121634914U, // VPSHUFLWYmi 2484100706U, // VPSHUFLWYri 2584764002U, // VPSHUFLWmi 2484100706U, // VPSHUFLWri 2484093730U, // VPSIGNBYrm 2484093730U, // VPSIGNBYrr 2484093730U, // VPSIGNBrm 2484093730U, // VPSIGNBrr 2484094646U, // VPSIGNDYrm 2484094646U, // VPSIGNDYrr 2484094646U, // VPSIGNDrm 2484094646U, // VPSIGNDrr 2484100786U, // VPSIGNWYrm 2484100786U, // VPSIGNWYrr 2484100786U, // VPSIGNWrm 2484100786U, // VPSIGNWrr 2484097739U, // VPSLLDQYri 2484097739U, // VPSLLDQri 2484094513U, // VPSLLDYri 2484094513U, // VPSLLDYrm 2484094513U, // VPSLLDYrr 3183494705U, // VPSLLDZmi 2197833265U, // VPSLLDZmik 352339505U, // VPSLLDZmikz 2512406065U, // VPSLLDZri 2197833265U, // VPSLLDZrik 352339505U, // VPSLLDZrikz 2512406065U, // VPSLLDZrm 2197833265U, // VPSLLDZrmk 352339505U, // VPSLLDZrmkz 2512406065U, // VPSLLDZrr 2197833265U, // VPSLLDZrrk 352339505U, // VPSLLDZrrkz 2484094513U, // VPSLLDri 2484094513U, // VPSLLDrm 2484094513U, // VPSLLDrr 2484097982U, // VPSLLQYri 2484097982U, // VPSLLQYrm 2484097982U, // VPSLLQYrr 3183498174U, // VPSLLQZmi 2197836734U, // VPSLLQZmik 352342974U, // VPSLLQZmikz 2512409534U, // VPSLLQZri 2197836734U, // VPSLLQZrik 352342974U, // VPSLLQZrikz 2512409534U, // VPSLLQZrm 2197836734U, // VPSLLQZrmk 352342974U, // VPSLLQZrmkz 2512409534U, // VPSLLQZrr 2197836734U, // VPSLLQZrrk 352342974U, // VPSLLQZrrkz 2484097982U, // VPSLLQri 2484097982U, // VPSLLQrm 2484097982U, // VPSLLQrr 2484096262U, // VPSLLVDYrm 2484096262U, // VPSLLVDYrr 2512407814U, // VPSLLVDZrm 2197835014U, // VPSLLVDZrmk 352341254U, // VPSLLVDZrmkz 2512407814U, // VPSLLVDZrr 2197835014U, // VPSLLVDZrrk 352341254U, // VPSLLVDZrrkz 2484096262U, // VPSLLVDrm 2484096262U, // VPSLLVDrr 2484098392U, // VPSLLVQYrm 2484098392U, // VPSLLVQYrr 2512409944U, // VPSLLVQZrm 2197837144U, // VPSLLVQZrmk 352343384U, // VPSLLVQZrmkz 2512409944U, // VPSLLVQZrr 2197837144U, // VPSLLVQZrrk 352343384U, // VPSLLVQZrrkz 2484098392U, // VPSLLVQrm 2484098392U, // VPSLLVQrr 2484100724U, // VPSLLWYri 2484100724U, // VPSLLWYrm 2484100724U, // VPSLLWYrr 2484100724U, // VPSLLWri 2484100724U, // VPSLLWrm 2484100724U, // VPSLLWrr 2484094252U, // VPSRADYri 2484094252U, // VPSRADYrm 2484094252U, // VPSRADYrr 3183494444U, // VPSRADZmi 2197833004U, // VPSRADZmik 352339244U, // VPSRADZmikz 2512405804U, // VPSRADZri 2197833004U, // VPSRADZrik 352339244U, // VPSRADZrikz 2512405804U, // VPSRADZrm 2197833004U, // VPSRADZrmk 352339244U, // VPSRADZrmkz 2512405804U, // VPSRADZrr 2197833004U, // VPSRADZrrk 352339244U, // VPSRADZrrkz 2484094252U, // VPSRADri 2484094252U, // VPSRADrm 2484094252U, // VPSRADrr 3183497765U, // VPSRAQZmi 2197836325U, // VPSRAQZmik 352342565U, // VPSRAQZmikz 2512409125U, // VPSRAQZri 2197836325U, // VPSRAQZrik 352342565U, // VPSRAQZrikz 2512409125U, // VPSRAQZrm 2197836325U, // VPSRAQZrmk 352342565U, // VPSRAQZrmkz 2512409125U, // VPSRAQZrr 2197836325U, // VPSRAQZrrk 352342565U, // VPSRAQZrrkz 2484096253U, // VPSRAVDYrm 2484096253U, // VPSRAVDYrr 2512407805U, // VPSRAVDZrm 2197835005U, // VPSRAVDZrmk 352341245U, // VPSRAVDZrmkz 2512407805U, // VPSRAVDZrr 2197835005U, // VPSRAVDZrrk 352341245U, // VPSRAVDZrrkz 2484096253U, // VPSRAVDrm 2484096253U, // VPSRAVDrr 2512409935U, // VPSRAVQZrm 2197837135U, // VPSRAVQZrmk 352343375U, // VPSRAVQZrmkz 2512409935U, // VPSRAVQZrr 2197837135U, // VPSRAVQZrrk 352343375U, // VPSRAVQZrrkz 2484100414U, // VPSRAWYri 2484100414U, // VPSRAWYrm 2484100414U, // VPSRAWYrr 2484100414U, // VPSRAWri 2484100414U, // VPSRAWrm 2484100414U, // VPSRAWrr 2484097748U, // VPSRLDQYri 2484097748U, // VPSRLDQri 2484094530U, // VPSRLDYri 2484094530U, // VPSRLDYrm 2484094530U, // VPSRLDYrr 3183494722U, // VPSRLDZmi 2197833282U, // VPSRLDZmik 352339522U, // VPSRLDZmikz 2512406082U, // VPSRLDZri 2197833282U, // VPSRLDZrik 352339522U, // VPSRLDZrikz 2512406082U, // VPSRLDZrm 2197833282U, // VPSRLDZrmk 352339522U, // VPSRLDZrmkz 2512406082U, // VPSRLDZrr 2197833282U, // VPSRLDZrrk 352339522U, // VPSRLDZrrkz 2484094530U, // VPSRLDri 2484094530U, // VPSRLDrm 2484094530U, // VPSRLDrr 2484097999U, // VPSRLQYri 2484097999U, // VPSRLQYrm 2484097999U, // VPSRLQYrr 3183498191U, // VPSRLQZmi 2197836751U, // VPSRLQZmik 352342991U, // VPSRLQZmikz 2512409551U, // VPSRLQZri 2197836751U, // VPSRLQZrik 352342991U, // VPSRLQZrikz 2512409551U, // VPSRLQZrm 2197836751U, // VPSRLQZrmk 352342991U, // VPSRLQZrmkz 2512409551U, // VPSRLQZrr 2197836751U, // VPSRLQZrrk 352342991U, // VPSRLQZrrkz 2484097999U, // VPSRLQri 2484097999U, // VPSRLQrm 2484097999U, // VPSRLQrr 2484096271U, // VPSRLVDYrm 2484096271U, // VPSRLVDYrr 2512407823U, // VPSRLVDZrm 2197835023U, // VPSRLVDZrmk 352341263U, // VPSRLVDZrmkz 2512407823U, // VPSRLVDZrr 2197835023U, // VPSRLVDZrrk 352341263U, // VPSRLVDZrrkz 2484096271U, // VPSRLVDrm 2484096271U, // VPSRLVDrr 2484098401U, // VPSRLVQYrm 2484098401U, // VPSRLVQYrr 2512409953U, // VPSRLVQZrm 2197837153U, // VPSRLVQZrmk 352343393U, // VPSRLVQZrmkz 2512409953U, // VPSRLVQZrr 2197837153U, // VPSRLVQZrrk 352343393U, // VPSRLVQZrrkz 2484098401U, // VPSRLVQrm 2484098401U, // VPSRLVQrr 2484100741U, // VPSRLWYri 2484100741U, // VPSRLWYrm 2484100741U, // VPSRLWYrr 2484100741U, // VPSRLWri 2484100741U, // VPSRLWrm 2484100741U, // VPSRLWrr 2484093600U, // VPSUBBYrm 2484093600U, // VPSUBBYrr 2498773664U, // VPSUBBZ128rm 2197832352U, // VPSUBBZ128rmk 352338592U, // VPSUBBZ128rmkz 2498773664U, // VPSUBBZ128rr 2197832352U, // VPSUBBZ128rrk 352338592U, // VPSUBBZ128rrkz 2498773664U, // VPSUBBZ256rm 2197832352U, // VPSUBBZ256rmk 352338592U, // VPSUBBZ256rmkz 2498773664U, // VPSUBBZ256rr 2197832352U, // VPSUBBZ256rrk 352338592U, // VPSUBBZ256rrkz 2498773664U, // VPSUBBZrm 2197832352U, // VPSUBBZrmk 352338592U, // VPSUBBZrmkz 2498773664U, // VPSUBBZrr 2197832352U, // VPSUBBZrrk 352338592U, // VPSUBBZrrkz 2484093600U, // VPSUBBrm 2484093600U, // VPSUBBrr 2484094290U, // VPSUBDYrm 2484094290U, // VPSUBDYrr 2498774354U, // VPSUBDZ128rm 2498774354U, // VPSUBDZ128rmb 2197833042U, // VPSUBDZ128rmbk 352339282U, // VPSUBDZ128rmbkz 2197833042U, // VPSUBDZ128rmk 352339282U, // VPSUBDZ128rmkz 2498774354U, // VPSUBDZ128rr 2197833042U, // VPSUBDZ128rrk 352339282U, // VPSUBDZ128rrkz 2498774354U, // VPSUBDZ256rm 2498774354U, // VPSUBDZ256rmb 2197833042U, // VPSUBDZ256rmbk 352339282U, // VPSUBDZ256rmbkz 2197833042U, // VPSUBDZ256rmk 352339282U, // VPSUBDZ256rmkz 2498774354U, // VPSUBDZ256rr 2197833042U, // VPSUBDZ256rrk 352339282U, // VPSUBDZ256rrkz 2498774354U, // VPSUBDZrm 2498774354U, // VPSUBDZrmb 2197833042U, // VPSUBDZrmbk 352339282U, // VPSUBDZrmbkz 2197833042U, // VPSUBDZrmk 352339282U, // VPSUBDZrmkz 2498774354U, // VPSUBDZrr 2197833042U, // VPSUBDZrrk 352339282U, // VPSUBDZrrkz 2484094290U, // VPSUBDrm 2484094290U, // VPSUBDrr 2484097602U, // VPSUBQYrm 2484097602U, // VPSUBQYrr 2498777666U, // VPSUBQZ128rm 2498777666U, // VPSUBQZ128rmb 2197836354U, // VPSUBQZ128rmbk 352342594U, // VPSUBQZ128rmbkz 2197836354U, // VPSUBQZ128rmk 352342594U, // VPSUBQZ128rmkz 2498777666U, // VPSUBQZ128rr 2197836354U, // VPSUBQZ128rrk 352342594U, // VPSUBQZ128rrkz 2498777666U, // VPSUBQZ256rm 2498777666U, // VPSUBQZ256rmb 2197836354U, // VPSUBQZ256rmbk 352342594U, // VPSUBQZ256rmbkz 2197836354U, // VPSUBQZ256rmk 352342594U, // VPSUBQZ256rmkz 2498777666U, // VPSUBQZ256rr 2197836354U, // VPSUBQZ256rrk 352342594U, // VPSUBQZ256rrkz 2498777666U, // VPSUBQZrm 2498777666U, // VPSUBQZrmb 2197836354U, // VPSUBQZrmbk 352342594U, // VPSUBQZrmbkz 2197836354U, // VPSUBQZrmk 352342594U, // VPSUBQZrmkz 2498777666U, // VPSUBQZrr 2197836354U, // VPSUBQZrrk 352342594U, // VPSUBQZrrkz 2484097602U, // VPSUBQrm 2484097602U, // VPSUBQrr 2484093844U, // VPSUBSBYrm 2484093844U, // VPSUBSBYrr 2484093844U, // VPSUBSBrm 2484093844U, // VPSUBSBrr 2484100937U, // VPSUBSWYrm 2484100937U, // VPSUBSWYrr 2484100937U, // VPSUBSWrm 2484100937U, // VPSUBSWrr 2484093885U, // VPSUBUSBYrm 2484093885U, // VPSUBUSBYrr 2484093885U, // VPSUBUSBrm 2484093885U, // VPSUBUSBrr 2484101019U, // VPSUBUSWYrm 2484101019U, // VPSUBUSWYrr 2484101019U, // VPSUBUSWrm 2484101019U, // VPSUBUSWrr 2484100515U, // VPSUBWYrm 2484100515U, // VPSUBWYrr 2498780579U, // VPSUBWZ128rm 2197839267U, // VPSUBWZ128rmk 352345507U, // VPSUBWZ128rmkz 2498780579U, // VPSUBWZ128rr 2197839267U, // VPSUBWZ128rrk 352345507U, // VPSUBWZ128rrkz 2498780579U, // VPSUBWZ256rm 2197839267U, // VPSUBWZ256rmk 352345507U, // VPSUBWZ256rmkz 2498780579U, // VPSUBWZ256rr 2197839267U, // VPSUBWZ256rrk 352345507U, // VPSUBWZ256rrkz 2498780579U, // VPSUBWZrm 2197839267U, // VPSUBWZrmk 352345507U, // VPSUBWZrmkz 2498780579U, // VPSUBWZrr 2197839267U, // VPSUBWZrrk 352345507U, // VPSUBWZrrkz 2484100515U, // VPSUBWrm 2484100515U, // VPSUBWrr 2484094595U, // VPTESTMDZrm 2484094595U, // VPTESTMDZrr 2484098055U, // VPTESTMQZrm 2484098055U, // VPTESTMQZrr 2484094568U, // VPTESTNMDZrm 2484094568U, // VPTESTNMDZrr 2484098028U, // VPTESTNMQZrm 2484098028U, // VPTESTNMQZrr 974150831U, // VPTESTYrm 336616623U, // VPTESTYrr 537943215U, // VPTESTrm 336616623U, // VPTESTrr 2484100461U, // VPUNPCKHBWYrm 2484100461U, // VPUNPCKHBWYrr 2484100461U, // VPUNPCKHBWrm 2484100461U, // VPUNPCKHBWrr 2484097715U, // VPUNPCKHDQYrm 2484097715U, // VPUNPCKHDQYrr 2484097715U, // VPUNPCKHDQZrm 2484097715U, // VPUNPCKHDQZrr 2484097715U, // VPUNPCKHDQrm 2484097715U, // VPUNPCKHDQrr 2484097792U, // VPUNPCKHQDQYrm 2484097792U, // VPUNPCKHQDQYrr 2484097792U, // VPUNPCKHQDQZrm 2484097792U, // VPUNPCKHQDQZrr 2484097792U, // VPUNPCKHQDQrm 2484097792U, // VPUNPCKHQDQrr 2484096329U, // VPUNPCKHWDYrm 2484096329U, // VPUNPCKHWDYrr 2484096329U, // VPUNPCKHWDrm 2484096329U, // VPUNPCKHWDrr 2484100483U, // VPUNPCKLBWYrm 2484100483U, // VPUNPCKLBWYrr 2484100483U, // VPUNPCKLBWrm 2484100483U, // VPUNPCKLBWrr 2484097727U, // VPUNPCKLDQYrm 2484097727U, // VPUNPCKLDQYrr 2484097727U, // VPUNPCKLDQZrm 2484097727U, // VPUNPCKLDQZrr 2484097727U, // VPUNPCKLDQrm 2484097727U, // VPUNPCKLDQrr 2484097805U, // VPUNPCKLQDQYrm 2484097805U, // VPUNPCKLQDQYrr 2484097805U, // VPUNPCKLQDQZrm 2484097805U, // VPUNPCKLQDQZrr 2484097805U, // VPUNPCKLQDQrm 2484097805U, // VPUNPCKLQDQrr 2484096341U, // VPUNPCKLWDYrm 2484096341U, // VPUNPCKLWDYrr 2484096341U, // VPUNPCKLWDrm 2484096341U, // VPUNPCKLWDrr 2498775698U, // VPXORDZ128rm 2498775698U, // VPXORDZ128rmb 2197834386U, // VPXORDZ128rmbk 352340626U, // VPXORDZ128rmbkz 2197834386U, // VPXORDZ128rmk 352340626U, // VPXORDZ128rmkz 2498775698U, // VPXORDZ128rr 2197834386U, // VPXORDZ128rrk 352340626U, // VPXORDZ128rrkz 2498775698U, // VPXORDZ256rm 2498775698U, // VPXORDZ256rmb 2197834386U, // VPXORDZ256rmbk 352340626U, // VPXORDZ256rmbkz 2197834386U, // VPXORDZ256rmk 352340626U, // VPXORDZ256rmkz 2498775698U, // VPXORDZ256rr 2197834386U, // VPXORDZ256rrk 352340626U, // VPXORDZ256rrkz 2498775698U, // VPXORDZrm 2498775698U, // VPXORDZrmb 2197834386U, // VPXORDZrmbk 352340626U, // VPXORDZrmbkz 2197834386U, // VPXORDZrmk 352340626U, // VPXORDZrmkz 2498775698U, // VPXORDZrr 2197834386U, // VPXORDZrrk 352340626U, // VPXORDZrrkz 2498778226U, // VPXORQZ128rm 2498778226U, // VPXORQZ128rmb 2197836914U, // VPXORQZ128rmbk 352343154U, // VPXORQZ128rmbkz 2197836914U, // VPXORQZ128rmk 352343154U, // VPXORQZ128rmkz 2498778226U, // VPXORQZ128rr 2197836914U, // VPXORQZ128rrk 352343154U, // VPXORQZ128rrkz 2498778226U, // VPXORQZ256rm 2498778226U, // VPXORQZ256rmb 2197836914U, // VPXORQZ256rmbk 352343154U, // VPXORQZ256rmbkz 2197836914U, // VPXORQZ256rmk 352343154U, // VPXORQZ256rmkz 2498778226U, // VPXORQZ256rr 2197836914U, // VPXORQZ256rrk 352343154U, // VPXORQZ256rrkz 2498778226U, // VPXORQZrm 2498778226U, // VPXORQZrmb 2197836914U, // VPXORQZrmbk 352343154U, // VPXORQZrmbkz 2197836914U, // VPXORQZrmk 352343154U, // VPXORQZrmkz 2498778226U, // VPXORQZrr 2197836914U, // VPXORQZrrk 352343154U, // VPXORQZrrkz 2484098562U, // VPXORYrm 2484098562U, // VPXORYrr 2484098562U, // VPXORrm 2484098562U, // VPXORrr 552618015U, // VRCP14PDZ128m 2733656095U, // VRCP14PDZ128mb 2197833759U, // VRCP14PDZ128mbk 352339999U, // VRCP14PDZ128mbkz 2197833759U, // VRCP14PDZ128mk 352339999U, // VRCP14PDZ128mkz 351291423U, // VRCP14PDZ128r 2197833759U, // VRCP14PDZ128rk 352339999U, // VRCP14PDZ128rkz 1055934495U, // VRCP14PDZ256m 586172447U, // VRCP14PDZ256mb 2197833759U, // VRCP14PDZ256mbk 352339999U, // VRCP14PDZ256mbkz 2197833759U, // VRCP14PDZ256mk 352339999U, // VRCP14PDZ256mkz 351291423U, // VRCP14PDZ256r 2197833759U, // VRCP14PDZ256rk 352339999U, // VRCP14PDZ256rkz 1089488927U, // VRCP14PDZm 2733656095U, // VRCP14PDZmb 2197833759U, // VRCP14PDZmbk 352339999U, // VRCP14PDZmbkz 2197833759U, // VRCP14PDZmk 352339999U, // VRCP14PDZmkz 351291423U, // VRCP14PDZr 2197833759U, // VRCP14PDZrk 352339999U, // VRCP14PDZrkz 552622073U, // VRCP14PSZ128m 619730937U, // VRCP14PSZ128mb 2197837817U, // VRCP14PSZ128mbk 352344057U, // VRCP14PSZ128mbkz 2197837817U, // VRCP14PSZ128mk 352344057U, // VRCP14PSZ128mkz 351295481U, // VRCP14PSZ128r 2197837817U, // VRCP14PSZ128rk 352344057U, // VRCP14PSZ128rkz 1055938553U, // VRCP14PSZ256m 2767214585U, // VRCP14PSZ256mb 2197837817U, // VRCP14PSZ256mbk 352344057U, // VRCP14PSZ256mbkz 2197837817U, // VRCP14PSZ256mk 352344057U, // VRCP14PSZ256mkz 351295481U, // VRCP14PSZ256r 2197837817U, // VRCP14PSZ256rk 352344057U, // VRCP14PSZ256rkz 1089492985U, // VRCP14PSZm 619730937U, // VRCP14PSZmb 2197837817U, // VRCP14PSZmbk 352344057U, // VRCP14PSZmbkz 2197837817U, // VRCP14PSZmk 352344057U, // VRCP14PSZmkz 351295481U, // VRCP14PSZr 2197837817U, // VRCP14PSZrk 352344057U, // VRCP14PSZrkz 2484095866U, // VRCP14SDrm 2484095866U, // VRCP14SDrr 2484099843U, // VRCP14SSrm 2484099843U, // VRCP14SSrr 1089488949U, // VRCP28PDm 1089488949U, // VRCP28PDmb 2197833781U, // VRCP28PDmbk 352340021U, // VRCP28PDmbkz 2197833781U, // VRCP28PDmk 352340021U, // VRCP28PDmkz 351291445U, // VRCP28PDr 1126189109U, // VRCP28PDrb 2197833781U, // VRCP28PDrbk 352340021U, // VRCP28PDrbkz 2197833781U, // VRCP28PDrk 352340021U, // VRCP28PDrkz 1089493007U, // VRCP28PSm 1089493007U, // VRCP28PSmb 2197837839U, // VRCP28PSmbk 352344079U, // VRCP28PSmbkz 2197837839U, // VRCP28PSmk 352344079U, // VRCP28PSmkz 351295503U, // VRCP28PSr 1126193167U, // VRCP28PSrb 2197837839U, // VRCP28PSrbk 352344079U, // VRCP28PSrbkz 2197837839U, // VRCP28PSrk 352344079U, // VRCP28PSrkz 2498775952U, // VRCP28SDm 2197834640U, // VRCP28SDmk 352340880U, // VRCP28SDmkz 2498775952U, // VRCP28SDr 3407891344U, // VRCP28SDrb 2197834640U, // VRCP28SDrbk 352340880U, // VRCP28SDrbkz 2197834640U, // VRCP28SDrk 352340880U, // VRCP28SDrkz 2498779929U, // VRCP28SSm 2197838617U, // VRCP28SSmk 352344857U, // VRCP28SSmkz 2498779929U, // VRCP28SSr 3407895321U, // VRCP28SSrb 2197838617U, // VRCP28SSrbk 352344857U, // VRCP28SSrbkz 2197838617U, // VRCP28SSrk 352344857U, // VRCP28SSrkz 1041258868U, // VRCPPSYm 1041258868U, // VRCPPSYm_Int 336615796U, // VRCPPSYr 336615796U, // VRCPPSYr_Int 537942388U, // VRCPPSm 537942388U, // VRCPPSm_Int 336615796U, // VRCPPSr 336615796U, // VRCPPSr_Int 2484100003U, // VRCPSSm 2484100003U, // VRCPSSm_Int 2484100003U, // VRCPSSr 3222292749U, // VRNDSCALEPDZm 2484095245U, // VRNDSCALEPDZr 3222296799U, // VRNDSCALEPSZm 2484099295U, // VRNDSCALEPSZr 2498776050U, // VRNDSCALESDm 2197834738U, // VRNDSCALESDmk 352340978U, // VRNDSCALESDmkz 2498776050U, // VRNDSCALESDr 3407891442U, // VRNDSCALESDrb 2197834738U, // VRNDSCALESDrbk 352340978U, // VRNDSCALESDrbkz 2197834738U, // VRNDSCALESDrk 352340978U, // VRNDSCALESDrkz 2498780019U, // VRNDSCALESSm 2197838707U, // VRNDSCALESSmk 352344947U, // VRNDSCALESSmkz 2498780019U, // VRNDSCALESSr 3407895411U, // VRNDSCALESSrb 2197838707U, // VRNDSCALESSrbk 352344947U, // VRNDSCALESSrbkz 2197838707U, // VRNDSCALESSrk 352344947U, // VRNDSCALESSrkz 2685421802U, // VROUNDPDm 2484095210U, // VROUNDPDr 2685425852U, // VROUNDPSm 2484099260U, // VROUNDPSr 2484095976U, // VROUNDSDm 2484095976U, // VROUNDSDr 2484095976U, // VROUNDSDr_Int 2484099945U, // VROUNDSSm 2484099945U, // VROUNDSSr 2484099945U, // VROUNDSSr_Int 3188738282U, // VROUNDYPDm 2484095210U, // VROUNDYPDr 3188742332U, // VROUNDYPSm 2484099260U, // VROUNDYPSr 552618025U, // VRSQRT14PDZ128m 2733656105U, // VRSQRT14PDZ128mb 2197833769U, // VRSQRT14PDZ128mbk 352340009U, // VRSQRT14PDZ128mbkz 2197833769U, // VRSQRT14PDZ128mk 352340009U, // VRSQRT14PDZ128mkz 351291433U, // VRSQRT14PDZ128r 2197833769U, // VRSQRT14PDZ128rk 352340009U, // VRSQRT14PDZ128rkz 1055934505U, // VRSQRT14PDZ256m 586172457U, // VRSQRT14PDZ256mb 2197833769U, // VRSQRT14PDZ256mbk 352340009U, // VRSQRT14PDZ256mbkz 2197833769U, // VRSQRT14PDZ256mk 352340009U, // VRSQRT14PDZ256mkz 351291433U, // VRSQRT14PDZ256r 2197833769U, // VRSQRT14PDZ256rk 352340009U, // VRSQRT14PDZ256rkz 1089488937U, // VRSQRT14PDZm 2733656105U, // VRSQRT14PDZmb 2197833769U, // VRSQRT14PDZmbk 352340009U, // VRSQRT14PDZmbkz 2197833769U, // VRSQRT14PDZmk 352340009U, // VRSQRT14PDZmkz 351291433U, // VRSQRT14PDZr 2197833769U, // VRSQRT14PDZrk 352340009U, // VRSQRT14PDZrkz 552622083U, // VRSQRT14PSZ128m 619730947U, // VRSQRT14PSZ128mb 2197837827U, // VRSQRT14PSZ128mbk 352344067U, // VRSQRT14PSZ128mbkz 2197837827U, // VRSQRT14PSZ128mk 352344067U, // VRSQRT14PSZ128mkz 351295491U, // VRSQRT14PSZ128r 2197837827U, // VRSQRT14PSZ128rk 352344067U, // VRSQRT14PSZ128rkz 1055938563U, // VRSQRT14PSZ256m 2767214595U, // VRSQRT14PSZ256mb 2197837827U, // VRSQRT14PSZ256mbk 352344067U, // VRSQRT14PSZ256mbkz 2197837827U, // VRSQRT14PSZ256mk 352344067U, // VRSQRT14PSZ256mkz 351295491U, // VRSQRT14PSZ256r 2197837827U, // VRSQRT14PSZ256rk 352344067U, // VRSQRT14PSZ256rkz 1089492995U, // VRSQRT14PSZm 619730947U, // VRSQRT14PSZmb 2197837827U, // VRSQRT14PSZmbk 352344067U, // VRSQRT14PSZmbkz 2197837827U, // VRSQRT14PSZmk 352344067U, // VRSQRT14PSZmkz 351295491U, // VRSQRT14PSZr 2197837827U, // VRSQRT14PSZrk 352344067U, // VRSQRT14PSZrkz 2484095876U, // VRSQRT14SDrm 2484095876U, // VRSQRT14SDrr 2484099853U, // VRSQRT14SSrm 2484099853U, // VRSQRT14SSrr 1089488959U, // VRSQRT28PDm 1089488959U, // VRSQRT28PDmb 2197833791U, // VRSQRT28PDmbk 352340031U, // VRSQRT28PDmbkz 2197833791U, // VRSQRT28PDmk 352340031U, // VRSQRT28PDmkz 351291455U, // VRSQRT28PDr 1126189119U, // VRSQRT28PDrb 2197833791U, // VRSQRT28PDrbk 352340031U, // VRSQRT28PDrbkz 2197833791U, // VRSQRT28PDrk 352340031U, // VRSQRT28PDrkz 1089493017U, // VRSQRT28PSm 1089493017U, // VRSQRT28PSmb 2197837849U, // VRSQRT28PSmbk 352344089U, // VRSQRT28PSmbkz 2197837849U, // VRSQRT28PSmk 352344089U, // VRSQRT28PSmkz 351295513U, // VRSQRT28PSr 1126193177U, // VRSQRT28PSrb 2197837849U, // VRSQRT28PSrbk 352344089U, // VRSQRT28PSrbkz 2197837849U, // VRSQRT28PSrk 352344089U, // VRSQRT28PSrkz 2498775962U, // VRSQRT28SDm 2197834650U, // VRSQRT28SDmk 352340890U, // VRSQRT28SDmkz 2498775962U, // VRSQRT28SDr 3407891354U, // VRSQRT28SDrb 2197834650U, // VRSQRT28SDrbk 352340890U, // VRSQRT28SDrbkz 2197834650U, // VRSQRT28SDrk 352340890U, // VRSQRT28SDrkz 2498779939U, // VRSQRT28SSm 2197838627U, // VRSQRT28SSmk 352344867U, // VRSQRT28SSmkz 2498779939U, // VRSQRT28SSr 3407895331U, // VRSQRT28SSrb 2197838627U, // VRSQRT28SSrbk 352344867U, // VRSQRT28SSrbkz 2197838627U, // VRSQRT28SSrk 352344867U, // VRSQRT28SSrkz 1041258977U, // VRSQRTPSYm 1041258977U, // VRSQRTPSYm_Int 336615905U, // VRSQRTPSYr 336615905U, // VRSQRTPSYr_Int 537942497U, // VRSQRTPSm 537942497U, // VRSQRTPSm_Int 336615905U, // VRSQRTPSr 336615905U, // VRSQRTPSr_Int 2484100028U, // VRSQRTSSm 2484100028U, // VRSQRTSSm_Int 2484100028U, // VRSQRTSSr 1393166592U, // VSCATTERDPDZmr 1393154258U, // VSCATTERDPSZmr 321940572U, // VSCATTERPF0DPDm 321940704U, // VSCATTERPF0DPSm 389049502U, // VSCATTERPF0QPDm 389049634U, // VSCATTERPF0QPSm 321940605U, // VSCATTERPF1DPDm 321940737U, // VSCATTERPF1DPSm 389049535U, // VSCATTERPF1QPDm 389049667U, // VSCATTERPF1QPSm 1393166769U, // VSCATTERQPDZmr 1393170839U, // VSCATTERQPSZmr 2484095258U, // VSHUFPDYrmi 2484095258U, // VSHUFPDYrri 2484095258U, // VSHUFPDZrmi 2484095258U, // VSHUFPDZrri 2484095258U, // VSHUFPDrmi 2484095258U, // VSHUFPDrri 2484099308U, // VSHUFPSYrmi 2484099308U, // VSHUFPSYrri 2484099308U, // VSHUFPSZrmi 2484099308U, // VSHUFPSZrri 2484099308U, // VSHUFPSrmi 2484099308U, // VSHUFPSrri 1041254884U, // VSQRTPDYm 336611812U, // VSQRTPDYr 552618468U, // VSQRTPDZ128m 2733656548U, // VSQRTPDZ128mb 2197834212U, // VSQRTPDZ128mbk 352340452U, // VSQRTPDZ128mbkz 2197834212U, // VSQRTPDZ128mk 352340452U, // VSQRTPDZ128mkz 351291876U, // VSQRTPDZ128r 2197834212U, // VSQRTPDZ128rk 352340452U, // VSQRTPDZ128rkz 1055934948U, // VSQRTPDZ256m 586172900U, // VSQRTPDZ256mb 2197834212U, // VSQRTPDZ256mbk 352340452U, // VSQRTPDZ256mbkz 2197834212U, // VSQRTPDZ256mk 352340452U, // VSQRTPDZ256mkz 351291876U, // VSQRTPDZ256r 2197834212U, // VSQRTPDZ256rk 352340452U, // VSQRTPDZ256rkz 1089489380U, // VSQRTPDZm 2733656548U, // VSQRTPDZmb 2197834212U, // VSQRTPDZmbk 352340452U, // VSQRTPDZmbkz 2197834212U, // VSQRTPDZmk 352340452U, // VSQRTPDZmkz 351291876U, // VSQRTPDZr 2197834212U, // VSQRTPDZrk 352340452U, // VSQRTPDZrkz 537938404U, // VSQRTPDm 336611812U, // VSQRTPDr 1041258987U, // VSQRTPSYm 336615915U, // VSQRTPSYr 552622571U, // VSQRTPSZ128m 619731435U, // VSQRTPSZ128mb 2197838315U, // VSQRTPSZ128mbk 352344555U, // VSQRTPSZ128mbkz 2197838315U, // VSQRTPSZ128mk 352344555U, // VSQRTPSZ128mkz 351295979U, // VSQRTPSZ128r 2197838315U, // VSQRTPSZ128rk 352344555U, // VSQRTPSZ128rkz 1055939051U, // VSQRTPSZ256m 2767215083U, // VSQRTPSZ256mb 2197838315U, // VSQRTPSZ256mbk 352344555U, // VSQRTPSZ256mbkz 2197838315U, // VSQRTPSZ256mk 352344555U, // VSQRTPSZ256mkz 351295979U, // VSQRTPSZ256r 2197838315U, // VSQRTPSZ256rk 352344555U, // VSQRTPSZ256rkz 1089493483U, // VSQRTPSZm 619731435U, // VSQRTPSZmb 2197838315U, // VSQRTPSZmbk 352344555U, // VSQRTPSZmbkz 2197838315U, // VSQRTPSZmk 352344555U, // VSQRTPSZmkz 351295979U, // VSQRTPSZr 2197838315U, // VSQRTPSZrk 352344555U, // VSQRTPSZrkz 537942507U, // VSQRTPSm 336615915U, // VSQRTPSr 2484096080U, // VSQRTSDZm 2484096080U, // VSQRTSDZm_Int 2484096080U, // VSQRTSDZr 2484096080U, // VSQRTSDZr_Int 2484096080U, // VSQRTSDm 2484096080U, // VSQRTSDm_Int 2484096080U, // VSQRTSDr 2484100038U, // VSQRTSSZm 2484100038U, // VSQRTSSZm_Int 2484100038U, // VSQRTSSZr 2484100038U, // VSQRTSSZr_Int 2484100038U, // VSQRTSSm 2484100038U, // VSQRTSSm_Int 2484100038U, // VSQRTSSr 71198U, // VSTMXCSR 2484095122U, // VSUBPDYrm 2484095122U, // VSUBPDYrr 2498775186U, // VSUBPDZ128rm 2498775186U, // VSUBPDZ128rmb 2197833874U, // VSUBPDZ128rmbk 352340114U, // VSUBPDZ128rmbkz 2197833874U, // VSUBPDZ128rmk 352340114U, // VSUBPDZ128rmkz 2498775186U, // VSUBPDZ128rr 2197833874U, // VSUBPDZ128rrk 352340114U, // VSUBPDZ128rrkz 2498775186U, // VSUBPDZ256rm 2498775186U, // VSUBPDZ256rmb 2197833874U, // VSUBPDZ256rmbk 352340114U, // VSUBPDZ256rmbkz 2197833874U, // VSUBPDZ256rmk 352340114U, // VSUBPDZ256rmkz 2498775186U, // VSUBPDZ256rr 2197833874U, // VSUBPDZ256rrk 352340114U, // VSUBPDZ256rrkz 2498775186U, // VSUBPDZrb 2197833874U, // VSUBPDZrbk 352340114U, // VSUBPDZrbkz 2498775186U, // VSUBPDZrm 2498775186U, // VSUBPDZrmb 2197833874U, // VSUBPDZrmbk 352340114U, // VSUBPDZrmbkz 2197833874U, // VSUBPDZrmk 352340114U, // VSUBPDZrmkz 2498775186U, // VSUBPDZrr 2197833874U, // VSUBPDZrrk 352340114U, // VSUBPDZrrkz 2484095122U, // VSUBPDrm 2484095122U, // VSUBPDrr 2484099172U, // VSUBPSYrm 2484099172U, // VSUBPSYrr 2498779236U, // VSUBPSZ128rm 2498779236U, // VSUBPSZ128rmb 2197837924U, // VSUBPSZ128rmbk 352344164U, // VSUBPSZ128rmbkz 2197837924U, // VSUBPSZ128rmk 352344164U, // VSUBPSZ128rmkz 2498779236U, // VSUBPSZ128rr 2197837924U, // VSUBPSZ128rrk 352344164U, // VSUBPSZ128rrkz 2498779236U, // VSUBPSZ256rm 2498779236U, // VSUBPSZ256rmb 2197837924U, // VSUBPSZ256rmbk 352344164U, // VSUBPSZ256rmbkz 2197837924U, // VSUBPSZ256rmk 352344164U, // VSUBPSZ256rmkz 2498779236U, // VSUBPSZ256rr 2197837924U, // VSUBPSZ256rrk 352344164U, // VSUBPSZ256rrkz 2498779236U, // VSUBPSZrb 2197837924U, // VSUBPSZrbk 352344164U, // VSUBPSZrbkz 2498779236U, // VSUBPSZrm 2498779236U, // VSUBPSZrmb 2197837924U, // VSUBPSZrmbk 352344164U, // VSUBPSZrmbkz 2197837924U, // VSUBPSZrmk 352344164U, // VSUBPSZrmkz 2498779236U, // VSUBPSZrr 2197837924U, // VSUBPSZrrk 352344164U, // VSUBPSZrrkz 2484099172U, // VSUBPSrm 2484099172U, // VSUBPSrr 2484095939U, // VSUBSDZrm 2498776003U, // VSUBSDZrm_Int 2197834691U, // VSUBSDZrm_Intk 352340931U, // VSUBSDZrm_Intkz 2484095939U, // VSUBSDZrr 2498776003U, // VSUBSDZrr_Int 2197834691U, // VSUBSDZrr_Intk 352340931U, // VSUBSDZrr_Intkz 2498776003U, // VSUBSDZrrb 2197834691U, // VSUBSDZrrbk 352340931U, // VSUBSDZrrbkz 2484095939U, // VSUBSDrm 2484095939U, // VSUBSDrm_Int 2484095939U, // VSUBSDrr 2484095939U, // VSUBSDrr_Int 2484099908U, // VSUBSSZrm 2498779972U, // VSUBSSZrm_Int 2197838660U, // VSUBSSZrm_Intk 352344900U, // VSUBSSZrm_Intkz 2484099908U, // VSUBSSZrr 2498779972U, // VSUBSSZrr_Int 2197838660U, // VSUBSSZrr_Intk 352344900U, // VSUBSSZrr_Intkz 2498779972U, // VSUBSSZrrb 2197838660U, // VSUBSSZrrbk 352344900U, // VSUBSSZrrbkz 2484099908U, // VSUBSSrm 2484099908U, // VSUBSSrm_Int 2484099908U, // VSUBSSrr 2484099908U, // VSUBSSrr_Int 1041254893U, // VTESTPDYrm 336611821U, // VTESTPDYrr 537938413U, // VTESTPDrm 336611821U, // VTESTPDrr 1041258996U, // VTESTPSYrm 336615924U, // VTESTPSYrr 537942516U, // VTESTPSrm 336615924U, // VTESTPSrr 571493375U, // VUCOMISDZrm 336612351U, // VUCOMISDZrr 571493375U, // VUCOMISDrm 336612351U, // VUCOMISDrr 605051776U, // VUCOMISSZrm 336616320U, // VUCOMISSZrr 605051776U, // VUCOMISSrm 336616320U, // VUCOMISSrr 2484095267U, // VUNPCKHPDYrm 2484095267U, // VUNPCKHPDYrr 2484095267U, // VUNPCKHPDZrm 2484095267U, // VUNPCKHPDZrr 2484095267U, // VUNPCKHPDrm 2484095267U, // VUNPCKHPDrr 2484099317U, // VUNPCKHPSYrm 2484099317U, // VUNPCKHPSYrr 2484099317U, // VUNPCKHPSZrm 2484099317U, // VUNPCKHPSZrr 2484099317U, // VUNPCKHPSrm 2484099317U, // VUNPCKHPSrr 2484095309U, // VUNPCKLPDYrm 2484095309U, // VUNPCKLPDYrr 2484095309U, // VUNPCKLPDZrm 2484095309U, // VUNPCKLPDZrr 2484095309U, // VUNPCKLPDrm 2484095309U, // VUNPCKLPDrr 2484099379U, // VUNPCKLPSYrm 2484099379U, // VUNPCKLPSYrr 2484099379U, // VUNPCKLPSZrm 2484099379U, // VUNPCKLPSZrr 2484099379U, // VUNPCKLPSrm 2484099379U, // VUNPCKLPSrr 2484095429U, // VXORPDYrm 2484095429U, // VXORPDYrr 2484095429U, // VXORPDrm 2484095429U, // VXORPDrr 2484099499U, // VXORPSYrm 2484099499U, // VXORPSYrr 2484099499U, // VXORPSrm 2484099499U, // VXORPSrr 10541U, // VZEROALL 10774U, // VZEROUPPER 0U, // V_SET0 0U, // V_SETALLONES 11035U, // WAIT 10269U, // WBINVD 10604U, // WIN_ALLOCA 10474U, // WIN_FTOL_32 10474U, // WIN_FTOL_64 20048U, // WRFSBASE 20048U, // WRFSBASE64 20068U, // WRGSBASE 20068U, // WRGSBASE64 10808U, // WRMSR 23684U, // XABORT 10340U, // XACQUIRE_PREFIX 1082750U, // XADD16rm 336610686U, // XADD16rr 1115518U, // XADD32rm 336610686U, // XADD32rr 1131902U, // XADD64rm 336610686U, // XADD64rr 1148286U, // XADD8rm 336610686U, // XADD8rr 10009U, // XBEGIN 151732U, // XBEGIN_2 151732U, // XBEGIN_4 25102U, // XCHG16ar 462514U, // XCHG16rm 822962U, // XCHG16rr 25265U, // XCHG32ar 25265U, // XCHG32ar64 478898U, // XCHG32rm 822962U, // XCHG32rr 25389U, // XCHG64ar 495282U, // XCHG64rm 822962U, // XCHG64rr 511666U, // XCHG8rm 822962U, // XCHG8rr 20187U, // XCH_F 10158U, // XCRYPTCBC 10102U, // XCRYPTCFB 10814U, // XCRYPTCTR 10092U, // XCRYPTECB 10112U, // XCRYPTOFB 10234U, // XEND 11098U, // XGETBV 10142U, // XLAT 25129U, // XOR16i16 1086980U, // XOR16mi 1086980U, // XOR16mi8 1086980U, // XOR16mr 34657796U, // XOR16ri 34657796U, // XOR16ri8 68212228U, // XOR16rm 34657796U, // XOR16rr 34625028U, // XOR16rr_REV 25295U, // XOR32i32 1119748U, // XOR32mi 1119748U, // XOR32mi8 1119748U, // XOR32mr 34657796U, // XOR32ri 34657796U, // XOR32ri8 101766660U, // XOR32rm 34657796U, // XOR32rr 34625028U, // XOR32rr_REV 25434U, // XOR64i32 1136132U, // XOR64mi32 1136132U, // XOR64mi8 1136132U, // XOR64mr 34657796U, // XOR64ri32 34657796U, // XOR64ri8 135321092U, // XOR64rm 34657796U, // XOR64rr 34625028U, // XOR64rr_REV 25017U, // XOR8i8 1152516U, // XOR8mi 1152516U, // XOR8mi8 1152516U, // XOR8mr 34657796U, // XOR8ri 34657796U, // XOR8ri8 168875524U, // XOR8rm 34657796U, // XOR8rr 34625028U, // XOR8rr_REV 202394054U, // XORPDrm 34621894U, // XORPDrr 202398124U, // XORPSrm 34625964U, // XORPSrr 10356U, // XRELEASE_PREFIX 284154U, // XRSTOR 278741U, // XRSTOR64 285238U, // XRSTORS 278761U, // XRSTORS64 282257U, // XSAVE 278731U, // XSAVE64 279726U, // XSAVEC 278720U, // XSAVEC64 285806U, // XSAVEOPT 278772U, // XSAVEOPT64 284267U, // XSAVES 278751U, // XSAVES64 11105U, // XSETBV 9736U, // XSHA1 9971U, // XSHA256 10349U, // XSTORE 11081U, // XTEST 10675U, // fdisi8087_nop 10662U, // feni8087_nop 0U }; static const uint32_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // AAA 0U, // AAD8i8 0U, // AAM8i8 0U, // AAS 0U, // ABS_F 0U, // ABS_Fp32 0U, // ABS_Fp64 0U, // ABS_Fp80 0U, // ACQUIRE_MOV16rm 0U, // ACQUIRE_MOV32rm 0U, // ACQUIRE_MOV64rm 0U, // ACQUIRE_MOV8rm 0U, // ADC16i16 0U, // ADC16mi 0U, // ADC16mi8 0U, // ADC16mr 0U, // ADC16ri 0U, // ADC16ri8 0U, // ADC16rm 0U, // ADC16rr 0U, // ADC16rr_REV 0U, // ADC32i32 0U, // ADC32mi 0U, // ADC32mi8 0U, // ADC32mr 0U, // ADC32ri 0U, // ADC32ri8 0U, // ADC32rm 0U, // ADC32rr 0U, // ADC32rr_REV 0U, // ADC64i32 0U, // ADC64mi32 0U, // ADC64mi8 0U, // ADC64mr 0U, // ADC64ri32 0U, // ADC64ri8 0U, // ADC64rm 0U, // ADC64rr 0U, // ADC64rr_REV 0U, // ADC8i8 0U, // ADC8mi 0U, // ADC8mi8 0U, // ADC8mr 0U, // ADC8ri 0U, // ADC8ri8 0U, // ADC8rm 0U, // ADC8rr 0U, // ADC8rr_REV 0U, // ADCX32rm 0U, // ADCX32rr 0U, // ADCX64rm 0U, // ADCX64rr 0U, // ADD16i16 0U, // ADD16mi 0U, // ADD16mi8 0U, // ADD16mr 0U, // ADD16ri 0U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 0U, // ADD16rm 0U, // ADD16rr 0U, // ADD16rr_DB 0U, // ADD16rr_REV 0U, // ADD32i32 0U, // ADD32mi 0U, // ADD32mi8 0U, // ADD32mr 0U, // ADD32ri 0U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 0U, // ADD32rm 0U, // ADD32rr 0U, // ADD32rr_DB 0U, // ADD32rr_REV 0U, // ADD64i32 0U, // ADD64mi32 0U, // ADD64mi8 0U, // ADD64mr 0U, // ADD64ri32 0U, // ADD64ri32_DB 0U, // ADD64ri8 0U, // ADD64ri8_DB 0U, // ADD64rm 0U, // ADD64rr 0U, // ADD64rr_DB 0U, // ADD64rr_REV 0U, // ADD8i8 0U, // ADD8mi 0U, // ADD8mi8 0U, // ADD8mr 0U, // ADD8ri 0U, // ADD8ri8 0U, // ADD8rm 0U, // ADD8rr 0U, // ADD8rr_REV 0U, // ADDPDrm 0U, // ADDPDrr 0U, // ADDPSrm 0U, // ADDPSrr 0U, // ADDSDrm 0U, // ADDSDrm_Int 0U, // ADDSDrr 0U, // ADDSDrr_Int 0U, // ADDSSrm 0U, // ADDSSrm_Int 0U, // ADDSSrr 0U, // ADDSSrr_Int 0U, // ADDSUBPDrm 0U, // ADDSUBPDrr 0U, // ADDSUBPSrm 0U, // ADDSUBPSrr 0U, // ADD_F32m 0U, // ADD_F64m 0U, // ADD_FI16m 0U, // ADD_FI32m 0U, // ADD_FPrST0 0U, // ADD_FST0r 0U, // ADD_Fp32 0U, // ADD_Fp32m 0U, // ADD_Fp64 0U, // ADD_Fp64m 0U, // ADD_Fp64m32 0U, // ADD_Fp80 0U, // ADD_Fp80m32 0U, // ADD_Fp80m64 0U, // ADD_FpI16m32 0U, // ADD_FpI16m64 0U, // ADD_FpI16m80 0U, // ADD_FpI32m32 0U, // ADD_FpI32m64 0U, // ADD_FpI32m80 0U, // ADD_FrST0 0U, // ADJCALLSTACKDOWN32 0U, // ADJCALLSTACKDOWN64 0U, // ADJCALLSTACKUP32 0U, // ADJCALLSTACKUP64 0U, // ADOX32rm 0U, // ADOX32rr 0U, // ADOX64rm 0U, // ADOX64rr 0U, // AESDECLASTrm 0U, // AESDECLASTrr 0U, // AESDECrm 0U, // AESDECrr 0U, // AESENCLASTrm 0U, // AESENCLASTrr 0U, // AESENCrm 0U, // AESENCrr 0U, // AESIMCrm 0U, // AESIMCrr 0U, // AESKEYGENASSIST128rm 16U, // AESKEYGENASSIST128rr 0U, // AND16i16 0U, // AND16mi 0U, // AND16mi8 0U, // AND16mr 0U, // AND16ri 0U, // AND16ri8 0U, // AND16rm 0U, // AND16rr 0U, // AND16rr_REV 0U, // AND32i32 0U, // AND32mi 0U, // AND32mi8 0U, // AND32mr 0U, // AND32ri 0U, // AND32ri8 0U, // AND32rm 0U, // AND32rr 0U, // AND32rr_REV 0U, // AND64i32 0U, // AND64mi32 0U, // AND64mi8 0U, // AND64mr 0U, // AND64ri32 0U, // AND64ri8 0U, // AND64rm 0U, // AND64rr 0U, // AND64rr_REV 0U, // AND8i8 0U, // AND8mi 0U, // AND8mi8 0U, // AND8mr 0U, // AND8ri 0U, // AND8ri8 0U, // AND8rm 0U, // AND8rr 0U, // AND8rr_REV 32U, // ANDN32rm 48U, // ANDN32rr 64U, // ANDN64rm 48U, // ANDN64rr 0U, // ANDNPDrm 0U, // ANDNPDrr 0U, // ANDNPSrm 0U, // ANDNPSrr 0U, // ANDPDrm 0U, // ANDPDrr 0U, // ANDPSrm 0U, // ANDPSrr 0U, // ARPL16mr 0U, // ARPL16rr 0U, // AVX2_SETALLONES 0U, // AVX512_512_SET0 0U, // AVX_SET0 80U, // BEXTR32rm 48U, // BEXTR32rr 80U, // BEXTR64rm 48U, // BEXTR64rr 80U, // BEXTRI32mi 48U, // BEXTRI32ri 80U, // BEXTRI64mi 48U, // BEXTRI64ri 0U, // BLCFILL32rm 0U, // BLCFILL32rr 0U, // BLCFILL64rm 0U, // BLCFILL64rr 0U, // BLCI32rm 0U, // BLCI32rr 0U, // BLCI64rm 0U, // BLCI64rr 0U, // BLCIC32rm 0U, // BLCIC32rr 0U, // BLCIC64rm 0U, // BLCIC64rr 0U, // BLCMSK32rm 0U, // BLCMSK32rr 0U, // BLCMSK64rm 0U, // BLCMSK64rr 0U, // BLCS32rm 0U, // BLCS32rr 0U, // BLCS64rm 0U, // BLCS64rr 96U, // BLENDPDrmi 112U, // BLENDPDrri 96U, // BLENDPSrmi 112U, // BLENDPSrri 0U, // BLENDVPDrm0 0U, // BLENDVPDrr0 0U, // BLENDVPSrm0 0U, // BLENDVPSrr0 0U, // BLSFILL32rm 0U, // BLSFILL32rr 0U, // BLSFILL64rm 0U, // BLSFILL64rr 0U, // BLSI32rm 0U, // BLSI32rr 0U, // BLSI64rm 0U, // BLSI64rr 0U, // BLSIC32rm 0U, // BLSIC32rr 0U, // BLSIC64rm 0U, // BLSIC64rr 0U, // BLSMSK32rm 0U, // BLSMSK32rr 0U, // BLSMSK64rm 0U, // BLSMSK64rr 0U, // BLSR32rm 0U, // BLSR32rr 0U, // BLSR64rm 0U, // BLSR64rr 0U, // BOUNDS16rm 0U, // BOUNDS32rm 0U, // BSF16rm 0U, // BSF16rr 0U, // BSF32rm 0U, // BSF32rr 0U, // BSF64rm 0U, // BSF64rr 0U, // BSR16rm 0U, // BSR16rr 0U, // BSR32rm 0U, // BSR32rr 0U, // BSR64rm 0U, // BSR64rr 0U, // BSWAP32r 0U, // BSWAP64r 0U, // BT16mi8 0U, // BT16mr 0U, // BT16ri8 0U, // BT16rr 0U, // BT32mi8 0U, // BT32mr 0U, // BT32ri8 0U, // BT32rr 0U, // BT64mi8 0U, // BT64mr 0U, // BT64ri8 0U, // BT64rr 0U, // BTC16mi8 0U, // BTC16mr 0U, // BTC16ri8 0U, // BTC16rr 0U, // BTC32mi8 0U, // BTC32mr 0U, // BTC32ri8 0U, // BTC32rr 0U, // BTC64mi8 0U, // BTC64mr 0U, // BTC64ri8 0U, // BTC64rr 0U, // BTR16mi8 0U, // BTR16mr 0U, // BTR16ri8 0U, // BTR16rr 0U, // BTR32mi8 0U, // BTR32mr 0U, // BTR32ri8 0U, // BTR32rr 0U, // BTR64mi8 0U, // BTR64mr 0U, // BTR64ri8 0U, // BTR64rr 0U, // BTS16mi8 0U, // BTS16mr 0U, // BTS16ri8 0U, // BTS16rr 0U, // BTS32mi8 0U, // BTS32mr 0U, // BTS32ri8 0U, // BTS32rr 0U, // BTS64mi8 0U, // BTS64mr 0U, // BTS64ri8 0U, // BTS64rr 80U, // BZHI32rm 48U, // BZHI32rr 80U, // BZHI64rm 48U, // BZHI64rr 0U, // CALL16m 0U, // CALL16r 0U, // CALL32m 0U, // CALL32r 0U, // CALL64m 0U, // CALL64pcrel32 0U, // CALL64r 0U, // CALLpcrel16 0U, // CALLpcrel32 0U, // CBW 0U, // CDQ 0U, // CDQE 0U, // CHS_F 0U, // CHS_Fp32 0U, // CHS_Fp64 0U, // CHS_Fp80 0U, // CLAC 0U, // CLC 0U, // CLD 0U, // CLFLUSH 0U, // CLFLUSHOPT 0U, // CLGI 0U, // CLI 0U, // CLTS 0U, // CLWB 0U, // CMC 0U, // CMOVA16rm 0U, // CMOVA16rr 0U, // CMOVA32rm 0U, // CMOVA32rr 0U, // CMOVA64rm 0U, // CMOVA64rr 0U, // CMOVAE16rm 0U, // CMOVAE16rr 0U, // CMOVAE32rm 0U, // CMOVAE32rr 0U, // CMOVAE64rm 0U, // CMOVAE64rr 0U, // CMOVB16rm 0U, // CMOVB16rr 0U, // CMOVB32rm 0U, // CMOVB32rr 0U, // CMOVB64rm 0U, // CMOVB64rr 0U, // CMOVBE16rm 0U, // CMOVBE16rr 0U, // CMOVBE32rm 0U, // CMOVBE32rr 0U, // CMOVBE64rm 0U, // CMOVBE64rr 0U, // CMOVBE_F 0U, // CMOVBE_Fp32 0U, // CMOVBE_Fp64 0U, // CMOVBE_Fp80 0U, // CMOVB_F 0U, // CMOVB_Fp32 0U, // CMOVB_Fp64 0U, // CMOVB_Fp80 0U, // CMOVE16rm 0U, // CMOVE16rr 0U, // CMOVE32rm 0U, // CMOVE32rr 0U, // CMOVE64rm 0U, // CMOVE64rr 0U, // CMOVE_F 0U, // CMOVE_Fp32 0U, // CMOVE_Fp64 0U, // CMOVE_Fp80 0U, // CMOVG16rm 0U, // CMOVG16rr 0U, // CMOVG32rm 0U, // CMOVG32rr 0U, // CMOVG64rm 0U, // CMOVG64rr 0U, // CMOVGE16rm 0U, // CMOVGE16rr 0U, // CMOVGE32rm 0U, // CMOVGE32rr 0U, // CMOVGE64rm 0U, // CMOVGE64rr 0U, // CMOVL16rm 0U, // CMOVL16rr 0U, // CMOVL32rm 0U, // CMOVL32rr 0U, // CMOVL64rm 0U, // CMOVL64rr 0U, // CMOVLE16rm 0U, // CMOVLE16rr 0U, // CMOVLE32rm 0U, // CMOVLE32rr 0U, // CMOVLE64rm 0U, // CMOVLE64rr 0U, // CMOVNBE_F 0U, // CMOVNBE_Fp32 0U, // CMOVNBE_Fp64 0U, // CMOVNBE_Fp80 0U, // CMOVNB_F 0U, // CMOVNB_Fp32 0U, // CMOVNB_Fp64 0U, // CMOVNB_Fp80 0U, // CMOVNE16rm 0U, // CMOVNE16rr 0U, // CMOVNE32rm 0U, // CMOVNE32rr 0U, // CMOVNE64rm 0U, // CMOVNE64rr 0U, // CMOVNE_F 0U, // CMOVNE_Fp32 0U, // CMOVNE_Fp64 0U, // CMOVNE_Fp80 0U, // CMOVNO16rm 0U, // CMOVNO16rr 0U, // CMOVNO32rm 0U, // CMOVNO32rr 0U, // CMOVNO64rm 0U, // CMOVNO64rr 0U, // CMOVNP16rm 0U, // CMOVNP16rr 0U, // CMOVNP32rm 0U, // CMOVNP32rr 0U, // CMOVNP64rm 0U, // CMOVNP64rr 0U, // CMOVNP_F 0U, // CMOVNP_Fp32 0U, // CMOVNP_Fp64 0U, // CMOVNP_Fp80 0U, // CMOVNS16rm 0U, // CMOVNS16rr 0U, // CMOVNS32rm 0U, // CMOVNS32rr 0U, // CMOVNS64rm 0U, // CMOVNS64rr 0U, // CMOVO16rm 0U, // CMOVO16rr 0U, // CMOVO32rm 0U, // CMOVO32rr 0U, // CMOVO64rm 0U, // CMOVO64rr 0U, // CMOVP16rm 0U, // CMOVP16rr 0U, // CMOVP32rm 0U, // CMOVP32rr 0U, // CMOVP64rm 0U, // CMOVP64rr 0U, // CMOVP_F 0U, // CMOVP_Fp32 0U, // CMOVP_Fp64 0U, // CMOVP_Fp80 0U, // CMOVS16rm 0U, // CMOVS16rr 0U, // CMOVS32rm 0U, // CMOVS32rr 0U, // CMOVS64rm 0U, // CMOVS64rr 0U, // CMOV_FR32 0U, // CMOV_FR64 0U, // CMOV_GR16 0U, // CMOV_GR32 0U, // CMOV_GR8 0U, // CMOV_RFP32 0U, // CMOV_RFP64 0U, // CMOV_RFP80 0U, // CMOV_V16F32 0U, // CMOV_V2F64 0U, // CMOV_V2I64 0U, // CMOV_V4F32 0U, // CMOV_V4F64 0U, // CMOV_V4I64 0U, // CMOV_V8F32 0U, // CMOV_V8F64 0U, // CMOV_V8I64 0U, // CMP16i16 0U, // CMP16mi 0U, // CMP16mi8 0U, // CMP16mr 0U, // CMP16ri 0U, // CMP16ri8 0U, // CMP16rm 0U, // CMP16rr 0U, // CMP16rr_REV 0U, // CMP32i32 0U, // CMP32mi 0U, // CMP32mi8 0U, // CMP32mr 0U, // CMP32ri 0U, // CMP32ri8 0U, // CMP32rm 0U, // CMP32rr 0U, // CMP32rr_REV 0U, // CMP64i32 0U, // CMP64mi32 0U, // CMP64mi8 0U, // CMP64mr 0U, // CMP64ri32 0U, // CMP64ri8 0U, // CMP64rm 0U, // CMP64rr 0U, // CMP64rr_REV 0U, // CMP8i8 0U, // CMP8mi 0U, // CMP8mi8 0U, // CMP8mr 0U, // CMP8ri 0U, // CMP8ri8 0U, // CMP8rm 0U, // CMP8rr 0U, // CMP8rr_REV 0U, // CMPPDrmi 96U, // CMPPDrmi_alt 0U, // CMPPDrri 112U, // CMPPDrri_alt 0U, // CMPPSrmi 96U, // CMPPSrmi_alt 0U, // CMPPSrri 112U, // CMPPSrri_alt 0U, // CMPSB 0U, // CMPSDrm 96U, // CMPSDrm_alt 0U, // CMPSDrr 112U, // CMPSDrr_alt 0U, // CMPSL 0U, // CMPSQ 0U, // CMPSSrm 96U, // CMPSSrm_alt 0U, // CMPSSrr 112U, // CMPSSrr_alt 0U, // CMPSW 0U, // CMPXCHG16B 0U, // CMPXCHG16rm 0U, // CMPXCHG16rr 0U, // CMPXCHG32rm 0U, // CMPXCHG32rr 0U, // CMPXCHG64rm 0U, // CMPXCHG64rr 0U, // CMPXCHG8B 0U, // CMPXCHG8rm 0U, // CMPXCHG8rr 0U, // COMISDrm 0U, // COMISDrr 0U, // COMISSrm 0U, // COMISSrr 0U, // COMP_FST0r 0U, // COM_FIPr 0U, // COM_FIr 0U, // COM_FST0r 0U, // COS_F 0U, // COS_Fp32 0U, // COS_Fp64 0U, // COS_Fp80 0U, // CPUID 0U, // CQO 0U, // CRC32r32m16 0U, // CRC32r32m32 0U, // CRC32r32m8 0U, // CRC32r32r16 0U, // CRC32r32r32 0U, // CRC32r32r8 0U, // CRC32r64m64 0U, // CRC32r64m8 0U, // CRC32r64r64 0U, // CRC32r64r8 0U, // CVTDQ2PDrm 0U, // CVTDQ2PDrr 0U, // CVTDQ2PSrm 0U, // CVTDQ2PSrr 0U, // CVTPD2DQrm 0U, // CVTPD2DQrr 0U, // CVTPD2PSrm 0U, // CVTPD2PSrr 0U, // CVTPS2DQrm 0U, // CVTPS2DQrr 0U, // CVTPS2PDrm 0U, // CVTPS2PDrr 0U, // CVTSD2SI64rm 0U, // CVTSD2SI64rr 0U, // CVTSD2SIrm 0U, // CVTSD2SIrr 0U, // CVTSD2SSrm 0U, // CVTSD2SSrr 0U, // CVTSI2SD64rm 0U, // CVTSI2SD64rr 0U, // CVTSI2SDrm 0U, // CVTSI2SDrr 0U, // CVTSI2SS64rm 0U, // CVTSI2SS64rr 0U, // CVTSI2SSrm 0U, // CVTSI2SSrr 0U, // CVTSS2SDrm 0U, // CVTSS2SDrr 0U, // CVTSS2SI64rm 0U, // CVTSS2SI64rr 0U, // CVTSS2SIrm 0U, // CVTSS2SIrr 0U, // CVTTPD2DQrm 0U, // CVTTPD2DQrr 0U, // CVTTPS2DQrm 0U, // CVTTPS2DQrr 0U, // CVTTSD2SI64rm 0U, // CVTTSD2SI64rr 0U, // CVTTSD2SIrm 0U, // CVTTSD2SIrr 0U, // CVTTSS2SI64rm 0U, // CVTTSS2SI64rr 0U, // CVTTSS2SIrm 0U, // CVTTSS2SIrr 0U, // CWD 0U, // CWDE 0U, // DAA 0U, // DAS 0U, // DATA16_PREFIX 0U, // DEC16m 0U, // DEC16r 0U, // DEC16r_alt 0U, // DEC32m 0U, // DEC32r 0U, // DEC32r_alt 0U, // DEC64m 0U, // DEC64r 0U, // DEC8m 0U, // DEC8r 0U, // DIV16m 0U, // DIV16r 0U, // DIV32m 0U, // DIV32r 0U, // DIV64m 0U, // DIV64r 0U, // DIV8m 0U, // DIV8r 0U, // DIVPDrm 0U, // DIVPDrr 0U, // DIVPSrm 0U, // DIVPSrr 0U, // DIVR_F32m 0U, // DIVR_F64m 0U, // DIVR_FI16m 0U, // DIVR_FI32m 0U, // DIVR_FPrST0 0U, // DIVR_FST0r 0U, // DIVR_Fp32m 0U, // DIVR_Fp64m 0U, // DIVR_Fp64m32 0U, // DIVR_Fp80m32 0U, // DIVR_Fp80m64 0U, // DIVR_FpI16m32 0U, // DIVR_FpI16m64 0U, // DIVR_FpI16m80 0U, // DIVR_FpI32m32 0U, // DIVR_FpI32m64 0U, // DIVR_FpI32m80 0U, // DIVR_FrST0 0U, // DIVSDrm 0U, // DIVSDrm_Int 0U, // DIVSDrr 0U, // DIVSDrr_Int 0U, // DIVSSrm 0U, // DIVSSrm_Int 0U, // DIVSSrr 0U, // DIVSSrr_Int 0U, // DIV_F32m 0U, // DIV_F64m 0U, // DIV_FI16m 0U, // DIV_FI32m 0U, // DIV_FPrST0 0U, // DIV_FST0r 0U, // DIV_Fp32 0U, // DIV_Fp32m 0U, // DIV_Fp64 0U, // DIV_Fp64m 0U, // DIV_Fp64m32 0U, // DIV_Fp80 0U, // DIV_Fp80m32 0U, // DIV_Fp80m64 0U, // DIV_FpI16m32 0U, // DIV_FpI16m64 0U, // DIV_FpI16m80 0U, // DIV_FpI32m32 0U, // DIV_FpI32m64 0U, // DIV_FpI32m80 0U, // DIV_FrST0 96U, // DPPDrmi 112U, // DPPDrri 96U, // DPPSrmi 112U, // DPPSrri 0U, // EH_RETURN 0U, // EH_RETURN64 0U, // EH_SjLj_LongJmp32 0U, // EH_SjLj_LongJmp64 0U, // EH_SjLj_SetJmp32 0U, // EH_SjLj_SetJmp64 0U, // EH_SjLj_Setup 0U, // ENCLS 0U, // ENCLU 0U, // ENTER 0U, // EXTRACTPSmr 16U, // EXTRACTPSrr 0U, // EXTRQ 112U, // EXTRQI 0U, // F2XM1 0U, // FARCALL16i 0U, // FARCALL16m 0U, // FARCALL32i 0U, // FARCALL32m 0U, // FARCALL64 0U, // FARJMP16i 0U, // FARJMP16m 0U, // FARJMP32i 0U, // FARJMP32m 0U, // FARJMP64 0U, // FBLDm 0U, // FBSTPm 0U, // FCOM32m 0U, // FCOM64m 0U, // FCOMP32m 0U, // FCOMP64m 0U, // FCOMPP 0U, // FDECSTP 0U, // FEMMS 0U, // FFREE 0U, // FICOM16m 0U, // FICOM32m 0U, // FICOMP16m 0U, // FICOMP32m 0U, // FINCSTP 0U, // FLDCW16m 0U, // FLDENVm 0U, // FLDL2E 0U, // FLDL2T 0U, // FLDLG2 0U, // FLDLN2 0U, // FLDPI 0U, // FNCLEX 0U, // FNINIT 0U, // FNOP 0U, // FNSTCW16m 0U, // FNSTSW16r 0U, // FNSTSWm 0U, // FP32_TO_INT16_IN_MEM 0U, // FP32_TO_INT32_IN_MEM 0U, // FP32_TO_INT64_IN_MEM 0U, // FP64_TO_INT16_IN_MEM 0U, // FP64_TO_INT32_IN_MEM 0U, // FP64_TO_INT64_IN_MEM 0U, // FP80_TO_INT16_IN_MEM 0U, // FP80_TO_INT32_IN_MEM 0U, // FP80_TO_INT64_IN_MEM 0U, // FPATAN 0U, // FPREM 0U, // FPREM1 0U, // FPTAN 0U, // FP_FFREEP 0U, // FRNDINT 0U, // FRSTORm 0U, // FSAVEm 0U, // FSCALE 0U, // FSETPM 0U, // FSINCOS 0U, // FSTENVm 0U, // FXAM 0U, // FXRSTOR 0U, // FXRSTOR64 0U, // FXSAVE 0U, // FXSAVE64 0U, // FXTRACT 0U, // FYL2X 0U, // FYL2XP1 0U, // FsANDNPDrm 0U, // FsANDNPDrr 0U, // FsANDNPSrm 0U, // FsANDNPSrr 0U, // FsANDPDrm 0U, // FsANDPDrr 0U, // FsANDPSrm 0U, // FsANDPSrr 0U, // FsFLD0SD 0U, // FsFLD0SS 0U, // FsMOVAPDrm 0U, // FsMOVAPSrm 0U, // FsORPDrm 0U, // FsORPDrr 0U, // FsORPSrm 0U, // FsORPSrr 0U, // FsVMOVAPDrm 0U, // FsVMOVAPSrm 0U, // FsXORPDrm 0U, // FsXORPDrr 0U, // FsXORPSrm 0U, // FsXORPSrr 0U, // FvANDNPDrm 0U, // FvANDNPDrr 0U, // FvANDNPSrm 0U, // FvANDNPSrr 0U, // FvANDPDrm 0U, // FvANDPDrr 0U, // FvANDPSrm 0U, // FvANDPSrr 0U, // FvORPDrm 0U, // FvORPDrr 0U, // FvORPSrm 0U, // FvORPSrr 0U, // FvXORPDrm 0U, // FvXORPDrr 0U, // FvXORPSrm 0U, // FvXORPSrr 0U, // GETSEC 0U, // HADDPDrm 0U, // HADDPDrr 0U, // HADDPSrm 0U, // HADDPSrr 0U, // HLT 0U, // HSUBPDrm 0U, // HSUBPDrr 0U, // HSUBPSrm 0U, // HSUBPSrr 0U, // IDIV16m 0U, // IDIV16r 0U, // IDIV32m 0U, // IDIV32r 0U, // IDIV64m 0U, // IDIV64r 0U, // IDIV8m 0U, // IDIV8r 0U, // ILD_F16m 0U, // ILD_F32m 0U, // ILD_F64m 0U, // ILD_Fp16m32 0U, // ILD_Fp16m64 0U, // ILD_Fp16m80 0U, // ILD_Fp32m32 0U, // ILD_Fp32m64 0U, // ILD_Fp32m80 0U, // ILD_Fp64m32 0U, // ILD_Fp64m64 0U, // ILD_Fp64m80 0U, // IMUL16m 0U, // IMUL16r 0U, // IMUL16rm 80U, // IMUL16rmi 80U, // IMUL16rmi8 0U, // IMUL16rr 48U, // IMUL16rri 48U, // IMUL16rri8 0U, // IMUL32m 0U, // IMUL32r 0U, // IMUL32rm 80U, // IMUL32rmi 80U, // IMUL32rmi8 0U, // IMUL32rr 48U, // IMUL32rri 48U, // IMUL32rri8 0U, // IMUL64m 0U, // IMUL64r 0U, // IMUL64rm 80U, // IMUL64rmi32 80U, // IMUL64rmi8 0U, // IMUL64rr 48U, // IMUL64rri32 48U, // IMUL64rri8 0U, // IMUL8m 0U, // IMUL8r 0U, // IN16ri 0U, // IN16rr 0U, // IN32ri 0U, // IN32rr 0U, // IN8ri 0U, // IN8rr 0U, // INC16m 0U, // INC16r 0U, // INC16r_alt 0U, // INC32m 0U, // INC32r 0U, // INC32r_alt 0U, // INC64m 0U, // INC64r 0U, // INC8m 0U, // INC8r 0U, // INSB 96U, // INSERTPSrm 112U, // INSERTPSrr 0U, // INSERTQ 1136U, // INSERTQI 0U, // INSL 0U, // INSW 0U, // INT 0U, // INT1 0U, // INT3 0U, // INTO 0U, // INVD 0U, // INVEPT32 0U, // INVEPT64 0U, // INVLPG 0U, // INVLPGA32 0U, // INVLPGA64 0U, // INVPCID32 0U, // INVPCID64 0U, // INVVPID32 0U, // INVVPID64 0U, // IRET16 0U, // IRET32 0U, // IRET64 0U, // ISTT_FP16m 0U, // ISTT_FP32m 0U, // ISTT_FP64m 0U, // ISTT_Fp16m32 0U, // ISTT_Fp16m64 0U, // ISTT_Fp16m80 0U, // ISTT_Fp32m32 0U, // ISTT_Fp32m64 0U, // ISTT_Fp32m80 0U, // ISTT_Fp64m32 0U, // ISTT_Fp64m64 0U, // ISTT_Fp64m80 0U, // IST_F16m 0U, // IST_F32m 0U, // IST_FP16m 0U, // IST_FP32m 0U, // IST_FP64m 0U, // IST_Fp16m32 0U, // IST_Fp16m64 0U, // IST_Fp16m80 0U, // IST_Fp32m32 0U, // IST_Fp32m64 0U, // IST_Fp32m80 0U, // IST_Fp64m32 0U, // IST_Fp64m64 0U, // IST_Fp64m80 0U, // Int_CMPSDrm 0U, // Int_CMPSDrr 0U, // Int_CMPSSrm 0U, // Int_CMPSSrr 0U, // Int_COMISDrm 0U, // Int_COMISDrr 0U, // Int_COMISSrm 0U, // Int_COMISSrr 0U, // Int_CVTSD2SSrm 0U, // Int_CVTSD2SSrr 0U, // Int_CVTSI2SD64rm 0U, // Int_CVTSI2SD64rr 0U, // Int_CVTSI2SDrm 0U, // Int_CVTSI2SDrr 0U, // Int_CVTSI2SS64rm 0U, // Int_CVTSI2SS64rr 0U, // Int_CVTSI2SSrm 0U, // Int_CVTSI2SSrr 0U, // Int_CVTSS2SDrm 0U, // Int_CVTSS2SDrr 0U, // Int_CVTTSD2SI64rm 0U, // Int_CVTTSD2SI64rr 0U, // Int_CVTTSD2SIrm 0U, // Int_CVTTSD2SIrr 0U, // Int_CVTTSS2SI64rm 0U, // Int_CVTTSS2SI64rr 0U, // Int_CVTTSS2SIrm 0U, // Int_CVTTSS2SIrr 0U, // Int_MemBarrier 0U, // Int_UCOMISDrm 0U, // Int_UCOMISDrr 0U, // Int_UCOMISSrm 0U, // Int_UCOMISSrr 128U, // Int_VCMPSDrm 48U, // Int_VCMPSDrr 144U, // Int_VCMPSSrm 48U, // Int_VCMPSSrr 0U, // Int_VCOMISDZrm 0U, // Int_VCOMISDZrr 0U, // Int_VCOMISDrm 0U, // Int_VCOMISDrr 0U, // Int_VCOMISSZrm 0U, // Int_VCOMISSZrr 0U, // Int_VCOMISSrm 0U, // Int_VCOMISSrr 128U, // Int_VCVTSD2SSrm 48U, // Int_VCVTSD2SSrr 64U, // Int_VCVTSI2SD64Zrm 48U, // Int_VCVTSI2SD64Zrr 64U, // Int_VCVTSI2SD64rm 48U, // Int_VCVTSI2SD64rr 32U, // Int_VCVTSI2SDZrm 48U, // Int_VCVTSI2SDZrr 32U, // Int_VCVTSI2SDrm 48U, // Int_VCVTSI2SDrr 64U, // Int_VCVTSI2SS64Zrm 48U, // Int_VCVTSI2SS64Zrr 64U, // Int_VCVTSI2SS64rm 48U, // Int_VCVTSI2SS64rr 32U, // Int_VCVTSI2SSZrm 48U, // Int_VCVTSI2SSZrr 32U, // Int_VCVTSI2SSrm 48U, // Int_VCVTSI2SSrr 144U, // Int_VCVTSS2SDrm 48U, // Int_VCVTSS2SDrr 0U, // Int_VCVTTSD2SI64Zrm 0U, // Int_VCVTTSD2SI64Zrr 0U, // Int_VCVTTSD2SI64rm 0U, // Int_VCVTTSD2SI64rr 0U, // Int_VCVTTSD2SIZrm 0U, // Int_VCVTTSD2SIZrr 0U, // Int_VCVTTSD2SIrm 0U, // Int_VCVTTSD2SIrr 0U, // Int_VCVTTSD2USI64Zrm 0U, // Int_VCVTTSD2USI64Zrr 0U, // Int_VCVTTSD2USIZrm 0U, // Int_VCVTTSD2USIZrr 0U, // Int_VCVTTSS2SI64Zrm 0U, // Int_VCVTTSS2SI64Zrr 0U, // Int_VCVTTSS2SI64rm 0U, // Int_VCVTTSS2SI64rr 0U, // Int_VCVTTSS2SIZrm 0U, // Int_VCVTTSS2SIZrr 0U, // Int_VCVTTSS2SIrm 0U, // Int_VCVTTSS2SIrr 0U, // Int_VCVTTSS2USI64Zrm 0U, // Int_VCVTTSS2USI64Zrr 0U, // Int_VCVTTSS2USIZrm 0U, // Int_VCVTTSS2USIZrr 64U, // Int_VCVTUSI2SD64Zrm 48U, // Int_VCVTUSI2SD64Zrr 32U, // Int_VCVTUSI2SDZrm 48U, // Int_VCVTUSI2SDZrr 64U, // Int_VCVTUSI2SS64Zrm 48U, // Int_VCVTUSI2SS64Zrr 32U, // Int_VCVTUSI2SSZrm 48U, // Int_VCVTUSI2SSZrr 0U, // Int_VUCOMISDZrm 0U, // Int_VUCOMISDZrr 0U, // Int_VUCOMISDrm 0U, // Int_VUCOMISDrr 0U, // Int_VUCOMISSZrm 0U, // Int_VUCOMISSZrr 0U, // Int_VUCOMISSrm 0U, // Int_VUCOMISSrr 0U, // JAE_1 0U, // JAE_2 0U, // JAE_4 0U, // JA_1 0U, // JA_2 0U, // JA_4 0U, // JBE_1 0U, // JBE_2 0U, // JBE_4 0U, // JB_1 0U, // JB_2 0U, // JB_4 0U, // JCXZ 0U, // JECXZ 0U, // JE_1 0U, // JE_2 0U, // JE_4 0U, // JGE_1 0U, // JGE_2 0U, // JGE_4 0U, // JG_1 0U, // JG_2 0U, // JG_4 0U, // JLE_1 0U, // JLE_2 0U, // JLE_4 0U, // JL_1 0U, // JL_2 0U, // JL_4 0U, // JMP16m 0U, // JMP16r 0U, // JMP32m 0U, // JMP32r 0U, // JMP64m 0U, // JMP64r 0U, // JMP_1 0U, // JMP_2 0U, // JMP_4 0U, // JNE_1 0U, // JNE_2 0U, // JNE_4 0U, // JNO_1 0U, // JNO_2 0U, // JNO_4 0U, // JNP_1 0U, // JNP_2 0U, // JNP_4 0U, // JNS_1 0U, // JNS_2 0U, // JNS_4 0U, // JO_1 0U, // JO_2 0U, // JO_4 0U, // JP_1 0U, // JP_2 0U, // JP_4 0U, // JRCXZ 0U, // JS_1 0U, // JS_2 0U, // JS_4 48U, // KANDBrr 48U, // KANDDrr 48U, // KANDNBrr 48U, // KANDNDrr 48U, // KANDNQrr 48U, // KANDNWrr 48U, // KANDQrr 48U, // KANDWrr 0U, // KMOVBkk 0U, // KMOVBkm 0U, // KMOVBkr 0U, // KMOVBmk 0U, // KMOVBrk 0U, // KMOVDkk 0U, // KMOVDkm 0U, // KMOVDkr 0U, // KMOVDmk 0U, // KMOVDrk 0U, // KMOVQkk 0U, // KMOVQkm 0U, // KMOVQkr 0U, // KMOVQmk 0U, // KMOVQrk 0U, // KMOVWkk 0U, // KMOVWkm 0U, // KMOVWkr 0U, // KMOVWmk 0U, // KMOVWrk 0U, // KNOTBrr 0U, // KNOTDrr 0U, // KNOTQrr 0U, // KNOTWrr 48U, // KORBrr 48U, // KORDrr 48U, // KORQrr 0U, // KORTESTBrr 0U, // KORTESTDrr 0U, // KORTESTQrr 0U, // KORTESTWrr 48U, // KORWrr 0U, // KSET0B 0U, // KSET0W 0U, // KSET1B 0U, // KSET1W 16U, // KSHIFTLBri 16U, // KSHIFTLDri 16U, // KSHIFTLQri 16U, // KSHIFTLWri 16U, // KSHIFTRBri 16U, // KSHIFTRDri 16U, // KSHIFTRQri 16U, // KSHIFTRWri 48U, // KUNPCKBWrr 48U, // KXNORBrr 48U, // KXNORDrr 48U, // KXNORQrr 48U, // KXNORWrr 48U, // KXORBrr 48U, // KXORDrr 48U, // KXORQrr 48U, // KXORWrr 0U, // LAHF 0U, // LAR16rm 0U, // LAR16rr 0U, // LAR32rm 0U, // LAR32rr 0U, // LAR64rm 0U, // LAR64rr 0U, // LCMPXCHG16 0U, // LCMPXCHG16B 0U, // LCMPXCHG32 0U, // LCMPXCHG64 0U, // LCMPXCHG8 0U, // LCMPXCHG8B 0U, // LDDQUrm 0U, // LDMXCSR 0U, // LDS16rm 0U, // LDS32rm 0U, // LD_F0 0U, // LD_F1 0U, // LD_F32m 0U, // LD_F64m 0U, // LD_F80m 0U, // LD_Fp032 0U, // LD_Fp064 0U, // LD_Fp080 0U, // LD_Fp132 0U, // LD_Fp164 0U, // LD_Fp180 0U, // LD_Fp32m 0U, // LD_Fp32m64 0U, // LD_Fp32m80 0U, // LD_Fp64m 0U, // LD_Fp64m80 0U, // LD_Fp80m 0U, // LD_Frr 0U, // LEA16r 0U, // LEA32r 0U, // LEA64_32r 0U, // LEA64r 0U, // LEAVE 0U, // LEAVE64 0U, // LES16rm 0U, // LES32rm 0U, // LFENCE 0U, // LFS16rm 0U, // LFS32rm 0U, // LFS64rm 0U, // LGDT16m 0U, // LGDT32m 0U, // LGDT64m 0U, // LGS16rm 0U, // LGS32rm 0U, // LGS64rm 0U, // LIDT16m 0U, // LIDT32m 0U, // LIDT64m 0U, // LLDT16m 0U, // LLDT16r 0U, // LMSW16m 0U, // LMSW16r 0U, // LOCK_ADD16mi 0U, // LOCK_ADD16mi8 0U, // LOCK_ADD16mr 0U, // LOCK_ADD32mi 0U, // LOCK_ADD32mi8 0U, // LOCK_ADD32mr 0U, // LOCK_ADD64mi32 0U, // LOCK_ADD64mi8 0U, // LOCK_ADD64mr 0U, // LOCK_ADD8mi 0U, // LOCK_ADD8mr 0U, // LOCK_AND16mi 0U, // LOCK_AND16mi8 0U, // LOCK_AND16mr 0U, // LOCK_AND32mi 0U, // LOCK_AND32mi8 0U, // LOCK_AND32mr 0U, // LOCK_AND64mi32 0U, // LOCK_AND64mi8 0U, // LOCK_AND64mr 0U, // LOCK_AND8mi 0U, // LOCK_AND8mr 0U, // LOCK_DEC16m 0U, // LOCK_DEC32m 0U, // LOCK_DEC64m 0U, // LOCK_DEC8m 0U, // LOCK_INC16m 0U, // LOCK_INC32m 0U, // LOCK_INC64m 0U, // LOCK_INC8m 0U, // LOCK_OR16mi 0U, // LOCK_OR16mi8 0U, // LOCK_OR16mr 0U, // LOCK_OR32mi 0U, // LOCK_OR32mi8 0U, // LOCK_OR32mr 0U, // LOCK_OR64mi32 0U, // LOCK_OR64mi8 0U, // LOCK_OR64mr 0U, // LOCK_OR8mi 0U, // LOCK_OR8mr 0U, // LOCK_PREFIX 0U, // LOCK_SUB16mi 0U, // LOCK_SUB16mi8 0U, // LOCK_SUB16mr 0U, // LOCK_SUB32mi 0U, // LOCK_SUB32mi8 0U, // LOCK_SUB32mr 0U, // LOCK_SUB64mi32 0U, // LOCK_SUB64mi8 0U, // LOCK_SUB64mr 0U, // LOCK_SUB8mi 0U, // LOCK_SUB8mr 0U, // LOCK_XOR16mi 0U, // LOCK_XOR16mi8 0U, // LOCK_XOR16mr 0U, // LOCK_XOR32mi 0U, // LOCK_XOR32mi8 0U, // LOCK_XOR32mr 0U, // LOCK_XOR64mi32 0U, // LOCK_XOR64mi8 0U, // LOCK_XOR64mr 0U, // LOCK_XOR8mi 0U, // LOCK_XOR8mr 0U, // LODSB 0U, // LODSL 0U, // LODSQ 0U, // LODSW 0U, // LOOP 0U, // LOOPE 0U, // LOOPNE 0U, // LRETIL 0U, // LRETIQ 0U, // LRETIW 0U, // LRETL 0U, // LRETQ 0U, // LRETW 0U, // LSL16rm 0U, // LSL16rr 0U, // LSL32rm 0U, // LSL32rr 0U, // LSL64rm 0U, // LSL64rr 0U, // LSS16rm 0U, // LSS32rm 0U, // LSS64rm 0U, // LTRm 0U, // LTRr 0U, // LXADD16 0U, // LXADD32 0U, // LXADD64 0U, // LXADD8 0U, // LZCNT16rm 0U, // LZCNT16rr 0U, // LZCNT32rm 0U, // LZCNT32rr 0U, // LZCNT64rm 0U, // LZCNT64rr 0U, // MASKMOVDQU 0U, // MASKMOVDQU64 0U, // MAXCPDrm 0U, // MAXCPDrr 0U, // MAXCPSrm 0U, // MAXCPSrr 0U, // MAXCSDrm 0U, // MAXCSDrr 0U, // MAXCSSrm 0U, // MAXCSSrr 0U, // MAXPDrm 0U, // MAXPDrr 0U, // MAXPSrm 0U, // MAXPSrr 0U, // MAXSDrm 0U, // MAXSDrm_Int 0U, // MAXSDrr 0U, // MAXSDrr_Int 0U, // MAXSSrm 0U, // MAXSSrm_Int 0U, // MAXSSrr 0U, // MAXSSrr_Int 0U, // MFENCE 0U, // MINCPDrm 0U, // MINCPDrr 0U, // MINCPSrm 0U, // MINCPSrr 0U, // MINCSDrm 0U, // MINCSDrr 0U, // MINCSSrm 0U, // MINCSSrr 0U, // MINPDrm 0U, // MINPDrr 0U, // MINPSrm 0U, // MINPSrr 0U, // MINSDrm 0U, // MINSDrm_Int 0U, // MINSDrr 0U, // MINSDrr_Int 0U, // MINSSrm 0U, // MINSSrm_Int 0U, // MINSSrr 0U, // MINSSrr_Int 0U, // MMX_CVTPD2PIirm 0U, // MMX_CVTPD2PIirr 0U, // MMX_CVTPI2PDirm 0U, // MMX_CVTPI2PDirr 0U, // MMX_CVTPI2PSirm 0U, // MMX_CVTPI2PSirr 0U, // MMX_CVTPS2PIirm 0U, // MMX_CVTPS2PIirr 0U, // MMX_CVTTPD2PIirm 0U, // MMX_CVTTPD2PIirr 0U, // MMX_CVTTPS2PIirm 0U, // MMX_CVTTPS2PIirr 0U, // MMX_EMMS 0U, // MMX_MASKMOVQ 0U, // MMX_MASKMOVQ64 0U, // MMX_MOVD64from64rm 0U, // MMX_MOVD64from64rr 0U, // MMX_MOVD64grr 0U, // MMX_MOVD64mr 0U, // MMX_MOVD64rm 0U, // MMX_MOVD64rr 0U, // MMX_MOVD64to64rm 0U, // MMX_MOVD64to64rr 0U, // MMX_MOVDQ2Qrr 0U, // MMX_MOVFR642Qrr 0U, // MMX_MOVNTQmr 0U, // MMX_MOVQ2DQrr 0U, // MMX_MOVQ2FR64rr 0U, // MMX_MOVQ64mr 0U, // MMX_MOVQ64rm 0U, // MMX_MOVQ64rr 0U, // MMX_MOVQ64rr_REV 0U, // MMX_PABSBrm64 0U, // MMX_PABSBrr64 0U, // MMX_PABSDrm64 0U, // MMX_PABSDrr64 0U, // MMX_PABSWrm64 0U, // MMX_PABSWrr64 0U, // MMX_PACKSSDWirm 0U, // MMX_PACKSSDWirr 0U, // MMX_PACKSSWBirm 0U, // MMX_PACKSSWBirr 0U, // MMX_PACKUSWBirm 0U, // MMX_PACKUSWBirr 0U, // MMX_PADDBirm 0U, // MMX_PADDBirr 0U, // MMX_PADDDirm 0U, // MMX_PADDDirr 0U, // MMX_PADDQirm 0U, // MMX_PADDQirr 0U, // MMX_PADDSBirm 0U, // MMX_PADDSBirr 0U, // MMX_PADDSWirm 0U, // MMX_PADDSWirr 0U, // MMX_PADDUSBirm 0U, // MMX_PADDUSBirr 0U, // MMX_PADDUSWirm 0U, // MMX_PADDUSWirr 0U, // MMX_PADDWirm 0U, // MMX_PADDWirr 96U, // MMX_PALIGNR64irm 112U, // MMX_PALIGNR64irr 0U, // MMX_PANDNirm 0U, // MMX_PANDNirr 0U, // MMX_PANDirm 0U, // MMX_PANDirr 0U, // MMX_PAVGBirm 0U, // MMX_PAVGBirr 0U, // MMX_PAVGWirm 0U, // MMX_PAVGWirr 0U, // MMX_PCMPEQBirm 0U, // MMX_PCMPEQBirr 0U, // MMX_PCMPEQDirm 0U, // MMX_PCMPEQDirr 0U, // MMX_PCMPEQWirm 0U, // MMX_PCMPEQWirr 0U, // MMX_PCMPGTBirm 0U, // MMX_PCMPGTBirr 0U, // MMX_PCMPGTDirm 0U, // MMX_PCMPGTDirr 0U, // MMX_PCMPGTWirm 0U, // MMX_PCMPGTWirr 16U, // MMX_PEXTRWirri 0U, // MMX_PHADDSWrm64 0U, // MMX_PHADDSWrr64 0U, // MMX_PHADDWrm64 0U, // MMX_PHADDWrr64 0U, // MMX_PHADDrm64 0U, // MMX_PHADDrr64 0U, // MMX_PHSUBDrm64 0U, // MMX_PHSUBDrr64 0U, // MMX_PHSUBSWrm64 0U, // MMX_PHSUBSWrr64 0U, // MMX_PHSUBWrm64 0U, // MMX_PHSUBWrr64 96U, // MMX_PINSRWirmi 112U, // MMX_PINSRWirri 0U, // MMX_PMADDUBSWrm64 0U, // MMX_PMADDUBSWrr64 0U, // MMX_PMADDWDirm 0U, // MMX_PMADDWDirr 0U, // MMX_PMAXSWirm 0U, // MMX_PMAXSWirr 0U, // MMX_PMAXUBirm 0U, // MMX_PMAXUBirr 0U, // MMX_PMINSWirm 0U, // MMX_PMINSWirr 0U, // MMX_PMINUBirm 0U, // MMX_PMINUBirr 0U, // MMX_PMOVMSKBrr 0U, // MMX_PMULHRSWrm64 0U, // MMX_PMULHRSWrr64 0U, // MMX_PMULHUWirm 0U, // MMX_PMULHUWirr 0U, // MMX_PMULHWirm 0U, // MMX_PMULHWirr 0U, // MMX_PMULLWirm 0U, // MMX_PMULLWirr 0U, // MMX_PMULUDQirm 0U, // MMX_PMULUDQirr 0U, // MMX_PORirm 0U, // MMX_PORirr 0U, // MMX_PSADBWirm 0U, // MMX_PSADBWirr 0U, // MMX_PSHUFBrm64 0U, // MMX_PSHUFBrr64 0U, // MMX_PSHUFWmi 16U, // MMX_PSHUFWri 0U, // MMX_PSIGNBrm64 0U, // MMX_PSIGNBrr64 0U, // MMX_PSIGNDrm64 0U, // MMX_PSIGNDrr64 0U, // MMX_PSIGNWrm64 0U, // MMX_PSIGNWrr64 0U, // MMX_PSLLDri 0U, // MMX_PSLLDrm 0U, // MMX_PSLLDrr 0U, // MMX_PSLLQri 0U, // MMX_PSLLQrm 0U, // MMX_PSLLQrr 0U, // MMX_PSLLWri 0U, // MMX_PSLLWrm 0U, // MMX_PSLLWrr 0U, // MMX_PSRADri 0U, // MMX_PSRADrm 0U, // MMX_PSRADrr 0U, // MMX_PSRAWri 0U, // MMX_PSRAWrm 0U, // MMX_PSRAWrr 0U, // MMX_PSRLDri 0U, // MMX_PSRLDrm 0U, // MMX_PSRLDrr 0U, // MMX_PSRLQri 0U, // MMX_PSRLQrm 0U, // MMX_PSRLQrr 0U, // MMX_PSRLWri 0U, // MMX_PSRLWrm 0U, // MMX_PSRLWrr 0U, // MMX_PSUBBirm 0U, // MMX_PSUBBirr 0U, // MMX_PSUBDirm 0U, // MMX_PSUBDirr 0U, // MMX_PSUBQirm 0U, // MMX_PSUBQirr 0U, // MMX_PSUBSBirm 0U, // MMX_PSUBSBirr 0U, // MMX_PSUBSWirm 0U, // MMX_PSUBSWirr 0U, // MMX_PSUBUSBirm 0U, // MMX_PSUBUSBirr 0U, // MMX_PSUBUSWirm 0U, // MMX_PSUBUSWirr 0U, // MMX_PSUBWirm 0U, // MMX_PSUBWirr 0U, // MMX_PUNPCKHBWirm 0U, // MMX_PUNPCKHBWirr 0U, // MMX_PUNPCKHDQirm 0U, // MMX_PUNPCKHDQirr 0U, // MMX_PUNPCKHWDirm 0U, // MMX_PUNPCKHWDirr 0U, // MMX_PUNPCKLBWirm 0U, // MMX_PUNPCKLBWirr 0U, // MMX_PUNPCKLDQirm 0U, // MMX_PUNPCKLDQirr 0U, // MMX_PUNPCKLWDirm 0U, // MMX_PUNPCKLWDirr 0U, // MMX_PXORirm 0U, // MMX_PXORirr 0U, // MONITOR 0U, // MONITORrrr 0U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 0U, // MOV16ao16 0U, // MOV16ao32 0U, // MOV16ao64 0U, // MOV16mi 0U, // MOV16mr 0U, // MOV16ms 0U, // MOV16o16a 0U, // MOV16o32a 0U, // MOV16o64a 0U, // MOV16ri 0U, // MOV16ri_alt 0U, // MOV16rm 0U, // MOV16rr 0U, // MOV16rr_REV 0U, // MOV16rs 0U, // MOV16sm 0U, // MOV16sr 0U, // MOV32ao16 0U, // MOV32ao32 0U, // MOV32ao64 0U, // MOV32cr 0U, // MOV32dr 0U, // MOV32mi 0U, // MOV32mr 0U, // MOV32ms 0U, // MOV32o16a 0U, // MOV32o32a 0U, // MOV32o64a 0U, // MOV32r0 0U, // MOV32rc 0U, // MOV32rd 0U, // MOV32ri 0U, // MOV32ri64 0U, // MOV32ri_alt 0U, // MOV32rm 0U, // MOV32rr 0U, // MOV32rr_REV 0U, // MOV32rs 0U, // MOV32sm 0U, // MOV32sr 0U, // MOV64ao32 0U, // MOV64ao64 0U, // MOV64cr 0U, // MOV64dr 0U, // MOV64mi32 0U, // MOV64mr 0U, // MOV64ms 0U, // MOV64o32a 0U, // MOV64o64a 0U, // MOV64rc 0U, // MOV64rd 0U, // MOV64ri 0U, // MOV64ri32 0U, // MOV64rm 0U, // MOV64rr 0U, // MOV64rr_REV 0U, // MOV64rs 0U, // MOV64sm 0U, // MOV64sr 0U, // MOV64toPQIrm 0U, // MOV64toPQIrr 0U, // MOV64toSDrm 0U, // MOV64toSDrr 0U, // MOV8ao16 0U, // MOV8ao32 0U, // MOV8ao64 0U, // MOV8mi 0U, // MOV8mr 0U, // MOV8mr_NOREX 0U, // MOV8o16a 0U, // MOV8o32a 0U, // MOV8o64a 0U, // MOV8ri 0U, // MOV8ri_alt 0U, // MOV8rm 0U, // MOV8rm_NOREX 0U, // MOV8rr 0U, // MOV8rr_NOREX 0U, // MOV8rr_REV 0U, // MOVAPDmr 0U, // MOVAPDrm 0U, // MOVAPDrr 0U, // MOVAPDrr_REV 0U, // MOVAPSmr 0U, // MOVAPSrm 0U, // MOVAPSrr 0U, // MOVAPSrr_REV 0U, // MOVBE16mr 0U, // MOVBE16rm 0U, // MOVBE32mr 0U, // MOVBE32rm 0U, // MOVBE64mr 0U, // MOVBE64rm 0U, // MOVDDUPrm 0U, // MOVDDUPrr 0U, // MOVDI2PDIrm 0U, // MOVDI2PDIrr 0U, // MOVDI2SSrm 0U, // MOVDI2SSrr 0U, // MOVDQAmr 0U, // MOVDQArm 0U, // MOVDQArr 0U, // MOVDQArr_REV 0U, // MOVDQUmr 0U, // MOVDQUrm 0U, // MOVDQUrr 0U, // MOVDQUrr_REV 0U, // MOVHLPSrr 0U, // MOVHPDmr 0U, // MOVHPDrm 0U, // MOVHPSmr 0U, // MOVHPSrm 0U, // MOVLHPSrr 0U, // MOVLPDmr 0U, // MOVLPDrm 0U, // MOVLPSmr 0U, // MOVLPSrm 0U, // MOVMSKPDrr 0U, // MOVMSKPSrr 0U, // MOVNTDQArm 0U, // MOVNTDQmr 0U, // MOVNTI_64mr 0U, // MOVNTImr 0U, // MOVNTPDmr 0U, // MOVNTPSmr 0U, // MOVNTSD 0U, // MOVNTSS 0U, // MOVPC32r 0U, // MOVPDI2DImr 0U, // MOVPDI2DIrr 0U, // MOVPQI2QImr 0U, // MOVPQI2QIrr 0U, // MOVPQIto64rm 0U, // MOVPQIto64rr 0U, // MOVQI2PQIrm 0U, // MOVSB 0U, // MOVSDmr 0U, // MOVSDrm 0U, // MOVSDrr 0U, // MOVSDrr_REV 0U, // MOVSDto64mr 0U, // MOVSDto64rr 0U, // MOVSHDUPrm 0U, // MOVSHDUPrr 0U, // MOVSL 0U, // MOVSLDUPrm 0U, // MOVSLDUPrr 0U, // MOVSQ 0U, // MOVSS2DImr 0U, // MOVSS2DIrr 0U, // MOVSSmr 0U, // MOVSSrm 0U, // MOVSSrr 0U, // MOVSSrr_REV 0U, // MOVSW 0U, // MOVSX16rm8 0U, // MOVSX16rr8 0U, // MOVSX32_NOREXrm8 0U, // MOVSX32_NOREXrr8 0U, // MOVSX32rm16 0U, // MOVSX32rm8 0U, // MOVSX32rr16 0U, // MOVSX32rr8 0U, // MOVSX64_NOREXrr32 0U, // MOVSX64rm16 0U, // MOVSX64rm32 0U, // MOVSX64rm32_alt 0U, // MOVSX64rm8 0U, // MOVSX64rr16 0U, // MOVSX64rr32 0U, // MOVSX64rr8 0U, // MOVUPDmr 0U, // MOVUPDrm 0U, // MOVUPDrr 0U, // MOVUPDrr_REV 0U, // MOVUPSmr 0U, // MOVUPSrm 0U, // MOVUPSrr 0U, // MOVUPSrr_REV 0U, // MOVZPQILo2PQIrm 0U, // MOVZPQILo2PQIrr 0U, // MOVZQI2PQIrm 0U, // MOVZQI2PQIrr 0U, // MOVZX16rm8 0U, // MOVZX16rr8 0U, // MOVZX32_NOREXrm8 0U, // MOVZX32_NOREXrr8 0U, // MOVZX32rm16 0U, // MOVZX32rm8 0U, // MOVZX32rr16 0U, // MOVZX32rr8 0U, // MOVZX64rm16_Q 0U, // MOVZX64rm8_Q 0U, // MOVZX64rr16_Q 0U, // MOVZX64rr8_Q 96U, // MPSADBWrmi 112U, // MPSADBWrri 0U, // MUL16m 0U, // MUL16r 0U, // MUL32m 0U, // MUL32r 0U, // MUL64m 0U, // MUL64r 0U, // MUL8m 0U, // MUL8r 0U, // MULPDrm 0U, // MULPDrr 0U, // MULPSrm 0U, // MULPSrr 0U, // MULSDrm 0U, // MULSDrm_Int 0U, // MULSDrr 0U, // MULSDrr_Int 0U, // MULSSrm 0U, // MULSSrm_Int 0U, // MULSSrr 0U, // MULSSrr_Int 32U, // MULX32rm 48U, // MULX32rr 64U, // MULX64rm 48U, // MULX64rr 0U, // MUL_F32m 0U, // MUL_F64m 0U, // MUL_FI16m 0U, // MUL_FI32m 0U, // MUL_FPrST0 0U, // MUL_FST0r 0U, // MUL_Fp32 0U, // MUL_Fp32m 0U, // MUL_Fp64 0U, // MUL_Fp64m 0U, // MUL_Fp64m32 0U, // MUL_Fp80 0U, // MUL_Fp80m32 0U, // MUL_Fp80m64 0U, // MUL_FpI16m32 0U, // MUL_FpI16m64 0U, // MUL_FpI16m80 0U, // MUL_FpI32m32 0U, // MUL_FpI32m64 0U, // MUL_FpI32m80 0U, // MUL_FrST0 0U, // MWAITrr 0U, // NEG16m 0U, // NEG16r 0U, // NEG32m 0U, // NEG32r 0U, // NEG64m 0U, // NEG64r 0U, // NEG8m 0U, // NEG8r 0U, // NOOP 0U, // NOOP18_16m4 0U, // NOOP18_16m5 0U, // NOOP18_16m6 0U, // NOOP18_16m7 0U, // NOOP18_16r4 0U, // NOOP18_16r5 0U, // NOOP18_16r6 0U, // NOOP18_16r7 0U, // NOOP18_m4 0U, // NOOP18_m5 0U, // NOOP18_m6 0U, // NOOP18_m7 0U, // NOOP18_r4 0U, // NOOP18_r5 0U, // NOOP18_r6 0U, // NOOP18_r7 0U, // NOOP19rr 0U, // NOOPL 0U, // NOOPL_19 0U, // NOOPL_1a 0U, // NOOPL_1b 0U, // NOOPL_1c 0U, // NOOPL_1d 0U, // NOOPL_1e 0U, // NOOPW 0U, // NOOPW_19 0U, // NOOPW_1a 0U, // NOOPW_1b 0U, // NOOPW_1c 0U, // NOOPW_1d 0U, // NOOPW_1e 0U, // NOT16m 0U, // NOT16r 0U, // NOT32m 0U, // NOT32r 0U, // NOT64m 0U, // NOT64r 0U, // NOT8m 0U, // NOT8r 0U, // OR16i16 0U, // OR16mi 0U, // OR16mi8 0U, // OR16mr 0U, // OR16ri 0U, // OR16ri8 0U, // OR16rm 0U, // OR16rr 0U, // OR16rr_REV 0U, // OR32i32 0U, // OR32mi 0U, // OR32mi8 0U, // OR32mr 0U, // OR32mrLocked 0U, // OR32ri 0U, // OR32ri8 0U, // OR32rm 0U, // OR32rr 0U, // OR32rr_REV 0U, // OR64i32 0U, // OR64mi32 0U, // OR64mi8 0U, // OR64mr 0U, // OR64ri32 0U, // OR64ri8 0U, // OR64rm 0U, // OR64rr 0U, // OR64rr_REV 0U, // OR8i8 0U, // OR8mi 0U, // OR8mi8 0U, // OR8mr 0U, // OR8ri 0U, // OR8ri8 0U, // OR8rm 0U, // OR8rr 0U, // OR8rr_REV 0U, // ORPDrm 0U, // ORPDrr 0U, // ORPSrm 0U, // ORPSrr 0U, // OUT16ir 0U, // OUT16rr 0U, // OUT32ir 0U, // OUT32rr 0U, // OUT8ir 0U, // OUT8rr 0U, // OUTSB 0U, // OUTSL 0U, // OUTSW 0U, // PABSBrm128 0U, // PABSBrr128 0U, // PABSDrm128 0U, // PABSDrr128 0U, // PABSWrm128 0U, // PABSWrr128 0U, // PACKSSDWrm 0U, // PACKSSDWrr 0U, // PACKSSWBrm 0U, // PACKSSWBrr 0U, // PACKUSDWrm 0U, // PACKUSDWrr 0U, // PACKUSWBrm 0U, // PACKUSWBrr 0U, // PADDBrm 0U, // PADDBrr 0U, // PADDDrm 0U, // PADDDrr 0U, // PADDQrm 0U, // PADDQrr 0U, // PADDSBrm 0U, // PADDSBrr 0U, // PADDSWrm 0U, // PADDSWrr 0U, // PADDUSBrm 0U, // PADDUSBrr 0U, // PADDUSWrm 0U, // PADDUSWrr 0U, // PADDWrm 0U, // PADDWrr 96U, // PALIGNR128rm 112U, // PALIGNR128rr 0U, // PANDNrm 0U, // PANDNrr 0U, // PANDrm 0U, // PANDrr 0U, // PAUSE 0U, // PAVGBrm 0U, // PAVGBrr 0U, // PAVGUSBrm 0U, // PAVGUSBrr 0U, // PAVGWrm 0U, // PAVGWrr 0U, // PBLENDVBrm0 0U, // PBLENDVBrr0 96U, // PBLENDWrmi 112U, // PBLENDWrri 96U, // PCLMULQDQrm 112U, // PCLMULQDQrr 0U, // PCMPEQBrm 0U, // PCMPEQBrr 0U, // PCMPEQDrm 0U, // PCMPEQDrr 0U, // PCMPEQQrm 0U, // PCMPEQQrr 0U, // PCMPEQWrm 0U, // PCMPEQWrr 0U, // PCMPESTRIMEM 0U, // PCMPESTRIREG 0U, // PCMPESTRIrm 16U, // PCMPESTRIrr 0U, // PCMPESTRM128MEM 0U, // PCMPESTRM128REG 0U, // PCMPESTRM128rm 16U, // PCMPESTRM128rr 0U, // PCMPGTBrm 0U, // PCMPGTBrr 0U, // PCMPGTDrm 0U, // PCMPGTDrr 0U, // PCMPGTQrm 0U, // PCMPGTQrr 0U, // PCMPGTWrm 0U, // PCMPGTWrr 0U, // PCMPISTRIMEM 0U, // PCMPISTRIREG 0U, // PCMPISTRIrm 16U, // PCMPISTRIrr 0U, // PCMPISTRM128MEM 0U, // PCMPISTRM128REG 0U, // PCMPISTRM128rm 16U, // PCMPISTRM128rr 0U, // PCOMMIT 32U, // PDEP32rm 48U, // PDEP32rr 64U, // PDEP64rm 48U, // PDEP64rr 32U, // PEXT32rm 48U, // PEXT32rr 64U, // PEXT64rm 48U, // PEXT64rr 0U, // PEXTRBmr 16U, // PEXTRBrr 0U, // PEXTRDmr 16U, // PEXTRDrr 0U, // PEXTRQmr 16U, // PEXTRQrr 0U, // PEXTRWmr 16U, // PEXTRWri 16U, // PEXTRWrr_REV 0U, // PF2IDrm 0U, // PF2IDrr 0U, // PF2IWrm 0U, // PF2IWrr 0U, // PFACCrm 0U, // PFACCrr 0U, // PFADDrm 0U, // PFADDrr 0U, // PFCMPEQrm 0U, // PFCMPEQrr 0U, // PFCMPGErm 0U, // PFCMPGErr 0U, // PFCMPGTrm 0U, // PFCMPGTrr 0U, // PFMAXrm 0U, // PFMAXrr 0U, // PFMINrm 0U, // PFMINrr 0U, // PFMULrm 0U, // PFMULrr 0U, // PFNACCrm 0U, // PFNACCrr 0U, // PFPNACCrm 0U, // PFPNACCrr 0U, // PFRCPIT1rm 0U, // PFRCPIT1rr 0U, // PFRCPIT2rm 0U, // PFRCPIT2rr 0U, // PFRCPrm 0U, // PFRCPrr 0U, // PFRSQIT1rm 0U, // PFRSQIT1rr 0U, // PFRSQRTrm 0U, // PFRSQRTrr 0U, // PFSUBRrm 0U, // PFSUBRrr 0U, // PFSUBrm 0U, // PFSUBrr 0U, // PHADDDrm 0U, // PHADDDrr 0U, // PHADDSWrm128 0U, // PHADDSWrr128 0U, // PHADDWrm 0U, // PHADDWrr 0U, // PHMINPOSUWrm128 0U, // PHMINPOSUWrr128 0U, // PHSUBDrm 0U, // PHSUBDrr 0U, // PHSUBSWrm128 0U, // PHSUBSWrr128 0U, // PHSUBWrm 0U, // PHSUBWrr 0U, // PI2FDrm 0U, // PI2FDrr 0U, // PI2FWrm 0U, // PI2FWrr 96U, // PINSRBrm 112U, // PINSRBrr 96U, // PINSRDrm 112U, // PINSRDrr 96U, // PINSRQrm 112U, // PINSRQrr 96U, // PINSRWrmi 112U, // PINSRWrri 0U, // PMADDUBSWrm128 0U, // PMADDUBSWrr128 0U, // PMADDWDrm 0U, // PMADDWDrr 0U, // PMAXSBrm 0U, // PMAXSBrr 0U, // PMAXSDrm 0U, // PMAXSDrr 0U, // PMAXSWrm 0U, // PMAXSWrr 0U, // PMAXUBrm 0U, // PMAXUBrr 0U, // PMAXUDrm 0U, // PMAXUDrr 0U, // PMAXUWrm 0U, // PMAXUWrr 0U, // PMINSBrm 0U, // PMINSBrr 0U, // PMINSDrm 0U, // PMINSDrr 0U, // PMINSWrm 0U, // PMINSWrr 0U, // PMINUBrm 0U, // PMINUBrr 0U, // PMINUDrm 0U, // PMINUDrr 0U, // PMINUWrm 0U, // PMINUWrr 0U, // PMOVMSKBrr 0U, // PMOVSXBDrm 0U, // PMOVSXBDrr 0U, // PMOVSXBQrm 0U, // PMOVSXBQrr 0U, // PMOVSXBWrm 0U, // PMOVSXBWrr 0U, // PMOVSXDQrm 0U, // PMOVSXDQrr 0U, // PMOVSXWDrm 0U, // PMOVSXWDrr 0U, // PMOVSXWQrm 0U, // PMOVSXWQrr 0U, // PMOVZXBDrm 0U, // PMOVZXBDrr 0U, // PMOVZXBQrm 0U, // PMOVZXBQrr 0U, // PMOVZXBWrm 0U, // PMOVZXBWrr 0U, // PMOVZXDQrm 0U, // PMOVZXDQrr 0U, // PMOVZXWDrm 0U, // PMOVZXWDrr 0U, // PMOVZXWQrm 0U, // PMOVZXWQrr 0U, // PMULDQrm 0U, // PMULDQrr 0U, // PMULHRSWrm128 0U, // PMULHRSWrr128 0U, // PMULHRWrm 0U, // PMULHRWrr 0U, // PMULHUWrm 0U, // PMULHUWrr 0U, // PMULHWrm 0U, // PMULHWrr 0U, // PMULLDrm 0U, // PMULLDrr 0U, // PMULLWrm 0U, // PMULLWrr 0U, // PMULUDQrm 0U, // PMULUDQrr 0U, // POP16r 0U, // POP16rmm 0U, // POP16rmr 0U, // POP32r 0U, // POP32rmm 0U, // POP32rmr 0U, // POP64r 0U, // POP64rmm 0U, // POP64rmr 0U, // POPA16 0U, // POPA32 0U, // POPCNT16rm 0U, // POPCNT16rr 0U, // POPCNT32rm 0U, // POPCNT32rr 0U, // POPCNT64rm 0U, // POPCNT64rr 0U, // POPDS16 0U, // POPDS32 0U, // POPES16 0U, // POPES32 0U, // POPF16 0U, // POPF32 0U, // POPF64 0U, // POPFS16 0U, // POPFS32 0U, // POPFS64 0U, // POPGS16 0U, // POPGS32 0U, // POPGS64 0U, // POPSS16 0U, // POPSS32 0U, // PORrm 0U, // PORrr 0U, // PREFETCH 0U, // PREFETCHNTA 0U, // PREFETCHT0 0U, // PREFETCHT1 0U, // PREFETCHT2 0U, // PREFETCHW 0U, // PSADBWrm 0U, // PSADBWrr 0U, // PSHUFBrm 0U, // PSHUFBrr 0U, // PSHUFDmi 16U, // PSHUFDri 0U, // PSHUFHWmi 16U, // PSHUFHWri 0U, // PSHUFLWmi 16U, // PSHUFLWri 0U, // PSIGNBrm 0U, // PSIGNBrr 0U, // PSIGNDrm 0U, // PSIGNDrr 0U, // PSIGNWrm 0U, // PSIGNWrr 0U, // PSLLDQri 0U, // PSLLDri 0U, // PSLLDrm 0U, // PSLLDrr 0U, // PSLLQri 0U, // PSLLQrm 0U, // PSLLQrr 0U, // PSLLWri 0U, // PSLLWrm 0U, // PSLLWrr 0U, // PSRADri 0U, // PSRADrm 0U, // PSRADrr 0U, // PSRAWri 0U, // PSRAWrm 0U, // PSRAWrr 0U, // PSRLDQri 0U, // PSRLDri 0U, // PSRLDrm 0U, // PSRLDrr 0U, // PSRLQri 0U, // PSRLQrm 0U, // PSRLQrr 0U, // PSRLWri 0U, // PSRLWrm 0U, // PSRLWrr 0U, // PSUBBrm 0U, // PSUBBrr 0U, // PSUBDrm 0U, // PSUBDrr 0U, // PSUBQrm 0U, // PSUBQrr 0U, // PSUBSBrm 0U, // PSUBSBrr 0U, // PSUBSWrm 0U, // PSUBSWrr 0U, // PSUBUSBrm 0U, // PSUBUSBrr 0U, // PSUBUSWrm 0U, // PSUBUSWrr 0U, // PSUBWrm 0U, // PSUBWrr 0U, // PSWAPDrm 0U, // PSWAPDrr 0U, // PTESTrm 0U, // PTESTrr 0U, // PUNPCKHBWrm 0U, // PUNPCKHBWrr 0U, // PUNPCKHDQrm 0U, // PUNPCKHDQrr 0U, // PUNPCKHQDQrm 0U, // PUNPCKHQDQrr 0U, // PUNPCKHWDrm 0U, // PUNPCKHWDrr 0U, // PUNPCKLBWrm 0U, // PUNPCKLBWrr 0U, // PUNPCKLDQrm 0U, // PUNPCKLDQrr 0U, // PUNPCKLQDQrm 0U, // PUNPCKLQDQrr 0U, // PUNPCKLWDrm 0U, // PUNPCKLWDrr 0U, // PUSH16i8 0U, // PUSH16r 0U, // PUSH16rmm 0U, // PUSH16rmr 0U, // PUSH32i8 0U, // PUSH32r 0U, // PUSH32rmm 0U, // PUSH32rmr 0U, // PUSH64i16 0U, // PUSH64i32 0U, // PUSH64i8 0U, // PUSH64r 0U, // PUSH64rmm 0U, // PUSH64rmr 0U, // PUSHA16 0U, // PUSHA32 0U, // PUSHCS16 0U, // PUSHCS32 0U, // PUSHDS16 0U, // PUSHDS32 0U, // PUSHES16 0U, // PUSHES32 0U, // PUSHF16 0U, // PUSHF32 0U, // PUSHF64 0U, // PUSHFS16 0U, // PUSHFS32 0U, // PUSHFS64 0U, // PUSHGS16 0U, // PUSHGS32 0U, // PUSHGS64 0U, // PUSHSS16 0U, // PUSHSS32 0U, // PUSHi16 0U, // PUSHi32 0U, // PXORrm 0U, // PXORrr 0U, // RCL16m1 0U, // RCL16mCL 0U, // RCL16mi 0U, // RCL16r1 0U, // RCL16rCL 0U, // RCL16ri 0U, // RCL32m1 0U, // RCL32mCL 0U, // RCL32mi 0U, // RCL32r1 0U, // RCL32rCL 0U, // RCL32ri 0U, // RCL64m1 0U, // RCL64mCL 0U, // RCL64mi 0U, // RCL64r1 0U, // RCL64rCL 0U, // RCL64ri 0U, // RCL8m1 0U, // RCL8mCL 0U, // RCL8mi 0U, // RCL8r1 0U, // RCL8rCL 0U, // RCL8ri 0U, // RCPPSm 0U, // RCPPSm_Int 0U, // RCPPSr 0U, // RCPPSr_Int 0U, // RCPSSm 0U, // RCPSSm_Int 0U, // RCPSSr 0U, // RCPSSr_Int 0U, // RCR16m1 0U, // RCR16mCL 0U, // RCR16mi 0U, // RCR16r1 0U, // RCR16rCL 0U, // RCR16ri 0U, // RCR32m1 0U, // RCR32mCL 0U, // RCR32mi 0U, // RCR32r1 0U, // RCR32rCL 0U, // RCR32ri 0U, // RCR64m1 0U, // RCR64mCL 0U, // RCR64mi 0U, // RCR64r1 0U, // RCR64rCL 0U, // RCR64ri 0U, // RCR8m1 0U, // RCR8mCL 0U, // RCR8mi 0U, // RCR8r1 0U, // RCR8rCL 0U, // RCR8ri 0U, // RDFSBASE 0U, // RDFSBASE64 0U, // RDGSBASE 0U, // RDGSBASE64 0U, // RDMSR 0U, // RDPMC 0U, // RDRAND16r 0U, // RDRAND32r 0U, // RDRAND64r 0U, // RDSEED16r 0U, // RDSEED32r 0U, // RDSEED64r 0U, // RDTSC 0U, // RDTSCP 0U, // RELEASE_ADD32mi 0U, // RELEASE_ADD64mi32 0U, // RELEASE_ADD8mi 0U, // RELEASE_AND32mi 0U, // RELEASE_AND64mi32 0U, // RELEASE_AND8mi 0U, // RELEASE_DEC16m 0U, // RELEASE_DEC32m 0U, // RELEASE_DEC64m 0U, // RELEASE_DEC8m 0U, // RELEASE_INC16m 0U, // RELEASE_INC32m 0U, // RELEASE_INC64m 0U, // RELEASE_INC8m 0U, // RELEASE_MOV16mi 0U, // RELEASE_MOV16mr 0U, // RELEASE_MOV32mi 0U, // RELEASE_MOV32mr 0U, // RELEASE_MOV64mi32 0U, // RELEASE_MOV64mr 0U, // RELEASE_MOV8mi 0U, // RELEASE_MOV8mr 0U, // RELEASE_OR32mi 0U, // RELEASE_OR64mi32 0U, // RELEASE_OR8mi 0U, // RELEASE_XOR32mi 0U, // RELEASE_XOR64mi32 0U, // RELEASE_XOR8mi 0U, // REPNE_PREFIX 0U, // REP_MOVSB_32 0U, // REP_MOVSB_64 0U, // REP_MOVSD_32 0U, // REP_MOVSD_64 0U, // REP_MOVSQ_64 0U, // REP_MOVSW_32 0U, // REP_MOVSW_64 0U, // REP_PREFIX 0U, // REP_STOSB_32 0U, // REP_STOSB_64 0U, // REP_STOSD_32 0U, // REP_STOSD_64 0U, // REP_STOSQ_64 0U, // REP_STOSW_32 0U, // REP_STOSW_64 0U, // RETIL 0U, // RETIQ 0U, // RETIW 0U, // RETL 0U, // RETQ 0U, // RETW 0U, // REX64_PREFIX 0U, // ROL16m1 0U, // ROL16mCL 0U, // ROL16mi 0U, // ROL16r1 0U, // ROL16rCL 0U, // ROL16ri 0U, // ROL32m1 0U, // ROL32mCL 0U, // ROL32mi 0U, // ROL32r1 0U, // ROL32rCL 0U, // ROL32ri 0U, // ROL64m1 0U, // ROL64mCL 0U, // ROL64mi 0U, // ROL64r1 0U, // ROL64rCL 0U, // ROL64ri 0U, // ROL8m1 0U, // ROL8mCL 0U, // ROL8mi 0U, // ROL8r1 0U, // ROL8rCL 0U, // ROL8ri 0U, // ROR16m1 0U, // ROR16mCL 0U, // ROR16mi 0U, // ROR16r1 0U, // ROR16rCL 0U, // ROR16ri 0U, // ROR32m1 0U, // ROR32mCL 0U, // ROR32mi 0U, // ROR32r1 0U, // ROR32rCL 0U, // ROR32ri 0U, // ROR64m1 0U, // ROR64mCL 0U, // ROR64mi 0U, // ROR64r1 0U, // ROR64rCL 0U, // ROR64ri 0U, // ROR8m1 0U, // ROR8mCL 0U, // ROR8mi 0U, // ROR8r1 0U, // ROR8rCL 0U, // ROR8ri 80U, // RORX32mi 48U, // RORX32ri 80U, // RORX64mi 48U, // RORX64ri 0U, // ROUNDPDm 16U, // ROUNDPDr 0U, // ROUNDPSm 16U, // ROUNDPSr 96U, // ROUNDSDm 112U, // ROUNDSDr 112U, // ROUNDSDr_Int 96U, // ROUNDSSm 112U, // ROUNDSSr 112U, // ROUNDSSr_Int 0U, // RSM 0U, // RSQRTPSm 0U, // RSQRTPSm_Int 0U, // RSQRTPSr 0U, // RSQRTPSr_Int 0U, // RSQRTSSm 0U, // RSQRTSSm_Int 0U, // RSQRTSSr 0U, // RSQRTSSr_Int 0U, // SAHF 0U, // SAL16m1 0U, // SAL16mCL 0U, // SAL16mi 0U, // SAL16r1 0U, // SAL16rCL 0U, // SAL16ri 0U, // SAL32m1 0U, // SAL32mCL 0U, // SAL32mi 0U, // SAL32r1 0U, // SAL32rCL 0U, // SAL32ri 0U, // SAL64m1 0U, // SAL64mCL 0U, // SAL64mi 0U, // SAL64r1 0U, // SAL64rCL 0U, // SAL64ri 0U, // SAL8m1 0U, // SAL8mCL 0U, // SAL8mi 0U, // SAL8r1 0U, // SAL8rCL 0U, // SAL8ri 0U, // SALC 0U, // SAR16m1 0U, // SAR16mCL 0U, // SAR16mi 0U, // SAR16r1 0U, // SAR16rCL 0U, // SAR16ri 0U, // SAR32m1 0U, // SAR32mCL 0U, // SAR32mi 0U, // SAR32r1 0U, // SAR32rCL 0U, // SAR32ri 0U, // SAR64m1 0U, // SAR64mCL 0U, // SAR64mi 0U, // SAR64r1 0U, // SAR64rCL 0U, // SAR64ri 0U, // SAR8m1 0U, // SAR8mCL 0U, // SAR8mi 0U, // SAR8r1 0U, // SAR8rCL 0U, // SAR8ri 80U, // SARX32rm 48U, // SARX32rr 80U, // SARX64rm 48U, // SARX64rr 0U, // SBB16i16 0U, // SBB16mi 0U, // SBB16mi8 0U, // SBB16mr 0U, // SBB16ri 0U, // SBB16ri8 0U, // SBB16rm 0U, // SBB16rr 0U, // SBB16rr_REV 0U, // SBB32i32 0U, // SBB32mi 0U, // SBB32mi8 0U, // SBB32mr 0U, // SBB32ri 0U, // SBB32ri8 0U, // SBB32rm 0U, // SBB32rr 0U, // SBB32rr_REV 0U, // SBB64i32 0U, // SBB64mi32 0U, // SBB64mi8 0U, // SBB64mr 0U, // SBB64ri32 0U, // SBB64ri8 0U, // SBB64rm 0U, // SBB64rr 0U, // SBB64rr_REV 0U, // SBB8i8 0U, // SBB8mi 0U, // SBB8mi8 0U, // SBB8mr 0U, // SBB8ri 0U, // SBB8ri8 0U, // SBB8rm 0U, // SBB8rr 0U, // SBB8rr_REV 0U, // SCASB 0U, // SCASL 0U, // SCASQ 0U, // SCASW 0U, // SEG_ALLOCA_32 0U, // SEG_ALLOCA_64 0U, // SEH_EndPrologue 0U, // SEH_Epilogue 0U, // SEH_PushFrame 0U, // SEH_PushReg 0U, // SEH_SaveReg 0U, // SEH_SaveXMM 0U, // SEH_SetFrame 0U, // SEH_StackAlloc 0U, // SETAEm 0U, // SETAEr 0U, // SETAm 0U, // SETAr 0U, // SETBEm 0U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 0U, // SETBm 0U, // SETBr 0U, // SETEm 0U, // SETEr 0U, // SETGEm 0U, // SETGEr 0U, // SETGm 0U, // SETGr 0U, // SETLEm 0U, // SETLEr 0U, // SETLm 0U, // SETLr 0U, // SETNEm 0U, // SETNEr 0U, // SETNOm 0U, // SETNOr 0U, // SETNPm 0U, // SETNPr 0U, // SETNSm 0U, // SETNSr 0U, // SETOm 0U, // SETOr 0U, // SETPm 0U, // SETPr 0U, // SETSm 0U, // SETSr 0U, // SFENCE 0U, // SGDT16m 0U, // SGDT32m 0U, // SGDT64m 0U, // SHA1MSG1rm 0U, // SHA1MSG1rr 0U, // SHA1MSG2rm 0U, // SHA1MSG2rr 0U, // SHA1NEXTErm 0U, // SHA1NEXTErr 96U, // SHA1RNDS4rmi 112U, // SHA1RNDS4rri 0U, // SHA256MSG1rm 0U, // SHA256MSG1rr 0U, // SHA256MSG2rm 0U, // SHA256MSG2rr 0U, // SHA256RNDS2rm 0U, // SHA256RNDS2rr 0U, // SHL16m1 0U, // SHL16mCL 0U, // SHL16mi 0U, // SHL16r1 0U, // SHL16rCL 0U, // SHL16ri 0U, // SHL32m1 0U, // SHL32mCL 0U, // SHL32mi 0U, // SHL32r1 0U, // SHL32rCL 0U, // SHL32ri 0U, // SHL64m1 0U, // SHL64mCL 0U, // SHL64mi 0U, // SHL64r1 0U, // SHL64rCL 0U, // SHL64ri 0U, // SHL8m1 0U, // SHL8mCL 0U, // SHL8mi 0U, // SHL8r1 0U, // SHL8rCL 0U, // SHL8ri 1U, // SHLD16mrCL 80U, // SHLD16mri8 1U, // SHLD16rrCL 160U, // SHLD16rri8 1U, // SHLD32mrCL 80U, // SHLD32mri8 1U, // SHLD32rrCL 160U, // SHLD32rri8 1U, // SHLD64mrCL 80U, // SHLD64mri8 1U, // SHLD64rrCL 160U, // SHLD64rri8 80U, // SHLX32rm 48U, // SHLX32rr 80U, // SHLX64rm 48U, // SHLX64rr 0U, // SHR16m1 0U, // SHR16mCL 0U, // SHR16mi 0U, // SHR16r1 0U, // SHR16rCL 0U, // SHR16ri 0U, // SHR32m1 0U, // SHR32mCL 0U, // SHR32mi 0U, // SHR32r1 0U, // SHR32rCL 0U, // SHR32ri 0U, // SHR64m1 0U, // SHR64mCL 0U, // SHR64mi 0U, // SHR64r1 0U, // SHR64rCL 0U, // SHR64ri 0U, // SHR8m1 0U, // SHR8mCL 0U, // SHR8mi 0U, // SHR8r1 0U, // SHR8rCL 0U, // SHR8ri 1U, // SHRD16mrCL 80U, // SHRD16mri8 1U, // SHRD16rrCL 160U, // SHRD16rri8 1U, // SHRD32mrCL 80U, // SHRD32mri8 1U, // SHRD32rrCL 160U, // SHRD32rri8 1U, // SHRD64mrCL 80U, // SHRD64mri8 1U, // SHRD64rrCL 160U, // SHRD64rri8 80U, // SHRX32rm 48U, // SHRX32rr 80U, // SHRX64rm 48U, // SHRX64rr 96U, // SHUFPDrmi 112U, // SHUFPDrri 96U, // SHUFPSrmi 112U, // SHUFPSrri 0U, // SIDT16m 0U, // SIDT32m 0U, // SIDT64m 0U, // SIN_F 0U, // SIN_Fp32 0U, // SIN_Fp64 0U, // SIN_Fp80 0U, // SKINIT 0U, // SLDT16m 0U, // SLDT16r 0U, // SLDT32r 0U, // SLDT64m 0U, // SLDT64r 0U, // SMSW16m 0U, // SMSW16r 0U, // SMSW32r 0U, // SMSW64r 0U, // SQRTPDm 0U, // SQRTPDr 0U, // SQRTPSm 0U, // SQRTPSr 0U, // SQRTSDm 0U, // SQRTSDm_Int 0U, // SQRTSDr 0U, // SQRTSDr_Int 0U, // SQRTSSm 0U, // SQRTSSm_Int 0U, // SQRTSSr 0U, // SQRTSSr_Int 0U, // SQRT_F 0U, // SQRT_Fp32 0U, // SQRT_Fp64 0U, // SQRT_Fp80 0U, // STAC 0U, // STC 0U, // STD 0U, // STGI 0U, // STI 0U, // STMXCSR 0U, // STOSB 0U, // STOSL 0U, // STOSQ 0U, // STOSW 0U, // STR16r 0U, // STR32r 0U, // STR64r 0U, // STRm 0U, // ST_F32m 0U, // ST_F64m 0U, // ST_FCOMPST0r 0U, // ST_FCOMPST0r_alt 0U, // ST_FCOMST0r 0U, // ST_FP32m 0U, // ST_FP64m 0U, // ST_FP80m 0U, // ST_FPNCEST0r 0U, // ST_FPST0r 0U, // ST_FPST0r_alt 0U, // ST_FPrr 0U, // ST_FXCHST0r 0U, // ST_FXCHST0r_alt 0U, // ST_Fp32m 0U, // ST_Fp64m 0U, // ST_Fp64m32 0U, // ST_Fp80m32 0U, // ST_Fp80m64 0U, // ST_FpP32m 0U, // ST_FpP64m 0U, // ST_FpP64m32 0U, // ST_FpP80m 0U, // ST_FpP80m32 0U, // ST_FpP80m64 0U, // ST_Frr 0U, // SUB16i16 0U, // SUB16mi 0U, // SUB16mi8 0U, // SUB16mr 0U, // SUB16ri 0U, // SUB16ri8 0U, // SUB16rm 0U, // SUB16rr 0U, // SUB16rr_REV 0U, // SUB32i32 0U, // SUB32mi 0U, // SUB32mi8 0U, // SUB32mr 0U, // SUB32ri 0U, // SUB32ri8 0U, // SUB32rm 0U, // SUB32rr 0U, // SUB32rr_REV 0U, // SUB64i32 0U, // SUB64mi32 0U, // SUB64mi8 0U, // SUB64mr 0U, // SUB64ri32 0U, // SUB64ri8 0U, // SUB64rm 0U, // SUB64rr 0U, // SUB64rr_REV 0U, // SUB8i8 0U, // SUB8mi 0U, // SUB8mi8 0U, // SUB8mr 0U, // SUB8ri 0U, // SUB8ri8 0U, // SUB8rm 0U, // SUB8rr 0U, // SUB8rr_REV 0U, // SUBPDrm 0U, // SUBPDrr 0U, // SUBPSrm 0U, // SUBPSrr 0U, // SUBR_F32m 0U, // SUBR_F64m 0U, // SUBR_FI16m 0U, // SUBR_FI32m 0U, // SUBR_FPrST0 0U, // SUBR_FST0r 0U, // SUBR_Fp32m 0U, // SUBR_Fp64m 0U, // SUBR_Fp64m32 0U, // SUBR_Fp80m32 0U, // SUBR_Fp80m64 0U, // SUBR_FpI16m32 0U, // SUBR_FpI16m64 0U, // SUBR_FpI16m80 0U, // SUBR_FpI32m32 0U, // SUBR_FpI32m64 0U, // SUBR_FpI32m80 0U, // SUBR_FrST0 0U, // SUBSDrm 0U, // SUBSDrm_Int 0U, // SUBSDrr 0U, // SUBSDrr_Int 0U, // SUBSSrm 0U, // SUBSSrm_Int 0U, // SUBSSrr 0U, // SUBSSrr_Int 0U, // SUB_F32m 0U, // SUB_F64m 0U, // SUB_FI16m 0U, // SUB_FI32m 0U, // SUB_FPrST0 0U, // SUB_FST0r 0U, // SUB_Fp32 0U, // SUB_Fp32m 0U, // SUB_Fp64 0U, // SUB_Fp64m 0U, // SUB_Fp64m32 0U, // SUB_Fp80 0U, // SUB_Fp80m32 0U, // SUB_Fp80m64 0U, // SUB_FpI16m32 0U, // SUB_FpI16m64 0U, // SUB_FpI16m80 0U, // SUB_FpI32m32 0U, // SUB_FpI32m64 0U, // SUB_FpI32m80 0U, // SUB_FrST0 0U, // SWAPGS 0U, // SYSCALL 0U, // SYSENTER 0U, // SYSEXIT 0U, // SYSEXIT64 0U, // SYSRET 0U, // SYSRET64 0U, // T1MSKC32rm 0U, // T1MSKC32rr 0U, // T1MSKC64rm 0U, // T1MSKC64rr 0U, // TAILJMPd 0U, // TAILJMPd64 0U, // TAILJMPd64_REX 0U, // TAILJMPm 0U, // TAILJMPm64 0U, // TAILJMPm64_REX 0U, // TAILJMPr 0U, // TAILJMPr64 0U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 0U, // TEST16i16 0U, // TEST16mi 0U, // TEST16mi_alt 0U, // TEST16ri 0U, // TEST16ri_alt 0U, // TEST16rm 0U, // TEST16rr 0U, // TEST32i32 0U, // TEST32mi 0U, // TEST32mi_alt 0U, // TEST32ri 0U, // TEST32ri_alt 0U, // TEST32rm 0U, // TEST32rr 0U, // TEST64i32 0U, // TEST64mi32 0U, // TEST64mi32_alt 0U, // TEST64ri32 0U, // TEST64ri32_alt 0U, // TEST64rm 0U, // TEST64rr 0U, // TEST8i8 0U, // TEST8mi 0U, // TEST8mi_alt 0U, // TEST8ri 0U, // TEST8ri_NOREX 0U, // TEST8ri_alt 0U, // TEST8rm 0U, // TEST8rr 0U, // TLSCall_32 0U, // TLSCall_64 0U, // TLS_addr32 0U, // TLS_addr64 0U, // TLS_base_addr32 0U, // TLS_base_addr64 0U, // TRAP 0U, // TST_F 0U, // TST_Fp32 0U, // TST_Fp64 0U, // TST_Fp80 0U, // TZCNT16rm 0U, // TZCNT16rr 0U, // TZCNT32rm 0U, // TZCNT32rr 0U, // TZCNT64rm 0U, // TZCNT64rr 0U, // TZMSK32rm 0U, // TZMSK32rr 0U, // TZMSK64rm 0U, // TZMSK64rr 0U, // UCOMISDrm 0U, // UCOMISDrr 0U, // UCOMISSrm 0U, // UCOMISSrr 0U, // UCOM_FIPr 0U, // UCOM_FIr 0U, // UCOM_FPPr 0U, // UCOM_FPr 0U, // UCOM_FpIr32 0U, // UCOM_FpIr64 0U, // UCOM_FpIr80 0U, // UCOM_Fpr32 0U, // UCOM_Fpr64 0U, // UCOM_Fpr80 0U, // UCOM_Fr 0U, // UD2B 0U, // UNPCKHPDrm 0U, // UNPCKHPDrr 0U, // UNPCKHPSrm 0U, // UNPCKHPSrr 0U, // UNPCKLPDrm 0U, // UNPCKLPDrr 0U, // UNPCKLPSrm 0U, // UNPCKLPSrr 17488U, // VAARG_64 176U, // VADDPDYrm 48U, // VADDPDYrr 192U, // VADDPDZ128rm 2176U, // VADDPDZ128rmb 558241U, // VADDPDZ128rmbk 574514U, // VADDPDZ128rmbkz 1115297U, // VADDPDZ128rmk 1131570U, // VADDPDZ128rmkz 48U, // VADDPDZ128rr 1148065U, // VADDPDZ128rrk 1164338U, // VADDPDZ128rrkz 176U, // VADDPDZ256rm 3200U, // VADDPDZ256rmb 1606817U, // VADDPDZ256rmbk 1623090U, // VADDPDZ256rmbkz 132257U, // VADDPDZ256rmk 1197106U, // VADDPDZ256rmkz 48U, // VADDPDZ256rr 1148065U, // VADDPDZ256rrk 1164338U, // VADDPDZ256rrkz 164912U, // VADDPDZrb 8488097U, // VADDPDZrbk 16892978U, // VADDPDZrbkz 208U, // VADDPDZrm 4224U, // VADDPDZrmb 2131105U, // VADDPDZrmbk 2147378U, // VADDPDZrmbkz 181409U, // VADDPDZrmk 197682U, // VADDPDZrmkz 48U, // VADDPDZrr 1148065U, // VADDPDZrrk 1164338U, // VADDPDZrrkz 192U, // VADDPDrm 48U, // VADDPDrr 176U, // VADDPSYrm 48U, // VADDPSYrr 192U, // VADDPSZ128rm 3216U, // VADDPSZ128rmb 1787041U, // VADDPSZ128rmbk 1803314U, // VADDPSZ128rmbkz 1115297U, // VADDPSZ128rmk 1131570U, // VADDPSZ128rmkz 48U, // VADDPSZ128rr 1148065U, // VADDPSZ128rrk 1164338U, // VADDPSZ128rrkz 176U, // VADDPSZ256rm 4240U, // VADDPSZ256rmb 2311329U, // VADDPSZ256rmbk 2327602U, // VADDPSZ256rmbkz 132257U, // VADDPSZ256rmk 1197106U, // VADDPSZ256rmkz 48U, // VADDPSZ256rr 1148065U, // VADDPSZ256rrk 1164338U, // VADDPSZ256rrkz 164912U, // VADDPSZrb 8488097U, // VADDPSZrbk 16892978U, // VADDPSZrbkz 208U, // VADDPSZrm 5264U, // VADDPSZrmb 2835617U, // VADDPSZrmbk 2851890U, // VADDPSZrmbkz 181409U, // VADDPSZrmk 197682U, // VADDPSZrmkz 48U, // VADDPSZrr 1148065U, // VADDPSZrrk 1164338U, // VADDPSZrrkz 192U, // VADDPSrm 48U, // VADDPSrr 128U, // VADDSDZrm 192U, // VADDSDZrm_Int 1115297U, // VADDSDZrm_Intk 1131570U, // VADDSDZrm_Intkz 48U, // VADDSDZrr 48U, // VADDSDZrr_Int 1148065U, // VADDSDZrr_Intk 1164338U, // VADDSDZrr_Intkz 164912U, // VADDSDZrrb 8488097U, // VADDSDZrrbk 16892978U, // VADDSDZrrbkz 128U, // VADDSDrm 128U, // VADDSDrm_Int 48U, // VADDSDrr 48U, // VADDSDrr_Int 144U, // VADDSSZrm 192U, // VADDSSZrm_Int 1115297U, // VADDSSZrm_Intk 1131570U, // VADDSSZrm_Intkz 48U, // VADDSSZrr 48U, // VADDSSZrr_Int 1148065U, // VADDSSZrr_Intk 1164338U, // VADDSSZrr_Intkz 164912U, // VADDSSZrrb 8488097U, // VADDSSZrrbk 16892978U, // VADDSSZrrbkz 144U, // VADDSSrm 144U, // VADDSSrm_Int 48U, // VADDSSrr 48U, // VADDSSrr_Int 176U, // VADDSUBPDYrm 48U, // VADDSUBPDYrr 192U, // VADDSUBPDrm 48U, // VADDSUBPDrr 176U, // VADDSUBPSYrm 48U, // VADDSUBPSYrr 192U, // VADDSUBPSrm 48U, // VADDSUBPSrr 224U, // VAESDECLASTrm 48U, // VAESDECLASTrr 224U, // VAESDECrm 48U, // VAESDECrr 224U, // VAESENCLASTrm 48U, // VAESENCLASTrr 224U, // VAESENCrm 48U, // VAESENCrr 0U, // VAESIMCrm 0U, // VAESIMCrr 0U, // VAESKEYGENASSIST128rm 16U, // VAESKEYGENASSIST128rr 247024U, // VALIGNDrmi 1311792U, // VALIGNDrri 25265313U, // VALIGNDrrik 33670194U, // VALIGNDrrikz 247024U, // VALIGNQrmi 1311792U, // VALIGNQrri 25265313U, // VALIGNQrrik 33670194U, // VALIGNQrrikz 176U, // VANDNPDYrm 48U, // VANDNPDYrr 192U, // VANDNPDrm 48U, // VANDNPDrr 176U, // VANDNPSYrm 48U, // VANDNPSYrr 192U, // VANDNPSrm 48U, // VANDNPSrr 176U, // VANDPDYrm 48U, // VANDPDYrr 192U, // VANDPDrm 48U, // VANDPDrr 176U, // VANDPSYrm 48U, // VANDPSYrr 192U, // VANDPSrm 48U, // VANDPSrr 48U, // VASTART_SAVE_XMM_REGS 0U, // VBLENDMPDZ128rm 2176U, // VBLENDMPDZ128rmb 574513U, // VBLENDMPDZ128rmbk 1131569U, // VBLENDMPDZ128rmk 1131570U, // VBLENDMPDZ128rmkz 48U, // VBLENDMPDZ128rr 1164337U, // VBLENDMPDZ128rrk 1164338U, // VBLENDMPDZ128rrkz 0U, // VBLENDMPDZ256rm 3200U, // VBLENDMPDZ256rmb 1623089U, // VBLENDMPDZ256rmbk 1197105U, // VBLENDMPDZ256rmk 1197106U, // VBLENDMPDZ256rmkz 48U, // VBLENDMPDZ256rr 1164337U, // VBLENDMPDZ256rrk 1164338U, // VBLENDMPDZ256rrkz 0U, // VBLENDMPDZrm 4224U, // VBLENDMPDZrmb 2147377U, // VBLENDMPDZrmbk 197681U, // VBLENDMPDZrmk 197682U, // VBLENDMPDZrmkz 48U, // VBLENDMPDZrr 1164337U, // VBLENDMPDZrrk 1164338U, // VBLENDMPDZrrkz 0U, // VBLENDMPSZ128rm 3216U, // VBLENDMPSZ128rmb 1803313U, // VBLENDMPSZ128rmbk 1131569U, // VBLENDMPSZ128rmk 1131570U, // VBLENDMPSZ128rmkz 48U, // VBLENDMPSZ128rr 1164337U, // VBLENDMPSZ128rrk 1164338U, // VBLENDMPSZ128rrkz 0U, // VBLENDMPSZ256rm 4240U, // VBLENDMPSZ256rmb 2327601U, // VBLENDMPSZ256rmbk 1197105U, // VBLENDMPSZ256rmk 1197106U, // VBLENDMPSZ256rmkz 48U, // VBLENDMPSZ256rr 1164337U, // VBLENDMPSZ256rrk 1164338U, // VBLENDMPSZ256rrkz 0U, // VBLENDMPSZrm 5264U, // VBLENDMPSZrmb 2851889U, // VBLENDMPSZrmbk 197681U, // VBLENDMPSZrmk 197682U, // VBLENDMPSZrmkz 48U, // VBLENDMPSZrr 1164337U, // VBLENDMPSZrrk 1164338U, // VBLENDMPSZrrkz 246960U, // VBLENDPDYrmi 1311792U, // VBLENDPDYrri 246976U, // VBLENDPDrmi 1311792U, // VBLENDPDrri 246960U, // VBLENDPSYrmi 1311792U, // VBLENDPSYrri 246976U, // VBLENDPSrmi 1311792U, // VBLENDPSrri 1066160U, // VBLENDVPDYrm 1164336U, // VBLENDVPDYrr 1066176U, // VBLENDVPDrm 1164336U, // VBLENDVPDrr 1066160U, // VBLENDVPSYrm 1164336U, // VBLENDVPSYrr 1066176U, // VBLENDVPSrm 1164336U, // VBLENDVPSrr 0U, // VBROADCASTF128 226U, // VBROADCASTI32X4krm 0U, // VBROADCASTI32X4rm 258U, // VBROADCASTI64X4krm 0U, // VBROADCASTI64X4rm 0U, // VBROADCASTSDYrm 0U, // VBROADCASTSDYrr 0U, // VBROADCASTSDZ256m 273U, // VBROADCASTSDZ256mk 130U, // VBROADCASTSDZ256mkz 0U, // VBROADCASTSDZ256r 161U, // VBROADCASTSDZ256rk 50U, // VBROADCASTSDZ256rkz 0U, // VBROADCASTSDZm 273U, // VBROADCASTSDZmk 130U, // VBROADCASTSDZmkz 0U, // VBROADCASTSDZr 161U, // VBROADCASTSDZrk 50U, // VBROADCASTSDZrkz 0U, // VBROADCASTSSYrm 0U, // VBROADCASTSSYrr 0U, // VBROADCASTSSZ128m 289U, // VBROADCASTSSZ128mk 146U, // VBROADCASTSSZ128mkz 0U, // VBROADCASTSSZ128r 161U, // VBROADCASTSSZ128rk 50U, // VBROADCASTSSZ128rkz 0U, // VBROADCASTSSZ256m 289U, // VBROADCASTSSZ256mk 146U, // VBROADCASTSSZ256mkz 0U, // VBROADCASTSSZ256r 161U, // VBROADCASTSSZ256rk 50U, // VBROADCASTSSZ256rkz 0U, // VBROADCASTSSZm 289U, // VBROADCASTSSZmk 146U, // VBROADCASTSSZmkz 0U, // VBROADCASTSSZr 161U, // VBROADCASTSSZrk 50U, // VBROADCASTSSZrkz 0U, // VBROADCASTSSrm 0U, // VBROADCASTSSrr 176U, // VCMPPDYrmi 246960U, // VCMPPDYrmi_alt 48U, // VCMPPDYrri 1311792U, // VCMPPDYrri_alt 279760U, // VCMPPDZrmi 246992U, // VCMPPDZrmi_alt 48U, // VCMPPDZrri 1311792U, // VCMPPDZrri_alt 6192U, // VCMPPDZrrib 3408944U, // VCMPPDZrrib_alt 192U, // VCMPPDrmi 246976U, // VCMPPDrmi_alt 48U, // VCMPPDrri 1311792U, // VCMPPDrri_alt 176U, // VCMPPSYrmi 246960U, // VCMPPSYrmi_alt 48U, // VCMPPSYrri 1311792U, // VCMPPSYrri_alt 279760U, // VCMPPSZrmi 246992U, // VCMPPSZrmi_alt 48U, // VCMPPSZrri 1311792U, // VCMPPSZrri_alt 6192U, // VCMPPSZrrib 3408944U, // VCMPPSZrrib_alt 192U, // VCMPPSrmi 246976U, // VCMPPSrmi_alt 48U, // VCMPPSrri 1311792U, // VCMPPSrri_alt 128U, // VCMPSDZrm 246912U, // VCMPSDZrmi_alt 48U, // VCMPSDZrr 1311792U, // VCMPSDZrri_alt 128U, // VCMPSDrm 246912U, // VCMPSDrm_alt 48U, // VCMPSDrr 1311792U, // VCMPSDrr_alt 144U, // VCMPSSZrm 246928U, // VCMPSSZrmi_alt 48U, // VCMPSSZrr 1311792U, // VCMPSSZrri_alt 144U, // VCMPSSrm 246928U, // VCMPSSrm_alt 48U, // VCMPSSrr 1311792U, // VCMPSSrr_alt 0U, // VCOMISDZrm 0U, // VCOMISDZrr 0U, // VCOMISDrm 0U, // VCOMISDrr 0U, // VCOMISSZrm 0U, // VCOMISSZrr 0U, // VCOMISSrm 0U, // VCOMISSrr 81U, // VCOMPRESSPDZ128mrk 161U, // VCOMPRESSPDZ128rrk 50U, // VCOMPRESSPDZ128rrkz 81U, // VCOMPRESSPDZ256mrk 161U, // VCOMPRESSPDZ256rrk 50U, // VCOMPRESSPDZ256rrkz 81U, // VCOMPRESSPDZmrk 161U, // VCOMPRESSPDZrrk 50U, // VCOMPRESSPDZrrkz 81U, // VCOMPRESSPSZ128mrk 161U, // VCOMPRESSPSZ128rrk 50U, // VCOMPRESSPSZ128rrkz 81U, // VCOMPRESSPSZ256mrk 161U, // VCOMPRESSPSZ256rrk 50U, // VCOMPRESSPSZ256rrkz 81U, // VCOMPRESSPSZmrk 161U, // VCOMPRESSPSZrrk 50U, // VCOMPRESSPSZrrkz 0U, // VCVTDQ2PDYrm 0U, // VCVTDQ2PDYrr 0U, // VCVTDQ2PDZrm 0U, // VCVTDQ2PDZrr 0U, // VCVTDQ2PDrm 0U, // VCVTDQ2PDrr 0U, // VCVTDQ2PSYrm 0U, // VCVTDQ2PSYrr 0U, // VCVTDQ2PSZrm 0U, // VCVTDQ2PSZrr 304U, // VCVTDQ2PSZrrb 0U, // VCVTDQ2PSrm 0U, // VCVTDQ2PSrr 0U, // VCVTPD2DQXrm 0U, // VCVTPD2DQYrm 0U, // VCVTPD2DQYrr 0U, // VCVTPD2DQZrm 0U, // VCVTPD2DQZrr 304U, // VCVTPD2DQZrrb 0U, // VCVTPD2DQrr 0U, // VCVTPD2PSXrm 0U, // VCVTPD2PSYrm 0U, // VCVTPD2PSYrr 0U, // VCVTPD2PSZrm 0U, // VCVTPD2PSZrr 304U, // VCVTPD2PSZrrb 0U, // VCVTPD2PSrr 0U, // VCVTPD2UDQZrm 0U, // VCVTPD2UDQZrr 304U, // VCVTPD2UDQZrrb 0U, // VCVTPH2PSYrm 0U, // VCVTPH2PSYrr 0U, // VCVTPH2PSZrm 0U, // VCVTPH2PSZrr 0U, // VCVTPH2PSrm 0U, // VCVTPH2PSrr 0U, // VCVTPS2DQYrm 0U, // VCVTPS2DQYrr 0U, // VCVTPS2DQZrm 0U, // VCVTPS2DQZrr 304U, // VCVTPS2DQZrrb 0U, // VCVTPS2DQrm 0U, // VCVTPS2DQrr 0U, // VCVTPS2PDYrm 0U, // VCVTPS2PDYrr 0U, // VCVTPS2PDZrm 0U, // VCVTPS2PDZrr 0U, // VCVTPS2PDrm 0U, // VCVTPS2PDrr 0U, // VCVTPS2PHYmr 16U, // VCVTPS2PHYrr 0U, // VCVTPS2PHZmr 16U, // VCVTPS2PHZrr 0U, // VCVTPS2PHmr 16U, // VCVTPS2PHrr 0U, // VCVTPS2UDQZrm 0U, // VCVTPS2UDQZrr 304U, // VCVTPS2UDQZrrb 0U, // VCVTSD2SI64Zrm 0U, // VCVTSD2SI64Zrr 0U, // VCVTSD2SI64rm 0U, // VCVTSD2SI64rr 0U, // VCVTSD2SIZrm 0U, // VCVTSD2SIZrr 0U, // VCVTSD2SIrm 0U, // VCVTSD2SIrr 128U, // VCVTSD2SSZrm 48U, // VCVTSD2SSZrr 128U, // VCVTSD2SSrm 48U, // VCVTSD2SSrr 0U, // VCVTSD2USI64Zrm 0U, // VCVTSD2USI64Zrr 0U, // VCVTSD2USIZrm 0U, // VCVTSD2USIZrr 64U, // VCVTSI2SD64rm 48U, // VCVTSI2SD64rr 32U, // VCVTSI2SDZrm 48U, // VCVTSI2SDZrr 32U, // VCVTSI2SDrm 48U, // VCVTSI2SDrr 64U, // VCVTSI2SS64rm 48U, // VCVTSI2SS64rr 32U, // VCVTSI2SSZrm 48U, // VCVTSI2SSZrr 32U, // VCVTSI2SSrm 48U, // VCVTSI2SSrr 64U, // VCVTSI642SDZrm 48U, // VCVTSI642SDZrr 64U, // VCVTSI642SSZrm 48U, // VCVTSI642SSZrr 144U, // VCVTSS2SDZrm 48U, // VCVTSS2SDZrr 144U, // VCVTSS2SDrm 48U, // VCVTSS2SDrr 0U, // VCVTSS2SI64Zrm 0U, // VCVTSS2SI64Zrr 0U, // VCVTSS2SI64rm 0U, // VCVTSS2SI64rr 0U, // VCVTSS2SIZrm 0U, // VCVTSS2SIZrr 0U, // VCVTSS2SIrm 0U, // VCVTSS2SIrr 0U, // VCVTSS2USI64Zrm 0U, // VCVTSS2USI64Zrr 0U, // VCVTSS2USIZrm 0U, // VCVTSS2USIZrr 0U, // VCVTTPD2DQXrm 0U, // VCVTTPD2DQYrm 0U, // VCVTTPD2DQYrr 0U, // VCVTTPD2DQZrm 0U, // VCVTTPD2DQZrr 0U, // VCVTTPD2DQrr 0U, // VCVTTPD2UDQZrm 0U, // VCVTTPD2UDQZrr 0U, // VCVTTPS2DQYrm 0U, // VCVTTPS2DQYrr 0U, // VCVTTPS2DQZrm 0U, // VCVTTPS2DQZrr 0U, // VCVTTPS2DQrm 0U, // VCVTTPS2DQrr 0U, // VCVTTPS2UDQZrm 0U, // VCVTTPS2UDQZrr 0U, // VCVTTSD2SI64Zrm 0U, // VCVTTSD2SI64Zrr 0U, // VCVTTSD2SI64rm 0U, // VCVTTSD2SI64rr 0U, // VCVTTSD2SIZrm 0U, // VCVTTSD2SIZrr 0U, // VCVTTSD2SIrm 0U, // VCVTTSD2SIrr 0U, // VCVTTSD2USI64Zrm 0U, // VCVTTSD2USI64Zrr 0U, // VCVTTSD2USIZrm 0U, // VCVTTSD2USIZrr 0U, // VCVTTSS2SI64Zrm 0U, // VCVTTSS2SI64Zrr 0U, // VCVTTSS2SI64rm 0U, // VCVTTSS2SI64rr 0U, // VCVTTSS2SIZrm 0U, // VCVTTSS2SIZrr 0U, // VCVTTSS2SIrm 0U, // VCVTTSS2SIrr 0U, // VCVTTSS2USI64Zrm 0U, // VCVTTSS2USI64Zrr 0U, // VCVTTSS2USIZrm 0U, // VCVTTSS2USIZrr 0U, // VCVTUDQ2PDZrm 0U, // VCVTUDQ2PDZrr 0U, // VCVTUDQ2PSZrm 0U, // VCVTUDQ2PSZrr 304U, // VCVTUDQ2PSZrrb 32U, // VCVTUSI2SDZrm 48U, // VCVTUSI2SDZrr 32U, // VCVTUSI2SSZrm 48U, // VCVTUSI2SSZrr 64U, // VCVTUSI642SDZrm 48U, // VCVTUSI642SDZrr 64U, // VCVTUSI642SSZrm 48U, // VCVTUSI642SSZrr 176U, // VDIVPDYrm 48U, // VDIVPDYrr 192U, // VDIVPDZ128rm 2176U, // VDIVPDZ128rmb 558241U, // VDIVPDZ128rmbk 574514U, // VDIVPDZ128rmbkz 1115297U, // VDIVPDZ128rmk 1131570U, // VDIVPDZ128rmkz 48U, // VDIVPDZ128rr 1148065U, // VDIVPDZ128rrk 1164338U, // VDIVPDZ128rrkz 176U, // VDIVPDZ256rm 3200U, // VDIVPDZ256rmb 1606817U, // VDIVPDZ256rmbk 1623090U, // VDIVPDZ256rmbkz 132257U, // VDIVPDZ256rmk 1197106U, // VDIVPDZ256rmkz 48U, // VDIVPDZ256rr 1148065U, // VDIVPDZ256rrk 1164338U, // VDIVPDZ256rrkz 164912U, // VDIVPDZrb 8488097U, // VDIVPDZrbk 16892978U, // VDIVPDZrbkz 208U, // VDIVPDZrm 4224U, // VDIVPDZrmb 2131105U, // VDIVPDZrmbk 2147378U, // VDIVPDZrmbkz 181409U, // VDIVPDZrmk 197682U, // VDIVPDZrmkz 48U, // VDIVPDZrr 1148065U, // VDIVPDZrrk 1164338U, // VDIVPDZrrkz 192U, // VDIVPDrm 48U, // VDIVPDrr 176U, // VDIVPSYrm 48U, // VDIVPSYrr 192U, // VDIVPSZ128rm 3216U, // VDIVPSZ128rmb 1787041U, // VDIVPSZ128rmbk 1803314U, // VDIVPSZ128rmbkz 1115297U, // VDIVPSZ128rmk 1131570U, // VDIVPSZ128rmkz 48U, // VDIVPSZ128rr 1148065U, // VDIVPSZ128rrk 1164338U, // VDIVPSZ128rrkz 176U, // VDIVPSZ256rm 4240U, // VDIVPSZ256rmb 2311329U, // VDIVPSZ256rmbk 2327602U, // VDIVPSZ256rmbkz 132257U, // VDIVPSZ256rmk 1197106U, // VDIVPSZ256rmkz 48U, // VDIVPSZ256rr 1148065U, // VDIVPSZ256rrk 1164338U, // VDIVPSZ256rrkz 164912U, // VDIVPSZrb 8488097U, // VDIVPSZrbk 16892978U, // VDIVPSZrbkz 208U, // VDIVPSZrm 5264U, // VDIVPSZrmb 2835617U, // VDIVPSZrmbk 2851890U, // VDIVPSZrmbkz 181409U, // VDIVPSZrmk 197682U, // VDIVPSZrmkz 48U, // VDIVPSZrr 1148065U, // VDIVPSZrrk 1164338U, // VDIVPSZrrkz 192U, // VDIVPSrm 48U, // VDIVPSrr 128U, // VDIVSDZrm 192U, // VDIVSDZrm_Int 1115297U, // VDIVSDZrm_Intk 1131570U, // VDIVSDZrm_Intkz 48U, // VDIVSDZrr 48U, // VDIVSDZrr_Int 1148065U, // VDIVSDZrr_Intk 1164338U, // VDIVSDZrr_Intkz 164912U, // VDIVSDZrrb 8488097U, // VDIVSDZrrbk 16892978U, // VDIVSDZrrbkz 128U, // VDIVSDrm 128U, // VDIVSDrm_Int 48U, // VDIVSDrr 48U, // VDIVSDrr_Int 144U, // VDIVSSZrm 192U, // VDIVSSZrm_Int 1115297U, // VDIVSSZrm_Intk 1131570U, // VDIVSSZrm_Intkz 48U, // VDIVSSZrr 48U, // VDIVSSZrr_Int 1148065U, // VDIVSSZrr_Intk 1164338U, // VDIVSSZrr_Intkz 164912U, // VDIVSSZrrb 8488097U, // VDIVSSZrrbk 16892978U, // VDIVSSZrrbkz 144U, // VDIVSSrm 144U, // VDIVSSrm_Int 48U, // VDIVSSrr 48U, // VDIVSSrr_Int 246976U, // VDPPDrmi 1311792U, // VDPPDrri 247040U, // VDPPSYrmi 1311792U, // VDPPSYrri 246976U, // VDPPSrmi 1311792U, // VDPPSrri 0U, // VERRm 0U, // VERRr 0U, // VERWm 0U, // VERWr 0U, // VEXP2PDm 0U, // VEXP2PDmb 321U, // VEXP2PDmbk 210U, // VEXP2PDmbkz 321U, // VEXP2PDmk 210U, // VEXP2PDmkz 0U, // VEXP2PDr 0U, // VEXP2PDrb 338U, // VEXP2PDrbk 339U, // VEXP2PDrbkz 161U, // VEXP2PDrk 50U, // VEXP2PDrkz 0U, // VEXP2PSm 0U, // VEXP2PSmb 321U, // VEXP2PSmbk 210U, // VEXP2PSmbkz 321U, // VEXP2PSmk 210U, // VEXP2PSmkz 0U, // VEXP2PSr 0U, // VEXP2PSrb 338U, // VEXP2PSrbk 339U, // VEXP2PSrbkz 161U, // VEXP2PSrk 50U, // VEXP2PSrkz 353U, // VEXPANDPDZ128rmk 194U, // VEXPANDPDZ128rmkz 161U, // VEXPANDPDZ128rrk 50U, // VEXPANDPDZ128rrkz 369U, // VEXPANDPDZ256rmk 178U, // VEXPANDPDZ256rmkz 161U, // VEXPANDPDZ256rrk 50U, // VEXPANDPDZ256rrkz 321U, // VEXPANDPDZrmk 210U, // VEXPANDPDZrmkz 161U, // VEXPANDPDZrrk 50U, // VEXPANDPDZrrkz 353U, // VEXPANDPSZ128rmk 194U, // VEXPANDPSZ128rmkz 161U, // VEXPANDPSZ128rrk 50U, // VEXPANDPSZ128rrkz 369U, // VEXPANDPSZ256rmk 178U, // VEXPANDPSZ256rmkz 161U, // VEXPANDPSZ256rrk 50U, // VEXPANDPSZ256rrkz 321U, // VEXPANDPSZrmk 210U, // VEXPANDPSZrmkz 161U, // VEXPANDPSZrrk 50U, // VEXPANDPSZrrkz 0U, // VEXTRACTF128mr 16U, // VEXTRACTF128rr 0U, // VEXTRACTF32x4rm 16U, // VEXTRACTF32x4rr 1185U, // VEXTRACTF32x4rrk 1311794U, // VEXTRACTF32x4rrkz 0U, // VEXTRACTF64x4rm 16U, // VEXTRACTF64x4rr 1185U, // VEXTRACTF64x4rrk 1311794U, // VEXTRACTF64x4rrkz 0U, // VEXTRACTI128mr 16U, // VEXTRACTI128rr 0U, // VEXTRACTI32x4rm 16U, // VEXTRACTI32x4rr 1185U, // VEXTRACTI32x4rrk 1311794U, // VEXTRACTI32x4rrkz 0U, // VEXTRACTI64x4rm 16U, // VEXTRACTI64x4rr 1185U, // VEXTRACTI64x4rrk 1311794U, // VEXTRACTI64x4rrkz 0U, // VEXTRACTPSmr 16U, // VEXTRACTPSrr 0U, // VEXTRACTPSzmr 16U, // VEXTRACTPSzrr 352U, // VFMADD132PDZ128m 2320U, // VFMADD132PDZ128mb 368U, // VFMADD132PDZ256m 3344U, // VFMADD132PDZ256mb 320U, // VFMADD132PDZm 4368U, // VFMADD132PDZmb 352U, // VFMADD132PSZ128m 3360U, // VFMADD132PSZ128mb 368U, // VFMADD132PSZ256m 4384U, // VFMADD132PSZ256mb 320U, // VFMADD132PSZm 5408U, // VFMADD132PSZmb 1066176U, // VFMADDPD4mr 1066160U, // VFMADDPD4mrY 1131568U, // VFMADDPD4rm 1197104U, // VFMADDPD4rmY 1164336U, // VFMADDPD4rr 1164336U, // VFMADDPD4rrY 1164336U, // VFMADDPD4rrY_REV 1164336U, // VFMADDPD4rr_REV 352U, // VFMADDPDZ128v213rm 2320U, // VFMADDPDZ128v213rmb 558241U, // VFMADDPDZ128v213rmbk 558242U, // VFMADDPDZ128v213rmbkz 1115297U, // VFMADDPDZ128v213rmk 1115298U, // VFMADDPDZ128v213rmkz 160U, // VFMADDPDZ128v213rr 1148065U, // VFMADDPDZ128v213rrk 1148066U, // VFMADDPDZ128v213rrkz 352U, // VFMADDPDZ128v231rm 2320U, // VFMADDPDZ128v231rmb 558241U, // VFMADDPDZ128v231rmbk 558242U, // VFMADDPDZ128v231rmbkz 1115297U, // VFMADDPDZ128v231rmk 1115298U, // VFMADDPDZ128v231rmkz 160U, // VFMADDPDZ128v231rr 1148065U, // VFMADDPDZ128v231rrk 1148066U, // VFMADDPDZ128v231rrkz 368U, // VFMADDPDZ256v213rm 3344U, // VFMADDPDZ256v213rmb 1606817U, // VFMADDPDZ256v213rmbk 1606818U, // VFMADDPDZ256v213rmbkz 132257U, // VFMADDPDZ256v213rmk 132258U, // VFMADDPDZ256v213rmkz 160U, // VFMADDPDZ256v213rr 1148065U, // VFMADDPDZ256v213rrk 1148066U, // VFMADDPDZ256v213rrkz 368U, // VFMADDPDZ256v231rm 3344U, // VFMADDPDZ256v231rmb 1606817U, // VFMADDPDZ256v231rmbk 1606818U, // VFMADDPDZ256v231rmbkz 132257U, // VFMADDPDZ256v231rmk 132258U, // VFMADDPDZ256v231rmkz 160U, // VFMADDPDZ256v231rr 1148065U, // VFMADDPDZ256v231rrk 1148066U, // VFMADDPDZ256v231rrkz 320U, // VFMADDPDZv213rm 4368U, // VFMADDPDZv213rmb 2131105U, // VFMADDPDZv213rmbk 2131106U, // VFMADDPDZv213rmbkz 181409U, // VFMADDPDZv213rmk 181410U, // VFMADDPDZv213rmkz 160U, // VFMADDPDZv213rr 296096U, // VFMADDPDZv213rrb 8488097U, // VFMADDPDZv213rrbk 8488098U, // VFMADDPDZv213rrbkz 1148065U, // VFMADDPDZv213rrk 1148066U, // VFMADDPDZv213rrkz 320U, // VFMADDPDZv231rm 4368U, // VFMADDPDZv231rmb 2131105U, // VFMADDPDZv231rmbk 2131106U, // VFMADDPDZv231rmbkz 181409U, // VFMADDPDZv231rmk 181410U, // VFMADDPDZv231rmkz 160U, // VFMADDPDZv231rr 1148065U, // VFMADDPDZv231rrk 1148066U, // VFMADDPDZv231rrkz 352U, // VFMADDPDr132m 368U, // VFMADDPDr132mY 160U, // VFMADDPDr132r 160U, // VFMADDPDr132rY 352U, // VFMADDPDr213m 368U, // VFMADDPDr213mY 160U, // VFMADDPDr213r 160U, // VFMADDPDr213rY 352U, // VFMADDPDr231m 368U, // VFMADDPDr231mY 160U, // VFMADDPDr231r 160U, // VFMADDPDr231rY 1066176U, // VFMADDPS4mr 1066160U, // VFMADDPS4mrY 1131568U, // VFMADDPS4rm 1197104U, // VFMADDPS4rmY 1164336U, // VFMADDPS4rr 1164336U, // VFMADDPS4rrY 1164336U, // VFMADDPS4rrY_REV 1164336U, // VFMADDPS4rr_REV 352U, // VFMADDPSZ128v213rm 3360U, // VFMADDPSZ128v213rmb 1787041U, // VFMADDPSZ128v213rmbk 1787042U, // VFMADDPSZ128v213rmbkz 1115297U, // VFMADDPSZ128v213rmk 1115298U, // VFMADDPSZ128v213rmkz 160U, // VFMADDPSZ128v213rr 1148065U, // VFMADDPSZ128v213rrk 1148066U, // VFMADDPSZ128v213rrkz 352U, // VFMADDPSZ128v231rm 3360U, // VFMADDPSZ128v231rmb 1787041U, // VFMADDPSZ128v231rmbk 1787042U, // VFMADDPSZ128v231rmbkz 1115297U, // VFMADDPSZ128v231rmk 1115298U, // VFMADDPSZ128v231rmkz 160U, // VFMADDPSZ128v231rr 1148065U, // VFMADDPSZ128v231rrk 1148066U, // VFMADDPSZ128v231rrkz 368U, // VFMADDPSZ256v213rm 4384U, // VFMADDPSZ256v213rmb 2311329U, // VFMADDPSZ256v213rmbk 2311330U, // VFMADDPSZ256v213rmbkz 132257U, // VFMADDPSZ256v213rmk 132258U, // VFMADDPSZ256v213rmkz 160U, // VFMADDPSZ256v213rr 1148065U, // VFMADDPSZ256v213rrk 1148066U, // VFMADDPSZ256v213rrkz 368U, // VFMADDPSZ256v231rm 4384U, // VFMADDPSZ256v231rmb 2311329U, // VFMADDPSZ256v231rmbk 2311330U, // VFMADDPSZ256v231rmbkz 132257U, // VFMADDPSZ256v231rmk 132258U, // VFMADDPSZ256v231rmkz 160U, // VFMADDPSZ256v231rr 1148065U, // VFMADDPSZ256v231rrk 1148066U, // VFMADDPSZ256v231rrkz 320U, // VFMADDPSZv213rm 5408U, // VFMADDPSZv213rmb 2835617U, // VFMADDPSZv213rmbk 2835618U, // VFMADDPSZv213rmbkz 181409U, // VFMADDPSZv213rmk 181410U, // VFMADDPSZv213rmkz 160U, // VFMADDPSZv213rr 296096U, // VFMADDPSZv213rrb 8488097U, // VFMADDPSZv213rrbk 8488098U, // VFMADDPSZv213rrbkz 1148065U, // VFMADDPSZv213rrk 1148066U, // VFMADDPSZv213rrkz 320U, // VFMADDPSZv231rm 5408U, // VFMADDPSZv231rmb 2835617U, // VFMADDPSZv231rmbk 2835618U, // VFMADDPSZv231rmbkz 181409U, // VFMADDPSZv231rmk 181410U, // VFMADDPSZv231rmkz 160U, // VFMADDPSZv231rr 1148065U, // VFMADDPSZv231rrk 1148066U, // VFMADDPSZv231rrkz 352U, // VFMADDPSr132m 368U, // VFMADDPSr132mY 160U, // VFMADDPSr132r 160U, // VFMADDPSr132rY 352U, // VFMADDPSr213m 368U, // VFMADDPSr213mY 160U, // VFMADDPSr213r 160U, // VFMADDPSr213rY 352U, // VFMADDPSr231m 368U, // VFMADDPSr231mY 160U, // VFMADDPSr231r 160U, // VFMADDPSr231rY 1066112U, // VFMADDSD4mr 1066112U, // VFMADDSD4mr_Int 1098800U, // VFMADDSD4rm 1098800U, // VFMADDSD4rm_Int 1164336U, // VFMADDSD4rr 1164336U, // VFMADDSD4rr_Int 1164336U, // VFMADDSD4rr_REV 352U, // VFMADDSDZm 160U, // VFMADDSDZr 272U, // VFMADDSDr132m 160U, // VFMADDSDr132r 272U, // VFMADDSDr213m 160U, // VFMADDSDr213r 272U, // VFMADDSDr231m 160U, // VFMADDSDr231r 1066128U, // VFMADDSS4mr 1066128U, // VFMADDSS4mr_Int 1279024U, // VFMADDSS4rm 1279024U, // VFMADDSS4rm_Int 1164336U, // VFMADDSS4rr 1164336U, // VFMADDSS4rr_Int 1164336U, // VFMADDSS4rr_REV 352U, // VFMADDSSZm 160U, // VFMADDSSZr 288U, // VFMADDSSr132m 160U, // VFMADDSSr132r 288U, // VFMADDSSr213m 160U, // VFMADDSSr213r 288U, // VFMADDSSr231m 160U, // VFMADDSSr231r 352U, // VFMADDSUB132PDZ128m 2320U, // VFMADDSUB132PDZ128mb 368U, // VFMADDSUB132PDZ256m 3344U, // VFMADDSUB132PDZ256mb 320U, // VFMADDSUB132PDZm 4368U, // VFMADDSUB132PDZmb 352U, // VFMADDSUB132PSZ128m 3360U, // VFMADDSUB132PSZ128mb 368U, // VFMADDSUB132PSZ256m 4384U, // VFMADDSUB132PSZ256mb 320U, // VFMADDSUB132PSZm 5408U, // VFMADDSUB132PSZmb 1066176U, // VFMADDSUBPD4mr 1066160U, // VFMADDSUBPD4mrY 1131568U, // VFMADDSUBPD4rm 1197104U, // VFMADDSUBPD4rmY 1164336U, // VFMADDSUBPD4rr 1164336U, // VFMADDSUBPD4rrY 1164336U, // VFMADDSUBPD4rrY_REV 1164336U, // VFMADDSUBPD4rr_REV 352U, // VFMADDSUBPDZ128v213rm 2320U, // VFMADDSUBPDZ128v213rmb 558241U, // VFMADDSUBPDZ128v213rmbk 558242U, // VFMADDSUBPDZ128v213rmbkz 1115297U, // VFMADDSUBPDZ128v213rmk 1115298U, // VFMADDSUBPDZ128v213rmkz 160U, // VFMADDSUBPDZ128v213rr 1148065U, // VFMADDSUBPDZ128v213rrk 1148066U, // VFMADDSUBPDZ128v213rrkz 352U, // VFMADDSUBPDZ128v231rm 2320U, // VFMADDSUBPDZ128v231rmb 558241U, // VFMADDSUBPDZ128v231rmbk 558242U, // VFMADDSUBPDZ128v231rmbkz 1115297U, // VFMADDSUBPDZ128v231rmk 1115298U, // VFMADDSUBPDZ128v231rmkz 160U, // VFMADDSUBPDZ128v231rr 1148065U, // VFMADDSUBPDZ128v231rrk 1148066U, // VFMADDSUBPDZ128v231rrkz 368U, // VFMADDSUBPDZ256v213rm 3344U, // VFMADDSUBPDZ256v213rmb 1606817U, // VFMADDSUBPDZ256v213rmbk 1606818U, // VFMADDSUBPDZ256v213rmbkz 132257U, // VFMADDSUBPDZ256v213rmk 132258U, // VFMADDSUBPDZ256v213rmkz 160U, // VFMADDSUBPDZ256v213rr 1148065U, // VFMADDSUBPDZ256v213rrk 1148066U, // VFMADDSUBPDZ256v213rrkz 368U, // VFMADDSUBPDZ256v231rm 3344U, // VFMADDSUBPDZ256v231rmb 1606817U, // VFMADDSUBPDZ256v231rmbk 1606818U, // VFMADDSUBPDZ256v231rmbkz 132257U, // VFMADDSUBPDZ256v231rmk 132258U, // VFMADDSUBPDZ256v231rmkz 160U, // VFMADDSUBPDZ256v231rr 1148065U, // VFMADDSUBPDZ256v231rrk 1148066U, // VFMADDSUBPDZ256v231rrkz 320U, // VFMADDSUBPDZv213rm 4368U, // VFMADDSUBPDZv213rmb 2131105U, // VFMADDSUBPDZv213rmbk 2131106U, // VFMADDSUBPDZv213rmbkz 181409U, // VFMADDSUBPDZv213rmk 181410U, // VFMADDSUBPDZv213rmkz 160U, // VFMADDSUBPDZv213rr 296096U, // VFMADDSUBPDZv213rrb 8488097U, // VFMADDSUBPDZv213rrbk 8488098U, // VFMADDSUBPDZv213rrbkz 1148065U, // VFMADDSUBPDZv213rrk 1148066U, // VFMADDSUBPDZv213rrkz 320U, // VFMADDSUBPDZv231rm 4368U, // VFMADDSUBPDZv231rmb 2131105U, // VFMADDSUBPDZv231rmbk 2131106U, // VFMADDSUBPDZv231rmbkz 181409U, // VFMADDSUBPDZv231rmk 181410U, // VFMADDSUBPDZv231rmkz 160U, // VFMADDSUBPDZv231rr 1148065U, // VFMADDSUBPDZv231rrk 1148066U, // VFMADDSUBPDZv231rrkz 352U, // VFMADDSUBPDr132m 368U, // VFMADDSUBPDr132mY 160U, // VFMADDSUBPDr132r 160U, // VFMADDSUBPDr132rY 352U, // VFMADDSUBPDr213m 368U, // VFMADDSUBPDr213mY 160U, // VFMADDSUBPDr213r 160U, // VFMADDSUBPDr213rY 352U, // VFMADDSUBPDr231m 368U, // VFMADDSUBPDr231mY 160U, // VFMADDSUBPDr231r 160U, // VFMADDSUBPDr231rY 1066176U, // VFMADDSUBPS4mr 1066160U, // VFMADDSUBPS4mrY 1131568U, // VFMADDSUBPS4rm 1197104U, // VFMADDSUBPS4rmY 1164336U, // VFMADDSUBPS4rr 1164336U, // VFMADDSUBPS4rrY 1164336U, // VFMADDSUBPS4rrY_REV 1164336U, // VFMADDSUBPS4rr_REV 352U, // VFMADDSUBPSZ128v213rm 3360U, // VFMADDSUBPSZ128v213rmb 1787041U, // VFMADDSUBPSZ128v213rmbk 1787042U, // VFMADDSUBPSZ128v213rmbkz 1115297U, // VFMADDSUBPSZ128v213rmk 1115298U, // VFMADDSUBPSZ128v213rmkz 160U, // VFMADDSUBPSZ128v213rr 1148065U, // VFMADDSUBPSZ128v213rrk 1148066U, // VFMADDSUBPSZ128v213rrkz 352U, // VFMADDSUBPSZ128v231rm 3360U, // VFMADDSUBPSZ128v231rmb 1787041U, // VFMADDSUBPSZ128v231rmbk 1787042U, // VFMADDSUBPSZ128v231rmbkz 1115297U, // VFMADDSUBPSZ128v231rmk 1115298U, // VFMADDSUBPSZ128v231rmkz 160U, // VFMADDSUBPSZ128v231rr 1148065U, // VFMADDSUBPSZ128v231rrk 1148066U, // VFMADDSUBPSZ128v231rrkz 368U, // VFMADDSUBPSZ256v213rm 4384U, // VFMADDSUBPSZ256v213rmb 2311329U, // VFMADDSUBPSZ256v213rmbk 2311330U, // VFMADDSUBPSZ256v213rmbkz 132257U, // VFMADDSUBPSZ256v213rmk 132258U, // VFMADDSUBPSZ256v213rmkz 160U, // VFMADDSUBPSZ256v213rr 1148065U, // VFMADDSUBPSZ256v213rrk 1148066U, // VFMADDSUBPSZ256v213rrkz 368U, // VFMADDSUBPSZ256v231rm 4384U, // VFMADDSUBPSZ256v231rmb 2311329U, // VFMADDSUBPSZ256v231rmbk 2311330U, // VFMADDSUBPSZ256v231rmbkz 132257U, // VFMADDSUBPSZ256v231rmk 132258U, // VFMADDSUBPSZ256v231rmkz 160U, // VFMADDSUBPSZ256v231rr 1148065U, // VFMADDSUBPSZ256v231rrk 1148066U, // VFMADDSUBPSZ256v231rrkz 320U, // VFMADDSUBPSZv213rm 5408U, // VFMADDSUBPSZv213rmb 2835617U, // VFMADDSUBPSZv213rmbk 2835618U, // VFMADDSUBPSZv213rmbkz 181409U, // VFMADDSUBPSZv213rmk 181410U, // VFMADDSUBPSZv213rmkz 160U, // VFMADDSUBPSZv213rr 296096U, // VFMADDSUBPSZv213rrb 8488097U, // VFMADDSUBPSZv213rrbk 8488098U, // VFMADDSUBPSZv213rrbkz 1148065U, // VFMADDSUBPSZv213rrk 1148066U, // VFMADDSUBPSZv213rrkz 320U, // VFMADDSUBPSZv231rm 5408U, // VFMADDSUBPSZv231rmb 2835617U, // VFMADDSUBPSZv231rmbk 2835618U, // VFMADDSUBPSZv231rmbkz 181409U, // VFMADDSUBPSZv231rmk 181410U, // VFMADDSUBPSZv231rmkz 160U, // VFMADDSUBPSZv231rr 1148065U, // VFMADDSUBPSZv231rrk 1148066U, // VFMADDSUBPSZv231rrkz 352U, // VFMADDSUBPSr132m 368U, // VFMADDSUBPSr132mY 160U, // VFMADDSUBPSr132r 160U, // VFMADDSUBPSr132rY 352U, // VFMADDSUBPSr213m 368U, // VFMADDSUBPSr213mY 160U, // VFMADDSUBPSr213r 160U, // VFMADDSUBPSr213rY 352U, // VFMADDSUBPSr231m 368U, // VFMADDSUBPSr231mY 160U, // VFMADDSUBPSr231r 160U, // VFMADDSUBPSr231rY 352U, // VFMSUB132PDZ128m 2320U, // VFMSUB132PDZ128mb 368U, // VFMSUB132PDZ256m 3344U, // VFMSUB132PDZ256mb 320U, // VFMSUB132PDZm 4368U, // VFMSUB132PDZmb 352U, // VFMSUB132PSZ128m 3360U, // VFMSUB132PSZ128mb 368U, // VFMSUB132PSZ256m 4384U, // VFMSUB132PSZ256mb 320U, // VFMSUB132PSZm 5408U, // VFMSUB132PSZmb 352U, // VFMSUBADD132PDZ128m 2320U, // VFMSUBADD132PDZ128mb 368U, // VFMSUBADD132PDZ256m 3344U, // VFMSUBADD132PDZ256mb 320U, // VFMSUBADD132PDZm 4368U, // VFMSUBADD132PDZmb 352U, // VFMSUBADD132PSZ128m 3360U, // VFMSUBADD132PSZ128mb 368U, // VFMSUBADD132PSZ256m 4384U, // VFMSUBADD132PSZ256mb 320U, // VFMSUBADD132PSZm 5408U, // VFMSUBADD132PSZmb 1066176U, // VFMSUBADDPD4mr 1066160U, // VFMSUBADDPD4mrY 1131568U, // VFMSUBADDPD4rm 1197104U, // VFMSUBADDPD4rmY 1164336U, // VFMSUBADDPD4rr 1164336U, // VFMSUBADDPD4rrY 1164336U, // VFMSUBADDPD4rrY_REV 1164336U, // VFMSUBADDPD4rr_REV 352U, // VFMSUBADDPDZ128v213rm 2320U, // VFMSUBADDPDZ128v213rmb 558241U, // VFMSUBADDPDZ128v213rmbk 558242U, // VFMSUBADDPDZ128v213rmbkz 1115297U, // VFMSUBADDPDZ128v213rmk 1115298U, // VFMSUBADDPDZ128v213rmkz 160U, // VFMSUBADDPDZ128v213rr 1148065U, // VFMSUBADDPDZ128v213rrk 1148066U, // VFMSUBADDPDZ128v213rrkz 352U, // VFMSUBADDPDZ128v231rm 2320U, // VFMSUBADDPDZ128v231rmb 558241U, // VFMSUBADDPDZ128v231rmbk 558242U, // VFMSUBADDPDZ128v231rmbkz 1115297U, // VFMSUBADDPDZ128v231rmk 1115298U, // VFMSUBADDPDZ128v231rmkz 160U, // VFMSUBADDPDZ128v231rr 1148065U, // VFMSUBADDPDZ128v231rrk 1148066U, // VFMSUBADDPDZ128v231rrkz 368U, // VFMSUBADDPDZ256v213rm 3344U, // VFMSUBADDPDZ256v213rmb 1606817U, // VFMSUBADDPDZ256v213rmbk 1606818U, // VFMSUBADDPDZ256v213rmbkz 132257U, // VFMSUBADDPDZ256v213rmk 132258U, // VFMSUBADDPDZ256v213rmkz 160U, // VFMSUBADDPDZ256v213rr 1148065U, // VFMSUBADDPDZ256v213rrk 1148066U, // VFMSUBADDPDZ256v213rrkz 368U, // VFMSUBADDPDZ256v231rm 3344U, // VFMSUBADDPDZ256v231rmb 1606817U, // VFMSUBADDPDZ256v231rmbk 1606818U, // VFMSUBADDPDZ256v231rmbkz 132257U, // VFMSUBADDPDZ256v231rmk 132258U, // VFMSUBADDPDZ256v231rmkz 160U, // VFMSUBADDPDZ256v231rr 1148065U, // VFMSUBADDPDZ256v231rrk 1148066U, // VFMSUBADDPDZ256v231rrkz 320U, // VFMSUBADDPDZv213rm 4368U, // VFMSUBADDPDZv213rmb 2131105U, // VFMSUBADDPDZv213rmbk 2131106U, // VFMSUBADDPDZv213rmbkz 181409U, // VFMSUBADDPDZv213rmk 181410U, // VFMSUBADDPDZv213rmkz 160U, // VFMSUBADDPDZv213rr 296096U, // VFMSUBADDPDZv213rrb 8488097U, // VFMSUBADDPDZv213rrbk 8488098U, // VFMSUBADDPDZv213rrbkz 1148065U, // VFMSUBADDPDZv213rrk 1148066U, // VFMSUBADDPDZv213rrkz 320U, // VFMSUBADDPDZv231rm 4368U, // VFMSUBADDPDZv231rmb 2131105U, // VFMSUBADDPDZv231rmbk 2131106U, // VFMSUBADDPDZv231rmbkz 181409U, // VFMSUBADDPDZv231rmk 181410U, // VFMSUBADDPDZv231rmkz 160U, // VFMSUBADDPDZv231rr 1148065U, // VFMSUBADDPDZv231rrk 1148066U, // VFMSUBADDPDZv231rrkz 352U, // VFMSUBADDPDr132m 368U, // VFMSUBADDPDr132mY 160U, // VFMSUBADDPDr132r 160U, // VFMSUBADDPDr132rY 352U, // VFMSUBADDPDr213m 368U, // VFMSUBADDPDr213mY 160U, // VFMSUBADDPDr213r 160U, // VFMSUBADDPDr213rY 352U, // VFMSUBADDPDr231m 368U, // VFMSUBADDPDr231mY 160U, // VFMSUBADDPDr231r 160U, // VFMSUBADDPDr231rY 1066176U, // VFMSUBADDPS4mr 1066160U, // VFMSUBADDPS4mrY 1131568U, // VFMSUBADDPS4rm 1197104U, // VFMSUBADDPS4rmY 1164336U, // VFMSUBADDPS4rr 1164336U, // VFMSUBADDPS4rrY 1164336U, // VFMSUBADDPS4rrY_REV 1164336U, // VFMSUBADDPS4rr_REV 352U, // VFMSUBADDPSZ128v213rm 3360U, // VFMSUBADDPSZ128v213rmb 1787041U, // VFMSUBADDPSZ128v213rmbk 1787042U, // VFMSUBADDPSZ128v213rmbkz 1115297U, // VFMSUBADDPSZ128v213rmk 1115298U, // VFMSUBADDPSZ128v213rmkz 160U, // VFMSUBADDPSZ128v213rr 1148065U, // VFMSUBADDPSZ128v213rrk 1148066U, // VFMSUBADDPSZ128v213rrkz 352U, // VFMSUBADDPSZ128v231rm 3360U, // VFMSUBADDPSZ128v231rmb 1787041U, // VFMSUBADDPSZ128v231rmbk 1787042U, // VFMSUBADDPSZ128v231rmbkz 1115297U, // VFMSUBADDPSZ128v231rmk 1115298U, // VFMSUBADDPSZ128v231rmkz 160U, // VFMSUBADDPSZ128v231rr 1148065U, // VFMSUBADDPSZ128v231rrk 1148066U, // VFMSUBADDPSZ128v231rrkz 368U, // VFMSUBADDPSZ256v213rm 4384U, // VFMSUBADDPSZ256v213rmb 2311329U, // VFMSUBADDPSZ256v213rmbk 2311330U, // VFMSUBADDPSZ256v213rmbkz 132257U, // VFMSUBADDPSZ256v213rmk 132258U, // VFMSUBADDPSZ256v213rmkz 160U, // VFMSUBADDPSZ256v213rr 1148065U, // VFMSUBADDPSZ256v213rrk 1148066U, // VFMSUBADDPSZ256v213rrkz 368U, // VFMSUBADDPSZ256v231rm 4384U, // VFMSUBADDPSZ256v231rmb 2311329U, // VFMSUBADDPSZ256v231rmbk 2311330U, // VFMSUBADDPSZ256v231rmbkz 132257U, // VFMSUBADDPSZ256v231rmk 132258U, // VFMSUBADDPSZ256v231rmkz 160U, // VFMSUBADDPSZ256v231rr 1148065U, // VFMSUBADDPSZ256v231rrk 1148066U, // VFMSUBADDPSZ256v231rrkz 320U, // VFMSUBADDPSZv213rm 5408U, // VFMSUBADDPSZv213rmb 2835617U, // VFMSUBADDPSZv213rmbk 2835618U, // VFMSUBADDPSZv213rmbkz 181409U, // VFMSUBADDPSZv213rmk 181410U, // VFMSUBADDPSZv213rmkz 160U, // VFMSUBADDPSZv213rr 296096U, // VFMSUBADDPSZv213rrb 8488097U, // VFMSUBADDPSZv213rrbk 8488098U, // VFMSUBADDPSZv213rrbkz 1148065U, // VFMSUBADDPSZv213rrk 1148066U, // VFMSUBADDPSZv213rrkz 320U, // VFMSUBADDPSZv231rm 5408U, // VFMSUBADDPSZv231rmb 2835617U, // VFMSUBADDPSZv231rmbk 2835618U, // VFMSUBADDPSZv231rmbkz 181409U, // VFMSUBADDPSZv231rmk 181410U, // VFMSUBADDPSZv231rmkz 160U, // VFMSUBADDPSZv231rr 1148065U, // VFMSUBADDPSZv231rrk 1148066U, // VFMSUBADDPSZv231rrkz 352U, // VFMSUBADDPSr132m 368U, // VFMSUBADDPSr132mY 160U, // VFMSUBADDPSr132r 160U, // VFMSUBADDPSr132rY 352U, // VFMSUBADDPSr213m 368U, // VFMSUBADDPSr213mY 160U, // VFMSUBADDPSr213r 160U, // VFMSUBADDPSr213rY 352U, // VFMSUBADDPSr231m 368U, // VFMSUBADDPSr231mY 160U, // VFMSUBADDPSr231r 160U, // VFMSUBADDPSr231rY 1066176U, // VFMSUBPD4mr 1066160U, // VFMSUBPD4mrY 1131568U, // VFMSUBPD4rm 1197104U, // VFMSUBPD4rmY 1164336U, // VFMSUBPD4rr 1164336U, // VFMSUBPD4rrY 1164336U, // VFMSUBPD4rrY_REV 1164336U, // VFMSUBPD4rr_REV 352U, // VFMSUBPDZ128v213rm 2320U, // VFMSUBPDZ128v213rmb 558241U, // VFMSUBPDZ128v213rmbk 558242U, // VFMSUBPDZ128v213rmbkz 1115297U, // VFMSUBPDZ128v213rmk 1115298U, // VFMSUBPDZ128v213rmkz 160U, // VFMSUBPDZ128v213rr 1148065U, // VFMSUBPDZ128v213rrk 1148066U, // VFMSUBPDZ128v213rrkz 352U, // VFMSUBPDZ128v231rm 2320U, // VFMSUBPDZ128v231rmb 558241U, // VFMSUBPDZ128v231rmbk 558242U, // VFMSUBPDZ128v231rmbkz 1115297U, // VFMSUBPDZ128v231rmk 1115298U, // VFMSUBPDZ128v231rmkz 160U, // VFMSUBPDZ128v231rr 1148065U, // VFMSUBPDZ128v231rrk 1148066U, // VFMSUBPDZ128v231rrkz 368U, // VFMSUBPDZ256v213rm 3344U, // VFMSUBPDZ256v213rmb 1606817U, // VFMSUBPDZ256v213rmbk 1606818U, // VFMSUBPDZ256v213rmbkz 132257U, // VFMSUBPDZ256v213rmk 132258U, // VFMSUBPDZ256v213rmkz 160U, // VFMSUBPDZ256v213rr 1148065U, // VFMSUBPDZ256v213rrk 1148066U, // VFMSUBPDZ256v213rrkz 368U, // VFMSUBPDZ256v231rm 3344U, // VFMSUBPDZ256v231rmb 1606817U, // VFMSUBPDZ256v231rmbk 1606818U, // VFMSUBPDZ256v231rmbkz 132257U, // VFMSUBPDZ256v231rmk 132258U, // VFMSUBPDZ256v231rmkz 160U, // VFMSUBPDZ256v231rr 1148065U, // VFMSUBPDZ256v231rrk 1148066U, // VFMSUBPDZ256v231rrkz 320U, // VFMSUBPDZv213rm 4368U, // VFMSUBPDZv213rmb 2131105U, // VFMSUBPDZv213rmbk 2131106U, // VFMSUBPDZv213rmbkz 181409U, // VFMSUBPDZv213rmk 181410U, // VFMSUBPDZv213rmkz 160U, // VFMSUBPDZv213rr 296096U, // VFMSUBPDZv213rrb 8488097U, // VFMSUBPDZv213rrbk 8488098U, // VFMSUBPDZv213rrbkz 1148065U, // VFMSUBPDZv213rrk 1148066U, // VFMSUBPDZv213rrkz 320U, // VFMSUBPDZv231rm 4368U, // VFMSUBPDZv231rmb 2131105U, // VFMSUBPDZv231rmbk 2131106U, // VFMSUBPDZv231rmbkz 181409U, // VFMSUBPDZv231rmk 181410U, // VFMSUBPDZv231rmkz 160U, // VFMSUBPDZv231rr 1148065U, // VFMSUBPDZv231rrk 1148066U, // VFMSUBPDZv231rrkz 352U, // VFMSUBPDr132m 368U, // VFMSUBPDr132mY 160U, // VFMSUBPDr132r 160U, // VFMSUBPDr132rY 352U, // VFMSUBPDr213m 368U, // VFMSUBPDr213mY 160U, // VFMSUBPDr213r 160U, // VFMSUBPDr213rY 352U, // VFMSUBPDr231m 368U, // VFMSUBPDr231mY 160U, // VFMSUBPDr231r 160U, // VFMSUBPDr231rY 1066176U, // VFMSUBPS4mr 1066160U, // VFMSUBPS4mrY 1131568U, // VFMSUBPS4rm 1197104U, // VFMSUBPS4rmY 1164336U, // VFMSUBPS4rr 1164336U, // VFMSUBPS4rrY 1164336U, // VFMSUBPS4rrY_REV 1164336U, // VFMSUBPS4rr_REV 352U, // VFMSUBPSZ128v213rm 3360U, // VFMSUBPSZ128v213rmb 1787041U, // VFMSUBPSZ128v213rmbk 1787042U, // VFMSUBPSZ128v213rmbkz 1115297U, // VFMSUBPSZ128v213rmk 1115298U, // VFMSUBPSZ128v213rmkz 160U, // VFMSUBPSZ128v213rr 1148065U, // VFMSUBPSZ128v213rrk 1148066U, // VFMSUBPSZ128v213rrkz 352U, // VFMSUBPSZ128v231rm 3360U, // VFMSUBPSZ128v231rmb 1787041U, // VFMSUBPSZ128v231rmbk 1787042U, // VFMSUBPSZ128v231rmbkz 1115297U, // VFMSUBPSZ128v231rmk 1115298U, // VFMSUBPSZ128v231rmkz 160U, // VFMSUBPSZ128v231rr 1148065U, // VFMSUBPSZ128v231rrk 1148066U, // VFMSUBPSZ128v231rrkz 368U, // VFMSUBPSZ256v213rm 4384U, // VFMSUBPSZ256v213rmb 2311329U, // VFMSUBPSZ256v213rmbk 2311330U, // VFMSUBPSZ256v213rmbkz 132257U, // VFMSUBPSZ256v213rmk 132258U, // VFMSUBPSZ256v213rmkz 160U, // VFMSUBPSZ256v213rr 1148065U, // VFMSUBPSZ256v213rrk 1148066U, // VFMSUBPSZ256v213rrkz 368U, // VFMSUBPSZ256v231rm 4384U, // VFMSUBPSZ256v231rmb 2311329U, // VFMSUBPSZ256v231rmbk 2311330U, // VFMSUBPSZ256v231rmbkz 132257U, // VFMSUBPSZ256v231rmk 132258U, // VFMSUBPSZ256v231rmkz 160U, // VFMSUBPSZ256v231rr 1148065U, // VFMSUBPSZ256v231rrk 1148066U, // VFMSUBPSZ256v231rrkz 320U, // VFMSUBPSZv213rm 5408U, // VFMSUBPSZv213rmb 2835617U, // VFMSUBPSZv213rmbk 2835618U, // VFMSUBPSZv213rmbkz 181409U, // VFMSUBPSZv213rmk 181410U, // VFMSUBPSZv213rmkz 160U, // VFMSUBPSZv213rr 296096U, // VFMSUBPSZv213rrb 8488097U, // VFMSUBPSZv213rrbk 8488098U, // VFMSUBPSZv213rrbkz 1148065U, // VFMSUBPSZv213rrk 1148066U, // VFMSUBPSZv213rrkz 320U, // VFMSUBPSZv231rm 5408U, // VFMSUBPSZv231rmb 2835617U, // VFMSUBPSZv231rmbk 2835618U, // VFMSUBPSZv231rmbkz 181409U, // VFMSUBPSZv231rmk 181410U, // VFMSUBPSZv231rmkz 160U, // VFMSUBPSZv231rr 1148065U, // VFMSUBPSZv231rrk 1148066U, // VFMSUBPSZv231rrkz 352U, // VFMSUBPSr132m 368U, // VFMSUBPSr132mY 160U, // VFMSUBPSr132r 160U, // VFMSUBPSr132rY 352U, // VFMSUBPSr213m 368U, // VFMSUBPSr213mY 160U, // VFMSUBPSr213r 160U, // VFMSUBPSr213rY 352U, // VFMSUBPSr231m 368U, // VFMSUBPSr231mY 160U, // VFMSUBPSr231r 160U, // VFMSUBPSr231rY 1066112U, // VFMSUBSD4mr 1066112U, // VFMSUBSD4mr_Int 1098800U, // VFMSUBSD4rm 1098800U, // VFMSUBSD4rm_Int 1164336U, // VFMSUBSD4rr 1164336U, // VFMSUBSD4rr_Int 1164336U, // VFMSUBSD4rr_REV 352U, // VFMSUBSDZm 160U, // VFMSUBSDZr 272U, // VFMSUBSDr132m 160U, // VFMSUBSDr132r 272U, // VFMSUBSDr213m 160U, // VFMSUBSDr213r 272U, // VFMSUBSDr231m 160U, // VFMSUBSDr231r 1066128U, // VFMSUBSS4mr 1066128U, // VFMSUBSS4mr_Int 1279024U, // VFMSUBSS4rm 1279024U, // VFMSUBSS4rm_Int 1164336U, // VFMSUBSS4rr 1164336U, // VFMSUBSS4rr_Int 1164336U, // VFMSUBSS4rr_REV 352U, // VFMSUBSSZm 160U, // VFMSUBSSZr 288U, // VFMSUBSSr132m 160U, // VFMSUBSSr132r 288U, // VFMSUBSSr213m 160U, // VFMSUBSSr213r 288U, // VFMSUBSSr231m 160U, // VFMSUBSSr231r 352U, // VFNMADD132PDZ128m 2320U, // VFNMADD132PDZ128mb 368U, // VFNMADD132PDZ256m 3344U, // VFNMADD132PDZ256mb 320U, // VFNMADD132PDZm 4368U, // VFNMADD132PDZmb 352U, // VFNMADD132PSZ128m 3360U, // VFNMADD132PSZ128mb 368U, // VFNMADD132PSZ256m 4384U, // VFNMADD132PSZ256mb 320U, // VFNMADD132PSZm 5408U, // VFNMADD132PSZmb 1066176U, // VFNMADDPD4mr 1066160U, // VFNMADDPD4mrY 1131568U, // VFNMADDPD4rm 1197104U, // VFNMADDPD4rmY 1164336U, // VFNMADDPD4rr 1164336U, // VFNMADDPD4rrY 1164336U, // VFNMADDPD4rrY_REV 1164336U, // VFNMADDPD4rr_REV 352U, // VFNMADDPDZ128v213rm 2320U, // VFNMADDPDZ128v213rmb 558241U, // VFNMADDPDZ128v213rmbk 558242U, // VFNMADDPDZ128v213rmbkz 1115297U, // VFNMADDPDZ128v213rmk 1115298U, // VFNMADDPDZ128v213rmkz 160U, // VFNMADDPDZ128v213rr 1148065U, // VFNMADDPDZ128v213rrk 1148066U, // VFNMADDPDZ128v213rrkz 352U, // VFNMADDPDZ128v231rm 2320U, // VFNMADDPDZ128v231rmb 558241U, // VFNMADDPDZ128v231rmbk 558242U, // VFNMADDPDZ128v231rmbkz 1115297U, // VFNMADDPDZ128v231rmk 1115298U, // VFNMADDPDZ128v231rmkz 160U, // VFNMADDPDZ128v231rr 1148065U, // VFNMADDPDZ128v231rrk 1148066U, // VFNMADDPDZ128v231rrkz 368U, // VFNMADDPDZ256v213rm 3344U, // VFNMADDPDZ256v213rmb 1606817U, // VFNMADDPDZ256v213rmbk 1606818U, // VFNMADDPDZ256v213rmbkz 132257U, // VFNMADDPDZ256v213rmk 132258U, // VFNMADDPDZ256v213rmkz 160U, // VFNMADDPDZ256v213rr 1148065U, // VFNMADDPDZ256v213rrk 1148066U, // VFNMADDPDZ256v213rrkz 368U, // VFNMADDPDZ256v231rm 3344U, // VFNMADDPDZ256v231rmb 1606817U, // VFNMADDPDZ256v231rmbk 1606818U, // VFNMADDPDZ256v231rmbkz 132257U, // VFNMADDPDZ256v231rmk 132258U, // VFNMADDPDZ256v231rmkz 160U, // VFNMADDPDZ256v231rr 1148065U, // VFNMADDPDZ256v231rrk 1148066U, // VFNMADDPDZ256v231rrkz 320U, // VFNMADDPDZv213rm 4368U, // VFNMADDPDZv213rmb 2131105U, // VFNMADDPDZv213rmbk 2131106U, // VFNMADDPDZv213rmbkz 181409U, // VFNMADDPDZv213rmk 181410U, // VFNMADDPDZv213rmkz 160U, // VFNMADDPDZv213rr 296096U, // VFNMADDPDZv213rrb 8488097U, // VFNMADDPDZv213rrbk 8488098U, // VFNMADDPDZv213rrbkz 1148065U, // VFNMADDPDZv213rrk 1148066U, // VFNMADDPDZv213rrkz 320U, // VFNMADDPDZv231rm 4368U, // VFNMADDPDZv231rmb 2131105U, // VFNMADDPDZv231rmbk 2131106U, // VFNMADDPDZv231rmbkz 181409U, // VFNMADDPDZv231rmk 181410U, // VFNMADDPDZv231rmkz 160U, // VFNMADDPDZv231rr 1148065U, // VFNMADDPDZv231rrk 1148066U, // VFNMADDPDZv231rrkz 352U, // VFNMADDPDr132m 368U, // VFNMADDPDr132mY 160U, // VFNMADDPDr132r 160U, // VFNMADDPDr132rY 352U, // VFNMADDPDr213m 368U, // VFNMADDPDr213mY 160U, // VFNMADDPDr213r 160U, // VFNMADDPDr213rY 352U, // VFNMADDPDr231m 368U, // VFNMADDPDr231mY 160U, // VFNMADDPDr231r 160U, // VFNMADDPDr231rY 1066176U, // VFNMADDPS4mr 1066160U, // VFNMADDPS4mrY 1131568U, // VFNMADDPS4rm 1197104U, // VFNMADDPS4rmY 1164336U, // VFNMADDPS4rr 1164336U, // VFNMADDPS4rrY 1164336U, // VFNMADDPS4rrY_REV 1164336U, // VFNMADDPS4rr_REV 352U, // VFNMADDPSZ128v213rm 3360U, // VFNMADDPSZ128v213rmb 1787041U, // VFNMADDPSZ128v213rmbk 1787042U, // VFNMADDPSZ128v213rmbkz 1115297U, // VFNMADDPSZ128v213rmk 1115298U, // VFNMADDPSZ128v213rmkz 160U, // VFNMADDPSZ128v213rr 1148065U, // VFNMADDPSZ128v213rrk 1148066U, // VFNMADDPSZ128v213rrkz 352U, // VFNMADDPSZ128v231rm 3360U, // VFNMADDPSZ128v231rmb 1787041U, // VFNMADDPSZ128v231rmbk 1787042U, // VFNMADDPSZ128v231rmbkz 1115297U, // VFNMADDPSZ128v231rmk 1115298U, // VFNMADDPSZ128v231rmkz 160U, // VFNMADDPSZ128v231rr 1148065U, // VFNMADDPSZ128v231rrk 1148066U, // VFNMADDPSZ128v231rrkz 368U, // VFNMADDPSZ256v213rm 4384U, // VFNMADDPSZ256v213rmb 2311329U, // VFNMADDPSZ256v213rmbk 2311330U, // VFNMADDPSZ256v213rmbkz 132257U, // VFNMADDPSZ256v213rmk 132258U, // VFNMADDPSZ256v213rmkz 160U, // VFNMADDPSZ256v213rr 1148065U, // VFNMADDPSZ256v213rrk 1148066U, // VFNMADDPSZ256v213rrkz 368U, // VFNMADDPSZ256v231rm 4384U, // VFNMADDPSZ256v231rmb 2311329U, // VFNMADDPSZ256v231rmbk 2311330U, // VFNMADDPSZ256v231rmbkz 132257U, // VFNMADDPSZ256v231rmk 132258U, // VFNMADDPSZ256v231rmkz 160U, // VFNMADDPSZ256v231rr 1148065U, // VFNMADDPSZ256v231rrk 1148066U, // VFNMADDPSZ256v231rrkz 320U, // VFNMADDPSZv213rm 5408U, // VFNMADDPSZv213rmb 2835617U, // VFNMADDPSZv213rmbk 2835618U, // VFNMADDPSZv213rmbkz 181409U, // VFNMADDPSZv213rmk 181410U, // VFNMADDPSZv213rmkz 160U, // VFNMADDPSZv213rr 296096U, // VFNMADDPSZv213rrb 8488097U, // VFNMADDPSZv213rrbk 8488098U, // VFNMADDPSZv213rrbkz 1148065U, // VFNMADDPSZv213rrk 1148066U, // VFNMADDPSZv213rrkz 320U, // VFNMADDPSZv231rm 5408U, // VFNMADDPSZv231rmb 2835617U, // VFNMADDPSZv231rmbk 2835618U, // VFNMADDPSZv231rmbkz 181409U, // VFNMADDPSZv231rmk 181410U, // VFNMADDPSZv231rmkz 160U, // VFNMADDPSZv231rr 1148065U, // VFNMADDPSZv231rrk 1148066U, // VFNMADDPSZv231rrkz 352U, // VFNMADDPSr132m 368U, // VFNMADDPSr132mY 160U, // VFNMADDPSr132r 160U, // VFNMADDPSr132rY 352U, // VFNMADDPSr213m 368U, // VFNMADDPSr213mY 160U, // VFNMADDPSr213r 160U, // VFNMADDPSr213rY 352U, // VFNMADDPSr231m 368U, // VFNMADDPSr231mY 160U, // VFNMADDPSr231r 160U, // VFNMADDPSr231rY 1066112U, // VFNMADDSD4mr 1066112U, // VFNMADDSD4mr_Int 1098800U, // VFNMADDSD4rm 1098800U, // VFNMADDSD4rm_Int 1164336U, // VFNMADDSD4rr 1164336U, // VFNMADDSD4rr_Int 1164336U, // VFNMADDSD4rr_REV 352U, // VFNMADDSDZm 160U, // VFNMADDSDZr 272U, // VFNMADDSDr132m 160U, // VFNMADDSDr132r 272U, // VFNMADDSDr213m 160U, // VFNMADDSDr213r 272U, // VFNMADDSDr231m 160U, // VFNMADDSDr231r 1066128U, // VFNMADDSS4mr 1066128U, // VFNMADDSS4mr_Int 1279024U, // VFNMADDSS4rm 1279024U, // VFNMADDSS4rm_Int 1164336U, // VFNMADDSS4rr 1164336U, // VFNMADDSS4rr_Int 1164336U, // VFNMADDSS4rr_REV 352U, // VFNMADDSSZm 160U, // VFNMADDSSZr 288U, // VFNMADDSSr132m 160U, // VFNMADDSSr132r 288U, // VFNMADDSSr213m 160U, // VFNMADDSSr213r 288U, // VFNMADDSSr231m 160U, // VFNMADDSSr231r 352U, // VFNMSUB132PDZ128m 2320U, // VFNMSUB132PDZ128mb 368U, // VFNMSUB132PDZ256m 3344U, // VFNMSUB132PDZ256mb 320U, // VFNMSUB132PDZm 4368U, // VFNMSUB132PDZmb 352U, // VFNMSUB132PSZ128m 3360U, // VFNMSUB132PSZ128mb 368U, // VFNMSUB132PSZ256m 4384U, // VFNMSUB132PSZ256mb 320U, // VFNMSUB132PSZm 5408U, // VFNMSUB132PSZmb 1066176U, // VFNMSUBPD4mr 1066160U, // VFNMSUBPD4mrY 1131568U, // VFNMSUBPD4rm 1197104U, // VFNMSUBPD4rmY 1164336U, // VFNMSUBPD4rr 1164336U, // VFNMSUBPD4rrY 1164336U, // VFNMSUBPD4rrY_REV 1164336U, // VFNMSUBPD4rr_REV 352U, // VFNMSUBPDZ128v213rm 2320U, // VFNMSUBPDZ128v213rmb 558241U, // VFNMSUBPDZ128v213rmbk 558242U, // VFNMSUBPDZ128v213rmbkz 1115297U, // VFNMSUBPDZ128v213rmk 1115298U, // VFNMSUBPDZ128v213rmkz 160U, // VFNMSUBPDZ128v213rr 1148065U, // VFNMSUBPDZ128v213rrk 1148066U, // VFNMSUBPDZ128v213rrkz 352U, // VFNMSUBPDZ128v231rm 2320U, // VFNMSUBPDZ128v231rmb 558241U, // VFNMSUBPDZ128v231rmbk 558242U, // VFNMSUBPDZ128v231rmbkz 1115297U, // VFNMSUBPDZ128v231rmk 1115298U, // VFNMSUBPDZ128v231rmkz 160U, // VFNMSUBPDZ128v231rr 1148065U, // VFNMSUBPDZ128v231rrk 1148066U, // VFNMSUBPDZ128v231rrkz 368U, // VFNMSUBPDZ256v213rm 3344U, // VFNMSUBPDZ256v213rmb 1606817U, // VFNMSUBPDZ256v213rmbk 1606818U, // VFNMSUBPDZ256v213rmbkz 132257U, // VFNMSUBPDZ256v213rmk 132258U, // VFNMSUBPDZ256v213rmkz 160U, // VFNMSUBPDZ256v213rr 1148065U, // VFNMSUBPDZ256v213rrk 1148066U, // VFNMSUBPDZ256v213rrkz 368U, // VFNMSUBPDZ256v231rm 3344U, // VFNMSUBPDZ256v231rmb 1606817U, // VFNMSUBPDZ256v231rmbk 1606818U, // VFNMSUBPDZ256v231rmbkz 132257U, // VFNMSUBPDZ256v231rmk 132258U, // VFNMSUBPDZ256v231rmkz 160U, // VFNMSUBPDZ256v231rr 1148065U, // VFNMSUBPDZ256v231rrk 1148066U, // VFNMSUBPDZ256v231rrkz 320U, // VFNMSUBPDZv213rm 4368U, // VFNMSUBPDZv213rmb 2131105U, // VFNMSUBPDZv213rmbk 2131106U, // VFNMSUBPDZv213rmbkz 181409U, // VFNMSUBPDZv213rmk 181410U, // VFNMSUBPDZv213rmkz 160U, // VFNMSUBPDZv213rr 296096U, // VFNMSUBPDZv213rrb 8488097U, // VFNMSUBPDZv213rrbk 8488098U, // VFNMSUBPDZv213rrbkz 1148065U, // VFNMSUBPDZv213rrk 1148066U, // VFNMSUBPDZv213rrkz 320U, // VFNMSUBPDZv231rm 4368U, // VFNMSUBPDZv231rmb 2131105U, // VFNMSUBPDZv231rmbk 2131106U, // VFNMSUBPDZv231rmbkz 181409U, // VFNMSUBPDZv231rmk 181410U, // VFNMSUBPDZv231rmkz 160U, // VFNMSUBPDZv231rr 1148065U, // VFNMSUBPDZv231rrk 1148066U, // VFNMSUBPDZv231rrkz 352U, // VFNMSUBPDr132m 368U, // VFNMSUBPDr132mY 160U, // VFNMSUBPDr132r 160U, // VFNMSUBPDr132rY 352U, // VFNMSUBPDr213m 368U, // VFNMSUBPDr213mY 160U, // VFNMSUBPDr213r 160U, // VFNMSUBPDr213rY 352U, // VFNMSUBPDr231m 368U, // VFNMSUBPDr231mY 160U, // VFNMSUBPDr231r 160U, // VFNMSUBPDr231rY 1066176U, // VFNMSUBPS4mr 1066160U, // VFNMSUBPS4mrY 1131568U, // VFNMSUBPS4rm 1197104U, // VFNMSUBPS4rmY 1164336U, // VFNMSUBPS4rr 1164336U, // VFNMSUBPS4rrY 1164336U, // VFNMSUBPS4rrY_REV 1164336U, // VFNMSUBPS4rr_REV 352U, // VFNMSUBPSZ128v213rm 3360U, // VFNMSUBPSZ128v213rmb 1787041U, // VFNMSUBPSZ128v213rmbk 1787042U, // VFNMSUBPSZ128v213rmbkz 1115297U, // VFNMSUBPSZ128v213rmk 1115298U, // VFNMSUBPSZ128v213rmkz 160U, // VFNMSUBPSZ128v213rr 1148065U, // VFNMSUBPSZ128v213rrk 1148066U, // VFNMSUBPSZ128v213rrkz 352U, // VFNMSUBPSZ128v231rm 3360U, // VFNMSUBPSZ128v231rmb 1787041U, // VFNMSUBPSZ128v231rmbk 1787042U, // VFNMSUBPSZ128v231rmbkz 1115297U, // VFNMSUBPSZ128v231rmk 1115298U, // VFNMSUBPSZ128v231rmkz 160U, // VFNMSUBPSZ128v231rr 1148065U, // VFNMSUBPSZ128v231rrk 1148066U, // VFNMSUBPSZ128v231rrkz 368U, // VFNMSUBPSZ256v213rm 4384U, // VFNMSUBPSZ256v213rmb 2311329U, // VFNMSUBPSZ256v213rmbk 2311330U, // VFNMSUBPSZ256v213rmbkz 132257U, // VFNMSUBPSZ256v213rmk 132258U, // VFNMSUBPSZ256v213rmkz 160U, // VFNMSUBPSZ256v213rr 1148065U, // VFNMSUBPSZ256v213rrk 1148066U, // VFNMSUBPSZ256v213rrkz 368U, // VFNMSUBPSZ256v231rm 4384U, // VFNMSUBPSZ256v231rmb 2311329U, // VFNMSUBPSZ256v231rmbk 2311330U, // VFNMSUBPSZ256v231rmbkz 132257U, // VFNMSUBPSZ256v231rmk 132258U, // VFNMSUBPSZ256v231rmkz 160U, // VFNMSUBPSZ256v231rr 1148065U, // VFNMSUBPSZ256v231rrk 1148066U, // VFNMSUBPSZ256v231rrkz 320U, // VFNMSUBPSZv213rm 5408U, // VFNMSUBPSZv213rmb 2835617U, // VFNMSUBPSZv213rmbk 2835618U, // VFNMSUBPSZv213rmbkz 181409U, // VFNMSUBPSZv213rmk 181410U, // VFNMSUBPSZv213rmkz 160U, // VFNMSUBPSZv213rr 296096U, // VFNMSUBPSZv213rrb 8488097U, // VFNMSUBPSZv213rrbk 8488098U, // VFNMSUBPSZv213rrbkz 1148065U, // VFNMSUBPSZv213rrk 1148066U, // VFNMSUBPSZv213rrkz 320U, // VFNMSUBPSZv231rm 5408U, // VFNMSUBPSZv231rmb 2835617U, // VFNMSUBPSZv231rmbk 2835618U, // VFNMSUBPSZv231rmbkz 181409U, // VFNMSUBPSZv231rmk 181410U, // VFNMSUBPSZv231rmkz 160U, // VFNMSUBPSZv231rr 1148065U, // VFNMSUBPSZv231rrk 1148066U, // VFNMSUBPSZv231rrkz 352U, // VFNMSUBPSr132m 368U, // VFNMSUBPSr132mY 160U, // VFNMSUBPSr132r 160U, // VFNMSUBPSr132rY 352U, // VFNMSUBPSr213m 368U, // VFNMSUBPSr213mY 160U, // VFNMSUBPSr213r 160U, // VFNMSUBPSr213rY 352U, // VFNMSUBPSr231m 368U, // VFNMSUBPSr231mY 160U, // VFNMSUBPSr231r 160U, // VFNMSUBPSr231rY 1066112U, // VFNMSUBSD4mr 1066112U, // VFNMSUBSD4mr_Int 1098800U, // VFNMSUBSD4rm 1098800U, // VFNMSUBSD4rm_Int 1164336U, // VFNMSUBSD4rr 1164336U, // VFNMSUBSD4rr_Int 1164336U, // VFNMSUBSD4rr_REV 352U, // VFNMSUBSDZm 160U, // VFNMSUBSDZr 272U, // VFNMSUBSDr132m 160U, // VFNMSUBSDr132r 272U, // VFNMSUBSDr213m 160U, // VFNMSUBSDr213r 272U, // VFNMSUBSDr231m 160U, // VFNMSUBSDr231r 1066128U, // VFNMSUBSS4mr 1066128U, // VFNMSUBSS4mr_Int 1279024U, // VFNMSUBSS4rm 1279024U, // VFNMSUBSS4rm_Int 1164336U, // VFNMSUBSS4rr 1164336U, // VFNMSUBSS4rr_Int 1164336U, // VFNMSUBSS4rr_REV 352U, // VFNMSUBSSZm 160U, // VFNMSUBSSZr 288U, // VFNMSUBSSr132m 160U, // VFNMSUBSSr132r 288U, // VFNMSUBSSr213m 160U, // VFNMSUBSSr213r 288U, // VFNMSUBSSr231m 160U, // VFNMSUBSSr231r 0U, // VFRCZPDrm 0U, // VFRCZPDrmY 0U, // VFRCZPDrr 0U, // VFRCZPDrrY 0U, // VFRCZPSrm 0U, // VFRCZPSrmY 0U, // VFRCZPSrr 0U, // VFRCZPSrrY 0U, // VFRCZSDrm 0U, // VFRCZSDrr 0U, // VFRCZSSrm 0U, // VFRCZSSrr 192U, // VFsANDNPDrm 48U, // VFsANDNPDrr 192U, // VFsANDNPSrm 48U, // VFsANDNPSrr 192U, // VFsANDPDrm 48U, // VFsANDPDrr 192U, // VFsANDPSrm 48U, // VFsANDPSrr 192U, // VFsORPDrm 48U, // VFsORPDrr 192U, // VFsORPSrm 48U, // VFsORPSrr 192U, // VFsXORPDrm 48U, // VFsXORPDrr 192U, // VFsXORPSrm 48U, // VFsXORPSrr 192U, // VFvANDNPDrm 48U, // VFvANDNPDrr 192U, // VFvANDNPSrm 48U, // VFvANDNPSrr 192U, // VFvANDPDrm 48U, // VFvANDPDrr 192U, // VFvANDPSrm 48U, // VFvANDPSrr 192U, // VFvORPDrm 48U, // VFvORPDrr 192U, // VFvORPSrm 48U, // VFvORPSrr 192U, // VFvXORPDrm 48U, // VFvXORPDrr 192U, // VFvXORPSrm 48U, // VFvXORPSrr 0U, // VGATHERDPDYrm 3U, // VGATHERDPDZrm 0U, // VGATHERDPDrm 0U, // VGATHERDPSYrm 4U, // VGATHERDPSZrm 0U, // VGATHERDPSrm 0U, // VGATHERPF0DPDm 0U, // VGATHERPF0DPSm 0U, // VGATHERPF0QPDm 0U, // VGATHERPF0QPSm 0U, // VGATHERPF1DPDm 0U, // VGATHERPF1DPSm 0U, // VGATHERPF1QPDm 0U, // VGATHERPF1QPSm 0U, // VGATHERQPDYrm 3U, // VGATHERQPDZrm 0U, // VGATHERQPDrm 0U, // VGATHERQPSYrm 3U, // VGATHERQPSZrm 0U, // VGATHERQPSrm 176U, // VHADDPDYrm 48U, // VHADDPDYrr 192U, // VHADDPDrm 48U, // VHADDPDrr 176U, // VHADDPSYrm 48U, // VHADDPSYrr 192U, // VHADDPSrm 48U, // VHADDPSrr 176U, // VHSUBPDYrm 48U, // VHSUBPDYrr 192U, // VHSUBPDrm 48U, // VHSUBPDrr 176U, // VHSUBPSYrm 48U, // VHSUBPSYrr 192U, // VHSUBPSrm 48U, // VHSUBPSrr 246976U, // VINSERTF128rm 1311792U, // VINSERTF128rr 246976U, // VINSERTF32x4rm 1311792U, // VINSERTF32x4rr 246960U, // VINSERTF32x8rm 1311792U, // VINSERTF32x8rr 246976U, // VINSERTF64x2rm 1311792U, // VINSERTF64x2rr 246960U, // VINSERTF64x4rm 1311792U, // VINSERTF64x4rr 247008U, // VINSERTI128rm 1311792U, // VINSERTI128rr 247008U, // VINSERTI32x4rm 1311792U, // VINSERTI32x4rr 247040U, // VINSERTI32x8rm 1311792U, // VINSERTI32x8rr 247008U, // VINSERTI64x2rm 1311792U, // VINSERTI64x2rr 247040U, // VINSERTI64x4rm 1311792U, // VINSERTI64x4rr 246928U, // VINSERTPSrm 1311792U, // VINSERTPSrr 246928U, // VINSERTPSzrm 1311792U, // VINSERTPSzrr 0U, // VLDDQUYrm 0U, // VLDDQUrm 0U, // VLDMXCSR 0U, // VMASKMOVDQU 0U, // VMASKMOVDQU64 80U, // VMASKMOVPDYmr 176U, // VMASKMOVPDYrm 80U, // VMASKMOVPDmr 192U, // VMASKMOVPDrm 80U, // VMASKMOVPSYmr 176U, // VMASKMOVPSYrm 80U, // VMASKMOVPSmr 192U, // VMASKMOVPSrm 176U, // VMAXCPDYrm 48U, // VMAXCPDYrr 192U, // VMAXCPDrm 48U, // VMAXCPDrr 176U, // VMAXCPSYrm 48U, // VMAXCPSYrr 192U, // VMAXCPSrm 48U, // VMAXCPSrr 128U, // VMAXCSDrm 48U, // VMAXCSDrr 144U, // VMAXCSSrm 48U, // VMAXCSSrr 176U, // VMAXPDYrm 48U, // VMAXPDYrr 192U, // VMAXPDZ128rm 2176U, // VMAXPDZ128rmb 558241U, // VMAXPDZ128rmbk 574514U, // VMAXPDZ128rmbkz 1115297U, // VMAXPDZ128rmk 1131570U, // VMAXPDZ128rmkz 48U, // VMAXPDZ128rr 1148065U, // VMAXPDZ128rrk 1164338U, // VMAXPDZ128rrkz 176U, // VMAXPDZ256rm 3200U, // VMAXPDZ256rmb 1606817U, // VMAXPDZ256rmbk 1623090U, // VMAXPDZ256rmbkz 132257U, // VMAXPDZ256rmk 1197106U, // VMAXPDZ256rmkz 48U, // VMAXPDZ256rr 1148065U, // VMAXPDZ256rrk 1164338U, // VMAXPDZ256rrkz 208U, // VMAXPDZrm 4224U, // VMAXPDZrmb 2131105U, // VMAXPDZrmbk 2147378U, // VMAXPDZrmbkz 181409U, // VMAXPDZrmk 197682U, // VMAXPDZrmkz 48U, // VMAXPDZrr 1148065U, // VMAXPDZrrk 1164338U, // VMAXPDZrrkz 192U, // VMAXPDrm 48U, // VMAXPDrr 176U, // VMAXPSYrm 48U, // VMAXPSYrr 192U, // VMAXPSZ128rm 3216U, // VMAXPSZ128rmb 1787041U, // VMAXPSZ128rmbk 1803314U, // VMAXPSZ128rmbkz 1115297U, // VMAXPSZ128rmk 1131570U, // VMAXPSZ128rmkz 48U, // VMAXPSZ128rr 1148065U, // VMAXPSZ128rrk 1164338U, // VMAXPSZ128rrkz 176U, // VMAXPSZ256rm 4240U, // VMAXPSZ256rmb 2311329U, // VMAXPSZ256rmbk 2327602U, // VMAXPSZ256rmbkz 132257U, // VMAXPSZ256rmk 1197106U, // VMAXPSZ256rmkz 48U, // VMAXPSZ256rr 1148065U, // VMAXPSZ256rrk 1164338U, // VMAXPSZ256rrkz 208U, // VMAXPSZrm 5264U, // VMAXPSZrmb 2835617U, // VMAXPSZrmbk 2851890U, // VMAXPSZrmbkz 181409U, // VMAXPSZrmk 197682U, // VMAXPSZrmkz 48U, // VMAXPSZrr 1148065U, // VMAXPSZrrk 1164338U, // VMAXPSZrrkz 192U, // VMAXPSrm 48U, // VMAXPSrr 128U, // VMAXSDZrm 192U, // VMAXSDZrm_Int 1115297U, // VMAXSDZrm_Intk 1131570U, // VMAXSDZrm_Intkz 48U, // VMAXSDZrr 48U, // VMAXSDZrr_Int 1148065U, // VMAXSDZrr_Intk 1164338U, // VMAXSDZrr_Intkz 340U, // VMAXSDZrrb 318850U, // VMAXSDZrrbk 319875U, // VMAXSDZrrbkz 128U, // VMAXSDrm 128U, // VMAXSDrm_Int 48U, // VMAXSDrr 48U, // VMAXSDrr_Int 144U, // VMAXSSZrm 192U, // VMAXSSZrm_Int 1115297U, // VMAXSSZrm_Intk 1131570U, // VMAXSSZrm_Intkz 48U, // VMAXSSZrr 48U, // VMAXSSZrr_Int 1148065U, // VMAXSSZrr_Intk 1164338U, // VMAXSSZrr_Intkz 340U, // VMAXSSZrrb 318850U, // VMAXSSZrrbk 319875U, // VMAXSSZrrbkz 144U, // VMAXSSrm 144U, // VMAXSSrm_Int 48U, // VMAXSSrr 48U, // VMAXSSrr_Int 0U, // VMCALL 0U, // VMCLEARm 0U, // VMFUNC 176U, // VMINCPDYrm 48U, // VMINCPDYrr 192U, // VMINCPDrm 48U, // VMINCPDrr 176U, // VMINCPSYrm 48U, // VMINCPSYrr 192U, // VMINCPSrm 48U, // VMINCPSrr 128U, // VMINCSDrm 48U, // VMINCSDrr 144U, // VMINCSSrm 48U, // VMINCSSrr 176U, // VMINPDYrm 48U, // VMINPDYrr 192U, // VMINPDZ128rm 2176U, // VMINPDZ128rmb 558241U, // VMINPDZ128rmbk 574514U, // VMINPDZ128rmbkz 1115297U, // VMINPDZ128rmk 1131570U, // VMINPDZ128rmkz 48U, // VMINPDZ128rr 1148065U, // VMINPDZ128rrk 1164338U, // VMINPDZ128rrkz 176U, // VMINPDZ256rm 3200U, // VMINPDZ256rmb 1606817U, // VMINPDZ256rmbk 1623090U, // VMINPDZ256rmbkz 132257U, // VMINPDZ256rmk 1197106U, // VMINPDZ256rmkz 48U, // VMINPDZ256rr 1148065U, // VMINPDZ256rrk 1164338U, // VMINPDZ256rrkz 208U, // VMINPDZrm 4224U, // VMINPDZrmb 2131105U, // VMINPDZrmbk 2147378U, // VMINPDZrmbkz 181409U, // VMINPDZrmk 197682U, // VMINPDZrmkz 48U, // VMINPDZrr 1148065U, // VMINPDZrrk 1164338U, // VMINPDZrrkz 192U, // VMINPDrm 48U, // VMINPDrr 176U, // VMINPSYrm 48U, // VMINPSYrr 192U, // VMINPSZ128rm 3216U, // VMINPSZ128rmb 1787041U, // VMINPSZ128rmbk 1803314U, // VMINPSZ128rmbkz 1115297U, // VMINPSZ128rmk 1131570U, // VMINPSZ128rmkz 48U, // VMINPSZ128rr 1148065U, // VMINPSZ128rrk 1164338U, // VMINPSZ128rrkz 176U, // VMINPSZ256rm 4240U, // VMINPSZ256rmb 2311329U, // VMINPSZ256rmbk 2327602U, // VMINPSZ256rmbkz 132257U, // VMINPSZ256rmk 1197106U, // VMINPSZ256rmkz 48U, // VMINPSZ256rr 1148065U, // VMINPSZ256rrk 1164338U, // VMINPSZ256rrkz 208U, // VMINPSZrm 5264U, // VMINPSZrmb 2835617U, // VMINPSZrmbk 2851890U, // VMINPSZrmbkz 181409U, // VMINPSZrmk 197682U, // VMINPSZrmkz 48U, // VMINPSZrr 1148065U, // VMINPSZrrk 1164338U, // VMINPSZrrkz 192U, // VMINPSrm 48U, // VMINPSrr 128U, // VMINSDZrm 192U, // VMINSDZrm_Int 1115297U, // VMINSDZrm_Intk 1131570U, // VMINSDZrm_Intkz 48U, // VMINSDZrr 48U, // VMINSDZrr_Int 1148065U, // VMINSDZrr_Intk 1164338U, // VMINSDZrr_Intkz 340U, // VMINSDZrrb 318850U, // VMINSDZrrbk 319875U, // VMINSDZrrbkz 128U, // VMINSDrm 128U, // VMINSDrm_Int 48U, // VMINSDrr 48U, // VMINSDrr_Int 144U, // VMINSSZrm 192U, // VMINSSZrm_Int 1115297U, // VMINSSZrm_Intk 1131570U, // VMINSSZrm_Intkz 48U, // VMINSSZrr 48U, // VMINSSZrr_Int 1148065U, // VMINSSZrr_Intk 1164338U, // VMINSSZrr_Intkz 340U, // VMINSSZrrb 318850U, // VMINSSZrrbk 319875U, // VMINSSZrrbkz 144U, // VMINSSrm 144U, // VMINSSrm_Int 48U, // VMINSSrr 48U, // VMINSSrr_Int 0U, // VMLAUNCH 0U, // VMLOAD32 0U, // VMLOAD64 0U, // VMMCALL 0U, // VMOV64toPQIZrr 0U, // VMOV64toPQIrm 0U, // VMOV64toPQIrr 0U, // VMOV64toSDZrr 0U, // VMOV64toSDrm 0U, // VMOV64toSDrr 0U, // VMOVAPDYmr 0U, // VMOVAPDYrm 0U, // VMOVAPDYrr 0U, // VMOVAPDYrr_REV 0U, // VMOVAPDZ128mr 81U, // VMOVAPDZ128mrk 0U, // VMOVAPDZ128rm 353U, // VMOVAPDZ128rmk 194U, // VMOVAPDZ128rmkz 0U, // VMOVAPDZ128rr 0U, // VMOVAPDZ128rr_alt 161U, // VMOVAPDZ128rrk 161U, // VMOVAPDZ128rrk_alt 50U, // VMOVAPDZ128rrkz 50U, // VMOVAPDZ128rrkz_alt 0U, // VMOVAPDZ256mr 81U, // VMOVAPDZ256mrk 0U, // VMOVAPDZ256rm 369U, // VMOVAPDZ256rmk 178U, // VMOVAPDZ256rmkz 0U, // VMOVAPDZ256rr 0U, // VMOVAPDZ256rr_alt 161U, // VMOVAPDZ256rrk 161U, // VMOVAPDZ256rrk_alt 50U, // VMOVAPDZ256rrkz 50U, // VMOVAPDZ256rrkz_alt 0U, // VMOVAPDZmr 81U, // VMOVAPDZmrk 0U, // VMOVAPDZrm 321U, // VMOVAPDZrmk 210U, // VMOVAPDZrmkz 0U, // VMOVAPDZrr 0U, // VMOVAPDZrr_alt 161U, // VMOVAPDZrrk 161U, // VMOVAPDZrrk_alt 50U, // VMOVAPDZrrkz 50U, // VMOVAPDZrrkz_alt 0U, // VMOVAPDmr 0U, // VMOVAPDrm 0U, // VMOVAPDrr 0U, // VMOVAPDrr_REV 0U, // VMOVAPSYmr 0U, // VMOVAPSYrm 0U, // VMOVAPSYrr 0U, // VMOVAPSYrr_REV 0U, // VMOVAPSZ128mr 81U, // VMOVAPSZ128mrk 0U, // VMOVAPSZ128rm 353U, // VMOVAPSZ128rmk 194U, // VMOVAPSZ128rmkz 0U, // VMOVAPSZ128rr 0U, // VMOVAPSZ128rr_alt 161U, // VMOVAPSZ128rrk 161U, // VMOVAPSZ128rrk_alt 50U, // VMOVAPSZ128rrkz 50U, // VMOVAPSZ128rrkz_alt 0U, // VMOVAPSZ256mr 81U, // VMOVAPSZ256mrk 0U, // VMOVAPSZ256rm 369U, // VMOVAPSZ256rmk 178U, // VMOVAPSZ256rmkz 0U, // VMOVAPSZ256rr 0U, // VMOVAPSZ256rr_alt 161U, // VMOVAPSZ256rrk 161U, // VMOVAPSZ256rrk_alt 50U, // VMOVAPSZ256rrkz 50U, // VMOVAPSZ256rrkz_alt 0U, // VMOVAPSZmr 81U, // VMOVAPSZmrk 0U, // VMOVAPSZrm 321U, // VMOVAPSZrmk 210U, // VMOVAPSZrmkz 0U, // VMOVAPSZrr 0U, // VMOVAPSZrr_alt 161U, // VMOVAPSZrrk 161U, // VMOVAPSZrrk_alt 50U, // VMOVAPSZrrkz 50U, // VMOVAPSZrrkz_alt 0U, // VMOVAPSmr 0U, // VMOVAPSrm 0U, // VMOVAPSrr 0U, // VMOVAPSrr_REV 0U, // VMOVDDUPYrm 0U, // VMOVDDUPYrr 0U, // VMOVDDUPZrm 0U, // VMOVDDUPZrr 0U, // VMOVDDUPrm 0U, // VMOVDDUPrr 0U, // VMOVDI2PDIZrm 0U, // VMOVDI2PDIZrr 0U, // VMOVDI2PDIrm 0U, // VMOVDI2PDIrr 0U, // VMOVDI2SSZrm 0U, // VMOVDI2SSZrr 0U, // VMOVDI2SSrm 0U, // VMOVDI2SSrr 0U, // VMOVDQA32Z128mr 81U, // VMOVDQA32Z128mrk 0U, // VMOVDQA32Z128rm 401U, // VMOVDQA32Z128rmk 226U, // VMOVDQA32Z128rmkz 0U, // VMOVDQA32Z128rr 0U, // VMOVDQA32Z128rr_alt 161U, // VMOVDQA32Z128rrk 161U, // VMOVDQA32Z128rrk_alt 50U, // VMOVDQA32Z128rrkz 50U, // VMOVDQA32Z128rrkz_alt 0U, // VMOVDQA32Z256mr 81U, // VMOVDQA32Z256mrk 0U, // VMOVDQA32Z256rm 417U, // VMOVDQA32Z256rmk 258U, // VMOVDQA32Z256rmkz 0U, // VMOVDQA32Z256rr 0U, // VMOVDQA32Z256rr_alt 161U, // VMOVDQA32Z256rrk 161U, // VMOVDQA32Z256rrk_alt 50U, // VMOVDQA32Z256rrkz 50U, // VMOVDQA32Z256rrkz_alt 0U, // VMOVDQA32Zmr 81U, // VMOVDQA32Zmrk 0U, // VMOVDQA32Zrm 433U, // VMOVDQA32Zrmk 242U, // VMOVDQA32Zrmkz 0U, // VMOVDQA32Zrr 0U, // VMOVDQA32Zrr_alt 161U, // VMOVDQA32Zrrk 161U, // VMOVDQA32Zrrk_alt 50U, // VMOVDQA32Zrrkz 50U, // VMOVDQA32Zrrkz_alt 0U, // VMOVDQA64Z128mr 81U, // VMOVDQA64Z128mrk 0U, // VMOVDQA64Z128rm 401U, // VMOVDQA64Z128rmk 226U, // VMOVDQA64Z128rmkz 0U, // VMOVDQA64Z128rr 0U, // VMOVDQA64Z128rr_alt 161U, // VMOVDQA64Z128rrk 161U, // VMOVDQA64Z128rrk_alt 50U, // VMOVDQA64Z128rrkz 50U, // VMOVDQA64Z128rrkz_alt 0U, // VMOVDQA64Z256mr 81U, // VMOVDQA64Z256mrk 0U, // VMOVDQA64Z256rm 417U, // VMOVDQA64Z256rmk 258U, // VMOVDQA64Z256rmkz 0U, // VMOVDQA64Z256rr 0U, // VMOVDQA64Z256rr_alt 161U, // VMOVDQA64Z256rrk 161U, // VMOVDQA64Z256rrk_alt 50U, // VMOVDQA64Z256rrkz 50U, // VMOVDQA64Z256rrkz_alt 0U, // VMOVDQA64Zmr 81U, // VMOVDQA64Zmrk 0U, // VMOVDQA64Zrm 433U, // VMOVDQA64Zrmk 242U, // VMOVDQA64Zrmkz 0U, // VMOVDQA64Zrr 0U, // VMOVDQA64Zrr_alt 161U, // VMOVDQA64Zrrk 161U, // VMOVDQA64Zrrk_alt 50U, // VMOVDQA64Zrrkz 50U, // VMOVDQA64Zrrkz_alt 0U, // VMOVDQAYmr 0U, // VMOVDQAYrm 0U, // VMOVDQAYrr 0U, // VMOVDQAYrr_REV 0U, // VMOVDQAmr 0U, // VMOVDQArm 0U, // VMOVDQArr 0U, // VMOVDQArr_REV 0U, // VMOVDQU16Z128mr 81U, // VMOVDQU16Z128mrk 0U, // VMOVDQU16Z128rm 401U, // VMOVDQU16Z128rmk 226U, // VMOVDQU16Z128rmkz 0U, // VMOVDQU16Z128rr 0U, // VMOVDQU16Z128rr_alt 161U, // VMOVDQU16Z128rrk 161U, // VMOVDQU16Z128rrk_alt 50U, // VMOVDQU16Z128rrkz 50U, // VMOVDQU16Z128rrkz_alt 0U, // VMOVDQU16Z256mr 81U, // VMOVDQU16Z256mrk 0U, // VMOVDQU16Z256rm 417U, // VMOVDQU16Z256rmk 258U, // VMOVDQU16Z256rmkz 0U, // VMOVDQU16Z256rr 0U, // VMOVDQU16Z256rr_alt 161U, // VMOVDQU16Z256rrk 161U, // VMOVDQU16Z256rrk_alt 50U, // VMOVDQU16Z256rrkz 50U, // VMOVDQU16Z256rrkz_alt 0U, // VMOVDQU16Zmr 81U, // VMOVDQU16Zmrk 0U, // VMOVDQU16Zrm 433U, // VMOVDQU16Zrmk 242U, // VMOVDQU16Zrmkz 0U, // VMOVDQU16Zrr 0U, // VMOVDQU16Zrr_alt 161U, // VMOVDQU16Zrrk 161U, // VMOVDQU16Zrrk_alt 50U, // VMOVDQU16Zrrkz 50U, // VMOVDQU16Zrrkz_alt 0U, // VMOVDQU32Z128mr 81U, // VMOVDQU32Z128mrk 0U, // VMOVDQU32Z128rm 401U, // VMOVDQU32Z128rmk 226U, // VMOVDQU32Z128rmkz 0U, // VMOVDQU32Z128rr 0U, // VMOVDQU32Z128rr_alt 161U, // VMOVDQU32Z128rrk 161U, // VMOVDQU32Z128rrk_alt 50U, // VMOVDQU32Z128rrkz 50U, // VMOVDQU32Z128rrkz_alt 0U, // VMOVDQU32Z256mr 81U, // VMOVDQU32Z256mrk 0U, // VMOVDQU32Z256rm 417U, // VMOVDQU32Z256rmk 258U, // VMOVDQU32Z256rmkz 0U, // VMOVDQU32Z256rr 0U, // VMOVDQU32Z256rr_alt 161U, // VMOVDQU32Z256rrk 161U, // VMOVDQU32Z256rrk_alt 50U, // VMOVDQU32Z256rrkz 50U, // VMOVDQU32Z256rrkz_alt 0U, // VMOVDQU32Zmr 81U, // VMOVDQU32Zmrk 0U, // VMOVDQU32Zrm 433U, // VMOVDQU32Zrmk 242U, // VMOVDQU32Zrmkz 0U, // VMOVDQU32Zrr 0U, // VMOVDQU32Zrr_alt 161U, // VMOVDQU32Zrrk 161U, // VMOVDQU32Zrrk_alt 50U, // VMOVDQU32Zrrkz 50U, // VMOVDQU32Zrrkz_alt 0U, // VMOVDQU64Z128mr 81U, // VMOVDQU64Z128mrk 0U, // VMOVDQU64Z128rm 401U, // VMOVDQU64Z128rmk 226U, // VMOVDQU64Z128rmkz 0U, // VMOVDQU64Z128rr 0U, // VMOVDQU64Z128rr_alt 161U, // VMOVDQU64Z128rrk 161U, // VMOVDQU64Z128rrk_alt 50U, // VMOVDQU64Z128rrkz 50U, // VMOVDQU64Z128rrkz_alt 0U, // VMOVDQU64Z256mr 81U, // VMOVDQU64Z256mrk 0U, // VMOVDQU64Z256rm 417U, // VMOVDQU64Z256rmk 258U, // VMOVDQU64Z256rmkz 0U, // VMOVDQU64Z256rr 0U, // VMOVDQU64Z256rr_alt 161U, // VMOVDQU64Z256rrk 161U, // VMOVDQU64Z256rrk_alt 50U, // VMOVDQU64Z256rrkz 50U, // VMOVDQU64Z256rrkz_alt 0U, // VMOVDQU64Zmr 81U, // VMOVDQU64Zmrk 0U, // VMOVDQU64Zrm 433U, // VMOVDQU64Zrmk 242U, // VMOVDQU64Zrmkz 0U, // VMOVDQU64Zrr 0U, // VMOVDQU64Zrr_alt 161U, // VMOVDQU64Zrrk 161U, // VMOVDQU64Zrrk_alt 50U, // VMOVDQU64Zrrkz 50U, // VMOVDQU64Zrrkz_alt 0U, // VMOVDQU8Z128mr 81U, // VMOVDQU8Z128mrk 0U, // VMOVDQU8Z128rm 401U, // VMOVDQU8Z128rmk 226U, // VMOVDQU8Z128rmkz 0U, // VMOVDQU8Z128rr 0U, // VMOVDQU8Z128rr_alt 161U, // VMOVDQU8Z128rrk 161U, // VMOVDQU8Z128rrk_alt 50U, // VMOVDQU8Z128rrkz 50U, // VMOVDQU8Z128rrkz_alt 0U, // VMOVDQU8Z256mr 81U, // VMOVDQU8Z256mrk 0U, // VMOVDQU8Z256rm 417U, // VMOVDQU8Z256rmk 258U, // VMOVDQU8Z256rmkz 0U, // VMOVDQU8Z256rr 0U, // VMOVDQU8Z256rr_alt 161U, // VMOVDQU8Z256rrk 161U, // VMOVDQU8Z256rrk_alt 50U, // VMOVDQU8Z256rrkz 50U, // VMOVDQU8Z256rrkz_alt 0U, // VMOVDQU8Zmr 81U, // VMOVDQU8Zmrk 0U, // VMOVDQU8Zrm 433U, // VMOVDQU8Zrmk 242U, // VMOVDQU8Zrmkz 0U, // VMOVDQU8Zrr 0U, // VMOVDQU8Zrr_alt 161U, // VMOVDQU8Zrrk 161U, // VMOVDQU8Zrrk_alt 50U, // VMOVDQU8Zrrkz 50U, // VMOVDQU8Zrrkz_alt 0U, // VMOVDQUYmr 0U, // VMOVDQUYrm 0U, // VMOVDQUYrr 0U, // VMOVDQUYrr_REV 0U, // VMOVDQUmr 0U, // VMOVDQUrm 0U, // VMOVDQUrr 0U, // VMOVDQUrr_REV 48U, // VMOVHLPSZrr 48U, // VMOVHLPSrr 0U, // VMOVHPDmr 128U, // VMOVHPDrm 0U, // VMOVHPSmr 128U, // VMOVHPSrm 48U, // VMOVLHPSZrr 48U, // VMOVLHPSrr 0U, // VMOVLPDmr 128U, // VMOVLPDrm 0U, // VMOVLPSmr 128U, // VMOVLPSrm 0U, // VMOVMSKPDYrr 0U, // VMOVMSKPDrr 0U, // VMOVMSKPSYrr 0U, // VMOVMSKPSrr 0U, // VMOVNTDQAYrm 0U, // VMOVNTDQAZ128rm 0U, // VMOVNTDQAZ256rm 0U, // VMOVNTDQAZrm 0U, // VMOVNTDQArm 0U, // VMOVNTDQYmr 0U, // VMOVNTDQZ128mr 0U, // VMOVNTDQZ256mr 0U, // VMOVNTDQZmr 0U, // VMOVNTDQmr 0U, // VMOVNTPDYmr 0U, // VMOVNTPDZ128mr 0U, // VMOVNTPDZ256mr 0U, // VMOVNTPDZmr 0U, // VMOVNTPDmr 0U, // VMOVNTPSYmr 0U, // VMOVNTPSZ128mr 0U, // VMOVNTPSZ256mr 0U, // VMOVNTPSZmr 0U, // VMOVNTPSmr 0U, // VMOVPDI2DIZmr 0U, // VMOVPDI2DIZrr 0U, // VMOVPDI2DImr 0U, // VMOVPDI2DIrr 0U, // VMOVPQI2QImr 0U, // VMOVPQI2QIrr 0U, // VMOVPQIto64Zmr 0U, // VMOVPQIto64Zrr 0U, // VMOVPQIto64rm 0U, // VMOVPQIto64rr 0U, // VMOVQI2PQIZrm 0U, // VMOVQI2PQIrm 0U, // VMOVSDZmr 81U, // VMOVSDZmrk 0U, // VMOVSDZrm 48U, // VMOVSDZrr 48U, // VMOVSDZrr_REV 1148065U, // VMOVSDZrrk 0U, // VMOVSDmr 0U, // VMOVSDrm 48U, // VMOVSDrr 48U, // VMOVSDrr_REV 0U, // VMOVSDto64Zmr 0U, // VMOVSDto64Zrr 0U, // VMOVSDto64mr 0U, // VMOVSDto64rr 0U, // VMOVSHDUPYrm 0U, // VMOVSHDUPYrr 0U, // VMOVSHDUPZrm 0U, // VMOVSHDUPZrr 0U, // VMOVSHDUPrm 0U, // VMOVSHDUPrr 0U, // VMOVSLDUPYrm 0U, // VMOVSLDUPYrr 0U, // VMOVSLDUPZrm 0U, // VMOVSLDUPZrr 0U, // VMOVSLDUPrm 0U, // VMOVSLDUPrr 0U, // VMOVSS2DIZmr 0U, // VMOVSS2DIZrr 0U, // VMOVSS2DImr 0U, // VMOVSS2DIrr 0U, // VMOVSSZmr 81U, // VMOVSSZmrk 0U, // VMOVSSZrm 48U, // VMOVSSZrr 48U, // VMOVSSZrr_REV 1148065U, // VMOVSSZrrk 0U, // VMOVSSmr 0U, // VMOVSSrm 48U, // VMOVSSrr 48U, // VMOVSSrr_REV 0U, // VMOVUPDYmr 0U, // VMOVUPDYrm 0U, // VMOVUPDYrr 0U, // VMOVUPDYrr_REV 0U, // VMOVUPDZ128mr 81U, // VMOVUPDZ128mrk 0U, // VMOVUPDZ128rm 353U, // VMOVUPDZ128rmk 194U, // VMOVUPDZ128rmkz 0U, // VMOVUPDZ128rr 0U, // VMOVUPDZ128rr_alt 161U, // VMOVUPDZ128rrk 161U, // VMOVUPDZ128rrk_alt 50U, // VMOVUPDZ128rrkz 50U, // VMOVUPDZ128rrkz_alt 0U, // VMOVUPDZ256mr 81U, // VMOVUPDZ256mrk 0U, // VMOVUPDZ256rm 369U, // VMOVUPDZ256rmk 178U, // VMOVUPDZ256rmkz 0U, // VMOVUPDZ256rr 0U, // VMOVUPDZ256rr_alt 161U, // VMOVUPDZ256rrk 161U, // VMOVUPDZ256rrk_alt 50U, // VMOVUPDZ256rrkz 50U, // VMOVUPDZ256rrkz_alt 0U, // VMOVUPDZmr 81U, // VMOVUPDZmrk 0U, // VMOVUPDZrm 321U, // VMOVUPDZrmk 210U, // VMOVUPDZrmkz 0U, // VMOVUPDZrr 0U, // VMOVUPDZrr_alt 161U, // VMOVUPDZrrk 161U, // VMOVUPDZrrk_alt 50U, // VMOVUPDZrrkz 50U, // VMOVUPDZrrkz_alt 0U, // VMOVUPDmr 0U, // VMOVUPDrm 0U, // VMOVUPDrr 0U, // VMOVUPDrr_REV 0U, // VMOVUPSYmr 0U, // VMOVUPSYrm 0U, // VMOVUPSYrr 0U, // VMOVUPSYrr_REV 0U, // VMOVUPSZ128mr 81U, // VMOVUPSZ128mrk 0U, // VMOVUPSZ128rm 353U, // VMOVUPSZ128rmk 194U, // VMOVUPSZ128rmkz 0U, // VMOVUPSZ128rr 0U, // VMOVUPSZ128rr_alt 161U, // VMOVUPSZ128rrk 161U, // VMOVUPSZ128rrk_alt 50U, // VMOVUPSZ128rrkz 50U, // VMOVUPSZ128rrkz_alt 0U, // VMOVUPSZ256mr 81U, // VMOVUPSZ256mrk 0U, // VMOVUPSZ256rm 369U, // VMOVUPSZ256rmk 178U, // VMOVUPSZ256rmkz 0U, // VMOVUPSZ256rr 0U, // VMOVUPSZ256rr_alt 161U, // VMOVUPSZ256rrk 161U, // VMOVUPSZ256rrk_alt 50U, // VMOVUPSZ256rrkz 50U, // VMOVUPSZ256rrkz_alt 0U, // VMOVUPSZmr 81U, // VMOVUPSZmrk 0U, // VMOVUPSZrm 321U, // VMOVUPSZrmk 210U, // VMOVUPSZrmkz 0U, // VMOVUPSZrr 0U, // VMOVUPSZrr_alt 161U, // VMOVUPSZrrk 161U, // VMOVUPSZrrk_alt 50U, // VMOVUPSZrrkz 50U, // VMOVUPSZrrkz_alt 0U, // VMOVUPSmr 0U, // VMOVUPSrm 0U, // VMOVUPSrr 0U, // VMOVUPSrr_REV 0U, // VMOVZPQILo2PQIZrm 0U, // VMOVZPQILo2PQIZrr 0U, // VMOVZPQILo2PQIrm 0U, // VMOVZPQILo2PQIrr 0U, // VMOVZQI2PQIrm 0U, // VMOVZQI2PQIrr 247040U, // VMPSADBWYrmi 1311792U, // VMPSADBWYrri 247008U, // VMPSADBWrmi 1311792U, // VMPSADBWrri 0U, // VMPTRLDm 0U, // VMPTRSTm 0U, // VMREAD32rm 0U, // VMREAD32rr 0U, // VMREAD64rm 0U, // VMREAD64rr 0U, // VMRESUME 0U, // VMRUN32 0U, // VMRUN64 0U, // VMSAVE32 0U, // VMSAVE64 176U, // VMULPDYrm 48U, // VMULPDYrr 192U, // VMULPDZ128rm 2176U, // VMULPDZ128rmb 558241U, // VMULPDZ128rmbk 574514U, // VMULPDZ128rmbkz 1115297U, // VMULPDZ128rmk 1131570U, // VMULPDZ128rmkz 48U, // VMULPDZ128rr 1148065U, // VMULPDZ128rrk 1164338U, // VMULPDZ128rrkz 176U, // VMULPDZ256rm 3200U, // VMULPDZ256rmb 1606817U, // VMULPDZ256rmbk 1623090U, // VMULPDZ256rmbkz 132257U, // VMULPDZ256rmk 1197106U, // VMULPDZ256rmkz 48U, // VMULPDZ256rr 1148065U, // VMULPDZ256rrk 1164338U, // VMULPDZ256rrkz 164912U, // VMULPDZrb 8488097U, // VMULPDZrbk 16892978U, // VMULPDZrbkz 208U, // VMULPDZrm 4224U, // VMULPDZrmb 2131105U, // VMULPDZrmbk 2147378U, // VMULPDZrmbkz 181409U, // VMULPDZrmk 197682U, // VMULPDZrmkz 48U, // VMULPDZrr 1148065U, // VMULPDZrrk 1164338U, // VMULPDZrrkz 192U, // VMULPDrm 48U, // VMULPDrr 176U, // VMULPSYrm 48U, // VMULPSYrr 192U, // VMULPSZ128rm 3216U, // VMULPSZ128rmb 1787041U, // VMULPSZ128rmbk 1803314U, // VMULPSZ128rmbkz 1115297U, // VMULPSZ128rmk 1131570U, // VMULPSZ128rmkz 48U, // VMULPSZ128rr 1148065U, // VMULPSZ128rrk 1164338U, // VMULPSZ128rrkz 176U, // VMULPSZ256rm 4240U, // VMULPSZ256rmb 2311329U, // VMULPSZ256rmbk 2327602U, // VMULPSZ256rmbkz 132257U, // VMULPSZ256rmk 1197106U, // VMULPSZ256rmkz 48U, // VMULPSZ256rr 1148065U, // VMULPSZ256rrk 1164338U, // VMULPSZ256rrkz 164912U, // VMULPSZrb 8488097U, // VMULPSZrbk 16892978U, // VMULPSZrbkz 208U, // VMULPSZrm 5264U, // VMULPSZrmb 2835617U, // VMULPSZrmbk 2851890U, // VMULPSZrmbkz 181409U, // VMULPSZrmk 197682U, // VMULPSZrmkz 48U, // VMULPSZrr 1148065U, // VMULPSZrrk 1164338U, // VMULPSZrrkz 192U, // VMULPSrm 48U, // VMULPSrr 128U, // VMULSDZrm 192U, // VMULSDZrm_Int 1115297U, // VMULSDZrm_Intk 1131570U, // VMULSDZrm_Intkz 48U, // VMULSDZrr 48U, // VMULSDZrr_Int 1148065U, // VMULSDZrr_Intk 1164338U, // VMULSDZrr_Intkz 164912U, // VMULSDZrrb 8488097U, // VMULSDZrrbk 16892978U, // VMULSDZrrbkz 128U, // VMULSDrm 128U, // VMULSDrm_Int 48U, // VMULSDrr 48U, // VMULSDrr_Int 144U, // VMULSSZrm 192U, // VMULSSZrm_Int 1115297U, // VMULSSZrm_Intk 1131570U, // VMULSSZrm_Intkz 48U, // VMULSSZrr 48U, // VMULSSZrr_Int 1148065U, // VMULSSZrr_Intk 1164338U, // VMULSSZrr_Intkz 164912U, // VMULSSZrrb 8488097U, // VMULSSZrrbk 16892978U, // VMULSSZrrbkz 144U, // VMULSSrm 144U, // VMULSSrm_Int 48U, // VMULSSrr 48U, // VMULSSrr_Int 0U, // VMWRITE32rm 0U, // VMWRITE32rr 0U, // VMWRITE64rm 0U, // VMWRITE64rr 0U, // VMXOFF 0U, // VMXON 176U, // VORPDYrm 48U, // VORPDYrr 192U, // VORPDrm 48U, // VORPDrr 176U, // VORPSYrm 48U, // VORPSYrr 192U, // VORPSrm 48U, // VORPSrr 0U, // VPABSBrm128 0U, // VPABSBrm256 0U, // VPABSBrr128 0U, // VPABSBrr256 0U, // VPABSDZrm 5U, // VPABSDZrmb 5153U, // VPABSDZrmbk 5154U, // VPABSDZrmbkz 241U, // VPABSDZrmk 242U, // VPABSDZrmkz 0U, // VPABSDZrr 49U, // VPABSDZrrk 50U, // VPABSDZrrkz 0U, // VPABSDrm128 0U, // VPABSDrm256 0U, // VPABSDrr128 0U, // VPABSDrr256 0U, // VPABSQZrm 5U, // VPABSQZrmb 4161U, // VPABSQZrmbk 4162U, // VPABSQZrmbkz 241U, // VPABSQZrmk 242U, // VPABSQZrmkz 0U, // VPABSQZrr 49U, // VPABSQZrrk 50U, // VPABSQZrrkz 0U, // VPABSWrm128 0U, // VPABSWrm256 0U, // VPABSWrr128 0U, // VPABSWrr256 256U, // VPACKSSDWYrm 48U, // VPACKSSDWYrr 224U, // VPACKSSDWrm 48U, // VPACKSSDWrr 256U, // VPACKSSWBYrm 48U, // VPACKSSWBYrr 224U, // VPACKSSWBrm 48U, // VPACKSSWBrr 256U, // VPACKUSDWYrm 48U, // VPACKUSDWYrr 224U, // VPACKUSDWrm 48U, // VPACKUSDWrr 256U, // VPACKUSWBYrm 48U, // VPACKUSWBYrr 224U, // VPACKUSWBrm 48U, // VPACKUSWBrr 256U, // VPADDBYrm 48U, // VPADDBYrr 224U, // VPADDBZ128rm 328865U, // VPADDBZ128rmk 1393714U, // VPADDBZ128rmkz 48U, // VPADDBZ128rr 1148065U, // VPADDBZ128rrk 1164338U, // VPADDBZ128rrkz 256U, // VPADDBZ256rm 361633U, // VPADDBZ256rmk 1426482U, // VPADDBZ256rmkz 48U, // VPADDBZ256rr 1148065U, // VPADDBZ256rrk 1164338U, // VPADDBZ256rrkz 240U, // VPADDBZrm 394401U, // VPADDBZrmk 1459250U, // VPADDBZrmkz 48U, // VPADDBZrr 1148065U, // VPADDBZrrk 1164338U, // VPADDBZrrkz 224U, // VPADDBrm 48U, // VPADDBrr 256U, // VPADDDYrm 48U, // VPADDDYrr 224U, // VPADDDZ128rm 3104U, // VPADDDZ128rmb 2000033U, // VPADDDZ128rmbk 2016306U, // VPADDDZ128rmbkz 328865U, // VPADDDZ128rmk 1393714U, // VPADDDZ128rmkz 48U, // VPADDDZ128rr 1148065U, // VPADDDZ128rrk 1164338U, // VPADDDZ128rrkz 256U, // VPADDDZ256rm 4128U, // VPADDDZ256rmb 2524321U, // VPADDDZ256rmbk 2540594U, // VPADDDZ256rmbkz 361633U, // VPADDDZ256rmk 1426482U, // VPADDDZ256rmkz 48U, // VPADDDZ256rr 1148065U, // VPADDDZ256rrk 1164338U, // VPADDDZ256rrkz 240U, // VPADDDZrm 5152U, // VPADDDZrmb 3048609U, // VPADDDZrmbk 3064882U, // VPADDDZrmbkz 394401U, // VPADDDZrmk 1459250U, // VPADDDZrmkz 48U, // VPADDDZrr 1148065U, // VPADDDZrrk 1164338U, // VPADDDZrrkz 224U, // VPADDDrm 48U, // VPADDDrr 256U, // VPADDQYrm 48U, // VPADDQYrr 224U, // VPADDQZ128rm 2112U, // VPADDQZ128rmb 984225U, // VPADDQZ128rmbk 1000498U, // VPADDQZ128rmbkz 328865U, // VPADDQZ128rmk 1393714U, // VPADDQZ128rmkz 48U, // VPADDQZ128rr 1148065U, // VPADDQZ128rrk 1164338U, // VPADDQZ128rrkz 256U, // VPADDQZ256rm 3136U, // VPADDQZ256rmb 2032801U, // VPADDQZ256rmbk 2049074U, // VPADDQZ256rmbkz 361633U, // VPADDQZ256rmk 1426482U, // VPADDQZ256rmkz 48U, // VPADDQZ256rr 1148065U, // VPADDQZ256rrk 1164338U, // VPADDQZ256rrkz 240U, // VPADDQZrm 4160U, // VPADDQZrmb 2557089U, // VPADDQZrmbk 2573362U, // VPADDQZrmbkz 394401U, // VPADDQZrmk 1459250U, // VPADDQZrmkz 48U, // VPADDQZrr 1148065U, // VPADDQZrrk 1164338U, // VPADDQZrrkz 224U, // VPADDQrm 48U, // VPADDQrr 256U, // VPADDSBYrm 48U, // VPADDSBYrr 224U, // VPADDSBrm 48U, // VPADDSBrr 256U, // VPADDSWYrm 48U, // VPADDSWYrr 224U, // VPADDSWrm 48U, // VPADDSWrr 256U, // VPADDUSBYrm 48U, // VPADDUSBYrr 224U, // VPADDUSBrm 48U, // VPADDUSBrr 256U, // VPADDUSWYrm 48U, // VPADDUSWYrr 224U, // VPADDUSWrm 48U, // VPADDUSWrr 256U, // VPADDWYrm 48U, // VPADDWYrr 224U, // VPADDWZ128rm 328865U, // VPADDWZ128rmk 1393714U, // VPADDWZ128rmkz 48U, // VPADDWZ128rr 1148065U, // VPADDWZ128rrk 1164338U, // VPADDWZ128rrkz 256U, // VPADDWZ256rm 361633U, // VPADDWZ256rmk 1426482U, // VPADDWZ256rmkz 48U, // VPADDWZ256rr 1148065U, // VPADDWZ256rrk 1164338U, // VPADDWZ256rrkz 240U, // VPADDWZrm 394401U, // VPADDWZrmk 1459250U, // VPADDWZrmkz 48U, // VPADDWZrr 1148065U, // VPADDWZrrk 1164338U, // VPADDWZrrkz 224U, // VPADDWrm 48U, // VPADDWrr 247008U, // VPALIGNR128rm 1311792U, // VPALIGNR128rr 247040U, // VPALIGNR256rm 1311792U, // VPALIGNR256rr 224U, // VPANDDZ128rm 3104U, // VPANDDZ128rmb 2000033U, // VPANDDZ128rmbk 2016306U, // VPANDDZ128rmbkz 328865U, // VPANDDZ128rmk 1393714U, // VPANDDZ128rmkz 48U, // VPANDDZ128rr 1148065U, // VPANDDZ128rrk 1164338U, // VPANDDZ128rrkz 256U, // VPANDDZ256rm 4128U, // VPANDDZ256rmb 2524321U, // VPANDDZ256rmbk 2540594U, // VPANDDZ256rmbkz 361633U, // VPANDDZ256rmk 1426482U, // VPANDDZ256rmkz 48U, // VPANDDZ256rr 1148065U, // VPANDDZ256rrk 1164338U, // VPANDDZ256rrkz 240U, // VPANDDZrm 5152U, // VPANDDZrmb 3048609U, // VPANDDZrmbk 3064882U, // VPANDDZrmbkz 394401U, // VPANDDZrmk 1459250U, // VPANDDZrmkz 48U, // VPANDDZrr 1148065U, // VPANDDZrrk 1164338U, // VPANDDZrrkz 224U, // VPANDNDZ128rm 3104U, // VPANDNDZ128rmb 2000033U, // VPANDNDZ128rmbk 2016306U, // VPANDNDZ128rmbkz 328865U, // VPANDNDZ128rmk 1393714U, // VPANDNDZ128rmkz 48U, // VPANDNDZ128rr 1148065U, // VPANDNDZ128rrk 1164338U, // VPANDNDZ128rrkz 256U, // VPANDNDZ256rm 4128U, // VPANDNDZ256rmb 2524321U, // VPANDNDZ256rmbk 2540594U, // VPANDNDZ256rmbkz 361633U, // VPANDNDZ256rmk 1426482U, // VPANDNDZ256rmkz 48U, // VPANDNDZ256rr 1148065U, // VPANDNDZ256rrk 1164338U, // VPANDNDZ256rrkz 240U, // VPANDNDZrm 5152U, // VPANDNDZrmb 3048609U, // VPANDNDZrmbk 3064882U, // VPANDNDZrmbkz 394401U, // VPANDNDZrmk 1459250U, // VPANDNDZrmkz 48U, // VPANDNDZrr 1148065U, // VPANDNDZrrk 1164338U, // VPANDNDZrrkz 224U, // VPANDNQZ128rm 2112U, // VPANDNQZ128rmb 984225U, // VPANDNQZ128rmbk 1000498U, // VPANDNQZ128rmbkz 328865U, // VPANDNQZ128rmk 1393714U, // VPANDNQZ128rmkz 48U, // VPANDNQZ128rr 1148065U, // VPANDNQZ128rrk 1164338U, // VPANDNQZ128rrkz 256U, // VPANDNQZ256rm 3136U, // VPANDNQZ256rmb 2032801U, // VPANDNQZ256rmbk 2049074U, // VPANDNQZ256rmbkz 361633U, // VPANDNQZ256rmk 1426482U, // VPANDNQZ256rmkz 48U, // VPANDNQZ256rr 1148065U, // VPANDNQZ256rrk 1164338U, // VPANDNQZ256rrkz 240U, // VPANDNQZrm 4160U, // VPANDNQZrmb 2557089U, // VPANDNQZrmbk 2573362U, // VPANDNQZrmbkz 394401U, // VPANDNQZrmk 1459250U, // VPANDNQZrmkz 48U, // VPANDNQZrr 1148065U, // VPANDNQZrrk 1164338U, // VPANDNQZrrkz 256U, // VPANDNYrm 48U, // VPANDNYrr 224U, // VPANDNrm 48U, // VPANDNrr 224U, // VPANDQZ128rm 2112U, // VPANDQZ128rmb 984225U, // VPANDQZ128rmbk 1000498U, // VPANDQZ128rmbkz 328865U, // VPANDQZ128rmk 1393714U, // VPANDQZ128rmkz 48U, // VPANDQZ128rr 1148065U, // VPANDQZ128rrk 1164338U, // VPANDQZ128rrkz 256U, // VPANDQZ256rm 3136U, // VPANDQZ256rmb 2032801U, // VPANDQZ256rmbk 2049074U, // VPANDQZ256rmbkz 361633U, // VPANDQZ256rmk 1426482U, // VPANDQZ256rmkz 48U, // VPANDQZ256rr 1148065U, // VPANDQZ256rrk 1164338U, // VPANDQZ256rrkz 240U, // VPANDQZrm 4160U, // VPANDQZrmb 2557089U, // VPANDQZrmbk 2573362U, // VPANDQZrmbkz 394401U, // VPANDQZrmk 1459250U, // VPANDQZrmkz 48U, // VPANDQZrr 1148065U, // VPANDQZrrk 1164338U, // VPANDQZrrkz 256U, // VPANDYrm 48U, // VPANDYrr 224U, // VPANDrm 48U, // VPANDrr 256U, // VPAVGBYrm 48U, // VPAVGBYrr 224U, // VPAVGBrm 48U, // VPAVGBrr 256U, // VPAVGWYrm 48U, // VPAVGWYrr 224U, // VPAVGWrm 48U, // VPAVGWrr 247040U, // VPBLENDDYrmi 1311792U, // VPBLENDDYrri 247008U, // VPBLENDDrmi 1311792U, // VPBLENDDrri 0U, // VPBLENDMBZ128rm 1393713U, // VPBLENDMBZ128rmk 1393714U, // VPBLENDMBZ128rmkz 48U, // VPBLENDMBZ128rr 1164337U, // VPBLENDMBZ128rrk 1164338U, // VPBLENDMBZ128rrkz 0U, // VPBLENDMBZ256rm 1426481U, // VPBLENDMBZ256rmk 1426482U, // VPBLENDMBZ256rmkz 48U, // VPBLENDMBZ256rr 1164337U, // VPBLENDMBZ256rrk 1164338U, // VPBLENDMBZ256rrkz 0U, // VPBLENDMBZrm 1459249U, // VPBLENDMBZrmk 1459250U, // VPBLENDMBZrmkz 48U, // VPBLENDMBZrr 1164337U, // VPBLENDMBZrrk 1164338U, // VPBLENDMBZrrkz 0U, // VPBLENDMDZ128rm 3104U, // VPBLENDMDZ128rmb 2016305U, // VPBLENDMDZ128rmbk 1393713U, // VPBLENDMDZ128rmk 1393714U, // VPBLENDMDZ128rmkz 48U, // VPBLENDMDZ128rr 1164337U, // VPBLENDMDZ128rrk 1164338U, // VPBLENDMDZ128rrkz 0U, // VPBLENDMDZ256rm 4128U, // VPBLENDMDZ256rmb 2540593U, // VPBLENDMDZ256rmbk 1426481U, // VPBLENDMDZ256rmk 1426482U, // VPBLENDMDZ256rmkz 48U, // VPBLENDMDZ256rr 1164337U, // VPBLENDMDZ256rrk 1164338U, // VPBLENDMDZ256rrkz 0U, // VPBLENDMDZrm 5152U, // VPBLENDMDZrmb 3064881U, // VPBLENDMDZrmbk 1459249U, // VPBLENDMDZrmk 1459250U, // VPBLENDMDZrmkz 48U, // VPBLENDMDZrr 1164337U, // VPBLENDMDZrrk 1164338U, // VPBLENDMDZrrkz 0U, // VPBLENDMQZ128rm 2112U, // VPBLENDMQZ128rmb 1000497U, // VPBLENDMQZ128rmbk 1393713U, // VPBLENDMQZ128rmk 1393714U, // VPBLENDMQZ128rmkz 48U, // VPBLENDMQZ128rr 1164337U, // VPBLENDMQZ128rrk 1164338U, // VPBLENDMQZ128rrkz 0U, // VPBLENDMQZ256rm 3136U, // VPBLENDMQZ256rmb 2049073U, // VPBLENDMQZ256rmbk 1426481U, // VPBLENDMQZ256rmk 1426482U, // VPBLENDMQZ256rmkz 48U, // VPBLENDMQZ256rr 1164337U, // VPBLENDMQZ256rrk 1164338U, // VPBLENDMQZ256rrkz 0U, // VPBLENDMQZrm 4160U, // VPBLENDMQZrmb 2573361U, // VPBLENDMQZrmbk 1459249U, // VPBLENDMQZrmk 1459250U, // VPBLENDMQZrmkz 48U, // VPBLENDMQZrr 1164337U, // VPBLENDMQZrrk 1164338U, // VPBLENDMQZrrkz 0U, // VPBLENDMWZ128rm 1393713U, // VPBLENDMWZ128rmk 1393714U, // VPBLENDMWZ128rmkz 48U, // VPBLENDMWZ128rr 1164337U, // VPBLENDMWZ128rrk 1164338U, // VPBLENDMWZ128rrkz 0U, // VPBLENDMWZ256rm 1426481U, // VPBLENDMWZ256rmk 1426482U, // VPBLENDMWZ256rmkz 48U, // VPBLENDMWZ256rr 1164337U, // VPBLENDMWZ256rrk 1164338U, // VPBLENDMWZ256rrkz 0U, // VPBLENDMWZrm 1459249U, // VPBLENDMWZrmk 1459250U, // VPBLENDMWZrmkz 48U, // VPBLENDMWZrr 1164337U, // VPBLENDMWZrrk 1164338U, // VPBLENDMWZrrkz 1066240U, // VPBLENDVBYrm 1164336U, // VPBLENDVBYrr 1066208U, // VPBLENDVBrm 1164336U, // VPBLENDVBrr 247040U, // VPBLENDWYrmi 1311792U, // VPBLENDWYrri 247008U, // VPBLENDWrmi 1311792U, // VPBLENDWrri 0U, // VPBROADCASTBYrm 0U, // VPBROADCASTBYrr 0U, // VPBROADCASTBrZ128r 161U, // VPBROADCASTBrZ128rk 50U, // VPBROADCASTBrZ128rkz 0U, // VPBROADCASTBrZ256r 161U, // VPBROADCASTBrZ256rk 50U, // VPBROADCASTBrZ256rkz 0U, // VPBROADCASTBrZr 161U, // VPBROADCASTBrZrk 50U, // VPBROADCASTBrZrkz 0U, // VPBROADCASTBrm 0U, // VPBROADCASTBrr 0U, // VPBROADCASTDYrm 0U, // VPBROADCASTDYrr 34U, // VPBROADCASTDZkrm 50U, // VPBROADCASTDZkrr 0U, // VPBROADCASTDZrm 0U, // VPBROADCASTDZrr 0U, // VPBROADCASTDrZ128r 161U, // VPBROADCASTDrZ128rk 50U, // VPBROADCASTDrZ128rkz 0U, // VPBROADCASTDrZ256r 161U, // VPBROADCASTDrZ256rk 50U, // VPBROADCASTDrZ256rkz 0U, // VPBROADCASTDrZr 161U, // VPBROADCASTDrZrk 50U, // VPBROADCASTDrZrkz 0U, // VPBROADCASTDrm 0U, // VPBROADCASTDrr 0U, // VPBROADCASTMB2QZ128rr 0U, // VPBROADCASTMB2QZ256rr 0U, // VPBROADCASTMB2QZrr 0U, // VPBROADCASTMW2DZ128rr 0U, // VPBROADCASTMW2DZ256rr 0U, // VPBROADCASTMW2DZrr 0U, // VPBROADCASTQYrm 0U, // VPBROADCASTQYrr 66U, // VPBROADCASTQZkrm 50U, // VPBROADCASTQZkrr 0U, // VPBROADCASTQZrm 0U, // VPBROADCASTQZrr 0U, // VPBROADCASTQrZ128r 161U, // VPBROADCASTQrZ128rk 50U, // VPBROADCASTQrZ128rkz 0U, // VPBROADCASTQrZ256r 161U, // VPBROADCASTQrZ256rk 50U, // VPBROADCASTQrZ256rkz 0U, // VPBROADCASTQrZr 161U, // VPBROADCASTQrZrk 50U, // VPBROADCASTQrZrkz 0U, // VPBROADCASTQrm 0U, // VPBROADCASTQrr 0U, // VPBROADCASTWYrm 0U, // VPBROADCASTWYrr 0U, // VPBROADCASTWrZ128r 161U, // VPBROADCASTWrZ128rk 50U, // VPBROADCASTWrZ128rkz 0U, // VPBROADCASTWrZ256r 161U, // VPBROADCASTWrZ256rk 50U, // VPBROADCASTWrZ256rkz 0U, // VPBROADCASTWrZr 161U, // VPBROADCASTWrZrk 50U, // VPBROADCASTWrZrkz 0U, // VPBROADCASTWrm 0U, // VPBROADCASTWrr 247008U, // VPCLMULQDQrm 1311792U, // VPCLMULQDQrr 1066208U, // VPCMOVmr 1066160U, // VPCMOVmrY 1393712U, // VPCMOVrm 1426480U, // VPCMOVrmY 1164336U, // VPCMOVrr 1164336U, // VPCMOVrrY 230U, // VPCMPBZ128rmi 247008U, // VPCMPBZ128rmi_alt 6U, // VPCMPBZ128rmik 42288177U, // VPCMPBZ128rmik_alt 54U, // VPCMPBZ128rri 1311792U, // VPCMPBZ128rri_alt 7U, // VPCMPBZ128rrik 33670193U, // VPCMPBZ128rrik_alt 262U, // VPCMPBZ256rmi 247040U, // VPCMPBZ256rmi_alt 7U, // VPCMPBZ256rmik 42320945U, // VPCMPBZ256rmik_alt 54U, // VPCMPBZ256rri 1311792U, // VPCMPBZ256rri_alt 7U, // VPCMPBZ256rrik 33670193U, // VPCMPBZ256rrik_alt 246U, // VPCMPBZrmi 247024U, // VPCMPBZrmi_alt 8U, // VPCMPBZrmik 42353713U, // VPCMPBZrmik_alt 54U, // VPCMPBZrri 1311792U, // VPCMPBZrri_alt 7U, // VPCMPBZrrik 33670193U, // VPCMPBZrrik_alt 230U, // VPCMPDZ128rmi 247008U, // VPCMPDZ128rmi_alt 3110U, // VPCMPDZ128rmib 9248U, // VPCMPDZ128rmib_alt 456U, // VPCMPDZ128rmibk 4113457U, // VPCMPDZ128rmibk_alt 6U, // VPCMPDZ128rmik 42288177U, // VPCMPDZ128rmik_alt 54U, // VPCMPDZ128rri 1311792U, // VPCMPDZ128rri_alt 7U, // VPCMPDZ128rrik 33670193U, // VPCMPDZ128rrik_alt 262U, // VPCMPDZ256rmi 247040U, // VPCMPDZ256rmi_alt 4134U, // VPCMPDZ256rmib 10272U, // VPCMPDZ256rmib_alt 472U, // VPCMPDZ256rmibk 4637745U, // VPCMPDZ256rmibk_alt 7U, // VPCMPDZ256rmik 42320945U, // VPCMPDZ256rmik_alt 54U, // VPCMPDZ256rri 1311792U, // VPCMPDZ256rri_alt 7U, // VPCMPDZ256rrik 33670193U, // VPCMPDZ256rrik_alt 246U, // VPCMPDZrmi 247024U, // VPCMPDZrmi_alt 5158U, // VPCMPDZrmib 11296U, // VPCMPDZrmib_alt 488U, // VPCMPDZrmibk 5162033U, // VPCMPDZrmibk_alt 8U, // VPCMPDZrmik 42353713U, // VPCMPDZrmik_alt 54U, // VPCMPDZrri 1311792U, // VPCMPDZrri_alt 7U, // VPCMPDZrrik 33670193U, // VPCMPDZrrik_alt 256U, // VPCMPEQBYrm 48U, // VPCMPEQBYrr 224U, // VPCMPEQBZ128rm 1393713U, // VPCMPEQBZ128rmk 48U, // VPCMPEQBZ128rr 1164337U, // VPCMPEQBZ128rrk 256U, // VPCMPEQBZ256rm 1426481U, // VPCMPEQBZ256rmk 48U, // VPCMPEQBZ256rr 1164337U, // VPCMPEQBZ256rrk 240U, // VPCMPEQBZrm 1459249U, // VPCMPEQBZrmk 48U, // VPCMPEQBZrr 1164337U, // VPCMPEQBZrrk 224U, // VPCMPEQBrm 48U, // VPCMPEQBrr 256U, // VPCMPEQDYrm 48U, // VPCMPEQDYrr 224U, // VPCMPEQDZ128rm 3104U, // VPCMPEQDZ128rmb 2016305U, // VPCMPEQDZ128rmbk 1393713U, // VPCMPEQDZ128rmk 48U, // VPCMPEQDZ128rr 1164337U, // VPCMPEQDZ128rrk 256U, // VPCMPEQDZ256rm 4128U, // VPCMPEQDZ256rmb 2540593U, // VPCMPEQDZ256rmbk 1426481U, // VPCMPEQDZ256rmk 48U, // VPCMPEQDZ256rr 1164337U, // VPCMPEQDZ256rrk 240U, // VPCMPEQDZrm 5152U, // VPCMPEQDZrmb 3064881U, // VPCMPEQDZrmbk 1459249U, // VPCMPEQDZrmk 48U, // VPCMPEQDZrr 1164337U, // VPCMPEQDZrrk 224U, // VPCMPEQDrm 48U, // VPCMPEQDrr 256U, // VPCMPEQQYrm 48U, // VPCMPEQQYrr 224U, // VPCMPEQQZ128rm 2112U, // VPCMPEQQZ128rmb 1000497U, // VPCMPEQQZ128rmbk 1393713U, // VPCMPEQQZ128rmk 48U, // VPCMPEQQZ128rr 1164337U, // VPCMPEQQZ128rrk 256U, // VPCMPEQQZ256rm 3136U, // VPCMPEQQZ256rmb 2049073U, // VPCMPEQQZ256rmbk 1426481U, // VPCMPEQQZ256rmk 48U, // VPCMPEQQZ256rr 1164337U, // VPCMPEQQZ256rrk 240U, // VPCMPEQQZrm 4160U, // VPCMPEQQZrmb 2573361U, // VPCMPEQQZrmbk 1459249U, // VPCMPEQQZrmk 48U, // VPCMPEQQZrr 1164337U, // VPCMPEQQZrrk 224U, // VPCMPEQQrm 48U, // VPCMPEQQrr 256U, // VPCMPEQWYrm 48U, // VPCMPEQWYrr 224U, // VPCMPEQWZ128rm 1393713U, // VPCMPEQWZ128rmk 48U, // VPCMPEQWZ128rr 1164337U, // VPCMPEQWZ128rrk 256U, // VPCMPEQWZ256rm 1426481U, // VPCMPEQWZ256rmk 48U, // VPCMPEQWZ256rr 1164337U, // VPCMPEQWZ256rrk 240U, // VPCMPEQWZrm 1459249U, // VPCMPEQWZrmk 48U, // VPCMPEQWZrr 1164337U, // VPCMPEQWZrrk 224U, // VPCMPEQWrm 48U, // VPCMPEQWrr 0U, // VPCMPESTRIMEM 0U, // VPCMPESTRIREG 0U, // VPCMPESTRIrm 16U, // VPCMPESTRIrr 0U, // VPCMPESTRM128MEM 0U, // VPCMPESTRM128REG 0U, // VPCMPESTRM128rm 16U, // VPCMPESTRM128rr 256U, // VPCMPGTBYrm 48U, // VPCMPGTBYrr 224U, // VPCMPGTBZ128rm 1393713U, // VPCMPGTBZ128rmk 48U, // VPCMPGTBZ128rr 1164337U, // VPCMPGTBZ128rrk 256U, // VPCMPGTBZ256rm 1426481U, // VPCMPGTBZ256rmk 48U, // VPCMPGTBZ256rr 1164337U, // VPCMPGTBZ256rrk 240U, // VPCMPGTBZrm 1459249U, // VPCMPGTBZrmk 48U, // VPCMPGTBZrr 1164337U, // VPCMPGTBZrrk 224U, // VPCMPGTBrm 48U, // VPCMPGTBrr 256U, // VPCMPGTDYrm 48U, // VPCMPGTDYrr 224U, // VPCMPGTDZ128rm 3104U, // VPCMPGTDZ128rmb 2016305U, // VPCMPGTDZ128rmbk 1393713U, // VPCMPGTDZ128rmk 48U, // VPCMPGTDZ128rr 1164337U, // VPCMPGTDZ128rrk 256U, // VPCMPGTDZ256rm 4128U, // VPCMPGTDZ256rmb 2540593U, // VPCMPGTDZ256rmbk 1426481U, // VPCMPGTDZ256rmk 48U, // VPCMPGTDZ256rr 1164337U, // VPCMPGTDZ256rrk 240U, // VPCMPGTDZrm 5152U, // VPCMPGTDZrmb 3064881U, // VPCMPGTDZrmbk 1459249U, // VPCMPGTDZrmk 48U, // VPCMPGTDZrr 1164337U, // VPCMPGTDZrrk 224U, // VPCMPGTDrm 48U, // VPCMPGTDrr 256U, // VPCMPGTQYrm 48U, // VPCMPGTQYrr 224U, // VPCMPGTQZ128rm 2112U, // VPCMPGTQZ128rmb 1000497U, // VPCMPGTQZ128rmbk 1393713U, // VPCMPGTQZ128rmk 48U, // VPCMPGTQZ128rr 1164337U, // VPCMPGTQZ128rrk 256U, // VPCMPGTQZ256rm 3136U, // VPCMPGTQZ256rmb 2049073U, // VPCMPGTQZ256rmbk 1426481U, // VPCMPGTQZ256rmk 48U, // VPCMPGTQZ256rr 1164337U, // VPCMPGTQZ256rrk 240U, // VPCMPGTQZrm 4160U, // VPCMPGTQZrmb 2573361U, // VPCMPGTQZrmbk 1459249U, // VPCMPGTQZrmk 48U, // VPCMPGTQZrr 1164337U, // VPCMPGTQZrrk 224U, // VPCMPGTQrm 48U, // VPCMPGTQrr 256U, // VPCMPGTWYrm 48U, // VPCMPGTWYrr 224U, // VPCMPGTWZ128rm 1393713U, // VPCMPGTWZ128rmk 48U, // VPCMPGTWZ128rr 1164337U, // VPCMPGTWZ128rrk 256U, // VPCMPGTWZ256rm 1426481U, // VPCMPGTWZ256rmk 48U, // VPCMPGTWZ256rr 1164337U, // VPCMPGTWZ256rrk 240U, // VPCMPGTWZrm 1459249U, // VPCMPGTWZrmk 48U, // VPCMPGTWZrr 1164337U, // VPCMPGTWZrrk 224U, // VPCMPGTWrm 48U, // VPCMPGTWrr 0U, // VPCMPISTRIMEM 0U, // VPCMPISTRIREG 0U, // VPCMPISTRIrm 16U, // VPCMPISTRIrr 0U, // VPCMPISTRM128MEM 0U, // VPCMPISTRM128REG 0U, // VPCMPISTRM128rm 16U, // VPCMPISTRM128rr 230U, // VPCMPQZ128rmi 247008U, // VPCMPQZ128rmi_alt 2118U, // VPCMPQZ128rmib 12352U, // VPCMPQZ128rmib_alt 505U, // VPCMPQZ128rmibk 5719089U, // VPCMPQZ128rmibk_alt 6U, // VPCMPQZ128rmik 42288177U, // VPCMPQZ128rmik_alt 54U, // VPCMPQZ128rri 1311792U, // VPCMPQZ128rri_alt 7U, // VPCMPQZ128rrik 33670193U, // VPCMPQZ128rrik_alt 262U, // VPCMPQZ256rmi 247040U, // VPCMPQZ256rmi_alt 3142U, // VPCMPQZ256rmib 9280U, // VPCMPQZ256rmib_alt 457U, // VPCMPQZ256rmibk 4146225U, // VPCMPQZ256rmibk_alt 7U, // VPCMPQZ256rmik 42320945U, // VPCMPQZ256rmik_alt 54U, // VPCMPQZ256rri 1311792U, // VPCMPQZ256rri_alt 7U, // VPCMPQZ256rrik 33670193U, // VPCMPQZ256rrik_alt 246U, // VPCMPQZrmi 247024U, // VPCMPQZrmi_alt 4166U, // VPCMPQZrmib 10304U, // VPCMPQZrmib_alt 473U, // VPCMPQZrmibk 4670513U, // VPCMPQZrmibk_alt 8U, // VPCMPQZrmik 42353713U, // VPCMPQZrmik_alt 54U, // VPCMPQZrri 1311792U, // VPCMPQZrri_alt 7U, // VPCMPQZrrik 33670193U, // VPCMPQZrrik_alt 230U, // VPCMPUBZ128rmi 247008U, // VPCMPUBZ128rmi_alt 6U, // VPCMPUBZ128rmik 42288177U, // VPCMPUBZ128rmik_alt 54U, // VPCMPUBZ128rri 1311792U, // VPCMPUBZ128rri_alt 7U, // VPCMPUBZ128rrik 33670193U, // VPCMPUBZ128rrik_alt 262U, // VPCMPUBZ256rmi 247040U, // VPCMPUBZ256rmi_alt 7U, // VPCMPUBZ256rmik 42320945U, // VPCMPUBZ256rmik_alt 54U, // VPCMPUBZ256rri 1311792U, // VPCMPUBZ256rri_alt 7U, // VPCMPUBZ256rrik 33670193U, // VPCMPUBZ256rrik_alt 246U, // VPCMPUBZrmi 247024U, // VPCMPUBZrmi_alt 8U, // VPCMPUBZrmik 42353713U, // VPCMPUBZrmik_alt 54U, // VPCMPUBZrri 1311792U, // VPCMPUBZrri_alt 7U, // VPCMPUBZrrik 33670193U, // VPCMPUBZrrik_alt 230U, // VPCMPUDZ128rmi 247008U, // VPCMPUDZ128rmi_alt 3110U, // VPCMPUDZ128rmib 9248U, // VPCMPUDZ128rmib_alt 456U, // VPCMPUDZ128rmibk 4113457U, // VPCMPUDZ128rmibk_alt 6U, // VPCMPUDZ128rmik 42288177U, // VPCMPUDZ128rmik_alt 54U, // VPCMPUDZ128rri 1311792U, // VPCMPUDZ128rri_alt 7U, // VPCMPUDZ128rrik 33670193U, // VPCMPUDZ128rrik_alt 262U, // VPCMPUDZ256rmi 247040U, // VPCMPUDZ256rmi_alt 4134U, // VPCMPUDZ256rmib 10272U, // VPCMPUDZ256rmib_alt 472U, // VPCMPUDZ256rmibk 4637745U, // VPCMPUDZ256rmibk_alt 7U, // VPCMPUDZ256rmik 42320945U, // VPCMPUDZ256rmik_alt 54U, // VPCMPUDZ256rri 1311792U, // VPCMPUDZ256rri_alt 7U, // VPCMPUDZ256rrik 33670193U, // VPCMPUDZ256rrik_alt 246U, // VPCMPUDZrmi 247024U, // VPCMPUDZrmi_alt 5158U, // VPCMPUDZrmib 11296U, // VPCMPUDZrmib_alt 488U, // VPCMPUDZrmibk 5162033U, // VPCMPUDZrmibk_alt 8U, // VPCMPUDZrmik 42353713U, // VPCMPUDZrmik_alt 54U, // VPCMPUDZrri 1311792U, // VPCMPUDZrri_alt 7U, // VPCMPUDZrrik 33670193U, // VPCMPUDZrrik_alt 230U, // VPCMPUQZ128rmi 247008U, // VPCMPUQZ128rmi_alt 2118U, // VPCMPUQZ128rmib 12352U, // VPCMPUQZ128rmib_alt 505U, // VPCMPUQZ128rmibk 5719089U, // VPCMPUQZ128rmibk_alt 6U, // VPCMPUQZ128rmik 42288177U, // VPCMPUQZ128rmik_alt 54U, // VPCMPUQZ128rri 1311792U, // VPCMPUQZ128rri_alt 7U, // VPCMPUQZ128rrik 33670193U, // VPCMPUQZ128rrik_alt 262U, // VPCMPUQZ256rmi 247040U, // VPCMPUQZ256rmi_alt 3142U, // VPCMPUQZ256rmib 9280U, // VPCMPUQZ256rmib_alt 457U, // VPCMPUQZ256rmibk 4146225U, // VPCMPUQZ256rmibk_alt 7U, // VPCMPUQZ256rmik 42320945U, // VPCMPUQZ256rmik_alt 54U, // VPCMPUQZ256rri 1311792U, // VPCMPUQZ256rri_alt 7U, // VPCMPUQZ256rrik 33670193U, // VPCMPUQZ256rrik_alt 246U, // VPCMPUQZrmi 247024U, // VPCMPUQZrmi_alt 4166U, // VPCMPUQZrmib 10304U, // VPCMPUQZrmib_alt 473U, // VPCMPUQZrmibk 4670513U, // VPCMPUQZrmibk_alt 8U, // VPCMPUQZrmik 42353713U, // VPCMPUQZrmik_alt 54U, // VPCMPUQZrri 1311792U, // VPCMPUQZrri_alt 7U, // VPCMPUQZrrik 33670193U, // VPCMPUQZrrik_alt 230U, // VPCMPUWZ128rmi 247008U, // VPCMPUWZ128rmi_alt 6U, // VPCMPUWZ128rmik 42288177U, // VPCMPUWZ128rmik_alt 54U, // VPCMPUWZ128rri 1311792U, // VPCMPUWZ128rri_alt 7U, // VPCMPUWZ128rrik 33670193U, // VPCMPUWZ128rrik_alt 262U, // VPCMPUWZ256rmi 247040U, // VPCMPUWZ256rmi_alt 7U, // VPCMPUWZ256rmik 42320945U, // VPCMPUWZ256rmik_alt 54U, // VPCMPUWZ256rri 1311792U, // VPCMPUWZ256rri_alt 7U, // VPCMPUWZ256rrik 33670193U, // VPCMPUWZ256rrik_alt 246U, // VPCMPUWZrmi 247024U, // VPCMPUWZrmi_alt 8U, // VPCMPUWZrmik 42353713U, // VPCMPUWZrmik_alt 54U, // VPCMPUWZrri 1311792U, // VPCMPUWZrri_alt 7U, // VPCMPUWZrrik 33670193U, // VPCMPUWZrrik_alt 230U, // VPCMPWZ128rmi 247008U, // VPCMPWZ128rmi_alt 6U, // VPCMPWZ128rmik 42288177U, // VPCMPWZ128rmik_alt 54U, // VPCMPWZ128rri 1311792U, // VPCMPWZ128rri_alt 7U, // VPCMPWZ128rrik 33670193U, // VPCMPWZ128rrik_alt 262U, // VPCMPWZ256rmi 247040U, // VPCMPWZ256rmi_alt 7U, // VPCMPWZ256rmik 42320945U, // VPCMPWZ256rmik_alt 54U, // VPCMPWZ256rri 1311792U, // VPCMPWZ256rri_alt 7U, // VPCMPWZ256rrik 33670193U, // VPCMPWZ256rrik_alt 246U, // VPCMPWZrmi 247024U, // VPCMPWZrmi_alt 8U, // VPCMPWZrmik 42353713U, // VPCMPWZrmik_alt 54U, // VPCMPWZrri 1311792U, // VPCMPWZrri_alt 7U, // VPCMPWZrrik 33670193U, // VPCMPWZrrik_alt 230U, // VPCOMBmi 1066208U, // VPCOMBmi_alt 54U, // VPCOMBri 1164336U, // VPCOMBri_alt 230U, // VPCOMDmi 1066208U, // VPCOMDmi_alt 54U, // VPCOMDri 1164336U, // VPCOMDri_alt 81U, // VPCOMPRESSDZ128mrk 161U, // VPCOMPRESSDZ128rrk 50U, // VPCOMPRESSDZ128rrkz 81U, // VPCOMPRESSDZ256mrk 161U, // VPCOMPRESSDZ256rrk 50U, // VPCOMPRESSDZ256rrkz 81U, // VPCOMPRESSDZmrk 161U, // VPCOMPRESSDZrrk 50U, // VPCOMPRESSDZrrkz 81U, // VPCOMPRESSQZ128mrk 161U, // VPCOMPRESSQZ128rrk 50U, // VPCOMPRESSQZ128rrkz 81U, // VPCOMPRESSQZ256mrk 161U, // VPCOMPRESSQZ256rrk 50U, // VPCOMPRESSQZ256rrkz 81U, // VPCOMPRESSQZmrk 161U, // VPCOMPRESSQZrrk 50U, // VPCOMPRESSQZrrkz 230U, // VPCOMQmi 1066208U, // VPCOMQmi_alt 54U, // VPCOMQri 1164336U, // VPCOMQri_alt 230U, // VPCOMUBmi 1066208U, // VPCOMUBmi_alt 54U, // VPCOMUBri 1164336U, // VPCOMUBri_alt 230U, // VPCOMUDmi 1066208U, // VPCOMUDmi_alt 54U, // VPCOMUDri 1164336U, // VPCOMUDri_alt 230U, // VPCOMUQmi 1066208U, // VPCOMUQmi_alt 54U, // VPCOMUQri 1164336U, // VPCOMUQri_alt 230U, // VPCOMUWmi 1066208U, // VPCOMUWmi_alt 54U, // VPCOMUWri 1164336U, // VPCOMUWri_alt 230U, // VPCOMWmi 1066208U, // VPCOMWmi_alt 54U, // VPCOMWri 1164336U, // VPCOMWri_alt 0U, // VPCONFLICTDrm 5U, // VPCONFLICTDrmb 513U, // VPCONFLICTDrmbk 5154U, // VPCONFLICTDrmbkz 433U, // VPCONFLICTDrmk 242U, // VPCONFLICTDrmkz 0U, // VPCONFLICTDrr 161U, // VPCONFLICTDrrk 50U, // VPCONFLICTDrrkz 0U, // VPCONFLICTQrm 5U, // VPCONFLICTQrmb 529U, // VPCONFLICTQrmbk 4162U, // VPCONFLICTQrmbkz 433U, // VPCONFLICTQrmk 242U, // VPCONFLICTQrmkz 0U, // VPCONFLICTQrr 161U, // VPCONFLICTQrrk 50U, // VPCONFLICTQrrkz 246960U, // VPERM2F128rm 1311792U, // VPERM2F128rr 246960U, // VPERM2I128rm 1311792U, // VPERM2I128rr 256U, // VPERMDYrm 48U, // VPERMDYrr 240U, // VPERMDZrm 48U, // VPERMDZrr 432U, // VPERMI2Drm 394401U, // VPERMI2Drmk 394402U, // VPERMI2Drmkz 160U, // VPERMI2Drr 1148065U, // VPERMI2Drrk 1148066U, // VPERMI2Drrkz 432U, // VPERMI2PDrm 394401U, // VPERMI2PDrmk 394402U, // VPERMI2PDrmkz 160U, // VPERMI2PDrr 1148065U, // VPERMI2PDrrk 1148066U, // VPERMI2PDrrkz 432U, // VPERMI2PSrm 394401U, // VPERMI2PSrmk 394402U, // VPERMI2PSrmkz 160U, // VPERMI2PSrr 1148065U, // VPERMI2PSrrk 1148066U, // VPERMI2PSrrkz 432U, // VPERMI2Qrm 394401U, // VPERMI2Qrmk 394402U, // VPERMI2Qrmkz 160U, // VPERMI2Qrr 1148065U, // VPERMI2Qrrk 1148066U, // VPERMI2Qrrkz 17600U, // VPERMIL2PDmr 17584U, // VPERMIL2PDmrY 82992U, // VPERMIL2PDrm 148528U, // VPERMIL2PDrmY 50447408U, // VPERMIL2PDrr 50447408U, // VPERMIL2PDrrY 17600U, // VPERMIL2PSmr 17584U, // VPERMIL2PSmrY 82992U, // VPERMIL2PSrm 148528U, // VPERMIL2PSrmY 50447408U, // VPERMIL2PSrr 50447408U, // VPERMIL2PSrrY 0U, // VPERMILPDYmi 16U, // VPERMILPDYri 256U, // VPERMILPDYrm 48U, // VPERMILPDYrr 0U, // VPERMILPDZmi 16U, // VPERMILPDZri 240U, // VPERMILPDZrm 48U, // VPERMILPDZrr 0U, // VPERMILPDmi 16U, // VPERMILPDri 224U, // VPERMILPDrm 48U, // VPERMILPDrr 0U, // VPERMILPSYmi 16U, // VPERMILPSYri 256U, // VPERMILPSYrm 48U, // VPERMILPSYrr 0U, // VPERMILPSZmi 16U, // VPERMILPSZri 240U, // VPERMILPSZrm 48U, // VPERMILPSZrr 0U, // VPERMILPSmi 16U, // VPERMILPSri 224U, // VPERMILPSrm 48U, // VPERMILPSrr 0U, // VPERMPDYmi 16U, // VPERMPDYri 0U, // VPERMPDZmi 16U, // VPERMPDZri 208U, // VPERMPDZrm 48U, // VPERMPDZrr 256U, // VPERMPSYrm 48U, // VPERMPSYrr 208U, // VPERMPSZrm 48U, // VPERMPSZrr 0U, // VPERMQYmi 16U, // VPERMQYri 0U, // VPERMQZmi 16U, // VPERMQZri 240U, // VPERMQZrm 48U, // VPERMQZrr 432U, // VPERMT2Drm 394401U, // VPERMT2Drmk 394402U, // VPERMT2Drmkz 160U, // VPERMT2Drr 1148065U, // VPERMT2Drrk 1148066U, // VPERMT2Drrkz 432U, // VPERMT2PDrm 394401U, // VPERMT2PDrmk 394402U, // VPERMT2PDrmkz 160U, // VPERMT2PDrr 1148065U, // VPERMT2PDrrk 1148066U, // VPERMT2PDrrkz 432U, // VPERMT2PSrm 394401U, // VPERMT2PSrmk 394402U, // VPERMT2PSrmkz 160U, // VPERMT2PSrr 1148065U, // VPERMT2PSrrk 1148066U, // VPERMT2PSrrkz 432U, // VPERMT2Qrm 394401U, // VPERMT2Qrmk 394402U, // VPERMT2Qrmkz 160U, // VPERMT2Qrr 1148065U, // VPERMT2Qrrk 1148066U, // VPERMT2Qrrkz 401U, // VPEXPANDDZ128rmk 226U, // VPEXPANDDZ128rmkz 161U, // VPEXPANDDZ128rrk 50U, // VPEXPANDDZ128rrkz 417U, // VPEXPANDDZ256rmk 258U, // VPEXPANDDZ256rmkz 161U, // VPEXPANDDZ256rrk 50U, // VPEXPANDDZ256rrkz 433U, // VPEXPANDDZrmk 242U, // VPEXPANDDZrmkz 161U, // VPEXPANDDZrrk 50U, // VPEXPANDDZrrkz 401U, // VPEXPANDQZ128rmk 226U, // VPEXPANDQZ128rmkz 161U, // VPEXPANDQZ128rrk 50U, // VPEXPANDQZ128rrkz 417U, // VPEXPANDQZ256rmk 258U, // VPEXPANDQZ256rmkz 161U, // VPEXPANDQZ256rrk 50U, // VPEXPANDQZ256rrkz 433U, // VPEXPANDQZrmk 242U, // VPEXPANDQZrmkz 161U, // VPEXPANDQZrrk 50U, // VPEXPANDQZrrkz 0U, // VPEXTRBmr 16U, // VPEXTRBrr 0U, // VPEXTRDmr 16U, // VPEXTRDrr 0U, // VPEXTRQmr 16U, // VPEXTRQrr 0U, // VPEXTRWmr 16U, // VPEXTRWri 16U, // VPEXTRWrr_REV 0U, // VPGATHERDDYrm 4U, // VPGATHERDDZrm 0U, // VPGATHERDDrm 0U, // VPGATHERDQYrm 3U, // VPGATHERDQZrm 0U, // VPGATHERDQrm 0U, // VPGATHERQDYrm 3U, // VPGATHERQDZrm 0U, // VPGATHERQDrm 0U, // VPGATHERQQYrm 3U, // VPGATHERQQZrm 0U, // VPGATHERQQrm 0U, // VPHADDBDrm 0U, // VPHADDBDrr 0U, // VPHADDBQrm 0U, // VPHADDBQrr 0U, // VPHADDBWrm 0U, // VPHADDBWrr 0U, // VPHADDDQrm 0U, // VPHADDDQrr 256U, // VPHADDDYrm 48U, // VPHADDDYrr 224U, // VPHADDDrm 48U, // VPHADDDrr 224U, // VPHADDSWrm128 256U, // VPHADDSWrm256 48U, // VPHADDSWrr128 48U, // VPHADDSWrr256 0U, // VPHADDUBDrm 0U, // VPHADDUBDrr 0U, // VPHADDUBQrm 0U, // VPHADDUBQrr 0U, // VPHADDUBWrm 0U, // VPHADDUBWrr 0U, // VPHADDUDQrm 0U, // VPHADDUDQrr 0U, // VPHADDUWDrm 0U, // VPHADDUWDrr 0U, // VPHADDUWQrm 0U, // VPHADDUWQrr 0U, // VPHADDWDrm 0U, // VPHADDWDrr 0U, // VPHADDWQrm 0U, // VPHADDWQrr 256U, // VPHADDWYrm 48U, // VPHADDWYrr 224U, // VPHADDWrm 48U, // VPHADDWrr 0U, // VPHMINPOSUWrm128 0U, // VPHMINPOSUWrr128 0U, // VPHSUBBWrm 0U, // VPHSUBBWrr 0U, // VPHSUBDQrm 0U, // VPHSUBDQrr 256U, // VPHSUBDYrm 48U, // VPHSUBDYrr 224U, // VPHSUBDrm 48U, // VPHSUBDrr 224U, // VPHSUBSWrm128 256U, // VPHSUBSWrm256 48U, // VPHSUBSWrr128 48U, // VPHSUBSWrr256 0U, // VPHSUBWDrm 0U, // VPHSUBWDrr 256U, // VPHSUBWYrm 48U, // VPHSUBWYrr 224U, // VPHSUBWrm 48U, // VPHSUBWrr 544U, // VPINSRBrm 1311792U, // VPINSRBrr 246816U, // VPINSRDrm 1311792U, // VPINSRDrr 246848U, // VPINSRQrm 1311792U, // VPINSRQrr 560U, // VPINSRWrmi 1311792U, // VPINSRWrri 0U, // VPLZCNTDrm 5U, // VPLZCNTDrmb 513U, // VPLZCNTDrmbk 5154U, // VPLZCNTDrmbkz 433U, // VPLZCNTDrmk 242U, // VPLZCNTDrmkz 0U, // VPLZCNTDrr 161U, // VPLZCNTDrrk 50U, // VPLZCNTDrrkz 0U, // VPLZCNTQrm 5U, // VPLZCNTQrmb 529U, // VPLZCNTQrmbk 4162U, // VPLZCNTQrmbkz 433U, // VPLZCNTQrmk 242U, // VPLZCNTQrmkz 0U, // VPLZCNTQrr 161U, // VPLZCNTQrrk 50U, // VPLZCNTQrrkz 1066208U, // VPMACSDDrm 1164336U, // VPMACSDDrr 1066208U, // VPMACSDQHrm 1164336U, // VPMACSDQHrr 1066208U, // VPMACSDQLrm 1164336U, // VPMACSDQLrr 1066208U, // VPMACSSDDrm 1164336U, // VPMACSSDDrr 1066208U, // VPMACSSDQHrm 1164336U, // VPMACSSDQHrr 1066208U, // VPMACSSDQLrm 1164336U, // VPMACSSDQLrr 1066208U, // VPMACSSWDrm 1164336U, // VPMACSSWDrr 1066208U, // VPMACSSWWrm 1164336U, // VPMACSSWWrr 1066208U, // VPMACSWDrm 1164336U, // VPMACSWDrr 1066208U, // VPMACSWWrm 1164336U, // VPMACSWWrr 1066208U, // VPMADCSSWDrm 1164336U, // VPMADCSSWDrr 1066208U, // VPMADCSWDrm 1164336U, // VPMADCSWDrr 224U, // VPMADDUBSWrm128 256U, // VPMADDUBSWrm256 48U, // VPMADDUBSWrr128 48U, // VPMADDUBSWrr256 256U, // VPMADDWDYrm 48U, // VPMADDWDYrr 224U, // VPMADDWDrm 48U, // VPMADDWDrr 80U, // VPMASKMOVDYmr 256U, // VPMASKMOVDYrm 80U, // VPMASKMOVDmr 224U, // VPMASKMOVDrm 80U, // VPMASKMOVQYmr 256U, // VPMASKMOVQYrm 80U, // VPMASKMOVQmr 224U, // VPMASKMOVQrm 256U, // VPMAXSBYrm 48U, // VPMAXSBYrr 224U, // VPMAXSBZ128rm 328865U, // VPMAXSBZ128rmk 1393714U, // VPMAXSBZ128rmkz 48U, // VPMAXSBZ128rr 1148065U, // VPMAXSBZ128rrk 1164338U, // VPMAXSBZ128rrkz 256U, // VPMAXSBZ256rm 361633U, // VPMAXSBZ256rmk 1426482U, // VPMAXSBZ256rmkz 48U, // VPMAXSBZ256rr 1148065U, // VPMAXSBZ256rrk 1164338U, // VPMAXSBZ256rrkz 240U, // VPMAXSBZrm 394401U, // VPMAXSBZrmk 1459250U, // VPMAXSBZrmkz 48U, // VPMAXSBZrr 1148065U, // VPMAXSBZrrk 1164338U, // VPMAXSBZrrkz 224U, // VPMAXSBrm 48U, // VPMAXSBrr 256U, // VPMAXSDYrm 48U, // VPMAXSDYrr 224U, // VPMAXSDZ128rm 3104U, // VPMAXSDZ128rmb 2000033U, // VPMAXSDZ128rmbk 2016306U, // VPMAXSDZ128rmbkz 328865U, // VPMAXSDZ128rmk 1393714U, // VPMAXSDZ128rmkz 48U, // VPMAXSDZ128rr 1148065U, // VPMAXSDZ128rrk 1164338U, // VPMAXSDZ128rrkz 256U, // VPMAXSDZ256rm 4128U, // VPMAXSDZ256rmb 2524321U, // VPMAXSDZ256rmbk 2540594U, // VPMAXSDZ256rmbkz 361633U, // VPMAXSDZ256rmk 1426482U, // VPMAXSDZ256rmkz 48U, // VPMAXSDZ256rr 1148065U, // VPMAXSDZ256rrk 1164338U, // VPMAXSDZ256rrkz 240U, // VPMAXSDZrm 5152U, // VPMAXSDZrmb 3048609U, // VPMAXSDZrmbk 3064882U, // VPMAXSDZrmbkz 394401U, // VPMAXSDZrmk 1459250U, // VPMAXSDZrmkz 48U, // VPMAXSDZrr 1148065U, // VPMAXSDZrrk 1164338U, // VPMAXSDZrrkz 224U, // VPMAXSDrm 48U, // VPMAXSDrr 224U, // VPMAXSQZ128rm 2112U, // VPMAXSQZ128rmb 984225U, // VPMAXSQZ128rmbk 1000498U, // VPMAXSQZ128rmbkz 328865U, // VPMAXSQZ128rmk 1393714U, // VPMAXSQZ128rmkz 48U, // VPMAXSQZ128rr 1148065U, // VPMAXSQZ128rrk 1164338U, // VPMAXSQZ128rrkz 256U, // VPMAXSQZ256rm 3136U, // VPMAXSQZ256rmb 2032801U, // VPMAXSQZ256rmbk 2049074U, // VPMAXSQZ256rmbkz 361633U, // VPMAXSQZ256rmk 1426482U, // VPMAXSQZ256rmkz 48U, // VPMAXSQZ256rr 1148065U, // VPMAXSQZ256rrk 1164338U, // VPMAXSQZ256rrkz 240U, // VPMAXSQZrm 4160U, // VPMAXSQZrmb 2557089U, // VPMAXSQZrmbk 2573362U, // VPMAXSQZrmbkz 394401U, // VPMAXSQZrmk 1459250U, // VPMAXSQZrmkz 48U, // VPMAXSQZrr 1148065U, // VPMAXSQZrrk 1164338U, // VPMAXSQZrrkz 256U, // VPMAXSWYrm 48U, // VPMAXSWYrr 224U, // VPMAXSWZ128rm 328865U, // VPMAXSWZ128rmk 1393714U, // VPMAXSWZ128rmkz 48U, // VPMAXSWZ128rr 1148065U, // VPMAXSWZ128rrk 1164338U, // VPMAXSWZ128rrkz 256U, // VPMAXSWZ256rm 361633U, // VPMAXSWZ256rmk 1426482U, // VPMAXSWZ256rmkz 48U, // VPMAXSWZ256rr 1148065U, // VPMAXSWZ256rrk 1164338U, // VPMAXSWZ256rrkz 240U, // VPMAXSWZrm 394401U, // VPMAXSWZrmk 1459250U, // VPMAXSWZrmkz 48U, // VPMAXSWZrr 1148065U, // VPMAXSWZrrk 1164338U, // VPMAXSWZrrkz 224U, // VPMAXSWrm 48U, // VPMAXSWrr 256U, // VPMAXUBYrm 48U, // VPMAXUBYrr 224U, // VPMAXUBZ128rm 328865U, // VPMAXUBZ128rmk 1393714U, // VPMAXUBZ128rmkz 48U, // VPMAXUBZ128rr 1148065U, // VPMAXUBZ128rrk 1164338U, // VPMAXUBZ128rrkz 256U, // VPMAXUBZ256rm 361633U, // VPMAXUBZ256rmk 1426482U, // VPMAXUBZ256rmkz 48U, // VPMAXUBZ256rr 1148065U, // VPMAXUBZ256rrk 1164338U, // VPMAXUBZ256rrkz 240U, // VPMAXUBZrm 394401U, // VPMAXUBZrmk 1459250U, // VPMAXUBZrmkz 48U, // VPMAXUBZrr 1148065U, // VPMAXUBZrrk 1164338U, // VPMAXUBZrrkz 224U, // VPMAXUBrm 48U, // VPMAXUBrr 256U, // VPMAXUDYrm 48U, // VPMAXUDYrr 224U, // VPMAXUDZ128rm 3104U, // VPMAXUDZ128rmb 2000033U, // VPMAXUDZ128rmbk 2016306U, // VPMAXUDZ128rmbkz 328865U, // VPMAXUDZ128rmk 1393714U, // VPMAXUDZ128rmkz 48U, // VPMAXUDZ128rr 1148065U, // VPMAXUDZ128rrk 1164338U, // VPMAXUDZ128rrkz 256U, // VPMAXUDZ256rm 4128U, // VPMAXUDZ256rmb 2524321U, // VPMAXUDZ256rmbk 2540594U, // VPMAXUDZ256rmbkz 361633U, // VPMAXUDZ256rmk 1426482U, // VPMAXUDZ256rmkz 48U, // VPMAXUDZ256rr 1148065U, // VPMAXUDZ256rrk 1164338U, // VPMAXUDZ256rrkz 240U, // VPMAXUDZrm 5152U, // VPMAXUDZrmb 3048609U, // VPMAXUDZrmbk 3064882U, // VPMAXUDZrmbkz 394401U, // VPMAXUDZrmk 1459250U, // VPMAXUDZrmkz 48U, // VPMAXUDZrr 1148065U, // VPMAXUDZrrk 1164338U, // VPMAXUDZrrkz 224U, // VPMAXUDrm 48U, // VPMAXUDrr 224U, // VPMAXUQZ128rm 2112U, // VPMAXUQZ128rmb 984225U, // VPMAXUQZ128rmbk 1000498U, // VPMAXUQZ128rmbkz 328865U, // VPMAXUQZ128rmk 1393714U, // VPMAXUQZ128rmkz 48U, // VPMAXUQZ128rr 1148065U, // VPMAXUQZ128rrk 1164338U, // VPMAXUQZ128rrkz 256U, // VPMAXUQZ256rm 3136U, // VPMAXUQZ256rmb 2032801U, // VPMAXUQZ256rmbk 2049074U, // VPMAXUQZ256rmbkz 361633U, // VPMAXUQZ256rmk 1426482U, // VPMAXUQZ256rmkz 48U, // VPMAXUQZ256rr 1148065U, // VPMAXUQZ256rrk 1164338U, // VPMAXUQZ256rrkz 240U, // VPMAXUQZrm 4160U, // VPMAXUQZrmb 2557089U, // VPMAXUQZrmbk 2573362U, // VPMAXUQZrmbkz 394401U, // VPMAXUQZrmk 1459250U, // VPMAXUQZrmkz 48U, // VPMAXUQZrr 1148065U, // VPMAXUQZrrk 1164338U, // VPMAXUQZrrkz 256U, // VPMAXUWYrm 48U, // VPMAXUWYrr 224U, // VPMAXUWZ128rm 328865U, // VPMAXUWZ128rmk 1393714U, // VPMAXUWZ128rmkz 48U, // VPMAXUWZ128rr 1148065U, // VPMAXUWZ128rrk 1164338U, // VPMAXUWZ128rrkz 256U, // VPMAXUWZ256rm 361633U, // VPMAXUWZ256rmk 1426482U, // VPMAXUWZ256rmkz 48U, // VPMAXUWZ256rr 1148065U, // VPMAXUWZ256rrk 1164338U, // VPMAXUWZ256rrkz 240U, // VPMAXUWZrm 394401U, // VPMAXUWZrmk 1459250U, // VPMAXUWZrmkz 48U, // VPMAXUWZrr 1148065U, // VPMAXUWZrrk 1164338U, // VPMAXUWZrrkz 224U, // VPMAXUWrm 48U, // VPMAXUWrr 256U, // VPMINSBYrm 48U, // VPMINSBYrr 224U, // VPMINSBZ128rm 328865U, // VPMINSBZ128rmk 1393714U, // VPMINSBZ128rmkz 48U, // VPMINSBZ128rr 1148065U, // VPMINSBZ128rrk 1164338U, // VPMINSBZ128rrkz 256U, // VPMINSBZ256rm 361633U, // VPMINSBZ256rmk 1426482U, // VPMINSBZ256rmkz 48U, // VPMINSBZ256rr 1148065U, // VPMINSBZ256rrk 1164338U, // VPMINSBZ256rrkz 240U, // VPMINSBZrm 394401U, // VPMINSBZrmk 1459250U, // VPMINSBZrmkz 48U, // VPMINSBZrr 1148065U, // VPMINSBZrrk 1164338U, // VPMINSBZrrkz 224U, // VPMINSBrm 48U, // VPMINSBrr 256U, // VPMINSDYrm 48U, // VPMINSDYrr 224U, // VPMINSDZ128rm 3104U, // VPMINSDZ128rmb 2000033U, // VPMINSDZ128rmbk 2016306U, // VPMINSDZ128rmbkz 328865U, // VPMINSDZ128rmk 1393714U, // VPMINSDZ128rmkz 48U, // VPMINSDZ128rr 1148065U, // VPMINSDZ128rrk 1164338U, // VPMINSDZ128rrkz 256U, // VPMINSDZ256rm 4128U, // VPMINSDZ256rmb 2524321U, // VPMINSDZ256rmbk 2540594U, // VPMINSDZ256rmbkz 361633U, // VPMINSDZ256rmk 1426482U, // VPMINSDZ256rmkz 48U, // VPMINSDZ256rr 1148065U, // VPMINSDZ256rrk 1164338U, // VPMINSDZ256rrkz 240U, // VPMINSDZrm 5152U, // VPMINSDZrmb 3048609U, // VPMINSDZrmbk 3064882U, // VPMINSDZrmbkz 394401U, // VPMINSDZrmk 1459250U, // VPMINSDZrmkz 48U, // VPMINSDZrr 1148065U, // VPMINSDZrrk 1164338U, // VPMINSDZrrkz 224U, // VPMINSDrm 48U, // VPMINSDrr 224U, // VPMINSQZ128rm 2112U, // VPMINSQZ128rmb 984225U, // VPMINSQZ128rmbk 1000498U, // VPMINSQZ128rmbkz 328865U, // VPMINSQZ128rmk 1393714U, // VPMINSQZ128rmkz 48U, // VPMINSQZ128rr 1148065U, // VPMINSQZ128rrk 1164338U, // VPMINSQZ128rrkz 256U, // VPMINSQZ256rm 3136U, // VPMINSQZ256rmb 2032801U, // VPMINSQZ256rmbk 2049074U, // VPMINSQZ256rmbkz 361633U, // VPMINSQZ256rmk 1426482U, // VPMINSQZ256rmkz 48U, // VPMINSQZ256rr 1148065U, // VPMINSQZ256rrk 1164338U, // VPMINSQZ256rrkz 240U, // VPMINSQZrm 4160U, // VPMINSQZrmb 2557089U, // VPMINSQZrmbk 2573362U, // VPMINSQZrmbkz 394401U, // VPMINSQZrmk 1459250U, // VPMINSQZrmkz 48U, // VPMINSQZrr 1148065U, // VPMINSQZrrk 1164338U, // VPMINSQZrrkz 256U, // VPMINSWYrm 48U, // VPMINSWYrr 224U, // VPMINSWZ128rm 328865U, // VPMINSWZ128rmk 1393714U, // VPMINSWZ128rmkz 48U, // VPMINSWZ128rr 1148065U, // VPMINSWZ128rrk 1164338U, // VPMINSWZ128rrkz 256U, // VPMINSWZ256rm 361633U, // VPMINSWZ256rmk 1426482U, // VPMINSWZ256rmkz 48U, // VPMINSWZ256rr 1148065U, // VPMINSWZ256rrk 1164338U, // VPMINSWZ256rrkz 240U, // VPMINSWZrm 394401U, // VPMINSWZrmk 1459250U, // VPMINSWZrmkz 48U, // VPMINSWZrr 1148065U, // VPMINSWZrrk 1164338U, // VPMINSWZrrkz 224U, // VPMINSWrm 48U, // VPMINSWrr 256U, // VPMINUBYrm 48U, // VPMINUBYrr 224U, // VPMINUBZ128rm 328865U, // VPMINUBZ128rmk 1393714U, // VPMINUBZ128rmkz 48U, // VPMINUBZ128rr 1148065U, // VPMINUBZ128rrk 1164338U, // VPMINUBZ128rrkz 256U, // VPMINUBZ256rm 361633U, // VPMINUBZ256rmk 1426482U, // VPMINUBZ256rmkz 48U, // VPMINUBZ256rr 1148065U, // VPMINUBZ256rrk 1164338U, // VPMINUBZ256rrkz 240U, // VPMINUBZrm 394401U, // VPMINUBZrmk 1459250U, // VPMINUBZrmkz 48U, // VPMINUBZrr 1148065U, // VPMINUBZrrk 1164338U, // VPMINUBZrrkz 224U, // VPMINUBrm 48U, // VPMINUBrr 256U, // VPMINUDYrm 48U, // VPMINUDYrr 224U, // VPMINUDZ128rm 3104U, // VPMINUDZ128rmb 2000033U, // VPMINUDZ128rmbk 2016306U, // VPMINUDZ128rmbkz 328865U, // VPMINUDZ128rmk 1393714U, // VPMINUDZ128rmkz 48U, // VPMINUDZ128rr 1148065U, // VPMINUDZ128rrk 1164338U, // VPMINUDZ128rrkz 256U, // VPMINUDZ256rm 4128U, // VPMINUDZ256rmb 2524321U, // VPMINUDZ256rmbk 2540594U, // VPMINUDZ256rmbkz 361633U, // VPMINUDZ256rmk 1426482U, // VPMINUDZ256rmkz 48U, // VPMINUDZ256rr 1148065U, // VPMINUDZ256rrk 1164338U, // VPMINUDZ256rrkz 240U, // VPMINUDZrm 5152U, // VPMINUDZrmb 3048609U, // VPMINUDZrmbk 3064882U, // VPMINUDZrmbkz 394401U, // VPMINUDZrmk 1459250U, // VPMINUDZrmkz 48U, // VPMINUDZrr 1148065U, // VPMINUDZrrk 1164338U, // VPMINUDZrrkz 224U, // VPMINUDrm 48U, // VPMINUDrr 224U, // VPMINUQZ128rm 2112U, // VPMINUQZ128rmb 984225U, // VPMINUQZ128rmbk 1000498U, // VPMINUQZ128rmbkz 328865U, // VPMINUQZ128rmk 1393714U, // VPMINUQZ128rmkz 48U, // VPMINUQZ128rr 1148065U, // VPMINUQZ128rrk 1164338U, // VPMINUQZ128rrkz 256U, // VPMINUQZ256rm 3136U, // VPMINUQZ256rmb 2032801U, // VPMINUQZ256rmbk 2049074U, // VPMINUQZ256rmbkz 361633U, // VPMINUQZ256rmk 1426482U, // VPMINUQZ256rmkz 48U, // VPMINUQZ256rr 1148065U, // VPMINUQZ256rrk 1164338U, // VPMINUQZ256rrkz 240U, // VPMINUQZrm 4160U, // VPMINUQZrmb 2557089U, // VPMINUQZrmbk 2573362U, // VPMINUQZrmbkz 394401U, // VPMINUQZrmk 1459250U, // VPMINUQZrmkz 48U, // VPMINUQZrr 1148065U, // VPMINUQZrrk 1164338U, // VPMINUQZrrkz 256U, // VPMINUWYrm 48U, // VPMINUWYrr 224U, // VPMINUWZ128rm 328865U, // VPMINUWZ128rmk 1393714U, // VPMINUWZ128rmkz 48U, // VPMINUWZ128rr 1148065U, // VPMINUWZ128rrk 1164338U, // VPMINUWZ128rrkz 256U, // VPMINUWZ256rm 361633U, // VPMINUWZ256rmk 1426482U, // VPMINUWZ256rmkz 48U, // VPMINUWZ256rr 1148065U, // VPMINUWZ256rrk 1164338U, // VPMINUWZ256rrkz 240U, // VPMINUWZrm 394401U, // VPMINUWZrmk 1459250U, // VPMINUWZrmkz 48U, // VPMINUWZrr 1148065U, // VPMINUWZrrk 1164338U, // VPMINUWZrrkz 224U, // VPMINUWrm 48U, // VPMINUWrr 0U, // VPMOVDBmr 81U, // VPMOVDBmrk 0U, // VPMOVDBrr 49U, // VPMOVDBrrk 50U, // VPMOVDBrrkz 0U, // VPMOVDWmr 81U, // VPMOVDWmrk 0U, // VPMOVDWrr 49U, // VPMOVDWrrk 50U, // VPMOVDWrrkz 0U, // VPMOVM2BZ128rr 0U, // VPMOVM2BZ256rr 0U, // VPMOVM2BZrr 0U, // VPMOVM2DZ128rr 0U, // VPMOVM2DZ256rr 0U, // VPMOVM2DZrr 0U, // VPMOVM2QZ128rr 0U, // VPMOVM2QZ256rr 0U, // VPMOVM2QZrr 0U, // VPMOVM2WZ128rr 0U, // VPMOVM2WZ256rr 0U, // VPMOVM2WZrr 0U, // VPMOVMSKBYrr 0U, // VPMOVMSKBrr 0U, // VPMOVQBmr 81U, // VPMOVQBmrk 0U, // VPMOVQBrr 49U, // VPMOVQBrrk 50U, // VPMOVQBrrkz 0U, // VPMOVQDmr 81U, // VPMOVQDmrk 0U, // VPMOVQDrr 49U, // VPMOVQDrrk 50U, // VPMOVQDrrkz 0U, // VPMOVQWmr 81U, // VPMOVQWmrk 0U, // VPMOVQWrr 49U, // VPMOVQWrrk 50U, // VPMOVQWrrkz 0U, // VPMOVSDBmr 81U, // VPMOVSDBmrk 0U, // VPMOVSDBrr 49U, // VPMOVSDBrrk 50U, // VPMOVSDBrrkz 0U, // VPMOVSDWmr 81U, // VPMOVSDWmrk 0U, // VPMOVSDWrr 49U, // VPMOVSDWrrk 50U, // VPMOVSDWrrkz 0U, // VPMOVSQBmr 81U, // VPMOVSQBmrk 0U, // VPMOVSQBrr 49U, // VPMOVSQBrrk 50U, // VPMOVSQBrrkz 0U, // VPMOVSQDmr 81U, // VPMOVSQDmrk 0U, // VPMOVSQDrr 49U, // VPMOVSQDrrk 50U, // VPMOVSQDrrkz 0U, // VPMOVSQWmr 81U, // VPMOVSQWmrk 0U, // VPMOVSQWrr 49U, // VPMOVSQWrrk 50U, // VPMOVSQWrrkz 0U, // VPMOVSXBDYrm 0U, // VPMOVSXBDYrr 0U, // VPMOVSXBDZrm 225U, // VPMOVSXBDZrmk 226U, // VPMOVSXBDZrmkz 0U, // VPMOVSXBDZrr 49U, // VPMOVSXBDZrrk 50U, // VPMOVSXBDZrrkz 0U, // VPMOVSXBDrm 0U, // VPMOVSXBDrr 0U, // VPMOVSXBQYrm 0U, // VPMOVSXBQYrr 0U, // VPMOVSXBQZrm 225U, // VPMOVSXBQZrmk 226U, // VPMOVSXBQZrmkz 0U, // VPMOVSXBQZrr 49U, // VPMOVSXBQZrrk 50U, // VPMOVSXBQZrrkz 0U, // VPMOVSXBQrm 0U, // VPMOVSXBQrr 0U, // VPMOVSXBWYrm 0U, // VPMOVSXBWYrr 0U, // VPMOVSXBWrm 0U, // VPMOVSXBWrr 0U, // VPMOVSXDQYrm 0U, // VPMOVSXDQYrr 0U, // VPMOVSXDQZrm 257U, // VPMOVSXDQZrmk 258U, // VPMOVSXDQZrmkz 0U, // VPMOVSXDQZrr 49U, // VPMOVSXDQZrrk 50U, // VPMOVSXDQZrrkz 0U, // VPMOVSXDQrm 0U, // VPMOVSXDQrr 0U, // VPMOVSXWDYrm 0U, // VPMOVSXWDYrr 0U, // VPMOVSXWDZrm 257U, // VPMOVSXWDZrmk 258U, // VPMOVSXWDZrmkz 0U, // VPMOVSXWDZrr 49U, // VPMOVSXWDZrrk 50U, // VPMOVSXWDZrrkz 0U, // VPMOVSXWDrm 0U, // VPMOVSXWDrr 0U, // VPMOVSXWQYrm 0U, // VPMOVSXWQYrr 0U, // VPMOVSXWQZrm 225U, // VPMOVSXWQZrmk 226U, // VPMOVSXWQZrmkz 0U, // VPMOVSXWQZrr 49U, // VPMOVSXWQZrrk 50U, // VPMOVSXWQZrrkz 0U, // VPMOVSXWQrm 0U, // VPMOVSXWQrr 0U, // VPMOVUSDBmr 81U, // VPMOVUSDBmrk 0U, // VPMOVUSDBrr 49U, // VPMOVUSDBrrk 50U, // VPMOVUSDBrrkz 0U, // VPMOVUSDWmr 81U, // VPMOVUSDWmrk 0U, // VPMOVUSDWrr 49U, // VPMOVUSDWrrk 50U, // VPMOVUSDWrrkz 0U, // VPMOVUSQBmr 81U, // VPMOVUSQBmrk 0U, // VPMOVUSQBrr 49U, // VPMOVUSQBrrk 50U, // VPMOVUSQBrrkz 0U, // VPMOVUSQDmr 81U, // VPMOVUSQDmrk 0U, // VPMOVUSQDrr 49U, // VPMOVUSQDrrk 50U, // VPMOVUSQDrrkz 0U, // VPMOVUSQWmr 81U, // VPMOVUSQWmrk 0U, // VPMOVUSQWrr 49U, // VPMOVUSQWrrk 50U, // VPMOVUSQWrrkz 0U, // VPMOVZXBDYrm 0U, // VPMOVZXBDYrr 0U, // VPMOVZXBDZrm 225U, // VPMOVZXBDZrmk 226U, // VPMOVZXBDZrmkz 0U, // VPMOVZXBDZrr 49U, // VPMOVZXBDZrrk 50U, // VPMOVZXBDZrrkz 0U, // VPMOVZXBDrm 0U, // VPMOVZXBDrr 0U, // VPMOVZXBQYrm 0U, // VPMOVZXBQYrr 0U, // VPMOVZXBQZrm 225U, // VPMOVZXBQZrmk 226U, // VPMOVZXBQZrmkz 0U, // VPMOVZXBQZrr 49U, // VPMOVZXBQZrrk 50U, // VPMOVZXBQZrrkz 0U, // VPMOVZXBQrm 0U, // VPMOVZXBQrr 0U, // VPMOVZXBWYrm 0U, // VPMOVZXBWYrr 0U, // VPMOVZXBWrm 0U, // VPMOVZXBWrr 0U, // VPMOVZXDQYrm 0U, // VPMOVZXDQYrr 0U, // VPMOVZXDQZrm 257U, // VPMOVZXDQZrmk 258U, // VPMOVZXDQZrmkz 0U, // VPMOVZXDQZrr 49U, // VPMOVZXDQZrrk 50U, // VPMOVZXDQZrrkz 0U, // VPMOVZXDQrm 0U, // VPMOVZXDQrr 0U, // VPMOVZXWDYrm 0U, // VPMOVZXWDYrr 0U, // VPMOVZXWDZrm 257U, // VPMOVZXWDZrmk 258U, // VPMOVZXWDZrmkz 0U, // VPMOVZXWDZrr 49U, // VPMOVZXWDZrrk 50U, // VPMOVZXWDZrrkz 0U, // VPMOVZXWDrm 0U, // VPMOVZXWDrr 0U, // VPMOVZXWQYrm 0U, // VPMOVZXWQYrr 0U, // VPMOVZXWQZrm 225U, // VPMOVZXWQZrmk 226U, // VPMOVZXWQZrmkz 0U, // VPMOVZXWQZrr 49U, // VPMOVZXWQZrrk 50U, // VPMOVZXWQZrrkz 0U, // VPMOVZXWQrm 0U, // VPMOVZXWQrr 256U, // VPMULDQYrm 48U, // VPMULDQYrr 240U, // VPMULDQZrm 4160U, // VPMULDQZrmb 2573361U, // VPMULDQZrmbk 2573362U, // VPMULDQZrmbkz 1459249U, // VPMULDQZrmk 1459250U, // VPMULDQZrmkz 48U, // VPMULDQZrr 1164337U, // VPMULDQZrrk 1164338U, // VPMULDQZrrkz 224U, // VPMULDQrm 48U, // VPMULDQrr 224U, // VPMULHRSWrm128 256U, // VPMULHRSWrm256 48U, // VPMULHRSWrr128 48U, // VPMULHRSWrr256 256U, // VPMULHUWYrm 48U, // VPMULHUWYrr 224U, // VPMULHUWrm 48U, // VPMULHUWrr 256U, // VPMULHWYrm 48U, // VPMULHWYrr 224U, // VPMULHWrm 48U, // VPMULHWrr 256U, // VPMULLDYrm 48U, // VPMULLDYrr 224U, // VPMULLDZ128rm 3104U, // VPMULLDZ128rmb 2000033U, // VPMULLDZ128rmbk 2016306U, // VPMULLDZ128rmbkz 328865U, // VPMULLDZ128rmk 1393714U, // VPMULLDZ128rmkz 48U, // VPMULLDZ128rr 1148065U, // VPMULLDZ128rrk 1164338U, // VPMULLDZ128rrkz 256U, // VPMULLDZ256rm 4128U, // VPMULLDZ256rmb 2524321U, // VPMULLDZ256rmbk 2540594U, // VPMULLDZ256rmbkz 361633U, // VPMULLDZ256rmk 1426482U, // VPMULLDZ256rmkz 48U, // VPMULLDZ256rr 1148065U, // VPMULLDZ256rrk 1164338U, // VPMULLDZ256rrkz 240U, // VPMULLDZrm 5152U, // VPMULLDZrmb 3048609U, // VPMULLDZrmbk 3064882U, // VPMULLDZrmbkz 394401U, // VPMULLDZrmk 1459250U, // VPMULLDZrmkz 48U, // VPMULLDZrr 1148065U, // VPMULLDZrrk 1164338U, // VPMULLDZrrkz 224U, // VPMULLDrm 48U, // VPMULLDrr 224U, // VPMULLQZ128rm 2112U, // VPMULLQZ128rmb 984225U, // VPMULLQZ128rmbk 1000498U, // VPMULLQZ128rmbkz 328865U, // VPMULLQZ128rmk 1393714U, // VPMULLQZ128rmkz 48U, // VPMULLQZ128rr 1148065U, // VPMULLQZ128rrk 1164338U, // VPMULLQZ128rrkz 256U, // VPMULLQZ256rm 3136U, // VPMULLQZ256rmb 2032801U, // VPMULLQZ256rmbk 2049074U, // VPMULLQZ256rmbkz 361633U, // VPMULLQZ256rmk 1426482U, // VPMULLQZ256rmkz 48U, // VPMULLQZ256rr 1148065U, // VPMULLQZ256rrk 1164338U, // VPMULLQZ256rrkz 240U, // VPMULLQZrm 4160U, // VPMULLQZrmb 2557089U, // VPMULLQZrmbk 2573362U, // VPMULLQZrmbkz 394401U, // VPMULLQZrmk 1459250U, // VPMULLQZrmkz 48U, // VPMULLQZrr 1148065U, // VPMULLQZrrk 1164338U, // VPMULLQZrrkz 256U, // VPMULLWYrm 48U, // VPMULLWYrr 224U, // VPMULLWZ128rm 328865U, // VPMULLWZ128rmk 1393714U, // VPMULLWZ128rmkz 48U, // VPMULLWZ128rr 1148065U, // VPMULLWZ128rrk 1164338U, // VPMULLWZ128rrkz 256U, // VPMULLWZ256rm 361633U, // VPMULLWZ256rmk 1426482U, // VPMULLWZ256rmkz 48U, // VPMULLWZ256rr 1148065U, // VPMULLWZ256rrk 1164338U, // VPMULLWZ256rrkz 240U, // VPMULLWZrm 394401U, // VPMULLWZrmk 1459250U, // VPMULLWZrmkz 48U, // VPMULLWZrr 1148065U, // VPMULLWZrrk 1164338U, // VPMULLWZrrkz 224U, // VPMULLWrm 48U, // VPMULLWrr 256U, // VPMULUDQYrm 48U, // VPMULUDQYrr 240U, // VPMULUDQZrm 4160U, // VPMULUDQZrmb 2573361U, // VPMULUDQZrmbk 2573362U, // VPMULUDQZrmbkz 1459249U, // VPMULUDQZrmk 1459250U, // VPMULUDQZrmkz 48U, // VPMULUDQZrr 1164337U, // VPMULUDQZrrk 1164338U, // VPMULUDQZrrkz 224U, // VPMULUDQrm 48U, // VPMULUDQrr 224U, // VPORDZ128rm 3104U, // VPORDZ128rmb 2000033U, // VPORDZ128rmbk 2016306U, // VPORDZ128rmbkz 328865U, // VPORDZ128rmk 1393714U, // VPORDZ128rmkz 48U, // VPORDZ128rr 1148065U, // VPORDZ128rrk 1164338U, // VPORDZ128rrkz 256U, // VPORDZ256rm 4128U, // VPORDZ256rmb 2524321U, // VPORDZ256rmbk 2540594U, // VPORDZ256rmbkz 361633U, // VPORDZ256rmk 1426482U, // VPORDZ256rmkz 48U, // VPORDZ256rr 1148065U, // VPORDZ256rrk 1164338U, // VPORDZ256rrkz 240U, // VPORDZrm 5152U, // VPORDZrmb 3048609U, // VPORDZrmbk 3064882U, // VPORDZrmbkz 394401U, // VPORDZrmk 1459250U, // VPORDZrmkz 48U, // VPORDZrr 1148065U, // VPORDZrrk 1164338U, // VPORDZrrkz 224U, // VPORQZ128rm 2112U, // VPORQZ128rmb 984225U, // VPORQZ128rmbk 1000498U, // VPORQZ128rmbkz 328865U, // VPORQZ128rmk 1393714U, // VPORQZ128rmkz 48U, // VPORQZ128rr 1148065U, // VPORQZ128rrk 1164338U, // VPORQZ128rrkz 256U, // VPORQZ256rm 3136U, // VPORQZ256rmb 2032801U, // VPORQZ256rmbk 2049074U, // VPORQZ256rmbkz 361633U, // VPORQZ256rmk 1426482U, // VPORQZ256rmkz 48U, // VPORQZ256rr 1148065U, // VPORQZ256rrk 1164338U, // VPORQZ256rrkz 240U, // VPORQZrm 4160U, // VPORQZrmb 2557089U, // VPORQZrmbk 2573362U, // VPORQZrmbkz 394401U, // VPORQZrmk 1459250U, // VPORQZrmkz 48U, // VPORQZrr 1148065U, // VPORQZrrk 1164338U, // VPORQZrrkz 256U, // VPORYrm 48U, // VPORYrr 224U, // VPORrm 48U, // VPORrr 1066208U, // VPPERMmr 1393712U, // VPPERMrm 1164336U, // VPPERMrr 80U, // VPROTBmi 80U, // VPROTBmr 48U, // VPROTBri 224U, // VPROTBrm 48U, // VPROTBrr 80U, // VPROTDmi 80U, // VPROTDmr 48U, // VPROTDri 224U, // VPROTDrm 48U, // VPROTDrr 80U, // VPROTQmi 80U, // VPROTQmr 48U, // VPROTQri 224U, // VPROTQrm 48U, // VPROTQrr 80U, // VPROTWmi 80U, // VPROTWmr 48U, // VPROTWri 224U, // VPROTWrm 48U, // VPROTWrr 256U, // VPSADBWYrm 48U, // VPSADBWYrr 224U, // VPSADBWrm 48U, // VPSADBWrr 0U, // VPSCATTERDDZmr 0U, // VPSCATTERDQZmr 0U, // VPSCATTERQDZmr 0U, // VPSCATTERQQZmr 80U, // VPSHABmr 224U, // VPSHABrm 48U, // VPSHABrr 80U, // VPSHADmr 224U, // VPSHADrm 48U, // VPSHADrr 80U, // VPSHAQmr 224U, // VPSHAQrm 48U, // VPSHAQrr 80U, // VPSHAWmr 224U, // VPSHAWrm 48U, // VPSHAWrr 80U, // VPSHLBmr 224U, // VPSHLBrm 48U, // VPSHLBrr 80U, // VPSHLDmr 224U, // VPSHLDrm 48U, // VPSHLDrr 80U, // VPSHLQmr 224U, // VPSHLQrm 48U, // VPSHLQrr 80U, // VPSHLWmr 224U, // VPSHLWrm 48U, // VPSHLWrr 256U, // VPSHUFBYrm 48U, // VPSHUFBYrr 224U, // VPSHUFBrm 48U, // VPSHUFBrr 0U, // VPSHUFDYmi 16U, // VPSHUFDYri 0U, // VPSHUFDZmi 16U, // VPSHUFDZri 0U, // VPSHUFDmi 16U, // VPSHUFDri 0U, // VPSHUFHWYmi 16U, // VPSHUFHWYri 0U, // VPSHUFHWmi 16U, // VPSHUFHWri 0U, // VPSHUFLWYmi 16U, // VPSHUFLWYri 0U, // VPSHUFLWmi 16U, // VPSHUFLWri 256U, // VPSIGNBYrm 48U, // VPSIGNBYrr 224U, // VPSIGNBrm 48U, // VPSIGNBrr 256U, // VPSIGNDYrm 48U, // VPSIGNDYrr 224U, // VPSIGNDrm 48U, // VPSIGNDrr 256U, // VPSIGNWYrm 48U, // VPSIGNWYrr 224U, // VPSIGNWrm 48U, // VPSIGNWrr 16U, // VPSLLDQYri 16U, // VPSLLDQri 16U, // VPSLLDYri 224U, // VPSLLDYrm 48U, // VPSLLDYrr 0U, // VPSLLDZmi 492985U, // VPSLLDZmik 247034U, // VPSLLDZmikz 16U, // VPSLLDZri 1193U, // VPSLLDZrik 1311802U, // VPSLLDZrikz 224U, // VPSLLDZrm 328873U, // VPSLLDZrmk 1393722U, // VPSLLDZrmkz 48U, // VPSLLDZrr 1148073U, // VPSLLDZrrk 1164346U, // VPSLLDZrrkz 16U, // VPSLLDri 224U, // VPSLLDrm 48U, // VPSLLDrr 16U, // VPSLLQYri 224U, // VPSLLQYrm 48U, // VPSLLQYrr 0U, // VPSLLQZmi 492985U, // VPSLLQZmik 247034U, // VPSLLQZmikz 16U, // VPSLLQZri 1193U, // VPSLLQZrik 1311802U, // VPSLLQZrikz 224U, // VPSLLQZrm 328873U, // VPSLLQZrmk 1393722U, // VPSLLQZrmkz 48U, // VPSLLQZrr 1148073U, // VPSLLQZrrk 1164346U, // VPSLLQZrrkz 16U, // VPSLLQri 224U, // VPSLLQrm 48U, // VPSLLQrr 256U, // VPSLLVDYrm 48U, // VPSLLVDYrr 240U, // VPSLLVDZrm 394409U, // VPSLLVDZrmk 1459258U, // VPSLLVDZrmkz 48U, // VPSLLVDZrr 1148073U, // VPSLLVDZrrk 1164346U, // VPSLLVDZrrkz 224U, // VPSLLVDrm 48U, // VPSLLVDrr 256U, // VPSLLVQYrm 48U, // VPSLLVQYrr 240U, // VPSLLVQZrm 394409U, // VPSLLVQZrmk 1459258U, // VPSLLVQZrmkz 48U, // VPSLLVQZrr 1148073U, // VPSLLVQZrrk 1164346U, // VPSLLVQZrrkz 224U, // VPSLLVQrm 48U, // VPSLLVQrr 16U, // VPSLLWYri 224U, // VPSLLWYrm 48U, // VPSLLWYrr 16U, // VPSLLWri 224U, // VPSLLWrm 48U, // VPSLLWrr 16U, // VPSRADYri 224U, // VPSRADYrm 48U, // VPSRADYrr 0U, // VPSRADZmi 492985U, // VPSRADZmik 247034U, // VPSRADZmikz 16U, // VPSRADZri 1193U, // VPSRADZrik 1311802U, // VPSRADZrikz 224U, // VPSRADZrm 328873U, // VPSRADZrmk 1393722U, // VPSRADZrmkz 48U, // VPSRADZrr 1148073U, // VPSRADZrrk 1164346U, // VPSRADZrrkz 16U, // VPSRADri 224U, // VPSRADrm 48U, // VPSRADrr 0U, // VPSRAQZmi 492985U, // VPSRAQZmik 247034U, // VPSRAQZmikz 16U, // VPSRAQZri 1193U, // VPSRAQZrik 1311802U, // VPSRAQZrikz 224U, // VPSRAQZrm 328873U, // VPSRAQZrmk 1393722U, // VPSRAQZrmkz 48U, // VPSRAQZrr 1148073U, // VPSRAQZrrk 1164346U, // VPSRAQZrrkz 256U, // VPSRAVDYrm 48U, // VPSRAVDYrr 240U, // VPSRAVDZrm 394409U, // VPSRAVDZrmk 1459258U, // VPSRAVDZrmkz 48U, // VPSRAVDZrr 1148073U, // VPSRAVDZrrk 1164346U, // VPSRAVDZrrkz 224U, // VPSRAVDrm 48U, // VPSRAVDrr 240U, // VPSRAVQZrm 394409U, // VPSRAVQZrmk 1459258U, // VPSRAVQZrmkz 48U, // VPSRAVQZrr 1148073U, // VPSRAVQZrrk 1164346U, // VPSRAVQZrrkz 16U, // VPSRAWYri 224U, // VPSRAWYrm 48U, // VPSRAWYrr 16U, // VPSRAWri 224U, // VPSRAWrm 48U, // VPSRAWrr 16U, // VPSRLDQYri 16U, // VPSRLDQri 16U, // VPSRLDYri 224U, // VPSRLDYrm 48U, // VPSRLDYrr 0U, // VPSRLDZmi 492985U, // VPSRLDZmik 247034U, // VPSRLDZmikz 16U, // VPSRLDZri 1193U, // VPSRLDZrik 1311802U, // VPSRLDZrikz 224U, // VPSRLDZrm 328873U, // VPSRLDZrmk 1393722U, // VPSRLDZrmkz 48U, // VPSRLDZrr 1148073U, // VPSRLDZrrk 1164346U, // VPSRLDZrrkz 16U, // VPSRLDri 224U, // VPSRLDrm 48U, // VPSRLDrr 16U, // VPSRLQYri 224U, // VPSRLQYrm 48U, // VPSRLQYrr 0U, // VPSRLQZmi 492985U, // VPSRLQZmik 247034U, // VPSRLQZmikz 16U, // VPSRLQZri 1193U, // VPSRLQZrik 1311802U, // VPSRLQZrikz 224U, // VPSRLQZrm 328873U, // VPSRLQZrmk 1393722U, // VPSRLQZrmkz 48U, // VPSRLQZrr 1148073U, // VPSRLQZrrk 1164346U, // VPSRLQZrrkz 16U, // VPSRLQri 224U, // VPSRLQrm 48U, // VPSRLQrr 256U, // VPSRLVDYrm 48U, // VPSRLVDYrr 240U, // VPSRLVDZrm 394409U, // VPSRLVDZrmk 1459258U, // VPSRLVDZrmkz 48U, // VPSRLVDZrr 1148073U, // VPSRLVDZrrk 1164346U, // VPSRLVDZrrkz 224U, // VPSRLVDrm 48U, // VPSRLVDrr 256U, // VPSRLVQYrm 48U, // VPSRLVQYrr 240U, // VPSRLVQZrm 394409U, // VPSRLVQZrmk 1459258U, // VPSRLVQZrmkz 48U, // VPSRLVQZrr 1148073U, // VPSRLVQZrrk 1164346U, // VPSRLVQZrrkz 224U, // VPSRLVQrm 48U, // VPSRLVQrr 16U, // VPSRLWYri 224U, // VPSRLWYrm 48U, // VPSRLWYrr 16U, // VPSRLWri 224U, // VPSRLWrm 48U, // VPSRLWrr 256U, // VPSUBBYrm 48U, // VPSUBBYrr 224U, // VPSUBBZ128rm 328865U, // VPSUBBZ128rmk 1393714U, // VPSUBBZ128rmkz 48U, // VPSUBBZ128rr 1148065U, // VPSUBBZ128rrk 1164338U, // VPSUBBZ128rrkz 256U, // VPSUBBZ256rm 361633U, // VPSUBBZ256rmk 1426482U, // VPSUBBZ256rmkz 48U, // VPSUBBZ256rr 1148065U, // VPSUBBZ256rrk 1164338U, // VPSUBBZ256rrkz 240U, // VPSUBBZrm 394401U, // VPSUBBZrmk 1459250U, // VPSUBBZrmkz 48U, // VPSUBBZrr 1148065U, // VPSUBBZrrk 1164338U, // VPSUBBZrrkz 224U, // VPSUBBrm 48U, // VPSUBBrr 256U, // VPSUBDYrm 48U, // VPSUBDYrr 224U, // VPSUBDZ128rm 3104U, // VPSUBDZ128rmb 2000033U, // VPSUBDZ128rmbk 2016306U, // VPSUBDZ128rmbkz 328865U, // VPSUBDZ128rmk 1393714U, // VPSUBDZ128rmkz 48U, // VPSUBDZ128rr 1148065U, // VPSUBDZ128rrk 1164338U, // VPSUBDZ128rrkz 256U, // VPSUBDZ256rm 4128U, // VPSUBDZ256rmb 2524321U, // VPSUBDZ256rmbk 2540594U, // VPSUBDZ256rmbkz 361633U, // VPSUBDZ256rmk 1426482U, // VPSUBDZ256rmkz 48U, // VPSUBDZ256rr 1148065U, // VPSUBDZ256rrk 1164338U, // VPSUBDZ256rrkz 240U, // VPSUBDZrm 5152U, // VPSUBDZrmb 3048609U, // VPSUBDZrmbk 3064882U, // VPSUBDZrmbkz 394401U, // VPSUBDZrmk 1459250U, // VPSUBDZrmkz 48U, // VPSUBDZrr 1148065U, // VPSUBDZrrk 1164338U, // VPSUBDZrrkz 224U, // VPSUBDrm 48U, // VPSUBDrr 256U, // VPSUBQYrm 48U, // VPSUBQYrr 224U, // VPSUBQZ128rm 2112U, // VPSUBQZ128rmb 984225U, // VPSUBQZ128rmbk 1000498U, // VPSUBQZ128rmbkz 328865U, // VPSUBQZ128rmk 1393714U, // VPSUBQZ128rmkz 48U, // VPSUBQZ128rr 1148065U, // VPSUBQZ128rrk 1164338U, // VPSUBQZ128rrkz 256U, // VPSUBQZ256rm 3136U, // VPSUBQZ256rmb 2032801U, // VPSUBQZ256rmbk 2049074U, // VPSUBQZ256rmbkz 361633U, // VPSUBQZ256rmk 1426482U, // VPSUBQZ256rmkz 48U, // VPSUBQZ256rr 1148065U, // VPSUBQZ256rrk 1164338U, // VPSUBQZ256rrkz 240U, // VPSUBQZrm 4160U, // VPSUBQZrmb 2557089U, // VPSUBQZrmbk 2573362U, // VPSUBQZrmbkz 394401U, // VPSUBQZrmk 1459250U, // VPSUBQZrmkz 48U, // VPSUBQZrr 1148065U, // VPSUBQZrrk 1164338U, // VPSUBQZrrkz 224U, // VPSUBQrm 48U, // VPSUBQrr 256U, // VPSUBSBYrm 48U, // VPSUBSBYrr 224U, // VPSUBSBrm 48U, // VPSUBSBrr 256U, // VPSUBSWYrm 48U, // VPSUBSWYrr 224U, // VPSUBSWrm 48U, // VPSUBSWrr 256U, // VPSUBUSBYrm 48U, // VPSUBUSBYrr 224U, // VPSUBUSBrm 48U, // VPSUBUSBrr 256U, // VPSUBUSWYrm 48U, // VPSUBUSWYrr 224U, // VPSUBUSWrm 48U, // VPSUBUSWrr 256U, // VPSUBWYrm 48U, // VPSUBWYrr 224U, // VPSUBWZ128rm 328865U, // VPSUBWZ128rmk 1393714U, // VPSUBWZ128rmkz 48U, // VPSUBWZ128rr 1148065U, // VPSUBWZ128rrk 1164338U, // VPSUBWZ128rrkz 256U, // VPSUBWZ256rm 361633U, // VPSUBWZ256rmk 1426482U, // VPSUBWZ256rmkz 48U, // VPSUBWZ256rr 1148065U, // VPSUBWZ256rrk 1164338U, // VPSUBWZ256rrkz 240U, // VPSUBWZrm 394401U, // VPSUBWZrmk 1459250U, // VPSUBWZrmkz 48U, // VPSUBWZrr 1148065U, // VPSUBWZrrk 1164338U, // VPSUBWZrrkz 224U, // VPSUBWrm 48U, // VPSUBWrr 208U, // VPTESTMDZrm 48U, // VPTESTMDZrr 208U, // VPTESTMQZrm 48U, // VPTESTMQZrr 208U, // VPTESTNMDZrm 48U, // VPTESTNMDZrr 208U, // VPTESTNMQZrm 48U, // VPTESTNMQZrr 0U, // VPTESTYrm 0U, // VPTESTYrr 0U, // VPTESTrm 0U, // VPTESTrr 256U, // VPUNPCKHBWYrm 48U, // VPUNPCKHBWYrr 224U, // VPUNPCKHBWrm 48U, // VPUNPCKHBWrr 256U, // VPUNPCKHDQYrm 48U, // VPUNPCKHDQYrr 240U, // VPUNPCKHDQZrm 48U, // VPUNPCKHDQZrr 224U, // VPUNPCKHDQrm 48U, // VPUNPCKHDQrr 256U, // VPUNPCKHQDQYrm 48U, // VPUNPCKHQDQYrr 240U, // VPUNPCKHQDQZrm 48U, // VPUNPCKHQDQZrr 224U, // VPUNPCKHQDQrm 48U, // VPUNPCKHQDQrr 256U, // VPUNPCKHWDYrm 48U, // VPUNPCKHWDYrr 224U, // VPUNPCKHWDrm 48U, // VPUNPCKHWDrr 256U, // VPUNPCKLBWYrm 48U, // VPUNPCKLBWYrr 224U, // VPUNPCKLBWrm 48U, // VPUNPCKLBWrr 256U, // VPUNPCKLDQYrm 48U, // VPUNPCKLDQYrr 240U, // VPUNPCKLDQZrm 48U, // VPUNPCKLDQZrr 224U, // VPUNPCKLDQrm 48U, // VPUNPCKLDQrr 256U, // VPUNPCKLQDQYrm 48U, // VPUNPCKLQDQYrr 240U, // VPUNPCKLQDQZrm 48U, // VPUNPCKLQDQZrr 224U, // VPUNPCKLQDQrm 48U, // VPUNPCKLQDQrr 256U, // VPUNPCKLWDYrm 48U, // VPUNPCKLWDYrr 224U, // VPUNPCKLWDrm 48U, // VPUNPCKLWDrr 224U, // VPXORDZ128rm 3104U, // VPXORDZ128rmb 2000033U, // VPXORDZ128rmbk 2016306U, // VPXORDZ128rmbkz 328865U, // VPXORDZ128rmk 1393714U, // VPXORDZ128rmkz 48U, // VPXORDZ128rr 1148065U, // VPXORDZ128rrk 1164338U, // VPXORDZ128rrkz 256U, // VPXORDZ256rm 4128U, // VPXORDZ256rmb 2524321U, // VPXORDZ256rmbk 2540594U, // VPXORDZ256rmbkz 361633U, // VPXORDZ256rmk 1426482U, // VPXORDZ256rmkz 48U, // VPXORDZ256rr 1148065U, // VPXORDZ256rrk 1164338U, // VPXORDZ256rrkz 240U, // VPXORDZrm 5152U, // VPXORDZrmb 3048609U, // VPXORDZrmbk 3064882U, // VPXORDZrmbkz 394401U, // VPXORDZrmk 1459250U, // VPXORDZrmkz 48U, // VPXORDZrr 1148065U, // VPXORDZrrk 1164338U, // VPXORDZrrkz 224U, // VPXORQZ128rm 2112U, // VPXORQZ128rmb 984225U, // VPXORQZ128rmbk 1000498U, // VPXORQZ128rmbkz 328865U, // VPXORQZ128rmk 1393714U, // VPXORQZ128rmkz 48U, // VPXORQZ128rr 1148065U, // VPXORQZ128rrk 1164338U, // VPXORQZ128rrkz 256U, // VPXORQZ256rm 3136U, // VPXORQZ256rmb 2032801U, // VPXORQZ256rmbk 2049074U, // VPXORQZ256rmbkz 361633U, // VPXORQZ256rmk 1426482U, // VPXORQZ256rmkz 48U, // VPXORQZ256rr 1148065U, // VPXORQZ256rrk 1164338U, // VPXORQZ256rrkz 240U, // VPXORQZrm 4160U, // VPXORQZrmb 2557089U, // VPXORQZrmbk 2573362U, // VPXORQZrmbkz 394401U, // VPXORQZrmk 1459250U, // VPXORQZrmkz 48U, // VPXORQZrr 1148065U, // VPXORQZrrk 1164338U, // VPXORQZrrkz 256U, // VPXORYrm 48U, // VPXORYrr 224U, // VPXORrm 48U, // VPXORrr 0U, // VRCP14PDZ128m 10U, // VRCP14PDZ128mb 2321U, // VRCP14PDZ128mbk 2178U, // VRCP14PDZ128mbkz 353U, // VRCP14PDZ128mk 194U, // VRCP14PDZ128mkz 0U, // VRCP14PDZ128r 161U, // VRCP14PDZ128rk 50U, // VRCP14PDZ128rkz 0U, // VRCP14PDZ256m 11U, // VRCP14PDZ256mb 3345U, // VRCP14PDZ256mbk 3202U, // VRCP14PDZ256mbkz 369U, // VRCP14PDZ256mk 178U, // VRCP14PDZ256mkz 0U, // VRCP14PDZ256r 161U, // VRCP14PDZ256rk 50U, // VRCP14PDZ256rkz 0U, // VRCP14PDZm 5U, // VRCP14PDZmb 4369U, // VRCP14PDZmbk 4226U, // VRCP14PDZmbkz 321U, // VRCP14PDZmk 210U, // VRCP14PDZmkz 0U, // VRCP14PDZr 161U, // VRCP14PDZrk 50U, // VRCP14PDZrkz 0U, // VRCP14PSZ128m 11U, // VRCP14PSZ128mb 3361U, // VRCP14PSZ128mbk 3218U, // VRCP14PSZ128mbkz 353U, // VRCP14PSZ128mk 194U, // VRCP14PSZ128mkz 0U, // VRCP14PSZ128r 161U, // VRCP14PSZ128rk 50U, // VRCP14PSZ128rkz 0U, // VRCP14PSZ256m 5U, // VRCP14PSZ256mb 4385U, // VRCP14PSZ256mbk 4242U, // VRCP14PSZ256mbkz 369U, // VRCP14PSZ256mk 178U, // VRCP14PSZ256mkz 0U, // VRCP14PSZ256r 161U, // VRCP14PSZ256rk 50U, // VRCP14PSZ256rkz 0U, // VRCP14PSZm 5U, // VRCP14PSZmb 5409U, // VRCP14PSZmbk 5266U, // VRCP14PSZmbkz 321U, // VRCP14PSZmk 210U, // VRCP14PSZmkz 0U, // VRCP14PSZr 161U, // VRCP14PSZrk 50U, // VRCP14PSZrkz 128U, // VRCP14SDrm 48U, // VRCP14SDrr 144U, // VRCP14SSrm 48U, // VRCP14SSrr 0U, // VRCP28PDm 0U, // VRCP28PDmb 321U, // VRCP28PDmbk 210U, // VRCP28PDmbkz 321U, // VRCP28PDmk 210U, // VRCP28PDmkz 0U, // VRCP28PDr 0U, // VRCP28PDrb 338U, // VRCP28PDrbk 339U, // VRCP28PDrbkz 161U, // VRCP28PDrk 50U, // VRCP28PDrkz 0U, // VRCP28PSm 0U, // VRCP28PSmb 321U, // VRCP28PSmbk 210U, // VRCP28PSmbkz 321U, // VRCP28PSmk 210U, // VRCP28PSmkz 0U, // VRCP28PSr 0U, // VRCP28PSrb 338U, // VRCP28PSrbk 339U, // VRCP28PSrbkz 161U, // VRCP28PSrk 50U, // VRCP28PSrkz 192U, // VRCP28SDm 1115297U, // VRCP28SDmk 1131570U, // VRCP28SDmkz 48U, // VRCP28SDr 340U, // VRCP28SDrb 318850U, // VRCP28SDrbk 319875U, // VRCP28SDrbkz 1148065U, // VRCP28SDrk 1164338U, // VRCP28SDrkz 192U, // VRCP28SSm 1115297U, // VRCP28SSmk 1131570U, // VRCP28SSmkz 48U, // VRCP28SSr 340U, // VRCP28SSrb 318850U, // VRCP28SSrbk 319875U, // VRCP28SSrbkz 1148065U, // VRCP28SSrk 1164338U, // VRCP28SSrkz 0U, // VRCPPSYm 0U, // VRCPPSYm_Int 0U, // VRCPPSYr 0U, // VRCPPSYr_Int 0U, // VRCPPSm 0U, // VRCPPSm_Int 0U, // VRCPPSr 0U, // VRCPPSr_Int 144U, // VRCPSSm 144U, // VRCPSSm_Int 48U, // VRCPSSr 0U, // VRNDSCALEPDZm 16U, // VRNDSCALEPDZr 0U, // VRNDSCALEPSZm 16U, // VRNDSCALEPSZr 246976U, // VRNDSCALESDm 58786977U, // VRNDSCALESDmk 42026034U, // VRNDSCALESDmkz 1311792U, // VRNDSCALESDr 13700U, // VRNDSCALESDrb 6282626U, // VRNDSCALESDrbk 6807939U, // VRNDSCALESDrbkz 25265313U, // VRNDSCALESDrk 33670194U, // VRNDSCALESDrkz 246976U, // VRNDSCALESSm 58786977U, // VRNDSCALESSmk 42026034U, // VRNDSCALESSmkz 1311792U, // VRNDSCALESSr 13700U, // VRNDSCALESSrb 6282626U, // VRNDSCALESSrbk 6807939U, // VRNDSCALESSrbkz 25265313U, // VRNDSCALESSrk 33670194U, // VRNDSCALESSrkz 0U, // VROUNDPDm 16U, // VROUNDPDr 0U, // VROUNDPSm 16U, // VROUNDPSr 246912U, // VROUNDSDm 1311792U, // VROUNDSDr 1311792U, // VROUNDSDr_Int 246928U, // VROUNDSSm 1311792U, // VROUNDSSr 1311792U, // VROUNDSSr_Int 0U, // VROUNDYPDm 16U, // VROUNDYPDr 0U, // VROUNDYPSm 16U, // VROUNDYPSr 0U, // VRSQRT14PDZ128m 10U, // VRSQRT14PDZ128mb 2321U, // VRSQRT14PDZ128mbk 2178U, // VRSQRT14PDZ128mbkz 353U, // VRSQRT14PDZ128mk 194U, // VRSQRT14PDZ128mkz 0U, // VRSQRT14PDZ128r 161U, // VRSQRT14PDZ128rk 50U, // VRSQRT14PDZ128rkz 0U, // VRSQRT14PDZ256m 11U, // VRSQRT14PDZ256mb 3345U, // VRSQRT14PDZ256mbk 3202U, // VRSQRT14PDZ256mbkz 369U, // VRSQRT14PDZ256mk 178U, // VRSQRT14PDZ256mkz 0U, // VRSQRT14PDZ256r 161U, // VRSQRT14PDZ256rk 50U, // VRSQRT14PDZ256rkz 0U, // VRSQRT14PDZm 5U, // VRSQRT14PDZmb 4369U, // VRSQRT14PDZmbk 4226U, // VRSQRT14PDZmbkz 321U, // VRSQRT14PDZmk 210U, // VRSQRT14PDZmkz 0U, // VRSQRT14PDZr 161U, // VRSQRT14PDZrk 50U, // VRSQRT14PDZrkz 0U, // VRSQRT14PSZ128m 11U, // VRSQRT14PSZ128mb 3361U, // VRSQRT14PSZ128mbk 3218U, // VRSQRT14PSZ128mbkz 353U, // VRSQRT14PSZ128mk 194U, // VRSQRT14PSZ128mkz 0U, // VRSQRT14PSZ128r 161U, // VRSQRT14PSZ128rk 50U, // VRSQRT14PSZ128rkz 0U, // VRSQRT14PSZ256m 5U, // VRSQRT14PSZ256mb 4385U, // VRSQRT14PSZ256mbk 4242U, // VRSQRT14PSZ256mbkz 369U, // VRSQRT14PSZ256mk 178U, // VRSQRT14PSZ256mkz 0U, // VRSQRT14PSZ256r 161U, // VRSQRT14PSZ256rk 50U, // VRSQRT14PSZ256rkz 0U, // VRSQRT14PSZm 5U, // VRSQRT14PSZmb 5409U, // VRSQRT14PSZmbk 5266U, // VRSQRT14PSZmbkz 321U, // VRSQRT14PSZmk 210U, // VRSQRT14PSZmkz 0U, // VRSQRT14PSZr 161U, // VRSQRT14PSZrk 50U, // VRSQRT14PSZrkz 128U, // VRSQRT14SDrm 48U, // VRSQRT14SDrr 144U, // VRSQRT14SSrm 48U, // VRSQRT14SSrr 0U, // VRSQRT28PDm 0U, // VRSQRT28PDmb 321U, // VRSQRT28PDmbk 210U, // VRSQRT28PDmbkz 321U, // VRSQRT28PDmk 210U, // VRSQRT28PDmkz 0U, // VRSQRT28PDr 0U, // VRSQRT28PDrb 338U, // VRSQRT28PDrbk 339U, // VRSQRT28PDrbkz 161U, // VRSQRT28PDrk 50U, // VRSQRT28PDrkz 0U, // VRSQRT28PSm 0U, // VRSQRT28PSmb 321U, // VRSQRT28PSmbk 210U, // VRSQRT28PSmbkz 321U, // VRSQRT28PSmk 210U, // VRSQRT28PSmkz 0U, // VRSQRT28PSr 0U, // VRSQRT28PSrb 338U, // VRSQRT28PSrbk 339U, // VRSQRT28PSrbkz 161U, // VRSQRT28PSrk 50U, // VRSQRT28PSrkz 192U, // VRSQRT28SDm 1115297U, // VRSQRT28SDmk 1131570U, // VRSQRT28SDmkz 48U, // VRSQRT28SDr 340U, // VRSQRT28SDrb 318850U, // VRSQRT28SDrbk 319875U, // VRSQRT28SDrbkz 1148065U, // VRSQRT28SDrk 1164338U, // VRSQRT28SDrkz 192U, // VRSQRT28SSm 1115297U, // VRSQRT28SSmk 1131570U, // VRSQRT28SSmkz 48U, // VRSQRT28SSr 340U, // VRSQRT28SSrb 318850U, // VRSQRT28SSrbk 319875U, // VRSQRT28SSrbkz 1148065U, // VRSQRT28SSrk 1164338U, // VRSQRT28SSrkz 0U, // VRSQRTPSYm 0U, // VRSQRTPSYm_Int 0U, // VRSQRTPSYr 0U, // VRSQRTPSYr_Int 0U, // VRSQRTPSm 0U, // VRSQRTPSm_Int 0U, // VRSQRTPSr 0U, // VRSQRTPSr_Int 144U, // VRSQRTSSm 144U, // VRSQRTSSm_Int 48U, // VRSQRTSSr 0U, // VSCATTERDPDZmr 0U, // VSCATTERDPSZmr 0U, // VSCATTERPF0DPDm 0U, // VSCATTERPF0DPSm 0U, // VSCATTERPF0QPDm 0U, // VSCATTERPF0QPSm 0U, // VSCATTERPF1DPDm 0U, // VSCATTERPF1DPSm 0U, // VSCATTERPF1QPDm 0U, // VSCATTERPF1QPSm 0U, // VSCATTERQPDZmr 0U, // VSCATTERQPSZmr 246960U, // VSHUFPDYrmi 1311792U, // VSHUFPDYrri 246992U, // VSHUFPDZrmi 1311792U, // VSHUFPDZrri 246976U, // VSHUFPDrmi 1311792U, // VSHUFPDrri 246960U, // VSHUFPSYrmi 1311792U, // VSHUFPSYrri 246992U, // VSHUFPSZrmi 1311792U, // VSHUFPSZrri 246976U, // VSHUFPSrmi 1311792U, // VSHUFPSrri 0U, // VSQRTPDYm 0U, // VSQRTPDYr 0U, // VSQRTPDZ128m 10U, // VSQRTPDZ128mb 2321U, // VSQRTPDZ128mbk 2178U, // VSQRTPDZ128mbkz 353U, // VSQRTPDZ128mk 194U, // VSQRTPDZ128mkz 0U, // VSQRTPDZ128r 161U, // VSQRTPDZ128rk 50U, // VSQRTPDZ128rkz 0U, // VSQRTPDZ256m 11U, // VSQRTPDZ256mb 3345U, // VSQRTPDZ256mbk 3202U, // VSQRTPDZ256mbkz 369U, // VSQRTPDZ256mk 178U, // VSQRTPDZ256mkz 0U, // VSQRTPDZ256r 161U, // VSQRTPDZ256rk 50U, // VSQRTPDZ256rkz 0U, // VSQRTPDZm 5U, // VSQRTPDZmb 4369U, // VSQRTPDZmbk 4226U, // VSQRTPDZmbkz 321U, // VSQRTPDZmk 210U, // VSQRTPDZmkz 0U, // VSQRTPDZr 161U, // VSQRTPDZrk 50U, // VSQRTPDZrkz 0U, // VSQRTPDm 0U, // VSQRTPDr 0U, // VSQRTPSYm 0U, // VSQRTPSYr 0U, // VSQRTPSZ128m 11U, // VSQRTPSZ128mb 3361U, // VSQRTPSZ128mbk 3218U, // VSQRTPSZ128mbkz 353U, // VSQRTPSZ128mk 194U, // VSQRTPSZ128mkz 0U, // VSQRTPSZ128r 161U, // VSQRTPSZ128rk 50U, // VSQRTPSZ128rkz 0U, // VSQRTPSZ256m 5U, // VSQRTPSZ256mb 4385U, // VSQRTPSZ256mbk 4242U, // VSQRTPSZ256mbkz 369U, // VSQRTPSZ256mk 178U, // VSQRTPSZ256mkz 0U, // VSQRTPSZ256r 161U, // VSQRTPSZ256rk 50U, // VSQRTPSZ256rkz 0U, // VSQRTPSZm 5U, // VSQRTPSZmb 5409U, // VSQRTPSZmbk 5266U, // VSQRTPSZmbkz 321U, // VSQRTPSZmk 210U, // VSQRTPSZmkz 0U, // VSQRTPSZr 161U, // VSQRTPSZrk 50U, // VSQRTPSZrkz 0U, // VSQRTPSm 0U, // VSQRTPSr 128U, // VSQRTSDZm 128U, // VSQRTSDZm_Int 48U, // VSQRTSDZr 48U, // VSQRTSDZr_Int 128U, // VSQRTSDm 128U, // VSQRTSDm_Int 48U, // VSQRTSDr 144U, // VSQRTSSZm 144U, // VSQRTSSZm_Int 48U, // VSQRTSSZr 48U, // VSQRTSSZr_Int 144U, // VSQRTSSm 144U, // VSQRTSSm_Int 48U, // VSQRTSSr 0U, // VSTMXCSR 176U, // VSUBPDYrm 48U, // VSUBPDYrr 192U, // VSUBPDZ128rm 2176U, // VSUBPDZ128rmb 558241U, // VSUBPDZ128rmbk 574514U, // VSUBPDZ128rmbkz 1115297U, // VSUBPDZ128rmk 1131570U, // VSUBPDZ128rmkz 48U, // VSUBPDZ128rr 1148065U, // VSUBPDZ128rrk 1164338U, // VSUBPDZ128rrkz 176U, // VSUBPDZ256rm 3200U, // VSUBPDZ256rmb 1606817U, // VSUBPDZ256rmbk 1623090U, // VSUBPDZ256rmbkz 132257U, // VSUBPDZ256rmk 1197106U, // VSUBPDZ256rmkz 48U, // VSUBPDZ256rr 1148065U, // VSUBPDZ256rrk 1164338U, // VSUBPDZ256rrkz 164912U, // VSUBPDZrb 8488097U, // VSUBPDZrbk 16892978U, // VSUBPDZrbkz 208U, // VSUBPDZrm 4224U, // VSUBPDZrmb 2131105U, // VSUBPDZrmbk 2147378U, // VSUBPDZrmbkz 181409U, // VSUBPDZrmk 197682U, // VSUBPDZrmkz 48U, // VSUBPDZrr 1148065U, // VSUBPDZrrk 1164338U, // VSUBPDZrrkz 192U, // VSUBPDrm 48U, // VSUBPDrr 176U, // VSUBPSYrm 48U, // VSUBPSYrr 192U, // VSUBPSZ128rm 3216U, // VSUBPSZ128rmb 1787041U, // VSUBPSZ128rmbk 1803314U, // VSUBPSZ128rmbkz 1115297U, // VSUBPSZ128rmk 1131570U, // VSUBPSZ128rmkz 48U, // VSUBPSZ128rr 1148065U, // VSUBPSZ128rrk 1164338U, // VSUBPSZ128rrkz 176U, // VSUBPSZ256rm 4240U, // VSUBPSZ256rmb 2311329U, // VSUBPSZ256rmbk 2327602U, // VSUBPSZ256rmbkz 132257U, // VSUBPSZ256rmk 1197106U, // VSUBPSZ256rmkz 48U, // VSUBPSZ256rr 1148065U, // VSUBPSZ256rrk 1164338U, // VSUBPSZ256rrkz 164912U, // VSUBPSZrb 8488097U, // VSUBPSZrbk 16892978U, // VSUBPSZrbkz 208U, // VSUBPSZrm 5264U, // VSUBPSZrmb 2835617U, // VSUBPSZrmbk 2851890U, // VSUBPSZrmbkz 181409U, // VSUBPSZrmk 197682U, // VSUBPSZrmkz 48U, // VSUBPSZrr 1148065U, // VSUBPSZrrk 1164338U, // VSUBPSZrrkz 192U, // VSUBPSrm 48U, // VSUBPSrr 128U, // VSUBSDZrm 192U, // VSUBSDZrm_Int 1115297U, // VSUBSDZrm_Intk 1131570U, // VSUBSDZrm_Intkz 48U, // VSUBSDZrr 48U, // VSUBSDZrr_Int 1148065U, // VSUBSDZrr_Intk 1164338U, // VSUBSDZrr_Intkz 164912U, // VSUBSDZrrb 8488097U, // VSUBSDZrrbk 16892978U, // VSUBSDZrrbkz 128U, // VSUBSDrm 128U, // VSUBSDrm_Int 48U, // VSUBSDrr 48U, // VSUBSDrr_Int 144U, // VSUBSSZrm 192U, // VSUBSSZrm_Int 1115297U, // VSUBSSZrm_Intk 1131570U, // VSUBSSZrm_Intkz 48U, // VSUBSSZrr 48U, // VSUBSSZrr_Int 1148065U, // VSUBSSZrr_Intk 1164338U, // VSUBSSZrr_Intkz 164912U, // VSUBSSZrrb 8488097U, // VSUBSSZrrbk 16892978U, // VSUBSSZrrbkz 144U, // VSUBSSrm 144U, // VSUBSSrm_Int 48U, // VSUBSSrr 48U, // VSUBSSrr_Int 0U, // VTESTPDYrm 0U, // VTESTPDYrr 0U, // VTESTPDrm 0U, // VTESTPDrr 0U, // VTESTPSYrm 0U, // VTESTPSYrr 0U, // VTESTPSrm 0U, // VTESTPSrr 0U, // VUCOMISDZrm 0U, // VUCOMISDZrr 0U, // VUCOMISDrm 0U, // VUCOMISDrr 0U, // VUCOMISSZrm 0U, // VUCOMISSZrr 0U, // VUCOMISSrm 0U, // VUCOMISSrr 176U, // VUNPCKHPDYrm 48U, // VUNPCKHPDYrr 208U, // VUNPCKHPDZrm 48U, // VUNPCKHPDZrr 192U, // VUNPCKHPDrm 48U, // VUNPCKHPDrr 176U, // VUNPCKHPSYrm 48U, // VUNPCKHPSYrr 208U, // VUNPCKHPSZrm 48U, // VUNPCKHPSZrr 192U, // VUNPCKHPSrm 48U, // VUNPCKHPSrr 176U, // VUNPCKLPDYrm 48U, // VUNPCKLPDYrr 208U, // VUNPCKLPDZrm 48U, // VUNPCKLPDZrr 192U, // VUNPCKLPDrm 48U, // VUNPCKLPDrr 176U, // VUNPCKLPSYrm 48U, // VUNPCKLPSYrr 208U, // VUNPCKLPSZrm 48U, // VUNPCKLPSZrr 192U, // VUNPCKLPSrm 48U, // VUNPCKLPSrr 176U, // VXORPDYrm 48U, // VXORPDYrr 192U, // VXORPDrm 48U, // VXORPDrr 176U, // VXORPSYrm 48U, // VXORPSYrr 192U, // VXORPSrm 48U, // VXORPSrr 0U, // VZEROALL 0U, // VZEROUPPER 0U, // V_SET0 0U, // V_SETALLONES 0U, // WAIT 0U, // WBINVD 0U, // WIN_ALLOCA 0U, // WIN_FTOL_32 0U, // WIN_FTOL_64 0U, // WRFSBASE 0U, // WRFSBASE64 0U, // WRGSBASE 0U, // WRGSBASE64 0U, // WRMSR 0U, // XABORT 0U, // XACQUIRE_PREFIX 0U, // XADD16rm 0U, // XADD16rr 0U, // XADD32rm 0U, // XADD32rr 0U, // XADD64rm 0U, // XADD64rr 0U, // XADD8rm 0U, // XADD8rr 0U, // XBEGIN 0U, // XBEGIN_2 0U, // XBEGIN_4 0U, // XCHG16ar 0U, // XCHG16rm 0U, // XCHG16rr 0U, // XCHG32ar 0U, // XCHG32ar64 0U, // XCHG32rm 0U, // XCHG32rr 0U, // XCHG64ar 0U, // XCHG64rm 0U, // XCHG64rr 0U, // XCHG8rm 0U, // XCHG8rr 0U, // XCH_F 0U, // XCRYPTCBC 0U, // XCRYPTCFB 0U, // XCRYPTCTR 0U, // XCRYPTECB 0U, // XCRYPTOFB 0U, // XEND 0U, // XGETBV 0U, // XLAT 0U, // XOR16i16 0U, // XOR16mi 0U, // XOR16mi8 0U, // XOR16mr 0U, // XOR16ri 0U, // XOR16ri8 0U, // XOR16rm 0U, // XOR16rr 0U, // XOR16rr_REV 0U, // XOR32i32 0U, // XOR32mi 0U, // XOR32mi8 0U, // XOR32mr 0U, // XOR32ri 0U, // XOR32ri8 0U, // XOR32rm 0U, // XOR32rr 0U, // XOR32rr_REV 0U, // XOR64i32 0U, // XOR64mi32 0U, // XOR64mi8 0U, // XOR64mr 0U, // XOR64ri32 0U, // XOR64ri8 0U, // XOR64rm 0U, // XOR64rr 0U, // XOR64rr_REV 0U, // XOR8i8 0U, // XOR8mi 0U, // XOR8mi8 0U, // XOR8mr 0U, // XOR8ri 0U, // XOR8ri8 0U, // XOR8rm 0U, // XOR8rr 0U, // XOR8rr_REV 0U, // XORPDrm 0U, // XORPDrr 0U, // XORPSrm 0U, // XORPSrr 0U, // XRELEASE_PREFIX 0U, // XRSTOR 0U, // XRSTOR64 0U, // XRSTORS 0U, // XRSTORS64 0U, // XSAVE 0U, // XSAVE64 0U, // XSAVEC 0U, // XSAVEC64 0U, // XSAVEOPT 0U, // XSAVEOPT64 0U, // XSAVES 0U, // XSAVES64 0U, // XSETBV 0U, // XSHA1 0U, // XSHA256 0U, // XSTORE 0U, // XTEST 0U, // fdisi8087_nop 0U, // feni8087_nop 0U }; #ifndef CAPSTONE_DIET static char AsmStrs[] = { /* 0 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 't', '0', 9, 0, /* 12 */ 's', 'h', 'a', '1', 'm', 's', 'g', '1', 9, 0, /* 22 */ 's', 'h', 'a', '2', '5', '6', 'm', 's', 'g', '1', 9, 0, /* 34 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 't', '1', 9, 0, /* 46 */ 'p', 'f', 'r', 'c', 'p', 'i', 't', '1', 9, 0, /* 56 */ 'p', 'f', 'r', 's', 'q', 'i', 't', '1', 9, 0, /* 66 */ 'v', 'm', 'o', 'v', 'd', 'q', 'a', '3', '2', 9, 0, /* 77 */ 'c', 'r', 'c', '3', '2', 9, 0, /* 84 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '3', '2', 9, 0, /* 95 */ 's', 'h', 'a', '1', 'm', 's', 'g', '2', 9, 0, /* 105 */ 's', 'h', 'a', '2', '5', '6', 'm', 's', 'g', '2', 9, 0, /* 117 */ 's', 'h', 'a', '2', '5', '6', 'r', 'n', 'd', 's', '2', 9, 0, /* 130 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 't', '2', 9, 0, /* 142 */ 'p', 'f', 'r', 'c', 'p', 'i', 't', '2', 9, 0, /* 152 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '6', '4', 'x', '2', 9, 0, /* 166 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '6', '4', 'x', '2', 9, 0, /* 180 */ 'v', 'm', 'o', 'v', 'd', 'q', 'a', '6', '4', 9, 0, /* 191 */ 'x', 's', 'a', 'v', 'e', 'c', '6', '4', 9, 0, /* 201 */ 'f', 'x', 's', 'a', 'v', 'e', '6', '4', 9, 0, /* 211 */ 'f', 'x', 'r', 's', 't', 'o', 'r', '6', '4', 9, 0, /* 222 */ 'x', 's', 'a', 'v', 'e', 's', '6', '4', 9, 0, /* 232 */ 'x', 'r', 's', 't', 'o', 'r', 's', '6', '4', 9, 0, /* 243 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', '6', '4', 9, 0, /* 255 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '6', '4', 9, 0, /* 266 */ 's', 'h', 'a', '1', 'r', 'n', 'd', 's', '4', 9, 0, /* 277 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'f', '3', '2', 'x', '4', 9, 0, /* 292 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '3', '2', 'x', '4', 9, 0, /* 306 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'i', '3', '2', 'x', '4', 9, 0, /* 321 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '3', '2', 'x', '4', 9, 0, /* 335 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'i', '3', '2', 'x', '4', 9, 0, /* 352 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'f', '6', '4', 'x', '4', 9, 0, /* 367 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '6', '4', 'x', '4', 9, 0, /* 381 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'i', '6', '4', 'x', '4', 9, 0, /* 396 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '6', '4', 'x', '4', 9, 0, /* 410 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'i', '6', '4', 'x', '4', 9, 0, /* 427 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '1', '6', 9, 0, /* 438 */ 'v', 'p', 'e', 'r', 'm', '2', 'f', '1', '2', '8', 9, 0, /* 450 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'f', '1', '2', '8', 9, 0, /* 464 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '1', '2', '8', 9, 0, /* 477 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'f', '1', '2', '8', 9, 0, /* 493 */ 'v', 'p', 'e', 'r', 'm', '2', 'i', '1', '2', '8', 9, 0, /* 505 */ 'v', 'e', 'x', 't', 'r', 'a', 'c', 't', 'i', '1', '2', '8', 9, 0, /* 519 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '1', '2', '8', 9, 0, /* 532 */ 'v', 'm', 'o', 'v', 'd', 'q', 'u', '8', 9, 0, /* 542 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'f', '3', '2', 'x', '8', 9, 0, /* 556 */ 'v', 'i', 'n', 's', 'e', 'r', 't', 'i', '3', '2', 'x', '8', 9, 0, /* 570 */ 'l', 'e', 'a', 9, 0, /* 575 */ 'j', 'a', 9, 0, /* 579 */ 'v', 'm', 'o', 'v', 'n', 't', 'd', 'q', 'a', 9, 0, /* 590 */ 'v', 'm', 'o', 'v', 'd', 'q', 'a', 9, 0, /* 599 */ 's', 'e', 't', 'a', 9, 0, /* 605 */ 'p', 'r', 'e', 'f', 'e', 't', 'c', 'h', 'n', 't', 'a', 9, 0, /* 618 */ 'c', 'm', 'o', 'v', 'a', 9, 0, /* 625 */ 'v', 'p', 'm', 'o', 'v', 'm', '2', 'b', 9, 0, /* 635 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '1', '6', 'b', 9, 0, /* 647 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '8', 'b', 9, 0, /* 658 */ 'v', 'p', 's', 'h', 'a', 'b', 9, 0, /* 666 */ 's', 'b', 'b', 9, 0, /* 671 */ 'v', 'p', 's', 'u', 'b', 'b', 9, 0, /* 679 */ 'v', 'p', 'a', 'd', 'd', 'b', 9, 0, /* 687 */ 'k', 'a', 'n', 'd', 'b', 9, 0, /* 694 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'd', 'b', 9, 0, /* 705 */ 'v', 'p', 'm', 'o', 'v', 's', 'd', 'b', 9, 0, /* 715 */ 'v', 'p', 'm', 'o', 'v', 'd', 'b', 9, 0, /* 724 */ 'v', 'p', 's', 'h', 'u', 'f', 'b', 9, 0, /* 733 */ 'v', 'p', 'a', 'v', 'g', 'b', 9, 0, /* 741 */ 'j', 'b', 9, 0, /* 745 */ 'v', 'p', 'm', 'o', 'v', 'm', 's', 'k', 'b', 9, 0, /* 756 */ 'v', 'p', 's', 'h', 'l', 'b', 9, 0, /* 764 */ 'k', 's', 'h', 'i', 'f', 't', 'l', 'b', 9, 0, /* 774 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'm', 'b', 9, 0, /* 785 */ 'v', 'p', 'c', 'o', 'm', 'b', 9, 0, /* 793 */ 'k', 'a', 'n', 'd', 'n', 'b', 9, 0, /* 801 */ 'v', 'p', 's', 'i', 'g', 'n', 'b', 9, 0, /* 810 */ 'v', 'p', 'c', 'm', 'p', 'b', 9, 0, /* 818 */ 'v', 'p', 'c', 'm', 'p', 'e', 'q', 'b', 9, 0, /* 828 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'q', 'b', 9, 0, /* 839 */ 'v', 'p', 'm', 'o', 'v', 's', 'q', 'b', 9, 0, /* 849 */ 'v', 'p', 'm', 'o', 'v', 'q', 'b', 9, 0, /* 858 */ 'k', 'o', 'r', 'b', 9, 0, /* 864 */ 'k', 'x', 'n', 'o', 'r', 'b', 9, 0, /* 872 */ 'k', 'x', 'o', 'r', 'b', 9, 0, /* 879 */ 'v', 'p', 'i', 'n', 's', 'r', 'b', 9, 0, /* 888 */ 'k', 's', 'h', 'i', 'f', 't', 'r', 'b', 9, 0, /* 898 */ 'v', 'p', 'e', 'x', 't', 'r', 'b', 9, 0, /* 907 */ 'v', 'p', 'a', 'b', 's', 'b', 9, 0, /* 915 */ 'v', 'p', 's', 'u', 'b', 's', 'b', 9, 0, /* 924 */ 'v', 'p', 'a', 'd', 'd', 's', 'b', 9, 0, /* 933 */ 'v', 'p', 'm', 'i', 'n', 's', 'b', 9, 0, /* 942 */ 's', 't', 'o', 's', 'b', 9, 0, /* 949 */ 'c', 'm', 'p', 's', 'b', 9, 0, /* 956 */ 'v', 'p', 's', 'u', 'b', 'u', 's', 'b', 9, 0, /* 966 */ 'v', 'p', 'a', 'd', 'd', 'u', 's', 'b', 9, 0, /* 976 */ 'p', 'a', 'v', 'g', 'u', 's', 'b', 9, 0, /* 985 */ 'm', 'o', 'v', 's', 'b', 9, 0, /* 992 */ 'v', 'p', 'm', 'a', 'x', 's', 'b', 9, 0, /* 1001 */ 's', 'e', 't', 'b', 9, 0, /* 1007 */ 'v', 'p', 'c', 'm', 'p', 'g', 't', 'b', 9, 0, /* 1017 */ 'k', 'n', 'o', 't', 'b', 9, 0, /* 1024 */ 'v', 'p', 'r', 'o', 't', 'b', 9, 0, /* 1032 */ 'v', 'p', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'b', 9, 0, /* 1046 */ 'k', 'o', 'r', 't', 'e', 's', 't', 'b', 9, 0, /* 1056 */ 'v', 'p', 'c', 'o', 'm', 'u', 'b', 9, 0, /* 1065 */ 'v', 'p', 'm', 'i', 'n', 'u', 'b', 9, 0, /* 1074 */ 'v', 'p', 'c', 'm', 'p', 'u', 'b', 9, 0, /* 1083 */ 'p', 'f', 's', 'u', 'b', 9, 0, /* 1090 */ 'f', 'i', 's', 'u', 'b', 9, 0, /* 1097 */ 'v', 'p', 'm', 'a', 'x', 'u', 'b', 9, 0, /* 1106 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'v', 'b', 9, 0, /* 1117 */ 'c', 'm', 'o', 'v', 'b', 9, 0, /* 1124 */ 'k', 'm', 'o', 'v', 'b', 9, 0, /* 1131 */ 'c', 'l', 'w', 'b', 9, 0, /* 1137 */ 'v', 'p', 'a', 'c', 'k', 's', 's', 'w', 'b', 9, 0, /* 1148 */ 'v', 'p', 'a', 'c', 'k', 'u', 's', 'w', 'b', 9, 0, /* 1159 */ 'p', 'f', 'a', 'c', 'c', 9, 0, /* 1166 */ 'p', 'f', 'n', 'a', 'c', 'c', 9, 0, /* 1174 */ 'p', 'f', 'p', 'n', 'a', 'c', 'c', 9, 0, /* 1183 */ 'a', 'd', 'c', 9, 0, /* 1188 */ 'v', 'a', 'e', 's', 'd', 'e', 'c', 9, 0, /* 1197 */ 'x', 's', 'a', 'v', 'e', 'c', 9, 0, /* 1205 */ 'b', 'l', 'c', 'i', 'c', 9, 0, /* 1212 */ 'b', 'l', 's', 'i', 'c', 9, 0, /* 1219 */ 't', '1', 'm', 's', 'k', 'c', 9, 0, /* 1227 */ 'v', 'a', 'e', 's', 'i', 'm', 'c', 9, 0, /* 1236 */ 'v', 'a', 'e', 's', 'e', 'n', 'c', 9, 0, /* 1245 */ 'i', 'n', 'c', 9, 0, /* 1250 */ 'b', 't', 'c', 9, 0, /* 1255 */ 'v', 'p', 'e', 'r', 'm', 'i', '2', 'd', 9, 0, /* 1265 */ 'v', 'p', 'm', 'o', 'v', 'm', '2', 'd', 9, 0, /* 1275 */ 'v', 'p', 'e', 'r', 'm', 't', '2', 'd', 9, 0, /* 1285 */ 'v', 'p', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 'm', 'w', '2', 'd', 9, 0, /* 1302 */ 'a', 'a', 'd', 9, 0, /* 1307 */ 'v', 'm', 'r', 'e', 'a', 'd', 9, 0, /* 1315 */ 'v', 'p', 's', 'h', 'a', 'd', 9, 0, /* 1323 */ 'v', 'p', 's', 'r', 'a', 'd', 9, 0, /* 1331 */ 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'd', 9, 0, /* 1341 */ 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'd', 9, 0, /* 1352 */ 'v', 'p', 'h', 's', 'u', 'b', 'd', 9, 0, /* 1361 */ 'v', 'p', 's', 'u', 'b', 'd', 9, 0, /* 1369 */ 'v', 'p', 'm', 'o', 'v', 's', 'x', 'b', 'd', 9, 0, /* 1380 */ 'v', 'p', 'm', 'o', 'v', 'z', 'x', 'b', 'd', 9, 0, /* 1391 */ 'p', 'f', 'a', 'd', 'd', 9, 0, /* 1398 */ 'f', 'i', 'a', 'd', 'd', 9, 0, /* 1405 */ 'x', 'a', 'd', 'd', 9, 0, /* 1411 */ 'v', 'p', 'h', 'a', 'd', 'd', 'd', 9, 0, /* 1420 */ 'v', 'p', 'a', 'd', 'd', 'd', 9, 0, /* 1428 */ 'k', 'a', 'n', 'd', 'd', 9, 0, /* 1435 */ 'v', 'p', 'a', 'n', 'd', 'd', 9, 0, /* 1443 */ 'v', 'p', 'e', 'x', 'p', 'a', 'n', 'd', 'd', 9, 0, /* 1454 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'd', 9, 0, /* 1464 */ 'v', 'p', 'g', 'a', 't', 'h', 'e', 'r', 'd', 'd', 9, 0, /* 1476 */ 'v', 'p', 's', 'c', 'a', 't', 't', 'e', 'r', 'd', 'd', 9, 0, /* 1489 */ 'v', 'p', 'm', 'a', 'c', 's', 'd', 'd', 9, 0, /* 1499 */ 'v', 'p', 'm', 'a', 'c', 's', 's', 'd', 'd', 9, 0, /* 1510 */ 'r', 'd', 's', 'e', 'e', 'd', 9, 0, /* 1518 */ 'p', 'i', '2', 'f', 'd', 9, 0, /* 1525 */ 'v', 'p', 's', 'h', 'u', 'f', 'd', 9, 0, /* 1534 */ 'p', 'f', '2', 'i', 'd', 9, 0, /* 1541 */ 'i', 'n', 'v', 'p', 'c', 'i', 'd', 9, 0, /* 1550 */ 'i', 'n', 'v', 'v', 'p', 'i', 'd', 9, 0, /* 1559 */ 'f', 'b', 'l', 'd', 9, 0, /* 1565 */ 'f', 'l', 'd', 9, 0, /* 1570 */ 'v', 'p', 's', 'h', 'l', 'd', 9, 0, /* 1578 */ 'f', 'i', 'l', 'd', 9, 0, /* 1584 */ 'v', 'p', 's', 'l', 'l', 'd', 9, 0, /* 1592 */ 'v', 'p', 'm', 'u', 'l', 'l', 'd', 9, 0, /* 1601 */ 'v', 'p', 's', 'r', 'l', 'd', 9, 0, /* 1609 */ 'v', 'm', 'p', 't', 'r', 'l', 'd', 9, 0, /* 1618 */ 'k', 's', 'h', 'i', 'f', 't', 'l', 'd', 9, 0, /* 1628 */ 'v', 'p', 'b', 'l', 'e', 'n', 'd', 'm', 'd', 9, 0, /* 1639 */ 'v', 'p', 't', 'e', 's', 't', 'n', 'm', 'd', 9, 0, /* 1650 */ 'v', 'p', 'c', 'o', 'm', 'd', 9, 0, /* 1658 */ 'v', 'p', 'e', 'r', 'm', 'd', 9, 0, /* 1666 */ 'v', 'p', 't', 'e', 's', 't', 'm', 'd', 9, 0, /* 1676 */ 'v', 'p', 'a', 'n', 'd', 9, 0, /* 1683 */ 'r', 'd', 'r', 'a', 'n', 'd', 9, 0, /* 1691 */ 'k', 'a', 'n', 'd', 'n', 'd', 9, 0, /* 1699 */ 'v', 'p', 'a', 'n', 'd', 'n', 'd', 9, 0, /* 1708 */ 'v', 'a', 'l', 'i', 'g', 'n', 'd', 9, 0, /* 1717 */ 'v', 'p', 's', 'i', 'g', 'n', 'd', 9, 0, /* 1726 */ 'b', 'o', 'u', 'n', 'd', 9, 0, /* 1733 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '2', '3', '1', 'p', 'd', 9, 0, /* 1749 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '3', '1', 'p', 'd', 9, 0, /* 1762 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '3', '1', 'p', 'd', 9, 0, /* 1776 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '2', '3', '1', 'p', 'd', 9, 0, /* 1792 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '3', '1', 'p', 'd', 9, 0, /* 1805 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '3', '1', 'p', 'd', 9, 0, /* 1819 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '1', '3', '2', 'p', 'd', 9, 0, /* 1835 */ 'v', 'f', 'm', 's', 'u', 'b', '1', '3', '2', 'p', 'd', 9, 0, /* 1848 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '1', '3', '2', 'p', 'd', 9, 0, /* 1862 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '1', '3', '2', 'p', 'd', 9, 0, /* 1878 */ 'v', 'f', 'm', 'a', 'd', 'd', '1', '3', '2', 'p', 'd', 9, 0, /* 1891 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '1', '3', '2', 'p', 'd', 9, 0, /* 1905 */ 'v', 'p', 'e', 'r', 'm', 'i', '2', 'p', 'd', 9, 0, /* 1916 */ 'c', 'v', 't', 'p', 'i', '2', 'p', 'd', 9, 0, /* 1926 */ 'v', 'p', 'e', 'r', 'm', 'i', 'l', '2', 'p', 'd', 9, 0, /* 1938 */ 'v', 'e', 'x', 'p', '2', 'p', 'd', 9, 0, /* 1947 */ 'v', 'c', 'v', 't', 'd', 'q', '2', 'p', 'd', 9, 0, /* 1958 */ 'v', 'c', 'v', 't', 'u', 'd', 'q', '2', 'p', 'd', 9, 0, /* 1970 */ 'v', 'c', 'v', 't', 'p', 's', '2', 'p', 'd', 9, 0, /* 1981 */ 'v', 'p', 'e', 'r', 'm', 't', '2', 'p', 'd', 9, 0, /* 1992 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '2', '1', '3', 'p', 'd', 9, 0, /* 2008 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '1', '3', 'p', 'd', 9, 0, /* 2021 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '1', '3', 'p', 'd', 9, 0, /* 2035 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '2', '1', '3', 'p', 'd', 9, 0, /* 2051 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '1', '3', 'p', 'd', 9, 0, /* 2064 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '1', '3', 'p', 'd', 9, 0, /* 2078 */ 'v', 'r', 'c', 'p', '1', '4', 'p', 'd', 9, 0, /* 2088 */ 'v', 'r', 's', 'q', 'r', 't', '1', '4', 'p', 'd', 9, 0, /* 2100 */ 'v', 'r', 'c', 'p', '2', '8', 'p', 'd', 9, 0, /* 2110 */ 'v', 'r', 's', 'q', 'r', 't', '2', '8', 'p', 'd', 9, 0, /* 2122 */ 'v', 'm', 'o', 'v', 'a', 'p', 'd', 9, 0, /* 2131 */ 'p', 's', 'w', 'a', 'p', 'd', 9, 0, /* 2139 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2152 */ 'v', 'a', 'd', 'd', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2163 */ 'v', 'h', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2172 */ 'v', 'f', 'm', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2182 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2193 */ 'v', 's', 'u', 'b', 'p', 'd', 9, 0, /* 2201 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2214 */ 'v', 'h', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2223 */ 'v', 'f', 'm', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2233 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2244 */ 'v', 'a', 'd', 'd', 'p', 'd', 9, 0, /* 2252 */ 'v', 'e', 'x', 'p', 'a', 'n', 'd', 'p', 'd', 9, 0, /* 2263 */ 'v', 'a', 'n', 'd', 'p', 'd', 9, 0, /* 2271 */ 'v', 'b', 'l', 'e', 'n', 'd', 'p', 'd', 9, 0, /* 2281 */ 'v', 'r', 'o', 'u', 'n', 'd', 'p', 'd', 9, 0, /* 2291 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'd', 'p', 'd', 9, 0, /* 2303 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'd', 'p', 'd', 9, 0, /* 2316 */ 'v', 'r', 'n', 'd', 's', 'c', 'a', 'l', 'e', 'p', 'd', 9, 0, /* 2329 */ 'v', 's', 'h', 'u', 'f', 'p', 'd', 9, 0, /* 2338 */ 'v', 'u', 'n', 'p', 'c', 'k', 'h', 'p', 'd', 9, 0, /* 2349 */ 'v', 'm', 'o', 'v', 'h', 'p', 'd', 9, 0, /* 2358 */ 'v', 'm', 'o', 'v', 'm', 's', 'k', 'p', 'd', 9, 0, /* 2369 */ 'v', 'p', 'e', 'r', 'm', 'i', 'l', 'p', 'd', 9, 0, /* 2380 */ 'v', 'u', 'n', 'p', 'c', 'k', 'l', 'p', 'd', 9, 0, /* 2391 */ 'v', 'm', 'u', 'l', 'p', 'd', 9, 0, /* 2399 */ 'v', 'm', 'o', 'v', 'l', 'p', 'd', 9, 0, /* 2408 */ 'v', 'p', 'c', 'm', 'p', 'd', 9, 0, /* 2416 */ 'v', 'b', 'l', 'e', 'n', 'd', 'm', 'p', 'd', 9, 0, /* 2427 */ 'v', 'p', 'e', 'r', 'm', 'p', 'd', 9, 0, /* 2436 */ 'v', 'a', 'n', 'd', 'n', 'p', 'd', 9, 0, /* 2445 */ 'v', 'm', 'i', 'n', 'p', 'd', 9, 0, /* 2453 */ 'v', 'd', 'p', 'p', 'd', 9, 0, /* 2460 */ 'v', 'c', 'm', 'p', 'p', 'd', 9, 0, /* 2468 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'q', 'p', 'd', 9, 0, /* 2480 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'q', 'p', 'd', 9, 0, /* 2493 */ 'v', 'o', 'r', 'p', 'd', 9, 0, /* 2500 */ 'v', 'x', 'o', 'r', 'p', 'd', 9, 0, /* 2508 */ 'v', 'c', 'o', 'm', 'p', 'r', 'e', 's', 's', 'p', 'd', 9, 0, /* 2521 */ 'v', 'm', 'o', 'v', 'n', 't', 'p', 'd', 9, 0, /* 2531 */ 'v', 's', 'q', 'r', 't', 'p', 'd', 9, 0, /* 2540 */ 'v', 't', 'e', 's', 't', 'p', 'd', 9, 0, /* 2549 */ 'v', 'm', 'o', 'v', 'u', 'p', 'd', 9, 0, /* 2558 */ 'v', 'b', 'l', 'e', 'n', 'd', 'v', 'p', 'd', 9, 0, /* 2569 */ 'v', 'd', 'i', 'v', 'p', 'd', 9, 0, /* 2577 */ 'v', 'm', 'a', 's', 'k', 'm', 'o', 'v', 'p', 'd', 9, 0, /* 2589 */ 'v', 'm', 'a', 'x', 'p', 'd', 9, 0, /* 2597 */ 'v', 'f', 'r', 'c', 'z', 'p', 'd', 9, 0, /* 2606 */ 'v', 'p', 'c', 'm', 'p', 'e', 'q', 'd', 9, 0, /* 2616 */ 'v', 'p', 'g', 'a', 't', 'h', 'e', 'r', 'q', 'd', 9, 0, /* 2628 */ 'v', 'p', 's', 'c', 'a', 't', 't', 'e', 'r', 'q', 'd', 9, 0, /* 2641 */ 'v', 'p', 'm', 'o', 'v', 'u', 's', 'q', 'd', 9, 0, /* 2652 */ 'v', 'p', 'm', 'o', 'v', 's', 'q', 'd', 9, 0, /* 2662 */ 'v', 'p', 'm', 'o', 'v', 'q', 'd', 9, 0, /* 2671 */ 's', 'h', 'r', 'd', 9, 0, /* 2677 */ 'k', 'o', 'r', 'd', 9, 0, /* 2683 */ 'k', 'x', 'n', 'o', 'r', 'd', 9, 0, /* 2691 */ 'v', 'p', 'o', 'r', 'd', 9, 0, /* 2698 */ 'k', 'x', 'o', 'r', 'd', 9, 0, /* 2705 */ 'v', 'p', 'x', 'o', 'r', 'd', 9, 0, /* 2713 */ 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4275 */ 'x', 'b', 'e', 'g', 'i', 'n', 9, 0, /* 4283 */ 'p', 'f', 'm', 'i', 'n', 9, 0, /* 4290 */ 'v', 'm', 'x', 'o', 'n', 9, 0, /* 4297 */ 'j', 'o', 9, 0, /* 4301 */ 'j', 'n', 'o', 9, 0, /* 4306 */ 's', 'e', 't', 'n', 'o', 9, 0, /* 4313 */ 'c', 'm', 'o', 'v', 'n', 'o', 9, 0, /* 4321 */ 's', 'e', 't', 'o', 9, 0, /* 4327 */ 'c', 'm', 'o', 'v', 'o', 9, 0, /* 4334 */ 'b', 's', 'w', 'a', 'p', 9, 0, /* 4341 */ 'f', 's', 'u', 'b', 'p', 9, 0, /* 4348 */ 'p', 'f', 'r', 'c', 'p', 9, 0, /* 4355 */ 'f', 'a', 'd', 'd', 'p', 9, 0, /* 4362 */ 'p', 'd', 'e', 'p', 9, 0, /* 4368 */ 'f', 'f', 'r', 'e', 'e', 'p', 9, 0, /* 4376 */ 'j', 'p', 9, 0, /* 4380 */ 'f', 'm', 'u', 'l', 'p', 9, 0, /* 4387 */ 'c', 'm', 'p', 9, 0, /* 4392 */ 'r', 'e', 'x', '6', '4', 32, 'j', 'm', 'p', 9, 0, /* 4403 */ 'l', 'j', 'm', 'p', 9, 0, /* 4409 */ 'f', 'c', 'o', 'm', 'p', 9, 0, /* 4416 */ 'f', 'i', 'c', 'o', 'm', 'p', 9, 0, /* 4424 */ 'f', 'u', 'c', 'o', 'm', 'p', 9, 0, /* 4432 */ 'j', 'n', 'p', 9, 0, /* 4437 */ 's', 'e', 't', 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5823 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '2', '3', '1', 'p', 's', 9, 0, /* 5839 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '3', '1', 'p', 's', 9, 0, /* 5852 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '3', '1', 'p', 's', 9, 0, /* 5866 */ 'v', 'f', 'm', 'a', 'd', 'd', 's', 'u', 'b', '1', '3', '2', 'p', 's', 9, 0, /* 5882 */ 'v', 'f', 'm', 's', 'u', 'b', '1', '3', '2', 'p', 's', 9, 0, /* 5895 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '1', '3', '2', 'p', 's', 9, 0, /* 5909 */ 'v', 'f', 'm', 's', 'u', 'b', 'a', 'd', 'd', '1', '3', '2', 'p', 's', 9, 0, /* 5925 */ 'v', 'f', 'm', 'a', 'd', 'd', '1', '3', '2', 'p', 's', 9, 0, /* 5938 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '1', '3', '2', 'p', 's', 9, 0, /* 5952 */ 'v', 'c', 'v', 't', 'p', 'd', '2', 'p', 's', 9, 0, /* 5963 */ 'v', 'c', 'v', 't', 'p', 'h', '2', 'p', 's', 9, 0, /* 5974 */ 'v', 'p', 'e', 'r', 'm', 'i', '2', 'p', 's', 9, 0, /* 5985 */ 'c', 'v', 't', 'p', 'i', '2', 'p', 's', 9, 0, /* 5995 */ 'v', 'p', 'e', 'r', 'm', 'i', 'l', '2', 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6709 */ 'x', 'r', 's', 't', 'o', 'r', 's', 9, 0, /* 6718 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '3', '1', 's', 's', 9, 0, /* 6731 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '3', '1', 's', 's', 9, 0, /* 6745 */ 'v', 'f', 'm', 'a', 'd', 'd', '2', '3', '1', 's', 's', 9, 0, /* 6758 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '2', '3', '1', 's', 's', 9, 0, /* 6772 */ 'v', 'f', 'm', 's', 'u', 'b', '1', '3', '2', 's', 's', 9, 0, /* 6785 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '1', '3', '2', 's', 's', 9, 0, /* 6799 */ 'v', 'f', 'm', 'a', 'd', 'd', '1', '3', '2', 's', 's', 9, 0, /* 6812 */ 'v', 'f', 'n', 'm', 'a', 'd', 'd', '1', '3', '2', 's', 's', 9, 0, /* 6826 */ 'v', 'c', 'v', 't', 's', 'd', '2', 's', 's', 9, 0, /* 6837 */ 'v', 'c', 'v', 't', 's', 'i', '2', 's', 's', 9, 0, /* 6848 */ 'v', 'c', 'v', 't', 'u', 's', 'i', '2', 's', 's', 9, 0, /* 6860 */ 'v', 'f', 'm', 's', 'u', 'b', '2', '1', '3', 's', 's', 9, 0, /* 6873 */ 'v', 'f', 'n', 'm', 's', 'u', 'b', '2', '1', '3', 's', 's', 9, 0, /* 6887 */ 'v', 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7066 */ 'v', 'm', 'i', 'n', 's', 's', 9, 0, /* 7074 */ 'v', 'r', 'c', 'p', 's', 's', 9, 0, /* 7082 */ 'v', 'c', 'm', 'p', 's', 's', 9, 0, /* 7090 */ 'm', 'o', 'v', 'n', 't', 's', 's', 9, 0, /* 7099 */ 'v', 'r', 's', 'q', 'r', 't', 's', 's', 9, 0, /* 7109 */ 'v', 's', 'q', 'r', 't', 's', 's', 9, 0, /* 7118 */ 'v', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', 's', 's', 9, 0, /* 7132 */ 'v', 'd', 'i', 'v', 's', 's', 9, 0, /* 7140 */ 'v', 'm', 'o', 'v', 's', 's', 9, 0, /* 7148 */ 'v', 'm', 'a', 'x', 's', 's', 9, 0, /* 7156 */ 'v', 'f', 'r', 'c', 'z', 's', 's', 9, 0, /* 7165 */ 'b', 't', 's', 9, 0, /* 7170 */ 's', 'e', 't', 's', 9, 0, /* 7176 */ 'c', 'm', 'o', 'v', 's', 9, 0, /* 7183 */ 'b', 't', 9, 0, /* 7187 */ 'l', 'g', 'd', 't', 9, 0, /* 7193 */ 's', 'g', 'd', 't', 9, 0, /* 7199 */ 'l', 'i', 'd', 't', 9, 0, /* 7205 */ 's', 'i', 'd', 't', 9, 0, /* 7211 */ 'l', 'l', 'd', 't', 9, 0, /* 7217 */ 's', 'l', 'd', 't', 9, 0, /* 7223 */ 'r', 'e', 't', 9, 0, /* 7228 */ 'p', 'f', 'c', 'm', 'p', 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'u', 's', 'h', 9, 'd', 's', 0, /* 10852 */ 'p', 'o', 'p', 9, 'd', 's', 0, /* 10859 */ 'p', 'u', 's', 'h', 9, 'e', 's', 0, /* 10867 */ 'p', 'o', 'p', 9, 'e', 's', 0, /* 10874 */ 'p', 'u', 's', 'h', 9, 'f', 's', 0, /* 10882 */ 'p', 'o', 'p', 9, 'f', 's', 0, /* 10889 */ 'p', 'u', 's', 'h', 9, 'g', 's', 0, /* 10897 */ 'p', 'o', 'p', 9, 'g', 's', 0, /* 10904 */ 's', 'w', 'a', 'p', 'g', 's', 0, /* 10911 */ 'f', 'c', 'h', 's', 0, /* 10916 */ '#', 32, 'v', 'a', 'r', 'i', 'a', 'b', 'l', 'e', 32, 's', 'i', 'z', 'e', 'd', 32, 'a', 'l', 'l', 'o', 'c', 'a', 32, 'f', 'o', 'r', 32, 's', 'e', 'g', 'm', 'e', 'n', 't', 'e', 'd', 32, 's', 't', 'a', 'c', 'k', 's', 0, /* 10961 */ 'e', 'n', 'c', 'l', 's', 0, /* 10967 */ 'f', 'e', 'm', 'm', 's', 0, /* 10973 */ 'f', 'c', 'o', 's', 0, /* 10978 */ 'f', 's', 'i', 'n', 'c', 'o', 's', 0, /* 10986 */ 'p', 'u', 's', 'h', 9, 's', 's', 0, /* 10994 */ 'p', 'o', 'p', 9, 's', 's', 0, /* 11001 */ 'c', 'l', 't', 's', 0, /* 11006 */ 'f', 'l', 'd', 'l', '2', 't', 0, /* 11013 */ 'f', 'x', 't', 'r', 'a', 'c', 't', 0, /* 11021 */ 'i', 'r', 'e', 't', 0, /* 11026 */ 's', 'y', 's', 'r', 'e', 't', 0, /* 11033 */ 'm', 'w', 'a', 'i', 't', 0, /* 11039 */ 'p', 'c', 'o', 'm', 'm', 'i', 't', 0, /* 11047 */ 'f', 'n', 'i', 'n', 'i', 't', 0, /* 11054 */ 's', 'y', 's', 'e', 'x', 'i', 't', 0, /* 11062 */ 'h', 'l', 't', 0, /* 11066 */ 'f', 'r', 'n', 'd', 'i', 'n', 't', 0, /* 11074 */ 'f', 's', 'q', 'r', 't', 0, /* 11080 */ 'x', 't', 'e', 's', 't', 0, /* 11086 */ 'f', 't', 's', 't', 0, /* 11091 */ 'e', 'n', 'c', 'l', 'u', 0, /* 11097 */ 'x', 'g', 'e', 't', 'b', 'v', 0, /* 11104 */ 'x', 's', 'e', 't', 'b', 'v', 0, /* 11111 */ 'p', 'u', 's', 'h', 'a', 'w', 0, /* 11118 */ 'p', 'o', 'p', 'a', 'w', 0, /* 11124 */ 'c', 'b', 'w', 0, /* 11128 */ 'r', 'e', 'p', 32, 's', 't', 'o', 's', 'w', 0, /* 11138 */ 'r', 'e', 'p', 32, 'm', 'o', 'v', 's', 'w', 0, /* 11148 */ 'f', 'y', 'l', '2', 'x', 0, /* 11154 */ 'f', 'n', 's', 't', 's', 'w', 9, 'a', 'x', 0, /* 11164 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'a', 'x', 0, /* 11175 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, 'e', 'a', 'x', 0, /* 11186 */ 'v', 'm', 's', 'a', 'v', 'e', 9, 'e', 'a', 'x', 0, /* 11197 */ 'v', 'm', 'r', 'u', 'n', 9, 'e', 'a', 'x', 0, /* 11207 */ 's', 'k', 'i', 'n', 'i', 't', 9, 'e', 'a', 'x', 0, /* 11218 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'e', 'a', 'x', 0, /* 11230 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, 'r', 'a', 'x', 0, /* 11241 */ 'v', 'm', 's', 'a', 'v', 'e', 9, 'r', 'a', 'x', 0, /* 11252 */ 'v', 'm', 'r', 'u', 'n', 9, 'r', 'a', 'x', 0, /* 11262 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, 'e', 'a', 'x', ',', 32, 'e', 'c', 'x', 0, /* 11279 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, 'r', 'a', 'x', ',', 32, 'e', 'c', 'x', 0, /* 11296 */ 'i', 'n', 9, 'a', 'l', ',', 32, 'd', 'x', 0, /* 11306 */ 'i', 'n', 9, 'a', 'x', ',', 32, 'd', 'x', 0, /* 11316 */ 'i', 'n', 9, 'e', 'a', 'x', ',', 32, 'd', 'x', 0, /* 11327 */ 'f', 'n', 'c', 'l', 'e', 'x', 0, /* 11334 */ 'f', 'l', 'd', 'z', 0, /* 11339 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'd', 'p', 'd', 9, '{', 0, /* 11355 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'd', 'p', 'd', 9, '{', 0, /* 11372 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'd', 'p', 'd', 9, '{', 0, /* 11388 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'd', 'p', 'd', 9, '{', 0, /* 11405 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'q', 'p', 'd', 9, '{', 0, /* 11421 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'q', 'p', 'd', 9, '{', 0, /* 11438 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'q', 'p', 'd', 9, '{', 0, /* 11454 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'q', 'p', 'd', 9, '{', 0, /* 11471 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'd', 'p', 's', 9, '{', 0, /* 11487 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'd', 'p', 's', 9, '{', 0, /* 11504 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'd', 'p', 's', 9, '{', 0, /* 11520 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'd', 'p', 's', 9, '{', 0, /* 11537 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '0', 'q', 'p', 's', 9, '{', 0, /* 11553 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '0', 'q', 'p', 's', 9, '{', 0, /* 11570 */ 'v', 'g', 'a', 't', 'h', 'e', 'r', 'p', 'f', '1', 'q', 'p', 's', 9, '{', 0, /* 11586 */ 'v', 's', 'c', 'a', 't', 't', 'e', 'r', 'p', 'f', '1', 'q', 'p', 's', 9, '{', 0, }; #endif // Emit the opcode for the instruction. unsigned int opcode = MCInst_getOpcode(MI); //printf(">> opcode = %u\n", opcode); uint64_t Bits1 = OpInfo[opcode]; uint64_t Bits2 = OpInfo2[opcode]; uint64_t Bits = (Bits2 << 32) | Bits1; // printf("Opcode ID = %u\n", opcode); // assert(Bits != 0 && "Cannot print this instruction."); if (!X86_lockrep(MI, O)) #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 16383)-1); #else ; #endif // Fragment 0 encoded into 6 bits for 51 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 14) & 63); switch ((Bits >> 14) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, AAA, AAS, ABS_F, ACQU... return; break; case 1: // AAD8i8, AAM8i8, ADC16i16, ADC16rr_REV, ADC32i32, ADC32rr_REV, ADC64i32... printOperand(MI, 0, O); break; case 2: // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, ADD_FI16m, AND... printi16mem(MI, 0, O); break; case 3: // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32... printOperand(MI, 1, O); break; case 4: // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, ADD_FI32m, AND... printi32mem(MI, 0, O); break; case 5: // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,... printi64mem(MI, 0, O); break; case 6: // ADC8mi, ADC8mi8, ADC8mr, ADD8mi, ADD8mi8, ADD8mr, AND8mi, AND8mi8, AND... printi8mem(MI, 0, O); break; case 7: // ADD_F32m, DIVR_F32m, DIV_F32m, EXTRACTPSmr, FBLDm, FBSTPm, FCOM32m, FC... printf32mem(MI, 0, O); break; case 8: // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MOVHPDmr, M... printf64mem(MI, 0, O); break; case 9: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JAE_1, JAE_2, ... printPCRelImm(MI, 0, O); return; break; case 10: // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm printSSECC(MI, 7, O); break; case 11: // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr printSSECC(MI, 3, O); break; case 12: // CMPSB printSrcIdx8(MI, 1, O); SStream_concat0(O, ", "); printDstIdx8(MI, 0, O); return; break; case 13: // CMPSL printSrcIdx32(MI, 1, O); SStream_concat0(O, ", "); printDstIdx32(MI, 0, O); return; break; case 14: // CMPSQ printSrcIdx64(MI, 1, O); SStream_concat0(O, ", "); printDstIdx64(MI, 0, O); return; break; case 15: // CMPSW printSrcIdx16(MI, 1, O); SStream_concat0(O, ", "); printDstIdx16(MI, 0, O); return; break; case 16: // CMPXCHG16B, LCMPXCHG16B, MOVDQAmr, MOVDQUmr, VEXTRACTI128mr, VEXTRACTI... printi128mem(MI, 0, O); break; case 17: // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR... printopaquemem(MI, 0, O); return; break; case 18: // INSB, MOVSB, SCASB, STOSB printDstIdx8(MI, 0, O); break; case 19: // INSL, MOVSL, SCASL, STOSL printDstIdx32(MI, 0, O); break; case 20: // INSW, MOVSW, SCASW, STOSW printDstIdx16(MI, 0, O); break; case 21: // Int_VCMPSDrm, Int_VCMPSSrm, VCMPPDYrmi, VCMPPDZrmi, VCMPPDrmi, VCMPPSY... printAVXCC(MI, 7, O); break; case 22: // Int_VCMPSDrr, Int_VCMPSSrr, VCMPPDYrri, VCMPPDZrri, VCMPPDZrrib, VCMPP... printAVXCC(MI, 3, O); break; case 23: // LD_F80m, ST_FP80m printf80mem(MI, 0, O); return; break; case 24: // LODSB, OUTSB printSrcIdx8(MI, 0, O); return; break; case 25: // LODSL, OUTSL printSrcIdx32(MI, 0, O); return; break; case 26: // LODSQ printSrcIdx64(MI, 0, O); return; break; case 27: // LODSW, OUTSW printSrcIdx16(MI, 0, O); return; break; case 28: // LXADD16, XCHG16rm printi16mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 29: // LXADD32, XCHG32rm printi32mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 30: // LXADD64, XCHG64rm printi64mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 31: // LXADD8, XCHG8rm printi8mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 32: // MOV16ao16, MOV16ao32, MOV16ao64, MOV16o16a, MOV16o32a, MOV16o64a printMemOffs16(MI, 0, O); break; case 33: // MOV32ao16, MOV32ao32, MOV32ao64, MOV32o16a, MOV32o32a, MOV32o64a printMemOffs32(MI, 0, O); break; case 34: // MOV64ao32, MOV64ao64, MOV64o32a, MOV64o64a printMemOffs64(MI, 0, O); break; case 35: // MOV8ao16, MOV8ao32, MOV8ao64, MOV8o16a, MOV8o32a, MOV8o64a printMemOffs8(MI, 0, O); break; case 36: // MOVAPDmr, MOVAPSmr, MOVNTDQmr, MOVNTPDmr, MOVNTPSmr, MOVUPDmr, MOVUPSm... printf128mem(MI, 0, O); break; case 37: // MOVSQ, SCASQ, STOSQ printDstIdx64(MI, 0, O); break; case 38: // TEST16rm printi16mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 39: // TEST32rm, VPSCATTERDDZmr, VSCATTERDPSZmr printi32mem(MI, 1, O); break; case 40: // TEST64rm, VPSCATTERDQZmr, VPSCATTERQDZmr, VPSCATTERQQZmr, VSCATTERDPDZ... printi64mem(MI, 1, O); break; case 41: // TEST8rm printi8mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 42: // VCOMPRESSPDZ256mrk, VCOMPRESSPSZ256mrk, VCVTPS2PHZmr, VEXTRACTF64x4rm,... printf256mem(MI, 0, O); break; case 43: // VCOMPRESSPDZmrk, VCOMPRESSPSZmrk, VMOVAPDZmr, VMOVAPDZmrk, VMOVAPSZmr,... printf512mem(MI, 0, O); break; case 44: // VEXTRACTI64x4rm, VMOVDQA32Z256mr, VMOVDQA32Z256mrk, VMOVDQA64Z256mr, V... printi256mem(MI, 0, O); break; case 45: // VMOVDQA32Zmr, VMOVDQA32Zmrk, VMOVDQA64Zmr, VMOVDQA64Zmrk, VMOVDQU16Zmr... printi512mem(MI, 0, O); break; case 46: // VPCMPBZ128rmik, VPCMPBZ256rmik, VPCMPBZrmik, VPCMPDZ128rmibk, VPCMPDZ1... printAVXCC(MI, 8, O); break; case 47: // VPCMPBZ128rrik, VPCMPBZ256rrik, VPCMPBZrrik, VPCMPDZ128rrik, VPCMPDZ25... printAVXCC(MI, 4, O); break; case 48: // VPCOMBmi, VPCOMDmi, VPCOMQmi, VPCOMUBmi, VPCOMUDmi, VPCOMUQmi, VPCOMUW... printXOPCC(MI, 7, O); break; case 49: // VPCOMBri, VPCOMDri, VPCOMQri, VPCOMUBri, VPCOMUDri, VPCOMUQri, VPCOMUW... printXOPCC(MI, 3, O); break; case 50: // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; } // Fragment 1 encoded into 5 bits for 29 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 20) & 31); switch ((Bits >> 20) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i... return; break; case 1: // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16... SStream_concat0(O, ", "); break; case 2: // ADD_FrST0, DIVR_FrST0, DIV_FrST0, MUL_FrST0, ST_FPNCEST0r, ST_FPST0r, ... SStream_concat0(O, ", st(0)"); op_addReg(MI, X86_REG_ST0); return; break; case 3: // CMPPDrmi, CMPPDrri, VCMPPDYrmi, VCMPPDYrri, VCMPPDZrmi, VCMPPDZrri, VC... SStream_concat0(O, "pd\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 4: // CMPPSrmi, CMPPSrri, VCMPPSYrmi, VCMPPSYrri, VCMPPSZrmi, VCMPPSZrri, VC... SStream_concat0(O, "ps\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 5: // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr, Int_VCMPSDrm, Int_VCMPSDrr... SStream_concat0(O, "sd\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 6: // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr, Int_VCMPSSrm, Int_VCMPSSrr... SStream_concat0(O, "ss\t"); printOperand(MI, 0, O); SStream_concat0(O, ", "); break; case 7: // FARCALL16i, FARCALL32i, FARJMP16i, FARJMP32i SStream_concat0(O, ":"); printOperand(MI, 0, O); return; break; case 8: // INSB, INSL, INSW SStream_concat0(O, ", dx"); op_addReg(MI, X86_REG_DX); return; break; case 9: // MOV16o16a, MOV16o32a, MOV16o64a, OUT16ir, STOSW SStream_concat0(O, ", ax"); op_addReg(MI, X86_REG_AX); return; break; case 10: // MOV32o16a, MOV32o32a, MOV32o64a, OUT32ir, STOSL SStream_concat0(O, ", eax"); op_addReg(MI, X86_REG_EAX); return; break; case 11: // MOV64o32a, MOV64o64a, STOSQ SStream_concat0(O, ", rax"); op_addReg(MI, X86_REG_RAX); return; break; case 12: // MOV8o16a, MOV8o32a, MOV8o64a, OUT8ir, STOSB SStream_concat0(O, ", al"); op_addReg(MI, X86_REG_AL); return; break; case 13: // RCL16m1, RCL16r1, RCL32m1, RCL32r1, RCL64m1, RCL64r1, RCL8m1, RCL8r1, ... SStream_concat0(O, ", 1"); op_addImm(MI, 1); return; break; case 14: // RCL16mCL, RCL16rCL, RCL32mCL, RCL32rCL, RCL64mCL, RCL64rCL, RCL8mCL, R... SStream_concat0(O, ", cl"); op_addReg(MI, X86_REG_CL); return; break; case 15: // VADDPDZ128rm, VADDPDZ128rmb, VADDPDZ128rr, VADDPDZ256rm, VADDPDZ256rmb... SStream_concat0(O, " , "); break; case 16: // VADDPDZ128rmbk, VADDPDZ128rmbkz, VADDPDZ128rmk, VADDPDZ128rmkz, VADDPD... SStream_concat0(O, " {"); break; case 17: // VBLENDMPDZ128rm, VBLENDMPDZ256rm, VBLENDMPDZrm, VBLENDMPSZ128rm, VBLEN... SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 18: // VEXP2PDrb, VEXP2PSrb, VMAXSDZrrb, VMAXSSZrrb, VMINSDZrrb, VMINSSZrrb, ... SStream_concat0(O, " {sae}, "); op_addAvxSae(MI); printOperand(MI, 1, O); break; case 19: // VGATHERPF0DPDm, VGATHERPF0DPSm, VGATHERPF0QPDm, VGATHERPF0QPSm, VGATHE... SStream_concat0(O, "}, "); break; case 20: // VPCMPBZ128rmi, VPCMPBZ128rmik, VPCMPBZ128rri, VPCMPBZ128rrik, VPCMPBZ2... SStream_concat0(O, "b\t"); printOperand(MI, 0, O); break; case 21: // VPCMPDZ128rmi, VPCMPDZ128rmib, VPCMPDZ128rmibk, VPCMPDZ128rmik, VPCMPD... SStream_concat0(O, "d\t"); printOperand(MI, 0, O); break; case 22: // VPCMPQZ128rmi, VPCMPQZ128rmib, VPCMPQZ128rmibk, VPCMPQZ128rmik, VPCMPQ... SStream_concat0(O, "q\t"); printOperand(MI, 0, O); break; case 23: // VPCMPUBZ128rmi, VPCMPUBZ128rmik, VPCMPUBZ128rri, VPCMPUBZ128rrik, VPCM... SStream_concat0(O, "ub\t"); printOperand(MI, 0, O); break; case 24: // VPCMPUDZ128rmi, VPCMPUDZ128rmib, VPCMPUDZ128rmibk, VPCMPUDZ128rmik, VP... SStream_concat0(O, "ud\t"); printOperand(MI, 0, O); break; case 25: // VPCMPUQZ128rmi, VPCMPUQZ128rmib, VPCMPUQZ128rmibk, VPCMPUQZ128rmik, VP... SStream_concat0(O, "uq\t"); printOperand(MI, 0, O); break; case 26: // VPCMPUWZ128rmi, VPCMPUWZ128rmik, VPCMPUWZ128rri, VPCMPUWZ128rrik, VPCM... SStream_concat0(O, "uw\t"); printOperand(MI, 0, O); break; case 27: // VPCMPWZ128rmi, VPCMPWZ128rmik, VPCMPWZ128rri, VPCMPWZ128rrik, VPCMPWZ2... SStream_concat0(O, "w\t"); printOperand(MI, 0, O); break; case 28: // VPSLLDZmi, VPSLLDZri, VPSLLDZrm, VPSLLDZrr, VPSLLQZmi, VPSLLQZri, VPSL... SStream_concat0(O, " , "); break; } // Fragment 2 encoded into 6 bits for 42 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 25) & 63); switch ((Bits >> 25) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC... printOperand(MI, 5, O); break; case 1: // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A... printOperand(MI, 2, O); break; case 2: // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r... printi16mem(MI, 2, O); break; case 3: // ADC32rm, ADCX32rm, ADD32rm, AND32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm,... printi32mem(MI, 2, O); break; case 4: // ADC64rm, ADCX64rm, ADD64rm, AND64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm,... printi64mem(MI, 2, O); break; case 5: // ADC8rm, ADD8rm, AND8rm, CRC32r32m8, CRC32r64m8, OR8rm, PINSRBrm, SBB8r... printi8mem(MI, 2, O); break; case 6: // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,... printf128mem(MI, 2, O); break; case 7: // ADDSDrm, ADDSDrm_Int, CMPSDrm, CMPSDrm_alt, DIVSDrm, DIVSDrm_Int, Int_... printf64mem(MI, 2, O); break; case 8: // ADDSSrm, ADDSSrm_Int, CMPSSrm, CMPSSrm_alt, DIVSSrm, DIVSSrm_Int, INSE... printf32mem(MI, 2, O); break; case 9: // ADOX32rm, BEXTR32rm, BEXTRI32mi, BLCFILL32rm, BLCI32rm, BLCIC32rm, BLC... printi32mem(MI, 1, O); break; case 10: // ADOX32rr, ADOX64rr, AESIMCrr, AESKEYGENASSIST128rr, ANDN32rm, ANDN32rr... printOperand(MI, 1, O); break; case 11: // ADOX64rm, BEXTR64rm, BEXTRI64mi, BLCFILL64rm, BLCI64rm, BLCIC64rm, BLC... printi64mem(MI, 1, O); break; case 12: // AESDECLASTrm, AESDECrm, AESENCLASTrm, AESENCrm, MPSADBWrmi, PACKSSDWrm... printi128mem(MI, 2, O); break; case 13: // AESIMCrm, AESKEYGENASSIST128rm, CVTDQ2PSrm, INVEPT32, INVEPT64, INVPCI... printi128mem(MI, 1, O); break; case 14: // BSF16rm, BSR16rm, CMP16rm, IMUL16rmi, IMUL16rmi8, KMOVWkm, LAR16rm, LA... printi16mem(MI, 1, O); break; case 15: // CMP8rm, KMOVBkm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32_NOREXrm8, M... printi8mem(MI, 1, O); break; case 16: // COMISDrm, COMISSrm, CVTPD2DQrm, CVTPD2PSrm, CVTPS2DQrm, CVTTPD2DQrm, C... printf128mem(MI, 1, O); break; case 17: // CVTPS2PDrm, CVTSD2SI64rm, CVTSD2SIrm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTS... printf64mem(MI, 1, O); break; case 18: // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_... printf32mem(MI, 1, O); break; case 19: // EXTRQI, MMX_PSLLDri, MMX_PSLLQri, MMX_PSLLWri, MMX_PSRADri, MMX_PSRAWr... printU8Imm(MI, 2, O); break; case 20: // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm... printopaquemem(MI, 1, O); return; break; case 21: // LEA16r, LEA32r, LEA64_32r, LEA64r printanymem(MI, 1, O); return; break; case 22: // MOVSB printSrcIdx8(MI, 1, O); return; break; case 23: // MOVSL printSrcIdx32(MI, 1, O); return; break; case 24: // MOVSQ printSrcIdx64(MI, 1, O); return; break; case 25: // MOVSW printSrcIdx16(MI, 1, O); return; break; case 26: // NOOP19rr, TEST32rm, TEST64rm printOperand(MI, 0, O); return; break; case 27: // VBLENDMPDZ256rm, VBLENDMPSZ256rm printf256mem(MI, 2, O); return; break; case 28: // VBLENDMPDZrm, VBLENDMPSZrm printf512mem(MI, 2, O); return; break; case 29: // VBROADCASTI64X4rm, VCVTDQ2PDZrm, VCVTDQ2PSYrm, VLDDQUYrm, VMOVDQA32Z25... printi256mem(MI, 1, O); break; case 30: // VCVTDQ2PSZrm, VMOVDQA32Zrm, VMOVDQA64Zrm, VMOVDQU16Zrm, VMOVDQU32Zrm, ... printi512mem(MI, 1, O); break; case 31: // VCVTPD2DQYrm, VCVTPD2PSYrm, VCVTPH2PSZrm, VCVTPS2DQYrm, VCVTPS2PDZrm, ... printf256mem(MI, 1, O); break; case 32: // VCVTPD2DQZrm, VCVTPD2PSZrm, VCVTPD2UDQZrm, VCVTPS2DQZrm, VCVTPS2UDQZrm... printf512mem(MI, 1, O); break; case 33: // VEXP2PDrb, VEXP2PSrb, VRCP28PDrb, VRCP28PSrb, VRSQRT28PDrb, VRSQRT28PS... return; break; case 34: // VGATHERDPDYrm, VGATHERDPDrm, VGATHERQPDYrm, VGATHERQPDrm, VPGATHERDQYr... printi64mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 8, O); return; break; case 35: // VGATHERDPDZrm, VGATHERDPSZrm, VGATHERQPDZrm, VGATHERQPSZrm, VPGATHERDD... printOperand(MI, 3, O); SStream_concat0(O, "}, "); break; case 36: // VGATHERDPSYrm, VGATHERDPSrm, VGATHERQPSYrm, VGATHERQPSrm, VPGATHERDDYr... printi32mem(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 8, O); return; break; case 37: // VMAXSDZrrb, VMAXSSZrrb, VMINSDZrrb, VMINSSZrrb, VPCMPBZ128rmi, VPCMPBZ... SStream_concat0(O, ", "); break; case 38: // VPBLENDMBZ256rm, VPBLENDMDZ256rm, VPBLENDMQZ256rm, VPBLENDMWZ256rm printi256mem(MI, 2, O); return; break; case 39: // VPBLENDMBZrm, VPBLENDMDZrm, VPBLENDMQZrm, VPBLENDMWZrm printi512mem(MI, 2, O); return; break; case 40: // VPCMPBZ128rmik, VPCMPBZ128rrik, VPCMPBZ256rmik, VPCMPBZ256rrik, VPCMPB... SStream_concat0(O, " {"); printOperand(MI, 1, O); SStream_concat0(O, "}, "); printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 41: // VPSCATTERDDZmr, VPSCATTERDQZmr, VPSCATTERQDZmr, VPSCATTERQQZmr, VSCATT... printOperand(MI, 6, O); SStream_concat0(O, "}, "); printOperand(MI, 7, O); return; break; } // Fragment 3 encoded into 5 bits for 23 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 31) & 31); switch ((Bits >> 31) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16... return; break; case 1: // AESKEYGENASSIST128rm, AESKEYGENASSIST128rr, ANDN32rm, ANDN32rr, ANDN64... SStream_concat0(O, ", "); break; case 2: // SHLD16mrCL, SHLD16rrCL, SHLD32mrCL, SHLD32rrCL, SHLD64mrCL, SHLD64rrCL... SStream_concat0(O, ", cl"); op_addReg(MI, X86_REG_CL); return; break; case 3: // VADDPDZ128rmbk, VADDPDZ128rmk, VADDPDZ128rrk, VADDPDZ256rmbk, VADDPDZ2... SStream_concat0(O, "}, "); break; case 4: // VADDPDZ128rmbkz, VADDPDZ128rmkz, VADDPDZ128rrkz, VADDPDZ256rmbkz, VADD... SStream_concat0(O, "} {z}, "); op_addAvxZeroOpmask(MI); break; case 5: // VEXP2PDrbk, VEXP2PSrbk, VMAXSDZrrbk, VMAXSSZrrbk, VMINSDZrrbk, VMINSSZ... SStream_concat0(O, "}{sae}, "); op_addAvxSae(MI); printOperand(MI, 3, O); break; case 6: // VEXP2PDrbkz, VEXP2PSrbkz, VMAXSDZrrbkz, VMAXSSZrrbkz, VMINSDZrrbkz, VM... SStream_concat0(O, "} {z}{sae}, "); op_addAvxSae(MI); op_addAvxZeroOpmask(MI); printOperand(MI, 2, O); break; case 7: // VGATHERDPDZrm, VGATHERQPDZrm, VGATHERQPSZrm, VPGATHERDQZrm, VPGATHERQD... printi64mem(MI, 4, O); return; break; case 8: // VGATHERDPSZrm, VPGATHERDDZrm printi32mem(MI, 4, O); return; break; case 9: // VMAXSDZrrb, VMAXSSZrrb, VMINSDZrrb, VMINSSZrrb, VRCP28SDrb, VRCP28SSrb... printOperand(MI, 2, O); break; case 10: // VPABSDZrmb, VPCONFLICTDrmb, VPLZCNTDrmb, VRCP14PSZmb, VRSQRT14PSZmb, V... SStream_concat0(O, "{1to16}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); return; break; case 11: // VPABSQZrmb, VPCONFLICTQrmb, VPLZCNTQrmb, VRCP14PDZmb, VRCP14PSZ256mb, ... SStream_concat0(O, "{1to8}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); return; break; case 12: // VPCMPBZ128rmi, VPCMPBZ128rri, VPCMPBZ256rmi, VPCMPBZ256rri, VPCMPBZrmi... printOperand(MI, 1, O); SStream_concat0(O, ", "); break; case 13: // VPCMPBZ128rmik, VPCMPDZ128rmik, VPCMPQZ128rmik, VPCMPUBZ128rmik, VPCMP... printi128mem(MI, 3, O); return; break; case 14: // VPCMPBZ128rrik, VPCMPBZ256rrik, VPCMPBZrrik, VPCMPDZ128rrik, VPCMPDZ25... printOperand(MI, 3, O); return; break; case 15: // VPCMPBZ256rmik, VPCMPDZ256rmik, VPCMPQZ256rmik, VPCMPUBZ256rmik, VPCMP... printi256mem(MI, 3, O); return; break; case 16: // VPCMPBZrmik, VPCMPDZrmik, VPCMPQZrmik, VPCMPUBZrmik, VPCMPUDZrmik, VPC... printi512mem(MI, 3, O); return; break; case 17: // VPCMPDZ128rmibk, VPCMPDZ256rmibk, VPCMPDZrmibk, VPCMPUDZ128rmibk, VPCM... printi32mem(MI, 3, O); break; case 18: // VPCMPQZ128rmibk, VPCMPQZ256rmibk, VPCMPQZrmibk, VPCMPUQZ128rmibk, VPCM... printi64mem(MI, 3, O); break; case 19: // VPSLLDZmik, VPSLLDZrik, VPSLLDZrmk, VPSLLDZrrk, VPSLLQZmik, VPSLLQZrik... SStream_concat0(O, "} , "); break; case 20: // VPSLLDZmikz, VPSLLDZrikz, VPSLLDZrmkz, VPSLLDZrrkz, VPSLLQZmikz, VPSLL... SStream_concat0(O, "} {z} , "); op_addAvxZeroOpmask(MI); break; case 21: // VRCP14PDZ128mb, VRSQRT14PDZ128mb, VSQRTPDZ128mb SStream_concat0(O, "{1to2}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); return; break; case 22: // VRCP14PDZ256mb, VRCP14PSZ128mb, VRSQRT14PDZ256mb, VRSQRT14PSZ128mb, VS... SStream_concat0(O, "{1to4}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); return; break; } // Fragment 4 encoded into 6 bits for 36 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 36) & 63); switch ((Bits >> 36) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // AESKEYGENASSIST128rm, EXTRACTPSmr, MMX_PSHUFWmi, PCMPESTRIrm, PCMPESTR... printU8Imm(MI, 6, O); return; break; case 1: // AESKEYGENASSIST128rr, EXTRACTPSrr, KSHIFTLBri, KSHIFTLDri, KSHIFTLQri,... printU8Imm(MI, 2, O); return; break; case 2: // ANDN32rm, Int_VCVTSI2SDZrm, Int_VCVTSI2SDrm, Int_VCVTSI2SSZrm, Int_VCV... printi32mem(MI, 2, O); break; case 3: // ANDN32rr, ANDN64rr, BEXTR32rr, BEXTR64rr, BEXTRI32ri, BEXTRI64ri, BZHI... printOperand(MI, 2, O); break; case 4: // ANDN64rm, Int_VCVTSI2SD64Zrm, Int_VCVTSI2SD64rm, Int_VCVTSI2SS64Zrm, I... printi64mem(MI, 2, O); break; case 5: // BEXTR32rm, BEXTR64rm, BEXTRI32mi, BEXTRI64mi, BZHI32rm, BZHI64rm, IMUL... printOperand(MI, 6, O); break; case 6: // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, CMPSDrm_alt, CMPSS... printU8Imm(MI, 7, O); return; break; case 7: // BLENDPDrri, BLENDPSrri, CMPPDrri_alt, CMPPSrri_alt, CMPSDrr_alt, CMPSS... printU8Imm(MI, 3, O); break; case 8: // Int_VCMPSDrm, Int_VCVTSD2SSrm, VADDPDZ128rmb, VADDPDZ256rmb, VADDPDZrm... printf64mem(MI, 2, O); break; case 9: // Int_VCMPSSrm, Int_VCVTSS2SDrm, VADDPSZ128rmb, VADDPSZ256rmb, VADDPSZrm... printf32mem(MI, 2, O); break; case 10: // SHLD16rri8, SHLD32rri8, SHLD64rri8, SHRD16rri8, SHRD32rri8, SHRD64rri8... printOperand(MI, 3, O); break; case 11: // VADDPDYrm, VADDPDZ256rm, VADDPSYrm, VADDPSZ256rm, VADDSUBPDYrm, VADDSU... printf256mem(MI, 2, O); break; case 12: // VADDPDZ128rm, VADDPDrm, VADDPSZ128rm, VADDPSrm, VADDSDZrm_Int, VADDSSZ... printf128mem(MI, 2, O); break; case 13: // VADDPDZrm, VADDPSZrm, VCMPPDZrmi, VCMPPDZrmi_alt, VCMPPSZrmi, VCMPPSZr... printf512mem(MI, 2, O); break; case 14: // VAESDECLASTrm, VAESDECrm, VAESENCLASTrm, VAESENCrm, VBROADCASTI32X4krm... printi128mem(MI, 2, O); break; case 15: // VALIGNDrmi, VALIGNQrmi, VMOVDQA32Zrmkz, VMOVDQA64Zrmkz, VMOVDQU16Zrmkz... printi512mem(MI, 2, O); break; case 16: // VBROADCASTI64X4krm, VDPPSYrmi, VINSERTI32x8rm, VINSERTI64x4rm, VMOVDQA... printi256mem(MI, 2, O); break; case 17: // VBROADCASTSDZ256mk, VBROADCASTSDZmk, VFMADD132PDZ128mb, VFMADD132PDZ25... printf64mem(MI, 3, O); break; case 18: // VBROADCASTSSZ128mk, VBROADCASTSSZ256mk, VBROADCASTSSZmk, VFMADD132PSZ1... printf32mem(MI, 3, O); break; case 19: // VCVTDQ2PSZrrb, VCVTPD2DQZrrb, VCVTPD2PSZrrb, VCVTPD2UDQZrrb, VCVTPS2DQ... printRoundingControl(MI, 2, O); return; break; case 20: // VEXP2PDmbk, VEXP2PDmk, VEXP2PSmbk, VEXP2PSmk, VEXPANDPDZrmk, VEXPANDPS... printf512mem(MI, 3, O); return; break; case 21: // VEXP2PDrbk, VEXP2PDrbkz, VEXP2PSrbk, VEXP2PSrbkz, VMAXSDZrrb, VMAXSSZr... return; break; case 22: // VEXPANDPDZ128rmk, VEXPANDPSZ128rmk, VFMADD132PDZ128m, VFMADD132PSZ128m... printf128mem(MI, 3, O); return; break; case 23: // VEXPANDPDZ256rmk, VEXPANDPSZ256rmk, VFMADD132PDZ256m, VFMADD132PSZ256m... printf256mem(MI, 3, O); return; break; case 24: // VMAXSDZrrbk, VMAXSDZrrbkz, VMAXSSZrrbk, VMAXSSZrrbkz, VMINSDZrrbk, VMI... SStream_concat0(O, ", "); break; case 25: // VMOVDQA32Z128rmk, VMOVDQA64Z128rmk, VMOVDQU16Z128rmk, VMOVDQU32Z128rmk... printi128mem(MI, 3, O); return; break; case 26: // VMOVDQA32Z256rmk, VMOVDQA64Z256rmk, VMOVDQU16Z256rmk, VMOVDQU32Z256rmk... printi256mem(MI, 3, O); return; break; case 27: // VMOVDQA32Zrmk, VMOVDQA64Zrmk, VMOVDQU16Zrmk, VMOVDQU32Zrmk, VMOVDQU64Z... printi512mem(MI, 3, O); break; case 28: // VPCMPDZ128rmibk, VPCMPQZ256rmibk, VPCMPUDZ128rmibk, VPCMPUQZ256rmibk SStream_concat0(O, "{1to4}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); return; break; case 29: // VPCMPDZ256rmibk, VPCMPQZrmibk, VPCMPUDZ256rmibk, VPCMPUQZrmibk SStream_concat0(O, "{1to8}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); return; break; case 30: // VPCMPDZrmibk, VPCMPUDZrmibk SStream_concat0(O, "{1to16}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); return; break; case 31: // VPCMPQZ128rmibk, VPCMPUQZ128rmibk SStream_concat0(O, "{1to2}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); return; break; case 32: // VPCONFLICTDrmbk, VPLZCNTDrmbk printi32mem(MI, 3, O); SStream_concat0(O, "{1to16}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); return; break; case 33: // VPCONFLICTQrmbk, VPLZCNTQrmbk printi64mem(MI, 3, O); SStream_concat0(O, "{1to8}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); return; break; case 34: // VPINSRBrm printi8mem(MI, 2, O); SStream_concat0(O, ", "); printU8Imm(MI, 7, O); return; break; case 35: // VPINSRWrmi printi16mem(MI, 2, O); SStream_concat0(O, ", "); printU8Imm(MI, 7, O); return; break; } // Fragment 5 encoded into 4 bits for 14 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 42) & 15); switch ((Bits >> 42) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, BEXTR32rm, BEXTR32rr, BEXTR64r... return; break; case 1: // INSERTQI, VAARG_64, VADDPDZ128rmbk, VADDPDZ128rmbkz, VADDPDZ128rmk, VA... SStream_concat0(O, ", "); break; case 2: // VADDPDZ128rmb, VBLENDMPDZ128rmb, VDIVPDZ128rmb, VFMADD132PDZ128mb, VFM... SStream_concat0(O, "{1to2}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); return; break; case 3: // VADDPDZ256rmb, VADDPSZ128rmb, VBLENDMPDZ256rmb, VBLENDMPSZ128rmb, VDIV... SStream_concat0(O, "{1to4}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); return; break; case 4: // VADDPDZrmb, VADDPSZ256rmb, VBLENDMPDZrmb, VBLENDMPSZ256rmb, VDIVPDZrmb... SStream_concat0(O, "{1to8}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); return; break; case 5: // VADDPSZrmb, VBLENDMPSZrmb, VDIVPSZrmb, VFMADD132PSZmb, VFMADDPSZv213rm... SStream_concat0(O, "{1to16}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); return; break; case 6: // VCMPPDZrrib, VCMPPSZrrib SStream_concat0(O, ", {sae}"); op_addAvxSae(MI); return; break; case 7: // VMAXSDZrrbk, VMAXSSZrrbk, VMINSDZrrbk, VMINSSZrrbk, VRCP28SDrbk, VRCP2... printOperand(MI, 4, O); break; case 8: // VMAXSDZrrbkz, VMAXSSZrrbkz, VMINSDZrrbkz, VMINSSZrrbkz, VRCP28SDrbkz, ... printOperand(MI, 3, O); break; case 9: // VPCMPDZ128rmib_alt, VPCMPQZ256rmib_alt, VPCMPUDZ128rmib_alt, VPCMPUQZ2... SStream_concat0(O, "{1to4}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); printU8Imm(MI, 7, O); return; break; case 10: // VPCMPDZ256rmib_alt, VPCMPQZrmib_alt, VPCMPUDZ256rmib_alt, VPCMPUQZrmib... SStream_concat0(O, "{1to8}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); printU8Imm(MI, 7, O); return; break; case 11: // VPCMPDZrmib_alt, VPCMPUDZrmib_alt SStream_concat0(O, "{1to16}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); printU8Imm(MI, 7, O); return; break; case 12: // VPCMPQZ128rmib_alt, VPCMPUQZ128rmib_alt SStream_concat0(O, "{1to2}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); printU8Imm(MI, 7, O); return; break; case 13: // VRNDSCALESDrb, VRNDSCALESSrb printU8Imm(MI, 3, O); return; break; } // Fragment 6 encoded into 5 bits for 32 unique commands. //printf("Frag-6: %"PRIu64"\n", (Bits >> 46) & 31); switch ((Bits >> 46) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // INSERTQI, VEXTRACTF32x4rrk, VEXTRACTF64x4rrk, VEXTRACTI32x4rrk, VEXTRA... printU8Imm(MI, 4, O); return; break; case 1: // VAARG_64, VBLENDVPDYrm, VBLENDVPDrm, VBLENDVPSYrm, VBLENDVPSrm, VFMADD... printOperand(MI, 7, O); break; case 2: // VADDPDZ128rmbk, VADDPDZ256rmbk, VADDPDZrmbk, VDIVPDZ128rmbk, VDIVPDZ25... printf64mem(MI, 4, O); break; case 3: // VADDPDZ128rmbkz, VADDPDZ256rmbkz, VADDPDZrmbkz, VBLENDMPDZ128rmbk, VBL... printf64mem(MI, 3, O); break; case 4: // VADDPDZ128rmk, VADDPSZ128rmk, VADDSDZrm_Intk, VADDSSZrm_Intk, VDIVPDZ1... printf128mem(MI, 4, O); break; case 5: // VADDPDZ128rmkz, VADDPSZ128rmkz, VADDSDZrm_Intkz, VADDSSZrm_Intkz, VBLE... printf128mem(MI, 3, O); break; case 6: // VADDPDZ128rrk, VADDPDZ256rrk, VADDPDZrbk, VADDPDZrrk, VADDPSZ128rrk, V... printOperand(MI, 4, O); break; case 7: // VADDPDZ128rrkz, VADDPDZ256rrkz, VADDPDZrbkz, VADDPDZrrkz, VADDPSZ128rr... printOperand(MI, 3, O); break; case 8: // VADDPDZ256rmk, VADDPSZ256rmk, VDIVPDZ256rmk, VDIVPSZ256rmk, VFMADDPDZ2... printf256mem(MI, 4, O); return; break; case 9: // VADDPDZ256rmkz, VADDPSZ256rmkz, VBLENDMPDZ256rmk, VBLENDMPDZ256rmkz, V... printf256mem(MI, 3, O); break; case 10: // VADDPDZrb, VADDPSZrb, VADDSDZrrb, VADDSSZrrb, VDIVPDZrb, VDIVPSZrb, VD... printRoundingControl(MI, 3, O); return; break; case 11: // VADDPDZrmk, VADDPSZrmk, VDIVPDZrmk, VDIVPSZrmk, VFMADDPDZv213rmk, VFMA... printf512mem(MI, 4, O); return; break; case 12: // VADDPDZrmkz, VADDPSZrmkz, VBLENDMPDZrmk, VBLENDMPDZrmkz, VBLENDMPSZrmk... printf512mem(MI, 3, O); return; break; case 13: // VADDPSZ128rmbk, VADDPSZ256rmbk, VADDPSZrmbk, VDIVPSZ128rmbk, VDIVPSZ25... printf32mem(MI, 4, O); break; case 14: // VADDPSZ128rmbkz, VADDPSZ256rmbkz, VADDPSZrmbkz, VBLENDMPSZ128rmbk, VBL... printf32mem(MI, 3, O); break; case 15: // VALIGNDrmi, VALIGNQrmi, VBLENDPDYrmi, VBLENDPDrmi, VBLENDPSYrmi, VBLEN... printU8Imm(MI, 7, O); return; break; case 16: // VALIGNDrri, VALIGNQrri, VBLENDPDYrri, VBLENDPDrri, VBLENDPSYrri, VBLEN... printU8Imm(MI, 3, O); break; case 17: // VCMPPDZrmi, VCMPPSZrmi printAVXCC(MI, 7, O); return; break; case 18: // VFMADDPDZv213rrb, VFMADDPSZv213rrb, VFMADDSUBPDZv213rrb, VFMADDSUBPSZv... printRoundingControl(MI, 4, O); return; break; case 19: // VMAXSDZrrbk, VMAXSDZrrbkz, VMAXSSZrrbk, VMAXSSZrrbkz, VMINSDZrrbk, VMI... return; break; case 20: // VPADDBZ128rmk, VPADDDZ128rmk, VPADDQZ128rmk, VPADDWZ128rmk, VPANDDZ128... printi128mem(MI, 4, O); return; break; case 21: // VPADDBZ128rmkz, VPADDDZ128rmkz, VPADDQZ128rmkz, VPADDWZ128rmkz, VPANDD... printi128mem(MI, 3, O); break; case 22: // VPADDBZ256rmk, VPADDDZ256rmk, VPADDQZ256rmk, VPADDWZ256rmk, VPANDDZ256... printi256mem(MI, 4, O); return; break; case 23: // VPADDBZ256rmkz, VPADDDZ256rmkz, VPADDQZ256rmkz, VPADDWZ256rmkz, VPANDD... printi256mem(MI, 3, O); break; case 24: // VPADDBZrmk, VPADDDZrmk, VPADDQZrmk, VPADDWZrmk, VPANDDZrmk, VPANDNDZrm... printi512mem(MI, 4, O); return; break; case 25: // VPADDBZrmkz, VPADDDZrmkz, VPADDQZrmkz, VPADDWZrmkz, VPANDDZrmkz, VPAND... printi512mem(MI, 3, O); break; case 26: // VPADDDZ128rmbk, VPADDDZ256rmbk, VPADDDZrmbk, VPANDDZ128rmbk, VPANDDZ25... printi32mem(MI, 4, O); break; case 27: // VPADDDZ128rmbkz, VPADDDZ256rmbkz, VPADDDZrmbkz, VPANDDZ128rmbkz, VPAND... printi32mem(MI, 3, O); break; case 28: // VPADDQZ128rmbk, VPADDQZ256rmbk, VPADDQZrmbk, VPANDNQZ128rmbk, VPANDNQZ... printi64mem(MI, 4, O); break; case 29: // VPADDQZ128rmbkz, VPADDQZ256rmbkz, VPADDQZrmbkz, VPANDNQZ128rmbkz, VPAN... printi64mem(MI, 3, O); break; case 30: // VPSLLDZmik, VPSLLQZmik, VPSRADZmik, VPSRAQZmik, VPSRLDZmik, VPSRLQZmik printU8Imm(MI, 8, O); return; break; case 31: // VRNDSCALESDrbk, VRNDSCALESDrbkz, VRNDSCALESSrbk, VRNDSCALESSrbkz SStream_concat0(O, ", "); break; } // Fragment 7 encoded into 4 bits for 13 unique commands. //printf("Frag-7: %"PRIu64"\n", (Bits >> 51) & 15); switch ((Bits >> 51) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // VAARG_64, VADDPDZrbk, VADDPDZrbkz, VADDPSZrbk, VADDPSZrbkz, VADDSDZrrb... SStream_concat0(O, ", "); break; case 1: // VADDPDZ128rmbk, VADDPDZ128rmbkz, VBLENDMPDZ128rmbk, VDIVPDZ128rmbk, VD... SStream_concat0(O, "{1to2}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); return; break; case 2: // VADDPDZ128rmk, VADDPDZ128rmkz, VADDPDZ128rrk, VADDPDZ128rrkz, VADDPDZ2... return; break; case 3: // VADDPDZ256rmbk, VADDPDZ256rmbkz, VADDPSZ128rmbk, VADDPSZ128rmbkz, VBLE... SStream_concat0(O, "{1to4}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); return; break; case 4: // VADDPDZrmbk, VADDPDZrmbkz, VADDPSZ256rmbk, VADDPSZ256rmbkz, VBLENDMPDZ... SStream_concat0(O, "{1to8}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); return; break; case 5: // VADDPSZrmbk, VADDPSZrmbkz, VBLENDMPSZrmbk, VDIVPSZrmbk, VDIVPSZrmbkz, ... SStream_concat0(O, "{1to16}"); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); return; break; case 6: // VCMPPDZrrib_alt, VCMPPSZrrib_alt SStream_concat0(O, ", {sae}"); op_addAvxSae(MI); return; break; case 7: // VPCMPDZ128rmibk_alt, VPCMPQZ256rmibk_alt, VPCMPUDZ128rmibk_alt, VPCMPU... SStream_concat0(O, "{1to4}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_4); printU8Imm(MI, 8, O); return; break; case 8: // VPCMPDZ256rmibk_alt, VPCMPQZrmibk_alt, VPCMPUDZ256rmibk_alt, VPCMPUQZr... SStream_concat0(O, "{1to8}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_8); printU8Imm(MI, 8, O); return; break; case 9: // VPCMPDZrmibk_alt, VPCMPUDZrmibk_alt SStream_concat0(O, "{1to16}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_16); printU8Imm(MI, 8, O); return; break; case 10: // VPCMPQZ128rmibk_alt, VPCMPUQZ128rmibk_alt SStream_concat0(O, "{1to2}, "); op_addAvxBroadcast(MI, X86_AVX_BCAST_2); printU8Imm(MI, 8, O); return; break; case 11: // VRNDSCALESDrbk, VRNDSCALESSrbk printU8Imm(MI, 5, O); return; break; case 12: // VRNDSCALESDrbkz, VRNDSCALESSrbkz printU8Imm(MI, 4, O); return; break; } // Fragment 8 encoded into 3 bits for 8 unique commands. //printf("Frag-8: %"PRIu64"\n", (Bits >> 55) & 7); switch ((Bits >> 55) & 7) { default: // llvm_unreachable("Invalid command number."); case 0: // VAARG_64, VPERMIL2PDmr, VPERMIL2PDmrY, VPERMIL2PDrm, VPERMIL2PDrmY, VP... printOperand(MI, 8, O); return; break; case 1: // VADDPDZrbk, VADDPSZrbk, VADDSDZrrbk, VADDSSZrrbk, VDIVPDZrbk, VDIVPSZr... printRoundingControl(MI, 5, O); return; break; case 2: // VADDPDZrbkz, VADDPSZrbkz, VADDSDZrrbkz, VADDSSZrrbkz, VDIVPDZrbkz, VDI... printRoundingControl(MI, 4, O); return; break; case 3: // VALIGNDrrik, VALIGNQrrik, VRNDSCALESDrk, VRNDSCALESSrk printU8Imm(MI, 5, O); return; break; case 4: // VALIGNDrrikz, VALIGNQrrikz, VPCMPBZ128rrik_alt, VPCMPBZ256rrik_alt, VP... printU8Imm(MI, 4, O); return; break; case 5: // VPCMPBZ128rmik_alt, VPCMPBZ256rmik_alt, VPCMPBZrmik_alt, VPCMPDZ128rmi... printU8Imm(MI, 8, O); return; break; case 6: // VPERMIL2PDrr, VPERMIL2PDrrY, VPERMIL2PSrr, VPERMIL2PSrrY printOperand(MI, 4, O); return; break; case 7: // VRNDSCALESDmk, VRNDSCALESSmk printU8Imm(MI, 9, O); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 242 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 's', 't', '(', '0', ')', 0, /* 6 */ 's', 't', '(', '1', ')', 0, /* 12 */ 's', 't', '(', '2', ')', 0, /* 18 */ 's', 't', '(', '3', ')', 0, /* 24 */ 's', 't', '(', '4', ')', 0, /* 30 */ 's', 't', '(', '5', ')', 0, /* 36 */ 's', 't', '(', '6', ')', 0, /* 42 */ 's', 't', '(', '7', ')', 0, /* 48 */ 'x', 'm', 'm', '1', '0', 0, /* 54 */ 'y', 'm', 'm', '1', '0', 0, /* 60 */ 'z', 'm', 'm', '1', '0', 0, /* 66 */ 'c', 'r', '1', '0', 0, /* 71 */ 'd', 'r', '1', '0', 0, /* 76 */ 'x', 'm', 'm', '2', '0', 0, /* 82 */ 'y', 'm', 'm', '2', '0', 0, /* 88 */ 'z', 'm', 'm', '2', '0', 0, /* 94 */ 'x', 'm', 'm', '3', '0', 0, /* 100 */ 'y', 'm', 'm', '3', '0', 0, /* 106 */ 'z', 'm', 'm', '3', '0', 0, /* 112 */ 'k', '0', 0, /* 115 */ 'x', 'm', 'm', '0', 0, /* 120 */ 'y', 'm', 'm', '0', 0, /* 125 */ 'z', 'm', 'm', '0', 0, /* 130 */ 'f', 'p', '0', 0, /* 134 */ 'c', 'r', '0', 0, /* 138 */ 'd', 'r', '0', 0, /* 142 */ 'x', 'm', 'm', '1', '1', 0, /* 148 */ 'y', 'm', 'm', '1', '1', 0, /* 154 */ 'z', 'm', 'm', '1', '1', 0, /* 160 */ 'c', 'r', '1', '1', 0, /* 165 */ 'd', 'r', '1', '1', 0, /* 170 */ 'x', 'm', 'm', '2', '1', 0, /* 176 */ 'y', 'm', 'm', '2', '1', 0, /* 182 */ 'z', 'm', 'm', '2', '1', 0, /* 188 */ 'x', 'm', 'm', '3', '1', 0, /* 194 */ 'y', 'm', 'm', '3', '1', 0, /* 200 */ 'z', 'm', 'm', '3', '1', 0, /* 206 */ 'k', '1', 0, /* 209 */ 'x', 'm', 'm', '1', 0, /* 214 */ 'y', 'm', 'm', '1', 0, /* 219 */ 'z', 'm', 'm', '1', 0, /* 224 */ 'f', 'p', '1', 0, /* 228 */ 'c', 'r', '1', 0, /* 232 */ 'd', 'r', '1', 0, /* 236 */ 'x', 'm', 'm', '1', '2', 0, /* 242 */ 'y', 'm', 'm', '1', '2', 0, /* 248 */ 'z', 'm', 'm', '1', '2', 0, /* 254 */ 'c', 'r', '1', '2', 0, /* 259 */ 'd', 'r', '1', '2', 0, /* 264 */ 'x', 'm', 'm', '2', '2', 0, /* 270 */ 'y', 'm', 'm', '2', '2', 0, /* 276 */ 'z', 'm', 'm', '2', '2', 0, /* 282 */ 'k', '2', 0, /* 285 */ 'x', 'm', 'm', '2', 0, /* 290 */ 'y', 'm', 'm', '2', 0, /* 295 */ 'z', 'm', 'm', '2', 0, /* 300 */ 'f', 'p', '2', 0, /* 304 */ 'c', 'r', '2', 0, /* 308 */ 'd', 'r', '2', 0, /* 312 */ 'x', 'm', 'm', '1', '3', 0, /* 318 */ 'y', 'm', 'm', '1', '3', 0, /* 324 */ 'z', 'm', 'm', '1', '3', 0, /* 330 */ 'c', 'r', '1', '3', 0, /* 335 */ 'd', 'r', '1', '3', 0, /* 340 */ 'x', 'm', 'm', '2', '3', 0, /* 346 */ 'y', 'm', 'm', '2', '3', 0, /* 352 */ 'z', 'm', 'm', '2', '3', 0, /* 358 */ 'k', '3', 0, /* 361 */ 'x', 'm', 'm', '3', 0, /* 366 */ 'y', 'm', 'm', '3', 0, /* 371 */ 'z', 'm', 'm', '3', 0, /* 376 */ 'f', 'p', '3', 0, /* 380 */ 'c', 'r', '3', 0, /* 384 */ 'd', 'r', '3', 0, /* 388 */ 'x', 'm', 'm', '1', '4', 0, /* 394 */ 'y', 'm', 'm', '1', '4', 0, /* 400 */ 'z', 'm', 'm', '1', '4', 0, /* 406 */ 'c', 'r', '1', '4', 0, /* 411 */ 'd', 'r', '1', '4', 0, /* 416 */ 'x', 'm', 'm', '2', '4', 0, /* 422 */ 'y', 'm', 'm', '2', '4', 0, /* 428 */ 'z', 'm', 'm', '2', '4', 0, /* 434 */ 'k', '4', 0, /* 437 */ 'x', 'm', 'm', '4', 0, /* 442 */ 'y', 'm', 'm', '4', 0, /* 447 */ 'z', 'm', 'm', '4', 0, /* 452 */ 'f', 'p', '4', 0, /* 456 */ 'c', 'r', '4', 0, /* 460 */ 'd', 'r', '4', 0, /* 464 */ 'x', 'm', 'm', '1', '5', 0, /* 470 */ 'y', 'm', 'm', '1', '5', 0, /* 476 */ 'z', 'm', 'm', '1', '5', 0, /* 482 */ 'c', 'r', '1', '5', 0, /* 487 */ 'd', 'r', '1', '5', 0, /* 492 */ 'x', 'm', 'm', '2', '5', 0, /* 498 */ 'y', 'm', 'm', '2', '5', 0, /* 504 */ 'z', 'm', 'm', '2', '5', 0, /* 510 */ 'k', '5', 0, /* 513 */ 'x', 'm', 'm', '5', 0, /* 518 */ 'y', 'm', 'm', '5', 0, /* 523 */ 'z', 'm', 'm', '5', 0, /* 528 */ 'f', 'p', '5', 0, /* 532 */ 'c', 'r', '5', 0, /* 536 */ 'd', 'r', '5', 0, /* 540 */ 'x', 'm', 'm', '1', '6', 0, /* 546 */ 'y', 'm', 'm', '1', '6', 0, /* 552 */ 'z', 'm', 'm', '1', '6', 0, /* 558 */ 'x', 'm', 'm', '2', '6', 0, /* 564 */ 'y', 'm', 'm', '2', '6', 0, /* 570 */ 'z', 'm', 'm', '2', '6', 0, /* 576 */ 'k', '6', 0, /* 579 */ 'x', 'm', 'm', '6', 0, /* 584 */ 'y', 'm', 'm', '6', 0, /* 589 */ 'z', 'm', 'm', '6', 0, /* 594 */ 'f', 'p', '6', 0, /* 598 */ 'c', 'r', '6', 0, /* 602 */ 'd', 'r', '6', 0, /* 606 */ 'x', 'm', 'm', '1', '7', 0, /* 612 */ 'y', 'm', 'm', '1', '7', 0, /* 618 */ 'z', 'm', 'm', '1', '7', 0, /* 624 */ 'x', 'm', 'm', '2', '7', 0, /* 630 */ 'y', 'm', 'm', '2', '7', 0, /* 636 */ 'z', 'm', 'm', '2', '7', 0, /* 642 */ 'k', '7', 0, /* 645 */ 'x', 'm', 'm', '7', 0, /* 650 */ 'y', 'm', 'm', '7', 0, /* 655 */ 'z', 'm', 'm', '7', 0, /* 660 */ 'f', 'p', '7', 0, /* 664 */ 'c', 'r', '7', 0, /* 668 */ 'd', 'r', '7', 0, /* 672 */ 'x', 'm', 'm', '1', '8', 0, /* 678 */ 'y', 'm', 'm', '1', '8', 0, /* 684 */ 'z', 'm', 'm', '1', '8', 0, /* 690 */ 'x', 'm', 'm', '2', '8', 0, /* 696 */ 'y', 'm', 'm', '2', '8', 0, /* 702 */ 'z', 'm', 'm', '2', '8', 0, /* 708 */ 'x', 'm', 'm', '8', 0, /* 713 */ 'y', 'm', 'm', '8', 0, /* 718 */ 'z', 'm', 'm', '8', 0, /* 723 */ 'c', 'r', '8', 0, /* 727 */ 'd', 'r', '8', 0, /* 731 */ 'x', 'm', 'm', '1', '9', 0, /* 737 */ 'y', 'm', 'm', '1', '9', 0, /* 743 */ 'z', 'm', 'm', '1', '9', 0, /* 749 */ 'x', 'm', 'm', '2', '9', 0, /* 755 */ 'y', 'm', 'm', '2', '9', 0, /* 761 */ 'z', 'm', 'm', '2', '9', 0, /* 767 */ 'x', 'm', 'm', '9', 0, /* 772 */ 'y', 'm', 'm', '9', 0, /* 777 */ 'z', 'm', 'm', '9', 0, /* 782 */ 'c', 'r', '9', 0, /* 786 */ 'd', 'r', '9', 0, /* 790 */ 'r', '1', '0', 'b', 0, /* 795 */ 'r', '1', '1', 'b', 0, /* 800 */ 'r', '1', '2', 'b', 0, /* 805 */ 'r', '1', '3', 'b', 0, /* 810 */ 'r', '1', '4', 'b', 0, /* 815 */ 'r', '1', '5', 'b', 0, /* 820 */ 'r', '8', 'b', 0, /* 824 */ 'r', '9', 'b', 0, /* 828 */ 'r', '1', '0', 'd', 0, /* 833 */ 'r', '1', '1', 'd', 0, /* 838 */ 'r', '1', '2', 'd', 0, /* 843 */ 'r', '1', '3', 'd', 0, /* 848 */ 'r', '1', '4', 'd', 0, /* 853 */ 'r', '1', '5', 'd', 0, /* 858 */ 'r', '8', 'd', 0, /* 862 */ 'r', '9', 'd', 0, /* 866 */ 'a', 'h', 0, /* 869 */ 'b', 'h', 0, /* 872 */ 'c', 'h', 0, /* 875 */ 'd', 'h', 0, /* 878 */ 'e', 'd', 'i', 0, /* 882 */ 'r', 'd', 'i', 0, /* 886 */ 'e', 's', 'i', 0, /* 890 */ 'r', 's', 'i', 0, /* 894 */ 'a', 'l', 0, /* 897 */ 'b', 'l', 0, /* 900 */ 'c', 'l', 0, /* 903 */ 'd', 'l', 0, /* 906 */ 'd', 'i', 'l', 0, /* 910 */ 's', 'i', 'l', 0, /* 914 */ 'b', 'p', 'l', 0, /* 918 */ 's', 'p', 'l', 0, /* 922 */ 'e', 'b', 'p', 0, /* 926 */ 'r', 'b', 'p', 0, /* 930 */ 'e', 'i', 'p', 0, /* 934 */ 'r', 'i', 'p', 0, /* 938 */ 'e', 's', 'p', 0, /* 942 */ 'r', 's', 'p', 0, /* 946 */ 'c', 's', 0, /* 949 */ 'd', 's', 0, /* 952 */ 'e', 's', 0, /* 955 */ 'f', 's', 0, /* 958 */ 'f', 'l', 'a', 'g', 's', 0, /* 964 */ 's', 's', 0, /* 967 */ 'r', '1', '0', 'w', 0, /* 972 */ 'r', '1', '1', 'w', 0, /* 977 */ 'r', '1', '2', 'w', 0, /* 982 */ 'r', '1', '3', 'w', 0, /* 987 */ 'r', '1', '4', 'w', 0, /* 992 */ 'r', '1', '5', 'w', 0, /* 997 */ 'r', '8', 'w', 0, /* 1001 */ 'r', '9', 'w', 0, /* 1005 */ 'f', 'p', 's', 'w', 0, /* 1010 */ 'e', 'a', 'x', 0, /* 1014 */ 'r', 'a', 'x', 0, /* 1018 */ 'e', 'b', 'x', 0, /* 1022 */ 'r', 'b', 'x', 0, /* 1026 */ 'e', 'c', 'x', 0, /* 1030 */ 'r', 'c', 'x', 0, /* 1034 */ 'e', 'd', 'x', 0, /* 1038 */ 'r', 'd', 'x', 0, /* 1042 */ 'e', 'i', 'z', 0, /* 1046 */ 'r', 'i', 'z', 0, }; static const uint16_t RegAsmOffset[] = { 866, 894, 1011, 869, 897, 923, 914, 1019, 872, 900, 946, 1027, 875, 879, 906, 903, 949, 1035, 1010, 922, 1018, 1026, 878, 1034, 958, 930, 1042, 952, 886, 938, 1005, 955, 961, 931, 1014, 926, 1022, 1030, 882, 1038, 934, 1046, 890, 942, 887, 910, 939, 918, 964, 134, 228, 304, 380, 456, 532, 598, 664, 723, 782, 66, 160, 254, 330, 406, 482, 138, 232, 308, 384, 460, 536, 602, 668, 727, 786, 71, 165, 259, 335, 411, 487, 130, 224, 300, 376, 452, 528, 594, 660, 112, 206, 282, 358, 434, 510, 576, 642, 116, 210, 286, 362, 438, 514, 580, 646, 724, 783, 67, 161, 255, 331, 407, 483, 0, 6, 12, 18, 24, 30, 36, 42, 115, 209, 285, 361, 437, 513, 579, 645, 708, 767, 48, 142, 236, 312, 388, 464, 540, 606, 672, 731, 76, 170, 264, 340, 416, 492, 558, 624, 690, 749, 94, 188, 120, 214, 290, 366, 442, 518, 584, 650, 713, 772, 54, 148, 242, 318, 394, 470, 546, 612, 678, 737, 82, 176, 270, 346, 422, 498, 564, 630, 696, 755, 100, 194, 125, 219, 295, 371, 447, 523, 589, 655, 718, 777, 60, 154, 248, 324, 400, 476, 552, 618, 684, 743, 88, 182, 276, 352, 428, 504, 570, 636, 702, 761, 106, 200, 820, 824, 790, 795, 800, 805, 810, 815, 858, 862, 828, 833, 838, 843, 848, 853, 997, 1001, 967, 972, 977, 982, 987, 992, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR #ifndef CAPSTONE_DIET static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { switch (PrintMethodIdx) { default: // llvm_unreachable("Unknown PrintMethod kind"); break; case 0: printf64mem(MI, OpIdx, OS); break; } } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case X86_AAD8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAD8i8 10) AsmString = "aad"; break; } return NULL; case X86_AAM8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAM8i8 10) AsmString = "aam"; break; } return NULL; case X86_CVTSD2SI64rm: if (MCInst_getNumOperands(MI) == 6 && MCOperand_isReg(MCInst_getOperand(MI, 0)) && GETREGCLASS_CONTAIN(X86_GR64RegClassID, 0)) { // (CVTSD2SI64rm GR64:$dst, sdmem:$src) AsmString = "cvtsd2si $\x01, $\xFF\x02\x01"; break; } return NULL; case X86_XSTORE: if (MCInst_getNumOperands(MI) == 0) { // (XSTORE) AsmString = "xstorerng"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/X86/X86GenAsmWriter1_reduce.inc010066400017500001750000003605241363402546700225660ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 2743U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 2736U, // BUNDLE 2799U, // LIFETIME_START 2723U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 2814U, // AAA 4314U, // AAD8i8 4794U, // AAM8i8 3356U, // AAS 2478U, // ACQUIRE_MOV16rm 2478U, // ACQUIRE_MOV32rm 2478U, // ACQUIRE_MOV64rm 2478U, // ACQUIRE_MOV8rm 5571U, // ADC16i16 270504U, // ADC16mi 270504U, // ADC16mi8 270504U, // ADC16mr 4468904U, // ADC16ri 4468904U, // ADC16ri8 8663208U, // ADC16rm 4468904U, // ADC16rr 4460712U, // ADC16rr_REV 5707U, // ADC32i32 278696U, // ADC32mi 278696U, // ADC32mi8 278696U, // ADC32mr 4468904U, // ADC32ri 4468904U, // ADC32ri8 12857512U, // ADC32rm 4468904U, // ADC32rr 4460712U, // ADC32rr_REV 5855U, // ADC64i32 282792U, // ADC64mi32 282792U, // ADC64mi8 282792U, // ADC64mr 4468904U, // ADC64ri32 4468904U, // ADC64ri8 17051816U, // ADC64rm 4468904U, // ADC64rr 4460712U, // ADC64rr_REV 5469U, // ADC8i8 286888U, // ADC8mi 286888U, // ADC8mi8 286888U, // ADC8mr 4468904U, // ADC8ri 4468904U, // ADC8ri8 21246120U, // ADC8rm 4468904U, // ADC8rr 4460712U, // ADC8rr_REV 12850409U, // ADCX32rm 4461801U, // ADCX32rr 17044713U, // ADCX64rm 4461801U, // ADCX64rr 5580U, // ADD16i16 270568U, // ADD16mi 270568U, // ADD16mi8 270568U, // ADD16mr 4468968U, // ADD16ri 4468968U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 8663272U, // ADD16rm 4468968U, // ADD16rr 0U, // ADD16rr_DB 4460776U, // ADD16rr_REV 5717U, // ADD32i32 278760U, // ADD32mi 278760U, // ADD32mi8 278760U, // ADD32mr 4468968U, // ADD32ri 4468968U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 12857576U, // ADD32rm 4468968U, // ADD32rr 0U, // ADD32rr_DB 4460776U, // ADD32rr_REV 5865U, // ADD64i32 282856U, // ADD64mi32 282856U, // ADD64mi8 282856U, // ADD64mr 4468968U, // ADD64ri32 0U, // ADD64ri32_DB 4468968U, // ADD64ri8 0U, // ADD64ri8_DB 17051880U, // ADD64rm 4468968U, // ADD64rr 0U, // ADD64rr_DB 4460776U, // ADD64rr_REV 5478U, // ADD8i8 286952U, // ADD8mi 286952U, // ADD8mi8 286952U, // ADD8mr 4468968U, // ADD8ri 4468968U, // ADD8ri8 21246184U, // ADD8rm 4468968U, // ADD8rr 4460776U, // ADD8rr_REV 2753U, // ADJCALLSTACKDOWN32 2753U, // ADJCALLSTACKDOWN64 2771U, // ADJCALLSTACKUP32 2771U, // ADJCALLSTACKUP64 25433339U, // ADOX32rm 29627643U, // ADOX32rr 33821947U, // ADOX64rm 29627643U, // ADOX64rr 5589U, // AND16i16 270617U, // AND16mi 270617U, // AND16mi8 270617U, // AND16mr 4469017U, // AND16ri 4469017U, // AND16ri8 8663321U, // AND16rm 4469017U, // AND16rr 4460825U, // AND16rr_REV 5727U, // AND32i32 278809U, // AND32mi 278809U, // AND32mi8 278809U, // AND32mr 4469017U, // AND32ri 4469017U, // AND32ri8 12857625U, // AND32rm 4469017U, // AND32rr 4460825U, // AND32rr_REV 5875U, // AND64i32 282905U, // AND64mi32 282905U, // AND64mi8 282905U, // AND64mr 4469017U, // AND64ri32 4469017U, // AND64ri8 17051929U, // AND64rm 4469017U, // AND64rr 4460825U, // AND64rr_REV 5487U, // AND8i8 287001U, // AND8mi 287001U, // AND8mi8 287001U, // AND8mr 4469017U, // AND8ri 4469017U, // AND8ri8 21246233U, // AND8rm 4469017U, // AND8rr 4460825U, // AND8rr_REV 163844799U, // ANDN32rm 700715711U, // ANDN32rr 1237586623U, // ANDN64rm 700715711U, // ANDN64rr 271004U, // ARPL16mr 29627036U, // ARPL16rr 1770263499U, // BEXTR32rm 700715979U, // BEXTR32rr 1778652107U, // BEXTR64rm 700715979U, // BEXTR64rr 1770263499U, // BEXTRI32mi 700715979U, // BEXTRI32ri 1778652107U, // BEXTRI64mi 700715979U, // BEXTRI64ri 25432709U, // BLCFILL32rm 29627013U, // BLCFILL32rr 33821317U, // BLCFILL64rm 29627013U, // BLCFILL64rr 25432642U, // BLCI32rm 29626946U, // BLCI32rr 33821250U, // BLCI64rm 29626946U, // BLCI64rr 25432250U, // BLCIC32rm 29626554U, // BLCIC32rr 33820858U, // BLCIC64rm 29626554U, // BLCIC64rr 25432660U, // BLCMSK32rm 29626964U, // BLCMSK32rr 33821268U, // BLCMSK64rm 29626964U, // BLCMSK64rr 25433050U, // BLCS32rm 29627354U, // BLCS32rr 33821658U, // BLCS64rm 29627354U, // BLCS64rr 25432718U, // BLSFILL32rm 29627022U, // BLSFILL32rr 33821326U, // BLSFILL64rm 29627022U, // BLSFILL64rr 25432654U, // BLSI32rm 29626958U, // BLSI32rr 33821262U, // BLSI64rm 29626958U, // BLSI64rr 25432257U, // BLSIC32rm 29626561U, // BLSIC32rr 33820865U, // BLSIC64rm 29626561U, // BLSIC64rr 25432668U, // BLSMSK32rm 29626972U, // BLSMSK32rr 33821276U, // BLSMSK64rm 29626972U, // BLSMSK64rr 25433014U, // BLSR32rm 29627318U, // BLSR32rr 33821622U, // BLSR64rm 29627318U, // BLSR64rr 25432350U, // BOUNDS16rm 33820958U, // BOUNDS32rm 38015498U, // BSF16rm 29626890U, // BSF16rr 25432586U, // BSF32rm 29626890U, // BSF32rr 33821194U, // BSF64rm 29626890U, // BSF64rr 38015921U, // BSR16rm 29627313U, // BSR16rr 25433009U, // BSR32rm 29627313U, // BSR32rr 33821617U, // BSR64rm 29627313U, // BSR64rr 4849U, // BSWAP32r 4849U, // BSWAP64r 271412U, // BT16mi8 271412U, // BT16mr 29627444U, // BT16ri8 29627444U, // BT16rr 279604U, // BT32mi8 279604U, // BT32mr 29627444U, // BT32ri8 29627444U, // BT32rr 283700U, // BT64mi8 283700U, // BT64mr 29627444U, // BT64ri8 29627444U, // BT64rr 270549U, // BTC16mi8 270549U, // BTC16mr 29626581U, // BTC16ri8 29626581U, // BTC16rr 278741U, // BTC32mi8 278741U, // BTC32mr 29626581U, // BTC32ri8 29626581U, // BTC32rr 282837U, // BTC64mi8 282837U, // BTC64mr 29626581U, // BTC64ri8 29626581U, // BTC64rr 271292U, // BTR16mi8 271292U, // BTR16mr 29627324U, // BTR16ri8 29627324U, // BTR16rr 279484U, // BTR32mi8 279484U, // BTR32mr 29627324U, // BTR32ri8 29627324U, // BTR32rr 283580U, // BTR64mi8 283580U, // BTR64mr 29627324U, // BTR64ri8 29627324U, // BTR64rr 271394U, // BTS16mi8 271394U, // BTS16mr 29627426U, // BTS16ri8 29627426U, // BTS16rr 279586U, // BTS32mi8 279586U, // BTS32mr 29627426U, // BTS32ri8 29627426U, // BTS32rr 283682U, // BTS64mi8 283682U, // BTS64mr 29627426U, // BTS64ri8 29627426U, // BTS64rr 1770263112U, // BZHI32rm 700715592U, // BZHI32rr 1778651720U, // BZHI64rm 700715592U, // BZHI64rr 8831U, // CALL16m 4735U, // CALL16r 17023U, // CALL32m 4735U, // CALL32r 21119U, // CALL64m 29311U, // CALL64pcrel32 4735U, // CALL64r 29311U, // CALLpcrel16 29311U, // CALLpcrel32 3563U, // CBW 3276U, // CDQ 3030U, // CDQE 2883U, // CLAC 2915U, // CLC 2965U, // CLD 25739U, // CLFLUSHOPT 3121U, // CLGI 3131U, // CLI 3499U, // CLTS 24738U, // CLWB 2919U, // CMC 8654926U, // CMOVA16rm 4460622U, // CMOVA16rr 12849230U, // CMOVA32rm 4460622U, // CMOVA32rr 17043534U, // CMOVA64rm 4460622U, // CMOVA64rr 8655194U, // CMOVAE16rm 4460890U, // CMOVAE16rr 12849498U, // CMOVAE32rm 4460890U, // CMOVAE32rr 17043802U, // CMOVAE64rm 4460890U, // CMOVAE64rr 8655003U, // CMOVB16rm 4460699U, // CMOVB16rr 12849307U, // CMOVB32rm 4460699U, // CMOVB32rr 17043611U, // CMOVB64rm 4460699U, // CMOVB64rr 8655214U, // CMOVBE16rm 4460910U, // CMOVBE16rr 12849518U, // CMOVBE32rm 4460910U, // CMOVBE32rr 17043822U, // CMOVBE64rm 4460910U, // CMOVBE64rr 8655363U, // CMOVE16rm 4461059U, // CMOVE16rr 12849667U, // CMOVE32rm 4461059U, // CMOVE32rr 17043971U, // CMOVE64rm 4461059U, // CMOVE64rr 8655413U, // CMOVG16rm 4461109U, // CMOVG16rr 12849717U, // CMOVG32rm 4461109U, // CMOVG32rr 17044021U, // CMOVG64rm 4461109U, // CMOVG64rr 8655234U, // CMOVGE16rm 4460930U, // CMOVGE16rr 12849538U, // CMOVGE32rm 4460930U, // CMOVGE32rr 17043842U, // CMOVGE64rm 4460930U, // CMOVGE64rr 8655539U, // CMOVL16rm 4461235U, // CMOVL16rr 12849843U, // CMOVL32rm 4461235U, // CMOVL32rr 17044147U, // CMOVL64rm 4461235U, // CMOVL64rr 8655258U, // CMOVLE16rm 4460954U, // CMOVLE16rr 12849562U, // CMOVLE32rm 4460954U, // CMOVLE32rr 17043866U, // CMOVLE64rm 4460954U, // CMOVLE64rr 8655286U, // CMOVNE16rm 4460982U, // CMOVNE16rr 12849590U, // CMOVNE32rm 4460982U, // CMOVNE32rr 17043894U, // CMOVNE64rm 4460982U, // CMOVNE64rr 8655580U, // CMOVNO16rm 4461276U, // CMOVNO16rr 12849884U, // CMOVNO32rm 4461276U, // CMOVNO32rr 17044188U, // CMOVNO64rm 4461276U, // CMOVNO64rr 8655652U, // CMOVNP16rm 4461348U, // CMOVNP16rr 12849956U, // CMOVNP32rm 4461348U, // CMOVNP32rr 17044260U, // CMOVNP64rm 4461348U, // CMOVNP64rr 8655884U, // CMOVNS16rm 4461580U, // CMOVNS16rr 12850188U, // CMOVNS32rm 4461580U, // CMOVNS32rr 17044492U, // CMOVNS64rm 4461580U, // CMOVNS64rr 8655594U, // CMOVO16rm 4461290U, // CMOVO16rr 12849898U, // CMOVO32rm 4461290U, // CMOVO32rr 17044202U, // CMOVO64rm 4461290U, // CMOVO64rr 8655698U, // CMOVP16rm 4461394U, // CMOVP16rr 12850002U, // CMOVP32rm 4461394U, // CMOVP32rr 17044306U, // CMOVP64rm 4461394U, // CMOVP64rr 8655917U, // CMOVS16rm 4461613U, // CMOVS16rr 12850221U, // CMOVS32rm 4461613U, // CMOVS32rr 17044525U, // CMOVS64rm 4461613U, // CMOVS64rr 2187U, // CMOV_FR32 2374U, // CMOV_FR64 2394U, // CMOV_GR16 2207U, // CMOV_GR32 2414U, // CMOV_GR8 2166U, // CMOV_RFP32 2353U, // CMOV_RFP64 2081U, // CMOV_RFP80 2123U, // CMOV_V16F32 2227U, // CMOV_V2F64 2290U, // CMOV_V2I64 2102U, // CMOV_V4F32 2248U, // CMOV_V4F64 2311U, // CMOV_V4I64 2145U, // CMOV_V8F32 2269U, // CMOV_V8F64 2332U, // CMOV_V8I64 5616U, // CMP16i16 271106U, // CMP16mi 271106U, // CMP16mi8 271106U, // CMP16mr 29627138U, // CMP16ri 29627138U, // CMP16ri8 38015746U, // CMP16rm 29627138U, // CMP16rr 29627138U, // CMP16rr_REV 5781U, // CMP32i32 279298U, // CMP32mi 279298U, // CMP32mi8 279298U, // CMP32mr 29627138U, // CMP32ri 29627138U, // CMP32ri8 25432834U, // CMP32rm 29627138U, // CMP32rr 29627138U, // CMP32rr_REV 5896U, // CMP64i32 283394U, // CMP64mi32 283394U, // CMP64mi8 283394U, // CMP64mr 29627138U, // CMP64ri32 29627138U, // CMP64ri8 33821442U, // CMP64rm 29627138U, // CMP64rr 29627138U, // CMP64rr_REV 5504U, // CMP8i8 287490U, // CMP8mi 287490U, // CMP8mi8 287490U, // CMP8mr 29627138U, // CMP8ri 29627138U, // CMP8ri8 42210050U, // CMP8rm 29627138U, // CMP8rr 29627138U, // CMP8rr_REV 32898U, // CMPSB 37176U, // CMPSL 41831U, // CMPSQ 46299U, // CMPSW 49237U, // CMPXCHG16B 270874U, // CMPXCHG16rm 29626906U, // CMPXCHG16rr 279066U, // CMPXCHG32rm 29626906U, // CMPXCHG32rr 283162U, // CMPXCHG64rm 29626906U, // CMPXCHG64rr 20577U, // CMPXCHG8B 287258U, // CMPXCHG8rm 29626906U, // CMPXCHG8rr 2959U, // CPUID 3252U, // CQO 3006U, // CWD 3010U, // CWDE 2818U, // DAA 3360U, // DAS 2708U, // DATA16_PREFIX 8365U, // DEC16m 4269U, // DEC16r 4269U, // DEC16r_alt 16557U, // DEC32m 4269U, // DEC32r 4269U, // DEC32r_alt 20653U, // DEC64m 4269U, // DEC64r 24749U, // DEC8m 4269U, // DEC8r 9394U, // DIV16m 5298U, // DIV16r 17586U, // DIV32m 5298U, // DIV32r 21682U, // DIV64m 5298U, // DIV64r 25778U, // DIV8m 5298U, // DIV8r 6018U, // EH_RETURN 6018U, // EH_RETURN64 2531U, // EH_SjLj_LongJmp32 2621U, // EH_SjLj_LongJmp64 2550U, // EH_SjLj_SetJmp32 2640U, // EH_SjLj_SetJmp64 29506U, // EH_SjLj_Setup 29627277U, // ENTER 537214U, // FARCALL16i 53886U, // FARCALL16m 537214U, // FARCALL32i 53886U, // FARCALL32m 53886U, // FARCALL64 537362U, // FARJMP16i 54034U, // FARJMP16m 537362U, // FARJMP32i 54034U, // FARJMP32m 54034U, // FARJMP64 3214U, // FSETPM 2903U, // GETSEC 3532U, // HLT 9393U, // IDIV16m 5297U, // IDIV16r 17585U, // IDIV32m 5297U, // IDIV32r 21681U, // IDIV64m 5297U, // IDIV64r 25777U, // IDIV8m 5297U, // IDIV8r 8877U, // IMUL16m 4781U, // IMUL16r 8655533U, // IMUL16rm 1782846125U, // IMUL16rmi 1782846125U, // IMUL16rmi8 4461229U, // IMUL16rr 700715693U, // IMUL16rri 700715693U, // IMUL16rri8 17069U, // IMUL32m 4781U, // IMUL32r 12849837U, // IMUL32rm 1770263213U, // IMUL32rmi 1770263213U, // IMUL32rmi8 4461229U, // IMUL32rr 700715693U, // IMUL32rri 700715693U, // IMUL32rri8 21165U, // IMUL64m 4781U, // IMUL64r 17044141U, // IMUL64rm 1778651821U, // IMUL64rmi32 1778651821U, // IMUL64rmi8 4461229U, // IMUL64rr 700715693U, // IMUL64rri32 700715693U, // IMUL64rri8 25261U, // IMUL8m 4781U, // IMUL8r 5608U, // IN16ri 3729U, // IN16rr 5772U, // IN32ri 3739U, // IN32rr 5496U, // IN8ri 3719U, // IN8rr 8400U, // INC16m 4304U, // INC16r 4304U, // INC16r_alt 16592U, // INC32m 4304U, // INC32r 4304U, // INC32r_alt 20688U, // INC64m 4304U, // INC64r 24784U, // INC8m 4304U, // INC8r 843893U, // INSB 848171U, // INSL 853198U, // INSW 5231U, // INT 2526U, // INT1 2616U, // INT3 3256U, // INTO 3001U, // INVD 46404729U, // INVEPT32 46404729U, // INVEPT64 25127U, // INVLPG 3685U, // INVLPGA32 3702U, // INVLPGA64 46403829U, // INVPCID32 46403829U, // INVPCID64 46403838U, // INVVPID32 46403838U, // INVVPID64 3504U, // IRET16 2989U, // IRET32 3319U, // IRET64 2787U, // Int_MemBarrier 29006U, // JAE_1 29006U, // JAE_2 29006U, // JAE_4 28740U, // JA_1 28740U, // JA_2 28740U, // JA_4 29026U, // JBE_1 29026U, // JBE_2 29026U, // JBE_4 28785U, // JB_1 28785U, // JB_2 28785U, // JB_4 29992U, // JCXZ 29985U, // JECXZ 29066U, // JE_1 29066U, // JE_2 29066U, // JE_4 29046U, // JGE_1 29046U, // JGE_2 29046U, // JGE_4 29219U, // JG_1 29219U, // JG_2 29219U, // JG_4 29070U, // JLE_1 29070U, // JLE_2 29070U, // JLE_4 29306U, // JL_1 29306U, // JL_2 29306U, // JL_4 8973U, // JMP16m 4877U, // JMP16r 17165U, // JMP32m 4877U, // JMP32r 21261U, // JMP64m 4877U, // JMP64r 29453U, // JMP_1 29453U, // JMP_2 29453U, // JMP_4 29090U, // JNE_1 29090U, // JNE_2 29090U, // JNE_4 29392U, // JNO_1 29392U, // JNO_2 29392U, // JNO_4 29464U, // JNP_1 29464U, // JNP_2 29464U, // JNP_4 29696U, // JNS_1 29696U, // JNS_2 29696U, // JNS_4 29388U, // JO_1 29388U, // JO_2 29388U, // JO_4 29438U, // JP_1 29438U, // JP_2 29438U, // JP_4 29998U, // JRCXZ 29692U, // JS_1 29692U, // JS_2 29692U, // JS_4 3086U, // LAHF 38015870U, // LAR16rm 29627262U, // LAR16rr 38015870U, // LAR32rm 29627262U, // LAR32rr 38015870U, // LAR64rm 29627262U, // LAR64rr 270874U, // LCMPXCHG16 49237U, // LCMPXCHG16B 279066U, // LCMPXCHG32 283162U, // LCMPXCHG64 287258U, // LCMPXCHG8 20577U, // LCMPXCHG8B 50598880U, // LDS16rm 50598880U, // LDS32rm 54792255U, // LEA16r 54792255U, // LEA32r 54792255U, // LEA64_32r 54792255U, // LEA64r 3073U, // LEAVE 3073U, // LEAVE64 50598885U, // LES16rm 50598885U, // LES32rm 50598898U, // LFS16rm 50598898U, // LFS32rm 50598898U, // LFS64rm 54328U, // LGDT16m 54328U, // LGDT32m 54328U, // LGDT64m 50598903U, // LGS16rm 50598903U, // LGS32rm 50598903U, // LGS64rm 54340U, // LIDT16m 54340U, // LIDT32m 54340U, // LIDT64m 9296U, // LLDT16m 5200U, // LLDT16r 9410U, // LMSW16m 5314U, // LMSW16r 270568U, // LOCK_ADD16mi 270568U, // LOCK_ADD16mi8 270568U, // LOCK_ADD16mr 278760U, // LOCK_ADD32mi 278760U, // LOCK_ADD32mi8 278760U, // LOCK_ADD32mr 282856U, // LOCK_ADD64mi32 282856U, // LOCK_ADD64mi8 282856U, // LOCK_ADD64mr 286952U, // LOCK_ADD8mi 286952U, // LOCK_ADD8mr 270617U, // LOCK_AND16mi 270617U, // LOCK_AND16mi8 270617U, // LOCK_AND16mr 278809U, // LOCK_AND32mi 278809U, // LOCK_AND32mi8 278809U, // LOCK_AND32mr 282905U, // LOCK_AND64mi32 282905U, // LOCK_AND64mi8 282905U, // LOCK_AND64mr 287001U, // LOCK_AND8mi 287001U, // LOCK_AND8mr 8365U, // LOCK_DEC16m 16557U, // LOCK_DEC32m 20653U, // LOCK_DEC64m 24749U, // LOCK_DEC8m 8400U, // LOCK_INC16m 16592U, // LOCK_INC32m 20688U, // LOCK_INC64m 24784U, // LOCK_INC8m 271258U, // LOCK_OR16mi 271258U, // LOCK_OR16mi8 271258U, // LOCK_OR16mr 279450U, // LOCK_OR32mi 279450U, // LOCK_OR32mi8 279450U, // LOCK_OR32mr 283546U, // LOCK_OR64mi32 283546U, // LOCK_OR64mi8 283546U, // LOCK_OR64mr 287642U, // LOCK_OR8mi 287642U, // LOCK_OR8mr 3154U, // LOCK_PREFIX 270486U, // LOCK_SUB16mi 270486U, // LOCK_SUB16mi8 270486U, // LOCK_SUB16mr 278678U, // LOCK_SUB32mi 278678U, // LOCK_SUB32mi8 278678U, // LOCK_SUB32mr 282774U, // LOCK_SUB64mi32 282774U, // LOCK_SUB64mi8 282774U, // LOCK_SUB64mr 286870U, // LOCK_SUB8mi 286870U, // LOCK_SUB8mr 271270U, // LOCK_XOR16mi 271270U, // LOCK_XOR16mi8 271270U, // LOCK_XOR16mr 279462U, // LOCK_XOR32mi 279462U, // LOCK_XOR32mi8 279462U, // LOCK_XOR32mr 283558U, // LOCK_XOR64mi32 283558U, // LOCK_XOR64mi8 283558U, // LOCK_XOR64mr 287654U, // LOCK_XOR8mi 287654U, // LOCK_XOR8mr 70985U, // LODSB 75381U, // LODSL 79646U, // LODSQ 83500U, // LODSW 29489U, // LOOP 29118U, // LOOPE 29095U, // LOOPNE 4623U, // LRETIL 4953U, // LRETIQ 4623U, // LRETIW 3107U, // LRETL 3293U, // LRETQ 3107U, // LRETW 38015650U, // LSL16rm 29627042U, // LSL16rr 25432738U, // LSL32rm 29627042U, // LSL32rr 33821346U, // LSL64rm 29627042U, // LSL64rr 50598941U, // LSS16rm 50598941U, // LSS32rm 50598941U, // LSS64rm 9153U, // LTRm 5057U, // LTRr 86247U, // LXADD16 90343U, // LXADD32 94439U, // LXADD64 98535U, // LXADD8 38016097U, // LZCNT16rm 29627489U, // LZCNT16rr 25433185U, // LZCNT32rm 29627489U, // LZCNT32rr 33821793U, // LZCNT64rm 29627489U, // LZCNT64rr 3206U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 103960U, // MOV16ao16 103960U, // MOV16ao32 103938U, // MOV16ao64 271543U, // MOV16mi 271543U, // MOV16mr 271543U, // MOV16ms 1152183U, // MOV16o16a 1152183U, // MOV16o32a 1151954U, // MOV16o64a 29627575U, // MOV16ri 29627575U, // MOV16ri_alt 38016183U, // MOV16rm 29627575U, // MOV16rr 29627575U, // MOV16rr_REV 29627575U, // MOV16rs 38016183U, // MOV16sm 29627575U, // MOV16sr 108225U, // MOV32ao16 108225U, // MOV32ao32 108201U, // MOV32ao64 29627575U, // MOV32cr 29627575U, // MOV32dr 279735U, // MOV32mi 279735U, // MOV32mr 271543U, // MOV32ms 1418423U, // MOV32o16a 1418423U, // MOV32o32a 1418194U, // MOV32o64a 0U, // MOV32r0 29627575U, // MOV32rc 29627575U, // MOV32rd 29627575U, // MOV32ri 0U, // MOV32ri64 29627575U, // MOV32ri_alt 25433271U, // MOV32rm 29627575U, // MOV32rr 29627575U, // MOV32rr_REV 29627575U, // MOV32rs 38016183U, // MOV32sm 29627575U, // MOV32sr 112460U, // MOV64ao32 112436U, // MOV64ao64 29627575U, // MOV64cr 29627575U, // MOV64dr 283831U, // MOV64mi32 283831U, // MOV64mr 271543U, // MOV64ms 1684663U, // MOV64o32a 1684434U, // MOV64o64a 29627575U, // MOV64rc 29627575U, // MOV64rd 29627346U, // MOV64ri 29627575U, // MOV64ri32 33821879U, // MOV64rm 29627575U, // MOV64rr 29627575U, // MOV64rr_REV 29627575U, // MOV64rs 38016183U, // MOV64sm 29627575U, // MOV64sr 116136U, // MOV8ao16 116136U, // MOV8ao32 116114U, // MOV8ao64 287927U, // MOV8mi 287927U, // MOV8mr 287927U, // MOV8mr_NOREX 1950903U, // MOV8o16a 1950903U, // MOV8o32a 1950674U, // MOV8o64a 29627575U, // MOV8ri 29627575U, // MOV8ri_alt 42210487U, // MOV8rm 42210487U, // MOV8rm_NOREX 29627575U, // MOV8rr 29627575U, // MOV8rr_NOREX 29627575U, // MOV8rr_REV 270703U, // MOVBE16mr 38015343U, // MOVBE16rm 278895U, // MOVBE32mr 25432431U, // MOVBE32rm 282991U, // MOVBE64mr 33821039U, // MOVBE64rm 0U, // MOVPC32r 59039881U, // MOVSB 63238463U, // MOVSL 67490670U, // MOVSQ 71632098U, // MOVSW 42210579U, // MOVSX16rm8 29627667U, // MOVSX16rr8 42210579U, // MOVSX32_NOREXrm8 29627667U, // MOVSX32_NOREXrr8 38016275U, // MOVSX32rm16 42210579U, // MOVSX32rm8 29627667U, // MOVSX32rr16 29627667U, // MOVSX32rr8 29626694U, // MOVSX64_NOREXrr32 38016275U, // MOVSX64rm16 25432390U, // MOVSX64rm32 25432390U, // MOVSX64rm32_alt 42210579U, // MOVSX64rm8 29627667U, // MOVSX64rr16 29626694U, // MOVSX64rr32 29627667U, // MOVSX64rr8 42210586U, // MOVZX16rm8 29627674U, // MOVZX16rr8 42210586U, // MOVZX32_NOREXrm8 29627674U, // MOVZX32_NOREXrr8 38016282U, // MOVZX32rm16 42210586U, // MOVZX32rm8 29627674U, // MOVZX32rr16 29627674U, // MOVZX32rr8 38016282U, // MOVZX64rm16_Q 42210586U, // MOVZX64rm8_Q 29627674U, // MOVZX64rr16_Q 29627674U, // MOVZX64rr8_Q 8878U, // MUL16m 4782U, // MUL16r 17070U, // MUL32m 4782U, // MUL32r 21166U, // MUL64m 4782U, // MUL64r 25262U, // MUL8m 4782U, // MUL8r 163845365U, // MULX32rm 700716277U, // MULX32rr 1237587189U, // MULX64rm 700716277U, // MULX64rr 8725U, // NEG16m 4629U, // NEG16r 16917U, // NEG32m 4629U, // NEG32r 21013U, // NEG64m 4629U, // NEG64r 25109U, // NEG8m 4629U, // NEG8r 3272U, // NOOP 9004U, // NOOP18_16m4 9004U, // NOOP18_16m5 9004U, // NOOP18_16m6 9004U, // NOOP18_16m7 4908U, // NOOP18_16r4 4908U, // NOOP18_16r5 4908U, // NOOP18_16r6 4908U, // NOOP18_16r7 17196U, // NOOP18_m4 17196U, // NOOP18_m5 17196U, // NOOP18_m6 17196U, // NOOP18_m7 4908U, // NOOP18_r4 4908U, // NOOP18_r5 4908U, // NOOP18_r6 4908U, // NOOP18_r7 75772716U, // NOOP19rr 17196U, // NOOPL 17196U, // NOOPL_19 17196U, // NOOPL_1a 17196U, // NOOPL_1b 17196U, // NOOPL_1c 17196U, // NOOPL_1d 17196U, // NOOPL_1e 9004U, // NOOPW 9004U, // NOOPW_19 9004U, // NOOPW_1a 9004U, // NOOPW_1b 9004U, // NOOPW_1c 9004U, // NOOPW_1d 9004U, // NOOPW_1e 9332U, // NOT16m 5236U, // NOT16r 17524U, // NOT32m 5236U, // NOT32r 21620U, // NOT64m 5236U, // NOT64r 25716U, // NOT8m 5236U, // NOT8r 5626U, // OR16i16 271258U, // OR16mi 271258U, // OR16mi8 271258U, // OR16mr 4469658U, // OR16ri 4469658U, // OR16ri8 8663962U, // OR16rm 4469658U, // OR16rr 4461466U, // OR16rr_REV 5792U, // OR32i32 279450U, // OR32mi 279450U, // OR32mi8 279450U, // OR32mr 279450U, // OR32mrLocked 4469658U, // OR32ri 4469658U, // OR32ri8 12858266U, // OR32rm 4469658U, // OR32rr 4461466U, // OR32rr_REV 5931U, // OR64i32 283546U, // OR64mi32 283546U, // OR64mi8 283546U, // OR64mr 4469658U, // OR64ri32 4469658U, // OR64ri8 17052570U, // OR64rm 4469658U, // OR64rr 4461466U, // OR64rr_REV 5514U, // OR8i8 287642U, // OR8mi 287642U, // OR8mi8 287642U, // OR8mr 4469658U, // OR8ri 4469658U, // OR8ri8 21246874U, // OR8rm 4469658U, // OR8rr 4461466U, // OR8rr_REV 1053862U, // OUT16ir 3587U, // OUT16rr 1316006U, // OUT32ir 3641U, // OUT32rr 1840294U, // OUT8ir 3159U, // OUT8rr 71510U, // OUTSB 75617U, // OUTSL 83820U, // OUTSW 3516U, // PCOMMIT 163844856U, // PDEP32rm 700715768U, // PDEP32rr 1237586680U, // PDEP64rm 700715768U, // PDEP64rr 163845291U, // PEXT32rm 700716203U, // PEXT32rr 1237587115U, // PEXT64rm 700716203U, // PEXT64rr 4919U, // POP16r 9015U, // POP16rmm 4919U, // POP16rmr 4919U, // POP32r 17207U, // POP32rmm 4919U, // POP32rmr 4919U, // POP64r 21303U, // POP64rmm 4919U, // POP64rmr 3557U, // POPA16 3177U, // POPA32 3380U, // POPDS16 3380U, // POPDS32 3395U, // POPES16 3395U, // POPES32 3102U, // POPF16 2953U, // POPF32 3287U, // POPF64 3410U, // POPFS16 3410U, // POPFS32 3410U, // POPFS64 3425U, // POPGS16 3425U, // POPGS32 3425U, // POPGS64 3492U, // POPSS16 3492U, // POPSS32 4668U, // PUSH16i8 4668U, // PUSH16r 8764U, // PUSH16rmm 4668U, // PUSH16rmr 4668U, // PUSH32i8 4668U, // PUSH32r 16956U, // PUSH32rmm 4668U, // PUSH32rmr 4668U, // PUSH64i16 4668U, // PUSH64i32 4668U, // PUSH64i8 4668U, // PUSH64r 21052U, // PUSH64rmm 4668U, // PUSH64rmr 3550U, // PUSHA16 3170U, // PUSHA32 3364U, // PUSHCS16 3364U, // PUSHCS32 3372U, // PUSHDS16 3372U, // PUSHDS32 3387U, // PUSHES16 3387U, // PUSHES32 3096U, // PUSHF16 2946U, // PUSHF32 3280U, // PUSHF64 3402U, // PUSHFS16 3402U, // PUSHFS32 3402U, // PUSHFS64 3417U, // PUSHGS16 3417U, // PUSHGS32 3417U, // PUSHGS64 3484U, // PUSHSS16 3484U, // PUSHSS32 4668U, // PUSHi16 4668U, // PUSHi32 2105968U, // RCL16m1 2368112U, // RCL16mCL 270960U, // RCL16mi 2101872U, // RCL16r1 2364016U, // RCL16rCL 4461168U, // RCL16ri 2114160U, // RCL32m1 2376304U, // RCL32mCL 279152U, // RCL32mi 2101872U, // RCL32r1 2364016U, // RCL32rCL 4461168U, // RCL32ri 2118256U, // RCL64m1 2380400U, // RCL64mCL 283248U, // RCL64mi 2101872U, // RCL64r1 2364016U, // RCL64rCL 4461168U, // RCL64ri 2122352U, // RCL8m1 2384496U, // RCL8mCL 287344U, // RCL8mi 2101872U, // RCL8r1 2364016U, // RCL8rCL 4461168U, // RCL8ri 2106248U, // RCR16m1 2368392U, // RCR16mCL 271240U, // RCR16mi 2102152U, // RCR16r1 2364296U, // RCR16rCL 4461448U, // RCR16ri 2114440U, // RCR32m1 2376584U, // RCR32mCL 279432U, // RCR32mi 2102152U, // RCR32r1 2364296U, // RCR32rCL 4461448U, // RCR32ri 2118536U, // RCR64m1 2380680U, // RCR64mCL 283528U, // RCR64mi 2102152U, // RCR64r1 2364296U, // RCR64rCL 4461448U, // RCR64ri 2122632U, // RCR8m1 2384776U, // RCR8mCL 287624U, // RCR8mi 2102152U, // RCR8r1 2364296U, // RCR8rCL 4461448U, // RCR8ri 4549U, // RDFSBASE 4549U, // RDFSBASE64 4569U, // RDGSBASE 4569U, // RDGSBASE64 3334U, // RDMSR 2923U, // RDPMC 4374U, // RDRAND16r 4374U, // RDRAND32r 4374U, // RDRAND64r 4333U, // RDSEED16r 4333U, // RDSEED32r 4333U, // RDSEED64r 2936U, // RDTSC 3261U, // RDTSCP 2433U, // RELEASE_ADD32mi 2433U, // RELEASE_ADD64mi32 2433U, // RELEASE_ADD8mi 2433U, // RELEASE_AND32mi 2433U, // RELEASE_AND64mi32 2433U, // RELEASE_AND8mi 2456U, // RELEASE_DEC16m 2456U, // RELEASE_DEC32m 2456U, // RELEASE_DEC64m 2456U, // RELEASE_DEC8m 2456U, // RELEASE_INC16m 2456U, // RELEASE_INC32m 2456U, // RELEASE_INC64m 2456U, // RELEASE_INC8m 2059U, // RELEASE_MOV16mi 2499U, // RELEASE_MOV16mr 2059U, // RELEASE_MOV32mi 2499U, // RELEASE_MOV32mr 2059U, // RELEASE_MOV64mi32 2499U, // RELEASE_MOV64mr 2059U, // RELEASE_MOV8mi 2499U, // RELEASE_MOV8mr 2433U, // RELEASE_OR32mi 2433U, // RELEASE_OR64mi32 2433U, // RELEASE_OR8mi 2433U, // RELEASE_XOR32mi 2433U, // RELEASE_XOR64mi32 2433U, // RELEASE_XOR8mi 3024U, // REPNE_PREFIX 2867U, // REP_MOVSB_32 2867U, // REP_MOVSB_64 2979U, // REP_MOVSD_32 2979U, // REP_MOVSD_64 3309U, // REP_MOVSQ_64 3577U, // REP_MOVSW_32 3577U, // REP_MOVSW_64 3268U, // REP_PREFIX 2857U, // REP_STOSB_32 2857U, // REP_STOSB_64 2969U, // REP_STOSD_32 2969U, // REP_STOSD_64 3299U, // REP_STOSQ_64 3567U, // REP_STOSW_32 3567U, // REP_STOSW_64 5212U, // RETIL 5212U, // RETIQ 5212U, // RETIW 3505U, // RETL 3505U, // RETQ 3505U, // RETW 2702U, // REX64_PREFIX 2106007U, // ROL16m1 2368151U, // ROL16mCL 270999U, // ROL16mi 2101911U, // ROL16r1 2364055U, // ROL16rCL 4461207U, // ROL16ri 2114199U, // ROL32m1 2376343U, // ROL32mCL 279191U, // ROL32mi 2101911U, // ROL32r1 2364055U, // ROL32rCL 4461207U, // ROL32ri 2118295U, // ROL64m1 2380439U, // ROL64mCL 283287U, // ROL64mi 2101911U, // ROL64r1 2364055U, // ROL64rCL 4461207U, // ROL64ri 2122391U, // ROL8m1 2384535U, // ROL8mCL 287383U, // ROL8mi 2101911U, // ROL8r1 2364055U, // ROL8rCL 4461207U, // ROL8ri 2106265U, // ROR16m1 2368409U, // ROR16mCL 271257U, // ROR16mi 2102169U, // ROR16r1 2364313U, // ROR16rCL 4461465U, // ROR16ri 2114457U, // ROR32m1 2376601U, // ROR32mCL 279449U, // ROR32mi 2102169U, // ROR32r1 2364313U, // ROR32rCL 4461465U, // ROR32ri 2118553U, // ROR64m1 2380697U, // ROR64mCL 283545U, // ROR64mi 2102169U, // ROR64r1 2364313U, // ROR64rCL 4461465U, // ROR64ri 2122649U, // ROR8m1 2384793U, // ROR8mCL 287641U, // ROR8mi 2102169U, // ROR8r1 2364313U, // ROR8rCL 4461465U, // ROR8ri 1770263821U, // RORX32mi 700716301U, // RORX32ri 1778652429U, // RORX64mi 700716301U, // RORX64ri 3221U, // RSM 3091U, // SAHF 2105963U, // SAL16m1 2368107U, // SAL16mCL 270955U, // SAL16mi 2101867U, // SAL16r1 2364011U, // SAL16rCL 4461163U, // SAL16ri 2114155U, // SAL32m1 2376299U, // SAL32mCL 279147U, // SAL32mi 2101867U, // SAL32r1 2364011U, // SAL32rCL 4461163U, // SAL32ri 2118251U, // SAL64m1 2380395U, // SAL64mCL 283243U, // SAL64mi 2101867U, // SAL64r1 2364011U, // SAL64rCL 4461163U, // SAL64ri 2122347U, // SAL8m1 2384491U, // SAL8mCL 287339U, // SAL8mi 2101867U, // SAL8r1 2364011U, // SAL8rCL 4461163U, // SAL8ri 2910U, // SALC 2106243U, // SAR16m1 2368387U, // SAR16mCL 271235U, // SAR16mi 2102147U, // SAR16r1 2364291U, // SAR16rCL 4461443U, // SAR16ri 2114435U, // SAR32m1 2376579U, // SAR32mCL 279427U, // SAR32mi 2102147U, // SAR32r1 2364291U, // SAR32rCL 4461443U, // SAR32ri 2118531U, // SAR64m1 2380675U, // SAR64mCL 283523U, // SAR64mi 2102147U, // SAR64r1 2364291U, // SAR64rCL 4461443U, // SAR64ri 2122627U, // SAR8m1 2384771U, // SAR8mCL 287619U, // SAR8mi 2102147U, // SAR8r1 2364291U, // SAR8rCL 4461443U, // SAR8ri 1770263809U, // SARX32rm 700716289U, // SARX32rr 1778652417U, // SARX64rm 700716289U, // SARX64rr 5553U, // SBB16i16 270444U, // SBB16mi 270444U, // SBB16mi8 270444U, // SBB16mr 4468844U, // SBB16ri 4468844U, // SBB16ri8 8663148U, // SBB16rm 4468844U, // SBB16rr 4460652U, // SBB16rr_REV 5687U, // SBB32i32 278636U, // SBB32mi 278636U, // SBB32mi8 278636U, // SBB32mr 4468844U, // SBB32ri 4468844U, // SBB32ri8 12857452U, // SBB32rm 4468844U, // SBB32rr 4460652U, // SBB32rr_REV 5835U, // SBB64i32 282732U, // SBB64mi32 282732U, // SBB64mi8 282732U, // SBB64mr 4468844U, // SBB64ri32 4468844U, // SBB64ri8 17051756U, // SBB64rm 4468844U, // SBB64rr 4460652U, // SBB64rr_REV 5429U, // SBB8i8 286828U, // SBB8mi 286828U, // SBB8mi8 286828U, // SBB8mr 4468844U, // SBB8ri 4468844U, // SBB8ri8 21246060U, // SBB8rm 4468844U, // SBB8rr 4460652U, // SBB8rr_REV 58686U, // SCASB 63081U, // SCASL 120594U, // SCASQ 67105U, // SCASW 3439U, // SEG_ALLOCA_32 3439U, // SEG_ALLOCA_64 3056U, // SEH_EndPrologue 3042U, // SEH_Epilogue 6096U, // SEH_PushFrame 6141U, // SEH_PushReg 29628399U, // SEH_SaveReg 29628313U, // SEH_SaveXMM 29628384U, // SEH_SetFrame 6079U, // SEH_StackAlloc 24915U, // SETAEm 4435U, // SETAEr 24648U, // SETAm 4168U, // SETAr 24935U, // SETBEm 4455U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 24720U, // SETBm 4240U, // SETBr 25069U, // SETEm 4589U, // SETEr 24955U, // SETGEm 4475U, // SETGEr 25135U, // SETGm 4655U, // SETGr 24979U, // SETLEm 4499U, // SETLEr 25255U, // SETLm 4775U, // SETLr 25007U, // SETNEm 4527U, // SETNEr 25301U, // SETNOm 4821U, // SETNOr 25373U, // SETNPm 4893U, // SETNPr 25605U, // SETNSm 5125U, // SETNSr 25316U, // SETOm 4836U, // SETOr 25404U, // SETPm 4924U, // SETPr 25639U, // SETSm 5159U, // SETSr 54334U, // SGDT16m 54334U, // SGDT32m 54334U, // SGDT64m 2105973U, // SHL16m1 2368117U, // SHL16mCL 270965U, // SHL16mi 2101877U, // SHL16r1 2364021U, // SHL16rCL 4461173U, // SHL16ri 2114165U, // SHL32m1 2376309U, // SHL32mCL 279157U, // SHL32mi 2101877U, // SHL32r1 2364021U, // SHL32rCL 4461173U, // SHL32ri 2118261U, // SHL64m1 2380405U, // SHL64mCL 283253U, // SHL64mi 2101877U, // SHL64r1 2364021U, // SHL64rCL 4461173U, // SHL64ri 2122357U, // SHL8m1 2384501U, // SHL8mCL 287349U, // SHL8mi 2101877U, // SHL8r1 2364021U, // SHL8rCL 4461173U, // SHL8ri 268706055U, // SHLD16mrCL 1745101063U, // SHLD16mri8 272896263U, // SHLD16rrCL 2286162183U, // SHLD16rri8 268714247U, // SHLD32mrCL 1745109255U, // SHLD32mri8 272896263U, // SHLD32rrCL 2286162183U, // SHLD32rri8 268718343U, // SHLD64mrCL 1745113351U, // SHLD64mri8 272896263U, // SHLD64rrCL 2286162183U, // SHLD64rri8 1770263791U, // SHLX32rm 700716271U, // SHLX32rr 1778652399U, // SHLX64rm 700716271U, // SHLX64rr 2106260U, // SHR16m1 2368404U, // SHR16mCL 271252U, // SHR16mi 2102164U, // SHR16r1 2364308U, // SHR16rCL 4461460U, // SHR16ri 2114452U, // SHR32m1 2376596U, // SHR32mCL 279444U, // SHR32mi 2102164U, // SHR32r1 2364308U, // SHR32rCL 4461460U, // SHR32ri 2118548U, // SHR64m1 2380692U, // SHR64mCL 283540U, // SHR64mi 2102164U, // SHR64r1 2364308U, // SHR64rCL 4461460U, // SHR64ri 2122644U, // SHR8m1 2384788U, // SHR8mCL 287636U, // SHR8mi 2102164U, // SHR8r1 2364308U, // SHR8rCL 4461460U, // SHR8ri 268706085U, // SHRD16mrCL 1745101093U, // SHRD16mri8 272896293U, // SHRD16rrCL 2286162213U, // SHRD16rri8 268714277U, // SHRD32mrCL 1745109285U, // SHRD32mri8 272896293U, // SHRD32rrCL 2286162213U, // SHRD32rri8 268718373U, // SHRD64mrCL 1745113381U, // SHRD64mri8 272896293U, // SHRD64rrCL 2286162213U, // SHRD64rri8 1770263815U, // SHRX32rm 700716295U, // SHRX32rr 1778652423U, // SHRX64rm 700716295U, // SHRX64rr 54346U, // SIDT16m 54346U, // SIDT32m 54346U, // SIDT64m 3630U, // SKINIT 9302U, // SLDT16m 5206U, // SLDT16r 5206U, // SLDT32r 9302U, // SLDT64m 5206U, // SLDT64r 9416U, // SMSW16m 5320U, // SMSW16r 5320U, // SMSW32r 5320U, // SMSW64r 2888U, // STAC 2942U, // STC 2995U, // STD 3126U, // STGI 3135U, // STI 1892475U, // STOSB 1372465U, // STOSL 1692512U, // STOSQ 1115348U, // STOSW 5062U, // STR16r 5062U, // STR32r 5062U, // STR64r 9158U, // STRm 5562U, // SUB16i16 270486U, // SUB16mi 270486U, // SUB16mi8 270486U, // SUB16mr 4468886U, // SUB16ri 4468886U, // SUB16ri8 8663190U, // SUB16rm 4468886U, // SUB16rr 4460694U, // SUB16rr_REV 5697U, // SUB32i32 278678U, // SUB32mi 278678U, // SUB32mi8 278678U, // SUB32mr 4468886U, // SUB32ri 4468886U, // SUB32ri8 12857494U, // SUB32rm 4468886U, // SUB32rr 4460694U, // SUB32rr_REV 5845U, // SUB64i32 282774U, // SUB64mi32 282774U, // SUB64mi8 282774U, // SUB64mr 4468886U, // SUB64ri32 4468886U, // SUB64ri8 17051798U, // SUB64rm 4468886U, // SUB64rr 4460694U, // SUB64rr_REV 5460U, // SUB8i8 286870U, // SUB8mi 286870U, // SUB8mi8 286870U, // SUB8mr 4468886U, // SUB8ri 4468886U, // SUB8ri8 21246102U, // SUB8rm 4468886U, // SUB8rr 4460694U, // SUB8rr_REV 3432U, // SWAPGS 3198U, // SYSCALL 3325U, // SYSENTER 3524U, // SYSEXIT 3524U, // SYSEXIT64 3509U, // SYSRET 3509U, // SYSRET64 25432264U, // T1MSKC32rm 29626568U, // T1MSKC32rr 33820872U, // T1MSKC64rm 29626568U, // T1MSKC64rr 29453U, // TAILJMPd 29453U, // TAILJMPd64 29447U, // TAILJMPd64_REX 17165U, // TAILJMPm 21261U, // TAILJMPm64 21255U, // TAILJMPm64_REX 0U, // TAILJMPr 4877U, // TAILJMPr64 4871U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 5646U, // TEST16i16 271511U, // TEST16mi 271511U, // TEST16mi_alt 29627543U, // TEST16ri 29627543U, // TEST16ri_alt 124055U, // TEST16rm 29627543U, // TEST16rr 5814U, // TEST32i32 279703U, // TEST32mi 279703U, // TEST32mi_alt 29627543U, // TEST32ri 29627543U, // TEST32ri_alt 128151U, // TEST32rm 29627543U, // TEST32rr 5953U, // TEST64i32 283799U, // TEST64mi32 283799U, // TEST64mi32_alt 29627543U, // TEST64ri32 29627543U, // TEST64ri32_alt 132247U, // TEST64rm 29627543U, // TEST64rr 5534U, // TEST8i8 287895U, // TEST8mi 287895U, // TEST8mi_alt 29627543U, // TEST8ri 0U, // TEST8ri_NOREX 29627543U, // TEST8ri_alt 136343U, // TEST8rm 29627543U, // TEST8rr 2568U, // TLSCall_32 2658U, // TLSCall_64 2581U, // TLS_addr32 2671U, // TLS_addr64 2594U, // TLS_base_addr32 2684U, // TLS_base_addr64 2612U, // TRAP 38016104U, // TZCNT16rm 29627496U, // TZCNT16rr 25433192U, // TZCNT32rm 29627496U, // TZCNT32rr 33821800U, // TZCNT64rm 29627496U, // TZCNT64rr 25432676U, // TZMSK32rm 29626980U, // TZMSK32rr 33821284U, // TZMSK64rm 29626980U, // TZMSK64rr 2822U, // UD2B 1787041655U, // VAARG_64 700716967U, // VASTART_SAVE_XMM_REGS 9131U, // VERRm 5035U, // VERRr 9404U, // VERWm 5308U, // VERWr 3191U, // VMCALL 21365U, // VMCLEARm 2929U, // VMFUNC 3112U, // VMLAUNCH 3598U, // VMLOAD32 3653U, // VMLOAD64 3183U, // VMMCALL 20749U, // VMPTRLDm 21661U, // VMPTRSTm 278751U, // VMREAD32rm 29626591U, // VMREAD32rr 282847U, // VMREAD64rm 29626591U, // VMREAD64rr 3015U, // VMRESUME 3620U, // VMRUN32 3675U, // VMRUN64 3609U, // VMSAVE32 3664U, // VMSAVE64 25432563U, // VMWRITE32rm 29626867U, // VMWRITE32rr 33821171U, // VMWRITE64rm 29626867U, // VMWRITE64rr 3079U, // VMXOFF 21189U, // VMXON 2999U, // WBINVD 3225U, // WIN_ALLOCA 3139U, // WIN_FTOL_32 3139U, // WIN_FTOL_64 4559U, // WRFSBASE 4559U, // WRFSBASE64 4579U, // WRGSBASE 4579U, // WRGSBASE64 3340U, // WRMSR 270567U, // XADD16rm 29626599U, // XADD16rr 278759U, // XADD32rm 29626599U, // XADD32rr 282855U, // XADD64rm 29626599U, // XADD64rr 286951U, // XADD8rm 29626599U, // XADD8rr 5598U, // XCHG16ar 86557U, // XCHG16rm 139805U, // XCHG16rr 5761U, // XCHG32ar 5761U, // XCHG32ar64 90653U, // XCHG32rm 139805U, // XCHG32rr 5885U, // XCHG64ar 94749U, // XCHG64rm 139805U, // XCHG64rr 98845U, // XCHG8rm 139805U, // XCHG8rr 2893U, // XCRYPTCBC 2837U, // XCRYPTCFB 3346U, // XCRYPTCTR 2827U, // XCRYPTECB 2847U, // XCRYPTOFB 3536U, // XGETBV 2877U, // XLAT 5625U, // XOR16i16 271270U, // XOR16mi 271270U, // XOR16mi8 271270U, // XOR16mr 4469670U, // XOR16ri 4469670U, // XOR16ri8 8663974U, // XOR16rm 4469670U, // XOR16rr 4461478U, // XOR16rr_REV 5791U, // XOR32i32 279462U, // XOR32mi 279462U, // XOR32mi8 279462U, // XOR32mr 4469670U, // XOR32ri 4469670U, // XOR32ri8 12858278U, // XOR32rm 4469670U, // XOR32rr 4461478U, // XOR32rr_REV 5930U, // XOR64i32 283558U, // XOR64mi32 283558U, // XOR64mi8 283558U, // XOR64mr 4469670U, // XOR64ri32 4469670U, // XOR64ri8 17052582U, // XOR64rm 4469670U, // XOR64rr 4461478U, // XOR64rr_REV 5513U, // XOR8i8 287654U, // XOR8mi 287654U, // XOR8mi8 287654U, // XOR8mr 4469670U, // XOR8ri 4469670U, // XOR8ri8 21246886U, // XOR8rm 4469670U, // XOR8rr 4461478U, // XOR8rr_REV 54174U, // XRSTOR 53268U, // XRSTOR64 54292U, // XRSTORS 53288U, // XRSTORS64 53756U, // XSAVE 53259U, // XSAVE64 53426U, // XSAVEC 53249U, // XSAVEC64 54401U, // XSAVEOPT 53299U, // XSAVEOPT64 54250U, // XSAVES 53278U, // XSAVES64 3543U, // XSETBV 2520U, // XSHA1 2715U, // XSHA256 3035U, // XSTORE 0U }; static const uint8_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 0U, // AAA 0U, // AAD8i8 0U, // AAM8i8 0U, // AAS 0U, // ACQUIRE_MOV16rm 0U, // ACQUIRE_MOV32rm 0U, // ACQUIRE_MOV64rm 0U, // ACQUIRE_MOV8rm 0U, // ADC16i16 0U, // ADC16mi 0U, // ADC16mi8 0U, // ADC16mr 0U, // ADC16ri 0U, // ADC16ri8 0U, // ADC16rm 0U, // ADC16rr 0U, // ADC16rr_REV 0U, // ADC32i32 0U, // ADC32mi 0U, // ADC32mi8 0U, // ADC32mr 0U, // ADC32ri 0U, // ADC32ri8 0U, // ADC32rm 0U, // ADC32rr 0U, // ADC32rr_REV 0U, // ADC64i32 0U, // ADC64mi32 0U, // ADC64mi8 0U, // ADC64mr 0U, // ADC64ri32 0U, // ADC64ri8 0U, // ADC64rm 0U, // ADC64rr 0U, // ADC64rr_REV 0U, // ADC8i8 0U, // ADC8mi 0U, // ADC8mi8 0U, // ADC8mr 0U, // ADC8ri 0U, // ADC8ri8 0U, // ADC8rm 0U, // ADC8rr 0U, // ADC8rr_REV 0U, // ADCX32rm 0U, // ADCX32rr 0U, // ADCX64rm 0U, // ADCX64rr 0U, // ADD16i16 0U, // ADD16mi 0U, // ADD16mi8 0U, // ADD16mr 0U, // ADD16ri 0U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 0U, // ADD16rm 0U, // ADD16rr 0U, // ADD16rr_DB 0U, // ADD16rr_REV 0U, // ADD32i32 0U, // ADD32mi 0U, // ADD32mi8 0U, // ADD32mr 0U, // ADD32ri 0U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 0U, // ADD32rm 0U, // ADD32rr 0U, // ADD32rr_DB 0U, // ADD32rr_REV 0U, // ADD64i32 0U, // ADD64mi32 0U, // ADD64mi8 0U, // ADD64mr 0U, // ADD64ri32 0U, // ADD64ri32_DB 0U, // ADD64ri8 0U, // ADD64ri8_DB 0U, // ADD64rm 0U, // ADD64rr 0U, // ADD64rr_DB 0U, // ADD64rr_REV 0U, // ADD8i8 0U, // ADD8mi 0U, // ADD8mi8 0U, // ADD8mr 0U, // ADD8ri 0U, // ADD8ri8 0U, // ADD8rm 0U, // ADD8rr 0U, // ADD8rr_REV 0U, // ADJCALLSTACKDOWN32 0U, // ADJCALLSTACKDOWN64 0U, // ADJCALLSTACKUP32 0U, // ADJCALLSTACKUP64 0U, // ADOX32rm 0U, // ADOX32rr 0U, // ADOX64rm 0U, // ADOX64rr 0U, // AND16i16 0U, // AND16mi 0U, // AND16mi8 0U, // AND16mr 0U, // AND16ri 0U, // AND16ri8 0U, // AND16rm 0U, // AND16rr 0U, // AND16rr_REV 0U, // AND32i32 0U, // AND32mi 0U, // AND32mi8 0U, // AND32mr 0U, // AND32ri 0U, // AND32ri8 0U, // AND32rm 0U, // AND32rr 0U, // AND32rr_REV 0U, // AND64i32 0U, // AND64mi32 0U, // AND64mi8 0U, // AND64mr 0U, // AND64ri32 0U, // AND64ri8 0U, // AND64rm 0U, // AND64rr 0U, // AND64rr_REV 0U, // AND8i8 0U, // AND8mi 0U, // AND8mi8 0U, // AND8mr 0U, // AND8ri 0U, // AND8ri8 0U, // AND8rm 0U, // AND8rr 0U, // AND8rr_REV 0U, // ANDN32rm 0U, // ANDN32rr 0U, // ANDN64rm 0U, // ANDN64rr 0U, // ARPL16mr 0U, // ARPL16rr 0U, // BEXTR32rm 0U, // BEXTR32rr 0U, // BEXTR64rm 0U, // BEXTR64rr 0U, // BEXTRI32mi 0U, // BEXTRI32ri 0U, // BEXTRI64mi 0U, // BEXTRI64ri 0U, // BLCFILL32rm 0U, // BLCFILL32rr 0U, // BLCFILL64rm 0U, // BLCFILL64rr 0U, // BLCI32rm 0U, // BLCI32rr 0U, // BLCI64rm 0U, // BLCI64rr 0U, // BLCIC32rm 0U, // BLCIC32rr 0U, // BLCIC64rm 0U, // BLCIC64rr 0U, // BLCMSK32rm 0U, // BLCMSK32rr 0U, // BLCMSK64rm 0U, // BLCMSK64rr 0U, // BLCS32rm 0U, // BLCS32rr 0U, // BLCS64rm 0U, // BLCS64rr 0U, // BLSFILL32rm 0U, // BLSFILL32rr 0U, // BLSFILL64rm 0U, // BLSFILL64rr 0U, // BLSI32rm 0U, // BLSI32rr 0U, // BLSI64rm 0U, // BLSI64rr 0U, // BLSIC32rm 0U, // BLSIC32rr 0U, // BLSIC64rm 0U, // BLSIC64rr 0U, // BLSMSK32rm 0U, // BLSMSK32rr 0U, // BLSMSK64rm 0U, // BLSMSK64rr 0U, // BLSR32rm 0U, // BLSR32rr 0U, // BLSR64rm 0U, // BLSR64rr 0U, // BOUNDS16rm 0U, // BOUNDS32rm 0U, // BSF16rm 0U, // BSF16rr 0U, // BSF32rm 0U, // BSF32rr 0U, // BSF64rm 0U, // BSF64rr 0U, // BSR16rm 0U, // BSR16rr 0U, // BSR32rm 0U, // BSR32rr 0U, // BSR64rm 0U, // BSR64rr 0U, // BSWAP32r 0U, // BSWAP64r 0U, // BT16mi8 0U, // BT16mr 0U, // BT16ri8 0U, // BT16rr 0U, // BT32mi8 0U, // BT32mr 0U, // BT32ri8 0U, // BT32rr 0U, // BT64mi8 0U, // BT64mr 0U, // BT64ri8 0U, // BT64rr 0U, // BTC16mi8 0U, // BTC16mr 0U, // BTC16ri8 0U, // BTC16rr 0U, // BTC32mi8 0U, // BTC32mr 0U, // BTC32ri8 0U, // BTC32rr 0U, // BTC64mi8 0U, // BTC64mr 0U, // BTC64ri8 0U, // BTC64rr 0U, // BTR16mi8 0U, // BTR16mr 0U, // BTR16ri8 0U, // BTR16rr 0U, // BTR32mi8 0U, // BTR32mr 0U, // BTR32ri8 0U, // BTR32rr 0U, // BTR64mi8 0U, // BTR64mr 0U, // BTR64ri8 0U, // BTR64rr 0U, // BTS16mi8 0U, // BTS16mr 0U, // BTS16ri8 0U, // BTS16rr 0U, // BTS32mi8 0U, // BTS32mr 0U, // BTS32ri8 0U, // BTS32rr 0U, // BTS64mi8 0U, // BTS64mr 0U, // BTS64ri8 0U, // BTS64rr 0U, // BZHI32rm 0U, // BZHI32rr 0U, // BZHI64rm 0U, // BZHI64rr 0U, // CALL16m 0U, // CALL16r 0U, // CALL32m 0U, // CALL32r 0U, // CALL64m 0U, // CALL64pcrel32 0U, // CALL64r 0U, // CALLpcrel16 0U, // CALLpcrel32 0U, // CBW 0U, // CDQ 0U, // CDQE 0U, // CLAC 0U, // CLC 0U, // CLD 0U, // CLFLUSHOPT 0U, // CLGI 0U, // CLI 0U, // CLTS 0U, // CLWB 0U, // CMC 0U, // CMOVA16rm 0U, // CMOVA16rr 0U, // CMOVA32rm 0U, // CMOVA32rr 0U, // CMOVA64rm 0U, // CMOVA64rr 0U, // CMOVAE16rm 0U, // CMOVAE16rr 0U, // CMOVAE32rm 0U, // CMOVAE32rr 0U, // CMOVAE64rm 0U, // CMOVAE64rr 0U, // CMOVB16rm 0U, // CMOVB16rr 0U, // CMOVB32rm 0U, // CMOVB32rr 0U, // CMOVB64rm 0U, // CMOVB64rr 0U, // CMOVBE16rm 0U, // CMOVBE16rr 0U, // CMOVBE32rm 0U, // CMOVBE32rr 0U, // CMOVBE64rm 0U, // CMOVBE64rr 0U, // CMOVE16rm 0U, // CMOVE16rr 0U, // CMOVE32rm 0U, // CMOVE32rr 0U, // CMOVE64rm 0U, // CMOVE64rr 0U, // CMOVG16rm 0U, // CMOVG16rr 0U, // CMOVG32rm 0U, // CMOVG32rr 0U, // CMOVG64rm 0U, // CMOVG64rr 0U, // CMOVGE16rm 0U, // CMOVGE16rr 0U, // CMOVGE32rm 0U, // CMOVGE32rr 0U, // CMOVGE64rm 0U, // CMOVGE64rr 0U, // CMOVL16rm 0U, // CMOVL16rr 0U, // CMOVL32rm 0U, // CMOVL32rr 0U, // CMOVL64rm 0U, // CMOVL64rr 0U, // CMOVLE16rm 0U, // CMOVLE16rr 0U, // CMOVLE32rm 0U, // CMOVLE32rr 0U, // CMOVLE64rm 0U, // CMOVLE64rr 0U, // CMOVNE16rm 0U, // CMOVNE16rr 0U, // CMOVNE32rm 0U, // CMOVNE32rr 0U, // CMOVNE64rm 0U, // CMOVNE64rr 0U, // CMOVNO16rm 0U, // CMOVNO16rr 0U, // CMOVNO32rm 0U, // CMOVNO32rr 0U, // CMOVNO64rm 0U, // CMOVNO64rr 0U, // CMOVNP16rm 0U, // CMOVNP16rr 0U, // CMOVNP32rm 0U, // CMOVNP32rr 0U, // CMOVNP64rm 0U, // CMOVNP64rr 0U, // CMOVNS16rm 0U, // CMOVNS16rr 0U, // CMOVNS32rm 0U, // CMOVNS32rr 0U, // CMOVNS64rm 0U, // CMOVNS64rr 0U, // CMOVO16rm 0U, // CMOVO16rr 0U, // CMOVO32rm 0U, // CMOVO32rr 0U, // CMOVO64rm 0U, // CMOVO64rr 0U, // CMOVP16rm 0U, // CMOVP16rr 0U, // CMOVP32rm 0U, // CMOVP32rr 0U, // CMOVP64rm 0U, // CMOVP64rr 0U, // CMOVS16rm 0U, // CMOVS16rr 0U, // CMOVS32rm 0U, // CMOVS32rr 0U, // CMOVS64rm 0U, // CMOVS64rr 0U, // CMOV_FR32 0U, // CMOV_FR64 0U, // CMOV_GR16 0U, // CMOV_GR32 0U, // CMOV_GR8 0U, // CMOV_RFP32 0U, // CMOV_RFP64 0U, // CMOV_RFP80 0U, // CMOV_V16F32 0U, // CMOV_V2F64 0U, // CMOV_V2I64 0U, // CMOV_V4F32 0U, // CMOV_V4F64 0U, // CMOV_V4I64 0U, // CMOV_V8F32 0U, // CMOV_V8F64 0U, // CMOV_V8I64 0U, // CMP16i16 0U, // CMP16mi 0U, // CMP16mi8 0U, // CMP16mr 0U, // CMP16ri 0U, // CMP16ri8 0U, // CMP16rm 0U, // CMP16rr 0U, // CMP16rr_REV 0U, // CMP32i32 0U, // CMP32mi 0U, // CMP32mi8 0U, // CMP32mr 0U, // CMP32ri 0U, // CMP32ri8 0U, // CMP32rm 0U, // CMP32rr 0U, // CMP32rr_REV 0U, // CMP64i32 0U, // CMP64mi32 0U, // CMP64mi8 0U, // CMP64mr 0U, // CMP64ri32 0U, // CMP64ri8 0U, // CMP64rm 0U, // CMP64rr 0U, // CMP64rr_REV 0U, // CMP8i8 0U, // CMP8mi 0U, // CMP8mi8 0U, // CMP8mr 0U, // CMP8ri 0U, // CMP8ri8 0U, // CMP8rm 0U, // CMP8rr 0U, // CMP8rr_REV 0U, // CMPSB 0U, // CMPSL 0U, // CMPSQ 0U, // CMPSW 0U, // CMPXCHG16B 0U, // CMPXCHG16rm 0U, // CMPXCHG16rr 0U, // CMPXCHG32rm 0U, // CMPXCHG32rr 0U, // CMPXCHG64rm 0U, // CMPXCHG64rr 0U, // CMPXCHG8B 0U, // CMPXCHG8rm 0U, // CMPXCHG8rr 0U, // CPUID 0U, // CQO 0U, // CWD 0U, // CWDE 0U, // DAA 0U, // DAS 0U, // DATA16_PREFIX 0U, // DEC16m 0U, // DEC16r 0U, // DEC16r_alt 0U, // DEC32m 0U, // DEC32r 0U, // DEC32r_alt 0U, // DEC64m 0U, // DEC64r 0U, // DEC8m 0U, // DEC8r 0U, // DIV16m 0U, // DIV16r 0U, // DIV32m 0U, // DIV32r 0U, // DIV64m 0U, // DIV64r 0U, // DIV8m 0U, // DIV8r 0U, // EH_RETURN 0U, // EH_RETURN64 0U, // EH_SjLj_LongJmp32 0U, // EH_SjLj_LongJmp64 0U, // EH_SjLj_SetJmp32 0U, // EH_SjLj_SetJmp64 0U, // EH_SjLj_Setup 0U, // ENTER 0U, // FARCALL16i 0U, // FARCALL16m 0U, // FARCALL32i 0U, // FARCALL32m 0U, // FARCALL64 0U, // FARJMP16i 0U, // FARJMP16m 0U, // FARJMP32i 0U, // FARJMP32m 0U, // FARJMP64 0U, // FSETPM 0U, // GETSEC 0U, // HLT 0U, // IDIV16m 0U, // IDIV16r 0U, // IDIV32m 0U, // IDIV32r 0U, // IDIV64m 0U, // IDIV64r 0U, // IDIV8m 0U, // IDIV8r 0U, // IMUL16m 0U, // IMUL16r 0U, // IMUL16rm 0U, // IMUL16rmi 0U, // IMUL16rmi8 0U, // IMUL16rr 0U, // IMUL16rri 0U, // IMUL16rri8 0U, // IMUL32m 0U, // IMUL32r 0U, // IMUL32rm 0U, // IMUL32rmi 0U, // IMUL32rmi8 0U, // IMUL32rr 0U, // IMUL32rri 0U, // IMUL32rri8 0U, // IMUL64m 0U, // IMUL64r 0U, // IMUL64rm 0U, // IMUL64rmi32 0U, // IMUL64rmi8 0U, // IMUL64rr 0U, // IMUL64rri32 0U, // IMUL64rri8 0U, // IMUL8m 0U, // IMUL8r 0U, // IN16ri 0U, // IN16rr 0U, // IN32ri 0U, // IN32rr 0U, // IN8ri 0U, // IN8rr 0U, // INC16m 0U, // INC16r 0U, // INC16r_alt 0U, // INC32m 0U, // INC32r 0U, // INC32r_alt 0U, // INC64m 0U, // INC64r 0U, // INC8m 0U, // INC8r 0U, // INSB 0U, // INSL 0U, // INSW 0U, // INT 0U, // INT1 0U, // INT3 0U, // INTO 0U, // INVD 0U, // INVEPT32 0U, // INVEPT64 0U, // INVLPG 0U, // INVLPGA32 0U, // INVLPGA64 0U, // INVPCID32 0U, // INVPCID64 0U, // INVVPID32 0U, // INVVPID64 0U, // IRET16 0U, // IRET32 0U, // IRET64 0U, // Int_MemBarrier 0U, // JAE_1 0U, // JAE_2 0U, // JAE_4 0U, // JA_1 0U, // JA_2 0U, // JA_4 0U, // JBE_1 0U, // JBE_2 0U, // JBE_4 0U, // JB_1 0U, // JB_2 0U, // JB_4 0U, // JCXZ 0U, // JECXZ 0U, // JE_1 0U, // JE_2 0U, // JE_4 0U, // JGE_1 0U, // JGE_2 0U, // JGE_4 0U, // JG_1 0U, // JG_2 0U, // JG_4 0U, // JLE_1 0U, // JLE_2 0U, // JLE_4 0U, // JL_1 0U, // JL_2 0U, // JL_4 0U, // JMP16m 0U, // JMP16r 0U, // JMP32m 0U, // JMP32r 0U, // JMP64m 0U, // JMP64r 0U, // JMP_1 0U, // JMP_2 0U, // JMP_4 0U, // JNE_1 0U, // JNE_2 0U, // JNE_4 0U, // JNO_1 0U, // JNO_2 0U, // JNO_4 0U, // JNP_1 0U, // JNP_2 0U, // JNP_4 0U, // JNS_1 0U, // JNS_2 0U, // JNS_4 0U, // JO_1 0U, // JO_2 0U, // JO_4 0U, // JP_1 0U, // JP_2 0U, // JP_4 0U, // JRCXZ 0U, // JS_1 0U, // JS_2 0U, // JS_4 0U, // LAHF 0U, // LAR16rm 0U, // LAR16rr 0U, // LAR32rm 0U, // LAR32rr 0U, // LAR64rm 0U, // LAR64rr 0U, // LCMPXCHG16 0U, // LCMPXCHG16B 0U, // LCMPXCHG32 0U, // LCMPXCHG64 0U, // LCMPXCHG8 0U, // LCMPXCHG8B 0U, // LDS16rm 0U, // LDS32rm 0U, // LEA16r 0U, // LEA32r 0U, // LEA64_32r 0U, // LEA64r 0U, // LEAVE 0U, // LEAVE64 0U, // LES16rm 0U, // LES32rm 0U, // LFS16rm 0U, // LFS32rm 0U, // LFS64rm 0U, // LGDT16m 0U, // LGDT32m 0U, // LGDT64m 0U, // LGS16rm 0U, // LGS32rm 0U, // LGS64rm 0U, // LIDT16m 0U, // LIDT32m 0U, // LIDT64m 0U, // LLDT16m 0U, // LLDT16r 0U, // LMSW16m 0U, // LMSW16r 0U, // LOCK_ADD16mi 0U, // LOCK_ADD16mi8 0U, // LOCK_ADD16mr 0U, // LOCK_ADD32mi 0U, // LOCK_ADD32mi8 0U, // LOCK_ADD32mr 0U, // LOCK_ADD64mi32 0U, // LOCK_ADD64mi8 0U, // LOCK_ADD64mr 0U, // LOCK_ADD8mi 0U, // LOCK_ADD8mr 0U, // LOCK_AND16mi 0U, // LOCK_AND16mi8 0U, // LOCK_AND16mr 0U, // LOCK_AND32mi 0U, // LOCK_AND32mi8 0U, // LOCK_AND32mr 0U, // LOCK_AND64mi32 0U, // LOCK_AND64mi8 0U, // LOCK_AND64mr 0U, // LOCK_AND8mi 0U, // LOCK_AND8mr 0U, // LOCK_DEC16m 0U, // LOCK_DEC32m 0U, // LOCK_DEC64m 0U, // LOCK_DEC8m 0U, // LOCK_INC16m 0U, // LOCK_INC32m 0U, // LOCK_INC64m 0U, // LOCK_INC8m 0U, // LOCK_OR16mi 0U, // LOCK_OR16mi8 0U, // LOCK_OR16mr 0U, // LOCK_OR32mi 0U, // LOCK_OR32mi8 0U, // LOCK_OR32mr 0U, // LOCK_OR64mi32 0U, // LOCK_OR64mi8 0U, // LOCK_OR64mr 0U, // LOCK_OR8mi 0U, // LOCK_OR8mr 0U, // LOCK_PREFIX 0U, // LOCK_SUB16mi 0U, // LOCK_SUB16mi8 0U, // LOCK_SUB16mr 0U, // LOCK_SUB32mi 0U, // LOCK_SUB32mi8 0U, // LOCK_SUB32mr 0U, // LOCK_SUB64mi32 0U, // LOCK_SUB64mi8 0U, // LOCK_SUB64mr 0U, // LOCK_SUB8mi 0U, // LOCK_SUB8mr 0U, // LOCK_XOR16mi 0U, // LOCK_XOR16mi8 0U, // LOCK_XOR16mr 0U, // LOCK_XOR32mi 0U, // LOCK_XOR32mi8 0U, // LOCK_XOR32mr 0U, // LOCK_XOR64mi32 0U, // LOCK_XOR64mi8 0U, // LOCK_XOR64mr 0U, // LOCK_XOR8mi 0U, // LOCK_XOR8mr 0U, // LODSB 0U, // LODSL 0U, // LODSQ 0U, // LODSW 0U, // LOOP 0U, // LOOPE 0U, // LOOPNE 0U, // LRETIL 0U, // LRETIQ 0U, // LRETIW 0U, // LRETL 0U, // LRETQ 0U, // LRETW 0U, // LSL16rm 0U, // LSL16rr 0U, // LSL32rm 0U, // LSL32rr 0U, // LSL64rm 0U, // LSL64rr 0U, // LSS16rm 0U, // LSS32rm 0U, // LSS64rm 0U, // LTRm 0U, // LTRr 0U, // LXADD16 0U, // LXADD32 0U, // LXADD64 0U, // LXADD8 0U, // LZCNT16rm 0U, // LZCNT16rr 0U, // LZCNT32rm 0U, // LZCNT32rr 0U, // LZCNT64rm 0U, // LZCNT64rr 0U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 0U, // MOV16ao16 0U, // MOV16ao32 0U, // MOV16ao64 0U, // MOV16mi 0U, // MOV16mr 0U, // MOV16ms 0U, // MOV16o16a 0U, // MOV16o32a 0U, // MOV16o64a 0U, // MOV16ri 0U, // MOV16ri_alt 0U, // MOV16rm 0U, // MOV16rr 0U, // MOV16rr_REV 0U, // MOV16rs 0U, // MOV16sm 0U, // MOV16sr 0U, // MOV32ao16 0U, // MOV32ao32 0U, // MOV32ao64 0U, // MOV32cr 0U, // MOV32dr 0U, // MOV32mi 0U, // MOV32mr 0U, // MOV32ms 0U, // MOV32o16a 0U, // MOV32o32a 0U, // MOV32o64a 0U, // MOV32r0 0U, // MOV32rc 0U, // MOV32rd 0U, // MOV32ri 0U, // MOV32ri64 0U, // MOV32ri_alt 0U, // MOV32rm 0U, // MOV32rr 0U, // MOV32rr_REV 0U, // MOV32rs 0U, // MOV32sm 0U, // MOV32sr 0U, // MOV64ao32 0U, // MOV64ao64 0U, // MOV64cr 0U, // MOV64dr 0U, // MOV64mi32 0U, // MOV64mr 0U, // MOV64ms 0U, // MOV64o32a 0U, // MOV64o64a 0U, // MOV64rc 0U, // MOV64rd 0U, // MOV64ri 0U, // MOV64ri32 0U, // MOV64rm 0U, // MOV64rr 0U, // MOV64rr_REV 0U, // MOV64rs 0U, // MOV64sm 0U, // MOV64sr 0U, // MOV8ao16 0U, // MOV8ao32 0U, // MOV8ao64 0U, // MOV8mi 0U, // MOV8mr 0U, // MOV8mr_NOREX 0U, // MOV8o16a 0U, // MOV8o32a 0U, // MOV8o64a 0U, // MOV8ri 0U, // MOV8ri_alt 0U, // MOV8rm 0U, // MOV8rm_NOREX 0U, // MOV8rr 0U, // MOV8rr_NOREX 0U, // MOV8rr_REV 0U, // MOVBE16mr 0U, // MOVBE16rm 0U, // MOVBE32mr 0U, // MOVBE32rm 0U, // MOVBE64mr 0U, // MOVBE64rm 0U, // MOVPC32r 0U, // MOVSB 0U, // MOVSL 0U, // MOVSQ 0U, // MOVSW 0U, // MOVSX16rm8 0U, // MOVSX16rr8 0U, // MOVSX32_NOREXrm8 0U, // MOVSX32_NOREXrr8 0U, // MOVSX32rm16 0U, // MOVSX32rm8 0U, // MOVSX32rr16 0U, // MOVSX32rr8 0U, // MOVSX64_NOREXrr32 0U, // MOVSX64rm16 0U, // MOVSX64rm32 0U, // MOVSX64rm32_alt 0U, // MOVSX64rm8 0U, // MOVSX64rr16 0U, // MOVSX64rr32 0U, // MOVSX64rr8 0U, // MOVZX16rm8 0U, // MOVZX16rr8 0U, // MOVZX32_NOREXrm8 0U, // MOVZX32_NOREXrr8 0U, // MOVZX32rm16 0U, // MOVZX32rm8 0U, // MOVZX32rr16 0U, // MOVZX32rr8 0U, // MOVZX64rm16_Q 0U, // MOVZX64rm8_Q 0U, // MOVZX64rr16_Q 0U, // MOVZX64rr8_Q 0U, // MUL16m 0U, // MUL16r 0U, // MUL32m 0U, // MUL32r 0U, // MUL64m 0U, // MUL64r 0U, // MUL8m 0U, // MUL8r 0U, // MULX32rm 0U, // MULX32rr 0U, // MULX64rm 0U, // MULX64rr 0U, // NEG16m 0U, // NEG16r 0U, // NEG32m 0U, // NEG32r 0U, // NEG64m 0U, // NEG64r 0U, // NEG8m 0U, // NEG8r 0U, // NOOP 0U, // NOOP18_16m4 0U, // NOOP18_16m5 0U, // NOOP18_16m6 0U, // NOOP18_16m7 0U, // NOOP18_16r4 0U, // NOOP18_16r5 0U, // NOOP18_16r6 0U, // NOOP18_16r7 0U, // NOOP18_m4 0U, // NOOP18_m5 0U, // NOOP18_m6 0U, // NOOP18_m7 0U, // NOOP18_r4 0U, // NOOP18_r5 0U, // NOOP18_r6 0U, // NOOP18_r7 0U, // NOOP19rr 0U, // NOOPL 0U, // NOOPL_19 0U, // NOOPL_1a 0U, // NOOPL_1b 0U, // NOOPL_1c 0U, // NOOPL_1d 0U, // NOOPL_1e 0U, // NOOPW 0U, // NOOPW_19 0U, // NOOPW_1a 0U, // NOOPW_1b 0U, // NOOPW_1c 0U, // NOOPW_1d 0U, // NOOPW_1e 0U, // NOT16m 0U, // NOT16r 0U, // NOT32m 0U, // NOT32r 0U, // NOT64m 0U, // NOT64r 0U, // NOT8m 0U, // NOT8r 0U, // OR16i16 0U, // OR16mi 0U, // OR16mi8 0U, // OR16mr 0U, // OR16ri 0U, // OR16ri8 0U, // OR16rm 0U, // OR16rr 0U, // OR16rr_REV 0U, // OR32i32 0U, // OR32mi 0U, // OR32mi8 0U, // OR32mr 0U, // OR32mrLocked 0U, // OR32ri 0U, // OR32ri8 0U, // OR32rm 0U, // OR32rr 0U, // OR32rr_REV 0U, // OR64i32 0U, // OR64mi32 0U, // OR64mi8 0U, // OR64mr 0U, // OR64ri32 0U, // OR64ri8 0U, // OR64rm 0U, // OR64rr 0U, // OR64rr_REV 0U, // OR8i8 0U, // OR8mi 0U, // OR8mi8 0U, // OR8mr 0U, // OR8ri 0U, // OR8ri8 0U, // OR8rm 0U, // OR8rr 0U, // OR8rr_REV 0U, // OUT16ir 0U, // OUT16rr 0U, // OUT32ir 0U, // OUT32rr 0U, // OUT8ir 0U, // OUT8rr 0U, // OUTSB 0U, // OUTSL 0U, // OUTSW 0U, // PCOMMIT 0U, // PDEP32rm 0U, // PDEP32rr 0U, // PDEP64rm 0U, // PDEP64rr 0U, // PEXT32rm 0U, // PEXT32rr 0U, // PEXT64rm 0U, // PEXT64rr 0U, // POP16r 0U, // POP16rmm 0U, // POP16rmr 0U, // POP32r 0U, // POP32rmm 0U, // POP32rmr 0U, // POP64r 0U, // POP64rmm 0U, // POP64rmr 0U, // POPA16 0U, // POPA32 0U, // POPDS16 0U, // POPDS32 0U, // POPES16 0U, // POPES32 0U, // POPF16 0U, // POPF32 0U, // POPF64 0U, // POPFS16 0U, // POPFS32 0U, // POPFS64 0U, // POPGS16 0U, // POPGS32 0U, // POPGS64 0U, // POPSS16 0U, // POPSS32 0U, // PUSH16i8 0U, // PUSH16r 0U, // PUSH16rmm 0U, // PUSH16rmr 0U, // PUSH32i8 0U, // PUSH32r 0U, // PUSH32rmm 0U, // PUSH32rmr 0U, // PUSH64i16 0U, // PUSH64i32 0U, // PUSH64i8 0U, // PUSH64r 0U, // PUSH64rmm 0U, // PUSH64rmr 0U, // PUSHA16 0U, // PUSHA32 0U, // PUSHCS16 0U, // PUSHCS32 0U, // PUSHDS16 0U, // PUSHDS32 0U, // PUSHES16 0U, // PUSHES32 0U, // PUSHF16 0U, // PUSHF32 0U, // PUSHF64 0U, // PUSHFS16 0U, // PUSHFS32 0U, // PUSHFS64 0U, // PUSHGS16 0U, // PUSHGS32 0U, // PUSHGS64 0U, // PUSHSS16 0U, // PUSHSS32 0U, // PUSHi16 0U, // PUSHi32 0U, // RCL16m1 0U, // RCL16mCL 0U, // RCL16mi 0U, // RCL16r1 0U, // RCL16rCL 0U, // RCL16ri 0U, // RCL32m1 0U, // RCL32mCL 0U, // RCL32mi 0U, // RCL32r1 0U, // RCL32rCL 0U, // RCL32ri 0U, // RCL64m1 0U, // RCL64mCL 0U, // RCL64mi 0U, // RCL64r1 0U, // RCL64rCL 0U, // RCL64ri 0U, // RCL8m1 0U, // RCL8mCL 0U, // RCL8mi 0U, // RCL8r1 0U, // RCL8rCL 0U, // RCL8ri 0U, // RCR16m1 0U, // RCR16mCL 0U, // RCR16mi 0U, // RCR16r1 0U, // RCR16rCL 0U, // RCR16ri 0U, // RCR32m1 0U, // RCR32mCL 0U, // RCR32mi 0U, // RCR32r1 0U, // RCR32rCL 0U, // RCR32ri 0U, // RCR64m1 0U, // RCR64mCL 0U, // RCR64mi 0U, // RCR64r1 0U, // RCR64rCL 0U, // RCR64ri 0U, // RCR8m1 0U, // RCR8mCL 0U, // RCR8mi 0U, // RCR8r1 0U, // RCR8rCL 0U, // RCR8ri 0U, // RDFSBASE 0U, // RDFSBASE64 0U, // RDGSBASE 0U, // RDGSBASE64 0U, // RDMSR 0U, // RDPMC 0U, // RDRAND16r 0U, // RDRAND32r 0U, // RDRAND64r 0U, // RDSEED16r 0U, // RDSEED32r 0U, // RDSEED64r 0U, // RDTSC 0U, // RDTSCP 0U, // RELEASE_ADD32mi 0U, // RELEASE_ADD64mi32 0U, // RELEASE_ADD8mi 0U, // RELEASE_AND32mi 0U, // RELEASE_AND64mi32 0U, // RELEASE_AND8mi 0U, // RELEASE_DEC16m 0U, // RELEASE_DEC32m 0U, // RELEASE_DEC64m 0U, // RELEASE_DEC8m 0U, // RELEASE_INC16m 0U, // RELEASE_INC32m 0U, // RELEASE_INC64m 0U, // RELEASE_INC8m 0U, // RELEASE_MOV16mi 0U, // RELEASE_MOV16mr 0U, // RELEASE_MOV32mi 0U, // RELEASE_MOV32mr 0U, // RELEASE_MOV64mi32 0U, // RELEASE_MOV64mr 0U, // RELEASE_MOV8mi 0U, // RELEASE_MOV8mr 0U, // RELEASE_OR32mi 0U, // RELEASE_OR64mi32 0U, // RELEASE_OR8mi 0U, // RELEASE_XOR32mi 0U, // RELEASE_XOR64mi32 0U, // RELEASE_XOR8mi 0U, // REPNE_PREFIX 0U, // REP_MOVSB_32 0U, // REP_MOVSB_64 0U, // REP_MOVSD_32 0U, // REP_MOVSD_64 0U, // REP_MOVSQ_64 0U, // REP_MOVSW_32 0U, // REP_MOVSW_64 0U, // REP_PREFIX 0U, // REP_STOSB_32 0U, // REP_STOSB_64 0U, // REP_STOSD_32 0U, // REP_STOSD_64 0U, // REP_STOSQ_64 0U, // REP_STOSW_32 0U, // REP_STOSW_64 0U, // RETIL 0U, // RETIQ 0U, // RETIW 0U, // RETL 0U, // RETQ 0U, // RETW 0U, // REX64_PREFIX 0U, // ROL16m1 0U, // ROL16mCL 0U, // ROL16mi 0U, // ROL16r1 0U, // ROL16rCL 0U, // ROL16ri 0U, // ROL32m1 0U, // ROL32mCL 0U, // ROL32mi 0U, // ROL32r1 0U, // ROL32rCL 0U, // ROL32ri 0U, // ROL64m1 0U, // ROL64mCL 0U, // ROL64mi 0U, // ROL64r1 0U, // ROL64rCL 0U, // ROL64ri 0U, // ROL8m1 0U, // ROL8mCL 0U, // ROL8mi 0U, // ROL8r1 0U, // ROL8rCL 0U, // ROL8ri 0U, // ROR16m1 0U, // ROR16mCL 0U, // ROR16mi 0U, // ROR16r1 0U, // ROR16rCL 0U, // ROR16ri 0U, // ROR32m1 0U, // ROR32mCL 0U, // ROR32mi 0U, // ROR32r1 0U, // ROR32rCL 0U, // ROR32ri 0U, // ROR64m1 0U, // ROR64mCL 0U, // ROR64mi 0U, // ROR64r1 0U, // ROR64rCL 0U, // ROR64ri 0U, // ROR8m1 0U, // ROR8mCL 0U, // ROR8mi 0U, // ROR8r1 0U, // ROR8rCL 0U, // ROR8ri 0U, // RORX32mi 0U, // RORX32ri 0U, // RORX64mi 0U, // RORX64ri 0U, // RSM 0U, // SAHF 0U, // SAL16m1 0U, // SAL16mCL 0U, // SAL16mi 0U, // SAL16r1 0U, // SAL16rCL 0U, // SAL16ri 0U, // SAL32m1 0U, // SAL32mCL 0U, // SAL32mi 0U, // SAL32r1 0U, // SAL32rCL 0U, // SAL32ri 0U, // SAL64m1 0U, // SAL64mCL 0U, // SAL64mi 0U, // SAL64r1 0U, // SAL64rCL 0U, // SAL64ri 0U, // SAL8m1 0U, // SAL8mCL 0U, // SAL8mi 0U, // SAL8r1 0U, // SAL8rCL 0U, // SAL8ri 0U, // SALC 0U, // SAR16m1 0U, // SAR16mCL 0U, // SAR16mi 0U, // SAR16r1 0U, // SAR16rCL 0U, // SAR16ri 0U, // SAR32m1 0U, // SAR32mCL 0U, // SAR32mi 0U, // SAR32r1 0U, // SAR32rCL 0U, // SAR32ri 0U, // SAR64m1 0U, // SAR64mCL 0U, // SAR64mi 0U, // SAR64r1 0U, // SAR64rCL 0U, // SAR64ri 0U, // SAR8m1 0U, // SAR8mCL 0U, // SAR8mi 0U, // SAR8r1 0U, // SAR8rCL 0U, // SAR8ri 0U, // SARX32rm 0U, // SARX32rr 0U, // SARX64rm 0U, // SARX64rr 0U, // SBB16i16 0U, // SBB16mi 0U, // SBB16mi8 0U, // SBB16mr 0U, // SBB16ri 0U, // SBB16ri8 0U, // SBB16rm 0U, // SBB16rr 0U, // SBB16rr_REV 0U, // SBB32i32 0U, // SBB32mi 0U, // SBB32mi8 0U, // SBB32mr 0U, // SBB32ri 0U, // SBB32ri8 0U, // SBB32rm 0U, // SBB32rr 0U, // SBB32rr_REV 0U, // SBB64i32 0U, // SBB64mi32 0U, // SBB64mi8 0U, // SBB64mr 0U, // SBB64ri32 0U, // SBB64ri8 0U, // SBB64rm 0U, // SBB64rr 0U, // SBB64rr_REV 0U, // SBB8i8 0U, // SBB8mi 0U, // SBB8mi8 0U, // SBB8mr 0U, // SBB8ri 0U, // SBB8ri8 0U, // SBB8rm 0U, // SBB8rr 0U, // SBB8rr_REV 0U, // SCASB 0U, // SCASL 0U, // SCASQ 0U, // SCASW 0U, // SEG_ALLOCA_32 0U, // SEG_ALLOCA_64 0U, // SEH_EndPrologue 0U, // SEH_Epilogue 0U, // SEH_PushFrame 0U, // SEH_PushReg 0U, // SEH_SaveReg 0U, // SEH_SaveXMM 0U, // SEH_SetFrame 0U, // SEH_StackAlloc 0U, // SETAEm 0U, // SETAEr 0U, // SETAm 0U, // SETAr 0U, // SETBEm 0U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 0U, // SETBm 0U, // SETBr 0U, // SETEm 0U, // SETEr 0U, // SETGEm 0U, // SETGEr 0U, // SETGm 0U, // SETGr 0U, // SETLEm 0U, // SETLEr 0U, // SETLm 0U, // SETLr 0U, // SETNEm 0U, // SETNEr 0U, // SETNOm 0U, // SETNOr 0U, // SETNPm 0U, // SETNPr 0U, // SETNSm 0U, // SETNSr 0U, // SETOm 0U, // SETOr 0U, // SETPm 0U, // SETPr 0U, // SETSm 0U, // SETSr 0U, // SGDT16m 0U, // SGDT32m 0U, // SGDT64m 0U, // SHL16m1 0U, // SHL16mCL 0U, // SHL16mi 0U, // SHL16r1 0U, // SHL16rCL 0U, // SHL16ri 0U, // SHL32m1 0U, // SHL32mCL 0U, // SHL32mi 0U, // SHL32r1 0U, // SHL32rCL 0U, // SHL32ri 0U, // SHL64m1 0U, // SHL64mCL 0U, // SHL64mi 0U, // SHL64r1 0U, // SHL64rCL 0U, // SHL64ri 0U, // SHL8m1 0U, // SHL8mCL 0U, // SHL8mi 0U, // SHL8r1 0U, // SHL8rCL 0U, // SHL8ri 0U, // SHLD16mrCL 0U, // SHLD16mri8 0U, // SHLD16rrCL 0U, // SHLD16rri8 0U, // SHLD32mrCL 0U, // SHLD32mri8 0U, // SHLD32rrCL 0U, // SHLD32rri8 0U, // SHLD64mrCL 0U, // SHLD64mri8 0U, // SHLD64rrCL 0U, // SHLD64rri8 0U, // SHLX32rm 0U, // SHLX32rr 0U, // SHLX64rm 0U, // SHLX64rr 0U, // SHR16m1 0U, // SHR16mCL 0U, // SHR16mi 0U, // SHR16r1 0U, // SHR16rCL 0U, // SHR16ri 0U, // SHR32m1 0U, // SHR32mCL 0U, // SHR32mi 0U, // SHR32r1 0U, // SHR32rCL 0U, // SHR32ri 0U, // SHR64m1 0U, // SHR64mCL 0U, // SHR64mi 0U, // SHR64r1 0U, // SHR64rCL 0U, // SHR64ri 0U, // SHR8m1 0U, // SHR8mCL 0U, // SHR8mi 0U, // SHR8r1 0U, // SHR8rCL 0U, // SHR8ri 0U, // SHRD16mrCL 0U, // SHRD16mri8 0U, // SHRD16rrCL 0U, // SHRD16rri8 0U, // SHRD32mrCL 0U, // SHRD32mri8 0U, // SHRD32rrCL 0U, // SHRD32rri8 0U, // SHRD64mrCL 0U, // SHRD64mri8 0U, // SHRD64rrCL 0U, // SHRD64rri8 0U, // SHRX32rm 0U, // SHRX32rr 0U, // SHRX64rm 0U, // SHRX64rr 0U, // SIDT16m 0U, // SIDT32m 0U, // SIDT64m 0U, // SKINIT 0U, // SLDT16m 0U, // SLDT16r 0U, // SLDT32r 0U, // SLDT64m 0U, // SLDT64r 0U, // SMSW16m 0U, // SMSW16r 0U, // SMSW32r 0U, // SMSW64r 0U, // STAC 0U, // STC 0U, // STD 0U, // STGI 0U, // STI 0U, // STOSB 0U, // STOSL 0U, // STOSQ 0U, // STOSW 0U, // STR16r 0U, // STR32r 0U, // STR64r 0U, // STRm 0U, // SUB16i16 0U, // SUB16mi 0U, // SUB16mi8 0U, // SUB16mr 0U, // SUB16ri 0U, // SUB16ri8 0U, // SUB16rm 0U, // SUB16rr 0U, // SUB16rr_REV 0U, // SUB32i32 0U, // SUB32mi 0U, // SUB32mi8 0U, // SUB32mr 0U, // SUB32ri 0U, // SUB32ri8 0U, // SUB32rm 0U, // SUB32rr 0U, // SUB32rr_REV 0U, // SUB64i32 0U, // SUB64mi32 0U, // SUB64mi8 0U, // SUB64mr 0U, // SUB64ri32 0U, // SUB64ri8 0U, // SUB64rm 0U, // SUB64rr 0U, // SUB64rr_REV 0U, // SUB8i8 0U, // SUB8mi 0U, // SUB8mi8 0U, // SUB8mr 0U, // SUB8ri 0U, // SUB8ri8 0U, // SUB8rm 0U, // SUB8rr 0U, // SUB8rr_REV 0U, // SWAPGS 0U, // SYSCALL 0U, // SYSENTER 0U, // SYSEXIT 0U, // SYSEXIT64 0U, // SYSRET 0U, // SYSRET64 0U, // T1MSKC32rm 0U, // T1MSKC32rr 0U, // T1MSKC64rm 0U, // T1MSKC64rr 0U, // TAILJMPd 0U, // TAILJMPd64 0U, // TAILJMPd64_REX 0U, // TAILJMPm 0U, // TAILJMPm64 0U, // TAILJMPm64_REX 0U, // TAILJMPr 0U, // TAILJMPr64 0U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 0U, // TEST16i16 0U, // TEST16mi 0U, // TEST16mi_alt 0U, // TEST16ri 0U, // TEST16ri_alt 0U, // TEST16rm 0U, // TEST16rr 0U, // TEST32i32 0U, // TEST32mi 0U, // TEST32mi_alt 0U, // TEST32ri 0U, // TEST32ri_alt 0U, // TEST32rm 0U, // TEST32rr 0U, // TEST64i32 0U, // TEST64mi32 0U, // TEST64mi32_alt 0U, // TEST64ri32 0U, // TEST64ri32_alt 0U, // TEST64rm 0U, // TEST64rr 0U, // TEST8i8 0U, // TEST8mi 0U, // TEST8mi_alt 0U, // TEST8ri 0U, // TEST8ri_NOREX 0U, // TEST8ri_alt 0U, // TEST8rm 0U, // TEST8rr 0U, // TLSCall_32 0U, // TLSCall_64 0U, // TLS_addr32 0U, // TLS_addr64 0U, // TLS_base_addr32 0U, // TLS_base_addr64 0U, // TRAP 0U, // TZCNT16rm 0U, // TZCNT16rr 0U, // TZCNT32rm 0U, // TZCNT32rr 0U, // TZCNT64rm 0U, // TZCNT64rr 0U, // TZMSK32rm 0U, // TZMSK32rr 0U, // TZMSK64rm 0U, // TZMSK64rr 0U, // UD2B 1U, // VAARG_64 0U, // VASTART_SAVE_XMM_REGS 0U, // VERRm 0U, // VERRr 0U, // VERWm 0U, // VERWr 0U, // VMCALL 0U, // VMCLEARm 0U, // VMFUNC 0U, // VMLAUNCH 0U, // VMLOAD32 0U, // VMLOAD64 0U, // VMMCALL 0U, // VMPTRLDm 0U, // VMPTRSTm 0U, // VMREAD32rm 0U, // VMREAD32rr 0U, // VMREAD64rm 0U, // VMREAD64rr 0U, // VMRESUME 0U, // VMRUN32 0U, // VMRUN64 0U, // VMSAVE32 0U, // VMSAVE64 0U, // VMWRITE32rm 0U, // VMWRITE32rr 0U, // VMWRITE64rm 0U, // VMWRITE64rr 0U, // VMXOFF 0U, // VMXON 0U, // WBINVD 0U, // WIN_ALLOCA 0U, // WIN_FTOL_32 0U, // WIN_FTOL_64 0U, // WRFSBASE 0U, // WRFSBASE64 0U, // WRGSBASE 0U, // WRGSBASE64 0U, // WRMSR 0U, // XADD16rm 0U, // XADD16rr 0U, // XADD32rm 0U, // XADD32rr 0U, // XADD64rm 0U, // XADD64rr 0U, // XADD8rm 0U, // XADD8rr 0U, // XCHG16ar 0U, // XCHG16rm 0U, // XCHG16rr 0U, // XCHG32ar 0U, // XCHG32ar64 0U, // XCHG32rm 0U, // XCHG32rr 0U, // XCHG64ar 0U, // XCHG64rm 0U, // XCHG64rr 0U, // XCHG8rm 0U, // XCHG8rr 0U, // XCRYPTCBC 0U, // XCRYPTCFB 0U, // XCRYPTCTR 0U, // XCRYPTECB 0U, // XCRYPTOFB 0U, // XGETBV 0U, // XLAT 0U, // XOR16i16 0U, // XOR16mi 0U, // XOR16mi8 0U, // XOR16mr 0U, // XOR16ri 0U, // XOR16ri8 0U, // XOR16rm 0U, // XOR16rr 0U, // XOR16rr_REV 0U, // XOR32i32 0U, // XOR32mi 0U, // XOR32mi8 0U, // XOR32mr 0U, // XOR32ri 0U, // XOR32ri8 0U, // XOR32rm 0U, // XOR32rr 0U, // XOR32rr_REV 0U, // XOR64i32 0U, // XOR64mi32 0U, // XOR64mi8 0U, // XOR64mr 0U, // XOR64ri32 0U, // XOR64ri8 0U, // XOR64rm 0U, // XOR64rr 0U, // XOR64rr_REV 0U, // XOR8i8 0U, // XOR8mi 0U, // XOR8mi8 0U, // XOR8mr 0U, // XOR8ri 0U, // XOR8ri8 0U, // XOR8rm 0U, // XOR8rr 0U, // XOR8rr_REV 0U, // XRSTOR 0U, // XRSTOR64 0U, // XRSTORS 0U, // XRSTORS64 0U, // XSAVE 0U, // XSAVE64 0U, // XSAVEC 0U, // XSAVEC64 0U, // XSAVEOPT 0U, // XSAVEOPT64 0U, // XSAVES 0U, // XSAVES64 0U, // XSETBV 0U, // XSHA1 0U, // XSHA256 0U, // XSTORE 0U }; #ifndef CAPSTONE_DIET static char AsmStrs[] = { /* 0 */ 'x', 's', 'a', 'v', 'e', 'c', '6', '4', 9, 0, /* 10 */ 'x', 's', 'a', 'v', 'e', '6', '4', 9, 0, /* 19 */ 'x', 'r', 's', 't', 'o', 'r', '6', '4', 9, 0, /* 29 */ 'x', 's', 'a', 'v', 'e', 's', '6', '4', 9, 0, /* 39 */ 'x', 'r', 's', 't', 'o', 'r', 's', '6', '4', 9, 0, /* 50 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', '6', '4', 9, 0, /* 62 */ 'l', 'e', 'a', 9, 0, /* 67 */ 'j', 'a', 9, 0, /* 71 */ 's', 'e', 't', 'a', 9, 0, /* 77 */ 'c', 'm', 'o', 'v', 'a', 9, 0, /* 84 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '1', '6', 'b', 9, 0, /* 96 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '8', 'b', 9, 0, /* 107 */ 's', 'b', 'b', 9, 0, /* 112 */ 'j', 'b', 9, 0, /* 116 */ 'i', 'n', 's', 'b', 9, 0, /* 122 */ 's', 't', 'o', 's', 'b', 9, 0, /* 129 */ 'c', 'm', 'p', 's', 'b', 9, 0, /* 136 */ 'm', 'o', 'v', 's', 'b', 9, 0, /* 143 */ 's', 'e', 't', 'b', 9, 0, /* 149 */ 's', 'u', 'b', 9, 0, /* 154 */ 'c', 'm', 'o', 'v', 'b', 9, 0, /* 161 */ 'c', 'l', 'w', 'b', 9, 0, /* 167 */ 'a', 'd', 'c', 9, 0, /* 172 */ 'd', 'e', 'c', 9, 0, /* 177 */ 'x', 's', 'a', 'v', 'e', 'c', 9, 0, /* 185 */ 'b', 'l', 'c', 'i', 'c', 9, 0, /* 192 */ 'b', 'l', 's', 'i', 'c', 9, 0, /* 199 */ 't', '1', 'm', 's', 'k', 'c', 9, 0, /* 207 */ 'i', 'n', 'c', 9, 0, /* 212 */ 'b', 't', 'c', 9, 0, /* 217 */ 'a', 'a', 'd', 9, 0, /* 222 */ 'v', 'm', 'r', 'e', 'a', 'd', 9, 0, /* 230 */ 'x', 'a', 'd', 'd', 9, 0, /* 236 */ 'r', 'd', 's', 'e', 'e', 'd', 9, 0, /* 244 */ 'i', 'n', 'v', 'p', 'c', 'i', 'd', 9, 0, /* 253 */ 'i', 'n', 'v', 'v', 'p', 'i', 'd', 9, 0, /* 262 */ 's', 'h', 'l', 'd', 9, 0, /* 268 */ 'v', 'm', 'p', 't', 'r', 'l', 'd', 9, 0, /* 277 */ 'r', 'd', 'r', 'a', 'n', 'd', 9, 0, /* 285 */ 'b', 'o', 'u', 'n', 'd', 9, 0, /* 292 */ 's', 'h', 'r', 'd', 9, 0, /* 298 */ 'i', 'n', 's', 'd', 9, 0, /* 304 */ 's', 't', 'o', 's', 'd', 9, 0, /* 311 */ 'c', 'm', 'p', 's', 'd', 9, 0, /* 318 */ 'm', 'o', 'v', 's', 'd', 9, 0, /* 325 */ 'm', 'o', 'v', 's', 'x', 'd', 9, 0, /* 333 */ 'j', 'a', 'e', 9, 0, /* 338 */ 's', 'e', 't', 'a', 'e', 9, 0, /* 345 */ 'c', 'm', 'o', 'v', 'a', 'e', 9, 0, /* 353 */ 'j', 'b', 'e', 9, 0, /* 358 */ 's', 'e', 't', 'b', 'e', 9, 0, /* 365 */ 'c', 'm', 'o', 'v', 'b', 'e', 9, 0, /* 373 */ 'j', 'g', 'e', 9, 0, /* 378 */ 's', 'e', 't', 'g', 'e', 9, 0, /* 385 */ 'c', 'm', 'o', 'v', 'g', 'e', 9, 0, /* 393 */ 'j', 'e', 9, 0, /* 397 */ 'j', 'l', 'e', 9, 0, /* 402 */ 's', 'e', 't', 'l', 'e', 9, 0, /* 409 */ 'c', 'm', 'o', 'v', 'l', 'e', 9, 0, /* 417 */ 'j', 'n', 'e', 9, 0, /* 422 */ 'l', 'o', 'o', 'p', 'n', 'e', 9, 0, /* 430 */ 's', 'e', 't', 'n', 'e', 9, 0, /* 437 */ 'c', 'm', 'o', 'v', 'n', 'e', 9, 0, /* 445 */ 'l', 'o', 'o', 'p', 'e', 9, 0, /* 452 */ 'r', 'd', 'f', 's', 'b', 'a', 's', 'e', 9, 0, /* 462 */ 'w', 'r', 'f', 's', 'b', 'a', 's', 'e', 9, 0, /* 472 */ 'r', 'd', 'g', 's', 'b', 'a', 's', 'e', 9, 0, /* 482 */ 'w', 'r', 'g', 's', 'b', 'a', 's', 'e', 9, 0, /* 492 */ 's', 'e', 't', 'e', 9, 0, /* 498 */ 'v', 'm', 'w', 'r', 'i', 't', 'e', 9, 0, /* 507 */ 'x', 's', 'a', 'v', 'e', 9, 0, /* 514 */ 'c', 'm', 'o', 'v', 'e', 9, 0, /* 521 */ 'b', 's', 'f', 9, 0, /* 526 */ 'r', 'e', 't', 'f', 9, 0, /* 532 */ 'n', 'e', 'g', 9, 0, /* 537 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', 9, 0, /* 546 */ 'j', 'g', 9, 0, /* 550 */ 'i', 'n', 'v', 'l', 'p', 'g', 9, 0, /* 558 */ 's', 'e', 't', 'g', 9, 0, /* 564 */ 'c', 'm', 'o', 'v', 'g', 9, 0, /* 571 */ 'p', 'u', 's', 'h', 9, 0, /* 577 */ 'b', 'l', 'c', 'i', 9, 0, /* 583 */ 'b', 'z', 'h', 'i', 9, 0, /* 589 */ 'b', 'l', 's', 'i', 9, 0, /* 595 */ 'b', 'l', 'c', 'm', 's', 'k', 9, 0, /* 603 */ 'b', 'l', 's', 'm', 's', 'k', 9, 0, /* 611 */ 't', 'z', 'm', 's', 'k', 9, 0, /* 618 */ 's', 'a', 'l', 9, 0, /* 623 */ 'r', 'c', 'l', 9, 0, /* 628 */ 's', 'h', 'l', 9, 0, /* 633 */ 'j', 'l', 9, 0, /* 637 */ 'l', 'c', 'a', 'l', 'l', 9, 0, /* 644 */ 'b', 'l', 'c', 'f', 'i', 'l', 'l', 9, 0, /* 653 */ 'b', 'l', 's', 'f', 'i', 'l', 'l', 9, 0, /* 662 */ 'r', 'o', 'l', 9, 0, /* 667 */ 'a', 'r', 'p', 'l', 9, 0, /* 673 */ 'l', 's', 'l', 9, 0, /* 678 */ 's', 'e', 't', 'l', 9, 0, /* 684 */ 'i', 'm', 'u', 'l', 9, 0, /* 690 */ 'c', 'm', 'o', 'v', 'l', 9, 0, /* 697 */ 'a', 'a', 'm', 9, 0, /* 702 */ 'a', 'n', 'd', 'n', 9, 0, /* 708 */ 'v', 'm', 'x', 'o', 'n', 9, 0, /* 715 */ 'j', 'o', 9, 0, /* 719 */ 'j', 'n', 'o', 9, 0, /* 724 */ 's', 'e', 't', 'n', 'o', 9, 0, /* 731 */ 'c', 'm', 'o', 'v', 'n', 'o', 9, 0, /* 739 */ 's', 'e', 't', 'o', 9, 0, /* 745 */ 'c', 'm', 'o', 'v', 'o', 9, 0, /* 752 */ 'b', 's', 'w', 'a', 'p', 9, 0, /* 759 */ 'p', 'd', 'e', 'p', 9, 0, /* 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32, 0, /* 1437 */ 't', 'e', 's', 't', 9, 'a', 'l', ',', 32, 0, /* 1447 */ 'm', 'o', 'v', 9, 'a', 'l', ',', 32, 0, /* 1456 */ 's', 'b', 'b', 9, 'a', 'x', ',', 32, 0, /* 1465 */ 's', 'u', 'b', 9, 'a', 'x', ',', 32, 0, /* 1474 */ 'a', 'd', 'c', 9, 'a', 'x', ',', 32, 0, /* 1483 */ 'a', 'd', 'd', 9, 'a', 'x', ',', 32, 0, /* 1492 */ 'a', 'n', 'd', 9, 'a', 'x', ',', 32, 0, /* 1501 */ 'x', 'c', 'h', 'g', 9, 'a', 'x', ',', 32, 0, /* 1511 */ 'i', 'n', 9, 'a', 'x', ',', 32, 0, /* 1519 */ 'c', 'm', 'p', 9, 'a', 'x', ',', 32, 0, /* 1528 */ 'x', 'o', 'r', 9, 'a', 'x', ',', 32, 0, /* 1537 */ 'm', 'o', 'v', 'a', 'b', 's', 9, 'a', 'x', ',', 32, 0, /* 1549 */ 't', 'e', 's', 't', 9, 'a', 'x', ',', 32, 0, /* 1559 */ 'm', 'o', 'v', 9, 'a', 'x', ',', 32, 0, /* 1568 */ 's', 'c', 'a', 's', 'w', 9, 'a', 'x', ',', 32, 0, /* 1579 */ 'l', 'o', 'd', 's', 'w', 9, 'a', 'x', ',', 32, 0, /* 1590 */ 's', 'b', 'b', 9, 'e', 'a', 'x', ',', 32, 0, /* 1600 */ 's', 'u', 'b', 9, 'e', 'a', 'x', ',', 32, 0, /* 1610 */ 'a', 'd', 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'M', 'M', '_', 'R', 'E', 'G', 'S', 32, 0, /* 1982 */ '#', 'S', 'E', 'H', '_', 'S', 't', 'a', 'c', 'k', 'A', 'l', 'l', 'o', 'c', 32, 0, /* 1999 */ '#', 'S', 'E', 'H', '_', 'P', 'u', 's', 'h', 'F', 'r', 'a', 'm', 'e', 32, 0, /* 2015 */ '#', 'S', 'E', 'H', '_', 'S', 'e', 't', 'F', 'r', 'a', 'm', 'e', 32, 0, /* 2030 */ '#', 'S', 'E', 'H', '_', 'S', 'a', 'v', 'e', 'R', 'e', 'g', 32, 0, /* 2044 */ '#', 'S', 'E', 'H', '_', 'P', 'u', 's', 'h', 'R', 'e', 'g', 32, 0, /* 2058 */ '#', 'R', 'E', 'L', 'E', 'A', 'S', 'E', '_', 'M', 'O', 'V', 32, 'P', 'S', 'E', 'U', 'D', 'O', 32, '!', 0, /* 2080 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'R', 'F', 'P', '8', '0', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2101 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'V', '4', 'F', '3', '2', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2122 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'V', '1', '6', 'F', '3', '2', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2144 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'V', '8', 'F', '3', '2', 32, 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'4', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2352 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'R', 'F', 'P', '6', '4', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2373 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'F', 'R', '6', '4', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2393 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'G', 'R', '1', '6', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2413 */ '#', 'C', 'M', 'O', 'V', '_', '_', 'G', 'R', '8', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2432 */ '#', 'R', 'E', 'L', 'E', 'A', 'S', 'E', '_', 'B', 'I', 'N', 'O', 'P', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2455 */ '#', 'R', 'E', 'L', 'E', 'A', 'S', 'E', '_', 'U', 'N', 'O', 'P', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2477 */ '#', 'A', 'C', 'Q', 'U', 'I', 'R', 'E', '_', 'M', 'O', 'V', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2498 */ '#', 'R', 'E', 'L', 'E', 'A', 'S', 'E', '_', 'M', 'O', 'V', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 2519 */ 'x', 's', 'h', 'a', '1', 0, /* 2525 */ 'i', 'n', 't', '1', 0, /* 2530 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '3', '2', 0, /* 2549 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '3', '2', 0, /* 2567 */ '#', 32, 'T', 'L', 'S', 'C', 'a', 'l', 'l', '_', '3', '2', 0, /* 2580 */ '#', 32, 'T', 'L', 'S', '_', 'a', 'd', 'd', 'r', '3', '2', 0, /* 2593 */ '#', 32, 'T', 'L', 'S', '_', 'b', 'a', 's', 'e', '_', 'a', 'd', 'd', 'r', '3', '2', 0, /* 2611 */ 'u', 'd', '2', 0, /* 2615 */ 'i', 'n', 't', '3', 0, /* 2620 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '6', '4', 0, /* 2639 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '6', '4', 0, /* 2657 */ '#', 32, 'T', 'L', 'S', 'C', 'a', 'l', 'l', '_', '6', '4', 0, /* 2670 */ '#', 32, 'T', 'L', 'S', '_', 'a', 'd', 'd', 'r', '6', '4', 0, /* 2683 */ '#', 32, 'T', 'L', 'S', '_', 'b', 'a', 's', 'e', '_', 'a', 'd', 'd', 'r', '6', '4', 0, /* 2701 */ 'r', 'e', 'x', '6', '4', 0, /* 2707 */ 'd', 'a', 't', 'a', '1', '6', 0, /* 2714 */ 'x', 's', 'h', 'a', '2', '5', '6', 0, /* 2722 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 2735 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 2742 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 2752 */ '#', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 0, /* 2770 */ '#', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 0, /* 2786 */ '#', 'M', 'E', 'M', 'B', 'A', 'R', 'R', 'I', 'E', 'R', 0, /* 2798 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 2813 */ 'a', 'a', 'a', 0, /* 2817 */ 'd', 'a', 'a', 0, /* 2821 */ 'u', 'd', '2', 'b', 0, /* 2826 */ 'x', 'c', 'r', 'y', 'p', 't', 'e', 'c', 'b', 0, /* 2836 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 'f', 'b', 0, /* 2846 */ 'x', 'c', 'r', 'y', 'p', 't', 'o', 'f', 'b', 0, /* 2856 */ 'r', 'e', 'p', 32, 's', 't', 'o', 's', 'b', 0, /* 2866 */ 'r', 'e', 'p', 32, 'm', 'o', 'v', 's', 'b', 0, /* 2876 */ 'x', 'l', 'a', 't', 'b', 0, /* 2882 */ 'c', 'l', 'a', 'c', 0, /* 2887 */ 's', 't', 'a', 'c', 0, /* 2892 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 'b', 'c', 0, /* 2902 */ 'g', 'e', 't', 's', 'e', 'c', 0, /* 2909 */ 's', 'a', 'l', 'c', 0, /* 2914 */ 'c', 'l', 'c', 0, /* 2918 */ 'c', 'm', 'c', 0, /* 2922 */ 'r', 'd', 'p', 'm', 'c', 0, /* 2928 */ 'v', 'm', 'f', 'u', 'n', 'c', 0, /* 2935 */ 'r', 'd', 't', 's', 'c', 0, /* 2941 */ 's', 't', 'c', 0, /* 2945 */ 'p', 'u', 's', 'h', 'f', 'd', 0, /* 2952 */ 'p', 'o', 'p', 'f', 'd', 0, /* 2958 */ 'c', 'p', 'u', 'i', 'd', 0, /* 2964 */ 'c', 'l', 'd', 0, /* 2968 */ 'r', 'e', 'p', 32, 's', 't', 'o', 's', 'd', 0, /* 2978 */ 'r', 'e', 'p', 32, 'm', 'o', 'v', 's', 'd', 0, /* 2988 */ 'i', 'r', 'e', 't', 'd', 0, /* 2994 */ 's', 't', 'd', 0, /* 2998 */ 'w', 'b', 'i', 'n', 'v', 'd', 0, /* 3005 */ 'c', 'w', 'd', 0, /* 3009 */ 'c', 'w', 'd', 'e', 0, /* 3014 */ 'v', 'm', 'r', 'e', 's', 'u', 'm', 'e', 0, /* 3023 */ 'r', 'e', 'p', 'n', 'e', 0, /* 3029 */ 'c', 'd', 'q', 'e', 0, /* 3034 */ 'x', 's', 't', 'o', 'r', 'e', 0, /* 3041 */ '#', 'S', 'E', 'H', '_', 'E', 'p', 'i', 'l', 'o', 'g', 'u', 'e', 0, /* 3055 */ '#', 'S', 'E', 'H', '_', 'E', 'n', 'd', 'P', 'r', 'o', 'l', 'o', 'g', 'u', 'e', 0, /* 3072 */ 'l', 'e', 'a', 'v', 'e', 0, /* 3078 */ 'v', 'm', 'x', 'o', 'f', 'f', 0, /* 3085 */ 'l', 'a', 'h', 'f', 0, /* 3090 */ 's', 'a', 'h', 'f', 0, /* 3095 */ 'p', 'u', 's', 'h', 'f', 0, /* 3101 */ 'p', 'o', 'p', 'f', 0, /* 3106 */ 'r', 'e', 't', 'f', 0, /* 3111 */ 'v', 'm', 'l', 'a', 'u', 'n', 'c', 'h', 0, /* 3120 */ 'c', 'l', 'g', 'i', 0, /* 3125 */ 's', 't', 'g', 'i', 0, /* 3130 */ 'c', 'l', 'i', 0, /* 3134 */ 's', 't', 'i', 0, /* 3138 */ '#', 32, 'w', 'i', 'n', '3', '2', 32, 'f', 'p', 't', 'o', 'u', 'i', 0, /* 3153 */ 'l', 'o', 'c', 'k', 0, /* 3158 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'a', 'l', 0, /* 3169 */ 'p', 'u', 's', 'h', 'a', 'l', 0, /* 3176 */ 'p', 'o', 'p', 'a', 'l', 0, /* 3182 */ 'v', 'm', 'm', 'c', 'a', 'l', 'l', 0, /* 3190 */ 'v', 'm', 'c', 'a', 'l', 'l', 0, /* 3197 */ 's', 'y', 's', 'c', 'a', 'l', 'l', 0, /* 3205 */ 'm', 'o', 'n', 't', 'm', 'u', 'l', 0, /* 3213 */ 'f', 's', 'e', 't', 'p', 'm', 0, /* 3220 */ 'r', 's', 'm', 0, /* 3224 */ '#', 32, 'd', 'y', 'n', 'a', 'm', 'i', 'c', 32, 's', 't', 'a', 'c', 'k', 32, 'a', 'l', 'l', 'o', 'c', 'a', 't', 'i', 'o', 'n', 0, /* 3251 */ 'c', 'q', 'o', 0, /* 3255 */ 'i', 'n', 't', 'o', 0, /* 3260 */ 'r', 'd', 't', 's', 'c', 'p', 0, /* 3267 */ 'r', 'e', 'p', 0, /* 3271 */ 'n', 'o', 'p', 0, /* 3275 */ 'c', 'd', 'q', 0, /* 3279 */ 'p', 'u', 's', 'h', 'f', 'q', 0, /* 3286 */ 'p', 'o', 'p', 'f', 'q', 0, /* 3292 */ 'r', 'e', 't', 'f', 'q', 0, /* 3298 */ 'r', 'e', 'p', 32, 's', 't', 'o', 's', 'q', 0, /* 3308 */ 'r', 'e', 'p', 32, 'm', 'o', 'v', 's', 'q', 0, /* 3318 */ 'i', 'r', 'e', 't', 'q', 0, /* 3324 */ 's', 'y', 's', 'e', 'n', 't', 'e', 'r', 0, /* 3333 */ 'r', 'd', 'm', 's', 'r', 0, /* 3339 */ 'w', 'r', 'm', 's', 'r', 0, /* 3345 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 't', 'r', 0, /* 3355 */ 'a', 'a', 's', 0, /* 3359 */ 'd', 'a', 's', 0, /* 3363 */ 'p', 'u', 's', 'h', 9, 'c', 's', 0, /* 3371 */ 'p', 'u', 's', 'h', 9, 'd', 's', 0, /* 3379 */ 'p', 'o', 'p', 9, 'd', 's', 0, /* 3386 */ 'p', 'u', 's', 'h', 9, 'e', 's', 0, /* 3394 */ 'p', 'o', 'p', 9, 'e', 's', 0, /* 3401 */ 'p', 'u', 's', 'h', 9, 'f', 's', 0, /* 3409 */ 'p', 'o', 'p', 9, 'f', 's', 0, /* 3416 */ 'p', 'u', 's', 'h', 9, 'g', 's', 0, /* 3424 */ 'p', 'o', 'p', 9, 'g', 's', 0, /* 3431 */ 's', 'w', 'a', 'p', 'g', 's', 0, /* 3438 */ '#', 32, 'v', 'a', 'r', 'i', 'a', 'b', 'l', 'e', 32, 's', 'i', 'z', 'e', 'd', 32, 'a', 'l', 'l', 'o', 'c', 'a', 32, 'f', 'o', 'r', 32, 's', 'e', 'g', 'm', 'e', 'n', 't', 'e', 'd', 32, 's', 't', 'a', 'c', 'k', 's', 0, /* 3483 */ 'p', 'u', 's', 'h', 9, 's', 's', 0, /* 3491 */ 'p', 'o', 'p', 9, 's', 's', 0, /* 3498 */ 'c', 'l', 't', 's', 0, /* 3503 */ 'i', 'r', 'e', 't', 0, /* 3508 */ 's', 'y', 's', 'r', 'e', 't', 0, /* 3515 */ 'p', 'c', 'o', 'm', 'm', 'i', 't', 0, /* 3523 */ 's', 'y', 's', 'e', 'x', 'i', 't', 0, /* 3531 */ 'h', 'l', 't', 0, /* 3535 */ 'x', 'g', 'e', 't', 'b', 'v', 0, /* 3542 */ 'x', 's', 'e', 't', 'b', 'v', 0, /* 3549 */ 'p', 'u', 's', 'h', 'a', 'w', 0, /* 3556 */ 'p', 'o', 'p', 'a', 'w', 0, /* 3562 */ 'c', 'b', 'w', 0, /* 3566 */ 'r', 'e', 'p', 32, 's', 't', 'o', 's', 'w', 0, /* 3576 */ 'r', 'e', 'p', 32, 'm', 'o', 'v', 's', 'w', 0, /* 3586 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'a', 'x', 0, /* 3597 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, 'e', 'a', 'x', 0, /* 3608 */ 'v', 'm', 's', 'a', 'v', 'e', 9, 'e', 'a', 'x', 0, /* 3619 */ 'v', 'm', 'r', 'u', 'n', 9, 'e', 'a', 'x', 0, /* 3629 */ 's', 'k', 'i', 'n', 'i', 't', 9, 'e', 'a', 'x', 0, /* 3640 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'e', 'a', 'x', 0, /* 3652 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, 'r', 'a', 'x', 0, /* 3663 */ 'v', 'm', 's', 'a', 'v', 'e', 9, 'r', 'a', 'x', 0, /* 3674 */ 'v', 'm', 'r', 'u', 'n', 9, 'r', 'a', 'x', 0, /* 3684 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, 'e', 'a', 'x', ',', 32, 'e', 'c', 'x', 0, /* 3701 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, 'r', 'a', 'x', ',', 32, 'e', 'c', 'x', 0, /* 3718 */ 'i', 'n', 9, 'a', 'l', ',', 32, 'd', 'x', 0, /* 3728 */ 'i', 'n', 9, 'a', 'x', ',', 32, 'd', 'x', 0, /* 3738 */ 'i', 'n', 9, 'e', 'a', 'x', ',', 32, 'd', 'x', 0, }; #endif // Emit the opcode for the instruction. unsigned int opcode = MCInst_getOpcode(MI); uint64_t Bits1 = OpInfo[opcode]; uint64_t Bits2 = OpInfo2[opcode]; uint64_t Bits = (Bits2 << 32) | Bits1; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 4095)-1); #endif // Fragment 0 encoded into 6 bits for 35 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 63); switch ((Bits >> 12) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, AAA, AAS, ACQUIRE_MOV... return; break; case 1: // AAD8i8, AAM8i8, ADC16i16, ADC16rr_REV, ADC32i32, ADC32rr_REV, ADC64i32... printOperand(MI, 0, O); break; case 2: // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16... printi16mem(MI, 0, O); break; case 3: // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32... printOperand(MI, 1, O); break; case 4: // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32... printi32mem(MI, 0, O); break; case 5: // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,... printi64mem(MI, 0, O); break; case 6: // ADC8mi, ADC8mi8, ADC8mr, ADD8mi, ADD8mi8, ADD8mr, AND8mi, AND8mi8, AND... printi8mem(MI, 0, O); break; case 7: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JAE_1, JAE_2, ... printPCRelImm(MI, 0, O); return; break; case 8: // CMPSB printSrcIdx8(MI, 1, O); SStream_concat0(O, ", "); printDstIdx8(MI, 0, O); return; break; case 9: // CMPSL printSrcIdx32(MI, 1, O); SStream_concat0(O, ", "); printDstIdx32(MI, 0, O); return; break; case 10: // CMPSQ printSrcIdx64(MI, 1, O); SStream_concat0(O, ", "); printDstIdx64(MI, 0, O); return; break; case 11: // CMPSW printSrcIdx16(MI, 1, O); SStream_concat0(O, ", "); printDstIdx16(MI, 0, O); return; break; case 12: // CMPXCHG16B, LCMPXCHG16B printi128mem(MI, 0, O); return; break; case 13: // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, LGD... printopaquemem(MI, 0, O); return; break; case 14: // INSB, MOVSB, SCASB, STOSB printDstIdx8(MI, 0, O); break; case 15: // INSL, MOVSL, SCASL, STOSL printDstIdx32(MI, 0, O); break; case 16: // INSW, MOVSW, SCASW, STOSW printDstIdx16(MI, 0, O); break; case 17: // LODSB, OUTSB printSrcIdx8(MI, 0, O); return; break; case 18: // LODSL, OUTSL printSrcIdx32(MI, 0, O); return; break; case 19: // LODSQ printSrcIdx64(MI, 0, O); return; break; case 20: // LODSW, OUTSW printSrcIdx16(MI, 0, O); return; break; case 21: // LXADD16, XCHG16rm printi16mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 22: // LXADD32, XCHG32rm printi32mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 23: // LXADD64, XCHG64rm printi64mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 24: // LXADD8, XCHG8rm printi8mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 25: // MOV16ao16, MOV16ao32, MOV16ao64, MOV16o16a, MOV16o32a, MOV16o64a printMemOffs16(MI, 0, O); break; case 26: // MOV32ao16, MOV32ao32, MOV32ao64, MOV32o16a, MOV32o32a, MOV32o64a printMemOffs32(MI, 0, O); break; case 27: // MOV64ao32, MOV64ao64, MOV64o32a, MOV64o64a printMemOffs64(MI, 0, O); break; case 28: // MOV8ao16, MOV8ao32, MOV8ao64, MOV8o16a, MOV8o32a, MOV8o64a printMemOffs8(MI, 0, O); break; case 29: // MOVSQ, SCASQ, STOSQ printDstIdx64(MI, 0, O); break; case 30: // TEST16rm printi16mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 31: // TEST32rm printi32mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 32: // TEST64rm printi64mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 33: // TEST8rm printi8mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 34: // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; } // Fragment 1 encoded into 4 bits for 10 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 15); switch ((Bits >> 18) & 15) { default: // llvm_unreachable("Invalid command number."); case 0: // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i... return; break; case 1: // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16... SStream_concat0(O, ", "); break; case 2: // FARCALL16i, FARCALL32i, FARJMP16i, FARJMP32i SStream_concat0(O, ":"); printOperand(MI, 0, O); return; break; case 3: // INSB, INSL, INSW SStream_concat0(O, ", dx"); op_addReg(MI, X86_REG_DX); return; break; case 4: // MOV16o16a, MOV16o32a, MOV16o64a, OUT16ir, STOSW SStream_concat0(O, ", ax"); op_addReg(MI, X86_REG_AX); return; break; case 5: // MOV32o16a, MOV32o32a, MOV32o64a, OUT32ir, STOSL SStream_concat0(O, ", eax"); op_addReg(MI, X86_REG_EAX); return; break; case 6: // MOV64o32a, MOV64o64a, STOSQ SStream_concat0(O, ", rax"); op_addReg(MI, X86_REG_RAX); return; break; case 7: // MOV8o16a, MOV8o32a, MOV8o64a, OUT8ir, STOSB SStream_concat0(O, ", al"); op_addReg(MI, X86_REG_AL); return; break; case 8: // RCL16m1, RCL16r1, RCL32m1, RCL32r1, RCL64m1, RCL64r1, RCL8m1, RCL8r1, ... SStream_concat0(O, ", 1"); op_addImm(MI, 1); return; break; case 9: // RCL16mCL, RCL16rCL, RCL32mCL, RCL32rCL, RCL64mCL, RCL64rCL, RCL8mCL, R... SStream_concat0(O, ", cl"); op_addReg(MI, X86_REG_CL); return; break; } // Fragment 2 encoded into 5 bits for 19 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 22) & 31); switch ((Bits >> 22) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC... printOperand(MI, 5, O); break; case 1: // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A... printOperand(MI, 2, O); break; case 2: // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r... printi16mem(MI, 2, O); return; break; case 3: // ADC32rm, ADCX32rm, ADD32rm, AND32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm,... printi32mem(MI, 2, O); return; break; case 4: // ADC64rm, ADCX64rm, ADD64rm, AND64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm,... printi64mem(MI, 2, O); return; break; case 5: // ADC8rm, ADD8rm, AND8rm, OR8rm, SBB8rm, SUB8rm, XOR8rm printi8mem(MI, 2, O); return; break; case 6: // ADOX32rm, BEXTR32rm, BEXTRI32mi, BLCFILL32rm, BLCI32rm, BLCIC32rm, BLC... printi32mem(MI, 1, O); break; case 7: // ADOX32rr, ADOX64rr, ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, ARPL16rr, ... printOperand(MI, 1, O); break; case 8: // ADOX64rm, BEXTR64rm, BEXTRI64mi, BLCFILL64rm, BLCI64rm, BLCIC64rm, BLC... printi64mem(MI, 1, O); break; case 9: // BSF16rm, BSR16rm, CMP16rm, IMUL16rmi, IMUL16rmi8, LAR16rm, LAR32rm, LA... printi16mem(MI, 1, O); break; case 10: // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32_NOREXrm8, MOVSX32rm8... printi8mem(MI, 1, O); break; case 11: // INVEPT32, INVEPT64, INVPCID32, INVPCID64, INVVPID32, INVVPID64 printi128mem(MI, 1, O); return; break; case 12: // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm... printopaquemem(MI, 1, O); return; break; case 13: // LEA16r, LEA32r, LEA64_32r, LEA64r printanymem(MI, 1, O); return; break; case 14: // MOVSB printSrcIdx8(MI, 1, O); return; break; case 15: // MOVSL printSrcIdx32(MI, 1, O); return; break; case 16: // MOVSQ printSrcIdx64(MI, 1, O); return; break; case 17: // MOVSW printSrcIdx16(MI, 1, O); return; break; case 18: // NOOP19rr printOperand(MI, 0, O); return; break; } // Fragment 3 encoded into 2 bits for 3 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 27) & 3); switch ((Bits >> 27) & 3) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, A... return; break; case 1: // ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, BEXTR32rm, BEXTR32rr, BEXTR64r... SStream_concat0(O, ", "); break; case 2: // SHLD16mrCL, SHLD16rrCL, SHLD32mrCL, SHLD32rrCL, SHLD64mrCL, SHLD64rrCL... SStream_concat0(O, ", cl"); op_addReg(MI, X86_REG_CL); return; break; } // Fragment 4 encoded into 3 bits for 5 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 29) & 7); switch ((Bits >> 29) & 7) { default: // llvm_unreachable("Invalid command number."); case 0: // ANDN32rm, MULX32rm, PDEP32rm, PEXT32rm printi32mem(MI, 2, O); return; break; case 1: // ANDN32rr, ANDN64rr, BEXTR32rr, BEXTR64rr, BEXTRI32ri, BEXTRI64ri, BZHI... printOperand(MI, 2, O); return; break; case 2: // ANDN64rm, MULX64rm, PDEP64rm, PEXT64rm printi64mem(MI, 2, O); return; break; case 3: // BEXTR32rm, BEXTR64rm, BEXTRI32mi, BEXTRI64mi, BZHI32rm, BZHI64rm, IMUL... printOperand(MI, 6, O); break; case 4: // SHLD16rri8, SHLD32rri8, SHLD64rri8, SHRD16rri8, SHRD32rri8, SHRD64rri8 printOperand(MI, 3, O); return; break; } // Fragment 5 encoded into 1 bits for 2 unique commands. //printf("Frag-5: %"PRIu64"\n", (Bits >> 32) & 1); if ((Bits >> 32) & 1) { // VAARG_64 SStream_concat0(O, ", "); printOperand(MI, 7, O); SStream_concat0(O, ", "); printOperand(MI, 8, O); return; } else { // BEXTR32rm, BEXTR64rm, BEXTRI32mi, BEXTRI64mi, BZHI32rm, BZHI64rm, IMUL... return; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 242 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 's', 't', '(', '0', ')', 0, /* 6 */ 's', 't', '(', '1', ')', 0, /* 12 */ 's', 't', '(', '2', ')', 0, /* 18 */ 's', 't', '(', '3', ')', 0, /* 24 */ 's', 't', '(', '4', ')', 0, /* 30 */ 's', 't', '(', '5', ')', 0, /* 36 */ 's', 't', '(', '6', ')', 0, /* 42 */ 's', 't', '(', '7', ')', 0, /* 48 */ 'x', 'm', 'm', '1', '0', 0, /* 54 */ 'y', 'm', 'm', '1', '0', 0, /* 60 */ 'z', 'm', 'm', '1', '0', 0, /* 66 */ 'c', 'r', '1', '0', 0, /* 71 */ 'd', 'r', '1', '0', 0, /* 76 */ 'x', 'm', 'm', '2', '0', 0, /* 82 */ 'y', 'm', 'm', '2', '0', 0, /* 88 */ 'z', 'm', 'm', '2', '0', 0, /* 94 */ 'x', 'm', 'm', '3', '0', 0, /* 100 */ 'y', 'm', 'm', '3', '0', 0, /* 106 */ 'z', 'm', 'm', '3', '0', 0, /* 112 */ 'k', '0', 0, /* 115 */ 'x', 'm', 'm', '0', 0, /* 120 */ 'y', 'm', 'm', '0', 0, /* 125 */ 'z', 'm', 'm', '0', 0, /* 130 */ 'f', 'p', '0', 0, /* 134 */ 'c', 'r', '0', 0, /* 138 */ 'd', 'r', '0', 0, /* 142 */ 'x', 'm', 'm', '1', '1', 0, /* 148 */ 'y', 'm', 'm', '1', '1', 0, /* 154 */ 'z', 'm', 'm', '1', '1', 0, /* 160 */ 'c', 'r', '1', '1', 0, /* 165 */ 'd', 'r', '1', '1', 0, /* 170 */ 'x', 'm', 'm', '2', '1', 0, /* 176 */ 'y', 'm', 'm', '2', '1', 0, /* 182 */ 'z', 'm', 'm', '2', '1', 0, /* 188 */ 'x', 'm', 'm', '3', '1', 0, /* 194 */ 'y', 'm', 'm', '3', '1', 0, /* 200 */ 'z', 'm', 'm', '3', '1', 0, /* 206 */ 'k', '1', 0, /* 209 */ 'x', 'm', 'm', '1', 0, /* 214 */ 'y', 'm', 'm', '1', 0, /* 219 */ 'z', 'm', 'm', '1', 0, /* 224 */ 'f', 'p', '1', 0, /* 228 */ 'c', 'r', '1', 0, /* 232 */ 'd', 'r', '1', 0, /* 236 */ 'x', 'm', 'm', '1', '2', 0, /* 242 */ 'y', 'm', 'm', '1', '2', 0, /* 248 */ 'z', 'm', 'm', '1', '2', 0, /* 254 */ 'c', 'r', '1', '2', 0, /* 259 */ 'd', 'r', '1', '2', 0, /* 264 */ 'x', 'm', 'm', '2', '2', 0, /* 270 */ 'y', 'm', 'm', '2', '2', 0, /* 276 */ 'z', 'm', 'm', '2', '2', 0, /* 282 */ 'k', '2', 0, /* 285 */ 'x', 'm', 'm', '2', 0, /* 290 */ 'y', 'm', 'm', '2', 0, /* 295 */ 'z', 'm', 'm', '2', 0, /* 300 */ 'f', 'p', '2', 0, /* 304 */ 'c', 'r', '2', 0, /* 308 */ 'd', 'r', '2', 0, /* 312 */ 'x', 'm', 'm', '1', '3', 0, /* 318 */ 'y', 'm', 'm', '1', '3', 0, /* 324 */ 'z', 'm', 'm', '1', '3', 0, /* 330 */ 'c', 'r', '1', '3', 0, /* 335 */ 'd', 'r', '1', '3', 0, /* 340 */ 'x', 'm', 'm', '2', '3', 0, /* 346 */ 'y', 'm', 'm', '2', '3', 0, /* 352 */ 'z', 'm', 'm', '2', '3', 0, /* 358 */ 'k', '3', 0, /* 361 */ 'x', 'm', 'm', '3', 0, /* 366 */ 'y', 'm', 'm', '3', 0, /* 371 */ 'z', 'm', 'm', '3', 0, /* 376 */ 'f', 'p', '3', 0, /* 380 */ 'c', 'r', '3', 0, /* 384 */ 'd', 'r', '3', 0, /* 388 */ 'x', 'm', 'm', '1', '4', 0, /* 394 */ 'y', 'm', 'm', '1', '4', 0, /* 400 */ 'z', 'm', 'm', '1', '4', 0, /* 406 */ 'c', 'r', '1', '4', 0, /* 411 */ 'd', 'r', '1', '4', 0, /* 416 */ 'x', 'm', 'm', '2', '4', 0, /* 422 */ 'y', 'm', 'm', '2', '4', 0, /* 428 */ 'z', 'm', 'm', '2', '4', 0, /* 434 */ 'k', '4', 0, /* 437 */ 'x', 'm', 'm', '4', 0, /* 442 */ 'y', 'm', 'm', '4', 0, /* 447 */ 'z', 'm', 'm', '4', 0, /* 452 */ 'f', 'p', '4', 0, /* 456 */ 'c', 'r', '4', 0, /* 460 */ 'd', 'r', '4', 0, /* 464 */ 'x', 'm', 'm', '1', '5', 0, /* 470 */ 'y', 'm', 'm', '1', '5', 0, /* 476 */ 'z', 'm', 'm', '1', '5', 0, /* 482 */ 'c', 'r', '1', '5', 0, /* 487 */ 'd', 'r', '1', '5', 0, /* 492 */ 'x', 'm', 'm', '2', '5', 0, /* 498 */ 'y', 'm', 'm', '2', '5', 0, /* 504 */ 'z', 'm', 'm', '2', '5', 0, /* 510 */ 'k', '5', 0, /* 513 */ 'x', 'm', 'm', '5', 0, /* 518 */ 'y', 'm', 'm', '5', 0, /* 523 */ 'z', 'm', 'm', '5', 0, /* 528 */ 'f', 'p', '5', 0, /* 532 */ 'c', 'r', '5', 0, /* 536 */ 'd', 'r', '5', 0, /* 540 */ 'x', 'm', 'm', '1', '6', 0, /* 546 */ 'y', 'm', 'm', '1', '6', 0, /* 552 */ 'z', 'm', 'm', '1', '6', 0, /* 558 */ 'x', 'm', 'm', '2', '6', 0, /* 564 */ 'y', 'm', 'm', '2', '6', 0, /* 570 */ 'z', 'm', 'm', '2', '6', 0, /* 576 */ 'k', '6', 0, /* 579 */ 'x', 'm', 'm', '6', 0, /* 584 */ 'y', 'm', 'm', '6', 0, /* 589 */ 'z', 'm', 'm', '6', 0, /* 594 */ 'f', 'p', '6', 0, /* 598 */ 'c', 'r', '6', 0, /* 602 */ 'd', 'r', '6', 0, /* 606 */ 'x', 'm', 'm', '1', '7', 0, /* 612 */ 'y', 'm', 'm', '1', '7', 0, /* 618 */ 'z', 'm', 'm', '1', '7', 0, /* 624 */ 'x', 'm', 'm', '2', '7', 0, /* 630 */ 'y', 'm', 'm', '2', '7', 0, /* 636 */ 'z', 'm', 'm', '2', '7', 0, /* 642 */ 'k', '7', 0, /* 645 */ 'x', 'm', 'm', '7', 0, /* 650 */ 'y', 'm', 'm', '7', 0, /* 655 */ 'z', 'm', 'm', '7', 0, /* 660 */ 'f', 'p', '7', 0, /* 664 */ 'c', 'r', '7', 0, /* 668 */ 'd', 'r', '7', 0, /* 672 */ 'x', 'm', 'm', '1', '8', 0, /* 678 */ 'y', 'm', 'm', '1', '8', 0, /* 684 */ 'z', 'm', 'm', '1', '8', 0, /* 690 */ 'x', 'm', 'm', '2', '8', 0, /* 696 */ 'y', 'm', 'm', '2', '8', 0, /* 702 */ 'z', 'm', 'm', '2', '8', 0, /* 708 */ 'x', 'm', 'm', '8', 0, /* 713 */ 'y', 'm', 'm', '8', 0, /* 718 */ 'z', 'm', 'm', '8', 0, /* 723 */ 'c', 'r', '8', 0, /* 727 */ 'd', 'r', '8', 0, /* 731 */ 'x', 'm', 'm', '1', '9', 0, /* 737 */ 'y', 'm', 'm', '1', '9', 0, /* 743 */ 'z', 'm', 'm', '1', '9', 0, /* 749 */ 'x', 'm', 'm', '2', '9', 0, /* 755 */ 'y', 'm', 'm', '2', '9', 0, /* 761 */ 'z', 'm', 'm', '2', '9', 0, /* 767 */ 'x', 'm', 'm', '9', 0, /* 772 */ 'y', 'm', 'm', '9', 0, /* 777 */ 'z', 'm', 'm', '9', 0, /* 782 */ 'c', 'r', '9', 0, /* 786 */ 'd', 'r', '9', 0, /* 790 */ 'r', '1', '0', 'b', 0, /* 795 */ 'r', '1', '1', 'b', 0, /* 800 */ 'r', '1', '2', 'b', 0, /* 805 */ 'r', '1', '3', 'b', 0, /* 810 */ 'r', '1', '4', 'b', 0, /* 815 */ 'r', '1', '5', 'b', 0, /* 820 */ 'r', '8', 'b', 0, /* 824 */ 'r', '9', 'b', 0, /* 828 */ 'r', '1', '0', 'd', 0, /* 833 */ 'r', '1', '1', 'd', 0, /* 838 */ 'r', '1', '2', 'd', 0, /* 843 */ 'r', '1', '3', 'd', 0, /* 848 */ 'r', '1', '4', 'd', 0, /* 853 */ 'r', '1', '5', 'd', 0, /* 858 */ 'r', '8', 'd', 0, /* 862 */ 'r', '9', 'd', 0, /* 866 */ 'a', 'h', 0, /* 869 */ 'b', 'h', 0, /* 872 */ 'c', 'h', 0, /* 875 */ 'd', 'h', 0, /* 878 */ 'e', 'd', 'i', 0, /* 882 */ 'r', 'd', 'i', 0, /* 886 */ 'e', 's', 'i', 0, /* 890 */ 'r', 's', 'i', 0, /* 894 */ 'a', 'l', 0, /* 897 */ 'b', 'l', 0, /* 900 */ 'c', 'l', 0, /* 903 */ 'd', 'l', 0, /* 906 */ 'd', 'i', 'l', 0, /* 910 */ 's', 'i', 'l', 0, /* 914 */ 'b', 'p', 'l', 0, /* 918 */ 's', 'p', 'l', 0, /* 922 */ 'e', 'b', 'p', 0, /* 926 */ 'r', 'b', 'p', 0, /* 930 */ 'e', 'i', 'p', 0, /* 934 */ 'r', 'i', 'p', 0, /* 938 */ 'e', 's', 'p', 0, /* 942 */ 'r', 's', 'p', 0, /* 946 */ 'c', 's', 0, /* 949 */ 'd', 's', 0, /* 952 */ 'e', 's', 0, /* 955 */ 'f', 's', 0, /* 958 */ 'f', 'l', 'a', 'g', 's', 0, /* 964 */ 's', 's', 0, /* 967 */ 'r', '1', '0', 'w', 0, /* 972 */ 'r', '1', '1', 'w', 0, /* 977 */ 'r', '1', '2', 'w', 0, /* 982 */ 'r', '1', '3', 'w', 0, /* 987 */ 'r', '1', '4', 'w', 0, /* 992 */ 'r', '1', '5', 'w', 0, /* 997 */ 'r', '8', 'w', 0, /* 1001 */ 'r', '9', 'w', 0, /* 1005 */ 'f', 'p', 's', 'w', 0, /* 1010 */ 'e', 'a', 'x', 0, /* 1014 */ 'r', 'a', 'x', 0, /* 1018 */ 'e', 'b', 'x', 0, /* 1022 */ 'r', 'b', 'x', 0, /* 1026 */ 'e', 'c', 'x', 0, /* 1030 */ 'r', 'c', 'x', 0, /* 1034 */ 'e', 'd', 'x', 0, /* 1038 */ 'r', 'd', 'x', 0, /* 1042 */ 'e', 'i', 'z', 0, /* 1046 */ 'r', 'i', 'z', 0, }; static const uint16_t RegAsmOffset[] = { 866, 894, 1011, 869, 897, 923, 914, 1019, 872, 900, 946, 1027, 875, 879, 906, 903, 949, 1035, 1010, 922, 1018, 1026, 878, 1034, 958, 930, 1042, 952, 886, 938, 1005, 955, 961, 931, 1014, 926, 1022, 1030, 882, 1038, 934, 1046, 890, 942, 887, 910, 939, 918, 964, 134, 228, 304, 380, 456, 532, 598, 664, 723, 782, 66, 160, 254, 330, 406, 482, 138, 232, 308, 384, 460, 536, 602, 668, 727, 786, 71, 165, 259, 335, 411, 487, 130, 224, 300, 376, 452, 528, 594, 660, 112, 206, 282, 358, 434, 510, 576, 642, 116, 210, 286, 362, 438, 514, 580, 646, 724, 783, 67, 161, 255, 331, 407, 483, 0, 6, 12, 18, 24, 30, 36, 42, 115, 209, 285, 361, 437, 513, 579, 645, 708, 767, 48, 142, 236, 312, 388, 464, 540, 606, 672, 731, 76, 170, 264, 340, 416, 492, 558, 624, 690, 749, 94, 188, 120, 214, 290, 366, 442, 518, 584, 650, 713, 772, 54, 148, 242, 318, 394, 470, 546, 612, 678, 737, 82, 176, 270, 346, 422, 498, 564, 630, 696, 755, 100, 194, 125, 219, 295, 371, 447, 523, 589, 655, 718, 777, 60, 154, 248, 324, 400, 476, 552, 618, 684, 743, 88, 182, 276, 352, 428, 504, 570, 636, 702, 761, 106, 200, 820, 824, 790, 795, 800, 805, 810, 815, 858, 862, 828, 833, 838, 843, 848, 853, 997, 1001, 967, 972, 977, 982, 987, 992, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR #ifndef CAPSTONE_DIET static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; switch (MCInst_getOpcode(MI)) { default: return NULL; case X86_AAD8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAD8i8 10) AsmString = "aad"; break; } return NULL; case X86_AAM8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAM8i8 10) AsmString = "aam"; break; } return NULL; case X86_XSTORE: if (MCInst_getNumOperands(MI) == 0) { // (XSTORE) AsmString = "xstorerng"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/X86/X86GenAsmWriter_reduce.inc010066400017500001750000003116741363402546700225070ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 4714U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 4707U, // BUNDLE 4770U, // LIFETIME_START 4694U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 4785U, // AAA 8535U, // AAD8i8 9494U, // AAM8i8 5356U, // AAS 4385U, // ACQUIRE_MOV16rm 4385U, // ACQUIRE_MOV32rm 4385U, // ACQUIRE_MOV64rm 4385U, // ACQUIRE_MOV8rm 534777U, // ADC16i16 1067257U, // ADC16mi 1067257U, // ADC16mi8 1067257U, // ADC16mr 1599737U, // ADC16ri 1599737U, // ADC16ri8 1607929U, // ADC16rm 1599737U, // ADC16rr 2124025U, // ADC16rr_REV 2630195U, // ADC32i32 3162675U, // ADC32mi 3162675U, // ADC32mi8 3162675U, // ADC32mr 1598003U, // ADC32ri 1598003U, // ADC32ri8 1614387U, // ADC32rm 1598003U, // ADC32rr 2122291U, // ADC32rr_REV 3679654U, // ADC64i32 4212134U, // ADC64mi32 4212134U, // ADC64mi8 4212134U, // ADC64mr 1598886U, // ADC64ri32 1598886U, // ADC64ri8 1623462U, // ADC64rm 1598886U, // ADC64rr 2123174U, // ADC64rr_REV 4726892U, // ADC8i8 5259372U, // ADC8mi 5259372U, // ADC8mi8 5259372U, // ADC8mr 1597548U, // ADC8ri 1597548U, // ADC8ri8 57452U, // ADC8rm 1597548U, // ADC8rr 2121836U, // ADC8rr_REV 2139365U, // ADCX32rm 2122981U, // ADCX32rr 2148376U, // ADCX64rm 2123800U, // ADCX64rr 534802U, // ADD16i16 1067282U, // ADD16mi 1067282U, // ADD16mi8 1067282U, // ADD16mr 1599762U, // ADD16ri 1599762U, // ADD16ri8 0U, // ADD16ri8_DB 0U, // ADD16ri_DB 1607954U, // ADD16rm 1599762U, // ADD16rr 0U, // ADD16rr_DB 2124050U, // ADD16rr_REV 2630229U, // ADD32i32 3162709U, // ADD32mi 3162709U, // ADD32mi8 3162709U, // ADD32mr 1598037U, // ADD32ri 1598037U, // ADD32ri8 0U, // ADD32ri8_DB 0U, // ADD32ri_DB 1614421U, // ADD32rm 1598037U, // ADD32rr 0U, // ADD32rr_DB 2122325U, // ADD32rr_REV 3679688U, // ADD64i32 4212168U, // ADD64mi32 4212168U, // ADD64mi8 4212168U, // ADD64mr 1598920U, // ADD64ri32 0U, // ADD64ri32_DB 1598920U, // ADD64ri8 0U, // ADD64ri8_DB 1623496U, // ADD64rm 1598920U, // ADD64rr 0U, // ADD64rr_DB 2123208U, // ADD64rr_REV 4726911U, // ADD8i8 5259391U, // ADD8mi 5259391U, // ADD8mi8 5259391U, // ADD8mr 1597567U, // ADD8ri 1597567U, // ADD8ri8 57471U, // ADD8rm 1597567U, // ADD8rr 2121855U, // ADD8rr_REV 4724U, // ADJCALLSTACKDOWN32 4724U, // ADJCALLSTACKDOWN64 4742U, // ADJCALLSTACKUP32 4742U, // ADJCALLSTACKUP64 66810U, // ADOX32rm 22619386U, // ADOX32rr 84013U, // ADOX64rm 22620205U, // ADOX64rr 534827U, // AND16i16 1067307U, // AND16mi 1067307U, // AND16mi8 1067307U, // AND16mr 1599787U, // AND16ri 1599787U, // AND16ri8 1607979U, // AND16rm 1599787U, // AND16rr 2124075U, // AND16rr_REV 2630254U, // AND32i32 3162734U, // AND32mi 3162734U, // AND32mi8 3162734U, // AND32mr 1598062U, // AND32ri 1598062U, // AND32ri8 1614446U, // AND32rm 1598062U, // AND32rr 2122350U, // AND32rr_REV 3679713U, // AND64i32 4212193U, // AND64mi32 4212193U, // AND64mi8 4212193U, // AND64mr 1598945U, // AND64ri32 1598945U, // AND64ri8 1623521U, // AND64rm 1598945U, // AND64rr 2123233U, // AND64rr_REV 4726917U, // AND8i8 5259397U, // AND8mi 5259397U, // AND8mi8 5259397U, // AND8mr 1597573U, // AND8ri 1597573U, // AND8ri8 57477U, // AND8rm 1597573U, // AND8rr 2121861U, // AND8rr_REV 35169133U, // ANDN32rm 35152749U, // ANDN32rr 35178193U, // ANDN64rm 35153617U, // ANDN64rr 1065915U, // ARPL16mr 22619067U, // ARPL16rr 6382598U, // BEXTR32rm 35152902U, // BEXTR32rr 6907730U, // BEXTR64rm 35153746U, // BEXTR64rr 6383719U, // BEXTRI32mi 35154023U, // BEXTRI32ri 6908007U, // BEXTRI64mi 35154023U, // BEXTRI64ri 66360U, // BLCFILL32rm 22618936U, // BLCFILL32rr 82744U, // BLCFILL64rm 22618936U, // BLCFILL64rr 66028U, // BLCI32rm 22618604U, // BLCI32rr 82412U, // BLCI64rm 22618604U, // BLCI64rr 65857U, // BLCIC32rm 22618433U, // BLCIC32rr 82241U, // BLCIC64rm 22618433U, // BLCIC64rr 66034U, // BLCMSK32rm 22618610U, // BLCMSK32rr 82418U, // BLCMSK64rm 22618610U, // BLCMSK64rr 67694U, // BLCS32rm 22620270U, // BLCS32rr 84078U, // BLCS64rm 22620270U, // BLCS64rr 66369U, // BLSFILL32rm 22618945U, // BLSFILL32rr 82753U, // BLSFILL64rm 22618945U, // BLSFILL64rr 66322U, // BLSI32rm 22618898U, // BLSI32rr 83589U, // BLSI64rm 22619781U, // BLSI64rr 65864U, // BLSIC32rm 22618440U, // BLSIC32rr 82248U, // BLSIC64rm 22618440U, // BLSIC64rr 66333U, // BLSMSK32rm 22618909U, // BLSMSK32rr 83596U, // BLSMSK64rm 22619788U, // BLSMSK64rr 66547U, // BLSR32rm 22619123U, // BLSR32rr 83775U, // BLSR64rm 22619967U, // BLSR64rr 65911U, // BOUNDS16rm 82295U, // BOUNDS32rm 100717U, // BSF16rm 22620525U, // BSF16rr 66278U, // BSF32rm 22618854U, // BSF32rr 83545U, // BSF64rm 22619737U, // BSF64rr 100913U, // BSR16rm 22620721U, // BSR16rr 66541U, // BSR32rm 22619117U, // BSR32rr 83769U, // BSR64rm 22619961U, // BSR64rr 9098U, // BSWAP32r 9961U, // BSWAP64r 1067683U, // BT16mi8 1067683U, // BT16mr 22620835U, // BT16ri8 22620835U, // BT16rr 3163240U, // BT32mi8 3163240U, // BT32mr 22619240U, // BT32ri8 22619240U, // BT32rr 4212641U, // BT64mi8 4212641U, // BT64mr 22620065U, // BT64ri8 22620065U, // BT64rr 1067275U, // BTC16mi8 1067275U, // BTC16mr 22620427U, // BTC16ri8 22620427U, // BTC16rr 3162693U, // BTC32mi8 3162693U, // BTC32mr 22618693U, // BTC32ri8 22618693U, // BTC32rr 4212152U, // BTC64mi8 4212152U, // BTC64mr 22619576U, // BTC64ri8 22619576U, // BTC64rr 1067575U, // BTR16mi8 1067575U, // BTR16mr 22620727U, // BTR16ri8 22620727U, // BTR16rr 3163130U, // BTR32mi8 3163130U, // BTR32mr 22619130U, // BTR32ri8 22619130U, // BTR32rr 4212550U, // BTR64mi8 4212550U, // BTR64mr 22619974U, // BTR64ri8 22619974U, // BTR64rr 1067662U, // BTS16mi8 1067662U, // BTS16mr 22620814U, // BTS16ri8 22620814U, // BTS16rr 3163219U, // BTS32mi8 3163219U, // BTS32mr 22619219U, // BTS32ri8 22619219U, // BTS32rr 4212627U, // BTS64mi8 4212627U, // BTS64mr 22620051U, // BTS64ri8 22620051U, // BTS64rr 6382347U, // BZHI32rm 35152651U, // BZHI32rr 6907518U, // BZHI64rm 35153534U, // BZHI64rr 110971U, // CALL16m 12667U, // CALL16r 119116U, // CALL32m 12620U, // CALL32r 127325U, // CALL64m 132775U, // CALL64pcrel32 12637U, // CALL64r 133541U, // CALLpcrel16 131915U, // CALLpcrel32 5741U, // CBW 4927U, // CDQ 5320U, // CDQE 4854U, // CLAC 4886U, // CLC 4923U, // CLD 141490U, // CLFLUSHOPT 5033U, // CLGI 5043U, // CLI 5664U, // CLTS 139571U, // CLWB 4890U, // CMC 2132173U, // CMOVA16rm 2123981U, // CMOVA16rr 2138631U, // CMOVA32rm 2122247U, // CMOVA32rr 2147706U, // CMOVA64rm 2123130U, // CMOVA64rr 2132280U, // CMOVAE16rm 2124088U, // CMOVAE16rr 2138747U, // CMOVAE32rm 2122363U, // CMOVAE32rr 2147822U, // CMOVAE64rm 2123246U, // CMOVAE64rr 2132201U, // CMOVB16rm 2124009U, // CMOVB16rr 2138659U, // CMOVB32rm 2122275U, // CMOVB32rr 2147734U, // CMOVB64rm 2123158U, // CMOVB64rr 2132289U, // CMOVBE16rm 2124097U, // CMOVBE16rr 2138756U, // CMOVBE32rm 2122372U, // CMOVBE32rr 2147831U, // CMOVBE64rm 2123255U, // CMOVBE64rr 2132325U, // CMOVE16rm 2124133U, // CMOVE16rr 2138846U, // CMOVE32rm 2122462U, // CMOVE32rr 2147921U, // CMOVE64rm 2123345U, // CMOVE64rr 2132355U, // CMOVG16rm 2124163U, // CMOVG16rr 2138876U, // CMOVG32rm 2122492U, // CMOVG32rr 2147951U, // CMOVG64rm 2123375U, // CMOVG64rr 2132298U, // CMOVGE16rm 2124106U, // CMOVGE16rr 2138765U, // CMOVGE32rm 2122381U, // CMOVGE32rr 2147840U, // CMOVGE64rm 2123264U, // CMOVGE64rr 2132415U, // CMOVL16rm 2124223U, // CMOVL16rr 2138981U, // CMOVL32rm 2122597U, // CMOVL32rr 2148041U, // CMOVL64rm 2123465U, // CMOVL64rr 2132307U, // CMOVLE16rm 2124115U, // CMOVLE16rr 2138774U, // CMOVLE32rm 2122390U, // CMOVLE32rr 2147849U, // CMOVLE64rm 2123273U, // CMOVLE64rr 2132316U, // CMOVNE16rm 2124124U, // CMOVNE16rr 2138783U, // CMOVNE32rm 2122399U, // CMOVNE32rr 2147858U, // CMOVNE64rm 2123282U, // CMOVNE64rr 2132428U, // CMOVNO16rm 2124236U, // CMOVNO16rr 2139001U, // CMOVNO32rm 2122617U, // CMOVNO32rr 2148056U, // CMOVNO64rm 2123480U, // CMOVNO64rr 2132458U, // CMOVNP16rm 2124266U, // CMOVNP16rr 2139046U, // CMOVNP32rm 2122662U, // CMOVNP32rr 2148094U, // CMOVNP64rm 2123518U, // CMOVNP64rr 2132600U, // CMOVNS16rm 2124408U, // CMOVNS16rr 2139197U, // CMOVNS32rm 2122813U, // CMOVNS32rr 2148221U, // CMOVNS64rm 2123645U, // CMOVNS64rr 2132437U, // CMOVO16rm 2124245U, // CMOVO16rr 2139010U, // CMOVO32rm 2122626U, // CMOVO32rr 2148065U, // CMOVO64rm 2123489U, // CMOVO64rr 2132479U, // CMOVP16rm 2124287U, // CMOVP16rr 2139073U, // CMOVP32rm 2122689U, // CMOVP32rr 2148109U, // CMOVP64rm 2123533U, // CMOVP64rr 2132635U, // CMOVS16rm 2124443U, // CMOVS16rr 2139232U, // CMOVS32rm 2122848U, // CMOVS32rr 2148249U, // CMOVS64rm 2123673U, // CMOVS64rr 4094U, // CMOV_FR32 4281U, // CMOV_FR64 4301U, // CMOV_GR16 4114U, // CMOV_GR32 4321U, // CMOV_GR8 4073U, // CMOV_RFP32 4260U, // CMOV_RFP64 3988U, // CMOV_RFP80 4030U, // CMOV_V16F32 4134U, // CMOV_V2F64 4197U, // CMOV_V2I64 4009U, // CMOV_V4F32 4155U, // CMOV_V4F64 4218U, // CMOV_V4I64 4052U, // CMOV_V8F32 4176U, // CMOV_V8F64 4239U, // CMOV_V8I64 535005U, // CMP16i16 1067485U, // CMP16mi 1067485U, // CMP16mi8 1067485U, // CMP16mr 22620637U, // CMP16ri 22620637U, // CMP16ri8 100829U, // CMP16rm 22620637U, // CMP16rr 22620637U, // CMP16rr_REV 2630553U, // CMP32i32 3163033U, // CMP32mi 3163033U, // CMP32mi8 3163033U, // CMP32mr 22619033U, // CMP32ri 22619033U, // CMP32ri8 66457U, // CMP32rm 22619033U, // CMP32rr 22619033U, // CMP32rr_REV 3679992U, // CMP64i32 4212472U, // CMP64mi32 4212472U, // CMP64mi8 4212472U, // CMP64mr 22619896U, // CMP64ri32 22619896U, // CMP64ri8 83704U, // CMP64rm 22619896U, // CMP64rr 22619896U, // CMP64rr_REV 4726979U, // CMP8i8 5259459U, // CMP8mi 5259459U, // CMP8mi8 5259459U, // CMP8mr 22618307U, // CMP8ri 22618307U, // CMP8ri8 147651U, // CMP8rm 22618307U, // CMP8rr 22618307U, // CMP8rr_REV 56254718U, // CMPSB 73040966U, // CMPSL 89827206U, // CMPSQ 106613377U, // CMPSW 188489U, // CMPXCHG16B 1067385U, // CMPXCHG16rm 22620537U, // CMPXCHG16rr 3162866U, // CMPXCHG32rm 22618866U, // CMPXCHG32rr 4212325U, // CMPXCHG64rm 22619749U, // CMPXCHG64rr 122965U, // CMPXCHG8B 5259409U, // CMPXCHG8rm 22618257U, // CMPXCHG8rr 4917U, // CPUID 5238U, // CQO 4936U, // CWD 5182U, // CWDE 4789U, // DAA 5360U, // DAS 4679U, // DATA16_PREFIX 108799U, // DEC16m 10495U, // DEC16r 10495U, // DEC16r_alt 115257U, // DEC32m 8761U, // DEC32r 8761U, // DEC32r_alt 124332U, // DEC64m 9644U, // DEC64r 139378U, // DEC8m 8306U, // DEC8r 109303U, // DIV16m 10999U, // DIV16r 115906U, // DIV32m 9410U, // DIV32r 124917U, // DIV64m 10229U, // DIV64r 139559U, // DIV8m 8487U, // DIV8r 12021U, // EH_RETURN 12021U, // EH_RETURN64 4502U, // EH_SjLj_LongJmp32 4592U, // EH_SjLj_LongJmp64 4521U, // EH_SjLj_SetJmp32 4611U, // EH_SjLj_SetJmp64 132452U, // EH_SjLj_Setup 123218002U, // ENTER 7416228U, // FARCALL16i 201082U, // FARCALL16m 7414602U, // FARCALL32i 201035U, // FARCALL32m 201052U, // FARCALL64 7416291U, // FARJMP16i 201091U, // FARJMP16m 7414687U, // FARJMP32i 201044U, // FARJMP32m 201074U, // FARJMP64 5195U, // FSETPM 4874U, // GETSEC 5677U, // HLT 109302U, // IDIV16m 10998U, // IDIV16r 115905U, // IDIV32m 9409U, // IDIV32r 124916U, // IDIV64m 10228U, // IDIV64r 139558U, // IDIV8m 8486U, // IDIV8r 108984U, // IMUL16m 10680U, // IMUL16r 2132408U, // IMUL16rm 7956920U, // IMUL16rmi 7956920U, // IMUL16rmi8 2124216U, // IMUL16rr 35154360U, // IMUL16rri 35154360U, // IMUL16rri8 115550U, // IMUL32m 9054U, // IMUL32r 2138974U, // IMUL32rm 6382430U, // IMUL32rmi 6382430U, // IMUL32rmi8 2122590U, // IMUL32rr 35152734U, // IMUL32rri 35152734U, // IMUL32rri8 124610U, // IMUL64m 9922U, // IMUL64r 2148034U, // IMUL64rm 6907586U, // IMUL64rmi32 6907586U, // IMUL64rmi8 2123458U, // IMUL64rr 35153602U, // IMUL64rri32 35153602U, // IMUL64rri8 139447U, // IMUL8m 8375U, // IMUL8r 534983U, // IN16ri 5758U, // IN16rr 2630516U, // IN32ri 5837U, // IN32rr 4726974U, // IN8ri 5071U, // IN8rr 108805U, // INC16m 10501U, // INC16r 10501U, // INC16r_alt 115263U, // INC32m 8767U, // INC32r 8767U, // INC32r_alt 124338U, // INC64m 9650U, // INC64r 139384U, // INC8m 8312U, // INC8r 159433U, // INSB 167636U, // INSL 184031U, // INSW 10395U, // INT 4497U, // INT1 4587U, // INT3 5233U, // INTO 4943U, // INVD 207008U, // INVEPT32 207008U, // INVEPT64 139742U, // INVLPG 5818U, // INVLPGA32 5886U, // INVLPGA64 205148U, // INVPCID32 205148U, // INVPCID64 205157U, // INVVPID32 205157U, // INVVPID64 5746U, // IRET16 5153U, // IRET32 5291U, // IRET64 4758U, // Int_MemBarrier 131454U, // JAE_1 131454U, // JAE_2 131454U, // JAE_4 131135U, // JA_1 131135U, // JA_2 131135U, // JA_4 131466U, // JBE_1 131466U, // JBE_2 131466U, // JBE_4 131227U, // JB_1 131227U, // JB_2 131227U, // JB_4 133912U, // JCXZ 133905U, // JECXZ 131490U, // JE_1 131490U, // JE_2 131490U, // JE_4 131478U, // JGE_1 131478U, // JGE_2 131478U, // JGE_4 131546U, // JG_1 131546U, // JG_2 131546U, // JG_4 131494U, // JLE_1 131494U, // JLE_2 131494U, // JLE_4 131865U, // JL_1 131865U, // JL_2 131865U, // JL_4 110980U, // JMP16m 12676U, // JMP16r 119125U, // JMP32m 12629U, // JMP32r 127339U, // JMP64m 12651U, // JMP64r 132418U, // JMP_1 132418U, // JMP_2 132418U, // JMP_4 131506U, // JNE_1 131506U, // JNE_2 131506U, // JNE_4 132390U, // JNO_1 132390U, // JNO_2 132390U, // JNO_4 132423U, // JNP_1 132423U, // JNP_2 132423U, // JNP_4 133248U, // JNS_1 133248U, // JNS_2 133248U, // JNS_4 132386U, // JO_1 132386U, // JO_2 132386U, // JO_4 132408U, // JP_1 132408U, // JP_2 132408U, // JP_4 133918U, // JRCXZ 133244U, // JS_1 133244U, // JS_2 133244U, // JS_4 5014U, // LAHF 100871U, // LAR16rm 22620679U, // LAR16rr 99273U, // LAR32rm 22619081U, // LAR32rr 100117U, // LAR64rm 22619925U, // LAR64rr 1067385U, // LCMPXCHG16 188489U, // LCMPXCHG16B 3162866U, // LCMPXCHG32 4212325U, // LCMPXCHG64 5259409U, // LCMPXCHG8 122965U, // LCMPXCHG8B 215641U, // LDS16rm 214046U, // LDS32rm 223431U, // LEA16r 221697U, // LEA32r 221697U, // LEA64_32r 222580U, // LEA64r 5001U, // LEAVE 5001U, // LEAVE64 215654U, // LES16rm 214059U, // LES32rm 215660U, // LFS16rm 214065U, // LFS32rm 214897U, // LFS64rm 199336U, // LGDT16m 197741U, // LGDT32m 198566U, // LGDT64m 215666U, // LGS16rm 214071U, // LGS32rm 214903U, // LGS64rm 199350U, // LIDT16m 197755U, // LIDT32m 198580U, // LIDT64m 109252U, // LLDT16m 10948U, // LLDT16r 109315U, // LMSW16m 11011U, // LMSW16r 1067282U, // LOCK_ADD16mi 1067282U, // LOCK_ADD16mi8 1067282U, // LOCK_ADD16mr 3162709U, // LOCK_ADD32mi 3162709U, // LOCK_ADD32mi8 3162709U, // LOCK_ADD32mr 4212168U, // LOCK_ADD64mi32 4212168U, // LOCK_ADD64mi8 4212168U, // LOCK_ADD64mr 5259391U, // LOCK_ADD8mi 5259391U, // LOCK_ADD8mr 1067307U, // LOCK_AND16mi 1067307U, // LOCK_AND16mi8 1067307U, // LOCK_AND16mr 3162734U, // LOCK_AND32mi 3162734U, // LOCK_AND32mi8 3162734U, // LOCK_AND32mr 4212193U, // LOCK_AND64mi32 4212193U, // LOCK_AND64mi8 4212193U, // LOCK_AND64mr 5259397U, // LOCK_AND8mi 5259397U, // LOCK_AND8mr 108799U, // LOCK_DEC16m 115257U, // LOCK_DEC32m 124332U, // LOCK_DEC64m 139378U, // LOCK_DEC8m 108805U, // LOCK_INC16m 115263U, // LOCK_INC32m 124338U, // LOCK_INC64m 139384U, // LOCK_INC8m 1067558U, // LOCK_OR16mi 1067558U, // LOCK_OR16mi8 1067558U, // LOCK_OR16mr 3163106U, // LOCK_OR32mi 3163106U, // LOCK_OR32mi8 3163106U, // LOCK_OR32mr 4212526U, // LOCK_OR64mi32 4212526U, // LOCK_OR64mi8 4212526U, // LOCK_OR64mr 5259484U, // LOCK_OR8mi 5259484U, // LOCK_OR8mr 5066U, // LOCK_PREFIX 1067235U, // LOCK_SUB16mi 1067235U, // LOCK_SUB16mi8 1067235U, // LOCK_SUB16mr 3162653U, // LOCK_SUB32mi 3162653U, // LOCK_SUB32mi8 3162653U, // LOCK_SUB32mr 4212112U, // LOCK_SUB64mi32 4212112U, // LOCK_SUB64mi8 4212112U, // LOCK_SUB64mr 5259366U, // LOCK_SUB8mi 5259366U, // LOCK_SUB8mr 1067563U, // LOCK_XOR16mi 1067563U, // LOCK_XOR16mi8 1067563U, // LOCK_XOR16mr 3163111U, // LOCK_XOR32mi 3163111U, // LOCK_XOR32mi8 3163111U, // LOCK_XOR32mr 4212531U, // LOCK_XOR64mi32 4212531U, // LOCK_XOR64mi8 4212531U, // LOCK_XOR64mr 5259489U, // LOCK_XOR8mi 5259489U, // LOCK_XOR8mr 4948215U, // LODSB 2860068U, // LODSL 247658U, // LODSQ 780895U, // LODSW 132440U, // LOOP 131526U, // LOOPE 131511U, // LOOPNE 9360U, // LRETIL 10185U, // LRETIQ 10962U, // LRETIW 5159U, // LRETL 5297U, // LRETQ 5752U, // LRETW 100786U, // LSL16rm 22620594U, // LSL16rr 66392U, // LSL32rm 22618968U, // LSL32rr 83636U, // LSL64rm 22619828U, // LSL64rr 215688U, // LSS16rm 214093U, // LSS32rm 214925U, // LSS64rm 109117U, // LTRm 10813U, // LTRr 140060945U, // LXADD16 156836436U, // LXADD32 173614535U, // LXADD64 190390398U, // LXADD8 101081U, // LZCNT16rm 22620889U, // LZCNT16rr 66717U, // LZCNT32rm 22619293U, // LZCNT32rr 83920U, // LZCNT64rm 22620112U, // LZCNT64rr 5187U, // MONTMUL 0U, // MORESTACK_RET 0U, // MORESTACK_RET_RESTORE_R10 789245U, // MOV16ao16 789245U, // MOV16ao32 789072U, // MOV16ao64 1067773U, // MOV16mi 1067773U, // MOV16mr 1067773U, // MOV16ms 265826U, // MOV16o16a 265826U, // MOV16o32a 265789U, // MOV16o64a 22620925U, // MOV16ri 22620925U, // MOV16ri_alt 101117U, // MOV16rm 22620925U, // MOV16rr 22620925U, // MOV16rr_REV 22620925U, // MOV16rs 101117U, // MOV16sm 22620925U, // MOV16sr 2893000U, // MOV32ao16 2893000U, // MOV32ao32 2892821U, // MOV32ao64 22619336U, // MOV32cr 22619336U, // MOV32dr 3163336U, // MOV32mi 3163336U, // MOV32mr 1066184U, // MOV32ms 274069U, // MOV32o16a 274069U, // MOV32o32a 274029U, // MOV32o64a 0U, // MOV32r0 22619336U, // MOV32rc 22619336U, // MOV32rd 22619336U, // MOV32ri 0U, // MOV32ri64 22619336U, // MOV32ri_alt 66760U, // MOV32rm 22619336U, // MOV32rr 22619336U, // MOV32rr_REV 22619336U, // MOV32rs 99528U, // MOV32sm 22619336U, // MOV32sr 3950587U, // MOV64ao32 3950433U, // MOV64ao64 22620155U, // MOV64cr 22620155U, // MOV64dr 4212731U, // MOV64mi32 4212731U, // MOV64mr 1067003U, // MOV64ms 282301U, // MOV64o32a 282273U, // MOV64o64a 22620155U, // MOV64rc 22620155U, // MOV64rd 22620001U, // MOV64ri 22620155U, // MOV64ri32 83963U, // MOV64rm 22620155U, // MOV64rr 22620155U, // MOV64rr_REV 22620155U, // MOV64rs 100347U, // MOV64sm 22620155U, // MOV64sr 5005613U, // MOV8ao16 5005613U, // MOV8ao32 5005550U, // MOV8ao64 5259565U, // MOV8mi 5259565U, // MOV8mr 5259565U, // MOV8mr_NOREX 289930U, // MOV8o16a 289930U, // MOV8o32a 289893U, // MOV8o64a 22618413U, // MOV8ri 22618413U, // MOV8ri_alt 147757U, // MOV8rm 147757U, // MOV8rm_NOREX 22618413U, // MOV8rr 22618413U, // MOV8rr_NOREX 22618413U, // MOV8rr_REV 1067330U, // MOVBE16mr 100674U, // MOVBE16rm 3162757U, // MOVBE32mr 66181U, // MOVBE32rm 4212216U, // MOVBE64mr 83448U, // MOVBE64rm 0U, // MOVPC32r 295180U, // MOVSB 304225U, // MOVSL 313242U, // MOVSQ 322204U, // MOVSW 149723U, // MOVSX16rm8 22620379U, // MOVSX16rr8 147989U, // MOVSX32_NOREXrm8 22618645U, // MOVSX32_NOREXrr8 99541U, // MOVSX32rm16 147989U, // MOVSX32rm8 22619349U, // MOVSX32rr16 22618645U, // MOVSX32rr8 22619834U, // MOVSX64_NOREXrr32 100360U, // MOVSX64rm16 67258U, // MOVSX64rm32 67258U, // MOVSX64rm32_alt 148872U, // MOVSX64rm8 22620168U, // MOVSX64rr16 22619834U, // MOVSX64rr32 22619528U, // MOVSX64rr8 149745U, // MOVZX16rm8 22620401U, // MOVZX16rr8 148011U, // MOVZX32_NOREXrm8 22618667U, // MOVZX32_NOREXrr8 99549U, // MOVZX32rm16 148011U, // MOVZX32rm8 22619357U, // MOVZX32rr16 22618667U, // MOVZX32rr8 100368U, // MOVZX64rm16_Q 148894U, // MOVZX64rm8_Q 22620176U, // MOVZX64rr16_Q 22619550U, // MOVZX64rr8_Q 108985U, // MUL16m 10681U, // MUL16r 115551U, // MUL32m 9055U, // MUL32r 124611U, // MUL64m 9923U, // MUL64r 139448U, // MUL8m 8376U, // MUL8r 35169523U, // MULX32rm 35153139U, // MULX32rr 35178534U, // MULX64rm 35153958U, // MULX64rr 108915U, // NEG16m 10611U, // NEG16r 115436U, // NEG32m 8940U, // NEG32r 124511U, // NEG64m 9823U, // NEG64r 139403U, // NEG8m 8331U, // NEG8r 5254U, // NOOP 109043U, // NOOP18_16m4 109043U, // NOOP18_16m5 109043U, // NOOP18_16m6 109043U, // NOOP18_16m7 10739U, // NOOP18_16r4 10739U, // NOOP18_16r5 10739U, // NOOP18_16r6 10739U, // NOOP18_16r7 115631U, // NOOP18_m4 115631U, // NOOP18_m5 115631U, // NOOP18_m6 115631U, // NOOP18_m7 9135U, // NOOP18_r4 9135U, // NOOP18_r5 9135U, // NOOP18_r6 9135U, // NOOP18_r7 123217235U, // NOOP19rr 115631U, // NOOPL 115631U, // NOOPL_19 115631U, // NOOPL_1a 115631U, // NOOPL_1b 115631U, // NOOPL_1c 115631U, // NOOPL_1d 115631U, // NOOPL_1e 109043U, // NOOPW 109043U, // NOOPW_19 109043U, // NOOPW_1a 109043U, // NOOPW_1b 109043U, // NOOPW_1c 109043U, // NOOPW_1d 109043U, // NOOPW_1e 109289U, // NOT16m 10985U, // NOT16r 115885U, // NOT32m 9389U, // NOT32r 124896U, // NOT64m 10208U, // NOT64r 139545U, // NOT8m 8473U, // NOT8r 535078U, // OR16i16 1067558U, // OR16mi 1067558U, // OR16mi8 1067558U, // OR16mr 1600038U, // OR16ri 1600038U, // OR16ri8 1608230U, // OR16rm 1600038U, // OR16rr 2124326U, // OR16rr_REV 2630626U, // OR32i32 3163106U, // OR32mi 3163106U, // OR32mi8 3163106U, // OR32mr 3163106U, // OR32mrLocked 1598434U, // OR32ri 1598434U, // OR32ri8 1614818U, // OR32rm 1598434U, // OR32rr 2122722U, // OR32rr_REV 3680046U, // OR64i32 4212526U, // OR64mi32 4212526U, // OR64mi8 4212526U, // OR64mr 1599278U, // OR64ri32 1599278U, // OR64ri8 1623854U, // OR64rm 1599278U, // OR64rr 2123566U, // OR64rr_REV 4727004U, // OR8i8 5259484U, // OR8mi 5259484U, // OR8mi8 5259484U, // OR8mr 1597660U, // OR8ri 1597660U, // OR8ri8 57564U, // OR8rm 1597660U, // OR8rr 2121948U, // OR8rr_REV 11863U, // OUT16ir 5919U, // OUT16rr 11913U, // OUT32ir 5933U, // OUT32rr 11391U, // OUT8ir 5905U, // OUT8rr 8618245U, // OUTSB 8627289U, // OUTSL 8645268U, // OUTSW 5669U, // PCOMMIT 35169170U, // PDEP32rm 35152786U, // PDEP32rr 35178225U, // PDEP64rm 35153649U, // PDEP64rr 35169466U, // PEXT32rm 35153082U, // PEXT32rr 35178477U, // PEXT64rm 35153901U, // PEXT64rr 10745U, // POP16r 109049U, // POP16rmm 10745U, // POP16rmr 9141U, // POP32r 115637U, // POP32rmm 9141U, // POP32rmr 9991U, // POP64r 124679U, // POP64rmm 9991U, // POP64rmr 5702U, // POPA16 5091U, // POPA32 5413U, // POPDS16 5394U, // POPDS32 5451U, // POPES16 5432U, // POPES32 5715U, // POPF16 5104U, // POPF32 5265U, // POPF64 5508U, // POPFS16 5470U, // POPFS32 5489U, // POPFS64 5565U, // POPGS16 5527U, // POPGS32 5546U, // POPGS64 5655U, // POPSS16 5636U, // POPSS32 10635U, // PUSH16i8 10635U, // PUSH16r 108939U, // PUSH16rmm 10635U, // PUSH16rmr 8964U, // PUSH32i8 8964U, // PUSH32r 115460U, // PUSH32rmm 8964U, // PUSH32rmr 10635U, // PUSH64i16 9847U, // PUSH64i32 9847U, // PUSH64i8 9847U, // PUSH64r 124535U, // PUSH64rmm 9847U, // PUSH64rmr 5695U, // PUSHA16 5084U, // PUSHA32 5374U, // PUSHCS16 5364U, // PUSHCS32 5403U, // PUSHDS16 5384U, // PUSHDS32 5441U, // PUSHES16 5422U, // PUSHES32 5708U, // PUSHF16 5097U, // PUSHF32 5258U, // PUSHF64 5498U, // PUSHFS16 5460U, // PUSHFS32 5479U, // PUSHFS64 5555U, // PUSHGS16 5517U, // PUSHGS32 5536U, // PUSHGS64 5645U, // PUSHSS16 5626U, // PUSHSS32 10635U, // PUSHi16 8964U, // PUSHi32 109599U, // RCL16m1 110064U, // RCL16mCL 1067416U, // RCL16mi 11295U, // RCL16r1 11760U, // RCL16rCL 2124184U, // RCL16ri 117631U, // RCL32m1 118032U, // RCL32mCL 3162924U, // RCL32mi 11135U, // RCL32r1 11536U, // RCL32rCL 2122540U, // RCL32ri 125903U, // RCL64m1 126336U, // RCL64mCL 4212379U, // RCL64mi 11215U, // RCL64r1 11648U, // RCL64rCL 2123419U, // RCL64ri 142127U, // RCL8m1 142496U, // RCL8mCL 5259429U, // RCL8mi 11055U, // RCL8r1 11424U, // RCL8rCL 2121893U, // RCL8ri 109639U, // RCR16m1 110108U, // RCR16mCL 1067539U, // RCR16mi 11335U, // RCR16r1 11804U, // RCR16rCL 2124307U, // RCR16ri 117671U, // RCR32m1 118076U, // RCR32mCL 3163093U, // RCR32mi 11175U, // RCR32r1 11580U, // RCR32rCL 2122709U, // RCR32ri 125943U, // RCR64m1 126380U, // RCR64mCL 4212513U, // RCR64mi 11255U, // RCR64r1 11692U, // RCR64rCL 2123553U, // RCR64ri 142167U, // RCR8m1 142540U, // RCR8mCL 5259471U, // RCR8mi 11095U, // RCR8r1 11468U, // RCR8rCL 2121935U, // RCR8ri 8872U, // RDFSBASE 9755U, // RDFSBASE64 8894U, // RDGSBASE 9777U, // RDGSBASE64 5334U, // RDMSR 4894U, // RDPMC 10536U, // RDRAND16r 8811U, // RDRAND32r 9694U, // RDRAND64r 10520U, // RDSEED16r 8795U, // RDSEED32r 9678U, // RDSEED64r 4907U, // RDTSC 5243U, // RDTSCP 4340U, // RELEASE_ADD32mi 4340U, // RELEASE_ADD64mi32 4340U, // RELEASE_ADD8mi 4340U, // RELEASE_AND32mi 4340U, // RELEASE_AND64mi32 4340U, // RELEASE_AND8mi 4363U, // RELEASE_DEC16m 4363U, // RELEASE_DEC32m 4363U, // RELEASE_DEC64m 4363U, // RELEASE_DEC8m 4363U, // RELEASE_INC16m 4363U, // RELEASE_INC32m 4363U, // RELEASE_INC64m 4363U, // RELEASE_INC8m 3966U, // RELEASE_MOV16mi 4406U, // RELEASE_MOV16mr 3966U, // RELEASE_MOV32mi 4406U, // RELEASE_MOV32mr 3966U, // RELEASE_MOV64mi32 4406U, // RELEASE_MOV64mr 3966U, // RELEASE_MOV8mi 4406U, // RELEASE_MOV8mr 4340U, // RELEASE_OR32mi 4340U, // RELEASE_OR64mi32 4340U, // RELEASE_OR8mi 4340U, // RELEASE_XOR32mi 4340U, // RELEASE_XOR64mi32 4340U, // RELEASE_XOR8mi 4957U, // REPNE_PREFIX 4838U, // REP_MOVSB_32 4838U, // REP_MOVSB_64 5143U, // REP_MOVSD_32 5143U, // REP_MOVSD_64 5281U, // REP_MOVSQ_64 5731U, // REP_MOVSW_32 5731U, // REP_MOVSW_64 5250U, // REP_PREFIX 4828U, // REP_STOSB_32 4828U, // REP_STOSB_64 5133U, // REP_STOSD_32 5133U, // REP_STOSD_64 5271U, // REP_STOSQ_64 5721U, // REP_STOSW_32 5721U, // REP_STOSW_64 9361U, // RETIL 10186U, // RETIQ 10963U, // RETIW 5154U, // RETL 5292U, // RETQ 5747U, // RETW 4673U, // REX64_PREFIX 109619U, // ROL16m1 110086U, // ROL16mCL 1067436U, // ROL16mi 11315U, // ROL16r1 11782U, // ROL16rCL 2124204U, // ROL16ri 117651U, // ROL32m1 118054U, // ROL32mCL 3162962U, // ROL32mi 11155U, // ROL32r1 11558U, // ROL32rCL 2122578U, // ROL32ri 125923U, // ROL64m1 126358U, // ROL64mCL 4212398U, // ROL64mi 11235U, // ROL64r1 11670U, // ROL64rCL 2123438U, // ROL64ri 142147U, // ROL8m1 142518U, // ROL8mCL 5259441U, // ROL8mi 11075U, // ROL8r1 11446U, // ROL8rCL 2121905U, // ROL8ri 109659U, // ROR16m1 110130U, // ROR16mCL 1067557U, // ROR16mi 11355U, // ROR16r1 11826U, // ROR16rCL 2124325U, // ROR16ri 117691U, // ROR32m1 118098U, // ROR32mCL 3163105U, // ROR32mi 11195U, // ROR32r1 11602U, // ROR32rCL 2122721U, // ROR32ri 125963U, // ROR64m1 126402U, // ROR64mCL 4212525U, // ROR64mi 11275U, // ROR64r1 11714U, // ROR64rCL 2123565U, // ROR64ri 142187U, // ROR8m1 142562U, // ROR8mCL 5259483U, // ROR8mi 11115U, // ROR8r1 11490U, // ROR8rCL 2121947U, // ROR8ri 6382863U, // RORX32mi 35153167U, // RORX32ri 6907970U, // RORX64mi 35153986U, // RORX64ri 5202U, // RSM 5019U, // SAHF 109589U, // SAL16m1 110053U, // SAL16mCL 1067410U, // SAL16mi 11285U, // SAL16r1 11749U, // SAL16rCL 2124178U, // SAL16ri 117621U, // SAL32m1 118021U, // SAL32mCL 3162918U, // SAL32mi 11125U, // SAL32r1 11525U, // SAL32rCL 2122534U, // SAL32ri 125893U, // SAL64m1 126325U, // SAL64mCL 4212373U, // SAL64mi 11205U, // SAL64r1 11637U, // SAL64rCL 2123413U, // SAL64ri 142117U, // SAL8m1 142485U, // SAL8mCL 5259423U, // SAL8mi 11045U, // SAL8r1 11413U, // SAL8rCL 2121887U, // SAL8ri 4881U, // SALC 109629U, // SAR16m1 110097U, // SAR16mCL 1067533U, // SAR16mi 11325U, // SAR16r1 11793U, // SAR16rCL 2124301U, // SAR16ri 117661U, // SAR32m1 118065U, // SAR32mCL 3163087U, // SAR32mi 11165U, // SAR32r1 11569U, // SAR32rCL 2122703U, // SAR32ri 125933U, // SAR64m1 126369U, // SAR64mCL 4212507U, // SAR64mi 11245U, // SAR64r1 11681U, // SAR64rCL 2123547U, // SAR64ri 142157U, // SAR8m1 142529U, // SAR8mCL 5259465U, // SAR8mi 11085U, // SAR8r1 11457U, // SAR8rCL 2121929U, // SAR8ri 6382849U, // SARX32rm 35153153U, // SARX32rr 6907956U, // SARX64rm 35153972U, // SARX64rr 534741U, // SBB16i16 1067221U, // SBB16mi 1067221U, // SBB16mi8 1067221U, // SBB16mr 1599701U, // SBB16ri 1599701U, // SBB16ri8 1607893U, // SBB16rm 1599701U, // SBB16rr 2123989U, // SBB16rr_REV 2630159U, // SBB32i32 3162639U, // SBB32mi 3162639U, // SBB32mi8 3162639U, // SBB32mr 1597967U, // SBB32ri 1597967U, // SBB32ri8 1614351U, // SBB32rm 1597967U, // SBB32rr 2122255U, // SBB32rr_REV 3679618U, // SBB64i32 4212098U, // SBB64mi32 4212098U, // SBB64mi8 4212098U, // SBB64mr 1598850U, // SBB64ri32 1598850U, // SBB64ri8 1623426U, // SBB64rm 1598850U, // SBB64rr 2123138U, // SBB64rr_REV 4726880U, // SBB8i8 5259360U, // SBB8mi 5259360U, // SBB8mi8 5259360U, // SBB8mr 1597536U, // SBB8ri 1597536U, // SBB8ri8 57440U, // SBB8rm 1597536U, // SBB8rr 2121824U, // SBB8rr_REV 4874471U, // SCASB 2786318U, // SCASL 3843930U, // SCASQ 707145U, // SCASW 5581U, // SEG_ALLOCA_32 5581U, // SEG_ALLOCA_64 4984U, // SEH_EndPrologue 4970U, // SEH_Epilogue 12099U, // SEH_PushFrame 12144U, // SEH_PushReg 123219810U, // SEH_SaveReg 123219724U, // SEH_SaveXMM 123219795U, // SEH_SetFrame 12082U, // SEH_StackAlloc 139651U, // SETAEm 8579U, // SETAEr 139331U, // SETAm 8259U, // SETAr 139663U, // SETBEm 8591U, // SETBEr 0U, // SETB_C16r 0U, // SETB_C32r 0U, // SETB_C64r 0U, // SETB_C8r 139539U, // SETBm 8467U, // SETBr 139725U, // SETEm 8653U, // SETEr 139675U, // SETGEm 8603U, // SETGEr 139750U, // SETGm 8678U, // SETGr 139691U, // SETLEm 8619U, // SETLEr 140439U, // SETLm 9367U, // SETLr 139711U, // SETNEm 8639U, // SETNEr 140587U, // SETNOm 9515U, // SETNOr 140620U, // SETNPm 9548U, // SETNPr 141445U, // SETNSm 10373U, // SETNSr 140594U, // SETOm 9522U, // SETOr 140638U, // SETPm 9566U, // SETPr 141461U, // SETSm 10389U, // SETSr 199343U, // SGDT16m 197748U, // SGDT32m 198573U, // SGDT64m 109609U, // SHL16m1 110075U, // SHL16mCL 1067422U, // SHL16mi 11305U, // SHL16r1 11771U, // SHL16rCL 2124190U, // SHL16ri 117641U, // SHL32m1 118043U, // SHL32mCL 3162930U, // SHL32mi 11145U, // SHL32r1 11547U, // SHL32rCL 2122546U, // SHL32ri 125913U, // SHL64m1 126347U, // SHL64mCL 4212385U, // SHL64mi 11225U, // SHL64r1 11659U, // SHL64rCL 2123425U, // SHL64ri 142137U, // SHL8m1 142507U, // SHL8mCL 5259435U, // SHL8mi 11065U, // SHL8r1 11435U, // SHL8rCL 2121899U, // SHL8ri 1068493U, // SHLD16mrCL 210331937U, // SHLD16mri8 2125261U, // SHLD16rrCL 330017U, // SHLD16rri8 3165421U, // SHLD32mrCL 227107428U, // SHLD32mri8 2125037U, // SHLD32rrCL 328292U, // SHLD32rri8 4214109U, // SHLD64mrCL 243885527U, // SHLD64mri8 2125149U, // SHLD64rrCL 329175U, // SHLD64rri8 6382828U, // SHLX32rm 35153132U, // SHLX32rr 6907935U, // SHLX64rm 35153951U, // SHLX64rr 109649U, // SHR16m1 110119U, // SHR16mCL 1067551U, // SHR16mi 11345U, // SHR16r1 11815U, // SHR16rCL 2124319U, // SHR16ri 117681U, // SHR32m1 118087U, // SHR32mCL 3163099U, // SHR32mi 11185U, // SHR32r1 11591U, // SHR32rCL 2122715U, // SHR32ri 125953U, // SHR64m1 126391U, // SHR64mCL 4212519U, // SHR64mi 11265U, // SHR64r1 11703U, // SHR64rCL 2123559U, // SHR64ri 142177U, // SHR8m1 142551U, // SHR8mCL 5259477U, // SHR8mi 11105U, // SHR8r1 11479U, // SHR8rCL 2121941U, // SHR8ri 1068505U, // SHRD16mrCL 210331953U, // SHRD16mri8 2125273U, // SHRD16rrCL 330033U, // SHRD16rri8 3165433U, // SHRD32mrCL 227107444U, // SHRD32mri8 2125049U, // SHRD32rrCL 328308U, // SHRD32rri8 4214121U, // SHRD64mrCL 243885543U, // SHRD64mri8 2125161U, // SHRD64rrCL 329191U, // SHRD64rri8 6382856U, // SHRX32rm 35153160U, // SHRX32rr 6907963U, // SHRX64rm 35153979U, // SHRX64rr 199357U, // SIDT16m 197762U, // SIDT32m 198587U, // SIDT64m 5806U, // SKINIT 109259U, // SLDT16m 10955U, // SLDT16r 9353U, // SLDT32r 108482U, // SLDT64m 10178U, // SLDT64r 109322U, // SMSW16m 11018U, // SMSW16r 9422U, // SMSW32r 10241U, // SMSW64r 4859U, // STAC 4913U, // STC 4932U, // STD 5038U, // STGI 5047U, // STI 158835U, // STOSB 167548U, // STOSL 175792U, // STOSQ 183883U, // STOSW 10819U, // STR16r 9216U, // STR32r 10060U, // STR64r 109123U, // STRm 534755U, // SUB16i16 1067235U, // SUB16mi 1067235U, // SUB16mi8 1067235U, // SUB16mr 1599715U, // SUB16ri 1599715U, // SUB16ri8 1607907U, // SUB16rm 1599715U, // SUB16rr 2124003U, // SUB16rr_REV 2630173U, // SUB32i32 3162653U, // SUB32mi 3162653U, // SUB32mi8 3162653U, // SUB32mr 1597981U, // SUB32ri 1597981U, // SUB32ri8 1614365U, // SUB32rm 1597981U, // SUB32rr 2122269U, // SUB32rr_REV 3679632U, // SUB64i32 4212112U, // SUB64mi32 4212112U, // SUB64mi8 4212112U, // SUB64mr 1598864U, // SUB64ri32 1598864U, // SUB64ri8 1623440U, // SUB64rm 1598864U, // SUB64rr 2123152U, // SUB64rr_REV 4726886U, // SUB8i8 5259366U, // SUB8mi 5259366U, // SUB8mi8 5259366U, // SUB8mr 1597542U, // SUB8ri 1597542U, // SUB8ri8 57446U, // SUB8rm 1597542U, // SUB8rr 2121830U, // SUB8rr_REV 5574U, // SWAPGS 5125U, // SYSCALL 5325U, // SYSENTER 5173U, // SYSEXIT 5311U, // SYSEXIT64 5165U, // SYSRET 5303U, // SYSRET64 65871U, // T1MSKC32rm 22618447U, // T1MSKC32rr 82255U, // T1MSKC64rm 22618447U, // T1MSKC64rr 132418U, // TAILJMPd 132418U, // TAILJMPd64 132412U, // TAILJMPd64_REX 119125U, // TAILJMPm 127339U, // TAILJMPm64 127333U, // TAILJMPm64_REX 0U, // TAILJMPr 12651U, // TAILJMPr64 12645U, // TAILJMPr64_REX 0U, // TCRETURNdi 0U, // TCRETURNdi64 0U, // TCRETURNmi 0U, // TCRETURNmi64 0U, // TCRETURNri 0U, // TCRETURNri64 535279U, // TEST16i16 1067759U, // TEST16mi 1067759U, // TEST16mi_alt 22620911U, // TEST16ri 22620911U, // TEST16ri_alt 257436399U, // TEST16rm 22620911U, // TEST16rr 2630835U, // TEST32i32 3163315U, // TEST32mi 3163315U, // TEST32mi_alt 22619315U, // TEST32ri 22619315U, // TEST32ri_alt 274212019U, // TEST32rm 22619315U, // TEST32rr 3680230U, // TEST64i32 4212710U, // TEST64mi32 4212710U, // TEST64mi32_alt 22620134U, // TEST64ri32 22620134U, // TEST64ri32_alt 290990054U, // TEST64rm 22620134U, // TEST64rr 4727071U, // TEST8i8 5259551U, // TEST8mi 5259551U, // TEST8mi_alt 22618399U, // TEST8ri 0U, // TEST8ri_NOREX 22618399U, // TEST8ri_alt 307765535U, // TEST8rm 22618399U, // TEST8rr 4539U, // TLSCall_32 4629U, // TLSCall_64 4552U, // TLS_addr32 4642U, // TLS_addr64 4565U, // TLS_base_addr32 4655U, // TLS_base_addr64 4583U, // TRAP 101089U, // TZCNT16rm 22620897U, // TZCNT16rr 66725U, // TZCNT32rm 22619301U, // TZCNT32rr 83928U, // TZCNT64rm 22620120U, // TZCNT64rr 66042U, // TZMSK32rm 22618618U, // TZMSK32rr 82426U, // TZMSK64rm 22618618U, // TZMSK64rr 4793U, // UD2B 844639978U, // VAARG_64 1733832474U, // VASTART_SAVE_XMM_REGS 108641U, // VERRm 10337U, // VERRr 109081U, // VERWm 10777U, // VERWr 5118U, // VMCALL 125001U, // VMCLEARm 4900U, // VMFUNC 5024U, // VMLAUNCH 5771U, // VMLOAD32 5851U, // VMLOAD64 5110U, // VMMCALL 123246U, // VMPTRLDm 125118U, // VMPTRSTm 3162699U, // VMREAD32rm 22618699U, // VMREAD32rr 4212158U, // VMREAD64rm 22619582U, // VMREAD64rr 4948U, // VMRESUME 5795U, // VMRUN32 5875U, // VMRUN64 5783U, // VMSAVE32 5863U, // VMSAVE64 66260U, // VMWRITE32rm 22618836U, // VMWRITE32rr 83527U, // VMWRITE64rm 22619719U, // VMWRITE64rr 5007U, // VMXOFF 124187U, // VMXON 4941U, // WBINVD 5206U, // WIN_ALLOCA 5051U, // WIN_FTOL_32 5051U, // WIN_FTOL_64 8883U, // WRFSBASE 9766U, // WRFSBASE64 8905U, // WRGSBASE 9788U, // WRGSBASE64 5340U, // WRMSR 1067281U, // XADD16rm 22620433U, // XADD16rr 3162708U, // XADD32rm 22618708U, // XADD32rr 4212167U, // XADD64rm 22619591U, // XADD64rr 5259390U, // XADD8rm 22618238U, // XADD8rr 534908U, // XCHG16ar 140061052U, // XCHG16rm 324610428U, // XCHG16rr 2630389U, // XCHG32ar 2630389U, // XCHG32ar64 156836597U, // XCHG32rm 324608757U, // XCHG32rr 3679848U, // XCHG64ar 173614696U, // XCHG64rm 324609640U, // XCHG64rr 190390420U, // XCHG8rm 324608148U, // XCHG8rr 4864U, // XCRYPTCBC 4808U, // XCRYPTCFB 5346U, // XCRYPTCTR 4798U, // XCRYPTECB 4818U, // XCRYPTOFB 5681U, // XGETBV 4848U, // XLAT 535083U, // XOR16i16 1067563U, // XOR16mi 1067563U, // XOR16mi8 1067563U, // XOR16mr 1600043U, // XOR16ri 1600043U, // XOR16ri8 1608235U, // XOR16rm 1600043U, // XOR16rr 2124331U, // XOR16rr_REV 2630631U, // XOR32i32 3163111U, // XOR32mi 3163111U, // XOR32mi8 3163111U, // XOR32mr 1598439U, // XOR32ri 1598439U, // XOR32ri8 1614823U, // XOR32rm 1598439U, // XOR32rr 2122727U, // XOR32rr_REV 3680051U, // XOR64i32 4212531U, // XOR64mi32 4212531U, // XOR64mi8 4212531U, // XOR64mr 1599283U, // XOR64ri32 1599283U, // XOR64ri8 1623859U, // XOR64rm 1599283U, // XOR64rr 2123571U, // XOR64rr_REV 4727009U, // XOR8i8 5259489U, // XOR8mi 5259489U, // XOR8mi8 5259489U, // XOR8mr 1597665U, // XOR8ri 1597665U, // XOR8ri8 57569U, // XOR8rm 1597665U, // XOR8rr 2121953U, // XOR8rr_REV 198745U, // XRSTOR 196628U, // XRSTOR64 198796U, // XRSTORS 196648U, // XRSTORS64 197075U, // XSAVE 196619U, // XSAVE64 196921U, // XSAVEC 196609U, // XSAVEC64 198824U, // XSAVEOPT 196659U, // XSAVEOPT64 198772U, // XSAVES 196638U, // XSAVES64 5688U, // XSETBV 4491U, // XSHA1 4686U, // XSHA256 4963U, // XSTORE 0U }; #ifndef CAPSTONE_DIET static char AsmStrs[] = { /* 0 */ 'x', 's', 'a', 'v', 'e', 'c', '6', '4', 9, 0, /* 10 */ 'x', 's', 'a', 'v', 'e', '6', '4', 9, 0, /* 19 */ 'x', 'r', 's', 't', 'o', 'r', '6', '4', 9, 0, /* 29 */ 'x', 's', 'a', 'v', 'e', 's', '6', '4', 9, 0, /* 39 */ 'x', 'r', 's', 't', 'o', 'r', 's', '6', '4', 9, 0, /* 50 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', '6', '4', 9, 0, /* 62 */ 'j', 'a', 9, 0, /* 66 */ 's', 'e', 't', 'a', 9, 0, /* 72 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '1', '6', 'b', 9, 0, /* 84 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '8', 'b', 9, 0, /* 95 */ 's', 'b', 'b', 'b', 9, 0, /* 101 */ 's', 'u', 'b', 'b', 9, 0, /* 107 */ 'a', 'd', 'c', 'b', 9, 0, /* 113 */ 'd', 'e', 'c', 'b', 9, 0, /* 119 */ 'i', 'n', 'c', 'b', 9, 0, /* 125 */ 'x', 'a', 'd', 'd', 'b', 9, 0, /* 132 */ 'a', 'n', 'd', 'b', 9, 0, /* 138 */ 'n', 'e', 'g', 'b', 9, 0, /* 144 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', 'b', 9, 0, /* 154 */ 'j', 'b', 9, 0, /* 158 */ 's', 'a', 'l', 'b', 9, 0, /* 164 */ 'r', 'c', 'l', 'b', 9, 0, /* 170 */ 's', 'h', 'l', 'b', 9, 0, /* 176 */ 'r', 'o', 'l', 'b', 9, 0, /* 182 */ 'i', 'm', 'u', 'l', 'b', 9, 0, /* 189 */ 'i', 'n', 'b', 9, 0, /* 194 */ 'c', 'm', 'p', 'b', 9, 0, /* 200 */ 's', 'a', 'r', 'b', 9, 0, /* 206 */ 'r', 'c', 'r', 'b', 9, 0, /* 212 */ 's', 'h', 'r', 'b', 9, 0, /* 218 */ 'r', 'o', 'r', 'b', 9, 0, /* 224 */ 'x', 'o', 'r', 'b', 9, 0, /* 230 */ 's', 'c', 'a', 's', 'b', 9, 0, /* 237 */ 'm', 'o', 'v', 'a', 'b', 's', 'b', 9, 0, /* 246 */ 'l', 'o', 'd', 's', 'b', 9, 0, /* 253 */ 'c', 'm', 'p', 's', 'b', 9, 0, /* 260 */ 'o', 'u', 't', 's', 'b', 9, 0, /* 267 */ 'm', 'o', 'v', 's', 'b', 9, 0, /* 274 */ 's', 'e', 't', 'b', 9, 0, /* 280 */ 'n', 'o', 't', 'b', 9, 0, /* 286 */ 't', 'e', 's', 't', 'b', 9, 0, /* 293 */ 'i', 'd', 'i', 'v', 'b', 9, 0, /* 300 */ 'm', 'o', 'v', 'b', 9, 0, /* 306 */ 'c', 'l', 'w', 'b', 9, 0, /* 312 */ 'x', 's', 'a', 'v', 'e', 'c', 9, 0, /* 320 */ 'b', 'l', 'c', 'i', 'c', 9, 0, /* 327 */ 'b', 'l', 's', 'i', 'c', 9, 0, /* 334 */ 't', '1', 'm', 's', 'k', 'c', 9, 0, /* 342 */ 'a', 'a', 'd', 9, 0, /* 347 */ 'i', 'n', 'v', 'p', 'c', 'i', 'd', 9, 0, /* 356 */ 'i', 'n', 'v', 'v', 'p', 'i', 'd', 9, 0, /* 365 */ 'v', 'm', 'p', 't', 'r', 'l', 'd', 9, 0, /* 374 */ 'b', 'o', 'u', 'n', 'd', 9, 0, /* 381 */ 'j', 'a', 'e', 9, 0, /* 386 */ 's', 'e', 't', 'a', 'e', 9, 0, /* 393 */ 'j', 'b', 'e', 9, 0, /* 398 */ 's', 'e', 't', 'b', 'e', 9, 0, /* 405 */ 'j', 'g', 'e', 9, 0, /* 410 */ 's', 'e', 't', 'g', 'e', 9, 0, /* 417 */ 'j', 'e', 9, 0, /* 421 */ 'j', 'l', 'e', 9, 0, /* 426 */ 's', 'e', 't', 'l', 'e', 9, 0, /* 433 */ 'j', 'n', 'e', 9, 0, /* 438 */ 'l', 'o', 'o', 'p', 'n', 'e', 9, 0, /* 446 */ 's', 'e', 't', 'n', 'e', 9, 0, /* 453 */ 'l', 'o', 'o', 'p', 'e', 9, 0, /* 460 */ 's', 'e', 't', 'e', 9, 0, /* 466 */ 'x', 's', 'a', 'v', 'e', 9, 0, /* 473 */ 'j', 'g', 9, 0, /* 477 */ 'i', 'n', 'v', 'l', 'p', 'g', 9, 0, /* 485 */ 's', 'e', 't', 'g', 9, 0, /* 491 */ 'b', 'l', 'c', 'i', 9, 0, /* 497 */ 'b', 'l', 'c', 'm', 's', 'k', 9, 0, /* 505 */ 't', 'z', 'm', 's', 'k', 9, 0, /* 512 */ 'l', 'e', 'a', 'l', 9, 0, /* 518 */ 'c', 'm', 'o', 'v', 'a', 'l', 9, 0, /* 526 */ 's', 'b', 'b', 'l', 9, 0, /* 532 */ 'm', 'o', 'v', 's', 'b', 'l', 9, 0, /* 540 */ 's', 'u', 'b', 'l', 9, 0, /* 546 */ 'c', 'm', 'o', 'v', 'b', 'l', 9, 0, /* 554 */ 'm', 'o', 'v', 'z', 'b', 'l', 9, 0, /* 562 */ 'a', 'd', 'c', 'l', 9, 0, /* 568 */ 'd', 'e', 'c', 'l', 9, 0, /* 574 */ 'i', 'n', 'c', 'l', 9, 0, /* 580 */ 'b', 't', 'c', 'l', 9, 0, /* 586 */ 'v', 'm', 'r', 'e', 'a', 'd', 'l', 9, 0, /* 595 */ 'x', 'a', 'd', 'd', 'l', 9, 0, /* 602 */ 'r', 'd', 's', 'e', 'e', 'd', 'l', 9, 0, /* 611 */ 's', 'h', 'l', 'd', 'l', 9, 0, /* 618 */ 'r', 'd', 'r', 'a', 'n', 'd', 'l', 9, 0, /* 627 */ 's', 'h', 'r', 'd', 'l', 9, 0, /* 634 */ 'c', 'm', 'o', 'v', 'a', 'e', 'l', 9, 0, /* 643 */ 'c', 'm', 'o', 'v', 'b', 'e', 'l', 9, 0, /* 652 */ 'c', 'm', 'o', 'v', 'g', 'e', 'l', 9, 0, /* 661 */ 'c', 'm', 'o', 'v', 'l', 'e', 'l', 9, 0, /* 670 */ 'c', 'm', 'o', 'v', 'n', 'e', 'l', 9, 0, /* 679 */ 'r', 'd', 'f', 's', 'b', 'a', 's', 'e', 'l', 9, 0, /* 690 */ 'w', 'r', 'f', 's', 'b', 'a', 's', 'e', 'l', 9, 0, /* 701 */ 'r', 'd', 'g', 's', 'b', 'a', 's', 'e', 'l', 9, 0, /* 712 */ 'w', 'r', 'g', 's', 'b', 'a', 's', 'e', 'l', 9, 0, /* 723 */ 'v', 'm', 'w', 'r', 'i', 't', 'e', 'l', 9, 0, /* 733 */ 'c', 'm', 'o', 'v', 'e', 'l', 9, 0, /* 741 */ 'b', 's', 'f', 'l', 9, 0, /* 747 */ 'n', 'e', 'g', 'l', 9, 0, /* 753 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', 'l', 9, 0, /* 763 */ 'c', 'm', 'o', 'v', 'g', 'l', 9, 0, /* 771 */ 'p', 'u', 's', 'h', 'l', 9, 0, /* 778 */ 'b', 'z', 'h', 'i', 'l', 9, 0, /* 785 */ 'b', 'l', 's', 'i', 'l', 9, 0, /* 792 */ 'j', 'l', 9, 0, /* 796 */ 'b', 'l', 's', 'm', 's', 'k', 'l', 9, 0, /* 805 */ 's', 'a', 'l', 'l', 9, 0, /* 811 */ 'r', 'c', 'l', 'l', 9, 0, /* 817 */ 's', 'h', 'l', 'l', 9, 0, /* 823 */ 'b', 'l', 'c', 'f', 'i', 'l', 'l', 9, 0, /* 832 */ 'b', 'l', 's', 'f', 'i', 'l', 'l', 9, 0, /* 841 */ 'l', 'c', 'a', 'l', 'l', 'l', 9, 0, /* 849 */ 'r', 'o', 'l', 'l', 9, 0, /* 855 */ 'l', 's', 'l', 'l', 9, 0, /* 861 */ 'i', 'm', 'u', 'l', 'l', 9, 0, /* 868 */ 'c', 'm', 'o', 'v', 'l', 'l', 9, 0, /* 876 */ 'a', 'n', 'd', 'n', 'l', 9, 0, /* 883 */ 'i', 'n', 'l', 9, 0, /* 888 */ 'c', 'm', 'o', 'v', 'n', 'o', 'l', 9, 0, /* 897 */ 'c', 'm', 'o', 'v', 'o', 'l', 9, 0, /* 905 */ 'b', 's', 'w', 'a', 'p', 'l', 9, 0, /* 913 */ 'p', 'd', 'e', 'p', 'l', 9, 0, /* 920 */ 'c', 'm', 'p', 'l', 9, 0, /* 926 */ 'l', 'j', 'm', 'p', 'l', 9, 0, /* 933 */ 'c', 'm', 'o', 'v', 'n', 'p', 'l', 9, 0, /* 942 */ 'n', 'o', 'p', 'l', 9, 0, /* 948 */ 'p', 'o', 'p', 'l', 9, 0, /* 954 */ 'a', 'r', 'p', 'l', 9, 0, /* 960 */ 'c', 'm', 'o', 'v', 'p', 'l', 9, 0, /* 968 */ 'l', 'a', 'r', 'l', 9, 0, /* 974 */ 's', 'a', 'r', 'l', 9, 0, /* 980 */ 'r', 'c', 'r', 'l', 9, 0, /* 986 */ 's', 'h', 'r', 'l', 9, 0, /* 992 */ 'r', 'o', 'r', 'l', 9, 0, /* 998 */ 'x', 'o', 'r', 'l', 9, 0, /* 1004 */ 'b', 's', 'r', 'l', 9, 0, /* 1010 */ 'b', 'l', 's', 'r', 'l', 9, 0, /* 1017 */ 'b', 't', 'r', 'l', 9, 0, /* 1023 */ 's', 't', 'r', 'l', 9, 0, /* 1029 */ 'b', 'e', 'x', 't', 'r', 'l', 9, 0, /* 1037 */ 's', 'c', 'a', 's', 'l', 9, 0, /* 1044 */ 'm', 'o', 'v', 'a', 'b', 's', 'l', 9, 0, /* 1053 */ 'l', 'd', 's', 'l', 9, 0, /* 1059 */ 'l', 'o', 'd', 's', 'l', 9, 0, /* 1066 */ 'l', 'e', 's', 'l', 9, 0, /* 1072 */ 'l', 'f', 's', 'l', 9, 0, /* 1078 */ 'l', 'g', 's', 'l', 9, 0, /* 1084 */ 'c', 'm', 'o', 'v', 'n', 's', 'l', 9, 0, /* 1093 */ 'c', 'm', 'p', 's', 'l', 9, 0, /* 1100 */ 'l', 's', 's', 'l', 9, 0, /* 1106 */ 'b', 't', 's', 'l', 9, 0, /* 1112 */ 'o', 'u', 't', 's', 'l', 9, 0, /* 1119 */ 'c', 'm', 'o', 'v', 's', 'l', 9, 0, /* 1127 */ 'b', 't', 'l', 9, 0, /* 1132 */ 'l', 'g', 'd', 't', 'l', 9, 0, /* 1139 */ 's', 'g', 'd', 't', 'l', 9, 0, /* 1146 */ 'l', 'i', 'd', 't', 'l', 9, 0, /* 1153 */ 's', 'i', 'd', 't', 'l', 9, 0, /* 1160 */ 's', 'l', 'd', 't', 'l', 9, 0, /* 1167 */ 'l', 'r', 'e', 't', 'l', 9, 0, /* 1174 */ 's', 'e', 't', 'l', 9, 0, /* 1180 */ 'l', 'z', 'c', 'n', 't', 'l', 9, 0, /* 1188 */ 't', 'z', 'c', 'n', 't', 'l', 9, 0, /* 1196 */ 'n', 'o', 't', 'l', 9, 0, /* 1202 */ 't', 'e', 's', 't', 'l', 9, 0, /* 1209 */ 'p', 'e', 'x', 't', 'l', 9, 0, /* 1216 */ 'i', 'd', 'i', 'v', 'l', 9, 0, /* 1223 */ 'm', 'o', 'v', 'l', 9, 0, /* 1229 */ 's', 'm', 's', 'w', 'l', 9, 0, /* 1236 */ 'm', 'o', 'v', 's', 'w', 'l', 9, 0, /* 1244 */ 'm', 'o', 'v', 'z', 'w', 'l', 9, 0, /* 1252 */ 'a', 'd', 'c', 'x', 'l', 9, 0, /* 1259 */ 's', 'h', 'l', 'x', 'l', 9, 0, /* 1266 */ 'm', 'u', 'l', 'x', 'l', 9, 0, /* 1273 */ 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2952 */ 's', 'h', 'l', 'l', 9, '$', '1', ',', 32, 0, /* 2962 */ 'r', 'o', 'l', 'l', 9, '$', '1', ',', 32, 0, /* 2972 */ 's', 'a', 'r', 'l', 9, '$', '1', ',', 32, 0, /* 2982 */ 'r', 'c', 'r', 'l', 9, '$', '1', ',', 32, 0, /* 2992 */ 's', 'h', 'r', 'l', 9, '$', '1', ',', 32, 0, /* 3002 */ 'r', 'o', 'r', 'l', 9, '$', '1', ',', 32, 0, /* 3012 */ 's', 'a', 'l', 'q', 9, '$', '1', ',', 32, 0, /* 3022 */ 'r', 'c', 'l', 'q', 9, '$', '1', ',', 32, 0, /* 3032 */ 's', 'h', 'l', 'q', 9, '$', '1', ',', 32, 0, /* 3042 */ 'r', 'o', 'l', 'q', 9, '$', '1', ',', 32, 0, /* 3052 */ 's', 'a', 'r', 'q', 9, '$', '1', ',', 32, 0, /* 3062 */ 'r', 'c', 'r', 'q', 9, '$', '1', ',', 32, 0, /* 3072 */ 's', 'h', 'r', 'q', 9, '$', '1', ',', 32, 0, /* 3082 */ 'r', 'o', 'r', 'q', 9, '$', '1', ',', 32, 0, /* 3092 */ 's', 'a', 'l', 'w', 9, '$', '1', ',', 32, 0, /* 3102 */ 'r', 'c', 'l', 'w', 9, '$', '1', ',', 32, 0, /* 3112 */ 's', 'h', 'l', 'w', 9, '$', '1', ',', 32, 0, /* 3122 */ 'r', 'o', 'l', 'w', 9, '$', '1', ',', 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's', 'h', 'w', 9, '%', 'd', 's', 0, /* 5412 */ 'p', 'o', 'p', 'w', 9, '%', 'd', 's', 0, /* 5421 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'e', 's', 0, /* 5431 */ 'p', 'o', 'p', 'l', 9, '%', 'e', 's', 0, /* 5440 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'e', 's', 0, /* 5450 */ 'p', 'o', 'p', 'w', 9, '%', 'e', 's', 0, /* 5459 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'f', 's', 0, /* 5469 */ 'p', 'o', 'p', 'l', 9, '%', 'f', 's', 0, /* 5478 */ 'p', 'u', 's', 'h', 'q', 9, '%', 'f', 's', 0, /* 5488 */ 'p', 'o', 'p', 'q', 9, '%', 'f', 's', 0, /* 5497 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'f', 's', 0, /* 5507 */ 'p', 'o', 'p', 'w', 9, '%', 'f', 's', 0, /* 5516 */ 'p', 'u', 's', 'h', 'l', 9, '%', 'g', 's', 0, /* 5526 */ 'p', 'o', 'p', 'l', 9, '%', 'g', 's', 0, /* 5535 */ 'p', 'u', 's', 'h', 'q', 9, '%', 'g', 's', 0, /* 5545 */ 'p', 'o', 'p', 'q', 9, '%', 'g', 's', 0, /* 5554 */ 'p', 'u', 's', 'h', 'w', 9, '%', 'g', 's', 0, /* 5564 */ 'p', 'o', 'p', 'w', 9, '%', 'g', 's', 0, /* 5573 */ 's', 'w', 'a', 'p', 'g', 's', 0, /* 5580 */ '#', 32, 'v', 'a', 'r', 'i', 'a', 'b', 'l', 'e', 32, 's', 'i', 'z', 'e', 'd', 32, 'a', 'l', 'l', 'o', 'c', 'a', 32, 'f', 'o', 'r', 32, 's', 'e', 'g', 'm', 'e', 'n', 't', 'e', 'd', 32, 's', 't', 'a', 'c', 'k', 's', 0, /* 5625 */ 'p', 'u', 's', 'h', 'l', 9, '%', 's', 's', 0, /* 5635 */ 'p', 'o', 'p', 'l', 9, '%', 's', 's', 0, /* 5644 */ 'p', 'u', 's', 'h', 'w', 9, '%', 's', 's', 0, /* 5654 */ 'p', 'o', 'p', 'w', 9, '%', 's', 's', 0, /* 5663 */ 'c', 'l', 't', 's', 0, /* 5668 */ 'p', 'c', 'o', 'm', 'm', 'i', 't', 0, /* 5676 */ 'h', 'l', 't', 0, /* 5680 */ 'x', 'g', 'e', 't', 'b', 'v', 0, /* 5687 */ 'x', 's', 'e', 't', 'b', 'v', 0, /* 5694 */ 'p', 'u', 's', 'h', 'a', 'w', 0, /* 5701 */ 'p', 'o', 'p', 'a', 'w', 0, /* 5707 */ 'p', 'u', 's', 'h', 'f', 'w', 0, /* 5714 */ 'p', 'o', 'p', 'f', 'w', 0, /* 5720 */ 'r', 'e', 'p', ';', 's', 't', 'o', 's', 'w', 0, /* 5730 */ 'r', 'e', 'p', ';', 'm', 'o', 'v', 's', 'w', 0, /* 5740 */ 'c', 'b', 't', 'w', 0, /* 5745 */ 'i', 'r', 'e', 't', 'w', 0, /* 5751 */ 'l', 'r', 'e', 't', 'w', 0, /* 5757 */ 'i', 'n', 'w', 9, '%', 'd', 'x', ',', 32, '%', 'a', 'x', 0, /* 5770 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, '%', 'e', 'a', 'x', 0, /* 5782 */ 'v', 'm', 's', 'a', 'v', 'e', 9, '%', 'e', 'a', 'x', 0, /* 5794 */ 'v', 'm', 'r', 'u', 'n', 9, '%', 'e', 'a', 'x', 0, /* 5805 */ 's', 'k', 'i', 'n', 'i', 't', 9, '%', 'e', 'a', 'x', 0, /* 5817 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, '%', 'e', 'c', 'x', ',', 32, '%', 'e', 'a', 'x', 0, /* 5836 */ 'i', 'n', 'l', 9, '%', 'd', 'x', ',', 32, '%', 'e', 'a', 'x', 0, /* 5850 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, '%', 'r', 'a', 'x', 0, /* 5862 */ 'v', 'm', 's', 'a', 'v', 'e', 9, '%', 'r', 'a', 'x', 0, /* 5874 */ 'v', 'm', 'r', 'u', 'n', 9, '%', 'r', 'a', 'x', 0, /* 5885 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, '%', 'e', 'c', 'x', ',', 32, '%', 'r', 'a', 'x', 0, /* 5904 */ 'o', 'u', 't', 'b', 9, '%', 'a', 'l', ',', 32, '%', 'd', 'x', 0, /* 5918 */ 'o', 'u', 't', 'w', 9, '%', 'a', 'x', ',', 32, '%', 'd', 'x', 0, /* 5932 */ 'o', 'u', 't', 'l', 9, '%', 'e', 'a', 'x', ',', 32, '%', 'd', 'x', 0, }; #endif // Emit the opcode for the instruction. uint32_t Bits = OpInfo[MCInst_getOpcode(MI)]; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 8191)-1); #endif // Fragment 0 encoded into 6 bits for 41 unique commands. //printf("Frag-0: %"PRIu64"\n", (Bits >> 13) & 63); switch ((Bits >> 13) & 63) { default: // llvm_unreachable("Invalid command number."); case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, AAA, AAS, ACQUIRE_MOV... return; break; case 1: // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i... printOperand(MI, 0, O); break; case 2: // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC... printOperand(MI, 5, O); SStream_concat0(O, ", "); break; case 3: // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A... printOperand(MI, 2, O); SStream_concat0(O, ", "); break; case 4: // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r... printi16mem(MI, 2, O); SStream_concat0(O, ", "); break; case 5: // ADC32rm, ADCX32rm, ADD32rm, AND32rm, ANDN32rm, CMOVA32rm, CMOVAE32rm, ... printi32mem(MI, 2, O); SStream_concat0(O, ", "); break; case 6: // ADC64rm, ADCX64rm, ADD64rm, AND64rm, ANDN64rm, CMOVA64rm, CMOVAE64rm, ... printi64mem(MI, 2, O); SStream_concat0(O, ", "); break; case 7: // ADC8rm, ADD8rm, AND8rm, OR8rm, SBB8rm, SUB8rm, XOR8rm printi8mem(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 8: // ADOX32rm, BLCFILL32rm, BLCI32rm, BLCIC32rm, BLCMSK32rm, BLCS32rm, BLSF... printi32mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 9: // ADOX32rr, ADOX64rr, ARPL16rr, BLCFILL32rr, BLCFILL64rr, BLCI32rr, BLCI... printOperand(MI, 1, O); break; case 10: // ADOX64rm, BLCFILL64rm, BLCI64rm, BLCIC64rm, BLCMSK64rm, BLCS64rm, BLSF... printi64mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 11: // BEXTR32rm, BEXTR64rm, BEXTRI32mi, BEXTRI64mi, BZHI32rm, BZHI64rm, IMUL... printOperand(MI, 6, O); SStream_concat0(O, ", "); break; case 12: // BSF16rm, BSR16rm, CMP16rm, LAR16rm, LAR32rm, LAR64rm, LSL16rm, LZCNT16... printi16mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 13: // CALL16m, DEC16m, DIV16m, IDIV16m, IMUL16m, INC16m, JMP16m, LLDT16m, LM... printi16mem(MI, 0, O); return; break; case 14: // CALL32m, DEC32m, DIV32m, IDIV32m, IMUL32m, INC32m, JMP32m, LOCK_DEC32m... printi32mem(MI, 0, O); return; break; case 15: // CALL64m, CMPXCHG8B, DEC64m, DIV64m, IDIV64m, IMUL64m, INC64m, JMP64m, ... printi64mem(MI, 0, O); return; break; case 16: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JAE_1, JAE_2, ... printPCRelImm(MI, 0, O); return; break; case 17: // CLFLUSHOPT, CLWB, DEC8m, DIV8m, IDIV8m, IMUL8m, INC8m, INVLPG, LOCK_DE... printi8mem(MI, 0, O); return; break; case 18: // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32_NOREXrm8, MOVSX32rm8... printi8mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 19: // CMPSB, INSB, SCASB, STOSB printDstIdx8(MI, 0, O); break; case 20: // CMPSL, INSL, SCASL, STOSL printDstIdx32(MI, 0, O); break; case 21: // CMPSQ, SCASQ, STOSQ printDstIdx64(MI, 0, O); break; case 22: // CMPSW, INSW, SCASW, STOSW printDstIdx16(MI, 0, O); break; case 23: // CMPXCHG16B, LCMPXCHG16B printi128mem(MI, 0, O); return; break; case 24: // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, LGD... printopaquemem(MI, 0, O); return; break; case 25: // INVEPT32, INVEPT64, INVPCID32, INVPCID64, INVVPID32, INVVPID64 printi128mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 26: // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm... printopaquemem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 27: // LEA16r, LEA32r, LEA64_32r, LEA64r printanymem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 28: // LODSB, OUTSB printSrcIdx8(MI, 0, O); break; case 29: // LODSL, OUTSL printSrcIdx32(MI, 0, O); break; case 30: // LODSQ printSrcIdx64(MI, 0, O); SStream_concat0(O, ", %rax"); op_addReg(MI, X86_REG_RAX); return; break; case 31: // LODSW, OUTSW printSrcIdx16(MI, 0, O); break; case 32: // MOV16ao16, MOV16ao32, MOV16ao64, MOV16o16a, MOV16o32a, MOV16o64a printMemOffs16(MI, 0, O); break; case 33: // MOV32ao16, MOV32ao32, MOV32ao64, MOV32o16a, MOV32o32a, MOV32o64a printMemOffs32(MI, 0, O); break; case 34: // MOV64ao32, MOV64ao64, MOV64o32a, MOV64o64a printMemOffs64(MI, 0, O); break; case 35: // MOV8ao16, MOV8ao32, MOV8ao64, MOV8o16a, MOV8o32a, MOV8o64a printMemOffs8(MI, 0, O); break; case 36: // MOVSB printSrcIdx8(MI, 1, O); SStream_concat0(O, ", "); printDstIdx8(MI, 0, O); return; break; case 37: // MOVSL printSrcIdx32(MI, 1, O); SStream_concat0(O, ", "); printDstIdx32(MI, 0, O); return; break; case 38: // MOVSQ printSrcIdx64(MI, 1, O); SStream_concat0(O, ", "); printDstIdx64(MI, 0, O); return; break; case 39: // MOVSW printSrcIdx16(MI, 1, O); SStream_concat0(O, ", "); printDstIdx16(MI, 0, O); return; break; case 40: // SHLD16rri8, SHLD32rri8, SHLD64rri8, SHRD16rri8, SHRD32rri8, SHRD64rri8 printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; } // Fragment 1 encoded into 5 bits for 18 unique commands. //printf("Frag-1: %"PRIu64"\n", (Bits >> 19) & 31); switch ((Bits >> 19) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // AAD8i8, AAM8i8, BSWAP32r, BSWAP64r, CALL16r, CALL32r, CALL64r, DEC16r,... return; break; case 1: // ADC16i16, ADD16i16, AND16i16, CMP16i16, IN16ri, LODSW, MOV16ao16, MOV1... SStream_concat0(O, ", %ax"); op_addReg(MI, X86_REG_AX); return; break; case 2: // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16... printi16mem(MI, 0, O); return; break; case 3: // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32... printOperand(MI, 1, O); break; case 4: // ADC16rr_REV, ADC32rr_REV, ADC64rr_REV, ADC8rr_REV, ADCX32rm, ADCX32rr,... printOperand(MI, 0, O); return; break; case 5: // ADC32i32, ADD32i32, AND32i32, CMP32i32, IN32ri, LODSL, MOV32ao16, MOV3... SStream_concat0(O, ", %eax"); op_addReg(MI, X86_REG_EAX); return; break; case 6: // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32... printi32mem(MI, 0, O); return; break; case 7: // ADC64i32, ADD64i32, AND64i32, CMP64i32, MOV64ao32, MOV64ao64, OR64i32,... SStream_concat0(O, ", %rax"); op_addReg(MI, X86_REG_RAX); return; break; case 8: // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,... printi64mem(MI, 0, O); return; break; case 9: // ADC8i8, ADD8i8, AND8i8, CMP8i8, IN8ri, LODSB, MOV8ao16, MOV8ao32, MOV8... SStream_concat0(O, ", %al"); op_addReg(MI, X86_REG_AL); return; break; case 10: // ADC8mi, ADC8mi8, ADC8mr, ADD8mi, ADD8mi8, ADD8mr, AND8mi, AND8mi8, AND... printi8mem(MI, 0, O); return; break; case 11: // ADOX32rr, ADOX64rr, ARPL16rr, BLCFILL32rr, BLCFILL64rr, BLCI32rr, BLCI... SStream_concat0(O, ", "); break; case 12: // BEXTR32rm, BEXTRI32mi, BZHI32rm, IMUL32rmi, IMUL32rmi8, RORX32mi, SARX... printi32mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 13: // BEXTR64rm, BEXTRI64mi, BZHI64rm, IMUL64rmi32, IMUL64rmi8, RORX64mi, SA... printi64mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 14: // FARCALL16i, FARCALL32i, FARJMP16i, FARJMP32i SStream_concat0(O, ":"); printOperand(MI, 0, O); return; break; case 15: // IMUL16rmi, IMUL16rmi8 printi16mem(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 16: // OUTSB, OUTSL, OUTSW SStream_concat0(O, ", %dx"); op_addReg(MI, X86_REG_DX); return; break; case 17: // SHLD16mri8, SHLD32mri8, SHLD64mri8, SHRD16mri8, SHRD32mri8, SHRD64mri8 printOperand(MI, 5, O); SStream_concat0(O, ", "); break; } // Fragment 2 encoded into 5 bits for 20 unique commands. //printf("Frag-2: %"PRIu64"\n", (Bits >> 24) & 31); switch ((Bits >> 24) & 31) { default: // llvm_unreachable("Invalid command number."); case 0: // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32... return; break; case 1: // ADOX32rr, ADOX64rr, ARPL16rr, BLCFILL32rr, BLCFILL64rr, BLCI32rr, BLCI... printOperand(MI, 0, O); return; break; case 2: // ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, BEXTR32rr, BEXTR64rr, BEXTRI32... SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 3: // CMPSB printSrcIdx8(MI, 1, O); return; break; case 4: // CMPSL printSrcIdx32(MI, 1, O); return; break; case 5: // CMPSQ printSrcIdx64(MI, 1, O); return; break; case 6: // CMPSW printSrcIdx16(MI, 1, O); return; break; case 7: // ENTER, NOOP19rr, SEH_SaveReg, SEH_SaveXMM, SEH_SetFrame, VASTART_SAVE_... printOperand(MI, 1, O); break; case 8: // LXADD16, XCHG16rm printi16mem(MI, 2, O); return; break; case 9: // LXADD32, XCHG32rm printi32mem(MI, 2, O); return; break; case 10: // LXADD64, XCHG64rm printi64mem(MI, 2, O); return; break; case 11: // LXADD8, XCHG8rm printi8mem(MI, 2, O); return; break; case 12: // SHLD16mri8, SHRD16mri8 printi16mem(MI, 0, O); return; break; case 13: // SHLD32mri8, SHRD32mri8 printi32mem(MI, 0, O); return; break; case 14: // SHLD64mri8, SHRD64mri8 printi64mem(MI, 0, O); return; break; case 15: // TEST16rm printi16mem(MI, 1, O); return; break; case 16: // TEST32rm printi32mem(MI, 1, O); return; break; case 17: // TEST64rm printi64mem(MI, 1, O); return; break; case 18: // TEST8rm, VAARG_64 printi8mem(MI, 1, O); break; case 19: // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr printOperand(MI, 2, O); return; break; } // Fragment 3 encoded into 1 bits for 2 unique commands. //printf("Frag-3: %"PRIu64"\n", (Bits >> 29) & 1); if ((Bits >> 29) & 1) { // VAARG_64, VASTART_SAVE_XMM_REGS SStream_concat0(O, ", "); } else { // ENTER, NOOP19rr, SEH_SaveReg, SEH_SaveXMM, SEH_SetFrame, TEST8rm return; } // Fragment 4 encoded into 1 bits for 2 unique commands. //printf("Frag-4: %"PRIu64"\n", (Bits >> 30) & 1); if ((Bits >> 30) & 1) { // VASTART_SAVE_XMM_REGS printOperand(MI, 2, O); return; } else { // VAARG_64 printOperand(MI, 6, O); SStream_concat0(O, ", "); printOperand(MI, 7, O); SStream_concat0(O, ", "); printOperand(MI, 8, O); return; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 242 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 's', 't', '(', '0', ')', 0, /* 6 */ 's', 't', '(', '1', ')', 0, /* 12 */ 's', 't', '(', '2', ')', 0, /* 18 */ 's', 't', '(', '3', ')', 0, /* 24 */ 's', 't', '(', '4', ')', 0, /* 30 */ 's', 't', '(', '5', ')', 0, /* 36 */ 's', 't', '(', '6', ')', 0, /* 42 */ 's', 't', '(', '7', ')', 0, /* 48 */ 'x', 'm', 'm', '1', '0', 0, /* 54 */ 'y', 'm', 'm', '1', '0', 0, /* 60 */ 'z', 'm', 'm', '1', '0', 0, /* 66 */ 'c', 'r', '1', '0', 0, /* 71 */ 'd', 'r', '1', '0', 0, /* 76 */ 'x', 'm', 'm', '2', '0', 0, /* 82 */ 'y', 'm', 'm', '2', '0', 0, /* 88 */ 'z', 'm', 'm', '2', '0', 0, /* 94 */ 'x', 'm', 'm', '3', '0', 0, /* 100 */ 'y', 'm', 'm', '3', '0', 0, /* 106 */ 'z', 'm', 'm', '3', '0', 0, /* 112 */ 'k', '0', 0, /* 115 */ 'x', 'm', 'm', '0', 0, /* 120 */ 'y', 'm', 'm', '0', 0, /* 125 */ 'z', 'm', 'm', '0', 0, /* 130 */ 'f', 'p', '0', 0, /* 134 */ 'c', 'r', '0', 0, /* 138 */ 'd', 'r', '0', 0, /* 142 */ 'x', 'm', 'm', '1', '1', 0, /* 148 */ 'y', 'm', 'm', '1', '1', 0, /* 154 */ 'z', 'm', 'm', '1', '1', 0, /* 160 */ 'c', 'r', '1', '1', 0, /* 165 */ 'd', 'r', '1', '1', 0, /* 170 */ 'x', 'm', 'm', '2', '1', 0, /* 176 */ 'y', 'm', 'm', '2', '1', 0, /* 182 */ 'z', 'm', 'm', '2', '1', 0, /* 188 */ 'x', 'm', 'm', '3', '1', 0, /* 194 */ 'y', 'm', 'm', '3', '1', 0, /* 200 */ 'z', 'm', 'm', '3', '1', 0, /* 206 */ 'k', '1', 0, /* 209 */ 'x', 'm', 'm', '1', 0, /* 214 */ 'y', 'm', 'm', '1', 0, /* 219 */ 'z', 'm', 'm', '1', 0, /* 224 */ 'f', 'p', '1', 0, /* 228 */ 'c', 'r', '1', 0, /* 232 */ 'd', 'r', '1', 0, /* 236 */ 'x', 'm', 'm', '1', '2', 0, /* 242 */ 'y', 'm', 'm', '1', '2', 0, /* 248 */ 'z', 'm', 'm', '1', '2', 0, /* 254 */ 'c', 'r', '1', '2', 0, /* 259 */ 'd', 'r', '1', '2', 0, /* 264 */ 'x', 'm', 'm', '2', '2', 0, /* 270 */ 'y', 'm', 'm', '2', '2', 0, /* 276 */ 'z', 'm', 'm', '2', '2', 0, /* 282 */ 'k', '2', 0, /* 285 */ 'x', 'm', 'm', '2', 0, /* 290 */ 'y', 'm', 'm', '2', 0, /* 295 */ 'z', 'm', 'm', '2', 0, /* 300 */ 'f', 'p', '2', 0, /* 304 */ 'c', 'r', '2', 0, /* 308 */ 'd', 'r', '2', 0, /* 312 */ 'x', 'm', 'm', '1', '3', 0, /* 318 */ 'y', 'm', 'm', '1', '3', 0, /* 324 */ 'z', 'm', 'm', '1', '3', 0, /* 330 */ 'c', 'r', '1', '3', 0, /* 335 */ 'd', 'r', '1', '3', 0, /* 340 */ 'x', 'm', 'm', '2', '3', 0, /* 346 */ 'y', 'm', 'm', '2', '3', 0, /* 352 */ 'z', 'm', 'm', '2', '3', 0, /* 358 */ 'k', '3', 0, /* 361 */ 'x', 'm', 'm', '3', 0, /* 366 */ 'y', 'm', 'm', '3', 0, /* 371 */ 'z', 'm', 'm', '3', 0, /* 376 */ 'f', 'p', '3', 0, /* 380 */ 'c', 'r', '3', 0, /* 384 */ 'd', 'r', '3', 0, /* 388 */ 'x', 'm', 'm', '1', '4', 0, /* 394 */ 'y', 'm', 'm', '1', '4', 0, /* 400 */ 'z', 'm', 'm', '1', '4', 0, /* 406 */ 'c', 'r', '1', '4', 0, /* 411 */ 'd', 'r', '1', '4', 0, /* 416 */ 'x', 'm', 'm', '2', '4', 0, /* 422 */ 'y', 'm', 'm', '2', '4', 0, /* 428 */ 'z', 'm', 'm', '2', '4', 0, /* 434 */ 'k', '4', 0, /* 437 */ 'x', 'm', 'm', '4', 0, /* 442 */ 'y', 'm', 'm', '4', 0, /* 447 */ 'z', 'm', 'm', '4', 0, /* 452 */ 'f', 'p', '4', 0, /* 456 */ 'c', 'r', '4', 0, /* 460 */ 'd', 'r', '4', 0, /* 464 */ 'x', 'm', 'm', '1', '5', 0, /* 470 */ 'y', 'm', 'm', '1', '5', 0, /* 476 */ 'z', 'm', 'm', '1', '5', 0, /* 482 */ 'c', 'r', '1', '5', 0, /* 487 */ 'd', 'r', '1', '5', 0, /* 492 */ 'x', 'm', 'm', '2', '5', 0, /* 498 */ 'y', 'm', 'm', '2', '5', 0, /* 504 */ 'z', 'm', 'm', '2', '5', 0, /* 510 */ 'k', '5', 0, /* 513 */ 'x', 'm', 'm', '5', 0, /* 518 */ 'y', 'm', 'm', '5', 0, /* 523 */ 'z', 'm', 'm', '5', 0, /* 528 */ 'f', 'p', '5', 0, /* 532 */ 'c', 'r', '5', 0, /* 536 */ 'd', 'r', '5', 0, /* 540 */ 'x', 'm', 'm', '1', '6', 0, /* 546 */ 'y', 'm', 'm', '1', '6', 0, /* 552 */ 'z', 'm', 'm', '1', '6', 0, /* 558 */ 'x', 'm', 'm', '2', '6', 0, /* 564 */ 'y', 'm', 'm', '2', '6', 0, /* 570 */ 'z', 'm', 'm', '2', '6', 0, /* 576 */ 'k', '6', 0, /* 579 */ 'x', 'm', 'm', '6', 0, /* 584 */ 'y', 'm', 'm', '6', 0, /* 589 */ 'z', 'm', 'm', '6', 0, /* 594 */ 'f', 'p', '6', 0, /* 598 */ 'c', 'r', '6', 0, /* 602 */ 'd', 'r', '6', 0, /* 606 */ 'x', 'm', 'm', '1', '7', 0, /* 612 */ 'y', 'm', 'm', '1', '7', 0, /* 618 */ 'z', 'm', 'm', '1', '7', 0, /* 624 */ 'x', 'm', 'm', '2', '7', 0, /* 630 */ 'y', 'm', 'm', '2', '7', 0, /* 636 */ 'z', 'm', 'm', '2', '7', 0, /* 642 */ 'k', '7', 0, /* 645 */ 'x', 'm', 'm', '7', 0, /* 650 */ 'y', 'm', 'm', '7', 0, /* 655 */ 'z', 'm', 'm', '7', 0, /* 660 */ 'f', 'p', '7', 0, /* 664 */ 'c', 'r', '7', 0, /* 668 */ 'd', 'r', '7', 0, /* 672 */ 'x', 'm', 'm', '1', '8', 0, /* 678 */ 'y', 'm', 'm', '1', '8', 0, /* 684 */ 'z', 'm', 'm', '1', '8', 0, /* 690 */ 'x', 'm', 'm', '2', '8', 0, /* 696 */ 'y', 'm', 'm', '2', '8', 0, /* 702 */ 'z', 'm', 'm', '2', '8', 0, /* 708 */ 'x', 'm', 'm', '8', 0, /* 713 */ 'y', 'm', 'm', '8', 0, /* 718 */ 'z', 'm', 'm', '8', 0, /* 723 */ 'c', 'r', '8', 0, /* 727 */ 'd', 'r', '8', 0, /* 731 */ 'x', 'm', 'm', '1', '9', 0, /* 737 */ 'y', 'm', 'm', '1', '9', 0, /* 743 */ 'z', 'm', 'm', '1', '9', 0, /* 749 */ 'x', 'm', 'm', '2', '9', 0, /* 755 */ 'y', 'm', 'm', '2', '9', 0, /* 761 */ 'z', 'm', 'm', '2', '9', 0, /* 767 */ 'x', 'm', 'm', '9', 0, /* 772 */ 'y', 'm', 'm', '9', 0, /* 777 */ 'z', 'm', 'm', '9', 0, /* 782 */ 'c', 'r', '9', 0, /* 786 */ 'd', 'r', '9', 0, /* 790 */ 'r', '1', '0', 'b', 0, /* 795 */ 'r', '1', '1', 'b', 0, /* 800 */ 'r', '1', '2', 'b', 0, /* 805 */ 'r', '1', '3', 'b', 0, /* 810 */ 'r', '1', '4', 'b', 0, /* 815 */ 'r', '1', '5', 'b', 0, /* 820 */ 'r', '8', 'b', 0, /* 824 */ 'r', '9', 'b', 0, /* 828 */ 'r', '1', '0', 'd', 0, /* 833 */ 'r', '1', '1', 'd', 0, /* 838 */ 'r', '1', '2', 'd', 0, /* 843 */ 'r', '1', '3', 'd', 0, /* 848 */ 'r', '1', '4', 'd', 0, /* 853 */ 'r', '1', '5', 'd', 0, /* 858 */ 'r', '8', 'd', 0, /* 862 */ 'r', '9', 'd', 0, /* 866 */ 'a', 'h', 0, /* 869 */ 'b', 'h', 0, /* 872 */ 'c', 'h', 0, /* 875 */ 'd', 'h', 0, /* 878 */ 'e', 'd', 'i', 0, /* 882 */ 'r', 'd', 'i', 0, /* 886 */ 'e', 's', 'i', 0, /* 890 */ 'r', 's', 'i', 0, /* 894 */ 'a', 'l', 0, /* 897 */ 'b', 'l', 0, /* 900 */ 'c', 'l', 0, /* 903 */ 'd', 'l', 0, /* 906 */ 'd', 'i', 'l', 0, /* 910 */ 's', 'i', 'l', 0, /* 914 */ 'b', 'p', 'l', 0, /* 918 */ 's', 'p', 'l', 0, /* 922 */ 'e', 'b', 'p', 0, /* 926 */ 'r', 'b', 'p', 0, /* 930 */ 'e', 'i', 'p', 0, /* 934 */ 'r', 'i', 'p', 0, /* 938 */ 'e', 's', 'p', 0, /* 942 */ 'r', 's', 'p', 0, /* 946 */ 'c', 's', 0, /* 949 */ 'd', 's', 0, /* 952 */ 'e', 's', 0, /* 955 */ 'f', 's', 0, /* 958 */ 'f', 'l', 'a', 'g', 's', 0, /* 964 */ 's', 's', 0, /* 967 */ 'r', '1', '0', 'w', 0, /* 972 */ 'r', '1', '1', 'w', 0, /* 977 */ 'r', '1', '2', 'w', 0, /* 982 */ 'r', '1', '3', 'w', 0, /* 987 */ 'r', '1', '4', 'w', 0, /* 992 */ 'r', '1', '5', 'w', 0, /* 997 */ 'r', '8', 'w', 0, /* 1001 */ 'r', '9', 'w', 0, /* 1005 */ 'f', 'p', 's', 'w', 0, /* 1010 */ 'e', 'a', 'x', 0, /* 1014 */ 'r', 'a', 'x', 0, /* 1018 */ 'e', 'b', 'x', 0, /* 1022 */ 'r', 'b', 'x', 0, /* 1026 */ 'e', 'c', 'x', 0, /* 1030 */ 'r', 'c', 'x', 0, /* 1034 */ 'e', 'd', 'x', 0, /* 1038 */ 'r', 'd', 'x', 0, /* 1042 */ 'e', 'i', 'z', 0, /* 1046 */ 'r', 'i', 'z', 0, }; static const uint16_t RegAsmOffset[] = { 866, 894, 1011, 869, 897, 923, 914, 1019, 872, 900, 946, 1027, 875, 879, 906, 903, 949, 1035, 1010, 922, 1018, 1026, 878, 1034, 958, 930, 1042, 952, 886, 938, 1005, 955, 961, 931, 1014, 926, 1022, 1030, 882, 1038, 934, 1046, 890, 942, 887, 910, 939, 918, 964, 134, 228, 304, 380, 456, 532, 598, 664, 723, 782, 66, 160, 254, 330, 406, 482, 138, 232, 308, 384, 460, 536, 602, 668, 727, 786, 71, 165, 259, 335, 411, 487, 130, 224, 300, 376, 452, 528, 594, 660, 112, 206, 282, 358, 434, 510, 576, 642, 116, 210, 286, 362, 438, 514, 580, 646, 724, 783, 67, 161, 255, 331, 407, 483, 0, 6, 12, 18, 24, 30, 36, 42, 115, 209, 285, 361, 437, 513, 579, 645, 708, 767, 48, 142, 236, 312, 388, 464, 540, 606, 672, 731, 76, 170, 264, 340, 416, 492, 558, 624, 690, 749, 94, 188, 120, 214, 290, 366, 442, 518, 584, 650, 713, 772, 54, 148, 242, 318, 394, 470, 546, 612, 678, 737, 82, 176, 270, 346, 422, 498, 564, 630, 696, 755, 100, 194, 125, 219, 295, 371, 447, 523, 589, 655, 718, 777, 60, 154, 248, 324, 400, 476, 552, 618, 684, 743, 88, 182, 276, 352, 428, 504, 570, 636, 702, 761, 106, 200, 820, 824, 790, 795, 800, 805, 810, 815, 858, 862, 828, 833, 838, 843, 848, 853, 997, 1001, 967, 972, 977, 982, 987, 992, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { } static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) { #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; switch (MCInst_getOpcode(MI)) { default: return NULL; case X86_AAD8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAD8i8 10) AsmString = "aad"; break; } return NULL; case X86_AAM8i8: if (MCInst_getNumOperands(MI) == 1 && MCOperand_isImm(MCInst_getOperand(MI, 0)) && MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10) { // (AAM8i8 10) AsmString = "aam"; break; } return NULL; case X86_XSTORE: if (MCInst_getNumOperands(MI) == 0) { // (XSTORE) AsmString = "xstorerng"; break; } return NULL; } tmp = cs_strdup(AsmString); AsmMnem = tmp; for(AsmOps = tmp; *AsmOps; AsmOps++) { if (*AsmOps == ' ' || *AsmOps == '\t') { *AsmOps = '\0'; AsmOps++; break; } } SStream_concat0(OS, AsmMnem); if (*AsmOps) { SStream_concat0(OS, "\t"); for (c = AsmOps; *c; c++) { if (*c == '$') { c += 1; if (*c == (char)0xff) { c += 1; OpIdx = *c - 1; c += 1; PrintMethodIdx = *c - 1; printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, *c - 1, OS); } else { SStream_concat(OS, "%c", *c); } } } return tmp; } #endif // PRINT_ALIAS_INSTR capstone-sys-0.11.0/capstone/arch/X86/X86GenDisassemblerTables.inc010066400017500001750000415574311363402546700230230ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * X86 Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ static const struct OpcodeDecision emptyTable = { { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } }; static const struct OperandSpecifier x86OperandSets[][6] = { { /* 0 */ { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1 */ { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 2 */ { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 3 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 4 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 5 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 6 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 7 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 8 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 9 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 10 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 11 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 12 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 13 */ { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 14 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 15 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 16 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 17 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 18 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 19 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 20 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 21 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 22 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 23 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 24 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 25 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 26 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 27 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 28 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 29 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 30 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 31 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 32 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 33 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 34 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 35 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 36 */ { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 37 */ { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 38 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 39 */ { ENCODING_FP, TYPE_ST }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 40 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 41 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 42 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 43 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 44 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 45 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 46 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 47 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 48 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 49 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 50 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 51 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 52 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 53 */ { ENCODING_RM, TYPE_R16 }, { ENCODING_REG, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 54 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 55 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 56 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 57 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 58 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 59 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 60 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 61 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 62 */ { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 63 */ { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 64 */ { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 65 */ { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 66 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 67 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 68 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 69 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 70 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_Rv, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 71 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RO, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 72 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 73 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 74 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 75 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 76 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 77 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 78 */ { ENCODING_ID, TYPE_REL64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 79 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 80 */ { ENCODING_IW, TYPE_REL16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 81 */ { ENCODING_ID, TYPE_REL32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 82 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 83 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 84 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 85 */ { ENCODING_RM, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 86 */ { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 87 */ { ENCODING_RM, TYPE_R8 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 88 */ { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 89 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 90 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 91 */ { ENCODING_DI, TYPE_DSTIDX8 }, { ENCODING_SI, TYPE_SRCIDX8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 92 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 93 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 94 */ { ENCODING_DI, TYPE_DSTIDX32 }, { ENCODING_SI, TYPE_SRCIDX32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 95 */ { ENCODING_DI, TYPE_DSTIDX64 }, { ENCODING_SI, TYPE_SRCIDX64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 96 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 97 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 98 */ { ENCODING_DI, TYPE_DSTIDX16 }, { ENCODING_SI, TYPE_SRCIDX16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 99 */ { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 100 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 101 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 102 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 103 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 104 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 105 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 106 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 107 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 108 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 109 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 110 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 111 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 112 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 113 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 114 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 115 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 116 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 117 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 118 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 119 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 120 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 121 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 122 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 123 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 124 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 125 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 126 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 127 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 128 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 129 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 130 */ { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 131 */ { ENCODING_IW, TYPE_IMM16 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 132 */ { ENCODING_RM, TYPE_M32FP }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 133 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 134 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 135 */ { ENCODING_Iv, TYPE_IMMv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 136 */ { ENCODING_RM, TYPE_M1616 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 137 */ { ENCODING_Iv, TYPE_IMMv }, { ENCODING_IW, TYPE_IMM16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 138 */ { ENCODING_RM, TYPE_M1632 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 139 */ { ENCODING_RM, TYPE_M1664 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 140 */ { ENCODING_RM, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 141 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 142 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 143 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 144 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 145 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 146 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 147 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 148 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 149 */ { ENCODING_DI, TYPE_DSTIDX8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 150 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 151 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 152 */ { ENCODING_DI, TYPE_DSTIDX32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 153 */ { ENCODING_DI, TYPE_DSTIDX16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 154 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 155 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 156 */ { ENCODING_IB, TYPE_REL8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 157 */ { ENCODING_Iv, TYPE_RELv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 158 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_VK8 }, { ENCODING_RM, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 159 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_VK32 }, { ENCODING_RM, TYPE_VK32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 160 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_VVVV, TYPE_VK64 }, { ENCODING_RM, TYPE_VK64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 161 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_VK16 }, { ENCODING_RM, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 162 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_RM, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 163 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 164 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 165 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_REG, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 166 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 167 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_RM, TYPE_VK32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 168 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 169 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 170 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_VK32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 171 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_VK32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 172 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_RM, TYPE_VK64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 173 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 174 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 175 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_VK64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 176 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_VK64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 177 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_RM, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 178 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 179 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 180 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 181 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 182 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_RM, TYPE_VK8 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 183 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_RM, TYPE_VK32 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 184 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_RM, TYPE_VK64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 185 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_RM, TYPE_VK16 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 186 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 187 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M1616 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 188 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M1632 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 189 */ { ENCODING_RM, TYPE_M80FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 190 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 191 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_LEA }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 192 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_LEA }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 193 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M1664 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 194 */ { ENCODING_RM, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 195 */ { ENCODING_SI, TYPE_SRCIDX8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 196 */ { ENCODING_SI, TYPE_SRCIDX32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 197 */ { ENCODING_SI, TYPE_SRCIDX64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 198 */ { ENCODING_SI, TYPE_SRCIDX16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 199 */ { ENCODING_IW, TYPE_IMM16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 200 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 201 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 202 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 203 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 204 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 205 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 206 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 207 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 208 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 209 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 210 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 211 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 212 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 213 */ { ENCODING_RM, TYPE_MM64 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 214 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 215 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 216 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 217 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 218 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 219 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 220 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 221 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 222 */ { ENCODING_REG, TYPE_MM64 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 223 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_MM64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 224 */ { ENCODING_Ia, TYPE_MOFFS16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 225 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 226 */ { ENCODING_Rv, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 227 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 228 */ { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 229 */ { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 230 */ { ENCODING_Ia, TYPE_MOFFS32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 231 */ { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 232 */ { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 233 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 234 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 235 */ { ENCODING_Ia, TYPE_MOFFS64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 236 */ { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 237 */ { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 238 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 239 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 240 */ { ENCODING_RO, TYPE_R64 }, { ENCODING_IO, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 241 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 242 */ { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 243 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 244 */ { ENCODING_Ia, TYPE_MOFFS8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 245 */ { ENCODING_RB, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 246 */ { ENCODING_RM, TYPE_M128 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 247 */ { ENCODING_RM, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 248 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 249 */ { ENCODING_RM, TYPE_M64FP }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 250 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 251 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 252 */ { ENCODING_RM, TYPE_M32FP }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 253 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 254 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 255 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 256 */ { ENCODING_RM, TYPE_M64FP }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 257 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 258 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 259 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 260 */ { ENCODING_RM, TYPE_M32FP }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 261 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 262 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 263 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 264 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 265 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 266 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 267 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 268 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 269 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 270 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 271 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 272 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 273 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 274 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 275 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 276 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 277 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 278 */ { ENCODING_Rv, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 279 */ { ENCODING_RO, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 280 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 281 */ { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 282 */ { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 283 */ { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 284 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 285 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 286 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 287 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 288 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 289 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 290 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 291 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 292 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 293 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 294 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 295 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 296 */ { ENCODING_DI, TYPE_DSTIDX64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 297 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 298 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 299 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 300 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 301 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 302 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 303 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 304 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 305 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 306 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, }, { /* 307 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 308 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 309 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 310 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 311 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 312 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 313 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 314 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 315 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, }, { /* 316 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 317 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 318 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 319 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 320 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 321 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 322 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 323 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, }, { /* 324 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 325 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 326 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 327 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, }, { /* 328 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 329 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 330 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 331 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 332 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 333 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 334 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 335 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 336 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 337 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, }, { /* 338 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 339 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 340 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 341 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 342 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 343 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 344 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, }, { /* 345 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 346 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 347 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 348 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 349 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 350 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 351 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, }, { /* 352 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 353 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 354 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, }, { /* 355 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 356 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 357 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 358 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 359 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 360 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 361 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 362 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 363 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 364 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 365 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 366 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 367 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM32 }, }, { /* 368 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 369 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 370 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 371 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 372 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 373 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 374 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 375 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 376 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 377 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 378 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM32 }, }, { /* 379 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 380 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 381 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 382 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 383 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 384 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, }, { /* 385 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 386 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, }, { /* 387 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 388 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 389 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 390 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 391 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 392 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 393 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 394 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 395 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 396 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 397 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 398 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 399 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 400 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 401 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 402 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 403 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 404 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 405 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 406 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 407 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 408 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 409 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 410 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 411 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 412 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 413 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 414 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 415 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 416 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 417 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 418 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 419 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 420 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 421 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 422 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 423 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 424 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 425 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 426 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 427 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 428 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 429 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 430 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 431 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 432 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 433 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 434 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 435 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 436 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 437 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 438 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 439 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 440 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 441 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 442 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 443 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 444 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 445 */ { ENCODING_REG, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD16, TYPE_M64FP }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 446 */ { ENCODING_REG, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD16, TYPE_XMM64 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 447 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 448 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 449 */ { ENCODING_REG, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD16, TYPE_M32FP }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 450 */ { ENCODING_REG, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD16, TYPE_XMM32 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 451 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 452 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_IB, TYPE_IMM5 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 453 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 454 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 455 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 456 */ { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 457 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 458 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 459 */ { ENCODING_RM_CD8, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 460 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 461 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 462 */ { ENCODING_RM_CD8, TYPE_M512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 463 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 464 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 465 */ { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 466 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 467 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 468 */ { ENCODING_RM_CD4, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 469 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 470 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 471 */ { ENCODING_RM_CD4, TYPE_M512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 472 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 473 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 474 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 475 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 476 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 477 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 478 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 479 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 480 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 481 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 482 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 483 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 484 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 485 */ { ENCODING_RM, TYPE_M128 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 486 */ { ENCODING_RM, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 487 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 488 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 489 */ { ENCODING_RM, TYPE_M64FP }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 490 */ { ENCODING_RM, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 491 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 492 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 493 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 494 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 495 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 496 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD16, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 497 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 498 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 499 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 500 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 501 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 502 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD4, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 503 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 504 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 505 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 506 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 507 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 508 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 509 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 510 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 511 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 512 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD8, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 513 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 514 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD16, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 515 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 516 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 517 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 518 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 519 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 520 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 521 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 522 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 523 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 524 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 525 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 526 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 527 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 528 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 529 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 530 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 531 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 532 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 533 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 534 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 535 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 536 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 537 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 538 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 539 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 540 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 541 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 542 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 543 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 544 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 545 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 546 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 547 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD8, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 548 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD8, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 549 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 550 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 551 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 552 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 553 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 554 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 555 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 556 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 557 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 558 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 559 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 560 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 561 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 562 */ { ENCODING_RM_CD64, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 563 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD64, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 564 */ { ENCODING_RM_CD64, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 565 */ { ENCODING_RM_CD64, TYPE_XMM256 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 566 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD64, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 567 */ { ENCODING_RM_CD64, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 568 */ { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 569 */ { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 570 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 571 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 572 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 573 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 574 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 575 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 576 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 577 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 578 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 579 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 580 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 581 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 582 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 583 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 584 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 585 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 586 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 587 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 588 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 589 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 590 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 591 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 592 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 593 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 594 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_XMM512 }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 595 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_IB, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 596 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_IB, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 597 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_IB, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 598 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_IB, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 599 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 600 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 601 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 602 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 603 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_IB, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 604 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_IB, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 605 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_IB, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 606 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_IB, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 607 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 608 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 609 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 610 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 611 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP4 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M64 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 612 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP3 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M64 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 613 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP4 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M64 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 614 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP4 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 615 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP3 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_M32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 616 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP4 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M32 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 617 */ { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 618 */ { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_M32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 619 */ { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 620 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_DUP, TYPE_DUP3 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD4, TYPE_M64 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 621 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 622 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 623 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 624 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 625 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 626 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 627 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M32FP }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 628 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 629 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 630 */ { ENCODING_RM, TYPE_M256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 631 */ { ENCODING_RM, TYPE_M128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 632 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 633 */ { ENCODING_RM, TYPE_M256 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 634 */ { ENCODING_RM, TYPE_XMM256 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 635 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 636 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 637 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 638 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 639 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 640 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 641 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 642 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 643 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 644 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 645 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 646 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 647 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 648 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 649 */ { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 650 */ { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 651 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 652 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 653 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 654 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 655 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 656 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 657 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 658 */ { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 659 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 660 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 661 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 662 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 663 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 664 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 665 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 666 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 667 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 668 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 669 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 670 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 671 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 672 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 673 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 674 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 675 */ { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 676 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 677 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 678 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 679 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 680 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 681 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 682 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 683 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 684 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 685 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 686 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 687 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 688 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 689 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 690 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 691 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 692 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 693 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 694 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 695 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 696 */ { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 697 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 698 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 699 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 700 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 701 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 702 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 703 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 704 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 705 */ { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 706 */ { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 707 */ { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 708 */ { ENCODING_RM_CD16, TYPE_R64 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 709 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 710 */ { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 711 */ { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 712 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 713 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 714 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 715 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 716 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 717 */ { ENCODING_RM, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 718 */ { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_REG, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 719 */ { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 720 */ { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 721 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 722 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 723 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 724 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 725 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 726 */ { ENCODING_RM, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 727 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 728 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 729 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 730 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 731 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 732 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 733 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 734 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 735 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 736 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 737 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 738 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 739 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 740 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 741 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 742 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 743 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 744 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 745 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, }, { /* 746 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 747 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 748 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, }, { /* 749 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 750 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 751 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, }, { /* 752 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 753 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 754 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, }, { /* 755 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 756 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 757 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, }, { /* 758 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 759 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 760 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, }, { /* 761 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 762 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 763 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 764 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 765 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 766 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 767 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 768 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 769 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 770 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 771 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 772 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 773 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 774 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 775 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 776 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 777 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 778 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 779 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 780 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 781 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 782 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 783 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 784 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 785 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 786 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 787 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 788 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 789 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 790 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 791 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 792 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 793 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 794 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 795 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 796 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 797 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD16, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 798 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD16, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 799 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 800 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD32, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 801 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_RM_CD32, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 802 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 803 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 804 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 805 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 806 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 807 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 808 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 809 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 810 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_RM_CD64, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 811 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 812 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 813 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 814 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 815 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 816 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 817 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 818 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 819 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 820 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 821 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 822 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 823 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 824 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 825 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 826 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 827 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 828 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 829 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 830 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 831 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 832 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 833 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 834 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 835 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 836 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 837 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 838 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 839 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 840 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 841 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 842 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 843 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 844 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 845 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 846 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 847 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 848 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 849 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 850 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 851 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 852 */ { ENCODING_REG, TYPE_VK64 }, { ENCODING_WRITEMASK, TYPE_VK64 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 853 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 854 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 855 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 856 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 857 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 858 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 859 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 860 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 861 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 862 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 863 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 864 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 865 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 866 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 867 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 868 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 869 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 870 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 871 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 872 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 873 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 874 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 875 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 876 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 877 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 878 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 879 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 880 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 881 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 882 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 883 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 884 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 885 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 886 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 887 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 888 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 889 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 890 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 891 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 892 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 893 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 894 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 895 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 896 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 897 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 898 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 899 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 900 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 901 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 902 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 903 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 904 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 905 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 906 */ { ENCODING_REG, TYPE_VK2 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 907 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 908 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 909 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 910 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 911 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 912 */ { ENCODING_REG, TYPE_VK4 }, { ENCODING_WRITEMASK, TYPE_VK4 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 913 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 914 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 915 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 916 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 917 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 918 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 919 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 920 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 921 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 922 */ { ENCODING_REG, TYPE_VK8 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 923 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 924 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 925 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 926 */ { ENCODING_REG, TYPE_VK16 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 927 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 928 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 929 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 930 */ { ENCODING_REG, TYPE_VK32 }, { ENCODING_WRITEMASK, TYPE_VK32 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_AVX512ICC }, { ENCODING_NONE, TYPE_NONE }, }, { /* 931 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 932 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM3 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 933 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD4, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 934 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 935 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 936 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 937 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 938 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 939 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 940 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_IB, TYPE_XMM256 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 941 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_M256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 942 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 943 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 944 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 945 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 946 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 947 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 948 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 949 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 950 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 951 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 952 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 953 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 954 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 955 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 956 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 957 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_REG, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 958 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_VK32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 959 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_REG, TYPE_VK64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 960 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_REG, TYPE_VK4 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 961 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 962 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_REG, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 963 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_REG, TYPE_VK2 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 964 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_VK4 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 965 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_REG, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 966 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_REG, TYPE_VK8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 967 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_REG, TYPE_VK16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 968 */ { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_REG, TYPE_VK32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 969 */ { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 970 */ { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 971 */ { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 972 */ { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 973 */ { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 974 */ { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 975 */ { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 976 */ { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 977 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 978 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 979 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 980 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 981 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_M256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 982 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 983 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD32, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 984 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 985 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 986 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 987 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 988 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 989 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 990 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_RM_CD4, TYPE_M32 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 991 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_RM_CD8, TYPE_M64 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 992 */ { ENCODING_DUP, TYPE_DUP2 }, { ENCODING_RM_CD4, TYPE_M64 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_REG, TYPE_XMM256 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 993 */ { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM256 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 994 */ { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 995 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 996 */ { ENCODING_REG, TYPE_XMM256 }, { ENCODING_VVVV, TYPE_XMM256 }, { ENCODING_RM, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 997 */ { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 998 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 999 */ { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1000 */ { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1001 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1002 */ { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1003 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1004 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1005 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1006 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1007 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1008 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1009 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1010 */ { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_M512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1011 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1012 */ { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_RM_CD64, TYPE_XMM512 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1013 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1014 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1015 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1016 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1017 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1018 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1019 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1020 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1021 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1022 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK16 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1023 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1024 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1025 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1026 */ { ENCODING_REG, TYPE_XMM512 }, { ENCODING_WRITEMASK, TYPE_VK8 }, { ENCODING_VVVV, TYPE_XMM512 }, { ENCODING_RM_CD16, TYPE_XMM512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1027 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1028 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1029 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK2 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1030 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_M64FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1031 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1032 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_M32FP }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1033 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1034 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1035 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, }, { /* 1036 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1037 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1038 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, }, { /* 1039 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD8, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1040 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1041 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, }, { /* 1042 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_M128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1043 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1044 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, }, { /* 1045 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_WRITEMASK, TYPE_VK1 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM_CD4, TYPE_XMM128 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1046 */ { ENCODING_REG, TYPE_XMM128 }, { ENCODING_VVVV, TYPE_XMM128 }, { ENCODING_RM, TYPE_M64FP }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1047 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM, TYPE_XMM64 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1048 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM, TYPE_XMM32 }, { ENCODING_IB, TYPE_UIMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1049 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_VVVV, TYPE_XMM64 }, { ENCODING_RM_CD16, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1050 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_VVVV, TYPE_XMM32 }, { ENCODING_RM_CD16, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1051 */ { ENCODING_REG, TYPE_XMM64 }, { ENCODING_RM_CD8, TYPE_XMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1052 */ { ENCODING_REG, TYPE_XMM32 }, { ENCODING_RM_CD4, TYPE_XMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, }; static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[8853] = { { /* 0 */ 0, /* */ }, { /* 1 */ 0, /* */ }, { /* 2 */ 0, /* */ }, { /* 3 */ 0, /* */ }, { /* 4 */ 0, /* */ }, { /* 5 */ 0, /* */ }, { /* 6 */ 0, /* */ }, { /* 7 */ 0, /* */ }, { /* 8 */ 0, /* */ }, { /* 9 */ 0, /* */ }, { /* 10 */ 0, /* */ }, { /* 11 */ 0, /* */ }, { /* 12 */ 0, /* */ }, { /* 13 */ 0, /* */ }, { /* 14 */ 0, /* */ }, { /* 15 */ 0, /* */ }, { /* 16 */ 0, /* */ }, { /* 17 */ 0, /* */ }, { /* 18 */ 0, /* */ }, { /* 19 */ 0, /* */ }, { /* 20 */ 0, /* */ }, { /* 21 */ 0, /* */ }, { /* 22 */ 0, /* AAA */ }, { /* 23 */ 1, /* AAD8i8 */ }, { /* 24 */ 1, /* AAM8i8 */ }, { /* 25 */ 0, /* AAS */ }, { /* 26 */ 0, /* ABS_F */ }, { /* 27 */ 0, /* */ }, { /* 28 */ 0, /* */ }, { /* 29 */ 0, /* */ }, { /* 30 */ 0, /* */ }, { /* 31 */ 0, /* */ }, { /* 32 */ 0, /* */ }, { /* 33 */ 0, /* */ }, { /* 34 */ 2, /* ADC16i16 */ }, { /* 35 */ 3, /* ADC16mi */ }, { /* 36 */ 4, /* ADC16mi8 */ }, { /* 37 */ 5, /* ADC16mr */ }, { /* 38 */ 6, /* ADC16ri */ }, { /* 39 */ 7, /* ADC16ri8 */ }, { /* 40 */ 8, /* ADC16rm */ }, { /* 41 */ 9, /* ADC16rr */ }, { /* 42 */ 10, /* ADC16rr_REV */ }, { /* 43 */ 2, /* ADC32i32 */ }, { /* 44 */ 3, /* ADC32mi */ }, { /* 45 */ 11, /* ADC32mi8 */ }, { /* 46 */ 5, /* ADC32mr */ }, { /* 47 */ 6, /* ADC32ri */ }, { /* 48 */ 12, /* ADC32ri8 */ }, { /* 49 */ 8, /* ADC32rm */ }, { /* 50 */ 9, /* ADC32rr */ }, { /* 51 */ 10, /* ADC32rr_REV */ }, { /* 52 */ 13, /* ADC64i32 */ }, { /* 53 */ 14, /* ADC64mi32 */ }, { /* 54 */ 15, /* ADC64mi8 */ }, { /* 55 */ 16, /* ADC64mr */ }, { /* 56 */ 17, /* ADC64ri32 */ }, { /* 57 */ 18, /* ADC64ri8 */ }, { /* 58 */ 19, /* ADC64rm */ }, { /* 59 */ 20, /* ADC64rr */ }, { /* 60 */ 21, /* ADC64rr_REV */ }, { /* 61 */ 1, /* ADC8i8 */ }, { /* 62 */ 22, /* ADC8mi */ }, { /* 63 */ 22, /* ADC8mi8 */ }, { /* 64 */ 23, /* ADC8mr */ }, { /* 65 */ 24, /* ADC8ri */ }, { /* 66 */ 24, /* ADC8ri8 */ }, { /* 67 */ 25, /* ADC8rm */ }, { /* 68 */ 26, /* ADC8rr */ }, { /* 69 */ 27, /* ADC8rr_REV */ }, { /* 70 */ 28, /* ADCX32rm */ }, { /* 71 */ 29, /* ADCX32rr */ }, { /* 72 */ 19, /* ADCX64rm */ }, { /* 73 */ 21, /* ADCX64rr */ }, { /* 74 */ 2, /* ADD16i16 */ }, { /* 75 */ 3, /* ADD16mi */ }, { /* 76 */ 4, /* ADD16mi8 */ }, { /* 77 */ 5, /* ADD16mr */ }, { /* 78 */ 6, /* ADD16ri */ }, { /* 79 */ 7, /* ADD16ri8 */ }, { /* 80 */ 0, /* */ }, { /* 81 */ 0, /* */ }, { /* 82 */ 8, /* ADD16rm */ }, { /* 83 */ 9, /* ADD16rr */ }, { /* 84 */ 0, /* */ }, { /* 85 */ 10, /* ADD16rr_REV */ }, { /* 86 */ 2, /* ADD32i32 */ }, { /* 87 */ 3, /* ADD32mi */ }, { /* 88 */ 11, /* ADD32mi8 */ }, { /* 89 */ 5, /* ADD32mr */ }, { /* 90 */ 6, /* ADD32ri */ }, { /* 91 */ 12, /* ADD32ri8 */ }, { /* 92 */ 0, /* */ }, { /* 93 */ 0, /* */ }, { /* 94 */ 8, /* ADD32rm */ }, { /* 95 */ 9, /* ADD32rr */ }, { /* 96 */ 0, /* */ }, { /* 97 */ 10, /* ADD32rr_REV */ }, { /* 98 */ 13, /* ADD64i32 */ }, { /* 99 */ 14, /* ADD64mi32 */ }, { /* 100 */ 15, /* ADD64mi8 */ }, { /* 101 */ 16, /* ADD64mr */ }, { /* 102 */ 17, /* ADD64ri32 */ }, { /* 103 */ 0, /* */ }, { /* 104 */ 18, /* ADD64ri8 */ }, { /* 105 */ 0, /* */ }, { /* 106 */ 19, /* ADD64rm */ }, { /* 107 */ 20, /* ADD64rr */ }, { /* 108 */ 0, /* */ }, { /* 109 */ 21, /* ADD64rr_REV */ }, { /* 110 */ 1, /* ADD8i8 */ }, { /* 111 */ 22, /* ADD8mi */ }, { /* 112 */ 22, /* ADD8mi8 */ }, { /* 113 */ 23, /* ADD8mr */ }, { /* 114 */ 24, /* ADD8ri */ }, { /* 115 */ 24, /* ADD8ri8 */ }, { /* 116 */ 25, /* ADD8rm */ }, { /* 117 */ 26, /* ADD8rr */ }, { /* 118 */ 27, /* ADD8rr_REV */ }, { /* 119 */ 30, /* ADDPDrm */ }, { /* 120 */ 31, /* ADDPDrr */ }, { /* 121 */ 30, /* ADDPSrm */ }, { /* 122 */ 31, /* ADDPSrr */ }, { /* 123 */ 32, /* ADDSDrm */ }, { /* 124 */ 0, /* */ }, { /* 125 */ 33, /* ADDSDrr */ }, { /* 126 */ 0, /* */ }, { /* 127 */ 34, /* ADDSSrm */ }, { /* 128 */ 0, /* */ }, { /* 129 */ 35, /* ADDSSrr */ }, { /* 130 */ 0, /* */ }, { /* 131 */ 30, /* ADDSUBPDrm */ }, { /* 132 */ 31, /* ADDSUBPDrr */ }, { /* 133 */ 30, /* ADDSUBPSrm */ }, { /* 134 */ 31, /* ADDSUBPSrr */ }, { /* 135 */ 36, /* ADD_F32m */ }, { /* 136 */ 37, /* ADD_F64m */ }, { /* 137 */ 38, /* ADD_FI16m */ }, { /* 138 */ 38, /* ADD_FI32m */ }, { /* 139 */ 39, /* ADD_FPrST0 */ }, { /* 140 */ 39, /* ADD_FST0r */ }, { /* 141 */ 0, /* */ }, { /* 142 */ 0, /* */ }, { /* 143 */ 0, /* */ }, { /* 144 */ 0, /* */ }, { /* 145 */ 0, /* */ }, { /* 146 */ 0, /* */ }, { /* 147 */ 0, /* */ }, { /* 148 */ 0, /* */ }, { /* 149 */ 0, /* */ }, { /* 150 */ 0, /* */ }, { /* 151 */ 0, /* */ }, { /* 152 */ 0, /* */ }, { /* 153 */ 0, /* */ }, { /* 154 */ 0, /* */ }, { /* 155 */ 39, /* ADD_FrST0 */ }, { /* 156 */ 0, /* */ }, { /* 157 */ 0, /* */ }, { /* 158 */ 0, /* */ }, { /* 159 */ 0, /* */ }, { /* 160 */ 40, /* ADOX32rm */ }, { /* 161 */ 41, /* ADOX32rr */ }, { /* 162 */ 42, /* ADOX64rm */ }, { /* 163 */ 43, /* ADOX64rr */ }, { /* 164 */ 30, /* AESDECLASTrm */ }, { /* 165 */ 31, /* AESDECLASTrr */ }, { /* 166 */ 30, /* AESDECrm */ }, { /* 167 */ 31, /* AESDECrr */ }, { /* 168 */ 30, /* AESENCLASTrm */ }, { /* 169 */ 31, /* AESENCLASTrr */ }, { /* 170 */ 30, /* AESENCrm */ }, { /* 171 */ 31, /* AESENCrr */ }, { /* 172 */ 44, /* AESIMCrm */ }, { /* 173 */ 45, /* AESIMCrr */ }, { /* 174 */ 46, /* AESKEYGENASSIST128rm */ }, { /* 175 */ 47, /* AESKEYGENASSIST128rr */ }, { /* 176 */ 2, /* AND16i16 */ }, { /* 177 */ 3, /* AND16mi */ }, { /* 178 */ 4, /* AND16mi8 */ }, { /* 179 */ 5, /* AND16mr */ }, { /* 180 */ 6, /* AND16ri */ }, { /* 181 */ 7, /* AND16ri8 */ }, { /* 182 */ 8, /* AND16rm */ }, { /* 183 */ 9, /* AND16rr */ }, { /* 184 */ 10, /* AND16rr_REV */ }, { /* 185 */ 2, /* AND32i32 */ }, { /* 186 */ 3, /* AND32mi */ }, { /* 187 */ 11, /* AND32mi8 */ }, { /* 188 */ 5, /* AND32mr */ }, { /* 189 */ 6, /* AND32ri */ }, { /* 190 */ 12, /* AND32ri8 */ }, { /* 191 */ 8, /* AND32rm */ }, { /* 192 */ 9, /* AND32rr */ }, { /* 193 */ 10, /* AND32rr_REV */ }, { /* 194 */ 13, /* AND64i32 */ }, { /* 195 */ 14, /* AND64mi32 */ }, { /* 196 */ 15, /* AND64mi8 */ }, { /* 197 */ 16, /* AND64mr */ }, { /* 198 */ 17, /* AND64ri32 */ }, { /* 199 */ 18, /* AND64ri8 */ }, { /* 200 */ 19, /* AND64rm */ }, { /* 201 */ 20, /* AND64rr */ }, { /* 202 */ 21, /* AND64rr_REV */ }, { /* 203 */ 1, /* AND8i8 */ }, { /* 204 */ 22, /* AND8mi */ }, { /* 205 */ 22, /* AND8mi8 */ }, { /* 206 */ 23, /* AND8mr */ }, { /* 207 */ 24, /* AND8ri */ }, { /* 208 */ 24, /* AND8ri8 */ }, { /* 209 */ 25, /* AND8rm */ }, { /* 210 */ 26, /* AND8rr */ }, { /* 211 */ 27, /* AND8rr_REV */ }, { /* 212 */ 48, /* ANDN32rm */ }, { /* 213 */ 49, /* ANDN32rr */ }, { /* 214 */ 50, /* ANDN64rm */ }, { /* 215 */ 51, /* ANDN64rr */ }, { /* 216 */ 30, /* ANDNPDrm */ }, { /* 217 */ 31, /* ANDNPDrr */ }, { /* 218 */ 30, /* ANDNPSrm */ }, { /* 219 */ 31, /* ANDNPSrr */ }, { /* 220 */ 30, /* ANDPDrm */ }, { /* 221 */ 31, /* ANDPDrr */ }, { /* 222 */ 30, /* ANDPSrm */ }, { /* 223 */ 31, /* ANDPSrr */ }, { /* 224 */ 52, /* ARPL16mr */ }, { /* 225 */ 53, /* ARPL16rr */ }, { /* 226 */ 0, /* */ }, { /* 227 */ 0, /* */ }, { /* 228 */ 0, /* */ }, { /* 229 */ 54, /* BEXTR32rm */ }, { /* 230 */ 55, /* BEXTR32rr */ }, { /* 231 */ 56, /* BEXTR64rm */ }, { /* 232 */ 57, /* BEXTR64rr */ }, { /* 233 */ 58, /* BEXTRI32mi */ }, { /* 234 */ 59, /* BEXTRI32ri */ }, { /* 235 */ 60, /* BEXTRI64mi */ }, { /* 236 */ 61, /* BEXTRI64ri */ }, { /* 237 */ 62, /* BLCFILL32rm */ }, { /* 238 */ 63, /* BLCFILL32rr */ }, { /* 239 */ 64, /* BLCFILL64rm */ }, { /* 240 */ 65, /* BLCFILL64rr */ }, { /* 241 */ 62, /* BLCI32rm */ }, { /* 242 */ 63, /* BLCI32rr */ }, { /* 243 */ 64, /* BLCI64rm */ }, { /* 244 */ 65, /* BLCI64rr */ }, { /* 245 */ 62, /* BLCIC32rm */ }, { /* 246 */ 63, /* BLCIC32rr */ }, { /* 247 */ 64, /* BLCIC64rm */ }, { /* 248 */ 65, /* BLCIC64rr */ }, { /* 249 */ 62, /* BLCMSK32rm */ }, { /* 250 */ 63, /* BLCMSK32rr */ }, { /* 251 */ 64, /* BLCMSK64rm */ }, { /* 252 */ 65, /* BLCMSK64rr */ }, { /* 253 */ 62, /* BLCS32rm */ }, { /* 254 */ 63, /* BLCS32rr */ }, { /* 255 */ 64, /* BLCS64rm */ }, { /* 256 */ 65, /* BLCS64rr */ }, { /* 257 */ 66, /* BLENDPDrmi */ }, { /* 258 */ 67, /* BLENDPDrri */ }, { /* 259 */ 66, /* BLENDPSrmi */ }, { /* 260 */ 67, /* BLENDPSrri */ }, { /* 261 */ 30, /* BLENDVPDrm0 */ }, { /* 262 */ 31, /* BLENDVPDrr0 */ }, { /* 263 */ 30, /* BLENDVPSrm0 */ }, { /* 264 */ 31, /* BLENDVPSrr0 */ }, { /* 265 */ 62, /* BLSFILL32rm */ }, { /* 266 */ 63, /* BLSFILL32rr */ }, { /* 267 */ 64, /* BLSFILL64rm */ }, { /* 268 */ 65, /* BLSFILL64rr */ }, { /* 269 */ 62, /* BLSI32rm */ }, { /* 270 */ 63, /* BLSI32rr */ }, { /* 271 */ 64, /* BLSI64rm */ }, { /* 272 */ 65, /* BLSI64rr */ }, { /* 273 */ 62, /* BLSIC32rm */ }, { /* 274 */ 63, /* BLSIC32rr */ }, { /* 275 */ 64, /* BLSIC64rm */ }, { /* 276 */ 65, /* BLSIC64rr */ }, { /* 277 */ 62, /* BLSMSK32rm */ }, { /* 278 */ 63, /* BLSMSK32rr */ }, { /* 279 */ 64, /* BLSMSK64rm */ }, { /* 280 */ 65, /* BLSMSK64rr */ }, { /* 281 */ 62, /* BLSR32rm */ }, { /* 282 */ 63, /* BLSR32rr */ }, { /* 283 */ 64, /* BLSR64rm */ }, { /* 284 */ 65, /* BLSR64rr */ }, { /* 285 */ 68, /* BOUNDS16rm */ }, { /* 286 */ 68, /* BOUNDS32rm */ }, { /* 287 */ 68, /* BSF16rm */ }, { /* 288 */ 69, /* BSF16rr */ }, { /* 289 */ 68, /* BSF32rm */ }, { /* 290 */ 69, /* BSF32rr */ }, { /* 291 */ 42, /* BSF64rm */ }, { /* 292 */ 43, /* BSF64rr */ }, { /* 293 */ 68, /* BSR16rm */ }, { /* 294 */ 69, /* BSR16rr */ }, { /* 295 */ 68, /* BSR32rm */ }, { /* 296 */ 69, /* BSR32rr */ }, { /* 297 */ 42, /* BSR64rm */ }, { /* 298 */ 43, /* BSR64rr */ }, { /* 299 */ 70, /* BSWAP32r */ }, { /* 300 */ 71, /* BSWAP64r */ }, { /* 301 */ 4, /* BT16mi8 */ }, { /* 302 */ 5, /* BT16mr */ }, { /* 303 */ 72, /* BT16ri8 */ }, { /* 304 */ 73, /* BT16rr */ }, { /* 305 */ 11, /* BT32mi8 */ }, { /* 306 */ 5, /* BT32mr */ }, { /* 307 */ 74, /* BT32ri8 */ }, { /* 308 */ 73, /* BT32rr */ }, { /* 309 */ 15, /* BT64mi8 */ }, { /* 310 */ 16, /* BT64mr */ }, { /* 311 */ 75, /* BT64ri8 */ }, { /* 312 */ 76, /* BT64rr */ }, { /* 313 */ 4, /* BTC16mi8 */ }, { /* 314 */ 5, /* BTC16mr */ }, { /* 315 */ 72, /* BTC16ri8 */ }, { /* 316 */ 73, /* BTC16rr */ }, { /* 317 */ 11, /* BTC32mi8 */ }, { /* 318 */ 5, /* BTC32mr */ }, { /* 319 */ 74, /* BTC32ri8 */ }, { /* 320 */ 73, /* BTC32rr */ }, { /* 321 */ 15, /* BTC64mi8 */ }, { /* 322 */ 16, /* BTC64mr */ }, { /* 323 */ 75, /* BTC64ri8 */ }, { /* 324 */ 76, /* BTC64rr */ }, { /* 325 */ 4, /* BTR16mi8 */ }, { /* 326 */ 5, /* BTR16mr */ }, { /* 327 */ 72, /* BTR16ri8 */ }, { /* 328 */ 73, /* BTR16rr */ }, { /* 329 */ 11, /* BTR32mi8 */ }, { /* 330 */ 5, /* BTR32mr */ }, { /* 331 */ 74, /* BTR32ri8 */ }, { /* 332 */ 73, /* BTR32rr */ }, { /* 333 */ 15, /* BTR64mi8 */ }, { /* 334 */ 16, /* BTR64mr */ }, { /* 335 */ 75, /* BTR64ri8 */ }, { /* 336 */ 76, /* BTR64rr */ }, { /* 337 */ 4, /* BTS16mi8 */ }, { /* 338 */ 5, /* BTS16mr */ }, { /* 339 */ 72, /* BTS16ri8 */ }, { /* 340 */ 73, /* BTS16rr */ }, { /* 341 */ 11, /* BTS32mi8 */ }, { /* 342 */ 5, /* BTS32mr */ }, { /* 343 */ 74, /* BTS32ri8 */ }, { /* 344 */ 73, /* BTS32rr */ }, { /* 345 */ 15, /* BTS64mi8 */ }, { /* 346 */ 16, /* BTS64mr */ }, { /* 347 */ 75, /* BTS64ri8 */ }, { /* 348 */ 76, /* BTS64rr */ }, { /* 349 */ 54, /* BZHI32rm */ }, { /* 350 */ 55, /* BZHI32rr */ }, { /* 351 */ 56, /* BZHI64rm */ }, { /* 352 */ 57, /* BZHI64rr */ }, { /* 353 */ 38, /* CALL16m */ }, { /* 354 */ 77, /* CALL16r */ }, { /* 355 */ 38, /* CALL32m */ }, { /* 356 */ 77, /* CALL32r */ }, { /* 357 */ 38, /* CALL64m */ }, { /* 358 */ 78, /* CALL64pcrel32 */ }, { /* 359 */ 79, /* CALL64r */ }, { /* 360 */ 80, /* CALLpcrel16 */ }, { /* 361 */ 81, /* CALLpcrel32 */ }, { /* 362 */ 0, /* CBW */ }, { /* 363 */ 0, /* CDQ */ }, { /* 364 */ 0, /* CDQE */ }, { /* 365 */ 0, /* CHS_F */ }, { /* 366 */ 0, /* */ }, { /* 367 */ 0, /* */ }, { /* 368 */ 0, /* */ }, { /* 369 */ 0, /* CLAC */ }, { /* 370 */ 0, /* CLC */ }, { /* 371 */ 0, /* CLD */ }, { /* 372 */ 82, /* CLFLUSH */ }, { /* 373 */ 82, /* CLFLUSHOPT */ }, { /* 374 */ 0, /* CLGI */ }, { /* 375 */ 0, /* CLI */ }, { /* 376 */ 0, /* CLTS */ }, { /* 377 */ 82, /* CLWB */ }, { /* 378 */ 0, /* CMC */ }, { /* 379 */ 8, /* CMOVA16rm */ }, { /* 380 */ 10, /* CMOVA16rr */ }, { /* 381 */ 8, /* CMOVA32rm */ }, { /* 382 */ 10, /* CMOVA32rr */ }, { /* 383 */ 19, /* CMOVA64rm */ }, { /* 384 */ 21, /* CMOVA64rr */ }, { /* 385 */ 8, /* CMOVAE16rm */ }, { /* 386 */ 10, /* CMOVAE16rr */ }, { /* 387 */ 8, /* CMOVAE32rm */ }, { /* 388 */ 10, /* CMOVAE32rr */ }, { /* 389 */ 19, /* CMOVAE64rm */ }, { /* 390 */ 21, /* CMOVAE64rr */ }, { /* 391 */ 8, /* CMOVB16rm */ }, { /* 392 */ 10, /* CMOVB16rr */ }, { /* 393 */ 8, /* CMOVB32rm */ }, { /* 394 */ 10, /* CMOVB32rr */ }, { /* 395 */ 19, /* CMOVB64rm */ }, { /* 396 */ 21, /* CMOVB64rr */ }, { /* 397 */ 8, /* CMOVBE16rm */ }, { /* 398 */ 10, /* CMOVBE16rr */ }, { /* 399 */ 8, /* CMOVBE32rm */ }, { /* 400 */ 10, /* CMOVBE32rr */ }, { /* 401 */ 19, /* CMOVBE64rm */ }, { /* 402 */ 21, /* CMOVBE64rr */ }, { /* 403 */ 39, /* CMOVBE_F */ }, { /* 404 */ 0, /* */ }, { /* 405 */ 0, /* */ }, { /* 406 */ 0, /* */ }, { /* 407 */ 39, /* CMOVB_F */ }, { /* 408 */ 0, /* */ }, { /* 409 */ 0, /* */ }, { /* 410 */ 0, /* */ }, { /* 411 */ 8, /* CMOVE16rm */ }, { /* 412 */ 10, /* CMOVE16rr */ }, { /* 413 */ 8, /* CMOVE32rm */ }, { /* 414 */ 10, /* CMOVE32rr */ }, { /* 415 */ 19, /* CMOVE64rm */ }, { /* 416 */ 21, /* CMOVE64rr */ }, { /* 417 */ 39, /* CMOVE_F */ }, { /* 418 */ 0, /* */ }, { /* 419 */ 0, /* */ }, { /* 420 */ 0, /* */ }, { /* 421 */ 8, /* CMOVG16rm */ }, { /* 422 */ 10, /* CMOVG16rr */ }, { /* 423 */ 8, /* CMOVG32rm */ }, { /* 424 */ 10, /* CMOVG32rr */ }, { /* 425 */ 19, /* CMOVG64rm */ }, { /* 426 */ 21, /* CMOVG64rr */ }, { /* 427 */ 8, /* CMOVGE16rm */ }, { /* 428 */ 10, /* CMOVGE16rr */ }, { /* 429 */ 8, /* CMOVGE32rm */ }, { /* 430 */ 10, /* CMOVGE32rr */ }, { /* 431 */ 19, /* CMOVGE64rm */ }, { /* 432 */ 21, /* CMOVGE64rr */ }, { /* 433 */ 8, /* CMOVL16rm */ }, { /* 434 */ 10, /* CMOVL16rr */ }, { /* 435 */ 8, /* CMOVL32rm */ }, { /* 436 */ 10, /* CMOVL32rr */ }, { /* 437 */ 19, /* CMOVL64rm */ }, { /* 438 */ 21, /* CMOVL64rr */ }, { /* 439 */ 8, /* CMOVLE16rm */ }, { /* 440 */ 10, /* CMOVLE16rr */ }, { /* 441 */ 8, /* CMOVLE32rm */ }, { /* 442 */ 10, /* CMOVLE32rr */ }, { /* 443 */ 19, /* CMOVLE64rm */ }, { /* 444 */ 21, /* CMOVLE64rr */ }, { /* 445 */ 39, /* CMOVNBE_F */ }, { /* 446 */ 0, /* */ }, { /* 447 */ 0, /* */ }, { /* 448 */ 0, /* */ }, { /* 449 */ 39, /* CMOVNB_F */ }, { /* 450 */ 0, /* */ }, { /* 451 */ 0, /* */ }, { /* 452 */ 0, /* */ }, { /* 453 */ 8, /* CMOVNE16rm */ }, { /* 454 */ 10, /* CMOVNE16rr */ }, { /* 455 */ 8, /* CMOVNE32rm */ }, { /* 456 */ 10, /* CMOVNE32rr */ }, { /* 457 */ 19, /* CMOVNE64rm */ }, { /* 458 */ 21, /* CMOVNE64rr */ }, { /* 459 */ 39, /* CMOVNE_F */ }, { /* 460 */ 0, /* */ }, { /* 461 */ 0, /* */ }, { /* 462 */ 0, /* */ }, { /* 463 */ 8, /* CMOVNO16rm */ }, { /* 464 */ 10, /* CMOVNO16rr */ }, { /* 465 */ 8, /* CMOVNO32rm */ }, { /* 466 */ 10, /* CMOVNO32rr */ }, { /* 467 */ 19, /* CMOVNO64rm */ }, { /* 468 */ 21, /* CMOVNO64rr */ }, { /* 469 */ 8, /* CMOVNP16rm */ }, { /* 470 */ 10, /* CMOVNP16rr */ }, { /* 471 */ 8, /* CMOVNP32rm */ }, { /* 472 */ 10, /* CMOVNP32rr */ }, { /* 473 */ 19, /* CMOVNP64rm */ }, { /* 474 */ 21, /* CMOVNP64rr */ }, { /* 475 */ 39, /* CMOVNP_F */ }, { /* 476 */ 0, /* */ }, { /* 477 */ 0, /* */ }, { /* 478 */ 0, /* */ }, { /* 479 */ 8, /* CMOVNS16rm */ }, { /* 480 */ 10, /* CMOVNS16rr */ }, { /* 481 */ 8, /* CMOVNS32rm */ }, { /* 482 */ 10, /* CMOVNS32rr */ }, { /* 483 */ 19, /* CMOVNS64rm */ }, { /* 484 */ 21, /* CMOVNS64rr */ }, { /* 485 */ 8, /* CMOVO16rm */ }, { /* 486 */ 10, /* CMOVO16rr */ }, { /* 487 */ 8, /* CMOVO32rm */ }, { /* 488 */ 10, /* CMOVO32rr */ }, { /* 489 */ 19, /* CMOVO64rm */ }, { /* 490 */ 21, /* CMOVO64rr */ }, { /* 491 */ 8, /* CMOVP16rm */ }, { /* 492 */ 10, /* CMOVP16rr */ }, { /* 493 */ 8, /* CMOVP32rm */ }, { /* 494 */ 10, /* CMOVP32rr */ }, { /* 495 */ 19, /* CMOVP64rm */ }, { /* 496 */ 21, /* CMOVP64rr */ }, { /* 497 */ 39, /* CMOVP_F */ }, { /* 498 */ 0, /* */ }, { /* 499 */ 0, /* */ }, { /* 500 */ 0, /* */ }, { /* 501 */ 8, /* CMOVS16rm */ }, { /* 502 */ 10, /* CMOVS16rr */ }, { /* 503 */ 8, /* CMOVS32rm */ }, { /* 504 */ 10, /* CMOVS32rr */ }, { /* 505 */ 19, /* CMOVS64rm */ }, { /* 506 */ 21, /* CMOVS64rr */ }, { /* 507 */ 0, /* */ }, { /* 508 */ 0, /* */ }, { /* 509 */ 0, /* */ }, { /* 510 */ 0, /* */ }, { /* 511 */ 0, /* */ }, { /* 512 */ 0, /* */ }, { /* 513 */ 0, /* */ }, { /* 514 */ 0, /* */ }, { /* 515 */ 0, /* */ }, { /* 516 */ 0, /* */ }, { /* 517 */ 0, /* */ }, { /* 518 */ 0, /* */ }, { /* 519 */ 0, /* */ }, { /* 520 */ 0, /* */ }, { /* 521 */ 0, /* */ }, { /* 522 */ 0, /* */ }, { /* 523 */ 0, /* */ }, { /* 524 */ 2, /* CMP16i16 */ }, { /* 525 */ 3, /* CMP16mi */ }, { /* 526 */ 4, /* CMP16mi8 */ }, { /* 527 */ 5, /* CMP16mr */ }, { /* 528 */ 83, /* CMP16ri */ }, { /* 529 */ 72, /* CMP16ri8 */ }, { /* 530 */ 68, /* CMP16rm */ }, { /* 531 */ 73, /* CMP16rr */ }, { /* 532 */ 69, /* CMP16rr_REV */ }, { /* 533 */ 2, /* CMP32i32 */ }, { /* 534 */ 3, /* CMP32mi */ }, { /* 535 */ 11, /* CMP32mi8 */ }, { /* 536 */ 5, /* CMP32mr */ }, { /* 537 */ 83, /* CMP32ri */ }, { /* 538 */ 74, /* CMP32ri8 */ }, { /* 539 */ 68, /* CMP32rm */ }, { /* 540 */ 73, /* CMP32rr */ }, { /* 541 */ 69, /* CMP32rr_REV */ }, { /* 542 */ 13, /* CMP64i32 */ }, { /* 543 */ 14, /* CMP64mi32 */ }, { /* 544 */ 15, /* CMP64mi8 */ }, { /* 545 */ 16, /* CMP64mr */ }, { /* 546 */ 84, /* CMP64ri32 */ }, { /* 547 */ 75, /* CMP64ri8 */ }, { /* 548 */ 42, /* CMP64rm */ }, { /* 549 */ 76, /* CMP64rr */ }, { /* 550 */ 43, /* CMP64rr_REV */ }, { /* 551 */ 1, /* CMP8i8 */ }, { /* 552 */ 22, /* CMP8mi */ }, { /* 553 */ 22, /* CMP8mi8 */ }, { /* 554 */ 23, /* CMP8mr */ }, { /* 555 */ 85, /* CMP8ri */ }, { /* 556 */ 85, /* CMP8ri8 */ }, { /* 557 */ 86, /* CMP8rm */ }, { /* 558 */ 87, /* CMP8rr */ }, { /* 559 */ 88, /* CMP8rr_REV */ }, { /* 560 */ 89, /* CMPPDrmi */ }, { /* 561 */ 0, /* */ }, { /* 562 */ 90, /* CMPPDrri */ }, { /* 563 */ 0, /* */ }, { /* 564 */ 89, /* CMPPSrmi */ }, { /* 565 */ 0, /* */ }, { /* 566 */ 90, /* CMPPSrri */ }, { /* 567 */ 0, /* */ }, { /* 568 */ 91, /* CMPSB */ }, { /* 569 */ 92, /* CMPSDrm */ }, { /* 570 */ 0, /* */ }, { /* 571 */ 93, /* CMPSDrr */ }, { /* 572 */ 0, /* */ }, { /* 573 */ 94, /* CMPSL */ }, { /* 574 */ 95, /* CMPSQ */ }, { /* 575 */ 96, /* CMPSSrm */ }, { /* 576 */ 0, /* */ }, { /* 577 */ 97, /* CMPSSrr */ }, { /* 578 */ 0, /* */ }, { /* 579 */ 98, /* CMPSW */ }, { /* 580 */ 99, /* CMPXCHG16B */ }, { /* 581 */ 5, /* CMPXCHG16rm */ }, { /* 582 */ 73, /* CMPXCHG16rr */ }, { /* 583 */ 5, /* CMPXCHG32rm */ }, { /* 584 */ 73, /* CMPXCHG32rr */ }, { /* 585 */ 16, /* CMPXCHG64rm */ }, { /* 586 */ 76, /* CMPXCHG64rr */ }, { /* 587 */ 38, /* CMPXCHG8B */ }, { /* 588 */ 23, /* CMPXCHG8rm */ }, { /* 589 */ 87, /* CMPXCHG8rr */ }, { /* 590 */ 44, /* COMISDrm */ }, { /* 591 */ 45, /* COMISDrr */ }, { /* 592 */ 44, /* COMISSrm */ }, { /* 593 */ 45, /* COMISSrr */ }, { /* 594 */ 39, /* COMP_FST0r */ }, { /* 595 */ 39, /* COM_FIPr */ }, { /* 596 */ 39, /* COM_FIr */ }, { /* 597 */ 39, /* COM_FST0r */ }, { /* 598 */ 0, /* COS_F */ }, { /* 599 */ 0, /* */ }, { /* 600 */ 0, /* */ }, { /* 601 */ 0, /* */ }, { /* 602 */ 0, /* CPUID */ }, { /* 603 */ 0, /* CQO */ }, { /* 604 */ 28, /* CRC32r32m16 */ }, { /* 605 */ 8, /* CRC32r32m32 */ }, { /* 606 */ 100, /* CRC32r32m8 */ }, { /* 607 */ 101, /* CRC32r32r16 */ }, { /* 608 */ 10, /* CRC32r32r32 */ }, { /* 609 */ 102, /* CRC32r32r8 */ }, { /* 610 */ 19, /* CRC32r64m64 */ }, { /* 611 */ 103, /* CRC32r64m8 */ }, { /* 612 */ 21, /* CRC32r64r64 */ }, { /* 613 */ 104, /* CRC32r64r8 */ }, { /* 614 */ 105, /* CVTDQ2PDrm */ }, { /* 615 */ 45, /* CVTDQ2PDrr */ }, { /* 616 */ 44, /* CVTDQ2PSrm */ }, { /* 617 */ 45, /* CVTDQ2PSrr */ }, { /* 618 */ 44, /* CVTPD2DQrm */ }, { /* 619 */ 45, /* CVTPD2DQrr */ }, { /* 620 */ 44, /* CVTPD2PSrm */ }, { /* 621 */ 45, /* CVTPD2PSrr */ }, { /* 622 */ 44, /* CVTPS2DQrm */ }, { /* 623 */ 45, /* CVTPS2DQrr */ }, { /* 624 */ 106, /* CVTPS2PDrm */ }, { /* 625 */ 45, /* CVTPS2PDrr */ }, { /* 626 */ 107, /* CVTSD2SI64rm */ }, { /* 627 */ 108, /* CVTSD2SI64rr */ }, { /* 628 */ 109, /* CVTSD2SIrm */ }, { /* 629 */ 110, /* CVTSD2SIrr */ }, { /* 630 */ 111, /* CVTSD2SSrm */ }, { /* 631 */ 112, /* CVTSD2SSrr */ }, { /* 632 */ 113, /* CVTSI2SD64rm */ }, { /* 633 */ 114, /* CVTSI2SD64rr */ }, { /* 634 */ 113, /* CVTSI2SDrm */ }, { /* 635 */ 115, /* CVTSI2SDrr */ }, { /* 636 */ 116, /* CVTSI2SS64rm */ }, { /* 637 */ 117, /* CVTSI2SS64rr */ }, { /* 638 */ 116, /* CVTSI2SSrm */ }, { /* 639 */ 118, /* CVTSI2SSrr */ }, { /* 640 */ 119, /* CVTSS2SDrm */ }, { /* 641 */ 120, /* CVTSS2SDrr */ }, { /* 642 */ 121, /* CVTSS2SI64rm */ }, { /* 643 */ 108, /* CVTSS2SI64rr */ }, { /* 644 */ 122, /* CVTSS2SIrm */ }, { /* 645 */ 110, /* CVTSS2SIrr */ }, { /* 646 */ 44, /* CVTTPD2DQrm */ }, { /* 647 */ 45, /* CVTTPD2DQrr */ }, { /* 648 */ 44, /* CVTTPS2DQrm */ }, { /* 649 */ 45, /* CVTTPS2DQrr */ }, { /* 650 */ 107, /* CVTTSD2SI64rm */ }, { /* 651 */ 123, /* CVTTSD2SI64rr */ }, { /* 652 */ 109, /* CVTTSD2SIrm */ }, { /* 653 */ 124, /* CVTTSD2SIrr */ }, { /* 654 */ 121, /* CVTTSS2SI64rm */ }, { /* 655 */ 125, /* CVTTSS2SI64rr */ }, { /* 656 */ 122, /* CVTTSS2SIrm */ }, { /* 657 */ 126, /* CVTTSS2SIrr */ }, { /* 658 */ 0, /* CWD */ }, { /* 659 */ 0, /* CWDE */ }, { /* 660 */ 0, /* DAA */ }, { /* 661 */ 0, /* DAS */ }, { /* 662 */ 0, /* DATA16_PREFIX */ }, { /* 663 */ 38, /* DEC16m */ }, { /* 664 */ 127, /* DEC16r */ }, { /* 665 */ 70, /* DEC16r_alt */ }, { /* 666 */ 38, /* DEC32m */ }, { /* 667 */ 127, /* DEC32r */ }, { /* 668 */ 70, /* DEC32r_alt */ }, { /* 669 */ 38, /* DEC64m */ }, { /* 670 */ 128, /* DEC64r */ }, { /* 671 */ 82, /* DEC8m */ }, { /* 672 */ 129, /* DEC8r */ }, { /* 673 */ 38, /* DIV16m */ }, { /* 674 */ 77, /* DIV16r */ }, { /* 675 */ 38, /* DIV32m */ }, { /* 676 */ 77, /* DIV32r */ }, { /* 677 */ 38, /* DIV64m */ }, { /* 678 */ 79, /* DIV64r */ }, { /* 679 */ 82, /* DIV8m */ }, { /* 680 */ 130, /* DIV8r */ }, { /* 681 */ 30, /* DIVPDrm */ }, { /* 682 */ 31, /* DIVPDrr */ }, { /* 683 */ 30, /* DIVPSrm */ }, { /* 684 */ 31, /* DIVPSrr */ }, { /* 685 */ 36, /* DIVR_F32m */ }, { /* 686 */ 37, /* DIVR_F64m */ }, { /* 687 */ 38, /* DIVR_FI16m */ }, { /* 688 */ 38, /* DIVR_FI32m */ }, { /* 689 */ 39, /* DIVR_FPrST0 */ }, { /* 690 */ 39, /* DIVR_FST0r */ }, { /* 691 */ 0, /* */ }, { /* 692 */ 0, /* */ }, { /* 693 */ 0, /* */ }, { /* 694 */ 0, /* */ }, { /* 695 */ 0, /* */ }, { /* 696 */ 0, /* */ }, { /* 697 */ 0, /* */ }, { /* 698 */ 0, /* */ }, { /* 699 */ 0, /* */ }, { /* 700 */ 0, /* */ }, { /* 701 */ 0, /* */ }, { /* 702 */ 39, /* DIVR_FrST0 */ }, { /* 703 */ 32, /* DIVSDrm */ }, { /* 704 */ 0, /* */ }, { /* 705 */ 33, /* DIVSDrr */ }, { /* 706 */ 0, /* */ }, { /* 707 */ 34, /* DIVSSrm */ }, { /* 708 */ 0, /* */ }, { /* 709 */ 35, /* DIVSSrr */ }, { /* 710 */ 0, /* */ }, { /* 711 */ 36, /* DIV_F32m */ }, { /* 712 */ 37, /* DIV_F64m */ }, { /* 713 */ 38, /* DIV_FI16m */ }, { /* 714 */ 38, /* DIV_FI32m */ }, { /* 715 */ 39, /* DIV_FPrST0 */ }, { /* 716 */ 39, /* DIV_FST0r */ }, { /* 717 */ 0, /* */ }, { /* 718 */ 0, /* */ }, { /* 719 */ 0, /* */ }, { /* 720 */ 0, /* */ }, { /* 721 */ 0, /* */ }, { /* 722 */ 0, /* */ }, { /* 723 */ 0, /* */ }, { /* 724 */ 0, /* */ }, { /* 725 */ 0, /* */ }, { /* 726 */ 0, /* */ }, { /* 727 */ 0, /* */ }, { /* 728 */ 0, /* */ }, { /* 729 */ 0, /* */ }, { /* 730 */ 0, /* */ }, { /* 731 */ 39, /* DIV_FrST0 */ }, { /* 732 */ 66, /* DPPDrmi */ }, { /* 733 */ 67, /* DPPDrri */ }, { /* 734 */ 66, /* DPPSrmi */ }, { /* 735 */ 67, /* DPPSrri */ }, { /* 736 */ 0, /* */ }, { /* 737 */ 0, /* */ }, { /* 738 */ 0, /* */ }, { /* 739 */ 0, /* */ }, { /* 740 */ 0, /* */ }, { /* 741 */ 0, /* */ }, { /* 742 */ 0, /* */ }, { /* 743 */ 0, /* ENCLS */ }, { /* 744 */ 0, /* ENCLU */ }, { /* 745 */ 131, /* ENTER */ }, { /* 746 */ 132, /* EXTRACTPSmr */ }, { /* 747 */ 133, /* EXTRACTPSrr */ }, { /* 748 */ 31, /* EXTRQ */ }, { /* 749 */ 134, /* EXTRQI */ }, { /* 750 */ 0, /* F2XM1 */ }, { /* 751 */ 135, /* FARCALL16i */ }, { /* 752 */ 136, /* FARCALL16m */ }, { /* 753 */ 137, /* FARCALL32i */ }, { /* 754 */ 138, /* FARCALL32m */ }, { /* 755 */ 139, /* FARCALL64 */ }, { /* 756 */ 135, /* FARJMP16i */ }, { /* 757 */ 136, /* FARJMP16m */ }, { /* 758 */ 137, /* FARJMP32i */ }, { /* 759 */ 138, /* FARJMP32m */ }, { /* 760 */ 139, /* FARJMP64 */ }, { /* 761 */ 36, /* FBLDm */ }, { /* 762 */ 36, /* FBSTPm */ }, { /* 763 */ 36, /* FCOM32m */ }, { /* 764 */ 37, /* FCOM64m */ }, { /* 765 */ 36, /* FCOMP32m */ }, { /* 766 */ 37, /* FCOMP64m */ }, { /* 767 */ 0, /* FCOMPP */ }, { /* 768 */ 0, /* FDECSTP */ }, { /* 769 */ 0, /* FEMMS */ }, { /* 770 */ 39, /* FFREE */ }, { /* 771 */ 38, /* FICOM16m */ }, { /* 772 */ 38, /* FICOM32m */ }, { /* 773 */ 38, /* FICOMP16m */ }, { /* 774 */ 38, /* FICOMP32m */ }, { /* 775 */ 0, /* FINCSTP */ }, { /* 776 */ 38, /* FLDCW16m */ }, { /* 777 */ 36, /* FLDENVm */ }, { /* 778 */ 0, /* FLDL2E */ }, { /* 779 */ 0, /* FLDL2T */ }, { /* 780 */ 0, /* FLDLG2 */ }, { /* 781 */ 0, /* FLDLN2 */ }, { /* 782 */ 0, /* FLDPI */ }, { /* 783 */ 0, /* FNCLEX */ }, { /* 784 */ 0, /* FNINIT */ }, { /* 785 */ 0, /* FNOP */ }, { /* 786 */ 38, /* FNSTCW16m */ }, { /* 787 */ 0, /* FNSTSW16r */ }, { /* 788 */ 36, /* FNSTSWm */ }, { /* 789 */ 0, /* */ }, { /* 790 */ 0, /* */ }, { /* 791 */ 0, /* */ }, { /* 792 */ 0, /* */ }, { /* 793 */ 0, /* */ }, { /* 794 */ 0, /* */ }, { /* 795 */ 0, /* */ }, { /* 796 */ 0, /* */ }, { /* 797 */ 0, /* */ }, { /* 798 */ 0, /* FPATAN */ }, { /* 799 */ 0, /* FPREM */ }, { /* 800 */ 0, /* FPREM1 */ }, { /* 801 */ 0, /* FPTAN */ }, { /* 802 */ 39, /* FP_FFREEP */ }, { /* 803 */ 0, /* FRNDINT */ }, { /* 804 */ 36, /* FRSTORm */ }, { /* 805 */ 36, /* FSAVEm */ }, { /* 806 */ 0, /* FSCALE */ }, { /* 807 */ 0, /* FSETPM */ }, { /* 808 */ 0, /* FSINCOS */ }, { /* 809 */ 36, /* FSTENVm */ }, { /* 810 */ 0, /* FXAM */ }, { /* 811 */ 140, /* FXRSTOR */ }, { /* 812 */ 140, /* FXRSTOR64 */ }, { /* 813 */ 140, /* FXSAVE */ }, { /* 814 */ 140, /* FXSAVE64 */ }, { /* 815 */ 0, /* FXTRACT */ }, { /* 816 */ 0, /* FYL2X */ }, { /* 817 */ 0, /* FYL2XP1 */ }, { /* 818 */ 0, /* */ }, { /* 819 */ 0, /* */ }, { /* 820 */ 0, /* */ }, { /* 821 */ 0, /* */ }, { /* 822 */ 0, /* */ }, { /* 823 */ 0, /* */ }, { /* 824 */ 0, /* */ }, { /* 825 */ 0, /* */ }, { /* 826 */ 0, /* */ }, { /* 827 */ 0, /* */ }, { /* 828 */ 0, /* */ }, { /* 829 */ 0, /* */ }, { /* 830 */ 0, /* */ }, { /* 831 */ 0, /* */ }, { /* 832 */ 0, /* */ }, { /* 833 */ 0, /* */ }, { /* 834 */ 0, /* */ }, { /* 835 */ 0, /* */ }, { /* 836 */ 0, /* */ }, { /* 837 */ 0, /* */ }, { /* 838 */ 0, /* */ }, { /* 839 */ 0, /* */ }, { /* 840 */ 0, /* */ }, { /* 841 */ 0, /* */ }, { /* 842 */ 0, /* */ }, { /* 843 */ 0, /* */ }, { /* 844 */ 0, /* */ }, { /* 845 */ 0, /* */ }, { /* 846 */ 0, /* */ }, { /* 847 */ 0, /* */ }, { /* 848 */ 0, /* */ }, { /* 849 */ 0, /* */ }, { /* 850 */ 0, /* */ }, { /* 851 */ 0, /* */ }, { /* 852 */ 0, /* */ }, { /* 853 */ 0, /* */ }, { /* 854 */ 0, /* */ }, { /* 855 */ 0, /* */ }, { /* 856 */ 0, /* GETSEC */ }, { /* 857 */ 30, /* HADDPDrm */ }, { /* 858 */ 31, /* HADDPDrr */ }, { /* 859 */ 30, /* HADDPSrm */ }, { /* 860 */ 31, /* HADDPSrr */ }, { /* 861 */ 0, /* HLT */ }, { /* 862 */ 30, /* HSUBPDrm */ }, { /* 863 */ 31, /* HSUBPDrr */ }, { /* 864 */ 30, /* HSUBPSrm */ }, { /* 865 */ 31, /* HSUBPSrr */ }, { /* 866 */ 38, /* IDIV16m */ }, { /* 867 */ 77, /* IDIV16r */ }, { /* 868 */ 38, /* IDIV32m */ }, { /* 869 */ 77, /* IDIV32r */ }, { /* 870 */ 38, /* IDIV64m */ }, { /* 871 */ 79, /* IDIV64r */ }, { /* 872 */ 82, /* IDIV8m */ }, { /* 873 */ 130, /* IDIV8r */ }, { /* 874 */ 38, /* ILD_F16m */ }, { /* 875 */ 38, /* ILD_F32m */ }, { /* 876 */ 38, /* ILD_F64m */ }, { /* 877 */ 0, /* */ }, { /* 878 */ 0, /* */ }, { /* 879 */ 0, /* */ }, { /* 880 */ 0, /* */ }, { /* 881 */ 0, /* */ }, { /* 882 */ 0, /* */ }, { /* 883 */ 0, /* */ }, { /* 884 */ 0, /* */ }, { /* 885 */ 0, /* */ }, { /* 886 */ 38, /* IMUL16m */ }, { /* 887 */ 77, /* IMUL16r */ }, { /* 888 */ 8, /* IMUL16rm */ }, { /* 889 */ 141, /* IMUL16rmi */ }, { /* 890 */ 142, /* IMUL16rmi8 */ }, { /* 891 */ 10, /* IMUL16rr */ }, { /* 892 */ 143, /* IMUL16rri */ }, { /* 893 */ 144, /* IMUL16rri8 */ }, { /* 894 */ 38, /* IMUL32m */ }, { /* 895 */ 77, /* IMUL32r */ }, { /* 896 */ 8, /* IMUL32rm */ }, { /* 897 */ 141, /* IMUL32rmi */ }, { /* 898 */ 145, /* IMUL32rmi8 */ }, { /* 899 */ 10, /* IMUL32rr */ }, { /* 900 */ 143, /* IMUL32rri */ }, { /* 901 */ 146, /* IMUL32rri8 */ }, { /* 902 */ 38, /* IMUL64m */ }, { /* 903 */ 79, /* IMUL64r */ }, { /* 904 */ 19, /* IMUL64rm */ }, { /* 905 */ 60, /* IMUL64rmi32 */ }, { /* 906 */ 147, /* IMUL64rmi8 */ }, { /* 907 */ 21, /* IMUL64rr */ }, { /* 908 */ 61, /* IMUL64rri32 */ }, { /* 909 */ 148, /* IMUL64rri8 */ }, { /* 910 */ 82, /* IMUL8m */ }, { /* 911 */ 130, /* IMUL8r */ }, { /* 912 */ 1, /* IN16ri */ }, { /* 913 */ 0, /* IN16rr */ }, { /* 914 */ 1, /* IN32ri */ }, { /* 915 */ 0, /* IN32rr */ }, { /* 916 */ 1, /* IN8ri */ }, { /* 917 */ 0, /* IN8rr */ }, { /* 918 */ 38, /* INC16m */ }, { /* 919 */ 127, /* INC16r */ }, { /* 920 */ 70, /* INC16r_alt */ }, { /* 921 */ 38, /* INC32m */ }, { /* 922 */ 127, /* INC32r */ }, { /* 923 */ 70, /* INC32r_alt */ }, { /* 924 */ 38, /* INC64m */ }, { /* 925 */ 128, /* INC64r */ }, { /* 926 */ 82, /* INC8m */ }, { /* 927 */ 129, /* INC8r */ }, { /* 928 */ 149, /* INSB */ }, { /* 929 */ 150, /* INSERTPSrm */ }, { /* 930 */ 67, /* INSERTPSrr */ }, { /* 931 */ 31, /* INSERTQ */ }, { /* 932 */ 151, /* INSERTQI */ }, { /* 933 */ 152, /* INSL */ }, { /* 934 */ 153, /* INSW */ }, { /* 935 */ 1, /* INT */ }, { /* 936 */ 0, /* INT1 */ }, { /* 937 */ 0, /* INT3 */ }, { /* 938 */ 0, /* INTO */ }, { /* 939 */ 0, /* INVD */ }, { /* 940 */ 154, /* INVEPT32 */ }, { /* 941 */ 155, /* INVEPT64 */ }, { /* 942 */ 82, /* INVLPG */ }, { /* 943 */ 0, /* INVLPGA32 */ }, { /* 944 */ 0, /* INVLPGA64 */ }, { /* 945 */ 154, /* INVPCID32 */ }, { /* 946 */ 155, /* INVPCID64 */ }, { /* 947 */ 154, /* INVVPID32 */ }, { /* 948 */ 155, /* INVVPID64 */ }, { /* 949 */ 0, /* IRET16 */ }, { /* 950 */ 0, /* IRET32 */ }, { /* 951 */ 0, /* IRET64 */ }, { /* 952 */ 38, /* ISTT_FP16m */ }, { /* 953 */ 38, /* ISTT_FP32m */ }, { /* 954 */ 38, /* ISTT_FP64m */ }, { /* 955 */ 0, /* */ }, { /* 956 */ 0, /* */ }, { /* 957 */ 0, /* */ }, { /* 958 */ 0, /* */ }, { /* 959 */ 0, /* */ }, { /* 960 */ 0, /* */ }, { /* 961 */ 0, /* */ }, { /* 962 */ 0, /* */ }, { /* 963 */ 0, /* */ }, { /* 964 */ 38, /* IST_F16m */ }, { /* 965 */ 38, /* IST_F32m */ }, { /* 966 */ 38, /* IST_FP16m */ }, { /* 967 */ 38, /* IST_FP32m */ }, { /* 968 */ 38, /* IST_FP64m */ }, { /* 969 */ 0, /* */ }, { /* 970 */ 0, /* */ }, { /* 971 */ 0, /* */ }, { /* 972 */ 0, /* */ }, { /* 973 */ 0, /* */ }, { /* 974 */ 0, /* */ }, { /* 975 */ 0, /* */ }, { /* 976 */ 0, /* */ }, { /* 977 */ 0, /* */ }, { /* 978 */ 0, /* */ }, { /* 979 */ 0, /* */ }, { /* 980 */ 0, /* */ }, { /* 981 */ 0, /* */ }, { /* 982 */ 0, /* */ }, { /* 983 */ 0, /* */ }, { /* 984 */ 0, /* */ }, { /* 985 */ 0, /* */ }, { /* 986 */ 0, /* */ }, { /* 987 */ 0, /* */ }, { /* 988 */ 0, /* */ }, { /* 989 */ 0, /* */ }, { /* 990 */ 0, /* */ }, { /* 991 */ 0, /* */ }, { /* 992 */ 0, /* */ }, { /* 993 */ 0, /* */ }, { /* 994 */ 0, /* */ }, { /* 995 */ 0, /* */ }, { /* 996 */ 0, /* */ }, { /* 997 */ 0, /* */ }, { /* 998 */ 0, /* */ }, { /* 999 */ 0, /* */ }, { /* 1000 */ 0, /* */ }, { /* 1001 */ 0, /* */ }, { /* 1002 */ 0, /* */ }, { /* 1003 */ 0, /* */ }, { /* 1004 */ 0, /* */ }, { /* 1005 */ 0, /* */ }, { /* 1006 */ 0, /* */ }, { /* 1007 */ 0, /* */ }, { /* 1008 */ 0, /* */ }, { /* 1009 */ 0, /* */ }, { /* 1010 */ 0, /* */ }, { /* 1011 */ 0, /* */ }, { /* 1012 */ 0, /* */ }, { /* 1013 */ 0, /* */ }, { /* 1014 */ 0, /* */ }, { /* 1015 */ 0, /* */ }, { /* 1016 */ 0, /* */ }, { /* 1017 */ 0, /* */ }, { /* 1018 */ 0, /* */ }, { /* 1019 */ 0, /* */ }, { /* 1020 */ 0, /* */ }, { /* 1021 */ 0, /* */ }, { /* 1022 */ 0, /* */ }, { /* 1023 */ 0, /* */ }, { /* 1024 */ 0, /* */ }, { /* 1025 */ 0, /* */ }, { /* 1026 */ 0, /* */ }, { /* 1027 */ 0, /* */ }, { /* 1028 */ 0, /* */ }, { /* 1029 */ 0, /* */ }, { /* 1030 */ 0, /* */ }, { /* 1031 */ 0, /* */ }, { /* 1032 */ 0, /* */ }, { /* 1033 */ 0, /* */ }, { /* 1034 */ 0, /* */ }, { /* 1035 */ 0, /* */ }, { /* 1036 */ 0, /* */ }, { /* 1037 */ 0, /* */ }, { /* 1038 */ 0, /* */ }, { /* 1039 */ 0, /* */ }, { /* 1040 */ 0, /* */ }, { /* 1041 */ 0, /* */ }, { /* 1042 */ 0, /* */ }, { /* 1043 */ 0, /* */ }, { /* 1044 */ 0, /* */ }, { /* 1045 */ 0, /* */ }, { /* 1046 */ 0, /* */ }, { /* 1047 */ 0, /* */ }, { /* 1048 */ 0, /* */ }, { /* 1049 */ 0, /* */ }, { /* 1050 */ 0, /* */ }, { /* 1051 */ 0, /* */ }, { /* 1052 */ 0, /* */ }, { /* 1053 */ 0, /* */ }, { /* 1054 */ 0, /* */ }, { /* 1055 */ 0, /* */ }, { /* 1056 */ 0, /* */ }, { /* 1057 */ 0, /* */ }, { /* 1058 */ 0, /* */ }, { /* 1059 */ 0, /* */ }, { /* 1060 */ 0, /* */ }, { /* 1061 */ 0, /* */ }, { /* 1062 */ 0, /* */ }, { /* 1063 */ 0, /* */ }, { /* 1064 */ 0, /* */ }, { /* 1065 */ 0, /* */ }, { /* 1066 */ 0, /* */ }, { /* 1067 */ 0, /* */ }, { /* 1068 */ 0, /* */ }, { /* 1069 */ 0, /* */ }, { /* 1070 */ 0, /* */ }, { /* 1071 */ 0, /* */ }, { /* 1072 */ 0, /* */ }, { /* 1073 */ 0, /* */ }, { /* 1074 */ 0, /* */ }, { /* 1075 */ 0, /* */ }, { /* 1076 */ 0, /* */ }, { /* 1077 */ 0, /* */ }, { /* 1078 */ 0, /* */ }, { /* 1079 */ 0, /* */ }, { /* 1080 */ 0, /* */ }, { /* 1081 */ 0, /* */ }, { /* 1082 */ 0, /* */ }, { /* 1083 */ 156, /* JAE_1 */ }, { /* 1084 */ 157, /* JAE_2 */ }, { /* 1085 */ 157, /* JAE_4 */ }, { /* 1086 */ 156, /* JA_1 */ }, { /* 1087 */ 157, /* JA_2 */ }, { /* 1088 */ 157, /* JA_4 */ }, { /* 1089 */ 156, /* JBE_1 */ }, { /* 1090 */ 157, /* JBE_2 */ }, { /* 1091 */ 157, /* JBE_4 */ }, { /* 1092 */ 156, /* JB_1 */ }, { /* 1093 */ 157, /* JB_2 */ }, { /* 1094 */ 157, /* JB_4 */ }, { /* 1095 */ 156, /* JCXZ */ }, { /* 1096 */ 156, /* JECXZ */ }, { /* 1097 */ 156, /* JE_1 */ }, { /* 1098 */ 157, /* JE_2 */ }, { /* 1099 */ 157, /* JE_4 */ }, { /* 1100 */ 156, /* JGE_1 */ }, { /* 1101 */ 157, /* JGE_2 */ }, { /* 1102 */ 157, /* JGE_4 */ }, { /* 1103 */ 156, /* JG_1 */ }, { /* 1104 */ 157, /* JG_2 */ }, { /* 1105 */ 157, /* JG_4 */ }, { /* 1106 */ 156, /* JLE_1 */ }, { /* 1107 */ 157, /* JLE_2 */ }, { /* 1108 */ 157, /* JLE_4 */ }, { /* 1109 */ 156, /* JL_1 */ }, { /* 1110 */ 157, /* JL_2 */ }, { /* 1111 */ 157, /* JL_4 */ }, { /* 1112 */ 38, /* JMP16m */ }, { /* 1113 */ 77, /* JMP16r */ }, { /* 1114 */ 38, /* JMP32m */ }, { /* 1115 */ 77, /* JMP32r */ }, { /* 1116 */ 38, /* JMP64m */ }, { /* 1117 */ 79, /* JMP64r */ }, { /* 1118 */ 156, /* JMP_1 */ }, { /* 1119 */ 157, /* JMP_2 */ }, { /* 1120 */ 157, /* JMP_4 */ }, { /* 1121 */ 156, /* JNE_1 */ }, { /* 1122 */ 157, /* JNE_2 */ }, { /* 1123 */ 157, /* JNE_4 */ }, { /* 1124 */ 156, /* JNO_1 */ }, { /* 1125 */ 157, /* JNO_2 */ }, { /* 1126 */ 157, /* JNO_4 */ }, { /* 1127 */ 156, /* JNP_1 */ }, { /* 1128 */ 157, /* JNP_2 */ }, { /* 1129 */ 157, /* JNP_4 */ }, { /* 1130 */ 156, /* JNS_1 */ }, { /* 1131 */ 157, /* JNS_2 */ }, { /* 1132 */ 157, /* JNS_4 */ }, { /* 1133 */ 156, /* JO_1 */ }, { /* 1134 */ 157, /* JO_2 */ }, { /* 1135 */ 157, /* JO_4 */ }, { /* 1136 */ 156, /* JP_1 */ }, { /* 1137 */ 157, /* JP_2 */ }, { /* 1138 */ 157, /* JP_4 */ }, { /* 1139 */ 156, /* JRCXZ */ }, { /* 1140 */ 156, /* JS_1 */ }, { /* 1141 */ 157, /* JS_2 */ }, { /* 1142 */ 157, /* JS_4 */ }, { /* 1143 */ 158, /* KANDBrr */ }, { /* 1144 */ 159, /* KANDDrr */ }, { /* 1145 */ 158, /* KANDNBrr */ }, { /* 1146 */ 159, /* KANDNDrr */ }, { /* 1147 */ 160, /* KANDNQrr */ }, { /* 1148 */ 161, /* KANDNWrr */ }, { /* 1149 */ 160, /* KANDQrr */ }, { /* 1150 */ 161, /* KANDWrr */ }, { /* 1151 */ 162, /* KMOVBkk */ }, { /* 1152 */ 163, /* KMOVBkm */ }, { /* 1153 */ 164, /* KMOVBkr */ }, { /* 1154 */ 165, /* KMOVBmk */ }, { /* 1155 */ 166, /* KMOVBrk */ }, { /* 1156 */ 167, /* KMOVDkk */ }, { /* 1157 */ 168, /* KMOVDkm */ }, { /* 1158 */ 169, /* KMOVDkr */ }, { /* 1159 */ 170, /* KMOVDmk */ }, { /* 1160 */ 171, /* KMOVDrk */ }, { /* 1161 */ 172, /* KMOVQkk */ }, { /* 1162 */ 173, /* KMOVQkm */ }, { /* 1163 */ 174, /* KMOVQkr */ }, { /* 1164 */ 175, /* KMOVQmk */ }, { /* 1165 */ 176, /* KMOVQrk */ }, { /* 1166 */ 177, /* KMOVWkk */ }, { /* 1167 */ 178, /* KMOVWkm */ }, { /* 1168 */ 179, /* KMOVWkr */ }, { /* 1169 */ 180, /* KMOVWmk */ }, { /* 1170 */ 181, /* KMOVWrk */ }, { /* 1171 */ 162, /* KNOTBrr */ }, { /* 1172 */ 167, /* KNOTDrr */ }, { /* 1173 */ 172, /* KNOTQrr */ }, { /* 1174 */ 177, /* KNOTWrr */ }, { /* 1175 */ 158, /* KORBrr */ }, { /* 1176 */ 159, /* KORDrr */ }, { /* 1177 */ 160, /* KORQrr */ }, { /* 1178 */ 162, /* KORTESTBrr */ }, { /* 1179 */ 167, /* KORTESTDrr */ }, { /* 1180 */ 172, /* KORTESTQrr */ }, { /* 1181 */ 177, /* KORTESTWrr */ }, { /* 1182 */ 161, /* KORWrr */ }, { /* 1183 */ 0, /* */ }, { /* 1184 */ 0, /* */ }, { /* 1185 */ 0, /* */ }, { /* 1186 */ 0, /* */ }, { /* 1187 */ 182, /* KSHIFTLBri */ }, { /* 1188 */ 183, /* KSHIFTLDri */ }, { /* 1189 */ 184, /* KSHIFTLQri */ }, { /* 1190 */ 185, /* KSHIFTLWri */ }, { /* 1191 */ 182, /* KSHIFTRBri */ }, { /* 1192 */ 183, /* KSHIFTRDri */ }, { /* 1193 */ 184, /* KSHIFTRQri */ }, { /* 1194 */ 185, /* KSHIFTRWri */ }, { /* 1195 */ 161, /* KUNPCKBWrr */ }, { /* 1196 */ 158, /* KXNORBrr */ }, { /* 1197 */ 159, /* KXNORDrr */ }, { /* 1198 */ 160, /* KXNORQrr */ }, { /* 1199 */ 161, /* KXNORWrr */ }, { /* 1200 */ 158, /* KXORBrr */ }, { /* 1201 */ 159, /* KXORDrr */ }, { /* 1202 */ 160, /* KXORQrr */ }, { /* 1203 */ 161, /* KXORWrr */ }, { /* 1204 */ 0, /* LAHF */ }, { /* 1205 */ 68, /* LAR16rm */ }, { /* 1206 */ 69, /* LAR16rr */ }, { /* 1207 */ 68, /* LAR32rm */ }, { /* 1208 */ 69, /* LAR32rr */ }, { /* 1209 */ 42, /* LAR64rm */ }, { /* 1210 */ 186, /* LAR64rr */ }, { /* 1211 */ 0, /* */ }, { /* 1212 */ 0, /* */ }, { /* 1213 */ 0, /* */ }, { /* 1214 */ 0, /* */ }, { /* 1215 */ 0, /* */ }, { /* 1216 */ 0, /* */ }, { /* 1217 */ 44, /* LDDQUrm */ }, { /* 1218 */ 38, /* LDMXCSR */ }, { /* 1219 */ 187, /* LDS16rm */ }, { /* 1220 */ 188, /* LDS32rm */ }, { /* 1221 */ 0, /* LD_F0 */ }, { /* 1222 */ 0, /* LD_F1 */ }, { /* 1223 */ 36, /* LD_F32m */ }, { /* 1224 */ 37, /* LD_F64m */ }, { /* 1225 */ 189, /* LD_F80m */ }, { /* 1226 */ 0, /* */ }, { /* 1227 */ 0, /* */ }, { /* 1228 */ 0, /* */ }, { /* 1229 */ 0, /* */ }, { /* 1230 */ 0, /* */ }, { /* 1231 */ 0, /* */ }, { /* 1232 */ 0, /* */ }, { /* 1233 */ 0, /* */ }, { /* 1234 */ 0, /* */ }, { /* 1235 */ 0, /* */ }, { /* 1236 */ 0, /* */ }, { /* 1237 */ 0, /* */ }, { /* 1238 */ 39, /* LD_Frr */ }, { /* 1239 */ 190, /* LEA16r */ }, { /* 1240 */ 190, /* LEA32r */ }, { /* 1241 */ 191, /* LEA64_32r */ }, { /* 1242 */ 192, /* LEA64r */ }, { /* 1243 */ 0, /* LEAVE */ }, { /* 1244 */ 0, /* LEAVE64 */ }, { /* 1245 */ 187, /* LES16rm */ }, { /* 1246 */ 188, /* LES32rm */ }, { /* 1247 */ 0, /* LFENCE */ }, { /* 1248 */ 187, /* LFS16rm */ }, { /* 1249 */ 188, /* LFS32rm */ }, { /* 1250 */ 193, /* LFS64rm */ }, { /* 1251 */ 138, /* LGDT16m */ }, { /* 1252 */ 138, /* LGDT32m */ }, { /* 1253 */ 139, /* LGDT64m */ }, { /* 1254 */ 187, /* LGS16rm */ }, { /* 1255 */ 188, /* LGS32rm */ }, { /* 1256 */ 193, /* LGS64rm */ }, { /* 1257 */ 138, /* LIDT16m */ }, { /* 1258 */ 138, /* LIDT32m */ }, { /* 1259 */ 139, /* LIDT64m */ }, { /* 1260 */ 38, /* LLDT16m */ }, { /* 1261 */ 194, /* LLDT16r */ }, { /* 1262 */ 38, /* LMSW16m */ }, { /* 1263 */ 194, /* LMSW16r */ }, { /* 1264 */ 0, /* */ }, { /* 1265 */ 0, /* */ }, { /* 1266 */ 0, /* */ }, { /* 1267 */ 0, /* */ }, { /* 1268 */ 0, /* */ }, { /* 1269 */ 0, /* */ }, { /* 1270 */ 0, /* */ }, { /* 1271 */ 0, /* */ }, { /* 1272 */ 0, /* */ }, { /* 1273 */ 0, /* */ }, { /* 1274 */ 0, /* */ }, { /* 1275 */ 0, /* */ }, { /* 1276 */ 0, /* */ }, { /* 1277 */ 0, /* */ }, { /* 1278 */ 0, /* */ }, { /* 1279 */ 0, /* */ }, { /* 1280 */ 0, /* */ }, { /* 1281 */ 0, /* */ }, { /* 1282 */ 0, /* */ }, { /* 1283 */ 0, /* */ }, { /* 1284 */ 0, /* */ }, { /* 1285 */ 0, /* */ }, { /* 1286 */ 0, /* */ }, { /* 1287 */ 0, /* */ }, { /* 1288 */ 0, /* */ }, { /* 1289 */ 0, /* */ }, { /* 1290 */ 0, /* */ }, { /* 1291 */ 0, /* */ }, { /* 1292 */ 0, /* */ }, { /* 1293 */ 0, /* */ }, { /* 1294 */ 0, /* */ }, { /* 1295 */ 0, /* */ }, { /* 1296 */ 0, /* */ }, { /* 1297 */ 0, /* */ }, { /* 1298 */ 0, /* */ }, { /* 1299 */ 0, /* */ }, { /* 1300 */ 0, /* */ }, { /* 1301 */ 0, /* */ }, { /* 1302 */ 0, /* */ }, { /* 1303 */ 0, /* */ }, { /* 1304 */ 0, /* */ }, { /* 1305 */ 0, /* LOCK_PREFIX */ }, { /* 1306 */ 0, /* */ }, { /* 1307 */ 0, /* */ }, { /* 1308 */ 0, /* */ }, { /* 1309 */ 0, /* */ }, { /* 1310 */ 0, /* */ }, { /* 1311 */ 0, /* */ }, { /* 1312 */ 0, /* */ }, { /* 1313 */ 0, /* */ }, { /* 1314 */ 0, /* */ }, { /* 1315 */ 0, /* */ }, { /* 1316 */ 0, /* */ }, { /* 1317 */ 0, /* */ }, { /* 1318 */ 0, /* */ }, { /* 1319 */ 0, /* */ }, { /* 1320 */ 0, /* */ }, { /* 1321 */ 0, /* */ }, { /* 1322 */ 0, /* */ }, { /* 1323 */ 0, /* */ }, { /* 1324 */ 0, /* */ }, { /* 1325 */ 0, /* */ }, { /* 1326 */ 0, /* */ }, { /* 1327 */ 0, /* */ }, { /* 1328 */ 195, /* LODSB */ }, { /* 1329 */ 196, /* LODSL */ }, { /* 1330 */ 197, /* LODSQ */ }, { /* 1331 */ 198, /* LODSW */ }, { /* 1332 */ 156, /* LOOP */ }, { /* 1333 */ 156, /* LOOPE */ }, { /* 1334 */ 156, /* LOOPNE */ }, { /* 1335 */ 199, /* LRETIL */ }, { /* 1336 */ 199, /* LRETIQ */ }, { /* 1337 */ 2, /* LRETIW */ }, { /* 1338 */ 0, /* LRETL */ }, { /* 1339 */ 0, /* LRETQ */ }, { /* 1340 */ 0, /* LRETW */ }, { /* 1341 */ 68, /* LSL16rm */ }, { /* 1342 */ 69, /* LSL16rr */ }, { /* 1343 */ 68, /* LSL32rm */ }, { /* 1344 */ 69, /* LSL32rr */ }, { /* 1345 */ 42, /* LSL64rm */ }, { /* 1346 */ 43, /* LSL64rr */ }, { /* 1347 */ 187, /* LSS16rm */ }, { /* 1348 */ 188, /* LSS32rm */ }, { /* 1349 */ 193, /* LSS64rm */ }, { /* 1350 */ 38, /* LTRm */ }, { /* 1351 */ 194, /* LTRr */ }, { /* 1352 */ 0, /* */ }, { /* 1353 */ 0, /* */ }, { /* 1354 */ 0, /* */ }, { /* 1355 */ 0, /* */ }, { /* 1356 */ 68, /* LZCNT16rm */ }, { /* 1357 */ 69, /* LZCNT16rr */ }, { /* 1358 */ 68, /* LZCNT32rm */ }, { /* 1359 */ 69, /* LZCNT32rr */ }, { /* 1360 */ 42, /* LZCNT64rm */ }, { /* 1361 */ 43, /* LZCNT64rr */ }, { /* 1362 */ 45, /* MASKMOVDQU */ }, { /* 1363 */ 45, /* MASKMOVDQU64 */ }, { /* 1364 */ 0, /* */ }, { /* 1365 */ 0, /* */ }, { /* 1366 */ 0, /* */ }, { /* 1367 */ 0, /* */ }, { /* 1368 */ 0, /* */ }, { /* 1369 */ 0, /* */ }, { /* 1370 */ 0, /* */ }, { /* 1371 */ 0, /* */ }, { /* 1372 */ 30, /* MAXPDrm */ }, { /* 1373 */ 31, /* MAXPDrr */ }, { /* 1374 */ 30, /* MAXPSrm */ }, { /* 1375 */ 31, /* MAXPSrr */ }, { /* 1376 */ 32, /* MAXSDrm */ }, { /* 1377 */ 0, /* */ }, { /* 1378 */ 33, /* MAXSDrr */ }, { /* 1379 */ 0, /* */ }, { /* 1380 */ 34, /* MAXSSrm */ }, { /* 1381 */ 0, /* */ }, { /* 1382 */ 35, /* MAXSSrr */ }, { /* 1383 */ 0, /* */ }, { /* 1384 */ 0, /* MFENCE */ }, { /* 1385 */ 0, /* */ }, { /* 1386 */ 0, /* */ }, { /* 1387 */ 0, /* */ }, { /* 1388 */ 0, /* */ }, { /* 1389 */ 0, /* */ }, { /* 1390 */ 0, /* */ }, { /* 1391 */ 0, /* */ }, { /* 1392 */ 0, /* */ }, { /* 1393 */ 30, /* MINPDrm */ }, { /* 1394 */ 31, /* MINPDrr */ }, { /* 1395 */ 30, /* MINPSrm */ }, { /* 1396 */ 31, /* MINPSrr */ }, { /* 1397 */ 32, /* MINSDrm */ }, { /* 1398 */ 0, /* */ }, { /* 1399 */ 33, /* MINSDrr */ }, { /* 1400 */ 0, /* */ }, { /* 1401 */ 34, /* MINSSrm */ }, { /* 1402 */ 0, /* */ }, { /* 1403 */ 35, /* MINSSrr */ }, { /* 1404 */ 0, /* */ }, { /* 1405 */ 200, /* MMX_CVTPD2PIirm */ }, { /* 1406 */ 201, /* MMX_CVTPD2PIirr */ }, { /* 1407 */ 105, /* MMX_CVTPI2PDirm */ }, { /* 1408 */ 202, /* MMX_CVTPI2PDirr */ }, { /* 1409 */ 203, /* MMX_CVTPI2PSirm */ }, { /* 1410 */ 204, /* MMX_CVTPI2PSirr */ }, { /* 1411 */ 205, /* MMX_CVTPS2PIirm */ }, { /* 1412 */ 201, /* MMX_CVTPS2PIirr */ }, { /* 1413 */ 200, /* MMX_CVTTPD2PIirm */ }, { /* 1414 */ 201, /* MMX_CVTTPD2PIirr */ }, { /* 1415 */ 205, /* MMX_CVTTPS2PIirm */ }, { /* 1416 */ 201, /* MMX_CVTTPS2PIirr */ }, { /* 1417 */ 0, /* MMX_EMMS */ }, { /* 1418 */ 206, /* MMX_MASKMOVQ */ }, { /* 1419 */ 206, /* MMX_MASKMOVQ64 */ }, { /* 1420 */ 207, /* MMX_MOVD64from64rm */ }, { /* 1421 */ 208, /* MMX_MOVD64from64rr */ }, { /* 1422 */ 209, /* MMX_MOVD64grr */ }, { /* 1423 */ 207, /* MMX_MOVD64mr */ }, { /* 1424 */ 210, /* MMX_MOVD64rm */ }, { /* 1425 */ 211, /* MMX_MOVD64rr */ }, { /* 1426 */ 210, /* MMX_MOVD64to64rm */ }, { /* 1427 */ 212, /* MMX_MOVD64to64rr */ }, { /* 1428 */ 201, /* MMX_MOVDQ2Qrr */ }, { /* 1429 */ 0, /* */ }, { /* 1430 */ 207, /* MMX_MOVNTQmr */ }, { /* 1431 */ 202, /* MMX_MOVQ2DQrr */ }, { /* 1432 */ 0, /* */ }, { /* 1433 */ 207, /* MMX_MOVQ64mr */ }, { /* 1434 */ 210, /* MMX_MOVQ64rm */ }, { /* 1435 */ 206, /* MMX_MOVQ64rr */ }, { /* 1436 */ 213, /* MMX_MOVQ64rr_REV */ }, { /* 1437 */ 210, /* MMX_PABSBrm64 */ }, { /* 1438 */ 206, /* MMX_PABSBrr64 */ }, { /* 1439 */ 210, /* MMX_PABSDrm64 */ }, { /* 1440 */ 206, /* MMX_PABSDrr64 */ }, { /* 1441 */ 210, /* MMX_PABSWrm64 */ }, { /* 1442 */ 206, /* MMX_PABSWrr64 */ }, { /* 1443 */ 214, /* MMX_PACKSSDWirm */ }, { /* 1444 */ 215, /* MMX_PACKSSDWirr */ }, { /* 1445 */ 214, /* MMX_PACKSSWBirm */ }, { /* 1446 */ 215, /* MMX_PACKSSWBirr */ }, { /* 1447 */ 214, /* MMX_PACKUSWBirm */ }, { /* 1448 */ 215, /* MMX_PACKUSWBirr */ }, { /* 1449 */ 214, /* MMX_PADDBirm */ }, { /* 1450 */ 215, /* MMX_PADDBirr */ }, { /* 1451 */ 214, /* MMX_PADDDirm */ }, { /* 1452 */ 215, /* MMX_PADDDirr */ }, { /* 1453 */ 214, /* MMX_PADDQirm */ }, { /* 1454 */ 215, /* MMX_PADDQirr */ }, { /* 1455 */ 214, /* MMX_PADDSBirm */ }, { /* 1456 */ 215, /* MMX_PADDSBirr */ }, { /* 1457 */ 214, /* MMX_PADDSWirm */ }, { /* 1458 */ 215, /* MMX_PADDSWirr */ }, { /* 1459 */ 214, /* MMX_PADDUSBirm */ }, { /* 1460 */ 215, /* MMX_PADDUSBirr */ }, { /* 1461 */ 214, /* MMX_PADDUSWirm */ }, { /* 1462 */ 215, /* MMX_PADDUSWirr */ }, { /* 1463 */ 214, /* MMX_PADDWirm */ }, { /* 1464 */ 215, /* MMX_PADDWirr */ }, { /* 1465 */ 216, /* MMX_PALIGNR64irm */ }, { /* 1466 */ 217, /* MMX_PALIGNR64irr */ }, { /* 1467 */ 214, /* MMX_PANDNirm */ }, { /* 1468 */ 215, /* MMX_PANDNirr */ }, { /* 1469 */ 214, /* MMX_PANDirm */ }, { /* 1470 */ 215, /* MMX_PANDirr */ }, { /* 1471 */ 214, /* MMX_PAVGBirm */ }, { /* 1472 */ 215, /* MMX_PAVGBirr */ }, { /* 1473 */ 214, /* MMX_PAVGWirm */ }, { /* 1474 */ 215, /* MMX_PAVGWirr */ }, { /* 1475 */ 214, /* MMX_PCMPEQBirm */ }, { /* 1476 */ 215, /* MMX_PCMPEQBirr */ }, { /* 1477 */ 214, /* MMX_PCMPEQDirm */ }, { /* 1478 */ 215, /* MMX_PCMPEQDirr */ }, { /* 1479 */ 214, /* MMX_PCMPEQWirm */ }, { /* 1480 */ 215, /* MMX_PCMPEQWirr */ }, { /* 1481 */ 214, /* MMX_PCMPGTBirm */ }, { /* 1482 */ 215, /* MMX_PCMPGTBirr */ }, { /* 1483 */ 214, /* MMX_PCMPGTDirm */ }, { /* 1484 */ 215, /* MMX_PCMPGTDirr */ }, { /* 1485 */ 214, /* MMX_PCMPGTWirm */ }, { /* 1486 */ 215, /* MMX_PCMPGTWirr */ }, { /* 1487 */ 218, /* MMX_PEXTRWirri */ }, { /* 1488 */ 214, /* MMX_PHADDSWrm64 */ }, { /* 1489 */ 215, /* MMX_PHADDSWrr64 */ }, { /* 1490 */ 214, /* MMX_PHADDWrm64 */ }, { /* 1491 */ 215, /* MMX_PHADDWrr64 */ }, { /* 1492 */ 214, /* MMX_PHADDrm64 */ }, { /* 1493 */ 215, /* MMX_PHADDrr64 */ }, { /* 1494 */ 214, /* MMX_PHSUBDrm64 */ }, { /* 1495 */ 215, /* MMX_PHSUBDrr64 */ }, { /* 1496 */ 214, /* MMX_PHSUBSWrm64 */ }, { /* 1497 */ 215, /* MMX_PHSUBSWrr64 */ }, { /* 1498 */ 214, /* MMX_PHSUBWrm64 */ }, { /* 1499 */ 215, /* MMX_PHSUBWrr64 */ }, { /* 1500 */ 216, /* MMX_PINSRWirmi */ }, { /* 1501 */ 219, /* MMX_PINSRWirri */ }, { /* 1502 */ 214, /* MMX_PMADDUBSWrm64 */ }, { /* 1503 */ 215, /* MMX_PMADDUBSWrr64 */ }, { /* 1504 */ 214, /* MMX_PMADDWDirm */ }, { /* 1505 */ 215, /* MMX_PMADDWDirr */ }, { /* 1506 */ 214, /* MMX_PMAXSWirm */ }, { /* 1507 */ 215, /* MMX_PMAXSWirr */ }, { /* 1508 */ 214, /* MMX_PMAXUBirm */ }, { /* 1509 */ 215, /* MMX_PMAXUBirr */ }, { /* 1510 */ 214, /* MMX_PMINSWirm */ }, { /* 1511 */ 215, /* MMX_PMINSWirr */ }, { /* 1512 */ 214, /* MMX_PMINUBirm */ }, { /* 1513 */ 215, /* MMX_PMINUBirr */ }, { /* 1514 */ 220, /* MMX_PMOVMSKBrr */ }, { /* 1515 */ 214, /* MMX_PMULHRSWrm64 */ }, { /* 1516 */ 215, /* MMX_PMULHRSWrr64 */ }, { /* 1517 */ 214, /* MMX_PMULHUWirm */ }, { /* 1518 */ 215, /* MMX_PMULHUWirr */ }, { /* 1519 */ 214, /* MMX_PMULHWirm */ }, { /* 1520 */ 215, /* MMX_PMULHWirr */ }, { /* 1521 */ 214, /* MMX_PMULLWirm */ }, { /* 1522 */ 215, /* MMX_PMULLWirr */ }, { /* 1523 */ 214, /* MMX_PMULUDQirm */ }, { /* 1524 */ 215, /* MMX_PMULUDQirr */ }, { /* 1525 */ 214, /* MMX_PORirm */ }, { /* 1526 */ 215, /* MMX_PORirr */ }, { /* 1527 */ 214, /* MMX_PSADBWirm */ }, { /* 1528 */ 215, /* MMX_PSADBWirr */ }, { /* 1529 */ 214, /* MMX_PSHUFBrm64 */ }, { /* 1530 */ 215, /* MMX_PSHUFBrr64 */ }, { /* 1531 */ 221, /* MMX_PSHUFWmi */ }, { /* 1532 */ 222, /* MMX_PSHUFWri */ }, { /* 1533 */ 214, /* MMX_PSIGNBrm64 */ }, { /* 1534 */ 215, /* MMX_PSIGNBrr64 */ }, { /* 1535 */ 214, /* MMX_PSIGNDrm64 */ }, { /* 1536 */ 215, /* MMX_PSIGNDrr64 */ }, { /* 1537 */ 214, /* MMX_PSIGNWrm64 */ }, { /* 1538 */ 215, /* MMX_PSIGNWrr64 */ }, { /* 1539 */ 223, /* MMX_PSLLDri */ }, { /* 1540 */ 214, /* MMX_PSLLDrm */ }, { /* 1541 */ 215, /* MMX_PSLLDrr */ }, { /* 1542 */ 223, /* MMX_PSLLQri */ }, { /* 1543 */ 214, /* MMX_PSLLQrm */ }, { /* 1544 */ 215, /* MMX_PSLLQrr */ }, { /* 1545 */ 223, /* MMX_PSLLWri */ }, { /* 1546 */ 214, /* MMX_PSLLWrm */ }, { /* 1547 */ 215, /* MMX_PSLLWrr */ }, { /* 1548 */ 223, /* MMX_PSRADri */ }, { /* 1549 */ 214, /* MMX_PSRADrm */ }, { /* 1550 */ 215, /* MMX_PSRADrr */ }, { /* 1551 */ 223, /* MMX_PSRAWri */ }, { /* 1552 */ 214, /* MMX_PSRAWrm */ }, { /* 1553 */ 215, /* MMX_PSRAWrr */ }, { /* 1554 */ 223, /* MMX_PSRLDri */ }, { /* 1555 */ 214, /* MMX_PSRLDrm */ }, { /* 1556 */ 215, /* MMX_PSRLDrr */ }, { /* 1557 */ 223, /* MMX_PSRLQri */ }, { /* 1558 */ 214, /* MMX_PSRLQrm */ }, { /* 1559 */ 215, /* MMX_PSRLQrr */ }, { /* 1560 */ 223, /* MMX_PSRLWri */ }, { /* 1561 */ 214, /* MMX_PSRLWrm */ }, { /* 1562 */ 215, /* MMX_PSRLWrr */ }, { /* 1563 */ 214, /* MMX_PSUBBirm */ }, { /* 1564 */ 215, /* MMX_PSUBBirr */ }, { /* 1565 */ 214, /* MMX_PSUBDirm */ }, { /* 1566 */ 215, /* MMX_PSUBDirr */ }, { /* 1567 */ 214, /* MMX_PSUBQirm */ }, { /* 1568 */ 215, /* MMX_PSUBQirr */ }, { /* 1569 */ 214, /* MMX_PSUBSBirm */ }, { /* 1570 */ 215, /* MMX_PSUBSBirr */ }, { /* 1571 */ 214, /* MMX_PSUBSWirm */ }, { /* 1572 */ 215, /* MMX_PSUBSWirr */ }, { /* 1573 */ 214, /* MMX_PSUBUSBirm */ }, { /* 1574 */ 215, /* MMX_PSUBUSBirr */ }, { /* 1575 */ 214, /* MMX_PSUBUSWirm */ }, { /* 1576 */ 215, /* MMX_PSUBUSWirr */ }, { /* 1577 */ 214, /* MMX_PSUBWirm */ }, { /* 1578 */ 215, /* MMX_PSUBWirr */ }, { /* 1579 */ 214, /* MMX_PUNPCKHBWirm */ }, { /* 1580 */ 215, /* MMX_PUNPCKHBWirr */ }, { /* 1581 */ 214, /* MMX_PUNPCKHDQirm */ }, { /* 1582 */ 215, /* MMX_PUNPCKHDQirr */ }, { /* 1583 */ 214, /* MMX_PUNPCKHWDirm */ }, { /* 1584 */ 215, /* MMX_PUNPCKHWDirr */ }, { /* 1585 */ 214, /* MMX_PUNPCKLBWirm */ }, { /* 1586 */ 215, /* MMX_PUNPCKLBWirr */ }, { /* 1587 */ 214, /* MMX_PUNPCKLDQirm */ }, { /* 1588 */ 215, /* MMX_PUNPCKLDQirr */ }, { /* 1589 */ 214, /* MMX_PUNPCKLWDirm */ }, { /* 1590 */ 215, /* MMX_PUNPCKLWDirr */ }, { /* 1591 */ 214, /* MMX_PXORirm */ }, { /* 1592 */ 215, /* MMX_PXORirr */ }, { /* 1593 */ 0, /* */ }, { /* 1594 */ 0, /* MONITORrrr */ }, { /* 1595 */ 0, /* MONTMUL */ }, { /* 1596 */ 0, /* */ }, { /* 1597 */ 0, /* */ }, { /* 1598 */ 224, /* MOV16ao16 */ }, { /* 1599 */ 224, /* MOV16ao32 */ }, { /* 1600 */ 224, /* MOV16ao64 */ }, { /* 1601 */ 3, /* MOV16mi */ }, { /* 1602 */ 5, /* MOV16mr */ }, { /* 1603 */ 225, /* MOV16ms */ }, { /* 1604 */ 224, /* MOV16o16a */ }, { /* 1605 */ 224, /* MOV16o32a */ }, { /* 1606 */ 224, /* MOV16o64a */ }, { /* 1607 */ 226, /* MOV16ri */ }, { /* 1608 */ 83, /* MOV16ri_alt */ }, { /* 1609 */ 68, /* MOV16rm */ }, { /* 1610 */ 73, /* MOV16rr */ }, { /* 1611 */ 69, /* MOV16rr_REV */ }, { /* 1612 */ 227, /* MOV16rs */ }, { /* 1613 */ 228, /* MOV16sm */ }, { /* 1614 */ 229, /* MOV16sr */ }, { /* 1615 */ 230, /* MOV32ao16 */ }, { /* 1616 */ 230, /* MOV32ao32 */ }, { /* 1617 */ 230, /* MOV32ao64 */ }, { /* 1618 */ 231, /* MOV32cr */ }, { /* 1619 */ 232, /* MOV32dr */ }, { /* 1620 */ 3, /* MOV32mi */ }, { /* 1621 */ 5, /* MOV32mr */ }, { /* 1622 */ 225, /* MOV32ms */ }, { /* 1623 */ 230, /* MOV32o16a */ }, { /* 1624 */ 230, /* MOV32o32a */ }, { /* 1625 */ 230, /* MOV32o64a */ }, { /* 1626 */ 0, /* */ }, { /* 1627 */ 233, /* MOV32rc */ }, { /* 1628 */ 234, /* MOV32rd */ }, { /* 1629 */ 226, /* MOV32ri */ }, { /* 1630 */ 0, /* */ }, { /* 1631 */ 83, /* MOV32ri_alt */ }, { /* 1632 */ 68, /* MOV32rm */ }, { /* 1633 */ 73, /* MOV32rr */ }, { /* 1634 */ 69, /* MOV32rr_REV */ }, { /* 1635 */ 227, /* MOV32rs */ }, { /* 1636 */ 228, /* MOV32sm */ }, { /* 1637 */ 229, /* MOV32sr */ }, { /* 1638 */ 235, /* MOV64ao32 */ }, { /* 1639 */ 235, /* MOV64ao64 */ }, { /* 1640 */ 236, /* MOV64cr */ }, { /* 1641 */ 237, /* MOV64dr */ }, { /* 1642 */ 14, /* MOV64mi32 */ }, { /* 1643 */ 16, /* MOV64mr */ }, { /* 1644 */ 225, /* MOV64ms */ }, { /* 1645 */ 235, /* MOV64o32a */ }, { /* 1646 */ 235, /* MOV64o64a */ }, { /* 1647 */ 238, /* MOV64rc */ }, { /* 1648 */ 239, /* MOV64rd */ }, { /* 1649 */ 240, /* MOV64ri */ }, { /* 1650 */ 84, /* MOV64ri32 */ }, { /* 1651 */ 42, /* MOV64rm */ }, { /* 1652 */ 76, /* MOV64rr */ }, { /* 1653 */ 43, /* MOV64rr_REV */ }, { /* 1654 */ 241, /* MOV64rs */ }, { /* 1655 */ 228, /* MOV64sm */ }, { /* 1656 */ 242, /* MOV64sr */ }, { /* 1657 */ 105, /* MOV64toPQIrm */ }, { /* 1658 */ 243, /* MOV64toPQIrr */ }, { /* 1659 */ 0, /* */ }, { /* 1660 */ 0, /* */ }, { /* 1661 */ 244, /* MOV8ao16 */ }, { /* 1662 */ 244, /* MOV8ao32 */ }, { /* 1663 */ 244, /* MOV8ao64 */ }, { /* 1664 */ 22, /* MOV8mi */ }, { /* 1665 */ 23, /* MOV8mr */ }, { /* 1666 */ 0, /* */ }, { /* 1667 */ 244, /* MOV8o16a */ }, { /* 1668 */ 244, /* MOV8o32a */ }, { /* 1669 */ 244, /* MOV8o64a */ }, { /* 1670 */ 245, /* MOV8ri */ }, { /* 1671 */ 85, /* MOV8ri_alt */ }, { /* 1672 */ 86, /* MOV8rm */ }, { /* 1673 */ 0, /* */ }, { /* 1674 */ 87, /* MOV8rr */ }, { /* 1675 */ 0, /* */ }, { /* 1676 */ 88, /* MOV8rr_REV */ }, { /* 1677 */ 246, /* MOVAPDmr */ }, { /* 1678 */ 44, /* MOVAPDrm */ }, { /* 1679 */ 45, /* MOVAPDrr */ }, { /* 1680 */ 247, /* MOVAPDrr_REV */ }, { /* 1681 */ 246, /* MOVAPSmr */ }, { /* 1682 */ 44, /* MOVAPSrm */ }, { /* 1683 */ 45, /* MOVAPSrr */ }, { /* 1684 */ 247, /* MOVAPSrr_REV */ }, { /* 1685 */ 5, /* MOVBE16mr */ }, { /* 1686 */ 68, /* MOVBE16rm */ }, { /* 1687 */ 5, /* MOVBE32mr */ }, { /* 1688 */ 68, /* MOVBE32rm */ }, { /* 1689 */ 16, /* MOVBE64mr */ }, { /* 1690 */ 42, /* MOVBE64rm */ }, { /* 1691 */ 106, /* MOVDDUPrm */ }, { /* 1692 */ 45, /* MOVDDUPrr */ }, { /* 1693 */ 105, /* MOVDI2PDIrm */ }, { /* 1694 */ 248, /* MOVDI2PDIrr */ }, { /* 1695 */ 0, /* */ }, { /* 1696 */ 0, /* */ }, { /* 1697 */ 246, /* MOVDQAmr */ }, { /* 1698 */ 44, /* MOVDQArm */ }, { /* 1699 */ 45, /* MOVDQArr */ }, { /* 1700 */ 247, /* MOVDQArr_REV */ }, { /* 1701 */ 246, /* MOVDQUmr */ }, { /* 1702 */ 44, /* MOVDQUrm */ }, { /* 1703 */ 45, /* MOVDQUrr */ }, { /* 1704 */ 247, /* MOVDQUrr_REV */ }, { /* 1705 */ 31, /* MOVHLPSrr */ }, { /* 1706 */ 249, /* MOVHPDmr */ }, { /* 1707 */ 250, /* MOVHPDrm */ }, { /* 1708 */ 249, /* MOVHPSmr */ }, { /* 1709 */ 250, /* MOVHPSrm */ }, { /* 1710 */ 31, /* MOVLHPSrr */ }, { /* 1711 */ 249, /* MOVLPDmr */ }, { /* 1712 */ 250, /* MOVLPDrm */ }, { /* 1713 */ 249, /* MOVLPSmr */ }, { /* 1714 */ 250, /* MOVLPSrm */ }, { /* 1715 */ 110, /* MOVMSKPDrr */ }, { /* 1716 */ 110, /* MOVMSKPSrr */ }, { /* 1717 */ 44, /* MOVNTDQArm */ }, { /* 1718 */ 246, /* MOVNTDQmr */ }, { /* 1719 */ 16, /* MOVNTI_64mr */ }, { /* 1720 */ 251, /* MOVNTImr */ }, { /* 1721 */ 246, /* MOVNTPDmr */ }, { /* 1722 */ 246, /* MOVNTPSmr */ }, { /* 1723 */ 249, /* MOVNTSD */ }, { /* 1724 */ 252, /* MOVNTSS */ }, { /* 1725 */ 0, /* */ }, { /* 1726 */ 253, /* MOVPDI2DImr */ }, { /* 1727 */ 254, /* MOVPDI2DIrr */ }, { /* 1728 */ 253, /* MOVPQI2QImr */ }, { /* 1729 */ 247, /* MOVPQI2QIrr */ }, { /* 1730 */ 253, /* MOVPQIto64rm */ }, { /* 1731 */ 255, /* MOVPQIto64rr */ }, { /* 1732 */ 105, /* MOVQI2PQIrm */ }, { /* 1733 */ 91, /* MOVSB */ }, { /* 1734 */ 256, /* MOVSDmr */ }, { /* 1735 */ 257, /* MOVSDrm */ }, { /* 1736 */ 258, /* MOVSDrr */ }, { /* 1737 */ 259, /* MOVSDrr_REV */ }, { /* 1738 */ 0, /* */ }, { /* 1739 */ 0, /* */ }, { /* 1740 */ 44, /* MOVSHDUPrm */ }, { /* 1741 */ 45, /* MOVSHDUPrr */ }, { /* 1742 */ 94, /* MOVSL */ }, { /* 1743 */ 44, /* MOVSLDUPrm */ }, { /* 1744 */ 45, /* MOVSLDUPrr */ }, { /* 1745 */ 95, /* MOVSQ */ }, { /* 1746 */ 0, /* */ }, { /* 1747 */ 0, /* */ }, { /* 1748 */ 260, /* MOVSSmr */ }, { /* 1749 */ 261, /* MOVSSrm */ }, { /* 1750 */ 262, /* MOVSSrr */ }, { /* 1751 */ 263, /* MOVSSrr_REV */ }, { /* 1752 */ 98, /* MOVSW */ }, { /* 1753 */ 264, /* MOVSX16rm8 */ }, { /* 1754 */ 265, /* MOVSX16rr8 */ }, { /* 1755 */ 0, /* */ }, { /* 1756 */ 0, /* */ }, { /* 1757 */ 68, /* MOVSX32rm16 */ }, { /* 1758 */ 264, /* MOVSX32rm8 */ }, { /* 1759 */ 266, /* MOVSX32rr16 */ }, { /* 1760 */ 265, /* MOVSX32rr8 */ }, { /* 1761 */ 186, /* MOVSX64_NOREXrr32 */ }, { /* 1762 */ 42, /* MOVSX64rm16 */ }, { /* 1763 */ 42, /* MOVSX64rm32 */ }, { /* 1764 */ 42, /* MOVSX64rm32_alt */ }, { /* 1765 */ 267, /* MOVSX64rm8 */ }, { /* 1766 */ 268, /* MOVSX64rr16 */ }, { /* 1767 */ 186, /* MOVSX64rr32 */ }, { /* 1768 */ 269, /* MOVSX64rr8 */ }, { /* 1769 */ 246, /* MOVUPDmr */ }, { /* 1770 */ 44, /* MOVUPDrm */ }, { /* 1771 */ 45, /* MOVUPDrr */ }, { /* 1772 */ 247, /* MOVUPDrr_REV */ }, { /* 1773 */ 246, /* MOVUPSmr */ }, { /* 1774 */ 44, /* MOVUPSrm */ }, { /* 1775 */ 45, /* MOVUPSrr */ }, { /* 1776 */ 247, /* MOVUPSrr_REV */ }, { /* 1777 */ 0, /* */ }, { /* 1778 */ 45, /* MOVZPQILo2PQIrr */ }, { /* 1779 */ 0, /* */ }, { /* 1780 */ 0, /* */ }, { /* 1781 */ 264, /* MOVZX16rm8 */ }, { /* 1782 */ 265, /* MOVZX16rr8 */ }, { /* 1783 */ 0, /* */ }, { /* 1784 */ 0, /* */ }, { /* 1785 */ 68, /* MOVZX32rm16 */ }, { /* 1786 */ 264, /* MOVZX32rm8 */ }, { /* 1787 */ 266, /* MOVZX32rr16 */ }, { /* 1788 */ 265, /* MOVZX32rr8 */ }, { /* 1789 */ 42, /* MOVZX64rm16_Q */ }, { /* 1790 */ 267, /* MOVZX64rm8_Q */ }, { /* 1791 */ 268, /* MOVZX64rr16_Q */ }, { /* 1792 */ 269, /* MOVZX64rr8_Q */ }, { /* 1793 */ 66, /* MPSADBWrmi */ }, { /* 1794 */ 67, /* MPSADBWrri */ }, { /* 1795 */ 38, /* MUL16m */ }, { /* 1796 */ 77, /* MUL16r */ }, { /* 1797 */ 38, /* MUL32m */ }, { /* 1798 */ 77, /* MUL32r */ }, { /* 1799 */ 38, /* MUL64m */ }, { /* 1800 */ 79, /* MUL64r */ }, { /* 1801 */ 82, /* MUL8m */ }, { /* 1802 */ 130, /* MUL8r */ }, { /* 1803 */ 30, /* MULPDrm */ }, { /* 1804 */ 31, /* MULPDrr */ }, { /* 1805 */ 30, /* MULPSrm */ }, { /* 1806 */ 31, /* MULPSrr */ }, { /* 1807 */ 32, /* MULSDrm */ }, { /* 1808 */ 0, /* */ }, { /* 1809 */ 33, /* MULSDrr */ }, { /* 1810 */ 0, /* */ }, { /* 1811 */ 34, /* MULSSrm */ }, { /* 1812 */ 0, /* */ }, { /* 1813 */ 35, /* MULSSrr */ }, { /* 1814 */ 0, /* */ }, { /* 1815 */ 48, /* MULX32rm */ }, { /* 1816 */ 49, /* MULX32rr */ }, { /* 1817 */ 50, /* MULX64rm */ }, { /* 1818 */ 51, /* MULX64rr */ }, { /* 1819 */ 36, /* MUL_F32m */ }, { /* 1820 */ 37, /* MUL_F64m */ }, { /* 1821 */ 38, /* MUL_FI16m */ }, { /* 1822 */ 38, /* MUL_FI32m */ }, { /* 1823 */ 39, /* MUL_FPrST0 */ }, { /* 1824 */ 39, /* MUL_FST0r */ }, { /* 1825 */ 0, /* */ }, { /* 1826 */ 0, /* */ }, { /* 1827 */ 0, /* */ }, { /* 1828 */ 0, /* */ }, { /* 1829 */ 0, /* */ }, { /* 1830 */ 0, /* */ }, { /* 1831 */ 0, /* */ }, { /* 1832 */ 0, /* */ }, { /* 1833 */ 0, /* */ }, { /* 1834 */ 0, /* */ }, { /* 1835 */ 0, /* */ }, { /* 1836 */ 0, /* */ }, { /* 1837 */ 0, /* */ }, { /* 1838 */ 0, /* */ }, { /* 1839 */ 39, /* MUL_FrST0 */ }, { /* 1840 */ 0, /* MWAITrr */ }, { /* 1841 */ 38, /* NEG16m */ }, { /* 1842 */ 127, /* NEG16r */ }, { /* 1843 */ 38, /* NEG32m */ }, { /* 1844 */ 127, /* NEG32r */ }, { /* 1845 */ 38, /* NEG64m */ }, { /* 1846 */ 128, /* NEG64r */ }, { /* 1847 */ 82, /* NEG8m */ }, { /* 1848 */ 129, /* NEG8r */ }, { /* 1849 */ 0, /* NOOP */ }, { /* 1850 */ 38, /* NOOP18_16m4 */ }, { /* 1851 */ 38, /* NOOP18_16m5 */ }, { /* 1852 */ 38, /* NOOP18_16m6 */ }, { /* 1853 */ 38, /* NOOP18_16m7 */ }, { /* 1854 */ 77, /* NOOP18_16r4 */ }, { /* 1855 */ 77, /* NOOP18_16r5 */ }, { /* 1856 */ 77, /* NOOP18_16r6 */ }, { /* 1857 */ 77, /* NOOP18_16r7 */ }, { /* 1858 */ 38, /* NOOP18_m4 */ }, { /* 1859 */ 38, /* NOOP18_m5 */ }, { /* 1860 */ 38, /* NOOP18_m6 */ }, { /* 1861 */ 38, /* NOOP18_m7 */ }, { /* 1862 */ 77, /* NOOP18_r4 */ }, { /* 1863 */ 77, /* NOOP18_r5 */ }, { /* 1864 */ 77, /* NOOP18_r6 */ }, { /* 1865 */ 77, /* NOOP18_r7 */ }, { /* 1866 */ 69, /* NOOP19rr */ }, { /* 1867 */ 38, /* NOOPL */ }, { /* 1868 */ 38, /* NOOPL_19 */ }, { /* 1869 */ 38, /* NOOPL_1a */ }, { /* 1870 */ 38, /* NOOPL_1b */ }, { /* 1871 */ 38, /* NOOPL_1c */ }, { /* 1872 */ 38, /* NOOPL_1d */ }, { /* 1873 */ 38, /* NOOPL_1e */ }, { /* 1874 */ 38, /* NOOPW */ }, { /* 1875 */ 38, /* NOOPW_19 */ }, { /* 1876 */ 38, /* NOOPW_1a */ }, { /* 1877 */ 38, /* NOOPW_1b */ }, { /* 1878 */ 38, /* NOOPW_1c */ }, { /* 1879 */ 38, /* NOOPW_1d */ }, { /* 1880 */ 38, /* NOOPW_1e */ }, { /* 1881 */ 38, /* NOT16m */ }, { /* 1882 */ 127, /* NOT16r */ }, { /* 1883 */ 38, /* NOT32m */ }, { /* 1884 */ 127, /* NOT32r */ }, { /* 1885 */ 38, /* NOT64m */ }, { /* 1886 */ 128, /* NOT64r */ }, { /* 1887 */ 82, /* NOT8m */ }, { /* 1888 */ 129, /* NOT8r */ }, { /* 1889 */ 2, /* OR16i16 */ }, { /* 1890 */ 3, /* OR16mi */ }, { /* 1891 */ 4, /* OR16mi8 */ }, { /* 1892 */ 5, /* OR16mr */ }, { /* 1893 */ 6, /* OR16ri */ }, { /* 1894 */ 7, /* OR16ri8 */ }, { /* 1895 */ 8, /* OR16rm */ }, { /* 1896 */ 9, /* OR16rr */ }, { /* 1897 */ 10, /* OR16rr_REV */ }, { /* 1898 */ 2, /* OR32i32 */ }, { /* 1899 */ 3, /* OR32mi */ }, { /* 1900 */ 11, /* OR32mi8 */ }, { /* 1901 */ 5, /* OR32mr */ }, { /* 1902 */ 0, /* */ }, { /* 1903 */ 6, /* OR32ri */ }, { /* 1904 */ 12, /* OR32ri8 */ }, { /* 1905 */ 8, /* OR32rm */ }, { /* 1906 */ 9, /* OR32rr */ }, { /* 1907 */ 10, /* OR32rr_REV */ }, { /* 1908 */ 13, /* OR64i32 */ }, { /* 1909 */ 14, /* OR64mi32 */ }, { /* 1910 */ 15, /* OR64mi8 */ }, { /* 1911 */ 16, /* OR64mr */ }, { /* 1912 */ 17, /* OR64ri32 */ }, { /* 1913 */ 18, /* OR64ri8 */ }, { /* 1914 */ 19, /* OR64rm */ }, { /* 1915 */ 20, /* OR64rr */ }, { /* 1916 */ 21, /* OR64rr_REV */ }, { /* 1917 */ 1, /* OR8i8 */ }, { /* 1918 */ 22, /* OR8mi */ }, { /* 1919 */ 22, /* OR8mi8 */ }, { /* 1920 */ 23, /* OR8mr */ }, { /* 1921 */ 24, /* OR8ri */ }, { /* 1922 */ 24, /* OR8ri8 */ }, { /* 1923 */ 25, /* OR8rm */ }, { /* 1924 */ 26, /* OR8rr */ }, { /* 1925 */ 27, /* OR8rr_REV */ }, { /* 1926 */ 30, /* ORPDrm */ }, { /* 1927 */ 31, /* ORPDrr */ }, { /* 1928 */ 30, /* ORPSrm */ }, { /* 1929 */ 31, /* ORPSrr */ }, { /* 1930 */ 1, /* OUT16ir */ }, { /* 1931 */ 0, /* OUT16rr */ }, { /* 1932 */ 1, /* OUT32ir */ }, { /* 1933 */ 0, /* OUT32rr */ }, { /* 1934 */ 1, /* OUT8ir */ }, { /* 1935 */ 0, /* OUT8rr */ }, { /* 1936 */ 195, /* OUTSB */ }, { /* 1937 */ 196, /* OUTSL */ }, { /* 1938 */ 198, /* OUTSW */ }, { /* 1939 */ 44, /* PABSBrm128 */ }, { /* 1940 */ 45, /* PABSBrr128 */ }, { /* 1941 */ 44, /* PABSDrm128 */ }, { /* 1942 */ 45, /* PABSDrr128 */ }, { /* 1943 */ 44, /* PABSWrm128 */ }, { /* 1944 */ 45, /* PABSWrr128 */ }, { /* 1945 */ 30, /* PACKSSDWrm */ }, { /* 1946 */ 31, /* PACKSSDWrr */ }, { /* 1947 */ 30, /* PACKSSWBrm */ }, { /* 1948 */ 31, /* PACKSSWBrr */ }, { /* 1949 */ 30, /* PACKUSDWrm */ }, { /* 1950 */ 31, /* PACKUSDWrr */ }, { /* 1951 */ 30, /* PACKUSWBrm */ }, { /* 1952 */ 31, /* PACKUSWBrr */ }, { /* 1953 */ 30, /* PADDBrm */ }, { /* 1954 */ 31, /* PADDBrr */ }, { /* 1955 */ 30, /* PADDDrm */ }, { /* 1956 */ 31, /* PADDDrr */ }, { /* 1957 */ 30, /* PADDQrm */ }, { /* 1958 */ 31, /* PADDQrr */ }, { /* 1959 */ 30, /* PADDSBrm */ }, { /* 1960 */ 31, /* PADDSBrr */ }, { /* 1961 */ 30, /* PADDSWrm */ }, { /* 1962 */ 31, /* PADDSWrr */ }, { /* 1963 */ 30, /* PADDUSBrm */ }, { /* 1964 */ 31, /* PADDUSBrr */ }, { /* 1965 */ 30, /* PADDUSWrm */ }, { /* 1966 */ 31, /* PADDUSWrr */ }, { /* 1967 */ 30, /* PADDWrm */ }, { /* 1968 */ 31, /* PADDWrr */ }, { /* 1969 */ 66, /* PALIGNR128rm */ }, { /* 1970 */ 67, /* PALIGNR128rr */ }, { /* 1971 */ 30, /* PANDNrm */ }, { /* 1972 */ 31, /* PANDNrr */ }, { /* 1973 */ 30, /* PANDrm */ }, { /* 1974 */ 31, /* PANDrr */ }, { /* 1975 */ 0, /* PAUSE */ }, { /* 1976 */ 30, /* PAVGBrm */ }, { /* 1977 */ 31, /* PAVGBrr */ }, { /* 1978 */ 214, /* PAVGUSBrm */ }, { /* 1979 */ 215, /* PAVGUSBrr */ }, { /* 1980 */ 30, /* PAVGWrm */ }, { /* 1981 */ 31, /* PAVGWrr */ }, { /* 1982 */ 30, /* PBLENDVBrm0 */ }, { /* 1983 */ 31, /* PBLENDVBrr0 */ }, { /* 1984 */ 66, /* PBLENDWrmi */ }, { /* 1985 */ 67, /* PBLENDWrri */ }, { /* 1986 */ 66, /* PCLMULQDQrm */ }, { /* 1987 */ 67, /* PCLMULQDQrr */ }, { /* 1988 */ 30, /* PCMPEQBrm */ }, { /* 1989 */ 31, /* PCMPEQBrr */ }, { /* 1990 */ 30, /* PCMPEQDrm */ }, { /* 1991 */ 31, /* PCMPEQDrr */ }, { /* 1992 */ 30, /* PCMPEQQrm */ }, { /* 1993 */ 31, /* PCMPEQQrr */ }, { /* 1994 */ 30, /* PCMPEQWrm */ }, { /* 1995 */ 31, /* PCMPEQWrr */ }, { /* 1996 */ 0, /* */ }, { /* 1997 */ 0, /* */ }, { /* 1998 */ 46, /* PCMPESTRIrm */ }, { /* 1999 */ 47, /* PCMPESTRIrr */ }, { /* 2000 */ 0, /* */ }, { /* 2001 */ 0, /* */ }, { /* 2002 */ 46, /* PCMPESTRM128rm */ }, { /* 2003 */ 47, /* PCMPESTRM128rr */ }, { /* 2004 */ 30, /* PCMPGTBrm */ }, { /* 2005 */ 31, /* PCMPGTBrr */ }, { /* 2006 */ 30, /* PCMPGTDrm */ }, { /* 2007 */ 31, /* PCMPGTDrr */ }, { /* 2008 */ 30, /* PCMPGTQrm */ }, { /* 2009 */ 31, /* PCMPGTQrr */ }, { /* 2010 */ 30, /* PCMPGTWrm */ }, { /* 2011 */ 31, /* PCMPGTWrr */ }, { /* 2012 */ 0, /* */ }, { /* 2013 */ 0, /* */ }, { /* 2014 */ 46, /* PCMPISTRIrm */ }, { /* 2015 */ 47, /* PCMPISTRIrr */ }, { /* 2016 */ 0, /* */ }, { /* 2017 */ 0, /* */ }, { /* 2018 */ 46, /* PCMPISTRM128rm */ }, { /* 2019 */ 47, /* PCMPISTRM128rr */ }, { /* 2020 */ 0, /* PCOMMIT */ }, { /* 2021 */ 48, /* PDEP32rm */ }, { /* 2022 */ 49, /* PDEP32rr */ }, { /* 2023 */ 50, /* PDEP64rm */ }, { /* 2024 */ 51, /* PDEP64rr */ }, { /* 2025 */ 48, /* PEXT32rm */ }, { /* 2026 */ 49, /* PEXT32rr */ }, { /* 2027 */ 50, /* PEXT64rm */ }, { /* 2028 */ 51, /* PEXT64rr */ }, { /* 2029 */ 270, /* PEXTRBmr */ }, { /* 2030 */ 133, /* PEXTRBrr */ }, { /* 2031 */ 271, /* PEXTRDmr */ }, { /* 2032 */ 133, /* PEXTRDrr */ }, { /* 2033 */ 271, /* PEXTRQmr */ }, { /* 2034 */ 272, /* PEXTRQrr */ }, { /* 2035 */ 271, /* PEXTRWmr */ }, { /* 2036 */ 273, /* PEXTRWri */ }, { /* 2037 */ 133, /* PEXTRWrr_REV */ }, { /* 2038 */ 210, /* PF2IDrm */ }, { /* 2039 */ 206, /* PF2IDrr */ }, { /* 2040 */ 210, /* PF2IWrm */ }, { /* 2041 */ 206, /* PF2IWrr */ }, { /* 2042 */ 214, /* PFACCrm */ }, { /* 2043 */ 215, /* PFACCrr */ }, { /* 2044 */ 214, /* PFADDrm */ }, { /* 2045 */ 215, /* PFADDrr */ }, { /* 2046 */ 214, /* PFCMPEQrm */ }, { /* 2047 */ 215, /* PFCMPEQrr */ }, { /* 2048 */ 214, /* PFCMPGErm */ }, { /* 2049 */ 215, /* PFCMPGErr */ }, { /* 2050 */ 214, /* PFCMPGTrm */ }, { /* 2051 */ 215, /* PFCMPGTrr */ }, { /* 2052 */ 214, /* PFMAXrm */ }, { /* 2053 */ 215, /* PFMAXrr */ }, { /* 2054 */ 214, /* PFMINrm */ }, { /* 2055 */ 215, /* PFMINrr */ }, { /* 2056 */ 214, /* PFMULrm */ }, { /* 2057 */ 215, /* PFMULrr */ }, { /* 2058 */ 214, /* PFNACCrm */ }, { /* 2059 */ 215, /* PFNACCrr */ }, { /* 2060 */ 214, /* PFPNACCrm */ }, { /* 2061 */ 215, /* PFPNACCrr */ }, { /* 2062 */ 214, /* PFRCPIT1rm */ }, { /* 2063 */ 215, /* PFRCPIT1rr */ }, { /* 2064 */ 214, /* PFRCPIT2rm */ }, { /* 2065 */ 215, /* PFRCPIT2rr */ }, { /* 2066 */ 210, /* PFRCPrm */ }, { /* 2067 */ 206, /* PFRCPrr */ }, { /* 2068 */ 214, /* PFRSQIT1rm */ }, { /* 2069 */ 215, /* PFRSQIT1rr */ }, { /* 2070 */ 210, /* PFRSQRTrm */ }, { /* 2071 */ 206, /* PFRSQRTrr */ }, { /* 2072 */ 214, /* PFSUBRrm */ }, { /* 2073 */ 215, /* PFSUBRrr */ }, { /* 2074 */ 214, /* PFSUBrm */ }, { /* 2075 */ 215, /* PFSUBrr */ }, { /* 2076 */ 30, /* PHADDDrm */ }, { /* 2077 */ 31, /* PHADDDrr */ }, { /* 2078 */ 30, /* PHADDSWrm128 */ }, { /* 2079 */ 31, /* PHADDSWrr128 */ }, { /* 2080 */ 30, /* PHADDWrm */ }, { /* 2081 */ 31, /* PHADDWrr */ }, { /* 2082 */ 44, /* PHMINPOSUWrm128 */ }, { /* 2083 */ 45, /* PHMINPOSUWrr128 */ }, { /* 2084 */ 30, /* PHSUBDrm */ }, { /* 2085 */ 31, /* PHSUBDrr */ }, { /* 2086 */ 30, /* PHSUBSWrm128 */ }, { /* 2087 */ 31, /* PHSUBSWrr128 */ }, { /* 2088 */ 30, /* PHSUBWrm */ }, { /* 2089 */ 31, /* PHSUBWrr */ }, { /* 2090 */ 210, /* PI2FDrm */ }, { /* 2091 */ 206, /* PI2FDrr */ }, { /* 2092 */ 210, /* PI2FWrm */ }, { /* 2093 */ 206, /* PI2FWrr */ }, { /* 2094 */ 274, /* PINSRBrm */ }, { /* 2095 */ 275, /* PINSRBrr */ }, { /* 2096 */ 276, /* PINSRDrm */ }, { /* 2097 */ 275, /* PINSRDrr */ }, { /* 2098 */ 276, /* PINSRQrm */ }, { /* 2099 */ 277, /* PINSRQrr */ }, { /* 2100 */ 276, /* PINSRWrmi */ }, { /* 2101 */ 275, /* PINSRWrri */ }, { /* 2102 */ 30, /* PMADDUBSWrm128 */ }, { /* 2103 */ 31, /* PMADDUBSWrr128 */ }, { /* 2104 */ 30, /* PMADDWDrm */ }, { /* 2105 */ 31, /* PMADDWDrr */ }, { /* 2106 */ 30, /* PMAXSBrm */ }, { /* 2107 */ 31, /* PMAXSBrr */ }, { /* 2108 */ 30, /* PMAXSDrm */ }, { /* 2109 */ 31, /* PMAXSDrr */ }, { /* 2110 */ 30, /* PMAXSWrm */ }, { /* 2111 */ 31, /* PMAXSWrr */ }, { /* 2112 */ 30, /* PMAXUBrm */ }, { /* 2113 */ 31, /* PMAXUBrr */ }, { /* 2114 */ 30, /* PMAXUDrm */ }, { /* 2115 */ 31, /* PMAXUDrr */ }, { /* 2116 */ 30, /* PMAXUWrm */ }, { /* 2117 */ 31, /* PMAXUWrr */ }, { /* 2118 */ 30, /* PMINSBrm */ }, { /* 2119 */ 31, /* PMINSBrr */ }, { /* 2120 */ 30, /* PMINSDrm */ }, { /* 2121 */ 31, /* PMINSDrr */ }, { /* 2122 */ 30, /* PMINSWrm */ }, { /* 2123 */ 31, /* PMINSWrr */ }, { /* 2124 */ 30, /* PMINUBrm */ }, { /* 2125 */ 31, /* PMINUBrr */ }, { /* 2126 */ 30, /* PMINUDrm */ }, { /* 2127 */ 31, /* PMINUDrr */ }, { /* 2128 */ 30, /* PMINUWrm */ }, { /* 2129 */ 31, /* PMINUWrr */ }, { /* 2130 */ 110, /* PMOVMSKBrr */ }, { /* 2131 */ 105, /* PMOVSXBDrm */ }, { /* 2132 */ 45, /* PMOVSXBDrr */ }, { /* 2133 */ 105, /* PMOVSXBQrm */ }, { /* 2134 */ 45, /* PMOVSXBQrr */ }, { /* 2135 */ 105, /* PMOVSXBWrm */ }, { /* 2136 */ 45, /* PMOVSXBWrr */ }, { /* 2137 */ 105, /* PMOVSXDQrm */ }, { /* 2138 */ 45, /* PMOVSXDQrr */ }, { /* 2139 */ 105, /* PMOVSXWDrm */ }, { /* 2140 */ 45, /* PMOVSXWDrr */ }, { /* 2141 */ 105, /* PMOVSXWQrm */ }, { /* 2142 */ 45, /* PMOVSXWQrr */ }, { /* 2143 */ 105, /* PMOVZXBDrm */ }, { /* 2144 */ 45, /* PMOVZXBDrr */ }, { /* 2145 */ 105, /* PMOVZXBQrm */ }, { /* 2146 */ 45, /* PMOVZXBQrr */ }, { /* 2147 */ 105, /* PMOVZXBWrm */ }, { /* 2148 */ 45, /* PMOVZXBWrr */ }, { /* 2149 */ 105, /* PMOVZXDQrm */ }, { /* 2150 */ 45, /* PMOVZXDQrr */ }, { /* 2151 */ 105, /* PMOVZXWDrm */ }, { /* 2152 */ 45, /* PMOVZXWDrr */ }, { /* 2153 */ 105, /* PMOVZXWQrm */ }, { /* 2154 */ 45, /* PMOVZXWQrr */ }, { /* 2155 */ 30, /* PMULDQrm */ }, { /* 2156 */ 31, /* PMULDQrr */ }, { /* 2157 */ 30, /* PMULHRSWrm128 */ }, { /* 2158 */ 31, /* PMULHRSWrr128 */ }, { /* 2159 */ 214, /* PMULHRWrm */ }, { /* 2160 */ 215, /* PMULHRWrr */ }, { /* 2161 */ 30, /* PMULHUWrm */ }, { /* 2162 */ 31, /* PMULHUWrr */ }, { /* 2163 */ 30, /* PMULHWrm */ }, { /* 2164 */ 31, /* PMULHWrr */ }, { /* 2165 */ 30, /* PMULLDrm */ }, { /* 2166 */ 31, /* PMULLDrr */ }, { /* 2167 */ 30, /* PMULLWrm */ }, { /* 2168 */ 31, /* PMULLWrr */ }, { /* 2169 */ 30, /* PMULUDQrm */ }, { /* 2170 */ 31, /* PMULUDQrr */ }, { /* 2171 */ 278, /* POP16r */ }, { /* 2172 */ 38, /* POP16rmm */ }, { /* 2173 */ 77, /* POP16rmr */ }, { /* 2174 */ 278, /* POP32r */ }, { /* 2175 */ 38, /* POP32rmm */ }, { /* 2176 */ 77, /* POP32rmr */ }, { /* 2177 */ 279, /* POP64r */ }, { /* 2178 */ 38, /* POP64rmm */ }, { /* 2179 */ 79, /* POP64rmr */ }, { /* 2180 */ 0, /* POPA16 */ }, { /* 2181 */ 0, /* POPA32 */ }, { /* 2182 */ 68, /* POPCNT16rm */ }, { /* 2183 */ 69, /* POPCNT16rr */ }, { /* 2184 */ 68, /* POPCNT32rm */ }, { /* 2185 */ 69, /* POPCNT32rr */ }, { /* 2186 */ 42, /* POPCNT64rm */ }, { /* 2187 */ 43, /* POPCNT64rr */ }, { /* 2188 */ 0, /* POPDS16 */ }, { /* 2189 */ 0, /* POPDS32 */ }, { /* 2190 */ 0, /* POPES16 */ }, { /* 2191 */ 0, /* POPES32 */ }, { /* 2192 */ 0, /* POPF16 */ }, { /* 2193 */ 0, /* POPF32 */ }, { /* 2194 */ 0, /* POPF64 */ }, { /* 2195 */ 0, /* POPFS16 */ }, { /* 2196 */ 0, /* POPFS32 */ }, { /* 2197 */ 0, /* POPFS64 */ }, { /* 2198 */ 0, /* POPGS16 */ }, { /* 2199 */ 0, /* POPGS32 */ }, { /* 2200 */ 0, /* POPGS64 */ }, { /* 2201 */ 0, /* POPSS16 */ }, { /* 2202 */ 0, /* POPSS32 */ }, { /* 2203 */ 30, /* PORrm */ }, { /* 2204 */ 31, /* PORrr */ }, { /* 2205 */ 82, /* PREFETCH */ }, { /* 2206 */ 82, /* PREFETCHNTA */ }, { /* 2207 */ 82, /* PREFETCHT0 */ }, { /* 2208 */ 82, /* PREFETCHT1 */ }, { /* 2209 */ 82, /* PREFETCHT2 */ }, { /* 2210 */ 82, /* PREFETCHW */ }, { /* 2211 */ 30, /* PSADBWrm */ }, { /* 2212 */ 31, /* PSADBWrr */ }, { /* 2213 */ 30, /* PSHUFBrm */ }, { /* 2214 */ 31, /* PSHUFBrr */ }, { /* 2215 */ 46, /* PSHUFDmi */ }, { /* 2216 */ 47, /* PSHUFDri */ }, { /* 2217 */ 46, /* PSHUFHWmi */ }, { /* 2218 */ 47, /* PSHUFHWri */ }, { /* 2219 */ 46, /* PSHUFLWmi */ }, { /* 2220 */ 47, /* PSHUFLWri */ }, { /* 2221 */ 30, /* PSIGNBrm */ }, { /* 2222 */ 31, /* PSIGNBrr */ }, { /* 2223 */ 30, /* PSIGNDrm */ }, { /* 2224 */ 31, /* PSIGNDrr */ }, { /* 2225 */ 30, /* PSIGNWrm */ }, { /* 2226 */ 31, /* PSIGNWrr */ }, { /* 2227 */ 280, /* PSLLDQri */ }, { /* 2228 */ 280, /* PSLLDri */ }, { /* 2229 */ 30, /* PSLLDrm */ }, { /* 2230 */ 31, /* PSLLDrr */ }, { /* 2231 */ 280, /* PSLLQri */ }, { /* 2232 */ 30, /* PSLLQrm */ }, { /* 2233 */ 31, /* PSLLQrr */ }, { /* 2234 */ 280, /* PSLLWri */ }, { /* 2235 */ 30, /* PSLLWrm */ }, { /* 2236 */ 31, /* PSLLWrr */ }, { /* 2237 */ 280, /* PSRADri */ }, { /* 2238 */ 30, /* PSRADrm */ }, { /* 2239 */ 31, /* PSRADrr */ }, { /* 2240 */ 280, /* PSRAWri */ }, { /* 2241 */ 30, /* PSRAWrm */ }, { /* 2242 */ 31, /* PSRAWrr */ }, { /* 2243 */ 280, /* PSRLDQri */ }, { /* 2244 */ 280, /* PSRLDri */ }, { /* 2245 */ 30, /* PSRLDrm */ }, { /* 2246 */ 31, /* PSRLDrr */ }, { /* 2247 */ 280, /* PSRLQri */ }, { /* 2248 */ 30, /* PSRLQrm */ }, { /* 2249 */ 31, /* PSRLQrr */ }, { /* 2250 */ 280, /* PSRLWri */ }, { /* 2251 */ 30, /* PSRLWrm */ }, { /* 2252 */ 31, /* PSRLWrr */ }, { /* 2253 */ 30, /* PSUBBrm */ }, { /* 2254 */ 31, /* PSUBBrr */ }, { /* 2255 */ 30, /* PSUBDrm */ }, { /* 2256 */ 31, /* PSUBDrr */ }, { /* 2257 */ 30, /* PSUBQrm */ }, { /* 2258 */ 31, /* PSUBQrr */ }, { /* 2259 */ 30, /* PSUBSBrm */ }, { /* 2260 */ 31, /* PSUBSBrr */ }, { /* 2261 */ 30, /* PSUBSWrm */ }, { /* 2262 */ 31, /* PSUBSWrr */ }, { /* 2263 */ 30, /* PSUBUSBrm */ }, { /* 2264 */ 31, /* PSUBUSBrr */ }, { /* 2265 */ 30, /* PSUBUSWrm */ }, { /* 2266 */ 31, /* PSUBUSWrr */ }, { /* 2267 */ 30, /* PSUBWrm */ }, { /* 2268 */ 31, /* PSUBWrr */ }, { /* 2269 */ 210, /* PSWAPDrm */ }, { /* 2270 */ 206, /* PSWAPDrr */ }, { /* 2271 */ 44, /* PTESTrm */ }, { /* 2272 */ 45, /* PTESTrr */ }, { /* 2273 */ 30, /* PUNPCKHBWrm */ }, { /* 2274 */ 31, /* PUNPCKHBWrr */ }, { /* 2275 */ 30, /* PUNPCKHDQrm */ }, { /* 2276 */ 31, /* PUNPCKHDQrr */ }, { /* 2277 */ 30, /* PUNPCKHQDQrm */ }, { /* 2278 */ 31, /* PUNPCKHQDQrr */ }, { /* 2279 */ 30, /* PUNPCKHWDrm */ }, { /* 2280 */ 31, /* PUNPCKHWDrr */ }, { /* 2281 */ 30, /* PUNPCKLBWrm */ }, { /* 2282 */ 31, /* PUNPCKLBWrr */ }, { /* 2283 */ 30, /* PUNPCKLDQrm */ }, { /* 2284 */ 31, /* PUNPCKLDQrr */ }, { /* 2285 */ 30, /* PUNPCKLQDQrm */ }, { /* 2286 */ 31, /* PUNPCKLQDQrr */ }, { /* 2287 */ 30, /* PUNPCKLWDrm */ }, { /* 2288 */ 31, /* PUNPCKLWDrr */ }, { /* 2289 */ 281, /* PUSH16i8 */ }, { /* 2290 */ 278, /* PUSH16r */ }, { /* 2291 */ 38, /* PUSH16rmm */ }, { /* 2292 */ 77, /* PUSH16rmr */ }, { /* 2293 */ 282, /* PUSH32i8 */ }, { /* 2294 */ 278, /* PUSH32r */ }, { /* 2295 */ 38, /* PUSH32rmm */ }, { /* 2296 */ 77, /* PUSH32rmr */ }, { /* 2297 */ 2, /* PUSH64i16 */ }, { /* 2298 */ 13, /* PUSH64i32 */ }, { /* 2299 */ 283, /* PUSH64i8 */ }, { /* 2300 */ 279, /* PUSH64r */ }, { /* 2301 */ 38, /* PUSH64rmm */ }, { /* 2302 */ 79, /* PUSH64rmr */ }, { /* 2303 */ 0, /* PUSHA16 */ }, { /* 2304 */ 0, /* PUSHA32 */ }, { /* 2305 */ 0, /* PUSHCS16 */ }, { /* 2306 */ 0, /* PUSHCS32 */ }, { /* 2307 */ 0, /* PUSHDS16 */ }, { /* 2308 */ 0, /* PUSHDS32 */ }, { /* 2309 */ 0, /* PUSHES16 */ }, { /* 2310 */ 0, /* PUSHES32 */ }, { /* 2311 */ 0, /* PUSHF16 */ }, { /* 2312 */ 0, /* PUSHF32 */ }, { /* 2313 */ 0, /* PUSHF64 */ }, { /* 2314 */ 0, /* PUSHFS16 */ }, { /* 2315 */ 0, /* PUSHFS32 */ }, { /* 2316 */ 0, /* PUSHFS64 */ }, { /* 2317 */ 0, /* PUSHGS16 */ }, { /* 2318 */ 0, /* PUSHGS32 */ }, { /* 2319 */ 0, /* PUSHGS64 */ }, { /* 2320 */ 0, /* PUSHSS16 */ }, { /* 2321 */ 0, /* PUSHSS32 */ }, { /* 2322 */ 2, /* PUSHi16 */ }, { /* 2323 */ 2, /* PUSHi32 */ }, { /* 2324 */ 30, /* PXORrm */ }, { /* 2325 */ 31, /* PXORrr */ }, { /* 2326 */ 38, /* RCL16m1 */ }, { /* 2327 */ 38, /* RCL16mCL */ }, { /* 2328 */ 284, /* RCL16mi */ }, { /* 2329 */ 127, /* RCL16r1 */ }, { /* 2330 */ 127, /* RCL16rCL */ }, { /* 2331 */ 285, /* RCL16ri */ }, { /* 2332 */ 38, /* RCL32m1 */ }, { /* 2333 */ 38, /* RCL32mCL */ }, { /* 2334 */ 284, /* RCL32mi */ }, { /* 2335 */ 127, /* RCL32r1 */ }, { /* 2336 */ 127, /* RCL32rCL */ }, { /* 2337 */ 285, /* RCL32ri */ }, { /* 2338 */ 38, /* RCL64m1 */ }, { /* 2339 */ 38, /* RCL64mCL */ }, { /* 2340 */ 284, /* RCL64mi */ }, { /* 2341 */ 128, /* RCL64r1 */ }, { /* 2342 */ 128, /* RCL64rCL */ }, { /* 2343 */ 286, /* RCL64ri */ }, { /* 2344 */ 82, /* RCL8m1 */ }, { /* 2345 */ 82, /* RCL8mCL */ }, { /* 2346 */ 22, /* RCL8mi */ }, { /* 2347 */ 129, /* RCL8r1 */ }, { /* 2348 */ 129, /* RCL8rCL */ }, { /* 2349 */ 24, /* RCL8ri */ }, { /* 2350 */ 44, /* RCPPSm */ }, { /* 2351 */ 0, /* */ }, { /* 2352 */ 45, /* RCPPSr */ }, { /* 2353 */ 0, /* */ }, { /* 2354 */ 261, /* RCPSSm */ }, { /* 2355 */ 0, /* */ }, { /* 2356 */ 287, /* RCPSSr */ }, { /* 2357 */ 0, /* */ }, { /* 2358 */ 38, /* RCR16m1 */ }, { /* 2359 */ 38, /* RCR16mCL */ }, { /* 2360 */ 284, /* RCR16mi */ }, { /* 2361 */ 127, /* RCR16r1 */ }, { /* 2362 */ 127, /* RCR16rCL */ }, { /* 2363 */ 285, /* RCR16ri */ }, { /* 2364 */ 38, /* RCR32m1 */ }, { /* 2365 */ 38, /* RCR32mCL */ }, { /* 2366 */ 284, /* RCR32mi */ }, { /* 2367 */ 127, /* RCR32r1 */ }, { /* 2368 */ 127, /* RCR32rCL */ }, { /* 2369 */ 285, /* RCR32ri */ }, { /* 2370 */ 38, /* RCR64m1 */ }, { /* 2371 */ 38, /* RCR64mCL */ }, { /* 2372 */ 284, /* RCR64mi */ }, { /* 2373 */ 128, /* RCR64r1 */ }, { /* 2374 */ 128, /* RCR64rCL */ }, { /* 2375 */ 286, /* RCR64ri */ }, { /* 2376 */ 82, /* RCR8m1 */ }, { /* 2377 */ 82, /* RCR8mCL */ }, { /* 2378 */ 22, /* RCR8mi */ }, { /* 2379 */ 129, /* RCR8r1 */ }, { /* 2380 */ 129, /* RCR8rCL */ }, { /* 2381 */ 24, /* RCR8ri */ }, { /* 2382 */ 288, /* RDFSBASE */ }, { /* 2383 */ 79, /* RDFSBASE64 */ }, { /* 2384 */ 288, /* RDGSBASE */ }, { /* 2385 */ 79, /* RDGSBASE64 */ }, { /* 2386 */ 0, /* RDMSR */ }, { /* 2387 */ 0, /* RDPMC */ }, { /* 2388 */ 77, /* RDRAND16r */ }, { /* 2389 */ 77, /* RDRAND32r */ }, { /* 2390 */ 79, /* RDRAND64r */ }, { /* 2391 */ 77, /* RDSEED16r */ }, { /* 2392 */ 77, /* RDSEED32r */ }, { /* 2393 */ 79, /* RDSEED64r */ }, { /* 2394 */ 0, /* RDTSC */ }, { /* 2395 */ 0, /* RDTSCP */ }, { /* 2396 */ 0, /* */ }, { /* 2397 */ 0, /* */ }, { /* 2398 */ 0, /* */ }, { /* 2399 */ 0, /* */ }, { /* 2400 */ 0, /* */ }, { /* 2401 */ 0, /* */ }, { /* 2402 */ 0, /* */ }, { /* 2403 */ 0, /* */ }, { /* 2404 */ 0, /* */ }, { /* 2405 */ 0, /* */ }, { /* 2406 */ 0, /* */ }, { /* 2407 */ 0, /* */ }, { /* 2408 */ 0, /* */ }, { /* 2409 */ 0, /* */ }, { /* 2410 */ 0, /* */ }, { /* 2411 */ 0, /* */ }, { /* 2412 */ 0, /* */ }, { /* 2413 */ 0, /* */ }, { /* 2414 */ 0, /* */ }, { /* 2415 */ 0, /* */ }, { /* 2416 */ 0, /* */ }, { /* 2417 */ 0, /* */ }, { /* 2418 */ 0, /* */ }, { /* 2419 */ 0, /* */ }, { /* 2420 */ 0, /* */ }, { /* 2421 */ 0, /* */ }, { /* 2422 */ 0, /* */ }, { /* 2423 */ 0, /* */ }, { /* 2424 */ 0, /* REPNE_PREFIX */ }, { /* 2425 */ 0, /* */ }, { /* 2426 */ 0, /* */ }, { /* 2427 */ 0, /* */ }, { /* 2428 */ 0, /* */ }, { /* 2429 */ 0, /* */ }, { /* 2430 */ 0, /* */ }, { /* 2431 */ 0, /* */ }, { /* 2432 */ 0, /* REP_PREFIX */ }, { /* 2433 */ 0, /* */ }, { /* 2434 */ 0, /* */ }, { /* 2435 */ 0, /* */ }, { /* 2436 */ 0, /* */ }, { /* 2437 */ 0, /* */ }, { /* 2438 */ 0, /* */ }, { /* 2439 */ 0, /* */ }, { /* 2440 */ 199, /* RETIL */ }, { /* 2441 */ 199, /* RETIQ */ }, { /* 2442 */ 2, /* RETIW */ }, { /* 2443 */ 0, /* RETL */ }, { /* 2444 */ 0, /* RETQ */ }, { /* 2445 */ 0, /* RETW */ }, { /* 2446 */ 0, /* REX64_PREFIX */ }, { /* 2447 */ 38, /* ROL16m1 */ }, { /* 2448 */ 38, /* ROL16mCL */ }, { /* 2449 */ 284, /* ROL16mi */ }, { /* 2450 */ 127, /* ROL16r1 */ }, { /* 2451 */ 127, /* ROL16rCL */ }, { /* 2452 */ 285, /* ROL16ri */ }, { /* 2453 */ 38, /* ROL32m1 */ }, { /* 2454 */ 38, /* ROL32mCL */ }, { /* 2455 */ 284, /* ROL32mi */ }, { /* 2456 */ 127, /* ROL32r1 */ }, { /* 2457 */ 127, /* ROL32rCL */ }, { /* 2458 */ 285, /* ROL32ri */ }, { /* 2459 */ 38, /* ROL64m1 */ }, { /* 2460 */ 38, /* ROL64mCL */ }, { /* 2461 */ 284, /* ROL64mi */ }, { /* 2462 */ 128, /* ROL64r1 */ }, { /* 2463 */ 128, /* ROL64rCL */ }, { /* 2464 */ 286, /* ROL64ri */ }, { /* 2465 */ 82, /* ROL8m1 */ }, { /* 2466 */ 82, /* ROL8mCL */ }, { /* 2467 */ 22, /* ROL8mi */ }, { /* 2468 */ 129, /* ROL8r1 */ }, { /* 2469 */ 129, /* ROL8rCL */ }, { /* 2470 */ 24, /* ROL8ri */ }, { /* 2471 */ 38, /* ROR16m1 */ }, { /* 2472 */ 38, /* ROR16mCL */ }, { /* 2473 */ 284, /* ROR16mi */ }, { /* 2474 */ 127, /* ROR16r1 */ }, { /* 2475 */ 127, /* ROR16rCL */ }, { /* 2476 */ 285, /* ROR16ri */ }, { /* 2477 */ 38, /* ROR32m1 */ }, { /* 2478 */ 38, /* ROR32mCL */ }, { /* 2479 */ 284, /* ROR32mi */ }, { /* 2480 */ 127, /* ROR32r1 */ }, { /* 2481 */ 127, /* ROR32rCL */ }, { /* 2482 */ 285, /* ROR32ri */ }, { /* 2483 */ 38, /* ROR64m1 */ }, { /* 2484 */ 38, /* ROR64mCL */ }, { /* 2485 */ 284, /* ROR64mi */ }, { /* 2486 */ 128, /* ROR64r1 */ }, { /* 2487 */ 128, /* ROR64rCL */ }, { /* 2488 */ 286, /* ROR64ri */ }, { /* 2489 */ 82, /* ROR8m1 */ }, { /* 2490 */ 82, /* ROR8mCL */ }, { /* 2491 */ 22, /* ROR8mi */ }, { /* 2492 */ 129, /* ROR8r1 */ }, { /* 2493 */ 129, /* ROR8rCL */ }, { /* 2494 */ 24, /* ROR8ri */ }, { /* 2495 */ 289, /* RORX32mi */ }, { /* 2496 */ 290, /* RORX32ri */ }, { /* 2497 */ 291, /* RORX64mi */ }, { /* 2498 */ 292, /* RORX64ri */ }, { /* 2499 */ 46, /* ROUNDPDm */ }, { /* 2500 */ 47, /* ROUNDPDr */ }, { /* 2501 */ 46, /* ROUNDPSm */ }, { /* 2502 */ 47, /* ROUNDPSr */ }, { /* 2503 */ 293, /* ROUNDSDm */ }, { /* 2504 */ 294, /* ROUNDSDr */ }, { /* 2505 */ 0, /* */ }, { /* 2506 */ 150, /* ROUNDSSm */ }, { /* 2507 */ 295, /* ROUNDSSr */ }, { /* 2508 */ 0, /* */ }, { /* 2509 */ 0, /* RSM */ }, { /* 2510 */ 44, /* RSQRTPSm */ }, { /* 2511 */ 0, /* */ }, { /* 2512 */ 45, /* RSQRTPSr */ }, { /* 2513 */ 0, /* */ }, { /* 2514 */ 261, /* RSQRTSSm */ }, { /* 2515 */ 0, /* */ }, { /* 2516 */ 287, /* RSQRTSSr */ }, { /* 2517 */ 0, /* */ }, { /* 2518 */ 0, /* SAHF */ }, { /* 2519 */ 38, /* SAL16m1 */ }, { /* 2520 */ 38, /* SAL16mCL */ }, { /* 2521 */ 284, /* SAL16mi */ }, { /* 2522 */ 127, /* SAL16r1 */ }, { /* 2523 */ 127, /* SAL16rCL */ }, { /* 2524 */ 285, /* SAL16ri */ }, { /* 2525 */ 38, /* SAL32m1 */ }, { /* 2526 */ 38, /* SAL32mCL */ }, { /* 2527 */ 284, /* SAL32mi */ }, { /* 2528 */ 127, /* SAL32r1 */ }, { /* 2529 */ 127, /* SAL32rCL */ }, { /* 2530 */ 285, /* SAL32ri */ }, { /* 2531 */ 38, /* SAL64m1 */ }, { /* 2532 */ 38, /* SAL64mCL */ }, { /* 2533 */ 284, /* SAL64mi */ }, { /* 2534 */ 128, /* SAL64r1 */ }, { /* 2535 */ 128, /* SAL64rCL */ }, { /* 2536 */ 286, /* SAL64ri */ }, { /* 2537 */ 82, /* SAL8m1 */ }, { /* 2538 */ 82, /* SAL8mCL */ }, { /* 2539 */ 22, /* SAL8mi */ }, { /* 2540 */ 129, /* SAL8r1 */ }, { /* 2541 */ 129, /* SAL8rCL */ }, { /* 2542 */ 24, /* SAL8ri */ }, { /* 2543 */ 0, /* SALC */ }, { /* 2544 */ 38, /* SAR16m1 */ }, { /* 2545 */ 38, /* SAR16mCL */ }, { /* 2546 */ 284, /* SAR16mi */ }, { /* 2547 */ 127, /* SAR16r1 */ }, { /* 2548 */ 127, /* SAR16rCL */ }, { /* 2549 */ 285, /* SAR16ri */ }, { /* 2550 */ 38, /* SAR32m1 */ }, { /* 2551 */ 38, /* SAR32mCL */ }, { /* 2552 */ 284, /* SAR32mi */ }, { /* 2553 */ 127, /* SAR32r1 */ }, { /* 2554 */ 127, /* SAR32rCL */ }, { /* 2555 */ 285, /* SAR32ri */ }, { /* 2556 */ 38, /* SAR64m1 */ }, { /* 2557 */ 38, /* SAR64mCL */ }, { /* 2558 */ 284, /* SAR64mi */ }, { /* 2559 */ 128, /* SAR64r1 */ }, { /* 2560 */ 128, /* SAR64rCL */ }, { /* 2561 */ 286, /* SAR64ri */ }, { /* 2562 */ 82, /* SAR8m1 */ }, { /* 2563 */ 82, /* SAR8mCL */ }, { /* 2564 */ 22, /* SAR8mi */ }, { /* 2565 */ 129, /* SAR8r1 */ }, { /* 2566 */ 129, /* SAR8rCL */ }, { /* 2567 */ 24, /* SAR8ri */ }, { /* 2568 */ 54, /* SARX32rm */ }, { /* 2569 */ 55, /* SARX32rr */ }, { /* 2570 */ 56, /* SARX64rm */ }, { /* 2571 */ 57, /* SARX64rr */ }, { /* 2572 */ 2, /* SBB16i16 */ }, { /* 2573 */ 3, /* SBB16mi */ }, { /* 2574 */ 4, /* SBB16mi8 */ }, { /* 2575 */ 5, /* SBB16mr */ }, { /* 2576 */ 6, /* SBB16ri */ }, { /* 2577 */ 7, /* SBB16ri8 */ }, { /* 2578 */ 8, /* SBB16rm */ }, { /* 2579 */ 9, /* SBB16rr */ }, { /* 2580 */ 10, /* SBB16rr_REV */ }, { /* 2581 */ 2, /* SBB32i32 */ }, { /* 2582 */ 3, /* SBB32mi */ }, { /* 2583 */ 11, /* SBB32mi8 */ }, { /* 2584 */ 5, /* SBB32mr */ }, { /* 2585 */ 6, /* SBB32ri */ }, { /* 2586 */ 12, /* SBB32ri8 */ }, { /* 2587 */ 8, /* SBB32rm */ }, { /* 2588 */ 9, /* SBB32rr */ }, { /* 2589 */ 10, /* SBB32rr_REV */ }, { /* 2590 */ 13, /* SBB64i32 */ }, { /* 2591 */ 14, /* SBB64mi32 */ }, { /* 2592 */ 15, /* SBB64mi8 */ }, { /* 2593 */ 16, /* SBB64mr */ }, { /* 2594 */ 17, /* SBB64ri32 */ }, { /* 2595 */ 18, /* SBB64ri8 */ }, { /* 2596 */ 19, /* SBB64rm */ }, { /* 2597 */ 20, /* SBB64rr */ }, { /* 2598 */ 21, /* SBB64rr_REV */ }, { /* 2599 */ 1, /* SBB8i8 */ }, { /* 2600 */ 22, /* SBB8mi */ }, { /* 2601 */ 22, /* SBB8mi8 */ }, { /* 2602 */ 23, /* SBB8mr */ }, { /* 2603 */ 24, /* SBB8ri */ }, { /* 2604 */ 24, /* SBB8ri8 */ }, { /* 2605 */ 25, /* SBB8rm */ }, { /* 2606 */ 26, /* SBB8rr */ }, { /* 2607 */ 27, /* SBB8rr_REV */ }, { /* 2608 */ 149, /* SCASB */ }, { /* 2609 */ 152, /* SCASL */ }, { /* 2610 */ 296, /* SCASQ */ }, { /* 2611 */ 153, /* SCASW */ }, { /* 2612 */ 0, /* */ }, { /* 2613 */ 0, /* */ }, { /* 2614 */ 0, /* */ }, { /* 2615 */ 0, /* */ }, { /* 2616 */ 0, /* */ }, { /* 2617 */ 0, /* */ }, { /* 2618 */ 0, /* */ }, { /* 2619 */ 0, /* */ }, { /* 2620 */ 0, /* */ }, { /* 2621 */ 0, /* */ }, { /* 2622 */ 82, /* SETAEm */ }, { /* 2623 */ 130, /* SETAEr */ }, { /* 2624 */ 82, /* SETAm */ }, { /* 2625 */ 130, /* SETAr */ }, { /* 2626 */ 82, /* SETBEm */ }, { /* 2627 */ 130, /* SETBEr */ }, { /* 2628 */ 0, /* */ }, { /* 2629 */ 0, /* */ }, { /* 2630 */ 0, /* */ }, { /* 2631 */ 0, /* */ }, { /* 2632 */ 82, /* SETBm */ }, { /* 2633 */ 130, /* SETBr */ }, { /* 2634 */ 82, /* SETEm */ }, { /* 2635 */ 130, /* SETEr */ }, { /* 2636 */ 82, /* SETGEm */ }, { /* 2637 */ 130, /* SETGEr */ }, { /* 2638 */ 82, /* SETGm */ }, { /* 2639 */ 130, /* SETGr */ }, { /* 2640 */ 82, /* SETLEm */ }, { /* 2641 */ 130, /* SETLEr */ }, { /* 2642 */ 82, /* SETLm */ }, { /* 2643 */ 130, /* SETLr */ }, { /* 2644 */ 82, /* SETNEm */ }, { /* 2645 */ 130, /* SETNEr */ }, { /* 2646 */ 82, /* SETNOm */ }, { /* 2647 */ 130, /* SETNOr */ }, { /* 2648 */ 82, /* SETNPm */ }, { /* 2649 */ 130, /* SETNPr */ }, { /* 2650 */ 82, /* SETNSm */ }, { /* 2651 */ 130, /* SETNSr */ }, { /* 2652 */ 82, /* SETOm */ }, { /* 2653 */ 130, /* SETOr */ }, { /* 2654 */ 82, /* SETPm */ }, { /* 2655 */ 130, /* SETPr */ }, { /* 2656 */ 82, /* SETSm */ }, { /* 2657 */ 130, /* SETSr */ }, { /* 2658 */ 0, /* SFENCE */ }, { /* 2659 */ 138, /* SGDT16m */ }, { /* 2660 */ 138, /* SGDT32m */ }, { /* 2661 */ 139, /* SGDT64m */ }, { /* 2662 */ 30, /* SHA1MSG1rm */ }, { /* 2663 */ 31, /* SHA1MSG1rr */ }, { /* 2664 */ 30, /* SHA1MSG2rm */ }, { /* 2665 */ 31, /* SHA1MSG2rr */ }, { /* 2666 */ 30, /* SHA1NEXTErm */ }, { /* 2667 */ 31, /* SHA1NEXTErr */ }, { /* 2668 */ 66, /* SHA1RNDS4rmi */ }, { /* 2669 */ 67, /* SHA1RNDS4rri */ }, { /* 2670 */ 30, /* SHA256MSG1rm */ }, { /* 2671 */ 31, /* SHA256MSG1rr */ }, { /* 2672 */ 30, /* SHA256MSG2rm */ }, { /* 2673 */ 31, /* SHA256MSG2rr */ }, { /* 2674 */ 30, /* SHA256RNDS2rm */ }, { /* 2675 */ 31, /* SHA256RNDS2rr */ }, { /* 2676 */ 38, /* SHL16m1 */ }, { /* 2677 */ 38, /* SHL16mCL */ }, { /* 2678 */ 284, /* SHL16mi */ }, { /* 2679 */ 127, /* SHL16r1 */ }, { /* 2680 */ 127, /* SHL16rCL */ }, { /* 2681 */ 285, /* SHL16ri */ }, { /* 2682 */ 38, /* SHL32m1 */ }, { /* 2683 */ 38, /* SHL32mCL */ }, { /* 2684 */ 284, /* SHL32mi */ }, { /* 2685 */ 127, /* SHL32r1 */ }, { /* 2686 */ 127, /* SHL32rCL */ }, { /* 2687 */ 285, /* SHL32ri */ }, { /* 2688 */ 38, /* SHL64m1 */ }, { /* 2689 */ 38, /* SHL64mCL */ }, { /* 2690 */ 284, /* SHL64mi */ }, { /* 2691 */ 128, /* SHL64r1 */ }, { /* 2692 */ 128, /* SHL64rCL */ }, { /* 2693 */ 286, /* SHL64ri */ }, { /* 2694 */ 82, /* SHL8m1 */ }, { /* 2695 */ 82, /* SHL8mCL */ }, { /* 2696 */ 22, /* SHL8mi */ }, { /* 2697 */ 129, /* SHL8r1 */ }, { /* 2698 */ 129, /* SHL8rCL */ }, { /* 2699 */ 24, /* SHL8ri */ }, { /* 2700 */ 5, /* SHLD16mrCL */ }, { /* 2701 */ 297, /* SHLD16mri8 */ }, { /* 2702 */ 9, /* SHLD16rrCL */ }, { /* 2703 */ 298, /* SHLD16rri8 */ }, { /* 2704 */ 5, /* SHLD32mrCL */ }, { /* 2705 */ 297, /* SHLD32mri8 */ }, { /* 2706 */ 9, /* SHLD32rrCL */ }, { /* 2707 */ 298, /* SHLD32rri8 */ }, { /* 2708 */ 16, /* SHLD64mrCL */ }, { /* 2709 */ 299, /* SHLD64mri8 */ }, { /* 2710 */ 20, /* SHLD64rrCL */ }, { /* 2711 */ 300, /* SHLD64rri8 */ }, { /* 2712 */ 54, /* SHLX32rm */ }, { /* 2713 */ 55, /* SHLX32rr */ }, { /* 2714 */ 56, /* SHLX64rm */ }, { /* 2715 */ 57, /* SHLX64rr */ }, { /* 2716 */ 38, /* SHR16m1 */ }, { /* 2717 */ 38, /* SHR16mCL */ }, { /* 2718 */ 284, /* SHR16mi */ }, { /* 2719 */ 127, /* SHR16r1 */ }, { /* 2720 */ 127, /* SHR16rCL */ }, { /* 2721 */ 285, /* SHR16ri */ }, { /* 2722 */ 38, /* SHR32m1 */ }, { /* 2723 */ 38, /* SHR32mCL */ }, { /* 2724 */ 284, /* SHR32mi */ }, { /* 2725 */ 127, /* SHR32r1 */ }, { /* 2726 */ 127, /* SHR32rCL */ }, { /* 2727 */ 285, /* SHR32ri */ }, { /* 2728 */ 38, /* SHR64m1 */ }, { /* 2729 */ 38, /* SHR64mCL */ }, { /* 2730 */ 284, /* SHR64mi */ }, { /* 2731 */ 128, /* SHR64r1 */ }, { /* 2732 */ 128, /* SHR64rCL */ }, { /* 2733 */ 286, /* SHR64ri */ }, { /* 2734 */ 82, /* SHR8m1 */ }, { /* 2735 */ 82, /* SHR8mCL */ }, { /* 2736 */ 22, /* SHR8mi */ }, { /* 2737 */ 129, /* SHR8r1 */ }, { /* 2738 */ 129, /* SHR8rCL */ }, { /* 2739 */ 24, /* SHR8ri */ }, { /* 2740 */ 5, /* SHRD16mrCL */ }, { /* 2741 */ 297, /* SHRD16mri8 */ }, { /* 2742 */ 9, /* SHRD16rrCL */ }, { /* 2743 */ 298, /* SHRD16rri8 */ }, { /* 2744 */ 5, /* SHRD32mrCL */ }, { /* 2745 */ 297, /* SHRD32mri8 */ }, { /* 2746 */ 9, /* SHRD32rrCL */ }, { /* 2747 */ 298, /* SHRD32rri8 */ }, { /* 2748 */ 16, /* SHRD64mrCL */ }, { /* 2749 */ 299, /* SHRD64mri8 */ }, { /* 2750 */ 20, /* SHRD64rrCL */ }, { /* 2751 */ 300, /* SHRD64rri8 */ }, { /* 2752 */ 54, /* SHRX32rm */ }, { /* 2753 */ 55, /* SHRX32rr */ }, { /* 2754 */ 56, /* SHRX64rm */ }, { /* 2755 */ 57, /* SHRX64rr */ }, { /* 2756 */ 66, /* SHUFPDrmi */ }, { /* 2757 */ 67, /* SHUFPDrri */ }, { /* 2758 */ 66, /* SHUFPSrmi */ }, { /* 2759 */ 67, /* SHUFPSrri */ }, { /* 2760 */ 138, /* SIDT16m */ }, { /* 2761 */ 138, /* SIDT32m */ }, { /* 2762 */ 139, /* SIDT64m */ }, { /* 2763 */ 0, /* SIN_F */ }, { /* 2764 */ 0, /* */ }, { /* 2765 */ 0, /* */ }, { /* 2766 */ 0, /* */ }, { /* 2767 */ 0, /* SKINIT */ }, { /* 2768 */ 38, /* SLDT16m */ }, { /* 2769 */ 77, /* SLDT16r */ }, { /* 2770 */ 77, /* SLDT32r */ }, { /* 2771 */ 38, /* SLDT64m */ }, { /* 2772 */ 79, /* SLDT64r */ }, { /* 2773 */ 38, /* SMSW16m */ }, { /* 2774 */ 77, /* SMSW16r */ }, { /* 2775 */ 77, /* SMSW32r */ }, { /* 2776 */ 79, /* SMSW64r */ }, { /* 2777 */ 44, /* SQRTPDm */ }, { /* 2778 */ 45, /* SQRTPDr */ }, { /* 2779 */ 44, /* SQRTPSm */ }, { /* 2780 */ 45, /* SQRTPSr */ }, { /* 2781 */ 257, /* SQRTSDm */ }, { /* 2782 */ 0, /* */ }, { /* 2783 */ 301, /* SQRTSDr */ }, { /* 2784 */ 0, /* */ }, { /* 2785 */ 261, /* SQRTSSm */ }, { /* 2786 */ 0, /* */ }, { /* 2787 */ 287, /* SQRTSSr */ }, { /* 2788 */ 0, /* */ }, { /* 2789 */ 0, /* SQRT_F */ }, { /* 2790 */ 0, /* */ }, { /* 2791 */ 0, /* */ }, { /* 2792 */ 0, /* */ }, { /* 2793 */ 0, /* STAC */ }, { /* 2794 */ 0, /* STC */ }, { /* 2795 */ 0, /* STD */ }, { /* 2796 */ 0, /* STGI */ }, { /* 2797 */ 0, /* STI */ }, { /* 2798 */ 38, /* STMXCSR */ }, { /* 2799 */ 149, /* STOSB */ }, { /* 2800 */ 152, /* STOSL */ }, { /* 2801 */ 296, /* STOSQ */ }, { /* 2802 */ 153, /* STOSW */ }, { /* 2803 */ 77, /* STR16r */ }, { /* 2804 */ 77, /* STR32r */ }, { /* 2805 */ 79, /* STR64r */ }, { /* 2806 */ 38, /* STRm */ }, { /* 2807 */ 36, /* ST_F32m */ }, { /* 2808 */ 37, /* ST_F64m */ }, { /* 2809 */ 39, /* ST_FCOMPST0r */ }, { /* 2810 */ 39, /* ST_FCOMPST0r_alt */ }, { /* 2811 */ 39, /* ST_FCOMST0r */ }, { /* 2812 */ 36, /* ST_FP32m */ }, { /* 2813 */ 37, /* ST_FP64m */ }, { /* 2814 */ 189, /* ST_FP80m */ }, { /* 2815 */ 39, /* ST_FPNCEST0r */ }, { /* 2816 */ 39, /* ST_FPST0r */ }, { /* 2817 */ 39, /* ST_FPST0r_alt */ }, { /* 2818 */ 39, /* ST_FPrr */ }, { /* 2819 */ 39, /* ST_FXCHST0r */ }, { /* 2820 */ 39, /* ST_FXCHST0r_alt */ }, { /* 2821 */ 0, /* */ }, { /* 2822 */ 0, /* */ }, { /* 2823 */ 0, /* */ }, { /* 2824 */ 0, /* */ }, { /* 2825 */ 0, /* */ }, { /* 2826 */ 0, /* */ }, { /* 2827 */ 0, /* */ }, { /* 2828 */ 0, /* */ }, { /* 2829 */ 0, /* */ }, { /* 2830 */ 0, /* */ }, { /* 2831 */ 0, /* */ }, { /* 2832 */ 39, /* ST_Frr */ }, { /* 2833 */ 2, /* SUB16i16 */ }, { /* 2834 */ 3, /* SUB16mi */ }, { /* 2835 */ 4, /* SUB16mi8 */ }, { /* 2836 */ 5, /* SUB16mr */ }, { /* 2837 */ 6, /* SUB16ri */ }, { /* 2838 */ 7, /* SUB16ri8 */ }, { /* 2839 */ 8, /* SUB16rm */ }, { /* 2840 */ 9, /* SUB16rr */ }, { /* 2841 */ 10, /* SUB16rr_REV */ }, { /* 2842 */ 2, /* SUB32i32 */ }, { /* 2843 */ 3, /* SUB32mi */ }, { /* 2844 */ 11, /* SUB32mi8 */ }, { /* 2845 */ 5, /* SUB32mr */ }, { /* 2846 */ 6, /* SUB32ri */ }, { /* 2847 */ 12, /* SUB32ri8 */ }, { /* 2848 */ 8, /* SUB32rm */ }, { /* 2849 */ 9, /* SUB32rr */ }, { /* 2850 */ 10, /* SUB32rr_REV */ }, { /* 2851 */ 13, /* SUB64i32 */ }, { /* 2852 */ 14, /* SUB64mi32 */ }, { /* 2853 */ 15, /* SUB64mi8 */ }, { /* 2854 */ 16, /* SUB64mr */ }, { /* 2855 */ 17, /* SUB64ri32 */ }, { /* 2856 */ 18, /* SUB64ri8 */ }, { /* 2857 */ 19, /* SUB64rm */ }, { /* 2858 */ 20, /* SUB64rr */ }, { /* 2859 */ 21, /* SUB64rr_REV */ }, { /* 2860 */ 1, /* SUB8i8 */ }, { /* 2861 */ 22, /* SUB8mi */ }, { /* 2862 */ 22, /* SUB8mi8 */ }, { /* 2863 */ 23, /* SUB8mr */ }, { /* 2864 */ 24, /* SUB8ri */ }, { /* 2865 */ 24, /* SUB8ri8 */ }, { /* 2866 */ 25, /* SUB8rm */ }, { /* 2867 */ 26, /* SUB8rr */ }, { /* 2868 */ 27, /* SUB8rr_REV */ }, { /* 2869 */ 30, /* SUBPDrm */ }, { /* 2870 */ 31, /* SUBPDrr */ }, { /* 2871 */ 30, /* SUBPSrm */ }, { /* 2872 */ 31, /* SUBPSrr */ }, { /* 2873 */ 36, /* SUBR_F32m */ }, { /* 2874 */ 37, /* SUBR_F64m */ }, { /* 2875 */ 38, /* SUBR_FI16m */ }, { /* 2876 */ 38, /* SUBR_FI32m */ }, { /* 2877 */ 39, /* SUBR_FPrST0 */ }, { /* 2878 */ 39, /* SUBR_FST0r */ }, { /* 2879 */ 0, /* */ }, { /* 2880 */ 0, /* */ }, { /* 2881 */ 0, /* */ }, { /* 2882 */ 0, /* */ }, { /* 2883 */ 0, /* */ }, { /* 2884 */ 0, /* */ }, { /* 2885 */ 0, /* */ }, { /* 2886 */ 0, /* */ }, { /* 2887 */ 0, /* */ }, { /* 2888 */ 0, /* */ }, { /* 2889 */ 0, /* */ }, { /* 2890 */ 39, /* SUBR_FrST0 */ }, { /* 2891 */ 32, /* SUBSDrm */ }, { /* 2892 */ 0, /* */ }, { /* 2893 */ 33, /* SUBSDrr */ }, { /* 2894 */ 0, /* */ }, { /* 2895 */ 34, /* SUBSSrm */ }, { /* 2896 */ 0, /* */ }, { /* 2897 */ 35, /* SUBSSrr */ }, { /* 2898 */ 0, /* */ }, { /* 2899 */ 36, /* SUB_F32m */ }, { /* 2900 */ 37, /* SUB_F64m */ }, { /* 2901 */ 38, /* SUB_FI16m */ }, { /* 2902 */ 38, /* SUB_FI32m */ }, { /* 2903 */ 39, /* SUB_FPrST0 */ }, { /* 2904 */ 39, /* SUB_FST0r */ }, { /* 2905 */ 0, /* */ }, { /* 2906 */ 0, /* */ }, { /* 2907 */ 0, /* */ }, { /* 2908 */ 0, /* */ }, { /* 2909 */ 0, /* */ }, { /* 2910 */ 0, /* */ }, { /* 2911 */ 0, /* */ }, { /* 2912 */ 0, /* */ }, { /* 2913 */ 0, /* */ }, { /* 2914 */ 0, /* */ }, { /* 2915 */ 0, /* */ }, { /* 2916 */ 0, /* */ }, { /* 2917 */ 0, /* */ }, { /* 2918 */ 0, /* */ }, { /* 2919 */ 39, /* SUB_FrST0 */ }, { /* 2920 */ 0, /* SWAPGS */ }, { /* 2921 */ 0, /* SYSCALL */ }, { /* 2922 */ 0, /* SYSENTER */ }, { /* 2923 */ 0, /* SYSEXIT */ }, { /* 2924 */ 0, /* SYSEXIT64 */ }, { /* 2925 */ 0, /* SYSRET */ }, { /* 2926 */ 0, /* SYSRET64 */ }, { /* 2927 */ 62, /* T1MSKC32rm */ }, { /* 2928 */ 63, /* T1MSKC32rr */ }, { /* 2929 */ 64, /* T1MSKC64rm */ }, { /* 2930 */ 65, /* T1MSKC64rr */ }, { /* 2931 */ 0, /* */ }, { /* 2932 */ 0, /* */ }, { /* 2933 */ 0, /* */ }, { /* 2934 */ 0, /* */ }, { /* 2935 */ 0, /* */ }, { /* 2936 */ 0, /* */ }, { /* 2937 */ 0, /* */ }, { /* 2938 */ 0, /* */ }, { /* 2939 */ 0, /* */ }, { /* 2940 */ 0, /* */ }, { /* 2941 */ 0, /* */ }, { /* 2942 */ 0, /* */ }, { /* 2943 */ 0, /* */ }, { /* 2944 */ 0, /* */ }, { /* 2945 */ 0, /* */ }, { /* 2946 */ 2, /* TEST16i16 */ }, { /* 2947 */ 3, /* TEST16mi */ }, { /* 2948 */ 3, /* TEST16mi_alt */ }, { /* 2949 */ 83, /* TEST16ri */ }, { /* 2950 */ 83, /* TEST16ri_alt */ }, { /* 2951 */ 68, /* TEST16rm */ }, { /* 2952 */ 73, /* TEST16rr */ }, { /* 2953 */ 2, /* TEST32i32 */ }, { /* 2954 */ 3, /* TEST32mi */ }, { /* 2955 */ 3, /* TEST32mi_alt */ }, { /* 2956 */ 83, /* TEST32ri */ }, { /* 2957 */ 83, /* TEST32ri_alt */ }, { /* 2958 */ 68, /* TEST32rm */ }, { /* 2959 */ 73, /* TEST32rr */ }, { /* 2960 */ 13, /* TEST64i32 */ }, { /* 2961 */ 14, /* TEST64mi32 */ }, { /* 2962 */ 14, /* TEST64mi32_alt */ }, { /* 2963 */ 84, /* TEST64ri32 */ }, { /* 2964 */ 84, /* TEST64ri32_alt */ }, { /* 2965 */ 42, /* TEST64rm */ }, { /* 2966 */ 76, /* TEST64rr */ }, { /* 2967 */ 1, /* TEST8i8 */ }, { /* 2968 */ 22, /* TEST8mi */ }, { /* 2969 */ 22, /* TEST8mi_alt */ }, { /* 2970 */ 85, /* TEST8ri */ }, { /* 2971 */ 0, /* */ }, { /* 2972 */ 85, /* TEST8ri_alt */ }, { /* 2973 */ 86, /* TEST8rm */ }, { /* 2974 */ 87, /* TEST8rr */ }, { /* 2975 */ 0, /* */ }, { /* 2976 */ 0, /* */ }, { /* 2977 */ 0, /* */ }, { /* 2978 */ 0, /* */ }, { /* 2979 */ 0, /* */ }, { /* 2980 */ 0, /* */ }, { /* 2981 */ 0, /* TRAP */ }, { /* 2982 */ 0, /* TST_F */ }, { /* 2983 */ 0, /* */ }, { /* 2984 */ 0, /* */ }, { /* 2985 */ 0, /* */ }, { /* 2986 */ 68, /* TZCNT16rm */ }, { /* 2987 */ 69, /* TZCNT16rr */ }, { /* 2988 */ 68, /* TZCNT32rm */ }, { /* 2989 */ 69, /* TZCNT32rr */ }, { /* 2990 */ 42, /* TZCNT64rm */ }, { /* 2991 */ 43, /* TZCNT64rr */ }, { /* 2992 */ 62, /* TZMSK32rm */ }, { /* 2993 */ 63, /* TZMSK32rr */ }, { /* 2994 */ 64, /* TZMSK64rm */ }, { /* 2995 */ 65, /* TZMSK64rr */ }, { /* 2996 */ 257, /* UCOMISDrm */ }, { /* 2997 */ 301, /* UCOMISDrr */ }, { /* 2998 */ 261, /* UCOMISSrm */ }, { /* 2999 */ 287, /* UCOMISSrr */ }, { /* 3000 */ 39, /* UCOM_FIPr */ }, { /* 3001 */ 39, /* UCOM_FIr */ }, { /* 3002 */ 0, /* UCOM_FPPr */ }, { /* 3003 */ 39, /* UCOM_FPr */ }, { /* 3004 */ 0, /* */ }, { /* 3005 */ 0, /* */ }, { /* 3006 */ 0, /* */ }, { /* 3007 */ 0, /* */ }, { /* 3008 */ 0, /* */ }, { /* 3009 */ 0, /* */ }, { /* 3010 */ 39, /* UCOM_Fr */ }, { /* 3011 */ 0, /* UD2B */ }, { /* 3012 */ 30, /* UNPCKHPDrm */ }, { /* 3013 */ 31, /* UNPCKHPDrr */ }, { /* 3014 */ 30, /* UNPCKHPSrm */ }, { /* 3015 */ 31, /* UNPCKHPSrr */ }, { /* 3016 */ 30, /* UNPCKLPDrm */ }, { /* 3017 */ 31, /* UNPCKLPDrr */ }, { /* 3018 */ 30, /* UNPCKLPSrm */ }, { /* 3019 */ 31, /* UNPCKLPSrr */ }, { /* 3020 */ 0, /* */ }, { /* 3021 */ 302, /* VADDPDYrm */ }, { /* 3022 */ 303, /* VADDPDYrr */ }, { /* 3023 */ 304, /* VADDPDZ128rm */ }, { /* 3024 */ 305, /* VADDPDZ128rmb */ }, { /* 3025 */ 306, /* VADDPDZ128rmbk */ }, { /* 3026 */ 307, /* VADDPDZ128rmbkz */ }, { /* 3027 */ 308, /* VADDPDZ128rmk */ }, { /* 3028 */ 309, /* VADDPDZ128rmkz */ }, { /* 3029 */ 310, /* VADDPDZ128rr */ }, { /* 3030 */ 311, /* VADDPDZ128rrk */ }, { /* 3031 */ 312, /* VADDPDZ128rrkz */ }, { /* 3032 */ 313, /* VADDPDZ256rm */ }, { /* 3033 */ 314, /* VADDPDZ256rmb */ }, { /* 3034 */ 315, /* VADDPDZ256rmbk */ }, { /* 3035 */ 316, /* VADDPDZ256rmbkz */ }, { /* 3036 */ 317, /* VADDPDZ256rmk */ }, { /* 3037 */ 318, /* VADDPDZ256rmkz */ }, { /* 3038 */ 319, /* VADDPDZ256rr */ }, { /* 3039 */ 320, /* VADDPDZ256rrk */ }, { /* 3040 */ 321, /* VADDPDZ256rrkz */ }, { /* 3041 */ 322, /* VADDPDZrb */ }, { /* 3042 */ 323, /* VADDPDZrbk */ }, { /* 3043 */ 324, /* VADDPDZrbkz */ }, { /* 3044 */ 325, /* VADDPDZrm */ }, { /* 3045 */ 326, /* VADDPDZrmb */ }, { /* 3046 */ 327, /* VADDPDZrmbk */ }, { /* 3047 */ 328, /* VADDPDZrmbkz */ }, { /* 3048 */ 329, /* VADDPDZrmk */ }, { /* 3049 */ 330, /* VADDPDZrmkz */ }, { /* 3050 */ 331, /* VADDPDZrr */ }, { /* 3051 */ 332, /* VADDPDZrrk */ }, { /* 3052 */ 333, /* VADDPDZrrkz */ }, { /* 3053 */ 334, /* VADDPDrm */ }, { /* 3054 */ 335, /* VADDPDrr */ }, { /* 3055 */ 302, /* VADDPSYrm */ }, { /* 3056 */ 303, /* VADDPSYrr */ }, { /* 3057 */ 304, /* VADDPSZ128rm */ }, { /* 3058 */ 336, /* VADDPSZ128rmb */ }, { /* 3059 */ 337, /* VADDPSZ128rmbk */ }, { /* 3060 */ 338, /* VADDPSZ128rmbkz */ }, { /* 3061 */ 339, /* VADDPSZ128rmk */ }, { /* 3062 */ 340, /* VADDPSZ128rmkz */ }, { /* 3063 */ 310, /* VADDPSZ128rr */ }, { /* 3064 */ 341, /* VADDPSZ128rrk */ }, { /* 3065 */ 342, /* VADDPSZ128rrkz */ }, { /* 3066 */ 313, /* VADDPSZ256rm */ }, { /* 3067 */ 343, /* VADDPSZ256rmb */ }, { /* 3068 */ 344, /* VADDPSZ256rmbk */ }, { /* 3069 */ 345, /* VADDPSZ256rmbkz */ }, { /* 3070 */ 346, /* VADDPSZ256rmk */ }, { /* 3071 */ 347, /* VADDPSZ256rmkz */ }, { /* 3072 */ 319, /* VADDPSZ256rr */ }, { /* 3073 */ 348, /* VADDPSZ256rrk */ }, { /* 3074 */ 349, /* VADDPSZ256rrkz */ }, { /* 3075 */ 350, /* VADDPSZrb */ }, { /* 3076 */ 351, /* VADDPSZrbk */ }, { /* 3077 */ 352, /* VADDPSZrbkz */ }, { /* 3078 */ 325, /* VADDPSZrm */ }, { /* 3079 */ 353, /* VADDPSZrmb */ }, { /* 3080 */ 354, /* VADDPSZrmbk */ }, { /* 3081 */ 355, /* VADDPSZrmbkz */ }, { /* 3082 */ 356, /* VADDPSZrmk */ }, { /* 3083 */ 357, /* VADDPSZrmkz */ }, { /* 3084 */ 331, /* VADDPSZrr */ }, { /* 3085 */ 358, /* VADDPSZrrk */ }, { /* 3086 */ 359, /* VADDPSZrrkz */ }, { /* 3087 */ 334, /* VADDPSrm */ }, { /* 3088 */ 335, /* VADDPSrr */ }, { /* 3089 */ 0, /* */ }, { /* 3090 */ 360, /* VADDSDZrm_Int */ }, { /* 3091 */ 361, /* VADDSDZrm_Intk */ }, { /* 3092 */ 362, /* VADDSDZrm_Intkz */ }, { /* 3093 */ 0, /* */ }, { /* 3094 */ 363, /* VADDSDZrr_Int */ }, { /* 3095 */ 364, /* VADDSDZrr_Intk */ }, { /* 3096 */ 365, /* VADDSDZrr_Intkz */ }, { /* 3097 */ 366, /* VADDSDZrrb */ }, { /* 3098 */ 367, /* VADDSDZrrbk */ }, { /* 3099 */ 368, /* VADDSDZrrbkz */ }, { /* 3100 */ 369, /* VADDSDrm */ }, { /* 3101 */ 0, /* */ }, { /* 3102 */ 370, /* VADDSDrr */ }, { /* 3103 */ 0, /* */ }, { /* 3104 */ 0, /* */ }, { /* 3105 */ 371, /* VADDSSZrm_Int */ }, { /* 3106 */ 372, /* VADDSSZrm_Intk */ }, { /* 3107 */ 373, /* VADDSSZrm_Intkz */ }, { /* 3108 */ 0, /* */ }, { /* 3109 */ 374, /* VADDSSZrr_Int */ }, { /* 3110 */ 375, /* VADDSSZrr_Intk */ }, { /* 3111 */ 376, /* VADDSSZrr_Intkz */ }, { /* 3112 */ 377, /* VADDSSZrrb */ }, { /* 3113 */ 378, /* VADDSSZrrbk */ }, { /* 3114 */ 379, /* VADDSSZrrbkz */ }, { /* 3115 */ 380, /* VADDSSrm */ }, { /* 3116 */ 0, /* */ }, { /* 3117 */ 381, /* VADDSSrr */ }, { /* 3118 */ 0, /* */ }, { /* 3119 */ 302, /* VADDSUBPDYrm */ }, { /* 3120 */ 303, /* VADDSUBPDYrr */ }, { /* 3121 */ 334, /* VADDSUBPDrm */ }, { /* 3122 */ 335, /* VADDSUBPDrr */ }, { /* 3123 */ 302, /* VADDSUBPSYrm */ }, { /* 3124 */ 303, /* VADDSUBPSYrr */ }, { /* 3125 */ 334, /* VADDSUBPSrm */ }, { /* 3126 */ 335, /* VADDSUBPSrr */ }, { /* 3127 */ 334, /* VAESDECLASTrm */ }, { /* 3128 */ 335, /* VAESDECLASTrr */ }, { /* 3129 */ 334, /* VAESDECrm */ }, { /* 3130 */ 335, /* VAESDECrr */ }, { /* 3131 */ 334, /* VAESENCLASTrm */ }, { /* 3132 */ 335, /* VAESENCLASTrr */ }, { /* 3133 */ 334, /* VAESENCrm */ }, { /* 3134 */ 335, /* VAESENCrr */ }, { /* 3135 */ 44, /* VAESIMCrm */ }, { /* 3136 */ 45, /* VAESIMCrr */ }, { /* 3137 */ 46, /* VAESKEYGENASSIST128rm */ }, { /* 3138 */ 47, /* VAESKEYGENASSIST128rr */ }, { /* 3139 */ 382, /* VALIGNDrmi */ }, { /* 3140 */ 383, /* VALIGNDrri */ }, { /* 3141 */ 384, /* VALIGNDrrik */ }, { /* 3142 */ 385, /* VALIGNDrrikz */ }, { /* 3143 */ 382, /* VALIGNQrmi */ }, { /* 3144 */ 383, /* VALIGNQrri */ }, { /* 3145 */ 386, /* VALIGNQrrik */ }, { /* 3146 */ 387, /* VALIGNQrrikz */ }, { /* 3147 */ 302, /* VANDNPDYrm */ }, { /* 3148 */ 303, /* VANDNPDYrr */ }, { /* 3149 */ 334, /* VANDNPDrm */ }, { /* 3150 */ 335, /* VANDNPDrr */ }, { /* 3151 */ 302, /* VANDNPSYrm */ }, { /* 3152 */ 303, /* VANDNPSYrr */ }, { /* 3153 */ 334, /* VANDNPSrm */ }, { /* 3154 */ 335, /* VANDNPSrr */ }, { /* 3155 */ 302, /* VANDPDYrm */ }, { /* 3156 */ 303, /* VANDPDYrr */ }, { /* 3157 */ 334, /* VANDPDrm */ }, { /* 3158 */ 335, /* VANDPDrr */ }, { /* 3159 */ 302, /* VANDPSYrm */ }, { /* 3160 */ 303, /* VANDPSYrr */ }, { /* 3161 */ 334, /* VANDPSrm */ }, { /* 3162 */ 335, /* VANDPSrr */ }, { /* 3163 */ 0, /* */ }, { /* 3164 */ 304, /* VBLENDMPDZ128rm */ }, { /* 3165 */ 305, /* VBLENDMPDZ128rmb */ }, { /* 3166 */ 307, /* VBLENDMPDZ128rmbk */ }, { /* 3167 */ 309, /* VBLENDMPDZ128rmk */ }, { /* 3168 */ 309, /* VBLENDMPDZ128rmkz */ }, { /* 3169 */ 310, /* VBLENDMPDZ128rr */ }, { /* 3170 */ 312, /* VBLENDMPDZ128rrk */ }, { /* 3171 */ 312, /* VBLENDMPDZ128rrkz */ }, { /* 3172 */ 313, /* VBLENDMPDZ256rm */ }, { /* 3173 */ 314, /* VBLENDMPDZ256rmb */ }, { /* 3174 */ 316, /* VBLENDMPDZ256rmbk */ }, { /* 3175 */ 318, /* VBLENDMPDZ256rmk */ }, { /* 3176 */ 318, /* VBLENDMPDZ256rmkz */ }, { /* 3177 */ 319, /* VBLENDMPDZ256rr */ }, { /* 3178 */ 321, /* VBLENDMPDZ256rrk */ }, { /* 3179 */ 321, /* VBLENDMPDZ256rrkz */ }, { /* 3180 */ 325, /* VBLENDMPDZrm */ }, { /* 3181 */ 326, /* VBLENDMPDZrmb */ }, { /* 3182 */ 328, /* VBLENDMPDZrmbk */ }, { /* 3183 */ 330, /* VBLENDMPDZrmk */ }, { /* 3184 */ 330, /* VBLENDMPDZrmkz */ }, { /* 3185 */ 331, /* VBLENDMPDZrr */ }, { /* 3186 */ 333, /* VBLENDMPDZrrk */ }, { /* 3187 */ 333, /* VBLENDMPDZrrkz */ }, { /* 3188 */ 304, /* VBLENDMPSZ128rm */ }, { /* 3189 */ 336, /* VBLENDMPSZ128rmb */ }, { /* 3190 */ 338, /* VBLENDMPSZ128rmbk */ }, { /* 3191 */ 340, /* VBLENDMPSZ128rmk */ }, { /* 3192 */ 340, /* VBLENDMPSZ128rmkz */ }, { /* 3193 */ 310, /* VBLENDMPSZ128rr */ }, { /* 3194 */ 342, /* VBLENDMPSZ128rrk */ }, { /* 3195 */ 342, /* VBLENDMPSZ128rrkz */ }, { /* 3196 */ 313, /* VBLENDMPSZ256rm */ }, { /* 3197 */ 343, /* VBLENDMPSZ256rmb */ }, { /* 3198 */ 345, /* VBLENDMPSZ256rmbk */ }, { /* 3199 */ 347, /* VBLENDMPSZ256rmk */ }, { /* 3200 */ 347, /* VBLENDMPSZ256rmkz */ }, { /* 3201 */ 319, /* VBLENDMPSZ256rr */ }, { /* 3202 */ 349, /* VBLENDMPSZ256rrk */ }, { /* 3203 */ 349, /* VBLENDMPSZ256rrkz */ }, { /* 3204 */ 325, /* VBLENDMPSZrm */ }, { /* 3205 */ 353, /* VBLENDMPSZrmb */ }, { /* 3206 */ 355, /* VBLENDMPSZrmbk */ }, { /* 3207 */ 357, /* VBLENDMPSZrmk */ }, { /* 3208 */ 357, /* VBLENDMPSZrmkz */ }, { /* 3209 */ 331, /* VBLENDMPSZrr */ }, { /* 3210 */ 359, /* VBLENDMPSZrrk */ }, { /* 3211 */ 359, /* VBLENDMPSZrrkz */ }, { /* 3212 */ 388, /* VBLENDPDYrmi */ }, { /* 3213 */ 389, /* VBLENDPDYrri */ }, { /* 3214 */ 390, /* VBLENDPDrmi */ }, { /* 3215 */ 391, /* VBLENDPDrri */ }, { /* 3216 */ 388, /* VBLENDPSYrmi */ }, { /* 3217 */ 389, /* VBLENDPSYrri */ }, { /* 3218 */ 390, /* VBLENDPSrmi */ }, { /* 3219 */ 391, /* VBLENDPSrri */ }, { /* 3220 */ 392, /* VBLENDVPDYrm */ }, { /* 3221 */ 393, /* VBLENDVPDYrr */ }, { /* 3222 */ 394, /* VBLENDVPDrm */ }, { /* 3223 */ 395, /* VBLENDVPDrr */ }, { /* 3224 */ 392, /* VBLENDVPSYrm */ }, { /* 3225 */ 393, /* VBLENDVPSYrr */ }, { /* 3226 */ 394, /* VBLENDVPSrm */ }, { /* 3227 */ 395, /* VBLENDVPSrr */ }, { /* 3228 */ 396, /* VBROADCASTF128 */ }, { /* 3229 */ 397, /* VBROADCASTI32X4krm */ }, { /* 3230 */ 398, /* VBROADCASTI32X4rm */ }, { /* 3231 */ 399, /* VBROADCASTI64X4krm */ }, { /* 3232 */ 400, /* VBROADCASTI64X4rm */ }, { /* 3233 */ 401, /* VBROADCASTSDYrm */ }, { /* 3234 */ 402, /* VBROADCASTSDYrr */ }, { /* 3235 */ 403, /* VBROADCASTSDZ256m */ }, { /* 3236 */ 404, /* VBROADCASTSDZ256mk */ }, { /* 3237 */ 405, /* VBROADCASTSDZ256mkz */ }, { /* 3238 */ 406, /* VBROADCASTSDZ256r */ }, { /* 3239 */ 407, /* VBROADCASTSDZ256rk */ }, { /* 3240 */ 408, /* VBROADCASTSDZ256rkz */ }, { /* 3241 */ 409, /* VBROADCASTSDZm */ }, { /* 3242 */ 410, /* VBROADCASTSDZmk */ }, { /* 3243 */ 411, /* VBROADCASTSDZmkz */ }, { /* 3244 */ 412, /* VBROADCASTSDZr */ }, { /* 3245 */ 413, /* VBROADCASTSDZrk */ }, { /* 3246 */ 414, /* VBROADCASTSDZrkz */ }, { /* 3247 */ 415, /* VBROADCASTSSYrm */ }, { /* 3248 */ 402, /* VBROADCASTSSYrr */ }, { /* 3249 */ 416, /* VBROADCASTSSZ128m */ }, { /* 3250 */ 417, /* VBROADCASTSSZ128mk */ }, { /* 3251 */ 418, /* VBROADCASTSSZ128mkz */ }, { /* 3252 */ 419, /* VBROADCASTSSZ128r */ }, { /* 3253 */ 420, /* VBROADCASTSSZ128rk */ }, { /* 3254 */ 421, /* VBROADCASTSSZ128rkz */ }, { /* 3255 */ 422, /* VBROADCASTSSZ256m */ }, { /* 3256 */ 423, /* VBROADCASTSSZ256mk */ }, { /* 3257 */ 424, /* VBROADCASTSSZ256mkz */ }, { /* 3258 */ 425, /* VBROADCASTSSZ256r */ }, { /* 3259 */ 426, /* VBROADCASTSSZ256rk */ }, { /* 3260 */ 427, /* VBROADCASTSSZ256rkz */ }, { /* 3261 */ 428, /* VBROADCASTSSZm */ }, { /* 3262 */ 429, /* VBROADCASTSSZmk */ }, { /* 3263 */ 430, /* VBROADCASTSSZmkz */ }, { /* 3264 */ 431, /* VBROADCASTSSZr */ }, { /* 3265 */ 432, /* VBROADCASTSSZrk */ }, { /* 3266 */ 433, /* VBROADCASTSSZrkz */ }, { /* 3267 */ 434, /* VBROADCASTSSrm */ }, { /* 3268 */ 45, /* VBROADCASTSSrr */ }, { /* 3269 */ 435, /* VCMPPDYrmi */ }, { /* 3270 */ 0, /* */ }, { /* 3271 */ 436, /* VCMPPDYrri */ }, { /* 3272 */ 0, /* */ }, { /* 3273 */ 437, /* VCMPPDZrmi */ }, { /* 3274 */ 0, /* */ }, { /* 3275 */ 438, /* VCMPPDZrri */ }, { /* 3276 */ 0, /* */ }, { /* 3277 */ 439, /* VCMPPDZrrib */ }, { /* 3278 */ 0, /* */ }, { /* 3279 */ 440, /* VCMPPDrmi */ }, { /* 3280 */ 0, /* */ }, { /* 3281 */ 441, /* VCMPPDrri */ }, { /* 3282 */ 0, /* */ }, { /* 3283 */ 435, /* VCMPPSYrmi */ }, { /* 3284 */ 0, /* */ }, { /* 3285 */ 436, /* VCMPPSYrri */ }, { /* 3286 */ 0, /* */ }, { /* 3287 */ 442, /* VCMPPSZrmi */ }, { /* 3288 */ 0, /* */ }, { /* 3289 */ 443, /* VCMPPSZrri */ }, { /* 3290 */ 0, /* */ }, { /* 3291 */ 444, /* VCMPPSZrrib */ }, { /* 3292 */ 0, /* */ }, { /* 3293 */ 440, /* VCMPPSrmi */ }, { /* 3294 */ 0, /* */ }, { /* 3295 */ 441, /* VCMPPSrri */ }, { /* 3296 */ 0, /* */ }, { /* 3297 */ 445, /* VCMPSDZrm */ }, { /* 3298 */ 0, /* */ }, { /* 3299 */ 446, /* VCMPSDZrr */ }, { /* 3300 */ 0, /* */ }, { /* 3301 */ 447, /* VCMPSDrm */ }, { /* 3302 */ 0, /* */ }, { /* 3303 */ 448, /* VCMPSDrr */ }, { /* 3304 */ 0, /* */ }, { /* 3305 */ 449, /* VCMPSSZrm */ }, { /* 3306 */ 0, /* */ }, { /* 3307 */ 450, /* VCMPSSZrr */ }, { /* 3308 */ 0, /* */ }, { /* 3309 */ 451, /* VCMPSSrm */ }, { /* 3310 */ 0, /* */ }, { /* 3311 */ 452, /* VCMPSSrr */ }, { /* 3312 */ 0, /* */ }, { /* 3313 */ 453, /* VCOMISDZrm */ }, { /* 3314 */ 454, /* VCOMISDZrr */ }, { /* 3315 */ 44, /* VCOMISDrm */ }, { /* 3316 */ 45, /* VCOMISDrr */ }, { /* 3317 */ 455, /* VCOMISSZrm */ }, { /* 3318 */ 419, /* VCOMISSZrr */ }, { /* 3319 */ 44, /* VCOMISSrm */ }, { /* 3320 */ 45, /* VCOMISSrr */ }, { /* 3321 */ 456, /* VCOMPRESSPDZ128mrk */ }, { /* 3322 */ 457, /* VCOMPRESSPDZ128rrk */ }, { /* 3323 */ 458, /* VCOMPRESSPDZ128rrkz */ }, { /* 3324 */ 459, /* VCOMPRESSPDZ256mrk */ }, { /* 3325 */ 460, /* VCOMPRESSPDZ256rrk */ }, { /* 3326 */ 461, /* VCOMPRESSPDZ256rrkz */ }, { /* 3327 */ 462, /* VCOMPRESSPDZmrk */ }, { /* 3328 */ 463, /* VCOMPRESSPDZrrk */ }, { /* 3329 */ 464, /* VCOMPRESSPDZrrkz */ }, { /* 3330 */ 465, /* VCOMPRESSPSZ128mrk */ }, { /* 3331 */ 466, /* VCOMPRESSPSZ128rrk */ }, { /* 3332 */ 467, /* VCOMPRESSPSZ128rrkz */ }, { /* 3333 */ 468, /* VCOMPRESSPSZ256mrk */ }, { /* 3334 */ 469, /* VCOMPRESSPSZ256rrk */ }, { /* 3335 */ 470, /* VCOMPRESSPSZ256rrkz */ }, { /* 3336 */ 471, /* VCOMPRESSPSZmrk */ }, { /* 3337 */ 472, /* VCOMPRESSPSZrrk */ }, { /* 3338 */ 473, /* VCOMPRESSPSZrrkz */ }, { /* 3339 */ 396, /* VCVTDQ2PDYrm */ }, { /* 3340 */ 402, /* VCVTDQ2PDYrr */ }, { /* 3341 */ 400, /* VCVTDQ2PDZrm */ }, { /* 3342 */ 474, /* VCVTDQ2PDZrr */ }, { /* 3343 */ 105, /* VCVTDQ2PDrm */ }, { /* 3344 */ 45, /* VCVTDQ2PDrr */ }, { /* 3345 */ 475, /* VCVTDQ2PSYrm */ }, { /* 3346 */ 476, /* VCVTDQ2PSYrr */ }, { /* 3347 */ 477, /* VCVTDQ2PSZrm */ }, { /* 3348 */ 478, /* VCVTDQ2PSZrr */ }, { /* 3349 */ 479, /* VCVTDQ2PSZrrb */ }, { /* 3350 */ 44, /* VCVTDQ2PSrm */ }, { /* 3351 */ 45, /* VCVTDQ2PSrr */ }, { /* 3352 */ 44, /* VCVTPD2DQXrm */ }, { /* 3353 */ 480, /* VCVTPD2DQYrm */ }, { /* 3354 */ 481, /* VCVTPD2DQYrr */ }, { /* 3355 */ 482, /* VCVTPD2DQZrm */ }, { /* 3356 */ 483, /* VCVTPD2DQZrr */ }, { /* 3357 */ 484, /* VCVTPD2DQZrrb */ }, { /* 3358 */ 45, /* VCVTPD2DQrr */ }, { /* 3359 */ 44, /* VCVTPD2PSXrm */ }, { /* 3360 */ 480, /* VCVTPD2PSYrm */ }, { /* 3361 */ 481, /* VCVTPD2PSYrr */ }, { /* 3362 */ 482, /* VCVTPD2PSZrm */ }, { /* 3363 */ 483, /* VCVTPD2PSZrr */ }, { /* 3364 */ 484, /* VCVTPD2PSZrrb */ }, { /* 3365 */ 45, /* VCVTPD2PSrr */ }, { /* 3366 */ 482, /* VCVTPD2UDQZrm */ }, { /* 3367 */ 483, /* VCVTPD2UDQZrr */ }, { /* 3368 */ 484, /* VCVTPD2UDQZrrb */ }, { /* 3369 */ 396, /* VCVTPH2PSYrm */ }, { /* 3370 */ 402, /* VCVTPH2PSYrr */ }, { /* 3371 */ 400, /* VCVTPH2PSZrm */ }, { /* 3372 */ 474, /* VCVTPH2PSZrr */ }, { /* 3373 */ 106, /* VCVTPH2PSrm */ }, { /* 3374 */ 45, /* VCVTPH2PSrr */ }, { /* 3375 */ 475, /* VCVTPS2DQYrm */ }, { /* 3376 */ 476, /* VCVTPS2DQYrr */ }, { /* 3377 */ 477, /* VCVTPS2DQZrm */ }, { /* 3378 */ 478, /* VCVTPS2DQZrr */ }, { /* 3379 */ 479, /* VCVTPS2DQZrrb */ }, { /* 3380 */ 44, /* VCVTPS2DQrm */ }, { /* 3381 */ 45, /* VCVTPS2DQrr */ }, { /* 3382 */ 396, /* VCVTPS2PDYrm */ }, { /* 3383 */ 402, /* VCVTPS2PDYrr */ }, { /* 3384 */ 400, /* VCVTPS2PDZrm */ }, { /* 3385 */ 474, /* VCVTPS2PDZrr */ }, { /* 3386 */ 106, /* VCVTPS2PDrm */ }, { /* 3387 */ 45, /* VCVTPS2PDrr */ }, { /* 3388 */ 485, /* VCVTPS2PHYmr */ }, { /* 3389 */ 486, /* VCVTPS2PHYrr */ }, { /* 3390 */ 487, /* VCVTPS2PHZmr */ }, { /* 3391 */ 488, /* VCVTPS2PHZrr */ }, { /* 3392 */ 489, /* VCVTPS2PHmr */ }, { /* 3393 */ 490, /* VCVTPS2PHrr */ }, { /* 3394 */ 477, /* VCVTPS2UDQZrm */ }, { /* 3395 */ 478, /* VCVTPS2UDQZrr */ }, { /* 3396 */ 479, /* VCVTPS2UDQZrrb */ }, { /* 3397 */ 491, /* VCVTSD2SI64Zrm */ }, { /* 3398 */ 492, /* VCVTSD2SI64Zrr */ }, { /* 3399 */ 107, /* VCVTSD2SI64rm */ }, { /* 3400 */ 108, /* VCVTSD2SI64rr */ }, { /* 3401 */ 493, /* VCVTSD2SIZrm */ }, { /* 3402 */ 494, /* VCVTSD2SIZrr */ }, { /* 3403 */ 109, /* VCVTSD2SIrm */ }, { /* 3404 */ 110, /* VCVTSD2SIrr */ }, { /* 3405 */ 495, /* VCVTSD2SSZrm */ }, { /* 3406 */ 496, /* VCVTSD2SSZrr */ }, { /* 3407 */ 497, /* VCVTSD2SSrm */ }, { /* 3408 */ 498, /* VCVTSD2SSrr */ }, { /* 3409 */ 491, /* VCVTSD2USI64Zrm */ }, { /* 3410 */ 492, /* VCVTSD2USI64Zrr */ }, { /* 3411 */ 493, /* VCVTSD2USIZrm */ }, { /* 3412 */ 494, /* VCVTSD2USIZrr */ }, { /* 3413 */ 499, /* VCVTSI2SD64rm */ }, { /* 3414 */ 500, /* VCVTSI2SD64rr */ }, { /* 3415 */ 501, /* VCVTSI2SDZrm */ }, { /* 3416 */ 502, /* VCVTSI2SDZrr */ }, { /* 3417 */ 499, /* VCVTSI2SDrm */ }, { /* 3418 */ 503, /* VCVTSI2SDrr */ }, { /* 3419 */ 504, /* VCVTSI2SS64rm */ }, { /* 3420 */ 505, /* VCVTSI2SS64rr */ }, { /* 3421 */ 506, /* VCVTSI2SSZrm */ }, { /* 3422 */ 507, /* VCVTSI2SSZrr */ }, { /* 3423 */ 504, /* VCVTSI2SSrm */ }, { /* 3424 */ 508, /* VCVTSI2SSrr */ }, { /* 3425 */ 509, /* VCVTSI642SDZrm */ }, { /* 3426 */ 510, /* VCVTSI642SDZrr */ }, { /* 3427 */ 511, /* VCVTSI642SSZrm */ }, { /* 3428 */ 512, /* VCVTSI642SSZrr */ }, { /* 3429 */ 513, /* VCVTSS2SDZrm */ }, { /* 3430 */ 514, /* VCVTSS2SDZrr */ }, { /* 3431 */ 515, /* VCVTSS2SDrm */ }, { /* 3432 */ 516, /* VCVTSS2SDrr */ }, { /* 3433 */ 517, /* VCVTSS2SI64Zrm */ }, { /* 3434 */ 518, /* VCVTSS2SI64Zrr */ }, { /* 3435 */ 121, /* VCVTSS2SI64rm */ }, { /* 3436 */ 108, /* VCVTSS2SI64rr */ }, { /* 3437 */ 519, /* VCVTSS2SIZrm */ }, { /* 3438 */ 520, /* VCVTSS2SIZrr */ }, { /* 3439 */ 122, /* VCVTSS2SIrm */ }, { /* 3440 */ 110, /* VCVTSS2SIrr */ }, { /* 3441 */ 517, /* VCVTSS2USI64Zrm */ }, { /* 3442 */ 518, /* VCVTSS2USI64Zrr */ }, { /* 3443 */ 519, /* VCVTSS2USIZrm */ }, { /* 3444 */ 520, /* VCVTSS2USIZrr */ }, { /* 3445 */ 44, /* VCVTTPD2DQXrm */ }, { /* 3446 */ 480, /* VCVTTPD2DQYrm */ }, { /* 3447 */ 481, /* VCVTTPD2DQYrr */ }, { /* 3448 */ 482, /* VCVTTPD2DQZrm */ }, { /* 3449 */ 483, /* VCVTTPD2DQZrr */ }, { /* 3450 */ 45, /* VCVTTPD2DQrr */ }, { /* 3451 */ 482, /* VCVTTPD2UDQZrm */ }, { /* 3452 */ 483, /* VCVTTPD2UDQZrr */ }, { /* 3453 */ 475, /* VCVTTPS2DQYrm */ }, { /* 3454 */ 476, /* VCVTTPS2DQYrr */ }, { /* 3455 */ 477, /* VCVTTPS2DQZrm */ }, { /* 3456 */ 478, /* VCVTTPS2DQZrr */ }, { /* 3457 */ 44, /* VCVTTPS2DQrm */ }, { /* 3458 */ 45, /* VCVTTPS2DQrr */ }, { /* 3459 */ 477, /* VCVTTPS2UDQZrm */ }, { /* 3460 */ 478, /* VCVTTPS2UDQZrr */ }, { /* 3461 */ 491, /* VCVTTSD2SI64Zrm */ }, { /* 3462 */ 521, /* VCVTTSD2SI64Zrr */ }, { /* 3463 */ 107, /* VCVTTSD2SI64rm */ }, { /* 3464 */ 123, /* VCVTTSD2SI64rr */ }, { /* 3465 */ 493, /* VCVTTSD2SIZrm */ }, { /* 3466 */ 522, /* VCVTTSD2SIZrr */ }, { /* 3467 */ 109, /* VCVTTSD2SIrm */ }, { /* 3468 */ 124, /* VCVTTSD2SIrr */ }, { /* 3469 */ 491, /* VCVTTSD2USI64Zrm */ }, { /* 3470 */ 521, /* VCVTTSD2USI64Zrr */ }, { /* 3471 */ 493, /* VCVTTSD2USIZrm */ }, { /* 3472 */ 522, /* VCVTTSD2USIZrr */ }, { /* 3473 */ 517, /* VCVTTSS2SI64Zrm */ }, { /* 3474 */ 523, /* VCVTTSS2SI64Zrr */ }, { /* 3475 */ 121, /* VCVTTSS2SI64rm */ }, { /* 3476 */ 125, /* VCVTTSS2SI64rr */ }, { /* 3477 */ 519, /* VCVTTSS2SIZrm */ }, { /* 3478 */ 524, /* VCVTTSS2SIZrr */ }, { /* 3479 */ 122, /* VCVTTSS2SIrm */ }, { /* 3480 */ 126, /* VCVTTSS2SIrr */ }, { /* 3481 */ 517, /* VCVTTSS2USI64Zrm */ }, { /* 3482 */ 523, /* VCVTTSS2USI64Zrr */ }, { /* 3483 */ 519, /* VCVTTSS2USIZrm */ }, { /* 3484 */ 524, /* VCVTTSS2USIZrr */ }, { /* 3485 */ 400, /* VCVTUDQ2PDZrm */ }, { /* 3486 */ 474, /* VCVTUDQ2PDZrr */ }, { /* 3487 */ 477, /* VCVTUDQ2PSZrm */ }, { /* 3488 */ 478, /* VCVTUDQ2PSZrr */ }, { /* 3489 */ 479, /* VCVTUDQ2PSZrrb */ }, { /* 3490 */ 501, /* VCVTUSI2SDZrm */ }, { /* 3491 */ 502, /* VCVTUSI2SDZrr */ }, { /* 3492 */ 506, /* VCVTUSI2SSZrm */ }, { /* 3493 */ 507, /* VCVTUSI2SSZrr */ }, { /* 3494 */ 509, /* VCVTUSI642SDZrm */ }, { /* 3495 */ 510, /* VCVTUSI642SDZrr */ }, { /* 3496 */ 511, /* VCVTUSI642SSZrm */ }, { /* 3497 */ 512, /* VCVTUSI642SSZrr */ }, { /* 3498 */ 302, /* VDIVPDYrm */ }, { /* 3499 */ 303, /* VDIVPDYrr */ }, { /* 3500 */ 304, /* VDIVPDZ128rm */ }, { /* 3501 */ 305, /* VDIVPDZ128rmb */ }, { /* 3502 */ 306, /* VDIVPDZ128rmbk */ }, { /* 3503 */ 307, /* VDIVPDZ128rmbkz */ }, { /* 3504 */ 308, /* VDIVPDZ128rmk */ }, { /* 3505 */ 309, /* VDIVPDZ128rmkz */ }, { /* 3506 */ 310, /* VDIVPDZ128rr */ }, { /* 3507 */ 311, /* VDIVPDZ128rrk */ }, { /* 3508 */ 312, /* VDIVPDZ128rrkz */ }, { /* 3509 */ 313, /* VDIVPDZ256rm */ }, { /* 3510 */ 314, /* VDIVPDZ256rmb */ }, { /* 3511 */ 315, /* VDIVPDZ256rmbk */ }, { /* 3512 */ 316, /* VDIVPDZ256rmbkz */ }, { /* 3513 */ 317, /* VDIVPDZ256rmk */ }, { /* 3514 */ 318, /* VDIVPDZ256rmkz */ }, { /* 3515 */ 319, /* VDIVPDZ256rr */ }, { /* 3516 */ 320, /* VDIVPDZ256rrk */ }, { /* 3517 */ 321, /* VDIVPDZ256rrkz */ }, { /* 3518 */ 322, /* VDIVPDZrb */ }, { /* 3519 */ 323, /* VDIVPDZrbk */ }, { /* 3520 */ 324, /* VDIVPDZrbkz */ }, { /* 3521 */ 325, /* VDIVPDZrm */ }, { /* 3522 */ 326, /* VDIVPDZrmb */ }, { /* 3523 */ 327, /* VDIVPDZrmbk */ }, { /* 3524 */ 328, /* VDIVPDZrmbkz */ }, { /* 3525 */ 329, /* VDIVPDZrmk */ }, { /* 3526 */ 330, /* VDIVPDZrmkz */ }, { /* 3527 */ 331, /* VDIVPDZrr */ }, { /* 3528 */ 332, /* VDIVPDZrrk */ }, { /* 3529 */ 333, /* VDIVPDZrrkz */ }, { /* 3530 */ 334, /* VDIVPDrm */ }, { /* 3531 */ 335, /* VDIVPDrr */ }, { /* 3532 */ 302, /* VDIVPSYrm */ }, { /* 3533 */ 303, /* VDIVPSYrr */ }, { /* 3534 */ 304, /* VDIVPSZ128rm */ }, { /* 3535 */ 336, /* VDIVPSZ128rmb */ }, { /* 3536 */ 337, /* VDIVPSZ128rmbk */ }, { /* 3537 */ 338, /* VDIVPSZ128rmbkz */ }, { /* 3538 */ 339, /* VDIVPSZ128rmk */ }, { /* 3539 */ 340, /* VDIVPSZ128rmkz */ }, { /* 3540 */ 310, /* VDIVPSZ128rr */ }, { /* 3541 */ 341, /* VDIVPSZ128rrk */ }, { /* 3542 */ 342, /* VDIVPSZ128rrkz */ }, { /* 3543 */ 313, /* VDIVPSZ256rm */ }, { /* 3544 */ 343, /* VDIVPSZ256rmb */ }, { /* 3545 */ 344, /* VDIVPSZ256rmbk */ }, { /* 3546 */ 345, /* VDIVPSZ256rmbkz */ }, { /* 3547 */ 346, /* VDIVPSZ256rmk */ }, { /* 3548 */ 347, /* VDIVPSZ256rmkz */ }, { /* 3549 */ 319, /* VDIVPSZ256rr */ }, { /* 3550 */ 348, /* VDIVPSZ256rrk */ }, { /* 3551 */ 349, /* VDIVPSZ256rrkz */ }, { /* 3552 */ 350, /* VDIVPSZrb */ }, { /* 3553 */ 351, /* VDIVPSZrbk */ }, { /* 3554 */ 352, /* VDIVPSZrbkz */ }, { /* 3555 */ 325, /* VDIVPSZrm */ }, { /* 3556 */ 353, /* VDIVPSZrmb */ }, { /* 3557 */ 354, /* VDIVPSZrmbk */ }, { /* 3558 */ 355, /* VDIVPSZrmbkz */ }, { /* 3559 */ 356, /* VDIVPSZrmk */ }, { /* 3560 */ 357, /* VDIVPSZrmkz */ }, { /* 3561 */ 331, /* VDIVPSZrr */ }, { /* 3562 */ 358, /* VDIVPSZrrk */ }, { /* 3563 */ 359, /* VDIVPSZrrkz */ }, { /* 3564 */ 334, /* VDIVPSrm */ }, { /* 3565 */ 335, /* VDIVPSrr */ }, { /* 3566 */ 0, /* */ }, { /* 3567 */ 360, /* VDIVSDZrm_Int */ }, { /* 3568 */ 361, /* VDIVSDZrm_Intk */ }, { /* 3569 */ 362, /* VDIVSDZrm_Intkz */ }, { /* 3570 */ 0, /* */ }, { /* 3571 */ 363, /* VDIVSDZrr_Int */ }, { /* 3572 */ 364, /* VDIVSDZrr_Intk */ }, { /* 3573 */ 365, /* VDIVSDZrr_Intkz */ }, { /* 3574 */ 366, /* VDIVSDZrrb */ }, { /* 3575 */ 367, /* VDIVSDZrrbk */ }, { /* 3576 */ 368, /* VDIVSDZrrbkz */ }, { /* 3577 */ 369, /* VDIVSDrm */ }, { /* 3578 */ 0, /* */ }, { /* 3579 */ 370, /* VDIVSDrr */ }, { /* 3580 */ 0, /* */ }, { /* 3581 */ 0, /* */ }, { /* 3582 */ 371, /* VDIVSSZrm_Int */ }, { /* 3583 */ 372, /* VDIVSSZrm_Intk */ }, { /* 3584 */ 373, /* VDIVSSZrm_Intkz */ }, { /* 3585 */ 0, /* */ }, { /* 3586 */ 374, /* VDIVSSZrr_Int */ }, { /* 3587 */ 375, /* VDIVSSZrr_Intk */ }, { /* 3588 */ 376, /* VDIVSSZrr_Intkz */ }, { /* 3589 */ 377, /* VDIVSSZrrb */ }, { /* 3590 */ 378, /* VDIVSSZrrbk */ }, { /* 3591 */ 379, /* VDIVSSZrrbkz */ }, { /* 3592 */ 380, /* VDIVSSrm */ }, { /* 3593 */ 0, /* */ }, { /* 3594 */ 381, /* VDIVSSrr */ }, { /* 3595 */ 0, /* */ }, { /* 3596 */ 390, /* VDPPDrmi */ }, { /* 3597 */ 391, /* VDPPDrri */ }, { /* 3598 */ 388, /* VDPPSYrmi */ }, { /* 3599 */ 389, /* VDPPSYrri */ }, { /* 3600 */ 390, /* VDPPSrmi */ }, { /* 3601 */ 391, /* VDPPSrri */ }, { /* 3602 */ 38, /* VERRm */ }, { /* 3603 */ 194, /* VERRr */ }, { /* 3604 */ 38, /* VERWm */ }, { /* 3605 */ 194, /* VERWr */ }, { /* 3606 */ 477, /* VEXP2PDm */ }, { /* 3607 */ 525, /* VEXP2PDmb */ }, { /* 3608 */ 526, /* VEXP2PDmbk */ }, { /* 3609 */ 527, /* VEXP2PDmbkz */ }, { /* 3610 */ 528, /* VEXP2PDmk */ }, { /* 3611 */ 529, /* VEXP2PDmkz */ }, { /* 3612 */ 478, /* VEXP2PDr */ }, { /* 3613 */ 530, /* VEXP2PDrb */ }, { /* 3614 */ 531, /* VEXP2PDrbk */ }, { /* 3615 */ 532, /* VEXP2PDrbkz */ }, { /* 3616 */ 533, /* VEXP2PDrk */ }, { /* 3617 */ 534, /* VEXP2PDrkz */ }, { /* 3618 */ 477, /* VEXP2PSm */ }, { /* 3619 */ 525, /* VEXP2PSmb */ }, { /* 3620 */ 535, /* VEXP2PSmbk */ }, { /* 3621 */ 536, /* VEXP2PSmbkz */ }, { /* 3622 */ 537, /* VEXP2PSmk */ }, { /* 3623 */ 538, /* VEXP2PSmkz */ }, { /* 3624 */ 478, /* VEXP2PSr */ }, { /* 3625 */ 530, /* VEXP2PSrb */ }, { /* 3626 */ 539, /* VEXP2PSrbk */ }, { /* 3627 */ 540, /* VEXP2PSrbkz */ }, { /* 3628 */ 541, /* VEXP2PSrk */ }, { /* 3629 */ 542, /* VEXP2PSrkz */ }, { /* 3630 */ 543, /* VEXPANDPDZ128rmk */ }, { /* 3631 */ 544, /* VEXPANDPDZ128rmkz */ }, { /* 3632 */ 545, /* VEXPANDPDZ128rrk */ }, { /* 3633 */ 546, /* VEXPANDPDZ128rrkz */ }, { /* 3634 */ 547, /* VEXPANDPDZ256rmk */ }, { /* 3635 */ 548, /* VEXPANDPDZ256rmkz */ }, { /* 3636 */ 549, /* VEXPANDPDZ256rrk */ }, { /* 3637 */ 550, /* VEXPANDPDZ256rrkz */ }, { /* 3638 */ 551, /* VEXPANDPDZrmk */ }, { /* 3639 */ 552, /* VEXPANDPDZrmkz */ }, { /* 3640 */ 533, /* VEXPANDPDZrrk */ }, { /* 3641 */ 534, /* VEXPANDPDZrrkz */ }, { /* 3642 */ 553, /* VEXPANDPSZ128rmk */ }, { /* 3643 */ 554, /* VEXPANDPSZ128rmkz */ }, { /* 3644 */ 555, /* VEXPANDPSZ128rrk */ }, { /* 3645 */ 556, /* VEXPANDPSZ128rrkz */ }, { /* 3646 */ 557, /* VEXPANDPSZ256rmk */ }, { /* 3647 */ 558, /* VEXPANDPSZ256rmkz */ }, { /* 3648 */ 559, /* VEXPANDPSZ256rrk */ }, { /* 3649 */ 560, /* VEXPANDPSZ256rrkz */ }, { /* 3650 */ 535, /* VEXPANDPSZrmk */ }, { /* 3651 */ 536, /* VEXPANDPSZrmkz */ }, { /* 3652 */ 541, /* VEXPANDPSZrrk */ }, { /* 3653 */ 542, /* VEXPANDPSZrrkz */ }, { /* 3654 */ 485, /* VEXTRACTF128mr */ }, { /* 3655 */ 486, /* VEXTRACTF128rr */ }, { /* 3656 */ 561, /* VEXTRACTF32x4rm */ }, { /* 3657 */ 562, /* VEXTRACTF32x4rr */ }, { /* 3658 */ 563, /* VEXTRACTF32x4rrk */ }, { /* 3659 */ 564, /* VEXTRACTF32x4rrkz */ }, { /* 3660 */ 487, /* VEXTRACTF64x4rm */ }, { /* 3661 */ 565, /* VEXTRACTF64x4rr */ }, { /* 3662 */ 566, /* VEXTRACTF64x4rrk */ }, { /* 3663 */ 567, /* VEXTRACTF64x4rrkz */ }, { /* 3664 */ 485, /* VEXTRACTI128mr */ }, { /* 3665 */ 486, /* VEXTRACTI128rr */ }, { /* 3666 */ 561, /* VEXTRACTI32x4rm */ }, { /* 3667 */ 562, /* VEXTRACTI32x4rr */ }, { /* 3668 */ 563, /* VEXTRACTI32x4rrk */ }, { /* 3669 */ 564, /* VEXTRACTI32x4rrkz */ }, { /* 3670 */ 487, /* VEXTRACTI64x4rm */ }, { /* 3671 */ 565, /* VEXTRACTI64x4rr */ }, { /* 3672 */ 566, /* VEXTRACTI64x4rrk */ }, { /* 3673 */ 567, /* VEXTRACTI64x4rrkz */ }, { /* 3674 */ 132, /* VEXTRACTPSmr */ }, { /* 3675 */ 133, /* VEXTRACTPSrr */ }, { /* 3676 */ 568, /* VEXTRACTPSzmr */ }, { /* 3677 */ 569, /* VEXTRACTPSzrr */ }, { /* 3678 */ 570, /* VFMADD132PDZ128m */ }, { /* 3679 */ 571, /* VFMADD132PDZ128mb */ }, { /* 3680 */ 572, /* VFMADD132PDZ256m */ }, { /* 3681 */ 573, /* VFMADD132PDZ256mb */ }, { /* 3682 */ 574, /* VFMADD132PDZm */ }, { /* 3683 */ 575, /* VFMADD132PDZmb */ }, { /* 3684 */ 570, /* VFMADD132PSZ128m */ }, { /* 3685 */ 576, /* VFMADD132PSZ128mb */ }, { /* 3686 */ 572, /* VFMADD132PSZ256m */ }, { /* 3687 */ 577, /* VFMADD132PSZ256mb */ }, { /* 3688 */ 574, /* VFMADD132PSZm */ }, { /* 3689 */ 578, /* VFMADD132PSZmb */ }, { /* 3690 */ 394, /* VFMADDPD4mr */ }, { /* 3691 */ 392, /* VFMADDPD4mrY */ }, { /* 3692 */ 579, /* VFMADDPD4rm */ }, { /* 3693 */ 580, /* VFMADDPD4rmY */ }, { /* 3694 */ 581, /* VFMADDPD4rr */ }, { /* 3695 */ 582, /* VFMADDPD4rrY */ }, { /* 3696 */ 393, /* VFMADDPD4rrY_REV */ }, { /* 3697 */ 395, /* VFMADDPD4rr_REV */ }, { /* 3698 */ 570, /* VFMADDPDZ128v213rm */ }, { /* 3699 */ 583, /* VFMADDPDZ128v213rmb */ }, { /* 3700 */ 306, /* VFMADDPDZ128v213rmbk */ }, { /* 3701 */ 306, /* VFMADDPDZ128v213rmbkz */ }, { /* 3702 */ 308, /* VFMADDPDZ128v213rmk */ }, { /* 3703 */ 308, /* VFMADDPDZ128v213rmkz */ }, { /* 3704 */ 584, /* VFMADDPDZ128v213rr */ }, { /* 3705 */ 311, /* VFMADDPDZ128v213rrk */ }, { /* 3706 */ 311, /* VFMADDPDZ128v213rrkz */ }, { /* 3707 */ 570, /* VFMADDPDZ128v231rm */ }, { /* 3708 */ 583, /* VFMADDPDZ128v231rmb */ }, { /* 3709 */ 306, /* VFMADDPDZ128v231rmbk */ }, { /* 3710 */ 306, /* VFMADDPDZ128v231rmbkz */ }, { /* 3711 */ 308, /* VFMADDPDZ128v231rmk */ }, { /* 3712 */ 308, /* VFMADDPDZ128v231rmkz */ }, { /* 3713 */ 584, /* VFMADDPDZ128v231rr */ }, { /* 3714 */ 311, /* VFMADDPDZ128v231rrk */ }, { /* 3715 */ 311, /* VFMADDPDZ128v231rrkz */ }, { /* 3716 */ 572, /* VFMADDPDZ256v213rm */ }, { /* 3717 */ 585, /* VFMADDPDZ256v213rmb */ }, { /* 3718 */ 315, /* VFMADDPDZ256v213rmbk */ }, { /* 3719 */ 315, /* VFMADDPDZ256v213rmbkz */ }, { /* 3720 */ 317, /* VFMADDPDZ256v213rmk */ }, { /* 3721 */ 317, /* VFMADDPDZ256v213rmkz */ }, { /* 3722 */ 586, /* VFMADDPDZ256v213rr */ }, { /* 3723 */ 320, /* VFMADDPDZ256v213rrk */ }, { /* 3724 */ 320, /* VFMADDPDZ256v213rrkz */ }, { /* 3725 */ 572, /* VFMADDPDZ256v231rm */ }, { /* 3726 */ 585, /* VFMADDPDZ256v231rmb */ }, { /* 3727 */ 315, /* VFMADDPDZ256v231rmbk */ }, { /* 3728 */ 315, /* VFMADDPDZ256v231rmbkz */ }, { /* 3729 */ 317, /* VFMADDPDZ256v231rmk */ }, { /* 3730 */ 317, /* VFMADDPDZ256v231rmkz */ }, { /* 3731 */ 586, /* VFMADDPDZ256v231rr */ }, { /* 3732 */ 320, /* VFMADDPDZ256v231rrk */ }, { /* 3733 */ 320, /* VFMADDPDZ256v231rrkz */ }, { /* 3734 */ 574, /* VFMADDPDZv213rm */ }, { /* 3735 */ 587, /* VFMADDPDZv213rmb */ }, { /* 3736 */ 327, /* VFMADDPDZv213rmbk */ }, { /* 3737 */ 327, /* VFMADDPDZv213rmbkz */ }, { /* 3738 */ 329, /* VFMADDPDZv213rmk */ }, { /* 3739 */ 329, /* VFMADDPDZv213rmkz */ }, { /* 3740 */ 588, /* VFMADDPDZv213rr */ }, { /* 3741 */ 589, /* VFMADDPDZv213rrb */ }, { /* 3742 */ 323, /* VFMADDPDZv213rrbk */ }, { /* 3743 */ 323, /* VFMADDPDZv213rrbkz */ }, { /* 3744 */ 332, /* VFMADDPDZv213rrk */ }, { /* 3745 */ 332, /* VFMADDPDZv213rrkz */ }, { /* 3746 */ 574, /* VFMADDPDZv231rm */ }, { /* 3747 */ 587, /* VFMADDPDZv231rmb */ }, { /* 3748 */ 327, /* VFMADDPDZv231rmbk */ }, { /* 3749 */ 327, /* VFMADDPDZv231rmbkz */ }, { /* 3750 */ 329, /* VFMADDPDZv231rmk */ }, { /* 3751 */ 329, /* VFMADDPDZv231rmkz */ }, { /* 3752 */ 588, /* VFMADDPDZv231rr */ }, { /* 3753 */ 332, /* VFMADDPDZv231rrk */ }, { /* 3754 */ 332, /* VFMADDPDZv231rrkz */ }, { /* 3755 */ 590, /* VFMADDPDr132m */ }, { /* 3756 */ 591, /* VFMADDPDr132mY */ }, { /* 3757 */ 592, /* VFMADDPDr132r */ }, { /* 3758 */ 593, /* VFMADDPDr132rY */ }, { /* 3759 */ 590, /* VFMADDPDr213m */ }, { /* 3760 */ 591, /* VFMADDPDr213mY */ }, { /* 3761 */ 592, /* VFMADDPDr213r */ }, { /* 3762 */ 593, /* VFMADDPDr213rY */ }, { /* 3763 */ 590, /* VFMADDPDr231m */ }, { /* 3764 */ 591, /* VFMADDPDr231mY */ }, { /* 3765 */ 592, /* VFMADDPDr231r */ }, { /* 3766 */ 593, /* VFMADDPDr231rY */ }, { /* 3767 */ 394, /* VFMADDPS4mr */ }, { /* 3768 */ 392, /* VFMADDPS4mrY */ }, { /* 3769 */ 579, /* VFMADDPS4rm */ }, { /* 3770 */ 580, /* VFMADDPS4rmY */ }, { /* 3771 */ 581, /* VFMADDPS4rr */ }, { /* 3772 */ 582, /* VFMADDPS4rrY */ }, { /* 3773 */ 393, /* VFMADDPS4rrY_REV */ }, { /* 3774 */ 395, /* VFMADDPS4rr_REV */ }, { /* 3775 */ 570, /* VFMADDPSZ128v213rm */ }, { /* 3776 */ 576, /* VFMADDPSZ128v213rmb */ }, { /* 3777 */ 337, /* VFMADDPSZ128v213rmbk */ }, { /* 3778 */ 337, /* VFMADDPSZ128v213rmbkz */ }, { /* 3779 */ 339, /* VFMADDPSZ128v213rmk */ }, { /* 3780 */ 339, /* VFMADDPSZ128v213rmkz */ }, { /* 3781 */ 584, /* VFMADDPSZ128v213rr */ }, { /* 3782 */ 341, /* VFMADDPSZ128v213rrk */ }, { /* 3783 */ 341, /* VFMADDPSZ128v213rrkz */ }, { /* 3784 */ 570, /* VFMADDPSZ128v231rm */ }, { /* 3785 */ 576, /* VFMADDPSZ128v231rmb */ }, { /* 3786 */ 337, /* VFMADDPSZ128v231rmbk */ }, { /* 3787 */ 337, /* VFMADDPSZ128v231rmbkz */ }, { /* 3788 */ 339, /* VFMADDPSZ128v231rmk */ }, { /* 3789 */ 339, /* VFMADDPSZ128v231rmkz */ }, { /* 3790 */ 584, /* VFMADDPSZ128v231rr */ }, { /* 3791 */ 341, /* VFMADDPSZ128v231rrk */ }, { /* 3792 */ 341, /* VFMADDPSZ128v231rrkz */ }, { /* 3793 */ 572, /* VFMADDPSZ256v213rm */ }, { /* 3794 */ 577, /* VFMADDPSZ256v213rmb */ }, { /* 3795 */ 344, /* VFMADDPSZ256v213rmbk */ }, { /* 3796 */ 344, /* VFMADDPSZ256v213rmbkz */ }, { /* 3797 */ 346, /* VFMADDPSZ256v213rmk */ }, { /* 3798 */ 346, /* VFMADDPSZ256v213rmkz */ }, { /* 3799 */ 586, /* VFMADDPSZ256v213rr */ }, { /* 3800 */ 348, /* VFMADDPSZ256v213rrk */ }, { /* 3801 */ 348, /* VFMADDPSZ256v213rrkz */ }, { /* 3802 */ 572, /* VFMADDPSZ256v231rm */ }, { /* 3803 */ 577, /* VFMADDPSZ256v231rmb */ }, { /* 3804 */ 344, /* VFMADDPSZ256v231rmbk */ }, { /* 3805 */ 344, /* VFMADDPSZ256v231rmbkz */ }, { /* 3806 */ 346, /* VFMADDPSZ256v231rmk */ }, { /* 3807 */ 346, /* VFMADDPSZ256v231rmkz */ }, { /* 3808 */ 586, /* VFMADDPSZ256v231rr */ }, { /* 3809 */ 348, /* VFMADDPSZ256v231rrk */ }, { /* 3810 */ 348, /* VFMADDPSZ256v231rrkz */ }, { /* 3811 */ 574, /* VFMADDPSZv213rm */ }, { /* 3812 */ 578, /* VFMADDPSZv213rmb */ }, { /* 3813 */ 354, /* VFMADDPSZv213rmbk */ }, { /* 3814 */ 354, /* VFMADDPSZv213rmbkz */ }, { /* 3815 */ 356, /* VFMADDPSZv213rmk */ }, { /* 3816 */ 356, /* VFMADDPSZv213rmkz */ }, { /* 3817 */ 588, /* VFMADDPSZv213rr */ }, { /* 3818 */ 594, /* VFMADDPSZv213rrb */ }, { /* 3819 */ 351, /* VFMADDPSZv213rrbk */ }, { /* 3820 */ 351, /* VFMADDPSZv213rrbkz */ }, { /* 3821 */ 358, /* VFMADDPSZv213rrk */ }, { /* 3822 */ 358, /* VFMADDPSZv213rrkz */ }, { /* 3823 */ 574, /* VFMADDPSZv231rm */ }, { /* 3824 */ 578, /* VFMADDPSZv231rmb */ }, { /* 3825 */ 354, /* VFMADDPSZv231rmbk */ }, { /* 3826 */ 354, /* VFMADDPSZv231rmbkz */ }, { /* 3827 */ 356, /* VFMADDPSZv231rmk */ }, { /* 3828 */ 356, /* VFMADDPSZv231rmkz */ }, { /* 3829 */ 588, /* VFMADDPSZv231rr */ }, { /* 3830 */ 358, /* VFMADDPSZv231rrk */ }, { /* 3831 */ 358, /* VFMADDPSZv231rrkz */ }, { /* 3832 */ 590, /* VFMADDPSr132m */ }, { /* 3833 */ 591, /* VFMADDPSr132mY */ }, { /* 3834 */ 592, /* VFMADDPSr132r */ }, { /* 3835 */ 593, /* VFMADDPSr132rY */ }, { /* 3836 */ 590, /* VFMADDPSr213m */ }, { /* 3837 */ 591, /* VFMADDPSr213mY */ }, { /* 3838 */ 592, /* VFMADDPSr213r */ }, { /* 3839 */ 593, /* VFMADDPSr213rY */ }, { /* 3840 */ 590, /* VFMADDPSr231m */ }, { /* 3841 */ 591, /* VFMADDPSr231mY */ }, { /* 3842 */ 592, /* VFMADDPSr231r */ }, { /* 3843 */ 593, /* VFMADDPSr231rY */ }, { /* 3844 */ 595, /* VFMADDSD4mr */ }, { /* 3845 */ 0, /* */ }, { /* 3846 */ 596, /* VFMADDSD4rm */ }, { /* 3847 */ 0, /* */ }, { /* 3848 */ 597, /* VFMADDSD4rr */ }, { /* 3849 */ 0, /* */ }, { /* 3850 */ 598, /* VFMADDSD4rr_REV */ }, { /* 3851 */ 599, /* VFMADDSDZm */ }, { /* 3852 */ 600, /* VFMADDSDZr */ }, { /* 3853 */ 601, /* VFMADDSDr132m */ }, { /* 3854 */ 602, /* VFMADDSDr132r */ }, { /* 3855 */ 601, /* VFMADDSDr213m */ }, { /* 3856 */ 602, /* VFMADDSDr213r */ }, { /* 3857 */ 601, /* VFMADDSDr231m */ }, { /* 3858 */ 602, /* VFMADDSDr231r */ }, { /* 3859 */ 603, /* VFMADDSS4mr */ }, { /* 3860 */ 0, /* */ }, { /* 3861 */ 604, /* VFMADDSS4rm */ }, { /* 3862 */ 0, /* */ }, { /* 3863 */ 605, /* VFMADDSS4rr */ }, { /* 3864 */ 0, /* */ }, { /* 3865 */ 606, /* VFMADDSS4rr_REV */ }, { /* 3866 */ 607, /* VFMADDSSZm */ }, { /* 3867 */ 608, /* VFMADDSSZr */ }, { /* 3868 */ 609, /* VFMADDSSr132m */ }, { /* 3869 */ 610, /* VFMADDSSr132r */ }, { /* 3870 */ 609, /* VFMADDSSr213m */ }, { /* 3871 */ 610, /* VFMADDSSr213r */ }, { /* 3872 */ 609, /* VFMADDSSr231m */ }, { /* 3873 */ 610, /* VFMADDSSr231r */ }, { /* 3874 */ 570, /* VFMADDSUB132PDZ128m */ }, { /* 3875 */ 571, /* VFMADDSUB132PDZ128mb */ }, { /* 3876 */ 572, /* VFMADDSUB132PDZ256m */ }, { /* 3877 */ 573, /* VFMADDSUB132PDZ256mb */ }, { /* 3878 */ 574, /* VFMADDSUB132PDZm */ }, { /* 3879 */ 575, /* VFMADDSUB132PDZmb */ }, { /* 3880 */ 570, /* VFMADDSUB132PSZ128m */ }, { /* 3881 */ 576, /* VFMADDSUB132PSZ128mb */ }, { /* 3882 */ 572, /* VFMADDSUB132PSZ256m */ }, { /* 3883 */ 577, /* VFMADDSUB132PSZ256mb */ }, { /* 3884 */ 574, /* VFMADDSUB132PSZm */ }, { /* 3885 */ 578, /* VFMADDSUB132PSZmb */ }, { /* 3886 */ 394, /* VFMADDSUBPD4mr */ }, { /* 3887 */ 392, /* VFMADDSUBPD4mrY */ }, { /* 3888 */ 579, /* VFMADDSUBPD4rm */ }, { /* 3889 */ 580, /* VFMADDSUBPD4rmY */ }, { /* 3890 */ 581, /* VFMADDSUBPD4rr */ }, { /* 3891 */ 582, /* VFMADDSUBPD4rrY */ }, { /* 3892 */ 393, /* VFMADDSUBPD4rrY_REV */ }, { /* 3893 */ 395, /* VFMADDSUBPD4rr_REV */ }, { /* 3894 */ 570, /* VFMADDSUBPDZ128v213rm */ }, { /* 3895 */ 583, /* VFMADDSUBPDZ128v213rmb */ }, { /* 3896 */ 306, /* VFMADDSUBPDZ128v213rmbk */ }, { /* 3897 */ 306, /* VFMADDSUBPDZ128v213rmbkz */ }, { /* 3898 */ 308, /* VFMADDSUBPDZ128v213rmk */ }, { /* 3899 */ 308, /* VFMADDSUBPDZ128v213rmkz */ }, { /* 3900 */ 584, /* VFMADDSUBPDZ128v213rr */ }, { /* 3901 */ 311, /* VFMADDSUBPDZ128v213rrk */ }, { /* 3902 */ 311, /* VFMADDSUBPDZ128v213rrkz */ }, { /* 3903 */ 570, /* VFMADDSUBPDZ128v231rm */ }, { /* 3904 */ 583, /* VFMADDSUBPDZ128v231rmb */ }, { /* 3905 */ 306, /* VFMADDSUBPDZ128v231rmbk */ }, { /* 3906 */ 306, /* VFMADDSUBPDZ128v231rmbkz */ }, { /* 3907 */ 308, /* VFMADDSUBPDZ128v231rmk */ }, { /* 3908 */ 308, /* VFMADDSUBPDZ128v231rmkz */ }, { /* 3909 */ 584, /* VFMADDSUBPDZ128v231rr */ }, { /* 3910 */ 311, /* VFMADDSUBPDZ128v231rrk */ }, { /* 3911 */ 311, /* VFMADDSUBPDZ128v231rrkz */ }, { /* 3912 */ 572, /* VFMADDSUBPDZ256v213rm */ }, { /* 3913 */ 585, /* VFMADDSUBPDZ256v213rmb */ }, { /* 3914 */ 315, /* VFMADDSUBPDZ256v213rmbk */ }, { /* 3915 */ 315, /* VFMADDSUBPDZ256v213rmbkz */ }, { /* 3916 */ 317, /* VFMADDSUBPDZ256v213rmk */ }, { /* 3917 */ 317, /* VFMADDSUBPDZ256v213rmkz */ }, { /* 3918 */ 586, /* VFMADDSUBPDZ256v213rr */ }, { /* 3919 */ 320, /* VFMADDSUBPDZ256v213rrk */ }, { /* 3920 */ 320, /* VFMADDSUBPDZ256v213rrkz */ }, { /* 3921 */ 572, /* VFMADDSUBPDZ256v231rm */ }, { /* 3922 */ 585, /* VFMADDSUBPDZ256v231rmb */ }, { /* 3923 */ 315, /* VFMADDSUBPDZ256v231rmbk */ }, { /* 3924 */ 315, /* VFMADDSUBPDZ256v231rmbkz */ }, { /* 3925 */ 317, /* VFMADDSUBPDZ256v231rmk */ }, { /* 3926 */ 317, /* VFMADDSUBPDZ256v231rmkz */ }, { /* 3927 */ 586, /* VFMADDSUBPDZ256v231rr */ }, { /* 3928 */ 320, /* VFMADDSUBPDZ256v231rrk */ }, { /* 3929 */ 320, /* VFMADDSUBPDZ256v231rrkz */ }, { /* 3930 */ 574, /* VFMADDSUBPDZv213rm */ }, { /* 3931 */ 587, /* VFMADDSUBPDZv213rmb */ }, { /* 3932 */ 327, /* VFMADDSUBPDZv213rmbk */ }, { /* 3933 */ 327, /* VFMADDSUBPDZv213rmbkz */ }, { /* 3934 */ 329, /* VFMADDSUBPDZv213rmk */ }, { /* 3935 */ 329, /* VFMADDSUBPDZv213rmkz */ }, { /* 3936 */ 588, /* VFMADDSUBPDZv213rr */ }, { /* 3937 */ 589, /* VFMADDSUBPDZv213rrb */ }, { /* 3938 */ 323, /* VFMADDSUBPDZv213rrbk */ }, { /* 3939 */ 323, /* VFMADDSUBPDZv213rrbkz */ }, { /* 3940 */ 332, /* VFMADDSUBPDZv213rrk */ }, { /* 3941 */ 332, /* VFMADDSUBPDZv213rrkz */ }, { /* 3942 */ 574, /* VFMADDSUBPDZv231rm */ }, { /* 3943 */ 587, /* VFMADDSUBPDZv231rmb */ }, { /* 3944 */ 327, /* VFMADDSUBPDZv231rmbk */ }, { /* 3945 */ 327, /* VFMADDSUBPDZv231rmbkz */ }, { /* 3946 */ 329, /* VFMADDSUBPDZv231rmk */ }, { /* 3947 */ 329, /* VFMADDSUBPDZv231rmkz */ }, { /* 3948 */ 588, /* VFMADDSUBPDZv231rr */ }, { /* 3949 */ 332, /* VFMADDSUBPDZv231rrk */ }, { /* 3950 */ 332, /* VFMADDSUBPDZv231rrkz */ }, { /* 3951 */ 590, /* VFMADDSUBPDr132m */ }, { /* 3952 */ 591, /* VFMADDSUBPDr132mY */ }, { /* 3953 */ 592, /* VFMADDSUBPDr132r */ }, { /* 3954 */ 593, /* VFMADDSUBPDr132rY */ }, { /* 3955 */ 590, /* VFMADDSUBPDr213m */ }, { /* 3956 */ 591, /* VFMADDSUBPDr213mY */ }, { /* 3957 */ 592, /* VFMADDSUBPDr213r */ }, { /* 3958 */ 593, /* VFMADDSUBPDr213rY */ }, { /* 3959 */ 590, /* VFMADDSUBPDr231m */ }, { /* 3960 */ 591, /* VFMADDSUBPDr231mY */ }, { /* 3961 */ 592, /* VFMADDSUBPDr231r */ }, { /* 3962 */ 593, /* VFMADDSUBPDr231rY */ }, { /* 3963 */ 394, /* VFMADDSUBPS4mr */ }, { /* 3964 */ 392, /* VFMADDSUBPS4mrY */ }, { /* 3965 */ 579, /* VFMADDSUBPS4rm */ }, { /* 3966 */ 580, /* VFMADDSUBPS4rmY */ }, { /* 3967 */ 581, /* VFMADDSUBPS4rr */ }, { /* 3968 */ 582, /* VFMADDSUBPS4rrY */ }, { /* 3969 */ 393, /* VFMADDSUBPS4rrY_REV */ }, { /* 3970 */ 395, /* VFMADDSUBPS4rr_REV */ }, { /* 3971 */ 570, /* VFMADDSUBPSZ128v213rm */ }, { /* 3972 */ 576, /* VFMADDSUBPSZ128v213rmb */ }, { /* 3973 */ 337, /* VFMADDSUBPSZ128v213rmbk */ }, { /* 3974 */ 337, /* VFMADDSUBPSZ128v213rmbkz */ }, { /* 3975 */ 339, /* VFMADDSUBPSZ128v213rmk */ }, { /* 3976 */ 339, /* VFMADDSUBPSZ128v213rmkz */ }, { /* 3977 */ 584, /* VFMADDSUBPSZ128v213rr */ }, { /* 3978 */ 341, /* VFMADDSUBPSZ128v213rrk */ }, { /* 3979 */ 341, /* VFMADDSUBPSZ128v213rrkz */ }, { /* 3980 */ 570, /* VFMADDSUBPSZ128v231rm */ }, { /* 3981 */ 576, /* VFMADDSUBPSZ128v231rmb */ }, { /* 3982 */ 337, /* VFMADDSUBPSZ128v231rmbk */ }, { /* 3983 */ 337, /* VFMADDSUBPSZ128v231rmbkz */ }, { /* 3984 */ 339, /* VFMADDSUBPSZ128v231rmk */ }, { /* 3985 */ 339, /* VFMADDSUBPSZ128v231rmkz */ }, { /* 3986 */ 584, /* VFMADDSUBPSZ128v231rr */ }, { /* 3987 */ 341, /* VFMADDSUBPSZ128v231rrk */ }, { /* 3988 */ 341, /* VFMADDSUBPSZ128v231rrkz */ }, { /* 3989 */ 572, /* VFMADDSUBPSZ256v213rm */ }, { /* 3990 */ 577, /* VFMADDSUBPSZ256v213rmb */ }, { /* 3991 */ 344, /* VFMADDSUBPSZ256v213rmbk */ }, { /* 3992 */ 344, /* VFMADDSUBPSZ256v213rmbkz */ }, { /* 3993 */ 346, /* VFMADDSUBPSZ256v213rmk */ }, { /* 3994 */ 346, /* VFMADDSUBPSZ256v213rmkz */ }, { /* 3995 */ 586, /* VFMADDSUBPSZ256v213rr */ }, { /* 3996 */ 348, /* VFMADDSUBPSZ256v213rrk */ }, { /* 3997 */ 348, /* VFMADDSUBPSZ256v213rrkz */ }, { /* 3998 */ 572, /* VFMADDSUBPSZ256v231rm */ }, { /* 3999 */ 577, /* VFMADDSUBPSZ256v231rmb */ }, { /* 4000 */ 344, /* VFMADDSUBPSZ256v231rmbk */ }, { /* 4001 */ 344, /* VFMADDSUBPSZ256v231rmbkz */ }, { /* 4002 */ 346, /* VFMADDSUBPSZ256v231rmk */ }, { /* 4003 */ 346, /* VFMADDSUBPSZ256v231rmkz */ }, { /* 4004 */ 586, /* VFMADDSUBPSZ256v231rr */ }, { /* 4005 */ 348, /* VFMADDSUBPSZ256v231rrk */ }, { /* 4006 */ 348, /* VFMADDSUBPSZ256v231rrkz */ }, { /* 4007 */ 574, /* VFMADDSUBPSZv213rm */ }, { /* 4008 */ 578, /* VFMADDSUBPSZv213rmb */ }, { /* 4009 */ 354, /* VFMADDSUBPSZv213rmbk */ }, { /* 4010 */ 354, /* VFMADDSUBPSZv213rmbkz */ }, { /* 4011 */ 356, /* VFMADDSUBPSZv213rmk */ }, { /* 4012 */ 356, /* VFMADDSUBPSZv213rmkz */ }, { /* 4013 */ 588, /* VFMADDSUBPSZv213rr */ }, { /* 4014 */ 594, /* VFMADDSUBPSZv213rrb */ }, { /* 4015 */ 351, /* VFMADDSUBPSZv213rrbk */ }, { /* 4016 */ 351, /* VFMADDSUBPSZv213rrbkz */ }, { /* 4017 */ 358, /* VFMADDSUBPSZv213rrk */ }, { /* 4018 */ 358, /* VFMADDSUBPSZv213rrkz */ }, { /* 4019 */ 574, /* VFMADDSUBPSZv231rm */ }, { /* 4020 */ 578, /* VFMADDSUBPSZv231rmb */ }, { /* 4021 */ 354, /* VFMADDSUBPSZv231rmbk */ }, { /* 4022 */ 354, /* VFMADDSUBPSZv231rmbkz */ }, { /* 4023 */ 356, /* VFMADDSUBPSZv231rmk */ }, { /* 4024 */ 356, /* VFMADDSUBPSZv231rmkz */ }, { /* 4025 */ 588, /* VFMADDSUBPSZv231rr */ }, { /* 4026 */ 358, /* VFMADDSUBPSZv231rrk */ }, { /* 4027 */ 358, /* VFMADDSUBPSZv231rrkz */ }, { /* 4028 */ 590, /* VFMADDSUBPSr132m */ }, { /* 4029 */ 591, /* VFMADDSUBPSr132mY */ }, { /* 4030 */ 592, /* VFMADDSUBPSr132r */ }, { /* 4031 */ 593, /* VFMADDSUBPSr132rY */ }, { /* 4032 */ 590, /* VFMADDSUBPSr213m */ }, { /* 4033 */ 591, /* VFMADDSUBPSr213mY */ }, { /* 4034 */ 592, /* VFMADDSUBPSr213r */ }, { /* 4035 */ 593, /* VFMADDSUBPSr213rY */ }, { /* 4036 */ 590, /* VFMADDSUBPSr231m */ }, { /* 4037 */ 591, /* VFMADDSUBPSr231mY */ }, { /* 4038 */ 592, /* VFMADDSUBPSr231r */ }, { /* 4039 */ 593, /* VFMADDSUBPSr231rY */ }, { /* 4040 */ 570, /* VFMSUB132PDZ128m */ }, { /* 4041 */ 571, /* VFMSUB132PDZ128mb */ }, { /* 4042 */ 572, /* VFMSUB132PDZ256m */ }, { /* 4043 */ 573, /* VFMSUB132PDZ256mb */ }, { /* 4044 */ 574, /* VFMSUB132PDZm */ }, { /* 4045 */ 575, /* VFMSUB132PDZmb */ }, { /* 4046 */ 570, /* VFMSUB132PSZ128m */ }, { /* 4047 */ 576, /* VFMSUB132PSZ128mb */ }, { /* 4048 */ 572, /* VFMSUB132PSZ256m */ }, { /* 4049 */ 577, /* VFMSUB132PSZ256mb */ }, { /* 4050 */ 574, /* VFMSUB132PSZm */ }, { /* 4051 */ 578, /* VFMSUB132PSZmb */ }, { /* 4052 */ 570, /* VFMSUBADD132PDZ128m */ }, { /* 4053 */ 571, /* VFMSUBADD132PDZ128mb */ }, { /* 4054 */ 572, /* VFMSUBADD132PDZ256m */ }, { /* 4055 */ 573, /* VFMSUBADD132PDZ256mb */ }, { /* 4056 */ 574, /* VFMSUBADD132PDZm */ }, { /* 4057 */ 575, /* VFMSUBADD132PDZmb */ }, { /* 4058 */ 570, /* VFMSUBADD132PSZ128m */ }, { /* 4059 */ 576, /* VFMSUBADD132PSZ128mb */ }, { /* 4060 */ 572, /* VFMSUBADD132PSZ256m */ }, { /* 4061 */ 577, /* VFMSUBADD132PSZ256mb */ }, { /* 4062 */ 574, /* VFMSUBADD132PSZm */ }, { /* 4063 */ 578, /* VFMSUBADD132PSZmb */ }, { /* 4064 */ 394, /* VFMSUBADDPD4mr */ }, { /* 4065 */ 392, /* VFMSUBADDPD4mrY */ }, { /* 4066 */ 579, /* VFMSUBADDPD4rm */ }, { /* 4067 */ 580, /* VFMSUBADDPD4rmY */ }, { /* 4068 */ 581, /* VFMSUBADDPD4rr */ }, { /* 4069 */ 582, /* VFMSUBADDPD4rrY */ }, { /* 4070 */ 393, /* VFMSUBADDPD4rrY_REV */ }, { /* 4071 */ 395, /* VFMSUBADDPD4rr_REV */ }, { /* 4072 */ 570, /* VFMSUBADDPDZ128v213rm */ }, { /* 4073 */ 583, /* VFMSUBADDPDZ128v213rmb */ }, { /* 4074 */ 306, /* VFMSUBADDPDZ128v213rmbk */ }, { /* 4075 */ 306, /* VFMSUBADDPDZ128v213rmbkz */ }, { /* 4076 */ 308, /* VFMSUBADDPDZ128v213rmk */ }, { /* 4077 */ 308, /* VFMSUBADDPDZ128v213rmkz */ }, { /* 4078 */ 584, /* VFMSUBADDPDZ128v213rr */ }, { /* 4079 */ 311, /* VFMSUBADDPDZ128v213rrk */ }, { /* 4080 */ 311, /* VFMSUBADDPDZ128v213rrkz */ }, { /* 4081 */ 570, /* VFMSUBADDPDZ128v231rm */ }, { /* 4082 */ 583, /* VFMSUBADDPDZ128v231rmb */ }, { /* 4083 */ 306, /* VFMSUBADDPDZ128v231rmbk */ }, { /* 4084 */ 306, /* VFMSUBADDPDZ128v231rmbkz */ }, { /* 4085 */ 308, /* VFMSUBADDPDZ128v231rmk */ }, { /* 4086 */ 308, /* VFMSUBADDPDZ128v231rmkz */ }, { /* 4087 */ 584, /* VFMSUBADDPDZ128v231rr */ }, { /* 4088 */ 311, /* VFMSUBADDPDZ128v231rrk */ }, { /* 4089 */ 311, /* VFMSUBADDPDZ128v231rrkz */ }, { /* 4090 */ 572, /* VFMSUBADDPDZ256v213rm */ }, { /* 4091 */ 585, /* VFMSUBADDPDZ256v213rmb */ }, { /* 4092 */ 315, /* VFMSUBADDPDZ256v213rmbk */ }, { /* 4093 */ 315, /* VFMSUBADDPDZ256v213rmbkz */ }, { /* 4094 */ 317, /* VFMSUBADDPDZ256v213rmk */ }, { /* 4095 */ 317, /* VFMSUBADDPDZ256v213rmkz */ }, { /* 4096 */ 586, /* VFMSUBADDPDZ256v213rr */ }, { /* 4097 */ 320, /* VFMSUBADDPDZ256v213rrk */ }, { /* 4098 */ 320, /* VFMSUBADDPDZ256v213rrkz */ }, { /* 4099 */ 572, /* VFMSUBADDPDZ256v231rm */ }, { /* 4100 */ 585, /* VFMSUBADDPDZ256v231rmb */ }, { /* 4101 */ 315, /* VFMSUBADDPDZ256v231rmbk */ }, { /* 4102 */ 315, /* VFMSUBADDPDZ256v231rmbkz */ }, { /* 4103 */ 317, /* VFMSUBADDPDZ256v231rmk */ }, { /* 4104 */ 317, /* VFMSUBADDPDZ256v231rmkz */ }, { /* 4105 */ 586, /* VFMSUBADDPDZ256v231rr */ }, { /* 4106 */ 320, /* VFMSUBADDPDZ256v231rrk */ }, { /* 4107 */ 320, /* VFMSUBADDPDZ256v231rrkz */ }, { /* 4108 */ 574, /* VFMSUBADDPDZv213rm */ }, { /* 4109 */ 587, /* VFMSUBADDPDZv213rmb */ }, { /* 4110 */ 327, /* VFMSUBADDPDZv213rmbk */ }, { /* 4111 */ 327, /* VFMSUBADDPDZv213rmbkz */ }, { /* 4112 */ 329, /* VFMSUBADDPDZv213rmk */ }, { /* 4113 */ 329, /* VFMSUBADDPDZv213rmkz */ }, { /* 4114 */ 588, /* VFMSUBADDPDZv213rr */ }, { /* 4115 */ 589, /* VFMSUBADDPDZv213rrb */ }, { /* 4116 */ 323, /* VFMSUBADDPDZv213rrbk */ }, { /* 4117 */ 323, /* VFMSUBADDPDZv213rrbkz */ }, { /* 4118 */ 332, /* VFMSUBADDPDZv213rrk */ }, { /* 4119 */ 332, /* VFMSUBADDPDZv213rrkz */ }, { /* 4120 */ 574, /* VFMSUBADDPDZv231rm */ }, { /* 4121 */ 587, /* VFMSUBADDPDZv231rmb */ }, { /* 4122 */ 327, /* VFMSUBADDPDZv231rmbk */ }, { /* 4123 */ 327, /* VFMSUBADDPDZv231rmbkz */ }, { /* 4124 */ 329, /* VFMSUBADDPDZv231rmk */ }, { /* 4125 */ 329, /* VFMSUBADDPDZv231rmkz */ }, { /* 4126 */ 588, /* VFMSUBADDPDZv231rr */ }, { /* 4127 */ 332, /* VFMSUBADDPDZv231rrk */ }, { /* 4128 */ 332, /* VFMSUBADDPDZv231rrkz */ }, { /* 4129 */ 590, /* VFMSUBADDPDr132m */ }, { /* 4130 */ 591, /* VFMSUBADDPDr132mY */ }, { /* 4131 */ 592, /* VFMSUBADDPDr132r */ }, { /* 4132 */ 593, /* VFMSUBADDPDr132rY */ }, { /* 4133 */ 590, /* VFMSUBADDPDr213m */ }, { /* 4134 */ 591, /* VFMSUBADDPDr213mY */ }, { /* 4135 */ 592, /* VFMSUBADDPDr213r */ }, { /* 4136 */ 593, /* VFMSUBADDPDr213rY */ }, { /* 4137 */ 590, /* VFMSUBADDPDr231m */ }, { /* 4138 */ 591, /* VFMSUBADDPDr231mY */ }, { /* 4139 */ 592, /* VFMSUBADDPDr231r */ }, { /* 4140 */ 593, /* VFMSUBADDPDr231rY */ }, { /* 4141 */ 394, /* VFMSUBADDPS4mr */ }, { /* 4142 */ 392, /* VFMSUBADDPS4mrY */ }, { /* 4143 */ 579, /* VFMSUBADDPS4rm */ }, { /* 4144 */ 580, /* VFMSUBADDPS4rmY */ }, { /* 4145 */ 581, /* VFMSUBADDPS4rr */ }, { /* 4146 */ 582, /* VFMSUBADDPS4rrY */ }, { /* 4147 */ 393, /* VFMSUBADDPS4rrY_REV */ }, { /* 4148 */ 395, /* VFMSUBADDPS4rr_REV */ }, { /* 4149 */ 570, /* VFMSUBADDPSZ128v213rm */ }, { /* 4150 */ 576, /* VFMSUBADDPSZ128v213rmb */ }, { /* 4151 */ 337, /* VFMSUBADDPSZ128v213rmbk */ }, { /* 4152 */ 337, /* VFMSUBADDPSZ128v213rmbkz */ }, { /* 4153 */ 339, /* VFMSUBADDPSZ128v213rmk */ }, { /* 4154 */ 339, /* VFMSUBADDPSZ128v213rmkz */ }, { /* 4155 */ 584, /* VFMSUBADDPSZ128v213rr */ }, { /* 4156 */ 341, /* VFMSUBADDPSZ128v213rrk */ }, { /* 4157 */ 341, /* VFMSUBADDPSZ128v213rrkz */ }, { /* 4158 */ 570, /* VFMSUBADDPSZ128v231rm */ }, { /* 4159 */ 576, /* VFMSUBADDPSZ128v231rmb */ }, { /* 4160 */ 337, /* VFMSUBADDPSZ128v231rmbk */ }, { /* 4161 */ 337, /* VFMSUBADDPSZ128v231rmbkz */ }, { /* 4162 */ 339, /* VFMSUBADDPSZ128v231rmk */ }, { /* 4163 */ 339, /* VFMSUBADDPSZ128v231rmkz */ }, { /* 4164 */ 584, /* VFMSUBADDPSZ128v231rr */ }, { /* 4165 */ 341, /* VFMSUBADDPSZ128v231rrk */ }, { /* 4166 */ 341, /* VFMSUBADDPSZ128v231rrkz */ }, { /* 4167 */ 572, /* VFMSUBADDPSZ256v213rm */ }, { /* 4168 */ 577, /* VFMSUBADDPSZ256v213rmb */ }, { /* 4169 */ 344, /* VFMSUBADDPSZ256v213rmbk */ }, { /* 4170 */ 344, /* VFMSUBADDPSZ256v213rmbkz */ }, { /* 4171 */ 346, /* VFMSUBADDPSZ256v213rmk */ }, { /* 4172 */ 346, /* VFMSUBADDPSZ256v213rmkz */ }, { /* 4173 */ 586, /* VFMSUBADDPSZ256v213rr */ }, { /* 4174 */ 348, /* VFMSUBADDPSZ256v213rrk */ }, { /* 4175 */ 348, /* VFMSUBADDPSZ256v213rrkz */ }, { /* 4176 */ 572, /* VFMSUBADDPSZ256v231rm */ }, { /* 4177 */ 577, /* VFMSUBADDPSZ256v231rmb */ }, { /* 4178 */ 344, /* VFMSUBADDPSZ256v231rmbk */ }, { /* 4179 */ 344, /* VFMSUBADDPSZ256v231rmbkz */ }, { /* 4180 */ 346, /* VFMSUBADDPSZ256v231rmk */ }, { /* 4181 */ 346, /* VFMSUBADDPSZ256v231rmkz */ }, { /* 4182 */ 586, /* VFMSUBADDPSZ256v231rr */ }, { /* 4183 */ 348, /* VFMSUBADDPSZ256v231rrk */ }, { /* 4184 */ 348, /* VFMSUBADDPSZ256v231rrkz */ }, { /* 4185 */ 574, /* VFMSUBADDPSZv213rm */ }, { /* 4186 */ 578, /* VFMSUBADDPSZv213rmb */ }, { /* 4187 */ 354, /* VFMSUBADDPSZv213rmbk */ }, { /* 4188 */ 354, /* VFMSUBADDPSZv213rmbkz */ }, { /* 4189 */ 356, /* VFMSUBADDPSZv213rmk */ }, { /* 4190 */ 356, /* VFMSUBADDPSZv213rmkz */ }, { /* 4191 */ 588, /* VFMSUBADDPSZv213rr */ }, { /* 4192 */ 594, /* VFMSUBADDPSZv213rrb */ }, { /* 4193 */ 351, /* VFMSUBADDPSZv213rrbk */ }, { /* 4194 */ 351, /* VFMSUBADDPSZv213rrbkz */ }, { /* 4195 */ 358, /* VFMSUBADDPSZv213rrk */ }, { /* 4196 */ 358, /* VFMSUBADDPSZv213rrkz */ }, { /* 4197 */ 574, /* VFMSUBADDPSZv231rm */ }, { /* 4198 */ 578, /* VFMSUBADDPSZv231rmb */ }, { /* 4199 */ 354, /* VFMSUBADDPSZv231rmbk */ }, { /* 4200 */ 354, /* VFMSUBADDPSZv231rmbkz */ }, { /* 4201 */ 356, /* VFMSUBADDPSZv231rmk */ }, { /* 4202 */ 356, /* VFMSUBADDPSZv231rmkz */ }, { /* 4203 */ 588, /* VFMSUBADDPSZv231rr */ }, { /* 4204 */ 358, /* VFMSUBADDPSZv231rrk */ }, { /* 4205 */ 358, /* VFMSUBADDPSZv231rrkz */ }, { /* 4206 */ 590, /* VFMSUBADDPSr132m */ }, { /* 4207 */ 591, /* VFMSUBADDPSr132mY */ }, { /* 4208 */ 592, /* VFMSUBADDPSr132r */ }, { /* 4209 */ 593, /* VFMSUBADDPSr132rY */ }, { /* 4210 */ 590, /* VFMSUBADDPSr213m */ }, { /* 4211 */ 591, /* VFMSUBADDPSr213mY */ }, { /* 4212 */ 592, /* VFMSUBADDPSr213r */ }, { /* 4213 */ 593, /* VFMSUBADDPSr213rY */ }, { /* 4214 */ 590, /* VFMSUBADDPSr231m */ }, { /* 4215 */ 591, /* VFMSUBADDPSr231mY */ }, { /* 4216 */ 592, /* VFMSUBADDPSr231r */ }, { /* 4217 */ 593, /* VFMSUBADDPSr231rY */ }, { /* 4218 */ 394, /* VFMSUBPD4mr */ }, { /* 4219 */ 392, /* VFMSUBPD4mrY */ }, { /* 4220 */ 579, /* VFMSUBPD4rm */ }, { /* 4221 */ 580, /* VFMSUBPD4rmY */ }, { /* 4222 */ 581, /* VFMSUBPD4rr */ }, { /* 4223 */ 582, /* VFMSUBPD4rrY */ }, { /* 4224 */ 393, /* VFMSUBPD4rrY_REV */ }, { /* 4225 */ 395, /* VFMSUBPD4rr_REV */ }, { /* 4226 */ 570, /* VFMSUBPDZ128v213rm */ }, { /* 4227 */ 583, /* VFMSUBPDZ128v213rmb */ }, { /* 4228 */ 306, /* VFMSUBPDZ128v213rmbk */ }, { /* 4229 */ 306, /* VFMSUBPDZ128v213rmbkz */ }, { /* 4230 */ 308, /* VFMSUBPDZ128v213rmk */ }, { /* 4231 */ 308, /* VFMSUBPDZ128v213rmkz */ }, { /* 4232 */ 584, /* VFMSUBPDZ128v213rr */ }, { /* 4233 */ 311, /* VFMSUBPDZ128v213rrk */ }, { /* 4234 */ 311, /* VFMSUBPDZ128v213rrkz */ }, { /* 4235 */ 570, /* VFMSUBPDZ128v231rm */ }, { /* 4236 */ 583, /* VFMSUBPDZ128v231rmb */ }, { /* 4237 */ 306, /* VFMSUBPDZ128v231rmbk */ }, { /* 4238 */ 306, /* VFMSUBPDZ128v231rmbkz */ }, { /* 4239 */ 308, /* VFMSUBPDZ128v231rmk */ }, { /* 4240 */ 308, /* VFMSUBPDZ128v231rmkz */ }, { /* 4241 */ 584, /* VFMSUBPDZ128v231rr */ }, { /* 4242 */ 311, /* VFMSUBPDZ128v231rrk */ }, { /* 4243 */ 311, /* VFMSUBPDZ128v231rrkz */ }, { /* 4244 */ 572, /* VFMSUBPDZ256v213rm */ }, { /* 4245 */ 585, /* VFMSUBPDZ256v213rmb */ }, { /* 4246 */ 315, /* VFMSUBPDZ256v213rmbk */ }, { /* 4247 */ 315, /* VFMSUBPDZ256v213rmbkz */ }, { /* 4248 */ 317, /* VFMSUBPDZ256v213rmk */ }, { /* 4249 */ 317, /* VFMSUBPDZ256v213rmkz */ }, { /* 4250 */ 586, /* VFMSUBPDZ256v213rr */ }, { /* 4251 */ 320, /* VFMSUBPDZ256v213rrk */ }, { /* 4252 */ 320, /* VFMSUBPDZ256v213rrkz */ }, { /* 4253 */ 572, /* VFMSUBPDZ256v231rm */ }, { /* 4254 */ 585, /* VFMSUBPDZ256v231rmb */ }, { /* 4255 */ 315, /* VFMSUBPDZ256v231rmbk */ }, { /* 4256 */ 315, /* VFMSUBPDZ256v231rmbkz */ }, { /* 4257 */ 317, /* VFMSUBPDZ256v231rmk */ }, { /* 4258 */ 317, /* VFMSUBPDZ256v231rmkz */ }, { /* 4259 */ 586, /* VFMSUBPDZ256v231rr */ }, { /* 4260 */ 320, /* VFMSUBPDZ256v231rrk */ }, { /* 4261 */ 320, /* VFMSUBPDZ256v231rrkz */ }, { /* 4262 */ 574, /* VFMSUBPDZv213rm */ }, { /* 4263 */ 587, /* VFMSUBPDZv213rmb */ }, { /* 4264 */ 327, /* VFMSUBPDZv213rmbk */ }, { /* 4265 */ 327, /* VFMSUBPDZv213rmbkz */ }, { /* 4266 */ 329, /* VFMSUBPDZv213rmk */ }, { /* 4267 */ 329, /* VFMSUBPDZv213rmkz */ }, { /* 4268 */ 588, /* VFMSUBPDZv213rr */ }, { /* 4269 */ 589, /* VFMSUBPDZv213rrb */ }, { /* 4270 */ 323, /* VFMSUBPDZv213rrbk */ }, { /* 4271 */ 323, /* VFMSUBPDZv213rrbkz */ }, { /* 4272 */ 332, /* VFMSUBPDZv213rrk */ }, { /* 4273 */ 332, /* VFMSUBPDZv213rrkz */ }, { /* 4274 */ 574, /* VFMSUBPDZv231rm */ }, { /* 4275 */ 587, /* VFMSUBPDZv231rmb */ }, { /* 4276 */ 327, /* VFMSUBPDZv231rmbk */ }, { /* 4277 */ 327, /* VFMSUBPDZv231rmbkz */ }, { /* 4278 */ 329, /* VFMSUBPDZv231rmk */ }, { /* 4279 */ 329, /* VFMSUBPDZv231rmkz */ }, { /* 4280 */ 588, /* VFMSUBPDZv231rr */ }, { /* 4281 */ 332, /* VFMSUBPDZv231rrk */ }, { /* 4282 */ 332, /* VFMSUBPDZv231rrkz */ }, { /* 4283 */ 590, /* VFMSUBPDr132m */ }, { /* 4284 */ 591, /* VFMSUBPDr132mY */ }, { /* 4285 */ 592, /* VFMSUBPDr132r */ }, { /* 4286 */ 593, /* VFMSUBPDr132rY */ }, { /* 4287 */ 590, /* VFMSUBPDr213m */ }, { /* 4288 */ 591, /* VFMSUBPDr213mY */ }, { /* 4289 */ 592, /* VFMSUBPDr213r */ }, { /* 4290 */ 593, /* VFMSUBPDr213rY */ }, { /* 4291 */ 590, /* VFMSUBPDr231m */ }, { /* 4292 */ 591, /* VFMSUBPDr231mY */ }, { /* 4293 */ 592, /* VFMSUBPDr231r */ }, { /* 4294 */ 593, /* VFMSUBPDr231rY */ }, { /* 4295 */ 394, /* VFMSUBPS4mr */ }, { /* 4296 */ 392, /* VFMSUBPS4mrY */ }, { /* 4297 */ 579, /* VFMSUBPS4rm */ }, { /* 4298 */ 580, /* VFMSUBPS4rmY */ }, { /* 4299 */ 581, /* VFMSUBPS4rr */ }, { /* 4300 */ 582, /* VFMSUBPS4rrY */ }, { /* 4301 */ 393, /* VFMSUBPS4rrY_REV */ }, { /* 4302 */ 395, /* VFMSUBPS4rr_REV */ }, { /* 4303 */ 570, /* VFMSUBPSZ128v213rm */ }, { /* 4304 */ 576, /* VFMSUBPSZ128v213rmb */ }, { /* 4305 */ 337, /* VFMSUBPSZ128v213rmbk */ }, { /* 4306 */ 337, /* VFMSUBPSZ128v213rmbkz */ }, { /* 4307 */ 339, /* VFMSUBPSZ128v213rmk */ }, { /* 4308 */ 339, /* VFMSUBPSZ128v213rmkz */ }, { /* 4309 */ 584, /* VFMSUBPSZ128v213rr */ }, { /* 4310 */ 341, /* VFMSUBPSZ128v213rrk */ }, { /* 4311 */ 341, /* VFMSUBPSZ128v213rrkz */ }, { /* 4312 */ 570, /* VFMSUBPSZ128v231rm */ }, { /* 4313 */ 576, /* VFMSUBPSZ128v231rmb */ }, { /* 4314 */ 337, /* VFMSUBPSZ128v231rmbk */ }, { /* 4315 */ 337, /* VFMSUBPSZ128v231rmbkz */ }, { /* 4316 */ 339, /* VFMSUBPSZ128v231rmk */ }, { /* 4317 */ 339, /* VFMSUBPSZ128v231rmkz */ }, { /* 4318 */ 584, /* VFMSUBPSZ128v231rr */ }, { /* 4319 */ 341, /* VFMSUBPSZ128v231rrk */ }, { /* 4320 */ 341, /* VFMSUBPSZ128v231rrkz */ }, { /* 4321 */ 572, /* VFMSUBPSZ256v213rm */ }, { /* 4322 */ 577, /* VFMSUBPSZ256v213rmb */ }, { /* 4323 */ 344, /* VFMSUBPSZ256v213rmbk */ }, { /* 4324 */ 344, /* VFMSUBPSZ256v213rmbkz */ }, { /* 4325 */ 346, /* VFMSUBPSZ256v213rmk */ }, { /* 4326 */ 346, /* VFMSUBPSZ256v213rmkz */ }, { /* 4327 */ 586, /* VFMSUBPSZ256v213rr */ }, { /* 4328 */ 348, /* VFMSUBPSZ256v213rrk */ }, { /* 4329 */ 348, /* VFMSUBPSZ256v213rrkz */ }, { /* 4330 */ 572, /* VFMSUBPSZ256v231rm */ }, { /* 4331 */ 577, /* VFMSUBPSZ256v231rmb */ }, { /* 4332 */ 344, /* VFMSUBPSZ256v231rmbk */ }, { /* 4333 */ 344, /* VFMSUBPSZ256v231rmbkz */ }, { /* 4334 */ 346, /* VFMSUBPSZ256v231rmk */ }, { /* 4335 */ 346, /* VFMSUBPSZ256v231rmkz */ }, { /* 4336 */ 586, /* VFMSUBPSZ256v231rr */ }, { /* 4337 */ 348, /* VFMSUBPSZ256v231rrk */ }, { /* 4338 */ 348, /* VFMSUBPSZ256v231rrkz */ }, { /* 4339 */ 574, /* VFMSUBPSZv213rm */ }, { /* 4340 */ 578, /* VFMSUBPSZv213rmb */ }, { /* 4341 */ 354, /* VFMSUBPSZv213rmbk */ }, { /* 4342 */ 354, /* VFMSUBPSZv213rmbkz */ }, { /* 4343 */ 356, /* VFMSUBPSZv213rmk */ }, { /* 4344 */ 356, /* VFMSUBPSZv213rmkz */ }, { /* 4345 */ 588, /* VFMSUBPSZv213rr */ }, { /* 4346 */ 594, /* VFMSUBPSZv213rrb */ }, { /* 4347 */ 351, /* VFMSUBPSZv213rrbk */ }, { /* 4348 */ 351, /* VFMSUBPSZv213rrbkz */ }, { /* 4349 */ 358, /* VFMSUBPSZv213rrk */ }, { /* 4350 */ 358, /* VFMSUBPSZv213rrkz */ }, { /* 4351 */ 574, /* VFMSUBPSZv231rm */ }, { /* 4352 */ 578, /* VFMSUBPSZv231rmb */ }, { /* 4353 */ 354, /* VFMSUBPSZv231rmbk */ }, { /* 4354 */ 354, /* VFMSUBPSZv231rmbkz */ }, { /* 4355 */ 356, /* VFMSUBPSZv231rmk */ }, { /* 4356 */ 356, /* VFMSUBPSZv231rmkz */ }, { /* 4357 */ 588, /* VFMSUBPSZv231rr */ }, { /* 4358 */ 358, /* VFMSUBPSZv231rrk */ }, { /* 4359 */ 358, /* VFMSUBPSZv231rrkz */ }, { /* 4360 */ 590, /* VFMSUBPSr132m */ }, { /* 4361 */ 591, /* VFMSUBPSr132mY */ }, { /* 4362 */ 592, /* VFMSUBPSr132r */ }, { /* 4363 */ 593, /* VFMSUBPSr132rY */ }, { /* 4364 */ 590, /* VFMSUBPSr213m */ }, { /* 4365 */ 591, /* VFMSUBPSr213mY */ }, { /* 4366 */ 592, /* VFMSUBPSr213r */ }, { /* 4367 */ 593, /* VFMSUBPSr213rY */ }, { /* 4368 */ 590, /* VFMSUBPSr231m */ }, { /* 4369 */ 591, /* VFMSUBPSr231mY */ }, { /* 4370 */ 592, /* VFMSUBPSr231r */ }, { /* 4371 */ 593, /* VFMSUBPSr231rY */ }, { /* 4372 */ 595, /* VFMSUBSD4mr */ }, { /* 4373 */ 0, /* */ }, { /* 4374 */ 596, /* VFMSUBSD4rm */ }, { /* 4375 */ 0, /* */ }, { /* 4376 */ 597, /* VFMSUBSD4rr */ }, { /* 4377 */ 0, /* */ }, { /* 4378 */ 598, /* VFMSUBSD4rr_REV */ }, { /* 4379 */ 599, /* VFMSUBSDZm */ }, { /* 4380 */ 600, /* VFMSUBSDZr */ }, { /* 4381 */ 601, /* VFMSUBSDr132m */ }, { /* 4382 */ 602, /* VFMSUBSDr132r */ }, { /* 4383 */ 601, /* VFMSUBSDr213m */ }, { /* 4384 */ 602, /* VFMSUBSDr213r */ }, { /* 4385 */ 601, /* VFMSUBSDr231m */ }, { /* 4386 */ 602, /* VFMSUBSDr231r */ }, { /* 4387 */ 603, /* VFMSUBSS4mr */ }, { /* 4388 */ 0, /* */ }, { /* 4389 */ 604, /* VFMSUBSS4rm */ }, { /* 4390 */ 0, /* */ }, { /* 4391 */ 605, /* VFMSUBSS4rr */ }, { /* 4392 */ 0, /* */ }, { /* 4393 */ 606, /* VFMSUBSS4rr_REV */ }, { /* 4394 */ 607, /* VFMSUBSSZm */ }, { /* 4395 */ 608, /* VFMSUBSSZr */ }, { /* 4396 */ 609, /* VFMSUBSSr132m */ }, { /* 4397 */ 610, /* VFMSUBSSr132r */ }, { /* 4398 */ 609, /* VFMSUBSSr213m */ }, { /* 4399 */ 610, /* VFMSUBSSr213r */ }, { /* 4400 */ 609, /* VFMSUBSSr231m */ }, { /* 4401 */ 610, /* VFMSUBSSr231r */ }, { /* 4402 */ 570, /* VFNMADD132PDZ128m */ }, { /* 4403 */ 571, /* VFNMADD132PDZ128mb */ }, { /* 4404 */ 572, /* VFNMADD132PDZ256m */ }, { /* 4405 */ 573, /* VFNMADD132PDZ256mb */ }, { /* 4406 */ 574, /* VFNMADD132PDZm */ }, { /* 4407 */ 575, /* VFNMADD132PDZmb */ }, { /* 4408 */ 570, /* VFNMADD132PSZ128m */ }, { /* 4409 */ 576, /* VFNMADD132PSZ128mb */ }, { /* 4410 */ 572, /* VFNMADD132PSZ256m */ }, { /* 4411 */ 577, /* VFNMADD132PSZ256mb */ }, { /* 4412 */ 574, /* VFNMADD132PSZm */ }, { /* 4413 */ 578, /* VFNMADD132PSZmb */ }, { /* 4414 */ 394, /* VFNMADDPD4mr */ }, { /* 4415 */ 392, /* VFNMADDPD4mrY */ }, { /* 4416 */ 579, /* VFNMADDPD4rm */ }, { /* 4417 */ 580, /* VFNMADDPD4rmY */ }, { /* 4418 */ 581, /* VFNMADDPD4rr */ }, { /* 4419 */ 582, /* VFNMADDPD4rrY */ }, { /* 4420 */ 393, /* VFNMADDPD4rrY_REV */ }, { /* 4421 */ 395, /* VFNMADDPD4rr_REV */ }, { /* 4422 */ 570, /* VFNMADDPDZ128v213rm */ }, { /* 4423 */ 583, /* VFNMADDPDZ128v213rmb */ }, { /* 4424 */ 306, /* VFNMADDPDZ128v213rmbk */ }, { /* 4425 */ 306, /* VFNMADDPDZ128v213rmbkz */ }, { /* 4426 */ 308, /* VFNMADDPDZ128v213rmk */ }, { /* 4427 */ 308, /* VFNMADDPDZ128v213rmkz */ }, { /* 4428 */ 584, /* VFNMADDPDZ128v213rr */ }, { /* 4429 */ 311, /* VFNMADDPDZ128v213rrk */ }, { /* 4430 */ 311, /* VFNMADDPDZ128v213rrkz */ }, { /* 4431 */ 570, /* VFNMADDPDZ128v231rm */ }, { /* 4432 */ 583, /* VFNMADDPDZ128v231rmb */ }, { /* 4433 */ 306, /* VFNMADDPDZ128v231rmbk */ }, { /* 4434 */ 306, /* VFNMADDPDZ128v231rmbkz */ }, { /* 4435 */ 308, /* VFNMADDPDZ128v231rmk */ }, { /* 4436 */ 308, /* VFNMADDPDZ128v231rmkz */ }, { /* 4437 */ 584, /* VFNMADDPDZ128v231rr */ }, { /* 4438 */ 311, /* VFNMADDPDZ128v231rrk */ }, { /* 4439 */ 311, /* VFNMADDPDZ128v231rrkz */ }, { /* 4440 */ 572, /* VFNMADDPDZ256v213rm */ }, { /* 4441 */ 585, /* VFNMADDPDZ256v213rmb */ }, { /* 4442 */ 315, /* VFNMADDPDZ256v213rmbk */ }, { /* 4443 */ 315, /* VFNMADDPDZ256v213rmbkz */ }, { /* 4444 */ 317, /* VFNMADDPDZ256v213rmk */ }, { /* 4445 */ 317, /* VFNMADDPDZ256v213rmkz */ }, { /* 4446 */ 586, /* VFNMADDPDZ256v213rr */ }, { /* 4447 */ 320, /* VFNMADDPDZ256v213rrk */ }, { /* 4448 */ 320, /* VFNMADDPDZ256v213rrkz */ }, { /* 4449 */ 572, /* VFNMADDPDZ256v231rm */ }, { /* 4450 */ 585, /* VFNMADDPDZ256v231rmb */ }, { /* 4451 */ 315, /* VFNMADDPDZ256v231rmbk */ }, { /* 4452 */ 315, /* VFNMADDPDZ256v231rmbkz */ }, { /* 4453 */ 317, /* VFNMADDPDZ256v231rmk */ }, { /* 4454 */ 317, /* VFNMADDPDZ256v231rmkz */ }, { /* 4455 */ 586, /* VFNMADDPDZ256v231rr */ }, { /* 4456 */ 320, /* VFNMADDPDZ256v231rrk */ }, { /* 4457 */ 320, /* VFNMADDPDZ256v231rrkz */ }, { /* 4458 */ 574, /* VFNMADDPDZv213rm */ }, { /* 4459 */ 587, /* VFNMADDPDZv213rmb */ }, { /* 4460 */ 327, /* VFNMADDPDZv213rmbk */ }, { /* 4461 */ 327, /* VFNMADDPDZv213rmbkz */ }, { /* 4462 */ 329, /* VFNMADDPDZv213rmk */ }, { /* 4463 */ 329, /* VFNMADDPDZv213rmkz */ }, { /* 4464 */ 588, /* VFNMADDPDZv213rr */ }, { /* 4465 */ 589, /* VFNMADDPDZv213rrb */ }, { /* 4466 */ 323, /* VFNMADDPDZv213rrbk */ }, { /* 4467 */ 323, /* VFNMADDPDZv213rrbkz */ }, { /* 4468 */ 332, /* VFNMADDPDZv213rrk */ }, { /* 4469 */ 332, /* VFNMADDPDZv213rrkz */ }, { /* 4470 */ 574, /* VFNMADDPDZv231rm */ }, { /* 4471 */ 587, /* VFNMADDPDZv231rmb */ }, { /* 4472 */ 327, /* VFNMADDPDZv231rmbk */ }, { /* 4473 */ 327, /* VFNMADDPDZv231rmbkz */ }, { /* 4474 */ 329, /* VFNMADDPDZv231rmk */ }, { /* 4475 */ 329, /* VFNMADDPDZv231rmkz */ }, { /* 4476 */ 588, /* VFNMADDPDZv231rr */ }, { /* 4477 */ 332, /* VFNMADDPDZv231rrk */ }, { /* 4478 */ 332, /* VFNMADDPDZv231rrkz */ }, { /* 4479 */ 590, /* VFNMADDPDr132m */ }, { /* 4480 */ 591, /* VFNMADDPDr132mY */ }, { /* 4481 */ 592, /* VFNMADDPDr132r */ }, { /* 4482 */ 593, /* VFNMADDPDr132rY */ }, { /* 4483 */ 590, /* VFNMADDPDr213m */ }, { /* 4484 */ 591, /* VFNMADDPDr213mY */ }, { /* 4485 */ 592, /* VFNMADDPDr213r */ }, { /* 4486 */ 593, /* VFNMADDPDr213rY */ }, { /* 4487 */ 590, /* VFNMADDPDr231m */ }, { /* 4488 */ 591, /* VFNMADDPDr231mY */ }, { /* 4489 */ 592, /* VFNMADDPDr231r */ }, { /* 4490 */ 593, /* VFNMADDPDr231rY */ }, { /* 4491 */ 394, /* VFNMADDPS4mr */ }, { /* 4492 */ 392, /* VFNMADDPS4mrY */ }, { /* 4493 */ 579, /* VFNMADDPS4rm */ }, { /* 4494 */ 580, /* VFNMADDPS4rmY */ }, { /* 4495 */ 581, /* VFNMADDPS4rr */ }, { /* 4496 */ 582, /* VFNMADDPS4rrY */ }, { /* 4497 */ 393, /* VFNMADDPS4rrY_REV */ }, { /* 4498 */ 395, /* VFNMADDPS4rr_REV */ }, { /* 4499 */ 570, /* VFNMADDPSZ128v213rm */ }, { /* 4500 */ 576, /* VFNMADDPSZ128v213rmb */ }, { /* 4501 */ 337, /* VFNMADDPSZ128v213rmbk */ }, { /* 4502 */ 337, /* VFNMADDPSZ128v213rmbkz */ }, { /* 4503 */ 339, /* VFNMADDPSZ128v213rmk */ }, { /* 4504 */ 339, /* VFNMADDPSZ128v213rmkz */ }, { /* 4505 */ 584, /* VFNMADDPSZ128v213rr */ }, { /* 4506 */ 341, /* VFNMADDPSZ128v213rrk */ }, { /* 4507 */ 341, /* VFNMADDPSZ128v213rrkz */ }, { /* 4508 */ 570, /* VFNMADDPSZ128v231rm */ }, { /* 4509 */ 576, /* VFNMADDPSZ128v231rmb */ }, { /* 4510 */ 337, /* VFNMADDPSZ128v231rmbk */ }, { /* 4511 */ 337, /* VFNMADDPSZ128v231rmbkz */ }, { /* 4512 */ 339, /* VFNMADDPSZ128v231rmk */ }, { /* 4513 */ 339, /* VFNMADDPSZ128v231rmkz */ }, { /* 4514 */ 584, /* VFNMADDPSZ128v231rr */ }, { /* 4515 */ 341, /* VFNMADDPSZ128v231rrk */ }, { /* 4516 */ 341, /* VFNMADDPSZ128v231rrkz */ }, { /* 4517 */ 572, /* VFNMADDPSZ256v213rm */ }, { /* 4518 */ 577, /* VFNMADDPSZ256v213rmb */ }, { /* 4519 */ 344, /* VFNMADDPSZ256v213rmbk */ }, { /* 4520 */ 344, /* VFNMADDPSZ256v213rmbkz */ }, { /* 4521 */ 346, /* VFNMADDPSZ256v213rmk */ }, { /* 4522 */ 346, /* VFNMADDPSZ256v213rmkz */ }, { /* 4523 */ 586, /* VFNMADDPSZ256v213rr */ }, { /* 4524 */ 348, /* VFNMADDPSZ256v213rrk */ }, { /* 4525 */ 348, /* VFNMADDPSZ256v213rrkz */ }, { /* 4526 */ 572, /* VFNMADDPSZ256v231rm */ }, { /* 4527 */ 577, /* VFNMADDPSZ256v231rmb */ }, { /* 4528 */ 344, /* VFNMADDPSZ256v231rmbk */ }, { /* 4529 */ 344, /* VFNMADDPSZ256v231rmbkz */ }, { /* 4530 */ 346, /* VFNMADDPSZ256v231rmk */ }, { /* 4531 */ 346, /* VFNMADDPSZ256v231rmkz */ }, { /* 4532 */ 586, /* VFNMADDPSZ256v231rr */ }, { /* 4533 */ 348, /* VFNMADDPSZ256v231rrk */ }, { /* 4534 */ 348, /* VFNMADDPSZ256v231rrkz */ }, { /* 4535 */ 574, /* VFNMADDPSZv213rm */ }, { /* 4536 */ 578, /* VFNMADDPSZv213rmb */ }, { /* 4537 */ 354, /* VFNMADDPSZv213rmbk */ }, { /* 4538 */ 354, /* VFNMADDPSZv213rmbkz */ }, { /* 4539 */ 356, /* VFNMADDPSZv213rmk */ }, { /* 4540 */ 356, /* VFNMADDPSZv213rmkz */ }, { /* 4541 */ 588, /* VFNMADDPSZv213rr */ }, { /* 4542 */ 594, /* VFNMADDPSZv213rrb */ }, { /* 4543 */ 351, /* VFNMADDPSZv213rrbk */ }, { /* 4544 */ 351, /* VFNMADDPSZv213rrbkz */ }, { /* 4545 */ 358, /* VFNMADDPSZv213rrk */ }, { /* 4546 */ 358, /* VFNMADDPSZv213rrkz */ }, { /* 4547 */ 574, /* VFNMADDPSZv231rm */ }, { /* 4548 */ 578, /* VFNMADDPSZv231rmb */ }, { /* 4549 */ 354, /* VFNMADDPSZv231rmbk */ }, { /* 4550 */ 354, /* VFNMADDPSZv231rmbkz */ }, { /* 4551 */ 356, /* VFNMADDPSZv231rmk */ }, { /* 4552 */ 356, /* VFNMADDPSZv231rmkz */ }, { /* 4553 */ 588, /* VFNMADDPSZv231rr */ }, { /* 4554 */ 358, /* VFNMADDPSZv231rrk */ }, { /* 4555 */ 358, /* VFNMADDPSZv231rrkz */ }, { /* 4556 */ 590, /* VFNMADDPSr132m */ }, { /* 4557 */ 591, /* VFNMADDPSr132mY */ }, { /* 4558 */ 592, /* VFNMADDPSr132r */ }, { /* 4559 */ 593, /* VFNMADDPSr132rY */ }, { /* 4560 */ 590, /* VFNMADDPSr213m */ }, { /* 4561 */ 591, /* VFNMADDPSr213mY */ }, { /* 4562 */ 592, /* VFNMADDPSr213r */ }, { /* 4563 */ 593, /* VFNMADDPSr213rY */ }, { /* 4564 */ 590, /* VFNMADDPSr231m */ }, { /* 4565 */ 591, /* VFNMADDPSr231mY */ }, { /* 4566 */ 592, /* VFNMADDPSr231r */ }, { /* 4567 */ 593, /* VFNMADDPSr231rY */ }, { /* 4568 */ 595, /* VFNMADDSD4mr */ }, { /* 4569 */ 0, /* */ }, { /* 4570 */ 596, /* VFNMADDSD4rm */ }, { /* 4571 */ 0, /* */ }, { /* 4572 */ 597, /* VFNMADDSD4rr */ }, { /* 4573 */ 0, /* */ }, { /* 4574 */ 598, /* VFNMADDSD4rr_REV */ }, { /* 4575 */ 599, /* VFNMADDSDZm */ }, { /* 4576 */ 600, /* VFNMADDSDZr */ }, { /* 4577 */ 601, /* VFNMADDSDr132m */ }, { /* 4578 */ 602, /* VFNMADDSDr132r */ }, { /* 4579 */ 601, /* VFNMADDSDr213m */ }, { /* 4580 */ 602, /* VFNMADDSDr213r */ }, { /* 4581 */ 601, /* VFNMADDSDr231m */ }, { /* 4582 */ 602, /* VFNMADDSDr231r */ }, { /* 4583 */ 603, /* VFNMADDSS4mr */ }, { /* 4584 */ 0, /* */ }, { /* 4585 */ 604, /* VFNMADDSS4rm */ }, { /* 4586 */ 0, /* */ }, { /* 4587 */ 605, /* VFNMADDSS4rr */ }, { /* 4588 */ 0, /* */ }, { /* 4589 */ 606, /* VFNMADDSS4rr_REV */ }, { /* 4590 */ 607, /* VFNMADDSSZm */ }, { /* 4591 */ 608, /* VFNMADDSSZr */ }, { /* 4592 */ 609, /* VFNMADDSSr132m */ }, { /* 4593 */ 610, /* VFNMADDSSr132r */ }, { /* 4594 */ 609, /* VFNMADDSSr213m */ }, { /* 4595 */ 610, /* VFNMADDSSr213r */ }, { /* 4596 */ 609, /* VFNMADDSSr231m */ }, { /* 4597 */ 610, /* VFNMADDSSr231r */ }, { /* 4598 */ 570, /* VFNMSUB132PDZ128m */ }, { /* 4599 */ 571, /* VFNMSUB132PDZ128mb */ }, { /* 4600 */ 572, /* VFNMSUB132PDZ256m */ }, { /* 4601 */ 573, /* VFNMSUB132PDZ256mb */ }, { /* 4602 */ 574, /* VFNMSUB132PDZm */ }, { /* 4603 */ 575, /* VFNMSUB132PDZmb */ }, { /* 4604 */ 570, /* VFNMSUB132PSZ128m */ }, { /* 4605 */ 576, /* VFNMSUB132PSZ128mb */ }, { /* 4606 */ 572, /* VFNMSUB132PSZ256m */ }, { /* 4607 */ 577, /* VFNMSUB132PSZ256mb */ }, { /* 4608 */ 574, /* VFNMSUB132PSZm */ }, { /* 4609 */ 578, /* VFNMSUB132PSZmb */ }, { /* 4610 */ 394, /* VFNMSUBPD4mr */ }, { /* 4611 */ 392, /* VFNMSUBPD4mrY */ }, { /* 4612 */ 579, /* VFNMSUBPD4rm */ }, { /* 4613 */ 580, /* VFNMSUBPD4rmY */ }, { /* 4614 */ 581, /* VFNMSUBPD4rr */ }, { /* 4615 */ 582, /* VFNMSUBPD4rrY */ }, { /* 4616 */ 393, /* VFNMSUBPD4rrY_REV */ }, { /* 4617 */ 395, /* VFNMSUBPD4rr_REV */ }, { /* 4618 */ 570, /* VFNMSUBPDZ128v213rm */ }, { /* 4619 */ 583, /* VFNMSUBPDZ128v213rmb */ }, { /* 4620 */ 306, /* VFNMSUBPDZ128v213rmbk */ }, { /* 4621 */ 306, /* VFNMSUBPDZ128v213rmbkz */ }, { /* 4622 */ 308, /* VFNMSUBPDZ128v213rmk */ }, { /* 4623 */ 308, /* VFNMSUBPDZ128v213rmkz */ }, { /* 4624 */ 584, /* VFNMSUBPDZ128v213rr */ }, { /* 4625 */ 311, /* VFNMSUBPDZ128v213rrk */ }, { /* 4626 */ 311, /* VFNMSUBPDZ128v213rrkz */ }, { /* 4627 */ 570, /* VFNMSUBPDZ128v231rm */ }, { /* 4628 */ 583, /* VFNMSUBPDZ128v231rmb */ }, { /* 4629 */ 306, /* VFNMSUBPDZ128v231rmbk */ }, { /* 4630 */ 306, /* VFNMSUBPDZ128v231rmbkz */ }, { /* 4631 */ 308, /* VFNMSUBPDZ128v231rmk */ }, { /* 4632 */ 308, /* VFNMSUBPDZ128v231rmkz */ }, { /* 4633 */ 584, /* VFNMSUBPDZ128v231rr */ }, { /* 4634 */ 311, /* VFNMSUBPDZ128v231rrk */ }, { /* 4635 */ 311, /* VFNMSUBPDZ128v231rrkz */ }, { /* 4636 */ 572, /* VFNMSUBPDZ256v213rm */ }, { /* 4637 */ 585, /* VFNMSUBPDZ256v213rmb */ }, { /* 4638 */ 315, /* VFNMSUBPDZ256v213rmbk */ }, { /* 4639 */ 315, /* VFNMSUBPDZ256v213rmbkz */ }, { /* 4640 */ 317, /* VFNMSUBPDZ256v213rmk */ }, { /* 4641 */ 317, /* VFNMSUBPDZ256v213rmkz */ }, { /* 4642 */ 586, /* VFNMSUBPDZ256v213rr */ }, { /* 4643 */ 320, /* VFNMSUBPDZ256v213rrk */ }, { /* 4644 */ 320, /* VFNMSUBPDZ256v213rrkz */ }, { /* 4645 */ 572, /* VFNMSUBPDZ256v231rm */ }, { /* 4646 */ 585, /* VFNMSUBPDZ256v231rmb */ }, { /* 4647 */ 315, /* VFNMSUBPDZ256v231rmbk */ }, { /* 4648 */ 315, /* VFNMSUBPDZ256v231rmbkz */ }, { /* 4649 */ 317, /* VFNMSUBPDZ256v231rmk */ }, { /* 4650 */ 317, /* VFNMSUBPDZ256v231rmkz */ }, { /* 4651 */ 586, /* VFNMSUBPDZ256v231rr */ }, { /* 4652 */ 320, /* VFNMSUBPDZ256v231rrk */ }, { /* 4653 */ 320, /* VFNMSUBPDZ256v231rrkz */ }, { /* 4654 */ 574, /* VFNMSUBPDZv213rm */ }, { /* 4655 */ 587, /* VFNMSUBPDZv213rmb */ }, { /* 4656 */ 327, /* VFNMSUBPDZv213rmbk */ }, { /* 4657 */ 327, /* VFNMSUBPDZv213rmbkz */ }, { /* 4658 */ 329, /* VFNMSUBPDZv213rmk */ }, { /* 4659 */ 329, /* VFNMSUBPDZv213rmkz */ }, { /* 4660 */ 588, /* VFNMSUBPDZv213rr */ }, { /* 4661 */ 589, /* VFNMSUBPDZv213rrb */ }, { /* 4662 */ 323, /* VFNMSUBPDZv213rrbk */ }, { /* 4663 */ 323, /* VFNMSUBPDZv213rrbkz */ }, { /* 4664 */ 332, /* VFNMSUBPDZv213rrk */ }, { /* 4665 */ 332, /* VFNMSUBPDZv213rrkz */ }, { /* 4666 */ 574, /* VFNMSUBPDZv231rm */ }, { /* 4667 */ 587, /* VFNMSUBPDZv231rmb */ }, { /* 4668 */ 327, /* VFNMSUBPDZv231rmbk */ }, { /* 4669 */ 327, /* VFNMSUBPDZv231rmbkz */ }, { /* 4670 */ 329, /* VFNMSUBPDZv231rmk */ }, { /* 4671 */ 329, /* VFNMSUBPDZv231rmkz */ }, { /* 4672 */ 588, /* VFNMSUBPDZv231rr */ }, { /* 4673 */ 332, /* VFNMSUBPDZv231rrk */ }, { /* 4674 */ 332, /* VFNMSUBPDZv231rrkz */ }, { /* 4675 */ 590, /* VFNMSUBPDr132m */ }, { /* 4676 */ 591, /* VFNMSUBPDr132mY */ }, { /* 4677 */ 592, /* VFNMSUBPDr132r */ }, { /* 4678 */ 593, /* VFNMSUBPDr132rY */ }, { /* 4679 */ 590, /* VFNMSUBPDr213m */ }, { /* 4680 */ 591, /* VFNMSUBPDr213mY */ }, { /* 4681 */ 592, /* VFNMSUBPDr213r */ }, { /* 4682 */ 593, /* VFNMSUBPDr213rY */ }, { /* 4683 */ 590, /* VFNMSUBPDr231m */ }, { /* 4684 */ 591, /* VFNMSUBPDr231mY */ }, { /* 4685 */ 592, /* VFNMSUBPDr231r */ }, { /* 4686 */ 593, /* VFNMSUBPDr231rY */ }, { /* 4687 */ 394, /* VFNMSUBPS4mr */ }, { /* 4688 */ 392, /* VFNMSUBPS4mrY */ }, { /* 4689 */ 579, /* VFNMSUBPS4rm */ }, { /* 4690 */ 580, /* VFNMSUBPS4rmY */ }, { /* 4691 */ 581, /* VFNMSUBPS4rr */ }, { /* 4692 */ 582, /* VFNMSUBPS4rrY */ }, { /* 4693 */ 393, /* VFNMSUBPS4rrY_REV */ }, { /* 4694 */ 395, /* VFNMSUBPS4rr_REV */ }, { /* 4695 */ 570, /* VFNMSUBPSZ128v213rm */ }, { /* 4696 */ 576, /* VFNMSUBPSZ128v213rmb */ }, { /* 4697 */ 337, /* VFNMSUBPSZ128v213rmbk */ }, { /* 4698 */ 337, /* VFNMSUBPSZ128v213rmbkz */ }, { /* 4699 */ 339, /* VFNMSUBPSZ128v213rmk */ }, { /* 4700 */ 339, /* VFNMSUBPSZ128v213rmkz */ }, { /* 4701 */ 584, /* VFNMSUBPSZ128v213rr */ }, { /* 4702 */ 341, /* VFNMSUBPSZ128v213rrk */ }, { /* 4703 */ 341, /* VFNMSUBPSZ128v213rrkz */ }, { /* 4704 */ 570, /* VFNMSUBPSZ128v231rm */ }, { /* 4705 */ 576, /* VFNMSUBPSZ128v231rmb */ }, { /* 4706 */ 337, /* VFNMSUBPSZ128v231rmbk */ }, { /* 4707 */ 337, /* VFNMSUBPSZ128v231rmbkz */ }, { /* 4708 */ 339, /* VFNMSUBPSZ128v231rmk */ }, { /* 4709 */ 339, /* VFNMSUBPSZ128v231rmkz */ }, { /* 4710 */ 584, /* VFNMSUBPSZ128v231rr */ }, { /* 4711 */ 341, /* VFNMSUBPSZ128v231rrk */ }, { /* 4712 */ 341, /* VFNMSUBPSZ128v231rrkz */ }, { /* 4713 */ 572, /* VFNMSUBPSZ256v213rm */ }, { /* 4714 */ 577, /* VFNMSUBPSZ256v213rmb */ }, { /* 4715 */ 344, /* VFNMSUBPSZ256v213rmbk */ }, { /* 4716 */ 344, /* VFNMSUBPSZ256v213rmbkz */ }, { /* 4717 */ 346, /* VFNMSUBPSZ256v213rmk */ }, { /* 4718 */ 346, /* VFNMSUBPSZ256v213rmkz */ }, { /* 4719 */ 586, /* VFNMSUBPSZ256v213rr */ }, { /* 4720 */ 348, /* VFNMSUBPSZ256v213rrk */ }, { /* 4721 */ 348, /* VFNMSUBPSZ256v213rrkz */ }, { /* 4722 */ 572, /* VFNMSUBPSZ256v231rm */ }, { /* 4723 */ 577, /* VFNMSUBPSZ256v231rmb */ }, { /* 4724 */ 344, /* VFNMSUBPSZ256v231rmbk */ }, { /* 4725 */ 344, /* VFNMSUBPSZ256v231rmbkz */ }, { /* 4726 */ 346, /* VFNMSUBPSZ256v231rmk */ }, { /* 4727 */ 346, /* VFNMSUBPSZ256v231rmkz */ }, { /* 4728 */ 586, /* VFNMSUBPSZ256v231rr */ }, { /* 4729 */ 348, /* VFNMSUBPSZ256v231rrk */ }, { /* 4730 */ 348, /* VFNMSUBPSZ256v231rrkz */ }, { /* 4731 */ 574, /* VFNMSUBPSZv213rm */ }, { /* 4732 */ 578, /* VFNMSUBPSZv213rmb */ }, { /* 4733 */ 354, /* VFNMSUBPSZv213rmbk */ }, { /* 4734 */ 354, /* VFNMSUBPSZv213rmbkz */ }, { /* 4735 */ 356, /* VFNMSUBPSZv213rmk */ }, { /* 4736 */ 356, /* VFNMSUBPSZv213rmkz */ }, { /* 4737 */ 588, /* VFNMSUBPSZv213rr */ }, { /* 4738 */ 594, /* VFNMSUBPSZv213rrb */ }, { /* 4739 */ 351, /* VFNMSUBPSZv213rrbk */ }, { /* 4740 */ 351, /* VFNMSUBPSZv213rrbkz */ }, { /* 4741 */ 358, /* VFNMSUBPSZv213rrk */ }, { /* 4742 */ 358, /* VFNMSUBPSZv213rrkz */ }, { /* 4743 */ 574, /* VFNMSUBPSZv231rm */ }, { /* 4744 */ 578, /* VFNMSUBPSZv231rmb */ }, { /* 4745 */ 354, /* VFNMSUBPSZv231rmbk */ }, { /* 4746 */ 354, /* VFNMSUBPSZv231rmbkz */ }, { /* 4747 */ 356, /* VFNMSUBPSZv231rmk */ }, { /* 4748 */ 356, /* VFNMSUBPSZv231rmkz */ }, { /* 4749 */ 588, /* VFNMSUBPSZv231rr */ }, { /* 4750 */ 358, /* VFNMSUBPSZv231rrk */ }, { /* 4751 */ 358, /* VFNMSUBPSZv231rrkz */ }, { /* 4752 */ 590, /* VFNMSUBPSr132m */ }, { /* 4753 */ 591, /* VFNMSUBPSr132mY */ }, { /* 4754 */ 592, /* VFNMSUBPSr132r */ }, { /* 4755 */ 593, /* VFNMSUBPSr132rY */ }, { /* 4756 */ 590, /* VFNMSUBPSr213m */ }, { /* 4757 */ 591, /* VFNMSUBPSr213mY */ }, { /* 4758 */ 592, /* VFNMSUBPSr213r */ }, { /* 4759 */ 593, /* VFNMSUBPSr213rY */ }, { /* 4760 */ 590, /* VFNMSUBPSr231m */ }, { /* 4761 */ 591, /* VFNMSUBPSr231mY */ }, { /* 4762 */ 592, /* VFNMSUBPSr231r */ }, { /* 4763 */ 593, /* VFNMSUBPSr231rY */ }, { /* 4764 */ 595, /* VFNMSUBSD4mr */ }, { /* 4765 */ 0, /* */ }, { /* 4766 */ 596, /* VFNMSUBSD4rm */ }, { /* 4767 */ 0, /* */ }, { /* 4768 */ 597, /* VFNMSUBSD4rr */ }, { /* 4769 */ 0, /* */ }, { /* 4770 */ 598, /* VFNMSUBSD4rr_REV */ }, { /* 4771 */ 599, /* VFNMSUBSDZm */ }, { /* 4772 */ 600, /* VFNMSUBSDZr */ }, { /* 4773 */ 601, /* VFNMSUBSDr132m */ }, { /* 4774 */ 602, /* VFNMSUBSDr132r */ }, { /* 4775 */ 601, /* VFNMSUBSDr213m */ }, { /* 4776 */ 602, /* VFNMSUBSDr213r */ }, { /* 4777 */ 601, /* VFNMSUBSDr231m */ }, { /* 4778 */ 602, /* VFNMSUBSDr231r */ }, { /* 4779 */ 603, /* VFNMSUBSS4mr */ }, { /* 4780 */ 0, /* */ }, { /* 4781 */ 604, /* VFNMSUBSS4rm */ }, { /* 4782 */ 0, /* */ }, { /* 4783 */ 605, /* VFNMSUBSS4rr */ }, { /* 4784 */ 0, /* */ }, { /* 4785 */ 606, /* VFNMSUBSS4rr_REV */ }, { /* 4786 */ 607, /* VFNMSUBSSZm */ }, { /* 4787 */ 608, /* VFNMSUBSSZr */ }, { /* 4788 */ 609, /* VFNMSUBSSr132m */ }, { /* 4789 */ 610, /* VFNMSUBSSr132r */ }, { /* 4790 */ 609, /* VFNMSUBSSr213m */ }, { /* 4791 */ 610, /* VFNMSUBSSr213r */ }, { /* 4792 */ 609, /* VFNMSUBSSr231m */ }, { /* 4793 */ 610, /* VFNMSUBSSr231r */ }, { /* 4794 */ 44, /* VFRCZPDrm */ }, { /* 4795 */ 475, /* VFRCZPDrmY */ }, { /* 4796 */ 45, /* VFRCZPDrr */ }, { /* 4797 */ 476, /* VFRCZPDrrY */ }, { /* 4798 */ 44, /* VFRCZPSrm */ }, { /* 4799 */ 475, /* VFRCZPSrmY */ }, { /* 4800 */ 45, /* VFRCZPSrr */ }, { /* 4801 */ 476, /* VFRCZPSrrY */ }, { /* 4802 */ 106, /* VFRCZSDrm */ }, { /* 4803 */ 45, /* VFRCZSDrr */ }, { /* 4804 */ 434, /* VFRCZSSrm */ }, { /* 4805 */ 45, /* VFRCZSSrr */ }, { /* 4806 */ 0, /* */ }, { /* 4807 */ 0, /* */ }, { /* 4808 */ 0, /* */ }, { /* 4809 */ 0, /* */ }, { /* 4810 */ 0, /* */ }, { /* 4811 */ 0, /* */ }, { /* 4812 */ 0, /* */ }, { /* 4813 */ 0, /* */ }, { /* 4814 */ 0, /* */ }, { /* 4815 */ 0, /* */ }, { /* 4816 */ 0, /* */ }, { /* 4817 */ 0, /* */ }, { /* 4818 */ 0, /* */ }, { /* 4819 */ 0, /* */ }, { /* 4820 */ 0, /* */ }, { /* 4821 */ 0, /* */ }, { /* 4822 */ 0, /* */ }, { /* 4823 */ 0, /* */ }, { /* 4824 */ 0, /* */ }, { /* 4825 */ 0, /* */ }, { /* 4826 */ 0, /* */ }, { /* 4827 */ 0, /* */ }, { /* 4828 */ 0, /* */ }, { /* 4829 */ 0, /* */ }, { /* 4830 */ 0, /* */ }, { /* 4831 */ 0, /* */ }, { /* 4832 */ 0, /* */ }, { /* 4833 */ 0, /* */ }, { /* 4834 */ 0, /* */ }, { /* 4835 */ 0, /* */ }, { /* 4836 */ 0, /* */ }, { /* 4837 */ 0, /* */ }, { /* 4838 */ 611, /* VGATHERDPDYrm */ }, { /* 4839 */ 612, /* VGATHERDPDZrm */ }, { /* 4840 */ 613, /* VGATHERDPDrm */ }, { /* 4841 */ 614, /* VGATHERDPSYrm */ }, { /* 4842 */ 615, /* VGATHERDPSZrm */ }, { /* 4843 */ 616, /* VGATHERDPSrm */ }, { /* 4844 */ 617, /* VGATHERPF0DPDm */ }, { /* 4845 */ 618, /* VGATHERPF0DPSm */ }, { /* 4846 */ 619, /* VGATHERPF0QPDm */ }, { /* 4847 */ 619, /* VGATHERPF0QPSm */ }, { /* 4848 */ 617, /* VGATHERPF1DPDm */ }, { /* 4849 */ 618, /* VGATHERPF1DPSm */ }, { /* 4850 */ 619, /* VGATHERPF1QPDm */ }, { /* 4851 */ 619, /* VGATHERPF1QPSm */ }, { /* 4852 */ 611, /* VGATHERQPDYrm */ }, { /* 4853 */ 612, /* VGATHERQPDZrm */ }, { /* 4854 */ 613, /* VGATHERQPDrm */ }, { /* 4855 */ 616, /* VGATHERQPSYrm */ }, { /* 4856 */ 620, /* VGATHERQPSZrm */ }, { /* 4857 */ 616, /* VGATHERQPSrm */ }, { /* 4858 */ 302, /* VHADDPDYrm */ }, { /* 4859 */ 303, /* VHADDPDYrr */ }, { /* 4860 */ 334, /* VHADDPDrm */ }, { /* 4861 */ 335, /* VHADDPDrr */ }, { /* 4862 */ 302, /* VHADDPSYrm */ }, { /* 4863 */ 303, /* VHADDPSYrr */ }, { /* 4864 */ 334, /* VHADDPSrm */ }, { /* 4865 */ 335, /* VHADDPSrr */ }, { /* 4866 */ 302, /* VHSUBPDYrm */ }, { /* 4867 */ 303, /* VHSUBPDYrr */ }, { /* 4868 */ 334, /* VHSUBPDrm */ }, { /* 4869 */ 335, /* VHSUBPDrr */ }, { /* 4870 */ 302, /* VHSUBPSYrm */ }, { /* 4871 */ 303, /* VHSUBPSYrr */ }, { /* 4872 */ 334, /* VHSUBPSrm */ }, { /* 4873 */ 335, /* VHSUBPSrr */ }, { /* 4874 */ 621, /* VINSERTF128rm */ }, { /* 4875 */ 622, /* VINSERTF128rr */ }, { /* 4876 */ 623, /* VINSERTF32x4rm */ }, { /* 4877 */ 624, /* VINSERTF32x4rr */ }, { /* 4878 */ 625, /* VINSERTF32x8rm */ }, { /* 4879 */ 626, /* VINSERTF32x8rr */ }, { /* 4880 */ 623, /* VINSERTF64x2rm */ }, { /* 4881 */ 624, /* VINSERTF64x2rr */ }, { /* 4882 */ 625, /* VINSERTF64x4rm */ }, { /* 4883 */ 626, /* VINSERTF64x4rr */ }, { /* 4884 */ 621, /* VINSERTI128rm */ }, { /* 4885 */ 622, /* VINSERTI128rr */ }, { /* 4886 */ 623, /* VINSERTI32x4rm */ }, { /* 4887 */ 624, /* VINSERTI32x4rr */ }, { /* 4888 */ 625, /* VINSERTI32x8rm */ }, { /* 4889 */ 626, /* VINSERTI32x8rr */ }, { /* 4890 */ 623, /* VINSERTI64x2rm */ }, { /* 4891 */ 624, /* VINSERTI64x2rr */ }, { /* 4892 */ 625, /* VINSERTI64x4rm */ }, { /* 4893 */ 626, /* VINSERTI64x4rr */ }, { /* 4894 */ 627, /* VINSERTPSrm */ }, { /* 4895 */ 391, /* VINSERTPSrr */ }, { /* 4896 */ 628, /* VINSERTPSzrm */ }, { /* 4897 */ 629, /* VINSERTPSzrr */ }, { /* 4898 */ 475, /* VLDDQUYrm */ }, { /* 4899 */ 44, /* VLDDQUrm */ }, { /* 4900 */ 38, /* VLDMXCSR */ }, { /* 4901 */ 45, /* VMASKMOVDQU */ }, { /* 4902 */ 0, /* */ }, { /* 4903 */ 630, /* VMASKMOVPDYmr */ }, { /* 4904 */ 302, /* VMASKMOVPDYrm */ }, { /* 4905 */ 631, /* VMASKMOVPDmr */ }, { /* 4906 */ 334, /* VMASKMOVPDrm */ }, { /* 4907 */ 630, /* VMASKMOVPSYmr */ }, { /* 4908 */ 302, /* VMASKMOVPSYrm */ }, { /* 4909 */ 631, /* VMASKMOVPSmr */ }, { /* 4910 */ 334, /* VMASKMOVPSrm */ }, { /* 4911 */ 0, /* */ }, { /* 4912 */ 0, /* */ }, { /* 4913 */ 0, /* */ }, { /* 4914 */ 0, /* */ }, { /* 4915 */ 0, /* */ }, { /* 4916 */ 0, /* */ }, { /* 4917 */ 0, /* */ }, { /* 4918 */ 0, /* */ }, { /* 4919 */ 0, /* */ }, { /* 4920 */ 0, /* */ }, { /* 4921 */ 0, /* */ }, { /* 4922 */ 0, /* */ }, { /* 4923 */ 302, /* VMAXPDYrm */ }, { /* 4924 */ 303, /* VMAXPDYrr */ }, { /* 4925 */ 304, /* VMAXPDZ128rm */ }, { /* 4926 */ 305, /* VMAXPDZ128rmb */ }, { /* 4927 */ 306, /* VMAXPDZ128rmbk */ }, { /* 4928 */ 307, /* VMAXPDZ128rmbkz */ }, { /* 4929 */ 308, /* VMAXPDZ128rmk */ }, { /* 4930 */ 309, /* VMAXPDZ128rmkz */ }, { /* 4931 */ 310, /* VMAXPDZ128rr */ }, { /* 4932 */ 311, /* VMAXPDZ128rrk */ }, { /* 4933 */ 312, /* VMAXPDZ128rrkz */ }, { /* 4934 */ 313, /* VMAXPDZ256rm */ }, { /* 4935 */ 314, /* VMAXPDZ256rmb */ }, { /* 4936 */ 315, /* VMAXPDZ256rmbk */ }, { /* 4937 */ 316, /* VMAXPDZ256rmbkz */ }, { /* 4938 */ 317, /* VMAXPDZ256rmk */ }, { /* 4939 */ 318, /* VMAXPDZ256rmkz */ }, { /* 4940 */ 319, /* VMAXPDZ256rr */ }, { /* 4941 */ 320, /* VMAXPDZ256rrk */ }, { /* 4942 */ 321, /* VMAXPDZ256rrkz */ }, { /* 4943 */ 325, /* VMAXPDZrm */ }, { /* 4944 */ 326, /* VMAXPDZrmb */ }, { /* 4945 */ 327, /* VMAXPDZrmbk */ }, { /* 4946 */ 328, /* VMAXPDZrmbkz */ }, { /* 4947 */ 329, /* VMAXPDZrmk */ }, { /* 4948 */ 330, /* VMAXPDZrmkz */ }, { /* 4949 */ 331, /* VMAXPDZrr */ }, { /* 4950 */ 332, /* VMAXPDZrrk */ }, { /* 4951 */ 333, /* VMAXPDZrrkz */ }, { /* 4952 */ 334, /* VMAXPDrm */ }, { /* 4953 */ 335, /* VMAXPDrr */ }, { /* 4954 */ 302, /* VMAXPSYrm */ }, { /* 4955 */ 303, /* VMAXPSYrr */ }, { /* 4956 */ 304, /* VMAXPSZ128rm */ }, { /* 4957 */ 336, /* VMAXPSZ128rmb */ }, { /* 4958 */ 337, /* VMAXPSZ128rmbk */ }, { /* 4959 */ 338, /* VMAXPSZ128rmbkz */ }, { /* 4960 */ 339, /* VMAXPSZ128rmk */ }, { /* 4961 */ 340, /* VMAXPSZ128rmkz */ }, { /* 4962 */ 310, /* VMAXPSZ128rr */ }, { /* 4963 */ 341, /* VMAXPSZ128rrk */ }, { /* 4964 */ 342, /* VMAXPSZ128rrkz */ }, { /* 4965 */ 313, /* VMAXPSZ256rm */ }, { /* 4966 */ 343, /* VMAXPSZ256rmb */ }, { /* 4967 */ 344, /* VMAXPSZ256rmbk */ }, { /* 4968 */ 345, /* VMAXPSZ256rmbkz */ }, { /* 4969 */ 346, /* VMAXPSZ256rmk */ }, { /* 4970 */ 347, /* VMAXPSZ256rmkz */ }, { /* 4971 */ 319, /* VMAXPSZ256rr */ }, { /* 4972 */ 348, /* VMAXPSZ256rrk */ }, { /* 4973 */ 349, /* VMAXPSZ256rrkz */ }, { /* 4974 */ 325, /* VMAXPSZrm */ }, { /* 4975 */ 353, /* VMAXPSZrmb */ }, { /* 4976 */ 354, /* VMAXPSZrmbk */ }, { /* 4977 */ 355, /* VMAXPSZrmbkz */ }, { /* 4978 */ 356, /* VMAXPSZrmk */ }, { /* 4979 */ 357, /* VMAXPSZrmkz */ }, { /* 4980 */ 331, /* VMAXPSZrr */ }, { /* 4981 */ 358, /* VMAXPSZrrk */ }, { /* 4982 */ 359, /* VMAXPSZrrkz */ }, { /* 4983 */ 334, /* VMAXPSrm */ }, { /* 4984 */ 335, /* VMAXPSrr */ }, { /* 4985 */ 0, /* */ }, { /* 4986 */ 360, /* VMAXSDZrm_Int */ }, { /* 4987 */ 361, /* VMAXSDZrm_Intk */ }, { /* 4988 */ 362, /* VMAXSDZrm_Intkz */ }, { /* 4989 */ 0, /* */ }, { /* 4990 */ 363, /* VMAXSDZrr_Int */ }, { /* 4991 */ 364, /* VMAXSDZrr_Intk */ }, { /* 4992 */ 365, /* VMAXSDZrr_Intkz */ }, { /* 4993 */ 363, /* VMAXSDZrrb */ }, { /* 4994 */ 364, /* VMAXSDZrrbk */ }, { /* 4995 */ 365, /* VMAXSDZrrbkz */ }, { /* 4996 */ 369, /* VMAXSDrm */ }, { /* 4997 */ 0, /* */ }, { /* 4998 */ 370, /* VMAXSDrr */ }, { /* 4999 */ 0, /* */ }, { /* 5000 */ 0, /* */ }, { /* 5001 */ 371, /* VMAXSSZrm_Int */ }, { /* 5002 */ 372, /* VMAXSSZrm_Intk */ }, { /* 5003 */ 373, /* VMAXSSZrm_Intkz */ }, { /* 5004 */ 0, /* */ }, { /* 5005 */ 374, /* VMAXSSZrr_Int */ }, { /* 5006 */ 375, /* VMAXSSZrr_Intk */ }, { /* 5007 */ 376, /* VMAXSSZrr_Intkz */ }, { /* 5008 */ 374, /* VMAXSSZrrb */ }, { /* 5009 */ 375, /* VMAXSSZrrbk */ }, { /* 5010 */ 376, /* VMAXSSZrrbkz */ }, { /* 5011 */ 380, /* VMAXSSrm */ }, { /* 5012 */ 0, /* */ }, { /* 5013 */ 381, /* VMAXSSrr */ }, { /* 5014 */ 0, /* */ }, { /* 5015 */ 0, /* VMCALL */ }, { /* 5016 */ 38, /* VMCLEARm */ }, { /* 5017 */ 0, /* VMFUNC */ }, { /* 5018 */ 0, /* */ }, { /* 5019 */ 0, /* */ }, { /* 5020 */ 0, /* */ }, { /* 5021 */ 0, /* */ }, { /* 5022 */ 0, /* */ }, { /* 5023 */ 0, /* */ }, { /* 5024 */ 0, /* */ }, { /* 5025 */ 0, /* */ }, { /* 5026 */ 0, /* */ }, { /* 5027 */ 0, /* */ }, { /* 5028 */ 0, /* */ }, { /* 5029 */ 0, /* */ }, { /* 5030 */ 302, /* VMINPDYrm */ }, { /* 5031 */ 303, /* VMINPDYrr */ }, { /* 5032 */ 304, /* VMINPDZ128rm */ }, { /* 5033 */ 305, /* VMINPDZ128rmb */ }, { /* 5034 */ 306, /* VMINPDZ128rmbk */ }, { /* 5035 */ 307, /* VMINPDZ128rmbkz */ }, { /* 5036 */ 308, /* VMINPDZ128rmk */ }, { /* 5037 */ 309, /* VMINPDZ128rmkz */ }, { /* 5038 */ 310, /* VMINPDZ128rr */ }, { /* 5039 */ 311, /* VMINPDZ128rrk */ }, { /* 5040 */ 312, /* VMINPDZ128rrkz */ }, { /* 5041 */ 313, /* VMINPDZ256rm */ }, { /* 5042 */ 314, /* VMINPDZ256rmb */ }, { /* 5043 */ 315, /* VMINPDZ256rmbk */ }, { /* 5044 */ 316, /* VMINPDZ256rmbkz */ }, { /* 5045 */ 317, /* VMINPDZ256rmk */ }, { /* 5046 */ 318, /* VMINPDZ256rmkz */ }, { /* 5047 */ 319, /* VMINPDZ256rr */ }, { /* 5048 */ 320, /* VMINPDZ256rrk */ }, { /* 5049 */ 321, /* VMINPDZ256rrkz */ }, { /* 5050 */ 325, /* VMINPDZrm */ }, { /* 5051 */ 326, /* VMINPDZrmb */ }, { /* 5052 */ 327, /* VMINPDZrmbk */ }, { /* 5053 */ 328, /* VMINPDZrmbkz */ }, { /* 5054 */ 329, /* VMINPDZrmk */ }, { /* 5055 */ 330, /* VMINPDZrmkz */ }, { /* 5056 */ 331, /* VMINPDZrr */ }, { /* 5057 */ 332, /* VMINPDZrrk */ }, { /* 5058 */ 333, /* VMINPDZrrkz */ }, { /* 5059 */ 334, /* VMINPDrm */ }, { /* 5060 */ 335, /* VMINPDrr */ }, { /* 5061 */ 302, /* VMINPSYrm */ }, { /* 5062 */ 303, /* VMINPSYrr */ }, { /* 5063 */ 304, /* VMINPSZ128rm */ }, { /* 5064 */ 336, /* VMINPSZ128rmb */ }, { /* 5065 */ 337, /* VMINPSZ128rmbk */ }, { /* 5066 */ 338, /* VMINPSZ128rmbkz */ }, { /* 5067 */ 339, /* VMINPSZ128rmk */ }, { /* 5068 */ 340, /* VMINPSZ128rmkz */ }, { /* 5069 */ 310, /* VMINPSZ128rr */ }, { /* 5070 */ 341, /* VMINPSZ128rrk */ }, { /* 5071 */ 342, /* VMINPSZ128rrkz */ }, { /* 5072 */ 313, /* VMINPSZ256rm */ }, { /* 5073 */ 343, /* VMINPSZ256rmb */ }, { /* 5074 */ 344, /* VMINPSZ256rmbk */ }, { /* 5075 */ 345, /* VMINPSZ256rmbkz */ }, { /* 5076 */ 346, /* VMINPSZ256rmk */ }, { /* 5077 */ 347, /* VMINPSZ256rmkz */ }, { /* 5078 */ 319, /* VMINPSZ256rr */ }, { /* 5079 */ 348, /* VMINPSZ256rrk */ }, { /* 5080 */ 349, /* VMINPSZ256rrkz */ }, { /* 5081 */ 325, /* VMINPSZrm */ }, { /* 5082 */ 353, /* VMINPSZrmb */ }, { /* 5083 */ 354, /* VMINPSZrmbk */ }, { /* 5084 */ 355, /* VMINPSZrmbkz */ }, { /* 5085 */ 356, /* VMINPSZrmk */ }, { /* 5086 */ 357, /* VMINPSZrmkz */ }, { /* 5087 */ 331, /* VMINPSZrr */ }, { /* 5088 */ 358, /* VMINPSZrrk */ }, { /* 5089 */ 359, /* VMINPSZrrkz */ }, { /* 5090 */ 334, /* VMINPSrm */ }, { /* 5091 */ 335, /* VMINPSrr */ }, { /* 5092 */ 0, /* */ }, { /* 5093 */ 360, /* VMINSDZrm_Int */ }, { /* 5094 */ 361, /* VMINSDZrm_Intk */ }, { /* 5095 */ 362, /* VMINSDZrm_Intkz */ }, { /* 5096 */ 0, /* */ }, { /* 5097 */ 363, /* VMINSDZrr_Int */ }, { /* 5098 */ 364, /* VMINSDZrr_Intk */ }, { /* 5099 */ 365, /* VMINSDZrr_Intkz */ }, { /* 5100 */ 363, /* VMINSDZrrb */ }, { /* 5101 */ 364, /* VMINSDZrrbk */ }, { /* 5102 */ 365, /* VMINSDZrrbkz */ }, { /* 5103 */ 369, /* VMINSDrm */ }, { /* 5104 */ 0, /* */ }, { /* 5105 */ 370, /* VMINSDrr */ }, { /* 5106 */ 0, /* */ }, { /* 5107 */ 0, /* */ }, { /* 5108 */ 371, /* VMINSSZrm_Int */ }, { /* 5109 */ 372, /* VMINSSZrm_Intk */ }, { /* 5110 */ 373, /* VMINSSZrm_Intkz */ }, { /* 5111 */ 0, /* */ }, { /* 5112 */ 374, /* VMINSSZrr_Int */ }, { /* 5113 */ 375, /* VMINSSZrr_Intk */ }, { /* 5114 */ 376, /* VMINSSZrr_Intkz */ }, { /* 5115 */ 374, /* VMINSSZrrb */ }, { /* 5116 */ 375, /* VMINSSZrrbk */ }, { /* 5117 */ 376, /* VMINSSZrrbkz */ }, { /* 5118 */ 380, /* VMINSSrm */ }, { /* 5119 */ 0, /* */ }, { /* 5120 */ 381, /* VMINSSrr */ }, { /* 5121 */ 0, /* */ }, { /* 5122 */ 0, /* VMLAUNCH */ }, { /* 5123 */ 0, /* VMLOAD32 */ }, { /* 5124 */ 0, /* VMLOAD64 */ }, { /* 5125 */ 0, /* VMMCALL */ }, { /* 5126 */ 632, /* VMOV64toPQIZrr */ }, { /* 5127 */ 105, /* VMOV64toPQIrm */ }, { /* 5128 */ 243, /* VMOV64toPQIrr */ }, { /* 5129 */ 0, /* */ }, { /* 5130 */ 0, /* */ }, { /* 5131 */ 0, /* */ }, { /* 5132 */ 633, /* VMOVAPDYmr */ }, { /* 5133 */ 475, /* VMOVAPDYrm */ }, { /* 5134 */ 476, /* VMOVAPDYrr */ }, { /* 5135 */ 634, /* VMOVAPDYrr_REV */ }, { /* 5136 */ 635, /* VMOVAPDZ128mr */ }, { /* 5137 */ 636, /* VMOVAPDZ128mrk */ }, { /* 5138 */ 637, /* VMOVAPDZ128rm */ }, { /* 5139 */ 638, /* VMOVAPDZ128rmk */ }, { /* 5140 */ 639, /* VMOVAPDZ128rmkz */ }, { /* 5141 */ 640, /* VMOVAPDZ128rr */ }, { /* 5142 */ 641, /* VMOVAPDZ128rr_alt */ }, { /* 5143 */ 545, /* VMOVAPDZ128rrk */ }, { /* 5144 */ 457, /* VMOVAPDZ128rrk_alt */ }, { /* 5145 */ 546, /* VMOVAPDZ128rrkz */ }, { /* 5146 */ 458, /* VMOVAPDZ128rrkz_alt */ }, { /* 5147 */ 642, /* VMOVAPDZ256mr */ }, { /* 5148 */ 643, /* VMOVAPDZ256mrk */ }, { /* 5149 */ 644, /* VMOVAPDZ256rm */ }, { /* 5150 */ 645, /* VMOVAPDZ256rmk */ }, { /* 5151 */ 646, /* VMOVAPDZ256rmkz */ }, { /* 5152 */ 647, /* VMOVAPDZ256rr */ }, { /* 5153 */ 648, /* VMOVAPDZ256rr_alt */ }, { /* 5154 */ 549, /* VMOVAPDZ256rrk */ }, { /* 5155 */ 460, /* VMOVAPDZ256rrk_alt */ }, { /* 5156 */ 550, /* VMOVAPDZ256rrkz */ }, { /* 5157 */ 461, /* VMOVAPDZ256rrkz_alt */ }, { /* 5158 */ 649, /* VMOVAPDZmr */ }, { /* 5159 */ 650, /* VMOVAPDZmrk */ }, { /* 5160 */ 477, /* VMOVAPDZrm */ }, { /* 5161 */ 528, /* VMOVAPDZrmk */ }, { /* 5162 */ 529, /* VMOVAPDZrmkz */ }, { /* 5163 */ 478, /* VMOVAPDZrr */ }, { /* 5164 */ 651, /* VMOVAPDZrr_alt */ }, { /* 5165 */ 533, /* VMOVAPDZrrk */ }, { /* 5166 */ 463, /* VMOVAPDZrrk_alt */ }, { /* 5167 */ 534, /* VMOVAPDZrrkz */ }, { /* 5168 */ 464, /* VMOVAPDZrrkz_alt */ }, { /* 5169 */ 246, /* VMOVAPDmr */ }, { /* 5170 */ 44, /* VMOVAPDrm */ }, { /* 5171 */ 45, /* VMOVAPDrr */ }, { /* 5172 */ 247, /* VMOVAPDrr_REV */ }, { /* 5173 */ 633, /* VMOVAPSYmr */ }, { /* 5174 */ 475, /* VMOVAPSYrm */ }, { /* 5175 */ 476, /* VMOVAPSYrr */ }, { /* 5176 */ 634, /* VMOVAPSYrr_REV */ }, { /* 5177 */ 635, /* VMOVAPSZ128mr */ }, { /* 5178 */ 652, /* VMOVAPSZ128mrk */ }, { /* 5179 */ 637, /* VMOVAPSZ128rm */ }, { /* 5180 */ 653, /* VMOVAPSZ128rmk */ }, { /* 5181 */ 654, /* VMOVAPSZ128rmkz */ }, { /* 5182 */ 640, /* VMOVAPSZ128rr */ }, { /* 5183 */ 641, /* VMOVAPSZ128rr_alt */ }, { /* 5184 */ 555, /* VMOVAPSZ128rrk */ }, { /* 5185 */ 466, /* VMOVAPSZ128rrk_alt */ }, { /* 5186 */ 556, /* VMOVAPSZ128rrkz */ }, { /* 5187 */ 467, /* VMOVAPSZ128rrkz_alt */ }, { /* 5188 */ 642, /* VMOVAPSZ256mr */ }, { /* 5189 */ 655, /* VMOVAPSZ256mrk */ }, { /* 5190 */ 644, /* VMOVAPSZ256rm */ }, { /* 5191 */ 656, /* VMOVAPSZ256rmk */ }, { /* 5192 */ 657, /* VMOVAPSZ256rmkz */ }, { /* 5193 */ 647, /* VMOVAPSZ256rr */ }, { /* 5194 */ 648, /* VMOVAPSZ256rr_alt */ }, { /* 5195 */ 559, /* VMOVAPSZ256rrk */ }, { /* 5196 */ 469, /* VMOVAPSZ256rrk_alt */ }, { /* 5197 */ 560, /* VMOVAPSZ256rrkz */ }, { /* 5198 */ 470, /* VMOVAPSZ256rrkz_alt */ }, { /* 5199 */ 649, /* VMOVAPSZmr */ }, { /* 5200 */ 658, /* VMOVAPSZmrk */ }, { /* 5201 */ 477, /* VMOVAPSZrm */ }, { /* 5202 */ 537, /* VMOVAPSZrmk */ }, { /* 5203 */ 538, /* VMOVAPSZrmkz */ }, { /* 5204 */ 478, /* VMOVAPSZrr */ }, { /* 5205 */ 651, /* VMOVAPSZrr_alt */ }, { /* 5206 */ 541, /* VMOVAPSZrrk */ }, { /* 5207 */ 472, /* VMOVAPSZrrk_alt */ }, { /* 5208 */ 542, /* VMOVAPSZrrkz */ }, { /* 5209 */ 473, /* VMOVAPSZrrkz_alt */ }, { /* 5210 */ 246, /* VMOVAPSmr */ }, { /* 5211 */ 44, /* VMOVAPSrm */ }, { /* 5212 */ 45, /* VMOVAPSrr */ }, { /* 5213 */ 247, /* VMOVAPSrr_REV */ }, { /* 5214 */ 475, /* VMOVDDUPYrm */ }, { /* 5215 */ 476, /* VMOVDDUPYrr */ }, { /* 5216 */ 477, /* VMOVDDUPZrm */ }, { /* 5217 */ 478, /* VMOVDDUPZrr */ }, { /* 5218 */ 106, /* VMOVDDUPrm */ }, { /* 5219 */ 45, /* VMOVDDUPrr */ }, { /* 5220 */ 659, /* VMOVDI2PDIZrm */ }, { /* 5221 */ 660, /* VMOVDI2PDIZrr */ }, { /* 5222 */ 105, /* VMOVDI2PDIrm */ }, { /* 5223 */ 248, /* VMOVDI2PDIrr */ }, { /* 5224 */ 0, /* */ }, { /* 5225 */ 0, /* */ }, { /* 5226 */ 0, /* */ }, { /* 5227 */ 0, /* */ }, { /* 5228 */ 635, /* VMOVDQA32Z128mr */ }, { /* 5229 */ 652, /* VMOVDQA32Z128mrk */ }, { /* 5230 */ 637, /* VMOVDQA32Z128rm */ }, { /* 5231 */ 653, /* VMOVDQA32Z128rmk */ }, { /* 5232 */ 654, /* VMOVDQA32Z128rmkz */ }, { /* 5233 */ 640, /* VMOVDQA32Z128rr */ }, { /* 5234 */ 641, /* VMOVDQA32Z128rr_alt */ }, { /* 5235 */ 555, /* VMOVDQA32Z128rrk */ }, { /* 5236 */ 466, /* VMOVDQA32Z128rrk_alt */ }, { /* 5237 */ 556, /* VMOVDQA32Z128rrkz */ }, { /* 5238 */ 467, /* VMOVDQA32Z128rrkz_alt */ }, { /* 5239 */ 642, /* VMOVDQA32Z256mr */ }, { /* 5240 */ 655, /* VMOVDQA32Z256mrk */ }, { /* 5241 */ 644, /* VMOVDQA32Z256rm */ }, { /* 5242 */ 656, /* VMOVDQA32Z256rmk */ }, { /* 5243 */ 657, /* VMOVDQA32Z256rmkz */ }, { /* 5244 */ 647, /* VMOVDQA32Z256rr */ }, { /* 5245 */ 648, /* VMOVDQA32Z256rr_alt */ }, { /* 5246 */ 559, /* VMOVDQA32Z256rrk */ }, { /* 5247 */ 469, /* VMOVDQA32Z256rrk_alt */ }, { /* 5248 */ 560, /* VMOVDQA32Z256rrkz */ }, { /* 5249 */ 470, /* VMOVDQA32Z256rrkz_alt */ }, { /* 5250 */ 649, /* VMOVDQA32Zmr */ }, { /* 5251 */ 658, /* VMOVDQA32Zmrk */ }, { /* 5252 */ 477, /* VMOVDQA32Zrm */ }, { /* 5253 */ 537, /* VMOVDQA32Zrmk */ }, { /* 5254 */ 538, /* VMOVDQA32Zrmkz */ }, { /* 5255 */ 478, /* VMOVDQA32Zrr */ }, { /* 5256 */ 651, /* VMOVDQA32Zrr_alt */ }, { /* 5257 */ 541, /* VMOVDQA32Zrrk */ }, { /* 5258 */ 472, /* VMOVDQA32Zrrk_alt */ }, { /* 5259 */ 542, /* VMOVDQA32Zrrkz */ }, { /* 5260 */ 473, /* VMOVDQA32Zrrkz_alt */ }, { /* 5261 */ 635, /* VMOVDQA64Z128mr */ }, { /* 5262 */ 636, /* VMOVDQA64Z128mrk */ }, { /* 5263 */ 637, /* VMOVDQA64Z128rm */ }, { /* 5264 */ 638, /* VMOVDQA64Z128rmk */ }, { /* 5265 */ 639, /* VMOVDQA64Z128rmkz */ }, { /* 5266 */ 640, /* VMOVDQA64Z128rr */ }, { /* 5267 */ 641, /* VMOVDQA64Z128rr_alt */ }, { /* 5268 */ 545, /* VMOVDQA64Z128rrk */ }, { /* 5269 */ 457, /* VMOVDQA64Z128rrk_alt */ }, { /* 5270 */ 546, /* VMOVDQA64Z128rrkz */ }, { /* 5271 */ 458, /* VMOVDQA64Z128rrkz_alt */ }, { /* 5272 */ 642, /* VMOVDQA64Z256mr */ }, { /* 5273 */ 643, /* VMOVDQA64Z256mrk */ }, { /* 5274 */ 644, /* VMOVDQA64Z256rm */ }, { /* 5275 */ 645, /* VMOVDQA64Z256rmk */ }, { /* 5276 */ 646, /* VMOVDQA64Z256rmkz */ }, { /* 5277 */ 647, /* VMOVDQA64Z256rr */ }, { /* 5278 */ 648, /* VMOVDQA64Z256rr_alt */ }, { /* 5279 */ 549, /* VMOVDQA64Z256rrk */ }, { /* 5280 */ 460, /* VMOVDQA64Z256rrk_alt */ }, { /* 5281 */ 550, /* VMOVDQA64Z256rrkz */ }, { /* 5282 */ 461, /* VMOVDQA64Z256rrkz_alt */ }, { /* 5283 */ 649, /* VMOVDQA64Zmr */ }, { /* 5284 */ 650, /* VMOVDQA64Zmrk */ }, { /* 5285 */ 477, /* VMOVDQA64Zrm */ }, { /* 5286 */ 528, /* VMOVDQA64Zrmk */ }, { /* 5287 */ 529, /* VMOVDQA64Zrmkz */ }, { /* 5288 */ 478, /* VMOVDQA64Zrr */ }, { /* 5289 */ 651, /* VMOVDQA64Zrr_alt */ }, { /* 5290 */ 533, /* VMOVDQA64Zrrk */ }, { /* 5291 */ 463, /* VMOVDQA64Zrrk_alt */ }, { /* 5292 */ 534, /* VMOVDQA64Zrrkz */ }, { /* 5293 */ 464, /* VMOVDQA64Zrrkz_alt */ }, { /* 5294 */ 633, /* VMOVDQAYmr */ }, { /* 5295 */ 475, /* VMOVDQAYrm */ }, { /* 5296 */ 476, /* VMOVDQAYrr */ }, { /* 5297 */ 634, /* VMOVDQAYrr_REV */ }, { /* 5298 */ 246, /* VMOVDQAmr */ }, { /* 5299 */ 44, /* VMOVDQArm */ }, { /* 5300 */ 45, /* VMOVDQArr */ }, { /* 5301 */ 247, /* VMOVDQArr_REV */ }, { /* 5302 */ 635, /* VMOVDQU16Z128mr */ }, { /* 5303 */ 661, /* VMOVDQU16Z128mrk */ }, { /* 5304 */ 637, /* VMOVDQU16Z128rm */ }, { /* 5305 */ 662, /* VMOVDQU16Z128rmk */ }, { /* 5306 */ 663, /* VMOVDQU16Z128rmkz */ }, { /* 5307 */ 640, /* VMOVDQU16Z128rr */ }, { /* 5308 */ 641, /* VMOVDQU16Z128rr_alt */ }, { /* 5309 */ 664, /* VMOVDQU16Z128rrk */ }, { /* 5310 */ 665, /* VMOVDQU16Z128rrk_alt */ }, { /* 5311 */ 666, /* VMOVDQU16Z128rrkz */ }, { /* 5312 */ 667, /* VMOVDQU16Z128rrkz_alt */ }, { /* 5313 */ 642, /* VMOVDQU16Z256mr */ }, { /* 5314 */ 668, /* VMOVDQU16Z256mrk */ }, { /* 5315 */ 644, /* VMOVDQU16Z256rm */ }, { /* 5316 */ 669, /* VMOVDQU16Z256rmk */ }, { /* 5317 */ 670, /* VMOVDQU16Z256rmkz */ }, { /* 5318 */ 647, /* VMOVDQU16Z256rr */ }, { /* 5319 */ 648, /* VMOVDQU16Z256rr_alt */ }, { /* 5320 */ 671, /* VMOVDQU16Z256rrk */ }, { /* 5321 */ 672, /* VMOVDQU16Z256rrk_alt */ }, { /* 5322 */ 673, /* VMOVDQU16Z256rrkz */ }, { /* 5323 */ 674, /* VMOVDQU16Z256rrkz_alt */ }, { /* 5324 */ 649, /* VMOVDQU16Zmr */ }, { /* 5325 */ 675, /* VMOVDQU16Zmrk */ }, { /* 5326 */ 477, /* VMOVDQU16Zrm */ }, { /* 5327 */ 676, /* VMOVDQU16Zrmk */ }, { /* 5328 */ 677, /* VMOVDQU16Zrmkz */ }, { /* 5329 */ 478, /* VMOVDQU16Zrr */ }, { /* 5330 */ 651, /* VMOVDQU16Zrr_alt */ }, { /* 5331 */ 678, /* VMOVDQU16Zrrk */ }, { /* 5332 */ 679, /* VMOVDQU16Zrrk_alt */ }, { /* 5333 */ 680, /* VMOVDQU16Zrrkz */ }, { /* 5334 */ 681, /* VMOVDQU16Zrrkz_alt */ }, { /* 5335 */ 635, /* VMOVDQU32Z128mr */ }, { /* 5336 */ 652, /* VMOVDQU32Z128mrk */ }, { /* 5337 */ 637, /* VMOVDQU32Z128rm */ }, { /* 5338 */ 653, /* VMOVDQU32Z128rmk */ }, { /* 5339 */ 654, /* VMOVDQU32Z128rmkz */ }, { /* 5340 */ 640, /* VMOVDQU32Z128rr */ }, { /* 5341 */ 641, /* VMOVDQU32Z128rr_alt */ }, { /* 5342 */ 555, /* VMOVDQU32Z128rrk */ }, { /* 5343 */ 466, /* VMOVDQU32Z128rrk_alt */ }, { /* 5344 */ 556, /* VMOVDQU32Z128rrkz */ }, { /* 5345 */ 467, /* VMOVDQU32Z128rrkz_alt */ }, { /* 5346 */ 642, /* VMOVDQU32Z256mr */ }, { /* 5347 */ 655, /* VMOVDQU32Z256mrk */ }, { /* 5348 */ 644, /* VMOVDQU32Z256rm */ }, { /* 5349 */ 656, /* VMOVDQU32Z256rmk */ }, { /* 5350 */ 657, /* VMOVDQU32Z256rmkz */ }, { /* 5351 */ 647, /* VMOVDQU32Z256rr */ }, { /* 5352 */ 648, /* VMOVDQU32Z256rr_alt */ }, { /* 5353 */ 559, /* VMOVDQU32Z256rrk */ }, { /* 5354 */ 469, /* VMOVDQU32Z256rrk_alt */ }, { /* 5355 */ 560, /* VMOVDQU32Z256rrkz */ }, { /* 5356 */ 470, /* VMOVDQU32Z256rrkz_alt */ }, { /* 5357 */ 649, /* VMOVDQU32Zmr */ }, { /* 5358 */ 658, /* VMOVDQU32Zmrk */ }, { /* 5359 */ 477, /* VMOVDQU32Zrm */ }, { /* 5360 */ 537, /* VMOVDQU32Zrmk */ }, { /* 5361 */ 538, /* VMOVDQU32Zrmkz */ }, { /* 5362 */ 478, /* VMOVDQU32Zrr */ }, { /* 5363 */ 651, /* VMOVDQU32Zrr_alt */ }, { /* 5364 */ 541, /* VMOVDQU32Zrrk */ }, { /* 5365 */ 472, /* VMOVDQU32Zrrk_alt */ }, { /* 5366 */ 542, /* VMOVDQU32Zrrkz */ }, { /* 5367 */ 473, /* VMOVDQU32Zrrkz_alt */ }, { /* 5368 */ 635, /* VMOVDQU64Z128mr */ }, { /* 5369 */ 636, /* VMOVDQU64Z128mrk */ }, { /* 5370 */ 637, /* VMOVDQU64Z128rm */ }, { /* 5371 */ 638, /* VMOVDQU64Z128rmk */ }, { /* 5372 */ 639, /* VMOVDQU64Z128rmkz */ }, { /* 5373 */ 640, /* VMOVDQU64Z128rr */ }, { /* 5374 */ 641, /* VMOVDQU64Z128rr_alt */ }, { /* 5375 */ 545, /* VMOVDQU64Z128rrk */ }, { /* 5376 */ 457, /* VMOVDQU64Z128rrk_alt */ }, { /* 5377 */ 546, /* VMOVDQU64Z128rrkz */ }, { /* 5378 */ 458, /* VMOVDQU64Z128rrkz_alt */ }, { /* 5379 */ 642, /* VMOVDQU64Z256mr */ }, { /* 5380 */ 643, /* VMOVDQU64Z256mrk */ }, { /* 5381 */ 644, /* VMOVDQU64Z256rm */ }, { /* 5382 */ 645, /* VMOVDQU64Z256rmk */ }, { /* 5383 */ 646, /* VMOVDQU64Z256rmkz */ }, { /* 5384 */ 647, /* VMOVDQU64Z256rr */ }, { /* 5385 */ 648, /* VMOVDQU64Z256rr_alt */ }, { /* 5386 */ 549, /* VMOVDQU64Z256rrk */ }, { /* 5387 */ 460, /* VMOVDQU64Z256rrk_alt */ }, { /* 5388 */ 550, /* VMOVDQU64Z256rrkz */ }, { /* 5389 */ 461, /* VMOVDQU64Z256rrkz_alt */ }, { /* 5390 */ 649, /* VMOVDQU64Zmr */ }, { /* 5391 */ 650, /* VMOVDQU64Zmrk */ }, { /* 5392 */ 477, /* VMOVDQU64Zrm */ }, { /* 5393 */ 528, /* VMOVDQU64Zrmk */ }, { /* 5394 */ 529, /* VMOVDQU64Zrmkz */ }, { /* 5395 */ 478, /* VMOVDQU64Zrr */ }, { /* 5396 */ 651, /* VMOVDQU64Zrr_alt */ }, { /* 5397 */ 533, /* VMOVDQU64Zrrk */ }, { /* 5398 */ 463, /* VMOVDQU64Zrrk_alt */ }, { /* 5399 */ 534, /* VMOVDQU64Zrrkz */ }, { /* 5400 */ 464, /* VMOVDQU64Zrrkz_alt */ }, { /* 5401 */ 635, /* VMOVDQU8Z128mr */ }, { /* 5402 */ 682, /* VMOVDQU8Z128mrk */ }, { /* 5403 */ 637, /* VMOVDQU8Z128rm */ }, { /* 5404 */ 683, /* VMOVDQU8Z128rmk */ }, { /* 5405 */ 684, /* VMOVDQU8Z128rmkz */ }, { /* 5406 */ 640, /* VMOVDQU8Z128rr */ }, { /* 5407 */ 641, /* VMOVDQU8Z128rr_alt */ }, { /* 5408 */ 685, /* VMOVDQU8Z128rrk */ }, { /* 5409 */ 686, /* VMOVDQU8Z128rrk_alt */ }, { /* 5410 */ 687, /* VMOVDQU8Z128rrkz */ }, { /* 5411 */ 688, /* VMOVDQU8Z128rrkz_alt */ }, { /* 5412 */ 642, /* VMOVDQU8Z256mr */ }, { /* 5413 */ 689, /* VMOVDQU8Z256mrk */ }, { /* 5414 */ 644, /* VMOVDQU8Z256rm */ }, { /* 5415 */ 690, /* VMOVDQU8Z256rmk */ }, { /* 5416 */ 691, /* VMOVDQU8Z256rmkz */ }, { /* 5417 */ 647, /* VMOVDQU8Z256rr */ }, { /* 5418 */ 648, /* VMOVDQU8Z256rr_alt */ }, { /* 5419 */ 692, /* VMOVDQU8Z256rrk */ }, { /* 5420 */ 693, /* VMOVDQU8Z256rrk_alt */ }, { /* 5421 */ 694, /* VMOVDQU8Z256rrkz */ }, { /* 5422 */ 695, /* VMOVDQU8Z256rrkz_alt */ }, { /* 5423 */ 649, /* VMOVDQU8Zmr */ }, { /* 5424 */ 696, /* VMOVDQU8Zmrk */ }, { /* 5425 */ 477, /* VMOVDQU8Zrm */ }, { /* 5426 */ 697, /* VMOVDQU8Zrmk */ }, { /* 5427 */ 698, /* VMOVDQU8Zrmkz */ }, { /* 5428 */ 478, /* VMOVDQU8Zrr */ }, { /* 5429 */ 651, /* VMOVDQU8Zrr_alt */ }, { /* 5430 */ 699, /* VMOVDQU8Zrrk */ }, { /* 5431 */ 700, /* VMOVDQU8Zrrk_alt */ }, { /* 5432 */ 701, /* VMOVDQU8Zrrkz */ }, { /* 5433 */ 702, /* VMOVDQU8Zrrkz_alt */ }, { /* 5434 */ 633, /* VMOVDQUYmr */ }, { /* 5435 */ 475, /* VMOVDQUYrm */ }, { /* 5436 */ 476, /* VMOVDQUYrr */ }, { /* 5437 */ 634, /* VMOVDQUYrr_REV */ }, { /* 5438 */ 246, /* VMOVDQUmr */ }, { /* 5439 */ 44, /* VMOVDQUrm */ }, { /* 5440 */ 45, /* VMOVDQUrr */ }, { /* 5441 */ 247, /* VMOVDQUrr_REV */ }, { /* 5442 */ 310, /* VMOVHLPSZrr */ }, { /* 5443 */ 335, /* VMOVHLPSrr */ }, { /* 5444 */ 249, /* VMOVHPDmr */ }, { /* 5445 */ 703, /* VMOVHPDrm */ }, { /* 5446 */ 249, /* VMOVHPSmr */ }, { /* 5447 */ 703, /* VMOVHPSrm */ }, { /* 5448 */ 310, /* VMOVLHPSZrr */ }, { /* 5449 */ 335, /* VMOVLHPSrr */ }, { /* 5450 */ 249, /* VMOVLPDmr */ }, { /* 5451 */ 703, /* VMOVLPDrm */ }, { /* 5452 */ 249, /* VMOVLPSmr */ }, { /* 5453 */ 703, /* VMOVLPSrm */ }, { /* 5454 */ 704, /* VMOVMSKPDYrr */ }, { /* 5455 */ 110, /* VMOVMSKPDrr */ }, { /* 5456 */ 704, /* VMOVMSKPSYrr */ }, { /* 5457 */ 110, /* VMOVMSKPSrr */ }, { /* 5458 */ 475, /* VMOVNTDQAYrm */ }, { /* 5459 */ 637, /* VMOVNTDQAZ128rm */ }, { /* 5460 */ 644, /* VMOVNTDQAZ256rm */ }, { /* 5461 */ 477, /* VMOVNTDQAZrm */ }, { /* 5462 */ 44, /* VMOVNTDQArm */ }, { /* 5463 */ 633, /* VMOVNTDQYmr */ }, { /* 5464 */ 635, /* VMOVNTDQZ128mr */ }, { /* 5465 */ 642, /* VMOVNTDQZ256mr */ }, { /* 5466 */ 649, /* VMOVNTDQZmr */ }, { /* 5467 */ 246, /* VMOVNTDQmr */ }, { /* 5468 */ 633, /* VMOVNTPDYmr */ }, { /* 5469 */ 635, /* VMOVNTPDZ128mr */ }, { /* 5470 */ 642, /* VMOVNTPDZ256mr */ }, { /* 5471 */ 649, /* VMOVNTPDZmr */ }, { /* 5472 */ 246, /* VMOVNTPDmr */ }, { /* 5473 */ 633, /* VMOVNTPSYmr */ }, { /* 5474 */ 635, /* VMOVNTPSZ128mr */ }, { /* 5475 */ 642, /* VMOVNTPSZ256mr */ }, { /* 5476 */ 649, /* VMOVNTPSZmr */ }, { /* 5477 */ 246, /* VMOVNTPSmr */ }, { /* 5478 */ 705, /* VMOVPDI2DIZmr */ }, { /* 5479 */ 706, /* VMOVPDI2DIZrr */ }, { /* 5480 */ 253, /* VMOVPDI2DImr */ }, { /* 5481 */ 254, /* VMOVPDI2DIrr */ }, { /* 5482 */ 253, /* VMOVPQI2QImr */ }, { /* 5483 */ 247, /* VMOVPQI2QIrr */ }, { /* 5484 */ 707, /* VMOVPQIto64Zmr */ }, { /* 5485 */ 708, /* VMOVPQIto64Zrr */ }, { /* 5486 */ 253, /* VMOVPQIto64rm */ }, { /* 5487 */ 255, /* VMOVPQIto64rr */ }, { /* 5488 */ 709, /* VMOVQI2PQIZrm */ }, { /* 5489 */ 105, /* VMOVQI2PQIrm */ }, { /* 5490 */ 710, /* VMOVSDZmr */ }, { /* 5491 */ 711, /* VMOVSDZmrk */ }, { /* 5492 */ 712, /* VMOVSDZrm */ }, { /* 5493 */ 713, /* VMOVSDZrr */ }, { /* 5494 */ 714, /* VMOVSDZrr_REV */ }, { /* 5495 */ 715, /* VMOVSDZrrk */ }, { /* 5496 */ 256, /* VMOVSDmr */ }, { /* 5497 */ 257, /* VMOVSDrm */ }, { /* 5498 */ 716, /* VMOVSDrr */ }, { /* 5499 */ 717, /* VMOVSDrr_REV */ }, { /* 5500 */ 718, /* VMOVSDto64Zmr */ }, { /* 5501 */ 0, /* */ }, { /* 5502 */ 0, /* */ }, { /* 5503 */ 0, /* */ }, { /* 5504 */ 475, /* VMOVSHDUPYrm */ }, { /* 5505 */ 476, /* VMOVSHDUPYrr */ }, { /* 5506 */ 477, /* VMOVSHDUPZrm */ }, { /* 5507 */ 478, /* VMOVSHDUPZrr */ }, { /* 5508 */ 44, /* VMOVSHDUPrm */ }, { /* 5509 */ 45, /* VMOVSHDUPrr */ }, { /* 5510 */ 475, /* VMOVSLDUPYrm */ }, { /* 5511 */ 476, /* VMOVSLDUPYrr */ }, { /* 5512 */ 477, /* VMOVSLDUPZrm */ }, { /* 5513 */ 478, /* VMOVSLDUPZrr */ }, { /* 5514 */ 44, /* VMOVSLDUPrm */ }, { /* 5515 */ 45, /* VMOVSLDUPrr */ }, { /* 5516 */ 0, /* */ }, { /* 5517 */ 0, /* */ }, { /* 5518 */ 0, /* */ }, { /* 5519 */ 0, /* */ }, { /* 5520 */ 719, /* VMOVSSZmr */ }, { /* 5521 */ 720, /* VMOVSSZmrk */ }, { /* 5522 */ 721, /* VMOVSSZrm */ }, { /* 5523 */ 722, /* VMOVSSZrr */ }, { /* 5524 */ 723, /* VMOVSSZrr_REV */ }, { /* 5525 */ 724, /* VMOVSSZrrk */ }, { /* 5526 */ 260, /* VMOVSSmr */ }, { /* 5527 */ 261, /* VMOVSSrm */ }, { /* 5528 */ 725, /* VMOVSSrr */ }, { /* 5529 */ 726, /* VMOVSSrr_REV */ }, { /* 5530 */ 633, /* VMOVUPDYmr */ }, { /* 5531 */ 475, /* VMOVUPDYrm */ }, { /* 5532 */ 476, /* VMOVUPDYrr */ }, { /* 5533 */ 634, /* VMOVUPDYrr_REV */ }, { /* 5534 */ 635, /* VMOVUPDZ128mr */ }, { /* 5535 */ 636, /* VMOVUPDZ128mrk */ }, { /* 5536 */ 637, /* VMOVUPDZ128rm */ }, { /* 5537 */ 638, /* VMOVUPDZ128rmk */ }, { /* 5538 */ 639, /* VMOVUPDZ128rmkz */ }, { /* 5539 */ 640, /* VMOVUPDZ128rr */ }, { /* 5540 */ 641, /* VMOVUPDZ128rr_alt */ }, { /* 5541 */ 545, /* VMOVUPDZ128rrk */ }, { /* 5542 */ 457, /* VMOVUPDZ128rrk_alt */ }, { /* 5543 */ 546, /* VMOVUPDZ128rrkz */ }, { /* 5544 */ 458, /* VMOVUPDZ128rrkz_alt */ }, { /* 5545 */ 642, /* VMOVUPDZ256mr */ }, { /* 5546 */ 643, /* VMOVUPDZ256mrk */ }, { /* 5547 */ 644, /* VMOVUPDZ256rm */ }, { /* 5548 */ 645, /* VMOVUPDZ256rmk */ }, { /* 5549 */ 646, /* VMOVUPDZ256rmkz */ }, { /* 5550 */ 647, /* VMOVUPDZ256rr */ }, { /* 5551 */ 648, /* VMOVUPDZ256rr_alt */ }, { /* 5552 */ 549, /* VMOVUPDZ256rrk */ }, { /* 5553 */ 460, /* VMOVUPDZ256rrk_alt */ }, { /* 5554 */ 550, /* VMOVUPDZ256rrkz */ }, { /* 5555 */ 461, /* VMOVUPDZ256rrkz_alt */ }, { /* 5556 */ 649, /* VMOVUPDZmr */ }, { /* 5557 */ 650, /* VMOVUPDZmrk */ }, { /* 5558 */ 477, /* VMOVUPDZrm */ }, { /* 5559 */ 528, /* VMOVUPDZrmk */ }, { /* 5560 */ 529, /* VMOVUPDZrmkz */ }, { /* 5561 */ 478, /* VMOVUPDZrr */ }, { /* 5562 */ 651, /* VMOVUPDZrr_alt */ }, { /* 5563 */ 533, /* VMOVUPDZrrk */ }, { /* 5564 */ 463, /* VMOVUPDZrrk_alt */ }, { /* 5565 */ 534, /* VMOVUPDZrrkz */ }, { /* 5566 */ 464, /* VMOVUPDZrrkz_alt */ }, { /* 5567 */ 246, /* VMOVUPDmr */ }, { /* 5568 */ 44, /* VMOVUPDrm */ }, { /* 5569 */ 45, /* VMOVUPDrr */ }, { /* 5570 */ 247, /* VMOVUPDrr_REV */ }, { /* 5571 */ 633, /* VMOVUPSYmr */ }, { /* 5572 */ 475, /* VMOVUPSYrm */ }, { /* 5573 */ 476, /* VMOVUPSYrr */ }, { /* 5574 */ 634, /* VMOVUPSYrr_REV */ }, { /* 5575 */ 635, /* VMOVUPSZ128mr */ }, { /* 5576 */ 652, /* VMOVUPSZ128mrk */ }, { /* 5577 */ 637, /* VMOVUPSZ128rm */ }, { /* 5578 */ 653, /* VMOVUPSZ128rmk */ }, { /* 5579 */ 654, /* VMOVUPSZ128rmkz */ }, { /* 5580 */ 640, /* VMOVUPSZ128rr */ }, { /* 5581 */ 641, /* VMOVUPSZ128rr_alt */ }, { /* 5582 */ 555, /* VMOVUPSZ128rrk */ }, { /* 5583 */ 466, /* VMOVUPSZ128rrk_alt */ }, { /* 5584 */ 556, /* VMOVUPSZ128rrkz */ }, { /* 5585 */ 467, /* VMOVUPSZ128rrkz_alt */ }, { /* 5586 */ 642, /* VMOVUPSZ256mr */ }, { /* 5587 */ 655, /* VMOVUPSZ256mrk */ }, { /* 5588 */ 644, /* VMOVUPSZ256rm */ }, { /* 5589 */ 656, /* VMOVUPSZ256rmk */ }, { /* 5590 */ 657, /* VMOVUPSZ256rmkz */ }, { /* 5591 */ 647, /* VMOVUPSZ256rr */ }, { /* 5592 */ 648, /* VMOVUPSZ256rr_alt */ }, { /* 5593 */ 559, /* VMOVUPSZ256rrk */ }, { /* 5594 */ 469, /* VMOVUPSZ256rrk_alt */ }, { /* 5595 */ 560, /* VMOVUPSZ256rrkz */ }, { /* 5596 */ 470, /* VMOVUPSZ256rrkz_alt */ }, { /* 5597 */ 649, /* VMOVUPSZmr */ }, { /* 5598 */ 658, /* VMOVUPSZmrk */ }, { /* 5599 */ 477, /* VMOVUPSZrm */ }, { /* 5600 */ 537, /* VMOVUPSZrmk */ }, { /* 5601 */ 538, /* VMOVUPSZrmkz */ }, { /* 5602 */ 478, /* VMOVUPSZrr */ }, { /* 5603 */ 651, /* VMOVUPSZrr_alt */ }, { /* 5604 */ 541, /* VMOVUPSZrrk */ }, { /* 5605 */ 472, /* VMOVUPSZrrk_alt */ }, { /* 5606 */ 542, /* VMOVUPSZrrkz */ }, { /* 5607 */ 473, /* VMOVUPSZrrkz_alt */ }, { /* 5608 */ 246, /* VMOVUPSmr */ }, { /* 5609 */ 44, /* VMOVUPSrm */ }, { /* 5610 */ 45, /* VMOVUPSrr */ }, { /* 5611 */ 247, /* VMOVUPSrr_REV */ }, { /* 5612 */ 453, /* VMOVZPQILo2PQIZrm */ }, { /* 5613 */ 640, /* VMOVZPQILo2PQIZrr */ }, { /* 5614 */ 0, /* */ }, { /* 5615 */ 45, /* VMOVZPQILo2PQIrr */ }, { /* 5616 */ 0, /* */ }, { /* 5617 */ 0, /* */ }, { /* 5618 */ 388, /* VMPSADBWYrmi */ }, { /* 5619 */ 389, /* VMPSADBWYrri */ }, { /* 5620 */ 390, /* VMPSADBWrmi */ }, { /* 5621 */ 391, /* VMPSADBWrri */ }, { /* 5622 */ 38, /* VMPTRLDm */ }, { /* 5623 */ 38, /* VMPTRSTm */ }, { /* 5624 */ 251, /* VMREAD32rm */ }, { /* 5625 */ 727, /* VMREAD32rr */ }, { /* 5626 */ 16, /* VMREAD64rm */ }, { /* 5627 */ 76, /* VMREAD64rr */ }, { /* 5628 */ 0, /* VMRESUME */ }, { /* 5629 */ 0, /* VMRUN32 */ }, { /* 5630 */ 0, /* VMRUN64 */ }, { /* 5631 */ 0, /* VMSAVE32 */ }, { /* 5632 */ 0, /* VMSAVE64 */ }, { /* 5633 */ 302, /* VMULPDYrm */ }, { /* 5634 */ 303, /* VMULPDYrr */ }, { /* 5635 */ 304, /* VMULPDZ128rm */ }, { /* 5636 */ 305, /* VMULPDZ128rmb */ }, { /* 5637 */ 306, /* VMULPDZ128rmbk */ }, { /* 5638 */ 307, /* VMULPDZ128rmbkz */ }, { /* 5639 */ 308, /* VMULPDZ128rmk */ }, { /* 5640 */ 309, /* VMULPDZ128rmkz */ }, { /* 5641 */ 310, /* VMULPDZ128rr */ }, { /* 5642 */ 311, /* VMULPDZ128rrk */ }, { /* 5643 */ 312, /* VMULPDZ128rrkz */ }, { /* 5644 */ 313, /* VMULPDZ256rm */ }, { /* 5645 */ 314, /* VMULPDZ256rmb */ }, { /* 5646 */ 315, /* VMULPDZ256rmbk */ }, { /* 5647 */ 316, /* VMULPDZ256rmbkz */ }, { /* 5648 */ 317, /* VMULPDZ256rmk */ }, { /* 5649 */ 318, /* VMULPDZ256rmkz */ }, { /* 5650 */ 319, /* VMULPDZ256rr */ }, { /* 5651 */ 320, /* VMULPDZ256rrk */ }, { /* 5652 */ 321, /* VMULPDZ256rrkz */ }, { /* 5653 */ 322, /* VMULPDZrb */ }, { /* 5654 */ 323, /* VMULPDZrbk */ }, { /* 5655 */ 324, /* VMULPDZrbkz */ }, { /* 5656 */ 325, /* VMULPDZrm */ }, { /* 5657 */ 326, /* VMULPDZrmb */ }, { /* 5658 */ 327, /* VMULPDZrmbk */ }, { /* 5659 */ 328, /* VMULPDZrmbkz */ }, { /* 5660 */ 329, /* VMULPDZrmk */ }, { /* 5661 */ 330, /* VMULPDZrmkz */ }, { /* 5662 */ 331, /* VMULPDZrr */ }, { /* 5663 */ 332, /* VMULPDZrrk */ }, { /* 5664 */ 333, /* VMULPDZrrkz */ }, { /* 5665 */ 334, /* VMULPDrm */ }, { /* 5666 */ 335, /* VMULPDrr */ }, { /* 5667 */ 302, /* VMULPSYrm */ }, { /* 5668 */ 303, /* VMULPSYrr */ }, { /* 5669 */ 304, /* VMULPSZ128rm */ }, { /* 5670 */ 336, /* VMULPSZ128rmb */ }, { /* 5671 */ 337, /* VMULPSZ128rmbk */ }, { /* 5672 */ 338, /* VMULPSZ128rmbkz */ }, { /* 5673 */ 339, /* VMULPSZ128rmk */ }, { /* 5674 */ 340, /* VMULPSZ128rmkz */ }, { /* 5675 */ 310, /* VMULPSZ128rr */ }, { /* 5676 */ 341, /* VMULPSZ128rrk */ }, { /* 5677 */ 342, /* VMULPSZ128rrkz */ }, { /* 5678 */ 313, /* VMULPSZ256rm */ }, { /* 5679 */ 343, /* VMULPSZ256rmb */ }, { /* 5680 */ 344, /* VMULPSZ256rmbk */ }, { /* 5681 */ 345, /* VMULPSZ256rmbkz */ }, { /* 5682 */ 346, /* VMULPSZ256rmk */ }, { /* 5683 */ 347, /* VMULPSZ256rmkz */ }, { /* 5684 */ 319, /* VMULPSZ256rr */ }, { /* 5685 */ 348, /* VMULPSZ256rrk */ }, { /* 5686 */ 349, /* VMULPSZ256rrkz */ }, { /* 5687 */ 350, /* VMULPSZrb */ }, { /* 5688 */ 351, /* VMULPSZrbk */ }, { /* 5689 */ 352, /* VMULPSZrbkz */ }, { /* 5690 */ 325, /* VMULPSZrm */ }, { /* 5691 */ 353, /* VMULPSZrmb */ }, { /* 5692 */ 354, /* VMULPSZrmbk */ }, { /* 5693 */ 355, /* VMULPSZrmbkz */ }, { /* 5694 */ 356, /* VMULPSZrmk */ }, { /* 5695 */ 357, /* VMULPSZrmkz */ }, { /* 5696 */ 331, /* VMULPSZrr */ }, { /* 5697 */ 358, /* VMULPSZrrk */ }, { /* 5698 */ 359, /* VMULPSZrrkz */ }, { /* 5699 */ 334, /* VMULPSrm */ }, { /* 5700 */ 335, /* VMULPSrr */ }, { /* 5701 */ 0, /* */ }, { /* 5702 */ 360, /* VMULSDZrm_Int */ }, { /* 5703 */ 361, /* VMULSDZrm_Intk */ }, { /* 5704 */ 362, /* VMULSDZrm_Intkz */ }, { /* 5705 */ 0, /* */ }, { /* 5706 */ 363, /* VMULSDZrr_Int */ }, { /* 5707 */ 364, /* VMULSDZrr_Intk */ }, { /* 5708 */ 365, /* VMULSDZrr_Intkz */ }, { /* 5709 */ 366, /* VMULSDZrrb */ }, { /* 5710 */ 367, /* VMULSDZrrbk */ }, { /* 5711 */ 368, /* VMULSDZrrbkz */ }, { /* 5712 */ 369, /* VMULSDrm */ }, { /* 5713 */ 0, /* */ }, { /* 5714 */ 370, /* VMULSDrr */ }, { /* 5715 */ 0, /* */ }, { /* 5716 */ 0, /* */ }, { /* 5717 */ 371, /* VMULSSZrm_Int */ }, { /* 5718 */ 372, /* VMULSSZrm_Intk */ }, { /* 5719 */ 373, /* VMULSSZrm_Intkz */ }, { /* 5720 */ 0, /* */ }, { /* 5721 */ 374, /* VMULSSZrr_Int */ }, { /* 5722 */ 375, /* VMULSSZrr_Intk */ }, { /* 5723 */ 376, /* VMULSSZrr_Intkz */ }, { /* 5724 */ 377, /* VMULSSZrrb */ }, { /* 5725 */ 378, /* VMULSSZrrbk */ }, { /* 5726 */ 379, /* VMULSSZrrbkz */ }, { /* 5727 */ 380, /* VMULSSrm */ }, { /* 5728 */ 0, /* */ }, { /* 5729 */ 381, /* VMULSSrr */ }, { /* 5730 */ 0, /* */ }, { /* 5731 */ 40, /* VMWRITE32rm */ }, { /* 5732 */ 41, /* VMWRITE32rr */ }, { /* 5733 */ 42, /* VMWRITE64rm */ }, { /* 5734 */ 43, /* VMWRITE64rr */ }, { /* 5735 */ 0, /* VMXOFF */ }, { /* 5736 */ 38, /* VMXON */ }, { /* 5737 */ 302, /* VORPDYrm */ }, { /* 5738 */ 303, /* VORPDYrr */ }, { /* 5739 */ 334, /* VORPDrm */ }, { /* 5740 */ 335, /* VORPDrr */ }, { /* 5741 */ 302, /* VORPSYrm */ }, { /* 5742 */ 303, /* VORPSYrr */ }, { /* 5743 */ 334, /* VORPSrm */ }, { /* 5744 */ 335, /* VORPSrr */ }, { /* 5745 */ 44, /* VPABSBrm128 */ }, { /* 5746 */ 475, /* VPABSBrm256 */ }, { /* 5747 */ 45, /* VPABSBrr128 */ }, { /* 5748 */ 476, /* VPABSBrr256 */ }, { /* 5749 */ 477, /* VPABSDZrm */ }, { /* 5750 */ 728, /* VPABSDZrmb */ }, { /* 5751 */ 729, /* VPABSDZrmbk */ }, { /* 5752 */ 729, /* VPABSDZrmbkz */ }, { /* 5753 */ 538, /* VPABSDZrmk */ }, { /* 5754 */ 538, /* VPABSDZrmkz */ }, { /* 5755 */ 478, /* VPABSDZrr */ }, { /* 5756 */ 542, /* VPABSDZrrk */ }, { /* 5757 */ 542, /* VPABSDZrrkz */ }, { /* 5758 */ 44, /* VPABSDrm128 */ }, { /* 5759 */ 475, /* VPABSDrm256 */ }, { /* 5760 */ 45, /* VPABSDrr128 */ }, { /* 5761 */ 476, /* VPABSDrr256 */ }, { /* 5762 */ 477, /* VPABSQZrm */ }, { /* 5763 */ 730, /* VPABSQZrmb */ }, { /* 5764 */ 731, /* VPABSQZrmbk */ }, { /* 5765 */ 731, /* VPABSQZrmbkz */ }, { /* 5766 */ 529, /* VPABSQZrmk */ }, { /* 5767 */ 529, /* VPABSQZrmkz */ }, { /* 5768 */ 478, /* VPABSQZrr */ }, { /* 5769 */ 534, /* VPABSQZrrk */ }, { /* 5770 */ 534, /* VPABSQZrrkz */ }, { /* 5771 */ 44, /* VPABSWrm128 */ }, { /* 5772 */ 475, /* VPABSWrm256 */ }, { /* 5773 */ 45, /* VPABSWrr128 */ }, { /* 5774 */ 476, /* VPABSWrr256 */ }, { /* 5775 */ 302, /* VPACKSSDWYrm */ }, { /* 5776 */ 303, /* VPACKSSDWYrr */ }, { /* 5777 */ 334, /* VPACKSSDWrm */ }, { /* 5778 */ 335, /* VPACKSSDWrr */ }, { /* 5779 */ 302, /* VPACKSSWBYrm */ }, { /* 5780 */ 303, /* VPACKSSWBYrr */ }, { /* 5781 */ 334, /* VPACKSSWBrm */ }, { /* 5782 */ 335, /* VPACKSSWBrr */ }, { /* 5783 */ 302, /* VPACKUSDWYrm */ }, { /* 5784 */ 303, /* VPACKUSDWYrr */ }, { /* 5785 */ 334, /* VPACKUSDWrm */ }, { /* 5786 */ 335, /* VPACKUSDWrr */ }, { /* 5787 */ 302, /* VPACKUSWBYrm */ }, { /* 5788 */ 303, /* VPACKUSWBYrr */ }, { /* 5789 */ 334, /* VPACKUSWBrm */ }, { /* 5790 */ 335, /* VPACKUSWBrr */ }, { /* 5791 */ 302, /* VPADDBYrm */ }, { /* 5792 */ 303, /* VPADDBYrr */ }, { /* 5793 */ 304, /* VPADDBZ128rm */ }, { /* 5794 */ 732, /* VPADDBZ128rmk */ }, { /* 5795 */ 733, /* VPADDBZ128rmkz */ }, { /* 5796 */ 310, /* VPADDBZ128rr */ }, { /* 5797 */ 734, /* VPADDBZ128rrk */ }, { /* 5798 */ 735, /* VPADDBZ128rrkz */ }, { /* 5799 */ 313, /* VPADDBZ256rm */ }, { /* 5800 */ 736, /* VPADDBZ256rmk */ }, { /* 5801 */ 737, /* VPADDBZ256rmkz */ }, { /* 5802 */ 319, /* VPADDBZ256rr */ }, { /* 5803 */ 738, /* VPADDBZ256rrk */ }, { /* 5804 */ 739, /* VPADDBZ256rrkz */ }, { /* 5805 */ 325, /* VPADDBZrm */ }, { /* 5806 */ 740, /* VPADDBZrmk */ }, { /* 5807 */ 741, /* VPADDBZrmkz */ }, { /* 5808 */ 331, /* VPADDBZrr */ }, { /* 5809 */ 742, /* VPADDBZrrk */ }, { /* 5810 */ 743, /* VPADDBZrrkz */ }, { /* 5811 */ 334, /* VPADDBrm */ }, { /* 5812 */ 335, /* VPADDBrr */ }, { /* 5813 */ 302, /* VPADDDYrm */ }, { /* 5814 */ 303, /* VPADDDYrr */ }, { /* 5815 */ 304, /* VPADDDZ128rm */ }, { /* 5816 */ 744, /* VPADDDZ128rmb */ }, { /* 5817 */ 745, /* VPADDDZ128rmbk */ }, { /* 5818 */ 746, /* VPADDDZ128rmbkz */ }, { /* 5819 */ 339, /* VPADDDZ128rmk */ }, { /* 5820 */ 340, /* VPADDDZ128rmkz */ }, { /* 5821 */ 310, /* VPADDDZ128rr */ }, { /* 5822 */ 341, /* VPADDDZ128rrk */ }, { /* 5823 */ 342, /* VPADDDZ128rrkz */ }, { /* 5824 */ 313, /* VPADDDZ256rm */ }, { /* 5825 */ 747, /* VPADDDZ256rmb */ }, { /* 5826 */ 748, /* VPADDDZ256rmbk */ }, { /* 5827 */ 749, /* VPADDDZ256rmbkz */ }, { /* 5828 */ 346, /* VPADDDZ256rmk */ }, { /* 5829 */ 347, /* VPADDDZ256rmkz */ }, { /* 5830 */ 319, /* VPADDDZ256rr */ }, { /* 5831 */ 348, /* VPADDDZ256rrk */ }, { /* 5832 */ 349, /* VPADDDZ256rrkz */ }, { /* 5833 */ 325, /* VPADDDZrm */ }, { /* 5834 */ 750, /* VPADDDZrmb */ }, { /* 5835 */ 751, /* VPADDDZrmbk */ }, { /* 5836 */ 752, /* VPADDDZrmbkz */ }, { /* 5837 */ 356, /* VPADDDZrmk */ }, { /* 5838 */ 357, /* VPADDDZrmkz */ }, { /* 5839 */ 331, /* VPADDDZrr */ }, { /* 5840 */ 358, /* VPADDDZrrk */ }, { /* 5841 */ 359, /* VPADDDZrrkz */ }, { /* 5842 */ 334, /* VPADDDrm */ }, { /* 5843 */ 335, /* VPADDDrr */ }, { /* 5844 */ 302, /* VPADDQYrm */ }, { /* 5845 */ 303, /* VPADDQYrr */ }, { /* 5846 */ 304, /* VPADDQZ128rm */ }, { /* 5847 */ 753, /* VPADDQZ128rmb */ }, { /* 5848 */ 754, /* VPADDQZ128rmbk */ }, { /* 5849 */ 755, /* VPADDQZ128rmbkz */ }, { /* 5850 */ 308, /* VPADDQZ128rmk */ }, { /* 5851 */ 309, /* VPADDQZ128rmkz */ }, { /* 5852 */ 310, /* VPADDQZ128rr */ }, { /* 5853 */ 311, /* VPADDQZ128rrk */ }, { /* 5854 */ 312, /* VPADDQZ128rrkz */ }, { /* 5855 */ 313, /* VPADDQZ256rm */ }, { /* 5856 */ 756, /* VPADDQZ256rmb */ }, { /* 5857 */ 757, /* VPADDQZ256rmbk */ }, { /* 5858 */ 758, /* VPADDQZ256rmbkz */ }, { /* 5859 */ 317, /* VPADDQZ256rmk */ }, { /* 5860 */ 318, /* VPADDQZ256rmkz */ }, { /* 5861 */ 319, /* VPADDQZ256rr */ }, { /* 5862 */ 320, /* VPADDQZ256rrk */ }, { /* 5863 */ 321, /* VPADDQZ256rrkz */ }, { /* 5864 */ 325, /* VPADDQZrm */ }, { /* 5865 */ 759, /* VPADDQZrmb */ }, { /* 5866 */ 760, /* VPADDQZrmbk */ }, { /* 5867 */ 761, /* VPADDQZrmbkz */ }, { /* 5868 */ 329, /* VPADDQZrmk */ }, { /* 5869 */ 330, /* VPADDQZrmkz */ }, { /* 5870 */ 331, /* VPADDQZrr */ }, { /* 5871 */ 332, /* VPADDQZrrk */ }, { /* 5872 */ 333, /* VPADDQZrrkz */ }, { /* 5873 */ 334, /* VPADDQrm */ }, { /* 5874 */ 335, /* VPADDQrr */ }, { /* 5875 */ 302, /* VPADDSBYrm */ }, { /* 5876 */ 303, /* VPADDSBYrr */ }, { /* 5877 */ 334, /* VPADDSBrm */ }, { /* 5878 */ 335, /* VPADDSBrr */ }, { /* 5879 */ 302, /* VPADDSWYrm */ }, { /* 5880 */ 303, /* VPADDSWYrr */ }, { /* 5881 */ 334, /* VPADDSWrm */ }, { /* 5882 */ 335, /* VPADDSWrr */ }, { /* 5883 */ 302, /* VPADDUSBYrm */ }, { /* 5884 */ 303, /* VPADDUSBYrr */ }, { /* 5885 */ 334, /* VPADDUSBrm */ }, { /* 5886 */ 335, /* VPADDUSBrr */ }, { /* 5887 */ 302, /* VPADDUSWYrm */ }, { /* 5888 */ 303, /* VPADDUSWYrr */ }, { /* 5889 */ 334, /* VPADDUSWrm */ }, { /* 5890 */ 335, /* VPADDUSWrr */ }, { /* 5891 */ 302, /* VPADDWYrm */ }, { /* 5892 */ 303, /* VPADDWYrr */ }, { /* 5893 */ 304, /* VPADDWZ128rm */ }, { /* 5894 */ 762, /* VPADDWZ128rmk */ }, { /* 5895 */ 763, /* VPADDWZ128rmkz */ }, { /* 5896 */ 310, /* VPADDWZ128rr */ }, { /* 5897 */ 764, /* VPADDWZ128rrk */ }, { /* 5898 */ 765, /* VPADDWZ128rrkz */ }, { /* 5899 */ 313, /* VPADDWZ256rm */ }, { /* 5900 */ 766, /* VPADDWZ256rmk */ }, { /* 5901 */ 767, /* VPADDWZ256rmkz */ }, { /* 5902 */ 319, /* VPADDWZ256rr */ }, { /* 5903 */ 768, /* VPADDWZ256rrk */ }, { /* 5904 */ 769, /* VPADDWZ256rrkz */ }, { /* 5905 */ 325, /* VPADDWZrm */ }, { /* 5906 */ 770, /* VPADDWZrmk */ }, { /* 5907 */ 771, /* VPADDWZrmkz */ }, { /* 5908 */ 331, /* VPADDWZrr */ }, { /* 5909 */ 772, /* VPADDWZrrk */ }, { /* 5910 */ 773, /* VPADDWZrrkz */ }, { /* 5911 */ 334, /* VPADDWrm */ }, { /* 5912 */ 335, /* VPADDWrr */ }, { /* 5913 */ 390, /* VPALIGNR128rm */ }, { /* 5914 */ 391, /* VPALIGNR128rr */ }, { /* 5915 */ 388, /* VPALIGNR256rm */ }, { /* 5916 */ 389, /* VPALIGNR256rr */ }, { /* 5917 */ 304, /* VPANDDZ128rm */ }, { /* 5918 */ 744, /* VPANDDZ128rmb */ }, { /* 5919 */ 745, /* VPANDDZ128rmbk */ }, { /* 5920 */ 746, /* VPANDDZ128rmbkz */ }, { /* 5921 */ 339, /* VPANDDZ128rmk */ }, { /* 5922 */ 340, /* VPANDDZ128rmkz */ }, { /* 5923 */ 310, /* VPANDDZ128rr */ }, { /* 5924 */ 341, /* VPANDDZ128rrk */ }, { /* 5925 */ 342, /* VPANDDZ128rrkz */ }, { /* 5926 */ 313, /* VPANDDZ256rm */ }, { /* 5927 */ 747, /* VPANDDZ256rmb */ }, { /* 5928 */ 748, /* VPANDDZ256rmbk */ }, { /* 5929 */ 749, /* VPANDDZ256rmbkz */ }, { /* 5930 */ 346, /* VPANDDZ256rmk */ }, { /* 5931 */ 347, /* VPANDDZ256rmkz */ }, { /* 5932 */ 319, /* VPANDDZ256rr */ }, { /* 5933 */ 348, /* VPANDDZ256rrk */ }, { /* 5934 */ 349, /* VPANDDZ256rrkz */ }, { /* 5935 */ 325, /* VPANDDZrm */ }, { /* 5936 */ 750, /* VPANDDZrmb */ }, { /* 5937 */ 751, /* VPANDDZrmbk */ }, { /* 5938 */ 752, /* VPANDDZrmbkz */ }, { /* 5939 */ 356, /* VPANDDZrmk */ }, { /* 5940 */ 357, /* VPANDDZrmkz */ }, { /* 5941 */ 331, /* VPANDDZrr */ }, { /* 5942 */ 358, /* VPANDDZrrk */ }, { /* 5943 */ 359, /* VPANDDZrrkz */ }, { /* 5944 */ 304, /* VPANDNDZ128rm */ }, { /* 5945 */ 744, /* VPANDNDZ128rmb */ }, { /* 5946 */ 745, /* VPANDNDZ128rmbk */ }, { /* 5947 */ 746, /* VPANDNDZ128rmbkz */ }, { /* 5948 */ 339, /* VPANDNDZ128rmk */ }, { /* 5949 */ 340, /* VPANDNDZ128rmkz */ }, { /* 5950 */ 310, /* VPANDNDZ128rr */ }, { /* 5951 */ 341, /* VPANDNDZ128rrk */ }, { /* 5952 */ 342, /* VPANDNDZ128rrkz */ }, { /* 5953 */ 313, /* VPANDNDZ256rm */ }, { /* 5954 */ 747, /* VPANDNDZ256rmb */ }, { /* 5955 */ 748, /* VPANDNDZ256rmbk */ }, { /* 5956 */ 749, /* VPANDNDZ256rmbkz */ }, { /* 5957 */ 346, /* VPANDNDZ256rmk */ }, { /* 5958 */ 347, /* VPANDNDZ256rmkz */ }, { /* 5959 */ 319, /* VPANDNDZ256rr */ }, { /* 5960 */ 348, /* VPANDNDZ256rrk */ }, { /* 5961 */ 349, /* VPANDNDZ256rrkz */ }, { /* 5962 */ 325, /* VPANDNDZrm */ }, { /* 5963 */ 750, /* VPANDNDZrmb */ }, { /* 5964 */ 751, /* VPANDNDZrmbk */ }, { /* 5965 */ 752, /* VPANDNDZrmbkz */ }, { /* 5966 */ 356, /* VPANDNDZrmk */ }, { /* 5967 */ 357, /* VPANDNDZrmkz */ }, { /* 5968 */ 331, /* VPANDNDZrr */ }, { /* 5969 */ 358, /* VPANDNDZrrk */ }, { /* 5970 */ 359, /* VPANDNDZrrkz */ }, { /* 5971 */ 304, /* VPANDNQZ128rm */ }, { /* 5972 */ 753, /* VPANDNQZ128rmb */ }, { /* 5973 */ 754, /* VPANDNQZ128rmbk */ }, { /* 5974 */ 755, /* VPANDNQZ128rmbkz */ }, { /* 5975 */ 308, /* VPANDNQZ128rmk */ }, { /* 5976 */ 309, /* VPANDNQZ128rmkz */ }, { /* 5977 */ 310, /* VPANDNQZ128rr */ }, { /* 5978 */ 311, /* VPANDNQZ128rrk */ }, { /* 5979 */ 312, /* VPANDNQZ128rrkz */ }, { /* 5980 */ 313, /* VPANDNQZ256rm */ }, { /* 5981 */ 756, /* VPANDNQZ256rmb */ }, { /* 5982 */ 757, /* VPANDNQZ256rmbk */ }, { /* 5983 */ 758, /* VPANDNQZ256rmbkz */ }, { /* 5984 */ 317, /* VPANDNQZ256rmk */ }, { /* 5985 */ 318, /* VPANDNQZ256rmkz */ }, { /* 5986 */ 319, /* VPANDNQZ256rr */ }, { /* 5987 */ 320, /* VPANDNQZ256rrk */ }, { /* 5988 */ 321, /* VPANDNQZ256rrkz */ }, { /* 5989 */ 325, /* VPANDNQZrm */ }, { /* 5990 */ 759, /* VPANDNQZrmb */ }, { /* 5991 */ 760, /* VPANDNQZrmbk */ }, { /* 5992 */ 761, /* VPANDNQZrmbkz */ }, { /* 5993 */ 329, /* VPANDNQZrmk */ }, { /* 5994 */ 330, /* VPANDNQZrmkz */ }, { /* 5995 */ 331, /* VPANDNQZrr */ }, { /* 5996 */ 332, /* VPANDNQZrrk */ }, { /* 5997 */ 333, /* VPANDNQZrrkz */ }, { /* 5998 */ 302, /* VPANDNYrm */ }, { /* 5999 */ 303, /* VPANDNYrr */ }, { /* 6000 */ 334, /* VPANDNrm */ }, { /* 6001 */ 335, /* VPANDNrr */ }, { /* 6002 */ 304, /* VPANDQZ128rm */ }, { /* 6003 */ 753, /* VPANDQZ128rmb */ }, { /* 6004 */ 754, /* VPANDQZ128rmbk */ }, { /* 6005 */ 755, /* VPANDQZ128rmbkz */ }, { /* 6006 */ 308, /* VPANDQZ128rmk */ }, { /* 6007 */ 309, /* VPANDQZ128rmkz */ }, { /* 6008 */ 310, /* VPANDQZ128rr */ }, { /* 6009 */ 311, /* VPANDQZ128rrk */ }, { /* 6010 */ 312, /* VPANDQZ128rrkz */ }, { /* 6011 */ 313, /* VPANDQZ256rm */ }, { /* 6012 */ 756, /* VPANDQZ256rmb */ }, { /* 6013 */ 757, /* VPANDQZ256rmbk */ }, { /* 6014 */ 758, /* VPANDQZ256rmbkz */ }, { /* 6015 */ 317, /* VPANDQZ256rmk */ }, { /* 6016 */ 318, /* VPANDQZ256rmkz */ }, { /* 6017 */ 319, /* VPANDQZ256rr */ }, { /* 6018 */ 320, /* VPANDQZ256rrk */ }, { /* 6019 */ 321, /* VPANDQZ256rrkz */ }, { /* 6020 */ 325, /* VPANDQZrm */ }, { /* 6021 */ 759, /* VPANDQZrmb */ }, { /* 6022 */ 760, /* VPANDQZrmbk */ }, { /* 6023 */ 761, /* VPANDQZrmbkz */ }, { /* 6024 */ 329, /* VPANDQZrmk */ }, { /* 6025 */ 330, /* VPANDQZrmkz */ }, { /* 6026 */ 331, /* VPANDQZrr */ }, { /* 6027 */ 332, /* VPANDQZrrk */ }, { /* 6028 */ 333, /* VPANDQZrrkz */ }, { /* 6029 */ 302, /* VPANDYrm */ }, { /* 6030 */ 303, /* VPANDYrr */ }, { /* 6031 */ 334, /* VPANDrm */ }, { /* 6032 */ 335, /* VPANDrr */ }, { /* 6033 */ 302, /* VPAVGBYrm */ }, { /* 6034 */ 303, /* VPAVGBYrr */ }, { /* 6035 */ 334, /* VPAVGBrm */ }, { /* 6036 */ 335, /* VPAVGBrr */ }, { /* 6037 */ 302, /* VPAVGWYrm */ }, { /* 6038 */ 303, /* VPAVGWYrr */ }, { /* 6039 */ 334, /* VPAVGWrm */ }, { /* 6040 */ 335, /* VPAVGWrr */ }, { /* 6041 */ 388, /* VPBLENDDYrmi */ }, { /* 6042 */ 389, /* VPBLENDDYrri */ }, { /* 6043 */ 390, /* VPBLENDDrmi */ }, { /* 6044 */ 391, /* VPBLENDDrri */ }, { /* 6045 */ 304, /* VPBLENDMBZ128rm */ }, { /* 6046 */ 733, /* VPBLENDMBZ128rmk */ }, { /* 6047 */ 733, /* VPBLENDMBZ128rmkz */ }, { /* 6048 */ 310, /* VPBLENDMBZ128rr */ }, { /* 6049 */ 735, /* VPBLENDMBZ128rrk */ }, { /* 6050 */ 735, /* VPBLENDMBZ128rrkz */ }, { /* 6051 */ 313, /* VPBLENDMBZ256rm */ }, { /* 6052 */ 737, /* VPBLENDMBZ256rmk */ }, { /* 6053 */ 737, /* VPBLENDMBZ256rmkz */ }, { /* 6054 */ 319, /* VPBLENDMBZ256rr */ }, { /* 6055 */ 739, /* VPBLENDMBZ256rrk */ }, { /* 6056 */ 739, /* VPBLENDMBZ256rrkz */ }, { /* 6057 */ 325, /* VPBLENDMBZrm */ }, { /* 6058 */ 741, /* VPBLENDMBZrmk */ }, { /* 6059 */ 741, /* VPBLENDMBZrmkz */ }, { /* 6060 */ 331, /* VPBLENDMBZrr */ }, { /* 6061 */ 743, /* VPBLENDMBZrrk */ }, { /* 6062 */ 743, /* VPBLENDMBZrrkz */ }, { /* 6063 */ 304, /* VPBLENDMDZ128rm */ }, { /* 6064 */ 744, /* VPBLENDMDZ128rmb */ }, { /* 6065 */ 746, /* VPBLENDMDZ128rmbk */ }, { /* 6066 */ 340, /* VPBLENDMDZ128rmk */ }, { /* 6067 */ 340, /* VPBLENDMDZ128rmkz */ }, { /* 6068 */ 310, /* VPBLENDMDZ128rr */ }, { /* 6069 */ 342, /* VPBLENDMDZ128rrk */ }, { /* 6070 */ 342, /* VPBLENDMDZ128rrkz */ }, { /* 6071 */ 313, /* VPBLENDMDZ256rm */ }, { /* 6072 */ 747, /* VPBLENDMDZ256rmb */ }, { /* 6073 */ 749, /* VPBLENDMDZ256rmbk */ }, { /* 6074 */ 347, /* VPBLENDMDZ256rmk */ }, { /* 6075 */ 347, /* VPBLENDMDZ256rmkz */ }, { /* 6076 */ 319, /* VPBLENDMDZ256rr */ }, { /* 6077 */ 349, /* VPBLENDMDZ256rrk */ }, { /* 6078 */ 349, /* VPBLENDMDZ256rrkz */ }, { /* 6079 */ 325, /* VPBLENDMDZrm */ }, { /* 6080 */ 750, /* VPBLENDMDZrmb */ }, { /* 6081 */ 752, /* VPBLENDMDZrmbk */ }, { /* 6082 */ 357, /* VPBLENDMDZrmk */ }, { /* 6083 */ 357, /* VPBLENDMDZrmkz */ }, { /* 6084 */ 331, /* VPBLENDMDZrr */ }, { /* 6085 */ 359, /* VPBLENDMDZrrk */ }, { /* 6086 */ 359, /* VPBLENDMDZrrkz */ }, { /* 6087 */ 304, /* VPBLENDMQZ128rm */ }, { /* 6088 */ 753, /* VPBLENDMQZ128rmb */ }, { /* 6089 */ 755, /* VPBLENDMQZ128rmbk */ }, { /* 6090 */ 309, /* VPBLENDMQZ128rmk */ }, { /* 6091 */ 309, /* VPBLENDMQZ128rmkz */ }, { /* 6092 */ 310, /* VPBLENDMQZ128rr */ }, { /* 6093 */ 312, /* VPBLENDMQZ128rrk */ }, { /* 6094 */ 312, /* VPBLENDMQZ128rrkz */ }, { /* 6095 */ 313, /* VPBLENDMQZ256rm */ }, { /* 6096 */ 756, /* VPBLENDMQZ256rmb */ }, { /* 6097 */ 758, /* VPBLENDMQZ256rmbk */ }, { /* 6098 */ 318, /* VPBLENDMQZ256rmk */ }, { /* 6099 */ 318, /* VPBLENDMQZ256rmkz */ }, { /* 6100 */ 319, /* VPBLENDMQZ256rr */ }, { /* 6101 */ 321, /* VPBLENDMQZ256rrk */ }, { /* 6102 */ 321, /* VPBLENDMQZ256rrkz */ }, { /* 6103 */ 325, /* VPBLENDMQZrm */ }, { /* 6104 */ 759, /* VPBLENDMQZrmb */ }, { /* 6105 */ 761, /* VPBLENDMQZrmbk */ }, { /* 6106 */ 330, /* VPBLENDMQZrmk */ }, { /* 6107 */ 330, /* VPBLENDMQZrmkz */ }, { /* 6108 */ 331, /* VPBLENDMQZrr */ }, { /* 6109 */ 333, /* VPBLENDMQZrrk */ }, { /* 6110 */ 333, /* VPBLENDMQZrrkz */ }, { /* 6111 */ 304, /* VPBLENDMWZ128rm */ }, { /* 6112 */ 763, /* VPBLENDMWZ128rmk */ }, { /* 6113 */ 763, /* VPBLENDMWZ128rmkz */ }, { /* 6114 */ 310, /* VPBLENDMWZ128rr */ }, { /* 6115 */ 765, /* VPBLENDMWZ128rrk */ }, { /* 6116 */ 765, /* VPBLENDMWZ128rrkz */ }, { /* 6117 */ 313, /* VPBLENDMWZ256rm */ }, { /* 6118 */ 767, /* VPBLENDMWZ256rmk */ }, { /* 6119 */ 767, /* VPBLENDMWZ256rmkz */ }, { /* 6120 */ 319, /* VPBLENDMWZ256rr */ }, { /* 6121 */ 769, /* VPBLENDMWZ256rrk */ }, { /* 6122 */ 769, /* VPBLENDMWZ256rrkz */ }, { /* 6123 */ 325, /* VPBLENDMWZrm */ }, { /* 6124 */ 771, /* VPBLENDMWZrmk */ }, { /* 6125 */ 771, /* VPBLENDMWZrmkz */ }, { /* 6126 */ 331, /* VPBLENDMWZrr */ }, { /* 6127 */ 773, /* VPBLENDMWZrrk */ }, { /* 6128 */ 773, /* VPBLENDMWZrrkz */ }, { /* 6129 */ 392, /* VPBLENDVBYrm */ }, { /* 6130 */ 393, /* VPBLENDVBYrr */ }, { /* 6131 */ 394, /* VPBLENDVBrm */ }, { /* 6132 */ 395, /* VPBLENDVBrr */ }, { /* 6133 */ 388, /* VPBLENDWYrmi */ }, { /* 6134 */ 389, /* VPBLENDWYrri */ }, { /* 6135 */ 390, /* VPBLENDWrmi */ }, { /* 6136 */ 391, /* VPBLENDWrri */ }, { /* 6137 */ 774, /* VPBROADCASTBYrm */ }, { /* 6138 */ 402, /* VPBROADCASTBYrr */ }, { /* 6139 */ 660, /* VPBROADCASTBrZ128r */ }, { /* 6140 */ 775, /* VPBROADCASTBrZ128rk */ }, { /* 6141 */ 776, /* VPBROADCASTBrZ128rkz */ }, { /* 6142 */ 777, /* VPBROADCASTBrZ256r */ }, { /* 6143 */ 778, /* VPBROADCASTBrZ256rk */ }, { /* 6144 */ 779, /* VPBROADCASTBrZ256rkz */ }, { /* 6145 */ 780, /* VPBROADCASTBrZr */ }, { /* 6146 */ 781, /* VPBROADCASTBrZrk */ }, { /* 6147 */ 782, /* VPBROADCASTBrZrkz */ }, { /* 6148 */ 783, /* VPBROADCASTBrm */ }, { /* 6149 */ 45, /* VPBROADCASTBrr */ }, { /* 6150 */ 784, /* VPBROADCASTDYrm */ }, { /* 6151 */ 402, /* VPBROADCASTDYrr */ }, { /* 6152 */ 729, /* VPBROADCASTDZkrm */ }, { /* 6153 */ 433, /* VPBROADCASTDZkrr */ }, { /* 6154 */ 728, /* VPBROADCASTDZrm */ }, { /* 6155 */ 431, /* VPBROADCASTDZrr */ }, { /* 6156 */ 660, /* VPBROADCASTDrZ128r */ }, { /* 6157 */ 785, /* VPBROADCASTDrZ128rk */ }, { /* 6158 */ 786, /* VPBROADCASTDrZ128rkz */ }, { /* 6159 */ 777, /* VPBROADCASTDrZ256r */ }, { /* 6160 */ 787, /* VPBROADCASTDrZ256rk */ }, { /* 6161 */ 788, /* VPBROADCASTDrZ256rkz */ }, { /* 6162 */ 780, /* VPBROADCASTDrZr */ }, { /* 6163 */ 789, /* VPBROADCASTDrZrk */ }, { /* 6164 */ 790, /* VPBROADCASTDrZrkz */ }, { /* 6165 */ 105, /* VPBROADCASTDrm */ }, { /* 6166 */ 45, /* VPBROADCASTDrr */ }, { /* 6167 */ 791, /* VPBROADCASTMB2QZ128rr */ }, { /* 6168 */ 792, /* VPBROADCASTMB2QZ256rr */ }, { /* 6169 */ 793, /* VPBROADCASTMB2QZrr */ }, { /* 6170 */ 794, /* VPBROADCASTMW2DZ128rr */ }, { /* 6171 */ 795, /* VPBROADCASTMW2DZ256rr */ }, { /* 6172 */ 796, /* VPBROADCASTMW2DZrr */ }, { /* 6173 */ 784, /* VPBROADCASTQYrm */ }, { /* 6174 */ 402, /* VPBROADCASTQYrr */ }, { /* 6175 */ 731, /* VPBROADCASTQZkrm */ }, { /* 6176 */ 414, /* VPBROADCASTQZkrr */ }, { /* 6177 */ 730, /* VPBROADCASTQZrm */ }, { /* 6178 */ 412, /* VPBROADCASTQZrr */ }, { /* 6179 */ 632, /* VPBROADCASTQrZ128r */ }, { /* 6180 */ 797, /* VPBROADCASTQrZ128rk */ }, { /* 6181 */ 798, /* VPBROADCASTQrZ128rkz */ }, { /* 6182 */ 799, /* VPBROADCASTQrZ256r */ }, { /* 6183 */ 800, /* VPBROADCASTQrZ256rk */ }, { /* 6184 */ 801, /* VPBROADCASTQrZ256rkz */ }, { /* 6185 */ 802, /* VPBROADCASTQrZr */ }, { /* 6186 */ 803, /* VPBROADCASTQrZrk */ }, { /* 6187 */ 804, /* VPBROADCASTQrZrkz */ }, { /* 6188 */ 105, /* VPBROADCASTQrm */ }, { /* 6189 */ 45, /* VPBROADCASTQrr */ }, { /* 6190 */ 784, /* VPBROADCASTWYrm */ }, { /* 6191 */ 402, /* VPBROADCASTWYrr */ }, { /* 6192 */ 660, /* VPBROADCASTWrZ128r */ }, { /* 6193 */ 805, /* VPBROADCASTWrZ128rk */ }, { /* 6194 */ 806, /* VPBROADCASTWrZ128rkz */ }, { /* 6195 */ 777, /* VPBROADCASTWrZ256r */ }, { /* 6196 */ 807, /* VPBROADCASTWrZ256rk */ }, { /* 6197 */ 808, /* VPBROADCASTWrZ256rkz */ }, { /* 6198 */ 780, /* VPBROADCASTWrZr */ }, { /* 6199 */ 809, /* VPBROADCASTWrZrk */ }, { /* 6200 */ 810, /* VPBROADCASTWrZrkz */ }, { /* 6201 */ 105, /* VPBROADCASTWrm */ }, { /* 6202 */ 45, /* VPBROADCASTWrr */ }, { /* 6203 */ 390, /* VPCLMULQDQrm */ }, { /* 6204 */ 391, /* VPCLMULQDQrr */ }, { /* 6205 */ 394, /* VPCMOVmr */ }, { /* 6206 */ 392, /* VPCMOVmrY */ }, { /* 6207 */ 579, /* VPCMOVrm */ }, { /* 6208 */ 580, /* VPCMOVrmY */ }, { /* 6209 */ 395, /* VPCMOVrr */ }, { /* 6210 */ 393, /* VPCMOVrrY */ }, { /* 6211 */ 811, /* VPCMPBZ128rmi */ }, { /* 6212 */ 0, /* */ }, { /* 6213 */ 812, /* VPCMPBZ128rmik */ }, { /* 6214 */ 0, /* */ }, { /* 6215 */ 813, /* VPCMPBZ128rri */ }, { /* 6216 */ 0, /* */ }, { /* 6217 */ 814, /* VPCMPBZ128rrik */ }, { /* 6218 */ 0, /* */ }, { /* 6219 */ 815, /* VPCMPBZ256rmi */ }, { /* 6220 */ 0, /* */ }, { /* 6221 */ 816, /* VPCMPBZ256rmik */ }, { /* 6222 */ 0, /* */ }, { /* 6223 */ 817, /* VPCMPBZ256rri */ }, { /* 6224 */ 0, /* */ }, { /* 6225 */ 818, /* VPCMPBZ256rrik */ }, { /* 6226 */ 0, /* */ }, { /* 6227 */ 819, /* VPCMPBZrmi */ }, { /* 6228 */ 0, /* */ }, { /* 6229 */ 820, /* VPCMPBZrmik */ }, { /* 6230 */ 0, /* */ }, { /* 6231 */ 821, /* VPCMPBZrri */ }, { /* 6232 */ 0, /* */ }, { /* 6233 */ 822, /* VPCMPBZrrik */ }, { /* 6234 */ 0, /* */ }, { /* 6235 */ 823, /* VPCMPDZ128rmi */ }, { /* 6236 */ 0, /* */ }, { /* 6237 */ 824, /* VPCMPDZ128rmib */ }, { /* 6238 */ 0, /* */ }, { /* 6239 */ 825, /* VPCMPDZ128rmibk */ }, { /* 6240 */ 0, /* */ }, { /* 6241 */ 826, /* VPCMPDZ128rmik */ }, { /* 6242 */ 0, /* */ }, { /* 6243 */ 827, /* VPCMPDZ128rri */ }, { /* 6244 */ 0, /* */ }, { /* 6245 */ 828, /* VPCMPDZ128rrik */ }, { /* 6246 */ 0, /* */ }, { /* 6247 */ 829, /* VPCMPDZ256rmi */ }, { /* 6248 */ 0, /* */ }, { /* 6249 */ 830, /* VPCMPDZ256rmib */ }, { /* 6250 */ 0, /* */ }, { /* 6251 */ 831, /* VPCMPDZ256rmibk */ }, { /* 6252 */ 0, /* */ }, { /* 6253 */ 832, /* VPCMPDZ256rmik */ }, { /* 6254 */ 0, /* */ }, { /* 6255 */ 833, /* VPCMPDZ256rri */ }, { /* 6256 */ 0, /* */ }, { /* 6257 */ 834, /* VPCMPDZ256rrik */ }, { /* 6258 */ 0, /* */ }, { /* 6259 */ 835, /* VPCMPDZrmi */ }, { /* 6260 */ 0, /* */ }, { /* 6261 */ 836, /* VPCMPDZrmib */ }, { /* 6262 */ 0, /* */ }, { /* 6263 */ 837, /* VPCMPDZrmibk */ }, { /* 6264 */ 0, /* */ }, { /* 6265 */ 838, /* VPCMPDZrmik */ }, { /* 6266 */ 0, /* */ }, { /* 6267 */ 839, /* VPCMPDZrri */ }, { /* 6268 */ 0, /* */ }, { /* 6269 */ 840, /* VPCMPDZrrik */ }, { /* 6270 */ 0, /* */ }, { /* 6271 */ 302, /* VPCMPEQBYrm */ }, { /* 6272 */ 303, /* VPCMPEQBYrr */ }, { /* 6273 */ 841, /* VPCMPEQBZ128rm */ }, { /* 6274 */ 842, /* VPCMPEQBZ128rmk */ }, { /* 6275 */ 843, /* VPCMPEQBZ128rr */ }, { /* 6276 */ 844, /* VPCMPEQBZ128rrk */ }, { /* 6277 */ 845, /* VPCMPEQBZ256rm */ }, { /* 6278 */ 846, /* VPCMPEQBZ256rmk */ }, { /* 6279 */ 847, /* VPCMPEQBZ256rr */ }, { /* 6280 */ 848, /* VPCMPEQBZ256rrk */ }, { /* 6281 */ 849, /* VPCMPEQBZrm */ }, { /* 6282 */ 850, /* VPCMPEQBZrmk */ }, { /* 6283 */ 851, /* VPCMPEQBZrr */ }, { /* 6284 */ 852, /* VPCMPEQBZrrk */ }, { /* 6285 */ 334, /* VPCMPEQBrm */ }, { /* 6286 */ 335, /* VPCMPEQBrr */ }, { /* 6287 */ 302, /* VPCMPEQDYrm */ }, { /* 6288 */ 303, /* VPCMPEQDYrr */ }, { /* 6289 */ 853, /* VPCMPEQDZ128rm */ }, { /* 6290 */ 854, /* VPCMPEQDZ128rmb */ }, { /* 6291 */ 855, /* VPCMPEQDZ128rmbk */ }, { /* 6292 */ 856, /* VPCMPEQDZ128rmk */ }, { /* 6293 */ 857, /* VPCMPEQDZ128rr */ }, { /* 6294 */ 858, /* VPCMPEQDZ128rrk */ }, { /* 6295 */ 859, /* VPCMPEQDZ256rm */ }, { /* 6296 */ 860, /* VPCMPEQDZ256rmb */ }, { /* 6297 */ 861, /* VPCMPEQDZ256rmbk */ }, { /* 6298 */ 862, /* VPCMPEQDZ256rmk */ }, { /* 6299 */ 863, /* VPCMPEQDZ256rr */ }, { /* 6300 */ 864, /* VPCMPEQDZ256rrk */ }, { /* 6301 */ 865, /* VPCMPEQDZrm */ }, { /* 6302 */ 866, /* VPCMPEQDZrmb */ }, { /* 6303 */ 867, /* VPCMPEQDZrmbk */ }, { /* 6304 */ 868, /* VPCMPEQDZrmk */ }, { /* 6305 */ 869, /* VPCMPEQDZrr */ }, { /* 6306 */ 870, /* VPCMPEQDZrrk */ }, { /* 6307 */ 334, /* VPCMPEQDrm */ }, { /* 6308 */ 335, /* VPCMPEQDrr */ }, { /* 6309 */ 302, /* VPCMPEQQYrm */ }, { /* 6310 */ 303, /* VPCMPEQQYrr */ }, { /* 6311 */ 871, /* VPCMPEQQZ128rm */ }, { /* 6312 */ 872, /* VPCMPEQQZ128rmb */ }, { /* 6313 */ 873, /* VPCMPEQQZ128rmbk */ }, { /* 6314 */ 874, /* VPCMPEQQZ128rmk */ }, { /* 6315 */ 875, /* VPCMPEQQZ128rr */ }, { /* 6316 */ 876, /* VPCMPEQQZ128rrk */ }, { /* 6317 */ 877, /* VPCMPEQQZ256rm */ }, { /* 6318 */ 878, /* VPCMPEQQZ256rmb */ }, { /* 6319 */ 879, /* VPCMPEQQZ256rmbk */ }, { /* 6320 */ 880, /* VPCMPEQQZ256rmk */ }, { /* 6321 */ 881, /* VPCMPEQQZ256rr */ }, { /* 6322 */ 882, /* VPCMPEQQZ256rrk */ }, { /* 6323 */ 883, /* VPCMPEQQZrm */ }, { /* 6324 */ 884, /* VPCMPEQQZrmb */ }, { /* 6325 */ 885, /* VPCMPEQQZrmbk */ }, { /* 6326 */ 886, /* VPCMPEQQZrmk */ }, { /* 6327 */ 887, /* VPCMPEQQZrr */ }, { /* 6328 */ 888, /* VPCMPEQQZrrk */ }, { /* 6329 */ 334, /* VPCMPEQQrm */ }, { /* 6330 */ 335, /* VPCMPEQQrr */ }, { /* 6331 */ 302, /* VPCMPEQWYrm */ }, { /* 6332 */ 303, /* VPCMPEQWYrr */ }, { /* 6333 */ 889, /* VPCMPEQWZ128rm */ }, { /* 6334 */ 890, /* VPCMPEQWZ128rmk */ }, { /* 6335 */ 891, /* VPCMPEQWZ128rr */ }, { /* 6336 */ 892, /* VPCMPEQWZ128rrk */ }, { /* 6337 */ 893, /* VPCMPEQWZ256rm */ }, { /* 6338 */ 894, /* VPCMPEQWZ256rmk */ }, { /* 6339 */ 895, /* VPCMPEQWZ256rr */ }, { /* 6340 */ 896, /* VPCMPEQWZ256rrk */ }, { /* 6341 */ 897, /* VPCMPEQWZrm */ }, { /* 6342 */ 898, /* VPCMPEQWZrmk */ }, { /* 6343 */ 899, /* VPCMPEQWZrr */ }, { /* 6344 */ 900, /* VPCMPEQWZrrk */ }, { /* 6345 */ 334, /* VPCMPEQWrm */ }, { /* 6346 */ 335, /* VPCMPEQWrr */ }, { /* 6347 */ 0, /* */ }, { /* 6348 */ 0, /* */ }, { /* 6349 */ 46, /* VPCMPESTRIrm */ }, { /* 6350 */ 47, /* VPCMPESTRIrr */ }, { /* 6351 */ 0, /* */ }, { /* 6352 */ 0, /* */ }, { /* 6353 */ 46, /* VPCMPESTRM128rm */ }, { /* 6354 */ 47, /* VPCMPESTRM128rr */ }, { /* 6355 */ 302, /* VPCMPGTBYrm */ }, { /* 6356 */ 303, /* VPCMPGTBYrr */ }, { /* 6357 */ 841, /* VPCMPGTBZ128rm */ }, { /* 6358 */ 842, /* VPCMPGTBZ128rmk */ }, { /* 6359 */ 843, /* VPCMPGTBZ128rr */ }, { /* 6360 */ 844, /* VPCMPGTBZ128rrk */ }, { /* 6361 */ 845, /* VPCMPGTBZ256rm */ }, { /* 6362 */ 846, /* VPCMPGTBZ256rmk */ }, { /* 6363 */ 847, /* VPCMPGTBZ256rr */ }, { /* 6364 */ 848, /* VPCMPGTBZ256rrk */ }, { /* 6365 */ 849, /* VPCMPGTBZrm */ }, { /* 6366 */ 850, /* VPCMPGTBZrmk */ }, { /* 6367 */ 851, /* VPCMPGTBZrr */ }, { /* 6368 */ 852, /* VPCMPGTBZrrk */ }, { /* 6369 */ 334, /* VPCMPGTBrm */ }, { /* 6370 */ 335, /* VPCMPGTBrr */ }, { /* 6371 */ 302, /* VPCMPGTDYrm */ }, { /* 6372 */ 303, /* VPCMPGTDYrr */ }, { /* 6373 */ 853, /* VPCMPGTDZ128rm */ }, { /* 6374 */ 854, /* VPCMPGTDZ128rmb */ }, { /* 6375 */ 855, /* VPCMPGTDZ128rmbk */ }, { /* 6376 */ 856, /* VPCMPGTDZ128rmk */ }, { /* 6377 */ 857, /* VPCMPGTDZ128rr */ }, { /* 6378 */ 858, /* VPCMPGTDZ128rrk */ }, { /* 6379 */ 859, /* VPCMPGTDZ256rm */ }, { /* 6380 */ 860, /* VPCMPGTDZ256rmb */ }, { /* 6381 */ 861, /* VPCMPGTDZ256rmbk */ }, { /* 6382 */ 862, /* VPCMPGTDZ256rmk */ }, { /* 6383 */ 863, /* VPCMPGTDZ256rr */ }, { /* 6384 */ 864, /* VPCMPGTDZ256rrk */ }, { /* 6385 */ 865, /* VPCMPGTDZrm */ }, { /* 6386 */ 866, /* VPCMPGTDZrmb */ }, { /* 6387 */ 867, /* VPCMPGTDZrmbk */ }, { /* 6388 */ 868, /* VPCMPGTDZrmk */ }, { /* 6389 */ 869, /* VPCMPGTDZrr */ }, { /* 6390 */ 870, /* VPCMPGTDZrrk */ }, { /* 6391 */ 334, /* VPCMPGTDrm */ }, { /* 6392 */ 335, /* VPCMPGTDrr */ }, { /* 6393 */ 302, /* VPCMPGTQYrm */ }, { /* 6394 */ 303, /* VPCMPGTQYrr */ }, { /* 6395 */ 871, /* VPCMPGTQZ128rm */ }, { /* 6396 */ 872, /* VPCMPGTQZ128rmb */ }, { /* 6397 */ 873, /* VPCMPGTQZ128rmbk */ }, { /* 6398 */ 874, /* VPCMPGTQZ128rmk */ }, { /* 6399 */ 875, /* VPCMPGTQZ128rr */ }, { /* 6400 */ 876, /* VPCMPGTQZ128rrk */ }, { /* 6401 */ 877, /* VPCMPGTQZ256rm */ }, { /* 6402 */ 878, /* VPCMPGTQZ256rmb */ }, { /* 6403 */ 879, /* VPCMPGTQZ256rmbk */ }, { /* 6404 */ 880, /* VPCMPGTQZ256rmk */ }, { /* 6405 */ 881, /* VPCMPGTQZ256rr */ }, { /* 6406 */ 882, /* VPCMPGTQZ256rrk */ }, { /* 6407 */ 883, /* VPCMPGTQZrm */ }, { /* 6408 */ 884, /* VPCMPGTQZrmb */ }, { /* 6409 */ 885, /* VPCMPGTQZrmbk */ }, { /* 6410 */ 886, /* VPCMPGTQZrmk */ }, { /* 6411 */ 887, /* VPCMPGTQZrr */ }, { /* 6412 */ 888, /* VPCMPGTQZrrk */ }, { /* 6413 */ 334, /* VPCMPGTQrm */ }, { /* 6414 */ 335, /* VPCMPGTQrr */ }, { /* 6415 */ 302, /* VPCMPGTWYrm */ }, { /* 6416 */ 303, /* VPCMPGTWYrr */ }, { /* 6417 */ 889, /* VPCMPGTWZ128rm */ }, { /* 6418 */ 890, /* VPCMPGTWZ128rmk */ }, { /* 6419 */ 891, /* VPCMPGTWZ128rr */ }, { /* 6420 */ 892, /* VPCMPGTWZ128rrk */ }, { /* 6421 */ 893, /* VPCMPGTWZ256rm */ }, { /* 6422 */ 894, /* VPCMPGTWZ256rmk */ }, { /* 6423 */ 895, /* VPCMPGTWZ256rr */ }, { /* 6424 */ 896, /* VPCMPGTWZ256rrk */ }, { /* 6425 */ 897, /* VPCMPGTWZrm */ }, { /* 6426 */ 898, /* VPCMPGTWZrmk */ }, { /* 6427 */ 899, /* VPCMPGTWZrr */ }, { /* 6428 */ 900, /* VPCMPGTWZrrk */ }, { /* 6429 */ 334, /* VPCMPGTWrm */ }, { /* 6430 */ 335, /* VPCMPGTWrr */ }, { /* 6431 */ 0, /* */ }, { /* 6432 */ 0, /* */ }, { /* 6433 */ 46, /* VPCMPISTRIrm */ }, { /* 6434 */ 47, /* VPCMPISTRIrr */ }, { /* 6435 */ 0, /* */ }, { /* 6436 */ 0, /* */ }, { /* 6437 */ 46, /* VPCMPISTRM128rm */ }, { /* 6438 */ 47, /* VPCMPISTRM128rr */ }, { /* 6439 */ 901, /* VPCMPQZ128rmi */ }, { /* 6440 */ 0, /* */ }, { /* 6441 */ 902, /* VPCMPQZ128rmib */ }, { /* 6442 */ 0, /* */ }, { /* 6443 */ 903, /* VPCMPQZ128rmibk */ }, { /* 6444 */ 0, /* */ }, { /* 6445 */ 904, /* VPCMPQZ128rmik */ }, { /* 6446 */ 0, /* */ }, { /* 6447 */ 905, /* VPCMPQZ128rri */ }, { /* 6448 */ 0, /* */ }, { /* 6449 */ 906, /* VPCMPQZ128rrik */ }, { /* 6450 */ 0, /* */ }, { /* 6451 */ 907, /* VPCMPQZ256rmi */ }, { /* 6452 */ 0, /* */ }, { /* 6453 */ 908, /* VPCMPQZ256rmib */ }, { /* 6454 */ 0, /* */ }, { /* 6455 */ 909, /* VPCMPQZ256rmibk */ }, { /* 6456 */ 0, /* */ }, { /* 6457 */ 910, /* VPCMPQZ256rmik */ }, { /* 6458 */ 0, /* */ }, { /* 6459 */ 911, /* VPCMPQZ256rri */ }, { /* 6460 */ 0, /* */ }, { /* 6461 */ 912, /* VPCMPQZ256rrik */ }, { /* 6462 */ 0, /* */ }, { /* 6463 */ 913, /* VPCMPQZrmi */ }, { /* 6464 */ 0, /* */ }, { /* 6465 */ 914, /* VPCMPQZrmib */ }, { /* 6466 */ 0, /* */ }, { /* 6467 */ 915, /* VPCMPQZrmibk */ }, { /* 6468 */ 0, /* */ }, { /* 6469 */ 916, /* VPCMPQZrmik */ }, { /* 6470 */ 0, /* */ }, { /* 6471 */ 917, /* VPCMPQZrri */ }, { /* 6472 */ 0, /* */ }, { /* 6473 */ 918, /* VPCMPQZrrik */ }, { /* 6474 */ 0, /* */ }, { /* 6475 */ 811, /* VPCMPUBZ128rmi */ }, { /* 6476 */ 0, /* */ }, { /* 6477 */ 812, /* VPCMPUBZ128rmik */ }, { /* 6478 */ 0, /* */ }, { /* 6479 */ 813, /* VPCMPUBZ128rri */ }, { /* 6480 */ 0, /* */ }, { /* 6481 */ 814, /* VPCMPUBZ128rrik */ }, { /* 6482 */ 0, /* */ }, { /* 6483 */ 815, /* VPCMPUBZ256rmi */ }, { /* 6484 */ 0, /* */ }, { /* 6485 */ 816, /* VPCMPUBZ256rmik */ }, { /* 6486 */ 0, /* */ }, { /* 6487 */ 817, /* VPCMPUBZ256rri */ }, { /* 6488 */ 0, /* */ }, { /* 6489 */ 818, /* VPCMPUBZ256rrik */ }, { /* 6490 */ 0, /* */ }, { /* 6491 */ 819, /* VPCMPUBZrmi */ }, { /* 6492 */ 0, /* */ }, { /* 6493 */ 820, /* VPCMPUBZrmik */ }, { /* 6494 */ 0, /* */ }, { /* 6495 */ 821, /* VPCMPUBZrri */ }, { /* 6496 */ 0, /* */ }, { /* 6497 */ 822, /* VPCMPUBZrrik */ }, { /* 6498 */ 0, /* */ }, { /* 6499 */ 823, /* VPCMPUDZ128rmi */ }, { /* 6500 */ 0, /* */ }, { /* 6501 */ 824, /* VPCMPUDZ128rmib */ }, { /* 6502 */ 0, /* */ }, { /* 6503 */ 825, /* VPCMPUDZ128rmibk */ }, { /* 6504 */ 0, /* */ }, { /* 6505 */ 826, /* VPCMPUDZ128rmik */ }, { /* 6506 */ 0, /* */ }, { /* 6507 */ 827, /* VPCMPUDZ128rri */ }, { /* 6508 */ 0, /* */ }, { /* 6509 */ 828, /* VPCMPUDZ128rrik */ }, { /* 6510 */ 0, /* */ }, { /* 6511 */ 829, /* VPCMPUDZ256rmi */ }, { /* 6512 */ 0, /* */ }, { /* 6513 */ 830, /* VPCMPUDZ256rmib */ }, { /* 6514 */ 0, /* */ }, { /* 6515 */ 831, /* VPCMPUDZ256rmibk */ }, { /* 6516 */ 0, /* */ }, { /* 6517 */ 832, /* VPCMPUDZ256rmik */ }, { /* 6518 */ 0, /* */ }, { /* 6519 */ 833, /* VPCMPUDZ256rri */ }, { /* 6520 */ 0, /* */ }, { /* 6521 */ 834, /* VPCMPUDZ256rrik */ }, { /* 6522 */ 0, /* */ }, { /* 6523 */ 835, /* VPCMPUDZrmi */ }, { /* 6524 */ 0, /* */ }, { /* 6525 */ 836, /* VPCMPUDZrmib */ }, { /* 6526 */ 0, /* */ }, { /* 6527 */ 837, /* VPCMPUDZrmibk */ }, { /* 6528 */ 0, /* */ }, { /* 6529 */ 838, /* VPCMPUDZrmik */ }, { /* 6530 */ 0, /* */ }, { /* 6531 */ 839, /* VPCMPUDZrri */ }, { /* 6532 */ 0, /* */ }, { /* 6533 */ 840, /* VPCMPUDZrrik */ }, { /* 6534 */ 0, /* */ }, { /* 6535 */ 901, /* VPCMPUQZ128rmi */ }, { /* 6536 */ 0, /* */ }, { /* 6537 */ 902, /* VPCMPUQZ128rmib */ }, { /* 6538 */ 0, /* */ }, { /* 6539 */ 903, /* VPCMPUQZ128rmibk */ }, { /* 6540 */ 0, /* */ }, { /* 6541 */ 904, /* VPCMPUQZ128rmik */ }, { /* 6542 */ 0, /* */ }, { /* 6543 */ 905, /* VPCMPUQZ128rri */ }, { /* 6544 */ 0, /* */ }, { /* 6545 */ 906, /* VPCMPUQZ128rrik */ }, { /* 6546 */ 0, /* */ }, { /* 6547 */ 907, /* VPCMPUQZ256rmi */ }, { /* 6548 */ 0, /* */ }, { /* 6549 */ 908, /* VPCMPUQZ256rmib */ }, { /* 6550 */ 0, /* */ }, { /* 6551 */ 909, /* VPCMPUQZ256rmibk */ }, { /* 6552 */ 0, /* */ }, { /* 6553 */ 910, /* VPCMPUQZ256rmik */ }, { /* 6554 */ 0, /* */ }, { /* 6555 */ 911, /* VPCMPUQZ256rri */ }, { /* 6556 */ 0, /* */ }, { /* 6557 */ 912, /* VPCMPUQZ256rrik */ }, { /* 6558 */ 0, /* */ }, { /* 6559 */ 913, /* VPCMPUQZrmi */ }, { /* 6560 */ 0, /* */ }, { /* 6561 */ 914, /* VPCMPUQZrmib */ }, { /* 6562 */ 0, /* */ }, { /* 6563 */ 915, /* VPCMPUQZrmibk */ }, { /* 6564 */ 0, /* */ }, { /* 6565 */ 916, /* VPCMPUQZrmik */ }, { /* 6566 */ 0, /* */ }, { /* 6567 */ 917, /* VPCMPUQZrri */ }, { /* 6568 */ 0, /* */ }, { /* 6569 */ 918, /* VPCMPUQZrrik */ }, { /* 6570 */ 0, /* */ }, { /* 6571 */ 919, /* VPCMPUWZ128rmi */ }, { /* 6572 */ 0, /* */ }, { /* 6573 */ 920, /* VPCMPUWZ128rmik */ }, { /* 6574 */ 0, /* */ }, { /* 6575 */ 921, /* VPCMPUWZ128rri */ }, { /* 6576 */ 0, /* */ }, { /* 6577 */ 922, /* VPCMPUWZ128rrik */ }, { /* 6578 */ 0, /* */ }, { /* 6579 */ 923, /* VPCMPUWZ256rmi */ }, { /* 6580 */ 0, /* */ }, { /* 6581 */ 924, /* VPCMPUWZ256rmik */ }, { /* 6582 */ 0, /* */ }, { /* 6583 */ 925, /* VPCMPUWZ256rri */ }, { /* 6584 */ 0, /* */ }, { /* 6585 */ 926, /* VPCMPUWZ256rrik */ }, { /* 6586 */ 0, /* */ }, { /* 6587 */ 927, /* VPCMPUWZrmi */ }, { /* 6588 */ 0, /* */ }, { /* 6589 */ 928, /* VPCMPUWZrmik */ }, { /* 6590 */ 0, /* */ }, { /* 6591 */ 929, /* VPCMPUWZrri */ }, { /* 6592 */ 0, /* */ }, { /* 6593 */ 930, /* VPCMPUWZrrik */ }, { /* 6594 */ 0, /* */ }, { /* 6595 */ 919, /* VPCMPWZ128rmi */ }, { /* 6596 */ 0, /* */ }, { /* 6597 */ 920, /* VPCMPWZ128rmik */ }, { /* 6598 */ 0, /* */ }, { /* 6599 */ 921, /* VPCMPWZ128rri */ }, { /* 6600 */ 0, /* */ }, { /* 6601 */ 922, /* VPCMPWZ128rrik */ }, { /* 6602 */ 0, /* */ }, { /* 6603 */ 923, /* VPCMPWZ256rmi */ }, { /* 6604 */ 0, /* */ }, { /* 6605 */ 924, /* VPCMPWZ256rmik */ }, { /* 6606 */ 0, /* */ }, { /* 6607 */ 925, /* VPCMPWZ256rri */ }, { /* 6608 */ 0, /* */ }, { /* 6609 */ 926, /* VPCMPWZ256rrik */ }, { /* 6610 */ 0, /* */ }, { /* 6611 */ 927, /* VPCMPWZrmi */ }, { /* 6612 */ 0, /* */ }, { /* 6613 */ 928, /* VPCMPWZrmik */ }, { /* 6614 */ 0, /* */ }, { /* 6615 */ 929, /* VPCMPWZrri */ }, { /* 6616 */ 0, /* */ }, { /* 6617 */ 930, /* VPCMPWZrrik */ }, { /* 6618 */ 0, /* */ }, { /* 6619 */ 931, /* VPCOMBmi */ }, { /* 6620 */ 0, /* */ }, { /* 6621 */ 932, /* VPCOMBri */ }, { /* 6622 */ 0, /* */ }, { /* 6623 */ 931, /* VPCOMDmi */ }, { /* 6624 */ 0, /* */ }, { /* 6625 */ 932, /* VPCOMDri */ }, { /* 6626 */ 0, /* */ }, { /* 6627 */ 465, /* VPCOMPRESSDZ128mrk */ }, { /* 6628 */ 466, /* VPCOMPRESSDZ128rrk */ }, { /* 6629 */ 467, /* VPCOMPRESSDZ128rrkz */ }, { /* 6630 */ 468, /* VPCOMPRESSDZ256mrk */ }, { /* 6631 */ 469, /* VPCOMPRESSDZ256rrk */ }, { /* 6632 */ 470, /* VPCOMPRESSDZ256rrkz */ }, { /* 6633 */ 471, /* VPCOMPRESSDZmrk */ }, { /* 6634 */ 472, /* VPCOMPRESSDZrrk */ }, { /* 6635 */ 473, /* VPCOMPRESSDZrrkz */ }, { /* 6636 */ 456, /* VPCOMPRESSQZ128mrk */ }, { /* 6637 */ 457, /* VPCOMPRESSQZ128rrk */ }, { /* 6638 */ 458, /* VPCOMPRESSQZ128rrkz */ }, { /* 6639 */ 459, /* VPCOMPRESSQZ256mrk */ }, { /* 6640 */ 460, /* VPCOMPRESSQZ256rrk */ }, { /* 6641 */ 461, /* VPCOMPRESSQZ256rrkz */ }, { /* 6642 */ 462, /* VPCOMPRESSQZmrk */ }, { /* 6643 */ 463, /* VPCOMPRESSQZrrk */ }, { /* 6644 */ 464, /* VPCOMPRESSQZrrkz */ }, { /* 6645 */ 931, /* VPCOMQmi */ }, { /* 6646 */ 0, /* */ }, { /* 6647 */ 932, /* VPCOMQri */ }, { /* 6648 */ 0, /* */ }, { /* 6649 */ 931, /* VPCOMUBmi */ }, { /* 6650 */ 0, /* */ }, { /* 6651 */ 932, /* VPCOMUBri */ }, { /* 6652 */ 0, /* */ }, { /* 6653 */ 931, /* VPCOMUDmi */ }, { /* 6654 */ 0, /* */ }, { /* 6655 */ 932, /* VPCOMUDri */ }, { /* 6656 */ 0, /* */ }, { /* 6657 */ 931, /* VPCOMUQmi */ }, { /* 6658 */ 0, /* */ }, { /* 6659 */ 932, /* VPCOMUQri */ }, { /* 6660 */ 0, /* */ }, { /* 6661 */ 931, /* VPCOMUWmi */ }, { /* 6662 */ 0, /* */ }, { /* 6663 */ 932, /* VPCOMUWri */ }, { /* 6664 */ 0, /* */ }, { /* 6665 */ 931, /* VPCOMWmi */ }, { /* 6666 */ 0, /* */ }, { /* 6667 */ 932, /* VPCOMWri */ }, { /* 6668 */ 0, /* */ }, { /* 6669 */ 477, /* VPCONFLICTDrm */ }, { /* 6670 */ 728, /* VPCONFLICTDrmb */ }, { /* 6671 */ 933, /* VPCONFLICTDrmbk */ }, { /* 6672 */ 729, /* VPCONFLICTDrmbkz */ }, { /* 6673 */ 537, /* VPCONFLICTDrmk */ }, { /* 6674 */ 538, /* VPCONFLICTDrmkz */ }, { /* 6675 */ 478, /* VPCONFLICTDrr */ }, { /* 6676 */ 541, /* VPCONFLICTDrrk */ }, { /* 6677 */ 542, /* VPCONFLICTDrrkz */ }, { /* 6678 */ 477, /* VPCONFLICTQrm */ }, { /* 6679 */ 730, /* VPCONFLICTQrmb */ }, { /* 6680 */ 934, /* VPCONFLICTQrmbk */ }, { /* 6681 */ 731, /* VPCONFLICTQrmbkz */ }, { /* 6682 */ 528, /* VPCONFLICTQrmk */ }, { /* 6683 */ 529, /* VPCONFLICTQrmkz */ }, { /* 6684 */ 478, /* VPCONFLICTQrr */ }, { /* 6685 */ 533, /* VPCONFLICTQrrk */ }, { /* 6686 */ 534, /* VPCONFLICTQrrkz */ }, { /* 6687 */ 388, /* VPERM2F128rm */ }, { /* 6688 */ 389, /* VPERM2F128rr */ }, { /* 6689 */ 388, /* VPERM2I128rm */ }, { /* 6690 */ 389, /* VPERM2I128rr */ }, { /* 6691 */ 302, /* VPERMDYrm */ }, { /* 6692 */ 303, /* VPERMDYrr */ }, { /* 6693 */ 325, /* VPERMDZrm */ }, { /* 6694 */ 331, /* VPERMDZrr */ }, { /* 6695 */ 574, /* VPERMI2Drm */ }, { /* 6696 */ 356, /* VPERMI2Drmk */ }, { /* 6697 */ 356, /* VPERMI2Drmkz */ }, { /* 6698 */ 588, /* VPERMI2Drr */ }, { /* 6699 */ 358, /* VPERMI2Drrk */ }, { /* 6700 */ 358, /* VPERMI2Drrkz */ }, { /* 6701 */ 574, /* VPERMI2PDrm */ }, { /* 6702 */ 329, /* VPERMI2PDrmk */ }, { /* 6703 */ 329, /* VPERMI2PDrmkz */ }, { /* 6704 */ 588, /* VPERMI2PDrr */ }, { /* 6705 */ 332, /* VPERMI2PDrrk */ }, { /* 6706 */ 332, /* VPERMI2PDrrkz */ }, { /* 6707 */ 574, /* VPERMI2PSrm */ }, { /* 6708 */ 356, /* VPERMI2PSrmk */ }, { /* 6709 */ 356, /* VPERMI2PSrmkz */ }, { /* 6710 */ 588, /* VPERMI2PSrr */ }, { /* 6711 */ 358, /* VPERMI2PSrrk */ }, { /* 6712 */ 358, /* VPERMI2PSrrkz */ }, { /* 6713 */ 574, /* VPERMI2Qrm */ }, { /* 6714 */ 329, /* VPERMI2Qrmk */ }, { /* 6715 */ 329, /* VPERMI2Qrmkz */ }, { /* 6716 */ 588, /* VPERMI2Qrr */ }, { /* 6717 */ 332, /* VPERMI2Qrrk */ }, { /* 6718 */ 332, /* VPERMI2Qrrkz */ }, { /* 6719 */ 935, /* VPERMIL2PDmr */ }, { /* 6720 */ 936, /* VPERMIL2PDmrY */ }, { /* 6721 */ 937, /* VPERMIL2PDrm */ }, { /* 6722 */ 938, /* VPERMIL2PDrmY */ }, { /* 6723 */ 939, /* VPERMIL2PDrr */ }, { /* 6724 */ 940, /* VPERMIL2PDrrY */ }, { /* 6725 */ 935, /* VPERMIL2PSmr */ }, { /* 6726 */ 936, /* VPERMIL2PSmrY */ }, { /* 6727 */ 937, /* VPERMIL2PSrm */ }, { /* 6728 */ 938, /* VPERMIL2PSrmY */ }, { /* 6729 */ 939, /* VPERMIL2PSrr */ }, { /* 6730 */ 940, /* VPERMIL2PSrrY */ }, { /* 6731 */ 941, /* VPERMILPDYmi */ }, { /* 6732 */ 942, /* VPERMILPDYri */ }, { /* 6733 */ 302, /* VPERMILPDYrm */ }, { /* 6734 */ 303, /* VPERMILPDYrr */ }, { /* 6735 */ 943, /* VPERMILPDZmi */ }, { /* 6736 */ 944, /* VPERMILPDZri */ }, { /* 6737 */ 325, /* VPERMILPDZrm */ }, { /* 6738 */ 331, /* VPERMILPDZrr */ }, { /* 6739 */ 46, /* VPERMILPDmi */ }, { /* 6740 */ 47, /* VPERMILPDri */ }, { /* 6741 */ 334, /* VPERMILPDrm */ }, { /* 6742 */ 335, /* VPERMILPDrr */ }, { /* 6743 */ 941, /* VPERMILPSYmi */ }, { /* 6744 */ 942, /* VPERMILPSYri */ }, { /* 6745 */ 302, /* VPERMILPSYrm */ }, { /* 6746 */ 303, /* VPERMILPSYrr */ }, { /* 6747 */ 943, /* VPERMILPSZmi */ }, { /* 6748 */ 944, /* VPERMILPSZri */ }, { /* 6749 */ 325, /* VPERMILPSZrm */ }, { /* 6750 */ 331, /* VPERMILPSZrr */ }, { /* 6751 */ 46, /* VPERMILPSmi */ }, { /* 6752 */ 47, /* VPERMILPSri */ }, { /* 6753 */ 334, /* VPERMILPSrm */ }, { /* 6754 */ 335, /* VPERMILPSrr */ }, { /* 6755 */ 941, /* VPERMPDYmi */ }, { /* 6756 */ 942, /* VPERMPDYri */ }, { /* 6757 */ 943, /* VPERMPDZmi */ }, { /* 6758 */ 944, /* VPERMPDZri */ }, { /* 6759 */ 325, /* VPERMPDZrm */ }, { /* 6760 */ 331, /* VPERMPDZrr */ }, { /* 6761 */ 302, /* VPERMPSYrm */ }, { /* 6762 */ 303, /* VPERMPSYrr */ }, { /* 6763 */ 325, /* VPERMPSZrm */ }, { /* 6764 */ 331, /* VPERMPSZrr */ }, { /* 6765 */ 941, /* VPERMQYmi */ }, { /* 6766 */ 942, /* VPERMQYri */ }, { /* 6767 */ 943, /* VPERMQZmi */ }, { /* 6768 */ 944, /* VPERMQZri */ }, { /* 6769 */ 325, /* VPERMQZrm */ }, { /* 6770 */ 331, /* VPERMQZrr */ }, { /* 6771 */ 574, /* VPERMT2Drm */ }, { /* 6772 */ 356, /* VPERMT2Drmk */ }, { /* 6773 */ 356, /* VPERMT2Drmkz */ }, { /* 6774 */ 588, /* VPERMT2Drr */ }, { /* 6775 */ 358, /* VPERMT2Drrk */ }, { /* 6776 */ 358, /* VPERMT2Drrkz */ }, { /* 6777 */ 574, /* VPERMT2PDrm */ }, { /* 6778 */ 329, /* VPERMT2PDrmk */ }, { /* 6779 */ 329, /* VPERMT2PDrmkz */ }, { /* 6780 */ 588, /* VPERMT2PDrr */ }, { /* 6781 */ 332, /* VPERMT2PDrrk */ }, { /* 6782 */ 332, /* VPERMT2PDrrkz */ }, { /* 6783 */ 574, /* VPERMT2PSrm */ }, { /* 6784 */ 356, /* VPERMT2PSrmk */ }, { /* 6785 */ 356, /* VPERMT2PSrmkz */ }, { /* 6786 */ 588, /* VPERMT2PSrr */ }, { /* 6787 */ 358, /* VPERMT2PSrrk */ }, { /* 6788 */ 358, /* VPERMT2PSrrkz */ }, { /* 6789 */ 574, /* VPERMT2Qrm */ }, { /* 6790 */ 329, /* VPERMT2Qrmk */ }, { /* 6791 */ 329, /* VPERMT2Qrmkz */ }, { /* 6792 */ 588, /* VPERMT2Qrr */ }, { /* 6793 */ 332, /* VPERMT2Qrrk */ }, { /* 6794 */ 332, /* VPERMT2Qrrkz */ }, { /* 6795 */ 553, /* VPEXPANDDZ128rmk */ }, { /* 6796 */ 554, /* VPEXPANDDZ128rmkz */ }, { /* 6797 */ 555, /* VPEXPANDDZ128rrk */ }, { /* 6798 */ 556, /* VPEXPANDDZ128rrkz */ }, { /* 6799 */ 557, /* VPEXPANDDZ256rmk */ }, { /* 6800 */ 558, /* VPEXPANDDZ256rmkz */ }, { /* 6801 */ 559, /* VPEXPANDDZ256rrk */ }, { /* 6802 */ 560, /* VPEXPANDDZ256rrkz */ }, { /* 6803 */ 535, /* VPEXPANDDZrmk */ }, { /* 6804 */ 536, /* VPEXPANDDZrmkz */ }, { /* 6805 */ 541, /* VPEXPANDDZrrk */ }, { /* 6806 */ 542, /* VPEXPANDDZrrkz */ }, { /* 6807 */ 543, /* VPEXPANDQZ128rmk */ }, { /* 6808 */ 544, /* VPEXPANDQZ128rmkz */ }, { /* 6809 */ 545, /* VPEXPANDQZ128rrk */ }, { /* 6810 */ 546, /* VPEXPANDQZ128rrkz */ }, { /* 6811 */ 547, /* VPEXPANDQZ256rmk */ }, { /* 6812 */ 548, /* VPEXPANDQZ256rmkz */ }, { /* 6813 */ 549, /* VPEXPANDQZ256rrk */ }, { /* 6814 */ 550, /* VPEXPANDQZ256rrkz */ }, { /* 6815 */ 551, /* VPEXPANDQZrmk */ }, { /* 6816 */ 552, /* VPEXPANDQZrmkz */ }, { /* 6817 */ 533, /* VPEXPANDQZrrk */ }, { /* 6818 */ 534, /* VPEXPANDQZrrkz */ }, { /* 6819 */ 270, /* VPEXTRBmr */ }, { /* 6820 */ 133, /* VPEXTRBrr */ }, { /* 6821 */ 271, /* VPEXTRDmr */ }, { /* 6822 */ 133, /* VPEXTRDrr */ }, { /* 6823 */ 271, /* VPEXTRQmr */ }, { /* 6824 */ 272, /* VPEXTRQrr */ }, { /* 6825 */ 271, /* VPEXTRWmr */ }, { /* 6826 */ 273, /* VPEXTRWri */ }, { /* 6827 */ 133, /* VPEXTRWrr_REV */ }, { /* 6828 */ 614, /* VPGATHERDDYrm */ }, { /* 6829 */ 615, /* VPGATHERDDZrm */ }, { /* 6830 */ 616, /* VPGATHERDDrm */ }, { /* 6831 */ 611, /* VPGATHERDQYrm */ }, { /* 6832 */ 612, /* VPGATHERDQZrm */ }, { /* 6833 */ 613, /* VPGATHERDQrm */ }, { /* 6834 */ 616, /* VPGATHERQDYrm */ }, { /* 6835 */ 620, /* VPGATHERQDZrm */ }, { /* 6836 */ 616, /* VPGATHERQDrm */ }, { /* 6837 */ 611, /* VPGATHERQQYrm */ }, { /* 6838 */ 612, /* VPGATHERQQZrm */ }, { /* 6839 */ 613, /* VPGATHERQQrm */ }, { /* 6840 */ 44, /* VPHADDBDrm */ }, { /* 6841 */ 45, /* VPHADDBDrr */ }, { /* 6842 */ 44, /* VPHADDBQrm */ }, { /* 6843 */ 45, /* VPHADDBQrr */ }, { /* 6844 */ 44, /* VPHADDBWrm */ }, { /* 6845 */ 45, /* VPHADDBWrr */ }, { /* 6846 */ 44, /* VPHADDDQrm */ }, { /* 6847 */ 45, /* VPHADDDQrr */ }, { /* 6848 */ 302, /* VPHADDDYrm */ }, { /* 6849 */ 303, /* VPHADDDYrr */ }, { /* 6850 */ 334, /* VPHADDDrm */ }, { /* 6851 */ 335, /* VPHADDDrr */ }, { /* 6852 */ 334, /* VPHADDSWrm128 */ }, { /* 6853 */ 302, /* VPHADDSWrm256 */ }, { /* 6854 */ 335, /* VPHADDSWrr128 */ }, { /* 6855 */ 303, /* VPHADDSWrr256 */ }, { /* 6856 */ 44, /* VPHADDUBDrm */ }, { /* 6857 */ 45, /* VPHADDUBDrr */ }, { /* 6858 */ 44, /* VPHADDUBQrm */ }, { /* 6859 */ 45, /* VPHADDUBQrr */ }, { /* 6860 */ 44, /* VPHADDUBWrm */ }, { /* 6861 */ 45, /* VPHADDUBWrr */ }, { /* 6862 */ 44, /* VPHADDUDQrm */ }, { /* 6863 */ 45, /* VPHADDUDQrr */ }, { /* 6864 */ 44, /* VPHADDUWDrm */ }, { /* 6865 */ 45, /* VPHADDUWDrr */ }, { /* 6866 */ 44, /* VPHADDUWQrm */ }, { /* 6867 */ 45, /* VPHADDUWQrr */ }, { /* 6868 */ 44, /* VPHADDWDrm */ }, { /* 6869 */ 45, /* VPHADDWDrr */ }, { /* 6870 */ 44, /* VPHADDWQrm */ }, { /* 6871 */ 45, /* VPHADDWQrr */ }, { /* 6872 */ 302, /* VPHADDWYrm */ }, { /* 6873 */ 303, /* VPHADDWYrr */ }, { /* 6874 */ 334, /* VPHADDWrm */ }, { /* 6875 */ 335, /* VPHADDWrr */ }, { /* 6876 */ 44, /* VPHMINPOSUWrm128 */ }, { /* 6877 */ 45, /* VPHMINPOSUWrr128 */ }, { /* 6878 */ 44, /* VPHSUBBWrm */ }, { /* 6879 */ 45, /* VPHSUBBWrr */ }, { /* 6880 */ 44, /* VPHSUBDQrm */ }, { /* 6881 */ 45, /* VPHSUBDQrr */ }, { /* 6882 */ 302, /* VPHSUBDYrm */ }, { /* 6883 */ 303, /* VPHSUBDYrr */ }, { /* 6884 */ 334, /* VPHSUBDrm */ }, { /* 6885 */ 335, /* VPHSUBDrr */ }, { /* 6886 */ 334, /* VPHSUBSWrm128 */ }, { /* 6887 */ 302, /* VPHSUBSWrm256 */ }, { /* 6888 */ 335, /* VPHSUBSWrr128 */ }, { /* 6889 */ 303, /* VPHSUBSWrr256 */ }, { /* 6890 */ 44, /* VPHSUBWDrm */ }, { /* 6891 */ 45, /* VPHSUBWDrr */ }, { /* 6892 */ 302, /* VPHSUBWYrm */ }, { /* 6893 */ 303, /* VPHSUBWYrr */ }, { /* 6894 */ 334, /* VPHSUBWrm */ }, { /* 6895 */ 335, /* VPHSUBWrr */ }, { /* 6896 */ 945, /* VPINSRBrm */ }, { /* 6897 */ 946, /* VPINSRBrr */ }, { /* 6898 */ 947, /* VPINSRDrm */ }, { /* 6899 */ 946, /* VPINSRDrr */ }, { /* 6900 */ 947, /* VPINSRQrm */ }, { /* 6901 */ 948, /* VPINSRQrr */ }, { /* 6902 */ 947, /* VPINSRWrmi */ }, { /* 6903 */ 946, /* VPINSRWrri */ }, { /* 6904 */ 477, /* VPLZCNTDrm */ }, { /* 6905 */ 728, /* VPLZCNTDrmb */ }, { /* 6906 */ 933, /* VPLZCNTDrmbk */ }, { /* 6907 */ 729, /* VPLZCNTDrmbkz */ }, { /* 6908 */ 537, /* VPLZCNTDrmk */ }, { /* 6909 */ 538, /* VPLZCNTDrmkz */ }, { /* 6910 */ 478, /* VPLZCNTDrr */ }, { /* 6911 */ 541, /* VPLZCNTDrrk */ }, { /* 6912 */ 542, /* VPLZCNTDrrkz */ }, { /* 6913 */ 477, /* VPLZCNTQrm */ }, { /* 6914 */ 730, /* VPLZCNTQrmb */ }, { /* 6915 */ 934, /* VPLZCNTQrmbk */ }, { /* 6916 */ 731, /* VPLZCNTQrmbkz */ }, { /* 6917 */ 528, /* VPLZCNTQrmk */ }, { /* 6918 */ 529, /* VPLZCNTQrmkz */ }, { /* 6919 */ 478, /* VPLZCNTQrr */ }, { /* 6920 */ 533, /* VPLZCNTQrrk */ }, { /* 6921 */ 534, /* VPLZCNTQrrkz */ }, { /* 6922 */ 394, /* VPMACSDDrm */ }, { /* 6923 */ 395, /* VPMACSDDrr */ }, { /* 6924 */ 394, /* VPMACSDQHrm */ }, { /* 6925 */ 395, /* VPMACSDQHrr */ }, { /* 6926 */ 394, /* VPMACSDQLrm */ }, { /* 6927 */ 395, /* VPMACSDQLrr */ }, { /* 6928 */ 394, /* VPMACSSDDrm */ }, { /* 6929 */ 395, /* VPMACSSDDrr */ }, { /* 6930 */ 394, /* VPMACSSDQHrm */ }, { /* 6931 */ 395, /* VPMACSSDQHrr */ }, { /* 6932 */ 394, /* VPMACSSDQLrm */ }, { /* 6933 */ 395, /* VPMACSSDQLrr */ }, { /* 6934 */ 394, /* VPMACSSWDrm */ }, { /* 6935 */ 395, /* VPMACSSWDrr */ }, { /* 6936 */ 394, /* VPMACSSWWrm */ }, { /* 6937 */ 395, /* VPMACSSWWrr */ }, { /* 6938 */ 394, /* VPMACSWDrm */ }, { /* 6939 */ 395, /* VPMACSWDrr */ }, { /* 6940 */ 394, /* VPMACSWWrm */ }, { /* 6941 */ 395, /* VPMACSWWrr */ }, { /* 6942 */ 394, /* VPMADCSSWDrm */ }, { /* 6943 */ 395, /* VPMADCSSWDrr */ }, { /* 6944 */ 394, /* VPMADCSWDrm */ }, { /* 6945 */ 395, /* VPMADCSWDrr */ }, { /* 6946 */ 334, /* VPMADDUBSWrm128 */ }, { /* 6947 */ 302, /* VPMADDUBSWrm256 */ }, { /* 6948 */ 335, /* VPMADDUBSWrr128 */ }, { /* 6949 */ 303, /* VPMADDUBSWrr256 */ }, { /* 6950 */ 302, /* VPMADDWDYrm */ }, { /* 6951 */ 303, /* VPMADDWDYrr */ }, { /* 6952 */ 334, /* VPMADDWDrm */ }, { /* 6953 */ 335, /* VPMADDWDrr */ }, { /* 6954 */ 630, /* VPMASKMOVDYmr */ }, { /* 6955 */ 302, /* VPMASKMOVDYrm */ }, { /* 6956 */ 631, /* VPMASKMOVDmr */ }, { /* 6957 */ 334, /* VPMASKMOVDrm */ }, { /* 6958 */ 630, /* VPMASKMOVQYmr */ }, { /* 6959 */ 302, /* VPMASKMOVQYrm */ }, { /* 6960 */ 631, /* VPMASKMOVQmr */ }, { /* 6961 */ 334, /* VPMASKMOVQrm */ }, { /* 6962 */ 302, /* VPMAXSBYrm */ }, { /* 6963 */ 303, /* VPMAXSBYrr */ }, { /* 6964 */ 304, /* VPMAXSBZ128rm */ }, { /* 6965 */ 732, /* VPMAXSBZ128rmk */ }, { /* 6966 */ 733, /* VPMAXSBZ128rmkz */ }, { /* 6967 */ 310, /* VPMAXSBZ128rr */ }, { /* 6968 */ 734, /* VPMAXSBZ128rrk */ }, { /* 6969 */ 735, /* VPMAXSBZ128rrkz */ }, { /* 6970 */ 313, /* VPMAXSBZ256rm */ }, { /* 6971 */ 736, /* VPMAXSBZ256rmk */ }, { /* 6972 */ 737, /* VPMAXSBZ256rmkz */ }, { /* 6973 */ 319, /* VPMAXSBZ256rr */ }, { /* 6974 */ 738, /* VPMAXSBZ256rrk */ }, { /* 6975 */ 739, /* VPMAXSBZ256rrkz */ }, { /* 6976 */ 325, /* VPMAXSBZrm */ }, { /* 6977 */ 740, /* VPMAXSBZrmk */ }, { /* 6978 */ 741, /* VPMAXSBZrmkz */ }, { /* 6979 */ 331, /* VPMAXSBZrr */ }, { /* 6980 */ 742, /* VPMAXSBZrrk */ }, { /* 6981 */ 743, /* VPMAXSBZrrkz */ }, { /* 6982 */ 334, /* VPMAXSBrm */ }, { /* 6983 */ 335, /* VPMAXSBrr */ }, { /* 6984 */ 302, /* VPMAXSDYrm */ }, { /* 6985 */ 303, /* VPMAXSDYrr */ }, { /* 6986 */ 304, /* VPMAXSDZ128rm */ }, { /* 6987 */ 744, /* VPMAXSDZ128rmb */ }, { /* 6988 */ 745, /* VPMAXSDZ128rmbk */ }, { /* 6989 */ 746, /* VPMAXSDZ128rmbkz */ }, { /* 6990 */ 339, /* VPMAXSDZ128rmk */ }, { /* 6991 */ 340, /* VPMAXSDZ128rmkz */ }, { /* 6992 */ 310, /* VPMAXSDZ128rr */ }, { /* 6993 */ 341, /* VPMAXSDZ128rrk */ }, { /* 6994 */ 342, /* VPMAXSDZ128rrkz */ }, { /* 6995 */ 313, /* VPMAXSDZ256rm */ }, { /* 6996 */ 747, /* VPMAXSDZ256rmb */ }, { /* 6997 */ 748, /* VPMAXSDZ256rmbk */ }, { /* 6998 */ 749, /* VPMAXSDZ256rmbkz */ }, { /* 6999 */ 346, /* VPMAXSDZ256rmk */ }, { /* 7000 */ 347, /* VPMAXSDZ256rmkz */ }, { /* 7001 */ 319, /* VPMAXSDZ256rr */ }, { /* 7002 */ 348, /* VPMAXSDZ256rrk */ }, { /* 7003 */ 349, /* VPMAXSDZ256rrkz */ }, { /* 7004 */ 325, /* VPMAXSDZrm */ }, { /* 7005 */ 750, /* VPMAXSDZrmb */ }, { /* 7006 */ 751, /* VPMAXSDZrmbk */ }, { /* 7007 */ 752, /* VPMAXSDZrmbkz */ }, { /* 7008 */ 356, /* VPMAXSDZrmk */ }, { /* 7009 */ 357, /* VPMAXSDZrmkz */ }, { /* 7010 */ 331, /* VPMAXSDZrr */ }, { /* 7011 */ 358, /* VPMAXSDZrrk */ }, { /* 7012 */ 359, /* VPMAXSDZrrkz */ }, { /* 7013 */ 334, /* VPMAXSDrm */ }, { /* 7014 */ 335, /* VPMAXSDrr */ }, { /* 7015 */ 304, /* VPMAXSQZ128rm */ }, { /* 7016 */ 753, /* VPMAXSQZ128rmb */ }, { /* 7017 */ 754, /* VPMAXSQZ128rmbk */ }, { /* 7018 */ 755, /* VPMAXSQZ128rmbkz */ }, { /* 7019 */ 308, /* VPMAXSQZ128rmk */ }, { /* 7020 */ 309, /* VPMAXSQZ128rmkz */ }, { /* 7021 */ 310, /* VPMAXSQZ128rr */ }, { /* 7022 */ 311, /* VPMAXSQZ128rrk */ }, { /* 7023 */ 312, /* VPMAXSQZ128rrkz */ }, { /* 7024 */ 313, /* VPMAXSQZ256rm */ }, { /* 7025 */ 756, /* VPMAXSQZ256rmb */ }, { /* 7026 */ 757, /* VPMAXSQZ256rmbk */ }, { /* 7027 */ 758, /* VPMAXSQZ256rmbkz */ }, { /* 7028 */ 317, /* VPMAXSQZ256rmk */ }, { /* 7029 */ 318, /* VPMAXSQZ256rmkz */ }, { /* 7030 */ 319, /* VPMAXSQZ256rr */ }, { /* 7031 */ 320, /* VPMAXSQZ256rrk */ }, { /* 7032 */ 321, /* VPMAXSQZ256rrkz */ }, { /* 7033 */ 325, /* VPMAXSQZrm */ }, { /* 7034 */ 759, /* VPMAXSQZrmb */ }, { /* 7035 */ 760, /* VPMAXSQZrmbk */ }, { /* 7036 */ 761, /* VPMAXSQZrmbkz */ }, { /* 7037 */ 329, /* VPMAXSQZrmk */ }, { /* 7038 */ 330, /* VPMAXSQZrmkz */ }, { /* 7039 */ 331, /* VPMAXSQZrr */ }, { /* 7040 */ 332, /* VPMAXSQZrrk */ }, { /* 7041 */ 333, /* VPMAXSQZrrkz */ }, { /* 7042 */ 302, /* VPMAXSWYrm */ }, { /* 7043 */ 303, /* VPMAXSWYrr */ }, { /* 7044 */ 304, /* VPMAXSWZ128rm */ }, { /* 7045 */ 762, /* VPMAXSWZ128rmk */ }, { /* 7046 */ 763, /* VPMAXSWZ128rmkz */ }, { /* 7047 */ 310, /* VPMAXSWZ128rr */ }, { /* 7048 */ 764, /* VPMAXSWZ128rrk */ }, { /* 7049 */ 765, /* VPMAXSWZ128rrkz */ }, { /* 7050 */ 313, /* VPMAXSWZ256rm */ }, { /* 7051 */ 766, /* VPMAXSWZ256rmk */ }, { /* 7052 */ 767, /* VPMAXSWZ256rmkz */ }, { /* 7053 */ 319, /* VPMAXSWZ256rr */ }, { /* 7054 */ 768, /* VPMAXSWZ256rrk */ }, { /* 7055 */ 769, /* VPMAXSWZ256rrkz */ }, { /* 7056 */ 325, /* VPMAXSWZrm */ }, { /* 7057 */ 770, /* VPMAXSWZrmk */ }, { /* 7058 */ 771, /* VPMAXSWZrmkz */ }, { /* 7059 */ 331, /* VPMAXSWZrr */ }, { /* 7060 */ 772, /* VPMAXSWZrrk */ }, { /* 7061 */ 773, /* VPMAXSWZrrkz */ }, { /* 7062 */ 334, /* VPMAXSWrm */ }, { /* 7063 */ 335, /* VPMAXSWrr */ }, { /* 7064 */ 302, /* VPMAXUBYrm */ }, { /* 7065 */ 303, /* VPMAXUBYrr */ }, { /* 7066 */ 304, /* VPMAXUBZ128rm */ }, { /* 7067 */ 732, /* VPMAXUBZ128rmk */ }, { /* 7068 */ 733, /* VPMAXUBZ128rmkz */ }, { /* 7069 */ 310, /* VPMAXUBZ128rr */ }, { /* 7070 */ 734, /* VPMAXUBZ128rrk */ }, { /* 7071 */ 735, /* VPMAXUBZ128rrkz */ }, { /* 7072 */ 313, /* VPMAXUBZ256rm */ }, { /* 7073 */ 736, /* VPMAXUBZ256rmk */ }, { /* 7074 */ 737, /* VPMAXUBZ256rmkz */ }, { /* 7075 */ 319, /* VPMAXUBZ256rr */ }, { /* 7076 */ 738, /* VPMAXUBZ256rrk */ }, { /* 7077 */ 739, /* VPMAXUBZ256rrkz */ }, { /* 7078 */ 325, /* VPMAXUBZrm */ }, { /* 7079 */ 740, /* VPMAXUBZrmk */ }, { /* 7080 */ 741, /* VPMAXUBZrmkz */ }, { /* 7081 */ 331, /* VPMAXUBZrr */ }, { /* 7082 */ 742, /* VPMAXUBZrrk */ }, { /* 7083 */ 743, /* VPMAXUBZrrkz */ }, { /* 7084 */ 334, /* VPMAXUBrm */ }, { /* 7085 */ 335, /* VPMAXUBrr */ }, { /* 7086 */ 302, /* VPMAXUDYrm */ }, { /* 7087 */ 303, /* VPMAXUDYrr */ }, { /* 7088 */ 304, /* VPMAXUDZ128rm */ }, { /* 7089 */ 744, /* VPMAXUDZ128rmb */ }, { /* 7090 */ 745, /* VPMAXUDZ128rmbk */ }, { /* 7091 */ 746, /* VPMAXUDZ128rmbkz */ }, { /* 7092 */ 339, /* VPMAXUDZ128rmk */ }, { /* 7093 */ 340, /* VPMAXUDZ128rmkz */ }, { /* 7094 */ 310, /* VPMAXUDZ128rr */ }, { /* 7095 */ 341, /* VPMAXUDZ128rrk */ }, { /* 7096 */ 342, /* VPMAXUDZ128rrkz */ }, { /* 7097 */ 313, /* VPMAXUDZ256rm */ }, { /* 7098 */ 747, /* VPMAXUDZ256rmb */ }, { /* 7099 */ 748, /* VPMAXUDZ256rmbk */ }, { /* 7100 */ 749, /* VPMAXUDZ256rmbkz */ }, { /* 7101 */ 346, /* VPMAXUDZ256rmk */ }, { /* 7102 */ 347, /* VPMAXUDZ256rmkz */ }, { /* 7103 */ 319, /* VPMAXUDZ256rr */ }, { /* 7104 */ 348, /* VPMAXUDZ256rrk */ }, { /* 7105 */ 349, /* VPMAXUDZ256rrkz */ }, { /* 7106 */ 325, /* VPMAXUDZrm */ }, { /* 7107 */ 750, /* VPMAXUDZrmb */ }, { /* 7108 */ 751, /* VPMAXUDZrmbk */ }, { /* 7109 */ 752, /* VPMAXUDZrmbkz */ }, { /* 7110 */ 356, /* VPMAXUDZrmk */ }, { /* 7111 */ 357, /* VPMAXUDZrmkz */ }, { /* 7112 */ 331, /* VPMAXUDZrr */ }, { /* 7113 */ 358, /* VPMAXUDZrrk */ }, { /* 7114 */ 359, /* VPMAXUDZrrkz */ }, { /* 7115 */ 334, /* VPMAXUDrm */ }, { /* 7116 */ 335, /* VPMAXUDrr */ }, { /* 7117 */ 304, /* VPMAXUQZ128rm */ }, { /* 7118 */ 753, /* VPMAXUQZ128rmb */ }, { /* 7119 */ 754, /* VPMAXUQZ128rmbk */ }, { /* 7120 */ 755, /* VPMAXUQZ128rmbkz */ }, { /* 7121 */ 308, /* VPMAXUQZ128rmk */ }, { /* 7122 */ 309, /* VPMAXUQZ128rmkz */ }, { /* 7123 */ 310, /* VPMAXUQZ128rr */ }, { /* 7124 */ 311, /* VPMAXUQZ128rrk */ }, { /* 7125 */ 312, /* VPMAXUQZ128rrkz */ }, { /* 7126 */ 313, /* VPMAXUQZ256rm */ }, { /* 7127 */ 756, /* VPMAXUQZ256rmb */ }, { /* 7128 */ 757, /* VPMAXUQZ256rmbk */ }, { /* 7129 */ 758, /* VPMAXUQZ256rmbkz */ }, { /* 7130 */ 317, /* VPMAXUQZ256rmk */ }, { /* 7131 */ 318, /* VPMAXUQZ256rmkz */ }, { /* 7132 */ 319, /* VPMAXUQZ256rr */ }, { /* 7133 */ 320, /* VPMAXUQZ256rrk */ }, { /* 7134 */ 321, /* VPMAXUQZ256rrkz */ }, { /* 7135 */ 325, /* VPMAXUQZrm */ }, { /* 7136 */ 759, /* VPMAXUQZrmb */ }, { /* 7137 */ 760, /* VPMAXUQZrmbk */ }, { /* 7138 */ 761, /* VPMAXUQZrmbkz */ }, { /* 7139 */ 329, /* VPMAXUQZrmk */ }, { /* 7140 */ 330, /* VPMAXUQZrmkz */ }, { /* 7141 */ 331, /* VPMAXUQZrr */ }, { /* 7142 */ 332, /* VPMAXUQZrrk */ }, { /* 7143 */ 333, /* VPMAXUQZrrkz */ }, { /* 7144 */ 302, /* VPMAXUWYrm */ }, { /* 7145 */ 303, /* VPMAXUWYrr */ }, { /* 7146 */ 304, /* VPMAXUWZ128rm */ }, { /* 7147 */ 762, /* VPMAXUWZ128rmk */ }, { /* 7148 */ 763, /* VPMAXUWZ128rmkz */ }, { /* 7149 */ 310, /* VPMAXUWZ128rr */ }, { /* 7150 */ 764, /* VPMAXUWZ128rrk */ }, { /* 7151 */ 765, /* VPMAXUWZ128rrkz */ }, { /* 7152 */ 313, /* VPMAXUWZ256rm */ }, { /* 7153 */ 766, /* VPMAXUWZ256rmk */ }, { /* 7154 */ 767, /* VPMAXUWZ256rmkz */ }, { /* 7155 */ 319, /* VPMAXUWZ256rr */ }, { /* 7156 */ 768, /* VPMAXUWZ256rrk */ }, { /* 7157 */ 769, /* VPMAXUWZ256rrkz */ }, { /* 7158 */ 325, /* VPMAXUWZrm */ }, { /* 7159 */ 770, /* VPMAXUWZrmk */ }, { /* 7160 */ 771, /* VPMAXUWZrmkz */ }, { /* 7161 */ 331, /* VPMAXUWZrr */ }, { /* 7162 */ 772, /* VPMAXUWZrrk */ }, { /* 7163 */ 773, /* VPMAXUWZrrkz */ }, { /* 7164 */ 334, /* VPMAXUWrm */ }, { /* 7165 */ 335, /* VPMAXUWrr */ }, { /* 7166 */ 302, /* VPMINSBYrm */ }, { /* 7167 */ 303, /* VPMINSBYrr */ }, { /* 7168 */ 304, /* VPMINSBZ128rm */ }, { /* 7169 */ 732, /* VPMINSBZ128rmk */ }, { /* 7170 */ 733, /* VPMINSBZ128rmkz */ }, { /* 7171 */ 310, /* VPMINSBZ128rr */ }, { /* 7172 */ 734, /* VPMINSBZ128rrk */ }, { /* 7173 */ 735, /* VPMINSBZ128rrkz */ }, { /* 7174 */ 313, /* VPMINSBZ256rm */ }, { /* 7175 */ 736, /* VPMINSBZ256rmk */ }, { /* 7176 */ 737, /* VPMINSBZ256rmkz */ }, { /* 7177 */ 319, /* VPMINSBZ256rr */ }, { /* 7178 */ 738, /* VPMINSBZ256rrk */ }, { /* 7179 */ 739, /* VPMINSBZ256rrkz */ }, { /* 7180 */ 325, /* VPMINSBZrm */ }, { /* 7181 */ 740, /* VPMINSBZrmk */ }, { /* 7182 */ 741, /* VPMINSBZrmkz */ }, { /* 7183 */ 331, /* VPMINSBZrr */ }, { /* 7184 */ 742, /* VPMINSBZrrk */ }, { /* 7185 */ 743, /* VPMINSBZrrkz */ }, { /* 7186 */ 334, /* VPMINSBrm */ }, { /* 7187 */ 335, /* VPMINSBrr */ }, { /* 7188 */ 302, /* VPMINSDYrm */ }, { /* 7189 */ 303, /* VPMINSDYrr */ }, { /* 7190 */ 304, /* VPMINSDZ128rm */ }, { /* 7191 */ 744, /* VPMINSDZ128rmb */ }, { /* 7192 */ 745, /* VPMINSDZ128rmbk */ }, { /* 7193 */ 746, /* VPMINSDZ128rmbkz */ }, { /* 7194 */ 339, /* VPMINSDZ128rmk */ }, { /* 7195 */ 340, /* VPMINSDZ128rmkz */ }, { /* 7196 */ 310, /* VPMINSDZ128rr */ }, { /* 7197 */ 341, /* VPMINSDZ128rrk */ }, { /* 7198 */ 342, /* VPMINSDZ128rrkz */ }, { /* 7199 */ 313, /* VPMINSDZ256rm */ }, { /* 7200 */ 747, /* VPMINSDZ256rmb */ }, { /* 7201 */ 748, /* VPMINSDZ256rmbk */ }, { /* 7202 */ 749, /* VPMINSDZ256rmbkz */ }, { /* 7203 */ 346, /* VPMINSDZ256rmk */ }, { /* 7204 */ 347, /* VPMINSDZ256rmkz */ }, { /* 7205 */ 319, /* VPMINSDZ256rr */ }, { /* 7206 */ 348, /* VPMINSDZ256rrk */ }, { /* 7207 */ 349, /* VPMINSDZ256rrkz */ }, { /* 7208 */ 325, /* VPMINSDZrm */ }, { /* 7209 */ 750, /* VPMINSDZrmb */ }, { /* 7210 */ 751, /* VPMINSDZrmbk */ }, { /* 7211 */ 752, /* VPMINSDZrmbkz */ }, { /* 7212 */ 356, /* VPMINSDZrmk */ }, { /* 7213 */ 357, /* VPMINSDZrmkz */ }, { /* 7214 */ 331, /* VPMINSDZrr */ }, { /* 7215 */ 358, /* VPMINSDZrrk */ }, { /* 7216 */ 359, /* VPMINSDZrrkz */ }, { /* 7217 */ 334, /* VPMINSDrm */ }, { /* 7218 */ 335, /* VPMINSDrr */ }, { /* 7219 */ 304, /* VPMINSQZ128rm */ }, { /* 7220 */ 753, /* VPMINSQZ128rmb */ }, { /* 7221 */ 754, /* VPMINSQZ128rmbk */ }, { /* 7222 */ 755, /* VPMINSQZ128rmbkz */ }, { /* 7223 */ 308, /* VPMINSQZ128rmk */ }, { /* 7224 */ 309, /* VPMINSQZ128rmkz */ }, { /* 7225 */ 310, /* VPMINSQZ128rr */ }, { /* 7226 */ 311, /* VPMINSQZ128rrk */ }, { /* 7227 */ 312, /* VPMINSQZ128rrkz */ }, { /* 7228 */ 313, /* VPMINSQZ256rm */ }, { /* 7229 */ 756, /* VPMINSQZ256rmb */ }, { /* 7230 */ 757, /* VPMINSQZ256rmbk */ }, { /* 7231 */ 758, /* VPMINSQZ256rmbkz */ }, { /* 7232 */ 317, /* VPMINSQZ256rmk */ }, { /* 7233 */ 318, /* VPMINSQZ256rmkz */ }, { /* 7234 */ 319, /* VPMINSQZ256rr */ }, { /* 7235 */ 320, /* VPMINSQZ256rrk */ }, { /* 7236 */ 321, /* VPMINSQZ256rrkz */ }, { /* 7237 */ 325, /* VPMINSQZrm */ }, { /* 7238 */ 759, /* VPMINSQZrmb */ }, { /* 7239 */ 760, /* VPMINSQZrmbk */ }, { /* 7240 */ 761, /* VPMINSQZrmbkz */ }, { /* 7241 */ 329, /* VPMINSQZrmk */ }, { /* 7242 */ 330, /* VPMINSQZrmkz */ }, { /* 7243 */ 331, /* VPMINSQZrr */ }, { /* 7244 */ 332, /* VPMINSQZrrk */ }, { /* 7245 */ 333, /* VPMINSQZrrkz */ }, { /* 7246 */ 302, /* VPMINSWYrm */ }, { /* 7247 */ 303, /* VPMINSWYrr */ }, { /* 7248 */ 304, /* VPMINSWZ128rm */ }, { /* 7249 */ 762, /* VPMINSWZ128rmk */ }, { /* 7250 */ 763, /* VPMINSWZ128rmkz */ }, { /* 7251 */ 310, /* VPMINSWZ128rr */ }, { /* 7252 */ 764, /* VPMINSWZ128rrk */ }, { /* 7253 */ 765, /* VPMINSWZ128rrkz */ }, { /* 7254 */ 313, /* VPMINSWZ256rm */ }, { /* 7255 */ 766, /* VPMINSWZ256rmk */ }, { /* 7256 */ 767, /* VPMINSWZ256rmkz */ }, { /* 7257 */ 319, /* VPMINSWZ256rr */ }, { /* 7258 */ 768, /* VPMINSWZ256rrk */ }, { /* 7259 */ 769, /* VPMINSWZ256rrkz */ }, { /* 7260 */ 325, /* VPMINSWZrm */ }, { /* 7261 */ 770, /* VPMINSWZrmk */ }, { /* 7262 */ 771, /* VPMINSWZrmkz */ }, { /* 7263 */ 331, /* VPMINSWZrr */ }, { /* 7264 */ 772, /* VPMINSWZrrk */ }, { /* 7265 */ 773, /* VPMINSWZrrkz */ }, { /* 7266 */ 334, /* VPMINSWrm */ }, { /* 7267 */ 335, /* VPMINSWrr */ }, { /* 7268 */ 302, /* VPMINUBYrm */ }, { /* 7269 */ 303, /* VPMINUBYrr */ }, { /* 7270 */ 304, /* VPMINUBZ128rm */ }, { /* 7271 */ 732, /* VPMINUBZ128rmk */ }, { /* 7272 */ 733, /* VPMINUBZ128rmkz */ }, { /* 7273 */ 310, /* VPMINUBZ128rr */ }, { /* 7274 */ 734, /* VPMINUBZ128rrk */ }, { /* 7275 */ 735, /* VPMINUBZ128rrkz */ }, { /* 7276 */ 313, /* VPMINUBZ256rm */ }, { /* 7277 */ 736, /* VPMINUBZ256rmk */ }, { /* 7278 */ 737, /* VPMINUBZ256rmkz */ }, { /* 7279 */ 319, /* VPMINUBZ256rr */ }, { /* 7280 */ 738, /* VPMINUBZ256rrk */ }, { /* 7281 */ 739, /* VPMINUBZ256rrkz */ }, { /* 7282 */ 325, /* VPMINUBZrm */ }, { /* 7283 */ 740, /* VPMINUBZrmk */ }, { /* 7284 */ 741, /* VPMINUBZrmkz */ }, { /* 7285 */ 331, /* VPMINUBZrr */ }, { /* 7286 */ 742, /* VPMINUBZrrk */ }, { /* 7287 */ 743, /* VPMINUBZrrkz */ }, { /* 7288 */ 334, /* VPMINUBrm */ }, { /* 7289 */ 335, /* VPMINUBrr */ }, { /* 7290 */ 302, /* VPMINUDYrm */ }, { /* 7291 */ 303, /* VPMINUDYrr */ }, { /* 7292 */ 304, /* VPMINUDZ128rm */ }, { /* 7293 */ 744, /* VPMINUDZ128rmb */ }, { /* 7294 */ 745, /* VPMINUDZ128rmbk */ }, { /* 7295 */ 746, /* VPMINUDZ128rmbkz */ }, { /* 7296 */ 339, /* VPMINUDZ128rmk */ }, { /* 7297 */ 340, /* VPMINUDZ128rmkz */ }, { /* 7298 */ 310, /* VPMINUDZ128rr */ }, { /* 7299 */ 341, /* VPMINUDZ128rrk */ }, { /* 7300 */ 342, /* VPMINUDZ128rrkz */ }, { /* 7301 */ 313, /* VPMINUDZ256rm */ }, { /* 7302 */ 747, /* VPMINUDZ256rmb */ }, { /* 7303 */ 748, /* VPMINUDZ256rmbk */ }, { /* 7304 */ 749, /* VPMINUDZ256rmbkz */ }, { /* 7305 */ 346, /* VPMINUDZ256rmk */ }, { /* 7306 */ 347, /* VPMINUDZ256rmkz */ }, { /* 7307 */ 319, /* VPMINUDZ256rr */ }, { /* 7308 */ 348, /* VPMINUDZ256rrk */ }, { /* 7309 */ 349, /* VPMINUDZ256rrkz */ }, { /* 7310 */ 325, /* VPMINUDZrm */ }, { /* 7311 */ 750, /* VPMINUDZrmb */ }, { /* 7312 */ 751, /* VPMINUDZrmbk */ }, { /* 7313 */ 752, /* VPMINUDZrmbkz */ }, { /* 7314 */ 356, /* VPMINUDZrmk */ }, { /* 7315 */ 357, /* VPMINUDZrmkz */ }, { /* 7316 */ 331, /* VPMINUDZrr */ }, { /* 7317 */ 358, /* VPMINUDZrrk */ }, { /* 7318 */ 359, /* VPMINUDZrrkz */ }, { /* 7319 */ 334, /* VPMINUDrm */ }, { /* 7320 */ 335, /* VPMINUDrr */ }, { /* 7321 */ 304, /* VPMINUQZ128rm */ }, { /* 7322 */ 753, /* VPMINUQZ128rmb */ }, { /* 7323 */ 754, /* VPMINUQZ128rmbk */ }, { /* 7324 */ 755, /* VPMINUQZ128rmbkz */ }, { /* 7325 */ 308, /* VPMINUQZ128rmk */ }, { /* 7326 */ 309, /* VPMINUQZ128rmkz */ }, { /* 7327 */ 310, /* VPMINUQZ128rr */ }, { /* 7328 */ 311, /* VPMINUQZ128rrk */ }, { /* 7329 */ 312, /* VPMINUQZ128rrkz */ }, { /* 7330 */ 313, /* VPMINUQZ256rm */ }, { /* 7331 */ 756, /* VPMINUQZ256rmb */ }, { /* 7332 */ 757, /* VPMINUQZ256rmbk */ }, { /* 7333 */ 758, /* VPMINUQZ256rmbkz */ }, { /* 7334 */ 317, /* VPMINUQZ256rmk */ }, { /* 7335 */ 318, /* VPMINUQZ256rmkz */ }, { /* 7336 */ 319, /* VPMINUQZ256rr */ }, { /* 7337 */ 320, /* VPMINUQZ256rrk */ }, { /* 7338 */ 321, /* VPMINUQZ256rrkz */ }, { /* 7339 */ 325, /* VPMINUQZrm */ }, { /* 7340 */ 759, /* VPMINUQZrmb */ }, { /* 7341 */ 760, /* VPMINUQZrmbk */ }, { /* 7342 */ 761, /* VPMINUQZrmbkz */ }, { /* 7343 */ 329, /* VPMINUQZrmk */ }, { /* 7344 */ 330, /* VPMINUQZrmkz */ }, { /* 7345 */ 331, /* VPMINUQZrr */ }, { /* 7346 */ 332, /* VPMINUQZrrk */ }, { /* 7347 */ 333, /* VPMINUQZrrkz */ }, { /* 7348 */ 302, /* VPMINUWYrm */ }, { /* 7349 */ 303, /* VPMINUWYrr */ }, { /* 7350 */ 304, /* VPMINUWZ128rm */ }, { /* 7351 */ 762, /* VPMINUWZ128rmk */ }, { /* 7352 */ 763, /* VPMINUWZ128rmkz */ }, { /* 7353 */ 310, /* VPMINUWZ128rr */ }, { /* 7354 */ 764, /* VPMINUWZ128rrk */ }, { /* 7355 */ 765, /* VPMINUWZ128rrkz */ }, { /* 7356 */ 313, /* VPMINUWZ256rm */ }, { /* 7357 */ 766, /* VPMINUWZ256rmk */ }, { /* 7358 */ 767, /* VPMINUWZ256rmkz */ }, { /* 7359 */ 319, /* VPMINUWZ256rr */ }, { /* 7360 */ 768, /* VPMINUWZ256rrk */ }, { /* 7361 */ 769, /* VPMINUWZ256rrkz */ }, { /* 7362 */ 325, /* VPMINUWZrm */ }, { /* 7363 */ 770, /* VPMINUWZrmk */ }, { /* 7364 */ 771, /* VPMINUWZrmkz */ }, { /* 7365 */ 331, /* VPMINUWZrr */ }, { /* 7366 */ 772, /* VPMINUWZrrk */ }, { /* 7367 */ 773, /* VPMINUWZrrkz */ }, { /* 7368 */ 334, /* VPMINUWrm */ }, { /* 7369 */ 335, /* VPMINUWrr */ }, { /* 7370 */ 949, /* VPMOVDBmr */ }, { /* 7371 */ 950, /* VPMOVDBmrk */ }, { /* 7372 */ 951, /* VPMOVDBrr */ }, { /* 7373 */ 952, /* VPMOVDBrrk */ }, { /* 7374 */ 952, /* VPMOVDBrrkz */ }, { /* 7375 */ 953, /* VPMOVDWmr */ }, { /* 7376 */ 954, /* VPMOVDWmrk */ }, { /* 7377 */ 955, /* VPMOVDWrr */ }, { /* 7378 */ 956, /* VPMOVDWrrk */ }, { /* 7379 */ 956, /* VPMOVDWrrkz */ }, { /* 7380 */ 957, /* VPMOVM2BZ128rr */ }, { /* 7381 */ 958, /* VPMOVM2BZ256rr */ }, { /* 7382 */ 959, /* VPMOVM2BZrr */ }, { /* 7383 */ 960, /* VPMOVM2DZ128rr */ }, { /* 7384 */ 961, /* VPMOVM2DZ256rr */ }, { /* 7385 */ 962, /* VPMOVM2DZrr */ }, { /* 7386 */ 963, /* VPMOVM2QZ128rr */ }, { /* 7387 */ 964, /* VPMOVM2QZ256rr */ }, { /* 7388 */ 965, /* VPMOVM2QZrr */ }, { /* 7389 */ 966, /* VPMOVM2WZ128rr */ }, { /* 7390 */ 967, /* VPMOVM2WZ256rr */ }, { /* 7391 */ 968, /* VPMOVM2WZrr */ }, { /* 7392 */ 704, /* VPMOVMSKBYrr */ }, { /* 7393 */ 110, /* VPMOVMSKBrr */ }, { /* 7394 */ 969, /* VPMOVQBmr */ }, { /* 7395 */ 970, /* VPMOVQBmrk */ }, { /* 7396 */ 971, /* VPMOVQBrr */ }, { /* 7397 */ 972, /* VPMOVQBrrk */ }, { /* 7398 */ 972, /* VPMOVQBrrkz */ }, { /* 7399 */ 953, /* VPMOVQDmr */ }, { /* 7400 */ 973, /* VPMOVQDmrk */ }, { /* 7401 */ 955, /* VPMOVQDrr */ }, { /* 7402 */ 974, /* VPMOVQDrrk */ }, { /* 7403 */ 974, /* VPMOVQDrrkz */ }, { /* 7404 */ 949, /* VPMOVQWmr */ }, { /* 7405 */ 975, /* VPMOVQWmrk */ }, { /* 7406 */ 951, /* VPMOVQWrr */ }, { /* 7407 */ 976, /* VPMOVQWrrk */ }, { /* 7408 */ 976, /* VPMOVQWrrkz */ }, { /* 7409 */ 949, /* VPMOVSDBmr */ }, { /* 7410 */ 950, /* VPMOVSDBmrk */ }, { /* 7411 */ 951, /* VPMOVSDBrr */ }, { /* 7412 */ 952, /* VPMOVSDBrrk */ }, { /* 7413 */ 952, /* VPMOVSDBrrkz */ }, { /* 7414 */ 953, /* VPMOVSDWmr */ }, { /* 7415 */ 954, /* VPMOVSDWmrk */ }, { /* 7416 */ 955, /* VPMOVSDWrr */ }, { /* 7417 */ 956, /* VPMOVSDWrrk */ }, { /* 7418 */ 956, /* VPMOVSDWrrkz */ }, { /* 7419 */ 969, /* VPMOVSQBmr */ }, { /* 7420 */ 970, /* VPMOVSQBmrk */ }, { /* 7421 */ 971, /* VPMOVSQBrr */ }, { /* 7422 */ 972, /* VPMOVSQBrrk */ }, { /* 7423 */ 972, /* VPMOVSQBrrkz */ }, { /* 7424 */ 953, /* VPMOVSQDmr */ }, { /* 7425 */ 973, /* VPMOVSQDmrk */ }, { /* 7426 */ 955, /* VPMOVSQDrr */ }, { /* 7427 */ 974, /* VPMOVSQDrrk */ }, { /* 7428 */ 974, /* VPMOVSQDrrkz */ }, { /* 7429 */ 949, /* VPMOVSQWmr */ }, { /* 7430 */ 975, /* VPMOVSQWmrk */ }, { /* 7431 */ 951, /* VPMOVSQWrr */ }, { /* 7432 */ 976, /* VPMOVSQWrrk */ }, { /* 7433 */ 976, /* VPMOVSQWrrkz */ }, { /* 7434 */ 784, /* VPMOVSXBDYrm */ }, { /* 7435 */ 402, /* VPMOVSXBDYrr */ }, { /* 7436 */ 398, /* VPMOVSXBDZrm */ }, { /* 7437 */ 397, /* VPMOVSXBDZrmk */ }, { /* 7438 */ 397, /* VPMOVSXBDZrmkz */ }, { /* 7439 */ 977, /* VPMOVSXBDZrr */ }, { /* 7440 */ 978, /* VPMOVSXBDZrrk */ }, { /* 7441 */ 978, /* VPMOVSXBDZrrkz */ }, { /* 7442 */ 105, /* VPMOVSXBDrm */ }, { /* 7443 */ 45, /* VPMOVSXBDrr */ }, { /* 7444 */ 784, /* VPMOVSXBQYrm */ }, { /* 7445 */ 402, /* VPMOVSXBQYrr */ }, { /* 7446 */ 979, /* VPMOVSXBQZrm */ }, { /* 7447 */ 980, /* VPMOVSXBQZrmk */ }, { /* 7448 */ 980, /* VPMOVSXBQZrmkz */ }, { /* 7449 */ 412, /* VPMOVSXBQZrr */ }, { /* 7450 */ 414, /* VPMOVSXBQZrrk */ }, { /* 7451 */ 414, /* VPMOVSXBQZrrkz */ }, { /* 7452 */ 105, /* VPMOVSXBQrm */ }, { /* 7453 */ 45, /* VPMOVSXBQrr */ }, { /* 7454 */ 396, /* VPMOVSXBWYrm */ }, { /* 7455 */ 402, /* VPMOVSXBWYrr */ }, { /* 7456 */ 105, /* VPMOVSXBWrm */ }, { /* 7457 */ 45, /* VPMOVSXBWrr */ }, { /* 7458 */ 396, /* VPMOVSXDQYrm */ }, { /* 7459 */ 402, /* VPMOVSXDQYrr */ }, { /* 7460 */ 400, /* VPMOVSXDQZrm */ }, { /* 7461 */ 981, /* VPMOVSXDQZrmk */ }, { /* 7462 */ 981, /* VPMOVSXDQZrmkz */ }, { /* 7463 */ 474, /* VPMOVSXDQZrr */ }, { /* 7464 */ 982, /* VPMOVSXDQZrrk */ }, { /* 7465 */ 982, /* VPMOVSXDQZrrkz */ }, { /* 7466 */ 105, /* VPMOVSXDQrm */ }, { /* 7467 */ 45, /* VPMOVSXDQrr */ }, { /* 7468 */ 396, /* VPMOVSXWDYrm */ }, { /* 7469 */ 402, /* VPMOVSXWDYrr */ }, { /* 7470 */ 400, /* VPMOVSXWDZrm */ }, { /* 7471 */ 399, /* VPMOVSXWDZrmk */ }, { /* 7472 */ 399, /* VPMOVSXWDZrmkz */ }, { /* 7473 */ 474, /* VPMOVSXWDZrr */ }, { /* 7474 */ 983, /* VPMOVSXWDZrrk */ }, { /* 7475 */ 983, /* VPMOVSXWDZrrkz */ }, { /* 7476 */ 105, /* VPMOVSXWDrm */ }, { /* 7477 */ 45, /* VPMOVSXWDrr */ }, { /* 7478 */ 784, /* VPMOVSXWQYrm */ }, { /* 7479 */ 402, /* VPMOVSXWQYrr */ }, { /* 7480 */ 398, /* VPMOVSXWQZrm */ }, { /* 7481 */ 984, /* VPMOVSXWQZrmk */ }, { /* 7482 */ 984, /* VPMOVSXWQZrmkz */ }, { /* 7483 */ 977, /* VPMOVSXWQZrr */ }, { /* 7484 */ 985, /* VPMOVSXWQZrrk */ }, { /* 7485 */ 985, /* VPMOVSXWQZrrkz */ }, { /* 7486 */ 105, /* VPMOVSXWQrm */ }, { /* 7487 */ 45, /* VPMOVSXWQrr */ }, { /* 7488 */ 949, /* VPMOVUSDBmr */ }, { /* 7489 */ 950, /* VPMOVUSDBmrk */ }, { /* 7490 */ 951, /* VPMOVUSDBrr */ }, { /* 7491 */ 952, /* VPMOVUSDBrrk */ }, { /* 7492 */ 952, /* VPMOVUSDBrrkz */ }, { /* 7493 */ 953, /* VPMOVUSDWmr */ }, { /* 7494 */ 954, /* VPMOVUSDWmrk */ }, { /* 7495 */ 955, /* VPMOVUSDWrr */ }, { /* 7496 */ 956, /* VPMOVUSDWrrk */ }, { /* 7497 */ 956, /* VPMOVUSDWrrkz */ }, { /* 7498 */ 969, /* VPMOVUSQBmr */ }, { /* 7499 */ 970, /* VPMOVUSQBmrk */ }, { /* 7500 */ 971, /* VPMOVUSQBrr */ }, { /* 7501 */ 972, /* VPMOVUSQBrrk */ }, { /* 7502 */ 972, /* VPMOVUSQBrrkz */ }, { /* 7503 */ 953, /* VPMOVUSQDmr */ }, { /* 7504 */ 973, /* VPMOVUSQDmrk */ }, { /* 7505 */ 955, /* VPMOVUSQDrr */ }, { /* 7506 */ 974, /* VPMOVUSQDrrk */ }, { /* 7507 */ 974, /* VPMOVUSQDrrkz */ }, { /* 7508 */ 949, /* VPMOVUSQWmr */ }, { /* 7509 */ 975, /* VPMOVUSQWmrk */ }, { /* 7510 */ 951, /* VPMOVUSQWrr */ }, { /* 7511 */ 976, /* VPMOVUSQWrrk */ }, { /* 7512 */ 976, /* VPMOVUSQWrrkz */ }, { /* 7513 */ 784, /* VPMOVZXBDYrm */ }, { /* 7514 */ 402, /* VPMOVZXBDYrr */ }, { /* 7515 */ 398, /* VPMOVZXBDZrm */ }, { /* 7516 */ 397, /* VPMOVZXBDZrmk */ }, { /* 7517 */ 397, /* VPMOVZXBDZrmkz */ }, { /* 7518 */ 977, /* VPMOVZXBDZrr */ }, { /* 7519 */ 978, /* VPMOVZXBDZrrk */ }, { /* 7520 */ 978, /* VPMOVZXBDZrrkz */ }, { /* 7521 */ 105, /* VPMOVZXBDrm */ }, { /* 7522 */ 45, /* VPMOVZXBDrr */ }, { /* 7523 */ 784, /* VPMOVZXBQYrm */ }, { /* 7524 */ 402, /* VPMOVZXBQYrr */ }, { /* 7525 */ 979, /* VPMOVZXBQZrm */ }, { /* 7526 */ 980, /* VPMOVZXBQZrmk */ }, { /* 7527 */ 980, /* VPMOVZXBQZrmkz */ }, { /* 7528 */ 412, /* VPMOVZXBQZrr */ }, { /* 7529 */ 414, /* VPMOVZXBQZrrk */ }, { /* 7530 */ 414, /* VPMOVZXBQZrrkz */ }, { /* 7531 */ 105, /* VPMOVZXBQrm */ }, { /* 7532 */ 45, /* VPMOVZXBQrr */ }, { /* 7533 */ 396, /* VPMOVZXBWYrm */ }, { /* 7534 */ 402, /* VPMOVZXBWYrr */ }, { /* 7535 */ 105, /* VPMOVZXBWrm */ }, { /* 7536 */ 45, /* VPMOVZXBWrr */ }, { /* 7537 */ 396, /* VPMOVZXDQYrm */ }, { /* 7538 */ 402, /* VPMOVZXDQYrr */ }, { /* 7539 */ 400, /* VPMOVZXDQZrm */ }, { /* 7540 */ 981, /* VPMOVZXDQZrmk */ }, { /* 7541 */ 981, /* VPMOVZXDQZrmkz */ }, { /* 7542 */ 474, /* VPMOVZXDQZrr */ }, { /* 7543 */ 982, /* VPMOVZXDQZrrk */ }, { /* 7544 */ 982, /* VPMOVZXDQZrrkz */ }, { /* 7545 */ 105, /* VPMOVZXDQrm */ }, { /* 7546 */ 45, /* VPMOVZXDQrr */ }, { /* 7547 */ 396, /* VPMOVZXWDYrm */ }, { /* 7548 */ 402, /* VPMOVZXWDYrr */ }, { /* 7549 */ 400, /* VPMOVZXWDZrm */ }, { /* 7550 */ 399, /* VPMOVZXWDZrmk */ }, { /* 7551 */ 399, /* VPMOVZXWDZrmkz */ }, { /* 7552 */ 474, /* VPMOVZXWDZrr */ }, { /* 7553 */ 983, /* VPMOVZXWDZrrk */ }, { /* 7554 */ 983, /* VPMOVZXWDZrrkz */ }, { /* 7555 */ 105, /* VPMOVZXWDrm */ }, { /* 7556 */ 45, /* VPMOVZXWDrr */ }, { /* 7557 */ 784, /* VPMOVZXWQYrm */ }, { /* 7558 */ 402, /* VPMOVZXWQYrr */ }, { /* 7559 */ 398, /* VPMOVZXWQZrm */ }, { /* 7560 */ 984, /* VPMOVZXWQZrmk */ }, { /* 7561 */ 984, /* VPMOVZXWQZrmkz */ }, { /* 7562 */ 977, /* VPMOVZXWQZrr */ }, { /* 7563 */ 985, /* VPMOVZXWQZrrk */ }, { /* 7564 */ 985, /* VPMOVZXWQZrrkz */ }, { /* 7565 */ 105, /* VPMOVZXWQrm */ }, { /* 7566 */ 45, /* VPMOVZXWQrr */ }, { /* 7567 */ 302, /* VPMULDQYrm */ }, { /* 7568 */ 303, /* VPMULDQYrr */ }, { /* 7569 */ 325, /* VPMULDQZrm */ }, { /* 7570 */ 759, /* VPMULDQZrmb */ }, { /* 7571 */ 761, /* VPMULDQZrmbk */ }, { /* 7572 */ 761, /* VPMULDQZrmbkz */ }, { /* 7573 */ 330, /* VPMULDQZrmk */ }, { /* 7574 */ 330, /* VPMULDQZrmkz */ }, { /* 7575 */ 331, /* VPMULDQZrr */ }, { /* 7576 */ 333, /* VPMULDQZrrk */ }, { /* 7577 */ 333, /* VPMULDQZrrkz */ }, { /* 7578 */ 334, /* VPMULDQrm */ }, { /* 7579 */ 335, /* VPMULDQrr */ }, { /* 7580 */ 334, /* VPMULHRSWrm128 */ }, { /* 7581 */ 302, /* VPMULHRSWrm256 */ }, { /* 7582 */ 335, /* VPMULHRSWrr128 */ }, { /* 7583 */ 303, /* VPMULHRSWrr256 */ }, { /* 7584 */ 302, /* VPMULHUWYrm */ }, { /* 7585 */ 303, /* VPMULHUWYrr */ }, { /* 7586 */ 334, /* VPMULHUWrm */ }, { /* 7587 */ 335, /* VPMULHUWrr */ }, { /* 7588 */ 302, /* VPMULHWYrm */ }, { /* 7589 */ 303, /* VPMULHWYrr */ }, { /* 7590 */ 334, /* VPMULHWrm */ }, { /* 7591 */ 335, /* VPMULHWrr */ }, { /* 7592 */ 302, /* VPMULLDYrm */ }, { /* 7593 */ 303, /* VPMULLDYrr */ }, { /* 7594 */ 304, /* VPMULLDZ128rm */ }, { /* 7595 */ 744, /* VPMULLDZ128rmb */ }, { /* 7596 */ 745, /* VPMULLDZ128rmbk */ }, { /* 7597 */ 746, /* VPMULLDZ128rmbkz */ }, { /* 7598 */ 339, /* VPMULLDZ128rmk */ }, { /* 7599 */ 340, /* VPMULLDZ128rmkz */ }, { /* 7600 */ 310, /* VPMULLDZ128rr */ }, { /* 7601 */ 341, /* VPMULLDZ128rrk */ }, { /* 7602 */ 342, /* VPMULLDZ128rrkz */ }, { /* 7603 */ 313, /* VPMULLDZ256rm */ }, { /* 7604 */ 747, /* VPMULLDZ256rmb */ }, { /* 7605 */ 748, /* VPMULLDZ256rmbk */ }, { /* 7606 */ 749, /* VPMULLDZ256rmbkz */ }, { /* 7607 */ 346, /* VPMULLDZ256rmk */ }, { /* 7608 */ 347, /* VPMULLDZ256rmkz */ }, { /* 7609 */ 319, /* VPMULLDZ256rr */ }, { /* 7610 */ 348, /* VPMULLDZ256rrk */ }, { /* 7611 */ 349, /* VPMULLDZ256rrkz */ }, { /* 7612 */ 325, /* VPMULLDZrm */ }, { /* 7613 */ 750, /* VPMULLDZrmb */ }, { /* 7614 */ 751, /* VPMULLDZrmbk */ }, { /* 7615 */ 752, /* VPMULLDZrmbkz */ }, { /* 7616 */ 356, /* VPMULLDZrmk */ }, { /* 7617 */ 357, /* VPMULLDZrmkz */ }, { /* 7618 */ 331, /* VPMULLDZrr */ }, { /* 7619 */ 358, /* VPMULLDZrrk */ }, { /* 7620 */ 359, /* VPMULLDZrrkz */ }, { /* 7621 */ 334, /* VPMULLDrm */ }, { /* 7622 */ 335, /* VPMULLDrr */ }, { /* 7623 */ 304, /* VPMULLQZ128rm */ }, { /* 7624 */ 753, /* VPMULLQZ128rmb */ }, { /* 7625 */ 754, /* VPMULLQZ128rmbk */ }, { /* 7626 */ 755, /* VPMULLQZ128rmbkz */ }, { /* 7627 */ 308, /* VPMULLQZ128rmk */ }, { /* 7628 */ 309, /* VPMULLQZ128rmkz */ }, { /* 7629 */ 310, /* VPMULLQZ128rr */ }, { /* 7630 */ 311, /* VPMULLQZ128rrk */ }, { /* 7631 */ 312, /* VPMULLQZ128rrkz */ }, { /* 7632 */ 313, /* VPMULLQZ256rm */ }, { /* 7633 */ 756, /* VPMULLQZ256rmb */ }, { /* 7634 */ 757, /* VPMULLQZ256rmbk */ }, { /* 7635 */ 758, /* VPMULLQZ256rmbkz */ }, { /* 7636 */ 317, /* VPMULLQZ256rmk */ }, { /* 7637 */ 318, /* VPMULLQZ256rmkz */ }, { /* 7638 */ 319, /* VPMULLQZ256rr */ }, { /* 7639 */ 320, /* VPMULLQZ256rrk */ }, { /* 7640 */ 321, /* VPMULLQZ256rrkz */ }, { /* 7641 */ 325, /* VPMULLQZrm */ }, { /* 7642 */ 759, /* VPMULLQZrmb */ }, { /* 7643 */ 760, /* VPMULLQZrmbk */ }, { /* 7644 */ 761, /* VPMULLQZrmbkz */ }, { /* 7645 */ 329, /* VPMULLQZrmk */ }, { /* 7646 */ 330, /* VPMULLQZrmkz */ }, { /* 7647 */ 331, /* VPMULLQZrr */ }, { /* 7648 */ 332, /* VPMULLQZrrk */ }, { /* 7649 */ 333, /* VPMULLQZrrkz */ }, { /* 7650 */ 302, /* VPMULLWYrm */ }, { /* 7651 */ 303, /* VPMULLWYrr */ }, { /* 7652 */ 304, /* VPMULLWZ128rm */ }, { /* 7653 */ 762, /* VPMULLWZ128rmk */ }, { /* 7654 */ 763, /* VPMULLWZ128rmkz */ }, { /* 7655 */ 310, /* VPMULLWZ128rr */ }, { /* 7656 */ 764, /* VPMULLWZ128rrk */ }, { /* 7657 */ 765, /* VPMULLWZ128rrkz */ }, { /* 7658 */ 313, /* VPMULLWZ256rm */ }, { /* 7659 */ 766, /* VPMULLWZ256rmk */ }, { /* 7660 */ 767, /* VPMULLWZ256rmkz */ }, { /* 7661 */ 319, /* VPMULLWZ256rr */ }, { /* 7662 */ 768, /* VPMULLWZ256rrk */ }, { /* 7663 */ 769, /* VPMULLWZ256rrkz */ }, { /* 7664 */ 325, /* VPMULLWZrm */ }, { /* 7665 */ 770, /* VPMULLWZrmk */ }, { /* 7666 */ 771, /* VPMULLWZrmkz */ }, { /* 7667 */ 331, /* VPMULLWZrr */ }, { /* 7668 */ 772, /* VPMULLWZrrk */ }, { /* 7669 */ 773, /* VPMULLWZrrkz */ }, { /* 7670 */ 334, /* VPMULLWrm */ }, { /* 7671 */ 335, /* VPMULLWrr */ }, { /* 7672 */ 302, /* VPMULUDQYrm */ }, { /* 7673 */ 303, /* VPMULUDQYrr */ }, { /* 7674 */ 325, /* VPMULUDQZrm */ }, { /* 7675 */ 759, /* VPMULUDQZrmb */ }, { /* 7676 */ 761, /* VPMULUDQZrmbk */ }, { /* 7677 */ 761, /* VPMULUDQZrmbkz */ }, { /* 7678 */ 330, /* VPMULUDQZrmk */ }, { /* 7679 */ 330, /* VPMULUDQZrmkz */ }, { /* 7680 */ 331, /* VPMULUDQZrr */ }, { /* 7681 */ 333, /* VPMULUDQZrrk */ }, { /* 7682 */ 333, /* VPMULUDQZrrkz */ }, { /* 7683 */ 334, /* VPMULUDQrm */ }, { /* 7684 */ 335, /* VPMULUDQrr */ }, { /* 7685 */ 304, /* VPORDZ128rm */ }, { /* 7686 */ 744, /* VPORDZ128rmb */ }, { /* 7687 */ 745, /* VPORDZ128rmbk */ }, { /* 7688 */ 746, /* VPORDZ128rmbkz */ }, { /* 7689 */ 339, /* VPORDZ128rmk */ }, { /* 7690 */ 340, /* VPORDZ128rmkz */ }, { /* 7691 */ 310, /* VPORDZ128rr */ }, { /* 7692 */ 341, /* VPORDZ128rrk */ }, { /* 7693 */ 342, /* VPORDZ128rrkz */ }, { /* 7694 */ 313, /* VPORDZ256rm */ }, { /* 7695 */ 747, /* VPORDZ256rmb */ }, { /* 7696 */ 748, /* VPORDZ256rmbk */ }, { /* 7697 */ 749, /* VPORDZ256rmbkz */ }, { /* 7698 */ 346, /* VPORDZ256rmk */ }, { /* 7699 */ 347, /* VPORDZ256rmkz */ }, { /* 7700 */ 319, /* VPORDZ256rr */ }, { /* 7701 */ 348, /* VPORDZ256rrk */ }, { /* 7702 */ 349, /* VPORDZ256rrkz */ }, { /* 7703 */ 325, /* VPORDZrm */ }, { /* 7704 */ 750, /* VPORDZrmb */ }, { /* 7705 */ 751, /* VPORDZrmbk */ }, { /* 7706 */ 752, /* VPORDZrmbkz */ }, { /* 7707 */ 356, /* VPORDZrmk */ }, { /* 7708 */ 357, /* VPORDZrmkz */ }, { /* 7709 */ 331, /* VPORDZrr */ }, { /* 7710 */ 358, /* VPORDZrrk */ }, { /* 7711 */ 359, /* VPORDZrrkz */ }, { /* 7712 */ 304, /* VPORQZ128rm */ }, { /* 7713 */ 753, /* VPORQZ128rmb */ }, { /* 7714 */ 754, /* VPORQZ128rmbk */ }, { /* 7715 */ 755, /* VPORQZ128rmbkz */ }, { /* 7716 */ 308, /* VPORQZ128rmk */ }, { /* 7717 */ 309, /* VPORQZ128rmkz */ }, { /* 7718 */ 310, /* VPORQZ128rr */ }, { /* 7719 */ 311, /* VPORQZ128rrk */ }, { /* 7720 */ 312, /* VPORQZ128rrkz */ }, { /* 7721 */ 313, /* VPORQZ256rm */ }, { /* 7722 */ 756, /* VPORQZ256rmb */ }, { /* 7723 */ 757, /* VPORQZ256rmbk */ }, { /* 7724 */ 758, /* VPORQZ256rmbkz */ }, { /* 7725 */ 317, /* VPORQZ256rmk */ }, { /* 7726 */ 318, /* VPORQZ256rmkz */ }, { /* 7727 */ 319, /* VPORQZ256rr */ }, { /* 7728 */ 320, /* VPORQZ256rrk */ }, { /* 7729 */ 321, /* VPORQZ256rrkz */ }, { /* 7730 */ 325, /* VPORQZrm */ }, { /* 7731 */ 759, /* VPORQZrmb */ }, { /* 7732 */ 760, /* VPORQZrmbk */ }, { /* 7733 */ 761, /* VPORQZrmbkz */ }, { /* 7734 */ 329, /* VPORQZrmk */ }, { /* 7735 */ 330, /* VPORQZrmkz */ }, { /* 7736 */ 331, /* VPORQZrr */ }, { /* 7737 */ 332, /* VPORQZrrk */ }, { /* 7738 */ 333, /* VPORQZrrkz */ }, { /* 7739 */ 302, /* VPORYrm */ }, { /* 7740 */ 303, /* VPORYrr */ }, { /* 7741 */ 334, /* VPORrm */ }, { /* 7742 */ 335, /* VPORrr */ }, { /* 7743 */ 394, /* VPPERMmr */ }, { /* 7744 */ 579, /* VPPERMrm */ }, { /* 7745 */ 395, /* VPPERMrr */ }, { /* 7746 */ 986, /* VPROTBmi */ }, { /* 7747 */ 987, /* VPROTBmr */ }, { /* 7748 */ 988, /* VPROTBri */ }, { /* 7749 */ 334, /* VPROTBrm */ }, { /* 7750 */ 989, /* VPROTBrr */ }, { /* 7751 */ 986, /* VPROTDmi */ }, { /* 7752 */ 987, /* VPROTDmr */ }, { /* 7753 */ 988, /* VPROTDri */ }, { /* 7754 */ 334, /* VPROTDrm */ }, { /* 7755 */ 989, /* VPROTDrr */ }, { /* 7756 */ 986, /* VPROTQmi */ }, { /* 7757 */ 987, /* VPROTQmr */ }, { /* 7758 */ 988, /* VPROTQri */ }, { /* 7759 */ 334, /* VPROTQrm */ }, { /* 7760 */ 989, /* VPROTQrr */ }, { /* 7761 */ 986, /* VPROTWmi */ }, { /* 7762 */ 987, /* VPROTWmr */ }, { /* 7763 */ 988, /* VPROTWri */ }, { /* 7764 */ 334, /* VPROTWrm */ }, { /* 7765 */ 989, /* VPROTWrr */ }, { /* 7766 */ 302, /* VPSADBWYrm */ }, { /* 7767 */ 303, /* VPSADBWYrr */ }, { /* 7768 */ 334, /* VPSADBWrm */ }, { /* 7769 */ 335, /* VPSADBWrr */ }, { /* 7770 */ 990, /* VPSCATTERDDZmr */ }, { /* 7771 */ 991, /* VPSCATTERDQZmr */ }, { /* 7772 */ 992, /* VPSCATTERQDZmr */ }, { /* 7773 */ 991, /* VPSCATTERQQZmr */ }, { /* 7774 */ 987, /* VPSHABmr */ }, { /* 7775 */ 334, /* VPSHABrm */ }, { /* 7776 */ 989, /* VPSHABrr */ }, { /* 7777 */ 987, /* VPSHADmr */ }, { /* 7778 */ 334, /* VPSHADrm */ }, { /* 7779 */ 989, /* VPSHADrr */ }, { /* 7780 */ 987, /* VPSHAQmr */ }, { /* 7781 */ 334, /* VPSHAQrm */ }, { /* 7782 */ 989, /* VPSHAQrr */ }, { /* 7783 */ 987, /* VPSHAWmr */ }, { /* 7784 */ 334, /* VPSHAWrm */ }, { /* 7785 */ 989, /* VPSHAWrr */ }, { /* 7786 */ 987, /* VPSHLBmr */ }, { /* 7787 */ 334, /* VPSHLBrm */ }, { /* 7788 */ 989, /* VPSHLBrr */ }, { /* 7789 */ 987, /* VPSHLDmr */ }, { /* 7790 */ 334, /* VPSHLDrm */ }, { /* 7791 */ 989, /* VPSHLDrr */ }, { /* 7792 */ 987, /* VPSHLQmr */ }, { /* 7793 */ 334, /* VPSHLQrm */ }, { /* 7794 */ 989, /* VPSHLQrr */ }, { /* 7795 */ 987, /* VPSHLWmr */ }, { /* 7796 */ 334, /* VPSHLWrm */ }, { /* 7797 */ 989, /* VPSHLWrr */ }, { /* 7798 */ 302, /* VPSHUFBYrm */ }, { /* 7799 */ 303, /* VPSHUFBYrr */ }, { /* 7800 */ 334, /* VPSHUFBrm */ }, { /* 7801 */ 335, /* VPSHUFBrr */ }, { /* 7802 */ 941, /* VPSHUFDYmi */ }, { /* 7803 */ 942, /* VPSHUFDYri */ }, { /* 7804 */ 943, /* VPSHUFDZmi */ }, { /* 7805 */ 944, /* VPSHUFDZri */ }, { /* 7806 */ 46, /* VPSHUFDmi */ }, { /* 7807 */ 47, /* VPSHUFDri */ }, { /* 7808 */ 941, /* VPSHUFHWYmi */ }, { /* 7809 */ 942, /* VPSHUFHWYri */ }, { /* 7810 */ 46, /* VPSHUFHWmi */ }, { /* 7811 */ 47, /* VPSHUFHWri */ }, { /* 7812 */ 941, /* VPSHUFLWYmi */ }, { /* 7813 */ 942, /* VPSHUFLWYri */ }, { /* 7814 */ 46, /* VPSHUFLWmi */ }, { /* 7815 */ 47, /* VPSHUFLWri */ }, { /* 7816 */ 302, /* VPSIGNBYrm */ }, { /* 7817 */ 303, /* VPSIGNBYrr */ }, { /* 7818 */ 334, /* VPSIGNBrm */ }, { /* 7819 */ 335, /* VPSIGNBrr */ }, { /* 7820 */ 302, /* VPSIGNDYrm */ }, { /* 7821 */ 303, /* VPSIGNDYrr */ }, { /* 7822 */ 334, /* VPSIGNDrm */ }, { /* 7823 */ 335, /* VPSIGNDrr */ }, { /* 7824 */ 302, /* VPSIGNWYrm */ }, { /* 7825 */ 303, /* VPSIGNWYrr */ }, { /* 7826 */ 334, /* VPSIGNWrm */ }, { /* 7827 */ 335, /* VPSIGNWrr */ }, { /* 7828 */ 993, /* VPSLLDQYri */ }, { /* 7829 */ 994, /* VPSLLDQri */ }, { /* 7830 */ 993, /* VPSLLDYri */ }, { /* 7831 */ 995, /* VPSLLDYrm */ }, { /* 7832 */ 996, /* VPSLLDYrr */ }, { /* 7833 */ 997, /* VPSLLDZmi */ }, { /* 7834 */ 998, /* VPSLLDZmik */ }, { /* 7835 */ 999, /* VPSLLDZmikz */ }, { /* 7836 */ 1000, /* VPSLLDZri */ }, { /* 7837 */ 1001, /* VPSLLDZrik */ }, { /* 7838 */ 1002, /* VPSLLDZrikz */ }, { /* 7839 */ 1003, /* VPSLLDZrm */ }, { /* 7840 */ 1004, /* VPSLLDZrmk */ }, { /* 7841 */ 1005, /* VPSLLDZrmkz */ }, { /* 7842 */ 1006, /* VPSLLDZrr */ }, { /* 7843 */ 1007, /* VPSLLDZrrk */ }, { /* 7844 */ 1008, /* VPSLLDZrrkz */ }, { /* 7845 */ 994, /* VPSLLDri */ }, { /* 7846 */ 334, /* VPSLLDrm */ }, { /* 7847 */ 335, /* VPSLLDrr */ }, { /* 7848 */ 993, /* VPSLLQYri */ }, { /* 7849 */ 995, /* VPSLLQYrm */ }, { /* 7850 */ 996, /* VPSLLQYrr */ }, { /* 7851 */ 997, /* VPSLLQZmi */ }, { /* 7852 */ 1009, /* VPSLLQZmik */ }, { /* 7853 */ 1010, /* VPSLLQZmikz */ }, { /* 7854 */ 1000, /* VPSLLQZri */ }, { /* 7855 */ 1011, /* VPSLLQZrik */ }, { /* 7856 */ 1012, /* VPSLLQZrikz */ }, { /* 7857 */ 1003, /* VPSLLQZrm */ }, { /* 7858 */ 1013, /* VPSLLQZrmk */ }, { /* 7859 */ 1014, /* VPSLLQZrmkz */ }, { /* 7860 */ 1006, /* VPSLLQZrr */ }, { /* 7861 */ 1015, /* VPSLLQZrrk */ }, { /* 7862 */ 1016, /* VPSLLQZrrkz */ }, { /* 7863 */ 994, /* VPSLLQri */ }, { /* 7864 */ 334, /* VPSLLQrm */ }, { /* 7865 */ 335, /* VPSLLQrr */ }, { /* 7866 */ 302, /* VPSLLVDYrm */ }, { /* 7867 */ 303, /* VPSLLVDYrr */ }, { /* 7868 */ 1017, /* VPSLLVDZrm */ }, { /* 7869 */ 1018, /* VPSLLVDZrmk */ }, { /* 7870 */ 1019, /* VPSLLVDZrmkz */ }, { /* 7871 */ 1020, /* VPSLLVDZrr */ }, { /* 7872 */ 1021, /* VPSLLVDZrrk */ }, { /* 7873 */ 1022, /* VPSLLVDZrrkz */ }, { /* 7874 */ 334, /* VPSLLVDrm */ }, { /* 7875 */ 335, /* VPSLLVDrr */ }, { /* 7876 */ 302, /* VPSLLVQYrm */ }, { /* 7877 */ 303, /* VPSLLVQYrr */ }, { /* 7878 */ 1017, /* VPSLLVQZrm */ }, { /* 7879 */ 1023, /* VPSLLVQZrmk */ }, { /* 7880 */ 1024, /* VPSLLVQZrmkz */ }, { /* 7881 */ 1020, /* VPSLLVQZrr */ }, { /* 7882 */ 1025, /* VPSLLVQZrrk */ }, { /* 7883 */ 1026, /* VPSLLVQZrrkz */ }, { /* 7884 */ 334, /* VPSLLVQrm */ }, { /* 7885 */ 335, /* VPSLLVQrr */ }, { /* 7886 */ 993, /* VPSLLWYri */ }, { /* 7887 */ 995, /* VPSLLWYrm */ }, { /* 7888 */ 996, /* VPSLLWYrr */ }, { /* 7889 */ 994, /* VPSLLWri */ }, { /* 7890 */ 334, /* VPSLLWrm */ }, { /* 7891 */ 335, /* VPSLLWrr */ }, { /* 7892 */ 993, /* VPSRADYri */ }, { /* 7893 */ 995, /* VPSRADYrm */ }, { /* 7894 */ 996, /* VPSRADYrr */ }, { /* 7895 */ 997, /* VPSRADZmi */ }, { /* 7896 */ 998, /* VPSRADZmik */ }, { /* 7897 */ 999, /* VPSRADZmikz */ }, { /* 7898 */ 1000, /* VPSRADZri */ }, { /* 7899 */ 1001, /* VPSRADZrik */ }, { /* 7900 */ 1002, /* VPSRADZrikz */ }, { /* 7901 */ 1003, /* VPSRADZrm */ }, { /* 7902 */ 1004, /* VPSRADZrmk */ }, { /* 7903 */ 1005, /* VPSRADZrmkz */ }, { /* 7904 */ 1006, /* VPSRADZrr */ }, { /* 7905 */ 1007, /* VPSRADZrrk */ }, { /* 7906 */ 1008, /* VPSRADZrrkz */ }, { /* 7907 */ 994, /* VPSRADri */ }, { /* 7908 */ 334, /* VPSRADrm */ }, { /* 7909 */ 335, /* VPSRADrr */ }, { /* 7910 */ 997, /* VPSRAQZmi */ }, { /* 7911 */ 1009, /* VPSRAQZmik */ }, { /* 7912 */ 1010, /* VPSRAQZmikz */ }, { /* 7913 */ 1000, /* VPSRAQZri */ }, { /* 7914 */ 1011, /* VPSRAQZrik */ }, { /* 7915 */ 1012, /* VPSRAQZrikz */ }, { /* 7916 */ 1003, /* VPSRAQZrm */ }, { /* 7917 */ 1013, /* VPSRAQZrmk */ }, { /* 7918 */ 1014, /* VPSRAQZrmkz */ }, { /* 7919 */ 1006, /* VPSRAQZrr */ }, { /* 7920 */ 1015, /* VPSRAQZrrk */ }, { /* 7921 */ 1016, /* VPSRAQZrrkz */ }, { /* 7922 */ 302, /* VPSRAVDYrm */ }, { /* 7923 */ 303, /* VPSRAVDYrr */ }, { /* 7924 */ 1017, /* VPSRAVDZrm */ }, { /* 7925 */ 1018, /* VPSRAVDZrmk */ }, { /* 7926 */ 1019, /* VPSRAVDZrmkz */ }, { /* 7927 */ 1020, /* VPSRAVDZrr */ }, { /* 7928 */ 1021, /* VPSRAVDZrrk */ }, { /* 7929 */ 1022, /* VPSRAVDZrrkz */ }, { /* 7930 */ 334, /* VPSRAVDrm */ }, { /* 7931 */ 335, /* VPSRAVDrr */ }, { /* 7932 */ 1017, /* VPSRAVQZrm */ }, { /* 7933 */ 1023, /* VPSRAVQZrmk */ }, { /* 7934 */ 1024, /* VPSRAVQZrmkz */ }, { /* 7935 */ 1020, /* VPSRAVQZrr */ }, { /* 7936 */ 1025, /* VPSRAVQZrrk */ }, { /* 7937 */ 1026, /* VPSRAVQZrrkz */ }, { /* 7938 */ 993, /* VPSRAWYri */ }, { /* 7939 */ 995, /* VPSRAWYrm */ }, { /* 7940 */ 996, /* VPSRAWYrr */ }, { /* 7941 */ 994, /* VPSRAWri */ }, { /* 7942 */ 334, /* VPSRAWrm */ }, { /* 7943 */ 335, /* VPSRAWrr */ }, { /* 7944 */ 993, /* VPSRLDQYri */ }, { /* 7945 */ 994, /* VPSRLDQri */ }, { /* 7946 */ 993, /* VPSRLDYri */ }, { /* 7947 */ 995, /* VPSRLDYrm */ }, { /* 7948 */ 996, /* VPSRLDYrr */ }, { /* 7949 */ 997, /* VPSRLDZmi */ }, { /* 7950 */ 998, /* VPSRLDZmik */ }, { /* 7951 */ 999, /* VPSRLDZmikz */ }, { /* 7952 */ 1000, /* VPSRLDZri */ }, { /* 7953 */ 1001, /* VPSRLDZrik */ }, { /* 7954 */ 1002, /* VPSRLDZrikz */ }, { /* 7955 */ 1003, /* VPSRLDZrm */ }, { /* 7956 */ 1004, /* VPSRLDZrmk */ }, { /* 7957 */ 1005, /* VPSRLDZrmkz */ }, { /* 7958 */ 1006, /* VPSRLDZrr */ }, { /* 7959 */ 1007, /* VPSRLDZrrk */ }, { /* 7960 */ 1008, /* VPSRLDZrrkz */ }, { /* 7961 */ 994, /* VPSRLDri */ }, { /* 7962 */ 334, /* VPSRLDrm */ }, { /* 7963 */ 335, /* VPSRLDrr */ }, { /* 7964 */ 993, /* VPSRLQYri */ }, { /* 7965 */ 995, /* VPSRLQYrm */ }, { /* 7966 */ 996, /* VPSRLQYrr */ }, { /* 7967 */ 997, /* VPSRLQZmi */ }, { /* 7968 */ 1009, /* VPSRLQZmik */ }, { /* 7969 */ 1010, /* VPSRLQZmikz */ }, { /* 7970 */ 1000, /* VPSRLQZri */ }, { /* 7971 */ 1011, /* VPSRLQZrik */ }, { /* 7972 */ 1012, /* VPSRLQZrikz */ }, { /* 7973 */ 1003, /* VPSRLQZrm */ }, { /* 7974 */ 1013, /* VPSRLQZrmk */ }, { /* 7975 */ 1014, /* VPSRLQZrmkz */ }, { /* 7976 */ 1006, /* VPSRLQZrr */ }, { /* 7977 */ 1015, /* VPSRLQZrrk */ }, { /* 7978 */ 1016, /* VPSRLQZrrkz */ }, { /* 7979 */ 994, /* VPSRLQri */ }, { /* 7980 */ 334, /* VPSRLQrm */ }, { /* 7981 */ 335, /* VPSRLQrr */ }, { /* 7982 */ 302, /* VPSRLVDYrm */ }, { /* 7983 */ 303, /* VPSRLVDYrr */ }, { /* 7984 */ 1017, /* VPSRLVDZrm */ }, { /* 7985 */ 1018, /* VPSRLVDZrmk */ }, { /* 7986 */ 1019, /* VPSRLVDZrmkz */ }, { /* 7987 */ 1020, /* VPSRLVDZrr */ }, { /* 7988 */ 1021, /* VPSRLVDZrrk */ }, { /* 7989 */ 1022, /* VPSRLVDZrrkz */ }, { /* 7990 */ 334, /* VPSRLVDrm */ }, { /* 7991 */ 335, /* VPSRLVDrr */ }, { /* 7992 */ 302, /* VPSRLVQYrm */ }, { /* 7993 */ 303, /* VPSRLVQYrr */ }, { /* 7994 */ 1017, /* VPSRLVQZrm */ }, { /* 7995 */ 1023, /* VPSRLVQZrmk */ }, { /* 7996 */ 1024, /* VPSRLVQZrmkz */ }, { /* 7997 */ 1020, /* VPSRLVQZrr */ }, { /* 7998 */ 1025, /* VPSRLVQZrrk */ }, { /* 7999 */ 1026, /* VPSRLVQZrrkz */ }, { /* 8000 */ 334, /* VPSRLVQrm */ }, { /* 8001 */ 335, /* VPSRLVQrr */ }, { /* 8002 */ 993, /* VPSRLWYri */ }, { /* 8003 */ 995, /* VPSRLWYrm */ }, { /* 8004 */ 996, /* VPSRLWYrr */ }, { /* 8005 */ 994, /* VPSRLWri */ }, { /* 8006 */ 334, /* VPSRLWrm */ }, { /* 8007 */ 335, /* VPSRLWrr */ }, { /* 8008 */ 302, /* VPSUBBYrm */ }, { /* 8009 */ 303, /* VPSUBBYrr */ }, { /* 8010 */ 304, /* VPSUBBZ128rm */ }, { /* 8011 */ 732, /* VPSUBBZ128rmk */ }, { /* 8012 */ 733, /* VPSUBBZ128rmkz */ }, { /* 8013 */ 310, /* VPSUBBZ128rr */ }, { /* 8014 */ 734, /* VPSUBBZ128rrk */ }, { /* 8015 */ 735, /* VPSUBBZ128rrkz */ }, { /* 8016 */ 313, /* VPSUBBZ256rm */ }, { /* 8017 */ 736, /* VPSUBBZ256rmk */ }, { /* 8018 */ 737, /* VPSUBBZ256rmkz */ }, { /* 8019 */ 319, /* VPSUBBZ256rr */ }, { /* 8020 */ 738, /* VPSUBBZ256rrk */ }, { /* 8021 */ 739, /* VPSUBBZ256rrkz */ }, { /* 8022 */ 325, /* VPSUBBZrm */ }, { /* 8023 */ 740, /* VPSUBBZrmk */ }, { /* 8024 */ 741, /* VPSUBBZrmkz */ }, { /* 8025 */ 331, /* VPSUBBZrr */ }, { /* 8026 */ 742, /* VPSUBBZrrk */ }, { /* 8027 */ 743, /* VPSUBBZrrkz */ }, { /* 8028 */ 334, /* VPSUBBrm */ }, { /* 8029 */ 335, /* VPSUBBrr */ }, { /* 8030 */ 302, /* VPSUBDYrm */ }, { /* 8031 */ 303, /* VPSUBDYrr */ }, { /* 8032 */ 304, /* VPSUBDZ128rm */ }, { /* 8033 */ 744, /* VPSUBDZ128rmb */ }, { /* 8034 */ 745, /* VPSUBDZ128rmbk */ }, { /* 8035 */ 746, /* VPSUBDZ128rmbkz */ }, { /* 8036 */ 339, /* VPSUBDZ128rmk */ }, { /* 8037 */ 340, /* VPSUBDZ128rmkz */ }, { /* 8038 */ 310, /* VPSUBDZ128rr */ }, { /* 8039 */ 341, /* VPSUBDZ128rrk */ }, { /* 8040 */ 342, /* VPSUBDZ128rrkz */ }, { /* 8041 */ 313, /* VPSUBDZ256rm */ }, { /* 8042 */ 747, /* VPSUBDZ256rmb */ }, { /* 8043 */ 748, /* VPSUBDZ256rmbk */ }, { /* 8044 */ 749, /* VPSUBDZ256rmbkz */ }, { /* 8045 */ 346, /* VPSUBDZ256rmk */ }, { /* 8046 */ 347, /* VPSUBDZ256rmkz */ }, { /* 8047 */ 319, /* VPSUBDZ256rr */ }, { /* 8048 */ 348, /* VPSUBDZ256rrk */ }, { /* 8049 */ 349, /* VPSUBDZ256rrkz */ }, { /* 8050 */ 325, /* VPSUBDZrm */ }, { /* 8051 */ 750, /* VPSUBDZrmb */ }, { /* 8052 */ 751, /* VPSUBDZrmbk */ }, { /* 8053 */ 752, /* VPSUBDZrmbkz */ }, { /* 8054 */ 356, /* VPSUBDZrmk */ }, { /* 8055 */ 357, /* VPSUBDZrmkz */ }, { /* 8056 */ 331, /* VPSUBDZrr */ }, { /* 8057 */ 358, /* VPSUBDZrrk */ }, { /* 8058 */ 359, /* VPSUBDZrrkz */ }, { /* 8059 */ 334, /* VPSUBDrm */ }, { /* 8060 */ 335, /* VPSUBDrr */ }, { /* 8061 */ 302, /* VPSUBQYrm */ }, { /* 8062 */ 303, /* VPSUBQYrr */ }, { /* 8063 */ 304, /* VPSUBQZ128rm */ }, { /* 8064 */ 753, /* VPSUBQZ128rmb */ }, { /* 8065 */ 754, /* VPSUBQZ128rmbk */ }, { /* 8066 */ 755, /* VPSUBQZ128rmbkz */ }, { /* 8067 */ 308, /* VPSUBQZ128rmk */ }, { /* 8068 */ 309, /* VPSUBQZ128rmkz */ }, { /* 8069 */ 310, /* VPSUBQZ128rr */ }, { /* 8070 */ 311, /* VPSUBQZ128rrk */ }, { /* 8071 */ 312, /* VPSUBQZ128rrkz */ }, { /* 8072 */ 313, /* VPSUBQZ256rm */ }, { /* 8073 */ 756, /* VPSUBQZ256rmb */ }, { /* 8074 */ 757, /* VPSUBQZ256rmbk */ }, { /* 8075 */ 758, /* VPSUBQZ256rmbkz */ }, { /* 8076 */ 317, /* VPSUBQZ256rmk */ }, { /* 8077 */ 318, /* VPSUBQZ256rmkz */ }, { /* 8078 */ 319, /* VPSUBQZ256rr */ }, { /* 8079 */ 320, /* VPSUBQZ256rrk */ }, { /* 8080 */ 321, /* VPSUBQZ256rrkz */ }, { /* 8081 */ 325, /* VPSUBQZrm */ }, { /* 8082 */ 759, /* VPSUBQZrmb */ }, { /* 8083 */ 760, /* VPSUBQZrmbk */ }, { /* 8084 */ 761, /* VPSUBQZrmbkz */ }, { /* 8085 */ 329, /* VPSUBQZrmk */ }, { /* 8086 */ 330, /* VPSUBQZrmkz */ }, { /* 8087 */ 331, /* VPSUBQZrr */ }, { /* 8088 */ 332, /* VPSUBQZrrk */ }, { /* 8089 */ 333, /* VPSUBQZrrkz */ }, { /* 8090 */ 334, /* VPSUBQrm */ }, { /* 8091 */ 335, /* VPSUBQrr */ }, { /* 8092 */ 302, /* VPSUBSBYrm */ }, { /* 8093 */ 303, /* VPSUBSBYrr */ }, { /* 8094 */ 334, /* VPSUBSBrm */ }, { /* 8095 */ 335, /* VPSUBSBrr */ }, { /* 8096 */ 302, /* VPSUBSWYrm */ }, { /* 8097 */ 303, /* VPSUBSWYrr */ }, { /* 8098 */ 334, /* VPSUBSWrm */ }, { /* 8099 */ 335, /* VPSUBSWrr */ }, { /* 8100 */ 302, /* VPSUBUSBYrm */ }, { /* 8101 */ 303, /* VPSUBUSBYrr */ }, { /* 8102 */ 334, /* VPSUBUSBrm */ }, { /* 8103 */ 335, /* VPSUBUSBrr */ }, { /* 8104 */ 302, /* VPSUBUSWYrm */ }, { /* 8105 */ 303, /* VPSUBUSWYrr */ }, { /* 8106 */ 334, /* VPSUBUSWrm */ }, { /* 8107 */ 335, /* VPSUBUSWrr */ }, { /* 8108 */ 302, /* VPSUBWYrm */ }, { /* 8109 */ 303, /* VPSUBWYrr */ }, { /* 8110 */ 304, /* VPSUBWZ128rm */ }, { /* 8111 */ 762, /* VPSUBWZ128rmk */ }, { /* 8112 */ 763, /* VPSUBWZ128rmkz */ }, { /* 8113 */ 310, /* VPSUBWZ128rr */ }, { /* 8114 */ 764, /* VPSUBWZ128rrk */ }, { /* 8115 */ 765, /* VPSUBWZ128rrkz */ }, { /* 8116 */ 313, /* VPSUBWZ256rm */ }, { /* 8117 */ 766, /* VPSUBWZ256rmk */ }, { /* 8118 */ 767, /* VPSUBWZ256rmkz */ }, { /* 8119 */ 319, /* VPSUBWZ256rr */ }, { /* 8120 */ 768, /* VPSUBWZ256rrk */ }, { /* 8121 */ 769, /* VPSUBWZ256rrkz */ }, { /* 8122 */ 325, /* VPSUBWZrm */ }, { /* 8123 */ 770, /* VPSUBWZrmk */ }, { /* 8124 */ 771, /* VPSUBWZrmkz */ }, { /* 8125 */ 331, /* VPSUBWZrr */ }, { /* 8126 */ 772, /* VPSUBWZrrk */ }, { /* 8127 */ 773, /* VPSUBWZrrkz */ }, { /* 8128 */ 334, /* VPSUBWrm */ }, { /* 8129 */ 335, /* VPSUBWrr */ }, { /* 8130 */ 865, /* VPTESTMDZrm */ }, { /* 8131 */ 869, /* VPTESTMDZrr */ }, { /* 8132 */ 883, /* VPTESTMQZrm */ }, { /* 8133 */ 887, /* VPTESTMQZrr */ }, { /* 8134 */ 865, /* VPTESTNMDZrm */ }, { /* 8135 */ 869, /* VPTESTNMDZrr */ }, { /* 8136 */ 883, /* VPTESTNMQZrm */ }, { /* 8137 */ 887, /* VPTESTNMQZrr */ }, { /* 8138 */ 475, /* VPTESTYrm */ }, { /* 8139 */ 476, /* VPTESTYrr */ }, { /* 8140 */ 44, /* VPTESTrm */ }, { /* 8141 */ 45, /* VPTESTrr */ }, { /* 8142 */ 302, /* VPUNPCKHBWYrm */ }, { /* 8143 */ 303, /* VPUNPCKHBWYrr */ }, { /* 8144 */ 334, /* VPUNPCKHBWrm */ }, { /* 8145 */ 335, /* VPUNPCKHBWrr */ }, { /* 8146 */ 302, /* VPUNPCKHDQYrm */ }, { /* 8147 */ 303, /* VPUNPCKHDQYrr */ }, { /* 8148 */ 325, /* VPUNPCKHDQZrm */ }, { /* 8149 */ 331, /* VPUNPCKHDQZrr */ }, { /* 8150 */ 334, /* VPUNPCKHDQrm */ }, { /* 8151 */ 335, /* VPUNPCKHDQrr */ }, { /* 8152 */ 302, /* VPUNPCKHQDQYrm */ }, { /* 8153 */ 303, /* VPUNPCKHQDQYrr */ }, { /* 8154 */ 325, /* VPUNPCKHQDQZrm */ }, { /* 8155 */ 331, /* VPUNPCKHQDQZrr */ }, { /* 8156 */ 334, /* VPUNPCKHQDQrm */ }, { /* 8157 */ 335, /* VPUNPCKHQDQrr */ }, { /* 8158 */ 302, /* VPUNPCKHWDYrm */ }, { /* 8159 */ 303, /* VPUNPCKHWDYrr */ }, { /* 8160 */ 334, /* VPUNPCKHWDrm */ }, { /* 8161 */ 335, /* VPUNPCKHWDrr */ }, { /* 8162 */ 302, /* VPUNPCKLBWYrm */ }, { /* 8163 */ 303, /* VPUNPCKLBWYrr */ }, { /* 8164 */ 334, /* VPUNPCKLBWrm */ }, { /* 8165 */ 335, /* VPUNPCKLBWrr */ }, { /* 8166 */ 302, /* VPUNPCKLDQYrm */ }, { /* 8167 */ 303, /* VPUNPCKLDQYrr */ }, { /* 8168 */ 325, /* VPUNPCKLDQZrm */ }, { /* 8169 */ 331, /* VPUNPCKLDQZrr */ }, { /* 8170 */ 334, /* VPUNPCKLDQrm */ }, { /* 8171 */ 335, /* VPUNPCKLDQrr */ }, { /* 8172 */ 302, /* VPUNPCKLQDQYrm */ }, { /* 8173 */ 303, /* VPUNPCKLQDQYrr */ }, { /* 8174 */ 325, /* VPUNPCKLQDQZrm */ }, { /* 8175 */ 331, /* VPUNPCKLQDQZrr */ }, { /* 8176 */ 334, /* VPUNPCKLQDQrm */ }, { /* 8177 */ 335, /* VPUNPCKLQDQrr */ }, { /* 8178 */ 302, /* VPUNPCKLWDYrm */ }, { /* 8179 */ 303, /* VPUNPCKLWDYrr */ }, { /* 8180 */ 334, /* VPUNPCKLWDrm */ }, { /* 8181 */ 335, /* VPUNPCKLWDrr */ }, { /* 8182 */ 304, /* VPXORDZ128rm */ }, { /* 8183 */ 744, /* VPXORDZ128rmb */ }, { /* 8184 */ 745, /* VPXORDZ128rmbk */ }, { /* 8185 */ 746, /* VPXORDZ128rmbkz */ }, { /* 8186 */ 339, /* VPXORDZ128rmk */ }, { /* 8187 */ 340, /* VPXORDZ128rmkz */ }, { /* 8188 */ 310, /* VPXORDZ128rr */ }, { /* 8189 */ 341, /* VPXORDZ128rrk */ }, { /* 8190 */ 342, /* VPXORDZ128rrkz */ }, { /* 8191 */ 313, /* VPXORDZ256rm */ }, { /* 8192 */ 747, /* VPXORDZ256rmb */ }, { /* 8193 */ 748, /* VPXORDZ256rmbk */ }, { /* 8194 */ 749, /* VPXORDZ256rmbkz */ }, { /* 8195 */ 346, /* VPXORDZ256rmk */ }, { /* 8196 */ 347, /* VPXORDZ256rmkz */ }, { /* 8197 */ 319, /* VPXORDZ256rr */ }, { /* 8198 */ 348, /* VPXORDZ256rrk */ }, { /* 8199 */ 349, /* VPXORDZ256rrkz */ }, { /* 8200 */ 325, /* VPXORDZrm */ }, { /* 8201 */ 750, /* VPXORDZrmb */ }, { /* 8202 */ 751, /* VPXORDZrmbk */ }, { /* 8203 */ 752, /* VPXORDZrmbkz */ }, { /* 8204 */ 356, /* VPXORDZrmk */ }, { /* 8205 */ 357, /* VPXORDZrmkz */ }, { /* 8206 */ 331, /* VPXORDZrr */ }, { /* 8207 */ 358, /* VPXORDZrrk */ }, { /* 8208 */ 359, /* VPXORDZrrkz */ }, { /* 8209 */ 304, /* VPXORQZ128rm */ }, { /* 8210 */ 753, /* VPXORQZ128rmb */ }, { /* 8211 */ 754, /* VPXORQZ128rmbk */ }, { /* 8212 */ 755, /* VPXORQZ128rmbkz */ }, { /* 8213 */ 308, /* VPXORQZ128rmk */ }, { /* 8214 */ 309, /* VPXORQZ128rmkz */ }, { /* 8215 */ 310, /* VPXORQZ128rr */ }, { /* 8216 */ 311, /* VPXORQZ128rrk */ }, { /* 8217 */ 312, /* VPXORQZ128rrkz */ }, { /* 8218 */ 313, /* VPXORQZ256rm */ }, { /* 8219 */ 756, /* VPXORQZ256rmb */ }, { /* 8220 */ 757, /* VPXORQZ256rmbk */ }, { /* 8221 */ 758, /* VPXORQZ256rmbkz */ }, { /* 8222 */ 317, /* VPXORQZ256rmk */ }, { /* 8223 */ 318, /* VPXORQZ256rmkz */ }, { /* 8224 */ 319, /* VPXORQZ256rr */ }, { /* 8225 */ 320, /* VPXORQZ256rrk */ }, { /* 8226 */ 321, /* VPXORQZ256rrkz */ }, { /* 8227 */ 325, /* VPXORQZrm */ }, { /* 8228 */ 759, /* VPXORQZrmb */ }, { /* 8229 */ 760, /* VPXORQZrmbk */ }, { /* 8230 */ 761, /* VPXORQZrmbkz */ }, { /* 8231 */ 329, /* VPXORQZrmk */ }, { /* 8232 */ 330, /* VPXORQZrmkz */ }, { /* 8233 */ 331, /* VPXORQZrr */ }, { /* 8234 */ 332, /* VPXORQZrrk */ }, { /* 8235 */ 333, /* VPXORQZrrkz */ }, { /* 8236 */ 302, /* VPXORYrm */ }, { /* 8237 */ 303, /* VPXORYrr */ }, { /* 8238 */ 334, /* VPXORrm */ }, { /* 8239 */ 335, /* VPXORrr */ }, { /* 8240 */ 637, /* VRCP14PDZ128m */ }, { /* 8241 */ 1027, /* VRCP14PDZ128mb */ }, { /* 8242 */ 1028, /* VRCP14PDZ128mbk */ }, { /* 8243 */ 1029, /* VRCP14PDZ128mbkz */ }, { /* 8244 */ 638, /* VRCP14PDZ128mk */ }, { /* 8245 */ 639, /* VRCP14PDZ128mkz */ }, { /* 8246 */ 640, /* VRCP14PDZ128r */ }, { /* 8247 */ 545, /* VRCP14PDZ128rk */ }, { /* 8248 */ 546, /* VRCP14PDZ128rkz */ }, { /* 8249 */ 644, /* VRCP14PDZ256m */ }, { /* 8250 */ 403, /* VRCP14PDZ256mb */ }, { /* 8251 */ 404, /* VRCP14PDZ256mbk */ }, { /* 8252 */ 405, /* VRCP14PDZ256mbkz */ }, { /* 8253 */ 645, /* VRCP14PDZ256mk */ }, { /* 8254 */ 646, /* VRCP14PDZ256mkz */ }, { /* 8255 */ 647, /* VRCP14PDZ256r */ }, { /* 8256 */ 549, /* VRCP14PDZ256rk */ }, { /* 8257 */ 550, /* VRCP14PDZ256rkz */ }, { /* 8258 */ 477, /* VRCP14PDZm */ }, { /* 8259 */ 409, /* VRCP14PDZmb */ }, { /* 8260 */ 410, /* VRCP14PDZmbk */ }, { /* 8261 */ 411, /* VRCP14PDZmbkz */ }, { /* 8262 */ 528, /* VRCP14PDZmk */ }, { /* 8263 */ 529, /* VRCP14PDZmkz */ }, { /* 8264 */ 478, /* VRCP14PDZr */ }, { /* 8265 */ 533, /* VRCP14PDZrk */ }, { /* 8266 */ 534, /* VRCP14PDZrkz */ }, { /* 8267 */ 637, /* VRCP14PSZ128m */ }, { /* 8268 */ 416, /* VRCP14PSZ128mb */ }, { /* 8269 */ 417, /* VRCP14PSZ128mbk */ }, { /* 8270 */ 418, /* VRCP14PSZ128mbkz */ }, { /* 8271 */ 653, /* VRCP14PSZ128mk */ }, { /* 8272 */ 654, /* VRCP14PSZ128mkz */ }, { /* 8273 */ 640, /* VRCP14PSZ128r */ }, { /* 8274 */ 555, /* VRCP14PSZ128rk */ }, { /* 8275 */ 556, /* VRCP14PSZ128rkz */ }, { /* 8276 */ 644, /* VRCP14PSZ256m */ }, { /* 8277 */ 422, /* VRCP14PSZ256mb */ }, { /* 8278 */ 423, /* VRCP14PSZ256mbk */ }, { /* 8279 */ 424, /* VRCP14PSZ256mbkz */ }, { /* 8280 */ 656, /* VRCP14PSZ256mk */ }, { /* 8281 */ 657, /* VRCP14PSZ256mkz */ }, { /* 8282 */ 647, /* VRCP14PSZ256r */ }, { /* 8283 */ 559, /* VRCP14PSZ256rk */ }, { /* 8284 */ 560, /* VRCP14PSZ256rkz */ }, { /* 8285 */ 477, /* VRCP14PSZm */ }, { /* 8286 */ 428, /* VRCP14PSZmb */ }, { /* 8287 */ 429, /* VRCP14PSZmbk */ }, { /* 8288 */ 430, /* VRCP14PSZmbkz */ }, { /* 8289 */ 537, /* VRCP14PSZmk */ }, { /* 8290 */ 538, /* VRCP14PSZmkz */ }, { /* 8291 */ 478, /* VRCP14PSZr */ }, { /* 8292 */ 541, /* VRCP14PSZrk */ }, { /* 8293 */ 542, /* VRCP14PSZrkz */ }, { /* 8294 */ 1030, /* VRCP14SDrm */ }, { /* 8295 */ 1031, /* VRCP14SDrr */ }, { /* 8296 */ 1032, /* VRCP14SSrm */ }, { /* 8297 */ 1033, /* VRCP14SSrr */ }, { /* 8298 */ 477, /* VRCP28PDm */ }, { /* 8299 */ 525, /* VRCP28PDmb */ }, { /* 8300 */ 526, /* VRCP28PDmbk */ }, { /* 8301 */ 527, /* VRCP28PDmbkz */ }, { /* 8302 */ 528, /* VRCP28PDmk */ }, { /* 8303 */ 529, /* VRCP28PDmkz */ }, { /* 8304 */ 478, /* VRCP28PDr */ }, { /* 8305 */ 530, /* VRCP28PDrb */ }, { /* 8306 */ 531, /* VRCP28PDrbk */ }, { /* 8307 */ 532, /* VRCP28PDrbkz */ }, { /* 8308 */ 533, /* VRCP28PDrk */ }, { /* 8309 */ 534, /* VRCP28PDrkz */ }, { /* 8310 */ 477, /* VRCP28PSm */ }, { /* 8311 */ 525, /* VRCP28PSmb */ }, { /* 8312 */ 535, /* VRCP28PSmbk */ }, { /* 8313 */ 536, /* VRCP28PSmbkz */ }, { /* 8314 */ 537, /* VRCP28PSmk */ }, { /* 8315 */ 538, /* VRCP28PSmkz */ }, { /* 8316 */ 478, /* VRCP28PSr */ }, { /* 8317 */ 530, /* VRCP28PSrb */ }, { /* 8318 */ 539, /* VRCP28PSrbk */ }, { /* 8319 */ 540, /* VRCP28PSrbkz */ }, { /* 8320 */ 541, /* VRCP28PSrk */ }, { /* 8321 */ 542, /* VRCP28PSrkz */ }, { /* 8322 */ 360, /* VRCP28SDm */ }, { /* 8323 */ 361, /* VRCP28SDmk */ }, { /* 8324 */ 362, /* VRCP28SDmkz */ }, { /* 8325 */ 363, /* VRCP28SDr */ }, { /* 8326 */ 363, /* VRCP28SDrb */ }, { /* 8327 */ 364, /* VRCP28SDrbk */ }, { /* 8328 */ 365, /* VRCP28SDrbkz */ }, { /* 8329 */ 364, /* VRCP28SDrk */ }, { /* 8330 */ 365, /* VRCP28SDrkz */ }, { /* 8331 */ 371, /* VRCP28SSm */ }, { /* 8332 */ 372, /* VRCP28SSmk */ }, { /* 8333 */ 373, /* VRCP28SSmkz */ }, { /* 8334 */ 374, /* VRCP28SSr */ }, { /* 8335 */ 374, /* VRCP28SSrb */ }, { /* 8336 */ 375, /* VRCP28SSrbk */ }, { /* 8337 */ 376, /* VRCP28SSrbkz */ }, { /* 8338 */ 375, /* VRCP28SSrk */ }, { /* 8339 */ 376, /* VRCP28SSrkz */ }, { /* 8340 */ 475, /* VRCPPSYm */ }, { /* 8341 */ 0, /* */ }, { /* 8342 */ 476, /* VRCPPSYr */ }, { /* 8343 */ 0, /* */ }, { /* 8344 */ 44, /* VRCPPSm */ }, { /* 8345 */ 0, /* */ }, { /* 8346 */ 45, /* VRCPPSr */ }, { /* 8347 */ 0, /* */ }, { /* 8348 */ 380, /* VRCPSSm */ }, { /* 8349 */ 0, /* */ }, { /* 8350 */ 381, /* VRCPSSr */ }, { /* 8351 */ 943, /* VRNDSCALEPDZm */ }, { /* 8352 */ 944, /* VRNDSCALEPDZr */ }, { /* 8353 */ 943, /* VRNDSCALEPSZm */ }, { /* 8354 */ 944, /* VRNDSCALEPSZr */ }, { /* 8355 */ 1034, /* VRNDSCALESDm */ }, { /* 8356 */ 1035, /* VRNDSCALESDmk */ }, { /* 8357 */ 1036, /* VRNDSCALESDmkz */ }, { /* 8358 */ 1037, /* VRNDSCALESDr */ }, { /* 8359 */ 1037, /* VRNDSCALESDrb */ }, { /* 8360 */ 1038, /* VRNDSCALESDrbk */ }, { /* 8361 */ 1039, /* VRNDSCALESDrbkz */ }, { /* 8362 */ 1038, /* VRNDSCALESDrk */ }, { /* 8363 */ 1039, /* VRNDSCALESDrkz */ }, { /* 8364 */ 1040, /* VRNDSCALESSm */ }, { /* 8365 */ 1041, /* VRNDSCALESSmk */ }, { /* 8366 */ 1042, /* VRNDSCALESSmkz */ }, { /* 8367 */ 1043, /* VRNDSCALESSr */ }, { /* 8368 */ 1043, /* VRNDSCALESSrb */ }, { /* 8369 */ 1044, /* VRNDSCALESSrbk */ }, { /* 8370 */ 1045, /* VRNDSCALESSrbkz */ }, { /* 8371 */ 1044, /* VRNDSCALESSrk */ }, { /* 8372 */ 1045, /* VRNDSCALESSrkz */ }, { /* 8373 */ 46, /* VROUNDPDm */ }, { /* 8374 */ 47, /* VROUNDPDr */ }, { /* 8375 */ 46, /* VROUNDPSm */ }, { /* 8376 */ 47, /* VROUNDPSr */ }, { /* 8377 */ 1046, /* VROUNDSDm */ }, { /* 8378 */ 1047, /* VROUNDSDr */ }, { /* 8379 */ 0, /* */ }, { /* 8380 */ 627, /* VROUNDSSm */ }, { /* 8381 */ 1048, /* VROUNDSSr */ }, { /* 8382 */ 0, /* */ }, { /* 8383 */ 941, /* VROUNDYPDm */ }, { /* 8384 */ 942, /* VROUNDYPDr */ }, { /* 8385 */ 941, /* VROUNDYPSm */ }, { /* 8386 */ 942, /* VROUNDYPSr */ }, { /* 8387 */ 637, /* VRSQRT14PDZ128m */ }, { /* 8388 */ 1027, /* VRSQRT14PDZ128mb */ }, { /* 8389 */ 1028, /* VRSQRT14PDZ128mbk */ }, { /* 8390 */ 1029, /* VRSQRT14PDZ128mbkz */ }, { /* 8391 */ 638, /* VRSQRT14PDZ128mk */ }, { /* 8392 */ 639, /* VRSQRT14PDZ128mkz */ }, { /* 8393 */ 640, /* VRSQRT14PDZ128r */ }, { /* 8394 */ 545, /* VRSQRT14PDZ128rk */ }, { /* 8395 */ 546, /* VRSQRT14PDZ128rkz */ }, { /* 8396 */ 644, /* VRSQRT14PDZ256m */ }, { /* 8397 */ 403, /* VRSQRT14PDZ256mb */ }, { /* 8398 */ 404, /* VRSQRT14PDZ256mbk */ }, { /* 8399 */ 405, /* VRSQRT14PDZ256mbkz */ }, { /* 8400 */ 645, /* VRSQRT14PDZ256mk */ }, { /* 8401 */ 646, /* VRSQRT14PDZ256mkz */ }, { /* 8402 */ 647, /* VRSQRT14PDZ256r */ }, { /* 8403 */ 549, /* VRSQRT14PDZ256rk */ }, { /* 8404 */ 550, /* VRSQRT14PDZ256rkz */ }, { /* 8405 */ 477, /* VRSQRT14PDZm */ }, { /* 8406 */ 409, /* VRSQRT14PDZmb */ }, { /* 8407 */ 410, /* VRSQRT14PDZmbk */ }, { /* 8408 */ 411, /* VRSQRT14PDZmbkz */ }, { /* 8409 */ 528, /* VRSQRT14PDZmk */ }, { /* 8410 */ 529, /* VRSQRT14PDZmkz */ }, { /* 8411 */ 478, /* VRSQRT14PDZr */ }, { /* 8412 */ 533, /* VRSQRT14PDZrk */ }, { /* 8413 */ 534, /* VRSQRT14PDZrkz */ }, { /* 8414 */ 637, /* VRSQRT14PSZ128m */ }, { /* 8415 */ 416, /* VRSQRT14PSZ128mb */ }, { /* 8416 */ 417, /* VRSQRT14PSZ128mbk */ }, { /* 8417 */ 418, /* VRSQRT14PSZ128mbkz */ }, { /* 8418 */ 653, /* VRSQRT14PSZ128mk */ }, { /* 8419 */ 654, /* VRSQRT14PSZ128mkz */ }, { /* 8420 */ 640, /* VRSQRT14PSZ128r */ }, { /* 8421 */ 555, /* VRSQRT14PSZ128rk */ }, { /* 8422 */ 556, /* VRSQRT14PSZ128rkz */ }, { /* 8423 */ 644, /* VRSQRT14PSZ256m */ }, { /* 8424 */ 422, /* VRSQRT14PSZ256mb */ }, { /* 8425 */ 423, /* VRSQRT14PSZ256mbk */ }, { /* 8426 */ 424, /* VRSQRT14PSZ256mbkz */ }, { /* 8427 */ 656, /* VRSQRT14PSZ256mk */ }, { /* 8428 */ 657, /* VRSQRT14PSZ256mkz */ }, { /* 8429 */ 647, /* VRSQRT14PSZ256r */ }, { /* 8430 */ 559, /* VRSQRT14PSZ256rk */ }, { /* 8431 */ 560, /* VRSQRT14PSZ256rkz */ }, { /* 8432 */ 477, /* VRSQRT14PSZm */ }, { /* 8433 */ 428, /* VRSQRT14PSZmb */ }, { /* 8434 */ 429, /* VRSQRT14PSZmbk */ }, { /* 8435 */ 430, /* VRSQRT14PSZmbkz */ }, { /* 8436 */ 537, /* VRSQRT14PSZmk */ }, { /* 8437 */ 538, /* VRSQRT14PSZmkz */ }, { /* 8438 */ 478, /* VRSQRT14PSZr */ }, { /* 8439 */ 541, /* VRSQRT14PSZrk */ }, { /* 8440 */ 542, /* VRSQRT14PSZrkz */ }, { /* 8441 */ 1030, /* VRSQRT14SDrm */ }, { /* 8442 */ 1031, /* VRSQRT14SDrr */ }, { /* 8443 */ 1032, /* VRSQRT14SSrm */ }, { /* 8444 */ 1033, /* VRSQRT14SSrr */ }, { /* 8445 */ 477, /* VRSQRT28PDm */ }, { /* 8446 */ 525, /* VRSQRT28PDmb */ }, { /* 8447 */ 526, /* VRSQRT28PDmbk */ }, { /* 8448 */ 527, /* VRSQRT28PDmbkz */ }, { /* 8449 */ 528, /* VRSQRT28PDmk */ }, { /* 8450 */ 529, /* VRSQRT28PDmkz */ }, { /* 8451 */ 478, /* VRSQRT28PDr */ }, { /* 8452 */ 530, /* VRSQRT28PDrb */ }, { /* 8453 */ 531, /* VRSQRT28PDrbk */ }, { /* 8454 */ 532, /* VRSQRT28PDrbkz */ }, { /* 8455 */ 533, /* VRSQRT28PDrk */ }, { /* 8456 */ 534, /* VRSQRT28PDrkz */ }, { /* 8457 */ 477, /* VRSQRT28PSm */ }, { /* 8458 */ 525, /* VRSQRT28PSmb */ }, { /* 8459 */ 535, /* VRSQRT28PSmbk */ }, { /* 8460 */ 536, /* VRSQRT28PSmbkz */ }, { /* 8461 */ 537, /* VRSQRT28PSmk */ }, { /* 8462 */ 538, /* VRSQRT28PSmkz */ }, { /* 8463 */ 478, /* VRSQRT28PSr */ }, { /* 8464 */ 530, /* VRSQRT28PSrb */ }, { /* 8465 */ 539, /* VRSQRT28PSrbk */ }, { /* 8466 */ 540, /* VRSQRT28PSrbkz */ }, { /* 8467 */ 541, /* VRSQRT28PSrk */ }, { /* 8468 */ 542, /* VRSQRT28PSrkz */ }, { /* 8469 */ 360, /* VRSQRT28SDm */ }, { /* 8470 */ 361, /* VRSQRT28SDmk */ }, { /* 8471 */ 362, /* VRSQRT28SDmkz */ }, { /* 8472 */ 363, /* VRSQRT28SDr */ }, { /* 8473 */ 363, /* VRSQRT28SDrb */ }, { /* 8474 */ 364, /* VRSQRT28SDrbk */ }, { /* 8475 */ 365, /* VRSQRT28SDrbkz */ }, { /* 8476 */ 364, /* VRSQRT28SDrk */ }, { /* 8477 */ 365, /* VRSQRT28SDrkz */ }, { /* 8478 */ 371, /* VRSQRT28SSm */ }, { /* 8479 */ 372, /* VRSQRT28SSmk */ }, { /* 8480 */ 373, /* VRSQRT28SSmkz */ }, { /* 8481 */ 374, /* VRSQRT28SSr */ }, { /* 8482 */ 374, /* VRSQRT28SSrb */ }, { /* 8483 */ 375, /* VRSQRT28SSrbk */ }, { /* 8484 */ 376, /* VRSQRT28SSrbkz */ }, { /* 8485 */ 375, /* VRSQRT28SSrk */ }, { /* 8486 */ 376, /* VRSQRT28SSrkz */ }, { /* 8487 */ 475, /* VRSQRTPSYm */ }, { /* 8488 */ 0, /* */ }, { /* 8489 */ 476, /* VRSQRTPSYr */ }, { /* 8490 */ 0, /* */ }, { /* 8491 */ 44, /* VRSQRTPSm */ }, { /* 8492 */ 0, /* */ }, { /* 8493 */ 45, /* VRSQRTPSr */ }, { /* 8494 */ 0, /* */ }, { /* 8495 */ 380, /* VRSQRTSSm */ }, { /* 8496 */ 0, /* */ }, { /* 8497 */ 381, /* VRSQRTSSr */ }, { /* 8498 */ 991, /* VSCATTERDPDZmr */ }, { /* 8499 */ 990, /* VSCATTERDPSZmr */ }, { /* 8500 */ 617, /* VSCATTERPF0DPDm */ }, { /* 8501 */ 618, /* VSCATTERPF0DPSm */ }, { /* 8502 */ 619, /* VSCATTERPF0QPDm */ }, { /* 8503 */ 619, /* VSCATTERPF0QPSm */ }, { /* 8504 */ 617, /* VSCATTERPF1DPDm */ }, { /* 8505 */ 618, /* VSCATTERPF1DPSm */ }, { /* 8506 */ 619, /* VSCATTERPF1QPDm */ }, { /* 8507 */ 619, /* VSCATTERPF1QPSm */ }, { /* 8508 */ 991, /* VSCATTERQPDZmr */ }, { /* 8509 */ 992, /* VSCATTERQPSZmr */ }, { /* 8510 */ 388, /* VSHUFPDYrmi */ }, { /* 8511 */ 389, /* VSHUFPDYrri */ }, { /* 8512 */ 382, /* VSHUFPDZrmi */ }, { /* 8513 */ 383, /* VSHUFPDZrri */ }, { /* 8514 */ 390, /* VSHUFPDrmi */ }, { /* 8515 */ 391, /* VSHUFPDrri */ }, { /* 8516 */ 388, /* VSHUFPSYrmi */ }, { /* 8517 */ 389, /* VSHUFPSYrri */ }, { /* 8518 */ 382, /* VSHUFPSZrmi */ }, { /* 8519 */ 383, /* VSHUFPSZrri */ }, { /* 8520 */ 390, /* VSHUFPSrmi */ }, { /* 8521 */ 391, /* VSHUFPSrri */ }, { /* 8522 */ 475, /* VSQRTPDYm */ }, { /* 8523 */ 476, /* VSQRTPDYr */ }, { /* 8524 */ 637, /* VSQRTPDZ128m */ }, { /* 8525 */ 1027, /* VSQRTPDZ128mb */ }, { /* 8526 */ 1028, /* VSQRTPDZ128mbk */ }, { /* 8527 */ 1029, /* VSQRTPDZ128mbkz */ }, { /* 8528 */ 638, /* VSQRTPDZ128mk */ }, { /* 8529 */ 639, /* VSQRTPDZ128mkz */ }, { /* 8530 */ 640, /* VSQRTPDZ128r */ }, { /* 8531 */ 545, /* VSQRTPDZ128rk */ }, { /* 8532 */ 546, /* VSQRTPDZ128rkz */ }, { /* 8533 */ 644, /* VSQRTPDZ256m */ }, { /* 8534 */ 403, /* VSQRTPDZ256mb */ }, { /* 8535 */ 404, /* VSQRTPDZ256mbk */ }, { /* 8536 */ 405, /* VSQRTPDZ256mbkz */ }, { /* 8537 */ 645, /* VSQRTPDZ256mk */ }, { /* 8538 */ 646, /* VSQRTPDZ256mkz */ }, { /* 8539 */ 647, /* VSQRTPDZ256r */ }, { /* 8540 */ 549, /* VSQRTPDZ256rk */ }, { /* 8541 */ 550, /* VSQRTPDZ256rkz */ }, { /* 8542 */ 477, /* VSQRTPDZm */ }, { /* 8543 */ 409, /* VSQRTPDZmb */ }, { /* 8544 */ 410, /* VSQRTPDZmbk */ }, { /* 8545 */ 411, /* VSQRTPDZmbkz */ }, { /* 8546 */ 528, /* VSQRTPDZmk */ }, { /* 8547 */ 529, /* VSQRTPDZmkz */ }, { /* 8548 */ 478, /* VSQRTPDZr */ }, { /* 8549 */ 533, /* VSQRTPDZrk */ }, { /* 8550 */ 534, /* VSQRTPDZrkz */ }, { /* 8551 */ 44, /* VSQRTPDm */ }, { /* 8552 */ 45, /* VSQRTPDr */ }, { /* 8553 */ 475, /* VSQRTPSYm */ }, { /* 8554 */ 476, /* VSQRTPSYr */ }, { /* 8555 */ 637, /* VSQRTPSZ128m */ }, { /* 8556 */ 416, /* VSQRTPSZ128mb */ }, { /* 8557 */ 417, /* VSQRTPSZ128mbk */ }, { /* 8558 */ 418, /* VSQRTPSZ128mbkz */ }, { /* 8559 */ 653, /* VSQRTPSZ128mk */ }, { /* 8560 */ 654, /* VSQRTPSZ128mkz */ }, { /* 8561 */ 640, /* VSQRTPSZ128r */ }, { /* 8562 */ 555, /* VSQRTPSZ128rk */ }, { /* 8563 */ 556, /* VSQRTPSZ128rkz */ }, { /* 8564 */ 644, /* VSQRTPSZ256m */ }, { /* 8565 */ 422, /* VSQRTPSZ256mb */ }, { /* 8566 */ 423, /* VSQRTPSZ256mbk */ }, { /* 8567 */ 424, /* VSQRTPSZ256mbkz */ }, { /* 8568 */ 656, /* VSQRTPSZ256mk */ }, { /* 8569 */ 657, /* VSQRTPSZ256mkz */ }, { /* 8570 */ 647, /* VSQRTPSZ256r */ }, { /* 8571 */ 559, /* VSQRTPSZ256rk */ }, { /* 8572 */ 560, /* VSQRTPSZ256rkz */ }, { /* 8573 */ 477, /* VSQRTPSZm */ }, { /* 8574 */ 428, /* VSQRTPSZmb */ }, { /* 8575 */ 429, /* VSQRTPSZmbk */ }, { /* 8576 */ 430, /* VSQRTPSZmbkz */ }, { /* 8577 */ 537, /* VSQRTPSZmk */ }, { /* 8578 */ 538, /* VSQRTPSZmkz */ }, { /* 8579 */ 478, /* VSQRTPSZr */ }, { /* 8580 */ 541, /* VSQRTPSZrk */ }, { /* 8581 */ 542, /* VSQRTPSZrkz */ }, { /* 8582 */ 44, /* VSQRTPSm */ }, { /* 8583 */ 45, /* VSQRTPSr */ }, { /* 8584 */ 1030, /* VSQRTSDZm */ }, { /* 8585 */ 0, /* */ }, { /* 8586 */ 1049, /* VSQRTSDZr */ }, { /* 8587 */ 0, /* */ }, { /* 8588 */ 369, /* VSQRTSDm */ }, { /* 8589 */ 0, /* */ }, { /* 8590 */ 370, /* VSQRTSDr */ }, { /* 8591 */ 1032, /* VSQRTSSZm */ }, { /* 8592 */ 0, /* */ }, { /* 8593 */ 1050, /* VSQRTSSZr */ }, { /* 8594 */ 0, /* */ }, { /* 8595 */ 380, /* VSQRTSSm */ }, { /* 8596 */ 0, /* */ }, { /* 8597 */ 381, /* VSQRTSSr */ }, { /* 8598 */ 38, /* VSTMXCSR */ }, { /* 8599 */ 302, /* VSUBPDYrm */ }, { /* 8600 */ 303, /* VSUBPDYrr */ }, { /* 8601 */ 304, /* VSUBPDZ128rm */ }, { /* 8602 */ 305, /* VSUBPDZ128rmb */ }, { /* 8603 */ 306, /* VSUBPDZ128rmbk */ }, { /* 8604 */ 307, /* VSUBPDZ128rmbkz */ }, { /* 8605 */ 308, /* VSUBPDZ128rmk */ }, { /* 8606 */ 309, /* VSUBPDZ128rmkz */ }, { /* 8607 */ 310, /* VSUBPDZ128rr */ }, { /* 8608 */ 311, /* VSUBPDZ128rrk */ }, { /* 8609 */ 312, /* VSUBPDZ128rrkz */ }, { /* 8610 */ 313, /* VSUBPDZ256rm */ }, { /* 8611 */ 314, /* VSUBPDZ256rmb */ }, { /* 8612 */ 315, /* VSUBPDZ256rmbk */ }, { /* 8613 */ 316, /* VSUBPDZ256rmbkz */ }, { /* 8614 */ 317, /* VSUBPDZ256rmk */ }, { /* 8615 */ 318, /* VSUBPDZ256rmkz */ }, { /* 8616 */ 319, /* VSUBPDZ256rr */ }, { /* 8617 */ 320, /* VSUBPDZ256rrk */ }, { /* 8618 */ 321, /* VSUBPDZ256rrkz */ }, { /* 8619 */ 322, /* VSUBPDZrb */ }, { /* 8620 */ 323, /* VSUBPDZrbk */ }, { /* 8621 */ 324, /* VSUBPDZrbkz */ }, { /* 8622 */ 325, /* VSUBPDZrm */ }, { /* 8623 */ 326, /* VSUBPDZrmb */ }, { /* 8624 */ 327, /* VSUBPDZrmbk */ }, { /* 8625 */ 328, /* VSUBPDZrmbkz */ }, { /* 8626 */ 329, /* VSUBPDZrmk */ }, { /* 8627 */ 330, /* VSUBPDZrmkz */ }, { /* 8628 */ 331, /* VSUBPDZrr */ }, { /* 8629 */ 332, /* VSUBPDZrrk */ }, { /* 8630 */ 333, /* VSUBPDZrrkz */ }, { /* 8631 */ 334, /* VSUBPDrm */ }, { /* 8632 */ 335, /* VSUBPDrr */ }, { /* 8633 */ 302, /* VSUBPSYrm */ }, { /* 8634 */ 303, /* VSUBPSYrr */ }, { /* 8635 */ 304, /* VSUBPSZ128rm */ }, { /* 8636 */ 336, /* VSUBPSZ128rmb */ }, { /* 8637 */ 337, /* VSUBPSZ128rmbk */ }, { /* 8638 */ 338, /* VSUBPSZ128rmbkz */ }, { /* 8639 */ 339, /* VSUBPSZ128rmk */ }, { /* 8640 */ 340, /* VSUBPSZ128rmkz */ }, { /* 8641 */ 310, /* VSUBPSZ128rr */ }, { /* 8642 */ 341, /* VSUBPSZ128rrk */ }, { /* 8643 */ 342, /* VSUBPSZ128rrkz */ }, { /* 8644 */ 313, /* VSUBPSZ256rm */ }, { /* 8645 */ 343, /* VSUBPSZ256rmb */ }, { /* 8646 */ 344, /* VSUBPSZ256rmbk */ }, { /* 8647 */ 345, /* VSUBPSZ256rmbkz */ }, { /* 8648 */ 346, /* VSUBPSZ256rmk */ }, { /* 8649 */ 347, /* VSUBPSZ256rmkz */ }, { /* 8650 */ 319, /* VSUBPSZ256rr */ }, { /* 8651 */ 348, /* VSUBPSZ256rrk */ }, { /* 8652 */ 349, /* VSUBPSZ256rrkz */ }, { /* 8653 */ 350, /* VSUBPSZrb */ }, { /* 8654 */ 351, /* VSUBPSZrbk */ }, { /* 8655 */ 352, /* VSUBPSZrbkz */ }, { /* 8656 */ 325, /* VSUBPSZrm */ }, { /* 8657 */ 353, /* VSUBPSZrmb */ }, { /* 8658 */ 354, /* VSUBPSZrmbk */ }, { /* 8659 */ 355, /* VSUBPSZrmbkz */ }, { /* 8660 */ 356, /* VSUBPSZrmk */ }, { /* 8661 */ 357, /* VSUBPSZrmkz */ }, { /* 8662 */ 331, /* VSUBPSZrr */ }, { /* 8663 */ 358, /* VSUBPSZrrk */ }, { /* 8664 */ 359, /* VSUBPSZrrkz */ }, { /* 8665 */ 334, /* VSUBPSrm */ }, { /* 8666 */ 335, /* VSUBPSrr */ }, { /* 8667 */ 0, /* */ }, { /* 8668 */ 360, /* VSUBSDZrm_Int */ }, { /* 8669 */ 361, /* VSUBSDZrm_Intk */ }, { /* 8670 */ 362, /* VSUBSDZrm_Intkz */ }, { /* 8671 */ 0, /* */ }, { /* 8672 */ 363, /* VSUBSDZrr_Int */ }, { /* 8673 */ 364, /* VSUBSDZrr_Intk */ }, { /* 8674 */ 365, /* VSUBSDZrr_Intkz */ }, { /* 8675 */ 366, /* VSUBSDZrrb */ }, { /* 8676 */ 367, /* VSUBSDZrrbk */ }, { /* 8677 */ 368, /* VSUBSDZrrbkz */ }, { /* 8678 */ 369, /* VSUBSDrm */ }, { /* 8679 */ 0, /* */ }, { /* 8680 */ 370, /* VSUBSDrr */ }, { /* 8681 */ 0, /* */ }, { /* 8682 */ 0, /* */ }, { /* 8683 */ 371, /* VSUBSSZrm_Int */ }, { /* 8684 */ 372, /* VSUBSSZrm_Intk */ }, { /* 8685 */ 373, /* VSUBSSZrm_Intkz */ }, { /* 8686 */ 0, /* */ }, { /* 8687 */ 374, /* VSUBSSZrr_Int */ }, { /* 8688 */ 375, /* VSUBSSZrr_Intk */ }, { /* 8689 */ 376, /* VSUBSSZrr_Intkz */ }, { /* 8690 */ 377, /* VSUBSSZrrb */ }, { /* 8691 */ 378, /* VSUBSSZrrbk */ }, { /* 8692 */ 379, /* VSUBSSZrrbkz */ }, { /* 8693 */ 380, /* VSUBSSrm */ }, { /* 8694 */ 0, /* */ }, { /* 8695 */ 381, /* VSUBSSrr */ }, { /* 8696 */ 0, /* */ }, { /* 8697 */ 475, /* VTESTPDYrm */ }, { /* 8698 */ 476, /* VTESTPDYrr */ }, { /* 8699 */ 44, /* VTESTPDrm */ }, { /* 8700 */ 45, /* VTESTPDrr */ }, { /* 8701 */ 475, /* VTESTPSYrm */ }, { /* 8702 */ 476, /* VTESTPSYrr */ }, { /* 8703 */ 44, /* VTESTPSrm */ }, { /* 8704 */ 45, /* VTESTPSrr */ }, { /* 8705 */ 712, /* VUCOMISDZrm */ }, { /* 8706 */ 1051, /* VUCOMISDZrr */ }, { /* 8707 */ 257, /* VUCOMISDrm */ }, { /* 8708 */ 301, /* VUCOMISDrr */ }, { /* 8709 */ 721, /* VUCOMISSZrm */ }, { /* 8710 */ 1052, /* VUCOMISSZrr */ }, { /* 8711 */ 261, /* VUCOMISSrm */ }, { /* 8712 */ 287, /* VUCOMISSrr */ }, { /* 8713 */ 302, /* VUNPCKHPDYrm */ }, { /* 8714 */ 303, /* VUNPCKHPDYrr */ }, { /* 8715 */ 325, /* VUNPCKHPDZrm */ }, { /* 8716 */ 331, /* VUNPCKHPDZrr */ }, { /* 8717 */ 334, /* VUNPCKHPDrm */ }, { /* 8718 */ 335, /* VUNPCKHPDrr */ }, { /* 8719 */ 302, /* VUNPCKHPSYrm */ }, { /* 8720 */ 303, /* VUNPCKHPSYrr */ }, { /* 8721 */ 325, /* VUNPCKHPSZrm */ }, { /* 8722 */ 331, /* VUNPCKHPSZrr */ }, { /* 8723 */ 334, /* VUNPCKHPSrm */ }, { /* 8724 */ 335, /* VUNPCKHPSrr */ }, { /* 8725 */ 302, /* VUNPCKLPDYrm */ }, { /* 8726 */ 303, /* VUNPCKLPDYrr */ }, { /* 8727 */ 325, /* VUNPCKLPDZrm */ }, { /* 8728 */ 331, /* VUNPCKLPDZrr */ }, { /* 8729 */ 334, /* VUNPCKLPDrm */ }, { /* 8730 */ 335, /* VUNPCKLPDrr */ }, { /* 8731 */ 302, /* VUNPCKLPSYrm */ }, { /* 8732 */ 303, /* VUNPCKLPSYrr */ }, { /* 8733 */ 325, /* VUNPCKLPSZrm */ }, { /* 8734 */ 331, /* VUNPCKLPSZrr */ }, { /* 8735 */ 334, /* VUNPCKLPSrm */ }, { /* 8736 */ 335, /* VUNPCKLPSrr */ }, { /* 8737 */ 302, /* VXORPDYrm */ }, { /* 8738 */ 303, /* VXORPDYrr */ }, { /* 8739 */ 334, /* VXORPDrm */ }, { /* 8740 */ 335, /* VXORPDrr */ }, { /* 8741 */ 302, /* VXORPSYrm */ }, { /* 8742 */ 303, /* VXORPSYrr */ }, { /* 8743 */ 334, /* VXORPSrm */ }, { /* 8744 */ 335, /* VXORPSrr */ }, { /* 8745 */ 0, /* VZEROALL */ }, { /* 8746 */ 0, /* VZEROUPPER */ }, { /* 8747 */ 0, /* */ }, { /* 8748 */ 0, /* */ }, { /* 8749 */ 0, /* WAIT */ }, { /* 8750 */ 0, /* WBINVD */ }, { /* 8751 */ 0, /* */ }, { /* 8752 */ 0, /* */ }, { /* 8753 */ 0, /* */ }, { /* 8754 */ 288, /* WRFSBASE */ }, { /* 8755 */ 79, /* WRFSBASE64 */ }, { /* 8756 */ 288, /* WRGSBASE */ }, { /* 8757 */ 79, /* WRGSBASE64 */ }, { /* 8758 */ 0, /* WRMSR */ }, { /* 8759 */ 1, /* XABORT */ }, { /* 8760 */ 0, /* */ }, { /* 8761 */ 5, /* XADD16rm */ }, { /* 8762 */ 73, /* XADD16rr */ }, { /* 8763 */ 5, /* XADD32rm */ }, { /* 8764 */ 73, /* XADD32rr */ }, { /* 8765 */ 16, /* XADD64rm */ }, { /* 8766 */ 76, /* XADD64rr */ }, { /* 8767 */ 23, /* XADD8rm */ }, { /* 8768 */ 87, /* XADD8rr */ }, { /* 8769 */ 0, /* */ }, { /* 8770 */ 157, /* XBEGIN_2 */ }, { /* 8771 */ 157, /* XBEGIN_4 */ }, { /* 8772 */ 278, /* XCHG16ar */ }, { /* 8773 */ 8, /* XCHG16rm */ }, { /* 8774 */ 10, /* XCHG16rr */ }, { /* 8775 */ 278, /* XCHG32ar */ }, { /* 8776 */ 278, /* XCHG32ar64 */ }, { /* 8777 */ 8, /* XCHG32rm */ }, { /* 8778 */ 10, /* XCHG32rr */ }, { /* 8779 */ 279, /* XCHG64ar */ }, { /* 8780 */ 19, /* XCHG64rm */ }, { /* 8781 */ 21, /* XCHG64rr */ }, { /* 8782 */ 25, /* XCHG8rm */ }, { /* 8783 */ 27, /* XCHG8rr */ }, { /* 8784 */ 39, /* XCH_F */ }, { /* 8785 */ 0, /* XCRYPTCBC */ }, { /* 8786 */ 0, /* XCRYPTCFB */ }, { /* 8787 */ 0, /* XCRYPTCTR */ }, { /* 8788 */ 0, /* XCRYPTECB */ }, { /* 8789 */ 0, /* XCRYPTOFB */ }, { /* 8790 */ 0, /* XEND */ }, { /* 8791 */ 0, /* XGETBV */ }, { /* 8792 */ 0, /* XLAT */ }, { /* 8793 */ 2, /* XOR16i16 */ }, { /* 8794 */ 3, /* XOR16mi */ }, { /* 8795 */ 4, /* XOR16mi8 */ }, { /* 8796 */ 5, /* XOR16mr */ }, { /* 8797 */ 6, /* XOR16ri */ }, { /* 8798 */ 7, /* XOR16ri8 */ }, { /* 8799 */ 8, /* XOR16rm */ }, { /* 8800 */ 9, /* XOR16rr */ }, { /* 8801 */ 10, /* XOR16rr_REV */ }, { /* 8802 */ 2, /* XOR32i32 */ }, { /* 8803 */ 3, /* XOR32mi */ }, { /* 8804 */ 11, /* XOR32mi8 */ }, { /* 8805 */ 5, /* XOR32mr */ }, { /* 8806 */ 6, /* XOR32ri */ }, { /* 8807 */ 12, /* XOR32ri8 */ }, { /* 8808 */ 8, /* XOR32rm */ }, { /* 8809 */ 9, /* XOR32rr */ }, { /* 8810 */ 10, /* XOR32rr_REV */ }, { /* 8811 */ 13, /* XOR64i32 */ }, { /* 8812 */ 14, /* XOR64mi32 */ }, { /* 8813 */ 15, /* XOR64mi8 */ }, { /* 8814 */ 16, /* XOR64mr */ }, { /* 8815 */ 17, /* XOR64ri32 */ }, { /* 8816 */ 18, /* XOR64ri8 */ }, { /* 8817 */ 19, /* XOR64rm */ }, { /* 8818 */ 20, /* XOR64rr */ }, { /* 8819 */ 21, /* XOR64rr_REV */ }, { /* 8820 */ 1, /* XOR8i8 */ }, { /* 8821 */ 22, /* XOR8mi */ }, { /* 8822 */ 22, /* XOR8mi8 */ }, { /* 8823 */ 23, /* XOR8mr */ }, { /* 8824 */ 24, /* XOR8ri */ }, { /* 8825 */ 24, /* XOR8ri8 */ }, { /* 8826 */ 25, /* XOR8rm */ }, { /* 8827 */ 26, /* XOR8rr */ }, { /* 8828 */ 27, /* XOR8rr_REV */ }, { /* 8829 */ 30, /* XORPDrm */ }, { /* 8830 */ 31, /* XORPDrr */ }, { /* 8831 */ 30, /* XORPSrm */ }, { /* 8832 */ 31, /* XORPSrr */ }, { /* 8833 */ 0, /* */ }, { /* 8834 */ 140, /* XRSTOR */ }, { /* 8835 */ 140, /* XRSTOR64 */ }, { /* 8836 */ 140, /* XRSTORS */ }, { /* 8837 */ 140, /* XRSTORS64 */ }, { /* 8838 */ 140, /* XSAVE */ }, { /* 8839 */ 140, /* XSAVE64 */ }, { /* 8840 */ 140, /* XSAVEC */ }, { /* 8841 */ 140, /* XSAVEC64 */ }, { /* 8842 */ 140, /* XSAVEOPT */ }, { /* 8843 */ 140, /* XSAVEOPT64 */ }, { /* 8844 */ 140, /* XSAVES */ }, { /* 8845 */ 140, /* XSAVES64 */ }, { /* 8846 */ 0, /* XSETBV */ }, { /* 8847 */ 0, /* XSHA1 */ }, { /* 8848 */ 0, /* XSHA256 */ }, { /* 8849 */ 0, /* XSTORE */ }, { /* 8850 */ 0, /* XTEST */ }, { /* 8851 */ 0, /* fdisi8087_nop */ }, { /* 8852 */ 0, /* feni8087_nop */ } }; static const uint8_t x86DisassemblerContexts[16384] = { IC, /* 0 */ IC_64BIT, /* 1 */ IC_XS, /* 2 */ IC_64BIT_XS, /* 3 */ IC_XD, /* 4 */ IC_64BIT_XD, /* 5 */ IC_XS, /* 6 */ IC_64BIT_XS, /* 7 */ IC, /* 8 */ IC_64BIT_REXW, /* 9 */ IC_XS, /* 10 */ IC_64BIT_REXW_XS, /* 11 */ IC_XD, /* 12 */ IC_64BIT_REXW_XD, /* 13 */ IC_XS, /* 14 */ IC_64BIT_REXW_XS, /* 15 */ IC_OPSIZE, /* 16 */ IC_64BIT_OPSIZE, /* 17 */ IC_XS_OPSIZE, /* 18 */ IC_64BIT_XS_OPSIZE, /* 19 */ IC_XD_OPSIZE, /* 20 */ IC_64BIT_XD_OPSIZE, /* 21 */ IC_XS_OPSIZE, /* 22 */ IC_64BIT_XD_OPSIZE, /* 23 */ IC_OPSIZE, /* 24 */ IC_64BIT_REXW_OPSIZE, /* 25 */ IC_XS_OPSIZE, /* 26 */ IC_64BIT_REXW_XS, /* 27 */ IC_XD_OPSIZE, /* 28 */ IC_64BIT_REXW_XD, /* 29 */ IC_XS_OPSIZE, /* 30 */ IC_64BIT_REXW_XS, /* 31 */ IC_ADSIZE, /* 32 */ IC_64BIT_ADSIZE, /* 33 */ IC_XS, /* 34 */ IC_64BIT_XS, /* 35 */ IC_XD, /* 36 */ IC_64BIT_XD, /* 37 */ IC_XS, /* 38 */ IC_64BIT_XS, /* 39 */ IC_ADSIZE, /* 40 */ IC_64BIT_REXW_ADSIZE, /* 41 */ IC_XS, /* 42 */ IC_64BIT_REXW_XS, /* 43 */ IC_XD, /* 44 */ IC_64BIT_REXW_XD, /* 45 */ IC_XS, /* 46 */ IC_64BIT_REXW_XS, /* 47 */ IC_OPSIZE_ADSIZE, /* 48 */ IC_64BIT_OPSIZE_ADSIZE, /* 49 */ IC_XS_OPSIZE, /* 50 */ IC_64BIT_XS_OPSIZE, /* 51 */ IC_XD_OPSIZE, /* 52 */ IC_64BIT_XD_OPSIZE, /* 53 */ IC_XS_OPSIZE, /* 54 */ IC_64BIT_XD_OPSIZE, /* 55 */ IC_OPSIZE_ADSIZE, /* 56 */ IC_64BIT_REXW_OPSIZE, /* 57 */ IC_XS_OPSIZE, /* 58 */ IC_64BIT_REXW_XS, /* 59 */ IC_XD_OPSIZE, /* 60 */ IC_64BIT_REXW_XD, /* 61 */ IC_XS_OPSIZE, /* 62 */ IC_64BIT_REXW_XS, /* 63 */ IC_VEX, /* 64 */ IC_VEX, /* 65 */ IC_VEX_XS, /* 66 */ IC_VEX_XS, /* 67 */ IC_VEX_XD, /* 68 */ IC_VEX_XD, /* 69 */ IC_VEX_XD, /* 70 */ IC_VEX_XD, /* 71 */ IC_VEX_W, /* 72 */ IC_VEX_W, /* 73 */ IC_VEX_W_XS, /* 74 */ IC_VEX_W_XS, /* 75 */ IC_VEX_W_XD, /* 76 */ IC_VEX_W_XD, /* 77 */ IC_VEX_W_XD, /* 78 */ IC_VEX_W_XD, /* 79 */ IC_VEX_OPSIZE, /* 80 */ IC_VEX_OPSIZE, /* 81 */ IC_VEX_OPSIZE, /* 82 */ IC_VEX_OPSIZE, /* 83 */ IC_VEX_OPSIZE, /* 84 */ IC_VEX_OPSIZE, /* 85 */ IC_VEX_OPSIZE, /* 86 */ IC_VEX_OPSIZE, /* 87 */ IC_VEX_W_OPSIZE, /* 88 */ IC_VEX_W_OPSIZE, /* 89 */ IC_VEX_W_OPSIZE, /* 90 */ IC_VEX_W_OPSIZE, /* 91 */ IC_VEX_W_OPSIZE, /* 92 */ IC_VEX_W_OPSIZE, /* 93 */ IC_VEX_W_OPSIZE, /* 94 */ IC_VEX_W_OPSIZE, /* 95 */ IC_VEX, /* 96 */ IC_VEX, /* 97 */ IC_VEX_XS, /* 98 */ IC_VEX_XS, /* 99 */ IC_VEX_XD, /* 100 */ IC_VEX_XD, /* 101 */ IC_VEX_XD, /* 102 */ IC_VEX_XD, /* 103 */ IC_VEX_W, /* 104 */ IC_VEX_W, /* 105 */ IC_VEX_W_XS, /* 106 */ IC_VEX_W_XS, /* 107 */ IC_VEX_W_XD, /* 108 */ IC_VEX_W_XD, /* 109 */ IC_VEX_W_XD, /* 110 */ IC_VEX_W_XD, /* 111 */ IC_VEX_OPSIZE, /* 112 */ IC_VEX_OPSIZE, /* 113 */ IC_VEX_OPSIZE, /* 114 */ IC_VEX_OPSIZE, /* 115 */ IC_VEX_OPSIZE, /* 116 */ IC_VEX_OPSIZE, /* 117 */ IC_VEX_OPSIZE, /* 118 */ IC_VEX_OPSIZE, /* 119 */ IC_VEX_W_OPSIZE, /* 120 */ IC_VEX_W_OPSIZE, /* 121 */ IC_VEX_W_OPSIZE, /* 122 */ IC_VEX_W_OPSIZE, /* 123 */ IC_VEX_W_OPSIZE, /* 124 */ IC_VEX_W_OPSIZE, /* 125 */ IC_VEX_W_OPSIZE, /* 126 */ IC_VEX_W_OPSIZE, /* 127 */ IC_VEX_L, /* 128 */ IC_VEX_L, /* 129 */ IC_VEX_L_XS, /* 130 */ IC_VEX_L_XS, /* 131 */ IC_VEX_L_XD, /* 132 */ IC_VEX_L_XD, /* 133 */ IC_VEX_L_XD, /* 134 */ IC_VEX_L_XD, /* 135 */ IC_VEX_L_W, /* 136 */ IC_VEX_L_W, /* 137 */ IC_VEX_L_W_XS, /* 138 */ IC_VEX_L_W_XS, /* 139 */ IC_VEX_L_W_XD, /* 140 */ IC_VEX_L_W_XD, /* 141 */ IC_VEX_L_W_XD, /* 142 */ IC_VEX_L_W_XD, /* 143 */ IC_VEX_L_OPSIZE, /* 144 */ IC_VEX_L_OPSIZE, /* 145 */ IC_VEX_L_OPSIZE, /* 146 */ IC_VEX_L_OPSIZE, /* 147 */ IC_VEX_L_OPSIZE, /* 148 */ IC_VEX_L_OPSIZE, /* 149 */ IC_VEX_L_OPSIZE, /* 150 */ IC_VEX_L_OPSIZE, /* 151 */ IC_VEX_L_W_OPSIZE, /* 152 */ IC_VEX_L_W_OPSIZE, /* 153 */ IC_VEX_L_W_OPSIZE, /* 154 */ IC_VEX_L_W_OPSIZE, /* 155 */ IC_VEX_L_W_OPSIZE, /* 156 */ IC_VEX_L_W_OPSIZE, /* 157 */ IC_VEX_L_W_OPSIZE, /* 158 */ IC_VEX_L_W_OPSIZE, /* 159 */ IC_VEX_L, /* 160 */ IC_VEX_L, /* 161 */ IC_VEX_L_XS, /* 162 */ IC_VEX_L_XS, /* 163 */ IC_VEX_L_XD, /* 164 */ IC_VEX_L_XD, /* 165 */ IC_VEX_L_XD, /* 166 */ IC_VEX_L_XD, /* 167 */ IC_VEX_L_W, /* 168 */ IC_VEX_L_W, /* 169 */ IC_VEX_L_W_XS, /* 170 */ IC_VEX_L_W_XS, /* 171 */ IC_VEX_L_W_XD, /* 172 */ IC_VEX_L_W_XD, /* 173 */ IC_VEX_L_W_XD, /* 174 */ IC_VEX_L_W_XD, /* 175 */ IC_VEX_L_OPSIZE, /* 176 */ IC_VEX_L_OPSIZE, /* 177 */ IC_VEX_L_OPSIZE, /* 178 */ IC_VEX_L_OPSIZE, /* 179 */ IC_VEX_L_OPSIZE, /* 180 */ IC_VEX_L_OPSIZE, /* 181 */ IC_VEX_L_OPSIZE, /* 182 */ IC_VEX_L_OPSIZE, /* 183 */ IC_VEX_L_W_OPSIZE, /* 184 */ IC_VEX_L_W_OPSIZE, /* 185 */ IC_VEX_L_W_OPSIZE, /* 186 */ IC_VEX_L_W_OPSIZE, /* 187 */ IC_VEX_L_W_OPSIZE, /* 188 */ IC_VEX_L_W_OPSIZE, /* 189 */ IC_VEX_L_W_OPSIZE, /* 190 */ IC_VEX_L_W_OPSIZE, /* 191 */ IC_VEX_L, /* 192 */ IC_VEX_L, /* 193 */ IC_VEX_L_XS, /* 194 */ IC_VEX_L_XS, /* 195 */ IC_VEX_L_XD, /* 196 */ IC_VEX_L_XD, /* 197 */ IC_VEX_L_XD, /* 198 */ IC_VEX_L_XD, /* 199 */ IC_VEX_L_W, /* 200 */ IC_VEX_L_W, /* 201 */ IC_VEX_L_W_XS, /* 202 */ IC_VEX_L_W_XS, /* 203 */ IC_VEX_L_W_XD, /* 204 */ IC_VEX_L_W_XD, /* 205 */ IC_VEX_L_W_XD, /* 206 */ IC_VEX_L_W_XD, /* 207 */ IC_VEX_L_OPSIZE, /* 208 */ IC_VEX_L_OPSIZE, /* 209 */ IC_VEX_L_OPSIZE, /* 210 */ IC_VEX_L_OPSIZE, /* 211 */ IC_VEX_L_OPSIZE, /* 212 */ IC_VEX_L_OPSIZE, /* 213 */ IC_VEX_L_OPSIZE, /* 214 */ IC_VEX_L_OPSIZE, /* 215 */ IC_VEX_L_W_OPSIZE, /* 216 */ IC_VEX_L_W_OPSIZE, /* 217 */ IC_VEX_L_W_OPSIZE, /* 218 */ IC_VEX_L_W_OPSIZE, /* 219 */ IC_VEX_L_W_OPSIZE, /* 220 */ IC_VEX_L_W_OPSIZE, /* 221 */ IC_VEX_L_W_OPSIZE, /* 222 */ IC_VEX_L_W_OPSIZE, /* 223 */ IC_VEX_L, /* 224 */ IC_VEX_L, /* 225 */ IC_VEX_L_XS, /* 226 */ IC_VEX_L_XS, /* 227 */ IC_VEX_L_XD, /* 228 */ IC_VEX_L_XD, /* 229 */ IC_VEX_L_XD, /* 230 */ IC_VEX_L_XD, /* 231 */ IC_VEX_L_W, /* 232 */ IC_VEX_L_W, /* 233 */ IC_VEX_L_W_XS, /* 234 */ IC_VEX_L_W_XS, /* 235 */ IC_VEX_L_W_XD, /* 236 */ IC_VEX_L_W_XD, /* 237 */ IC_VEX_L_W_XD, /* 238 */ IC_VEX_L_W_XD, /* 239 */ IC_VEX_L_OPSIZE, /* 240 */ IC_VEX_L_OPSIZE, /* 241 */ IC_VEX_L_OPSIZE, /* 242 */ IC_VEX_L_OPSIZE, /* 243 */ IC_VEX_L_OPSIZE, /* 244 */ IC_VEX_L_OPSIZE, /* 245 */ IC_VEX_L_OPSIZE, /* 246 */ IC_VEX_L_OPSIZE, /* 247 */ IC_VEX_L_W_OPSIZE, /* 248 */ IC_VEX_L_W_OPSIZE, /* 249 */ IC_VEX_L_W_OPSIZE, /* 250 */ IC_VEX_L_W_OPSIZE, /* 251 */ IC_VEX_L_W_OPSIZE, /* 252 */ IC_VEX_L_W_OPSIZE, /* 253 */ IC_VEX_L_W_OPSIZE, /* 254 */ IC_VEX_L_W_OPSIZE, /* 255 */ IC_EVEX, /* 256 */ IC_EVEX, /* 257 */ IC_EVEX_XS, /* 258 */ IC_EVEX_XS, /* 259 */ IC_EVEX_XD, /* 260 */ IC_EVEX_XD, /* 261 */ IC_EVEX_XD, /* 262 */ IC_EVEX_XD, /* 263 */ IC_EVEX_W, /* 264 */ IC_EVEX_W, /* 265 */ IC_EVEX_W_XS, /* 266 */ IC_EVEX_W_XS, /* 267 */ IC_EVEX_W_XD, /* 268 */ IC_EVEX_W_XD, /* 269 */ IC_EVEX_W_XD, /* 270 */ IC_EVEX_W_XD, /* 271 */ IC_EVEX_OPSIZE, /* 272 */ IC_EVEX_OPSIZE, /* 273 */ IC_EVEX_OPSIZE, /* 274 */ IC_EVEX_OPSIZE, /* 275 */ IC_EVEX_OPSIZE, /* 276 */ IC_EVEX_OPSIZE, /* 277 */ IC_EVEX_OPSIZE, /* 278 */ IC_EVEX_OPSIZE, /* 279 */ IC_EVEX_W_OPSIZE, /* 280 */ IC_EVEX_W_OPSIZE, /* 281 */ IC_EVEX_W_OPSIZE, /* 282 */ IC_EVEX_W_OPSIZE, /* 283 */ IC_EVEX_W_OPSIZE, /* 284 */ IC_EVEX_W_OPSIZE, /* 285 */ IC_EVEX_W_OPSIZE, /* 286 */ IC_EVEX_W_OPSIZE, /* 287 */ IC_EVEX, /* 288 */ IC_EVEX, /* 289 */ IC_EVEX_XS, /* 290 */ IC_EVEX_XS, /* 291 */ IC_EVEX_XD, /* 292 */ IC_EVEX_XD, /* 293 */ IC_EVEX_XD, /* 294 */ IC_EVEX_XD, /* 295 */ IC_EVEX_W, /* 296 */ IC_EVEX_W, /* 297 */ IC_EVEX_W_XS, /* 298 */ IC_EVEX_W_XS, /* 299 */ IC_EVEX_W_XD, /* 300 */ IC_EVEX_W_XD, /* 301 */ IC_EVEX_W_XD, /* 302 */ IC_EVEX_W_XD, /* 303 */ IC_EVEX_OPSIZE, /* 304 */ IC_EVEX_OPSIZE, /* 305 */ IC_EVEX_OPSIZE, /* 306 */ IC_EVEX_OPSIZE, /* 307 */ IC_EVEX_OPSIZE, /* 308 */ IC_EVEX_OPSIZE, /* 309 */ IC_EVEX_OPSIZE, /* 310 */ IC_EVEX_OPSIZE, /* 311 */ IC_EVEX_W_OPSIZE, /* 312 */ IC_EVEX_W_OPSIZE, /* 313 */ IC_EVEX_W_OPSIZE, /* 314 */ IC_EVEX_W_OPSIZE, /* 315 */ IC_EVEX_W_OPSIZE, /* 316 */ IC_EVEX_W_OPSIZE, /* 317 */ IC_EVEX_W_OPSIZE, /* 318 */ IC_EVEX_W_OPSIZE, /* 319 */ IC_EVEX, /* 320 */ IC_EVEX, /* 321 */ IC_EVEX_XS, /* 322 */ IC_EVEX_XS, /* 323 */ IC_EVEX_XD, /* 324 */ IC_EVEX_XD, /* 325 */ IC_EVEX_XD, /* 326 */ IC_EVEX_XD, /* 327 */ IC_EVEX_W, /* 328 */ IC_EVEX_W, /* 329 */ IC_EVEX_W_XS, /* 330 */ IC_EVEX_W_XS, /* 331 */ IC_EVEX_W_XD, /* 332 */ IC_EVEX_W_XD, /* 333 */ IC_EVEX_W_XD, /* 334 */ IC_EVEX_W_XD, /* 335 */ IC_EVEX_OPSIZE, /* 336 */ IC_EVEX_OPSIZE, /* 337 */ IC_EVEX_OPSIZE, /* 338 */ IC_EVEX_OPSIZE, /* 339 */ IC_EVEX_OPSIZE, /* 340 */ IC_EVEX_OPSIZE, /* 341 */ IC_EVEX_OPSIZE, /* 342 */ IC_EVEX_OPSIZE, /* 343 */ IC_EVEX_W_OPSIZE, /* 344 */ IC_EVEX_W_OPSIZE, /* 345 */ IC_EVEX_W_OPSIZE, /* 346 */ IC_EVEX_W_OPSIZE, /* 347 */ IC_EVEX_W_OPSIZE, /* 348 */ IC_EVEX_W_OPSIZE, /* 349 */ IC_EVEX_W_OPSIZE, /* 350 */ IC_EVEX_W_OPSIZE, /* 351 */ IC_EVEX, /* 352 */ IC_EVEX, /* 353 */ IC_EVEX_XS, /* 354 */ IC_EVEX_XS, /* 355 */ IC_EVEX_XD, /* 356 */ IC_EVEX_XD, /* 357 */ IC_EVEX_XD, /* 358 */ IC_EVEX_XD, /* 359 */ IC_EVEX_W, /* 360 */ IC_EVEX_W, /* 361 */ IC_EVEX_W_XS, /* 362 */ IC_EVEX_W_XS, /* 363 */ IC_EVEX_W_XD, /* 364 */ IC_EVEX_W_XD, /* 365 */ IC_EVEX_W_XD, /* 366 */ IC_EVEX_W_XD, /* 367 */ IC_EVEX_OPSIZE, /* 368 */ IC_EVEX_OPSIZE, /* 369 */ IC_EVEX_OPSIZE, /* 370 */ IC_EVEX_OPSIZE, /* 371 */ IC_EVEX_OPSIZE, /* 372 */ IC_EVEX_OPSIZE, /* 373 */ IC_EVEX_OPSIZE, /* 374 */ IC_EVEX_OPSIZE, /* 375 */ IC_EVEX_W_OPSIZE, /* 376 */ IC_EVEX_W_OPSIZE, /* 377 */ IC_EVEX_W_OPSIZE, /* 378 */ IC_EVEX_W_OPSIZE, /* 379 */ IC_EVEX_W_OPSIZE, /* 380 */ IC_EVEX_W_OPSIZE, /* 381 */ IC_EVEX_W_OPSIZE, /* 382 */ IC_EVEX_W_OPSIZE, /* 383 */ IC_EVEX, /* 384 */ IC_EVEX, /* 385 */ IC_EVEX_XS, /* 386 */ IC_EVEX_XS, /* 387 */ IC_EVEX_XD, /* 388 */ IC_EVEX_XD, /* 389 */ IC_EVEX_XD, /* 390 */ IC_EVEX_XD, /* 391 */ IC_EVEX_W, /* 392 */ IC_EVEX_W, /* 393 */ IC_EVEX_W_XS, /* 394 */ IC_EVEX_W_XS, /* 395 */ IC_EVEX_W_XD, /* 396 */ IC_EVEX_W_XD, /* 397 */ IC_EVEX_W_XD, /* 398 */ IC_EVEX_W_XD, /* 399 */ IC_EVEX_OPSIZE, /* 400 */ IC_EVEX_OPSIZE, /* 401 */ IC_EVEX_OPSIZE, /* 402 */ IC_EVEX_OPSIZE, /* 403 */ IC_EVEX_OPSIZE, /* 404 */ IC_EVEX_OPSIZE, /* 405 */ IC_EVEX_OPSIZE, /* 406 */ IC_EVEX_OPSIZE, /* 407 */ IC_EVEX_W_OPSIZE, /* 408 */ IC_EVEX_W_OPSIZE, /* 409 */ IC_EVEX_W_OPSIZE, /* 410 */ IC_EVEX_W_OPSIZE, /* 411 */ IC_EVEX_W_OPSIZE, /* 412 */ IC_EVEX_W_OPSIZE, /* 413 */ IC_EVEX_W_OPSIZE, /* 414 */ IC_EVEX_W_OPSIZE, /* 415 */ IC_EVEX, /* 416 */ IC_EVEX, /* 417 */ IC_EVEX_XS, /* 418 */ IC_EVEX_XS, /* 419 */ IC_EVEX_XD, /* 420 */ IC_EVEX_XD, /* 421 */ IC_EVEX_XD, /* 422 */ IC_EVEX_XD, /* 423 */ IC_EVEX_W, /* 424 */ IC_EVEX_W, /* 425 */ IC_EVEX_W_XS, /* 426 */ IC_EVEX_W_XS, /* 427 */ IC_EVEX_W_XD, /* 428 */ IC_EVEX_W_XD, /* 429 */ IC_EVEX_W_XD, /* 430 */ IC_EVEX_W_XD, /* 431 */ IC_EVEX_OPSIZE, /* 432 */ IC_EVEX_OPSIZE, /* 433 */ IC_EVEX_OPSIZE, /* 434 */ IC_EVEX_OPSIZE, /* 435 */ IC_EVEX_OPSIZE, /* 436 */ IC_EVEX_OPSIZE, /* 437 */ IC_EVEX_OPSIZE, /* 438 */ IC_EVEX_OPSIZE, /* 439 */ IC_EVEX_W_OPSIZE, /* 440 */ IC_EVEX_W_OPSIZE, /* 441 */ IC_EVEX_W_OPSIZE, /* 442 */ IC_EVEX_W_OPSIZE, /* 443 */ IC_EVEX_W_OPSIZE, /* 444 */ IC_EVEX_W_OPSIZE, /* 445 */ IC_EVEX_W_OPSIZE, /* 446 */ IC_EVEX_W_OPSIZE, /* 447 */ IC_EVEX, /* 448 */ IC_EVEX, /* 449 */ IC_EVEX_XS, /* 450 */ IC_EVEX_XS, /* 451 */ IC_EVEX_XD, /* 452 */ IC_EVEX_XD, /* 453 */ IC_EVEX_XD, /* 454 */ IC_EVEX_XD, /* 455 */ IC_EVEX_W, /* 456 */ IC_EVEX_W, /* 457 */ IC_EVEX_W_XS, /* 458 */ IC_EVEX_W_XS, /* 459 */ IC_EVEX_W_XD, /* 460 */ IC_EVEX_W_XD, /* 461 */ IC_EVEX_W_XD, /* 462 */ IC_EVEX_W_XD, /* 463 */ IC_EVEX_OPSIZE, /* 464 */ IC_EVEX_OPSIZE, /* 465 */ IC_EVEX_OPSIZE, /* 466 */ IC_EVEX_OPSIZE, /* 467 */ IC_EVEX_OPSIZE, /* 468 */ IC_EVEX_OPSIZE, /* 469 */ IC_EVEX_OPSIZE, /* 470 */ IC_EVEX_OPSIZE, /* 471 */ IC_EVEX_W_OPSIZE, /* 472 */ IC_EVEX_W_OPSIZE, /* 473 */ IC_EVEX_W_OPSIZE, /* 474 */ IC_EVEX_W_OPSIZE, /* 475 */ IC_EVEX_W_OPSIZE, /* 476 */ IC_EVEX_W_OPSIZE, /* 477 */ IC_EVEX_W_OPSIZE, /* 478 */ IC_EVEX_W_OPSIZE, /* 479 */ IC_EVEX, /* 480 */ IC_EVEX, /* 481 */ IC_EVEX_XS, /* 482 */ IC_EVEX_XS, /* 483 */ IC_EVEX_XD, /* 484 */ IC_EVEX_XD, /* 485 */ IC_EVEX_XD, /* 486 */ IC_EVEX_XD, /* 487 */ IC_EVEX_W, /* 488 */ IC_EVEX_W, /* 489 */ IC_EVEX_W_XS, /* 490 */ IC_EVEX_W_XS, /* 491 */ IC_EVEX_W_XD, /* 492 */ IC_EVEX_W_XD, /* 493 */ IC_EVEX_W_XD, /* 494 */ IC_EVEX_W_XD, /* 495 */ IC_EVEX_OPSIZE, /* 496 */ IC_EVEX_OPSIZE, /* 497 */ IC_EVEX_OPSIZE, /* 498 */ IC_EVEX_OPSIZE, /* 499 */ IC_EVEX_OPSIZE, /* 500 */ IC_EVEX_OPSIZE, /* 501 */ IC_EVEX_OPSIZE, /* 502 */ IC_EVEX_OPSIZE, /* 503 */ IC_EVEX_W_OPSIZE, /* 504 */ IC_EVEX_W_OPSIZE, /* 505 */ IC_EVEX_W_OPSIZE, /* 506 */ IC_EVEX_W_OPSIZE, /* 507 */ IC_EVEX_W_OPSIZE, /* 508 */ IC_EVEX_W_OPSIZE, /* 509 */ IC_EVEX_W_OPSIZE, /* 510 */ IC_EVEX_W_OPSIZE, /* 511 */ IC, /* 512 */ IC_64BIT, /* 513 */ IC_XS, /* 514 */ IC_64BIT_XS, /* 515 */ IC_XD, /* 516 */ IC_64BIT_XD, /* 517 */ IC_XS, /* 518 */ IC_64BIT_XS, /* 519 */ IC, /* 520 */ IC_64BIT_REXW, /* 521 */ IC_XS, /* 522 */ IC_64BIT_REXW_XS, /* 523 */ IC_XD, /* 524 */ IC_64BIT_REXW_XD, /* 525 */ IC_XS, /* 526 */ IC_64BIT_REXW_XS, /* 527 */ IC_OPSIZE, /* 528 */ IC_64BIT_OPSIZE, /* 529 */ IC_XS_OPSIZE, /* 530 */ IC_64BIT_XS_OPSIZE, /* 531 */ IC_XD_OPSIZE, /* 532 */ IC_64BIT_XD_OPSIZE, /* 533 */ IC_XS_OPSIZE, /* 534 */ IC_64BIT_XD_OPSIZE, /* 535 */ IC_OPSIZE, /* 536 */ IC_64BIT_REXW_OPSIZE, /* 537 */ IC_XS_OPSIZE, /* 538 */ IC_64BIT_REXW_XS, /* 539 */ IC_XD_OPSIZE, /* 540 */ IC_64BIT_REXW_XD, /* 541 */ IC_XS_OPSIZE, /* 542 */ IC_64BIT_REXW_XS, /* 543 */ IC_ADSIZE, /* 544 */ IC_64BIT_ADSIZE, /* 545 */ IC_XS, /* 546 */ IC_64BIT_XS, /* 547 */ IC_XD, /* 548 */ IC_64BIT_XD, /* 549 */ IC_XS, /* 550 */ IC_64BIT_XS, /* 551 */ IC_ADSIZE, /* 552 */ IC_64BIT_REXW_ADSIZE, /* 553 */ IC_XS, /* 554 */ IC_64BIT_REXW_XS, /* 555 */ IC_XD, /* 556 */ IC_64BIT_REXW_XD, /* 557 */ IC_XS, /* 558 */ IC_64BIT_REXW_XS, /* 559 */ IC_OPSIZE_ADSIZE, /* 560 */ IC_64BIT_OPSIZE_ADSIZE, /* 561 */ IC_XS_OPSIZE, /* 562 */ IC_64BIT_XS_OPSIZE, /* 563 */ IC_XD_OPSIZE, /* 564 */ IC_64BIT_XD_OPSIZE, /* 565 */ IC_XS_OPSIZE, /* 566 */ IC_64BIT_XD_OPSIZE, /* 567 */ IC_OPSIZE_ADSIZE, /* 568 */ IC_64BIT_REXW_OPSIZE, /* 569 */ IC_XS_OPSIZE, /* 570 */ IC_64BIT_REXW_XS, /* 571 */ IC_XD_OPSIZE, /* 572 */ IC_64BIT_REXW_XD, /* 573 */ IC_XS_OPSIZE, /* 574 */ IC_64BIT_REXW_XS, /* 575 */ IC_VEX, /* 576 */ IC_VEX, /* 577 */ IC_VEX_XS, /* 578 */ IC_VEX_XS, /* 579 */ IC_VEX_XD, /* 580 */ IC_VEX_XD, /* 581 */ IC_VEX_XD, /* 582 */ IC_VEX_XD, /* 583 */ IC_VEX_W, /* 584 */ IC_VEX_W, /* 585 */ IC_VEX_W_XS, /* 586 */ IC_VEX_W_XS, /* 587 */ IC_VEX_W_XD, /* 588 */ IC_VEX_W_XD, /* 589 */ IC_VEX_W_XD, /* 590 */ IC_VEX_W_XD, /* 591 */ IC_VEX_OPSIZE, /* 592 */ IC_VEX_OPSIZE, /* 593 */ IC_VEX_OPSIZE, /* 594 */ IC_VEX_OPSIZE, /* 595 */ IC_VEX_OPSIZE, /* 596 */ IC_VEX_OPSIZE, /* 597 */ IC_VEX_OPSIZE, /* 598 */ IC_VEX_OPSIZE, /* 599 */ IC_VEX_W_OPSIZE, /* 600 */ IC_VEX_W_OPSIZE, /* 601 */ IC_VEX_W_OPSIZE, /* 602 */ IC_VEX_W_OPSIZE, /* 603 */ IC_VEX_W_OPSIZE, /* 604 */ IC_VEX_W_OPSIZE, /* 605 */ IC_VEX_W_OPSIZE, /* 606 */ IC_VEX_W_OPSIZE, /* 607 */ IC_VEX, /* 608 */ IC_VEX, /* 609 */ IC_VEX_XS, /* 610 */ IC_VEX_XS, /* 611 */ IC_VEX_XD, /* 612 */ IC_VEX_XD, /* 613 */ IC_VEX_XD, /* 614 */ IC_VEX_XD, /* 615 */ IC_VEX_W, /* 616 */ IC_VEX_W, /* 617 */ IC_VEX_W_XS, /* 618 */ IC_VEX_W_XS, /* 619 */ IC_VEX_W_XD, /* 620 */ IC_VEX_W_XD, /* 621 */ IC_VEX_W_XD, /* 622 */ IC_VEX_W_XD, /* 623 */ IC_VEX_OPSIZE, /* 624 */ IC_VEX_OPSIZE, /* 625 */ IC_VEX_OPSIZE, /* 626 */ IC_VEX_OPSIZE, /* 627 */ IC_VEX_OPSIZE, /* 628 */ IC_VEX_OPSIZE, /* 629 */ IC_VEX_OPSIZE, /* 630 */ IC_VEX_OPSIZE, /* 631 */ IC_VEX_W_OPSIZE, /* 632 */ IC_VEX_W_OPSIZE, /* 633 */ IC_VEX_W_OPSIZE, /* 634 */ IC_VEX_W_OPSIZE, /* 635 */ IC_VEX_W_OPSIZE, /* 636 */ IC_VEX_W_OPSIZE, /* 637 */ IC_VEX_W_OPSIZE, /* 638 */ IC_VEX_W_OPSIZE, /* 639 */ IC_VEX_L, /* 640 */ IC_VEX_L, /* 641 */ IC_VEX_L_XS, /* 642 */ IC_VEX_L_XS, /* 643 */ IC_VEX_L_XD, /* 644 */ IC_VEX_L_XD, /* 645 */ IC_VEX_L_XD, /* 646 */ IC_VEX_L_XD, /* 647 */ IC_VEX_L_W, /* 648 */ IC_VEX_L_W, /* 649 */ IC_VEX_L_W_XS, /* 650 */ IC_VEX_L_W_XS, /* 651 */ IC_VEX_L_W_XD, /* 652 */ IC_VEX_L_W_XD, /* 653 */ IC_VEX_L_W_XD, /* 654 */ IC_VEX_L_W_XD, /* 655 */ IC_VEX_L_OPSIZE, /* 656 */ IC_VEX_L_OPSIZE, /* 657 */ IC_VEX_L_OPSIZE, /* 658 */ IC_VEX_L_OPSIZE, /* 659 */ IC_VEX_L_OPSIZE, /* 660 */ IC_VEX_L_OPSIZE, /* 661 */ IC_VEX_L_OPSIZE, /* 662 */ IC_VEX_L_OPSIZE, /* 663 */ IC_VEX_L_W_OPSIZE, /* 664 */ IC_VEX_L_W_OPSIZE, /* 665 */ IC_VEX_L_W_OPSIZE, /* 666 */ IC_VEX_L_W_OPSIZE, /* 667 */ IC_VEX_L_W_OPSIZE, /* 668 */ IC_VEX_L_W_OPSIZE, /* 669 */ IC_VEX_L_W_OPSIZE, /* 670 */ IC_VEX_L_W_OPSIZE, /* 671 */ IC_VEX_L, /* 672 */ IC_VEX_L, /* 673 */ IC_VEX_L_XS, /* 674 */ IC_VEX_L_XS, /* 675 */ IC_VEX_L_XD, /* 676 */ IC_VEX_L_XD, /* 677 */ IC_VEX_L_XD, /* 678 */ IC_VEX_L_XD, /* 679 */ IC_VEX_L_W, /* 680 */ IC_VEX_L_W, /* 681 */ IC_VEX_L_W_XS, /* 682 */ IC_VEX_L_W_XS, /* 683 */ IC_VEX_L_W_XD, /* 684 */ IC_VEX_L_W_XD, /* 685 */ IC_VEX_L_W_XD, /* 686 */ IC_VEX_L_W_XD, /* 687 */ IC_VEX_L_OPSIZE, /* 688 */ IC_VEX_L_OPSIZE, /* 689 */ IC_VEX_L_OPSIZE, /* 690 */ IC_VEX_L_OPSIZE, /* 691 */ IC_VEX_L_OPSIZE, /* 692 */ IC_VEX_L_OPSIZE, /* 693 */ IC_VEX_L_OPSIZE, /* 694 */ IC_VEX_L_OPSIZE, /* 695 */ IC_VEX_L_W_OPSIZE, /* 696 */ IC_VEX_L_W_OPSIZE, /* 697 */ IC_VEX_L_W_OPSIZE, /* 698 */ IC_VEX_L_W_OPSIZE, /* 699 */ IC_VEX_L_W_OPSIZE, /* 700 */ IC_VEX_L_W_OPSIZE, /* 701 */ IC_VEX_L_W_OPSIZE, /* 702 */ IC_VEX_L_W_OPSIZE, /* 703 */ IC_VEX_L, /* 704 */ IC_VEX_L, /* 705 */ IC_VEX_L_XS, /* 706 */ IC_VEX_L_XS, /* 707 */ IC_VEX_L_XD, /* 708 */ IC_VEX_L_XD, /* 709 */ IC_VEX_L_XD, /* 710 */ IC_VEX_L_XD, /* 711 */ IC_VEX_L_W, /* 712 */ IC_VEX_L_W, /* 713 */ IC_VEX_L_W_XS, /* 714 */ IC_VEX_L_W_XS, /* 715 */ IC_VEX_L_W_XD, /* 716 */ IC_VEX_L_W_XD, /* 717 */ IC_VEX_L_W_XD, /* 718 */ IC_VEX_L_W_XD, /* 719 */ IC_VEX_L_OPSIZE, /* 720 */ IC_VEX_L_OPSIZE, /* 721 */ IC_VEX_L_OPSIZE, /* 722 */ IC_VEX_L_OPSIZE, /* 723 */ IC_VEX_L_OPSIZE, /* 724 */ IC_VEX_L_OPSIZE, /* 725 */ IC_VEX_L_OPSIZE, /* 726 */ IC_VEX_L_OPSIZE, /* 727 */ IC_VEX_L_W_OPSIZE, /* 728 */ IC_VEX_L_W_OPSIZE, /* 729 */ IC_VEX_L_W_OPSIZE, /* 730 */ IC_VEX_L_W_OPSIZE, /* 731 */ IC_VEX_L_W_OPSIZE, /* 732 */ IC_VEX_L_W_OPSIZE, /* 733 */ IC_VEX_L_W_OPSIZE, /* 734 */ IC_VEX_L_W_OPSIZE, /* 735 */ IC_VEX_L, /* 736 */ IC_VEX_L, /* 737 */ IC_VEX_L_XS, /* 738 */ IC_VEX_L_XS, /* 739 */ IC_VEX_L_XD, /* 740 */ IC_VEX_L_XD, /* 741 */ IC_VEX_L_XD, /* 742 */ IC_VEX_L_XD, /* 743 */ IC_VEX_L_W, /* 744 */ IC_VEX_L_W, /* 745 */ IC_VEX_L_W_XS, /* 746 */ IC_VEX_L_W_XS, /* 747 */ IC_VEX_L_W_XD, /* 748 */ IC_VEX_L_W_XD, /* 749 */ IC_VEX_L_W_XD, /* 750 */ IC_VEX_L_W_XD, /* 751 */ IC_VEX_L_OPSIZE, /* 752 */ IC_VEX_L_OPSIZE, /* 753 */ IC_VEX_L_OPSIZE, /* 754 */ IC_VEX_L_OPSIZE, /* 755 */ IC_VEX_L_OPSIZE, /* 756 */ IC_VEX_L_OPSIZE, /* 757 */ IC_VEX_L_OPSIZE, /* 758 */ IC_VEX_L_OPSIZE, /* 759 */ IC_VEX_L_W_OPSIZE, /* 760 */ IC_VEX_L_W_OPSIZE, /* 761 */ IC_VEX_L_W_OPSIZE, /* 762 */ IC_VEX_L_W_OPSIZE, /* 763 */ IC_VEX_L_W_OPSIZE, /* 764 */ IC_VEX_L_W_OPSIZE, /* 765 */ IC_VEX_L_W_OPSIZE, /* 766 */ IC_VEX_L_W_OPSIZE, /* 767 */ IC_EVEX_L, /* 768 */ IC_EVEX_L, /* 769 */ IC_EVEX_L_XS, /* 770 */ IC_EVEX_L_XS, /* 771 */ IC_EVEX_L_XD, /* 772 */ IC_EVEX_L_XD, /* 773 */ IC_EVEX_L_XD, /* 774 */ IC_EVEX_L_XD, /* 775 */ IC_EVEX_L_W, /* 776 */ IC_EVEX_L_W, /* 777 */ IC_EVEX_L_W_XS, /* 778 */ IC_EVEX_L_W_XS, /* 779 */ IC_EVEX_L_W_XD, /* 780 */ IC_EVEX_L_W_XD, /* 781 */ IC_EVEX_L_W_XD, /* 782 */ IC_EVEX_L_W_XD, /* 783 */ IC_EVEX_L_OPSIZE, /* 784 */ IC_EVEX_L_OPSIZE, /* 785 */ IC_EVEX_L_OPSIZE, /* 786 */ IC_EVEX_L_OPSIZE, /* 787 */ IC_EVEX_L_OPSIZE, /* 788 */ IC_EVEX_L_OPSIZE, /* 789 */ IC_EVEX_L_OPSIZE, /* 790 */ IC_EVEX_L_OPSIZE, /* 791 */ IC_EVEX_L_W_OPSIZE, /* 792 */ IC_EVEX_L_W_OPSIZE, /* 793 */ IC_EVEX_L_W_OPSIZE, /* 794 */ IC_EVEX_L_W_OPSIZE, /* 795 */ IC_EVEX_L_W_OPSIZE, /* 796 */ IC_EVEX_L_W_OPSIZE, /* 797 */ IC_EVEX_L_W_OPSIZE, /* 798 */ IC_EVEX_L_W_OPSIZE, /* 799 */ IC_EVEX_L, /* 800 */ IC_EVEX_L, /* 801 */ IC_EVEX_L_XS, /* 802 */ IC_EVEX_L_XS, /* 803 */ IC_EVEX_L_XD, /* 804 */ IC_EVEX_L_XD, /* 805 */ IC_EVEX_L_XD, /* 806 */ IC_EVEX_L_XD, /* 807 */ IC_EVEX_L_W, /* 808 */ IC_EVEX_L_W, /* 809 */ IC_EVEX_L_W_XS, /* 810 */ IC_EVEX_L_W_XS, /* 811 */ IC_EVEX_L_W_XD, /* 812 */ IC_EVEX_L_W_XD, /* 813 */ IC_EVEX_L_W_XD, /* 814 */ IC_EVEX_L_W_XD, /* 815 */ IC_EVEX_L_OPSIZE, /* 816 */ IC_EVEX_L_OPSIZE, /* 817 */ IC_EVEX_L_OPSIZE, /* 818 */ IC_EVEX_L_OPSIZE, /* 819 */ IC_EVEX_L_OPSIZE, /* 820 */ IC_EVEX_L_OPSIZE, /* 821 */ IC_EVEX_L_OPSIZE, /* 822 */ IC_EVEX_L_OPSIZE, /* 823 */ IC_EVEX_L_W_OPSIZE, /* 824 */ IC_EVEX_L_W_OPSIZE, /* 825 */ IC_EVEX_L_W_OPSIZE, /* 826 */ IC_EVEX_L_W_OPSIZE, /* 827 */ IC_EVEX_L_W_OPSIZE, /* 828 */ IC_EVEX_L_W_OPSIZE, /* 829 */ IC_EVEX_L_W_OPSIZE, /* 830 */ IC_EVEX_L_W_OPSIZE, /* 831 */ IC_EVEX_L, /* 832 */ IC_EVEX_L, /* 833 */ IC_EVEX_L_XS, /* 834 */ IC_EVEX_L_XS, /* 835 */ IC_EVEX_L_XD, /* 836 */ IC_EVEX_L_XD, /* 837 */ IC_EVEX_L_XD, /* 838 */ IC_EVEX_L_XD, /* 839 */ IC_EVEX_L_W, /* 840 */ IC_EVEX_L_W, /* 841 */ IC_EVEX_L_W_XS, /* 842 */ IC_EVEX_L_W_XS, /* 843 */ IC_EVEX_L_W_XD, /* 844 */ IC_EVEX_L_W_XD, /* 845 */ IC_EVEX_L_W_XD, /* 846 */ IC_EVEX_L_W_XD, /* 847 */ IC_EVEX_L_OPSIZE, /* 848 */ IC_EVEX_L_OPSIZE, /* 849 */ IC_EVEX_L_OPSIZE, /* 850 */ IC_EVEX_L_OPSIZE, /* 851 */ IC_EVEX_L_OPSIZE, /* 852 */ IC_EVEX_L_OPSIZE, /* 853 */ IC_EVEX_L_OPSIZE, /* 854 */ IC_EVEX_L_OPSIZE, /* 855 */ IC_EVEX_L_W_OPSIZE, /* 856 */ IC_EVEX_L_W_OPSIZE, /* 857 */ IC_EVEX_L_W_OPSIZE, /* 858 */ IC_EVEX_L_W_OPSIZE, /* 859 */ IC_EVEX_L_W_OPSIZE, /* 860 */ IC_EVEX_L_W_OPSIZE, /* 861 */ IC_EVEX_L_W_OPSIZE, /* 862 */ IC_EVEX_L_W_OPSIZE, /* 863 */ IC_EVEX_L, /* 864 */ IC_EVEX_L, /* 865 */ IC_EVEX_L_XS, /* 866 */ IC_EVEX_L_XS, /* 867 */ IC_EVEX_L_XD, /* 868 */ IC_EVEX_L_XD, /* 869 */ IC_EVEX_L_XD, /* 870 */ IC_EVEX_L_XD, /* 871 */ IC_EVEX_L_W, /* 872 */ IC_EVEX_L_W, /* 873 */ IC_EVEX_L_W_XS, /* 874 */ IC_EVEX_L_W_XS, /* 875 */ IC_EVEX_L_W_XD, /* 876 */ IC_EVEX_L_W_XD, /* 877 */ IC_EVEX_L_W_XD, /* 878 */ IC_EVEX_L_W_XD, /* 879 */ IC_EVEX_L_OPSIZE, /* 880 */ IC_EVEX_L_OPSIZE, /* 881 */ IC_EVEX_L_OPSIZE, /* 882 */ IC_EVEX_L_OPSIZE, /* 883 */ IC_EVEX_L_OPSIZE, /* 884 */ IC_EVEX_L_OPSIZE, /* 885 */ IC_EVEX_L_OPSIZE, /* 886 */ IC_EVEX_L_OPSIZE, /* 887 */ IC_EVEX_L_W_OPSIZE, /* 888 */ IC_EVEX_L_W_OPSIZE, /* 889 */ IC_EVEX_L_W_OPSIZE, /* 890 */ IC_EVEX_L_W_OPSIZE, /* 891 */ IC_EVEX_L_W_OPSIZE, /* 892 */ IC_EVEX_L_W_OPSIZE, /* 893 */ IC_EVEX_L_W_OPSIZE, /* 894 */ IC_EVEX_L_W_OPSIZE, /* 895 */ IC_EVEX_L, /* 896 */ IC_EVEX_L, /* 897 */ IC_EVEX_L_XS, /* 898 */ IC_EVEX_L_XS, /* 899 */ IC_EVEX_L_XD, /* 900 */ IC_EVEX_L_XD, /* 901 */ IC_EVEX_L_XD, /* 902 */ IC_EVEX_L_XD, /* 903 */ IC_EVEX_L_W, /* 904 */ IC_EVEX_L_W, /* 905 */ IC_EVEX_L_W_XS, /* 906 */ IC_EVEX_L_W_XS, /* 907 */ IC_EVEX_L_W_XD, /* 908 */ IC_EVEX_L_W_XD, /* 909 */ IC_EVEX_L_W_XD, /* 910 */ IC_EVEX_L_W_XD, /* 911 */ IC_EVEX_L_OPSIZE, /* 912 */ IC_EVEX_L_OPSIZE, /* 913 */ IC_EVEX_L_OPSIZE, /* 914 */ IC_EVEX_L_OPSIZE, /* 915 */ IC_EVEX_L_OPSIZE, /* 916 */ IC_EVEX_L_OPSIZE, /* 917 */ IC_EVEX_L_OPSIZE, /* 918 */ IC_EVEX_L_OPSIZE, /* 919 */ IC_EVEX_L_W_OPSIZE, /* 920 */ IC_EVEX_L_W_OPSIZE, /* 921 */ IC_EVEX_L_W_OPSIZE, /* 922 */ IC_EVEX_L_W_OPSIZE, /* 923 */ IC_EVEX_L_W_OPSIZE, /* 924 */ IC_EVEX_L_W_OPSIZE, /* 925 */ IC_EVEX_L_W_OPSIZE, /* 926 */ IC_EVEX_L_W_OPSIZE, /* 927 */ IC_EVEX_L, /* 928 */ IC_EVEX_L, /* 929 */ IC_EVEX_L_XS, /* 930 */ IC_EVEX_L_XS, /* 931 */ IC_EVEX_L_XD, /* 932 */ IC_EVEX_L_XD, /* 933 */ IC_EVEX_L_XD, /* 934 */ IC_EVEX_L_XD, /* 935 */ IC_EVEX_L_W, /* 936 */ IC_EVEX_L_W, /* 937 */ IC_EVEX_L_W_XS, /* 938 */ IC_EVEX_L_W_XS, /* 939 */ IC_EVEX_L_W_XD, /* 940 */ IC_EVEX_L_W_XD, /* 941 */ IC_EVEX_L_W_XD, /* 942 */ IC_EVEX_L_W_XD, /* 943 */ IC_EVEX_L_OPSIZE, /* 944 */ IC_EVEX_L_OPSIZE, /* 945 */ IC_EVEX_L_OPSIZE, /* 946 */ IC_EVEX_L_OPSIZE, /* 947 */ IC_EVEX_L_OPSIZE, /* 948 */ IC_EVEX_L_OPSIZE, /* 949 */ IC_EVEX_L_OPSIZE, /* 950 */ IC_EVEX_L_OPSIZE, /* 951 */ IC_EVEX_L_W_OPSIZE, /* 952 */ IC_EVEX_L_W_OPSIZE, /* 953 */ IC_EVEX_L_W_OPSIZE, /* 954 */ IC_EVEX_L_W_OPSIZE, /* 955 */ IC_EVEX_L_W_OPSIZE, /* 956 */ IC_EVEX_L_W_OPSIZE, /* 957 */ IC_EVEX_L_W_OPSIZE, /* 958 */ IC_EVEX_L_W_OPSIZE, /* 959 */ IC_EVEX_L, /* 960 */ IC_EVEX_L, /* 961 */ IC_EVEX_L_XS, /* 962 */ IC_EVEX_L_XS, /* 963 */ IC_EVEX_L_XD, /* 964 */ IC_EVEX_L_XD, /* 965 */ IC_EVEX_L_XD, /* 966 */ IC_EVEX_L_XD, /* 967 */ IC_EVEX_L_W, /* 968 */ IC_EVEX_L_W, /* 969 */ IC_EVEX_L_W_XS, /* 970 */ IC_EVEX_L_W_XS, /* 971 */ IC_EVEX_L_W_XD, /* 972 */ IC_EVEX_L_W_XD, /* 973 */ IC_EVEX_L_W_XD, /* 974 */ IC_EVEX_L_W_XD, /* 975 */ IC_EVEX_L_OPSIZE, /* 976 */ IC_EVEX_L_OPSIZE, /* 977 */ IC_EVEX_L_OPSIZE, /* 978 */ IC_EVEX_L_OPSIZE, /* 979 */ IC_EVEX_L_OPSIZE, /* 980 */ IC_EVEX_L_OPSIZE, /* 981 */ IC_EVEX_L_OPSIZE, /* 982 */ IC_EVEX_L_OPSIZE, /* 983 */ IC_EVEX_L_W_OPSIZE, /* 984 */ IC_EVEX_L_W_OPSIZE, /* 985 */ IC_EVEX_L_W_OPSIZE, /* 986 */ IC_EVEX_L_W_OPSIZE, /* 987 */ IC_EVEX_L_W_OPSIZE, /* 988 */ IC_EVEX_L_W_OPSIZE, /* 989 */ IC_EVEX_L_W_OPSIZE, /* 990 */ IC_EVEX_L_W_OPSIZE, /* 991 */ IC_EVEX_L, /* 992 */ IC_EVEX_L, /* 993 */ IC_EVEX_L_XS, /* 994 */ IC_EVEX_L_XS, /* 995 */ IC_EVEX_L_XD, /* 996 */ IC_EVEX_L_XD, /* 997 */ IC_EVEX_L_XD, /* 998 */ IC_EVEX_L_XD, /* 999 */ IC_EVEX_L_W, /* 1000 */ IC_EVEX_L_W, /* 1001 */ IC_EVEX_L_W_XS, /* 1002 */ IC_EVEX_L_W_XS, /* 1003 */ IC_EVEX_L_W_XD, /* 1004 */ IC_EVEX_L_W_XD, /* 1005 */ IC_EVEX_L_W_XD, /* 1006 */ IC_EVEX_L_W_XD, /* 1007 */ IC_EVEX_L_OPSIZE, /* 1008 */ IC_EVEX_L_OPSIZE, /* 1009 */ IC_EVEX_L_OPSIZE, /* 1010 */ IC_EVEX_L_OPSIZE, /* 1011 */ IC_EVEX_L_OPSIZE, /* 1012 */ IC_EVEX_L_OPSIZE, /* 1013 */ IC_EVEX_L_OPSIZE, /* 1014 */ IC_EVEX_L_OPSIZE, /* 1015 */ IC_EVEX_L_W_OPSIZE, /* 1016 */ IC_EVEX_L_W_OPSIZE, /* 1017 */ IC_EVEX_L_W_OPSIZE, /* 1018 */ IC_EVEX_L_W_OPSIZE, /* 1019 */ IC_EVEX_L_W_OPSIZE, /* 1020 */ IC_EVEX_L_W_OPSIZE, /* 1021 */ IC_EVEX_L_W_OPSIZE, /* 1022 */ IC_EVEX_L_W_OPSIZE, /* 1023 */ IC, /* 1024 */ IC_64BIT, /* 1025 */ IC_XS, /* 1026 */ IC_64BIT_XS, /* 1027 */ IC_XD, /* 1028 */ IC_64BIT_XD, /* 1029 */ IC_XS, /* 1030 */ IC_64BIT_XS, /* 1031 */ IC, /* 1032 */ IC_64BIT_REXW, /* 1033 */ IC_XS, /* 1034 */ IC_64BIT_REXW_XS, /* 1035 */ IC_XD, /* 1036 */ IC_64BIT_REXW_XD, /* 1037 */ IC_XS, /* 1038 */ IC_64BIT_REXW_XS, /* 1039 */ IC_OPSIZE, /* 1040 */ IC_64BIT_OPSIZE, /* 1041 */ IC_XS_OPSIZE, /* 1042 */ IC_64BIT_XS_OPSIZE, /* 1043 */ IC_XD_OPSIZE, /* 1044 */ IC_64BIT_XD_OPSIZE, /* 1045 */ IC_XS_OPSIZE, /* 1046 */ IC_64BIT_XD_OPSIZE, /* 1047 */ IC_OPSIZE, /* 1048 */ IC_64BIT_REXW_OPSIZE, /* 1049 */ IC_XS_OPSIZE, /* 1050 */ IC_64BIT_REXW_XS, /* 1051 */ IC_XD_OPSIZE, /* 1052 */ IC_64BIT_REXW_XD, /* 1053 */ IC_XS_OPSIZE, /* 1054 */ IC_64BIT_REXW_XS, /* 1055 */ IC_ADSIZE, /* 1056 */ IC_64BIT_ADSIZE, /* 1057 */ IC_XS, /* 1058 */ IC_64BIT_XS, /* 1059 */ IC_XD, /* 1060 */ IC_64BIT_XD, /* 1061 */ IC_XS, /* 1062 */ IC_64BIT_XS, /* 1063 */ IC_ADSIZE, /* 1064 */ IC_64BIT_REXW_ADSIZE, /* 1065 */ IC_XS, /* 1066 */ IC_64BIT_REXW_XS, /* 1067 */ IC_XD, /* 1068 */ IC_64BIT_REXW_XD, /* 1069 */ IC_XS, /* 1070 */ IC_64BIT_REXW_XS, /* 1071 */ IC_OPSIZE_ADSIZE, /* 1072 */ IC_64BIT_OPSIZE_ADSIZE, /* 1073 */ IC_XS_OPSIZE, /* 1074 */ IC_64BIT_XS_OPSIZE, /* 1075 */ IC_XD_OPSIZE, /* 1076 */ IC_64BIT_XD_OPSIZE, /* 1077 */ IC_XS_OPSIZE, /* 1078 */ IC_64BIT_XD_OPSIZE, /* 1079 */ IC_OPSIZE_ADSIZE, /* 1080 */ IC_64BIT_REXW_OPSIZE, /* 1081 */ IC_XS_OPSIZE, /* 1082 */ IC_64BIT_REXW_XS, /* 1083 */ IC_XD_OPSIZE, /* 1084 */ IC_64BIT_REXW_XD, /* 1085 */ IC_XS_OPSIZE, /* 1086 */ IC_64BIT_REXW_XS, /* 1087 */ IC_VEX, /* 1088 */ IC_VEX, /* 1089 */ IC_VEX_XS, /* 1090 */ IC_VEX_XS, /* 1091 */ IC_VEX_XD, /* 1092 */ IC_VEX_XD, /* 1093 */ IC_VEX_XD, /* 1094 */ IC_VEX_XD, /* 1095 */ IC_VEX_W, /* 1096 */ IC_VEX_W, /* 1097 */ IC_VEX_W_XS, /* 1098 */ IC_VEX_W_XS, /* 1099 */ IC_VEX_W_XD, /* 1100 */ IC_VEX_W_XD, /* 1101 */ IC_VEX_W_XD, /* 1102 */ IC_VEX_W_XD, /* 1103 */ IC_VEX_OPSIZE, /* 1104 */ IC_VEX_OPSIZE, /* 1105 */ IC_VEX_OPSIZE, /* 1106 */ IC_VEX_OPSIZE, /* 1107 */ IC_VEX_OPSIZE, /* 1108 */ IC_VEX_OPSIZE, /* 1109 */ IC_VEX_OPSIZE, /* 1110 */ IC_VEX_OPSIZE, /* 1111 */ IC_VEX_W_OPSIZE, /* 1112 */ IC_VEX_W_OPSIZE, /* 1113 */ IC_VEX_W_OPSIZE, /* 1114 */ IC_VEX_W_OPSIZE, /* 1115 */ IC_VEX_W_OPSIZE, /* 1116 */ IC_VEX_W_OPSIZE, /* 1117 */ IC_VEX_W_OPSIZE, /* 1118 */ IC_VEX_W_OPSIZE, /* 1119 */ IC_VEX, /* 1120 */ IC_VEX, /* 1121 */ IC_VEX_XS, /* 1122 */ IC_VEX_XS, /* 1123 */ IC_VEX_XD, /* 1124 */ IC_VEX_XD, /* 1125 */ IC_VEX_XD, /* 1126 */ IC_VEX_XD, /* 1127 */ IC_VEX_W, /* 1128 */ IC_VEX_W, /* 1129 */ IC_VEX_W_XS, /* 1130 */ IC_VEX_W_XS, /* 1131 */ IC_VEX_W_XD, /* 1132 */ IC_VEX_W_XD, /* 1133 */ IC_VEX_W_XD, /* 1134 */ IC_VEX_W_XD, /* 1135 */ IC_VEX_OPSIZE, /* 1136 */ IC_VEX_OPSIZE, /* 1137 */ IC_VEX_OPSIZE, /* 1138 */ IC_VEX_OPSIZE, /* 1139 */ IC_VEX_OPSIZE, /* 1140 */ IC_VEX_OPSIZE, /* 1141 */ IC_VEX_OPSIZE, /* 1142 */ IC_VEX_OPSIZE, /* 1143 */ IC_VEX_W_OPSIZE, /* 1144 */ IC_VEX_W_OPSIZE, /* 1145 */ IC_VEX_W_OPSIZE, /* 1146 */ IC_VEX_W_OPSIZE, /* 1147 */ IC_VEX_W_OPSIZE, /* 1148 */ IC_VEX_W_OPSIZE, /* 1149 */ IC_VEX_W_OPSIZE, /* 1150 */ IC_VEX_W_OPSIZE, /* 1151 */ IC_VEX_L, /* 1152 */ IC_VEX_L, /* 1153 */ IC_VEX_L_XS, /* 1154 */ IC_VEX_L_XS, /* 1155 */ IC_VEX_L_XD, /* 1156 */ IC_VEX_L_XD, /* 1157 */ IC_VEX_L_XD, /* 1158 */ IC_VEX_L_XD, /* 1159 */ IC_VEX_L_W, /* 1160 */ IC_VEX_L_W, /* 1161 */ IC_VEX_L_W_XS, /* 1162 */ IC_VEX_L_W_XS, /* 1163 */ IC_VEX_L_W_XD, /* 1164 */ IC_VEX_L_W_XD, /* 1165 */ IC_VEX_L_W_XD, /* 1166 */ IC_VEX_L_W_XD, /* 1167 */ IC_VEX_L_OPSIZE, /* 1168 */ IC_VEX_L_OPSIZE, /* 1169 */ IC_VEX_L_OPSIZE, /* 1170 */ IC_VEX_L_OPSIZE, /* 1171 */ IC_VEX_L_OPSIZE, /* 1172 */ IC_VEX_L_OPSIZE, /* 1173 */ IC_VEX_L_OPSIZE, /* 1174 */ IC_VEX_L_OPSIZE, /* 1175 */ IC_VEX_L_W_OPSIZE, /* 1176 */ IC_VEX_L_W_OPSIZE, /* 1177 */ IC_VEX_L_W_OPSIZE, /* 1178 */ IC_VEX_L_W_OPSIZE, /* 1179 */ IC_VEX_L_W_OPSIZE, /* 1180 */ IC_VEX_L_W_OPSIZE, /* 1181 */ IC_VEX_L_W_OPSIZE, /* 1182 */ IC_VEX_L_W_OPSIZE, /* 1183 */ IC_VEX_L, /* 1184 */ IC_VEX_L, /* 1185 */ IC_VEX_L_XS, /* 1186 */ IC_VEX_L_XS, /* 1187 */ IC_VEX_L_XD, /* 1188 */ IC_VEX_L_XD, /* 1189 */ IC_VEX_L_XD, /* 1190 */ IC_VEX_L_XD, /* 1191 */ IC_VEX_L_W, /* 1192 */ IC_VEX_L_W, /* 1193 */ IC_VEX_L_W_XS, /* 1194 */ IC_VEX_L_W_XS, /* 1195 */ IC_VEX_L_W_XD, /* 1196 */ IC_VEX_L_W_XD, /* 1197 */ IC_VEX_L_W_XD, /* 1198 */ IC_VEX_L_W_XD, /* 1199 */ IC_VEX_L_OPSIZE, /* 1200 */ IC_VEX_L_OPSIZE, /* 1201 */ IC_VEX_L_OPSIZE, /* 1202 */ IC_VEX_L_OPSIZE, /* 1203 */ IC_VEX_L_OPSIZE, /* 1204 */ IC_VEX_L_OPSIZE, /* 1205 */ IC_VEX_L_OPSIZE, /* 1206 */ IC_VEX_L_OPSIZE, /* 1207 */ IC_VEX_L_W_OPSIZE, /* 1208 */ IC_VEX_L_W_OPSIZE, /* 1209 */ IC_VEX_L_W_OPSIZE, /* 1210 */ IC_VEX_L_W_OPSIZE, /* 1211 */ IC_VEX_L_W_OPSIZE, /* 1212 */ IC_VEX_L_W_OPSIZE, /* 1213 */ IC_VEX_L_W_OPSIZE, /* 1214 */ IC_VEX_L_W_OPSIZE, /* 1215 */ IC_VEX_L, /* 1216 */ IC_VEX_L, /* 1217 */ IC_VEX_L_XS, /* 1218 */ IC_VEX_L_XS, /* 1219 */ IC_VEX_L_XD, /* 1220 */ IC_VEX_L_XD, /* 1221 */ IC_VEX_L_XD, /* 1222 */ IC_VEX_L_XD, /* 1223 */ IC_VEX_L_W, /* 1224 */ IC_VEX_L_W, /* 1225 */ IC_VEX_L_W_XS, /* 1226 */ IC_VEX_L_W_XS, /* 1227 */ IC_VEX_L_W_XD, /* 1228 */ IC_VEX_L_W_XD, /* 1229 */ IC_VEX_L_W_XD, /* 1230 */ IC_VEX_L_W_XD, /* 1231 */ IC_VEX_L_OPSIZE, /* 1232 */ IC_VEX_L_OPSIZE, /* 1233 */ IC_VEX_L_OPSIZE, /* 1234 */ IC_VEX_L_OPSIZE, /* 1235 */ IC_VEX_L_OPSIZE, /* 1236 */ IC_VEX_L_OPSIZE, /* 1237 */ IC_VEX_L_OPSIZE, /* 1238 */ IC_VEX_L_OPSIZE, /* 1239 */ IC_VEX_L_W_OPSIZE, /* 1240 */ IC_VEX_L_W_OPSIZE, /* 1241 */ IC_VEX_L_W_OPSIZE, /* 1242 */ IC_VEX_L_W_OPSIZE, /* 1243 */ IC_VEX_L_W_OPSIZE, /* 1244 */ IC_VEX_L_W_OPSIZE, /* 1245 */ IC_VEX_L_W_OPSIZE, /* 1246 */ IC_VEX_L_W_OPSIZE, /* 1247 */ IC_VEX_L, /* 1248 */ IC_VEX_L, /* 1249 */ IC_VEX_L_XS, /* 1250 */ IC_VEX_L_XS, /* 1251 */ IC_VEX_L_XD, /* 1252 */ IC_VEX_L_XD, /* 1253 */ IC_VEX_L_XD, /* 1254 */ IC_VEX_L_XD, /* 1255 */ IC_VEX_L_W, /* 1256 */ IC_VEX_L_W, /* 1257 */ IC_VEX_L_W_XS, /* 1258 */ IC_VEX_L_W_XS, /* 1259 */ IC_VEX_L_W_XD, /* 1260 */ IC_VEX_L_W_XD, /* 1261 */ IC_VEX_L_W_XD, /* 1262 */ IC_VEX_L_W_XD, /* 1263 */ IC_VEX_L_OPSIZE, /* 1264 */ IC_VEX_L_OPSIZE, /* 1265 */ IC_VEX_L_OPSIZE, /* 1266 */ IC_VEX_L_OPSIZE, /* 1267 */ IC_VEX_L_OPSIZE, /* 1268 */ IC_VEX_L_OPSIZE, /* 1269 */ IC_VEX_L_OPSIZE, /* 1270 */ IC_VEX_L_OPSIZE, /* 1271 */ IC_VEX_L_W_OPSIZE, /* 1272 */ IC_VEX_L_W_OPSIZE, /* 1273 */ IC_VEX_L_W_OPSIZE, /* 1274 */ IC_VEX_L_W_OPSIZE, /* 1275 */ IC_VEX_L_W_OPSIZE, /* 1276 */ IC_VEX_L_W_OPSIZE, /* 1277 */ IC_VEX_L_W_OPSIZE, /* 1278 */ IC_VEX_L_W_OPSIZE, /* 1279 */ IC_EVEX_L2, /* 1280 */ IC_EVEX_L2, /* 1281 */ IC_EVEX_L2_XS, /* 1282 */ IC_EVEX_L2_XS, /* 1283 */ IC_EVEX_L2_XD, /* 1284 */ IC_EVEX_L2_XD, /* 1285 */ IC_EVEX_L2_XD, /* 1286 */ IC_EVEX_L2_XD, /* 1287 */ IC_EVEX_L2_W, /* 1288 */ IC_EVEX_L2_W, /* 1289 */ IC_EVEX_L2_W_XS, /* 1290 */ IC_EVEX_L2_W_XS, /* 1291 */ IC_EVEX_L2_W_XD, /* 1292 */ IC_EVEX_L2_W_XD, /* 1293 */ IC_EVEX_L2_W_XD, /* 1294 */ IC_EVEX_L2_W_XD, /* 1295 */ IC_EVEX_L2_OPSIZE, /* 1296 */ IC_EVEX_L2_OPSIZE, /* 1297 */ IC_EVEX_L2_OPSIZE, /* 1298 */ IC_EVEX_L2_OPSIZE, /* 1299 */ IC_EVEX_L2_OPSIZE, /* 1300 */ IC_EVEX_L2_OPSIZE, /* 1301 */ IC_EVEX_L2_OPSIZE, /* 1302 */ IC_EVEX_L2_OPSIZE, /* 1303 */ IC_EVEX_L2_W_OPSIZE, /* 1304 */ IC_EVEX_L2_W_OPSIZE, /* 1305 */ IC_EVEX_L2_W_OPSIZE, /* 1306 */ IC_EVEX_L2_W_OPSIZE, /* 1307 */ IC_EVEX_L2_W_OPSIZE, /* 1308 */ IC_EVEX_L2_W_OPSIZE, /* 1309 */ IC_EVEX_L2_W_OPSIZE, /* 1310 */ IC_EVEX_L2_W_OPSIZE, /* 1311 */ IC_EVEX_L2, /* 1312 */ IC_EVEX_L2, /* 1313 */ IC_EVEX_L2_XS, /* 1314 */ IC_EVEX_L2_XS, /* 1315 */ IC_EVEX_L2_XD, /* 1316 */ IC_EVEX_L2_XD, /* 1317 */ IC_EVEX_L2_XD, /* 1318 */ IC_EVEX_L2_XD, /* 1319 */ IC_EVEX_L2_W, /* 1320 */ IC_EVEX_L2_W, /* 1321 */ IC_EVEX_L2_W_XS, /* 1322 */ IC_EVEX_L2_W_XS, /* 1323 */ IC_EVEX_L2_W_XD, /* 1324 */ IC_EVEX_L2_W_XD, /* 1325 */ IC_EVEX_L2_W_XD, /* 1326 */ IC_EVEX_L2_W_XD, /* 1327 */ IC_EVEX_L2_OPSIZE, /* 1328 */ IC_EVEX_L2_OPSIZE, /* 1329 */ IC_EVEX_L2_OPSIZE, /* 1330 */ IC_EVEX_L2_OPSIZE, /* 1331 */ IC_EVEX_L2_OPSIZE, /* 1332 */ IC_EVEX_L2_OPSIZE, /* 1333 */ IC_EVEX_L2_OPSIZE, /* 1334 */ IC_EVEX_L2_OPSIZE, /* 1335 */ IC_EVEX_L2_W_OPSIZE, /* 1336 */ IC_EVEX_L2_W_OPSIZE, /* 1337 */ IC_EVEX_L2_W_OPSIZE, /* 1338 */ IC_EVEX_L2_W_OPSIZE, /* 1339 */ IC_EVEX_L2_W_OPSIZE, /* 1340 */ IC_EVEX_L2_W_OPSIZE, /* 1341 */ IC_EVEX_L2_W_OPSIZE, /* 1342 */ IC_EVEX_L2_W_OPSIZE, /* 1343 */ IC_EVEX_L2, /* 1344 */ IC_EVEX_L2, /* 1345 */ IC_EVEX_L2_XS, /* 1346 */ IC_EVEX_L2_XS, /* 1347 */ IC_EVEX_L2_XD, /* 1348 */ IC_EVEX_L2_XD, /* 1349 */ IC_EVEX_L2_XD, /* 1350 */ IC_EVEX_L2_XD, /* 1351 */ IC_EVEX_L2_W, /* 1352 */ IC_EVEX_L2_W, /* 1353 */ IC_EVEX_L2_W_XS, /* 1354 */ IC_EVEX_L2_W_XS, /* 1355 */ IC_EVEX_L2_W_XD, /* 1356 */ IC_EVEX_L2_W_XD, /* 1357 */ IC_EVEX_L2_W_XD, /* 1358 */ IC_EVEX_L2_W_XD, /* 1359 */ IC_EVEX_L2_OPSIZE, /* 1360 */ IC_EVEX_L2_OPSIZE, /* 1361 */ IC_EVEX_L2_OPSIZE, /* 1362 */ IC_EVEX_L2_OPSIZE, /* 1363 */ IC_EVEX_L2_OPSIZE, /* 1364 */ IC_EVEX_L2_OPSIZE, /* 1365 */ IC_EVEX_L2_OPSIZE, /* 1366 */ IC_EVEX_L2_OPSIZE, /* 1367 */ IC_EVEX_L2_W_OPSIZE, /* 1368 */ IC_EVEX_L2_W_OPSIZE, /* 1369 */ IC_EVEX_L2_W_OPSIZE, /* 1370 */ IC_EVEX_L2_W_OPSIZE, /* 1371 */ IC_EVEX_L2_W_OPSIZE, /* 1372 */ IC_EVEX_L2_W_OPSIZE, /* 1373 */ IC_EVEX_L2_W_OPSIZE, /* 1374 */ IC_EVEX_L2_W_OPSIZE, /* 1375 */ IC_EVEX_L2, /* 1376 */ IC_EVEX_L2, /* 1377 */ IC_EVEX_L2_XS, /* 1378 */ IC_EVEX_L2_XS, /* 1379 */ IC_EVEX_L2_XD, /* 1380 */ IC_EVEX_L2_XD, /* 1381 */ IC_EVEX_L2_XD, /* 1382 */ IC_EVEX_L2_XD, /* 1383 */ IC_EVEX_L2_W, /* 1384 */ IC_EVEX_L2_W, /* 1385 */ IC_EVEX_L2_W_XS, /* 1386 */ IC_EVEX_L2_W_XS, /* 1387 */ IC_EVEX_L2_W_XD, /* 1388 */ IC_EVEX_L2_W_XD, /* 1389 */ IC_EVEX_L2_W_XD, /* 1390 */ IC_EVEX_L2_W_XD, /* 1391 */ IC_EVEX_L2_OPSIZE, /* 1392 */ IC_EVEX_L2_OPSIZE, /* 1393 */ IC_EVEX_L2_OPSIZE, /* 1394 */ IC_EVEX_L2_OPSIZE, /* 1395 */ IC_EVEX_L2_OPSIZE, /* 1396 */ IC_EVEX_L2_OPSIZE, /* 1397 */ IC_EVEX_L2_OPSIZE, /* 1398 */ IC_EVEX_L2_OPSIZE, /* 1399 */ IC_EVEX_L2_W_OPSIZE, /* 1400 */ IC_EVEX_L2_W_OPSIZE, /* 1401 */ IC_EVEX_L2_W_OPSIZE, /* 1402 */ IC_EVEX_L2_W_OPSIZE, /* 1403 */ IC_EVEX_L2_W_OPSIZE, /* 1404 */ IC_EVEX_L2_W_OPSIZE, /* 1405 */ IC_EVEX_L2_W_OPSIZE, /* 1406 */ IC_EVEX_L2_W_OPSIZE, /* 1407 */ IC_EVEX_L2, /* 1408 */ IC_EVEX_L2, /* 1409 */ IC_EVEX_L2_XS, /* 1410 */ IC_EVEX_L2_XS, /* 1411 */ IC_EVEX_L2_XD, /* 1412 */ IC_EVEX_L2_XD, /* 1413 */ IC_EVEX_L2_XD, /* 1414 */ IC_EVEX_L2_XD, /* 1415 */ IC_EVEX_L2_W, /* 1416 */ IC_EVEX_L2_W, /* 1417 */ IC_EVEX_L2_W_XS, /* 1418 */ IC_EVEX_L2_W_XS, /* 1419 */ IC_EVEX_L2_W_XD, /* 1420 */ IC_EVEX_L2_W_XD, /* 1421 */ IC_EVEX_L2_W_XD, /* 1422 */ IC_EVEX_L2_W_XD, /* 1423 */ IC_EVEX_L2_OPSIZE, /* 1424 */ IC_EVEX_L2_OPSIZE, /* 1425 */ IC_EVEX_L2_OPSIZE, /* 1426 */ IC_EVEX_L2_OPSIZE, /* 1427 */ IC_EVEX_L2_OPSIZE, /* 1428 */ IC_EVEX_L2_OPSIZE, /* 1429 */ IC_EVEX_L2_OPSIZE, /* 1430 */ IC_EVEX_L2_OPSIZE, /* 1431 */ IC_EVEX_L2_W_OPSIZE, /* 1432 */ IC_EVEX_L2_W_OPSIZE, /* 1433 */ IC_EVEX_L2_W_OPSIZE, /* 1434 */ IC_EVEX_L2_W_OPSIZE, /* 1435 */ IC_EVEX_L2_W_OPSIZE, /* 1436 */ IC_EVEX_L2_W_OPSIZE, /* 1437 */ IC_EVEX_L2_W_OPSIZE, /* 1438 */ IC_EVEX_L2_W_OPSIZE, /* 1439 */ IC_EVEX_L2, /* 1440 */ IC_EVEX_L2, /* 1441 */ IC_EVEX_L2_XS, /* 1442 */ IC_EVEX_L2_XS, /* 1443 */ IC_EVEX_L2_XD, /* 1444 */ IC_EVEX_L2_XD, /* 1445 */ IC_EVEX_L2_XD, /* 1446 */ IC_EVEX_L2_XD, /* 1447 */ IC_EVEX_L2_W, /* 1448 */ IC_EVEX_L2_W, /* 1449 */ IC_EVEX_L2_W_XS, /* 1450 */ IC_EVEX_L2_W_XS, /* 1451 */ IC_EVEX_L2_W_XD, /* 1452 */ IC_EVEX_L2_W_XD, /* 1453 */ IC_EVEX_L2_W_XD, /* 1454 */ IC_EVEX_L2_W_XD, /* 1455 */ IC_EVEX_L2_OPSIZE, /* 1456 */ IC_EVEX_L2_OPSIZE, /* 1457 */ IC_EVEX_L2_OPSIZE, /* 1458 */ IC_EVEX_L2_OPSIZE, /* 1459 */ IC_EVEX_L2_OPSIZE, /* 1460 */ IC_EVEX_L2_OPSIZE, /* 1461 */ IC_EVEX_L2_OPSIZE, /* 1462 */ IC_EVEX_L2_OPSIZE, /* 1463 */ IC_EVEX_L2_W_OPSIZE, /* 1464 */ IC_EVEX_L2_W_OPSIZE, /* 1465 */ IC_EVEX_L2_W_OPSIZE, /* 1466 */ IC_EVEX_L2_W_OPSIZE, /* 1467 */ IC_EVEX_L2_W_OPSIZE, /* 1468 */ IC_EVEX_L2_W_OPSIZE, /* 1469 */ IC_EVEX_L2_W_OPSIZE, /* 1470 */ IC_EVEX_L2_W_OPSIZE, /* 1471 */ IC_EVEX_L2, /* 1472 */ IC_EVEX_L2, /* 1473 */ IC_EVEX_L2_XS, /* 1474 */ IC_EVEX_L2_XS, /* 1475 */ IC_EVEX_L2_XD, /* 1476 */ IC_EVEX_L2_XD, /* 1477 */ IC_EVEX_L2_XD, /* 1478 */ IC_EVEX_L2_XD, /* 1479 */ IC_EVEX_L2_W, /* 1480 */ IC_EVEX_L2_W, /* 1481 */ IC_EVEX_L2_W_XS, /* 1482 */ IC_EVEX_L2_W_XS, /* 1483 */ IC_EVEX_L2_W_XD, /* 1484 */ IC_EVEX_L2_W_XD, /* 1485 */ IC_EVEX_L2_W_XD, /* 1486 */ IC_EVEX_L2_W_XD, /* 1487 */ IC_EVEX_L2_OPSIZE, /* 1488 */ IC_EVEX_L2_OPSIZE, /* 1489 */ IC_EVEX_L2_OPSIZE, /* 1490 */ IC_EVEX_L2_OPSIZE, /* 1491 */ IC_EVEX_L2_OPSIZE, /* 1492 */ IC_EVEX_L2_OPSIZE, /* 1493 */ IC_EVEX_L2_OPSIZE, /* 1494 */ IC_EVEX_L2_OPSIZE, /* 1495 */ IC_EVEX_L2_W_OPSIZE, /* 1496 */ IC_EVEX_L2_W_OPSIZE, /* 1497 */ IC_EVEX_L2_W_OPSIZE, /* 1498 */ IC_EVEX_L2_W_OPSIZE, /* 1499 */ IC_EVEX_L2_W_OPSIZE, /* 1500 */ IC_EVEX_L2_W_OPSIZE, /* 1501 */ IC_EVEX_L2_W_OPSIZE, /* 1502 */ IC_EVEX_L2_W_OPSIZE, /* 1503 */ IC_EVEX_L2, /* 1504 */ IC_EVEX_L2, /* 1505 */ IC_EVEX_L2_XS, /* 1506 */ IC_EVEX_L2_XS, /* 1507 */ IC_EVEX_L2_XD, /* 1508 */ IC_EVEX_L2_XD, /* 1509 */ IC_EVEX_L2_XD, /* 1510 */ IC_EVEX_L2_XD, /* 1511 */ IC_EVEX_L2_W, /* 1512 */ IC_EVEX_L2_W, /* 1513 */ IC_EVEX_L2_W_XS, /* 1514 */ IC_EVEX_L2_W_XS, /* 1515 */ IC_EVEX_L2_W_XD, /* 1516 */ IC_EVEX_L2_W_XD, /* 1517 */ IC_EVEX_L2_W_XD, /* 1518 */ IC_EVEX_L2_W_XD, /* 1519 */ IC_EVEX_L2_OPSIZE, /* 1520 */ IC_EVEX_L2_OPSIZE, /* 1521 */ IC_EVEX_L2_OPSIZE, /* 1522 */ IC_EVEX_L2_OPSIZE, /* 1523 */ IC_EVEX_L2_OPSIZE, /* 1524 */ IC_EVEX_L2_OPSIZE, /* 1525 */ IC_EVEX_L2_OPSIZE, /* 1526 */ IC_EVEX_L2_OPSIZE, /* 1527 */ IC_EVEX_L2_W_OPSIZE, /* 1528 */ IC_EVEX_L2_W_OPSIZE, /* 1529 */ IC_EVEX_L2_W_OPSIZE, /* 1530 */ IC_EVEX_L2_W_OPSIZE, /* 1531 */ IC_EVEX_L2_W_OPSIZE, /* 1532 */ IC_EVEX_L2_W_OPSIZE, /* 1533 */ IC_EVEX_L2_W_OPSIZE, /* 1534 */ IC_EVEX_L2_W_OPSIZE, /* 1535 */ IC, /* 1536 */ IC_64BIT, /* 1537 */ IC_XS, /* 1538 */ IC_64BIT_XS, /* 1539 */ IC_XD, /* 1540 */ IC_64BIT_XD, /* 1541 */ IC_XS, /* 1542 */ IC_64BIT_XS, /* 1543 */ IC, /* 1544 */ IC_64BIT_REXW, /* 1545 */ IC_XS, /* 1546 */ IC_64BIT_REXW_XS, /* 1547 */ IC_XD, /* 1548 */ IC_64BIT_REXW_XD, /* 1549 */ IC_XS, /* 1550 */ IC_64BIT_REXW_XS, /* 1551 */ IC_OPSIZE, /* 1552 */ IC_64BIT_OPSIZE, /* 1553 */ IC_XS_OPSIZE, /* 1554 */ IC_64BIT_XS_OPSIZE, /* 1555 */ IC_XD_OPSIZE, /* 1556 */ IC_64BIT_XD_OPSIZE, /* 1557 */ IC_XS_OPSIZE, /* 1558 */ IC_64BIT_XD_OPSIZE, /* 1559 */ IC_OPSIZE, /* 1560 */ IC_64BIT_REXW_OPSIZE, /* 1561 */ IC_XS_OPSIZE, /* 1562 */ IC_64BIT_REXW_XS, /* 1563 */ IC_XD_OPSIZE, /* 1564 */ IC_64BIT_REXW_XD, /* 1565 */ IC_XS_OPSIZE, /* 1566 */ IC_64BIT_REXW_XS, /* 1567 */ IC_ADSIZE, /* 1568 */ IC_64BIT_ADSIZE, /* 1569 */ IC_XS, /* 1570 */ IC_64BIT_XS, /* 1571 */ IC_XD, /* 1572 */ IC_64BIT_XD, /* 1573 */ IC_XS, /* 1574 */ IC_64BIT_XS, /* 1575 */ IC_ADSIZE, /* 1576 */ IC_64BIT_REXW_ADSIZE, /* 1577 */ IC_XS, /* 1578 */ IC_64BIT_REXW_XS, /* 1579 */ IC_XD, /* 1580 */ IC_64BIT_REXW_XD, /* 1581 */ IC_XS, /* 1582 */ IC_64BIT_REXW_XS, /* 1583 */ IC_OPSIZE_ADSIZE, /* 1584 */ IC_64BIT_OPSIZE_ADSIZE, /* 1585 */ IC_XS_OPSIZE, /* 1586 */ IC_64BIT_XS_OPSIZE, /* 1587 */ IC_XD_OPSIZE, /* 1588 */ IC_64BIT_XD_OPSIZE, /* 1589 */ IC_XS_OPSIZE, /* 1590 */ IC_64BIT_XD_OPSIZE, /* 1591 */ IC_OPSIZE_ADSIZE, /* 1592 */ IC_64BIT_REXW_OPSIZE, /* 1593 */ IC_XS_OPSIZE, /* 1594 */ IC_64BIT_REXW_XS, /* 1595 */ IC_XD_OPSIZE, /* 1596 */ IC_64BIT_REXW_XD, /* 1597 */ IC_XS_OPSIZE, /* 1598 */ IC_64BIT_REXW_XS, /* 1599 */ IC_VEX, /* 1600 */ IC_VEX, /* 1601 */ IC_VEX_XS, /* 1602 */ IC_VEX_XS, /* 1603 */ IC_VEX_XD, /* 1604 */ IC_VEX_XD, /* 1605 */ IC_VEX_XD, /* 1606 */ IC_VEX_XD, /* 1607 */ IC_VEX_W, /* 1608 */ IC_VEX_W, /* 1609 */ IC_VEX_W_XS, /* 1610 */ IC_VEX_W_XS, /* 1611 */ IC_VEX_W_XD, /* 1612 */ IC_VEX_W_XD, /* 1613 */ IC_VEX_W_XD, /* 1614 */ IC_VEX_W_XD, /* 1615 */ IC_VEX_OPSIZE, /* 1616 */ IC_VEX_OPSIZE, /* 1617 */ IC_VEX_OPSIZE, /* 1618 */ IC_VEX_OPSIZE, /* 1619 */ IC_VEX_OPSIZE, /* 1620 */ IC_VEX_OPSIZE, /* 1621 */ IC_VEX_OPSIZE, /* 1622 */ IC_VEX_OPSIZE, /* 1623 */ IC_VEX_W_OPSIZE, /* 1624 */ IC_VEX_W_OPSIZE, /* 1625 */ IC_VEX_W_OPSIZE, /* 1626 */ IC_VEX_W_OPSIZE, /* 1627 */ IC_VEX_W_OPSIZE, /* 1628 */ IC_VEX_W_OPSIZE, /* 1629 */ IC_VEX_W_OPSIZE, /* 1630 */ IC_VEX_W_OPSIZE, /* 1631 */ IC_VEX, /* 1632 */ IC_VEX, /* 1633 */ IC_VEX_XS, /* 1634 */ IC_VEX_XS, /* 1635 */ IC_VEX_XD, /* 1636 */ IC_VEX_XD, /* 1637 */ IC_VEX_XD, /* 1638 */ IC_VEX_XD, /* 1639 */ IC_VEX_W, /* 1640 */ IC_VEX_W, /* 1641 */ IC_VEX_W_XS, /* 1642 */ IC_VEX_W_XS, /* 1643 */ IC_VEX_W_XD, /* 1644 */ IC_VEX_W_XD, /* 1645 */ IC_VEX_W_XD, /* 1646 */ IC_VEX_W_XD, /* 1647 */ IC_VEX_OPSIZE, /* 1648 */ IC_VEX_OPSIZE, /* 1649 */ IC_VEX_OPSIZE, /* 1650 */ IC_VEX_OPSIZE, /* 1651 */ IC_VEX_OPSIZE, /* 1652 */ IC_VEX_OPSIZE, /* 1653 */ IC_VEX_OPSIZE, /* 1654 */ IC_VEX_OPSIZE, /* 1655 */ IC_VEX_W_OPSIZE, /* 1656 */ IC_VEX_W_OPSIZE, /* 1657 */ IC_VEX_W_OPSIZE, /* 1658 */ IC_VEX_W_OPSIZE, /* 1659 */ IC_VEX_W_OPSIZE, /* 1660 */ IC_VEX_W_OPSIZE, /* 1661 */ IC_VEX_W_OPSIZE, /* 1662 */ IC_VEX_W_OPSIZE, /* 1663 */ IC_VEX_L, /* 1664 */ IC_VEX_L, /* 1665 */ IC_VEX_L_XS, /* 1666 */ IC_VEX_L_XS, /* 1667 */ IC_VEX_L_XD, /* 1668 */ IC_VEX_L_XD, /* 1669 */ IC_VEX_L_XD, /* 1670 */ IC_VEX_L_XD, /* 1671 */ IC_VEX_L_W, /* 1672 */ IC_VEX_L_W, /* 1673 */ IC_VEX_L_W_XS, /* 1674 */ IC_VEX_L_W_XS, /* 1675 */ IC_VEX_L_W_XD, /* 1676 */ IC_VEX_L_W_XD, /* 1677 */ IC_VEX_L_W_XD, /* 1678 */ IC_VEX_L_W_XD, /* 1679 */ IC_VEX_L_OPSIZE, /* 1680 */ IC_VEX_L_OPSIZE, /* 1681 */ IC_VEX_L_OPSIZE, /* 1682 */ IC_VEX_L_OPSIZE, /* 1683 */ IC_VEX_L_OPSIZE, /* 1684 */ IC_VEX_L_OPSIZE, /* 1685 */ IC_VEX_L_OPSIZE, /* 1686 */ IC_VEX_L_OPSIZE, /* 1687 */ IC_VEX_L_W_OPSIZE, /* 1688 */ IC_VEX_L_W_OPSIZE, /* 1689 */ IC_VEX_L_W_OPSIZE, /* 1690 */ IC_VEX_L_W_OPSIZE, /* 1691 */ IC_VEX_L_W_OPSIZE, /* 1692 */ IC_VEX_L_W_OPSIZE, /* 1693 */ IC_VEX_L_W_OPSIZE, /* 1694 */ IC_VEX_L_W_OPSIZE, /* 1695 */ IC_VEX_L, /* 1696 */ IC_VEX_L, /* 1697 */ IC_VEX_L_XS, /* 1698 */ IC_VEX_L_XS, /* 1699 */ IC_VEX_L_XD, /* 1700 */ IC_VEX_L_XD, /* 1701 */ IC_VEX_L_XD, /* 1702 */ IC_VEX_L_XD, /* 1703 */ IC_VEX_L_W, /* 1704 */ IC_VEX_L_W, /* 1705 */ IC_VEX_L_W_XS, /* 1706 */ IC_VEX_L_W_XS, /* 1707 */ IC_VEX_L_W_XD, /* 1708 */ IC_VEX_L_W_XD, /* 1709 */ IC_VEX_L_W_XD, /* 1710 */ IC_VEX_L_W_XD, /* 1711 */ IC_VEX_L_OPSIZE, /* 1712 */ IC_VEX_L_OPSIZE, /* 1713 */ IC_VEX_L_OPSIZE, /* 1714 */ IC_VEX_L_OPSIZE, /* 1715 */ IC_VEX_L_OPSIZE, /* 1716 */ IC_VEX_L_OPSIZE, /* 1717 */ IC_VEX_L_OPSIZE, /* 1718 */ IC_VEX_L_OPSIZE, /* 1719 */ IC_VEX_L_W_OPSIZE, /* 1720 */ IC_VEX_L_W_OPSIZE, /* 1721 */ IC_VEX_L_W_OPSIZE, /* 1722 */ IC_VEX_L_W_OPSIZE, /* 1723 */ IC_VEX_L_W_OPSIZE, /* 1724 */ IC_VEX_L_W_OPSIZE, /* 1725 */ IC_VEX_L_W_OPSIZE, /* 1726 */ IC_VEX_L_W_OPSIZE, /* 1727 */ IC_VEX_L, /* 1728 */ IC_VEX_L, /* 1729 */ IC_VEX_L_XS, /* 1730 */ IC_VEX_L_XS, /* 1731 */ IC_VEX_L_XD, /* 1732 */ IC_VEX_L_XD, /* 1733 */ IC_VEX_L_XD, /* 1734 */ IC_VEX_L_XD, /* 1735 */ IC_VEX_L_W, /* 1736 */ IC_VEX_L_W, /* 1737 */ IC_VEX_L_W_XS, /* 1738 */ IC_VEX_L_W_XS, /* 1739 */ IC_VEX_L_W_XD, /* 1740 */ IC_VEX_L_W_XD, /* 1741 */ IC_VEX_L_W_XD, /* 1742 */ IC_VEX_L_W_XD, /* 1743 */ IC_VEX_L_OPSIZE, /* 1744 */ IC_VEX_L_OPSIZE, /* 1745 */ IC_VEX_L_OPSIZE, /* 1746 */ IC_VEX_L_OPSIZE, /* 1747 */ IC_VEX_L_OPSIZE, /* 1748 */ IC_VEX_L_OPSIZE, /* 1749 */ IC_VEX_L_OPSIZE, /* 1750 */ IC_VEX_L_OPSIZE, /* 1751 */ IC_VEX_L_W_OPSIZE, /* 1752 */ IC_VEX_L_W_OPSIZE, /* 1753 */ IC_VEX_L_W_OPSIZE, /* 1754 */ IC_VEX_L_W_OPSIZE, /* 1755 */ IC_VEX_L_W_OPSIZE, /* 1756 */ IC_VEX_L_W_OPSIZE, /* 1757 */ IC_VEX_L_W_OPSIZE, /* 1758 */ IC_VEX_L_W_OPSIZE, /* 1759 */ IC_VEX_L, /* 1760 */ IC_VEX_L, /* 1761 */ IC_VEX_L_XS, /* 1762 */ IC_VEX_L_XS, /* 1763 */ IC_VEX_L_XD, /* 1764 */ IC_VEX_L_XD, /* 1765 */ IC_VEX_L_XD, /* 1766 */ IC_VEX_L_XD, /* 1767 */ IC_VEX_L_W, /* 1768 */ IC_VEX_L_W, /* 1769 */ IC_VEX_L_W_XS, /* 1770 */ IC_VEX_L_W_XS, /* 1771 */ IC_VEX_L_W_XD, /* 1772 */ IC_VEX_L_W_XD, /* 1773 */ IC_VEX_L_W_XD, /* 1774 */ IC_VEX_L_W_XD, /* 1775 */ IC_VEX_L_OPSIZE, /* 1776 */ IC_VEX_L_OPSIZE, /* 1777 */ IC_VEX_L_OPSIZE, /* 1778 */ IC_VEX_L_OPSIZE, /* 1779 */ IC_VEX_L_OPSIZE, /* 1780 */ IC_VEX_L_OPSIZE, /* 1781 */ IC_VEX_L_OPSIZE, /* 1782 */ IC_VEX_L_OPSIZE, /* 1783 */ IC_VEX_L_W_OPSIZE, /* 1784 */ IC_VEX_L_W_OPSIZE, /* 1785 */ IC_VEX_L_W_OPSIZE, /* 1786 */ IC_VEX_L_W_OPSIZE, /* 1787 */ IC_VEX_L_W_OPSIZE, /* 1788 */ IC_VEX_L_W_OPSIZE, /* 1789 */ IC_VEX_L_W_OPSIZE, /* 1790 */ IC_VEX_L_W_OPSIZE, /* 1791 */ IC_EVEX_L2, /* 1792 */ IC_EVEX_L2, /* 1793 */ IC_EVEX_L2_XS, /* 1794 */ IC_EVEX_L2_XS, /* 1795 */ IC_EVEX_L2_XD, /* 1796 */ IC_EVEX_L2_XD, /* 1797 */ IC_EVEX_L2_XD, /* 1798 */ IC_EVEX_L2_XD, /* 1799 */ IC_EVEX_L2_W, /* 1800 */ IC_EVEX_L2_W, /* 1801 */ IC_EVEX_L2_W_XS, /* 1802 */ IC_EVEX_L2_W_XS, /* 1803 */ IC_EVEX_L2_W_XD, /* 1804 */ IC_EVEX_L2_W_XD, /* 1805 */ IC_EVEX_L2_W_XD, /* 1806 */ IC_EVEX_L2_W_XD, /* 1807 */ IC_EVEX_L2_OPSIZE, /* 1808 */ IC_EVEX_L2_OPSIZE, /* 1809 */ IC_EVEX_L2_OPSIZE, /* 1810 */ IC_EVEX_L2_OPSIZE, /* 1811 */ IC_EVEX_L2_OPSIZE, /* 1812 */ IC_EVEX_L2_OPSIZE, /* 1813 */ IC_EVEX_L2_OPSIZE, /* 1814 */ IC_EVEX_L2_OPSIZE, /* 1815 */ IC_EVEX_L2_W_OPSIZE, /* 1816 */ IC_EVEX_L2_W_OPSIZE, /* 1817 */ IC_EVEX_L2_W_OPSIZE, /* 1818 */ IC_EVEX_L2_W_OPSIZE, /* 1819 */ IC_EVEX_L2_W_OPSIZE, /* 1820 */ IC_EVEX_L2_W_OPSIZE, /* 1821 */ IC_EVEX_L2_W_OPSIZE, /* 1822 */ IC_EVEX_L2_W_OPSIZE, /* 1823 */ IC_EVEX_L2, /* 1824 */ IC_EVEX_L2, /* 1825 */ IC_EVEX_L2_XS, /* 1826 */ IC_EVEX_L2_XS, /* 1827 */ IC_EVEX_L2_XD, /* 1828 */ IC_EVEX_L2_XD, /* 1829 */ IC_EVEX_L2_XD, /* 1830 */ IC_EVEX_L2_XD, /* 1831 */ IC_EVEX_L2_W, /* 1832 */ IC_EVEX_L2_W, /* 1833 */ IC_EVEX_L2_W_XS, /* 1834 */ IC_EVEX_L2_W_XS, /* 1835 */ IC_EVEX_L2_W_XD, /* 1836 */ IC_EVEX_L2_W_XD, /* 1837 */ IC_EVEX_L2_W_XD, /* 1838 */ IC_EVEX_L2_W_XD, /* 1839 */ IC_EVEX_L2_OPSIZE, /* 1840 */ IC_EVEX_L2_OPSIZE, /* 1841 */ IC_EVEX_L2_OPSIZE, /* 1842 */ IC_EVEX_L2_OPSIZE, /* 1843 */ IC_EVEX_L2_OPSIZE, /* 1844 */ IC_EVEX_L2_OPSIZE, /* 1845 */ IC_EVEX_L2_OPSIZE, /* 1846 */ IC_EVEX_L2_OPSIZE, /* 1847 */ IC_EVEX_L2_W_OPSIZE, /* 1848 */ IC_EVEX_L2_W_OPSIZE, /* 1849 */ IC_EVEX_L2_W_OPSIZE, /* 1850 */ IC_EVEX_L2_W_OPSIZE, /* 1851 */ IC_EVEX_L2_W_OPSIZE, /* 1852 */ IC_EVEX_L2_W_OPSIZE, /* 1853 */ IC_EVEX_L2_W_OPSIZE, /* 1854 */ IC_EVEX_L2_W_OPSIZE, /* 1855 */ IC_EVEX_L2, /* 1856 */ IC_EVEX_L2, /* 1857 */ IC_EVEX_L2_XS, /* 1858 */ IC_EVEX_L2_XS, /* 1859 */ IC_EVEX_L2_XD, /* 1860 */ IC_EVEX_L2_XD, /* 1861 */ IC_EVEX_L2_XD, /* 1862 */ IC_EVEX_L2_XD, /* 1863 */ IC_EVEX_L2_W, /* 1864 */ IC_EVEX_L2_W, /* 1865 */ IC_EVEX_L2_W_XS, /* 1866 */ IC_EVEX_L2_W_XS, /* 1867 */ IC_EVEX_L2_W_XD, /* 1868 */ IC_EVEX_L2_W_XD, /* 1869 */ IC_EVEX_L2_W_XD, /* 1870 */ IC_EVEX_L2_W_XD, /* 1871 */ IC_EVEX_L2_OPSIZE, /* 1872 */ IC_EVEX_L2_OPSIZE, /* 1873 */ IC_EVEX_L2_OPSIZE, /* 1874 */ IC_EVEX_L2_OPSIZE, /* 1875 */ IC_EVEX_L2_OPSIZE, /* 1876 */ IC_EVEX_L2_OPSIZE, /* 1877 */ IC_EVEX_L2_OPSIZE, /* 1878 */ IC_EVEX_L2_OPSIZE, /* 1879 */ IC_EVEX_L2_W_OPSIZE, /* 1880 */ IC_EVEX_L2_W_OPSIZE, /* 1881 */ IC_EVEX_L2_W_OPSIZE, /* 1882 */ IC_EVEX_L2_W_OPSIZE, /* 1883 */ IC_EVEX_L2_W_OPSIZE, /* 1884 */ IC_EVEX_L2_W_OPSIZE, /* 1885 */ IC_EVEX_L2_W_OPSIZE, /* 1886 */ IC_EVEX_L2_W_OPSIZE, /* 1887 */ IC_EVEX_L2, /* 1888 */ IC_EVEX_L2, /* 1889 */ IC_EVEX_L2_XS, /* 1890 */ IC_EVEX_L2_XS, /* 1891 */ IC_EVEX_L2_XD, /* 1892 */ IC_EVEX_L2_XD, /* 1893 */ IC_EVEX_L2_XD, /* 1894 */ IC_EVEX_L2_XD, /* 1895 */ IC_EVEX_L2_W, /* 1896 */ IC_EVEX_L2_W, /* 1897 */ IC_EVEX_L2_W_XS, /* 1898 */ IC_EVEX_L2_W_XS, /* 1899 */ IC_EVEX_L2_W_XD, /* 1900 */ IC_EVEX_L2_W_XD, /* 1901 */ IC_EVEX_L2_W_XD, /* 1902 */ IC_EVEX_L2_W_XD, /* 1903 */ IC_EVEX_L2_OPSIZE, /* 1904 */ IC_EVEX_L2_OPSIZE, /* 1905 */ IC_EVEX_L2_OPSIZE, /* 1906 */ IC_EVEX_L2_OPSIZE, /* 1907 */ IC_EVEX_L2_OPSIZE, /* 1908 */ IC_EVEX_L2_OPSIZE, /* 1909 */ IC_EVEX_L2_OPSIZE, /* 1910 */ IC_EVEX_L2_OPSIZE, /* 1911 */ IC_EVEX_L2_W_OPSIZE, /* 1912 */ IC_EVEX_L2_W_OPSIZE, /* 1913 */ IC_EVEX_L2_W_OPSIZE, /* 1914 */ IC_EVEX_L2_W_OPSIZE, /* 1915 */ IC_EVEX_L2_W_OPSIZE, /* 1916 */ IC_EVEX_L2_W_OPSIZE, /* 1917 */ IC_EVEX_L2_W_OPSIZE, /* 1918 */ IC_EVEX_L2_W_OPSIZE, /* 1919 */ IC_EVEX_L2, /* 1920 */ IC_EVEX_L2, /* 1921 */ IC_EVEX_L2_XS, /* 1922 */ IC_EVEX_L2_XS, /* 1923 */ IC_EVEX_L2_XD, /* 1924 */ IC_EVEX_L2_XD, /* 1925 */ IC_EVEX_L2_XD, /* 1926 */ IC_EVEX_L2_XD, /* 1927 */ IC_EVEX_L2_W, /* 1928 */ IC_EVEX_L2_W, /* 1929 */ IC_EVEX_L2_W_XS, /* 1930 */ IC_EVEX_L2_W_XS, /* 1931 */ IC_EVEX_L2_W_XD, /* 1932 */ IC_EVEX_L2_W_XD, /* 1933 */ IC_EVEX_L2_W_XD, /* 1934 */ IC_EVEX_L2_W_XD, /* 1935 */ IC_EVEX_L2_OPSIZE, /* 1936 */ IC_EVEX_L2_OPSIZE, /* 1937 */ IC_EVEX_L2_OPSIZE, /* 1938 */ IC_EVEX_L2_OPSIZE, /* 1939 */ IC_EVEX_L2_OPSIZE, /* 1940 */ IC_EVEX_L2_OPSIZE, /* 1941 */ IC_EVEX_L2_OPSIZE, /* 1942 */ IC_EVEX_L2_OPSIZE, /* 1943 */ IC_EVEX_L2_W_OPSIZE, /* 1944 */ IC_EVEX_L2_W_OPSIZE, /* 1945 */ IC_EVEX_L2_W_OPSIZE, /* 1946 */ IC_EVEX_L2_W_OPSIZE, /* 1947 */ IC_EVEX_L2_W_OPSIZE, /* 1948 */ IC_EVEX_L2_W_OPSIZE, /* 1949 */ IC_EVEX_L2_W_OPSIZE, /* 1950 */ IC_EVEX_L2_W_OPSIZE, /* 1951 */ IC_EVEX_L2, /* 1952 */ IC_EVEX_L2, /* 1953 */ IC_EVEX_L2_XS, /* 1954 */ IC_EVEX_L2_XS, /* 1955 */ IC_EVEX_L2_XD, /* 1956 */ IC_EVEX_L2_XD, /* 1957 */ IC_EVEX_L2_XD, /* 1958 */ IC_EVEX_L2_XD, /* 1959 */ IC_EVEX_L2_W, /* 1960 */ IC_EVEX_L2_W, /* 1961 */ IC_EVEX_L2_W_XS, /* 1962 */ IC_EVEX_L2_W_XS, /* 1963 */ IC_EVEX_L2_W_XD, /* 1964 */ IC_EVEX_L2_W_XD, /* 1965 */ IC_EVEX_L2_W_XD, /* 1966 */ IC_EVEX_L2_W_XD, /* 1967 */ IC_EVEX_L2_OPSIZE, /* 1968 */ IC_EVEX_L2_OPSIZE, /* 1969 */ IC_EVEX_L2_OPSIZE, /* 1970 */ IC_EVEX_L2_OPSIZE, /* 1971 */ IC_EVEX_L2_OPSIZE, /* 1972 */ IC_EVEX_L2_OPSIZE, /* 1973 */ IC_EVEX_L2_OPSIZE, /* 1974 */ IC_EVEX_L2_OPSIZE, /* 1975 */ IC_EVEX_L2_W_OPSIZE, /* 1976 */ IC_EVEX_L2_W_OPSIZE, /* 1977 */ IC_EVEX_L2_W_OPSIZE, /* 1978 */ IC_EVEX_L2_W_OPSIZE, /* 1979 */ IC_EVEX_L2_W_OPSIZE, /* 1980 */ IC_EVEX_L2_W_OPSIZE, /* 1981 */ IC_EVEX_L2_W_OPSIZE, /* 1982 */ IC_EVEX_L2_W_OPSIZE, /* 1983 */ IC_EVEX_L2, /* 1984 */ IC_EVEX_L2, /* 1985 */ IC_EVEX_L2_XS, /* 1986 */ IC_EVEX_L2_XS, /* 1987 */ IC_EVEX_L2_XD, /* 1988 */ IC_EVEX_L2_XD, /* 1989 */ IC_EVEX_L2_XD, /* 1990 */ IC_EVEX_L2_XD, /* 1991 */ IC_EVEX_L2_W, /* 1992 */ IC_EVEX_L2_W, /* 1993 */ IC_EVEX_L2_W_XS, /* 1994 */ IC_EVEX_L2_W_XS, /* 1995 */ IC_EVEX_L2_W_XD, /* 1996 */ IC_EVEX_L2_W_XD, /* 1997 */ IC_EVEX_L2_W_XD, /* 1998 */ IC_EVEX_L2_W_XD, /* 1999 */ IC_EVEX_L2_OPSIZE, /* 2000 */ IC_EVEX_L2_OPSIZE, /* 2001 */ IC_EVEX_L2_OPSIZE, /* 2002 */ IC_EVEX_L2_OPSIZE, /* 2003 */ IC_EVEX_L2_OPSIZE, /* 2004 */ IC_EVEX_L2_OPSIZE, /* 2005 */ IC_EVEX_L2_OPSIZE, /* 2006 */ IC_EVEX_L2_OPSIZE, /* 2007 */ IC_EVEX_L2_W_OPSIZE, /* 2008 */ IC_EVEX_L2_W_OPSIZE, /* 2009 */ IC_EVEX_L2_W_OPSIZE, /* 2010 */ IC_EVEX_L2_W_OPSIZE, /* 2011 */ IC_EVEX_L2_W_OPSIZE, /* 2012 */ IC_EVEX_L2_W_OPSIZE, /* 2013 */ IC_EVEX_L2_W_OPSIZE, /* 2014 */ IC_EVEX_L2_W_OPSIZE, /* 2015 */ IC_EVEX_L2, /* 2016 */ IC_EVEX_L2, /* 2017 */ IC_EVEX_L2_XS, /* 2018 */ IC_EVEX_L2_XS, /* 2019 */ IC_EVEX_L2_XD, /* 2020 */ IC_EVEX_L2_XD, /* 2021 */ IC_EVEX_L2_XD, /* 2022 */ IC_EVEX_L2_XD, /* 2023 */ IC_EVEX_L2_W, /* 2024 */ IC_EVEX_L2_W, /* 2025 */ IC_EVEX_L2_W_XS, /* 2026 */ IC_EVEX_L2_W_XS, /* 2027 */ IC_EVEX_L2_W_XD, /* 2028 */ IC_EVEX_L2_W_XD, /* 2029 */ IC_EVEX_L2_W_XD, /* 2030 */ IC_EVEX_L2_W_XD, /* 2031 */ IC_EVEX_L2_OPSIZE, /* 2032 */ IC_EVEX_L2_OPSIZE, /* 2033 */ IC_EVEX_L2_OPSIZE, /* 2034 */ IC_EVEX_L2_OPSIZE, /* 2035 */ IC_EVEX_L2_OPSIZE, /* 2036 */ IC_EVEX_L2_OPSIZE, /* 2037 */ IC_EVEX_L2_OPSIZE, /* 2038 */ IC_EVEX_L2_OPSIZE, /* 2039 */ IC_EVEX_L2_W_OPSIZE, /* 2040 */ IC_EVEX_L2_W_OPSIZE, /* 2041 */ IC_EVEX_L2_W_OPSIZE, /* 2042 */ IC_EVEX_L2_W_OPSIZE, /* 2043 */ IC_EVEX_L2_W_OPSIZE, /* 2044 */ IC_EVEX_L2_W_OPSIZE, /* 2045 */ IC_EVEX_L2_W_OPSIZE, /* 2046 */ IC_EVEX_L2_W_OPSIZE, /* 2047 */ IC, /* 2048 */ IC_64BIT, /* 2049 */ IC_XS, /* 2050 */ IC_64BIT_XS, /* 2051 */ IC_XD, /* 2052 */ IC_64BIT_XD, /* 2053 */ IC_XS, /* 2054 */ IC_64BIT_XS, /* 2055 */ IC, /* 2056 */ IC_64BIT_REXW, /* 2057 */ IC_XS, /* 2058 */ IC_64BIT_REXW_XS, /* 2059 */ IC_XD, /* 2060 */ IC_64BIT_REXW_XD, /* 2061 */ IC_XS, /* 2062 */ IC_64BIT_REXW_XS, /* 2063 */ IC_OPSIZE, /* 2064 */ IC_64BIT_OPSIZE, /* 2065 */ IC_XS_OPSIZE, /* 2066 */ IC_64BIT_XS_OPSIZE, /* 2067 */ IC_XD_OPSIZE, /* 2068 */ IC_64BIT_XD_OPSIZE, /* 2069 */ IC_XS_OPSIZE, /* 2070 */ IC_64BIT_XD_OPSIZE, /* 2071 */ IC_OPSIZE, /* 2072 */ IC_64BIT_REXW_OPSIZE, /* 2073 */ IC_XS_OPSIZE, /* 2074 */ IC_64BIT_REXW_XS, /* 2075 */ IC_XD_OPSIZE, /* 2076 */ IC_64BIT_REXW_XD, /* 2077 */ IC_XS_OPSIZE, /* 2078 */ IC_64BIT_REXW_XS, /* 2079 */ IC_ADSIZE, /* 2080 */ IC_64BIT_ADSIZE, /* 2081 */ IC_XS, /* 2082 */ IC_64BIT_XS, /* 2083 */ IC_XD, /* 2084 */ IC_64BIT_XD, /* 2085 */ IC_XS, /* 2086 */ IC_64BIT_XS, /* 2087 */ IC_ADSIZE, /* 2088 */ IC_64BIT_REXW_ADSIZE, /* 2089 */ IC_XS, /* 2090 */ IC_64BIT_REXW_XS, /* 2091 */ IC_XD, /* 2092 */ IC_64BIT_REXW_XD, /* 2093 */ IC_XS, /* 2094 */ IC_64BIT_REXW_XS, /* 2095 */ IC_OPSIZE_ADSIZE, /* 2096 */ IC_64BIT_OPSIZE_ADSIZE, /* 2097 */ IC_XS_OPSIZE, /* 2098 */ IC_64BIT_XS_OPSIZE, /* 2099 */ IC_XD_OPSIZE, /* 2100 */ IC_64BIT_XD_OPSIZE, /* 2101 */ IC_XS_OPSIZE, /* 2102 */ IC_64BIT_XD_OPSIZE, /* 2103 */ IC_OPSIZE_ADSIZE, /* 2104 */ IC_64BIT_REXW_OPSIZE, /* 2105 */ IC_XS_OPSIZE, /* 2106 */ IC_64BIT_REXW_XS, /* 2107 */ IC_XD_OPSIZE, /* 2108 */ IC_64BIT_REXW_XD, /* 2109 */ IC_XS_OPSIZE, /* 2110 */ IC_64BIT_REXW_XS, /* 2111 */ IC_VEX, /* 2112 */ IC_VEX, /* 2113 */ IC_VEX_XS, /* 2114 */ IC_VEX_XS, /* 2115 */ IC_VEX_XD, /* 2116 */ IC_VEX_XD, /* 2117 */ IC_VEX_XD, /* 2118 */ IC_VEX_XD, /* 2119 */ IC_VEX_W, /* 2120 */ IC_VEX_W, /* 2121 */ IC_VEX_W_XS, /* 2122 */ IC_VEX_W_XS, /* 2123 */ IC_VEX_W_XD, /* 2124 */ IC_VEX_W_XD, /* 2125 */ IC_VEX_W_XD, /* 2126 */ IC_VEX_W_XD, /* 2127 */ IC_VEX_OPSIZE, /* 2128 */ IC_VEX_OPSIZE, /* 2129 */ IC_VEX_OPSIZE, /* 2130 */ IC_VEX_OPSIZE, /* 2131 */ IC_VEX_OPSIZE, /* 2132 */ IC_VEX_OPSIZE, /* 2133 */ IC_VEX_OPSIZE, /* 2134 */ IC_VEX_OPSIZE, /* 2135 */ IC_VEX_W_OPSIZE, /* 2136 */ IC_VEX_W_OPSIZE, /* 2137 */ IC_VEX_W_OPSIZE, /* 2138 */ IC_VEX_W_OPSIZE, /* 2139 */ IC_VEX_W_OPSIZE, /* 2140 */ IC_VEX_W_OPSIZE, /* 2141 */ IC_VEX_W_OPSIZE, /* 2142 */ IC_VEX_W_OPSIZE, /* 2143 */ IC_VEX, /* 2144 */ IC_VEX, /* 2145 */ IC_VEX_XS, /* 2146 */ IC_VEX_XS, /* 2147 */ IC_VEX_XD, /* 2148 */ IC_VEX_XD, /* 2149 */ IC_VEX_XD, /* 2150 */ IC_VEX_XD, /* 2151 */ IC_VEX_W, /* 2152 */ IC_VEX_W, /* 2153 */ IC_VEX_W_XS, /* 2154 */ IC_VEX_W_XS, /* 2155 */ IC_VEX_W_XD, /* 2156 */ IC_VEX_W_XD, /* 2157 */ IC_VEX_W_XD, /* 2158 */ IC_VEX_W_XD, /* 2159 */ IC_VEX_OPSIZE, /* 2160 */ IC_VEX_OPSIZE, /* 2161 */ IC_VEX_OPSIZE, /* 2162 */ IC_VEX_OPSIZE, /* 2163 */ IC_VEX_OPSIZE, /* 2164 */ IC_VEX_OPSIZE, /* 2165 */ IC_VEX_OPSIZE, /* 2166 */ IC_VEX_OPSIZE, /* 2167 */ IC_VEX_W_OPSIZE, /* 2168 */ IC_VEX_W_OPSIZE, /* 2169 */ IC_VEX_W_OPSIZE, /* 2170 */ IC_VEX_W_OPSIZE, /* 2171 */ IC_VEX_W_OPSIZE, /* 2172 */ IC_VEX_W_OPSIZE, /* 2173 */ IC_VEX_W_OPSIZE, /* 2174 */ IC_VEX_W_OPSIZE, /* 2175 */ IC_VEX_L, /* 2176 */ IC_VEX_L, /* 2177 */ IC_VEX_L_XS, /* 2178 */ IC_VEX_L_XS, /* 2179 */ IC_VEX_L_XD, /* 2180 */ IC_VEX_L_XD, /* 2181 */ IC_VEX_L_XD, /* 2182 */ IC_VEX_L_XD, /* 2183 */ IC_VEX_L_W, /* 2184 */ IC_VEX_L_W, /* 2185 */ IC_VEX_L_W_XS, /* 2186 */ IC_VEX_L_W_XS, /* 2187 */ IC_VEX_L_W_XD, /* 2188 */ IC_VEX_L_W_XD, /* 2189 */ IC_VEX_L_W_XD, /* 2190 */ IC_VEX_L_W_XD, /* 2191 */ IC_VEX_L_OPSIZE, /* 2192 */ IC_VEX_L_OPSIZE, /* 2193 */ IC_VEX_L_OPSIZE, /* 2194 */ IC_VEX_L_OPSIZE, /* 2195 */ IC_VEX_L_OPSIZE, /* 2196 */ IC_VEX_L_OPSIZE, /* 2197 */ IC_VEX_L_OPSIZE, /* 2198 */ IC_VEX_L_OPSIZE, /* 2199 */ IC_VEX_L_W_OPSIZE, /* 2200 */ IC_VEX_L_W_OPSIZE, /* 2201 */ IC_VEX_L_W_OPSIZE, /* 2202 */ IC_VEX_L_W_OPSIZE, /* 2203 */ IC_VEX_L_W_OPSIZE, /* 2204 */ IC_VEX_L_W_OPSIZE, /* 2205 */ IC_VEX_L_W_OPSIZE, /* 2206 */ IC_VEX_L_W_OPSIZE, /* 2207 */ IC_VEX_L, /* 2208 */ IC_VEX_L, /* 2209 */ IC_VEX_L_XS, /* 2210 */ IC_VEX_L_XS, /* 2211 */ IC_VEX_L_XD, /* 2212 */ IC_VEX_L_XD, /* 2213 */ IC_VEX_L_XD, /* 2214 */ IC_VEX_L_XD, /* 2215 */ IC_VEX_L_W, /* 2216 */ IC_VEX_L_W, /* 2217 */ IC_VEX_L_W_XS, /* 2218 */ IC_VEX_L_W_XS, /* 2219 */ IC_VEX_L_W_XD, /* 2220 */ IC_VEX_L_W_XD, /* 2221 */ IC_VEX_L_W_XD, /* 2222 */ IC_VEX_L_W_XD, /* 2223 */ IC_VEX_L_OPSIZE, /* 2224 */ IC_VEX_L_OPSIZE, /* 2225 */ IC_VEX_L_OPSIZE, /* 2226 */ IC_VEX_L_OPSIZE, /* 2227 */ IC_VEX_L_OPSIZE, /* 2228 */ IC_VEX_L_OPSIZE, /* 2229 */ IC_VEX_L_OPSIZE, /* 2230 */ IC_VEX_L_OPSIZE, /* 2231 */ IC_VEX_L_W_OPSIZE, /* 2232 */ IC_VEX_L_W_OPSIZE, /* 2233 */ IC_VEX_L_W_OPSIZE, /* 2234 */ IC_VEX_L_W_OPSIZE, /* 2235 */ IC_VEX_L_W_OPSIZE, /* 2236 */ IC_VEX_L_W_OPSIZE, /* 2237 */ IC_VEX_L_W_OPSIZE, /* 2238 */ IC_VEX_L_W_OPSIZE, /* 2239 */ IC_VEX_L, /* 2240 */ IC_VEX_L, /* 2241 */ IC_VEX_L_XS, /* 2242 */ IC_VEX_L_XS, /* 2243 */ IC_VEX_L_XD, /* 2244 */ IC_VEX_L_XD, /* 2245 */ IC_VEX_L_XD, /* 2246 */ IC_VEX_L_XD, /* 2247 */ IC_VEX_L_W, /* 2248 */ IC_VEX_L_W, /* 2249 */ IC_VEX_L_W_XS, /* 2250 */ IC_VEX_L_W_XS, /* 2251 */ IC_VEX_L_W_XD, /* 2252 */ IC_VEX_L_W_XD, /* 2253 */ IC_VEX_L_W_XD, /* 2254 */ IC_VEX_L_W_XD, /* 2255 */ IC_VEX_L_OPSIZE, /* 2256 */ IC_VEX_L_OPSIZE, /* 2257 */ IC_VEX_L_OPSIZE, /* 2258 */ IC_VEX_L_OPSIZE, /* 2259 */ IC_VEX_L_OPSIZE, /* 2260 */ IC_VEX_L_OPSIZE, /* 2261 */ IC_VEX_L_OPSIZE, /* 2262 */ IC_VEX_L_OPSIZE, /* 2263 */ IC_VEX_L_W_OPSIZE, /* 2264 */ IC_VEX_L_W_OPSIZE, /* 2265 */ IC_VEX_L_W_OPSIZE, /* 2266 */ IC_VEX_L_W_OPSIZE, /* 2267 */ IC_VEX_L_W_OPSIZE, /* 2268 */ IC_VEX_L_W_OPSIZE, /* 2269 */ IC_VEX_L_W_OPSIZE, /* 2270 */ IC_VEX_L_W_OPSIZE, /* 2271 */ IC_VEX_L, /* 2272 */ IC_VEX_L, /* 2273 */ IC_VEX_L_XS, /* 2274 */ IC_VEX_L_XS, /* 2275 */ IC_VEX_L_XD, /* 2276 */ IC_VEX_L_XD, /* 2277 */ IC_VEX_L_XD, /* 2278 */ IC_VEX_L_XD, /* 2279 */ IC_VEX_L_W, /* 2280 */ IC_VEX_L_W, /* 2281 */ IC_VEX_L_W_XS, /* 2282 */ IC_VEX_L_W_XS, /* 2283 */ IC_VEX_L_W_XD, /* 2284 */ IC_VEX_L_W_XD, /* 2285 */ IC_VEX_L_W_XD, /* 2286 */ IC_VEX_L_W_XD, /* 2287 */ IC_VEX_L_OPSIZE, /* 2288 */ IC_VEX_L_OPSIZE, /* 2289 */ IC_VEX_L_OPSIZE, /* 2290 */ IC_VEX_L_OPSIZE, /* 2291 */ IC_VEX_L_OPSIZE, /* 2292 */ IC_VEX_L_OPSIZE, /* 2293 */ IC_VEX_L_OPSIZE, /* 2294 */ IC_VEX_L_OPSIZE, /* 2295 */ IC_VEX_L_W_OPSIZE, /* 2296 */ IC_VEX_L_W_OPSIZE, /* 2297 */ IC_VEX_L_W_OPSIZE, /* 2298 */ IC_VEX_L_W_OPSIZE, /* 2299 */ IC_VEX_L_W_OPSIZE, /* 2300 */ IC_VEX_L_W_OPSIZE, /* 2301 */ IC_VEX_L_W_OPSIZE, /* 2302 */ IC_VEX_L_W_OPSIZE, /* 2303 */ IC_EVEX_K, /* 2304 */ IC_EVEX_K, /* 2305 */ IC_EVEX_XS_K, /* 2306 */ IC_EVEX_XS_K, /* 2307 */ IC_EVEX_XD_K, /* 2308 */ IC_EVEX_XD_K, /* 2309 */ IC_EVEX_XD_K, /* 2310 */ IC_EVEX_XD_K, /* 2311 */ IC_EVEX_W_K, /* 2312 */ IC_EVEX_W_K, /* 2313 */ IC_EVEX_W_XS_K, /* 2314 */ IC_EVEX_W_XS_K, /* 2315 */ IC_EVEX_W_XD_K, /* 2316 */ IC_EVEX_W_XD_K, /* 2317 */ IC_EVEX_W_XD_K, /* 2318 */ IC_EVEX_W_XD_K, /* 2319 */ IC_EVEX_OPSIZE_K, /* 2320 */ IC_EVEX_OPSIZE_K, /* 2321 */ IC_EVEX_OPSIZE_K, /* 2322 */ IC_EVEX_OPSIZE_K, /* 2323 */ IC_EVEX_OPSIZE_K, /* 2324 */ IC_EVEX_OPSIZE_K, /* 2325 */ IC_EVEX_OPSIZE_K, /* 2326 */ IC_EVEX_OPSIZE_K, /* 2327 */ IC_EVEX_W_OPSIZE_K, /* 2328 */ IC_EVEX_W_OPSIZE_K, /* 2329 */ IC_EVEX_W_OPSIZE_K, /* 2330 */ IC_EVEX_W_OPSIZE_K, /* 2331 */ IC_EVEX_W_OPSIZE_K, /* 2332 */ IC_EVEX_W_OPSIZE_K, /* 2333 */ IC_EVEX_W_OPSIZE_K, /* 2334 */ IC_EVEX_W_OPSIZE_K, /* 2335 */ IC_EVEX_K, /* 2336 */ IC_EVEX_K, /* 2337 */ IC_EVEX_XS_K, /* 2338 */ IC_EVEX_XS_K, /* 2339 */ IC_EVEX_XD_K, /* 2340 */ IC_EVEX_XD_K, /* 2341 */ IC_EVEX_XD_K, /* 2342 */ IC_EVEX_XD_K, /* 2343 */ IC_EVEX_W_K, /* 2344 */ IC_EVEX_W_K, /* 2345 */ IC_EVEX_W_XS_K, /* 2346 */ IC_EVEX_W_XS_K, /* 2347 */ IC_EVEX_W_XD_K, /* 2348 */ IC_EVEX_W_XD_K, /* 2349 */ IC_EVEX_W_XD_K, /* 2350 */ IC_EVEX_W_XD_K, /* 2351 */ IC_EVEX_OPSIZE_K, /* 2352 */ IC_EVEX_OPSIZE_K, /* 2353 */ IC_EVEX_OPSIZE_K, /* 2354 */ IC_EVEX_OPSIZE_K, /* 2355 */ IC_EVEX_OPSIZE_K, /* 2356 */ IC_EVEX_OPSIZE_K, /* 2357 */ IC_EVEX_OPSIZE_K, /* 2358 */ IC_EVEX_OPSIZE_K, /* 2359 */ IC_EVEX_W_OPSIZE_K, /* 2360 */ IC_EVEX_W_OPSIZE_K, /* 2361 */ IC_EVEX_W_OPSIZE_K, /* 2362 */ IC_EVEX_W_OPSIZE_K, /* 2363 */ IC_EVEX_W_OPSIZE_K, /* 2364 */ IC_EVEX_W_OPSIZE_K, /* 2365 */ IC_EVEX_W_OPSIZE_K, /* 2366 */ IC_EVEX_W_OPSIZE_K, /* 2367 */ IC_EVEX_K, /* 2368 */ IC_EVEX_K, /* 2369 */ IC_EVEX_XS_K, /* 2370 */ IC_EVEX_XS_K, /* 2371 */ IC_EVEX_XD_K, /* 2372 */ IC_EVEX_XD_K, /* 2373 */ IC_EVEX_XD_K, /* 2374 */ IC_EVEX_XD_K, /* 2375 */ IC_EVEX_W_K, /* 2376 */ IC_EVEX_W_K, /* 2377 */ IC_EVEX_W_XS_K, /* 2378 */ IC_EVEX_W_XS_K, /* 2379 */ IC_EVEX_W_XD_K, /* 2380 */ IC_EVEX_W_XD_K, /* 2381 */ IC_EVEX_W_XD_K, /* 2382 */ IC_EVEX_W_XD_K, /* 2383 */ IC_EVEX_OPSIZE_K, /* 2384 */ IC_EVEX_OPSIZE_K, /* 2385 */ IC_EVEX_OPSIZE_K, /* 2386 */ IC_EVEX_OPSIZE_K, /* 2387 */ IC_EVEX_OPSIZE_K, /* 2388 */ IC_EVEX_OPSIZE_K, /* 2389 */ IC_EVEX_OPSIZE_K, /* 2390 */ IC_EVEX_OPSIZE_K, /* 2391 */ IC_EVEX_W_OPSIZE_K, /* 2392 */ IC_EVEX_W_OPSIZE_K, /* 2393 */ IC_EVEX_W_OPSIZE_K, /* 2394 */ IC_EVEX_W_OPSIZE_K, /* 2395 */ IC_EVEX_W_OPSIZE_K, /* 2396 */ IC_EVEX_W_OPSIZE_K, /* 2397 */ IC_EVEX_W_OPSIZE_K, /* 2398 */ IC_EVEX_W_OPSIZE_K, /* 2399 */ IC_EVEX_K, /* 2400 */ IC_EVEX_K, /* 2401 */ IC_EVEX_XS_K, /* 2402 */ IC_EVEX_XS_K, /* 2403 */ IC_EVEX_XD_K, /* 2404 */ IC_EVEX_XD_K, /* 2405 */ IC_EVEX_XD_K, /* 2406 */ IC_EVEX_XD_K, /* 2407 */ IC_EVEX_W_K, /* 2408 */ IC_EVEX_W_K, /* 2409 */ IC_EVEX_W_XS_K, /* 2410 */ IC_EVEX_W_XS_K, /* 2411 */ IC_EVEX_W_XD_K, /* 2412 */ IC_EVEX_W_XD_K, /* 2413 */ IC_EVEX_W_XD_K, /* 2414 */ IC_EVEX_W_XD_K, /* 2415 */ IC_EVEX_OPSIZE_K, /* 2416 */ IC_EVEX_OPSIZE_K, /* 2417 */ IC_EVEX_OPSIZE_K, /* 2418 */ IC_EVEX_OPSIZE_K, /* 2419 */ IC_EVEX_OPSIZE_K, /* 2420 */ IC_EVEX_OPSIZE_K, /* 2421 */ IC_EVEX_OPSIZE_K, /* 2422 */ IC_EVEX_OPSIZE_K, /* 2423 */ IC_EVEX_W_OPSIZE_K, /* 2424 */ IC_EVEX_W_OPSIZE_K, /* 2425 */ IC_EVEX_W_OPSIZE_K, /* 2426 */ IC_EVEX_W_OPSIZE_K, /* 2427 */ IC_EVEX_W_OPSIZE_K, /* 2428 */ IC_EVEX_W_OPSIZE_K, /* 2429 */ IC_EVEX_W_OPSIZE_K, /* 2430 */ IC_EVEX_W_OPSIZE_K, /* 2431 */ IC_EVEX_K, /* 2432 */ IC_EVEX_K, /* 2433 */ IC_EVEX_XS_K, /* 2434 */ IC_EVEX_XS_K, /* 2435 */ IC_EVEX_XD_K, /* 2436 */ IC_EVEX_XD_K, /* 2437 */ IC_EVEX_XD_K, /* 2438 */ IC_EVEX_XD_K, /* 2439 */ IC_EVEX_W_K, /* 2440 */ IC_EVEX_W_K, /* 2441 */ IC_EVEX_W_XS_K, /* 2442 */ IC_EVEX_W_XS_K, /* 2443 */ IC_EVEX_W_XD_K, /* 2444 */ IC_EVEX_W_XD_K, /* 2445 */ IC_EVEX_W_XD_K, /* 2446 */ IC_EVEX_W_XD_K, /* 2447 */ IC_EVEX_OPSIZE_K, /* 2448 */ IC_EVEX_OPSIZE_K, /* 2449 */ IC_EVEX_OPSIZE_K, /* 2450 */ IC_EVEX_OPSIZE_K, /* 2451 */ IC_EVEX_OPSIZE_K, /* 2452 */ IC_EVEX_OPSIZE_K, /* 2453 */ IC_EVEX_OPSIZE_K, /* 2454 */ IC_EVEX_OPSIZE_K, /* 2455 */ IC_EVEX_W_OPSIZE_K, /* 2456 */ IC_EVEX_W_OPSIZE_K, /* 2457 */ IC_EVEX_W_OPSIZE_K, /* 2458 */ IC_EVEX_W_OPSIZE_K, /* 2459 */ IC_EVEX_W_OPSIZE_K, /* 2460 */ IC_EVEX_W_OPSIZE_K, /* 2461 */ IC_EVEX_W_OPSIZE_K, /* 2462 */ IC_EVEX_W_OPSIZE_K, /* 2463 */ IC_EVEX_K, /* 2464 */ IC_EVEX_K, /* 2465 */ IC_EVEX_XS_K, /* 2466 */ IC_EVEX_XS_K, /* 2467 */ IC_EVEX_XD_K, /* 2468 */ IC_EVEX_XD_K, /* 2469 */ IC_EVEX_XD_K, /* 2470 */ IC_EVEX_XD_K, /* 2471 */ IC_EVEX_W_K, /* 2472 */ IC_EVEX_W_K, /* 2473 */ IC_EVEX_W_XS_K, /* 2474 */ IC_EVEX_W_XS_K, /* 2475 */ IC_EVEX_W_XD_K, /* 2476 */ IC_EVEX_W_XD_K, /* 2477 */ IC_EVEX_W_XD_K, /* 2478 */ IC_EVEX_W_XD_K, /* 2479 */ IC_EVEX_OPSIZE_K, /* 2480 */ IC_EVEX_OPSIZE_K, /* 2481 */ IC_EVEX_OPSIZE_K, /* 2482 */ IC_EVEX_OPSIZE_K, /* 2483 */ IC_EVEX_OPSIZE_K, /* 2484 */ IC_EVEX_OPSIZE_K, /* 2485 */ IC_EVEX_OPSIZE_K, /* 2486 */ IC_EVEX_OPSIZE_K, /* 2487 */ IC_EVEX_W_OPSIZE_K, /* 2488 */ IC_EVEX_W_OPSIZE_K, /* 2489 */ IC_EVEX_W_OPSIZE_K, /* 2490 */ IC_EVEX_W_OPSIZE_K, /* 2491 */ IC_EVEX_W_OPSIZE_K, /* 2492 */ IC_EVEX_W_OPSIZE_K, /* 2493 */ IC_EVEX_W_OPSIZE_K, /* 2494 */ IC_EVEX_W_OPSIZE_K, /* 2495 */ IC_EVEX_K, /* 2496 */ IC_EVEX_K, /* 2497 */ IC_EVEX_XS_K, /* 2498 */ IC_EVEX_XS_K, /* 2499 */ IC_EVEX_XD_K, /* 2500 */ IC_EVEX_XD_K, /* 2501 */ IC_EVEX_XD_K, /* 2502 */ IC_EVEX_XD_K, /* 2503 */ IC_EVEX_W_K, /* 2504 */ IC_EVEX_W_K, /* 2505 */ IC_EVEX_W_XS_K, /* 2506 */ IC_EVEX_W_XS_K, /* 2507 */ IC_EVEX_W_XD_K, /* 2508 */ IC_EVEX_W_XD_K, /* 2509 */ IC_EVEX_W_XD_K, /* 2510 */ IC_EVEX_W_XD_K, /* 2511 */ IC_EVEX_OPSIZE_K, /* 2512 */ IC_EVEX_OPSIZE_K, /* 2513 */ IC_EVEX_OPSIZE_K, /* 2514 */ IC_EVEX_OPSIZE_K, /* 2515 */ IC_EVEX_OPSIZE_K, /* 2516 */ IC_EVEX_OPSIZE_K, /* 2517 */ IC_EVEX_OPSIZE_K, /* 2518 */ IC_EVEX_OPSIZE_K, /* 2519 */ IC_EVEX_W_OPSIZE_K, /* 2520 */ IC_EVEX_W_OPSIZE_K, /* 2521 */ IC_EVEX_W_OPSIZE_K, /* 2522 */ IC_EVEX_W_OPSIZE_K, /* 2523 */ IC_EVEX_W_OPSIZE_K, /* 2524 */ IC_EVEX_W_OPSIZE_K, /* 2525 */ IC_EVEX_W_OPSIZE_K, /* 2526 */ IC_EVEX_W_OPSIZE_K, /* 2527 */ IC_EVEX_K, /* 2528 */ IC_EVEX_K, /* 2529 */ IC_EVEX_XS_K, /* 2530 */ IC_EVEX_XS_K, /* 2531 */ IC_EVEX_XD_K, /* 2532 */ IC_EVEX_XD_K, /* 2533 */ IC_EVEX_XD_K, /* 2534 */ IC_EVEX_XD_K, /* 2535 */ IC_EVEX_W_K, /* 2536 */ IC_EVEX_W_K, /* 2537 */ IC_EVEX_W_XS_K, /* 2538 */ IC_EVEX_W_XS_K, /* 2539 */ IC_EVEX_W_XD_K, /* 2540 */ IC_EVEX_W_XD_K, /* 2541 */ IC_EVEX_W_XD_K, /* 2542 */ IC_EVEX_W_XD_K, /* 2543 */ IC_EVEX_OPSIZE_K, /* 2544 */ IC_EVEX_OPSIZE_K, /* 2545 */ IC_EVEX_OPSIZE_K, /* 2546 */ IC_EVEX_OPSIZE_K, /* 2547 */ IC_EVEX_OPSIZE_K, /* 2548 */ IC_EVEX_OPSIZE_K, /* 2549 */ IC_EVEX_OPSIZE_K, /* 2550 */ IC_EVEX_OPSIZE_K, /* 2551 */ IC_EVEX_W_OPSIZE_K, /* 2552 */ IC_EVEX_W_OPSIZE_K, /* 2553 */ IC_EVEX_W_OPSIZE_K, /* 2554 */ IC_EVEX_W_OPSIZE_K, /* 2555 */ IC_EVEX_W_OPSIZE_K, /* 2556 */ IC_EVEX_W_OPSIZE_K, /* 2557 */ IC_EVEX_W_OPSIZE_K, /* 2558 */ IC_EVEX_W_OPSIZE_K, /* 2559 */ IC, /* 2560 */ IC_64BIT, /* 2561 */ IC_XS, /* 2562 */ IC_64BIT_XS, /* 2563 */ IC_XD, /* 2564 */ IC_64BIT_XD, /* 2565 */ IC_XS, /* 2566 */ IC_64BIT_XS, /* 2567 */ IC, /* 2568 */ IC_64BIT_REXW, /* 2569 */ IC_XS, /* 2570 */ IC_64BIT_REXW_XS, /* 2571 */ IC_XD, /* 2572 */ IC_64BIT_REXW_XD, /* 2573 */ IC_XS, /* 2574 */ IC_64BIT_REXW_XS, /* 2575 */ IC_OPSIZE, /* 2576 */ IC_64BIT_OPSIZE, /* 2577 */ IC_XS_OPSIZE, /* 2578 */ IC_64BIT_XS_OPSIZE, /* 2579 */ IC_XD_OPSIZE, /* 2580 */ IC_64BIT_XD_OPSIZE, /* 2581 */ IC_XS_OPSIZE, /* 2582 */ IC_64BIT_XD_OPSIZE, /* 2583 */ IC_OPSIZE, /* 2584 */ IC_64BIT_REXW_OPSIZE, /* 2585 */ IC_XS_OPSIZE, /* 2586 */ IC_64BIT_REXW_XS, /* 2587 */ IC_XD_OPSIZE, /* 2588 */ IC_64BIT_REXW_XD, /* 2589 */ IC_XS_OPSIZE, /* 2590 */ IC_64BIT_REXW_XS, /* 2591 */ IC_ADSIZE, /* 2592 */ IC_64BIT_ADSIZE, /* 2593 */ IC_XS, /* 2594 */ IC_64BIT_XS, /* 2595 */ IC_XD, /* 2596 */ IC_64BIT_XD, /* 2597 */ IC_XS, /* 2598 */ IC_64BIT_XS, /* 2599 */ IC_ADSIZE, /* 2600 */ IC_64BIT_REXW_ADSIZE, /* 2601 */ IC_XS, /* 2602 */ IC_64BIT_REXW_XS, /* 2603 */ IC_XD, /* 2604 */ IC_64BIT_REXW_XD, /* 2605 */ IC_XS, /* 2606 */ IC_64BIT_REXW_XS, /* 2607 */ IC_OPSIZE_ADSIZE, /* 2608 */ IC_64BIT_OPSIZE_ADSIZE, /* 2609 */ IC_XS_OPSIZE, /* 2610 */ IC_64BIT_XS_OPSIZE, /* 2611 */ IC_XD_OPSIZE, /* 2612 */ IC_64BIT_XD_OPSIZE, /* 2613 */ IC_XS_OPSIZE, /* 2614 */ IC_64BIT_XD_OPSIZE, /* 2615 */ IC_OPSIZE_ADSIZE, /* 2616 */ IC_64BIT_REXW_OPSIZE, /* 2617 */ IC_XS_OPSIZE, /* 2618 */ IC_64BIT_REXW_XS, /* 2619 */ IC_XD_OPSIZE, /* 2620 */ IC_64BIT_REXW_XD, /* 2621 */ IC_XS_OPSIZE, /* 2622 */ IC_64BIT_REXW_XS, /* 2623 */ IC_VEX, /* 2624 */ IC_VEX, /* 2625 */ IC_VEX_XS, /* 2626 */ IC_VEX_XS, /* 2627 */ IC_VEX_XD, /* 2628 */ IC_VEX_XD, /* 2629 */ IC_VEX_XD, /* 2630 */ IC_VEX_XD, /* 2631 */ IC_VEX_W, /* 2632 */ IC_VEX_W, /* 2633 */ IC_VEX_W_XS, /* 2634 */ IC_VEX_W_XS, /* 2635 */ IC_VEX_W_XD, /* 2636 */ IC_VEX_W_XD, /* 2637 */ IC_VEX_W_XD, /* 2638 */ IC_VEX_W_XD, /* 2639 */ IC_VEX_OPSIZE, /* 2640 */ IC_VEX_OPSIZE, /* 2641 */ IC_VEX_OPSIZE, /* 2642 */ IC_VEX_OPSIZE, /* 2643 */ IC_VEX_OPSIZE, /* 2644 */ IC_VEX_OPSIZE, /* 2645 */ IC_VEX_OPSIZE, /* 2646 */ IC_VEX_OPSIZE, /* 2647 */ IC_VEX_W_OPSIZE, /* 2648 */ IC_VEX_W_OPSIZE, /* 2649 */ IC_VEX_W_OPSIZE, /* 2650 */ IC_VEX_W_OPSIZE, /* 2651 */ IC_VEX_W_OPSIZE, /* 2652 */ IC_VEX_W_OPSIZE, /* 2653 */ IC_VEX_W_OPSIZE, /* 2654 */ IC_VEX_W_OPSIZE, /* 2655 */ IC_VEX, /* 2656 */ IC_VEX, /* 2657 */ IC_VEX_XS, /* 2658 */ IC_VEX_XS, /* 2659 */ IC_VEX_XD, /* 2660 */ IC_VEX_XD, /* 2661 */ IC_VEX_XD, /* 2662 */ IC_VEX_XD, /* 2663 */ IC_VEX_W, /* 2664 */ IC_VEX_W, /* 2665 */ IC_VEX_W_XS, /* 2666 */ IC_VEX_W_XS, /* 2667 */ IC_VEX_W_XD, /* 2668 */ IC_VEX_W_XD, /* 2669 */ IC_VEX_W_XD, /* 2670 */ IC_VEX_W_XD, /* 2671 */ IC_VEX_OPSIZE, /* 2672 */ IC_VEX_OPSIZE, /* 2673 */ IC_VEX_OPSIZE, /* 2674 */ IC_VEX_OPSIZE, /* 2675 */ IC_VEX_OPSIZE, /* 2676 */ IC_VEX_OPSIZE, /* 2677 */ IC_VEX_OPSIZE, /* 2678 */ IC_VEX_OPSIZE, /* 2679 */ IC_VEX_W_OPSIZE, /* 2680 */ IC_VEX_W_OPSIZE, /* 2681 */ IC_VEX_W_OPSIZE, /* 2682 */ IC_VEX_W_OPSIZE, /* 2683 */ IC_VEX_W_OPSIZE, /* 2684 */ IC_VEX_W_OPSIZE, /* 2685 */ IC_VEX_W_OPSIZE, /* 2686 */ IC_VEX_W_OPSIZE, /* 2687 */ IC_VEX_L, /* 2688 */ IC_VEX_L, /* 2689 */ IC_VEX_L_XS, /* 2690 */ IC_VEX_L_XS, /* 2691 */ IC_VEX_L_XD, /* 2692 */ IC_VEX_L_XD, /* 2693 */ IC_VEX_L_XD, /* 2694 */ IC_VEX_L_XD, /* 2695 */ IC_VEX_L_W, /* 2696 */ IC_VEX_L_W, /* 2697 */ IC_VEX_L_W_XS, /* 2698 */ IC_VEX_L_W_XS, /* 2699 */ IC_VEX_L_W_XD, /* 2700 */ IC_VEX_L_W_XD, /* 2701 */ IC_VEX_L_W_XD, /* 2702 */ IC_VEX_L_W_XD, /* 2703 */ IC_VEX_L_OPSIZE, /* 2704 */ IC_VEX_L_OPSIZE, /* 2705 */ IC_VEX_L_OPSIZE, /* 2706 */ IC_VEX_L_OPSIZE, /* 2707 */ IC_VEX_L_OPSIZE, /* 2708 */ IC_VEX_L_OPSIZE, /* 2709 */ IC_VEX_L_OPSIZE, /* 2710 */ IC_VEX_L_OPSIZE, /* 2711 */ IC_VEX_L_W_OPSIZE, /* 2712 */ IC_VEX_L_W_OPSIZE, /* 2713 */ IC_VEX_L_W_OPSIZE, /* 2714 */ IC_VEX_L_W_OPSIZE, /* 2715 */ IC_VEX_L_W_OPSIZE, /* 2716 */ IC_VEX_L_W_OPSIZE, /* 2717 */ IC_VEX_L_W_OPSIZE, /* 2718 */ IC_VEX_L_W_OPSIZE, /* 2719 */ IC_VEX_L, /* 2720 */ IC_VEX_L, /* 2721 */ IC_VEX_L_XS, /* 2722 */ IC_VEX_L_XS, /* 2723 */ IC_VEX_L_XD, /* 2724 */ IC_VEX_L_XD, /* 2725 */ IC_VEX_L_XD, /* 2726 */ IC_VEX_L_XD, /* 2727 */ IC_VEX_L_W, /* 2728 */ IC_VEX_L_W, /* 2729 */ IC_VEX_L_W_XS, /* 2730 */ IC_VEX_L_W_XS, /* 2731 */ IC_VEX_L_W_XD, /* 2732 */ IC_VEX_L_W_XD, /* 2733 */ IC_VEX_L_W_XD, /* 2734 */ IC_VEX_L_W_XD, /* 2735 */ IC_VEX_L_OPSIZE, /* 2736 */ IC_VEX_L_OPSIZE, /* 2737 */ IC_VEX_L_OPSIZE, /* 2738 */ IC_VEX_L_OPSIZE, /* 2739 */ IC_VEX_L_OPSIZE, /* 2740 */ IC_VEX_L_OPSIZE, /* 2741 */ IC_VEX_L_OPSIZE, /* 2742 */ IC_VEX_L_OPSIZE, /* 2743 */ IC_VEX_L_W_OPSIZE, /* 2744 */ IC_VEX_L_W_OPSIZE, /* 2745 */ IC_VEX_L_W_OPSIZE, /* 2746 */ IC_VEX_L_W_OPSIZE, /* 2747 */ IC_VEX_L_W_OPSIZE, /* 2748 */ IC_VEX_L_W_OPSIZE, /* 2749 */ IC_VEX_L_W_OPSIZE, /* 2750 */ IC_VEX_L_W_OPSIZE, /* 2751 */ IC_VEX_L, /* 2752 */ IC_VEX_L, /* 2753 */ IC_VEX_L_XS, /* 2754 */ IC_VEX_L_XS, /* 2755 */ IC_VEX_L_XD, /* 2756 */ IC_VEX_L_XD, /* 2757 */ IC_VEX_L_XD, /* 2758 */ IC_VEX_L_XD, /* 2759 */ IC_VEX_L_W, /* 2760 */ IC_VEX_L_W, /* 2761 */ IC_VEX_L_W_XS, /* 2762 */ IC_VEX_L_W_XS, /* 2763 */ IC_VEX_L_W_XD, /* 2764 */ IC_VEX_L_W_XD, /* 2765 */ IC_VEX_L_W_XD, /* 2766 */ IC_VEX_L_W_XD, /* 2767 */ IC_VEX_L_OPSIZE, /* 2768 */ IC_VEX_L_OPSIZE, /* 2769 */ IC_VEX_L_OPSIZE, /* 2770 */ IC_VEX_L_OPSIZE, /* 2771 */ IC_VEX_L_OPSIZE, /* 2772 */ IC_VEX_L_OPSIZE, /* 2773 */ IC_VEX_L_OPSIZE, /* 2774 */ IC_VEX_L_OPSIZE, /* 2775 */ IC_VEX_L_W_OPSIZE, /* 2776 */ IC_VEX_L_W_OPSIZE, /* 2777 */ IC_VEX_L_W_OPSIZE, /* 2778 */ IC_VEX_L_W_OPSIZE, /* 2779 */ IC_VEX_L_W_OPSIZE, /* 2780 */ IC_VEX_L_W_OPSIZE, /* 2781 */ IC_VEX_L_W_OPSIZE, /* 2782 */ IC_VEX_L_W_OPSIZE, /* 2783 */ IC_VEX_L, /* 2784 */ IC_VEX_L, /* 2785 */ IC_VEX_L_XS, /* 2786 */ IC_VEX_L_XS, /* 2787 */ IC_VEX_L_XD, /* 2788 */ IC_VEX_L_XD, /* 2789 */ IC_VEX_L_XD, /* 2790 */ IC_VEX_L_XD, /* 2791 */ IC_VEX_L_W, /* 2792 */ IC_VEX_L_W, /* 2793 */ IC_VEX_L_W_XS, /* 2794 */ IC_VEX_L_W_XS, /* 2795 */ IC_VEX_L_W_XD, /* 2796 */ IC_VEX_L_W_XD, /* 2797 */ IC_VEX_L_W_XD, /* 2798 */ IC_VEX_L_W_XD, /* 2799 */ IC_VEX_L_OPSIZE, /* 2800 */ IC_VEX_L_OPSIZE, /* 2801 */ IC_VEX_L_OPSIZE, /* 2802 */ IC_VEX_L_OPSIZE, /* 2803 */ IC_VEX_L_OPSIZE, /* 2804 */ IC_VEX_L_OPSIZE, /* 2805 */ IC_VEX_L_OPSIZE, /* 2806 */ IC_VEX_L_OPSIZE, /* 2807 */ IC_VEX_L_W_OPSIZE, /* 2808 */ IC_VEX_L_W_OPSIZE, /* 2809 */ IC_VEX_L_W_OPSIZE, /* 2810 */ IC_VEX_L_W_OPSIZE, /* 2811 */ IC_VEX_L_W_OPSIZE, /* 2812 */ IC_VEX_L_W_OPSIZE, /* 2813 */ IC_VEX_L_W_OPSIZE, /* 2814 */ IC_VEX_L_W_OPSIZE, /* 2815 */ IC_EVEX_L_K, /* 2816 */ IC_EVEX_L_K, /* 2817 */ IC_EVEX_L_XS_K, /* 2818 */ IC_EVEX_L_XS_K, /* 2819 */ IC_EVEX_L_XD_K, /* 2820 */ IC_EVEX_L_XD_K, /* 2821 */ IC_EVEX_L_XD_K, /* 2822 */ IC_EVEX_L_XD_K, /* 2823 */ IC_EVEX_L_W_K, /* 2824 */ IC_EVEX_L_W_K, /* 2825 */ IC_EVEX_L_W_XS_K, /* 2826 */ IC_EVEX_L_W_XS_K, /* 2827 */ IC_EVEX_L_W_XD_K, /* 2828 */ IC_EVEX_L_W_XD_K, /* 2829 */ IC_EVEX_L_W_XD_K, /* 2830 */ IC_EVEX_L_W_XD_K, /* 2831 */ IC_EVEX_L_OPSIZE_K, /* 2832 */ IC_EVEX_L_OPSIZE_K, /* 2833 */ IC_EVEX_L_OPSIZE_K, /* 2834 */ IC_EVEX_L_OPSIZE_K, /* 2835 */ IC_EVEX_L_OPSIZE_K, /* 2836 */ IC_EVEX_L_OPSIZE_K, /* 2837 */ IC_EVEX_L_OPSIZE_K, /* 2838 */ IC_EVEX_L_OPSIZE_K, /* 2839 */ IC_EVEX_L_W_OPSIZE_K, /* 2840 */ IC_EVEX_L_W_OPSIZE_K, /* 2841 */ IC_EVEX_L_W_OPSIZE_K, /* 2842 */ IC_EVEX_L_W_OPSIZE_K, /* 2843 */ IC_EVEX_L_W_OPSIZE_K, /* 2844 */ IC_EVEX_L_W_OPSIZE_K, /* 2845 */ IC_EVEX_L_W_OPSIZE_K, /* 2846 */ IC_EVEX_L_W_OPSIZE_K, /* 2847 */ IC_EVEX_L_K, /* 2848 */ IC_EVEX_L_K, /* 2849 */ IC_EVEX_L_XS_K, /* 2850 */ IC_EVEX_L_XS_K, /* 2851 */ IC_EVEX_L_XD_K, /* 2852 */ IC_EVEX_L_XD_K, /* 2853 */ IC_EVEX_L_XD_K, /* 2854 */ IC_EVEX_L_XD_K, /* 2855 */ IC_EVEX_L_W_K, /* 2856 */ IC_EVEX_L_W_K, /* 2857 */ IC_EVEX_L_W_XS_K, /* 2858 */ IC_EVEX_L_W_XS_K, /* 2859 */ IC_EVEX_L_W_XD_K, /* 2860 */ IC_EVEX_L_W_XD_K, /* 2861 */ IC_EVEX_L_W_XD_K, /* 2862 */ IC_EVEX_L_W_XD_K, /* 2863 */ IC_EVEX_L_OPSIZE_K, /* 2864 */ IC_EVEX_L_OPSIZE_K, /* 2865 */ IC_EVEX_L_OPSIZE_K, /* 2866 */ IC_EVEX_L_OPSIZE_K, /* 2867 */ IC_EVEX_L_OPSIZE_K, /* 2868 */ IC_EVEX_L_OPSIZE_K, /* 2869 */ IC_EVEX_L_OPSIZE_K, /* 2870 */ IC_EVEX_L_OPSIZE_K, /* 2871 */ IC_EVEX_L_W_OPSIZE_K, /* 2872 */ IC_EVEX_L_W_OPSIZE_K, /* 2873 */ IC_EVEX_L_W_OPSIZE_K, /* 2874 */ IC_EVEX_L_W_OPSIZE_K, /* 2875 */ IC_EVEX_L_W_OPSIZE_K, /* 2876 */ IC_EVEX_L_W_OPSIZE_K, /* 2877 */ IC_EVEX_L_W_OPSIZE_K, /* 2878 */ IC_EVEX_L_W_OPSIZE_K, /* 2879 */ IC_EVEX_L_K, /* 2880 */ IC_EVEX_L_K, /* 2881 */ IC_EVEX_L_XS_K, /* 2882 */ IC_EVEX_L_XS_K, /* 2883 */ IC_EVEX_L_XD_K, /* 2884 */ IC_EVEX_L_XD_K, /* 2885 */ IC_EVEX_L_XD_K, /* 2886 */ IC_EVEX_L_XD_K, /* 2887 */ IC_EVEX_L_W_K, /* 2888 */ IC_EVEX_L_W_K, /* 2889 */ IC_EVEX_L_W_XS_K, /* 2890 */ IC_EVEX_L_W_XS_K, /* 2891 */ IC_EVEX_L_W_XD_K, /* 2892 */ IC_EVEX_L_W_XD_K, /* 2893 */ IC_EVEX_L_W_XD_K, /* 2894 */ IC_EVEX_L_W_XD_K, /* 2895 */ IC_EVEX_L_OPSIZE_K, /* 2896 */ IC_EVEX_L_OPSIZE_K, /* 2897 */ IC_EVEX_L_OPSIZE_K, /* 2898 */ IC_EVEX_L_OPSIZE_K, /* 2899 */ IC_EVEX_L_OPSIZE_K, /* 2900 */ IC_EVEX_L_OPSIZE_K, /* 2901 */ IC_EVEX_L_OPSIZE_K, /* 2902 */ IC_EVEX_L_OPSIZE_K, /* 2903 */ IC_EVEX_L_W_OPSIZE_K, /* 2904 */ IC_EVEX_L_W_OPSIZE_K, /* 2905 */ IC_EVEX_L_W_OPSIZE_K, /* 2906 */ IC_EVEX_L_W_OPSIZE_K, /* 2907 */ IC_EVEX_L_W_OPSIZE_K, /* 2908 */ IC_EVEX_L_W_OPSIZE_K, /* 2909 */ IC_EVEX_L_W_OPSIZE_K, /* 2910 */ IC_EVEX_L_W_OPSIZE_K, /* 2911 */ IC_EVEX_L_K, /* 2912 */ IC_EVEX_L_K, /* 2913 */ IC_EVEX_L_XS_K, /* 2914 */ IC_EVEX_L_XS_K, /* 2915 */ IC_EVEX_L_XD_K, /* 2916 */ IC_EVEX_L_XD_K, /* 2917 */ IC_EVEX_L_XD_K, /* 2918 */ IC_EVEX_L_XD_K, /* 2919 */ IC_EVEX_L_W_K, /* 2920 */ IC_EVEX_L_W_K, /* 2921 */ IC_EVEX_L_W_XS_K, /* 2922 */ IC_EVEX_L_W_XS_K, /* 2923 */ IC_EVEX_L_W_XD_K, /* 2924 */ IC_EVEX_L_W_XD_K, /* 2925 */ IC_EVEX_L_W_XD_K, /* 2926 */ IC_EVEX_L_W_XD_K, /* 2927 */ IC_EVEX_L_OPSIZE_K, /* 2928 */ IC_EVEX_L_OPSIZE_K, /* 2929 */ IC_EVEX_L_OPSIZE_K, /* 2930 */ IC_EVEX_L_OPSIZE_K, /* 2931 */ IC_EVEX_L_OPSIZE_K, /* 2932 */ IC_EVEX_L_OPSIZE_K, /* 2933 */ IC_EVEX_L_OPSIZE_K, /* 2934 */ IC_EVEX_L_OPSIZE_K, /* 2935 */ IC_EVEX_L_W_OPSIZE_K, /* 2936 */ IC_EVEX_L_W_OPSIZE_K, /* 2937 */ IC_EVEX_L_W_OPSIZE_K, /* 2938 */ IC_EVEX_L_W_OPSIZE_K, /* 2939 */ IC_EVEX_L_W_OPSIZE_K, /* 2940 */ IC_EVEX_L_W_OPSIZE_K, /* 2941 */ IC_EVEX_L_W_OPSIZE_K, /* 2942 */ IC_EVEX_L_W_OPSIZE_K, /* 2943 */ IC_EVEX_L_K, /* 2944 */ IC_EVEX_L_K, /* 2945 */ IC_EVEX_L_XS_K, /* 2946 */ IC_EVEX_L_XS_K, /* 2947 */ IC_EVEX_L_XD_K, /* 2948 */ IC_EVEX_L_XD_K, /* 2949 */ IC_EVEX_L_XD_K, /* 2950 */ IC_EVEX_L_XD_K, /* 2951 */ IC_EVEX_L_W_K, /* 2952 */ IC_EVEX_L_W_K, /* 2953 */ IC_EVEX_L_W_XS_K, /* 2954 */ IC_EVEX_L_W_XS_K, /* 2955 */ IC_EVEX_L_W_XD_K, /* 2956 */ IC_EVEX_L_W_XD_K, /* 2957 */ IC_EVEX_L_W_XD_K, /* 2958 */ IC_EVEX_L_W_XD_K, /* 2959 */ IC_EVEX_L_OPSIZE_K, /* 2960 */ IC_EVEX_L_OPSIZE_K, /* 2961 */ IC_EVEX_L_OPSIZE_K, /* 2962 */ IC_EVEX_L_OPSIZE_K, /* 2963 */ IC_EVEX_L_OPSIZE_K, /* 2964 */ IC_EVEX_L_OPSIZE_K, /* 2965 */ IC_EVEX_L_OPSIZE_K, /* 2966 */ IC_EVEX_L_OPSIZE_K, /* 2967 */ IC_EVEX_L_W_OPSIZE_K, /* 2968 */ IC_EVEX_L_W_OPSIZE_K, /* 2969 */ IC_EVEX_L_W_OPSIZE_K, /* 2970 */ IC_EVEX_L_W_OPSIZE_K, /* 2971 */ IC_EVEX_L_W_OPSIZE_K, /* 2972 */ IC_EVEX_L_W_OPSIZE_K, /* 2973 */ IC_EVEX_L_W_OPSIZE_K, /* 2974 */ IC_EVEX_L_W_OPSIZE_K, /* 2975 */ IC_EVEX_L_K, /* 2976 */ IC_EVEX_L_K, /* 2977 */ IC_EVEX_L_XS_K, /* 2978 */ IC_EVEX_L_XS_K, /* 2979 */ IC_EVEX_L_XD_K, /* 2980 */ IC_EVEX_L_XD_K, /* 2981 */ IC_EVEX_L_XD_K, /* 2982 */ IC_EVEX_L_XD_K, /* 2983 */ IC_EVEX_L_W_K, /* 2984 */ IC_EVEX_L_W_K, /* 2985 */ IC_EVEX_L_W_XS_K, /* 2986 */ IC_EVEX_L_W_XS_K, /* 2987 */ IC_EVEX_L_W_XD_K, /* 2988 */ IC_EVEX_L_W_XD_K, /* 2989 */ IC_EVEX_L_W_XD_K, /* 2990 */ IC_EVEX_L_W_XD_K, /* 2991 */ IC_EVEX_L_OPSIZE_K, /* 2992 */ IC_EVEX_L_OPSIZE_K, /* 2993 */ IC_EVEX_L_OPSIZE_K, /* 2994 */ IC_EVEX_L_OPSIZE_K, /* 2995 */ IC_EVEX_L_OPSIZE_K, /* 2996 */ IC_EVEX_L_OPSIZE_K, /* 2997 */ IC_EVEX_L_OPSIZE_K, /* 2998 */ IC_EVEX_L_OPSIZE_K, /* 2999 */ IC_EVEX_L_W_OPSIZE_K, /* 3000 */ IC_EVEX_L_W_OPSIZE_K, /* 3001 */ IC_EVEX_L_W_OPSIZE_K, /* 3002 */ IC_EVEX_L_W_OPSIZE_K, /* 3003 */ IC_EVEX_L_W_OPSIZE_K, /* 3004 */ IC_EVEX_L_W_OPSIZE_K, /* 3005 */ IC_EVEX_L_W_OPSIZE_K, /* 3006 */ IC_EVEX_L_W_OPSIZE_K, /* 3007 */ IC_EVEX_L_K, /* 3008 */ IC_EVEX_L_K, /* 3009 */ IC_EVEX_L_XS_K, /* 3010 */ IC_EVEX_L_XS_K, /* 3011 */ IC_EVEX_L_XD_K, /* 3012 */ IC_EVEX_L_XD_K, /* 3013 */ IC_EVEX_L_XD_K, /* 3014 */ IC_EVEX_L_XD_K, /* 3015 */ IC_EVEX_L_W_K, /* 3016 */ IC_EVEX_L_W_K, /* 3017 */ IC_EVEX_L_W_XS_K, /* 3018 */ IC_EVEX_L_W_XS_K, /* 3019 */ IC_EVEX_L_W_XD_K, /* 3020 */ IC_EVEX_L_W_XD_K, /* 3021 */ IC_EVEX_L_W_XD_K, /* 3022 */ IC_EVEX_L_W_XD_K, /* 3023 */ IC_EVEX_L_OPSIZE_K, /* 3024 */ IC_EVEX_L_OPSIZE_K, /* 3025 */ IC_EVEX_L_OPSIZE_K, /* 3026 */ IC_EVEX_L_OPSIZE_K, /* 3027 */ IC_EVEX_L_OPSIZE_K, /* 3028 */ IC_EVEX_L_OPSIZE_K, /* 3029 */ IC_EVEX_L_OPSIZE_K, /* 3030 */ IC_EVEX_L_OPSIZE_K, /* 3031 */ IC_EVEX_L_W_OPSIZE_K, /* 3032 */ IC_EVEX_L_W_OPSIZE_K, /* 3033 */ IC_EVEX_L_W_OPSIZE_K, /* 3034 */ IC_EVEX_L_W_OPSIZE_K, /* 3035 */ IC_EVEX_L_W_OPSIZE_K, /* 3036 */ IC_EVEX_L_W_OPSIZE_K, /* 3037 */ IC_EVEX_L_W_OPSIZE_K, /* 3038 */ IC_EVEX_L_W_OPSIZE_K, /* 3039 */ IC_EVEX_L_K, /* 3040 */ IC_EVEX_L_K, /* 3041 */ IC_EVEX_L_XS_K, /* 3042 */ IC_EVEX_L_XS_K, /* 3043 */ IC_EVEX_L_XD_K, /* 3044 */ IC_EVEX_L_XD_K, /* 3045 */ IC_EVEX_L_XD_K, /* 3046 */ IC_EVEX_L_XD_K, /* 3047 */ IC_EVEX_L_W_K, /* 3048 */ IC_EVEX_L_W_K, /* 3049 */ IC_EVEX_L_W_XS_K, /* 3050 */ IC_EVEX_L_W_XS_K, /* 3051 */ IC_EVEX_L_W_XD_K, /* 3052 */ IC_EVEX_L_W_XD_K, /* 3053 */ IC_EVEX_L_W_XD_K, /* 3054 */ IC_EVEX_L_W_XD_K, /* 3055 */ IC_EVEX_L_OPSIZE_K, /* 3056 */ IC_EVEX_L_OPSIZE_K, /* 3057 */ IC_EVEX_L_OPSIZE_K, /* 3058 */ IC_EVEX_L_OPSIZE_K, /* 3059 */ IC_EVEX_L_OPSIZE_K, /* 3060 */ IC_EVEX_L_OPSIZE_K, /* 3061 */ IC_EVEX_L_OPSIZE_K, /* 3062 */ IC_EVEX_L_OPSIZE_K, /* 3063 */ IC_EVEX_L_W_OPSIZE_K, /* 3064 */ IC_EVEX_L_W_OPSIZE_K, /* 3065 */ IC_EVEX_L_W_OPSIZE_K, /* 3066 */ IC_EVEX_L_W_OPSIZE_K, /* 3067 */ IC_EVEX_L_W_OPSIZE_K, /* 3068 */ IC_EVEX_L_W_OPSIZE_K, /* 3069 */ IC_EVEX_L_W_OPSIZE_K, /* 3070 */ IC_EVEX_L_W_OPSIZE_K, /* 3071 */ IC, /* 3072 */ IC_64BIT, /* 3073 */ IC_XS, /* 3074 */ IC_64BIT_XS, /* 3075 */ IC_XD, /* 3076 */ IC_64BIT_XD, /* 3077 */ IC_XS, /* 3078 */ IC_64BIT_XS, /* 3079 */ IC, /* 3080 */ IC_64BIT_REXW, /* 3081 */ IC_XS, /* 3082 */ IC_64BIT_REXW_XS, /* 3083 */ IC_XD, /* 3084 */ IC_64BIT_REXW_XD, /* 3085 */ IC_XS, /* 3086 */ IC_64BIT_REXW_XS, /* 3087 */ IC_OPSIZE, /* 3088 */ IC_64BIT_OPSIZE, /* 3089 */ IC_XS_OPSIZE, /* 3090 */ IC_64BIT_XS_OPSIZE, /* 3091 */ IC_XD_OPSIZE, /* 3092 */ IC_64BIT_XD_OPSIZE, /* 3093 */ IC_XS_OPSIZE, /* 3094 */ IC_64BIT_XD_OPSIZE, /* 3095 */ IC_OPSIZE, /* 3096 */ IC_64BIT_REXW_OPSIZE, /* 3097 */ IC_XS_OPSIZE, /* 3098 */ IC_64BIT_REXW_XS, /* 3099 */ IC_XD_OPSIZE, /* 3100 */ IC_64BIT_REXW_XD, /* 3101 */ IC_XS_OPSIZE, /* 3102 */ IC_64BIT_REXW_XS, /* 3103 */ IC_ADSIZE, /* 3104 */ IC_64BIT_ADSIZE, /* 3105 */ IC_XS, /* 3106 */ IC_64BIT_XS, /* 3107 */ IC_XD, /* 3108 */ IC_64BIT_XD, /* 3109 */ IC_XS, /* 3110 */ IC_64BIT_XS, /* 3111 */ IC_ADSIZE, /* 3112 */ IC_64BIT_REXW_ADSIZE, /* 3113 */ IC_XS, /* 3114 */ IC_64BIT_REXW_XS, /* 3115 */ IC_XD, /* 3116 */ IC_64BIT_REXW_XD, /* 3117 */ IC_XS, /* 3118 */ IC_64BIT_REXW_XS, /* 3119 */ IC_OPSIZE_ADSIZE, /* 3120 */ IC_64BIT_OPSIZE_ADSIZE, /* 3121 */ IC_XS_OPSIZE, /* 3122 */ IC_64BIT_XS_OPSIZE, /* 3123 */ IC_XD_OPSIZE, /* 3124 */ IC_64BIT_XD_OPSIZE, /* 3125 */ IC_XS_OPSIZE, /* 3126 */ IC_64BIT_XD_OPSIZE, /* 3127 */ IC_OPSIZE_ADSIZE, /* 3128 */ IC_64BIT_REXW_OPSIZE, /* 3129 */ IC_XS_OPSIZE, /* 3130 */ IC_64BIT_REXW_XS, /* 3131 */ IC_XD_OPSIZE, /* 3132 */ IC_64BIT_REXW_XD, /* 3133 */ IC_XS_OPSIZE, /* 3134 */ IC_64BIT_REXW_XS, /* 3135 */ IC_VEX, /* 3136 */ IC_VEX, /* 3137 */ IC_VEX_XS, /* 3138 */ IC_VEX_XS, /* 3139 */ IC_VEX_XD, /* 3140 */ IC_VEX_XD, /* 3141 */ IC_VEX_XD, /* 3142 */ IC_VEX_XD, /* 3143 */ IC_VEX_W, /* 3144 */ IC_VEX_W, /* 3145 */ IC_VEX_W_XS, /* 3146 */ IC_VEX_W_XS, /* 3147 */ IC_VEX_W_XD, /* 3148 */ IC_VEX_W_XD, /* 3149 */ IC_VEX_W_XD, /* 3150 */ IC_VEX_W_XD, /* 3151 */ IC_VEX_OPSIZE, /* 3152 */ IC_VEX_OPSIZE, /* 3153 */ IC_VEX_OPSIZE, /* 3154 */ IC_VEX_OPSIZE, /* 3155 */ IC_VEX_OPSIZE, /* 3156 */ IC_VEX_OPSIZE, /* 3157 */ IC_VEX_OPSIZE, /* 3158 */ IC_VEX_OPSIZE, /* 3159 */ IC_VEX_W_OPSIZE, /* 3160 */ IC_VEX_W_OPSIZE, /* 3161 */ IC_VEX_W_OPSIZE, /* 3162 */ IC_VEX_W_OPSIZE, /* 3163 */ IC_VEX_W_OPSIZE, /* 3164 */ IC_VEX_W_OPSIZE, /* 3165 */ IC_VEX_W_OPSIZE, /* 3166 */ IC_VEX_W_OPSIZE, /* 3167 */ IC_VEX, /* 3168 */ IC_VEX, /* 3169 */ IC_VEX_XS, /* 3170 */ IC_VEX_XS, /* 3171 */ IC_VEX_XD, /* 3172 */ IC_VEX_XD, /* 3173 */ IC_VEX_XD, /* 3174 */ IC_VEX_XD, /* 3175 */ IC_VEX_W, /* 3176 */ IC_VEX_W, /* 3177 */ IC_VEX_W_XS, /* 3178 */ IC_VEX_W_XS, /* 3179 */ IC_VEX_W_XD, /* 3180 */ IC_VEX_W_XD, /* 3181 */ IC_VEX_W_XD, /* 3182 */ IC_VEX_W_XD, /* 3183 */ IC_VEX_OPSIZE, /* 3184 */ IC_VEX_OPSIZE, /* 3185 */ IC_VEX_OPSIZE, /* 3186 */ IC_VEX_OPSIZE, /* 3187 */ IC_VEX_OPSIZE, /* 3188 */ IC_VEX_OPSIZE, /* 3189 */ IC_VEX_OPSIZE, /* 3190 */ IC_VEX_OPSIZE, /* 3191 */ IC_VEX_W_OPSIZE, /* 3192 */ IC_VEX_W_OPSIZE, /* 3193 */ IC_VEX_W_OPSIZE, /* 3194 */ IC_VEX_W_OPSIZE, /* 3195 */ IC_VEX_W_OPSIZE, /* 3196 */ IC_VEX_W_OPSIZE, /* 3197 */ IC_VEX_W_OPSIZE, /* 3198 */ IC_VEX_W_OPSIZE, /* 3199 */ IC_VEX_L, /* 3200 */ IC_VEX_L, /* 3201 */ IC_VEX_L_XS, /* 3202 */ IC_VEX_L_XS, /* 3203 */ IC_VEX_L_XD, /* 3204 */ IC_VEX_L_XD, /* 3205 */ IC_VEX_L_XD, /* 3206 */ IC_VEX_L_XD, /* 3207 */ IC_VEX_L_W, /* 3208 */ IC_VEX_L_W, /* 3209 */ IC_VEX_L_W_XS, /* 3210 */ IC_VEX_L_W_XS, /* 3211 */ IC_VEX_L_W_XD, /* 3212 */ IC_VEX_L_W_XD, /* 3213 */ IC_VEX_L_W_XD, /* 3214 */ IC_VEX_L_W_XD, /* 3215 */ IC_VEX_L_OPSIZE, /* 3216 */ IC_VEX_L_OPSIZE, /* 3217 */ IC_VEX_L_OPSIZE, /* 3218 */ IC_VEX_L_OPSIZE, /* 3219 */ IC_VEX_L_OPSIZE, /* 3220 */ IC_VEX_L_OPSIZE, /* 3221 */ IC_VEX_L_OPSIZE, /* 3222 */ IC_VEX_L_OPSIZE, /* 3223 */ IC_VEX_L_W_OPSIZE, /* 3224 */ IC_VEX_L_W_OPSIZE, /* 3225 */ IC_VEX_L_W_OPSIZE, /* 3226 */ IC_VEX_L_W_OPSIZE, /* 3227 */ IC_VEX_L_W_OPSIZE, /* 3228 */ IC_VEX_L_W_OPSIZE, /* 3229 */ IC_VEX_L_W_OPSIZE, /* 3230 */ IC_VEX_L_W_OPSIZE, /* 3231 */ IC_VEX_L, /* 3232 */ IC_VEX_L, /* 3233 */ IC_VEX_L_XS, /* 3234 */ IC_VEX_L_XS, /* 3235 */ IC_VEX_L_XD, /* 3236 */ IC_VEX_L_XD, /* 3237 */ IC_VEX_L_XD, /* 3238 */ IC_VEX_L_XD, /* 3239 */ IC_VEX_L_W, /* 3240 */ IC_VEX_L_W, /* 3241 */ IC_VEX_L_W_XS, /* 3242 */ IC_VEX_L_W_XS, /* 3243 */ IC_VEX_L_W_XD, /* 3244 */ IC_VEX_L_W_XD, /* 3245 */ IC_VEX_L_W_XD, /* 3246 */ IC_VEX_L_W_XD, /* 3247 */ IC_VEX_L_OPSIZE, /* 3248 */ IC_VEX_L_OPSIZE, /* 3249 */ IC_VEX_L_OPSIZE, /* 3250 */ IC_VEX_L_OPSIZE, /* 3251 */ IC_VEX_L_OPSIZE, /* 3252 */ IC_VEX_L_OPSIZE, /* 3253 */ IC_VEX_L_OPSIZE, /* 3254 */ IC_VEX_L_OPSIZE, /* 3255 */ IC_VEX_L_W_OPSIZE, /* 3256 */ IC_VEX_L_W_OPSIZE, /* 3257 */ IC_VEX_L_W_OPSIZE, /* 3258 */ IC_VEX_L_W_OPSIZE, /* 3259 */ IC_VEX_L_W_OPSIZE, /* 3260 */ IC_VEX_L_W_OPSIZE, /* 3261 */ IC_VEX_L_W_OPSIZE, /* 3262 */ IC_VEX_L_W_OPSIZE, /* 3263 */ IC_VEX_L, /* 3264 */ IC_VEX_L, /* 3265 */ IC_VEX_L_XS, /* 3266 */ IC_VEX_L_XS, /* 3267 */ IC_VEX_L_XD, /* 3268 */ IC_VEX_L_XD, /* 3269 */ IC_VEX_L_XD, /* 3270 */ IC_VEX_L_XD, /* 3271 */ IC_VEX_L_W, /* 3272 */ IC_VEX_L_W, /* 3273 */ IC_VEX_L_W_XS, /* 3274 */ IC_VEX_L_W_XS, /* 3275 */ IC_VEX_L_W_XD, /* 3276 */ IC_VEX_L_W_XD, /* 3277 */ IC_VEX_L_W_XD, /* 3278 */ IC_VEX_L_W_XD, /* 3279 */ IC_VEX_L_OPSIZE, /* 3280 */ IC_VEX_L_OPSIZE, /* 3281 */ IC_VEX_L_OPSIZE, /* 3282 */ IC_VEX_L_OPSIZE, /* 3283 */ IC_VEX_L_OPSIZE, /* 3284 */ IC_VEX_L_OPSIZE, /* 3285 */ IC_VEX_L_OPSIZE, /* 3286 */ IC_VEX_L_OPSIZE, /* 3287 */ IC_VEX_L_W_OPSIZE, /* 3288 */ IC_VEX_L_W_OPSIZE, /* 3289 */ IC_VEX_L_W_OPSIZE, /* 3290 */ IC_VEX_L_W_OPSIZE, /* 3291 */ IC_VEX_L_W_OPSIZE, /* 3292 */ IC_VEX_L_W_OPSIZE, /* 3293 */ IC_VEX_L_W_OPSIZE, /* 3294 */ IC_VEX_L_W_OPSIZE, /* 3295 */ IC_VEX_L, /* 3296 */ IC_VEX_L, /* 3297 */ IC_VEX_L_XS, /* 3298 */ IC_VEX_L_XS, /* 3299 */ IC_VEX_L_XD, /* 3300 */ IC_VEX_L_XD, /* 3301 */ IC_VEX_L_XD, /* 3302 */ IC_VEX_L_XD, /* 3303 */ IC_VEX_L_W, /* 3304 */ IC_VEX_L_W, /* 3305 */ IC_VEX_L_W_XS, /* 3306 */ IC_VEX_L_W_XS, /* 3307 */ IC_VEX_L_W_XD, /* 3308 */ IC_VEX_L_W_XD, /* 3309 */ IC_VEX_L_W_XD, /* 3310 */ IC_VEX_L_W_XD, /* 3311 */ IC_VEX_L_OPSIZE, /* 3312 */ IC_VEX_L_OPSIZE, /* 3313 */ IC_VEX_L_OPSIZE, /* 3314 */ IC_VEX_L_OPSIZE, /* 3315 */ IC_VEX_L_OPSIZE, /* 3316 */ IC_VEX_L_OPSIZE, /* 3317 */ IC_VEX_L_OPSIZE, /* 3318 */ IC_VEX_L_OPSIZE, /* 3319 */ IC_VEX_L_W_OPSIZE, /* 3320 */ IC_VEX_L_W_OPSIZE, /* 3321 */ IC_VEX_L_W_OPSIZE, /* 3322 */ IC_VEX_L_W_OPSIZE, /* 3323 */ IC_VEX_L_W_OPSIZE, /* 3324 */ IC_VEX_L_W_OPSIZE, /* 3325 */ IC_VEX_L_W_OPSIZE, /* 3326 */ IC_VEX_L_W_OPSIZE, /* 3327 */ IC_EVEX_L2_K, /* 3328 */ IC_EVEX_L2_K, /* 3329 */ IC_EVEX_L2_XS_K, /* 3330 */ IC_EVEX_L2_XS_K, /* 3331 */ IC_EVEX_L2_XD_K, /* 3332 */ IC_EVEX_L2_XD_K, /* 3333 */ IC_EVEX_L2_XD_K, /* 3334 */ IC_EVEX_L2_XD_K, /* 3335 */ IC_EVEX_L2_W_K, /* 3336 */ IC_EVEX_L2_W_K, /* 3337 */ IC_EVEX_L2_W_XS_K, /* 3338 */ IC_EVEX_L2_W_XS_K, /* 3339 */ IC_EVEX_L2_W_XD_K, /* 3340 */ IC_EVEX_L2_W_XD_K, /* 3341 */ IC_EVEX_L2_W_XD_K, /* 3342 */ IC_EVEX_L2_W_XD_K, /* 3343 */ IC_EVEX_L2_OPSIZE_K, /* 3344 */ IC_EVEX_L2_OPSIZE_K, /* 3345 */ IC_EVEX_L2_OPSIZE_K, /* 3346 */ IC_EVEX_L2_OPSIZE_K, /* 3347 */ IC_EVEX_L2_OPSIZE_K, /* 3348 */ IC_EVEX_L2_OPSIZE_K, /* 3349 */ IC_EVEX_L2_OPSIZE_K, /* 3350 */ IC_EVEX_L2_OPSIZE_K, /* 3351 */ IC_EVEX_L2_W_OPSIZE_K, /* 3352 */ IC_EVEX_L2_W_OPSIZE_K, /* 3353 */ IC_EVEX_L2_W_OPSIZE_K, /* 3354 */ IC_EVEX_L2_W_OPSIZE_K, /* 3355 */ IC_EVEX_L2_W_OPSIZE_K, /* 3356 */ IC_EVEX_L2_W_OPSIZE_K, /* 3357 */ IC_EVEX_L2_W_OPSIZE_K, /* 3358 */ IC_EVEX_L2_W_OPSIZE_K, /* 3359 */ IC_EVEX_L2_K, /* 3360 */ IC_EVEX_L2_K, /* 3361 */ IC_EVEX_L2_XS_K, /* 3362 */ IC_EVEX_L2_XS_K, /* 3363 */ IC_EVEX_L2_XD_K, /* 3364 */ IC_EVEX_L2_XD_K, /* 3365 */ IC_EVEX_L2_XD_K, /* 3366 */ IC_EVEX_L2_XD_K, /* 3367 */ IC_EVEX_L2_W_K, /* 3368 */ IC_EVEX_L2_W_K, /* 3369 */ IC_EVEX_L2_W_XS_K, /* 3370 */ IC_EVEX_L2_W_XS_K, /* 3371 */ IC_EVEX_L2_W_XD_K, /* 3372 */ IC_EVEX_L2_W_XD_K, /* 3373 */ IC_EVEX_L2_W_XD_K, /* 3374 */ IC_EVEX_L2_W_XD_K, /* 3375 */ IC_EVEX_L2_OPSIZE_K, /* 3376 */ IC_EVEX_L2_OPSIZE_K, /* 3377 */ IC_EVEX_L2_OPSIZE_K, /* 3378 */ IC_EVEX_L2_OPSIZE_K, /* 3379 */ IC_EVEX_L2_OPSIZE_K, /* 3380 */ IC_EVEX_L2_OPSIZE_K, /* 3381 */ IC_EVEX_L2_OPSIZE_K, /* 3382 */ IC_EVEX_L2_OPSIZE_K, /* 3383 */ IC_EVEX_L2_W_OPSIZE_K, /* 3384 */ IC_EVEX_L2_W_OPSIZE_K, /* 3385 */ IC_EVEX_L2_W_OPSIZE_K, /* 3386 */ IC_EVEX_L2_W_OPSIZE_K, /* 3387 */ IC_EVEX_L2_W_OPSIZE_K, /* 3388 */ IC_EVEX_L2_W_OPSIZE_K, /* 3389 */ IC_EVEX_L2_W_OPSIZE_K, /* 3390 */ IC_EVEX_L2_W_OPSIZE_K, /* 3391 */ IC_EVEX_L2_K, /* 3392 */ IC_EVEX_L2_K, /* 3393 */ IC_EVEX_L2_XS_K, /* 3394 */ IC_EVEX_L2_XS_K, /* 3395 */ IC_EVEX_L2_XD_K, /* 3396 */ IC_EVEX_L2_XD_K, /* 3397 */ IC_EVEX_L2_XD_K, /* 3398 */ IC_EVEX_L2_XD_K, /* 3399 */ IC_EVEX_L2_W_K, /* 3400 */ IC_EVEX_L2_W_K, /* 3401 */ IC_EVEX_L2_W_XS_K, /* 3402 */ IC_EVEX_L2_W_XS_K, /* 3403 */ IC_EVEX_L2_W_XD_K, /* 3404 */ IC_EVEX_L2_W_XD_K, /* 3405 */ IC_EVEX_L2_W_XD_K, /* 3406 */ IC_EVEX_L2_W_XD_K, /* 3407 */ IC_EVEX_L2_OPSIZE_K, /* 3408 */ IC_EVEX_L2_OPSIZE_K, /* 3409 */ IC_EVEX_L2_OPSIZE_K, /* 3410 */ IC_EVEX_L2_OPSIZE_K, /* 3411 */ IC_EVEX_L2_OPSIZE_K, /* 3412 */ IC_EVEX_L2_OPSIZE_K, /* 3413 */ IC_EVEX_L2_OPSIZE_K, /* 3414 */ IC_EVEX_L2_OPSIZE_K, /* 3415 */ IC_EVEX_L2_W_OPSIZE_K, /* 3416 */ IC_EVEX_L2_W_OPSIZE_K, /* 3417 */ IC_EVEX_L2_W_OPSIZE_K, /* 3418 */ IC_EVEX_L2_W_OPSIZE_K, /* 3419 */ IC_EVEX_L2_W_OPSIZE_K, /* 3420 */ IC_EVEX_L2_W_OPSIZE_K, /* 3421 */ IC_EVEX_L2_W_OPSIZE_K, /* 3422 */ IC_EVEX_L2_W_OPSIZE_K, /* 3423 */ IC_EVEX_L2_K, /* 3424 */ IC_EVEX_L2_K, /* 3425 */ IC_EVEX_L2_XS_K, /* 3426 */ IC_EVEX_L2_XS_K, /* 3427 */ IC_EVEX_L2_XD_K, /* 3428 */ IC_EVEX_L2_XD_K, /* 3429 */ IC_EVEX_L2_XD_K, /* 3430 */ IC_EVEX_L2_XD_K, /* 3431 */ IC_EVEX_L2_W_K, /* 3432 */ IC_EVEX_L2_W_K, /* 3433 */ IC_EVEX_L2_W_XS_K, /* 3434 */ IC_EVEX_L2_W_XS_K, /* 3435 */ IC_EVEX_L2_W_XD_K, /* 3436 */ IC_EVEX_L2_W_XD_K, /* 3437 */ IC_EVEX_L2_W_XD_K, /* 3438 */ IC_EVEX_L2_W_XD_K, /* 3439 */ IC_EVEX_L2_OPSIZE_K, /* 3440 */ IC_EVEX_L2_OPSIZE_K, /* 3441 */ IC_EVEX_L2_OPSIZE_K, /* 3442 */ IC_EVEX_L2_OPSIZE_K, /* 3443 */ IC_EVEX_L2_OPSIZE_K, /* 3444 */ IC_EVEX_L2_OPSIZE_K, /* 3445 */ IC_EVEX_L2_OPSIZE_K, /* 3446 */ IC_EVEX_L2_OPSIZE_K, /* 3447 */ IC_EVEX_L2_W_OPSIZE_K, /* 3448 */ IC_EVEX_L2_W_OPSIZE_K, /* 3449 */ IC_EVEX_L2_W_OPSIZE_K, /* 3450 */ IC_EVEX_L2_W_OPSIZE_K, /* 3451 */ IC_EVEX_L2_W_OPSIZE_K, /* 3452 */ IC_EVEX_L2_W_OPSIZE_K, /* 3453 */ IC_EVEX_L2_W_OPSIZE_K, /* 3454 */ IC_EVEX_L2_W_OPSIZE_K, /* 3455 */ IC_EVEX_L2_K, /* 3456 */ IC_EVEX_L2_K, /* 3457 */ IC_EVEX_L2_XS_K, /* 3458 */ IC_EVEX_L2_XS_K, /* 3459 */ IC_EVEX_L2_XD_K, /* 3460 */ IC_EVEX_L2_XD_K, /* 3461 */ IC_EVEX_L2_XD_K, /* 3462 */ IC_EVEX_L2_XD_K, /* 3463 */ IC_EVEX_L2_W_K, /* 3464 */ IC_EVEX_L2_W_K, /* 3465 */ IC_EVEX_L2_W_XS_K, /* 3466 */ IC_EVEX_L2_W_XS_K, /* 3467 */ IC_EVEX_L2_W_XD_K, /* 3468 */ IC_EVEX_L2_W_XD_K, /* 3469 */ IC_EVEX_L2_W_XD_K, /* 3470 */ IC_EVEX_L2_W_XD_K, /* 3471 */ IC_EVEX_L2_OPSIZE_K, /* 3472 */ IC_EVEX_L2_OPSIZE_K, /* 3473 */ IC_EVEX_L2_OPSIZE_K, /* 3474 */ IC_EVEX_L2_OPSIZE_K, /* 3475 */ IC_EVEX_L2_OPSIZE_K, /* 3476 */ IC_EVEX_L2_OPSIZE_K, /* 3477 */ IC_EVEX_L2_OPSIZE_K, /* 3478 */ IC_EVEX_L2_OPSIZE_K, /* 3479 */ IC_EVEX_L2_W_OPSIZE_K, /* 3480 */ IC_EVEX_L2_W_OPSIZE_K, /* 3481 */ IC_EVEX_L2_W_OPSIZE_K, /* 3482 */ IC_EVEX_L2_W_OPSIZE_K, /* 3483 */ IC_EVEX_L2_W_OPSIZE_K, /* 3484 */ IC_EVEX_L2_W_OPSIZE_K, /* 3485 */ IC_EVEX_L2_W_OPSIZE_K, /* 3486 */ IC_EVEX_L2_W_OPSIZE_K, /* 3487 */ IC_EVEX_L2_K, /* 3488 */ IC_EVEX_L2_K, /* 3489 */ IC_EVEX_L2_XS_K, /* 3490 */ IC_EVEX_L2_XS_K, /* 3491 */ IC_EVEX_L2_XD_K, /* 3492 */ IC_EVEX_L2_XD_K, /* 3493 */ IC_EVEX_L2_XD_K, /* 3494 */ IC_EVEX_L2_XD_K, /* 3495 */ IC_EVEX_L2_W_K, /* 3496 */ IC_EVEX_L2_W_K, /* 3497 */ IC_EVEX_L2_W_XS_K, /* 3498 */ IC_EVEX_L2_W_XS_K, /* 3499 */ IC_EVEX_L2_W_XD_K, /* 3500 */ IC_EVEX_L2_W_XD_K, /* 3501 */ IC_EVEX_L2_W_XD_K, /* 3502 */ IC_EVEX_L2_W_XD_K, /* 3503 */ IC_EVEX_L2_OPSIZE_K, /* 3504 */ IC_EVEX_L2_OPSIZE_K, /* 3505 */ IC_EVEX_L2_OPSIZE_K, /* 3506 */ IC_EVEX_L2_OPSIZE_K, /* 3507 */ IC_EVEX_L2_OPSIZE_K, /* 3508 */ IC_EVEX_L2_OPSIZE_K, /* 3509 */ IC_EVEX_L2_OPSIZE_K, /* 3510 */ IC_EVEX_L2_OPSIZE_K, /* 3511 */ IC_EVEX_L2_W_OPSIZE_K, /* 3512 */ IC_EVEX_L2_W_OPSIZE_K, /* 3513 */ IC_EVEX_L2_W_OPSIZE_K, /* 3514 */ IC_EVEX_L2_W_OPSIZE_K, /* 3515 */ IC_EVEX_L2_W_OPSIZE_K, /* 3516 */ IC_EVEX_L2_W_OPSIZE_K, /* 3517 */ IC_EVEX_L2_W_OPSIZE_K, /* 3518 */ IC_EVEX_L2_W_OPSIZE_K, /* 3519 */ IC_EVEX_L2_K, /* 3520 */ IC_EVEX_L2_K, /* 3521 */ IC_EVEX_L2_XS_K, /* 3522 */ IC_EVEX_L2_XS_K, /* 3523 */ IC_EVEX_L2_XD_K, /* 3524 */ IC_EVEX_L2_XD_K, /* 3525 */ IC_EVEX_L2_XD_K, /* 3526 */ IC_EVEX_L2_XD_K, /* 3527 */ IC_EVEX_L2_W_K, /* 3528 */ IC_EVEX_L2_W_K, /* 3529 */ IC_EVEX_L2_W_XS_K, /* 3530 */ IC_EVEX_L2_W_XS_K, /* 3531 */ IC_EVEX_L2_W_XD_K, /* 3532 */ IC_EVEX_L2_W_XD_K, /* 3533 */ IC_EVEX_L2_W_XD_K, /* 3534 */ IC_EVEX_L2_W_XD_K, /* 3535 */ IC_EVEX_L2_OPSIZE_K, /* 3536 */ IC_EVEX_L2_OPSIZE_K, /* 3537 */ IC_EVEX_L2_OPSIZE_K, /* 3538 */ IC_EVEX_L2_OPSIZE_K, /* 3539 */ IC_EVEX_L2_OPSIZE_K, /* 3540 */ IC_EVEX_L2_OPSIZE_K, /* 3541 */ IC_EVEX_L2_OPSIZE_K, /* 3542 */ IC_EVEX_L2_OPSIZE_K, /* 3543 */ IC_EVEX_L2_W_OPSIZE_K, /* 3544 */ IC_EVEX_L2_W_OPSIZE_K, /* 3545 */ IC_EVEX_L2_W_OPSIZE_K, /* 3546 */ IC_EVEX_L2_W_OPSIZE_K, /* 3547 */ IC_EVEX_L2_W_OPSIZE_K, /* 3548 */ IC_EVEX_L2_W_OPSIZE_K, /* 3549 */ IC_EVEX_L2_W_OPSIZE_K, /* 3550 */ IC_EVEX_L2_W_OPSIZE_K, /* 3551 */ IC_EVEX_L2_K, /* 3552 */ IC_EVEX_L2_K, /* 3553 */ IC_EVEX_L2_XS_K, /* 3554 */ IC_EVEX_L2_XS_K, /* 3555 */ IC_EVEX_L2_XD_K, /* 3556 */ IC_EVEX_L2_XD_K, /* 3557 */ IC_EVEX_L2_XD_K, /* 3558 */ IC_EVEX_L2_XD_K, /* 3559 */ IC_EVEX_L2_W_K, /* 3560 */ IC_EVEX_L2_W_K, /* 3561 */ IC_EVEX_L2_W_XS_K, /* 3562 */ IC_EVEX_L2_W_XS_K, /* 3563 */ IC_EVEX_L2_W_XD_K, /* 3564 */ IC_EVEX_L2_W_XD_K, /* 3565 */ IC_EVEX_L2_W_XD_K, /* 3566 */ IC_EVEX_L2_W_XD_K, /* 3567 */ IC_EVEX_L2_OPSIZE_K, /* 3568 */ IC_EVEX_L2_OPSIZE_K, /* 3569 */ IC_EVEX_L2_OPSIZE_K, /* 3570 */ IC_EVEX_L2_OPSIZE_K, /* 3571 */ IC_EVEX_L2_OPSIZE_K, /* 3572 */ IC_EVEX_L2_OPSIZE_K, /* 3573 */ IC_EVEX_L2_OPSIZE_K, /* 3574 */ IC_EVEX_L2_OPSIZE_K, /* 3575 */ IC_EVEX_L2_W_OPSIZE_K, /* 3576 */ IC_EVEX_L2_W_OPSIZE_K, /* 3577 */ IC_EVEX_L2_W_OPSIZE_K, /* 3578 */ IC_EVEX_L2_W_OPSIZE_K, /* 3579 */ IC_EVEX_L2_W_OPSIZE_K, /* 3580 */ IC_EVEX_L2_W_OPSIZE_K, /* 3581 */ IC_EVEX_L2_W_OPSIZE_K, /* 3582 */ IC_EVEX_L2_W_OPSIZE_K, /* 3583 */ IC, /* 3584 */ IC_64BIT, /* 3585 */ IC_XS, /* 3586 */ IC_64BIT_XS, /* 3587 */ IC_XD, /* 3588 */ IC_64BIT_XD, /* 3589 */ IC_XS, /* 3590 */ IC_64BIT_XS, /* 3591 */ IC, /* 3592 */ IC_64BIT_REXW, /* 3593 */ IC_XS, /* 3594 */ IC_64BIT_REXW_XS, /* 3595 */ IC_XD, /* 3596 */ IC_64BIT_REXW_XD, /* 3597 */ IC_XS, /* 3598 */ IC_64BIT_REXW_XS, /* 3599 */ IC_OPSIZE, /* 3600 */ IC_64BIT_OPSIZE, /* 3601 */ IC_XS_OPSIZE, /* 3602 */ IC_64BIT_XS_OPSIZE, /* 3603 */ IC_XD_OPSIZE, /* 3604 */ IC_64BIT_XD_OPSIZE, /* 3605 */ IC_XS_OPSIZE, /* 3606 */ IC_64BIT_XD_OPSIZE, /* 3607 */ IC_OPSIZE, /* 3608 */ IC_64BIT_REXW_OPSIZE, /* 3609 */ IC_XS_OPSIZE, /* 3610 */ IC_64BIT_REXW_XS, /* 3611 */ IC_XD_OPSIZE, /* 3612 */ IC_64BIT_REXW_XD, /* 3613 */ IC_XS_OPSIZE, /* 3614 */ IC_64BIT_REXW_XS, /* 3615 */ IC_ADSIZE, /* 3616 */ IC_64BIT_ADSIZE, /* 3617 */ IC_XS, /* 3618 */ IC_64BIT_XS, /* 3619 */ IC_XD, /* 3620 */ IC_64BIT_XD, /* 3621 */ IC_XS, /* 3622 */ IC_64BIT_XS, /* 3623 */ IC_ADSIZE, /* 3624 */ IC_64BIT_REXW_ADSIZE, /* 3625 */ IC_XS, /* 3626 */ IC_64BIT_REXW_XS, /* 3627 */ IC_XD, /* 3628 */ IC_64BIT_REXW_XD, /* 3629 */ IC_XS, /* 3630 */ IC_64BIT_REXW_XS, /* 3631 */ IC_OPSIZE_ADSIZE, /* 3632 */ IC_64BIT_OPSIZE_ADSIZE, /* 3633 */ IC_XS_OPSIZE, /* 3634 */ IC_64BIT_XS_OPSIZE, /* 3635 */ IC_XD_OPSIZE, /* 3636 */ IC_64BIT_XD_OPSIZE, /* 3637 */ IC_XS_OPSIZE, /* 3638 */ IC_64BIT_XD_OPSIZE, /* 3639 */ IC_OPSIZE_ADSIZE, /* 3640 */ IC_64BIT_REXW_OPSIZE, /* 3641 */ IC_XS_OPSIZE, /* 3642 */ IC_64BIT_REXW_XS, /* 3643 */ IC_XD_OPSIZE, /* 3644 */ IC_64BIT_REXW_XD, /* 3645 */ IC_XS_OPSIZE, /* 3646 */ IC_64BIT_REXW_XS, /* 3647 */ IC_VEX, /* 3648 */ IC_VEX, /* 3649 */ IC_VEX_XS, /* 3650 */ IC_VEX_XS, /* 3651 */ IC_VEX_XD, /* 3652 */ IC_VEX_XD, /* 3653 */ IC_VEX_XD, /* 3654 */ IC_VEX_XD, /* 3655 */ IC_VEX_W, /* 3656 */ IC_VEX_W, /* 3657 */ IC_VEX_W_XS, /* 3658 */ IC_VEX_W_XS, /* 3659 */ IC_VEX_W_XD, /* 3660 */ IC_VEX_W_XD, /* 3661 */ IC_VEX_W_XD, /* 3662 */ IC_VEX_W_XD, /* 3663 */ IC_VEX_OPSIZE, /* 3664 */ IC_VEX_OPSIZE, /* 3665 */ IC_VEX_OPSIZE, /* 3666 */ IC_VEX_OPSIZE, /* 3667 */ IC_VEX_OPSIZE, /* 3668 */ IC_VEX_OPSIZE, /* 3669 */ IC_VEX_OPSIZE, /* 3670 */ IC_VEX_OPSIZE, /* 3671 */ IC_VEX_W_OPSIZE, /* 3672 */ IC_VEX_W_OPSIZE, /* 3673 */ IC_VEX_W_OPSIZE, /* 3674 */ IC_VEX_W_OPSIZE, /* 3675 */ IC_VEX_W_OPSIZE, /* 3676 */ IC_VEX_W_OPSIZE, /* 3677 */ IC_VEX_W_OPSIZE, /* 3678 */ IC_VEX_W_OPSIZE, /* 3679 */ IC_VEX, /* 3680 */ IC_VEX, /* 3681 */ IC_VEX_XS, /* 3682 */ IC_VEX_XS, /* 3683 */ IC_VEX_XD, /* 3684 */ IC_VEX_XD, /* 3685 */ IC_VEX_XD, /* 3686 */ IC_VEX_XD, /* 3687 */ IC_VEX_W, /* 3688 */ IC_VEX_W, /* 3689 */ IC_VEX_W_XS, /* 3690 */ IC_VEX_W_XS, /* 3691 */ IC_VEX_W_XD, /* 3692 */ IC_VEX_W_XD, /* 3693 */ IC_VEX_W_XD, /* 3694 */ IC_VEX_W_XD, /* 3695 */ IC_VEX_OPSIZE, /* 3696 */ IC_VEX_OPSIZE, /* 3697 */ IC_VEX_OPSIZE, /* 3698 */ IC_VEX_OPSIZE, /* 3699 */ IC_VEX_OPSIZE, /* 3700 */ IC_VEX_OPSIZE, /* 3701 */ IC_VEX_OPSIZE, /* 3702 */ IC_VEX_OPSIZE, /* 3703 */ IC_VEX_W_OPSIZE, /* 3704 */ IC_VEX_W_OPSIZE, /* 3705 */ IC_VEX_W_OPSIZE, /* 3706 */ IC_VEX_W_OPSIZE, /* 3707 */ IC_VEX_W_OPSIZE, /* 3708 */ IC_VEX_W_OPSIZE, /* 3709 */ IC_VEX_W_OPSIZE, /* 3710 */ IC_VEX_W_OPSIZE, /* 3711 */ IC_VEX_L, /* 3712 */ IC_VEX_L, /* 3713 */ IC_VEX_L_XS, /* 3714 */ IC_VEX_L_XS, /* 3715 */ IC_VEX_L_XD, /* 3716 */ IC_VEX_L_XD, /* 3717 */ IC_VEX_L_XD, /* 3718 */ IC_VEX_L_XD, /* 3719 */ IC_VEX_L_W, /* 3720 */ IC_VEX_L_W, /* 3721 */ IC_VEX_L_W_XS, /* 3722 */ IC_VEX_L_W_XS, /* 3723 */ IC_VEX_L_W_XD, /* 3724 */ IC_VEX_L_W_XD, /* 3725 */ IC_VEX_L_W_XD, /* 3726 */ IC_VEX_L_W_XD, /* 3727 */ IC_VEX_L_OPSIZE, /* 3728 */ IC_VEX_L_OPSIZE, /* 3729 */ IC_VEX_L_OPSIZE, /* 3730 */ IC_VEX_L_OPSIZE, /* 3731 */ IC_VEX_L_OPSIZE, /* 3732 */ IC_VEX_L_OPSIZE, /* 3733 */ IC_VEX_L_OPSIZE, /* 3734 */ IC_VEX_L_OPSIZE, /* 3735 */ IC_VEX_L_W_OPSIZE, /* 3736 */ IC_VEX_L_W_OPSIZE, /* 3737 */ IC_VEX_L_W_OPSIZE, /* 3738 */ IC_VEX_L_W_OPSIZE, /* 3739 */ IC_VEX_L_W_OPSIZE, /* 3740 */ IC_VEX_L_W_OPSIZE, /* 3741 */ IC_VEX_L_W_OPSIZE, /* 3742 */ IC_VEX_L_W_OPSIZE, /* 3743 */ IC_VEX_L, /* 3744 */ IC_VEX_L, /* 3745 */ IC_VEX_L_XS, /* 3746 */ IC_VEX_L_XS, /* 3747 */ IC_VEX_L_XD, /* 3748 */ IC_VEX_L_XD, /* 3749 */ IC_VEX_L_XD, /* 3750 */ IC_VEX_L_XD, /* 3751 */ IC_VEX_L_W, /* 3752 */ IC_VEX_L_W, /* 3753 */ IC_VEX_L_W_XS, /* 3754 */ IC_VEX_L_W_XS, /* 3755 */ IC_VEX_L_W_XD, /* 3756 */ IC_VEX_L_W_XD, /* 3757 */ IC_VEX_L_W_XD, /* 3758 */ IC_VEX_L_W_XD, /* 3759 */ IC_VEX_L_OPSIZE, /* 3760 */ IC_VEX_L_OPSIZE, /* 3761 */ IC_VEX_L_OPSIZE, /* 3762 */ IC_VEX_L_OPSIZE, /* 3763 */ IC_VEX_L_OPSIZE, /* 3764 */ IC_VEX_L_OPSIZE, /* 3765 */ IC_VEX_L_OPSIZE, /* 3766 */ IC_VEX_L_OPSIZE, /* 3767 */ IC_VEX_L_W_OPSIZE, /* 3768 */ IC_VEX_L_W_OPSIZE, /* 3769 */ IC_VEX_L_W_OPSIZE, /* 3770 */ IC_VEX_L_W_OPSIZE, /* 3771 */ IC_VEX_L_W_OPSIZE, /* 3772 */ IC_VEX_L_W_OPSIZE, /* 3773 */ IC_VEX_L_W_OPSIZE, /* 3774 */ IC_VEX_L_W_OPSIZE, /* 3775 */ IC_VEX_L, /* 3776 */ IC_VEX_L, /* 3777 */ IC_VEX_L_XS, /* 3778 */ IC_VEX_L_XS, /* 3779 */ IC_VEX_L_XD, /* 3780 */ IC_VEX_L_XD, /* 3781 */ IC_VEX_L_XD, /* 3782 */ IC_VEX_L_XD, /* 3783 */ IC_VEX_L_W, /* 3784 */ IC_VEX_L_W, /* 3785 */ IC_VEX_L_W_XS, /* 3786 */ IC_VEX_L_W_XS, /* 3787 */ IC_VEX_L_W_XD, /* 3788 */ IC_VEX_L_W_XD, /* 3789 */ IC_VEX_L_W_XD, /* 3790 */ IC_VEX_L_W_XD, /* 3791 */ IC_VEX_L_OPSIZE, /* 3792 */ IC_VEX_L_OPSIZE, /* 3793 */ IC_VEX_L_OPSIZE, /* 3794 */ IC_VEX_L_OPSIZE, /* 3795 */ IC_VEX_L_OPSIZE, /* 3796 */ IC_VEX_L_OPSIZE, /* 3797 */ IC_VEX_L_OPSIZE, /* 3798 */ IC_VEX_L_OPSIZE, /* 3799 */ IC_VEX_L_W_OPSIZE, /* 3800 */ IC_VEX_L_W_OPSIZE, /* 3801 */ IC_VEX_L_W_OPSIZE, /* 3802 */ IC_VEX_L_W_OPSIZE, /* 3803 */ IC_VEX_L_W_OPSIZE, /* 3804 */ IC_VEX_L_W_OPSIZE, /* 3805 */ IC_VEX_L_W_OPSIZE, /* 3806 */ IC_VEX_L_W_OPSIZE, /* 3807 */ IC_VEX_L, /* 3808 */ IC_VEX_L, /* 3809 */ IC_VEX_L_XS, /* 3810 */ IC_VEX_L_XS, /* 3811 */ IC_VEX_L_XD, /* 3812 */ IC_VEX_L_XD, /* 3813 */ IC_VEX_L_XD, /* 3814 */ IC_VEX_L_XD, /* 3815 */ IC_VEX_L_W, /* 3816 */ IC_VEX_L_W, /* 3817 */ IC_VEX_L_W_XS, /* 3818 */ IC_VEX_L_W_XS, /* 3819 */ IC_VEX_L_W_XD, /* 3820 */ IC_VEX_L_W_XD, /* 3821 */ IC_VEX_L_W_XD, /* 3822 */ IC_VEX_L_W_XD, /* 3823 */ IC_VEX_L_OPSIZE, /* 3824 */ IC_VEX_L_OPSIZE, /* 3825 */ IC_VEX_L_OPSIZE, /* 3826 */ IC_VEX_L_OPSIZE, /* 3827 */ IC_VEX_L_OPSIZE, /* 3828 */ IC_VEX_L_OPSIZE, /* 3829 */ IC_VEX_L_OPSIZE, /* 3830 */ IC_VEX_L_OPSIZE, /* 3831 */ IC_VEX_L_W_OPSIZE, /* 3832 */ IC_VEX_L_W_OPSIZE, /* 3833 */ IC_VEX_L_W_OPSIZE, /* 3834 */ IC_VEX_L_W_OPSIZE, /* 3835 */ IC_VEX_L_W_OPSIZE, /* 3836 */ IC_VEX_L_W_OPSIZE, /* 3837 */ IC_VEX_L_W_OPSIZE, /* 3838 */ IC_VEX_L_W_OPSIZE, /* 3839 */ IC_EVEX_L2_K, /* 3840 */ IC_EVEX_L2_K, /* 3841 */ IC_EVEX_L2_XS_K, /* 3842 */ IC_EVEX_L2_XS_K, /* 3843 */ IC_EVEX_L2_XD_K, /* 3844 */ IC_EVEX_L2_XD_K, /* 3845 */ IC_EVEX_L2_XD_K, /* 3846 */ IC_EVEX_L2_XD_K, /* 3847 */ IC_EVEX_L2_W_K, /* 3848 */ IC_EVEX_L2_W_K, /* 3849 */ IC_EVEX_L2_W_XS_K, /* 3850 */ IC_EVEX_L2_W_XS_K, /* 3851 */ IC_EVEX_L2_W_XD_K, /* 3852 */ IC_EVEX_L2_W_XD_K, /* 3853 */ IC_EVEX_L2_W_XD_K, /* 3854 */ IC_EVEX_L2_W_XD_K, /* 3855 */ IC_EVEX_L2_OPSIZE_K, /* 3856 */ IC_EVEX_L2_OPSIZE_K, /* 3857 */ IC_EVEX_L2_OPSIZE_K, /* 3858 */ IC_EVEX_L2_OPSIZE_K, /* 3859 */ IC_EVEX_L2_OPSIZE_K, /* 3860 */ IC_EVEX_L2_OPSIZE_K, /* 3861 */ IC_EVEX_L2_OPSIZE_K, /* 3862 */ IC_EVEX_L2_OPSIZE_K, /* 3863 */ IC_EVEX_L2_W_OPSIZE_K, /* 3864 */ IC_EVEX_L2_W_OPSIZE_K, /* 3865 */ IC_EVEX_L2_W_OPSIZE_K, /* 3866 */ IC_EVEX_L2_W_OPSIZE_K, /* 3867 */ IC_EVEX_L2_W_OPSIZE_K, /* 3868 */ IC_EVEX_L2_W_OPSIZE_K, /* 3869 */ IC_EVEX_L2_W_OPSIZE_K, /* 3870 */ IC_EVEX_L2_W_OPSIZE_K, /* 3871 */ IC_EVEX_L2_K, /* 3872 */ IC_EVEX_L2_K, /* 3873 */ IC_EVEX_L2_XS_K, /* 3874 */ IC_EVEX_L2_XS_K, /* 3875 */ IC_EVEX_L2_XD_K, /* 3876 */ IC_EVEX_L2_XD_K, /* 3877 */ IC_EVEX_L2_XD_K, /* 3878 */ IC_EVEX_L2_XD_K, /* 3879 */ IC_EVEX_L2_W_K, /* 3880 */ IC_EVEX_L2_W_K, /* 3881 */ IC_EVEX_L2_W_XS_K, /* 3882 */ IC_EVEX_L2_W_XS_K, /* 3883 */ IC_EVEX_L2_W_XD_K, /* 3884 */ IC_EVEX_L2_W_XD_K, /* 3885 */ IC_EVEX_L2_W_XD_K, /* 3886 */ IC_EVEX_L2_W_XD_K, /* 3887 */ IC_EVEX_L2_OPSIZE_K, /* 3888 */ IC_EVEX_L2_OPSIZE_K, /* 3889 */ IC_EVEX_L2_OPSIZE_K, /* 3890 */ IC_EVEX_L2_OPSIZE_K, /* 3891 */ IC_EVEX_L2_OPSIZE_K, /* 3892 */ IC_EVEX_L2_OPSIZE_K, /* 3893 */ IC_EVEX_L2_OPSIZE_K, /* 3894 */ IC_EVEX_L2_OPSIZE_K, /* 3895 */ IC_EVEX_L2_W_OPSIZE_K, /* 3896 */ IC_EVEX_L2_W_OPSIZE_K, /* 3897 */ IC_EVEX_L2_W_OPSIZE_K, /* 3898 */ IC_EVEX_L2_W_OPSIZE_K, /* 3899 */ IC_EVEX_L2_W_OPSIZE_K, /* 3900 */ IC_EVEX_L2_W_OPSIZE_K, /* 3901 */ IC_EVEX_L2_W_OPSIZE_K, /* 3902 */ IC_EVEX_L2_W_OPSIZE_K, /* 3903 */ IC_EVEX_L2_K, /* 3904 */ IC_EVEX_L2_K, /* 3905 */ IC_EVEX_L2_XS_K, /* 3906 */ IC_EVEX_L2_XS_K, /* 3907 */ IC_EVEX_L2_XD_K, /* 3908 */ IC_EVEX_L2_XD_K, /* 3909 */ IC_EVEX_L2_XD_K, /* 3910 */ IC_EVEX_L2_XD_K, /* 3911 */ IC_EVEX_L2_W_K, /* 3912 */ IC_EVEX_L2_W_K, /* 3913 */ IC_EVEX_L2_W_XS_K, /* 3914 */ IC_EVEX_L2_W_XS_K, /* 3915 */ IC_EVEX_L2_W_XD_K, /* 3916 */ IC_EVEX_L2_W_XD_K, /* 3917 */ IC_EVEX_L2_W_XD_K, /* 3918 */ IC_EVEX_L2_W_XD_K, /* 3919 */ IC_EVEX_L2_OPSIZE_K, /* 3920 */ IC_EVEX_L2_OPSIZE_K, /* 3921 */ IC_EVEX_L2_OPSIZE_K, /* 3922 */ IC_EVEX_L2_OPSIZE_K, /* 3923 */ IC_EVEX_L2_OPSIZE_K, /* 3924 */ IC_EVEX_L2_OPSIZE_K, /* 3925 */ IC_EVEX_L2_OPSIZE_K, /* 3926 */ IC_EVEX_L2_OPSIZE_K, /* 3927 */ IC_EVEX_L2_W_OPSIZE_K, /* 3928 */ IC_EVEX_L2_W_OPSIZE_K, /* 3929 */ IC_EVEX_L2_W_OPSIZE_K, /* 3930 */ IC_EVEX_L2_W_OPSIZE_K, /* 3931 */ IC_EVEX_L2_W_OPSIZE_K, /* 3932 */ IC_EVEX_L2_W_OPSIZE_K, /* 3933 */ IC_EVEX_L2_W_OPSIZE_K, /* 3934 */ IC_EVEX_L2_W_OPSIZE_K, /* 3935 */ IC_EVEX_L2_K, /* 3936 */ IC_EVEX_L2_K, /* 3937 */ IC_EVEX_L2_XS_K, /* 3938 */ IC_EVEX_L2_XS_K, /* 3939 */ IC_EVEX_L2_XD_K, /* 3940 */ IC_EVEX_L2_XD_K, /* 3941 */ IC_EVEX_L2_XD_K, /* 3942 */ IC_EVEX_L2_XD_K, /* 3943 */ IC_EVEX_L2_W_K, /* 3944 */ IC_EVEX_L2_W_K, /* 3945 */ IC_EVEX_L2_W_XS_K, /* 3946 */ IC_EVEX_L2_W_XS_K, /* 3947 */ IC_EVEX_L2_W_XD_K, /* 3948 */ IC_EVEX_L2_W_XD_K, /* 3949 */ IC_EVEX_L2_W_XD_K, /* 3950 */ IC_EVEX_L2_W_XD_K, /* 3951 */ IC_EVEX_L2_OPSIZE_K, /* 3952 */ IC_EVEX_L2_OPSIZE_K, /* 3953 */ IC_EVEX_L2_OPSIZE_K, /* 3954 */ IC_EVEX_L2_OPSIZE_K, /* 3955 */ IC_EVEX_L2_OPSIZE_K, /* 3956 */ IC_EVEX_L2_OPSIZE_K, /* 3957 */ IC_EVEX_L2_OPSIZE_K, /* 3958 */ IC_EVEX_L2_OPSIZE_K, /* 3959 */ IC_EVEX_L2_W_OPSIZE_K, /* 3960 */ IC_EVEX_L2_W_OPSIZE_K, /* 3961 */ IC_EVEX_L2_W_OPSIZE_K, /* 3962 */ IC_EVEX_L2_W_OPSIZE_K, /* 3963 */ IC_EVEX_L2_W_OPSIZE_K, /* 3964 */ IC_EVEX_L2_W_OPSIZE_K, /* 3965 */ IC_EVEX_L2_W_OPSIZE_K, /* 3966 */ IC_EVEX_L2_W_OPSIZE_K, /* 3967 */ IC_EVEX_L2_K, /* 3968 */ IC_EVEX_L2_K, /* 3969 */ IC_EVEX_L2_XS_K, /* 3970 */ IC_EVEX_L2_XS_K, /* 3971 */ IC_EVEX_L2_XD_K, /* 3972 */ IC_EVEX_L2_XD_K, /* 3973 */ IC_EVEX_L2_XD_K, /* 3974 */ IC_EVEX_L2_XD_K, /* 3975 */ IC_EVEX_L2_W_K, /* 3976 */ IC_EVEX_L2_W_K, /* 3977 */ IC_EVEX_L2_W_XS_K, /* 3978 */ IC_EVEX_L2_W_XS_K, /* 3979 */ IC_EVEX_L2_W_XD_K, /* 3980 */ IC_EVEX_L2_W_XD_K, /* 3981 */ IC_EVEX_L2_W_XD_K, /* 3982 */ IC_EVEX_L2_W_XD_K, /* 3983 */ IC_EVEX_L2_OPSIZE_K, /* 3984 */ IC_EVEX_L2_OPSIZE_K, /* 3985 */ IC_EVEX_L2_OPSIZE_K, /* 3986 */ IC_EVEX_L2_OPSIZE_K, /* 3987 */ IC_EVEX_L2_OPSIZE_K, /* 3988 */ IC_EVEX_L2_OPSIZE_K, /* 3989 */ IC_EVEX_L2_OPSIZE_K, /* 3990 */ IC_EVEX_L2_OPSIZE_K, /* 3991 */ IC_EVEX_L2_W_OPSIZE_K, /* 3992 */ IC_EVEX_L2_W_OPSIZE_K, /* 3993 */ IC_EVEX_L2_W_OPSIZE_K, /* 3994 */ IC_EVEX_L2_W_OPSIZE_K, /* 3995 */ IC_EVEX_L2_W_OPSIZE_K, /* 3996 */ IC_EVEX_L2_W_OPSIZE_K, /* 3997 */ IC_EVEX_L2_W_OPSIZE_K, /* 3998 */ IC_EVEX_L2_W_OPSIZE_K, /* 3999 */ IC_EVEX_L2_K, /* 4000 */ IC_EVEX_L2_K, /* 4001 */ IC_EVEX_L2_XS_K, /* 4002 */ IC_EVEX_L2_XS_K, /* 4003 */ IC_EVEX_L2_XD_K, /* 4004 */ IC_EVEX_L2_XD_K, /* 4005 */ IC_EVEX_L2_XD_K, /* 4006 */ IC_EVEX_L2_XD_K, /* 4007 */ IC_EVEX_L2_W_K, /* 4008 */ IC_EVEX_L2_W_K, /* 4009 */ IC_EVEX_L2_W_XS_K, /* 4010 */ IC_EVEX_L2_W_XS_K, /* 4011 */ IC_EVEX_L2_W_XD_K, /* 4012 */ IC_EVEX_L2_W_XD_K, /* 4013 */ IC_EVEX_L2_W_XD_K, /* 4014 */ IC_EVEX_L2_W_XD_K, /* 4015 */ IC_EVEX_L2_OPSIZE_K, /* 4016 */ IC_EVEX_L2_OPSIZE_K, /* 4017 */ IC_EVEX_L2_OPSIZE_K, /* 4018 */ IC_EVEX_L2_OPSIZE_K, /* 4019 */ IC_EVEX_L2_OPSIZE_K, /* 4020 */ IC_EVEX_L2_OPSIZE_K, /* 4021 */ IC_EVEX_L2_OPSIZE_K, /* 4022 */ IC_EVEX_L2_OPSIZE_K, /* 4023 */ IC_EVEX_L2_W_OPSIZE_K, /* 4024 */ IC_EVEX_L2_W_OPSIZE_K, /* 4025 */ IC_EVEX_L2_W_OPSIZE_K, /* 4026 */ IC_EVEX_L2_W_OPSIZE_K, /* 4027 */ IC_EVEX_L2_W_OPSIZE_K, /* 4028 */ IC_EVEX_L2_W_OPSIZE_K, /* 4029 */ IC_EVEX_L2_W_OPSIZE_K, /* 4030 */ IC_EVEX_L2_W_OPSIZE_K, /* 4031 */ IC_EVEX_L2_K, /* 4032 */ IC_EVEX_L2_K, /* 4033 */ IC_EVEX_L2_XS_K, /* 4034 */ IC_EVEX_L2_XS_K, /* 4035 */ IC_EVEX_L2_XD_K, /* 4036 */ IC_EVEX_L2_XD_K, /* 4037 */ IC_EVEX_L2_XD_K, /* 4038 */ IC_EVEX_L2_XD_K, /* 4039 */ IC_EVEX_L2_W_K, /* 4040 */ IC_EVEX_L2_W_K, /* 4041 */ IC_EVEX_L2_W_XS_K, /* 4042 */ IC_EVEX_L2_W_XS_K, /* 4043 */ IC_EVEX_L2_W_XD_K, /* 4044 */ IC_EVEX_L2_W_XD_K, /* 4045 */ IC_EVEX_L2_W_XD_K, /* 4046 */ IC_EVEX_L2_W_XD_K, /* 4047 */ IC_EVEX_L2_OPSIZE_K, /* 4048 */ IC_EVEX_L2_OPSIZE_K, /* 4049 */ IC_EVEX_L2_OPSIZE_K, /* 4050 */ IC_EVEX_L2_OPSIZE_K, /* 4051 */ IC_EVEX_L2_OPSIZE_K, /* 4052 */ IC_EVEX_L2_OPSIZE_K, /* 4053 */ IC_EVEX_L2_OPSIZE_K, /* 4054 */ IC_EVEX_L2_OPSIZE_K, /* 4055 */ IC_EVEX_L2_W_OPSIZE_K, /* 4056 */ IC_EVEX_L2_W_OPSIZE_K, /* 4057 */ IC_EVEX_L2_W_OPSIZE_K, /* 4058 */ IC_EVEX_L2_W_OPSIZE_K, /* 4059 */ IC_EVEX_L2_W_OPSIZE_K, /* 4060 */ IC_EVEX_L2_W_OPSIZE_K, /* 4061 */ IC_EVEX_L2_W_OPSIZE_K, /* 4062 */ IC_EVEX_L2_W_OPSIZE_K, /* 4063 */ IC_EVEX_L2_K, /* 4064 */ IC_EVEX_L2_K, /* 4065 */ IC_EVEX_L2_XS_K, /* 4066 */ IC_EVEX_L2_XS_K, /* 4067 */ IC_EVEX_L2_XD_K, /* 4068 */ IC_EVEX_L2_XD_K, /* 4069 */ IC_EVEX_L2_XD_K, /* 4070 */ IC_EVEX_L2_XD_K, /* 4071 */ IC_EVEX_L2_W_K, /* 4072 */ IC_EVEX_L2_W_K, /* 4073 */ IC_EVEX_L2_W_XS_K, /* 4074 */ IC_EVEX_L2_W_XS_K, /* 4075 */ IC_EVEX_L2_W_XD_K, /* 4076 */ IC_EVEX_L2_W_XD_K, /* 4077 */ IC_EVEX_L2_W_XD_K, /* 4078 */ IC_EVEX_L2_W_XD_K, /* 4079 */ IC_EVEX_L2_OPSIZE_K, /* 4080 */ IC_EVEX_L2_OPSIZE_K, /* 4081 */ IC_EVEX_L2_OPSIZE_K, /* 4082 */ IC_EVEX_L2_OPSIZE_K, /* 4083 */ IC_EVEX_L2_OPSIZE_K, /* 4084 */ IC_EVEX_L2_OPSIZE_K, /* 4085 */ IC_EVEX_L2_OPSIZE_K, /* 4086 */ IC_EVEX_L2_OPSIZE_K, /* 4087 */ IC_EVEX_L2_W_OPSIZE_K, /* 4088 */ IC_EVEX_L2_W_OPSIZE_K, /* 4089 */ IC_EVEX_L2_W_OPSIZE_K, /* 4090 */ IC_EVEX_L2_W_OPSIZE_K, /* 4091 */ IC_EVEX_L2_W_OPSIZE_K, /* 4092 */ IC_EVEX_L2_W_OPSIZE_K, /* 4093 */ IC_EVEX_L2_W_OPSIZE_K, /* 4094 */ IC_EVEX_L2_W_OPSIZE_K, /* 4095 */ IC, /* 4096 */ IC_64BIT, /* 4097 */ IC_XS, /* 4098 */ IC_64BIT_XS, /* 4099 */ IC_XD, /* 4100 */ IC_64BIT_XD, /* 4101 */ IC_XS, /* 4102 */ IC_64BIT_XS, /* 4103 */ IC, /* 4104 */ IC_64BIT_REXW, /* 4105 */ IC_XS, /* 4106 */ IC_64BIT_REXW_XS, /* 4107 */ IC_XD, /* 4108 */ IC_64BIT_REXW_XD, /* 4109 */ IC_XS, /* 4110 */ IC_64BIT_REXW_XS, /* 4111 */ IC_OPSIZE, /* 4112 */ IC_64BIT_OPSIZE, /* 4113 */ IC_XS_OPSIZE, /* 4114 */ IC_64BIT_XS_OPSIZE, /* 4115 */ IC_XD_OPSIZE, /* 4116 */ IC_64BIT_XD_OPSIZE, /* 4117 */ IC_XS_OPSIZE, /* 4118 */ IC_64BIT_XD_OPSIZE, /* 4119 */ IC_OPSIZE, /* 4120 */ IC_64BIT_REXW_OPSIZE, /* 4121 */ IC_XS_OPSIZE, /* 4122 */ IC_64BIT_REXW_XS, /* 4123 */ IC_XD_OPSIZE, /* 4124 */ IC_64BIT_REXW_XD, /* 4125 */ IC_XS_OPSIZE, /* 4126 */ IC_64BIT_REXW_XS, /* 4127 */ IC_ADSIZE, /* 4128 */ IC_64BIT_ADSIZE, /* 4129 */ IC_XS, /* 4130 */ IC_64BIT_XS, /* 4131 */ IC_XD, /* 4132 */ IC_64BIT_XD, /* 4133 */ IC_XS, /* 4134 */ IC_64BIT_XS, /* 4135 */ IC_ADSIZE, /* 4136 */ IC_64BIT_REXW_ADSIZE, /* 4137 */ IC_XS, /* 4138 */ IC_64BIT_REXW_XS, /* 4139 */ IC_XD, /* 4140 */ IC_64BIT_REXW_XD, /* 4141 */ IC_XS, /* 4142 */ IC_64BIT_REXW_XS, /* 4143 */ IC_OPSIZE_ADSIZE, /* 4144 */ IC_64BIT_OPSIZE_ADSIZE, /* 4145 */ IC_XS_OPSIZE, /* 4146 */ IC_64BIT_XS_OPSIZE, /* 4147 */ IC_XD_OPSIZE, /* 4148 */ IC_64BIT_XD_OPSIZE, /* 4149 */ IC_XS_OPSIZE, /* 4150 */ IC_64BIT_XD_OPSIZE, /* 4151 */ IC_OPSIZE_ADSIZE, /* 4152 */ IC_64BIT_REXW_OPSIZE, /* 4153 */ IC_XS_OPSIZE, /* 4154 */ IC_64BIT_REXW_XS, /* 4155 */ IC_XD_OPSIZE, /* 4156 */ IC_64BIT_REXW_XD, /* 4157 */ IC_XS_OPSIZE, /* 4158 */ IC_64BIT_REXW_XS, /* 4159 */ IC_VEX, /* 4160 */ IC_VEX, /* 4161 */ IC_VEX_XS, /* 4162 */ IC_VEX_XS, /* 4163 */ IC_VEX_XD, /* 4164 */ IC_VEX_XD, /* 4165 */ IC_VEX_XD, /* 4166 */ IC_VEX_XD, /* 4167 */ IC_VEX_W, /* 4168 */ IC_VEX_W, /* 4169 */ IC_VEX_W_XS, /* 4170 */ IC_VEX_W_XS, /* 4171 */ IC_VEX_W_XD, /* 4172 */ IC_VEX_W_XD, /* 4173 */ IC_VEX_W_XD, /* 4174 */ IC_VEX_W_XD, /* 4175 */ IC_VEX_OPSIZE, /* 4176 */ IC_VEX_OPSIZE, /* 4177 */ IC_VEX_OPSIZE, /* 4178 */ IC_VEX_OPSIZE, /* 4179 */ IC_VEX_OPSIZE, /* 4180 */ IC_VEX_OPSIZE, /* 4181 */ IC_VEX_OPSIZE, /* 4182 */ IC_VEX_OPSIZE, /* 4183 */ IC_VEX_W_OPSIZE, /* 4184 */ IC_VEX_W_OPSIZE, /* 4185 */ IC_VEX_W_OPSIZE, /* 4186 */ IC_VEX_W_OPSIZE, /* 4187 */ IC_VEX_W_OPSIZE, /* 4188 */ IC_VEX_W_OPSIZE, /* 4189 */ IC_VEX_W_OPSIZE, /* 4190 */ IC_VEX_W_OPSIZE, /* 4191 */ IC_VEX, /* 4192 */ IC_VEX, /* 4193 */ IC_VEX_XS, /* 4194 */ IC_VEX_XS, /* 4195 */ IC_VEX_XD, /* 4196 */ IC_VEX_XD, /* 4197 */ IC_VEX_XD, /* 4198 */ IC_VEX_XD, /* 4199 */ IC_VEX_W, /* 4200 */ IC_VEX_W, /* 4201 */ IC_VEX_W_XS, /* 4202 */ IC_VEX_W_XS, /* 4203 */ IC_VEX_W_XD, /* 4204 */ IC_VEX_W_XD, /* 4205 */ IC_VEX_W_XD, /* 4206 */ IC_VEX_W_XD, /* 4207 */ IC_VEX_OPSIZE, /* 4208 */ IC_VEX_OPSIZE, /* 4209 */ IC_VEX_OPSIZE, /* 4210 */ IC_VEX_OPSIZE, /* 4211 */ IC_VEX_OPSIZE, /* 4212 */ IC_VEX_OPSIZE, /* 4213 */ IC_VEX_OPSIZE, /* 4214 */ IC_VEX_OPSIZE, /* 4215 */ IC_VEX_W_OPSIZE, /* 4216 */ IC_VEX_W_OPSIZE, /* 4217 */ IC_VEX_W_OPSIZE, /* 4218 */ IC_VEX_W_OPSIZE, /* 4219 */ IC_VEX_W_OPSIZE, /* 4220 */ IC_VEX_W_OPSIZE, /* 4221 */ IC_VEX_W_OPSIZE, /* 4222 */ IC_VEX_W_OPSIZE, /* 4223 */ IC_VEX_L, /* 4224 */ IC_VEX_L, /* 4225 */ IC_VEX_L_XS, /* 4226 */ IC_VEX_L_XS, /* 4227 */ IC_VEX_L_XD, /* 4228 */ IC_VEX_L_XD, /* 4229 */ IC_VEX_L_XD, /* 4230 */ IC_VEX_L_XD, /* 4231 */ IC_VEX_L_W, /* 4232 */ IC_VEX_L_W, /* 4233 */ IC_VEX_L_W_XS, /* 4234 */ IC_VEX_L_W_XS, /* 4235 */ IC_VEX_L_W_XD, /* 4236 */ IC_VEX_L_W_XD, /* 4237 */ IC_VEX_L_W_XD, /* 4238 */ IC_VEX_L_W_XD, /* 4239 */ IC_VEX_L_OPSIZE, /* 4240 */ IC_VEX_L_OPSIZE, /* 4241 */ IC_VEX_L_OPSIZE, /* 4242 */ IC_VEX_L_OPSIZE, /* 4243 */ IC_VEX_L_OPSIZE, /* 4244 */ IC_VEX_L_OPSIZE, /* 4245 */ IC_VEX_L_OPSIZE, /* 4246 */ IC_VEX_L_OPSIZE, /* 4247 */ IC_VEX_L_W_OPSIZE, /* 4248 */ IC_VEX_L_W_OPSIZE, /* 4249 */ IC_VEX_L_W_OPSIZE, /* 4250 */ IC_VEX_L_W_OPSIZE, /* 4251 */ IC_VEX_L_W_OPSIZE, /* 4252 */ IC_VEX_L_W_OPSIZE, /* 4253 */ IC_VEX_L_W_OPSIZE, /* 4254 */ IC_VEX_L_W_OPSIZE, /* 4255 */ IC_VEX_L, /* 4256 */ IC_VEX_L, /* 4257 */ IC_VEX_L_XS, /* 4258 */ IC_VEX_L_XS, /* 4259 */ IC_VEX_L_XD, /* 4260 */ IC_VEX_L_XD, /* 4261 */ IC_VEX_L_XD, /* 4262 */ IC_VEX_L_XD, /* 4263 */ IC_VEX_L_W, /* 4264 */ IC_VEX_L_W, /* 4265 */ IC_VEX_L_W_XS, /* 4266 */ IC_VEX_L_W_XS, /* 4267 */ IC_VEX_L_W_XD, /* 4268 */ IC_VEX_L_W_XD, /* 4269 */ IC_VEX_L_W_XD, /* 4270 */ IC_VEX_L_W_XD, /* 4271 */ IC_VEX_L_OPSIZE, /* 4272 */ IC_VEX_L_OPSIZE, /* 4273 */ IC_VEX_L_OPSIZE, /* 4274 */ IC_VEX_L_OPSIZE, /* 4275 */ IC_VEX_L_OPSIZE, /* 4276 */ IC_VEX_L_OPSIZE, /* 4277 */ IC_VEX_L_OPSIZE, /* 4278 */ IC_VEX_L_OPSIZE, /* 4279 */ IC_VEX_L_W_OPSIZE, /* 4280 */ IC_VEX_L_W_OPSIZE, /* 4281 */ IC_VEX_L_W_OPSIZE, /* 4282 */ IC_VEX_L_W_OPSIZE, /* 4283 */ IC_VEX_L_W_OPSIZE, /* 4284 */ IC_VEX_L_W_OPSIZE, /* 4285 */ IC_VEX_L_W_OPSIZE, /* 4286 */ IC_VEX_L_W_OPSIZE, /* 4287 */ IC_VEX_L, /* 4288 */ IC_VEX_L, /* 4289 */ IC_VEX_L_XS, /* 4290 */ IC_VEX_L_XS, /* 4291 */ IC_VEX_L_XD, /* 4292 */ IC_VEX_L_XD, /* 4293 */ IC_VEX_L_XD, /* 4294 */ IC_VEX_L_XD, /* 4295 */ IC_VEX_L_W, /* 4296 */ IC_VEX_L_W, /* 4297 */ IC_VEX_L_W_XS, /* 4298 */ IC_VEX_L_W_XS, /* 4299 */ IC_VEX_L_W_XD, /* 4300 */ IC_VEX_L_W_XD, /* 4301 */ IC_VEX_L_W_XD, /* 4302 */ IC_VEX_L_W_XD, /* 4303 */ IC_VEX_L_OPSIZE, /* 4304 */ IC_VEX_L_OPSIZE, /* 4305 */ IC_VEX_L_OPSIZE, /* 4306 */ IC_VEX_L_OPSIZE, /* 4307 */ IC_VEX_L_OPSIZE, /* 4308 */ IC_VEX_L_OPSIZE, /* 4309 */ IC_VEX_L_OPSIZE, /* 4310 */ IC_VEX_L_OPSIZE, /* 4311 */ IC_VEX_L_W_OPSIZE, /* 4312 */ IC_VEX_L_W_OPSIZE, /* 4313 */ IC_VEX_L_W_OPSIZE, /* 4314 */ IC_VEX_L_W_OPSIZE, /* 4315 */ IC_VEX_L_W_OPSIZE, /* 4316 */ IC_VEX_L_W_OPSIZE, /* 4317 */ IC_VEX_L_W_OPSIZE, /* 4318 */ IC_VEX_L_W_OPSIZE, /* 4319 */ IC_VEX_L, /* 4320 */ IC_VEX_L, /* 4321 */ IC_VEX_L_XS, /* 4322 */ IC_VEX_L_XS, /* 4323 */ IC_VEX_L_XD, /* 4324 */ IC_VEX_L_XD, /* 4325 */ IC_VEX_L_XD, /* 4326 */ IC_VEX_L_XD, /* 4327 */ IC_VEX_L_W, /* 4328 */ IC_VEX_L_W, /* 4329 */ IC_VEX_L_W_XS, /* 4330 */ IC_VEX_L_W_XS, /* 4331 */ IC_VEX_L_W_XD, /* 4332 */ IC_VEX_L_W_XD, /* 4333 */ IC_VEX_L_W_XD, /* 4334 */ IC_VEX_L_W_XD, /* 4335 */ IC_VEX_L_OPSIZE, /* 4336 */ IC_VEX_L_OPSIZE, /* 4337 */ IC_VEX_L_OPSIZE, /* 4338 */ IC_VEX_L_OPSIZE, /* 4339 */ IC_VEX_L_OPSIZE, /* 4340 */ IC_VEX_L_OPSIZE, /* 4341 */ IC_VEX_L_OPSIZE, /* 4342 */ IC_VEX_L_OPSIZE, /* 4343 */ IC_VEX_L_W_OPSIZE, /* 4344 */ IC_VEX_L_W_OPSIZE, /* 4345 */ IC_VEX_L_W_OPSIZE, /* 4346 */ IC_VEX_L_W_OPSIZE, /* 4347 */ IC_VEX_L_W_OPSIZE, /* 4348 */ IC_VEX_L_W_OPSIZE, /* 4349 */ IC_VEX_L_W_OPSIZE, /* 4350 */ IC_VEX_L_W_OPSIZE, /* 4351 */ IC_EVEX_KZ, /* 4352 */ IC_EVEX_KZ, /* 4353 */ IC_EVEX_XS_KZ, /* 4354 */ IC_EVEX_XS_KZ, /* 4355 */ IC_EVEX_XD_KZ, /* 4356 */ IC_EVEX_XD_KZ, /* 4357 */ IC_EVEX_XD_KZ, /* 4358 */ IC_EVEX_XD_KZ, /* 4359 */ IC_EVEX_W_KZ, /* 4360 */ IC_EVEX_W_KZ, /* 4361 */ IC_EVEX_W_XS_KZ, /* 4362 */ IC_EVEX_W_XS_KZ, /* 4363 */ IC_EVEX_W_XD_KZ, /* 4364 */ IC_EVEX_W_XD_KZ, /* 4365 */ IC_EVEX_W_XD_KZ, /* 4366 */ IC_EVEX_W_XD_KZ, /* 4367 */ IC_EVEX_OPSIZE_KZ, /* 4368 */ IC_EVEX_OPSIZE_KZ, /* 4369 */ IC_EVEX_OPSIZE_KZ, /* 4370 */ IC_EVEX_OPSIZE_KZ, /* 4371 */ IC_EVEX_OPSIZE_KZ, /* 4372 */ IC_EVEX_OPSIZE_KZ, /* 4373 */ IC_EVEX_OPSIZE_KZ, /* 4374 */ IC_EVEX_OPSIZE_KZ, /* 4375 */ IC_EVEX_W_OPSIZE_KZ, /* 4376 */ IC_EVEX_W_OPSIZE_KZ, /* 4377 */ IC_EVEX_W_OPSIZE_KZ, /* 4378 */ IC_EVEX_W_OPSIZE_KZ, /* 4379 */ IC_EVEX_W_OPSIZE_KZ, /* 4380 */ IC_EVEX_W_OPSIZE_KZ, /* 4381 */ IC_EVEX_W_OPSIZE_KZ, /* 4382 */ IC_EVEX_W_OPSIZE_KZ, /* 4383 */ IC_EVEX_KZ, /* 4384 */ IC_EVEX_KZ, /* 4385 */ IC_EVEX_XS_KZ, /* 4386 */ IC_EVEX_XS_KZ, /* 4387 */ IC_EVEX_XD_KZ, /* 4388 */ IC_EVEX_XD_KZ, /* 4389 */ IC_EVEX_XD_KZ, /* 4390 */ IC_EVEX_XD_KZ, /* 4391 */ IC_EVEX_W_KZ, /* 4392 */ IC_EVEX_W_KZ, /* 4393 */ IC_EVEX_W_XS_KZ, /* 4394 */ IC_EVEX_W_XS_KZ, /* 4395 */ IC_EVEX_W_XD_KZ, /* 4396 */ IC_EVEX_W_XD_KZ, /* 4397 */ IC_EVEX_W_XD_KZ, /* 4398 */ IC_EVEX_W_XD_KZ, /* 4399 */ IC_EVEX_OPSIZE_KZ, /* 4400 */ IC_EVEX_OPSIZE_KZ, /* 4401 */ IC_EVEX_OPSIZE_KZ, /* 4402 */ IC_EVEX_OPSIZE_KZ, /* 4403 */ IC_EVEX_OPSIZE_KZ, /* 4404 */ IC_EVEX_OPSIZE_KZ, /* 4405 */ IC_EVEX_OPSIZE_KZ, /* 4406 */ IC_EVEX_OPSIZE_KZ, /* 4407 */ IC_EVEX_W_OPSIZE_KZ, /* 4408 */ IC_EVEX_W_OPSIZE_KZ, /* 4409 */ IC_EVEX_W_OPSIZE_KZ, /* 4410 */ IC_EVEX_W_OPSIZE_KZ, /* 4411 */ IC_EVEX_W_OPSIZE_KZ, /* 4412 */ IC_EVEX_W_OPSIZE_KZ, /* 4413 */ IC_EVEX_W_OPSIZE_KZ, /* 4414 */ IC_EVEX_W_OPSIZE_KZ, /* 4415 */ IC_EVEX_KZ, /* 4416 */ IC_EVEX_KZ, /* 4417 */ IC_EVEX_XS_KZ, /* 4418 */ IC_EVEX_XS_KZ, /* 4419 */ IC_EVEX_XD_KZ, /* 4420 */ IC_EVEX_XD_KZ, /* 4421 */ IC_EVEX_XD_KZ, /* 4422 */ IC_EVEX_XD_KZ, /* 4423 */ IC_EVEX_W_KZ, /* 4424 */ IC_EVEX_W_KZ, /* 4425 */ IC_EVEX_W_XS_KZ, /* 4426 */ IC_EVEX_W_XS_KZ, /* 4427 */ IC_EVEX_W_XD_KZ, /* 4428 */ IC_EVEX_W_XD_KZ, /* 4429 */ IC_EVEX_W_XD_KZ, /* 4430 */ IC_EVEX_W_XD_KZ, /* 4431 */ IC_EVEX_OPSIZE_KZ, /* 4432 */ IC_EVEX_OPSIZE_KZ, /* 4433 */ IC_EVEX_OPSIZE_KZ, /* 4434 */ IC_EVEX_OPSIZE_KZ, /* 4435 */ IC_EVEX_OPSIZE_KZ, /* 4436 */ IC_EVEX_OPSIZE_KZ, /* 4437 */ IC_EVEX_OPSIZE_KZ, /* 4438 */ IC_EVEX_OPSIZE_KZ, /* 4439 */ IC_EVEX_W_OPSIZE_KZ, /* 4440 */ IC_EVEX_W_OPSIZE_KZ, /* 4441 */ IC_EVEX_W_OPSIZE_KZ, /* 4442 */ IC_EVEX_W_OPSIZE_KZ, /* 4443 */ IC_EVEX_W_OPSIZE_KZ, /* 4444 */ IC_EVEX_W_OPSIZE_KZ, /* 4445 */ IC_EVEX_W_OPSIZE_KZ, /* 4446 */ IC_EVEX_W_OPSIZE_KZ, /* 4447 */ IC_EVEX_KZ, /* 4448 */ IC_EVEX_KZ, /* 4449 */ IC_EVEX_XS_KZ, /* 4450 */ IC_EVEX_XS_KZ, /* 4451 */ IC_EVEX_XD_KZ, /* 4452 */ IC_EVEX_XD_KZ, /* 4453 */ IC_EVEX_XD_KZ, /* 4454 */ IC_EVEX_XD_KZ, /* 4455 */ IC_EVEX_W_KZ, /* 4456 */ IC_EVEX_W_KZ, /* 4457 */ IC_EVEX_W_XS_KZ, /* 4458 */ IC_EVEX_W_XS_KZ, /* 4459 */ IC_EVEX_W_XD_KZ, /* 4460 */ IC_EVEX_W_XD_KZ, /* 4461 */ IC_EVEX_W_XD_KZ, /* 4462 */ IC_EVEX_W_XD_KZ, /* 4463 */ IC_EVEX_OPSIZE_KZ, /* 4464 */ IC_EVEX_OPSIZE_KZ, /* 4465 */ IC_EVEX_OPSIZE_KZ, /* 4466 */ IC_EVEX_OPSIZE_KZ, /* 4467 */ IC_EVEX_OPSIZE_KZ, /* 4468 */ IC_EVEX_OPSIZE_KZ, /* 4469 */ IC_EVEX_OPSIZE_KZ, /* 4470 */ IC_EVEX_OPSIZE_KZ, /* 4471 */ IC_EVEX_W_OPSIZE_KZ, /* 4472 */ IC_EVEX_W_OPSIZE_KZ, /* 4473 */ IC_EVEX_W_OPSIZE_KZ, /* 4474 */ IC_EVEX_W_OPSIZE_KZ, /* 4475 */ IC_EVEX_W_OPSIZE_KZ, /* 4476 */ IC_EVEX_W_OPSIZE_KZ, /* 4477 */ IC_EVEX_W_OPSIZE_KZ, /* 4478 */ IC_EVEX_W_OPSIZE_KZ, /* 4479 */ IC_EVEX_KZ, /* 4480 */ IC_EVEX_KZ, /* 4481 */ IC_EVEX_XS_KZ, /* 4482 */ IC_EVEX_XS_KZ, /* 4483 */ IC_EVEX_XD_KZ, /* 4484 */ IC_EVEX_XD_KZ, /* 4485 */ IC_EVEX_XD_KZ, /* 4486 */ IC_EVEX_XD_KZ, /* 4487 */ IC_EVEX_W_KZ, /* 4488 */ IC_EVEX_W_KZ, /* 4489 */ IC_EVEX_W_XS_KZ, /* 4490 */ IC_EVEX_W_XS_KZ, /* 4491 */ IC_EVEX_W_XD_KZ, /* 4492 */ IC_EVEX_W_XD_KZ, /* 4493 */ IC_EVEX_W_XD_KZ, /* 4494 */ IC_EVEX_W_XD_KZ, /* 4495 */ IC_EVEX_OPSIZE_KZ, /* 4496 */ IC_EVEX_OPSIZE_KZ, /* 4497 */ IC_EVEX_OPSIZE_KZ, /* 4498 */ IC_EVEX_OPSIZE_KZ, /* 4499 */ IC_EVEX_OPSIZE_KZ, /* 4500 */ IC_EVEX_OPSIZE_KZ, /* 4501 */ IC_EVEX_OPSIZE_KZ, /* 4502 */ IC_EVEX_OPSIZE_KZ, /* 4503 */ IC_EVEX_W_OPSIZE_KZ, /* 4504 */ IC_EVEX_W_OPSIZE_KZ, /* 4505 */ IC_EVEX_W_OPSIZE_KZ, /* 4506 */ IC_EVEX_W_OPSIZE_KZ, /* 4507 */ IC_EVEX_W_OPSIZE_KZ, /* 4508 */ IC_EVEX_W_OPSIZE_KZ, /* 4509 */ IC_EVEX_W_OPSIZE_KZ, /* 4510 */ IC_EVEX_W_OPSIZE_KZ, /* 4511 */ IC_EVEX_KZ, /* 4512 */ IC_EVEX_KZ, /* 4513 */ IC_EVEX_XS_KZ, /* 4514 */ IC_EVEX_XS_KZ, /* 4515 */ IC_EVEX_XD_KZ, /* 4516 */ IC_EVEX_XD_KZ, /* 4517 */ IC_EVEX_XD_KZ, /* 4518 */ IC_EVEX_XD_KZ, /* 4519 */ IC_EVEX_W_KZ, /* 4520 */ IC_EVEX_W_KZ, /* 4521 */ IC_EVEX_W_XS_KZ, /* 4522 */ IC_EVEX_W_XS_KZ, /* 4523 */ IC_EVEX_W_XD_KZ, /* 4524 */ IC_EVEX_W_XD_KZ, /* 4525 */ IC_EVEX_W_XD_KZ, /* 4526 */ IC_EVEX_W_XD_KZ, /* 4527 */ IC_EVEX_OPSIZE_KZ, /* 4528 */ IC_EVEX_OPSIZE_KZ, /* 4529 */ IC_EVEX_OPSIZE_KZ, /* 4530 */ IC_EVEX_OPSIZE_KZ, /* 4531 */ IC_EVEX_OPSIZE_KZ, /* 4532 */ IC_EVEX_OPSIZE_KZ, /* 4533 */ IC_EVEX_OPSIZE_KZ, /* 4534 */ IC_EVEX_OPSIZE_KZ, /* 4535 */ IC_EVEX_W_OPSIZE_KZ, /* 4536 */ IC_EVEX_W_OPSIZE_KZ, /* 4537 */ IC_EVEX_W_OPSIZE_KZ, /* 4538 */ IC_EVEX_W_OPSIZE_KZ, /* 4539 */ IC_EVEX_W_OPSIZE_KZ, /* 4540 */ IC_EVEX_W_OPSIZE_KZ, /* 4541 */ IC_EVEX_W_OPSIZE_KZ, /* 4542 */ IC_EVEX_W_OPSIZE_KZ, /* 4543 */ IC_EVEX_KZ, /* 4544 */ IC_EVEX_KZ, /* 4545 */ IC_EVEX_XS_KZ, /* 4546 */ IC_EVEX_XS_KZ, /* 4547 */ IC_EVEX_XD_KZ, /* 4548 */ IC_EVEX_XD_KZ, /* 4549 */ IC_EVEX_XD_KZ, /* 4550 */ IC_EVEX_XD_KZ, /* 4551 */ IC_EVEX_W_KZ, /* 4552 */ IC_EVEX_W_KZ, /* 4553 */ IC_EVEX_W_XS_KZ, /* 4554 */ IC_EVEX_W_XS_KZ, /* 4555 */ IC_EVEX_W_XD_KZ, /* 4556 */ IC_EVEX_W_XD_KZ, /* 4557 */ IC_EVEX_W_XD_KZ, /* 4558 */ IC_EVEX_W_XD_KZ, /* 4559 */ IC_EVEX_OPSIZE_KZ, /* 4560 */ IC_EVEX_OPSIZE_KZ, /* 4561 */ IC_EVEX_OPSIZE_KZ, /* 4562 */ IC_EVEX_OPSIZE_KZ, /* 4563 */ IC_EVEX_OPSIZE_KZ, /* 4564 */ IC_EVEX_OPSIZE_KZ, /* 4565 */ IC_EVEX_OPSIZE_KZ, /* 4566 */ IC_EVEX_OPSIZE_KZ, /* 4567 */ IC_EVEX_W_OPSIZE_KZ, /* 4568 */ IC_EVEX_W_OPSIZE_KZ, /* 4569 */ IC_EVEX_W_OPSIZE_KZ, /* 4570 */ IC_EVEX_W_OPSIZE_KZ, /* 4571 */ IC_EVEX_W_OPSIZE_KZ, /* 4572 */ IC_EVEX_W_OPSIZE_KZ, /* 4573 */ IC_EVEX_W_OPSIZE_KZ, /* 4574 */ IC_EVEX_W_OPSIZE_KZ, /* 4575 */ IC_EVEX_KZ, /* 4576 */ IC_EVEX_KZ, /* 4577 */ IC_EVEX_XS_KZ, /* 4578 */ IC_EVEX_XS_KZ, /* 4579 */ IC_EVEX_XD_KZ, /* 4580 */ IC_EVEX_XD_KZ, /* 4581 */ IC_EVEX_XD_KZ, /* 4582 */ IC_EVEX_XD_KZ, /* 4583 */ IC_EVEX_W_KZ, /* 4584 */ IC_EVEX_W_KZ, /* 4585 */ IC_EVEX_W_XS_KZ, /* 4586 */ IC_EVEX_W_XS_KZ, /* 4587 */ IC_EVEX_W_XD_KZ, /* 4588 */ IC_EVEX_W_XD_KZ, /* 4589 */ IC_EVEX_W_XD_KZ, /* 4590 */ IC_EVEX_W_XD_KZ, /* 4591 */ IC_EVEX_OPSIZE_KZ, /* 4592 */ IC_EVEX_OPSIZE_KZ, /* 4593 */ IC_EVEX_OPSIZE_KZ, /* 4594 */ IC_EVEX_OPSIZE_KZ, /* 4595 */ IC_EVEX_OPSIZE_KZ, /* 4596 */ IC_EVEX_OPSIZE_KZ, /* 4597 */ IC_EVEX_OPSIZE_KZ, /* 4598 */ IC_EVEX_OPSIZE_KZ, /* 4599 */ IC_EVEX_W_OPSIZE_KZ, /* 4600 */ IC_EVEX_W_OPSIZE_KZ, /* 4601 */ IC_EVEX_W_OPSIZE_KZ, /* 4602 */ IC_EVEX_W_OPSIZE_KZ, /* 4603 */ IC_EVEX_W_OPSIZE_KZ, /* 4604 */ IC_EVEX_W_OPSIZE_KZ, /* 4605 */ IC_EVEX_W_OPSIZE_KZ, /* 4606 */ IC_EVEX_W_OPSIZE_KZ, /* 4607 */ IC, /* 4608 */ IC_64BIT, /* 4609 */ IC_XS, /* 4610 */ IC_64BIT_XS, /* 4611 */ IC_XD, /* 4612 */ IC_64BIT_XD, /* 4613 */ IC_XS, /* 4614 */ IC_64BIT_XS, /* 4615 */ IC, /* 4616 */ IC_64BIT_REXW, /* 4617 */ IC_XS, /* 4618 */ IC_64BIT_REXW_XS, /* 4619 */ IC_XD, /* 4620 */ IC_64BIT_REXW_XD, /* 4621 */ IC_XS, /* 4622 */ IC_64BIT_REXW_XS, /* 4623 */ IC_OPSIZE, /* 4624 */ IC_64BIT_OPSIZE, /* 4625 */ IC_XS_OPSIZE, /* 4626 */ IC_64BIT_XS_OPSIZE, /* 4627 */ IC_XD_OPSIZE, /* 4628 */ IC_64BIT_XD_OPSIZE, /* 4629 */ IC_XS_OPSIZE, /* 4630 */ IC_64BIT_XD_OPSIZE, /* 4631 */ IC_OPSIZE, /* 4632 */ IC_64BIT_REXW_OPSIZE, /* 4633 */ IC_XS_OPSIZE, /* 4634 */ IC_64BIT_REXW_XS, /* 4635 */ IC_XD_OPSIZE, /* 4636 */ IC_64BIT_REXW_XD, /* 4637 */ IC_XS_OPSIZE, /* 4638 */ IC_64BIT_REXW_XS, /* 4639 */ IC_ADSIZE, /* 4640 */ IC_64BIT_ADSIZE, /* 4641 */ IC_XS, /* 4642 */ IC_64BIT_XS, /* 4643 */ IC_XD, /* 4644 */ IC_64BIT_XD, /* 4645 */ IC_XS, /* 4646 */ IC_64BIT_XS, /* 4647 */ IC_ADSIZE, /* 4648 */ IC_64BIT_REXW_ADSIZE, /* 4649 */ IC_XS, /* 4650 */ IC_64BIT_REXW_XS, /* 4651 */ IC_XD, /* 4652 */ IC_64BIT_REXW_XD, /* 4653 */ IC_XS, /* 4654 */ IC_64BIT_REXW_XS, /* 4655 */ IC_OPSIZE_ADSIZE, /* 4656 */ IC_64BIT_OPSIZE_ADSIZE, /* 4657 */ IC_XS_OPSIZE, /* 4658 */ IC_64BIT_XS_OPSIZE, /* 4659 */ IC_XD_OPSIZE, /* 4660 */ IC_64BIT_XD_OPSIZE, /* 4661 */ IC_XS_OPSIZE, /* 4662 */ IC_64BIT_XD_OPSIZE, /* 4663 */ IC_OPSIZE_ADSIZE, /* 4664 */ IC_64BIT_REXW_OPSIZE, /* 4665 */ IC_XS_OPSIZE, /* 4666 */ IC_64BIT_REXW_XS, /* 4667 */ IC_XD_OPSIZE, /* 4668 */ IC_64BIT_REXW_XD, /* 4669 */ IC_XS_OPSIZE, /* 4670 */ IC_64BIT_REXW_XS, /* 4671 */ IC_VEX, /* 4672 */ IC_VEX, /* 4673 */ IC_VEX_XS, /* 4674 */ IC_VEX_XS, /* 4675 */ IC_VEX_XD, /* 4676 */ IC_VEX_XD, /* 4677 */ IC_VEX_XD, /* 4678 */ IC_VEX_XD, /* 4679 */ IC_VEX_W, /* 4680 */ IC_VEX_W, /* 4681 */ IC_VEX_W_XS, /* 4682 */ IC_VEX_W_XS, /* 4683 */ IC_VEX_W_XD, /* 4684 */ IC_VEX_W_XD, /* 4685 */ IC_VEX_W_XD, /* 4686 */ IC_VEX_W_XD, /* 4687 */ IC_VEX_OPSIZE, /* 4688 */ IC_VEX_OPSIZE, /* 4689 */ IC_VEX_OPSIZE, /* 4690 */ IC_VEX_OPSIZE, /* 4691 */ IC_VEX_OPSIZE, /* 4692 */ IC_VEX_OPSIZE, /* 4693 */ IC_VEX_OPSIZE, /* 4694 */ IC_VEX_OPSIZE, /* 4695 */ IC_VEX_W_OPSIZE, /* 4696 */ IC_VEX_W_OPSIZE, /* 4697 */ IC_VEX_W_OPSIZE, /* 4698 */ IC_VEX_W_OPSIZE, /* 4699 */ IC_VEX_W_OPSIZE, /* 4700 */ IC_VEX_W_OPSIZE, /* 4701 */ IC_VEX_W_OPSIZE, /* 4702 */ IC_VEX_W_OPSIZE, /* 4703 */ IC_VEX, /* 4704 */ IC_VEX, /* 4705 */ IC_VEX_XS, /* 4706 */ IC_VEX_XS, /* 4707 */ IC_VEX_XD, /* 4708 */ IC_VEX_XD, /* 4709 */ IC_VEX_XD, /* 4710 */ IC_VEX_XD, /* 4711 */ IC_VEX_W, /* 4712 */ IC_VEX_W, /* 4713 */ IC_VEX_W_XS, /* 4714 */ IC_VEX_W_XS, /* 4715 */ IC_VEX_W_XD, /* 4716 */ IC_VEX_W_XD, /* 4717 */ IC_VEX_W_XD, /* 4718 */ IC_VEX_W_XD, /* 4719 */ IC_VEX_OPSIZE, /* 4720 */ IC_VEX_OPSIZE, /* 4721 */ IC_VEX_OPSIZE, /* 4722 */ IC_VEX_OPSIZE, /* 4723 */ IC_VEX_OPSIZE, /* 4724 */ IC_VEX_OPSIZE, /* 4725 */ IC_VEX_OPSIZE, /* 4726 */ IC_VEX_OPSIZE, /* 4727 */ IC_VEX_W_OPSIZE, /* 4728 */ IC_VEX_W_OPSIZE, /* 4729 */ IC_VEX_W_OPSIZE, /* 4730 */ IC_VEX_W_OPSIZE, /* 4731 */ IC_VEX_W_OPSIZE, /* 4732 */ IC_VEX_W_OPSIZE, /* 4733 */ IC_VEX_W_OPSIZE, /* 4734 */ IC_VEX_W_OPSIZE, /* 4735 */ IC_VEX_L, /* 4736 */ IC_VEX_L, /* 4737 */ IC_VEX_L_XS, /* 4738 */ IC_VEX_L_XS, /* 4739 */ IC_VEX_L_XD, /* 4740 */ IC_VEX_L_XD, /* 4741 */ IC_VEX_L_XD, /* 4742 */ IC_VEX_L_XD, /* 4743 */ IC_VEX_L_W, /* 4744 */ IC_VEX_L_W, /* 4745 */ IC_VEX_L_W_XS, /* 4746 */ IC_VEX_L_W_XS, /* 4747 */ IC_VEX_L_W_XD, /* 4748 */ IC_VEX_L_W_XD, /* 4749 */ IC_VEX_L_W_XD, /* 4750 */ IC_VEX_L_W_XD, /* 4751 */ IC_VEX_L_OPSIZE, /* 4752 */ IC_VEX_L_OPSIZE, /* 4753 */ IC_VEX_L_OPSIZE, /* 4754 */ IC_VEX_L_OPSIZE, /* 4755 */ IC_VEX_L_OPSIZE, /* 4756 */ IC_VEX_L_OPSIZE, /* 4757 */ IC_VEX_L_OPSIZE, /* 4758 */ IC_VEX_L_OPSIZE, /* 4759 */ IC_VEX_L_W_OPSIZE, /* 4760 */ IC_VEX_L_W_OPSIZE, /* 4761 */ IC_VEX_L_W_OPSIZE, /* 4762 */ IC_VEX_L_W_OPSIZE, /* 4763 */ IC_VEX_L_W_OPSIZE, /* 4764 */ IC_VEX_L_W_OPSIZE, /* 4765 */ IC_VEX_L_W_OPSIZE, /* 4766 */ IC_VEX_L_W_OPSIZE, /* 4767 */ IC_VEX_L, /* 4768 */ IC_VEX_L, /* 4769 */ IC_VEX_L_XS, /* 4770 */ IC_VEX_L_XS, /* 4771 */ IC_VEX_L_XD, /* 4772 */ IC_VEX_L_XD, /* 4773 */ IC_VEX_L_XD, /* 4774 */ IC_VEX_L_XD, /* 4775 */ IC_VEX_L_W, /* 4776 */ IC_VEX_L_W, /* 4777 */ IC_VEX_L_W_XS, /* 4778 */ IC_VEX_L_W_XS, /* 4779 */ IC_VEX_L_W_XD, /* 4780 */ IC_VEX_L_W_XD, /* 4781 */ IC_VEX_L_W_XD, /* 4782 */ IC_VEX_L_W_XD, /* 4783 */ IC_VEX_L_OPSIZE, /* 4784 */ IC_VEX_L_OPSIZE, /* 4785 */ IC_VEX_L_OPSIZE, /* 4786 */ IC_VEX_L_OPSIZE, /* 4787 */ IC_VEX_L_OPSIZE, /* 4788 */ IC_VEX_L_OPSIZE, /* 4789 */ IC_VEX_L_OPSIZE, /* 4790 */ IC_VEX_L_OPSIZE, /* 4791 */ IC_VEX_L_W_OPSIZE, /* 4792 */ IC_VEX_L_W_OPSIZE, /* 4793 */ IC_VEX_L_W_OPSIZE, /* 4794 */ IC_VEX_L_W_OPSIZE, /* 4795 */ IC_VEX_L_W_OPSIZE, /* 4796 */ IC_VEX_L_W_OPSIZE, /* 4797 */ IC_VEX_L_W_OPSIZE, /* 4798 */ IC_VEX_L_W_OPSIZE, /* 4799 */ IC_VEX_L, /* 4800 */ IC_VEX_L, /* 4801 */ IC_VEX_L_XS, /* 4802 */ IC_VEX_L_XS, /* 4803 */ IC_VEX_L_XD, /* 4804 */ IC_VEX_L_XD, /* 4805 */ IC_VEX_L_XD, /* 4806 */ IC_VEX_L_XD, /* 4807 */ IC_VEX_L_W, /* 4808 */ IC_VEX_L_W, /* 4809 */ IC_VEX_L_W_XS, /* 4810 */ IC_VEX_L_W_XS, /* 4811 */ IC_VEX_L_W_XD, /* 4812 */ IC_VEX_L_W_XD, /* 4813 */ IC_VEX_L_W_XD, /* 4814 */ IC_VEX_L_W_XD, /* 4815 */ IC_VEX_L_OPSIZE, /* 4816 */ IC_VEX_L_OPSIZE, /* 4817 */ IC_VEX_L_OPSIZE, /* 4818 */ IC_VEX_L_OPSIZE, /* 4819 */ IC_VEX_L_OPSIZE, /* 4820 */ IC_VEX_L_OPSIZE, /* 4821 */ IC_VEX_L_OPSIZE, /* 4822 */ IC_VEX_L_OPSIZE, /* 4823 */ IC_VEX_L_W_OPSIZE, /* 4824 */ IC_VEX_L_W_OPSIZE, /* 4825 */ IC_VEX_L_W_OPSIZE, /* 4826 */ IC_VEX_L_W_OPSIZE, /* 4827 */ IC_VEX_L_W_OPSIZE, /* 4828 */ IC_VEX_L_W_OPSIZE, /* 4829 */ IC_VEX_L_W_OPSIZE, /* 4830 */ IC_VEX_L_W_OPSIZE, /* 4831 */ IC_VEX_L, /* 4832 */ IC_VEX_L, /* 4833 */ IC_VEX_L_XS, /* 4834 */ IC_VEX_L_XS, /* 4835 */ IC_VEX_L_XD, /* 4836 */ IC_VEX_L_XD, /* 4837 */ IC_VEX_L_XD, /* 4838 */ IC_VEX_L_XD, /* 4839 */ IC_VEX_L_W, /* 4840 */ IC_VEX_L_W, /* 4841 */ IC_VEX_L_W_XS, /* 4842 */ IC_VEX_L_W_XS, /* 4843 */ IC_VEX_L_W_XD, /* 4844 */ IC_VEX_L_W_XD, /* 4845 */ IC_VEX_L_W_XD, /* 4846 */ IC_VEX_L_W_XD, /* 4847 */ IC_VEX_L_OPSIZE, /* 4848 */ IC_VEX_L_OPSIZE, /* 4849 */ IC_VEX_L_OPSIZE, /* 4850 */ IC_VEX_L_OPSIZE, /* 4851 */ IC_VEX_L_OPSIZE, /* 4852 */ IC_VEX_L_OPSIZE, /* 4853 */ IC_VEX_L_OPSIZE, /* 4854 */ IC_VEX_L_OPSIZE, /* 4855 */ IC_VEX_L_W_OPSIZE, /* 4856 */ IC_VEX_L_W_OPSIZE, /* 4857 */ IC_VEX_L_W_OPSIZE, /* 4858 */ IC_VEX_L_W_OPSIZE, /* 4859 */ IC_VEX_L_W_OPSIZE, /* 4860 */ IC_VEX_L_W_OPSIZE, /* 4861 */ IC_VEX_L_W_OPSIZE, /* 4862 */ IC_VEX_L_W_OPSIZE, /* 4863 */ IC_EVEX_L_KZ, /* 4864 */ IC_EVEX_L_KZ, /* 4865 */ IC_EVEX_L_XS_KZ, /* 4866 */ IC_EVEX_L_XS_KZ, /* 4867 */ IC_EVEX_L_XD_KZ, /* 4868 */ IC_EVEX_L_XD_KZ, /* 4869 */ IC_EVEX_L_XD_KZ, /* 4870 */ IC_EVEX_L_XD_KZ, /* 4871 */ IC_EVEX_L_W_KZ, /* 4872 */ IC_EVEX_L_W_KZ, /* 4873 */ IC_EVEX_L_W_XS_KZ, /* 4874 */ IC_EVEX_L_W_XS_KZ, /* 4875 */ IC_EVEX_L_W_XD_KZ, /* 4876 */ IC_EVEX_L_W_XD_KZ, /* 4877 */ IC_EVEX_L_W_XD_KZ, /* 4878 */ IC_EVEX_L_W_XD_KZ, /* 4879 */ IC_EVEX_L_OPSIZE_KZ, /* 4880 */ IC_EVEX_L_OPSIZE_KZ, /* 4881 */ IC_EVEX_L_OPSIZE_KZ, /* 4882 */ IC_EVEX_L_OPSIZE_KZ, /* 4883 */ IC_EVEX_L_OPSIZE_KZ, /* 4884 */ IC_EVEX_L_OPSIZE_KZ, /* 4885 */ IC_EVEX_L_OPSIZE_KZ, /* 4886 */ IC_EVEX_L_OPSIZE_KZ, /* 4887 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4888 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4889 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4890 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4891 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4892 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4893 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4894 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4895 */ IC_EVEX_L_KZ, /* 4896 */ IC_EVEX_L_KZ, /* 4897 */ IC_EVEX_L_XS_KZ, /* 4898 */ IC_EVEX_L_XS_KZ, /* 4899 */ IC_EVEX_L_XD_KZ, /* 4900 */ IC_EVEX_L_XD_KZ, /* 4901 */ IC_EVEX_L_XD_KZ, /* 4902 */ IC_EVEX_L_XD_KZ, /* 4903 */ IC_EVEX_L_W_KZ, /* 4904 */ IC_EVEX_L_W_KZ, /* 4905 */ IC_EVEX_L_W_XS_KZ, /* 4906 */ IC_EVEX_L_W_XS_KZ, /* 4907 */ IC_EVEX_L_W_XD_KZ, /* 4908 */ IC_EVEX_L_W_XD_KZ, /* 4909 */ IC_EVEX_L_W_XD_KZ, /* 4910 */ IC_EVEX_L_W_XD_KZ, /* 4911 */ IC_EVEX_L_OPSIZE_KZ, /* 4912 */ IC_EVEX_L_OPSIZE_KZ, /* 4913 */ IC_EVEX_L_OPSIZE_KZ, /* 4914 */ IC_EVEX_L_OPSIZE_KZ, /* 4915 */ IC_EVEX_L_OPSIZE_KZ, /* 4916 */ IC_EVEX_L_OPSIZE_KZ, /* 4917 */ IC_EVEX_L_OPSIZE_KZ, /* 4918 */ IC_EVEX_L_OPSIZE_KZ, /* 4919 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4920 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4921 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4922 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4923 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4924 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4925 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4926 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4927 */ IC_EVEX_L_KZ, /* 4928 */ IC_EVEX_L_KZ, /* 4929 */ IC_EVEX_L_XS_KZ, /* 4930 */ IC_EVEX_L_XS_KZ, /* 4931 */ IC_EVEX_L_XD_KZ, /* 4932 */ IC_EVEX_L_XD_KZ, /* 4933 */ IC_EVEX_L_XD_KZ, /* 4934 */ IC_EVEX_L_XD_KZ, /* 4935 */ IC_EVEX_L_W_KZ, /* 4936 */ IC_EVEX_L_W_KZ, /* 4937 */ IC_EVEX_L_W_XS_KZ, /* 4938 */ IC_EVEX_L_W_XS_KZ, /* 4939 */ IC_EVEX_L_W_XD_KZ, /* 4940 */ IC_EVEX_L_W_XD_KZ, /* 4941 */ IC_EVEX_L_W_XD_KZ, /* 4942 */ IC_EVEX_L_W_XD_KZ, /* 4943 */ IC_EVEX_L_OPSIZE_KZ, /* 4944 */ IC_EVEX_L_OPSIZE_KZ, /* 4945 */ IC_EVEX_L_OPSIZE_KZ, /* 4946 */ IC_EVEX_L_OPSIZE_KZ, /* 4947 */ IC_EVEX_L_OPSIZE_KZ, /* 4948 */ IC_EVEX_L_OPSIZE_KZ, /* 4949 */ IC_EVEX_L_OPSIZE_KZ, /* 4950 */ IC_EVEX_L_OPSIZE_KZ, /* 4951 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4952 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4953 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4954 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4955 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4956 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4957 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4958 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4959 */ IC_EVEX_L_KZ, /* 4960 */ IC_EVEX_L_KZ, /* 4961 */ IC_EVEX_L_XS_KZ, /* 4962 */ IC_EVEX_L_XS_KZ, /* 4963 */ IC_EVEX_L_XD_KZ, /* 4964 */ IC_EVEX_L_XD_KZ, /* 4965 */ IC_EVEX_L_XD_KZ, /* 4966 */ IC_EVEX_L_XD_KZ, /* 4967 */ IC_EVEX_L_W_KZ, /* 4968 */ IC_EVEX_L_W_KZ, /* 4969 */ IC_EVEX_L_W_XS_KZ, /* 4970 */ IC_EVEX_L_W_XS_KZ, /* 4971 */ IC_EVEX_L_W_XD_KZ, /* 4972 */ IC_EVEX_L_W_XD_KZ, /* 4973 */ IC_EVEX_L_W_XD_KZ, /* 4974 */ IC_EVEX_L_W_XD_KZ, /* 4975 */ IC_EVEX_L_OPSIZE_KZ, /* 4976 */ IC_EVEX_L_OPSIZE_KZ, /* 4977 */ IC_EVEX_L_OPSIZE_KZ, /* 4978 */ IC_EVEX_L_OPSIZE_KZ, /* 4979 */ IC_EVEX_L_OPSIZE_KZ, /* 4980 */ IC_EVEX_L_OPSIZE_KZ, /* 4981 */ IC_EVEX_L_OPSIZE_KZ, /* 4982 */ IC_EVEX_L_OPSIZE_KZ, /* 4983 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4984 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4985 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4986 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4987 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4988 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4989 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4990 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4991 */ IC_EVEX_L_KZ, /* 4992 */ IC_EVEX_L_KZ, /* 4993 */ IC_EVEX_L_XS_KZ, /* 4994 */ IC_EVEX_L_XS_KZ, /* 4995 */ IC_EVEX_L_XD_KZ, /* 4996 */ IC_EVEX_L_XD_KZ, /* 4997 */ IC_EVEX_L_XD_KZ, /* 4998 */ IC_EVEX_L_XD_KZ, /* 4999 */ IC_EVEX_L_W_KZ, /* 5000 */ IC_EVEX_L_W_KZ, /* 5001 */ IC_EVEX_L_W_XS_KZ, /* 5002 */ IC_EVEX_L_W_XS_KZ, /* 5003 */ IC_EVEX_L_W_XD_KZ, /* 5004 */ IC_EVEX_L_W_XD_KZ, /* 5005 */ IC_EVEX_L_W_XD_KZ, /* 5006 */ IC_EVEX_L_W_XD_KZ, /* 5007 */ IC_EVEX_L_OPSIZE_KZ, /* 5008 */ IC_EVEX_L_OPSIZE_KZ, /* 5009 */ IC_EVEX_L_OPSIZE_KZ, /* 5010 */ IC_EVEX_L_OPSIZE_KZ, /* 5011 */ IC_EVEX_L_OPSIZE_KZ, /* 5012 */ IC_EVEX_L_OPSIZE_KZ, /* 5013 */ IC_EVEX_L_OPSIZE_KZ, /* 5014 */ IC_EVEX_L_OPSIZE_KZ, /* 5015 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5016 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5017 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5018 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5019 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5020 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5021 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5022 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5023 */ IC_EVEX_L_KZ, /* 5024 */ IC_EVEX_L_KZ, /* 5025 */ IC_EVEX_L_XS_KZ, /* 5026 */ IC_EVEX_L_XS_KZ, /* 5027 */ IC_EVEX_L_XD_KZ, /* 5028 */ IC_EVEX_L_XD_KZ, /* 5029 */ IC_EVEX_L_XD_KZ, /* 5030 */ IC_EVEX_L_XD_KZ, /* 5031 */ IC_EVEX_L_W_KZ, /* 5032 */ IC_EVEX_L_W_KZ, /* 5033 */ IC_EVEX_L_W_XS_KZ, /* 5034 */ IC_EVEX_L_W_XS_KZ, /* 5035 */ IC_EVEX_L_W_XD_KZ, /* 5036 */ IC_EVEX_L_W_XD_KZ, /* 5037 */ IC_EVEX_L_W_XD_KZ, /* 5038 */ IC_EVEX_L_W_XD_KZ, /* 5039 */ IC_EVEX_L_OPSIZE_KZ, /* 5040 */ IC_EVEX_L_OPSIZE_KZ, /* 5041 */ IC_EVEX_L_OPSIZE_KZ, /* 5042 */ IC_EVEX_L_OPSIZE_KZ, /* 5043 */ IC_EVEX_L_OPSIZE_KZ, /* 5044 */ IC_EVEX_L_OPSIZE_KZ, /* 5045 */ IC_EVEX_L_OPSIZE_KZ, /* 5046 */ IC_EVEX_L_OPSIZE_KZ, /* 5047 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5048 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5049 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5050 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5051 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5052 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5053 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5054 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5055 */ IC_EVEX_L_KZ, /* 5056 */ IC_EVEX_L_KZ, /* 5057 */ IC_EVEX_L_XS_KZ, /* 5058 */ IC_EVEX_L_XS_KZ, /* 5059 */ IC_EVEX_L_XD_KZ, /* 5060 */ IC_EVEX_L_XD_KZ, /* 5061 */ IC_EVEX_L_XD_KZ, /* 5062 */ IC_EVEX_L_XD_KZ, /* 5063 */ IC_EVEX_L_W_KZ, /* 5064 */ IC_EVEX_L_W_KZ, /* 5065 */ IC_EVEX_L_W_XS_KZ, /* 5066 */ IC_EVEX_L_W_XS_KZ, /* 5067 */ IC_EVEX_L_W_XD_KZ, /* 5068 */ IC_EVEX_L_W_XD_KZ, /* 5069 */ IC_EVEX_L_W_XD_KZ, /* 5070 */ IC_EVEX_L_W_XD_KZ, /* 5071 */ IC_EVEX_L_OPSIZE_KZ, /* 5072 */ IC_EVEX_L_OPSIZE_KZ, /* 5073 */ IC_EVEX_L_OPSIZE_KZ, /* 5074 */ IC_EVEX_L_OPSIZE_KZ, /* 5075 */ IC_EVEX_L_OPSIZE_KZ, /* 5076 */ IC_EVEX_L_OPSIZE_KZ, /* 5077 */ IC_EVEX_L_OPSIZE_KZ, /* 5078 */ IC_EVEX_L_OPSIZE_KZ, /* 5079 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5080 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5081 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5082 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5083 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5084 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5085 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5086 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5087 */ IC_EVEX_L_KZ, /* 5088 */ IC_EVEX_L_KZ, /* 5089 */ IC_EVEX_L_XS_KZ, /* 5090 */ IC_EVEX_L_XS_KZ, /* 5091 */ IC_EVEX_L_XD_KZ, /* 5092 */ IC_EVEX_L_XD_KZ, /* 5093 */ IC_EVEX_L_XD_KZ, /* 5094 */ IC_EVEX_L_XD_KZ, /* 5095 */ IC_EVEX_L_W_KZ, /* 5096 */ IC_EVEX_L_W_KZ, /* 5097 */ IC_EVEX_L_W_XS_KZ, /* 5098 */ IC_EVEX_L_W_XS_KZ, /* 5099 */ IC_EVEX_L_W_XD_KZ, /* 5100 */ IC_EVEX_L_W_XD_KZ, /* 5101 */ IC_EVEX_L_W_XD_KZ, /* 5102 */ IC_EVEX_L_W_XD_KZ, /* 5103 */ IC_EVEX_L_OPSIZE_KZ, /* 5104 */ IC_EVEX_L_OPSIZE_KZ, /* 5105 */ IC_EVEX_L_OPSIZE_KZ, /* 5106 */ IC_EVEX_L_OPSIZE_KZ, /* 5107 */ IC_EVEX_L_OPSIZE_KZ, /* 5108 */ IC_EVEX_L_OPSIZE_KZ, /* 5109 */ IC_EVEX_L_OPSIZE_KZ, /* 5110 */ IC_EVEX_L_OPSIZE_KZ, /* 5111 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5112 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5113 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5114 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5115 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5116 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5117 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5118 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5119 */ IC, /* 5120 */ IC_64BIT, /* 5121 */ IC_XS, /* 5122 */ IC_64BIT_XS, /* 5123 */ IC_XD, /* 5124 */ IC_64BIT_XD, /* 5125 */ IC_XS, /* 5126 */ IC_64BIT_XS, /* 5127 */ IC, /* 5128 */ IC_64BIT_REXW, /* 5129 */ IC_XS, /* 5130 */ IC_64BIT_REXW_XS, /* 5131 */ IC_XD, /* 5132 */ IC_64BIT_REXW_XD, /* 5133 */ IC_XS, /* 5134 */ IC_64BIT_REXW_XS, /* 5135 */ IC_OPSIZE, /* 5136 */ IC_64BIT_OPSIZE, /* 5137 */ IC_XS_OPSIZE, /* 5138 */ IC_64BIT_XS_OPSIZE, /* 5139 */ IC_XD_OPSIZE, /* 5140 */ IC_64BIT_XD_OPSIZE, /* 5141 */ IC_XS_OPSIZE, /* 5142 */ IC_64BIT_XD_OPSIZE, /* 5143 */ IC_OPSIZE, /* 5144 */ IC_64BIT_REXW_OPSIZE, /* 5145 */ IC_XS_OPSIZE, /* 5146 */ IC_64BIT_REXW_XS, /* 5147 */ IC_XD_OPSIZE, /* 5148 */ IC_64BIT_REXW_XD, /* 5149 */ IC_XS_OPSIZE, /* 5150 */ IC_64BIT_REXW_XS, /* 5151 */ IC_ADSIZE, /* 5152 */ IC_64BIT_ADSIZE, /* 5153 */ IC_XS, /* 5154 */ IC_64BIT_XS, /* 5155 */ IC_XD, /* 5156 */ IC_64BIT_XD, /* 5157 */ IC_XS, /* 5158 */ IC_64BIT_XS, /* 5159 */ IC_ADSIZE, /* 5160 */ IC_64BIT_REXW_ADSIZE, /* 5161 */ IC_XS, /* 5162 */ IC_64BIT_REXW_XS, /* 5163 */ IC_XD, /* 5164 */ IC_64BIT_REXW_XD, /* 5165 */ IC_XS, /* 5166 */ IC_64BIT_REXW_XS, /* 5167 */ IC_OPSIZE_ADSIZE, /* 5168 */ IC_64BIT_OPSIZE_ADSIZE, /* 5169 */ IC_XS_OPSIZE, /* 5170 */ IC_64BIT_XS_OPSIZE, /* 5171 */ IC_XD_OPSIZE, /* 5172 */ IC_64BIT_XD_OPSIZE, /* 5173 */ IC_XS_OPSIZE, /* 5174 */ IC_64BIT_XD_OPSIZE, /* 5175 */ IC_OPSIZE_ADSIZE, /* 5176 */ IC_64BIT_REXW_OPSIZE, /* 5177 */ IC_XS_OPSIZE, /* 5178 */ IC_64BIT_REXW_XS, /* 5179 */ IC_XD_OPSIZE, /* 5180 */ IC_64BIT_REXW_XD, /* 5181 */ IC_XS_OPSIZE, /* 5182 */ IC_64BIT_REXW_XS, /* 5183 */ IC_VEX, /* 5184 */ IC_VEX, /* 5185 */ IC_VEX_XS, /* 5186 */ IC_VEX_XS, /* 5187 */ IC_VEX_XD, /* 5188 */ IC_VEX_XD, /* 5189 */ IC_VEX_XD, /* 5190 */ IC_VEX_XD, /* 5191 */ IC_VEX_W, /* 5192 */ IC_VEX_W, /* 5193 */ IC_VEX_W_XS, /* 5194 */ IC_VEX_W_XS, /* 5195 */ IC_VEX_W_XD, /* 5196 */ IC_VEX_W_XD, /* 5197 */ IC_VEX_W_XD, /* 5198 */ IC_VEX_W_XD, /* 5199 */ IC_VEX_OPSIZE, /* 5200 */ IC_VEX_OPSIZE, /* 5201 */ IC_VEX_OPSIZE, /* 5202 */ IC_VEX_OPSIZE, /* 5203 */ IC_VEX_OPSIZE, /* 5204 */ IC_VEX_OPSIZE, /* 5205 */ IC_VEX_OPSIZE, /* 5206 */ IC_VEX_OPSIZE, /* 5207 */ IC_VEX_W_OPSIZE, /* 5208 */ IC_VEX_W_OPSIZE, /* 5209 */ IC_VEX_W_OPSIZE, /* 5210 */ IC_VEX_W_OPSIZE, /* 5211 */ IC_VEX_W_OPSIZE, /* 5212 */ IC_VEX_W_OPSIZE, /* 5213 */ IC_VEX_W_OPSIZE, /* 5214 */ IC_VEX_W_OPSIZE, /* 5215 */ IC_VEX, /* 5216 */ IC_VEX, /* 5217 */ IC_VEX_XS, /* 5218 */ IC_VEX_XS, /* 5219 */ IC_VEX_XD, /* 5220 */ IC_VEX_XD, /* 5221 */ IC_VEX_XD, /* 5222 */ IC_VEX_XD, /* 5223 */ IC_VEX_W, /* 5224 */ IC_VEX_W, /* 5225 */ IC_VEX_W_XS, /* 5226 */ IC_VEX_W_XS, /* 5227 */ IC_VEX_W_XD, /* 5228 */ IC_VEX_W_XD, /* 5229 */ IC_VEX_W_XD, /* 5230 */ IC_VEX_W_XD, /* 5231 */ IC_VEX_OPSIZE, /* 5232 */ IC_VEX_OPSIZE, /* 5233 */ IC_VEX_OPSIZE, /* 5234 */ IC_VEX_OPSIZE, /* 5235 */ IC_VEX_OPSIZE, /* 5236 */ IC_VEX_OPSIZE, /* 5237 */ IC_VEX_OPSIZE, /* 5238 */ IC_VEX_OPSIZE, /* 5239 */ IC_VEX_W_OPSIZE, /* 5240 */ IC_VEX_W_OPSIZE, /* 5241 */ IC_VEX_W_OPSIZE, /* 5242 */ IC_VEX_W_OPSIZE, /* 5243 */ IC_VEX_W_OPSIZE, /* 5244 */ IC_VEX_W_OPSIZE, /* 5245 */ IC_VEX_W_OPSIZE, /* 5246 */ IC_VEX_W_OPSIZE, /* 5247 */ IC_VEX_L, /* 5248 */ IC_VEX_L, /* 5249 */ IC_VEX_L_XS, /* 5250 */ IC_VEX_L_XS, /* 5251 */ IC_VEX_L_XD, /* 5252 */ IC_VEX_L_XD, /* 5253 */ IC_VEX_L_XD, /* 5254 */ IC_VEX_L_XD, /* 5255 */ IC_VEX_L_W, /* 5256 */ IC_VEX_L_W, /* 5257 */ IC_VEX_L_W_XS, /* 5258 */ IC_VEX_L_W_XS, /* 5259 */ IC_VEX_L_W_XD, /* 5260 */ IC_VEX_L_W_XD, /* 5261 */ IC_VEX_L_W_XD, /* 5262 */ IC_VEX_L_W_XD, /* 5263 */ IC_VEX_L_OPSIZE, /* 5264 */ IC_VEX_L_OPSIZE, /* 5265 */ IC_VEX_L_OPSIZE, /* 5266 */ IC_VEX_L_OPSIZE, /* 5267 */ IC_VEX_L_OPSIZE, /* 5268 */ IC_VEX_L_OPSIZE, /* 5269 */ IC_VEX_L_OPSIZE, /* 5270 */ IC_VEX_L_OPSIZE, /* 5271 */ IC_VEX_L_W_OPSIZE, /* 5272 */ IC_VEX_L_W_OPSIZE, /* 5273 */ IC_VEX_L_W_OPSIZE, /* 5274 */ IC_VEX_L_W_OPSIZE, /* 5275 */ IC_VEX_L_W_OPSIZE, /* 5276 */ IC_VEX_L_W_OPSIZE, /* 5277 */ IC_VEX_L_W_OPSIZE, /* 5278 */ IC_VEX_L_W_OPSIZE, /* 5279 */ IC_VEX_L, /* 5280 */ IC_VEX_L, /* 5281 */ IC_VEX_L_XS, /* 5282 */ IC_VEX_L_XS, /* 5283 */ IC_VEX_L_XD, /* 5284 */ IC_VEX_L_XD, /* 5285 */ IC_VEX_L_XD, /* 5286 */ IC_VEX_L_XD, /* 5287 */ IC_VEX_L_W, /* 5288 */ IC_VEX_L_W, /* 5289 */ IC_VEX_L_W_XS, /* 5290 */ IC_VEX_L_W_XS, /* 5291 */ IC_VEX_L_W_XD, /* 5292 */ IC_VEX_L_W_XD, /* 5293 */ IC_VEX_L_W_XD, /* 5294 */ IC_VEX_L_W_XD, /* 5295 */ IC_VEX_L_OPSIZE, /* 5296 */ IC_VEX_L_OPSIZE, /* 5297 */ IC_VEX_L_OPSIZE, /* 5298 */ IC_VEX_L_OPSIZE, /* 5299 */ IC_VEX_L_OPSIZE, /* 5300 */ IC_VEX_L_OPSIZE, /* 5301 */ IC_VEX_L_OPSIZE, /* 5302 */ IC_VEX_L_OPSIZE, /* 5303 */ IC_VEX_L_W_OPSIZE, /* 5304 */ IC_VEX_L_W_OPSIZE, /* 5305 */ IC_VEX_L_W_OPSIZE, /* 5306 */ IC_VEX_L_W_OPSIZE, /* 5307 */ IC_VEX_L_W_OPSIZE, /* 5308 */ IC_VEX_L_W_OPSIZE, /* 5309 */ IC_VEX_L_W_OPSIZE, /* 5310 */ IC_VEX_L_W_OPSIZE, /* 5311 */ IC_VEX_L, /* 5312 */ IC_VEX_L, /* 5313 */ IC_VEX_L_XS, /* 5314 */ IC_VEX_L_XS, /* 5315 */ IC_VEX_L_XD, /* 5316 */ IC_VEX_L_XD, /* 5317 */ IC_VEX_L_XD, /* 5318 */ IC_VEX_L_XD, /* 5319 */ IC_VEX_L_W, /* 5320 */ IC_VEX_L_W, /* 5321 */ IC_VEX_L_W_XS, /* 5322 */ IC_VEX_L_W_XS, /* 5323 */ IC_VEX_L_W_XD, /* 5324 */ IC_VEX_L_W_XD, /* 5325 */ IC_VEX_L_W_XD, /* 5326 */ IC_VEX_L_W_XD, /* 5327 */ IC_VEX_L_OPSIZE, /* 5328 */ IC_VEX_L_OPSIZE, /* 5329 */ IC_VEX_L_OPSIZE, /* 5330 */ IC_VEX_L_OPSIZE, /* 5331 */ IC_VEX_L_OPSIZE, /* 5332 */ IC_VEX_L_OPSIZE, /* 5333 */ IC_VEX_L_OPSIZE, /* 5334 */ IC_VEX_L_OPSIZE, /* 5335 */ IC_VEX_L_W_OPSIZE, /* 5336 */ IC_VEX_L_W_OPSIZE, /* 5337 */ IC_VEX_L_W_OPSIZE, /* 5338 */ IC_VEX_L_W_OPSIZE, /* 5339 */ IC_VEX_L_W_OPSIZE, /* 5340 */ IC_VEX_L_W_OPSIZE, /* 5341 */ IC_VEX_L_W_OPSIZE, /* 5342 */ IC_VEX_L_W_OPSIZE, /* 5343 */ IC_VEX_L, /* 5344 */ IC_VEX_L, /* 5345 */ IC_VEX_L_XS, /* 5346 */ IC_VEX_L_XS, /* 5347 */ IC_VEX_L_XD, /* 5348 */ IC_VEX_L_XD, /* 5349 */ IC_VEX_L_XD, /* 5350 */ IC_VEX_L_XD, /* 5351 */ IC_VEX_L_W, /* 5352 */ IC_VEX_L_W, /* 5353 */ IC_VEX_L_W_XS, /* 5354 */ IC_VEX_L_W_XS, /* 5355 */ IC_VEX_L_W_XD, /* 5356 */ IC_VEX_L_W_XD, /* 5357 */ IC_VEX_L_W_XD, /* 5358 */ IC_VEX_L_W_XD, /* 5359 */ IC_VEX_L_OPSIZE, /* 5360 */ IC_VEX_L_OPSIZE, /* 5361 */ IC_VEX_L_OPSIZE, /* 5362 */ IC_VEX_L_OPSIZE, /* 5363 */ IC_VEX_L_OPSIZE, /* 5364 */ IC_VEX_L_OPSIZE, /* 5365 */ IC_VEX_L_OPSIZE, /* 5366 */ IC_VEX_L_OPSIZE, /* 5367 */ IC_VEX_L_W_OPSIZE, /* 5368 */ IC_VEX_L_W_OPSIZE, /* 5369 */ IC_VEX_L_W_OPSIZE, /* 5370 */ IC_VEX_L_W_OPSIZE, /* 5371 */ IC_VEX_L_W_OPSIZE, /* 5372 */ IC_VEX_L_W_OPSIZE, /* 5373 */ IC_VEX_L_W_OPSIZE, /* 5374 */ IC_VEX_L_W_OPSIZE, /* 5375 */ IC_EVEX_L2_KZ, /* 5376 */ IC_EVEX_L2_KZ, /* 5377 */ IC_EVEX_L2_XS_KZ, /* 5378 */ IC_EVEX_L2_XS_KZ, /* 5379 */ IC_EVEX_L2_XD_KZ, /* 5380 */ IC_EVEX_L2_XD_KZ, /* 5381 */ IC_EVEX_L2_XD_KZ, /* 5382 */ IC_EVEX_L2_XD_KZ, /* 5383 */ IC_EVEX_L2_W_KZ, /* 5384 */ IC_EVEX_L2_W_KZ, /* 5385 */ IC_EVEX_L2_W_XS_KZ, /* 5386 */ IC_EVEX_L2_W_XS_KZ, /* 5387 */ IC_EVEX_L2_W_XD_KZ, /* 5388 */ IC_EVEX_L2_W_XD_KZ, /* 5389 */ IC_EVEX_L2_W_XD_KZ, /* 5390 */ IC_EVEX_L2_W_XD_KZ, /* 5391 */ IC_EVEX_L2_OPSIZE_KZ, /* 5392 */ IC_EVEX_L2_OPSIZE_KZ, /* 5393 */ IC_EVEX_L2_OPSIZE_KZ, /* 5394 */ IC_EVEX_L2_OPSIZE_KZ, /* 5395 */ IC_EVEX_L2_OPSIZE_KZ, /* 5396 */ IC_EVEX_L2_OPSIZE_KZ, /* 5397 */ IC_EVEX_L2_OPSIZE_KZ, /* 5398 */ IC_EVEX_L2_OPSIZE_KZ, /* 5399 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5400 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5401 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5402 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5403 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5404 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5405 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5406 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5407 */ IC_EVEX_L2_KZ, /* 5408 */ IC_EVEX_L2_KZ, /* 5409 */ IC_EVEX_L2_XS_KZ, /* 5410 */ IC_EVEX_L2_XS_KZ, /* 5411 */ IC_EVEX_L2_XD_KZ, /* 5412 */ IC_EVEX_L2_XD_KZ, /* 5413 */ IC_EVEX_L2_XD_KZ, /* 5414 */ IC_EVEX_L2_XD_KZ, /* 5415 */ IC_EVEX_L2_W_KZ, /* 5416 */ IC_EVEX_L2_W_KZ, /* 5417 */ IC_EVEX_L2_W_XS_KZ, /* 5418 */ IC_EVEX_L2_W_XS_KZ, /* 5419 */ IC_EVEX_L2_W_XD_KZ, /* 5420 */ IC_EVEX_L2_W_XD_KZ, /* 5421 */ IC_EVEX_L2_W_XD_KZ, /* 5422 */ IC_EVEX_L2_W_XD_KZ, /* 5423 */ IC_EVEX_L2_OPSIZE_KZ, /* 5424 */ IC_EVEX_L2_OPSIZE_KZ, /* 5425 */ IC_EVEX_L2_OPSIZE_KZ, /* 5426 */ IC_EVEX_L2_OPSIZE_KZ, /* 5427 */ IC_EVEX_L2_OPSIZE_KZ, /* 5428 */ IC_EVEX_L2_OPSIZE_KZ, /* 5429 */ IC_EVEX_L2_OPSIZE_KZ, /* 5430 */ IC_EVEX_L2_OPSIZE_KZ, /* 5431 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5432 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5433 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5434 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5435 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5436 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5437 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5438 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5439 */ IC_EVEX_L2_KZ, /* 5440 */ IC_EVEX_L2_KZ, /* 5441 */ IC_EVEX_L2_XS_KZ, /* 5442 */ IC_EVEX_L2_XS_KZ, /* 5443 */ IC_EVEX_L2_XD_KZ, /* 5444 */ IC_EVEX_L2_XD_KZ, /* 5445 */ IC_EVEX_L2_XD_KZ, /* 5446 */ IC_EVEX_L2_XD_KZ, /* 5447 */ IC_EVEX_L2_W_KZ, /* 5448 */ IC_EVEX_L2_W_KZ, /* 5449 */ IC_EVEX_L2_W_XS_KZ, /* 5450 */ IC_EVEX_L2_W_XS_KZ, /* 5451 */ IC_EVEX_L2_W_XD_KZ, /* 5452 */ IC_EVEX_L2_W_XD_KZ, /* 5453 */ IC_EVEX_L2_W_XD_KZ, /* 5454 */ IC_EVEX_L2_W_XD_KZ, /* 5455 */ IC_EVEX_L2_OPSIZE_KZ, /* 5456 */ IC_EVEX_L2_OPSIZE_KZ, /* 5457 */ IC_EVEX_L2_OPSIZE_KZ, /* 5458 */ IC_EVEX_L2_OPSIZE_KZ, /* 5459 */ IC_EVEX_L2_OPSIZE_KZ, /* 5460 */ IC_EVEX_L2_OPSIZE_KZ, /* 5461 */ IC_EVEX_L2_OPSIZE_KZ, /* 5462 */ IC_EVEX_L2_OPSIZE_KZ, /* 5463 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5464 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5465 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5466 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5467 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5468 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5469 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5470 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5471 */ IC_EVEX_L2_KZ, /* 5472 */ IC_EVEX_L2_KZ, /* 5473 */ IC_EVEX_L2_XS_KZ, /* 5474 */ IC_EVEX_L2_XS_KZ, /* 5475 */ IC_EVEX_L2_XD_KZ, /* 5476 */ IC_EVEX_L2_XD_KZ, /* 5477 */ IC_EVEX_L2_XD_KZ, /* 5478 */ IC_EVEX_L2_XD_KZ, /* 5479 */ IC_EVEX_L2_W_KZ, /* 5480 */ IC_EVEX_L2_W_KZ, /* 5481 */ IC_EVEX_L2_W_XS_KZ, /* 5482 */ IC_EVEX_L2_W_XS_KZ, /* 5483 */ IC_EVEX_L2_W_XD_KZ, /* 5484 */ IC_EVEX_L2_W_XD_KZ, /* 5485 */ IC_EVEX_L2_W_XD_KZ, /* 5486 */ IC_EVEX_L2_W_XD_KZ, /* 5487 */ IC_EVEX_L2_OPSIZE_KZ, /* 5488 */ IC_EVEX_L2_OPSIZE_KZ, /* 5489 */ IC_EVEX_L2_OPSIZE_KZ, /* 5490 */ IC_EVEX_L2_OPSIZE_KZ, /* 5491 */ IC_EVEX_L2_OPSIZE_KZ, /* 5492 */ IC_EVEX_L2_OPSIZE_KZ, /* 5493 */ IC_EVEX_L2_OPSIZE_KZ, /* 5494 */ IC_EVEX_L2_OPSIZE_KZ, /* 5495 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5496 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5497 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5498 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5499 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5500 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5501 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5502 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5503 */ IC_EVEX_L2_KZ, /* 5504 */ IC_EVEX_L2_KZ, /* 5505 */ IC_EVEX_L2_XS_KZ, /* 5506 */ IC_EVEX_L2_XS_KZ, /* 5507 */ IC_EVEX_L2_XD_KZ, /* 5508 */ IC_EVEX_L2_XD_KZ, /* 5509 */ IC_EVEX_L2_XD_KZ, /* 5510 */ IC_EVEX_L2_XD_KZ, /* 5511 */ IC_EVEX_L2_W_KZ, /* 5512 */ IC_EVEX_L2_W_KZ, /* 5513 */ IC_EVEX_L2_W_XS_KZ, /* 5514 */ IC_EVEX_L2_W_XS_KZ, /* 5515 */ IC_EVEX_L2_W_XD_KZ, /* 5516 */ IC_EVEX_L2_W_XD_KZ, /* 5517 */ IC_EVEX_L2_W_XD_KZ, /* 5518 */ IC_EVEX_L2_W_XD_KZ, /* 5519 */ IC_EVEX_L2_OPSIZE_KZ, /* 5520 */ IC_EVEX_L2_OPSIZE_KZ, /* 5521 */ IC_EVEX_L2_OPSIZE_KZ, /* 5522 */ IC_EVEX_L2_OPSIZE_KZ, /* 5523 */ IC_EVEX_L2_OPSIZE_KZ, /* 5524 */ IC_EVEX_L2_OPSIZE_KZ, /* 5525 */ IC_EVEX_L2_OPSIZE_KZ, /* 5526 */ IC_EVEX_L2_OPSIZE_KZ, /* 5527 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5528 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5529 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5530 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5531 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5532 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5533 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5534 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5535 */ IC_EVEX_L2_KZ, /* 5536 */ IC_EVEX_L2_KZ, /* 5537 */ IC_EVEX_L2_XS_KZ, /* 5538 */ IC_EVEX_L2_XS_KZ, /* 5539 */ IC_EVEX_L2_XD_KZ, /* 5540 */ IC_EVEX_L2_XD_KZ, /* 5541 */ IC_EVEX_L2_XD_KZ, /* 5542 */ IC_EVEX_L2_XD_KZ, /* 5543 */ IC_EVEX_L2_W_KZ, /* 5544 */ IC_EVEX_L2_W_KZ, /* 5545 */ IC_EVEX_L2_W_XS_KZ, /* 5546 */ IC_EVEX_L2_W_XS_KZ, /* 5547 */ IC_EVEX_L2_W_XD_KZ, /* 5548 */ IC_EVEX_L2_W_XD_KZ, /* 5549 */ IC_EVEX_L2_W_XD_KZ, /* 5550 */ IC_EVEX_L2_W_XD_KZ, /* 5551 */ IC_EVEX_L2_OPSIZE_KZ, /* 5552 */ IC_EVEX_L2_OPSIZE_KZ, /* 5553 */ IC_EVEX_L2_OPSIZE_KZ, /* 5554 */ IC_EVEX_L2_OPSIZE_KZ, /* 5555 */ IC_EVEX_L2_OPSIZE_KZ, /* 5556 */ IC_EVEX_L2_OPSIZE_KZ, /* 5557 */ IC_EVEX_L2_OPSIZE_KZ, /* 5558 */ IC_EVEX_L2_OPSIZE_KZ, /* 5559 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5560 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5561 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5562 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5563 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5564 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5565 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5566 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5567 */ IC_EVEX_L2_KZ, /* 5568 */ IC_EVEX_L2_KZ, /* 5569 */ IC_EVEX_L2_XS_KZ, /* 5570 */ IC_EVEX_L2_XS_KZ, /* 5571 */ IC_EVEX_L2_XD_KZ, /* 5572 */ IC_EVEX_L2_XD_KZ, /* 5573 */ IC_EVEX_L2_XD_KZ, /* 5574 */ IC_EVEX_L2_XD_KZ, /* 5575 */ IC_EVEX_L2_W_KZ, /* 5576 */ IC_EVEX_L2_W_KZ, /* 5577 */ IC_EVEX_L2_W_XS_KZ, /* 5578 */ IC_EVEX_L2_W_XS_KZ, /* 5579 */ IC_EVEX_L2_W_XD_KZ, /* 5580 */ IC_EVEX_L2_W_XD_KZ, /* 5581 */ IC_EVEX_L2_W_XD_KZ, /* 5582 */ IC_EVEX_L2_W_XD_KZ, /* 5583 */ IC_EVEX_L2_OPSIZE_KZ, /* 5584 */ IC_EVEX_L2_OPSIZE_KZ, /* 5585 */ IC_EVEX_L2_OPSIZE_KZ, /* 5586 */ IC_EVEX_L2_OPSIZE_KZ, /* 5587 */ IC_EVEX_L2_OPSIZE_KZ, /* 5588 */ IC_EVEX_L2_OPSIZE_KZ, /* 5589 */ IC_EVEX_L2_OPSIZE_KZ, /* 5590 */ IC_EVEX_L2_OPSIZE_KZ, /* 5591 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5592 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5593 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5594 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5595 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5596 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5597 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5598 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5599 */ IC_EVEX_L2_KZ, /* 5600 */ IC_EVEX_L2_KZ, /* 5601 */ IC_EVEX_L2_XS_KZ, /* 5602 */ IC_EVEX_L2_XS_KZ, /* 5603 */ IC_EVEX_L2_XD_KZ, /* 5604 */ IC_EVEX_L2_XD_KZ, /* 5605 */ IC_EVEX_L2_XD_KZ, /* 5606 */ IC_EVEX_L2_XD_KZ, /* 5607 */ IC_EVEX_L2_W_KZ, /* 5608 */ IC_EVEX_L2_W_KZ, /* 5609 */ IC_EVEX_L2_W_XS_KZ, /* 5610 */ IC_EVEX_L2_W_XS_KZ, /* 5611 */ IC_EVEX_L2_W_XD_KZ, /* 5612 */ IC_EVEX_L2_W_XD_KZ, /* 5613 */ IC_EVEX_L2_W_XD_KZ, /* 5614 */ IC_EVEX_L2_W_XD_KZ, /* 5615 */ IC_EVEX_L2_OPSIZE_KZ, /* 5616 */ IC_EVEX_L2_OPSIZE_KZ, /* 5617 */ IC_EVEX_L2_OPSIZE_KZ, /* 5618 */ IC_EVEX_L2_OPSIZE_KZ, /* 5619 */ IC_EVEX_L2_OPSIZE_KZ, /* 5620 */ IC_EVEX_L2_OPSIZE_KZ, /* 5621 */ IC_EVEX_L2_OPSIZE_KZ, /* 5622 */ IC_EVEX_L2_OPSIZE_KZ, /* 5623 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5624 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5625 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5626 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5627 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5628 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5629 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5630 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5631 */ IC, /* 5632 */ IC_64BIT, /* 5633 */ IC_XS, /* 5634 */ IC_64BIT_XS, /* 5635 */ IC_XD, /* 5636 */ IC_64BIT_XD, /* 5637 */ IC_XS, /* 5638 */ IC_64BIT_XS, /* 5639 */ IC, /* 5640 */ IC_64BIT_REXW, /* 5641 */ IC_XS, /* 5642 */ IC_64BIT_REXW_XS, /* 5643 */ IC_XD, /* 5644 */ IC_64BIT_REXW_XD, /* 5645 */ IC_XS, /* 5646 */ IC_64BIT_REXW_XS, /* 5647 */ IC_OPSIZE, /* 5648 */ IC_64BIT_OPSIZE, /* 5649 */ IC_XS_OPSIZE, /* 5650 */ IC_64BIT_XS_OPSIZE, /* 5651 */ IC_XD_OPSIZE, /* 5652 */ IC_64BIT_XD_OPSIZE, /* 5653 */ IC_XS_OPSIZE, /* 5654 */ IC_64BIT_XD_OPSIZE, /* 5655 */ IC_OPSIZE, /* 5656 */ IC_64BIT_REXW_OPSIZE, /* 5657 */ IC_XS_OPSIZE, /* 5658 */ IC_64BIT_REXW_XS, /* 5659 */ IC_XD_OPSIZE, /* 5660 */ IC_64BIT_REXW_XD, /* 5661 */ IC_XS_OPSIZE, /* 5662 */ IC_64BIT_REXW_XS, /* 5663 */ IC_ADSIZE, /* 5664 */ IC_64BIT_ADSIZE, /* 5665 */ IC_XS, /* 5666 */ IC_64BIT_XS, /* 5667 */ IC_XD, /* 5668 */ IC_64BIT_XD, /* 5669 */ IC_XS, /* 5670 */ IC_64BIT_XS, /* 5671 */ IC_ADSIZE, /* 5672 */ IC_64BIT_REXW_ADSIZE, /* 5673 */ IC_XS, /* 5674 */ IC_64BIT_REXW_XS, /* 5675 */ IC_XD, /* 5676 */ IC_64BIT_REXW_XD, /* 5677 */ IC_XS, /* 5678 */ IC_64BIT_REXW_XS, /* 5679 */ IC_OPSIZE_ADSIZE, /* 5680 */ IC_64BIT_OPSIZE_ADSIZE, /* 5681 */ IC_XS_OPSIZE, /* 5682 */ IC_64BIT_XS_OPSIZE, /* 5683 */ IC_XD_OPSIZE, /* 5684 */ IC_64BIT_XD_OPSIZE, /* 5685 */ IC_XS_OPSIZE, /* 5686 */ IC_64BIT_XD_OPSIZE, /* 5687 */ IC_OPSIZE_ADSIZE, /* 5688 */ IC_64BIT_REXW_OPSIZE, /* 5689 */ IC_XS_OPSIZE, /* 5690 */ IC_64BIT_REXW_XS, /* 5691 */ IC_XD_OPSIZE, /* 5692 */ IC_64BIT_REXW_XD, /* 5693 */ IC_XS_OPSIZE, /* 5694 */ IC_64BIT_REXW_XS, /* 5695 */ IC_VEX, /* 5696 */ IC_VEX, /* 5697 */ IC_VEX_XS, /* 5698 */ IC_VEX_XS, /* 5699 */ IC_VEX_XD, /* 5700 */ IC_VEX_XD, /* 5701 */ IC_VEX_XD, /* 5702 */ IC_VEX_XD, /* 5703 */ IC_VEX_W, /* 5704 */ IC_VEX_W, /* 5705 */ IC_VEX_W_XS, /* 5706 */ IC_VEX_W_XS, /* 5707 */ IC_VEX_W_XD, /* 5708 */ IC_VEX_W_XD, /* 5709 */ IC_VEX_W_XD, /* 5710 */ IC_VEX_W_XD, /* 5711 */ IC_VEX_OPSIZE, /* 5712 */ IC_VEX_OPSIZE, /* 5713 */ IC_VEX_OPSIZE, /* 5714 */ IC_VEX_OPSIZE, /* 5715 */ IC_VEX_OPSIZE, /* 5716 */ IC_VEX_OPSIZE, /* 5717 */ IC_VEX_OPSIZE, /* 5718 */ IC_VEX_OPSIZE, /* 5719 */ IC_VEX_W_OPSIZE, /* 5720 */ IC_VEX_W_OPSIZE, /* 5721 */ IC_VEX_W_OPSIZE, /* 5722 */ IC_VEX_W_OPSIZE, /* 5723 */ IC_VEX_W_OPSIZE, /* 5724 */ IC_VEX_W_OPSIZE, /* 5725 */ IC_VEX_W_OPSIZE, /* 5726 */ IC_VEX_W_OPSIZE, /* 5727 */ IC_VEX, /* 5728 */ IC_VEX, /* 5729 */ IC_VEX_XS, /* 5730 */ IC_VEX_XS, /* 5731 */ IC_VEX_XD, /* 5732 */ IC_VEX_XD, /* 5733 */ IC_VEX_XD, /* 5734 */ IC_VEX_XD, /* 5735 */ IC_VEX_W, /* 5736 */ IC_VEX_W, /* 5737 */ IC_VEX_W_XS, /* 5738 */ IC_VEX_W_XS, /* 5739 */ IC_VEX_W_XD, /* 5740 */ IC_VEX_W_XD, /* 5741 */ IC_VEX_W_XD, /* 5742 */ IC_VEX_W_XD, /* 5743 */ IC_VEX_OPSIZE, /* 5744 */ IC_VEX_OPSIZE, /* 5745 */ IC_VEX_OPSIZE, /* 5746 */ IC_VEX_OPSIZE, /* 5747 */ IC_VEX_OPSIZE, /* 5748 */ IC_VEX_OPSIZE, /* 5749 */ IC_VEX_OPSIZE, /* 5750 */ IC_VEX_OPSIZE, /* 5751 */ IC_VEX_W_OPSIZE, /* 5752 */ IC_VEX_W_OPSIZE, /* 5753 */ IC_VEX_W_OPSIZE, /* 5754 */ IC_VEX_W_OPSIZE, /* 5755 */ IC_VEX_W_OPSIZE, /* 5756 */ IC_VEX_W_OPSIZE, /* 5757 */ IC_VEX_W_OPSIZE, /* 5758 */ IC_VEX_W_OPSIZE, /* 5759 */ IC_VEX_L, /* 5760 */ IC_VEX_L, /* 5761 */ IC_VEX_L_XS, /* 5762 */ IC_VEX_L_XS, /* 5763 */ IC_VEX_L_XD, /* 5764 */ IC_VEX_L_XD, /* 5765 */ IC_VEX_L_XD, /* 5766 */ IC_VEX_L_XD, /* 5767 */ IC_VEX_L_W, /* 5768 */ IC_VEX_L_W, /* 5769 */ IC_VEX_L_W_XS, /* 5770 */ IC_VEX_L_W_XS, /* 5771 */ IC_VEX_L_W_XD, /* 5772 */ IC_VEX_L_W_XD, /* 5773 */ IC_VEX_L_W_XD, /* 5774 */ IC_VEX_L_W_XD, /* 5775 */ IC_VEX_L_OPSIZE, /* 5776 */ IC_VEX_L_OPSIZE, /* 5777 */ IC_VEX_L_OPSIZE, /* 5778 */ IC_VEX_L_OPSIZE, /* 5779 */ IC_VEX_L_OPSIZE, /* 5780 */ IC_VEX_L_OPSIZE, /* 5781 */ IC_VEX_L_OPSIZE, /* 5782 */ IC_VEX_L_OPSIZE, /* 5783 */ IC_VEX_L_W_OPSIZE, /* 5784 */ IC_VEX_L_W_OPSIZE, /* 5785 */ IC_VEX_L_W_OPSIZE, /* 5786 */ IC_VEX_L_W_OPSIZE, /* 5787 */ IC_VEX_L_W_OPSIZE, /* 5788 */ IC_VEX_L_W_OPSIZE, /* 5789 */ IC_VEX_L_W_OPSIZE, /* 5790 */ IC_VEX_L_W_OPSIZE, /* 5791 */ IC_VEX_L, /* 5792 */ IC_VEX_L, /* 5793 */ IC_VEX_L_XS, /* 5794 */ IC_VEX_L_XS, /* 5795 */ IC_VEX_L_XD, /* 5796 */ IC_VEX_L_XD, /* 5797 */ IC_VEX_L_XD, /* 5798 */ IC_VEX_L_XD, /* 5799 */ IC_VEX_L_W, /* 5800 */ IC_VEX_L_W, /* 5801 */ IC_VEX_L_W_XS, /* 5802 */ IC_VEX_L_W_XS, /* 5803 */ IC_VEX_L_W_XD, /* 5804 */ IC_VEX_L_W_XD, /* 5805 */ IC_VEX_L_W_XD, /* 5806 */ IC_VEX_L_W_XD, /* 5807 */ IC_VEX_L_OPSIZE, /* 5808 */ IC_VEX_L_OPSIZE, /* 5809 */ IC_VEX_L_OPSIZE, /* 5810 */ IC_VEX_L_OPSIZE, /* 5811 */ IC_VEX_L_OPSIZE, /* 5812 */ IC_VEX_L_OPSIZE, /* 5813 */ IC_VEX_L_OPSIZE, /* 5814 */ IC_VEX_L_OPSIZE, /* 5815 */ IC_VEX_L_W_OPSIZE, /* 5816 */ IC_VEX_L_W_OPSIZE, /* 5817 */ IC_VEX_L_W_OPSIZE, /* 5818 */ IC_VEX_L_W_OPSIZE, /* 5819 */ IC_VEX_L_W_OPSIZE, /* 5820 */ IC_VEX_L_W_OPSIZE, /* 5821 */ IC_VEX_L_W_OPSIZE, /* 5822 */ IC_VEX_L_W_OPSIZE, /* 5823 */ IC_VEX_L, /* 5824 */ IC_VEX_L, /* 5825 */ IC_VEX_L_XS, /* 5826 */ IC_VEX_L_XS, /* 5827 */ IC_VEX_L_XD, /* 5828 */ IC_VEX_L_XD, /* 5829 */ IC_VEX_L_XD, /* 5830 */ IC_VEX_L_XD, /* 5831 */ IC_VEX_L_W, /* 5832 */ IC_VEX_L_W, /* 5833 */ IC_VEX_L_W_XS, /* 5834 */ IC_VEX_L_W_XS, /* 5835 */ IC_VEX_L_W_XD, /* 5836 */ IC_VEX_L_W_XD, /* 5837 */ IC_VEX_L_W_XD, /* 5838 */ IC_VEX_L_W_XD, /* 5839 */ IC_VEX_L_OPSIZE, /* 5840 */ IC_VEX_L_OPSIZE, /* 5841 */ IC_VEX_L_OPSIZE, /* 5842 */ IC_VEX_L_OPSIZE, /* 5843 */ IC_VEX_L_OPSIZE, /* 5844 */ IC_VEX_L_OPSIZE, /* 5845 */ IC_VEX_L_OPSIZE, /* 5846 */ IC_VEX_L_OPSIZE, /* 5847 */ IC_VEX_L_W_OPSIZE, /* 5848 */ IC_VEX_L_W_OPSIZE, /* 5849 */ IC_VEX_L_W_OPSIZE, /* 5850 */ IC_VEX_L_W_OPSIZE, /* 5851 */ IC_VEX_L_W_OPSIZE, /* 5852 */ IC_VEX_L_W_OPSIZE, /* 5853 */ IC_VEX_L_W_OPSIZE, /* 5854 */ IC_VEX_L_W_OPSIZE, /* 5855 */ IC_VEX_L, /* 5856 */ IC_VEX_L, /* 5857 */ IC_VEX_L_XS, /* 5858 */ IC_VEX_L_XS, /* 5859 */ IC_VEX_L_XD, /* 5860 */ IC_VEX_L_XD, /* 5861 */ IC_VEX_L_XD, /* 5862 */ IC_VEX_L_XD, /* 5863 */ IC_VEX_L_W, /* 5864 */ IC_VEX_L_W, /* 5865 */ IC_VEX_L_W_XS, /* 5866 */ IC_VEX_L_W_XS, /* 5867 */ IC_VEX_L_W_XD, /* 5868 */ IC_VEX_L_W_XD, /* 5869 */ IC_VEX_L_W_XD, /* 5870 */ IC_VEX_L_W_XD, /* 5871 */ IC_VEX_L_OPSIZE, /* 5872 */ IC_VEX_L_OPSIZE, /* 5873 */ IC_VEX_L_OPSIZE, /* 5874 */ IC_VEX_L_OPSIZE, /* 5875 */ IC_VEX_L_OPSIZE, /* 5876 */ IC_VEX_L_OPSIZE, /* 5877 */ IC_VEX_L_OPSIZE, /* 5878 */ IC_VEX_L_OPSIZE, /* 5879 */ IC_VEX_L_W_OPSIZE, /* 5880 */ IC_VEX_L_W_OPSIZE, /* 5881 */ IC_VEX_L_W_OPSIZE, /* 5882 */ IC_VEX_L_W_OPSIZE, /* 5883 */ IC_VEX_L_W_OPSIZE, /* 5884 */ IC_VEX_L_W_OPSIZE, /* 5885 */ IC_VEX_L_W_OPSIZE, /* 5886 */ IC_VEX_L_W_OPSIZE, /* 5887 */ IC_EVEX_L2_KZ, /* 5888 */ IC_EVEX_L2_KZ, /* 5889 */ IC_EVEX_L2_XS_KZ, /* 5890 */ IC_EVEX_L2_XS_KZ, /* 5891 */ IC_EVEX_L2_XD_KZ, /* 5892 */ IC_EVEX_L2_XD_KZ, /* 5893 */ IC_EVEX_L2_XD_KZ, /* 5894 */ IC_EVEX_L2_XD_KZ, /* 5895 */ IC_EVEX_L2_W_KZ, /* 5896 */ IC_EVEX_L2_W_KZ, /* 5897 */ IC_EVEX_L2_W_XS_KZ, /* 5898 */ IC_EVEX_L2_W_XS_KZ, /* 5899 */ IC_EVEX_L2_W_XD_KZ, /* 5900 */ IC_EVEX_L2_W_XD_KZ, /* 5901 */ IC_EVEX_L2_W_XD_KZ, /* 5902 */ IC_EVEX_L2_W_XD_KZ, /* 5903 */ IC_EVEX_L2_OPSIZE_KZ, /* 5904 */ IC_EVEX_L2_OPSIZE_KZ, /* 5905 */ IC_EVEX_L2_OPSIZE_KZ, /* 5906 */ IC_EVEX_L2_OPSIZE_KZ, /* 5907 */ IC_EVEX_L2_OPSIZE_KZ, /* 5908 */ IC_EVEX_L2_OPSIZE_KZ, /* 5909 */ IC_EVEX_L2_OPSIZE_KZ, /* 5910 */ IC_EVEX_L2_OPSIZE_KZ, /* 5911 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5912 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5913 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5914 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5915 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5916 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5917 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5918 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5919 */ IC_EVEX_L2_KZ, /* 5920 */ IC_EVEX_L2_KZ, /* 5921 */ IC_EVEX_L2_XS_KZ, /* 5922 */ IC_EVEX_L2_XS_KZ, /* 5923 */ IC_EVEX_L2_XD_KZ, /* 5924 */ IC_EVEX_L2_XD_KZ, /* 5925 */ IC_EVEX_L2_XD_KZ, /* 5926 */ IC_EVEX_L2_XD_KZ, /* 5927 */ IC_EVEX_L2_W_KZ, /* 5928 */ IC_EVEX_L2_W_KZ, /* 5929 */ IC_EVEX_L2_W_XS_KZ, /* 5930 */ IC_EVEX_L2_W_XS_KZ, /* 5931 */ IC_EVEX_L2_W_XD_KZ, /* 5932 */ IC_EVEX_L2_W_XD_KZ, /* 5933 */ IC_EVEX_L2_W_XD_KZ, /* 5934 */ IC_EVEX_L2_W_XD_KZ, /* 5935 */ IC_EVEX_L2_OPSIZE_KZ, /* 5936 */ IC_EVEX_L2_OPSIZE_KZ, /* 5937 */ IC_EVEX_L2_OPSIZE_KZ, /* 5938 */ IC_EVEX_L2_OPSIZE_KZ, /* 5939 */ IC_EVEX_L2_OPSIZE_KZ, /* 5940 */ IC_EVEX_L2_OPSIZE_KZ, /* 5941 */ IC_EVEX_L2_OPSIZE_KZ, /* 5942 */ IC_EVEX_L2_OPSIZE_KZ, /* 5943 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5944 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5945 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5946 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5947 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5948 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5949 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5950 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5951 */ IC_EVEX_L2_KZ, /* 5952 */ IC_EVEX_L2_KZ, /* 5953 */ IC_EVEX_L2_XS_KZ, /* 5954 */ IC_EVEX_L2_XS_KZ, /* 5955 */ IC_EVEX_L2_XD_KZ, /* 5956 */ IC_EVEX_L2_XD_KZ, /* 5957 */ IC_EVEX_L2_XD_KZ, /* 5958 */ IC_EVEX_L2_XD_KZ, /* 5959 */ IC_EVEX_L2_W_KZ, /* 5960 */ IC_EVEX_L2_W_KZ, /* 5961 */ IC_EVEX_L2_W_XS_KZ, /* 5962 */ IC_EVEX_L2_W_XS_KZ, /* 5963 */ IC_EVEX_L2_W_XD_KZ, /* 5964 */ IC_EVEX_L2_W_XD_KZ, /* 5965 */ IC_EVEX_L2_W_XD_KZ, /* 5966 */ IC_EVEX_L2_W_XD_KZ, /* 5967 */ IC_EVEX_L2_OPSIZE_KZ, /* 5968 */ IC_EVEX_L2_OPSIZE_KZ, /* 5969 */ IC_EVEX_L2_OPSIZE_KZ, /* 5970 */ IC_EVEX_L2_OPSIZE_KZ, /* 5971 */ IC_EVEX_L2_OPSIZE_KZ, /* 5972 */ IC_EVEX_L2_OPSIZE_KZ, /* 5973 */ IC_EVEX_L2_OPSIZE_KZ, /* 5974 */ IC_EVEX_L2_OPSIZE_KZ, /* 5975 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5976 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5977 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5978 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5979 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5980 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5981 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5982 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5983 */ IC_EVEX_L2_KZ, /* 5984 */ IC_EVEX_L2_KZ, /* 5985 */ IC_EVEX_L2_XS_KZ, /* 5986 */ IC_EVEX_L2_XS_KZ, /* 5987 */ IC_EVEX_L2_XD_KZ, /* 5988 */ IC_EVEX_L2_XD_KZ, /* 5989 */ IC_EVEX_L2_XD_KZ, /* 5990 */ IC_EVEX_L2_XD_KZ, /* 5991 */ IC_EVEX_L2_W_KZ, /* 5992 */ IC_EVEX_L2_W_KZ, /* 5993 */ IC_EVEX_L2_W_XS_KZ, /* 5994 */ IC_EVEX_L2_W_XS_KZ, /* 5995 */ IC_EVEX_L2_W_XD_KZ, /* 5996 */ IC_EVEX_L2_W_XD_KZ, /* 5997 */ IC_EVEX_L2_W_XD_KZ, /* 5998 */ IC_EVEX_L2_W_XD_KZ, /* 5999 */ IC_EVEX_L2_OPSIZE_KZ, /* 6000 */ IC_EVEX_L2_OPSIZE_KZ, /* 6001 */ IC_EVEX_L2_OPSIZE_KZ, /* 6002 */ IC_EVEX_L2_OPSIZE_KZ, /* 6003 */ IC_EVEX_L2_OPSIZE_KZ, /* 6004 */ IC_EVEX_L2_OPSIZE_KZ, /* 6005 */ IC_EVEX_L2_OPSIZE_KZ, /* 6006 */ IC_EVEX_L2_OPSIZE_KZ, /* 6007 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6008 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6009 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6010 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6011 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6012 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6013 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6014 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6015 */ IC_EVEX_L2_KZ, /* 6016 */ IC_EVEX_L2_KZ, /* 6017 */ IC_EVEX_L2_XS_KZ, /* 6018 */ IC_EVEX_L2_XS_KZ, /* 6019 */ IC_EVEX_L2_XD_KZ, /* 6020 */ IC_EVEX_L2_XD_KZ, /* 6021 */ IC_EVEX_L2_XD_KZ, /* 6022 */ IC_EVEX_L2_XD_KZ, /* 6023 */ IC_EVEX_L2_W_KZ, /* 6024 */ IC_EVEX_L2_W_KZ, /* 6025 */ IC_EVEX_L2_W_XS_KZ, /* 6026 */ IC_EVEX_L2_W_XS_KZ, /* 6027 */ IC_EVEX_L2_W_XD_KZ, /* 6028 */ IC_EVEX_L2_W_XD_KZ, /* 6029 */ IC_EVEX_L2_W_XD_KZ, /* 6030 */ IC_EVEX_L2_W_XD_KZ, /* 6031 */ IC_EVEX_L2_OPSIZE_KZ, /* 6032 */ IC_EVEX_L2_OPSIZE_KZ, /* 6033 */ IC_EVEX_L2_OPSIZE_KZ, /* 6034 */ IC_EVEX_L2_OPSIZE_KZ, /* 6035 */ IC_EVEX_L2_OPSIZE_KZ, /* 6036 */ IC_EVEX_L2_OPSIZE_KZ, /* 6037 */ IC_EVEX_L2_OPSIZE_KZ, /* 6038 */ IC_EVEX_L2_OPSIZE_KZ, /* 6039 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6040 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6041 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6042 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6043 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6044 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6045 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6046 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6047 */ IC_EVEX_L2_KZ, /* 6048 */ IC_EVEX_L2_KZ, /* 6049 */ IC_EVEX_L2_XS_KZ, /* 6050 */ IC_EVEX_L2_XS_KZ, /* 6051 */ IC_EVEX_L2_XD_KZ, /* 6052 */ IC_EVEX_L2_XD_KZ, /* 6053 */ IC_EVEX_L2_XD_KZ, /* 6054 */ IC_EVEX_L2_XD_KZ, /* 6055 */ IC_EVEX_L2_W_KZ, /* 6056 */ IC_EVEX_L2_W_KZ, /* 6057 */ IC_EVEX_L2_W_XS_KZ, /* 6058 */ IC_EVEX_L2_W_XS_KZ, /* 6059 */ IC_EVEX_L2_W_XD_KZ, /* 6060 */ IC_EVEX_L2_W_XD_KZ, /* 6061 */ IC_EVEX_L2_W_XD_KZ, /* 6062 */ IC_EVEX_L2_W_XD_KZ, /* 6063 */ IC_EVEX_L2_OPSIZE_KZ, /* 6064 */ IC_EVEX_L2_OPSIZE_KZ, /* 6065 */ IC_EVEX_L2_OPSIZE_KZ, /* 6066 */ IC_EVEX_L2_OPSIZE_KZ, /* 6067 */ IC_EVEX_L2_OPSIZE_KZ, /* 6068 */ IC_EVEX_L2_OPSIZE_KZ, /* 6069 */ IC_EVEX_L2_OPSIZE_KZ, /* 6070 */ IC_EVEX_L2_OPSIZE_KZ, /* 6071 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6072 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6073 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6074 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6075 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6076 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6077 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6078 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6079 */ IC_EVEX_L2_KZ, /* 6080 */ IC_EVEX_L2_KZ, /* 6081 */ IC_EVEX_L2_XS_KZ, /* 6082 */ IC_EVEX_L2_XS_KZ, /* 6083 */ IC_EVEX_L2_XD_KZ, /* 6084 */ IC_EVEX_L2_XD_KZ, /* 6085 */ IC_EVEX_L2_XD_KZ, /* 6086 */ IC_EVEX_L2_XD_KZ, /* 6087 */ IC_EVEX_L2_W_KZ, /* 6088 */ IC_EVEX_L2_W_KZ, /* 6089 */ IC_EVEX_L2_W_XS_KZ, /* 6090 */ IC_EVEX_L2_W_XS_KZ, /* 6091 */ IC_EVEX_L2_W_XD_KZ, /* 6092 */ IC_EVEX_L2_W_XD_KZ, /* 6093 */ IC_EVEX_L2_W_XD_KZ, /* 6094 */ IC_EVEX_L2_W_XD_KZ, /* 6095 */ IC_EVEX_L2_OPSIZE_KZ, /* 6096 */ IC_EVEX_L2_OPSIZE_KZ, /* 6097 */ IC_EVEX_L2_OPSIZE_KZ, /* 6098 */ IC_EVEX_L2_OPSIZE_KZ, /* 6099 */ IC_EVEX_L2_OPSIZE_KZ, /* 6100 */ IC_EVEX_L2_OPSIZE_KZ, /* 6101 */ IC_EVEX_L2_OPSIZE_KZ, /* 6102 */ IC_EVEX_L2_OPSIZE_KZ, /* 6103 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6104 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6105 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6106 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6107 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6108 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6109 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6110 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6111 */ IC_EVEX_L2_KZ, /* 6112 */ IC_EVEX_L2_KZ, /* 6113 */ IC_EVEX_L2_XS_KZ, /* 6114 */ IC_EVEX_L2_XS_KZ, /* 6115 */ IC_EVEX_L2_XD_KZ, /* 6116 */ IC_EVEX_L2_XD_KZ, /* 6117 */ IC_EVEX_L2_XD_KZ, /* 6118 */ IC_EVEX_L2_XD_KZ, /* 6119 */ IC_EVEX_L2_W_KZ, /* 6120 */ IC_EVEX_L2_W_KZ, /* 6121 */ IC_EVEX_L2_W_XS_KZ, /* 6122 */ IC_EVEX_L2_W_XS_KZ, /* 6123 */ IC_EVEX_L2_W_XD_KZ, /* 6124 */ IC_EVEX_L2_W_XD_KZ, /* 6125 */ IC_EVEX_L2_W_XD_KZ, /* 6126 */ IC_EVEX_L2_W_XD_KZ, /* 6127 */ IC_EVEX_L2_OPSIZE_KZ, /* 6128 */ IC_EVEX_L2_OPSIZE_KZ, /* 6129 */ IC_EVEX_L2_OPSIZE_KZ, /* 6130 */ IC_EVEX_L2_OPSIZE_KZ, /* 6131 */ IC_EVEX_L2_OPSIZE_KZ, /* 6132 */ IC_EVEX_L2_OPSIZE_KZ, /* 6133 */ IC_EVEX_L2_OPSIZE_KZ, /* 6134 */ IC_EVEX_L2_OPSIZE_KZ, /* 6135 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6136 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6137 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6138 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6139 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6140 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6141 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6142 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6143 */ IC, /* 6144 */ IC_64BIT, /* 6145 */ IC_XS, /* 6146 */ IC_64BIT_XS, /* 6147 */ IC_XD, /* 6148 */ IC_64BIT_XD, /* 6149 */ IC_XS, /* 6150 */ IC_64BIT_XS, /* 6151 */ IC, /* 6152 */ IC_64BIT_REXW, /* 6153 */ IC_XS, /* 6154 */ IC_64BIT_REXW_XS, /* 6155 */ IC_XD, /* 6156 */ IC_64BIT_REXW_XD, /* 6157 */ IC_XS, /* 6158 */ IC_64BIT_REXW_XS, /* 6159 */ IC_OPSIZE, /* 6160 */ IC_64BIT_OPSIZE, /* 6161 */ IC_XS_OPSIZE, /* 6162 */ IC_64BIT_XS_OPSIZE, /* 6163 */ IC_XD_OPSIZE, /* 6164 */ IC_64BIT_XD_OPSIZE, /* 6165 */ IC_XS_OPSIZE, /* 6166 */ IC_64BIT_XD_OPSIZE, /* 6167 */ IC_OPSIZE, /* 6168 */ IC_64BIT_REXW_OPSIZE, /* 6169 */ IC_XS_OPSIZE, /* 6170 */ IC_64BIT_REXW_XS, /* 6171 */ IC_XD_OPSIZE, /* 6172 */ IC_64BIT_REXW_XD, /* 6173 */ IC_XS_OPSIZE, /* 6174 */ IC_64BIT_REXW_XS, /* 6175 */ IC_ADSIZE, /* 6176 */ IC_64BIT_ADSIZE, /* 6177 */ IC_XS, /* 6178 */ IC_64BIT_XS, /* 6179 */ IC_XD, /* 6180 */ IC_64BIT_XD, /* 6181 */ IC_XS, /* 6182 */ IC_64BIT_XS, /* 6183 */ IC_ADSIZE, /* 6184 */ IC_64BIT_REXW_ADSIZE, /* 6185 */ IC_XS, /* 6186 */ IC_64BIT_REXW_XS, /* 6187 */ IC_XD, /* 6188 */ IC_64BIT_REXW_XD, /* 6189 */ IC_XS, /* 6190 */ IC_64BIT_REXW_XS, /* 6191 */ IC_OPSIZE_ADSIZE, /* 6192 */ IC_64BIT_OPSIZE_ADSIZE, /* 6193 */ IC_XS_OPSIZE, /* 6194 */ IC_64BIT_XS_OPSIZE, /* 6195 */ IC_XD_OPSIZE, /* 6196 */ IC_64BIT_XD_OPSIZE, /* 6197 */ IC_XS_OPSIZE, /* 6198 */ IC_64BIT_XD_OPSIZE, /* 6199 */ IC_OPSIZE_ADSIZE, /* 6200 */ IC_64BIT_REXW_OPSIZE, /* 6201 */ IC_XS_OPSIZE, /* 6202 */ IC_64BIT_REXW_XS, /* 6203 */ IC_XD_OPSIZE, /* 6204 */ IC_64BIT_REXW_XD, /* 6205 */ IC_XS_OPSIZE, /* 6206 */ IC_64BIT_REXW_XS, /* 6207 */ IC_VEX, /* 6208 */ IC_VEX, /* 6209 */ IC_VEX_XS, /* 6210 */ IC_VEX_XS, /* 6211 */ IC_VEX_XD, /* 6212 */ IC_VEX_XD, /* 6213 */ IC_VEX_XD, /* 6214 */ IC_VEX_XD, /* 6215 */ IC_VEX_W, /* 6216 */ IC_VEX_W, /* 6217 */ IC_VEX_W_XS, /* 6218 */ IC_VEX_W_XS, /* 6219 */ IC_VEX_W_XD, /* 6220 */ IC_VEX_W_XD, /* 6221 */ IC_VEX_W_XD, /* 6222 */ IC_VEX_W_XD, /* 6223 */ IC_VEX_OPSIZE, /* 6224 */ IC_VEX_OPSIZE, /* 6225 */ IC_VEX_OPSIZE, /* 6226 */ IC_VEX_OPSIZE, /* 6227 */ IC_VEX_OPSIZE, /* 6228 */ IC_VEX_OPSIZE, /* 6229 */ IC_VEX_OPSIZE, /* 6230 */ IC_VEX_OPSIZE, /* 6231 */ IC_VEX_W_OPSIZE, /* 6232 */ IC_VEX_W_OPSIZE, /* 6233 */ IC_VEX_W_OPSIZE, /* 6234 */ IC_VEX_W_OPSIZE, /* 6235 */ IC_VEX_W_OPSIZE, /* 6236 */ IC_VEX_W_OPSIZE, /* 6237 */ IC_VEX_W_OPSIZE, /* 6238 */ IC_VEX_W_OPSIZE, /* 6239 */ IC_VEX, /* 6240 */ IC_VEX, /* 6241 */ IC_VEX_XS, /* 6242 */ IC_VEX_XS, /* 6243 */ IC_VEX_XD, /* 6244 */ IC_VEX_XD, /* 6245 */ IC_VEX_XD, /* 6246 */ IC_VEX_XD, /* 6247 */ IC_VEX_W, /* 6248 */ IC_VEX_W, /* 6249 */ IC_VEX_W_XS, /* 6250 */ IC_VEX_W_XS, /* 6251 */ IC_VEX_W_XD, /* 6252 */ IC_VEX_W_XD, /* 6253 */ IC_VEX_W_XD, /* 6254 */ IC_VEX_W_XD, /* 6255 */ IC_VEX_OPSIZE, /* 6256 */ IC_VEX_OPSIZE, /* 6257 */ IC_VEX_OPSIZE, /* 6258 */ IC_VEX_OPSIZE, /* 6259 */ IC_VEX_OPSIZE, /* 6260 */ IC_VEX_OPSIZE, /* 6261 */ IC_VEX_OPSIZE, /* 6262 */ IC_VEX_OPSIZE, /* 6263 */ IC_VEX_W_OPSIZE, /* 6264 */ IC_VEX_W_OPSIZE, /* 6265 */ IC_VEX_W_OPSIZE, /* 6266 */ IC_VEX_W_OPSIZE, /* 6267 */ IC_VEX_W_OPSIZE, /* 6268 */ IC_VEX_W_OPSIZE, /* 6269 */ IC_VEX_W_OPSIZE, /* 6270 */ IC_VEX_W_OPSIZE, /* 6271 */ IC_VEX_L, /* 6272 */ IC_VEX_L, /* 6273 */ IC_VEX_L_XS, /* 6274 */ IC_VEX_L_XS, /* 6275 */ IC_VEX_L_XD, /* 6276 */ IC_VEX_L_XD, /* 6277 */ IC_VEX_L_XD, /* 6278 */ IC_VEX_L_XD, /* 6279 */ IC_VEX_L_W, /* 6280 */ IC_VEX_L_W, /* 6281 */ IC_VEX_L_W_XS, /* 6282 */ IC_VEX_L_W_XS, /* 6283 */ IC_VEX_L_W_XD, /* 6284 */ IC_VEX_L_W_XD, /* 6285 */ IC_VEX_L_W_XD, /* 6286 */ IC_VEX_L_W_XD, /* 6287 */ IC_VEX_L_OPSIZE, /* 6288 */ IC_VEX_L_OPSIZE, /* 6289 */ IC_VEX_L_OPSIZE, /* 6290 */ IC_VEX_L_OPSIZE, /* 6291 */ IC_VEX_L_OPSIZE, /* 6292 */ IC_VEX_L_OPSIZE, /* 6293 */ IC_VEX_L_OPSIZE, /* 6294 */ IC_VEX_L_OPSIZE, /* 6295 */ IC_VEX_L_W_OPSIZE, /* 6296 */ IC_VEX_L_W_OPSIZE, /* 6297 */ IC_VEX_L_W_OPSIZE, /* 6298 */ IC_VEX_L_W_OPSIZE, /* 6299 */ IC_VEX_L_W_OPSIZE, /* 6300 */ IC_VEX_L_W_OPSIZE, /* 6301 */ IC_VEX_L_W_OPSIZE, /* 6302 */ IC_VEX_L_W_OPSIZE, /* 6303 */ IC_VEX_L, /* 6304 */ IC_VEX_L, /* 6305 */ IC_VEX_L_XS, /* 6306 */ IC_VEX_L_XS, /* 6307 */ IC_VEX_L_XD, /* 6308 */ IC_VEX_L_XD, /* 6309 */ IC_VEX_L_XD, /* 6310 */ IC_VEX_L_XD, /* 6311 */ IC_VEX_L_W, /* 6312 */ IC_VEX_L_W, /* 6313 */ IC_VEX_L_W_XS, /* 6314 */ IC_VEX_L_W_XS, /* 6315 */ IC_VEX_L_W_XD, /* 6316 */ IC_VEX_L_W_XD, /* 6317 */ IC_VEX_L_W_XD, /* 6318 */ IC_VEX_L_W_XD, /* 6319 */ IC_VEX_L_OPSIZE, /* 6320 */ IC_VEX_L_OPSIZE, /* 6321 */ IC_VEX_L_OPSIZE, /* 6322 */ IC_VEX_L_OPSIZE, /* 6323 */ IC_VEX_L_OPSIZE, /* 6324 */ IC_VEX_L_OPSIZE, /* 6325 */ IC_VEX_L_OPSIZE, /* 6326 */ IC_VEX_L_OPSIZE, /* 6327 */ IC_VEX_L_W_OPSIZE, /* 6328 */ IC_VEX_L_W_OPSIZE, /* 6329 */ IC_VEX_L_W_OPSIZE, /* 6330 */ IC_VEX_L_W_OPSIZE, /* 6331 */ IC_VEX_L_W_OPSIZE, /* 6332 */ IC_VEX_L_W_OPSIZE, /* 6333 */ IC_VEX_L_W_OPSIZE, /* 6334 */ IC_VEX_L_W_OPSIZE, /* 6335 */ IC_VEX_L, /* 6336 */ IC_VEX_L, /* 6337 */ IC_VEX_L_XS, /* 6338 */ IC_VEX_L_XS, /* 6339 */ IC_VEX_L_XD, /* 6340 */ IC_VEX_L_XD, /* 6341 */ IC_VEX_L_XD, /* 6342 */ IC_VEX_L_XD, /* 6343 */ IC_VEX_L_W, /* 6344 */ IC_VEX_L_W, /* 6345 */ IC_VEX_L_W_XS, /* 6346 */ IC_VEX_L_W_XS, /* 6347 */ IC_VEX_L_W_XD, /* 6348 */ IC_VEX_L_W_XD, /* 6349 */ IC_VEX_L_W_XD, /* 6350 */ IC_VEX_L_W_XD, /* 6351 */ IC_VEX_L_OPSIZE, /* 6352 */ IC_VEX_L_OPSIZE, /* 6353 */ IC_VEX_L_OPSIZE, /* 6354 */ IC_VEX_L_OPSIZE, /* 6355 */ IC_VEX_L_OPSIZE, /* 6356 */ IC_VEX_L_OPSIZE, /* 6357 */ IC_VEX_L_OPSIZE, /* 6358 */ IC_VEX_L_OPSIZE, /* 6359 */ IC_VEX_L_W_OPSIZE, /* 6360 */ IC_VEX_L_W_OPSIZE, /* 6361 */ IC_VEX_L_W_OPSIZE, /* 6362 */ IC_VEX_L_W_OPSIZE, /* 6363 */ IC_VEX_L_W_OPSIZE, /* 6364 */ IC_VEX_L_W_OPSIZE, /* 6365 */ IC_VEX_L_W_OPSIZE, /* 6366 */ IC_VEX_L_W_OPSIZE, /* 6367 */ IC_VEX_L, /* 6368 */ IC_VEX_L, /* 6369 */ IC_VEX_L_XS, /* 6370 */ IC_VEX_L_XS, /* 6371 */ IC_VEX_L_XD, /* 6372 */ IC_VEX_L_XD, /* 6373 */ IC_VEX_L_XD, /* 6374 */ IC_VEX_L_XD, /* 6375 */ IC_VEX_L_W, /* 6376 */ IC_VEX_L_W, /* 6377 */ IC_VEX_L_W_XS, /* 6378 */ IC_VEX_L_W_XS, /* 6379 */ IC_VEX_L_W_XD, /* 6380 */ IC_VEX_L_W_XD, /* 6381 */ IC_VEX_L_W_XD, /* 6382 */ IC_VEX_L_W_XD, /* 6383 */ IC_VEX_L_OPSIZE, /* 6384 */ IC_VEX_L_OPSIZE, /* 6385 */ IC_VEX_L_OPSIZE, /* 6386 */ IC_VEX_L_OPSIZE, /* 6387 */ IC_VEX_L_OPSIZE, /* 6388 */ IC_VEX_L_OPSIZE, /* 6389 */ IC_VEX_L_OPSIZE, /* 6390 */ IC_VEX_L_OPSIZE, /* 6391 */ IC_VEX_L_W_OPSIZE, /* 6392 */ IC_VEX_L_W_OPSIZE, /* 6393 */ IC_VEX_L_W_OPSIZE, /* 6394 */ IC_VEX_L_W_OPSIZE, /* 6395 */ IC_VEX_L_W_OPSIZE, /* 6396 */ IC_VEX_L_W_OPSIZE, /* 6397 */ IC_VEX_L_W_OPSIZE, /* 6398 */ IC_VEX_L_W_OPSIZE, /* 6399 */ IC_EVEX_KZ, /* 6400 */ IC_EVEX_KZ, /* 6401 */ IC_EVEX_XS_KZ, /* 6402 */ IC_EVEX_XS_KZ, /* 6403 */ IC_EVEX_XD_KZ, /* 6404 */ IC_EVEX_XD_KZ, /* 6405 */ IC_EVEX_XD_KZ, /* 6406 */ IC_EVEX_XD_KZ, /* 6407 */ IC_EVEX_W_KZ, /* 6408 */ IC_EVEX_W_KZ, /* 6409 */ IC_EVEX_W_XS_KZ, /* 6410 */ IC_EVEX_W_XS_KZ, /* 6411 */ IC_EVEX_W_XD_KZ, /* 6412 */ IC_EVEX_W_XD_KZ, /* 6413 */ IC_EVEX_W_XD_KZ, /* 6414 */ IC_EVEX_W_XD_KZ, /* 6415 */ IC_EVEX_OPSIZE_KZ, /* 6416 */ IC_EVEX_OPSIZE_KZ, /* 6417 */ IC_EVEX_OPSIZE_KZ, /* 6418 */ IC_EVEX_OPSIZE_KZ, /* 6419 */ IC_EVEX_OPSIZE_KZ, /* 6420 */ IC_EVEX_OPSIZE_KZ, /* 6421 */ IC_EVEX_OPSIZE_KZ, /* 6422 */ IC_EVEX_OPSIZE_KZ, /* 6423 */ IC_EVEX_W_OPSIZE_KZ, /* 6424 */ IC_EVEX_W_OPSIZE_KZ, /* 6425 */ IC_EVEX_W_OPSIZE_KZ, /* 6426 */ IC_EVEX_W_OPSIZE_KZ, /* 6427 */ IC_EVEX_W_OPSIZE_KZ, /* 6428 */ IC_EVEX_W_OPSIZE_KZ, /* 6429 */ IC_EVEX_W_OPSIZE_KZ, /* 6430 */ IC_EVEX_W_OPSIZE_KZ, /* 6431 */ IC_EVEX_KZ, /* 6432 */ IC_EVEX_KZ, /* 6433 */ IC_EVEX_XS_KZ, /* 6434 */ IC_EVEX_XS_KZ, /* 6435 */ IC_EVEX_XD_KZ, /* 6436 */ IC_EVEX_XD_KZ, /* 6437 */ IC_EVEX_XD_KZ, /* 6438 */ IC_EVEX_XD_KZ, /* 6439 */ IC_EVEX_W_KZ, /* 6440 */ IC_EVEX_W_KZ, /* 6441 */ IC_EVEX_W_XS_KZ, /* 6442 */ IC_EVEX_W_XS_KZ, /* 6443 */ IC_EVEX_W_XD_KZ, /* 6444 */ IC_EVEX_W_XD_KZ, /* 6445 */ IC_EVEX_W_XD_KZ, /* 6446 */ IC_EVEX_W_XD_KZ, /* 6447 */ IC_EVEX_OPSIZE_KZ, /* 6448 */ IC_EVEX_OPSIZE_KZ, /* 6449 */ IC_EVEX_OPSIZE_KZ, /* 6450 */ IC_EVEX_OPSIZE_KZ, /* 6451 */ IC_EVEX_OPSIZE_KZ, /* 6452 */ IC_EVEX_OPSIZE_KZ, /* 6453 */ IC_EVEX_OPSIZE_KZ, /* 6454 */ IC_EVEX_OPSIZE_KZ, /* 6455 */ IC_EVEX_W_OPSIZE_KZ, /* 6456 */ IC_EVEX_W_OPSIZE_KZ, /* 6457 */ IC_EVEX_W_OPSIZE_KZ, /* 6458 */ IC_EVEX_W_OPSIZE_KZ, /* 6459 */ IC_EVEX_W_OPSIZE_KZ, /* 6460 */ IC_EVEX_W_OPSIZE_KZ, /* 6461 */ IC_EVEX_W_OPSIZE_KZ, /* 6462 */ IC_EVEX_W_OPSIZE_KZ, /* 6463 */ IC_EVEX_KZ, /* 6464 */ IC_EVEX_KZ, /* 6465 */ IC_EVEX_XS_KZ, /* 6466 */ IC_EVEX_XS_KZ, /* 6467 */ IC_EVEX_XD_KZ, /* 6468 */ IC_EVEX_XD_KZ, /* 6469 */ IC_EVEX_XD_KZ, /* 6470 */ IC_EVEX_XD_KZ, /* 6471 */ IC_EVEX_W_KZ, /* 6472 */ IC_EVEX_W_KZ, /* 6473 */ IC_EVEX_W_XS_KZ, /* 6474 */ IC_EVEX_W_XS_KZ, /* 6475 */ IC_EVEX_W_XD_KZ, /* 6476 */ IC_EVEX_W_XD_KZ, /* 6477 */ IC_EVEX_W_XD_KZ, /* 6478 */ IC_EVEX_W_XD_KZ, /* 6479 */ IC_EVEX_OPSIZE_KZ, /* 6480 */ IC_EVEX_OPSIZE_KZ, /* 6481 */ IC_EVEX_OPSIZE_KZ, /* 6482 */ IC_EVEX_OPSIZE_KZ, /* 6483 */ IC_EVEX_OPSIZE_KZ, /* 6484 */ IC_EVEX_OPSIZE_KZ, /* 6485 */ IC_EVEX_OPSIZE_KZ, /* 6486 */ IC_EVEX_OPSIZE_KZ, /* 6487 */ IC_EVEX_W_OPSIZE_KZ, /* 6488 */ IC_EVEX_W_OPSIZE_KZ, /* 6489 */ IC_EVEX_W_OPSIZE_KZ, /* 6490 */ IC_EVEX_W_OPSIZE_KZ, /* 6491 */ IC_EVEX_W_OPSIZE_KZ, /* 6492 */ IC_EVEX_W_OPSIZE_KZ, /* 6493 */ IC_EVEX_W_OPSIZE_KZ, /* 6494 */ IC_EVEX_W_OPSIZE_KZ, /* 6495 */ IC_EVEX_KZ, /* 6496 */ IC_EVEX_KZ, /* 6497 */ IC_EVEX_XS_KZ, /* 6498 */ IC_EVEX_XS_KZ, /* 6499 */ IC_EVEX_XD_KZ, /* 6500 */ IC_EVEX_XD_KZ, /* 6501 */ IC_EVEX_XD_KZ, /* 6502 */ IC_EVEX_XD_KZ, /* 6503 */ IC_EVEX_W_KZ, /* 6504 */ IC_EVEX_W_KZ, /* 6505 */ IC_EVEX_W_XS_KZ, /* 6506 */ IC_EVEX_W_XS_KZ, /* 6507 */ IC_EVEX_W_XD_KZ, /* 6508 */ IC_EVEX_W_XD_KZ, /* 6509 */ IC_EVEX_W_XD_KZ, /* 6510 */ IC_EVEX_W_XD_KZ, /* 6511 */ IC_EVEX_OPSIZE_KZ, /* 6512 */ IC_EVEX_OPSIZE_KZ, /* 6513 */ IC_EVEX_OPSIZE_KZ, /* 6514 */ IC_EVEX_OPSIZE_KZ, /* 6515 */ IC_EVEX_OPSIZE_KZ, /* 6516 */ IC_EVEX_OPSIZE_KZ, /* 6517 */ IC_EVEX_OPSIZE_KZ, /* 6518 */ IC_EVEX_OPSIZE_KZ, /* 6519 */ IC_EVEX_W_OPSIZE_KZ, /* 6520 */ IC_EVEX_W_OPSIZE_KZ, /* 6521 */ IC_EVEX_W_OPSIZE_KZ, /* 6522 */ IC_EVEX_W_OPSIZE_KZ, /* 6523 */ IC_EVEX_W_OPSIZE_KZ, /* 6524 */ IC_EVEX_W_OPSIZE_KZ, /* 6525 */ IC_EVEX_W_OPSIZE_KZ, /* 6526 */ IC_EVEX_W_OPSIZE_KZ, /* 6527 */ IC_EVEX_KZ, /* 6528 */ IC_EVEX_KZ, /* 6529 */ IC_EVEX_XS_KZ, /* 6530 */ IC_EVEX_XS_KZ, /* 6531 */ IC_EVEX_XD_KZ, /* 6532 */ IC_EVEX_XD_KZ, /* 6533 */ IC_EVEX_XD_KZ, /* 6534 */ IC_EVEX_XD_KZ, /* 6535 */ IC_EVEX_W_KZ, /* 6536 */ IC_EVEX_W_KZ, /* 6537 */ IC_EVEX_W_XS_KZ, /* 6538 */ IC_EVEX_W_XS_KZ, /* 6539 */ IC_EVEX_W_XD_KZ, /* 6540 */ IC_EVEX_W_XD_KZ, /* 6541 */ IC_EVEX_W_XD_KZ, /* 6542 */ IC_EVEX_W_XD_KZ, /* 6543 */ IC_EVEX_OPSIZE_KZ, /* 6544 */ IC_EVEX_OPSIZE_KZ, /* 6545 */ IC_EVEX_OPSIZE_KZ, /* 6546 */ IC_EVEX_OPSIZE_KZ, /* 6547 */ IC_EVEX_OPSIZE_KZ, /* 6548 */ IC_EVEX_OPSIZE_KZ, /* 6549 */ IC_EVEX_OPSIZE_KZ, /* 6550 */ IC_EVEX_OPSIZE_KZ, /* 6551 */ IC_EVEX_W_OPSIZE_KZ, /* 6552 */ IC_EVEX_W_OPSIZE_KZ, /* 6553 */ IC_EVEX_W_OPSIZE_KZ, /* 6554 */ IC_EVEX_W_OPSIZE_KZ, /* 6555 */ IC_EVEX_W_OPSIZE_KZ, /* 6556 */ IC_EVEX_W_OPSIZE_KZ, /* 6557 */ IC_EVEX_W_OPSIZE_KZ, /* 6558 */ IC_EVEX_W_OPSIZE_KZ, /* 6559 */ IC_EVEX_KZ, /* 6560 */ IC_EVEX_KZ, /* 6561 */ IC_EVEX_XS_KZ, /* 6562 */ IC_EVEX_XS_KZ, /* 6563 */ IC_EVEX_XD_KZ, /* 6564 */ IC_EVEX_XD_KZ, /* 6565 */ IC_EVEX_XD_KZ, /* 6566 */ IC_EVEX_XD_KZ, /* 6567 */ IC_EVEX_W_KZ, /* 6568 */ IC_EVEX_W_KZ, /* 6569 */ IC_EVEX_W_XS_KZ, /* 6570 */ IC_EVEX_W_XS_KZ, /* 6571 */ IC_EVEX_W_XD_KZ, /* 6572 */ IC_EVEX_W_XD_KZ, /* 6573 */ IC_EVEX_W_XD_KZ, /* 6574 */ IC_EVEX_W_XD_KZ, /* 6575 */ IC_EVEX_OPSIZE_KZ, /* 6576 */ IC_EVEX_OPSIZE_KZ, /* 6577 */ IC_EVEX_OPSIZE_KZ, /* 6578 */ IC_EVEX_OPSIZE_KZ, /* 6579 */ IC_EVEX_OPSIZE_KZ, /* 6580 */ IC_EVEX_OPSIZE_KZ, /* 6581 */ IC_EVEX_OPSIZE_KZ, /* 6582 */ IC_EVEX_OPSIZE_KZ, /* 6583 */ IC_EVEX_W_OPSIZE_KZ, /* 6584 */ IC_EVEX_W_OPSIZE_KZ, /* 6585 */ IC_EVEX_W_OPSIZE_KZ, /* 6586 */ IC_EVEX_W_OPSIZE_KZ, /* 6587 */ IC_EVEX_W_OPSIZE_KZ, /* 6588 */ IC_EVEX_W_OPSIZE_KZ, /* 6589 */ IC_EVEX_W_OPSIZE_KZ, /* 6590 */ IC_EVEX_W_OPSIZE_KZ, /* 6591 */ IC_EVEX_KZ, /* 6592 */ IC_EVEX_KZ, /* 6593 */ IC_EVEX_XS_KZ, /* 6594 */ IC_EVEX_XS_KZ, /* 6595 */ IC_EVEX_XD_KZ, /* 6596 */ IC_EVEX_XD_KZ, /* 6597 */ IC_EVEX_XD_KZ, /* 6598 */ IC_EVEX_XD_KZ, /* 6599 */ IC_EVEX_W_KZ, /* 6600 */ IC_EVEX_W_KZ, /* 6601 */ IC_EVEX_W_XS_KZ, /* 6602 */ IC_EVEX_W_XS_KZ, /* 6603 */ IC_EVEX_W_XD_KZ, /* 6604 */ IC_EVEX_W_XD_KZ, /* 6605 */ IC_EVEX_W_XD_KZ, /* 6606 */ IC_EVEX_W_XD_KZ, /* 6607 */ IC_EVEX_OPSIZE_KZ, /* 6608 */ IC_EVEX_OPSIZE_KZ, /* 6609 */ IC_EVEX_OPSIZE_KZ, /* 6610 */ IC_EVEX_OPSIZE_KZ, /* 6611 */ IC_EVEX_OPSIZE_KZ, /* 6612 */ IC_EVEX_OPSIZE_KZ, /* 6613 */ IC_EVEX_OPSIZE_KZ, /* 6614 */ IC_EVEX_OPSIZE_KZ, /* 6615 */ IC_EVEX_W_OPSIZE_KZ, /* 6616 */ IC_EVEX_W_OPSIZE_KZ, /* 6617 */ IC_EVEX_W_OPSIZE_KZ, /* 6618 */ IC_EVEX_W_OPSIZE_KZ, /* 6619 */ IC_EVEX_W_OPSIZE_KZ, /* 6620 */ IC_EVEX_W_OPSIZE_KZ, /* 6621 */ IC_EVEX_W_OPSIZE_KZ, /* 6622 */ IC_EVEX_W_OPSIZE_KZ, /* 6623 */ IC_EVEX_KZ, /* 6624 */ IC_EVEX_KZ, /* 6625 */ IC_EVEX_XS_KZ, /* 6626 */ IC_EVEX_XS_KZ, /* 6627 */ IC_EVEX_XD_KZ, /* 6628 */ IC_EVEX_XD_KZ, /* 6629 */ IC_EVEX_XD_KZ, /* 6630 */ IC_EVEX_XD_KZ, /* 6631 */ IC_EVEX_W_KZ, /* 6632 */ IC_EVEX_W_KZ, /* 6633 */ IC_EVEX_W_XS_KZ, /* 6634 */ IC_EVEX_W_XS_KZ, /* 6635 */ IC_EVEX_W_XD_KZ, /* 6636 */ IC_EVEX_W_XD_KZ, /* 6637 */ IC_EVEX_W_XD_KZ, /* 6638 */ IC_EVEX_W_XD_KZ, /* 6639 */ IC_EVEX_OPSIZE_KZ, /* 6640 */ IC_EVEX_OPSIZE_KZ, /* 6641 */ IC_EVEX_OPSIZE_KZ, /* 6642 */ IC_EVEX_OPSIZE_KZ, /* 6643 */ IC_EVEX_OPSIZE_KZ, /* 6644 */ IC_EVEX_OPSIZE_KZ, /* 6645 */ IC_EVEX_OPSIZE_KZ, /* 6646 */ IC_EVEX_OPSIZE_KZ, /* 6647 */ IC_EVEX_W_OPSIZE_KZ, /* 6648 */ IC_EVEX_W_OPSIZE_KZ, /* 6649 */ IC_EVEX_W_OPSIZE_KZ, /* 6650 */ IC_EVEX_W_OPSIZE_KZ, /* 6651 */ IC_EVEX_W_OPSIZE_KZ, /* 6652 */ IC_EVEX_W_OPSIZE_KZ, /* 6653 */ IC_EVEX_W_OPSIZE_KZ, /* 6654 */ IC_EVEX_W_OPSIZE_KZ, /* 6655 */ IC, /* 6656 */ IC_64BIT, /* 6657 */ IC_XS, /* 6658 */ IC_64BIT_XS, /* 6659 */ IC_XD, /* 6660 */ IC_64BIT_XD, /* 6661 */ IC_XS, /* 6662 */ IC_64BIT_XS, /* 6663 */ IC, /* 6664 */ IC_64BIT_REXW, /* 6665 */ IC_XS, /* 6666 */ IC_64BIT_REXW_XS, /* 6667 */ IC_XD, /* 6668 */ IC_64BIT_REXW_XD, /* 6669 */ IC_XS, /* 6670 */ IC_64BIT_REXW_XS, /* 6671 */ IC_OPSIZE, /* 6672 */ IC_64BIT_OPSIZE, /* 6673 */ IC_XS_OPSIZE, /* 6674 */ IC_64BIT_XS_OPSIZE, /* 6675 */ IC_XD_OPSIZE, /* 6676 */ IC_64BIT_XD_OPSIZE, /* 6677 */ IC_XS_OPSIZE, /* 6678 */ IC_64BIT_XD_OPSIZE, /* 6679 */ IC_OPSIZE, /* 6680 */ IC_64BIT_REXW_OPSIZE, /* 6681 */ IC_XS_OPSIZE, /* 6682 */ IC_64BIT_REXW_XS, /* 6683 */ IC_XD_OPSIZE, /* 6684 */ IC_64BIT_REXW_XD, /* 6685 */ IC_XS_OPSIZE, /* 6686 */ IC_64BIT_REXW_XS, /* 6687 */ IC_ADSIZE, /* 6688 */ IC_64BIT_ADSIZE, /* 6689 */ IC_XS, /* 6690 */ IC_64BIT_XS, /* 6691 */ IC_XD, /* 6692 */ IC_64BIT_XD, /* 6693 */ IC_XS, /* 6694 */ IC_64BIT_XS, /* 6695 */ IC_ADSIZE, /* 6696 */ IC_64BIT_REXW_ADSIZE, /* 6697 */ IC_XS, /* 6698 */ IC_64BIT_REXW_XS, /* 6699 */ IC_XD, /* 6700 */ IC_64BIT_REXW_XD, /* 6701 */ IC_XS, /* 6702 */ IC_64BIT_REXW_XS, /* 6703 */ IC_OPSIZE_ADSIZE, /* 6704 */ IC_64BIT_OPSIZE_ADSIZE, /* 6705 */ IC_XS_OPSIZE, /* 6706 */ IC_64BIT_XS_OPSIZE, /* 6707 */ IC_XD_OPSIZE, /* 6708 */ IC_64BIT_XD_OPSIZE, /* 6709 */ IC_XS_OPSIZE, /* 6710 */ IC_64BIT_XD_OPSIZE, /* 6711 */ IC_OPSIZE_ADSIZE, /* 6712 */ IC_64BIT_REXW_OPSIZE, /* 6713 */ IC_XS_OPSIZE, /* 6714 */ IC_64BIT_REXW_XS, /* 6715 */ IC_XD_OPSIZE, /* 6716 */ IC_64BIT_REXW_XD, /* 6717 */ IC_XS_OPSIZE, /* 6718 */ IC_64BIT_REXW_XS, /* 6719 */ IC_VEX, /* 6720 */ IC_VEX, /* 6721 */ IC_VEX_XS, /* 6722 */ IC_VEX_XS, /* 6723 */ IC_VEX_XD, /* 6724 */ IC_VEX_XD, /* 6725 */ IC_VEX_XD, /* 6726 */ IC_VEX_XD, /* 6727 */ IC_VEX_W, /* 6728 */ IC_VEX_W, /* 6729 */ IC_VEX_W_XS, /* 6730 */ IC_VEX_W_XS, /* 6731 */ IC_VEX_W_XD, /* 6732 */ IC_VEX_W_XD, /* 6733 */ IC_VEX_W_XD, /* 6734 */ IC_VEX_W_XD, /* 6735 */ IC_VEX_OPSIZE, /* 6736 */ IC_VEX_OPSIZE, /* 6737 */ IC_VEX_OPSIZE, /* 6738 */ IC_VEX_OPSIZE, /* 6739 */ IC_VEX_OPSIZE, /* 6740 */ IC_VEX_OPSIZE, /* 6741 */ IC_VEX_OPSIZE, /* 6742 */ IC_VEX_OPSIZE, /* 6743 */ IC_VEX_W_OPSIZE, /* 6744 */ IC_VEX_W_OPSIZE, /* 6745 */ IC_VEX_W_OPSIZE, /* 6746 */ IC_VEX_W_OPSIZE, /* 6747 */ IC_VEX_W_OPSIZE, /* 6748 */ IC_VEX_W_OPSIZE, /* 6749 */ IC_VEX_W_OPSIZE, /* 6750 */ IC_VEX_W_OPSIZE, /* 6751 */ IC_VEX, /* 6752 */ IC_VEX, /* 6753 */ IC_VEX_XS, /* 6754 */ IC_VEX_XS, /* 6755 */ IC_VEX_XD, /* 6756 */ IC_VEX_XD, /* 6757 */ IC_VEX_XD, /* 6758 */ IC_VEX_XD, /* 6759 */ IC_VEX_W, /* 6760 */ IC_VEX_W, /* 6761 */ IC_VEX_W_XS, /* 6762 */ IC_VEX_W_XS, /* 6763 */ IC_VEX_W_XD, /* 6764 */ IC_VEX_W_XD, /* 6765 */ IC_VEX_W_XD, /* 6766 */ IC_VEX_W_XD, /* 6767 */ IC_VEX_OPSIZE, /* 6768 */ IC_VEX_OPSIZE, /* 6769 */ IC_VEX_OPSIZE, /* 6770 */ IC_VEX_OPSIZE, /* 6771 */ IC_VEX_OPSIZE, /* 6772 */ IC_VEX_OPSIZE, /* 6773 */ IC_VEX_OPSIZE, /* 6774 */ IC_VEX_OPSIZE, /* 6775 */ IC_VEX_W_OPSIZE, /* 6776 */ IC_VEX_W_OPSIZE, /* 6777 */ IC_VEX_W_OPSIZE, /* 6778 */ IC_VEX_W_OPSIZE, /* 6779 */ IC_VEX_W_OPSIZE, /* 6780 */ IC_VEX_W_OPSIZE, /* 6781 */ IC_VEX_W_OPSIZE, /* 6782 */ IC_VEX_W_OPSIZE, /* 6783 */ IC_VEX_L, /* 6784 */ IC_VEX_L, /* 6785 */ IC_VEX_L_XS, /* 6786 */ IC_VEX_L_XS, /* 6787 */ IC_VEX_L_XD, /* 6788 */ IC_VEX_L_XD, /* 6789 */ IC_VEX_L_XD, /* 6790 */ IC_VEX_L_XD, /* 6791 */ IC_VEX_L_W, /* 6792 */ IC_VEX_L_W, /* 6793 */ IC_VEX_L_W_XS, /* 6794 */ IC_VEX_L_W_XS, /* 6795 */ IC_VEX_L_W_XD, /* 6796 */ IC_VEX_L_W_XD, /* 6797 */ IC_VEX_L_W_XD, /* 6798 */ IC_VEX_L_W_XD, /* 6799 */ IC_VEX_L_OPSIZE, /* 6800 */ IC_VEX_L_OPSIZE, /* 6801 */ IC_VEX_L_OPSIZE, /* 6802 */ IC_VEX_L_OPSIZE, /* 6803 */ IC_VEX_L_OPSIZE, /* 6804 */ IC_VEX_L_OPSIZE, /* 6805 */ IC_VEX_L_OPSIZE, /* 6806 */ IC_VEX_L_OPSIZE, /* 6807 */ IC_VEX_L_W_OPSIZE, /* 6808 */ IC_VEX_L_W_OPSIZE, /* 6809 */ IC_VEX_L_W_OPSIZE, /* 6810 */ IC_VEX_L_W_OPSIZE, /* 6811 */ IC_VEX_L_W_OPSIZE, /* 6812 */ IC_VEX_L_W_OPSIZE, /* 6813 */ IC_VEX_L_W_OPSIZE, /* 6814 */ IC_VEX_L_W_OPSIZE, /* 6815 */ IC_VEX_L, /* 6816 */ IC_VEX_L, /* 6817 */ IC_VEX_L_XS, /* 6818 */ IC_VEX_L_XS, /* 6819 */ IC_VEX_L_XD, /* 6820 */ IC_VEX_L_XD, /* 6821 */ IC_VEX_L_XD, /* 6822 */ IC_VEX_L_XD, /* 6823 */ IC_VEX_L_W, /* 6824 */ IC_VEX_L_W, /* 6825 */ IC_VEX_L_W_XS, /* 6826 */ IC_VEX_L_W_XS, /* 6827 */ IC_VEX_L_W_XD, /* 6828 */ IC_VEX_L_W_XD, /* 6829 */ IC_VEX_L_W_XD, /* 6830 */ IC_VEX_L_W_XD, /* 6831 */ IC_VEX_L_OPSIZE, /* 6832 */ IC_VEX_L_OPSIZE, /* 6833 */ IC_VEX_L_OPSIZE, /* 6834 */ IC_VEX_L_OPSIZE, /* 6835 */ IC_VEX_L_OPSIZE, /* 6836 */ IC_VEX_L_OPSIZE, /* 6837 */ IC_VEX_L_OPSIZE, /* 6838 */ IC_VEX_L_OPSIZE, /* 6839 */ IC_VEX_L_W_OPSIZE, /* 6840 */ IC_VEX_L_W_OPSIZE, /* 6841 */ IC_VEX_L_W_OPSIZE, /* 6842 */ IC_VEX_L_W_OPSIZE, /* 6843 */ IC_VEX_L_W_OPSIZE, /* 6844 */ IC_VEX_L_W_OPSIZE, /* 6845 */ IC_VEX_L_W_OPSIZE, /* 6846 */ IC_VEX_L_W_OPSIZE, /* 6847 */ IC_VEX_L, /* 6848 */ IC_VEX_L, /* 6849 */ IC_VEX_L_XS, /* 6850 */ IC_VEX_L_XS, /* 6851 */ IC_VEX_L_XD, /* 6852 */ IC_VEX_L_XD, /* 6853 */ IC_VEX_L_XD, /* 6854 */ IC_VEX_L_XD, /* 6855 */ IC_VEX_L_W, /* 6856 */ IC_VEX_L_W, /* 6857 */ IC_VEX_L_W_XS, /* 6858 */ IC_VEX_L_W_XS, /* 6859 */ IC_VEX_L_W_XD, /* 6860 */ IC_VEX_L_W_XD, /* 6861 */ IC_VEX_L_W_XD, /* 6862 */ IC_VEX_L_W_XD, /* 6863 */ IC_VEX_L_OPSIZE, /* 6864 */ IC_VEX_L_OPSIZE, /* 6865 */ IC_VEX_L_OPSIZE, /* 6866 */ IC_VEX_L_OPSIZE, /* 6867 */ IC_VEX_L_OPSIZE, /* 6868 */ IC_VEX_L_OPSIZE, /* 6869 */ IC_VEX_L_OPSIZE, /* 6870 */ IC_VEX_L_OPSIZE, /* 6871 */ IC_VEX_L_W_OPSIZE, /* 6872 */ IC_VEX_L_W_OPSIZE, /* 6873 */ IC_VEX_L_W_OPSIZE, /* 6874 */ IC_VEX_L_W_OPSIZE, /* 6875 */ IC_VEX_L_W_OPSIZE, /* 6876 */ IC_VEX_L_W_OPSIZE, /* 6877 */ IC_VEX_L_W_OPSIZE, /* 6878 */ IC_VEX_L_W_OPSIZE, /* 6879 */ IC_VEX_L, /* 6880 */ IC_VEX_L, /* 6881 */ IC_VEX_L_XS, /* 6882 */ IC_VEX_L_XS, /* 6883 */ IC_VEX_L_XD, /* 6884 */ IC_VEX_L_XD, /* 6885 */ IC_VEX_L_XD, /* 6886 */ IC_VEX_L_XD, /* 6887 */ IC_VEX_L_W, /* 6888 */ IC_VEX_L_W, /* 6889 */ IC_VEX_L_W_XS, /* 6890 */ IC_VEX_L_W_XS, /* 6891 */ IC_VEX_L_W_XD, /* 6892 */ IC_VEX_L_W_XD, /* 6893 */ IC_VEX_L_W_XD, /* 6894 */ IC_VEX_L_W_XD, /* 6895 */ IC_VEX_L_OPSIZE, /* 6896 */ IC_VEX_L_OPSIZE, /* 6897 */ IC_VEX_L_OPSIZE, /* 6898 */ IC_VEX_L_OPSIZE, /* 6899 */ IC_VEX_L_OPSIZE, /* 6900 */ IC_VEX_L_OPSIZE, /* 6901 */ IC_VEX_L_OPSIZE, /* 6902 */ IC_VEX_L_OPSIZE, /* 6903 */ IC_VEX_L_W_OPSIZE, /* 6904 */ IC_VEX_L_W_OPSIZE, /* 6905 */ IC_VEX_L_W_OPSIZE, /* 6906 */ IC_VEX_L_W_OPSIZE, /* 6907 */ IC_VEX_L_W_OPSIZE, /* 6908 */ IC_VEX_L_W_OPSIZE, /* 6909 */ IC_VEX_L_W_OPSIZE, /* 6910 */ IC_VEX_L_W_OPSIZE, /* 6911 */ IC_EVEX_L_KZ, /* 6912 */ IC_EVEX_L_KZ, /* 6913 */ IC_EVEX_L_XS_KZ, /* 6914 */ IC_EVEX_L_XS_KZ, /* 6915 */ IC_EVEX_L_XD_KZ, /* 6916 */ IC_EVEX_L_XD_KZ, /* 6917 */ IC_EVEX_L_XD_KZ, /* 6918 */ IC_EVEX_L_XD_KZ, /* 6919 */ IC_EVEX_L_W_KZ, /* 6920 */ IC_EVEX_L_W_KZ, /* 6921 */ IC_EVEX_L_W_XS_KZ, /* 6922 */ IC_EVEX_L_W_XS_KZ, /* 6923 */ IC_EVEX_L_W_XD_KZ, /* 6924 */ IC_EVEX_L_W_XD_KZ, /* 6925 */ IC_EVEX_L_W_XD_KZ, /* 6926 */ IC_EVEX_L_W_XD_KZ, /* 6927 */ IC_EVEX_L_OPSIZE_KZ, /* 6928 */ IC_EVEX_L_OPSIZE_KZ, /* 6929 */ IC_EVEX_L_OPSIZE_KZ, /* 6930 */ IC_EVEX_L_OPSIZE_KZ, /* 6931 */ IC_EVEX_L_OPSIZE_KZ, /* 6932 */ IC_EVEX_L_OPSIZE_KZ, /* 6933 */ IC_EVEX_L_OPSIZE_KZ, /* 6934 */ IC_EVEX_L_OPSIZE_KZ, /* 6935 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6936 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6937 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6938 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6939 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6940 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6941 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6942 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6943 */ IC_EVEX_L_KZ, /* 6944 */ IC_EVEX_L_KZ, /* 6945 */ IC_EVEX_L_XS_KZ, /* 6946 */ IC_EVEX_L_XS_KZ, /* 6947 */ IC_EVEX_L_XD_KZ, /* 6948 */ IC_EVEX_L_XD_KZ, /* 6949 */ IC_EVEX_L_XD_KZ, /* 6950 */ IC_EVEX_L_XD_KZ, /* 6951 */ IC_EVEX_L_W_KZ, /* 6952 */ IC_EVEX_L_W_KZ, /* 6953 */ IC_EVEX_L_W_XS_KZ, /* 6954 */ IC_EVEX_L_W_XS_KZ, /* 6955 */ IC_EVEX_L_W_XD_KZ, /* 6956 */ IC_EVEX_L_W_XD_KZ, /* 6957 */ IC_EVEX_L_W_XD_KZ, /* 6958 */ IC_EVEX_L_W_XD_KZ, /* 6959 */ IC_EVEX_L_OPSIZE_KZ, /* 6960 */ IC_EVEX_L_OPSIZE_KZ, /* 6961 */ IC_EVEX_L_OPSIZE_KZ, /* 6962 */ IC_EVEX_L_OPSIZE_KZ, /* 6963 */ IC_EVEX_L_OPSIZE_KZ, /* 6964 */ IC_EVEX_L_OPSIZE_KZ, /* 6965 */ IC_EVEX_L_OPSIZE_KZ, /* 6966 */ IC_EVEX_L_OPSIZE_KZ, /* 6967 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6968 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6969 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6970 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6971 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6972 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6973 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6974 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6975 */ IC_EVEX_L_KZ, /* 6976 */ IC_EVEX_L_KZ, /* 6977 */ IC_EVEX_L_XS_KZ, /* 6978 */ IC_EVEX_L_XS_KZ, /* 6979 */ IC_EVEX_L_XD_KZ, /* 6980 */ IC_EVEX_L_XD_KZ, /* 6981 */ IC_EVEX_L_XD_KZ, /* 6982 */ IC_EVEX_L_XD_KZ, /* 6983 */ IC_EVEX_L_W_KZ, /* 6984 */ IC_EVEX_L_W_KZ, /* 6985 */ IC_EVEX_L_W_XS_KZ, /* 6986 */ IC_EVEX_L_W_XS_KZ, /* 6987 */ IC_EVEX_L_W_XD_KZ, /* 6988 */ IC_EVEX_L_W_XD_KZ, /* 6989 */ IC_EVEX_L_W_XD_KZ, /* 6990 */ IC_EVEX_L_W_XD_KZ, /* 6991 */ IC_EVEX_L_OPSIZE_KZ, /* 6992 */ IC_EVEX_L_OPSIZE_KZ, /* 6993 */ IC_EVEX_L_OPSIZE_KZ, /* 6994 */ IC_EVEX_L_OPSIZE_KZ, /* 6995 */ IC_EVEX_L_OPSIZE_KZ, /* 6996 */ IC_EVEX_L_OPSIZE_KZ, /* 6997 */ IC_EVEX_L_OPSIZE_KZ, /* 6998 */ IC_EVEX_L_OPSIZE_KZ, /* 6999 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7000 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7001 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7002 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7003 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7004 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7005 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7006 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7007 */ IC_EVEX_L_KZ, /* 7008 */ IC_EVEX_L_KZ, /* 7009 */ IC_EVEX_L_XS_KZ, /* 7010 */ IC_EVEX_L_XS_KZ, /* 7011 */ IC_EVEX_L_XD_KZ, /* 7012 */ IC_EVEX_L_XD_KZ, /* 7013 */ IC_EVEX_L_XD_KZ, /* 7014 */ IC_EVEX_L_XD_KZ, /* 7015 */ IC_EVEX_L_W_KZ, /* 7016 */ IC_EVEX_L_W_KZ, /* 7017 */ IC_EVEX_L_W_XS_KZ, /* 7018 */ IC_EVEX_L_W_XS_KZ, /* 7019 */ IC_EVEX_L_W_XD_KZ, /* 7020 */ IC_EVEX_L_W_XD_KZ, /* 7021 */ IC_EVEX_L_W_XD_KZ, /* 7022 */ IC_EVEX_L_W_XD_KZ, /* 7023 */ IC_EVEX_L_OPSIZE_KZ, /* 7024 */ IC_EVEX_L_OPSIZE_KZ, /* 7025 */ IC_EVEX_L_OPSIZE_KZ, /* 7026 */ IC_EVEX_L_OPSIZE_KZ, /* 7027 */ IC_EVEX_L_OPSIZE_KZ, /* 7028 */ IC_EVEX_L_OPSIZE_KZ, /* 7029 */ IC_EVEX_L_OPSIZE_KZ, /* 7030 */ IC_EVEX_L_OPSIZE_KZ, /* 7031 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7032 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7033 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7034 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7035 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7036 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7037 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7038 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7039 */ IC_EVEX_L_KZ, /* 7040 */ IC_EVEX_L_KZ, /* 7041 */ IC_EVEX_L_XS_KZ, /* 7042 */ IC_EVEX_L_XS_KZ, /* 7043 */ IC_EVEX_L_XD_KZ, /* 7044 */ IC_EVEX_L_XD_KZ, /* 7045 */ IC_EVEX_L_XD_KZ, /* 7046 */ IC_EVEX_L_XD_KZ, /* 7047 */ IC_EVEX_L_W_KZ, /* 7048 */ IC_EVEX_L_W_KZ, /* 7049 */ IC_EVEX_L_W_XS_KZ, /* 7050 */ IC_EVEX_L_W_XS_KZ, /* 7051 */ IC_EVEX_L_W_XD_KZ, /* 7052 */ IC_EVEX_L_W_XD_KZ, /* 7053 */ IC_EVEX_L_W_XD_KZ, /* 7054 */ IC_EVEX_L_W_XD_KZ, /* 7055 */ IC_EVEX_L_OPSIZE_KZ, /* 7056 */ IC_EVEX_L_OPSIZE_KZ, /* 7057 */ IC_EVEX_L_OPSIZE_KZ, /* 7058 */ IC_EVEX_L_OPSIZE_KZ, /* 7059 */ IC_EVEX_L_OPSIZE_KZ, /* 7060 */ IC_EVEX_L_OPSIZE_KZ, /* 7061 */ IC_EVEX_L_OPSIZE_KZ, /* 7062 */ IC_EVEX_L_OPSIZE_KZ, /* 7063 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7064 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7065 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7066 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7067 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7068 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7069 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7070 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7071 */ IC_EVEX_L_KZ, /* 7072 */ IC_EVEX_L_KZ, /* 7073 */ IC_EVEX_L_XS_KZ, /* 7074 */ IC_EVEX_L_XS_KZ, /* 7075 */ IC_EVEX_L_XD_KZ, /* 7076 */ IC_EVEX_L_XD_KZ, /* 7077 */ IC_EVEX_L_XD_KZ, /* 7078 */ IC_EVEX_L_XD_KZ, /* 7079 */ IC_EVEX_L_W_KZ, /* 7080 */ IC_EVEX_L_W_KZ, /* 7081 */ IC_EVEX_L_W_XS_KZ, /* 7082 */ IC_EVEX_L_W_XS_KZ, /* 7083 */ IC_EVEX_L_W_XD_KZ, /* 7084 */ IC_EVEX_L_W_XD_KZ, /* 7085 */ IC_EVEX_L_W_XD_KZ, /* 7086 */ IC_EVEX_L_W_XD_KZ, /* 7087 */ IC_EVEX_L_OPSIZE_KZ, /* 7088 */ IC_EVEX_L_OPSIZE_KZ, /* 7089 */ IC_EVEX_L_OPSIZE_KZ, /* 7090 */ IC_EVEX_L_OPSIZE_KZ, /* 7091 */ IC_EVEX_L_OPSIZE_KZ, /* 7092 */ IC_EVEX_L_OPSIZE_KZ, /* 7093 */ IC_EVEX_L_OPSIZE_KZ, /* 7094 */ IC_EVEX_L_OPSIZE_KZ, /* 7095 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7096 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7097 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7098 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7099 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7100 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7101 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7102 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7103 */ IC_EVEX_L_KZ, /* 7104 */ IC_EVEX_L_KZ, /* 7105 */ IC_EVEX_L_XS_KZ, /* 7106 */ IC_EVEX_L_XS_KZ, /* 7107 */ IC_EVEX_L_XD_KZ, /* 7108 */ IC_EVEX_L_XD_KZ, /* 7109 */ IC_EVEX_L_XD_KZ, /* 7110 */ IC_EVEX_L_XD_KZ, /* 7111 */ IC_EVEX_L_W_KZ, /* 7112 */ IC_EVEX_L_W_KZ, /* 7113 */ IC_EVEX_L_W_XS_KZ, /* 7114 */ IC_EVEX_L_W_XS_KZ, /* 7115 */ IC_EVEX_L_W_XD_KZ, /* 7116 */ IC_EVEX_L_W_XD_KZ, /* 7117 */ IC_EVEX_L_W_XD_KZ, /* 7118 */ IC_EVEX_L_W_XD_KZ, /* 7119 */ IC_EVEX_L_OPSIZE_KZ, /* 7120 */ IC_EVEX_L_OPSIZE_KZ, /* 7121 */ IC_EVEX_L_OPSIZE_KZ, /* 7122 */ IC_EVEX_L_OPSIZE_KZ, /* 7123 */ IC_EVEX_L_OPSIZE_KZ, /* 7124 */ IC_EVEX_L_OPSIZE_KZ, /* 7125 */ IC_EVEX_L_OPSIZE_KZ, /* 7126 */ IC_EVEX_L_OPSIZE_KZ, /* 7127 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7128 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7129 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7130 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7131 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7132 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7133 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7134 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7135 */ IC_EVEX_L_KZ, /* 7136 */ IC_EVEX_L_KZ, /* 7137 */ IC_EVEX_L_XS_KZ, /* 7138 */ IC_EVEX_L_XS_KZ, /* 7139 */ IC_EVEX_L_XD_KZ, /* 7140 */ IC_EVEX_L_XD_KZ, /* 7141 */ IC_EVEX_L_XD_KZ, /* 7142 */ IC_EVEX_L_XD_KZ, /* 7143 */ IC_EVEX_L_W_KZ, /* 7144 */ IC_EVEX_L_W_KZ, /* 7145 */ IC_EVEX_L_W_XS_KZ, /* 7146 */ IC_EVEX_L_W_XS_KZ, /* 7147 */ IC_EVEX_L_W_XD_KZ, /* 7148 */ IC_EVEX_L_W_XD_KZ, /* 7149 */ IC_EVEX_L_W_XD_KZ, /* 7150 */ IC_EVEX_L_W_XD_KZ, /* 7151 */ IC_EVEX_L_OPSIZE_KZ, /* 7152 */ IC_EVEX_L_OPSIZE_KZ, /* 7153 */ IC_EVEX_L_OPSIZE_KZ, /* 7154 */ IC_EVEX_L_OPSIZE_KZ, /* 7155 */ IC_EVEX_L_OPSIZE_KZ, /* 7156 */ IC_EVEX_L_OPSIZE_KZ, /* 7157 */ IC_EVEX_L_OPSIZE_KZ, /* 7158 */ IC_EVEX_L_OPSIZE_KZ, /* 7159 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7160 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7161 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7162 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7163 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7164 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7165 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7166 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7167 */ IC, /* 7168 */ IC_64BIT, /* 7169 */ IC_XS, /* 7170 */ IC_64BIT_XS, /* 7171 */ IC_XD, /* 7172 */ IC_64BIT_XD, /* 7173 */ IC_XS, /* 7174 */ IC_64BIT_XS, /* 7175 */ IC, /* 7176 */ IC_64BIT_REXW, /* 7177 */ IC_XS, /* 7178 */ IC_64BIT_REXW_XS, /* 7179 */ IC_XD, /* 7180 */ IC_64BIT_REXW_XD, /* 7181 */ IC_XS, /* 7182 */ IC_64BIT_REXW_XS, /* 7183 */ IC_OPSIZE, /* 7184 */ IC_64BIT_OPSIZE, /* 7185 */ IC_XS_OPSIZE, /* 7186 */ IC_64BIT_XS_OPSIZE, /* 7187 */ IC_XD_OPSIZE, /* 7188 */ IC_64BIT_XD_OPSIZE, /* 7189 */ IC_XS_OPSIZE, /* 7190 */ IC_64BIT_XD_OPSIZE, /* 7191 */ IC_OPSIZE, /* 7192 */ IC_64BIT_REXW_OPSIZE, /* 7193 */ IC_XS_OPSIZE, /* 7194 */ IC_64BIT_REXW_XS, /* 7195 */ IC_XD_OPSIZE, /* 7196 */ IC_64BIT_REXW_XD, /* 7197 */ IC_XS_OPSIZE, /* 7198 */ IC_64BIT_REXW_XS, /* 7199 */ IC_ADSIZE, /* 7200 */ IC_64BIT_ADSIZE, /* 7201 */ IC_XS, /* 7202 */ IC_64BIT_XS, /* 7203 */ IC_XD, /* 7204 */ IC_64BIT_XD, /* 7205 */ IC_XS, /* 7206 */ IC_64BIT_XS, /* 7207 */ IC_ADSIZE, /* 7208 */ IC_64BIT_REXW_ADSIZE, /* 7209 */ IC_XS, /* 7210 */ IC_64BIT_REXW_XS, /* 7211 */ IC_XD, /* 7212 */ IC_64BIT_REXW_XD, /* 7213 */ IC_XS, /* 7214 */ IC_64BIT_REXW_XS, /* 7215 */ IC_OPSIZE_ADSIZE, /* 7216 */ IC_64BIT_OPSIZE_ADSIZE, /* 7217 */ IC_XS_OPSIZE, /* 7218 */ IC_64BIT_XS_OPSIZE, /* 7219 */ IC_XD_OPSIZE, /* 7220 */ IC_64BIT_XD_OPSIZE, /* 7221 */ IC_XS_OPSIZE, /* 7222 */ IC_64BIT_XD_OPSIZE, /* 7223 */ IC_OPSIZE_ADSIZE, /* 7224 */ IC_64BIT_REXW_OPSIZE, /* 7225 */ IC_XS_OPSIZE, /* 7226 */ IC_64BIT_REXW_XS, /* 7227 */ IC_XD_OPSIZE, /* 7228 */ IC_64BIT_REXW_XD, /* 7229 */ IC_XS_OPSIZE, /* 7230 */ IC_64BIT_REXW_XS, /* 7231 */ IC_VEX, /* 7232 */ IC_VEX, /* 7233 */ IC_VEX_XS, /* 7234 */ IC_VEX_XS, /* 7235 */ IC_VEX_XD, /* 7236 */ IC_VEX_XD, /* 7237 */ IC_VEX_XD, /* 7238 */ IC_VEX_XD, /* 7239 */ IC_VEX_W, /* 7240 */ IC_VEX_W, /* 7241 */ IC_VEX_W_XS, /* 7242 */ IC_VEX_W_XS, /* 7243 */ IC_VEX_W_XD, /* 7244 */ IC_VEX_W_XD, /* 7245 */ IC_VEX_W_XD, /* 7246 */ IC_VEX_W_XD, /* 7247 */ IC_VEX_OPSIZE, /* 7248 */ IC_VEX_OPSIZE, /* 7249 */ IC_VEX_OPSIZE, /* 7250 */ IC_VEX_OPSIZE, /* 7251 */ IC_VEX_OPSIZE, /* 7252 */ IC_VEX_OPSIZE, /* 7253 */ IC_VEX_OPSIZE, /* 7254 */ IC_VEX_OPSIZE, /* 7255 */ IC_VEX_W_OPSIZE, /* 7256 */ IC_VEX_W_OPSIZE, /* 7257 */ IC_VEX_W_OPSIZE, /* 7258 */ IC_VEX_W_OPSIZE, /* 7259 */ IC_VEX_W_OPSIZE, /* 7260 */ IC_VEX_W_OPSIZE, /* 7261 */ IC_VEX_W_OPSIZE, /* 7262 */ IC_VEX_W_OPSIZE, /* 7263 */ IC_VEX, /* 7264 */ IC_VEX, /* 7265 */ IC_VEX_XS, /* 7266 */ IC_VEX_XS, /* 7267 */ IC_VEX_XD, /* 7268 */ IC_VEX_XD, /* 7269 */ IC_VEX_XD, /* 7270 */ IC_VEX_XD, /* 7271 */ IC_VEX_W, /* 7272 */ IC_VEX_W, /* 7273 */ IC_VEX_W_XS, /* 7274 */ IC_VEX_W_XS, /* 7275 */ IC_VEX_W_XD, /* 7276 */ IC_VEX_W_XD, /* 7277 */ IC_VEX_W_XD, /* 7278 */ IC_VEX_W_XD, /* 7279 */ IC_VEX_OPSIZE, /* 7280 */ IC_VEX_OPSIZE, /* 7281 */ IC_VEX_OPSIZE, /* 7282 */ IC_VEX_OPSIZE, /* 7283 */ IC_VEX_OPSIZE, /* 7284 */ IC_VEX_OPSIZE, /* 7285 */ IC_VEX_OPSIZE, /* 7286 */ IC_VEX_OPSIZE, /* 7287 */ IC_VEX_W_OPSIZE, /* 7288 */ IC_VEX_W_OPSIZE, /* 7289 */ IC_VEX_W_OPSIZE, /* 7290 */ IC_VEX_W_OPSIZE, /* 7291 */ IC_VEX_W_OPSIZE, /* 7292 */ IC_VEX_W_OPSIZE, /* 7293 */ IC_VEX_W_OPSIZE, /* 7294 */ IC_VEX_W_OPSIZE, /* 7295 */ IC_VEX_L, /* 7296 */ IC_VEX_L, /* 7297 */ IC_VEX_L_XS, /* 7298 */ IC_VEX_L_XS, /* 7299 */ IC_VEX_L_XD, /* 7300 */ IC_VEX_L_XD, /* 7301 */ IC_VEX_L_XD, /* 7302 */ IC_VEX_L_XD, /* 7303 */ IC_VEX_L_W, /* 7304 */ IC_VEX_L_W, /* 7305 */ IC_VEX_L_W_XS, /* 7306 */ IC_VEX_L_W_XS, /* 7307 */ IC_VEX_L_W_XD, /* 7308 */ IC_VEX_L_W_XD, /* 7309 */ IC_VEX_L_W_XD, /* 7310 */ IC_VEX_L_W_XD, /* 7311 */ IC_VEX_L_OPSIZE, /* 7312 */ IC_VEX_L_OPSIZE, /* 7313 */ IC_VEX_L_OPSIZE, /* 7314 */ IC_VEX_L_OPSIZE, /* 7315 */ IC_VEX_L_OPSIZE, /* 7316 */ IC_VEX_L_OPSIZE, /* 7317 */ IC_VEX_L_OPSIZE, /* 7318 */ IC_VEX_L_OPSIZE, /* 7319 */ IC_VEX_L_W_OPSIZE, /* 7320 */ IC_VEX_L_W_OPSIZE, /* 7321 */ IC_VEX_L_W_OPSIZE, /* 7322 */ IC_VEX_L_W_OPSIZE, /* 7323 */ IC_VEX_L_W_OPSIZE, /* 7324 */ IC_VEX_L_W_OPSIZE, /* 7325 */ IC_VEX_L_W_OPSIZE, /* 7326 */ IC_VEX_L_W_OPSIZE, /* 7327 */ IC_VEX_L, /* 7328 */ IC_VEX_L, /* 7329 */ IC_VEX_L_XS, /* 7330 */ IC_VEX_L_XS, /* 7331 */ IC_VEX_L_XD, /* 7332 */ IC_VEX_L_XD, /* 7333 */ IC_VEX_L_XD, /* 7334 */ IC_VEX_L_XD, /* 7335 */ IC_VEX_L_W, /* 7336 */ IC_VEX_L_W, /* 7337 */ IC_VEX_L_W_XS, /* 7338 */ IC_VEX_L_W_XS, /* 7339 */ IC_VEX_L_W_XD, /* 7340 */ IC_VEX_L_W_XD, /* 7341 */ IC_VEX_L_W_XD, /* 7342 */ IC_VEX_L_W_XD, /* 7343 */ IC_VEX_L_OPSIZE, /* 7344 */ IC_VEX_L_OPSIZE, /* 7345 */ IC_VEX_L_OPSIZE, /* 7346 */ IC_VEX_L_OPSIZE, /* 7347 */ IC_VEX_L_OPSIZE, /* 7348 */ IC_VEX_L_OPSIZE, /* 7349 */ IC_VEX_L_OPSIZE, /* 7350 */ IC_VEX_L_OPSIZE, /* 7351 */ IC_VEX_L_W_OPSIZE, /* 7352 */ IC_VEX_L_W_OPSIZE, /* 7353 */ IC_VEX_L_W_OPSIZE, /* 7354 */ IC_VEX_L_W_OPSIZE, /* 7355 */ IC_VEX_L_W_OPSIZE, /* 7356 */ IC_VEX_L_W_OPSIZE, /* 7357 */ IC_VEX_L_W_OPSIZE, /* 7358 */ IC_VEX_L_W_OPSIZE, /* 7359 */ IC_VEX_L, /* 7360 */ IC_VEX_L, /* 7361 */ IC_VEX_L_XS, /* 7362 */ IC_VEX_L_XS, /* 7363 */ IC_VEX_L_XD, /* 7364 */ IC_VEX_L_XD, /* 7365 */ IC_VEX_L_XD, /* 7366 */ IC_VEX_L_XD, /* 7367 */ IC_VEX_L_W, /* 7368 */ IC_VEX_L_W, /* 7369 */ IC_VEX_L_W_XS, /* 7370 */ IC_VEX_L_W_XS, /* 7371 */ IC_VEX_L_W_XD, /* 7372 */ IC_VEX_L_W_XD, /* 7373 */ IC_VEX_L_W_XD, /* 7374 */ IC_VEX_L_W_XD, /* 7375 */ IC_VEX_L_OPSIZE, /* 7376 */ IC_VEX_L_OPSIZE, /* 7377 */ IC_VEX_L_OPSIZE, /* 7378 */ IC_VEX_L_OPSIZE, /* 7379 */ IC_VEX_L_OPSIZE, /* 7380 */ IC_VEX_L_OPSIZE, /* 7381 */ IC_VEX_L_OPSIZE, /* 7382 */ IC_VEX_L_OPSIZE, /* 7383 */ IC_VEX_L_W_OPSIZE, /* 7384 */ IC_VEX_L_W_OPSIZE, /* 7385 */ IC_VEX_L_W_OPSIZE, /* 7386 */ IC_VEX_L_W_OPSIZE, /* 7387 */ IC_VEX_L_W_OPSIZE, /* 7388 */ IC_VEX_L_W_OPSIZE, /* 7389 */ IC_VEX_L_W_OPSIZE, /* 7390 */ IC_VEX_L_W_OPSIZE, /* 7391 */ IC_VEX_L, /* 7392 */ IC_VEX_L, /* 7393 */ IC_VEX_L_XS, /* 7394 */ IC_VEX_L_XS, /* 7395 */ IC_VEX_L_XD, /* 7396 */ IC_VEX_L_XD, /* 7397 */ IC_VEX_L_XD, /* 7398 */ IC_VEX_L_XD, /* 7399 */ IC_VEX_L_W, /* 7400 */ IC_VEX_L_W, /* 7401 */ IC_VEX_L_W_XS, /* 7402 */ IC_VEX_L_W_XS, /* 7403 */ IC_VEX_L_W_XD, /* 7404 */ IC_VEX_L_W_XD, /* 7405 */ IC_VEX_L_W_XD, /* 7406 */ IC_VEX_L_W_XD, /* 7407 */ IC_VEX_L_OPSIZE, /* 7408 */ IC_VEX_L_OPSIZE, /* 7409 */ IC_VEX_L_OPSIZE, /* 7410 */ IC_VEX_L_OPSIZE, /* 7411 */ IC_VEX_L_OPSIZE, /* 7412 */ IC_VEX_L_OPSIZE, /* 7413 */ IC_VEX_L_OPSIZE, /* 7414 */ IC_VEX_L_OPSIZE, /* 7415 */ IC_VEX_L_W_OPSIZE, /* 7416 */ IC_VEX_L_W_OPSIZE, /* 7417 */ IC_VEX_L_W_OPSIZE, /* 7418 */ IC_VEX_L_W_OPSIZE, /* 7419 */ IC_VEX_L_W_OPSIZE, /* 7420 */ IC_VEX_L_W_OPSIZE, /* 7421 */ IC_VEX_L_W_OPSIZE, /* 7422 */ IC_VEX_L_W_OPSIZE, /* 7423 */ IC_EVEX_L2_KZ, /* 7424 */ IC_EVEX_L2_KZ, /* 7425 */ IC_EVEX_L2_XS_KZ, /* 7426 */ IC_EVEX_L2_XS_KZ, /* 7427 */ IC_EVEX_L2_XD_KZ, /* 7428 */ IC_EVEX_L2_XD_KZ, /* 7429 */ IC_EVEX_L2_XD_KZ, /* 7430 */ IC_EVEX_L2_XD_KZ, /* 7431 */ IC_EVEX_L2_W_KZ, /* 7432 */ IC_EVEX_L2_W_KZ, /* 7433 */ IC_EVEX_L2_W_XS_KZ, /* 7434 */ IC_EVEX_L2_W_XS_KZ, /* 7435 */ IC_EVEX_L2_W_XD_KZ, /* 7436 */ IC_EVEX_L2_W_XD_KZ, /* 7437 */ IC_EVEX_L2_W_XD_KZ, /* 7438 */ IC_EVEX_L2_W_XD_KZ, /* 7439 */ IC_EVEX_L2_OPSIZE_KZ, /* 7440 */ IC_EVEX_L2_OPSIZE_KZ, /* 7441 */ IC_EVEX_L2_OPSIZE_KZ, /* 7442 */ IC_EVEX_L2_OPSIZE_KZ, /* 7443 */ IC_EVEX_L2_OPSIZE_KZ, /* 7444 */ IC_EVEX_L2_OPSIZE_KZ, /* 7445 */ IC_EVEX_L2_OPSIZE_KZ, /* 7446 */ IC_EVEX_L2_OPSIZE_KZ, /* 7447 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7448 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7449 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7450 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7451 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7452 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7453 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7454 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7455 */ IC_EVEX_L2_KZ, /* 7456 */ IC_EVEX_L2_KZ, /* 7457 */ IC_EVEX_L2_XS_KZ, /* 7458 */ IC_EVEX_L2_XS_KZ, /* 7459 */ IC_EVEX_L2_XD_KZ, /* 7460 */ IC_EVEX_L2_XD_KZ, /* 7461 */ IC_EVEX_L2_XD_KZ, /* 7462 */ IC_EVEX_L2_XD_KZ, /* 7463 */ IC_EVEX_L2_W_KZ, /* 7464 */ IC_EVEX_L2_W_KZ, /* 7465 */ IC_EVEX_L2_W_XS_KZ, /* 7466 */ IC_EVEX_L2_W_XS_KZ, /* 7467 */ IC_EVEX_L2_W_XD_KZ, /* 7468 */ IC_EVEX_L2_W_XD_KZ, /* 7469 */ IC_EVEX_L2_W_XD_KZ, /* 7470 */ IC_EVEX_L2_W_XD_KZ, /* 7471 */ IC_EVEX_L2_OPSIZE_KZ, /* 7472 */ IC_EVEX_L2_OPSIZE_KZ, /* 7473 */ IC_EVEX_L2_OPSIZE_KZ, /* 7474 */ IC_EVEX_L2_OPSIZE_KZ, /* 7475 */ IC_EVEX_L2_OPSIZE_KZ, /* 7476 */ IC_EVEX_L2_OPSIZE_KZ, /* 7477 */ IC_EVEX_L2_OPSIZE_KZ, /* 7478 */ IC_EVEX_L2_OPSIZE_KZ, /* 7479 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7480 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7481 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7482 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7483 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7484 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7485 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7486 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7487 */ IC_EVEX_L2_KZ, /* 7488 */ IC_EVEX_L2_KZ, /* 7489 */ IC_EVEX_L2_XS_KZ, /* 7490 */ IC_EVEX_L2_XS_KZ, /* 7491 */ IC_EVEX_L2_XD_KZ, /* 7492 */ IC_EVEX_L2_XD_KZ, /* 7493 */ IC_EVEX_L2_XD_KZ, /* 7494 */ IC_EVEX_L2_XD_KZ, /* 7495 */ IC_EVEX_L2_W_KZ, /* 7496 */ IC_EVEX_L2_W_KZ, /* 7497 */ IC_EVEX_L2_W_XS_KZ, /* 7498 */ IC_EVEX_L2_W_XS_KZ, /* 7499 */ IC_EVEX_L2_W_XD_KZ, /* 7500 */ IC_EVEX_L2_W_XD_KZ, /* 7501 */ IC_EVEX_L2_W_XD_KZ, /* 7502 */ IC_EVEX_L2_W_XD_KZ, /* 7503 */ IC_EVEX_L2_OPSIZE_KZ, /* 7504 */ IC_EVEX_L2_OPSIZE_KZ, /* 7505 */ IC_EVEX_L2_OPSIZE_KZ, /* 7506 */ IC_EVEX_L2_OPSIZE_KZ, /* 7507 */ IC_EVEX_L2_OPSIZE_KZ, /* 7508 */ IC_EVEX_L2_OPSIZE_KZ, /* 7509 */ IC_EVEX_L2_OPSIZE_KZ, /* 7510 */ IC_EVEX_L2_OPSIZE_KZ, /* 7511 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7512 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7513 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7514 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7515 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7516 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7517 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7518 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7519 */ IC_EVEX_L2_KZ, /* 7520 */ IC_EVEX_L2_KZ, /* 7521 */ IC_EVEX_L2_XS_KZ, /* 7522 */ IC_EVEX_L2_XS_KZ, /* 7523 */ IC_EVEX_L2_XD_KZ, /* 7524 */ IC_EVEX_L2_XD_KZ, /* 7525 */ IC_EVEX_L2_XD_KZ, /* 7526 */ IC_EVEX_L2_XD_KZ, /* 7527 */ IC_EVEX_L2_W_KZ, /* 7528 */ IC_EVEX_L2_W_KZ, /* 7529 */ IC_EVEX_L2_W_XS_KZ, /* 7530 */ IC_EVEX_L2_W_XS_KZ, /* 7531 */ IC_EVEX_L2_W_XD_KZ, /* 7532 */ IC_EVEX_L2_W_XD_KZ, /* 7533 */ IC_EVEX_L2_W_XD_KZ, /* 7534 */ IC_EVEX_L2_W_XD_KZ, /* 7535 */ IC_EVEX_L2_OPSIZE_KZ, /* 7536 */ IC_EVEX_L2_OPSIZE_KZ, /* 7537 */ IC_EVEX_L2_OPSIZE_KZ, /* 7538 */ IC_EVEX_L2_OPSIZE_KZ, /* 7539 */ IC_EVEX_L2_OPSIZE_KZ, /* 7540 */ IC_EVEX_L2_OPSIZE_KZ, /* 7541 */ IC_EVEX_L2_OPSIZE_KZ, /* 7542 */ IC_EVEX_L2_OPSIZE_KZ, /* 7543 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7544 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7545 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7546 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7547 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7548 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7549 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7550 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7551 */ IC_EVEX_L2_KZ, /* 7552 */ IC_EVEX_L2_KZ, /* 7553 */ IC_EVEX_L2_XS_KZ, /* 7554 */ IC_EVEX_L2_XS_KZ, /* 7555 */ IC_EVEX_L2_XD_KZ, /* 7556 */ IC_EVEX_L2_XD_KZ, /* 7557 */ IC_EVEX_L2_XD_KZ, /* 7558 */ IC_EVEX_L2_XD_KZ, /* 7559 */ IC_EVEX_L2_W_KZ, /* 7560 */ IC_EVEX_L2_W_KZ, /* 7561 */ IC_EVEX_L2_W_XS_KZ, /* 7562 */ IC_EVEX_L2_W_XS_KZ, /* 7563 */ IC_EVEX_L2_W_XD_KZ, /* 7564 */ IC_EVEX_L2_W_XD_KZ, /* 7565 */ IC_EVEX_L2_W_XD_KZ, /* 7566 */ IC_EVEX_L2_W_XD_KZ, /* 7567 */ IC_EVEX_L2_OPSIZE_KZ, /* 7568 */ IC_EVEX_L2_OPSIZE_KZ, /* 7569 */ IC_EVEX_L2_OPSIZE_KZ, /* 7570 */ IC_EVEX_L2_OPSIZE_KZ, /* 7571 */ IC_EVEX_L2_OPSIZE_KZ, /* 7572 */ IC_EVEX_L2_OPSIZE_KZ, /* 7573 */ IC_EVEX_L2_OPSIZE_KZ, /* 7574 */ IC_EVEX_L2_OPSIZE_KZ, /* 7575 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7576 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7577 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7578 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7579 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7580 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7581 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7582 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7583 */ IC_EVEX_L2_KZ, /* 7584 */ IC_EVEX_L2_KZ, /* 7585 */ IC_EVEX_L2_XS_KZ, /* 7586 */ IC_EVEX_L2_XS_KZ, /* 7587 */ IC_EVEX_L2_XD_KZ, /* 7588 */ IC_EVEX_L2_XD_KZ, /* 7589 */ IC_EVEX_L2_XD_KZ, /* 7590 */ IC_EVEX_L2_XD_KZ, /* 7591 */ IC_EVEX_L2_W_KZ, /* 7592 */ IC_EVEX_L2_W_KZ, /* 7593 */ IC_EVEX_L2_W_XS_KZ, /* 7594 */ IC_EVEX_L2_W_XS_KZ, /* 7595 */ IC_EVEX_L2_W_XD_KZ, /* 7596 */ IC_EVEX_L2_W_XD_KZ, /* 7597 */ IC_EVEX_L2_W_XD_KZ, /* 7598 */ IC_EVEX_L2_W_XD_KZ, /* 7599 */ IC_EVEX_L2_OPSIZE_KZ, /* 7600 */ IC_EVEX_L2_OPSIZE_KZ, /* 7601 */ IC_EVEX_L2_OPSIZE_KZ, /* 7602 */ IC_EVEX_L2_OPSIZE_KZ, /* 7603 */ IC_EVEX_L2_OPSIZE_KZ, /* 7604 */ IC_EVEX_L2_OPSIZE_KZ, /* 7605 */ IC_EVEX_L2_OPSIZE_KZ, /* 7606 */ IC_EVEX_L2_OPSIZE_KZ, /* 7607 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7608 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7609 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7610 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7611 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7612 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7613 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7614 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7615 */ IC_EVEX_L2_KZ, /* 7616 */ IC_EVEX_L2_KZ, /* 7617 */ IC_EVEX_L2_XS_KZ, /* 7618 */ IC_EVEX_L2_XS_KZ, /* 7619 */ IC_EVEX_L2_XD_KZ, /* 7620 */ IC_EVEX_L2_XD_KZ, /* 7621 */ IC_EVEX_L2_XD_KZ, /* 7622 */ IC_EVEX_L2_XD_KZ, /* 7623 */ IC_EVEX_L2_W_KZ, /* 7624 */ IC_EVEX_L2_W_KZ, /* 7625 */ IC_EVEX_L2_W_XS_KZ, /* 7626 */ IC_EVEX_L2_W_XS_KZ, /* 7627 */ IC_EVEX_L2_W_XD_KZ, /* 7628 */ IC_EVEX_L2_W_XD_KZ, /* 7629 */ IC_EVEX_L2_W_XD_KZ, /* 7630 */ IC_EVEX_L2_W_XD_KZ, /* 7631 */ IC_EVEX_L2_OPSIZE_KZ, /* 7632 */ IC_EVEX_L2_OPSIZE_KZ, /* 7633 */ IC_EVEX_L2_OPSIZE_KZ, /* 7634 */ IC_EVEX_L2_OPSIZE_KZ, /* 7635 */ IC_EVEX_L2_OPSIZE_KZ, /* 7636 */ IC_EVEX_L2_OPSIZE_KZ, /* 7637 */ IC_EVEX_L2_OPSIZE_KZ, /* 7638 */ IC_EVEX_L2_OPSIZE_KZ, /* 7639 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7640 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7641 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7642 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7643 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7644 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7645 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7646 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7647 */ IC_EVEX_L2_KZ, /* 7648 */ IC_EVEX_L2_KZ, /* 7649 */ IC_EVEX_L2_XS_KZ, /* 7650 */ IC_EVEX_L2_XS_KZ, /* 7651 */ IC_EVEX_L2_XD_KZ, /* 7652 */ IC_EVEX_L2_XD_KZ, /* 7653 */ IC_EVEX_L2_XD_KZ, /* 7654 */ IC_EVEX_L2_XD_KZ, /* 7655 */ IC_EVEX_L2_W_KZ, /* 7656 */ IC_EVEX_L2_W_KZ, /* 7657 */ IC_EVEX_L2_W_XS_KZ, /* 7658 */ IC_EVEX_L2_W_XS_KZ, /* 7659 */ IC_EVEX_L2_W_XD_KZ, /* 7660 */ IC_EVEX_L2_W_XD_KZ, /* 7661 */ IC_EVEX_L2_W_XD_KZ, /* 7662 */ IC_EVEX_L2_W_XD_KZ, /* 7663 */ IC_EVEX_L2_OPSIZE_KZ, /* 7664 */ IC_EVEX_L2_OPSIZE_KZ, /* 7665 */ IC_EVEX_L2_OPSIZE_KZ, /* 7666 */ IC_EVEX_L2_OPSIZE_KZ, /* 7667 */ IC_EVEX_L2_OPSIZE_KZ, /* 7668 */ IC_EVEX_L2_OPSIZE_KZ, /* 7669 */ IC_EVEX_L2_OPSIZE_KZ, /* 7670 */ IC_EVEX_L2_OPSIZE_KZ, /* 7671 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7672 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7673 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7674 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7675 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7676 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7677 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7678 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7679 */ IC, /* 7680 */ IC_64BIT, /* 7681 */ IC_XS, /* 7682 */ IC_64BIT_XS, /* 7683 */ IC_XD, /* 7684 */ IC_64BIT_XD, /* 7685 */ IC_XS, /* 7686 */ IC_64BIT_XS, /* 7687 */ IC, /* 7688 */ IC_64BIT_REXW, /* 7689 */ IC_XS, /* 7690 */ IC_64BIT_REXW_XS, /* 7691 */ IC_XD, /* 7692 */ IC_64BIT_REXW_XD, /* 7693 */ IC_XS, /* 7694 */ IC_64BIT_REXW_XS, /* 7695 */ IC_OPSIZE, /* 7696 */ IC_64BIT_OPSIZE, /* 7697 */ IC_XS_OPSIZE, /* 7698 */ IC_64BIT_XS_OPSIZE, /* 7699 */ IC_XD_OPSIZE, /* 7700 */ IC_64BIT_XD_OPSIZE, /* 7701 */ IC_XS_OPSIZE, /* 7702 */ IC_64BIT_XD_OPSIZE, /* 7703 */ IC_OPSIZE, /* 7704 */ IC_64BIT_REXW_OPSIZE, /* 7705 */ IC_XS_OPSIZE, /* 7706 */ IC_64BIT_REXW_XS, /* 7707 */ IC_XD_OPSIZE, /* 7708 */ IC_64BIT_REXW_XD, /* 7709 */ IC_XS_OPSIZE, /* 7710 */ IC_64BIT_REXW_XS, /* 7711 */ IC_ADSIZE, /* 7712 */ IC_64BIT_ADSIZE, /* 7713 */ IC_XS, /* 7714 */ IC_64BIT_XS, /* 7715 */ IC_XD, /* 7716 */ IC_64BIT_XD, /* 7717 */ IC_XS, /* 7718 */ IC_64BIT_XS, /* 7719 */ IC_ADSIZE, /* 7720 */ IC_64BIT_REXW_ADSIZE, /* 7721 */ IC_XS, /* 7722 */ IC_64BIT_REXW_XS, /* 7723 */ IC_XD, /* 7724 */ IC_64BIT_REXW_XD, /* 7725 */ IC_XS, /* 7726 */ IC_64BIT_REXW_XS, /* 7727 */ IC_OPSIZE_ADSIZE, /* 7728 */ IC_64BIT_OPSIZE_ADSIZE, /* 7729 */ IC_XS_OPSIZE, /* 7730 */ IC_64BIT_XS_OPSIZE, /* 7731 */ IC_XD_OPSIZE, /* 7732 */ IC_64BIT_XD_OPSIZE, /* 7733 */ IC_XS_OPSIZE, /* 7734 */ IC_64BIT_XD_OPSIZE, /* 7735 */ IC_OPSIZE_ADSIZE, /* 7736 */ IC_64BIT_REXW_OPSIZE, /* 7737 */ IC_XS_OPSIZE, /* 7738 */ IC_64BIT_REXW_XS, /* 7739 */ IC_XD_OPSIZE, /* 7740 */ IC_64BIT_REXW_XD, /* 7741 */ IC_XS_OPSIZE, /* 7742 */ IC_64BIT_REXW_XS, /* 7743 */ IC_VEX, /* 7744 */ IC_VEX, /* 7745 */ IC_VEX_XS, /* 7746 */ IC_VEX_XS, /* 7747 */ IC_VEX_XD, /* 7748 */ IC_VEX_XD, /* 7749 */ IC_VEX_XD, /* 7750 */ IC_VEX_XD, /* 7751 */ IC_VEX_W, /* 7752 */ IC_VEX_W, /* 7753 */ IC_VEX_W_XS, /* 7754 */ IC_VEX_W_XS, /* 7755 */ IC_VEX_W_XD, /* 7756 */ IC_VEX_W_XD, /* 7757 */ IC_VEX_W_XD, /* 7758 */ IC_VEX_W_XD, /* 7759 */ IC_VEX_OPSIZE, /* 7760 */ IC_VEX_OPSIZE, /* 7761 */ IC_VEX_OPSIZE, /* 7762 */ IC_VEX_OPSIZE, /* 7763 */ IC_VEX_OPSIZE, /* 7764 */ IC_VEX_OPSIZE, /* 7765 */ IC_VEX_OPSIZE, /* 7766 */ IC_VEX_OPSIZE, /* 7767 */ IC_VEX_W_OPSIZE, /* 7768 */ IC_VEX_W_OPSIZE, /* 7769 */ IC_VEX_W_OPSIZE, /* 7770 */ IC_VEX_W_OPSIZE, /* 7771 */ IC_VEX_W_OPSIZE, /* 7772 */ IC_VEX_W_OPSIZE, /* 7773 */ IC_VEX_W_OPSIZE, /* 7774 */ IC_VEX_W_OPSIZE, /* 7775 */ IC_VEX, /* 7776 */ IC_VEX, /* 7777 */ IC_VEX_XS, /* 7778 */ IC_VEX_XS, /* 7779 */ IC_VEX_XD, /* 7780 */ IC_VEX_XD, /* 7781 */ IC_VEX_XD, /* 7782 */ IC_VEX_XD, /* 7783 */ IC_VEX_W, /* 7784 */ IC_VEX_W, /* 7785 */ IC_VEX_W_XS, /* 7786 */ IC_VEX_W_XS, /* 7787 */ IC_VEX_W_XD, /* 7788 */ IC_VEX_W_XD, /* 7789 */ IC_VEX_W_XD, /* 7790 */ IC_VEX_W_XD, /* 7791 */ IC_VEX_OPSIZE, /* 7792 */ IC_VEX_OPSIZE, /* 7793 */ IC_VEX_OPSIZE, /* 7794 */ IC_VEX_OPSIZE, /* 7795 */ IC_VEX_OPSIZE, /* 7796 */ IC_VEX_OPSIZE, /* 7797 */ IC_VEX_OPSIZE, /* 7798 */ IC_VEX_OPSIZE, /* 7799 */ IC_VEX_W_OPSIZE, /* 7800 */ IC_VEX_W_OPSIZE, /* 7801 */ IC_VEX_W_OPSIZE, /* 7802 */ IC_VEX_W_OPSIZE, /* 7803 */ IC_VEX_W_OPSIZE, /* 7804 */ IC_VEX_W_OPSIZE, /* 7805 */ IC_VEX_W_OPSIZE, /* 7806 */ IC_VEX_W_OPSIZE, /* 7807 */ IC_VEX_L, /* 7808 */ IC_VEX_L, /* 7809 */ IC_VEX_L_XS, /* 7810 */ IC_VEX_L_XS, /* 7811 */ IC_VEX_L_XD, /* 7812 */ IC_VEX_L_XD, /* 7813 */ IC_VEX_L_XD, /* 7814 */ IC_VEX_L_XD, /* 7815 */ IC_VEX_L_W, /* 7816 */ IC_VEX_L_W, /* 7817 */ IC_VEX_L_W_XS, /* 7818 */ IC_VEX_L_W_XS, /* 7819 */ IC_VEX_L_W_XD, /* 7820 */ IC_VEX_L_W_XD, /* 7821 */ IC_VEX_L_W_XD, /* 7822 */ IC_VEX_L_W_XD, /* 7823 */ IC_VEX_L_OPSIZE, /* 7824 */ IC_VEX_L_OPSIZE, /* 7825 */ IC_VEX_L_OPSIZE, /* 7826 */ IC_VEX_L_OPSIZE, /* 7827 */ IC_VEX_L_OPSIZE, /* 7828 */ IC_VEX_L_OPSIZE, /* 7829 */ IC_VEX_L_OPSIZE, /* 7830 */ IC_VEX_L_OPSIZE, /* 7831 */ IC_VEX_L_W_OPSIZE, /* 7832 */ IC_VEX_L_W_OPSIZE, /* 7833 */ IC_VEX_L_W_OPSIZE, /* 7834 */ IC_VEX_L_W_OPSIZE, /* 7835 */ IC_VEX_L_W_OPSIZE, /* 7836 */ IC_VEX_L_W_OPSIZE, /* 7837 */ IC_VEX_L_W_OPSIZE, /* 7838 */ IC_VEX_L_W_OPSIZE, /* 7839 */ IC_VEX_L, /* 7840 */ IC_VEX_L, /* 7841 */ IC_VEX_L_XS, /* 7842 */ IC_VEX_L_XS, /* 7843 */ IC_VEX_L_XD, /* 7844 */ IC_VEX_L_XD, /* 7845 */ IC_VEX_L_XD, /* 7846 */ IC_VEX_L_XD, /* 7847 */ IC_VEX_L_W, /* 7848 */ IC_VEX_L_W, /* 7849 */ IC_VEX_L_W_XS, /* 7850 */ IC_VEX_L_W_XS, /* 7851 */ IC_VEX_L_W_XD, /* 7852 */ IC_VEX_L_W_XD, /* 7853 */ IC_VEX_L_W_XD, /* 7854 */ IC_VEX_L_W_XD, /* 7855 */ IC_VEX_L_OPSIZE, /* 7856 */ IC_VEX_L_OPSIZE, /* 7857 */ IC_VEX_L_OPSIZE, /* 7858 */ IC_VEX_L_OPSIZE, /* 7859 */ IC_VEX_L_OPSIZE, /* 7860 */ IC_VEX_L_OPSIZE, /* 7861 */ IC_VEX_L_OPSIZE, /* 7862 */ IC_VEX_L_OPSIZE, /* 7863 */ IC_VEX_L_W_OPSIZE, /* 7864 */ IC_VEX_L_W_OPSIZE, /* 7865 */ IC_VEX_L_W_OPSIZE, /* 7866 */ IC_VEX_L_W_OPSIZE, /* 7867 */ IC_VEX_L_W_OPSIZE, /* 7868 */ IC_VEX_L_W_OPSIZE, /* 7869 */ IC_VEX_L_W_OPSIZE, /* 7870 */ IC_VEX_L_W_OPSIZE, /* 7871 */ IC_VEX_L, /* 7872 */ IC_VEX_L, /* 7873 */ IC_VEX_L_XS, /* 7874 */ IC_VEX_L_XS, /* 7875 */ IC_VEX_L_XD, /* 7876 */ IC_VEX_L_XD, /* 7877 */ IC_VEX_L_XD, /* 7878 */ IC_VEX_L_XD, /* 7879 */ IC_VEX_L_W, /* 7880 */ IC_VEX_L_W, /* 7881 */ IC_VEX_L_W_XS, /* 7882 */ IC_VEX_L_W_XS, /* 7883 */ IC_VEX_L_W_XD, /* 7884 */ IC_VEX_L_W_XD, /* 7885 */ IC_VEX_L_W_XD, /* 7886 */ IC_VEX_L_W_XD, /* 7887 */ IC_VEX_L_OPSIZE, /* 7888 */ IC_VEX_L_OPSIZE, /* 7889 */ IC_VEX_L_OPSIZE, /* 7890 */ IC_VEX_L_OPSIZE, /* 7891 */ IC_VEX_L_OPSIZE, /* 7892 */ IC_VEX_L_OPSIZE, /* 7893 */ IC_VEX_L_OPSIZE, /* 7894 */ IC_VEX_L_OPSIZE, /* 7895 */ IC_VEX_L_W_OPSIZE, /* 7896 */ IC_VEX_L_W_OPSIZE, /* 7897 */ IC_VEX_L_W_OPSIZE, /* 7898 */ IC_VEX_L_W_OPSIZE, /* 7899 */ IC_VEX_L_W_OPSIZE, /* 7900 */ IC_VEX_L_W_OPSIZE, /* 7901 */ IC_VEX_L_W_OPSIZE, /* 7902 */ IC_VEX_L_W_OPSIZE, /* 7903 */ IC_VEX_L, /* 7904 */ IC_VEX_L, /* 7905 */ IC_VEX_L_XS, /* 7906 */ IC_VEX_L_XS, /* 7907 */ IC_VEX_L_XD, /* 7908 */ IC_VEX_L_XD, /* 7909 */ IC_VEX_L_XD, /* 7910 */ IC_VEX_L_XD, /* 7911 */ IC_VEX_L_W, /* 7912 */ IC_VEX_L_W, /* 7913 */ IC_VEX_L_W_XS, /* 7914 */ IC_VEX_L_W_XS, /* 7915 */ IC_VEX_L_W_XD, /* 7916 */ IC_VEX_L_W_XD, /* 7917 */ IC_VEX_L_W_XD, /* 7918 */ IC_VEX_L_W_XD, /* 7919 */ IC_VEX_L_OPSIZE, /* 7920 */ IC_VEX_L_OPSIZE, /* 7921 */ IC_VEX_L_OPSIZE, /* 7922 */ IC_VEX_L_OPSIZE, /* 7923 */ IC_VEX_L_OPSIZE, /* 7924 */ IC_VEX_L_OPSIZE, /* 7925 */ IC_VEX_L_OPSIZE, /* 7926 */ IC_VEX_L_OPSIZE, /* 7927 */ IC_VEX_L_W_OPSIZE, /* 7928 */ IC_VEX_L_W_OPSIZE, /* 7929 */ IC_VEX_L_W_OPSIZE, /* 7930 */ IC_VEX_L_W_OPSIZE, /* 7931 */ IC_VEX_L_W_OPSIZE, /* 7932 */ IC_VEX_L_W_OPSIZE, /* 7933 */ IC_VEX_L_W_OPSIZE, /* 7934 */ IC_VEX_L_W_OPSIZE, /* 7935 */ IC_EVEX_L2_KZ, /* 7936 */ IC_EVEX_L2_KZ, /* 7937 */ IC_EVEX_L2_XS_KZ, /* 7938 */ IC_EVEX_L2_XS_KZ, /* 7939 */ IC_EVEX_L2_XD_KZ, /* 7940 */ IC_EVEX_L2_XD_KZ, /* 7941 */ IC_EVEX_L2_XD_KZ, /* 7942 */ IC_EVEX_L2_XD_KZ, /* 7943 */ IC_EVEX_L2_W_KZ, /* 7944 */ IC_EVEX_L2_W_KZ, /* 7945 */ IC_EVEX_L2_W_XS_KZ, /* 7946 */ IC_EVEX_L2_W_XS_KZ, /* 7947 */ IC_EVEX_L2_W_XD_KZ, /* 7948 */ IC_EVEX_L2_W_XD_KZ, /* 7949 */ IC_EVEX_L2_W_XD_KZ, /* 7950 */ IC_EVEX_L2_W_XD_KZ, /* 7951 */ IC_EVEX_L2_OPSIZE_KZ, /* 7952 */ IC_EVEX_L2_OPSIZE_KZ, /* 7953 */ IC_EVEX_L2_OPSIZE_KZ, /* 7954 */ IC_EVEX_L2_OPSIZE_KZ, /* 7955 */ IC_EVEX_L2_OPSIZE_KZ, /* 7956 */ IC_EVEX_L2_OPSIZE_KZ, /* 7957 */ IC_EVEX_L2_OPSIZE_KZ, /* 7958 */ IC_EVEX_L2_OPSIZE_KZ, /* 7959 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7960 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7961 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7962 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7963 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7964 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7965 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7966 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7967 */ IC_EVEX_L2_KZ, /* 7968 */ IC_EVEX_L2_KZ, /* 7969 */ IC_EVEX_L2_XS_KZ, /* 7970 */ IC_EVEX_L2_XS_KZ, /* 7971 */ IC_EVEX_L2_XD_KZ, /* 7972 */ IC_EVEX_L2_XD_KZ, /* 7973 */ IC_EVEX_L2_XD_KZ, /* 7974 */ IC_EVEX_L2_XD_KZ, /* 7975 */ IC_EVEX_L2_W_KZ, /* 7976 */ IC_EVEX_L2_W_KZ, /* 7977 */ IC_EVEX_L2_W_XS_KZ, /* 7978 */ IC_EVEX_L2_W_XS_KZ, /* 7979 */ IC_EVEX_L2_W_XD_KZ, /* 7980 */ IC_EVEX_L2_W_XD_KZ, /* 7981 */ IC_EVEX_L2_W_XD_KZ, /* 7982 */ IC_EVEX_L2_W_XD_KZ, /* 7983 */ IC_EVEX_L2_OPSIZE_KZ, /* 7984 */ IC_EVEX_L2_OPSIZE_KZ, /* 7985 */ IC_EVEX_L2_OPSIZE_KZ, /* 7986 */ IC_EVEX_L2_OPSIZE_KZ, /* 7987 */ IC_EVEX_L2_OPSIZE_KZ, /* 7988 */ IC_EVEX_L2_OPSIZE_KZ, /* 7989 */ IC_EVEX_L2_OPSIZE_KZ, /* 7990 */ IC_EVEX_L2_OPSIZE_KZ, /* 7991 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7992 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7993 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7994 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7995 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7996 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7997 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7998 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7999 */ IC_EVEX_L2_KZ, /* 8000 */ IC_EVEX_L2_KZ, /* 8001 */ IC_EVEX_L2_XS_KZ, /* 8002 */ IC_EVEX_L2_XS_KZ, /* 8003 */ IC_EVEX_L2_XD_KZ, /* 8004 */ IC_EVEX_L2_XD_KZ, /* 8005 */ IC_EVEX_L2_XD_KZ, /* 8006 */ IC_EVEX_L2_XD_KZ, /* 8007 */ IC_EVEX_L2_W_KZ, /* 8008 */ IC_EVEX_L2_W_KZ, /* 8009 */ IC_EVEX_L2_W_XS_KZ, /* 8010 */ IC_EVEX_L2_W_XS_KZ, /* 8011 */ IC_EVEX_L2_W_XD_KZ, /* 8012 */ IC_EVEX_L2_W_XD_KZ, /* 8013 */ IC_EVEX_L2_W_XD_KZ, /* 8014 */ IC_EVEX_L2_W_XD_KZ, /* 8015 */ IC_EVEX_L2_OPSIZE_KZ, /* 8016 */ IC_EVEX_L2_OPSIZE_KZ, /* 8017 */ IC_EVEX_L2_OPSIZE_KZ, /* 8018 */ IC_EVEX_L2_OPSIZE_KZ, /* 8019 */ IC_EVEX_L2_OPSIZE_KZ, /* 8020 */ IC_EVEX_L2_OPSIZE_KZ, /* 8021 */ IC_EVEX_L2_OPSIZE_KZ, /* 8022 */ IC_EVEX_L2_OPSIZE_KZ, /* 8023 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8024 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8025 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8026 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8027 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8028 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8029 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8030 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8031 */ IC_EVEX_L2_KZ, /* 8032 */ IC_EVEX_L2_KZ, /* 8033 */ IC_EVEX_L2_XS_KZ, /* 8034 */ IC_EVEX_L2_XS_KZ, /* 8035 */ IC_EVEX_L2_XD_KZ, /* 8036 */ IC_EVEX_L2_XD_KZ, /* 8037 */ IC_EVEX_L2_XD_KZ, /* 8038 */ IC_EVEX_L2_XD_KZ, /* 8039 */ IC_EVEX_L2_W_KZ, /* 8040 */ IC_EVEX_L2_W_KZ, /* 8041 */ IC_EVEX_L2_W_XS_KZ, /* 8042 */ IC_EVEX_L2_W_XS_KZ, /* 8043 */ IC_EVEX_L2_W_XD_KZ, /* 8044 */ IC_EVEX_L2_W_XD_KZ, /* 8045 */ IC_EVEX_L2_W_XD_KZ, /* 8046 */ IC_EVEX_L2_W_XD_KZ, /* 8047 */ IC_EVEX_L2_OPSIZE_KZ, /* 8048 */ IC_EVEX_L2_OPSIZE_KZ, /* 8049 */ IC_EVEX_L2_OPSIZE_KZ, /* 8050 */ IC_EVEX_L2_OPSIZE_KZ, /* 8051 */ IC_EVEX_L2_OPSIZE_KZ, /* 8052 */ IC_EVEX_L2_OPSIZE_KZ, /* 8053 */ IC_EVEX_L2_OPSIZE_KZ, /* 8054 */ IC_EVEX_L2_OPSIZE_KZ, /* 8055 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8056 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8057 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8058 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8059 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8060 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8061 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8062 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8063 */ IC_EVEX_L2_KZ, /* 8064 */ IC_EVEX_L2_KZ, /* 8065 */ IC_EVEX_L2_XS_KZ, /* 8066 */ IC_EVEX_L2_XS_KZ, /* 8067 */ IC_EVEX_L2_XD_KZ, /* 8068 */ IC_EVEX_L2_XD_KZ, /* 8069 */ IC_EVEX_L2_XD_KZ, /* 8070 */ IC_EVEX_L2_XD_KZ, /* 8071 */ IC_EVEX_L2_W_KZ, /* 8072 */ IC_EVEX_L2_W_KZ, /* 8073 */ IC_EVEX_L2_W_XS_KZ, /* 8074 */ IC_EVEX_L2_W_XS_KZ, /* 8075 */ IC_EVEX_L2_W_XD_KZ, /* 8076 */ IC_EVEX_L2_W_XD_KZ, /* 8077 */ IC_EVEX_L2_W_XD_KZ, /* 8078 */ IC_EVEX_L2_W_XD_KZ, /* 8079 */ IC_EVEX_L2_OPSIZE_KZ, /* 8080 */ IC_EVEX_L2_OPSIZE_KZ, /* 8081 */ IC_EVEX_L2_OPSIZE_KZ, /* 8082 */ IC_EVEX_L2_OPSIZE_KZ, /* 8083 */ IC_EVEX_L2_OPSIZE_KZ, /* 8084 */ IC_EVEX_L2_OPSIZE_KZ, /* 8085 */ IC_EVEX_L2_OPSIZE_KZ, /* 8086 */ IC_EVEX_L2_OPSIZE_KZ, /* 8087 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8088 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8089 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8090 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8091 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8092 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8093 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8094 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8095 */ IC_EVEX_L2_KZ, /* 8096 */ IC_EVEX_L2_KZ, /* 8097 */ IC_EVEX_L2_XS_KZ, /* 8098 */ IC_EVEX_L2_XS_KZ, /* 8099 */ IC_EVEX_L2_XD_KZ, /* 8100 */ IC_EVEX_L2_XD_KZ, /* 8101 */ IC_EVEX_L2_XD_KZ, /* 8102 */ IC_EVEX_L2_XD_KZ, /* 8103 */ IC_EVEX_L2_W_KZ, /* 8104 */ IC_EVEX_L2_W_KZ, /* 8105 */ IC_EVEX_L2_W_XS_KZ, /* 8106 */ IC_EVEX_L2_W_XS_KZ, /* 8107 */ IC_EVEX_L2_W_XD_KZ, /* 8108 */ IC_EVEX_L2_W_XD_KZ, /* 8109 */ IC_EVEX_L2_W_XD_KZ, /* 8110 */ IC_EVEX_L2_W_XD_KZ, /* 8111 */ IC_EVEX_L2_OPSIZE_KZ, /* 8112 */ IC_EVEX_L2_OPSIZE_KZ, /* 8113 */ IC_EVEX_L2_OPSIZE_KZ, /* 8114 */ IC_EVEX_L2_OPSIZE_KZ, /* 8115 */ IC_EVEX_L2_OPSIZE_KZ, /* 8116 */ IC_EVEX_L2_OPSIZE_KZ, /* 8117 */ IC_EVEX_L2_OPSIZE_KZ, /* 8118 */ IC_EVEX_L2_OPSIZE_KZ, /* 8119 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8120 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8121 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8122 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8123 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8124 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8125 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8126 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8127 */ IC_EVEX_L2_KZ, /* 8128 */ IC_EVEX_L2_KZ, /* 8129 */ IC_EVEX_L2_XS_KZ, /* 8130 */ IC_EVEX_L2_XS_KZ, /* 8131 */ IC_EVEX_L2_XD_KZ, /* 8132 */ IC_EVEX_L2_XD_KZ, /* 8133 */ IC_EVEX_L2_XD_KZ, /* 8134 */ IC_EVEX_L2_XD_KZ, /* 8135 */ IC_EVEX_L2_W_KZ, /* 8136 */ IC_EVEX_L2_W_KZ, /* 8137 */ IC_EVEX_L2_W_XS_KZ, /* 8138 */ IC_EVEX_L2_W_XS_KZ, /* 8139 */ IC_EVEX_L2_W_XD_KZ, /* 8140 */ IC_EVEX_L2_W_XD_KZ, /* 8141 */ IC_EVEX_L2_W_XD_KZ, /* 8142 */ IC_EVEX_L2_W_XD_KZ, /* 8143 */ IC_EVEX_L2_OPSIZE_KZ, /* 8144 */ IC_EVEX_L2_OPSIZE_KZ, /* 8145 */ IC_EVEX_L2_OPSIZE_KZ, /* 8146 */ IC_EVEX_L2_OPSIZE_KZ, /* 8147 */ IC_EVEX_L2_OPSIZE_KZ, /* 8148 */ IC_EVEX_L2_OPSIZE_KZ, /* 8149 */ IC_EVEX_L2_OPSIZE_KZ, /* 8150 */ IC_EVEX_L2_OPSIZE_KZ, /* 8151 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8152 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8153 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8154 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8155 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8156 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8157 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8158 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8159 */ IC_EVEX_L2_KZ, /* 8160 */ IC_EVEX_L2_KZ, /* 8161 */ IC_EVEX_L2_XS_KZ, /* 8162 */ IC_EVEX_L2_XS_KZ, /* 8163 */ IC_EVEX_L2_XD_KZ, /* 8164 */ IC_EVEX_L2_XD_KZ, /* 8165 */ IC_EVEX_L2_XD_KZ, /* 8166 */ IC_EVEX_L2_XD_KZ, /* 8167 */ IC_EVEX_L2_W_KZ, /* 8168 */ IC_EVEX_L2_W_KZ, /* 8169 */ IC_EVEX_L2_W_XS_KZ, /* 8170 */ IC_EVEX_L2_W_XS_KZ, /* 8171 */ IC_EVEX_L2_W_XD_KZ, /* 8172 */ IC_EVEX_L2_W_XD_KZ, /* 8173 */ IC_EVEX_L2_W_XD_KZ, /* 8174 */ IC_EVEX_L2_W_XD_KZ, /* 8175 */ IC_EVEX_L2_OPSIZE_KZ, /* 8176 */ IC_EVEX_L2_OPSIZE_KZ, /* 8177 */ IC_EVEX_L2_OPSIZE_KZ, /* 8178 */ IC_EVEX_L2_OPSIZE_KZ, /* 8179 */ IC_EVEX_L2_OPSIZE_KZ, /* 8180 */ IC_EVEX_L2_OPSIZE_KZ, /* 8181 */ IC_EVEX_L2_OPSIZE_KZ, /* 8182 */ IC_EVEX_L2_OPSIZE_KZ, /* 8183 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8184 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8185 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8186 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8187 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8188 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8189 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8190 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8191 */ IC, /* 8192 */ IC_64BIT, /* 8193 */ IC_XS, /* 8194 */ IC_64BIT_XS, /* 8195 */ IC_XD, /* 8196 */ IC_64BIT_XD, /* 8197 */ IC_XS, /* 8198 */ IC_64BIT_XS, /* 8199 */ IC, /* 8200 */ IC_64BIT_REXW, /* 8201 */ IC_XS, /* 8202 */ IC_64BIT_REXW_XS, /* 8203 */ IC_XD, /* 8204 */ IC_64BIT_REXW_XD, /* 8205 */ IC_XS, /* 8206 */ IC_64BIT_REXW_XS, /* 8207 */ IC_OPSIZE, /* 8208 */ IC_64BIT_OPSIZE, /* 8209 */ IC_XS_OPSIZE, /* 8210 */ IC_64BIT_XS_OPSIZE, /* 8211 */ IC_XD_OPSIZE, /* 8212 */ IC_64BIT_XD_OPSIZE, /* 8213 */ IC_XS_OPSIZE, /* 8214 */ IC_64BIT_XD_OPSIZE, /* 8215 */ IC_OPSIZE, /* 8216 */ IC_64BIT_REXW_OPSIZE, /* 8217 */ IC_XS_OPSIZE, /* 8218 */ IC_64BIT_REXW_XS, /* 8219 */ IC_XD_OPSIZE, /* 8220 */ IC_64BIT_REXW_XD, /* 8221 */ IC_XS_OPSIZE, /* 8222 */ IC_64BIT_REXW_XS, /* 8223 */ IC_ADSIZE, /* 8224 */ IC_64BIT_ADSIZE, /* 8225 */ IC_XS, /* 8226 */ IC_64BIT_XS, /* 8227 */ IC_XD, /* 8228 */ IC_64BIT_XD, /* 8229 */ IC_XS, /* 8230 */ IC_64BIT_XS, /* 8231 */ IC_ADSIZE, /* 8232 */ IC_64BIT_REXW_ADSIZE, /* 8233 */ IC_XS, /* 8234 */ IC_64BIT_REXW_XS, /* 8235 */ IC_XD, /* 8236 */ IC_64BIT_REXW_XD, /* 8237 */ IC_XS, /* 8238 */ IC_64BIT_REXW_XS, /* 8239 */ IC_OPSIZE_ADSIZE, /* 8240 */ IC_64BIT_OPSIZE_ADSIZE, /* 8241 */ IC_XS_OPSIZE, /* 8242 */ IC_64BIT_XS_OPSIZE, /* 8243 */ IC_XD_OPSIZE, /* 8244 */ IC_64BIT_XD_OPSIZE, /* 8245 */ IC_XS_OPSIZE, /* 8246 */ IC_64BIT_XD_OPSIZE, /* 8247 */ IC_OPSIZE_ADSIZE, /* 8248 */ IC_64BIT_REXW_OPSIZE, /* 8249 */ IC_XS_OPSIZE, /* 8250 */ IC_64BIT_REXW_XS, /* 8251 */ IC_XD_OPSIZE, /* 8252 */ IC_64BIT_REXW_XD, /* 8253 */ IC_XS_OPSIZE, /* 8254 */ IC_64BIT_REXW_XS, /* 8255 */ IC_VEX, /* 8256 */ IC_VEX, /* 8257 */ IC_VEX_XS, /* 8258 */ IC_VEX_XS, /* 8259 */ IC_VEX_XD, /* 8260 */ IC_VEX_XD, /* 8261 */ IC_VEX_XD, /* 8262 */ IC_VEX_XD, /* 8263 */ IC_VEX_W, /* 8264 */ IC_VEX_W, /* 8265 */ IC_VEX_W_XS, /* 8266 */ IC_VEX_W_XS, /* 8267 */ IC_VEX_W_XD, /* 8268 */ IC_VEX_W_XD, /* 8269 */ IC_VEX_W_XD, /* 8270 */ IC_VEX_W_XD, /* 8271 */ IC_VEX_OPSIZE, /* 8272 */ IC_VEX_OPSIZE, /* 8273 */ IC_VEX_OPSIZE, /* 8274 */ IC_VEX_OPSIZE, /* 8275 */ IC_VEX_OPSIZE, /* 8276 */ IC_VEX_OPSIZE, /* 8277 */ IC_VEX_OPSIZE, /* 8278 */ IC_VEX_OPSIZE, /* 8279 */ IC_VEX_W_OPSIZE, /* 8280 */ IC_VEX_W_OPSIZE, /* 8281 */ IC_VEX_W_OPSIZE, /* 8282 */ IC_VEX_W_OPSIZE, /* 8283 */ IC_VEX_W_OPSIZE, /* 8284 */ IC_VEX_W_OPSIZE, /* 8285 */ IC_VEX_W_OPSIZE, /* 8286 */ IC_VEX_W_OPSIZE, /* 8287 */ IC_VEX, /* 8288 */ IC_VEX, /* 8289 */ IC_VEX_XS, /* 8290 */ IC_VEX_XS, /* 8291 */ IC_VEX_XD, /* 8292 */ IC_VEX_XD, /* 8293 */ IC_VEX_XD, /* 8294 */ IC_VEX_XD, /* 8295 */ IC_VEX_W, /* 8296 */ IC_VEX_W, /* 8297 */ IC_VEX_W_XS, /* 8298 */ IC_VEX_W_XS, /* 8299 */ IC_VEX_W_XD, /* 8300 */ IC_VEX_W_XD, /* 8301 */ IC_VEX_W_XD, /* 8302 */ IC_VEX_W_XD, /* 8303 */ IC_VEX_OPSIZE, /* 8304 */ IC_VEX_OPSIZE, /* 8305 */ IC_VEX_OPSIZE, /* 8306 */ IC_VEX_OPSIZE, /* 8307 */ IC_VEX_OPSIZE, /* 8308 */ IC_VEX_OPSIZE, /* 8309 */ IC_VEX_OPSIZE, /* 8310 */ IC_VEX_OPSIZE, /* 8311 */ IC_VEX_W_OPSIZE, /* 8312 */ IC_VEX_W_OPSIZE, /* 8313 */ IC_VEX_W_OPSIZE, /* 8314 */ IC_VEX_W_OPSIZE, /* 8315 */ IC_VEX_W_OPSIZE, /* 8316 */ IC_VEX_W_OPSIZE, /* 8317 */ IC_VEX_W_OPSIZE, /* 8318 */ IC_VEX_W_OPSIZE, /* 8319 */ IC_VEX_L, /* 8320 */ IC_VEX_L, /* 8321 */ IC_VEX_L_XS, /* 8322 */ IC_VEX_L_XS, /* 8323 */ IC_VEX_L_XD, /* 8324 */ IC_VEX_L_XD, /* 8325 */ IC_VEX_L_XD, /* 8326 */ IC_VEX_L_XD, /* 8327 */ IC_VEX_L_W, /* 8328 */ IC_VEX_L_W, /* 8329 */ IC_VEX_L_W_XS, /* 8330 */ IC_VEX_L_W_XS, /* 8331 */ IC_VEX_L_W_XD, /* 8332 */ IC_VEX_L_W_XD, /* 8333 */ IC_VEX_L_W_XD, /* 8334 */ IC_VEX_L_W_XD, /* 8335 */ IC_VEX_L_OPSIZE, /* 8336 */ IC_VEX_L_OPSIZE, /* 8337 */ IC_VEX_L_OPSIZE, /* 8338 */ IC_VEX_L_OPSIZE, /* 8339 */ IC_VEX_L_OPSIZE, /* 8340 */ IC_VEX_L_OPSIZE, /* 8341 */ IC_VEX_L_OPSIZE, /* 8342 */ IC_VEX_L_OPSIZE, /* 8343 */ IC_VEX_L_W_OPSIZE, /* 8344 */ IC_VEX_L_W_OPSIZE, /* 8345 */ IC_VEX_L_W_OPSIZE, /* 8346 */ IC_VEX_L_W_OPSIZE, /* 8347 */ IC_VEX_L_W_OPSIZE, /* 8348 */ IC_VEX_L_W_OPSIZE, /* 8349 */ IC_VEX_L_W_OPSIZE, /* 8350 */ IC_VEX_L_W_OPSIZE, /* 8351 */ IC_VEX_L, /* 8352 */ IC_VEX_L, /* 8353 */ IC_VEX_L_XS, /* 8354 */ IC_VEX_L_XS, /* 8355 */ IC_VEX_L_XD, /* 8356 */ IC_VEX_L_XD, /* 8357 */ IC_VEX_L_XD, /* 8358 */ IC_VEX_L_XD, /* 8359 */ IC_VEX_L_W, /* 8360 */ IC_VEX_L_W, /* 8361 */ IC_VEX_L_W_XS, /* 8362 */ IC_VEX_L_W_XS, /* 8363 */ IC_VEX_L_W_XD, /* 8364 */ IC_VEX_L_W_XD, /* 8365 */ IC_VEX_L_W_XD, /* 8366 */ IC_VEX_L_W_XD, /* 8367 */ IC_VEX_L_OPSIZE, /* 8368 */ IC_VEX_L_OPSIZE, /* 8369 */ IC_VEX_L_OPSIZE, /* 8370 */ IC_VEX_L_OPSIZE, /* 8371 */ IC_VEX_L_OPSIZE, /* 8372 */ IC_VEX_L_OPSIZE, /* 8373 */ IC_VEX_L_OPSIZE, /* 8374 */ IC_VEX_L_OPSIZE, /* 8375 */ IC_VEX_L_W_OPSIZE, /* 8376 */ IC_VEX_L_W_OPSIZE, /* 8377 */ IC_VEX_L_W_OPSIZE, /* 8378 */ IC_VEX_L_W_OPSIZE, /* 8379 */ IC_VEX_L_W_OPSIZE, /* 8380 */ IC_VEX_L_W_OPSIZE, /* 8381 */ IC_VEX_L_W_OPSIZE, /* 8382 */ IC_VEX_L_W_OPSIZE, /* 8383 */ IC_VEX_L, /* 8384 */ IC_VEX_L, /* 8385 */ IC_VEX_L_XS, /* 8386 */ IC_VEX_L_XS, /* 8387 */ IC_VEX_L_XD, /* 8388 */ IC_VEX_L_XD, /* 8389 */ IC_VEX_L_XD, /* 8390 */ IC_VEX_L_XD, /* 8391 */ IC_VEX_L_W, /* 8392 */ IC_VEX_L_W, /* 8393 */ IC_VEX_L_W_XS, /* 8394 */ IC_VEX_L_W_XS, /* 8395 */ IC_VEX_L_W_XD, /* 8396 */ IC_VEX_L_W_XD, /* 8397 */ IC_VEX_L_W_XD, /* 8398 */ IC_VEX_L_W_XD, /* 8399 */ IC_VEX_L_OPSIZE, /* 8400 */ IC_VEX_L_OPSIZE, /* 8401 */ IC_VEX_L_OPSIZE, /* 8402 */ IC_VEX_L_OPSIZE, /* 8403 */ IC_VEX_L_OPSIZE, /* 8404 */ IC_VEX_L_OPSIZE, /* 8405 */ IC_VEX_L_OPSIZE, /* 8406 */ IC_VEX_L_OPSIZE, /* 8407 */ IC_VEX_L_W_OPSIZE, /* 8408 */ IC_VEX_L_W_OPSIZE, /* 8409 */ IC_VEX_L_W_OPSIZE, /* 8410 */ IC_VEX_L_W_OPSIZE, /* 8411 */ IC_VEX_L_W_OPSIZE, /* 8412 */ IC_VEX_L_W_OPSIZE, /* 8413 */ IC_VEX_L_W_OPSIZE, /* 8414 */ IC_VEX_L_W_OPSIZE, /* 8415 */ IC_VEX_L, /* 8416 */ IC_VEX_L, /* 8417 */ IC_VEX_L_XS, /* 8418 */ IC_VEX_L_XS, /* 8419 */ IC_VEX_L_XD, /* 8420 */ IC_VEX_L_XD, /* 8421 */ IC_VEX_L_XD, /* 8422 */ IC_VEX_L_XD, /* 8423 */ IC_VEX_L_W, /* 8424 */ IC_VEX_L_W, /* 8425 */ IC_VEX_L_W_XS, /* 8426 */ IC_VEX_L_W_XS, /* 8427 */ IC_VEX_L_W_XD, /* 8428 */ IC_VEX_L_W_XD, /* 8429 */ IC_VEX_L_W_XD, /* 8430 */ IC_VEX_L_W_XD, /* 8431 */ IC_VEX_L_OPSIZE, /* 8432 */ IC_VEX_L_OPSIZE, /* 8433 */ IC_VEX_L_OPSIZE, /* 8434 */ IC_VEX_L_OPSIZE, /* 8435 */ IC_VEX_L_OPSIZE, /* 8436 */ IC_VEX_L_OPSIZE, /* 8437 */ IC_VEX_L_OPSIZE, /* 8438 */ IC_VEX_L_OPSIZE, /* 8439 */ IC_VEX_L_W_OPSIZE, /* 8440 */ IC_VEX_L_W_OPSIZE, /* 8441 */ IC_VEX_L_W_OPSIZE, /* 8442 */ IC_VEX_L_W_OPSIZE, /* 8443 */ IC_VEX_L_W_OPSIZE, /* 8444 */ IC_VEX_L_W_OPSIZE, /* 8445 */ IC_VEX_L_W_OPSIZE, /* 8446 */ IC_VEX_L_W_OPSIZE, /* 8447 */ IC_EVEX_B, /* 8448 */ IC_EVEX_B, /* 8449 */ IC_EVEX_XS_B, /* 8450 */ IC_EVEX_XS_B, /* 8451 */ IC_EVEX_XD_B, /* 8452 */ IC_EVEX_XD_B, /* 8453 */ IC_EVEX_XD_B, /* 8454 */ IC_EVEX_XD_B, /* 8455 */ IC_EVEX_W_B, /* 8456 */ IC_EVEX_W_B, /* 8457 */ IC_EVEX_W_XS_B, /* 8458 */ IC_EVEX_W_XS_B, /* 8459 */ IC_EVEX_W_XD_B, /* 8460 */ IC_EVEX_W_XD_B, /* 8461 */ IC_EVEX_W_XD_B, /* 8462 */ IC_EVEX_W_XD_B, /* 8463 */ IC_EVEX_OPSIZE_B, /* 8464 */ IC_EVEX_OPSIZE_B, /* 8465 */ IC_EVEX_OPSIZE_B, /* 8466 */ IC_EVEX_OPSIZE_B, /* 8467 */ IC_EVEX_OPSIZE_B, /* 8468 */ IC_EVEX_OPSIZE_B, /* 8469 */ IC_EVEX_OPSIZE_B, /* 8470 */ IC_EVEX_OPSIZE_B, /* 8471 */ IC_EVEX_W_OPSIZE_B, /* 8472 */ IC_EVEX_W_OPSIZE_B, /* 8473 */ IC_EVEX_W_OPSIZE_B, /* 8474 */ IC_EVEX_W_OPSIZE_B, /* 8475 */ IC_EVEX_W_OPSIZE_B, /* 8476 */ IC_EVEX_W_OPSIZE_B, /* 8477 */ IC_EVEX_W_OPSIZE_B, /* 8478 */ IC_EVEX_W_OPSIZE_B, /* 8479 */ IC_EVEX_B, /* 8480 */ IC_EVEX_B, /* 8481 */ IC_EVEX_XS_B, /* 8482 */ IC_EVEX_XS_B, /* 8483 */ IC_EVEX_XD_B, /* 8484 */ IC_EVEX_XD_B, /* 8485 */ IC_EVEX_XD_B, /* 8486 */ IC_EVEX_XD_B, /* 8487 */ IC_EVEX_W_B, /* 8488 */ IC_EVEX_W_B, /* 8489 */ IC_EVEX_W_XS_B, /* 8490 */ IC_EVEX_W_XS_B, /* 8491 */ IC_EVEX_W_XD_B, /* 8492 */ IC_EVEX_W_XD_B, /* 8493 */ IC_EVEX_W_XD_B, /* 8494 */ IC_EVEX_W_XD_B, /* 8495 */ IC_EVEX_OPSIZE_B, /* 8496 */ IC_EVEX_OPSIZE_B, /* 8497 */ IC_EVEX_OPSIZE_B, /* 8498 */ IC_EVEX_OPSIZE_B, /* 8499 */ IC_EVEX_OPSIZE_B, /* 8500 */ IC_EVEX_OPSIZE_B, /* 8501 */ IC_EVEX_OPSIZE_B, /* 8502 */ IC_EVEX_OPSIZE_B, /* 8503 */ IC_EVEX_W_OPSIZE_B, /* 8504 */ IC_EVEX_W_OPSIZE_B, /* 8505 */ IC_EVEX_W_OPSIZE_B, /* 8506 */ IC_EVEX_W_OPSIZE_B, /* 8507 */ IC_EVEX_W_OPSIZE_B, /* 8508 */ IC_EVEX_W_OPSIZE_B, /* 8509 */ IC_EVEX_W_OPSIZE_B, /* 8510 */ IC_EVEX_W_OPSIZE_B, /* 8511 */ IC_EVEX_B, /* 8512 */ IC_EVEX_B, /* 8513 */ IC_EVEX_XS_B, /* 8514 */ IC_EVEX_XS_B, /* 8515 */ IC_EVEX_XD_B, /* 8516 */ IC_EVEX_XD_B, /* 8517 */ IC_EVEX_XD_B, /* 8518 */ IC_EVEX_XD_B, /* 8519 */ IC_EVEX_W_B, /* 8520 */ IC_EVEX_W_B, /* 8521 */ IC_EVEX_W_XS_B, /* 8522 */ IC_EVEX_W_XS_B, /* 8523 */ IC_EVEX_W_XD_B, /* 8524 */ IC_EVEX_W_XD_B, /* 8525 */ IC_EVEX_W_XD_B, /* 8526 */ IC_EVEX_W_XD_B, /* 8527 */ IC_EVEX_OPSIZE_B, /* 8528 */ IC_EVEX_OPSIZE_B, /* 8529 */ IC_EVEX_OPSIZE_B, /* 8530 */ IC_EVEX_OPSIZE_B, /* 8531 */ IC_EVEX_OPSIZE_B, /* 8532 */ IC_EVEX_OPSIZE_B, /* 8533 */ IC_EVEX_OPSIZE_B, /* 8534 */ IC_EVEX_OPSIZE_B, /* 8535 */ IC_EVEX_W_OPSIZE_B, /* 8536 */ IC_EVEX_W_OPSIZE_B, /* 8537 */ IC_EVEX_W_OPSIZE_B, /* 8538 */ IC_EVEX_W_OPSIZE_B, /* 8539 */ IC_EVEX_W_OPSIZE_B, /* 8540 */ IC_EVEX_W_OPSIZE_B, /* 8541 */ IC_EVEX_W_OPSIZE_B, /* 8542 */ IC_EVEX_W_OPSIZE_B, /* 8543 */ IC_EVEX_B, /* 8544 */ IC_EVEX_B, /* 8545 */ IC_EVEX_XS_B, /* 8546 */ IC_EVEX_XS_B, /* 8547 */ IC_EVEX_XD_B, /* 8548 */ IC_EVEX_XD_B, /* 8549 */ IC_EVEX_XD_B, /* 8550 */ IC_EVEX_XD_B, /* 8551 */ IC_EVEX_W_B, /* 8552 */ IC_EVEX_W_B, /* 8553 */ IC_EVEX_W_XS_B, /* 8554 */ IC_EVEX_W_XS_B, /* 8555 */ IC_EVEX_W_XD_B, /* 8556 */ IC_EVEX_W_XD_B, /* 8557 */ IC_EVEX_W_XD_B, /* 8558 */ IC_EVEX_W_XD_B, /* 8559 */ IC_EVEX_OPSIZE_B, /* 8560 */ IC_EVEX_OPSIZE_B, /* 8561 */ IC_EVEX_OPSIZE_B, /* 8562 */ IC_EVEX_OPSIZE_B, /* 8563 */ IC_EVEX_OPSIZE_B, /* 8564 */ IC_EVEX_OPSIZE_B, /* 8565 */ IC_EVEX_OPSIZE_B, /* 8566 */ IC_EVEX_OPSIZE_B, /* 8567 */ IC_EVEX_W_OPSIZE_B, /* 8568 */ IC_EVEX_W_OPSIZE_B, /* 8569 */ IC_EVEX_W_OPSIZE_B, /* 8570 */ IC_EVEX_W_OPSIZE_B, /* 8571 */ IC_EVEX_W_OPSIZE_B, /* 8572 */ IC_EVEX_W_OPSIZE_B, /* 8573 */ IC_EVEX_W_OPSIZE_B, /* 8574 */ IC_EVEX_W_OPSIZE_B, /* 8575 */ IC_EVEX_B, /* 8576 */ IC_EVEX_B, /* 8577 */ IC_EVEX_XS_B, /* 8578 */ IC_EVEX_XS_B, /* 8579 */ IC_EVEX_XD_B, /* 8580 */ IC_EVEX_XD_B, /* 8581 */ IC_EVEX_XD_B, /* 8582 */ IC_EVEX_XD_B, /* 8583 */ IC_EVEX_W_B, /* 8584 */ IC_EVEX_W_B, /* 8585 */ IC_EVEX_W_XS_B, /* 8586 */ IC_EVEX_W_XS_B, /* 8587 */ IC_EVEX_W_XD_B, /* 8588 */ IC_EVEX_W_XD_B, /* 8589 */ IC_EVEX_W_XD_B, /* 8590 */ IC_EVEX_W_XD_B, /* 8591 */ IC_EVEX_OPSIZE_B, /* 8592 */ IC_EVEX_OPSIZE_B, /* 8593 */ IC_EVEX_OPSIZE_B, /* 8594 */ IC_EVEX_OPSIZE_B, /* 8595 */ IC_EVEX_OPSIZE_B, /* 8596 */ IC_EVEX_OPSIZE_B, /* 8597 */ IC_EVEX_OPSIZE_B, /* 8598 */ IC_EVEX_OPSIZE_B, /* 8599 */ IC_EVEX_W_OPSIZE_B, /* 8600 */ IC_EVEX_W_OPSIZE_B, /* 8601 */ IC_EVEX_W_OPSIZE_B, /* 8602 */ IC_EVEX_W_OPSIZE_B, /* 8603 */ IC_EVEX_W_OPSIZE_B, /* 8604 */ IC_EVEX_W_OPSIZE_B, /* 8605 */ IC_EVEX_W_OPSIZE_B, /* 8606 */ IC_EVEX_W_OPSIZE_B, /* 8607 */ IC_EVEX_B, /* 8608 */ IC_EVEX_B, /* 8609 */ IC_EVEX_XS_B, /* 8610 */ IC_EVEX_XS_B, /* 8611 */ IC_EVEX_XD_B, /* 8612 */ IC_EVEX_XD_B, /* 8613 */ IC_EVEX_XD_B, /* 8614 */ IC_EVEX_XD_B, /* 8615 */ IC_EVEX_W_B, /* 8616 */ IC_EVEX_W_B, /* 8617 */ IC_EVEX_W_XS_B, /* 8618 */ IC_EVEX_W_XS_B, /* 8619 */ IC_EVEX_W_XD_B, /* 8620 */ IC_EVEX_W_XD_B, /* 8621 */ IC_EVEX_W_XD_B, /* 8622 */ IC_EVEX_W_XD_B, /* 8623 */ IC_EVEX_OPSIZE_B, /* 8624 */ IC_EVEX_OPSIZE_B, /* 8625 */ IC_EVEX_OPSIZE_B, /* 8626 */ IC_EVEX_OPSIZE_B, /* 8627 */ IC_EVEX_OPSIZE_B, /* 8628 */ IC_EVEX_OPSIZE_B, /* 8629 */ IC_EVEX_OPSIZE_B, /* 8630 */ IC_EVEX_OPSIZE_B, /* 8631 */ IC_EVEX_W_OPSIZE_B, /* 8632 */ IC_EVEX_W_OPSIZE_B, /* 8633 */ IC_EVEX_W_OPSIZE_B, /* 8634 */ IC_EVEX_W_OPSIZE_B, /* 8635 */ IC_EVEX_W_OPSIZE_B, /* 8636 */ IC_EVEX_W_OPSIZE_B, /* 8637 */ IC_EVEX_W_OPSIZE_B, /* 8638 */ IC_EVEX_W_OPSIZE_B, /* 8639 */ IC_EVEX_B, /* 8640 */ IC_EVEX_B, /* 8641 */ IC_EVEX_XS_B, /* 8642 */ IC_EVEX_XS_B, /* 8643 */ IC_EVEX_XD_B, /* 8644 */ IC_EVEX_XD_B, /* 8645 */ IC_EVEX_XD_B, /* 8646 */ IC_EVEX_XD_B, /* 8647 */ IC_EVEX_W_B, /* 8648 */ IC_EVEX_W_B, /* 8649 */ IC_EVEX_W_XS_B, /* 8650 */ IC_EVEX_W_XS_B, /* 8651 */ IC_EVEX_W_XD_B, /* 8652 */ IC_EVEX_W_XD_B, /* 8653 */ IC_EVEX_W_XD_B, /* 8654 */ IC_EVEX_W_XD_B, /* 8655 */ IC_EVEX_OPSIZE_B, /* 8656 */ IC_EVEX_OPSIZE_B, /* 8657 */ IC_EVEX_OPSIZE_B, /* 8658 */ IC_EVEX_OPSIZE_B, /* 8659 */ IC_EVEX_OPSIZE_B, /* 8660 */ IC_EVEX_OPSIZE_B, /* 8661 */ IC_EVEX_OPSIZE_B, /* 8662 */ IC_EVEX_OPSIZE_B, /* 8663 */ IC_EVEX_W_OPSIZE_B, /* 8664 */ IC_EVEX_W_OPSIZE_B, /* 8665 */ IC_EVEX_W_OPSIZE_B, /* 8666 */ IC_EVEX_W_OPSIZE_B, /* 8667 */ IC_EVEX_W_OPSIZE_B, /* 8668 */ IC_EVEX_W_OPSIZE_B, /* 8669 */ IC_EVEX_W_OPSIZE_B, /* 8670 */ IC_EVEX_W_OPSIZE_B, /* 8671 */ IC_EVEX_B, /* 8672 */ IC_EVEX_B, /* 8673 */ IC_EVEX_XS_B, /* 8674 */ IC_EVEX_XS_B, /* 8675 */ IC_EVEX_XD_B, /* 8676 */ IC_EVEX_XD_B, /* 8677 */ IC_EVEX_XD_B, /* 8678 */ IC_EVEX_XD_B, /* 8679 */ IC_EVEX_W_B, /* 8680 */ IC_EVEX_W_B, /* 8681 */ IC_EVEX_W_XS_B, /* 8682 */ IC_EVEX_W_XS_B, /* 8683 */ IC_EVEX_W_XD_B, /* 8684 */ IC_EVEX_W_XD_B, /* 8685 */ IC_EVEX_W_XD_B, /* 8686 */ IC_EVEX_W_XD_B, /* 8687 */ IC_EVEX_OPSIZE_B, /* 8688 */ IC_EVEX_OPSIZE_B, /* 8689 */ IC_EVEX_OPSIZE_B, /* 8690 */ IC_EVEX_OPSIZE_B, /* 8691 */ IC_EVEX_OPSIZE_B, /* 8692 */ IC_EVEX_OPSIZE_B, /* 8693 */ IC_EVEX_OPSIZE_B, /* 8694 */ IC_EVEX_OPSIZE_B, /* 8695 */ IC_EVEX_W_OPSIZE_B, /* 8696 */ IC_EVEX_W_OPSIZE_B, /* 8697 */ IC_EVEX_W_OPSIZE_B, /* 8698 */ IC_EVEX_W_OPSIZE_B, /* 8699 */ IC_EVEX_W_OPSIZE_B, /* 8700 */ IC_EVEX_W_OPSIZE_B, /* 8701 */ IC_EVEX_W_OPSIZE_B, /* 8702 */ IC_EVEX_W_OPSIZE_B, /* 8703 */ IC, /* 8704 */ IC_64BIT, /* 8705 */ IC_XS, /* 8706 */ IC_64BIT_XS, /* 8707 */ IC_XD, /* 8708 */ IC_64BIT_XD, /* 8709 */ IC_XS, /* 8710 */ IC_64BIT_XS, /* 8711 */ IC, /* 8712 */ IC_64BIT_REXW, /* 8713 */ IC_XS, /* 8714 */ IC_64BIT_REXW_XS, /* 8715 */ IC_XD, /* 8716 */ IC_64BIT_REXW_XD, /* 8717 */ IC_XS, /* 8718 */ IC_64BIT_REXW_XS, /* 8719 */ IC_OPSIZE, /* 8720 */ IC_64BIT_OPSIZE, /* 8721 */ IC_XS_OPSIZE, /* 8722 */ IC_64BIT_XS_OPSIZE, /* 8723 */ IC_XD_OPSIZE, /* 8724 */ IC_64BIT_XD_OPSIZE, /* 8725 */ IC_XS_OPSIZE, /* 8726 */ IC_64BIT_XD_OPSIZE, /* 8727 */ IC_OPSIZE, /* 8728 */ IC_64BIT_REXW_OPSIZE, /* 8729 */ IC_XS_OPSIZE, /* 8730 */ IC_64BIT_REXW_XS, /* 8731 */ IC_XD_OPSIZE, /* 8732 */ IC_64BIT_REXW_XD, /* 8733 */ IC_XS_OPSIZE, /* 8734 */ IC_64BIT_REXW_XS, /* 8735 */ IC_ADSIZE, /* 8736 */ IC_64BIT_ADSIZE, /* 8737 */ IC_XS, /* 8738 */ IC_64BIT_XS, /* 8739 */ IC_XD, /* 8740 */ IC_64BIT_XD, /* 8741 */ IC_XS, /* 8742 */ IC_64BIT_XS, /* 8743 */ IC_ADSIZE, /* 8744 */ IC_64BIT_REXW_ADSIZE, /* 8745 */ IC_XS, /* 8746 */ IC_64BIT_REXW_XS, /* 8747 */ IC_XD, /* 8748 */ IC_64BIT_REXW_XD, /* 8749 */ IC_XS, /* 8750 */ IC_64BIT_REXW_XS, /* 8751 */ IC_OPSIZE_ADSIZE, /* 8752 */ IC_64BIT_OPSIZE_ADSIZE, /* 8753 */ IC_XS_OPSIZE, /* 8754 */ IC_64BIT_XS_OPSIZE, /* 8755 */ IC_XD_OPSIZE, /* 8756 */ IC_64BIT_XD_OPSIZE, /* 8757 */ IC_XS_OPSIZE, /* 8758 */ IC_64BIT_XD_OPSIZE, /* 8759 */ IC_OPSIZE_ADSIZE, /* 8760 */ IC_64BIT_REXW_OPSIZE, /* 8761 */ IC_XS_OPSIZE, /* 8762 */ IC_64BIT_REXW_XS, /* 8763 */ IC_XD_OPSIZE, /* 8764 */ IC_64BIT_REXW_XD, /* 8765 */ IC_XS_OPSIZE, /* 8766 */ IC_64BIT_REXW_XS, /* 8767 */ IC_VEX, /* 8768 */ IC_VEX, /* 8769 */ IC_VEX_XS, /* 8770 */ IC_VEX_XS, /* 8771 */ IC_VEX_XD, /* 8772 */ IC_VEX_XD, /* 8773 */ IC_VEX_XD, /* 8774 */ IC_VEX_XD, /* 8775 */ IC_VEX_W, /* 8776 */ IC_VEX_W, /* 8777 */ IC_VEX_W_XS, /* 8778 */ IC_VEX_W_XS, /* 8779 */ IC_VEX_W_XD, /* 8780 */ IC_VEX_W_XD, /* 8781 */ IC_VEX_W_XD, /* 8782 */ IC_VEX_W_XD, /* 8783 */ IC_VEX_OPSIZE, /* 8784 */ IC_VEX_OPSIZE, /* 8785 */ IC_VEX_OPSIZE, /* 8786 */ IC_VEX_OPSIZE, /* 8787 */ IC_VEX_OPSIZE, /* 8788 */ IC_VEX_OPSIZE, /* 8789 */ IC_VEX_OPSIZE, /* 8790 */ IC_VEX_OPSIZE, /* 8791 */ IC_VEX_W_OPSIZE, /* 8792 */ IC_VEX_W_OPSIZE, /* 8793 */ IC_VEX_W_OPSIZE, /* 8794 */ IC_VEX_W_OPSIZE, /* 8795 */ IC_VEX_W_OPSIZE, /* 8796 */ IC_VEX_W_OPSIZE, /* 8797 */ IC_VEX_W_OPSIZE, /* 8798 */ IC_VEX_W_OPSIZE, /* 8799 */ IC_VEX, /* 8800 */ IC_VEX, /* 8801 */ IC_VEX_XS, /* 8802 */ IC_VEX_XS, /* 8803 */ IC_VEX_XD, /* 8804 */ IC_VEX_XD, /* 8805 */ IC_VEX_XD, /* 8806 */ IC_VEX_XD, /* 8807 */ IC_VEX_W, /* 8808 */ IC_VEX_W, /* 8809 */ IC_VEX_W_XS, /* 8810 */ IC_VEX_W_XS, /* 8811 */ IC_VEX_W_XD, /* 8812 */ IC_VEX_W_XD, /* 8813 */ IC_VEX_W_XD, /* 8814 */ IC_VEX_W_XD, /* 8815 */ IC_VEX_OPSIZE, /* 8816 */ IC_VEX_OPSIZE, /* 8817 */ IC_VEX_OPSIZE, /* 8818 */ IC_VEX_OPSIZE, /* 8819 */ IC_VEX_OPSIZE, /* 8820 */ IC_VEX_OPSIZE, /* 8821 */ IC_VEX_OPSIZE, /* 8822 */ IC_VEX_OPSIZE, /* 8823 */ IC_VEX_W_OPSIZE, /* 8824 */ IC_VEX_W_OPSIZE, /* 8825 */ IC_VEX_W_OPSIZE, /* 8826 */ IC_VEX_W_OPSIZE, /* 8827 */ IC_VEX_W_OPSIZE, /* 8828 */ IC_VEX_W_OPSIZE, /* 8829 */ IC_VEX_W_OPSIZE, /* 8830 */ IC_VEX_W_OPSIZE, /* 8831 */ IC_VEX_L, /* 8832 */ IC_VEX_L, /* 8833 */ IC_VEX_L_XS, /* 8834 */ IC_VEX_L_XS, /* 8835 */ IC_VEX_L_XD, /* 8836 */ IC_VEX_L_XD, /* 8837 */ IC_VEX_L_XD, /* 8838 */ IC_VEX_L_XD, /* 8839 */ IC_VEX_L_W, /* 8840 */ IC_VEX_L_W, /* 8841 */ IC_VEX_L_W_XS, /* 8842 */ IC_VEX_L_W_XS, /* 8843 */ IC_VEX_L_W_XD, /* 8844 */ IC_VEX_L_W_XD, /* 8845 */ IC_VEX_L_W_XD, /* 8846 */ IC_VEX_L_W_XD, /* 8847 */ IC_VEX_L_OPSIZE, /* 8848 */ IC_VEX_L_OPSIZE, /* 8849 */ IC_VEX_L_OPSIZE, /* 8850 */ IC_VEX_L_OPSIZE, /* 8851 */ IC_VEX_L_OPSIZE, /* 8852 */ IC_VEX_L_OPSIZE, /* 8853 */ IC_VEX_L_OPSIZE, /* 8854 */ IC_VEX_L_OPSIZE, /* 8855 */ IC_VEX_L_W_OPSIZE, /* 8856 */ IC_VEX_L_W_OPSIZE, /* 8857 */ IC_VEX_L_W_OPSIZE, /* 8858 */ IC_VEX_L_W_OPSIZE, /* 8859 */ IC_VEX_L_W_OPSIZE, /* 8860 */ IC_VEX_L_W_OPSIZE, /* 8861 */ IC_VEX_L_W_OPSIZE, /* 8862 */ IC_VEX_L_W_OPSIZE, /* 8863 */ IC_VEX_L, /* 8864 */ IC_VEX_L, /* 8865 */ IC_VEX_L_XS, /* 8866 */ IC_VEX_L_XS, /* 8867 */ IC_VEX_L_XD, /* 8868 */ IC_VEX_L_XD, /* 8869 */ IC_VEX_L_XD, /* 8870 */ IC_VEX_L_XD, /* 8871 */ IC_VEX_L_W, /* 8872 */ IC_VEX_L_W, /* 8873 */ IC_VEX_L_W_XS, /* 8874 */ IC_VEX_L_W_XS, /* 8875 */ IC_VEX_L_W_XD, /* 8876 */ IC_VEX_L_W_XD, /* 8877 */ IC_VEX_L_W_XD, /* 8878 */ IC_VEX_L_W_XD, /* 8879 */ IC_VEX_L_OPSIZE, /* 8880 */ IC_VEX_L_OPSIZE, /* 8881 */ IC_VEX_L_OPSIZE, /* 8882 */ IC_VEX_L_OPSIZE, /* 8883 */ IC_VEX_L_OPSIZE, /* 8884 */ IC_VEX_L_OPSIZE, /* 8885 */ IC_VEX_L_OPSIZE, /* 8886 */ IC_VEX_L_OPSIZE, /* 8887 */ IC_VEX_L_W_OPSIZE, /* 8888 */ IC_VEX_L_W_OPSIZE, /* 8889 */ IC_VEX_L_W_OPSIZE, /* 8890 */ IC_VEX_L_W_OPSIZE, /* 8891 */ IC_VEX_L_W_OPSIZE, /* 8892 */ IC_VEX_L_W_OPSIZE, /* 8893 */ IC_VEX_L_W_OPSIZE, /* 8894 */ IC_VEX_L_W_OPSIZE, /* 8895 */ IC_VEX_L, /* 8896 */ IC_VEX_L, /* 8897 */ IC_VEX_L_XS, /* 8898 */ IC_VEX_L_XS, /* 8899 */ IC_VEX_L_XD, /* 8900 */ IC_VEX_L_XD, /* 8901 */ IC_VEX_L_XD, /* 8902 */ IC_VEX_L_XD, /* 8903 */ IC_VEX_L_W, /* 8904 */ IC_VEX_L_W, /* 8905 */ IC_VEX_L_W_XS, /* 8906 */ IC_VEX_L_W_XS, /* 8907 */ IC_VEX_L_W_XD, /* 8908 */ IC_VEX_L_W_XD, /* 8909 */ IC_VEX_L_W_XD, /* 8910 */ IC_VEX_L_W_XD, /* 8911 */ IC_VEX_L_OPSIZE, /* 8912 */ IC_VEX_L_OPSIZE, /* 8913 */ IC_VEX_L_OPSIZE, /* 8914 */ IC_VEX_L_OPSIZE, /* 8915 */ IC_VEX_L_OPSIZE, /* 8916 */ IC_VEX_L_OPSIZE, /* 8917 */ IC_VEX_L_OPSIZE, /* 8918 */ IC_VEX_L_OPSIZE, /* 8919 */ IC_VEX_L_W_OPSIZE, /* 8920 */ IC_VEX_L_W_OPSIZE, /* 8921 */ IC_VEX_L_W_OPSIZE, /* 8922 */ IC_VEX_L_W_OPSIZE, /* 8923 */ IC_VEX_L_W_OPSIZE, /* 8924 */ IC_VEX_L_W_OPSIZE, /* 8925 */ IC_VEX_L_W_OPSIZE, /* 8926 */ IC_VEX_L_W_OPSIZE, /* 8927 */ IC_VEX_L, /* 8928 */ IC_VEX_L, /* 8929 */ IC_VEX_L_XS, /* 8930 */ IC_VEX_L_XS, /* 8931 */ IC_VEX_L_XD, /* 8932 */ IC_VEX_L_XD, /* 8933 */ IC_VEX_L_XD, /* 8934 */ IC_VEX_L_XD, /* 8935 */ IC_VEX_L_W, /* 8936 */ IC_VEX_L_W, /* 8937 */ IC_VEX_L_W_XS, /* 8938 */ IC_VEX_L_W_XS, /* 8939 */ IC_VEX_L_W_XD, /* 8940 */ IC_VEX_L_W_XD, /* 8941 */ IC_VEX_L_W_XD, /* 8942 */ IC_VEX_L_W_XD, /* 8943 */ IC_VEX_L_OPSIZE, /* 8944 */ IC_VEX_L_OPSIZE, /* 8945 */ IC_VEX_L_OPSIZE, /* 8946 */ IC_VEX_L_OPSIZE, /* 8947 */ IC_VEX_L_OPSIZE, /* 8948 */ IC_VEX_L_OPSIZE, /* 8949 */ IC_VEX_L_OPSIZE, /* 8950 */ IC_VEX_L_OPSIZE, /* 8951 */ IC_VEX_L_W_OPSIZE, /* 8952 */ IC_VEX_L_W_OPSIZE, /* 8953 */ IC_VEX_L_W_OPSIZE, /* 8954 */ IC_VEX_L_W_OPSIZE, /* 8955 */ IC_VEX_L_W_OPSIZE, /* 8956 */ IC_VEX_L_W_OPSIZE, /* 8957 */ IC_VEX_L_W_OPSIZE, /* 8958 */ IC_VEX_L_W_OPSIZE, /* 8959 */ IC_EVEX_L_B, /* 8960 */ IC_EVEX_L_B, /* 8961 */ IC_EVEX_L_XS_B, /* 8962 */ IC_EVEX_L_XS_B, /* 8963 */ IC_EVEX_L_XD_B, /* 8964 */ IC_EVEX_L_XD_B, /* 8965 */ IC_EVEX_L_XD_B, /* 8966 */ IC_EVEX_L_XD_B, /* 8967 */ IC_EVEX_L_W_B, /* 8968 */ IC_EVEX_L_W_B, /* 8969 */ IC_EVEX_L_W_XS_B, /* 8970 */ IC_EVEX_L_W_XS_B, /* 8971 */ IC_EVEX_L_W_XD_B, /* 8972 */ IC_EVEX_L_W_XD_B, /* 8973 */ IC_EVEX_L_W_XD_B, /* 8974 */ IC_EVEX_L_W_XD_B, /* 8975 */ IC_EVEX_L_OPSIZE_B, /* 8976 */ IC_EVEX_L_OPSIZE_B, /* 8977 */ IC_EVEX_L_OPSIZE_B, /* 8978 */ IC_EVEX_L_OPSIZE_B, /* 8979 */ IC_EVEX_L_OPSIZE_B, /* 8980 */ IC_EVEX_L_OPSIZE_B, /* 8981 */ IC_EVEX_L_OPSIZE_B, /* 8982 */ IC_EVEX_L_OPSIZE_B, /* 8983 */ IC_EVEX_L_W_OPSIZE_B, /* 8984 */ IC_EVEX_L_W_OPSIZE_B, /* 8985 */ IC_EVEX_L_W_OPSIZE_B, /* 8986 */ IC_EVEX_L_W_OPSIZE_B, /* 8987 */ IC_EVEX_L_W_OPSIZE_B, /* 8988 */ IC_EVEX_L_W_OPSIZE_B, /* 8989 */ IC_EVEX_L_W_OPSIZE_B, /* 8990 */ IC_EVEX_L_W_OPSIZE_B, /* 8991 */ IC_EVEX_L_B, /* 8992 */ IC_EVEX_L_B, /* 8993 */ IC_EVEX_L_XS_B, /* 8994 */ IC_EVEX_L_XS_B, /* 8995 */ IC_EVEX_L_XD_B, /* 8996 */ IC_EVEX_L_XD_B, /* 8997 */ IC_EVEX_L_XD_B, /* 8998 */ IC_EVEX_L_XD_B, /* 8999 */ IC_EVEX_L_W_B, /* 9000 */ IC_EVEX_L_W_B, /* 9001 */ IC_EVEX_L_W_XS_B, /* 9002 */ IC_EVEX_L_W_XS_B, /* 9003 */ IC_EVEX_L_W_XD_B, /* 9004 */ IC_EVEX_L_W_XD_B, /* 9005 */ IC_EVEX_L_W_XD_B, /* 9006 */ IC_EVEX_L_W_XD_B, /* 9007 */ IC_EVEX_L_OPSIZE_B, /* 9008 */ IC_EVEX_L_OPSIZE_B, /* 9009 */ IC_EVEX_L_OPSIZE_B, /* 9010 */ IC_EVEX_L_OPSIZE_B, /* 9011 */ IC_EVEX_L_OPSIZE_B, /* 9012 */ IC_EVEX_L_OPSIZE_B, /* 9013 */ IC_EVEX_L_OPSIZE_B, /* 9014 */ IC_EVEX_L_OPSIZE_B, /* 9015 */ IC_EVEX_L_W_OPSIZE_B, /* 9016 */ IC_EVEX_L_W_OPSIZE_B, /* 9017 */ IC_EVEX_L_W_OPSIZE_B, /* 9018 */ IC_EVEX_L_W_OPSIZE_B, /* 9019 */ IC_EVEX_L_W_OPSIZE_B, /* 9020 */ IC_EVEX_L_W_OPSIZE_B, /* 9021 */ IC_EVEX_L_W_OPSIZE_B, /* 9022 */ IC_EVEX_L_W_OPSIZE_B, /* 9023 */ IC_EVEX_L_B, /* 9024 */ IC_EVEX_L_B, /* 9025 */ IC_EVEX_L_XS_B, /* 9026 */ IC_EVEX_L_XS_B, /* 9027 */ IC_EVEX_L_XD_B, /* 9028 */ IC_EVEX_L_XD_B, /* 9029 */ IC_EVEX_L_XD_B, /* 9030 */ IC_EVEX_L_XD_B, /* 9031 */ IC_EVEX_L_W_B, /* 9032 */ IC_EVEX_L_W_B, /* 9033 */ IC_EVEX_L_W_XS_B, /* 9034 */ IC_EVEX_L_W_XS_B, /* 9035 */ IC_EVEX_L_W_XD_B, /* 9036 */ IC_EVEX_L_W_XD_B, /* 9037 */ IC_EVEX_L_W_XD_B, /* 9038 */ IC_EVEX_L_W_XD_B, /* 9039 */ IC_EVEX_L_OPSIZE_B, /* 9040 */ IC_EVEX_L_OPSIZE_B, /* 9041 */ IC_EVEX_L_OPSIZE_B, /* 9042 */ IC_EVEX_L_OPSIZE_B, /* 9043 */ IC_EVEX_L_OPSIZE_B, /* 9044 */ IC_EVEX_L_OPSIZE_B, /* 9045 */ IC_EVEX_L_OPSIZE_B, /* 9046 */ IC_EVEX_L_OPSIZE_B, /* 9047 */ IC_EVEX_L_W_OPSIZE_B, /* 9048 */ IC_EVEX_L_W_OPSIZE_B, /* 9049 */ IC_EVEX_L_W_OPSIZE_B, /* 9050 */ IC_EVEX_L_W_OPSIZE_B, /* 9051 */ IC_EVEX_L_W_OPSIZE_B, /* 9052 */ IC_EVEX_L_W_OPSIZE_B, /* 9053 */ IC_EVEX_L_W_OPSIZE_B, /* 9054 */ IC_EVEX_L_W_OPSIZE_B, /* 9055 */ IC_EVEX_L_B, /* 9056 */ IC_EVEX_L_B, /* 9057 */ IC_EVEX_L_XS_B, /* 9058 */ IC_EVEX_L_XS_B, /* 9059 */ IC_EVEX_L_XD_B, /* 9060 */ IC_EVEX_L_XD_B, /* 9061 */ IC_EVEX_L_XD_B, /* 9062 */ IC_EVEX_L_XD_B, /* 9063 */ IC_EVEX_L_W_B, /* 9064 */ IC_EVEX_L_W_B, /* 9065 */ IC_EVEX_L_W_XS_B, /* 9066 */ IC_EVEX_L_W_XS_B, /* 9067 */ IC_EVEX_L_W_XD_B, /* 9068 */ IC_EVEX_L_W_XD_B, /* 9069 */ IC_EVEX_L_W_XD_B, /* 9070 */ IC_EVEX_L_W_XD_B, /* 9071 */ IC_EVEX_L_OPSIZE_B, /* 9072 */ IC_EVEX_L_OPSIZE_B, /* 9073 */ IC_EVEX_L_OPSIZE_B, /* 9074 */ IC_EVEX_L_OPSIZE_B, /* 9075 */ IC_EVEX_L_OPSIZE_B, /* 9076 */ IC_EVEX_L_OPSIZE_B, /* 9077 */ IC_EVEX_L_OPSIZE_B, /* 9078 */ IC_EVEX_L_OPSIZE_B, /* 9079 */ IC_EVEX_L_W_OPSIZE_B, /* 9080 */ IC_EVEX_L_W_OPSIZE_B, /* 9081 */ IC_EVEX_L_W_OPSIZE_B, /* 9082 */ IC_EVEX_L_W_OPSIZE_B, /* 9083 */ IC_EVEX_L_W_OPSIZE_B, /* 9084 */ IC_EVEX_L_W_OPSIZE_B, /* 9085 */ IC_EVEX_L_W_OPSIZE_B, /* 9086 */ IC_EVEX_L_W_OPSIZE_B, /* 9087 */ IC_EVEX_L_B, /* 9088 */ IC_EVEX_L_B, /* 9089 */ IC_EVEX_L_XS_B, /* 9090 */ IC_EVEX_L_XS_B, /* 9091 */ IC_EVEX_L_XD_B, /* 9092 */ IC_EVEX_L_XD_B, /* 9093 */ IC_EVEX_L_XD_B, /* 9094 */ IC_EVEX_L_XD_B, /* 9095 */ IC_EVEX_L_W_B, /* 9096 */ IC_EVEX_L_W_B, /* 9097 */ IC_EVEX_L_W_XS_B, /* 9098 */ IC_EVEX_L_W_XS_B, /* 9099 */ IC_EVEX_L_W_XD_B, /* 9100 */ IC_EVEX_L_W_XD_B, /* 9101 */ IC_EVEX_L_W_XD_B, /* 9102 */ IC_EVEX_L_W_XD_B, /* 9103 */ IC_EVEX_L_OPSIZE_B, /* 9104 */ IC_EVEX_L_OPSIZE_B, /* 9105 */ IC_EVEX_L_OPSIZE_B, /* 9106 */ IC_EVEX_L_OPSIZE_B, /* 9107 */ IC_EVEX_L_OPSIZE_B, /* 9108 */ IC_EVEX_L_OPSIZE_B, /* 9109 */ IC_EVEX_L_OPSIZE_B, /* 9110 */ IC_EVEX_L_OPSIZE_B, /* 9111 */ IC_EVEX_L_W_OPSIZE_B, /* 9112 */ IC_EVEX_L_W_OPSIZE_B, /* 9113 */ IC_EVEX_L_W_OPSIZE_B, /* 9114 */ IC_EVEX_L_W_OPSIZE_B, /* 9115 */ IC_EVEX_L_W_OPSIZE_B, /* 9116 */ IC_EVEX_L_W_OPSIZE_B, /* 9117 */ IC_EVEX_L_W_OPSIZE_B, /* 9118 */ IC_EVEX_L_W_OPSIZE_B, /* 9119 */ IC_EVEX_L_B, /* 9120 */ IC_EVEX_L_B, /* 9121 */ IC_EVEX_L_XS_B, /* 9122 */ IC_EVEX_L_XS_B, /* 9123 */ IC_EVEX_L_XD_B, /* 9124 */ IC_EVEX_L_XD_B, /* 9125 */ IC_EVEX_L_XD_B, /* 9126 */ IC_EVEX_L_XD_B, /* 9127 */ IC_EVEX_L_W_B, /* 9128 */ IC_EVEX_L_W_B, /* 9129 */ IC_EVEX_L_W_XS_B, /* 9130 */ IC_EVEX_L_W_XS_B, /* 9131 */ IC_EVEX_L_W_XD_B, /* 9132 */ IC_EVEX_L_W_XD_B, /* 9133 */ IC_EVEX_L_W_XD_B, /* 9134 */ IC_EVEX_L_W_XD_B, /* 9135 */ IC_EVEX_L_OPSIZE_B, /* 9136 */ IC_EVEX_L_OPSIZE_B, /* 9137 */ IC_EVEX_L_OPSIZE_B, /* 9138 */ IC_EVEX_L_OPSIZE_B, /* 9139 */ IC_EVEX_L_OPSIZE_B, /* 9140 */ IC_EVEX_L_OPSIZE_B, /* 9141 */ IC_EVEX_L_OPSIZE_B, /* 9142 */ IC_EVEX_L_OPSIZE_B, /* 9143 */ IC_EVEX_L_W_OPSIZE_B, /* 9144 */ IC_EVEX_L_W_OPSIZE_B, /* 9145 */ IC_EVEX_L_W_OPSIZE_B, /* 9146 */ IC_EVEX_L_W_OPSIZE_B, /* 9147 */ IC_EVEX_L_W_OPSIZE_B, /* 9148 */ IC_EVEX_L_W_OPSIZE_B, /* 9149 */ IC_EVEX_L_W_OPSIZE_B, /* 9150 */ IC_EVEX_L_W_OPSIZE_B, /* 9151 */ IC_EVEX_L_B, /* 9152 */ IC_EVEX_L_B, /* 9153 */ IC_EVEX_L_XS_B, /* 9154 */ IC_EVEX_L_XS_B, /* 9155 */ IC_EVEX_L_XD_B, /* 9156 */ IC_EVEX_L_XD_B, /* 9157 */ IC_EVEX_L_XD_B, /* 9158 */ IC_EVEX_L_XD_B, /* 9159 */ IC_EVEX_L_W_B, /* 9160 */ IC_EVEX_L_W_B, /* 9161 */ IC_EVEX_L_W_XS_B, /* 9162 */ IC_EVEX_L_W_XS_B, /* 9163 */ IC_EVEX_L_W_XD_B, /* 9164 */ IC_EVEX_L_W_XD_B, /* 9165 */ IC_EVEX_L_W_XD_B, /* 9166 */ IC_EVEX_L_W_XD_B, /* 9167 */ IC_EVEX_L_OPSIZE_B, /* 9168 */ IC_EVEX_L_OPSIZE_B, /* 9169 */ IC_EVEX_L_OPSIZE_B, /* 9170 */ IC_EVEX_L_OPSIZE_B, /* 9171 */ IC_EVEX_L_OPSIZE_B, /* 9172 */ IC_EVEX_L_OPSIZE_B, /* 9173 */ IC_EVEX_L_OPSIZE_B, /* 9174 */ IC_EVEX_L_OPSIZE_B, /* 9175 */ IC_EVEX_L_W_OPSIZE_B, /* 9176 */ IC_EVEX_L_W_OPSIZE_B, /* 9177 */ IC_EVEX_L_W_OPSIZE_B, /* 9178 */ IC_EVEX_L_W_OPSIZE_B, /* 9179 */ IC_EVEX_L_W_OPSIZE_B, /* 9180 */ IC_EVEX_L_W_OPSIZE_B, /* 9181 */ IC_EVEX_L_W_OPSIZE_B, /* 9182 */ IC_EVEX_L_W_OPSIZE_B, /* 9183 */ IC_EVEX_L_B, /* 9184 */ IC_EVEX_L_B, /* 9185 */ IC_EVEX_L_XS_B, /* 9186 */ IC_EVEX_L_XS_B, /* 9187 */ IC_EVEX_L_XD_B, /* 9188 */ IC_EVEX_L_XD_B, /* 9189 */ IC_EVEX_L_XD_B, /* 9190 */ IC_EVEX_L_XD_B, /* 9191 */ IC_EVEX_L_W_B, /* 9192 */ IC_EVEX_L_W_B, /* 9193 */ IC_EVEX_L_W_XS_B, /* 9194 */ IC_EVEX_L_W_XS_B, /* 9195 */ IC_EVEX_L_W_XD_B, /* 9196 */ IC_EVEX_L_W_XD_B, /* 9197 */ IC_EVEX_L_W_XD_B, /* 9198 */ IC_EVEX_L_W_XD_B, /* 9199 */ IC_EVEX_L_OPSIZE_B, /* 9200 */ IC_EVEX_L_OPSIZE_B, /* 9201 */ IC_EVEX_L_OPSIZE_B, /* 9202 */ IC_EVEX_L_OPSIZE_B, /* 9203 */ IC_EVEX_L_OPSIZE_B, /* 9204 */ IC_EVEX_L_OPSIZE_B, /* 9205 */ IC_EVEX_L_OPSIZE_B, /* 9206 */ IC_EVEX_L_OPSIZE_B, /* 9207 */ IC_EVEX_L_W_OPSIZE_B, /* 9208 */ IC_EVEX_L_W_OPSIZE_B, /* 9209 */ IC_EVEX_L_W_OPSIZE_B, /* 9210 */ IC_EVEX_L_W_OPSIZE_B, /* 9211 */ IC_EVEX_L_W_OPSIZE_B, /* 9212 */ IC_EVEX_L_W_OPSIZE_B, /* 9213 */ IC_EVEX_L_W_OPSIZE_B, /* 9214 */ IC_EVEX_L_W_OPSIZE_B, /* 9215 */ IC, /* 9216 */ IC_64BIT, /* 9217 */ IC_XS, /* 9218 */ IC_64BIT_XS, /* 9219 */ IC_XD, /* 9220 */ IC_64BIT_XD, /* 9221 */ IC_XS, /* 9222 */ IC_64BIT_XS, /* 9223 */ IC, /* 9224 */ IC_64BIT_REXW, /* 9225 */ IC_XS, /* 9226 */ IC_64BIT_REXW_XS, /* 9227 */ IC_XD, /* 9228 */ IC_64BIT_REXW_XD, /* 9229 */ IC_XS, /* 9230 */ IC_64BIT_REXW_XS, /* 9231 */ IC_OPSIZE, /* 9232 */ IC_64BIT_OPSIZE, /* 9233 */ IC_XS_OPSIZE, /* 9234 */ IC_64BIT_XS_OPSIZE, /* 9235 */ IC_XD_OPSIZE, /* 9236 */ IC_64BIT_XD_OPSIZE, /* 9237 */ IC_XS_OPSIZE, /* 9238 */ IC_64BIT_XD_OPSIZE, /* 9239 */ IC_OPSIZE, /* 9240 */ IC_64BIT_REXW_OPSIZE, /* 9241 */ IC_XS_OPSIZE, /* 9242 */ IC_64BIT_REXW_XS, /* 9243 */ IC_XD_OPSIZE, /* 9244 */ IC_64BIT_REXW_XD, /* 9245 */ IC_XS_OPSIZE, /* 9246 */ IC_64BIT_REXW_XS, /* 9247 */ IC_ADSIZE, /* 9248 */ IC_64BIT_ADSIZE, /* 9249 */ IC_XS, /* 9250 */ IC_64BIT_XS, /* 9251 */ IC_XD, /* 9252 */ IC_64BIT_XD, /* 9253 */ IC_XS, /* 9254 */ IC_64BIT_XS, /* 9255 */ IC_ADSIZE, /* 9256 */ IC_64BIT_REXW_ADSIZE, /* 9257 */ IC_XS, /* 9258 */ IC_64BIT_REXW_XS, /* 9259 */ IC_XD, /* 9260 */ IC_64BIT_REXW_XD, /* 9261 */ IC_XS, /* 9262 */ IC_64BIT_REXW_XS, /* 9263 */ IC_OPSIZE_ADSIZE, /* 9264 */ IC_64BIT_OPSIZE_ADSIZE, /* 9265 */ IC_XS_OPSIZE, /* 9266 */ IC_64BIT_XS_OPSIZE, /* 9267 */ IC_XD_OPSIZE, /* 9268 */ IC_64BIT_XD_OPSIZE, /* 9269 */ IC_XS_OPSIZE, /* 9270 */ IC_64BIT_XD_OPSIZE, /* 9271 */ IC_OPSIZE_ADSIZE, /* 9272 */ IC_64BIT_REXW_OPSIZE, /* 9273 */ IC_XS_OPSIZE, /* 9274 */ IC_64BIT_REXW_XS, /* 9275 */ IC_XD_OPSIZE, /* 9276 */ IC_64BIT_REXW_XD, /* 9277 */ IC_XS_OPSIZE, /* 9278 */ IC_64BIT_REXW_XS, /* 9279 */ IC_VEX, /* 9280 */ IC_VEX, /* 9281 */ IC_VEX_XS, /* 9282 */ IC_VEX_XS, /* 9283 */ IC_VEX_XD, /* 9284 */ IC_VEX_XD, /* 9285 */ IC_VEX_XD, /* 9286 */ IC_VEX_XD, /* 9287 */ IC_VEX_W, /* 9288 */ IC_VEX_W, /* 9289 */ IC_VEX_W_XS, /* 9290 */ IC_VEX_W_XS, /* 9291 */ IC_VEX_W_XD, /* 9292 */ IC_VEX_W_XD, /* 9293 */ IC_VEX_W_XD, /* 9294 */ IC_VEX_W_XD, /* 9295 */ IC_VEX_OPSIZE, /* 9296 */ IC_VEX_OPSIZE, /* 9297 */ IC_VEX_OPSIZE, /* 9298 */ IC_VEX_OPSIZE, /* 9299 */ IC_VEX_OPSIZE, /* 9300 */ IC_VEX_OPSIZE, /* 9301 */ IC_VEX_OPSIZE, /* 9302 */ IC_VEX_OPSIZE, /* 9303 */ IC_VEX_W_OPSIZE, /* 9304 */ IC_VEX_W_OPSIZE, /* 9305 */ IC_VEX_W_OPSIZE, /* 9306 */ IC_VEX_W_OPSIZE, /* 9307 */ IC_VEX_W_OPSIZE, /* 9308 */ IC_VEX_W_OPSIZE, /* 9309 */ IC_VEX_W_OPSIZE, /* 9310 */ IC_VEX_W_OPSIZE, /* 9311 */ IC_VEX, /* 9312 */ IC_VEX, /* 9313 */ IC_VEX_XS, /* 9314 */ IC_VEX_XS, /* 9315 */ IC_VEX_XD, /* 9316 */ IC_VEX_XD, /* 9317 */ IC_VEX_XD, /* 9318 */ IC_VEX_XD, /* 9319 */ IC_VEX_W, /* 9320 */ IC_VEX_W, /* 9321 */ IC_VEX_W_XS, /* 9322 */ IC_VEX_W_XS, /* 9323 */ IC_VEX_W_XD, /* 9324 */ IC_VEX_W_XD, /* 9325 */ IC_VEX_W_XD, /* 9326 */ IC_VEX_W_XD, /* 9327 */ IC_VEX_OPSIZE, /* 9328 */ IC_VEX_OPSIZE, /* 9329 */ IC_VEX_OPSIZE, /* 9330 */ IC_VEX_OPSIZE, /* 9331 */ IC_VEX_OPSIZE, /* 9332 */ IC_VEX_OPSIZE, /* 9333 */ IC_VEX_OPSIZE, /* 9334 */ IC_VEX_OPSIZE, /* 9335 */ IC_VEX_W_OPSIZE, /* 9336 */ IC_VEX_W_OPSIZE, /* 9337 */ IC_VEX_W_OPSIZE, /* 9338 */ IC_VEX_W_OPSIZE, /* 9339 */ IC_VEX_W_OPSIZE, /* 9340 */ IC_VEX_W_OPSIZE, /* 9341 */ IC_VEX_W_OPSIZE, /* 9342 */ IC_VEX_W_OPSIZE, /* 9343 */ IC_VEX_L, /* 9344 */ IC_VEX_L, /* 9345 */ IC_VEX_L_XS, /* 9346 */ IC_VEX_L_XS, /* 9347 */ IC_VEX_L_XD, /* 9348 */ IC_VEX_L_XD, /* 9349 */ IC_VEX_L_XD, /* 9350 */ IC_VEX_L_XD, /* 9351 */ IC_VEX_L_W, /* 9352 */ IC_VEX_L_W, /* 9353 */ IC_VEX_L_W_XS, /* 9354 */ IC_VEX_L_W_XS, /* 9355 */ IC_VEX_L_W_XD, /* 9356 */ IC_VEX_L_W_XD, /* 9357 */ IC_VEX_L_W_XD, /* 9358 */ IC_VEX_L_W_XD, /* 9359 */ IC_VEX_L_OPSIZE, /* 9360 */ IC_VEX_L_OPSIZE, /* 9361 */ IC_VEX_L_OPSIZE, /* 9362 */ IC_VEX_L_OPSIZE, /* 9363 */ IC_VEX_L_OPSIZE, /* 9364 */ IC_VEX_L_OPSIZE, /* 9365 */ IC_VEX_L_OPSIZE, /* 9366 */ IC_VEX_L_OPSIZE, /* 9367 */ IC_VEX_L_W_OPSIZE, /* 9368 */ IC_VEX_L_W_OPSIZE, /* 9369 */ IC_VEX_L_W_OPSIZE, /* 9370 */ IC_VEX_L_W_OPSIZE, /* 9371 */ IC_VEX_L_W_OPSIZE, /* 9372 */ IC_VEX_L_W_OPSIZE, /* 9373 */ IC_VEX_L_W_OPSIZE, /* 9374 */ IC_VEX_L_W_OPSIZE, /* 9375 */ IC_VEX_L, /* 9376 */ IC_VEX_L, /* 9377 */ IC_VEX_L_XS, /* 9378 */ IC_VEX_L_XS, /* 9379 */ IC_VEX_L_XD, /* 9380 */ IC_VEX_L_XD, /* 9381 */ IC_VEX_L_XD, /* 9382 */ IC_VEX_L_XD, /* 9383 */ IC_VEX_L_W, /* 9384 */ IC_VEX_L_W, /* 9385 */ IC_VEX_L_W_XS, /* 9386 */ IC_VEX_L_W_XS, /* 9387 */ IC_VEX_L_W_XD, /* 9388 */ IC_VEX_L_W_XD, /* 9389 */ IC_VEX_L_W_XD, /* 9390 */ IC_VEX_L_W_XD, /* 9391 */ IC_VEX_L_OPSIZE, /* 9392 */ IC_VEX_L_OPSIZE, /* 9393 */ IC_VEX_L_OPSIZE, /* 9394 */ IC_VEX_L_OPSIZE, /* 9395 */ IC_VEX_L_OPSIZE, /* 9396 */ IC_VEX_L_OPSIZE, /* 9397 */ IC_VEX_L_OPSIZE, /* 9398 */ IC_VEX_L_OPSIZE, /* 9399 */ IC_VEX_L_W_OPSIZE, /* 9400 */ IC_VEX_L_W_OPSIZE, /* 9401 */ IC_VEX_L_W_OPSIZE, /* 9402 */ IC_VEX_L_W_OPSIZE, /* 9403 */ IC_VEX_L_W_OPSIZE, /* 9404 */ IC_VEX_L_W_OPSIZE, /* 9405 */ IC_VEX_L_W_OPSIZE, /* 9406 */ IC_VEX_L_W_OPSIZE, /* 9407 */ IC_VEX_L, /* 9408 */ IC_VEX_L, /* 9409 */ IC_VEX_L_XS, /* 9410 */ IC_VEX_L_XS, /* 9411 */ IC_VEX_L_XD, /* 9412 */ IC_VEX_L_XD, /* 9413 */ IC_VEX_L_XD, /* 9414 */ IC_VEX_L_XD, /* 9415 */ IC_VEX_L_W, /* 9416 */ IC_VEX_L_W, /* 9417 */ IC_VEX_L_W_XS, /* 9418 */ IC_VEX_L_W_XS, /* 9419 */ IC_VEX_L_W_XD, /* 9420 */ IC_VEX_L_W_XD, /* 9421 */ IC_VEX_L_W_XD, /* 9422 */ IC_VEX_L_W_XD, /* 9423 */ IC_VEX_L_OPSIZE, /* 9424 */ IC_VEX_L_OPSIZE, /* 9425 */ IC_VEX_L_OPSIZE, /* 9426 */ IC_VEX_L_OPSIZE, /* 9427 */ IC_VEX_L_OPSIZE, /* 9428 */ IC_VEX_L_OPSIZE, /* 9429 */ IC_VEX_L_OPSIZE, /* 9430 */ IC_VEX_L_OPSIZE, /* 9431 */ IC_VEX_L_W_OPSIZE, /* 9432 */ IC_VEX_L_W_OPSIZE, /* 9433 */ IC_VEX_L_W_OPSIZE, /* 9434 */ IC_VEX_L_W_OPSIZE, /* 9435 */ IC_VEX_L_W_OPSIZE, /* 9436 */ IC_VEX_L_W_OPSIZE, /* 9437 */ IC_VEX_L_W_OPSIZE, /* 9438 */ IC_VEX_L_W_OPSIZE, /* 9439 */ IC_VEX_L, /* 9440 */ IC_VEX_L, /* 9441 */ IC_VEX_L_XS, /* 9442 */ IC_VEX_L_XS, /* 9443 */ IC_VEX_L_XD, /* 9444 */ IC_VEX_L_XD, /* 9445 */ IC_VEX_L_XD, /* 9446 */ IC_VEX_L_XD, /* 9447 */ IC_VEX_L_W, /* 9448 */ IC_VEX_L_W, /* 9449 */ IC_VEX_L_W_XS, /* 9450 */ IC_VEX_L_W_XS, /* 9451 */ IC_VEX_L_W_XD, /* 9452 */ IC_VEX_L_W_XD, /* 9453 */ IC_VEX_L_W_XD, /* 9454 */ IC_VEX_L_W_XD, /* 9455 */ IC_VEX_L_OPSIZE, /* 9456 */ IC_VEX_L_OPSIZE, /* 9457 */ IC_VEX_L_OPSIZE, /* 9458 */ IC_VEX_L_OPSIZE, /* 9459 */ IC_VEX_L_OPSIZE, /* 9460 */ IC_VEX_L_OPSIZE, /* 9461 */ IC_VEX_L_OPSIZE, /* 9462 */ IC_VEX_L_OPSIZE, /* 9463 */ IC_VEX_L_W_OPSIZE, /* 9464 */ IC_VEX_L_W_OPSIZE, /* 9465 */ IC_VEX_L_W_OPSIZE, /* 9466 */ IC_VEX_L_W_OPSIZE, /* 9467 */ IC_VEX_L_W_OPSIZE, /* 9468 */ IC_VEX_L_W_OPSIZE, /* 9469 */ IC_VEX_L_W_OPSIZE, /* 9470 */ IC_VEX_L_W_OPSIZE, /* 9471 */ IC_EVEX_L2_B, /* 9472 */ IC_EVEX_L2_B, /* 9473 */ IC_EVEX_L2_XS_B, /* 9474 */ IC_EVEX_L2_XS_B, /* 9475 */ IC_EVEX_L2_XD_B, /* 9476 */ IC_EVEX_L2_XD_B, /* 9477 */ IC_EVEX_L2_XD_B, /* 9478 */ IC_EVEX_L2_XD_B, /* 9479 */ IC_EVEX_L2_W_B, /* 9480 */ IC_EVEX_L2_W_B, /* 9481 */ IC_EVEX_L2_W_XS_B, /* 9482 */ IC_EVEX_L2_W_XS_B, /* 9483 */ IC_EVEX_L2_W_XD_B, /* 9484 */ IC_EVEX_L2_W_XD_B, /* 9485 */ IC_EVEX_L2_W_XD_B, /* 9486 */ IC_EVEX_L2_W_XD_B, /* 9487 */ IC_EVEX_L2_OPSIZE_B, /* 9488 */ IC_EVEX_L2_OPSIZE_B, /* 9489 */ IC_EVEX_L2_OPSIZE_B, /* 9490 */ IC_EVEX_L2_OPSIZE_B, /* 9491 */ IC_EVEX_L2_OPSIZE_B, /* 9492 */ IC_EVEX_L2_OPSIZE_B, /* 9493 */ IC_EVEX_L2_OPSIZE_B, /* 9494 */ IC_EVEX_L2_OPSIZE_B, /* 9495 */ IC_EVEX_L2_W_OPSIZE_B, /* 9496 */ IC_EVEX_L2_W_OPSIZE_B, /* 9497 */ IC_EVEX_L2_W_OPSIZE_B, /* 9498 */ IC_EVEX_L2_W_OPSIZE_B, /* 9499 */ IC_EVEX_L2_W_OPSIZE_B, /* 9500 */ IC_EVEX_L2_W_OPSIZE_B, /* 9501 */ IC_EVEX_L2_W_OPSIZE_B, /* 9502 */ IC_EVEX_L2_W_OPSIZE_B, /* 9503 */ IC_EVEX_L2_B, /* 9504 */ IC_EVEX_L2_B, /* 9505 */ IC_EVEX_L2_XS_B, /* 9506 */ IC_EVEX_L2_XS_B, /* 9507 */ IC_EVEX_L2_XD_B, /* 9508 */ IC_EVEX_L2_XD_B, /* 9509 */ IC_EVEX_L2_XD_B, /* 9510 */ IC_EVEX_L2_XD_B, /* 9511 */ IC_EVEX_L2_W_B, /* 9512 */ IC_EVEX_L2_W_B, /* 9513 */ IC_EVEX_L2_W_XS_B, /* 9514 */ IC_EVEX_L2_W_XS_B, /* 9515 */ IC_EVEX_L2_W_XD_B, /* 9516 */ IC_EVEX_L2_W_XD_B, /* 9517 */ IC_EVEX_L2_W_XD_B, /* 9518 */ IC_EVEX_L2_W_XD_B, /* 9519 */ IC_EVEX_L2_OPSIZE_B, /* 9520 */ IC_EVEX_L2_OPSIZE_B, /* 9521 */ IC_EVEX_L2_OPSIZE_B, /* 9522 */ IC_EVEX_L2_OPSIZE_B, /* 9523 */ IC_EVEX_L2_OPSIZE_B, /* 9524 */ IC_EVEX_L2_OPSIZE_B, /* 9525 */ IC_EVEX_L2_OPSIZE_B, /* 9526 */ IC_EVEX_L2_OPSIZE_B, /* 9527 */ IC_EVEX_L2_W_OPSIZE_B, /* 9528 */ IC_EVEX_L2_W_OPSIZE_B, /* 9529 */ IC_EVEX_L2_W_OPSIZE_B, /* 9530 */ IC_EVEX_L2_W_OPSIZE_B, /* 9531 */ IC_EVEX_L2_W_OPSIZE_B, /* 9532 */ IC_EVEX_L2_W_OPSIZE_B, /* 9533 */ IC_EVEX_L2_W_OPSIZE_B, /* 9534 */ IC_EVEX_L2_W_OPSIZE_B, /* 9535 */ IC_EVEX_L2_B, /* 9536 */ IC_EVEX_L2_B, /* 9537 */ IC_EVEX_L2_XS_B, /* 9538 */ IC_EVEX_L2_XS_B, /* 9539 */ IC_EVEX_L2_XD_B, /* 9540 */ IC_EVEX_L2_XD_B, /* 9541 */ IC_EVEX_L2_XD_B, /* 9542 */ IC_EVEX_L2_XD_B, /* 9543 */ IC_EVEX_L2_W_B, /* 9544 */ IC_EVEX_L2_W_B, /* 9545 */ IC_EVEX_L2_W_XS_B, /* 9546 */ IC_EVEX_L2_W_XS_B, /* 9547 */ IC_EVEX_L2_W_XD_B, /* 9548 */ IC_EVEX_L2_W_XD_B, /* 9549 */ IC_EVEX_L2_W_XD_B, /* 9550 */ IC_EVEX_L2_W_XD_B, /* 9551 */ IC_EVEX_L2_OPSIZE_B, /* 9552 */ IC_EVEX_L2_OPSIZE_B, /* 9553 */ IC_EVEX_L2_OPSIZE_B, /* 9554 */ IC_EVEX_L2_OPSIZE_B, /* 9555 */ IC_EVEX_L2_OPSIZE_B, /* 9556 */ IC_EVEX_L2_OPSIZE_B, /* 9557 */ IC_EVEX_L2_OPSIZE_B, /* 9558 */ IC_EVEX_L2_OPSIZE_B, /* 9559 */ IC_EVEX_L2_W_OPSIZE_B, /* 9560 */ IC_EVEX_L2_W_OPSIZE_B, /* 9561 */ IC_EVEX_L2_W_OPSIZE_B, /* 9562 */ IC_EVEX_L2_W_OPSIZE_B, /* 9563 */ IC_EVEX_L2_W_OPSIZE_B, /* 9564 */ IC_EVEX_L2_W_OPSIZE_B, /* 9565 */ IC_EVEX_L2_W_OPSIZE_B, /* 9566 */ IC_EVEX_L2_W_OPSIZE_B, /* 9567 */ IC_EVEX_L2_B, /* 9568 */ IC_EVEX_L2_B, /* 9569 */ IC_EVEX_L2_XS_B, /* 9570 */ IC_EVEX_L2_XS_B, /* 9571 */ IC_EVEX_L2_XD_B, /* 9572 */ IC_EVEX_L2_XD_B, /* 9573 */ IC_EVEX_L2_XD_B, /* 9574 */ IC_EVEX_L2_XD_B, /* 9575 */ IC_EVEX_L2_W_B, /* 9576 */ IC_EVEX_L2_W_B, /* 9577 */ IC_EVEX_L2_W_XS_B, /* 9578 */ IC_EVEX_L2_W_XS_B, /* 9579 */ IC_EVEX_L2_W_XD_B, /* 9580 */ IC_EVEX_L2_W_XD_B, /* 9581 */ IC_EVEX_L2_W_XD_B, /* 9582 */ IC_EVEX_L2_W_XD_B, /* 9583 */ IC_EVEX_L2_OPSIZE_B, /* 9584 */ IC_EVEX_L2_OPSIZE_B, /* 9585 */ IC_EVEX_L2_OPSIZE_B, /* 9586 */ IC_EVEX_L2_OPSIZE_B, /* 9587 */ IC_EVEX_L2_OPSIZE_B, /* 9588 */ IC_EVEX_L2_OPSIZE_B, /* 9589 */ IC_EVEX_L2_OPSIZE_B, /* 9590 */ IC_EVEX_L2_OPSIZE_B, /* 9591 */ IC_EVEX_L2_W_OPSIZE_B, /* 9592 */ IC_EVEX_L2_W_OPSIZE_B, /* 9593 */ IC_EVEX_L2_W_OPSIZE_B, /* 9594 */ IC_EVEX_L2_W_OPSIZE_B, /* 9595 */ IC_EVEX_L2_W_OPSIZE_B, /* 9596 */ IC_EVEX_L2_W_OPSIZE_B, /* 9597 */ IC_EVEX_L2_W_OPSIZE_B, /* 9598 */ IC_EVEX_L2_W_OPSIZE_B, /* 9599 */ IC_EVEX_L2_B, /* 9600 */ IC_EVEX_L2_B, /* 9601 */ IC_EVEX_L2_XS_B, /* 9602 */ IC_EVEX_L2_XS_B, /* 9603 */ IC_EVEX_L2_XD_B, /* 9604 */ IC_EVEX_L2_XD_B, /* 9605 */ IC_EVEX_L2_XD_B, /* 9606 */ IC_EVEX_L2_XD_B, /* 9607 */ IC_EVEX_L2_W_B, /* 9608 */ IC_EVEX_L2_W_B, /* 9609 */ IC_EVEX_L2_W_XS_B, /* 9610 */ IC_EVEX_L2_W_XS_B, /* 9611 */ IC_EVEX_L2_W_XD_B, /* 9612 */ IC_EVEX_L2_W_XD_B, /* 9613 */ IC_EVEX_L2_W_XD_B, /* 9614 */ IC_EVEX_L2_W_XD_B, /* 9615 */ IC_EVEX_L2_OPSIZE_B, /* 9616 */ IC_EVEX_L2_OPSIZE_B, /* 9617 */ IC_EVEX_L2_OPSIZE_B, /* 9618 */ IC_EVEX_L2_OPSIZE_B, /* 9619 */ IC_EVEX_L2_OPSIZE_B, /* 9620 */ IC_EVEX_L2_OPSIZE_B, /* 9621 */ IC_EVEX_L2_OPSIZE_B, /* 9622 */ IC_EVEX_L2_OPSIZE_B, /* 9623 */ IC_EVEX_L2_W_OPSIZE_B, /* 9624 */ IC_EVEX_L2_W_OPSIZE_B, /* 9625 */ IC_EVEX_L2_W_OPSIZE_B, /* 9626 */ IC_EVEX_L2_W_OPSIZE_B, /* 9627 */ IC_EVEX_L2_W_OPSIZE_B, /* 9628 */ IC_EVEX_L2_W_OPSIZE_B, /* 9629 */ IC_EVEX_L2_W_OPSIZE_B, /* 9630 */ IC_EVEX_L2_W_OPSIZE_B, /* 9631 */ IC_EVEX_L2_B, /* 9632 */ IC_EVEX_L2_B, /* 9633 */ IC_EVEX_L2_XS_B, /* 9634 */ IC_EVEX_L2_XS_B, /* 9635 */ IC_EVEX_L2_XD_B, /* 9636 */ IC_EVEX_L2_XD_B, /* 9637 */ IC_EVEX_L2_XD_B, /* 9638 */ IC_EVEX_L2_XD_B, /* 9639 */ IC_EVEX_L2_W_B, /* 9640 */ IC_EVEX_L2_W_B, /* 9641 */ IC_EVEX_L2_W_XS_B, /* 9642 */ IC_EVEX_L2_W_XS_B, /* 9643 */ IC_EVEX_L2_W_XD_B, /* 9644 */ IC_EVEX_L2_W_XD_B, /* 9645 */ IC_EVEX_L2_W_XD_B, /* 9646 */ IC_EVEX_L2_W_XD_B, /* 9647 */ IC_EVEX_L2_OPSIZE_B, /* 9648 */ IC_EVEX_L2_OPSIZE_B, /* 9649 */ IC_EVEX_L2_OPSIZE_B, /* 9650 */ IC_EVEX_L2_OPSIZE_B, /* 9651 */ IC_EVEX_L2_OPSIZE_B, /* 9652 */ IC_EVEX_L2_OPSIZE_B, /* 9653 */ IC_EVEX_L2_OPSIZE_B, /* 9654 */ IC_EVEX_L2_OPSIZE_B, /* 9655 */ IC_EVEX_L2_W_OPSIZE_B, /* 9656 */ IC_EVEX_L2_W_OPSIZE_B, /* 9657 */ IC_EVEX_L2_W_OPSIZE_B, /* 9658 */ IC_EVEX_L2_W_OPSIZE_B, /* 9659 */ IC_EVEX_L2_W_OPSIZE_B, /* 9660 */ IC_EVEX_L2_W_OPSIZE_B, /* 9661 */ IC_EVEX_L2_W_OPSIZE_B, /* 9662 */ IC_EVEX_L2_W_OPSIZE_B, /* 9663 */ IC_EVEX_L2_B, /* 9664 */ IC_EVEX_L2_B, /* 9665 */ IC_EVEX_L2_XS_B, /* 9666 */ IC_EVEX_L2_XS_B, /* 9667 */ IC_EVEX_L2_XD_B, /* 9668 */ IC_EVEX_L2_XD_B, /* 9669 */ IC_EVEX_L2_XD_B, /* 9670 */ IC_EVEX_L2_XD_B, /* 9671 */ IC_EVEX_L2_W_B, /* 9672 */ IC_EVEX_L2_W_B, /* 9673 */ IC_EVEX_L2_W_XS_B, /* 9674 */ IC_EVEX_L2_W_XS_B, /* 9675 */ IC_EVEX_L2_W_XD_B, /* 9676 */ IC_EVEX_L2_W_XD_B, /* 9677 */ IC_EVEX_L2_W_XD_B, /* 9678 */ IC_EVEX_L2_W_XD_B, /* 9679 */ IC_EVEX_L2_OPSIZE_B, /* 9680 */ IC_EVEX_L2_OPSIZE_B, /* 9681 */ IC_EVEX_L2_OPSIZE_B, /* 9682 */ IC_EVEX_L2_OPSIZE_B, /* 9683 */ IC_EVEX_L2_OPSIZE_B, /* 9684 */ IC_EVEX_L2_OPSIZE_B, /* 9685 */ IC_EVEX_L2_OPSIZE_B, /* 9686 */ IC_EVEX_L2_OPSIZE_B, /* 9687 */ IC_EVEX_L2_W_OPSIZE_B, /* 9688 */ IC_EVEX_L2_W_OPSIZE_B, /* 9689 */ IC_EVEX_L2_W_OPSIZE_B, /* 9690 */ IC_EVEX_L2_W_OPSIZE_B, /* 9691 */ IC_EVEX_L2_W_OPSIZE_B, /* 9692 */ IC_EVEX_L2_W_OPSIZE_B, /* 9693 */ IC_EVEX_L2_W_OPSIZE_B, /* 9694 */ IC_EVEX_L2_W_OPSIZE_B, /* 9695 */ IC_EVEX_L2_B, /* 9696 */ IC_EVEX_L2_B, /* 9697 */ IC_EVEX_L2_XS_B, /* 9698 */ IC_EVEX_L2_XS_B, /* 9699 */ IC_EVEX_L2_XD_B, /* 9700 */ IC_EVEX_L2_XD_B, /* 9701 */ IC_EVEX_L2_XD_B, /* 9702 */ IC_EVEX_L2_XD_B, /* 9703 */ IC_EVEX_L2_W_B, /* 9704 */ IC_EVEX_L2_W_B, /* 9705 */ IC_EVEX_L2_W_XS_B, /* 9706 */ IC_EVEX_L2_W_XS_B, /* 9707 */ IC_EVEX_L2_W_XD_B, /* 9708 */ IC_EVEX_L2_W_XD_B, /* 9709 */ IC_EVEX_L2_W_XD_B, /* 9710 */ IC_EVEX_L2_W_XD_B, /* 9711 */ IC_EVEX_L2_OPSIZE_B, /* 9712 */ IC_EVEX_L2_OPSIZE_B, /* 9713 */ IC_EVEX_L2_OPSIZE_B, /* 9714 */ IC_EVEX_L2_OPSIZE_B, /* 9715 */ IC_EVEX_L2_OPSIZE_B, /* 9716 */ IC_EVEX_L2_OPSIZE_B, /* 9717 */ IC_EVEX_L2_OPSIZE_B, /* 9718 */ IC_EVEX_L2_OPSIZE_B, /* 9719 */ IC_EVEX_L2_W_OPSIZE_B, /* 9720 */ IC_EVEX_L2_W_OPSIZE_B, /* 9721 */ IC_EVEX_L2_W_OPSIZE_B, /* 9722 */ IC_EVEX_L2_W_OPSIZE_B, /* 9723 */ IC_EVEX_L2_W_OPSIZE_B, /* 9724 */ IC_EVEX_L2_W_OPSIZE_B, /* 9725 */ IC_EVEX_L2_W_OPSIZE_B, /* 9726 */ IC_EVEX_L2_W_OPSIZE_B, /* 9727 */ IC, /* 9728 */ IC_64BIT, /* 9729 */ IC_XS, /* 9730 */ IC_64BIT_XS, /* 9731 */ IC_XD, /* 9732 */ IC_64BIT_XD, /* 9733 */ IC_XS, /* 9734 */ IC_64BIT_XS, /* 9735 */ IC, /* 9736 */ IC_64BIT_REXW, /* 9737 */ IC_XS, /* 9738 */ IC_64BIT_REXW_XS, /* 9739 */ IC_XD, /* 9740 */ IC_64BIT_REXW_XD, /* 9741 */ IC_XS, /* 9742 */ IC_64BIT_REXW_XS, /* 9743 */ IC_OPSIZE, /* 9744 */ IC_64BIT_OPSIZE, /* 9745 */ IC_XS_OPSIZE, /* 9746 */ IC_64BIT_XS_OPSIZE, /* 9747 */ IC_XD_OPSIZE, /* 9748 */ IC_64BIT_XD_OPSIZE, /* 9749 */ IC_XS_OPSIZE, /* 9750 */ IC_64BIT_XD_OPSIZE, /* 9751 */ IC_OPSIZE, /* 9752 */ IC_64BIT_REXW_OPSIZE, /* 9753 */ IC_XS_OPSIZE, /* 9754 */ IC_64BIT_REXW_XS, /* 9755 */ IC_XD_OPSIZE, /* 9756 */ IC_64BIT_REXW_XD, /* 9757 */ IC_XS_OPSIZE, /* 9758 */ IC_64BIT_REXW_XS, /* 9759 */ IC_ADSIZE, /* 9760 */ IC_64BIT_ADSIZE, /* 9761 */ IC_XS, /* 9762 */ IC_64BIT_XS, /* 9763 */ IC_XD, /* 9764 */ IC_64BIT_XD, /* 9765 */ IC_XS, /* 9766 */ IC_64BIT_XS, /* 9767 */ IC_ADSIZE, /* 9768 */ IC_64BIT_REXW_ADSIZE, /* 9769 */ IC_XS, /* 9770 */ IC_64BIT_REXW_XS, /* 9771 */ IC_XD, /* 9772 */ IC_64BIT_REXW_XD, /* 9773 */ IC_XS, /* 9774 */ IC_64BIT_REXW_XS, /* 9775 */ IC_OPSIZE_ADSIZE, /* 9776 */ IC_64BIT_OPSIZE_ADSIZE, /* 9777 */ IC_XS_OPSIZE, /* 9778 */ IC_64BIT_XS_OPSIZE, /* 9779 */ IC_XD_OPSIZE, /* 9780 */ IC_64BIT_XD_OPSIZE, /* 9781 */ IC_XS_OPSIZE, /* 9782 */ IC_64BIT_XD_OPSIZE, /* 9783 */ IC_OPSIZE_ADSIZE, /* 9784 */ IC_64BIT_REXW_OPSIZE, /* 9785 */ IC_XS_OPSIZE, /* 9786 */ IC_64BIT_REXW_XS, /* 9787 */ IC_XD_OPSIZE, /* 9788 */ IC_64BIT_REXW_XD, /* 9789 */ IC_XS_OPSIZE, /* 9790 */ IC_64BIT_REXW_XS, /* 9791 */ IC_VEX, /* 9792 */ IC_VEX, /* 9793 */ IC_VEX_XS, /* 9794 */ IC_VEX_XS, /* 9795 */ IC_VEX_XD, /* 9796 */ IC_VEX_XD, /* 9797 */ IC_VEX_XD, /* 9798 */ IC_VEX_XD, /* 9799 */ IC_VEX_W, /* 9800 */ IC_VEX_W, /* 9801 */ IC_VEX_W_XS, /* 9802 */ IC_VEX_W_XS, /* 9803 */ IC_VEX_W_XD, /* 9804 */ IC_VEX_W_XD, /* 9805 */ IC_VEX_W_XD, /* 9806 */ IC_VEX_W_XD, /* 9807 */ IC_VEX_OPSIZE, /* 9808 */ IC_VEX_OPSIZE, /* 9809 */ IC_VEX_OPSIZE, /* 9810 */ IC_VEX_OPSIZE, /* 9811 */ IC_VEX_OPSIZE, /* 9812 */ IC_VEX_OPSIZE, /* 9813 */ IC_VEX_OPSIZE, /* 9814 */ IC_VEX_OPSIZE, /* 9815 */ IC_VEX_W_OPSIZE, /* 9816 */ IC_VEX_W_OPSIZE, /* 9817 */ IC_VEX_W_OPSIZE, /* 9818 */ IC_VEX_W_OPSIZE, /* 9819 */ IC_VEX_W_OPSIZE, /* 9820 */ IC_VEX_W_OPSIZE, /* 9821 */ IC_VEX_W_OPSIZE, /* 9822 */ IC_VEX_W_OPSIZE, /* 9823 */ IC_VEX, /* 9824 */ IC_VEX, /* 9825 */ IC_VEX_XS, /* 9826 */ IC_VEX_XS, /* 9827 */ IC_VEX_XD, /* 9828 */ IC_VEX_XD, /* 9829 */ IC_VEX_XD, /* 9830 */ IC_VEX_XD, /* 9831 */ IC_VEX_W, /* 9832 */ IC_VEX_W, /* 9833 */ IC_VEX_W_XS, /* 9834 */ IC_VEX_W_XS, /* 9835 */ IC_VEX_W_XD, /* 9836 */ IC_VEX_W_XD, /* 9837 */ IC_VEX_W_XD, /* 9838 */ IC_VEX_W_XD, /* 9839 */ IC_VEX_OPSIZE, /* 9840 */ IC_VEX_OPSIZE, /* 9841 */ IC_VEX_OPSIZE, /* 9842 */ IC_VEX_OPSIZE, /* 9843 */ IC_VEX_OPSIZE, /* 9844 */ IC_VEX_OPSIZE, /* 9845 */ IC_VEX_OPSIZE, /* 9846 */ IC_VEX_OPSIZE, /* 9847 */ IC_VEX_W_OPSIZE, /* 9848 */ IC_VEX_W_OPSIZE, /* 9849 */ IC_VEX_W_OPSIZE, /* 9850 */ IC_VEX_W_OPSIZE, /* 9851 */ IC_VEX_W_OPSIZE, /* 9852 */ IC_VEX_W_OPSIZE, /* 9853 */ IC_VEX_W_OPSIZE, /* 9854 */ IC_VEX_W_OPSIZE, /* 9855 */ IC_VEX_L, /* 9856 */ IC_VEX_L, /* 9857 */ IC_VEX_L_XS, /* 9858 */ IC_VEX_L_XS, /* 9859 */ IC_VEX_L_XD, /* 9860 */ IC_VEX_L_XD, /* 9861 */ IC_VEX_L_XD, /* 9862 */ IC_VEX_L_XD, /* 9863 */ IC_VEX_L_W, /* 9864 */ IC_VEX_L_W, /* 9865 */ IC_VEX_L_W_XS, /* 9866 */ IC_VEX_L_W_XS, /* 9867 */ IC_VEX_L_W_XD, /* 9868 */ IC_VEX_L_W_XD, /* 9869 */ IC_VEX_L_W_XD, /* 9870 */ IC_VEX_L_W_XD, /* 9871 */ IC_VEX_L_OPSIZE, /* 9872 */ IC_VEX_L_OPSIZE, /* 9873 */ IC_VEX_L_OPSIZE, /* 9874 */ IC_VEX_L_OPSIZE, /* 9875 */ IC_VEX_L_OPSIZE, /* 9876 */ IC_VEX_L_OPSIZE, /* 9877 */ IC_VEX_L_OPSIZE, /* 9878 */ IC_VEX_L_OPSIZE, /* 9879 */ IC_VEX_L_W_OPSIZE, /* 9880 */ IC_VEX_L_W_OPSIZE, /* 9881 */ IC_VEX_L_W_OPSIZE, /* 9882 */ IC_VEX_L_W_OPSIZE, /* 9883 */ IC_VEX_L_W_OPSIZE, /* 9884 */ IC_VEX_L_W_OPSIZE, /* 9885 */ IC_VEX_L_W_OPSIZE, /* 9886 */ IC_VEX_L_W_OPSIZE, /* 9887 */ IC_VEX_L, /* 9888 */ IC_VEX_L, /* 9889 */ IC_VEX_L_XS, /* 9890 */ IC_VEX_L_XS, /* 9891 */ IC_VEX_L_XD, /* 9892 */ IC_VEX_L_XD, /* 9893 */ IC_VEX_L_XD, /* 9894 */ IC_VEX_L_XD, /* 9895 */ IC_VEX_L_W, /* 9896 */ IC_VEX_L_W, /* 9897 */ IC_VEX_L_W_XS, /* 9898 */ IC_VEX_L_W_XS, /* 9899 */ IC_VEX_L_W_XD, /* 9900 */ IC_VEX_L_W_XD, /* 9901 */ IC_VEX_L_W_XD, /* 9902 */ IC_VEX_L_W_XD, /* 9903 */ IC_VEX_L_OPSIZE, /* 9904 */ IC_VEX_L_OPSIZE, /* 9905 */ IC_VEX_L_OPSIZE, /* 9906 */ IC_VEX_L_OPSIZE, /* 9907 */ IC_VEX_L_OPSIZE, /* 9908 */ IC_VEX_L_OPSIZE, /* 9909 */ IC_VEX_L_OPSIZE, /* 9910 */ IC_VEX_L_OPSIZE, /* 9911 */ IC_VEX_L_W_OPSIZE, /* 9912 */ IC_VEX_L_W_OPSIZE, /* 9913 */ IC_VEX_L_W_OPSIZE, /* 9914 */ IC_VEX_L_W_OPSIZE, /* 9915 */ IC_VEX_L_W_OPSIZE, /* 9916 */ IC_VEX_L_W_OPSIZE, /* 9917 */ IC_VEX_L_W_OPSIZE, /* 9918 */ IC_VEX_L_W_OPSIZE, /* 9919 */ IC_VEX_L, /* 9920 */ IC_VEX_L, /* 9921 */ IC_VEX_L_XS, /* 9922 */ IC_VEX_L_XS, /* 9923 */ IC_VEX_L_XD, /* 9924 */ IC_VEX_L_XD, /* 9925 */ IC_VEX_L_XD, /* 9926 */ IC_VEX_L_XD, /* 9927 */ IC_VEX_L_W, /* 9928 */ IC_VEX_L_W, /* 9929 */ IC_VEX_L_W_XS, /* 9930 */ IC_VEX_L_W_XS, /* 9931 */ IC_VEX_L_W_XD, /* 9932 */ IC_VEX_L_W_XD, /* 9933 */ IC_VEX_L_W_XD, /* 9934 */ IC_VEX_L_W_XD, /* 9935 */ IC_VEX_L_OPSIZE, /* 9936 */ IC_VEX_L_OPSIZE, /* 9937 */ IC_VEX_L_OPSIZE, /* 9938 */ IC_VEX_L_OPSIZE, /* 9939 */ IC_VEX_L_OPSIZE, /* 9940 */ IC_VEX_L_OPSIZE, /* 9941 */ IC_VEX_L_OPSIZE, /* 9942 */ IC_VEX_L_OPSIZE, /* 9943 */ IC_VEX_L_W_OPSIZE, /* 9944 */ IC_VEX_L_W_OPSIZE, /* 9945 */ IC_VEX_L_W_OPSIZE, /* 9946 */ IC_VEX_L_W_OPSIZE, /* 9947 */ IC_VEX_L_W_OPSIZE, /* 9948 */ IC_VEX_L_W_OPSIZE, /* 9949 */ IC_VEX_L_W_OPSIZE, /* 9950 */ IC_VEX_L_W_OPSIZE, /* 9951 */ IC_VEX_L, /* 9952 */ IC_VEX_L, /* 9953 */ IC_VEX_L_XS, /* 9954 */ IC_VEX_L_XS, /* 9955 */ IC_VEX_L_XD, /* 9956 */ IC_VEX_L_XD, /* 9957 */ IC_VEX_L_XD, /* 9958 */ IC_VEX_L_XD, /* 9959 */ IC_VEX_L_W, /* 9960 */ IC_VEX_L_W, /* 9961 */ IC_VEX_L_W_XS, /* 9962 */ IC_VEX_L_W_XS, /* 9963 */ IC_VEX_L_W_XD, /* 9964 */ IC_VEX_L_W_XD, /* 9965 */ IC_VEX_L_W_XD, /* 9966 */ IC_VEX_L_W_XD, /* 9967 */ IC_VEX_L_OPSIZE, /* 9968 */ IC_VEX_L_OPSIZE, /* 9969 */ IC_VEX_L_OPSIZE, /* 9970 */ IC_VEX_L_OPSIZE, /* 9971 */ IC_VEX_L_OPSIZE, /* 9972 */ IC_VEX_L_OPSIZE, /* 9973 */ IC_VEX_L_OPSIZE, /* 9974 */ IC_VEX_L_OPSIZE, /* 9975 */ IC_VEX_L_W_OPSIZE, /* 9976 */ IC_VEX_L_W_OPSIZE, /* 9977 */ IC_VEX_L_W_OPSIZE, /* 9978 */ IC_VEX_L_W_OPSIZE, /* 9979 */ IC_VEX_L_W_OPSIZE, /* 9980 */ IC_VEX_L_W_OPSIZE, /* 9981 */ IC_VEX_L_W_OPSIZE, /* 9982 */ IC_VEX_L_W_OPSIZE, /* 9983 */ IC_EVEX_L2_B, /* 9984 */ IC_EVEX_L2_B, /* 9985 */ IC_EVEX_L2_XS_B, /* 9986 */ IC_EVEX_L2_XS_B, /* 9987 */ IC_EVEX_L2_XD_B, /* 9988 */ IC_EVEX_L2_XD_B, /* 9989 */ IC_EVEX_L2_XD_B, /* 9990 */ IC_EVEX_L2_XD_B, /* 9991 */ IC_EVEX_L2_W_B, /* 9992 */ IC_EVEX_L2_W_B, /* 9993 */ IC_EVEX_L2_W_XS_B, /* 9994 */ IC_EVEX_L2_W_XS_B, /* 9995 */ IC_EVEX_L2_W_XD_B, /* 9996 */ IC_EVEX_L2_W_XD_B, /* 9997 */ IC_EVEX_L2_W_XD_B, /* 9998 */ IC_EVEX_L2_W_XD_B, /* 9999 */ IC_EVEX_L2_OPSIZE_B, /* 10000 */ IC_EVEX_L2_OPSIZE_B, /* 10001 */ IC_EVEX_L2_OPSIZE_B, /* 10002 */ IC_EVEX_L2_OPSIZE_B, /* 10003 */ IC_EVEX_L2_OPSIZE_B, /* 10004 */ IC_EVEX_L2_OPSIZE_B, /* 10005 */ IC_EVEX_L2_OPSIZE_B, /* 10006 */ IC_EVEX_L2_OPSIZE_B, /* 10007 */ IC_EVEX_L2_W_OPSIZE_B, /* 10008 */ IC_EVEX_L2_W_OPSIZE_B, /* 10009 */ IC_EVEX_L2_W_OPSIZE_B, /* 10010 */ IC_EVEX_L2_W_OPSIZE_B, /* 10011 */ IC_EVEX_L2_W_OPSIZE_B, /* 10012 */ IC_EVEX_L2_W_OPSIZE_B, /* 10013 */ IC_EVEX_L2_W_OPSIZE_B, /* 10014 */ IC_EVEX_L2_W_OPSIZE_B, /* 10015 */ IC_EVEX_L2_B, /* 10016 */ IC_EVEX_L2_B, /* 10017 */ IC_EVEX_L2_XS_B, /* 10018 */ IC_EVEX_L2_XS_B, /* 10019 */ IC_EVEX_L2_XD_B, /* 10020 */ IC_EVEX_L2_XD_B, /* 10021 */ IC_EVEX_L2_XD_B, /* 10022 */ IC_EVEX_L2_XD_B, /* 10023 */ IC_EVEX_L2_W_B, /* 10024 */ IC_EVEX_L2_W_B, /* 10025 */ IC_EVEX_L2_W_XS_B, /* 10026 */ IC_EVEX_L2_W_XS_B, /* 10027 */ IC_EVEX_L2_W_XD_B, /* 10028 */ IC_EVEX_L2_W_XD_B, /* 10029 */ IC_EVEX_L2_W_XD_B, /* 10030 */ IC_EVEX_L2_W_XD_B, /* 10031 */ IC_EVEX_L2_OPSIZE_B, /* 10032 */ IC_EVEX_L2_OPSIZE_B, /* 10033 */ IC_EVEX_L2_OPSIZE_B, /* 10034 */ IC_EVEX_L2_OPSIZE_B, /* 10035 */ IC_EVEX_L2_OPSIZE_B, /* 10036 */ IC_EVEX_L2_OPSIZE_B, /* 10037 */ IC_EVEX_L2_OPSIZE_B, /* 10038 */ IC_EVEX_L2_OPSIZE_B, /* 10039 */ IC_EVEX_L2_W_OPSIZE_B, /* 10040 */ IC_EVEX_L2_W_OPSIZE_B, /* 10041 */ IC_EVEX_L2_W_OPSIZE_B, /* 10042 */ IC_EVEX_L2_W_OPSIZE_B, /* 10043 */ IC_EVEX_L2_W_OPSIZE_B, /* 10044 */ IC_EVEX_L2_W_OPSIZE_B, /* 10045 */ IC_EVEX_L2_W_OPSIZE_B, /* 10046 */ IC_EVEX_L2_W_OPSIZE_B, /* 10047 */ IC_EVEX_L2_B, /* 10048 */ IC_EVEX_L2_B, /* 10049 */ IC_EVEX_L2_XS_B, /* 10050 */ IC_EVEX_L2_XS_B, /* 10051 */ IC_EVEX_L2_XD_B, /* 10052 */ IC_EVEX_L2_XD_B, /* 10053 */ IC_EVEX_L2_XD_B, /* 10054 */ IC_EVEX_L2_XD_B, /* 10055 */ IC_EVEX_L2_W_B, /* 10056 */ IC_EVEX_L2_W_B, /* 10057 */ IC_EVEX_L2_W_XS_B, /* 10058 */ IC_EVEX_L2_W_XS_B, /* 10059 */ IC_EVEX_L2_W_XD_B, /* 10060 */ IC_EVEX_L2_W_XD_B, /* 10061 */ IC_EVEX_L2_W_XD_B, /* 10062 */ IC_EVEX_L2_W_XD_B, /* 10063 */ IC_EVEX_L2_OPSIZE_B, /* 10064 */ IC_EVEX_L2_OPSIZE_B, /* 10065 */ IC_EVEX_L2_OPSIZE_B, /* 10066 */ IC_EVEX_L2_OPSIZE_B, /* 10067 */ IC_EVEX_L2_OPSIZE_B, /* 10068 */ IC_EVEX_L2_OPSIZE_B, /* 10069 */ IC_EVEX_L2_OPSIZE_B, /* 10070 */ IC_EVEX_L2_OPSIZE_B, /* 10071 */ IC_EVEX_L2_W_OPSIZE_B, /* 10072 */ IC_EVEX_L2_W_OPSIZE_B, /* 10073 */ IC_EVEX_L2_W_OPSIZE_B, /* 10074 */ IC_EVEX_L2_W_OPSIZE_B, /* 10075 */ IC_EVEX_L2_W_OPSIZE_B, /* 10076 */ IC_EVEX_L2_W_OPSIZE_B, /* 10077 */ IC_EVEX_L2_W_OPSIZE_B, /* 10078 */ IC_EVEX_L2_W_OPSIZE_B, /* 10079 */ IC_EVEX_L2_B, /* 10080 */ IC_EVEX_L2_B, /* 10081 */ IC_EVEX_L2_XS_B, /* 10082 */ IC_EVEX_L2_XS_B, /* 10083 */ IC_EVEX_L2_XD_B, /* 10084 */ IC_EVEX_L2_XD_B, /* 10085 */ IC_EVEX_L2_XD_B, /* 10086 */ IC_EVEX_L2_XD_B, /* 10087 */ IC_EVEX_L2_W_B, /* 10088 */ IC_EVEX_L2_W_B, /* 10089 */ IC_EVEX_L2_W_XS_B, /* 10090 */ IC_EVEX_L2_W_XS_B, /* 10091 */ IC_EVEX_L2_W_XD_B, /* 10092 */ IC_EVEX_L2_W_XD_B, /* 10093 */ IC_EVEX_L2_W_XD_B, /* 10094 */ IC_EVEX_L2_W_XD_B, /* 10095 */ IC_EVEX_L2_OPSIZE_B, /* 10096 */ IC_EVEX_L2_OPSIZE_B, /* 10097 */ IC_EVEX_L2_OPSIZE_B, /* 10098 */ IC_EVEX_L2_OPSIZE_B, /* 10099 */ IC_EVEX_L2_OPSIZE_B, /* 10100 */ IC_EVEX_L2_OPSIZE_B, /* 10101 */ IC_EVEX_L2_OPSIZE_B, /* 10102 */ IC_EVEX_L2_OPSIZE_B, /* 10103 */ IC_EVEX_L2_W_OPSIZE_B, /* 10104 */ IC_EVEX_L2_W_OPSIZE_B, /* 10105 */ IC_EVEX_L2_W_OPSIZE_B, /* 10106 */ IC_EVEX_L2_W_OPSIZE_B, /* 10107 */ IC_EVEX_L2_W_OPSIZE_B, /* 10108 */ IC_EVEX_L2_W_OPSIZE_B, /* 10109 */ IC_EVEX_L2_W_OPSIZE_B, /* 10110 */ IC_EVEX_L2_W_OPSIZE_B, /* 10111 */ IC_EVEX_L2_B, /* 10112 */ IC_EVEX_L2_B, /* 10113 */ IC_EVEX_L2_XS_B, /* 10114 */ IC_EVEX_L2_XS_B, /* 10115 */ IC_EVEX_L2_XD_B, /* 10116 */ IC_EVEX_L2_XD_B, /* 10117 */ IC_EVEX_L2_XD_B, /* 10118 */ IC_EVEX_L2_XD_B, /* 10119 */ IC_EVEX_L2_W_B, /* 10120 */ IC_EVEX_L2_W_B, /* 10121 */ IC_EVEX_L2_W_XS_B, /* 10122 */ IC_EVEX_L2_W_XS_B, /* 10123 */ IC_EVEX_L2_W_XD_B, /* 10124 */ IC_EVEX_L2_W_XD_B, /* 10125 */ IC_EVEX_L2_W_XD_B, /* 10126 */ IC_EVEX_L2_W_XD_B, /* 10127 */ IC_EVEX_L2_OPSIZE_B, /* 10128 */ IC_EVEX_L2_OPSIZE_B, /* 10129 */ IC_EVEX_L2_OPSIZE_B, /* 10130 */ IC_EVEX_L2_OPSIZE_B, /* 10131 */ IC_EVEX_L2_OPSIZE_B, /* 10132 */ IC_EVEX_L2_OPSIZE_B, /* 10133 */ IC_EVEX_L2_OPSIZE_B, /* 10134 */ IC_EVEX_L2_OPSIZE_B, /* 10135 */ IC_EVEX_L2_W_OPSIZE_B, /* 10136 */ IC_EVEX_L2_W_OPSIZE_B, /* 10137 */ IC_EVEX_L2_W_OPSIZE_B, /* 10138 */ IC_EVEX_L2_W_OPSIZE_B, /* 10139 */ IC_EVEX_L2_W_OPSIZE_B, /* 10140 */ IC_EVEX_L2_W_OPSIZE_B, /* 10141 */ IC_EVEX_L2_W_OPSIZE_B, /* 10142 */ IC_EVEX_L2_W_OPSIZE_B, /* 10143 */ IC_EVEX_L2_B, /* 10144 */ IC_EVEX_L2_B, /* 10145 */ IC_EVEX_L2_XS_B, /* 10146 */ IC_EVEX_L2_XS_B, /* 10147 */ IC_EVEX_L2_XD_B, /* 10148 */ IC_EVEX_L2_XD_B, /* 10149 */ IC_EVEX_L2_XD_B, /* 10150 */ IC_EVEX_L2_XD_B, /* 10151 */ IC_EVEX_L2_W_B, /* 10152 */ IC_EVEX_L2_W_B, /* 10153 */ IC_EVEX_L2_W_XS_B, /* 10154 */ IC_EVEX_L2_W_XS_B, /* 10155 */ IC_EVEX_L2_W_XD_B, /* 10156 */ IC_EVEX_L2_W_XD_B, /* 10157 */ IC_EVEX_L2_W_XD_B, /* 10158 */ IC_EVEX_L2_W_XD_B, /* 10159 */ IC_EVEX_L2_OPSIZE_B, /* 10160 */ IC_EVEX_L2_OPSIZE_B, /* 10161 */ IC_EVEX_L2_OPSIZE_B, /* 10162 */ IC_EVEX_L2_OPSIZE_B, /* 10163 */ IC_EVEX_L2_OPSIZE_B, /* 10164 */ IC_EVEX_L2_OPSIZE_B, /* 10165 */ IC_EVEX_L2_OPSIZE_B, /* 10166 */ IC_EVEX_L2_OPSIZE_B, /* 10167 */ IC_EVEX_L2_W_OPSIZE_B, /* 10168 */ IC_EVEX_L2_W_OPSIZE_B, /* 10169 */ IC_EVEX_L2_W_OPSIZE_B, /* 10170 */ IC_EVEX_L2_W_OPSIZE_B, /* 10171 */ IC_EVEX_L2_W_OPSIZE_B, /* 10172 */ IC_EVEX_L2_W_OPSIZE_B, /* 10173 */ IC_EVEX_L2_W_OPSIZE_B, /* 10174 */ IC_EVEX_L2_W_OPSIZE_B, /* 10175 */ IC_EVEX_L2_B, /* 10176 */ IC_EVEX_L2_B, /* 10177 */ IC_EVEX_L2_XS_B, /* 10178 */ IC_EVEX_L2_XS_B, /* 10179 */ IC_EVEX_L2_XD_B, /* 10180 */ IC_EVEX_L2_XD_B, /* 10181 */ IC_EVEX_L2_XD_B, /* 10182 */ IC_EVEX_L2_XD_B, /* 10183 */ IC_EVEX_L2_W_B, /* 10184 */ IC_EVEX_L2_W_B, /* 10185 */ IC_EVEX_L2_W_XS_B, /* 10186 */ IC_EVEX_L2_W_XS_B, /* 10187 */ IC_EVEX_L2_W_XD_B, /* 10188 */ IC_EVEX_L2_W_XD_B, /* 10189 */ IC_EVEX_L2_W_XD_B, /* 10190 */ IC_EVEX_L2_W_XD_B, /* 10191 */ IC_EVEX_L2_OPSIZE_B, /* 10192 */ IC_EVEX_L2_OPSIZE_B, /* 10193 */ IC_EVEX_L2_OPSIZE_B, /* 10194 */ IC_EVEX_L2_OPSIZE_B, /* 10195 */ IC_EVEX_L2_OPSIZE_B, /* 10196 */ IC_EVEX_L2_OPSIZE_B, /* 10197 */ IC_EVEX_L2_OPSIZE_B, /* 10198 */ IC_EVEX_L2_OPSIZE_B, /* 10199 */ IC_EVEX_L2_W_OPSIZE_B, /* 10200 */ IC_EVEX_L2_W_OPSIZE_B, /* 10201 */ IC_EVEX_L2_W_OPSIZE_B, /* 10202 */ IC_EVEX_L2_W_OPSIZE_B, /* 10203 */ IC_EVEX_L2_W_OPSIZE_B, /* 10204 */ IC_EVEX_L2_W_OPSIZE_B, /* 10205 */ IC_EVEX_L2_W_OPSIZE_B, /* 10206 */ IC_EVEX_L2_W_OPSIZE_B, /* 10207 */ IC_EVEX_L2_B, /* 10208 */ IC_EVEX_L2_B, /* 10209 */ IC_EVEX_L2_XS_B, /* 10210 */ IC_EVEX_L2_XS_B, /* 10211 */ IC_EVEX_L2_XD_B, /* 10212 */ IC_EVEX_L2_XD_B, /* 10213 */ IC_EVEX_L2_XD_B, /* 10214 */ IC_EVEX_L2_XD_B, /* 10215 */ IC_EVEX_L2_W_B, /* 10216 */ IC_EVEX_L2_W_B, /* 10217 */ IC_EVEX_L2_W_XS_B, /* 10218 */ IC_EVEX_L2_W_XS_B, /* 10219 */ IC_EVEX_L2_W_XD_B, /* 10220 */ IC_EVEX_L2_W_XD_B, /* 10221 */ IC_EVEX_L2_W_XD_B, /* 10222 */ IC_EVEX_L2_W_XD_B, /* 10223 */ IC_EVEX_L2_OPSIZE_B, /* 10224 */ IC_EVEX_L2_OPSIZE_B, /* 10225 */ IC_EVEX_L2_OPSIZE_B, /* 10226 */ IC_EVEX_L2_OPSIZE_B, /* 10227 */ IC_EVEX_L2_OPSIZE_B, /* 10228 */ IC_EVEX_L2_OPSIZE_B, /* 10229 */ IC_EVEX_L2_OPSIZE_B, /* 10230 */ IC_EVEX_L2_OPSIZE_B, /* 10231 */ IC_EVEX_L2_W_OPSIZE_B, /* 10232 */ IC_EVEX_L2_W_OPSIZE_B, /* 10233 */ IC_EVEX_L2_W_OPSIZE_B, /* 10234 */ IC_EVEX_L2_W_OPSIZE_B, /* 10235 */ IC_EVEX_L2_W_OPSIZE_B, /* 10236 */ IC_EVEX_L2_W_OPSIZE_B, /* 10237 */ IC_EVEX_L2_W_OPSIZE_B, /* 10238 */ IC_EVEX_L2_W_OPSIZE_B, /* 10239 */ IC, /* 10240 */ IC_64BIT, /* 10241 */ IC_XS, /* 10242 */ IC_64BIT_XS, /* 10243 */ IC_XD, /* 10244 */ IC_64BIT_XD, /* 10245 */ IC_XS, /* 10246 */ IC_64BIT_XS, /* 10247 */ IC, /* 10248 */ IC_64BIT_REXW, /* 10249 */ IC_XS, /* 10250 */ IC_64BIT_REXW_XS, /* 10251 */ IC_XD, /* 10252 */ IC_64BIT_REXW_XD, /* 10253 */ IC_XS, /* 10254 */ IC_64BIT_REXW_XS, /* 10255 */ IC_OPSIZE, /* 10256 */ IC_64BIT_OPSIZE, /* 10257 */ IC_XS_OPSIZE, /* 10258 */ IC_64BIT_XS_OPSIZE, /* 10259 */ IC_XD_OPSIZE, /* 10260 */ IC_64BIT_XD_OPSIZE, /* 10261 */ IC_XS_OPSIZE, /* 10262 */ IC_64BIT_XD_OPSIZE, /* 10263 */ IC_OPSIZE, /* 10264 */ IC_64BIT_REXW_OPSIZE, /* 10265 */ IC_XS_OPSIZE, /* 10266 */ IC_64BIT_REXW_XS, /* 10267 */ IC_XD_OPSIZE, /* 10268 */ IC_64BIT_REXW_XD, /* 10269 */ IC_XS_OPSIZE, /* 10270 */ IC_64BIT_REXW_XS, /* 10271 */ IC_ADSIZE, /* 10272 */ IC_64BIT_ADSIZE, /* 10273 */ IC_XS, /* 10274 */ IC_64BIT_XS, /* 10275 */ IC_XD, /* 10276 */ IC_64BIT_XD, /* 10277 */ IC_XS, /* 10278 */ IC_64BIT_XS, /* 10279 */ IC_ADSIZE, /* 10280 */ IC_64BIT_REXW_ADSIZE, /* 10281 */ IC_XS, /* 10282 */ IC_64BIT_REXW_XS, /* 10283 */ IC_XD, /* 10284 */ IC_64BIT_REXW_XD, /* 10285 */ IC_XS, /* 10286 */ IC_64BIT_REXW_XS, /* 10287 */ IC_OPSIZE_ADSIZE, /* 10288 */ IC_64BIT_OPSIZE_ADSIZE, /* 10289 */ IC_XS_OPSIZE, /* 10290 */ IC_64BIT_XS_OPSIZE, /* 10291 */ IC_XD_OPSIZE, /* 10292 */ IC_64BIT_XD_OPSIZE, /* 10293 */ IC_XS_OPSIZE, /* 10294 */ IC_64BIT_XD_OPSIZE, /* 10295 */ IC_OPSIZE_ADSIZE, /* 10296 */ IC_64BIT_REXW_OPSIZE, /* 10297 */ IC_XS_OPSIZE, /* 10298 */ IC_64BIT_REXW_XS, /* 10299 */ IC_XD_OPSIZE, /* 10300 */ IC_64BIT_REXW_XD, /* 10301 */ IC_XS_OPSIZE, /* 10302 */ IC_64BIT_REXW_XS, /* 10303 */ IC_VEX, /* 10304 */ IC_VEX, /* 10305 */ IC_VEX_XS, /* 10306 */ IC_VEX_XS, /* 10307 */ IC_VEX_XD, /* 10308 */ IC_VEX_XD, /* 10309 */ IC_VEX_XD, /* 10310 */ IC_VEX_XD, /* 10311 */ IC_VEX_W, /* 10312 */ IC_VEX_W, /* 10313 */ IC_VEX_W_XS, /* 10314 */ IC_VEX_W_XS, /* 10315 */ IC_VEX_W_XD, /* 10316 */ IC_VEX_W_XD, /* 10317 */ IC_VEX_W_XD, /* 10318 */ IC_VEX_W_XD, /* 10319 */ IC_VEX_OPSIZE, /* 10320 */ IC_VEX_OPSIZE, /* 10321 */ IC_VEX_OPSIZE, /* 10322 */ IC_VEX_OPSIZE, /* 10323 */ IC_VEX_OPSIZE, /* 10324 */ IC_VEX_OPSIZE, /* 10325 */ IC_VEX_OPSIZE, /* 10326 */ IC_VEX_OPSIZE, /* 10327 */ IC_VEX_W_OPSIZE, /* 10328 */ IC_VEX_W_OPSIZE, /* 10329 */ IC_VEX_W_OPSIZE, /* 10330 */ IC_VEX_W_OPSIZE, /* 10331 */ IC_VEX_W_OPSIZE, /* 10332 */ IC_VEX_W_OPSIZE, /* 10333 */ IC_VEX_W_OPSIZE, /* 10334 */ IC_VEX_W_OPSIZE, /* 10335 */ IC_VEX, /* 10336 */ IC_VEX, /* 10337 */ IC_VEX_XS, /* 10338 */ IC_VEX_XS, /* 10339 */ IC_VEX_XD, /* 10340 */ IC_VEX_XD, /* 10341 */ IC_VEX_XD, /* 10342 */ IC_VEX_XD, /* 10343 */ IC_VEX_W, /* 10344 */ IC_VEX_W, /* 10345 */ IC_VEX_W_XS, /* 10346 */ IC_VEX_W_XS, /* 10347 */ IC_VEX_W_XD, /* 10348 */ IC_VEX_W_XD, /* 10349 */ IC_VEX_W_XD, /* 10350 */ IC_VEX_W_XD, /* 10351 */ IC_VEX_OPSIZE, /* 10352 */ IC_VEX_OPSIZE, /* 10353 */ IC_VEX_OPSIZE, /* 10354 */ IC_VEX_OPSIZE, /* 10355 */ IC_VEX_OPSIZE, /* 10356 */ IC_VEX_OPSIZE, /* 10357 */ IC_VEX_OPSIZE, /* 10358 */ IC_VEX_OPSIZE, /* 10359 */ IC_VEX_W_OPSIZE, /* 10360 */ IC_VEX_W_OPSIZE, /* 10361 */ IC_VEX_W_OPSIZE, /* 10362 */ IC_VEX_W_OPSIZE, /* 10363 */ IC_VEX_W_OPSIZE, /* 10364 */ IC_VEX_W_OPSIZE, /* 10365 */ IC_VEX_W_OPSIZE, /* 10366 */ IC_VEX_W_OPSIZE, /* 10367 */ IC_VEX_L, /* 10368 */ IC_VEX_L, /* 10369 */ IC_VEX_L_XS, /* 10370 */ IC_VEX_L_XS, /* 10371 */ IC_VEX_L_XD, /* 10372 */ IC_VEX_L_XD, /* 10373 */ IC_VEX_L_XD, /* 10374 */ IC_VEX_L_XD, /* 10375 */ IC_VEX_L_W, /* 10376 */ IC_VEX_L_W, /* 10377 */ IC_VEX_L_W_XS, /* 10378 */ IC_VEX_L_W_XS, /* 10379 */ IC_VEX_L_W_XD, /* 10380 */ IC_VEX_L_W_XD, /* 10381 */ IC_VEX_L_W_XD, /* 10382 */ IC_VEX_L_W_XD, /* 10383 */ IC_VEX_L_OPSIZE, /* 10384 */ IC_VEX_L_OPSIZE, /* 10385 */ IC_VEX_L_OPSIZE, /* 10386 */ IC_VEX_L_OPSIZE, /* 10387 */ IC_VEX_L_OPSIZE, /* 10388 */ IC_VEX_L_OPSIZE, /* 10389 */ IC_VEX_L_OPSIZE, /* 10390 */ IC_VEX_L_OPSIZE, /* 10391 */ IC_VEX_L_W_OPSIZE, /* 10392 */ IC_VEX_L_W_OPSIZE, /* 10393 */ IC_VEX_L_W_OPSIZE, /* 10394 */ IC_VEX_L_W_OPSIZE, /* 10395 */ IC_VEX_L_W_OPSIZE, /* 10396 */ IC_VEX_L_W_OPSIZE, /* 10397 */ IC_VEX_L_W_OPSIZE, /* 10398 */ IC_VEX_L_W_OPSIZE, /* 10399 */ IC_VEX_L, /* 10400 */ IC_VEX_L, /* 10401 */ IC_VEX_L_XS, /* 10402 */ IC_VEX_L_XS, /* 10403 */ IC_VEX_L_XD, /* 10404 */ IC_VEX_L_XD, /* 10405 */ IC_VEX_L_XD, /* 10406 */ IC_VEX_L_XD, /* 10407 */ IC_VEX_L_W, /* 10408 */ IC_VEX_L_W, /* 10409 */ IC_VEX_L_W_XS, /* 10410 */ IC_VEX_L_W_XS, /* 10411 */ IC_VEX_L_W_XD, /* 10412 */ IC_VEX_L_W_XD, /* 10413 */ IC_VEX_L_W_XD, /* 10414 */ IC_VEX_L_W_XD, /* 10415 */ IC_VEX_L_OPSIZE, /* 10416 */ IC_VEX_L_OPSIZE, /* 10417 */ IC_VEX_L_OPSIZE, /* 10418 */ IC_VEX_L_OPSIZE, /* 10419 */ IC_VEX_L_OPSIZE, /* 10420 */ IC_VEX_L_OPSIZE, /* 10421 */ IC_VEX_L_OPSIZE, /* 10422 */ IC_VEX_L_OPSIZE, /* 10423 */ IC_VEX_L_W_OPSIZE, /* 10424 */ IC_VEX_L_W_OPSIZE, /* 10425 */ IC_VEX_L_W_OPSIZE, /* 10426 */ IC_VEX_L_W_OPSIZE, /* 10427 */ IC_VEX_L_W_OPSIZE, /* 10428 */ IC_VEX_L_W_OPSIZE, /* 10429 */ IC_VEX_L_W_OPSIZE, /* 10430 */ IC_VEX_L_W_OPSIZE, /* 10431 */ IC_VEX_L, /* 10432 */ IC_VEX_L, /* 10433 */ IC_VEX_L_XS, /* 10434 */ IC_VEX_L_XS, /* 10435 */ IC_VEX_L_XD, /* 10436 */ IC_VEX_L_XD, /* 10437 */ IC_VEX_L_XD, /* 10438 */ IC_VEX_L_XD, /* 10439 */ IC_VEX_L_W, /* 10440 */ IC_VEX_L_W, /* 10441 */ IC_VEX_L_W_XS, /* 10442 */ IC_VEX_L_W_XS, /* 10443 */ IC_VEX_L_W_XD, /* 10444 */ IC_VEX_L_W_XD, /* 10445 */ IC_VEX_L_W_XD, /* 10446 */ IC_VEX_L_W_XD, /* 10447 */ IC_VEX_L_OPSIZE, /* 10448 */ IC_VEX_L_OPSIZE, /* 10449 */ IC_VEX_L_OPSIZE, /* 10450 */ IC_VEX_L_OPSIZE, /* 10451 */ IC_VEX_L_OPSIZE, /* 10452 */ IC_VEX_L_OPSIZE, /* 10453 */ IC_VEX_L_OPSIZE, /* 10454 */ IC_VEX_L_OPSIZE, /* 10455 */ IC_VEX_L_W_OPSIZE, /* 10456 */ IC_VEX_L_W_OPSIZE, /* 10457 */ IC_VEX_L_W_OPSIZE, /* 10458 */ IC_VEX_L_W_OPSIZE, /* 10459 */ IC_VEX_L_W_OPSIZE, /* 10460 */ IC_VEX_L_W_OPSIZE, /* 10461 */ IC_VEX_L_W_OPSIZE, /* 10462 */ IC_VEX_L_W_OPSIZE, /* 10463 */ IC_VEX_L, /* 10464 */ IC_VEX_L, /* 10465 */ IC_VEX_L_XS, /* 10466 */ IC_VEX_L_XS, /* 10467 */ IC_VEX_L_XD, /* 10468 */ IC_VEX_L_XD, /* 10469 */ IC_VEX_L_XD, /* 10470 */ IC_VEX_L_XD, /* 10471 */ IC_VEX_L_W, /* 10472 */ IC_VEX_L_W, /* 10473 */ IC_VEX_L_W_XS, /* 10474 */ IC_VEX_L_W_XS, /* 10475 */ IC_VEX_L_W_XD, /* 10476 */ IC_VEX_L_W_XD, /* 10477 */ IC_VEX_L_W_XD, /* 10478 */ IC_VEX_L_W_XD, /* 10479 */ IC_VEX_L_OPSIZE, /* 10480 */ IC_VEX_L_OPSIZE, /* 10481 */ IC_VEX_L_OPSIZE, /* 10482 */ IC_VEX_L_OPSIZE, /* 10483 */ IC_VEX_L_OPSIZE, /* 10484 */ IC_VEX_L_OPSIZE, /* 10485 */ IC_VEX_L_OPSIZE, /* 10486 */ IC_VEX_L_OPSIZE, /* 10487 */ IC_VEX_L_W_OPSIZE, /* 10488 */ IC_VEX_L_W_OPSIZE, /* 10489 */ IC_VEX_L_W_OPSIZE, /* 10490 */ IC_VEX_L_W_OPSIZE, /* 10491 */ IC_VEX_L_W_OPSIZE, /* 10492 */ IC_VEX_L_W_OPSIZE, /* 10493 */ IC_VEX_L_W_OPSIZE, /* 10494 */ IC_VEX_L_W_OPSIZE, /* 10495 */ IC_EVEX_K_B, /* 10496 */ IC_EVEX_K_B, /* 10497 */ IC_EVEX_XS_K_B, /* 10498 */ IC_EVEX_XS_K_B, /* 10499 */ IC_EVEX_XD_K_B, /* 10500 */ IC_EVEX_XD_K_B, /* 10501 */ IC_EVEX_XD_K_B, /* 10502 */ IC_EVEX_XD_K_B, /* 10503 */ IC_EVEX_W_K_B, /* 10504 */ IC_EVEX_W_K_B, /* 10505 */ IC_EVEX_W_XS_K_B, /* 10506 */ IC_EVEX_W_XS_K_B, /* 10507 */ IC_EVEX_W_XD_K_B, /* 10508 */ IC_EVEX_W_XD_K_B, /* 10509 */ IC_EVEX_W_XD_K_B, /* 10510 */ IC_EVEX_W_XD_K_B, /* 10511 */ IC_EVEX_OPSIZE_K_B, /* 10512 */ IC_EVEX_OPSIZE_K_B, /* 10513 */ IC_EVEX_OPSIZE_K_B, /* 10514 */ IC_EVEX_OPSIZE_K_B, /* 10515 */ IC_EVEX_OPSIZE_K_B, /* 10516 */ IC_EVEX_OPSIZE_K_B, /* 10517 */ IC_EVEX_OPSIZE_K_B, /* 10518 */ IC_EVEX_OPSIZE_K_B, /* 10519 */ IC_EVEX_W_OPSIZE_K_B, /* 10520 */ IC_EVEX_W_OPSIZE_K_B, /* 10521 */ IC_EVEX_W_OPSIZE_K_B, /* 10522 */ IC_EVEX_W_OPSIZE_K_B, /* 10523 */ IC_EVEX_W_OPSIZE_K_B, /* 10524 */ IC_EVEX_W_OPSIZE_K_B, /* 10525 */ IC_EVEX_W_OPSIZE_K_B, /* 10526 */ IC_EVEX_W_OPSIZE_K_B, /* 10527 */ IC_EVEX_K_B, /* 10528 */ IC_EVEX_K_B, /* 10529 */ IC_EVEX_XS_K_B, /* 10530 */ IC_EVEX_XS_K_B, /* 10531 */ IC_EVEX_XD_K_B, /* 10532 */ IC_EVEX_XD_K_B, /* 10533 */ IC_EVEX_XD_K_B, /* 10534 */ IC_EVEX_XD_K_B, /* 10535 */ IC_EVEX_W_K_B, /* 10536 */ IC_EVEX_W_K_B, /* 10537 */ IC_EVEX_W_XS_K_B, /* 10538 */ IC_EVEX_W_XS_K_B, /* 10539 */ IC_EVEX_W_XD_K_B, /* 10540 */ IC_EVEX_W_XD_K_B, /* 10541 */ IC_EVEX_W_XD_K_B, /* 10542 */ IC_EVEX_W_XD_K_B, /* 10543 */ IC_EVEX_OPSIZE_K_B, /* 10544 */ IC_EVEX_OPSIZE_K_B, /* 10545 */ IC_EVEX_OPSIZE_K_B, /* 10546 */ IC_EVEX_OPSIZE_K_B, /* 10547 */ IC_EVEX_OPSIZE_K_B, /* 10548 */ IC_EVEX_OPSIZE_K_B, /* 10549 */ IC_EVEX_OPSIZE_K_B, /* 10550 */ IC_EVEX_OPSIZE_K_B, /* 10551 */ IC_EVEX_W_OPSIZE_K_B, /* 10552 */ IC_EVEX_W_OPSIZE_K_B, /* 10553 */ IC_EVEX_W_OPSIZE_K_B, /* 10554 */ IC_EVEX_W_OPSIZE_K_B, /* 10555 */ IC_EVEX_W_OPSIZE_K_B, /* 10556 */ IC_EVEX_W_OPSIZE_K_B, /* 10557 */ IC_EVEX_W_OPSIZE_K_B, /* 10558 */ IC_EVEX_W_OPSIZE_K_B, /* 10559 */ IC_EVEX_K_B, /* 10560 */ IC_EVEX_K_B, /* 10561 */ IC_EVEX_XS_K_B, /* 10562 */ IC_EVEX_XS_K_B, /* 10563 */ IC_EVEX_XD_K_B, /* 10564 */ IC_EVEX_XD_K_B, /* 10565 */ IC_EVEX_XD_K_B, /* 10566 */ IC_EVEX_XD_K_B, /* 10567 */ IC_EVEX_W_K_B, /* 10568 */ IC_EVEX_W_K_B, /* 10569 */ IC_EVEX_W_XS_K_B, /* 10570 */ IC_EVEX_W_XS_K_B, /* 10571 */ IC_EVEX_W_XD_K_B, /* 10572 */ IC_EVEX_W_XD_K_B, /* 10573 */ IC_EVEX_W_XD_K_B, /* 10574 */ IC_EVEX_W_XD_K_B, /* 10575 */ IC_EVEX_OPSIZE_K_B, /* 10576 */ IC_EVEX_OPSIZE_K_B, /* 10577 */ IC_EVEX_OPSIZE_K_B, /* 10578 */ IC_EVEX_OPSIZE_K_B, /* 10579 */ IC_EVEX_OPSIZE_K_B, /* 10580 */ IC_EVEX_OPSIZE_K_B, /* 10581 */ IC_EVEX_OPSIZE_K_B, /* 10582 */ IC_EVEX_OPSIZE_K_B, /* 10583 */ IC_EVEX_W_OPSIZE_K_B, /* 10584 */ IC_EVEX_W_OPSIZE_K_B, /* 10585 */ IC_EVEX_W_OPSIZE_K_B, /* 10586 */ IC_EVEX_W_OPSIZE_K_B, /* 10587 */ IC_EVEX_W_OPSIZE_K_B, /* 10588 */ IC_EVEX_W_OPSIZE_K_B, /* 10589 */ IC_EVEX_W_OPSIZE_K_B, /* 10590 */ IC_EVEX_W_OPSIZE_K_B, /* 10591 */ IC_EVEX_K_B, /* 10592 */ IC_EVEX_K_B, /* 10593 */ IC_EVEX_XS_K_B, /* 10594 */ IC_EVEX_XS_K_B, /* 10595 */ IC_EVEX_XD_K_B, /* 10596 */ IC_EVEX_XD_K_B, /* 10597 */ IC_EVEX_XD_K_B, /* 10598 */ IC_EVEX_XD_K_B, /* 10599 */ IC_EVEX_W_K_B, /* 10600 */ IC_EVEX_W_K_B, /* 10601 */ IC_EVEX_W_XS_K_B, /* 10602 */ IC_EVEX_W_XS_K_B, /* 10603 */ IC_EVEX_W_XD_K_B, /* 10604 */ IC_EVEX_W_XD_K_B, /* 10605 */ IC_EVEX_W_XD_K_B, /* 10606 */ IC_EVEX_W_XD_K_B, /* 10607 */ IC_EVEX_OPSIZE_K_B, /* 10608 */ IC_EVEX_OPSIZE_K_B, /* 10609 */ IC_EVEX_OPSIZE_K_B, /* 10610 */ IC_EVEX_OPSIZE_K_B, /* 10611 */ IC_EVEX_OPSIZE_K_B, /* 10612 */ IC_EVEX_OPSIZE_K_B, /* 10613 */ IC_EVEX_OPSIZE_K_B, /* 10614 */ IC_EVEX_OPSIZE_K_B, /* 10615 */ IC_EVEX_W_OPSIZE_K_B, /* 10616 */ IC_EVEX_W_OPSIZE_K_B, /* 10617 */ IC_EVEX_W_OPSIZE_K_B, /* 10618 */ IC_EVEX_W_OPSIZE_K_B, /* 10619 */ IC_EVEX_W_OPSIZE_K_B, /* 10620 */ IC_EVEX_W_OPSIZE_K_B, /* 10621 */ IC_EVEX_W_OPSIZE_K_B, /* 10622 */ IC_EVEX_W_OPSIZE_K_B, /* 10623 */ IC_EVEX_K_B, /* 10624 */ IC_EVEX_K_B, /* 10625 */ IC_EVEX_XS_K_B, /* 10626 */ IC_EVEX_XS_K_B, /* 10627 */ IC_EVEX_XD_K_B, /* 10628 */ IC_EVEX_XD_K_B, /* 10629 */ IC_EVEX_XD_K_B, /* 10630 */ IC_EVEX_XD_K_B, /* 10631 */ IC_EVEX_W_K_B, /* 10632 */ IC_EVEX_W_K_B, /* 10633 */ IC_EVEX_W_XS_K_B, /* 10634 */ IC_EVEX_W_XS_K_B, /* 10635 */ IC_EVEX_W_XD_K_B, /* 10636 */ IC_EVEX_W_XD_K_B, /* 10637 */ IC_EVEX_W_XD_K_B, /* 10638 */ IC_EVEX_W_XD_K_B, /* 10639 */ IC_EVEX_OPSIZE_K_B, /* 10640 */ IC_EVEX_OPSIZE_K_B, /* 10641 */ IC_EVEX_OPSIZE_K_B, /* 10642 */ IC_EVEX_OPSIZE_K_B, /* 10643 */ IC_EVEX_OPSIZE_K_B, /* 10644 */ IC_EVEX_OPSIZE_K_B, /* 10645 */ IC_EVEX_OPSIZE_K_B, /* 10646 */ IC_EVEX_OPSIZE_K_B, /* 10647 */ IC_EVEX_W_OPSIZE_K_B, /* 10648 */ IC_EVEX_W_OPSIZE_K_B, /* 10649 */ IC_EVEX_W_OPSIZE_K_B, /* 10650 */ IC_EVEX_W_OPSIZE_K_B, /* 10651 */ IC_EVEX_W_OPSIZE_K_B, /* 10652 */ IC_EVEX_W_OPSIZE_K_B, /* 10653 */ IC_EVEX_W_OPSIZE_K_B, /* 10654 */ IC_EVEX_W_OPSIZE_K_B, /* 10655 */ IC_EVEX_K_B, /* 10656 */ IC_EVEX_K_B, /* 10657 */ IC_EVEX_XS_K_B, /* 10658 */ IC_EVEX_XS_K_B, /* 10659 */ IC_EVEX_XD_K_B, /* 10660 */ IC_EVEX_XD_K_B, /* 10661 */ IC_EVEX_XD_K_B, /* 10662 */ IC_EVEX_XD_K_B, /* 10663 */ IC_EVEX_W_K_B, /* 10664 */ IC_EVEX_W_K_B, /* 10665 */ IC_EVEX_W_XS_K_B, /* 10666 */ IC_EVEX_W_XS_K_B, /* 10667 */ IC_EVEX_W_XD_K_B, /* 10668 */ IC_EVEX_W_XD_K_B, /* 10669 */ IC_EVEX_W_XD_K_B, /* 10670 */ IC_EVEX_W_XD_K_B, /* 10671 */ IC_EVEX_OPSIZE_K_B, /* 10672 */ IC_EVEX_OPSIZE_K_B, /* 10673 */ IC_EVEX_OPSIZE_K_B, /* 10674 */ IC_EVEX_OPSIZE_K_B, /* 10675 */ IC_EVEX_OPSIZE_K_B, /* 10676 */ IC_EVEX_OPSIZE_K_B, /* 10677 */ IC_EVEX_OPSIZE_K_B, /* 10678 */ IC_EVEX_OPSIZE_K_B, /* 10679 */ IC_EVEX_W_OPSIZE_K_B, /* 10680 */ IC_EVEX_W_OPSIZE_K_B, /* 10681 */ IC_EVEX_W_OPSIZE_K_B, /* 10682 */ IC_EVEX_W_OPSIZE_K_B, /* 10683 */ IC_EVEX_W_OPSIZE_K_B, /* 10684 */ IC_EVEX_W_OPSIZE_K_B, /* 10685 */ IC_EVEX_W_OPSIZE_K_B, /* 10686 */ IC_EVEX_W_OPSIZE_K_B, /* 10687 */ IC_EVEX_K_B, /* 10688 */ IC_EVEX_K_B, /* 10689 */ IC_EVEX_XS_K_B, /* 10690 */ IC_EVEX_XS_K_B, /* 10691 */ IC_EVEX_XD_K_B, /* 10692 */ IC_EVEX_XD_K_B, /* 10693 */ IC_EVEX_XD_K_B, /* 10694 */ IC_EVEX_XD_K_B, /* 10695 */ IC_EVEX_W_K_B, /* 10696 */ IC_EVEX_W_K_B, /* 10697 */ IC_EVEX_W_XS_K_B, /* 10698 */ IC_EVEX_W_XS_K_B, /* 10699 */ IC_EVEX_W_XD_K_B, /* 10700 */ IC_EVEX_W_XD_K_B, /* 10701 */ IC_EVEX_W_XD_K_B, /* 10702 */ IC_EVEX_W_XD_K_B, /* 10703 */ IC_EVEX_OPSIZE_K_B, /* 10704 */ IC_EVEX_OPSIZE_K_B, /* 10705 */ IC_EVEX_OPSIZE_K_B, /* 10706 */ IC_EVEX_OPSIZE_K_B, /* 10707 */ IC_EVEX_OPSIZE_K_B, /* 10708 */ IC_EVEX_OPSIZE_K_B, /* 10709 */ IC_EVEX_OPSIZE_K_B, /* 10710 */ IC_EVEX_OPSIZE_K_B, /* 10711 */ IC_EVEX_W_OPSIZE_K_B, /* 10712 */ IC_EVEX_W_OPSIZE_K_B, /* 10713 */ IC_EVEX_W_OPSIZE_K_B, /* 10714 */ IC_EVEX_W_OPSIZE_K_B, /* 10715 */ IC_EVEX_W_OPSIZE_K_B, /* 10716 */ IC_EVEX_W_OPSIZE_K_B, /* 10717 */ IC_EVEX_W_OPSIZE_K_B, /* 10718 */ IC_EVEX_W_OPSIZE_K_B, /* 10719 */ IC_EVEX_K_B, /* 10720 */ IC_EVEX_K_B, /* 10721 */ IC_EVEX_XS_K_B, /* 10722 */ IC_EVEX_XS_K_B, /* 10723 */ IC_EVEX_XD_K_B, /* 10724 */ IC_EVEX_XD_K_B, /* 10725 */ IC_EVEX_XD_K_B, /* 10726 */ IC_EVEX_XD_K_B, /* 10727 */ IC_EVEX_W_K_B, /* 10728 */ IC_EVEX_W_K_B, /* 10729 */ IC_EVEX_W_XS_K_B, /* 10730 */ IC_EVEX_W_XS_K_B, /* 10731 */ IC_EVEX_W_XD_K_B, /* 10732 */ IC_EVEX_W_XD_K_B, /* 10733 */ IC_EVEX_W_XD_K_B, /* 10734 */ IC_EVEX_W_XD_K_B, /* 10735 */ IC_EVEX_OPSIZE_K_B, /* 10736 */ IC_EVEX_OPSIZE_K_B, /* 10737 */ IC_EVEX_OPSIZE_K_B, /* 10738 */ IC_EVEX_OPSIZE_K_B, /* 10739 */ IC_EVEX_OPSIZE_K_B, /* 10740 */ IC_EVEX_OPSIZE_K_B, /* 10741 */ IC_EVEX_OPSIZE_K_B, /* 10742 */ IC_EVEX_OPSIZE_K_B, /* 10743 */ IC_EVEX_W_OPSIZE_K_B, /* 10744 */ IC_EVEX_W_OPSIZE_K_B, /* 10745 */ IC_EVEX_W_OPSIZE_K_B, /* 10746 */ IC_EVEX_W_OPSIZE_K_B, /* 10747 */ IC_EVEX_W_OPSIZE_K_B, /* 10748 */ IC_EVEX_W_OPSIZE_K_B, /* 10749 */ IC_EVEX_W_OPSIZE_K_B, /* 10750 */ IC_EVEX_W_OPSIZE_K_B, /* 10751 */ IC, /* 10752 */ IC_64BIT, /* 10753 */ IC_XS, /* 10754 */ IC_64BIT_XS, /* 10755 */ IC_XD, /* 10756 */ IC_64BIT_XD, /* 10757 */ IC_XS, /* 10758 */ IC_64BIT_XS, /* 10759 */ IC, /* 10760 */ IC_64BIT_REXW, /* 10761 */ IC_XS, /* 10762 */ IC_64BIT_REXW_XS, /* 10763 */ IC_XD, /* 10764 */ IC_64BIT_REXW_XD, /* 10765 */ IC_XS, /* 10766 */ IC_64BIT_REXW_XS, /* 10767 */ IC_OPSIZE, /* 10768 */ IC_64BIT_OPSIZE, /* 10769 */ IC_XS_OPSIZE, /* 10770 */ IC_64BIT_XS_OPSIZE, /* 10771 */ IC_XD_OPSIZE, /* 10772 */ IC_64BIT_XD_OPSIZE, /* 10773 */ IC_XS_OPSIZE, /* 10774 */ IC_64BIT_XD_OPSIZE, /* 10775 */ IC_OPSIZE, /* 10776 */ IC_64BIT_REXW_OPSIZE, /* 10777 */ IC_XS_OPSIZE, /* 10778 */ IC_64BIT_REXW_XS, /* 10779 */ IC_XD_OPSIZE, /* 10780 */ IC_64BIT_REXW_XD, /* 10781 */ IC_XS_OPSIZE, /* 10782 */ IC_64BIT_REXW_XS, /* 10783 */ IC_ADSIZE, /* 10784 */ IC_64BIT_ADSIZE, /* 10785 */ IC_XS, /* 10786 */ IC_64BIT_XS, /* 10787 */ IC_XD, /* 10788 */ IC_64BIT_XD, /* 10789 */ IC_XS, /* 10790 */ IC_64BIT_XS, /* 10791 */ IC_ADSIZE, /* 10792 */ IC_64BIT_REXW_ADSIZE, /* 10793 */ IC_XS, /* 10794 */ IC_64BIT_REXW_XS, /* 10795 */ IC_XD, /* 10796 */ IC_64BIT_REXW_XD, /* 10797 */ IC_XS, /* 10798 */ IC_64BIT_REXW_XS, /* 10799 */ IC_OPSIZE_ADSIZE, /* 10800 */ IC_64BIT_OPSIZE_ADSIZE, /* 10801 */ IC_XS_OPSIZE, /* 10802 */ IC_64BIT_XS_OPSIZE, /* 10803 */ IC_XD_OPSIZE, /* 10804 */ IC_64BIT_XD_OPSIZE, /* 10805 */ IC_XS_OPSIZE, /* 10806 */ IC_64BIT_XD_OPSIZE, /* 10807 */ IC_OPSIZE_ADSIZE, /* 10808 */ IC_64BIT_REXW_OPSIZE, /* 10809 */ IC_XS_OPSIZE, /* 10810 */ IC_64BIT_REXW_XS, /* 10811 */ IC_XD_OPSIZE, /* 10812 */ IC_64BIT_REXW_XD, /* 10813 */ IC_XS_OPSIZE, /* 10814 */ IC_64BIT_REXW_XS, /* 10815 */ IC_VEX, /* 10816 */ IC_VEX, /* 10817 */ IC_VEX_XS, /* 10818 */ IC_VEX_XS, /* 10819 */ IC_VEX_XD, /* 10820 */ IC_VEX_XD, /* 10821 */ IC_VEX_XD, /* 10822 */ IC_VEX_XD, /* 10823 */ IC_VEX_W, /* 10824 */ IC_VEX_W, /* 10825 */ IC_VEX_W_XS, /* 10826 */ IC_VEX_W_XS, /* 10827 */ IC_VEX_W_XD, /* 10828 */ IC_VEX_W_XD, /* 10829 */ IC_VEX_W_XD, /* 10830 */ IC_VEX_W_XD, /* 10831 */ IC_VEX_OPSIZE, /* 10832 */ IC_VEX_OPSIZE, /* 10833 */ IC_VEX_OPSIZE, /* 10834 */ IC_VEX_OPSIZE, /* 10835 */ IC_VEX_OPSIZE, /* 10836 */ IC_VEX_OPSIZE, /* 10837 */ IC_VEX_OPSIZE, /* 10838 */ IC_VEX_OPSIZE, /* 10839 */ IC_VEX_W_OPSIZE, /* 10840 */ IC_VEX_W_OPSIZE, /* 10841 */ IC_VEX_W_OPSIZE, /* 10842 */ IC_VEX_W_OPSIZE, /* 10843 */ IC_VEX_W_OPSIZE, /* 10844 */ IC_VEX_W_OPSIZE, /* 10845 */ IC_VEX_W_OPSIZE, /* 10846 */ IC_VEX_W_OPSIZE, /* 10847 */ IC_VEX, /* 10848 */ IC_VEX, /* 10849 */ IC_VEX_XS, /* 10850 */ IC_VEX_XS, /* 10851 */ IC_VEX_XD, /* 10852 */ IC_VEX_XD, /* 10853 */ IC_VEX_XD, /* 10854 */ IC_VEX_XD, /* 10855 */ IC_VEX_W, /* 10856 */ IC_VEX_W, /* 10857 */ IC_VEX_W_XS, /* 10858 */ IC_VEX_W_XS, /* 10859 */ IC_VEX_W_XD, /* 10860 */ IC_VEX_W_XD, /* 10861 */ IC_VEX_W_XD, /* 10862 */ IC_VEX_W_XD, /* 10863 */ IC_VEX_OPSIZE, /* 10864 */ IC_VEX_OPSIZE, /* 10865 */ IC_VEX_OPSIZE, /* 10866 */ IC_VEX_OPSIZE, /* 10867 */ IC_VEX_OPSIZE, /* 10868 */ IC_VEX_OPSIZE, /* 10869 */ IC_VEX_OPSIZE, /* 10870 */ IC_VEX_OPSIZE, /* 10871 */ IC_VEX_W_OPSIZE, /* 10872 */ IC_VEX_W_OPSIZE, /* 10873 */ IC_VEX_W_OPSIZE, /* 10874 */ IC_VEX_W_OPSIZE, /* 10875 */ IC_VEX_W_OPSIZE, /* 10876 */ IC_VEX_W_OPSIZE, /* 10877 */ IC_VEX_W_OPSIZE, /* 10878 */ IC_VEX_W_OPSIZE, /* 10879 */ IC_VEX_L, /* 10880 */ IC_VEX_L, /* 10881 */ IC_VEX_L_XS, /* 10882 */ IC_VEX_L_XS, /* 10883 */ IC_VEX_L_XD, /* 10884 */ IC_VEX_L_XD, /* 10885 */ IC_VEX_L_XD, /* 10886 */ IC_VEX_L_XD, /* 10887 */ IC_VEX_L_W, /* 10888 */ IC_VEX_L_W, /* 10889 */ IC_VEX_L_W_XS, /* 10890 */ IC_VEX_L_W_XS, /* 10891 */ IC_VEX_L_W_XD, /* 10892 */ IC_VEX_L_W_XD, /* 10893 */ IC_VEX_L_W_XD, /* 10894 */ IC_VEX_L_W_XD, /* 10895 */ IC_VEX_L_OPSIZE, /* 10896 */ IC_VEX_L_OPSIZE, /* 10897 */ IC_VEX_L_OPSIZE, /* 10898 */ IC_VEX_L_OPSIZE, /* 10899 */ IC_VEX_L_OPSIZE, /* 10900 */ IC_VEX_L_OPSIZE, /* 10901 */ IC_VEX_L_OPSIZE, /* 10902 */ IC_VEX_L_OPSIZE, /* 10903 */ IC_VEX_L_W_OPSIZE, /* 10904 */ IC_VEX_L_W_OPSIZE, /* 10905 */ IC_VEX_L_W_OPSIZE, /* 10906 */ IC_VEX_L_W_OPSIZE, /* 10907 */ IC_VEX_L_W_OPSIZE, /* 10908 */ IC_VEX_L_W_OPSIZE, /* 10909 */ IC_VEX_L_W_OPSIZE, /* 10910 */ IC_VEX_L_W_OPSIZE, /* 10911 */ IC_VEX_L, /* 10912 */ IC_VEX_L, /* 10913 */ IC_VEX_L_XS, /* 10914 */ IC_VEX_L_XS, /* 10915 */ IC_VEX_L_XD, /* 10916 */ IC_VEX_L_XD, /* 10917 */ IC_VEX_L_XD, /* 10918 */ IC_VEX_L_XD, /* 10919 */ IC_VEX_L_W, /* 10920 */ IC_VEX_L_W, /* 10921 */ IC_VEX_L_W_XS, /* 10922 */ IC_VEX_L_W_XS, /* 10923 */ IC_VEX_L_W_XD, /* 10924 */ IC_VEX_L_W_XD, /* 10925 */ IC_VEX_L_W_XD, /* 10926 */ IC_VEX_L_W_XD, /* 10927 */ IC_VEX_L_OPSIZE, /* 10928 */ IC_VEX_L_OPSIZE, /* 10929 */ IC_VEX_L_OPSIZE, /* 10930 */ IC_VEX_L_OPSIZE, /* 10931 */ IC_VEX_L_OPSIZE, /* 10932 */ IC_VEX_L_OPSIZE, /* 10933 */ IC_VEX_L_OPSIZE, /* 10934 */ IC_VEX_L_OPSIZE, /* 10935 */ IC_VEX_L_W_OPSIZE, /* 10936 */ IC_VEX_L_W_OPSIZE, /* 10937 */ IC_VEX_L_W_OPSIZE, /* 10938 */ IC_VEX_L_W_OPSIZE, /* 10939 */ IC_VEX_L_W_OPSIZE, /* 10940 */ IC_VEX_L_W_OPSIZE, /* 10941 */ IC_VEX_L_W_OPSIZE, /* 10942 */ IC_VEX_L_W_OPSIZE, /* 10943 */ IC_VEX_L, /* 10944 */ IC_VEX_L, /* 10945 */ IC_VEX_L_XS, /* 10946 */ IC_VEX_L_XS, /* 10947 */ IC_VEX_L_XD, /* 10948 */ IC_VEX_L_XD, /* 10949 */ IC_VEX_L_XD, /* 10950 */ IC_VEX_L_XD, /* 10951 */ IC_VEX_L_W, /* 10952 */ IC_VEX_L_W, /* 10953 */ IC_VEX_L_W_XS, /* 10954 */ IC_VEX_L_W_XS, /* 10955 */ IC_VEX_L_W_XD, /* 10956 */ IC_VEX_L_W_XD, /* 10957 */ IC_VEX_L_W_XD, /* 10958 */ IC_VEX_L_W_XD, /* 10959 */ IC_VEX_L_OPSIZE, /* 10960 */ IC_VEX_L_OPSIZE, /* 10961 */ IC_VEX_L_OPSIZE, /* 10962 */ IC_VEX_L_OPSIZE, /* 10963 */ IC_VEX_L_OPSIZE, /* 10964 */ IC_VEX_L_OPSIZE, /* 10965 */ IC_VEX_L_OPSIZE, /* 10966 */ IC_VEX_L_OPSIZE, /* 10967 */ IC_VEX_L_W_OPSIZE, /* 10968 */ IC_VEX_L_W_OPSIZE, /* 10969 */ IC_VEX_L_W_OPSIZE, /* 10970 */ IC_VEX_L_W_OPSIZE, /* 10971 */ IC_VEX_L_W_OPSIZE, /* 10972 */ IC_VEX_L_W_OPSIZE, /* 10973 */ IC_VEX_L_W_OPSIZE, /* 10974 */ IC_VEX_L_W_OPSIZE, /* 10975 */ IC_VEX_L, /* 10976 */ IC_VEX_L, /* 10977 */ IC_VEX_L_XS, /* 10978 */ IC_VEX_L_XS, /* 10979 */ IC_VEX_L_XD, /* 10980 */ IC_VEX_L_XD, /* 10981 */ IC_VEX_L_XD, /* 10982 */ IC_VEX_L_XD, /* 10983 */ IC_VEX_L_W, /* 10984 */ IC_VEX_L_W, /* 10985 */ IC_VEX_L_W_XS, /* 10986 */ IC_VEX_L_W_XS, /* 10987 */ IC_VEX_L_W_XD, /* 10988 */ IC_VEX_L_W_XD, /* 10989 */ IC_VEX_L_W_XD, /* 10990 */ IC_VEX_L_W_XD, /* 10991 */ IC_VEX_L_OPSIZE, /* 10992 */ IC_VEX_L_OPSIZE, /* 10993 */ IC_VEX_L_OPSIZE, /* 10994 */ IC_VEX_L_OPSIZE, /* 10995 */ IC_VEX_L_OPSIZE, /* 10996 */ IC_VEX_L_OPSIZE, /* 10997 */ IC_VEX_L_OPSIZE, /* 10998 */ IC_VEX_L_OPSIZE, /* 10999 */ IC_VEX_L_W_OPSIZE, /* 11000 */ IC_VEX_L_W_OPSIZE, /* 11001 */ IC_VEX_L_W_OPSIZE, /* 11002 */ IC_VEX_L_W_OPSIZE, /* 11003 */ IC_VEX_L_W_OPSIZE, /* 11004 */ IC_VEX_L_W_OPSIZE, /* 11005 */ IC_VEX_L_W_OPSIZE, /* 11006 */ IC_VEX_L_W_OPSIZE, /* 11007 */ IC_EVEX_L_K_B, /* 11008 */ IC_EVEX_L_K_B, /* 11009 */ IC_EVEX_L_XS_K_B, /* 11010 */ IC_EVEX_L_XS_K_B, /* 11011 */ IC_EVEX_L_XD_K_B, /* 11012 */ IC_EVEX_L_XD_K_B, /* 11013 */ IC_EVEX_L_XD_K_B, /* 11014 */ IC_EVEX_L_XD_K_B, /* 11015 */ IC_EVEX_L_W_K_B, /* 11016 */ IC_EVEX_L_W_K_B, /* 11017 */ IC_EVEX_L_W_XS_K_B, /* 11018 */ IC_EVEX_L_W_XS_K_B, /* 11019 */ IC_EVEX_L_W_XD_K_B, /* 11020 */ IC_EVEX_L_W_XD_K_B, /* 11021 */ IC_EVEX_L_W_XD_K_B, /* 11022 */ IC_EVEX_L_W_XD_K_B, /* 11023 */ IC_EVEX_L_OPSIZE_K_B, /* 11024 */ IC_EVEX_L_OPSIZE_K_B, /* 11025 */ IC_EVEX_L_OPSIZE_K_B, /* 11026 */ IC_EVEX_L_OPSIZE_K_B, /* 11027 */ IC_EVEX_L_OPSIZE_K_B, /* 11028 */ IC_EVEX_L_OPSIZE_K_B, /* 11029 */ IC_EVEX_L_OPSIZE_K_B, /* 11030 */ IC_EVEX_L_OPSIZE_K_B, /* 11031 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11032 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11033 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11034 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11035 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11036 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11037 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11038 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11039 */ IC_EVEX_L_K_B, /* 11040 */ IC_EVEX_L_K_B, /* 11041 */ IC_EVEX_L_XS_K_B, /* 11042 */ IC_EVEX_L_XS_K_B, /* 11043 */ IC_EVEX_L_XD_K_B, /* 11044 */ IC_EVEX_L_XD_K_B, /* 11045 */ IC_EVEX_L_XD_K_B, /* 11046 */ IC_EVEX_L_XD_K_B, /* 11047 */ IC_EVEX_L_W_K_B, /* 11048 */ IC_EVEX_L_W_K_B, /* 11049 */ IC_EVEX_L_W_XS_K_B, /* 11050 */ IC_EVEX_L_W_XS_K_B, /* 11051 */ IC_EVEX_L_W_XD_K_B, /* 11052 */ IC_EVEX_L_W_XD_K_B, /* 11053 */ IC_EVEX_L_W_XD_K_B, /* 11054 */ IC_EVEX_L_W_XD_K_B, /* 11055 */ IC_EVEX_L_OPSIZE_K_B, /* 11056 */ IC_EVEX_L_OPSIZE_K_B, /* 11057 */ IC_EVEX_L_OPSIZE_K_B, /* 11058 */ IC_EVEX_L_OPSIZE_K_B, /* 11059 */ IC_EVEX_L_OPSIZE_K_B, /* 11060 */ IC_EVEX_L_OPSIZE_K_B, /* 11061 */ IC_EVEX_L_OPSIZE_K_B, /* 11062 */ IC_EVEX_L_OPSIZE_K_B, /* 11063 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11064 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11065 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11066 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11067 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11068 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11069 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11070 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11071 */ IC_EVEX_L_K_B, /* 11072 */ IC_EVEX_L_K_B, /* 11073 */ IC_EVEX_L_XS_K_B, /* 11074 */ IC_EVEX_L_XS_K_B, /* 11075 */ IC_EVEX_L_XD_K_B, /* 11076 */ IC_EVEX_L_XD_K_B, /* 11077 */ IC_EVEX_L_XD_K_B, /* 11078 */ IC_EVEX_L_XD_K_B, /* 11079 */ IC_EVEX_L_W_K_B, /* 11080 */ IC_EVEX_L_W_K_B, /* 11081 */ IC_EVEX_L_W_XS_K_B, /* 11082 */ IC_EVEX_L_W_XS_K_B, /* 11083 */ IC_EVEX_L_W_XD_K_B, /* 11084 */ IC_EVEX_L_W_XD_K_B, /* 11085 */ IC_EVEX_L_W_XD_K_B, /* 11086 */ IC_EVEX_L_W_XD_K_B, /* 11087 */ IC_EVEX_L_OPSIZE_K_B, /* 11088 */ IC_EVEX_L_OPSIZE_K_B, /* 11089 */ IC_EVEX_L_OPSIZE_K_B, /* 11090 */ IC_EVEX_L_OPSIZE_K_B, /* 11091 */ IC_EVEX_L_OPSIZE_K_B, /* 11092 */ IC_EVEX_L_OPSIZE_K_B, /* 11093 */ IC_EVEX_L_OPSIZE_K_B, /* 11094 */ IC_EVEX_L_OPSIZE_K_B, /* 11095 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11096 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11097 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11098 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11099 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11100 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11101 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11102 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11103 */ IC_EVEX_L_K_B, /* 11104 */ IC_EVEX_L_K_B, /* 11105 */ IC_EVEX_L_XS_K_B, /* 11106 */ IC_EVEX_L_XS_K_B, /* 11107 */ IC_EVEX_L_XD_K_B, /* 11108 */ IC_EVEX_L_XD_K_B, /* 11109 */ IC_EVEX_L_XD_K_B, /* 11110 */ IC_EVEX_L_XD_K_B, /* 11111 */ IC_EVEX_L_W_K_B, /* 11112 */ IC_EVEX_L_W_K_B, /* 11113 */ IC_EVEX_L_W_XS_K_B, /* 11114 */ IC_EVEX_L_W_XS_K_B, /* 11115 */ IC_EVEX_L_W_XD_K_B, /* 11116 */ IC_EVEX_L_W_XD_K_B, /* 11117 */ IC_EVEX_L_W_XD_K_B, /* 11118 */ IC_EVEX_L_W_XD_K_B, /* 11119 */ IC_EVEX_L_OPSIZE_K_B, /* 11120 */ IC_EVEX_L_OPSIZE_K_B, /* 11121 */ IC_EVEX_L_OPSIZE_K_B, /* 11122 */ IC_EVEX_L_OPSIZE_K_B, /* 11123 */ IC_EVEX_L_OPSIZE_K_B, /* 11124 */ IC_EVEX_L_OPSIZE_K_B, /* 11125 */ IC_EVEX_L_OPSIZE_K_B, /* 11126 */ IC_EVEX_L_OPSIZE_K_B, /* 11127 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11128 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11129 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11130 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11131 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11132 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11133 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11134 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11135 */ IC_EVEX_L_K_B, /* 11136 */ IC_EVEX_L_K_B, /* 11137 */ IC_EVEX_L_XS_K_B, /* 11138 */ IC_EVEX_L_XS_K_B, /* 11139 */ IC_EVEX_L_XD_K_B, /* 11140 */ IC_EVEX_L_XD_K_B, /* 11141 */ IC_EVEX_L_XD_K_B, /* 11142 */ IC_EVEX_L_XD_K_B, /* 11143 */ IC_EVEX_L_W_K_B, /* 11144 */ IC_EVEX_L_W_K_B, /* 11145 */ IC_EVEX_L_W_XS_K_B, /* 11146 */ IC_EVEX_L_W_XS_K_B, /* 11147 */ IC_EVEX_L_W_XD_K_B, /* 11148 */ IC_EVEX_L_W_XD_K_B, /* 11149 */ IC_EVEX_L_W_XD_K_B, /* 11150 */ IC_EVEX_L_W_XD_K_B, /* 11151 */ IC_EVEX_L_OPSIZE_K_B, /* 11152 */ IC_EVEX_L_OPSIZE_K_B, /* 11153 */ IC_EVEX_L_OPSIZE_K_B, /* 11154 */ IC_EVEX_L_OPSIZE_K_B, /* 11155 */ IC_EVEX_L_OPSIZE_K_B, /* 11156 */ IC_EVEX_L_OPSIZE_K_B, /* 11157 */ IC_EVEX_L_OPSIZE_K_B, /* 11158 */ IC_EVEX_L_OPSIZE_K_B, /* 11159 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11160 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11161 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11162 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11163 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11164 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11165 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11166 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11167 */ IC_EVEX_L_K_B, /* 11168 */ IC_EVEX_L_K_B, /* 11169 */ IC_EVEX_L_XS_K_B, /* 11170 */ IC_EVEX_L_XS_K_B, /* 11171 */ IC_EVEX_L_XD_K_B, /* 11172 */ IC_EVEX_L_XD_K_B, /* 11173 */ IC_EVEX_L_XD_K_B, /* 11174 */ IC_EVEX_L_XD_K_B, /* 11175 */ IC_EVEX_L_W_K_B, /* 11176 */ IC_EVEX_L_W_K_B, /* 11177 */ IC_EVEX_L_W_XS_K_B, /* 11178 */ IC_EVEX_L_W_XS_K_B, /* 11179 */ IC_EVEX_L_W_XD_K_B, /* 11180 */ IC_EVEX_L_W_XD_K_B, /* 11181 */ IC_EVEX_L_W_XD_K_B, /* 11182 */ IC_EVEX_L_W_XD_K_B, /* 11183 */ IC_EVEX_L_OPSIZE_K_B, /* 11184 */ IC_EVEX_L_OPSIZE_K_B, /* 11185 */ IC_EVEX_L_OPSIZE_K_B, /* 11186 */ IC_EVEX_L_OPSIZE_K_B, /* 11187 */ IC_EVEX_L_OPSIZE_K_B, /* 11188 */ IC_EVEX_L_OPSIZE_K_B, /* 11189 */ IC_EVEX_L_OPSIZE_K_B, /* 11190 */ IC_EVEX_L_OPSIZE_K_B, /* 11191 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11192 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11193 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11194 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11195 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11196 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11197 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11198 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11199 */ IC_EVEX_L_K_B, /* 11200 */ IC_EVEX_L_K_B, /* 11201 */ IC_EVEX_L_XS_K_B, /* 11202 */ IC_EVEX_L_XS_K_B, /* 11203 */ IC_EVEX_L_XD_K_B, /* 11204 */ IC_EVEX_L_XD_K_B, /* 11205 */ IC_EVEX_L_XD_K_B, /* 11206 */ IC_EVEX_L_XD_K_B, /* 11207 */ IC_EVEX_L_W_K_B, /* 11208 */ IC_EVEX_L_W_K_B, /* 11209 */ IC_EVEX_L_W_XS_K_B, /* 11210 */ IC_EVEX_L_W_XS_K_B, /* 11211 */ IC_EVEX_L_W_XD_K_B, /* 11212 */ IC_EVEX_L_W_XD_K_B, /* 11213 */ IC_EVEX_L_W_XD_K_B, /* 11214 */ IC_EVEX_L_W_XD_K_B, /* 11215 */ IC_EVEX_L_OPSIZE_K_B, /* 11216 */ IC_EVEX_L_OPSIZE_K_B, /* 11217 */ IC_EVEX_L_OPSIZE_K_B, /* 11218 */ IC_EVEX_L_OPSIZE_K_B, /* 11219 */ IC_EVEX_L_OPSIZE_K_B, /* 11220 */ IC_EVEX_L_OPSIZE_K_B, /* 11221 */ IC_EVEX_L_OPSIZE_K_B, /* 11222 */ IC_EVEX_L_OPSIZE_K_B, /* 11223 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11224 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11225 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11226 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11227 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11228 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11229 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11230 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11231 */ IC_EVEX_L_K_B, /* 11232 */ IC_EVEX_L_K_B, /* 11233 */ IC_EVEX_L_XS_K_B, /* 11234 */ IC_EVEX_L_XS_K_B, /* 11235 */ IC_EVEX_L_XD_K_B, /* 11236 */ IC_EVEX_L_XD_K_B, /* 11237 */ IC_EVEX_L_XD_K_B, /* 11238 */ IC_EVEX_L_XD_K_B, /* 11239 */ IC_EVEX_L_W_K_B, /* 11240 */ IC_EVEX_L_W_K_B, /* 11241 */ IC_EVEX_L_W_XS_K_B, /* 11242 */ IC_EVEX_L_W_XS_K_B, /* 11243 */ IC_EVEX_L_W_XD_K_B, /* 11244 */ IC_EVEX_L_W_XD_K_B, /* 11245 */ IC_EVEX_L_W_XD_K_B, /* 11246 */ IC_EVEX_L_W_XD_K_B, /* 11247 */ IC_EVEX_L_OPSIZE_K_B, /* 11248 */ IC_EVEX_L_OPSIZE_K_B, /* 11249 */ IC_EVEX_L_OPSIZE_K_B, /* 11250 */ IC_EVEX_L_OPSIZE_K_B, /* 11251 */ IC_EVEX_L_OPSIZE_K_B, /* 11252 */ IC_EVEX_L_OPSIZE_K_B, /* 11253 */ IC_EVEX_L_OPSIZE_K_B, /* 11254 */ IC_EVEX_L_OPSIZE_K_B, /* 11255 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11256 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11257 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11258 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11259 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11260 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11261 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11262 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11263 */ IC, /* 11264 */ IC_64BIT, /* 11265 */ IC_XS, /* 11266 */ IC_64BIT_XS, /* 11267 */ IC_XD, /* 11268 */ IC_64BIT_XD, /* 11269 */ IC_XS, /* 11270 */ IC_64BIT_XS, /* 11271 */ IC, /* 11272 */ IC_64BIT_REXW, /* 11273 */ IC_XS, /* 11274 */ IC_64BIT_REXW_XS, /* 11275 */ IC_XD, /* 11276 */ IC_64BIT_REXW_XD, /* 11277 */ IC_XS, /* 11278 */ IC_64BIT_REXW_XS, /* 11279 */ IC_OPSIZE, /* 11280 */ IC_64BIT_OPSIZE, /* 11281 */ IC_XS_OPSIZE, /* 11282 */ IC_64BIT_XS_OPSIZE, /* 11283 */ IC_XD_OPSIZE, /* 11284 */ IC_64BIT_XD_OPSIZE, /* 11285 */ IC_XS_OPSIZE, /* 11286 */ IC_64BIT_XD_OPSIZE, /* 11287 */ IC_OPSIZE, /* 11288 */ IC_64BIT_REXW_OPSIZE, /* 11289 */ IC_XS_OPSIZE, /* 11290 */ IC_64BIT_REXW_XS, /* 11291 */ IC_XD_OPSIZE, /* 11292 */ IC_64BIT_REXW_XD, /* 11293 */ IC_XS_OPSIZE, /* 11294 */ IC_64BIT_REXW_XS, /* 11295 */ IC_ADSIZE, /* 11296 */ IC_64BIT_ADSIZE, /* 11297 */ IC_XS, /* 11298 */ IC_64BIT_XS, /* 11299 */ IC_XD, /* 11300 */ IC_64BIT_XD, /* 11301 */ IC_XS, /* 11302 */ IC_64BIT_XS, /* 11303 */ IC_ADSIZE, /* 11304 */ IC_64BIT_REXW_ADSIZE, /* 11305 */ IC_XS, /* 11306 */ IC_64BIT_REXW_XS, /* 11307 */ IC_XD, /* 11308 */ IC_64BIT_REXW_XD, /* 11309 */ IC_XS, /* 11310 */ IC_64BIT_REXW_XS, /* 11311 */ IC_OPSIZE_ADSIZE, /* 11312 */ IC_64BIT_OPSIZE_ADSIZE, /* 11313 */ IC_XS_OPSIZE, /* 11314 */ IC_64BIT_XS_OPSIZE, /* 11315 */ IC_XD_OPSIZE, /* 11316 */ IC_64BIT_XD_OPSIZE, /* 11317 */ IC_XS_OPSIZE, /* 11318 */ IC_64BIT_XD_OPSIZE, /* 11319 */ IC_OPSIZE_ADSIZE, /* 11320 */ IC_64BIT_REXW_OPSIZE, /* 11321 */ IC_XS_OPSIZE, /* 11322 */ IC_64BIT_REXW_XS, /* 11323 */ IC_XD_OPSIZE, /* 11324 */ IC_64BIT_REXW_XD, /* 11325 */ IC_XS_OPSIZE, /* 11326 */ IC_64BIT_REXW_XS, /* 11327 */ IC_VEX, /* 11328 */ IC_VEX, /* 11329 */ IC_VEX_XS, /* 11330 */ IC_VEX_XS, /* 11331 */ IC_VEX_XD, /* 11332 */ IC_VEX_XD, /* 11333 */ IC_VEX_XD, /* 11334 */ IC_VEX_XD, /* 11335 */ IC_VEX_W, /* 11336 */ IC_VEX_W, /* 11337 */ IC_VEX_W_XS, /* 11338 */ IC_VEX_W_XS, /* 11339 */ IC_VEX_W_XD, /* 11340 */ IC_VEX_W_XD, /* 11341 */ IC_VEX_W_XD, /* 11342 */ IC_VEX_W_XD, /* 11343 */ IC_VEX_OPSIZE, /* 11344 */ IC_VEX_OPSIZE, /* 11345 */ IC_VEX_OPSIZE, /* 11346 */ IC_VEX_OPSIZE, /* 11347 */ IC_VEX_OPSIZE, /* 11348 */ IC_VEX_OPSIZE, /* 11349 */ IC_VEX_OPSIZE, /* 11350 */ IC_VEX_OPSIZE, /* 11351 */ IC_VEX_W_OPSIZE, /* 11352 */ IC_VEX_W_OPSIZE, /* 11353 */ IC_VEX_W_OPSIZE, /* 11354 */ IC_VEX_W_OPSIZE, /* 11355 */ IC_VEX_W_OPSIZE, /* 11356 */ IC_VEX_W_OPSIZE, /* 11357 */ IC_VEX_W_OPSIZE, /* 11358 */ IC_VEX_W_OPSIZE, /* 11359 */ IC_VEX, /* 11360 */ IC_VEX, /* 11361 */ IC_VEX_XS, /* 11362 */ IC_VEX_XS, /* 11363 */ IC_VEX_XD, /* 11364 */ IC_VEX_XD, /* 11365 */ IC_VEX_XD, /* 11366 */ IC_VEX_XD, /* 11367 */ IC_VEX_W, /* 11368 */ IC_VEX_W, /* 11369 */ IC_VEX_W_XS, /* 11370 */ IC_VEX_W_XS, /* 11371 */ IC_VEX_W_XD, /* 11372 */ IC_VEX_W_XD, /* 11373 */ IC_VEX_W_XD, /* 11374 */ IC_VEX_W_XD, /* 11375 */ IC_VEX_OPSIZE, /* 11376 */ IC_VEX_OPSIZE, /* 11377 */ IC_VEX_OPSIZE, /* 11378 */ IC_VEX_OPSIZE, /* 11379 */ IC_VEX_OPSIZE, /* 11380 */ IC_VEX_OPSIZE, /* 11381 */ IC_VEX_OPSIZE, /* 11382 */ IC_VEX_OPSIZE, /* 11383 */ IC_VEX_W_OPSIZE, /* 11384 */ IC_VEX_W_OPSIZE, /* 11385 */ IC_VEX_W_OPSIZE, /* 11386 */ IC_VEX_W_OPSIZE, /* 11387 */ IC_VEX_W_OPSIZE, /* 11388 */ IC_VEX_W_OPSIZE, /* 11389 */ IC_VEX_W_OPSIZE, /* 11390 */ IC_VEX_W_OPSIZE, /* 11391 */ IC_VEX_L, /* 11392 */ IC_VEX_L, /* 11393 */ IC_VEX_L_XS, /* 11394 */ IC_VEX_L_XS, /* 11395 */ IC_VEX_L_XD, /* 11396 */ IC_VEX_L_XD, /* 11397 */ IC_VEX_L_XD, /* 11398 */ IC_VEX_L_XD, /* 11399 */ IC_VEX_L_W, /* 11400 */ IC_VEX_L_W, /* 11401 */ IC_VEX_L_W_XS, /* 11402 */ IC_VEX_L_W_XS, /* 11403 */ IC_VEX_L_W_XD, /* 11404 */ IC_VEX_L_W_XD, /* 11405 */ IC_VEX_L_W_XD, /* 11406 */ IC_VEX_L_W_XD, /* 11407 */ IC_VEX_L_OPSIZE, /* 11408 */ IC_VEX_L_OPSIZE, /* 11409 */ IC_VEX_L_OPSIZE, /* 11410 */ IC_VEX_L_OPSIZE, /* 11411 */ IC_VEX_L_OPSIZE, /* 11412 */ IC_VEX_L_OPSIZE, /* 11413 */ IC_VEX_L_OPSIZE, /* 11414 */ IC_VEX_L_OPSIZE, /* 11415 */ IC_VEX_L_W_OPSIZE, /* 11416 */ IC_VEX_L_W_OPSIZE, /* 11417 */ IC_VEX_L_W_OPSIZE, /* 11418 */ IC_VEX_L_W_OPSIZE, /* 11419 */ IC_VEX_L_W_OPSIZE, /* 11420 */ IC_VEX_L_W_OPSIZE, /* 11421 */ IC_VEX_L_W_OPSIZE, /* 11422 */ IC_VEX_L_W_OPSIZE, /* 11423 */ IC_VEX_L, /* 11424 */ IC_VEX_L, /* 11425 */ IC_VEX_L_XS, /* 11426 */ IC_VEX_L_XS, /* 11427 */ IC_VEX_L_XD, /* 11428 */ IC_VEX_L_XD, /* 11429 */ IC_VEX_L_XD, /* 11430 */ IC_VEX_L_XD, /* 11431 */ IC_VEX_L_W, /* 11432 */ IC_VEX_L_W, /* 11433 */ IC_VEX_L_W_XS, /* 11434 */ IC_VEX_L_W_XS, /* 11435 */ IC_VEX_L_W_XD, /* 11436 */ IC_VEX_L_W_XD, /* 11437 */ IC_VEX_L_W_XD, /* 11438 */ IC_VEX_L_W_XD, /* 11439 */ IC_VEX_L_OPSIZE, /* 11440 */ IC_VEX_L_OPSIZE, /* 11441 */ IC_VEX_L_OPSIZE, /* 11442 */ IC_VEX_L_OPSIZE, /* 11443 */ IC_VEX_L_OPSIZE, /* 11444 */ IC_VEX_L_OPSIZE, /* 11445 */ IC_VEX_L_OPSIZE, /* 11446 */ IC_VEX_L_OPSIZE, /* 11447 */ IC_VEX_L_W_OPSIZE, /* 11448 */ IC_VEX_L_W_OPSIZE, /* 11449 */ IC_VEX_L_W_OPSIZE, /* 11450 */ IC_VEX_L_W_OPSIZE, /* 11451 */ IC_VEX_L_W_OPSIZE, /* 11452 */ IC_VEX_L_W_OPSIZE, /* 11453 */ IC_VEX_L_W_OPSIZE, /* 11454 */ IC_VEX_L_W_OPSIZE, /* 11455 */ IC_VEX_L, /* 11456 */ IC_VEX_L, /* 11457 */ IC_VEX_L_XS, /* 11458 */ IC_VEX_L_XS, /* 11459 */ IC_VEX_L_XD, /* 11460 */ IC_VEX_L_XD, /* 11461 */ IC_VEX_L_XD, /* 11462 */ IC_VEX_L_XD, /* 11463 */ IC_VEX_L_W, /* 11464 */ IC_VEX_L_W, /* 11465 */ IC_VEX_L_W_XS, /* 11466 */ IC_VEX_L_W_XS, /* 11467 */ IC_VEX_L_W_XD, /* 11468 */ IC_VEX_L_W_XD, /* 11469 */ IC_VEX_L_W_XD, /* 11470 */ IC_VEX_L_W_XD, /* 11471 */ IC_VEX_L_OPSIZE, /* 11472 */ IC_VEX_L_OPSIZE, /* 11473 */ IC_VEX_L_OPSIZE, /* 11474 */ IC_VEX_L_OPSIZE, /* 11475 */ IC_VEX_L_OPSIZE, /* 11476 */ IC_VEX_L_OPSIZE, /* 11477 */ IC_VEX_L_OPSIZE, /* 11478 */ IC_VEX_L_OPSIZE, /* 11479 */ IC_VEX_L_W_OPSIZE, /* 11480 */ IC_VEX_L_W_OPSIZE, /* 11481 */ IC_VEX_L_W_OPSIZE, /* 11482 */ IC_VEX_L_W_OPSIZE, /* 11483 */ IC_VEX_L_W_OPSIZE, /* 11484 */ IC_VEX_L_W_OPSIZE, /* 11485 */ IC_VEX_L_W_OPSIZE, /* 11486 */ IC_VEX_L_W_OPSIZE, /* 11487 */ IC_VEX_L, /* 11488 */ IC_VEX_L, /* 11489 */ IC_VEX_L_XS, /* 11490 */ IC_VEX_L_XS, /* 11491 */ IC_VEX_L_XD, /* 11492 */ IC_VEX_L_XD, /* 11493 */ IC_VEX_L_XD, /* 11494 */ IC_VEX_L_XD, /* 11495 */ IC_VEX_L_W, /* 11496 */ IC_VEX_L_W, /* 11497 */ IC_VEX_L_W_XS, /* 11498 */ IC_VEX_L_W_XS, /* 11499 */ IC_VEX_L_W_XD, /* 11500 */ IC_VEX_L_W_XD, /* 11501 */ IC_VEX_L_W_XD, /* 11502 */ IC_VEX_L_W_XD, /* 11503 */ IC_VEX_L_OPSIZE, /* 11504 */ IC_VEX_L_OPSIZE, /* 11505 */ IC_VEX_L_OPSIZE, /* 11506 */ IC_VEX_L_OPSIZE, /* 11507 */ IC_VEX_L_OPSIZE, /* 11508 */ IC_VEX_L_OPSIZE, /* 11509 */ IC_VEX_L_OPSIZE, /* 11510 */ IC_VEX_L_OPSIZE, /* 11511 */ IC_VEX_L_W_OPSIZE, /* 11512 */ IC_VEX_L_W_OPSIZE, /* 11513 */ IC_VEX_L_W_OPSIZE, /* 11514 */ IC_VEX_L_W_OPSIZE, /* 11515 */ IC_VEX_L_W_OPSIZE, /* 11516 */ IC_VEX_L_W_OPSIZE, /* 11517 */ IC_VEX_L_W_OPSIZE, /* 11518 */ IC_VEX_L_W_OPSIZE, /* 11519 */ IC_EVEX_L2_K_B, /* 11520 */ IC_EVEX_L2_K_B, /* 11521 */ IC_EVEX_L2_XS_K_B, /* 11522 */ IC_EVEX_L2_XS_K_B, /* 11523 */ IC_EVEX_L2_XD_K_B, /* 11524 */ IC_EVEX_L2_XD_K_B, /* 11525 */ IC_EVEX_L2_XD_K_B, /* 11526 */ IC_EVEX_L2_XD_K_B, /* 11527 */ IC_EVEX_L2_W_K_B, /* 11528 */ IC_EVEX_L2_W_K_B, /* 11529 */ IC_EVEX_L2_W_XS_K_B, /* 11530 */ IC_EVEX_L2_W_XS_K_B, /* 11531 */ IC_EVEX_L2_W_XD_K_B, /* 11532 */ IC_EVEX_L2_W_XD_K_B, /* 11533 */ IC_EVEX_L2_W_XD_K_B, /* 11534 */ IC_EVEX_L2_W_XD_K_B, /* 11535 */ IC_EVEX_L2_OPSIZE_K_B, /* 11536 */ IC_EVEX_L2_OPSIZE_K_B, /* 11537 */ IC_EVEX_L2_OPSIZE_K_B, /* 11538 */ IC_EVEX_L2_OPSIZE_K_B, /* 11539 */ IC_EVEX_L2_OPSIZE_K_B, /* 11540 */ IC_EVEX_L2_OPSIZE_K_B, /* 11541 */ IC_EVEX_L2_OPSIZE_K_B, /* 11542 */ IC_EVEX_L2_OPSIZE_K_B, /* 11543 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11544 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11545 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11546 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11547 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11548 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11549 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11550 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11551 */ IC_EVEX_L2_K_B, /* 11552 */ IC_EVEX_L2_K_B, /* 11553 */ IC_EVEX_L2_XS_K_B, /* 11554 */ IC_EVEX_L2_XS_K_B, /* 11555 */ IC_EVEX_L2_XD_K_B, /* 11556 */ IC_EVEX_L2_XD_K_B, /* 11557 */ IC_EVEX_L2_XD_K_B, /* 11558 */ IC_EVEX_L2_XD_K_B, /* 11559 */ IC_EVEX_L2_W_K_B, /* 11560 */ IC_EVEX_L2_W_K_B, /* 11561 */ IC_EVEX_L2_W_XS_K_B, /* 11562 */ IC_EVEX_L2_W_XS_K_B, /* 11563 */ IC_EVEX_L2_W_XD_K_B, /* 11564 */ IC_EVEX_L2_W_XD_K_B, /* 11565 */ IC_EVEX_L2_W_XD_K_B, /* 11566 */ IC_EVEX_L2_W_XD_K_B, /* 11567 */ IC_EVEX_L2_OPSIZE_K_B, /* 11568 */ IC_EVEX_L2_OPSIZE_K_B, /* 11569 */ IC_EVEX_L2_OPSIZE_K_B, /* 11570 */ IC_EVEX_L2_OPSIZE_K_B, /* 11571 */ IC_EVEX_L2_OPSIZE_K_B, /* 11572 */ IC_EVEX_L2_OPSIZE_K_B, /* 11573 */ IC_EVEX_L2_OPSIZE_K_B, /* 11574 */ IC_EVEX_L2_OPSIZE_K_B, /* 11575 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11576 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11577 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11578 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11579 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11580 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11581 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11582 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11583 */ IC_EVEX_L2_K_B, /* 11584 */ IC_EVEX_L2_K_B, /* 11585 */ IC_EVEX_L2_XS_K_B, /* 11586 */ IC_EVEX_L2_XS_K_B, /* 11587 */ IC_EVEX_L2_XD_K_B, /* 11588 */ IC_EVEX_L2_XD_K_B, /* 11589 */ IC_EVEX_L2_XD_K_B, /* 11590 */ IC_EVEX_L2_XD_K_B, /* 11591 */ IC_EVEX_L2_W_K_B, /* 11592 */ IC_EVEX_L2_W_K_B, /* 11593 */ IC_EVEX_L2_W_XS_K_B, /* 11594 */ IC_EVEX_L2_W_XS_K_B, /* 11595 */ IC_EVEX_L2_W_XD_K_B, /* 11596 */ IC_EVEX_L2_W_XD_K_B, /* 11597 */ IC_EVEX_L2_W_XD_K_B, /* 11598 */ IC_EVEX_L2_W_XD_K_B, /* 11599 */ IC_EVEX_L2_OPSIZE_K_B, /* 11600 */ IC_EVEX_L2_OPSIZE_K_B, /* 11601 */ IC_EVEX_L2_OPSIZE_K_B, /* 11602 */ IC_EVEX_L2_OPSIZE_K_B, /* 11603 */ IC_EVEX_L2_OPSIZE_K_B, /* 11604 */ IC_EVEX_L2_OPSIZE_K_B, /* 11605 */ IC_EVEX_L2_OPSIZE_K_B, /* 11606 */ IC_EVEX_L2_OPSIZE_K_B, /* 11607 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11608 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11609 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11610 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11611 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11612 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11613 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11614 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11615 */ IC_EVEX_L2_K_B, /* 11616 */ IC_EVEX_L2_K_B, /* 11617 */ IC_EVEX_L2_XS_K_B, /* 11618 */ IC_EVEX_L2_XS_K_B, /* 11619 */ IC_EVEX_L2_XD_K_B, /* 11620 */ IC_EVEX_L2_XD_K_B, /* 11621 */ IC_EVEX_L2_XD_K_B, /* 11622 */ IC_EVEX_L2_XD_K_B, /* 11623 */ IC_EVEX_L2_W_K_B, /* 11624 */ IC_EVEX_L2_W_K_B, /* 11625 */ IC_EVEX_L2_W_XS_K_B, /* 11626 */ IC_EVEX_L2_W_XS_K_B, /* 11627 */ IC_EVEX_L2_W_XD_K_B, /* 11628 */ IC_EVEX_L2_W_XD_K_B, /* 11629 */ IC_EVEX_L2_W_XD_K_B, /* 11630 */ IC_EVEX_L2_W_XD_K_B, /* 11631 */ IC_EVEX_L2_OPSIZE_K_B, /* 11632 */ IC_EVEX_L2_OPSIZE_K_B, /* 11633 */ IC_EVEX_L2_OPSIZE_K_B, /* 11634 */ IC_EVEX_L2_OPSIZE_K_B, /* 11635 */ IC_EVEX_L2_OPSIZE_K_B, /* 11636 */ IC_EVEX_L2_OPSIZE_K_B, /* 11637 */ IC_EVEX_L2_OPSIZE_K_B, /* 11638 */ IC_EVEX_L2_OPSIZE_K_B, /* 11639 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11640 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11641 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11642 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11643 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11644 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11645 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11646 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11647 */ IC_EVEX_L2_K_B, /* 11648 */ IC_EVEX_L2_K_B, /* 11649 */ IC_EVEX_L2_XS_K_B, /* 11650 */ IC_EVEX_L2_XS_K_B, /* 11651 */ IC_EVEX_L2_XD_K_B, /* 11652 */ IC_EVEX_L2_XD_K_B, /* 11653 */ IC_EVEX_L2_XD_K_B, /* 11654 */ IC_EVEX_L2_XD_K_B, /* 11655 */ IC_EVEX_L2_W_K_B, /* 11656 */ IC_EVEX_L2_W_K_B, /* 11657 */ IC_EVEX_L2_W_XS_K_B, /* 11658 */ IC_EVEX_L2_W_XS_K_B, /* 11659 */ IC_EVEX_L2_W_XD_K_B, /* 11660 */ IC_EVEX_L2_W_XD_K_B, /* 11661 */ IC_EVEX_L2_W_XD_K_B, /* 11662 */ IC_EVEX_L2_W_XD_K_B, /* 11663 */ IC_EVEX_L2_OPSIZE_K_B, /* 11664 */ IC_EVEX_L2_OPSIZE_K_B, /* 11665 */ IC_EVEX_L2_OPSIZE_K_B, /* 11666 */ IC_EVEX_L2_OPSIZE_K_B, /* 11667 */ IC_EVEX_L2_OPSIZE_K_B, /* 11668 */ IC_EVEX_L2_OPSIZE_K_B, /* 11669 */ IC_EVEX_L2_OPSIZE_K_B, /* 11670 */ IC_EVEX_L2_OPSIZE_K_B, /* 11671 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11672 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11673 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11674 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11675 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11676 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11677 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11678 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11679 */ IC_EVEX_L2_K_B, /* 11680 */ IC_EVEX_L2_K_B, /* 11681 */ IC_EVEX_L2_XS_K_B, /* 11682 */ IC_EVEX_L2_XS_K_B, /* 11683 */ IC_EVEX_L2_XD_K_B, /* 11684 */ IC_EVEX_L2_XD_K_B, /* 11685 */ IC_EVEX_L2_XD_K_B, /* 11686 */ IC_EVEX_L2_XD_K_B, /* 11687 */ IC_EVEX_L2_W_K_B, /* 11688 */ IC_EVEX_L2_W_K_B, /* 11689 */ IC_EVEX_L2_W_XS_K_B, /* 11690 */ IC_EVEX_L2_W_XS_K_B, /* 11691 */ IC_EVEX_L2_W_XD_K_B, /* 11692 */ IC_EVEX_L2_W_XD_K_B, /* 11693 */ IC_EVEX_L2_W_XD_K_B, /* 11694 */ IC_EVEX_L2_W_XD_K_B, /* 11695 */ IC_EVEX_L2_OPSIZE_K_B, /* 11696 */ IC_EVEX_L2_OPSIZE_K_B, /* 11697 */ IC_EVEX_L2_OPSIZE_K_B, /* 11698 */ IC_EVEX_L2_OPSIZE_K_B, /* 11699 */ IC_EVEX_L2_OPSIZE_K_B, /* 11700 */ IC_EVEX_L2_OPSIZE_K_B, /* 11701 */ IC_EVEX_L2_OPSIZE_K_B, /* 11702 */ IC_EVEX_L2_OPSIZE_K_B, /* 11703 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11704 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11705 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11706 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11707 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11708 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11709 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11710 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11711 */ IC_EVEX_L2_K_B, /* 11712 */ IC_EVEX_L2_K_B, /* 11713 */ IC_EVEX_L2_XS_K_B, /* 11714 */ IC_EVEX_L2_XS_K_B, /* 11715 */ IC_EVEX_L2_XD_K_B, /* 11716 */ IC_EVEX_L2_XD_K_B, /* 11717 */ IC_EVEX_L2_XD_K_B, /* 11718 */ IC_EVEX_L2_XD_K_B, /* 11719 */ IC_EVEX_L2_W_K_B, /* 11720 */ IC_EVEX_L2_W_K_B, /* 11721 */ IC_EVEX_L2_W_XS_K_B, /* 11722 */ IC_EVEX_L2_W_XS_K_B, /* 11723 */ IC_EVEX_L2_W_XD_K_B, /* 11724 */ IC_EVEX_L2_W_XD_K_B, /* 11725 */ IC_EVEX_L2_W_XD_K_B, /* 11726 */ IC_EVEX_L2_W_XD_K_B, /* 11727 */ IC_EVEX_L2_OPSIZE_K_B, /* 11728 */ IC_EVEX_L2_OPSIZE_K_B, /* 11729 */ IC_EVEX_L2_OPSIZE_K_B, /* 11730 */ IC_EVEX_L2_OPSIZE_K_B, /* 11731 */ IC_EVEX_L2_OPSIZE_K_B, /* 11732 */ IC_EVEX_L2_OPSIZE_K_B, /* 11733 */ IC_EVEX_L2_OPSIZE_K_B, /* 11734 */ IC_EVEX_L2_OPSIZE_K_B, /* 11735 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11736 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11737 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11738 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11739 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11740 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11741 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11742 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11743 */ IC_EVEX_L2_K_B, /* 11744 */ IC_EVEX_L2_K_B, /* 11745 */ IC_EVEX_L2_XS_K_B, /* 11746 */ IC_EVEX_L2_XS_K_B, /* 11747 */ IC_EVEX_L2_XD_K_B, /* 11748 */ IC_EVEX_L2_XD_K_B, /* 11749 */ IC_EVEX_L2_XD_K_B, /* 11750 */ IC_EVEX_L2_XD_K_B, /* 11751 */ IC_EVEX_L2_W_K_B, /* 11752 */ IC_EVEX_L2_W_K_B, /* 11753 */ IC_EVEX_L2_W_XS_K_B, /* 11754 */ IC_EVEX_L2_W_XS_K_B, /* 11755 */ IC_EVEX_L2_W_XD_K_B, /* 11756 */ IC_EVEX_L2_W_XD_K_B, /* 11757 */ IC_EVEX_L2_W_XD_K_B, /* 11758 */ IC_EVEX_L2_W_XD_K_B, /* 11759 */ IC_EVEX_L2_OPSIZE_K_B, /* 11760 */ IC_EVEX_L2_OPSIZE_K_B, /* 11761 */ IC_EVEX_L2_OPSIZE_K_B, /* 11762 */ IC_EVEX_L2_OPSIZE_K_B, /* 11763 */ IC_EVEX_L2_OPSIZE_K_B, /* 11764 */ IC_EVEX_L2_OPSIZE_K_B, /* 11765 */ IC_EVEX_L2_OPSIZE_K_B, /* 11766 */ IC_EVEX_L2_OPSIZE_K_B, /* 11767 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11768 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11769 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11770 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11771 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11772 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11773 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11774 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11775 */ IC, /* 11776 */ IC_64BIT, /* 11777 */ IC_XS, /* 11778 */ IC_64BIT_XS, /* 11779 */ IC_XD, /* 11780 */ IC_64BIT_XD, /* 11781 */ IC_XS, /* 11782 */ IC_64BIT_XS, /* 11783 */ IC, /* 11784 */ IC_64BIT_REXW, /* 11785 */ IC_XS, /* 11786 */ IC_64BIT_REXW_XS, /* 11787 */ IC_XD, /* 11788 */ IC_64BIT_REXW_XD, /* 11789 */ IC_XS, /* 11790 */ IC_64BIT_REXW_XS, /* 11791 */ IC_OPSIZE, /* 11792 */ IC_64BIT_OPSIZE, /* 11793 */ IC_XS_OPSIZE, /* 11794 */ IC_64BIT_XS_OPSIZE, /* 11795 */ IC_XD_OPSIZE, /* 11796 */ IC_64BIT_XD_OPSIZE, /* 11797 */ IC_XS_OPSIZE, /* 11798 */ IC_64BIT_XD_OPSIZE, /* 11799 */ IC_OPSIZE, /* 11800 */ IC_64BIT_REXW_OPSIZE, /* 11801 */ IC_XS_OPSIZE, /* 11802 */ IC_64BIT_REXW_XS, /* 11803 */ IC_XD_OPSIZE, /* 11804 */ IC_64BIT_REXW_XD, /* 11805 */ IC_XS_OPSIZE, /* 11806 */ IC_64BIT_REXW_XS, /* 11807 */ IC_ADSIZE, /* 11808 */ IC_64BIT_ADSIZE, /* 11809 */ IC_XS, /* 11810 */ IC_64BIT_XS, /* 11811 */ IC_XD, /* 11812 */ IC_64BIT_XD, /* 11813 */ IC_XS, /* 11814 */ IC_64BIT_XS, /* 11815 */ IC_ADSIZE, /* 11816 */ IC_64BIT_REXW_ADSIZE, /* 11817 */ IC_XS, /* 11818 */ IC_64BIT_REXW_XS, /* 11819 */ IC_XD, /* 11820 */ IC_64BIT_REXW_XD, /* 11821 */ IC_XS, /* 11822 */ IC_64BIT_REXW_XS, /* 11823 */ IC_OPSIZE_ADSIZE, /* 11824 */ IC_64BIT_OPSIZE_ADSIZE, /* 11825 */ IC_XS_OPSIZE, /* 11826 */ IC_64BIT_XS_OPSIZE, /* 11827 */ IC_XD_OPSIZE, /* 11828 */ IC_64BIT_XD_OPSIZE, /* 11829 */ IC_XS_OPSIZE, /* 11830 */ IC_64BIT_XD_OPSIZE, /* 11831 */ IC_OPSIZE_ADSIZE, /* 11832 */ IC_64BIT_REXW_OPSIZE, /* 11833 */ IC_XS_OPSIZE, /* 11834 */ IC_64BIT_REXW_XS, /* 11835 */ IC_XD_OPSIZE, /* 11836 */ IC_64BIT_REXW_XD, /* 11837 */ IC_XS_OPSIZE, /* 11838 */ IC_64BIT_REXW_XS, /* 11839 */ IC_VEX, /* 11840 */ IC_VEX, /* 11841 */ IC_VEX_XS, /* 11842 */ IC_VEX_XS, /* 11843 */ IC_VEX_XD, /* 11844 */ IC_VEX_XD, /* 11845 */ IC_VEX_XD, /* 11846 */ IC_VEX_XD, /* 11847 */ IC_VEX_W, /* 11848 */ IC_VEX_W, /* 11849 */ IC_VEX_W_XS, /* 11850 */ IC_VEX_W_XS, /* 11851 */ IC_VEX_W_XD, /* 11852 */ IC_VEX_W_XD, /* 11853 */ IC_VEX_W_XD, /* 11854 */ IC_VEX_W_XD, /* 11855 */ IC_VEX_OPSIZE, /* 11856 */ IC_VEX_OPSIZE, /* 11857 */ IC_VEX_OPSIZE, /* 11858 */ IC_VEX_OPSIZE, /* 11859 */ IC_VEX_OPSIZE, /* 11860 */ IC_VEX_OPSIZE, /* 11861 */ IC_VEX_OPSIZE, /* 11862 */ IC_VEX_OPSIZE, /* 11863 */ IC_VEX_W_OPSIZE, /* 11864 */ IC_VEX_W_OPSIZE, /* 11865 */ IC_VEX_W_OPSIZE, /* 11866 */ IC_VEX_W_OPSIZE, /* 11867 */ IC_VEX_W_OPSIZE, /* 11868 */ IC_VEX_W_OPSIZE, /* 11869 */ IC_VEX_W_OPSIZE, /* 11870 */ IC_VEX_W_OPSIZE, /* 11871 */ IC_VEX, /* 11872 */ IC_VEX, /* 11873 */ IC_VEX_XS, /* 11874 */ IC_VEX_XS, /* 11875 */ IC_VEX_XD, /* 11876 */ IC_VEX_XD, /* 11877 */ IC_VEX_XD, /* 11878 */ IC_VEX_XD, /* 11879 */ IC_VEX_W, /* 11880 */ IC_VEX_W, /* 11881 */ IC_VEX_W_XS, /* 11882 */ IC_VEX_W_XS, /* 11883 */ IC_VEX_W_XD, /* 11884 */ IC_VEX_W_XD, /* 11885 */ IC_VEX_W_XD, /* 11886 */ IC_VEX_W_XD, /* 11887 */ IC_VEX_OPSIZE, /* 11888 */ IC_VEX_OPSIZE, /* 11889 */ IC_VEX_OPSIZE, /* 11890 */ IC_VEX_OPSIZE, /* 11891 */ IC_VEX_OPSIZE, /* 11892 */ IC_VEX_OPSIZE, /* 11893 */ IC_VEX_OPSIZE, /* 11894 */ IC_VEX_OPSIZE, /* 11895 */ IC_VEX_W_OPSIZE, /* 11896 */ IC_VEX_W_OPSIZE, /* 11897 */ IC_VEX_W_OPSIZE, /* 11898 */ IC_VEX_W_OPSIZE, /* 11899 */ IC_VEX_W_OPSIZE, /* 11900 */ IC_VEX_W_OPSIZE, /* 11901 */ IC_VEX_W_OPSIZE, /* 11902 */ IC_VEX_W_OPSIZE, /* 11903 */ IC_VEX_L, /* 11904 */ IC_VEX_L, /* 11905 */ IC_VEX_L_XS, /* 11906 */ IC_VEX_L_XS, /* 11907 */ IC_VEX_L_XD, /* 11908 */ IC_VEX_L_XD, /* 11909 */ IC_VEX_L_XD, /* 11910 */ IC_VEX_L_XD, /* 11911 */ IC_VEX_L_W, /* 11912 */ IC_VEX_L_W, /* 11913 */ IC_VEX_L_W_XS, /* 11914 */ IC_VEX_L_W_XS, /* 11915 */ IC_VEX_L_W_XD, /* 11916 */ IC_VEX_L_W_XD, /* 11917 */ IC_VEX_L_W_XD, /* 11918 */ IC_VEX_L_W_XD, /* 11919 */ IC_VEX_L_OPSIZE, /* 11920 */ IC_VEX_L_OPSIZE, /* 11921 */ IC_VEX_L_OPSIZE, /* 11922 */ IC_VEX_L_OPSIZE, /* 11923 */ IC_VEX_L_OPSIZE, /* 11924 */ IC_VEX_L_OPSIZE, /* 11925 */ IC_VEX_L_OPSIZE, /* 11926 */ IC_VEX_L_OPSIZE, /* 11927 */ IC_VEX_L_W_OPSIZE, /* 11928 */ IC_VEX_L_W_OPSIZE, /* 11929 */ IC_VEX_L_W_OPSIZE, /* 11930 */ IC_VEX_L_W_OPSIZE, /* 11931 */ IC_VEX_L_W_OPSIZE, /* 11932 */ IC_VEX_L_W_OPSIZE, /* 11933 */ IC_VEX_L_W_OPSIZE, /* 11934 */ IC_VEX_L_W_OPSIZE, /* 11935 */ IC_VEX_L, /* 11936 */ IC_VEX_L, /* 11937 */ IC_VEX_L_XS, /* 11938 */ IC_VEX_L_XS, /* 11939 */ IC_VEX_L_XD, /* 11940 */ IC_VEX_L_XD, /* 11941 */ IC_VEX_L_XD, /* 11942 */ IC_VEX_L_XD, /* 11943 */ IC_VEX_L_W, /* 11944 */ IC_VEX_L_W, /* 11945 */ IC_VEX_L_W_XS, /* 11946 */ IC_VEX_L_W_XS, /* 11947 */ IC_VEX_L_W_XD, /* 11948 */ IC_VEX_L_W_XD, /* 11949 */ IC_VEX_L_W_XD, /* 11950 */ IC_VEX_L_W_XD, /* 11951 */ IC_VEX_L_OPSIZE, /* 11952 */ IC_VEX_L_OPSIZE, /* 11953 */ IC_VEX_L_OPSIZE, /* 11954 */ IC_VEX_L_OPSIZE, /* 11955 */ IC_VEX_L_OPSIZE, /* 11956 */ IC_VEX_L_OPSIZE, /* 11957 */ IC_VEX_L_OPSIZE, /* 11958 */ IC_VEX_L_OPSIZE, /* 11959 */ IC_VEX_L_W_OPSIZE, /* 11960 */ IC_VEX_L_W_OPSIZE, /* 11961 */ IC_VEX_L_W_OPSIZE, /* 11962 */ IC_VEX_L_W_OPSIZE, /* 11963 */ IC_VEX_L_W_OPSIZE, /* 11964 */ IC_VEX_L_W_OPSIZE, /* 11965 */ IC_VEX_L_W_OPSIZE, /* 11966 */ IC_VEX_L_W_OPSIZE, /* 11967 */ IC_VEX_L, /* 11968 */ IC_VEX_L, /* 11969 */ IC_VEX_L_XS, /* 11970 */ IC_VEX_L_XS, /* 11971 */ IC_VEX_L_XD, /* 11972 */ IC_VEX_L_XD, /* 11973 */ IC_VEX_L_XD, /* 11974 */ IC_VEX_L_XD, /* 11975 */ IC_VEX_L_W, /* 11976 */ IC_VEX_L_W, /* 11977 */ IC_VEX_L_W_XS, /* 11978 */ IC_VEX_L_W_XS, /* 11979 */ IC_VEX_L_W_XD, /* 11980 */ IC_VEX_L_W_XD, /* 11981 */ IC_VEX_L_W_XD, /* 11982 */ IC_VEX_L_W_XD, /* 11983 */ IC_VEX_L_OPSIZE, /* 11984 */ IC_VEX_L_OPSIZE, /* 11985 */ IC_VEX_L_OPSIZE, /* 11986 */ IC_VEX_L_OPSIZE, /* 11987 */ IC_VEX_L_OPSIZE, /* 11988 */ IC_VEX_L_OPSIZE, /* 11989 */ IC_VEX_L_OPSIZE, /* 11990 */ IC_VEX_L_OPSIZE, /* 11991 */ IC_VEX_L_W_OPSIZE, /* 11992 */ IC_VEX_L_W_OPSIZE, /* 11993 */ IC_VEX_L_W_OPSIZE, /* 11994 */ IC_VEX_L_W_OPSIZE, /* 11995 */ IC_VEX_L_W_OPSIZE, /* 11996 */ IC_VEX_L_W_OPSIZE, /* 11997 */ IC_VEX_L_W_OPSIZE, /* 11998 */ IC_VEX_L_W_OPSIZE, /* 11999 */ IC_VEX_L, /* 12000 */ IC_VEX_L, /* 12001 */ IC_VEX_L_XS, /* 12002 */ IC_VEX_L_XS, /* 12003 */ IC_VEX_L_XD, /* 12004 */ IC_VEX_L_XD, /* 12005 */ IC_VEX_L_XD, /* 12006 */ IC_VEX_L_XD, /* 12007 */ IC_VEX_L_W, /* 12008 */ IC_VEX_L_W, /* 12009 */ IC_VEX_L_W_XS, /* 12010 */ IC_VEX_L_W_XS, /* 12011 */ IC_VEX_L_W_XD, /* 12012 */ IC_VEX_L_W_XD, /* 12013 */ IC_VEX_L_W_XD, /* 12014 */ IC_VEX_L_W_XD, /* 12015 */ IC_VEX_L_OPSIZE, /* 12016 */ IC_VEX_L_OPSIZE, /* 12017 */ IC_VEX_L_OPSIZE, /* 12018 */ IC_VEX_L_OPSIZE, /* 12019 */ IC_VEX_L_OPSIZE, /* 12020 */ IC_VEX_L_OPSIZE, /* 12021 */ IC_VEX_L_OPSIZE, /* 12022 */ IC_VEX_L_OPSIZE, /* 12023 */ IC_VEX_L_W_OPSIZE, /* 12024 */ IC_VEX_L_W_OPSIZE, /* 12025 */ IC_VEX_L_W_OPSIZE, /* 12026 */ IC_VEX_L_W_OPSIZE, /* 12027 */ IC_VEX_L_W_OPSIZE, /* 12028 */ IC_VEX_L_W_OPSIZE, /* 12029 */ IC_VEX_L_W_OPSIZE, /* 12030 */ IC_VEX_L_W_OPSIZE, /* 12031 */ IC_EVEX_L2_K_B, /* 12032 */ IC_EVEX_L2_K_B, /* 12033 */ IC_EVEX_L2_XS_K_B, /* 12034 */ IC_EVEX_L2_XS_K_B, /* 12035 */ IC_EVEX_L2_XD_K_B, /* 12036 */ IC_EVEX_L2_XD_K_B, /* 12037 */ IC_EVEX_L2_XD_K_B, /* 12038 */ IC_EVEX_L2_XD_K_B, /* 12039 */ IC_EVEX_L2_W_K_B, /* 12040 */ IC_EVEX_L2_W_K_B, /* 12041 */ IC_EVEX_L2_W_XS_K_B, /* 12042 */ IC_EVEX_L2_W_XS_K_B, /* 12043 */ IC_EVEX_L2_W_XD_K_B, /* 12044 */ IC_EVEX_L2_W_XD_K_B, /* 12045 */ IC_EVEX_L2_W_XD_K_B, /* 12046 */ IC_EVEX_L2_W_XD_K_B, /* 12047 */ IC_EVEX_L2_OPSIZE_K_B, /* 12048 */ IC_EVEX_L2_OPSIZE_K_B, /* 12049 */ IC_EVEX_L2_OPSIZE_K_B, /* 12050 */ IC_EVEX_L2_OPSIZE_K_B, /* 12051 */ IC_EVEX_L2_OPSIZE_K_B, /* 12052 */ IC_EVEX_L2_OPSIZE_K_B, /* 12053 */ IC_EVEX_L2_OPSIZE_K_B, /* 12054 */ IC_EVEX_L2_OPSIZE_K_B, /* 12055 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12056 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12057 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12058 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12059 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12060 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12061 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12062 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12063 */ IC_EVEX_L2_K_B, /* 12064 */ IC_EVEX_L2_K_B, /* 12065 */ IC_EVEX_L2_XS_K_B, /* 12066 */ IC_EVEX_L2_XS_K_B, /* 12067 */ IC_EVEX_L2_XD_K_B, /* 12068 */ IC_EVEX_L2_XD_K_B, /* 12069 */ IC_EVEX_L2_XD_K_B, /* 12070 */ IC_EVEX_L2_XD_K_B, /* 12071 */ IC_EVEX_L2_W_K_B, /* 12072 */ IC_EVEX_L2_W_K_B, /* 12073 */ IC_EVEX_L2_W_XS_K_B, /* 12074 */ IC_EVEX_L2_W_XS_K_B, /* 12075 */ IC_EVEX_L2_W_XD_K_B, /* 12076 */ IC_EVEX_L2_W_XD_K_B, /* 12077 */ IC_EVEX_L2_W_XD_K_B, /* 12078 */ IC_EVEX_L2_W_XD_K_B, /* 12079 */ IC_EVEX_L2_OPSIZE_K_B, /* 12080 */ IC_EVEX_L2_OPSIZE_K_B, /* 12081 */ IC_EVEX_L2_OPSIZE_K_B, /* 12082 */ IC_EVEX_L2_OPSIZE_K_B, /* 12083 */ IC_EVEX_L2_OPSIZE_K_B, /* 12084 */ IC_EVEX_L2_OPSIZE_K_B, /* 12085 */ IC_EVEX_L2_OPSIZE_K_B, /* 12086 */ IC_EVEX_L2_OPSIZE_K_B, /* 12087 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12088 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12089 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12090 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12091 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12092 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12093 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12094 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12095 */ IC_EVEX_L2_K_B, /* 12096 */ IC_EVEX_L2_K_B, /* 12097 */ IC_EVEX_L2_XS_K_B, /* 12098 */ IC_EVEX_L2_XS_K_B, /* 12099 */ IC_EVEX_L2_XD_K_B, /* 12100 */ IC_EVEX_L2_XD_K_B, /* 12101 */ IC_EVEX_L2_XD_K_B, /* 12102 */ IC_EVEX_L2_XD_K_B, /* 12103 */ IC_EVEX_L2_W_K_B, /* 12104 */ IC_EVEX_L2_W_K_B, /* 12105 */ IC_EVEX_L2_W_XS_K_B, /* 12106 */ IC_EVEX_L2_W_XS_K_B, /* 12107 */ IC_EVEX_L2_W_XD_K_B, /* 12108 */ IC_EVEX_L2_W_XD_K_B, /* 12109 */ IC_EVEX_L2_W_XD_K_B, /* 12110 */ IC_EVEX_L2_W_XD_K_B, /* 12111 */ IC_EVEX_L2_OPSIZE_K_B, /* 12112 */ IC_EVEX_L2_OPSIZE_K_B, /* 12113 */ IC_EVEX_L2_OPSIZE_K_B, /* 12114 */ IC_EVEX_L2_OPSIZE_K_B, /* 12115 */ IC_EVEX_L2_OPSIZE_K_B, /* 12116 */ IC_EVEX_L2_OPSIZE_K_B, /* 12117 */ IC_EVEX_L2_OPSIZE_K_B, /* 12118 */ IC_EVEX_L2_OPSIZE_K_B, /* 12119 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12120 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12121 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12122 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12123 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12124 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12125 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12126 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12127 */ IC_EVEX_L2_K_B, /* 12128 */ IC_EVEX_L2_K_B, /* 12129 */ IC_EVEX_L2_XS_K_B, /* 12130 */ IC_EVEX_L2_XS_K_B, /* 12131 */ IC_EVEX_L2_XD_K_B, /* 12132 */ IC_EVEX_L2_XD_K_B, /* 12133 */ IC_EVEX_L2_XD_K_B, /* 12134 */ IC_EVEX_L2_XD_K_B, /* 12135 */ IC_EVEX_L2_W_K_B, /* 12136 */ IC_EVEX_L2_W_K_B, /* 12137 */ IC_EVEX_L2_W_XS_K_B, /* 12138 */ IC_EVEX_L2_W_XS_K_B, /* 12139 */ IC_EVEX_L2_W_XD_K_B, /* 12140 */ IC_EVEX_L2_W_XD_K_B, /* 12141 */ IC_EVEX_L2_W_XD_K_B, /* 12142 */ IC_EVEX_L2_W_XD_K_B, /* 12143 */ IC_EVEX_L2_OPSIZE_K_B, /* 12144 */ IC_EVEX_L2_OPSIZE_K_B, /* 12145 */ IC_EVEX_L2_OPSIZE_K_B, /* 12146 */ IC_EVEX_L2_OPSIZE_K_B, /* 12147 */ IC_EVEX_L2_OPSIZE_K_B, /* 12148 */ IC_EVEX_L2_OPSIZE_K_B, /* 12149 */ IC_EVEX_L2_OPSIZE_K_B, /* 12150 */ IC_EVEX_L2_OPSIZE_K_B, /* 12151 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12152 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12153 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12154 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12155 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12156 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12157 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12158 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12159 */ IC_EVEX_L2_K_B, /* 12160 */ IC_EVEX_L2_K_B, /* 12161 */ IC_EVEX_L2_XS_K_B, /* 12162 */ IC_EVEX_L2_XS_K_B, /* 12163 */ IC_EVEX_L2_XD_K_B, /* 12164 */ IC_EVEX_L2_XD_K_B, /* 12165 */ IC_EVEX_L2_XD_K_B, /* 12166 */ IC_EVEX_L2_XD_K_B, /* 12167 */ IC_EVEX_L2_W_K_B, /* 12168 */ IC_EVEX_L2_W_K_B, /* 12169 */ IC_EVEX_L2_W_XS_K_B, /* 12170 */ IC_EVEX_L2_W_XS_K_B, /* 12171 */ IC_EVEX_L2_W_XD_K_B, /* 12172 */ IC_EVEX_L2_W_XD_K_B, /* 12173 */ IC_EVEX_L2_W_XD_K_B, /* 12174 */ IC_EVEX_L2_W_XD_K_B, /* 12175 */ IC_EVEX_L2_OPSIZE_K_B, /* 12176 */ IC_EVEX_L2_OPSIZE_K_B, /* 12177 */ IC_EVEX_L2_OPSIZE_K_B, /* 12178 */ IC_EVEX_L2_OPSIZE_K_B, /* 12179 */ IC_EVEX_L2_OPSIZE_K_B, /* 12180 */ IC_EVEX_L2_OPSIZE_K_B, /* 12181 */ IC_EVEX_L2_OPSIZE_K_B, /* 12182 */ IC_EVEX_L2_OPSIZE_K_B, /* 12183 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12184 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12185 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12186 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12187 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12188 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12189 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12190 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12191 */ IC_EVEX_L2_K_B, /* 12192 */ IC_EVEX_L2_K_B, /* 12193 */ IC_EVEX_L2_XS_K_B, /* 12194 */ IC_EVEX_L2_XS_K_B, /* 12195 */ IC_EVEX_L2_XD_K_B, /* 12196 */ IC_EVEX_L2_XD_K_B, /* 12197 */ IC_EVEX_L2_XD_K_B, /* 12198 */ IC_EVEX_L2_XD_K_B, /* 12199 */ IC_EVEX_L2_W_K_B, /* 12200 */ IC_EVEX_L2_W_K_B, /* 12201 */ IC_EVEX_L2_W_XS_K_B, /* 12202 */ IC_EVEX_L2_W_XS_K_B, /* 12203 */ IC_EVEX_L2_W_XD_K_B, /* 12204 */ IC_EVEX_L2_W_XD_K_B, /* 12205 */ IC_EVEX_L2_W_XD_K_B, /* 12206 */ IC_EVEX_L2_W_XD_K_B, /* 12207 */ IC_EVEX_L2_OPSIZE_K_B, /* 12208 */ IC_EVEX_L2_OPSIZE_K_B, /* 12209 */ IC_EVEX_L2_OPSIZE_K_B, /* 12210 */ IC_EVEX_L2_OPSIZE_K_B, /* 12211 */ IC_EVEX_L2_OPSIZE_K_B, /* 12212 */ IC_EVEX_L2_OPSIZE_K_B, /* 12213 */ IC_EVEX_L2_OPSIZE_K_B, /* 12214 */ IC_EVEX_L2_OPSIZE_K_B, /* 12215 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12216 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12217 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12218 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12219 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12220 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12221 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12222 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12223 */ IC_EVEX_L2_K_B, /* 12224 */ IC_EVEX_L2_K_B, /* 12225 */ IC_EVEX_L2_XS_K_B, /* 12226 */ IC_EVEX_L2_XS_K_B, /* 12227 */ IC_EVEX_L2_XD_K_B, /* 12228 */ IC_EVEX_L2_XD_K_B, /* 12229 */ IC_EVEX_L2_XD_K_B, /* 12230 */ IC_EVEX_L2_XD_K_B, /* 12231 */ IC_EVEX_L2_W_K_B, /* 12232 */ IC_EVEX_L2_W_K_B, /* 12233 */ IC_EVEX_L2_W_XS_K_B, /* 12234 */ IC_EVEX_L2_W_XS_K_B, /* 12235 */ IC_EVEX_L2_W_XD_K_B, /* 12236 */ IC_EVEX_L2_W_XD_K_B, /* 12237 */ IC_EVEX_L2_W_XD_K_B, /* 12238 */ IC_EVEX_L2_W_XD_K_B, /* 12239 */ IC_EVEX_L2_OPSIZE_K_B, /* 12240 */ IC_EVEX_L2_OPSIZE_K_B, /* 12241 */ IC_EVEX_L2_OPSIZE_K_B, /* 12242 */ IC_EVEX_L2_OPSIZE_K_B, /* 12243 */ IC_EVEX_L2_OPSIZE_K_B, /* 12244 */ IC_EVEX_L2_OPSIZE_K_B, /* 12245 */ IC_EVEX_L2_OPSIZE_K_B, /* 12246 */ IC_EVEX_L2_OPSIZE_K_B, /* 12247 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12248 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12249 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12250 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12251 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12252 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12253 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12254 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12255 */ IC_EVEX_L2_K_B, /* 12256 */ IC_EVEX_L2_K_B, /* 12257 */ IC_EVEX_L2_XS_K_B, /* 12258 */ IC_EVEX_L2_XS_K_B, /* 12259 */ IC_EVEX_L2_XD_K_B, /* 12260 */ IC_EVEX_L2_XD_K_B, /* 12261 */ IC_EVEX_L2_XD_K_B, /* 12262 */ IC_EVEX_L2_XD_K_B, /* 12263 */ IC_EVEX_L2_W_K_B, /* 12264 */ IC_EVEX_L2_W_K_B, /* 12265 */ IC_EVEX_L2_W_XS_K_B, /* 12266 */ IC_EVEX_L2_W_XS_K_B, /* 12267 */ IC_EVEX_L2_W_XD_K_B, /* 12268 */ IC_EVEX_L2_W_XD_K_B, /* 12269 */ IC_EVEX_L2_W_XD_K_B, /* 12270 */ IC_EVEX_L2_W_XD_K_B, /* 12271 */ IC_EVEX_L2_OPSIZE_K_B, /* 12272 */ IC_EVEX_L2_OPSIZE_K_B, /* 12273 */ IC_EVEX_L2_OPSIZE_K_B, /* 12274 */ IC_EVEX_L2_OPSIZE_K_B, /* 12275 */ IC_EVEX_L2_OPSIZE_K_B, /* 12276 */ IC_EVEX_L2_OPSIZE_K_B, /* 12277 */ IC_EVEX_L2_OPSIZE_K_B, /* 12278 */ IC_EVEX_L2_OPSIZE_K_B, /* 12279 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12280 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12281 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12282 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12283 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12284 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12285 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12286 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12287 */ IC, /* 12288 */ IC_64BIT, /* 12289 */ IC_XS, /* 12290 */ IC_64BIT_XS, /* 12291 */ IC_XD, /* 12292 */ IC_64BIT_XD, /* 12293 */ IC_XS, /* 12294 */ IC_64BIT_XS, /* 12295 */ IC, /* 12296 */ IC_64BIT_REXW, /* 12297 */ IC_XS, /* 12298 */ IC_64BIT_REXW_XS, /* 12299 */ IC_XD, /* 12300 */ IC_64BIT_REXW_XD, /* 12301 */ IC_XS, /* 12302 */ IC_64BIT_REXW_XS, /* 12303 */ IC_OPSIZE, /* 12304 */ IC_64BIT_OPSIZE, /* 12305 */ IC_XS_OPSIZE, /* 12306 */ IC_64BIT_XS_OPSIZE, /* 12307 */ IC_XD_OPSIZE, /* 12308 */ IC_64BIT_XD_OPSIZE, /* 12309 */ IC_XS_OPSIZE, /* 12310 */ IC_64BIT_XD_OPSIZE, /* 12311 */ IC_OPSIZE, /* 12312 */ IC_64BIT_REXW_OPSIZE, /* 12313 */ IC_XS_OPSIZE, /* 12314 */ IC_64BIT_REXW_XS, /* 12315 */ IC_XD_OPSIZE, /* 12316 */ IC_64BIT_REXW_XD, /* 12317 */ IC_XS_OPSIZE, /* 12318 */ IC_64BIT_REXW_XS, /* 12319 */ IC_ADSIZE, /* 12320 */ IC_64BIT_ADSIZE, /* 12321 */ IC_XS, /* 12322 */ IC_64BIT_XS, /* 12323 */ IC_XD, /* 12324 */ IC_64BIT_XD, /* 12325 */ IC_XS, /* 12326 */ IC_64BIT_XS, /* 12327 */ IC_ADSIZE, /* 12328 */ IC_64BIT_REXW_ADSIZE, /* 12329 */ IC_XS, /* 12330 */ IC_64BIT_REXW_XS, /* 12331 */ IC_XD, /* 12332 */ IC_64BIT_REXW_XD, /* 12333 */ IC_XS, /* 12334 */ IC_64BIT_REXW_XS, /* 12335 */ IC_OPSIZE_ADSIZE, /* 12336 */ IC_64BIT_OPSIZE_ADSIZE, /* 12337 */ IC_XS_OPSIZE, /* 12338 */ IC_64BIT_XS_OPSIZE, /* 12339 */ IC_XD_OPSIZE, /* 12340 */ IC_64BIT_XD_OPSIZE, /* 12341 */ IC_XS_OPSIZE, /* 12342 */ IC_64BIT_XD_OPSIZE, /* 12343 */ IC_OPSIZE_ADSIZE, /* 12344 */ IC_64BIT_REXW_OPSIZE, /* 12345 */ IC_XS_OPSIZE, /* 12346 */ IC_64BIT_REXW_XS, /* 12347 */ IC_XD_OPSIZE, /* 12348 */ IC_64BIT_REXW_XD, /* 12349 */ IC_XS_OPSIZE, /* 12350 */ IC_64BIT_REXW_XS, /* 12351 */ IC_VEX, /* 12352 */ IC_VEX, /* 12353 */ IC_VEX_XS, /* 12354 */ IC_VEX_XS, /* 12355 */ IC_VEX_XD, /* 12356 */ IC_VEX_XD, /* 12357 */ IC_VEX_XD, /* 12358 */ IC_VEX_XD, /* 12359 */ IC_VEX_W, /* 12360 */ IC_VEX_W, /* 12361 */ IC_VEX_W_XS, /* 12362 */ IC_VEX_W_XS, /* 12363 */ IC_VEX_W_XD, /* 12364 */ IC_VEX_W_XD, /* 12365 */ IC_VEX_W_XD, /* 12366 */ IC_VEX_W_XD, /* 12367 */ IC_VEX_OPSIZE, /* 12368 */ IC_VEX_OPSIZE, /* 12369 */ IC_VEX_OPSIZE, /* 12370 */ IC_VEX_OPSIZE, /* 12371 */ IC_VEX_OPSIZE, /* 12372 */ IC_VEX_OPSIZE, /* 12373 */ IC_VEX_OPSIZE, /* 12374 */ IC_VEX_OPSIZE, /* 12375 */ IC_VEX_W_OPSIZE, /* 12376 */ IC_VEX_W_OPSIZE, /* 12377 */ IC_VEX_W_OPSIZE, /* 12378 */ IC_VEX_W_OPSIZE, /* 12379 */ IC_VEX_W_OPSIZE, /* 12380 */ IC_VEX_W_OPSIZE, /* 12381 */ IC_VEX_W_OPSIZE, /* 12382 */ IC_VEX_W_OPSIZE, /* 12383 */ IC_VEX, /* 12384 */ IC_VEX, /* 12385 */ IC_VEX_XS, /* 12386 */ IC_VEX_XS, /* 12387 */ IC_VEX_XD, /* 12388 */ IC_VEX_XD, /* 12389 */ IC_VEX_XD, /* 12390 */ IC_VEX_XD, /* 12391 */ IC_VEX_W, /* 12392 */ IC_VEX_W, /* 12393 */ IC_VEX_W_XS, /* 12394 */ IC_VEX_W_XS, /* 12395 */ IC_VEX_W_XD, /* 12396 */ IC_VEX_W_XD, /* 12397 */ IC_VEX_W_XD, /* 12398 */ IC_VEX_W_XD, /* 12399 */ IC_VEX_OPSIZE, /* 12400 */ IC_VEX_OPSIZE, /* 12401 */ IC_VEX_OPSIZE, /* 12402 */ IC_VEX_OPSIZE, /* 12403 */ IC_VEX_OPSIZE, /* 12404 */ IC_VEX_OPSIZE, /* 12405 */ IC_VEX_OPSIZE, /* 12406 */ IC_VEX_OPSIZE, /* 12407 */ IC_VEX_W_OPSIZE, /* 12408 */ IC_VEX_W_OPSIZE, /* 12409 */ IC_VEX_W_OPSIZE, /* 12410 */ IC_VEX_W_OPSIZE, /* 12411 */ IC_VEX_W_OPSIZE, /* 12412 */ IC_VEX_W_OPSIZE, /* 12413 */ IC_VEX_W_OPSIZE, /* 12414 */ IC_VEX_W_OPSIZE, /* 12415 */ IC_VEX_L, /* 12416 */ IC_VEX_L, /* 12417 */ IC_VEX_L_XS, /* 12418 */ IC_VEX_L_XS, /* 12419 */ IC_VEX_L_XD, /* 12420 */ IC_VEX_L_XD, /* 12421 */ IC_VEX_L_XD, /* 12422 */ IC_VEX_L_XD, /* 12423 */ IC_VEX_L_W, /* 12424 */ IC_VEX_L_W, /* 12425 */ IC_VEX_L_W_XS, /* 12426 */ IC_VEX_L_W_XS, /* 12427 */ IC_VEX_L_W_XD, /* 12428 */ IC_VEX_L_W_XD, /* 12429 */ IC_VEX_L_W_XD, /* 12430 */ IC_VEX_L_W_XD, /* 12431 */ IC_VEX_L_OPSIZE, /* 12432 */ IC_VEX_L_OPSIZE, /* 12433 */ IC_VEX_L_OPSIZE, /* 12434 */ IC_VEX_L_OPSIZE, /* 12435 */ IC_VEX_L_OPSIZE, /* 12436 */ IC_VEX_L_OPSIZE, /* 12437 */ IC_VEX_L_OPSIZE, /* 12438 */ IC_VEX_L_OPSIZE, /* 12439 */ IC_VEX_L_W_OPSIZE, /* 12440 */ IC_VEX_L_W_OPSIZE, /* 12441 */ IC_VEX_L_W_OPSIZE, /* 12442 */ IC_VEX_L_W_OPSIZE, /* 12443 */ IC_VEX_L_W_OPSIZE, /* 12444 */ IC_VEX_L_W_OPSIZE, /* 12445 */ IC_VEX_L_W_OPSIZE, /* 12446 */ IC_VEX_L_W_OPSIZE, /* 12447 */ IC_VEX_L, /* 12448 */ IC_VEX_L, /* 12449 */ IC_VEX_L_XS, /* 12450 */ IC_VEX_L_XS, /* 12451 */ IC_VEX_L_XD, /* 12452 */ IC_VEX_L_XD, /* 12453 */ IC_VEX_L_XD, /* 12454 */ IC_VEX_L_XD, /* 12455 */ IC_VEX_L_W, /* 12456 */ IC_VEX_L_W, /* 12457 */ IC_VEX_L_W_XS, /* 12458 */ IC_VEX_L_W_XS, /* 12459 */ IC_VEX_L_W_XD, /* 12460 */ IC_VEX_L_W_XD, /* 12461 */ IC_VEX_L_W_XD, /* 12462 */ IC_VEX_L_W_XD, /* 12463 */ IC_VEX_L_OPSIZE, /* 12464 */ IC_VEX_L_OPSIZE, /* 12465 */ IC_VEX_L_OPSIZE, /* 12466 */ IC_VEX_L_OPSIZE, /* 12467 */ IC_VEX_L_OPSIZE, /* 12468 */ IC_VEX_L_OPSIZE, /* 12469 */ IC_VEX_L_OPSIZE, /* 12470 */ IC_VEX_L_OPSIZE, /* 12471 */ IC_VEX_L_W_OPSIZE, /* 12472 */ IC_VEX_L_W_OPSIZE, /* 12473 */ IC_VEX_L_W_OPSIZE, /* 12474 */ IC_VEX_L_W_OPSIZE, /* 12475 */ IC_VEX_L_W_OPSIZE, /* 12476 */ IC_VEX_L_W_OPSIZE, /* 12477 */ IC_VEX_L_W_OPSIZE, /* 12478 */ IC_VEX_L_W_OPSIZE, /* 12479 */ IC_VEX_L, /* 12480 */ IC_VEX_L, /* 12481 */ IC_VEX_L_XS, /* 12482 */ IC_VEX_L_XS, /* 12483 */ IC_VEX_L_XD, /* 12484 */ IC_VEX_L_XD, /* 12485 */ IC_VEX_L_XD, /* 12486 */ IC_VEX_L_XD, /* 12487 */ IC_VEX_L_W, /* 12488 */ IC_VEX_L_W, /* 12489 */ IC_VEX_L_W_XS, /* 12490 */ IC_VEX_L_W_XS, /* 12491 */ IC_VEX_L_W_XD, /* 12492 */ IC_VEX_L_W_XD, /* 12493 */ IC_VEX_L_W_XD, /* 12494 */ IC_VEX_L_W_XD, /* 12495 */ IC_VEX_L_OPSIZE, /* 12496 */ IC_VEX_L_OPSIZE, /* 12497 */ IC_VEX_L_OPSIZE, /* 12498 */ IC_VEX_L_OPSIZE, /* 12499 */ IC_VEX_L_OPSIZE, /* 12500 */ IC_VEX_L_OPSIZE, /* 12501 */ IC_VEX_L_OPSIZE, /* 12502 */ IC_VEX_L_OPSIZE, /* 12503 */ IC_VEX_L_W_OPSIZE, /* 12504 */ IC_VEX_L_W_OPSIZE, /* 12505 */ IC_VEX_L_W_OPSIZE, /* 12506 */ IC_VEX_L_W_OPSIZE, /* 12507 */ IC_VEX_L_W_OPSIZE, /* 12508 */ IC_VEX_L_W_OPSIZE, /* 12509 */ IC_VEX_L_W_OPSIZE, /* 12510 */ IC_VEX_L_W_OPSIZE, /* 12511 */ IC_VEX_L, /* 12512 */ IC_VEX_L, /* 12513 */ IC_VEX_L_XS, /* 12514 */ IC_VEX_L_XS, /* 12515 */ IC_VEX_L_XD, /* 12516 */ IC_VEX_L_XD, /* 12517 */ IC_VEX_L_XD, /* 12518 */ IC_VEX_L_XD, /* 12519 */ IC_VEX_L_W, /* 12520 */ IC_VEX_L_W, /* 12521 */ IC_VEX_L_W_XS, /* 12522 */ IC_VEX_L_W_XS, /* 12523 */ IC_VEX_L_W_XD, /* 12524 */ IC_VEX_L_W_XD, /* 12525 */ IC_VEX_L_W_XD, /* 12526 */ IC_VEX_L_W_XD, /* 12527 */ IC_VEX_L_OPSIZE, /* 12528 */ IC_VEX_L_OPSIZE, /* 12529 */ IC_VEX_L_OPSIZE, /* 12530 */ IC_VEX_L_OPSIZE, /* 12531 */ IC_VEX_L_OPSIZE, /* 12532 */ IC_VEX_L_OPSIZE, /* 12533 */ IC_VEX_L_OPSIZE, /* 12534 */ IC_VEX_L_OPSIZE, /* 12535 */ IC_VEX_L_W_OPSIZE, /* 12536 */ IC_VEX_L_W_OPSIZE, /* 12537 */ IC_VEX_L_W_OPSIZE, /* 12538 */ IC_VEX_L_W_OPSIZE, /* 12539 */ IC_VEX_L_W_OPSIZE, /* 12540 */ IC_VEX_L_W_OPSIZE, /* 12541 */ IC_VEX_L_W_OPSIZE, /* 12542 */ IC_VEX_L_W_OPSIZE, /* 12543 */ IC_EVEX_KZ_B, /* 12544 */ IC_EVEX_KZ_B, /* 12545 */ IC_EVEX_XS_KZ_B, /* 12546 */ IC_EVEX_XS_KZ_B, /* 12547 */ IC_EVEX_XD_KZ_B, /* 12548 */ IC_EVEX_XD_KZ_B, /* 12549 */ IC_EVEX_XD_KZ_B, /* 12550 */ IC_EVEX_XD_KZ_B, /* 12551 */ IC_EVEX_W_KZ_B, /* 12552 */ IC_EVEX_W_KZ_B, /* 12553 */ IC_EVEX_W_XS_KZ_B, /* 12554 */ IC_EVEX_W_XS_KZ_B, /* 12555 */ IC_EVEX_W_XD_KZ_B, /* 12556 */ IC_EVEX_W_XD_KZ_B, /* 12557 */ IC_EVEX_W_XD_KZ_B, /* 12558 */ IC_EVEX_W_XD_KZ_B, /* 12559 */ IC_EVEX_OPSIZE_KZ_B, /* 12560 */ IC_EVEX_OPSIZE_KZ_B, /* 12561 */ IC_EVEX_OPSIZE_KZ_B, /* 12562 */ IC_EVEX_OPSIZE_KZ_B, /* 12563 */ IC_EVEX_OPSIZE_KZ_B, /* 12564 */ IC_EVEX_OPSIZE_KZ_B, /* 12565 */ IC_EVEX_OPSIZE_KZ_B, /* 12566 */ IC_EVEX_OPSIZE_KZ_B, /* 12567 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12568 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12569 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12570 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12571 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12572 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12573 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12574 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12575 */ IC_EVEX_KZ_B, /* 12576 */ IC_EVEX_KZ_B, /* 12577 */ IC_EVEX_XS_KZ_B, /* 12578 */ IC_EVEX_XS_KZ_B, /* 12579 */ IC_EVEX_XD_KZ_B, /* 12580 */ IC_EVEX_XD_KZ_B, /* 12581 */ IC_EVEX_XD_KZ_B, /* 12582 */ IC_EVEX_XD_KZ_B, /* 12583 */ IC_EVEX_W_KZ_B, /* 12584 */ IC_EVEX_W_KZ_B, /* 12585 */ IC_EVEX_W_XS_KZ_B, /* 12586 */ IC_EVEX_W_XS_KZ_B, /* 12587 */ IC_EVEX_W_XD_KZ_B, /* 12588 */ IC_EVEX_W_XD_KZ_B, /* 12589 */ IC_EVEX_W_XD_KZ_B, /* 12590 */ IC_EVEX_W_XD_KZ_B, /* 12591 */ IC_EVEX_OPSIZE_KZ_B, /* 12592 */ IC_EVEX_OPSIZE_KZ_B, /* 12593 */ IC_EVEX_OPSIZE_KZ_B, /* 12594 */ IC_EVEX_OPSIZE_KZ_B, /* 12595 */ IC_EVEX_OPSIZE_KZ_B, /* 12596 */ IC_EVEX_OPSIZE_KZ_B, /* 12597 */ IC_EVEX_OPSIZE_KZ_B, /* 12598 */ IC_EVEX_OPSIZE_KZ_B, /* 12599 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12600 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12601 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12602 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12603 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12604 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12605 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12606 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12607 */ IC_EVEX_KZ_B, /* 12608 */ IC_EVEX_KZ_B, /* 12609 */ IC_EVEX_XS_KZ_B, /* 12610 */ IC_EVEX_XS_KZ_B, /* 12611 */ IC_EVEX_XD_KZ_B, /* 12612 */ IC_EVEX_XD_KZ_B, /* 12613 */ IC_EVEX_XD_KZ_B, /* 12614 */ IC_EVEX_XD_KZ_B, /* 12615 */ IC_EVEX_W_KZ_B, /* 12616 */ IC_EVEX_W_KZ_B, /* 12617 */ IC_EVEX_W_XS_KZ_B, /* 12618 */ IC_EVEX_W_XS_KZ_B, /* 12619 */ IC_EVEX_W_XD_KZ_B, /* 12620 */ IC_EVEX_W_XD_KZ_B, /* 12621 */ IC_EVEX_W_XD_KZ_B, /* 12622 */ IC_EVEX_W_XD_KZ_B, /* 12623 */ IC_EVEX_OPSIZE_KZ_B, /* 12624 */ IC_EVEX_OPSIZE_KZ_B, /* 12625 */ IC_EVEX_OPSIZE_KZ_B, /* 12626 */ IC_EVEX_OPSIZE_KZ_B, /* 12627 */ IC_EVEX_OPSIZE_KZ_B, /* 12628 */ IC_EVEX_OPSIZE_KZ_B, /* 12629 */ IC_EVEX_OPSIZE_KZ_B, /* 12630 */ IC_EVEX_OPSIZE_KZ_B, /* 12631 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12632 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12633 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12634 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12635 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12636 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12637 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12638 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12639 */ IC_EVEX_KZ_B, /* 12640 */ IC_EVEX_KZ_B, /* 12641 */ IC_EVEX_XS_KZ_B, /* 12642 */ IC_EVEX_XS_KZ_B, /* 12643 */ IC_EVEX_XD_KZ_B, /* 12644 */ IC_EVEX_XD_KZ_B, /* 12645 */ IC_EVEX_XD_KZ_B, /* 12646 */ IC_EVEX_XD_KZ_B, /* 12647 */ IC_EVEX_W_KZ_B, /* 12648 */ IC_EVEX_W_KZ_B, /* 12649 */ IC_EVEX_W_XS_KZ_B, /* 12650 */ IC_EVEX_W_XS_KZ_B, /* 12651 */ IC_EVEX_W_XD_KZ_B, /* 12652 */ IC_EVEX_W_XD_KZ_B, /* 12653 */ IC_EVEX_W_XD_KZ_B, /* 12654 */ IC_EVEX_W_XD_KZ_B, /* 12655 */ IC_EVEX_OPSIZE_KZ_B, /* 12656 */ IC_EVEX_OPSIZE_KZ_B, /* 12657 */ IC_EVEX_OPSIZE_KZ_B, /* 12658 */ IC_EVEX_OPSIZE_KZ_B, /* 12659 */ IC_EVEX_OPSIZE_KZ_B, /* 12660 */ IC_EVEX_OPSIZE_KZ_B, /* 12661 */ IC_EVEX_OPSIZE_KZ_B, /* 12662 */ IC_EVEX_OPSIZE_KZ_B, /* 12663 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12664 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12665 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12666 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12667 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12668 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12669 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12670 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12671 */ IC_EVEX_KZ_B, /* 12672 */ IC_EVEX_KZ_B, /* 12673 */ IC_EVEX_XS_KZ_B, /* 12674 */ IC_EVEX_XS_KZ_B, /* 12675 */ IC_EVEX_XD_KZ_B, /* 12676 */ IC_EVEX_XD_KZ_B, /* 12677 */ IC_EVEX_XD_KZ_B, /* 12678 */ IC_EVEX_XD_KZ_B, /* 12679 */ IC_EVEX_W_KZ_B, /* 12680 */ IC_EVEX_W_KZ_B, /* 12681 */ IC_EVEX_W_XS_KZ_B, /* 12682 */ IC_EVEX_W_XS_KZ_B, /* 12683 */ IC_EVEX_W_XD_KZ_B, /* 12684 */ IC_EVEX_W_XD_KZ_B, /* 12685 */ IC_EVEX_W_XD_KZ_B, /* 12686 */ IC_EVEX_W_XD_KZ_B, /* 12687 */ IC_EVEX_OPSIZE_KZ_B, /* 12688 */ IC_EVEX_OPSIZE_KZ_B, /* 12689 */ IC_EVEX_OPSIZE_KZ_B, /* 12690 */ IC_EVEX_OPSIZE_KZ_B, /* 12691 */ IC_EVEX_OPSIZE_KZ_B, /* 12692 */ IC_EVEX_OPSIZE_KZ_B, /* 12693 */ IC_EVEX_OPSIZE_KZ_B, /* 12694 */ IC_EVEX_OPSIZE_KZ_B, /* 12695 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12696 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12697 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12698 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12699 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12700 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12701 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12702 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12703 */ IC_EVEX_KZ_B, /* 12704 */ IC_EVEX_KZ_B, /* 12705 */ IC_EVEX_XS_KZ_B, /* 12706 */ IC_EVEX_XS_KZ_B, /* 12707 */ IC_EVEX_XD_KZ_B, /* 12708 */ IC_EVEX_XD_KZ_B, /* 12709 */ IC_EVEX_XD_KZ_B, /* 12710 */ IC_EVEX_XD_KZ_B, /* 12711 */ IC_EVEX_W_KZ_B, /* 12712 */ IC_EVEX_W_KZ_B, /* 12713 */ IC_EVEX_W_XS_KZ_B, /* 12714 */ IC_EVEX_W_XS_KZ_B, /* 12715 */ IC_EVEX_W_XD_KZ_B, /* 12716 */ IC_EVEX_W_XD_KZ_B, /* 12717 */ IC_EVEX_W_XD_KZ_B, /* 12718 */ IC_EVEX_W_XD_KZ_B, /* 12719 */ IC_EVEX_OPSIZE_KZ_B, /* 12720 */ IC_EVEX_OPSIZE_KZ_B, /* 12721 */ IC_EVEX_OPSIZE_KZ_B, /* 12722 */ IC_EVEX_OPSIZE_KZ_B, /* 12723 */ IC_EVEX_OPSIZE_KZ_B, /* 12724 */ IC_EVEX_OPSIZE_KZ_B, /* 12725 */ IC_EVEX_OPSIZE_KZ_B, /* 12726 */ IC_EVEX_OPSIZE_KZ_B, /* 12727 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12728 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12729 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12730 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12731 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12732 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12733 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12734 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12735 */ IC_EVEX_KZ_B, /* 12736 */ IC_EVEX_KZ_B, /* 12737 */ IC_EVEX_XS_KZ_B, /* 12738 */ IC_EVEX_XS_KZ_B, /* 12739 */ IC_EVEX_XD_KZ_B, /* 12740 */ IC_EVEX_XD_KZ_B, /* 12741 */ IC_EVEX_XD_KZ_B, /* 12742 */ IC_EVEX_XD_KZ_B, /* 12743 */ IC_EVEX_W_KZ_B, /* 12744 */ IC_EVEX_W_KZ_B, /* 12745 */ IC_EVEX_W_XS_KZ_B, /* 12746 */ IC_EVEX_W_XS_KZ_B, /* 12747 */ IC_EVEX_W_XD_KZ_B, /* 12748 */ IC_EVEX_W_XD_KZ_B, /* 12749 */ IC_EVEX_W_XD_KZ_B, /* 12750 */ IC_EVEX_W_XD_KZ_B, /* 12751 */ IC_EVEX_OPSIZE_KZ_B, /* 12752 */ IC_EVEX_OPSIZE_KZ_B, /* 12753 */ IC_EVEX_OPSIZE_KZ_B, /* 12754 */ IC_EVEX_OPSIZE_KZ_B, /* 12755 */ IC_EVEX_OPSIZE_KZ_B, /* 12756 */ IC_EVEX_OPSIZE_KZ_B, /* 12757 */ IC_EVEX_OPSIZE_KZ_B, /* 12758 */ IC_EVEX_OPSIZE_KZ_B, /* 12759 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12760 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12761 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12762 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12763 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12764 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12765 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12766 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12767 */ IC_EVEX_KZ_B, /* 12768 */ IC_EVEX_KZ_B, /* 12769 */ IC_EVEX_XS_KZ_B, /* 12770 */ IC_EVEX_XS_KZ_B, /* 12771 */ IC_EVEX_XD_KZ_B, /* 12772 */ IC_EVEX_XD_KZ_B, /* 12773 */ IC_EVEX_XD_KZ_B, /* 12774 */ IC_EVEX_XD_KZ_B, /* 12775 */ IC_EVEX_W_KZ_B, /* 12776 */ IC_EVEX_W_KZ_B, /* 12777 */ IC_EVEX_W_XS_KZ_B, /* 12778 */ IC_EVEX_W_XS_KZ_B, /* 12779 */ IC_EVEX_W_XD_KZ_B, /* 12780 */ IC_EVEX_W_XD_KZ_B, /* 12781 */ IC_EVEX_W_XD_KZ_B, /* 12782 */ IC_EVEX_W_XD_KZ_B, /* 12783 */ IC_EVEX_OPSIZE_KZ_B, /* 12784 */ IC_EVEX_OPSIZE_KZ_B, /* 12785 */ IC_EVEX_OPSIZE_KZ_B, /* 12786 */ IC_EVEX_OPSIZE_KZ_B, /* 12787 */ IC_EVEX_OPSIZE_KZ_B, /* 12788 */ IC_EVEX_OPSIZE_KZ_B, /* 12789 */ IC_EVEX_OPSIZE_KZ_B, /* 12790 */ IC_EVEX_OPSIZE_KZ_B, /* 12791 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12792 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12793 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12794 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12795 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12796 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12797 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12798 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12799 */ IC, /* 12800 */ IC_64BIT, /* 12801 */ IC_XS, /* 12802 */ IC_64BIT_XS, /* 12803 */ IC_XD, /* 12804 */ IC_64BIT_XD, /* 12805 */ IC_XS, /* 12806 */ IC_64BIT_XS, /* 12807 */ IC, /* 12808 */ IC_64BIT_REXW, /* 12809 */ IC_XS, /* 12810 */ IC_64BIT_REXW_XS, /* 12811 */ IC_XD, /* 12812 */ IC_64BIT_REXW_XD, /* 12813 */ IC_XS, /* 12814 */ IC_64BIT_REXW_XS, /* 12815 */ IC_OPSIZE, /* 12816 */ IC_64BIT_OPSIZE, /* 12817 */ IC_XS_OPSIZE, /* 12818 */ IC_64BIT_XS_OPSIZE, /* 12819 */ IC_XD_OPSIZE, /* 12820 */ IC_64BIT_XD_OPSIZE, /* 12821 */ IC_XS_OPSIZE, /* 12822 */ IC_64BIT_XD_OPSIZE, /* 12823 */ IC_OPSIZE, /* 12824 */ IC_64BIT_REXW_OPSIZE, /* 12825 */ IC_XS_OPSIZE, /* 12826 */ IC_64BIT_REXW_XS, /* 12827 */ IC_XD_OPSIZE, /* 12828 */ IC_64BIT_REXW_XD, /* 12829 */ IC_XS_OPSIZE, /* 12830 */ IC_64BIT_REXW_XS, /* 12831 */ IC_ADSIZE, /* 12832 */ IC_64BIT_ADSIZE, /* 12833 */ IC_XS, /* 12834 */ IC_64BIT_XS, /* 12835 */ IC_XD, /* 12836 */ IC_64BIT_XD, /* 12837 */ IC_XS, /* 12838 */ IC_64BIT_XS, /* 12839 */ IC_ADSIZE, /* 12840 */ IC_64BIT_REXW_ADSIZE, /* 12841 */ IC_XS, /* 12842 */ IC_64BIT_REXW_XS, /* 12843 */ IC_XD, /* 12844 */ IC_64BIT_REXW_XD, /* 12845 */ IC_XS, /* 12846 */ IC_64BIT_REXW_XS, /* 12847 */ IC_OPSIZE_ADSIZE, /* 12848 */ IC_64BIT_OPSIZE_ADSIZE, /* 12849 */ IC_XS_OPSIZE, /* 12850 */ IC_64BIT_XS_OPSIZE, /* 12851 */ IC_XD_OPSIZE, /* 12852 */ IC_64BIT_XD_OPSIZE, /* 12853 */ IC_XS_OPSIZE, /* 12854 */ IC_64BIT_XD_OPSIZE, /* 12855 */ IC_OPSIZE_ADSIZE, /* 12856 */ IC_64BIT_REXW_OPSIZE, /* 12857 */ IC_XS_OPSIZE, /* 12858 */ IC_64BIT_REXW_XS, /* 12859 */ IC_XD_OPSIZE, /* 12860 */ IC_64BIT_REXW_XD, /* 12861 */ IC_XS_OPSIZE, /* 12862 */ IC_64BIT_REXW_XS, /* 12863 */ IC_VEX, /* 12864 */ IC_VEX, /* 12865 */ IC_VEX_XS, /* 12866 */ IC_VEX_XS, /* 12867 */ IC_VEX_XD, /* 12868 */ IC_VEX_XD, /* 12869 */ IC_VEX_XD, /* 12870 */ IC_VEX_XD, /* 12871 */ IC_VEX_W, /* 12872 */ IC_VEX_W, /* 12873 */ IC_VEX_W_XS, /* 12874 */ IC_VEX_W_XS, /* 12875 */ IC_VEX_W_XD, /* 12876 */ IC_VEX_W_XD, /* 12877 */ IC_VEX_W_XD, /* 12878 */ IC_VEX_W_XD, /* 12879 */ IC_VEX_OPSIZE, /* 12880 */ IC_VEX_OPSIZE, /* 12881 */ IC_VEX_OPSIZE, /* 12882 */ IC_VEX_OPSIZE, /* 12883 */ IC_VEX_OPSIZE, /* 12884 */ IC_VEX_OPSIZE, /* 12885 */ IC_VEX_OPSIZE, /* 12886 */ IC_VEX_OPSIZE, /* 12887 */ IC_VEX_W_OPSIZE, /* 12888 */ IC_VEX_W_OPSIZE, /* 12889 */ IC_VEX_W_OPSIZE, /* 12890 */ IC_VEX_W_OPSIZE, /* 12891 */ IC_VEX_W_OPSIZE, /* 12892 */ IC_VEX_W_OPSIZE, /* 12893 */ IC_VEX_W_OPSIZE, /* 12894 */ IC_VEX_W_OPSIZE, /* 12895 */ IC_VEX, /* 12896 */ IC_VEX, /* 12897 */ IC_VEX_XS, /* 12898 */ IC_VEX_XS, /* 12899 */ IC_VEX_XD, /* 12900 */ IC_VEX_XD, /* 12901 */ IC_VEX_XD, /* 12902 */ IC_VEX_XD, /* 12903 */ IC_VEX_W, /* 12904 */ IC_VEX_W, /* 12905 */ IC_VEX_W_XS, /* 12906 */ IC_VEX_W_XS, /* 12907 */ IC_VEX_W_XD, /* 12908 */ IC_VEX_W_XD, /* 12909 */ IC_VEX_W_XD, /* 12910 */ IC_VEX_W_XD, /* 12911 */ IC_VEX_OPSIZE, /* 12912 */ IC_VEX_OPSIZE, /* 12913 */ IC_VEX_OPSIZE, /* 12914 */ IC_VEX_OPSIZE, /* 12915 */ IC_VEX_OPSIZE, /* 12916 */ IC_VEX_OPSIZE, /* 12917 */ IC_VEX_OPSIZE, /* 12918 */ IC_VEX_OPSIZE, /* 12919 */ IC_VEX_W_OPSIZE, /* 12920 */ IC_VEX_W_OPSIZE, /* 12921 */ IC_VEX_W_OPSIZE, /* 12922 */ IC_VEX_W_OPSIZE, /* 12923 */ IC_VEX_W_OPSIZE, /* 12924 */ IC_VEX_W_OPSIZE, /* 12925 */ IC_VEX_W_OPSIZE, /* 12926 */ IC_VEX_W_OPSIZE, /* 12927 */ IC_VEX_L, /* 12928 */ IC_VEX_L, /* 12929 */ IC_VEX_L_XS, /* 12930 */ IC_VEX_L_XS, /* 12931 */ IC_VEX_L_XD, /* 12932 */ IC_VEX_L_XD, /* 12933 */ IC_VEX_L_XD, /* 12934 */ IC_VEX_L_XD, /* 12935 */ IC_VEX_L_W, /* 12936 */ IC_VEX_L_W, /* 12937 */ IC_VEX_L_W_XS, /* 12938 */ IC_VEX_L_W_XS, /* 12939 */ IC_VEX_L_W_XD, /* 12940 */ IC_VEX_L_W_XD, /* 12941 */ IC_VEX_L_W_XD, /* 12942 */ IC_VEX_L_W_XD, /* 12943 */ IC_VEX_L_OPSIZE, /* 12944 */ IC_VEX_L_OPSIZE, /* 12945 */ IC_VEX_L_OPSIZE, /* 12946 */ IC_VEX_L_OPSIZE, /* 12947 */ IC_VEX_L_OPSIZE, /* 12948 */ IC_VEX_L_OPSIZE, /* 12949 */ IC_VEX_L_OPSIZE, /* 12950 */ IC_VEX_L_OPSIZE, /* 12951 */ IC_VEX_L_W_OPSIZE, /* 12952 */ IC_VEX_L_W_OPSIZE, /* 12953 */ IC_VEX_L_W_OPSIZE, /* 12954 */ IC_VEX_L_W_OPSIZE, /* 12955 */ IC_VEX_L_W_OPSIZE, /* 12956 */ IC_VEX_L_W_OPSIZE, /* 12957 */ IC_VEX_L_W_OPSIZE, /* 12958 */ IC_VEX_L_W_OPSIZE, /* 12959 */ IC_VEX_L, /* 12960 */ IC_VEX_L, /* 12961 */ IC_VEX_L_XS, /* 12962 */ IC_VEX_L_XS, /* 12963 */ IC_VEX_L_XD, /* 12964 */ IC_VEX_L_XD, /* 12965 */ IC_VEX_L_XD, /* 12966 */ IC_VEX_L_XD, /* 12967 */ IC_VEX_L_W, /* 12968 */ IC_VEX_L_W, /* 12969 */ IC_VEX_L_W_XS, /* 12970 */ IC_VEX_L_W_XS, /* 12971 */ IC_VEX_L_W_XD, /* 12972 */ IC_VEX_L_W_XD, /* 12973 */ IC_VEX_L_W_XD, /* 12974 */ IC_VEX_L_W_XD, /* 12975 */ IC_VEX_L_OPSIZE, /* 12976 */ IC_VEX_L_OPSIZE, /* 12977 */ IC_VEX_L_OPSIZE, /* 12978 */ IC_VEX_L_OPSIZE, /* 12979 */ IC_VEX_L_OPSIZE, /* 12980 */ IC_VEX_L_OPSIZE, /* 12981 */ IC_VEX_L_OPSIZE, /* 12982 */ IC_VEX_L_OPSIZE, /* 12983 */ IC_VEX_L_W_OPSIZE, /* 12984 */ IC_VEX_L_W_OPSIZE, /* 12985 */ IC_VEX_L_W_OPSIZE, /* 12986 */ IC_VEX_L_W_OPSIZE, /* 12987 */ IC_VEX_L_W_OPSIZE, /* 12988 */ IC_VEX_L_W_OPSIZE, /* 12989 */ IC_VEX_L_W_OPSIZE, /* 12990 */ IC_VEX_L_W_OPSIZE, /* 12991 */ IC_VEX_L, /* 12992 */ IC_VEX_L, /* 12993 */ IC_VEX_L_XS, /* 12994 */ IC_VEX_L_XS, /* 12995 */ IC_VEX_L_XD, /* 12996 */ IC_VEX_L_XD, /* 12997 */ IC_VEX_L_XD, /* 12998 */ IC_VEX_L_XD, /* 12999 */ IC_VEX_L_W, /* 13000 */ IC_VEX_L_W, /* 13001 */ IC_VEX_L_W_XS, /* 13002 */ IC_VEX_L_W_XS, /* 13003 */ IC_VEX_L_W_XD, /* 13004 */ IC_VEX_L_W_XD, /* 13005 */ IC_VEX_L_W_XD, /* 13006 */ IC_VEX_L_W_XD, /* 13007 */ IC_VEX_L_OPSIZE, /* 13008 */ IC_VEX_L_OPSIZE, /* 13009 */ IC_VEX_L_OPSIZE, /* 13010 */ IC_VEX_L_OPSIZE, /* 13011 */ IC_VEX_L_OPSIZE, /* 13012 */ IC_VEX_L_OPSIZE, /* 13013 */ IC_VEX_L_OPSIZE, /* 13014 */ IC_VEX_L_OPSIZE, /* 13015 */ IC_VEX_L_W_OPSIZE, /* 13016 */ IC_VEX_L_W_OPSIZE, /* 13017 */ IC_VEX_L_W_OPSIZE, /* 13018 */ IC_VEX_L_W_OPSIZE, /* 13019 */ IC_VEX_L_W_OPSIZE, /* 13020 */ IC_VEX_L_W_OPSIZE, /* 13021 */ IC_VEX_L_W_OPSIZE, /* 13022 */ IC_VEX_L_W_OPSIZE, /* 13023 */ IC_VEX_L, /* 13024 */ IC_VEX_L, /* 13025 */ IC_VEX_L_XS, /* 13026 */ IC_VEX_L_XS, /* 13027 */ IC_VEX_L_XD, /* 13028 */ IC_VEX_L_XD, /* 13029 */ IC_VEX_L_XD, /* 13030 */ IC_VEX_L_XD, /* 13031 */ IC_VEX_L_W, /* 13032 */ IC_VEX_L_W, /* 13033 */ IC_VEX_L_W_XS, /* 13034 */ IC_VEX_L_W_XS, /* 13035 */ IC_VEX_L_W_XD, /* 13036 */ IC_VEX_L_W_XD, /* 13037 */ IC_VEX_L_W_XD, /* 13038 */ IC_VEX_L_W_XD, /* 13039 */ IC_VEX_L_OPSIZE, /* 13040 */ IC_VEX_L_OPSIZE, /* 13041 */ IC_VEX_L_OPSIZE, /* 13042 */ IC_VEX_L_OPSIZE, /* 13043 */ IC_VEX_L_OPSIZE, /* 13044 */ IC_VEX_L_OPSIZE, /* 13045 */ IC_VEX_L_OPSIZE, /* 13046 */ IC_VEX_L_OPSIZE, /* 13047 */ IC_VEX_L_W_OPSIZE, /* 13048 */ IC_VEX_L_W_OPSIZE, /* 13049 */ IC_VEX_L_W_OPSIZE, /* 13050 */ IC_VEX_L_W_OPSIZE, /* 13051 */ IC_VEX_L_W_OPSIZE, /* 13052 */ IC_VEX_L_W_OPSIZE, /* 13053 */ IC_VEX_L_W_OPSIZE, /* 13054 */ IC_VEX_L_W_OPSIZE, /* 13055 */ IC_EVEX_L_KZ_B, /* 13056 */ IC_EVEX_L_KZ_B, /* 13057 */ IC_EVEX_L_XS_KZ_B, /* 13058 */ IC_EVEX_L_XS_KZ_B, /* 13059 */ IC_EVEX_L_XD_KZ_B, /* 13060 */ IC_EVEX_L_XD_KZ_B, /* 13061 */ IC_EVEX_L_XD_KZ_B, /* 13062 */ IC_EVEX_L_XD_KZ_B, /* 13063 */ IC_EVEX_L_W_KZ_B, /* 13064 */ IC_EVEX_L_W_KZ_B, /* 13065 */ IC_EVEX_L_W_XS_KZ_B, /* 13066 */ IC_EVEX_L_W_XS_KZ_B, /* 13067 */ IC_EVEX_L_W_XD_KZ_B, /* 13068 */ IC_EVEX_L_W_XD_KZ_B, /* 13069 */ IC_EVEX_L_W_XD_KZ_B, /* 13070 */ IC_EVEX_L_W_XD_KZ_B, /* 13071 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13072 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13073 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13074 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13075 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13076 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13077 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13078 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13079 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13080 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13081 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13082 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13083 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13084 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13085 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13086 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13087 */ IC_EVEX_L_KZ_B, /* 13088 */ IC_EVEX_L_KZ_B, /* 13089 */ IC_EVEX_L_XS_KZ_B, /* 13090 */ IC_EVEX_L_XS_KZ_B, /* 13091 */ IC_EVEX_L_XD_KZ_B, /* 13092 */ IC_EVEX_L_XD_KZ_B, /* 13093 */ IC_EVEX_L_XD_KZ_B, /* 13094 */ IC_EVEX_L_XD_KZ_B, /* 13095 */ IC_EVEX_L_W_KZ_B, /* 13096 */ IC_EVEX_L_W_KZ_B, /* 13097 */ IC_EVEX_L_W_XS_KZ_B, /* 13098 */ IC_EVEX_L_W_XS_KZ_B, /* 13099 */ IC_EVEX_L_W_XD_KZ_B, /* 13100 */ IC_EVEX_L_W_XD_KZ_B, /* 13101 */ IC_EVEX_L_W_XD_KZ_B, /* 13102 */ IC_EVEX_L_W_XD_KZ_B, /* 13103 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13104 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13105 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13106 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13107 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13108 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13109 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13110 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13111 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13112 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13113 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13114 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13115 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13116 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13117 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13118 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13119 */ IC_EVEX_L_KZ_B, /* 13120 */ IC_EVEX_L_KZ_B, /* 13121 */ IC_EVEX_L_XS_KZ_B, /* 13122 */ IC_EVEX_L_XS_KZ_B, /* 13123 */ IC_EVEX_L_XD_KZ_B, /* 13124 */ IC_EVEX_L_XD_KZ_B, /* 13125 */ IC_EVEX_L_XD_KZ_B, /* 13126 */ IC_EVEX_L_XD_KZ_B, /* 13127 */ IC_EVEX_L_W_KZ_B, /* 13128 */ IC_EVEX_L_W_KZ_B, /* 13129 */ IC_EVEX_L_W_XS_KZ_B, /* 13130 */ IC_EVEX_L_W_XS_KZ_B, /* 13131 */ IC_EVEX_L_W_XD_KZ_B, /* 13132 */ IC_EVEX_L_W_XD_KZ_B, /* 13133 */ IC_EVEX_L_W_XD_KZ_B, /* 13134 */ IC_EVEX_L_W_XD_KZ_B, /* 13135 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13136 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13137 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13138 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13139 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13140 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13141 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13142 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13143 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13144 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13145 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13146 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13147 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13148 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13149 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13150 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13151 */ IC_EVEX_L_KZ_B, /* 13152 */ IC_EVEX_L_KZ_B, /* 13153 */ IC_EVEX_L_XS_KZ_B, /* 13154 */ IC_EVEX_L_XS_KZ_B, /* 13155 */ IC_EVEX_L_XD_KZ_B, /* 13156 */ IC_EVEX_L_XD_KZ_B, /* 13157 */ IC_EVEX_L_XD_KZ_B, /* 13158 */ IC_EVEX_L_XD_KZ_B, /* 13159 */ IC_EVEX_L_W_KZ_B, /* 13160 */ IC_EVEX_L_W_KZ_B, /* 13161 */ IC_EVEX_L_W_XS_KZ_B, /* 13162 */ IC_EVEX_L_W_XS_KZ_B, /* 13163 */ IC_EVEX_L_W_XD_KZ_B, /* 13164 */ IC_EVEX_L_W_XD_KZ_B, /* 13165 */ IC_EVEX_L_W_XD_KZ_B, /* 13166 */ IC_EVEX_L_W_XD_KZ_B, /* 13167 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13168 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13169 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13170 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13171 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13172 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13173 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13174 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13175 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13176 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13177 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13178 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13179 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13180 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13181 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13182 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13183 */ IC_EVEX_L_KZ_B, /* 13184 */ IC_EVEX_L_KZ_B, /* 13185 */ IC_EVEX_L_XS_KZ_B, /* 13186 */ IC_EVEX_L_XS_KZ_B, /* 13187 */ IC_EVEX_L_XD_KZ_B, /* 13188 */ IC_EVEX_L_XD_KZ_B, /* 13189 */ IC_EVEX_L_XD_KZ_B, /* 13190 */ IC_EVEX_L_XD_KZ_B, /* 13191 */ IC_EVEX_L_W_KZ_B, /* 13192 */ IC_EVEX_L_W_KZ_B, /* 13193 */ IC_EVEX_L_W_XS_KZ_B, /* 13194 */ IC_EVEX_L_W_XS_KZ_B, /* 13195 */ IC_EVEX_L_W_XD_KZ_B, /* 13196 */ IC_EVEX_L_W_XD_KZ_B, /* 13197 */ IC_EVEX_L_W_XD_KZ_B, /* 13198 */ IC_EVEX_L_W_XD_KZ_B, /* 13199 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13200 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13201 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13202 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13203 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13204 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13205 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13206 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13207 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13208 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13209 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13210 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13211 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13212 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13213 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13214 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13215 */ IC_EVEX_L_KZ_B, /* 13216 */ IC_EVEX_L_KZ_B, /* 13217 */ IC_EVEX_L_XS_KZ_B, /* 13218 */ IC_EVEX_L_XS_KZ_B, /* 13219 */ IC_EVEX_L_XD_KZ_B, /* 13220 */ IC_EVEX_L_XD_KZ_B, /* 13221 */ IC_EVEX_L_XD_KZ_B, /* 13222 */ IC_EVEX_L_XD_KZ_B, /* 13223 */ IC_EVEX_L_W_KZ_B, /* 13224 */ IC_EVEX_L_W_KZ_B, /* 13225 */ IC_EVEX_L_W_XS_KZ_B, /* 13226 */ IC_EVEX_L_W_XS_KZ_B, /* 13227 */ IC_EVEX_L_W_XD_KZ_B, /* 13228 */ IC_EVEX_L_W_XD_KZ_B, /* 13229 */ IC_EVEX_L_W_XD_KZ_B, /* 13230 */ IC_EVEX_L_W_XD_KZ_B, /* 13231 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13232 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13233 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13234 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13235 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13236 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13237 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13238 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13239 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13240 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13241 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13242 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13243 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13244 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13245 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13246 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13247 */ IC_EVEX_L_KZ_B, /* 13248 */ IC_EVEX_L_KZ_B, /* 13249 */ IC_EVEX_L_XS_KZ_B, /* 13250 */ IC_EVEX_L_XS_KZ_B, /* 13251 */ IC_EVEX_L_XD_KZ_B, /* 13252 */ IC_EVEX_L_XD_KZ_B, /* 13253 */ IC_EVEX_L_XD_KZ_B, /* 13254 */ IC_EVEX_L_XD_KZ_B, /* 13255 */ IC_EVEX_L_W_KZ_B, /* 13256 */ IC_EVEX_L_W_KZ_B, /* 13257 */ IC_EVEX_L_W_XS_KZ_B, /* 13258 */ IC_EVEX_L_W_XS_KZ_B, /* 13259 */ IC_EVEX_L_W_XD_KZ_B, /* 13260 */ IC_EVEX_L_W_XD_KZ_B, /* 13261 */ IC_EVEX_L_W_XD_KZ_B, /* 13262 */ IC_EVEX_L_W_XD_KZ_B, /* 13263 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13264 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13265 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13266 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13267 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13268 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13269 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13270 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13271 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13272 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13273 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13274 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13275 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13276 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13277 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13278 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13279 */ IC_EVEX_L_KZ_B, /* 13280 */ IC_EVEX_L_KZ_B, /* 13281 */ IC_EVEX_L_XS_KZ_B, /* 13282 */ IC_EVEX_L_XS_KZ_B, /* 13283 */ IC_EVEX_L_XD_KZ_B, /* 13284 */ IC_EVEX_L_XD_KZ_B, /* 13285 */ IC_EVEX_L_XD_KZ_B, /* 13286 */ IC_EVEX_L_XD_KZ_B, /* 13287 */ IC_EVEX_L_W_KZ_B, /* 13288 */ IC_EVEX_L_W_KZ_B, /* 13289 */ IC_EVEX_L_W_XS_KZ_B, /* 13290 */ IC_EVEX_L_W_XS_KZ_B, /* 13291 */ IC_EVEX_L_W_XD_KZ_B, /* 13292 */ IC_EVEX_L_W_XD_KZ_B, /* 13293 */ IC_EVEX_L_W_XD_KZ_B, /* 13294 */ IC_EVEX_L_W_XD_KZ_B, /* 13295 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13296 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13297 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13298 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13299 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13300 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13301 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13302 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13303 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13304 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13305 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13306 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13307 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13308 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13309 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13310 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13311 */ IC, /* 13312 */ IC_64BIT, /* 13313 */ IC_XS, /* 13314 */ IC_64BIT_XS, /* 13315 */ IC_XD, /* 13316 */ IC_64BIT_XD, /* 13317 */ IC_XS, /* 13318 */ IC_64BIT_XS, /* 13319 */ IC, /* 13320 */ IC_64BIT_REXW, /* 13321 */ IC_XS, /* 13322 */ IC_64BIT_REXW_XS, /* 13323 */ IC_XD, /* 13324 */ IC_64BIT_REXW_XD, /* 13325 */ IC_XS, /* 13326 */ IC_64BIT_REXW_XS, /* 13327 */ IC_OPSIZE, /* 13328 */ IC_64BIT_OPSIZE, /* 13329 */ IC_XS_OPSIZE, /* 13330 */ IC_64BIT_XS_OPSIZE, /* 13331 */ IC_XD_OPSIZE, /* 13332 */ IC_64BIT_XD_OPSIZE, /* 13333 */ IC_XS_OPSIZE, /* 13334 */ IC_64BIT_XD_OPSIZE, /* 13335 */ IC_OPSIZE, /* 13336 */ IC_64BIT_REXW_OPSIZE, /* 13337 */ IC_XS_OPSIZE, /* 13338 */ IC_64BIT_REXW_XS, /* 13339 */ IC_XD_OPSIZE, /* 13340 */ IC_64BIT_REXW_XD, /* 13341 */ IC_XS_OPSIZE, /* 13342 */ IC_64BIT_REXW_XS, /* 13343 */ IC_ADSIZE, /* 13344 */ IC_64BIT_ADSIZE, /* 13345 */ IC_XS, /* 13346 */ IC_64BIT_XS, /* 13347 */ IC_XD, /* 13348 */ IC_64BIT_XD, /* 13349 */ IC_XS, /* 13350 */ IC_64BIT_XS, /* 13351 */ IC_ADSIZE, /* 13352 */ IC_64BIT_REXW_ADSIZE, /* 13353 */ IC_XS, /* 13354 */ IC_64BIT_REXW_XS, /* 13355 */ IC_XD, /* 13356 */ IC_64BIT_REXW_XD, /* 13357 */ IC_XS, /* 13358 */ IC_64BIT_REXW_XS, /* 13359 */ IC_OPSIZE_ADSIZE, /* 13360 */ IC_64BIT_OPSIZE_ADSIZE, /* 13361 */ IC_XS_OPSIZE, /* 13362 */ IC_64BIT_XS_OPSIZE, /* 13363 */ IC_XD_OPSIZE, /* 13364 */ IC_64BIT_XD_OPSIZE, /* 13365 */ IC_XS_OPSIZE, /* 13366 */ IC_64BIT_XD_OPSIZE, /* 13367 */ IC_OPSIZE_ADSIZE, /* 13368 */ IC_64BIT_REXW_OPSIZE, /* 13369 */ IC_XS_OPSIZE, /* 13370 */ IC_64BIT_REXW_XS, /* 13371 */ IC_XD_OPSIZE, /* 13372 */ IC_64BIT_REXW_XD, /* 13373 */ IC_XS_OPSIZE, /* 13374 */ IC_64BIT_REXW_XS, /* 13375 */ IC_VEX, /* 13376 */ IC_VEX, /* 13377 */ IC_VEX_XS, /* 13378 */ IC_VEX_XS, /* 13379 */ IC_VEX_XD, /* 13380 */ IC_VEX_XD, /* 13381 */ IC_VEX_XD, /* 13382 */ IC_VEX_XD, /* 13383 */ IC_VEX_W, /* 13384 */ IC_VEX_W, /* 13385 */ IC_VEX_W_XS, /* 13386 */ IC_VEX_W_XS, /* 13387 */ IC_VEX_W_XD, /* 13388 */ IC_VEX_W_XD, /* 13389 */ IC_VEX_W_XD, /* 13390 */ IC_VEX_W_XD, /* 13391 */ IC_VEX_OPSIZE, /* 13392 */ IC_VEX_OPSIZE, /* 13393 */ IC_VEX_OPSIZE, /* 13394 */ IC_VEX_OPSIZE, /* 13395 */ IC_VEX_OPSIZE, /* 13396 */ IC_VEX_OPSIZE, /* 13397 */ IC_VEX_OPSIZE, /* 13398 */ IC_VEX_OPSIZE, /* 13399 */ IC_VEX_W_OPSIZE, /* 13400 */ IC_VEX_W_OPSIZE, /* 13401 */ IC_VEX_W_OPSIZE, /* 13402 */ IC_VEX_W_OPSIZE, /* 13403 */ IC_VEX_W_OPSIZE, /* 13404 */ IC_VEX_W_OPSIZE, /* 13405 */ IC_VEX_W_OPSIZE, /* 13406 */ IC_VEX_W_OPSIZE, /* 13407 */ IC_VEX, /* 13408 */ IC_VEX, /* 13409 */ IC_VEX_XS, /* 13410 */ IC_VEX_XS, /* 13411 */ IC_VEX_XD, /* 13412 */ IC_VEX_XD, /* 13413 */ IC_VEX_XD, /* 13414 */ IC_VEX_XD, /* 13415 */ IC_VEX_W, /* 13416 */ IC_VEX_W, /* 13417 */ IC_VEX_W_XS, /* 13418 */ IC_VEX_W_XS, /* 13419 */ IC_VEX_W_XD, /* 13420 */ IC_VEX_W_XD, /* 13421 */ IC_VEX_W_XD, /* 13422 */ IC_VEX_W_XD, /* 13423 */ IC_VEX_OPSIZE, /* 13424 */ IC_VEX_OPSIZE, /* 13425 */ IC_VEX_OPSIZE, /* 13426 */ IC_VEX_OPSIZE, /* 13427 */ IC_VEX_OPSIZE, /* 13428 */ IC_VEX_OPSIZE, /* 13429 */ IC_VEX_OPSIZE, /* 13430 */ IC_VEX_OPSIZE, /* 13431 */ IC_VEX_W_OPSIZE, /* 13432 */ IC_VEX_W_OPSIZE, /* 13433 */ IC_VEX_W_OPSIZE, /* 13434 */ IC_VEX_W_OPSIZE, /* 13435 */ IC_VEX_W_OPSIZE, /* 13436 */ IC_VEX_W_OPSIZE, /* 13437 */ IC_VEX_W_OPSIZE, /* 13438 */ IC_VEX_W_OPSIZE, /* 13439 */ IC_VEX_L, /* 13440 */ IC_VEX_L, /* 13441 */ IC_VEX_L_XS, /* 13442 */ IC_VEX_L_XS, /* 13443 */ IC_VEX_L_XD, /* 13444 */ IC_VEX_L_XD, /* 13445 */ IC_VEX_L_XD, /* 13446 */ IC_VEX_L_XD, /* 13447 */ IC_VEX_L_W, /* 13448 */ IC_VEX_L_W, /* 13449 */ IC_VEX_L_W_XS, /* 13450 */ IC_VEX_L_W_XS, /* 13451 */ IC_VEX_L_W_XD, /* 13452 */ IC_VEX_L_W_XD, /* 13453 */ IC_VEX_L_W_XD, /* 13454 */ IC_VEX_L_W_XD, /* 13455 */ IC_VEX_L_OPSIZE, /* 13456 */ IC_VEX_L_OPSIZE, /* 13457 */ IC_VEX_L_OPSIZE, /* 13458 */ IC_VEX_L_OPSIZE, /* 13459 */ IC_VEX_L_OPSIZE, /* 13460 */ IC_VEX_L_OPSIZE, /* 13461 */ IC_VEX_L_OPSIZE, /* 13462 */ IC_VEX_L_OPSIZE, /* 13463 */ IC_VEX_L_W_OPSIZE, /* 13464 */ IC_VEX_L_W_OPSIZE, /* 13465 */ IC_VEX_L_W_OPSIZE, /* 13466 */ IC_VEX_L_W_OPSIZE, /* 13467 */ IC_VEX_L_W_OPSIZE, /* 13468 */ IC_VEX_L_W_OPSIZE, /* 13469 */ IC_VEX_L_W_OPSIZE, /* 13470 */ IC_VEX_L_W_OPSIZE, /* 13471 */ IC_VEX_L, /* 13472 */ IC_VEX_L, /* 13473 */ IC_VEX_L_XS, /* 13474 */ IC_VEX_L_XS, /* 13475 */ IC_VEX_L_XD, /* 13476 */ IC_VEX_L_XD, /* 13477 */ IC_VEX_L_XD, /* 13478 */ IC_VEX_L_XD, /* 13479 */ IC_VEX_L_W, /* 13480 */ IC_VEX_L_W, /* 13481 */ IC_VEX_L_W_XS, /* 13482 */ IC_VEX_L_W_XS, /* 13483 */ IC_VEX_L_W_XD, /* 13484 */ IC_VEX_L_W_XD, /* 13485 */ IC_VEX_L_W_XD, /* 13486 */ IC_VEX_L_W_XD, /* 13487 */ IC_VEX_L_OPSIZE, /* 13488 */ IC_VEX_L_OPSIZE, /* 13489 */ IC_VEX_L_OPSIZE, /* 13490 */ IC_VEX_L_OPSIZE, /* 13491 */ IC_VEX_L_OPSIZE, /* 13492 */ IC_VEX_L_OPSIZE, /* 13493 */ IC_VEX_L_OPSIZE, /* 13494 */ IC_VEX_L_OPSIZE, /* 13495 */ IC_VEX_L_W_OPSIZE, /* 13496 */ IC_VEX_L_W_OPSIZE, /* 13497 */ IC_VEX_L_W_OPSIZE, /* 13498 */ IC_VEX_L_W_OPSIZE, /* 13499 */ IC_VEX_L_W_OPSIZE, /* 13500 */ IC_VEX_L_W_OPSIZE, /* 13501 */ IC_VEX_L_W_OPSIZE, /* 13502 */ IC_VEX_L_W_OPSIZE, /* 13503 */ IC_VEX_L, /* 13504 */ IC_VEX_L, /* 13505 */ IC_VEX_L_XS, /* 13506 */ IC_VEX_L_XS, /* 13507 */ IC_VEX_L_XD, /* 13508 */ IC_VEX_L_XD, /* 13509 */ IC_VEX_L_XD, /* 13510 */ IC_VEX_L_XD, /* 13511 */ IC_VEX_L_W, /* 13512 */ IC_VEX_L_W, /* 13513 */ IC_VEX_L_W_XS, /* 13514 */ IC_VEX_L_W_XS, /* 13515 */ IC_VEX_L_W_XD, /* 13516 */ IC_VEX_L_W_XD, /* 13517 */ IC_VEX_L_W_XD, /* 13518 */ IC_VEX_L_W_XD, /* 13519 */ IC_VEX_L_OPSIZE, /* 13520 */ IC_VEX_L_OPSIZE, /* 13521 */ IC_VEX_L_OPSIZE, /* 13522 */ IC_VEX_L_OPSIZE, /* 13523 */ IC_VEX_L_OPSIZE, /* 13524 */ IC_VEX_L_OPSIZE, /* 13525 */ IC_VEX_L_OPSIZE, /* 13526 */ IC_VEX_L_OPSIZE, /* 13527 */ IC_VEX_L_W_OPSIZE, /* 13528 */ IC_VEX_L_W_OPSIZE, /* 13529 */ IC_VEX_L_W_OPSIZE, /* 13530 */ IC_VEX_L_W_OPSIZE, /* 13531 */ IC_VEX_L_W_OPSIZE, /* 13532 */ IC_VEX_L_W_OPSIZE, /* 13533 */ IC_VEX_L_W_OPSIZE, /* 13534 */ IC_VEX_L_W_OPSIZE, /* 13535 */ IC_VEX_L, /* 13536 */ IC_VEX_L, /* 13537 */ IC_VEX_L_XS, /* 13538 */ IC_VEX_L_XS, /* 13539 */ IC_VEX_L_XD, /* 13540 */ IC_VEX_L_XD, /* 13541 */ IC_VEX_L_XD, /* 13542 */ IC_VEX_L_XD, /* 13543 */ IC_VEX_L_W, /* 13544 */ IC_VEX_L_W, /* 13545 */ IC_VEX_L_W_XS, /* 13546 */ IC_VEX_L_W_XS, /* 13547 */ IC_VEX_L_W_XD, /* 13548 */ IC_VEX_L_W_XD, /* 13549 */ IC_VEX_L_W_XD, /* 13550 */ IC_VEX_L_W_XD, /* 13551 */ IC_VEX_L_OPSIZE, /* 13552 */ IC_VEX_L_OPSIZE, /* 13553 */ IC_VEX_L_OPSIZE, /* 13554 */ IC_VEX_L_OPSIZE, /* 13555 */ IC_VEX_L_OPSIZE, /* 13556 */ IC_VEX_L_OPSIZE, /* 13557 */ IC_VEX_L_OPSIZE, /* 13558 */ IC_VEX_L_OPSIZE, /* 13559 */ IC_VEX_L_W_OPSIZE, /* 13560 */ IC_VEX_L_W_OPSIZE, /* 13561 */ IC_VEX_L_W_OPSIZE, /* 13562 */ IC_VEX_L_W_OPSIZE, /* 13563 */ IC_VEX_L_W_OPSIZE, /* 13564 */ IC_VEX_L_W_OPSIZE, /* 13565 */ IC_VEX_L_W_OPSIZE, /* 13566 */ IC_VEX_L_W_OPSIZE, /* 13567 */ IC_EVEX_L2_KZ_B, /* 13568 */ IC_EVEX_L2_KZ_B, /* 13569 */ IC_EVEX_L2_XS_KZ_B, /* 13570 */ IC_EVEX_L2_XS_KZ_B, /* 13571 */ IC_EVEX_L2_XD_KZ_B, /* 13572 */ IC_EVEX_L2_XD_KZ_B, /* 13573 */ IC_EVEX_L2_XD_KZ_B, /* 13574 */ IC_EVEX_L2_XD_KZ_B, /* 13575 */ IC_EVEX_L2_W_KZ_B, /* 13576 */ IC_EVEX_L2_W_KZ_B, /* 13577 */ IC_EVEX_L2_W_XS_KZ_B, /* 13578 */ IC_EVEX_L2_W_XS_KZ_B, /* 13579 */ IC_EVEX_L2_W_XD_KZ_B, /* 13580 */ IC_EVEX_L2_W_XD_KZ_B, /* 13581 */ IC_EVEX_L2_W_XD_KZ_B, /* 13582 */ IC_EVEX_L2_W_XD_KZ_B, /* 13583 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13584 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13585 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13586 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13587 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13588 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13589 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13590 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13591 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13592 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13593 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13594 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13595 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13596 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13597 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13598 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13599 */ IC_EVEX_L2_KZ_B, /* 13600 */ IC_EVEX_L2_KZ_B, /* 13601 */ IC_EVEX_L2_XS_KZ_B, /* 13602 */ IC_EVEX_L2_XS_KZ_B, /* 13603 */ IC_EVEX_L2_XD_KZ_B, /* 13604 */ IC_EVEX_L2_XD_KZ_B, /* 13605 */ IC_EVEX_L2_XD_KZ_B, /* 13606 */ IC_EVEX_L2_XD_KZ_B, /* 13607 */ IC_EVEX_L2_W_KZ_B, /* 13608 */ IC_EVEX_L2_W_KZ_B, /* 13609 */ IC_EVEX_L2_W_XS_KZ_B, /* 13610 */ IC_EVEX_L2_W_XS_KZ_B, /* 13611 */ IC_EVEX_L2_W_XD_KZ_B, /* 13612 */ IC_EVEX_L2_W_XD_KZ_B, /* 13613 */ IC_EVEX_L2_W_XD_KZ_B, /* 13614 */ IC_EVEX_L2_W_XD_KZ_B, /* 13615 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13616 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13617 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13618 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13619 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13620 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13621 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13622 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13623 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13624 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13625 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13626 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13627 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13628 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13629 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13630 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13631 */ IC_EVEX_L2_KZ_B, /* 13632 */ IC_EVEX_L2_KZ_B, /* 13633 */ IC_EVEX_L2_XS_KZ_B, /* 13634 */ IC_EVEX_L2_XS_KZ_B, /* 13635 */ IC_EVEX_L2_XD_KZ_B, /* 13636 */ IC_EVEX_L2_XD_KZ_B, /* 13637 */ IC_EVEX_L2_XD_KZ_B, /* 13638 */ IC_EVEX_L2_XD_KZ_B, /* 13639 */ IC_EVEX_L2_W_KZ_B, /* 13640 */ IC_EVEX_L2_W_KZ_B, /* 13641 */ IC_EVEX_L2_W_XS_KZ_B, /* 13642 */ IC_EVEX_L2_W_XS_KZ_B, /* 13643 */ IC_EVEX_L2_W_XD_KZ_B, /* 13644 */ IC_EVEX_L2_W_XD_KZ_B, /* 13645 */ IC_EVEX_L2_W_XD_KZ_B, /* 13646 */ IC_EVEX_L2_W_XD_KZ_B, /* 13647 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13648 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13649 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13650 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13651 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13652 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13653 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13654 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13655 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13656 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13657 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13658 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13659 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13660 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13661 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13662 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13663 */ IC_EVEX_L2_KZ_B, /* 13664 */ IC_EVEX_L2_KZ_B, /* 13665 */ IC_EVEX_L2_XS_KZ_B, /* 13666 */ IC_EVEX_L2_XS_KZ_B, /* 13667 */ IC_EVEX_L2_XD_KZ_B, /* 13668 */ IC_EVEX_L2_XD_KZ_B, /* 13669 */ IC_EVEX_L2_XD_KZ_B, /* 13670 */ IC_EVEX_L2_XD_KZ_B, /* 13671 */ IC_EVEX_L2_W_KZ_B, /* 13672 */ IC_EVEX_L2_W_KZ_B, /* 13673 */ IC_EVEX_L2_W_XS_KZ_B, /* 13674 */ IC_EVEX_L2_W_XS_KZ_B, /* 13675 */ IC_EVEX_L2_W_XD_KZ_B, /* 13676 */ IC_EVEX_L2_W_XD_KZ_B, /* 13677 */ IC_EVEX_L2_W_XD_KZ_B, /* 13678 */ IC_EVEX_L2_W_XD_KZ_B, /* 13679 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13680 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13681 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13682 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13683 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13684 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13685 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13686 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13687 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13688 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13689 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13690 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13691 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13692 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13693 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13694 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13695 */ IC_EVEX_L2_KZ_B, /* 13696 */ IC_EVEX_L2_KZ_B, /* 13697 */ IC_EVEX_L2_XS_KZ_B, /* 13698 */ IC_EVEX_L2_XS_KZ_B, /* 13699 */ IC_EVEX_L2_XD_KZ_B, /* 13700 */ IC_EVEX_L2_XD_KZ_B, /* 13701 */ IC_EVEX_L2_XD_KZ_B, /* 13702 */ IC_EVEX_L2_XD_KZ_B, /* 13703 */ IC_EVEX_L2_W_KZ_B, /* 13704 */ IC_EVEX_L2_W_KZ_B, /* 13705 */ IC_EVEX_L2_W_XS_KZ_B, /* 13706 */ IC_EVEX_L2_W_XS_KZ_B, /* 13707 */ IC_EVEX_L2_W_XD_KZ_B, /* 13708 */ IC_EVEX_L2_W_XD_KZ_B, /* 13709 */ IC_EVEX_L2_W_XD_KZ_B, /* 13710 */ IC_EVEX_L2_W_XD_KZ_B, /* 13711 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13712 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13713 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13714 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13715 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13716 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13717 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13718 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13719 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13720 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13721 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13722 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13723 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13724 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13725 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13726 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13727 */ IC_EVEX_L2_KZ_B, /* 13728 */ IC_EVEX_L2_KZ_B, /* 13729 */ IC_EVEX_L2_XS_KZ_B, /* 13730 */ IC_EVEX_L2_XS_KZ_B, /* 13731 */ IC_EVEX_L2_XD_KZ_B, /* 13732 */ IC_EVEX_L2_XD_KZ_B, /* 13733 */ IC_EVEX_L2_XD_KZ_B, /* 13734 */ IC_EVEX_L2_XD_KZ_B, /* 13735 */ IC_EVEX_L2_W_KZ_B, /* 13736 */ IC_EVEX_L2_W_KZ_B, /* 13737 */ IC_EVEX_L2_W_XS_KZ_B, /* 13738 */ IC_EVEX_L2_W_XS_KZ_B, /* 13739 */ IC_EVEX_L2_W_XD_KZ_B, /* 13740 */ IC_EVEX_L2_W_XD_KZ_B, /* 13741 */ IC_EVEX_L2_W_XD_KZ_B, /* 13742 */ IC_EVEX_L2_W_XD_KZ_B, /* 13743 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13744 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13745 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13746 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13747 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13748 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13749 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13750 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13751 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13752 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13753 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13754 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13755 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13756 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13757 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13758 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13759 */ IC_EVEX_L2_KZ_B, /* 13760 */ IC_EVEX_L2_KZ_B, /* 13761 */ IC_EVEX_L2_XS_KZ_B, /* 13762 */ IC_EVEX_L2_XS_KZ_B, /* 13763 */ IC_EVEX_L2_XD_KZ_B, /* 13764 */ IC_EVEX_L2_XD_KZ_B, /* 13765 */ IC_EVEX_L2_XD_KZ_B, /* 13766 */ IC_EVEX_L2_XD_KZ_B, /* 13767 */ IC_EVEX_L2_W_KZ_B, /* 13768 */ IC_EVEX_L2_W_KZ_B, /* 13769 */ IC_EVEX_L2_W_XS_KZ_B, /* 13770 */ IC_EVEX_L2_W_XS_KZ_B, /* 13771 */ IC_EVEX_L2_W_XD_KZ_B, /* 13772 */ IC_EVEX_L2_W_XD_KZ_B, /* 13773 */ IC_EVEX_L2_W_XD_KZ_B, /* 13774 */ IC_EVEX_L2_W_XD_KZ_B, /* 13775 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13776 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13777 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13778 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13779 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13780 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13781 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13782 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13783 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13784 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13785 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13786 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13787 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13788 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13789 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13790 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13791 */ IC_EVEX_L2_KZ_B, /* 13792 */ IC_EVEX_L2_KZ_B, /* 13793 */ IC_EVEX_L2_XS_KZ_B, /* 13794 */ IC_EVEX_L2_XS_KZ_B, /* 13795 */ IC_EVEX_L2_XD_KZ_B, /* 13796 */ IC_EVEX_L2_XD_KZ_B, /* 13797 */ IC_EVEX_L2_XD_KZ_B, /* 13798 */ IC_EVEX_L2_XD_KZ_B, /* 13799 */ IC_EVEX_L2_W_KZ_B, /* 13800 */ IC_EVEX_L2_W_KZ_B, /* 13801 */ IC_EVEX_L2_W_XS_KZ_B, /* 13802 */ IC_EVEX_L2_W_XS_KZ_B, /* 13803 */ IC_EVEX_L2_W_XD_KZ_B, /* 13804 */ IC_EVEX_L2_W_XD_KZ_B, /* 13805 */ IC_EVEX_L2_W_XD_KZ_B, /* 13806 */ IC_EVEX_L2_W_XD_KZ_B, /* 13807 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13808 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13809 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13810 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13811 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13812 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13813 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13814 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13815 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13816 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13817 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13818 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13819 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13820 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13821 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13822 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13823 */ IC, /* 13824 */ IC_64BIT, /* 13825 */ IC_XS, /* 13826 */ IC_64BIT_XS, /* 13827 */ IC_XD, /* 13828 */ IC_64BIT_XD, /* 13829 */ IC_XS, /* 13830 */ IC_64BIT_XS, /* 13831 */ IC, /* 13832 */ IC_64BIT_REXW, /* 13833 */ IC_XS, /* 13834 */ IC_64BIT_REXW_XS, /* 13835 */ IC_XD, /* 13836 */ IC_64BIT_REXW_XD, /* 13837 */ IC_XS, /* 13838 */ IC_64BIT_REXW_XS, /* 13839 */ IC_OPSIZE, /* 13840 */ IC_64BIT_OPSIZE, /* 13841 */ IC_XS_OPSIZE, /* 13842 */ IC_64BIT_XS_OPSIZE, /* 13843 */ IC_XD_OPSIZE, /* 13844 */ IC_64BIT_XD_OPSIZE, /* 13845 */ IC_XS_OPSIZE, /* 13846 */ IC_64BIT_XD_OPSIZE, /* 13847 */ IC_OPSIZE, /* 13848 */ IC_64BIT_REXW_OPSIZE, /* 13849 */ IC_XS_OPSIZE, /* 13850 */ IC_64BIT_REXW_XS, /* 13851 */ IC_XD_OPSIZE, /* 13852 */ IC_64BIT_REXW_XD, /* 13853 */ IC_XS_OPSIZE, /* 13854 */ IC_64BIT_REXW_XS, /* 13855 */ IC_ADSIZE, /* 13856 */ IC_64BIT_ADSIZE, /* 13857 */ IC_XS, /* 13858 */ IC_64BIT_XS, /* 13859 */ IC_XD, /* 13860 */ IC_64BIT_XD, /* 13861 */ IC_XS, /* 13862 */ IC_64BIT_XS, /* 13863 */ IC_ADSIZE, /* 13864 */ IC_64BIT_REXW_ADSIZE, /* 13865 */ IC_XS, /* 13866 */ IC_64BIT_REXW_XS, /* 13867 */ IC_XD, /* 13868 */ IC_64BIT_REXW_XD, /* 13869 */ IC_XS, /* 13870 */ IC_64BIT_REXW_XS, /* 13871 */ IC_OPSIZE_ADSIZE, /* 13872 */ IC_64BIT_OPSIZE_ADSIZE, /* 13873 */ IC_XS_OPSIZE, /* 13874 */ IC_64BIT_XS_OPSIZE, /* 13875 */ IC_XD_OPSIZE, /* 13876 */ IC_64BIT_XD_OPSIZE, /* 13877 */ IC_XS_OPSIZE, /* 13878 */ IC_64BIT_XD_OPSIZE, /* 13879 */ IC_OPSIZE_ADSIZE, /* 13880 */ IC_64BIT_REXW_OPSIZE, /* 13881 */ IC_XS_OPSIZE, /* 13882 */ IC_64BIT_REXW_XS, /* 13883 */ IC_XD_OPSIZE, /* 13884 */ IC_64BIT_REXW_XD, /* 13885 */ IC_XS_OPSIZE, /* 13886 */ IC_64BIT_REXW_XS, /* 13887 */ IC_VEX, /* 13888 */ IC_VEX, /* 13889 */ IC_VEX_XS, /* 13890 */ IC_VEX_XS, /* 13891 */ IC_VEX_XD, /* 13892 */ IC_VEX_XD, /* 13893 */ IC_VEX_XD, /* 13894 */ IC_VEX_XD, /* 13895 */ IC_VEX_W, /* 13896 */ IC_VEX_W, /* 13897 */ IC_VEX_W_XS, /* 13898 */ IC_VEX_W_XS, /* 13899 */ IC_VEX_W_XD, /* 13900 */ IC_VEX_W_XD, /* 13901 */ IC_VEX_W_XD, /* 13902 */ IC_VEX_W_XD, /* 13903 */ IC_VEX_OPSIZE, /* 13904 */ IC_VEX_OPSIZE, /* 13905 */ IC_VEX_OPSIZE, /* 13906 */ IC_VEX_OPSIZE, /* 13907 */ IC_VEX_OPSIZE, /* 13908 */ IC_VEX_OPSIZE, /* 13909 */ IC_VEX_OPSIZE, /* 13910 */ IC_VEX_OPSIZE, /* 13911 */ IC_VEX_W_OPSIZE, /* 13912 */ IC_VEX_W_OPSIZE, /* 13913 */ IC_VEX_W_OPSIZE, /* 13914 */ IC_VEX_W_OPSIZE, /* 13915 */ IC_VEX_W_OPSIZE, /* 13916 */ IC_VEX_W_OPSIZE, /* 13917 */ IC_VEX_W_OPSIZE, /* 13918 */ IC_VEX_W_OPSIZE, /* 13919 */ IC_VEX, /* 13920 */ IC_VEX, /* 13921 */ IC_VEX_XS, /* 13922 */ IC_VEX_XS, /* 13923 */ IC_VEX_XD, /* 13924 */ IC_VEX_XD, /* 13925 */ IC_VEX_XD, /* 13926 */ IC_VEX_XD, /* 13927 */ IC_VEX_W, /* 13928 */ IC_VEX_W, /* 13929 */ IC_VEX_W_XS, /* 13930 */ IC_VEX_W_XS, /* 13931 */ IC_VEX_W_XD, /* 13932 */ IC_VEX_W_XD, /* 13933 */ IC_VEX_W_XD, /* 13934 */ IC_VEX_W_XD, /* 13935 */ IC_VEX_OPSIZE, /* 13936 */ IC_VEX_OPSIZE, /* 13937 */ IC_VEX_OPSIZE, /* 13938 */ IC_VEX_OPSIZE, /* 13939 */ IC_VEX_OPSIZE, /* 13940 */ IC_VEX_OPSIZE, /* 13941 */ IC_VEX_OPSIZE, /* 13942 */ IC_VEX_OPSIZE, /* 13943 */ IC_VEX_W_OPSIZE, /* 13944 */ IC_VEX_W_OPSIZE, /* 13945 */ IC_VEX_W_OPSIZE, /* 13946 */ IC_VEX_W_OPSIZE, /* 13947 */ IC_VEX_W_OPSIZE, /* 13948 */ IC_VEX_W_OPSIZE, /* 13949 */ IC_VEX_W_OPSIZE, /* 13950 */ IC_VEX_W_OPSIZE, /* 13951 */ IC_VEX_L, /* 13952 */ IC_VEX_L, /* 13953 */ IC_VEX_L_XS, /* 13954 */ IC_VEX_L_XS, /* 13955 */ IC_VEX_L_XD, /* 13956 */ IC_VEX_L_XD, /* 13957 */ IC_VEX_L_XD, /* 13958 */ IC_VEX_L_XD, /* 13959 */ IC_VEX_L_W, /* 13960 */ IC_VEX_L_W, /* 13961 */ IC_VEX_L_W_XS, /* 13962 */ IC_VEX_L_W_XS, /* 13963 */ IC_VEX_L_W_XD, /* 13964 */ IC_VEX_L_W_XD, /* 13965 */ IC_VEX_L_W_XD, /* 13966 */ IC_VEX_L_W_XD, /* 13967 */ IC_VEX_L_OPSIZE, /* 13968 */ IC_VEX_L_OPSIZE, /* 13969 */ IC_VEX_L_OPSIZE, /* 13970 */ IC_VEX_L_OPSIZE, /* 13971 */ IC_VEX_L_OPSIZE, /* 13972 */ IC_VEX_L_OPSIZE, /* 13973 */ IC_VEX_L_OPSIZE, /* 13974 */ IC_VEX_L_OPSIZE, /* 13975 */ IC_VEX_L_W_OPSIZE, /* 13976 */ IC_VEX_L_W_OPSIZE, /* 13977 */ IC_VEX_L_W_OPSIZE, /* 13978 */ IC_VEX_L_W_OPSIZE, /* 13979 */ IC_VEX_L_W_OPSIZE, /* 13980 */ IC_VEX_L_W_OPSIZE, /* 13981 */ IC_VEX_L_W_OPSIZE, /* 13982 */ IC_VEX_L_W_OPSIZE, /* 13983 */ IC_VEX_L, /* 13984 */ IC_VEX_L, /* 13985 */ IC_VEX_L_XS, /* 13986 */ IC_VEX_L_XS, /* 13987 */ IC_VEX_L_XD, /* 13988 */ IC_VEX_L_XD, /* 13989 */ IC_VEX_L_XD, /* 13990 */ IC_VEX_L_XD, /* 13991 */ IC_VEX_L_W, /* 13992 */ IC_VEX_L_W, /* 13993 */ IC_VEX_L_W_XS, /* 13994 */ IC_VEX_L_W_XS, /* 13995 */ IC_VEX_L_W_XD, /* 13996 */ IC_VEX_L_W_XD, /* 13997 */ IC_VEX_L_W_XD, /* 13998 */ IC_VEX_L_W_XD, /* 13999 */ IC_VEX_L_OPSIZE, /* 14000 */ IC_VEX_L_OPSIZE, /* 14001 */ IC_VEX_L_OPSIZE, /* 14002 */ IC_VEX_L_OPSIZE, /* 14003 */ IC_VEX_L_OPSIZE, /* 14004 */ IC_VEX_L_OPSIZE, /* 14005 */ IC_VEX_L_OPSIZE, /* 14006 */ IC_VEX_L_OPSIZE, /* 14007 */ IC_VEX_L_W_OPSIZE, /* 14008 */ IC_VEX_L_W_OPSIZE, /* 14009 */ IC_VEX_L_W_OPSIZE, /* 14010 */ IC_VEX_L_W_OPSIZE, /* 14011 */ IC_VEX_L_W_OPSIZE, /* 14012 */ IC_VEX_L_W_OPSIZE, /* 14013 */ IC_VEX_L_W_OPSIZE, /* 14014 */ IC_VEX_L_W_OPSIZE, /* 14015 */ IC_VEX_L, /* 14016 */ IC_VEX_L, /* 14017 */ IC_VEX_L_XS, /* 14018 */ IC_VEX_L_XS, /* 14019 */ IC_VEX_L_XD, /* 14020 */ IC_VEX_L_XD, /* 14021 */ IC_VEX_L_XD, /* 14022 */ IC_VEX_L_XD, /* 14023 */ IC_VEX_L_W, /* 14024 */ IC_VEX_L_W, /* 14025 */ IC_VEX_L_W_XS, /* 14026 */ IC_VEX_L_W_XS, /* 14027 */ IC_VEX_L_W_XD, /* 14028 */ IC_VEX_L_W_XD, /* 14029 */ IC_VEX_L_W_XD, /* 14030 */ IC_VEX_L_W_XD, /* 14031 */ IC_VEX_L_OPSIZE, /* 14032 */ IC_VEX_L_OPSIZE, /* 14033 */ IC_VEX_L_OPSIZE, /* 14034 */ IC_VEX_L_OPSIZE, /* 14035 */ IC_VEX_L_OPSIZE, /* 14036 */ IC_VEX_L_OPSIZE, /* 14037 */ IC_VEX_L_OPSIZE, /* 14038 */ IC_VEX_L_OPSIZE, /* 14039 */ IC_VEX_L_W_OPSIZE, /* 14040 */ IC_VEX_L_W_OPSIZE, /* 14041 */ IC_VEX_L_W_OPSIZE, /* 14042 */ IC_VEX_L_W_OPSIZE, /* 14043 */ IC_VEX_L_W_OPSIZE, /* 14044 */ IC_VEX_L_W_OPSIZE, /* 14045 */ IC_VEX_L_W_OPSIZE, /* 14046 */ IC_VEX_L_W_OPSIZE, /* 14047 */ IC_VEX_L, /* 14048 */ IC_VEX_L, /* 14049 */ IC_VEX_L_XS, /* 14050 */ IC_VEX_L_XS, /* 14051 */ IC_VEX_L_XD, /* 14052 */ IC_VEX_L_XD, /* 14053 */ IC_VEX_L_XD, /* 14054 */ IC_VEX_L_XD, /* 14055 */ IC_VEX_L_W, /* 14056 */ IC_VEX_L_W, /* 14057 */ IC_VEX_L_W_XS, /* 14058 */ IC_VEX_L_W_XS, /* 14059 */ IC_VEX_L_W_XD, /* 14060 */ IC_VEX_L_W_XD, /* 14061 */ IC_VEX_L_W_XD, /* 14062 */ IC_VEX_L_W_XD, /* 14063 */ IC_VEX_L_OPSIZE, /* 14064 */ IC_VEX_L_OPSIZE, /* 14065 */ IC_VEX_L_OPSIZE, /* 14066 */ IC_VEX_L_OPSIZE, /* 14067 */ IC_VEX_L_OPSIZE, /* 14068 */ IC_VEX_L_OPSIZE, /* 14069 */ IC_VEX_L_OPSIZE, /* 14070 */ IC_VEX_L_OPSIZE, /* 14071 */ IC_VEX_L_W_OPSIZE, /* 14072 */ IC_VEX_L_W_OPSIZE, /* 14073 */ IC_VEX_L_W_OPSIZE, /* 14074 */ IC_VEX_L_W_OPSIZE, /* 14075 */ IC_VEX_L_W_OPSIZE, /* 14076 */ IC_VEX_L_W_OPSIZE, /* 14077 */ IC_VEX_L_W_OPSIZE, /* 14078 */ IC_VEX_L_W_OPSIZE, /* 14079 */ IC_EVEX_L2_KZ_B, /* 14080 */ IC_EVEX_L2_KZ_B, /* 14081 */ IC_EVEX_L2_XS_KZ_B, /* 14082 */ IC_EVEX_L2_XS_KZ_B, /* 14083 */ IC_EVEX_L2_XD_KZ_B, /* 14084 */ IC_EVEX_L2_XD_KZ_B, /* 14085 */ IC_EVEX_L2_XD_KZ_B, /* 14086 */ IC_EVEX_L2_XD_KZ_B, /* 14087 */ IC_EVEX_L2_W_KZ_B, /* 14088 */ IC_EVEX_L2_W_KZ_B, /* 14089 */ IC_EVEX_L2_W_XS_KZ_B, /* 14090 */ IC_EVEX_L2_W_XS_KZ_B, /* 14091 */ IC_EVEX_L2_W_XD_KZ_B, /* 14092 */ IC_EVEX_L2_W_XD_KZ_B, /* 14093 */ IC_EVEX_L2_W_XD_KZ_B, /* 14094 */ IC_EVEX_L2_W_XD_KZ_B, /* 14095 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14096 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14097 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14098 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14099 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14100 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14101 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14102 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14103 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14104 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14105 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14106 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14107 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14108 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14109 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14110 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14111 */ IC_EVEX_L2_KZ_B, /* 14112 */ IC_EVEX_L2_KZ_B, /* 14113 */ IC_EVEX_L2_XS_KZ_B, /* 14114 */ IC_EVEX_L2_XS_KZ_B, /* 14115 */ IC_EVEX_L2_XD_KZ_B, /* 14116 */ IC_EVEX_L2_XD_KZ_B, /* 14117 */ IC_EVEX_L2_XD_KZ_B, /* 14118 */ IC_EVEX_L2_XD_KZ_B, /* 14119 */ IC_EVEX_L2_W_KZ_B, /* 14120 */ IC_EVEX_L2_W_KZ_B, /* 14121 */ IC_EVEX_L2_W_XS_KZ_B, /* 14122 */ IC_EVEX_L2_W_XS_KZ_B, /* 14123 */ IC_EVEX_L2_W_XD_KZ_B, /* 14124 */ IC_EVEX_L2_W_XD_KZ_B, /* 14125 */ IC_EVEX_L2_W_XD_KZ_B, /* 14126 */ IC_EVEX_L2_W_XD_KZ_B, /* 14127 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14128 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14129 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14130 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14131 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14132 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14133 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14134 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14135 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14136 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14137 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14138 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14139 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14140 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14141 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14142 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14143 */ IC_EVEX_L2_KZ_B, /* 14144 */ IC_EVEX_L2_KZ_B, /* 14145 */ IC_EVEX_L2_XS_KZ_B, /* 14146 */ IC_EVEX_L2_XS_KZ_B, /* 14147 */ IC_EVEX_L2_XD_KZ_B, /* 14148 */ IC_EVEX_L2_XD_KZ_B, /* 14149 */ IC_EVEX_L2_XD_KZ_B, /* 14150 */ IC_EVEX_L2_XD_KZ_B, /* 14151 */ IC_EVEX_L2_W_KZ_B, /* 14152 */ IC_EVEX_L2_W_KZ_B, /* 14153 */ IC_EVEX_L2_W_XS_KZ_B, /* 14154 */ IC_EVEX_L2_W_XS_KZ_B, /* 14155 */ IC_EVEX_L2_W_XD_KZ_B, /* 14156 */ IC_EVEX_L2_W_XD_KZ_B, /* 14157 */ IC_EVEX_L2_W_XD_KZ_B, /* 14158 */ IC_EVEX_L2_W_XD_KZ_B, /* 14159 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14160 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14161 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14162 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14163 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14164 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14165 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14166 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14167 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14168 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14169 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14170 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14171 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14172 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14173 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14174 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14175 */ IC_EVEX_L2_KZ_B, /* 14176 */ IC_EVEX_L2_KZ_B, /* 14177 */ IC_EVEX_L2_XS_KZ_B, /* 14178 */ IC_EVEX_L2_XS_KZ_B, /* 14179 */ IC_EVEX_L2_XD_KZ_B, /* 14180 */ IC_EVEX_L2_XD_KZ_B, /* 14181 */ IC_EVEX_L2_XD_KZ_B, /* 14182 */ IC_EVEX_L2_XD_KZ_B, /* 14183 */ IC_EVEX_L2_W_KZ_B, /* 14184 */ IC_EVEX_L2_W_KZ_B, /* 14185 */ IC_EVEX_L2_W_XS_KZ_B, /* 14186 */ IC_EVEX_L2_W_XS_KZ_B, /* 14187 */ IC_EVEX_L2_W_XD_KZ_B, /* 14188 */ IC_EVEX_L2_W_XD_KZ_B, /* 14189 */ IC_EVEX_L2_W_XD_KZ_B, /* 14190 */ IC_EVEX_L2_W_XD_KZ_B, /* 14191 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14192 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14193 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14194 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14195 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14196 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14197 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14198 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14199 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14200 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14201 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14202 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14203 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14204 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14205 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14206 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14207 */ IC_EVEX_L2_KZ_B, /* 14208 */ IC_EVEX_L2_KZ_B, /* 14209 */ IC_EVEX_L2_XS_KZ_B, /* 14210 */ IC_EVEX_L2_XS_KZ_B, /* 14211 */ IC_EVEX_L2_XD_KZ_B, /* 14212 */ IC_EVEX_L2_XD_KZ_B, /* 14213 */ IC_EVEX_L2_XD_KZ_B, /* 14214 */ IC_EVEX_L2_XD_KZ_B, /* 14215 */ IC_EVEX_L2_W_KZ_B, /* 14216 */ IC_EVEX_L2_W_KZ_B, /* 14217 */ IC_EVEX_L2_W_XS_KZ_B, /* 14218 */ IC_EVEX_L2_W_XS_KZ_B, /* 14219 */ IC_EVEX_L2_W_XD_KZ_B, /* 14220 */ IC_EVEX_L2_W_XD_KZ_B, /* 14221 */ IC_EVEX_L2_W_XD_KZ_B, /* 14222 */ IC_EVEX_L2_W_XD_KZ_B, /* 14223 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14224 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14225 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14226 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14227 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14228 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14229 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14230 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14231 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14232 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14233 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14234 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14235 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14236 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14237 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14238 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14239 */ IC_EVEX_L2_KZ_B, /* 14240 */ IC_EVEX_L2_KZ_B, /* 14241 */ IC_EVEX_L2_XS_KZ_B, /* 14242 */ IC_EVEX_L2_XS_KZ_B, /* 14243 */ IC_EVEX_L2_XD_KZ_B, /* 14244 */ IC_EVEX_L2_XD_KZ_B, /* 14245 */ IC_EVEX_L2_XD_KZ_B, /* 14246 */ IC_EVEX_L2_XD_KZ_B, /* 14247 */ IC_EVEX_L2_W_KZ_B, /* 14248 */ IC_EVEX_L2_W_KZ_B, /* 14249 */ IC_EVEX_L2_W_XS_KZ_B, /* 14250 */ IC_EVEX_L2_W_XS_KZ_B, /* 14251 */ IC_EVEX_L2_W_XD_KZ_B, /* 14252 */ IC_EVEX_L2_W_XD_KZ_B, /* 14253 */ IC_EVEX_L2_W_XD_KZ_B, /* 14254 */ IC_EVEX_L2_W_XD_KZ_B, /* 14255 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14256 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14257 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14258 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14259 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14260 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14261 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14262 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14263 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14264 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14265 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14266 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14267 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14268 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14269 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14270 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14271 */ IC_EVEX_L2_KZ_B, /* 14272 */ IC_EVEX_L2_KZ_B, /* 14273 */ IC_EVEX_L2_XS_KZ_B, /* 14274 */ IC_EVEX_L2_XS_KZ_B, /* 14275 */ IC_EVEX_L2_XD_KZ_B, /* 14276 */ IC_EVEX_L2_XD_KZ_B, /* 14277 */ IC_EVEX_L2_XD_KZ_B, /* 14278 */ IC_EVEX_L2_XD_KZ_B, /* 14279 */ IC_EVEX_L2_W_KZ_B, /* 14280 */ IC_EVEX_L2_W_KZ_B, /* 14281 */ IC_EVEX_L2_W_XS_KZ_B, /* 14282 */ IC_EVEX_L2_W_XS_KZ_B, /* 14283 */ IC_EVEX_L2_W_XD_KZ_B, /* 14284 */ IC_EVEX_L2_W_XD_KZ_B, /* 14285 */ IC_EVEX_L2_W_XD_KZ_B, /* 14286 */ IC_EVEX_L2_W_XD_KZ_B, /* 14287 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14288 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14289 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14290 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14291 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14292 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14293 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14294 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14295 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14296 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14297 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14298 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14299 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14300 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14301 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14302 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14303 */ IC_EVEX_L2_KZ_B, /* 14304 */ IC_EVEX_L2_KZ_B, /* 14305 */ IC_EVEX_L2_XS_KZ_B, /* 14306 */ IC_EVEX_L2_XS_KZ_B, /* 14307 */ IC_EVEX_L2_XD_KZ_B, /* 14308 */ IC_EVEX_L2_XD_KZ_B, /* 14309 */ IC_EVEX_L2_XD_KZ_B, /* 14310 */ IC_EVEX_L2_XD_KZ_B, /* 14311 */ IC_EVEX_L2_W_KZ_B, /* 14312 */ IC_EVEX_L2_W_KZ_B, /* 14313 */ IC_EVEX_L2_W_XS_KZ_B, /* 14314 */ IC_EVEX_L2_W_XS_KZ_B, /* 14315 */ IC_EVEX_L2_W_XD_KZ_B, /* 14316 */ IC_EVEX_L2_W_XD_KZ_B, /* 14317 */ IC_EVEX_L2_W_XD_KZ_B, /* 14318 */ IC_EVEX_L2_W_XD_KZ_B, /* 14319 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14320 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14321 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14322 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14323 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14324 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14325 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14326 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14327 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14328 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14329 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14330 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14331 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14332 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14333 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14334 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14335 */ IC, /* 14336 */ IC_64BIT, /* 14337 */ IC_XS, /* 14338 */ IC_64BIT_XS, /* 14339 */ IC_XD, /* 14340 */ IC_64BIT_XD, /* 14341 */ IC_XS, /* 14342 */ IC_64BIT_XS, /* 14343 */ IC, /* 14344 */ IC_64BIT_REXW, /* 14345 */ IC_XS, /* 14346 */ IC_64BIT_REXW_XS, /* 14347 */ IC_XD, /* 14348 */ IC_64BIT_REXW_XD, /* 14349 */ IC_XS, /* 14350 */ IC_64BIT_REXW_XS, /* 14351 */ IC_OPSIZE, /* 14352 */ IC_64BIT_OPSIZE, /* 14353 */ IC_XS_OPSIZE, /* 14354 */ IC_64BIT_XS_OPSIZE, /* 14355 */ IC_XD_OPSIZE, /* 14356 */ IC_64BIT_XD_OPSIZE, /* 14357 */ IC_XS_OPSIZE, /* 14358 */ IC_64BIT_XD_OPSIZE, /* 14359 */ IC_OPSIZE, /* 14360 */ IC_64BIT_REXW_OPSIZE, /* 14361 */ IC_XS_OPSIZE, /* 14362 */ IC_64BIT_REXW_XS, /* 14363 */ IC_XD_OPSIZE, /* 14364 */ IC_64BIT_REXW_XD, /* 14365 */ IC_XS_OPSIZE, /* 14366 */ IC_64BIT_REXW_XS, /* 14367 */ IC_ADSIZE, /* 14368 */ IC_64BIT_ADSIZE, /* 14369 */ IC_XS, /* 14370 */ IC_64BIT_XS, /* 14371 */ IC_XD, /* 14372 */ IC_64BIT_XD, /* 14373 */ IC_XS, /* 14374 */ IC_64BIT_XS, /* 14375 */ IC_ADSIZE, /* 14376 */ IC_64BIT_REXW_ADSIZE, /* 14377 */ IC_XS, /* 14378 */ IC_64BIT_REXW_XS, /* 14379 */ IC_XD, /* 14380 */ IC_64BIT_REXW_XD, /* 14381 */ IC_XS, /* 14382 */ IC_64BIT_REXW_XS, /* 14383 */ IC_OPSIZE_ADSIZE, /* 14384 */ IC_64BIT_OPSIZE_ADSIZE, /* 14385 */ IC_XS_OPSIZE, /* 14386 */ IC_64BIT_XS_OPSIZE, /* 14387 */ IC_XD_OPSIZE, /* 14388 */ IC_64BIT_XD_OPSIZE, /* 14389 */ IC_XS_OPSIZE, /* 14390 */ IC_64BIT_XD_OPSIZE, /* 14391 */ IC_OPSIZE_ADSIZE, /* 14392 */ IC_64BIT_REXW_OPSIZE, /* 14393 */ IC_XS_OPSIZE, /* 14394 */ IC_64BIT_REXW_XS, /* 14395 */ IC_XD_OPSIZE, /* 14396 */ IC_64BIT_REXW_XD, /* 14397 */ IC_XS_OPSIZE, /* 14398 */ IC_64BIT_REXW_XS, /* 14399 */ IC_VEX, /* 14400 */ IC_VEX, /* 14401 */ IC_VEX_XS, /* 14402 */ IC_VEX_XS, /* 14403 */ IC_VEX_XD, /* 14404 */ IC_VEX_XD, /* 14405 */ IC_VEX_XD, /* 14406 */ IC_VEX_XD, /* 14407 */ IC_VEX_W, /* 14408 */ IC_VEX_W, /* 14409 */ IC_VEX_W_XS, /* 14410 */ IC_VEX_W_XS, /* 14411 */ IC_VEX_W_XD, /* 14412 */ IC_VEX_W_XD, /* 14413 */ IC_VEX_W_XD, /* 14414 */ IC_VEX_W_XD, /* 14415 */ IC_VEX_OPSIZE, /* 14416 */ IC_VEX_OPSIZE, /* 14417 */ IC_VEX_OPSIZE, /* 14418 */ IC_VEX_OPSIZE, /* 14419 */ IC_VEX_OPSIZE, /* 14420 */ IC_VEX_OPSIZE, /* 14421 */ IC_VEX_OPSIZE, /* 14422 */ IC_VEX_OPSIZE, /* 14423 */ IC_VEX_W_OPSIZE, /* 14424 */ IC_VEX_W_OPSIZE, /* 14425 */ IC_VEX_W_OPSIZE, /* 14426 */ IC_VEX_W_OPSIZE, /* 14427 */ IC_VEX_W_OPSIZE, /* 14428 */ IC_VEX_W_OPSIZE, /* 14429 */ IC_VEX_W_OPSIZE, /* 14430 */ IC_VEX_W_OPSIZE, /* 14431 */ IC_VEX, /* 14432 */ IC_VEX, /* 14433 */ IC_VEX_XS, /* 14434 */ IC_VEX_XS, /* 14435 */ IC_VEX_XD, /* 14436 */ IC_VEX_XD, /* 14437 */ IC_VEX_XD, /* 14438 */ IC_VEX_XD, /* 14439 */ IC_VEX_W, /* 14440 */ IC_VEX_W, /* 14441 */ IC_VEX_W_XS, /* 14442 */ IC_VEX_W_XS, /* 14443 */ IC_VEX_W_XD, /* 14444 */ IC_VEX_W_XD, /* 14445 */ IC_VEX_W_XD, /* 14446 */ IC_VEX_W_XD, /* 14447 */ IC_VEX_OPSIZE, /* 14448 */ IC_VEX_OPSIZE, /* 14449 */ IC_VEX_OPSIZE, /* 14450 */ IC_VEX_OPSIZE, /* 14451 */ IC_VEX_OPSIZE, /* 14452 */ IC_VEX_OPSIZE, /* 14453 */ IC_VEX_OPSIZE, /* 14454 */ IC_VEX_OPSIZE, /* 14455 */ IC_VEX_W_OPSIZE, /* 14456 */ IC_VEX_W_OPSIZE, /* 14457 */ IC_VEX_W_OPSIZE, /* 14458 */ IC_VEX_W_OPSIZE, /* 14459 */ IC_VEX_W_OPSIZE, /* 14460 */ IC_VEX_W_OPSIZE, /* 14461 */ IC_VEX_W_OPSIZE, /* 14462 */ IC_VEX_W_OPSIZE, /* 14463 */ IC_VEX_L, /* 14464 */ IC_VEX_L, /* 14465 */ IC_VEX_L_XS, /* 14466 */ IC_VEX_L_XS, /* 14467 */ IC_VEX_L_XD, /* 14468 */ IC_VEX_L_XD, /* 14469 */ IC_VEX_L_XD, /* 14470 */ IC_VEX_L_XD, /* 14471 */ IC_VEX_L_W, /* 14472 */ IC_VEX_L_W, /* 14473 */ IC_VEX_L_W_XS, /* 14474 */ IC_VEX_L_W_XS, /* 14475 */ IC_VEX_L_W_XD, /* 14476 */ IC_VEX_L_W_XD, /* 14477 */ IC_VEX_L_W_XD, /* 14478 */ IC_VEX_L_W_XD, /* 14479 */ IC_VEX_L_OPSIZE, /* 14480 */ IC_VEX_L_OPSIZE, /* 14481 */ IC_VEX_L_OPSIZE, /* 14482 */ IC_VEX_L_OPSIZE, /* 14483 */ IC_VEX_L_OPSIZE, /* 14484 */ IC_VEX_L_OPSIZE, /* 14485 */ IC_VEX_L_OPSIZE, /* 14486 */ IC_VEX_L_OPSIZE, /* 14487 */ IC_VEX_L_W_OPSIZE, /* 14488 */ IC_VEX_L_W_OPSIZE, /* 14489 */ IC_VEX_L_W_OPSIZE, /* 14490 */ IC_VEX_L_W_OPSIZE, /* 14491 */ IC_VEX_L_W_OPSIZE, /* 14492 */ IC_VEX_L_W_OPSIZE, /* 14493 */ IC_VEX_L_W_OPSIZE, /* 14494 */ IC_VEX_L_W_OPSIZE, /* 14495 */ IC_VEX_L, /* 14496 */ IC_VEX_L, /* 14497 */ IC_VEX_L_XS, /* 14498 */ IC_VEX_L_XS, /* 14499 */ IC_VEX_L_XD, /* 14500 */ IC_VEX_L_XD, /* 14501 */ IC_VEX_L_XD, /* 14502 */ IC_VEX_L_XD, /* 14503 */ IC_VEX_L_W, /* 14504 */ IC_VEX_L_W, /* 14505 */ IC_VEX_L_W_XS, /* 14506 */ IC_VEX_L_W_XS, /* 14507 */ IC_VEX_L_W_XD, /* 14508 */ IC_VEX_L_W_XD, /* 14509 */ IC_VEX_L_W_XD, /* 14510 */ IC_VEX_L_W_XD, /* 14511 */ IC_VEX_L_OPSIZE, /* 14512 */ IC_VEX_L_OPSIZE, /* 14513 */ IC_VEX_L_OPSIZE, /* 14514 */ IC_VEX_L_OPSIZE, /* 14515 */ IC_VEX_L_OPSIZE, /* 14516 */ IC_VEX_L_OPSIZE, /* 14517 */ IC_VEX_L_OPSIZE, /* 14518 */ IC_VEX_L_OPSIZE, /* 14519 */ IC_VEX_L_W_OPSIZE, /* 14520 */ IC_VEX_L_W_OPSIZE, /* 14521 */ IC_VEX_L_W_OPSIZE, /* 14522 */ IC_VEX_L_W_OPSIZE, /* 14523 */ IC_VEX_L_W_OPSIZE, /* 14524 */ IC_VEX_L_W_OPSIZE, /* 14525 */ IC_VEX_L_W_OPSIZE, /* 14526 */ IC_VEX_L_W_OPSIZE, /* 14527 */ IC_VEX_L, /* 14528 */ IC_VEX_L, /* 14529 */ IC_VEX_L_XS, /* 14530 */ IC_VEX_L_XS, /* 14531 */ IC_VEX_L_XD, /* 14532 */ IC_VEX_L_XD, /* 14533 */ IC_VEX_L_XD, /* 14534 */ IC_VEX_L_XD, /* 14535 */ IC_VEX_L_W, /* 14536 */ IC_VEX_L_W, /* 14537 */ IC_VEX_L_W_XS, /* 14538 */ IC_VEX_L_W_XS, /* 14539 */ IC_VEX_L_W_XD, /* 14540 */ IC_VEX_L_W_XD, /* 14541 */ IC_VEX_L_W_XD, /* 14542 */ IC_VEX_L_W_XD, /* 14543 */ IC_VEX_L_OPSIZE, /* 14544 */ IC_VEX_L_OPSIZE, /* 14545 */ IC_VEX_L_OPSIZE, /* 14546 */ IC_VEX_L_OPSIZE, /* 14547 */ IC_VEX_L_OPSIZE, /* 14548 */ IC_VEX_L_OPSIZE, /* 14549 */ IC_VEX_L_OPSIZE, /* 14550 */ IC_VEX_L_OPSIZE, /* 14551 */ IC_VEX_L_W_OPSIZE, /* 14552 */ IC_VEX_L_W_OPSIZE, /* 14553 */ IC_VEX_L_W_OPSIZE, /* 14554 */ IC_VEX_L_W_OPSIZE, /* 14555 */ IC_VEX_L_W_OPSIZE, /* 14556 */ IC_VEX_L_W_OPSIZE, /* 14557 */ IC_VEX_L_W_OPSIZE, /* 14558 */ IC_VEX_L_W_OPSIZE, /* 14559 */ IC_VEX_L, /* 14560 */ IC_VEX_L, /* 14561 */ IC_VEX_L_XS, /* 14562 */ IC_VEX_L_XS, /* 14563 */ IC_VEX_L_XD, /* 14564 */ IC_VEX_L_XD, /* 14565 */ IC_VEX_L_XD, /* 14566 */ IC_VEX_L_XD, /* 14567 */ IC_VEX_L_W, /* 14568 */ IC_VEX_L_W, /* 14569 */ IC_VEX_L_W_XS, /* 14570 */ IC_VEX_L_W_XS, /* 14571 */ IC_VEX_L_W_XD, /* 14572 */ IC_VEX_L_W_XD, /* 14573 */ IC_VEX_L_W_XD, /* 14574 */ IC_VEX_L_W_XD, /* 14575 */ IC_VEX_L_OPSIZE, /* 14576 */ IC_VEX_L_OPSIZE, /* 14577 */ IC_VEX_L_OPSIZE, /* 14578 */ IC_VEX_L_OPSIZE, /* 14579 */ IC_VEX_L_OPSIZE, /* 14580 */ IC_VEX_L_OPSIZE, /* 14581 */ IC_VEX_L_OPSIZE, /* 14582 */ IC_VEX_L_OPSIZE, /* 14583 */ IC_VEX_L_W_OPSIZE, /* 14584 */ IC_VEX_L_W_OPSIZE, /* 14585 */ IC_VEX_L_W_OPSIZE, /* 14586 */ IC_VEX_L_W_OPSIZE, /* 14587 */ IC_VEX_L_W_OPSIZE, /* 14588 */ IC_VEX_L_W_OPSIZE, /* 14589 */ IC_VEX_L_W_OPSIZE, /* 14590 */ IC_VEX_L_W_OPSIZE, /* 14591 */ IC_EVEX_KZ_B, /* 14592 */ IC_EVEX_KZ_B, /* 14593 */ IC_EVEX_XS_KZ_B, /* 14594 */ IC_EVEX_XS_KZ_B, /* 14595 */ IC_EVEX_XD_KZ_B, /* 14596 */ IC_EVEX_XD_KZ_B, /* 14597 */ IC_EVEX_XD_KZ_B, /* 14598 */ IC_EVEX_XD_KZ_B, /* 14599 */ IC_EVEX_W_KZ_B, /* 14600 */ IC_EVEX_W_KZ_B, /* 14601 */ IC_EVEX_W_XS_KZ_B, /* 14602 */ IC_EVEX_W_XS_KZ_B, /* 14603 */ IC_EVEX_W_XD_KZ_B, /* 14604 */ IC_EVEX_W_XD_KZ_B, /* 14605 */ IC_EVEX_W_XD_KZ_B, /* 14606 */ IC_EVEX_W_XD_KZ_B, /* 14607 */ IC_EVEX_OPSIZE_KZ_B, /* 14608 */ IC_EVEX_OPSIZE_KZ_B, /* 14609 */ IC_EVEX_OPSIZE_KZ_B, /* 14610 */ IC_EVEX_OPSIZE_KZ_B, /* 14611 */ IC_EVEX_OPSIZE_KZ_B, /* 14612 */ IC_EVEX_OPSIZE_KZ_B, /* 14613 */ IC_EVEX_OPSIZE_KZ_B, /* 14614 */ IC_EVEX_OPSIZE_KZ_B, /* 14615 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14616 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14617 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14618 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14619 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14620 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14621 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14622 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14623 */ IC_EVEX_KZ_B, /* 14624 */ IC_EVEX_KZ_B, /* 14625 */ IC_EVEX_XS_KZ_B, /* 14626 */ IC_EVEX_XS_KZ_B, /* 14627 */ IC_EVEX_XD_KZ_B, /* 14628 */ IC_EVEX_XD_KZ_B, /* 14629 */ IC_EVEX_XD_KZ_B, /* 14630 */ IC_EVEX_XD_KZ_B, /* 14631 */ IC_EVEX_W_KZ_B, /* 14632 */ IC_EVEX_W_KZ_B, /* 14633 */ IC_EVEX_W_XS_KZ_B, /* 14634 */ IC_EVEX_W_XS_KZ_B, /* 14635 */ IC_EVEX_W_XD_KZ_B, /* 14636 */ IC_EVEX_W_XD_KZ_B, /* 14637 */ IC_EVEX_W_XD_KZ_B, /* 14638 */ IC_EVEX_W_XD_KZ_B, /* 14639 */ IC_EVEX_OPSIZE_KZ_B, /* 14640 */ IC_EVEX_OPSIZE_KZ_B, /* 14641 */ IC_EVEX_OPSIZE_KZ_B, /* 14642 */ IC_EVEX_OPSIZE_KZ_B, /* 14643 */ IC_EVEX_OPSIZE_KZ_B, /* 14644 */ IC_EVEX_OPSIZE_KZ_B, /* 14645 */ IC_EVEX_OPSIZE_KZ_B, /* 14646 */ IC_EVEX_OPSIZE_KZ_B, /* 14647 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14648 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14649 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14650 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14651 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14652 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14653 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14654 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14655 */ IC_EVEX_KZ_B, /* 14656 */ IC_EVEX_KZ_B, /* 14657 */ IC_EVEX_XS_KZ_B, /* 14658 */ IC_EVEX_XS_KZ_B, /* 14659 */ IC_EVEX_XD_KZ_B, /* 14660 */ IC_EVEX_XD_KZ_B, /* 14661 */ IC_EVEX_XD_KZ_B, /* 14662 */ IC_EVEX_XD_KZ_B, /* 14663 */ IC_EVEX_W_KZ_B, /* 14664 */ IC_EVEX_W_KZ_B, /* 14665 */ IC_EVEX_W_XS_KZ_B, /* 14666 */ IC_EVEX_W_XS_KZ_B, /* 14667 */ IC_EVEX_W_XD_KZ_B, /* 14668 */ IC_EVEX_W_XD_KZ_B, /* 14669 */ IC_EVEX_W_XD_KZ_B, /* 14670 */ IC_EVEX_W_XD_KZ_B, /* 14671 */ IC_EVEX_OPSIZE_KZ_B, /* 14672 */ IC_EVEX_OPSIZE_KZ_B, /* 14673 */ IC_EVEX_OPSIZE_KZ_B, /* 14674 */ IC_EVEX_OPSIZE_KZ_B, /* 14675 */ IC_EVEX_OPSIZE_KZ_B, /* 14676 */ IC_EVEX_OPSIZE_KZ_B, /* 14677 */ IC_EVEX_OPSIZE_KZ_B, /* 14678 */ IC_EVEX_OPSIZE_KZ_B, /* 14679 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14680 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14681 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14682 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14683 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14684 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14685 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14686 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14687 */ IC_EVEX_KZ_B, /* 14688 */ IC_EVEX_KZ_B, /* 14689 */ IC_EVEX_XS_KZ_B, /* 14690 */ IC_EVEX_XS_KZ_B, /* 14691 */ IC_EVEX_XD_KZ_B, /* 14692 */ IC_EVEX_XD_KZ_B, /* 14693 */ IC_EVEX_XD_KZ_B, /* 14694 */ IC_EVEX_XD_KZ_B, /* 14695 */ IC_EVEX_W_KZ_B, /* 14696 */ IC_EVEX_W_KZ_B, /* 14697 */ IC_EVEX_W_XS_KZ_B, /* 14698 */ IC_EVEX_W_XS_KZ_B, /* 14699 */ IC_EVEX_W_XD_KZ_B, /* 14700 */ IC_EVEX_W_XD_KZ_B, /* 14701 */ IC_EVEX_W_XD_KZ_B, /* 14702 */ IC_EVEX_W_XD_KZ_B, /* 14703 */ IC_EVEX_OPSIZE_KZ_B, /* 14704 */ IC_EVEX_OPSIZE_KZ_B, /* 14705 */ IC_EVEX_OPSIZE_KZ_B, /* 14706 */ IC_EVEX_OPSIZE_KZ_B, /* 14707 */ IC_EVEX_OPSIZE_KZ_B, /* 14708 */ IC_EVEX_OPSIZE_KZ_B, /* 14709 */ IC_EVEX_OPSIZE_KZ_B, /* 14710 */ IC_EVEX_OPSIZE_KZ_B, /* 14711 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14712 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14713 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14714 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14715 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14716 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14717 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14718 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14719 */ IC_EVEX_KZ_B, /* 14720 */ IC_EVEX_KZ_B, /* 14721 */ IC_EVEX_XS_KZ_B, /* 14722 */ IC_EVEX_XS_KZ_B, /* 14723 */ IC_EVEX_XD_KZ_B, /* 14724 */ IC_EVEX_XD_KZ_B, /* 14725 */ IC_EVEX_XD_KZ_B, /* 14726 */ IC_EVEX_XD_KZ_B, /* 14727 */ IC_EVEX_W_KZ_B, /* 14728 */ IC_EVEX_W_KZ_B, /* 14729 */ IC_EVEX_W_XS_KZ_B, /* 14730 */ IC_EVEX_W_XS_KZ_B, /* 14731 */ IC_EVEX_W_XD_KZ_B, /* 14732 */ IC_EVEX_W_XD_KZ_B, /* 14733 */ IC_EVEX_W_XD_KZ_B, /* 14734 */ IC_EVEX_W_XD_KZ_B, /* 14735 */ IC_EVEX_OPSIZE_KZ_B, /* 14736 */ IC_EVEX_OPSIZE_KZ_B, /* 14737 */ IC_EVEX_OPSIZE_KZ_B, /* 14738 */ IC_EVEX_OPSIZE_KZ_B, /* 14739 */ IC_EVEX_OPSIZE_KZ_B, /* 14740 */ IC_EVEX_OPSIZE_KZ_B, /* 14741 */ IC_EVEX_OPSIZE_KZ_B, /* 14742 */ IC_EVEX_OPSIZE_KZ_B, /* 14743 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14744 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14745 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14746 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14747 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14748 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14749 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14750 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14751 */ IC_EVEX_KZ_B, /* 14752 */ IC_EVEX_KZ_B, /* 14753 */ IC_EVEX_XS_KZ_B, /* 14754 */ IC_EVEX_XS_KZ_B, /* 14755 */ IC_EVEX_XD_KZ_B, /* 14756 */ IC_EVEX_XD_KZ_B, /* 14757 */ IC_EVEX_XD_KZ_B, /* 14758 */ IC_EVEX_XD_KZ_B, /* 14759 */ IC_EVEX_W_KZ_B, /* 14760 */ IC_EVEX_W_KZ_B, /* 14761 */ IC_EVEX_W_XS_KZ_B, /* 14762 */ IC_EVEX_W_XS_KZ_B, /* 14763 */ IC_EVEX_W_XD_KZ_B, /* 14764 */ IC_EVEX_W_XD_KZ_B, /* 14765 */ IC_EVEX_W_XD_KZ_B, /* 14766 */ IC_EVEX_W_XD_KZ_B, /* 14767 */ IC_EVEX_OPSIZE_KZ_B, /* 14768 */ IC_EVEX_OPSIZE_KZ_B, /* 14769 */ IC_EVEX_OPSIZE_KZ_B, /* 14770 */ IC_EVEX_OPSIZE_KZ_B, /* 14771 */ IC_EVEX_OPSIZE_KZ_B, /* 14772 */ IC_EVEX_OPSIZE_KZ_B, /* 14773 */ IC_EVEX_OPSIZE_KZ_B, /* 14774 */ IC_EVEX_OPSIZE_KZ_B, /* 14775 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14776 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14777 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14778 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14779 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14780 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14781 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14782 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14783 */ IC_EVEX_KZ_B, /* 14784 */ IC_EVEX_KZ_B, /* 14785 */ IC_EVEX_XS_KZ_B, /* 14786 */ IC_EVEX_XS_KZ_B, /* 14787 */ IC_EVEX_XD_KZ_B, /* 14788 */ IC_EVEX_XD_KZ_B, /* 14789 */ IC_EVEX_XD_KZ_B, /* 14790 */ IC_EVEX_XD_KZ_B, /* 14791 */ IC_EVEX_W_KZ_B, /* 14792 */ IC_EVEX_W_KZ_B, /* 14793 */ IC_EVEX_W_XS_KZ_B, /* 14794 */ IC_EVEX_W_XS_KZ_B, /* 14795 */ IC_EVEX_W_XD_KZ_B, /* 14796 */ IC_EVEX_W_XD_KZ_B, /* 14797 */ IC_EVEX_W_XD_KZ_B, /* 14798 */ IC_EVEX_W_XD_KZ_B, /* 14799 */ IC_EVEX_OPSIZE_KZ_B, /* 14800 */ IC_EVEX_OPSIZE_KZ_B, /* 14801 */ IC_EVEX_OPSIZE_KZ_B, /* 14802 */ IC_EVEX_OPSIZE_KZ_B, /* 14803 */ IC_EVEX_OPSIZE_KZ_B, /* 14804 */ IC_EVEX_OPSIZE_KZ_B, /* 14805 */ IC_EVEX_OPSIZE_KZ_B, /* 14806 */ IC_EVEX_OPSIZE_KZ_B, /* 14807 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14808 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14809 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14810 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14811 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14812 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14813 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14814 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14815 */ IC_EVEX_KZ_B, /* 14816 */ IC_EVEX_KZ_B, /* 14817 */ IC_EVEX_XS_KZ_B, /* 14818 */ IC_EVEX_XS_KZ_B, /* 14819 */ IC_EVEX_XD_KZ_B, /* 14820 */ IC_EVEX_XD_KZ_B, /* 14821 */ IC_EVEX_XD_KZ_B, /* 14822 */ IC_EVEX_XD_KZ_B, /* 14823 */ IC_EVEX_W_KZ_B, /* 14824 */ IC_EVEX_W_KZ_B, /* 14825 */ IC_EVEX_W_XS_KZ_B, /* 14826 */ IC_EVEX_W_XS_KZ_B, /* 14827 */ IC_EVEX_W_XD_KZ_B, /* 14828 */ IC_EVEX_W_XD_KZ_B, /* 14829 */ IC_EVEX_W_XD_KZ_B, /* 14830 */ IC_EVEX_W_XD_KZ_B, /* 14831 */ IC_EVEX_OPSIZE_KZ_B, /* 14832 */ IC_EVEX_OPSIZE_KZ_B, /* 14833 */ IC_EVEX_OPSIZE_KZ_B, /* 14834 */ IC_EVEX_OPSIZE_KZ_B, /* 14835 */ IC_EVEX_OPSIZE_KZ_B, /* 14836 */ IC_EVEX_OPSIZE_KZ_B, /* 14837 */ IC_EVEX_OPSIZE_KZ_B, /* 14838 */ IC_EVEX_OPSIZE_KZ_B, /* 14839 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14840 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14841 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14842 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14843 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14844 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14845 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14846 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14847 */ IC, /* 14848 */ IC_64BIT, /* 14849 */ IC_XS, /* 14850 */ IC_64BIT_XS, /* 14851 */ IC_XD, /* 14852 */ IC_64BIT_XD, /* 14853 */ IC_XS, /* 14854 */ IC_64BIT_XS, /* 14855 */ IC, /* 14856 */ IC_64BIT_REXW, /* 14857 */ IC_XS, /* 14858 */ IC_64BIT_REXW_XS, /* 14859 */ IC_XD, /* 14860 */ IC_64BIT_REXW_XD, /* 14861 */ IC_XS, /* 14862 */ IC_64BIT_REXW_XS, /* 14863 */ IC_OPSIZE, /* 14864 */ IC_64BIT_OPSIZE, /* 14865 */ IC_XS_OPSIZE, /* 14866 */ IC_64BIT_XS_OPSIZE, /* 14867 */ IC_XD_OPSIZE, /* 14868 */ IC_64BIT_XD_OPSIZE, /* 14869 */ IC_XS_OPSIZE, /* 14870 */ IC_64BIT_XD_OPSIZE, /* 14871 */ IC_OPSIZE, /* 14872 */ IC_64BIT_REXW_OPSIZE, /* 14873 */ IC_XS_OPSIZE, /* 14874 */ IC_64BIT_REXW_XS, /* 14875 */ IC_XD_OPSIZE, /* 14876 */ IC_64BIT_REXW_XD, /* 14877 */ IC_XS_OPSIZE, /* 14878 */ IC_64BIT_REXW_XS, /* 14879 */ IC_ADSIZE, /* 14880 */ IC_64BIT_ADSIZE, /* 14881 */ IC_XS, /* 14882 */ IC_64BIT_XS, /* 14883 */ IC_XD, /* 14884 */ IC_64BIT_XD, /* 14885 */ IC_XS, /* 14886 */ IC_64BIT_XS, /* 14887 */ IC_ADSIZE, /* 14888 */ IC_64BIT_REXW_ADSIZE, /* 14889 */ IC_XS, /* 14890 */ IC_64BIT_REXW_XS, /* 14891 */ IC_XD, /* 14892 */ IC_64BIT_REXW_XD, /* 14893 */ IC_XS, /* 14894 */ IC_64BIT_REXW_XS, /* 14895 */ IC_OPSIZE_ADSIZE, /* 14896 */ IC_64BIT_OPSIZE_ADSIZE, /* 14897 */ IC_XS_OPSIZE, /* 14898 */ IC_64BIT_XS_OPSIZE, /* 14899 */ IC_XD_OPSIZE, /* 14900 */ IC_64BIT_XD_OPSIZE, /* 14901 */ IC_XS_OPSIZE, /* 14902 */ IC_64BIT_XD_OPSIZE, /* 14903 */ IC_OPSIZE_ADSIZE, /* 14904 */ IC_64BIT_REXW_OPSIZE, /* 14905 */ IC_XS_OPSIZE, /* 14906 */ IC_64BIT_REXW_XS, /* 14907 */ IC_XD_OPSIZE, /* 14908 */ IC_64BIT_REXW_XD, /* 14909 */ IC_XS_OPSIZE, /* 14910 */ IC_64BIT_REXW_XS, /* 14911 */ IC_VEX, /* 14912 */ IC_VEX, /* 14913 */ IC_VEX_XS, /* 14914 */ IC_VEX_XS, /* 14915 */ IC_VEX_XD, /* 14916 */ IC_VEX_XD, /* 14917 */ IC_VEX_XD, /* 14918 */ IC_VEX_XD, /* 14919 */ IC_VEX_W, /* 14920 */ IC_VEX_W, /* 14921 */ IC_VEX_W_XS, /* 14922 */ IC_VEX_W_XS, /* 14923 */ IC_VEX_W_XD, /* 14924 */ IC_VEX_W_XD, /* 14925 */ IC_VEX_W_XD, /* 14926 */ IC_VEX_W_XD, /* 14927 */ IC_VEX_OPSIZE, /* 14928 */ IC_VEX_OPSIZE, /* 14929 */ IC_VEX_OPSIZE, /* 14930 */ IC_VEX_OPSIZE, /* 14931 */ IC_VEX_OPSIZE, /* 14932 */ IC_VEX_OPSIZE, /* 14933 */ IC_VEX_OPSIZE, /* 14934 */ IC_VEX_OPSIZE, /* 14935 */ IC_VEX_W_OPSIZE, /* 14936 */ IC_VEX_W_OPSIZE, /* 14937 */ IC_VEX_W_OPSIZE, /* 14938 */ IC_VEX_W_OPSIZE, /* 14939 */ IC_VEX_W_OPSIZE, /* 14940 */ IC_VEX_W_OPSIZE, /* 14941 */ IC_VEX_W_OPSIZE, /* 14942 */ IC_VEX_W_OPSIZE, /* 14943 */ IC_VEX, /* 14944 */ IC_VEX, /* 14945 */ IC_VEX_XS, /* 14946 */ IC_VEX_XS, /* 14947 */ IC_VEX_XD, /* 14948 */ IC_VEX_XD, /* 14949 */ IC_VEX_XD, /* 14950 */ IC_VEX_XD, /* 14951 */ IC_VEX_W, /* 14952 */ IC_VEX_W, /* 14953 */ IC_VEX_W_XS, /* 14954 */ IC_VEX_W_XS, /* 14955 */ IC_VEX_W_XD, /* 14956 */ IC_VEX_W_XD, /* 14957 */ IC_VEX_W_XD, /* 14958 */ IC_VEX_W_XD, /* 14959 */ IC_VEX_OPSIZE, /* 14960 */ IC_VEX_OPSIZE, /* 14961 */ IC_VEX_OPSIZE, /* 14962 */ IC_VEX_OPSIZE, /* 14963 */ IC_VEX_OPSIZE, /* 14964 */ IC_VEX_OPSIZE, /* 14965 */ IC_VEX_OPSIZE, /* 14966 */ IC_VEX_OPSIZE, /* 14967 */ IC_VEX_W_OPSIZE, /* 14968 */ IC_VEX_W_OPSIZE, /* 14969 */ IC_VEX_W_OPSIZE, /* 14970 */ IC_VEX_W_OPSIZE, /* 14971 */ IC_VEX_W_OPSIZE, /* 14972 */ IC_VEX_W_OPSIZE, /* 14973 */ IC_VEX_W_OPSIZE, /* 14974 */ IC_VEX_W_OPSIZE, /* 14975 */ IC_VEX_L, /* 14976 */ IC_VEX_L, /* 14977 */ IC_VEX_L_XS, /* 14978 */ IC_VEX_L_XS, /* 14979 */ IC_VEX_L_XD, /* 14980 */ IC_VEX_L_XD, /* 14981 */ IC_VEX_L_XD, /* 14982 */ IC_VEX_L_XD, /* 14983 */ IC_VEX_L_W, /* 14984 */ IC_VEX_L_W, /* 14985 */ IC_VEX_L_W_XS, /* 14986 */ IC_VEX_L_W_XS, /* 14987 */ IC_VEX_L_W_XD, /* 14988 */ IC_VEX_L_W_XD, /* 14989 */ IC_VEX_L_W_XD, /* 14990 */ IC_VEX_L_W_XD, /* 14991 */ IC_VEX_L_OPSIZE, /* 14992 */ IC_VEX_L_OPSIZE, /* 14993 */ IC_VEX_L_OPSIZE, /* 14994 */ IC_VEX_L_OPSIZE, /* 14995 */ IC_VEX_L_OPSIZE, /* 14996 */ IC_VEX_L_OPSIZE, /* 14997 */ IC_VEX_L_OPSIZE, /* 14998 */ IC_VEX_L_OPSIZE, /* 14999 */ IC_VEX_L_W_OPSIZE, /* 15000 */ IC_VEX_L_W_OPSIZE, /* 15001 */ IC_VEX_L_W_OPSIZE, /* 15002 */ IC_VEX_L_W_OPSIZE, /* 15003 */ IC_VEX_L_W_OPSIZE, /* 15004 */ IC_VEX_L_W_OPSIZE, /* 15005 */ IC_VEX_L_W_OPSIZE, /* 15006 */ IC_VEX_L_W_OPSIZE, /* 15007 */ IC_VEX_L, /* 15008 */ IC_VEX_L, /* 15009 */ IC_VEX_L_XS, /* 15010 */ IC_VEX_L_XS, /* 15011 */ IC_VEX_L_XD, /* 15012 */ IC_VEX_L_XD, /* 15013 */ IC_VEX_L_XD, /* 15014 */ IC_VEX_L_XD, /* 15015 */ IC_VEX_L_W, /* 15016 */ IC_VEX_L_W, /* 15017 */ IC_VEX_L_W_XS, /* 15018 */ IC_VEX_L_W_XS, /* 15019 */ IC_VEX_L_W_XD, /* 15020 */ IC_VEX_L_W_XD, /* 15021 */ IC_VEX_L_W_XD, /* 15022 */ IC_VEX_L_W_XD, /* 15023 */ IC_VEX_L_OPSIZE, /* 15024 */ IC_VEX_L_OPSIZE, /* 15025 */ IC_VEX_L_OPSIZE, /* 15026 */ IC_VEX_L_OPSIZE, /* 15027 */ IC_VEX_L_OPSIZE, /* 15028 */ IC_VEX_L_OPSIZE, /* 15029 */ IC_VEX_L_OPSIZE, /* 15030 */ IC_VEX_L_OPSIZE, /* 15031 */ IC_VEX_L_W_OPSIZE, /* 15032 */ IC_VEX_L_W_OPSIZE, /* 15033 */ IC_VEX_L_W_OPSIZE, /* 15034 */ IC_VEX_L_W_OPSIZE, /* 15035 */ IC_VEX_L_W_OPSIZE, /* 15036 */ IC_VEX_L_W_OPSIZE, /* 15037 */ IC_VEX_L_W_OPSIZE, /* 15038 */ IC_VEX_L_W_OPSIZE, /* 15039 */ IC_VEX_L, /* 15040 */ IC_VEX_L, /* 15041 */ IC_VEX_L_XS, /* 15042 */ IC_VEX_L_XS, /* 15043 */ IC_VEX_L_XD, /* 15044 */ IC_VEX_L_XD, /* 15045 */ IC_VEX_L_XD, /* 15046 */ IC_VEX_L_XD, /* 15047 */ IC_VEX_L_W, /* 15048 */ IC_VEX_L_W, /* 15049 */ IC_VEX_L_W_XS, /* 15050 */ IC_VEX_L_W_XS, /* 15051 */ IC_VEX_L_W_XD, /* 15052 */ IC_VEX_L_W_XD, /* 15053 */ IC_VEX_L_W_XD, /* 15054 */ IC_VEX_L_W_XD, /* 15055 */ IC_VEX_L_OPSIZE, /* 15056 */ IC_VEX_L_OPSIZE, /* 15057 */ IC_VEX_L_OPSIZE, /* 15058 */ IC_VEX_L_OPSIZE, /* 15059 */ IC_VEX_L_OPSIZE, /* 15060 */ IC_VEX_L_OPSIZE, /* 15061 */ IC_VEX_L_OPSIZE, /* 15062 */ IC_VEX_L_OPSIZE, /* 15063 */ IC_VEX_L_W_OPSIZE, /* 15064 */ IC_VEX_L_W_OPSIZE, /* 15065 */ IC_VEX_L_W_OPSIZE, /* 15066 */ IC_VEX_L_W_OPSIZE, /* 15067 */ IC_VEX_L_W_OPSIZE, /* 15068 */ IC_VEX_L_W_OPSIZE, /* 15069 */ IC_VEX_L_W_OPSIZE, /* 15070 */ IC_VEX_L_W_OPSIZE, /* 15071 */ IC_VEX_L, /* 15072 */ IC_VEX_L, /* 15073 */ IC_VEX_L_XS, /* 15074 */ IC_VEX_L_XS, /* 15075 */ IC_VEX_L_XD, /* 15076 */ IC_VEX_L_XD, /* 15077 */ IC_VEX_L_XD, /* 15078 */ IC_VEX_L_XD, /* 15079 */ IC_VEX_L_W, /* 15080 */ IC_VEX_L_W, /* 15081 */ IC_VEX_L_W_XS, /* 15082 */ IC_VEX_L_W_XS, /* 15083 */ IC_VEX_L_W_XD, /* 15084 */ IC_VEX_L_W_XD, /* 15085 */ IC_VEX_L_W_XD, /* 15086 */ IC_VEX_L_W_XD, /* 15087 */ IC_VEX_L_OPSIZE, /* 15088 */ IC_VEX_L_OPSIZE, /* 15089 */ IC_VEX_L_OPSIZE, /* 15090 */ IC_VEX_L_OPSIZE, /* 15091 */ IC_VEX_L_OPSIZE, /* 15092 */ IC_VEX_L_OPSIZE, /* 15093 */ IC_VEX_L_OPSIZE, /* 15094 */ IC_VEX_L_OPSIZE, /* 15095 */ IC_VEX_L_W_OPSIZE, /* 15096 */ IC_VEX_L_W_OPSIZE, /* 15097 */ IC_VEX_L_W_OPSIZE, /* 15098 */ IC_VEX_L_W_OPSIZE, /* 15099 */ IC_VEX_L_W_OPSIZE, /* 15100 */ IC_VEX_L_W_OPSIZE, /* 15101 */ IC_VEX_L_W_OPSIZE, /* 15102 */ IC_VEX_L_W_OPSIZE, /* 15103 */ IC_EVEX_L_KZ_B, /* 15104 */ IC_EVEX_L_KZ_B, /* 15105 */ IC_EVEX_L_XS_KZ_B, /* 15106 */ IC_EVEX_L_XS_KZ_B, /* 15107 */ IC_EVEX_L_XD_KZ_B, /* 15108 */ IC_EVEX_L_XD_KZ_B, /* 15109 */ IC_EVEX_L_XD_KZ_B, /* 15110 */ IC_EVEX_L_XD_KZ_B, /* 15111 */ IC_EVEX_L_W_KZ_B, /* 15112 */ IC_EVEX_L_W_KZ_B, /* 15113 */ IC_EVEX_L_W_XS_KZ_B, /* 15114 */ IC_EVEX_L_W_XS_KZ_B, /* 15115 */ IC_EVEX_L_W_XD_KZ_B, /* 15116 */ IC_EVEX_L_W_XD_KZ_B, /* 15117 */ IC_EVEX_L_W_XD_KZ_B, /* 15118 */ IC_EVEX_L_W_XD_KZ_B, /* 15119 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15120 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15121 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15122 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15123 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15124 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15125 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15126 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15127 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15128 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15129 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15130 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15131 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15132 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15133 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15134 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15135 */ IC_EVEX_L_KZ_B, /* 15136 */ IC_EVEX_L_KZ_B, /* 15137 */ IC_EVEX_L_XS_KZ_B, /* 15138 */ IC_EVEX_L_XS_KZ_B, /* 15139 */ IC_EVEX_L_XD_KZ_B, /* 15140 */ IC_EVEX_L_XD_KZ_B, /* 15141 */ IC_EVEX_L_XD_KZ_B, /* 15142 */ IC_EVEX_L_XD_KZ_B, /* 15143 */ IC_EVEX_L_W_KZ_B, /* 15144 */ IC_EVEX_L_W_KZ_B, /* 15145 */ IC_EVEX_L_W_XS_KZ_B, /* 15146 */ IC_EVEX_L_W_XS_KZ_B, /* 15147 */ IC_EVEX_L_W_XD_KZ_B, /* 15148 */ IC_EVEX_L_W_XD_KZ_B, /* 15149 */ IC_EVEX_L_W_XD_KZ_B, /* 15150 */ IC_EVEX_L_W_XD_KZ_B, /* 15151 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15152 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15153 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15154 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15155 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15156 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15157 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15158 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15159 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15160 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15161 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15162 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15163 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15164 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15165 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15166 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15167 */ IC_EVEX_L_KZ_B, /* 15168 */ IC_EVEX_L_KZ_B, /* 15169 */ IC_EVEX_L_XS_KZ_B, /* 15170 */ IC_EVEX_L_XS_KZ_B, /* 15171 */ IC_EVEX_L_XD_KZ_B, /* 15172 */ IC_EVEX_L_XD_KZ_B, /* 15173 */ IC_EVEX_L_XD_KZ_B, /* 15174 */ IC_EVEX_L_XD_KZ_B, /* 15175 */ IC_EVEX_L_W_KZ_B, /* 15176 */ IC_EVEX_L_W_KZ_B, /* 15177 */ IC_EVEX_L_W_XS_KZ_B, /* 15178 */ IC_EVEX_L_W_XS_KZ_B, /* 15179 */ IC_EVEX_L_W_XD_KZ_B, /* 15180 */ IC_EVEX_L_W_XD_KZ_B, /* 15181 */ IC_EVEX_L_W_XD_KZ_B, /* 15182 */ IC_EVEX_L_W_XD_KZ_B, /* 15183 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15184 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15185 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15186 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15187 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15188 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15189 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15190 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15191 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15192 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15193 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15194 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15195 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15196 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15197 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15198 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15199 */ IC_EVEX_L_KZ_B, /* 15200 */ IC_EVEX_L_KZ_B, /* 15201 */ IC_EVEX_L_XS_KZ_B, /* 15202 */ IC_EVEX_L_XS_KZ_B, /* 15203 */ IC_EVEX_L_XD_KZ_B, /* 15204 */ IC_EVEX_L_XD_KZ_B, /* 15205 */ IC_EVEX_L_XD_KZ_B, /* 15206 */ IC_EVEX_L_XD_KZ_B, /* 15207 */ IC_EVEX_L_W_KZ_B, /* 15208 */ IC_EVEX_L_W_KZ_B, /* 15209 */ IC_EVEX_L_W_XS_KZ_B, /* 15210 */ IC_EVEX_L_W_XS_KZ_B, /* 15211 */ IC_EVEX_L_W_XD_KZ_B, /* 15212 */ IC_EVEX_L_W_XD_KZ_B, /* 15213 */ IC_EVEX_L_W_XD_KZ_B, /* 15214 */ IC_EVEX_L_W_XD_KZ_B, /* 15215 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15216 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15217 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15218 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15219 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15220 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15221 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15222 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15223 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15224 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15225 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15226 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15227 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15228 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15229 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15230 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15231 */ IC_EVEX_L_KZ_B, /* 15232 */ IC_EVEX_L_KZ_B, /* 15233 */ IC_EVEX_L_XS_KZ_B, /* 15234 */ IC_EVEX_L_XS_KZ_B, /* 15235 */ IC_EVEX_L_XD_KZ_B, /* 15236 */ IC_EVEX_L_XD_KZ_B, /* 15237 */ IC_EVEX_L_XD_KZ_B, /* 15238 */ IC_EVEX_L_XD_KZ_B, /* 15239 */ IC_EVEX_L_W_KZ_B, /* 15240 */ IC_EVEX_L_W_KZ_B, /* 15241 */ IC_EVEX_L_W_XS_KZ_B, /* 15242 */ IC_EVEX_L_W_XS_KZ_B, /* 15243 */ IC_EVEX_L_W_XD_KZ_B, /* 15244 */ IC_EVEX_L_W_XD_KZ_B, /* 15245 */ IC_EVEX_L_W_XD_KZ_B, /* 15246 */ IC_EVEX_L_W_XD_KZ_B, /* 15247 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15248 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15249 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15250 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15251 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15252 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15253 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15254 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15255 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15256 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15257 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15258 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15259 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15260 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15261 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15262 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15263 */ IC_EVEX_L_KZ_B, /* 15264 */ IC_EVEX_L_KZ_B, /* 15265 */ IC_EVEX_L_XS_KZ_B, /* 15266 */ IC_EVEX_L_XS_KZ_B, /* 15267 */ IC_EVEX_L_XD_KZ_B, /* 15268 */ IC_EVEX_L_XD_KZ_B, /* 15269 */ IC_EVEX_L_XD_KZ_B, /* 15270 */ IC_EVEX_L_XD_KZ_B, /* 15271 */ IC_EVEX_L_W_KZ_B, /* 15272 */ IC_EVEX_L_W_KZ_B, /* 15273 */ IC_EVEX_L_W_XS_KZ_B, /* 15274 */ IC_EVEX_L_W_XS_KZ_B, /* 15275 */ IC_EVEX_L_W_XD_KZ_B, /* 15276 */ IC_EVEX_L_W_XD_KZ_B, /* 15277 */ IC_EVEX_L_W_XD_KZ_B, /* 15278 */ IC_EVEX_L_W_XD_KZ_B, /* 15279 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15280 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15281 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15282 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15283 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15284 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15285 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15286 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15287 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15288 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15289 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15290 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15291 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15292 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15293 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15294 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15295 */ IC_EVEX_L_KZ_B, /* 15296 */ IC_EVEX_L_KZ_B, /* 15297 */ IC_EVEX_L_XS_KZ_B, /* 15298 */ IC_EVEX_L_XS_KZ_B, /* 15299 */ IC_EVEX_L_XD_KZ_B, /* 15300 */ IC_EVEX_L_XD_KZ_B, /* 15301 */ IC_EVEX_L_XD_KZ_B, /* 15302 */ IC_EVEX_L_XD_KZ_B, /* 15303 */ IC_EVEX_L_W_KZ_B, /* 15304 */ IC_EVEX_L_W_KZ_B, /* 15305 */ IC_EVEX_L_W_XS_KZ_B, /* 15306 */ IC_EVEX_L_W_XS_KZ_B, /* 15307 */ IC_EVEX_L_W_XD_KZ_B, /* 15308 */ IC_EVEX_L_W_XD_KZ_B, /* 15309 */ IC_EVEX_L_W_XD_KZ_B, /* 15310 */ IC_EVEX_L_W_XD_KZ_B, /* 15311 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15312 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15313 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15314 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15315 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15316 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15317 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15318 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15319 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15320 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15321 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15322 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15323 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15324 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15325 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15326 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15327 */ IC_EVEX_L_KZ_B, /* 15328 */ IC_EVEX_L_KZ_B, /* 15329 */ IC_EVEX_L_XS_KZ_B, /* 15330 */ IC_EVEX_L_XS_KZ_B, /* 15331 */ IC_EVEX_L_XD_KZ_B, /* 15332 */ IC_EVEX_L_XD_KZ_B, /* 15333 */ IC_EVEX_L_XD_KZ_B, /* 15334 */ IC_EVEX_L_XD_KZ_B, /* 15335 */ IC_EVEX_L_W_KZ_B, /* 15336 */ IC_EVEX_L_W_KZ_B, /* 15337 */ IC_EVEX_L_W_XS_KZ_B, /* 15338 */ IC_EVEX_L_W_XS_KZ_B, /* 15339 */ IC_EVEX_L_W_XD_KZ_B, /* 15340 */ IC_EVEX_L_W_XD_KZ_B, /* 15341 */ IC_EVEX_L_W_XD_KZ_B, /* 15342 */ IC_EVEX_L_W_XD_KZ_B, /* 15343 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15344 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15345 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15346 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15347 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15348 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15349 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15350 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15351 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15352 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15353 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15354 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15355 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15356 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15357 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15358 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15359 */ IC, /* 15360 */ IC_64BIT, /* 15361 */ IC_XS, /* 15362 */ IC_64BIT_XS, /* 15363 */ IC_XD, /* 15364 */ IC_64BIT_XD, /* 15365 */ IC_XS, /* 15366 */ IC_64BIT_XS, /* 15367 */ IC, /* 15368 */ IC_64BIT_REXW, /* 15369 */ IC_XS, /* 15370 */ IC_64BIT_REXW_XS, /* 15371 */ IC_XD, /* 15372 */ IC_64BIT_REXW_XD, /* 15373 */ IC_XS, /* 15374 */ IC_64BIT_REXW_XS, /* 15375 */ IC_OPSIZE, /* 15376 */ IC_64BIT_OPSIZE, /* 15377 */ IC_XS_OPSIZE, /* 15378 */ IC_64BIT_XS_OPSIZE, /* 15379 */ IC_XD_OPSIZE, /* 15380 */ IC_64BIT_XD_OPSIZE, /* 15381 */ IC_XS_OPSIZE, /* 15382 */ IC_64BIT_XD_OPSIZE, /* 15383 */ IC_OPSIZE, /* 15384 */ IC_64BIT_REXW_OPSIZE, /* 15385 */ IC_XS_OPSIZE, /* 15386 */ IC_64BIT_REXW_XS, /* 15387 */ IC_XD_OPSIZE, /* 15388 */ IC_64BIT_REXW_XD, /* 15389 */ IC_XS_OPSIZE, /* 15390 */ IC_64BIT_REXW_XS, /* 15391 */ IC_ADSIZE, /* 15392 */ IC_64BIT_ADSIZE, /* 15393 */ IC_XS, /* 15394 */ IC_64BIT_XS, /* 15395 */ IC_XD, /* 15396 */ IC_64BIT_XD, /* 15397 */ IC_XS, /* 15398 */ IC_64BIT_XS, /* 15399 */ IC_ADSIZE, /* 15400 */ IC_64BIT_REXW_ADSIZE, /* 15401 */ IC_XS, /* 15402 */ IC_64BIT_REXW_XS, /* 15403 */ IC_XD, /* 15404 */ IC_64BIT_REXW_XD, /* 15405 */ IC_XS, /* 15406 */ IC_64BIT_REXW_XS, /* 15407 */ IC_OPSIZE_ADSIZE, /* 15408 */ IC_64BIT_OPSIZE_ADSIZE, /* 15409 */ IC_XS_OPSIZE, /* 15410 */ IC_64BIT_XS_OPSIZE, /* 15411 */ IC_XD_OPSIZE, /* 15412 */ IC_64BIT_XD_OPSIZE, /* 15413 */ IC_XS_OPSIZE, /* 15414 */ IC_64BIT_XD_OPSIZE, /* 15415 */ IC_OPSIZE_ADSIZE, /* 15416 */ IC_64BIT_REXW_OPSIZE, /* 15417 */ IC_XS_OPSIZE, /* 15418 */ IC_64BIT_REXW_XS, /* 15419 */ IC_XD_OPSIZE, /* 15420 */ IC_64BIT_REXW_XD, /* 15421 */ IC_XS_OPSIZE, /* 15422 */ IC_64BIT_REXW_XS, /* 15423 */ IC_VEX, /* 15424 */ IC_VEX, /* 15425 */ IC_VEX_XS, /* 15426 */ IC_VEX_XS, /* 15427 */ IC_VEX_XD, /* 15428 */ IC_VEX_XD, /* 15429 */ IC_VEX_XD, /* 15430 */ IC_VEX_XD, /* 15431 */ IC_VEX_W, /* 15432 */ IC_VEX_W, /* 15433 */ IC_VEX_W_XS, /* 15434 */ IC_VEX_W_XS, /* 15435 */ IC_VEX_W_XD, /* 15436 */ IC_VEX_W_XD, /* 15437 */ IC_VEX_W_XD, /* 15438 */ IC_VEX_W_XD, /* 15439 */ IC_VEX_OPSIZE, /* 15440 */ IC_VEX_OPSIZE, /* 15441 */ IC_VEX_OPSIZE, /* 15442 */ IC_VEX_OPSIZE, /* 15443 */ IC_VEX_OPSIZE, /* 15444 */ IC_VEX_OPSIZE, /* 15445 */ IC_VEX_OPSIZE, /* 15446 */ IC_VEX_OPSIZE, /* 15447 */ IC_VEX_W_OPSIZE, /* 15448 */ IC_VEX_W_OPSIZE, /* 15449 */ IC_VEX_W_OPSIZE, /* 15450 */ IC_VEX_W_OPSIZE, /* 15451 */ IC_VEX_W_OPSIZE, /* 15452 */ IC_VEX_W_OPSIZE, /* 15453 */ IC_VEX_W_OPSIZE, /* 15454 */ IC_VEX_W_OPSIZE, /* 15455 */ IC_VEX, /* 15456 */ IC_VEX, /* 15457 */ IC_VEX_XS, /* 15458 */ IC_VEX_XS, /* 15459 */ IC_VEX_XD, /* 15460 */ IC_VEX_XD, /* 15461 */ IC_VEX_XD, /* 15462 */ IC_VEX_XD, /* 15463 */ IC_VEX_W, /* 15464 */ IC_VEX_W, /* 15465 */ IC_VEX_W_XS, /* 15466 */ IC_VEX_W_XS, /* 15467 */ IC_VEX_W_XD, /* 15468 */ IC_VEX_W_XD, /* 15469 */ IC_VEX_W_XD, /* 15470 */ IC_VEX_W_XD, /* 15471 */ IC_VEX_OPSIZE, /* 15472 */ IC_VEX_OPSIZE, /* 15473 */ IC_VEX_OPSIZE, /* 15474 */ IC_VEX_OPSIZE, /* 15475 */ IC_VEX_OPSIZE, /* 15476 */ IC_VEX_OPSIZE, /* 15477 */ IC_VEX_OPSIZE, /* 15478 */ IC_VEX_OPSIZE, /* 15479 */ IC_VEX_W_OPSIZE, /* 15480 */ IC_VEX_W_OPSIZE, /* 15481 */ IC_VEX_W_OPSIZE, /* 15482 */ IC_VEX_W_OPSIZE, /* 15483 */ IC_VEX_W_OPSIZE, /* 15484 */ IC_VEX_W_OPSIZE, /* 15485 */ IC_VEX_W_OPSIZE, /* 15486 */ IC_VEX_W_OPSIZE, /* 15487 */ IC_VEX_L, /* 15488 */ IC_VEX_L, /* 15489 */ IC_VEX_L_XS, /* 15490 */ IC_VEX_L_XS, /* 15491 */ IC_VEX_L_XD, /* 15492 */ IC_VEX_L_XD, /* 15493 */ IC_VEX_L_XD, /* 15494 */ IC_VEX_L_XD, /* 15495 */ IC_VEX_L_W, /* 15496 */ IC_VEX_L_W, /* 15497 */ IC_VEX_L_W_XS, /* 15498 */ IC_VEX_L_W_XS, /* 15499 */ IC_VEX_L_W_XD, /* 15500 */ IC_VEX_L_W_XD, /* 15501 */ IC_VEX_L_W_XD, /* 15502 */ IC_VEX_L_W_XD, /* 15503 */ IC_VEX_L_OPSIZE, /* 15504 */ IC_VEX_L_OPSIZE, /* 15505 */ IC_VEX_L_OPSIZE, /* 15506 */ IC_VEX_L_OPSIZE, /* 15507 */ IC_VEX_L_OPSIZE, /* 15508 */ IC_VEX_L_OPSIZE, /* 15509 */ IC_VEX_L_OPSIZE, /* 15510 */ IC_VEX_L_OPSIZE, /* 15511 */ IC_VEX_L_W_OPSIZE, /* 15512 */ IC_VEX_L_W_OPSIZE, /* 15513 */ IC_VEX_L_W_OPSIZE, /* 15514 */ IC_VEX_L_W_OPSIZE, /* 15515 */ IC_VEX_L_W_OPSIZE, /* 15516 */ IC_VEX_L_W_OPSIZE, /* 15517 */ IC_VEX_L_W_OPSIZE, /* 15518 */ IC_VEX_L_W_OPSIZE, /* 15519 */ IC_VEX_L, /* 15520 */ IC_VEX_L, /* 15521 */ IC_VEX_L_XS, /* 15522 */ IC_VEX_L_XS, /* 15523 */ IC_VEX_L_XD, /* 15524 */ IC_VEX_L_XD, /* 15525 */ IC_VEX_L_XD, /* 15526 */ IC_VEX_L_XD, /* 15527 */ IC_VEX_L_W, /* 15528 */ IC_VEX_L_W, /* 15529 */ IC_VEX_L_W_XS, /* 15530 */ IC_VEX_L_W_XS, /* 15531 */ IC_VEX_L_W_XD, /* 15532 */ IC_VEX_L_W_XD, /* 15533 */ IC_VEX_L_W_XD, /* 15534 */ IC_VEX_L_W_XD, /* 15535 */ IC_VEX_L_OPSIZE, /* 15536 */ IC_VEX_L_OPSIZE, /* 15537 */ IC_VEX_L_OPSIZE, /* 15538 */ IC_VEX_L_OPSIZE, /* 15539 */ IC_VEX_L_OPSIZE, /* 15540 */ IC_VEX_L_OPSIZE, /* 15541 */ IC_VEX_L_OPSIZE, /* 15542 */ IC_VEX_L_OPSIZE, /* 15543 */ IC_VEX_L_W_OPSIZE, /* 15544 */ IC_VEX_L_W_OPSIZE, /* 15545 */ IC_VEX_L_W_OPSIZE, /* 15546 */ IC_VEX_L_W_OPSIZE, /* 15547 */ IC_VEX_L_W_OPSIZE, /* 15548 */ IC_VEX_L_W_OPSIZE, /* 15549 */ IC_VEX_L_W_OPSIZE, /* 15550 */ IC_VEX_L_W_OPSIZE, /* 15551 */ IC_VEX_L, /* 15552 */ IC_VEX_L, /* 15553 */ IC_VEX_L_XS, /* 15554 */ IC_VEX_L_XS, /* 15555 */ IC_VEX_L_XD, /* 15556 */ IC_VEX_L_XD, /* 15557 */ IC_VEX_L_XD, /* 15558 */ IC_VEX_L_XD, /* 15559 */ IC_VEX_L_W, /* 15560 */ IC_VEX_L_W, /* 15561 */ IC_VEX_L_W_XS, /* 15562 */ IC_VEX_L_W_XS, /* 15563 */ IC_VEX_L_W_XD, /* 15564 */ IC_VEX_L_W_XD, /* 15565 */ IC_VEX_L_W_XD, /* 15566 */ IC_VEX_L_W_XD, /* 15567 */ IC_VEX_L_OPSIZE, /* 15568 */ IC_VEX_L_OPSIZE, /* 15569 */ IC_VEX_L_OPSIZE, /* 15570 */ IC_VEX_L_OPSIZE, /* 15571 */ IC_VEX_L_OPSIZE, /* 15572 */ IC_VEX_L_OPSIZE, /* 15573 */ IC_VEX_L_OPSIZE, /* 15574 */ IC_VEX_L_OPSIZE, /* 15575 */ IC_VEX_L_W_OPSIZE, /* 15576 */ IC_VEX_L_W_OPSIZE, /* 15577 */ IC_VEX_L_W_OPSIZE, /* 15578 */ IC_VEX_L_W_OPSIZE, /* 15579 */ IC_VEX_L_W_OPSIZE, /* 15580 */ IC_VEX_L_W_OPSIZE, /* 15581 */ IC_VEX_L_W_OPSIZE, /* 15582 */ IC_VEX_L_W_OPSIZE, /* 15583 */ IC_VEX_L, /* 15584 */ IC_VEX_L, /* 15585 */ IC_VEX_L_XS, /* 15586 */ IC_VEX_L_XS, /* 15587 */ IC_VEX_L_XD, /* 15588 */ IC_VEX_L_XD, /* 15589 */ IC_VEX_L_XD, /* 15590 */ IC_VEX_L_XD, /* 15591 */ IC_VEX_L_W, /* 15592 */ IC_VEX_L_W, /* 15593 */ IC_VEX_L_W_XS, /* 15594 */ IC_VEX_L_W_XS, /* 15595 */ IC_VEX_L_W_XD, /* 15596 */ IC_VEX_L_W_XD, /* 15597 */ IC_VEX_L_W_XD, /* 15598 */ IC_VEX_L_W_XD, /* 15599 */ IC_VEX_L_OPSIZE, /* 15600 */ IC_VEX_L_OPSIZE, /* 15601 */ IC_VEX_L_OPSIZE, /* 15602 */ IC_VEX_L_OPSIZE, /* 15603 */ IC_VEX_L_OPSIZE, /* 15604 */ IC_VEX_L_OPSIZE, /* 15605 */ IC_VEX_L_OPSIZE, /* 15606 */ IC_VEX_L_OPSIZE, /* 15607 */ IC_VEX_L_W_OPSIZE, /* 15608 */ IC_VEX_L_W_OPSIZE, /* 15609 */ IC_VEX_L_W_OPSIZE, /* 15610 */ IC_VEX_L_W_OPSIZE, /* 15611 */ IC_VEX_L_W_OPSIZE, /* 15612 */ IC_VEX_L_W_OPSIZE, /* 15613 */ IC_VEX_L_W_OPSIZE, /* 15614 */ IC_VEX_L_W_OPSIZE, /* 15615 */ IC_EVEX_L2_KZ_B, /* 15616 */ IC_EVEX_L2_KZ_B, /* 15617 */ IC_EVEX_L2_XS_KZ_B, /* 15618 */ IC_EVEX_L2_XS_KZ_B, /* 15619 */ IC_EVEX_L2_XD_KZ_B, /* 15620 */ IC_EVEX_L2_XD_KZ_B, /* 15621 */ IC_EVEX_L2_XD_KZ_B, /* 15622 */ IC_EVEX_L2_XD_KZ_B, /* 15623 */ IC_EVEX_L2_W_KZ_B, /* 15624 */ IC_EVEX_L2_W_KZ_B, /* 15625 */ IC_EVEX_L2_W_XS_KZ_B, /* 15626 */ IC_EVEX_L2_W_XS_KZ_B, /* 15627 */ IC_EVEX_L2_W_XD_KZ_B, /* 15628 */ IC_EVEX_L2_W_XD_KZ_B, /* 15629 */ IC_EVEX_L2_W_XD_KZ_B, /* 15630 */ IC_EVEX_L2_W_XD_KZ_B, /* 15631 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15632 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15633 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15634 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15635 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15636 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15637 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15638 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15639 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15640 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15641 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15642 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15643 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15644 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15645 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15646 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15647 */ IC_EVEX_L2_KZ_B, /* 15648 */ IC_EVEX_L2_KZ_B, /* 15649 */ IC_EVEX_L2_XS_KZ_B, /* 15650 */ IC_EVEX_L2_XS_KZ_B, /* 15651 */ IC_EVEX_L2_XD_KZ_B, /* 15652 */ IC_EVEX_L2_XD_KZ_B, /* 15653 */ IC_EVEX_L2_XD_KZ_B, /* 15654 */ IC_EVEX_L2_XD_KZ_B, /* 15655 */ IC_EVEX_L2_W_KZ_B, /* 15656 */ IC_EVEX_L2_W_KZ_B, /* 15657 */ IC_EVEX_L2_W_XS_KZ_B, /* 15658 */ IC_EVEX_L2_W_XS_KZ_B, /* 15659 */ IC_EVEX_L2_W_XD_KZ_B, /* 15660 */ IC_EVEX_L2_W_XD_KZ_B, /* 15661 */ IC_EVEX_L2_W_XD_KZ_B, /* 15662 */ IC_EVEX_L2_W_XD_KZ_B, /* 15663 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15664 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15665 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15666 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15667 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15668 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15669 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15670 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15671 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15672 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15673 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15674 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15675 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15676 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15677 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15678 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15679 */ IC_EVEX_L2_KZ_B, /* 15680 */ IC_EVEX_L2_KZ_B, /* 15681 */ IC_EVEX_L2_XS_KZ_B, /* 15682 */ IC_EVEX_L2_XS_KZ_B, /* 15683 */ IC_EVEX_L2_XD_KZ_B, /* 15684 */ IC_EVEX_L2_XD_KZ_B, /* 15685 */ IC_EVEX_L2_XD_KZ_B, /* 15686 */ IC_EVEX_L2_XD_KZ_B, /* 15687 */ IC_EVEX_L2_W_KZ_B, /* 15688 */ IC_EVEX_L2_W_KZ_B, /* 15689 */ IC_EVEX_L2_W_XS_KZ_B, /* 15690 */ IC_EVEX_L2_W_XS_KZ_B, /* 15691 */ IC_EVEX_L2_W_XD_KZ_B, /* 15692 */ IC_EVEX_L2_W_XD_KZ_B, /* 15693 */ IC_EVEX_L2_W_XD_KZ_B, /* 15694 */ IC_EVEX_L2_W_XD_KZ_B, /* 15695 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15696 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15697 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15698 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15699 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15700 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15701 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15702 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15703 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15704 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15705 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15706 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15707 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15708 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15709 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15710 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15711 */ IC_EVEX_L2_KZ_B, /* 15712 */ IC_EVEX_L2_KZ_B, /* 15713 */ IC_EVEX_L2_XS_KZ_B, /* 15714 */ IC_EVEX_L2_XS_KZ_B, /* 15715 */ IC_EVEX_L2_XD_KZ_B, /* 15716 */ IC_EVEX_L2_XD_KZ_B, /* 15717 */ IC_EVEX_L2_XD_KZ_B, /* 15718 */ IC_EVEX_L2_XD_KZ_B, /* 15719 */ IC_EVEX_L2_W_KZ_B, /* 15720 */ IC_EVEX_L2_W_KZ_B, /* 15721 */ IC_EVEX_L2_W_XS_KZ_B, /* 15722 */ IC_EVEX_L2_W_XS_KZ_B, /* 15723 */ IC_EVEX_L2_W_XD_KZ_B, /* 15724 */ IC_EVEX_L2_W_XD_KZ_B, /* 15725 */ IC_EVEX_L2_W_XD_KZ_B, /* 15726 */ IC_EVEX_L2_W_XD_KZ_B, /* 15727 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15728 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15729 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15730 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15731 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15732 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15733 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15734 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15735 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15736 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15737 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15738 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15739 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15740 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15741 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15742 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15743 */ IC_EVEX_L2_KZ_B, /* 15744 */ IC_EVEX_L2_KZ_B, /* 15745 */ IC_EVEX_L2_XS_KZ_B, /* 15746 */ IC_EVEX_L2_XS_KZ_B, /* 15747 */ IC_EVEX_L2_XD_KZ_B, /* 15748 */ IC_EVEX_L2_XD_KZ_B, /* 15749 */ IC_EVEX_L2_XD_KZ_B, /* 15750 */ IC_EVEX_L2_XD_KZ_B, /* 15751 */ IC_EVEX_L2_W_KZ_B, /* 15752 */ IC_EVEX_L2_W_KZ_B, /* 15753 */ IC_EVEX_L2_W_XS_KZ_B, /* 15754 */ IC_EVEX_L2_W_XS_KZ_B, /* 15755 */ IC_EVEX_L2_W_XD_KZ_B, /* 15756 */ IC_EVEX_L2_W_XD_KZ_B, /* 15757 */ IC_EVEX_L2_W_XD_KZ_B, /* 15758 */ IC_EVEX_L2_W_XD_KZ_B, /* 15759 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15760 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15761 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15762 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15763 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15764 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15765 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15766 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15767 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15768 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15769 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15770 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15771 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15772 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15773 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15774 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15775 */ IC_EVEX_L2_KZ_B, /* 15776 */ IC_EVEX_L2_KZ_B, /* 15777 */ IC_EVEX_L2_XS_KZ_B, /* 15778 */ IC_EVEX_L2_XS_KZ_B, /* 15779 */ IC_EVEX_L2_XD_KZ_B, /* 15780 */ IC_EVEX_L2_XD_KZ_B, /* 15781 */ IC_EVEX_L2_XD_KZ_B, /* 15782 */ IC_EVEX_L2_XD_KZ_B, /* 15783 */ IC_EVEX_L2_W_KZ_B, /* 15784 */ IC_EVEX_L2_W_KZ_B, /* 15785 */ IC_EVEX_L2_W_XS_KZ_B, /* 15786 */ IC_EVEX_L2_W_XS_KZ_B, /* 15787 */ IC_EVEX_L2_W_XD_KZ_B, /* 15788 */ IC_EVEX_L2_W_XD_KZ_B, /* 15789 */ IC_EVEX_L2_W_XD_KZ_B, /* 15790 */ IC_EVEX_L2_W_XD_KZ_B, /* 15791 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15792 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15793 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15794 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15795 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15796 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15797 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15798 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15799 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15800 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15801 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15802 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15803 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15804 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15805 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15806 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15807 */ IC_EVEX_L2_KZ_B, /* 15808 */ IC_EVEX_L2_KZ_B, /* 15809 */ IC_EVEX_L2_XS_KZ_B, /* 15810 */ IC_EVEX_L2_XS_KZ_B, /* 15811 */ IC_EVEX_L2_XD_KZ_B, /* 15812 */ IC_EVEX_L2_XD_KZ_B, /* 15813 */ IC_EVEX_L2_XD_KZ_B, /* 15814 */ IC_EVEX_L2_XD_KZ_B, /* 15815 */ IC_EVEX_L2_W_KZ_B, /* 15816 */ IC_EVEX_L2_W_KZ_B, /* 15817 */ IC_EVEX_L2_W_XS_KZ_B, /* 15818 */ IC_EVEX_L2_W_XS_KZ_B, /* 15819 */ IC_EVEX_L2_W_XD_KZ_B, /* 15820 */ IC_EVEX_L2_W_XD_KZ_B, /* 15821 */ IC_EVEX_L2_W_XD_KZ_B, /* 15822 */ IC_EVEX_L2_W_XD_KZ_B, /* 15823 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15824 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15825 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15826 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15827 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15828 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15829 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15830 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15831 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15832 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15833 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15834 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15835 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15836 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15837 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15838 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15839 */ IC_EVEX_L2_KZ_B, /* 15840 */ IC_EVEX_L2_KZ_B, /* 15841 */ IC_EVEX_L2_XS_KZ_B, /* 15842 */ IC_EVEX_L2_XS_KZ_B, /* 15843 */ IC_EVEX_L2_XD_KZ_B, /* 15844 */ IC_EVEX_L2_XD_KZ_B, /* 15845 */ IC_EVEX_L2_XD_KZ_B, /* 15846 */ IC_EVEX_L2_XD_KZ_B, /* 15847 */ IC_EVEX_L2_W_KZ_B, /* 15848 */ IC_EVEX_L2_W_KZ_B, /* 15849 */ IC_EVEX_L2_W_XS_KZ_B, /* 15850 */ IC_EVEX_L2_W_XS_KZ_B, /* 15851 */ IC_EVEX_L2_W_XD_KZ_B, /* 15852 */ IC_EVEX_L2_W_XD_KZ_B, /* 15853 */ IC_EVEX_L2_W_XD_KZ_B, /* 15854 */ IC_EVEX_L2_W_XD_KZ_B, /* 15855 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15856 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15857 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15858 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15859 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15860 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15861 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15862 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15863 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15864 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15865 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15866 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15867 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15868 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15869 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15870 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15871 */ IC, /* 15872 */ IC_64BIT, /* 15873 */ IC_XS, /* 15874 */ IC_64BIT_XS, /* 15875 */ IC_XD, /* 15876 */ IC_64BIT_XD, /* 15877 */ IC_XS, /* 15878 */ IC_64BIT_XS, /* 15879 */ IC, /* 15880 */ IC_64BIT_REXW, /* 15881 */ IC_XS, /* 15882 */ IC_64BIT_REXW_XS, /* 15883 */ IC_XD, /* 15884 */ IC_64BIT_REXW_XD, /* 15885 */ IC_XS, /* 15886 */ IC_64BIT_REXW_XS, /* 15887 */ IC_OPSIZE, /* 15888 */ IC_64BIT_OPSIZE, /* 15889 */ IC_XS_OPSIZE, /* 15890 */ IC_64BIT_XS_OPSIZE, /* 15891 */ IC_XD_OPSIZE, /* 15892 */ IC_64BIT_XD_OPSIZE, /* 15893 */ IC_XS_OPSIZE, /* 15894 */ IC_64BIT_XD_OPSIZE, /* 15895 */ IC_OPSIZE, /* 15896 */ IC_64BIT_REXW_OPSIZE, /* 15897 */ IC_XS_OPSIZE, /* 15898 */ IC_64BIT_REXW_XS, /* 15899 */ IC_XD_OPSIZE, /* 15900 */ IC_64BIT_REXW_XD, /* 15901 */ IC_XS_OPSIZE, /* 15902 */ IC_64BIT_REXW_XS, /* 15903 */ IC_ADSIZE, /* 15904 */ IC_64BIT_ADSIZE, /* 15905 */ IC_XS, /* 15906 */ IC_64BIT_XS, /* 15907 */ IC_XD, /* 15908 */ IC_64BIT_XD, /* 15909 */ IC_XS, /* 15910 */ IC_64BIT_XS, /* 15911 */ IC_ADSIZE, /* 15912 */ IC_64BIT_REXW_ADSIZE, /* 15913 */ IC_XS, /* 15914 */ IC_64BIT_REXW_XS, /* 15915 */ IC_XD, /* 15916 */ IC_64BIT_REXW_XD, /* 15917 */ IC_XS, /* 15918 */ IC_64BIT_REXW_XS, /* 15919 */ IC_OPSIZE_ADSIZE, /* 15920 */ IC_64BIT_OPSIZE_ADSIZE, /* 15921 */ IC_XS_OPSIZE, /* 15922 */ IC_64BIT_XS_OPSIZE, /* 15923 */ IC_XD_OPSIZE, /* 15924 */ IC_64BIT_XD_OPSIZE, /* 15925 */ IC_XS_OPSIZE, /* 15926 */ IC_64BIT_XD_OPSIZE, /* 15927 */ IC_OPSIZE_ADSIZE, /* 15928 */ IC_64BIT_REXW_OPSIZE, /* 15929 */ IC_XS_OPSIZE, /* 15930 */ IC_64BIT_REXW_XS, /* 15931 */ IC_XD_OPSIZE, /* 15932 */ IC_64BIT_REXW_XD, /* 15933 */ IC_XS_OPSIZE, /* 15934 */ IC_64BIT_REXW_XS, /* 15935 */ IC_VEX, /* 15936 */ IC_VEX, /* 15937 */ IC_VEX_XS, /* 15938 */ IC_VEX_XS, /* 15939 */ IC_VEX_XD, /* 15940 */ IC_VEX_XD, /* 15941 */ IC_VEX_XD, /* 15942 */ IC_VEX_XD, /* 15943 */ IC_VEX_W, /* 15944 */ IC_VEX_W, /* 15945 */ IC_VEX_W_XS, /* 15946 */ IC_VEX_W_XS, /* 15947 */ IC_VEX_W_XD, /* 15948 */ IC_VEX_W_XD, /* 15949 */ IC_VEX_W_XD, /* 15950 */ IC_VEX_W_XD, /* 15951 */ IC_VEX_OPSIZE, /* 15952 */ IC_VEX_OPSIZE, /* 15953 */ IC_VEX_OPSIZE, /* 15954 */ IC_VEX_OPSIZE, /* 15955 */ IC_VEX_OPSIZE, /* 15956 */ IC_VEX_OPSIZE, /* 15957 */ IC_VEX_OPSIZE, /* 15958 */ IC_VEX_OPSIZE, /* 15959 */ IC_VEX_W_OPSIZE, /* 15960 */ IC_VEX_W_OPSIZE, /* 15961 */ IC_VEX_W_OPSIZE, /* 15962 */ IC_VEX_W_OPSIZE, /* 15963 */ IC_VEX_W_OPSIZE, /* 15964 */ IC_VEX_W_OPSIZE, /* 15965 */ IC_VEX_W_OPSIZE, /* 15966 */ IC_VEX_W_OPSIZE, /* 15967 */ IC_VEX, /* 15968 */ IC_VEX, /* 15969 */ IC_VEX_XS, /* 15970 */ IC_VEX_XS, /* 15971 */ IC_VEX_XD, /* 15972 */ IC_VEX_XD, /* 15973 */ IC_VEX_XD, /* 15974 */ IC_VEX_XD, /* 15975 */ IC_VEX_W, /* 15976 */ IC_VEX_W, /* 15977 */ IC_VEX_W_XS, /* 15978 */ IC_VEX_W_XS, /* 15979 */ IC_VEX_W_XD, /* 15980 */ IC_VEX_W_XD, /* 15981 */ IC_VEX_W_XD, /* 15982 */ IC_VEX_W_XD, /* 15983 */ IC_VEX_OPSIZE, /* 15984 */ IC_VEX_OPSIZE, /* 15985 */ IC_VEX_OPSIZE, /* 15986 */ IC_VEX_OPSIZE, /* 15987 */ IC_VEX_OPSIZE, /* 15988 */ IC_VEX_OPSIZE, /* 15989 */ IC_VEX_OPSIZE, /* 15990 */ IC_VEX_OPSIZE, /* 15991 */ IC_VEX_W_OPSIZE, /* 15992 */ IC_VEX_W_OPSIZE, /* 15993 */ IC_VEX_W_OPSIZE, /* 15994 */ IC_VEX_W_OPSIZE, /* 15995 */ IC_VEX_W_OPSIZE, /* 15996 */ IC_VEX_W_OPSIZE, /* 15997 */ IC_VEX_W_OPSIZE, /* 15998 */ IC_VEX_W_OPSIZE, /* 15999 */ IC_VEX_L, /* 16000 */ IC_VEX_L, /* 16001 */ IC_VEX_L_XS, /* 16002 */ IC_VEX_L_XS, /* 16003 */ IC_VEX_L_XD, /* 16004 */ IC_VEX_L_XD, /* 16005 */ IC_VEX_L_XD, /* 16006 */ IC_VEX_L_XD, /* 16007 */ IC_VEX_L_W, /* 16008 */ IC_VEX_L_W, /* 16009 */ IC_VEX_L_W_XS, /* 16010 */ IC_VEX_L_W_XS, /* 16011 */ IC_VEX_L_W_XD, /* 16012 */ IC_VEX_L_W_XD, /* 16013 */ IC_VEX_L_W_XD, /* 16014 */ IC_VEX_L_W_XD, /* 16015 */ IC_VEX_L_OPSIZE, /* 16016 */ IC_VEX_L_OPSIZE, /* 16017 */ IC_VEX_L_OPSIZE, /* 16018 */ IC_VEX_L_OPSIZE, /* 16019 */ IC_VEX_L_OPSIZE, /* 16020 */ IC_VEX_L_OPSIZE, /* 16021 */ IC_VEX_L_OPSIZE, /* 16022 */ IC_VEX_L_OPSIZE, /* 16023 */ IC_VEX_L_W_OPSIZE, /* 16024 */ IC_VEX_L_W_OPSIZE, /* 16025 */ IC_VEX_L_W_OPSIZE, /* 16026 */ IC_VEX_L_W_OPSIZE, /* 16027 */ IC_VEX_L_W_OPSIZE, /* 16028 */ IC_VEX_L_W_OPSIZE, /* 16029 */ IC_VEX_L_W_OPSIZE, /* 16030 */ IC_VEX_L_W_OPSIZE, /* 16031 */ IC_VEX_L, /* 16032 */ IC_VEX_L, /* 16033 */ IC_VEX_L_XS, /* 16034 */ IC_VEX_L_XS, /* 16035 */ IC_VEX_L_XD, /* 16036 */ IC_VEX_L_XD, /* 16037 */ IC_VEX_L_XD, /* 16038 */ IC_VEX_L_XD, /* 16039 */ IC_VEX_L_W, /* 16040 */ IC_VEX_L_W, /* 16041 */ IC_VEX_L_W_XS, /* 16042 */ IC_VEX_L_W_XS, /* 16043 */ IC_VEX_L_W_XD, /* 16044 */ IC_VEX_L_W_XD, /* 16045 */ IC_VEX_L_W_XD, /* 16046 */ IC_VEX_L_W_XD, /* 16047 */ IC_VEX_L_OPSIZE, /* 16048 */ IC_VEX_L_OPSIZE, /* 16049 */ IC_VEX_L_OPSIZE, /* 16050 */ IC_VEX_L_OPSIZE, /* 16051 */ IC_VEX_L_OPSIZE, /* 16052 */ IC_VEX_L_OPSIZE, /* 16053 */ IC_VEX_L_OPSIZE, /* 16054 */ IC_VEX_L_OPSIZE, /* 16055 */ IC_VEX_L_W_OPSIZE, /* 16056 */ IC_VEX_L_W_OPSIZE, /* 16057 */ IC_VEX_L_W_OPSIZE, /* 16058 */ IC_VEX_L_W_OPSIZE, /* 16059 */ IC_VEX_L_W_OPSIZE, /* 16060 */ IC_VEX_L_W_OPSIZE, /* 16061 */ IC_VEX_L_W_OPSIZE, /* 16062 */ IC_VEX_L_W_OPSIZE, /* 16063 */ IC_VEX_L, /* 16064 */ IC_VEX_L, /* 16065 */ IC_VEX_L_XS, /* 16066 */ IC_VEX_L_XS, /* 16067 */ IC_VEX_L_XD, /* 16068 */ IC_VEX_L_XD, /* 16069 */ IC_VEX_L_XD, /* 16070 */ IC_VEX_L_XD, /* 16071 */ IC_VEX_L_W, /* 16072 */ IC_VEX_L_W, /* 16073 */ IC_VEX_L_W_XS, /* 16074 */ IC_VEX_L_W_XS, /* 16075 */ IC_VEX_L_W_XD, /* 16076 */ IC_VEX_L_W_XD, /* 16077 */ IC_VEX_L_W_XD, /* 16078 */ IC_VEX_L_W_XD, /* 16079 */ IC_VEX_L_OPSIZE, /* 16080 */ IC_VEX_L_OPSIZE, /* 16081 */ IC_VEX_L_OPSIZE, /* 16082 */ IC_VEX_L_OPSIZE, /* 16083 */ IC_VEX_L_OPSIZE, /* 16084 */ IC_VEX_L_OPSIZE, /* 16085 */ IC_VEX_L_OPSIZE, /* 16086 */ IC_VEX_L_OPSIZE, /* 16087 */ IC_VEX_L_W_OPSIZE, /* 16088 */ IC_VEX_L_W_OPSIZE, /* 16089 */ IC_VEX_L_W_OPSIZE, /* 16090 */ IC_VEX_L_W_OPSIZE, /* 16091 */ IC_VEX_L_W_OPSIZE, /* 16092 */ IC_VEX_L_W_OPSIZE, /* 16093 */ IC_VEX_L_W_OPSIZE, /* 16094 */ IC_VEX_L_W_OPSIZE, /* 16095 */ IC_VEX_L, /* 16096 */ IC_VEX_L, /* 16097 */ IC_VEX_L_XS, /* 16098 */ IC_VEX_L_XS, /* 16099 */ IC_VEX_L_XD, /* 16100 */ IC_VEX_L_XD, /* 16101 */ IC_VEX_L_XD, /* 16102 */ IC_VEX_L_XD, /* 16103 */ IC_VEX_L_W, /* 16104 */ IC_VEX_L_W, /* 16105 */ IC_VEX_L_W_XS, /* 16106 */ IC_VEX_L_W_XS, /* 16107 */ IC_VEX_L_W_XD, /* 16108 */ IC_VEX_L_W_XD, /* 16109 */ IC_VEX_L_W_XD, /* 16110 */ IC_VEX_L_W_XD, /* 16111 */ IC_VEX_L_OPSIZE, /* 16112 */ IC_VEX_L_OPSIZE, /* 16113 */ IC_VEX_L_OPSIZE, /* 16114 */ IC_VEX_L_OPSIZE, /* 16115 */ IC_VEX_L_OPSIZE, /* 16116 */ IC_VEX_L_OPSIZE, /* 16117 */ IC_VEX_L_OPSIZE, /* 16118 */ IC_VEX_L_OPSIZE, /* 16119 */ IC_VEX_L_W_OPSIZE, /* 16120 */ IC_VEX_L_W_OPSIZE, /* 16121 */ IC_VEX_L_W_OPSIZE, /* 16122 */ IC_VEX_L_W_OPSIZE, /* 16123 */ IC_VEX_L_W_OPSIZE, /* 16124 */ IC_VEX_L_W_OPSIZE, /* 16125 */ IC_VEX_L_W_OPSIZE, /* 16126 */ IC_VEX_L_W_OPSIZE, /* 16127 */ IC_EVEX_L2_KZ_B, /* 16128 */ IC_EVEX_L2_KZ_B, /* 16129 */ IC_EVEX_L2_XS_KZ_B, /* 16130 */ IC_EVEX_L2_XS_KZ_B, /* 16131 */ IC_EVEX_L2_XD_KZ_B, /* 16132 */ IC_EVEX_L2_XD_KZ_B, /* 16133 */ IC_EVEX_L2_XD_KZ_B, /* 16134 */ IC_EVEX_L2_XD_KZ_B, /* 16135 */ IC_EVEX_L2_W_KZ_B, /* 16136 */ IC_EVEX_L2_W_KZ_B, /* 16137 */ IC_EVEX_L2_W_XS_KZ_B, /* 16138 */ IC_EVEX_L2_W_XS_KZ_B, /* 16139 */ IC_EVEX_L2_W_XD_KZ_B, /* 16140 */ IC_EVEX_L2_W_XD_KZ_B, /* 16141 */ IC_EVEX_L2_W_XD_KZ_B, /* 16142 */ IC_EVEX_L2_W_XD_KZ_B, /* 16143 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16144 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16145 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16146 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16147 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16148 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16149 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16150 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16151 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16152 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16153 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16154 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16155 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16156 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16157 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16158 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16159 */ IC_EVEX_L2_KZ_B, /* 16160 */ IC_EVEX_L2_KZ_B, /* 16161 */ IC_EVEX_L2_XS_KZ_B, /* 16162 */ IC_EVEX_L2_XS_KZ_B, /* 16163 */ IC_EVEX_L2_XD_KZ_B, /* 16164 */ IC_EVEX_L2_XD_KZ_B, /* 16165 */ IC_EVEX_L2_XD_KZ_B, /* 16166 */ IC_EVEX_L2_XD_KZ_B, /* 16167 */ IC_EVEX_L2_W_KZ_B, /* 16168 */ IC_EVEX_L2_W_KZ_B, /* 16169 */ IC_EVEX_L2_W_XS_KZ_B, /* 16170 */ IC_EVEX_L2_W_XS_KZ_B, /* 16171 */ IC_EVEX_L2_W_XD_KZ_B, /* 16172 */ IC_EVEX_L2_W_XD_KZ_B, /* 16173 */ IC_EVEX_L2_W_XD_KZ_B, /* 16174 */ IC_EVEX_L2_W_XD_KZ_B, /* 16175 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16176 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16177 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16178 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16179 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16180 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16181 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16182 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16183 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16184 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16185 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16186 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16187 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16188 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16189 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16190 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16191 */ IC_EVEX_L2_KZ_B, /* 16192 */ IC_EVEX_L2_KZ_B, /* 16193 */ IC_EVEX_L2_XS_KZ_B, /* 16194 */ IC_EVEX_L2_XS_KZ_B, /* 16195 */ IC_EVEX_L2_XD_KZ_B, /* 16196 */ IC_EVEX_L2_XD_KZ_B, /* 16197 */ IC_EVEX_L2_XD_KZ_B, /* 16198 */ IC_EVEX_L2_XD_KZ_B, /* 16199 */ IC_EVEX_L2_W_KZ_B, /* 16200 */ IC_EVEX_L2_W_KZ_B, /* 16201 */ IC_EVEX_L2_W_XS_KZ_B, /* 16202 */ IC_EVEX_L2_W_XS_KZ_B, /* 16203 */ IC_EVEX_L2_W_XD_KZ_B, /* 16204 */ IC_EVEX_L2_W_XD_KZ_B, /* 16205 */ IC_EVEX_L2_W_XD_KZ_B, /* 16206 */ IC_EVEX_L2_W_XD_KZ_B, /* 16207 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16208 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16209 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16210 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16211 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16212 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16213 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16214 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16215 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16216 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16217 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16218 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16219 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16220 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16221 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16222 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16223 */ IC_EVEX_L2_KZ_B, /* 16224 */ IC_EVEX_L2_KZ_B, /* 16225 */ IC_EVEX_L2_XS_KZ_B, /* 16226 */ IC_EVEX_L2_XS_KZ_B, /* 16227 */ IC_EVEX_L2_XD_KZ_B, /* 16228 */ IC_EVEX_L2_XD_KZ_B, /* 16229 */ IC_EVEX_L2_XD_KZ_B, /* 16230 */ IC_EVEX_L2_XD_KZ_B, /* 16231 */ IC_EVEX_L2_W_KZ_B, /* 16232 */ IC_EVEX_L2_W_KZ_B, /* 16233 */ IC_EVEX_L2_W_XS_KZ_B, /* 16234 */ IC_EVEX_L2_W_XS_KZ_B, /* 16235 */ IC_EVEX_L2_W_XD_KZ_B, /* 16236 */ IC_EVEX_L2_W_XD_KZ_B, /* 16237 */ IC_EVEX_L2_W_XD_KZ_B, /* 16238 */ IC_EVEX_L2_W_XD_KZ_B, /* 16239 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16240 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16241 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16242 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16243 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16244 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16245 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16246 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16247 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16248 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16249 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16250 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16251 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16252 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16253 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16254 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16255 */ IC_EVEX_L2_KZ_B, /* 16256 */ IC_EVEX_L2_KZ_B, /* 16257 */ IC_EVEX_L2_XS_KZ_B, /* 16258 */ IC_EVEX_L2_XS_KZ_B, /* 16259 */ IC_EVEX_L2_XD_KZ_B, /* 16260 */ IC_EVEX_L2_XD_KZ_B, /* 16261 */ IC_EVEX_L2_XD_KZ_B, /* 16262 */ IC_EVEX_L2_XD_KZ_B, /* 16263 */ IC_EVEX_L2_W_KZ_B, /* 16264 */ IC_EVEX_L2_W_KZ_B, /* 16265 */ IC_EVEX_L2_W_XS_KZ_B, /* 16266 */ IC_EVEX_L2_W_XS_KZ_B, /* 16267 */ IC_EVEX_L2_W_XD_KZ_B, /* 16268 */ IC_EVEX_L2_W_XD_KZ_B, /* 16269 */ IC_EVEX_L2_W_XD_KZ_B, /* 16270 */ IC_EVEX_L2_W_XD_KZ_B, /* 16271 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16272 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16273 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16274 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16275 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16276 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16277 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16278 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16279 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16280 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16281 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16282 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16283 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16284 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16285 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16286 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16287 */ IC_EVEX_L2_KZ_B, /* 16288 */ IC_EVEX_L2_KZ_B, /* 16289 */ IC_EVEX_L2_XS_KZ_B, /* 16290 */ IC_EVEX_L2_XS_KZ_B, /* 16291 */ IC_EVEX_L2_XD_KZ_B, /* 16292 */ IC_EVEX_L2_XD_KZ_B, /* 16293 */ IC_EVEX_L2_XD_KZ_B, /* 16294 */ IC_EVEX_L2_XD_KZ_B, /* 16295 */ IC_EVEX_L2_W_KZ_B, /* 16296 */ IC_EVEX_L2_W_KZ_B, /* 16297 */ IC_EVEX_L2_W_XS_KZ_B, /* 16298 */ IC_EVEX_L2_W_XS_KZ_B, /* 16299 */ IC_EVEX_L2_W_XD_KZ_B, /* 16300 */ IC_EVEX_L2_W_XD_KZ_B, /* 16301 */ IC_EVEX_L2_W_XD_KZ_B, /* 16302 */ IC_EVEX_L2_W_XD_KZ_B, /* 16303 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16304 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16305 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16306 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16307 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16308 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16309 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16310 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16311 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16312 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16313 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16314 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16315 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16316 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16317 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16318 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16319 */ IC_EVEX_L2_KZ_B, /* 16320 */ IC_EVEX_L2_KZ_B, /* 16321 */ IC_EVEX_L2_XS_KZ_B, /* 16322 */ IC_EVEX_L2_XS_KZ_B, /* 16323 */ IC_EVEX_L2_XD_KZ_B, /* 16324 */ IC_EVEX_L2_XD_KZ_B, /* 16325 */ IC_EVEX_L2_XD_KZ_B, /* 16326 */ IC_EVEX_L2_XD_KZ_B, /* 16327 */ IC_EVEX_L2_W_KZ_B, /* 16328 */ IC_EVEX_L2_W_KZ_B, /* 16329 */ IC_EVEX_L2_W_XS_KZ_B, /* 16330 */ IC_EVEX_L2_W_XS_KZ_B, /* 16331 */ IC_EVEX_L2_W_XD_KZ_B, /* 16332 */ IC_EVEX_L2_W_XD_KZ_B, /* 16333 */ IC_EVEX_L2_W_XD_KZ_B, /* 16334 */ IC_EVEX_L2_W_XD_KZ_B, /* 16335 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16336 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16337 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16338 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16339 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16340 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16341 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16342 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16343 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16344 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16345 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16346 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16347 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16348 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16349 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16350 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16351 */ IC_EVEX_L2_KZ_B, /* 16352 */ IC_EVEX_L2_KZ_B, /* 16353 */ IC_EVEX_L2_XS_KZ_B, /* 16354 */ IC_EVEX_L2_XS_KZ_B, /* 16355 */ IC_EVEX_L2_XD_KZ_B, /* 16356 */ IC_EVEX_L2_XD_KZ_B, /* 16357 */ IC_EVEX_L2_XD_KZ_B, /* 16358 */ IC_EVEX_L2_XD_KZ_B, /* 16359 */ IC_EVEX_L2_W_KZ_B, /* 16360 */ IC_EVEX_L2_W_KZ_B, /* 16361 */ IC_EVEX_L2_W_XS_KZ_B, /* 16362 */ IC_EVEX_L2_W_XS_KZ_B, /* 16363 */ IC_EVEX_L2_W_XD_KZ_B, /* 16364 */ IC_EVEX_L2_W_XD_KZ_B, /* 16365 */ IC_EVEX_L2_W_XD_KZ_B, /* 16366 */ IC_EVEX_L2_W_XD_KZ_B, /* 16367 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16368 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16369 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16370 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16371 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16372 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16373 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16374 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16375 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16376 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16377 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16378 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16379 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16380 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16381 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16382 */ IC_EVEX_L2_W_OPSIZE_KZ_B /* 16383 */ }; static const InstrUID modRMTable[] = { /* EmptyTable */ 0x0, /* Table1 */ 0x71, /* ADD8mr */ 0x75, /* ADD8rr */ /* Table3 */ 0x59, /* ADD32mr */ 0x5f, /* ADD32rr */ /* Table5 */ 0x74, /* ADD8rm */ 0x76, /* ADD8rr_REV */ /* Table7 */ 0x5e, /* ADD32rm */ 0x61, /* ADD32rr_REV */ /* Table9 */ 0x6e, /* ADD8i8 */ /* Table10 */ 0x56, /* ADD32i32 */ /* Table11 */ 0x906, /* PUSHES32 */ /* Table12 */ 0x88f, /* POPES32 */ /* Table13 */ 0x780, /* OR8mr */ 0x784, /* OR8rr */ /* Table15 */ 0x76d, /* OR32mr */ 0x772, /* OR32rr */ /* Table17 */ 0x783, /* OR8rm */ 0x785, /* OR8rr_REV */ /* Table19 */ 0x771, /* OR32rm */ 0x773, /* OR32rr_REV */ /* Table21 */ 0x77d, /* OR8i8 */ /* Table22 */ 0x76a, /* OR32i32 */ /* Table23 */ 0x902, /* PUSHCS32 */ /* Table24 */ 0x40, /* ADC8mr */ 0x44, /* ADC8rr */ /* Table26 */ 0x2e, /* ADC32mr */ 0x32, /* ADC32rr */ /* Table28 */ 0x43, /* ADC8rm */ 0x45, /* ADC8rr_REV */ /* Table30 */ 0x31, /* ADC32rm */ 0x33, /* ADC32rr_REV */ /* Table32 */ 0x3d, /* ADC8i8 */ /* Table33 */ 0x2b, /* ADC32i32 */ /* Table34 */ 0x911, /* PUSHSS32 */ /* Table35 */ 0x89a, /* POPSS32 */ /* Table36 */ 0xa2a, /* SBB8mr */ 0xa2e, /* SBB8rr */ /* Table38 */ 0xa18, /* SBB32mr */ 0xa1c, /* SBB32rr */ /* Table40 */ 0xa2d, /* SBB8rm */ 0xa2f, /* SBB8rr_REV */ /* Table42 */ 0xa1b, /* SBB32rm */ 0xa1d, /* SBB32rr_REV */ /* Table44 */ 0xa27, /* SBB8i8 */ /* Table45 */ 0xa15, /* SBB32i32 */ /* Table46 */ 0x904, /* PUSHDS32 */ /* Table47 */ 0x88d, /* POPDS32 */ /* Table48 */ 0xce, /* AND8mr */ 0xd2, /* AND8rr */ /* Table50 */ 0xbc, /* AND32mr */ 0xc0, /* AND32rr */ /* Table52 */ 0xd1, /* AND8rm */ 0xd3, /* AND8rr_REV */ /* Table54 */ 0xbf, /* AND32rm */ 0xc1, /* AND32rr_REV */ /* Table56 */ 0xcb, /* AND8i8 */ /* Table57 */ 0xb9, /* AND32i32 */ /* Table58 */ 0x294, /* DAA */ /* Table59 */ 0xb2f, /* SUB8mr */ 0xb33, /* SUB8rr */ /* Table61 */ 0xb1d, /* SUB32mr */ 0xb21, /* SUB32rr */ /* Table63 */ 0xb32, /* SUB8rm */ 0xb34, /* SUB8rr_REV */ /* Table65 */ 0xb20, /* SUB32rm */ 0xb22, /* SUB32rr_REV */ /* Table67 */ 0xb2c, /* SUB8i8 */ /* Table68 */ 0xb1a, /* SUB32i32 */ /* Table69 */ 0x295, /* DAS */ /* Table70 */ 0x2277, /* XOR8mr */ 0x227b, /* XOR8rr */ /* Table72 */ 0x2265, /* XOR32mr */ 0x2269, /* XOR32rr */ /* Table74 */ 0x227a, /* XOR8rm */ 0x227c, /* XOR8rr_REV */ /* Table76 */ 0x2268, /* XOR32rm */ 0x226a, /* XOR32rr_REV */ /* Table78 */ 0x2274, /* XOR8i8 */ /* Table79 */ 0x2262, /* XOR32i32 */ /* Table80 */ 0x16, /* AAA */ /* Table81 */ 0x22a, /* CMP8mr */ 0x22e, /* CMP8rr */ /* Table83 */ 0x218, /* CMP32mr */ 0x21c, /* CMP32rr */ /* Table85 */ 0x22d, /* CMP8rm */ 0x22f, /* CMP8rr_REV */ /* Table87 */ 0x21b, /* CMP32rm */ 0x21d, /* CMP32rr_REV */ /* Table89 */ 0x227, /* CMP8i8 */ /* Table90 */ 0x215, /* CMP32i32 */ /* Table91 */ 0x19, /* AAS */ /* Table92 */ 0x39b, /* INC32r_alt */ /* Table93 */ 0x29c, /* DEC32r_alt */ /* Table94 */ 0x8f6, /* PUSH32r */ /* Table95 */ 0x87e, /* POP32r */ /* Table96 */ 0x900, /* PUSHA32 */ /* Table97 */ 0x885, /* POPA32 */ /* Table98 */ 0x11e, /* BOUNDS32rm */ 0x0, /* */ /* Table100 */ 0xe0, /* ARPL16mr */ 0xe1, /* ARPL16rr */ /* Table102 */ 0x296, /* DATA16_PREFIX */ /* Table103 */ 0x913, /* PUSHi32 */ /* Table104 */ 0x381, /* IMUL32rmi */ 0x384, /* IMUL32rri */ /* Table106 */ 0x8f5, /* PUSH32i8 */ /* Table107 */ 0x382, /* IMUL32rmi8 */ 0x385, /* IMUL32rri8 */ /* Table109 */ 0x3a0, /* INSB */ /* Table110 */ 0x3a5, /* INSL */ /* Table111 */ 0x790, /* OUTSB */ /* Table112 */ 0x791, /* OUTSL */ /* Table113 */ 0x46d, /* JO_1 */ /* Table114 */ 0x464, /* JNO_1 */ /* Table115 */ 0x444, /* JB_1 */ /* Table116 */ 0x43b, /* JAE_1 */ /* Table117 */ 0x449, /* JE_1 */ /* Table118 */ 0x461, /* JNE_1 */ /* Table119 */ 0x441, /* JBE_1 */ /* Table120 */ 0x43e, /* JA_1 */ /* Table121 */ 0x474, /* JS_1 */ /* Table122 */ 0x46a, /* JNS_1 */ /* Table123 */ 0x470, /* JP_1 */ /* Table124 */ 0x467, /* JNP_1 */ /* Table125 */ 0x455, /* JL_1 */ /* Table126 */ 0x44c, /* JGE_1 */ /* Table127 */ 0x452, /* JLE_1 */ /* Table128 */ 0x44f, /* JG_1 */ /* Table129 */ 0x6f, /* ADD8mi */ 0x77e, /* OR8mi */ 0x3e, /* ADC8mi */ 0xa28, /* SBB8mi */ 0xcc, /* AND8mi */ 0xb2d, /* SUB8mi */ 0x2275, /* XOR8mi */ 0x228, /* CMP8mi */ 0x72, /* ADD8ri */ 0x781, /* OR8ri */ 0x41, /* ADC8ri */ 0xa2b, /* SBB8ri */ 0xcf, /* AND8ri */ 0xb30, /* SUB8ri */ 0x2278, /* XOR8ri */ 0x22b, /* CMP8ri */ /* Table145 */ 0x57, /* ADD32mi */ 0x76b, /* OR32mi */ 0x2c, /* ADC32mi */ 0xa16, /* SBB32mi */ 0xba, /* AND32mi */ 0xb1b, /* SUB32mi */ 0x2263, /* XOR32mi */ 0x216, /* CMP32mi */ 0x5a, /* ADD32ri */ 0x76f, /* OR32ri */ 0x2f, /* ADC32ri */ 0xa19, /* SBB32ri */ 0xbd, /* AND32ri */ 0xb1e, /* SUB32ri */ 0x2266, /* XOR32ri */ 0x219, /* CMP32ri */ /* Table161 */ 0x70, /* ADD8mi8 */ 0x77f, /* OR8mi8 */ 0x3f, /* ADC8mi8 */ 0xa29, /* SBB8mi8 */ 0xcd, /* AND8mi8 */ 0xb2e, /* SUB8mi8 */ 0x2276, /* XOR8mi8 */ 0x229, /* CMP8mi8 */ 0x73, /* ADD8ri8 */ 0x782, /* OR8ri8 */ 0x42, /* ADC8ri8 */ 0xa2c, /* SBB8ri8 */ 0xd0, /* AND8ri8 */ 0xb31, /* SUB8ri8 */ 0x2279, /* XOR8ri8 */ 0x22c, /* CMP8ri8 */ /* Table177 */ 0x58, /* ADD32mi8 */ 0x76c, /* OR32mi8 */ 0x2d, /* ADC32mi8 */ 0xa17, /* SBB32mi8 */ 0xbb, /* AND32mi8 */ 0xb1c, /* SUB32mi8 */ 0x2264, /* XOR32mi8 */ 0x217, /* CMP32mi8 */ 0x5b, /* ADD32ri8 */ 0x770, /* OR32ri8 */ 0x30, /* ADC32ri8 */ 0xa1a, /* SBB32ri8 */ 0xbe, /* AND32ri8 */ 0xb1f, /* SUB32ri8 */ 0x2267, /* XOR32ri8 */ 0x21a, /* CMP32ri8 */ /* Table193 */ 0xb9d, /* TEST8rm */ 0xb9e, /* TEST8rr */ /* Table195 */ 0xb8e, /* TEST32rm */ 0xb8f, /* TEST32rr */ /* Table197 */ 0x224e, /* XCHG8rm */ 0x224f, /* XCHG8rr */ /* Table199 */ 0x2249, /* XCHG32rm */ 0x224a, /* XCHG32rr */ /* Table201 */ 0x681, /* MOV8mr */ 0x68a, /* MOV8rr */ /* Table203 */ 0x655, /* MOV32mr */ 0x661, /* MOV32rr */ /* Table205 */ 0x688, /* MOV8rm */ 0x68c, /* MOV8rr_REV */ /* Table207 */ 0x660, /* MOV32rm */ 0x662, /* MOV32rr_REV */ /* Table209 */ 0x656, /* MOV32ms */ 0x663, /* MOV32rs */ /* Table211 */ 0x4d8, /* LEA32r */ 0x0, /* */ /* Table213 */ 0x664, /* MOV32sm */ 0x665, /* MOV32sr */ /* Table215 */ 0x87f, /* POP32rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x880, /* POP32rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table231 */ 0x739, /* NOOP */ /* Table232 */ 0x2247, /* XCHG32ar */ /* Table233 */ 0x293, /* CWDE */ /* Table234 */ 0x16b, /* CDQ */ /* Table235 */ 0x2f1, /* FARCALL32i */ /* Table236 */ 0x222d, /* WAIT */ /* Table237 */ 0x908, /* PUSHF32 */ /* Table238 */ 0x891, /* POPF32 */ /* Table239 */ 0x9d6, /* SAHF */ /* Table240 */ 0x4b4, /* LAHF */ /* Table241 */ 0x67e, /* MOV8ao32 */ /* Table242 */ 0x650, /* MOV32ao32 */ /* Table243 */ 0x684, /* MOV8o32a */ /* Table244 */ 0x658, /* MOV32o32a */ /* Table245 */ 0x6c5, /* MOVSB */ /* Table246 */ 0x6ce, /* MOVSL */ /* Table247 */ 0x238, /* CMPSB */ /* Table248 */ 0x23d, /* CMPSL */ /* Table249 */ 0xb97, /* TEST8i8 */ /* Table250 */ 0xb89, /* TEST32i32 */ /* Table251 */ 0xaef, /* STOSB */ /* Table252 */ 0xaf0, /* STOSL */ /* Table253 */ 0x530, /* LODSB */ /* Table254 */ 0x531, /* LODSL */ /* Table255 */ 0xa30, /* SCASB */ /* Table256 */ 0xa31, /* SCASL */ /* Table257 */ 0x686, /* MOV8ri */ /* Table258 */ 0x65d, /* MOV32ri */ /* Table259 */ 0x9a3, /* ROL8mi */ 0x9bb, /* ROR8mi */ 0x92a, /* RCL8mi */ 0x94a, /* RCR8mi */ 0xa88, /* SHL8mi */ 0xab0, /* SHR8mi */ 0x9eb, /* SAL8mi */ 0xa04, /* SAR8mi */ 0x9a6, /* ROL8ri */ 0x9be, /* ROR8ri */ 0x92d, /* RCL8ri */ 0x94d, /* RCR8ri */ 0xa8b, /* SHL8ri */ 0xab3, /* SHR8ri */ 0x9ee, /* SAL8ri */ 0xa07, /* SAR8ri */ /* Table275 */ 0x997, /* ROL32mi */ 0x9af, /* ROR32mi */ 0x91e, /* RCL32mi */ 0x93e, /* RCR32mi */ 0xa7c, /* SHL32mi */ 0xaa4, /* SHR32mi */ 0x9df, /* SAL32mi */ 0x9f8, /* SAR32mi */ 0x99a, /* ROL32ri */ 0x9b2, /* ROR32ri */ 0x921, /* RCL32ri */ 0x941, /* RCR32ri */ 0xa7f, /* SHL32ri */ 0xaa7, /* SHR32ri */ 0x9e2, /* SAL32ri */ 0x9fb, /* SAR32ri */ /* Table291 */ 0x988, /* RETIL */ /* Table292 */ 0x98b, /* RETL */ /* Table293 */ 0x4de, /* LES32rm */ 0x0, /* */ /* Table295 */ 0x4c4, /* LDS32rm */ 0x0, /* */ /* Table297 */ 0x680, /* MOV8mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x687, /* MOV8ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2237, /* XABORT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table369 */ 0x654, /* MOV32mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x65f, /* MOV32ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2243, /* XBEGIN_4 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table441 */ 0x2e9, /* ENTER */ /* Table442 */ 0x4db, /* LEAVE */ /* Table443 */ 0x537, /* LRETIL */ /* Table444 */ 0x53a, /* LRETL */ /* Table445 */ 0x3a9, /* INT3 */ /* Table446 */ 0x3a7, /* INT */ /* Table447 */ 0x3aa, /* INTO */ /* Table448 */ 0x3b6, /* IRET32 */ /* Table449 */ 0x9a1, /* ROL8m1 */ 0x9b9, /* ROR8m1 */ 0x928, /* RCL8m1 */ 0x948, /* RCR8m1 */ 0xa86, /* SHL8m1 */ 0xaae, /* SHR8m1 */ 0x9e9, /* SAL8m1 */ 0xa02, /* SAR8m1 */ 0x9a4, /* ROL8r1 */ 0x9bc, /* ROR8r1 */ 0x92b, /* RCL8r1 */ 0x94b, /* RCR8r1 */ 0xa89, /* SHL8r1 */ 0xab1, /* SHR8r1 */ 0x9ec, /* SAL8r1 */ 0xa05, /* SAR8r1 */ /* Table465 */ 0x995, /* ROL32m1 */ 0x9ad, /* ROR32m1 */ 0x91c, /* RCL32m1 */ 0x93c, /* RCR32m1 */ 0xa7a, /* SHL32m1 */ 0xaa2, /* SHR32m1 */ 0x9dd, /* SAL32m1 */ 0x9f6, /* SAR32m1 */ 0x998, /* ROL32r1 */ 0x9b0, /* ROR32r1 */ 0x91f, /* RCL32r1 */ 0x93f, /* RCR32r1 */ 0xa7d, /* SHL32r1 */ 0xaa5, /* SHR32r1 */ 0x9e0, /* SAL32r1 */ 0x9f9, /* SAR32r1 */ /* Table481 */ 0x9a2, /* ROL8mCL */ 0x9ba, /* ROR8mCL */ 0x929, /* RCL8mCL */ 0x949, /* RCR8mCL */ 0xa87, /* SHL8mCL */ 0xaaf, /* SHR8mCL */ 0x9ea, /* SAL8mCL */ 0xa03, /* SAR8mCL */ 0x9a5, /* ROL8rCL */ 0x9bd, /* ROR8rCL */ 0x92c, /* RCL8rCL */ 0x94c, /* RCR8rCL */ 0xa8a, /* SHL8rCL */ 0xab2, /* SHR8rCL */ 0x9ed, /* SAL8rCL */ 0xa06, /* SAR8rCL */ /* Table497 */ 0x996, /* ROL32mCL */ 0x9ae, /* ROR32mCL */ 0x91d, /* RCL32mCL */ 0x93d, /* RCR32mCL */ 0xa7b, /* SHL32mCL */ 0xaa3, /* SHR32mCL */ 0x9de, /* SAL32mCL */ 0x9f7, /* SAR32mCL */ 0x999, /* ROL32rCL */ 0x9b1, /* ROR32rCL */ 0x920, /* RCL32rCL */ 0x940, /* RCR32rCL */ 0xa7e, /* SHL32rCL */ 0xaa6, /* SHR32rCL */ 0x9e1, /* SAL32rCL */ 0x9fa, /* SAR32rCL */ /* Table513 */ 0x18, /* AAM8i8 */ /* Table514 */ 0x17, /* AAD8i8 */ /* Table515 */ 0x9ef, /* SALC */ /* Table516 */ 0x2258, /* XLAT */ /* Table517 */ 0x87, /* ADD_F32m */ 0x71b, /* MUL_F32m */ 0x2fb, /* FCOM32m */ 0x2fd, /* FCOMP32m */ 0xb53, /* SUB_F32m */ 0xb39, /* SUBR_F32m */ 0x2c7, /* DIV_F32m */ 0x2ad, /* DIVR_F32m */ 0x8c, /* ADD_FST0r */ 0x720, /* MUL_FST0r */ 0x255, /* COM_FST0r */ 0x252, /* COMP_FST0r */ 0xb58, /* SUB_FST0r */ 0xb3e, /* SUBR_FST0r */ 0x2cc, /* DIV_FST0r */ 0x2b2, /* DIVR_FST0r */ /* Table533 */ 0x4c7, /* LD_F32m */ 0x0, /* */ 0xaf7, /* ST_F32m */ 0xafc, /* ST_FP32m */ 0x309, /* FLDENVm */ 0x308, /* FLDCW16m */ 0x329, /* FSTENVm */ 0x312, /* FNSTCW16m */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x4d6, /* LD_Frr */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x2250, /* XCH_F */ 0x311, /* FNOP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0xaff, /* ST_FPNCEST0r */ 0x16d, /* CHS_F */ 0x1a, /* ABS_F */ 0x0, /* */ 0x0, /* */ 0xba6, /* TST_F */ 0x32a, /* FXAM */ 0x0, /* */ 0x0, /* */ 0x4c6, /* LD_F1 */ 0x30b, /* FLDL2T */ 0x30a, /* FLDL2E */ 0x30e, /* FLDPI */ 0x30c, /* FLDLG2 */ 0x30d, /* FLDLN2 */ 0x4c5, /* LD_F0 */ 0x0, /* */ 0x2ee, /* F2XM1 */ 0x330, /* FYL2X */ 0x321, /* FPTAN */ 0x31e, /* FPATAN */ 0x32f, /* FXTRACT */ 0x320, /* FPREM1 */ 0x300, /* FDECSTP */ 0x307, /* FINCSTP */ 0x31f, /* FPREM */ 0x331, /* FYL2XP1 */ 0xae5, /* SQRT_F */ 0x328, /* FSINCOS */ 0x323, /* FRNDINT */ 0x326, /* FSCALE */ 0xacb, /* SIN_F */ 0x256, /* COS_F */ /* Table605 */ 0x8a, /* ADD_FI32m */ 0x71e, /* MUL_FI32m */ 0x304, /* FICOM32m */ 0x306, /* FICOMP32m */ 0xb56, /* SUB_FI32m */ 0xb3c, /* SUBR_FI32m */ 0x2ca, /* DIV_FI32m */ 0x2b0, /* DIVR_FI32m */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x197, /* CMOVB_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x1a1, /* CMOVE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x193, /* CMOVBE_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x1f1, /* CMOVP_F */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xbba, /* UCOM_FPPr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table677 */ 0x36b, /* ILD_F32m */ 0x3b9, /* ISTT_FP32m */ 0x3c5, /* IST_F32m */ 0x3c7, /* IST_FP32m */ 0x0, /* */ 0x4c9, /* LD_F80m */ 0x0, /* */ 0xafe, /* ST_FP80m */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1c1, /* CMOVNB_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1cb, /* CMOVNE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1bd, /* CMOVNBE_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x1db, /* CMOVNP_F */ 0x2294, /* feni8087_nop */ 0x2293, /* fdisi8087_nop */ 0x30f, /* FNCLEX */ 0x310, /* FNINIT */ 0x327, /* FSETPM */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0xbb9, /* UCOM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x254, /* COM_FIr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table749 */ 0x88, /* ADD_F64m */ 0x71c, /* MUL_F64m */ 0x2fc, /* FCOM64m */ 0x2fe, /* FCOMP64m */ 0xb54, /* SUB_F64m */ 0xb3a, /* SUBR_F64m */ 0x2c8, /* DIV_F64m */ 0x2ae, /* DIVR_F64m */ 0x9b, /* ADD_FrST0 */ 0x72f, /* MUL_FrST0 */ 0xafb, /* ST_FCOMST0r */ 0xaf9, /* ST_FCOMPST0r */ 0xb4a, /* SUBR_FrST0 */ 0xb67, /* SUB_FrST0 */ 0x2be, /* DIVR_FrST0 */ 0x2db, /* DIV_FrST0 */ /* Table765 */ 0x4c8, /* LD_F64m */ 0x3ba, /* ISTT_FP64m */ 0xaf8, /* ST_F64m */ 0xafd, /* ST_FP64m */ 0x324, /* FRSTORm */ 0x0, /* */ 0x325, /* FSAVEm */ 0x314, /* FNSTSWm */ 0x302, /* FFREE */ 0xb03, /* ST_FXCHST0r */ 0xb10, /* ST_Frr */ 0xb02, /* ST_FPrr */ 0xbc2, /* UCOM_Fr */ 0xbbb, /* UCOM_FPr */ 0x0, /* */ 0x0, /* */ /* Table781 */ 0x89, /* ADD_FI16m */ 0x71d, /* MUL_FI16m */ 0x303, /* FICOM16m */ 0x305, /* FICOMP16m */ 0xb55, /* SUB_FI16m */ 0xb3b, /* SUBR_FI16m */ 0x2c9, /* DIV_FI16m */ 0x2af, /* DIVR_FI16m */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x8b, /* ADD_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0x71f, /* MUL_FPrST0 */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0xafa, /* ST_FCOMPST0r_alt */ 0x0, /* */ 0x2ff, /* FCOMPP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb3d, /* SUBR_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0xb57, /* SUB_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2b1, /* DIVR_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ 0x2cb, /* DIV_FPrST0 */ /* Table853 */ 0x36a, /* ILD_F16m */ 0x3b8, /* ISTT_FP16m */ 0x3c4, /* IST_F16m */ 0x3c6, /* IST_FP16m */ 0x2f9, /* FBLDm */ 0x36c, /* ILD_F64m */ 0x2fa, /* FBSTPm */ 0x3c8, /* IST_FP64m */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0x322, /* FP_FFREEP */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb04, /* ST_FXCHST0r_alt */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb00, /* ST_FPST0r */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0xb01, /* ST_FPST0r_alt */ 0x313, /* FNSTSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0xbb8, /* UCOM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x253, /* COM_FIPr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table925 */ 0x536, /* LOOPNE */ /* Table926 */ 0x535, /* LOOPE */ /* Table927 */ 0x534, /* LOOP */ /* Table928 */ 0x448, /* JECXZ */ /* Table929 */ 0x394, /* IN8ri */ /* Table930 */ 0x392, /* IN32ri */ /* Table931 */ 0x78e, /* OUT8ir */ /* Table932 */ 0x78c, /* OUT32ir */ /* Table933 */ 0x169, /* CALLpcrel32 */ /* Table934 */ 0x460, /* JMP_4 */ /* Table935 */ 0x2f6, /* FARJMP32i */ /* Table936 */ 0x45e, /* JMP_1 */ /* Table937 */ 0x395, /* IN8rr */ /* Table938 */ 0x393, /* IN32rr */ /* Table939 */ 0x78f, /* OUT8rr */ /* Table940 */ 0x78d, /* OUT32rr */ /* Table941 */ 0x519, /* LOCK_PREFIX */ /* Table942 */ 0x3a8, /* INT1 */ /* Table943 */ 0x978, /* REPNE_PREFIX */ /* Table944 */ 0x980, /* REP_PREFIX */ /* Table945 */ 0x35d, /* HLT */ /* Table946 */ 0x17a, /* CMC */ /* Table947 */ 0xb98, /* TEST8mi */ 0xb99, /* TEST8mi_alt */ 0x75f, /* NOT8m */ 0x737, /* NEG8m */ 0x709, /* MUL8m */ 0x38e, /* IMUL8m */ 0x2a7, /* DIV8m */ 0x368, /* IDIV8m */ 0xb9a, /* TEST8ri */ 0xb9c, /* TEST8ri_alt */ 0x760, /* NOT8r */ 0x738, /* NEG8r */ 0x70a, /* MUL8r */ 0x38f, /* IMUL8r */ 0x2a8, /* DIV8r */ 0x369, /* IDIV8r */ /* Table963 */ 0xb8a, /* TEST32mi */ 0xb8b, /* TEST32mi_alt */ 0x75b, /* NOT32m */ 0x733, /* NEG32m */ 0x705, /* MUL32m */ 0x37e, /* IMUL32m */ 0x2a3, /* DIV32m */ 0x364, /* IDIV32m */ 0xb8c, /* TEST32ri */ 0xb8d, /* TEST32ri_alt */ 0x75c, /* NOT32r */ 0x734, /* NEG32r */ 0x706, /* MUL32r */ 0x37f, /* IMUL32r */ 0x2a4, /* DIV32r */ 0x365, /* IDIV32r */ /* Table979 */ 0x172, /* CLC */ /* Table980 */ 0xaea, /* STC */ /* Table981 */ 0x177, /* CLI */ /* Table982 */ 0xaed, /* STI */ /* Table983 */ 0x173, /* CLD */ /* Table984 */ 0xaeb, /* STD */ /* Table985 */ 0x39e, /* INC8m */ 0x29f, /* DEC8m */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x39f, /* INC8r */ 0x2a0, /* DEC8r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1001 */ 0x399, /* INC32m */ 0x29a, /* DEC32m */ 0x163, /* CALL32m */ 0x2f2, /* FARCALL32m */ 0x45a, /* JMP32m */ 0x2f7, /* FARJMP32m */ 0x8f7, /* PUSH32rmm */ 0x0, /* */ 0x39a, /* INC32r */ 0x29b, /* DEC32r */ 0x164, /* CALL32r */ 0x0, /* */ 0x45b, /* JMP32r */ 0x0, /* */ 0x8f8, /* PUSH32rmr */ 0x0, /* */ /* Table1017 */ 0x98e, /* REX64_PREFIX */ /* Table1018 */ 0x8fc, /* PUSH64r */ /* Table1019 */ 0x881, /* POP64r */ /* Table1020 */ 0x6e4, /* MOVSX64rm32_alt */ 0x6e1, /* MOVSX64_NOREXrr32 */ /* Table1022 */ 0x8fa, /* PUSH64i32 */ /* Table1023 */ 0x8fb, /* PUSH64i8 */ /* Table1024 */ 0x4d9, /* LEA64_32r */ 0x0, /* */ /* Table1026 */ 0x882, /* POP64rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x883, /* POP64rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1042 */ 0x2248, /* XCHG32ar64 */ /* Table1043 */ 0x909, /* PUSHF64 */ /* Table1044 */ 0x892, /* POPF64 */ /* Table1045 */ 0x67f, /* MOV8ao64 */ /* Table1046 */ 0x651, /* MOV32ao64 */ /* Table1047 */ 0x685, /* MOV8o64a */ /* Table1048 */ 0x659, /* MOV32o64a */ /* Table1049 */ 0x989, /* RETIQ */ /* Table1050 */ 0x98c, /* RETQ */ /* Table1051 */ 0x4dc, /* LEAVE64 */ /* Table1052 */ 0x473, /* JRCXZ */ /* Table1053 */ 0x166, /* CALL64pcrel32 */ /* Table1054 */ 0x399, /* INC32m */ 0x29a, /* DEC32m */ 0x165, /* CALL64m */ 0x2f2, /* FARCALL32m */ 0x45c, /* JMP64m */ 0x2f7, /* FARJMP32m */ 0x8fd, /* PUSH64rmm */ 0x0, /* */ 0x39a, /* INC32r */ 0x29b, /* DEC32r */ 0x167, /* CALL64r */ 0x0, /* */ 0x45d, /* JMP64r */ 0x0, /* */ 0x8fe, /* PUSH64rmr */ 0x0, /* */ /* Table1070 */ 0x4d, /* ADD16mr */ 0x53, /* ADD16rr */ /* Table1072 */ 0x52, /* ADD16rm */ 0x55, /* ADD16rr_REV */ /* Table1074 */ 0x4a, /* ADD16i16 */ /* Table1075 */ 0x905, /* PUSHES16 */ /* Table1076 */ 0x88e, /* POPES16 */ /* Table1077 */ 0x764, /* OR16mr */ 0x768, /* OR16rr */ /* Table1079 */ 0x767, /* OR16rm */ 0x769, /* OR16rr_REV */ /* Table1081 */ 0x761, /* OR16i16 */ /* Table1082 */ 0x901, /* PUSHCS16 */ /* Table1083 */ 0x25, /* ADC16mr */ 0x29, /* ADC16rr */ /* Table1085 */ 0x28, /* ADC16rm */ 0x2a, /* ADC16rr_REV */ /* Table1087 */ 0x22, /* ADC16i16 */ /* Table1088 */ 0x910, /* PUSHSS16 */ /* Table1089 */ 0x899, /* POPSS16 */ /* Table1090 */ 0xa0f, /* SBB16mr */ 0xa13, /* SBB16rr */ /* Table1092 */ 0xa12, /* SBB16rm */ 0xa14, /* SBB16rr_REV */ /* Table1094 */ 0xa0c, /* SBB16i16 */ /* Table1095 */ 0x903, /* PUSHDS16 */ /* Table1096 */ 0x88c, /* POPDS16 */ /* Table1097 */ 0xb3, /* AND16mr */ 0xb7, /* AND16rr */ /* Table1099 */ 0xb6, /* AND16rm */ 0xb8, /* AND16rr_REV */ /* Table1101 */ 0xb0, /* AND16i16 */ /* Table1102 */ 0xb14, /* SUB16mr */ 0xb18, /* SUB16rr */ /* Table1104 */ 0xb17, /* SUB16rm */ 0xb19, /* SUB16rr_REV */ /* Table1106 */ 0xb11, /* SUB16i16 */ /* Table1107 */ 0x225c, /* XOR16mr */ 0x2260, /* XOR16rr */ /* Table1109 */ 0x225f, /* XOR16rm */ 0x2261, /* XOR16rr_REV */ /* Table1111 */ 0x2259, /* XOR16i16 */ /* Table1112 */ 0x20f, /* CMP16mr */ 0x213, /* CMP16rr */ /* Table1114 */ 0x212, /* CMP16rm */ 0x214, /* CMP16rr_REV */ /* Table1116 */ 0x20c, /* CMP16i16 */ /* Table1117 */ 0x398, /* INC16r_alt */ /* Table1118 */ 0x299, /* DEC16r_alt */ /* Table1119 */ 0x8f2, /* PUSH16r */ /* Table1120 */ 0x87b, /* POP16r */ /* Table1121 */ 0x8ff, /* PUSHA16 */ /* Table1122 */ 0x884, /* POPA16 */ /* Table1123 */ 0x11d, /* BOUNDS16rm */ 0x0, /* */ /* Table1125 */ 0x912, /* PUSHi16 */ /* Table1126 */ 0x379, /* IMUL16rmi */ 0x37c, /* IMUL16rri */ /* Table1128 */ 0x8f1, /* PUSH16i8 */ /* Table1129 */ 0x37a, /* IMUL16rmi8 */ 0x37d, /* IMUL16rri8 */ /* Table1131 */ 0x3a6, /* INSW */ /* Table1132 */ 0x792, /* OUTSW */ /* Table1133 */ 0x4b, /* ADD16mi */ 0x762, /* OR16mi */ 0x23, /* ADC16mi */ 0xa0d, /* SBB16mi */ 0xb1, /* AND16mi */ 0xb12, /* SUB16mi */ 0x225a, /* XOR16mi */ 0x20d, /* CMP16mi */ 0x4e, /* ADD16ri */ 0x765, /* OR16ri */ 0x26, /* ADC16ri */ 0xa10, /* SBB16ri */ 0xb4, /* AND16ri */ 0xb15, /* SUB16ri */ 0x225d, /* XOR16ri */ 0x210, /* CMP16ri */ /* Table1149 */ 0x4c, /* ADD16mi8 */ 0x763, /* OR16mi8 */ 0x24, /* ADC16mi8 */ 0xa0e, /* SBB16mi8 */ 0xb2, /* AND16mi8 */ 0xb13, /* SUB16mi8 */ 0x225b, /* XOR16mi8 */ 0x20e, /* CMP16mi8 */ 0x4f, /* ADD16ri8 */ 0x766, /* OR16ri8 */ 0x27, /* ADC16ri8 */ 0xa11, /* SBB16ri8 */ 0xb5, /* AND16ri8 */ 0xb16, /* SUB16ri8 */ 0x225e, /* XOR16ri8 */ 0x211, /* CMP16ri8 */ /* Table1165 */ 0xb87, /* TEST16rm */ 0xb88, /* TEST16rr */ /* Table1167 */ 0x2245, /* XCHG16rm */ 0x2246, /* XCHG16rr */ /* Table1169 */ 0x642, /* MOV16mr */ 0x64a, /* MOV16rr */ /* Table1171 */ 0x649, /* MOV16rm */ 0x64b, /* MOV16rr_REV */ /* Table1173 */ 0x643, /* MOV16ms */ 0x64c, /* MOV16rs */ /* Table1175 */ 0x4d7, /* LEA16r */ 0x0, /* */ /* Table1177 */ 0x64d, /* MOV16sm */ 0x64e, /* MOV16sr */ /* Table1179 */ 0x87c, /* POP16rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x87d, /* POP16rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1195 */ 0x2244, /* XCHG16ar */ /* Table1196 */ 0x16a, /* CBW */ /* Table1197 */ 0x292, /* CWD */ /* Table1198 */ 0x2ef, /* FARCALL16i */ /* Table1199 */ 0x907, /* PUSHF16 */ /* Table1200 */ 0x890, /* POPF16 */ /* Table1201 */ 0x63f, /* MOV16ao32 */ /* Table1202 */ 0x645, /* MOV16o32a */ /* Table1203 */ 0x6d8, /* MOVSW */ /* Table1204 */ 0x243, /* CMPSW */ /* Table1205 */ 0xb82, /* TEST16i16 */ /* Table1206 */ 0xaf2, /* STOSW */ /* Table1207 */ 0x533, /* LODSW */ /* Table1208 */ 0xa33, /* SCASW */ /* Table1209 */ 0x647, /* MOV16ri */ /* Table1210 */ 0x991, /* ROL16mi */ 0x9a9, /* ROR16mi */ 0x918, /* RCL16mi */ 0x938, /* RCR16mi */ 0xa76, /* SHL16mi */ 0xa9e, /* SHR16mi */ 0x9d9, /* SAL16mi */ 0x9f2, /* SAR16mi */ 0x994, /* ROL16ri */ 0x9ac, /* ROR16ri */ 0x91b, /* RCL16ri */ 0x93b, /* RCR16ri */ 0xa79, /* SHL16ri */ 0xaa1, /* SHR16ri */ 0x9dc, /* SAL16ri */ 0x9f5, /* SAR16ri */ /* Table1226 */ 0x98a, /* RETIW */ /* Table1227 */ 0x98d, /* RETW */ /* Table1228 */ 0x4dd, /* LES16rm */ 0x0, /* */ /* Table1230 */ 0x4c3, /* LDS16rm */ 0x0, /* */ /* Table1232 */ 0x641, /* MOV16mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x648, /* MOV16ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2242, /* XBEGIN_2 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1304 */ 0x539, /* LRETIW */ /* Table1305 */ 0x53c, /* LRETW */ /* Table1306 */ 0x3b5, /* IRET16 */ /* Table1307 */ 0x98f, /* ROL16m1 */ 0x9a7, /* ROR16m1 */ 0x916, /* RCL16m1 */ 0x936, /* RCR16m1 */ 0xa74, /* SHL16m1 */ 0xa9c, /* SHR16m1 */ 0x9d7, /* SAL16m1 */ 0x9f0, /* SAR16m1 */ 0x992, /* ROL16r1 */ 0x9aa, /* ROR16r1 */ 0x919, /* RCL16r1 */ 0x939, /* RCR16r1 */ 0xa77, /* SHL16r1 */ 0xa9f, /* SHR16r1 */ 0x9da, /* SAL16r1 */ 0x9f3, /* SAR16r1 */ /* Table1323 */ 0x990, /* ROL16mCL */ 0x9a8, /* ROR16mCL */ 0x917, /* RCL16mCL */ 0x937, /* RCR16mCL */ 0xa75, /* SHL16mCL */ 0xa9d, /* SHR16mCL */ 0x9d8, /* SAL16mCL */ 0x9f1, /* SAR16mCL */ 0x993, /* ROL16rCL */ 0x9ab, /* ROR16rCL */ 0x91a, /* RCL16rCL */ 0x93a, /* RCR16rCL */ 0xa78, /* SHL16rCL */ 0xaa0, /* SHR16rCL */ 0x9db, /* SAL16rCL */ 0x9f4, /* SAR16rCL */ /* Table1339 */ 0x390, /* IN16ri */ /* Table1340 */ 0x78a, /* OUT16ir */ /* Table1341 */ 0x168, /* CALLpcrel16 */ /* Table1342 */ 0x45f, /* JMP_2 */ /* Table1343 */ 0x2f4, /* FARJMP16i */ /* Table1344 */ 0x391, /* IN16rr */ /* Table1345 */ 0x78b, /* OUT16rr */ /* Table1346 */ 0xb83, /* TEST16mi */ 0xb84, /* TEST16mi_alt */ 0x759, /* NOT16m */ 0x731, /* NEG16m */ 0x703, /* MUL16m */ 0x376, /* IMUL16m */ 0x2a1, /* DIV16m */ 0x362, /* IDIV16m */ 0xb85, /* TEST16ri */ 0xb86, /* TEST16ri_alt */ 0x75a, /* NOT16r */ 0x732, /* NEG16r */ 0x704, /* MUL16r */ 0x377, /* IMUL16r */ 0x2a2, /* DIV16r */ 0x363, /* IDIV16r */ /* Table1362 */ 0x396, /* INC16m */ 0x297, /* DEC16m */ 0x161, /* CALL16m */ 0x2f0, /* FARCALL16m */ 0x458, /* JMP16m */ 0x2f5, /* FARJMP16m */ 0x8f3, /* PUSH16rmm */ 0x0, /* */ 0x397, /* INC16r */ 0x298, /* DEC16r */ 0x162, /* CALL16r */ 0x0, /* */ 0x459, /* JMP16r */ 0x0, /* */ 0x8f4, /* PUSH16rmr */ 0x0, /* */ /* Table1378 */ 0x67d, /* MOV8ao16 */ /* Table1379 */ 0x64f, /* MOV32ao16 */ /* Table1380 */ 0x683, /* MOV8o16a */ /* Table1381 */ 0x657, /* MOV32o16a */ /* Table1382 */ 0x447, /* JCXZ */ /* Table1383 */ 0x63e, /* MOV16ao16 */ /* Table1384 */ 0x644, /* MOV16o16a */ /* Table1385 */ 0x7b7, /* PAUSE */ /* Table1386 */ 0x65, /* ADD64mr */ 0x6b, /* ADD64rr */ /* Table1388 */ 0x6a, /* ADD64rm */ 0x6d, /* ADD64rr_REV */ /* Table1390 */ 0x62, /* ADD64i32 */ /* Table1391 */ 0x777, /* OR64mr */ 0x77b, /* OR64rr */ /* Table1393 */ 0x77a, /* OR64rm */ 0x77c, /* OR64rr_REV */ /* Table1395 */ 0x774, /* OR64i32 */ /* Table1396 */ 0x37, /* ADC64mr */ 0x3b, /* ADC64rr */ /* Table1398 */ 0x3a, /* ADC64rm */ 0x3c, /* ADC64rr_REV */ /* Table1400 */ 0x34, /* ADC64i32 */ /* Table1401 */ 0xa21, /* SBB64mr */ 0xa25, /* SBB64rr */ /* Table1403 */ 0xa24, /* SBB64rm */ 0xa26, /* SBB64rr_REV */ /* Table1405 */ 0xa1e, /* SBB64i32 */ /* Table1406 */ 0xc5, /* AND64mr */ 0xc9, /* AND64rr */ /* Table1408 */ 0xc8, /* AND64rm */ 0xca, /* AND64rr_REV */ /* Table1410 */ 0xc2, /* AND64i32 */ /* Table1411 */ 0xb26, /* SUB64mr */ 0xb2a, /* SUB64rr */ /* Table1413 */ 0xb29, /* SUB64rm */ 0xb2b, /* SUB64rr_REV */ /* Table1415 */ 0xb23, /* SUB64i32 */ /* Table1416 */ 0x226e, /* XOR64mr */ 0x2272, /* XOR64rr */ /* Table1418 */ 0x2271, /* XOR64rm */ 0x2273, /* XOR64rr_REV */ /* Table1420 */ 0x226b, /* XOR64i32 */ /* Table1421 */ 0x221, /* CMP64mr */ 0x225, /* CMP64rr */ /* Table1423 */ 0x224, /* CMP64rm */ 0x226, /* CMP64rr_REV */ /* Table1425 */ 0x21e, /* CMP64i32 */ /* Table1426 */ 0x6e3, /* MOVSX64rm32 */ 0x6e7, /* MOVSX64rr32 */ /* Table1428 */ 0x389, /* IMUL64rmi32 */ 0x38c, /* IMUL64rri32 */ /* Table1430 */ 0x38a, /* IMUL64rmi8 */ 0x38d, /* IMUL64rri8 */ /* Table1432 */ 0x63, /* ADD64mi32 */ 0x775, /* OR64mi32 */ 0x35, /* ADC64mi32 */ 0xa1f, /* SBB64mi32 */ 0xc3, /* AND64mi32 */ 0xb24, /* SUB64mi32 */ 0x226c, /* XOR64mi32 */ 0x21f, /* CMP64mi32 */ 0x66, /* ADD64ri32 */ 0x778, /* OR64ri32 */ 0x38, /* ADC64ri32 */ 0xa22, /* SBB64ri32 */ 0xc6, /* AND64ri32 */ 0xb27, /* SUB64ri32 */ 0x226f, /* XOR64ri32 */ 0x222, /* CMP64ri32 */ /* Table1448 */ 0x64, /* ADD64mi8 */ 0x776, /* OR64mi8 */ 0x36, /* ADC64mi8 */ 0xa20, /* SBB64mi8 */ 0xc4, /* AND64mi8 */ 0xb25, /* SUB64mi8 */ 0x226d, /* XOR64mi8 */ 0x220, /* CMP64mi8 */ 0x68, /* ADD64ri8 */ 0x779, /* OR64ri8 */ 0x39, /* ADC64ri8 */ 0xa23, /* SBB64ri8 */ 0xc7, /* AND64ri8 */ 0xb28, /* SUB64ri8 */ 0x2270, /* XOR64ri8 */ 0x223, /* CMP64ri8 */ /* Table1464 */ 0xb95, /* TEST64rm */ 0xb96, /* TEST64rr */ /* Table1466 */ 0x224c, /* XCHG64rm */ 0x224d, /* XCHG64rr */ /* Table1468 */ 0x66b, /* MOV64mr */ 0x674, /* MOV64rr */ /* Table1470 */ 0x673, /* MOV64rm */ 0x675, /* MOV64rr_REV */ /* Table1472 */ 0x66c, /* MOV64ms */ 0x676, /* MOV64rs */ /* Table1474 */ 0x4da, /* LEA64r */ 0x0, /* */ /* Table1476 */ 0x677, /* MOV64sm */ 0x678, /* MOV64sr */ /* Table1478 */ 0x224b, /* XCHG64ar */ /* Table1479 */ 0x16c, /* CDQE */ /* Table1480 */ 0x25b, /* CQO */ /* Table1481 */ 0x667, /* MOV64ao64 */ /* Table1482 */ 0x66e, /* MOV64o64a */ /* Table1483 */ 0x6d1, /* MOVSQ */ /* Table1484 */ 0x23e, /* CMPSQ */ /* Table1485 */ 0xb90, /* TEST64i32 */ /* Table1486 */ 0xaf1, /* STOSQ */ /* Table1487 */ 0x532, /* LODSQ */ /* Table1488 */ 0xa32, /* SCASQ */ /* Table1489 */ 0x671, /* MOV64ri */ /* Table1490 */ 0x99d, /* ROL64mi */ 0x9b5, /* ROR64mi */ 0x924, /* RCL64mi */ 0x944, /* RCR64mi */ 0xa82, /* SHL64mi */ 0xaaa, /* SHR64mi */ 0x9e5, /* SAL64mi */ 0x9fe, /* SAR64mi */ 0x9a0, /* ROL64ri */ 0x9b8, /* ROR64ri */ 0x927, /* RCL64ri */ 0x947, /* RCR64ri */ 0xa85, /* SHL64ri */ 0xaad, /* SHR64ri */ 0x9e8, /* SAL64ri */ 0xa01, /* SAR64ri */ /* Table1506 */ 0x66a, /* MOV64mi32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2243, /* XBEGIN_4 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1578 */ 0x538, /* LRETIQ */ /* Table1579 */ 0x53b, /* LRETQ */ /* Table1580 */ 0x3b7, /* IRET64 */ /* Table1581 */ 0x99b, /* ROL64m1 */ 0x9b3, /* ROR64m1 */ 0x922, /* RCL64m1 */ 0x942, /* RCR64m1 */ 0xa80, /* SHL64m1 */ 0xaa8, /* SHR64m1 */ 0x9e3, /* SAL64m1 */ 0x9fc, /* SAR64m1 */ 0x99e, /* ROL64r1 */ 0x9b6, /* ROR64r1 */ 0x925, /* RCL64r1 */ 0x945, /* RCR64r1 */ 0xa83, /* SHL64r1 */ 0xaab, /* SHR64r1 */ 0x9e6, /* SAL64r1 */ 0x9ff, /* SAR64r1 */ /* Table1597 */ 0x99c, /* ROL64mCL */ 0x9b4, /* ROR64mCL */ 0x923, /* RCL64mCL */ 0x943, /* RCR64mCL */ 0xa81, /* SHL64mCL */ 0xaa9, /* SHR64mCL */ 0x9e4, /* SAL64mCL */ 0x9fd, /* SAR64mCL */ 0x99f, /* ROL64rCL */ 0x9b7, /* ROR64rCL */ 0x926, /* RCL64rCL */ 0x946, /* RCR64rCL */ 0xa84, /* SHL64rCL */ 0xaac, /* SHR64rCL */ 0x9e7, /* SAL64rCL */ 0xa00, /* SAR64rCL */ /* Table1613 */ 0xb91, /* TEST64mi32 */ 0xb92, /* TEST64mi32_alt */ 0x75d, /* NOT64m */ 0x735, /* NEG64m */ 0x707, /* MUL64m */ 0x386, /* IMUL64m */ 0x2a5, /* DIV64m */ 0x366, /* IDIV64m */ 0xb93, /* TEST64ri32 */ 0xb94, /* TEST64ri32_alt */ 0x75e, /* NOT64r */ 0x736, /* NEG64r */ 0x708, /* MUL64r */ 0x387, /* IMUL64r */ 0x2a6, /* DIV64r */ 0x367, /* IDIV64r */ /* Table1629 */ 0x39c, /* INC64m */ 0x29d, /* DEC64m */ 0x165, /* CALL64m */ 0x2f3, /* FARCALL64 */ 0x45c, /* JMP64m */ 0x2f8, /* FARJMP64 */ 0x8fd, /* PUSH64rmm */ 0x0, /* */ 0x39d, /* INC64r */ 0x29e, /* DEC64r */ 0x167, /* CALL64r */ 0x0, /* */ 0x45d, /* JMP64r */ 0x0, /* */ 0x8fe, /* PUSH64rmr */ 0x0, /* */ /* Table1645 */ 0x8f9, /* PUSH64i16 */ /* Table1646 */ 0x666, /* MOV64ao32 */ /* Table1647 */ 0x66d, /* MOV64o32a */ /* Table1648 */ 0x66a, /* MOV64mi32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x672, /* MOV64ri32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2242, /* XBEGIN_2 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1720 */ 0x39c, /* INC64m */ 0x29d, /* DEC64m */ 0x165, /* CALL64m */ 0x2f3, /* FARCALL64 */ 0x45c, /* JMP64m */ 0x2f8, /* FARJMP64 */ 0x8f3, /* PUSH16rmm */ 0x0, /* */ 0x39d, /* INC64r */ 0x29e, /* DEC64r */ 0x167, /* CALL64r */ 0x0, /* */ 0x45d, /* JMP64r */ 0x0, /* */ 0x8f4, /* PUSH16rmr */ 0x0, /* */ /* Table1736 */ 0x640, /* MOV16ao64 */ /* Table1737 */ 0x646, /* MOV16o64a */ /* Table1738 */ 0x396, /* INC16m */ 0x297, /* DEC16m */ 0x165, /* CALL64m */ 0x2f0, /* FARCALL16m */ 0x45c, /* JMP64m */ 0x2f5, /* FARJMP16m */ 0x8f3, /* PUSH16rmm */ 0x0, /* */ 0x397, /* INC16r */ 0x298, /* DEC16r */ 0x167, /* CALL64r */ 0x0, /* */ 0x45d, /* JMP64r */ 0x0, /* */ 0x8f4, /* PUSH16rmr */ 0x0, /* */ /* Table1754 */ 0xad0, /* SLDT16m */ 0xaf6, /* STRm */ 0x4ec, /* LLDT16m */ 0x546, /* LTRm */ 0xe12, /* VERRm */ 0xe14, /* VERWm */ 0x0, /* */ 0x0, /* */ 0xad2, /* SLDT32r */ 0xaf4, /* STR32r */ 0x4ed, /* LLDT16r */ 0x547, /* LTRr */ 0xe13, /* VERRr */ 0xe15, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table1770 */ 0xa64, /* SGDT32m */ 0xac9, /* SIDT32m */ 0x4e4, /* LGDT32m */ 0x4ea, /* LIDT32m */ 0xad5, /* SMSW16m */ 0x0, /* */ 0x4ee, /* LMSW16m */ 0x3ae, /* INVLPG */ 0x0, /* */ 0x1397, /* VMCALL */ 0x1402, /* VMLAUNCH */ 0x15fc, /* VMRESUME */ 0x1667, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x63a, /* MONITORrrr */ 0x730, /* MWAITrr */ 0x171, /* CLAC */ 0xae9, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2e7, /* ENCLS */ 0x2257, /* XGETBV */ 0x228e, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x1399, /* VMFUNC */ 0x2256, /* XEND */ 0x2292, /* XTEST */ 0x2e8, /* ENCLU */ 0x15fd, /* VMRUN32 */ 0x1405, /* VMMCALL */ 0x1403, /* VMLOAD32 */ 0x15ff, /* VMSAVE32 */ 0xaec, /* STGI */ 0x176, /* CLGI */ 0xacf, /* SKINIT */ 0x3af, /* INVLPGA32 */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0xb68, /* SWAPGS */ 0x95b, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1842 */ 0x4b7, /* LAR32rm */ 0x4b8, /* LAR32rr */ /* Table1844 */ 0x53f, /* LSL32rm */ 0x540, /* LSL32rr */ /* Table1846 */ 0xb69, /* SYSCALL */ /* Table1847 */ 0x178, /* CLTS */ /* Table1848 */ 0xb6d, /* SYSRET */ /* Table1849 */ 0x3ab, /* INVD */ /* Table1850 */ 0x222e, /* WBINVD */ /* Table1851 */ 0xba5, /* TRAP */ /* Table1852 */ 0x0, /* */ 0x8a2, /* PREFETCHW */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1868 */ 0x6ee, /* MOVUPSrm */ 0x6ef, /* MOVUPSrr */ /* Table1870 */ 0x6ed, /* MOVUPSmr */ 0x6f0, /* MOVUPSrr_REV */ /* Table1872 */ 0x6b2, /* MOVLPSrm */ 0x6a9, /* MOVHLPSrr */ /* Table1874 */ 0x6b1, /* MOVLPSmr */ 0x0, /* */ /* Table1876 */ 0xbca, /* UNPCKLPSrm */ 0xbcb, /* UNPCKLPSrr */ /* Table1878 */ 0xbc6, /* UNPCKHPSrm */ 0xbc7, /* UNPCKHPSrr */ /* Table1880 */ 0x6ad, /* MOVHPSrm */ 0x6ae, /* MOVLHPSrr */ /* Table1882 */ 0x6ac, /* MOVHPSmr */ 0x0, /* */ /* Table1884 */ 0x89e, /* PREFETCHNTA */ 0x89f, /* PREFETCHT0 */ 0x8a0, /* PREFETCHT1 */ 0x8a1, /* PREFETCHT2 */ 0x742, /* NOOP18_m4 */ 0x743, /* NOOP18_m5 */ 0x744, /* NOOP18_m6 */ 0x745, /* NOOP18_m7 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x746, /* NOOP18_r4 */ 0x747, /* NOOP18_r5 */ 0x748, /* NOOP18_r6 */ 0x749, /* NOOP18_r7 */ /* Table1900 */ 0x74c, /* NOOPL_19 */ 0x74a, /* NOOP19rr */ /* Table1902 */ 0x74d, /* NOOPL_1a */ 0x0, /* */ /* Table1904 */ 0x74e, /* NOOPL_1b */ 0x0, /* */ /* Table1906 */ 0x74f, /* NOOPL_1c */ 0x0, /* */ /* Table1908 */ 0x750, /* NOOPL_1d */ 0x0, /* */ /* Table1910 */ 0x751, /* NOOPL_1e */ 0x0, /* */ /* Table1912 */ 0x74b, /* NOOPL */ 0x0, /* */ /* Table1914 */ 0x0, /* */ 0x65b, /* MOV32rc */ /* Table1916 */ 0x0, /* */ 0x65c, /* MOV32rd */ /* Table1918 */ 0x0, /* */ 0x652, /* MOV32cr */ /* Table1920 */ 0x0, /* */ 0x653, /* MOV32dr */ /* Table1922 */ 0x692, /* MOVAPSrm */ 0x693, /* MOVAPSrr */ /* Table1924 */ 0x691, /* MOVAPSmr */ 0x694, /* MOVAPSrr_REV */ /* Table1926 */ 0x581, /* MMX_CVTPI2PSirm */ 0x582, /* MMX_CVTPI2PSirr */ /* Table1928 */ 0x6ba, /* MOVNTPSmr */ 0x0, /* */ /* Table1930 */ 0x587, /* MMX_CVTTPS2PIirm */ 0x588, /* MMX_CVTTPS2PIirr */ /* Table1932 */ 0x583, /* MMX_CVTPS2PIirm */ 0x584, /* MMX_CVTPS2PIirr */ /* Table1934 */ 0xbb6, /* UCOMISSrm */ 0xbb7, /* UCOMISSrr */ /* Table1936 */ 0x250, /* COMISSrm */ 0x251, /* COMISSrr */ /* Table1938 */ 0x2236, /* WRMSR */ /* Table1939 */ 0x95a, /* RDTSC */ /* Table1940 */ 0x952, /* RDMSR */ /* Table1941 */ 0x953, /* RDPMC */ /* Table1942 */ 0xb6a, /* SYSENTER */ /* Table1943 */ 0xb6b, /* SYSEXIT */ /* Table1944 */ 0x358, /* GETSEC */ /* Table1945 */ 0x1e7, /* CMOVO32rm */ 0x1e8, /* CMOVO32rr */ /* Table1947 */ 0x1d1, /* CMOVNO32rm */ 0x1d2, /* CMOVNO32rr */ /* Table1949 */ 0x189, /* CMOVB32rm */ 0x18a, /* CMOVB32rr */ /* Table1951 */ 0x183, /* CMOVAE32rm */ 0x184, /* CMOVAE32rr */ /* Table1953 */ 0x19d, /* CMOVE32rm */ 0x19e, /* CMOVE32rr */ /* Table1955 */ 0x1c7, /* CMOVNE32rm */ 0x1c8, /* CMOVNE32rr */ /* Table1957 */ 0x18f, /* CMOVBE32rm */ 0x190, /* CMOVBE32rr */ /* Table1959 */ 0x17d, /* CMOVA32rm */ 0x17e, /* CMOVA32rr */ /* Table1961 */ 0x1f7, /* CMOVS32rm */ 0x1f8, /* CMOVS32rr */ /* Table1963 */ 0x1e1, /* CMOVNS32rm */ 0x1e2, /* CMOVNS32rr */ /* Table1965 */ 0x1ed, /* CMOVP32rm */ 0x1ee, /* CMOVP32rr */ /* Table1967 */ 0x1d7, /* CMOVNP32rm */ 0x1d8, /* CMOVNP32rr */ /* Table1969 */ 0x1b3, /* CMOVL32rm */ 0x1b4, /* CMOVL32rr */ /* Table1971 */ 0x1ad, /* CMOVGE32rm */ 0x1ae, /* CMOVGE32rr */ /* Table1973 */ 0x1b9, /* CMOVLE32rm */ 0x1ba, /* CMOVLE32rr */ /* Table1975 */ 0x1a7, /* CMOVG32rm */ 0x1a8, /* CMOVG32rr */ /* Table1977 */ 0x0, /* */ 0x6b4, /* MOVMSKPSrr */ /* Table1979 */ 0xadb, /* SQRTPSm */ 0xadc, /* SQRTPSr */ /* Table1981 */ 0x9ce, /* RSQRTPSm */ 0x9d0, /* RSQRTPSr */ /* Table1983 */ 0x92e, /* RCPPSm */ 0x930, /* RCPPSr */ /* Table1985 */ 0xde, /* ANDPSrm */ 0xdf, /* ANDPSrr */ /* Table1987 */ 0xda, /* ANDNPSrm */ 0xdb, /* ANDNPSrr */ /* Table1989 */ 0x788, /* ORPSrm */ 0x789, /* ORPSrr */ /* Table1991 */ 0x227f, /* XORPSrm */ 0x2280, /* XORPSrr */ /* Table1993 */ 0x79, /* ADDPSrm */ 0x7a, /* ADDPSrr */ /* Table1995 */ 0x70d, /* MULPSrm */ 0x70e, /* MULPSrr */ /* Table1997 */ 0x270, /* CVTPS2PDrm */ 0x271, /* CVTPS2PDrr */ /* Table1999 */ 0x268, /* CVTDQ2PSrm */ 0x269, /* CVTDQ2PSrr */ /* Table2001 */ 0xb37, /* SUBPSrm */ 0xb38, /* SUBPSrr */ /* Table2003 */ 0x573, /* MINPSrm */ 0x574, /* MINPSrr */ /* Table2005 */ 0x2ab, /* DIVPSrm */ 0x2ac, /* DIVPSrr */ /* Table2007 */ 0x55e, /* MAXPSrm */ 0x55f, /* MAXPSrr */ /* Table2009 */ 0x631, /* MMX_PUNPCKLBWirm */ 0x632, /* MMX_PUNPCKLBWirr */ /* Table2011 */ 0x635, /* MMX_PUNPCKLWDirm */ 0x636, /* MMX_PUNPCKLWDirr */ /* Table2013 */ 0x633, /* MMX_PUNPCKLDQirm */ 0x634, /* MMX_PUNPCKLDQirr */ /* Table2015 */ 0x5a5, /* MMX_PACKSSWBirm */ 0x5a6, /* MMX_PACKSSWBirr */ /* Table2017 */ 0x5c9, /* MMX_PCMPGTBirm */ 0x5ca, /* MMX_PCMPGTBirr */ /* Table2019 */ 0x5cd, /* MMX_PCMPGTWirm */ 0x5ce, /* MMX_PCMPGTWirr */ /* Table2021 */ 0x5cb, /* MMX_PCMPGTDirm */ 0x5cc, /* MMX_PCMPGTDirr */ /* Table2023 */ 0x5a7, /* MMX_PACKUSWBirm */ 0x5a8, /* MMX_PACKUSWBirr */ /* Table2025 */ 0x62b, /* MMX_PUNPCKHBWirm */ 0x62c, /* MMX_PUNPCKHBWirr */ /* Table2027 */ 0x62f, /* MMX_PUNPCKHWDirm */ 0x630, /* MMX_PUNPCKHWDirr */ /* Table2029 */ 0x62d, /* MMX_PUNPCKHDQirm */ 0x62e, /* MMX_PUNPCKHDQirr */ /* Table2031 */ 0x5a3, /* MMX_PACKSSDWirm */ 0x5a4, /* MMX_PACKSSDWirr */ /* Table2033 */ 0x590, /* MMX_MOVD64rm */ 0x591, /* MMX_MOVD64rr */ /* Table2035 */ 0x59a, /* MMX_MOVQ64rm */ 0x59b, /* MMX_MOVQ64rr */ /* Table2037 */ 0x5fb, /* MMX_PSHUFWmi */ 0x5fc, /* MMX_PSHUFWri */ /* Table2039 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x618, /* MMX_PSRLWri */ 0x0, /* */ 0x60f, /* MMX_PSRAWri */ 0x0, /* */ 0x609, /* MMX_PSLLWri */ 0x0, /* */ /* Table2055 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x612, /* MMX_PSRLDri */ 0x0, /* */ 0x60c, /* MMX_PSRADri */ 0x0, /* */ 0x603, /* MMX_PSLLDri */ 0x0, /* */ /* Table2071 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x615, /* MMX_PSRLQri */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x606, /* MMX_PSLLQri */ 0x0, /* */ /* Table2087 */ 0x5c3, /* MMX_PCMPEQBirm */ 0x5c4, /* MMX_PCMPEQBirr */ /* Table2089 */ 0x5c7, /* MMX_PCMPEQWirm */ 0x5c8, /* MMX_PCMPEQWirr */ /* Table2091 */ 0x5c5, /* MMX_PCMPEQDirm */ 0x5c6, /* MMX_PCMPEQDirr */ /* Table2093 */ 0x589, /* MMX_EMMS */ /* Table2094 */ 0x15f8, /* VMREAD32rm */ 0x15f9, /* VMREAD32rr */ /* Table2096 */ 0x1663, /* VMWRITE32rm */ 0x1664, /* VMWRITE32rr */ /* Table2098 */ 0x58f, /* MMX_MOVD64mr */ 0x58e, /* MMX_MOVD64grr */ /* Table2100 */ 0x599, /* MMX_MOVQ64mr */ 0x59c, /* MMX_MOVQ64rr_REV */ /* Table2102 */ 0x46f, /* JO_4 */ /* Table2103 */ 0x466, /* JNO_4 */ /* Table2104 */ 0x446, /* JB_4 */ /* Table2105 */ 0x43d, /* JAE_4 */ /* Table2106 */ 0x44b, /* JE_4 */ /* Table2107 */ 0x463, /* JNE_4 */ /* Table2108 */ 0x443, /* JBE_4 */ /* Table2109 */ 0x440, /* JA_4 */ /* Table2110 */ 0x476, /* JS_4 */ /* Table2111 */ 0x46c, /* JNS_4 */ /* Table2112 */ 0x472, /* JP_4 */ /* Table2113 */ 0x469, /* JNP_4 */ /* Table2114 */ 0x457, /* JL_4 */ /* Table2115 */ 0x44e, /* JGE_4 */ /* Table2116 */ 0x454, /* JLE_4 */ /* Table2117 */ 0x451, /* JG_4 */ /* Table2118 */ 0xa5c, /* SETOm */ 0xa5d, /* SETOr */ /* Table2120 */ 0xa56, /* SETNOm */ 0xa57, /* SETNOr */ /* Table2122 */ 0xa48, /* SETBm */ 0xa49, /* SETBr */ /* Table2124 */ 0xa3e, /* SETAEm */ 0xa3f, /* SETAEr */ /* Table2126 */ 0xa4a, /* SETEm */ 0xa4b, /* SETEr */ /* Table2128 */ 0xa54, /* SETNEm */ 0xa55, /* SETNEr */ /* Table2130 */ 0xa42, /* SETBEm */ 0xa43, /* SETBEr */ /* Table2132 */ 0xa40, /* SETAm */ 0xa41, /* SETAr */ /* Table2134 */ 0xa60, /* SETSm */ 0xa61, /* SETSr */ /* Table2136 */ 0xa5a, /* SETNSm */ 0xa5b, /* SETNSr */ /* Table2138 */ 0xa5e, /* SETPm */ 0xa5f, /* SETPr */ /* Table2140 */ 0xa58, /* SETNPm */ 0xa59, /* SETNPr */ /* Table2142 */ 0xa52, /* SETLm */ 0xa53, /* SETLr */ /* Table2144 */ 0xa4c, /* SETGEm */ 0xa4d, /* SETGEr */ /* Table2146 */ 0xa50, /* SETLEm */ 0xa51, /* SETLEr */ /* Table2148 */ 0xa4e, /* SETGm */ 0xa4f, /* SETGr */ /* Table2150 */ 0x90b, /* PUSHFS32 */ /* Table2151 */ 0x894, /* POPFS32 */ /* Table2152 */ 0x25a, /* CPUID */ /* Table2153 */ 0x132, /* BT32mr */ 0x134, /* BT32rr */ /* Table2155 */ 0xa91, /* SHLD32mri8 */ 0xa93, /* SHLD32rri8 */ /* Table2157 */ 0xa90, /* SHLD32mrCL */ 0xa92, /* SHLD32rrCL */ /* Table2159 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x63b, /* MONTMUL */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x228f, /* XSHA1 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2290, /* XSHA256 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2231 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2291, /* XSTORE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2254, /* XCRYPTECB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2251, /* XCRYPTCBC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2253, /* XCRYPTCTR */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2252, /* XCRYPTCFB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2255, /* XCRYPTOFB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2303 */ 0x90e, /* PUSHGS32 */ /* Table2304 */ 0x897, /* POPGS32 */ /* Table2305 */ 0x9cd, /* RSM */ /* Table2306 */ 0x156, /* BTS32mr */ 0x158, /* BTS32rr */ /* Table2308 */ 0xab9, /* SHRD32mri8 */ 0xabb, /* SHRD32rri8 */ /* Table2310 */ 0xab8, /* SHRD32mrCL */ 0xaba, /* SHRD32rrCL */ /* Table2312 */ 0x32d, /* FXSAVE */ 0x32b, /* FXRSTOR */ 0x4c2, /* LDMXCSR */ 0xaee, /* STMXCSR */ 0x2286, /* XSAVE */ 0x2282, /* XRSTOR */ 0x228a, /* XSAVEOPT */ 0x174, /* CLFLUSH */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4df, /* LFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x568, /* MFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xa62, /* SFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2384 */ 0x380, /* IMUL32rm */ 0x383, /* IMUL32rr */ /* Table2386 */ 0x24c, /* CMPXCHG8rm */ 0x24d, /* CMPXCHG8rr */ /* Table2388 */ 0x247, /* CMPXCHG32rm */ 0x248, /* CMPXCHG32rr */ /* Table2390 */ 0x544, /* LSS32rm */ 0x0, /* */ /* Table2392 */ 0x14a, /* BTR32mr */ 0x14c, /* BTR32rr */ /* Table2394 */ 0x4e1, /* LFS32rm */ 0x0, /* */ /* Table2396 */ 0x4e7, /* LGS32rm */ 0x0, /* */ /* Table2398 */ 0x6fa, /* MOVZX32rm8 */ 0x6fc, /* MOVZX32rr8 */ /* Table2400 */ 0x6f9, /* MOVZX32rm16 */ 0x6fb, /* MOVZX32rr16 */ /* Table2402 */ 0xbc3, /* UD2B */ /* Table2403 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x131, /* BT32mi8 */ 0x155, /* BTS32mi8 */ 0x149, /* BTR32mi8 */ 0x13d, /* BTC32mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x133, /* BT32ri8 */ 0x157, /* BTS32ri8 */ 0x14b, /* BTR32ri8 */ 0x13f, /* BTC32ri8 */ /* Table2419 */ 0x13e, /* BTC32mr */ 0x140, /* BTC32rr */ /* Table2421 */ 0x121, /* BSF32rm */ 0x122, /* BSF32rr */ /* Table2423 */ 0x127, /* BSR32rm */ 0x128, /* BSR32rr */ /* Table2425 */ 0x6de, /* MOVSX32rm8 */ 0x6e0, /* MOVSX32rr8 */ /* Table2427 */ 0x6dd, /* MOVSX32rm16 */ 0x6df, /* MOVSX32rr16 */ /* Table2429 */ 0x223f, /* XADD8rm */ 0x2240, /* XADD8rr */ /* Table2431 */ 0x223b, /* XADD32rm */ 0x223c, /* XADD32rr */ /* Table2433 */ 0x234, /* CMPPSrmi */ 0x236, /* CMPPSrri */ /* Table2435 */ 0x6b8, /* MOVNTImr */ 0x0, /* */ /* Table2437 */ 0x5dc, /* MMX_PINSRWirmi */ 0x5dd, /* MMX_PINSRWirri */ /* Table2439 */ 0x0, /* */ 0x5cf, /* MMX_PEXTRWirri */ /* Table2441 */ 0xac6, /* SHUFPSrmi */ 0xac7, /* SHUFPSrri */ /* Table2443 */ 0x0, /* */ 0x24b, /* CMPXCHG8B */ 0x0, /* */ 0x2284, /* XRSTORS */ 0x2288, /* XSAVEC */ 0x228c, /* XSAVES */ 0x15f6, /* VMPTRLDm */ 0x15f7, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x955, /* RDRAND32r */ 0x958, /* RDSEED32r */ /* Table2459 */ 0x12b, /* BSWAP32r */ /* Table2460 */ 0x619, /* MMX_PSRLWrm */ 0x61a, /* MMX_PSRLWrr */ /* Table2462 */ 0x613, /* MMX_PSRLDrm */ 0x614, /* MMX_PSRLDrr */ /* Table2464 */ 0x616, /* MMX_PSRLQrm */ 0x617, /* MMX_PSRLQrr */ /* Table2466 */ 0x5ad, /* MMX_PADDQirm */ 0x5ae, /* MMX_PADDQirr */ /* Table2468 */ 0x5f1, /* MMX_PMULLWirm */ 0x5f2, /* MMX_PMULLWirr */ /* Table2470 */ 0x0, /* */ 0x5ea, /* MMX_PMOVMSKBrr */ /* Table2472 */ 0x625, /* MMX_PSUBUSBirm */ 0x626, /* MMX_PSUBUSBirr */ /* Table2474 */ 0x627, /* MMX_PSUBUSWirm */ 0x628, /* MMX_PSUBUSWirr */ /* Table2476 */ 0x5e8, /* MMX_PMINUBirm */ 0x5e9, /* MMX_PMINUBirr */ /* Table2478 */ 0x5bd, /* MMX_PANDirm */ 0x5be, /* MMX_PANDirr */ /* Table2480 */ 0x5b3, /* MMX_PADDUSBirm */ 0x5b4, /* MMX_PADDUSBirr */ /* Table2482 */ 0x5b5, /* MMX_PADDUSWirm */ 0x5b6, /* MMX_PADDUSWirr */ /* Table2484 */ 0x5e4, /* MMX_PMAXUBirm */ 0x5e5, /* MMX_PMAXUBirr */ /* Table2486 */ 0x5bb, /* MMX_PANDNirm */ 0x5bc, /* MMX_PANDNirr */ /* Table2488 */ 0x5bf, /* MMX_PAVGBirm */ 0x5c0, /* MMX_PAVGBirr */ /* Table2490 */ 0x610, /* MMX_PSRAWrm */ 0x611, /* MMX_PSRAWrr */ /* Table2492 */ 0x60d, /* MMX_PSRADrm */ 0x60e, /* MMX_PSRADrr */ /* Table2494 */ 0x5c1, /* MMX_PAVGWirm */ 0x5c2, /* MMX_PAVGWirr */ /* Table2496 */ 0x5ed, /* MMX_PMULHUWirm */ 0x5ee, /* MMX_PMULHUWirr */ /* Table2498 */ 0x5ef, /* MMX_PMULHWirm */ 0x5f0, /* MMX_PMULHWirr */ /* Table2500 */ 0x596, /* MMX_MOVNTQmr */ 0x0, /* */ /* Table2502 */ 0x621, /* MMX_PSUBSBirm */ 0x622, /* MMX_PSUBSBirr */ /* Table2504 */ 0x623, /* MMX_PSUBSWirm */ 0x624, /* MMX_PSUBSWirr */ /* Table2506 */ 0x5e6, /* MMX_PMINSWirm */ 0x5e7, /* MMX_PMINSWirr */ /* Table2508 */ 0x5f5, /* MMX_PORirm */ 0x5f6, /* MMX_PORirr */ /* Table2510 */ 0x5af, /* MMX_PADDSBirm */ 0x5b0, /* MMX_PADDSBirr */ /* Table2512 */ 0x5b1, /* MMX_PADDSWirm */ 0x5b2, /* MMX_PADDSWirr */ /* Table2514 */ 0x5e2, /* MMX_PMAXSWirm */ 0x5e3, /* MMX_PMAXSWirr */ /* Table2516 */ 0x637, /* MMX_PXORirm */ 0x638, /* MMX_PXORirr */ /* Table2518 */ 0x60a, /* MMX_PSLLWrm */ 0x60b, /* MMX_PSLLWrr */ /* Table2520 */ 0x604, /* MMX_PSLLDrm */ 0x605, /* MMX_PSLLDrr */ /* Table2522 */ 0x607, /* MMX_PSLLQrm */ 0x608, /* MMX_PSLLQrr */ /* Table2524 */ 0x5f3, /* MMX_PMULUDQirm */ 0x5f4, /* MMX_PMULUDQirr */ /* Table2526 */ 0x5e0, /* MMX_PMADDWDirm */ 0x5e1, /* MMX_PMADDWDirr */ /* Table2528 */ 0x5f7, /* MMX_PSADBWirm */ 0x5f8, /* MMX_PSADBWirr */ /* Table2530 */ 0x0, /* */ 0x58a, /* MMX_MASKMOVQ */ /* Table2532 */ 0x61b, /* MMX_PSUBBirm */ 0x61c, /* MMX_PSUBBirr */ /* Table2534 */ 0x629, /* MMX_PSUBWirm */ 0x62a, /* MMX_PSUBWirr */ /* Table2536 */ 0x61d, /* MMX_PSUBDirm */ 0x61e, /* MMX_PSUBDirr */ /* Table2538 */ 0x61f, /* MMX_PSUBQirm */ 0x620, /* MMX_PSUBQirr */ /* Table2540 */ 0x5a9, /* MMX_PADDBirm */ 0x5aa, /* MMX_PADDBirr */ /* Table2542 */ 0x5b7, /* MMX_PADDWirm */ 0x5b8, /* MMX_PADDWirr */ /* Table2544 */ 0x5ab, /* MMX_PADDDirm */ 0x5ac, /* MMX_PADDDirr */ /* Table2546 */ 0xa65, /* SGDT64m */ 0xaca, /* SIDT64m */ 0x4e5, /* LGDT64m */ 0x4eb, /* LIDT64m */ 0xad5, /* SMSW16m */ 0x0, /* */ 0x4ee, /* LMSW16m */ 0x3ae, /* INVLPG */ 0x0, /* */ 0x1397, /* VMCALL */ 0x1402, /* VMLAUNCH */ 0x15fc, /* VMRESUME */ 0x1667, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x63a, /* MONITORrrr */ 0x730, /* MWAITrr */ 0x171, /* CLAC */ 0xae9, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2e7, /* ENCLS */ 0x2257, /* XGETBV */ 0x228e, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x1399, /* VMFUNC */ 0x2256, /* XEND */ 0x2292, /* XTEST */ 0x2e8, /* ENCLU */ 0x15fe, /* VMRUN64 */ 0x1405, /* VMMCALL */ 0x1404, /* VMLOAD64 */ 0x1600, /* VMSAVE64 */ 0xaec, /* STGI */ 0x176, /* CLGI */ 0xacf, /* SKINIT */ 0x3b0, /* INVLPGA64 */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0xad7, /* SMSW32r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0xb68, /* SWAPGS */ 0x95b, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2618 */ 0x0, /* */ 0x66f, /* MOV64rc */ /* Table2620 */ 0x0, /* */ 0x670, /* MOV64rd */ /* Table2622 */ 0x0, /* */ 0x668, /* MOV64cr */ /* Table2624 */ 0x0, /* */ 0x669, /* MOV64dr */ /* Table2626 */ 0x15fa, /* VMREAD64rm */ 0x15fb, /* VMREAD64rr */ /* Table2628 */ 0x1665, /* VMWRITE64rm */ 0x1666, /* VMWRITE64rr */ /* Table2630 */ 0x90c, /* PUSHFS64 */ /* Table2631 */ 0x895, /* POPFS64 */ /* Table2632 */ 0x90f, /* PUSHGS64 */ /* Table2633 */ 0x898, /* POPGS64 */ /* Table2634 */ 0x0, /* */ 0x58b, /* MMX_MASKMOVQ64 */ /* Table2636 */ 0xad0, /* SLDT16m */ 0xaf6, /* STRm */ 0x4ec, /* LLDT16m */ 0x546, /* LTRm */ 0xe12, /* VERRm */ 0xe14, /* VERWm */ 0x0, /* */ 0x0, /* */ 0xad1, /* SLDT16r */ 0xaf3, /* STR16r */ 0x4ed, /* LLDT16r */ 0x547, /* LTRr */ 0xe13, /* VERRr */ 0xe15, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table2652 */ 0xa63, /* SGDT16m */ 0xac8, /* SIDT16m */ 0x4e3, /* LGDT16m */ 0x4e9, /* LIDT16m */ 0xad5, /* SMSW16m */ 0x0, /* */ 0x4ee, /* LMSW16m */ 0x3ae, /* INVLPG */ 0x0, /* */ 0x1397, /* VMCALL */ 0x1402, /* VMLAUNCH */ 0x15fc, /* VMRESUME */ 0x1667, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x63a, /* MONITORrrr */ 0x730, /* MWAITrr */ 0x171, /* CLAC */ 0xae9, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2e7, /* ENCLS */ 0x2257, /* XGETBV */ 0x228e, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x1399, /* VMFUNC */ 0x2256, /* XEND */ 0x2292, /* XTEST */ 0x2e8, /* ENCLU */ 0x15fd, /* VMRUN32 */ 0x1405, /* VMMCALL */ 0x1403, /* VMLOAD32 */ 0x15ff, /* VMSAVE32 */ 0xaec, /* STGI */ 0x176, /* CLGI */ 0xacf, /* SKINIT */ 0x3af, /* INVLPGA32 */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0xb68, /* SWAPGS */ 0x95b, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2724 */ 0x4b5, /* LAR16rm */ 0x4b6, /* LAR16rr */ /* Table2726 */ 0x53d, /* LSL16rm */ 0x53e, /* LSL16rr */ /* Table2728 */ 0x6ea, /* MOVUPDrm */ 0x6eb, /* MOVUPDrr */ /* Table2730 */ 0x6e9, /* MOVUPDmr */ 0x6ec, /* MOVUPDrr_REV */ /* Table2732 */ 0x6b0, /* MOVLPDrm */ 0x6a9, /* MOVHLPSrr */ /* Table2734 */ 0x6af, /* MOVLPDmr */ 0x0, /* */ /* Table2736 */ 0xbc8, /* UNPCKLPDrm */ 0xbc9, /* UNPCKLPDrr */ /* Table2738 */ 0xbc4, /* UNPCKHPDrm */ 0xbc5, /* UNPCKHPDrr */ /* Table2740 */ 0x6ab, /* MOVHPDrm */ 0x6ae, /* MOVLHPSrr */ /* Table2742 */ 0x6aa, /* MOVHPDmr */ 0x0, /* */ /* Table2744 */ 0x89e, /* PREFETCHNTA */ 0x89f, /* PREFETCHT0 */ 0x8a0, /* PREFETCHT1 */ 0x8a1, /* PREFETCHT2 */ 0x73a, /* NOOP18_16m4 */ 0x73b, /* NOOP18_16m5 */ 0x73c, /* NOOP18_16m6 */ 0x73d, /* NOOP18_16m7 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x73e, /* NOOP18_16r4 */ 0x73f, /* NOOP18_16r5 */ 0x740, /* NOOP18_16r6 */ 0x741, /* NOOP18_16r7 */ /* Table2760 */ 0x753, /* NOOPW_19 */ 0x74a, /* NOOP19rr */ /* Table2762 */ 0x754, /* NOOPW_1a */ 0x0, /* */ /* Table2764 */ 0x755, /* NOOPW_1b */ 0x0, /* */ /* Table2766 */ 0x756, /* NOOPW_1c */ 0x0, /* */ /* Table2768 */ 0x757, /* NOOPW_1d */ 0x0, /* */ /* Table2770 */ 0x758, /* NOOPW_1e */ 0x0, /* */ /* Table2772 */ 0x752, /* NOOPW */ 0x0, /* */ /* Table2774 */ 0x68e, /* MOVAPDrm */ 0x68f, /* MOVAPDrr */ /* Table2776 */ 0x68d, /* MOVAPDmr */ 0x690, /* MOVAPDrr_REV */ /* Table2778 */ 0x57f, /* MMX_CVTPI2PDirm */ 0x580, /* MMX_CVTPI2PDirr */ /* Table2780 */ 0x6b9, /* MOVNTPDmr */ 0x0, /* */ /* Table2782 */ 0x585, /* MMX_CVTTPD2PIirm */ 0x586, /* MMX_CVTTPD2PIirr */ /* Table2784 */ 0x57d, /* MMX_CVTPD2PIirm */ 0x57e, /* MMX_CVTPD2PIirr */ /* Table2786 */ 0xbb4, /* UCOMISDrm */ 0xbb5, /* UCOMISDrr */ /* Table2788 */ 0x24e, /* COMISDrm */ 0x24f, /* COMISDrr */ /* Table2790 */ 0x1e5, /* CMOVO16rm */ 0x1e6, /* CMOVO16rr */ /* Table2792 */ 0x1cf, /* CMOVNO16rm */ 0x1d0, /* CMOVNO16rr */ /* Table2794 */ 0x187, /* CMOVB16rm */ 0x188, /* CMOVB16rr */ /* Table2796 */ 0x181, /* CMOVAE16rm */ 0x182, /* CMOVAE16rr */ /* Table2798 */ 0x19b, /* CMOVE16rm */ 0x19c, /* CMOVE16rr */ /* Table2800 */ 0x1c5, /* CMOVNE16rm */ 0x1c6, /* CMOVNE16rr */ /* Table2802 */ 0x18d, /* CMOVBE16rm */ 0x18e, /* CMOVBE16rr */ /* Table2804 */ 0x17b, /* CMOVA16rm */ 0x17c, /* CMOVA16rr */ /* Table2806 */ 0x1f5, /* CMOVS16rm */ 0x1f6, /* CMOVS16rr */ /* Table2808 */ 0x1df, /* CMOVNS16rm */ 0x1e0, /* CMOVNS16rr */ /* Table2810 */ 0x1eb, /* CMOVP16rm */ 0x1ec, /* CMOVP16rr */ /* Table2812 */ 0x1d5, /* CMOVNP16rm */ 0x1d6, /* CMOVNP16rr */ /* Table2814 */ 0x1b1, /* CMOVL16rm */ 0x1b2, /* CMOVL16rr */ /* Table2816 */ 0x1ab, /* CMOVGE16rm */ 0x1ac, /* CMOVGE16rr */ /* Table2818 */ 0x1b7, /* CMOVLE16rm */ 0x1b8, /* CMOVLE16rr */ /* Table2820 */ 0x1a5, /* CMOVG16rm */ 0x1a6, /* CMOVG16rr */ /* Table2822 */ 0x0, /* */ 0x6b3, /* MOVMSKPDrr */ /* Table2824 */ 0xad9, /* SQRTPDm */ 0xada, /* SQRTPDr */ /* Table2826 */ 0xdc, /* ANDPDrm */ 0xdd, /* ANDPDrr */ /* Table2828 */ 0xd8, /* ANDNPDrm */ 0xd9, /* ANDNPDrr */ /* Table2830 */ 0x786, /* ORPDrm */ 0x787, /* ORPDrr */ /* Table2832 */ 0x227d, /* XORPDrm */ 0x227e, /* XORPDrr */ /* Table2834 */ 0x77, /* ADDPDrm */ 0x78, /* ADDPDrr */ /* Table2836 */ 0x70b, /* MULPDrm */ 0x70c, /* MULPDrr */ /* Table2838 */ 0x26c, /* CVTPD2PSrm */ 0x26d, /* CVTPD2PSrr */ /* Table2840 */ 0x26e, /* CVTPS2DQrm */ 0x26f, /* CVTPS2DQrr */ /* Table2842 */ 0xb35, /* SUBPDrm */ 0xb36, /* SUBPDrr */ /* Table2844 */ 0x571, /* MINPDrm */ 0x572, /* MINPDrr */ /* Table2846 */ 0x2a9, /* DIVPDrm */ 0x2aa, /* DIVPDrr */ /* Table2848 */ 0x55c, /* MAXPDrm */ 0x55d, /* MAXPDrr */ /* Table2850 */ 0x8e9, /* PUNPCKLBWrm */ 0x8ea, /* PUNPCKLBWrr */ /* Table2852 */ 0x8ef, /* PUNPCKLWDrm */ 0x8f0, /* PUNPCKLWDrr */ /* Table2854 */ 0x8eb, /* PUNPCKLDQrm */ 0x8ec, /* PUNPCKLDQrr */ /* Table2856 */ 0x79b, /* PACKSSWBrm */ 0x79c, /* PACKSSWBrr */ /* Table2858 */ 0x7d4, /* PCMPGTBrm */ 0x7d5, /* PCMPGTBrr */ /* Table2860 */ 0x7da, /* PCMPGTWrm */ 0x7db, /* PCMPGTWrr */ /* Table2862 */ 0x7d6, /* PCMPGTDrm */ 0x7d7, /* PCMPGTDrr */ /* Table2864 */ 0x79f, /* PACKUSWBrm */ 0x7a0, /* PACKUSWBrr */ /* Table2866 */ 0x8e1, /* PUNPCKHBWrm */ 0x8e2, /* PUNPCKHBWrr */ /* Table2868 */ 0x8e7, /* PUNPCKHWDrm */ 0x8e8, /* PUNPCKHWDrr */ /* Table2870 */ 0x8e3, /* PUNPCKHDQrm */ 0x8e4, /* PUNPCKHDQrr */ /* Table2872 */ 0x799, /* PACKSSDWrm */ 0x79a, /* PACKSSDWrr */ /* Table2874 */ 0x8ed, /* PUNPCKLQDQrm */ 0x8ee, /* PUNPCKLQDQrr */ /* Table2876 */ 0x8e5, /* PUNPCKHQDQrm */ 0x8e6, /* PUNPCKHQDQrr */ /* Table2878 */ 0x69d, /* MOVDI2PDIrm */ 0x69e, /* MOVDI2PDIrr */ /* Table2880 */ 0x6a2, /* MOVDQArm */ 0x6a3, /* MOVDQArr */ /* Table2882 */ 0x8a7, /* PSHUFDmi */ 0x8a8, /* PSHUFDri */ /* Table2884 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x8ca, /* PSRLWri */ 0x0, /* */ 0x8c0, /* PSRAWri */ 0x0, /* */ 0x8ba, /* PSLLWri */ 0x0, /* */ /* Table2900 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x8c4, /* PSRLDri */ 0x0, /* */ 0x8bd, /* PSRADri */ 0x0, /* */ 0x8b4, /* PSLLDri */ 0x0, /* */ /* Table2916 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x8c7, /* PSRLQri */ 0x8c3, /* PSRLDQri */ 0x0, /* */ 0x0, /* */ 0x8b7, /* PSLLQri */ 0x8b3, /* PSLLDQri */ /* Table2932 */ 0x7c4, /* PCMPEQBrm */ 0x7c5, /* PCMPEQBrr */ /* Table2934 */ 0x7ca, /* PCMPEQWrm */ 0x7cb, /* PCMPEQWrr */ /* Table2936 */ 0x7c6, /* PCMPEQDrm */ 0x7c7, /* PCMPEQDrr */ /* Table2938 */ 0x15f8, /* VMREAD32rm */ 0x2ed, /* EXTRQI */ /* Table2940 */ 0x1663, /* VMWRITE32rm */ 0x2ec, /* EXTRQ */ /* Table2942 */ 0x359, /* HADDPDrm */ 0x35a, /* HADDPDrr */ /* Table2944 */ 0x35e, /* HSUBPDrm */ 0x35f, /* HSUBPDrr */ /* Table2946 */ 0x6be, /* MOVPDI2DImr */ 0x6bf, /* MOVPDI2DIrr */ /* Table2948 */ 0x6a1, /* MOVDQAmr */ 0x6a4, /* MOVDQArr_REV */ /* Table2950 */ 0x46e, /* JO_2 */ /* Table2951 */ 0x465, /* JNO_2 */ /* Table2952 */ 0x445, /* JB_2 */ /* Table2953 */ 0x43c, /* JAE_2 */ /* Table2954 */ 0x44a, /* JE_2 */ /* Table2955 */ 0x462, /* JNE_2 */ /* Table2956 */ 0x442, /* JBE_2 */ /* Table2957 */ 0x43f, /* JA_2 */ /* Table2958 */ 0x475, /* JS_2 */ /* Table2959 */ 0x46b, /* JNS_2 */ /* Table2960 */ 0x471, /* JP_2 */ /* Table2961 */ 0x468, /* JNP_2 */ /* Table2962 */ 0x456, /* JL_2 */ /* Table2963 */ 0x44d, /* JGE_2 */ /* Table2964 */ 0x453, /* JLE_2 */ /* Table2965 */ 0x450, /* JG_2 */ /* Table2966 */ 0x90a, /* PUSHFS16 */ /* Table2967 */ 0x893, /* POPFS16 */ /* Table2968 */ 0x12e, /* BT16mr */ 0x130, /* BT16rr */ /* Table2970 */ 0xa8d, /* SHLD16mri8 */ 0xa8f, /* SHLD16rri8 */ /* Table2972 */ 0xa8c, /* SHLD16mrCL */ 0xa8e, /* SHLD16rrCL */ /* Table2974 */ 0x90d, /* PUSHGS16 */ /* Table2975 */ 0x896, /* POPGS16 */ /* Table2976 */ 0x152, /* BTS16mr */ 0x154, /* BTS16rr */ /* Table2978 */ 0xab5, /* SHRD16mri8 */ 0xab7, /* SHRD16rri8 */ /* Table2980 */ 0xab4, /* SHRD16mrCL */ 0xab6, /* SHRD16rrCL */ /* Table2982 */ 0x32d, /* FXSAVE */ 0x32b, /* FXRSTOR */ 0x4c2, /* LDMXCSR */ 0xaee, /* STMXCSR */ 0x2286, /* XSAVE */ 0x2282, /* XRSTOR */ 0x179, /* CLWB */ 0x175, /* CLFLUSHOPT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4df, /* LFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x568, /* MFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x7e4, /* PCOMMIT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3054 */ 0x378, /* IMUL16rm */ 0x37b, /* IMUL16rr */ /* Table3056 */ 0x245, /* CMPXCHG16rm */ 0x246, /* CMPXCHG16rr */ /* Table3058 */ 0x543, /* LSS16rm */ 0x0, /* */ /* Table3060 */ 0x146, /* BTR16mr */ 0x148, /* BTR16rr */ /* Table3062 */ 0x4e0, /* LFS16rm */ 0x0, /* */ /* Table3064 */ 0x4e6, /* LGS16rm */ 0x0, /* */ /* Table3066 */ 0x6f5, /* MOVZX16rm8 */ 0x6f6, /* MOVZX16rr8 */ /* Table3068 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x12d, /* BT16mi8 */ 0x151, /* BTS16mi8 */ 0x145, /* BTR16mi8 */ 0x139, /* BTC16mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x12f, /* BT16ri8 */ 0x153, /* BTS16ri8 */ 0x147, /* BTR16ri8 */ 0x13b, /* BTC16ri8 */ /* Table3084 */ 0x13a, /* BTC16mr */ 0x13c, /* BTC16rr */ /* Table3086 */ 0x11f, /* BSF16rm */ 0x120, /* BSF16rr */ /* Table3088 */ 0x125, /* BSR16rm */ 0x126, /* BSR16rr */ /* Table3090 */ 0x6d9, /* MOVSX16rm8 */ 0x6da, /* MOVSX16rr8 */ /* Table3092 */ 0x2239, /* XADD16rm */ 0x223a, /* XADD16rr */ /* Table3094 */ 0x230, /* CMPPDrmi */ 0x232, /* CMPPDrri */ /* Table3096 */ 0x834, /* PINSRWrmi */ 0x835, /* PINSRWrri */ /* Table3098 */ 0x0, /* */ 0x7f4, /* PEXTRWri */ /* Table3100 */ 0xac4, /* SHUFPDrmi */ 0xac5, /* SHUFPDrri */ /* Table3102 */ 0x0, /* */ 0x24b, /* CMPXCHG8B */ 0x0, /* */ 0x2284, /* XRSTORS */ 0x2288, /* XSAVEC */ 0x228c, /* XSAVES */ 0x1398, /* VMCLEARm */ 0x15f7, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x954, /* RDRAND16r */ 0x957, /* RDSEED16r */ /* Table3118 */ 0x83, /* ADDSUBPDrm */ 0x84, /* ADDSUBPDrr */ /* Table3120 */ 0x8cb, /* PSRLWrm */ 0x8cc, /* PSRLWrr */ /* Table3122 */ 0x8c5, /* PSRLDrm */ 0x8c6, /* PSRLDrr */ /* Table3124 */ 0x8c8, /* PSRLQrm */ 0x8c9, /* PSRLQrr */ /* Table3126 */ 0x7a5, /* PADDQrm */ 0x7a6, /* PADDQrr */ /* Table3128 */ 0x877, /* PMULLWrm */ 0x878, /* PMULLWrr */ /* Table3130 */ 0x6c0, /* MOVPQI2QImr */ 0x6c1, /* MOVPQI2QIrr */ /* Table3132 */ 0x0, /* */ 0x852, /* PMOVMSKBrr */ /* Table3134 */ 0x8d7, /* PSUBUSBrm */ 0x8d8, /* PSUBUSBrr */ /* Table3136 */ 0x8d9, /* PSUBUSWrm */ 0x8da, /* PSUBUSWrr */ /* Table3138 */ 0x84c, /* PMINUBrm */ 0x84d, /* PMINUBrr */ /* Table3140 */ 0x7b5, /* PANDrm */ 0x7b6, /* PANDrr */ /* Table3142 */ 0x7ab, /* PADDUSBrm */ 0x7ac, /* PADDUSBrr */ /* Table3144 */ 0x7ad, /* PADDUSWrm */ 0x7ae, /* PADDUSWrr */ /* Table3146 */ 0x840, /* PMAXUBrm */ 0x841, /* PMAXUBrr */ /* Table3148 */ 0x7b3, /* PANDNrm */ 0x7b4, /* PANDNrr */ /* Table3150 */ 0x7b8, /* PAVGBrm */ 0x7b9, /* PAVGBrr */ /* Table3152 */ 0x8c1, /* PSRAWrm */ 0x8c2, /* PSRAWrr */ /* Table3154 */ 0x8be, /* PSRADrm */ 0x8bf, /* PSRADrr */ /* Table3156 */ 0x7bc, /* PAVGWrm */ 0x7bd, /* PAVGWrr */ /* Table3158 */ 0x871, /* PMULHUWrm */ 0x872, /* PMULHUWrr */ /* Table3160 */ 0x873, /* PMULHWrm */ 0x874, /* PMULHWrr */ /* Table3162 */ 0x286, /* CVTTPD2DQrm */ 0x287, /* CVTTPD2DQrr */ /* Table3164 */ 0x6b6, /* MOVNTDQmr */ 0x0, /* */ /* Table3166 */ 0x8d3, /* PSUBSBrm */ 0x8d4, /* PSUBSBrr */ /* Table3168 */ 0x8d5, /* PSUBSWrm */ 0x8d6, /* PSUBSWrr */ /* Table3170 */ 0x84a, /* PMINSWrm */ 0x84b, /* PMINSWrr */ /* Table3172 */ 0x89b, /* PORrm */ 0x89c, /* PORrr */ /* Table3174 */ 0x7a7, /* PADDSBrm */ 0x7a8, /* PADDSBrr */ /* Table3176 */ 0x7a9, /* PADDSWrm */ 0x7aa, /* PADDSWrr */ /* Table3178 */ 0x83e, /* PMAXSWrm */ 0x83f, /* PMAXSWrr */ /* Table3180 */ 0x914, /* PXORrm */ 0x915, /* PXORrr */ /* Table3182 */ 0x8bb, /* PSLLWrm */ 0x8bc, /* PSLLWrr */ /* Table3184 */ 0x8b5, /* PSLLDrm */ 0x8b6, /* PSLLDrr */ /* Table3186 */ 0x8b8, /* PSLLQrm */ 0x8b9, /* PSLLQrr */ /* Table3188 */ 0x879, /* PMULUDQrm */ 0x87a, /* PMULUDQrr */ /* Table3190 */ 0x838, /* PMADDWDrm */ 0x839, /* PMADDWDrr */ /* Table3192 */ 0x8a3, /* PSADBWrm */ 0x8a4, /* PSADBWrr */ /* Table3194 */ 0x0, /* */ 0x552, /* MASKMOVDQU */ /* Table3196 */ 0x8cd, /* PSUBBrm */ 0x8ce, /* PSUBBrr */ /* Table3198 */ 0x8db, /* PSUBWrm */ 0x8dc, /* PSUBWrr */ /* Table3200 */ 0x8cf, /* PSUBDrm */ 0x8d0, /* PSUBDrr */ /* Table3202 */ 0x8d1, /* PSUBQrm */ 0x8d2, /* PSUBQrr */ /* Table3204 */ 0x7a1, /* PADDBrm */ 0x7a2, /* PADDBrr */ /* Table3206 */ 0x7af, /* PADDWrm */ 0x7b0, /* PADDWrr */ /* Table3208 */ 0x7a3, /* PADDDrm */ 0x7a4, /* PADDDrr */ /* Table3210 */ 0x6c7, /* MOVSDrm */ 0x6c8, /* MOVSDrr */ /* Table3212 */ 0x6c6, /* MOVSDmr */ 0x6c9, /* MOVSDrr_REV */ /* Table3214 */ 0x69b, /* MOVDDUPrm */ 0x69c, /* MOVDDUPrr */ /* Table3216 */ 0x27a, /* CVTSI2SDrm */ 0x27b, /* CVTSI2SDrr */ /* Table3218 */ 0x6bb, /* MOVNTSD */ 0x0, /* */ /* Table3220 */ 0x28c, /* CVTTSD2SIrm */ 0x28d, /* CVTTSD2SIrr */ /* Table3222 */ 0x274, /* CVTSD2SIrm */ 0x275, /* CVTSD2SIrr */ /* Table3224 */ 0xadd, /* SQRTSDm */ 0xadf, /* SQRTSDr */ /* Table3226 */ 0x7b, /* ADDSDrm */ 0x7d, /* ADDSDrr */ /* Table3228 */ 0x70f, /* MULSDrm */ 0x711, /* MULSDrr */ /* Table3230 */ 0x276, /* CVTSD2SSrm */ 0x277, /* CVTSD2SSrr */ /* Table3232 */ 0xb4b, /* SUBSDrm */ 0xb4d, /* SUBSDrr */ /* Table3234 */ 0x575, /* MINSDrm */ 0x577, /* MINSDrr */ /* Table3236 */ 0x2bf, /* DIVSDrm */ 0x2c1, /* DIVSDrr */ /* Table3238 */ 0x560, /* MAXSDrm */ 0x562, /* MAXSDrr */ /* Table3240 */ 0x8ab, /* PSHUFLWmi */ 0x8ac, /* PSHUFLWri */ /* Table3242 */ 0x15f8, /* VMREAD32rm */ 0x3a4, /* INSERTQI */ /* Table3244 */ 0x1663, /* VMWRITE32rm */ 0x3a3, /* INSERTQ */ /* Table3246 */ 0x35b, /* HADDPSrm */ 0x35c, /* HADDPSrr */ /* Table3248 */ 0x360, /* HSUBPSrm */ 0x361, /* HSUBPSrr */ /* Table3250 */ 0x239, /* CMPSDrm */ 0x23b, /* CMPSDrr */ /* Table3252 */ 0x85, /* ADDSUBPSrm */ 0x86, /* ADDSUBPSrr */ /* Table3254 */ 0x0, /* */ 0x594, /* MMX_MOVDQ2Qrr */ /* Table3256 */ 0x26a, /* CVTPD2DQrm */ 0x26b, /* CVTPD2DQrr */ /* Table3258 */ 0x4c1, /* LDDQUrm */ 0x0, /* */ /* Table3260 */ 0x6d5, /* MOVSSrm */ 0x6d6, /* MOVSSrr */ /* Table3262 */ 0x6d4, /* MOVSSmr */ 0x6d7, /* MOVSSrr_REV */ /* Table3264 */ 0x6cf, /* MOVSLDUPrm */ 0x6d0, /* MOVSLDUPrr */ /* Table3266 */ 0x6cc, /* MOVSHDUPrm */ 0x6cd, /* MOVSHDUPrr */ /* Table3268 */ 0x27e, /* CVTSI2SSrm */ 0x27f, /* CVTSI2SSrr */ /* Table3270 */ 0x6bc, /* MOVNTSS */ 0x0, /* */ /* Table3272 */ 0x290, /* CVTTSS2SIrm */ 0x291, /* CVTTSS2SIrr */ /* Table3274 */ 0x284, /* CVTSS2SIrm */ 0x285, /* CVTSS2SIrr */ /* Table3276 */ 0xae1, /* SQRTSSm */ 0xae3, /* SQRTSSr */ /* Table3278 */ 0x9d2, /* RSQRTSSm */ 0x9d4, /* RSQRTSSr */ /* Table3280 */ 0x932, /* RCPSSm */ 0x934, /* RCPSSr */ /* Table3282 */ 0x7f, /* ADDSSrm */ 0x81, /* ADDSSrr */ /* Table3284 */ 0x713, /* MULSSrm */ 0x715, /* MULSSrr */ /* Table3286 */ 0x280, /* CVTSS2SDrm */ 0x281, /* CVTSS2SDrr */ /* Table3288 */ 0x288, /* CVTTPS2DQrm */ 0x289, /* CVTTPS2DQrr */ /* Table3290 */ 0xb4f, /* SUBSSrm */ 0xb51, /* SUBSSrr */ /* Table3292 */ 0x579, /* MINSSrm */ 0x57b, /* MINSSrr */ /* Table3294 */ 0x2c3, /* DIVSSrm */ 0x2c5, /* DIVSSrr */ /* Table3296 */ 0x564, /* MAXSSrm */ 0x566, /* MAXSSrr */ /* Table3298 */ 0x6a6, /* MOVDQUrm */ 0x6a7, /* MOVDQUrr */ /* Table3300 */ 0x8a9, /* PSHUFHWmi */ 0x8aa, /* PSHUFHWri */ /* Table3302 */ 0x6c4, /* MOVQI2PQIrm */ 0x6f2, /* MOVZPQILo2PQIrr */ /* Table3304 */ 0x6a5, /* MOVDQUmr */ 0x6a8, /* MOVDQUrr_REV */ /* Table3306 */ 0x888, /* POPCNT32rm */ 0x889, /* POPCNT32rr */ /* Table3308 */ 0xbac, /* TZCNT32rm */ 0xbad, /* TZCNT32rr */ /* Table3310 */ 0x54e, /* LZCNT32rm */ 0x54f, /* LZCNT32rr */ /* Table3312 */ 0x23f, /* CMPSSrm */ 0x241, /* CMPSSrr */ /* Table3314 */ 0x0, /* */ 0x24b, /* CMPXCHG8B */ 0x0, /* */ 0x2284, /* XRSTORS */ 0x2288, /* XSAVEC */ 0x228c, /* XSAVES */ 0x1668, /* VMXON */ 0x15f7, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x955, /* RDRAND32r */ 0x958, /* RDSEED32r */ /* Table3330 */ 0x0, /* */ 0x597, /* MMX_MOVQ2DQrr */ /* Table3332 */ 0x266, /* CVTDQ2PDrm */ 0x267, /* CVTDQ2PDrr */ /* Table3334 */ 0x886, /* POPCNT16rm */ 0x887, /* POPCNT16rr */ /* Table3336 */ 0xbaa, /* TZCNT16rm */ 0xbab, /* TZCNT16rr */ /* Table3338 */ 0x54c, /* LZCNT16rm */ 0x54d, /* LZCNT16rr */ /* Table3340 */ 0xad3, /* SLDT64m */ 0xaf6, /* STRm */ 0x4ec, /* LLDT16m */ 0x546, /* LTRm */ 0xe12, /* VERRm */ 0xe14, /* VERWm */ 0x0, /* */ 0x0, /* */ 0xad4, /* SLDT64r */ 0xaf5, /* STR64r */ 0x4ed, /* LLDT16r */ 0x547, /* LTRr */ 0xe13, /* VERRr */ 0xe15, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table3356 */ 0xa65, /* SGDT64m */ 0xaca, /* SIDT64m */ 0x4e5, /* LGDT64m */ 0x4eb, /* LIDT64m */ 0xad5, /* SMSW16m */ 0x0, /* */ 0x4ee, /* LMSW16m */ 0x3ae, /* INVLPG */ 0x0, /* */ 0x1397, /* VMCALL */ 0x1402, /* VMLAUNCH */ 0x15fc, /* VMRESUME */ 0x1667, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x63a, /* MONITORrrr */ 0x730, /* MWAITrr */ 0x171, /* CLAC */ 0xae9, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2e7, /* ENCLS */ 0x2257, /* XGETBV */ 0x228e, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x1399, /* VMFUNC */ 0x2256, /* XEND */ 0x2292, /* XTEST */ 0x2e8, /* ENCLU */ 0x15fe, /* VMRUN64 */ 0x1405, /* VMMCALL */ 0x1404, /* VMLOAD64 */ 0x1600, /* VMSAVE64 */ 0xaec, /* STGI */ 0x176, /* CLGI */ 0xacf, /* SKINIT */ 0x3b0, /* INVLPGA64 */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0xad8, /* SMSW64r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0xb68, /* SWAPGS */ 0x95b, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3428 */ 0x4b9, /* LAR64rm */ 0x4ba, /* LAR64rr */ /* Table3430 */ 0x541, /* LSL64rm */ 0x542, /* LSL64rr */ /* Table3432 */ 0xb6e, /* SYSRET64 */ /* Table3433 */ 0xb6c, /* SYSEXIT64 */ /* Table3434 */ 0x1e9, /* CMOVO64rm */ 0x1ea, /* CMOVO64rr */ /* Table3436 */ 0x1d3, /* CMOVNO64rm */ 0x1d4, /* CMOVNO64rr */ /* Table3438 */ 0x18b, /* CMOVB64rm */ 0x18c, /* CMOVB64rr */ /* Table3440 */ 0x185, /* CMOVAE64rm */ 0x186, /* CMOVAE64rr */ /* Table3442 */ 0x19f, /* CMOVE64rm */ 0x1a0, /* CMOVE64rr */ /* Table3444 */ 0x1c9, /* CMOVNE64rm */ 0x1ca, /* CMOVNE64rr */ /* Table3446 */ 0x191, /* CMOVBE64rm */ 0x192, /* CMOVBE64rr */ /* Table3448 */ 0x17f, /* CMOVA64rm */ 0x180, /* CMOVA64rr */ /* Table3450 */ 0x1f9, /* CMOVS64rm */ 0x1fa, /* CMOVS64rr */ /* Table3452 */ 0x1e3, /* CMOVNS64rm */ 0x1e4, /* CMOVNS64rr */ /* Table3454 */ 0x1ef, /* CMOVP64rm */ 0x1f0, /* CMOVP64rr */ /* Table3456 */ 0x1d9, /* CMOVNP64rm */ 0x1da, /* CMOVNP64rr */ /* Table3458 */ 0x1b5, /* CMOVL64rm */ 0x1b6, /* CMOVL64rr */ /* Table3460 */ 0x1af, /* CMOVGE64rm */ 0x1b0, /* CMOVGE64rr */ /* Table3462 */ 0x1bb, /* CMOVLE64rm */ 0x1bc, /* CMOVLE64rr */ /* Table3464 */ 0x1a9, /* CMOVG64rm */ 0x1aa, /* CMOVG64rr */ /* Table3466 */ 0x592, /* MMX_MOVD64to64rm */ 0x593, /* MMX_MOVD64to64rr */ /* Table3468 */ 0x58c, /* MMX_MOVD64from64rm */ 0x58d, /* MMX_MOVD64from64rr */ /* Table3470 */ 0x136, /* BT64mr */ 0x138, /* BT64rr */ /* Table3472 */ 0xa95, /* SHLD64mri8 */ 0xa97, /* SHLD64rri8 */ /* Table3474 */ 0xa94, /* SHLD64mrCL */ 0xa96, /* SHLD64rrCL */ /* Table3476 */ 0x15a, /* BTS64mr */ 0x15c, /* BTS64rr */ /* Table3478 */ 0xabd, /* SHRD64mri8 */ 0xabf, /* SHRD64rri8 */ /* Table3480 */ 0xabc, /* SHRD64mrCL */ 0xabe, /* SHRD64rrCL */ /* Table3482 */ 0x32e, /* FXSAVE64 */ 0x32c, /* FXRSTOR64 */ 0x4c2, /* LDMXCSR */ 0xaee, /* STMXCSR */ 0x2287, /* XSAVE64 */ 0x2283, /* XRSTOR64 */ 0x228b, /* XSAVEOPT64 */ 0x174, /* CLFLUSH */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4df, /* LFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x568, /* MFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xa62, /* SFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3554 */ 0x388, /* IMUL64rm */ 0x38b, /* IMUL64rr */ /* Table3556 */ 0x249, /* CMPXCHG64rm */ 0x24a, /* CMPXCHG64rr */ /* Table3558 */ 0x545, /* LSS64rm */ 0x0, /* */ /* Table3560 */ 0x14e, /* BTR64mr */ 0x150, /* BTR64rr */ /* Table3562 */ 0x4e2, /* LFS64rm */ 0x0, /* */ /* Table3564 */ 0x4e8, /* LGS64rm */ 0x0, /* */ /* Table3566 */ 0x6fe, /* MOVZX64rm8_Q */ 0x700, /* MOVZX64rr8_Q */ /* Table3568 */ 0x6fd, /* MOVZX64rm16_Q */ 0x6ff, /* MOVZX64rr16_Q */ /* Table3570 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x135, /* BT64mi8 */ 0x159, /* BTS64mi8 */ 0x14d, /* BTR64mi8 */ 0x141, /* BTC64mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x137, /* BT64ri8 */ 0x15b, /* BTS64ri8 */ 0x14f, /* BTR64ri8 */ 0x143, /* BTC64ri8 */ /* Table3586 */ 0x142, /* BTC64mr */ 0x144, /* BTC64rr */ /* Table3588 */ 0x123, /* BSF64rm */ 0x124, /* BSF64rr */ /* Table3590 */ 0x129, /* BSR64rm */ 0x12a, /* BSR64rr */ /* Table3592 */ 0x6e5, /* MOVSX64rm8 */ 0x6e8, /* MOVSX64rr8 */ /* Table3594 */ 0x6e2, /* MOVSX64rm16 */ 0x6e6, /* MOVSX64rr16 */ /* Table3596 */ 0x223d, /* XADD64rm */ 0x223e, /* XADD64rr */ /* Table3598 */ 0x6b7, /* MOVNTI_64mr */ 0x0, /* */ /* Table3600 */ 0x0, /* */ 0x244, /* CMPXCHG16B */ 0x0, /* */ 0x2285, /* XRSTORS64 */ 0x2289, /* XSAVEC64 */ 0x228d, /* XSAVES64 */ 0x15f6, /* VMPTRLDm */ 0x15f7, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x956, /* RDRAND64r */ 0x959, /* RDSEED64r */ /* Table3616 */ 0x12c, /* BSWAP64r */ /* Table3617 */ 0x15fa, /* VMREAD64rm */ 0x2ed, /* EXTRQI */ /* Table3619 */ 0x1665, /* VMWRITE64rm */ 0x2ec, /* EXTRQ */ /* Table3621 */ 0x32e, /* FXSAVE64 */ 0x32c, /* FXRSTOR64 */ 0x4c2, /* LDMXCSR */ 0xaee, /* STMXCSR */ 0x2287, /* XSAVE64 */ 0x2283, /* XRSTOR64 */ 0x228b, /* XSAVEOPT64 */ 0x175, /* CLFLUSHOPT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4df, /* LFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x568, /* MFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x7e4, /* PCOMMIT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3693 */ 0x0, /* */ 0x244, /* CMPXCHG16B */ 0x0, /* */ 0x2285, /* XRSTORS64 */ 0x2289, /* XSAVEC64 */ 0x228d, /* XSAVES64 */ 0x1398, /* VMCLEARm */ 0x15f7, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x956, /* RDRAND64r */ 0x959, /* RDSEED64r */ /* Table3709 */ 0x0, /* */ 0x553, /* MASKMOVDQU64 */ /* Table3711 */ 0xa65, /* SGDT64m */ 0xaca, /* SIDT64m */ 0x4e5, /* LGDT64m */ 0x4eb, /* LIDT64m */ 0xad5, /* SMSW16m */ 0x0, /* */ 0x4ee, /* LMSW16m */ 0x3ae, /* INVLPG */ 0x0, /* */ 0x1397, /* VMCALL */ 0x1402, /* VMLAUNCH */ 0x15fc, /* VMRESUME */ 0x1667, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x63a, /* MONITORrrr */ 0x730, /* MWAITrr */ 0x171, /* CLAC */ 0xae9, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2e7, /* ENCLS */ 0x2257, /* XGETBV */ 0x228e, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x1399, /* VMFUNC */ 0x2256, /* XEND */ 0x2292, /* XTEST */ 0x2e8, /* ENCLU */ 0x15fe, /* VMRUN64 */ 0x1405, /* VMMCALL */ 0x1404, /* VMLOAD64 */ 0x1600, /* VMSAVE64 */ 0xaec, /* STGI */ 0x176, /* CLGI */ 0xacf, /* SKINIT */ 0x3b0, /* INVLPGA64 */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0xad6, /* SMSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0x4ef, /* LMSW16r */ 0xb68, /* SWAPGS */ 0x95b, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3783 */ 0x15fa, /* VMREAD64rm */ 0x3a4, /* INSERTQI */ /* Table3785 */ 0x1665, /* VMWRITE64rm */ 0x3a3, /* INSERTQ */ /* Table3787 */ 0x32d, /* FXSAVE */ 0x32b, /* FXRSTOR */ 0x4c2, /* LDMXCSR */ 0xaee, /* STMXCSR */ 0x2286, /* XSAVE */ 0x2282, /* XRSTOR */ 0x228a, /* XSAVEOPT */ 0x174, /* CLFLUSH */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x94e, /* RDFSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x950, /* RDGSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2232, /* WRFSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x2234, /* WRGSBASE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4df, /* LFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x568, /* MFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xa62, /* SFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3859 */ 0x27c, /* CVTSI2SS64rm */ 0x27d, /* CVTSI2SS64rr */ /* Table3861 */ 0x28e, /* CVTTSS2SI64rm */ 0x28f, /* CVTTSS2SI64rr */ /* Table3863 */ 0x282, /* CVTSS2SI64rm */ 0x283, /* CVTSS2SI64rr */ /* Table3865 */ 0x32e, /* FXSAVE64 */ 0x32c, /* FXRSTOR64 */ 0x4c2, /* LDMXCSR */ 0xaee, /* STMXCSR */ 0x2287, /* XSAVE64 */ 0x2283, /* XRSTOR64 */ 0x228b, /* XSAVEOPT64 */ 0x174, /* CLFLUSH */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x94f, /* RDFSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x951, /* RDGSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2233, /* WRFSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x2235, /* WRGSBASE64 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x4df, /* LFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x568, /* MFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xa62, /* SFENCE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table3937 */ 0x88a, /* POPCNT64rm */ 0x88b, /* POPCNT64rr */ /* Table3939 */ 0xbae, /* TZCNT64rm */ 0xbaf, /* TZCNT64rr */ /* Table3941 */ 0x550, /* LZCNT64rm */ 0x551, /* LZCNT64rr */ /* Table3943 */ 0x0, /* */ 0x244, /* CMPXCHG16B */ 0x0, /* */ 0x2285, /* XRSTORS64 */ 0x2289, /* XSAVEC64 */ 0x228d, /* XSAVES64 */ 0x1668, /* VMXON */ 0x15f7, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x956, /* RDRAND64r */ 0x959, /* RDSEED64r */ /* Table3959 */ 0x278, /* CVTSI2SD64rm */ 0x279, /* CVTSI2SD64rr */ /* Table3961 */ 0x28a, /* CVTTSD2SI64rm */ 0x28b, /* CVTTSD2SI64rr */ /* Table3963 */ 0x272, /* CVTSD2SI64rm */ 0x273, /* CVTSD2SI64rr */ /* Table3965 */ 0x679, /* MOV64toPQIrm */ 0x67a, /* MOV64toPQIrr */ /* Table3967 */ 0x6c2, /* MOVPQIto64rm */ 0x6c3, /* MOVPQIto64rr */ /* Table3969 */ 0x15e9, /* VMOVUPSrm */ 0x15ea, /* VMOVUPSrr */ /* Table3971 */ 0x15e8, /* VMOVUPSmr */ 0x15eb, /* VMOVUPSrr_REV */ /* Table3973 */ 0x154d, /* VMOVLPSrm */ 0x1543, /* VMOVHLPSrr */ /* Table3975 */ 0x154c, /* VMOVLPSmr */ 0x0, /* */ /* Table3977 */ 0x221f, /* VUNPCKLPSrm */ 0x2220, /* VUNPCKLPSrr */ /* Table3979 */ 0x2213, /* VUNPCKHPSrm */ 0x2214, /* VUNPCKHPSrr */ /* Table3981 */ 0x1547, /* VMOVHPSrm */ 0x1549, /* VMOVLHPSrr */ /* Table3983 */ 0x1546, /* VMOVHPSmr */ 0x0, /* */ /* Table3985 */ 0x145b, /* VMOVAPSrm */ 0x145c, /* VMOVAPSrr */ /* Table3987 */ 0x145a, /* VMOVAPSmr */ 0x145d, /* VMOVAPSrr_REV */ /* Table3989 */ 0x1565, /* VMOVNTPSmr */ 0x0, /* */ /* Table3991 */ 0x2207, /* VUCOMISSrm */ 0x2208, /* VUCOMISSrr */ /* Table3993 */ 0xcf7, /* VCOMISSrm */ 0xcf8, /* VCOMISSrr */ /* Table3995 */ 0x0, /* */ 0x496, /* KNOTWrr */ /* Table3997 */ 0x0, /* */ 0x1551, /* VMOVMSKPSrr */ /* Table3999 */ 0x2186, /* VSQRTPSm */ 0x2187, /* VSQRTPSr */ /* Table4001 */ 0x212b, /* VRSQRTPSm */ 0x212d, /* VRSQRTPSr */ /* Table4003 */ 0x2098, /* VRCPPSm */ 0x209a, /* VRCPPSr */ /* Table4005 */ 0xc59, /* VANDPSrm */ 0xc5a, /* VANDPSrr */ /* Table4007 */ 0xc51, /* VANDNPSrm */ 0xc52, /* VANDNPSrr */ /* Table4009 */ 0x166f, /* VORPSrm */ 0x1670, /* VORPSrr */ /* Table4011 */ 0x2227, /* VXORPSrm */ 0x2228, /* VXORPSrr */ /* Table4013 */ 0xc0f, /* VADDPSrm */ 0xc10, /* VADDPSrr */ /* Table4015 */ 0x1643, /* VMULPSrm */ 0x1644, /* VMULPSrr */ /* Table4017 */ 0xd3a, /* VCVTPS2PDrm */ 0xd3b, /* VCVTPS2PDrr */ /* Table4019 */ 0xd16, /* VCVTDQ2PSrm */ 0xd17, /* VCVTDQ2PSrr */ /* Table4021 */ 0x21d9, /* VSUBPSrm */ 0x21da, /* VSUBPSrr */ /* Table4023 */ 0x13e2, /* VMINPSrm */ 0x13e3, /* VMINPSrr */ /* Table4025 */ 0xdec, /* VDIVPSrm */ 0xded, /* VDIVPSrr */ /* Table4027 */ 0x1377, /* VMAXPSrm */ 0x1378, /* VMAXPSrr */ /* Table4029 */ 0x222a, /* VZEROUPPER */ /* Table4030 */ 0x48f, /* KMOVWkm */ 0x48e, /* KMOVWkk */ /* Table4032 */ 0x491, /* KMOVWmk */ 0x0, /* */ /* Table4034 */ 0x0, /* */ 0x490, /* KMOVWkr */ /* Table4036 */ 0x0, /* */ 0x492, /* KMOVWrk */ /* Table4038 */ 0x0, /* */ 0x49d, /* KORTESTWrr */ /* Table4040 */ 0x0, /* */ 0x0, /* */ 0x1324, /* VLDMXCSR */ 0x2196, /* VSTMXCSR */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table4056 */ 0xcdd, /* VCMPPSrmi */ 0xcdf, /* VCMPPSrri */ /* Table4058 */ 0x2148, /* VSHUFPSrmi */ 0x2149, /* VSHUFPSrri */ /* Table4060 */ 0x1597, /* VMOVSSrm */ 0x1598, /* VMOVSSrr */ /* Table4062 */ 0x1596, /* VMOVSSmr */ 0x1599, /* VMOVSSrr_REV */ /* Table4064 */ 0x158a, /* VMOVSLDUPrm */ 0x158b, /* VMOVSLDUPrr */ /* Table4066 */ 0x1584, /* VMOVSHDUPrm */ 0x1585, /* VMOVSHDUPrr */ /* Table4068 */ 0xd5f, /* VCVTSI2SSrm */ 0xd60, /* VCVTSI2SSrr */ /* Table4070 */ 0xd97, /* VCVTTSS2SIrm */ 0xd98, /* VCVTTSS2SIrr */ /* Table4072 */ 0xd6f, /* VCVTSS2SIrm */ 0xd70, /* VCVTSS2SIrr */ /* Table4074 */ 0x2193, /* VSQRTSSm */ 0x2195, /* VSQRTSSr */ /* Table4076 */ 0x212f, /* VRSQRTSSm */ 0x2131, /* VRSQRTSSr */ /* Table4078 */ 0x209c, /* VRCPSSm */ 0x209e, /* VRCPSSr */ /* Table4080 */ 0xc2b, /* VADDSSrm */ 0xc2d, /* VADDSSrr */ /* Table4082 */ 0x165f, /* VMULSSrm */ 0x1661, /* VMULSSrr */ /* Table4084 */ 0xd67, /* VCVTSS2SDrm */ 0xd68, /* VCVTSS2SDrr */ /* Table4086 */ 0xd81, /* VCVTTPS2DQrm */ 0xd82, /* VCVTTPS2DQrr */ /* Table4088 */ 0x21f5, /* VSUBSSrm */ 0x21f7, /* VSUBSSrr */ /* Table4090 */ 0x13fe, /* VMINSSrm */ 0x1400, /* VMINSSrr */ /* Table4092 */ 0xe08, /* VDIVSSrm */ 0xe0a, /* VDIVSSrr */ /* Table4094 */ 0x1393, /* VMAXSSrm */ 0x1395, /* VMAXSSrr */ /* Table4096 */ 0x153f, /* VMOVDQUrm */ 0x1540, /* VMOVDQUrr */ /* Table4098 */ 0x1e82, /* VPSHUFHWmi */ 0x1e83, /* VPSHUFHWri */ /* Table4100 */ 0x1571, /* VMOVQI2PQIrm */ 0x15ef, /* VMOVZPQILo2PQIrr */ /* Table4102 */ 0x153e, /* VMOVDQUmr */ 0x1541, /* VMOVDQUrr_REV */ /* Table4104 */ 0xced, /* VCMPSSrm */ 0xcef, /* VCMPSSrr */ /* Table4106 */ 0xd0f, /* VCVTDQ2PDrm */ 0xd10, /* VCVTDQ2PDrr */ /* Table4108 */ 0x1579, /* VMOVSDrm */ 0x157a, /* VMOVSDrr */ /* Table4110 */ 0x1578, /* VMOVSDmr */ 0x157b, /* VMOVSDrr_REV */ /* Table4112 */ 0x1462, /* VMOVDDUPrm */ 0x1463, /* VMOVDDUPrr */ /* Table4114 */ 0xd59, /* VCVTSI2SDrm */ 0xd5a, /* VCVTSI2SDrr */ /* Table4116 */ 0xd8b, /* VCVTTSD2SIrm */ 0xd8c, /* VCVTTSD2SIrr */ /* Table4118 */ 0xd4b, /* VCVTSD2SIrm */ 0xd4c, /* VCVTSD2SIrr */ /* Table4120 */ 0x218c, /* VSQRTSDm */ 0x218e, /* VSQRTSDr */ /* Table4122 */ 0xc1c, /* VADDSDrm */ 0xc1e, /* VADDSDrr */ /* Table4124 */ 0x1650, /* VMULSDrm */ 0x1652, /* VMULSDrr */ /* Table4126 */ 0xd4f, /* VCVTSD2SSrm */ 0xd50, /* VCVTSD2SSrr */ /* Table4128 */ 0x21e6, /* VSUBSDrm */ 0x21e8, /* VSUBSDrr */ /* Table4130 */ 0x13ef, /* VMINSDrm */ 0x13f1, /* VMINSDrr */ /* Table4132 */ 0xdf9, /* VDIVSDrm */ 0xdfb, /* VDIVSDrr */ /* Table4134 */ 0x1384, /* VMAXSDrm */ 0x1386, /* VMAXSDrr */ /* Table4136 */ 0x1e86, /* VPSHUFLWmi */ 0x1e87, /* VPSHUFLWri */ /* Table4138 */ 0x1300, /* VHADDPSrm */ 0x1301, /* VHADDPSrr */ /* Table4140 */ 0x1308, /* VHSUBPSrm */ 0x1309, /* VHSUBPSrr */ /* Table4142 */ 0x0, /* */ 0x486, /* KMOVDkr */ /* Table4144 */ 0x0, /* */ 0x488, /* KMOVDrk */ /* Table4146 */ 0xce5, /* VCMPSDrm */ 0xce7, /* VCMPSDrr */ /* Table4148 */ 0xc35, /* VADDSUBPSrm */ 0xc36, /* VADDSUBPSrr */ /* Table4150 */ 0xd18, /* VCVTPD2DQXrm */ 0xd1e, /* VCVTPD2DQrr */ /* Table4152 */ 0x1323, /* VLDDQUrm */ 0x0, /* */ /* Table4154 */ 0x15c0, /* VMOVUPDrm */ 0x15c1, /* VMOVUPDrr */ /* Table4156 */ 0x15bf, /* VMOVUPDmr */ 0x15c2, /* VMOVUPDrr_REV */ /* Table4158 */ 0x154b, /* VMOVLPDrm */ 0x0, /* */ /* Table4160 */ 0x154a, /* VMOVLPDmr */ 0x0, /* */ /* Table4162 */ 0x2219, /* VUNPCKLPDrm */ 0x221a, /* VUNPCKLPDrr */ /* Table4164 */ 0x220d, /* VUNPCKHPDrm */ 0x220e, /* VUNPCKHPDrr */ /* Table4166 */ 0x1545, /* VMOVHPDrm */ 0x0, /* */ /* Table4168 */ 0x1544, /* VMOVHPDmr */ 0x0, /* */ /* Table4170 */ 0x1432, /* VMOVAPDrm */ 0x1433, /* VMOVAPDrr */ /* Table4172 */ 0x1431, /* VMOVAPDmr */ 0x1434, /* VMOVAPDrr_REV */ /* Table4174 */ 0x1560, /* VMOVNTPDmr */ 0x0, /* */ /* Table4176 */ 0x2203, /* VUCOMISDrm */ 0x2204, /* VUCOMISDrr */ /* Table4178 */ 0xcf3, /* VCOMISDrm */ 0xcf4, /* VCOMISDrr */ /* Table4180 */ 0x0, /* */ 0x493, /* KNOTBrr */ /* Table4182 */ 0x0, /* */ 0x154f, /* VMOVMSKPDrr */ /* Table4184 */ 0x2167, /* VSQRTPDm */ 0x2168, /* VSQRTPDr */ /* Table4186 */ 0xc55, /* VANDPDrm */ 0xc56, /* VANDPDrr */ /* Table4188 */ 0xc4d, /* VANDNPDrm */ 0xc4e, /* VANDNPDrr */ /* Table4190 */ 0x166b, /* VORPDrm */ 0x166c, /* VORPDrr */ /* Table4192 */ 0x2223, /* VXORPDrm */ 0x2224, /* VXORPDrr */ /* Table4194 */ 0xbed, /* VADDPDrm */ 0xbee, /* VADDPDrr */ /* Table4196 */ 0x1621, /* VMULPDrm */ 0x1622, /* VMULPDrr */ /* Table4198 */ 0xd1f, /* VCVTPD2PSXrm */ 0xd25, /* VCVTPD2PSrr */ /* Table4200 */ 0xd34, /* VCVTPS2DQrm */ 0xd35, /* VCVTPS2DQrr */ /* Table4202 */ 0x21b7, /* VSUBPDrm */ 0x21b8, /* VSUBPDrr */ /* Table4204 */ 0x13c3, /* VMINPDrm */ 0x13c4, /* VMINPDrr */ /* Table4206 */ 0xdca, /* VDIVPDrm */ 0xdcb, /* VDIVPDrr */ /* Table4208 */ 0x1358, /* VMAXPDrm */ 0x1359, /* VMAXPDrr */ /* Table4210 */ 0x1fe4, /* VPUNPCKLBWrm */ 0x1fe5, /* VPUNPCKLBWrr */ /* Table4212 */ 0x1ff4, /* VPUNPCKLWDrm */ 0x1ff5, /* VPUNPCKLWDrr */ /* Table4214 */ 0x1fea, /* VPUNPCKLDQrm */ 0x1feb, /* VPUNPCKLDQrr */ /* Table4216 */ 0x1695, /* VPACKSSWBrm */ 0x1696, /* VPACKSSWBrr */ /* Table4218 */ 0x18e1, /* VPCMPGTBrm */ 0x18e2, /* VPCMPGTBrr */ /* Table4220 */ 0x191d, /* VPCMPGTWrm */ 0x191e, /* VPCMPGTWrr */ /* Table4222 */ 0x18f7, /* VPCMPGTDrm */ 0x18f8, /* VPCMPGTDrr */ /* Table4224 */ 0x169d, /* VPACKUSWBrm */ 0x169e, /* VPACKUSWBrr */ /* Table4226 */ 0x1fd0, /* VPUNPCKHBWrm */ 0x1fd1, /* VPUNPCKHBWrr */ /* Table4228 */ 0x1fe0, /* VPUNPCKHWDrm */ 0x1fe1, /* VPUNPCKHWDrr */ /* Table4230 */ 0x1fd6, /* VPUNPCKHDQrm */ 0x1fd7, /* VPUNPCKHDQrr */ /* Table4232 */ 0x1691, /* VPACKSSDWrm */ 0x1692, /* VPACKSSDWrr */ /* Table4234 */ 0x1ff0, /* VPUNPCKLQDQrm */ 0x1ff1, /* VPUNPCKLQDQrr */ /* Table4236 */ 0x1fdc, /* VPUNPCKHQDQrm */ 0x1fdd, /* VPUNPCKHQDQrr */ /* Table4238 */ 0x1466, /* VMOVDI2PDIrm */ 0x1467, /* VMOVDI2PDIrr */ /* Table4240 */ 0x14b3, /* VMOVDQArm */ 0x14b4, /* VMOVDQArr */ /* Table4242 */ 0x1e7e, /* VPSHUFDmi */ 0x1e7f, /* VPSHUFDri */ /* Table4244 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f45, /* VPSRLWri */ 0x0, /* */ 0x1f05, /* VPSRAWri */ 0x0, /* */ 0x1ed1, /* VPSLLWri */ 0x0, /* */ /* Table4260 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f19, /* VPSRLDri */ 0x0, /* */ 0x1ee3, /* VPSRADri */ 0x0, /* */ 0x1ea5, /* VPSLLDri */ 0x0, /* */ /* Table4276 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f2b, /* VPSRLQri */ 0x1f09, /* VPSRLDQri */ 0x0, /* */ 0x0, /* */ 0x1eb7, /* VPSLLQri */ 0x1e95, /* VPSLLDQri */ /* Table4292 */ 0x188d, /* VPCMPEQBrm */ 0x188e, /* VPCMPEQBrr */ /* Table4294 */ 0x18c9, /* VPCMPEQWrm */ 0x18ca, /* VPCMPEQWrr */ /* Table4296 */ 0x18a3, /* VPCMPEQDrm */ 0x18a4, /* VPCMPEQDrr */ /* Table4298 */ 0x12fc, /* VHADDPDrm */ 0x12fd, /* VHADDPDrr */ /* Table4300 */ 0x1304, /* VHSUBPDrm */ 0x1305, /* VHSUBPDrr */ /* Table4302 */ 0x1568, /* VMOVPDI2DImr */ 0x1569, /* VMOVPDI2DIrr */ /* Table4304 */ 0x14b2, /* VMOVDQAmr */ 0x14b5, /* VMOVDQArr_REV */ /* Table4306 */ 0x480, /* KMOVBkm */ 0x47f, /* KMOVBkk */ /* Table4308 */ 0x482, /* KMOVBmk */ 0x0, /* */ /* Table4310 */ 0x0, /* */ 0x481, /* KMOVBkr */ /* Table4312 */ 0x0, /* */ 0x483, /* KMOVBrk */ /* Table4314 */ 0x0, /* */ 0x49a, /* KORTESTBrr */ /* Table4316 */ 0xccf, /* VCMPPDrmi */ 0xcd1, /* VCMPPDrri */ /* Table4318 */ 0x1af6, /* VPINSRWrmi */ 0x1af7, /* VPINSRWrri */ /* Table4320 */ 0x0, /* */ 0x1aaa, /* VPEXTRWri */ /* Table4322 */ 0x2142, /* VSHUFPDrmi */ 0x2143, /* VSHUFPDrri */ /* Table4324 */ 0xc31, /* VADDSUBPDrm */ 0xc32, /* VADDSUBPDrr */ /* Table4326 */ 0x1f46, /* VPSRLWrm */ 0x1f47, /* VPSRLWrr */ /* Table4328 */ 0x1f1a, /* VPSRLDrm */ 0x1f1b, /* VPSRLDrr */ /* Table4330 */ 0x1f2c, /* VPSRLQrm */ 0x1f2d, /* VPSRLQrr */ /* Table4332 */ 0x16f1, /* VPADDQrm */ 0x16f2, /* VPADDQrr */ /* Table4334 */ 0x1df6, /* VPMULLWrm */ 0x1df7, /* VPMULLWrr */ /* Table4336 */ 0x156a, /* VMOVPQI2QImr */ 0x156b, /* VMOVPQI2QIrr */ /* Table4338 */ 0x0, /* */ 0x1ce1, /* VPMOVMSKBrr */ /* Table4340 */ 0x1fa6, /* VPSUBUSBrm */ 0x1fa7, /* VPSUBUSBrr */ /* Table4342 */ 0x1faa, /* VPSUBUSWrm */ 0x1fab, /* VPSUBUSWrr */ /* Table4344 */ 0x1c78, /* VPMINUBrm */ 0x1c79, /* VPMINUBrr */ /* Table4346 */ 0x178f, /* VPANDrm */ 0x1790, /* VPANDrr */ /* Table4348 */ 0x16fd, /* VPADDUSBrm */ 0x16fe, /* VPADDUSBrr */ /* Table4350 */ 0x1701, /* VPADDUSWrm */ 0x1702, /* VPADDUSWrr */ /* Table4352 */ 0x1bac, /* VPMAXUBrm */ 0x1bad, /* VPMAXUBrr */ /* Table4354 */ 0x1770, /* VPANDNrm */ 0x1771, /* VPANDNrr */ /* Table4356 */ 0x1793, /* VPAVGBrm */ 0x1794, /* VPAVGBrr */ /* Table4358 */ 0x1f06, /* VPSRAWrm */ 0x1f07, /* VPSRAWrr */ /* Table4360 */ 0x1ee4, /* VPSRADrm */ 0x1ee5, /* VPSRADrr */ /* Table4362 */ 0x1797, /* VPAVGWrm */ 0x1798, /* VPAVGWrr */ /* Table4364 */ 0x1da2, /* VPMULHUWrm */ 0x1da3, /* VPMULHUWrr */ /* Table4366 */ 0x1da6, /* VPMULHWrm */ 0x1da7, /* VPMULHWrr */ /* Table4368 */ 0xd75, /* VCVTTPD2DQXrm */ 0xd7a, /* VCVTTPD2DQrr */ /* Table4370 */ 0x155b, /* VMOVNTDQmr */ 0x0, /* */ /* Table4372 */ 0x1f9e, /* VPSUBSBrm */ 0x1f9f, /* VPSUBSBrr */ /* Table4374 */ 0x1fa2, /* VPSUBSWrm */ 0x1fa3, /* VPSUBSWrr */ /* Table4376 */ 0x1c62, /* VPMINSWrm */ 0x1c63, /* VPMINSWrr */ /* Table4378 */ 0x1e3d, /* VPORrm */ 0x1e3e, /* VPORrr */ /* Table4380 */ 0x16f5, /* VPADDSBrm */ 0x16f6, /* VPADDSBrr */ /* Table4382 */ 0x16f9, /* VPADDSWrm */ 0x16fa, /* VPADDSWrr */ /* Table4384 */ 0x1b96, /* VPMAXSWrm */ 0x1b97, /* VPMAXSWrr */ /* Table4386 */ 0x202e, /* VPXORrm */ 0x202f, /* VPXORrr */ /* Table4388 */ 0x1ed2, /* VPSLLWrm */ 0x1ed3, /* VPSLLWrr */ /* Table4390 */ 0x1ea6, /* VPSLLDrm */ 0x1ea7, /* VPSLLDrr */ /* Table4392 */ 0x1eb8, /* VPSLLQrm */ 0x1eb9, /* VPSLLQrr */ /* Table4394 */ 0x1e03, /* VPMULUDQrm */ 0x1e04, /* VPMULUDQrr */ /* Table4396 */ 0x1b28, /* VPMADDWDrm */ 0x1b29, /* VPMADDWDrr */ /* Table4398 */ 0x1e58, /* VPSADBWrm */ 0x1e59, /* VPSADBWrr */ /* Table4400 */ 0x0, /* */ 0x1325, /* VMASKMOVDQU */ /* Table4402 */ 0x1f5c, /* VPSUBBrm */ 0x1f5d, /* VPSUBBrr */ /* Table4404 */ 0x1fc0, /* VPSUBWrm */ 0x1fc1, /* VPSUBWrr */ /* Table4406 */ 0x1f7b, /* VPSUBDrm */ 0x1f7c, /* VPSUBDrr */ /* Table4408 */ 0x1f9a, /* VPSUBQrm */ 0x1f9b, /* VPSUBQrr */ /* Table4410 */ 0x16b3, /* VPADDBrm */ 0x16b4, /* VPADDBrr */ /* Table4412 */ 0x1717, /* VPADDWrm */ 0x1718, /* VPADDWrr */ /* Table4414 */ 0x16d2, /* VPADDDrm */ 0x16d3, /* VPADDDrr */ /* Table4416 */ 0x0, /* */ 0x495, /* KNOTQrr */ /* Table4418 */ 0x48a, /* KMOVQkm */ 0x489, /* KMOVQkk */ /* Table4420 */ 0x48c, /* KMOVQmk */ 0x0, /* */ /* Table4422 */ 0x0, /* */ 0x49c, /* KORTESTQrr */ /* Table4424 */ 0xd5b, /* VCVTSI2SS64rm */ 0xd5c, /* VCVTSI2SS64rr */ /* Table4426 */ 0xd93, /* VCVTTSS2SI64rm */ 0xd94, /* VCVTTSS2SI64rr */ /* Table4428 */ 0xd6b, /* VCVTSS2SI64rm */ 0xd6c, /* VCVTSS2SI64rr */ /* Table4430 */ 0xd55, /* VCVTSI2SD64rm */ 0xd56, /* VCVTSI2SD64rr */ /* Table4432 */ 0xd87, /* VCVTTSD2SI64rm */ 0xd88, /* VCVTTSD2SI64rr */ /* Table4434 */ 0xd47, /* VCVTSD2SI64rm */ 0xd48, /* VCVTSD2SI64rr */ /* Table4436 */ 0x0, /* */ 0x48b, /* KMOVQkr */ /* Table4438 */ 0x0, /* */ 0x48d, /* KMOVQrk */ /* Table4440 */ 0x0, /* */ 0x494, /* KNOTDrr */ /* Table4442 */ 0x1407, /* VMOV64toPQIrm */ 0x1408, /* VMOV64toPQIrr */ /* Table4444 */ 0x156e, /* VMOVPQIto64rm */ 0x156f, /* VMOVPQIto64rr */ /* Table4446 */ 0x485, /* KMOVDkm */ 0x484, /* KMOVDkk */ /* Table4448 */ 0x487, /* KMOVDmk */ 0x0, /* */ /* Table4450 */ 0x0, /* */ 0x49b, /* KORTESTDrr */ /* Table4452 */ 0x15c4, /* VMOVUPSYrm */ 0x15c5, /* VMOVUPSYrr */ /* Table4454 */ 0x15c3, /* VMOVUPSYmr */ 0x15c6, /* VMOVUPSYrr_REV */ /* Table4456 */ 0x221b, /* VUNPCKLPSYrm */ 0x221c, /* VUNPCKLPSYrr */ /* Table4458 */ 0x220f, /* VUNPCKHPSYrm */ 0x2210, /* VUNPCKHPSYrr */ /* Table4460 */ 0x1436, /* VMOVAPSYrm */ 0x1437, /* VMOVAPSYrr */ /* Table4462 */ 0x1435, /* VMOVAPSYmr */ 0x1438, /* VMOVAPSYrr_REV */ /* Table4464 */ 0x1561, /* VMOVNTPSYmr */ 0x0, /* */ /* Table4466 */ 0x0, /* */ 0x47e, /* KANDWrr */ /* Table4468 */ 0x0, /* */ 0x47c, /* KANDNWrr */ /* Table4470 */ 0x0, /* */ 0x49e, /* KORWrr */ /* Table4472 */ 0x0, /* */ 0x4af, /* KXNORWrr */ /* Table4474 */ 0x0, /* */ 0x4b3, /* KXORWrr */ /* Table4476 */ 0x0, /* */ 0x1550, /* VMOVMSKPSYrr */ /* Table4478 */ 0x2169, /* VSQRTPSYm */ 0x216a, /* VSQRTPSYr */ /* Table4480 */ 0x2127, /* VRSQRTPSYm */ 0x2129, /* VRSQRTPSYr */ /* Table4482 */ 0x2094, /* VRCPPSYm */ 0x2096, /* VRCPPSYr */ /* Table4484 */ 0xc57, /* VANDPSYrm */ 0xc58, /* VANDPSYrr */ /* Table4486 */ 0xc4f, /* VANDNPSYrm */ 0xc50, /* VANDNPSYrr */ /* Table4488 */ 0x166d, /* VORPSYrm */ 0x166e, /* VORPSYrr */ /* Table4490 */ 0x2225, /* VXORPSYrm */ 0x2226, /* VXORPSYrr */ /* Table4492 */ 0xbef, /* VADDPSYrm */ 0xbf0, /* VADDPSYrr */ /* Table4494 */ 0x1623, /* VMULPSYrm */ 0x1624, /* VMULPSYrr */ /* Table4496 */ 0xd36, /* VCVTPS2PDYrm */ 0xd37, /* VCVTPS2PDYrr */ /* Table4498 */ 0xd11, /* VCVTDQ2PSYrm */ 0xd12, /* VCVTDQ2PSYrr */ /* Table4500 */ 0x21b9, /* VSUBPSYrm */ 0x21ba, /* VSUBPSYrr */ /* Table4502 */ 0x13c5, /* VMINPSYrm */ 0x13c6, /* VMINPSYrr */ /* Table4504 */ 0xdcc, /* VDIVPSYrm */ 0xdcd, /* VDIVPSYrr */ /* Table4506 */ 0x135a, /* VMAXPSYrm */ 0x135b, /* VMAXPSYrr */ /* Table4508 */ 0x2229, /* VZEROALL */ /* Table4509 */ 0xcd3, /* VCMPPSYrmi */ 0xcd5, /* VCMPPSYrri */ /* Table4511 */ 0x2144, /* VSHUFPSYrmi */ 0x2145, /* VSHUFPSYrri */ /* Table4513 */ 0x1586, /* VMOVSLDUPYrm */ 0x1587, /* VMOVSLDUPYrr */ /* Table4515 */ 0x1580, /* VMOVSHDUPYrm */ 0x1581, /* VMOVSHDUPYrr */ /* Table4517 */ 0xd7d, /* VCVTTPS2DQYrm */ 0xd7e, /* VCVTTPS2DQYrr */ /* Table4519 */ 0x153b, /* VMOVDQUYrm */ 0x153c, /* VMOVDQUYrr */ /* Table4521 */ 0x1e80, /* VPSHUFHWYmi */ 0x1e81, /* VPSHUFHWYri */ /* Table4523 */ 0x153a, /* VMOVDQUYmr */ 0x153d, /* VMOVDQUYrr_REV */ /* Table4525 */ 0xd0b, /* VCVTDQ2PDYrm */ 0xd0c, /* VCVTDQ2PDYrr */ /* Table4527 */ 0x145e, /* VMOVDDUPYrm */ 0x145f, /* VMOVDDUPYrr */ /* Table4529 */ 0x1e84, /* VPSHUFLWYmi */ 0x1e85, /* VPSHUFLWYri */ /* Table4531 */ 0x12fe, /* VHADDPSYrm */ 0x12ff, /* VHADDPSYrr */ /* Table4533 */ 0x1306, /* VHSUBPSYrm */ 0x1307, /* VHSUBPSYrr */ /* Table4535 */ 0xc33, /* VADDSUBPSYrm */ 0xc34, /* VADDSUBPSYrr */ /* Table4537 */ 0xd19, /* VCVTPD2DQYrm */ 0xd1a, /* VCVTPD2DQYrr */ /* Table4539 */ 0x1322, /* VLDDQUYrm */ 0x0, /* */ /* Table4541 */ 0x159b, /* VMOVUPDYrm */ 0x159c, /* VMOVUPDYrr */ /* Table4543 */ 0x159a, /* VMOVUPDYmr */ 0x159d, /* VMOVUPDYrr_REV */ /* Table4545 */ 0x2215, /* VUNPCKLPDYrm */ 0x2216, /* VUNPCKLPDYrr */ /* Table4547 */ 0x2209, /* VUNPCKHPDYrm */ 0x220a, /* VUNPCKHPDYrr */ /* Table4549 */ 0x140d, /* VMOVAPDYrm */ 0x140e, /* VMOVAPDYrr */ /* Table4551 */ 0x140c, /* VMOVAPDYmr */ 0x140f, /* VMOVAPDYrr_REV */ /* Table4553 */ 0x155c, /* VMOVNTPDYmr */ 0x0, /* */ /* Table4555 */ 0x0, /* */ 0x477, /* KANDBrr */ /* Table4557 */ 0x0, /* */ 0x479, /* KANDNBrr */ /* Table4559 */ 0x0, /* */ 0x497, /* KORBrr */ /* Table4561 */ 0x0, /* */ 0x4ac, /* KXNORBrr */ /* Table4563 */ 0x0, /* */ 0x4b0, /* KXORBrr */ /* Table4565 */ 0x0, /* */ 0x4ab, /* KUNPCKBWrr */ /* Table4567 */ 0x0, /* */ 0x154e, /* VMOVMSKPDYrr */ /* Table4569 */ 0x214a, /* VSQRTPDYm */ 0x214b, /* VSQRTPDYr */ /* Table4571 */ 0xc53, /* VANDPDYrm */ 0xc54, /* VANDPDYrr */ /* Table4573 */ 0xc4b, /* VANDNPDYrm */ 0xc4c, /* VANDNPDYrr */ /* Table4575 */ 0x1669, /* VORPDYrm */ 0x166a, /* VORPDYrr */ /* Table4577 */ 0x2221, /* VXORPDYrm */ 0x2222, /* VXORPDYrr */ /* Table4579 */ 0xbcd, /* VADDPDYrm */ 0xbce, /* VADDPDYrr */ /* Table4581 */ 0x1601, /* VMULPDYrm */ 0x1602, /* VMULPDYrr */ /* Table4583 */ 0xd20, /* VCVTPD2PSYrm */ 0xd21, /* VCVTPD2PSYrr */ /* Table4585 */ 0xd2f, /* VCVTPS2DQYrm */ 0xd30, /* VCVTPS2DQYrr */ /* Table4587 */ 0x2197, /* VSUBPDYrm */ 0x2198, /* VSUBPDYrr */ /* Table4589 */ 0x13a6, /* VMINPDYrm */ 0x13a7, /* VMINPDYrr */ /* Table4591 */ 0xdaa, /* VDIVPDYrm */ 0xdab, /* VDIVPDYrr */ /* Table4593 */ 0x133b, /* VMAXPDYrm */ 0x133c, /* VMAXPDYrr */ /* Table4595 */ 0x1fe2, /* VPUNPCKLBWYrm */ 0x1fe3, /* VPUNPCKLBWYrr */ /* Table4597 */ 0x1ff2, /* VPUNPCKLWDYrm */ 0x1ff3, /* VPUNPCKLWDYrr */ /* Table4599 */ 0x1fe6, /* VPUNPCKLDQYrm */ 0x1fe7, /* VPUNPCKLDQYrr */ /* Table4601 */ 0x1693, /* VPACKSSWBYrm */ 0x1694, /* VPACKSSWBYrr */ /* Table4603 */ 0x18d3, /* VPCMPGTBYrm */ 0x18d4, /* VPCMPGTBYrr */ /* Table4605 */ 0x190f, /* VPCMPGTWYrm */ 0x1910, /* VPCMPGTWYrr */ /* Table4607 */ 0x18e3, /* VPCMPGTDYrm */ 0x18e4, /* VPCMPGTDYrr */ /* Table4609 */ 0x169b, /* VPACKUSWBYrm */ 0x169c, /* VPACKUSWBYrr */ /* Table4611 */ 0x1fce, /* VPUNPCKHBWYrm */ 0x1fcf, /* VPUNPCKHBWYrr */ /* Table4613 */ 0x1fde, /* VPUNPCKHWDYrm */ 0x1fdf, /* VPUNPCKHWDYrr */ /* Table4615 */ 0x1fd2, /* VPUNPCKHDQYrm */ 0x1fd3, /* VPUNPCKHDQYrr */ /* Table4617 */ 0x168f, /* VPACKSSDWYrm */ 0x1690, /* VPACKSSDWYrr */ /* Table4619 */ 0x1fec, /* VPUNPCKLQDQYrm */ 0x1fed, /* VPUNPCKLQDQYrr */ /* Table4621 */ 0x1fd8, /* VPUNPCKHQDQYrm */ 0x1fd9, /* VPUNPCKHQDQYrr */ /* Table4623 */ 0x14af, /* VMOVDQAYrm */ 0x14b0, /* VMOVDQAYrr */ /* Table4625 */ 0x1e7a, /* VPSHUFDYmi */ 0x1e7b, /* VPSHUFDYri */ /* Table4627 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f42, /* VPSRLWYri */ 0x0, /* */ 0x1f02, /* VPSRAWYri */ 0x0, /* */ 0x1ece, /* VPSLLWYri */ 0x0, /* */ /* Table4643 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f0a, /* VPSRLDYri */ 0x0, /* */ 0x1ed4, /* VPSRADYri */ 0x0, /* */ 0x1e96, /* VPSLLDYri */ 0x0, /* */ /* Table4659 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f1c, /* VPSRLQYri */ 0x1f08, /* VPSRLDQYri */ 0x0, /* */ 0x0, /* */ 0x1ea8, /* VPSLLQYri */ 0x1e94, /* VPSLLDQYri */ /* Table4675 */ 0x187f, /* VPCMPEQBYrm */ 0x1880, /* VPCMPEQBYrr */ /* Table4677 */ 0x18bb, /* VPCMPEQWYrm */ 0x18bc, /* VPCMPEQWYrr */ /* Table4679 */ 0x188f, /* VPCMPEQDYrm */ 0x1890, /* VPCMPEQDYrr */ /* Table4681 */ 0x12fa, /* VHADDPDYrm */ 0x12fb, /* VHADDPDYrr */ /* Table4683 */ 0x1302, /* VHSUBPDYrm */ 0x1303, /* VHSUBPDYrr */ /* Table4685 */ 0x14ae, /* VMOVDQAYmr */ 0x14b1, /* VMOVDQAYrr_REV */ /* Table4687 */ 0xcc5, /* VCMPPDYrmi */ 0xcc7, /* VCMPPDYrri */ /* Table4689 */ 0x213e, /* VSHUFPDYrmi */ 0x213f, /* VSHUFPDYrri */ /* Table4691 */ 0xc2f, /* VADDSUBPDYrm */ 0xc30, /* VADDSUBPDYrr */ /* Table4693 */ 0x1f43, /* VPSRLWYrm */ 0x1f44, /* VPSRLWYrr */ /* Table4695 */ 0x1f0b, /* VPSRLDYrm */ 0x1f0c, /* VPSRLDYrr */ /* Table4697 */ 0x1f1d, /* VPSRLQYrm */ 0x1f1e, /* VPSRLQYrr */ /* Table4699 */ 0x16d4, /* VPADDQYrm */ 0x16d5, /* VPADDQYrr */ /* Table4701 */ 0x1de2, /* VPMULLWYrm */ 0x1de3, /* VPMULLWYrr */ /* Table4703 */ 0x0, /* */ 0x1ce0, /* VPMOVMSKBYrr */ /* Table4705 */ 0x1fa4, /* VPSUBUSBYrm */ 0x1fa5, /* VPSUBUSBYrr */ /* Table4707 */ 0x1fa8, /* VPSUBUSWYrm */ 0x1fa9, /* VPSUBUSWYrr */ /* Table4709 */ 0x1c64, /* VPMINUBYrm */ 0x1c65, /* VPMINUBYrr */ /* Table4711 */ 0x178d, /* VPANDYrm */ 0x178e, /* VPANDYrr */ /* Table4713 */ 0x16fb, /* VPADDUSBYrm */ 0x16fc, /* VPADDUSBYrr */ /* Table4715 */ 0x16ff, /* VPADDUSWYrm */ 0x1700, /* VPADDUSWYrr */ /* Table4717 */ 0x1b98, /* VPMAXUBYrm */ 0x1b99, /* VPMAXUBYrr */ /* Table4719 */ 0x176e, /* VPANDNYrm */ 0x176f, /* VPANDNYrr */ /* Table4721 */ 0x1791, /* VPAVGBYrm */ 0x1792, /* VPAVGBYrr */ /* Table4723 */ 0x1f03, /* VPSRAWYrm */ 0x1f04, /* VPSRAWYrr */ /* Table4725 */ 0x1ed5, /* VPSRADYrm */ 0x1ed6, /* VPSRADYrr */ /* Table4727 */ 0x1795, /* VPAVGWYrm */ 0x1796, /* VPAVGWYrr */ /* Table4729 */ 0x1da0, /* VPMULHUWYrm */ 0x1da1, /* VPMULHUWYrr */ /* Table4731 */ 0x1da4, /* VPMULHWYrm */ 0x1da5, /* VPMULHWYrr */ /* Table4733 */ 0xd76, /* VCVTTPD2DQYrm */ 0xd77, /* VCVTTPD2DQYrr */ /* Table4735 */ 0x1557, /* VMOVNTDQYmr */ 0x0, /* */ /* Table4737 */ 0x1f9c, /* VPSUBSBYrm */ 0x1f9d, /* VPSUBSBYrr */ /* Table4739 */ 0x1fa0, /* VPSUBSWYrm */ 0x1fa1, /* VPSUBSWYrr */ /* Table4741 */ 0x1c4e, /* VPMINSWYrm */ 0x1c4f, /* VPMINSWYrr */ /* Table4743 */ 0x1e3b, /* VPORYrm */ 0x1e3c, /* VPORYrr */ /* Table4745 */ 0x16f3, /* VPADDSBYrm */ 0x16f4, /* VPADDSBYrr */ /* Table4747 */ 0x16f7, /* VPADDSWYrm */ 0x16f8, /* VPADDSWYrr */ /* Table4749 */ 0x1b82, /* VPMAXSWYrm */ 0x1b83, /* VPMAXSWYrr */ /* Table4751 */ 0x202c, /* VPXORYrm */ 0x202d, /* VPXORYrr */ /* Table4753 */ 0x1ecf, /* VPSLLWYrm */ 0x1ed0, /* VPSLLWYrr */ /* Table4755 */ 0x1e97, /* VPSLLDYrm */ 0x1e98, /* VPSLLDYrr */ /* Table4757 */ 0x1ea9, /* VPSLLQYrm */ 0x1eaa, /* VPSLLQYrr */ /* Table4759 */ 0x1df8, /* VPMULUDQYrm */ 0x1df9, /* VPMULUDQYrr */ /* Table4761 */ 0x1b26, /* VPMADDWDYrm */ 0x1b27, /* VPMADDWDYrr */ /* Table4763 */ 0x1e56, /* VPSADBWYrm */ 0x1e57, /* VPSADBWYrr */ /* Table4765 */ 0x1f48, /* VPSUBBYrm */ 0x1f49, /* VPSUBBYrr */ /* Table4767 */ 0x1fac, /* VPSUBWYrm */ 0x1fad, /* VPSUBWYrr */ /* Table4769 */ 0x1f5e, /* VPSUBDYrm */ 0x1f5f, /* VPSUBDYrr */ /* Table4771 */ 0x1f7d, /* VPSUBQYrm */ 0x1f7e, /* VPSUBQYrr */ /* Table4773 */ 0x169f, /* VPADDBYrm */ 0x16a0, /* VPADDBYrr */ /* Table4775 */ 0x1703, /* VPADDWYrm */ 0x1704, /* VPADDWYrr */ /* Table4777 */ 0x16b5, /* VPADDDYrm */ 0x16b6, /* VPADDDYrr */ /* Table4779 */ 0x0, /* */ 0x47d, /* KANDQrr */ /* Table4781 */ 0x0, /* */ 0x47b, /* KANDNQrr */ /* Table4783 */ 0x0, /* */ 0x499, /* KORQrr */ /* Table4785 */ 0x0, /* */ 0x4ae, /* KXNORQrr */ /* Table4787 */ 0x0, /* */ 0x4b2, /* KXORQrr */ /* Table4789 */ 0x0, /* */ 0x478, /* KANDDrr */ /* Table4791 */ 0x0, /* */ 0x47a, /* KANDNDrr */ /* Table4793 */ 0x0, /* */ 0x498, /* KORDrr */ /* Table4795 */ 0x0, /* */ 0x4ad, /* KXNORDrr */ /* Table4797 */ 0x0, /* */ 0x4b1, /* KXORDrr */ /* Table4799 */ 0x15c9, /* VMOVUPSZ128rm */ 0x15cc, /* VMOVUPSZ128rr */ /* Table4801 */ 0x15c7, /* VMOVUPSZ128mr */ 0x15cd, /* VMOVUPSZ128rr_alt */ /* Table4803 */ 0x0, /* */ 0x1542, /* VMOVHLPSZrr */ /* Table4805 */ 0x0, /* */ 0x1548, /* VMOVLHPSZrr */ /* Table4807 */ 0x143b, /* VMOVAPSZ128rm */ 0x143e, /* VMOVAPSZ128rr */ /* Table4809 */ 0x1439, /* VMOVAPSZ128mr */ 0x143f, /* VMOVAPSZ128rr_alt */ /* Table4811 */ 0x1562, /* VMOVNTPSZ128mr */ 0x0, /* */ /* Table4813 */ 0x2205, /* VUCOMISSZrm */ 0x2206, /* VUCOMISSZrr */ /* Table4815 */ 0xcf5, /* VCOMISSZrm */ 0xcf6, /* VCOMISSZrr */ /* Table4817 */ 0x216b, /* VSQRTPSZ128m */ 0x2171, /* VSQRTPSZ128r */ /* Table4819 */ 0xbf1, /* VADDPSZ128rm */ 0xbf7, /* VADDPSZ128rr */ /* Table4821 */ 0x1625, /* VMULPSZ128rm */ 0x162b, /* VMULPSZ128rr */ /* Table4823 */ 0x21bb, /* VSUBPSZ128rm */ 0x21c1, /* VSUBPSZ128rr */ /* Table4825 */ 0x13c7, /* VMINPSZ128rm */ 0x13cd, /* VMINPSZ128rr */ /* Table4827 */ 0xdce, /* VDIVPSZ128rm */ 0xdd4, /* VDIVPSZ128rr */ /* Table4829 */ 0x135c, /* VMAXPSZ128rm */ 0x1362, /* VMAXPSZ128rr */ /* Table4831 */ 0x1592, /* VMOVSSZrm */ 0x1593, /* VMOVSSZrr */ /* Table4833 */ 0x1590, /* VMOVSSZmr */ 0x1594, /* VMOVSSZrr_REV */ /* Table4835 */ 0xd5d, /* VCVTSI2SSZrm */ 0xd5e, /* VCVTSI2SSZrr */ /* Table4837 */ 0xd95, /* VCVTTSS2SIZrm */ 0xd96, /* VCVTTSS2SIZrr */ /* Table4839 */ 0xd6d, /* VCVTSS2SIZrm */ 0xd6e, /* VCVTSS2SIZrr */ /* Table4841 */ 0x218f, /* VSQRTSSZm */ 0x2191, /* VSQRTSSZr */ /* Table4843 */ 0xc21, /* VADDSSZrm_Int */ 0xc25, /* VADDSSZrr_Int */ /* Table4845 */ 0x1655, /* VMULSSZrm_Int */ 0x1659, /* VMULSSZrr_Int */ /* Table4847 */ 0xd65, /* VCVTSS2SDZrm */ 0xd66, /* VCVTSS2SDZrr */ /* Table4849 */ 0x21eb, /* VSUBSSZrm_Int */ 0x21ef, /* VSUBSSZrr_Int */ /* Table4851 */ 0x13f4, /* VMINSSZrm_Int */ 0x13f8, /* VMINSSZrr_Int */ /* Table4853 */ 0xdfe, /* VDIVSSZrm_Int */ 0xe02, /* VDIVSSZrr_Int */ /* Table4855 */ 0x1389, /* VMAXSSZrm_Int */ 0x138d, /* VMAXSSZrr_Int */ /* Table4857 */ 0x14d9, /* VMOVDQU32Z128rm */ 0x14dc, /* VMOVDQU32Z128rr */ /* Table4859 */ 0xd9b, /* VCVTTSS2USIZrm */ 0xd9c, /* VCVTTSS2USIZrr */ /* Table4861 */ 0xd73, /* VCVTSS2USIZrm */ 0xd74, /* VCVTSS2USIZrr */ /* Table4863 */ 0xda4, /* VCVTUSI2SSZrm */ 0xda5, /* VCVTUSI2SSZrr */ /* Table4865 */ 0x14d7, /* VMOVDQU32Z128mr */ 0x14dd, /* VMOVDQU32Z128rr_alt */ /* Table4867 */ 0xce9, /* VCMPSSZrm */ 0xceb, /* VCMPSSZrr */ /* Table4869 */ 0xd57, /* VCVTSI2SDZrm */ 0xd58, /* VCVTSI2SDZrr */ /* Table4871 */ 0xd89, /* VCVTTSD2SIZrm */ 0xd8a, /* VCVTTSD2SIZrr */ /* Table4873 */ 0xd49, /* VCVTSD2SIZrm */ 0xd4a, /* VCVTSD2SIZrr */ /* Table4875 */ 0x151b, /* VMOVDQU8Z128rm */ 0x151e, /* VMOVDQU8Z128rr */ /* Table4877 */ 0xd8f, /* VCVTTSD2USIZrm */ 0xd90, /* VCVTTSD2USIZrr */ /* Table4879 */ 0xd53, /* VCVTSD2USIZrm */ 0xd54, /* VCVTSD2USIZrr */ /* Table4881 */ 0xda2, /* VCVTUSI2SDZrm */ 0xda3, /* VCVTUSI2SDZrr */ /* Table4883 */ 0x1519, /* VMOVDQU8Z128mr */ 0x151f, /* VMOVDQU8Z128rr_alt */ /* Table4885 */ 0x18d5, /* VPCMPGTBZ128rm */ 0x18d7, /* VPCMPGTBZ128rr */ /* Table4887 */ 0x1911, /* VPCMPGTWZ128rm */ 0x1913, /* VPCMPGTWZ128rr */ /* Table4889 */ 0x18e5, /* VPCMPGTDZ128rm */ 0x18e9, /* VPCMPGTDZ128rr */ /* Table4891 */ 0x1464, /* VMOVDI2PDIZrm */ 0x1465, /* VMOVDI2PDIZrr */ /* Table4893 */ 0x146e, /* VMOVDQA32Z128rm */ 0x1471, /* VMOVDQA32Z128rr */ /* Table4895 */ 0x1881, /* VPCMPEQBZ128rm */ 0x1883, /* VPCMPEQBZ128rr */ /* Table4897 */ 0x18bd, /* VPCMPEQWZ128rm */ 0x18bf, /* VPCMPEQWZ128rr */ /* Table4899 */ 0x1891, /* VPCMPEQDZ128rm */ 0x1895, /* VPCMPEQDZ128rr */ /* Table4901 */ 0x1566, /* VMOVPDI2DIZmr */ 0x1567, /* VMOVPDI2DIZrr */ /* Table4903 */ 0x146c, /* VMOVDQA32Z128mr */ 0x1472, /* VMOVDQA32Z128rr_alt */ /* Table4905 */ 0x1de4, /* VPMULLWZ128rm */ 0x1de7, /* VPMULLWZ128rr */ /* Table4907 */ 0x1c66, /* VPMINUBZ128rm */ 0x1c69, /* VPMINUBZ128rr */ /* Table4909 */ 0x171d, /* VPANDDZ128rm */ 0x1723, /* VPANDDZ128rr */ /* Table4911 */ 0x1b9a, /* VPMAXUBZ128rm */ 0x1b9d, /* VPMAXUBZ128rr */ /* Table4913 */ 0x1738, /* VPANDNDZ128rm */ 0x173e, /* VPANDNDZ128rr */ /* Table4915 */ 0x1558, /* VMOVNTDQZ128mr */ 0x0, /* */ /* Table4917 */ 0x1c50, /* VPMINSWZ128rm */ 0x1c53, /* VPMINSWZ128rr */ /* Table4919 */ 0x1e05, /* VPORDZ128rm */ 0x1e0b, /* VPORDZ128rr */ /* Table4921 */ 0x1b84, /* VPMAXSWZ128rm */ 0x1b87, /* VPMAXSWZ128rr */ /* Table4923 */ 0x1ff6, /* VPXORDZ128rm */ 0x1ffc, /* VPXORDZ128rr */ /* Table4925 */ 0x1f4a, /* VPSUBBZ128rm */ 0x1f4d, /* VPSUBBZ128rr */ /* Table4927 */ 0x1fae, /* VPSUBWZ128rm */ 0x1fb1, /* VPSUBWZ128rr */ /* Table4929 */ 0x1f60, /* VPSUBDZ128rm */ 0x1f66, /* VPSUBDZ128rr */ /* Table4931 */ 0x16a1, /* VPADDBZ128rm */ 0x16a4, /* VPADDBZ128rr */ /* Table4933 */ 0x1705, /* VPADDWZ128rm */ 0x1708, /* VPADDWZ128rr */ /* Table4935 */ 0x16b7, /* VPADDDZ128rm */ 0x16bd, /* VPADDDZ128rr */ /* Table4937 */ 0xd63, /* VCVTSI642SSZrm */ 0xd64, /* VCVTSI642SSZrr */ /* Table4939 */ 0xd91, /* VCVTTSS2SI64Zrm */ 0xd92, /* VCVTTSS2SI64Zrr */ /* Table4941 */ 0xd69, /* VCVTSS2SI64Zrm */ 0xd6a, /* VCVTSS2SI64Zrr */ /* Table4943 */ 0x14fa, /* VMOVDQU64Z128rm */ 0x14fd, /* VMOVDQU64Z128rr */ /* Table4945 */ 0xd99, /* VCVTTSS2USI64Zrm */ 0xd9a, /* VCVTTSS2USI64Zrr */ /* Table4947 */ 0xd71, /* VCVTSS2USI64Zrm */ 0xd72, /* VCVTSS2USI64Zrr */ /* Table4949 */ 0xda8, /* VCVTUSI642SSZrm */ 0xda9, /* VCVTUSI642SSZrr */ /* Table4951 */ 0x15ec, /* VMOVZPQILo2PQIZrm */ 0x15ed, /* VMOVZPQILo2PQIZrr */ /* Table4953 */ 0x14f8, /* VMOVDQU64Z128mr */ 0x14fe, /* VMOVDQU64Z128rr_alt */ /* Table4955 */ 0x1574, /* VMOVSDZrm */ 0x1575, /* VMOVSDZrr */ /* Table4957 */ 0x1572, /* VMOVSDZmr */ 0x1576, /* VMOVSDZrr_REV */ /* Table4959 */ 0xd61, /* VCVTSI642SDZrm */ 0xd62, /* VCVTSI642SDZrr */ /* Table4961 */ 0xd85, /* VCVTTSD2SI64Zrm */ 0xd86, /* VCVTTSD2SI64Zrr */ /* Table4963 */ 0xd45, /* VCVTSD2SI64Zrm */ 0xd46, /* VCVTSD2SI64Zrr */ /* Table4965 */ 0x2188, /* VSQRTSDZm */ 0x218a, /* VSQRTSDZr */ /* Table4967 */ 0xc12, /* VADDSDZrm_Int */ 0xc16, /* VADDSDZrr_Int */ /* Table4969 */ 0x1646, /* VMULSDZrm_Int */ 0x164a, /* VMULSDZrr_Int */ /* Table4971 */ 0xd4d, /* VCVTSD2SSZrm */ 0xd4e, /* VCVTSD2SSZrr */ /* Table4973 */ 0x21dc, /* VSUBSDZrm_Int */ 0x21e0, /* VSUBSDZrr_Int */ /* Table4975 */ 0x13e5, /* VMINSDZrm_Int */ 0x13e9, /* VMINSDZrr_Int */ /* Table4977 */ 0xdef, /* VDIVSDZrm_Int */ 0xdf3, /* VDIVSDZrr_Int */ /* Table4979 */ 0x137a, /* VMAXSDZrm_Int */ 0x137e, /* VMAXSDZrr_Int */ /* Table4981 */ 0x14b8, /* VMOVDQU16Z128rm */ 0x14bb, /* VMOVDQU16Z128rr */ /* Table4983 */ 0xd8d, /* VCVTTSD2USI64Zrm */ 0xd8e, /* VCVTTSD2USI64Zrr */ /* Table4985 */ 0xd51, /* VCVTSD2USI64Zrm */ 0xd52, /* VCVTSD2USI64Zrr */ /* Table4987 */ 0xda6, /* VCVTUSI642SDZrm */ 0xda7, /* VCVTUSI642SDZrr */ /* Table4989 */ 0x14b6, /* VMOVDQU16Z128mr */ 0x14bc, /* VMOVDQU16Z128rr_alt */ /* Table4991 */ 0xce1, /* VCMPSDZrm */ 0xce3, /* VCMPSDZrr */ /* Table4993 */ 0x15a0, /* VMOVUPDZ128rm */ 0x15a3, /* VMOVUPDZ128rr */ /* Table4995 */ 0x159e, /* VMOVUPDZ128mr */ 0x15a4, /* VMOVUPDZ128rr_alt */ /* Table4997 */ 0x1412, /* VMOVAPDZ128rm */ 0x1415, /* VMOVAPDZ128rr */ /* Table4999 */ 0x1410, /* VMOVAPDZ128mr */ 0x1416, /* VMOVAPDZ128rr_alt */ /* Table5001 */ 0x155d, /* VMOVNTPDZ128mr */ 0x0, /* */ /* Table5003 */ 0x2201, /* VUCOMISDZrm */ 0x2202, /* VUCOMISDZrr */ /* Table5005 */ 0xcf1, /* VCOMISDZrm */ 0xcf2, /* VCOMISDZrr */ /* Table5007 */ 0x214c, /* VSQRTPDZ128m */ 0x2152, /* VSQRTPDZ128r */ /* Table5009 */ 0xbcf, /* VADDPDZ128rm */ 0xbd5, /* VADDPDZ128rr */ /* Table5011 */ 0x1603, /* VMULPDZ128rm */ 0x1609, /* VMULPDZ128rr */ /* Table5013 */ 0x2199, /* VSUBPDZ128rm */ 0x219f, /* VSUBPDZ128rr */ /* Table5015 */ 0x13a8, /* VMINPDZ128rm */ 0x13ae, /* VMINPDZ128rr */ /* Table5017 */ 0xdac, /* VDIVPDZ128rm */ 0xdb2, /* VDIVPDZ128rr */ /* Table5019 */ 0x133d, /* VMAXPDZ128rm */ 0x1343, /* VMAXPDZ128rr */ /* Table5021 */ 0x1570, /* VMOVQI2PQIZrm */ 0x1406, /* VMOV64toPQIZrr */ /* Table5023 */ 0x148f, /* VMOVDQA64Z128rm */ 0x1492, /* VMOVDQA64Z128rr */ /* Table5025 */ 0x157c, /* VMOVSDto64Zmr */ 0x156d, /* VMOVPQIto64Zrr */ /* Table5027 */ 0x148d, /* VMOVDQA64Z128mr */ 0x1493, /* VMOVDQA64Z128rr_alt */ /* Table5029 */ 0x16d6, /* VPADDQZ128rm */ 0x16dc, /* VPADDQZ128rr */ /* Table5031 */ 0x156c, /* VMOVPQIto64Zmr */ 0x0, /* */ /* Table5033 */ 0x1772, /* VPANDQZ128rm */ 0x1778, /* VPANDQZ128rr */ /* Table5035 */ 0x1753, /* VPANDNQZ128rm */ 0x1759, /* VPANDNQZ128rr */ /* Table5037 */ 0x1e20, /* VPORQZ128rm */ 0x1e26, /* VPORQZ128rr */ /* Table5039 */ 0x2011, /* VPXORQZ128rm */ 0x2017, /* VPXORQZ128rr */ /* Table5041 */ 0x1f7f, /* VPSUBQZ128rm */ 0x1f85, /* VPSUBQZ128rr */ /* Table5043 */ 0x15d4, /* VMOVUPSZ256rm */ 0x15d7, /* VMOVUPSZ256rr */ /* Table5045 */ 0x15d2, /* VMOVUPSZ256mr */ 0x15d8, /* VMOVUPSZ256rr_alt */ /* Table5047 */ 0x1446, /* VMOVAPSZ256rm */ 0x1449, /* VMOVAPSZ256rr */ /* Table5049 */ 0x1444, /* VMOVAPSZ256mr */ 0x144a, /* VMOVAPSZ256rr_alt */ /* Table5051 */ 0x1563, /* VMOVNTPSZ256mr */ 0x0, /* */ /* Table5053 */ 0x2174, /* VSQRTPSZ256m */ 0x217a, /* VSQRTPSZ256r */ /* Table5055 */ 0xbfa, /* VADDPSZ256rm */ 0xc00, /* VADDPSZ256rr */ /* Table5057 */ 0x162e, /* VMULPSZ256rm */ 0x1634, /* VMULPSZ256rr */ /* Table5059 */ 0x21c4, /* VSUBPSZ256rm */ 0x21ca, /* VSUBPSZ256rr */ /* Table5061 */ 0x13d0, /* VMINPSZ256rm */ 0x13d6, /* VMINPSZ256rr */ /* Table5063 */ 0xdd7, /* VDIVPSZ256rm */ 0xddd, /* VDIVPSZ256rr */ /* Table5065 */ 0x1365, /* VMAXPSZ256rm */ 0x136b, /* VMAXPSZ256rr */ /* Table5067 */ 0x14e4, /* VMOVDQU32Z256rm */ 0x14e7, /* VMOVDQU32Z256rr */ /* Table5069 */ 0x14e2, /* VMOVDQU32Z256mr */ 0x14e8, /* VMOVDQU32Z256rr_alt */ /* Table5071 */ 0x1526, /* VMOVDQU8Z256rm */ 0x1529, /* VMOVDQU8Z256rr */ /* Table5073 */ 0x1524, /* VMOVDQU8Z256mr */ 0x152a, /* VMOVDQU8Z256rr_alt */ /* Table5075 */ 0x18d9, /* VPCMPGTBZ256rm */ 0x18db, /* VPCMPGTBZ256rr */ /* Table5077 */ 0x1915, /* VPCMPGTWZ256rm */ 0x1917, /* VPCMPGTWZ256rr */ /* Table5079 */ 0x18eb, /* VPCMPGTDZ256rm */ 0x18ef, /* VPCMPGTDZ256rr */ /* Table5081 */ 0x1479, /* VMOVDQA32Z256rm */ 0x147c, /* VMOVDQA32Z256rr */ /* Table5083 */ 0x1885, /* VPCMPEQBZ256rm */ 0x1887, /* VPCMPEQBZ256rr */ /* Table5085 */ 0x18c1, /* VPCMPEQWZ256rm */ 0x18c3, /* VPCMPEQWZ256rr */ /* Table5087 */ 0x1897, /* VPCMPEQDZ256rm */ 0x189b, /* VPCMPEQDZ256rr */ /* Table5089 */ 0x1477, /* VMOVDQA32Z256mr */ 0x147d, /* VMOVDQA32Z256rr_alt */ /* Table5091 */ 0x1dea, /* VPMULLWZ256rm */ 0x1ded, /* VPMULLWZ256rr */ /* Table5093 */ 0x1c6c, /* VPMINUBZ256rm */ 0x1c6f, /* VPMINUBZ256rr */ /* Table5095 */ 0x1726, /* VPANDDZ256rm */ 0x172c, /* VPANDDZ256rr */ /* Table5097 */ 0x1ba0, /* VPMAXUBZ256rm */ 0x1ba3, /* VPMAXUBZ256rr */ /* Table5099 */ 0x1741, /* VPANDNDZ256rm */ 0x1747, /* VPANDNDZ256rr */ /* Table5101 */ 0x1559, /* VMOVNTDQZ256mr */ 0x0, /* */ /* Table5103 */ 0x1c56, /* VPMINSWZ256rm */ 0x1c59, /* VPMINSWZ256rr */ /* Table5105 */ 0x1e0e, /* VPORDZ256rm */ 0x1e14, /* VPORDZ256rr */ /* Table5107 */ 0x1b8a, /* VPMAXSWZ256rm */ 0x1b8d, /* VPMAXSWZ256rr */ /* Table5109 */ 0x1fff, /* VPXORDZ256rm */ 0x2005, /* VPXORDZ256rr */ /* Table5111 */ 0x1f50, /* VPSUBBZ256rm */ 0x1f53, /* VPSUBBZ256rr */ /* Table5113 */ 0x1fb4, /* VPSUBWZ256rm */ 0x1fb7, /* VPSUBWZ256rr */ /* Table5115 */ 0x1f69, /* VPSUBDZ256rm */ 0x1f6f, /* VPSUBDZ256rr */ /* Table5117 */ 0x16a7, /* VPADDBZ256rm */ 0x16aa, /* VPADDBZ256rr */ /* Table5119 */ 0x170b, /* VPADDWZ256rm */ 0x170e, /* VPADDWZ256rr */ /* Table5121 */ 0x16c0, /* VPADDDZ256rm */ 0x16c6, /* VPADDDZ256rr */ /* Table5123 */ 0x1505, /* VMOVDQU64Z256rm */ 0x1508, /* VMOVDQU64Z256rr */ /* Table5125 */ 0x1503, /* VMOVDQU64Z256mr */ 0x1509, /* VMOVDQU64Z256rr_alt */ /* Table5127 */ 0x14c3, /* VMOVDQU16Z256rm */ 0x14c6, /* VMOVDQU16Z256rr */ /* Table5129 */ 0x14c1, /* VMOVDQU16Z256mr */ 0x14c7, /* VMOVDQU16Z256rr_alt */ /* Table5131 */ 0x15ab, /* VMOVUPDZ256rm */ 0x15ae, /* VMOVUPDZ256rr */ /* Table5133 */ 0x15a9, /* VMOVUPDZ256mr */ 0x15af, /* VMOVUPDZ256rr_alt */ /* Table5135 */ 0x141d, /* VMOVAPDZ256rm */ 0x1420, /* VMOVAPDZ256rr */ /* Table5137 */ 0x141b, /* VMOVAPDZ256mr */ 0x1421, /* VMOVAPDZ256rr_alt */ /* Table5139 */ 0x155e, /* VMOVNTPDZ256mr */ 0x0, /* */ /* Table5141 */ 0x2155, /* VSQRTPDZ256m */ 0x215b, /* VSQRTPDZ256r */ /* Table5143 */ 0xbd8, /* VADDPDZ256rm */ 0xbde, /* VADDPDZ256rr */ /* Table5145 */ 0x160c, /* VMULPDZ256rm */ 0x1612, /* VMULPDZ256rr */ /* Table5147 */ 0x21a2, /* VSUBPDZ256rm */ 0x21a8, /* VSUBPDZ256rr */ /* Table5149 */ 0x13b1, /* VMINPDZ256rm */ 0x13b7, /* VMINPDZ256rr */ /* Table5151 */ 0xdb5, /* VDIVPDZ256rm */ 0xdbb, /* VDIVPDZ256rr */ /* Table5153 */ 0x1346, /* VMAXPDZ256rm */ 0x134c, /* VMAXPDZ256rr */ /* Table5155 */ 0x149a, /* VMOVDQA64Z256rm */ 0x149d, /* VMOVDQA64Z256rr */ /* Table5157 */ 0x1498, /* VMOVDQA64Z256mr */ 0x149e, /* VMOVDQA64Z256rr_alt */ /* Table5159 */ 0x16df, /* VPADDQZ256rm */ 0x16e5, /* VPADDQZ256rr */ /* Table5161 */ 0x177b, /* VPANDQZ256rm */ 0x1781, /* VPANDQZ256rr */ /* Table5163 */ 0x175c, /* VPANDNQZ256rm */ 0x1762, /* VPANDNQZ256rr */ /* Table5165 */ 0x1e29, /* VPORQZ256rm */ 0x1e2f, /* VPORQZ256rr */ /* Table5167 */ 0x201a, /* VPXORQZ256rm */ 0x2020, /* VPXORQZ256rr */ /* Table5169 */ 0x1f88, /* VPSUBQZ256rm */ 0x1f8e, /* VPSUBQZ256rr */ /* Table5171 */ 0x15df, /* VMOVUPSZrm */ 0x15e2, /* VMOVUPSZrr */ /* Table5173 */ 0x15dd, /* VMOVUPSZmr */ 0x15e3, /* VMOVUPSZrr_alt */ /* Table5175 */ 0x221d, /* VUNPCKLPSZrm */ 0x221e, /* VUNPCKLPSZrr */ /* Table5177 */ 0x2211, /* VUNPCKHPSZrm */ 0x2212, /* VUNPCKHPSZrr */ /* Table5179 */ 0x1451, /* VMOVAPSZrm */ 0x1454, /* VMOVAPSZrr */ /* Table5181 */ 0x144f, /* VMOVAPSZmr */ 0x1455, /* VMOVAPSZrr_alt */ /* Table5183 */ 0x1564, /* VMOVNTPSZmr */ 0x0, /* */ /* Table5185 */ 0x217d, /* VSQRTPSZm */ 0x2183, /* VSQRTPSZr */ /* Table5187 */ 0xc06, /* VADDPSZrm */ 0xc0c, /* VADDPSZrr */ /* Table5189 */ 0x163a, /* VMULPSZrm */ 0x1640, /* VMULPSZrr */ /* Table5191 */ 0xd38, /* VCVTPS2PDZrm */ 0xd39, /* VCVTPS2PDZrr */ /* Table5193 */ 0xd13, /* VCVTDQ2PSZrm */ 0xd14, /* VCVTDQ2PSZrr */ /* Table5195 */ 0x21d0, /* VSUBPSZrm */ 0x21d6, /* VSUBPSZrr */ /* Table5197 */ 0x13d9, /* VMINPSZrm */ 0x13df, /* VMINPSZrr */ /* Table5199 */ 0xde3, /* VDIVPSZrm */ 0xde9, /* VDIVPSZrr */ /* Table5201 */ 0x136e, /* VMAXPSZrm */ 0x1374, /* VMAXPSZrr */ /* Table5203 */ 0xd83, /* VCVTTPS2UDQZrm */ 0xd84, /* VCVTTPS2UDQZrr */ /* Table5205 */ 0xd42, /* VCVTPS2UDQZrm */ 0xd43, /* VCVTPS2UDQZrr */ /* Table5207 */ 0xcd7, /* VCMPPSZrmi */ 0xcd9, /* VCMPPSZrri */ /* Table5209 */ 0x2146, /* VSHUFPSZrmi */ 0x2147, /* VSHUFPSZrri */ /* Table5211 */ 0x1588, /* VMOVSLDUPZrm */ 0x1589, /* VMOVSLDUPZrr */ /* Table5213 */ 0x1582, /* VMOVSHDUPZrm */ 0x1583, /* VMOVSHDUPZrr */ /* Table5215 */ 0xd7f, /* VCVTTPS2DQZrm */ 0xd80, /* VCVTTPS2DQZrr */ /* Table5217 */ 0x14ef, /* VMOVDQU32Zrm */ 0x14f2, /* VMOVDQU32Zrr */ /* Table5219 */ 0xd9d, /* VCVTUDQ2PDZrm */ 0xd9e, /* VCVTUDQ2PDZrr */ /* Table5221 */ 0x14ed, /* VMOVDQU32Zmr */ 0x14f3, /* VMOVDQU32Zrr_alt */ /* Table5223 */ 0xd0d, /* VCVTDQ2PDZrm */ 0xd0e, /* VCVTDQ2PDZrr */ /* Table5225 */ 0x1531, /* VMOVDQU8Zrm */ 0x1534, /* VMOVDQU8Zrr */ /* Table5227 */ 0xd9f, /* VCVTUDQ2PSZrm */ 0xda0, /* VCVTUDQ2PSZrr */ /* Table5229 */ 0x152f, /* VMOVDQU8Zmr */ 0x1535, /* VMOVDQU8Zrr_alt */ /* Table5231 */ 0xd31, /* VCVTPS2DQZrm */ 0xd32, /* VCVTPS2DQZrr */ /* Table5233 */ 0x1fe8, /* VPUNPCKLDQZrm */ 0x1fe9, /* VPUNPCKLDQZrr */ /* Table5235 */ 0x18dd, /* VPCMPGTBZrm */ 0x18df, /* VPCMPGTBZrr */ /* Table5237 */ 0x1919, /* VPCMPGTWZrm */ 0x191b, /* VPCMPGTWZrr */ /* Table5239 */ 0x18f1, /* VPCMPGTDZrm */ 0x18f5, /* VPCMPGTDZrr */ /* Table5241 */ 0x1fd4, /* VPUNPCKHDQZrm */ 0x1fd5, /* VPUNPCKHDQZrr */ /* Table5243 */ 0x1484, /* VMOVDQA32Zrm */ 0x1487, /* VMOVDQA32Zrr */ /* Table5245 */ 0x1e7c, /* VPSHUFDZmi */ 0x1e7d, /* VPSHUFDZri */ /* Table5247 */ 0x0, /* */ 0x0, /* */ 0x1f0d, /* VPSRLDZmi */ 0x0, /* */ 0x1ed7, /* VPSRADZmi */ 0x0, /* */ 0x1e99, /* VPSLLDZmi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f10, /* VPSRLDZri */ 0x0, /* */ 0x1eda, /* VPSRADZri */ 0x0, /* */ 0x1e9c, /* VPSLLDZri */ 0x0, /* */ /* Table5263 */ 0x1889, /* VPCMPEQBZrm */ 0x188b, /* VPCMPEQBZrr */ /* Table5265 */ 0x18c5, /* VPCMPEQWZrm */ 0x18c7, /* VPCMPEQWZrr */ /* Table5267 */ 0x189d, /* VPCMPEQDZrm */ 0x18a1, /* VPCMPEQDZrr */ /* Table5269 */ 0x1482, /* VMOVDQA32Zmr */ 0x1488, /* VMOVDQA32Zrr_alt */ /* Table5271 */ 0x1f13, /* VPSRLDZrm */ 0x1f16, /* VPSRLDZrr */ /* Table5273 */ 0x1df0, /* VPMULLWZrm */ 0x1df3, /* VPMULLWZrr */ /* Table5275 */ 0x1c72, /* VPMINUBZrm */ 0x1c75, /* VPMINUBZrr */ /* Table5277 */ 0x172f, /* VPANDDZrm */ 0x1735, /* VPANDDZrr */ /* Table5279 */ 0x1ba6, /* VPMAXUBZrm */ 0x1ba9, /* VPMAXUBZrr */ /* Table5281 */ 0x174a, /* VPANDNDZrm */ 0x1750, /* VPANDNDZrr */ /* Table5283 */ 0x1edd, /* VPSRADZrm */ 0x1ee0, /* VPSRADZrr */ /* Table5285 */ 0x155a, /* VMOVNTDQZmr */ 0x0, /* */ /* Table5287 */ 0x1c5c, /* VPMINSWZrm */ 0x1c5f, /* VPMINSWZrr */ /* Table5289 */ 0x1e17, /* VPORDZrm */ 0x1e1d, /* VPORDZrr */ /* Table5291 */ 0x1b90, /* VPMAXSWZrm */ 0x1b93, /* VPMAXSWZrr */ /* Table5293 */ 0x2008, /* VPXORDZrm */ 0x200e, /* VPXORDZrr */ /* Table5295 */ 0x1e9f, /* VPSLLDZrm */ 0x1ea2, /* VPSLLDZrr */ /* Table5297 */ 0x1f56, /* VPSUBBZrm */ 0x1f59, /* VPSUBBZrr */ /* Table5299 */ 0x1fba, /* VPSUBWZrm */ 0x1fbd, /* VPSUBWZrr */ /* Table5301 */ 0x1f72, /* VPSUBDZrm */ 0x1f78, /* VPSUBDZrr */ /* Table5303 */ 0x16ad, /* VPADDBZrm */ 0x16b0, /* VPADDBZrr */ /* Table5305 */ 0x1711, /* VPADDWZrm */ 0x1714, /* VPADDWZrr */ /* Table5307 */ 0x16c9, /* VPADDDZrm */ 0x16cf, /* VPADDDZrr */ /* Table5309 */ 0xd7b, /* VCVTTPD2UDQZrm */ 0xd7c, /* VCVTTPD2UDQZrr */ /* Table5311 */ 0xd26, /* VCVTPD2UDQZrm */ 0xd27, /* VCVTPD2UDQZrr */ /* Table5313 */ 0x1510, /* VMOVDQU64Zrm */ 0x1513, /* VMOVDQU64Zrr */ /* Table5315 */ 0x150e, /* VMOVDQU64Zmr */ 0x1514, /* VMOVDQU64Zrr_alt */ /* Table5317 */ 0x14ce, /* VMOVDQU16Zrm */ 0x14d1, /* VMOVDQU16Zrr */ /* Table5319 */ 0x14cc, /* VMOVDQU16Zmr */ 0x14d2, /* VMOVDQU16Zrr_alt */ /* Table5321 */ 0xd1b, /* VCVTPD2DQZrm */ 0xd1c, /* VCVTPD2DQZrr */ /* Table5323 */ 0x15b6, /* VMOVUPDZrm */ 0x15b9, /* VMOVUPDZrr */ /* Table5325 */ 0x15b4, /* VMOVUPDZmr */ 0x15ba, /* VMOVUPDZrr_alt */ /* Table5327 */ 0x1460, /* VMOVDDUPZrm */ 0x1461, /* VMOVDDUPZrr */ /* Table5329 */ 0x2217, /* VUNPCKLPDZrm */ 0x2218, /* VUNPCKLPDZrr */ /* Table5331 */ 0x220b, /* VUNPCKHPDZrm */ 0x220c, /* VUNPCKHPDZrr */ /* Table5333 */ 0x1428, /* VMOVAPDZrm */ 0x142b, /* VMOVAPDZrr */ /* Table5335 */ 0x1426, /* VMOVAPDZmr */ 0x142c, /* VMOVAPDZrr_alt */ /* Table5337 */ 0x155f, /* VMOVNTPDZmr */ 0x0, /* */ /* Table5339 */ 0x215e, /* VSQRTPDZm */ 0x2164, /* VSQRTPDZr */ /* Table5341 */ 0xbe4, /* VADDPDZrm */ 0xbea, /* VADDPDZrr */ /* Table5343 */ 0x1618, /* VMULPDZrm */ 0x161e, /* VMULPDZrr */ /* Table5345 */ 0xd22, /* VCVTPD2PSZrm */ 0xd23, /* VCVTPD2PSZrr */ /* Table5347 */ 0x21ae, /* VSUBPDZrm */ 0x21b4, /* VSUBPDZrr */ /* Table5349 */ 0x13ba, /* VMINPDZrm */ 0x13c0, /* VMINPDZrr */ /* Table5351 */ 0xdc1, /* VDIVPDZrm */ 0xdc7, /* VDIVPDZrr */ /* Table5353 */ 0x134f, /* VMAXPDZrm */ 0x1355, /* VMAXPDZrr */ /* Table5355 */ 0x1fee, /* VPUNPCKLQDQZrm */ 0x1fef, /* VPUNPCKLQDQZrr */ /* Table5357 */ 0x1fda, /* VPUNPCKHQDQZrm */ 0x1fdb, /* VPUNPCKHQDQZrr */ /* Table5359 */ 0x14a5, /* VMOVDQA64Zrm */ 0x14a8, /* VMOVDQA64Zrr */ /* Table5361 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1ee6, /* VPSRAQZmi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1ee9, /* VPSRAQZri */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table5377 */ 0x0, /* */ 0x0, /* */ 0x1f1f, /* VPSRLQZmi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eab, /* VPSLLQZmi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f22, /* VPSRLQZri */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eae, /* VPSLLQZri */ 0x0, /* */ /* Table5393 */ 0x14a3, /* VMOVDQA64Zmr */ 0x14a9, /* VMOVDQA64Zrr_alt */ /* Table5395 */ 0xcc9, /* VCMPPDZrmi */ 0xccb, /* VCMPPDZrri */ /* Table5397 */ 0x2140, /* VSHUFPDZrmi */ 0x2141, /* VSHUFPDZrri */ /* Table5399 */ 0x1f25, /* VPSRLQZrm */ 0x1f28, /* VPSRLQZrr */ /* Table5401 */ 0x16e8, /* VPADDQZrm */ 0x16ee, /* VPADDQZrr */ /* Table5403 */ 0x1784, /* VPANDQZrm */ 0x178a, /* VPANDQZrr */ /* Table5405 */ 0x1765, /* VPANDNQZrm */ 0x176b, /* VPANDNQZrr */ /* Table5407 */ 0x1eec, /* VPSRAQZrm */ 0x1eef, /* VPSRAQZrr */ /* Table5409 */ 0xd78, /* VCVTTPD2DQZrm */ 0xd79, /* VCVTTPD2DQZrr */ /* Table5411 */ 0x1e32, /* VPORQZrm */ 0x1e38, /* VPORQZrr */ /* Table5413 */ 0x2023, /* VPXORQZrm */ 0x2029, /* VPXORQZrr */ /* Table5415 */ 0x1eb1, /* VPSLLQZrm */ 0x1eb4, /* VPSLLQZrr */ /* Table5417 */ 0x1dfa, /* VPMULUDQZrm */ 0x1e00, /* VPMULUDQZrr */ /* Table5419 */ 0x1f91, /* VPSUBQZrm */ 0x1f97, /* VPSUBQZrr */ /* Table5421 */ 0x15ca, /* VMOVUPSZ128rmk */ 0x15ce, /* VMOVUPSZ128rrk */ /* Table5423 */ 0x15c8, /* VMOVUPSZ128mrk */ 0x15cf, /* VMOVUPSZ128rrk_alt */ /* Table5425 */ 0x143c, /* VMOVAPSZ128rmk */ 0x1440, /* VMOVAPSZ128rrk */ /* Table5427 */ 0x143a, /* VMOVAPSZ128mrk */ 0x1441, /* VMOVAPSZ128rrk_alt */ /* Table5429 */ 0x216f, /* VSQRTPSZ128mk */ 0x2172, /* VSQRTPSZ128rk */ /* Table5431 */ 0xbf5, /* VADDPSZ128rmk */ 0xbf8, /* VADDPSZ128rrk */ /* Table5433 */ 0x1629, /* VMULPSZ128rmk */ 0x162c, /* VMULPSZ128rrk */ /* Table5435 */ 0x21bf, /* VSUBPSZ128rmk */ 0x21c2, /* VSUBPSZ128rrk */ /* Table5437 */ 0x13cb, /* VMINPSZ128rmk */ 0x13ce, /* VMINPSZ128rrk */ /* Table5439 */ 0xdd2, /* VDIVPSZ128rmk */ 0xdd5, /* VDIVPSZ128rrk */ /* Table5441 */ 0x1360, /* VMAXPSZ128rmk */ 0x1363, /* VMAXPSZ128rrk */ /* Table5443 */ 0x0, /* */ 0x1595, /* VMOVSSZrrk */ /* Table5445 */ 0x1591, /* VMOVSSZmrk */ 0x0, /* */ /* Table5447 */ 0xc22, /* VADDSSZrm_Intk */ 0xc26, /* VADDSSZrr_Intk */ /* Table5449 */ 0x1656, /* VMULSSZrm_Intk */ 0x165a, /* VMULSSZrr_Intk */ /* Table5451 */ 0x21ec, /* VSUBSSZrm_Intk */ 0x21f0, /* VSUBSSZrr_Intk */ /* Table5453 */ 0x13f5, /* VMINSSZrm_Intk */ 0x13f9, /* VMINSSZrr_Intk */ /* Table5455 */ 0xdff, /* VDIVSSZrm_Intk */ 0xe03, /* VDIVSSZrr_Intk */ /* Table5457 */ 0x138a, /* VMAXSSZrm_Intk */ 0x138e, /* VMAXSSZrr_Intk */ /* Table5459 */ 0x14da, /* VMOVDQU32Z128rmk */ 0x14de, /* VMOVDQU32Z128rrk */ /* Table5461 */ 0x14d8, /* VMOVDQU32Z128mrk */ 0x14df, /* VMOVDQU32Z128rrk_alt */ /* Table5463 */ 0x151c, /* VMOVDQU8Z128rmk */ 0x1520, /* VMOVDQU8Z128rrk */ /* Table5465 */ 0x151a, /* VMOVDQU8Z128mrk */ 0x1521, /* VMOVDQU8Z128rrk_alt */ /* Table5467 */ 0x18d6, /* VPCMPGTBZ128rmk */ 0x18d8, /* VPCMPGTBZ128rrk */ /* Table5469 */ 0x1912, /* VPCMPGTWZ128rmk */ 0x1914, /* VPCMPGTWZ128rrk */ /* Table5471 */ 0x18e8, /* VPCMPGTDZ128rmk */ 0x18ea, /* VPCMPGTDZ128rrk */ /* Table5473 */ 0x146f, /* VMOVDQA32Z128rmk */ 0x1473, /* VMOVDQA32Z128rrk */ /* Table5475 */ 0x1882, /* VPCMPEQBZ128rmk */ 0x1884, /* VPCMPEQBZ128rrk */ /* Table5477 */ 0x18be, /* VPCMPEQWZ128rmk */ 0x18c0, /* VPCMPEQWZ128rrk */ /* Table5479 */ 0x1894, /* VPCMPEQDZ128rmk */ 0x1896, /* VPCMPEQDZ128rrk */ /* Table5481 */ 0x146d, /* VMOVDQA32Z128mrk */ 0x1474, /* VMOVDQA32Z128rrk_alt */ /* Table5483 */ 0x1de5, /* VPMULLWZ128rmk */ 0x1de8, /* VPMULLWZ128rrk */ /* Table5485 */ 0x1c67, /* VPMINUBZ128rmk */ 0x1c6a, /* VPMINUBZ128rrk */ /* Table5487 */ 0x1721, /* VPANDDZ128rmk */ 0x1724, /* VPANDDZ128rrk */ /* Table5489 */ 0x1b9b, /* VPMAXUBZ128rmk */ 0x1b9e, /* VPMAXUBZ128rrk */ /* Table5491 */ 0x173c, /* VPANDNDZ128rmk */ 0x173f, /* VPANDNDZ128rrk */ /* Table5493 */ 0x1c51, /* VPMINSWZ128rmk */ 0x1c54, /* VPMINSWZ128rrk */ /* Table5495 */ 0x1e09, /* VPORDZ128rmk */ 0x1e0c, /* VPORDZ128rrk */ /* Table5497 */ 0x1b85, /* VPMAXSWZ128rmk */ 0x1b88, /* VPMAXSWZ128rrk */ /* Table5499 */ 0x1ffa, /* VPXORDZ128rmk */ 0x1ffd, /* VPXORDZ128rrk */ /* Table5501 */ 0x1f4b, /* VPSUBBZ128rmk */ 0x1f4e, /* VPSUBBZ128rrk */ /* Table5503 */ 0x1faf, /* VPSUBWZ128rmk */ 0x1fb2, /* VPSUBWZ128rrk */ /* Table5505 */ 0x1f64, /* VPSUBDZ128rmk */ 0x1f67, /* VPSUBDZ128rrk */ /* Table5507 */ 0x16a2, /* VPADDBZ128rmk */ 0x16a5, /* VPADDBZ128rrk */ /* Table5509 */ 0x1706, /* VPADDWZ128rmk */ 0x1709, /* VPADDWZ128rrk */ /* Table5511 */ 0x16bb, /* VPADDDZ128rmk */ 0x16be, /* VPADDDZ128rrk */ /* Table5513 */ 0xc22, /* VADDSSZrm_Intk */ 0xc2a, /* VADDSSZrrbkz */ /* Table5515 */ 0x1656, /* VMULSSZrm_Intk */ 0x165e, /* VMULSSZrrbkz */ /* Table5517 */ 0x21ec, /* VSUBSSZrm_Intk */ 0x21f4, /* VSUBSSZrrbkz */ /* Table5519 */ 0x13f5, /* VMINSSZrm_Intk */ 0x13fd, /* VMINSSZrrbkz */ /* Table5521 */ 0xdff, /* VDIVSSZrm_Intk */ 0xe07, /* VDIVSSZrrbkz */ /* Table5523 */ 0x138a, /* VMAXSSZrm_Intk */ 0x1392, /* VMAXSSZrrbkz */ /* Table5525 */ 0x14fb, /* VMOVDQU64Z128rmk */ 0x14ff, /* VMOVDQU64Z128rrk */ /* Table5527 */ 0x14f9, /* VMOVDQU64Z128mrk */ 0x1500, /* VMOVDQU64Z128rrk_alt */ /* Table5529 */ 0x0, /* */ 0x1577, /* VMOVSDZrrk */ /* Table5531 */ 0x1573, /* VMOVSDZmrk */ 0x0, /* */ /* Table5533 */ 0xc13, /* VADDSDZrm_Intk */ 0xc17, /* VADDSDZrr_Intk */ /* Table5535 */ 0x1647, /* VMULSDZrm_Intk */ 0x164b, /* VMULSDZrr_Intk */ /* Table5537 */ 0x21dd, /* VSUBSDZrm_Intk */ 0x21e1, /* VSUBSDZrr_Intk */ /* Table5539 */ 0x13e6, /* VMINSDZrm_Intk */ 0x13ea, /* VMINSDZrr_Intk */ /* Table5541 */ 0xdf0, /* VDIVSDZrm_Intk */ 0xdf4, /* VDIVSDZrr_Intk */ /* Table5543 */ 0x137b, /* VMAXSDZrm_Intk */ 0x137f, /* VMAXSDZrr_Intk */ /* Table5545 */ 0x14b9, /* VMOVDQU16Z128rmk */ 0x14bd, /* VMOVDQU16Z128rrk */ /* Table5547 */ 0x14b7, /* VMOVDQU16Z128mrk */ 0x14be, /* VMOVDQU16Z128rrk_alt */ /* Table5549 */ 0x15a1, /* VMOVUPDZ128rmk */ 0x15a5, /* VMOVUPDZ128rrk */ /* Table5551 */ 0x159f, /* VMOVUPDZ128mrk */ 0x15a6, /* VMOVUPDZ128rrk_alt */ /* Table5553 */ 0x1413, /* VMOVAPDZ128rmk */ 0x1417, /* VMOVAPDZ128rrk */ /* Table5555 */ 0x1411, /* VMOVAPDZ128mrk */ 0x1418, /* VMOVAPDZ128rrk_alt */ /* Table5557 */ 0x2150, /* VSQRTPDZ128mk */ 0x2153, /* VSQRTPDZ128rk */ /* Table5559 */ 0xbd3, /* VADDPDZ128rmk */ 0xbd6, /* VADDPDZ128rrk */ /* Table5561 */ 0x1607, /* VMULPDZ128rmk */ 0x160a, /* VMULPDZ128rrk */ /* Table5563 */ 0x219d, /* VSUBPDZ128rmk */ 0x21a0, /* VSUBPDZ128rrk */ /* Table5565 */ 0x13ac, /* VMINPDZ128rmk */ 0x13af, /* VMINPDZ128rrk */ /* Table5567 */ 0xdb0, /* VDIVPDZ128rmk */ 0xdb3, /* VDIVPDZ128rrk */ /* Table5569 */ 0x1341, /* VMAXPDZ128rmk */ 0x1344, /* VMAXPDZ128rrk */ /* Table5571 */ 0x1490, /* VMOVDQA64Z128rmk */ 0x1494, /* VMOVDQA64Z128rrk */ /* Table5573 */ 0x148e, /* VMOVDQA64Z128mrk */ 0x1495, /* VMOVDQA64Z128rrk_alt */ /* Table5575 */ 0x16da, /* VPADDQZ128rmk */ 0x16dd, /* VPADDQZ128rrk */ /* Table5577 */ 0x1776, /* VPANDQZ128rmk */ 0x1779, /* VPANDQZ128rrk */ /* Table5579 */ 0x1757, /* VPANDNQZ128rmk */ 0x175a, /* VPANDNQZ128rrk */ /* Table5581 */ 0x1e24, /* VPORQZ128rmk */ 0x1e27, /* VPORQZ128rrk */ /* Table5583 */ 0x2015, /* VPXORQZ128rmk */ 0x2018, /* VPXORQZ128rrk */ /* Table5585 */ 0x1f83, /* VPSUBQZ128rmk */ 0x1f86, /* VPSUBQZ128rrk */ /* Table5587 */ 0x15d5, /* VMOVUPSZ256rmk */ 0x15d9, /* VMOVUPSZ256rrk */ /* Table5589 */ 0x15d3, /* VMOVUPSZ256mrk */ 0x15da, /* VMOVUPSZ256rrk_alt */ /* Table5591 */ 0x1447, /* VMOVAPSZ256rmk */ 0x144b, /* VMOVAPSZ256rrk */ /* Table5593 */ 0x1445, /* VMOVAPSZ256mrk */ 0x144c, /* VMOVAPSZ256rrk_alt */ /* Table5595 */ 0x2178, /* VSQRTPSZ256mk */ 0x217b, /* VSQRTPSZ256rk */ /* Table5597 */ 0xbfe, /* VADDPSZ256rmk */ 0xc01, /* VADDPSZ256rrk */ /* Table5599 */ 0x1632, /* VMULPSZ256rmk */ 0x1635, /* VMULPSZ256rrk */ /* Table5601 */ 0x21c8, /* VSUBPSZ256rmk */ 0x21cb, /* VSUBPSZ256rrk */ /* Table5603 */ 0x13d4, /* VMINPSZ256rmk */ 0x13d7, /* VMINPSZ256rrk */ /* Table5605 */ 0xddb, /* VDIVPSZ256rmk */ 0xdde, /* VDIVPSZ256rrk */ /* Table5607 */ 0x1369, /* VMAXPSZ256rmk */ 0x136c, /* VMAXPSZ256rrk */ /* Table5609 */ 0x14e5, /* VMOVDQU32Z256rmk */ 0x14e9, /* VMOVDQU32Z256rrk */ /* Table5611 */ 0x14e3, /* VMOVDQU32Z256mrk */ 0x14ea, /* VMOVDQU32Z256rrk_alt */ /* Table5613 */ 0x1527, /* VMOVDQU8Z256rmk */ 0x152b, /* VMOVDQU8Z256rrk */ /* Table5615 */ 0x1525, /* VMOVDQU8Z256mrk */ 0x152c, /* VMOVDQU8Z256rrk_alt */ /* Table5617 */ 0x18da, /* VPCMPGTBZ256rmk */ 0x18dc, /* VPCMPGTBZ256rrk */ /* Table5619 */ 0x1916, /* VPCMPGTWZ256rmk */ 0x1918, /* VPCMPGTWZ256rrk */ /* Table5621 */ 0x18ee, /* VPCMPGTDZ256rmk */ 0x18f0, /* VPCMPGTDZ256rrk */ /* Table5623 */ 0x147a, /* VMOVDQA32Z256rmk */ 0x147e, /* VMOVDQA32Z256rrk */ /* Table5625 */ 0x1886, /* VPCMPEQBZ256rmk */ 0x1888, /* VPCMPEQBZ256rrk */ /* Table5627 */ 0x18c2, /* VPCMPEQWZ256rmk */ 0x18c4, /* VPCMPEQWZ256rrk */ /* Table5629 */ 0x189a, /* VPCMPEQDZ256rmk */ 0x189c, /* VPCMPEQDZ256rrk */ /* Table5631 */ 0x1478, /* VMOVDQA32Z256mrk */ 0x147f, /* VMOVDQA32Z256rrk_alt */ /* Table5633 */ 0x1deb, /* VPMULLWZ256rmk */ 0x1dee, /* VPMULLWZ256rrk */ /* Table5635 */ 0x1c6d, /* VPMINUBZ256rmk */ 0x1c70, /* VPMINUBZ256rrk */ /* Table5637 */ 0x172a, /* VPANDDZ256rmk */ 0x172d, /* VPANDDZ256rrk */ /* Table5639 */ 0x1ba1, /* VPMAXUBZ256rmk */ 0x1ba4, /* VPMAXUBZ256rrk */ /* Table5641 */ 0x1745, /* VPANDNDZ256rmk */ 0x1748, /* VPANDNDZ256rrk */ /* Table5643 */ 0x1c57, /* VPMINSWZ256rmk */ 0x1c5a, /* VPMINSWZ256rrk */ /* Table5645 */ 0x1e12, /* VPORDZ256rmk */ 0x1e15, /* VPORDZ256rrk */ /* Table5647 */ 0x1b8b, /* VPMAXSWZ256rmk */ 0x1b8e, /* VPMAXSWZ256rrk */ /* Table5649 */ 0x2003, /* VPXORDZ256rmk */ 0x2006, /* VPXORDZ256rrk */ /* Table5651 */ 0x1f51, /* VPSUBBZ256rmk */ 0x1f54, /* VPSUBBZ256rrk */ /* Table5653 */ 0x1fb5, /* VPSUBWZ256rmk */ 0x1fb8, /* VPSUBWZ256rrk */ /* Table5655 */ 0x1f6d, /* VPSUBDZ256rmk */ 0x1f70, /* VPSUBDZ256rrk */ /* Table5657 */ 0x16a8, /* VPADDBZ256rmk */ 0x16ab, /* VPADDBZ256rrk */ /* Table5659 */ 0x170c, /* VPADDWZ256rmk */ 0x170f, /* VPADDWZ256rrk */ /* Table5661 */ 0x16c4, /* VPADDDZ256rmk */ 0x16c7, /* VPADDDZ256rrk */ /* Table5663 */ 0x1506, /* VMOVDQU64Z256rmk */ 0x150a, /* VMOVDQU64Z256rrk */ /* Table5665 */ 0x1504, /* VMOVDQU64Z256mrk */ 0x150b, /* VMOVDQU64Z256rrk_alt */ /* Table5667 */ 0x14c4, /* VMOVDQU16Z256rmk */ 0x14c8, /* VMOVDQU16Z256rrk */ /* Table5669 */ 0x14c2, /* VMOVDQU16Z256mrk */ 0x14c9, /* VMOVDQU16Z256rrk_alt */ /* Table5671 */ 0x15ac, /* VMOVUPDZ256rmk */ 0x15b0, /* VMOVUPDZ256rrk */ /* Table5673 */ 0x15aa, /* VMOVUPDZ256mrk */ 0x15b1, /* VMOVUPDZ256rrk_alt */ /* Table5675 */ 0x141e, /* VMOVAPDZ256rmk */ 0x1422, /* VMOVAPDZ256rrk */ /* Table5677 */ 0x141c, /* VMOVAPDZ256mrk */ 0x1423, /* VMOVAPDZ256rrk_alt */ /* Table5679 */ 0x2159, /* VSQRTPDZ256mk */ 0x215c, /* VSQRTPDZ256rk */ /* Table5681 */ 0xbdc, /* VADDPDZ256rmk */ 0xbdf, /* VADDPDZ256rrk */ /* Table5683 */ 0x1610, /* VMULPDZ256rmk */ 0x1613, /* VMULPDZ256rrk */ /* Table5685 */ 0x21a6, /* VSUBPDZ256rmk */ 0x21a9, /* VSUBPDZ256rrk */ /* Table5687 */ 0x13b5, /* VMINPDZ256rmk */ 0x13b8, /* VMINPDZ256rrk */ /* Table5689 */ 0xdb9, /* VDIVPDZ256rmk */ 0xdbc, /* VDIVPDZ256rrk */ /* Table5691 */ 0x134a, /* VMAXPDZ256rmk */ 0x134d, /* VMAXPDZ256rrk */ /* Table5693 */ 0x149b, /* VMOVDQA64Z256rmk */ 0x149f, /* VMOVDQA64Z256rrk */ /* Table5695 */ 0x1499, /* VMOVDQA64Z256mrk */ 0x14a0, /* VMOVDQA64Z256rrk_alt */ /* Table5697 */ 0x16e3, /* VPADDQZ256rmk */ 0x16e6, /* VPADDQZ256rrk */ /* Table5699 */ 0x177f, /* VPANDQZ256rmk */ 0x1782, /* VPANDQZ256rrk */ /* Table5701 */ 0x1760, /* VPANDNQZ256rmk */ 0x1763, /* VPANDNQZ256rrk */ /* Table5703 */ 0x1e2d, /* VPORQZ256rmk */ 0x1e30, /* VPORQZ256rrk */ /* Table5705 */ 0x201e, /* VPXORQZ256rmk */ 0x2021, /* VPXORQZ256rrk */ /* Table5707 */ 0x1f8c, /* VPSUBQZ256rmk */ 0x1f8f, /* VPSUBQZ256rrk */ /* Table5709 */ 0x15e0, /* VMOVUPSZrmk */ 0x15e4, /* VMOVUPSZrrk */ /* Table5711 */ 0x15de, /* VMOVUPSZmrk */ 0x15e5, /* VMOVUPSZrrk_alt */ /* Table5713 */ 0x1452, /* VMOVAPSZrmk */ 0x1456, /* VMOVAPSZrrk */ /* Table5715 */ 0x1450, /* VMOVAPSZmrk */ 0x1457, /* VMOVAPSZrrk_alt */ /* Table5717 */ 0x2181, /* VSQRTPSZmk */ 0x2184, /* VSQRTPSZrk */ /* Table5719 */ 0xc0a, /* VADDPSZrmk */ 0xc0d, /* VADDPSZrrk */ /* Table5721 */ 0x163e, /* VMULPSZrmk */ 0x1641, /* VMULPSZrrk */ /* Table5723 */ 0x21d4, /* VSUBPSZrmk */ 0x21d7, /* VSUBPSZrrk */ /* Table5725 */ 0x13dd, /* VMINPSZrmk */ 0x13e0, /* VMINPSZrrk */ /* Table5727 */ 0xde7, /* VDIVPSZrmk */ 0xdea, /* VDIVPSZrrk */ /* Table5729 */ 0x1372, /* VMAXPSZrmk */ 0x1375, /* VMAXPSZrrk */ /* Table5731 */ 0x14f0, /* VMOVDQU32Zrmk */ 0x14f4, /* VMOVDQU32Zrrk */ /* Table5733 */ 0x14ee, /* VMOVDQU32Zmrk */ 0x14f5, /* VMOVDQU32Zrrk_alt */ /* Table5735 */ 0x1532, /* VMOVDQU8Zrmk */ 0x1536, /* VMOVDQU8Zrrk */ /* Table5737 */ 0x1530, /* VMOVDQU8Zmrk */ 0x1537, /* VMOVDQU8Zrrk_alt */ /* Table5739 */ 0x18de, /* VPCMPGTBZrmk */ 0x18e0, /* VPCMPGTBZrrk */ /* Table5741 */ 0x191a, /* VPCMPGTWZrmk */ 0x191c, /* VPCMPGTWZrrk */ /* Table5743 */ 0x18f4, /* VPCMPGTDZrmk */ 0x18f6, /* VPCMPGTDZrrk */ /* Table5745 */ 0x1485, /* VMOVDQA32Zrmk */ 0x1489, /* VMOVDQA32Zrrk */ /* Table5747 */ 0x0, /* */ 0x0, /* */ 0x1f0e, /* VPSRLDZmik */ 0x0, /* */ 0x1ed8, /* VPSRADZmik */ 0x0, /* */ 0x1e9a, /* VPSLLDZmik */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f11, /* VPSRLDZrik */ 0x0, /* */ 0x1edb, /* VPSRADZrik */ 0x0, /* */ 0x1e9d, /* VPSLLDZrik */ 0x0, /* */ /* Table5763 */ 0x188a, /* VPCMPEQBZrmk */ 0x188c, /* VPCMPEQBZrrk */ /* Table5765 */ 0x18c6, /* VPCMPEQWZrmk */ 0x18c8, /* VPCMPEQWZrrk */ /* Table5767 */ 0x18a0, /* VPCMPEQDZrmk */ 0x18a2, /* VPCMPEQDZrrk */ /* Table5769 */ 0x1483, /* VMOVDQA32Zmrk */ 0x148a, /* VMOVDQA32Zrrk_alt */ /* Table5771 */ 0x1f14, /* VPSRLDZrmk */ 0x1f17, /* VPSRLDZrrk */ /* Table5773 */ 0x1df1, /* VPMULLWZrmk */ 0x1df4, /* VPMULLWZrrk */ /* Table5775 */ 0x1c73, /* VPMINUBZrmk */ 0x1c76, /* VPMINUBZrrk */ /* Table5777 */ 0x1733, /* VPANDDZrmk */ 0x1736, /* VPANDDZrrk */ /* Table5779 */ 0x1ba7, /* VPMAXUBZrmk */ 0x1baa, /* VPMAXUBZrrk */ /* Table5781 */ 0x174e, /* VPANDNDZrmk */ 0x1751, /* VPANDNDZrrk */ /* Table5783 */ 0x1ede, /* VPSRADZrmk */ 0x1ee1, /* VPSRADZrrk */ /* Table5785 */ 0x1c5d, /* VPMINSWZrmk */ 0x1c60, /* VPMINSWZrrk */ /* Table5787 */ 0x1e1b, /* VPORDZrmk */ 0x1e1e, /* VPORDZrrk */ /* Table5789 */ 0x1b91, /* VPMAXSWZrmk */ 0x1b94, /* VPMAXSWZrrk */ /* Table5791 */ 0x200c, /* VPXORDZrmk */ 0x200f, /* VPXORDZrrk */ /* Table5793 */ 0x1ea0, /* VPSLLDZrmk */ 0x1ea3, /* VPSLLDZrrk */ /* Table5795 */ 0x1f57, /* VPSUBBZrmk */ 0x1f5a, /* VPSUBBZrrk */ /* Table5797 */ 0x1fbb, /* VPSUBWZrmk */ 0x1fbe, /* VPSUBWZrrk */ /* Table5799 */ 0x1f76, /* VPSUBDZrmk */ 0x1f79, /* VPSUBDZrrk */ /* Table5801 */ 0x16ae, /* VPADDBZrmk */ 0x16b1, /* VPADDBZrrk */ /* Table5803 */ 0x1712, /* VPADDWZrmk */ 0x1715, /* VPADDWZrrk */ /* Table5805 */ 0x16cd, /* VPADDDZrmk */ 0x16d0, /* VPADDDZrrk */ /* Table5807 */ 0x1511, /* VMOVDQU64Zrmk */ 0x1515, /* VMOVDQU64Zrrk */ /* Table5809 */ 0x150f, /* VMOVDQU64Zmrk */ 0x1516, /* VMOVDQU64Zrrk_alt */ /* Table5811 */ 0x14cf, /* VMOVDQU16Zrmk */ 0x14d3, /* VMOVDQU16Zrrk */ /* Table5813 */ 0x14cd, /* VMOVDQU16Zmrk */ 0x14d4, /* VMOVDQU16Zrrk_alt */ /* Table5815 */ 0x15b7, /* VMOVUPDZrmk */ 0x15bb, /* VMOVUPDZrrk */ /* Table5817 */ 0x15b5, /* VMOVUPDZmrk */ 0x15bc, /* VMOVUPDZrrk_alt */ /* Table5819 */ 0x1429, /* VMOVAPDZrmk */ 0x142d, /* VMOVAPDZrrk */ /* Table5821 */ 0x1427, /* VMOVAPDZmrk */ 0x142e, /* VMOVAPDZrrk_alt */ /* Table5823 */ 0x2162, /* VSQRTPDZmk */ 0x2165, /* VSQRTPDZrk */ /* Table5825 */ 0xbe8, /* VADDPDZrmk */ 0xbeb, /* VADDPDZrrk */ /* Table5827 */ 0x161c, /* VMULPDZrmk */ 0x161f, /* VMULPDZrrk */ /* Table5829 */ 0x21b2, /* VSUBPDZrmk */ 0x21b5, /* VSUBPDZrrk */ /* Table5831 */ 0x13be, /* VMINPDZrmk */ 0x13c1, /* VMINPDZrrk */ /* Table5833 */ 0xdc5, /* VDIVPDZrmk */ 0xdc8, /* VDIVPDZrrk */ /* Table5835 */ 0x1353, /* VMAXPDZrmk */ 0x1356, /* VMAXPDZrrk */ /* Table5837 */ 0x14a6, /* VMOVDQA64Zrmk */ 0x14aa, /* VMOVDQA64Zrrk */ /* Table5839 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1ee7, /* VPSRAQZmik */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eea, /* VPSRAQZrik */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table5855 */ 0x0, /* */ 0x0, /* */ 0x1f20, /* VPSRLQZmik */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eac, /* VPSLLQZmik */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f23, /* VPSRLQZrik */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eaf, /* VPSLLQZrik */ 0x0, /* */ /* Table5871 */ 0x14a4, /* VMOVDQA64Zmrk */ 0x14ab, /* VMOVDQA64Zrrk_alt */ /* Table5873 */ 0x1f26, /* VPSRLQZrmk */ 0x1f29, /* VPSRLQZrrk */ /* Table5875 */ 0x16ec, /* VPADDQZrmk */ 0x16ef, /* VPADDQZrrk */ /* Table5877 */ 0x1788, /* VPANDQZrmk */ 0x178b, /* VPANDQZrrk */ /* Table5879 */ 0x1769, /* VPANDNQZrmk */ 0x176c, /* VPANDNQZrrk */ /* Table5881 */ 0x1eed, /* VPSRAQZrmk */ 0x1ef0, /* VPSRAQZrrk */ /* Table5883 */ 0x1e36, /* VPORQZrmk */ 0x1e39, /* VPORQZrrk */ /* Table5885 */ 0x2027, /* VPXORQZrmk */ 0x202a, /* VPXORQZrrk */ /* Table5887 */ 0x1eb2, /* VPSLLQZrmk */ 0x1eb5, /* VPSLLQZrrk */ /* Table5889 */ 0x1dfe, /* VPMULUDQZrmk */ 0x1e01, /* VPMULUDQZrrk */ /* Table5891 */ 0x1f95, /* VPSUBQZrmk */ 0x1f98, /* VPSUBQZrrk */ /* Table5893 */ 0x216c, /* VSQRTPSZ128mb */ 0x0, /* */ /* Table5895 */ 0xbf2, /* VADDPSZ128rmb */ 0x0, /* */ /* Table5897 */ 0x1626, /* VMULPSZ128rmb */ 0x0, /* */ /* Table5899 */ 0x21bc, /* VSUBPSZ128rmb */ 0x0, /* */ /* Table5901 */ 0x13c8, /* VMINPSZ128rmb */ 0x0, /* */ /* Table5903 */ 0xdcf, /* VDIVPSZ128rmb */ 0x0, /* */ /* Table5905 */ 0x135d, /* VMAXPSZ128rmb */ 0x0, /* */ /* Table5907 */ 0x0, /* */ 0xc28, /* VADDSSZrrb */ /* Table5909 */ 0x0, /* */ 0x165c, /* VMULSSZrrb */ /* Table5911 */ 0x0, /* */ 0x21f2, /* VSUBSSZrrb */ /* Table5913 */ 0x0, /* */ 0x13fb, /* VMINSSZrrb */ /* Table5915 */ 0x0, /* */ 0xe05, /* VDIVSSZrrb */ /* Table5917 */ 0x0, /* */ 0x1390, /* VMAXSSZrrb */ /* Table5919 */ 0x18e6, /* VPCMPGTDZ128rmb */ 0x0, /* */ /* Table5921 */ 0x1892, /* VPCMPEQDZ128rmb */ 0x0, /* */ /* Table5923 */ 0x171e, /* VPANDDZ128rmb */ 0x0, /* */ /* Table5925 */ 0x1739, /* VPANDNDZ128rmb */ 0x0, /* */ /* Table5927 */ 0x1e06, /* VPORDZ128rmb */ 0x0, /* */ /* Table5929 */ 0x1ff7, /* VPXORDZ128rmb */ 0x0, /* */ /* Table5931 */ 0x1f61, /* VPSUBDZ128rmb */ 0x0, /* */ /* Table5933 */ 0x16b8, /* VPADDDZ128rmb */ 0x0, /* */ /* Table5935 */ 0x0, /* */ 0xc19, /* VADDSDZrrb */ /* Table5937 */ 0x0, /* */ 0x164d, /* VMULSDZrrb */ /* Table5939 */ 0x0, /* */ 0x21e3, /* VSUBSDZrrb */ /* Table5941 */ 0x0, /* */ 0x13ec, /* VMINSDZrrb */ /* Table5943 */ 0x0, /* */ 0xdf6, /* VDIVSDZrrb */ /* Table5945 */ 0x0, /* */ 0x1381, /* VMAXSDZrrb */ /* Table5947 */ 0x214d, /* VSQRTPDZ128mb */ 0x0, /* */ /* Table5949 */ 0xbd0, /* VADDPDZ128rmb */ 0x0, /* */ /* Table5951 */ 0x1604, /* VMULPDZ128rmb */ 0x0, /* */ /* Table5953 */ 0x219a, /* VSUBPDZ128rmb */ 0x0, /* */ /* Table5955 */ 0x13a9, /* VMINPDZ128rmb */ 0x0, /* */ /* Table5957 */ 0xdad, /* VDIVPDZ128rmb */ 0x0, /* */ /* Table5959 */ 0x133e, /* VMAXPDZ128rmb */ 0x0, /* */ /* Table5961 */ 0x16d7, /* VPADDQZ128rmb */ 0x0, /* */ /* Table5963 */ 0x1773, /* VPANDQZ128rmb */ 0x0, /* */ /* Table5965 */ 0x1754, /* VPANDNQZ128rmb */ 0x0, /* */ /* Table5967 */ 0x1e21, /* VPORQZ128rmb */ 0x0, /* */ /* Table5969 */ 0x2012, /* VPXORQZ128rmb */ 0x0, /* */ /* Table5971 */ 0x1f80, /* VPSUBQZ128rmb */ 0x0, /* */ /* Table5973 */ 0x2175, /* VSQRTPSZ256mb */ 0x0, /* */ /* Table5975 */ 0xbfb, /* VADDPSZ256rmb */ 0x0, /* */ /* Table5977 */ 0x162f, /* VMULPSZ256rmb */ 0x0, /* */ /* Table5979 */ 0x21c5, /* VSUBPSZ256rmb */ 0x0, /* */ /* Table5981 */ 0x13d1, /* VMINPSZ256rmb */ 0x0, /* */ /* Table5983 */ 0xdd8, /* VDIVPSZ256rmb */ 0x0, /* */ /* Table5985 */ 0x1366, /* VMAXPSZ256rmb */ 0x0, /* */ /* Table5987 */ 0x18ec, /* VPCMPGTDZ256rmb */ 0x0, /* */ /* Table5989 */ 0x1898, /* VPCMPEQDZ256rmb */ 0x0, /* */ /* Table5991 */ 0x1727, /* VPANDDZ256rmb */ 0x0, /* */ /* Table5993 */ 0x1742, /* VPANDNDZ256rmb */ 0x0, /* */ /* Table5995 */ 0x1e0f, /* VPORDZ256rmb */ 0x0, /* */ /* Table5997 */ 0x2000, /* VPXORDZ256rmb */ 0x0, /* */ /* Table5999 */ 0x1f6a, /* VPSUBDZ256rmb */ 0x0, /* */ /* Table6001 */ 0x16c1, /* VPADDDZ256rmb */ 0x0, /* */ /* Table6003 */ 0x2156, /* VSQRTPDZ256mb */ 0x0, /* */ /* Table6005 */ 0xbd9, /* VADDPDZ256rmb */ 0x0, /* */ /* Table6007 */ 0x160d, /* VMULPDZ256rmb */ 0x0, /* */ /* Table6009 */ 0x21a3, /* VSUBPDZ256rmb */ 0x0, /* */ /* Table6011 */ 0x13b2, /* VMINPDZ256rmb */ 0x0, /* */ /* Table6013 */ 0xdb6, /* VDIVPDZ256rmb */ 0x0, /* */ /* Table6015 */ 0x1347, /* VMAXPDZ256rmb */ 0x0, /* */ /* Table6017 */ 0x16e0, /* VPADDQZ256rmb */ 0x0, /* */ /* Table6019 */ 0x177c, /* VPANDQZ256rmb */ 0x0, /* */ /* Table6021 */ 0x175d, /* VPANDNQZ256rmb */ 0x0, /* */ /* Table6023 */ 0x1e2a, /* VPORQZ256rmb */ 0x0, /* */ /* Table6025 */ 0x201b, /* VPXORQZ256rmb */ 0x0, /* */ /* Table6027 */ 0x1f89, /* VPSUBQZ256rmb */ 0x0, /* */ /* Table6029 */ 0x217e, /* VSQRTPSZmb */ 0x0, /* */ /* Table6031 */ 0xc07, /* VADDPSZrmb */ 0xc03, /* VADDPSZrb */ /* Table6033 */ 0x163b, /* VMULPSZrmb */ 0x1637, /* VMULPSZrb */ /* Table6035 */ 0x0, /* */ 0xd15, /* VCVTDQ2PSZrrb */ /* Table6037 */ 0x21d1, /* VSUBPSZrmb */ 0x21cd, /* VSUBPSZrb */ /* Table6039 */ 0x13da, /* VMINPSZrmb */ 0x0, /* */ /* Table6041 */ 0xde4, /* VDIVPSZrmb */ 0xde0, /* VDIVPSZrb */ /* Table6043 */ 0x136f, /* VMAXPSZrmb */ 0x0, /* */ /* Table6045 */ 0x0, /* */ 0xd44, /* VCVTPS2UDQZrrb */ /* Table6047 */ 0x0, /* */ 0xcdb, /* VCMPPSZrrib */ /* Table6049 */ 0x0, /* */ 0xda1, /* VCVTUDQ2PSZrrb */ /* Table6051 */ 0x0, /* */ 0xd33, /* VCVTPS2DQZrrb */ /* Table6053 */ 0x18f2, /* VPCMPGTDZrmb */ 0x0, /* */ /* Table6055 */ 0x189e, /* VPCMPEQDZrmb */ 0x0, /* */ /* Table6057 */ 0x1730, /* VPANDDZrmb */ 0x0, /* */ /* Table6059 */ 0x174b, /* VPANDNDZrmb */ 0x0, /* */ /* Table6061 */ 0x1e18, /* VPORDZrmb */ 0x0, /* */ /* Table6063 */ 0x2009, /* VPXORDZrmb */ 0x0, /* */ /* Table6065 */ 0x1f73, /* VPSUBDZrmb */ 0x0, /* */ /* Table6067 */ 0x16ca, /* VPADDDZrmb */ 0x0, /* */ /* Table6069 */ 0x0, /* */ 0xd28, /* VCVTPD2UDQZrrb */ /* Table6071 */ 0x0, /* */ 0xd1d, /* VCVTPD2DQZrrb */ /* Table6073 */ 0x215f, /* VSQRTPDZmb */ 0x0, /* */ /* Table6075 */ 0xbe5, /* VADDPDZrmb */ 0xbe1, /* VADDPDZrb */ /* Table6077 */ 0x1619, /* VMULPDZrmb */ 0x1615, /* VMULPDZrb */ /* Table6079 */ 0x0, /* */ 0xd24, /* VCVTPD2PSZrrb */ /* Table6081 */ 0x21af, /* VSUBPDZrmb */ 0x21ab, /* VSUBPDZrb */ /* Table6083 */ 0x13bb, /* VMINPDZrmb */ 0x0, /* */ /* Table6085 */ 0xdc2, /* VDIVPDZrmb */ 0xdbe, /* VDIVPDZrb */ /* Table6087 */ 0x1350, /* VMAXPDZrmb */ 0x0, /* */ /* Table6089 */ 0x0, /* */ 0xccd, /* VCMPPDZrrib */ /* Table6091 */ 0x16e9, /* VPADDQZrmb */ 0x0, /* */ /* Table6093 */ 0x1785, /* VPANDQZrmb */ 0x0, /* */ /* Table6095 */ 0x1766, /* VPANDNQZrmb */ 0x0, /* */ /* Table6097 */ 0x1e33, /* VPORQZrmb */ 0x0, /* */ /* Table6099 */ 0x2024, /* VPXORQZrmb */ 0x0, /* */ /* Table6101 */ 0x1dfb, /* VPMULUDQZrmb */ 0x0, /* */ /* Table6103 */ 0x1f92, /* VPSUBQZrmb */ 0x0, /* */ /* Table6105 */ 0x216d, /* VSQRTPSZ128mbk */ 0x0, /* */ /* Table6107 */ 0xbf3, /* VADDPSZ128rmbk */ 0x0, /* */ /* Table6109 */ 0x1627, /* VMULPSZ128rmbk */ 0x0, /* */ /* Table6111 */ 0x21bd, /* VSUBPSZ128rmbk */ 0x0, /* */ /* Table6113 */ 0x13c9, /* VMINPSZ128rmbk */ 0x0, /* */ /* Table6115 */ 0xdd0, /* VDIVPSZ128rmbk */ 0x0, /* */ /* Table6117 */ 0x135e, /* VMAXPSZ128rmbk */ 0x0, /* */ /* Table6119 */ 0x0, /* */ 0xc29, /* VADDSSZrrbk */ /* Table6121 */ 0x0, /* */ 0x165d, /* VMULSSZrrbk */ /* Table6123 */ 0x0, /* */ 0x21f3, /* VSUBSSZrrbk */ /* Table6125 */ 0x0, /* */ 0x13fc, /* VMINSSZrrbk */ /* Table6127 */ 0x0, /* */ 0xe06, /* VDIVSSZrrbk */ /* Table6129 */ 0x0, /* */ 0x1391, /* VMAXSSZrrbk */ /* Table6131 */ 0x18e7, /* VPCMPGTDZ128rmbk */ 0x0, /* */ /* Table6133 */ 0x1893, /* VPCMPEQDZ128rmbk */ 0x0, /* */ /* Table6135 */ 0x171f, /* VPANDDZ128rmbk */ 0x0, /* */ /* Table6137 */ 0x173a, /* VPANDNDZ128rmbk */ 0x0, /* */ /* Table6139 */ 0x1e07, /* VPORDZ128rmbk */ 0x0, /* */ /* Table6141 */ 0x1ff8, /* VPXORDZ128rmbk */ 0x0, /* */ /* Table6143 */ 0x1f62, /* VPSUBDZ128rmbk */ 0x0, /* */ /* Table6145 */ 0x16b9, /* VPADDDZ128rmbk */ 0x0, /* */ /* Table6147 */ 0x0, /* */ 0xc1a, /* VADDSDZrrbk */ /* Table6149 */ 0x0, /* */ 0x164e, /* VMULSDZrrbk */ /* Table6151 */ 0x0, /* */ 0x21e4, /* VSUBSDZrrbk */ /* Table6153 */ 0x0, /* */ 0x13ed, /* VMINSDZrrbk */ /* Table6155 */ 0x0, /* */ 0xdf7, /* VDIVSDZrrbk */ /* Table6157 */ 0x0, /* */ 0x1382, /* VMAXSDZrrbk */ /* Table6159 */ 0x214e, /* VSQRTPDZ128mbk */ 0x0, /* */ /* Table6161 */ 0xbd1, /* VADDPDZ128rmbk */ 0x0, /* */ /* Table6163 */ 0x1605, /* VMULPDZ128rmbk */ 0x0, /* */ /* Table6165 */ 0x219b, /* VSUBPDZ128rmbk */ 0x0, /* */ /* Table6167 */ 0x13aa, /* VMINPDZ128rmbk */ 0x0, /* */ /* Table6169 */ 0xdae, /* VDIVPDZ128rmbk */ 0x0, /* */ /* Table6171 */ 0x133f, /* VMAXPDZ128rmbk */ 0x0, /* */ /* Table6173 */ 0x16d8, /* VPADDQZ128rmbk */ 0x0, /* */ /* Table6175 */ 0x1774, /* VPANDQZ128rmbk */ 0x0, /* */ /* Table6177 */ 0x1755, /* VPANDNQZ128rmbk */ 0x0, /* */ /* Table6179 */ 0x1e22, /* VPORQZ128rmbk */ 0x0, /* */ /* Table6181 */ 0x2013, /* VPXORQZ128rmbk */ 0x0, /* */ /* Table6183 */ 0x1f81, /* VPSUBQZ128rmbk */ 0x0, /* */ /* Table6185 */ 0x2176, /* VSQRTPSZ256mbk */ 0x0, /* */ /* Table6187 */ 0xbfc, /* VADDPSZ256rmbk */ 0x0, /* */ /* Table6189 */ 0x1630, /* VMULPSZ256rmbk */ 0x0, /* */ /* Table6191 */ 0x21c6, /* VSUBPSZ256rmbk */ 0x0, /* */ /* Table6193 */ 0x13d2, /* VMINPSZ256rmbk */ 0x0, /* */ /* Table6195 */ 0xdd9, /* VDIVPSZ256rmbk */ 0x0, /* */ /* Table6197 */ 0x1367, /* VMAXPSZ256rmbk */ 0x0, /* */ /* Table6199 */ 0x18ed, /* VPCMPGTDZ256rmbk */ 0x0, /* */ /* Table6201 */ 0x1899, /* VPCMPEQDZ256rmbk */ 0x0, /* */ /* Table6203 */ 0x1728, /* VPANDDZ256rmbk */ 0x0, /* */ /* Table6205 */ 0x1743, /* VPANDNDZ256rmbk */ 0x0, /* */ /* Table6207 */ 0x1e10, /* VPORDZ256rmbk */ 0x0, /* */ /* Table6209 */ 0x2001, /* VPXORDZ256rmbk */ 0x0, /* */ /* Table6211 */ 0x1f6b, /* VPSUBDZ256rmbk */ 0x0, /* */ /* Table6213 */ 0x16c2, /* VPADDDZ256rmbk */ 0x0, /* */ /* Table6215 */ 0x2157, /* VSQRTPDZ256mbk */ 0x0, /* */ /* Table6217 */ 0xbda, /* VADDPDZ256rmbk */ 0x0, /* */ /* Table6219 */ 0x160e, /* VMULPDZ256rmbk */ 0x0, /* */ /* Table6221 */ 0x21a4, /* VSUBPDZ256rmbk */ 0x0, /* */ /* Table6223 */ 0x13b3, /* VMINPDZ256rmbk */ 0x0, /* */ /* Table6225 */ 0xdb7, /* VDIVPDZ256rmbk */ 0x0, /* */ /* Table6227 */ 0x1348, /* VMAXPDZ256rmbk */ 0x0, /* */ /* Table6229 */ 0x16e1, /* VPADDQZ256rmbk */ 0x0, /* */ /* Table6231 */ 0x177d, /* VPANDQZ256rmbk */ 0x0, /* */ /* Table6233 */ 0x175e, /* VPANDNQZ256rmbk */ 0x0, /* */ /* Table6235 */ 0x1e2b, /* VPORQZ256rmbk */ 0x0, /* */ /* Table6237 */ 0x201c, /* VPXORQZ256rmbk */ 0x0, /* */ /* Table6239 */ 0x1f8a, /* VPSUBQZ256rmbk */ 0x0, /* */ /* Table6241 */ 0x217f, /* VSQRTPSZmbk */ 0x0, /* */ /* Table6243 */ 0xc08, /* VADDPSZrmbk */ 0xc04, /* VADDPSZrbk */ /* Table6245 */ 0x163c, /* VMULPSZrmbk */ 0x1638, /* VMULPSZrbk */ /* Table6247 */ 0x21d2, /* VSUBPSZrmbk */ 0x21ce, /* VSUBPSZrbk */ /* Table6249 */ 0x13db, /* VMINPSZrmbk */ 0x0, /* */ /* Table6251 */ 0xde5, /* VDIVPSZrmbk */ 0xde1, /* VDIVPSZrbk */ /* Table6253 */ 0x1370, /* VMAXPSZrmbk */ 0x0, /* */ /* Table6255 */ 0x18f3, /* VPCMPGTDZrmbk */ 0x0, /* */ /* Table6257 */ 0x189f, /* VPCMPEQDZrmbk */ 0x0, /* */ /* Table6259 */ 0x1731, /* VPANDDZrmbk */ 0x0, /* */ /* Table6261 */ 0x174c, /* VPANDNDZrmbk */ 0x0, /* */ /* Table6263 */ 0x1e19, /* VPORDZrmbk */ 0x0, /* */ /* Table6265 */ 0x200a, /* VPXORDZrmbk */ 0x0, /* */ /* Table6267 */ 0x1f74, /* VPSUBDZrmbk */ 0x0, /* */ /* Table6269 */ 0x16cb, /* VPADDDZrmbk */ 0x0, /* */ /* Table6271 */ 0x2160, /* VSQRTPDZmbk */ 0x0, /* */ /* Table6273 */ 0xbe6, /* VADDPDZrmbk */ 0xbe2, /* VADDPDZrbk */ /* Table6275 */ 0x161a, /* VMULPDZrmbk */ 0x1616, /* VMULPDZrbk */ /* Table6277 */ 0x21b0, /* VSUBPDZrmbk */ 0x21ac, /* VSUBPDZrbk */ /* Table6279 */ 0x13bc, /* VMINPDZrmbk */ 0x0, /* */ /* Table6281 */ 0xdc3, /* VDIVPDZrmbk */ 0xdbf, /* VDIVPDZrbk */ /* Table6283 */ 0x1351, /* VMAXPDZrmbk */ 0x0, /* */ /* Table6285 */ 0x16ea, /* VPADDQZrmbk */ 0x0, /* */ /* Table6287 */ 0x1786, /* VPANDQZrmbk */ 0x0, /* */ /* Table6289 */ 0x1767, /* VPANDNQZrmbk */ 0x0, /* */ /* Table6291 */ 0x1e34, /* VPORQZrmbk */ 0x0, /* */ /* Table6293 */ 0x2025, /* VPXORQZrmbk */ 0x0, /* */ /* Table6295 */ 0x1dfc, /* VPMULUDQZrmbk */ 0x0, /* */ /* Table6297 */ 0x1f93, /* VPSUBQZrmbk */ 0x0, /* */ /* Table6299 */ 0x216e, /* VSQRTPSZ128mbkz */ 0x0, /* */ /* Table6301 */ 0xbf4, /* VADDPSZ128rmbkz */ 0x0, /* */ /* Table6303 */ 0x1628, /* VMULPSZ128rmbkz */ 0x0, /* */ /* Table6305 */ 0x21be, /* VSUBPSZ128rmbkz */ 0x0, /* */ /* Table6307 */ 0x13ca, /* VMINPSZ128rmbkz */ 0x0, /* */ /* Table6309 */ 0xdd1, /* VDIVPSZ128rmbkz */ 0x0, /* */ /* Table6311 */ 0x135f, /* VMAXPSZ128rmbkz */ 0x0, /* */ /* Table6313 */ 0x0, /* */ 0xc2a, /* VADDSSZrrbkz */ /* Table6315 */ 0x0, /* */ 0x165e, /* VMULSSZrrbkz */ /* Table6317 */ 0x0, /* */ 0x21f4, /* VSUBSSZrrbkz */ /* Table6319 */ 0x0, /* */ 0x13fd, /* VMINSSZrrbkz */ /* Table6321 */ 0x0, /* */ 0xe07, /* VDIVSSZrrbkz */ /* Table6323 */ 0x0, /* */ 0x1392, /* VMAXSSZrrbkz */ /* Table6325 */ 0x1720, /* VPANDDZ128rmbkz */ 0x0, /* */ /* Table6327 */ 0x173b, /* VPANDNDZ128rmbkz */ 0x0, /* */ /* Table6329 */ 0x1e08, /* VPORDZ128rmbkz */ 0x0, /* */ /* Table6331 */ 0x1ff9, /* VPXORDZ128rmbkz */ 0x0, /* */ /* Table6333 */ 0x1f63, /* VPSUBDZ128rmbkz */ 0x0, /* */ /* Table6335 */ 0x16ba, /* VPADDDZ128rmbkz */ 0x0, /* */ /* Table6337 */ 0x0, /* */ 0xc1b, /* VADDSDZrrbkz */ /* Table6339 */ 0x0, /* */ 0x164f, /* VMULSDZrrbkz */ /* Table6341 */ 0x0, /* */ 0x21e5, /* VSUBSDZrrbkz */ /* Table6343 */ 0x0, /* */ 0x13ee, /* VMINSDZrrbkz */ /* Table6345 */ 0x0, /* */ 0xdf8, /* VDIVSDZrrbkz */ /* Table6347 */ 0x0, /* */ 0x1383, /* VMAXSDZrrbkz */ /* Table6349 */ 0x214f, /* VSQRTPDZ128mbkz */ 0x0, /* */ /* Table6351 */ 0xbd2, /* VADDPDZ128rmbkz */ 0x0, /* */ /* Table6353 */ 0x1606, /* VMULPDZ128rmbkz */ 0x0, /* */ /* Table6355 */ 0x219c, /* VSUBPDZ128rmbkz */ 0x0, /* */ /* Table6357 */ 0x13ab, /* VMINPDZ128rmbkz */ 0x0, /* */ /* Table6359 */ 0xdaf, /* VDIVPDZ128rmbkz */ 0x0, /* */ /* Table6361 */ 0x1340, /* VMAXPDZ128rmbkz */ 0x0, /* */ /* Table6363 */ 0x16d9, /* VPADDQZ128rmbkz */ 0x0, /* */ /* Table6365 */ 0x1775, /* VPANDQZ128rmbkz */ 0x0, /* */ /* Table6367 */ 0x1756, /* VPANDNQZ128rmbkz */ 0x0, /* */ /* Table6369 */ 0x1e23, /* VPORQZ128rmbkz */ 0x0, /* */ /* Table6371 */ 0x2014, /* VPXORQZ128rmbkz */ 0x0, /* */ /* Table6373 */ 0x1f82, /* VPSUBQZ128rmbkz */ 0x0, /* */ /* Table6375 */ 0x2177, /* VSQRTPSZ256mbkz */ 0x0, /* */ /* Table6377 */ 0xbfd, /* VADDPSZ256rmbkz */ 0x0, /* */ /* Table6379 */ 0x1631, /* VMULPSZ256rmbkz */ 0x0, /* */ /* Table6381 */ 0x21c7, /* VSUBPSZ256rmbkz */ 0x0, /* */ /* Table6383 */ 0x13d3, /* VMINPSZ256rmbkz */ 0x0, /* */ /* Table6385 */ 0xdda, /* VDIVPSZ256rmbkz */ 0x0, /* */ /* Table6387 */ 0x1368, /* VMAXPSZ256rmbkz */ 0x0, /* */ /* Table6389 */ 0x1729, /* VPANDDZ256rmbkz */ 0x0, /* */ /* Table6391 */ 0x1744, /* VPANDNDZ256rmbkz */ 0x0, /* */ /* Table6393 */ 0x1e11, /* VPORDZ256rmbkz */ 0x0, /* */ /* Table6395 */ 0x2002, /* VPXORDZ256rmbkz */ 0x0, /* */ /* Table6397 */ 0x1f6c, /* VPSUBDZ256rmbkz */ 0x0, /* */ /* Table6399 */ 0x16c3, /* VPADDDZ256rmbkz */ 0x0, /* */ /* Table6401 */ 0x2158, /* VSQRTPDZ256mbkz */ 0x0, /* */ /* Table6403 */ 0xbdb, /* VADDPDZ256rmbkz */ 0x0, /* */ /* Table6405 */ 0x160f, /* VMULPDZ256rmbkz */ 0x0, /* */ /* Table6407 */ 0x21a5, /* VSUBPDZ256rmbkz */ 0x0, /* */ /* Table6409 */ 0x13b4, /* VMINPDZ256rmbkz */ 0x0, /* */ /* Table6411 */ 0xdb8, /* VDIVPDZ256rmbkz */ 0x0, /* */ /* Table6413 */ 0x1349, /* VMAXPDZ256rmbkz */ 0x0, /* */ /* Table6415 */ 0x16e2, /* VPADDQZ256rmbkz */ 0x0, /* */ /* Table6417 */ 0x177e, /* VPANDQZ256rmbkz */ 0x0, /* */ /* Table6419 */ 0x175f, /* VPANDNQZ256rmbkz */ 0x0, /* */ /* Table6421 */ 0x1e2c, /* VPORQZ256rmbkz */ 0x0, /* */ /* Table6423 */ 0x201d, /* VPXORQZ256rmbkz */ 0x0, /* */ /* Table6425 */ 0x1f8b, /* VPSUBQZ256rmbkz */ 0x0, /* */ /* Table6427 */ 0x2180, /* VSQRTPSZmbkz */ 0x0, /* */ /* Table6429 */ 0xc09, /* VADDPSZrmbkz */ 0xc05, /* VADDPSZrbkz */ /* Table6431 */ 0x163d, /* VMULPSZrmbkz */ 0x1639, /* VMULPSZrbkz */ /* Table6433 */ 0x21d3, /* VSUBPSZrmbkz */ 0x21cf, /* VSUBPSZrbkz */ /* Table6435 */ 0x13dc, /* VMINPSZrmbkz */ 0x0, /* */ /* Table6437 */ 0xde6, /* VDIVPSZrmbkz */ 0xde2, /* VDIVPSZrbkz */ /* Table6439 */ 0x1371, /* VMAXPSZrmbkz */ 0x0, /* */ /* Table6441 */ 0x1732, /* VPANDDZrmbkz */ 0x0, /* */ /* Table6443 */ 0x174d, /* VPANDNDZrmbkz */ 0x0, /* */ /* Table6445 */ 0x1e1a, /* VPORDZrmbkz */ 0x0, /* */ /* Table6447 */ 0x200b, /* VPXORDZrmbkz */ 0x0, /* */ /* Table6449 */ 0x1f75, /* VPSUBDZrmbkz */ 0x0, /* */ /* Table6451 */ 0x16cc, /* VPADDDZrmbkz */ 0x0, /* */ /* Table6453 */ 0x2161, /* VSQRTPDZmbkz */ 0x0, /* */ /* Table6455 */ 0xbe7, /* VADDPDZrmbkz */ 0xbe3, /* VADDPDZrbkz */ /* Table6457 */ 0x161b, /* VMULPDZrmbkz */ 0x1617, /* VMULPDZrbkz */ /* Table6459 */ 0x21b1, /* VSUBPDZrmbkz */ 0x21ad, /* VSUBPDZrbkz */ /* Table6461 */ 0x13bd, /* VMINPDZrmbkz */ 0x0, /* */ /* Table6463 */ 0xdc4, /* VDIVPDZrmbkz */ 0xdc0, /* VDIVPDZrbkz */ /* Table6465 */ 0x1352, /* VMAXPDZrmbkz */ 0x0, /* */ /* Table6467 */ 0x16eb, /* VPADDQZrmbkz */ 0x0, /* */ /* Table6469 */ 0x1787, /* VPANDQZrmbkz */ 0x0, /* */ /* Table6471 */ 0x1768, /* VPANDNQZrmbkz */ 0x0, /* */ /* Table6473 */ 0x1e35, /* VPORQZrmbkz */ 0x0, /* */ /* Table6475 */ 0x2026, /* VPXORQZrmbkz */ 0x0, /* */ /* Table6477 */ 0x1dfd, /* VPMULUDQZrmbkz */ 0x0, /* */ /* Table6479 */ 0x1f94, /* VPSUBQZrmbkz */ 0x0, /* */ /* Table6481 */ 0x15cb, /* VMOVUPSZ128rmkz */ 0x15d0, /* VMOVUPSZ128rrkz */ /* Table6483 */ 0x0, /* */ 0x15d1, /* VMOVUPSZ128rrkz_alt */ /* Table6485 */ 0x143d, /* VMOVAPSZ128rmkz */ 0x1442, /* VMOVAPSZ128rrkz */ /* Table6487 */ 0x0, /* */ 0x1443, /* VMOVAPSZ128rrkz_alt */ /* Table6489 */ 0x2170, /* VSQRTPSZ128mkz */ 0x2173, /* VSQRTPSZ128rkz */ /* Table6491 */ 0xbf6, /* VADDPSZ128rmkz */ 0xbf9, /* VADDPSZ128rrkz */ /* Table6493 */ 0x162a, /* VMULPSZ128rmkz */ 0x162d, /* VMULPSZ128rrkz */ /* Table6495 */ 0x21c0, /* VSUBPSZ128rmkz */ 0x21c3, /* VSUBPSZ128rrkz */ /* Table6497 */ 0x13cc, /* VMINPSZ128rmkz */ 0x13cf, /* VMINPSZ128rrkz */ /* Table6499 */ 0xdd3, /* VDIVPSZ128rmkz */ 0xdd6, /* VDIVPSZ128rrkz */ /* Table6501 */ 0x1361, /* VMAXPSZ128rmkz */ 0x1364, /* VMAXPSZ128rrkz */ /* Table6503 */ 0xc23, /* VADDSSZrm_Intkz */ 0xc27, /* VADDSSZrr_Intkz */ /* Table6505 */ 0x1657, /* VMULSSZrm_Intkz */ 0x165b, /* VMULSSZrr_Intkz */ /* Table6507 */ 0x21ed, /* VSUBSSZrm_Intkz */ 0x21f1, /* VSUBSSZrr_Intkz */ /* Table6509 */ 0x13f6, /* VMINSSZrm_Intkz */ 0x13fa, /* VMINSSZrr_Intkz */ /* Table6511 */ 0xe00, /* VDIVSSZrm_Intkz */ 0xe04, /* VDIVSSZrr_Intkz */ /* Table6513 */ 0x138b, /* VMAXSSZrm_Intkz */ 0x138f, /* VMAXSSZrr_Intkz */ /* Table6515 */ 0x14db, /* VMOVDQU32Z128rmkz */ 0x14e0, /* VMOVDQU32Z128rrkz */ /* Table6517 */ 0x0, /* */ 0x14e1, /* VMOVDQU32Z128rrkz_alt */ /* Table6519 */ 0x151d, /* VMOVDQU8Z128rmkz */ 0x1522, /* VMOVDQU8Z128rrkz */ /* Table6521 */ 0x0, /* */ 0x1523, /* VMOVDQU8Z128rrkz_alt */ /* Table6523 */ 0x1470, /* VMOVDQA32Z128rmkz */ 0x1475, /* VMOVDQA32Z128rrkz */ /* Table6525 */ 0x0, /* */ 0x1476, /* VMOVDQA32Z128rrkz_alt */ /* Table6527 */ 0x1de6, /* VPMULLWZ128rmkz */ 0x1de9, /* VPMULLWZ128rrkz */ /* Table6529 */ 0x1c68, /* VPMINUBZ128rmkz */ 0x1c6b, /* VPMINUBZ128rrkz */ /* Table6531 */ 0x1722, /* VPANDDZ128rmkz */ 0x1725, /* VPANDDZ128rrkz */ /* Table6533 */ 0x1b9c, /* VPMAXUBZ128rmkz */ 0x1b9f, /* VPMAXUBZ128rrkz */ /* Table6535 */ 0x173d, /* VPANDNDZ128rmkz */ 0x1740, /* VPANDNDZ128rrkz */ /* Table6537 */ 0x1c52, /* VPMINSWZ128rmkz */ 0x1c55, /* VPMINSWZ128rrkz */ /* Table6539 */ 0x1e0a, /* VPORDZ128rmkz */ 0x1e0d, /* VPORDZ128rrkz */ /* Table6541 */ 0x1b86, /* VPMAXSWZ128rmkz */ 0x1b89, /* VPMAXSWZ128rrkz */ /* Table6543 */ 0x1ffb, /* VPXORDZ128rmkz */ 0x1ffe, /* VPXORDZ128rrkz */ /* Table6545 */ 0x1f4c, /* VPSUBBZ128rmkz */ 0x1f4f, /* VPSUBBZ128rrkz */ /* Table6547 */ 0x1fb0, /* VPSUBWZ128rmkz */ 0x1fb3, /* VPSUBWZ128rrkz */ /* Table6549 */ 0x1f65, /* VPSUBDZ128rmkz */ 0x1f68, /* VPSUBDZ128rrkz */ /* Table6551 */ 0x16a3, /* VPADDBZ128rmkz */ 0x16a6, /* VPADDBZ128rrkz */ /* Table6553 */ 0x1707, /* VPADDWZ128rmkz */ 0x170a, /* VPADDWZ128rrkz */ /* Table6555 */ 0x16bc, /* VPADDDZ128rmkz */ 0x16bf, /* VPADDDZ128rrkz */ /* Table6557 */ 0x14fc, /* VMOVDQU64Z128rmkz */ 0x1501, /* VMOVDQU64Z128rrkz */ /* Table6559 */ 0x0, /* */ 0x1502, /* VMOVDQU64Z128rrkz_alt */ /* Table6561 */ 0xc14, /* VADDSDZrm_Intkz */ 0xc18, /* VADDSDZrr_Intkz */ /* Table6563 */ 0x1648, /* VMULSDZrm_Intkz */ 0x164c, /* VMULSDZrr_Intkz */ /* Table6565 */ 0x21de, /* VSUBSDZrm_Intkz */ 0x21e2, /* VSUBSDZrr_Intkz */ /* Table6567 */ 0x13e7, /* VMINSDZrm_Intkz */ 0x13eb, /* VMINSDZrr_Intkz */ /* Table6569 */ 0xdf1, /* VDIVSDZrm_Intkz */ 0xdf5, /* VDIVSDZrr_Intkz */ /* Table6571 */ 0x137c, /* VMAXSDZrm_Intkz */ 0x1380, /* VMAXSDZrr_Intkz */ /* Table6573 */ 0x14ba, /* VMOVDQU16Z128rmkz */ 0x14bf, /* VMOVDQU16Z128rrkz */ /* Table6575 */ 0x0, /* */ 0x14c0, /* VMOVDQU16Z128rrkz_alt */ /* Table6577 */ 0x15a2, /* VMOVUPDZ128rmkz */ 0x15a7, /* VMOVUPDZ128rrkz */ /* Table6579 */ 0x0, /* */ 0x15a8, /* VMOVUPDZ128rrkz_alt */ /* Table6581 */ 0x1414, /* VMOVAPDZ128rmkz */ 0x1419, /* VMOVAPDZ128rrkz */ /* Table6583 */ 0x0, /* */ 0x141a, /* VMOVAPDZ128rrkz_alt */ /* Table6585 */ 0x2151, /* VSQRTPDZ128mkz */ 0x2154, /* VSQRTPDZ128rkz */ /* Table6587 */ 0xbd4, /* VADDPDZ128rmkz */ 0xbd7, /* VADDPDZ128rrkz */ /* Table6589 */ 0x1608, /* VMULPDZ128rmkz */ 0x160b, /* VMULPDZ128rrkz */ /* Table6591 */ 0x219e, /* VSUBPDZ128rmkz */ 0x21a1, /* VSUBPDZ128rrkz */ /* Table6593 */ 0x13ad, /* VMINPDZ128rmkz */ 0x13b0, /* VMINPDZ128rrkz */ /* Table6595 */ 0xdb1, /* VDIVPDZ128rmkz */ 0xdb4, /* VDIVPDZ128rrkz */ /* Table6597 */ 0x1342, /* VMAXPDZ128rmkz */ 0x1345, /* VMAXPDZ128rrkz */ /* Table6599 */ 0x1491, /* VMOVDQA64Z128rmkz */ 0x1496, /* VMOVDQA64Z128rrkz */ /* Table6601 */ 0x0, /* */ 0x1497, /* VMOVDQA64Z128rrkz_alt */ /* Table6603 */ 0x16db, /* VPADDQZ128rmkz */ 0x16de, /* VPADDQZ128rrkz */ /* Table6605 */ 0x1777, /* VPANDQZ128rmkz */ 0x177a, /* VPANDQZ128rrkz */ /* Table6607 */ 0x1758, /* VPANDNQZ128rmkz */ 0x175b, /* VPANDNQZ128rrkz */ /* Table6609 */ 0x1e25, /* VPORQZ128rmkz */ 0x1e28, /* VPORQZ128rrkz */ /* Table6611 */ 0x2016, /* VPXORQZ128rmkz */ 0x2019, /* VPXORQZ128rrkz */ /* Table6613 */ 0x1f84, /* VPSUBQZ128rmkz */ 0x1f87, /* VPSUBQZ128rrkz */ /* Table6615 */ 0x15d6, /* VMOVUPSZ256rmkz */ 0x15db, /* VMOVUPSZ256rrkz */ /* Table6617 */ 0x0, /* */ 0x15dc, /* VMOVUPSZ256rrkz_alt */ /* Table6619 */ 0x1448, /* VMOVAPSZ256rmkz */ 0x144d, /* VMOVAPSZ256rrkz */ /* Table6621 */ 0x0, /* */ 0x144e, /* VMOVAPSZ256rrkz_alt */ /* Table6623 */ 0x2179, /* VSQRTPSZ256mkz */ 0x217c, /* VSQRTPSZ256rkz */ /* Table6625 */ 0xbff, /* VADDPSZ256rmkz */ 0xc02, /* VADDPSZ256rrkz */ /* Table6627 */ 0x1633, /* VMULPSZ256rmkz */ 0x1636, /* VMULPSZ256rrkz */ /* Table6629 */ 0x21c9, /* VSUBPSZ256rmkz */ 0x21cc, /* VSUBPSZ256rrkz */ /* Table6631 */ 0x13d5, /* VMINPSZ256rmkz */ 0x13d8, /* VMINPSZ256rrkz */ /* Table6633 */ 0xddc, /* VDIVPSZ256rmkz */ 0xddf, /* VDIVPSZ256rrkz */ /* Table6635 */ 0x136a, /* VMAXPSZ256rmkz */ 0x136d, /* VMAXPSZ256rrkz */ /* Table6637 */ 0x14e6, /* VMOVDQU32Z256rmkz */ 0x14eb, /* VMOVDQU32Z256rrkz */ /* Table6639 */ 0x0, /* */ 0x14ec, /* VMOVDQU32Z256rrkz_alt */ /* Table6641 */ 0x1528, /* VMOVDQU8Z256rmkz */ 0x152d, /* VMOVDQU8Z256rrkz */ /* Table6643 */ 0x0, /* */ 0x152e, /* VMOVDQU8Z256rrkz_alt */ /* Table6645 */ 0x147b, /* VMOVDQA32Z256rmkz */ 0x1480, /* VMOVDQA32Z256rrkz */ /* Table6647 */ 0x0, /* */ 0x1481, /* VMOVDQA32Z256rrkz_alt */ /* Table6649 */ 0x1dec, /* VPMULLWZ256rmkz */ 0x1def, /* VPMULLWZ256rrkz */ /* Table6651 */ 0x1c6e, /* VPMINUBZ256rmkz */ 0x1c71, /* VPMINUBZ256rrkz */ /* Table6653 */ 0x172b, /* VPANDDZ256rmkz */ 0x172e, /* VPANDDZ256rrkz */ /* Table6655 */ 0x1ba2, /* VPMAXUBZ256rmkz */ 0x1ba5, /* VPMAXUBZ256rrkz */ /* Table6657 */ 0x1746, /* VPANDNDZ256rmkz */ 0x1749, /* VPANDNDZ256rrkz */ /* Table6659 */ 0x1c58, /* VPMINSWZ256rmkz */ 0x1c5b, /* VPMINSWZ256rrkz */ /* Table6661 */ 0x1e13, /* VPORDZ256rmkz */ 0x1e16, /* VPORDZ256rrkz */ /* Table6663 */ 0x1b8c, /* VPMAXSWZ256rmkz */ 0x1b8f, /* VPMAXSWZ256rrkz */ /* Table6665 */ 0x2004, /* VPXORDZ256rmkz */ 0x2007, /* VPXORDZ256rrkz */ /* Table6667 */ 0x1f52, /* VPSUBBZ256rmkz */ 0x1f55, /* VPSUBBZ256rrkz */ /* Table6669 */ 0x1fb6, /* VPSUBWZ256rmkz */ 0x1fb9, /* VPSUBWZ256rrkz */ /* Table6671 */ 0x1f6e, /* VPSUBDZ256rmkz */ 0x1f71, /* VPSUBDZ256rrkz */ /* Table6673 */ 0x16a9, /* VPADDBZ256rmkz */ 0x16ac, /* VPADDBZ256rrkz */ /* Table6675 */ 0x170d, /* VPADDWZ256rmkz */ 0x1710, /* VPADDWZ256rrkz */ /* Table6677 */ 0x16c5, /* VPADDDZ256rmkz */ 0x16c8, /* VPADDDZ256rrkz */ /* Table6679 */ 0x1507, /* VMOVDQU64Z256rmkz */ 0x150c, /* VMOVDQU64Z256rrkz */ /* Table6681 */ 0x0, /* */ 0x150d, /* VMOVDQU64Z256rrkz_alt */ /* Table6683 */ 0x14c5, /* VMOVDQU16Z256rmkz */ 0x14ca, /* VMOVDQU16Z256rrkz */ /* Table6685 */ 0x0, /* */ 0x14cb, /* VMOVDQU16Z256rrkz_alt */ /* Table6687 */ 0x15ad, /* VMOVUPDZ256rmkz */ 0x15b2, /* VMOVUPDZ256rrkz */ /* Table6689 */ 0x0, /* */ 0x15b3, /* VMOVUPDZ256rrkz_alt */ /* Table6691 */ 0x141f, /* VMOVAPDZ256rmkz */ 0x1424, /* VMOVAPDZ256rrkz */ /* Table6693 */ 0x0, /* */ 0x1425, /* VMOVAPDZ256rrkz_alt */ /* Table6695 */ 0x215a, /* VSQRTPDZ256mkz */ 0x215d, /* VSQRTPDZ256rkz */ /* Table6697 */ 0xbdd, /* VADDPDZ256rmkz */ 0xbe0, /* VADDPDZ256rrkz */ /* Table6699 */ 0x1611, /* VMULPDZ256rmkz */ 0x1614, /* VMULPDZ256rrkz */ /* Table6701 */ 0x21a7, /* VSUBPDZ256rmkz */ 0x21aa, /* VSUBPDZ256rrkz */ /* Table6703 */ 0x13b6, /* VMINPDZ256rmkz */ 0x13b9, /* VMINPDZ256rrkz */ /* Table6705 */ 0xdba, /* VDIVPDZ256rmkz */ 0xdbd, /* VDIVPDZ256rrkz */ /* Table6707 */ 0x134b, /* VMAXPDZ256rmkz */ 0x134e, /* VMAXPDZ256rrkz */ /* Table6709 */ 0x149c, /* VMOVDQA64Z256rmkz */ 0x14a1, /* VMOVDQA64Z256rrkz */ /* Table6711 */ 0x0, /* */ 0x14a2, /* VMOVDQA64Z256rrkz_alt */ /* Table6713 */ 0x16e4, /* VPADDQZ256rmkz */ 0x16e7, /* VPADDQZ256rrkz */ /* Table6715 */ 0x1780, /* VPANDQZ256rmkz */ 0x1783, /* VPANDQZ256rrkz */ /* Table6717 */ 0x1761, /* VPANDNQZ256rmkz */ 0x1764, /* VPANDNQZ256rrkz */ /* Table6719 */ 0x1e2e, /* VPORQZ256rmkz */ 0x1e31, /* VPORQZ256rrkz */ /* Table6721 */ 0x201f, /* VPXORQZ256rmkz */ 0x2022, /* VPXORQZ256rrkz */ /* Table6723 */ 0x1f8d, /* VPSUBQZ256rmkz */ 0x1f90, /* VPSUBQZ256rrkz */ /* Table6725 */ 0x15e1, /* VMOVUPSZrmkz */ 0x15e6, /* VMOVUPSZrrkz */ /* Table6727 */ 0x0, /* */ 0x15e7, /* VMOVUPSZrrkz_alt */ /* Table6729 */ 0x1453, /* VMOVAPSZrmkz */ 0x1458, /* VMOVAPSZrrkz */ /* Table6731 */ 0x0, /* */ 0x1459, /* VMOVAPSZrrkz_alt */ /* Table6733 */ 0x2182, /* VSQRTPSZmkz */ 0x2185, /* VSQRTPSZrkz */ /* Table6735 */ 0xc0b, /* VADDPSZrmkz */ 0xc0e, /* VADDPSZrrkz */ /* Table6737 */ 0x163f, /* VMULPSZrmkz */ 0x1642, /* VMULPSZrrkz */ /* Table6739 */ 0x21d5, /* VSUBPSZrmkz */ 0x21d8, /* VSUBPSZrrkz */ /* Table6741 */ 0x13de, /* VMINPSZrmkz */ 0x13e1, /* VMINPSZrrkz */ /* Table6743 */ 0xde8, /* VDIVPSZrmkz */ 0xdeb, /* VDIVPSZrrkz */ /* Table6745 */ 0x1373, /* VMAXPSZrmkz */ 0x1376, /* VMAXPSZrrkz */ /* Table6747 */ 0x14f1, /* VMOVDQU32Zrmkz */ 0x14f6, /* VMOVDQU32Zrrkz */ /* Table6749 */ 0x0, /* */ 0x14f7, /* VMOVDQU32Zrrkz_alt */ /* Table6751 */ 0x1533, /* VMOVDQU8Zrmkz */ 0x1538, /* VMOVDQU8Zrrkz */ /* Table6753 */ 0x0, /* */ 0x1539, /* VMOVDQU8Zrrkz_alt */ /* Table6755 */ 0x1486, /* VMOVDQA32Zrmkz */ 0x148b, /* VMOVDQA32Zrrkz */ /* Table6757 */ 0x0, /* */ 0x0, /* */ 0x1f0f, /* VPSRLDZmikz */ 0x0, /* */ 0x1ed9, /* VPSRADZmikz */ 0x0, /* */ 0x1e9b, /* VPSLLDZmikz */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f12, /* VPSRLDZrikz */ 0x0, /* */ 0x1edc, /* VPSRADZrikz */ 0x0, /* */ 0x1e9e, /* VPSLLDZrikz */ 0x0, /* */ /* Table6773 */ 0x0, /* */ 0x148c, /* VMOVDQA32Zrrkz_alt */ /* Table6775 */ 0x1f15, /* VPSRLDZrmkz */ 0x1f18, /* VPSRLDZrrkz */ /* Table6777 */ 0x1df2, /* VPMULLWZrmkz */ 0x1df5, /* VPMULLWZrrkz */ /* Table6779 */ 0x1c74, /* VPMINUBZrmkz */ 0x1c77, /* VPMINUBZrrkz */ /* Table6781 */ 0x1734, /* VPANDDZrmkz */ 0x1737, /* VPANDDZrrkz */ /* Table6783 */ 0x1ba8, /* VPMAXUBZrmkz */ 0x1bab, /* VPMAXUBZrrkz */ /* Table6785 */ 0x174f, /* VPANDNDZrmkz */ 0x1752, /* VPANDNDZrrkz */ /* Table6787 */ 0x1edf, /* VPSRADZrmkz */ 0x1ee2, /* VPSRADZrrkz */ /* Table6789 */ 0x1c5e, /* VPMINSWZrmkz */ 0x1c61, /* VPMINSWZrrkz */ /* Table6791 */ 0x1e1c, /* VPORDZrmkz */ 0x1e1f, /* VPORDZrrkz */ /* Table6793 */ 0x1b92, /* VPMAXSWZrmkz */ 0x1b95, /* VPMAXSWZrrkz */ /* Table6795 */ 0x200d, /* VPXORDZrmkz */ 0x2010, /* VPXORDZrrkz */ /* Table6797 */ 0x1ea1, /* VPSLLDZrmkz */ 0x1ea4, /* VPSLLDZrrkz */ /* Table6799 */ 0x1f58, /* VPSUBBZrmkz */ 0x1f5b, /* VPSUBBZrrkz */ /* Table6801 */ 0x1fbc, /* VPSUBWZrmkz */ 0x1fbf, /* VPSUBWZrrkz */ /* Table6803 */ 0x1f77, /* VPSUBDZrmkz */ 0x1f7a, /* VPSUBDZrrkz */ /* Table6805 */ 0x16af, /* VPADDBZrmkz */ 0x16b2, /* VPADDBZrrkz */ /* Table6807 */ 0x1713, /* VPADDWZrmkz */ 0x1716, /* VPADDWZrrkz */ /* Table6809 */ 0x16ce, /* VPADDDZrmkz */ 0x16d1, /* VPADDDZrrkz */ /* Table6811 */ 0x1512, /* VMOVDQU64Zrmkz */ 0x1517, /* VMOVDQU64Zrrkz */ /* Table6813 */ 0x0, /* */ 0x1518, /* VMOVDQU64Zrrkz_alt */ /* Table6815 */ 0x14d0, /* VMOVDQU16Zrmkz */ 0x14d5, /* VMOVDQU16Zrrkz */ /* Table6817 */ 0x0, /* */ 0x14d6, /* VMOVDQU16Zrrkz_alt */ /* Table6819 */ 0x15b8, /* VMOVUPDZrmkz */ 0x15bd, /* VMOVUPDZrrkz */ /* Table6821 */ 0x0, /* */ 0x15be, /* VMOVUPDZrrkz_alt */ /* Table6823 */ 0x142a, /* VMOVAPDZrmkz */ 0x142f, /* VMOVAPDZrrkz */ /* Table6825 */ 0x0, /* */ 0x1430, /* VMOVAPDZrrkz_alt */ /* Table6827 */ 0x2163, /* VSQRTPDZmkz */ 0x2166, /* VSQRTPDZrkz */ /* Table6829 */ 0xbe9, /* VADDPDZrmkz */ 0xbec, /* VADDPDZrrkz */ /* Table6831 */ 0x161d, /* VMULPDZrmkz */ 0x1620, /* VMULPDZrrkz */ /* Table6833 */ 0x21b3, /* VSUBPDZrmkz */ 0x21b6, /* VSUBPDZrrkz */ /* Table6835 */ 0x13bf, /* VMINPDZrmkz */ 0x13c2, /* VMINPDZrrkz */ /* Table6837 */ 0xdc6, /* VDIVPDZrmkz */ 0xdc9, /* VDIVPDZrrkz */ /* Table6839 */ 0x1354, /* VMAXPDZrmkz */ 0x1357, /* VMAXPDZrrkz */ /* Table6841 */ 0x14a7, /* VMOVDQA64Zrmkz */ 0x14ac, /* VMOVDQA64Zrrkz */ /* Table6843 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1ee8, /* VPSRAQZmikz */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eeb, /* VPSRAQZrikz */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table6859 */ 0x0, /* */ 0x0, /* */ 0x1f21, /* VPSRLQZmikz */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1ead, /* VPSLLQZmikz */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1f24, /* VPSRLQZrikz */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1eb0, /* VPSLLQZrikz */ 0x0, /* */ /* Table6875 */ 0x0, /* */ 0x14ad, /* VMOVDQA64Zrrkz_alt */ /* Table6877 */ 0x1f27, /* VPSRLQZrmkz */ 0x1f2a, /* VPSRLQZrrkz */ /* Table6879 */ 0x16ed, /* VPADDQZrmkz */ 0x16f0, /* VPADDQZrrkz */ /* Table6881 */ 0x1789, /* VPANDQZrmkz */ 0x178c, /* VPANDQZrrkz */ /* Table6883 */ 0x176a, /* VPANDNQZrmkz */ 0x176d, /* VPANDNQZrrkz */ /* Table6885 */ 0x1eee, /* VPSRAQZrmkz */ 0x1ef1, /* VPSRAQZrrkz */ /* Table6887 */ 0x1e37, /* VPORQZrmkz */ 0x1e3a, /* VPORQZrrkz */ /* Table6889 */ 0x2028, /* VPXORQZrmkz */ 0x202b, /* VPXORQZrrkz */ /* Table6891 */ 0x1eb3, /* VPSLLQZrmkz */ 0x1eb6, /* VPSLLQZrrkz */ /* Table6893 */ 0x1dff, /* VPMULUDQZrmkz */ 0x1e02, /* VPMULUDQZrrkz */ /* Table6895 */ 0x1f96, /* VPSUBQZrmkz */ 0x1f99, /* VPSUBQZrrkz */ /* Table6897 */ 0x5f9, /* MMX_PSHUFBrm64 */ 0x5fa, /* MMX_PSHUFBrr64 */ /* Table6899 */ 0x5d2, /* MMX_PHADDWrm64 */ 0x5d3, /* MMX_PHADDWrr64 */ /* Table6901 */ 0x5d4, /* MMX_PHADDrm64 */ 0x5d5, /* MMX_PHADDrr64 */ /* Table6903 */ 0x5d0, /* MMX_PHADDSWrm64 */ 0x5d1, /* MMX_PHADDSWrr64 */ /* Table6905 */ 0x5de, /* MMX_PMADDUBSWrm64 */ 0x5df, /* MMX_PMADDUBSWrr64 */ /* Table6907 */ 0x5da, /* MMX_PHSUBWrm64 */ 0x5db, /* MMX_PHSUBWrr64 */ /* Table6909 */ 0x5d6, /* MMX_PHSUBDrm64 */ 0x5d7, /* MMX_PHSUBDrr64 */ /* Table6911 */ 0x5d8, /* MMX_PHSUBSWrm64 */ 0x5d9, /* MMX_PHSUBSWrr64 */ /* Table6913 */ 0x5fd, /* MMX_PSIGNBrm64 */ 0x5fe, /* MMX_PSIGNBrr64 */ /* Table6915 */ 0x601, /* MMX_PSIGNWrm64 */ 0x602, /* MMX_PSIGNWrr64 */ /* Table6917 */ 0x5ff, /* MMX_PSIGNDrm64 */ 0x600, /* MMX_PSIGNDrr64 */ /* Table6919 */ 0x5eb, /* MMX_PMULHRSWrm64 */ 0x5ec, /* MMX_PMULHRSWrr64 */ /* Table6921 */ 0x59d, /* MMX_PABSBrm64 */ 0x59e, /* MMX_PABSBrr64 */ /* Table6923 */ 0x5a1, /* MMX_PABSWrm64 */ 0x5a2, /* MMX_PABSWrr64 */ /* Table6925 */ 0x59f, /* MMX_PABSDrm64 */ 0x5a0, /* MMX_PABSDrr64 */ /* Table6927 */ 0xa6a, /* SHA1NEXTErm */ 0xa6b, /* SHA1NEXTErr */ /* Table6929 */ 0xa66, /* SHA1MSG1rm */ 0xa67, /* SHA1MSG1rr */ /* Table6931 */ 0xa68, /* SHA1MSG2rm */ 0xa69, /* SHA1MSG2rr */ /* Table6933 */ 0xa72, /* SHA256RNDS2rm */ 0xa73, /* SHA256RNDS2rr */ /* Table6935 */ 0xa6e, /* SHA256MSG1rm */ 0xa6f, /* SHA256MSG1rr */ /* Table6937 */ 0xa70, /* SHA256MSG2rm */ 0xa71, /* SHA256MSG2rr */ /* Table6939 */ 0x698, /* MOVBE32rm */ 0x0, /* */ /* Table6941 */ 0x697, /* MOVBE32mr */ 0x0, /* */ /* Table6943 */ 0x8a5, /* PSHUFBrm */ 0x8a6, /* PSHUFBrr */ /* Table6945 */ 0x820, /* PHADDWrm */ 0x821, /* PHADDWrr */ /* Table6947 */ 0x81c, /* PHADDDrm */ 0x81d, /* PHADDDrr */ /* Table6949 */ 0x81e, /* PHADDSWrm128 */ 0x81f, /* PHADDSWrr128 */ /* Table6951 */ 0x836, /* PMADDUBSWrm128 */ 0x837, /* PMADDUBSWrr128 */ /* Table6953 */ 0x828, /* PHSUBWrm */ 0x829, /* PHSUBWrr */ /* Table6955 */ 0x824, /* PHSUBDrm */ 0x825, /* PHSUBDrr */ /* Table6957 */ 0x826, /* PHSUBSWrm128 */ 0x827, /* PHSUBSWrr128 */ /* Table6959 */ 0x8ad, /* PSIGNBrm */ 0x8ae, /* PSIGNBrr */ /* Table6961 */ 0x8b1, /* PSIGNWrm */ 0x8b2, /* PSIGNWrr */ /* Table6963 */ 0x8af, /* PSIGNDrm */ 0x8b0, /* PSIGNDrr */ /* Table6965 */ 0x86d, /* PMULHRSWrm128 */ 0x86e, /* PMULHRSWrr128 */ /* Table6967 */ 0x7be, /* PBLENDVBrm0 */ 0x7bf, /* PBLENDVBrr0 */ /* Table6969 */ 0x107, /* BLENDVPSrm0 */ 0x108, /* BLENDVPSrr0 */ /* Table6971 */ 0x105, /* BLENDVPDrm0 */ 0x106, /* BLENDVPDrr0 */ /* Table6973 */ 0x8df, /* PTESTrm */ 0x8e0, /* PTESTrr */ /* Table6975 */ 0x793, /* PABSBrm128 */ 0x794, /* PABSBrr128 */ /* Table6977 */ 0x797, /* PABSWrm128 */ 0x798, /* PABSWrr128 */ /* Table6979 */ 0x795, /* PABSDrm128 */ 0x796, /* PABSDrr128 */ /* Table6981 */ 0x857, /* PMOVSXBWrm */ 0x858, /* PMOVSXBWrr */ /* Table6983 */ 0x853, /* PMOVSXBDrm */ 0x854, /* PMOVSXBDrr */ /* Table6985 */ 0x855, /* PMOVSXBQrm */ 0x856, /* PMOVSXBQrr */ /* Table6987 */ 0x85b, /* PMOVSXWDrm */ 0x85c, /* PMOVSXWDrr */ /* Table6989 */ 0x85d, /* PMOVSXWQrm */ 0x85e, /* PMOVSXWQrr */ /* Table6991 */ 0x859, /* PMOVSXDQrm */ 0x85a, /* PMOVSXDQrr */ /* Table6993 */ 0x86b, /* PMULDQrm */ 0x86c, /* PMULDQrr */ /* Table6995 */ 0x7c8, /* PCMPEQQrm */ 0x7c9, /* PCMPEQQrr */ /* Table6997 */ 0x6b5, /* MOVNTDQArm */ 0x0, /* */ /* Table6999 */ 0x79d, /* PACKUSDWrm */ 0x79e, /* PACKUSDWrr */ /* Table7001 */ 0x863, /* PMOVZXBWrm */ 0x864, /* PMOVZXBWrr */ /* Table7003 */ 0x85f, /* PMOVZXBDrm */ 0x860, /* PMOVZXBDrr */ /* Table7005 */ 0x861, /* PMOVZXBQrm */ 0x862, /* PMOVZXBQrr */ /* Table7007 */ 0x867, /* PMOVZXWDrm */ 0x868, /* PMOVZXWDrr */ /* Table7009 */ 0x869, /* PMOVZXWQrm */ 0x86a, /* PMOVZXWQrr */ /* Table7011 */ 0x865, /* PMOVZXDQrm */ 0x866, /* PMOVZXDQrr */ /* Table7013 */ 0x7d8, /* PCMPGTQrm */ 0x7d9, /* PCMPGTQrr */ /* Table7015 */ 0x846, /* PMINSBrm */ 0x847, /* PMINSBrr */ /* Table7017 */ 0x848, /* PMINSDrm */ 0x849, /* PMINSDrr */ /* Table7019 */ 0x850, /* PMINUWrm */ 0x851, /* PMINUWrr */ /* Table7021 */ 0x84e, /* PMINUDrm */ 0x84f, /* PMINUDrr */ /* Table7023 */ 0x83a, /* PMAXSBrm */ 0x83b, /* PMAXSBrr */ /* Table7025 */ 0x83c, /* PMAXSDrm */ 0x83d, /* PMAXSDrr */ /* Table7027 */ 0x844, /* PMAXUWrm */ 0x845, /* PMAXUWrr */ /* Table7029 */ 0x842, /* PMAXUDrm */ 0x843, /* PMAXUDrr */ /* Table7031 */ 0x875, /* PMULLDrm */ 0x876, /* PMULLDrr */ /* Table7033 */ 0x822, /* PHMINPOSUWrm128 */ 0x823, /* PHMINPOSUWrr128 */ /* Table7035 */ 0x3ac, /* INVEPT32 */ 0x0, /* */ /* Table7037 */ 0x3b3, /* INVVPID32 */ 0x0, /* */ /* Table7039 */ 0x3b1, /* INVPCID32 */ 0x0, /* */ /* Table7041 */ 0xac, /* AESIMCrm */ 0xad, /* AESIMCrr */ /* Table7043 */ 0xaa, /* AESENCrm */ 0xab, /* AESENCrr */ /* Table7045 */ 0xa8, /* AESENCLASTrm */ 0xa9, /* AESENCLASTrr */ /* Table7047 */ 0xa6, /* AESDECrm */ 0xa7, /* AESDECrr */ /* Table7049 */ 0xa4, /* AESDECLASTrm */ 0xa5, /* AESDECLASTrr */ /* Table7051 */ 0x696, /* MOVBE16rm */ 0x0, /* */ /* Table7053 */ 0x695, /* MOVBE16mr */ 0x0, /* */ /* Table7055 */ 0x46, /* ADCX32rm */ 0x47, /* ADCX32rr */ /* Table7057 */ 0x25e, /* CRC32r32m8 */ 0x261, /* CRC32r32r8 */ /* Table7059 */ 0x25d, /* CRC32r32m32 */ 0x260, /* CRC32r32r32 */ /* Table7061 */ 0xa0, /* ADOX32rm */ 0xa1, /* ADOX32rr */ /* Table7063 */ 0x25c, /* CRC32r32m16 */ 0x25f, /* CRC32r32r16 */ /* Table7065 */ 0x69a, /* MOVBE64rm */ 0x0, /* */ /* Table7067 */ 0x699, /* MOVBE64mr */ 0x0, /* */ /* Table7069 */ 0x3ad, /* INVEPT64 */ 0x0, /* */ /* Table7071 */ 0x3b4, /* INVVPID64 */ 0x0, /* */ /* Table7073 */ 0x3b2, /* INVPCID64 */ 0x0, /* */ /* Table7075 */ 0xa2, /* ADOX64rm */ 0xa3, /* ADOX64rr */ /* Table7077 */ 0x263, /* CRC32r64m8 */ 0x265, /* CRC32r64r8 */ /* Table7079 */ 0x262, /* CRC32r64m64 */ 0x264, /* CRC32r64r64 */ /* Table7081 */ 0x48, /* ADCX64rm */ 0x49, /* ADCX64rr */ /* Table7083 */ 0xd4, /* ANDN32rm */ 0xd5, /* ANDN32rr */ /* Table7085 */ 0x0, /* */ 0x119, /* BLSR32rm */ 0x115, /* BLSMSK32rm */ 0x10d, /* BLSI32rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x11a, /* BLSR32rr */ 0x116, /* BLSMSK32rr */ 0x10e, /* BLSI32rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table7101 */ 0x15d, /* BZHI32rm */ 0x15e, /* BZHI32rr */ /* Table7103 */ 0xe5, /* BEXTR32rm */ 0xe6, /* BEXTR32rr */ /* Table7105 */ 0x7e9, /* PEXT32rm */ 0x7ea, /* PEXT32rr */ /* Table7107 */ 0xa08, /* SARX32rm */ 0xa09, /* SARX32rr */ /* Table7109 */ 0x7e5, /* PDEP32rm */ 0x7e6, /* PDEP32rr */ /* Table7111 */ 0x717, /* MULX32rm */ 0x718, /* MULX32rr */ /* Table7113 */ 0xac0, /* SHRX32rm */ 0xac1, /* SHRX32rr */ /* Table7115 */ 0x1e78, /* VPSHUFBrm */ 0x1e79, /* VPSHUFBrr */ /* Table7117 */ 0x1ada, /* VPHADDWrm */ 0x1adb, /* VPHADDWrr */ /* Table7119 */ 0x1ac2, /* VPHADDDrm */ 0x1ac3, /* VPHADDDrr */ /* Table7121 */ 0x1ac4, /* VPHADDSWrm128 */ 0x1ac6, /* VPHADDSWrr128 */ /* Table7123 */ 0x1b22, /* VPMADDUBSWrm128 */ 0x1b24, /* VPMADDUBSWrr128 */ /* Table7125 */ 0x1aee, /* VPHSUBWrm */ 0x1aef, /* VPHSUBWrr */ /* Table7127 */ 0x1ae4, /* VPHSUBDrm */ 0x1ae5, /* VPHSUBDrr */ /* Table7129 */ 0x1ae6, /* VPHSUBSWrm128 */ 0x1ae8, /* VPHSUBSWrr128 */ /* Table7131 */ 0x1e8a, /* VPSIGNBrm */ 0x1e8b, /* VPSIGNBrr */ /* Table7133 */ 0x1e92, /* VPSIGNWrm */ 0x1e93, /* VPSIGNWrr */ /* Table7135 */ 0x1e8e, /* VPSIGNDrm */ 0x1e8f, /* VPSIGNDrr */ /* Table7137 */ 0x1d9c, /* VPMULHRSWrm128 */ 0x1d9e, /* VPMULHRSWrr128 */ /* Table7139 */ 0x1a61, /* VPERMILPSrm */ 0x1a62, /* VPERMILPSrr */ /* Table7141 */ 0x1a55, /* VPERMILPDrm */ 0x1a56, /* VPERMILPDrr */ /* Table7143 */ 0x21ff, /* VTESTPSrm */ 0x2200, /* VTESTPSrr */ /* Table7145 */ 0x21fb, /* VTESTPDrm */ 0x21fc, /* VTESTPDrr */ /* Table7147 */ 0xd2d, /* VCVTPH2PSrm */ 0xd2e, /* VCVTPH2PSrr */ /* Table7149 */ 0x1fcc, /* VPTESTrm */ 0x1fcd, /* VPTESTrr */ /* Table7151 */ 0xcc3, /* VBROADCASTSSrm */ 0xcc4, /* VBROADCASTSSrr */ /* Table7153 */ 0x1671, /* VPABSBrm128 */ 0x1673, /* VPABSBrr128 */ /* Table7155 */ 0x168b, /* VPABSWrm128 */ 0x168d, /* VPABSWrr128 */ /* Table7157 */ 0x167e, /* VPABSDrm128 */ 0x1680, /* VPABSDrr128 */ /* Table7159 */ 0x1d20, /* VPMOVSXBWrm */ 0x1d21, /* VPMOVSXBWrr */ /* Table7161 */ 0x1d12, /* VPMOVSXBDrm */ 0x1d13, /* VPMOVSXBDrr */ /* Table7163 */ 0x1d1c, /* VPMOVSXBQrm */ 0x1d1d, /* VPMOVSXBQrr */ /* Table7165 */ 0x1d34, /* VPMOVSXWDrm */ 0x1d35, /* VPMOVSXWDrr */ /* Table7167 */ 0x1d3e, /* VPMOVSXWQrm */ 0x1d3f, /* VPMOVSXWQrr */ /* Table7169 */ 0x1d2a, /* VPMOVSXDQrm */ 0x1d2b, /* VPMOVSXDQrr */ /* Table7171 */ 0x1d9a, /* VPMULDQrm */ 0x1d9b, /* VPMULDQrr */ /* Table7173 */ 0x18b9, /* VPCMPEQQrm */ 0x18ba, /* VPCMPEQQrr */ /* Table7175 */ 0x1556, /* VMOVNTDQArm */ 0x0, /* */ /* Table7177 */ 0x1699, /* VPACKUSDWrm */ 0x169a, /* VPACKUSDWrr */ /* Table7179 */ 0x132e, /* VMASKMOVPSrm */ 0x0, /* */ /* Table7181 */ 0x132a, /* VMASKMOVPDrm */ 0x0, /* */ /* Table7183 */ 0x132d, /* VMASKMOVPSmr */ 0x0, /* */ /* Table7185 */ 0x1329, /* VMASKMOVPDmr */ 0x0, /* */ /* Table7187 */ 0x1d6f, /* VPMOVZXBWrm */ 0x1d70, /* VPMOVZXBWrr */ /* Table7189 */ 0x1d61, /* VPMOVZXBDrm */ 0x1d62, /* VPMOVZXBDrr */ /* Table7191 */ 0x1d6b, /* VPMOVZXBQrm */ 0x1d6c, /* VPMOVZXBQrr */ /* Table7193 */ 0x1d83, /* VPMOVZXWDrm */ 0x1d84, /* VPMOVZXWDrr */ /* Table7195 */ 0x1d8d, /* VPMOVZXWQrm */ 0x1d8e, /* VPMOVZXWQrr */ /* Table7197 */ 0x1d79, /* VPMOVZXDQrm */ 0x1d7a, /* VPMOVZXDQrr */ /* Table7199 */ 0x190d, /* VPCMPGTQrm */ 0x190e, /* VPCMPGTQrr */ /* Table7201 */ 0x1c12, /* VPMINSBrm */ 0x1c13, /* VPMINSBrr */ /* Table7203 */ 0x1c31, /* VPMINSDrm */ 0x1c32, /* VPMINSDrr */ /* Table7205 */ 0x1cc8, /* VPMINUWrm */ 0x1cc9, /* VPMINUWrr */ /* Table7207 */ 0x1c97, /* VPMINUDrm */ 0x1c98, /* VPMINUDrr */ /* Table7209 */ 0x1b46, /* VPMAXSBrm */ 0x1b47, /* VPMAXSBrr */ /* Table7211 */ 0x1b65, /* VPMAXSDrm */ 0x1b66, /* VPMAXSDrr */ /* Table7213 */ 0x1bfc, /* VPMAXUWrm */ 0x1bfd, /* VPMAXUWrr */ /* Table7215 */ 0x1bcb, /* VPMAXUDrm */ 0x1bcc, /* VPMAXUDrr */ /* Table7217 */ 0x1dc5, /* VPMULLDrm */ 0x1dc6, /* VPMULLDrr */ /* Table7219 */ 0x1adc, /* VPHMINPOSUWrm128 */ 0x1add, /* VPHMINPOSUWrr128 */ /* Table7221 */ 0x1f36, /* VPSRLVDrm */ 0x1f37, /* VPSRLVDrr */ /* Table7223 */ 0x1efa, /* VPSRAVDrm */ 0x1efb, /* VPSRAVDrr */ /* Table7225 */ 0x1ec2, /* VPSLLVDrm */ 0x1ec3, /* VPSLLVDrr */ /* Table7227 */ 0x1815, /* VPBROADCASTDrm */ 0x1816, /* VPBROADCASTDrr */ /* Table7229 */ 0x182c, /* VPBROADCASTQrm */ 0x182d, /* VPBROADCASTQrr */ /* Table7231 */ 0x1804, /* VPBROADCASTBrm */ 0x1805, /* VPBROADCASTBrr */ /* Table7233 */ 0x1839, /* VPBROADCASTWrm */ 0x183a, /* VPBROADCASTWrr */ /* Table7235 */ 0x1b2d, /* VPMASKMOVDrm */ 0x0, /* */ /* Table7237 */ 0x1b2c, /* VPMASKMOVDmr */ 0x0, /* */ /* Table7239 */ 0x1aae, /* VPGATHERDDrm */ 0x0, /* */ /* Table7241 */ 0x1ab4, /* VPGATHERQDrm */ 0x0, /* */ /* Table7243 */ 0x12eb, /* VGATHERDPSrm */ 0x0, /* */ /* Table7245 */ 0x12f9, /* VGATHERQPSrm */ 0x0, /* */ /* Table7247 */ 0xfbc, /* VFMADDSUBPSr132m */ 0xfbe, /* VFMADDSUBPSr132r */ /* Table7249 */ 0x106e, /* VFMSUBADDPSr132m */ 0x1070, /* VFMSUBADDPSr132r */ /* Table7251 */ 0xef8, /* VFMADDPSr132m */ 0xefa, /* VFMADDPSr132r */ /* Table7253 */ 0xf1c, /* VFMADDSSr132m */ 0xf1d, /* VFMADDSSr132r */ /* Table7255 */ 0x1108, /* VFMSUBPSr132m */ 0x110a, /* VFMSUBPSr132r */ /* Table7257 */ 0x112c, /* VFMSUBSSr132m */ 0x112d, /* VFMSUBSSr132r */ /* Table7259 */ 0x11cc, /* VFNMADDPSr132m */ 0x11ce, /* VFNMADDPSr132r */ /* Table7261 */ 0x11f0, /* VFNMADDSSr132m */ 0x11f1, /* VFNMADDSSr132r */ /* Table7263 */ 0x1290, /* VFNMSUBPSr132m */ 0x1292, /* VFNMSUBPSr132r */ /* Table7265 */ 0x12b4, /* VFNMSUBSSr132m */ 0x12b5, /* VFNMSUBSSr132r */ /* Table7267 */ 0xfc0, /* VFMADDSUBPSr213m */ 0xfc2, /* VFMADDSUBPSr213r */ /* Table7269 */ 0x1072, /* VFMSUBADDPSr213m */ 0x1074, /* VFMSUBADDPSr213r */ /* Table7271 */ 0xefc, /* VFMADDPSr213m */ 0xefe, /* VFMADDPSr213r */ /* Table7273 */ 0xf1e, /* VFMADDSSr213m */ 0xf1f, /* VFMADDSSr213r */ /* Table7275 */ 0x110c, /* VFMSUBPSr213m */ 0x110e, /* VFMSUBPSr213r */ /* Table7277 */ 0x112e, /* VFMSUBSSr213m */ 0x112f, /* VFMSUBSSr213r */ /* Table7279 */ 0x11d0, /* VFNMADDPSr213m */ 0x11d2, /* VFNMADDPSr213r */ /* Table7281 */ 0x11f2, /* VFNMADDSSr213m */ 0x11f3, /* VFNMADDSSr213r */ /* Table7283 */ 0x1294, /* VFNMSUBPSr213m */ 0x1296, /* VFNMSUBPSr213r */ /* Table7285 */ 0x12b6, /* VFNMSUBSSr213m */ 0x12b7, /* VFNMSUBSSr213r */ /* Table7287 */ 0xfc4, /* VFMADDSUBPSr231m */ 0xfc6, /* VFMADDSUBPSr231r */ /* Table7289 */ 0x1076, /* VFMSUBADDPSr231m */ 0x1078, /* VFMSUBADDPSr231r */ /* Table7291 */ 0xf00, /* VFMADDPSr231m */ 0xf02, /* VFMADDPSr231r */ /* Table7293 */ 0xf20, /* VFMADDSSr231m */ 0xf21, /* VFMADDSSr231r */ /* Table7295 */ 0x1110, /* VFMSUBPSr231m */ 0x1112, /* VFMSUBPSr231r */ /* Table7297 */ 0x1130, /* VFMSUBSSr231m */ 0x1131, /* VFMSUBSSr231r */ /* Table7299 */ 0x11d4, /* VFNMADDPSr231m */ 0x11d6, /* VFNMADDPSr231r */ /* Table7301 */ 0x11f4, /* VFNMADDSSr231m */ 0x11f5, /* VFNMADDSSr231r */ /* Table7303 */ 0x1298, /* VFNMSUBPSr231m */ 0x129a, /* VFNMSUBPSr231r */ /* Table7305 */ 0x12b8, /* VFNMSUBSSr231m */ 0x12b9, /* VFNMSUBSSr231r */ /* Table7307 */ 0xc3f, /* VAESIMCrm */ 0xc40, /* VAESIMCrr */ /* Table7309 */ 0xc3d, /* VAESENCrm */ 0xc3e, /* VAESENCrr */ /* Table7311 */ 0xc3b, /* VAESENCLASTrm */ 0xc3c, /* VAESENCLASTrr */ /* Table7313 */ 0xc39, /* VAESDECrm */ 0xc3a, /* VAESDECrr */ /* Table7315 */ 0xc37, /* VAESDECLASTrm */ 0xc38, /* VAESDECLASTrr */ /* Table7317 */ 0xa98, /* SHLX32rm */ 0xa99, /* SHLX32rr */ /* Table7319 */ 0xd6, /* ANDN64rm */ 0xd7, /* ANDN64rr */ /* Table7321 */ 0x0, /* */ 0x11b, /* BLSR64rm */ 0x117, /* BLSMSK64rm */ 0x10f, /* BLSI64rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x11c, /* BLSR64rr */ 0x118, /* BLSMSK64rr */ 0x110, /* BLSI64rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table7337 */ 0x15f, /* BZHI64rm */ 0x160, /* BZHI64rr */ /* Table7339 */ 0xe7, /* BEXTR64rm */ 0xe8, /* BEXTR64rr */ /* Table7341 */ 0x7eb, /* PEXT64rm */ 0x7ec, /* PEXT64rr */ /* Table7343 */ 0xa0a, /* SARX64rm */ 0xa0b, /* SARX64rr */ /* Table7345 */ 0x7e7, /* PDEP64rm */ 0x7e8, /* PDEP64rr */ /* Table7347 */ 0x719, /* MULX64rm */ 0x71a, /* MULX64rr */ /* Table7349 */ 0xac2, /* SHRX64rm */ 0xac3, /* SHRX64rr */ /* Table7351 */ 0x1f40, /* VPSRLVQrm */ 0x1f41, /* VPSRLVQrr */ /* Table7353 */ 0x1ecc, /* VPSLLVQrm */ 0x1ecd, /* VPSLLVQrr */ /* Table7355 */ 0x1b31, /* VPMASKMOVQrm */ 0x0, /* */ /* Table7357 */ 0x1b30, /* VPMASKMOVQmr */ 0x0, /* */ /* Table7359 */ 0x1ab1, /* VPGATHERDQrm */ 0x0, /* */ /* Table7361 */ 0x1ab7, /* VPGATHERQQrm */ 0x0, /* */ /* Table7363 */ 0x12e8, /* VGATHERDPDrm */ 0x0, /* */ /* Table7365 */ 0x12f6, /* VGATHERQPDrm */ 0x0, /* */ /* Table7367 */ 0xf6f, /* VFMADDSUBPDr132m */ 0xf71, /* VFMADDSUBPDr132r */ /* Table7369 */ 0x1021, /* VFMSUBADDPDr132m */ 0x1023, /* VFMSUBADDPDr132r */ /* Table7371 */ 0xeab, /* VFMADDPDr132m */ 0xead, /* VFMADDPDr132r */ /* Table7373 */ 0xf0d, /* VFMADDSDr132m */ 0xf0e, /* VFMADDSDr132r */ /* Table7375 */ 0x10bb, /* VFMSUBPDr132m */ 0x10bd, /* VFMSUBPDr132r */ /* Table7377 */ 0x111d, /* VFMSUBSDr132m */ 0x111e, /* VFMSUBSDr132r */ /* Table7379 */ 0x117f, /* VFNMADDPDr132m */ 0x1181, /* VFNMADDPDr132r */ /* Table7381 */ 0x11e1, /* VFNMADDSDr132m */ 0x11e2, /* VFNMADDSDr132r */ /* Table7383 */ 0x1243, /* VFNMSUBPDr132m */ 0x1245, /* VFNMSUBPDr132r */ /* Table7385 */ 0x12a5, /* VFNMSUBSDr132m */ 0x12a6, /* VFNMSUBSDr132r */ /* Table7387 */ 0xf73, /* VFMADDSUBPDr213m */ 0xf75, /* VFMADDSUBPDr213r */ /* Table7389 */ 0x1025, /* VFMSUBADDPDr213m */ 0x1027, /* VFMSUBADDPDr213r */ /* Table7391 */ 0xeaf, /* VFMADDPDr213m */ 0xeb1, /* VFMADDPDr213r */ /* Table7393 */ 0xf0f, /* VFMADDSDr213m */ 0xf10, /* VFMADDSDr213r */ /* Table7395 */ 0x10bf, /* VFMSUBPDr213m */ 0x10c1, /* VFMSUBPDr213r */ /* Table7397 */ 0x111f, /* VFMSUBSDr213m */ 0x1120, /* VFMSUBSDr213r */ /* Table7399 */ 0x1183, /* VFNMADDPDr213m */ 0x1185, /* VFNMADDPDr213r */ /* Table7401 */ 0x11e3, /* VFNMADDSDr213m */ 0x11e4, /* VFNMADDSDr213r */ /* Table7403 */ 0x1247, /* VFNMSUBPDr213m */ 0x1249, /* VFNMSUBPDr213r */ /* Table7405 */ 0x12a7, /* VFNMSUBSDr213m */ 0x12a8, /* VFNMSUBSDr213r */ /* Table7407 */ 0xf77, /* VFMADDSUBPDr231m */ 0xf79, /* VFMADDSUBPDr231r */ /* Table7409 */ 0x1029, /* VFMSUBADDPDr231m */ 0x102b, /* VFMSUBADDPDr231r */ /* Table7411 */ 0xeb3, /* VFMADDPDr231m */ 0xeb5, /* VFMADDPDr231r */ /* Table7413 */ 0xf11, /* VFMADDSDr231m */ 0xf12, /* VFMADDSDr231r */ /* Table7415 */ 0x10c3, /* VFMSUBPDr231m */ 0x10c5, /* VFMSUBPDr231r */ /* Table7417 */ 0x1121, /* VFMSUBSDr231m */ 0x1122, /* VFMSUBSDr231r */ /* Table7419 */ 0x1187, /* VFNMADDPDr231m */ 0x1189, /* VFNMADDPDr231r */ /* Table7421 */ 0x11e5, /* VFNMADDSDr231m */ 0x11e6, /* VFNMADDSDr231r */ /* Table7423 */ 0x124b, /* VFNMSUBPDr231m */ 0x124d, /* VFNMSUBPDr231r */ /* Table7425 */ 0x12a9, /* VFNMSUBSDr231m */ 0x12aa, /* VFNMSUBSDr231r */ /* Table7427 */ 0xa9a, /* SHLX64rm */ 0xa9b, /* SHLX64rr */ /* Table7429 */ 0x1e76, /* VPSHUFBYrm */ 0x1e77, /* VPSHUFBYrr */ /* Table7431 */ 0x1ad8, /* VPHADDWYrm */ 0x1ad9, /* VPHADDWYrr */ /* Table7433 */ 0x1ac0, /* VPHADDDYrm */ 0x1ac1, /* VPHADDDYrr */ /* Table7435 */ 0x1ac5, /* VPHADDSWrm256 */ 0x1ac7, /* VPHADDSWrr256 */ /* Table7437 */ 0x1b23, /* VPMADDUBSWrm256 */ 0x1b25, /* VPMADDUBSWrr256 */ /* Table7439 */ 0x1aec, /* VPHSUBWYrm */ 0x1aed, /* VPHSUBWYrr */ /* Table7441 */ 0x1ae2, /* VPHSUBDYrm */ 0x1ae3, /* VPHSUBDYrr */ /* Table7443 */ 0x1ae7, /* VPHSUBSWrm256 */ 0x1ae9, /* VPHSUBSWrr256 */ /* Table7445 */ 0x1e88, /* VPSIGNBYrm */ 0x1e89, /* VPSIGNBYrr */ /* Table7447 */ 0x1e90, /* VPSIGNWYrm */ 0x1e91, /* VPSIGNWYrr */ /* Table7449 */ 0x1e8c, /* VPSIGNDYrm */ 0x1e8d, /* VPSIGNDYrr */ /* Table7451 */ 0x1d9d, /* VPMULHRSWrm256 */ 0x1d9f, /* VPMULHRSWrr256 */ /* Table7453 */ 0x1a59, /* VPERMILPSYrm */ 0x1a5a, /* VPERMILPSYrr */ /* Table7455 */ 0x1a4d, /* VPERMILPDYrm */ 0x1a4e, /* VPERMILPDYrr */ /* Table7457 */ 0x21fd, /* VTESTPSYrm */ 0x21fe, /* VTESTPSYrr */ /* Table7459 */ 0x21f9, /* VTESTPDYrm */ 0x21fa, /* VTESTPDYrr */ /* Table7461 */ 0xd29, /* VCVTPH2PSYrm */ 0xd2a, /* VCVTPH2PSYrr */ /* Table7463 */ 0x1a69, /* VPERMPSYrm */ 0x1a6a, /* VPERMPSYrr */ /* Table7465 */ 0x1fca, /* VPTESTYrm */ 0x1fcb, /* VPTESTYrr */ /* Table7467 */ 0xcaf, /* VBROADCASTSSYrm */ 0xcb0, /* VBROADCASTSSYrr */ /* Table7469 */ 0xca1, /* VBROADCASTSDYrm */ 0xca2, /* VBROADCASTSDYrr */ /* Table7471 */ 0xc9c, /* VBROADCASTF128 */ 0x0, /* */ /* Table7473 */ 0x1672, /* VPABSBrm256 */ 0x1674, /* VPABSBrr256 */ /* Table7475 */ 0x168c, /* VPABSWrm256 */ 0x168e, /* VPABSWrr256 */ /* Table7477 */ 0x167f, /* VPABSDrm256 */ 0x1681, /* VPABSDrr256 */ /* Table7479 */ 0x1d1e, /* VPMOVSXBWYrm */ 0x1d1f, /* VPMOVSXBWYrr */ /* Table7481 */ 0x1d0a, /* VPMOVSXBDYrm */ 0x1d0b, /* VPMOVSXBDYrr */ /* Table7483 */ 0x1d14, /* VPMOVSXBQYrm */ 0x1d15, /* VPMOVSXBQYrr */ /* Table7485 */ 0x1d2c, /* VPMOVSXWDYrm */ 0x1d2d, /* VPMOVSXWDYrr */ /* Table7487 */ 0x1d36, /* VPMOVSXWQYrm */ 0x1d37, /* VPMOVSXWQYrr */ /* Table7489 */ 0x1d22, /* VPMOVSXDQYrm */ 0x1d23, /* VPMOVSXDQYrr */ /* Table7491 */ 0x1d8f, /* VPMULDQYrm */ 0x1d90, /* VPMULDQYrr */ /* Table7493 */ 0x18a5, /* VPCMPEQQYrm */ 0x18a6, /* VPCMPEQQYrr */ /* Table7495 */ 0x1552, /* VMOVNTDQAYrm */ 0x0, /* */ /* Table7497 */ 0x1697, /* VPACKUSDWYrm */ 0x1698, /* VPACKUSDWYrr */ /* Table7499 */ 0x132c, /* VMASKMOVPSYrm */ 0x0, /* */ /* Table7501 */ 0x1328, /* VMASKMOVPDYrm */ 0x0, /* */ /* Table7503 */ 0x132b, /* VMASKMOVPSYmr */ 0x0, /* */ /* Table7505 */ 0x1327, /* VMASKMOVPDYmr */ 0x0, /* */ /* Table7507 */ 0x1d6d, /* VPMOVZXBWYrm */ 0x1d6e, /* VPMOVZXBWYrr */ /* Table7509 */ 0x1d59, /* VPMOVZXBDYrm */ 0x1d5a, /* VPMOVZXBDYrr */ /* Table7511 */ 0x1d63, /* VPMOVZXBQYrm */ 0x1d64, /* VPMOVZXBQYrr */ /* Table7513 */ 0x1d7b, /* VPMOVZXWDYrm */ 0x1d7c, /* VPMOVZXWDYrr */ /* Table7515 */ 0x1d85, /* VPMOVZXWQYrm */ 0x1d86, /* VPMOVZXWQYrr */ /* Table7517 */ 0x1d71, /* VPMOVZXDQYrm */ 0x1d72, /* VPMOVZXDQYrr */ /* Table7519 */ 0x1a23, /* VPERMDYrm */ 0x1a24, /* VPERMDYrr */ /* Table7521 */ 0x18f9, /* VPCMPGTQYrm */ 0x18fa, /* VPCMPGTQYrr */ /* Table7523 */ 0x1bfe, /* VPMINSBYrm */ 0x1bff, /* VPMINSBYrr */ /* Table7525 */ 0x1c14, /* VPMINSDYrm */ 0x1c15, /* VPMINSDYrr */ /* Table7527 */ 0x1cb4, /* VPMINUWYrm */ 0x1cb5, /* VPMINUWYrr */ /* Table7529 */ 0x1c7a, /* VPMINUDYrm */ 0x1c7b, /* VPMINUDYrr */ /* Table7531 */ 0x1b32, /* VPMAXSBYrm */ 0x1b33, /* VPMAXSBYrr */ /* Table7533 */ 0x1b48, /* VPMAXSDYrm */ 0x1b49, /* VPMAXSDYrr */ /* Table7535 */ 0x1be8, /* VPMAXUWYrm */ 0x1be9, /* VPMAXUWYrr */ /* Table7537 */ 0x1bae, /* VPMAXUDYrm */ 0x1baf, /* VPMAXUDYrr */ /* Table7539 */ 0x1da8, /* VPMULLDYrm */ 0x1da9, /* VPMULLDYrr */ /* Table7541 */ 0x1f2e, /* VPSRLVDYrm */ 0x1f2f, /* VPSRLVDYrr */ /* Table7543 */ 0x1ef2, /* VPSRAVDYrm */ 0x1ef3, /* VPSRAVDYrr */ /* Table7545 */ 0x1eba, /* VPSLLVDYrm */ 0x1ebb, /* VPSLLVDYrr */ /* Table7547 */ 0x1806, /* VPBROADCASTDYrm */ 0x1807, /* VPBROADCASTDYrr */ /* Table7549 */ 0x181d, /* VPBROADCASTQYrm */ 0x181e, /* VPBROADCASTQYrr */ /* Table7551 */ 0x17f9, /* VPBROADCASTBYrm */ 0x17fa, /* VPBROADCASTBYrr */ /* Table7553 */ 0x182e, /* VPBROADCASTWYrm */ 0x182f, /* VPBROADCASTWYrr */ /* Table7555 */ 0x1b2b, /* VPMASKMOVDYrm */ 0x0, /* */ /* Table7557 */ 0x1b2a, /* VPMASKMOVDYmr */ 0x0, /* */ /* Table7559 */ 0x1aac, /* VPGATHERDDYrm */ 0x0, /* */ /* Table7561 */ 0x1ab2, /* VPGATHERQDYrm */ 0x0, /* */ /* Table7563 */ 0x12e9, /* VGATHERDPSYrm */ 0x0, /* */ /* Table7565 */ 0x12f7, /* VGATHERQPSYrm */ 0x0, /* */ /* Table7567 */ 0xfbd, /* VFMADDSUBPSr132mY */ 0xfbf, /* VFMADDSUBPSr132rY */ /* Table7569 */ 0x106f, /* VFMSUBADDPSr132mY */ 0x1071, /* VFMSUBADDPSr132rY */ /* Table7571 */ 0xef9, /* VFMADDPSr132mY */ 0xefb, /* VFMADDPSr132rY */ /* Table7573 */ 0x1109, /* VFMSUBPSr132mY */ 0x110b, /* VFMSUBPSr132rY */ /* Table7575 */ 0x11cd, /* VFNMADDPSr132mY */ 0x11cf, /* VFNMADDPSr132rY */ /* Table7577 */ 0x1291, /* VFNMSUBPSr132mY */ 0x1293, /* VFNMSUBPSr132rY */ /* Table7579 */ 0xfc1, /* VFMADDSUBPSr213mY */ 0xfc3, /* VFMADDSUBPSr213rY */ /* Table7581 */ 0x1073, /* VFMSUBADDPSr213mY */ 0x1075, /* VFMSUBADDPSr213rY */ /* Table7583 */ 0xefd, /* VFMADDPSr213mY */ 0xeff, /* VFMADDPSr213rY */ /* Table7585 */ 0x110d, /* VFMSUBPSr213mY */ 0x110f, /* VFMSUBPSr213rY */ /* Table7587 */ 0x11d1, /* VFNMADDPSr213mY */ 0x11d3, /* VFNMADDPSr213rY */ /* Table7589 */ 0x1295, /* VFNMSUBPSr213mY */ 0x1297, /* VFNMSUBPSr213rY */ /* Table7591 */ 0xfc5, /* VFMADDSUBPSr231mY */ 0xfc7, /* VFMADDSUBPSr231rY */ /* Table7593 */ 0x1077, /* VFMSUBADDPSr231mY */ 0x1079, /* VFMSUBADDPSr231rY */ /* Table7595 */ 0xf01, /* VFMADDPSr231mY */ 0xf03, /* VFMADDPSr231rY */ /* Table7597 */ 0x1111, /* VFMSUBPSr231mY */ 0x1113, /* VFMSUBPSr231rY */ /* Table7599 */ 0x11d5, /* VFNMADDPSr231mY */ 0x11d7, /* VFNMADDPSr231rY */ /* Table7601 */ 0x1299, /* VFNMSUBPSr231mY */ 0x129b, /* VFNMSUBPSr231rY */ /* Table7603 */ 0x1f38, /* VPSRLVQYrm */ 0x1f39, /* VPSRLVQYrr */ /* Table7605 */ 0x1ec4, /* VPSLLVQYrm */ 0x1ec5, /* VPSLLVQYrr */ /* Table7607 */ 0x1b2f, /* VPMASKMOVQYrm */ 0x0, /* */ /* Table7609 */ 0x1b2e, /* VPMASKMOVQYmr */ 0x0, /* */ /* Table7611 */ 0x1aaf, /* VPGATHERDQYrm */ 0x0, /* */ /* Table7613 */ 0x1ab5, /* VPGATHERQQYrm */ 0x0, /* */ /* Table7615 */ 0x12e6, /* VGATHERDPDYrm */ 0x0, /* */ /* Table7617 */ 0x12f4, /* VGATHERQPDYrm */ 0x0, /* */ /* Table7619 */ 0xf70, /* VFMADDSUBPDr132mY */ 0xf72, /* VFMADDSUBPDr132rY */ /* Table7621 */ 0x1022, /* VFMSUBADDPDr132mY */ 0x1024, /* VFMSUBADDPDr132rY */ /* Table7623 */ 0xeac, /* VFMADDPDr132mY */ 0xeae, /* VFMADDPDr132rY */ /* Table7625 */ 0x10bc, /* VFMSUBPDr132mY */ 0x10be, /* VFMSUBPDr132rY */ /* Table7627 */ 0x1180, /* VFNMADDPDr132mY */ 0x1182, /* VFNMADDPDr132rY */ /* Table7629 */ 0x1244, /* VFNMSUBPDr132mY */ 0x1246, /* VFNMSUBPDr132rY */ /* Table7631 */ 0xf74, /* VFMADDSUBPDr213mY */ 0xf76, /* VFMADDSUBPDr213rY */ /* Table7633 */ 0x1026, /* VFMSUBADDPDr213mY */ 0x1028, /* VFMSUBADDPDr213rY */ /* Table7635 */ 0xeb0, /* VFMADDPDr213mY */ 0xeb2, /* VFMADDPDr213rY */ /* Table7637 */ 0x10c0, /* VFMSUBPDr213mY */ 0x10c2, /* VFMSUBPDr213rY */ /* Table7639 */ 0x1184, /* VFNMADDPDr213mY */ 0x1186, /* VFNMADDPDr213rY */ /* Table7641 */ 0x1248, /* VFNMSUBPDr213mY */ 0x124a, /* VFNMSUBPDr213rY */ /* Table7643 */ 0xf78, /* VFMADDSUBPDr231mY */ 0xf7a, /* VFMADDSUBPDr231rY */ /* Table7645 */ 0x102a, /* VFMSUBADDPDr231mY */ 0x102c, /* VFMSUBADDPDr231rY */ /* Table7647 */ 0xeb4, /* VFMADDPDr231mY */ 0xeb6, /* VFMADDPDr231rY */ /* Table7649 */ 0x10c4, /* VFMSUBPDr231mY */ 0x10c6, /* VFMSUBPDr231rY */ /* Table7651 */ 0x1188, /* VFNMADDPDr231mY */ 0x118a, /* VFNMADDPDr231rY */ /* Table7653 */ 0x124c, /* VFNMSUBPDr231mY */ 0x124e, /* VFNMSUBPDr231rY */ /* Table7655 */ 0x0, /* */ 0x1cd4, /* VPMOVM2BZ128rr */ /* Table7657 */ 0x0, /* */ 0x1cd7, /* VPMOVM2DZ128rr */ /* Table7659 */ 0x0, /* */ 0x181a, /* VPBROADCASTMW2DZ128rr */ /* Table7661 */ 0xcb1, /* VBROADCASTSSZ128m */ 0xcb4, /* VBROADCASTSSZ128r */ /* Table7663 */ 0x1553, /* VMOVNTDQAZ128rm */ 0x0, /* */ /* Table7665 */ 0x1c00, /* VPMINSBZ128rm */ 0x1c03, /* VPMINSBZ128rr */ /* Table7667 */ 0x1c16, /* VPMINSDZ128rm */ 0x1c1c, /* VPMINSDZ128rr */ /* Table7669 */ 0x1cb6, /* VPMINUWZ128rm */ 0x1cb9, /* VPMINUWZ128rr */ /* Table7671 */ 0x1c7c, /* VPMINUDZ128rm */ 0x1c82, /* VPMINUDZ128rr */ /* Table7673 */ 0x1b34, /* VPMAXSBZ128rm */ 0x1b37, /* VPMAXSBZ128rr */ /* Table7675 */ 0x1b4a, /* VPMAXSDZ128rm */ 0x1b50, /* VPMAXSDZ128rr */ /* Table7677 */ 0x1bea, /* VPMAXUWZ128rm */ 0x1bed, /* VPMAXUWZ128rr */ /* Table7679 */ 0x1bb0, /* VPMAXUDZ128rm */ 0x1bb6, /* VPMAXUDZ128rr */ /* Table7681 */ 0x1daa, /* VPMULLDZ128rm */ 0x1db0, /* VPMULLDZ128rr */ /* Table7683 */ 0x204b, /* VRCP14PSZ128m */ 0x2051, /* VRCP14PSZ128r */ /* Table7685 */ 0x2068, /* VRCP14SSrm */ 0x2069, /* VRCP14SSrr */ /* Table7687 */ 0x20de, /* VRSQRT14PSZ128m */ 0x20e4, /* VRSQRT14PSZ128r */ /* Table7689 */ 0x20fb, /* VRSQRT14SSrm */ 0x20fc, /* VRSQRT14SSrr */ /* Table7691 */ 0x17af, /* VPBLENDMDZ128rm */ 0x17b4, /* VPBLENDMDZ128rr */ /* Table7693 */ 0xc74, /* VBLENDMPSZ128rm */ 0xc79, /* VBLENDMPSZ128rr */ /* Table7695 */ 0x179d, /* VPBLENDMBZ128rm */ 0x17a0, /* VPBLENDMBZ128rr */ /* Table7697 */ 0x0, /* */ 0x17fb, /* VPBROADCASTBrZ128r */ /* Table7699 */ 0x0, /* */ 0x1830, /* VPBROADCASTWrZ128r */ /* Table7701 */ 0x0, /* */ 0x180c, /* VPBROADCASTDrZ128r */ /* Table7703 */ 0xf28, /* VFMADDSUB132PSZ128m */ 0x0, /* */ /* Table7705 */ 0xfda, /* VFMSUBADD132PSZ128m */ 0x0, /* */ /* Table7707 */ 0xe64, /* VFMADD132PSZ128m */ 0x0, /* */ /* Table7709 */ 0xfce, /* VFMSUB132PSZ128m */ 0x0, /* */ /* Table7711 */ 0x1138, /* VFNMADD132PSZ128m */ 0x0, /* */ /* Table7713 */ 0x11fc, /* VFNMSUB132PSZ128m */ 0x0, /* */ /* Table7715 */ 0xf83, /* VFMADDSUBPSZ128v213rm */ 0xf89, /* VFMADDSUBPSZ128v213rr */ /* Table7717 */ 0x1035, /* VFMSUBADDPSZ128v213rm */ 0x103b, /* VFMSUBADDPSZ128v213rr */ /* Table7719 */ 0xebf, /* VFMADDPSZ128v213rm */ 0xec5, /* VFMADDPSZ128v213rr */ /* Table7721 */ 0xf1a, /* VFMADDSSZm */ 0xf1b, /* VFMADDSSZr */ /* Table7723 */ 0x10cf, /* VFMSUBPSZ128v213rm */ 0x10d5, /* VFMSUBPSZ128v213rr */ /* Table7725 */ 0x112a, /* VFMSUBSSZm */ 0x112b, /* VFMSUBSSZr */ /* Table7727 */ 0x1193, /* VFNMADDPSZ128v213rm */ 0x1199, /* VFNMADDPSZ128v213rr */ /* Table7729 */ 0x11ee, /* VFNMADDSSZm */ 0x11ef, /* VFNMADDSSZr */ /* Table7731 */ 0x1257, /* VFNMSUBPSZ128v213rm */ 0x125d, /* VFNMSUBPSZ128v213rr */ /* Table7733 */ 0x12b2, /* VFNMSUBSSZm */ 0x12b3, /* VFNMSUBSSZr */ /* Table7735 */ 0xf8c, /* VFMADDSUBPSZ128v231rm */ 0xf92, /* VFMADDSUBPSZ128v231rr */ /* Table7737 */ 0x103e, /* VFMSUBADDPSZ128v231rm */ 0x1044, /* VFMSUBADDPSZ128v231rr */ /* Table7739 */ 0xec8, /* VFMADDPSZ128v231rm */ 0xece, /* VFMADDPSZ128v231rr */ /* Table7741 */ 0x10d8, /* VFMSUBPSZ128v231rm */ 0x10de, /* VFMSUBPSZ128v231rr */ /* Table7743 */ 0x119c, /* VFNMADDPSZ128v231rm */ 0x11a2, /* VFNMADDPSZ128v231rr */ /* Table7745 */ 0x1260, /* VFNMSUBPSZ128v231rm */ 0x1266, /* VFNMSUBPSZ128v231rr */ /* Table7747 */ 0x208b, /* VRCP28SSm */ 0x208e, /* VRCP28SSr */ /* Table7749 */ 0x211e, /* VRSQRT28SSm */ 0x2121, /* VRSQRT28SSr */ /* Table7751 */ 0x0, /* */ 0x1cdd, /* VPMOVM2WZ128rr */ /* Table7753 */ 0x0, /* */ 0x1817, /* VPBROADCASTMB2QZ128rr */ /* Table7755 */ 0x0, /* */ 0x1cda, /* VPMOVM2QZ128rr */ /* Table7757 */ 0x18a7, /* VPCMPEQQZ128rm */ 0x18ab, /* VPCMPEQQZ128rr */ /* Table7759 */ 0x18fb, /* VPCMPGTQZ128rm */ 0x18ff, /* VPCMPGTQZ128rr */ /* Table7761 */ 0x1c33, /* VPMINSQZ128rm */ 0x1c39, /* VPMINSQZ128rr */ /* Table7763 */ 0x1c99, /* VPMINUQZ128rm */ 0x1c9f, /* VPMINUQZ128rr */ /* Table7765 */ 0x1b67, /* VPMAXSQZ128rm */ 0x1b6d, /* VPMAXSQZ128rr */ /* Table7767 */ 0x1bcd, /* VPMAXUQZ128rm */ 0x1bd3, /* VPMAXUQZ128rr */ /* Table7769 */ 0x1dc7, /* VPMULLQZ128rm */ 0x1dcd, /* VPMULLQZ128rr */ /* Table7771 */ 0x2030, /* VRCP14PDZ128m */ 0x2036, /* VRCP14PDZ128r */ /* Table7773 */ 0x2066, /* VRCP14SDrm */ 0x2067, /* VRCP14SDrr */ /* Table7775 */ 0x20c3, /* VRSQRT14PDZ128m */ 0x20c9, /* VRSQRT14PDZ128r */ /* Table7777 */ 0x20f9, /* VRSQRT14SDrm */ 0x20fa, /* VRSQRT14SDrr */ /* Table7779 */ 0x17c7, /* VPBLENDMQZ128rm */ 0x17cc, /* VPBLENDMQZ128rr */ /* Table7781 */ 0xc5c, /* VBLENDMPDZ128rm */ 0xc61, /* VBLENDMPDZ128rr */ /* Table7783 */ 0x17df, /* VPBLENDMWZ128rm */ 0x17e2, /* VPBLENDMWZ128rr */ /* Table7785 */ 0x0, /* */ 0x1823, /* VPBROADCASTQrZ128r */ /* Table7787 */ 0xf22, /* VFMADDSUB132PDZ128m */ 0x0, /* */ /* Table7789 */ 0xfd4, /* VFMSUBADD132PDZ128m */ 0x0, /* */ /* Table7791 */ 0xe5e, /* VFMADD132PDZ128m */ 0x0, /* */ /* Table7793 */ 0xfc8, /* VFMSUB132PDZ128m */ 0x0, /* */ /* Table7795 */ 0x1132, /* VFNMADD132PDZ128m */ 0x0, /* */ /* Table7797 */ 0x11f6, /* VFNMSUB132PDZ128m */ 0x0, /* */ /* Table7799 */ 0xf36, /* VFMADDSUBPDZ128v213rm */ 0xf3c, /* VFMADDSUBPDZ128v213rr */ /* Table7801 */ 0xfe8, /* VFMSUBADDPDZ128v213rm */ 0xfee, /* VFMSUBADDPDZ128v213rr */ /* Table7803 */ 0xe72, /* VFMADDPDZ128v213rm */ 0xe78, /* VFMADDPDZ128v213rr */ /* Table7805 */ 0xf0b, /* VFMADDSDZm */ 0xf0c, /* VFMADDSDZr */ /* Table7807 */ 0x1082, /* VFMSUBPDZ128v213rm */ 0x1088, /* VFMSUBPDZ128v213rr */ /* Table7809 */ 0x111b, /* VFMSUBSDZm */ 0x111c, /* VFMSUBSDZr */ /* Table7811 */ 0x1146, /* VFNMADDPDZ128v213rm */ 0x114c, /* VFNMADDPDZ128v213rr */ /* Table7813 */ 0x11df, /* VFNMADDSDZm */ 0x11e0, /* VFNMADDSDZr */ /* Table7815 */ 0x120a, /* VFNMSUBPDZ128v213rm */ 0x1210, /* VFNMSUBPDZ128v213rr */ /* Table7817 */ 0x12a3, /* VFNMSUBSDZm */ 0x12a4, /* VFNMSUBSDZr */ /* Table7819 */ 0xf3f, /* VFMADDSUBPDZ128v231rm */ 0xf45, /* VFMADDSUBPDZ128v231rr */ /* Table7821 */ 0xff1, /* VFMSUBADDPDZ128v231rm */ 0xff7, /* VFMSUBADDPDZ128v231rr */ /* Table7823 */ 0xe7b, /* VFMADDPDZ128v231rm */ 0xe81, /* VFMADDPDZ128v231rr */ /* Table7825 */ 0x108b, /* VFMSUBPDZ128v231rm */ 0x1091, /* VFMSUBPDZ128v231rr */ /* Table7827 */ 0x114f, /* VFNMADDPDZ128v231rm */ 0x1155, /* VFNMADDPDZ128v231rr */ /* Table7829 */ 0x1213, /* VFNMSUBPDZ128v231rm */ 0x1219, /* VFNMSUBPDZ128v231rr */ /* Table7831 */ 0x2082, /* VRCP28SDm */ 0x2085, /* VRCP28SDr */ /* Table7833 */ 0x2115, /* VRSQRT28SDm */ 0x2118, /* VRSQRT28SDr */ /* Table7835 */ 0x0, /* */ 0x1cd5, /* VPMOVM2BZ256rr */ /* Table7837 */ 0x0, /* */ 0x1cd8, /* VPMOVM2DZ256rr */ /* Table7839 */ 0x0, /* */ 0x181b, /* VPBROADCASTMW2DZ256rr */ /* Table7841 */ 0xcb7, /* VBROADCASTSSZ256m */ 0xcba, /* VBROADCASTSSZ256r */ /* Table7843 */ 0x1554, /* VMOVNTDQAZ256rm */ 0x0, /* */ /* Table7845 */ 0x1c06, /* VPMINSBZ256rm */ 0x1c09, /* VPMINSBZ256rr */ /* Table7847 */ 0x1c1f, /* VPMINSDZ256rm */ 0x1c25, /* VPMINSDZ256rr */ /* Table7849 */ 0x1cbc, /* VPMINUWZ256rm */ 0x1cbf, /* VPMINUWZ256rr */ /* Table7851 */ 0x1c85, /* VPMINUDZ256rm */ 0x1c8b, /* VPMINUDZ256rr */ /* Table7853 */ 0x1b3a, /* VPMAXSBZ256rm */ 0x1b3d, /* VPMAXSBZ256rr */ /* Table7855 */ 0x1b53, /* VPMAXSDZ256rm */ 0x1b59, /* VPMAXSDZ256rr */ /* Table7857 */ 0x1bf0, /* VPMAXUWZ256rm */ 0x1bf3, /* VPMAXUWZ256rr */ /* Table7859 */ 0x1bb9, /* VPMAXUDZ256rm */ 0x1bbf, /* VPMAXUDZ256rr */ /* Table7861 */ 0x1db3, /* VPMULLDZ256rm */ 0x1db9, /* VPMULLDZ256rr */ /* Table7863 */ 0x2054, /* VRCP14PSZ256m */ 0x205a, /* VRCP14PSZ256r */ /* Table7865 */ 0x20e7, /* VRSQRT14PSZ256m */ 0x20ed, /* VRSQRT14PSZ256r */ /* Table7867 */ 0x17b7, /* VPBLENDMDZ256rm */ 0x17bc, /* VPBLENDMDZ256rr */ /* Table7869 */ 0xc7c, /* VBLENDMPSZ256rm */ 0xc81, /* VBLENDMPSZ256rr */ /* Table7871 */ 0x17a3, /* VPBLENDMBZ256rm */ 0x17a6, /* VPBLENDMBZ256rr */ /* Table7873 */ 0x0, /* */ 0x17fe, /* VPBROADCASTBrZ256r */ /* Table7875 */ 0x0, /* */ 0x1833, /* VPBROADCASTWrZ256r */ /* Table7877 */ 0x0, /* */ 0x180f, /* VPBROADCASTDrZ256r */ /* Table7879 */ 0xf2a, /* VFMADDSUB132PSZ256m */ 0x0, /* */ /* Table7881 */ 0xfdc, /* VFMSUBADD132PSZ256m */ 0x0, /* */ /* Table7883 */ 0xe66, /* VFMADD132PSZ256m */ 0x0, /* */ /* Table7885 */ 0xfd0, /* VFMSUB132PSZ256m */ 0x0, /* */ /* Table7887 */ 0x113a, /* VFNMADD132PSZ256m */ 0x0, /* */ /* Table7889 */ 0x11fe, /* VFNMSUB132PSZ256m */ 0x0, /* */ /* Table7891 */ 0xf95, /* VFMADDSUBPSZ256v213rm */ 0xf9b, /* VFMADDSUBPSZ256v213rr */ /* Table7893 */ 0x1047, /* VFMSUBADDPSZ256v213rm */ 0x104d, /* VFMSUBADDPSZ256v213rr */ /* Table7895 */ 0xed1, /* VFMADDPSZ256v213rm */ 0xed7, /* VFMADDPSZ256v213rr */ /* Table7897 */ 0x10e1, /* VFMSUBPSZ256v213rm */ 0x10e7, /* VFMSUBPSZ256v213rr */ /* Table7899 */ 0x11a5, /* VFNMADDPSZ256v213rm */ 0x11ab, /* VFNMADDPSZ256v213rr */ /* Table7901 */ 0x1269, /* VFNMSUBPSZ256v213rm */ 0x126f, /* VFNMSUBPSZ256v213rr */ /* Table7903 */ 0xf9e, /* VFMADDSUBPSZ256v231rm */ 0xfa4, /* VFMADDSUBPSZ256v231rr */ /* Table7905 */ 0x1050, /* VFMSUBADDPSZ256v231rm */ 0x1056, /* VFMSUBADDPSZ256v231rr */ /* Table7907 */ 0xeda, /* VFMADDPSZ256v231rm */ 0xee0, /* VFMADDPSZ256v231rr */ /* Table7909 */ 0x10ea, /* VFMSUBPSZ256v231rm */ 0x10f0, /* VFMSUBPSZ256v231rr */ /* Table7911 */ 0x11ae, /* VFNMADDPSZ256v231rm */ 0x11b4, /* VFNMADDPSZ256v231rr */ /* Table7913 */ 0x1272, /* VFNMSUBPSZ256v231rm */ 0x1278, /* VFNMSUBPSZ256v231rr */ /* Table7915 */ 0x0, /* */ 0x1cde, /* VPMOVM2WZ256rr */ /* Table7917 */ 0x0, /* */ 0x1818, /* VPBROADCASTMB2QZ256rr */ /* Table7919 */ 0x0, /* */ 0x1cdb, /* VPMOVM2QZ256rr */ /* Table7921 */ 0xca3, /* VBROADCASTSDZ256m */ 0xca6, /* VBROADCASTSDZ256r */ /* Table7923 */ 0x18ad, /* VPCMPEQQZ256rm */ 0x18b1, /* VPCMPEQQZ256rr */ /* Table7925 */ 0x1901, /* VPCMPGTQZ256rm */ 0x1905, /* VPCMPGTQZ256rr */ /* Table7927 */ 0x1c3c, /* VPMINSQZ256rm */ 0x1c42, /* VPMINSQZ256rr */ /* Table7929 */ 0x1ca2, /* VPMINUQZ256rm */ 0x1ca8, /* VPMINUQZ256rr */ /* Table7931 */ 0x1b70, /* VPMAXSQZ256rm */ 0x1b76, /* VPMAXSQZ256rr */ /* Table7933 */ 0x1bd6, /* VPMAXUQZ256rm */ 0x1bdc, /* VPMAXUQZ256rr */ /* Table7935 */ 0x1dd0, /* VPMULLQZ256rm */ 0x1dd6, /* VPMULLQZ256rr */ /* Table7937 */ 0x2039, /* VRCP14PDZ256m */ 0x203f, /* VRCP14PDZ256r */ /* Table7939 */ 0x20cc, /* VRSQRT14PDZ256m */ 0x20d2, /* VRSQRT14PDZ256r */ /* Table7941 */ 0x17cf, /* VPBLENDMQZ256rm */ 0x17d4, /* VPBLENDMQZ256rr */ /* Table7943 */ 0xc64, /* VBLENDMPDZ256rm */ 0xc69, /* VBLENDMPDZ256rr */ /* Table7945 */ 0x17e5, /* VPBLENDMWZ256rm */ 0x17e8, /* VPBLENDMWZ256rr */ /* Table7947 */ 0x0, /* */ 0x1826, /* VPBROADCASTQrZ256r */ /* Table7949 */ 0xf24, /* VFMADDSUB132PDZ256m */ 0x0, /* */ /* Table7951 */ 0xfd6, /* VFMSUBADD132PDZ256m */ 0x0, /* */ /* Table7953 */ 0xe60, /* VFMADD132PDZ256m */ 0x0, /* */ /* Table7955 */ 0xfca, /* VFMSUB132PDZ256m */ 0x0, /* */ /* Table7957 */ 0x1134, /* VFNMADD132PDZ256m */ 0x0, /* */ /* Table7959 */ 0x11f8, /* VFNMSUB132PDZ256m */ 0x0, /* */ /* Table7961 */ 0xf48, /* VFMADDSUBPDZ256v213rm */ 0xf4e, /* VFMADDSUBPDZ256v213rr */ /* Table7963 */ 0xffa, /* VFMSUBADDPDZ256v213rm */ 0x1000, /* VFMSUBADDPDZ256v213rr */ /* Table7965 */ 0xe84, /* VFMADDPDZ256v213rm */ 0xe8a, /* VFMADDPDZ256v213rr */ /* Table7967 */ 0x1094, /* VFMSUBPDZ256v213rm */ 0x109a, /* VFMSUBPDZ256v213rr */ /* Table7969 */ 0x1158, /* VFNMADDPDZ256v213rm */ 0x115e, /* VFNMADDPDZ256v213rr */ /* Table7971 */ 0x121c, /* VFNMSUBPDZ256v213rm */ 0x1222, /* VFNMSUBPDZ256v213rr */ /* Table7973 */ 0xf51, /* VFMADDSUBPDZ256v231rm */ 0xf57, /* VFMADDSUBPDZ256v231rr */ /* Table7975 */ 0x1003, /* VFMSUBADDPDZ256v231rm */ 0x1009, /* VFMSUBADDPDZ256v231rr */ /* Table7977 */ 0xe8d, /* VFMADDPDZ256v231rm */ 0xe93, /* VFMADDPDZ256v231rr */ /* Table7979 */ 0x109d, /* VFMSUBPDZ256v231rm */ 0x10a3, /* VFMSUBPDZ256v231rr */ /* Table7981 */ 0x1161, /* VFNMADDPDZ256v231rm */ 0x1167, /* VFNMADDPDZ256v231rr */ /* Table7983 */ 0x1225, /* VFNMSUBPDZ256v231rm */ 0x122b, /* VFNMSUBPDZ256v231rr */ /* Table7985 */ 0x1d40, /* VPMOVUSDBmr */ 0x1d42, /* VPMOVUSDBrr */ /* Table7987 */ 0x1d4a, /* VPMOVUSQBmr */ 0x1d4c, /* VPMOVUSQBrr */ /* Table7989 */ 0x1d45, /* VPMOVUSDWmr */ 0x1d47, /* VPMOVUSDWrr */ /* Table7991 */ 0x1d54, /* VPMOVUSQWmr */ 0x1d56, /* VPMOVUSQWrr */ /* Table7993 */ 0x1d4f, /* VPMOVUSQDmr */ 0x1d51, /* VPMOVUSQDrr */ /* Table7995 */ 0x1cf1, /* VPMOVSDBmr */ 0x1cf3, /* VPMOVSDBrr */ /* Table7997 */ 0x1cfb, /* VPMOVSQBmr */ 0x1cfd, /* VPMOVSQBrr */ /* Table7999 */ 0x1cf6, /* VPMOVSDWmr */ 0x1cf8, /* VPMOVSDWrr */ /* Table8001 */ 0x1d05, /* VPMOVSQWmr */ 0x1d07, /* VPMOVSQWrr */ /* Table8003 */ 0x1d00, /* VPMOVSQDmr */ 0x1d02, /* VPMOVSQDrr */ /* Table8005 */ 0x1fc6, /* VPTESTNMDZrm */ 0x1fc7, /* VPTESTNMDZrr */ /* Table8007 */ 0x0, /* */ 0x1cd6, /* VPMOVM2BZrr */ /* Table8009 */ 0x1cca, /* VPMOVDBmr */ 0x1ccc, /* VPMOVDBrr */ /* Table8011 */ 0x1ce2, /* VPMOVQBmr */ 0x1ce4, /* VPMOVQBrr */ /* Table8013 */ 0x1ccf, /* VPMOVDWmr */ 0x1cd1, /* VPMOVDWrr */ /* Table8015 */ 0x1cec, /* VPMOVQWmr */ 0x1cee, /* VPMOVQWrr */ /* Table8017 */ 0x1ce7, /* VPMOVQDmr */ 0x1ce9, /* VPMOVQDrr */ /* Table8019 */ 0x0, /* */ 0x1cd9, /* VPMOVM2DZrr */ /* Table8021 */ 0x0, /* */ 0x181c, /* VPBROADCASTMW2DZrr */ /* Table8023 */ 0x1a5d, /* VPERMILPSZrm */ 0x1a5e, /* VPERMILPSZrr */ /* Table8025 */ 0xd2b, /* VCVTPH2PSZrm */ 0xd2c, /* VCVTPH2PSZrr */ /* Table8027 */ 0x1a6b, /* VPERMPSZrm */ 0x1a6c, /* VPERMPSZrr */ /* Table8029 */ 0xcbd, /* VBROADCASTSSZm */ 0xcc0, /* VBROADCASTSSZr */ /* Table8031 */ 0x1675, /* VPABSDZrm */ 0x167b, /* VPABSDZrr */ /* Table8033 */ 0x1d0c, /* VPMOVSXBDZrm */ 0x1d0f, /* VPMOVSXBDZrr */ /* Table8035 */ 0x1d16, /* VPMOVSXBQZrm */ 0x1d19, /* VPMOVSXBQZrr */ /* Table8037 */ 0x1d2e, /* VPMOVSXWDZrm */ 0x1d31, /* VPMOVSXWDZrr */ /* Table8039 */ 0x1d38, /* VPMOVSXWQZrm */ 0x1d3b, /* VPMOVSXWQZrr */ /* Table8041 */ 0x1d24, /* VPMOVSXDQZrm */ 0x1d27, /* VPMOVSXDQZrr */ /* Table8043 */ 0x1fc2, /* VPTESTMDZrm */ 0x1fc3, /* VPTESTMDZrr */ /* Table8045 */ 0x1555, /* VMOVNTDQAZrm */ 0x0, /* */ /* Table8047 */ 0x1d5b, /* VPMOVZXBDZrm */ 0x1d5e, /* VPMOVZXBDZrr */ /* Table8049 */ 0x1d65, /* VPMOVZXBQZrm */ 0x1d68, /* VPMOVZXBQZrr */ /* Table8051 */ 0x1d7d, /* VPMOVZXWDZrm */ 0x1d80, /* VPMOVZXWDZrr */ /* Table8053 */ 0x1d87, /* VPMOVZXWQZrm */ 0x1d8a, /* VPMOVZXWQZrr */ /* Table8055 */ 0x1d73, /* VPMOVZXDQZrm */ 0x1d76, /* VPMOVZXDQZrr */ /* Table8057 */ 0x1a25, /* VPERMDZrm */ 0x1a26, /* VPERMDZrr */ /* Table8059 */ 0x1c0c, /* VPMINSBZrm */ 0x1c0f, /* VPMINSBZrr */ /* Table8061 */ 0x1c28, /* VPMINSDZrm */ 0x1c2e, /* VPMINSDZrr */ /* Table8063 */ 0x1cc2, /* VPMINUWZrm */ 0x1cc5, /* VPMINUWZrr */ /* Table8065 */ 0x1c8e, /* VPMINUDZrm */ 0x1c94, /* VPMINUDZrr */ /* Table8067 */ 0x1b40, /* VPMAXSBZrm */ 0x1b43, /* VPMAXSBZrr */ /* Table8069 */ 0x1b5c, /* VPMAXSDZrm */ 0x1b62, /* VPMAXSDZrr */ /* Table8071 */ 0x1bf6, /* VPMAXUWZrm */ 0x1bf9, /* VPMAXUWZrr */ /* Table8073 */ 0x1bc2, /* VPMAXUDZrm */ 0x1bc8, /* VPMAXUDZrr */ /* Table8075 */ 0x1dbc, /* VPMULLDZrm */ 0x1dc2, /* VPMULLDZrr */ /* Table8077 */ 0x1af8, /* VPLZCNTDrm */ 0x1afe, /* VPLZCNTDrr */ /* Table8079 */ 0x1f30, /* VPSRLVDZrm */ 0x1f33, /* VPSRLVDZrr */ /* Table8081 */ 0x1ef4, /* VPSRAVDZrm */ 0x1ef7, /* VPSRAVDZrr */ /* Table8083 */ 0x1ebc, /* VPSLLVDZrm */ 0x1ebf, /* VPSLLVDZrr */ /* Table8085 */ 0x205d, /* VRCP14PSZm */ 0x2063, /* VRCP14PSZr */ /* Table8087 */ 0x20f0, /* VRSQRT14PSZm */ 0x20f6, /* VRSQRT14PSZr */ /* Table8089 */ 0x180a, /* VPBROADCASTDZrm */ 0x180b, /* VPBROADCASTDZrr */ /* Table8091 */ 0xc9e, /* VBROADCASTI32X4rm */ 0x0, /* */ /* Table8093 */ 0x17bf, /* VPBLENDMDZrm */ 0x17c4, /* VPBLENDMDZrr */ /* Table8095 */ 0xc84, /* VBLENDMPSZrm */ 0xc89, /* VBLENDMPSZrr */ /* Table8097 */ 0x17a9, /* VPBLENDMBZrm */ 0x17ac, /* VPBLENDMBZrr */ /* Table8099 */ 0x1a27, /* VPERMI2Drm */ 0x1a2a, /* VPERMI2Drr */ /* Table8101 */ 0x1a33, /* VPERMI2PSrm */ 0x1a36, /* VPERMI2PSrr */ /* Table8103 */ 0x0, /* */ 0x1801, /* VPBROADCASTBrZr */ /* Table8105 */ 0x0, /* */ 0x1836, /* VPBROADCASTWrZr */ /* Table8107 */ 0x0, /* */ 0x1812, /* VPBROADCASTDrZr */ /* Table8109 */ 0x1a73, /* VPERMT2Drm */ 0x1a76, /* VPERMT2Drr */ /* Table8111 */ 0x1a7f, /* VPERMT2PSrm */ 0x1a82, /* VPERMT2PSrr */ /* Table8113 */ 0xf2c, /* VFMADDSUB132PSZm */ 0x0, /* */ /* Table8115 */ 0xfde, /* VFMSUBADD132PSZm */ 0x0, /* */ /* Table8117 */ 0xe68, /* VFMADD132PSZm */ 0x0, /* */ /* Table8119 */ 0xfd2, /* VFMSUB132PSZm */ 0x0, /* */ /* Table8121 */ 0x113c, /* VFNMADD132PSZm */ 0x0, /* */ /* Table8123 */ 0x1200, /* VFNMSUB132PSZm */ 0x0, /* */ /* Table8125 */ 0xfa7, /* VFMADDSUBPSZv213rm */ 0xfad, /* VFMADDSUBPSZv213rr */ /* Table8127 */ 0x1059, /* VFMSUBADDPSZv213rm */ 0x105f, /* VFMSUBADDPSZv213rr */ /* Table8129 */ 0xee3, /* VFMADDPSZv213rm */ 0xee9, /* VFMADDPSZv213rr */ /* Table8131 */ 0x10f3, /* VFMSUBPSZv213rm */ 0x10f9, /* VFMSUBPSZv213rr */ /* Table8133 */ 0x11b7, /* VFNMADDPSZv213rm */ 0x11bd, /* VFNMADDPSZv213rr */ /* Table8135 */ 0x127b, /* VFNMSUBPSZv213rm */ 0x1281, /* VFNMSUBPSZv213rr */ /* Table8137 */ 0xfb3, /* VFMADDSUBPSZv231rm */ 0xfb9, /* VFMADDSUBPSZv231rr */ /* Table8139 */ 0x1065, /* VFMSUBADDPSZv231rm */ 0x106b, /* VFMSUBADDPSZv231rr */ /* Table8141 */ 0xeef, /* VFMADDPSZv231rm */ 0xef5, /* VFMADDPSZv231rr */ /* Table8143 */ 0x10ff, /* VFMSUBPSZv231rm */ 0x1105, /* VFMSUBPSZv231rr */ /* Table8145 */ 0x11c3, /* VFNMADDPSZv231rm */ 0x11c9, /* VFNMADDPSZv231rr */ /* Table8147 */ 0x1287, /* VFNMSUBPSZv231rm */ 0x128d, /* VFNMSUBPSZv231rr */ /* Table8149 */ 0x1a0d, /* VPCONFLICTDrm */ 0x1a13, /* VPCONFLICTDrr */ /* Table8151 */ 0xe22, /* VEXP2PSm */ 0xe28, /* VEXP2PSr */ /* Table8153 */ 0x2076, /* VRCP28PSm */ 0x207c, /* VRCP28PSr */ /* Table8155 */ 0x2109, /* VRSQRT28PSm */ 0x210f, /* VRSQRT28PSr */ /* Table8157 */ 0x1fc8, /* VPTESTNMQZrm */ 0x1fc9, /* VPTESTNMQZrr */ /* Table8159 */ 0x0, /* */ 0x1cdf, /* VPMOVM2WZrr */ /* Table8161 */ 0x0, /* */ 0x1819, /* VPBROADCASTMB2QZrr */ /* Table8163 */ 0x0, /* */ 0x1cdc, /* VPMOVM2QZrr */ /* Table8165 */ 0x1a51, /* VPERMILPDZrm */ 0x1a52, /* VPERMILPDZrr */ /* Table8167 */ 0x1a67, /* VPERMPDZrm */ 0x1a68, /* VPERMPDZrr */ /* Table8169 */ 0xca9, /* VBROADCASTSDZm */ 0xcac, /* VBROADCASTSDZr */ /* Table8171 */ 0x1682, /* VPABSQZrm */ 0x1688, /* VPABSQZrr */ /* Table8173 */ 0x1fc4, /* VPTESTMQZrm */ 0x1fc5, /* VPTESTMQZrr */ /* Table8175 */ 0x1d91, /* VPMULDQZrm */ 0x1d97, /* VPMULDQZrr */ /* Table8177 */ 0x18b3, /* VPCMPEQQZrm */ 0x18b7, /* VPCMPEQQZrr */ /* Table8179 */ 0x1a71, /* VPERMQZrm */ 0x1a72, /* VPERMQZrr */ /* Table8181 */ 0x1907, /* VPCMPGTQZrm */ 0x190b, /* VPCMPGTQZrr */ /* Table8183 */ 0x1c45, /* VPMINSQZrm */ 0x1c4b, /* VPMINSQZrr */ /* Table8185 */ 0x1cab, /* VPMINUQZrm */ 0x1cb1, /* VPMINUQZrr */ /* Table8187 */ 0x1b79, /* VPMAXSQZrm */ 0x1b7f, /* VPMAXSQZrr */ /* Table8189 */ 0x1bdf, /* VPMAXUQZrm */ 0x1be5, /* VPMAXUQZrr */ /* Table8191 */ 0x1dd9, /* VPMULLQZrm */ 0x1ddf, /* VPMULLQZrr */ /* Table8193 */ 0x1b01, /* VPLZCNTQrm */ 0x1b07, /* VPLZCNTQrr */ /* Table8195 */ 0x1f3a, /* VPSRLVQZrm */ 0x1f3d, /* VPSRLVQZrr */ /* Table8197 */ 0x1efc, /* VPSRAVQZrm */ 0x1eff, /* VPSRAVQZrr */ /* Table8199 */ 0x1ec6, /* VPSLLVQZrm */ 0x1ec9, /* VPSLLVQZrr */ /* Table8201 */ 0x2042, /* VRCP14PDZm */ 0x2048, /* VRCP14PDZr */ /* Table8203 */ 0x20d5, /* VRSQRT14PDZm */ 0x20db, /* VRSQRT14PDZr */ /* Table8205 */ 0x1821, /* VPBROADCASTQZrm */ 0x1822, /* VPBROADCASTQZrr */ /* Table8207 */ 0xca0, /* VBROADCASTI64X4rm */ 0x0, /* */ /* Table8209 */ 0x17d7, /* VPBLENDMQZrm */ 0x17dc, /* VPBLENDMQZrr */ /* Table8211 */ 0xc6c, /* VBLENDMPDZrm */ 0xc71, /* VBLENDMPDZrr */ /* Table8213 */ 0x17eb, /* VPBLENDMWZrm */ 0x17ee, /* VPBLENDMWZrr */ /* Table8215 */ 0x1a39, /* VPERMI2Qrm */ 0x1a3c, /* VPERMI2Qrr */ /* Table8217 */ 0x1a2d, /* VPERMI2PDrm */ 0x1a30, /* VPERMI2PDrr */ /* Table8219 */ 0x0, /* */ 0x1829, /* VPBROADCASTQrZr */ /* Table8221 */ 0x1a85, /* VPERMT2Qrm */ 0x1a88, /* VPERMT2Qrr */ /* Table8223 */ 0x1a79, /* VPERMT2PDrm */ 0x1a7c, /* VPERMT2PDrr */ /* Table8225 */ 0xf26, /* VFMADDSUB132PDZm */ 0x0, /* */ /* Table8227 */ 0xfd8, /* VFMSUBADD132PDZm */ 0x0, /* */ /* Table8229 */ 0xe62, /* VFMADD132PDZm */ 0x0, /* */ /* Table8231 */ 0xfcc, /* VFMSUB132PDZm */ 0x0, /* */ /* Table8233 */ 0x1136, /* VFNMADD132PDZm */ 0x0, /* */ /* Table8235 */ 0x11fa, /* VFNMSUB132PDZm */ 0x0, /* */ /* Table8237 */ 0xf5a, /* VFMADDSUBPDZv213rm */ 0xf60, /* VFMADDSUBPDZv213rr */ /* Table8239 */ 0x100c, /* VFMSUBADDPDZv213rm */ 0x1012, /* VFMSUBADDPDZv213rr */ /* Table8241 */ 0xe96, /* VFMADDPDZv213rm */ 0xe9c, /* VFMADDPDZv213rr */ /* Table8243 */ 0x10a6, /* VFMSUBPDZv213rm */ 0x10ac, /* VFMSUBPDZv213rr */ /* Table8245 */ 0x116a, /* VFNMADDPDZv213rm */ 0x1170, /* VFNMADDPDZv213rr */ /* Table8247 */ 0x122e, /* VFNMSUBPDZv213rm */ 0x1234, /* VFNMSUBPDZv213rr */ /* Table8249 */ 0xf66, /* VFMADDSUBPDZv231rm */ 0xf6c, /* VFMADDSUBPDZv231rr */ /* Table8251 */ 0x1018, /* VFMSUBADDPDZv231rm */ 0x101e, /* VFMSUBADDPDZv231rr */ /* Table8253 */ 0xea2, /* VFMADDPDZv231rm */ 0xea8, /* VFMADDPDZv231rr */ /* Table8255 */ 0x10b2, /* VFMSUBPDZv231rm */ 0x10b8, /* VFMSUBPDZv231rr */ /* Table8257 */ 0x1176, /* VFNMADDPDZv231rm */ 0x117c, /* VFNMADDPDZv231rr */ /* Table8259 */ 0x123a, /* VFNMSUBPDZv231rm */ 0x1240, /* VFNMSUBPDZv231rr */ /* Table8261 */ 0x1a16, /* VPCONFLICTQrm */ 0x1a1c, /* VPCONFLICTQrr */ /* Table8263 */ 0xe16, /* VEXP2PDm */ 0xe1c, /* VEXP2PDr */ /* Table8265 */ 0x206a, /* VRCP28PDm */ 0x2070, /* VRCP28PDr */ /* Table8267 */ 0x20fd, /* VRSQRT28PDm */ 0x2103, /* VRSQRT28PDr */ /* Table8269 */ 0xcb2, /* VBROADCASTSSZ128mk */ 0xcb5, /* VBROADCASTSSZ128rk */ /* Table8271 */ 0x1c01, /* VPMINSBZ128rmk */ 0x1c04, /* VPMINSBZ128rrk */ /* Table8273 */ 0x1c1a, /* VPMINSDZ128rmk */ 0x1c1d, /* VPMINSDZ128rrk */ /* Table8275 */ 0x1cb7, /* VPMINUWZ128rmk */ 0x1cba, /* VPMINUWZ128rrk */ /* Table8277 */ 0x1c80, /* VPMINUDZ128rmk */ 0x1c83, /* VPMINUDZ128rrk */ /* Table8279 */ 0x1b35, /* VPMAXSBZ128rmk */ 0x1b38, /* VPMAXSBZ128rrk */ /* Table8281 */ 0x1b4e, /* VPMAXSDZ128rmk */ 0x1b51, /* VPMAXSDZ128rrk */ /* Table8283 */ 0x1beb, /* VPMAXUWZ128rmk */ 0x1bee, /* VPMAXUWZ128rrk */ /* Table8285 */ 0x1bb4, /* VPMAXUDZ128rmk */ 0x1bb7, /* VPMAXUDZ128rrk */ /* Table8287 */ 0x1dae, /* VPMULLDZ128rmk */ 0x1db1, /* VPMULLDZ128rrk */ /* Table8289 */ 0x204f, /* VRCP14PSZ128mk */ 0x2052, /* VRCP14PSZ128rk */ /* Table8291 */ 0x20e2, /* VRSQRT14PSZ128mk */ 0x20e5, /* VRSQRT14PSZ128rk */ /* Table8293 */ 0x17b2, /* VPBLENDMDZ128rmk */ 0x17b5, /* VPBLENDMDZ128rrk */ /* Table8295 */ 0xc77, /* VBLENDMPSZ128rmk */ 0xc7a, /* VBLENDMPSZ128rrk */ /* Table8297 */ 0x179e, /* VPBLENDMBZ128rmk */ 0x17a1, /* VPBLENDMBZ128rrk */ /* Table8299 */ 0x0, /* */ 0x17fc, /* VPBROADCASTBrZ128rk */ /* Table8301 */ 0x0, /* */ 0x1831, /* VPBROADCASTWrZ128rk */ /* Table8303 */ 0x0, /* */ 0x180d, /* VPBROADCASTDrZ128rk */ /* Table8305 */ 0xe3a, /* VEXPANDPSZ128rmk */ 0xe3c, /* VEXPANDPSZ128rrk */ /* Table8307 */ 0x1a8b, /* VPEXPANDDZ128rmk */ 0x1a8d, /* VPEXPANDDZ128rrk */ /* Table8309 */ 0xd02, /* VCOMPRESSPSZ128mrk */ 0xd03, /* VCOMPRESSPSZ128rrk */ /* Table8311 */ 0x19e3, /* VPCOMPRESSDZ128mrk */ 0x19e4, /* VPCOMPRESSDZ128rrk */ /* Table8313 */ 0xf87, /* VFMADDSUBPSZ128v213rmk */ 0xf8a, /* VFMADDSUBPSZ128v213rrk */ /* Table8315 */ 0x1039, /* VFMSUBADDPSZ128v213rmk */ 0x103c, /* VFMSUBADDPSZ128v213rrk */ /* Table8317 */ 0xec3, /* VFMADDPSZ128v213rmk */ 0xec6, /* VFMADDPSZ128v213rrk */ /* Table8319 */ 0x10d3, /* VFMSUBPSZ128v213rmk */ 0x10d6, /* VFMSUBPSZ128v213rrk */ /* Table8321 */ 0x1197, /* VFNMADDPSZ128v213rmk */ 0x119a, /* VFNMADDPSZ128v213rrk */ /* Table8323 */ 0x125b, /* VFNMSUBPSZ128v213rmk */ 0x125e, /* VFNMSUBPSZ128v213rrk */ /* Table8325 */ 0xf90, /* VFMADDSUBPSZ128v231rmk */ 0xf93, /* VFMADDSUBPSZ128v231rrk */ /* Table8327 */ 0x1042, /* VFMSUBADDPSZ128v231rmk */ 0x1045, /* VFMSUBADDPSZ128v231rrk */ /* Table8329 */ 0xecc, /* VFMADDPSZ128v231rmk */ 0xecf, /* VFMADDPSZ128v231rrk */ /* Table8331 */ 0x10dc, /* VFMSUBPSZ128v231rmk */ 0x10df, /* VFMSUBPSZ128v231rrk */ /* Table8333 */ 0x11a0, /* VFNMADDPSZ128v231rmk */ 0x11a3, /* VFNMADDPSZ128v231rrk */ /* Table8335 */ 0x1264, /* VFNMSUBPSZ128v231rmk */ 0x1267, /* VFNMSUBPSZ128v231rrk */ /* Table8337 */ 0x208c, /* VRCP28SSmk */ 0x2092, /* VRCP28SSrk */ /* Table8339 */ 0x211f, /* VRSQRT28SSmk */ 0x2125, /* VRSQRT28SSrk */ /* Table8341 */ 0x18aa, /* VPCMPEQQZ128rmk */ 0x18ac, /* VPCMPEQQZ128rrk */ /* Table8343 */ 0x18fe, /* VPCMPGTQZ128rmk */ 0x1900, /* VPCMPGTQZ128rrk */ /* Table8345 */ 0x1c37, /* VPMINSQZ128rmk */ 0x1c3a, /* VPMINSQZ128rrk */ /* Table8347 */ 0x1c9d, /* VPMINUQZ128rmk */ 0x1ca0, /* VPMINUQZ128rrk */ /* Table8349 */ 0x1b6b, /* VPMAXSQZ128rmk */ 0x1b6e, /* VPMAXSQZ128rrk */ /* Table8351 */ 0x1bd1, /* VPMAXUQZ128rmk */ 0x1bd4, /* VPMAXUQZ128rrk */ /* Table8353 */ 0x1dcb, /* VPMULLQZ128rmk */ 0x1dce, /* VPMULLQZ128rrk */ /* Table8355 */ 0x2034, /* VRCP14PDZ128mk */ 0x2037, /* VRCP14PDZ128rk */ /* Table8357 */ 0x20c7, /* VRSQRT14PDZ128mk */ 0x20ca, /* VRSQRT14PDZ128rk */ /* Table8359 */ 0x17ca, /* VPBLENDMQZ128rmk */ 0x17cd, /* VPBLENDMQZ128rrk */ /* Table8361 */ 0xc5f, /* VBLENDMPDZ128rmk */ 0xc62, /* VBLENDMPDZ128rrk */ /* Table8363 */ 0x17e0, /* VPBLENDMWZ128rmk */ 0x17e3, /* VPBLENDMWZ128rrk */ /* Table8365 */ 0x0, /* */ 0x1824, /* VPBROADCASTQrZ128rk */ /* Table8367 */ 0xe2e, /* VEXPANDPDZ128rmk */ 0xe30, /* VEXPANDPDZ128rrk */ /* Table8369 */ 0x1a97, /* VPEXPANDQZ128rmk */ 0x1a99, /* VPEXPANDQZ128rrk */ /* Table8371 */ 0xcf9, /* VCOMPRESSPDZ128mrk */ 0xcfa, /* VCOMPRESSPDZ128rrk */ /* Table8373 */ 0x19ec, /* VPCOMPRESSQZ128mrk */ 0x19ed, /* VPCOMPRESSQZ128rrk */ /* Table8375 */ 0xf3a, /* VFMADDSUBPDZ128v213rmk */ 0xf3d, /* VFMADDSUBPDZ128v213rrk */ /* Table8377 */ 0xfec, /* VFMSUBADDPDZ128v213rmk */ 0xfef, /* VFMSUBADDPDZ128v213rrk */ /* Table8379 */ 0xe76, /* VFMADDPDZ128v213rmk */ 0xe79, /* VFMADDPDZ128v213rrk */ /* Table8381 */ 0x1086, /* VFMSUBPDZ128v213rmk */ 0x1089, /* VFMSUBPDZ128v213rrk */ /* Table8383 */ 0x114a, /* VFNMADDPDZ128v213rmk */ 0x114d, /* VFNMADDPDZ128v213rrk */ /* Table8385 */ 0x120e, /* VFNMSUBPDZ128v213rmk */ 0x1211, /* VFNMSUBPDZ128v213rrk */ /* Table8387 */ 0xf43, /* VFMADDSUBPDZ128v231rmk */ 0xf46, /* VFMADDSUBPDZ128v231rrk */ /* Table8389 */ 0xff5, /* VFMSUBADDPDZ128v231rmk */ 0xff8, /* VFMSUBADDPDZ128v231rrk */ /* Table8391 */ 0xe7f, /* VFMADDPDZ128v231rmk */ 0xe82, /* VFMADDPDZ128v231rrk */ /* Table8393 */ 0x108f, /* VFMSUBPDZ128v231rmk */ 0x1092, /* VFMSUBPDZ128v231rrk */ /* Table8395 */ 0x1153, /* VFNMADDPDZ128v231rmk */ 0x1156, /* VFNMADDPDZ128v231rrk */ /* Table8397 */ 0x1217, /* VFNMSUBPDZ128v231rmk */ 0x121a, /* VFNMSUBPDZ128v231rrk */ /* Table8399 */ 0x2083, /* VRCP28SDmk */ 0x2089, /* VRCP28SDrk */ /* Table8401 */ 0x2116, /* VRSQRT28SDmk */ 0x211c, /* VRSQRT28SDrk */ /* Table8403 */ 0xcb8, /* VBROADCASTSSZ256mk */ 0xcbb, /* VBROADCASTSSZ256rk */ /* Table8405 */ 0x1c07, /* VPMINSBZ256rmk */ 0x1c0a, /* VPMINSBZ256rrk */ /* Table8407 */ 0x1c23, /* VPMINSDZ256rmk */ 0x1c26, /* VPMINSDZ256rrk */ /* Table8409 */ 0x1cbd, /* VPMINUWZ256rmk */ 0x1cc0, /* VPMINUWZ256rrk */ /* Table8411 */ 0x1c89, /* VPMINUDZ256rmk */ 0x1c8c, /* VPMINUDZ256rrk */ /* Table8413 */ 0x1b3b, /* VPMAXSBZ256rmk */ 0x1b3e, /* VPMAXSBZ256rrk */ /* Table8415 */ 0x1b57, /* VPMAXSDZ256rmk */ 0x1b5a, /* VPMAXSDZ256rrk */ /* Table8417 */ 0x1bf1, /* VPMAXUWZ256rmk */ 0x1bf4, /* VPMAXUWZ256rrk */ /* Table8419 */ 0x1bbd, /* VPMAXUDZ256rmk */ 0x1bc0, /* VPMAXUDZ256rrk */ /* Table8421 */ 0x1db7, /* VPMULLDZ256rmk */ 0x1dba, /* VPMULLDZ256rrk */ /* Table8423 */ 0x2058, /* VRCP14PSZ256mk */ 0x205b, /* VRCP14PSZ256rk */ /* Table8425 */ 0x20eb, /* VRSQRT14PSZ256mk */ 0x20ee, /* VRSQRT14PSZ256rk */ /* Table8427 */ 0x17ba, /* VPBLENDMDZ256rmk */ 0x17bd, /* VPBLENDMDZ256rrk */ /* Table8429 */ 0xc7f, /* VBLENDMPSZ256rmk */ 0xc82, /* VBLENDMPSZ256rrk */ /* Table8431 */ 0x17a4, /* VPBLENDMBZ256rmk */ 0x17a7, /* VPBLENDMBZ256rrk */ /* Table8433 */ 0x0, /* */ 0x17ff, /* VPBROADCASTBrZ256rk */ /* Table8435 */ 0x0, /* */ 0x1834, /* VPBROADCASTWrZ256rk */ /* Table8437 */ 0x0, /* */ 0x1810, /* VPBROADCASTDrZ256rk */ /* Table8439 */ 0xe3e, /* VEXPANDPSZ256rmk */ 0xe40, /* VEXPANDPSZ256rrk */ /* Table8441 */ 0x1a8f, /* VPEXPANDDZ256rmk */ 0x1a91, /* VPEXPANDDZ256rrk */ /* Table8443 */ 0xd05, /* VCOMPRESSPSZ256mrk */ 0xd06, /* VCOMPRESSPSZ256rrk */ /* Table8445 */ 0x19e6, /* VPCOMPRESSDZ256mrk */ 0x19e7, /* VPCOMPRESSDZ256rrk */ /* Table8447 */ 0xf99, /* VFMADDSUBPSZ256v213rmk */ 0xf9c, /* VFMADDSUBPSZ256v213rrk */ /* Table8449 */ 0x104b, /* VFMSUBADDPSZ256v213rmk */ 0x104e, /* VFMSUBADDPSZ256v213rrk */ /* Table8451 */ 0xed5, /* VFMADDPSZ256v213rmk */ 0xed8, /* VFMADDPSZ256v213rrk */ /* Table8453 */ 0x10e5, /* VFMSUBPSZ256v213rmk */ 0x10e8, /* VFMSUBPSZ256v213rrk */ /* Table8455 */ 0x11a9, /* VFNMADDPSZ256v213rmk */ 0x11ac, /* VFNMADDPSZ256v213rrk */ /* Table8457 */ 0x126d, /* VFNMSUBPSZ256v213rmk */ 0x1270, /* VFNMSUBPSZ256v213rrk */ /* Table8459 */ 0xfa2, /* VFMADDSUBPSZ256v231rmk */ 0xfa5, /* VFMADDSUBPSZ256v231rrk */ /* Table8461 */ 0x1054, /* VFMSUBADDPSZ256v231rmk */ 0x1057, /* VFMSUBADDPSZ256v231rrk */ /* Table8463 */ 0xede, /* VFMADDPSZ256v231rmk */ 0xee1, /* VFMADDPSZ256v231rrk */ /* Table8465 */ 0x10ee, /* VFMSUBPSZ256v231rmk */ 0x10f1, /* VFMSUBPSZ256v231rrk */ /* Table8467 */ 0x11b2, /* VFNMADDPSZ256v231rmk */ 0x11b5, /* VFNMADDPSZ256v231rrk */ /* Table8469 */ 0x1276, /* VFNMSUBPSZ256v231rmk */ 0x1279, /* VFNMSUBPSZ256v231rrk */ /* Table8471 */ 0xca4, /* VBROADCASTSDZ256mk */ 0xca7, /* VBROADCASTSDZ256rk */ /* Table8473 */ 0x18b0, /* VPCMPEQQZ256rmk */ 0x18b2, /* VPCMPEQQZ256rrk */ /* Table8475 */ 0x1904, /* VPCMPGTQZ256rmk */ 0x1906, /* VPCMPGTQZ256rrk */ /* Table8477 */ 0x1c40, /* VPMINSQZ256rmk */ 0x1c43, /* VPMINSQZ256rrk */ /* Table8479 */ 0x1ca6, /* VPMINUQZ256rmk */ 0x1ca9, /* VPMINUQZ256rrk */ /* Table8481 */ 0x1b74, /* VPMAXSQZ256rmk */ 0x1b77, /* VPMAXSQZ256rrk */ /* Table8483 */ 0x1bda, /* VPMAXUQZ256rmk */ 0x1bdd, /* VPMAXUQZ256rrk */ /* Table8485 */ 0x1dd4, /* VPMULLQZ256rmk */ 0x1dd7, /* VPMULLQZ256rrk */ /* Table8487 */ 0x203d, /* VRCP14PDZ256mk */ 0x2040, /* VRCP14PDZ256rk */ /* Table8489 */ 0x20d0, /* VRSQRT14PDZ256mk */ 0x20d3, /* VRSQRT14PDZ256rk */ /* Table8491 */ 0x17d2, /* VPBLENDMQZ256rmk */ 0x17d5, /* VPBLENDMQZ256rrk */ /* Table8493 */ 0xc67, /* VBLENDMPDZ256rmk */ 0xc6a, /* VBLENDMPDZ256rrk */ /* Table8495 */ 0x17e6, /* VPBLENDMWZ256rmk */ 0x17e9, /* VPBLENDMWZ256rrk */ /* Table8497 */ 0x0, /* */ 0x1827, /* VPBROADCASTQrZ256rk */ /* Table8499 */ 0xe32, /* VEXPANDPDZ256rmk */ 0xe34, /* VEXPANDPDZ256rrk */ /* Table8501 */ 0x1a9b, /* VPEXPANDQZ256rmk */ 0x1a9d, /* VPEXPANDQZ256rrk */ /* Table8503 */ 0xcfc, /* VCOMPRESSPDZ256mrk */ 0xcfd, /* VCOMPRESSPDZ256rrk */ /* Table8505 */ 0x19ef, /* VPCOMPRESSQZ256mrk */ 0x19f0, /* VPCOMPRESSQZ256rrk */ /* Table8507 */ 0xf4c, /* VFMADDSUBPDZ256v213rmk */ 0xf4f, /* VFMADDSUBPDZ256v213rrk */ /* Table8509 */ 0xffe, /* VFMSUBADDPDZ256v213rmk */ 0x1001, /* VFMSUBADDPDZ256v213rrk */ /* Table8511 */ 0xe88, /* VFMADDPDZ256v213rmk */ 0xe8b, /* VFMADDPDZ256v213rrk */ /* Table8513 */ 0x1098, /* VFMSUBPDZ256v213rmk */ 0x109b, /* VFMSUBPDZ256v213rrk */ /* Table8515 */ 0x115c, /* VFNMADDPDZ256v213rmk */ 0x115f, /* VFNMADDPDZ256v213rrk */ /* Table8517 */ 0x1220, /* VFNMSUBPDZ256v213rmk */ 0x1223, /* VFNMSUBPDZ256v213rrk */ /* Table8519 */ 0xf55, /* VFMADDSUBPDZ256v231rmk */ 0xf58, /* VFMADDSUBPDZ256v231rrk */ /* Table8521 */ 0x1007, /* VFMSUBADDPDZ256v231rmk */ 0x100a, /* VFMSUBADDPDZ256v231rrk */ /* Table8523 */ 0xe91, /* VFMADDPDZ256v231rmk */ 0xe94, /* VFMADDPDZ256v231rrk */ /* Table8525 */ 0x10a1, /* VFMSUBPDZ256v231rmk */ 0x10a4, /* VFMSUBPDZ256v231rrk */ /* Table8527 */ 0x1165, /* VFNMADDPDZ256v231rmk */ 0x1168, /* VFNMADDPDZ256v231rrk */ /* Table8529 */ 0x1229, /* VFNMSUBPDZ256v231rmk */ 0x122c, /* VFNMSUBPDZ256v231rrk */ /* Table8531 */ 0x1d41, /* VPMOVUSDBmrk */ 0x1d43, /* VPMOVUSDBrrk */ /* Table8533 */ 0x1d4b, /* VPMOVUSQBmrk */ 0x1d4d, /* VPMOVUSQBrrk */ /* Table8535 */ 0x1d46, /* VPMOVUSDWmrk */ 0x1d48, /* VPMOVUSDWrrk */ /* Table8537 */ 0x1d55, /* VPMOVUSQWmrk */ 0x1d57, /* VPMOVUSQWrrk */ /* Table8539 */ 0x1d50, /* VPMOVUSQDmrk */ 0x1d52, /* VPMOVUSQDrrk */ /* Table8541 */ 0x1cf2, /* VPMOVSDBmrk */ 0x1cf4, /* VPMOVSDBrrk */ /* Table8543 */ 0x1cfc, /* VPMOVSQBmrk */ 0x1cfe, /* VPMOVSQBrrk */ /* Table8545 */ 0x1cf7, /* VPMOVSDWmrk */ 0x1cf9, /* VPMOVSDWrrk */ /* Table8547 */ 0x1d06, /* VPMOVSQWmrk */ 0x1d08, /* VPMOVSQWrrk */ /* Table8549 */ 0x1d01, /* VPMOVSQDmrk */ 0x1d03, /* VPMOVSQDrrk */ /* Table8551 */ 0x1ccb, /* VPMOVDBmrk */ 0x1ccd, /* VPMOVDBrrk */ /* Table8553 */ 0x1ce3, /* VPMOVQBmrk */ 0x1ce5, /* VPMOVQBrrk */ /* Table8555 */ 0x1cd0, /* VPMOVDWmrk */ 0x1cd2, /* VPMOVDWrrk */ /* Table8557 */ 0x1ced, /* VPMOVQWmrk */ 0x1cef, /* VPMOVQWrrk */ /* Table8559 */ 0x1ce8, /* VPMOVQDmrk */ 0x1cea, /* VPMOVQDrrk */ /* Table8561 */ 0xcbe, /* VBROADCASTSSZmk */ 0xcc1, /* VBROADCASTSSZrk */ /* Table8563 */ 0x1679, /* VPABSDZrmk */ 0x167c, /* VPABSDZrrk */ /* Table8565 */ 0x1d0d, /* VPMOVSXBDZrmk */ 0x1d10, /* VPMOVSXBDZrrk */ /* Table8567 */ 0x1d17, /* VPMOVSXBQZrmk */ 0x1d1a, /* VPMOVSXBQZrrk */ /* Table8569 */ 0x1d2f, /* VPMOVSXWDZrmk */ 0x1d32, /* VPMOVSXWDZrrk */ /* Table8571 */ 0x1d39, /* VPMOVSXWQZrmk */ 0x1d3c, /* VPMOVSXWQZrrk */ /* Table8573 */ 0x1d25, /* VPMOVSXDQZrmk */ 0x1d28, /* VPMOVSXDQZrrk */ /* Table8575 */ 0x1d5c, /* VPMOVZXBDZrmk */ 0x1d5f, /* VPMOVZXBDZrrk */ /* Table8577 */ 0x1d66, /* VPMOVZXBQZrmk */ 0x1d69, /* VPMOVZXBQZrrk */ /* Table8579 */ 0x1d7e, /* VPMOVZXWDZrmk */ 0x1d81, /* VPMOVZXWDZrrk */ /* Table8581 */ 0x1d88, /* VPMOVZXWQZrmk */ 0x1d8b, /* VPMOVZXWQZrrk */ /* Table8583 */ 0x1d74, /* VPMOVZXDQZrmk */ 0x1d77, /* VPMOVZXDQZrrk */ /* Table8585 */ 0x1c0d, /* VPMINSBZrmk */ 0x1c10, /* VPMINSBZrrk */ /* Table8587 */ 0x1c2c, /* VPMINSDZrmk */ 0x1c2f, /* VPMINSDZrrk */ /* Table8589 */ 0x1cc3, /* VPMINUWZrmk */ 0x1cc6, /* VPMINUWZrrk */ /* Table8591 */ 0x1c92, /* VPMINUDZrmk */ 0x1c95, /* VPMINUDZrrk */ /* Table8593 */ 0x1b41, /* VPMAXSBZrmk */ 0x1b44, /* VPMAXSBZrrk */ /* Table8595 */ 0x1b60, /* VPMAXSDZrmk */ 0x1b63, /* VPMAXSDZrrk */ /* Table8597 */ 0x1bf7, /* VPMAXUWZrmk */ 0x1bfa, /* VPMAXUWZrrk */ /* Table8599 */ 0x1bc6, /* VPMAXUDZrmk */ 0x1bc9, /* VPMAXUDZrrk */ /* Table8601 */ 0x1dc0, /* VPMULLDZrmk */ 0x1dc3, /* VPMULLDZrrk */ /* Table8603 */ 0x1afc, /* VPLZCNTDrmk */ 0x1aff, /* VPLZCNTDrrk */ /* Table8605 */ 0x1f31, /* VPSRLVDZrmk */ 0x1f34, /* VPSRLVDZrrk */ /* Table8607 */ 0x1ef5, /* VPSRAVDZrmk */ 0x1ef8, /* VPSRAVDZrrk */ /* Table8609 */ 0x1ebd, /* VPSLLVDZrmk */ 0x1ec0, /* VPSLLVDZrrk */ /* Table8611 */ 0x2061, /* VRCP14PSZmk */ 0x2064, /* VRCP14PSZrk */ /* Table8613 */ 0x20f4, /* VRSQRT14PSZmk */ 0x20f7, /* VRSQRT14PSZrk */ /* Table8615 */ 0x17c2, /* VPBLENDMDZrmk */ 0x17c5, /* VPBLENDMDZrrk */ /* Table8617 */ 0xc87, /* VBLENDMPSZrmk */ 0xc8a, /* VBLENDMPSZrrk */ /* Table8619 */ 0x17aa, /* VPBLENDMBZrmk */ 0x17ad, /* VPBLENDMBZrrk */ /* Table8621 */ 0x1a28, /* VPERMI2Drmk */ 0x1a2b, /* VPERMI2Drrk */ /* Table8623 */ 0x1a34, /* VPERMI2PSrmk */ 0x1a37, /* VPERMI2PSrrk */ /* Table8625 */ 0x0, /* */ 0x1802, /* VPBROADCASTBrZrk */ /* Table8627 */ 0x0, /* */ 0x1837, /* VPBROADCASTWrZrk */ /* Table8629 */ 0x0, /* */ 0x1813, /* VPBROADCASTDrZrk */ /* Table8631 */ 0x1a74, /* VPERMT2Drmk */ 0x1a77, /* VPERMT2Drrk */ /* Table8633 */ 0x1a80, /* VPERMT2PSrmk */ 0x1a83, /* VPERMT2PSrrk */ /* Table8635 */ 0xe42, /* VEXPANDPSZrmk */ 0xe44, /* VEXPANDPSZrrk */ /* Table8637 */ 0x1a93, /* VPEXPANDDZrmk */ 0x1a95, /* VPEXPANDDZrrk */ /* Table8639 */ 0xd08, /* VCOMPRESSPSZmrk */ 0xd09, /* VCOMPRESSPSZrrk */ /* Table8641 */ 0x19e9, /* VPCOMPRESSDZmrk */ 0x19ea, /* VPCOMPRESSDZrrk */ /* Table8643 */ 0x1aad, /* VPGATHERDDZrm */ 0x0, /* */ /* Table8645 */ 0x1ab3, /* VPGATHERQDZrm */ 0x0, /* */ /* Table8647 */ 0x12ea, /* VGATHERDPSZrm */ 0x0, /* */ /* Table8649 */ 0x12f8, /* VGATHERQPSZrm */ 0x0, /* */ /* Table8651 */ 0x1e5a, /* VPSCATTERDDZmr */ 0x0, /* */ /* Table8653 */ 0x1e5c, /* VPSCATTERQDZmr */ 0x0, /* */ /* Table8655 */ 0x2133, /* VSCATTERDPSZmr */ 0x0, /* */ /* Table8657 */ 0x213d, /* VSCATTERQPSZmr */ 0x0, /* */ /* Table8659 */ 0xfab, /* VFMADDSUBPSZv213rmk */ 0xfb1, /* VFMADDSUBPSZv213rrk */ /* Table8661 */ 0x105d, /* VFMSUBADDPSZv213rmk */ 0x1063, /* VFMSUBADDPSZv213rrk */ /* Table8663 */ 0xee7, /* VFMADDPSZv213rmk */ 0xeed, /* VFMADDPSZv213rrk */ /* Table8665 */ 0x10f7, /* VFMSUBPSZv213rmk */ 0x10fd, /* VFMSUBPSZv213rrk */ /* Table8667 */ 0x11bb, /* VFNMADDPSZv213rmk */ 0x11c1, /* VFNMADDPSZv213rrk */ /* Table8669 */ 0x127f, /* VFNMSUBPSZv213rmk */ 0x1285, /* VFNMSUBPSZv213rrk */ /* Table8671 */ 0xfb7, /* VFMADDSUBPSZv231rmk */ 0xfba, /* VFMADDSUBPSZv231rrk */ /* Table8673 */ 0x1069, /* VFMSUBADDPSZv231rmk */ 0x106c, /* VFMSUBADDPSZv231rrk */ /* Table8675 */ 0xef3, /* VFMADDPSZv231rmk */ 0xef6, /* VFMADDPSZv231rrk */ /* Table8677 */ 0x1103, /* VFMSUBPSZv231rmk */ 0x1106, /* VFMSUBPSZv231rrk */ /* Table8679 */ 0x11c7, /* VFNMADDPSZv231rmk */ 0x11ca, /* VFNMADDPSZv231rrk */ /* Table8681 */ 0x128b, /* VFNMSUBPSZv231rmk */ 0x128e, /* VFNMSUBPSZv231rrk */ /* Table8683 */ 0x1a11, /* VPCONFLICTDrmk */ 0x1a14, /* VPCONFLICTDrrk */ /* Table8685 */ 0x0, /* */ 0x12ed, /* VGATHERPF0DPSm */ 0x12f1, /* VGATHERPF1DPSm */ 0x0, /* */ 0x0, /* */ 0x2135, /* VSCATTERPF0DPSm */ 0x2139, /* VSCATTERPF1DPSm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table8701 */ 0x0, /* */ 0x12ef, /* VGATHERPF0QPSm */ 0x12f3, /* VGATHERPF1QPSm */ 0x0, /* */ 0x0, /* */ 0x2137, /* VSCATTERPF0QPSm */ 0x213b, /* VSCATTERPF1QPSm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table8717 */ 0xe26, /* VEXP2PSmk */ 0xe2c, /* VEXP2PSrk */ /* Table8719 */ 0x207a, /* VRCP28PSmk */ 0x2080, /* VRCP28PSrk */ /* Table8721 */ 0x210d, /* VRSQRT28PSmk */ 0x2113, /* VRSQRT28PSrk */ /* Table8723 */ 0xcaa, /* VBROADCASTSDZmk */ 0xcad, /* VBROADCASTSDZrk */ /* Table8725 */ 0x1686, /* VPABSQZrmk */ 0x1689, /* VPABSQZrrk */ /* Table8727 */ 0x1d95, /* VPMULDQZrmk */ 0x1d98, /* VPMULDQZrrk */ /* Table8729 */ 0x18b6, /* VPCMPEQQZrmk */ 0x18b8, /* VPCMPEQQZrrk */ /* Table8731 */ 0x190a, /* VPCMPGTQZrmk */ 0x190c, /* VPCMPGTQZrrk */ /* Table8733 */ 0x1c49, /* VPMINSQZrmk */ 0x1c4c, /* VPMINSQZrrk */ /* Table8735 */ 0x1caf, /* VPMINUQZrmk */ 0x1cb2, /* VPMINUQZrrk */ /* Table8737 */ 0x1b7d, /* VPMAXSQZrmk */ 0x1b80, /* VPMAXSQZrrk */ /* Table8739 */ 0x1be3, /* VPMAXUQZrmk */ 0x1be6, /* VPMAXUQZrrk */ /* Table8741 */ 0x1ddd, /* VPMULLQZrmk */ 0x1de0, /* VPMULLQZrrk */ /* Table8743 */ 0x1b05, /* VPLZCNTQrmk */ 0x1b08, /* VPLZCNTQrrk */ /* Table8745 */ 0x1f3b, /* VPSRLVQZrmk */ 0x1f3e, /* VPSRLVQZrrk */ /* Table8747 */ 0x1efd, /* VPSRAVQZrmk */ 0x1f00, /* VPSRAVQZrrk */ /* Table8749 */ 0x1ec7, /* VPSLLVQZrmk */ 0x1eca, /* VPSLLVQZrrk */ /* Table8751 */ 0x2046, /* VRCP14PDZmk */ 0x2049, /* VRCP14PDZrk */ /* Table8753 */ 0x20d9, /* VRSQRT14PDZmk */ 0x20dc, /* VRSQRT14PDZrk */ /* Table8755 */ 0x17da, /* VPBLENDMQZrmk */ 0x17dd, /* VPBLENDMQZrrk */ /* Table8757 */ 0xc6f, /* VBLENDMPDZrmk */ 0xc72, /* VBLENDMPDZrrk */ /* Table8759 */ 0x17ec, /* VPBLENDMWZrmk */ 0x17ef, /* VPBLENDMWZrrk */ /* Table8761 */ 0x1a3a, /* VPERMI2Qrmk */ 0x1a3d, /* VPERMI2Qrrk */ /* Table8763 */ 0x1a2e, /* VPERMI2PDrmk */ 0x1a31, /* VPERMI2PDrrk */ /* Table8765 */ 0x0, /* */ 0x182a, /* VPBROADCASTQrZrk */ /* Table8767 */ 0x1a86, /* VPERMT2Qrmk */ 0x1a89, /* VPERMT2Qrrk */ /* Table8769 */ 0x1a7a, /* VPERMT2PDrmk */ 0x1a7d, /* VPERMT2PDrrk */ /* Table8771 */ 0xe36, /* VEXPANDPDZrmk */ 0xe38, /* VEXPANDPDZrrk */ /* Table8773 */ 0x1a9f, /* VPEXPANDQZrmk */ 0x1aa1, /* VPEXPANDQZrrk */ /* Table8775 */ 0xcff, /* VCOMPRESSPDZmrk */ 0xd00, /* VCOMPRESSPDZrrk */ /* Table8777 */ 0x19f2, /* VPCOMPRESSQZmrk */ 0x19f3, /* VPCOMPRESSQZrrk */ /* Table8779 */ 0x1ab0, /* VPGATHERDQZrm */ 0x0, /* */ /* Table8781 */ 0x1ab6, /* VPGATHERQQZrm */ 0x0, /* */ /* Table8783 */ 0x12e7, /* VGATHERDPDZrm */ 0x0, /* */ /* Table8785 */ 0x12f5, /* VGATHERQPDZrm */ 0x0, /* */ /* Table8787 */ 0x1e5b, /* VPSCATTERDQZmr */ 0x0, /* */ /* Table8789 */ 0x1e5d, /* VPSCATTERQQZmr */ 0x0, /* */ /* Table8791 */ 0x2132, /* VSCATTERDPDZmr */ 0x0, /* */ /* Table8793 */ 0x213c, /* VSCATTERQPDZmr */ 0x0, /* */ /* Table8795 */ 0xf5e, /* VFMADDSUBPDZv213rmk */ 0xf64, /* VFMADDSUBPDZv213rrk */ /* Table8797 */ 0x1010, /* VFMSUBADDPDZv213rmk */ 0x1016, /* VFMSUBADDPDZv213rrk */ /* Table8799 */ 0xe9a, /* VFMADDPDZv213rmk */ 0xea0, /* VFMADDPDZv213rrk */ /* Table8801 */ 0x10aa, /* VFMSUBPDZv213rmk */ 0x10b0, /* VFMSUBPDZv213rrk */ /* Table8803 */ 0x116e, /* VFNMADDPDZv213rmk */ 0x1174, /* VFNMADDPDZv213rrk */ /* Table8805 */ 0x1232, /* VFNMSUBPDZv213rmk */ 0x1238, /* VFNMSUBPDZv213rrk */ /* Table8807 */ 0xf6a, /* VFMADDSUBPDZv231rmk */ 0xf6d, /* VFMADDSUBPDZv231rrk */ /* Table8809 */ 0x101c, /* VFMSUBADDPDZv231rmk */ 0x101f, /* VFMSUBADDPDZv231rrk */ /* Table8811 */ 0xea6, /* VFMADDPDZv231rmk */ 0xea9, /* VFMADDPDZv231rrk */ /* Table8813 */ 0x10b6, /* VFMSUBPDZv231rmk */ 0x10b9, /* VFMSUBPDZv231rrk */ /* Table8815 */ 0x117a, /* VFNMADDPDZv231rmk */ 0x117d, /* VFNMADDPDZv231rrk */ /* Table8817 */ 0x123e, /* VFNMSUBPDZv231rmk */ 0x1241, /* VFNMSUBPDZv231rrk */ /* Table8819 */ 0x1a1a, /* VPCONFLICTQrmk */ 0x1a1d, /* VPCONFLICTQrrk */ /* Table8821 */ 0x0, /* */ 0x12ec, /* VGATHERPF0DPDm */ 0x12f0, /* VGATHERPF1DPDm */ 0x0, /* */ 0x0, /* */ 0x2134, /* VSCATTERPF0DPDm */ 0x2138, /* VSCATTERPF1DPDm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table8837 */ 0x0, /* */ 0x12ee, /* VGATHERPF0QPDm */ 0x12f2, /* VGATHERPF1QPDm */ 0x0, /* */ 0x0, /* */ 0x2136, /* VSCATTERPF0QPDm */ 0x213a, /* VSCATTERPF1QPDm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table8853 */ 0xe1a, /* VEXP2PDmk */ 0xe20, /* VEXP2PDrk */ /* Table8855 */ 0x206e, /* VRCP28PDmk */ 0x2074, /* VRCP28PDrk */ /* Table8857 */ 0x2101, /* VRSQRT28PDmk */ 0x2107, /* VRSQRT28PDrk */ /* Table8859 */ 0x1c17, /* VPMINSDZ128rmb */ 0x0, /* */ /* Table8861 */ 0x1c7d, /* VPMINUDZ128rmb */ 0x0, /* */ /* Table8863 */ 0x1b4b, /* VPMAXSDZ128rmb */ 0x0, /* */ /* Table8865 */ 0x1bb1, /* VPMAXUDZ128rmb */ 0x0, /* */ /* Table8867 */ 0x1dab, /* VPMULLDZ128rmb */ 0x0, /* */ /* Table8869 */ 0x204c, /* VRCP14PSZ128mb */ 0x0, /* */ /* Table8871 */ 0x20df, /* VRSQRT14PSZ128mb */ 0x0, /* */ /* Table8873 */ 0x17b0, /* VPBLENDMDZ128rmb */ 0x0, /* */ /* Table8875 */ 0xc75, /* VBLENDMPSZ128rmb */ 0x0, /* */ /* Table8877 */ 0xf29, /* VFMADDSUB132PSZ128mb */ 0x0, /* */ /* Table8879 */ 0xfdb, /* VFMSUBADD132PSZ128mb */ 0x0, /* */ /* Table8881 */ 0xe65, /* VFMADD132PSZ128mb */ 0x0, /* */ /* Table8883 */ 0xfcf, /* VFMSUB132PSZ128mb */ 0x0, /* */ /* Table8885 */ 0x1139, /* VFNMADD132PSZ128mb */ 0x0, /* */ /* Table8887 */ 0x11fd, /* VFNMSUB132PSZ128mb */ 0x0, /* */ /* Table8889 */ 0xf84, /* VFMADDSUBPSZ128v213rmb */ 0x0, /* */ /* Table8891 */ 0x1036, /* VFMSUBADDPSZ128v213rmb */ 0x0, /* */ /* Table8893 */ 0xec0, /* VFMADDPSZ128v213rmb */ 0x0, /* */ /* Table8895 */ 0x10d0, /* VFMSUBPSZ128v213rmb */ 0x0, /* */ /* Table8897 */ 0x1194, /* VFNMADDPSZ128v213rmb */ 0x0, /* */ /* Table8899 */ 0x1258, /* VFNMSUBPSZ128v213rmb */ 0x0, /* */ /* Table8901 */ 0xf8d, /* VFMADDSUBPSZ128v231rmb */ 0x0, /* */ /* Table8903 */ 0x103f, /* VFMSUBADDPSZ128v231rmb */ 0x0, /* */ /* Table8905 */ 0xec9, /* VFMADDPSZ128v231rmb */ 0x0, /* */ /* Table8907 */ 0x10d9, /* VFMSUBPSZ128v231rmb */ 0x0, /* */ /* Table8909 */ 0x119d, /* VFNMADDPSZ128v231rmb */ 0x0, /* */ /* Table8911 */ 0x1261, /* VFNMSUBPSZ128v231rmb */ 0x0, /* */ /* Table8913 */ 0x0, /* */ 0x208f, /* VRCP28SSrb */ /* Table8915 */ 0x0, /* */ 0x2122, /* VRSQRT28SSrb */ /* Table8917 */ 0x18a8, /* VPCMPEQQZ128rmb */ 0x0, /* */ /* Table8919 */ 0x18fc, /* VPCMPGTQZ128rmb */ 0x0, /* */ /* Table8921 */ 0x1c34, /* VPMINSQZ128rmb */ 0x0, /* */ /* Table8923 */ 0x1c9a, /* VPMINUQZ128rmb */ 0x0, /* */ /* Table8925 */ 0x1b68, /* VPMAXSQZ128rmb */ 0x0, /* */ /* Table8927 */ 0x1bce, /* VPMAXUQZ128rmb */ 0x0, /* */ /* Table8929 */ 0x1dc8, /* VPMULLQZ128rmb */ 0x0, /* */ /* Table8931 */ 0x2031, /* VRCP14PDZ128mb */ 0x0, /* */ /* Table8933 */ 0x20c4, /* VRSQRT14PDZ128mb */ 0x0, /* */ /* Table8935 */ 0x17c8, /* VPBLENDMQZ128rmb */ 0x0, /* */ /* Table8937 */ 0xc5d, /* VBLENDMPDZ128rmb */ 0x0, /* */ /* Table8939 */ 0xf23, /* VFMADDSUB132PDZ128mb */ 0x0, /* */ /* Table8941 */ 0xfd5, /* VFMSUBADD132PDZ128mb */ 0x0, /* */ /* Table8943 */ 0xe5f, /* VFMADD132PDZ128mb */ 0x0, /* */ /* Table8945 */ 0xfc9, /* VFMSUB132PDZ128mb */ 0x0, /* */ /* Table8947 */ 0x1133, /* VFNMADD132PDZ128mb */ 0x0, /* */ /* Table8949 */ 0x11f7, /* VFNMSUB132PDZ128mb */ 0x0, /* */ /* Table8951 */ 0xf37, /* VFMADDSUBPDZ128v213rmb */ 0x0, /* */ /* Table8953 */ 0xfe9, /* VFMSUBADDPDZ128v213rmb */ 0x0, /* */ /* Table8955 */ 0xe73, /* VFMADDPDZ128v213rmb */ 0x0, /* */ /* Table8957 */ 0x1083, /* VFMSUBPDZ128v213rmb */ 0x0, /* */ /* Table8959 */ 0x1147, /* VFNMADDPDZ128v213rmb */ 0x0, /* */ /* Table8961 */ 0x120b, /* VFNMSUBPDZ128v213rmb */ 0x0, /* */ /* Table8963 */ 0xf40, /* VFMADDSUBPDZ128v231rmb */ 0x0, /* */ /* Table8965 */ 0xff2, /* VFMSUBADDPDZ128v231rmb */ 0x0, /* */ /* Table8967 */ 0xe7c, /* VFMADDPDZ128v231rmb */ 0x0, /* */ /* Table8969 */ 0x108c, /* VFMSUBPDZ128v231rmb */ 0x0, /* */ /* Table8971 */ 0x1150, /* VFNMADDPDZ128v231rmb */ 0x0, /* */ /* Table8973 */ 0x1214, /* VFNMSUBPDZ128v231rmb */ 0x0, /* */ /* Table8975 */ 0x0, /* */ 0x2086, /* VRCP28SDrb */ /* Table8977 */ 0x0, /* */ 0x2119, /* VRSQRT28SDrb */ /* Table8979 */ 0x1c20, /* VPMINSDZ256rmb */ 0x0, /* */ /* Table8981 */ 0x1c86, /* VPMINUDZ256rmb */ 0x0, /* */ /* Table8983 */ 0x1b54, /* VPMAXSDZ256rmb */ 0x0, /* */ /* Table8985 */ 0x1bba, /* VPMAXUDZ256rmb */ 0x0, /* */ /* Table8987 */ 0x1db4, /* VPMULLDZ256rmb */ 0x0, /* */ /* Table8989 */ 0x2055, /* VRCP14PSZ256mb */ 0x0, /* */ /* Table8991 */ 0x20e8, /* VRSQRT14PSZ256mb */ 0x0, /* */ /* Table8993 */ 0x17b8, /* VPBLENDMDZ256rmb */ 0x0, /* */ /* Table8995 */ 0xc7d, /* VBLENDMPSZ256rmb */ 0x0, /* */ /* Table8997 */ 0xf2b, /* VFMADDSUB132PSZ256mb */ 0x0, /* */ /* Table8999 */ 0xfdd, /* VFMSUBADD132PSZ256mb */ 0x0, /* */ /* Table9001 */ 0xe67, /* VFMADD132PSZ256mb */ 0x0, /* */ /* Table9003 */ 0xfd1, /* VFMSUB132PSZ256mb */ 0x0, /* */ /* Table9005 */ 0x113b, /* VFNMADD132PSZ256mb */ 0x0, /* */ /* Table9007 */ 0x11ff, /* VFNMSUB132PSZ256mb */ 0x0, /* */ /* Table9009 */ 0xf96, /* VFMADDSUBPSZ256v213rmb */ 0x0, /* */ /* Table9011 */ 0x1048, /* VFMSUBADDPSZ256v213rmb */ 0x0, /* */ /* Table9013 */ 0xed2, /* VFMADDPSZ256v213rmb */ 0x0, /* */ /* Table9015 */ 0x10e2, /* VFMSUBPSZ256v213rmb */ 0x0, /* */ /* Table9017 */ 0x11a6, /* VFNMADDPSZ256v213rmb */ 0x0, /* */ /* Table9019 */ 0x126a, /* VFNMSUBPSZ256v213rmb */ 0x0, /* */ /* Table9021 */ 0xf9f, /* VFMADDSUBPSZ256v231rmb */ 0x0, /* */ /* Table9023 */ 0x1051, /* VFMSUBADDPSZ256v231rmb */ 0x0, /* */ /* Table9025 */ 0xedb, /* VFMADDPSZ256v231rmb */ 0x0, /* */ /* Table9027 */ 0x10eb, /* VFMSUBPSZ256v231rmb */ 0x0, /* */ /* Table9029 */ 0x11af, /* VFNMADDPSZ256v231rmb */ 0x0, /* */ /* Table9031 */ 0x1273, /* VFNMSUBPSZ256v231rmb */ 0x0, /* */ /* Table9033 */ 0x18ae, /* VPCMPEQQZ256rmb */ 0x0, /* */ /* Table9035 */ 0x1902, /* VPCMPGTQZ256rmb */ 0x0, /* */ /* Table9037 */ 0x1c3d, /* VPMINSQZ256rmb */ 0x0, /* */ /* Table9039 */ 0x1ca3, /* VPMINUQZ256rmb */ 0x0, /* */ /* Table9041 */ 0x1b71, /* VPMAXSQZ256rmb */ 0x0, /* */ /* Table9043 */ 0x1bd7, /* VPMAXUQZ256rmb */ 0x0, /* */ /* Table9045 */ 0x1dd1, /* VPMULLQZ256rmb */ 0x0, /* */ /* Table9047 */ 0x203a, /* VRCP14PDZ256mb */ 0x0, /* */ /* Table9049 */ 0x20cd, /* VRSQRT14PDZ256mb */ 0x0, /* */ /* Table9051 */ 0x17d0, /* VPBLENDMQZ256rmb */ 0x0, /* */ /* Table9053 */ 0xc65, /* VBLENDMPDZ256rmb */ 0x0, /* */ /* Table9055 */ 0xf25, /* VFMADDSUB132PDZ256mb */ 0x0, /* */ /* Table9057 */ 0xfd7, /* VFMSUBADD132PDZ256mb */ 0x0, /* */ /* Table9059 */ 0xe61, /* VFMADD132PDZ256mb */ 0x0, /* */ /* Table9061 */ 0xfcb, /* VFMSUB132PDZ256mb */ 0x0, /* */ /* Table9063 */ 0x1135, /* VFNMADD132PDZ256mb */ 0x0, /* */ /* Table9065 */ 0x11f9, /* VFNMSUB132PDZ256mb */ 0x0, /* */ /* Table9067 */ 0xf49, /* VFMADDSUBPDZ256v213rmb */ 0x0, /* */ /* Table9069 */ 0xffb, /* VFMSUBADDPDZ256v213rmb */ 0x0, /* */ /* Table9071 */ 0xe85, /* VFMADDPDZ256v213rmb */ 0x0, /* */ /* Table9073 */ 0x1095, /* VFMSUBPDZ256v213rmb */ 0x0, /* */ /* Table9075 */ 0x1159, /* VFNMADDPDZ256v213rmb */ 0x0, /* */ /* Table9077 */ 0x121d, /* VFNMSUBPDZ256v213rmb */ 0x0, /* */ /* Table9079 */ 0xf52, /* VFMADDSUBPDZ256v231rmb */ 0x0, /* */ /* Table9081 */ 0x1004, /* VFMSUBADDPDZ256v231rmb */ 0x0, /* */ /* Table9083 */ 0xe8e, /* VFMADDPDZ256v231rmb */ 0x0, /* */ /* Table9085 */ 0x109e, /* VFMSUBPDZ256v231rmb */ 0x0, /* */ /* Table9087 */ 0x1162, /* VFNMADDPDZ256v231rmb */ 0x0, /* */ /* Table9089 */ 0x1226, /* VFNMSUBPDZ256v231rmb */ 0x0, /* */ /* Table9091 */ 0x1676, /* VPABSDZrmb */ 0x0, /* */ /* Table9093 */ 0x1c29, /* VPMINSDZrmb */ 0x0, /* */ /* Table9095 */ 0x1c8f, /* VPMINUDZrmb */ 0x0, /* */ /* Table9097 */ 0x1b5d, /* VPMAXSDZrmb */ 0x0, /* */ /* Table9099 */ 0x1bc3, /* VPMAXUDZrmb */ 0x0, /* */ /* Table9101 */ 0x1dbd, /* VPMULLDZrmb */ 0x0, /* */ /* Table9103 */ 0x1af9, /* VPLZCNTDrmb */ 0x0, /* */ /* Table9105 */ 0x205e, /* VRCP14PSZmb */ 0x0, /* */ /* Table9107 */ 0x20f1, /* VRSQRT14PSZmb */ 0x0, /* */ /* Table9109 */ 0x17c0, /* VPBLENDMDZrmb */ 0x0, /* */ /* Table9111 */ 0xc85, /* VBLENDMPSZrmb */ 0x0, /* */ /* Table9113 */ 0xf2d, /* VFMADDSUB132PSZmb */ 0x0, /* */ /* Table9115 */ 0xfdf, /* VFMSUBADD132PSZmb */ 0x0, /* */ /* Table9117 */ 0xe69, /* VFMADD132PSZmb */ 0x0, /* */ /* Table9119 */ 0xfd3, /* VFMSUB132PSZmb */ 0x0, /* */ /* Table9121 */ 0x113d, /* VFNMADD132PSZmb */ 0x0, /* */ /* Table9123 */ 0x1201, /* VFNMSUB132PSZmb */ 0x0, /* */ /* Table9125 */ 0xfa8, /* VFMADDSUBPSZv213rmb */ 0xfae, /* VFMADDSUBPSZv213rrb */ /* Table9127 */ 0x105a, /* VFMSUBADDPSZv213rmb */ 0x1060, /* VFMSUBADDPSZv213rrb */ /* Table9129 */ 0xee4, /* VFMADDPSZv213rmb */ 0xeea, /* VFMADDPSZv213rrb */ /* Table9131 */ 0x10f4, /* VFMSUBPSZv213rmb */ 0x10fa, /* VFMSUBPSZv213rrb */ /* Table9133 */ 0x11b8, /* VFNMADDPSZv213rmb */ 0x11be, /* VFNMADDPSZv213rrb */ /* Table9135 */ 0x127c, /* VFNMSUBPSZv213rmb */ 0x1282, /* VFNMSUBPSZv213rrb */ /* Table9137 */ 0xfb4, /* VFMADDSUBPSZv231rmb */ 0x0, /* */ /* Table9139 */ 0x1066, /* VFMSUBADDPSZv231rmb */ 0x0, /* */ /* Table9141 */ 0xef0, /* VFMADDPSZv231rmb */ 0x0, /* */ /* Table9143 */ 0x1100, /* VFMSUBPSZv231rmb */ 0x0, /* */ /* Table9145 */ 0x11c4, /* VFNMADDPSZv231rmb */ 0x0, /* */ /* Table9147 */ 0x1288, /* VFNMSUBPSZv231rmb */ 0x0, /* */ /* Table9149 */ 0x1a0e, /* VPCONFLICTDrmb */ 0x0, /* */ /* Table9151 */ 0xe23, /* VEXP2PSmb */ 0xe29, /* VEXP2PSrb */ /* Table9153 */ 0x2077, /* VRCP28PSmb */ 0x207d, /* VRCP28PSrb */ /* Table9155 */ 0x210a, /* VRSQRT28PSmb */ 0x2110, /* VRSQRT28PSrb */ /* Table9157 */ 0x1683, /* VPABSQZrmb */ 0x0, /* */ /* Table9159 */ 0x1d92, /* VPMULDQZrmb */ 0x0, /* */ /* Table9161 */ 0x18b4, /* VPCMPEQQZrmb */ 0x0, /* */ /* Table9163 */ 0x1908, /* VPCMPGTQZrmb */ 0x0, /* */ /* Table9165 */ 0x1c46, /* VPMINSQZrmb */ 0x0, /* */ /* Table9167 */ 0x1cac, /* VPMINUQZrmb */ 0x0, /* */ /* Table9169 */ 0x1b7a, /* VPMAXSQZrmb */ 0x0, /* */ /* Table9171 */ 0x1be0, /* VPMAXUQZrmb */ 0x0, /* */ /* Table9173 */ 0x1dda, /* VPMULLQZrmb */ 0x0, /* */ /* Table9175 */ 0x1b02, /* VPLZCNTQrmb */ 0x0, /* */ /* Table9177 */ 0x2043, /* VRCP14PDZmb */ 0x0, /* */ /* Table9179 */ 0x20d6, /* VRSQRT14PDZmb */ 0x0, /* */ /* Table9181 */ 0x17d8, /* VPBLENDMQZrmb */ 0x0, /* */ /* Table9183 */ 0xc6d, /* VBLENDMPDZrmb */ 0x0, /* */ /* Table9185 */ 0xf27, /* VFMADDSUB132PDZmb */ 0x0, /* */ /* Table9187 */ 0xfd9, /* VFMSUBADD132PDZmb */ 0x0, /* */ /* Table9189 */ 0xe63, /* VFMADD132PDZmb */ 0x0, /* */ /* Table9191 */ 0xfcd, /* VFMSUB132PDZmb */ 0x0, /* */ /* Table9193 */ 0x1137, /* VFNMADD132PDZmb */ 0x0, /* */ /* Table9195 */ 0x11fb, /* VFNMSUB132PDZmb */ 0x0, /* */ /* Table9197 */ 0xf5b, /* VFMADDSUBPDZv213rmb */ 0xf61, /* VFMADDSUBPDZv213rrb */ /* Table9199 */ 0x100d, /* VFMSUBADDPDZv213rmb */ 0x1013, /* VFMSUBADDPDZv213rrb */ /* Table9201 */ 0xe97, /* VFMADDPDZv213rmb */ 0xe9d, /* VFMADDPDZv213rrb */ /* Table9203 */ 0x10a7, /* VFMSUBPDZv213rmb */ 0x10ad, /* VFMSUBPDZv213rrb */ /* Table9205 */ 0x116b, /* VFNMADDPDZv213rmb */ 0x1171, /* VFNMADDPDZv213rrb */ /* Table9207 */ 0x122f, /* VFNMSUBPDZv213rmb */ 0x1235, /* VFNMSUBPDZv213rrb */ /* Table9209 */ 0xf67, /* VFMADDSUBPDZv231rmb */ 0x0, /* */ /* Table9211 */ 0x1019, /* VFMSUBADDPDZv231rmb */ 0x0, /* */ /* Table9213 */ 0xea3, /* VFMADDPDZv231rmb */ 0x0, /* */ /* Table9215 */ 0x10b3, /* VFMSUBPDZv231rmb */ 0x0, /* */ /* Table9217 */ 0x1177, /* VFNMADDPDZv231rmb */ 0x0, /* */ /* Table9219 */ 0x123b, /* VFNMSUBPDZv231rmb */ 0x0, /* */ /* Table9221 */ 0x1a17, /* VPCONFLICTQrmb */ 0x0, /* */ /* Table9223 */ 0xe17, /* VEXP2PDmb */ 0xe1d, /* VEXP2PDrb */ /* Table9225 */ 0x206b, /* VRCP28PDmb */ 0x2071, /* VRCP28PDrb */ /* Table9227 */ 0x20fe, /* VRSQRT28PDmb */ 0x2104, /* VRSQRT28PDrb */ /* Table9229 */ 0x1c18, /* VPMINSDZ128rmbk */ 0x0, /* */ /* Table9231 */ 0x1c7e, /* VPMINUDZ128rmbk */ 0x0, /* */ /* Table9233 */ 0x1b4c, /* VPMAXSDZ128rmbk */ 0x0, /* */ /* Table9235 */ 0x1bb2, /* VPMAXUDZ128rmbk */ 0x0, /* */ /* Table9237 */ 0x1dac, /* VPMULLDZ128rmbk */ 0x0, /* */ /* Table9239 */ 0x204d, /* VRCP14PSZ128mbk */ 0x0, /* */ /* Table9241 */ 0x20e0, /* VRSQRT14PSZ128mbk */ 0x0, /* */ /* Table9243 */ 0x17b1, /* VPBLENDMDZ128rmbk */ 0x0, /* */ /* Table9245 */ 0xc76, /* VBLENDMPSZ128rmbk */ 0x0, /* */ /* Table9247 */ 0xf85, /* VFMADDSUBPSZ128v213rmbk */ 0x0, /* */ /* Table9249 */ 0x1037, /* VFMSUBADDPSZ128v213rmbk */ 0x0, /* */ /* Table9251 */ 0xec1, /* VFMADDPSZ128v213rmbk */ 0x0, /* */ /* Table9253 */ 0x10d1, /* VFMSUBPSZ128v213rmbk */ 0x0, /* */ /* Table9255 */ 0x1195, /* VFNMADDPSZ128v213rmbk */ 0x0, /* */ /* Table9257 */ 0x1259, /* VFNMSUBPSZ128v213rmbk */ 0x0, /* */ /* Table9259 */ 0xf8e, /* VFMADDSUBPSZ128v231rmbk */ 0x0, /* */ /* Table9261 */ 0x1040, /* VFMSUBADDPSZ128v231rmbk */ 0x0, /* */ /* Table9263 */ 0xeca, /* VFMADDPSZ128v231rmbk */ 0x0, /* */ /* Table9265 */ 0x10da, /* VFMSUBPSZ128v231rmbk */ 0x0, /* */ /* Table9267 */ 0x119e, /* VFNMADDPSZ128v231rmbk */ 0x0, /* */ /* Table9269 */ 0x1262, /* VFNMSUBPSZ128v231rmbk */ 0x0, /* */ /* Table9271 */ 0x0, /* */ 0x2090, /* VRCP28SSrbk */ /* Table9273 */ 0x0, /* */ 0x2123, /* VRSQRT28SSrbk */ /* Table9275 */ 0x18a9, /* VPCMPEQQZ128rmbk */ 0x0, /* */ /* Table9277 */ 0x18fd, /* VPCMPGTQZ128rmbk */ 0x0, /* */ /* Table9279 */ 0x1c35, /* VPMINSQZ128rmbk */ 0x0, /* */ /* Table9281 */ 0x1c9b, /* VPMINUQZ128rmbk */ 0x0, /* */ /* Table9283 */ 0x1b69, /* VPMAXSQZ128rmbk */ 0x0, /* */ /* Table9285 */ 0x1bcf, /* VPMAXUQZ128rmbk */ 0x0, /* */ /* Table9287 */ 0x1dc9, /* VPMULLQZ128rmbk */ 0x0, /* */ /* Table9289 */ 0x2032, /* VRCP14PDZ128mbk */ 0x0, /* */ /* Table9291 */ 0x20c5, /* VRSQRT14PDZ128mbk */ 0x0, /* */ /* Table9293 */ 0x17c9, /* VPBLENDMQZ128rmbk */ 0x0, /* */ /* Table9295 */ 0xc5e, /* VBLENDMPDZ128rmbk */ 0x0, /* */ /* Table9297 */ 0xf38, /* VFMADDSUBPDZ128v213rmbk */ 0x0, /* */ /* Table9299 */ 0xfea, /* VFMSUBADDPDZ128v213rmbk */ 0x0, /* */ /* Table9301 */ 0xe74, /* VFMADDPDZ128v213rmbk */ 0x0, /* */ /* Table9303 */ 0x1084, /* VFMSUBPDZ128v213rmbk */ 0x0, /* */ /* Table9305 */ 0x1148, /* VFNMADDPDZ128v213rmbk */ 0x0, /* */ /* Table9307 */ 0x120c, /* VFNMSUBPDZ128v213rmbk */ 0x0, /* */ /* Table9309 */ 0xf41, /* VFMADDSUBPDZ128v231rmbk */ 0x0, /* */ /* Table9311 */ 0xff3, /* VFMSUBADDPDZ128v231rmbk */ 0x0, /* */ /* Table9313 */ 0xe7d, /* VFMADDPDZ128v231rmbk */ 0x0, /* */ /* Table9315 */ 0x108d, /* VFMSUBPDZ128v231rmbk */ 0x0, /* */ /* Table9317 */ 0x1151, /* VFNMADDPDZ128v231rmbk */ 0x0, /* */ /* Table9319 */ 0x1215, /* VFNMSUBPDZ128v231rmbk */ 0x0, /* */ /* Table9321 */ 0x0, /* */ 0x2087, /* VRCP28SDrbk */ /* Table9323 */ 0x0, /* */ 0x211a, /* VRSQRT28SDrbk */ /* Table9325 */ 0x1c21, /* VPMINSDZ256rmbk */ 0x0, /* */ /* Table9327 */ 0x1c87, /* VPMINUDZ256rmbk */ 0x0, /* */ /* Table9329 */ 0x1b55, /* VPMAXSDZ256rmbk */ 0x0, /* */ /* Table9331 */ 0x1bbb, /* VPMAXUDZ256rmbk */ 0x0, /* */ /* Table9333 */ 0x1db5, /* VPMULLDZ256rmbk */ 0x0, /* */ /* Table9335 */ 0x2056, /* VRCP14PSZ256mbk */ 0x0, /* */ /* Table9337 */ 0x20e9, /* VRSQRT14PSZ256mbk */ 0x0, /* */ /* Table9339 */ 0x17b9, /* VPBLENDMDZ256rmbk */ 0x0, /* */ /* Table9341 */ 0xc7e, /* VBLENDMPSZ256rmbk */ 0x0, /* */ /* Table9343 */ 0xf97, /* VFMADDSUBPSZ256v213rmbk */ 0x0, /* */ /* Table9345 */ 0x1049, /* VFMSUBADDPSZ256v213rmbk */ 0x0, /* */ /* Table9347 */ 0xed3, /* VFMADDPSZ256v213rmbk */ 0x0, /* */ /* Table9349 */ 0x10e3, /* VFMSUBPSZ256v213rmbk */ 0x0, /* */ /* Table9351 */ 0x11a7, /* VFNMADDPSZ256v213rmbk */ 0x0, /* */ /* Table9353 */ 0x126b, /* VFNMSUBPSZ256v213rmbk */ 0x0, /* */ /* Table9355 */ 0xfa0, /* VFMADDSUBPSZ256v231rmbk */ 0x0, /* */ /* Table9357 */ 0x1052, /* VFMSUBADDPSZ256v231rmbk */ 0x0, /* */ /* Table9359 */ 0xedc, /* VFMADDPSZ256v231rmbk */ 0x0, /* */ /* Table9361 */ 0x10ec, /* VFMSUBPSZ256v231rmbk */ 0x0, /* */ /* Table9363 */ 0x11b0, /* VFNMADDPSZ256v231rmbk */ 0x0, /* */ /* Table9365 */ 0x1274, /* VFNMSUBPSZ256v231rmbk */ 0x0, /* */ /* Table9367 */ 0x18af, /* VPCMPEQQZ256rmbk */ 0x0, /* */ /* Table9369 */ 0x1903, /* VPCMPGTQZ256rmbk */ 0x0, /* */ /* Table9371 */ 0x1c3e, /* VPMINSQZ256rmbk */ 0x0, /* */ /* Table9373 */ 0x1ca4, /* VPMINUQZ256rmbk */ 0x0, /* */ /* Table9375 */ 0x1b72, /* VPMAXSQZ256rmbk */ 0x0, /* */ /* Table9377 */ 0x1bd8, /* VPMAXUQZ256rmbk */ 0x0, /* */ /* Table9379 */ 0x1dd2, /* VPMULLQZ256rmbk */ 0x0, /* */ /* Table9381 */ 0x203b, /* VRCP14PDZ256mbk */ 0x0, /* */ /* Table9383 */ 0x20ce, /* VRSQRT14PDZ256mbk */ 0x0, /* */ /* Table9385 */ 0x17d1, /* VPBLENDMQZ256rmbk */ 0x0, /* */ /* Table9387 */ 0xc66, /* VBLENDMPDZ256rmbk */ 0x0, /* */ /* Table9389 */ 0xf4a, /* VFMADDSUBPDZ256v213rmbk */ 0x0, /* */ /* Table9391 */ 0xffc, /* VFMSUBADDPDZ256v213rmbk */ 0x0, /* */ /* Table9393 */ 0xe86, /* VFMADDPDZ256v213rmbk */ 0x0, /* */ /* Table9395 */ 0x1096, /* VFMSUBPDZ256v213rmbk */ 0x0, /* */ /* Table9397 */ 0x115a, /* VFNMADDPDZ256v213rmbk */ 0x0, /* */ /* Table9399 */ 0x121e, /* VFNMSUBPDZ256v213rmbk */ 0x0, /* */ /* Table9401 */ 0xf53, /* VFMADDSUBPDZ256v231rmbk */ 0x0, /* */ /* Table9403 */ 0x1005, /* VFMSUBADDPDZ256v231rmbk */ 0x0, /* */ /* Table9405 */ 0xe8f, /* VFMADDPDZ256v231rmbk */ 0x0, /* */ /* Table9407 */ 0x109f, /* VFMSUBPDZ256v231rmbk */ 0x0, /* */ /* Table9409 */ 0x1163, /* VFNMADDPDZ256v231rmbk */ 0x0, /* */ /* Table9411 */ 0x1227, /* VFNMSUBPDZ256v231rmbk */ 0x0, /* */ /* Table9413 */ 0x1677, /* VPABSDZrmbk */ 0x0, /* */ /* Table9415 */ 0x1c2a, /* VPMINSDZrmbk */ 0x0, /* */ /* Table9417 */ 0x1c90, /* VPMINUDZrmbk */ 0x0, /* */ /* Table9419 */ 0x1b5e, /* VPMAXSDZrmbk */ 0x0, /* */ /* Table9421 */ 0x1bc4, /* VPMAXUDZrmbk */ 0x0, /* */ /* Table9423 */ 0x1dbe, /* VPMULLDZrmbk */ 0x0, /* */ /* Table9425 */ 0x1afa, /* VPLZCNTDrmbk */ 0x0, /* */ /* Table9427 */ 0x205f, /* VRCP14PSZmbk */ 0x0, /* */ /* Table9429 */ 0x20f2, /* VRSQRT14PSZmbk */ 0x0, /* */ /* Table9431 */ 0x17c1, /* VPBLENDMDZrmbk */ 0x0, /* */ /* Table9433 */ 0xc86, /* VBLENDMPSZrmbk */ 0x0, /* */ /* Table9435 */ 0xfa9, /* VFMADDSUBPSZv213rmbk */ 0xfaf, /* VFMADDSUBPSZv213rrbk */ /* Table9437 */ 0x105b, /* VFMSUBADDPSZv213rmbk */ 0x1061, /* VFMSUBADDPSZv213rrbk */ /* Table9439 */ 0xee5, /* VFMADDPSZv213rmbk */ 0xeeb, /* VFMADDPSZv213rrbk */ /* Table9441 */ 0x10f5, /* VFMSUBPSZv213rmbk */ 0x10fb, /* VFMSUBPSZv213rrbk */ /* Table9443 */ 0x11b9, /* VFNMADDPSZv213rmbk */ 0x11bf, /* VFNMADDPSZv213rrbk */ /* Table9445 */ 0x127d, /* VFNMSUBPSZv213rmbk */ 0x1283, /* VFNMSUBPSZv213rrbk */ /* Table9447 */ 0xfb5, /* VFMADDSUBPSZv231rmbk */ 0x0, /* */ /* Table9449 */ 0x1067, /* VFMSUBADDPSZv231rmbk */ 0x0, /* */ /* Table9451 */ 0xef1, /* VFMADDPSZv231rmbk */ 0x0, /* */ /* Table9453 */ 0x1101, /* VFMSUBPSZv231rmbk */ 0x0, /* */ /* Table9455 */ 0x11c5, /* VFNMADDPSZv231rmbk */ 0x0, /* */ /* Table9457 */ 0x1289, /* VFNMSUBPSZv231rmbk */ 0x0, /* */ /* Table9459 */ 0x1a0f, /* VPCONFLICTDrmbk */ 0x0, /* */ /* Table9461 */ 0xe24, /* VEXP2PSmbk */ 0xe2a, /* VEXP2PSrbk */ /* Table9463 */ 0x2078, /* VRCP28PSmbk */ 0x207e, /* VRCP28PSrbk */ /* Table9465 */ 0x210b, /* VRSQRT28PSmbk */ 0x2111, /* VRSQRT28PSrbk */ /* Table9467 */ 0x1684, /* VPABSQZrmbk */ 0x0, /* */ /* Table9469 */ 0x1d93, /* VPMULDQZrmbk */ 0x0, /* */ /* Table9471 */ 0x18b5, /* VPCMPEQQZrmbk */ 0x0, /* */ /* Table9473 */ 0x1909, /* VPCMPGTQZrmbk */ 0x0, /* */ /* Table9475 */ 0x1c47, /* VPMINSQZrmbk */ 0x0, /* */ /* Table9477 */ 0x1cad, /* VPMINUQZrmbk */ 0x0, /* */ /* Table9479 */ 0x1b7b, /* VPMAXSQZrmbk */ 0x0, /* */ /* Table9481 */ 0x1be1, /* VPMAXUQZrmbk */ 0x0, /* */ /* Table9483 */ 0x1ddb, /* VPMULLQZrmbk */ 0x0, /* */ /* Table9485 */ 0x1b03, /* VPLZCNTQrmbk */ 0x0, /* */ /* Table9487 */ 0x2044, /* VRCP14PDZmbk */ 0x0, /* */ /* Table9489 */ 0x20d7, /* VRSQRT14PDZmbk */ 0x0, /* */ /* Table9491 */ 0x17d9, /* VPBLENDMQZrmbk */ 0x0, /* */ /* Table9493 */ 0xc6e, /* VBLENDMPDZrmbk */ 0x0, /* */ /* Table9495 */ 0xf5c, /* VFMADDSUBPDZv213rmbk */ 0xf62, /* VFMADDSUBPDZv213rrbk */ /* Table9497 */ 0x100e, /* VFMSUBADDPDZv213rmbk */ 0x1014, /* VFMSUBADDPDZv213rrbk */ /* Table9499 */ 0xe98, /* VFMADDPDZv213rmbk */ 0xe9e, /* VFMADDPDZv213rrbk */ /* Table9501 */ 0x10a8, /* VFMSUBPDZv213rmbk */ 0x10ae, /* VFMSUBPDZv213rrbk */ /* Table9503 */ 0x116c, /* VFNMADDPDZv213rmbk */ 0x1172, /* VFNMADDPDZv213rrbk */ /* Table9505 */ 0x1230, /* VFNMSUBPDZv213rmbk */ 0x1236, /* VFNMSUBPDZv213rrbk */ /* Table9507 */ 0xf68, /* VFMADDSUBPDZv231rmbk */ 0x0, /* */ /* Table9509 */ 0x101a, /* VFMSUBADDPDZv231rmbk */ 0x0, /* */ /* Table9511 */ 0xea4, /* VFMADDPDZv231rmbk */ 0x0, /* */ /* Table9513 */ 0x10b4, /* VFMSUBPDZv231rmbk */ 0x0, /* */ /* Table9515 */ 0x1178, /* VFNMADDPDZv231rmbk */ 0x0, /* */ /* Table9517 */ 0x123c, /* VFNMSUBPDZv231rmbk */ 0x0, /* */ /* Table9519 */ 0x1a18, /* VPCONFLICTQrmbk */ 0x0, /* */ /* Table9521 */ 0xe18, /* VEXP2PDmbk */ 0xe1e, /* VEXP2PDrbk */ /* Table9523 */ 0x206c, /* VRCP28PDmbk */ 0x2072, /* VRCP28PDrbk */ /* Table9525 */ 0x20ff, /* VRSQRT28PDmbk */ 0x2105, /* VRSQRT28PDrbk */ /* Table9527 */ 0x1c19, /* VPMINSDZ128rmbkz */ 0x0, /* */ /* Table9529 */ 0x1c7f, /* VPMINUDZ128rmbkz */ 0x0, /* */ /* Table9531 */ 0x1b4d, /* VPMAXSDZ128rmbkz */ 0x0, /* */ /* Table9533 */ 0x1bb3, /* VPMAXUDZ128rmbkz */ 0x0, /* */ /* Table9535 */ 0x1dad, /* VPMULLDZ128rmbkz */ 0x0, /* */ /* Table9537 */ 0x204e, /* VRCP14PSZ128mbkz */ 0x0, /* */ /* Table9539 */ 0x20e1, /* VRSQRT14PSZ128mbkz */ 0x0, /* */ /* Table9541 */ 0xf86, /* VFMADDSUBPSZ128v213rmbkz */ 0x0, /* */ /* Table9543 */ 0x1038, /* VFMSUBADDPSZ128v213rmbkz */ 0x0, /* */ /* Table9545 */ 0xec2, /* VFMADDPSZ128v213rmbkz */ 0x0, /* */ /* Table9547 */ 0x10d2, /* VFMSUBPSZ128v213rmbkz */ 0x0, /* */ /* Table9549 */ 0x1196, /* VFNMADDPSZ128v213rmbkz */ 0x0, /* */ /* Table9551 */ 0x125a, /* VFNMSUBPSZ128v213rmbkz */ 0x0, /* */ /* Table9553 */ 0xf8f, /* VFMADDSUBPSZ128v231rmbkz */ 0x0, /* */ /* Table9555 */ 0x1041, /* VFMSUBADDPSZ128v231rmbkz */ 0x0, /* */ /* Table9557 */ 0xecb, /* VFMADDPSZ128v231rmbkz */ 0x0, /* */ /* Table9559 */ 0x10db, /* VFMSUBPSZ128v231rmbkz */ 0x0, /* */ /* Table9561 */ 0x119f, /* VFNMADDPSZ128v231rmbkz */ 0x0, /* */ /* Table9563 */ 0x1263, /* VFNMSUBPSZ128v231rmbkz */ 0x0, /* */ /* Table9565 */ 0x0, /* */ 0x2091, /* VRCP28SSrbkz */ /* Table9567 */ 0x0, /* */ 0x2124, /* VRSQRT28SSrbkz */ /* Table9569 */ 0x1c36, /* VPMINSQZ128rmbkz */ 0x0, /* */ /* Table9571 */ 0x1c9c, /* VPMINUQZ128rmbkz */ 0x0, /* */ /* Table9573 */ 0x1b6a, /* VPMAXSQZ128rmbkz */ 0x0, /* */ /* Table9575 */ 0x1bd0, /* VPMAXUQZ128rmbkz */ 0x0, /* */ /* Table9577 */ 0x1dca, /* VPMULLQZ128rmbkz */ 0x0, /* */ /* Table9579 */ 0x2033, /* VRCP14PDZ128mbkz */ 0x0, /* */ /* Table9581 */ 0x20c6, /* VRSQRT14PDZ128mbkz */ 0x0, /* */ /* Table9583 */ 0xf39, /* VFMADDSUBPDZ128v213rmbkz */ 0x0, /* */ /* Table9585 */ 0xfeb, /* VFMSUBADDPDZ128v213rmbkz */ 0x0, /* */ /* Table9587 */ 0xe75, /* VFMADDPDZ128v213rmbkz */ 0x0, /* */ /* Table9589 */ 0x1085, /* VFMSUBPDZ128v213rmbkz */ 0x0, /* */ /* Table9591 */ 0x1149, /* VFNMADDPDZ128v213rmbkz */ 0x0, /* */ /* Table9593 */ 0x120d, /* VFNMSUBPDZ128v213rmbkz */ 0x0, /* */ /* Table9595 */ 0xf42, /* VFMADDSUBPDZ128v231rmbkz */ 0x0, /* */ /* Table9597 */ 0xff4, /* VFMSUBADDPDZ128v231rmbkz */ 0x0, /* */ /* Table9599 */ 0xe7e, /* VFMADDPDZ128v231rmbkz */ 0x0, /* */ /* Table9601 */ 0x108e, /* VFMSUBPDZ128v231rmbkz */ 0x0, /* */ /* Table9603 */ 0x1152, /* VFNMADDPDZ128v231rmbkz */ 0x0, /* */ /* Table9605 */ 0x1216, /* VFNMSUBPDZ128v231rmbkz */ 0x0, /* */ /* Table9607 */ 0x0, /* */ 0x2088, /* VRCP28SDrbkz */ /* Table9609 */ 0x0, /* */ 0x211b, /* VRSQRT28SDrbkz */ /* Table9611 */ 0x1c22, /* VPMINSDZ256rmbkz */ 0x0, /* */ /* Table9613 */ 0x1c88, /* VPMINUDZ256rmbkz */ 0x0, /* */ /* Table9615 */ 0x1b56, /* VPMAXSDZ256rmbkz */ 0x0, /* */ /* Table9617 */ 0x1bbc, /* VPMAXUDZ256rmbkz */ 0x0, /* */ /* Table9619 */ 0x1db6, /* VPMULLDZ256rmbkz */ 0x0, /* */ /* Table9621 */ 0x2057, /* VRCP14PSZ256mbkz */ 0x0, /* */ /* Table9623 */ 0x20ea, /* VRSQRT14PSZ256mbkz */ 0x0, /* */ /* Table9625 */ 0xf98, /* VFMADDSUBPSZ256v213rmbkz */ 0x0, /* */ /* Table9627 */ 0x104a, /* VFMSUBADDPSZ256v213rmbkz */ 0x0, /* */ /* Table9629 */ 0xed4, /* VFMADDPSZ256v213rmbkz */ 0x0, /* */ /* Table9631 */ 0x10e4, /* VFMSUBPSZ256v213rmbkz */ 0x0, /* */ /* Table9633 */ 0x11a8, /* VFNMADDPSZ256v213rmbkz */ 0x0, /* */ /* Table9635 */ 0x126c, /* VFNMSUBPSZ256v213rmbkz */ 0x0, /* */ /* Table9637 */ 0xfa1, /* VFMADDSUBPSZ256v231rmbkz */ 0x0, /* */ /* Table9639 */ 0x1053, /* VFMSUBADDPSZ256v231rmbkz */ 0x0, /* */ /* Table9641 */ 0xedd, /* VFMADDPSZ256v231rmbkz */ 0x0, /* */ /* Table9643 */ 0x10ed, /* VFMSUBPSZ256v231rmbkz */ 0x0, /* */ /* Table9645 */ 0x11b1, /* VFNMADDPSZ256v231rmbkz */ 0x0, /* */ /* Table9647 */ 0x1275, /* VFNMSUBPSZ256v231rmbkz */ 0x0, /* */ /* Table9649 */ 0x1c3f, /* VPMINSQZ256rmbkz */ 0x0, /* */ /* Table9651 */ 0x1ca5, /* VPMINUQZ256rmbkz */ 0x0, /* */ /* Table9653 */ 0x1b73, /* VPMAXSQZ256rmbkz */ 0x0, /* */ /* Table9655 */ 0x1bd9, /* VPMAXUQZ256rmbkz */ 0x0, /* */ /* Table9657 */ 0x1dd3, /* VPMULLQZ256rmbkz */ 0x0, /* */ /* Table9659 */ 0x203c, /* VRCP14PDZ256mbkz */ 0x0, /* */ /* Table9661 */ 0x20cf, /* VRSQRT14PDZ256mbkz */ 0x0, /* */ /* Table9663 */ 0xf4b, /* VFMADDSUBPDZ256v213rmbkz */ 0x0, /* */ /* Table9665 */ 0xffd, /* VFMSUBADDPDZ256v213rmbkz */ 0x0, /* */ /* Table9667 */ 0xe87, /* VFMADDPDZ256v213rmbkz */ 0x0, /* */ /* Table9669 */ 0x1097, /* VFMSUBPDZ256v213rmbkz */ 0x0, /* */ /* Table9671 */ 0x115b, /* VFNMADDPDZ256v213rmbkz */ 0x0, /* */ /* Table9673 */ 0x121f, /* VFNMSUBPDZ256v213rmbkz */ 0x0, /* */ /* Table9675 */ 0xf54, /* VFMADDSUBPDZ256v231rmbkz */ 0x0, /* */ /* Table9677 */ 0x1006, /* VFMSUBADDPDZ256v231rmbkz */ 0x0, /* */ /* Table9679 */ 0xe90, /* VFMADDPDZ256v231rmbkz */ 0x0, /* */ /* Table9681 */ 0x10a0, /* VFMSUBPDZ256v231rmbkz */ 0x0, /* */ /* Table9683 */ 0x1164, /* VFNMADDPDZ256v231rmbkz */ 0x0, /* */ /* Table9685 */ 0x1228, /* VFNMSUBPDZ256v231rmbkz */ 0x0, /* */ /* Table9687 */ 0x1678, /* VPABSDZrmbkz */ 0x0, /* */ /* Table9689 */ 0x1c2b, /* VPMINSDZrmbkz */ 0x0, /* */ /* Table9691 */ 0x1c91, /* VPMINUDZrmbkz */ 0x0, /* */ /* Table9693 */ 0x1b5f, /* VPMAXSDZrmbkz */ 0x0, /* */ /* Table9695 */ 0x1bc5, /* VPMAXUDZrmbkz */ 0x0, /* */ /* Table9697 */ 0x1dbf, /* VPMULLDZrmbkz */ 0x0, /* */ /* Table9699 */ 0x1afb, /* VPLZCNTDrmbkz */ 0x0, /* */ /* Table9701 */ 0x2060, /* VRCP14PSZmbkz */ 0x0, /* */ /* Table9703 */ 0x20f3, /* VRSQRT14PSZmbkz */ 0x0, /* */ /* Table9705 */ 0xfaa, /* VFMADDSUBPSZv213rmbkz */ 0xfb0, /* VFMADDSUBPSZv213rrbkz */ /* Table9707 */ 0x105c, /* VFMSUBADDPSZv213rmbkz */ 0x1062, /* VFMSUBADDPSZv213rrbkz */ /* Table9709 */ 0xee6, /* VFMADDPSZv213rmbkz */ 0xeec, /* VFMADDPSZv213rrbkz */ /* Table9711 */ 0x10f6, /* VFMSUBPSZv213rmbkz */ 0x10fc, /* VFMSUBPSZv213rrbkz */ /* Table9713 */ 0x11ba, /* VFNMADDPSZv213rmbkz */ 0x11c0, /* VFNMADDPSZv213rrbkz */ /* Table9715 */ 0x127e, /* VFNMSUBPSZv213rmbkz */ 0x1284, /* VFNMSUBPSZv213rrbkz */ /* Table9717 */ 0xfb6, /* VFMADDSUBPSZv231rmbkz */ 0x0, /* */ /* Table9719 */ 0x1068, /* VFMSUBADDPSZv231rmbkz */ 0x0, /* */ /* Table9721 */ 0xef2, /* VFMADDPSZv231rmbkz */ 0x0, /* */ /* Table9723 */ 0x1102, /* VFMSUBPSZv231rmbkz */ 0x0, /* */ /* Table9725 */ 0x11c6, /* VFNMADDPSZv231rmbkz */ 0x0, /* */ /* Table9727 */ 0x128a, /* VFNMSUBPSZv231rmbkz */ 0x0, /* */ /* Table9729 */ 0x1a10, /* VPCONFLICTDrmbkz */ 0x0, /* */ /* Table9731 */ 0xe25, /* VEXP2PSmbkz */ 0xe2b, /* VEXP2PSrbkz */ /* Table9733 */ 0x2079, /* VRCP28PSmbkz */ 0x207f, /* VRCP28PSrbkz */ /* Table9735 */ 0x210c, /* VRSQRT28PSmbkz */ 0x2112, /* VRSQRT28PSrbkz */ /* Table9737 */ 0x1685, /* VPABSQZrmbkz */ 0x0, /* */ /* Table9739 */ 0x1d94, /* VPMULDQZrmbkz */ 0x0, /* */ /* Table9741 */ 0x1c48, /* VPMINSQZrmbkz */ 0x0, /* */ /* Table9743 */ 0x1cae, /* VPMINUQZrmbkz */ 0x0, /* */ /* Table9745 */ 0x1b7c, /* VPMAXSQZrmbkz */ 0x0, /* */ /* Table9747 */ 0x1be2, /* VPMAXUQZrmbkz */ 0x0, /* */ /* Table9749 */ 0x1ddc, /* VPMULLQZrmbkz */ 0x0, /* */ /* Table9751 */ 0x1b04, /* VPLZCNTQrmbkz */ 0x0, /* */ /* Table9753 */ 0x2045, /* VRCP14PDZmbkz */ 0x0, /* */ /* Table9755 */ 0x20d8, /* VRSQRT14PDZmbkz */ 0x0, /* */ /* Table9757 */ 0xf5d, /* VFMADDSUBPDZv213rmbkz */ 0xf63, /* VFMADDSUBPDZv213rrbkz */ /* Table9759 */ 0x100f, /* VFMSUBADDPDZv213rmbkz */ 0x1015, /* VFMSUBADDPDZv213rrbkz */ /* Table9761 */ 0xe99, /* VFMADDPDZv213rmbkz */ 0xe9f, /* VFMADDPDZv213rrbkz */ /* Table9763 */ 0x10a9, /* VFMSUBPDZv213rmbkz */ 0x10af, /* VFMSUBPDZv213rrbkz */ /* Table9765 */ 0x116d, /* VFNMADDPDZv213rmbkz */ 0x1173, /* VFNMADDPDZv213rrbkz */ /* Table9767 */ 0x1231, /* VFNMSUBPDZv213rmbkz */ 0x1237, /* VFNMSUBPDZv213rrbkz */ /* Table9769 */ 0xf69, /* VFMADDSUBPDZv231rmbkz */ 0x0, /* */ /* Table9771 */ 0x101b, /* VFMSUBADDPDZv231rmbkz */ 0x0, /* */ /* Table9773 */ 0xea5, /* VFMADDPDZv231rmbkz */ 0x0, /* */ /* Table9775 */ 0x10b5, /* VFMSUBPDZv231rmbkz */ 0x0, /* */ /* Table9777 */ 0x1179, /* VFNMADDPDZv231rmbkz */ 0x0, /* */ /* Table9779 */ 0x123d, /* VFNMSUBPDZv231rmbkz */ 0x0, /* */ /* Table9781 */ 0x1a19, /* VPCONFLICTQrmbkz */ 0x0, /* */ /* Table9783 */ 0xe19, /* VEXP2PDmbkz */ 0xe1f, /* VEXP2PDrbkz */ /* Table9785 */ 0x206d, /* VRCP28PDmbkz */ 0x2073, /* VRCP28PDrbkz */ /* Table9787 */ 0x2100, /* VRSQRT28PDmbkz */ 0x2106, /* VRSQRT28PDrbkz */ /* Table9789 */ 0xcb3, /* VBROADCASTSSZ128mkz */ 0xcb6, /* VBROADCASTSSZ128rkz */ /* Table9791 */ 0x1c02, /* VPMINSBZ128rmkz */ 0x1c05, /* VPMINSBZ128rrkz */ /* Table9793 */ 0x1c1b, /* VPMINSDZ128rmkz */ 0x1c1e, /* VPMINSDZ128rrkz */ /* Table9795 */ 0x1cb8, /* VPMINUWZ128rmkz */ 0x1cbb, /* VPMINUWZ128rrkz */ /* Table9797 */ 0x1c81, /* VPMINUDZ128rmkz */ 0x1c84, /* VPMINUDZ128rrkz */ /* Table9799 */ 0x1b36, /* VPMAXSBZ128rmkz */ 0x1b39, /* VPMAXSBZ128rrkz */ /* Table9801 */ 0x1b4f, /* VPMAXSDZ128rmkz */ 0x1b52, /* VPMAXSDZ128rrkz */ /* Table9803 */ 0x1bec, /* VPMAXUWZ128rmkz */ 0x1bef, /* VPMAXUWZ128rrkz */ /* Table9805 */ 0x1bb5, /* VPMAXUDZ128rmkz */ 0x1bb8, /* VPMAXUDZ128rrkz */ /* Table9807 */ 0x1daf, /* VPMULLDZ128rmkz */ 0x1db2, /* VPMULLDZ128rrkz */ /* Table9809 */ 0x2050, /* VRCP14PSZ128mkz */ 0x2053, /* VRCP14PSZ128rkz */ /* Table9811 */ 0x20e3, /* VRSQRT14PSZ128mkz */ 0x20e6, /* VRSQRT14PSZ128rkz */ /* Table9813 */ 0x17b3, /* VPBLENDMDZ128rmkz */ 0x17b6, /* VPBLENDMDZ128rrkz */ /* Table9815 */ 0xc78, /* VBLENDMPSZ128rmkz */ 0xc7b, /* VBLENDMPSZ128rrkz */ /* Table9817 */ 0x179f, /* VPBLENDMBZ128rmkz */ 0x17a2, /* VPBLENDMBZ128rrkz */ /* Table9819 */ 0x0, /* */ 0x17fd, /* VPBROADCASTBrZ128rkz */ /* Table9821 */ 0x0, /* */ 0x1832, /* VPBROADCASTWrZ128rkz */ /* Table9823 */ 0x0, /* */ 0x180e, /* VPBROADCASTDrZ128rkz */ /* Table9825 */ 0xe3b, /* VEXPANDPSZ128rmkz */ 0xe3d, /* VEXPANDPSZ128rrkz */ /* Table9827 */ 0x1a8c, /* VPEXPANDDZ128rmkz */ 0x1a8e, /* VPEXPANDDZ128rrkz */ /* Table9829 */ 0x0, /* */ 0xd04, /* VCOMPRESSPSZ128rrkz */ /* Table9831 */ 0x0, /* */ 0x19e5, /* VPCOMPRESSDZ128rrkz */ /* Table9833 */ 0xf88, /* VFMADDSUBPSZ128v213rmkz */ 0xf8b, /* VFMADDSUBPSZ128v213rrkz */ /* Table9835 */ 0x103a, /* VFMSUBADDPSZ128v213rmkz */ 0x103d, /* VFMSUBADDPSZ128v213rrkz */ /* Table9837 */ 0xec4, /* VFMADDPSZ128v213rmkz */ 0xec7, /* VFMADDPSZ128v213rrkz */ /* Table9839 */ 0x10d4, /* VFMSUBPSZ128v213rmkz */ 0x10d7, /* VFMSUBPSZ128v213rrkz */ /* Table9841 */ 0x1198, /* VFNMADDPSZ128v213rmkz */ 0x119b, /* VFNMADDPSZ128v213rrkz */ /* Table9843 */ 0x125c, /* VFNMSUBPSZ128v213rmkz */ 0x125f, /* VFNMSUBPSZ128v213rrkz */ /* Table9845 */ 0xf91, /* VFMADDSUBPSZ128v231rmkz */ 0xf94, /* VFMADDSUBPSZ128v231rrkz */ /* Table9847 */ 0x1043, /* VFMSUBADDPSZ128v231rmkz */ 0x1046, /* VFMSUBADDPSZ128v231rrkz */ /* Table9849 */ 0xecd, /* VFMADDPSZ128v231rmkz */ 0xed0, /* VFMADDPSZ128v231rrkz */ /* Table9851 */ 0x10dd, /* VFMSUBPSZ128v231rmkz */ 0x10e0, /* VFMSUBPSZ128v231rrkz */ /* Table9853 */ 0x11a1, /* VFNMADDPSZ128v231rmkz */ 0x11a4, /* VFNMADDPSZ128v231rrkz */ /* Table9855 */ 0x1265, /* VFNMSUBPSZ128v231rmkz */ 0x1268, /* VFNMSUBPSZ128v231rrkz */ /* Table9857 */ 0x208d, /* VRCP28SSmkz */ 0x2093, /* VRCP28SSrkz */ /* Table9859 */ 0x2120, /* VRSQRT28SSmkz */ 0x2126, /* VRSQRT28SSrkz */ /* Table9861 */ 0x1c38, /* VPMINSQZ128rmkz */ 0x1c3b, /* VPMINSQZ128rrkz */ /* Table9863 */ 0x1c9e, /* VPMINUQZ128rmkz */ 0x1ca1, /* VPMINUQZ128rrkz */ /* Table9865 */ 0x1b6c, /* VPMAXSQZ128rmkz */ 0x1b6f, /* VPMAXSQZ128rrkz */ /* Table9867 */ 0x1bd2, /* VPMAXUQZ128rmkz */ 0x1bd5, /* VPMAXUQZ128rrkz */ /* Table9869 */ 0x1dcc, /* VPMULLQZ128rmkz */ 0x1dcf, /* VPMULLQZ128rrkz */ /* Table9871 */ 0x2035, /* VRCP14PDZ128mkz */ 0x2038, /* VRCP14PDZ128rkz */ /* Table9873 */ 0x20c8, /* VRSQRT14PDZ128mkz */ 0x20cb, /* VRSQRT14PDZ128rkz */ /* Table9875 */ 0x17cb, /* VPBLENDMQZ128rmkz */ 0x17ce, /* VPBLENDMQZ128rrkz */ /* Table9877 */ 0xc60, /* VBLENDMPDZ128rmkz */ 0xc63, /* VBLENDMPDZ128rrkz */ /* Table9879 */ 0x17e1, /* VPBLENDMWZ128rmkz */ 0x17e4, /* VPBLENDMWZ128rrkz */ /* Table9881 */ 0x0, /* */ 0x1825, /* VPBROADCASTQrZ128rkz */ /* Table9883 */ 0xe2f, /* VEXPANDPDZ128rmkz */ 0xe31, /* VEXPANDPDZ128rrkz */ /* Table9885 */ 0x1a98, /* VPEXPANDQZ128rmkz */ 0x1a9a, /* VPEXPANDQZ128rrkz */ /* Table9887 */ 0x0, /* */ 0xcfb, /* VCOMPRESSPDZ128rrkz */ /* Table9889 */ 0x0, /* */ 0x19ee, /* VPCOMPRESSQZ128rrkz */ /* Table9891 */ 0xf3b, /* VFMADDSUBPDZ128v213rmkz */ 0xf3e, /* VFMADDSUBPDZ128v213rrkz */ /* Table9893 */ 0xfed, /* VFMSUBADDPDZ128v213rmkz */ 0xff0, /* VFMSUBADDPDZ128v213rrkz */ /* Table9895 */ 0xe77, /* VFMADDPDZ128v213rmkz */ 0xe7a, /* VFMADDPDZ128v213rrkz */ /* Table9897 */ 0x1087, /* VFMSUBPDZ128v213rmkz */ 0x108a, /* VFMSUBPDZ128v213rrkz */ /* Table9899 */ 0x114b, /* VFNMADDPDZ128v213rmkz */ 0x114e, /* VFNMADDPDZ128v213rrkz */ /* Table9901 */ 0x120f, /* VFNMSUBPDZ128v213rmkz */ 0x1212, /* VFNMSUBPDZ128v213rrkz */ /* Table9903 */ 0xf44, /* VFMADDSUBPDZ128v231rmkz */ 0xf47, /* VFMADDSUBPDZ128v231rrkz */ /* Table9905 */ 0xff6, /* VFMSUBADDPDZ128v231rmkz */ 0xff9, /* VFMSUBADDPDZ128v231rrkz */ /* Table9907 */ 0xe80, /* VFMADDPDZ128v231rmkz */ 0xe83, /* VFMADDPDZ128v231rrkz */ /* Table9909 */ 0x1090, /* VFMSUBPDZ128v231rmkz */ 0x1093, /* VFMSUBPDZ128v231rrkz */ /* Table9911 */ 0x1154, /* VFNMADDPDZ128v231rmkz */ 0x1157, /* VFNMADDPDZ128v231rrkz */ /* Table9913 */ 0x1218, /* VFNMSUBPDZ128v231rmkz */ 0x121b, /* VFNMSUBPDZ128v231rrkz */ /* Table9915 */ 0x2084, /* VRCP28SDmkz */ 0x208a, /* VRCP28SDrkz */ /* Table9917 */ 0x2117, /* VRSQRT28SDmkz */ 0x211d, /* VRSQRT28SDrkz */ /* Table9919 */ 0xcb9, /* VBROADCASTSSZ256mkz */ 0xcbc, /* VBROADCASTSSZ256rkz */ /* Table9921 */ 0x1c08, /* VPMINSBZ256rmkz */ 0x1c0b, /* VPMINSBZ256rrkz */ /* Table9923 */ 0x1c24, /* VPMINSDZ256rmkz */ 0x1c27, /* VPMINSDZ256rrkz */ /* Table9925 */ 0x1cbe, /* VPMINUWZ256rmkz */ 0x1cc1, /* VPMINUWZ256rrkz */ /* Table9927 */ 0x1c8a, /* VPMINUDZ256rmkz */ 0x1c8d, /* VPMINUDZ256rrkz */ /* Table9929 */ 0x1b3c, /* VPMAXSBZ256rmkz */ 0x1b3f, /* VPMAXSBZ256rrkz */ /* Table9931 */ 0x1b58, /* VPMAXSDZ256rmkz */ 0x1b5b, /* VPMAXSDZ256rrkz */ /* Table9933 */ 0x1bf2, /* VPMAXUWZ256rmkz */ 0x1bf5, /* VPMAXUWZ256rrkz */ /* Table9935 */ 0x1bbe, /* VPMAXUDZ256rmkz */ 0x1bc1, /* VPMAXUDZ256rrkz */ /* Table9937 */ 0x1db8, /* VPMULLDZ256rmkz */ 0x1dbb, /* VPMULLDZ256rrkz */ /* Table9939 */ 0x2059, /* VRCP14PSZ256mkz */ 0x205c, /* VRCP14PSZ256rkz */ /* Table9941 */ 0x20ec, /* VRSQRT14PSZ256mkz */ 0x20ef, /* VRSQRT14PSZ256rkz */ /* Table9943 */ 0x17bb, /* VPBLENDMDZ256rmkz */ 0x17be, /* VPBLENDMDZ256rrkz */ /* Table9945 */ 0xc80, /* VBLENDMPSZ256rmkz */ 0xc83, /* VBLENDMPSZ256rrkz */ /* Table9947 */ 0x17a5, /* VPBLENDMBZ256rmkz */ 0x17a8, /* VPBLENDMBZ256rrkz */ /* Table9949 */ 0x0, /* */ 0x1800, /* VPBROADCASTBrZ256rkz */ /* Table9951 */ 0x0, /* */ 0x1835, /* VPBROADCASTWrZ256rkz */ /* Table9953 */ 0x0, /* */ 0x1811, /* VPBROADCASTDrZ256rkz */ /* Table9955 */ 0xe3f, /* VEXPANDPSZ256rmkz */ 0xe41, /* VEXPANDPSZ256rrkz */ /* Table9957 */ 0x1a90, /* VPEXPANDDZ256rmkz */ 0x1a92, /* VPEXPANDDZ256rrkz */ /* Table9959 */ 0x0, /* */ 0xd07, /* VCOMPRESSPSZ256rrkz */ /* Table9961 */ 0x0, /* */ 0x19e8, /* VPCOMPRESSDZ256rrkz */ /* Table9963 */ 0xf9a, /* VFMADDSUBPSZ256v213rmkz */ 0xf9d, /* VFMADDSUBPSZ256v213rrkz */ /* Table9965 */ 0x104c, /* VFMSUBADDPSZ256v213rmkz */ 0x104f, /* VFMSUBADDPSZ256v213rrkz */ /* Table9967 */ 0xed6, /* VFMADDPSZ256v213rmkz */ 0xed9, /* VFMADDPSZ256v213rrkz */ /* Table9969 */ 0x10e6, /* VFMSUBPSZ256v213rmkz */ 0x10e9, /* VFMSUBPSZ256v213rrkz */ /* Table9971 */ 0x11aa, /* VFNMADDPSZ256v213rmkz */ 0x11ad, /* VFNMADDPSZ256v213rrkz */ /* Table9973 */ 0x126e, /* VFNMSUBPSZ256v213rmkz */ 0x1271, /* VFNMSUBPSZ256v213rrkz */ /* Table9975 */ 0xfa3, /* VFMADDSUBPSZ256v231rmkz */ 0xfa6, /* VFMADDSUBPSZ256v231rrkz */ /* Table9977 */ 0x1055, /* VFMSUBADDPSZ256v231rmkz */ 0x1058, /* VFMSUBADDPSZ256v231rrkz */ /* Table9979 */ 0xedf, /* VFMADDPSZ256v231rmkz */ 0xee2, /* VFMADDPSZ256v231rrkz */ /* Table9981 */ 0x10ef, /* VFMSUBPSZ256v231rmkz */ 0x10f2, /* VFMSUBPSZ256v231rrkz */ /* Table9983 */ 0x11b3, /* VFNMADDPSZ256v231rmkz */ 0x11b6, /* VFNMADDPSZ256v231rrkz */ /* Table9985 */ 0x1277, /* VFNMSUBPSZ256v231rmkz */ 0x127a, /* VFNMSUBPSZ256v231rrkz */ /* Table9987 */ 0xca5, /* VBROADCASTSDZ256mkz */ 0xca8, /* VBROADCASTSDZ256rkz */ /* Table9989 */ 0x1c41, /* VPMINSQZ256rmkz */ 0x1c44, /* VPMINSQZ256rrkz */ /* Table9991 */ 0x1ca7, /* VPMINUQZ256rmkz */ 0x1caa, /* VPMINUQZ256rrkz */ /* Table9993 */ 0x1b75, /* VPMAXSQZ256rmkz */ 0x1b78, /* VPMAXSQZ256rrkz */ /* Table9995 */ 0x1bdb, /* VPMAXUQZ256rmkz */ 0x1bde, /* VPMAXUQZ256rrkz */ /* Table9997 */ 0x1dd5, /* VPMULLQZ256rmkz */ 0x1dd8, /* VPMULLQZ256rrkz */ /* Table9999 */ 0x203e, /* VRCP14PDZ256mkz */ 0x2041, /* VRCP14PDZ256rkz */ /* Table10001 */ 0x20d1, /* VRSQRT14PDZ256mkz */ 0x20d4, /* VRSQRT14PDZ256rkz */ /* Table10003 */ 0x17d3, /* VPBLENDMQZ256rmkz */ 0x17d6, /* VPBLENDMQZ256rrkz */ /* Table10005 */ 0xc68, /* VBLENDMPDZ256rmkz */ 0xc6b, /* VBLENDMPDZ256rrkz */ /* Table10007 */ 0x17e7, /* VPBLENDMWZ256rmkz */ 0x17ea, /* VPBLENDMWZ256rrkz */ /* Table10009 */ 0x0, /* */ 0x1828, /* VPBROADCASTQrZ256rkz */ /* Table10011 */ 0xe33, /* VEXPANDPDZ256rmkz */ 0xe35, /* VEXPANDPDZ256rrkz */ /* Table10013 */ 0x1a9c, /* VPEXPANDQZ256rmkz */ 0x1a9e, /* VPEXPANDQZ256rrkz */ /* Table10015 */ 0x0, /* */ 0xcfe, /* VCOMPRESSPDZ256rrkz */ /* Table10017 */ 0x0, /* */ 0x19f1, /* VPCOMPRESSQZ256rrkz */ /* Table10019 */ 0xf4d, /* VFMADDSUBPDZ256v213rmkz */ 0xf50, /* VFMADDSUBPDZ256v213rrkz */ /* Table10021 */ 0xfff, /* VFMSUBADDPDZ256v213rmkz */ 0x1002, /* VFMSUBADDPDZ256v213rrkz */ /* Table10023 */ 0xe89, /* VFMADDPDZ256v213rmkz */ 0xe8c, /* VFMADDPDZ256v213rrkz */ /* Table10025 */ 0x1099, /* VFMSUBPDZ256v213rmkz */ 0x109c, /* VFMSUBPDZ256v213rrkz */ /* Table10027 */ 0x115d, /* VFNMADDPDZ256v213rmkz */ 0x1160, /* VFNMADDPDZ256v213rrkz */ /* Table10029 */ 0x1221, /* VFNMSUBPDZ256v213rmkz */ 0x1224, /* VFNMSUBPDZ256v213rrkz */ /* Table10031 */ 0xf56, /* VFMADDSUBPDZ256v231rmkz */ 0xf59, /* VFMADDSUBPDZ256v231rrkz */ /* Table10033 */ 0x1008, /* VFMSUBADDPDZ256v231rmkz */ 0x100b, /* VFMSUBADDPDZ256v231rrkz */ /* Table10035 */ 0xe92, /* VFMADDPDZ256v231rmkz */ 0xe95, /* VFMADDPDZ256v231rrkz */ /* Table10037 */ 0x10a2, /* VFMSUBPDZ256v231rmkz */ 0x10a5, /* VFMSUBPDZ256v231rrkz */ /* Table10039 */ 0x1166, /* VFNMADDPDZ256v231rmkz */ 0x1169, /* VFNMADDPDZ256v231rrkz */ /* Table10041 */ 0x122a, /* VFNMSUBPDZ256v231rmkz */ 0x122d, /* VFNMSUBPDZ256v231rrkz */ /* Table10043 */ 0x0, /* */ 0x1d44, /* VPMOVUSDBrrkz */ /* Table10045 */ 0x0, /* */ 0x1d4e, /* VPMOVUSQBrrkz */ /* Table10047 */ 0x0, /* */ 0x1d49, /* VPMOVUSDWrrkz */ /* Table10049 */ 0x0, /* */ 0x1d58, /* VPMOVUSQWrrkz */ /* Table10051 */ 0x0, /* */ 0x1d53, /* VPMOVUSQDrrkz */ /* Table10053 */ 0x0, /* */ 0x1cf5, /* VPMOVSDBrrkz */ /* Table10055 */ 0x0, /* */ 0x1cff, /* VPMOVSQBrrkz */ /* Table10057 */ 0x0, /* */ 0x1cfa, /* VPMOVSDWrrkz */ /* Table10059 */ 0x0, /* */ 0x1d09, /* VPMOVSQWrrkz */ /* Table10061 */ 0x0, /* */ 0x1d04, /* VPMOVSQDrrkz */ /* Table10063 */ 0x0, /* */ 0x1cce, /* VPMOVDBrrkz */ /* Table10065 */ 0x0, /* */ 0x1ce6, /* VPMOVQBrrkz */ /* Table10067 */ 0x0, /* */ 0x1cd3, /* VPMOVDWrrkz */ /* Table10069 */ 0x0, /* */ 0x1cf0, /* VPMOVQWrrkz */ /* Table10071 */ 0x0, /* */ 0x1ceb, /* VPMOVQDrrkz */ /* Table10073 */ 0xcbf, /* VBROADCASTSSZmkz */ 0xcc2, /* VBROADCASTSSZrkz */ /* Table10075 */ 0x167a, /* VPABSDZrmkz */ 0x167d, /* VPABSDZrrkz */ /* Table10077 */ 0x1d0e, /* VPMOVSXBDZrmkz */ 0x1d11, /* VPMOVSXBDZrrkz */ /* Table10079 */ 0x1d18, /* VPMOVSXBQZrmkz */ 0x1d1b, /* VPMOVSXBQZrrkz */ /* Table10081 */ 0x1d30, /* VPMOVSXWDZrmkz */ 0x1d33, /* VPMOVSXWDZrrkz */ /* Table10083 */ 0x1d3a, /* VPMOVSXWQZrmkz */ 0x1d3d, /* VPMOVSXWQZrrkz */ /* Table10085 */ 0x1d26, /* VPMOVSXDQZrmkz */ 0x1d29, /* VPMOVSXDQZrrkz */ /* Table10087 */ 0x1d5d, /* VPMOVZXBDZrmkz */ 0x1d60, /* VPMOVZXBDZrrkz */ /* Table10089 */ 0x1d67, /* VPMOVZXBQZrmkz */ 0x1d6a, /* VPMOVZXBQZrrkz */ /* Table10091 */ 0x1d7f, /* VPMOVZXWDZrmkz */ 0x1d82, /* VPMOVZXWDZrrkz */ /* Table10093 */ 0x1d89, /* VPMOVZXWQZrmkz */ 0x1d8c, /* VPMOVZXWQZrrkz */ /* Table10095 */ 0x1d75, /* VPMOVZXDQZrmkz */ 0x1d78, /* VPMOVZXDQZrrkz */ /* Table10097 */ 0x1c0e, /* VPMINSBZrmkz */ 0x1c11, /* VPMINSBZrrkz */ /* Table10099 */ 0x1c2d, /* VPMINSDZrmkz */ 0x1c30, /* VPMINSDZrrkz */ /* Table10101 */ 0x1cc4, /* VPMINUWZrmkz */ 0x1cc7, /* VPMINUWZrrkz */ /* Table10103 */ 0x1c93, /* VPMINUDZrmkz */ 0x1c96, /* VPMINUDZrrkz */ /* Table10105 */ 0x1b42, /* VPMAXSBZrmkz */ 0x1b45, /* VPMAXSBZrrkz */ /* Table10107 */ 0x1b61, /* VPMAXSDZrmkz */ 0x1b64, /* VPMAXSDZrrkz */ /* Table10109 */ 0x1bf8, /* VPMAXUWZrmkz */ 0x1bfb, /* VPMAXUWZrrkz */ /* Table10111 */ 0x1bc7, /* VPMAXUDZrmkz */ 0x1bca, /* VPMAXUDZrrkz */ /* Table10113 */ 0x1dc1, /* VPMULLDZrmkz */ 0x1dc4, /* VPMULLDZrrkz */ /* Table10115 */ 0x1afd, /* VPLZCNTDrmkz */ 0x1b00, /* VPLZCNTDrrkz */ /* Table10117 */ 0x1f32, /* VPSRLVDZrmkz */ 0x1f35, /* VPSRLVDZrrkz */ /* Table10119 */ 0x1ef6, /* VPSRAVDZrmkz */ 0x1ef9, /* VPSRAVDZrrkz */ /* Table10121 */ 0x1ebe, /* VPSLLVDZrmkz */ 0x1ec1, /* VPSLLVDZrrkz */ /* Table10123 */ 0x2062, /* VRCP14PSZmkz */ 0x2065, /* VRCP14PSZrkz */ /* Table10125 */ 0x20f5, /* VRSQRT14PSZmkz */ 0x20f8, /* VRSQRT14PSZrkz */ /* Table10127 */ 0x1808, /* VPBROADCASTDZkrm */ 0x1809, /* VPBROADCASTDZkrr */ /* Table10129 */ 0xc9d, /* VBROADCASTI32X4krm */ 0x0, /* */ /* Table10131 */ 0x17c3, /* VPBLENDMDZrmkz */ 0x17c6, /* VPBLENDMDZrrkz */ /* Table10133 */ 0xc88, /* VBLENDMPSZrmkz */ 0xc8b, /* VBLENDMPSZrrkz */ /* Table10135 */ 0x17ab, /* VPBLENDMBZrmkz */ 0x17ae, /* VPBLENDMBZrrkz */ /* Table10137 */ 0x1a29, /* VPERMI2Drmkz */ 0x1a2c, /* VPERMI2Drrkz */ /* Table10139 */ 0x1a35, /* VPERMI2PSrmkz */ 0x1a38, /* VPERMI2PSrrkz */ /* Table10141 */ 0x0, /* */ 0x1803, /* VPBROADCASTBrZrkz */ /* Table10143 */ 0x0, /* */ 0x1838, /* VPBROADCASTWrZrkz */ /* Table10145 */ 0x0, /* */ 0x1814, /* VPBROADCASTDrZrkz */ /* Table10147 */ 0x1a75, /* VPERMT2Drmkz */ 0x1a78, /* VPERMT2Drrkz */ /* Table10149 */ 0x1a81, /* VPERMT2PSrmkz */ 0x1a84, /* VPERMT2PSrrkz */ /* Table10151 */ 0xe43, /* VEXPANDPSZrmkz */ 0xe45, /* VEXPANDPSZrrkz */ /* Table10153 */ 0x1a94, /* VPEXPANDDZrmkz */ 0x1a96, /* VPEXPANDDZrrkz */ /* Table10155 */ 0x0, /* */ 0xd0a, /* VCOMPRESSPSZrrkz */ /* Table10157 */ 0x0, /* */ 0x19eb, /* VPCOMPRESSDZrrkz */ /* Table10159 */ 0xfac, /* VFMADDSUBPSZv213rmkz */ 0xfb2, /* VFMADDSUBPSZv213rrkz */ /* Table10161 */ 0x105e, /* VFMSUBADDPSZv213rmkz */ 0x1064, /* VFMSUBADDPSZv213rrkz */ /* Table10163 */ 0xee8, /* VFMADDPSZv213rmkz */ 0xeee, /* VFMADDPSZv213rrkz */ /* Table10165 */ 0x10f8, /* VFMSUBPSZv213rmkz */ 0x10fe, /* VFMSUBPSZv213rrkz */ /* Table10167 */ 0x11bc, /* VFNMADDPSZv213rmkz */ 0x11c2, /* VFNMADDPSZv213rrkz */ /* Table10169 */ 0x1280, /* VFNMSUBPSZv213rmkz */ 0x1286, /* VFNMSUBPSZv213rrkz */ /* Table10171 */ 0xfb8, /* VFMADDSUBPSZv231rmkz */ 0xfbb, /* VFMADDSUBPSZv231rrkz */ /* Table10173 */ 0x106a, /* VFMSUBADDPSZv231rmkz */ 0x106d, /* VFMSUBADDPSZv231rrkz */ /* Table10175 */ 0xef4, /* VFMADDPSZv231rmkz */ 0xef7, /* VFMADDPSZv231rrkz */ /* Table10177 */ 0x1104, /* VFMSUBPSZv231rmkz */ 0x1107, /* VFMSUBPSZv231rrkz */ /* Table10179 */ 0x11c8, /* VFNMADDPSZv231rmkz */ 0x11cb, /* VFNMADDPSZv231rrkz */ /* Table10181 */ 0x128c, /* VFNMSUBPSZv231rmkz */ 0x128f, /* VFNMSUBPSZv231rrkz */ /* Table10183 */ 0x1a12, /* VPCONFLICTDrmkz */ 0x1a15, /* VPCONFLICTDrrkz */ /* Table10185 */ 0xe27, /* VEXP2PSmkz */ 0xe2d, /* VEXP2PSrkz */ /* Table10187 */ 0x207b, /* VRCP28PSmkz */ 0x2081, /* VRCP28PSrkz */ /* Table10189 */ 0x210e, /* VRSQRT28PSmkz */ 0x2114, /* VRSQRT28PSrkz */ /* Table10191 */ 0xcab, /* VBROADCASTSDZmkz */ 0xcae, /* VBROADCASTSDZrkz */ /* Table10193 */ 0x1687, /* VPABSQZrmkz */ 0x168a, /* VPABSQZrrkz */ /* Table10195 */ 0x1d96, /* VPMULDQZrmkz */ 0x1d99, /* VPMULDQZrrkz */ /* Table10197 */ 0x1c4a, /* VPMINSQZrmkz */ 0x1c4d, /* VPMINSQZrrkz */ /* Table10199 */ 0x1cb0, /* VPMINUQZrmkz */ 0x1cb3, /* VPMINUQZrrkz */ /* Table10201 */ 0x1b7e, /* VPMAXSQZrmkz */ 0x1b81, /* VPMAXSQZrrkz */ /* Table10203 */ 0x1be4, /* VPMAXUQZrmkz */ 0x1be7, /* VPMAXUQZrrkz */ /* Table10205 */ 0x1dde, /* VPMULLQZrmkz */ 0x1de1, /* VPMULLQZrrkz */ /* Table10207 */ 0x1b06, /* VPLZCNTQrmkz */ 0x1b09, /* VPLZCNTQrrkz */ /* Table10209 */ 0x1f3c, /* VPSRLVQZrmkz */ 0x1f3f, /* VPSRLVQZrrkz */ /* Table10211 */ 0x1efe, /* VPSRAVQZrmkz */ 0x1f01, /* VPSRAVQZrrkz */ /* Table10213 */ 0x1ec8, /* VPSLLVQZrmkz */ 0x1ecb, /* VPSLLVQZrrkz */ /* Table10215 */ 0x2047, /* VRCP14PDZmkz */ 0x204a, /* VRCP14PDZrkz */ /* Table10217 */ 0x20da, /* VRSQRT14PDZmkz */ 0x20dd, /* VRSQRT14PDZrkz */ /* Table10219 */ 0x181f, /* VPBROADCASTQZkrm */ 0x1820, /* VPBROADCASTQZkrr */ /* Table10221 */ 0xc9f, /* VBROADCASTI64X4krm */ 0x0, /* */ /* Table10223 */ 0x17db, /* VPBLENDMQZrmkz */ 0x17de, /* VPBLENDMQZrrkz */ /* Table10225 */ 0xc70, /* VBLENDMPDZrmkz */ 0xc73, /* VBLENDMPDZrrkz */ /* Table10227 */ 0x17ed, /* VPBLENDMWZrmkz */ 0x17f0, /* VPBLENDMWZrrkz */ /* Table10229 */ 0x1a3b, /* VPERMI2Qrmkz */ 0x1a3e, /* VPERMI2Qrrkz */ /* Table10231 */ 0x1a2f, /* VPERMI2PDrmkz */ 0x1a32, /* VPERMI2PDrrkz */ /* Table10233 */ 0x0, /* */ 0x182b, /* VPBROADCASTQrZrkz */ /* Table10235 */ 0x1a87, /* VPERMT2Qrmkz */ 0x1a8a, /* VPERMT2Qrrkz */ /* Table10237 */ 0x1a7b, /* VPERMT2PDrmkz */ 0x1a7e, /* VPERMT2PDrrkz */ /* Table10239 */ 0xe37, /* VEXPANDPDZrmkz */ 0xe39, /* VEXPANDPDZrrkz */ /* Table10241 */ 0x1aa0, /* VPEXPANDQZrmkz */ 0x1aa2, /* VPEXPANDQZrrkz */ /* Table10243 */ 0x0, /* */ 0xd01, /* VCOMPRESSPDZrrkz */ /* Table10245 */ 0x0, /* */ 0x19f4, /* VPCOMPRESSQZrrkz */ /* Table10247 */ 0xf5f, /* VFMADDSUBPDZv213rmkz */ 0xf65, /* VFMADDSUBPDZv213rrkz */ /* Table10249 */ 0x1011, /* VFMSUBADDPDZv213rmkz */ 0x1017, /* VFMSUBADDPDZv213rrkz */ /* Table10251 */ 0xe9b, /* VFMADDPDZv213rmkz */ 0xea1, /* VFMADDPDZv213rrkz */ /* Table10253 */ 0x10ab, /* VFMSUBPDZv213rmkz */ 0x10b1, /* VFMSUBPDZv213rrkz */ /* Table10255 */ 0x116f, /* VFNMADDPDZv213rmkz */ 0x1175, /* VFNMADDPDZv213rrkz */ /* Table10257 */ 0x1233, /* VFNMSUBPDZv213rmkz */ 0x1239, /* VFNMSUBPDZv213rrkz */ /* Table10259 */ 0xf6b, /* VFMADDSUBPDZv231rmkz */ 0xf6e, /* VFMADDSUBPDZv231rrkz */ /* Table10261 */ 0x101d, /* VFMSUBADDPDZv231rmkz */ 0x1020, /* VFMSUBADDPDZv231rrkz */ /* Table10263 */ 0xea7, /* VFMADDPDZv231rmkz */ 0xeaa, /* VFMADDPDZv231rrkz */ /* Table10265 */ 0x10b7, /* VFMSUBPDZv231rmkz */ 0x10ba, /* VFMSUBPDZv231rrkz */ /* Table10267 */ 0x117b, /* VFNMADDPDZv231rmkz */ 0x117e, /* VFNMADDPDZv231rrkz */ /* Table10269 */ 0x123f, /* VFNMSUBPDZv231rmkz */ 0x1242, /* VFNMSUBPDZv231rrkz */ /* Table10271 */ 0x1a1b, /* VPCONFLICTQrmkz */ 0x1a1e, /* VPCONFLICTQrrkz */ /* Table10273 */ 0xe1b, /* VEXP2PDmkz */ 0xe21, /* VEXP2PDrkz */ /* Table10275 */ 0x206f, /* VRCP28PDmkz */ 0x2075, /* VRCP28PDrkz */ /* Table10277 */ 0x2102, /* VRSQRT28PDmkz */ 0x2108, /* VRSQRT28PDrkz */ /* Table10279 */ 0x5b9, /* MMX_PALIGNR64irm */ 0x5ba, /* MMX_PALIGNR64irr */ /* Table10281 */ 0xa6c, /* SHA1RNDS4rmi */ 0xa6d, /* SHA1RNDS4rri */ /* Table10283 */ 0x9c5, /* ROUNDPSm */ 0x9c6, /* ROUNDPSr */ /* Table10285 */ 0x9c3, /* ROUNDPDm */ 0x9c4, /* ROUNDPDr */ /* Table10287 */ 0x9ca, /* ROUNDSSm */ 0x9cb, /* ROUNDSSr */ /* Table10289 */ 0x9c7, /* ROUNDSDm */ 0x9c8, /* ROUNDSDr */ /* Table10291 */ 0x103, /* BLENDPSrmi */ 0x104, /* BLENDPSrri */ /* Table10293 */ 0x101, /* BLENDPDrmi */ 0x102, /* BLENDPDrri */ /* Table10295 */ 0x7c0, /* PBLENDWrmi */ 0x7c1, /* PBLENDWrri */ /* Table10297 */ 0x7b1, /* PALIGNR128rm */ 0x7b2, /* PALIGNR128rr */ /* Table10299 */ 0x7ed, /* PEXTRBmr */ 0x7ee, /* PEXTRBrr */ /* Table10301 */ 0x7f3, /* PEXTRWmr */ 0x7f5, /* PEXTRWrr_REV */ /* Table10303 */ 0x7ef, /* PEXTRDmr */ 0x7f0, /* PEXTRDrr */ /* Table10305 */ 0x2ea, /* EXTRACTPSmr */ 0x2eb, /* EXTRACTPSrr */ /* Table10307 */ 0x82e, /* PINSRBrm */ 0x82f, /* PINSRBrr */ /* Table10309 */ 0x3a1, /* INSERTPSrm */ 0x3a2, /* INSERTPSrr */ /* Table10311 */ 0x830, /* PINSRDrm */ 0x831, /* PINSRDrr */ /* Table10313 */ 0x2de, /* DPPSrmi */ 0x2df, /* DPPSrri */ /* Table10315 */ 0x2dc, /* DPPDrmi */ 0x2dd, /* DPPDrri */ /* Table10317 */ 0x701, /* MPSADBWrmi */ 0x702, /* MPSADBWrri */ /* Table10319 */ 0x7c2, /* PCLMULQDQrm */ 0x7c3, /* PCLMULQDQrr */ /* Table10321 */ 0x7d2, /* PCMPESTRM128rm */ 0x7d3, /* PCMPESTRM128rr */ /* Table10323 */ 0x7ce, /* PCMPESTRIrm */ 0x7cf, /* PCMPESTRIrr */ /* Table10325 */ 0x7e2, /* PCMPISTRM128rm */ 0x7e3, /* PCMPISTRM128rr */ /* Table10327 */ 0x7de, /* PCMPISTRIrm */ 0x7df, /* PCMPISTRIrr */ /* Table10329 */ 0xae, /* AESKEYGENASSIST128rm */ 0xaf, /* AESKEYGENASSIST128rr */ /* Table10331 */ 0x7f1, /* PEXTRQmr */ 0x7f2, /* PEXTRQrr */ /* Table10333 */ 0x832, /* PINSRQrm */ 0x833, /* PINSRQrr */ /* Table10335 */ 0x9bf, /* RORX32mi */ 0x9c0, /* RORX32ri */ /* Table10337 */ 0x179b, /* VPBLENDDrmi */ 0x179c, /* VPBLENDDrri */ /* Table10339 */ 0x1a5f, /* VPERMILPSmi */ 0x1a60, /* VPERMILPSri */ /* Table10341 */ 0x1a53, /* VPERMILPDmi */ 0x1a54, /* VPERMILPDri */ /* Table10343 */ 0x20b7, /* VROUNDPSm */ 0x20b8, /* VROUNDPSr */ /* Table10345 */ 0x20b5, /* VROUNDPDm */ 0x20b6, /* VROUNDPDr */ /* Table10347 */ 0x20bc, /* VROUNDSSm */ 0x20bd, /* VROUNDSSr */ /* Table10349 */ 0x20b9, /* VROUNDSDm */ 0x20ba, /* VROUNDSDr */ /* Table10351 */ 0xc92, /* VBLENDPSrmi */ 0xc93, /* VBLENDPSrri */ /* Table10353 */ 0xc8e, /* VBLENDPDrmi */ 0xc8f, /* VBLENDPDrri */ /* Table10355 */ 0x17f7, /* VPBLENDWrmi */ 0x17f8, /* VPBLENDWrri */ /* Table10357 */ 0x1719, /* VPALIGNR128rm */ 0x171a, /* VPALIGNR128rr */ /* Table10359 */ 0x1aa3, /* VPEXTRBmr */ 0x1aa4, /* VPEXTRBrr */ /* Table10361 */ 0x1aa9, /* VPEXTRWmr */ 0x1aab, /* VPEXTRWrr_REV */ /* Table10363 */ 0x1aa5, /* VPEXTRDmr */ 0x1aa6, /* VPEXTRDrr */ /* Table10365 */ 0xe5a, /* VEXTRACTPSmr */ 0xe5b, /* VEXTRACTPSrr */ /* Table10367 */ 0xd40, /* VCVTPS2PHmr */ 0xd41, /* VCVTPS2PHrr */ /* Table10369 */ 0x1af0, /* VPINSRBrm */ 0x1af1, /* VPINSRBrr */ /* Table10371 */ 0x131e, /* VINSERTPSrm */ 0x131f, /* VINSERTPSrr */ /* Table10373 */ 0x1af2, /* VPINSRDrm */ 0x1af3, /* VPINSRDrr */ /* Table10375 */ 0x0, /* */ 0x4a7, /* KSHIFTRBri */ /* Table10377 */ 0x0, /* */ 0x4a8, /* KSHIFTRDri */ /* Table10379 */ 0x0, /* */ 0x4a3, /* KSHIFTLBri */ /* Table10381 */ 0x0, /* */ 0x4a4, /* KSHIFTLDri */ /* Table10383 */ 0xe10, /* VDPPSrmi */ 0xe11, /* VDPPSrri */ /* Table10385 */ 0xe0c, /* VDPPDrmi */ 0xe0d, /* VDPPDrri */ /* Table10387 */ 0x15f4, /* VMPSADBWrmi */ 0x15f5, /* VMPSADBWrri */ /* Table10389 */ 0x183b, /* VPCLMULQDQrm */ 0x183c, /* VPCLMULQDQrr */ /* Table10391 */ 0x1a45, /* VPERMIL2PSmr */ 0x1a49, /* VPERMIL2PSrr */ /* Table10393 */ 0x1a3f, /* VPERMIL2PDmr */ 0x1a43, /* VPERMIL2PDrr */ /* Table10395 */ 0xc9a, /* VBLENDVPSrm */ 0xc9b, /* VBLENDVPSrr */ /* Table10397 */ 0xc96, /* VBLENDVPDrm */ 0xc97, /* VBLENDVPDrr */ /* Table10399 */ 0x17f3, /* VPBLENDVBrm */ 0x17f4, /* VPBLENDVBrr */ /* Table10401 */ 0xf7b, /* VFMADDSUBPS4mr */ 0xf82, /* VFMADDSUBPS4rr_REV */ /* Table10403 */ 0xf2e, /* VFMADDSUBPD4mr */ 0xf35, /* VFMADDSUBPD4rr_REV */ /* Table10405 */ 0x102d, /* VFMSUBADDPS4mr */ 0x1034, /* VFMSUBADDPS4rr_REV */ /* Table10407 */ 0xfe0, /* VFMSUBADDPD4mr */ 0xfe7, /* VFMSUBADDPD4rr_REV */ /* Table10409 */ 0x18d1, /* VPCMPESTRM128rm */ 0x18d2, /* VPCMPESTRM128rr */ /* Table10411 */ 0x18cd, /* VPCMPESTRIrm */ 0x18ce, /* VPCMPESTRIrr */ /* Table10413 */ 0x1925, /* VPCMPISTRM128rm */ 0x1926, /* VPCMPISTRM128rr */ /* Table10415 */ 0x1921, /* VPCMPISTRIrm */ 0x1922, /* VPCMPISTRIrr */ /* Table10417 */ 0xeb7, /* VFMADDPS4mr */ 0xebe, /* VFMADDPS4rr_REV */ /* Table10419 */ 0xe6a, /* VFMADDPD4mr */ 0xe71, /* VFMADDPD4rr_REV */ /* Table10421 */ 0xf13, /* VFMADDSS4mr */ 0xf19, /* VFMADDSS4rr_REV */ /* Table10423 */ 0xf04, /* VFMADDSD4mr */ 0xf0a, /* VFMADDSD4rr_REV */ /* Table10425 */ 0x10c7, /* VFMSUBPS4mr */ 0x10ce, /* VFMSUBPS4rr_REV */ /* Table10427 */ 0x107a, /* VFMSUBPD4mr */ 0x1081, /* VFMSUBPD4rr_REV */ /* Table10429 */ 0x1123, /* VFMSUBSS4mr */ 0x1129, /* VFMSUBSS4rr_REV */ /* Table10431 */ 0x1114, /* VFMSUBSD4mr */ 0x111a, /* VFMSUBSD4rr_REV */ /* Table10433 */ 0x118b, /* VFNMADDPS4mr */ 0x1192, /* VFNMADDPS4rr_REV */ /* Table10435 */ 0x113e, /* VFNMADDPD4mr */ 0x1145, /* VFNMADDPD4rr_REV */ /* Table10437 */ 0x11e7, /* VFNMADDSS4mr */ 0x11ed, /* VFNMADDSS4rr_REV */ /* Table10439 */ 0x11d8, /* VFNMADDSD4mr */ 0x11de, /* VFNMADDSD4rr_REV */ /* Table10441 */ 0x124f, /* VFNMSUBPS4mr */ 0x1256, /* VFNMSUBPS4rr_REV */ /* Table10443 */ 0x1202, /* VFNMSUBPD4mr */ 0x1209, /* VFNMSUBPD4rr_REV */ /* Table10445 */ 0x12ab, /* VFNMSUBSS4mr */ 0x12b1, /* VFNMSUBSS4rr_REV */ /* Table10447 */ 0x129c, /* VFNMSUBSD4mr */ 0x12a2, /* VFNMSUBSD4rr_REV */ /* Table10449 */ 0xc41, /* VAESKEYGENASSIST128rm */ 0xc42, /* VAESKEYGENASSIST128rr */ /* Table10451 */ 0x9c1, /* RORX64mi */ 0x9c2, /* RORX64ri */ /* Table10453 */ 0x1aa7, /* VPEXTRQmr */ 0x1aa8, /* VPEXTRQrr */ /* Table10455 */ 0x1af4, /* VPINSRQrm */ 0x1af5, /* VPINSRQrr */ /* Table10457 */ 0x0, /* */ 0x4aa, /* KSHIFTRWri */ /* Table10459 */ 0x0, /* */ 0x4a9, /* KSHIFTRQri */ /* Table10461 */ 0x0, /* */ 0x4a6, /* KSHIFTLWri */ /* Table10463 */ 0x0, /* */ 0x4a5, /* KSHIFTLQri */ /* Table10465 */ 0x1a47, /* VPERMIL2PSrm */ 0x1a49, /* VPERMIL2PSrr */ /* Table10467 */ 0x1a41, /* VPERMIL2PDrm */ 0x1a43, /* VPERMIL2PDrr */ /* Table10469 */ 0xf7d, /* VFMADDSUBPS4rm */ 0xf7f, /* VFMADDSUBPS4rr */ /* Table10471 */ 0xf30, /* VFMADDSUBPD4rm */ 0xf32, /* VFMADDSUBPD4rr */ /* Table10473 */ 0x102f, /* VFMSUBADDPS4rm */ 0x1031, /* VFMSUBADDPS4rr */ /* Table10475 */ 0xfe2, /* VFMSUBADDPD4rm */ 0xfe4, /* VFMSUBADDPD4rr */ /* Table10477 */ 0xeb9, /* VFMADDPS4rm */ 0xebb, /* VFMADDPS4rr */ /* Table10479 */ 0xe6c, /* VFMADDPD4rm */ 0xe6e, /* VFMADDPD4rr */ /* Table10481 */ 0xf15, /* VFMADDSS4rm */ 0xf17, /* VFMADDSS4rr */ /* Table10483 */ 0xf06, /* VFMADDSD4rm */ 0xf08, /* VFMADDSD4rr */ /* Table10485 */ 0x10c9, /* VFMSUBPS4rm */ 0x10cb, /* VFMSUBPS4rr */ /* Table10487 */ 0x107c, /* VFMSUBPD4rm */ 0x107e, /* VFMSUBPD4rr */ /* Table10489 */ 0x1125, /* VFMSUBSS4rm */ 0x1127, /* VFMSUBSS4rr */ /* Table10491 */ 0x1116, /* VFMSUBSD4rm */ 0x1118, /* VFMSUBSD4rr */ /* Table10493 */ 0x118d, /* VFNMADDPS4rm */ 0x118f, /* VFNMADDPS4rr */ /* Table10495 */ 0x1140, /* VFNMADDPD4rm */ 0x1142, /* VFNMADDPD4rr */ /* Table10497 */ 0x11e9, /* VFNMADDSS4rm */ 0x11eb, /* VFNMADDSS4rr */ /* Table10499 */ 0x11da, /* VFNMADDSD4rm */ 0x11dc, /* VFNMADDSD4rr */ /* Table10501 */ 0x1251, /* VFNMSUBPS4rm */ 0x1253, /* VFNMSUBPS4rr */ /* Table10503 */ 0x1204, /* VFNMSUBPD4rm */ 0x1206, /* VFNMSUBPD4rr */ /* Table10505 */ 0x12ad, /* VFNMSUBSS4rm */ 0x12af, /* VFNMSUBSS4rr */ /* Table10507 */ 0x129e, /* VFNMSUBSD4rm */ 0x12a0, /* VFNMSUBSD4rr */ /* Table10509 */ 0x1799, /* VPBLENDDYrmi */ 0x179a, /* VPBLENDDYrri */ /* Table10511 */ 0x1a57, /* VPERMILPSYmi */ 0x1a58, /* VPERMILPSYri */ /* Table10513 */ 0x1a4b, /* VPERMILPDYmi */ 0x1a4c, /* VPERMILPDYri */ /* Table10515 */ 0x1a1f, /* VPERM2F128rm */ 0x1a20, /* VPERM2F128rr */ /* Table10517 */ 0x20c1, /* VROUNDYPSm */ 0x20c2, /* VROUNDYPSr */ /* Table10519 */ 0x20bf, /* VROUNDYPDm */ 0x20c0, /* VROUNDYPDr */ /* Table10521 */ 0xc90, /* VBLENDPSYrmi */ 0xc91, /* VBLENDPSYrri */ /* Table10523 */ 0xc8c, /* VBLENDPDYrmi */ 0xc8d, /* VBLENDPDYrri */ /* Table10525 */ 0x17f5, /* VPBLENDWYrmi */ 0x17f6, /* VPBLENDWYrri */ /* Table10527 */ 0x171b, /* VPALIGNR256rm */ 0x171c, /* VPALIGNR256rr */ /* Table10529 */ 0x130a, /* VINSERTF128rm */ 0x130b, /* VINSERTF128rr */ /* Table10531 */ 0xe46, /* VEXTRACTF128mr */ 0xe47, /* VEXTRACTF128rr */ /* Table10533 */ 0xd3c, /* VCVTPS2PHYmr */ 0xd3d, /* VCVTPS2PHYrr */ /* Table10535 */ 0x1314, /* VINSERTI128rm */ 0x1315, /* VINSERTI128rr */ /* Table10537 */ 0xe50, /* VEXTRACTI128mr */ 0xe51, /* VEXTRACTI128rr */ /* Table10539 */ 0xe0e, /* VDPPSYrmi */ 0xe0f, /* VDPPSYrri */ /* Table10541 */ 0x15f2, /* VMPSADBWYrmi */ 0x15f3, /* VMPSADBWYrri */ /* Table10543 */ 0x1a21, /* VPERM2I128rm */ 0x1a22, /* VPERM2I128rr */ /* Table10545 */ 0x1a46, /* VPERMIL2PSmrY */ 0x1a4a, /* VPERMIL2PSrrY */ /* Table10547 */ 0x1a40, /* VPERMIL2PDmrY */ 0x1a44, /* VPERMIL2PDrrY */ /* Table10549 */ 0xc98, /* VBLENDVPSYrm */ 0xc99, /* VBLENDVPSYrr */ /* Table10551 */ 0xc94, /* VBLENDVPDYrm */ 0xc95, /* VBLENDVPDYrr */ /* Table10553 */ 0x17f1, /* VPBLENDVBYrm */ 0x17f2, /* VPBLENDVBYrr */ /* Table10555 */ 0xf7c, /* VFMADDSUBPS4mrY */ 0xf81, /* VFMADDSUBPS4rrY_REV */ /* Table10557 */ 0xf2f, /* VFMADDSUBPD4mrY */ 0xf34, /* VFMADDSUBPD4rrY_REV */ /* Table10559 */ 0x102e, /* VFMSUBADDPS4mrY */ 0x1033, /* VFMSUBADDPS4rrY_REV */ /* Table10561 */ 0xfe1, /* VFMSUBADDPD4mrY */ 0xfe6, /* VFMSUBADDPD4rrY_REV */ /* Table10563 */ 0xeb8, /* VFMADDPS4mrY */ 0xebd, /* VFMADDPS4rrY_REV */ /* Table10565 */ 0xe6b, /* VFMADDPD4mrY */ 0xe70, /* VFMADDPD4rrY_REV */ /* Table10567 */ 0x10c8, /* VFMSUBPS4mrY */ 0x10cd, /* VFMSUBPS4rrY_REV */ /* Table10569 */ 0x107b, /* VFMSUBPD4mrY */ 0x1080, /* VFMSUBPD4rrY_REV */ /* Table10571 */ 0x118c, /* VFNMADDPS4mrY */ 0x1191, /* VFNMADDPS4rrY_REV */ /* Table10573 */ 0x113f, /* VFNMADDPD4mrY */ 0x1144, /* VFNMADDPD4rrY_REV */ /* Table10575 */ 0x1250, /* VFNMSUBPS4mrY */ 0x1255, /* VFNMSUBPS4rrY_REV */ /* Table10577 */ 0x1203, /* VFNMSUBPD4mrY */ 0x1208, /* VFNMSUBPD4rrY_REV */ /* Table10579 */ 0x1a6d, /* VPERMQYmi */ 0x1a6e, /* VPERMQYri */ /* Table10581 */ 0x1a63, /* VPERMPDYmi */ 0x1a64, /* VPERMPDYri */ /* Table10583 */ 0x1a48, /* VPERMIL2PSrmY */ 0x1a4a, /* VPERMIL2PSrrY */ /* Table10585 */ 0x1a42, /* VPERMIL2PDrmY */ 0x1a44, /* VPERMIL2PDrrY */ /* Table10587 */ 0xf7e, /* VFMADDSUBPS4rmY */ 0xf80, /* VFMADDSUBPS4rrY */ /* Table10589 */ 0xf31, /* VFMADDSUBPD4rmY */ 0xf33, /* VFMADDSUBPD4rrY */ /* Table10591 */ 0x1030, /* VFMSUBADDPS4rmY */ 0x1032, /* VFMSUBADDPS4rrY */ /* Table10593 */ 0xfe3, /* VFMSUBADDPD4rmY */ 0xfe5, /* VFMSUBADDPD4rrY */ /* Table10595 */ 0xeba, /* VFMADDPS4rmY */ 0xebc, /* VFMADDPS4rrY */ /* Table10597 */ 0xe6d, /* VFMADDPD4rmY */ 0xe6f, /* VFMADDPD4rrY */ /* Table10599 */ 0x10ca, /* VFMSUBPS4rmY */ 0x10cc, /* VFMSUBPS4rrY */ /* Table10601 */ 0x107d, /* VFMSUBPD4rmY */ 0x107f, /* VFMSUBPD4rrY */ /* Table10603 */ 0x118e, /* VFNMADDPS4rmY */ 0x1190, /* VFNMADDPS4rrY */ /* Table10605 */ 0x1141, /* VFNMADDPD4rmY */ 0x1143, /* VFNMADDPD4rrY */ /* Table10607 */ 0x1252, /* VFNMSUBPS4rmY */ 0x1254, /* VFNMSUBPS4rrY */ /* Table10609 */ 0x1205, /* VFNMSUBPD4rmY */ 0x1207, /* VFNMSUBPD4rrY */ /* Table10611 */ 0x20ac, /* VRNDSCALESSm */ 0x20af, /* VRNDSCALESSr */ /* Table10613 */ 0xe5c, /* VEXTRACTPSzmr */ 0xe5d, /* VEXTRACTPSzrr */ /* Table10615 */ 0x1963, /* VPCMPUDZ128rmi */ 0x196b, /* VPCMPUDZ128rri */ /* Table10617 */ 0x185b, /* VPCMPDZ128rmi */ 0x1863, /* VPCMPDZ128rri */ /* Table10619 */ 0x1320, /* VINSERTPSzrm */ 0x1321, /* VINSERTPSzrr */ /* Table10621 */ 0x194b, /* VPCMPUBZ128rmi */ 0x194f, /* VPCMPUBZ128rri */ /* Table10623 */ 0x1843, /* VPCMPBZ128rmi */ 0x1847, /* VPCMPBZ128rri */ /* Table10625 */ 0x20a3, /* VRNDSCALESDm */ 0x20a6, /* VRNDSCALESDr */ /* Table10627 */ 0x1987, /* VPCMPUQZ128rmi */ 0x198f, /* VPCMPUQZ128rri */ /* Table10629 */ 0x1927, /* VPCMPQZ128rmi */ 0x192f, /* VPCMPQZ128rri */ /* Table10631 */ 0x19ab, /* VPCMPUWZ128rmi */ 0x19af, /* VPCMPUWZ128rri */ /* Table10633 */ 0x19c3, /* VPCMPWZ128rmi */ 0x19c7, /* VPCMPWZ128rri */ /* Table10635 */ 0x196f, /* VPCMPUDZ256rmi */ 0x1977, /* VPCMPUDZ256rri */ /* Table10637 */ 0x1867, /* VPCMPDZ256rmi */ 0x186f, /* VPCMPDZ256rri */ /* Table10639 */ 0x1953, /* VPCMPUBZ256rmi */ 0x1957, /* VPCMPUBZ256rri */ /* Table10641 */ 0x184b, /* VPCMPBZ256rmi */ 0x184f, /* VPCMPBZ256rri */ /* Table10643 */ 0x1993, /* VPCMPUQZ256rmi */ 0x199b, /* VPCMPUQZ256rri */ /* Table10645 */ 0x1933, /* VPCMPQZ256rmi */ 0x193b, /* VPCMPQZ256rri */ /* Table10647 */ 0x19b3, /* VPCMPUWZ256rmi */ 0x19b7, /* VPCMPUWZ256rri */ /* Table10649 */ 0x19cb, /* VPCMPWZ256rmi */ 0x19cf, /* VPCMPWZ256rri */ /* Table10651 */ 0xc43, /* VALIGNDrmi */ 0xc44, /* VALIGNDrri */ /* Table10653 */ 0x1a5b, /* VPERMILPSZmi */ 0x1a5c, /* VPERMILPSZri */ /* Table10655 */ 0x20a1, /* VRNDSCALEPSZm */ 0x20a2, /* VRNDSCALEPSZr */ /* Table10657 */ 0x130c, /* VINSERTF32x4rm */ 0x130d, /* VINSERTF32x4rr */ /* Table10659 */ 0xe48, /* VEXTRACTF32x4rm */ 0xe49, /* VEXTRACTF32x4rr */ /* Table10661 */ 0x130e, /* VINSERTF32x8rm */ 0x130f, /* VINSERTF32x8rr */ /* Table10663 */ 0xd3e, /* VCVTPS2PHZmr */ 0xd3f, /* VCVTPS2PHZrr */ /* Table10665 */ 0x197b, /* VPCMPUDZrmi */ 0x1983, /* VPCMPUDZrri */ /* Table10667 */ 0x1873, /* VPCMPDZrmi */ 0x187b, /* VPCMPDZrri */ /* Table10669 */ 0x1316, /* VINSERTI32x4rm */ 0x1317, /* VINSERTI32x4rr */ /* Table10671 */ 0xe52, /* VEXTRACTI32x4rm */ 0xe53, /* VEXTRACTI32x4rr */ /* Table10673 */ 0x1318, /* VINSERTI32x8rm */ 0x1319, /* VINSERTI32x8rr */ /* Table10675 */ 0x195b, /* VPCMPUBZrmi */ 0x195f, /* VPCMPUBZrri */ /* Table10677 */ 0x1853, /* VPCMPBZrmi */ 0x1857, /* VPCMPBZrri */ /* Table10679 */ 0x1a6f, /* VPERMQZmi */ 0x1a70, /* VPERMQZri */ /* Table10681 */ 0x1a65, /* VPERMPDZmi */ 0x1a66, /* VPERMPDZri */ /* Table10683 */ 0xc47, /* VALIGNQrmi */ 0xc48, /* VALIGNQrri */ /* Table10685 */ 0x1a4f, /* VPERMILPDZmi */ 0x1a50, /* VPERMILPDZri */ /* Table10687 */ 0x209f, /* VRNDSCALEPDZm */ 0x20a0, /* VRNDSCALEPDZr */ /* Table10689 */ 0x1310, /* VINSERTF64x2rm */ 0x1311, /* VINSERTF64x2rr */ /* Table10691 */ 0x1312, /* VINSERTF64x4rm */ 0x1313, /* VINSERTF64x4rr */ /* Table10693 */ 0xe4c, /* VEXTRACTF64x4rm */ 0xe4d, /* VEXTRACTF64x4rr */ /* Table10695 */ 0x199f, /* VPCMPUQZrmi */ 0x19a7, /* VPCMPUQZrri */ /* Table10697 */ 0x193f, /* VPCMPQZrmi */ 0x1947, /* VPCMPQZrri */ /* Table10699 */ 0x131a, /* VINSERTI64x2rm */ 0x131b, /* VINSERTI64x2rr */ /* Table10701 */ 0x131c, /* VINSERTI64x4rm */ 0x131d, /* VINSERTI64x4rr */ /* Table10703 */ 0xe56, /* VEXTRACTI64x4rm */ 0xe57, /* VEXTRACTI64x4rr */ /* Table10705 */ 0x19bb, /* VPCMPUWZrmi */ 0x19bf, /* VPCMPUWZrri */ /* Table10707 */ 0x19d3, /* VPCMPWZrmi */ 0x19d7, /* VPCMPWZrri */ /* Table10709 */ 0x20ad, /* VRNDSCALESSmk */ 0x20b3, /* VRNDSCALESSrk */ /* Table10711 */ 0x1969, /* VPCMPUDZ128rmik */ 0x196d, /* VPCMPUDZ128rrik */ /* Table10713 */ 0x1861, /* VPCMPDZ128rmik */ 0x1865, /* VPCMPDZ128rrik */ /* Table10715 */ 0x194d, /* VPCMPUBZ128rmik */ 0x1951, /* VPCMPUBZ128rrik */ /* Table10717 */ 0x1845, /* VPCMPBZ128rmik */ 0x1849, /* VPCMPBZ128rrik */ /* Table10719 */ 0x20a4, /* VRNDSCALESDmk */ 0x20aa, /* VRNDSCALESDrk */ /* Table10721 */ 0x198d, /* VPCMPUQZ128rmik */ 0x1991, /* VPCMPUQZ128rrik */ /* Table10723 */ 0x192d, /* VPCMPQZ128rmik */ 0x1931, /* VPCMPQZ128rrik */ /* Table10725 */ 0x19ad, /* VPCMPUWZ128rmik */ 0x19b1, /* VPCMPUWZ128rrik */ /* Table10727 */ 0x19c5, /* VPCMPWZ128rmik */ 0x19c9, /* VPCMPWZ128rrik */ /* Table10729 */ 0x1975, /* VPCMPUDZ256rmik */ 0x1979, /* VPCMPUDZ256rrik */ /* Table10731 */ 0x186d, /* VPCMPDZ256rmik */ 0x1871, /* VPCMPDZ256rrik */ /* Table10733 */ 0x1955, /* VPCMPUBZ256rmik */ 0x1959, /* VPCMPUBZ256rrik */ /* Table10735 */ 0x184d, /* VPCMPBZ256rmik */ 0x1851, /* VPCMPBZ256rrik */ /* Table10737 */ 0x1999, /* VPCMPUQZ256rmik */ 0x199d, /* VPCMPUQZ256rrik */ /* Table10739 */ 0x1939, /* VPCMPQZ256rmik */ 0x193d, /* VPCMPQZ256rrik */ /* Table10741 */ 0x19b5, /* VPCMPUWZ256rmik */ 0x19b9, /* VPCMPUWZ256rrik */ /* Table10743 */ 0x19cd, /* VPCMPWZ256rmik */ 0x19d1, /* VPCMPWZ256rrik */ /* Table10745 */ 0x0, /* */ 0xc45, /* VALIGNDrrik */ /* Table10747 */ 0x0, /* */ 0xe4a, /* VEXTRACTF32x4rrk */ /* Table10749 */ 0x1981, /* VPCMPUDZrmik */ 0x1985, /* VPCMPUDZrrik */ /* Table10751 */ 0x1879, /* VPCMPDZrmik */ 0x187d, /* VPCMPDZrrik */ /* Table10753 */ 0x0, /* */ 0xe54, /* VEXTRACTI32x4rrk */ /* Table10755 */ 0x195d, /* VPCMPUBZrmik */ 0x1961, /* VPCMPUBZrrik */ /* Table10757 */ 0x1855, /* VPCMPBZrmik */ 0x1859, /* VPCMPBZrrik */ /* Table10759 */ 0x0, /* */ 0xc49, /* VALIGNQrrik */ /* Table10761 */ 0x0, /* */ 0xe4e, /* VEXTRACTF64x4rrk */ /* Table10763 */ 0x19a5, /* VPCMPUQZrmik */ 0x19a9, /* VPCMPUQZrrik */ /* Table10765 */ 0x1945, /* VPCMPQZrmik */ 0x1949, /* VPCMPQZrrik */ /* Table10767 */ 0x0, /* */ 0xe58, /* VEXTRACTI64x4rrk */ /* Table10769 */ 0x19bd, /* VPCMPUWZrmik */ 0x19c1, /* VPCMPUWZrrik */ /* Table10771 */ 0x19d5, /* VPCMPWZrmik */ 0x19d9, /* VPCMPWZrrik */ /* Table10773 */ 0x0, /* */ 0x20b0, /* VRNDSCALESSrb */ /* Table10775 */ 0x1965, /* VPCMPUDZ128rmib */ 0x0, /* */ /* Table10777 */ 0x185d, /* VPCMPDZ128rmib */ 0x0, /* */ /* Table10779 */ 0x0, /* */ 0x20a7, /* VRNDSCALESDrb */ /* Table10781 */ 0x1989, /* VPCMPUQZ128rmib */ 0x0, /* */ /* Table10783 */ 0x1929, /* VPCMPQZ128rmib */ 0x0, /* */ /* Table10785 */ 0x1971, /* VPCMPUDZ256rmib */ 0x0, /* */ /* Table10787 */ 0x1869, /* VPCMPDZ256rmib */ 0x0, /* */ /* Table10789 */ 0x1995, /* VPCMPUQZ256rmib */ 0x0, /* */ /* Table10791 */ 0x1935, /* VPCMPQZ256rmib */ 0x0, /* */ /* Table10793 */ 0x197d, /* VPCMPUDZrmib */ 0x0, /* */ /* Table10795 */ 0x1875, /* VPCMPDZrmib */ 0x0, /* */ /* Table10797 */ 0x19a1, /* VPCMPUQZrmib */ 0x0, /* */ /* Table10799 */ 0x1941, /* VPCMPQZrmib */ 0x0, /* */ /* Table10801 */ 0x0, /* */ 0x20b1, /* VRNDSCALESSrbk */ /* Table10803 */ 0x1967, /* VPCMPUDZ128rmibk */ 0x0, /* */ /* Table10805 */ 0x185f, /* VPCMPDZ128rmibk */ 0x0, /* */ /* Table10807 */ 0x0, /* */ 0x20a8, /* VRNDSCALESDrbk */ /* Table10809 */ 0x198b, /* VPCMPUQZ128rmibk */ 0x0, /* */ /* Table10811 */ 0x192b, /* VPCMPQZ128rmibk */ 0x0, /* */ /* Table10813 */ 0x1973, /* VPCMPUDZ256rmibk */ 0x0, /* */ /* Table10815 */ 0x186b, /* VPCMPDZ256rmibk */ 0x0, /* */ /* Table10817 */ 0x1997, /* VPCMPUQZ256rmibk */ 0x0, /* */ /* Table10819 */ 0x1937, /* VPCMPQZ256rmibk */ 0x0, /* */ /* Table10821 */ 0x197f, /* VPCMPUDZrmibk */ 0x0, /* */ /* Table10823 */ 0x1877, /* VPCMPDZrmibk */ 0x0, /* */ /* Table10825 */ 0x19a3, /* VPCMPUQZrmibk */ 0x0, /* */ /* Table10827 */ 0x1943, /* VPCMPQZrmibk */ 0x0, /* */ /* Table10829 */ 0x0, /* */ 0x20b2, /* VRNDSCALESSrbkz */ /* Table10831 */ 0x0, /* */ 0x20a9, /* VRNDSCALESDrbkz */ /* Table10833 */ 0x20ae, /* VRNDSCALESSmkz */ 0x20b4, /* VRNDSCALESSrkz */ /* Table10835 */ 0x20a5, /* VRNDSCALESDmkz */ 0x20ab, /* VRNDSCALESDrkz */ /* Table10837 */ 0x0, /* */ 0xc46, /* VALIGNDrrikz */ /* Table10839 */ 0x0, /* */ 0xe4b, /* VEXTRACTF32x4rrkz */ /* Table10841 */ 0x0, /* */ 0xe55, /* VEXTRACTI32x4rrkz */ /* Table10843 */ 0x0, /* */ 0xc4a, /* VALIGNQrrikz */ /* Table10845 */ 0x0, /* */ 0xe4f, /* VEXTRACTF64x4rrkz */ /* Table10847 */ 0x0, /* */ 0xe59, /* VEXTRACTI64x4rrkz */ /* Table10849 */ 0x1b18, /* VPMACSSWWrm */ 0x1b19, /* VPMACSSWWrr */ /* Table10851 */ 0x1b16, /* VPMACSSWDrm */ 0x1b17, /* VPMACSSWDrr */ /* Table10853 */ 0x1b14, /* VPMACSSDQLrm */ 0x1b15, /* VPMACSSDQLrr */ /* Table10855 */ 0x1b10, /* VPMACSSDDrm */ 0x1b11, /* VPMACSSDDrr */ /* Table10857 */ 0x1b12, /* VPMACSSDQHrm */ 0x1b13, /* VPMACSSDQHrr */ /* Table10859 */ 0x1b1c, /* VPMACSWWrm */ 0x1b1d, /* VPMACSWWrr */ /* Table10861 */ 0x1b1a, /* VPMACSWDrm */ 0x1b1b, /* VPMACSWDrr */ /* Table10863 */ 0x1b0e, /* VPMACSDQLrm */ 0x1b0f, /* VPMACSDQLrr */ /* Table10865 */ 0x1b0a, /* VPMACSDDrm */ 0x1b0b, /* VPMACSDDrr */ /* Table10867 */ 0x1b0c, /* VPMACSDQHrm */ 0x1b0d, /* VPMACSDQHrr */ /* Table10869 */ 0x183d, /* VPCMOVmr */ 0x1841, /* VPCMOVrr */ /* Table10871 */ 0x1e3f, /* VPPERMmr */ 0x1e41, /* VPPERMrr */ /* Table10873 */ 0x1b1e, /* VPMADCSSWDrm */ 0x1b1f, /* VPMADCSSWDrr */ /* Table10875 */ 0x1b20, /* VPMADCSWDrm */ 0x1b21, /* VPMADCSWDrr */ /* Table10877 */ 0x1e42, /* VPROTBmi */ 0x1e44, /* VPROTBri */ /* Table10879 */ 0x1e51, /* VPROTWmi */ 0x1e53, /* VPROTWri */ /* Table10881 */ 0x1e47, /* VPROTDmi */ 0x1e49, /* VPROTDri */ /* Table10883 */ 0x1e4c, /* VPROTQmi */ 0x1e4e, /* VPROTQri */ /* Table10885 */ 0x19db, /* VPCOMBmi */ 0x19dd, /* VPCOMBri */ /* Table10887 */ 0x1a09, /* VPCOMWmi */ 0x1a0b, /* VPCOMWri */ /* Table10889 */ 0x19df, /* VPCOMDmi */ 0x19e1, /* VPCOMDri */ /* Table10891 */ 0x19f5, /* VPCOMQmi */ 0x19f7, /* VPCOMQri */ /* Table10893 */ 0x19f9, /* VPCOMUBmi */ 0x19fb, /* VPCOMUBri */ /* Table10895 */ 0x1a05, /* VPCOMUWmi */ 0x1a07, /* VPCOMUWri */ /* Table10897 */ 0x19fd, /* VPCOMUDmi */ 0x19ff, /* VPCOMUDri */ /* Table10899 */ 0x1a01, /* VPCOMUQmi */ 0x1a03, /* VPCOMUQri */ /* Table10901 */ 0x183f, /* VPCMOVrm */ 0x1841, /* VPCMOVrr */ /* Table10903 */ 0x1e40, /* VPPERMrm */ 0x1e41, /* VPPERMrr */ /* Table10905 */ 0x183e, /* VPCMOVmrY */ 0x1842, /* VPCMOVrrY */ /* Table10907 */ 0x1840, /* VPCMOVrmY */ 0x1842, /* VPCMOVrrY */ /* Table10909 */ 0x0, /* */ 0xed, /* BLCFILL32rm */ 0x109, /* BLSFILL32rm */ 0xfd, /* BLCS32rm */ 0xbb0, /* TZMSK32rm */ 0xf5, /* BLCIC32rm */ 0x111, /* BLSIC32rm */ 0xb6f, /* T1MSKC32rm */ 0x0, /* */ 0xee, /* BLCFILL32rr */ 0x10a, /* BLSFILL32rr */ 0xfe, /* BLCS32rr */ 0xbb1, /* TZMSK32rr */ 0xf6, /* BLCIC32rr */ 0x112, /* BLSIC32rr */ 0xb70, /* T1MSKC32rr */ /* Table10925 */ 0x0, /* */ 0xf9, /* BLCMSK32rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xf1, /* BLCI32rm */ 0x0, /* */ 0x0, /* */ 0xfa, /* BLCMSK32rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xf2, /* BLCI32rr */ 0x0, /* */ /* Table10941 */ 0x12be, /* VFRCZPSrm */ 0x12c0, /* VFRCZPSrr */ /* Table10943 */ 0x12ba, /* VFRCZPDrm */ 0x12bc, /* VFRCZPDrr */ /* Table10945 */ 0x12c4, /* VFRCZSSrm */ 0x12c5, /* VFRCZSSrr */ /* Table10947 */ 0x12c2, /* VFRCZSDrm */ 0x12c3, /* VFRCZSDrr */ /* Table10949 */ 0x1e43, /* VPROTBmr */ 0x1e46, /* VPROTBrr */ /* Table10951 */ 0x1e52, /* VPROTWmr */ 0x1e55, /* VPROTWrr */ /* Table10953 */ 0x1e48, /* VPROTDmr */ 0x1e4b, /* VPROTDrr */ /* Table10955 */ 0x1e4d, /* VPROTQmr */ 0x1e50, /* VPROTQrr */ /* Table10957 */ 0x1e6a, /* VPSHLBmr */ 0x1e6c, /* VPSHLBrr */ /* Table10959 */ 0x1e73, /* VPSHLWmr */ 0x1e75, /* VPSHLWrr */ /* Table10961 */ 0x1e6d, /* VPSHLDmr */ 0x1e6f, /* VPSHLDrr */ /* Table10963 */ 0x1e70, /* VPSHLQmr */ 0x1e72, /* VPSHLQrr */ /* Table10965 */ 0x1e5e, /* VPSHABmr */ 0x1e60, /* VPSHABrr */ /* Table10967 */ 0x1e67, /* VPSHAWmr */ 0x1e69, /* VPSHAWrr */ /* Table10969 */ 0x1e61, /* VPSHADmr */ 0x1e63, /* VPSHADrr */ /* Table10971 */ 0x1e64, /* VPSHAQmr */ 0x1e66, /* VPSHAQrr */ /* Table10973 */ 0x1abc, /* VPHADDBWrm */ 0x1abd, /* VPHADDBWrr */ /* Table10975 */ 0x1ab8, /* VPHADDBDrm */ 0x1ab9, /* VPHADDBDrr */ /* Table10977 */ 0x1aba, /* VPHADDBQrm */ 0x1abb, /* VPHADDBQrr */ /* Table10979 */ 0x1ad4, /* VPHADDWDrm */ 0x1ad5, /* VPHADDWDrr */ /* Table10981 */ 0x1ad6, /* VPHADDWQrm */ 0x1ad7, /* VPHADDWQrr */ /* Table10983 */ 0x1abe, /* VPHADDDQrm */ 0x1abf, /* VPHADDDQrr */ /* Table10985 */ 0x1acc, /* VPHADDUBWrm */ 0x1acd, /* VPHADDUBWrr */ /* Table10987 */ 0x1ac8, /* VPHADDUBDrm */ 0x1ac9, /* VPHADDUBDrr */ /* Table10989 */ 0x1aca, /* VPHADDUBQrm */ 0x1acb, /* VPHADDUBQrr */ /* Table10991 */ 0x1ad0, /* VPHADDUWDrm */ 0x1ad1, /* VPHADDUWDrr */ /* Table10993 */ 0x1ad2, /* VPHADDUWQrm */ 0x1ad3, /* VPHADDUWQrr */ /* Table10995 */ 0x1ace, /* VPHADDUDQrm */ 0x1acf, /* VPHADDUDQrr */ /* Table10997 */ 0x1ade, /* VPHSUBBWrm */ 0x1adf, /* VPHSUBBWrr */ /* Table10999 */ 0x1aea, /* VPHSUBWDrm */ 0x1aeb, /* VPHSUBWDrr */ /* Table11001 */ 0x1ae0, /* VPHSUBDQrm */ 0x1ae1, /* VPHSUBDQrr */ /* Table11003 */ 0x0, /* */ 0xef, /* BLCFILL64rm */ 0x10b, /* BLSFILL64rm */ 0xff, /* BLCS64rm */ 0xbb2, /* TZMSK64rm */ 0xf7, /* BLCIC64rm */ 0x113, /* BLSIC64rm */ 0xb71, /* T1MSKC64rm */ 0x0, /* */ 0xf0, /* BLCFILL64rr */ 0x10c, /* BLSFILL64rr */ 0x100, /* BLCS64rr */ 0xbb3, /* TZMSK64rr */ 0xf8, /* BLCIC64rr */ 0x114, /* BLSIC64rr */ 0xb72, /* T1MSKC64rr */ /* Table11019 */ 0x0, /* */ 0xfb, /* BLCMSK64rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xf3, /* BLCI64rm */ 0x0, /* */ 0x0, /* */ 0xfc, /* BLCMSK64rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xf4, /* BLCI64rr */ 0x0, /* */ /* Table11035 */ 0x1e45, /* VPROTBrm */ 0x1e46, /* VPROTBrr */ /* Table11037 */ 0x1e54, /* VPROTWrm */ 0x1e55, /* VPROTWrr */ /* Table11039 */ 0x1e4a, /* VPROTDrm */ 0x1e4b, /* VPROTDrr */ /* Table11041 */ 0x1e4f, /* VPROTQrm */ 0x1e50, /* VPROTQrr */ /* Table11043 */ 0x1e6b, /* VPSHLBrm */ 0x1e6c, /* VPSHLBrr */ /* Table11045 */ 0x1e74, /* VPSHLWrm */ 0x1e75, /* VPSHLWrr */ /* Table11047 */ 0x1e6e, /* VPSHLDrm */ 0x1e6f, /* VPSHLDrr */ /* Table11049 */ 0x1e71, /* VPSHLQrm */ 0x1e72, /* VPSHLQrr */ /* Table11051 */ 0x1e5f, /* VPSHABrm */ 0x1e60, /* VPSHABrr */ /* Table11053 */ 0x1e68, /* VPSHAWrm */ 0x1e69, /* VPSHAWrr */ /* Table11055 */ 0x1e62, /* VPSHADrm */ 0x1e63, /* VPSHADrr */ /* Table11057 */ 0x1e65, /* VPSHAQrm */ 0x1e66, /* VPSHAQrr */ /* Table11059 */ 0x12bf, /* VFRCZPSrmY */ 0x12c1, /* VFRCZPSrrY */ /* Table11061 */ 0x12bb, /* VFRCZPDrmY */ 0x12bd, /* VFRCZPDrrY */ /* Table11063 */ 0xe9, /* BEXTRI32mi */ 0xea, /* BEXTRI32ri */ /* Table11065 */ 0xeb, /* BEXTRI64mi */ 0xec, /* BEXTRI64ri */ /* Table11067 */ 0x89d, /* PREFETCH */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table11083 */ 0x301, /* FEMMS */ /* Table11084 */ 0x82c, /* PI2FWrm */ 0x82d, /* PI2FWrr */ /* Table11086 */ 0x82a, /* PI2FDrm */ 0x82b, /* PI2FDrr */ /* Table11088 */ 0x7f8, /* PF2IWrm */ 0x7f9, /* PF2IWrr */ /* Table11090 */ 0x7f6, /* PF2IDrm */ 0x7f7, /* PF2IDrr */ /* Table11092 */ 0x80a, /* PFNACCrm */ 0x80b, /* PFNACCrr */ /* Table11094 */ 0x80c, /* PFPNACCrm */ 0x80d, /* PFPNACCrr */ /* Table11096 */ 0x800, /* PFCMPGErm */ 0x801, /* PFCMPGErr */ /* Table11098 */ 0x806, /* PFMINrm */ 0x807, /* PFMINrr */ /* Table11100 */ 0x812, /* PFRCPrm */ 0x813, /* PFRCPrr */ /* Table11102 */ 0x816, /* PFRSQRTrm */ 0x817, /* PFRSQRTrr */ /* Table11104 */ 0x81a, /* PFSUBrm */ 0x81b, /* PFSUBrr */ /* Table11106 */ 0x7fc, /* PFADDrm */ 0x7fd, /* PFADDrr */ /* Table11108 */ 0x802, /* PFCMPGTrm */ 0x803, /* PFCMPGTrr */ /* Table11110 */ 0x804, /* PFMAXrm */ 0x805, /* PFMAXrr */ /* Table11112 */ 0x80e, /* PFRCPIT1rm */ 0x80f, /* PFRCPIT1rr */ /* Table11114 */ 0x814, /* PFRSQIT1rm */ 0x815, /* PFRSQIT1rr */ /* Table11116 */ 0x818, /* PFSUBRrm */ 0x819, /* PFSUBRrr */ /* Table11118 */ 0x7fa, /* PFACCrm */ 0x7fb, /* PFACCrr */ /* Table11120 */ 0x7fe, /* PFCMPEQrm */ 0x7ff, /* PFCMPEQrr */ /* Table11122 */ 0x808, /* PFMULrm */ 0x809, /* PFMULrr */ /* Table11124 */ 0x810, /* PFRCPIT2rm */ 0x811, /* PFRCPIT2rr */ /* Table11126 */ 0x86f, /* PMULHRWrm */ 0x870, /* PMULHRWrr */ /* Table11128 */ 0x8dd, /* PSWAPDrm */ 0x8de, /* PSWAPDrr */ /* Table11130 */ 0x7ba, /* PAVGUSBrm */ 0x7bb, /* PAVGUSBrr */ 0x0 }; static const struct OpcodeDecision x86DisassemblerOneByteOpcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 292 /* Table292 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 442 /* Table442 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 447 /* Table447 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 513 /* Table513 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 514 /* Table514 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 515 /* Table515 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 928 /* Table928 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 933 /* Table933 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 935 /* Table935 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1001 /* Table1001 */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1020 /* Table1020 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1024 /* Table1024 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1046 /* Table1046 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1048 /* Table1048 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1054 /* Table1054 */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1070 /* Table1070 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1072 /* Table1072 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1074 /* Table1074 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1075 /* Table1075 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1076 /* Table1076 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1077 /* Table1077 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1079 /* Table1079 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1081 /* Table1081 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1082 /* Table1082 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1083 /* Table1083 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1085 /* Table1085 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1087 /* Table1087 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1088 /* Table1088 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1089 /* Table1089 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1090 /* Table1090 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1092 /* Table1092 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1094 /* Table1094 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1095 /* Table1095 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1096 /* Table1096 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1097 /* Table1097 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1099 /* Table1099 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1101 /* Table1101 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1102 /* Table1102 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1104 /* Table1104 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1106 /* Table1106 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1107 /* Table1107 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1109 /* Table1109 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1111 /* Table1111 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1112 /* Table1112 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1114 /* Table1114 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1116 /* Table1116 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1121 /* Table1121 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1122 /* Table1122 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1123 /* Table1123 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1125 /* Table1125 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1126 /* Table1126 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1128 /* Table1128 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1129 /* Table1129 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1131 /* Table1131 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1132 /* Table1132 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1133 /* Table1133 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1149 /* Table1149 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1165 /* Table1165 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1167 /* Table1167 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1169 /* Table1169 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1171 /* Table1171 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1173 /* Table1173 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1175 /* Table1175 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1177 /* Table1177 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1179 /* Table1179 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1196 /* Table1196 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1197 /* Table1197 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1198 /* Table1198 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1199 /* Table1199 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1200 /* Table1200 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1201 /* Table1201 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1202 /* Table1202 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1203 /* Table1203 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1204 /* Table1204 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1205 /* Table1205 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1206 /* Table1206 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1207 /* Table1207 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1208 /* Table1208 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1210 /* Table1210 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1226 /* Table1226 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1227 /* Table1227 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1228 /* Table1228 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1230 /* Table1230 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1232 /* Table1232 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 442 /* Table442 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 447 /* Table447 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1307 /* Table1307 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1323 /* Table1323 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 513 /* Table513 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 514 /* Table514 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 515 /* Table515 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 928 /* Table928 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1339 /* Table1339 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1340 /* Table1340 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1341 /* Table1341 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1342 /* Table1342 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1343 /* Table1343 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1344 /* Table1344 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1345 /* Table1345 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1346 /* Table1346 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1362 /* Table1362 */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1378 /* Table1378 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1379 /* Table1379 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1380 /* Table1380 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1381 /* Table1381 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 292 /* Table292 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 442 /* Table442 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 447 /* Table447 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 513 /* Table513 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 514 /* Table514 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 515 /* Table515 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1382 /* Table1382 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 933 /* Table933 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 935 /* Table935 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1001 /* Table1001 */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1070 /* Table1070 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1072 /* Table1072 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1074 /* Table1074 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1075 /* Table1075 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1076 /* Table1076 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1077 /* Table1077 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1079 /* Table1079 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1081 /* Table1081 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1082 /* Table1082 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1083 /* Table1083 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1085 /* Table1085 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1087 /* Table1087 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1088 /* Table1088 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1089 /* Table1089 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1090 /* Table1090 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1092 /* Table1092 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1094 /* Table1094 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1095 /* Table1095 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1096 /* Table1096 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1097 /* Table1097 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1099 /* Table1099 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1101 /* Table1101 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1102 /* Table1102 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1104 /* Table1104 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1106 /* Table1106 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1107 /* Table1107 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1109 /* Table1109 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1111 /* Table1111 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1112 /* Table1112 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1114 /* Table1114 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1116 /* Table1116 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1117 /* Table1117 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1118 /* Table1118 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1121 /* Table1121 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1122 /* Table1122 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1123 /* Table1123 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1125 /* Table1125 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1126 /* Table1126 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1128 /* Table1128 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1129 /* Table1129 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1131 /* Table1131 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1132 /* Table1132 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1133 /* Table1133 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1149 /* Table1149 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1165 /* Table1165 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1167 /* Table1167 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1169 /* Table1169 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1171 /* Table1171 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1173 /* Table1173 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1175 /* Table1175 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1177 /* Table1177 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1179 /* Table1179 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1196 /* Table1196 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1197 /* Table1197 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1198 /* Table1198 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1199 /* Table1199 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1200 /* Table1200 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1378 /* Table1378 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1383 /* Table1383 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1380 /* Table1380 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1384 /* Table1384 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1203 /* Table1203 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1204 /* Table1204 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1205 /* Table1205 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1206 /* Table1206 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1207 /* Table1207 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1208 /* Table1208 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1210 /* Table1210 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1226 /* Table1226 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1227 /* Table1227 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1228 /* Table1228 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1230 /* Table1230 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1232 /* Table1232 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 442 /* Table442 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 447 /* Table447 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1307 /* Table1307 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1323 /* Table1323 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 513 /* Table513 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 514 /* Table514 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 515 /* Table515 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1382 /* Table1382 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1339 /* Table1339 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1340 /* Table1340 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1341 /* Table1341 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1342 /* Table1342 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1343 /* Table1343 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1344 /* Table1344 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1345 /* Table1345 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1346 /* Table1346 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1362 /* Table1362 */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 292 /* Table292 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 442 /* Table442 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 447 /* Table447 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 513 /* Table513 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 514 /* Table514 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 515 /* Table515 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 928 /* Table928 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 933 /* Table933 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 935 /* Table935 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1001 /* Table1001 */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1385 /* Table1385 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 292 /* Table292 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 442 /* Table442 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 447 /* Table447 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 513 /* Table513 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 514 /* Table514 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 515 /* Table515 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 928 /* Table928 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 933 /* Table933 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 935 /* Table935 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1001 /* Table1001 */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1386 /* Table1386 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1388 /* Table1388 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1390 /* Table1390 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1391 /* Table1391 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1393 /* Table1393 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1395 /* Table1395 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1396 /* Table1396 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1398 /* Table1398 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1400 /* Table1400 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1401 /* Table1401 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1403 /* Table1403 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1405 /* Table1405 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1406 /* Table1406 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1408 /* Table1408 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1410 /* Table1410 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1411 /* Table1411 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1413 /* Table1413 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1415 /* Table1415 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1416 /* Table1416 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1418 /* Table1418 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1420 /* Table1420 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1421 /* Table1421 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1423 /* Table1423 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1425 /* Table1425 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1426 /* Table1426 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1428 /* Table1428 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1430 /* Table1430 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1432 /* Table1432 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1448 /* Table1448 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1464 /* Table1464 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1466 /* Table1466 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1468 /* Table1468 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1470 /* Table1470 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1472 /* Table1472 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1474 /* Table1474 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1476 /* Table1476 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1479 /* Table1479 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1480 /* Table1480 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1481 /* Table1481 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1482 /* Table1482 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1483 /* Table1483 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1484 /* Table1484 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1485 /* Table1485 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1486 /* Table1486 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1487 /* Table1487 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1488 /* Table1488 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1490 /* Table1490 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1506 /* Table1506 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1578 /* Table1578 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1579 /* Table1579 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1580 /* Table1580 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1581 /* Table1581 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1597 /* Table1597 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1613 /* Table1613 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1629 /* Table1629 */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1386 /* Table1386 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1388 /* Table1388 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1390 /* Table1390 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1391 /* Table1391 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1393 /* Table1393 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1395 /* Table1395 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1396 /* Table1396 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1398 /* Table1398 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1400 /* Table1400 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1401 /* Table1401 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1403 /* Table1403 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1405 /* Table1405 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1406 /* Table1406 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1408 /* Table1408 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1410 /* Table1410 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1411 /* Table1411 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1413 /* Table1413 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1415 /* Table1415 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1416 /* Table1416 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1418 /* Table1418 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1420 /* Table1420 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1421 /* Table1421 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1423 /* Table1423 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1425 /* Table1425 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1426 /* Table1426 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1645 /* Table1645 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1428 /* Table1428 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1430 /* Table1430 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1131 /* Table1131 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1132 /* Table1132 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1432 /* Table1432 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1448 /* Table1448 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1464 /* Table1464 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1466 /* Table1466 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1468 /* Table1468 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1470 /* Table1470 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1472 /* Table1472 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1474 /* Table1474 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1476 /* Table1476 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1179 /* Table1179 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1479 /* Table1479 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1480 /* Table1480 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1199 /* Table1199 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1200 /* Table1200 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1646 /* Table1646 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1647 /* Table1647 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1483 /* Table1483 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1484 /* Table1484 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1485 /* Table1485 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1486 /* Table1486 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1487 /* Table1487 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1488 /* Table1488 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1490 /* Table1490 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1226 /* Table1226 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1227 /* Table1227 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1228 /* Table1228 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1230 /* Table1230 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1648 /* Table1648 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1578 /* Table1578 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1579 /* Table1579 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1580 /* Table1580 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1581 /* Table1581 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1597 /* Table1597 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1339 /* Table1339 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1340 /* Table1340 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1341 /* Table1341 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1342 /* Table1342 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1344 /* Table1344 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1345 /* Table1345 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1613 /* Table1613 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1720 /* Table1720 */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1070 /* Table1070 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1072 /* Table1072 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1074 /* Table1074 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1077 /* Table1077 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1079 /* Table1079 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1081 /* Table1081 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1083 /* Table1083 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1085 /* Table1085 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1087 /* Table1087 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1090 /* Table1090 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1092 /* Table1092 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1094 /* Table1094 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1097 /* Table1097 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1099 /* Table1099 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1101 /* Table1101 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1102 /* Table1102 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1104 /* Table1104 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1106 /* Table1106 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1107 /* Table1107 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1109 /* Table1109 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1111 /* Table1111 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1112 /* Table1112 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1114 /* Table1114 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1116 /* Table1116 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1020 /* Table1020 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1645 /* Table1645 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1126 /* Table1126 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1129 /* Table1129 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1131 /* Table1131 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1132 /* Table1132 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1133 /* Table1133 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1149 /* Table1149 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1165 /* Table1165 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1167 /* Table1167 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1169 /* Table1169 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1171 /* Table1171 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1173 /* Table1173 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1175 /* Table1175 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1177 /* Table1177 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1179 /* Table1179 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1196 /* Table1196 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1197 /* Table1197 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1199 /* Table1199 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1200 /* Table1200 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1736 /* Table1736 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1737 /* Table1737 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1203 /* Table1203 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1204 /* Table1204 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1205 /* Table1205 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1206 /* Table1206 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1207 /* Table1207 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1208 /* Table1208 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1210 /* Table1210 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1226 /* Table1226 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1227 /* Table1227 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1228 /* Table1228 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1230 /* Table1230 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1232 /* Table1232 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1307 /* Table1307 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1323 /* Table1323 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1339 /* Table1339 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1340 /* Table1340 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1341 /* Table1341 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1342 /* Table1342 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1344 /* Table1344 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1345 /* Table1345 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1346 /* Table1346 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1738 /* Table1738 */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1020 /* Table1020 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1024 /* Table1024 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 928 /* Table928 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1054 /* Table1054 */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1070 /* Table1070 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1072 /* Table1072 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1074 /* Table1074 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1077 /* Table1077 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1079 /* Table1079 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1081 /* Table1081 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1083 /* Table1083 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1085 /* Table1085 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1087 /* Table1087 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1090 /* Table1090 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1092 /* Table1092 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1094 /* Table1094 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1097 /* Table1097 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1099 /* Table1099 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1101 /* Table1101 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1102 /* Table1102 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1104 /* Table1104 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1106 /* Table1106 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1107 /* Table1107 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1109 /* Table1109 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1111 /* Table1111 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1112 /* Table1112 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1114 /* Table1114 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1116 /* Table1116 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1020 /* Table1020 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1645 /* Table1645 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1126 /* Table1126 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1129 /* Table1129 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1131 /* Table1131 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1132 /* Table1132 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1133 /* Table1133 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1149 /* Table1149 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1165 /* Table1165 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1167 /* Table1167 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1169 /* Table1169 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1171 /* Table1171 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1173 /* Table1173 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1175 /* Table1175 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1177 /* Table1177 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1179 /* Table1179 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1195 /* Table1195 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1196 /* Table1196 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1197 /* Table1197 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1199 /* Table1199 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1200 /* Table1200 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1201 /* Table1201 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1202 /* Table1202 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1203 /* Table1203 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1204 /* Table1204 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1205 /* Table1205 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1206 /* Table1206 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1207 /* Table1207 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1208 /* Table1208 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1209 /* Table1209 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1210 /* Table1210 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1226 /* Table1226 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1227 /* Table1227 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1228 /* Table1228 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1230 /* Table1230 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1232 /* Table1232 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1307 /* Table1307 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1323 /* Table1323 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1339 /* Table1339 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1340 /* Table1340 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1341 /* Table1341 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1342 /* Table1342 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1344 /* Table1344 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1345 /* Table1345 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1346 /* Table1346 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1738 /* Table1738 */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1020 /* Table1020 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1024 /* Table1024 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1046 /* Table1046 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1048 /* Table1048 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1054 /* Table1054 */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1020 /* Table1020 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1024 /* Table1024 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1385 /* Table1385 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1042 /* Table1042 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1046 /* Table1046 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1048 /* Table1048 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 258 /* Table258 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 275 /* Table275 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 369 /* Table369 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 443 /* Table443 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 444 /* Table444 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 448 /* Table448 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 465 /* Table465 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 497 /* Table497 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 963 /* Table963 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1054 /* Table1054 */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1386 /* Table1386 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1388 /* Table1388 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1390 /* Table1390 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1391 /* Table1391 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1393 /* Table1393 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1395 /* Table1395 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1396 /* Table1396 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1398 /* Table1398 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1400 /* Table1400 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1401 /* Table1401 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1403 /* Table1403 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1405 /* Table1405 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1406 /* Table1406 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1408 /* Table1408 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1410 /* Table1410 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1411 /* Table1411 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1413 /* Table1413 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1415 /* Table1415 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1416 /* Table1416 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1418 /* Table1418 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1420 /* Table1420 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1421 /* Table1421 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1423 /* Table1423 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1425 /* Table1425 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1426 /* Table1426 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1428 /* Table1428 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1430 /* Table1430 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1432 /* Table1432 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1448 /* Table1448 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1464 /* Table1464 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1466 /* Table1466 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1468 /* Table1468 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1470 /* Table1470 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1472 /* Table1472 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1474 /* Table1474 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1476 /* Table1476 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1479 /* Table1479 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1480 /* Table1480 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1481 /* Table1481 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1482 /* Table1482 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1483 /* Table1483 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1484 /* Table1484 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1485 /* Table1485 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1486 /* Table1486 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1487 /* Table1487 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1488 /* Table1488 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1490 /* Table1490 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1506 /* Table1506 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1578 /* Table1578 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1579 /* Table1579 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1580 /* Table1580 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1581 /* Table1581 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1597 /* Table1597 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1613 /* Table1613 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1629 /* Table1629 */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1386 /* Table1386 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1388 /* Table1388 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1390 /* Table1390 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1391 /* Table1391 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1393 /* Table1393 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1395 /* Table1395 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1396 /* Table1396 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1398 /* Table1398 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1400 /* Table1400 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1401 /* Table1401 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1403 /* Table1403 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1405 /* Table1405 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1406 /* Table1406 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1408 /* Table1408 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1410 /* Table1410 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1411 /* Table1411 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1413 /* Table1413 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1415 /* Table1415 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1416 /* Table1416 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1418 /* Table1418 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1420 /* Table1420 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1421 /* Table1421 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1423 /* Table1423 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1425 /* Table1425 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1019 /* Table1019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1426 /* Table1426 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1022 /* Table1022 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1428 /* Table1428 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1430 /* Table1430 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1432 /* Table1432 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1448 /* Table1448 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1464 /* Table1464 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1466 /* Table1466 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1468 /* Table1468 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1470 /* Table1470 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1472 /* Table1472 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1474 /* Table1474 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1476 /* Table1476 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1026 /* Table1026 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1479 /* Table1479 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1480 /* Table1480 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1043 /* Table1043 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1044 /* Table1044 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1481 /* Table1481 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1482 /* Table1482 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1483 /* Table1483 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1484 /* Table1484 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1485 /* Table1485 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1486 /* Table1486 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1487 /* Table1487 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1488 /* Table1488 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1490 /* Table1490 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1049 /* Table1049 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1050 /* Table1050 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 293 /* Table293 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 295 /* Table295 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1506 /* Table1506 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1578 /* Table1578 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1579 /* Table1579 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1580 /* Table1580 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1581 /* Table1581 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1597 /* Table1597 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 930 /* Table930 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 932 /* Table932 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1053 /* Table1053 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 934 /* Table934 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 938 /* Table938 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 940 /* Table940 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1613 /* Table1613 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1629 /* Table1629 */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1386 /* Table1386 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1388 /* Table1388 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1390 /* Table1390 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1391 /* Table1391 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1393 /* Table1393 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1395 /* Table1395 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1396 /* Table1396 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1398 /* Table1398 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1400 /* Table1400 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1401 /* Table1401 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1403 /* Table1403 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1405 /* Table1405 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1406 /* Table1406 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1408 /* Table1408 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1410 /* Table1410 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1411 /* Table1411 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1413 /* Table1413 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1415 /* Table1415 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1416 /* Table1416 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1418 /* Table1418 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1420 /* Table1420 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1421 /* Table1421 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1423 /* Table1423 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1425 /* Table1425 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1119 /* Table1119 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1120 /* Table1120 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1426 /* Table1426 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1645 /* Table1645 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1428 /* Table1428 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1023 /* Table1023 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1430 /* Table1430 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1131 /* Table1131 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1132 /* Table1132 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1432 /* Table1432 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1448 /* Table1448 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1464 /* Table1464 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1466 /* Table1466 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1468 /* Table1468 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1470 /* Table1470 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1472 /* Table1472 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1474 /* Table1474 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1476 /* Table1476 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1179 /* Table1179 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1478 /* Table1478 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1479 /* Table1479 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1480 /* Table1480 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1199 /* Table1199 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1200 /* Table1200 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1045 /* Table1045 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1481 /* Table1481 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1047 /* Table1047 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1482 /* Table1482 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1483 /* Table1483 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1484 /* Table1484 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1485 /* Table1485 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1486 /* Table1486 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1487 /* Table1487 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1488 /* Table1488 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1489 /* Table1489 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 259 /* Table259 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1490 /* Table1490 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1226 /* Table1226 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1227 /* Table1227 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1228 /* Table1228 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1230 /* Table1230 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 297 /* Table297 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1648 /* Table1648 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 441 /* Table441 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1051 /* Table1051 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1578 /* Table1578 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1579 /* Table1579 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 445 /* Table445 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 446 /* Table446 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1580 /* Table1580 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 449 /* Table449 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1581 /* Table1581 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 481 /* Table481 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1597 /* Table1597 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 516 /* Table516 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 517 /* Table517 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 533 /* Table533 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 605 /* Table605 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 677 /* Table677 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITREG, 749 /* Table749 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITREG, 765 /* Table765 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 781 /* Table781 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 853 /* Table853 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 925 /* Table925 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 926 /* Table926 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 927 /* Table927 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1052 /* Table1052 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 929 /* Table929 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1339 /* Table1339 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 931 /* Table931 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1340 /* Table1340 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 933 /* Table933 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1342 /* Table1342 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 936 /* Table936 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 937 /* Table937 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1344 /* Table1344 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 939 /* Table939 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1345 /* Table1345 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 941 /* Table941 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 942 /* Table942 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 943 /* Table943 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 944 /* Table944 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 945 /* Table945 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 946 /* Table946 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 947 /* Table947 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1613 /* Table1613 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 984 /* Table984 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 985 /* Table985 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1720 /* Table1720 */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerOneByteOpcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 0, 0, 8, 9, 10, 11, 12, 13, 14, 0, 0, 15, 16, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerTwoByteOpcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1770 /* Table1770 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1868 /* Table1868 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1870 /* Table1870 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1872 /* Table1872 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1914 /* Table1914 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1916 /* Table1916 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1918 /* Table1918 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1920 /* Table1920 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1926 /* Table1926 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1928 /* Table1928 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1930 /* Table1930 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1932 /* Table1932 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1979 /* Table1979 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1997 /* Table1997 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2001 /* Table2001 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2003 /* Table2003 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2005 /* Table2005 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2007 /* Table2007 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2037 /* Table2037 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2094 /* Table2094 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2096 /* Table2096 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2098 /* Table2098 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2150 /* Table2150 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2151 /* Table2151 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2303 /* Table2303 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2304 /* Table2304 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2421 /* Table2421 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2423 /* Table2423 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2433 /* Table2433 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2443 /* Table2443 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2530 /* Table2530 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2546 /* Table2546 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1868 /* Table1868 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1870 /* Table1870 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1872 /* Table1872 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1926 /* Table1926 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1928 /* Table1928 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1930 /* Table1930 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1932 /* Table1932 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1979 /* Table1979 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1997 /* Table1997 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2001 /* Table2001 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2003 /* Table2003 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2005 /* Table2005 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2007 /* Table2007 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2037 /* Table2037 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2626 /* Table2626 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2628 /* Table2628 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2098 /* Table2098 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2421 /* Table2421 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2423 /* Table2423 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2433 /* Table2433 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2443 /* Table2443 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2636 /* Table2636 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2652 /* Table2652 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2724 /* Table2724 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2726 /* Table2726 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2728 /* Table2728 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2730 /* Table2730 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2732 /* Table2732 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2734 /* Table2734 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2736 /* Table2736 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2738 /* Table2738 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2740 /* Table2740 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2742 /* Table2742 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2744 /* Table2744 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2760 /* Table2760 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2762 /* Table2762 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2764 /* Table2764 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2766 /* Table2766 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2768 /* Table2768 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2770 /* Table2770 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2772 /* Table2772 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1914 /* Table1914 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1916 /* Table1916 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1918 /* Table1918 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1920 /* Table1920 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2774 /* Table2774 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2776 /* Table2776 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2778 /* Table2778 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2780 /* Table2780 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2782 /* Table2782 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2784 /* Table2784 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2786 /* Table2786 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2788 /* Table2788 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2790 /* Table2790 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2792 /* Table2792 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2794 /* Table2794 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2796 /* Table2796 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2798 /* Table2798 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2800 /* Table2800 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2802 /* Table2802 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2804 /* Table2804 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2806 /* Table2806 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2808 /* Table2808 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2810 /* Table2810 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2812 /* Table2812 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2814 /* Table2814 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2816 /* Table2816 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2818 /* Table2818 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2820 /* Table2820 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2822 /* Table2822 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2824 /* Table2824 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2826 /* Table2826 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2828 /* Table2828 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2830 /* Table2830 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2832 /* Table2832 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2834 /* Table2834 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2836 /* Table2836 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2838 /* Table2838 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2840 /* Table2840 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2842 /* Table2842 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2844 /* Table2844 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2846 /* Table2846 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2848 /* Table2848 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2850 /* Table2850 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2852 /* Table2852 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2854 /* Table2854 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2856 /* Table2856 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2858 /* Table2858 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2860 /* Table2860 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2862 /* Table2862 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2864 /* Table2864 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2866 /* Table2866 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2868 /* Table2868 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2870 /* Table2870 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2872 /* Table2872 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2874 /* Table2874 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2876 /* Table2876 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2878 /* Table2878 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2880 /* Table2880 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2882 /* Table2882 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2884 /* Table2884 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2900 /* Table2900 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2916 /* Table2916 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2932 /* Table2932 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2934 /* Table2934 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2936 /* Table2936 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2938 /* Table2938 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2940 /* Table2940 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2942 /* Table2942 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2944 /* Table2944 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2946 /* Table2946 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2948 /* Table2948 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2950 /* Table2950 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2951 /* Table2951 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2952 /* Table2952 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2953 /* Table2953 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2954 /* Table2954 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2955 /* Table2955 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2956 /* Table2956 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2957 /* Table2957 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2958 /* Table2958 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2959 /* Table2959 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2960 /* Table2960 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2961 /* Table2961 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2962 /* Table2962 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2963 /* Table2963 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2964 /* Table2964 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2965 /* Table2965 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2966 /* Table2966 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2967 /* Table2967 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2968 /* Table2968 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2970 /* Table2970 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2972 /* Table2972 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2974 /* Table2974 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2975 /* Table2975 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2976 /* Table2976 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2978 /* Table2978 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2980 /* Table2980 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2982 /* Table2982 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3054 /* Table3054 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3056 /* Table3056 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3058 /* Table3058 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3060 /* Table3060 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3062 /* Table3062 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3064 /* Table3064 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3066 /* Table3066 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3068 /* Table3068 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3084 /* Table3084 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3086 /* Table3086 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3088 /* Table3088 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3090 /* Table3090 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3092 /* Table3092 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3094 /* Table3094 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3096 /* Table3096 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3098 /* Table3098 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3100 /* Table3100 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3102 /* Table3102 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3118 /* Table3118 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3120 /* Table3120 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3122 /* Table3122 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3124 /* Table3124 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3126 /* Table3126 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3128 /* Table3128 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3130 /* Table3130 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3132 /* Table3132 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3134 /* Table3134 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3136 /* Table3136 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3138 /* Table3138 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3140 /* Table3140 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3142 /* Table3142 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3144 /* Table3144 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3146 /* Table3146 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3148 /* Table3148 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3150 /* Table3150 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3152 /* Table3152 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3154 /* Table3154 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3156 /* Table3156 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3158 /* Table3158 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3160 /* Table3160 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3162 /* Table3162 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3164 /* Table3164 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3166 /* Table3166 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3168 /* Table3168 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3170 /* Table3170 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3172 /* Table3172 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3174 /* Table3174 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3176 /* Table3176 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3178 /* Table3178 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3180 /* Table3180 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3182 /* Table3182 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3184 /* Table3184 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3186 /* Table3186 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3188 /* Table3188 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3190 /* Table3190 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3192 /* Table3192 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3194 /* Table3194 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3196 /* Table3196 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3198 /* Table3198 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3200 /* Table3200 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3202 /* Table3202 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3204 /* Table3204 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3206 /* Table3206 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3208 /* Table3208 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1770 /* Table1770 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1868 /* Table1868 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1870 /* Table1870 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1872 /* Table1872 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1914 /* Table1914 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1916 /* Table1916 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1918 /* Table1918 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1920 /* Table1920 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1926 /* Table1926 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1928 /* Table1928 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1930 /* Table1930 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1932 /* Table1932 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1979 /* Table1979 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1997 /* Table1997 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2001 /* Table2001 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2003 /* Table2003 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2005 /* Table2005 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2007 /* Table2007 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2037 /* Table2037 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2094 /* Table2094 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2096 /* Table2096 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2098 /* Table2098 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2150 /* Table2150 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2151 /* Table2151 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2303 /* Table2303 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2304 /* Table2304 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2421 /* Table2421 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2423 /* Table2423 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2433 /* Table2433 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2443 /* Table2443 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2530 /* Table2530 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2636 /* Table2636 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2652 /* Table2652 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2724 /* Table2724 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2726 /* Table2726 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2728 /* Table2728 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2730 /* Table2730 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2732 /* Table2732 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2734 /* Table2734 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2736 /* Table2736 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2738 /* Table2738 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2740 /* Table2740 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2742 /* Table2742 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2744 /* Table2744 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2760 /* Table2760 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2762 /* Table2762 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2764 /* Table2764 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2766 /* Table2766 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2768 /* Table2768 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2770 /* Table2770 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2772 /* Table2772 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1914 /* Table1914 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1916 /* Table1916 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1918 /* Table1918 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1920 /* Table1920 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2774 /* Table2774 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2776 /* Table2776 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2778 /* Table2778 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2780 /* Table2780 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2782 /* Table2782 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2784 /* Table2784 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2786 /* Table2786 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2788 /* Table2788 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2790 /* Table2790 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2792 /* Table2792 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2794 /* Table2794 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2796 /* Table2796 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2798 /* Table2798 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2800 /* Table2800 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2802 /* Table2802 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2804 /* Table2804 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2806 /* Table2806 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2808 /* Table2808 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2810 /* Table2810 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2812 /* Table2812 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2814 /* Table2814 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2816 /* Table2816 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2818 /* Table2818 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2820 /* Table2820 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2822 /* Table2822 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2824 /* Table2824 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2826 /* Table2826 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2828 /* Table2828 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2830 /* Table2830 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2832 /* Table2832 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2834 /* Table2834 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2836 /* Table2836 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2838 /* Table2838 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2840 /* Table2840 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2842 /* Table2842 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2844 /* Table2844 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2846 /* Table2846 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2848 /* Table2848 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2850 /* Table2850 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2852 /* Table2852 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2854 /* Table2854 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2856 /* Table2856 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2858 /* Table2858 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2860 /* Table2860 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2862 /* Table2862 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2864 /* Table2864 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2866 /* Table2866 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2868 /* Table2868 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2870 /* Table2870 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2872 /* Table2872 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2874 /* Table2874 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2876 /* Table2876 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2878 /* Table2878 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2880 /* Table2880 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2882 /* Table2882 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2884 /* Table2884 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2900 /* Table2900 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2916 /* Table2916 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2932 /* Table2932 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2934 /* Table2934 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2936 /* Table2936 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2938 /* Table2938 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2940 /* Table2940 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2942 /* Table2942 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2944 /* Table2944 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2946 /* Table2946 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2948 /* Table2948 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2950 /* Table2950 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2951 /* Table2951 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2952 /* Table2952 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2953 /* Table2953 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2954 /* Table2954 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2955 /* Table2955 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2956 /* Table2956 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2957 /* Table2957 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2958 /* Table2958 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2959 /* Table2959 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2960 /* Table2960 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2961 /* Table2961 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2962 /* Table2962 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2963 /* Table2963 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2964 /* Table2964 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2965 /* Table2965 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2966 /* Table2966 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2967 /* Table2967 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2968 /* Table2968 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2970 /* Table2970 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2972 /* Table2972 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2974 /* Table2974 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2975 /* Table2975 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2976 /* Table2976 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2978 /* Table2978 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2980 /* Table2980 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2982 /* Table2982 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3054 /* Table3054 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3056 /* Table3056 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3058 /* Table3058 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3060 /* Table3060 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3062 /* Table3062 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3064 /* Table3064 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3066 /* Table3066 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3068 /* Table3068 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3084 /* Table3084 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3086 /* Table3086 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3088 /* Table3088 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3090 /* Table3090 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3092 /* Table3092 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3094 /* Table3094 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3096 /* Table3096 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3098 /* Table3098 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3100 /* Table3100 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3102 /* Table3102 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3118 /* Table3118 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3120 /* Table3120 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3122 /* Table3122 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3124 /* Table3124 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3126 /* Table3126 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3128 /* Table3128 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3130 /* Table3130 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3132 /* Table3132 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3134 /* Table3134 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3136 /* Table3136 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3138 /* Table3138 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3140 /* Table3140 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3142 /* Table3142 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3144 /* Table3144 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3146 /* Table3146 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3148 /* Table3148 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3150 /* Table3150 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3152 /* Table3152 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3154 /* Table3154 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3156 /* Table3156 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3158 /* Table3158 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3160 /* Table3160 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3162 /* Table3162 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3164 /* Table3164 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3166 /* Table3166 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3168 /* Table3168 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3170 /* Table3170 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3172 /* Table3172 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3174 /* Table3174 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3176 /* Table3176 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3178 /* Table3178 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3180 /* Table3180 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3182 /* Table3182 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3184 /* Table3184 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3186 /* Table3186 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3188 /* Table3188 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3190 /* Table3190 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3192 /* Table3192 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3194 /* Table3194 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3196 /* Table3196 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3198 /* Table3198 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3200 /* Table3200 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3202 /* Table3202 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3204 /* Table3204 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3206 /* Table3206 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3208 /* Table3208 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1770 /* Table1770 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3210 /* Table3210 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3212 /* Table3212 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3214 /* Table3214 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1914 /* Table1914 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1916 /* Table1916 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1918 /* Table1918 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1920 /* Table1920 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3216 /* Table3216 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3218 /* Table3218 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3220 /* Table3220 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3222 /* Table3222 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3224 /* Table3224 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3226 /* Table3226 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3228 /* Table3228 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3230 /* Table3230 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3232 /* Table3232 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3234 /* Table3234 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3236 /* Table3236 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3238 /* Table3238 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3240 /* Table3240 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3242 /* Table3242 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3244 /* Table3244 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3246 /* Table3246 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3248 /* Table3248 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2098 /* Table2098 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2150 /* Table2150 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2151 /* Table2151 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2303 /* Table2303 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2304 /* Table2304 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2421 /* Table2421 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2423 /* Table2423 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3250 /* Table3250 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2443 /* Table2443 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3252 /* Table3252 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3254 /* Table3254 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3256 /* Table3256 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3258 /* Table3258 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2530 /* Table2530 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1770 /* Table1770 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3260 /* Table3260 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3262 /* Table3262 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3264 /* Table3264 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3266 /* Table3266 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1914 /* Table1914 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1916 /* Table1916 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1918 /* Table1918 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1920 /* Table1920 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3268 /* Table3268 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3270 /* Table3270 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3272 /* Table3272 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3274 /* Table3274 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3276 /* Table3276 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3278 /* Table3278 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3280 /* Table3280 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3282 /* Table3282 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3284 /* Table3284 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3286 /* Table3286 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3288 /* Table3288 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3290 /* Table3290 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3292 /* Table3292 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3294 /* Table3294 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3296 /* Table3296 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3298 /* Table3298 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3300 /* Table3300 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2094 /* Table2094 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2096 /* Table2096 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3302 /* Table3302 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3304 /* Table3304 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2150 /* Table2150 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2151 /* Table2151 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2303 /* Table2303 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2304 /* Table2304 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3306 /* Table3306 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3308 /* Table3308 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3310 /* Table3310 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3312 /* Table3312 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3314 /* Table3314 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3330 /* Table3330 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3332 /* Table3332 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2530 /* Table2530 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3334 /* Table3334 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3336 /* Table3336 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3338 /* Table3338 */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3340 /* Table3340 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3356 /* Table3356 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3428 /* Table3428 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3430 /* Table3430 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3432 /* Table3432 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1868 /* Table1868 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1870 /* Table1870 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1872 /* Table1872 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1926 /* Table1926 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1928 /* Table1928 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1930 /* Table1930 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1932 /* Table1932 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3433 /* Table3433 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3434 /* Table3434 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3436 /* Table3436 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3438 /* Table3438 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3440 /* Table3440 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3442 /* Table3442 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3444 /* Table3444 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3446 /* Table3446 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3448 /* Table3448 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3450 /* Table3450 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3452 /* Table3452 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3454 /* Table3454 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3456 /* Table3456 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3458 /* Table3458 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3460 /* Table3460 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3462 /* Table3462 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3464 /* Table3464 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1979 /* Table1979 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1997 /* Table1997 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2001 /* Table2001 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2003 /* Table2003 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2005 /* Table2005 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2007 /* Table2007 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3466 /* Table3466 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2037 /* Table2037 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2626 /* Table2626 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2628 /* Table2628 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3468 /* Table3468 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3470 /* Table3470 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3472 /* Table3472 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3474 /* Table3474 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3476 /* Table3476 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3478 /* Table3478 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3480 /* Table3480 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3482 /* Table3482 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3554 /* Table3554 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3556 /* Table3556 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3558 /* Table3558 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3560 /* Table3560 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3562 /* Table3562 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3564 /* Table3564 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3566 /* Table3566 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3568 /* Table3568 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3570 /* Table3570 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3586 /* Table3586 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3588 /* Table3588 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3590 /* Table3590 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3592 /* Table3592 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3594 /* Table3594 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3596 /* Table3596 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2433 /* Table2433 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3598 /* Table3598 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3600 /* Table3600 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3340 /* Table3340 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3356 /* Table3356 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3428 /* Table3428 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3430 /* Table3430 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3432 /* Table3432 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2728 /* Table2728 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2730 /* Table2730 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2732 /* Table2732 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2734 /* Table2734 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2736 /* Table2736 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2738 /* Table2738 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2740 /* Table2740 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2742 /* Table2742 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2744 /* Table2744 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2760 /* Table2760 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2762 /* Table2762 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2764 /* Table2764 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2766 /* Table2766 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2768 /* Table2768 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2770 /* Table2770 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2772 /* Table2772 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2774 /* Table2774 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2776 /* Table2776 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2778 /* Table2778 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2780 /* Table2780 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2782 /* Table2782 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2784 /* Table2784 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2786 /* Table2786 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2788 /* Table2788 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3433 /* Table3433 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3434 /* Table3434 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3436 /* Table3436 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3438 /* Table3438 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3440 /* Table3440 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3442 /* Table3442 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3444 /* Table3444 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3446 /* Table3446 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3448 /* Table3448 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3450 /* Table3450 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3452 /* Table3452 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3454 /* Table3454 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3456 /* Table3456 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3458 /* Table3458 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3460 /* Table3460 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3462 /* Table3462 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3464 /* Table3464 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2822 /* Table2822 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2824 /* Table2824 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2826 /* Table2826 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2828 /* Table2828 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2830 /* Table2830 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2832 /* Table2832 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2834 /* Table2834 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2836 /* Table2836 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2838 /* Table2838 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2840 /* Table2840 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2842 /* Table2842 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2844 /* Table2844 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2846 /* Table2846 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2848 /* Table2848 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2850 /* Table2850 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2852 /* Table2852 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2854 /* Table2854 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2856 /* Table2856 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2858 /* Table2858 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2860 /* Table2860 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2862 /* Table2862 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2864 /* Table2864 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2866 /* Table2866 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2868 /* Table2868 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2870 /* Table2870 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2872 /* Table2872 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2874 /* Table2874 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2876 /* Table2876 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3466 /* Table3466 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2880 /* Table2880 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2882 /* Table2882 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2884 /* Table2884 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2900 /* Table2900 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2916 /* Table2916 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2932 /* Table2932 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2934 /* Table2934 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2936 /* Table2936 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3617 /* Table3617 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3619 /* Table3619 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2942 /* Table2942 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2944 /* Table2944 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3468 /* Table3468 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2948 /* Table2948 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2950 /* Table2950 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2951 /* Table2951 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2952 /* Table2952 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2953 /* Table2953 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2954 /* Table2954 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2955 /* Table2955 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2956 /* Table2956 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2957 /* Table2957 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2958 /* Table2958 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2959 /* Table2959 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2960 /* Table2960 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2961 /* Table2961 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2962 /* Table2962 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2963 /* Table2963 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2964 /* Table2964 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2965 /* Table2965 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2966 /* Table2966 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2967 /* Table2967 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3470 /* Table3470 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3472 /* Table3472 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3474 /* Table3474 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2974 /* Table2974 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2975 /* Table2975 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3476 /* Table3476 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3478 /* Table3478 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3480 /* Table3480 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3621 /* Table3621 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3554 /* Table3554 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3556 /* Table3556 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3558 /* Table3558 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3560 /* Table3560 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3562 /* Table3562 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3564 /* Table3564 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3566 /* Table3566 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3568 /* Table3568 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3570 /* Table3570 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3586 /* Table3586 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3588 /* Table3588 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3590 /* Table3590 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3592 /* Table3592 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3594 /* Table3594 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3596 /* Table3596 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3094 /* Table3094 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3598 /* Table3598 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3096 /* Table3096 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3098 /* Table3098 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3100 /* Table3100 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3693 /* Table3693 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3118 /* Table3118 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3120 /* Table3120 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3122 /* Table3122 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3124 /* Table3124 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3126 /* Table3126 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3128 /* Table3128 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3130 /* Table3130 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3132 /* Table3132 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3134 /* Table3134 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3136 /* Table3136 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3138 /* Table3138 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3140 /* Table3140 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3142 /* Table3142 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3144 /* Table3144 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3146 /* Table3146 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3148 /* Table3148 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3150 /* Table3150 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3152 /* Table3152 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3154 /* Table3154 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3156 /* Table3156 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3158 /* Table3158 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3160 /* Table3160 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3162 /* Table3162 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3164 /* Table3164 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3166 /* Table3166 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3168 /* Table3168 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3170 /* Table3170 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3172 /* Table3172 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3174 /* Table3174 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3176 /* Table3176 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3178 /* Table3178 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3180 /* Table3180 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3182 /* Table3182 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3184 /* Table3184 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3186 /* Table3186 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3188 /* Table3188 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3190 /* Table3190 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3192 /* Table3192 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3709 /* Table3709 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3196 /* Table3196 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3198 /* Table3198 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3200 /* Table3200 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3202 /* Table3202 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3204 /* Table3204 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3206 /* Table3206 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3208 /* Table3208 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2636 /* Table2636 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3711 /* Table3711 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2724 /* Table2724 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2726 /* Table2726 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2728 /* Table2728 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2730 /* Table2730 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2732 /* Table2732 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2734 /* Table2734 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2736 /* Table2736 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2738 /* Table2738 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2740 /* Table2740 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2742 /* Table2742 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2744 /* Table2744 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2760 /* Table2760 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2762 /* Table2762 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2764 /* Table2764 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2766 /* Table2766 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2768 /* Table2768 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2770 /* Table2770 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2772 /* Table2772 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2774 /* Table2774 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2776 /* Table2776 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2778 /* Table2778 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2780 /* Table2780 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2782 /* Table2782 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2784 /* Table2784 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2786 /* Table2786 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2788 /* Table2788 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2790 /* Table2790 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2792 /* Table2792 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2794 /* Table2794 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2796 /* Table2796 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2798 /* Table2798 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2800 /* Table2800 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2802 /* Table2802 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2804 /* Table2804 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2806 /* Table2806 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2808 /* Table2808 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2810 /* Table2810 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2812 /* Table2812 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2814 /* Table2814 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2816 /* Table2816 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2818 /* Table2818 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2820 /* Table2820 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2822 /* Table2822 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2824 /* Table2824 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2826 /* Table2826 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2828 /* Table2828 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2830 /* Table2830 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2832 /* Table2832 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2834 /* Table2834 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2836 /* Table2836 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2838 /* Table2838 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2840 /* Table2840 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2842 /* Table2842 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2844 /* Table2844 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2846 /* Table2846 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2848 /* Table2848 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2850 /* Table2850 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2852 /* Table2852 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2854 /* Table2854 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2856 /* Table2856 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2858 /* Table2858 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2860 /* Table2860 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2862 /* Table2862 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2864 /* Table2864 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2866 /* Table2866 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2868 /* Table2868 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2870 /* Table2870 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2872 /* Table2872 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2874 /* Table2874 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2876 /* Table2876 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2878 /* Table2878 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2880 /* Table2880 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2882 /* Table2882 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2884 /* Table2884 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2900 /* Table2900 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2916 /* Table2916 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2932 /* Table2932 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2934 /* Table2934 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2936 /* Table2936 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3617 /* Table3617 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3619 /* Table3619 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2942 /* Table2942 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2944 /* Table2944 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2946 /* Table2946 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2948 /* Table2948 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2950 /* Table2950 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2951 /* Table2951 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2952 /* Table2952 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2953 /* Table2953 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2954 /* Table2954 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2955 /* Table2955 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2956 /* Table2956 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2957 /* Table2957 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2958 /* Table2958 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2959 /* Table2959 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2960 /* Table2960 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2961 /* Table2961 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2962 /* Table2962 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2963 /* Table2963 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2964 /* Table2964 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2965 /* Table2965 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2966 /* Table2966 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2967 /* Table2967 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2968 /* Table2968 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2970 /* Table2970 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2972 /* Table2972 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2974 /* Table2974 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2975 /* Table2975 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2976 /* Table2976 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2978 /* Table2978 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2980 /* Table2980 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2982 /* Table2982 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3054 /* Table3054 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3056 /* Table3056 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3058 /* Table3058 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3060 /* Table3060 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3062 /* Table3062 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3064 /* Table3064 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3066 /* Table3066 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3068 /* Table3068 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3084 /* Table3084 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3086 /* Table3086 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3088 /* Table3088 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3090 /* Table3090 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3092 /* Table3092 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3094 /* Table3094 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3096 /* Table3096 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3098 /* Table3098 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3100 /* Table3100 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3102 /* Table3102 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3118 /* Table3118 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3120 /* Table3120 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3122 /* Table3122 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3124 /* Table3124 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3126 /* Table3126 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3128 /* Table3128 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3130 /* Table3130 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3132 /* Table3132 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3134 /* Table3134 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3136 /* Table3136 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3138 /* Table3138 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3140 /* Table3140 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3142 /* Table3142 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3144 /* Table3144 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3146 /* Table3146 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3148 /* Table3148 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3150 /* Table3150 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3152 /* Table3152 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3154 /* Table3154 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3156 /* Table3156 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3158 /* Table3158 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3160 /* Table3160 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3162 /* Table3162 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3164 /* Table3164 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3166 /* Table3166 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3168 /* Table3168 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3170 /* Table3170 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3172 /* Table3172 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3174 /* Table3174 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3176 /* Table3176 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3178 /* Table3178 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3180 /* Table3180 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3182 /* Table3182 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3184 /* Table3184 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3186 /* Table3186 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3188 /* Table3188 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3190 /* Table3190 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3192 /* Table3192 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3709 /* Table3709 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3196 /* Table3196 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3198 /* Table3198 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3200 /* Table3200 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3202 /* Table3202 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3204 /* Table3204 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3206 /* Table3206 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3208 /* Table3208 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2546 /* Table2546 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1868 /* Table1868 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1870 /* Table1870 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1872 /* Table1872 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1926 /* Table1926 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1928 /* Table1928 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1930 /* Table1930 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1932 /* Table1932 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1979 /* Table1979 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1997 /* Table1997 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2001 /* Table2001 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2003 /* Table2003 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2005 /* Table2005 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2007 /* Table2007 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2037 /* Table2037 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2626 /* Table2626 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2628 /* Table2628 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2098 /* Table2098 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2421 /* Table2421 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2423 /* Table2423 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2433 /* Table2433 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2443 /* Table2443 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2636 /* Table2636 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3711 /* Table3711 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2724 /* Table2724 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2726 /* Table2726 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2728 /* Table2728 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2730 /* Table2730 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2732 /* Table2732 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2734 /* Table2734 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2736 /* Table2736 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2738 /* Table2738 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2740 /* Table2740 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2742 /* Table2742 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2744 /* Table2744 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2760 /* Table2760 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2762 /* Table2762 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2764 /* Table2764 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2766 /* Table2766 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2768 /* Table2768 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2770 /* Table2770 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2772 /* Table2772 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2774 /* Table2774 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2776 /* Table2776 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2778 /* Table2778 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2780 /* Table2780 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2782 /* Table2782 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2784 /* Table2784 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2786 /* Table2786 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2788 /* Table2788 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2790 /* Table2790 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2792 /* Table2792 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2794 /* Table2794 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2796 /* Table2796 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2798 /* Table2798 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2800 /* Table2800 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2802 /* Table2802 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2804 /* Table2804 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2806 /* Table2806 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2808 /* Table2808 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2810 /* Table2810 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2812 /* Table2812 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2814 /* Table2814 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2816 /* Table2816 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2818 /* Table2818 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2820 /* Table2820 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2822 /* Table2822 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2824 /* Table2824 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2826 /* Table2826 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2828 /* Table2828 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2830 /* Table2830 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2832 /* Table2832 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2834 /* Table2834 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2836 /* Table2836 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2838 /* Table2838 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2840 /* Table2840 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2842 /* Table2842 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2844 /* Table2844 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2846 /* Table2846 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2848 /* Table2848 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2850 /* Table2850 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2852 /* Table2852 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2854 /* Table2854 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2856 /* Table2856 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2858 /* Table2858 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2860 /* Table2860 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2862 /* Table2862 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2864 /* Table2864 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2866 /* Table2866 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2868 /* Table2868 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2870 /* Table2870 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2872 /* Table2872 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2874 /* Table2874 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2876 /* Table2876 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2878 /* Table2878 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2880 /* Table2880 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2882 /* Table2882 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2884 /* Table2884 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2900 /* Table2900 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2916 /* Table2916 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2932 /* Table2932 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2934 /* Table2934 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2936 /* Table2936 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3617 /* Table3617 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3619 /* Table3619 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2942 /* Table2942 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2944 /* Table2944 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2946 /* Table2946 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2948 /* Table2948 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2950 /* Table2950 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2951 /* Table2951 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2952 /* Table2952 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2953 /* Table2953 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2954 /* Table2954 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2955 /* Table2955 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2956 /* Table2956 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2957 /* Table2957 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2958 /* Table2958 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2959 /* Table2959 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2960 /* Table2960 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2961 /* Table2961 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2962 /* Table2962 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2963 /* Table2963 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2964 /* Table2964 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2965 /* Table2965 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2966 /* Table2966 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2967 /* Table2967 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2968 /* Table2968 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2970 /* Table2970 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2972 /* Table2972 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2974 /* Table2974 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2975 /* Table2975 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2976 /* Table2976 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2978 /* Table2978 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2980 /* Table2980 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2982 /* Table2982 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3054 /* Table3054 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3056 /* Table3056 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3058 /* Table3058 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3060 /* Table3060 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3062 /* Table3062 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3064 /* Table3064 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3066 /* Table3066 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3068 /* Table3068 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3084 /* Table3084 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3086 /* Table3086 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3088 /* Table3088 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3090 /* Table3090 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3092 /* Table3092 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3094 /* Table3094 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3096 /* Table3096 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3098 /* Table3098 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3100 /* Table3100 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3102 /* Table3102 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3118 /* Table3118 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3120 /* Table3120 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3122 /* Table3122 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3124 /* Table3124 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3126 /* Table3126 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3128 /* Table3128 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3130 /* Table3130 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3132 /* Table3132 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3134 /* Table3134 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3136 /* Table3136 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3138 /* Table3138 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3140 /* Table3140 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3142 /* Table3142 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3144 /* Table3144 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3146 /* Table3146 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3148 /* Table3148 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3150 /* Table3150 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3152 /* Table3152 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3154 /* Table3154 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3156 /* Table3156 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3158 /* Table3158 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3160 /* Table3160 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3162 /* Table3162 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3164 /* Table3164 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3166 /* Table3166 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3168 /* Table3168 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3170 /* Table3170 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3172 /* Table3172 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3174 /* Table3174 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3176 /* Table3176 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3178 /* Table3178 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3180 /* Table3180 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3182 /* Table3182 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3184 /* Table3184 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3186 /* Table3186 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3188 /* Table3188 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3190 /* Table3190 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3192 /* Table3192 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3709 /* Table3709 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3196 /* Table3196 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3198 /* Table3198 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3200 /* Table3200 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3202 /* Table3202 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3204 /* Table3204 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3206 /* Table3206 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3208 /* Table3208 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2546 /* Table2546 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3210 /* Table3210 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3212 /* Table3212 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3214 /* Table3214 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3216 /* Table3216 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3218 /* Table3218 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3220 /* Table3220 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3222 /* Table3222 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3224 /* Table3224 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3226 /* Table3226 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3228 /* Table3228 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3230 /* Table3230 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3232 /* Table3232 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3234 /* Table3234 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3236 /* Table3236 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3238 /* Table3238 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3240 /* Table3240 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3783 /* Table3783 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3785 /* Table3785 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3246 /* Table3246 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3248 /* Table3248 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2098 /* Table2098 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2312 /* Table2312 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2421 /* Table2421 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2423 /* Table2423 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3250 /* Table3250 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2443 /* Table2443 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3252 /* Table3252 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3254 /* Table3254 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3256 /* Table3256 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3258 /* Table3258 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1754 /* Table1754 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2546 /* Table2546 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1842 /* Table1842 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1844 /* Table1844 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3260 /* Table3260 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3262 /* Table3262 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3264 /* Table3264 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3266 /* Table3266 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3268 /* Table3268 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3270 /* Table3270 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3272 /* Table3272 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3274 /* Table3274 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1943 /* Table1943 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1951 /* Table1951 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1953 /* Table1953 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1955 /* Table1955 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1957 /* Table1957 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1959 /* Table1959 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1961 /* Table1961 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1963 /* Table1963 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1965 /* Table1965 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3276 /* Table3276 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3278 /* Table3278 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3280 /* Table3280 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3282 /* Table3282 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3284 /* Table3284 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3286 /* Table3286 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3288 /* Table3288 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3290 /* Table3290 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3292 /* Table3292 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3294 /* Table3294 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3296 /* Table3296 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2033 /* Table2033 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3298 /* Table3298 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3300 /* Table3300 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2626 /* Table2626 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2628 /* Table2628 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3302 /* Table3302 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3304 /* Table3304 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2155 /* Table2155 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2157 /* Table2157 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2306 /* Table2306 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2308 /* Table2308 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2310 /* Table2310 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3787 /* Table3787 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2384 /* Table2384 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2388 /* Table2388 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2390 /* Table2390 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2392 /* Table2392 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2394 /* Table2394 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2396 /* Table2396 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2398 /* Table2398 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2400 /* Table2400 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3306 /* Table3306 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2403 /* Table2403 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2419 /* Table2419 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3308 /* Table3308 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3310 /* Table3310 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2425 /* Table2425 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2427 /* Table2427 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2431 /* Table2431 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3312 /* Table3312 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2435 /* Table2435 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3314 /* Table3314 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2459 /* Table2459 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3330 /* Table3330 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3332 /* Table3332 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3334 /* Table3334 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3336 /* Table3336 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3338 /* Table3338 */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3340 /* Table3340 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3356 /* Table3356 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3428 /* Table3428 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3430 /* Table3430 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3432 /* Table3432 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3260 /* Table3260 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3262 /* Table3262 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3264 /* Table3264 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3266 /* Table3266 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3859 /* Table3859 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3270 /* Table3270 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3861 /* Table3861 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3863 /* Table3863 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3433 /* Table3433 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3434 /* Table3434 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3436 /* Table3436 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3438 /* Table3438 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3440 /* Table3440 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3442 /* Table3442 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3444 /* Table3444 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3446 /* Table3446 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3448 /* Table3448 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3450 /* Table3450 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3452 /* Table3452 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3454 /* Table3454 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3456 /* Table3456 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3458 /* Table3458 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3460 /* Table3460 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3462 /* Table3462 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3464 /* Table3464 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3276 /* Table3276 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3278 /* Table3278 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3280 /* Table3280 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3282 /* Table3282 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3284 /* Table3284 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3286 /* Table3286 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3288 /* Table3288 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3290 /* Table3290 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3292 /* Table3292 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3294 /* Table3294 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3296 /* Table3296 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3466 /* Table3466 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3298 /* Table3298 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3300 /* Table3300 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2626 /* Table2626 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2628 /* Table2628 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3468 /* Table3468 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3304 /* Table3304 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3470 /* Table3470 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3472 /* Table3472 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3474 /* Table3474 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3476 /* Table3476 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3478 /* Table3478 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3480 /* Table3480 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3865 /* Table3865 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3554 /* Table3554 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3556 /* Table3556 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3558 /* Table3558 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3560 /* Table3560 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3562 /* Table3562 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3564 /* Table3564 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3566 /* Table3566 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3568 /* Table3568 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3937 /* Table3937 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3570 /* Table3570 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3586 /* Table3586 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3939 /* Table3939 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3941 /* Table3941 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3592 /* Table3592 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3594 /* Table3594 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3596 /* Table3596 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3312 /* Table3312 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3598 /* Table3598 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3943 /* Table3943 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3330 /* Table3330 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3332 /* Table3332 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3340 /* Table3340 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3356 /* Table3356 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3428 /* Table3428 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3430 /* Table3430 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3432 /* Table3432 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3210 /* Table3210 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3212 /* Table3212 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3214 /* Table3214 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1874 /* Table1874 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1876 /* Table1876 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1878 /* Table1878 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1880 /* Table1880 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1882 /* Table1882 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1884 /* Table1884 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1900 /* Table1900 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1902 /* Table1902 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1904 /* Table1904 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1906 /* Table1906 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1908 /* Table1908 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1910 /* Table1910 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1912 /* Table1912 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1922 /* Table1922 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1924 /* Table1924 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3959 /* Table3959 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3218 /* Table3218 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3961 /* Table3961 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3963 /* Table3963 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1934 /* Table1934 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1936 /* Table1936 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3433 /* Table3433 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3434 /* Table3434 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3436 /* Table3436 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3438 /* Table3438 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3440 /* Table3440 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3442 /* Table3442 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3444 /* Table3444 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3446 /* Table3446 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3448 /* Table3448 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3450 /* Table3450 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3452 /* Table3452 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3454 /* Table3454 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3456 /* Table3456 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3458 /* Table3458 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3460 /* Table3460 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3462 /* Table3462 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3464 /* Table3464 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1977 /* Table1977 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3224 /* Table3224 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1985 /* Table1985 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1987 /* Table1987 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1989 /* Table1989 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1991 /* Table1991 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3226 /* Table3226 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3228 /* Table3228 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3230 /* Table3230 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1999 /* Table1999 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3232 /* Table3232 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3234 /* Table3234 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3236 /* Table3236 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3238 /* Table3238 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2009 /* Table2009 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2011 /* Table2011 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2017 /* Table2017 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2019 /* Table2019 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2021 /* Table2021 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2023 /* Table2023 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2025 /* Table2025 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2027 /* Table2027 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2029 /* Table2029 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2031 /* Table2031 */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3466 /* Table3466 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2035 /* Table2035 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3240 /* Table3240 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2039 /* Table2039 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2055 /* Table2055 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2071 /* Table2071 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2087 /* Table2087 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2089 /* Table2089 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2091 /* Table2091 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3783 /* Table3783 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3785 /* Table3785 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3246 /* Table3246 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3248 /* Table3248 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3468 /* Table3468 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2100 /* Table2100 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2102 /* Table2102 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2103 /* Table2103 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2104 /* Table2104 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2105 /* Table2105 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2106 /* Table2106 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2107 /* Table2107 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2108 /* Table2108 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2111 /* Table2111 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2112 /* Table2112 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2113 /* Table2113 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2114 /* Table2114 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2115 /* Table2115 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2116 /* Table2116 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2117 /* Table2117 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2630 /* Table2630 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2631 /* Table2631 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3470 /* Table3470 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3472 /* Table3472 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3474 /* Table3474 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2632 /* Table2632 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2633 /* Table2633 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3476 /* Table3476 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3478 /* Table3478 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3480 /* Table3480 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3482 /* Table3482 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3554 /* Table3554 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3556 /* Table3556 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3558 /* Table3558 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3560 /* Table3560 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3562 /* Table3562 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3564 /* Table3564 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3566 /* Table3566 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3568 /* Table3568 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3570 /* Table3570 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3586 /* Table3586 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3588 /* Table3588 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3590 /* Table3590 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3592 /* Table3592 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3594 /* Table3594 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3596 /* Table3596 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3250 /* Table3250 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3598 /* Table3598 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2437 /* Table2437 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2439 /* Table2439 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2441 /* Table2441 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3600 /* Table3600 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3252 /* Table3252 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3254 /* Table3254 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2478 /* Table2478 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2480 /* Table2480 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2482 /* Table2482 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2484 /* Table2484 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2486 /* Table2486 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2488 /* Table2488 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2490 /* Table2490 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2492 /* Table2492 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3256 /* Table3256 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2512 /* Table2512 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2514 /* Table2514 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2516 /* Table2516 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3258 /* Table3258 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2518 /* Table2518 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2520 /* Table2520 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2522 /* Table2522 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2524 /* Table2524 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2526 /* Table2526 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2634 /* Table2634 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3340 /* Table3340 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3356 /* Table3356 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3428 /* Table3428 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3430 /* Table3430 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3432 /* Table3432 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1851 /* Table1851 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1852 /* Table1852 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2728 /* Table2728 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2730 /* Table2730 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2732 /* Table2732 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2734 /* Table2734 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2736 /* Table2736 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2738 /* Table2738 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2740 /* Table2740 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2742 /* Table2742 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2744 /* Table2744 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2760 /* Table2760 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2762 /* Table2762 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2764 /* Table2764 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2766 /* Table2766 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2768 /* Table2768 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2770 /* Table2770 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2772 /* Table2772 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2618 /* Table2618 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2620 /* Table2620 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2622 /* Table2622 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2624 /* Table2624 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2774 /* Table2774 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2776 /* Table2776 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2778 /* Table2778 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2780 /* Table2780 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2782 /* Table2782 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2784 /* Table2784 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2786 /* Table2786 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2788 /* Table2788 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1938 /* Table1938 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1939 /* Table1939 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1940 /* Table1940 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1941 /* Table1941 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1942 /* Table1942 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3433 /* Table3433 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1944 /* Table1944 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3434 /* Table3434 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3436 /* Table3436 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3438 /* Table3438 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3440 /* Table3440 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3442 /* Table3442 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3444 /* Table3444 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3446 /* Table3446 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3448 /* Table3448 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3450 /* Table3450 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3452 /* Table3452 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3454 /* Table3454 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3456 /* Table3456 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3458 /* Table3458 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3460 /* Table3460 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3462 /* Table3462 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3464 /* Table3464 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2822 /* Table2822 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2824 /* Table2824 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1981 /* Table1981 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1983 /* Table1983 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2826 /* Table2826 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2828 /* Table2828 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2830 /* Table2830 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2832 /* Table2832 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2834 /* Table2834 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2836 /* Table2836 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2838 /* Table2838 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2840 /* Table2840 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2842 /* Table2842 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2844 /* Table2844 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2846 /* Table2846 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2848 /* Table2848 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2850 /* Table2850 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2852 /* Table2852 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2854 /* Table2854 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2856 /* Table2856 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2858 /* Table2858 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2860 /* Table2860 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2862 /* Table2862 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2864 /* Table2864 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2866 /* Table2866 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2868 /* Table2868 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2870 /* Table2870 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2872 /* Table2872 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2874 /* Table2874 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2876 /* Table2876 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3965 /* Table3965 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2880 /* Table2880 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2882 /* Table2882 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2884 /* Table2884 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2900 /* Table2900 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2916 /* Table2916 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2932 /* Table2932 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2934 /* Table2934 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2936 /* Table2936 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2093 /* Table2093 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3617 /* Table3617 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3619 /* Table3619 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2942 /* Table2942 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2944 /* Table2944 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3967 /* Table3967 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2948 /* Table2948 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2950 /* Table2950 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2951 /* Table2951 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2952 /* Table2952 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2953 /* Table2953 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2954 /* Table2954 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2955 /* Table2955 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2956 /* Table2956 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2957 /* Table2957 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2958 /* Table2958 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2959 /* Table2959 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2960 /* Table2960 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2961 /* Table2961 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2962 /* Table2962 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2963 /* Table2963 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2964 /* Table2964 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2965 /* Table2965 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2118 /* Table2118 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2120 /* Table2120 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2122 /* Table2122 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2124 /* Table2124 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2126 /* Table2126 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2128 /* Table2128 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2130 /* Table2130 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2132 /* Table2132 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2134 /* Table2134 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2136 /* Table2136 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2138 /* Table2138 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2140 /* Table2140 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2142 /* Table2142 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2144 /* Table2144 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2146 /* Table2146 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2148 /* Table2148 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2966 /* Table2966 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2967 /* Table2967 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2152 /* Table2152 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3470 /* Table3470 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3472 /* Table3472 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3474 /* Table3474 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2159 /* Table2159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2231 /* Table2231 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2974 /* Table2974 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2975 /* Table2975 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2305 /* Table2305 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3476 /* Table3476 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3478 /* Table3478 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3480 /* Table3480 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 3621 /* Table3621 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3554 /* Table3554 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2386 /* Table2386 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3556 /* Table3556 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3558 /* Table3558 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3560 /* Table3560 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3562 /* Table3562 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3564 /* Table3564 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3566 /* Table3566 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3568 /* Table3568 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2402 /* Table2402 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3570 /* Table3570 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3586 /* Table3586 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3588 /* Table3588 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3590 /* Table3590 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3592 /* Table3592 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3594 /* Table3594 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2429 /* Table2429 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3596 /* Table3596 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3094 /* Table3094 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3598 /* Table3598 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3096 /* Table3096 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3098 /* Table3098 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3100 /* Table3100 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 3693 /* Table3693 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 3616 /* Table3616 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3118 /* Table3118 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3120 /* Table3120 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3122 /* Table3122 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3124 /* Table3124 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3126 /* Table3126 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3128 /* Table3128 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3130 /* Table3130 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3132 /* Table3132 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3134 /* Table3134 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3136 /* Table3136 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3138 /* Table3138 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3140 /* Table3140 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3142 /* Table3142 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3144 /* Table3144 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3146 /* Table3146 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3148 /* Table3148 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3150 /* Table3150 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3152 /* Table3152 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3154 /* Table3154 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3156 /* Table3156 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3158 /* Table3158 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3160 /* Table3160 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3162 /* Table3162 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3164 /* Table3164 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3166 /* Table3166 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3168 /* Table3168 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3170 /* Table3170 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3172 /* Table3172 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3174 /* Table3174 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3176 /* Table3176 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3178 /* Table3178 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3180 /* Table3180 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3182 /* Table3182 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3184 /* Table3184 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3186 /* Table3186 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3188 /* Table3188 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3190 /* Table3190 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3192 /* Table3192 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3709 /* Table3709 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3196 /* Table3196 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3198 /* Table3198 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3200 /* Table3200 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3202 /* Table3202 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3204 /* Table3204 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3206 /* Table3206 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3208 /* Table3208 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3969 /* Table3969 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3971 /* Table3971 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3973 /* Table3973 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3975 /* Table3975 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3977 /* Table3977 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3979 /* Table3979 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3981 /* Table3981 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3983 /* Table3983 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3985 /* Table3985 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3987 /* Table3987 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3989 /* Table3989 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3991 /* Table3991 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3993 /* Table3993 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3995 /* Table3995 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3997 /* Table3997 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3999 /* Table3999 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4001 /* Table4001 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4003 /* Table4003 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4005 /* Table4005 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4007 /* Table4007 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4009 /* Table4009 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4011 /* Table4011 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4013 /* Table4013 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4015 /* Table4015 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4017 /* Table4017 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4019 /* Table4019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4021 /* Table4021 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4023 /* Table4023 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4025 /* Table4025 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4027 /* Table4027 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 4029 /* Table4029 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4030 /* Table4030 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4032 /* Table4032 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4034 /* Table4034 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4036 /* Table4036 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4038 /* Table4038 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4040 /* Table4040 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4056 /* Table4056 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4058 /* Table4058 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4060 /* Table4060 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4062 /* Table4062 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4064 /* Table4064 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4066 /* Table4066 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4068 /* Table4068 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4070 /* Table4070 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4072 /* Table4072 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4074 /* Table4074 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4076 /* Table4076 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4078 /* Table4078 */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4080 /* Table4080 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4082 /* Table4082 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4084 /* Table4084 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4086 /* Table4086 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4088 /* Table4088 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4090 /* Table4090 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4092 /* Table4092 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4094 /* Table4094 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4096 /* Table4096 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4098 /* Table4098 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4100 /* Table4100 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4102 /* Table4102 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4104 /* Table4104 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4106 /* Table4106 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4108 /* Table4108 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4110 /* Table4110 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4112 /* Table4112 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4114 /* Table4114 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4116 /* Table4116 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4118 /* Table4118 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4120 /* Table4120 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4122 /* Table4122 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4124 /* Table4124 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4126 /* Table4126 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4128 /* Table4128 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4130 /* Table4130 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4132 /* Table4132 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4134 /* Table4134 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4136 /* Table4136 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4138 /* Table4138 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4140 /* Table4140 */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4142 /* Table4142 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4144 /* Table4144 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4146 /* Table4146 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4148 /* Table4148 */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4150 /* Table4150 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4152 /* Table4152 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4154 /* Table4154 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4156 /* Table4156 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4158 /* Table4158 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4160 /* Table4160 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4162 /* Table4162 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4164 /* Table4164 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4166 /* Table4166 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4168 /* Table4168 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4170 /* Table4170 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4172 /* Table4172 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4174 /* Table4174 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4176 /* Table4176 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4178 /* Table4178 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4180 /* Table4180 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4182 /* Table4182 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4184 /* Table4184 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4186 /* Table4186 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4188 /* Table4188 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4190 /* Table4190 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4192 /* Table4192 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4194 /* Table4194 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4196 /* Table4196 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4198 /* Table4198 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4200 /* Table4200 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4202 /* Table4202 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4204 /* Table4204 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4206 /* Table4206 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4208 /* Table4208 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4210 /* Table4210 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4212 /* Table4212 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4214 /* Table4214 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4216 /* Table4216 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4218 /* Table4218 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4220 /* Table4220 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4222 /* Table4222 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4224 /* Table4224 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4226 /* Table4226 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4228 /* Table4228 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4230 /* Table4230 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4232 /* Table4232 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4234 /* Table4234 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4236 /* Table4236 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4238 /* Table4238 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4240 /* Table4240 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4242 /* Table4242 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4244 /* Table4244 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4260 /* Table4260 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4276 /* Table4276 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4292 /* Table4292 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4294 /* Table4294 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4296 /* Table4296 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4298 /* Table4298 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4300 /* Table4300 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4302 /* Table4302 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4304 /* Table4304 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4306 /* Table4306 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4308 /* Table4308 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4310 /* Table4310 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4312 /* Table4312 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4314 /* Table4314 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4316 /* Table4316 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4318 /* Table4318 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4320 /* Table4320 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4322 /* Table4322 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4324 /* Table4324 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4326 /* Table4326 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4328 /* Table4328 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4330 /* Table4330 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4332 /* Table4332 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4334 /* Table4334 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4336 /* Table4336 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4338 /* Table4338 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4340 /* Table4340 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4342 /* Table4342 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4344 /* Table4344 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4346 /* Table4346 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4348 /* Table4348 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4350 /* Table4350 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4352 /* Table4352 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4354 /* Table4354 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4356 /* Table4356 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4358 /* Table4358 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4360 /* Table4360 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4362 /* Table4362 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4364 /* Table4364 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4366 /* Table4366 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4368 /* Table4368 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4370 /* Table4370 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4372 /* Table4372 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4374 /* Table4374 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4376 /* Table4376 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4378 /* Table4378 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4380 /* Table4380 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4382 /* Table4382 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4384 /* Table4384 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4386 /* Table4386 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4388 /* Table4388 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4390 /* Table4390 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4392 /* Table4392 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4394 /* Table4394 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4396 /* Table4396 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4398 /* Table4398 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4400 /* Table4400 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4402 /* Table4402 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4404 /* Table4404 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4406 /* Table4406 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4408 /* Table4408 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4410 /* Table4410 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4412 /* Table4412 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4414 /* Table4414 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3969 /* Table3969 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3971 /* Table3971 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3973 /* Table3973 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3975 /* Table3975 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3977 /* Table3977 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3979 /* Table3979 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3981 /* Table3981 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3983 /* Table3983 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3985 /* Table3985 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3987 /* Table3987 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3989 /* Table3989 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3991 /* Table3991 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3993 /* Table3993 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4416 /* Table4416 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3997 /* Table3997 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3999 /* Table3999 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4001 /* Table4001 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4003 /* Table4003 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4005 /* Table4005 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4007 /* Table4007 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4009 /* Table4009 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4011 /* Table4011 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4013 /* Table4013 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4015 /* Table4015 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4017 /* Table4017 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4019 /* Table4019 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4021 /* Table4021 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4023 /* Table4023 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4025 /* Table4025 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4027 /* Table4027 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 4029 /* Table4029 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4418 /* Table4418 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4420 /* Table4420 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4034 /* Table4034 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4036 /* Table4036 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4422 /* Table4422 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4040 /* Table4040 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4056 /* Table4056 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4058 /* Table4058 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4060 /* Table4060 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4062 /* Table4062 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4064 /* Table4064 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4066 /* Table4066 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4424 /* Table4424 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4426 /* Table4426 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4428 /* Table4428 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4074 /* Table4074 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4076 /* Table4076 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4078 /* Table4078 */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4080 /* Table4080 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4082 /* Table4082 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4084 /* Table4084 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4086 /* Table4086 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4088 /* Table4088 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4090 /* Table4090 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4092 /* Table4092 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4094 /* Table4094 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4096 /* Table4096 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4098 /* Table4098 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4100 /* Table4100 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4102 /* Table4102 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4104 /* Table4104 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4106 /* Table4106 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4108 /* Table4108 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4110 /* Table4110 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4112 /* Table4112 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4430 /* Table4430 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4432 /* Table4432 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4434 /* Table4434 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4120 /* Table4120 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4122 /* Table4122 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4124 /* Table4124 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4126 /* Table4126 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4128 /* Table4128 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4130 /* Table4130 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4132 /* Table4132 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4134 /* Table4134 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4136 /* Table4136 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4138 /* Table4138 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4140 /* Table4140 */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4436 /* Table4436 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4438 /* Table4438 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4146 /* Table4146 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4148 /* Table4148 */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4150 /* Table4150 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4152 /* Table4152 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4154 /* Table4154 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4156 /* Table4156 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4158 /* Table4158 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4160 /* Table4160 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4162 /* Table4162 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4164 /* Table4164 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4166 /* Table4166 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4168 /* Table4168 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4170 /* Table4170 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4172 /* Table4172 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4174 /* Table4174 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4176 /* Table4176 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4178 /* Table4178 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4440 /* Table4440 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4182 /* Table4182 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4184 /* Table4184 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4186 /* Table4186 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4188 /* Table4188 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4190 /* Table4190 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4192 /* Table4192 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4194 /* Table4194 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4196 /* Table4196 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4198 /* Table4198 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4200 /* Table4200 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4202 /* Table4202 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4204 /* Table4204 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4206 /* Table4206 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4208 /* Table4208 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4210 /* Table4210 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4212 /* Table4212 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4214 /* Table4214 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4216 /* Table4216 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4218 /* Table4218 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4220 /* Table4220 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4222 /* Table4222 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4224 /* Table4224 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4226 /* Table4226 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4228 /* Table4228 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4230 /* Table4230 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4232 /* Table4232 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4234 /* Table4234 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4236 /* Table4236 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4442 /* Table4442 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4240 /* Table4240 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4242 /* Table4242 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4244 /* Table4244 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4260 /* Table4260 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4276 /* Table4276 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4292 /* Table4292 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4294 /* Table4294 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4296 /* Table4296 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4298 /* Table4298 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4300 /* Table4300 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4444 /* Table4444 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4304 /* Table4304 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4446 /* Table4446 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4448 /* Table4448 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4310 /* Table4310 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4312 /* Table4312 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4450 /* Table4450 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4316 /* Table4316 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4318 /* Table4318 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4320 /* Table4320 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4322 /* Table4322 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4324 /* Table4324 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4326 /* Table4326 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4328 /* Table4328 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4330 /* Table4330 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4332 /* Table4332 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4334 /* Table4334 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4336 /* Table4336 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4338 /* Table4338 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4340 /* Table4340 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4342 /* Table4342 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4344 /* Table4344 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4346 /* Table4346 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4348 /* Table4348 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4350 /* Table4350 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4352 /* Table4352 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4354 /* Table4354 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4356 /* Table4356 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4358 /* Table4358 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4360 /* Table4360 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4362 /* Table4362 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4364 /* Table4364 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4366 /* Table4366 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4368 /* Table4368 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4370 /* Table4370 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4372 /* Table4372 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4374 /* Table4374 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4376 /* Table4376 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4378 /* Table4378 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4380 /* Table4380 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4382 /* Table4382 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4384 /* Table4384 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4386 /* Table4386 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4388 /* Table4388 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4390 /* Table4390 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4392 /* Table4392 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4394 /* Table4394 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4396 /* Table4396 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4398 /* Table4398 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4400 /* Table4400 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4402 /* Table4402 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4404 /* Table4404 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4406 /* Table4406 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4408 /* Table4408 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4410 /* Table4410 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4412 /* Table4412 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4414 /* Table4414 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4452 /* Table4452 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4454 /* Table4454 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4456 /* Table4456 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4458 /* Table4458 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4460 /* Table4460 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4462 /* Table4462 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4464 /* Table4464 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3991 /* Table3991 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3993 /* Table3993 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4466 /* Table4466 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4468 /* Table4468 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4470 /* Table4470 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4472 /* Table4472 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4474 /* Table4474 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4476 /* Table4476 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4478 /* Table4478 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4480 /* Table4480 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4482 /* Table4482 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4484 /* Table4484 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4486 /* Table4486 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4488 /* Table4488 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4490 /* Table4490 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4492 /* Table4492 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4494 /* Table4494 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4496 /* Table4496 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4498 /* Table4498 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4500 /* Table4500 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4502 /* Table4502 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4504 /* Table4504 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4506 /* Table4506 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 4508 /* Table4508 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4509 /* Table4509 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4511 /* Table4511 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4060 /* Table4060 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4062 /* Table4062 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4513 /* Table4513 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4515 /* Table4515 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4068 /* Table4068 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4070 /* Table4070 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4072 /* Table4072 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4074 /* Table4074 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4076 /* Table4076 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4078 /* Table4078 */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4080 /* Table4080 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4082 /* Table4082 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4084 /* Table4084 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4517 /* Table4517 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4088 /* Table4088 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4090 /* Table4090 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4092 /* Table4092 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4094 /* Table4094 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4519 /* Table4519 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4521 /* Table4521 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4523 /* Table4523 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4104 /* Table4104 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4525 /* Table4525 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4108 /* Table4108 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4110 /* Table4110 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4527 /* Table4527 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4114 /* Table4114 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4116 /* Table4116 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4118 /* Table4118 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4120 /* Table4120 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4122 /* Table4122 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4124 /* Table4124 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4126 /* Table4126 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4128 /* Table4128 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4130 /* Table4130 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4132 /* Table4132 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4134 /* Table4134 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4529 /* Table4529 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4531 /* Table4531 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4533 /* Table4533 */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4146 /* Table4146 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4535 /* Table4535 */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4537 /* Table4537 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4539 /* Table4539 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4541 /* Table4541 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4543 /* Table4543 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4545 /* Table4545 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4547 /* Table4547 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4549 /* Table4549 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4551 /* Table4551 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4553 /* Table4553 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4176 /* Table4176 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4178 /* Table4178 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4555 /* Table4555 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4557 /* Table4557 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4559 /* Table4559 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4561 /* Table4561 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4563 /* Table4563 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4565 /* Table4565 */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4567 /* Table4567 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4569 /* Table4569 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4571 /* Table4571 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4573 /* Table4573 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4575 /* Table4575 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4577 /* Table4577 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4579 /* Table4579 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4581 /* Table4581 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4583 /* Table4583 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4585 /* Table4585 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4587 /* Table4587 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4589 /* Table4589 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4591 /* Table4591 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4593 /* Table4593 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4595 /* Table4595 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4597 /* Table4597 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4599 /* Table4599 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4601 /* Table4601 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4603 /* Table4603 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4605 /* Table4605 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4607 /* Table4607 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4609 /* Table4609 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4611 /* Table4611 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4613 /* Table4613 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4615 /* Table4615 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4617 /* Table4617 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4619 /* Table4619 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4621 /* Table4621 */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4623 /* Table4623 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4625 /* Table4625 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4627 /* Table4627 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4643 /* Table4643 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4659 /* Table4659 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4675 /* Table4675 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4677 /* Table4677 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4679 /* Table4679 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4681 /* Table4681 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4683 /* Table4683 */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4685 /* Table4685 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4687 /* Table4687 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4689 /* Table4689 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4691 /* Table4691 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4693 /* Table4693 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4695 /* Table4695 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4697 /* Table4697 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4699 /* Table4699 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4701 /* Table4701 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4703 /* Table4703 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4705 /* Table4705 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4707 /* Table4707 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4709 /* Table4709 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4711 /* Table4711 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4713 /* Table4713 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4715 /* Table4715 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4717 /* Table4717 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4719 /* Table4719 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4721 /* Table4721 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4723 /* Table4723 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4725 /* Table4725 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4727 /* Table4727 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4729 /* Table4729 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4731 /* Table4731 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4733 /* Table4733 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4735 /* Table4735 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4737 /* Table4737 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4739 /* Table4739 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4741 /* Table4741 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4743 /* Table4743 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4745 /* Table4745 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4747 /* Table4747 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4749 /* Table4749 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4751 /* Table4751 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4753 /* Table4753 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4755 /* Table4755 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4757 /* Table4757 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4759 /* Table4759 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4761 /* Table4761 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4763 /* Table4763 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4765 /* Table4765 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4767 /* Table4767 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4769 /* Table4769 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4771 /* Table4771 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4773 /* Table4773 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4775 /* Table4775 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4777 /* Table4777 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4452 /* Table4452 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4454 /* Table4454 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4456 /* Table4456 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4458 /* Table4458 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4460 /* Table4460 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4462 /* Table4462 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4464 /* Table4464 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3991 /* Table3991 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3993 /* Table3993 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4779 /* Table4779 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4781 /* Table4781 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4783 /* Table4783 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4785 /* Table4785 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4787 /* Table4787 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4476 /* Table4476 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4478 /* Table4478 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4480 /* Table4480 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4482 /* Table4482 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4484 /* Table4484 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4486 /* Table4486 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4488 /* Table4488 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4490 /* Table4490 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4492 /* Table4492 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4494 /* Table4494 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4496 /* Table4496 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4498 /* Table4498 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4500 /* Table4500 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4502 /* Table4502 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4504 /* Table4504 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4506 /* Table4506 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 4508 /* Table4508 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4509 /* Table4509 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4511 /* Table4511 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4060 /* Table4060 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4062 /* Table4062 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4513 /* Table4513 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4515 /* Table4515 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4424 /* Table4424 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4426 /* Table4426 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4428 /* Table4428 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4074 /* Table4074 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4076 /* Table4076 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4078 /* Table4078 */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4080 /* Table4080 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4082 /* Table4082 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4084 /* Table4084 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4517 /* Table4517 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4088 /* Table4088 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4090 /* Table4090 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4092 /* Table4092 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4094 /* Table4094 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4519 /* Table4519 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4521 /* Table4521 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4523 /* Table4523 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4104 /* Table4104 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4525 /* Table4525 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4108 /* Table4108 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4110 /* Table4110 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4527 /* Table4527 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4430 /* Table4430 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4432 /* Table4432 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4434 /* Table4434 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4120 /* Table4120 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4122 /* Table4122 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4124 /* Table4124 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4126 /* Table4126 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4128 /* Table4128 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4130 /* Table4130 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4132 /* Table4132 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4134 /* Table4134 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4529 /* Table4529 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4531 /* Table4531 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4533 /* Table4533 */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4146 /* Table4146 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4535 /* Table4535 */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4537 /* Table4537 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4539 /* Table4539 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4541 /* Table4541 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4543 /* Table4543 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4545 /* Table4545 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4547 /* Table4547 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4549 /* Table4549 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4551 /* Table4551 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4553 /* Table4553 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4176 /* Table4176 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4178 /* Table4178 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4789 /* Table4789 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4791 /* Table4791 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4793 /* Table4793 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4795 /* Table4795 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4797 /* Table4797 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4565 /* Table4565 */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4567 /* Table4567 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4569 /* Table4569 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4571 /* Table4571 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4573 /* Table4573 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4575 /* Table4575 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4577 /* Table4577 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4579 /* Table4579 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4581 /* Table4581 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4583 /* Table4583 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4585 /* Table4585 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4587 /* Table4587 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4589 /* Table4589 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4591 /* Table4591 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4593 /* Table4593 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4595 /* Table4595 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4597 /* Table4597 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4599 /* Table4599 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4601 /* Table4601 */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4603 /* Table4603 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4605 /* Table4605 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4607 /* Table4607 */ }, /* 0x67 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4609 /* Table4609 */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4611 /* Table4611 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4613 /* Table4613 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4615 /* Table4615 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4617 /* Table4617 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4619 /* Table4619 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4621 /* Table4621 */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4623 /* Table4623 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4625 /* Table4625 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4627 /* Table4627 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4643 /* Table4643 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 4659 /* Table4659 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4675 /* Table4675 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4677 /* Table4677 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4679 /* Table4679 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4681 /* Table4681 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4683 /* Table4683 */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4685 /* Table4685 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4687 /* Table4687 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4689 /* Table4689 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4691 /* Table4691 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4693 /* Table4693 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4695 /* Table4695 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4697 /* Table4697 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4699 /* Table4699 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4701 /* Table4701 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4703 /* Table4703 */ }, /* 0xd8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4705 /* Table4705 */ }, /* 0xd9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4707 /* Table4707 */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4709 /* Table4709 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4711 /* Table4711 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4713 /* Table4713 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4715 /* Table4715 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4717 /* Table4717 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4719 /* Table4719 */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4721 /* Table4721 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4723 /* Table4723 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4725 /* Table4725 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4727 /* Table4727 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4729 /* Table4729 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4731 /* Table4731 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4733 /* Table4733 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4735 /* Table4735 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4737 /* Table4737 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4739 /* Table4739 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4741 /* Table4741 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4743 /* Table4743 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4745 /* Table4745 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4747 /* Table4747 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4749 /* Table4749 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4751 /* Table4751 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4753 /* Table4753 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4755 /* Table4755 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4757 /* Table4757 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4759 /* Table4759 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4761 /* Table4761 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4763 /* Table4763 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4765 /* Table4765 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4767 /* Table4767 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4769 /* Table4769 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4771 /* Table4771 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4773 /* Table4773 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4775 /* Table4775 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4777 /* Table4777 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4799 /* Table4799 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4801 /* Table4801 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4803 /* Table4803 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4805 /* Table4805 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4807 /* Table4807 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4809 /* Table4809 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4811 /* Table4811 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4813 /* Table4813 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4815 /* Table4815 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4817 /* Table4817 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4819 /* Table4819 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4821 /* Table4821 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4823 /* Table4823 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4825 /* Table4825 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4827 /* Table4827 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4829 /* Table4829 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4831 /* Table4831 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4833 /* Table4833 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4835 /* Table4835 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4837 /* Table4837 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4839 /* Table4839 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4841 /* Table4841 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4843 /* Table4843 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4845 /* Table4845 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4847 /* Table4847 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4849 /* Table4849 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4851 /* Table4851 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4853 /* Table4853 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4855 /* Table4855 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4857 /* Table4857 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4859 /* Table4859 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4861 /* Table4861 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4863 /* Table4863 */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4865 /* Table4865 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4867 /* Table4867 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4869 /* Table4869 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4871 /* Table4871 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4873 /* Table4873 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4875 /* Table4875 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4877 /* Table4877 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4879 /* Table4879 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4881 /* Table4881 */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4883 /* Table4883 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4885 /* Table4885 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4887 /* Table4887 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4889 /* Table4889 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4891 /* Table4891 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4893 /* Table4893 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4895 /* Table4895 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4897 /* Table4897 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4899 /* Table4899 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4901 /* Table4901 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4903 /* Table4903 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4905 /* Table4905 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4907 /* Table4907 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4909 /* Table4909 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4911 /* Table4911 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4913 /* Table4913 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4915 /* Table4915 */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4917 /* Table4917 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4919 /* Table4919 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4921 /* Table4921 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4923 /* Table4923 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4925 /* Table4925 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4927 /* Table4927 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4929 /* Table4929 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4931 /* Table4931 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4933 /* Table4933 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4935 /* Table4935 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4799 /* Table4799 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4801 /* Table4801 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4803 /* Table4803 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4805 /* Table4805 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4807 /* Table4807 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4809 /* Table4809 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4811 /* Table4811 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4813 /* Table4813 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4815 /* Table4815 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4817 /* Table4817 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4819 /* Table4819 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4821 /* Table4821 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4823 /* Table4823 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4825 /* Table4825 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4827 /* Table4827 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4829 /* Table4829 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4831 /* Table4831 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4833 /* Table4833 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4937 /* Table4937 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4939 /* Table4939 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4941 /* Table4941 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4841 /* Table4841 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4843 /* Table4843 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4845 /* Table4845 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4847 /* Table4847 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4849 /* Table4849 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4851 /* Table4851 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4853 /* Table4853 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4855 /* Table4855 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4943 /* Table4943 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4945 /* Table4945 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4947 /* Table4947 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4949 /* Table4949 */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4951 /* Table4951 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4953 /* Table4953 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4867 /* Table4867 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4955 /* Table4955 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4957 /* Table4957 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4959 /* Table4959 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4961 /* Table4961 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4963 /* Table4963 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4965 /* Table4965 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4967 /* Table4967 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4969 /* Table4969 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4971 /* Table4971 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4973 /* Table4973 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4975 /* Table4975 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4977 /* Table4977 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4979 /* Table4979 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4981 /* Table4981 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4983 /* Table4983 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4985 /* Table4985 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4987 /* Table4987 */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4989 /* Table4989 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4991 /* Table4991 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4993 /* Table4993 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4995 /* Table4995 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4997 /* Table4997 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4999 /* Table4999 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5001 /* Table5001 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5003 /* Table5003 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5005 /* Table5005 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5007 /* Table5007 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5009 /* Table5009 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5011 /* Table5011 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5013 /* Table5013 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5015 /* Table5015 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5017 /* Table5017 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5019 /* Table5019 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4885 /* Table4885 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4887 /* Table4887 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4889 /* Table4889 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5021 /* Table5021 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5023 /* Table5023 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4895 /* Table4895 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4897 /* Table4897 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4899 /* Table4899 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5025 /* Table5025 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5027 /* Table5027 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5029 /* Table5029 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4905 /* Table4905 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5031 /* Table5031 */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4907 /* Table4907 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5033 /* Table5033 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4911 /* Table4911 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5035 /* Table5035 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4915 /* Table4915 */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4917 /* Table4917 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5037 /* Table5037 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4921 /* Table4921 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5039 /* Table5039 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4925 /* Table4925 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4927 /* Table4927 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4929 /* Table4929 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5041 /* Table5041 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4931 /* Table4931 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4933 /* Table4933 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4935 /* Table4935 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5043 /* Table5043 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5045 /* Table5045 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5047 /* Table5047 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5049 /* Table5049 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5051 /* Table5051 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5053 /* Table5053 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5055 /* Table5055 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5057 /* Table5057 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5059 /* Table5059 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5061 /* Table5061 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5063 /* Table5063 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5065 /* Table5065 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5067 /* Table5067 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5069 /* Table5069 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5071 /* Table5071 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5073 /* Table5073 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5075 /* Table5075 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5077 /* Table5077 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5079 /* Table5079 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5081 /* Table5081 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5083 /* Table5083 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5085 /* Table5085 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5087 /* Table5087 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5089 /* Table5089 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5091 /* Table5091 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5093 /* Table5093 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5095 /* Table5095 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5097 /* Table5097 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5099 /* Table5099 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5101 /* Table5101 */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5103 /* Table5103 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5105 /* Table5105 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5107 /* Table5107 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5109 /* Table5109 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5111 /* Table5111 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5113 /* Table5113 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5115 /* Table5115 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5117 /* Table5117 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5119 /* Table5119 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5121 /* Table5121 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4799 /* Table4799 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4801 /* Table4801 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4803 /* Table4803 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4805 /* Table4805 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4807 /* Table4807 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4809 /* Table4809 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4811 /* Table4811 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4813 /* Table4813 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4815 /* Table4815 */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4817 /* Table4817 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4819 /* Table4819 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4821 /* Table4821 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4823 /* Table4823 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4825 /* Table4825 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4827 /* Table4827 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4829 /* Table4829 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4831 /* Table4831 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4833 /* Table4833 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4835 /* Table4835 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4837 /* Table4837 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4839 /* Table4839 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4841 /* Table4841 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4843 /* Table4843 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4845 /* Table4845 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4847 /* Table4847 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4849 /* Table4849 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4851 /* Table4851 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4853 /* Table4853 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4855 /* Table4855 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5123 /* Table5123 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4859 /* Table4859 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4861 /* Table4861 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4863 /* Table4863 */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5125 /* Table5125 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4867 /* Table4867 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4869 /* Table4869 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4871 /* Table4871 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4873 /* Table4873 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5127 /* Table5127 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4877 /* Table4877 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4879 /* Table4879 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4881 /* Table4881 */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5129 /* Table5129 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5131 /* Table5131 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5133 /* Table5133 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5135 /* Table5135 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5137 /* Table5137 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5139 /* Table5139 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5141 /* Table5141 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5143 /* Table5143 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5145 /* Table5145 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5147 /* Table5147 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5149 /* Table5149 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5151 /* Table5151 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5153 /* Table5153 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4885 /* Table4885 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4887 /* Table4887 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4889 /* Table4889 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4891 /* Table4891 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5155 /* Table5155 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4895 /* Table4895 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4897 /* Table4897 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4899 /* Table4899 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4901 /* Table4901 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5157 /* Table5157 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5159 /* Table5159 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4905 /* Table4905 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4907 /* Table4907 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5161 /* Table5161 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4911 /* Table4911 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5163 /* Table5163 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4915 /* Table4915 */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4917 /* Table4917 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5165 /* Table5165 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4921 /* Table4921 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5167 /* Table5167 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4925 /* Table4925 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4927 /* Table4927 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4929 /* Table4929 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5169 /* Table5169 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4931 /* Table4931 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4933 /* Table4933 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 4935 /* Table4935 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2 */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5171 /* Table5171 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5173 /* Table5173 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5175 /* Table5175 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5177 /* Table5177 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5179 /* Table5179 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5181 /* Table5181 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5183 /* Table5183 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5185 /* Table5185 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5187 /* Table5187 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5189 /* Table5189 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5191 /* Table5191 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5193 /* Table5193 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5195 /* Table5195 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5197 /* Table5197 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5199 /* Table5199 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5201 /* Table5201 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5203 /* Table5203 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5205 /* Table5205 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5207 /* Table5207 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5209 /* Table5209 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5211 /* Table5211 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5213 /* Table5213 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5215 /* Table5215 */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5217 /* Table5217 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5219 /* Table5219 */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5221 /* Table5221 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5223 /* Table5223 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5225 /* Table5225 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5227 /* Table5227 */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5229 /* Table5229 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5231 /* Table5231 */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5233 /* Table5233 */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5235 /* Table5235 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5237 /* Table5237 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5239 /* Table5239 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5241 /* Table5241 */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5243 /* Table5243 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5245 /* Table5245 */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 5247 /* Table5247 */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5263 /* Table5263 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5265 /* Table5265 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5267 /* Table5267 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5269 /* Table5269 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5271 /* Table5271 */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5273 /* Table5273 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5275 /* Table5275 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5277 /* Table5277 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5279 /* Table5279 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5281 /* Table5281 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5283 /* Table5283 */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5285 /* Table5285 */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5287 /* Table5287 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5289 /* Table5289 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5291 /* Table5291 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5293 /* Table5293 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5295 /* Table5295 */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5297 /* Table5297 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5299 /* Table5299 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5301 /* Table5301 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5303 /* Table5303 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5305 /* Table5305 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5307 /* Table5307 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5309 /* Table5309 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5311 /* Table5311 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5313 /* Table5313 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5315 /* Table5315 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5317 /* Table5317 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5319 /* Table5319 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5321 /* Table5321 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5323 /* Table5323 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5325 /* Table5325 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5327 /* Table5327 */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5329 /* Table5329 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5331 /* Table5331 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5333 /* Table5333 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5335 /* Table5335 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5337 /* Table5337 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5339 /* Table5339 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5341 /* Table5341 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5343 /* Table5343 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5345 /* Table5345 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5347 /* Table5347 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5349 /* Table5349 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5351 /* Table5351 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5353 /* Table5353 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5355 /* Table5355 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5357 /* Table5357 */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5359 /* Table5359 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 5361 /* Table5361 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 5377 /* Table5377 */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5393 /* Table5393 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5395 /* Table5395 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5397 /* Table5397 */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5399 /* Table5399 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5401 /* Table5401 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5403 /* Table5403 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5405 /* Table5405 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5407 /* Table5407 */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5409 /* Table5409 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5411 /* Table5411 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5413 /* Table5413 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5415 /* Table5415 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5417 /* Table5417 */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5419 /* Table5419 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5421 /* Table5421 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5423 /* Table5423 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5425 /* Table5425 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5427 /* Table5427 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5429 /* Table5429 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5431 /* Table5431 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5433 /* Table5433 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5435 /* Table5435 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5437 /* Table5437 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5439 /* Table5439 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5441 /* Table5441 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5443 /* Table5443 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5445 /* Table5445 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5447 /* Table5447 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5449 /* Table5449 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5451 /* Table5451 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5453 /* Table5453 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5455 /* Table5455 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5457 /* Table5457 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5459 /* Table5459 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5461 /* Table5461 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XD_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5463 /* Table5463 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5465 /* Table5465 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5467 /* Table5467 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5469 /* Table5469 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5471 /* Table5471 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5473 /* Table5473 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5475 /* Table5475 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5477 /* Table5477 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5479 /* Table5479 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5481 /* Table5481 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5483 /* Table5483 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5485 /* Table5485 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5487 /* Table5487 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5489 /* Table5489 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5491 /* Table5491 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5493 /* Table5493 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5495 /* Table5495 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5497 /* Table5497 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5499 /* Table5499 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5501 /* Table5501 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5503 /* Table5503 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5505 /* Table5505 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5507 /* Table5507 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5509 /* Table5509 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5511 /* Table5511 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5421 /* Table5421 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5423 /* Table5423 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5425 /* Table5425 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5427 /* Table5427 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5429 /* Table5429 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5431 /* Table5431 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5433 /* Table5433 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5435 /* Table5435 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5437 /* Table5437 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5439 /* Table5439 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5441 /* Table5441 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5443 /* Table5443 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5445 /* Table5445 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5513 /* Table5513 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5515 /* Table5515 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5517 /* Table5517 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5519 /* Table5519 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5521 /* Table5521 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5523 /* Table5523 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5525 /* Table5525 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5527 /* Table5527 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XD_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5529 /* Table5529 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5531 /* Table5531 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5533 /* Table5533 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5535 /* Table5535 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5537 /* Table5537 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5539 /* Table5539 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5541 /* Table5541 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5543 /* Table5543 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5545 /* Table5545 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5547 /* Table5547 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5549 /* Table5549 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5551 /* Table5551 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5553 /* Table5553 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5555 /* Table5555 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5557 /* Table5557 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5559 /* Table5559 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5561 /* Table5561 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5563 /* Table5563 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5565 /* Table5565 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5567 /* Table5567 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5569 /* Table5569 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5571 /* Table5571 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5573 /* Table5573 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5575 /* Table5575 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5577 /* Table5577 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5579 /* Table5579 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5581 /* Table5581 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5583 /* Table5583 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5585 /* Table5585 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5587 /* Table5587 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5589 /* Table5589 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5591 /* Table5591 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5593 /* Table5593 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5595 /* Table5595 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5597 /* Table5597 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5599 /* Table5599 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5601 /* Table5601 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5603 /* Table5603 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5605 /* Table5605 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5607 /* Table5607 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5609 /* Table5609 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5611 /* Table5611 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XD_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5613 /* Table5613 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5615 /* Table5615 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5617 /* Table5617 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5619 /* Table5619 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5621 /* Table5621 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5623 /* Table5623 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5625 /* Table5625 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5627 /* Table5627 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5629 /* Table5629 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5631 /* Table5631 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5633 /* Table5633 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5635 /* Table5635 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5637 /* Table5637 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5639 /* Table5639 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5641 /* Table5641 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5643 /* Table5643 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5645 /* Table5645 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5647 /* Table5647 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5649 /* Table5649 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5651 /* Table5651 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5653 /* Table5653 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5655 /* Table5655 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5657 /* Table5657 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5659 /* Table5659 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5661 /* Table5661 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5421 /* Table5421 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5423 /* Table5423 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5425 /* Table5425 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5427 /* Table5427 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5429 /* Table5429 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5431 /* Table5431 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5433 /* Table5433 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5435 /* Table5435 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5437 /* Table5437 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5439 /* Table5439 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5441 /* Table5441 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5443 /* Table5443 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5445 /* Table5445 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5513 /* Table5513 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5515 /* Table5515 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5517 /* Table5517 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5519 /* Table5519 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5521 /* Table5521 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5523 /* Table5523 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5663 /* Table5663 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5665 /* Table5665 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XD_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5667 /* Table5667 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5669 /* Table5669 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5671 /* Table5671 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5673 /* Table5673 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5675 /* Table5675 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5677 /* Table5677 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5679 /* Table5679 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5681 /* Table5681 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5683 /* Table5683 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5685 /* Table5685 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5687 /* Table5687 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5689 /* Table5689 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5691 /* Table5691 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5693 /* Table5693 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5695 /* Table5695 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5697 /* Table5697 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5699 /* Table5699 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5701 /* Table5701 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5703 /* Table5703 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5705 /* Table5705 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5707 /* Table5707 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5709 /* Table5709 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5711 /* Table5711 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5713 /* Table5713 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5715 /* Table5715 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5717 /* Table5717 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5719 /* Table5719 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5721 /* Table5721 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5723 /* Table5723 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5725 /* Table5725 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5727 /* Table5727 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5729 /* Table5729 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5731 /* Table5731 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5733 /* Table5733 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XD_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5735 /* Table5735 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5737 /* Table5737 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5739 /* Table5739 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5741 /* Table5741 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5743 /* Table5743 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5745 /* Table5745 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 5747 /* Table5747 */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5763 /* Table5763 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5765 /* Table5765 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5767 /* Table5767 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5769 /* Table5769 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5771 /* Table5771 */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5773 /* Table5773 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5775 /* Table5775 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5777 /* Table5777 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5779 /* Table5779 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5781 /* Table5781 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5783 /* Table5783 */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5785 /* Table5785 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5787 /* Table5787 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5789 /* Table5789 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5791 /* Table5791 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5793 /* Table5793 */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5795 /* Table5795 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5797 /* Table5797 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5799 /* Table5799 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5801 /* Table5801 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5803 /* Table5803 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5805 /* Table5805 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5807 /* Table5807 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5809 /* Table5809 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XD_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5811 /* Table5811 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5813 /* Table5813 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5815 /* Table5815 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5817 /* Table5817 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5819 /* Table5819 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5821 /* Table5821 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5823 /* Table5823 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5825 /* Table5825 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5827 /* Table5827 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5829 /* Table5829 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5831 /* Table5831 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5833 /* Table5833 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5835 /* Table5835 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5837 /* Table5837 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 5839 /* Table5839 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 5855 /* Table5855 */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5871 /* Table5871 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5873 /* Table5873 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5875 /* Table5875 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5877 /* Table5877 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5879 /* Table5879 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5881 /* Table5881 */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5883 /* Table5883 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5885 /* Table5885 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5887 /* Table5887 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5889 /* Table5889 */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5891 /* Table5891 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5893 /* Table5893 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5895 /* Table5895 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5897 /* Table5897 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5899 /* Table5899 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5901 /* Table5901 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5903 /* Table5903 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5905 /* Table5905 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5907 /* Table5907 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5909 /* Table5909 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5911 /* Table5911 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5913 /* Table5913 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5915 /* Table5915 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5917 /* Table5917 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5919 /* Table5919 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5921 /* Table5921 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5923 /* Table5923 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5925 /* Table5925 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5927 /* Table5927 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5929 /* Table5929 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5931 /* Table5931 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5933 /* Table5933 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XD_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5935 /* Table5935 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5937 /* Table5937 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5939 /* Table5939 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5941 /* Table5941 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5943 /* Table5943 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5945 /* Table5945 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5947 /* Table5947 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5949 /* Table5949 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5951 /* Table5951 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5953 /* Table5953 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5955 /* Table5955 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5957 /* Table5957 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5959 /* Table5959 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5961 /* Table5961 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5963 /* Table5963 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5965 /* Table5965 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5967 /* Table5967 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5969 /* Table5969 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5971 /* Table5971 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5973 /* Table5973 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5975 /* Table5975 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5977 /* Table5977 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5979 /* Table5979 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5981 /* Table5981 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5983 /* Table5983 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5985 /* Table5985 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5987 /* Table5987 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5989 /* Table5989 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5991 /* Table5991 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5993 /* Table5993 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5995 /* Table5995 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5997 /* Table5997 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5999 /* Table5999 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6001 /* Table6001 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6003 /* Table6003 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6005 /* Table6005 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6007 /* Table6007 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6009 /* Table6009 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6011 /* Table6011 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6013 /* Table6013 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6015 /* Table6015 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6017 /* Table6017 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6019 /* Table6019 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6021 /* Table6021 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6023 /* Table6023 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6025 /* Table6025 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6027 /* Table6027 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6029 /* Table6029 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6031 /* Table6031 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6033 /* Table6033 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6035 /* Table6035 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6037 /* Table6037 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6039 /* Table6039 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6041 /* Table6041 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6043 /* Table6043 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6045 /* Table6045 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6047 /* Table6047 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XD_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6049 /* Table6049 */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6051 /* Table6051 */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6053 /* Table6053 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6055 /* Table6055 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6057 /* Table6057 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6059 /* Table6059 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6061 /* Table6061 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6063 /* Table6063 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6065 /* Table6065 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6067 /* Table6067 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6069 /* Table6069 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XD_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6071 /* Table6071 */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6073 /* Table6073 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6075 /* Table6075 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6077 /* Table6077 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6079 /* Table6079 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6081 /* Table6081 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6083 /* Table6083 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6085 /* Table6085 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6087 /* Table6087 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6089 /* Table6089 */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6091 /* Table6091 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6093 /* Table6093 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6095 /* Table6095 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6097 /* Table6097 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6099 /* Table6099 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6101 /* Table6101 */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6103 /* Table6103 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6105 /* Table6105 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6107 /* Table6107 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6109 /* Table6109 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6111 /* Table6111 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6113 /* Table6113 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6115 /* Table6115 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6117 /* Table6117 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6119 /* Table6119 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6121 /* Table6121 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6123 /* Table6123 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6125 /* Table6125 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6127 /* Table6127 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6129 /* Table6129 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6131 /* Table6131 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6133 /* Table6133 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6135 /* Table6135 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6137 /* Table6137 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6139 /* Table6139 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6141 /* Table6141 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6143 /* Table6143 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6145 /* Table6145 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XD_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6147 /* Table6147 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6149 /* Table6149 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6151 /* Table6151 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6153 /* Table6153 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6155 /* Table6155 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6157 /* Table6157 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6159 /* Table6159 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6161 /* Table6161 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6163 /* Table6163 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6165 /* Table6165 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6167 /* Table6167 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6169 /* Table6169 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6171 /* Table6171 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6173 /* Table6173 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6175 /* Table6175 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6177 /* Table6177 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6179 /* Table6179 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6181 /* Table6181 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6183 /* Table6183 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6185 /* Table6185 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6187 /* Table6187 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6189 /* Table6189 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6191 /* Table6191 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6193 /* Table6193 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6195 /* Table6195 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6197 /* Table6197 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6199 /* Table6199 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6201 /* Table6201 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6203 /* Table6203 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6205 /* Table6205 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6207 /* Table6207 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6209 /* Table6209 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6211 /* Table6211 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6213 /* Table6213 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6215 /* Table6215 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6217 /* Table6217 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6219 /* Table6219 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6221 /* Table6221 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6223 /* Table6223 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6225 /* Table6225 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6227 /* Table6227 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6229 /* Table6229 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6231 /* Table6231 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6233 /* Table6233 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6235 /* Table6235 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6237 /* Table6237 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6239 /* Table6239 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6241 /* Table6241 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6243 /* Table6243 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6245 /* Table6245 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6247 /* Table6247 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6249 /* Table6249 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6251 /* Table6251 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6253 /* Table6253 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6255 /* Table6255 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6257 /* Table6257 */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6259 /* Table6259 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6261 /* Table6261 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6263 /* Table6263 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6265 /* Table6265 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6267 /* Table6267 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6269 /* Table6269 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6271 /* Table6271 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6273 /* Table6273 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6275 /* Table6275 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6277 /* Table6277 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6279 /* Table6279 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6281 /* Table6281 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6283 /* Table6283 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6285 /* Table6285 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6287 /* Table6287 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6289 /* Table6289 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6291 /* Table6291 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6293 /* Table6293 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6295 /* Table6295 */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6297 /* Table6297 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6299 /* Table6299 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6301 /* Table6301 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6303 /* Table6303 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6305 /* Table6305 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6307 /* Table6307 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6309 /* Table6309 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6311 /* Table6311 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6313 /* Table6313 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6315 /* Table6315 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6317 /* Table6317 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6319 /* Table6319 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6321 /* Table6321 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6323 /* Table6323 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6325 /* Table6325 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6327 /* Table6327 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6329 /* Table6329 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6331 /* Table6331 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6333 /* Table6333 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6335 /* Table6335 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XD_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6337 /* Table6337 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6339 /* Table6339 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6341 /* Table6341 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6343 /* Table6343 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6345 /* Table6345 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6347 /* Table6347 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6349 /* Table6349 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6351 /* Table6351 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6353 /* Table6353 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6355 /* Table6355 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6357 /* Table6357 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6359 /* Table6359 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6361 /* Table6361 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6363 /* Table6363 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6365 /* Table6365 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6367 /* Table6367 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6369 /* Table6369 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6371 /* Table6371 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6373 /* Table6373 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6375 /* Table6375 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6377 /* Table6377 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6379 /* Table6379 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6381 /* Table6381 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6383 /* Table6383 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6385 /* Table6385 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6387 /* Table6387 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6389 /* Table6389 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6391 /* Table6391 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6393 /* Table6393 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6395 /* Table6395 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6397 /* Table6397 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6399 /* Table6399 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6401 /* Table6401 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6403 /* Table6403 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6405 /* Table6405 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6407 /* Table6407 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6409 /* Table6409 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6411 /* Table6411 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6413 /* Table6413 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6415 /* Table6415 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6417 /* Table6417 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6419 /* Table6419 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6421 /* Table6421 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6423 /* Table6423 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6425 /* Table6425 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6427 /* Table6427 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6429 /* Table6429 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6431 /* Table6431 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6433 /* Table6433 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6435 /* Table6435 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6437 /* Table6437 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6439 /* Table6439 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6441 /* Table6441 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6443 /* Table6443 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6445 /* Table6445 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6447 /* Table6447 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6449 /* Table6449 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6451 /* Table6451 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6453 /* Table6453 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6455 /* Table6455 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6457 /* Table6457 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6459 /* Table6459 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6461 /* Table6461 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6463 /* Table6463 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6465 /* Table6465 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6467 /* Table6467 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6469 /* Table6469 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6471 /* Table6471 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6473 /* Table6473 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6475 /* Table6475 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6477 /* Table6477 */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6479 /* Table6479 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6481 /* Table6481 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6483 /* Table6483 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6485 /* Table6485 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6487 /* Table6487 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6489 /* Table6489 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6491 /* Table6491 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6493 /* Table6493 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6495 /* Table6495 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6497 /* Table6497 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6499 /* Table6499 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6501 /* Table6501 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6503 /* Table6503 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6505 /* Table6505 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6507 /* Table6507 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6509 /* Table6509 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6511 /* Table6511 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6513 /* Table6513 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6515 /* Table6515 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6517 /* Table6517 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XD_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6519 /* Table6519 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6521 /* Table6521 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6523 /* Table6523 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6525 /* Table6525 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6527 /* Table6527 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6529 /* Table6529 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6531 /* Table6531 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6533 /* Table6533 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6535 /* Table6535 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6537 /* Table6537 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6539 /* Table6539 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6541 /* Table6541 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6543 /* Table6543 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6545 /* Table6545 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6547 /* Table6547 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6549 /* Table6549 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6551 /* Table6551 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6553 /* Table6553 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6555 /* Table6555 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6503 /* Table6503 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6505 /* Table6505 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6507 /* Table6507 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6509 /* Table6509 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6511 /* Table6511 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6513 /* Table6513 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6557 /* Table6557 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6559 /* Table6559 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XD_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6561 /* Table6561 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6563 /* Table6563 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6565 /* Table6565 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6567 /* Table6567 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6569 /* Table6569 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6571 /* Table6571 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6573 /* Table6573 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6575 /* Table6575 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6577 /* Table6577 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6579 /* Table6579 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6581 /* Table6581 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6583 /* Table6583 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6585 /* Table6585 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6587 /* Table6587 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6589 /* Table6589 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6591 /* Table6591 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6593 /* Table6593 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6595 /* Table6595 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6597 /* Table6597 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6599 /* Table6599 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6601 /* Table6601 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6603 /* Table6603 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6605 /* Table6605 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6607 /* Table6607 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6609 /* Table6609 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6611 /* Table6611 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6613 /* Table6613 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6615 /* Table6615 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6617 /* Table6617 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6619 /* Table6619 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6621 /* Table6621 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6623 /* Table6623 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6625 /* Table6625 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6627 /* Table6627 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6629 /* Table6629 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6631 /* Table6631 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6633 /* Table6633 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6635 /* Table6635 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6637 /* Table6637 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6639 /* Table6639 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XD_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6641 /* Table6641 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6643 /* Table6643 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6645 /* Table6645 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6647 /* Table6647 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6649 /* Table6649 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6651 /* Table6651 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6653 /* Table6653 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6655 /* Table6655 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6657 /* Table6657 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6659 /* Table6659 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6661 /* Table6661 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6663 /* Table6663 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6665 /* Table6665 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6667 /* Table6667 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6669 /* Table6669 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6671 /* Table6671 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6673 /* Table6673 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6675 /* Table6675 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6677 /* Table6677 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6503 /* Table6503 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6505 /* Table6505 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6507 /* Table6507 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6509 /* Table6509 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6511 /* Table6511 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6513 /* Table6513 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6679 /* Table6679 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6681 /* Table6681 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XD_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6683 /* Table6683 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6685 /* Table6685 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6687 /* Table6687 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6689 /* Table6689 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6691 /* Table6691 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6693 /* Table6693 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6695 /* Table6695 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6697 /* Table6697 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6699 /* Table6699 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6701 /* Table6701 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6703 /* Table6703 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6705 /* Table6705 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6707 /* Table6707 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6709 /* Table6709 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6711 /* Table6711 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6713 /* Table6713 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6715 /* Table6715 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6717 /* Table6717 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6719 /* Table6719 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6721 /* Table6721 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6723 /* Table6723 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6725 /* Table6725 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6727 /* Table6727 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6729 /* Table6729 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6731 /* Table6731 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6733 /* Table6733 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6735 /* Table6735 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6737 /* Table6737 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6739 /* Table6739 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6741 /* Table6741 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6743 /* Table6743 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6745 /* Table6745 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6747 /* Table6747 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6749 /* Table6749 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XD_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6751 /* Table6751 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6753 /* Table6753 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6755 /* Table6755 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 6757 /* Table6757 */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6773 /* Table6773 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6775 /* Table6775 */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6777 /* Table6777 */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6779 /* Table6779 */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6781 /* Table6781 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6783 /* Table6783 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6785 /* Table6785 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6787 /* Table6787 */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6789 /* Table6789 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6791 /* Table6791 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6793 /* Table6793 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6795 /* Table6795 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6797 /* Table6797 */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6799 /* Table6799 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6801 /* Table6801 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6803 /* Table6803 */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6805 /* Table6805 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6807 /* Table6807 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6809 /* Table6809 */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6811 /* Table6811 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6813 /* Table6813 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XD_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6815 /* Table6815 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6817 /* Table6817 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6819 /* Table6819 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6821 /* Table6821 */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6823 /* Table6823 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6825 /* Table6825 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6827 /* Table6827 */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6829 /* Table6829 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6831 /* Table6831 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6833 /* Table6833 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6835 /* Table6835 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6837 /* Table6837 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6839 /* Table6839 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6841 /* Table6841 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 6843 /* Table6843 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 6859 /* Table6859 */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6875 /* Table6875 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6877 /* Table6877 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6879 /* Table6879 */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6881 /* Table6881 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6883 /* Table6883 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6885 /* Table6885 */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6887 /* Table6887 */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6889 /* Table6889 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6891 /* Table6891 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6893 /* Table6893 */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6895 /* Table6895 */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } }, /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerTwoByteOpcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 0, 80, 81, 82, 83, 84, 0, 85, 0, 0, 86, 87, 88, 0, 0, 89, 0, 0, 0, 90, 91, 0, 92, 93, 94, 0, 95, 96, 97, 98, 0, 99, 0, 0, 100, 101, 102, 0, 0, 103, 0, 0, 0, 104, 105, 0, 0, 106, 0, 0, 0, 107, 108, 109, 0, 110, 0, 0, 111, 112, 113, 0, 0, 114, 0, 0, 0, 115, 116, 0, 0, 117, 0, 0, 0, 118, 119, 120, 121, 122, 0, 123, 124, 125, 126, 127, 128, 129, 0, 130, 131, 132, 133, 134, 135, 136, 0, 137, 138, 139, }; static const struct OpcodeDecision x86DisassemblerThreeByte38Opcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6939 /* Table6939 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6941 /* Table6941 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6939 /* Table6939 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6941 /* Table6941 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6943 /* Table6943 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6945 /* Table6945 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6947 /* Table6947 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6949 /* Table6949 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6951 /* Table6951 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6953 /* Table6953 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6955 /* Table6955 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6957 /* Table6957 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6959 /* Table6959 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6961 /* Table6961 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6963 /* Table6963 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6965 /* Table6965 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6967 /* Table6967 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6969 /* Table6969 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6971 /* Table6971 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6973 /* Table6973 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6975 /* Table6975 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6977 /* Table6977 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6979 /* Table6979 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6981 /* Table6981 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6983 /* Table6983 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6985 /* Table6985 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6987 /* Table6987 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6989 /* Table6989 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6991 /* Table6991 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6993 /* Table6993 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6995 /* Table6995 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6997 /* Table6997 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6999 /* Table6999 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7001 /* Table7001 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7003 /* Table7003 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7005 /* Table7005 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7007 /* Table7007 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7009 /* Table7009 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7011 /* Table7011 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7013 /* Table7013 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7015 /* Table7015 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7017 /* Table7017 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7019 /* Table7019 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7021 /* Table7021 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7023 /* Table7023 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7025 /* Table7025 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7027 /* Table7027 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7029 /* Table7029 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7031 /* Table7031 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7033 /* Table7033 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7035 /* Table7035 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7037 /* Table7037 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7039 /* Table7039 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7041 /* Table7041 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7043 /* Table7043 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7045 /* Table7045 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7047 /* Table7047 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7049 /* Table7049 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7051 /* Table7051 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7053 /* Table7053 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7055 /* Table7055 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6939 /* Table6939 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6941 /* Table6941 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6943 /* Table6943 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6945 /* Table6945 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6947 /* Table6947 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6949 /* Table6949 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6951 /* Table6951 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6953 /* Table6953 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6955 /* Table6955 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6957 /* Table6957 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6959 /* Table6959 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6961 /* Table6961 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6963 /* Table6963 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6965 /* Table6965 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6967 /* Table6967 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6969 /* Table6969 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6971 /* Table6971 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6973 /* Table6973 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6975 /* Table6975 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6977 /* Table6977 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6979 /* Table6979 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6981 /* Table6981 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6983 /* Table6983 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6985 /* Table6985 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6987 /* Table6987 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6989 /* Table6989 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6991 /* Table6991 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6993 /* Table6993 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6995 /* Table6995 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6997 /* Table6997 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6999 /* Table6999 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7001 /* Table7001 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7003 /* Table7003 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7005 /* Table7005 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7007 /* Table7007 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7009 /* Table7009 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7011 /* Table7011 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7013 /* Table7013 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7015 /* Table7015 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7017 /* Table7017 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7019 /* Table7019 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7021 /* Table7021 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7023 /* Table7023 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7025 /* Table7025 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7027 /* Table7027 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7029 /* Table7029 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7031 /* Table7031 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7033 /* Table7033 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7035 /* Table7035 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7037 /* Table7037 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7039 /* Table7039 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7041 /* Table7041 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7043 /* Table7043 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7045 /* Table7045 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7047 /* Table7047 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7049 /* Table7049 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7051 /* Table7051 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7053 /* Table7053 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7055 /* Table7055 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7057 /* Table7057 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7059 /* Table7059 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6939 /* Table6939 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6941 /* Table6941 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7061 /* Table7061 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7063 /* Table7063 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7065 /* Table7065 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7067 /* Table7067 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6943 /* Table6943 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6945 /* Table6945 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6947 /* Table6947 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6949 /* Table6949 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6951 /* Table6951 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6953 /* Table6953 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6955 /* Table6955 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6957 /* Table6957 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6959 /* Table6959 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6961 /* Table6961 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6963 /* Table6963 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6965 /* Table6965 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6967 /* Table6967 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6969 /* Table6969 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6971 /* Table6971 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6973 /* Table6973 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6975 /* Table6975 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6977 /* Table6977 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6979 /* Table6979 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6981 /* Table6981 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6983 /* Table6983 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6985 /* Table6985 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6987 /* Table6987 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6989 /* Table6989 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6991 /* Table6991 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6993 /* Table6993 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6995 /* Table6995 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6997 /* Table6997 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6999 /* Table6999 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7001 /* Table7001 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7003 /* Table7003 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7005 /* Table7005 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7007 /* Table7007 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7009 /* Table7009 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7011 /* Table7011 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7013 /* Table7013 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7015 /* Table7015 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7017 /* Table7017 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7019 /* Table7019 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7021 /* Table7021 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7023 /* Table7023 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7025 /* Table7025 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7027 /* Table7027 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7029 /* Table7029 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7031 /* Table7031 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7033 /* Table7033 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7069 /* Table7069 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7071 /* Table7071 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7073 /* Table7073 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7041 /* Table7041 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7043 /* Table7043 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7045 /* Table7045 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7047 /* Table7047 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7049 /* Table7049 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7065 /* Table7065 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7067 /* Table7067 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7055 /* Table7055 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6943 /* Table6943 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6945 /* Table6945 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6947 /* Table6947 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6949 /* Table6949 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6951 /* Table6951 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6953 /* Table6953 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6955 /* Table6955 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6957 /* Table6957 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6959 /* Table6959 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6961 /* Table6961 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6963 /* Table6963 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6965 /* Table6965 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6967 /* Table6967 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6969 /* Table6969 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6971 /* Table6971 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6973 /* Table6973 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6975 /* Table6975 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6977 /* Table6977 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6979 /* Table6979 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6981 /* Table6981 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6983 /* Table6983 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6985 /* Table6985 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6987 /* Table6987 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6989 /* Table6989 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6991 /* Table6991 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6993 /* Table6993 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6995 /* Table6995 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6997 /* Table6997 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6999 /* Table6999 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7001 /* Table7001 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7003 /* Table7003 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7005 /* Table7005 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7007 /* Table7007 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7009 /* Table7009 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7011 /* Table7011 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7013 /* Table7013 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7015 /* Table7015 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7017 /* Table7017 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7019 /* Table7019 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7021 /* Table7021 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7023 /* Table7023 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7025 /* Table7025 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7027 /* Table7027 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7029 /* Table7029 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7031 /* Table7031 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7033 /* Table7033 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7069 /* Table7069 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7071 /* Table7071 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7073 /* Table7073 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7041 /* Table7041 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7043 /* Table7043 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7045 /* Table7045 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7047 /* Table7047 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7049 /* Table7049 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7051 /* Table7051 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7053 /* Table7053 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7055 /* Table7055 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6939 /* Table6939 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6941 /* Table6941 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6943 /* Table6943 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6945 /* Table6945 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6947 /* Table6947 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6949 /* Table6949 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6951 /* Table6951 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6953 /* Table6953 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6955 /* Table6955 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6957 /* Table6957 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6959 /* Table6959 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6961 /* Table6961 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6963 /* Table6963 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6965 /* Table6965 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6967 /* Table6967 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6969 /* Table6969 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6971 /* Table6971 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6973 /* Table6973 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6975 /* Table6975 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6977 /* Table6977 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6979 /* Table6979 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6981 /* Table6981 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6983 /* Table6983 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6985 /* Table6985 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6987 /* Table6987 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6989 /* Table6989 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6991 /* Table6991 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6993 /* Table6993 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6995 /* Table6995 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6997 /* Table6997 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6999 /* Table6999 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7001 /* Table7001 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7003 /* Table7003 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7005 /* Table7005 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7007 /* Table7007 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7009 /* Table7009 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7011 /* Table7011 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7013 /* Table7013 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7015 /* Table7015 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7017 /* Table7017 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7019 /* Table7019 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7021 /* Table7021 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7023 /* Table7023 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7025 /* Table7025 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7027 /* Table7027 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7029 /* Table7029 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7031 /* Table7031 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7033 /* Table7033 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7069 /* Table7069 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7071 /* Table7071 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7073 /* Table7073 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7041 /* Table7041 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7043 /* Table7043 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7045 /* Table7045 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7047 /* Table7047 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7049 /* Table7049 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7051 /* Table7051 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7053 /* Table7053 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7055 /* Table7055 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7057 /* Table7057 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7059 /* Table7059 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6939 /* Table6939 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6941 /* Table6941 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7061 /* Table7061 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7063 /* Table7063 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7065 /* Table7065 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7067 /* Table7067 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7075 /* Table7075 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6897 /* Table6897 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6899 /* Table6899 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6901 /* Table6901 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6903 /* Table6903 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6905 /* Table6905 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6907 /* Table6907 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6909 /* Table6909 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6911 /* Table6911 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6913 /* Table6913 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6915 /* Table6915 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6917 /* Table6917 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6919 /* Table6919 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6921 /* Table6921 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6923 /* Table6923 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6925 /* Table6925 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7077 /* Table7077 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7079 /* Table7079 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6943 /* Table6943 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6945 /* Table6945 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6947 /* Table6947 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6949 /* Table6949 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6951 /* Table6951 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6953 /* Table6953 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6955 /* Table6955 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6957 /* Table6957 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6959 /* Table6959 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6961 /* Table6961 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6963 /* Table6963 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6965 /* Table6965 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6967 /* Table6967 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6969 /* Table6969 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6971 /* Table6971 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6973 /* Table6973 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6975 /* Table6975 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6977 /* Table6977 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6979 /* Table6979 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6981 /* Table6981 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6983 /* Table6983 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6985 /* Table6985 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6987 /* Table6987 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6989 /* Table6989 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6991 /* Table6991 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6993 /* Table6993 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6995 /* Table6995 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6997 /* Table6997 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6999 /* Table6999 */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7001 /* Table7001 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7003 /* Table7003 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7005 /* Table7005 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7007 /* Table7007 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7009 /* Table7009 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7011 /* Table7011 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7013 /* Table7013 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7015 /* Table7015 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7017 /* Table7017 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7019 /* Table7019 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7021 /* Table7021 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7023 /* Table7023 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7025 /* Table7025 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7027 /* Table7027 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7029 /* Table7029 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7031 /* Table7031 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7033 /* Table7033 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7069 /* Table7069 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7071 /* Table7071 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7073 /* Table7073 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6927 /* Table6927 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6929 /* Table6929 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6931 /* Table6931 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6933 /* Table6933 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6935 /* Table6935 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 6937 /* Table6937 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7041 /* Table7041 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7043 /* Table7043 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7045 /* Table7045 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7047 /* Table7047 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7049 /* Table7049 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7065 /* Table7065 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7067 /* Table7067 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7081 /* Table7081 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7083 /* Table7083 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 7085 /* Table7085 */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7101 /* Table7101 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7103 /* Table7103 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7105 /* Table7105 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7107 /* Table7107 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7109 /* Table7109 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7111 /* Table7111 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7113 /* Table7113 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7115 /* Table7115 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7117 /* Table7117 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7119 /* Table7119 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7121 /* Table7121 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7123 /* Table7123 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7125 /* Table7125 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7127 /* Table7127 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7129 /* Table7129 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7131 /* Table7131 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7133 /* Table7133 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7135 /* Table7135 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7137 /* Table7137 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7139 /* Table7139 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7141 /* Table7141 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7143 /* Table7143 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7145 /* Table7145 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7147 /* Table7147 */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7149 /* Table7149 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7151 /* Table7151 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7153 /* Table7153 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7155 /* Table7155 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7157 /* Table7157 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7159 /* Table7159 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7161 /* Table7161 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7163 /* Table7163 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7165 /* Table7165 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7167 /* Table7167 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7169 /* Table7169 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7171 /* Table7171 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7173 /* Table7173 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7175 /* Table7175 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7177 /* Table7177 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7179 /* Table7179 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7181 /* Table7181 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7183 /* Table7183 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7185 /* Table7185 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7187 /* Table7187 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7189 /* Table7189 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7191 /* Table7191 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7193 /* Table7193 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7195 /* Table7195 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7197 /* Table7197 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7199 /* Table7199 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7201 /* Table7201 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7203 /* Table7203 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7205 /* Table7205 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7207 /* Table7207 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7209 /* Table7209 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7211 /* Table7211 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7213 /* Table7213 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7215 /* Table7215 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7217 /* Table7217 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7219 /* Table7219 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7221 /* Table7221 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7223 /* Table7223 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7225 /* Table7225 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7227 /* Table7227 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7229 /* Table7229 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7231 /* Table7231 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7233 /* Table7233 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7235 /* Table7235 */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7237 /* Table7237 */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7239 /* Table7239 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7241 /* Table7241 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7243 /* Table7243 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7245 /* Table7245 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7247 /* Table7247 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7249 /* Table7249 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7251 /* Table7251 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7253 /* Table7253 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7255 /* Table7255 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7257 /* Table7257 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7259 /* Table7259 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7261 /* Table7261 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7263 /* Table7263 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7265 /* Table7265 */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7267 /* Table7267 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7269 /* Table7269 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7271 /* Table7271 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7273 /* Table7273 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7275 /* Table7275 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7277 /* Table7277 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7279 /* Table7279 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7281 /* Table7281 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7283 /* Table7283 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7285 /* Table7285 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7287 /* Table7287 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7289 /* Table7289 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7291 /* Table7291 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7293 /* Table7293 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7295 /* Table7295 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7297 /* Table7297 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7299 /* Table7299 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7301 /* Table7301 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7303 /* Table7303 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7305 /* Table7305 */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7307 /* Table7307 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7309 /* Table7309 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7311 /* Table7311 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7313 /* Table7313 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7315 /* Table7315 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7317 /* Table7317 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7319 /* Table7319 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 7321 /* Table7321 */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7337 /* Table7337 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7339 /* Table7339 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7341 /* Table7341 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7343 /* Table7343 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7345 /* Table7345 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7347 /* Table7347 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7349 /* Table7349 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7115 /* Table7115 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7117 /* Table7117 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7119 /* Table7119 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7121 /* Table7121 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7123 /* Table7123 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7125 /* Table7125 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7127 /* Table7127 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7129 /* Table7129 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7131 /* Table7131 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7133 /* Table7133 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7135 /* Table7135 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7137 /* Table7137 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7139 /* Table7139 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7141 /* Table7141 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7143 /* Table7143 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7145 /* Table7145 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7147 /* Table7147 */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7149 /* Table7149 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7151 /* Table7151 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7153 /* Table7153 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7155 /* Table7155 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7157 /* Table7157 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7159 /* Table7159 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7161 /* Table7161 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7163 /* Table7163 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7165 /* Table7165 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7167 /* Table7167 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7169 /* Table7169 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7171 /* Table7171 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7173 /* Table7173 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7175 /* Table7175 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7177 /* Table7177 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7179 /* Table7179 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7181 /* Table7181 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7183 /* Table7183 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7185 /* Table7185 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7187 /* Table7187 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7189 /* Table7189 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7191 /* Table7191 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7193 /* Table7193 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7195 /* Table7195 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7197 /* Table7197 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7199 /* Table7199 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7201 /* Table7201 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7203 /* Table7203 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7205 /* Table7205 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7207 /* Table7207 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7209 /* Table7209 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7211 /* Table7211 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7213 /* Table7213 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7215 /* Table7215 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7217 /* Table7217 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7219 /* Table7219 */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7351 /* Table7351 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7223 /* Table7223 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7353 /* Table7353 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7227 /* Table7227 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7229 /* Table7229 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7231 /* Table7231 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7233 /* Table7233 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7355 /* Table7355 */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7357 /* Table7357 */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7359 /* Table7359 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7361 /* Table7361 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7363 /* Table7363 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7365 /* Table7365 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7367 /* Table7367 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7369 /* Table7369 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7371 /* Table7371 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7373 /* Table7373 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7375 /* Table7375 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7377 /* Table7377 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7379 /* Table7379 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7381 /* Table7381 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7383 /* Table7383 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7385 /* Table7385 */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7387 /* Table7387 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7389 /* Table7389 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7391 /* Table7391 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7393 /* Table7393 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7395 /* Table7395 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7397 /* Table7397 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7399 /* Table7399 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7401 /* Table7401 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7403 /* Table7403 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7405 /* Table7405 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7407 /* Table7407 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7409 /* Table7409 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7411 /* Table7411 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7413 /* Table7413 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7415 /* Table7415 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7417 /* Table7417 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7419 /* Table7419 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7421 /* Table7421 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7423 /* Table7423 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7425 /* Table7425 */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7307 /* Table7307 */ }, /* 0xdc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7309 /* Table7309 */ }, /* 0xdd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7311 /* Table7311 */ }, /* 0xde */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7313 /* Table7313 */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7315 /* Table7315 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7427 /* Table7427 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7429 /* Table7429 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7431 /* Table7431 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7433 /* Table7433 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7435 /* Table7435 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7437 /* Table7437 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7439 /* Table7439 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7441 /* Table7441 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7443 /* Table7443 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7445 /* Table7445 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7447 /* Table7447 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7449 /* Table7449 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7451 /* Table7451 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7453 /* Table7453 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7455 /* Table7455 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7457 /* Table7457 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7459 /* Table7459 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7461 /* Table7461 */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7463 /* Table7463 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7465 /* Table7465 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7467 /* Table7467 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7469 /* Table7469 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7471 /* Table7471 */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7473 /* Table7473 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7475 /* Table7475 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7477 /* Table7477 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7479 /* Table7479 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7481 /* Table7481 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7483 /* Table7483 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7485 /* Table7485 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7487 /* Table7487 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7489 /* Table7489 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7491 /* Table7491 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7493 /* Table7493 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7495 /* Table7495 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7497 /* Table7497 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7499 /* Table7499 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7501 /* Table7501 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7503 /* Table7503 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7505 /* Table7505 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7507 /* Table7507 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7509 /* Table7509 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7511 /* Table7511 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7513 /* Table7513 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7515 /* Table7515 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7517 /* Table7517 */ }, /* 0x36 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7519 /* Table7519 */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7521 /* Table7521 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7523 /* Table7523 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7525 /* Table7525 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7527 /* Table7527 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7529 /* Table7529 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7531 /* Table7531 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7533 /* Table7533 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7535 /* Table7535 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7537 /* Table7537 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7539 /* Table7539 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7541 /* Table7541 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7543 /* Table7543 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7545 /* Table7545 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7547 /* Table7547 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7549 /* Table7549 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7551 /* Table7551 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7553 /* Table7553 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7555 /* Table7555 */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7557 /* Table7557 */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7559 /* Table7559 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7561 /* Table7561 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7563 /* Table7563 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7565 /* Table7565 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7567 /* Table7567 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7569 /* Table7569 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7571 /* Table7571 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7253 /* Table7253 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7573 /* Table7573 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7257 /* Table7257 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7575 /* Table7575 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7261 /* Table7261 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7577 /* Table7577 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7265 /* Table7265 */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7579 /* Table7579 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7581 /* Table7581 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7583 /* Table7583 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7273 /* Table7273 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7585 /* Table7585 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7277 /* Table7277 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7587 /* Table7587 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7281 /* Table7281 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7589 /* Table7589 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7285 /* Table7285 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7591 /* Table7591 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7593 /* Table7593 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7595 /* Table7595 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7293 /* Table7293 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7597 /* Table7597 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7297 /* Table7297 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7599 /* Table7599 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7301 /* Table7301 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7601 /* Table7601 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7305 /* Table7305 */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7429 /* Table7429 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7431 /* Table7431 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7433 /* Table7433 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7435 /* Table7435 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7437 /* Table7437 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7439 /* Table7439 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7441 /* Table7441 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7443 /* Table7443 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7445 /* Table7445 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7447 /* Table7447 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7449 /* Table7449 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7451 /* Table7451 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7453 /* Table7453 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7455 /* Table7455 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7457 /* Table7457 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7459 /* Table7459 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7461 /* Table7461 */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7463 /* Table7463 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7465 /* Table7465 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7467 /* Table7467 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7469 /* Table7469 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7471 /* Table7471 */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7473 /* Table7473 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7475 /* Table7475 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7477 /* Table7477 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7479 /* Table7479 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7481 /* Table7481 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7483 /* Table7483 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7485 /* Table7485 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7487 /* Table7487 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7489 /* Table7489 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7491 /* Table7491 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7493 /* Table7493 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7495 /* Table7495 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7497 /* Table7497 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7499 /* Table7499 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7501 /* Table7501 */ }, /* 0x2e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7503 /* Table7503 */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7505 /* Table7505 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7507 /* Table7507 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7509 /* Table7509 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7511 /* Table7511 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7513 /* Table7513 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7515 /* Table7515 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7517 /* Table7517 */ }, /* 0x36 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7519 /* Table7519 */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7521 /* Table7521 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7523 /* Table7523 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7525 /* Table7525 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7527 /* Table7527 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7529 /* Table7529 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7531 /* Table7531 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7533 /* Table7533 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7535 /* Table7535 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7537 /* Table7537 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7539 /* Table7539 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7603 /* Table7603 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7543 /* Table7543 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7605 /* Table7605 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7547 /* Table7547 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7549 /* Table7549 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7551 /* Table7551 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7553 /* Table7553 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7607 /* Table7607 */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7609 /* Table7609 */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7611 /* Table7611 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7613 /* Table7613 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7615 /* Table7615 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7617 /* Table7617 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7619 /* Table7619 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7621 /* Table7621 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7623 /* Table7623 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7373 /* Table7373 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7625 /* Table7625 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7377 /* Table7377 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7627 /* Table7627 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7381 /* Table7381 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7629 /* Table7629 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7385 /* Table7385 */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7631 /* Table7631 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7633 /* Table7633 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7635 /* Table7635 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7393 /* Table7393 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7637 /* Table7637 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7397 /* Table7397 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7639 /* Table7639 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7401 /* Table7401 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7641 /* Table7641 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7405 /* Table7405 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7643 /* Table7643 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7645 /* Table7645 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7647 /* Table7647 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7413 /* Table7413 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7649 /* Table7649 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7417 /* Table7417 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7651 /* Table7651 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7421 /* Table7421 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7653 /* Table7653 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7425 /* Table7425 */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7655 /* Table7655 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7657 /* Table7657 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7659 /* Table7659 */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7661 /* Table7661 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7663 /* Table7663 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7665 /* Table7665 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7667 /* Table7667 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7669 /* Table7669 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7671 /* Table7671 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7673 /* Table7673 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7675 /* Table7675 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7677 /* Table7677 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7679 /* Table7679 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7681 /* Table7681 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7683 /* Table7683 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7685 /* Table7685 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7687 /* Table7687 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7689 /* Table7689 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7691 /* Table7691 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7693 /* Table7693 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7695 /* Table7695 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7697 /* Table7697 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7699 /* Table7699 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7701 /* Table7701 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7703 /* Table7703 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7705 /* Table7705 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7707 /* Table7707 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7709 /* Table7709 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7711 /* Table7711 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7713 /* Table7713 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7715 /* Table7715 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7717 /* Table7717 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7719 /* Table7719 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7721 /* Table7721 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7723 /* Table7723 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7725 /* Table7725 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7727 /* Table7727 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7729 /* Table7729 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7731 /* Table7731 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7733 /* Table7733 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7735 /* Table7735 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7737 /* Table7737 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7739 /* Table7739 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7741 /* Table7741 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7743 /* Table7743 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7745 /* Table7745 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7747 /* Table7747 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7749 /* Table7749 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7751 /* Table7751 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7753 /* Table7753 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7755 /* Table7755 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7659 /* Table7659 */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7661 /* Table7661 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7757 /* Table7757 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7663 /* Table7663 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7759 /* Table7759 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7665 /* Table7665 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7761 /* Table7761 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7669 /* Table7669 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7763 /* Table7763 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7673 /* Table7673 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7765 /* Table7765 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7677 /* Table7677 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7767 /* Table7767 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7769 /* Table7769 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7771 /* Table7771 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7773 /* Table7773 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7775 /* Table7775 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7777 /* Table7777 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7779 /* Table7779 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7781 /* Table7781 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7783 /* Table7783 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7697 /* Table7697 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7699 /* Table7699 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7785 /* Table7785 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7787 /* Table7787 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7789 /* Table7789 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7791 /* Table7791 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7793 /* Table7793 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7795 /* Table7795 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7797 /* Table7797 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7799 /* Table7799 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7801 /* Table7801 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7803 /* Table7803 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7805 /* Table7805 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7807 /* Table7807 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7809 /* Table7809 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7811 /* Table7811 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7813 /* Table7813 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7815 /* Table7815 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7817 /* Table7817 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7819 /* Table7819 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7821 /* Table7821 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7823 /* Table7823 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7825 /* Table7825 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7827 /* Table7827 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7829 /* Table7829 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7831 /* Table7831 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7833 /* Table7833 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7835 /* Table7835 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7837 /* Table7837 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7839 /* Table7839 */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7841 /* Table7841 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7843 /* Table7843 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7845 /* Table7845 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7847 /* Table7847 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7849 /* Table7849 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7851 /* Table7851 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7853 /* Table7853 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7855 /* Table7855 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7857 /* Table7857 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7859 /* Table7859 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7861 /* Table7861 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7863 /* Table7863 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7865 /* Table7865 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7867 /* Table7867 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7869 /* Table7869 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7871 /* Table7871 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7873 /* Table7873 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7875 /* Table7875 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7877 /* Table7877 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7879 /* Table7879 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7881 /* Table7881 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7883 /* Table7883 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7885 /* Table7885 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7887 /* Table7887 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7889 /* Table7889 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7891 /* Table7891 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7893 /* Table7893 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7895 /* Table7895 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7897 /* Table7897 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7899 /* Table7899 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7901 /* Table7901 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7903 /* Table7903 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7905 /* Table7905 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7907 /* Table7907 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7909 /* Table7909 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7911 /* Table7911 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7913 /* Table7913 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7915 /* Table7915 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7917 /* Table7917 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7919 /* Table7919 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7659 /* Table7659 */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7661 /* Table7661 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7921 /* Table7921 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7923 /* Table7923 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7663 /* Table7663 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7925 /* Table7925 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7665 /* Table7665 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7927 /* Table7927 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7669 /* Table7669 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7929 /* Table7929 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7673 /* Table7673 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7931 /* Table7931 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7677 /* Table7677 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7933 /* Table7933 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7935 /* Table7935 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7937 /* Table7937 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7685 /* Table7685 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7939 /* Table7939 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7689 /* Table7689 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7941 /* Table7941 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7943 /* Table7943 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7945 /* Table7945 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7697 /* Table7697 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7699 /* Table7699 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7947 /* Table7947 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7949 /* Table7949 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7951 /* Table7951 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7953 /* Table7953 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7955 /* Table7955 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7957 /* Table7957 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7959 /* Table7959 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7961 /* Table7961 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7963 /* Table7963 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7965 /* Table7965 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7721 /* Table7721 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7967 /* Table7967 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7725 /* Table7725 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7969 /* Table7969 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7729 /* Table7729 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7971 /* Table7971 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7733 /* Table7733 */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7973 /* Table7973 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7975 /* Table7975 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7977 /* Table7977 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7979 /* Table7979 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7981 /* Table7981 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7983 /* Table7983 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7747 /* Table7747 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7749 /* Table7749 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7985 /* Table7985 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7987 /* Table7987 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7989 /* Table7989 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7991 /* Table7991 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7993 /* Table7993 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7995 /* Table7995 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7997 /* Table7997 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7999 /* Table7999 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8001 /* Table8001 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8003 /* Table8003 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8005 /* Table8005 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8007 /* Table8007 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8009 /* Table8009 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8011 /* Table8011 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8013 /* Table8013 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8015 /* Table8015 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8017 /* Table8017 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8019 /* Table8019 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8021 /* Table8021 */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8023 /* Table8023 */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8025 /* Table8025 */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8027 /* Table8027 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8029 /* Table8029 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8031 /* Table8031 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8033 /* Table8033 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8035 /* Table8035 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8037 /* Table8037 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8039 /* Table8039 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8041 /* Table8041 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8043 /* Table8043 */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8045 /* Table8045 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8047 /* Table8047 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8049 /* Table8049 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8051 /* Table8051 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8053 /* Table8053 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8055 /* Table8055 */ }, /* 0x36 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8057 /* Table8057 */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8059 /* Table8059 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8061 /* Table8061 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8063 /* Table8063 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8065 /* Table8065 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8067 /* Table8067 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8069 /* Table8069 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8071 /* Table8071 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8073 /* Table8073 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8075 /* Table8075 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8077 /* Table8077 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8079 /* Table8079 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8081 /* Table8081 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8083 /* Table8083 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8085 /* Table8085 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8087 /* Table8087 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8089 /* Table8089 */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8091 /* Table8091 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8093 /* Table8093 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8095 /* Table8095 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8097 /* Table8097 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8099 /* Table8099 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8101 /* Table8101 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8103 /* Table8103 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8105 /* Table8105 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8107 /* Table8107 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8109 /* Table8109 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8111 /* Table8111 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8113 /* Table8113 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8115 /* Table8115 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8117 /* Table8117 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8119 /* Table8119 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8121 /* Table8121 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8123 /* Table8123 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8125 /* Table8125 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8127 /* Table8127 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8129 /* Table8129 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8131 /* Table8131 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8133 /* Table8133 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8135 /* Table8135 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8137 /* Table8137 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8139 /* Table8139 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8141 /* Table8141 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8143 /* Table8143 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8145 /* Table8145 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8147 /* Table8147 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8149 /* Table8149 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8151 /* Table8151 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8153 /* Table8153 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8155 /* Table8155 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8157 /* Table8157 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8159 /* Table8159 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8161 /* Table8161 */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8163 /* Table8163 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8165 /* Table8165 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8167 /* Table8167 */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8169 /* Table8169 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8171 /* Table8171 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8173 /* Table8173 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8175 /* Table8175 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8177 /* Table8177 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8179 /* Table8179 */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8181 /* Table8181 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8183 /* Table8183 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8185 /* Table8185 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8187 /* Table8187 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8189 /* Table8189 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8191 /* Table8191 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8193 /* Table8193 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8195 /* Table8195 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8197 /* Table8197 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8199 /* Table8199 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8201 /* Table8201 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8203 /* Table8203 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8205 /* Table8205 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8207 /* Table8207 */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8209 /* Table8209 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8211 /* Table8211 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8213 /* Table8213 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8215 /* Table8215 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8217 /* Table8217 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8219 /* Table8219 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8221 /* Table8221 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8223 /* Table8223 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8225 /* Table8225 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8227 /* Table8227 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8229 /* Table8229 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8231 /* Table8231 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8233 /* Table8233 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8235 /* Table8235 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8237 /* Table8237 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8239 /* Table8239 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8241 /* Table8241 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8243 /* Table8243 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8245 /* Table8245 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8247 /* Table8247 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8249 /* Table8249 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8251 /* Table8251 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8253 /* Table8253 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8255 /* Table8255 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8257 /* Table8257 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8259 /* Table8259 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8261 /* Table8261 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8263 /* Table8263 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8265 /* Table8265 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8267 /* Table8267 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8269 /* Table8269 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8271 /* Table8271 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8273 /* Table8273 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8275 /* Table8275 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8277 /* Table8277 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8279 /* Table8279 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8281 /* Table8281 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8283 /* Table8283 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8285 /* Table8285 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8287 /* Table8287 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8289 /* Table8289 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8291 /* Table8291 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8293 /* Table8293 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8295 /* Table8295 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8297 /* Table8297 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8299 /* Table8299 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8301 /* Table8301 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8303 /* Table8303 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8305 /* Table8305 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8307 /* Table8307 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8309 /* Table8309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8311 /* Table8311 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8313 /* Table8313 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8315 /* Table8315 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8317 /* Table8317 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8319 /* Table8319 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8321 /* Table8321 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8323 /* Table8323 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8325 /* Table8325 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8327 /* Table8327 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8329 /* Table8329 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8331 /* Table8331 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8333 /* Table8333 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8335 /* Table8335 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8337 /* Table8337 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8339 /* Table8339 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8341 /* Table8341 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8343 /* Table8343 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8345 /* Table8345 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8347 /* Table8347 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8349 /* Table8349 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8351 /* Table8351 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8353 /* Table8353 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8355 /* Table8355 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8357 /* Table8357 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8359 /* Table8359 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8361 /* Table8361 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8363 /* Table8363 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8365 /* Table8365 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8367 /* Table8367 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8369 /* Table8369 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8371 /* Table8371 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8373 /* Table8373 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8375 /* Table8375 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8377 /* Table8377 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8379 /* Table8379 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8381 /* Table8381 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8383 /* Table8383 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8385 /* Table8385 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8387 /* Table8387 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8389 /* Table8389 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8391 /* Table8391 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8393 /* Table8393 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8395 /* Table8395 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8397 /* Table8397 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8399 /* Table8399 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8401 /* Table8401 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8403 /* Table8403 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8405 /* Table8405 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8407 /* Table8407 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8409 /* Table8409 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8411 /* Table8411 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8413 /* Table8413 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8415 /* Table8415 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8417 /* Table8417 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8419 /* Table8419 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8421 /* Table8421 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8423 /* Table8423 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8425 /* Table8425 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8427 /* Table8427 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8429 /* Table8429 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8431 /* Table8431 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8433 /* Table8433 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8435 /* Table8435 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8437 /* Table8437 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8439 /* Table8439 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8441 /* Table8441 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8443 /* Table8443 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8445 /* Table8445 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8447 /* Table8447 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8449 /* Table8449 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8451 /* Table8451 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8453 /* Table8453 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8455 /* Table8455 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8457 /* Table8457 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8459 /* Table8459 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8461 /* Table8461 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8463 /* Table8463 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8465 /* Table8465 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8467 /* Table8467 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8469 /* Table8469 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8471 /* Table8471 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8473 /* Table8473 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8475 /* Table8475 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8477 /* Table8477 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8479 /* Table8479 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8481 /* Table8481 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8483 /* Table8483 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8485 /* Table8485 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8487 /* Table8487 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8489 /* Table8489 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8491 /* Table8491 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8493 /* Table8493 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8495 /* Table8495 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8497 /* Table8497 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8499 /* Table8499 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8501 /* Table8501 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8503 /* Table8503 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8505 /* Table8505 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8507 /* Table8507 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8509 /* Table8509 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8511 /* Table8511 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8513 /* Table8513 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8515 /* Table8515 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8517 /* Table8517 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8519 /* Table8519 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8521 /* Table8521 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8523 /* Table8523 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8525 /* Table8525 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8527 /* Table8527 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8529 /* Table8529 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XS_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8531 /* Table8531 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8533 /* Table8533 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8535 /* Table8535 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8537 /* Table8537 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8539 /* Table8539 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8541 /* Table8541 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8543 /* Table8543 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8545 /* Table8545 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8547 /* Table8547 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8549 /* Table8549 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8551 /* Table8551 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8553 /* Table8553 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8555 /* Table8555 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8557 /* Table8557 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8559 /* Table8559 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8561 /* Table8561 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8563 /* Table8563 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8565 /* Table8565 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8567 /* Table8567 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8569 /* Table8569 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8571 /* Table8571 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8573 /* Table8573 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8575 /* Table8575 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8577 /* Table8577 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8579 /* Table8579 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8581 /* Table8581 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8583 /* Table8583 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8585 /* Table8585 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8587 /* Table8587 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8589 /* Table8589 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8591 /* Table8591 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8593 /* Table8593 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8595 /* Table8595 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8597 /* Table8597 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8599 /* Table8599 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8601 /* Table8601 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8603 /* Table8603 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8605 /* Table8605 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8607 /* Table8607 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8609 /* Table8609 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8611 /* Table8611 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8613 /* Table8613 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8615 /* Table8615 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8617 /* Table8617 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8619 /* Table8619 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8621 /* Table8621 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8623 /* Table8623 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8625 /* Table8625 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8627 /* Table8627 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8629 /* Table8629 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8631 /* Table8631 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8633 /* Table8633 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8635 /* Table8635 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8637 /* Table8637 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8639 /* Table8639 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8641 /* Table8641 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8643 /* Table8643 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8645 /* Table8645 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8647 /* Table8647 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8649 /* Table8649 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8651 /* Table8651 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8653 /* Table8653 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8655 /* Table8655 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8657 /* Table8657 */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8659 /* Table8659 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8661 /* Table8661 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8663 /* Table8663 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8665 /* Table8665 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8667 /* Table8667 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8669 /* Table8669 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8671 /* Table8671 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8673 /* Table8673 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8675 /* Table8675 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8677 /* Table8677 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8679 /* Table8679 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8681 /* Table8681 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8683 /* Table8683 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 8685 /* Table8685 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 8701 /* Table8701 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8717 /* Table8717 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8719 /* Table8719 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8721 /* Table8721 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8723 /* Table8723 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8725 /* Table8725 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8727 /* Table8727 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8729 /* Table8729 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8731 /* Table8731 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8733 /* Table8733 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8735 /* Table8735 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8737 /* Table8737 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8739 /* Table8739 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8741 /* Table8741 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8743 /* Table8743 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8745 /* Table8745 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8747 /* Table8747 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8749 /* Table8749 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8751 /* Table8751 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8753 /* Table8753 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8755 /* Table8755 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8757 /* Table8757 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8759 /* Table8759 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8761 /* Table8761 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8763 /* Table8763 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8765 /* Table8765 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8767 /* Table8767 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8769 /* Table8769 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8771 /* Table8771 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8773 /* Table8773 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8775 /* Table8775 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8777 /* Table8777 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8779 /* Table8779 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8781 /* Table8781 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8783 /* Table8783 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8785 /* Table8785 */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8787 /* Table8787 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8789 /* Table8789 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8791 /* Table8791 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8793 /* Table8793 */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8795 /* Table8795 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8797 /* Table8797 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8799 /* Table8799 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8801 /* Table8801 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8803 /* Table8803 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8805 /* Table8805 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8807 /* Table8807 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8809 /* Table8809 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8811 /* Table8811 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8813 /* Table8813 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8815 /* Table8815 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8817 /* Table8817 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8819 /* Table8819 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 8821 /* Table8821 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 8837 /* Table8837 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8853 /* Table8853 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8855 /* Table8855 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8857 /* Table8857 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8859 /* Table8859 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8861 /* Table8861 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8863 /* Table8863 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8865 /* Table8865 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8867 /* Table8867 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8869 /* Table8869 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8871 /* Table8871 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8873 /* Table8873 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8875 /* Table8875 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8877 /* Table8877 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8879 /* Table8879 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8881 /* Table8881 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8883 /* Table8883 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8885 /* Table8885 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8887 /* Table8887 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8889 /* Table8889 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8891 /* Table8891 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8893 /* Table8893 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8895 /* Table8895 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8897 /* Table8897 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8899 /* Table8899 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8901 /* Table8901 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8903 /* Table8903 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8905 /* Table8905 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8907 /* Table8907 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8909 /* Table8909 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8911 /* Table8911 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8913 /* Table8913 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8915 /* Table8915 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8917 /* Table8917 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8919 /* Table8919 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8921 /* Table8921 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8923 /* Table8923 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8925 /* Table8925 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8927 /* Table8927 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8929 /* Table8929 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8931 /* Table8931 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8933 /* Table8933 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8935 /* Table8935 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8937 /* Table8937 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8939 /* Table8939 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8941 /* Table8941 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8943 /* Table8943 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8945 /* Table8945 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8947 /* Table8947 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8949 /* Table8949 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8951 /* Table8951 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8953 /* Table8953 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8955 /* Table8955 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8957 /* Table8957 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8959 /* Table8959 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8961 /* Table8961 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8963 /* Table8963 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8965 /* Table8965 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8967 /* Table8967 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8969 /* Table8969 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8971 /* Table8971 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8973 /* Table8973 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8975 /* Table8975 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8977 /* Table8977 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8979 /* Table8979 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8981 /* Table8981 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8983 /* Table8983 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8985 /* Table8985 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8987 /* Table8987 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8989 /* Table8989 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8991 /* Table8991 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8993 /* Table8993 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8995 /* Table8995 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8997 /* Table8997 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 8999 /* Table8999 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9001 /* Table9001 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9003 /* Table9003 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9005 /* Table9005 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9007 /* Table9007 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9009 /* Table9009 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9011 /* Table9011 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9013 /* Table9013 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9015 /* Table9015 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9017 /* Table9017 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9019 /* Table9019 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9021 /* Table9021 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9023 /* Table9023 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9025 /* Table9025 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9027 /* Table9027 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9029 /* Table9029 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9031 /* Table9031 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9033 /* Table9033 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9035 /* Table9035 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9037 /* Table9037 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9039 /* Table9039 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9041 /* Table9041 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9043 /* Table9043 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9045 /* Table9045 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9047 /* Table9047 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9049 /* Table9049 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9051 /* Table9051 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9053 /* Table9053 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9055 /* Table9055 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9057 /* Table9057 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9059 /* Table9059 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9061 /* Table9061 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9063 /* Table9063 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9065 /* Table9065 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9067 /* Table9067 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9069 /* Table9069 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9071 /* Table9071 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9073 /* Table9073 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9075 /* Table9075 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9077 /* Table9077 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9079 /* Table9079 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9081 /* Table9081 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9083 /* Table9083 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9085 /* Table9085 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9087 /* Table9087 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9089 /* Table9089 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9091 /* Table9091 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9093 /* Table9093 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9095 /* Table9095 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9097 /* Table9097 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9099 /* Table9099 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9101 /* Table9101 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9103 /* Table9103 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9105 /* Table9105 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9107 /* Table9107 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9109 /* Table9109 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9111 /* Table9111 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9113 /* Table9113 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9115 /* Table9115 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9117 /* Table9117 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9119 /* Table9119 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9121 /* Table9121 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9123 /* Table9123 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9125 /* Table9125 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9127 /* Table9127 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9129 /* Table9129 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9131 /* Table9131 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9133 /* Table9133 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9135 /* Table9135 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9137 /* Table9137 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9139 /* Table9139 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9141 /* Table9141 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9143 /* Table9143 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9145 /* Table9145 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9147 /* Table9147 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9149 /* Table9149 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9151 /* Table9151 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9153 /* Table9153 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9155 /* Table9155 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9157 /* Table9157 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9159 /* Table9159 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9161 /* Table9161 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9163 /* Table9163 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9165 /* Table9165 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9167 /* Table9167 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9169 /* Table9169 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9171 /* Table9171 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9173 /* Table9173 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9175 /* Table9175 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9177 /* Table9177 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9179 /* Table9179 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9181 /* Table9181 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9183 /* Table9183 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9185 /* Table9185 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9187 /* Table9187 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9189 /* Table9189 */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9191 /* Table9191 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9193 /* Table9193 */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9195 /* Table9195 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9197 /* Table9197 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9199 /* Table9199 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9201 /* Table9201 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9203 /* Table9203 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9205 /* Table9205 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9207 /* Table9207 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9209 /* Table9209 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9211 /* Table9211 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9213 /* Table9213 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9215 /* Table9215 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9217 /* Table9217 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9219 /* Table9219 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9221 /* Table9221 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9223 /* Table9223 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9225 /* Table9225 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9227 /* Table9227 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9229 /* Table9229 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9231 /* Table9231 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9233 /* Table9233 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9235 /* Table9235 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9237 /* Table9237 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9239 /* Table9239 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9241 /* Table9241 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9243 /* Table9243 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9245 /* Table9245 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9247 /* Table9247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9249 /* Table9249 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9251 /* Table9251 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9253 /* Table9253 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9255 /* Table9255 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9257 /* Table9257 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9259 /* Table9259 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9261 /* Table9261 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9263 /* Table9263 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9265 /* Table9265 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9267 /* Table9267 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9269 /* Table9269 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9271 /* Table9271 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9273 /* Table9273 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9275 /* Table9275 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9277 /* Table9277 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9279 /* Table9279 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9281 /* Table9281 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9283 /* Table9283 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9285 /* Table9285 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9287 /* Table9287 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9289 /* Table9289 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9291 /* Table9291 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9293 /* Table9293 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9295 /* Table9295 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9297 /* Table9297 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9299 /* Table9299 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9301 /* Table9301 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9303 /* Table9303 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9305 /* Table9305 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9307 /* Table9307 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9309 /* Table9309 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9311 /* Table9311 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9313 /* Table9313 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9315 /* Table9315 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9317 /* Table9317 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9319 /* Table9319 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9321 /* Table9321 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9323 /* Table9323 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9325 /* Table9325 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9327 /* Table9327 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9329 /* Table9329 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9331 /* Table9331 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9333 /* Table9333 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9335 /* Table9335 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9337 /* Table9337 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9339 /* Table9339 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9341 /* Table9341 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9343 /* Table9343 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9345 /* Table9345 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9347 /* Table9347 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9349 /* Table9349 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9351 /* Table9351 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9353 /* Table9353 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9355 /* Table9355 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9357 /* Table9357 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9359 /* Table9359 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9361 /* Table9361 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9363 /* Table9363 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9365 /* Table9365 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9367 /* Table9367 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9369 /* Table9369 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9371 /* Table9371 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9373 /* Table9373 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9375 /* Table9375 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9377 /* Table9377 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9379 /* Table9379 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9381 /* Table9381 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9383 /* Table9383 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9385 /* Table9385 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9387 /* Table9387 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9389 /* Table9389 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9391 /* Table9391 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9393 /* Table9393 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9395 /* Table9395 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9397 /* Table9397 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9399 /* Table9399 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9401 /* Table9401 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9403 /* Table9403 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9405 /* Table9405 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9407 /* Table9407 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9409 /* Table9409 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9411 /* Table9411 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9413 /* Table9413 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9415 /* Table9415 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9417 /* Table9417 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9419 /* Table9419 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9421 /* Table9421 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9423 /* Table9423 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9425 /* Table9425 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9427 /* Table9427 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9429 /* Table9429 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9431 /* Table9431 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9433 /* Table9433 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9435 /* Table9435 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9437 /* Table9437 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9439 /* Table9439 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9441 /* Table9441 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9443 /* Table9443 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9445 /* Table9445 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9447 /* Table9447 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9449 /* Table9449 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9451 /* Table9451 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9453 /* Table9453 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9455 /* Table9455 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9457 /* Table9457 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9459 /* Table9459 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9461 /* Table9461 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9463 /* Table9463 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9465 /* Table9465 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9467 /* Table9467 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9469 /* Table9469 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9471 /* Table9471 */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9473 /* Table9473 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9475 /* Table9475 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9477 /* Table9477 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9479 /* Table9479 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9481 /* Table9481 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9483 /* Table9483 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9485 /* Table9485 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9487 /* Table9487 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9489 /* Table9489 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9491 /* Table9491 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9493 /* Table9493 */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9495 /* Table9495 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9497 /* Table9497 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9499 /* Table9499 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9501 /* Table9501 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9503 /* Table9503 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9505 /* Table9505 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9507 /* Table9507 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9509 /* Table9509 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9511 /* Table9511 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9513 /* Table9513 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9515 /* Table9515 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9517 /* Table9517 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9519 /* Table9519 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9521 /* Table9521 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9523 /* Table9523 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9525 /* Table9525 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9527 /* Table9527 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9529 /* Table9529 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9531 /* Table9531 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9533 /* Table9533 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9535 /* Table9535 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9537 /* Table9537 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9539 /* Table9539 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9541 /* Table9541 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9543 /* Table9543 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9545 /* Table9545 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9547 /* Table9547 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9549 /* Table9549 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9551 /* Table9551 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9553 /* Table9553 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9555 /* Table9555 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9557 /* Table9557 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9559 /* Table9559 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9561 /* Table9561 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9563 /* Table9563 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9565 /* Table9565 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9567 /* Table9567 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9569 /* Table9569 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9571 /* Table9571 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9573 /* Table9573 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9575 /* Table9575 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9577 /* Table9577 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9579 /* Table9579 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9581 /* Table9581 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9583 /* Table9583 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9585 /* Table9585 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9587 /* Table9587 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9589 /* Table9589 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9591 /* Table9591 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9593 /* Table9593 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9595 /* Table9595 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9597 /* Table9597 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9599 /* Table9599 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9601 /* Table9601 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9603 /* Table9603 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9605 /* Table9605 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9607 /* Table9607 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9609 /* Table9609 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9611 /* Table9611 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9613 /* Table9613 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9615 /* Table9615 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9617 /* Table9617 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9619 /* Table9619 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9621 /* Table9621 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9623 /* Table9623 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9625 /* Table9625 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9627 /* Table9627 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9629 /* Table9629 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9631 /* Table9631 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9633 /* Table9633 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9635 /* Table9635 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9637 /* Table9637 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9639 /* Table9639 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9641 /* Table9641 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9643 /* Table9643 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9645 /* Table9645 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9647 /* Table9647 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9649 /* Table9649 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9651 /* Table9651 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9653 /* Table9653 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9655 /* Table9655 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9657 /* Table9657 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9659 /* Table9659 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9661 /* Table9661 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9663 /* Table9663 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9665 /* Table9665 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9667 /* Table9667 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9669 /* Table9669 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9671 /* Table9671 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9673 /* Table9673 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9675 /* Table9675 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9677 /* Table9677 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9679 /* Table9679 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9681 /* Table9681 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9683 /* Table9683 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9685 /* Table9685 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9687 /* Table9687 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9689 /* Table9689 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9691 /* Table9691 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9693 /* Table9693 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9695 /* Table9695 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9697 /* Table9697 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9699 /* Table9699 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9701 /* Table9701 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9703 /* Table9703 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9705 /* Table9705 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9707 /* Table9707 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9709 /* Table9709 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9711 /* Table9711 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9713 /* Table9713 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9715 /* Table9715 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9717 /* Table9717 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9719 /* Table9719 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9721 /* Table9721 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9723 /* Table9723 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9725 /* Table9725 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9727 /* Table9727 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9729 /* Table9729 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9731 /* Table9731 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9733 /* Table9733 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9735 /* Table9735 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9737 /* Table9737 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9739 /* Table9739 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9741 /* Table9741 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9743 /* Table9743 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9745 /* Table9745 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9747 /* Table9747 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9749 /* Table9749 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9751 /* Table9751 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9753 /* Table9753 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9755 /* Table9755 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9757 /* Table9757 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9759 /* Table9759 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9761 /* Table9761 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9763 /* Table9763 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9765 /* Table9765 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9767 /* Table9767 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9769 /* Table9769 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9771 /* Table9771 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9773 /* Table9773 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9775 /* Table9775 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9777 /* Table9777 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9779 /* Table9779 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9781 /* Table9781 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9783 /* Table9783 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9785 /* Table9785 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9787 /* Table9787 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9789 /* Table9789 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9791 /* Table9791 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9793 /* Table9793 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9795 /* Table9795 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9797 /* Table9797 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9799 /* Table9799 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9801 /* Table9801 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9803 /* Table9803 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9805 /* Table9805 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9807 /* Table9807 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9809 /* Table9809 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9811 /* Table9811 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9813 /* Table9813 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9815 /* Table9815 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9817 /* Table9817 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9819 /* Table9819 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9821 /* Table9821 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9823 /* Table9823 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9825 /* Table9825 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9827 /* Table9827 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9829 /* Table9829 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9831 /* Table9831 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9833 /* Table9833 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9835 /* Table9835 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9837 /* Table9837 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9839 /* Table9839 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9841 /* Table9841 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9843 /* Table9843 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9845 /* Table9845 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9847 /* Table9847 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9849 /* Table9849 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9851 /* Table9851 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9853 /* Table9853 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9855 /* Table9855 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9857 /* Table9857 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9859 /* Table9859 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9861 /* Table9861 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9863 /* Table9863 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9865 /* Table9865 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9867 /* Table9867 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9869 /* Table9869 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9871 /* Table9871 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9873 /* Table9873 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9875 /* Table9875 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9877 /* Table9877 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9879 /* Table9879 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9881 /* Table9881 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9883 /* Table9883 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9885 /* Table9885 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9887 /* Table9887 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9889 /* Table9889 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9891 /* Table9891 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9893 /* Table9893 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9895 /* Table9895 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9897 /* Table9897 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9899 /* Table9899 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9901 /* Table9901 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9903 /* Table9903 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9905 /* Table9905 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9907 /* Table9907 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9909 /* Table9909 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9911 /* Table9911 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9913 /* Table9913 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9915 /* Table9915 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9917 /* Table9917 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9919 /* Table9919 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9921 /* Table9921 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9923 /* Table9923 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9925 /* Table9925 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9927 /* Table9927 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9929 /* Table9929 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9931 /* Table9931 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9933 /* Table9933 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9935 /* Table9935 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9937 /* Table9937 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9939 /* Table9939 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9941 /* Table9941 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9943 /* Table9943 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9945 /* Table9945 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9947 /* Table9947 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9949 /* Table9949 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9951 /* Table9951 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9953 /* Table9953 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9955 /* Table9955 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9957 /* Table9957 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9959 /* Table9959 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9961 /* Table9961 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9963 /* Table9963 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9965 /* Table9965 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9967 /* Table9967 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9969 /* Table9969 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9971 /* Table9971 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9973 /* Table9973 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9975 /* Table9975 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9977 /* Table9977 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9979 /* Table9979 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9981 /* Table9981 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9983 /* Table9983 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9985 /* Table9985 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9987 /* Table9987 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9989 /* Table9989 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9991 /* Table9991 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9993 /* Table9993 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9995 /* Table9995 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9997 /* Table9997 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 9999 /* Table9999 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10001 /* Table10001 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10003 /* Table10003 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10005 /* Table10005 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10007 /* Table10007 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10009 /* Table10009 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10011 /* Table10011 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10013 /* Table10013 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10015 /* Table10015 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10017 /* Table10017 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10019 /* Table10019 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10021 /* Table10021 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10023 /* Table10023 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10025 /* Table10025 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10027 /* Table10027 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10029 /* Table10029 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10031 /* Table10031 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10033 /* Table10033 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10035 /* Table10035 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10037 /* Table10037 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10039 /* Table10039 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10041 /* Table10041 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_XS_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10043 /* Table10043 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10045 /* Table10045 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10047 /* Table10047 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10049 /* Table10049 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10051 /* Table10051 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10053 /* Table10053 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10055 /* Table10055 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10057 /* Table10057 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10059 /* Table10059 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10061 /* Table10061 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10063 /* Table10063 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10065 /* Table10065 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10067 /* Table10067 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10069 /* Table10069 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10071 /* Table10071 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10073 /* Table10073 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10075 /* Table10075 */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10077 /* Table10077 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10079 /* Table10079 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10081 /* Table10081 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10083 /* Table10083 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10085 /* Table10085 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10087 /* Table10087 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10089 /* Table10089 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10091 /* Table10091 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10093 /* Table10093 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10095 /* Table10095 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10097 /* Table10097 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10099 /* Table10099 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10101 /* Table10101 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10103 /* Table10103 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10105 /* Table10105 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10107 /* Table10107 */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10109 /* Table10109 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10111 /* Table10111 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10113 /* Table10113 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10115 /* Table10115 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10117 /* Table10117 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10119 /* Table10119 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10121 /* Table10121 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10123 /* Table10123 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10125 /* Table10125 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10127 /* Table10127 */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10129 /* Table10129 */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10131 /* Table10131 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10133 /* Table10133 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10135 /* Table10135 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10137 /* Table10137 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10139 /* Table10139 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10141 /* Table10141 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10143 /* Table10143 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10145 /* Table10145 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10147 /* Table10147 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10149 /* Table10149 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10151 /* Table10151 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10153 /* Table10153 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10155 /* Table10155 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10157 /* Table10157 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10159 /* Table10159 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10161 /* Table10161 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10163 /* Table10163 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10165 /* Table10165 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10167 /* Table10167 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10169 /* Table10169 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10171 /* Table10171 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10173 /* Table10173 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10175 /* Table10175 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10177 /* Table10177 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10179 /* Table10179 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10181 /* Table10181 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10183 /* Table10183 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10185 /* Table10185 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10187 /* Table10187 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10189 /* Table10189 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10191 /* Table10191 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10193 /* Table10193 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10195 /* Table10195 */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10197 /* Table10197 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10199 /* Table10199 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10201 /* Table10201 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10203 /* Table10203 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10205 /* Table10205 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10207 /* Table10207 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10209 /* Table10209 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10211 /* Table10211 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10213 /* Table10213 */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10215 /* Table10215 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10217 /* Table10217 */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10219 /* Table10219 */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10221 /* Table10221 */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10223 /* Table10223 */ }, /* 0x65 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10225 /* Table10225 */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10227 /* Table10227 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10229 /* Table10229 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10231 /* Table10231 */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10233 /* Table10233 */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10235 /* Table10235 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10237 /* Table10237 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10239 /* Table10239 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10241 /* Table10241 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10243 /* Table10243 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10245 /* Table10245 */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10247 /* Table10247 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10249 /* Table10249 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10251 /* Table10251 */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10253 /* Table10253 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10255 /* Table10255 */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10257 /* Table10257 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10259 /* Table10259 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10261 /* Table10261 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10263 /* Table10263 */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10265 /* Table10265 */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10267 /* Table10267 */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10269 /* Table10269 */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10271 /* Table10271 */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10273 /* Table10273 */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10275 /* Table10275 */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10277 /* Table10277 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } }, /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerThreeByte38Opcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 8, 0, 9, 10, 11, 12, 13, 14, 15, 16, 0, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 0, 0, 0, 28, 0, 0, 0, 29, 0, 30, 0, 31, 0, 32, 0, 33, 0, 34, 0, 35, 0, 36, 0, 37, 0, 38, 0, 39, 0, 40, 0, 41, 0, 0, 0, 42, 0, 0, 0, 43, 0, 0, 0, 44, 0, 0, 0, 45, 0, 46, 0, 47, 0, 0, 0, 48, 0, 0, 0, 49, 0, 0, 0, 50, 0, 0, 0, 51, 0, 0, 0, 52, 0, 0, 0, 53, 0, 0, 0, 54, 0, 0, 0, 55, 0, 0, 0, 56, 0, 0, 0, 57, 0, 0, 0, 58, 0, 0, 0, 59, 0, 0, 0, 60, 0, 0, 0, 61, 0, 0, 0, 62, 0, 0, 0, 63, 0, 0, 0, 64, 0, 0, 0, 65, 0, 0, 0, 66, 0, 0, 0, 67, 0, 0, 0, 68, 0, 0, 0, 69, 0, 0, 0, 70, 0, 71, 0, 72, 0, 0, 0, 73, }; static const struct OpcodeDecision x86DisassemblerThreeByte3AOpcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10283 /* Table10283 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10285 /* Table10285 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10287 /* Table10287 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10289 /* Table10289 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10291 /* Table10291 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10293 /* Table10293 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10295 /* Table10295 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10297 /* Table10297 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10299 /* Table10299 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10301 /* Table10301 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10303 /* Table10303 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10305 /* Table10305 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10307 /* Table10307 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10309 /* Table10309 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10311 /* Table10311 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10313 /* Table10313 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10315 /* Table10315 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10317 /* Table10317 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10319 /* Table10319 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10321 /* Table10321 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10323 /* Table10323 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10325 /* Table10325 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10327 /* Table10327 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10329 /* Table10329 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10283 /* Table10283 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10285 /* Table10285 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10287 /* Table10287 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10289 /* Table10289 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10291 /* Table10291 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10293 /* Table10293 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10295 /* Table10295 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10297 /* Table10297 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10299 /* Table10299 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10301 /* Table10301 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10303 /* Table10303 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10305 /* Table10305 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10307 /* Table10307 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10309 /* Table10309 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10311 /* Table10311 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10313 /* Table10313 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10315 /* Table10315 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10317 /* Table10317 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10319 /* Table10319 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10321 /* Table10321 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10323 /* Table10323 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10325 /* Table10325 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10327 /* Table10327 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10329 /* Table10329 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10283 /* Table10283 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10285 /* Table10285 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10287 /* Table10287 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10289 /* Table10289 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10291 /* Table10291 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10293 /* Table10293 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10295 /* Table10295 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10297 /* Table10297 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10299 /* Table10299 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10301 /* Table10301 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10303 /* Table10303 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10305 /* Table10305 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10307 /* Table10307 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10309 /* Table10309 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10311 /* Table10311 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10313 /* Table10313 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10315 /* Table10315 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10317 /* Table10317 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10319 /* Table10319 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10321 /* Table10321 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10323 /* Table10323 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10325 /* Table10325 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10327 /* Table10327 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10329 /* Table10329 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10283 /* Table10283 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10285 /* Table10285 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10287 /* Table10287 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10289 /* Table10289 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10291 /* Table10291 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10293 /* Table10293 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10295 /* Table10295 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10297 /* Table10297 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10299 /* Table10299 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10301 /* Table10301 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10303 /* Table10303 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10305 /* Table10305 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10307 /* Table10307 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10309 /* Table10309 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10311 /* Table10311 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10313 /* Table10313 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10315 /* Table10315 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10317 /* Table10317 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10319 /* Table10319 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10321 /* Table10321 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10323 /* Table10323 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10325 /* Table10325 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10327 /* Table10327 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10329 /* Table10329 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10283 /* Table10283 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10285 /* Table10285 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10287 /* Table10287 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10289 /* Table10289 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10291 /* Table10291 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10293 /* Table10293 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10295 /* Table10295 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10297 /* Table10297 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10299 /* Table10299 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10301 /* Table10301 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10303 /* Table10303 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10305 /* Table10305 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10307 /* Table10307 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10309 /* Table10309 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10311 /* Table10311 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10313 /* Table10313 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10315 /* Table10315 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10317 /* Table10317 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10319 /* Table10319 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10321 /* Table10321 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10323 /* Table10323 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10325 /* Table10325 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10327 /* Table10327 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10329 /* Table10329 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10279 /* Table10279 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10283 /* Table10283 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10285 /* Table10285 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10287 /* Table10287 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10289 /* Table10289 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10291 /* Table10291 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10293 /* Table10293 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10295 /* Table10295 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10297 /* Table10297 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10299 /* Table10299 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10301 /* Table10301 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10331 /* Table10331 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10305 /* Table10305 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10307 /* Table10307 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10309 /* Table10309 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10333 /* Table10333 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10313 /* Table10313 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10315 /* Table10315 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10317 /* Table10317 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10319 /* Table10319 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10321 /* Table10321 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10323 /* Table10323 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10325 /* Table10325 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10327 /* Table10327 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10281 /* Table10281 */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10329 /* Table10329 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10335 /* Table10335 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10337 /* Table10337 */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10339 /* Table10339 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10341 /* Table10341 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10343 /* Table10343 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10345 /* Table10345 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10347 /* Table10347 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10349 /* Table10349 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10351 /* Table10351 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10353 /* Table10353 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10355 /* Table10355 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10357 /* Table10357 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10359 /* Table10359 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10361 /* Table10361 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10363 /* Table10363 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10365 /* Table10365 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10367 /* Table10367 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10369 /* Table10369 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10371 /* Table10371 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10373 /* Table10373 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10375 /* Table10375 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10377 /* Table10377 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10379 /* Table10379 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10381 /* Table10381 */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10383 /* Table10383 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10385 /* Table10385 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10387 /* Table10387 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10389 /* Table10389 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10391 /* Table10391 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10393 /* Table10393 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10395 /* Table10395 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10397 /* Table10397 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10399 /* Table10399 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10401 /* Table10401 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10403 /* Table10403 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10405 /* Table10405 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10407 /* Table10407 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10409 /* Table10409 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10411 /* Table10411 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10413 /* Table10413 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10415 /* Table10415 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10417 /* Table10417 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10419 /* Table10419 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10421 /* Table10421 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10423 /* Table10423 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10425 /* Table10425 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10427 /* Table10427 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10429 /* Table10429 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10431 /* Table10431 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10433 /* Table10433 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10435 /* Table10435 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10437 /* Table10437 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10439 /* Table10439 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10441 /* Table10441 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10443 /* Table10443 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10445 /* Table10445 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10447 /* Table10447 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10449 /* Table10449 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10451 /* Table10451 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10337 /* Table10337 */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10339 /* Table10339 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10341 /* Table10341 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10343 /* Table10343 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10345 /* Table10345 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10347 /* Table10347 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10349 /* Table10349 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10351 /* Table10351 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10353 /* Table10353 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10355 /* Table10355 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10357 /* Table10357 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10359 /* Table10359 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10361 /* Table10361 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10453 /* Table10453 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10365 /* Table10365 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10367 /* Table10367 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10369 /* Table10369 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10371 /* Table10371 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10455 /* Table10455 */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10457 /* Table10457 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10459 /* Table10459 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10461 /* Table10461 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10463 /* Table10463 */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10383 /* Table10383 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10385 /* Table10385 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10387 /* Table10387 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10389 /* Table10389 */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10465 /* Table10465 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10467 /* Table10467 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10395 /* Table10395 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10397 /* Table10397 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10399 /* Table10399 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10469 /* Table10469 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10471 /* Table10471 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10473 /* Table10473 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10475 /* Table10475 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10409 /* Table10409 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10411 /* Table10411 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10413 /* Table10413 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10415 /* Table10415 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10477 /* Table10477 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10479 /* Table10479 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10481 /* Table10481 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10483 /* Table10483 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10485 /* Table10485 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10487 /* Table10487 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10489 /* Table10489 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10491 /* Table10491 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10493 /* Table10493 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10495 /* Table10495 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10497 /* Table10497 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10499 /* Table10499 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10501 /* Table10501 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10503 /* Table10503 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10505 /* Table10505 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10507 /* Table10507 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10449 /* Table10449 */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10509 /* Table10509 */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10511 /* Table10511 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10513 /* Table10513 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10515 /* Table10515 */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10517 /* Table10517 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10519 /* Table10519 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10347 /* Table10347 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10349 /* Table10349 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10521 /* Table10521 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10523 /* Table10523 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10525 /* Table10525 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10527 /* Table10527 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10529 /* Table10529 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10531 /* Table10531 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10533 /* Table10533 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10535 /* Table10535 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10537 /* Table10537 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10539 /* Table10539 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10541 /* Table10541 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10543 /* Table10543 */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10545 /* Table10545 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10547 /* Table10547 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10549 /* Table10549 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10551 /* Table10551 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10553 /* Table10553 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10555 /* Table10555 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10557 /* Table10557 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10559 /* Table10559 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10561 /* Table10561 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10563 /* Table10563 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10565 /* Table10565 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10421 /* Table10421 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10423 /* Table10423 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10567 /* Table10567 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10569 /* Table10569 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10429 /* Table10429 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10431 /* Table10431 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10571 /* Table10571 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10573 /* Table10573 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10437 /* Table10437 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10439 /* Table10439 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10575 /* Table10575 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10577 /* Table10577 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10445 /* Table10445 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10447 /* Table10447 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10579 /* Table10579 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10581 /* Table10581 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10509 /* Table10509 */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10511 /* Table10511 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10513 /* Table10513 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10515 /* Table10515 */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10517 /* Table10517 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10519 /* Table10519 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10347 /* Table10347 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10349 /* Table10349 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10521 /* Table10521 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10523 /* Table10523 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10525 /* Table10525 */ }, /* 0x0f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10527 /* Table10527 */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10529 /* Table10529 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10531 /* Table10531 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10533 /* Table10533 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10535 /* Table10535 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10537 /* Table10537 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10539 /* Table10539 */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10541 /* Table10541 */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10543 /* Table10543 */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10583 /* Table10583 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10585 /* Table10585 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10549 /* Table10549 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10551 /* Table10551 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10553 /* Table10553 */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10587 /* Table10587 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10589 /* Table10589 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10591 /* Table10591 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10593 /* Table10593 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10595 /* Table10595 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10597 /* Table10597 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10481 /* Table10481 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10483 /* Table10483 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10599 /* Table10599 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10601 /* Table10601 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10489 /* Table10489 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10491 /* Table10491 */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10603 /* Table10603 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10605 /* Table10605 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10497 /* Table10497 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10499 /* Table10499 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10607 /* Table10607 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10609 /* Table10609 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10505 /* Table10505 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10507 /* Table10507 */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10611 /* Table10611 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10613 /* Table10613 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10615 /* Table10615 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10617 /* Table10617 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10619 /* Table10619 */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10621 /* Table10621 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10623 /* Table10623 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10611 /* Table10611 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10625 /* Table10625 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10613 /* Table10613 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10627 /* Table10627 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10629 /* Table10629 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10619 /* Table10619 */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10631 /* Table10631 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10633 /* Table10633 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10635 /* Table10635 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10637 /* Table10637 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10639 /* Table10639 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10641 /* Table10641 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10611 /* Table10611 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10613 /* Table10613 */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10643 /* Table10643 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10645 /* Table10645 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10619 /* Table10619 */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10647 /* Table10647 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10649 /* Table10649 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10651 /* Table10651 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10653 /* Table10653 */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10655 /* Table10655 */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10657 /* Table10657 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10659 /* Table10659 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10661 /* Table10661 */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10663 /* Table10663 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10665 /* Table10665 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10667 /* Table10667 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10669 /* Table10669 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10671 /* Table10671 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10673 /* Table10673 */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10675 /* Table10675 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10677 /* Table10677 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10679 /* Table10679 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10681 /* Table10681 */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10683 /* Table10683 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10685 /* Table10685 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10687 /* Table10687 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10689 /* Table10689 */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10691 /* Table10691 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10693 /* Table10693 */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10695 /* Table10695 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10697 /* Table10697 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10699 /* Table10699 */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10701 /* Table10701 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10703 /* Table10703 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10705 /* Table10705 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10707 /* Table10707 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10709 /* Table10709 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10711 /* Table10711 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10713 /* Table10713 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10715 /* Table10715 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10717 /* Table10717 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10719 /* Table10719 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10721 /* Table10721 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10723 /* Table10723 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10725 /* Table10725 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10727 /* Table10727 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10729 /* Table10729 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10731 /* Table10731 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10733 /* Table10733 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10735 /* Table10735 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10737 /* Table10737 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10739 /* Table10739 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10741 /* Table10741 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10743 /* Table10743 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10745 /* Table10745 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10747 /* Table10747 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10749 /* Table10749 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10751 /* Table10751 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10753 /* Table10753 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10755 /* Table10755 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10757 /* Table10757 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_K */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10759 /* Table10759 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10761 /* Table10761 */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10763 /* Table10763 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10765 /* Table10765 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10767 /* Table10767 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10769 /* Table10769 */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10771 /* Table10771 */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10773 /* Table10773 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10775 /* Table10775 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10777 /* Table10777 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10779 /* Table10779 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10781 /* Table10781 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10783 /* Table10783 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10785 /* Table10785 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10787 /* Table10787 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10789 /* Table10789 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10791 /* Table10791 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10793 /* Table10793 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10795 /* Table10795 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10797 /* Table10797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10799 /* Table10799 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10801 /* Table10801 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10803 /* Table10803 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10805 /* Table10805 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10807 /* Table10807 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10809 /* Table10809 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10811 /* Table10811 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10813 /* Table10813 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10815 /* Table10815 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10817 /* Table10817 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10819 /* Table10819 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10821 /* Table10821 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10823 /* Table10823 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_K_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10825 /* Table10825 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10827 /* Table10827 */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10829 /* Table10829 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_KZ_B */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10831 /* Table10831 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10833 /* Table10833 */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10835 /* Table10835 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10837 /* Table10837 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10839 /* Table10839 */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10841 /* Table10841 */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_EVEX_L2_W_OPSIZE_KZ */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10843 /* Table10843 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10845 /* Table10845 */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10847 /* Table10847 */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } }, /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerThreeByte3AOpcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 0, 0, 8, 9, 10, 11, 12, 13, 14, 0, 0, 15, 16, 17, 0, 0, 18, 19, 0, 0, 20, 21, 0, 0, 0, 22, 0, 0, 0, 23, 0, 0, 0, 24, 0, 0, 0, 25, 0, 0, 0, 26, 0, 0, 0, 27, 0, 0, 0, 28, 0, 0, 0, 29, 0, 0, 0, 30, 0, 0, 0, 31, 0, 0, 0, 32, 0, 0, 0, 33, 0, 0, 0, 34, 0, 0, 0, 35, 0, 0, 0, 36, 0, 0, 0, 37, 0, 0, 0, 38, 0, 0, 0, 39, 0, 0, 0, 40, 0, 0, 0, 41, 0, 0, 0, 42, 0, 0, 0, 43, 0, 0, 0, 44, 0, 0, 0, 45, 0, 0, 0, 46, 0, 0, 0, 47, 0, 0, 0, 48, 0, 0, 0, 49, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 0, 0, 0, 51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 52, 0, 0, 0, 53, }; static const struct OpcodeDecision x86DisassemblerXOP8Opcodes[] = { /* IC_VEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10849 /* Table10849 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10851 /* Table10851 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10853 /* Table10853 */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10855 /* Table10855 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10857 /* Table10857 */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10859 /* Table10859 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10861 /* Table10861 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10863 /* Table10863 */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10865 /* Table10865 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10867 /* Table10867 */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10869 /* Table10869 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10871 /* Table10871 */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10873 /* Table10873 */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10875 /* Table10875 */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10877 /* Table10877 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10879 /* Table10879 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10881 /* Table10881 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10883 /* Table10883 */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10885 /* Table10885 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10887 /* Table10887 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10889 /* Table10889 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10891 /* Table10891 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10893 /* Table10893 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10895 /* Table10895 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10897 /* Table10897 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10899 /* Table10899 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10849 /* Table10849 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10851 /* Table10851 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10853 /* Table10853 */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10855 /* Table10855 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10857 /* Table10857 */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10859 /* Table10859 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10861 /* Table10861 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10863 /* Table10863 */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10865 /* Table10865 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10867 /* Table10867 */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10901 /* Table10901 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10903 /* Table10903 */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10873 /* Table10873 */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10875 /* Table10875 */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10877 /* Table10877 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10879 /* Table10879 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10881 /* Table10881 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10883 /* Table10883 */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10885 /* Table10885 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10887 /* Table10887 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10889 /* Table10889 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10891 /* Table10891 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10893 /* Table10893 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10895 /* Table10895 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10897 /* Table10897 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10899 /* Table10899 */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10905 /* Table10905 */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10907 /* Table10907 */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerXOP8Opcodes[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerXOP9Opcodes[] = { /* IC_VEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 10909 /* Table10909 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 10925 /* Table10925 */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10941 /* Table10941 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10943 /* Table10943 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10945 /* Table10945 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10947 /* Table10947 */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10949 /* Table10949 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10951 /* Table10951 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10953 /* Table10953 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10955 /* Table10955 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10957 /* Table10957 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10959 /* Table10959 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10961 /* Table10961 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10963 /* Table10963 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10965 /* Table10965 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10967 /* Table10967 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10969 /* Table10969 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10971 /* Table10971 */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10973 /* Table10973 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10975 /* Table10975 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10977 /* Table10977 */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10979 /* Table10979 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10981 /* Table10981 */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10983 /* Table10983 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10985 /* Table10985 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10987 /* Table10987 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10989 /* Table10989 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10991 /* Table10991 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10993 /* Table10993 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10995 /* Table10995 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10997 /* Table10997 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10999 /* Table10999 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11001 /* Table11001 */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11003 /* Table11003 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11019 /* Table11019 */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10941 /* Table10941 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10943 /* Table10943 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10945 /* Table10945 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10947 /* Table10947 */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11035 /* Table11035 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11037 /* Table11037 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11039 /* Table11039 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11041 /* Table11041 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11043 /* Table11043 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11045 /* Table11045 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11047 /* Table11047 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11049 /* Table11049 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11051 /* Table11051 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11053 /* Table11053 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11055 /* Table11055 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11057 /* Table11057 */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10973 /* Table10973 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10975 /* Table10975 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10977 /* Table10977 */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10979 /* Table10979 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10981 /* Table10981 */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10983 /* Table10983 */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10985 /* Table10985 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10987 /* Table10987 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10989 /* Table10989 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10991 /* Table10991 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10993 /* Table10993 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10995 /* Table10995 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10997 /* Table10997 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 10999 /* Table10999 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11001 /* Table11001 */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11059 /* Table11059 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11061 /* Table11061 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_L_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11059 /* Table11059 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11061 /* Table11061 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerXOP9Opcodes[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerXOPAOpcodes[] = { /* IC_VEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11063 /* Table11063 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11065 /* Table11065 */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerXOPAOpcodes[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerT3DNOWOpcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11084 /* Table11084 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11086 /* Table11086 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11088 /* Table11088 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11090 /* Table11090 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11092 /* Table11092 */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11094 /* Table11094 */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11096 /* Table11096 */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11098 /* Table11098 */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11100 /* Table11100 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11102 /* Table11102 */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11104 /* Table11104 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11106 /* Table11106 */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11108 /* Table11108 */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11110 /* Table11110 */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11112 /* Table11112 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11114 /* Table11114 */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11116 /* Table11116 */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11118 /* Table11118 */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11120 /* Table11120 */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11122 /* Table11122 */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11124 /* Table11124 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11126 /* Table11126 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11128 /* Table11128 */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 11130 /* Table11130 */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_SPLITREG, 11067 /* Table11067 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11083 /* Table11083 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerT3DNOWOpcodes[] = { 1, 2, 3, 4, 5, 6, 7, 8, 0, 0, 9, 10, 11, 12, 13, 14, 15, 0, 0, 16, 17, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; capstone-sys-0.11.0/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc010066400017500001750000104677741363402546700243600ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * X86 Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ static const struct OpcodeDecision emptyTable = { { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } }; static const struct OperandSpecifier x86OperandSets[][6] = { { /* 0 */ { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 1 */ { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 2 */ { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 3 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 4 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 5 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 6 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 7 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 8 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 9 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 10 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 11 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 12 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 13 */ { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 14 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 15 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 16 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 17 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 18 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 19 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 20 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 21 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 22 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 23 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 24 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 25 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 26 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 27 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 28 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 29 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 30 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 31 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 32 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 33 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 34 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 35 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 36 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 37 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 38 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 39 */ { ENCODING_RM, TYPE_R16 }, { ENCODING_REG, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 40 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 41 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_VVVV, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 42 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 43 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_VVVV, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 44 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 45 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 46 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 47 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 48 */ { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 49 */ { ENCODING_VVVV, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 50 */ { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 51 */ { ENCODING_VVVV, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 52 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 53 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 54 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_Rv, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 55 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RO, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 56 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 57 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 58 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 59 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 60 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 61 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 62 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 63 */ { ENCODING_ID, TYPE_REL64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 64 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 65 */ { ENCODING_IW, TYPE_REL16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 66 */ { ENCODING_ID, TYPE_REL32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 67 */ { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 68 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 69 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_ID, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 70 */ { ENCODING_RM, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 71 */ { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 72 */ { ENCODING_RM, TYPE_R8 }, { ENCODING_REG, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 73 */ { ENCODING_REG, TYPE_R8 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 74 */ { ENCODING_DI, TYPE_DSTIDX8 }, { ENCODING_SI, TYPE_SRCIDX8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 75 */ { ENCODING_DI, TYPE_DSTIDX32 }, { ENCODING_SI, TYPE_SRCIDX32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 76 */ { ENCODING_DI, TYPE_DSTIDX64 }, { ENCODING_SI, TYPE_SRCIDX64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 77 */ { ENCODING_DI, TYPE_DSTIDX16 }, { ENCODING_SI, TYPE_SRCIDX16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 78 */ { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 79 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 80 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 81 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 82 */ { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 83 */ { ENCODING_IW, TYPE_IMM16 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 84 */ { ENCODING_Iv, TYPE_IMMv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 85 */ { ENCODING_RM, TYPE_M1616 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 86 */ { ENCODING_Iv, TYPE_IMMv }, { ENCODING_IW, TYPE_IMM16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 87 */ { ENCODING_RM, TYPE_M1632 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 88 */ { ENCODING_RM, TYPE_M1664 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 89 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 90 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 91 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 92 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 93 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 94 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 95 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 96 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 97 */ { ENCODING_DI, TYPE_DSTIDX8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 98 */ { ENCODING_DI, TYPE_DSTIDX32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 99 */ { ENCODING_DI, TYPE_DSTIDX16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 100 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 101 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M128 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 102 */ { ENCODING_IB, TYPE_REL8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 103 */ { ENCODING_Iv, TYPE_RELv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 104 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 105 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M1616 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 106 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M1632 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 107 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 108 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_LEA }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 109 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_LEA }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 110 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M1664 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 111 */ { ENCODING_RM, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 112 */ { ENCODING_SI, TYPE_SRCIDX8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 113 */ { ENCODING_SI, TYPE_SRCIDX32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 114 */ { ENCODING_SI, TYPE_SRCIDX64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 115 */ { ENCODING_SI, TYPE_SRCIDX16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 116 */ { ENCODING_IW, TYPE_IMM16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 117 */ { ENCODING_Ia, TYPE_MOFFS16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 118 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 119 */ { ENCODING_Rv, TYPE_Rv }, { ENCODING_Iv, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 120 */ { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 121 */ { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_RM, TYPE_Mv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 122 */ { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_RM, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 123 */ { ENCODING_Ia, TYPE_MOFFS32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 124 */ { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 125 */ { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 126 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 127 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 128 */ { ENCODING_Ia, TYPE_MOFFS64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 129 */ { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 130 */ { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 131 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_CONTROLREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 132 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_DEBUGREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 133 */ { ENCODING_RO, TYPE_R64 }, { ENCODING_IO, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 134 */ { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 135 */ { ENCODING_REG, TYPE_SEGMENTREG }, { ENCODING_RM, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 136 */ { ENCODING_Ia, TYPE_MOFFS8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 137 */ { ENCODING_RB, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 138 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 139 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 140 */ { ENCODING_REG, TYPE_Rv }, { ENCODING_RM, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 141 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_M8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 142 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R16 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 143 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 144 */ { ENCODING_Rv, TYPE_Rv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 145 */ { ENCODING_RO, TYPE_R64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 146 */ { ENCODING_IB, TYPE_IMMv }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 147 */ { ENCODING_IB, TYPE_IMM32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 148 */ { ENCODING_IB, TYPE_IMM64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 149 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 150 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 151 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 152 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 153 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 154 */ { ENCODING_REG, TYPE_R32 }, { ENCODING_RM, TYPE_R32 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 155 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_Mv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 156 */ { ENCODING_REG, TYPE_R64 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 157 */ { ENCODING_DI, TYPE_DSTIDX64 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 158 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 159 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_Rv }, { ENCODING_REG, TYPE_Rv }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 160 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 161 */ { ENCODING_DUP, TYPE_DUP1 }, { ENCODING_RM, TYPE_R64 }, { ENCODING_REG, TYPE_R64 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 162 */ { ENCODING_RM, TYPE_Mv }, { ENCODING_REG, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 163 */ { ENCODING_RM, TYPE_R32 }, { ENCODING_REG, TYPE_R32 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 164 */ { ENCODING_RM, TYPE_M512 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, }; static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1714] = { { /* 0 */ 0, /* */ }, { /* 1 */ 0, /* */ }, { /* 2 */ 0, /* */ }, { /* 3 */ 0, /* */ }, { /* 4 */ 0, /* */ }, { /* 5 */ 0, /* */ }, { /* 6 */ 0, /* */ }, { /* 7 */ 0, /* */ }, { /* 8 */ 0, /* */ }, { /* 9 */ 0, /* */ }, { /* 10 */ 0, /* */ }, { /* 11 */ 0, /* */ }, { /* 12 */ 0, /* */ }, { /* 13 */ 0, /* */ }, { /* 14 */ 0, /* */ }, { /* 15 */ 0, /* */ }, { /* 16 */ 0, /* */ }, { /* 17 */ 0, /* */ }, { /* 18 */ 0, /* */ }, { /* 19 */ 0, /* */ }, { /* 20 */ 0, /* */ }, { /* 21 */ 0, /* */ }, { /* 22 */ 0, /* AAA */ }, { /* 23 */ 1, /* AAD8i8 */ }, { /* 24 */ 1, /* AAM8i8 */ }, { /* 25 */ 0, /* AAS */ }, { /* 26 */ 0, /* */ }, { /* 27 */ 0, /* */ }, { /* 28 */ 0, /* */ }, { /* 29 */ 0, /* */ }, { /* 30 */ 2, /* ADC16i16 */ }, { /* 31 */ 3, /* ADC16mi */ }, { /* 32 */ 4, /* ADC16mi8 */ }, { /* 33 */ 5, /* ADC16mr */ }, { /* 34 */ 6, /* ADC16ri */ }, { /* 35 */ 7, /* ADC16ri8 */ }, { /* 36 */ 8, /* ADC16rm */ }, { /* 37 */ 9, /* ADC16rr */ }, { /* 38 */ 10, /* ADC16rr_REV */ }, { /* 39 */ 2, /* ADC32i32 */ }, { /* 40 */ 3, /* ADC32mi */ }, { /* 41 */ 11, /* ADC32mi8 */ }, { /* 42 */ 5, /* ADC32mr */ }, { /* 43 */ 6, /* ADC32ri */ }, { /* 44 */ 12, /* ADC32ri8 */ }, { /* 45 */ 8, /* ADC32rm */ }, { /* 46 */ 9, /* ADC32rr */ }, { /* 47 */ 10, /* ADC32rr_REV */ }, { /* 48 */ 13, /* ADC64i32 */ }, { /* 49 */ 14, /* ADC64mi32 */ }, { /* 50 */ 15, /* ADC64mi8 */ }, { /* 51 */ 16, /* ADC64mr */ }, { /* 52 */ 17, /* ADC64ri32 */ }, { /* 53 */ 18, /* ADC64ri8 */ }, { /* 54 */ 19, /* ADC64rm */ }, { /* 55 */ 20, /* ADC64rr */ }, { /* 56 */ 21, /* ADC64rr_REV */ }, { /* 57 */ 1, /* ADC8i8 */ }, { /* 58 */ 22, /* ADC8mi */ }, { /* 59 */ 22, /* ADC8mi8 */ }, { /* 60 */ 23, /* ADC8mr */ }, { /* 61 */ 24, /* ADC8ri */ }, { /* 62 */ 24, /* ADC8ri8 */ }, { /* 63 */ 25, /* ADC8rm */ }, { /* 64 */ 26, /* ADC8rr */ }, { /* 65 */ 27, /* ADC8rr_REV */ }, { /* 66 */ 28, /* ADCX32rm */ }, { /* 67 */ 29, /* ADCX32rr */ }, { /* 68 */ 19, /* ADCX64rm */ }, { /* 69 */ 21, /* ADCX64rr */ }, { /* 70 */ 2, /* ADD16i16 */ }, { /* 71 */ 3, /* ADD16mi */ }, { /* 72 */ 4, /* ADD16mi8 */ }, { /* 73 */ 5, /* ADD16mr */ }, { /* 74 */ 6, /* ADD16ri */ }, { /* 75 */ 7, /* ADD16ri8 */ }, { /* 76 */ 0, /* */ }, { /* 77 */ 0, /* */ }, { /* 78 */ 8, /* ADD16rm */ }, { /* 79 */ 9, /* ADD16rr */ }, { /* 80 */ 0, /* */ }, { /* 81 */ 10, /* ADD16rr_REV */ }, { /* 82 */ 2, /* ADD32i32 */ }, { /* 83 */ 3, /* ADD32mi */ }, { /* 84 */ 11, /* ADD32mi8 */ }, { /* 85 */ 5, /* ADD32mr */ }, { /* 86 */ 6, /* ADD32ri */ }, { /* 87 */ 12, /* ADD32ri8 */ }, { /* 88 */ 0, /* */ }, { /* 89 */ 0, /* */ }, { /* 90 */ 8, /* ADD32rm */ }, { /* 91 */ 9, /* ADD32rr */ }, { /* 92 */ 0, /* */ }, { /* 93 */ 10, /* ADD32rr_REV */ }, { /* 94 */ 13, /* ADD64i32 */ }, { /* 95 */ 14, /* ADD64mi32 */ }, { /* 96 */ 15, /* ADD64mi8 */ }, { /* 97 */ 16, /* ADD64mr */ }, { /* 98 */ 17, /* ADD64ri32 */ }, { /* 99 */ 0, /* */ }, { /* 100 */ 18, /* ADD64ri8 */ }, { /* 101 */ 0, /* */ }, { /* 102 */ 19, /* ADD64rm */ }, { /* 103 */ 20, /* ADD64rr */ }, { /* 104 */ 0, /* */ }, { /* 105 */ 21, /* ADD64rr_REV */ }, { /* 106 */ 1, /* ADD8i8 */ }, { /* 107 */ 22, /* ADD8mi */ }, { /* 108 */ 22, /* ADD8mi8 */ }, { /* 109 */ 23, /* ADD8mr */ }, { /* 110 */ 24, /* ADD8ri */ }, { /* 111 */ 24, /* ADD8ri8 */ }, { /* 112 */ 25, /* ADD8rm */ }, { /* 113 */ 26, /* ADD8rr */ }, { /* 114 */ 27, /* ADD8rr_REV */ }, { /* 115 */ 0, /* */ }, { /* 116 */ 0, /* */ }, { /* 117 */ 0, /* */ }, { /* 118 */ 0, /* */ }, { /* 119 */ 30, /* ADOX32rm */ }, { /* 120 */ 31, /* ADOX32rr */ }, { /* 121 */ 32, /* ADOX64rm */ }, { /* 122 */ 33, /* ADOX64rr */ }, { /* 123 */ 2, /* AND16i16 */ }, { /* 124 */ 3, /* AND16mi */ }, { /* 125 */ 4, /* AND16mi8 */ }, { /* 126 */ 5, /* AND16mr */ }, { /* 127 */ 6, /* AND16ri */ }, { /* 128 */ 7, /* AND16ri8 */ }, { /* 129 */ 8, /* AND16rm */ }, { /* 130 */ 9, /* AND16rr */ }, { /* 131 */ 10, /* AND16rr_REV */ }, { /* 132 */ 2, /* AND32i32 */ }, { /* 133 */ 3, /* AND32mi */ }, { /* 134 */ 11, /* AND32mi8 */ }, { /* 135 */ 5, /* AND32mr */ }, { /* 136 */ 6, /* AND32ri */ }, { /* 137 */ 12, /* AND32ri8 */ }, { /* 138 */ 8, /* AND32rm */ }, { /* 139 */ 9, /* AND32rr */ }, { /* 140 */ 10, /* AND32rr_REV */ }, { /* 141 */ 13, /* AND64i32 */ }, { /* 142 */ 14, /* AND64mi32 */ }, { /* 143 */ 15, /* AND64mi8 */ }, { /* 144 */ 16, /* AND64mr */ }, { /* 145 */ 17, /* AND64ri32 */ }, { /* 146 */ 18, /* AND64ri8 */ }, { /* 147 */ 19, /* AND64rm */ }, { /* 148 */ 20, /* AND64rr */ }, { /* 149 */ 21, /* AND64rr_REV */ }, { /* 150 */ 1, /* AND8i8 */ }, { /* 151 */ 22, /* AND8mi */ }, { /* 152 */ 22, /* AND8mi8 */ }, { /* 153 */ 23, /* AND8mr */ }, { /* 154 */ 24, /* AND8ri */ }, { /* 155 */ 24, /* AND8ri8 */ }, { /* 156 */ 25, /* AND8rm */ }, { /* 157 */ 26, /* AND8rr */ }, { /* 158 */ 27, /* AND8rr_REV */ }, { /* 159 */ 34, /* ANDN32rm */ }, { /* 160 */ 35, /* ANDN32rr */ }, { /* 161 */ 36, /* ANDN64rm */ }, { /* 162 */ 37, /* ANDN64rr */ }, { /* 163 */ 38, /* ARPL16mr */ }, { /* 164 */ 39, /* ARPL16rr */ }, { /* 165 */ 40, /* BEXTR32rm */ }, { /* 166 */ 41, /* BEXTR32rr */ }, { /* 167 */ 42, /* BEXTR64rm */ }, { /* 168 */ 43, /* BEXTR64rr */ }, { /* 169 */ 44, /* BEXTRI32mi */ }, { /* 170 */ 45, /* BEXTRI32ri */ }, { /* 171 */ 46, /* BEXTRI64mi */ }, { /* 172 */ 47, /* BEXTRI64ri */ }, { /* 173 */ 48, /* BLCFILL32rm */ }, { /* 174 */ 49, /* BLCFILL32rr */ }, { /* 175 */ 50, /* BLCFILL64rm */ }, { /* 176 */ 51, /* BLCFILL64rr */ }, { /* 177 */ 48, /* BLCI32rm */ }, { /* 178 */ 49, /* BLCI32rr */ }, { /* 179 */ 50, /* BLCI64rm */ }, { /* 180 */ 51, /* BLCI64rr */ }, { /* 181 */ 48, /* BLCIC32rm */ }, { /* 182 */ 49, /* BLCIC32rr */ }, { /* 183 */ 50, /* BLCIC64rm */ }, { /* 184 */ 51, /* BLCIC64rr */ }, { /* 185 */ 48, /* BLCMSK32rm */ }, { /* 186 */ 49, /* BLCMSK32rr */ }, { /* 187 */ 50, /* BLCMSK64rm */ }, { /* 188 */ 51, /* BLCMSK64rr */ }, { /* 189 */ 48, /* BLCS32rm */ }, { /* 190 */ 49, /* BLCS32rr */ }, { /* 191 */ 50, /* BLCS64rm */ }, { /* 192 */ 51, /* BLCS64rr */ }, { /* 193 */ 48, /* BLSFILL32rm */ }, { /* 194 */ 49, /* BLSFILL32rr */ }, { /* 195 */ 50, /* BLSFILL64rm */ }, { /* 196 */ 51, /* BLSFILL64rr */ }, { /* 197 */ 48, /* BLSI32rm */ }, { /* 198 */ 49, /* BLSI32rr */ }, { /* 199 */ 50, /* BLSI64rm */ }, { /* 200 */ 51, /* BLSI64rr */ }, { /* 201 */ 48, /* BLSIC32rm */ }, { /* 202 */ 49, /* BLSIC32rr */ }, { /* 203 */ 50, /* BLSIC64rm */ }, { /* 204 */ 51, /* BLSIC64rr */ }, { /* 205 */ 48, /* BLSMSK32rm */ }, { /* 206 */ 49, /* BLSMSK32rr */ }, { /* 207 */ 50, /* BLSMSK64rm */ }, { /* 208 */ 51, /* BLSMSK64rr */ }, { /* 209 */ 48, /* BLSR32rm */ }, { /* 210 */ 49, /* BLSR32rr */ }, { /* 211 */ 50, /* BLSR64rm */ }, { /* 212 */ 51, /* BLSR64rr */ }, { /* 213 */ 52, /* BOUNDS16rm */ }, { /* 214 */ 52, /* BOUNDS32rm */ }, { /* 215 */ 52, /* BSF16rm */ }, { /* 216 */ 53, /* BSF16rr */ }, { /* 217 */ 52, /* BSF32rm */ }, { /* 218 */ 53, /* BSF32rr */ }, { /* 219 */ 32, /* BSF64rm */ }, { /* 220 */ 33, /* BSF64rr */ }, { /* 221 */ 52, /* BSR16rm */ }, { /* 222 */ 53, /* BSR16rr */ }, { /* 223 */ 52, /* BSR32rm */ }, { /* 224 */ 53, /* BSR32rr */ }, { /* 225 */ 32, /* BSR64rm */ }, { /* 226 */ 33, /* BSR64rr */ }, { /* 227 */ 54, /* BSWAP32r */ }, { /* 228 */ 55, /* BSWAP64r */ }, { /* 229 */ 4, /* BT16mi8 */ }, { /* 230 */ 5, /* BT16mr */ }, { /* 231 */ 56, /* BT16ri8 */ }, { /* 232 */ 57, /* BT16rr */ }, { /* 233 */ 11, /* BT32mi8 */ }, { /* 234 */ 5, /* BT32mr */ }, { /* 235 */ 58, /* BT32ri8 */ }, { /* 236 */ 57, /* BT32rr */ }, { /* 237 */ 15, /* BT64mi8 */ }, { /* 238 */ 16, /* BT64mr */ }, { /* 239 */ 59, /* BT64ri8 */ }, { /* 240 */ 60, /* BT64rr */ }, { /* 241 */ 4, /* BTC16mi8 */ }, { /* 242 */ 5, /* BTC16mr */ }, { /* 243 */ 56, /* BTC16ri8 */ }, { /* 244 */ 57, /* BTC16rr */ }, { /* 245 */ 11, /* BTC32mi8 */ }, { /* 246 */ 5, /* BTC32mr */ }, { /* 247 */ 58, /* BTC32ri8 */ }, { /* 248 */ 57, /* BTC32rr */ }, { /* 249 */ 15, /* BTC64mi8 */ }, { /* 250 */ 16, /* BTC64mr */ }, { /* 251 */ 59, /* BTC64ri8 */ }, { /* 252 */ 60, /* BTC64rr */ }, { /* 253 */ 4, /* BTR16mi8 */ }, { /* 254 */ 5, /* BTR16mr */ }, { /* 255 */ 56, /* BTR16ri8 */ }, { /* 256 */ 57, /* BTR16rr */ }, { /* 257 */ 11, /* BTR32mi8 */ }, { /* 258 */ 5, /* BTR32mr */ }, { /* 259 */ 58, /* BTR32ri8 */ }, { /* 260 */ 57, /* BTR32rr */ }, { /* 261 */ 15, /* BTR64mi8 */ }, { /* 262 */ 16, /* BTR64mr */ }, { /* 263 */ 59, /* BTR64ri8 */ }, { /* 264 */ 60, /* BTR64rr */ }, { /* 265 */ 4, /* BTS16mi8 */ }, { /* 266 */ 5, /* BTS16mr */ }, { /* 267 */ 56, /* BTS16ri8 */ }, { /* 268 */ 57, /* BTS16rr */ }, { /* 269 */ 11, /* BTS32mi8 */ }, { /* 270 */ 5, /* BTS32mr */ }, { /* 271 */ 58, /* BTS32ri8 */ }, { /* 272 */ 57, /* BTS32rr */ }, { /* 273 */ 15, /* BTS64mi8 */ }, { /* 274 */ 16, /* BTS64mr */ }, { /* 275 */ 59, /* BTS64ri8 */ }, { /* 276 */ 60, /* BTS64rr */ }, { /* 277 */ 40, /* BZHI32rm */ }, { /* 278 */ 41, /* BZHI32rr */ }, { /* 279 */ 42, /* BZHI64rm */ }, { /* 280 */ 43, /* BZHI64rr */ }, { /* 281 */ 61, /* CALL16m */ }, { /* 282 */ 62, /* CALL16r */ }, { /* 283 */ 61, /* CALL32m */ }, { /* 284 */ 62, /* CALL32r */ }, { /* 285 */ 61, /* CALL64m */ }, { /* 286 */ 63, /* CALL64pcrel32 */ }, { /* 287 */ 64, /* CALL64r */ }, { /* 288 */ 65, /* CALLpcrel16 */ }, { /* 289 */ 66, /* CALLpcrel32 */ }, { /* 290 */ 0, /* CBW */ }, { /* 291 */ 0, /* CDQ */ }, { /* 292 */ 0, /* CDQE */ }, { /* 293 */ 0, /* CLAC */ }, { /* 294 */ 0, /* CLC */ }, { /* 295 */ 0, /* CLD */ }, { /* 296 */ 67, /* CLFLUSHOPT */ }, { /* 297 */ 0, /* CLGI */ }, { /* 298 */ 0, /* CLI */ }, { /* 299 */ 0, /* CLTS */ }, { /* 300 */ 67, /* CLWB */ }, { /* 301 */ 0, /* CMC */ }, { /* 302 */ 8, /* CMOVA16rm */ }, { /* 303 */ 10, /* CMOVA16rr */ }, { /* 304 */ 8, /* CMOVA32rm */ }, { /* 305 */ 10, /* CMOVA32rr */ }, { /* 306 */ 19, /* CMOVA64rm */ }, { /* 307 */ 21, /* CMOVA64rr */ }, { /* 308 */ 8, /* CMOVAE16rm */ }, { /* 309 */ 10, /* CMOVAE16rr */ }, { /* 310 */ 8, /* CMOVAE32rm */ }, { /* 311 */ 10, /* CMOVAE32rr */ }, { /* 312 */ 19, /* CMOVAE64rm */ }, { /* 313 */ 21, /* CMOVAE64rr */ }, { /* 314 */ 8, /* CMOVB16rm */ }, { /* 315 */ 10, /* CMOVB16rr */ }, { /* 316 */ 8, /* CMOVB32rm */ }, { /* 317 */ 10, /* CMOVB32rr */ }, { /* 318 */ 19, /* CMOVB64rm */ }, { /* 319 */ 21, /* CMOVB64rr */ }, { /* 320 */ 8, /* CMOVBE16rm */ }, { /* 321 */ 10, /* CMOVBE16rr */ }, { /* 322 */ 8, /* CMOVBE32rm */ }, { /* 323 */ 10, /* CMOVBE32rr */ }, { /* 324 */ 19, /* CMOVBE64rm */ }, { /* 325 */ 21, /* CMOVBE64rr */ }, { /* 326 */ 8, /* CMOVE16rm */ }, { /* 327 */ 10, /* CMOVE16rr */ }, { /* 328 */ 8, /* CMOVE32rm */ }, { /* 329 */ 10, /* CMOVE32rr */ }, { /* 330 */ 19, /* CMOVE64rm */ }, { /* 331 */ 21, /* CMOVE64rr */ }, { /* 332 */ 8, /* CMOVG16rm */ }, { /* 333 */ 10, /* CMOVG16rr */ }, { /* 334 */ 8, /* CMOVG32rm */ }, { /* 335 */ 10, /* CMOVG32rr */ }, { /* 336 */ 19, /* CMOVG64rm */ }, { /* 337 */ 21, /* CMOVG64rr */ }, { /* 338 */ 8, /* CMOVGE16rm */ }, { /* 339 */ 10, /* CMOVGE16rr */ }, { /* 340 */ 8, /* CMOVGE32rm */ }, { /* 341 */ 10, /* CMOVGE32rr */ }, { /* 342 */ 19, /* CMOVGE64rm */ }, { /* 343 */ 21, /* CMOVGE64rr */ }, { /* 344 */ 8, /* CMOVL16rm */ }, { /* 345 */ 10, /* CMOVL16rr */ }, { /* 346 */ 8, /* CMOVL32rm */ }, { /* 347 */ 10, /* CMOVL32rr */ }, { /* 348 */ 19, /* CMOVL64rm */ }, { /* 349 */ 21, /* CMOVL64rr */ }, { /* 350 */ 8, /* CMOVLE16rm */ }, { /* 351 */ 10, /* CMOVLE16rr */ }, { /* 352 */ 8, /* CMOVLE32rm */ }, { /* 353 */ 10, /* CMOVLE32rr */ }, { /* 354 */ 19, /* CMOVLE64rm */ }, { /* 355 */ 21, /* CMOVLE64rr */ }, { /* 356 */ 8, /* CMOVNE16rm */ }, { /* 357 */ 10, /* CMOVNE16rr */ }, { /* 358 */ 8, /* CMOVNE32rm */ }, { /* 359 */ 10, /* CMOVNE32rr */ }, { /* 360 */ 19, /* CMOVNE64rm */ }, { /* 361 */ 21, /* CMOVNE64rr */ }, { /* 362 */ 8, /* CMOVNO16rm */ }, { /* 363 */ 10, /* CMOVNO16rr */ }, { /* 364 */ 8, /* CMOVNO32rm */ }, { /* 365 */ 10, /* CMOVNO32rr */ }, { /* 366 */ 19, /* CMOVNO64rm */ }, { /* 367 */ 21, /* CMOVNO64rr */ }, { /* 368 */ 8, /* CMOVNP16rm */ }, { /* 369 */ 10, /* CMOVNP16rr */ }, { /* 370 */ 8, /* CMOVNP32rm */ }, { /* 371 */ 10, /* CMOVNP32rr */ }, { /* 372 */ 19, /* CMOVNP64rm */ }, { /* 373 */ 21, /* CMOVNP64rr */ }, { /* 374 */ 8, /* CMOVNS16rm */ }, { /* 375 */ 10, /* CMOVNS16rr */ }, { /* 376 */ 8, /* CMOVNS32rm */ }, { /* 377 */ 10, /* CMOVNS32rr */ }, { /* 378 */ 19, /* CMOVNS64rm */ }, { /* 379 */ 21, /* CMOVNS64rr */ }, { /* 380 */ 8, /* CMOVO16rm */ }, { /* 381 */ 10, /* CMOVO16rr */ }, { /* 382 */ 8, /* CMOVO32rm */ }, { /* 383 */ 10, /* CMOVO32rr */ }, { /* 384 */ 19, /* CMOVO64rm */ }, { /* 385 */ 21, /* CMOVO64rr */ }, { /* 386 */ 8, /* CMOVP16rm */ }, { /* 387 */ 10, /* CMOVP16rr */ }, { /* 388 */ 8, /* CMOVP32rm */ }, { /* 389 */ 10, /* CMOVP32rr */ }, { /* 390 */ 19, /* CMOVP64rm */ }, { /* 391 */ 21, /* CMOVP64rr */ }, { /* 392 */ 8, /* CMOVS16rm */ }, { /* 393 */ 10, /* CMOVS16rr */ }, { /* 394 */ 8, /* CMOVS32rm */ }, { /* 395 */ 10, /* CMOVS32rr */ }, { /* 396 */ 19, /* CMOVS64rm */ }, { /* 397 */ 21, /* CMOVS64rr */ }, { /* 398 */ 0, /* */ }, { /* 399 */ 0, /* */ }, { /* 400 */ 0, /* */ }, { /* 401 */ 0, /* */ }, { /* 402 */ 0, /* */ }, { /* 403 */ 0, /* */ }, { /* 404 */ 0, /* */ }, { /* 405 */ 0, /* */ }, { /* 406 */ 0, /* */ }, { /* 407 */ 0, /* */ }, { /* 408 */ 0, /* */ }, { /* 409 */ 0, /* */ }, { /* 410 */ 0, /* */ }, { /* 411 */ 0, /* */ }, { /* 412 */ 0, /* */ }, { /* 413 */ 0, /* */ }, { /* 414 */ 0, /* */ }, { /* 415 */ 2, /* CMP16i16 */ }, { /* 416 */ 3, /* CMP16mi */ }, { /* 417 */ 4, /* CMP16mi8 */ }, { /* 418 */ 5, /* CMP16mr */ }, { /* 419 */ 68, /* CMP16ri */ }, { /* 420 */ 56, /* CMP16ri8 */ }, { /* 421 */ 52, /* CMP16rm */ }, { /* 422 */ 57, /* CMP16rr */ }, { /* 423 */ 53, /* CMP16rr_REV */ }, { /* 424 */ 2, /* CMP32i32 */ }, { /* 425 */ 3, /* CMP32mi */ }, { /* 426 */ 11, /* CMP32mi8 */ }, { /* 427 */ 5, /* CMP32mr */ }, { /* 428 */ 68, /* CMP32ri */ }, { /* 429 */ 58, /* CMP32ri8 */ }, { /* 430 */ 52, /* CMP32rm */ }, { /* 431 */ 57, /* CMP32rr */ }, { /* 432 */ 53, /* CMP32rr_REV */ }, { /* 433 */ 13, /* CMP64i32 */ }, { /* 434 */ 14, /* CMP64mi32 */ }, { /* 435 */ 15, /* CMP64mi8 */ }, { /* 436 */ 16, /* CMP64mr */ }, { /* 437 */ 69, /* CMP64ri32 */ }, { /* 438 */ 59, /* CMP64ri8 */ }, { /* 439 */ 32, /* CMP64rm */ }, { /* 440 */ 60, /* CMP64rr */ }, { /* 441 */ 33, /* CMP64rr_REV */ }, { /* 442 */ 1, /* CMP8i8 */ }, { /* 443 */ 22, /* CMP8mi */ }, { /* 444 */ 22, /* CMP8mi8 */ }, { /* 445 */ 23, /* CMP8mr */ }, { /* 446 */ 70, /* CMP8ri */ }, { /* 447 */ 70, /* CMP8ri8 */ }, { /* 448 */ 71, /* CMP8rm */ }, { /* 449 */ 72, /* CMP8rr */ }, { /* 450 */ 73, /* CMP8rr_REV */ }, { /* 451 */ 74, /* CMPSB */ }, { /* 452 */ 75, /* CMPSL */ }, { /* 453 */ 76, /* CMPSQ */ }, { /* 454 */ 77, /* CMPSW */ }, { /* 455 */ 78, /* CMPXCHG16B */ }, { /* 456 */ 5, /* CMPXCHG16rm */ }, { /* 457 */ 57, /* CMPXCHG16rr */ }, { /* 458 */ 5, /* CMPXCHG32rm */ }, { /* 459 */ 57, /* CMPXCHG32rr */ }, { /* 460 */ 16, /* CMPXCHG64rm */ }, { /* 461 */ 60, /* CMPXCHG64rr */ }, { /* 462 */ 61, /* CMPXCHG8B */ }, { /* 463 */ 23, /* CMPXCHG8rm */ }, { /* 464 */ 72, /* CMPXCHG8rr */ }, { /* 465 */ 0, /* CPUID */ }, { /* 466 */ 0, /* CQO */ }, { /* 467 */ 0, /* CWD */ }, { /* 468 */ 0, /* CWDE */ }, { /* 469 */ 0, /* DAA */ }, { /* 470 */ 0, /* DAS */ }, { /* 471 */ 0, /* DATA16_PREFIX */ }, { /* 472 */ 61, /* DEC16m */ }, { /* 473 */ 79, /* DEC16r */ }, { /* 474 */ 54, /* DEC16r_alt */ }, { /* 475 */ 61, /* DEC32m */ }, { /* 476 */ 79, /* DEC32r */ }, { /* 477 */ 54, /* DEC32r_alt */ }, { /* 478 */ 61, /* DEC64m */ }, { /* 479 */ 80, /* DEC64r */ }, { /* 480 */ 67, /* DEC8m */ }, { /* 481 */ 81, /* DEC8r */ }, { /* 482 */ 61, /* DIV16m */ }, { /* 483 */ 62, /* DIV16r */ }, { /* 484 */ 61, /* DIV32m */ }, { /* 485 */ 62, /* DIV32r */ }, { /* 486 */ 61, /* DIV64m */ }, { /* 487 */ 64, /* DIV64r */ }, { /* 488 */ 67, /* DIV8m */ }, { /* 489 */ 82, /* DIV8r */ }, { /* 490 */ 0, /* */ }, { /* 491 */ 0, /* */ }, { /* 492 */ 0, /* */ }, { /* 493 */ 0, /* */ }, { /* 494 */ 0, /* */ }, { /* 495 */ 0, /* */ }, { /* 496 */ 0, /* */ }, { /* 497 */ 83, /* ENTER */ }, { /* 498 */ 84, /* FARCALL16i */ }, { /* 499 */ 85, /* FARCALL16m */ }, { /* 500 */ 86, /* FARCALL32i */ }, { /* 501 */ 87, /* FARCALL32m */ }, { /* 502 */ 88, /* FARCALL64 */ }, { /* 503 */ 84, /* FARJMP16i */ }, { /* 504 */ 85, /* FARJMP16m */ }, { /* 505 */ 86, /* FARJMP32i */ }, { /* 506 */ 87, /* FARJMP32m */ }, { /* 507 */ 88, /* FARJMP64 */ }, { /* 508 */ 0, /* FSETPM */ }, { /* 509 */ 0, /* GETSEC */ }, { /* 510 */ 0, /* HLT */ }, { /* 511 */ 61, /* IDIV16m */ }, { /* 512 */ 62, /* IDIV16r */ }, { /* 513 */ 61, /* IDIV32m */ }, { /* 514 */ 62, /* IDIV32r */ }, { /* 515 */ 61, /* IDIV64m */ }, { /* 516 */ 64, /* IDIV64r */ }, { /* 517 */ 67, /* IDIV8m */ }, { /* 518 */ 82, /* IDIV8r */ }, { /* 519 */ 61, /* IMUL16m */ }, { /* 520 */ 62, /* IMUL16r */ }, { /* 521 */ 8, /* IMUL16rm */ }, { /* 522 */ 89, /* IMUL16rmi */ }, { /* 523 */ 90, /* IMUL16rmi8 */ }, { /* 524 */ 10, /* IMUL16rr */ }, { /* 525 */ 91, /* IMUL16rri */ }, { /* 526 */ 92, /* IMUL16rri8 */ }, { /* 527 */ 61, /* IMUL32m */ }, { /* 528 */ 62, /* IMUL32r */ }, { /* 529 */ 8, /* IMUL32rm */ }, { /* 530 */ 89, /* IMUL32rmi */ }, { /* 531 */ 93, /* IMUL32rmi8 */ }, { /* 532 */ 10, /* IMUL32rr */ }, { /* 533 */ 91, /* IMUL32rri */ }, { /* 534 */ 94, /* IMUL32rri8 */ }, { /* 535 */ 61, /* IMUL64m */ }, { /* 536 */ 64, /* IMUL64r */ }, { /* 537 */ 19, /* IMUL64rm */ }, { /* 538 */ 46, /* IMUL64rmi32 */ }, { /* 539 */ 95, /* IMUL64rmi8 */ }, { /* 540 */ 21, /* IMUL64rr */ }, { /* 541 */ 47, /* IMUL64rri32 */ }, { /* 542 */ 96, /* IMUL64rri8 */ }, { /* 543 */ 67, /* IMUL8m */ }, { /* 544 */ 82, /* IMUL8r */ }, { /* 545 */ 1, /* IN16ri */ }, { /* 546 */ 0, /* IN16rr */ }, { /* 547 */ 1, /* IN32ri */ }, { /* 548 */ 0, /* IN32rr */ }, { /* 549 */ 1, /* IN8ri */ }, { /* 550 */ 0, /* IN8rr */ }, { /* 551 */ 61, /* INC16m */ }, { /* 552 */ 79, /* INC16r */ }, { /* 553 */ 54, /* INC16r_alt */ }, { /* 554 */ 61, /* INC32m */ }, { /* 555 */ 79, /* INC32r */ }, { /* 556 */ 54, /* INC32r_alt */ }, { /* 557 */ 61, /* INC64m */ }, { /* 558 */ 80, /* INC64r */ }, { /* 559 */ 67, /* INC8m */ }, { /* 560 */ 81, /* INC8r */ }, { /* 561 */ 97, /* INSB */ }, { /* 562 */ 98, /* INSL */ }, { /* 563 */ 99, /* INSW */ }, { /* 564 */ 1, /* INT */ }, { /* 565 */ 0, /* INT1 */ }, { /* 566 */ 0, /* INT3 */ }, { /* 567 */ 0, /* INTO */ }, { /* 568 */ 0, /* INVD */ }, { /* 569 */ 100, /* INVEPT32 */ }, { /* 570 */ 101, /* INVEPT64 */ }, { /* 571 */ 67, /* INVLPG */ }, { /* 572 */ 0, /* INVLPGA32 */ }, { /* 573 */ 0, /* INVLPGA64 */ }, { /* 574 */ 100, /* INVPCID32 */ }, { /* 575 */ 101, /* INVPCID64 */ }, { /* 576 */ 100, /* INVVPID32 */ }, { /* 577 */ 101, /* INVVPID64 */ }, { /* 578 */ 0, /* IRET16 */ }, { /* 579 */ 0, /* IRET32 */ }, { /* 580 */ 0, /* IRET64 */ }, { /* 581 */ 0, /* */ }, { /* 582 */ 102, /* JAE_1 */ }, { /* 583 */ 103, /* JAE_2 */ }, { /* 584 */ 103, /* JAE_4 */ }, { /* 585 */ 102, /* JA_1 */ }, { /* 586 */ 103, /* JA_2 */ }, { /* 587 */ 103, /* JA_4 */ }, { /* 588 */ 102, /* JBE_1 */ }, { /* 589 */ 103, /* JBE_2 */ }, { /* 590 */ 103, /* JBE_4 */ }, { /* 591 */ 102, /* JB_1 */ }, { /* 592 */ 103, /* JB_2 */ }, { /* 593 */ 103, /* JB_4 */ }, { /* 594 */ 102, /* JCXZ */ }, { /* 595 */ 102, /* JECXZ */ }, { /* 596 */ 102, /* JE_1 */ }, { /* 597 */ 103, /* JE_2 */ }, { /* 598 */ 103, /* JE_4 */ }, { /* 599 */ 102, /* JGE_1 */ }, { /* 600 */ 103, /* JGE_2 */ }, { /* 601 */ 103, /* JGE_4 */ }, { /* 602 */ 102, /* JG_1 */ }, { /* 603 */ 103, /* JG_2 */ }, { /* 604 */ 103, /* JG_4 */ }, { /* 605 */ 102, /* JLE_1 */ }, { /* 606 */ 103, /* JLE_2 */ }, { /* 607 */ 103, /* JLE_4 */ }, { /* 608 */ 102, /* JL_1 */ }, { /* 609 */ 103, /* JL_2 */ }, { /* 610 */ 103, /* JL_4 */ }, { /* 611 */ 61, /* JMP16m */ }, { /* 612 */ 62, /* JMP16r */ }, { /* 613 */ 61, /* JMP32m */ }, { /* 614 */ 62, /* JMP32r */ }, { /* 615 */ 61, /* JMP64m */ }, { /* 616 */ 64, /* JMP64r */ }, { /* 617 */ 102, /* JMP_1 */ }, { /* 618 */ 103, /* JMP_2 */ }, { /* 619 */ 103, /* JMP_4 */ }, { /* 620 */ 102, /* JNE_1 */ }, { /* 621 */ 103, /* JNE_2 */ }, { /* 622 */ 103, /* JNE_4 */ }, { /* 623 */ 102, /* JNO_1 */ }, { /* 624 */ 103, /* JNO_2 */ }, { /* 625 */ 103, /* JNO_4 */ }, { /* 626 */ 102, /* JNP_1 */ }, { /* 627 */ 103, /* JNP_2 */ }, { /* 628 */ 103, /* JNP_4 */ }, { /* 629 */ 102, /* JNS_1 */ }, { /* 630 */ 103, /* JNS_2 */ }, { /* 631 */ 103, /* JNS_4 */ }, { /* 632 */ 102, /* JO_1 */ }, { /* 633 */ 103, /* JO_2 */ }, { /* 634 */ 103, /* JO_4 */ }, { /* 635 */ 102, /* JP_1 */ }, { /* 636 */ 103, /* JP_2 */ }, { /* 637 */ 103, /* JP_4 */ }, { /* 638 */ 102, /* JRCXZ */ }, { /* 639 */ 102, /* JS_1 */ }, { /* 640 */ 103, /* JS_2 */ }, { /* 641 */ 103, /* JS_4 */ }, { /* 642 */ 0, /* LAHF */ }, { /* 643 */ 52, /* LAR16rm */ }, { /* 644 */ 53, /* LAR16rr */ }, { /* 645 */ 52, /* LAR32rm */ }, { /* 646 */ 53, /* LAR32rr */ }, { /* 647 */ 32, /* LAR64rm */ }, { /* 648 */ 104, /* LAR64rr */ }, { /* 649 */ 0, /* */ }, { /* 650 */ 0, /* */ }, { /* 651 */ 0, /* */ }, { /* 652 */ 0, /* */ }, { /* 653 */ 0, /* */ }, { /* 654 */ 0, /* */ }, { /* 655 */ 105, /* LDS16rm */ }, { /* 656 */ 106, /* LDS32rm */ }, { /* 657 */ 107, /* LEA16r */ }, { /* 658 */ 107, /* LEA32r */ }, { /* 659 */ 108, /* LEA64_32r */ }, { /* 660 */ 109, /* LEA64r */ }, { /* 661 */ 0, /* LEAVE */ }, { /* 662 */ 0, /* LEAVE64 */ }, { /* 663 */ 105, /* LES16rm */ }, { /* 664 */ 106, /* LES32rm */ }, { /* 665 */ 105, /* LFS16rm */ }, { /* 666 */ 106, /* LFS32rm */ }, { /* 667 */ 110, /* LFS64rm */ }, { /* 668 */ 87, /* LGDT16m */ }, { /* 669 */ 87, /* LGDT32m */ }, { /* 670 */ 88, /* LGDT64m */ }, { /* 671 */ 105, /* LGS16rm */ }, { /* 672 */ 106, /* LGS32rm */ }, { /* 673 */ 110, /* LGS64rm */ }, { /* 674 */ 87, /* LIDT16m */ }, { /* 675 */ 87, /* LIDT32m */ }, { /* 676 */ 88, /* LIDT64m */ }, { /* 677 */ 61, /* LLDT16m */ }, { /* 678 */ 111, /* LLDT16r */ }, { /* 679 */ 61, /* LMSW16m */ }, { /* 680 */ 111, /* LMSW16r */ }, { /* 681 */ 0, /* */ }, { /* 682 */ 0, /* */ }, { /* 683 */ 0, /* */ }, { /* 684 */ 0, /* */ }, { /* 685 */ 0, /* */ }, { /* 686 */ 0, /* */ }, { /* 687 */ 0, /* */ }, { /* 688 */ 0, /* */ }, { /* 689 */ 0, /* */ }, { /* 690 */ 0, /* */ }, { /* 691 */ 0, /* */ }, { /* 692 */ 0, /* */ }, { /* 693 */ 0, /* */ }, { /* 694 */ 0, /* */ }, { /* 695 */ 0, /* */ }, { /* 696 */ 0, /* */ }, { /* 697 */ 0, /* */ }, { /* 698 */ 0, /* */ }, { /* 699 */ 0, /* */ }, { /* 700 */ 0, /* */ }, { /* 701 */ 0, /* */ }, { /* 702 */ 0, /* */ }, { /* 703 */ 0, /* */ }, { /* 704 */ 0, /* */ }, { /* 705 */ 0, /* */ }, { /* 706 */ 0, /* */ }, { /* 707 */ 0, /* */ }, { /* 708 */ 0, /* */ }, { /* 709 */ 0, /* */ }, { /* 710 */ 0, /* */ }, { /* 711 */ 0, /* */ }, { /* 712 */ 0, /* */ }, { /* 713 */ 0, /* */ }, { /* 714 */ 0, /* */ }, { /* 715 */ 0, /* */ }, { /* 716 */ 0, /* */ }, { /* 717 */ 0, /* */ }, { /* 718 */ 0, /* */ }, { /* 719 */ 0, /* */ }, { /* 720 */ 0, /* */ }, { /* 721 */ 0, /* */ }, { /* 722 */ 0, /* LOCK_PREFIX */ }, { /* 723 */ 0, /* */ }, { /* 724 */ 0, /* */ }, { /* 725 */ 0, /* */ }, { /* 726 */ 0, /* */ }, { /* 727 */ 0, /* */ }, { /* 728 */ 0, /* */ }, { /* 729 */ 0, /* */ }, { /* 730 */ 0, /* */ }, { /* 731 */ 0, /* */ }, { /* 732 */ 0, /* */ }, { /* 733 */ 0, /* */ }, { /* 734 */ 0, /* */ }, { /* 735 */ 0, /* */ }, { /* 736 */ 0, /* */ }, { /* 737 */ 0, /* */ }, { /* 738 */ 0, /* */ }, { /* 739 */ 0, /* */ }, { /* 740 */ 0, /* */ }, { /* 741 */ 0, /* */ }, { /* 742 */ 0, /* */ }, { /* 743 */ 0, /* */ }, { /* 744 */ 0, /* */ }, { /* 745 */ 112, /* LODSB */ }, { /* 746 */ 113, /* LODSL */ }, { /* 747 */ 114, /* LODSQ */ }, { /* 748 */ 115, /* LODSW */ }, { /* 749 */ 102, /* LOOP */ }, { /* 750 */ 102, /* LOOPE */ }, { /* 751 */ 102, /* LOOPNE */ }, { /* 752 */ 116, /* LRETIL */ }, { /* 753 */ 116, /* LRETIQ */ }, { /* 754 */ 2, /* LRETIW */ }, { /* 755 */ 0, /* LRETL */ }, { /* 756 */ 0, /* LRETQ */ }, { /* 757 */ 0, /* LRETW */ }, { /* 758 */ 52, /* LSL16rm */ }, { /* 759 */ 53, /* LSL16rr */ }, { /* 760 */ 52, /* LSL32rm */ }, { /* 761 */ 53, /* LSL32rr */ }, { /* 762 */ 32, /* LSL64rm */ }, { /* 763 */ 33, /* LSL64rr */ }, { /* 764 */ 105, /* LSS16rm */ }, { /* 765 */ 106, /* LSS32rm */ }, { /* 766 */ 110, /* LSS64rm */ }, { /* 767 */ 61, /* LTRm */ }, { /* 768 */ 111, /* LTRr */ }, { /* 769 */ 0, /* */ }, { /* 770 */ 0, /* */ }, { /* 771 */ 0, /* */ }, { /* 772 */ 0, /* */ }, { /* 773 */ 52, /* LZCNT16rm */ }, { /* 774 */ 53, /* LZCNT16rr */ }, { /* 775 */ 52, /* LZCNT32rm */ }, { /* 776 */ 53, /* LZCNT32rr */ }, { /* 777 */ 32, /* LZCNT64rm */ }, { /* 778 */ 33, /* LZCNT64rr */ }, { /* 779 */ 0, /* MONTMUL */ }, { /* 780 */ 0, /* */ }, { /* 781 */ 0, /* */ }, { /* 782 */ 117, /* MOV16ao16 */ }, { /* 783 */ 117, /* MOV16ao32 */ }, { /* 784 */ 117, /* MOV16ao64 */ }, { /* 785 */ 3, /* MOV16mi */ }, { /* 786 */ 5, /* MOV16mr */ }, { /* 787 */ 118, /* MOV16ms */ }, { /* 788 */ 117, /* MOV16o16a */ }, { /* 789 */ 117, /* MOV16o32a */ }, { /* 790 */ 117, /* MOV16o64a */ }, { /* 791 */ 119, /* MOV16ri */ }, { /* 792 */ 68, /* MOV16ri_alt */ }, { /* 793 */ 52, /* MOV16rm */ }, { /* 794 */ 57, /* MOV16rr */ }, { /* 795 */ 53, /* MOV16rr_REV */ }, { /* 796 */ 120, /* MOV16rs */ }, { /* 797 */ 121, /* MOV16sm */ }, { /* 798 */ 122, /* MOV16sr */ }, { /* 799 */ 123, /* MOV32ao16 */ }, { /* 800 */ 123, /* MOV32ao32 */ }, { /* 801 */ 123, /* MOV32ao64 */ }, { /* 802 */ 124, /* MOV32cr */ }, { /* 803 */ 125, /* MOV32dr */ }, { /* 804 */ 3, /* MOV32mi */ }, { /* 805 */ 5, /* MOV32mr */ }, { /* 806 */ 118, /* MOV32ms */ }, { /* 807 */ 123, /* MOV32o16a */ }, { /* 808 */ 123, /* MOV32o32a */ }, { /* 809 */ 123, /* MOV32o64a */ }, { /* 810 */ 0, /* */ }, { /* 811 */ 126, /* MOV32rc */ }, { /* 812 */ 127, /* MOV32rd */ }, { /* 813 */ 119, /* MOV32ri */ }, { /* 814 */ 0, /* */ }, { /* 815 */ 68, /* MOV32ri_alt */ }, { /* 816 */ 52, /* MOV32rm */ }, { /* 817 */ 57, /* MOV32rr */ }, { /* 818 */ 53, /* MOV32rr_REV */ }, { /* 819 */ 120, /* MOV32rs */ }, { /* 820 */ 121, /* MOV32sm */ }, { /* 821 */ 122, /* MOV32sr */ }, { /* 822 */ 128, /* MOV64ao32 */ }, { /* 823 */ 128, /* MOV64ao64 */ }, { /* 824 */ 129, /* MOV64cr */ }, { /* 825 */ 130, /* MOV64dr */ }, { /* 826 */ 14, /* MOV64mi32 */ }, { /* 827 */ 16, /* MOV64mr */ }, { /* 828 */ 118, /* MOV64ms */ }, { /* 829 */ 128, /* MOV64o32a */ }, { /* 830 */ 128, /* MOV64o64a */ }, { /* 831 */ 131, /* MOV64rc */ }, { /* 832 */ 132, /* MOV64rd */ }, { /* 833 */ 133, /* MOV64ri */ }, { /* 834 */ 69, /* MOV64ri32 */ }, { /* 835 */ 32, /* MOV64rm */ }, { /* 836 */ 60, /* MOV64rr */ }, { /* 837 */ 33, /* MOV64rr_REV */ }, { /* 838 */ 134, /* MOV64rs */ }, { /* 839 */ 121, /* MOV64sm */ }, { /* 840 */ 135, /* MOV64sr */ }, { /* 841 */ 136, /* MOV8ao16 */ }, { /* 842 */ 136, /* MOV8ao32 */ }, { /* 843 */ 136, /* MOV8ao64 */ }, { /* 844 */ 22, /* MOV8mi */ }, { /* 845 */ 23, /* MOV8mr */ }, { /* 846 */ 0, /* */ }, { /* 847 */ 136, /* MOV8o16a */ }, { /* 848 */ 136, /* MOV8o32a */ }, { /* 849 */ 136, /* MOV8o64a */ }, { /* 850 */ 137, /* MOV8ri */ }, { /* 851 */ 70, /* MOV8ri_alt */ }, { /* 852 */ 71, /* MOV8rm */ }, { /* 853 */ 0, /* */ }, { /* 854 */ 72, /* MOV8rr */ }, { /* 855 */ 0, /* */ }, { /* 856 */ 73, /* MOV8rr_REV */ }, { /* 857 */ 5, /* MOVBE16mr */ }, { /* 858 */ 52, /* MOVBE16rm */ }, { /* 859 */ 5, /* MOVBE32mr */ }, { /* 860 */ 52, /* MOVBE32rm */ }, { /* 861 */ 16, /* MOVBE64mr */ }, { /* 862 */ 32, /* MOVBE64rm */ }, { /* 863 */ 0, /* */ }, { /* 864 */ 74, /* MOVSB */ }, { /* 865 */ 75, /* MOVSL */ }, { /* 866 */ 76, /* MOVSQ */ }, { /* 867 */ 77, /* MOVSW */ }, { /* 868 */ 138, /* MOVSX16rm8 */ }, { /* 869 */ 139, /* MOVSX16rr8 */ }, { /* 870 */ 0, /* */ }, { /* 871 */ 0, /* */ }, { /* 872 */ 52, /* MOVSX32rm16 */ }, { /* 873 */ 138, /* MOVSX32rm8 */ }, { /* 874 */ 140, /* MOVSX32rr16 */ }, { /* 875 */ 139, /* MOVSX32rr8 */ }, { /* 876 */ 104, /* MOVSX64_NOREXrr32 */ }, { /* 877 */ 32, /* MOVSX64rm16 */ }, { /* 878 */ 32, /* MOVSX64rm32 */ }, { /* 879 */ 32, /* MOVSX64rm32_alt */ }, { /* 880 */ 141, /* MOVSX64rm8 */ }, { /* 881 */ 142, /* MOVSX64rr16 */ }, { /* 882 */ 104, /* MOVSX64rr32 */ }, { /* 883 */ 143, /* MOVSX64rr8 */ }, { /* 884 */ 138, /* MOVZX16rm8 */ }, { /* 885 */ 139, /* MOVZX16rr8 */ }, { /* 886 */ 0, /* */ }, { /* 887 */ 0, /* */ }, { /* 888 */ 52, /* MOVZX32rm16 */ }, { /* 889 */ 138, /* MOVZX32rm8 */ }, { /* 890 */ 140, /* MOVZX32rr16 */ }, { /* 891 */ 139, /* MOVZX32rr8 */ }, { /* 892 */ 32, /* MOVZX64rm16_Q */ }, { /* 893 */ 141, /* MOVZX64rm8_Q */ }, { /* 894 */ 142, /* MOVZX64rr16_Q */ }, { /* 895 */ 143, /* MOVZX64rr8_Q */ }, { /* 896 */ 61, /* MUL16m */ }, { /* 897 */ 62, /* MUL16r */ }, { /* 898 */ 61, /* MUL32m */ }, { /* 899 */ 62, /* MUL32r */ }, { /* 900 */ 61, /* MUL64m */ }, { /* 901 */ 64, /* MUL64r */ }, { /* 902 */ 67, /* MUL8m */ }, { /* 903 */ 82, /* MUL8r */ }, { /* 904 */ 34, /* MULX32rm */ }, { /* 905 */ 35, /* MULX32rr */ }, { /* 906 */ 36, /* MULX64rm */ }, { /* 907 */ 37, /* MULX64rr */ }, { /* 908 */ 61, /* NEG16m */ }, { /* 909 */ 79, /* NEG16r */ }, { /* 910 */ 61, /* NEG32m */ }, { /* 911 */ 79, /* NEG32r */ }, { /* 912 */ 61, /* NEG64m */ }, { /* 913 */ 80, /* NEG64r */ }, { /* 914 */ 67, /* NEG8m */ }, { /* 915 */ 81, /* NEG8r */ }, { /* 916 */ 0, /* NOOP */ }, { /* 917 */ 61, /* NOOP18_16m4 */ }, { /* 918 */ 61, /* NOOP18_16m5 */ }, { /* 919 */ 61, /* NOOP18_16m6 */ }, { /* 920 */ 61, /* NOOP18_16m7 */ }, { /* 921 */ 62, /* NOOP18_16r4 */ }, { /* 922 */ 62, /* NOOP18_16r5 */ }, { /* 923 */ 62, /* NOOP18_16r6 */ }, { /* 924 */ 62, /* NOOP18_16r7 */ }, { /* 925 */ 61, /* NOOP18_m4 */ }, { /* 926 */ 61, /* NOOP18_m5 */ }, { /* 927 */ 61, /* NOOP18_m6 */ }, { /* 928 */ 61, /* NOOP18_m7 */ }, { /* 929 */ 62, /* NOOP18_r4 */ }, { /* 930 */ 62, /* NOOP18_r5 */ }, { /* 931 */ 62, /* NOOP18_r6 */ }, { /* 932 */ 62, /* NOOP18_r7 */ }, { /* 933 */ 53, /* NOOP19rr */ }, { /* 934 */ 61, /* NOOPL */ }, { /* 935 */ 61, /* NOOPL_19 */ }, { /* 936 */ 61, /* NOOPL_1a */ }, { /* 937 */ 61, /* NOOPL_1b */ }, { /* 938 */ 61, /* NOOPL_1c */ }, { /* 939 */ 61, /* NOOPL_1d */ }, { /* 940 */ 61, /* NOOPL_1e */ }, { /* 941 */ 61, /* NOOPW */ }, { /* 942 */ 61, /* NOOPW_19 */ }, { /* 943 */ 61, /* NOOPW_1a */ }, { /* 944 */ 61, /* NOOPW_1b */ }, { /* 945 */ 61, /* NOOPW_1c */ }, { /* 946 */ 61, /* NOOPW_1d */ }, { /* 947 */ 61, /* NOOPW_1e */ }, { /* 948 */ 61, /* NOT16m */ }, { /* 949 */ 79, /* NOT16r */ }, { /* 950 */ 61, /* NOT32m */ }, { /* 951 */ 79, /* NOT32r */ }, { /* 952 */ 61, /* NOT64m */ }, { /* 953 */ 80, /* NOT64r */ }, { /* 954 */ 67, /* NOT8m */ }, { /* 955 */ 81, /* NOT8r */ }, { /* 956 */ 2, /* OR16i16 */ }, { /* 957 */ 3, /* OR16mi */ }, { /* 958 */ 4, /* OR16mi8 */ }, { /* 959 */ 5, /* OR16mr */ }, { /* 960 */ 6, /* OR16ri */ }, { /* 961 */ 7, /* OR16ri8 */ }, { /* 962 */ 8, /* OR16rm */ }, { /* 963 */ 9, /* OR16rr */ }, { /* 964 */ 10, /* OR16rr_REV */ }, { /* 965 */ 2, /* OR32i32 */ }, { /* 966 */ 3, /* OR32mi */ }, { /* 967 */ 11, /* OR32mi8 */ }, { /* 968 */ 5, /* OR32mr */ }, { /* 969 */ 0, /* */ }, { /* 970 */ 6, /* OR32ri */ }, { /* 971 */ 12, /* OR32ri8 */ }, { /* 972 */ 8, /* OR32rm */ }, { /* 973 */ 9, /* OR32rr */ }, { /* 974 */ 10, /* OR32rr_REV */ }, { /* 975 */ 13, /* OR64i32 */ }, { /* 976 */ 14, /* OR64mi32 */ }, { /* 977 */ 15, /* OR64mi8 */ }, { /* 978 */ 16, /* OR64mr */ }, { /* 979 */ 17, /* OR64ri32 */ }, { /* 980 */ 18, /* OR64ri8 */ }, { /* 981 */ 19, /* OR64rm */ }, { /* 982 */ 20, /* OR64rr */ }, { /* 983 */ 21, /* OR64rr_REV */ }, { /* 984 */ 1, /* OR8i8 */ }, { /* 985 */ 22, /* OR8mi */ }, { /* 986 */ 22, /* OR8mi8 */ }, { /* 987 */ 23, /* OR8mr */ }, { /* 988 */ 24, /* OR8ri */ }, { /* 989 */ 24, /* OR8ri8 */ }, { /* 990 */ 25, /* OR8rm */ }, { /* 991 */ 26, /* OR8rr */ }, { /* 992 */ 27, /* OR8rr_REV */ }, { /* 993 */ 1, /* OUT16ir */ }, { /* 994 */ 0, /* OUT16rr */ }, { /* 995 */ 1, /* OUT32ir */ }, { /* 996 */ 0, /* OUT32rr */ }, { /* 997 */ 1, /* OUT8ir */ }, { /* 998 */ 0, /* OUT8rr */ }, { /* 999 */ 112, /* OUTSB */ }, { /* 1000 */ 113, /* OUTSL */ }, { /* 1001 */ 115, /* OUTSW */ }, { /* 1002 */ 0, /* PCOMMIT */ }, { /* 1003 */ 34, /* PDEP32rm */ }, { /* 1004 */ 35, /* PDEP32rr */ }, { /* 1005 */ 36, /* PDEP64rm */ }, { /* 1006 */ 37, /* PDEP64rr */ }, { /* 1007 */ 34, /* PEXT32rm */ }, { /* 1008 */ 35, /* PEXT32rr */ }, { /* 1009 */ 36, /* PEXT64rm */ }, { /* 1010 */ 37, /* PEXT64rr */ }, { /* 1011 */ 144, /* POP16r */ }, { /* 1012 */ 61, /* POP16rmm */ }, { /* 1013 */ 62, /* POP16rmr */ }, { /* 1014 */ 144, /* POP32r */ }, { /* 1015 */ 61, /* POP32rmm */ }, { /* 1016 */ 62, /* POP32rmr */ }, { /* 1017 */ 145, /* POP64r */ }, { /* 1018 */ 61, /* POP64rmm */ }, { /* 1019 */ 64, /* POP64rmr */ }, { /* 1020 */ 0, /* POPA16 */ }, { /* 1021 */ 0, /* POPA32 */ }, { /* 1022 */ 0, /* POPDS16 */ }, { /* 1023 */ 0, /* POPDS32 */ }, { /* 1024 */ 0, /* POPES16 */ }, { /* 1025 */ 0, /* POPES32 */ }, { /* 1026 */ 0, /* POPF16 */ }, { /* 1027 */ 0, /* POPF32 */ }, { /* 1028 */ 0, /* POPF64 */ }, { /* 1029 */ 0, /* POPFS16 */ }, { /* 1030 */ 0, /* POPFS32 */ }, { /* 1031 */ 0, /* POPFS64 */ }, { /* 1032 */ 0, /* POPGS16 */ }, { /* 1033 */ 0, /* POPGS32 */ }, { /* 1034 */ 0, /* POPGS64 */ }, { /* 1035 */ 0, /* POPSS16 */ }, { /* 1036 */ 0, /* POPSS32 */ }, { /* 1037 */ 146, /* PUSH16i8 */ }, { /* 1038 */ 144, /* PUSH16r */ }, { /* 1039 */ 61, /* PUSH16rmm */ }, { /* 1040 */ 62, /* PUSH16rmr */ }, { /* 1041 */ 147, /* PUSH32i8 */ }, { /* 1042 */ 144, /* PUSH32r */ }, { /* 1043 */ 61, /* PUSH32rmm */ }, { /* 1044 */ 62, /* PUSH32rmr */ }, { /* 1045 */ 2, /* PUSH64i16 */ }, { /* 1046 */ 13, /* PUSH64i32 */ }, { /* 1047 */ 148, /* PUSH64i8 */ }, { /* 1048 */ 145, /* PUSH64r */ }, { /* 1049 */ 61, /* PUSH64rmm */ }, { /* 1050 */ 64, /* PUSH64rmr */ }, { /* 1051 */ 0, /* PUSHA16 */ }, { /* 1052 */ 0, /* PUSHA32 */ }, { /* 1053 */ 0, /* PUSHCS16 */ }, { /* 1054 */ 0, /* PUSHCS32 */ }, { /* 1055 */ 0, /* PUSHDS16 */ }, { /* 1056 */ 0, /* PUSHDS32 */ }, { /* 1057 */ 0, /* PUSHES16 */ }, { /* 1058 */ 0, /* PUSHES32 */ }, { /* 1059 */ 0, /* PUSHF16 */ }, { /* 1060 */ 0, /* PUSHF32 */ }, { /* 1061 */ 0, /* PUSHF64 */ }, { /* 1062 */ 0, /* PUSHFS16 */ }, { /* 1063 */ 0, /* PUSHFS32 */ }, { /* 1064 */ 0, /* PUSHFS64 */ }, { /* 1065 */ 0, /* PUSHGS16 */ }, { /* 1066 */ 0, /* PUSHGS32 */ }, { /* 1067 */ 0, /* PUSHGS64 */ }, { /* 1068 */ 0, /* PUSHSS16 */ }, { /* 1069 */ 0, /* PUSHSS32 */ }, { /* 1070 */ 2, /* PUSHi16 */ }, { /* 1071 */ 2, /* PUSHi32 */ }, { /* 1072 */ 61, /* RCL16m1 */ }, { /* 1073 */ 61, /* RCL16mCL */ }, { /* 1074 */ 149, /* RCL16mi */ }, { /* 1075 */ 79, /* RCL16r1 */ }, { /* 1076 */ 79, /* RCL16rCL */ }, { /* 1077 */ 150, /* RCL16ri */ }, { /* 1078 */ 61, /* RCL32m1 */ }, { /* 1079 */ 61, /* RCL32mCL */ }, { /* 1080 */ 149, /* RCL32mi */ }, { /* 1081 */ 79, /* RCL32r1 */ }, { /* 1082 */ 79, /* RCL32rCL */ }, { /* 1083 */ 150, /* RCL32ri */ }, { /* 1084 */ 61, /* RCL64m1 */ }, { /* 1085 */ 61, /* RCL64mCL */ }, { /* 1086 */ 149, /* RCL64mi */ }, { /* 1087 */ 80, /* RCL64r1 */ }, { /* 1088 */ 80, /* RCL64rCL */ }, { /* 1089 */ 151, /* RCL64ri */ }, { /* 1090 */ 67, /* RCL8m1 */ }, { /* 1091 */ 67, /* RCL8mCL */ }, { /* 1092 */ 22, /* RCL8mi */ }, { /* 1093 */ 81, /* RCL8r1 */ }, { /* 1094 */ 81, /* RCL8rCL */ }, { /* 1095 */ 24, /* RCL8ri */ }, { /* 1096 */ 61, /* RCR16m1 */ }, { /* 1097 */ 61, /* RCR16mCL */ }, { /* 1098 */ 149, /* RCR16mi */ }, { /* 1099 */ 79, /* RCR16r1 */ }, { /* 1100 */ 79, /* RCR16rCL */ }, { /* 1101 */ 150, /* RCR16ri */ }, { /* 1102 */ 61, /* RCR32m1 */ }, { /* 1103 */ 61, /* RCR32mCL */ }, { /* 1104 */ 149, /* RCR32mi */ }, { /* 1105 */ 79, /* RCR32r1 */ }, { /* 1106 */ 79, /* RCR32rCL */ }, { /* 1107 */ 150, /* RCR32ri */ }, { /* 1108 */ 61, /* RCR64m1 */ }, { /* 1109 */ 61, /* RCR64mCL */ }, { /* 1110 */ 149, /* RCR64mi */ }, { /* 1111 */ 80, /* RCR64r1 */ }, { /* 1112 */ 80, /* RCR64rCL */ }, { /* 1113 */ 151, /* RCR64ri */ }, { /* 1114 */ 67, /* RCR8m1 */ }, { /* 1115 */ 67, /* RCR8mCL */ }, { /* 1116 */ 22, /* RCR8mi */ }, { /* 1117 */ 81, /* RCR8r1 */ }, { /* 1118 */ 81, /* RCR8rCL */ }, { /* 1119 */ 24, /* RCR8ri */ }, { /* 1120 */ 152, /* RDFSBASE */ }, { /* 1121 */ 64, /* RDFSBASE64 */ }, { /* 1122 */ 152, /* RDGSBASE */ }, { /* 1123 */ 64, /* RDGSBASE64 */ }, { /* 1124 */ 0, /* RDMSR */ }, { /* 1125 */ 0, /* RDPMC */ }, { /* 1126 */ 62, /* RDRAND16r */ }, { /* 1127 */ 62, /* RDRAND32r */ }, { /* 1128 */ 64, /* RDRAND64r */ }, { /* 1129 */ 62, /* RDSEED16r */ }, { /* 1130 */ 62, /* RDSEED32r */ }, { /* 1131 */ 64, /* RDSEED64r */ }, { /* 1132 */ 0, /* RDTSC */ }, { /* 1133 */ 0, /* RDTSCP */ }, { /* 1134 */ 0, /* */ }, { /* 1135 */ 0, /* */ }, { /* 1136 */ 0, /* */ }, { /* 1137 */ 0, /* */ }, { /* 1138 */ 0, /* */ }, { /* 1139 */ 0, /* */ }, { /* 1140 */ 0, /* */ }, { /* 1141 */ 0, /* */ }, { /* 1142 */ 0, /* */ }, { /* 1143 */ 0, /* */ }, { /* 1144 */ 0, /* */ }, { /* 1145 */ 0, /* */ }, { /* 1146 */ 0, /* */ }, { /* 1147 */ 0, /* */ }, { /* 1148 */ 0, /* */ }, { /* 1149 */ 0, /* */ }, { /* 1150 */ 0, /* */ }, { /* 1151 */ 0, /* */ }, { /* 1152 */ 0, /* */ }, { /* 1153 */ 0, /* */ }, { /* 1154 */ 0, /* */ }, { /* 1155 */ 0, /* */ }, { /* 1156 */ 0, /* */ }, { /* 1157 */ 0, /* */ }, { /* 1158 */ 0, /* */ }, { /* 1159 */ 0, /* */ }, { /* 1160 */ 0, /* */ }, { /* 1161 */ 0, /* */ }, { /* 1162 */ 0, /* REPNE_PREFIX */ }, { /* 1163 */ 0, /* */ }, { /* 1164 */ 0, /* */ }, { /* 1165 */ 0, /* */ }, { /* 1166 */ 0, /* */ }, { /* 1167 */ 0, /* */ }, { /* 1168 */ 0, /* */ }, { /* 1169 */ 0, /* */ }, { /* 1170 */ 0, /* REP_PREFIX */ }, { /* 1171 */ 0, /* */ }, { /* 1172 */ 0, /* */ }, { /* 1173 */ 0, /* */ }, { /* 1174 */ 0, /* */ }, { /* 1175 */ 0, /* */ }, { /* 1176 */ 0, /* */ }, { /* 1177 */ 0, /* */ }, { /* 1178 */ 116, /* RETIL */ }, { /* 1179 */ 116, /* RETIQ */ }, { /* 1180 */ 2, /* RETIW */ }, { /* 1181 */ 0, /* RETL */ }, { /* 1182 */ 0, /* RETQ */ }, { /* 1183 */ 0, /* RETW */ }, { /* 1184 */ 0, /* REX64_PREFIX */ }, { /* 1185 */ 61, /* ROL16m1 */ }, { /* 1186 */ 61, /* ROL16mCL */ }, { /* 1187 */ 149, /* ROL16mi */ }, { /* 1188 */ 79, /* ROL16r1 */ }, { /* 1189 */ 79, /* ROL16rCL */ }, { /* 1190 */ 150, /* ROL16ri */ }, { /* 1191 */ 61, /* ROL32m1 */ }, { /* 1192 */ 61, /* ROL32mCL */ }, { /* 1193 */ 149, /* ROL32mi */ }, { /* 1194 */ 79, /* ROL32r1 */ }, { /* 1195 */ 79, /* ROL32rCL */ }, { /* 1196 */ 150, /* ROL32ri */ }, { /* 1197 */ 61, /* ROL64m1 */ }, { /* 1198 */ 61, /* ROL64mCL */ }, { /* 1199 */ 149, /* ROL64mi */ }, { /* 1200 */ 80, /* ROL64r1 */ }, { /* 1201 */ 80, /* ROL64rCL */ }, { /* 1202 */ 151, /* ROL64ri */ }, { /* 1203 */ 67, /* ROL8m1 */ }, { /* 1204 */ 67, /* ROL8mCL */ }, { /* 1205 */ 22, /* ROL8mi */ }, { /* 1206 */ 81, /* ROL8r1 */ }, { /* 1207 */ 81, /* ROL8rCL */ }, { /* 1208 */ 24, /* ROL8ri */ }, { /* 1209 */ 61, /* ROR16m1 */ }, { /* 1210 */ 61, /* ROR16mCL */ }, { /* 1211 */ 149, /* ROR16mi */ }, { /* 1212 */ 79, /* ROR16r1 */ }, { /* 1213 */ 79, /* ROR16rCL */ }, { /* 1214 */ 150, /* ROR16ri */ }, { /* 1215 */ 61, /* ROR32m1 */ }, { /* 1216 */ 61, /* ROR32mCL */ }, { /* 1217 */ 149, /* ROR32mi */ }, { /* 1218 */ 79, /* ROR32r1 */ }, { /* 1219 */ 79, /* ROR32rCL */ }, { /* 1220 */ 150, /* ROR32ri */ }, { /* 1221 */ 61, /* ROR64m1 */ }, { /* 1222 */ 61, /* ROR64mCL */ }, { /* 1223 */ 149, /* ROR64mi */ }, { /* 1224 */ 80, /* ROR64r1 */ }, { /* 1225 */ 80, /* ROR64rCL */ }, { /* 1226 */ 151, /* ROR64ri */ }, { /* 1227 */ 67, /* ROR8m1 */ }, { /* 1228 */ 67, /* ROR8mCL */ }, { /* 1229 */ 22, /* ROR8mi */ }, { /* 1230 */ 81, /* ROR8r1 */ }, { /* 1231 */ 81, /* ROR8rCL */ }, { /* 1232 */ 24, /* ROR8ri */ }, { /* 1233 */ 153, /* RORX32mi */ }, { /* 1234 */ 154, /* RORX32ri */ }, { /* 1235 */ 155, /* RORX64mi */ }, { /* 1236 */ 156, /* RORX64ri */ }, { /* 1237 */ 0, /* RSM */ }, { /* 1238 */ 0, /* SAHF */ }, { /* 1239 */ 61, /* SAL16m1 */ }, { /* 1240 */ 61, /* SAL16mCL */ }, { /* 1241 */ 149, /* SAL16mi */ }, { /* 1242 */ 79, /* SAL16r1 */ }, { /* 1243 */ 79, /* SAL16rCL */ }, { /* 1244 */ 150, /* SAL16ri */ }, { /* 1245 */ 61, /* SAL32m1 */ }, { /* 1246 */ 61, /* SAL32mCL */ }, { /* 1247 */ 149, /* SAL32mi */ }, { /* 1248 */ 79, /* SAL32r1 */ }, { /* 1249 */ 79, /* SAL32rCL */ }, { /* 1250 */ 150, /* SAL32ri */ }, { /* 1251 */ 61, /* SAL64m1 */ }, { /* 1252 */ 61, /* SAL64mCL */ }, { /* 1253 */ 149, /* SAL64mi */ }, { /* 1254 */ 80, /* SAL64r1 */ }, { /* 1255 */ 80, /* SAL64rCL */ }, { /* 1256 */ 151, /* SAL64ri */ }, { /* 1257 */ 67, /* SAL8m1 */ }, { /* 1258 */ 67, /* SAL8mCL */ }, { /* 1259 */ 22, /* SAL8mi */ }, { /* 1260 */ 81, /* SAL8r1 */ }, { /* 1261 */ 81, /* SAL8rCL */ }, { /* 1262 */ 24, /* SAL8ri */ }, { /* 1263 */ 0, /* SALC */ }, { /* 1264 */ 61, /* SAR16m1 */ }, { /* 1265 */ 61, /* SAR16mCL */ }, { /* 1266 */ 149, /* SAR16mi */ }, { /* 1267 */ 79, /* SAR16r1 */ }, { /* 1268 */ 79, /* SAR16rCL */ }, { /* 1269 */ 150, /* SAR16ri */ }, { /* 1270 */ 61, /* SAR32m1 */ }, { /* 1271 */ 61, /* SAR32mCL */ }, { /* 1272 */ 149, /* SAR32mi */ }, { /* 1273 */ 79, /* SAR32r1 */ }, { /* 1274 */ 79, /* SAR32rCL */ }, { /* 1275 */ 150, /* SAR32ri */ }, { /* 1276 */ 61, /* SAR64m1 */ }, { /* 1277 */ 61, /* SAR64mCL */ }, { /* 1278 */ 149, /* SAR64mi */ }, { /* 1279 */ 80, /* SAR64r1 */ }, { /* 1280 */ 80, /* SAR64rCL */ }, { /* 1281 */ 151, /* SAR64ri */ }, { /* 1282 */ 67, /* SAR8m1 */ }, { /* 1283 */ 67, /* SAR8mCL */ }, { /* 1284 */ 22, /* SAR8mi */ }, { /* 1285 */ 81, /* SAR8r1 */ }, { /* 1286 */ 81, /* SAR8rCL */ }, { /* 1287 */ 24, /* SAR8ri */ }, { /* 1288 */ 40, /* SARX32rm */ }, { /* 1289 */ 41, /* SARX32rr */ }, { /* 1290 */ 42, /* SARX64rm */ }, { /* 1291 */ 43, /* SARX64rr */ }, { /* 1292 */ 2, /* SBB16i16 */ }, { /* 1293 */ 3, /* SBB16mi */ }, { /* 1294 */ 4, /* SBB16mi8 */ }, { /* 1295 */ 5, /* SBB16mr */ }, { /* 1296 */ 6, /* SBB16ri */ }, { /* 1297 */ 7, /* SBB16ri8 */ }, { /* 1298 */ 8, /* SBB16rm */ }, { /* 1299 */ 9, /* SBB16rr */ }, { /* 1300 */ 10, /* SBB16rr_REV */ }, { /* 1301 */ 2, /* SBB32i32 */ }, { /* 1302 */ 3, /* SBB32mi */ }, { /* 1303 */ 11, /* SBB32mi8 */ }, { /* 1304 */ 5, /* SBB32mr */ }, { /* 1305 */ 6, /* SBB32ri */ }, { /* 1306 */ 12, /* SBB32ri8 */ }, { /* 1307 */ 8, /* SBB32rm */ }, { /* 1308 */ 9, /* SBB32rr */ }, { /* 1309 */ 10, /* SBB32rr_REV */ }, { /* 1310 */ 13, /* SBB64i32 */ }, { /* 1311 */ 14, /* SBB64mi32 */ }, { /* 1312 */ 15, /* SBB64mi8 */ }, { /* 1313 */ 16, /* SBB64mr */ }, { /* 1314 */ 17, /* SBB64ri32 */ }, { /* 1315 */ 18, /* SBB64ri8 */ }, { /* 1316 */ 19, /* SBB64rm */ }, { /* 1317 */ 20, /* SBB64rr */ }, { /* 1318 */ 21, /* SBB64rr_REV */ }, { /* 1319 */ 1, /* SBB8i8 */ }, { /* 1320 */ 22, /* SBB8mi */ }, { /* 1321 */ 22, /* SBB8mi8 */ }, { /* 1322 */ 23, /* SBB8mr */ }, { /* 1323 */ 24, /* SBB8ri */ }, { /* 1324 */ 24, /* SBB8ri8 */ }, { /* 1325 */ 25, /* SBB8rm */ }, { /* 1326 */ 26, /* SBB8rr */ }, { /* 1327 */ 27, /* SBB8rr_REV */ }, { /* 1328 */ 97, /* SCASB */ }, { /* 1329 */ 98, /* SCASL */ }, { /* 1330 */ 157, /* SCASQ */ }, { /* 1331 */ 99, /* SCASW */ }, { /* 1332 */ 0, /* */ }, { /* 1333 */ 0, /* */ }, { /* 1334 */ 0, /* */ }, { /* 1335 */ 0, /* */ }, { /* 1336 */ 0, /* */ }, { /* 1337 */ 0, /* */ }, { /* 1338 */ 0, /* */ }, { /* 1339 */ 0, /* */ }, { /* 1340 */ 0, /* */ }, { /* 1341 */ 0, /* */ }, { /* 1342 */ 67, /* SETAEm */ }, { /* 1343 */ 82, /* SETAEr */ }, { /* 1344 */ 67, /* SETAm */ }, { /* 1345 */ 82, /* SETAr */ }, { /* 1346 */ 67, /* SETBEm */ }, { /* 1347 */ 82, /* SETBEr */ }, { /* 1348 */ 0, /* */ }, { /* 1349 */ 0, /* */ }, { /* 1350 */ 0, /* */ }, { /* 1351 */ 0, /* */ }, { /* 1352 */ 67, /* SETBm */ }, { /* 1353 */ 82, /* SETBr */ }, { /* 1354 */ 67, /* SETEm */ }, { /* 1355 */ 82, /* SETEr */ }, { /* 1356 */ 67, /* SETGEm */ }, { /* 1357 */ 82, /* SETGEr */ }, { /* 1358 */ 67, /* SETGm */ }, { /* 1359 */ 82, /* SETGr */ }, { /* 1360 */ 67, /* SETLEm */ }, { /* 1361 */ 82, /* SETLEr */ }, { /* 1362 */ 67, /* SETLm */ }, { /* 1363 */ 82, /* SETLr */ }, { /* 1364 */ 67, /* SETNEm */ }, { /* 1365 */ 82, /* SETNEr */ }, { /* 1366 */ 67, /* SETNOm */ }, { /* 1367 */ 82, /* SETNOr */ }, { /* 1368 */ 67, /* SETNPm */ }, { /* 1369 */ 82, /* SETNPr */ }, { /* 1370 */ 67, /* SETNSm */ }, { /* 1371 */ 82, /* SETNSr */ }, { /* 1372 */ 67, /* SETOm */ }, { /* 1373 */ 82, /* SETOr */ }, { /* 1374 */ 67, /* SETPm */ }, { /* 1375 */ 82, /* SETPr */ }, { /* 1376 */ 67, /* SETSm */ }, { /* 1377 */ 82, /* SETSr */ }, { /* 1378 */ 87, /* SGDT16m */ }, { /* 1379 */ 87, /* SGDT32m */ }, { /* 1380 */ 88, /* SGDT64m */ }, { /* 1381 */ 61, /* SHL16m1 */ }, { /* 1382 */ 61, /* SHL16mCL */ }, { /* 1383 */ 149, /* SHL16mi */ }, { /* 1384 */ 79, /* SHL16r1 */ }, { /* 1385 */ 79, /* SHL16rCL */ }, { /* 1386 */ 150, /* SHL16ri */ }, { /* 1387 */ 61, /* SHL32m1 */ }, { /* 1388 */ 61, /* SHL32mCL */ }, { /* 1389 */ 149, /* SHL32mi */ }, { /* 1390 */ 79, /* SHL32r1 */ }, { /* 1391 */ 79, /* SHL32rCL */ }, { /* 1392 */ 150, /* SHL32ri */ }, { /* 1393 */ 61, /* SHL64m1 */ }, { /* 1394 */ 61, /* SHL64mCL */ }, { /* 1395 */ 149, /* SHL64mi */ }, { /* 1396 */ 80, /* SHL64r1 */ }, { /* 1397 */ 80, /* SHL64rCL */ }, { /* 1398 */ 151, /* SHL64ri */ }, { /* 1399 */ 67, /* SHL8m1 */ }, { /* 1400 */ 67, /* SHL8mCL */ }, { /* 1401 */ 22, /* SHL8mi */ }, { /* 1402 */ 81, /* SHL8r1 */ }, { /* 1403 */ 81, /* SHL8rCL */ }, { /* 1404 */ 24, /* SHL8ri */ }, { /* 1405 */ 5, /* SHLD16mrCL */ }, { /* 1406 */ 158, /* SHLD16mri8 */ }, { /* 1407 */ 9, /* SHLD16rrCL */ }, { /* 1408 */ 159, /* SHLD16rri8 */ }, { /* 1409 */ 5, /* SHLD32mrCL */ }, { /* 1410 */ 158, /* SHLD32mri8 */ }, { /* 1411 */ 9, /* SHLD32rrCL */ }, { /* 1412 */ 159, /* SHLD32rri8 */ }, { /* 1413 */ 16, /* SHLD64mrCL */ }, { /* 1414 */ 160, /* SHLD64mri8 */ }, { /* 1415 */ 20, /* SHLD64rrCL */ }, { /* 1416 */ 161, /* SHLD64rri8 */ }, { /* 1417 */ 40, /* SHLX32rm */ }, { /* 1418 */ 41, /* SHLX32rr */ }, { /* 1419 */ 42, /* SHLX64rm */ }, { /* 1420 */ 43, /* SHLX64rr */ }, { /* 1421 */ 61, /* SHR16m1 */ }, { /* 1422 */ 61, /* SHR16mCL */ }, { /* 1423 */ 149, /* SHR16mi */ }, { /* 1424 */ 79, /* SHR16r1 */ }, { /* 1425 */ 79, /* SHR16rCL */ }, { /* 1426 */ 150, /* SHR16ri */ }, { /* 1427 */ 61, /* SHR32m1 */ }, { /* 1428 */ 61, /* SHR32mCL */ }, { /* 1429 */ 149, /* SHR32mi */ }, { /* 1430 */ 79, /* SHR32r1 */ }, { /* 1431 */ 79, /* SHR32rCL */ }, { /* 1432 */ 150, /* SHR32ri */ }, { /* 1433 */ 61, /* SHR64m1 */ }, { /* 1434 */ 61, /* SHR64mCL */ }, { /* 1435 */ 149, /* SHR64mi */ }, { /* 1436 */ 80, /* SHR64r1 */ }, { /* 1437 */ 80, /* SHR64rCL */ }, { /* 1438 */ 151, /* SHR64ri */ }, { /* 1439 */ 67, /* SHR8m1 */ }, { /* 1440 */ 67, /* SHR8mCL */ }, { /* 1441 */ 22, /* SHR8mi */ }, { /* 1442 */ 81, /* SHR8r1 */ }, { /* 1443 */ 81, /* SHR8rCL */ }, { /* 1444 */ 24, /* SHR8ri */ }, { /* 1445 */ 5, /* SHRD16mrCL */ }, { /* 1446 */ 158, /* SHRD16mri8 */ }, { /* 1447 */ 9, /* SHRD16rrCL */ }, { /* 1448 */ 159, /* SHRD16rri8 */ }, { /* 1449 */ 5, /* SHRD32mrCL */ }, { /* 1450 */ 158, /* SHRD32mri8 */ }, { /* 1451 */ 9, /* SHRD32rrCL */ }, { /* 1452 */ 159, /* SHRD32rri8 */ }, { /* 1453 */ 16, /* SHRD64mrCL */ }, { /* 1454 */ 160, /* SHRD64mri8 */ }, { /* 1455 */ 20, /* SHRD64rrCL */ }, { /* 1456 */ 161, /* SHRD64rri8 */ }, { /* 1457 */ 40, /* SHRX32rm */ }, { /* 1458 */ 41, /* SHRX32rr */ }, { /* 1459 */ 42, /* SHRX64rm */ }, { /* 1460 */ 43, /* SHRX64rr */ }, { /* 1461 */ 87, /* SIDT16m */ }, { /* 1462 */ 87, /* SIDT32m */ }, { /* 1463 */ 88, /* SIDT64m */ }, { /* 1464 */ 0, /* SKINIT */ }, { /* 1465 */ 61, /* SLDT16m */ }, { /* 1466 */ 62, /* SLDT16r */ }, { /* 1467 */ 62, /* SLDT32r */ }, { /* 1468 */ 61, /* SLDT64m */ }, { /* 1469 */ 64, /* SLDT64r */ }, { /* 1470 */ 61, /* SMSW16m */ }, { /* 1471 */ 62, /* SMSW16r */ }, { /* 1472 */ 62, /* SMSW32r */ }, { /* 1473 */ 64, /* SMSW64r */ }, { /* 1474 */ 0, /* STAC */ }, { /* 1475 */ 0, /* STC */ }, { /* 1476 */ 0, /* STD */ }, { /* 1477 */ 0, /* STGI */ }, { /* 1478 */ 0, /* STI */ }, { /* 1479 */ 97, /* STOSB */ }, { /* 1480 */ 98, /* STOSL */ }, { /* 1481 */ 157, /* STOSQ */ }, { /* 1482 */ 99, /* STOSW */ }, { /* 1483 */ 62, /* STR16r */ }, { /* 1484 */ 62, /* STR32r */ }, { /* 1485 */ 64, /* STR64r */ }, { /* 1486 */ 61, /* STRm */ }, { /* 1487 */ 2, /* SUB16i16 */ }, { /* 1488 */ 3, /* SUB16mi */ }, { /* 1489 */ 4, /* SUB16mi8 */ }, { /* 1490 */ 5, /* SUB16mr */ }, { /* 1491 */ 6, /* SUB16ri */ }, { /* 1492 */ 7, /* SUB16ri8 */ }, { /* 1493 */ 8, /* SUB16rm */ }, { /* 1494 */ 9, /* SUB16rr */ }, { /* 1495 */ 10, /* SUB16rr_REV */ }, { /* 1496 */ 2, /* SUB32i32 */ }, { /* 1497 */ 3, /* SUB32mi */ }, { /* 1498 */ 11, /* SUB32mi8 */ }, { /* 1499 */ 5, /* SUB32mr */ }, { /* 1500 */ 6, /* SUB32ri */ }, { /* 1501 */ 12, /* SUB32ri8 */ }, { /* 1502 */ 8, /* SUB32rm */ }, { /* 1503 */ 9, /* SUB32rr */ }, { /* 1504 */ 10, /* SUB32rr_REV */ }, { /* 1505 */ 13, /* SUB64i32 */ }, { /* 1506 */ 14, /* SUB64mi32 */ }, { /* 1507 */ 15, /* SUB64mi8 */ }, { /* 1508 */ 16, /* SUB64mr */ }, { /* 1509 */ 17, /* SUB64ri32 */ }, { /* 1510 */ 18, /* SUB64ri8 */ }, { /* 1511 */ 19, /* SUB64rm */ }, { /* 1512 */ 20, /* SUB64rr */ }, { /* 1513 */ 21, /* SUB64rr_REV */ }, { /* 1514 */ 1, /* SUB8i8 */ }, { /* 1515 */ 22, /* SUB8mi */ }, { /* 1516 */ 22, /* SUB8mi8 */ }, { /* 1517 */ 23, /* SUB8mr */ }, { /* 1518 */ 24, /* SUB8ri */ }, { /* 1519 */ 24, /* SUB8ri8 */ }, { /* 1520 */ 25, /* SUB8rm */ }, { /* 1521 */ 26, /* SUB8rr */ }, { /* 1522 */ 27, /* SUB8rr_REV */ }, { /* 1523 */ 0, /* SWAPGS */ }, { /* 1524 */ 0, /* SYSCALL */ }, { /* 1525 */ 0, /* SYSENTER */ }, { /* 1526 */ 0, /* SYSEXIT */ }, { /* 1527 */ 0, /* SYSEXIT64 */ }, { /* 1528 */ 0, /* SYSRET */ }, { /* 1529 */ 0, /* SYSRET64 */ }, { /* 1530 */ 48, /* T1MSKC32rm */ }, { /* 1531 */ 49, /* T1MSKC32rr */ }, { /* 1532 */ 50, /* T1MSKC64rm */ }, { /* 1533 */ 51, /* T1MSKC64rr */ }, { /* 1534 */ 0, /* */ }, { /* 1535 */ 0, /* */ }, { /* 1536 */ 0, /* */ }, { /* 1537 */ 0, /* */ }, { /* 1538 */ 0, /* */ }, { /* 1539 */ 0, /* */ }, { /* 1540 */ 0, /* */ }, { /* 1541 */ 0, /* */ }, { /* 1542 */ 0, /* */ }, { /* 1543 */ 0, /* */ }, { /* 1544 */ 0, /* */ }, { /* 1545 */ 0, /* */ }, { /* 1546 */ 0, /* */ }, { /* 1547 */ 0, /* */ }, { /* 1548 */ 0, /* */ }, { /* 1549 */ 2, /* TEST16i16 */ }, { /* 1550 */ 3, /* TEST16mi */ }, { /* 1551 */ 3, /* TEST16mi_alt */ }, { /* 1552 */ 68, /* TEST16ri */ }, { /* 1553 */ 68, /* TEST16ri_alt */ }, { /* 1554 */ 52, /* TEST16rm */ }, { /* 1555 */ 57, /* TEST16rr */ }, { /* 1556 */ 2, /* TEST32i32 */ }, { /* 1557 */ 3, /* TEST32mi */ }, { /* 1558 */ 3, /* TEST32mi_alt */ }, { /* 1559 */ 68, /* TEST32ri */ }, { /* 1560 */ 68, /* TEST32ri_alt */ }, { /* 1561 */ 52, /* TEST32rm */ }, { /* 1562 */ 57, /* TEST32rr */ }, { /* 1563 */ 13, /* TEST64i32 */ }, { /* 1564 */ 14, /* TEST64mi32 */ }, { /* 1565 */ 14, /* TEST64mi32_alt */ }, { /* 1566 */ 69, /* TEST64ri32 */ }, { /* 1567 */ 69, /* TEST64ri32_alt */ }, { /* 1568 */ 32, /* TEST64rm */ }, { /* 1569 */ 60, /* TEST64rr */ }, { /* 1570 */ 1, /* TEST8i8 */ }, { /* 1571 */ 22, /* TEST8mi */ }, { /* 1572 */ 22, /* TEST8mi_alt */ }, { /* 1573 */ 70, /* TEST8ri */ }, { /* 1574 */ 0, /* */ }, { /* 1575 */ 70, /* TEST8ri_alt */ }, { /* 1576 */ 71, /* TEST8rm */ }, { /* 1577 */ 72, /* TEST8rr */ }, { /* 1578 */ 0, /* */ }, { /* 1579 */ 0, /* */ }, { /* 1580 */ 0, /* */ }, { /* 1581 */ 0, /* */ }, { /* 1582 */ 0, /* */ }, { /* 1583 */ 0, /* */ }, { /* 1584 */ 0, /* TRAP */ }, { /* 1585 */ 52, /* TZCNT16rm */ }, { /* 1586 */ 53, /* TZCNT16rr */ }, { /* 1587 */ 52, /* TZCNT32rm */ }, { /* 1588 */ 53, /* TZCNT32rr */ }, { /* 1589 */ 32, /* TZCNT64rm */ }, { /* 1590 */ 33, /* TZCNT64rr */ }, { /* 1591 */ 48, /* TZMSK32rm */ }, { /* 1592 */ 49, /* TZMSK32rr */ }, { /* 1593 */ 50, /* TZMSK64rm */ }, { /* 1594 */ 51, /* TZMSK64rr */ }, { /* 1595 */ 0, /* UD2B */ }, { /* 1596 */ 0, /* */ }, { /* 1597 */ 0, /* */ }, { /* 1598 */ 61, /* VERRm */ }, { /* 1599 */ 111, /* VERRr */ }, { /* 1600 */ 61, /* VERWm */ }, { /* 1601 */ 111, /* VERWr */ }, { /* 1602 */ 0, /* VMCALL */ }, { /* 1603 */ 61, /* VMCLEARm */ }, { /* 1604 */ 0, /* VMFUNC */ }, { /* 1605 */ 0, /* VMLAUNCH */ }, { /* 1606 */ 0, /* VMLOAD32 */ }, { /* 1607 */ 0, /* VMLOAD64 */ }, { /* 1608 */ 0, /* VMMCALL */ }, { /* 1609 */ 61, /* VMPTRLDm */ }, { /* 1610 */ 61, /* VMPTRSTm */ }, { /* 1611 */ 162, /* VMREAD32rm */ }, { /* 1612 */ 163, /* VMREAD32rr */ }, { /* 1613 */ 16, /* VMREAD64rm */ }, { /* 1614 */ 60, /* VMREAD64rr */ }, { /* 1615 */ 0, /* VMRESUME */ }, { /* 1616 */ 0, /* VMRUN32 */ }, { /* 1617 */ 0, /* VMRUN64 */ }, { /* 1618 */ 0, /* VMSAVE32 */ }, { /* 1619 */ 0, /* VMSAVE64 */ }, { /* 1620 */ 30, /* VMWRITE32rm */ }, { /* 1621 */ 31, /* VMWRITE32rr */ }, { /* 1622 */ 32, /* VMWRITE64rm */ }, { /* 1623 */ 33, /* VMWRITE64rr */ }, { /* 1624 */ 0, /* VMXOFF */ }, { /* 1625 */ 61, /* VMXON */ }, { /* 1626 */ 0, /* WBINVD */ }, { /* 1627 */ 0, /* */ }, { /* 1628 */ 0, /* */ }, { /* 1629 */ 0, /* */ }, { /* 1630 */ 152, /* WRFSBASE */ }, { /* 1631 */ 64, /* WRFSBASE64 */ }, { /* 1632 */ 152, /* WRGSBASE */ }, { /* 1633 */ 64, /* WRGSBASE64 */ }, { /* 1634 */ 0, /* WRMSR */ }, { /* 1635 */ 5, /* XADD16rm */ }, { /* 1636 */ 57, /* XADD16rr */ }, { /* 1637 */ 5, /* XADD32rm */ }, { /* 1638 */ 57, /* XADD32rr */ }, { /* 1639 */ 16, /* XADD64rm */ }, { /* 1640 */ 60, /* XADD64rr */ }, { /* 1641 */ 23, /* XADD8rm */ }, { /* 1642 */ 72, /* XADD8rr */ }, { /* 1643 */ 144, /* XCHG16ar */ }, { /* 1644 */ 8, /* XCHG16rm */ }, { /* 1645 */ 10, /* XCHG16rr */ }, { /* 1646 */ 144, /* XCHG32ar */ }, { /* 1647 */ 144, /* XCHG32ar64 */ }, { /* 1648 */ 8, /* XCHG32rm */ }, { /* 1649 */ 10, /* XCHG32rr */ }, { /* 1650 */ 145, /* XCHG64ar */ }, { /* 1651 */ 19, /* XCHG64rm */ }, { /* 1652 */ 21, /* XCHG64rr */ }, { /* 1653 */ 25, /* XCHG8rm */ }, { /* 1654 */ 27, /* XCHG8rr */ }, { /* 1655 */ 0, /* XCRYPTCBC */ }, { /* 1656 */ 0, /* XCRYPTCFB */ }, { /* 1657 */ 0, /* XCRYPTCTR */ }, { /* 1658 */ 0, /* XCRYPTECB */ }, { /* 1659 */ 0, /* XCRYPTOFB */ }, { /* 1660 */ 0, /* XGETBV */ }, { /* 1661 */ 0, /* XLAT */ }, { /* 1662 */ 2, /* XOR16i16 */ }, { /* 1663 */ 3, /* XOR16mi */ }, { /* 1664 */ 4, /* XOR16mi8 */ }, { /* 1665 */ 5, /* XOR16mr */ }, { /* 1666 */ 6, /* XOR16ri */ }, { /* 1667 */ 7, /* XOR16ri8 */ }, { /* 1668 */ 8, /* XOR16rm */ }, { /* 1669 */ 9, /* XOR16rr */ }, { /* 1670 */ 10, /* XOR16rr_REV */ }, { /* 1671 */ 2, /* XOR32i32 */ }, { /* 1672 */ 3, /* XOR32mi */ }, { /* 1673 */ 11, /* XOR32mi8 */ }, { /* 1674 */ 5, /* XOR32mr */ }, { /* 1675 */ 6, /* XOR32ri */ }, { /* 1676 */ 12, /* XOR32ri8 */ }, { /* 1677 */ 8, /* XOR32rm */ }, { /* 1678 */ 9, /* XOR32rr */ }, { /* 1679 */ 10, /* XOR32rr_REV */ }, { /* 1680 */ 13, /* XOR64i32 */ }, { /* 1681 */ 14, /* XOR64mi32 */ }, { /* 1682 */ 15, /* XOR64mi8 */ }, { /* 1683 */ 16, /* XOR64mr */ }, { /* 1684 */ 17, /* XOR64ri32 */ }, { /* 1685 */ 18, /* XOR64ri8 */ }, { /* 1686 */ 19, /* XOR64rm */ }, { /* 1687 */ 20, /* XOR64rr */ }, { /* 1688 */ 21, /* XOR64rr_REV */ }, { /* 1689 */ 1, /* XOR8i8 */ }, { /* 1690 */ 22, /* XOR8mi */ }, { /* 1691 */ 22, /* XOR8mi8 */ }, { /* 1692 */ 23, /* XOR8mr */ }, { /* 1693 */ 24, /* XOR8ri */ }, { /* 1694 */ 24, /* XOR8ri8 */ }, { /* 1695 */ 25, /* XOR8rm */ }, { /* 1696 */ 26, /* XOR8rr */ }, { /* 1697 */ 27, /* XOR8rr_REV */ }, { /* 1698 */ 164, /* XRSTOR */ }, { /* 1699 */ 164, /* XRSTOR64 */ }, { /* 1700 */ 164, /* XRSTORS */ }, { /* 1701 */ 164, /* XRSTORS64 */ }, { /* 1702 */ 164, /* XSAVE */ }, { /* 1703 */ 164, /* XSAVE64 */ }, { /* 1704 */ 164, /* XSAVEC */ }, { /* 1705 */ 164, /* XSAVEC64 */ }, { /* 1706 */ 164, /* XSAVEOPT */ }, { /* 1707 */ 164, /* XSAVEOPT64 */ }, { /* 1708 */ 164, /* XSAVES */ }, { /* 1709 */ 164, /* XSAVES64 */ }, { /* 1710 */ 0, /* XSETBV */ }, { /* 1711 */ 0, /* XSHA1 */ }, { /* 1712 */ 0, /* XSHA256 */ }, { /* 1713 */ 0, /* XSTORE */ } }; static const uint8_t x86DisassemblerContexts[16384] = { IC, /* 0 */ IC_64BIT, /* 1 */ IC_XS, /* 2 */ IC_64BIT_XS, /* 3 */ IC_XD, /* 4 */ IC_64BIT_XD, /* 5 */ IC_XS, /* 6 */ IC_64BIT_XS, /* 7 */ IC, /* 8 */ IC_64BIT_REXW, /* 9 */ IC_XS, /* 10 */ IC_64BIT_REXW_XS, /* 11 */ IC_XD, /* 12 */ IC_64BIT_REXW_XD, /* 13 */ IC_XS, /* 14 */ IC_64BIT_REXW_XS, /* 15 */ IC_OPSIZE, /* 16 */ IC_64BIT_OPSIZE, /* 17 */ IC_XS_OPSIZE, /* 18 */ IC_64BIT_XS_OPSIZE, /* 19 */ IC_XD_OPSIZE, /* 20 */ IC_64BIT_XD_OPSIZE, /* 21 */ IC_XS_OPSIZE, /* 22 */ IC_64BIT_XD_OPSIZE, /* 23 */ IC_OPSIZE, /* 24 */ IC_64BIT_REXW_OPSIZE, /* 25 */ IC_XS_OPSIZE, /* 26 */ IC_64BIT_REXW_XS, /* 27 */ IC_XD_OPSIZE, /* 28 */ IC_64BIT_REXW_XD, /* 29 */ IC_XS_OPSIZE, /* 30 */ IC_64BIT_REXW_XS, /* 31 */ IC_ADSIZE, /* 32 */ IC_64BIT_ADSIZE, /* 33 */ IC_XS, /* 34 */ IC_64BIT_XS, /* 35 */ IC_XD, /* 36 */ IC_64BIT_XD, /* 37 */ IC_XS, /* 38 */ IC_64BIT_XS, /* 39 */ IC_ADSIZE, /* 40 */ IC_64BIT_REXW_ADSIZE, /* 41 */ IC_XS, /* 42 */ IC_64BIT_REXW_XS, /* 43 */ IC_XD, /* 44 */ IC_64BIT_REXW_XD, /* 45 */ IC_XS, /* 46 */ IC_64BIT_REXW_XS, /* 47 */ IC_OPSIZE_ADSIZE, /* 48 */ IC_64BIT_OPSIZE_ADSIZE, /* 49 */ IC_XS_OPSIZE, /* 50 */ IC_64BIT_XS_OPSIZE, /* 51 */ IC_XD_OPSIZE, /* 52 */ IC_64BIT_XD_OPSIZE, /* 53 */ IC_XS_OPSIZE, /* 54 */ IC_64BIT_XD_OPSIZE, /* 55 */ IC_OPSIZE_ADSIZE, /* 56 */ IC_64BIT_REXW_OPSIZE, /* 57 */ IC_XS_OPSIZE, /* 58 */ IC_64BIT_REXW_XS, /* 59 */ IC_XD_OPSIZE, /* 60 */ IC_64BIT_REXW_XD, /* 61 */ IC_XS_OPSIZE, /* 62 */ IC_64BIT_REXW_XS, /* 63 */ IC_VEX, /* 64 */ IC_VEX, /* 65 */ IC_VEX_XS, /* 66 */ IC_VEX_XS, /* 67 */ IC_VEX_XD, /* 68 */ IC_VEX_XD, /* 69 */ IC_VEX_XD, /* 70 */ IC_VEX_XD, /* 71 */ IC_VEX_W, /* 72 */ IC_VEX_W, /* 73 */ IC_VEX_W_XS, /* 74 */ IC_VEX_W_XS, /* 75 */ IC_VEX_W_XD, /* 76 */ IC_VEX_W_XD, /* 77 */ IC_VEX_W_XD, /* 78 */ IC_VEX_W_XD, /* 79 */ IC_VEX_OPSIZE, /* 80 */ IC_VEX_OPSIZE, /* 81 */ IC_VEX_OPSIZE, /* 82 */ IC_VEX_OPSIZE, /* 83 */ IC_VEX_OPSIZE, /* 84 */ IC_VEX_OPSIZE, /* 85 */ IC_VEX_OPSIZE, /* 86 */ IC_VEX_OPSIZE, /* 87 */ IC_VEX_W_OPSIZE, /* 88 */ IC_VEX_W_OPSIZE, /* 89 */ IC_VEX_W_OPSIZE, /* 90 */ IC_VEX_W_OPSIZE, /* 91 */ IC_VEX_W_OPSIZE, /* 92 */ IC_VEX_W_OPSIZE, /* 93 */ IC_VEX_W_OPSIZE, /* 94 */ IC_VEX_W_OPSIZE, /* 95 */ IC_VEX, /* 96 */ IC_VEX, /* 97 */ IC_VEX_XS, /* 98 */ IC_VEX_XS, /* 99 */ IC_VEX_XD, /* 100 */ IC_VEX_XD, /* 101 */ IC_VEX_XD, /* 102 */ IC_VEX_XD, /* 103 */ IC_VEX_W, /* 104 */ IC_VEX_W, /* 105 */ IC_VEX_W_XS, /* 106 */ IC_VEX_W_XS, /* 107 */ IC_VEX_W_XD, /* 108 */ IC_VEX_W_XD, /* 109 */ IC_VEX_W_XD, /* 110 */ IC_VEX_W_XD, /* 111 */ IC_VEX_OPSIZE, /* 112 */ IC_VEX_OPSIZE, /* 113 */ IC_VEX_OPSIZE, /* 114 */ IC_VEX_OPSIZE, /* 115 */ IC_VEX_OPSIZE, /* 116 */ IC_VEX_OPSIZE, /* 117 */ IC_VEX_OPSIZE, /* 118 */ IC_VEX_OPSIZE, /* 119 */ IC_VEX_W_OPSIZE, /* 120 */ IC_VEX_W_OPSIZE, /* 121 */ IC_VEX_W_OPSIZE, /* 122 */ IC_VEX_W_OPSIZE, /* 123 */ IC_VEX_W_OPSIZE, /* 124 */ IC_VEX_W_OPSIZE, /* 125 */ IC_VEX_W_OPSIZE, /* 126 */ IC_VEX_W_OPSIZE, /* 127 */ IC_VEX_L, /* 128 */ IC_VEX_L, /* 129 */ IC_VEX_L_XS, /* 130 */ IC_VEX_L_XS, /* 131 */ IC_VEX_L_XD, /* 132 */ IC_VEX_L_XD, /* 133 */ IC_VEX_L_XD, /* 134 */ IC_VEX_L_XD, /* 135 */ IC_VEX_L_W, /* 136 */ IC_VEX_L_W, /* 137 */ IC_VEX_L_W_XS, /* 138 */ IC_VEX_L_W_XS, /* 139 */ IC_VEX_L_W_XD, /* 140 */ IC_VEX_L_W_XD, /* 141 */ IC_VEX_L_W_XD, /* 142 */ IC_VEX_L_W_XD, /* 143 */ IC_VEX_L_OPSIZE, /* 144 */ IC_VEX_L_OPSIZE, /* 145 */ IC_VEX_L_OPSIZE, /* 146 */ IC_VEX_L_OPSIZE, /* 147 */ IC_VEX_L_OPSIZE, /* 148 */ IC_VEX_L_OPSIZE, /* 149 */ IC_VEX_L_OPSIZE, /* 150 */ IC_VEX_L_OPSIZE, /* 151 */ IC_VEX_L_W_OPSIZE, /* 152 */ IC_VEX_L_W_OPSIZE, /* 153 */ IC_VEX_L_W_OPSIZE, /* 154 */ IC_VEX_L_W_OPSIZE, /* 155 */ IC_VEX_L_W_OPSIZE, /* 156 */ IC_VEX_L_W_OPSIZE, /* 157 */ IC_VEX_L_W_OPSIZE, /* 158 */ IC_VEX_L_W_OPSIZE, /* 159 */ IC_VEX_L, /* 160 */ IC_VEX_L, /* 161 */ IC_VEX_L_XS, /* 162 */ IC_VEX_L_XS, /* 163 */ IC_VEX_L_XD, /* 164 */ IC_VEX_L_XD, /* 165 */ IC_VEX_L_XD, /* 166 */ IC_VEX_L_XD, /* 167 */ IC_VEX_L_W, /* 168 */ IC_VEX_L_W, /* 169 */ IC_VEX_L_W_XS, /* 170 */ IC_VEX_L_W_XS, /* 171 */ IC_VEX_L_W_XD, /* 172 */ IC_VEX_L_W_XD, /* 173 */ IC_VEX_L_W_XD, /* 174 */ IC_VEX_L_W_XD, /* 175 */ IC_VEX_L_OPSIZE, /* 176 */ IC_VEX_L_OPSIZE, /* 177 */ IC_VEX_L_OPSIZE, /* 178 */ IC_VEX_L_OPSIZE, /* 179 */ IC_VEX_L_OPSIZE, /* 180 */ IC_VEX_L_OPSIZE, /* 181 */ IC_VEX_L_OPSIZE, /* 182 */ IC_VEX_L_OPSIZE, /* 183 */ IC_VEX_L_W_OPSIZE, /* 184 */ IC_VEX_L_W_OPSIZE, /* 185 */ IC_VEX_L_W_OPSIZE, /* 186 */ IC_VEX_L_W_OPSIZE, /* 187 */ IC_VEX_L_W_OPSIZE, /* 188 */ IC_VEX_L_W_OPSIZE, /* 189 */ IC_VEX_L_W_OPSIZE, /* 190 */ IC_VEX_L_W_OPSIZE, /* 191 */ IC_VEX_L, /* 192 */ IC_VEX_L, /* 193 */ IC_VEX_L_XS, /* 194 */ IC_VEX_L_XS, /* 195 */ IC_VEX_L_XD, /* 196 */ IC_VEX_L_XD, /* 197 */ IC_VEX_L_XD, /* 198 */ IC_VEX_L_XD, /* 199 */ IC_VEX_L_W, /* 200 */ IC_VEX_L_W, /* 201 */ IC_VEX_L_W_XS, /* 202 */ IC_VEX_L_W_XS, /* 203 */ IC_VEX_L_W_XD, /* 204 */ IC_VEX_L_W_XD, /* 205 */ IC_VEX_L_W_XD, /* 206 */ IC_VEX_L_W_XD, /* 207 */ IC_VEX_L_OPSIZE, /* 208 */ IC_VEX_L_OPSIZE, /* 209 */ IC_VEX_L_OPSIZE, /* 210 */ IC_VEX_L_OPSIZE, /* 211 */ IC_VEX_L_OPSIZE, /* 212 */ IC_VEX_L_OPSIZE, /* 213 */ IC_VEX_L_OPSIZE, /* 214 */ IC_VEX_L_OPSIZE, /* 215 */ IC_VEX_L_W_OPSIZE, /* 216 */ IC_VEX_L_W_OPSIZE, /* 217 */ IC_VEX_L_W_OPSIZE, /* 218 */ IC_VEX_L_W_OPSIZE, /* 219 */ IC_VEX_L_W_OPSIZE, /* 220 */ IC_VEX_L_W_OPSIZE, /* 221 */ IC_VEX_L_W_OPSIZE, /* 222 */ IC_VEX_L_W_OPSIZE, /* 223 */ IC_VEX_L, /* 224 */ IC_VEX_L, /* 225 */ IC_VEX_L_XS, /* 226 */ IC_VEX_L_XS, /* 227 */ IC_VEX_L_XD, /* 228 */ IC_VEX_L_XD, /* 229 */ IC_VEX_L_XD, /* 230 */ IC_VEX_L_XD, /* 231 */ IC_VEX_L_W, /* 232 */ IC_VEX_L_W, /* 233 */ IC_VEX_L_W_XS, /* 234 */ IC_VEX_L_W_XS, /* 235 */ IC_VEX_L_W_XD, /* 236 */ IC_VEX_L_W_XD, /* 237 */ IC_VEX_L_W_XD, /* 238 */ IC_VEX_L_W_XD, /* 239 */ IC_VEX_L_OPSIZE, /* 240 */ IC_VEX_L_OPSIZE, /* 241 */ IC_VEX_L_OPSIZE, /* 242 */ IC_VEX_L_OPSIZE, /* 243 */ IC_VEX_L_OPSIZE, /* 244 */ IC_VEX_L_OPSIZE, /* 245 */ IC_VEX_L_OPSIZE, /* 246 */ IC_VEX_L_OPSIZE, /* 247 */ IC_VEX_L_W_OPSIZE, /* 248 */ IC_VEX_L_W_OPSIZE, /* 249 */ IC_VEX_L_W_OPSIZE, /* 250 */ IC_VEX_L_W_OPSIZE, /* 251 */ IC_VEX_L_W_OPSIZE, /* 252 */ IC_VEX_L_W_OPSIZE, /* 253 */ IC_VEX_L_W_OPSIZE, /* 254 */ IC_VEX_L_W_OPSIZE, /* 255 */ IC_EVEX, /* 256 */ IC_EVEX, /* 257 */ IC_EVEX_XS, /* 258 */ IC_EVEX_XS, /* 259 */ IC_EVEX_XD, /* 260 */ IC_EVEX_XD, /* 261 */ IC_EVEX_XD, /* 262 */ IC_EVEX_XD, /* 263 */ IC_EVEX_W, /* 264 */ IC_EVEX_W, /* 265 */ IC_EVEX_W_XS, /* 266 */ IC_EVEX_W_XS, /* 267 */ IC_EVEX_W_XD, /* 268 */ IC_EVEX_W_XD, /* 269 */ IC_EVEX_W_XD, /* 270 */ IC_EVEX_W_XD, /* 271 */ IC_EVEX_OPSIZE, /* 272 */ IC_EVEX_OPSIZE, /* 273 */ IC_EVEX_OPSIZE, /* 274 */ IC_EVEX_OPSIZE, /* 275 */ IC_EVEX_OPSIZE, /* 276 */ IC_EVEX_OPSIZE, /* 277 */ IC_EVEX_OPSIZE, /* 278 */ IC_EVEX_OPSIZE, /* 279 */ IC_EVEX_W_OPSIZE, /* 280 */ IC_EVEX_W_OPSIZE, /* 281 */ IC_EVEX_W_OPSIZE, /* 282 */ IC_EVEX_W_OPSIZE, /* 283 */ IC_EVEX_W_OPSIZE, /* 284 */ IC_EVEX_W_OPSIZE, /* 285 */ IC_EVEX_W_OPSIZE, /* 286 */ IC_EVEX_W_OPSIZE, /* 287 */ IC_EVEX, /* 288 */ IC_EVEX, /* 289 */ IC_EVEX_XS, /* 290 */ IC_EVEX_XS, /* 291 */ IC_EVEX_XD, /* 292 */ IC_EVEX_XD, /* 293 */ IC_EVEX_XD, /* 294 */ IC_EVEX_XD, /* 295 */ IC_EVEX_W, /* 296 */ IC_EVEX_W, /* 297 */ IC_EVEX_W_XS, /* 298 */ IC_EVEX_W_XS, /* 299 */ IC_EVEX_W_XD, /* 300 */ IC_EVEX_W_XD, /* 301 */ IC_EVEX_W_XD, /* 302 */ IC_EVEX_W_XD, /* 303 */ IC_EVEX_OPSIZE, /* 304 */ IC_EVEX_OPSIZE, /* 305 */ IC_EVEX_OPSIZE, /* 306 */ IC_EVEX_OPSIZE, /* 307 */ IC_EVEX_OPSIZE, /* 308 */ IC_EVEX_OPSIZE, /* 309 */ IC_EVEX_OPSIZE, /* 310 */ IC_EVEX_OPSIZE, /* 311 */ IC_EVEX_W_OPSIZE, /* 312 */ IC_EVEX_W_OPSIZE, /* 313 */ IC_EVEX_W_OPSIZE, /* 314 */ IC_EVEX_W_OPSIZE, /* 315 */ IC_EVEX_W_OPSIZE, /* 316 */ IC_EVEX_W_OPSIZE, /* 317 */ IC_EVEX_W_OPSIZE, /* 318 */ IC_EVEX_W_OPSIZE, /* 319 */ IC_EVEX, /* 320 */ IC_EVEX, /* 321 */ IC_EVEX_XS, /* 322 */ IC_EVEX_XS, /* 323 */ IC_EVEX_XD, /* 324 */ IC_EVEX_XD, /* 325 */ IC_EVEX_XD, /* 326 */ IC_EVEX_XD, /* 327 */ IC_EVEX_W, /* 328 */ IC_EVEX_W, /* 329 */ IC_EVEX_W_XS, /* 330 */ IC_EVEX_W_XS, /* 331 */ IC_EVEX_W_XD, /* 332 */ IC_EVEX_W_XD, /* 333 */ IC_EVEX_W_XD, /* 334 */ IC_EVEX_W_XD, /* 335 */ IC_EVEX_OPSIZE, /* 336 */ IC_EVEX_OPSIZE, /* 337 */ IC_EVEX_OPSIZE, /* 338 */ IC_EVEX_OPSIZE, /* 339 */ IC_EVEX_OPSIZE, /* 340 */ IC_EVEX_OPSIZE, /* 341 */ IC_EVEX_OPSIZE, /* 342 */ IC_EVEX_OPSIZE, /* 343 */ IC_EVEX_W_OPSIZE, /* 344 */ IC_EVEX_W_OPSIZE, /* 345 */ IC_EVEX_W_OPSIZE, /* 346 */ IC_EVEX_W_OPSIZE, /* 347 */ IC_EVEX_W_OPSIZE, /* 348 */ IC_EVEX_W_OPSIZE, /* 349 */ IC_EVEX_W_OPSIZE, /* 350 */ IC_EVEX_W_OPSIZE, /* 351 */ IC_EVEX, /* 352 */ IC_EVEX, /* 353 */ IC_EVEX_XS, /* 354 */ IC_EVEX_XS, /* 355 */ IC_EVEX_XD, /* 356 */ IC_EVEX_XD, /* 357 */ IC_EVEX_XD, /* 358 */ IC_EVEX_XD, /* 359 */ IC_EVEX_W, /* 360 */ IC_EVEX_W, /* 361 */ IC_EVEX_W_XS, /* 362 */ IC_EVEX_W_XS, /* 363 */ IC_EVEX_W_XD, /* 364 */ IC_EVEX_W_XD, /* 365 */ IC_EVEX_W_XD, /* 366 */ IC_EVEX_W_XD, /* 367 */ IC_EVEX_OPSIZE, /* 368 */ IC_EVEX_OPSIZE, /* 369 */ IC_EVEX_OPSIZE, /* 370 */ IC_EVEX_OPSIZE, /* 371 */ IC_EVEX_OPSIZE, /* 372 */ IC_EVEX_OPSIZE, /* 373 */ IC_EVEX_OPSIZE, /* 374 */ IC_EVEX_OPSIZE, /* 375 */ IC_EVEX_W_OPSIZE, /* 376 */ IC_EVEX_W_OPSIZE, /* 377 */ IC_EVEX_W_OPSIZE, /* 378 */ IC_EVEX_W_OPSIZE, /* 379 */ IC_EVEX_W_OPSIZE, /* 380 */ IC_EVEX_W_OPSIZE, /* 381 */ IC_EVEX_W_OPSIZE, /* 382 */ IC_EVEX_W_OPSIZE, /* 383 */ IC_EVEX, /* 384 */ IC_EVEX, /* 385 */ IC_EVEX_XS, /* 386 */ IC_EVEX_XS, /* 387 */ IC_EVEX_XD, /* 388 */ IC_EVEX_XD, /* 389 */ IC_EVEX_XD, /* 390 */ IC_EVEX_XD, /* 391 */ IC_EVEX_W, /* 392 */ IC_EVEX_W, /* 393 */ IC_EVEX_W_XS, /* 394 */ IC_EVEX_W_XS, /* 395 */ IC_EVEX_W_XD, /* 396 */ IC_EVEX_W_XD, /* 397 */ IC_EVEX_W_XD, /* 398 */ IC_EVEX_W_XD, /* 399 */ IC_EVEX_OPSIZE, /* 400 */ IC_EVEX_OPSIZE, /* 401 */ IC_EVEX_OPSIZE, /* 402 */ IC_EVEX_OPSIZE, /* 403 */ IC_EVEX_OPSIZE, /* 404 */ IC_EVEX_OPSIZE, /* 405 */ IC_EVEX_OPSIZE, /* 406 */ IC_EVEX_OPSIZE, /* 407 */ IC_EVEX_W_OPSIZE, /* 408 */ IC_EVEX_W_OPSIZE, /* 409 */ IC_EVEX_W_OPSIZE, /* 410 */ IC_EVEX_W_OPSIZE, /* 411 */ IC_EVEX_W_OPSIZE, /* 412 */ IC_EVEX_W_OPSIZE, /* 413 */ IC_EVEX_W_OPSIZE, /* 414 */ IC_EVEX_W_OPSIZE, /* 415 */ IC_EVEX, /* 416 */ IC_EVEX, /* 417 */ IC_EVEX_XS, /* 418 */ IC_EVEX_XS, /* 419 */ IC_EVEX_XD, /* 420 */ IC_EVEX_XD, /* 421 */ IC_EVEX_XD, /* 422 */ IC_EVEX_XD, /* 423 */ IC_EVEX_W, /* 424 */ IC_EVEX_W, /* 425 */ IC_EVEX_W_XS, /* 426 */ IC_EVEX_W_XS, /* 427 */ IC_EVEX_W_XD, /* 428 */ IC_EVEX_W_XD, /* 429 */ IC_EVEX_W_XD, /* 430 */ IC_EVEX_W_XD, /* 431 */ IC_EVEX_OPSIZE, /* 432 */ IC_EVEX_OPSIZE, /* 433 */ IC_EVEX_OPSIZE, /* 434 */ IC_EVEX_OPSIZE, /* 435 */ IC_EVEX_OPSIZE, /* 436 */ IC_EVEX_OPSIZE, /* 437 */ IC_EVEX_OPSIZE, /* 438 */ IC_EVEX_OPSIZE, /* 439 */ IC_EVEX_W_OPSIZE, /* 440 */ IC_EVEX_W_OPSIZE, /* 441 */ IC_EVEX_W_OPSIZE, /* 442 */ IC_EVEX_W_OPSIZE, /* 443 */ IC_EVEX_W_OPSIZE, /* 444 */ IC_EVEX_W_OPSIZE, /* 445 */ IC_EVEX_W_OPSIZE, /* 446 */ IC_EVEX_W_OPSIZE, /* 447 */ IC_EVEX, /* 448 */ IC_EVEX, /* 449 */ IC_EVEX_XS, /* 450 */ IC_EVEX_XS, /* 451 */ IC_EVEX_XD, /* 452 */ IC_EVEX_XD, /* 453 */ IC_EVEX_XD, /* 454 */ IC_EVEX_XD, /* 455 */ IC_EVEX_W, /* 456 */ IC_EVEX_W, /* 457 */ IC_EVEX_W_XS, /* 458 */ IC_EVEX_W_XS, /* 459 */ IC_EVEX_W_XD, /* 460 */ IC_EVEX_W_XD, /* 461 */ IC_EVEX_W_XD, /* 462 */ IC_EVEX_W_XD, /* 463 */ IC_EVEX_OPSIZE, /* 464 */ IC_EVEX_OPSIZE, /* 465 */ IC_EVEX_OPSIZE, /* 466 */ IC_EVEX_OPSIZE, /* 467 */ IC_EVEX_OPSIZE, /* 468 */ IC_EVEX_OPSIZE, /* 469 */ IC_EVEX_OPSIZE, /* 470 */ IC_EVEX_OPSIZE, /* 471 */ IC_EVEX_W_OPSIZE, /* 472 */ IC_EVEX_W_OPSIZE, /* 473 */ IC_EVEX_W_OPSIZE, /* 474 */ IC_EVEX_W_OPSIZE, /* 475 */ IC_EVEX_W_OPSIZE, /* 476 */ IC_EVEX_W_OPSIZE, /* 477 */ IC_EVEX_W_OPSIZE, /* 478 */ IC_EVEX_W_OPSIZE, /* 479 */ IC_EVEX, /* 480 */ IC_EVEX, /* 481 */ IC_EVEX_XS, /* 482 */ IC_EVEX_XS, /* 483 */ IC_EVEX_XD, /* 484 */ IC_EVEX_XD, /* 485 */ IC_EVEX_XD, /* 486 */ IC_EVEX_XD, /* 487 */ IC_EVEX_W, /* 488 */ IC_EVEX_W, /* 489 */ IC_EVEX_W_XS, /* 490 */ IC_EVEX_W_XS, /* 491 */ IC_EVEX_W_XD, /* 492 */ IC_EVEX_W_XD, /* 493 */ IC_EVEX_W_XD, /* 494 */ IC_EVEX_W_XD, /* 495 */ IC_EVEX_OPSIZE, /* 496 */ IC_EVEX_OPSIZE, /* 497 */ IC_EVEX_OPSIZE, /* 498 */ IC_EVEX_OPSIZE, /* 499 */ IC_EVEX_OPSIZE, /* 500 */ IC_EVEX_OPSIZE, /* 501 */ IC_EVEX_OPSIZE, /* 502 */ IC_EVEX_OPSIZE, /* 503 */ IC_EVEX_W_OPSIZE, /* 504 */ IC_EVEX_W_OPSIZE, /* 505 */ IC_EVEX_W_OPSIZE, /* 506 */ IC_EVEX_W_OPSIZE, /* 507 */ IC_EVEX_W_OPSIZE, /* 508 */ IC_EVEX_W_OPSIZE, /* 509 */ IC_EVEX_W_OPSIZE, /* 510 */ IC_EVEX_W_OPSIZE, /* 511 */ IC, /* 512 */ IC_64BIT, /* 513 */ IC_XS, /* 514 */ IC_64BIT_XS, /* 515 */ IC_XD, /* 516 */ IC_64BIT_XD, /* 517 */ IC_XS, /* 518 */ IC_64BIT_XS, /* 519 */ IC, /* 520 */ IC_64BIT_REXW, /* 521 */ IC_XS, /* 522 */ IC_64BIT_REXW_XS, /* 523 */ IC_XD, /* 524 */ IC_64BIT_REXW_XD, /* 525 */ IC_XS, /* 526 */ IC_64BIT_REXW_XS, /* 527 */ IC_OPSIZE, /* 528 */ IC_64BIT_OPSIZE, /* 529 */ IC_XS_OPSIZE, /* 530 */ IC_64BIT_XS_OPSIZE, /* 531 */ IC_XD_OPSIZE, /* 532 */ IC_64BIT_XD_OPSIZE, /* 533 */ IC_XS_OPSIZE, /* 534 */ IC_64BIT_XD_OPSIZE, /* 535 */ IC_OPSIZE, /* 536 */ IC_64BIT_REXW_OPSIZE, /* 537 */ IC_XS_OPSIZE, /* 538 */ IC_64BIT_REXW_XS, /* 539 */ IC_XD_OPSIZE, /* 540 */ IC_64BIT_REXW_XD, /* 541 */ IC_XS_OPSIZE, /* 542 */ IC_64BIT_REXW_XS, /* 543 */ IC_ADSIZE, /* 544 */ IC_64BIT_ADSIZE, /* 545 */ IC_XS, /* 546 */ IC_64BIT_XS, /* 547 */ IC_XD, /* 548 */ IC_64BIT_XD, /* 549 */ IC_XS, /* 550 */ IC_64BIT_XS, /* 551 */ IC_ADSIZE, /* 552 */ IC_64BIT_REXW_ADSIZE, /* 553 */ IC_XS, /* 554 */ IC_64BIT_REXW_XS, /* 555 */ IC_XD, /* 556 */ IC_64BIT_REXW_XD, /* 557 */ IC_XS, /* 558 */ IC_64BIT_REXW_XS, /* 559 */ IC_OPSIZE_ADSIZE, /* 560 */ IC_64BIT_OPSIZE_ADSIZE, /* 561 */ IC_XS_OPSIZE, /* 562 */ IC_64BIT_XS_OPSIZE, /* 563 */ IC_XD_OPSIZE, /* 564 */ IC_64BIT_XD_OPSIZE, /* 565 */ IC_XS_OPSIZE, /* 566 */ IC_64BIT_XD_OPSIZE, /* 567 */ IC_OPSIZE_ADSIZE, /* 568 */ IC_64BIT_REXW_OPSIZE, /* 569 */ IC_XS_OPSIZE, /* 570 */ IC_64BIT_REXW_XS, /* 571 */ IC_XD_OPSIZE, /* 572 */ IC_64BIT_REXW_XD, /* 573 */ IC_XS_OPSIZE, /* 574 */ IC_64BIT_REXW_XS, /* 575 */ IC_VEX, /* 576 */ IC_VEX, /* 577 */ IC_VEX_XS, /* 578 */ IC_VEX_XS, /* 579 */ IC_VEX_XD, /* 580 */ IC_VEX_XD, /* 581 */ IC_VEX_XD, /* 582 */ IC_VEX_XD, /* 583 */ IC_VEX_W, /* 584 */ IC_VEX_W, /* 585 */ IC_VEX_W_XS, /* 586 */ IC_VEX_W_XS, /* 587 */ IC_VEX_W_XD, /* 588 */ IC_VEX_W_XD, /* 589 */ IC_VEX_W_XD, /* 590 */ IC_VEX_W_XD, /* 591 */ IC_VEX_OPSIZE, /* 592 */ IC_VEX_OPSIZE, /* 593 */ IC_VEX_OPSIZE, /* 594 */ IC_VEX_OPSIZE, /* 595 */ IC_VEX_OPSIZE, /* 596 */ IC_VEX_OPSIZE, /* 597 */ IC_VEX_OPSIZE, /* 598 */ IC_VEX_OPSIZE, /* 599 */ IC_VEX_W_OPSIZE, /* 600 */ IC_VEX_W_OPSIZE, /* 601 */ IC_VEX_W_OPSIZE, /* 602 */ IC_VEX_W_OPSIZE, /* 603 */ IC_VEX_W_OPSIZE, /* 604 */ IC_VEX_W_OPSIZE, /* 605 */ IC_VEX_W_OPSIZE, /* 606 */ IC_VEX_W_OPSIZE, /* 607 */ IC_VEX, /* 608 */ IC_VEX, /* 609 */ IC_VEX_XS, /* 610 */ IC_VEX_XS, /* 611 */ IC_VEX_XD, /* 612 */ IC_VEX_XD, /* 613 */ IC_VEX_XD, /* 614 */ IC_VEX_XD, /* 615 */ IC_VEX_W, /* 616 */ IC_VEX_W, /* 617 */ IC_VEX_W_XS, /* 618 */ IC_VEX_W_XS, /* 619 */ IC_VEX_W_XD, /* 620 */ IC_VEX_W_XD, /* 621 */ IC_VEX_W_XD, /* 622 */ IC_VEX_W_XD, /* 623 */ IC_VEX_OPSIZE, /* 624 */ IC_VEX_OPSIZE, /* 625 */ IC_VEX_OPSIZE, /* 626 */ IC_VEX_OPSIZE, /* 627 */ IC_VEX_OPSIZE, /* 628 */ IC_VEX_OPSIZE, /* 629 */ IC_VEX_OPSIZE, /* 630 */ IC_VEX_OPSIZE, /* 631 */ IC_VEX_W_OPSIZE, /* 632 */ IC_VEX_W_OPSIZE, /* 633 */ IC_VEX_W_OPSIZE, /* 634 */ IC_VEX_W_OPSIZE, /* 635 */ IC_VEX_W_OPSIZE, /* 636 */ IC_VEX_W_OPSIZE, /* 637 */ IC_VEX_W_OPSIZE, /* 638 */ IC_VEX_W_OPSIZE, /* 639 */ IC_VEX_L, /* 640 */ IC_VEX_L, /* 641 */ IC_VEX_L_XS, /* 642 */ IC_VEX_L_XS, /* 643 */ IC_VEX_L_XD, /* 644 */ IC_VEX_L_XD, /* 645 */ IC_VEX_L_XD, /* 646 */ IC_VEX_L_XD, /* 647 */ IC_VEX_L_W, /* 648 */ IC_VEX_L_W, /* 649 */ IC_VEX_L_W_XS, /* 650 */ IC_VEX_L_W_XS, /* 651 */ IC_VEX_L_W_XD, /* 652 */ IC_VEX_L_W_XD, /* 653 */ IC_VEX_L_W_XD, /* 654 */ IC_VEX_L_W_XD, /* 655 */ IC_VEX_L_OPSIZE, /* 656 */ IC_VEX_L_OPSIZE, /* 657 */ IC_VEX_L_OPSIZE, /* 658 */ IC_VEX_L_OPSIZE, /* 659 */ IC_VEX_L_OPSIZE, /* 660 */ IC_VEX_L_OPSIZE, /* 661 */ IC_VEX_L_OPSIZE, /* 662 */ IC_VEX_L_OPSIZE, /* 663 */ IC_VEX_L_W_OPSIZE, /* 664 */ IC_VEX_L_W_OPSIZE, /* 665 */ IC_VEX_L_W_OPSIZE, /* 666 */ IC_VEX_L_W_OPSIZE, /* 667 */ IC_VEX_L_W_OPSIZE, /* 668 */ IC_VEX_L_W_OPSIZE, /* 669 */ IC_VEX_L_W_OPSIZE, /* 670 */ IC_VEX_L_W_OPSIZE, /* 671 */ IC_VEX_L, /* 672 */ IC_VEX_L, /* 673 */ IC_VEX_L_XS, /* 674 */ IC_VEX_L_XS, /* 675 */ IC_VEX_L_XD, /* 676 */ IC_VEX_L_XD, /* 677 */ IC_VEX_L_XD, /* 678 */ IC_VEX_L_XD, /* 679 */ IC_VEX_L_W, /* 680 */ IC_VEX_L_W, /* 681 */ IC_VEX_L_W_XS, /* 682 */ IC_VEX_L_W_XS, /* 683 */ IC_VEX_L_W_XD, /* 684 */ IC_VEX_L_W_XD, /* 685 */ IC_VEX_L_W_XD, /* 686 */ IC_VEX_L_W_XD, /* 687 */ IC_VEX_L_OPSIZE, /* 688 */ IC_VEX_L_OPSIZE, /* 689 */ IC_VEX_L_OPSIZE, /* 690 */ IC_VEX_L_OPSIZE, /* 691 */ IC_VEX_L_OPSIZE, /* 692 */ IC_VEX_L_OPSIZE, /* 693 */ IC_VEX_L_OPSIZE, /* 694 */ IC_VEX_L_OPSIZE, /* 695 */ IC_VEX_L_W_OPSIZE, /* 696 */ IC_VEX_L_W_OPSIZE, /* 697 */ IC_VEX_L_W_OPSIZE, /* 698 */ IC_VEX_L_W_OPSIZE, /* 699 */ IC_VEX_L_W_OPSIZE, /* 700 */ IC_VEX_L_W_OPSIZE, /* 701 */ IC_VEX_L_W_OPSIZE, /* 702 */ IC_VEX_L_W_OPSIZE, /* 703 */ IC_VEX_L, /* 704 */ IC_VEX_L, /* 705 */ IC_VEX_L_XS, /* 706 */ IC_VEX_L_XS, /* 707 */ IC_VEX_L_XD, /* 708 */ IC_VEX_L_XD, /* 709 */ IC_VEX_L_XD, /* 710 */ IC_VEX_L_XD, /* 711 */ IC_VEX_L_W, /* 712 */ IC_VEX_L_W, /* 713 */ IC_VEX_L_W_XS, /* 714 */ IC_VEX_L_W_XS, /* 715 */ IC_VEX_L_W_XD, /* 716 */ IC_VEX_L_W_XD, /* 717 */ IC_VEX_L_W_XD, /* 718 */ IC_VEX_L_W_XD, /* 719 */ IC_VEX_L_OPSIZE, /* 720 */ IC_VEX_L_OPSIZE, /* 721 */ IC_VEX_L_OPSIZE, /* 722 */ IC_VEX_L_OPSIZE, /* 723 */ IC_VEX_L_OPSIZE, /* 724 */ IC_VEX_L_OPSIZE, /* 725 */ IC_VEX_L_OPSIZE, /* 726 */ IC_VEX_L_OPSIZE, /* 727 */ IC_VEX_L_W_OPSIZE, /* 728 */ IC_VEX_L_W_OPSIZE, /* 729 */ IC_VEX_L_W_OPSIZE, /* 730 */ IC_VEX_L_W_OPSIZE, /* 731 */ IC_VEX_L_W_OPSIZE, /* 732 */ IC_VEX_L_W_OPSIZE, /* 733 */ IC_VEX_L_W_OPSIZE, /* 734 */ IC_VEX_L_W_OPSIZE, /* 735 */ IC_VEX_L, /* 736 */ IC_VEX_L, /* 737 */ IC_VEX_L_XS, /* 738 */ IC_VEX_L_XS, /* 739 */ IC_VEX_L_XD, /* 740 */ IC_VEX_L_XD, /* 741 */ IC_VEX_L_XD, /* 742 */ IC_VEX_L_XD, /* 743 */ IC_VEX_L_W, /* 744 */ IC_VEX_L_W, /* 745 */ IC_VEX_L_W_XS, /* 746 */ IC_VEX_L_W_XS, /* 747 */ IC_VEX_L_W_XD, /* 748 */ IC_VEX_L_W_XD, /* 749 */ IC_VEX_L_W_XD, /* 750 */ IC_VEX_L_W_XD, /* 751 */ IC_VEX_L_OPSIZE, /* 752 */ IC_VEX_L_OPSIZE, /* 753 */ IC_VEX_L_OPSIZE, /* 754 */ IC_VEX_L_OPSIZE, /* 755 */ IC_VEX_L_OPSIZE, /* 756 */ IC_VEX_L_OPSIZE, /* 757 */ IC_VEX_L_OPSIZE, /* 758 */ IC_VEX_L_OPSIZE, /* 759 */ IC_VEX_L_W_OPSIZE, /* 760 */ IC_VEX_L_W_OPSIZE, /* 761 */ IC_VEX_L_W_OPSIZE, /* 762 */ IC_VEX_L_W_OPSIZE, /* 763 */ IC_VEX_L_W_OPSIZE, /* 764 */ IC_VEX_L_W_OPSIZE, /* 765 */ IC_VEX_L_W_OPSIZE, /* 766 */ IC_VEX_L_W_OPSIZE, /* 767 */ IC_EVEX_L, /* 768 */ IC_EVEX_L, /* 769 */ IC_EVEX_L_XS, /* 770 */ IC_EVEX_L_XS, /* 771 */ IC_EVEX_L_XD, /* 772 */ IC_EVEX_L_XD, /* 773 */ IC_EVEX_L_XD, /* 774 */ IC_EVEX_L_XD, /* 775 */ IC_EVEX_L_W, /* 776 */ IC_EVEX_L_W, /* 777 */ IC_EVEX_L_W_XS, /* 778 */ IC_EVEX_L_W_XS, /* 779 */ IC_EVEX_L_W_XD, /* 780 */ IC_EVEX_L_W_XD, /* 781 */ IC_EVEX_L_W_XD, /* 782 */ IC_EVEX_L_W_XD, /* 783 */ IC_EVEX_L_OPSIZE, /* 784 */ IC_EVEX_L_OPSIZE, /* 785 */ IC_EVEX_L_OPSIZE, /* 786 */ IC_EVEX_L_OPSIZE, /* 787 */ IC_EVEX_L_OPSIZE, /* 788 */ IC_EVEX_L_OPSIZE, /* 789 */ IC_EVEX_L_OPSIZE, /* 790 */ IC_EVEX_L_OPSIZE, /* 791 */ IC_EVEX_L_W_OPSIZE, /* 792 */ IC_EVEX_L_W_OPSIZE, /* 793 */ IC_EVEX_L_W_OPSIZE, /* 794 */ IC_EVEX_L_W_OPSIZE, /* 795 */ IC_EVEX_L_W_OPSIZE, /* 796 */ IC_EVEX_L_W_OPSIZE, /* 797 */ IC_EVEX_L_W_OPSIZE, /* 798 */ IC_EVEX_L_W_OPSIZE, /* 799 */ IC_EVEX_L, /* 800 */ IC_EVEX_L, /* 801 */ IC_EVEX_L_XS, /* 802 */ IC_EVEX_L_XS, /* 803 */ IC_EVEX_L_XD, /* 804 */ IC_EVEX_L_XD, /* 805 */ IC_EVEX_L_XD, /* 806 */ IC_EVEX_L_XD, /* 807 */ IC_EVEX_L_W, /* 808 */ IC_EVEX_L_W, /* 809 */ IC_EVEX_L_W_XS, /* 810 */ IC_EVEX_L_W_XS, /* 811 */ IC_EVEX_L_W_XD, /* 812 */ IC_EVEX_L_W_XD, /* 813 */ IC_EVEX_L_W_XD, /* 814 */ IC_EVEX_L_W_XD, /* 815 */ IC_EVEX_L_OPSIZE, /* 816 */ IC_EVEX_L_OPSIZE, /* 817 */ IC_EVEX_L_OPSIZE, /* 818 */ IC_EVEX_L_OPSIZE, /* 819 */ IC_EVEX_L_OPSIZE, /* 820 */ IC_EVEX_L_OPSIZE, /* 821 */ IC_EVEX_L_OPSIZE, /* 822 */ IC_EVEX_L_OPSIZE, /* 823 */ IC_EVEX_L_W_OPSIZE, /* 824 */ IC_EVEX_L_W_OPSIZE, /* 825 */ IC_EVEX_L_W_OPSIZE, /* 826 */ IC_EVEX_L_W_OPSIZE, /* 827 */ IC_EVEX_L_W_OPSIZE, /* 828 */ IC_EVEX_L_W_OPSIZE, /* 829 */ IC_EVEX_L_W_OPSIZE, /* 830 */ IC_EVEX_L_W_OPSIZE, /* 831 */ IC_EVEX_L, /* 832 */ IC_EVEX_L, /* 833 */ IC_EVEX_L_XS, /* 834 */ IC_EVEX_L_XS, /* 835 */ IC_EVEX_L_XD, /* 836 */ IC_EVEX_L_XD, /* 837 */ IC_EVEX_L_XD, /* 838 */ IC_EVEX_L_XD, /* 839 */ IC_EVEX_L_W, /* 840 */ IC_EVEX_L_W, /* 841 */ IC_EVEX_L_W_XS, /* 842 */ IC_EVEX_L_W_XS, /* 843 */ IC_EVEX_L_W_XD, /* 844 */ IC_EVEX_L_W_XD, /* 845 */ IC_EVEX_L_W_XD, /* 846 */ IC_EVEX_L_W_XD, /* 847 */ IC_EVEX_L_OPSIZE, /* 848 */ IC_EVEX_L_OPSIZE, /* 849 */ IC_EVEX_L_OPSIZE, /* 850 */ IC_EVEX_L_OPSIZE, /* 851 */ IC_EVEX_L_OPSIZE, /* 852 */ IC_EVEX_L_OPSIZE, /* 853 */ IC_EVEX_L_OPSIZE, /* 854 */ IC_EVEX_L_OPSIZE, /* 855 */ IC_EVEX_L_W_OPSIZE, /* 856 */ IC_EVEX_L_W_OPSIZE, /* 857 */ IC_EVEX_L_W_OPSIZE, /* 858 */ IC_EVEX_L_W_OPSIZE, /* 859 */ IC_EVEX_L_W_OPSIZE, /* 860 */ IC_EVEX_L_W_OPSIZE, /* 861 */ IC_EVEX_L_W_OPSIZE, /* 862 */ IC_EVEX_L_W_OPSIZE, /* 863 */ IC_EVEX_L, /* 864 */ IC_EVEX_L, /* 865 */ IC_EVEX_L_XS, /* 866 */ IC_EVEX_L_XS, /* 867 */ IC_EVEX_L_XD, /* 868 */ IC_EVEX_L_XD, /* 869 */ IC_EVEX_L_XD, /* 870 */ IC_EVEX_L_XD, /* 871 */ IC_EVEX_L_W, /* 872 */ IC_EVEX_L_W, /* 873 */ IC_EVEX_L_W_XS, /* 874 */ IC_EVEX_L_W_XS, /* 875 */ IC_EVEX_L_W_XD, /* 876 */ IC_EVEX_L_W_XD, /* 877 */ IC_EVEX_L_W_XD, /* 878 */ IC_EVEX_L_W_XD, /* 879 */ IC_EVEX_L_OPSIZE, /* 880 */ IC_EVEX_L_OPSIZE, /* 881 */ IC_EVEX_L_OPSIZE, /* 882 */ IC_EVEX_L_OPSIZE, /* 883 */ IC_EVEX_L_OPSIZE, /* 884 */ IC_EVEX_L_OPSIZE, /* 885 */ IC_EVEX_L_OPSIZE, /* 886 */ IC_EVEX_L_OPSIZE, /* 887 */ IC_EVEX_L_W_OPSIZE, /* 888 */ IC_EVEX_L_W_OPSIZE, /* 889 */ IC_EVEX_L_W_OPSIZE, /* 890 */ IC_EVEX_L_W_OPSIZE, /* 891 */ IC_EVEX_L_W_OPSIZE, /* 892 */ IC_EVEX_L_W_OPSIZE, /* 893 */ IC_EVEX_L_W_OPSIZE, /* 894 */ IC_EVEX_L_W_OPSIZE, /* 895 */ IC_EVEX_L, /* 896 */ IC_EVEX_L, /* 897 */ IC_EVEX_L_XS, /* 898 */ IC_EVEX_L_XS, /* 899 */ IC_EVEX_L_XD, /* 900 */ IC_EVEX_L_XD, /* 901 */ IC_EVEX_L_XD, /* 902 */ IC_EVEX_L_XD, /* 903 */ IC_EVEX_L_W, /* 904 */ IC_EVEX_L_W, /* 905 */ IC_EVEX_L_W_XS, /* 906 */ IC_EVEX_L_W_XS, /* 907 */ IC_EVEX_L_W_XD, /* 908 */ IC_EVEX_L_W_XD, /* 909 */ IC_EVEX_L_W_XD, /* 910 */ IC_EVEX_L_W_XD, /* 911 */ IC_EVEX_L_OPSIZE, /* 912 */ IC_EVEX_L_OPSIZE, /* 913 */ IC_EVEX_L_OPSIZE, /* 914 */ IC_EVEX_L_OPSIZE, /* 915 */ IC_EVEX_L_OPSIZE, /* 916 */ IC_EVEX_L_OPSIZE, /* 917 */ IC_EVEX_L_OPSIZE, /* 918 */ IC_EVEX_L_OPSIZE, /* 919 */ IC_EVEX_L_W_OPSIZE, /* 920 */ IC_EVEX_L_W_OPSIZE, /* 921 */ IC_EVEX_L_W_OPSIZE, /* 922 */ IC_EVEX_L_W_OPSIZE, /* 923 */ IC_EVEX_L_W_OPSIZE, /* 924 */ IC_EVEX_L_W_OPSIZE, /* 925 */ IC_EVEX_L_W_OPSIZE, /* 926 */ IC_EVEX_L_W_OPSIZE, /* 927 */ IC_EVEX_L, /* 928 */ IC_EVEX_L, /* 929 */ IC_EVEX_L_XS, /* 930 */ IC_EVEX_L_XS, /* 931 */ IC_EVEX_L_XD, /* 932 */ IC_EVEX_L_XD, /* 933 */ IC_EVEX_L_XD, /* 934 */ IC_EVEX_L_XD, /* 935 */ IC_EVEX_L_W, /* 936 */ IC_EVEX_L_W, /* 937 */ IC_EVEX_L_W_XS, /* 938 */ IC_EVEX_L_W_XS, /* 939 */ IC_EVEX_L_W_XD, /* 940 */ IC_EVEX_L_W_XD, /* 941 */ IC_EVEX_L_W_XD, /* 942 */ IC_EVEX_L_W_XD, /* 943 */ IC_EVEX_L_OPSIZE, /* 944 */ IC_EVEX_L_OPSIZE, /* 945 */ IC_EVEX_L_OPSIZE, /* 946 */ IC_EVEX_L_OPSIZE, /* 947 */ IC_EVEX_L_OPSIZE, /* 948 */ IC_EVEX_L_OPSIZE, /* 949 */ IC_EVEX_L_OPSIZE, /* 950 */ IC_EVEX_L_OPSIZE, /* 951 */ IC_EVEX_L_W_OPSIZE, /* 952 */ IC_EVEX_L_W_OPSIZE, /* 953 */ IC_EVEX_L_W_OPSIZE, /* 954 */ IC_EVEX_L_W_OPSIZE, /* 955 */ IC_EVEX_L_W_OPSIZE, /* 956 */ IC_EVEX_L_W_OPSIZE, /* 957 */ IC_EVEX_L_W_OPSIZE, /* 958 */ IC_EVEX_L_W_OPSIZE, /* 959 */ IC_EVEX_L, /* 960 */ IC_EVEX_L, /* 961 */ IC_EVEX_L_XS, /* 962 */ IC_EVEX_L_XS, /* 963 */ IC_EVEX_L_XD, /* 964 */ IC_EVEX_L_XD, /* 965 */ IC_EVEX_L_XD, /* 966 */ IC_EVEX_L_XD, /* 967 */ IC_EVEX_L_W, /* 968 */ IC_EVEX_L_W, /* 969 */ IC_EVEX_L_W_XS, /* 970 */ IC_EVEX_L_W_XS, /* 971 */ IC_EVEX_L_W_XD, /* 972 */ IC_EVEX_L_W_XD, /* 973 */ IC_EVEX_L_W_XD, /* 974 */ IC_EVEX_L_W_XD, /* 975 */ IC_EVEX_L_OPSIZE, /* 976 */ IC_EVEX_L_OPSIZE, /* 977 */ IC_EVEX_L_OPSIZE, /* 978 */ IC_EVEX_L_OPSIZE, /* 979 */ IC_EVEX_L_OPSIZE, /* 980 */ IC_EVEX_L_OPSIZE, /* 981 */ IC_EVEX_L_OPSIZE, /* 982 */ IC_EVEX_L_OPSIZE, /* 983 */ IC_EVEX_L_W_OPSIZE, /* 984 */ IC_EVEX_L_W_OPSIZE, /* 985 */ IC_EVEX_L_W_OPSIZE, /* 986 */ IC_EVEX_L_W_OPSIZE, /* 987 */ IC_EVEX_L_W_OPSIZE, /* 988 */ IC_EVEX_L_W_OPSIZE, /* 989 */ IC_EVEX_L_W_OPSIZE, /* 990 */ IC_EVEX_L_W_OPSIZE, /* 991 */ IC_EVEX_L, /* 992 */ IC_EVEX_L, /* 993 */ IC_EVEX_L_XS, /* 994 */ IC_EVEX_L_XS, /* 995 */ IC_EVEX_L_XD, /* 996 */ IC_EVEX_L_XD, /* 997 */ IC_EVEX_L_XD, /* 998 */ IC_EVEX_L_XD, /* 999 */ IC_EVEX_L_W, /* 1000 */ IC_EVEX_L_W, /* 1001 */ IC_EVEX_L_W_XS, /* 1002 */ IC_EVEX_L_W_XS, /* 1003 */ IC_EVEX_L_W_XD, /* 1004 */ IC_EVEX_L_W_XD, /* 1005 */ IC_EVEX_L_W_XD, /* 1006 */ IC_EVEX_L_W_XD, /* 1007 */ IC_EVEX_L_OPSIZE, /* 1008 */ IC_EVEX_L_OPSIZE, /* 1009 */ IC_EVEX_L_OPSIZE, /* 1010 */ IC_EVEX_L_OPSIZE, /* 1011 */ IC_EVEX_L_OPSIZE, /* 1012 */ IC_EVEX_L_OPSIZE, /* 1013 */ IC_EVEX_L_OPSIZE, /* 1014 */ IC_EVEX_L_OPSIZE, /* 1015 */ IC_EVEX_L_W_OPSIZE, /* 1016 */ IC_EVEX_L_W_OPSIZE, /* 1017 */ IC_EVEX_L_W_OPSIZE, /* 1018 */ IC_EVEX_L_W_OPSIZE, /* 1019 */ IC_EVEX_L_W_OPSIZE, /* 1020 */ IC_EVEX_L_W_OPSIZE, /* 1021 */ IC_EVEX_L_W_OPSIZE, /* 1022 */ IC_EVEX_L_W_OPSIZE, /* 1023 */ IC, /* 1024 */ IC_64BIT, /* 1025 */ IC_XS, /* 1026 */ IC_64BIT_XS, /* 1027 */ IC_XD, /* 1028 */ IC_64BIT_XD, /* 1029 */ IC_XS, /* 1030 */ IC_64BIT_XS, /* 1031 */ IC, /* 1032 */ IC_64BIT_REXW, /* 1033 */ IC_XS, /* 1034 */ IC_64BIT_REXW_XS, /* 1035 */ IC_XD, /* 1036 */ IC_64BIT_REXW_XD, /* 1037 */ IC_XS, /* 1038 */ IC_64BIT_REXW_XS, /* 1039 */ IC_OPSIZE, /* 1040 */ IC_64BIT_OPSIZE, /* 1041 */ IC_XS_OPSIZE, /* 1042 */ IC_64BIT_XS_OPSIZE, /* 1043 */ IC_XD_OPSIZE, /* 1044 */ IC_64BIT_XD_OPSIZE, /* 1045 */ IC_XS_OPSIZE, /* 1046 */ IC_64BIT_XD_OPSIZE, /* 1047 */ IC_OPSIZE, /* 1048 */ IC_64BIT_REXW_OPSIZE, /* 1049 */ IC_XS_OPSIZE, /* 1050 */ IC_64BIT_REXW_XS, /* 1051 */ IC_XD_OPSIZE, /* 1052 */ IC_64BIT_REXW_XD, /* 1053 */ IC_XS_OPSIZE, /* 1054 */ IC_64BIT_REXW_XS, /* 1055 */ IC_ADSIZE, /* 1056 */ IC_64BIT_ADSIZE, /* 1057 */ IC_XS, /* 1058 */ IC_64BIT_XS, /* 1059 */ IC_XD, /* 1060 */ IC_64BIT_XD, /* 1061 */ IC_XS, /* 1062 */ IC_64BIT_XS, /* 1063 */ IC_ADSIZE, /* 1064 */ IC_64BIT_REXW_ADSIZE, /* 1065 */ IC_XS, /* 1066 */ IC_64BIT_REXW_XS, /* 1067 */ IC_XD, /* 1068 */ IC_64BIT_REXW_XD, /* 1069 */ IC_XS, /* 1070 */ IC_64BIT_REXW_XS, /* 1071 */ IC_OPSIZE_ADSIZE, /* 1072 */ IC_64BIT_OPSIZE_ADSIZE, /* 1073 */ IC_XS_OPSIZE, /* 1074 */ IC_64BIT_XS_OPSIZE, /* 1075 */ IC_XD_OPSIZE, /* 1076 */ IC_64BIT_XD_OPSIZE, /* 1077 */ IC_XS_OPSIZE, /* 1078 */ IC_64BIT_XD_OPSIZE, /* 1079 */ IC_OPSIZE_ADSIZE, /* 1080 */ IC_64BIT_REXW_OPSIZE, /* 1081 */ IC_XS_OPSIZE, /* 1082 */ IC_64BIT_REXW_XS, /* 1083 */ IC_XD_OPSIZE, /* 1084 */ IC_64BIT_REXW_XD, /* 1085 */ IC_XS_OPSIZE, /* 1086 */ IC_64BIT_REXW_XS, /* 1087 */ IC_VEX, /* 1088 */ IC_VEX, /* 1089 */ IC_VEX_XS, /* 1090 */ IC_VEX_XS, /* 1091 */ IC_VEX_XD, /* 1092 */ IC_VEX_XD, /* 1093 */ IC_VEX_XD, /* 1094 */ IC_VEX_XD, /* 1095 */ IC_VEX_W, /* 1096 */ IC_VEX_W, /* 1097 */ IC_VEX_W_XS, /* 1098 */ IC_VEX_W_XS, /* 1099 */ IC_VEX_W_XD, /* 1100 */ IC_VEX_W_XD, /* 1101 */ IC_VEX_W_XD, /* 1102 */ IC_VEX_W_XD, /* 1103 */ IC_VEX_OPSIZE, /* 1104 */ IC_VEX_OPSIZE, /* 1105 */ IC_VEX_OPSIZE, /* 1106 */ IC_VEX_OPSIZE, /* 1107 */ IC_VEX_OPSIZE, /* 1108 */ IC_VEX_OPSIZE, /* 1109 */ IC_VEX_OPSIZE, /* 1110 */ IC_VEX_OPSIZE, /* 1111 */ IC_VEX_W_OPSIZE, /* 1112 */ IC_VEX_W_OPSIZE, /* 1113 */ IC_VEX_W_OPSIZE, /* 1114 */ IC_VEX_W_OPSIZE, /* 1115 */ IC_VEX_W_OPSIZE, /* 1116 */ IC_VEX_W_OPSIZE, /* 1117 */ IC_VEX_W_OPSIZE, /* 1118 */ IC_VEX_W_OPSIZE, /* 1119 */ IC_VEX, /* 1120 */ IC_VEX, /* 1121 */ IC_VEX_XS, /* 1122 */ IC_VEX_XS, /* 1123 */ IC_VEX_XD, /* 1124 */ IC_VEX_XD, /* 1125 */ IC_VEX_XD, /* 1126 */ IC_VEX_XD, /* 1127 */ IC_VEX_W, /* 1128 */ IC_VEX_W, /* 1129 */ IC_VEX_W_XS, /* 1130 */ IC_VEX_W_XS, /* 1131 */ IC_VEX_W_XD, /* 1132 */ IC_VEX_W_XD, /* 1133 */ IC_VEX_W_XD, /* 1134 */ IC_VEX_W_XD, /* 1135 */ IC_VEX_OPSIZE, /* 1136 */ IC_VEX_OPSIZE, /* 1137 */ IC_VEX_OPSIZE, /* 1138 */ IC_VEX_OPSIZE, /* 1139 */ IC_VEX_OPSIZE, /* 1140 */ IC_VEX_OPSIZE, /* 1141 */ IC_VEX_OPSIZE, /* 1142 */ IC_VEX_OPSIZE, /* 1143 */ IC_VEX_W_OPSIZE, /* 1144 */ IC_VEX_W_OPSIZE, /* 1145 */ IC_VEX_W_OPSIZE, /* 1146 */ IC_VEX_W_OPSIZE, /* 1147 */ IC_VEX_W_OPSIZE, /* 1148 */ IC_VEX_W_OPSIZE, /* 1149 */ IC_VEX_W_OPSIZE, /* 1150 */ IC_VEX_W_OPSIZE, /* 1151 */ IC_VEX_L, /* 1152 */ IC_VEX_L, /* 1153 */ IC_VEX_L_XS, /* 1154 */ IC_VEX_L_XS, /* 1155 */ IC_VEX_L_XD, /* 1156 */ IC_VEX_L_XD, /* 1157 */ IC_VEX_L_XD, /* 1158 */ IC_VEX_L_XD, /* 1159 */ IC_VEX_L_W, /* 1160 */ IC_VEX_L_W, /* 1161 */ IC_VEX_L_W_XS, /* 1162 */ IC_VEX_L_W_XS, /* 1163 */ IC_VEX_L_W_XD, /* 1164 */ IC_VEX_L_W_XD, /* 1165 */ IC_VEX_L_W_XD, /* 1166 */ IC_VEX_L_W_XD, /* 1167 */ IC_VEX_L_OPSIZE, /* 1168 */ IC_VEX_L_OPSIZE, /* 1169 */ IC_VEX_L_OPSIZE, /* 1170 */ IC_VEX_L_OPSIZE, /* 1171 */ IC_VEX_L_OPSIZE, /* 1172 */ IC_VEX_L_OPSIZE, /* 1173 */ IC_VEX_L_OPSIZE, /* 1174 */ IC_VEX_L_OPSIZE, /* 1175 */ IC_VEX_L_W_OPSIZE, /* 1176 */ IC_VEX_L_W_OPSIZE, /* 1177 */ IC_VEX_L_W_OPSIZE, /* 1178 */ IC_VEX_L_W_OPSIZE, /* 1179 */ IC_VEX_L_W_OPSIZE, /* 1180 */ IC_VEX_L_W_OPSIZE, /* 1181 */ IC_VEX_L_W_OPSIZE, /* 1182 */ IC_VEX_L_W_OPSIZE, /* 1183 */ IC_VEX_L, /* 1184 */ IC_VEX_L, /* 1185 */ IC_VEX_L_XS, /* 1186 */ IC_VEX_L_XS, /* 1187 */ IC_VEX_L_XD, /* 1188 */ IC_VEX_L_XD, /* 1189 */ IC_VEX_L_XD, /* 1190 */ IC_VEX_L_XD, /* 1191 */ IC_VEX_L_W, /* 1192 */ IC_VEX_L_W, /* 1193 */ IC_VEX_L_W_XS, /* 1194 */ IC_VEX_L_W_XS, /* 1195 */ IC_VEX_L_W_XD, /* 1196 */ IC_VEX_L_W_XD, /* 1197 */ IC_VEX_L_W_XD, /* 1198 */ IC_VEX_L_W_XD, /* 1199 */ IC_VEX_L_OPSIZE, /* 1200 */ IC_VEX_L_OPSIZE, /* 1201 */ IC_VEX_L_OPSIZE, /* 1202 */ IC_VEX_L_OPSIZE, /* 1203 */ IC_VEX_L_OPSIZE, /* 1204 */ IC_VEX_L_OPSIZE, /* 1205 */ IC_VEX_L_OPSIZE, /* 1206 */ IC_VEX_L_OPSIZE, /* 1207 */ IC_VEX_L_W_OPSIZE, /* 1208 */ IC_VEX_L_W_OPSIZE, /* 1209 */ IC_VEX_L_W_OPSIZE, /* 1210 */ IC_VEX_L_W_OPSIZE, /* 1211 */ IC_VEX_L_W_OPSIZE, /* 1212 */ IC_VEX_L_W_OPSIZE, /* 1213 */ IC_VEX_L_W_OPSIZE, /* 1214 */ IC_VEX_L_W_OPSIZE, /* 1215 */ IC_VEX_L, /* 1216 */ IC_VEX_L, /* 1217 */ IC_VEX_L_XS, /* 1218 */ IC_VEX_L_XS, /* 1219 */ IC_VEX_L_XD, /* 1220 */ IC_VEX_L_XD, /* 1221 */ IC_VEX_L_XD, /* 1222 */ IC_VEX_L_XD, /* 1223 */ IC_VEX_L_W, /* 1224 */ IC_VEX_L_W, /* 1225 */ IC_VEX_L_W_XS, /* 1226 */ IC_VEX_L_W_XS, /* 1227 */ IC_VEX_L_W_XD, /* 1228 */ IC_VEX_L_W_XD, /* 1229 */ IC_VEX_L_W_XD, /* 1230 */ IC_VEX_L_W_XD, /* 1231 */ IC_VEX_L_OPSIZE, /* 1232 */ IC_VEX_L_OPSIZE, /* 1233 */ IC_VEX_L_OPSIZE, /* 1234 */ IC_VEX_L_OPSIZE, /* 1235 */ IC_VEX_L_OPSIZE, /* 1236 */ IC_VEX_L_OPSIZE, /* 1237 */ IC_VEX_L_OPSIZE, /* 1238 */ IC_VEX_L_OPSIZE, /* 1239 */ IC_VEX_L_W_OPSIZE, /* 1240 */ IC_VEX_L_W_OPSIZE, /* 1241 */ IC_VEX_L_W_OPSIZE, /* 1242 */ IC_VEX_L_W_OPSIZE, /* 1243 */ IC_VEX_L_W_OPSIZE, /* 1244 */ IC_VEX_L_W_OPSIZE, /* 1245 */ IC_VEX_L_W_OPSIZE, /* 1246 */ IC_VEX_L_W_OPSIZE, /* 1247 */ IC_VEX_L, /* 1248 */ IC_VEX_L, /* 1249 */ IC_VEX_L_XS, /* 1250 */ IC_VEX_L_XS, /* 1251 */ IC_VEX_L_XD, /* 1252 */ IC_VEX_L_XD, /* 1253 */ IC_VEX_L_XD, /* 1254 */ IC_VEX_L_XD, /* 1255 */ IC_VEX_L_W, /* 1256 */ IC_VEX_L_W, /* 1257 */ IC_VEX_L_W_XS, /* 1258 */ IC_VEX_L_W_XS, /* 1259 */ IC_VEX_L_W_XD, /* 1260 */ IC_VEX_L_W_XD, /* 1261 */ IC_VEX_L_W_XD, /* 1262 */ IC_VEX_L_W_XD, /* 1263 */ IC_VEX_L_OPSIZE, /* 1264 */ IC_VEX_L_OPSIZE, /* 1265 */ IC_VEX_L_OPSIZE, /* 1266 */ IC_VEX_L_OPSIZE, /* 1267 */ IC_VEX_L_OPSIZE, /* 1268 */ IC_VEX_L_OPSIZE, /* 1269 */ IC_VEX_L_OPSIZE, /* 1270 */ IC_VEX_L_OPSIZE, /* 1271 */ IC_VEX_L_W_OPSIZE, /* 1272 */ IC_VEX_L_W_OPSIZE, /* 1273 */ IC_VEX_L_W_OPSIZE, /* 1274 */ IC_VEX_L_W_OPSIZE, /* 1275 */ IC_VEX_L_W_OPSIZE, /* 1276 */ IC_VEX_L_W_OPSIZE, /* 1277 */ IC_VEX_L_W_OPSIZE, /* 1278 */ IC_VEX_L_W_OPSIZE, /* 1279 */ IC_EVEX_L2, /* 1280 */ IC_EVEX_L2, /* 1281 */ IC_EVEX_L2_XS, /* 1282 */ IC_EVEX_L2_XS, /* 1283 */ IC_EVEX_L2_XD, /* 1284 */ IC_EVEX_L2_XD, /* 1285 */ IC_EVEX_L2_XD, /* 1286 */ IC_EVEX_L2_XD, /* 1287 */ IC_EVEX_L2_W, /* 1288 */ IC_EVEX_L2_W, /* 1289 */ IC_EVEX_L2_W_XS, /* 1290 */ IC_EVEX_L2_W_XS, /* 1291 */ IC_EVEX_L2_W_XD, /* 1292 */ IC_EVEX_L2_W_XD, /* 1293 */ IC_EVEX_L2_W_XD, /* 1294 */ IC_EVEX_L2_W_XD, /* 1295 */ IC_EVEX_L2_OPSIZE, /* 1296 */ IC_EVEX_L2_OPSIZE, /* 1297 */ IC_EVEX_L2_OPSIZE, /* 1298 */ IC_EVEX_L2_OPSIZE, /* 1299 */ IC_EVEX_L2_OPSIZE, /* 1300 */ IC_EVEX_L2_OPSIZE, /* 1301 */ IC_EVEX_L2_OPSIZE, /* 1302 */ IC_EVEX_L2_OPSIZE, /* 1303 */ IC_EVEX_L2_W_OPSIZE, /* 1304 */ IC_EVEX_L2_W_OPSIZE, /* 1305 */ IC_EVEX_L2_W_OPSIZE, /* 1306 */ IC_EVEX_L2_W_OPSIZE, /* 1307 */ IC_EVEX_L2_W_OPSIZE, /* 1308 */ IC_EVEX_L2_W_OPSIZE, /* 1309 */ IC_EVEX_L2_W_OPSIZE, /* 1310 */ IC_EVEX_L2_W_OPSIZE, /* 1311 */ IC_EVEX_L2, /* 1312 */ IC_EVEX_L2, /* 1313 */ IC_EVEX_L2_XS, /* 1314 */ IC_EVEX_L2_XS, /* 1315 */ IC_EVEX_L2_XD, /* 1316 */ IC_EVEX_L2_XD, /* 1317 */ IC_EVEX_L2_XD, /* 1318 */ IC_EVEX_L2_XD, /* 1319 */ IC_EVEX_L2_W, /* 1320 */ IC_EVEX_L2_W, /* 1321 */ IC_EVEX_L2_W_XS, /* 1322 */ IC_EVEX_L2_W_XS, /* 1323 */ IC_EVEX_L2_W_XD, /* 1324 */ IC_EVEX_L2_W_XD, /* 1325 */ IC_EVEX_L2_W_XD, /* 1326 */ IC_EVEX_L2_W_XD, /* 1327 */ IC_EVEX_L2_OPSIZE, /* 1328 */ IC_EVEX_L2_OPSIZE, /* 1329 */ IC_EVEX_L2_OPSIZE, /* 1330 */ IC_EVEX_L2_OPSIZE, /* 1331 */ IC_EVEX_L2_OPSIZE, /* 1332 */ IC_EVEX_L2_OPSIZE, /* 1333 */ IC_EVEX_L2_OPSIZE, /* 1334 */ IC_EVEX_L2_OPSIZE, /* 1335 */ IC_EVEX_L2_W_OPSIZE, /* 1336 */ IC_EVEX_L2_W_OPSIZE, /* 1337 */ IC_EVEX_L2_W_OPSIZE, /* 1338 */ IC_EVEX_L2_W_OPSIZE, /* 1339 */ IC_EVEX_L2_W_OPSIZE, /* 1340 */ IC_EVEX_L2_W_OPSIZE, /* 1341 */ IC_EVEX_L2_W_OPSIZE, /* 1342 */ IC_EVEX_L2_W_OPSIZE, /* 1343 */ IC_EVEX_L2, /* 1344 */ IC_EVEX_L2, /* 1345 */ IC_EVEX_L2_XS, /* 1346 */ IC_EVEX_L2_XS, /* 1347 */ IC_EVEX_L2_XD, /* 1348 */ IC_EVEX_L2_XD, /* 1349 */ IC_EVEX_L2_XD, /* 1350 */ IC_EVEX_L2_XD, /* 1351 */ IC_EVEX_L2_W, /* 1352 */ IC_EVEX_L2_W, /* 1353 */ IC_EVEX_L2_W_XS, /* 1354 */ IC_EVEX_L2_W_XS, /* 1355 */ IC_EVEX_L2_W_XD, /* 1356 */ IC_EVEX_L2_W_XD, /* 1357 */ IC_EVEX_L2_W_XD, /* 1358 */ IC_EVEX_L2_W_XD, /* 1359 */ IC_EVEX_L2_OPSIZE, /* 1360 */ IC_EVEX_L2_OPSIZE, /* 1361 */ IC_EVEX_L2_OPSIZE, /* 1362 */ IC_EVEX_L2_OPSIZE, /* 1363 */ IC_EVEX_L2_OPSIZE, /* 1364 */ IC_EVEX_L2_OPSIZE, /* 1365 */ IC_EVEX_L2_OPSIZE, /* 1366 */ IC_EVEX_L2_OPSIZE, /* 1367 */ IC_EVEX_L2_W_OPSIZE, /* 1368 */ IC_EVEX_L2_W_OPSIZE, /* 1369 */ IC_EVEX_L2_W_OPSIZE, /* 1370 */ IC_EVEX_L2_W_OPSIZE, /* 1371 */ IC_EVEX_L2_W_OPSIZE, /* 1372 */ IC_EVEX_L2_W_OPSIZE, /* 1373 */ IC_EVEX_L2_W_OPSIZE, /* 1374 */ IC_EVEX_L2_W_OPSIZE, /* 1375 */ IC_EVEX_L2, /* 1376 */ IC_EVEX_L2, /* 1377 */ IC_EVEX_L2_XS, /* 1378 */ IC_EVEX_L2_XS, /* 1379 */ IC_EVEX_L2_XD, /* 1380 */ IC_EVEX_L2_XD, /* 1381 */ IC_EVEX_L2_XD, /* 1382 */ IC_EVEX_L2_XD, /* 1383 */ IC_EVEX_L2_W, /* 1384 */ IC_EVEX_L2_W, /* 1385 */ IC_EVEX_L2_W_XS, /* 1386 */ IC_EVEX_L2_W_XS, /* 1387 */ IC_EVEX_L2_W_XD, /* 1388 */ IC_EVEX_L2_W_XD, /* 1389 */ IC_EVEX_L2_W_XD, /* 1390 */ IC_EVEX_L2_W_XD, /* 1391 */ IC_EVEX_L2_OPSIZE, /* 1392 */ IC_EVEX_L2_OPSIZE, /* 1393 */ IC_EVEX_L2_OPSIZE, /* 1394 */ IC_EVEX_L2_OPSIZE, /* 1395 */ IC_EVEX_L2_OPSIZE, /* 1396 */ IC_EVEX_L2_OPSIZE, /* 1397 */ IC_EVEX_L2_OPSIZE, /* 1398 */ IC_EVEX_L2_OPSIZE, /* 1399 */ IC_EVEX_L2_W_OPSIZE, /* 1400 */ IC_EVEX_L2_W_OPSIZE, /* 1401 */ IC_EVEX_L2_W_OPSIZE, /* 1402 */ IC_EVEX_L2_W_OPSIZE, /* 1403 */ IC_EVEX_L2_W_OPSIZE, /* 1404 */ IC_EVEX_L2_W_OPSIZE, /* 1405 */ IC_EVEX_L2_W_OPSIZE, /* 1406 */ IC_EVEX_L2_W_OPSIZE, /* 1407 */ IC_EVEX_L2, /* 1408 */ IC_EVEX_L2, /* 1409 */ IC_EVEX_L2_XS, /* 1410 */ IC_EVEX_L2_XS, /* 1411 */ IC_EVEX_L2_XD, /* 1412 */ IC_EVEX_L2_XD, /* 1413 */ IC_EVEX_L2_XD, /* 1414 */ IC_EVEX_L2_XD, /* 1415 */ IC_EVEX_L2_W, /* 1416 */ IC_EVEX_L2_W, /* 1417 */ IC_EVEX_L2_W_XS, /* 1418 */ IC_EVEX_L2_W_XS, /* 1419 */ IC_EVEX_L2_W_XD, /* 1420 */ IC_EVEX_L2_W_XD, /* 1421 */ IC_EVEX_L2_W_XD, /* 1422 */ IC_EVEX_L2_W_XD, /* 1423 */ IC_EVEX_L2_OPSIZE, /* 1424 */ IC_EVEX_L2_OPSIZE, /* 1425 */ IC_EVEX_L2_OPSIZE, /* 1426 */ IC_EVEX_L2_OPSIZE, /* 1427 */ IC_EVEX_L2_OPSIZE, /* 1428 */ IC_EVEX_L2_OPSIZE, /* 1429 */ IC_EVEX_L2_OPSIZE, /* 1430 */ IC_EVEX_L2_OPSIZE, /* 1431 */ IC_EVEX_L2_W_OPSIZE, /* 1432 */ IC_EVEX_L2_W_OPSIZE, /* 1433 */ IC_EVEX_L2_W_OPSIZE, /* 1434 */ IC_EVEX_L2_W_OPSIZE, /* 1435 */ IC_EVEX_L2_W_OPSIZE, /* 1436 */ IC_EVEX_L2_W_OPSIZE, /* 1437 */ IC_EVEX_L2_W_OPSIZE, /* 1438 */ IC_EVEX_L2_W_OPSIZE, /* 1439 */ IC_EVEX_L2, /* 1440 */ IC_EVEX_L2, /* 1441 */ IC_EVEX_L2_XS, /* 1442 */ IC_EVEX_L2_XS, /* 1443 */ IC_EVEX_L2_XD, /* 1444 */ IC_EVEX_L2_XD, /* 1445 */ IC_EVEX_L2_XD, /* 1446 */ IC_EVEX_L2_XD, /* 1447 */ IC_EVEX_L2_W, /* 1448 */ IC_EVEX_L2_W, /* 1449 */ IC_EVEX_L2_W_XS, /* 1450 */ IC_EVEX_L2_W_XS, /* 1451 */ IC_EVEX_L2_W_XD, /* 1452 */ IC_EVEX_L2_W_XD, /* 1453 */ IC_EVEX_L2_W_XD, /* 1454 */ IC_EVEX_L2_W_XD, /* 1455 */ IC_EVEX_L2_OPSIZE, /* 1456 */ IC_EVEX_L2_OPSIZE, /* 1457 */ IC_EVEX_L2_OPSIZE, /* 1458 */ IC_EVEX_L2_OPSIZE, /* 1459 */ IC_EVEX_L2_OPSIZE, /* 1460 */ IC_EVEX_L2_OPSIZE, /* 1461 */ IC_EVEX_L2_OPSIZE, /* 1462 */ IC_EVEX_L2_OPSIZE, /* 1463 */ IC_EVEX_L2_W_OPSIZE, /* 1464 */ IC_EVEX_L2_W_OPSIZE, /* 1465 */ IC_EVEX_L2_W_OPSIZE, /* 1466 */ IC_EVEX_L2_W_OPSIZE, /* 1467 */ IC_EVEX_L2_W_OPSIZE, /* 1468 */ IC_EVEX_L2_W_OPSIZE, /* 1469 */ IC_EVEX_L2_W_OPSIZE, /* 1470 */ IC_EVEX_L2_W_OPSIZE, /* 1471 */ IC_EVEX_L2, /* 1472 */ IC_EVEX_L2, /* 1473 */ IC_EVEX_L2_XS, /* 1474 */ IC_EVEX_L2_XS, /* 1475 */ IC_EVEX_L2_XD, /* 1476 */ IC_EVEX_L2_XD, /* 1477 */ IC_EVEX_L2_XD, /* 1478 */ IC_EVEX_L2_XD, /* 1479 */ IC_EVEX_L2_W, /* 1480 */ IC_EVEX_L2_W, /* 1481 */ IC_EVEX_L2_W_XS, /* 1482 */ IC_EVEX_L2_W_XS, /* 1483 */ IC_EVEX_L2_W_XD, /* 1484 */ IC_EVEX_L2_W_XD, /* 1485 */ IC_EVEX_L2_W_XD, /* 1486 */ IC_EVEX_L2_W_XD, /* 1487 */ IC_EVEX_L2_OPSIZE, /* 1488 */ IC_EVEX_L2_OPSIZE, /* 1489 */ IC_EVEX_L2_OPSIZE, /* 1490 */ IC_EVEX_L2_OPSIZE, /* 1491 */ IC_EVEX_L2_OPSIZE, /* 1492 */ IC_EVEX_L2_OPSIZE, /* 1493 */ IC_EVEX_L2_OPSIZE, /* 1494 */ IC_EVEX_L2_OPSIZE, /* 1495 */ IC_EVEX_L2_W_OPSIZE, /* 1496 */ IC_EVEX_L2_W_OPSIZE, /* 1497 */ IC_EVEX_L2_W_OPSIZE, /* 1498 */ IC_EVEX_L2_W_OPSIZE, /* 1499 */ IC_EVEX_L2_W_OPSIZE, /* 1500 */ IC_EVEX_L2_W_OPSIZE, /* 1501 */ IC_EVEX_L2_W_OPSIZE, /* 1502 */ IC_EVEX_L2_W_OPSIZE, /* 1503 */ IC_EVEX_L2, /* 1504 */ IC_EVEX_L2, /* 1505 */ IC_EVEX_L2_XS, /* 1506 */ IC_EVEX_L2_XS, /* 1507 */ IC_EVEX_L2_XD, /* 1508 */ IC_EVEX_L2_XD, /* 1509 */ IC_EVEX_L2_XD, /* 1510 */ IC_EVEX_L2_XD, /* 1511 */ IC_EVEX_L2_W, /* 1512 */ IC_EVEX_L2_W, /* 1513 */ IC_EVEX_L2_W_XS, /* 1514 */ IC_EVEX_L2_W_XS, /* 1515 */ IC_EVEX_L2_W_XD, /* 1516 */ IC_EVEX_L2_W_XD, /* 1517 */ IC_EVEX_L2_W_XD, /* 1518 */ IC_EVEX_L2_W_XD, /* 1519 */ IC_EVEX_L2_OPSIZE, /* 1520 */ IC_EVEX_L2_OPSIZE, /* 1521 */ IC_EVEX_L2_OPSIZE, /* 1522 */ IC_EVEX_L2_OPSIZE, /* 1523 */ IC_EVEX_L2_OPSIZE, /* 1524 */ IC_EVEX_L2_OPSIZE, /* 1525 */ IC_EVEX_L2_OPSIZE, /* 1526 */ IC_EVEX_L2_OPSIZE, /* 1527 */ IC_EVEX_L2_W_OPSIZE, /* 1528 */ IC_EVEX_L2_W_OPSIZE, /* 1529 */ IC_EVEX_L2_W_OPSIZE, /* 1530 */ IC_EVEX_L2_W_OPSIZE, /* 1531 */ IC_EVEX_L2_W_OPSIZE, /* 1532 */ IC_EVEX_L2_W_OPSIZE, /* 1533 */ IC_EVEX_L2_W_OPSIZE, /* 1534 */ IC_EVEX_L2_W_OPSIZE, /* 1535 */ IC, /* 1536 */ IC_64BIT, /* 1537 */ IC_XS, /* 1538 */ IC_64BIT_XS, /* 1539 */ IC_XD, /* 1540 */ IC_64BIT_XD, /* 1541 */ IC_XS, /* 1542 */ IC_64BIT_XS, /* 1543 */ IC, /* 1544 */ IC_64BIT_REXW, /* 1545 */ IC_XS, /* 1546 */ IC_64BIT_REXW_XS, /* 1547 */ IC_XD, /* 1548 */ IC_64BIT_REXW_XD, /* 1549 */ IC_XS, /* 1550 */ IC_64BIT_REXW_XS, /* 1551 */ IC_OPSIZE, /* 1552 */ IC_64BIT_OPSIZE, /* 1553 */ IC_XS_OPSIZE, /* 1554 */ IC_64BIT_XS_OPSIZE, /* 1555 */ IC_XD_OPSIZE, /* 1556 */ IC_64BIT_XD_OPSIZE, /* 1557 */ IC_XS_OPSIZE, /* 1558 */ IC_64BIT_XD_OPSIZE, /* 1559 */ IC_OPSIZE, /* 1560 */ IC_64BIT_REXW_OPSIZE, /* 1561 */ IC_XS_OPSIZE, /* 1562 */ IC_64BIT_REXW_XS, /* 1563 */ IC_XD_OPSIZE, /* 1564 */ IC_64BIT_REXW_XD, /* 1565 */ IC_XS_OPSIZE, /* 1566 */ IC_64BIT_REXW_XS, /* 1567 */ IC_ADSIZE, /* 1568 */ IC_64BIT_ADSIZE, /* 1569 */ IC_XS, /* 1570 */ IC_64BIT_XS, /* 1571 */ IC_XD, /* 1572 */ IC_64BIT_XD, /* 1573 */ IC_XS, /* 1574 */ IC_64BIT_XS, /* 1575 */ IC_ADSIZE, /* 1576 */ IC_64BIT_REXW_ADSIZE, /* 1577 */ IC_XS, /* 1578 */ IC_64BIT_REXW_XS, /* 1579 */ IC_XD, /* 1580 */ IC_64BIT_REXW_XD, /* 1581 */ IC_XS, /* 1582 */ IC_64BIT_REXW_XS, /* 1583 */ IC_OPSIZE_ADSIZE, /* 1584 */ IC_64BIT_OPSIZE_ADSIZE, /* 1585 */ IC_XS_OPSIZE, /* 1586 */ IC_64BIT_XS_OPSIZE, /* 1587 */ IC_XD_OPSIZE, /* 1588 */ IC_64BIT_XD_OPSIZE, /* 1589 */ IC_XS_OPSIZE, /* 1590 */ IC_64BIT_XD_OPSIZE, /* 1591 */ IC_OPSIZE_ADSIZE, /* 1592 */ IC_64BIT_REXW_OPSIZE, /* 1593 */ IC_XS_OPSIZE, /* 1594 */ IC_64BIT_REXW_XS, /* 1595 */ IC_XD_OPSIZE, /* 1596 */ IC_64BIT_REXW_XD, /* 1597 */ IC_XS_OPSIZE, /* 1598 */ IC_64BIT_REXW_XS, /* 1599 */ IC_VEX, /* 1600 */ IC_VEX, /* 1601 */ IC_VEX_XS, /* 1602 */ IC_VEX_XS, /* 1603 */ IC_VEX_XD, /* 1604 */ IC_VEX_XD, /* 1605 */ IC_VEX_XD, /* 1606 */ IC_VEX_XD, /* 1607 */ IC_VEX_W, /* 1608 */ IC_VEX_W, /* 1609 */ IC_VEX_W_XS, /* 1610 */ IC_VEX_W_XS, /* 1611 */ IC_VEX_W_XD, /* 1612 */ IC_VEX_W_XD, /* 1613 */ IC_VEX_W_XD, /* 1614 */ IC_VEX_W_XD, /* 1615 */ IC_VEX_OPSIZE, /* 1616 */ IC_VEX_OPSIZE, /* 1617 */ IC_VEX_OPSIZE, /* 1618 */ IC_VEX_OPSIZE, /* 1619 */ IC_VEX_OPSIZE, /* 1620 */ IC_VEX_OPSIZE, /* 1621 */ IC_VEX_OPSIZE, /* 1622 */ IC_VEX_OPSIZE, /* 1623 */ IC_VEX_W_OPSIZE, /* 1624 */ IC_VEX_W_OPSIZE, /* 1625 */ IC_VEX_W_OPSIZE, /* 1626 */ IC_VEX_W_OPSIZE, /* 1627 */ IC_VEX_W_OPSIZE, /* 1628 */ IC_VEX_W_OPSIZE, /* 1629 */ IC_VEX_W_OPSIZE, /* 1630 */ IC_VEX_W_OPSIZE, /* 1631 */ IC_VEX, /* 1632 */ IC_VEX, /* 1633 */ IC_VEX_XS, /* 1634 */ IC_VEX_XS, /* 1635 */ IC_VEX_XD, /* 1636 */ IC_VEX_XD, /* 1637 */ IC_VEX_XD, /* 1638 */ IC_VEX_XD, /* 1639 */ IC_VEX_W, /* 1640 */ IC_VEX_W, /* 1641 */ IC_VEX_W_XS, /* 1642 */ IC_VEX_W_XS, /* 1643 */ IC_VEX_W_XD, /* 1644 */ IC_VEX_W_XD, /* 1645 */ IC_VEX_W_XD, /* 1646 */ IC_VEX_W_XD, /* 1647 */ IC_VEX_OPSIZE, /* 1648 */ IC_VEX_OPSIZE, /* 1649 */ IC_VEX_OPSIZE, /* 1650 */ IC_VEX_OPSIZE, /* 1651 */ IC_VEX_OPSIZE, /* 1652 */ IC_VEX_OPSIZE, /* 1653 */ IC_VEX_OPSIZE, /* 1654 */ IC_VEX_OPSIZE, /* 1655 */ IC_VEX_W_OPSIZE, /* 1656 */ IC_VEX_W_OPSIZE, /* 1657 */ IC_VEX_W_OPSIZE, /* 1658 */ IC_VEX_W_OPSIZE, /* 1659 */ IC_VEX_W_OPSIZE, /* 1660 */ IC_VEX_W_OPSIZE, /* 1661 */ IC_VEX_W_OPSIZE, /* 1662 */ IC_VEX_W_OPSIZE, /* 1663 */ IC_VEX_L, /* 1664 */ IC_VEX_L, /* 1665 */ IC_VEX_L_XS, /* 1666 */ IC_VEX_L_XS, /* 1667 */ IC_VEX_L_XD, /* 1668 */ IC_VEX_L_XD, /* 1669 */ IC_VEX_L_XD, /* 1670 */ IC_VEX_L_XD, /* 1671 */ IC_VEX_L_W, /* 1672 */ IC_VEX_L_W, /* 1673 */ IC_VEX_L_W_XS, /* 1674 */ IC_VEX_L_W_XS, /* 1675 */ IC_VEX_L_W_XD, /* 1676 */ IC_VEX_L_W_XD, /* 1677 */ IC_VEX_L_W_XD, /* 1678 */ IC_VEX_L_W_XD, /* 1679 */ IC_VEX_L_OPSIZE, /* 1680 */ IC_VEX_L_OPSIZE, /* 1681 */ IC_VEX_L_OPSIZE, /* 1682 */ IC_VEX_L_OPSIZE, /* 1683 */ IC_VEX_L_OPSIZE, /* 1684 */ IC_VEX_L_OPSIZE, /* 1685 */ IC_VEX_L_OPSIZE, /* 1686 */ IC_VEX_L_OPSIZE, /* 1687 */ IC_VEX_L_W_OPSIZE, /* 1688 */ IC_VEX_L_W_OPSIZE, /* 1689 */ IC_VEX_L_W_OPSIZE, /* 1690 */ IC_VEX_L_W_OPSIZE, /* 1691 */ IC_VEX_L_W_OPSIZE, /* 1692 */ IC_VEX_L_W_OPSIZE, /* 1693 */ IC_VEX_L_W_OPSIZE, /* 1694 */ IC_VEX_L_W_OPSIZE, /* 1695 */ IC_VEX_L, /* 1696 */ IC_VEX_L, /* 1697 */ IC_VEX_L_XS, /* 1698 */ IC_VEX_L_XS, /* 1699 */ IC_VEX_L_XD, /* 1700 */ IC_VEX_L_XD, /* 1701 */ IC_VEX_L_XD, /* 1702 */ IC_VEX_L_XD, /* 1703 */ IC_VEX_L_W, /* 1704 */ IC_VEX_L_W, /* 1705 */ IC_VEX_L_W_XS, /* 1706 */ IC_VEX_L_W_XS, /* 1707 */ IC_VEX_L_W_XD, /* 1708 */ IC_VEX_L_W_XD, /* 1709 */ IC_VEX_L_W_XD, /* 1710 */ IC_VEX_L_W_XD, /* 1711 */ IC_VEX_L_OPSIZE, /* 1712 */ IC_VEX_L_OPSIZE, /* 1713 */ IC_VEX_L_OPSIZE, /* 1714 */ IC_VEX_L_OPSIZE, /* 1715 */ IC_VEX_L_OPSIZE, /* 1716 */ IC_VEX_L_OPSIZE, /* 1717 */ IC_VEX_L_OPSIZE, /* 1718 */ IC_VEX_L_OPSIZE, /* 1719 */ IC_VEX_L_W_OPSIZE, /* 1720 */ IC_VEX_L_W_OPSIZE, /* 1721 */ IC_VEX_L_W_OPSIZE, /* 1722 */ IC_VEX_L_W_OPSIZE, /* 1723 */ IC_VEX_L_W_OPSIZE, /* 1724 */ IC_VEX_L_W_OPSIZE, /* 1725 */ IC_VEX_L_W_OPSIZE, /* 1726 */ IC_VEX_L_W_OPSIZE, /* 1727 */ IC_VEX_L, /* 1728 */ IC_VEX_L, /* 1729 */ IC_VEX_L_XS, /* 1730 */ IC_VEX_L_XS, /* 1731 */ IC_VEX_L_XD, /* 1732 */ IC_VEX_L_XD, /* 1733 */ IC_VEX_L_XD, /* 1734 */ IC_VEX_L_XD, /* 1735 */ IC_VEX_L_W, /* 1736 */ IC_VEX_L_W, /* 1737 */ IC_VEX_L_W_XS, /* 1738 */ IC_VEX_L_W_XS, /* 1739 */ IC_VEX_L_W_XD, /* 1740 */ IC_VEX_L_W_XD, /* 1741 */ IC_VEX_L_W_XD, /* 1742 */ IC_VEX_L_W_XD, /* 1743 */ IC_VEX_L_OPSIZE, /* 1744 */ IC_VEX_L_OPSIZE, /* 1745 */ IC_VEX_L_OPSIZE, /* 1746 */ IC_VEX_L_OPSIZE, /* 1747 */ IC_VEX_L_OPSIZE, /* 1748 */ IC_VEX_L_OPSIZE, /* 1749 */ IC_VEX_L_OPSIZE, /* 1750 */ IC_VEX_L_OPSIZE, /* 1751 */ IC_VEX_L_W_OPSIZE, /* 1752 */ IC_VEX_L_W_OPSIZE, /* 1753 */ IC_VEX_L_W_OPSIZE, /* 1754 */ IC_VEX_L_W_OPSIZE, /* 1755 */ IC_VEX_L_W_OPSIZE, /* 1756 */ IC_VEX_L_W_OPSIZE, /* 1757 */ IC_VEX_L_W_OPSIZE, /* 1758 */ IC_VEX_L_W_OPSIZE, /* 1759 */ IC_VEX_L, /* 1760 */ IC_VEX_L, /* 1761 */ IC_VEX_L_XS, /* 1762 */ IC_VEX_L_XS, /* 1763 */ IC_VEX_L_XD, /* 1764 */ IC_VEX_L_XD, /* 1765 */ IC_VEX_L_XD, /* 1766 */ IC_VEX_L_XD, /* 1767 */ IC_VEX_L_W, /* 1768 */ IC_VEX_L_W, /* 1769 */ IC_VEX_L_W_XS, /* 1770 */ IC_VEX_L_W_XS, /* 1771 */ IC_VEX_L_W_XD, /* 1772 */ IC_VEX_L_W_XD, /* 1773 */ IC_VEX_L_W_XD, /* 1774 */ IC_VEX_L_W_XD, /* 1775 */ IC_VEX_L_OPSIZE, /* 1776 */ IC_VEX_L_OPSIZE, /* 1777 */ IC_VEX_L_OPSIZE, /* 1778 */ IC_VEX_L_OPSIZE, /* 1779 */ IC_VEX_L_OPSIZE, /* 1780 */ IC_VEX_L_OPSIZE, /* 1781 */ IC_VEX_L_OPSIZE, /* 1782 */ IC_VEX_L_OPSIZE, /* 1783 */ IC_VEX_L_W_OPSIZE, /* 1784 */ IC_VEX_L_W_OPSIZE, /* 1785 */ IC_VEX_L_W_OPSIZE, /* 1786 */ IC_VEX_L_W_OPSIZE, /* 1787 */ IC_VEX_L_W_OPSIZE, /* 1788 */ IC_VEX_L_W_OPSIZE, /* 1789 */ IC_VEX_L_W_OPSIZE, /* 1790 */ IC_VEX_L_W_OPSIZE, /* 1791 */ IC_EVEX_L2, /* 1792 */ IC_EVEX_L2, /* 1793 */ IC_EVEX_L2_XS, /* 1794 */ IC_EVEX_L2_XS, /* 1795 */ IC_EVEX_L2_XD, /* 1796 */ IC_EVEX_L2_XD, /* 1797 */ IC_EVEX_L2_XD, /* 1798 */ IC_EVEX_L2_XD, /* 1799 */ IC_EVEX_L2_W, /* 1800 */ IC_EVEX_L2_W, /* 1801 */ IC_EVEX_L2_W_XS, /* 1802 */ IC_EVEX_L2_W_XS, /* 1803 */ IC_EVEX_L2_W_XD, /* 1804 */ IC_EVEX_L2_W_XD, /* 1805 */ IC_EVEX_L2_W_XD, /* 1806 */ IC_EVEX_L2_W_XD, /* 1807 */ IC_EVEX_L2_OPSIZE, /* 1808 */ IC_EVEX_L2_OPSIZE, /* 1809 */ IC_EVEX_L2_OPSIZE, /* 1810 */ IC_EVEX_L2_OPSIZE, /* 1811 */ IC_EVEX_L2_OPSIZE, /* 1812 */ IC_EVEX_L2_OPSIZE, /* 1813 */ IC_EVEX_L2_OPSIZE, /* 1814 */ IC_EVEX_L2_OPSIZE, /* 1815 */ IC_EVEX_L2_W_OPSIZE, /* 1816 */ IC_EVEX_L2_W_OPSIZE, /* 1817 */ IC_EVEX_L2_W_OPSIZE, /* 1818 */ IC_EVEX_L2_W_OPSIZE, /* 1819 */ IC_EVEX_L2_W_OPSIZE, /* 1820 */ IC_EVEX_L2_W_OPSIZE, /* 1821 */ IC_EVEX_L2_W_OPSIZE, /* 1822 */ IC_EVEX_L2_W_OPSIZE, /* 1823 */ IC_EVEX_L2, /* 1824 */ IC_EVEX_L2, /* 1825 */ IC_EVEX_L2_XS, /* 1826 */ IC_EVEX_L2_XS, /* 1827 */ IC_EVEX_L2_XD, /* 1828 */ IC_EVEX_L2_XD, /* 1829 */ IC_EVEX_L2_XD, /* 1830 */ IC_EVEX_L2_XD, /* 1831 */ IC_EVEX_L2_W, /* 1832 */ IC_EVEX_L2_W, /* 1833 */ IC_EVEX_L2_W_XS, /* 1834 */ IC_EVEX_L2_W_XS, /* 1835 */ IC_EVEX_L2_W_XD, /* 1836 */ IC_EVEX_L2_W_XD, /* 1837 */ IC_EVEX_L2_W_XD, /* 1838 */ IC_EVEX_L2_W_XD, /* 1839 */ IC_EVEX_L2_OPSIZE, /* 1840 */ IC_EVEX_L2_OPSIZE, /* 1841 */ IC_EVEX_L2_OPSIZE, /* 1842 */ IC_EVEX_L2_OPSIZE, /* 1843 */ IC_EVEX_L2_OPSIZE, /* 1844 */ IC_EVEX_L2_OPSIZE, /* 1845 */ IC_EVEX_L2_OPSIZE, /* 1846 */ IC_EVEX_L2_OPSIZE, /* 1847 */ IC_EVEX_L2_W_OPSIZE, /* 1848 */ IC_EVEX_L2_W_OPSIZE, /* 1849 */ IC_EVEX_L2_W_OPSIZE, /* 1850 */ IC_EVEX_L2_W_OPSIZE, /* 1851 */ IC_EVEX_L2_W_OPSIZE, /* 1852 */ IC_EVEX_L2_W_OPSIZE, /* 1853 */ IC_EVEX_L2_W_OPSIZE, /* 1854 */ IC_EVEX_L2_W_OPSIZE, /* 1855 */ IC_EVEX_L2, /* 1856 */ IC_EVEX_L2, /* 1857 */ IC_EVEX_L2_XS, /* 1858 */ IC_EVEX_L2_XS, /* 1859 */ IC_EVEX_L2_XD, /* 1860 */ IC_EVEX_L2_XD, /* 1861 */ IC_EVEX_L2_XD, /* 1862 */ IC_EVEX_L2_XD, /* 1863 */ IC_EVEX_L2_W, /* 1864 */ IC_EVEX_L2_W, /* 1865 */ IC_EVEX_L2_W_XS, /* 1866 */ IC_EVEX_L2_W_XS, /* 1867 */ IC_EVEX_L2_W_XD, /* 1868 */ IC_EVEX_L2_W_XD, /* 1869 */ IC_EVEX_L2_W_XD, /* 1870 */ IC_EVEX_L2_W_XD, /* 1871 */ IC_EVEX_L2_OPSIZE, /* 1872 */ IC_EVEX_L2_OPSIZE, /* 1873 */ IC_EVEX_L2_OPSIZE, /* 1874 */ IC_EVEX_L2_OPSIZE, /* 1875 */ IC_EVEX_L2_OPSIZE, /* 1876 */ IC_EVEX_L2_OPSIZE, /* 1877 */ IC_EVEX_L2_OPSIZE, /* 1878 */ IC_EVEX_L2_OPSIZE, /* 1879 */ IC_EVEX_L2_W_OPSIZE, /* 1880 */ IC_EVEX_L2_W_OPSIZE, /* 1881 */ IC_EVEX_L2_W_OPSIZE, /* 1882 */ IC_EVEX_L2_W_OPSIZE, /* 1883 */ IC_EVEX_L2_W_OPSIZE, /* 1884 */ IC_EVEX_L2_W_OPSIZE, /* 1885 */ IC_EVEX_L2_W_OPSIZE, /* 1886 */ IC_EVEX_L2_W_OPSIZE, /* 1887 */ IC_EVEX_L2, /* 1888 */ IC_EVEX_L2, /* 1889 */ IC_EVEX_L2_XS, /* 1890 */ IC_EVEX_L2_XS, /* 1891 */ IC_EVEX_L2_XD, /* 1892 */ IC_EVEX_L2_XD, /* 1893 */ IC_EVEX_L2_XD, /* 1894 */ IC_EVEX_L2_XD, /* 1895 */ IC_EVEX_L2_W, /* 1896 */ IC_EVEX_L2_W, /* 1897 */ IC_EVEX_L2_W_XS, /* 1898 */ IC_EVEX_L2_W_XS, /* 1899 */ IC_EVEX_L2_W_XD, /* 1900 */ IC_EVEX_L2_W_XD, /* 1901 */ IC_EVEX_L2_W_XD, /* 1902 */ IC_EVEX_L2_W_XD, /* 1903 */ IC_EVEX_L2_OPSIZE, /* 1904 */ IC_EVEX_L2_OPSIZE, /* 1905 */ IC_EVEX_L2_OPSIZE, /* 1906 */ IC_EVEX_L2_OPSIZE, /* 1907 */ IC_EVEX_L2_OPSIZE, /* 1908 */ IC_EVEX_L2_OPSIZE, /* 1909 */ IC_EVEX_L2_OPSIZE, /* 1910 */ IC_EVEX_L2_OPSIZE, /* 1911 */ IC_EVEX_L2_W_OPSIZE, /* 1912 */ IC_EVEX_L2_W_OPSIZE, /* 1913 */ IC_EVEX_L2_W_OPSIZE, /* 1914 */ IC_EVEX_L2_W_OPSIZE, /* 1915 */ IC_EVEX_L2_W_OPSIZE, /* 1916 */ IC_EVEX_L2_W_OPSIZE, /* 1917 */ IC_EVEX_L2_W_OPSIZE, /* 1918 */ IC_EVEX_L2_W_OPSIZE, /* 1919 */ IC_EVEX_L2, /* 1920 */ IC_EVEX_L2, /* 1921 */ IC_EVEX_L2_XS, /* 1922 */ IC_EVEX_L2_XS, /* 1923 */ IC_EVEX_L2_XD, /* 1924 */ IC_EVEX_L2_XD, /* 1925 */ IC_EVEX_L2_XD, /* 1926 */ IC_EVEX_L2_XD, /* 1927 */ IC_EVEX_L2_W, /* 1928 */ IC_EVEX_L2_W, /* 1929 */ IC_EVEX_L2_W_XS, /* 1930 */ IC_EVEX_L2_W_XS, /* 1931 */ IC_EVEX_L2_W_XD, /* 1932 */ IC_EVEX_L2_W_XD, /* 1933 */ IC_EVEX_L2_W_XD, /* 1934 */ IC_EVEX_L2_W_XD, /* 1935 */ IC_EVEX_L2_OPSIZE, /* 1936 */ IC_EVEX_L2_OPSIZE, /* 1937 */ IC_EVEX_L2_OPSIZE, /* 1938 */ IC_EVEX_L2_OPSIZE, /* 1939 */ IC_EVEX_L2_OPSIZE, /* 1940 */ IC_EVEX_L2_OPSIZE, /* 1941 */ IC_EVEX_L2_OPSIZE, /* 1942 */ IC_EVEX_L2_OPSIZE, /* 1943 */ IC_EVEX_L2_W_OPSIZE, /* 1944 */ IC_EVEX_L2_W_OPSIZE, /* 1945 */ IC_EVEX_L2_W_OPSIZE, /* 1946 */ IC_EVEX_L2_W_OPSIZE, /* 1947 */ IC_EVEX_L2_W_OPSIZE, /* 1948 */ IC_EVEX_L2_W_OPSIZE, /* 1949 */ IC_EVEX_L2_W_OPSIZE, /* 1950 */ IC_EVEX_L2_W_OPSIZE, /* 1951 */ IC_EVEX_L2, /* 1952 */ IC_EVEX_L2, /* 1953 */ IC_EVEX_L2_XS, /* 1954 */ IC_EVEX_L2_XS, /* 1955 */ IC_EVEX_L2_XD, /* 1956 */ IC_EVEX_L2_XD, /* 1957 */ IC_EVEX_L2_XD, /* 1958 */ IC_EVEX_L2_XD, /* 1959 */ IC_EVEX_L2_W, /* 1960 */ IC_EVEX_L2_W, /* 1961 */ IC_EVEX_L2_W_XS, /* 1962 */ IC_EVEX_L2_W_XS, /* 1963 */ IC_EVEX_L2_W_XD, /* 1964 */ IC_EVEX_L2_W_XD, /* 1965 */ IC_EVEX_L2_W_XD, /* 1966 */ IC_EVEX_L2_W_XD, /* 1967 */ IC_EVEX_L2_OPSIZE, /* 1968 */ IC_EVEX_L2_OPSIZE, /* 1969 */ IC_EVEX_L2_OPSIZE, /* 1970 */ IC_EVEX_L2_OPSIZE, /* 1971 */ IC_EVEX_L2_OPSIZE, /* 1972 */ IC_EVEX_L2_OPSIZE, /* 1973 */ IC_EVEX_L2_OPSIZE, /* 1974 */ IC_EVEX_L2_OPSIZE, /* 1975 */ IC_EVEX_L2_W_OPSIZE, /* 1976 */ IC_EVEX_L2_W_OPSIZE, /* 1977 */ IC_EVEX_L2_W_OPSIZE, /* 1978 */ IC_EVEX_L2_W_OPSIZE, /* 1979 */ IC_EVEX_L2_W_OPSIZE, /* 1980 */ IC_EVEX_L2_W_OPSIZE, /* 1981 */ IC_EVEX_L2_W_OPSIZE, /* 1982 */ IC_EVEX_L2_W_OPSIZE, /* 1983 */ IC_EVEX_L2, /* 1984 */ IC_EVEX_L2, /* 1985 */ IC_EVEX_L2_XS, /* 1986 */ IC_EVEX_L2_XS, /* 1987 */ IC_EVEX_L2_XD, /* 1988 */ IC_EVEX_L2_XD, /* 1989 */ IC_EVEX_L2_XD, /* 1990 */ IC_EVEX_L2_XD, /* 1991 */ IC_EVEX_L2_W, /* 1992 */ IC_EVEX_L2_W, /* 1993 */ IC_EVEX_L2_W_XS, /* 1994 */ IC_EVEX_L2_W_XS, /* 1995 */ IC_EVEX_L2_W_XD, /* 1996 */ IC_EVEX_L2_W_XD, /* 1997 */ IC_EVEX_L2_W_XD, /* 1998 */ IC_EVEX_L2_W_XD, /* 1999 */ IC_EVEX_L2_OPSIZE, /* 2000 */ IC_EVEX_L2_OPSIZE, /* 2001 */ IC_EVEX_L2_OPSIZE, /* 2002 */ IC_EVEX_L2_OPSIZE, /* 2003 */ IC_EVEX_L2_OPSIZE, /* 2004 */ IC_EVEX_L2_OPSIZE, /* 2005 */ IC_EVEX_L2_OPSIZE, /* 2006 */ IC_EVEX_L2_OPSIZE, /* 2007 */ IC_EVEX_L2_W_OPSIZE, /* 2008 */ IC_EVEX_L2_W_OPSIZE, /* 2009 */ IC_EVEX_L2_W_OPSIZE, /* 2010 */ IC_EVEX_L2_W_OPSIZE, /* 2011 */ IC_EVEX_L2_W_OPSIZE, /* 2012 */ IC_EVEX_L2_W_OPSIZE, /* 2013 */ IC_EVEX_L2_W_OPSIZE, /* 2014 */ IC_EVEX_L2_W_OPSIZE, /* 2015 */ IC_EVEX_L2, /* 2016 */ IC_EVEX_L2, /* 2017 */ IC_EVEX_L2_XS, /* 2018 */ IC_EVEX_L2_XS, /* 2019 */ IC_EVEX_L2_XD, /* 2020 */ IC_EVEX_L2_XD, /* 2021 */ IC_EVEX_L2_XD, /* 2022 */ IC_EVEX_L2_XD, /* 2023 */ IC_EVEX_L2_W, /* 2024 */ IC_EVEX_L2_W, /* 2025 */ IC_EVEX_L2_W_XS, /* 2026 */ IC_EVEX_L2_W_XS, /* 2027 */ IC_EVEX_L2_W_XD, /* 2028 */ IC_EVEX_L2_W_XD, /* 2029 */ IC_EVEX_L2_W_XD, /* 2030 */ IC_EVEX_L2_W_XD, /* 2031 */ IC_EVEX_L2_OPSIZE, /* 2032 */ IC_EVEX_L2_OPSIZE, /* 2033 */ IC_EVEX_L2_OPSIZE, /* 2034 */ IC_EVEX_L2_OPSIZE, /* 2035 */ IC_EVEX_L2_OPSIZE, /* 2036 */ IC_EVEX_L2_OPSIZE, /* 2037 */ IC_EVEX_L2_OPSIZE, /* 2038 */ IC_EVEX_L2_OPSIZE, /* 2039 */ IC_EVEX_L2_W_OPSIZE, /* 2040 */ IC_EVEX_L2_W_OPSIZE, /* 2041 */ IC_EVEX_L2_W_OPSIZE, /* 2042 */ IC_EVEX_L2_W_OPSIZE, /* 2043 */ IC_EVEX_L2_W_OPSIZE, /* 2044 */ IC_EVEX_L2_W_OPSIZE, /* 2045 */ IC_EVEX_L2_W_OPSIZE, /* 2046 */ IC_EVEX_L2_W_OPSIZE, /* 2047 */ IC, /* 2048 */ IC_64BIT, /* 2049 */ IC_XS, /* 2050 */ IC_64BIT_XS, /* 2051 */ IC_XD, /* 2052 */ IC_64BIT_XD, /* 2053 */ IC_XS, /* 2054 */ IC_64BIT_XS, /* 2055 */ IC, /* 2056 */ IC_64BIT_REXW, /* 2057 */ IC_XS, /* 2058 */ IC_64BIT_REXW_XS, /* 2059 */ IC_XD, /* 2060 */ IC_64BIT_REXW_XD, /* 2061 */ IC_XS, /* 2062 */ IC_64BIT_REXW_XS, /* 2063 */ IC_OPSIZE, /* 2064 */ IC_64BIT_OPSIZE, /* 2065 */ IC_XS_OPSIZE, /* 2066 */ IC_64BIT_XS_OPSIZE, /* 2067 */ IC_XD_OPSIZE, /* 2068 */ IC_64BIT_XD_OPSIZE, /* 2069 */ IC_XS_OPSIZE, /* 2070 */ IC_64BIT_XD_OPSIZE, /* 2071 */ IC_OPSIZE, /* 2072 */ IC_64BIT_REXW_OPSIZE, /* 2073 */ IC_XS_OPSIZE, /* 2074 */ IC_64BIT_REXW_XS, /* 2075 */ IC_XD_OPSIZE, /* 2076 */ IC_64BIT_REXW_XD, /* 2077 */ IC_XS_OPSIZE, /* 2078 */ IC_64BIT_REXW_XS, /* 2079 */ IC_ADSIZE, /* 2080 */ IC_64BIT_ADSIZE, /* 2081 */ IC_XS, /* 2082 */ IC_64BIT_XS, /* 2083 */ IC_XD, /* 2084 */ IC_64BIT_XD, /* 2085 */ IC_XS, /* 2086 */ IC_64BIT_XS, /* 2087 */ IC_ADSIZE, /* 2088 */ IC_64BIT_REXW_ADSIZE, /* 2089 */ IC_XS, /* 2090 */ IC_64BIT_REXW_XS, /* 2091 */ IC_XD, /* 2092 */ IC_64BIT_REXW_XD, /* 2093 */ IC_XS, /* 2094 */ IC_64BIT_REXW_XS, /* 2095 */ IC_OPSIZE_ADSIZE, /* 2096 */ IC_64BIT_OPSIZE_ADSIZE, /* 2097 */ IC_XS_OPSIZE, /* 2098 */ IC_64BIT_XS_OPSIZE, /* 2099 */ IC_XD_OPSIZE, /* 2100 */ IC_64BIT_XD_OPSIZE, /* 2101 */ IC_XS_OPSIZE, /* 2102 */ IC_64BIT_XD_OPSIZE, /* 2103 */ IC_OPSIZE_ADSIZE, /* 2104 */ IC_64BIT_REXW_OPSIZE, /* 2105 */ IC_XS_OPSIZE, /* 2106 */ IC_64BIT_REXW_XS, /* 2107 */ IC_XD_OPSIZE, /* 2108 */ IC_64BIT_REXW_XD, /* 2109 */ IC_XS_OPSIZE, /* 2110 */ IC_64BIT_REXW_XS, /* 2111 */ IC_VEX, /* 2112 */ IC_VEX, /* 2113 */ IC_VEX_XS, /* 2114 */ IC_VEX_XS, /* 2115 */ IC_VEX_XD, /* 2116 */ IC_VEX_XD, /* 2117 */ IC_VEX_XD, /* 2118 */ IC_VEX_XD, /* 2119 */ IC_VEX_W, /* 2120 */ IC_VEX_W, /* 2121 */ IC_VEX_W_XS, /* 2122 */ IC_VEX_W_XS, /* 2123 */ IC_VEX_W_XD, /* 2124 */ IC_VEX_W_XD, /* 2125 */ IC_VEX_W_XD, /* 2126 */ IC_VEX_W_XD, /* 2127 */ IC_VEX_OPSIZE, /* 2128 */ IC_VEX_OPSIZE, /* 2129 */ IC_VEX_OPSIZE, /* 2130 */ IC_VEX_OPSIZE, /* 2131 */ IC_VEX_OPSIZE, /* 2132 */ IC_VEX_OPSIZE, /* 2133 */ IC_VEX_OPSIZE, /* 2134 */ IC_VEX_OPSIZE, /* 2135 */ IC_VEX_W_OPSIZE, /* 2136 */ IC_VEX_W_OPSIZE, /* 2137 */ IC_VEX_W_OPSIZE, /* 2138 */ IC_VEX_W_OPSIZE, /* 2139 */ IC_VEX_W_OPSIZE, /* 2140 */ IC_VEX_W_OPSIZE, /* 2141 */ IC_VEX_W_OPSIZE, /* 2142 */ IC_VEX_W_OPSIZE, /* 2143 */ IC_VEX, /* 2144 */ IC_VEX, /* 2145 */ IC_VEX_XS, /* 2146 */ IC_VEX_XS, /* 2147 */ IC_VEX_XD, /* 2148 */ IC_VEX_XD, /* 2149 */ IC_VEX_XD, /* 2150 */ IC_VEX_XD, /* 2151 */ IC_VEX_W, /* 2152 */ IC_VEX_W, /* 2153 */ IC_VEX_W_XS, /* 2154 */ IC_VEX_W_XS, /* 2155 */ IC_VEX_W_XD, /* 2156 */ IC_VEX_W_XD, /* 2157 */ IC_VEX_W_XD, /* 2158 */ IC_VEX_W_XD, /* 2159 */ IC_VEX_OPSIZE, /* 2160 */ IC_VEX_OPSIZE, /* 2161 */ IC_VEX_OPSIZE, /* 2162 */ IC_VEX_OPSIZE, /* 2163 */ IC_VEX_OPSIZE, /* 2164 */ IC_VEX_OPSIZE, /* 2165 */ IC_VEX_OPSIZE, /* 2166 */ IC_VEX_OPSIZE, /* 2167 */ IC_VEX_W_OPSIZE, /* 2168 */ IC_VEX_W_OPSIZE, /* 2169 */ IC_VEX_W_OPSIZE, /* 2170 */ IC_VEX_W_OPSIZE, /* 2171 */ IC_VEX_W_OPSIZE, /* 2172 */ IC_VEX_W_OPSIZE, /* 2173 */ IC_VEX_W_OPSIZE, /* 2174 */ IC_VEX_W_OPSIZE, /* 2175 */ IC_VEX_L, /* 2176 */ IC_VEX_L, /* 2177 */ IC_VEX_L_XS, /* 2178 */ IC_VEX_L_XS, /* 2179 */ IC_VEX_L_XD, /* 2180 */ IC_VEX_L_XD, /* 2181 */ IC_VEX_L_XD, /* 2182 */ IC_VEX_L_XD, /* 2183 */ IC_VEX_L_W, /* 2184 */ IC_VEX_L_W, /* 2185 */ IC_VEX_L_W_XS, /* 2186 */ IC_VEX_L_W_XS, /* 2187 */ IC_VEX_L_W_XD, /* 2188 */ IC_VEX_L_W_XD, /* 2189 */ IC_VEX_L_W_XD, /* 2190 */ IC_VEX_L_W_XD, /* 2191 */ IC_VEX_L_OPSIZE, /* 2192 */ IC_VEX_L_OPSIZE, /* 2193 */ IC_VEX_L_OPSIZE, /* 2194 */ IC_VEX_L_OPSIZE, /* 2195 */ IC_VEX_L_OPSIZE, /* 2196 */ IC_VEX_L_OPSIZE, /* 2197 */ IC_VEX_L_OPSIZE, /* 2198 */ IC_VEX_L_OPSIZE, /* 2199 */ IC_VEX_L_W_OPSIZE, /* 2200 */ IC_VEX_L_W_OPSIZE, /* 2201 */ IC_VEX_L_W_OPSIZE, /* 2202 */ IC_VEX_L_W_OPSIZE, /* 2203 */ IC_VEX_L_W_OPSIZE, /* 2204 */ IC_VEX_L_W_OPSIZE, /* 2205 */ IC_VEX_L_W_OPSIZE, /* 2206 */ IC_VEX_L_W_OPSIZE, /* 2207 */ IC_VEX_L, /* 2208 */ IC_VEX_L, /* 2209 */ IC_VEX_L_XS, /* 2210 */ IC_VEX_L_XS, /* 2211 */ IC_VEX_L_XD, /* 2212 */ IC_VEX_L_XD, /* 2213 */ IC_VEX_L_XD, /* 2214 */ IC_VEX_L_XD, /* 2215 */ IC_VEX_L_W, /* 2216 */ IC_VEX_L_W, /* 2217 */ IC_VEX_L_W_XS, /* 2218 */ IC_VEX_L_W_XS, /* 2219 */ IC_VEX_L_W_XD, /* 2220 */ IC_VEX_L_W_XD, /* 2221 */ IC_VEX_L_W_XD, /* 2222 */ IC_VEX_L_W_XD, /* 2223 */ IC_VEX_L_OPSIZE, /* 2224 */ IC_VEX_L_OPSIZE, /* 2225 */ IC_VEX_L_OPSIZE, /* 2226 */ IC_VEX_L_OPSIZE, /* 2227 */ IC_VEX_L_OPSIZE, /* 2228 */ IC_VEX_L_OPSIZE, /* 2229 */ IC_VEX_L_OPSIZE, /* 2230 */ IC_VEX_L_OPSIZE, /* 2231 */ IC_VEX_L_W_OPSIZE, /* 2232 */ IC_VEX_L_W_OPSIZE, /* 2233 */ IC_VEX_L_W_OPSIZE, /* 2234 */ IC_VEX_L_W_OPSIZE, /* 2235 */ IC_VEX_L_W_OPSIZE, /* 2236 */ IC_VEX_L_W_OPSIZE, /* 2237 */ IC_VEX_L_W_OPSIZE, /* 2238 */ IC_VEX_L_W_OPSIZE, /* 2239 */ IC_VEX_L, /* 2240 */ IC_VEX_L, /* 2241 */ IC_VEX_L_XS, /* 2242 */ IC_VEX_L_XS, /* 2243 */ IC_VEX_L_XD, /* 2244 */ IC_VEX_L_XD, /* 2245 */ IC_VEX_L_XD, /* 2246 */ IC_VEX_L_XD, /* 2247 */ IC_VEX_L_W, /* 2248 */ IC_VEX_L_W, /* 2249 */ IC_VEX_L_W_XS, /* 2250 */ IC_VEX_L_W_XS, /* 2251 */ IC_VEX_L_W_XD, /* 2252 */ IC_VEX_L_W_XD, /* 2253 */ IC_VEX_L_W_XD, /* 2254 */ IC_VEX_L_W_XD, /* 2255 */ IC_VEX_L_OPSIZE, /* 2256 */ IC_VEX_L_OPSIZE, /* 2257 */ IC_VEX_L_OPSIZE, /* 2258 */ IC_VEX_L_OPSIZE, /* 2259 */ IC_VEX_L_OPSIZE, /* 2260 */ IC_VEX_L_OPSIZE, /* 2261 */ IC_VEX_L_OPSIZE, /* 2262 */ IC_VEX_L_OPSIZE, /* 2263 */ IC_VEX_L_W_OPSIZE, /* 2264 */ IC_VEX_L_W_OPSIZE, /* 2265 */ IC_VEX_L_W_OPSIZE, /* 2266 */ IC_VEX_L_W_OPSIZE, /* 2267 */ IC_VEX_L_W_OPSIZE, /* 2268 */ IC_VEX_L_W_OPSIZE, /* 2269 */ IC_VEX_L_W_OPSIZE, /* 2270 */ IC_VEX_L_W_OPSIZE, /* 2271 */ IC_VEX_L, /* 2272 */ IC_VEX_L, /* 2273 */ IC_VEX_L_XS, /* 2274 */ IC_VEX_L_XS, /* 2275 */ IC_VEX_L_XD, /* 2276 */ IC_VEX_L_XD, /* 2277 */ IC_VEX_L_XD, /* 2278 */ IC_VEX_L_XD, /* 2279 */ IC_VEX_L_W, /* 2280 */ IC_VEX_L_W, /* 2281 */ IC_VEX_L_W_XS, /* 2282 */ IC_VEX_L_W_XS, /* 2283 */ IC_VEX_L_W_XD, /* 2284 */ IC_VEX_L_W_XD, /* 2285 */ IC_VEX_L_W_XD, /* 2286 */ IC_VEX_L_W_XD, /* 2287 */ IC_VEX_L_OPSIZE, /* 2288 */ IC_VEX_L_OPSIZE, /* 2289 */ IC_VEX_L_OPSIZE, /* 2290 */ IC_VEX_L_OPSIZE, /* 2291 */ IC_VEX_L_OPSIZE, /* 2292 */ IC_VEX_L_OPSIZE, /* 2293 */ IC_VEX_L_OPSIZE, /* 2294 */ IC_VEX_L_OPSIZE, /* 2295 */ IC_VEX_L_W_OPSIZE, /* 2296 */ IC_VEX_L_W_OPSIZE, /* 2297 */ IC_VEX_L_W_OPSIZE, /* 2298 */ IC_VEX_L_W_OPSIZE, /* 2299 */ IC_VEX_L_W_OPSIZE, /* 2300 */ IC_VEX_L_W_OPSIZE, /* 2301 */ IC_VEX_L_W_OPSIZE, /* 2302 */ IC_VEX_L_W_OPSIZE, /* 2303 */ IC_EVEX_K, /* 2304 */ IC_EVEX_K, /* 2305 */ IC_EVEX_XS_K, /* 2306 */ IC_EVEX_XS_K, /* 2307 */ IC_EVEX_XD_K, /* 2308 */ IC_EVEX_XD_K, /* 2309 */ IC_EVEX_XD_K, /* 2310 */ IC_EVEX_XD_K, /* 2311 */ IC_EVEX_W_K, /* 2312 */ IC_EVEX_W_K, /* 2313 */ IC_EVEX_W_XS_K, /* 2314 */ IC_EVEX_W_XS_K, /* 2315 */ IC_EVEX_W_XD_K, /* 2316 */ IC_EVEX_W_XD_K, /* 2317 */ IC_EVEX_W_XD_K, /* 2318 */ IC_EVEX_W_XD_K, /* 2319 */ IC_EVEX_OPSIZE_K, /* 2320 */ IC_EVEX_OPSIZE_K, /* 2321 */ IC_EVEX_OPSIZE_K, /* 2322 */ IC_EVEX_OPSIZE_K, /* 2323 */ IC_EVEX_OPSIZE_K, /* 2324 */ IC_EVEX_OPSIZE_K, /* 2325 */ IC_EVEX_OPSIZE_K, /* 2326 */ IC_EVEX_OPSIZE_K, /* 2327 */ IC_EVEX_W_OPSIZE_K, /* 2328 */ IC_EVEX_W_OPSIZE_K, /* 2329 */ IC_EVEX_W_OPSIZE_K, /* 2330 */ IC_EVEX_W_OPSIZE_K, /* 2331 */ IC_EVEX_W_OPSIZE_K, /* 2332 */ IC_EVEX_W_OPSIZE_K, /* 2333 */ IC_EVEX_W_OPSIZE_K, /* 2334 */ IC_EVEX_W_OPSIZE_K, /* 2335 */ IC_EVEX_K, /* 2336 */ IC_EVEX_K, /* 2337 */ IC_EVEX_XS_K, /* 2338 */ IC_EVEX_XS_K, /* 2339 */ IC_EVEX_XD_K, /* 2340 */ IC_EVEX_XD_K, /* 2341 */ IC_EVEX_XD_K, /* 2342 */ IC_EVEX_XD_K, /* 2343 */ IC_EVEX_W_K, /* 2344 */ IC_EVEX_W_K, /* 2345 */ IC_EVEX_W_XS_K, /* 2346 */ IC_EVEX_W_XS_K, /* 2347 */ IC_EVEX_W_XD_K, /* 2348 */ IC_EVEX_W_XD_K, /* 2349 */ IC_EVEX_W_XD_K, /* 2350 */ IC_EVEX_W_XD_K, /* 2351 */ IC_EVEX_OPSIZE_K, /* 2352 */ IC_EVEX_OPSIZE_K, /* 2353 */ IC_EVEX_OPSIZE_K, /* 2354 */ IC_EVEX_OPSIZE_K, /* 2355 */ IC_EVEX_OPSIZE_K, /* 2356 */ IC_EVEX_OPSIZE_K, /* 2357 */ IC_EVEX_OPSIZE_K, /* 2358 */ IC_EVEX_OPSIZE_K, /* 2359 */ IC_EVEX_W_OPSIZE_K, /* 2360 */ IC_EVEX_W_OPSIZE_K, /* 2361 */ IC_EVEX_W_OPSIZE_K, /* 2362 */ IC_EVEX_W_OPSIZE_K, /* 2363 */ IC_EVEX_W_OPSIZE_K, /* 2364 */ IC_EVEX_W_OPSIZE_K, /* 2365 */ IC_EVEX_W_OPSIZE_K, /* 2366 */ IC_EVEX_W_OPSIZE_K, /* 2367 */ IC_EVEX_K, /* 2368 */ IC_EVEX_K, /* 2369 */ IC_EVEX_XS_K, /* 2370 */ IC_EVEX_XS_K, /* 2371 */ IC_EVEX_XD_K, /* 2372 */ IC_EVEX_XD_K, /* 2373 */ IC_EVEX_XD_K, /* 2374 */ IC_EVEX_XD_K, /* 2375 */ IC_EVEX_W_K, /* 2376 */ IC_EVEX_W_K, /* 2377 */ IC_EVEX_W_XS_K, /* 2378 */ IC_EVEX_W_XS_K, /* 2379 */ IC_EVEX_W_XD_K, /* 2380 */ IC_EVEX_W_XD_K, /* 2381 */ IC_EVEX_W_XD_K, /* 2382 */ IC_EVEX_W_XD_K, /* 2383 */ IC_EVEX_OPSIZE_K, /* 2384 */ IC_EVEX_OPSIZE_K, /* 2385 */ IC_EVEX_OPSIZE_K, /* 2386 */ IC_EVEX_OPSIZE_K, /* 2387 */ IC_EVEX_OPSIZE_K, /* 2388 */ IC_EVEX_OPSIZE_K, /* 2389 */ IC_EVEX_OPSIZE_K, /* 2390 */ IC_EVEX_OPSIZE_K, /* 2391 */ IC_EVEX_W_OPSIZE_K, /* 2392 */ IC_EVEX_W_OPSIZE_K, /* 2393 */ IC_EVEX_W_OPSIZE_K, /* 2394 */ IC_EVEX_W_OPSIZE_K, /* 2395 */ IC_EVEX_W_OPSIZE_K, /* 2396 */ IC_EVEX_W_OPSIZE_K, /* 2397 */ IC_EVEX_W_OPSIZE_K, /* 2398 */ IC_EVEX_W_OPSIZE_K, /* 2399 */ IC_EVEX_K, /* 2400 */ IC_EVEX_K, /* 2401 */ IC_EVEX_XS_K, /* 2402 */ IC_EVEX_XS_K, /* 2403 */ IC_EVEX_XD_K, /* 2404 */ IC_EVEX_XD_K, /* 2405 */ IC_EVEX_XD_K, /* 2406 */ IC_EVEX_XD_K, /* 2407 */ IC_EVEX_W_K, /* 2408 */ IC_EVEX_W_K, /* 2409 */ IC_EVEX_W_XS_K, /* 2410 */ IC_EVEX_W_XS_K, /* 2411 */ IC_EVEX_W_XD_K, /* 2412 */ IC_EVEX_W_XD_K, /* 2413 */ IC_EVEX_W_XD_K, /* 2414 */ IC_EVEX_W_XD_K, /* 2415 */ IC_EVEX_OPSIZE_K, /* 2416 */ IC_EVEX_OPSIZE_K, /* 2417 */ IC_EVEX_OPSIZE_K, /* 2418 */ IC_EVEX_OPSIZE_K, /* 2419 */ IC_EVEX_OPSIZE_K, /* 2420 */ IC_EVEX_OPSIZE_K, /* 2421 */ IC_EVEX_OPSIZE_K, /* 2422 */ IC_EVEX_OPSIZE_K, /* 2423 */ IC_EVEX_W_OPSIZE_K, /* 2424 */ IC_EVEX_W_OPSIZE_K, /* 2425 */ IC_EVEX_W_OPSIZE_K, /* 2426 */ IC_EVEX_W_OPSIZE_K, /* 2427 */ IC_EVEX_W_OPSIZE_K, /* 2428 */ IC_EVEX_W_OPSIZE_K, /* 2429 */ IC_EVEX_W_OPSIZE_K, /* 2430 */ IC_EVEX_W_OPSIZE_K, /* 2431 */ IC_EVEX_K, /* 2432 */ IC_EVEX_K, /* 2433 */ IC_EVEX_XS_K, /* 2434 */ IC_EVEX_XS_K, /* 2435 */ IC_EVEX_XD_K, /* 2436 */ IC_EVEX_XD_K, /* 2437 */ IC_EVEX_XD_K, /* 2438 */ IC_EVEX_XD_K, /* 2439 */ IC_EVEX_W_K, /* 2440 */ IC_EVEX_W_K, /* 2441 */ IC_EVEX_W_XS_K, /* 2442 */ IC_EVEX_W_XS_K, /* 2443 */ IC_EVEX_W_XD_K, /* 2444 */ IC_EVEX_W_XD_K, /* 2445 */ IC_EVEX_W_XD_K, /* 2446 */ IC_EVEX_W_XD_K, /* 2447 */ IC_EVEX_OPSIZE_K, /* 2448 */ IC_EVEX_OPSIZE_K, /* 2449 */ IC_EVEX_OPSIZE_K, /* 2450 */ IC_EVEX_OPSIZE_K, /* 2451 */ IC_EVEX_OPSIZE_K, /* 2452 */ IC_EVEX_OPSIZE_K, /* 2453 */ IC_EVEX_OPSIZE_K, /* 2454 */ IC_EVEX_OPSIZE_K, /* 2455 */ IC_EVEX_W_OPSIZE_K, /* 2456 */ IC_EVEX_W_OPSIZE_K, /* 2457 */ IC_EVEX_W_OPSIZE_K, /* 2458 */ IC_EVEX_W_OPSIZE_K, /* 2459 */ IC_EVEX_W_OPSIZE_K, /* 2460 */ IC_EVEX_W_OPSIZE_K, /* 2461 */ IC_EVEX_W_OPSIZE_K, /* 2462 */ IC_EVEX_W_OPSIZE_K, /* 2463 */ IC_EVEX_K, /* 2464 */ IC_EVEX_K, /* 2465 */ IC_EVEX_XS_K, /* 2466 */ IC_EVEX_XS_K, /* 2467 */ IC_EVEX_XD_K, /* 2468 */ IC_EVEX_XD_K, /* 2469 */ IC_EVEX_XD_K, /* 2470 */ IC_EVEX_XD_K, /* 2471 */ IC_EVEX_W_K, /* 2472 */ IC_EVEX_W_K, /* 2473 */ IC_EVEX_W_XS_K, /* 2474 */ IC_EVEX_W_XS_K, /* 2475 */ IC_EVEX_W_XD_K, /* 2476 */ IC_EVEX_W_XD_K, /* 2477 */ IC_EVEX_W_XD_K, /* 2478 */ IC_EVEX_W_XD_K, /* 2479 */ IC_EVEX_OPSIZE_K, /* 2480 */ IC_EVEX_OPSIZE_K, /* 2481 */ IC_EVEX_OPSIZE_K, /* 2482 */ IC_EVEX_OPSIZE_K, /* 2483 */ IC_EVEX_OPSIZE_K, /* 2484 */ IC_EVEX_OPSIZE_K, /* 2485 */ IC_EVEX_OPSIZE_K, /* 2486 */ IC_EVEX_OPSIZE_K, /* 2487 */ IC_EVEX_W_OPSIZE_K, /* 2488 */ IC_EVEX_W_OPSIZE_K, /* 2489 */ IC_EVEX_W_OPSIZE_K, /* 2490 */ IC_EVEX_W_OPSIZE_K, /* 2491 */ IC_EVEX_W_OPSIZE_K, /* 2492 */ IC_EVEX_W_OPSIZE_K, /* 2493 */ IC_EVEX_W_OPSIZE_K, /* 2494 */ IC_EVEX_W_OPSIZE_K, /* 2495 */ IC_EVEX_K, /* 2496 */ IC_EVEX_K, /* 2497 */ IC_EVEX_XS_K, /* 2498 */ IC_EVEX_XS_K, /* 2499 */ IC_EVEX_XD_K, /* 2500 */ IC_EVEX_XD_K, /* 2501 */ IC_EVEX_XD_K, /* 2502 */ IC_EVEX_XD_K, /* 2503 */ IC_EVEX_W_K, /* 2504 */ IC_EVEX_W_K, /* 2505 */ IC_EVEX_W_XS_K, /* 2506 */ IC_EVEX_W_XS_K, /* 2507 */ IC_EVEX_W_XD_K, /* 2508 */ IC_EVEX_W_XD_K, /* 2509 */ IC_EVEX_W_XD_K, /* 2510 */ IC_EVEX_W_XD_K, /* 2511 */ IC_EVEX_OPSIZE_K, /* 2512 */ IC_EVEX_OPSIZE_K, /* 2513 */ IC_EVEX_OPSIZE_K, /* 2514 */ IC_EVEX_OPSIZE_K, /* 2515 */ IC_EVEX_OPSIZE_K, /* 2516 */ IC_EVEX_OPSIZE_K, /* 2517 */ IC_EVEX_OPSIZE_K, /* 2518 */ IC_EVEX_OPSIZE_K, /* 2519 */ IC_EVEX_W_OPSIZE_K, /* 2520 */ IC_EVEX_W_OPSIZE_K, /* 2521 */ IC_EVEX_W_OPSIZE_K, /* 2522 */ IC_EVEX_W_OPSIZE_K, /* 2523 */ IC_EVEX_W_OPSIZE_K, /* 2524 */ IC_EVEX_W_OPSIZE_K, /* 2525 */ IC_EVEX_W_OPSIZE_K, /* 2526 */ IC_EVEX_W_OPSIZE_K, /* 2527 */ IC_EVEX_K, /* 2528 */ IC_EVEX_K, /* 2529 */ IC_EVEX_XS_K, /* 2530 */ IC_EVEX_XS_K, /* 2531 */ IC_EVEX_XD_K, /* 2532 */ IC_EVEX_XD_K, /* 2533 */ IC_EVEX_XD_K, /* 2534 */ IC_EVEX_XD_K, /* 2535 */ IC_EVEX_W_K, /* 2536 */ IC_EVEX_W_K, /* 2537 */ IC_EVEX_W_XS_K, /* 2538 */ IC_EVEX_W_XS_K, /* 2539 */ IC_EVEX_W_XD_K, /* 2540 */ IC_EVEX_W_XD_K, /* 2541 */ IC_EVEX_W_XD_K, /* 2542 */ IC_EVEX_W_XD_K, /* 2543 */ IC_EVEX_OPSIZE_K, /* 2544 */ IC_EVEX_OPSIZE_K, /* 2545 */ IC_EVEX_OPSIZE_K, /* 2546 */ IC_EVEX_OPSIZE_K, /* 2547 */ IC_EVEX_OPSIZE_K, /* 2548 */ IC_EVEX_OPSIZE_K, /* 2549 */ IC_EVEX_OPSIZE_K, /* 2550 */ IC_EVEX_OPSIZE_K, /* 2551 */ IC_EVEX_W_OPSIZE_K, /* 2552 */ IC_EVEX_W_OPSIZE_K, /* 2553 */ IC_EVEX_W_OPSIZE_K, /* 2554 */ IC_EVEX_W_OPSIZE_K, /* 2555 */ IC_EVEX_W_OPSIZE_K, /* 2556 */ IC_EVEX_W_OPSIZE_K, /* 2557 */ IC_EVEX_W_OPSIZE_K, /* 2558 */ IC_EVEX_W_OPSIZE_K, /* 2559 */ IC, /* 2560 */ IC_64BIT, /* 2561 */ IC_XS, /* 2562 */ IC_64BIT_XS, /* 2563 */ IC_XD, /* 2564 */ IC_64BIT_XD, /* 2565 */ IC_XS, /* 2566 */ IC_64BIT_XS, /* 2567 */ IC, /* 2568 */ IC_64BIT_REXW, /* 2569 */ IC_XS, /* 2570 */ IC_64BIT_REXW_XS, /* 2571 */ IC_XD, /* 2572 */ IC_64BIT_REXW_XD, /* 2573 */ IC_XS, /* 2574 */ IC_64BIT_REXW_XS, /* 2575 */ IC_OPSIZE, /* 2576 */ IC_64BIT_OPSIZE, /* 2577 */ IC_XS_OPSIZE, /* 2578 */ IC_64BIT_XS_OPSIZE, /* 2579 */ IC_XD_OPSIZE, /* 2580 */ IC_64BIT_XD_OPSIZE, /* 2581 */ IC_XS_OPSIZE, /* 2582 */ IC_64BIT_XD_OPSIZE, /* 2583 */ IC_OPSIZE, /* 2584 */ IC_64BIT_REXW_OPSIZE, /* 2585 */ IC_XS_OPSIZE, /* 2586 */ IC_64BIT_REXW_XS, /* 2587 */ IC_XD_OPSIZE, /* 2588 */ IC_64BIT_REXW_XD, /* 2589 */ IC_XS_OPSIZE, /* 2590 */ IC_64BIT_REXW_XS, /* 2591 */ IC_ADSIZE, /* 2592 */ IC_64BIT_ADSIZE, /* 2593 */ IC_XS, /* 2594 */ IC_64BIT_XS, /* 2595 */ IC_XD, /* 2596 */ IC_64BIT_XD, /* 2597 */ IC_XS, /* 2598 */ IC_64BIT_XS, /* 2599 */ IC_ADSIZE, /* 2600 */ IC_64BIT_REXW_ADSIZE, /* 2601 */ IC_XS, /* 2602 */ IC_64BIT_REXW_XS, /* 2603 */ IC_XD, /* 2604 */ IC_64BIT_REXW_XD, /* 2605 */ IC_XS, /* 2606 */ IC_64BIT_REXW_XS, /* 2607 */ IC_OPSIZE_ADSIZE, /* 2608 */ IC_64BIT_OPSIZE_ADSIZE, /* 2609 */ IC_XS_OPSIZE, /* 2610 */ IC_64BIT_XS_OPSIZE, /* 2611 */ IC_XD_OPSIZE, /* 2612 */ IC_64BIT_XD_OPSIZE, /* 2613 */ IC_XS_OPSIZE, /* 2614 */ IC_64BIT_XD_OPSIZE, /* 2615 */ IC_OPSIZE_ADSIZE, /* 2616 */ IC_64BIT_REXW_OPSIZE, /* 2617 */ IC_XS_OPSIZE, /* 2618 */ IC_64BIT_REXW_XS, /* 2619 */ IC_XD_OPSIZE, /* 2620 */ IC_64BIT_REXW_XD, /* 2621 */ IC_XS_OPSIZE, /* 2622 */ IC_64BIT_REXW_XS, /* 2623 */ IC_VEX, /* 2624 */ IC_VEX, /* 2625 */ IC_VEX_XS, /* 2626 */ IC_VEX_XS, /* 2627 */ IC_VEX_XD, /* 2628 */ IC_VEX_XD, /* 2629 */ IC_VEX_XD, /* 2630 */ IC_VEX_XD, /* 2631 */ IC_VEX_W, /* 2632 */ IC_VEX_W, /* 2633 */ IC_VEX_W_XS, /* 2634 */ IC_VEX_W_XS, /* 2635 */ IC_VEX_W_XD, /* 2636 */ IC_VEX_W_XD, /* 2637 */ IC_VEX_W_XD, /* 2638 */ IC_VEX_W_XD, /* 2639 */ IC_VEX_OPSIZE, /* 2640 */ IC_VEX_OPSIZE, /* 2641 */ IC_VEX_OPSIZE, /* 2642 */ IC_VEX_OPSIZE, /* 2643 */ IC_VEX_OPSIZE, /* 2644 */ IC_VEX_OPSIZE, /* 2645 */ IC_VEX_OPSIZE, /* 2646 */ IC_VEX_OPSIZE, /* 2647 */ IC_VEX_W_OPSIZE, /* 2648 */ IC_VEX_W_OPSIZE, /* 2649 */ IC_VEX_W_OPSIZE, /* 2650 */ IC_VEX_W_OPSIZE, /* 2651 */ IC_VEX_W_OPSIZE, /* 2652 */ IC_VEX_W_OPSIZE, /* 2653 */ IC_VEX_W_OPSIZE, /* 2654 */ IC_VEX_W_OPSIZE, /* 2655 */ IC_VEX, /* 2656 */ IC_VEX, /* 2657 */ IC_VEX_XS, /* 2658 */ IC_VEX_XS, /* 2659 */ IC_VEX_XD, /* 2660 */ IC_VEX_XD, /* 2661 */ IC_VEX_XD, /* 2662 */ IC_VEX_XD, /* 2663 */ IC_VEX_W, /* 2664 */ IC_VEX_W, /* 2665 */ IC_VEX_W_XS, /* 2666 */ IC_VEX_W_XS, /* 2667 */ IC_VEX_W_XD, /* 2668 */ IC_VEX_W_XD, /* 2669 */ IC_VEX_W_XD, /* 2670 */ IC_VEX_W_XD, /* 2671 */ IC_VEX_OPSIZE, /* 2672 */ IC_VEX_OPSIZE, /* 2673 */ IC_VEX_OPSIZE, /* 2674 */ IC_VEX_OPSIZE, /* 2675 */ IC_VEX_OPSIZE, /* 2676 */ IC_VEX_OPSIZE, /* 2677 */ IC_VEX_OPSIZE, /* 2678 */ IC_VEX_OPSIZE, /* 2679 */ IC_VEX_W_OPSIZE, /* 2680 */ IC_VEX_W_OPSIZE, /* 2681 */ IC_VEX_W_OPSIZE, /* 2682 */ IC_VEX_W_OPSIZE, /* 2683 */ IC_VEX_W_OPSIZE, /* 2684 */ IC_VEX_W_OPSIZE, /* 2685 */ IC_VEX_W_OPSIZE, /* 2686 */ IC_VEX_W_OPSIZE, /* 2687 */ IC_VEX_L, /* 2688 */ IC_VEX_L, /* 2689 */ IC_VEX_L_XS, /* 2690 */ IC_VEX_L_XS, /* 2691 */ IC_VEX_L_XD, /* 2692 */ IC_VEX_L_XD, /* 2693 */ IC_VEX_L_XD, /* 2694 */ IC_VEX_L_XD, /* 2695 */ IC_VEX_L_W, /* 2696 */ IC_VEX_L_W, /* 2697 */ IC_VEX_L_W_XS, /* 2698 */ IC_VEX_L_W_XS, /* 2699 */ IC_VEX_L_W_XD, /* 2700 */ IC_VEX_L_W_XD, /* 2701 */ IC_VEX_L_W_XD, /* 2702 */ IC_VEX_L_W_XD, /* 2703 */ IC_VEX_L_OPSIZE, /* 2704 */ IC_VEX_L_OPSIZE, /* 2705 */ IC_VEX_L_OPSIZE, /* 2706 */ IC_VEX_L_OPSIZE, /* 2707 */ IC_VEX_L_OPSIZE, /* 2708 */ IC_VEX_L_OPSIZE, /* 2709 */ IC_VEX_L_OPSIZE, /* 2710 */ IC_VEX_L_OPSIZE, /* 2711 */ IC_VEX_L_W_OPSIZE, /* 2712 */ IC_VEX_L_W_OPSIZE, /* 2713 */ IC_VEX_L_W_OPSIZE, /* 2714 */ IC_VEX_L_W_OPSIZE, /* 2715 */ IC_VEX_L_W_OPSIZE, /* 2716 */ IC_VEX_L_W_OPSIZE, /* 2717 */ IC_VEX_L_W_OPSIZE, /* 2718 */ IC_VEX_L_W_OPSIZE, /* 2719 */ IC_VEX_L, /* 2720 */ IC_VEX_L, /* 2721 */ IC_VEX_L_XS, /* 2722 */ IC_VEX_L_XS, /* 2723 */ IC_VEX_L_XD, /* 2724 */ IC_VEX_L_XD, /* 2725 */ IC_VEX_L_XD, /* 2726 */ IC_VEX_L_XD, /* 2727 */ IC_VEX_L_W, /* 2728 */ IC_VEX_L_W, /* 2729 */ IC_VEX_L_W_XS, /* 2730 */ IC_VEX_L_W_XS, /* 2731 */ IC_VEX_L_W_XD, /* 2732 */ IC_VEX_L_W_XD, /* 2733 */ IC_VEX_L_W_XD, /* 2734 */ IC_VEX_L_W_XD, /* 2735 */ IC_VEX_L_OPSIZE, /* 2736 */ IC_VEX_L_OPSIZE, /* 2737 */ IC_VEX_L_OPSIZE, /* 2738 */ IC_VEX_L_OPSIZE, /* 2739 */ IC_VEX_L_OPSIZE, /* 2740 */ IC_VEX_L_OPSIZE, /* 2741 */ IC_VEX_L_OPSIZE, /* 2742 */ IC_VEX_L_OPSIZE, /* 2743 */ IC_VEX_L_W_OPSIZE, /* 2744 */ IC_VEX_L_W_OPSIZE, /* 2745 */ IC_VEX_L_W_OPSIZE, /* 2746 */ IC_VEX_L_W_OPSIZE, /* 2747 */ IC_VEX_L_W_OPSIZE, /* 2748 */ IC_VEX_L_W_OPSIZE, /* 2749 */ IC_VEX_L_W_OPSIZE, /* 2750 */ IC_VEX_L_W_OPSIZE, /* 2751 */ IC_VEX_L, /* 2752 */ IC_VEX_L, /* 2753 */ IC_VEX_L_XS, /* 2754 */ IC_VEX_L_XS, /* 2755 */ IC_VEX_L_XD, /* 2756 */ IC_VEX_L_XD, /* 2757 */ IC_VEX_L_XD, /* 2758 */ IC_VEX_L_XD, /* 2759 */ IC_VEX_L_W, /* 2760 */ IC_VEX_L_W, /* 2761 */ IC_VEX_L_W_XS, /* 2762 */ IC_VEX_L_W_XS, /* 2763 */ IC_VEX_L_W_XD, /* 2764 */ IC_VEX_L_W_XD, /* 2765 */ IC_VEX_L_W_XD, /* 2766 */ IC_VEX_L_W_XD, /* 2767 */ IC_VEX_L_OPSIZE, /* 2768 */ IC_VEX_L_OPSIZE, /* 2769 */ IC_VEX_L_OPSIZE, /* 2770 */ IC_VEX_L_OPSIZE, /* 2771 */ IC_VEX_L_OPSIZE, /* 2772 */ IC_VEX_L_OPSIZE, /* 2773 */ IC_VEX_L_OPSIZE, /* 2774 */ IC_VEX_L_OPSIZE, /* 2775 */ IC_VEX_L_W_OPSIZE, /* 2776 */ IC_VEX_L_W_OPSIZE, /* 2777 */ IC_VEX_L_W_OPSIZE, /* 2778 */ IC_VEX_L_W_OPSIZE, /* 2779 */ IC_VEX_L_W_OPSIZE, /* 2780 */ IC_VEX_L_W_OPSIZE, /* 2781 */ IC_VEX_L_W_OPSIZE, /* 2782 */ IC_VEX_L_W_OPSIZE, /* 2783 */ IC_VEX_L, /* 2784 */ IC_VEX_L, /* 2785 */ IC_VEX_L_XS, /* 2786 */ IC_VEX_L_XS, /* 2787 */ IC_VEX_L_XD, /* 2788 */ IC_VEX_L_XD, /* 2789 */ IC_VEX_L_XD, /* 2790 */ IC_VEX_L_XD, /* 2791 */ IC_VEX_L_W, /* 2792 */ IC_VEX_L_W, /* 2793 */ IC_VEX_L_W_XS, /* 2794 */ IC_VEX_L_W_XS, /* 2795 */ IC_VEX_L_W_XD, /* 2796 */ IC_VEX_L_W_XD, /* 2797 */ IC_VEX_L_W_XD, /* 2798 */ IC_VEX_L_W_XD, /* 2799 */ IC_VEX_L_OPSIZE, /* 2800 */ IC_VEX_L_OPSIZE, /* 2801 */ IC_VEX_L_OPSIZE, /* 2802 */ IC_VEX_L_OPSIZE, /* 2803 */ IC_VEX_L_OPSIZE, /* 2804 */ IC_VEX_L_OPSIZE, /* 2805 */ IC_VEX_L_OPSIZE, /* 2806 */ IC_VEX_L_OPSIZE, /* 2807 */ IC_VEX_L_W_OPSIZE, /* 2808 */ IC_VEX_L_W_OPSIZE, /* 2809 */ IC_VEX_L_W_OPSIZE, /* 2810 */ IC_VEX_L_W_OPSIZE, /* 2811 */ IC_VEX_L_W_OPSIZE, /* 2812 */ IC_VEX_L_W_OPSIZE, /* 2813 */ IC_VEX_L_W_OPSIZE, /* 2814 */ IC_VEX_L_W_OPSIZE, /* 2815 */ IC_EVEX_L_K, /* 2816 */ IC_EVEX_L_K, /* 2817 */ IC_EVEX_L_XS_K, /* 2818 */ IC_EVEX_L_XS_K, /* 2819 */ IC_EVEX_L_XD_K, /* 2820 */ IC_EVEX_L_XD_K, /* 2821 */ IC_EVEX_L_XD_K, /* 2822 */ IC_EVEX_L_XD_K, /* 2823 */ IC_EVEX_L_W_K, /* 2824 */ IC_EVEX_L_W_K, /* 2825 */ IC_EVEX_L_W_XS_K, /* 2826 */ IC_EVEX_L_W_XS_K, /* 2827 */ IC_EVEX_L_W_XD_K, /* 2828 */ IC_EVEX_L_W_XD_K, /* 2829 */ IC_EVEX_L_W_XD_K, /* 2830 */ IC_EVEX_L_W_XD_K, /* 2831 */ IC_EVEX_L_OPSIZE_K, /* 2832 */ IC_EVEX_L_OPSIZE_K, /* 2833 */ IC_EVEX_L_OPSIZE_K, /* 2834 */ IC_EVEX_L_OPSIZE_K, /* 2835 */ IC_EVEX_L_OPSIZE_K, /* 2836 */ IC_EVEX_L_OPSIZE_K, /* 2837 */ IC_EVEX_L_OPSIZE_K, /* 2838 */ IC_EVEX_L_OPSIZE_K, /* 2839 */ IC_EVEX_L_W_OPSIZE_K, /* 2840 */ IC_EVEX_L_W_OPSIZE_K, /* 2841 */ IC_EVEX_L_W_OPSIZE_K, /* 2842 */ IC_EVEX_L_W_OPSIZE_K, /* 2843 */ IC_EVEX_L_W_OPSIZE_K, /* 2844 */ IC_EVEX_L_W_OPSIZE_K, /* 2845 */ IC_EVEX_L_W_OPSIZE_K, /* 2846 */ IC_EVEX_L_W_OPSIZE_K, /* 2847 */ IC_EVEX_L_K, /* 2848 */ IC_EVEX_L_K, /* 2849 */ IC_EVEX_L_XS_K, /* 2850 */ IC_EVEX_L_XS_K, /* 2851 */ IC_EVEX_L_XD_K, /* 2852 */ IC_EVEX_L_XD_K, /* 2853 */ IC_EVEX_L_XD_K, /* 2854 */ IC_EVEX_L_XD_K, /* 2855 */ IC_EVEX_L_W_K, /* 2856 */ IC_EVEX_L_W_K, /* 2857 */ IC_EVEX_L_W_XS_K, /* 2858 */ IC_EVEX_L_W_XS_K, /* 2859 */ IC_EVEX_L_W_XD_K, /* 2860 */ IC_EVEX_L_W_XD_K, /* 2861 */ IC_EVEX_L_W_XD_K, /* 2862 */ IC_EVEX_L_W_XD_K, /* 2863 */ IC_EVEX_L_OPSIZE_K, /* 2864 */ IC_EVEX_L_OPSIZE_K, /* 2865 */ IC_EVEX_L_OPSIZE_K, /* 2866 */ IC_EVEX_L_OPSIZE_K, /* 2867 */ IC_EVEX_L_OPSIZE_K, /* 2868 */ IC_EVEX_L_OPSIZE_K, /* 2869 */ IC_EVEX_L_OPSIZE_K, /* 2870 */ IC_EVEX_L_OPSIZE_K, /* 2871 */ IC_EVEX_L_W_OPSIZE_K, /* 2872 */ IC_EVEX_L_W_OPSIZE_K, /* 2873 */ IC_EVEX_L_W_OPSIZE_K, /* 2874 */ IC_EVEX_L_W_OPSIZE_K, /* 2875 */ IC_EVEX_L_W_OPSIZE_K, /* 2876 */ IC_EVEX_L_W_OPSIZE_K, /* 2877 */ IC_EVEX_L_W_OPSIZE_K, /* 2878 */ IC_EVEX_L_W_OPSIZE_K, /* 2879 */ IC_EVEX_L_K, /* 2880 */ IC_EVEX_L_K, /* 2881 */ IC_EVEX_L_XS_K, /* 2882 */ IC_EVEX_L_XS_K, /* 2883 */ IC_EVEX_L_XD_K, /* 2884 */ IC_EVEX_L_XD_K, /* 2885 */ IC_EVEX_L_XD_K, /* 2886 */ IC_EVEX_L_XD_K, /* 2887 */ IC_EVEX_L_W_K, /* 2888 */ IC_EVEX_L_W_K, /* 2889 */ IC_EVEX_L_W_XS_K, /* 2890 */ IC_EVEX_L_W_XS_K, /* 2891 */ IC_EVEX_L_W_XD_K, /* 2892 */ IC_EVEX_L_W_XD_K, /* 2893 */ IC_EVEX_L_W_XD_K, /* 2894 */ IC_EVEX_L_W_XD_K, /* 2895 */ IC_EVEX_L_OPSIZE_K, /* 2896 */ IC_EVEX_L_OPSIZE_K, /* 2897 */ IC_EVEX_L_OPSIZE_K, /* 2898 */ IC_EVEX_L_OPSIZE_K, /* 2899 */ IC_EVEX_L_OPSIZE_K, /* 2900 */ IC_EVEX_L_OPSIZE_K, /* 2901 */ IC_EVEX_L_OPSIZE_K, /* 2902 */ IC_EVEX_L_OPSIZE_K, /* 2903 */ IC_EVEX_L_W_OPSIZE_K, /* 2904 */ IC_EVEX_L_W_OPSIZE_K, /* 2905 */ IC_EVEX_L_W_OPSIZE_K, /* 2906 */ IC_EVEX_L_W_OPSIZE_K, /* 2907 */ IC_EVEX_L_W_OPSIZE_K, /* 2908 */ IC_EVEX_L_W_OPSIZE_K, /* 2909 */ IC_EVEX_L_W_OPSIZE_K, /* 2910 */ IC_EVEX_L_W_OPSIZE_K, /* 2911 */ IC_EVEX_L_K, /* 2912 */ IC_EVEX_L_K, /* 2913 */ IC_EVEX_L_XS_K, /* 2914 */ IC_EVEX_L_XS_K, /* 2915 */ IC_EVEX_L_XD_K, /* 2916 */ IC_EVEX_L_XD_K, /* 2917 */ IC_EVEX_L_XD_K, /* 2918 */ IC_EVEX_L_XD_K, /* 2919 */ IC_EVEX_L_W_K, /* 2920 */ IC_EVEX_L_W_K, /* 2921 */ IC_EVEX_L_W_XS_K, /* 2922 */ IC_EVEX_L_W_XS_K, /* 2923 */ IC_EVEX_L_W_XD_K, /* 2924 */ IC_EVEX_L_W_XD_K, /* 2925 */ IC_EVEX_L_W_XD_K, /* 2926 */ IC_EVEX_L_W_XD_K, /* 2927 */ IC_EVEX_L_OPSIZE_K, /* 2928 */ IC_EVEX_L_OPSIZE_K, /* 2929 */ IC_EVEX_L_OPSIZE_K, /* 2930 */ IC_EVEX_L_OPSIZE_K, /* 2931 */ IC_EVEX_L_OPSIZE_K, /* 2932 */ IC_EVEX_L_OPSIZE_K, /* 2933 */ IC_EVEX_L_OPSIZE_K, /* 2934 */ IC_EVEX_L_OPSIZE_K, /* 2935 */ IC_EVEX_L_W_OPSIZE_K, /* 2936 */ IC_EVEX_L_W_OPSIZE_K, /* 2937 */ IC_EVEX_L_W_OPSIZE_K, /* 2938 */ IC_EVEX_L_W_OPSIZE_K, /* 2939 */ IC_EVEX_L_W_OPSIZE_K, /* 2940 */ IC_EVEX_L_W_OPSIZE_K, /* 2941 */ IC_EVEX_L_W_OPSIZE_K, /* 2942 */ IC_EVEX_L_W_OPSIZE_K, /* 2943 */ IC_EVEX_L_K, /* 2944 */ IC_EVEX_L_K, /* 2945 */ IC_EVEX_L_XS_K, /* 2946 */ IC_EVEX_L_XS_K, /* 2947 */ IC_EVEX_L_XD_K, /* 2948 */ IC_EVEX_L_XD_K, /* 2949 */ IC_EVEX_L_XD_K, /* 2950 */ IC_EVEX_L_XD_K, /* 2951 */ IC_EVEX_L_W_K, /* 2952 */ IC_EVEX_L_W_K, /* 2953 */ IC_EVEX_L_W_XS_K, /* 2954 */ IC_EVEX_L_W_XS_K, /* 2955 */ IC_EVEX_L_W_XD_K, /* 2956 */ IC_EVEX_L_W_XD_K, /* 2957 */ IC_EVEX_L_W_XD_K, /* 2958 */ IC_EVEX_L_W_XD_K, /* 2959 */ IC_EVEX_L_OPSIZE_K, /* 2960 */ IC_EVEX_L_OPSIZE_K, /* 2961 */ IC_EVEX_L_OPSIZE_K, /* 2962 */ IC_EVEX_L_OPSIZE_K, /* 2963 */ IC_EVEX_L_OPSIZE_K, /* 2964 */ IC_EVEX_L_OPSIZE_K, /* 2965 */ IC_EVEX_L_OPSIZE_K, /* 2966 */ IC_EVEX_L_OPSIZE_K, /* 2967 */ IC_EVEX_L_W_OPSIZE_K, /* 2968 */ IC_EVEX_L_W_OPSIZE_K, /* 2969 */ IC_EVEX_L_W_OPSIZE_K, /* 2970 */ IC_EVEX_L_W_OPSIZE_K, /* 2971 */ IC_EVEX_L_W_OPSIZE_K, /* 2972 */ IC_EVEX_L_W_OPSIZE_K, /* 2973 */ IC_EVEX_L_W_OPSIZE_K, /* 2974 */ IC_EVEX_L_W_OPSIZE_K, /* 2975 */ IC_EVEX_L_K, /* 2976 */ IC_EVEX_L_K, /* 2977 */ IC_EVEX_L_XS_K, /* 2978 */ IC_EVEX_L_XS_K, /* 2979 */ IC_EVEX_L_XD_K, /* 2980 */ IC_EVEX_L_XD_K, /* 2981 */ IC_EVEX_L_XD_K, /* 2982 */ IC_EVEX_L_XD_K, /* 2983 */ IC_EVEX_L_W_K, /* 2984 */ IC_EVEX_L_W_K, /* 2985 */ IC_EVEX_L_W_XS_K, /* 2986 */ IC_EVEX_L_W_XS_K, /* 2987 */ IC_EVEX_L_W_XD_K, /* 2988 */ IC_EVEX_L_W_XD_K, /* 2989 */ IC_EVEX_L_W_XD_K, /* 2990 */ IC_EVEX_L_W_XD_K, /* 2991 */ IC_EVEX_L_OPSIZE_K, /* 2992 */ IC_EVEX_L_OPSIZE_K, /* 2993 */ IC_EVEX_L_OPSIZE_K, /* 2994 */ IC_EVEX_L_OPSIZE_K, /* 2995 */ IC_EVEX_L_OPSIZE_K, /* 2996 */ IC_EVEX_L_OPSIZE_K, /* 2997 */ IC_EVEX_L_OPSIZE_K, /* 2998 */ IC_EVEX_L_OPSIZE_K, /* 2999 */ IC_EVEX_L_W_OPSIZE_K, /* 3000 */ IC_EVEX_L_W_OPSIZE_K, /* 3001 */ IC_EVEX_L_W_OPSIZE_K, /* 3002 */ IC_EVEX_L_W_OPSIZE_K, /* 3003 */ IC_EVEX_L_W_OPSIZE_K, /* 3004 */ IC_EVEX_L_W_OPSIZE_K, /* 3005 */ IC_EVEX_L_W_OPSIZE_K, /* 3006 */ IC_EVEX_L_W_OPSIZE_K, /* 3007 */ IC_EVEX_L_K, /* 3008 */ IC_EVEX_L_K, /* 3009 */ IC_EVEX_L_XS_K, /* 3010 */ IC_EVEX_L_XS_K, /* 3011 */ IC_EVEX_L_XD_K, /* 3012 */ IC_EVEX_L_XD_K, /* 3013 */ IC_EVEX_L_XD_K, /* 3014 */ IC_EVEX_L_XD_K, /* 3015 */ IC_EVEX_L_W_K, /* 3016 */ IC_EVEX_L_W_K, /* 3017 */ IC_EVEX_L_W_XS_K, /* 3018 */ IC_EVEX_L_W_XS_K, /* 3019 */ IC_EVEX_L_W_XD_K, /* 3020 */ IC_EVEX_L_W_XD_K, /* 3021 */ IC_EVEX_L_W_XD_K, /* 3022 */ IC_EVEX_L_W_XD_K, /* 3023 */ IC_EVEX_L_OPSIZE_K, /* 3024 */ IC_EVEX_L_OPSIZE_K, /* 3025 */ IC_EVEX_L_OPSIZE_K, /* 3026 */ IC_EVEX_L_OPSIZE_K, /* 3027 */ IC_EVEX_L_OPSIZE_K, /* 3028 */ IC_EVEX_L_OPSIZE_K, /* 3029 */ IC_EVEX_L_OPSIZE_K, /* 3030 */ IC_EVEX_L_OPSIZE_K, /* 3031 */ IC_EVEX_L_W_OPSIZE_K, /* 3032 */ IC_EVEX_L_W_OPSIZE_K, /* 3033 */ IC_EVEX_L_W_OPSIZE_K, /* 3034 */ IC_EVEX_L_W_OPSIZE_K, /* 3035 */ IC_EVEX_L_W_OPSIZE_K, /* 3036 */ IC_EVEX_L_W_OPSIZE_K, /* 3037 */ IC_EVEX_L_W_OPSIZE_K, /* 3038 */ IC_EVEX_L_W_OPSIZE_K, /* 3039 */ IC_EVEX_L_K, /* 3040 */ IC_EVEX_L_K, /* 3041 */ IC_EVEX_L_XS_K, /* 3042 */ IC_EVEX_L_XS_K, /* 3043 */ IC_EVEX_L_XD_K, /* 3044 */ IC_EVEX_L_XD_K, /* 3045 */ IC_EVEX_L_XD_K, /* 3046 */ IC_EVEX_L_XD_K, /* 3047 */ IC_EVEX_L_W_K, /* 3048 */ IC_EVEX_L_W_K, /* 3049 */ IC_EVEX_L_W_XS_K, /* 3050 */ IC_EVEX_L_W_XS_K, /* 3051 */ IC_EVEX_L_W_XD_K, /* 3052 */ IC_EVEX_L_W_XD_K, /* 3053 */ IC_EVEX_L_W_XD_K, /* 3054 */ IC_EVEX_L_W_XD_K, /* 3055 */ IC_EVEX_L_OPSIZE_K, /* 3056 */ IC_EVEX_L_OPSIZE_K, /* 3057 */ IC_EVEX_L_OPSIZE_K, /* 3058 */ IC_EVEX_L_OPSIZE_K, /* 3059 */ IC_EVEX_L_OPSIZE_K, /* 3060 */ IC_EVEX_L_OPSIZE_K, /* 3061 */ IC_EVEX_L_OPSIZE_K, /* 3062 */ IC_EVEX_L_OPSIZE_K, /* 3063 */ IC_EVEX_L_W_OPSIZE_K, /* 3064 */ IC_EVEX_L_W_OPSIZE_K, /* 3065 */ IC_EVEX_L_W_OPSIZE_K, /* 3066 */ IC_EVEX_L_W_OPSIZE_K, /* 3067 */ IC_EVEX_L_W_OPSIZE_K, /* 3068 */ IC_EVEX_L_W_OPSIZE_K, /* 3069 */ IC_EVEX_L_W_OPSIZE_K, /* 3070 */ IC_EVEX_L_W_OPSIZE_K, /* 3071 */ IC, /* 3072 */ IC_64BIT, /* 3073 */ IC_XS, /* 3074 */ IC_64BIT_XS, /* 3075 */ IC_XD, /* 3076 */ IC_64BIT_XD, /* 3077 */ IC_XS, /* 3078 */ IC_64BIT_XS, /* 3079 */ IC, /* 3080 */ IC_64BIT_REXW, /* 3081 */ IC_XS, /* 3082 */ IC_64BIT_REXW_XS, /* 3083 */ IC_XD, /* 3084 */ IC_64BIT_REXW_XD, /* 3085 */ IC_XS, /* 3086 */ IC_64BIT_REXW_XS, /* 3087 */ IC_OPSIZE, /* 3088 */ IC_64BIT_OPSIZE, /* 3089 */ IC_XS_OPSIZE, /* 3090 */ IC_64BIT_XS_OPSIZE, /* 3091 */ IC_XD_OPSIZE, /* 3092 */ IC_64BIT_XD_OPSIZE, /* 3093 */ IC_XS_OPSIZE, /* 3094 */ IC_64BIT_XD_OPSIZE, /* 3095 */ IC_OPSIZE, /* 3096 */ IC_64BIT_REXW_OPSIZE, /* 3097 */ IC_XS_OPSIZE, /* 3098 */ IC_64BIT_REXW_XS, /* 3099 */ IC_XD_OPSIZE, /* 3100 */ IC_64BIT_REXW_XD, /* 3101 */ IC_XS_OPSIZE, /* 3102 */ IC_64BIT_REXW_XS, /* 3103 */ IC_ADSIZE, /* 3104 */ IC_64BIT_ADSIZE, /* 3105 */ IC_XS, /* 3106 */ IC_64BIT_XS, /* 3107 */ IC_XD, /* 3108 */ IC_64BIT_XD, /* 3109 */ IC_XS, /* 3110 */ IC_64BIT_XS, /* 3111 */ IC_ADSIZE, /* 3112 */ IC_64BIT_REXW_ADSIZE, /* 3113 */ IC_XS, /* 3114 */ IC_64BIT_REXW_XS, /* 3115 */ IC_XD, /* 3116 */ IC_64BIT_REXW_XD, /* 3117 */ IC_XS, /* 3118 */ IC_64BIT_REXW_XS, /* 3119 */ IC_OPSIZE_ADSIZE, /* 3120 */ IC_64BIT_OPSIZE_ADSIZE, /* 3121 */ IC_XS_OPSIZE, /* 3122 */ IC_64BIT_XS_OPSIZE, /* 3123 */ IC_XD_OPSIZE, /* 3124 */ IC_64BIT_XD_OPSIZE, /* 3125 */ IC_XS_OPSIZE, /* 3126 */ IC_64BIT_XD_OPSIZE, /* 3127 */ IC_OPSIZE_ADSIZE, /* 3128 */ IC_64BIT_REXW_OPSIZE, /* 3129 */ IC_XS_OPSIZE, /* 3130 */ IC_64BIT_REXW_XS, /* 3131 */ IC_XD_OPSIZE, /* 3132 */ IC_64BIT_REXW_XD, /* 3133 */ IC_XS_OPSIZE, /* 3134 */ IC_64BIT_REXW_XS, /* 3135 */ IC_VEX, /* 3136 */ IC_VEX, /* 3137 */ IC_VEX_XS, /* 3138 */ IC_VEX_XS, /* 3139 */ IC_VEX_XD, /* 3140 */ IC_VEX_XD, /* 3141 */ IC_VEX_XD, /* 3142 */ IC_VEX_XD, /* 3143 */ IC_VEX_W, /* 3144 */ IC_VEX_W, /* 3145 */ IC_VEX_W_XS, /* 3146 */ IC_VEX_W_XS, /* 3147 */ IC_VEX_W_XD, /* 3148 */ IC_VEX_W_XD, /* 3149 */ IC_VEX_W_XD, /* 3150 */ IC_VEX_W_XD, /* 3151 */ IC_VEX_OPSIZE, /* 3152 */ IC_VEX_OPSIZE, /* 3153 */ IC_VEX_OPSIZE, /* 3154 */ IC_VEX_OPSIZE, /* 3155 */ IC_VEX_OPSIZE, /* 3156 */ IC_VEX_OPSIZE, /* 3157 */ IC_VEX_OPSIZE, /* 3158 */ IC_VEX_OPSIZE, /* 3159 */ IC_VEX_W_OPSIZE, /* 3160 */ IC_VEX_W_OPSIZE, /* 3161 */ IC_VEX_W_OPSIZE, /* 3162 */ IC_VEX_W_OPSIZE, /* 3163 */ IC_VEX_W_OPSIZE, /* 3164 */ IC_VEX_W_OPSIZE, /* 3165 */ IC_VEX_W_OPSIZE, /* 3166 */ IC_VEX_W_OPSIZE, /* 3167 */ IC_VEX, /* 3168 */ IC_VEX, /* 3169 */ IC_VEX_XS, /* 3170 */ IC_VEX_XS, /* 3171 */ IC_VEX_XD, /* 3172 */ IC_VEX_XD, /* 3173 */ IC_VEX_XD, /* 3174 */ IC_VEX_XD, /* 3175 */ IC_VEX_W, /* 3176 */ IC_VEX_W, /* 3177 */ IC_VEX_W_XS, /* 3178 */ IC_VEX_W_XS, /* 3179 */ IC_VEX_W_XD, /* 3180 */ IC_VEX_W_XD, /* 3181 */ IC_VEX_W_XD, /* 3182 */ IC_VEX_W_XD, /* 3183 */ IC_VEX_OPSIZE, /* 3184 */ IC_VEX_OPSIZE, /* 3185 */ IC_VEX_OPSIZE, /* 3186 */ IC_VEX_OPSIZE, /* 3187 */ IC_VEX_OPSIZE, /* 3188 */ IC_VEX_OPSIZE, /* 3189 */ IC_VEX_OPSIZE, /* 3190 */ IC_VEX_OPSIZE, /* 3191 */ IC_VEX_W_OPSIZE, /* 3192 */ IC_VEX_W_OPSIZE, /* 3193 */ IC_VEX_W_OPSIZE, /* 3194 */ IC_VEX_W_OPSIZE, /* 3195 */ IC_VEX_W_OPSIZE, /* 3196 */ IC_VEX_W_OPSIZE, /* 3197 */ IC_VEX_W_OPSIZE, /* 3198 */ IC_VEX_W_OPSIZE, /* 3199 */ IC_VEX_L, /* 3200 */ IC_VEX_L, /* 3201 */ IC_VEX_L_XS, /* 3202 */ IC_VEX_L_XS, /* 3203 */ IC_VEX_L_XD, /* 3204 */ IC_VEX_L_XD, /* 3205 */ IC_VEX_L_XD, /* 3206 */ IC_VEX_L_XD, /* 3207 */ IC_VEX_L_W, /* 3208 */ IC_VEX_L_W, /* 3209 */ IC_VEX_L_W_XS, /* 3210 */ IC_VEX_L_W_XS, /* 3211 */ IC_VEX_L_W_XD, /* 3212 */ IC_VEX_L_W_XD, /* 3213 */ IC_VEX_L_W_XD, /* 3214 */ IC_VEX_L_W_XD, /* 3215 */ IC_VEX_L_OPSIZE, /* 3216 */ IC_VEX_L_OPSIZE, /* 3217 */ IC_VEX_L_OPSIZE, /* 3218 */ IC_VEX_L_OPSIZE, /* 3219 */ IC_VEX_L_OPSIZE, /* 3220 */ IC_VEX_L_OPSIZE, /* 3221 */ IC_VEX_L_OPSIZE, /* 3222 */ IC_VEX_L_OPSIZE, /* 3223 */ IC_VEX_L_W_OPSIZE, /* 3224 */ IC_VEX_L_W_OPSIZE, /* 3225 */ IC_VEX_L_W_OPSIZE, /* 3226 */ IC_VEX_L_W_OPSIZE, /* 3227 */ IC_VEX_L_W_OPSIZE, /* 3228 */ IC_VEX_L_W_OPSIZE, /* 3229 */ IC_VEX_L_W_OPSIZE, /* 3230 */ IC_VEX_L_W_OPSIZE, /* 3231 */ IC_VEX_L, /* 3232 */ IC_VEX_L, /* 3233 */ IC_VEX_L_XS, /* 3234 */ IC_VEX_L_XS, /* 3235 */ IC_VEX_L_XD, /* 3236 */ IC_VEX_L_XD, /* 3237 */ IC_VEX_L_XD, /* 3238 */ IC_VEX_L_XD, /* 3239 */ IC_VEX_L_W, /* 3240 */ IC_VEX_L_W, /* 3241 */ IC_VEX_L_W_XS, /* 3242 */ IC_VEX_L_W_XS, /* 3243 */ IC_VEX_L_W_XD, /* 3244 */ IC_VEX_L_W_XD, /* 3245 */ IC_VEX_L_W_XD, /* 3246 */ IC_VEX_L_W_XD, /* 3247 */ IC_VEX_L_OPSIZE, /* 3248 */ IC_VEX_L_OPSIZE, /* 3249 */ IC_VEX_L_OPSIZE, /* 3250 */ IC_VEX_L_OPSIZE, /* 3251 */ IC_VEX_L_OPSIZE, /* 3252 */ IC_VEX_L_OPSIZE, /* 3253 */ IC_VEX_L_OPSIZE, /* 3254 */ IC_VEX_L_OPSIZE, /* 3255 */ IC_VEX_L_W_OPSIZE, /* 3256 */ IC_VEX_L_W_OPSIZE, /* 3257 */ IC_VEX_L_W_OPSIZE, /* 3258 */ IC_VEX_L_W_OPSIZE, /* 3259 */ IC_VEX_L_W_OPSIZE, /* 3260 */ IC_VEX_L_W_OPSIZE, /* 3261 */ IC_VEX_L_W_OPSIZE, /* 3262 */ IC_VEX_L_W_OPSIZE, /* 3263 */ IC_VEX_L, /* 3264 */ IC_VEX_L, /* 3265 */ IC_VEX_L_XS, /* 3266 */ IC_VEX_L_XS, /* 3267 */ IC_VEX_L_XD, /* 3268 */ IC_VEX_L_XD, /* 3269 */ IC_VEX_L_XD, /* 3270 */ IC_VEX_L_XD, /* 3271 */ IC_VEX_L_W, /* 3272 */ IC_VEX_L_W, /* 3273 */ IC_VEX_L_W_XS, /* 3274 */ IC_VEX_L_W_XS, /* 3275 */ IC_VEX_L_W_XD, /* 3276 */ IC_VEX_L_W_XD, /* 3277 */ IC_VEX_L_W_XD, /* 3278 */ IC_VEX_L_W_XD, /* 3279 */ IC_VEX_L_OPSIZE, /* 3280 */ IC_VEX_L_OPSIZE, /* 3281 */ IC_VEX_L_OPSIZE, /* 3282 */ IC_VEX_L_OPSIZE, /* 3283 */ IC_VEX_L_OPSIZE, /* 3284 */ IC_VEX_L_OPSIZE, /* 3285 */ IC_VEX_L_OPSIZE, /* 3286 */ IC_VEX_L_OPSIZE, /* 3287 */ IC_VEX_L_W_OPSIZE, /* 3288 */ IC_VEX_L_W_OPSIZE, /* 3289 */ IC_VEX_L_W_OPSIZE, /* 3290 */ IC_VEX_L_W_OPSIZE, /* 3291 */ IC_VEX_L_W_OPSIZE, /* 3292 */ IC_VEX_L_W_OPSIZE, /* 3293 */ IC_VEX_L_W_OPSIZE, /* 3294 */ IC_VEX_L_W_OPSIZE, /* 3295 */ IC_VEX_L, /* 3296 */ IC_VEX_L, /* 3297 */ IC_VEX_L_XS, /* 3298 */ IC_VEX_L_XS, /* 3299 */ IC_VEX_L_XD, /* 3300 */ IC_VEX_L_XD, /* 3301 */ IC_VEX_L_XD, /* 3302 */ IC_VEX_L_XD, /* 3303 */ IC_VEX_L_W, /* 3304 */ IC_VEX_L_W, /* 3305 */ IC_VEX_L_W_XS, /* 3306 */ IC_VEX_L_W_XS, /* 3307 */ IC_VEX_L_W_XD, /* 3308 */ IC_VEX_L_W_XD, /* 3309 */ IC_VEX_L_W_XD, /* 3310 */ IC_VEX_L_W_XD, /* 3311 */ IC_VEX_L_OPSIZE, /* 3312 */ IC_VEX_L_OPSIZE, /* 3313 */ IC_VEX_L_OPSIZE, /* 3314 */ IC_VEX_L_OPSIZE, /* 3315 */ IC_VEX_L_OPSIZE, /* 3316 */ IC_VEX_L_OPSIZE, /* 3317 */ IC_VEX_L_OPSIZE, /* 3318 */ IC_VEX_L_OPSIZE, /* 3319 */ IC_VEX_L_W_OPSIZE, /* 3320 */ IC_VEX_L_W_OPSIZE, /* 3321 */ IC_VEX_L_W_OPSIZE, /* 3322 */ IC_VEX_L_W_OPSIZE, /* 3323 */ IC_VEX_L_W_OPSIZE, /* 3324 */ IC_VEX_L_W_OPSIZE, /* 3325 */ IC_VEX_L_W_OPSIZE, /* 3326 */ IC_VEX_L_W_OPSIZE, /* 3327 */ IC_EVEX_L2_K, /* 3328 */ IC_EVEX_L2_K, /* 3329 */ IC_EVEX_L2_XS_K, /* 3330 */ IC_EVEX_L2_XS_K, /* 3331 */ IC_EVEX_L2_XD_K, /* 3332 */ IC_EVEX_L2_XD_K, /* 3333 */ IC_EVEX_L2_XD_K, /* 3334 */ IC_EVEX_L2_XD_K, /* 3335 */ IC_EVEX_L2_W_K, /* 3336 */ IC_EVEX_L2_W_K, /* 3337 */ IC_EVEX_L2_W_XS_K, /* 3338 */ IC_EVEX_L2_W_XS_K, /* 3339 */ IC_EVEX_L2_W_XD_K, /* 3340 */ IC_EVEX_L2_W_XD_K, /* 3341 */ IC_EVEX_L2_W_XD_K, /* 3342 */ IC_EVEX_L2_W_XD_K, /* 3343 */ IC_EVEX_L2_OPSIZE_K, /* 3344 */ IC_EVEX_L2_OPSIZE_K, /* 3345 */ IC_EVEX_L2_OPSIZE_K, /* 3346 */ IC_EVEX_L2_OPSIZE_K, /* 3347 */ IC_EVEX_L2_OPSIZE_K, /* 3348 */ IC_EVEX_L2_OPSIZE_K, /* 3349 */ IC_EVEX_L2_OPSIZE_K, /* 3350 */ IC_EVEX_L2_OPSIZE_K, /* 3351 */ IC_EVEX_L2_W_OPSIZE_K, /* 3352 */ IC_EVEX_L2_W_OPSIZE_K, /* 3353 */ IC_EVEX_L2_W_OPSIZE_K, /* 3354 */ IC_EVEX_L2_W_OPSIZE_K, /* 3355 */ IC_EVEX_L2_W_OPSIZE_K, /* 3356 */ IC_EVEX_L2_W_OPSIZE_K, /* 3357 */ IC_EVEX_L2_W_OPSIZE_K, /* 3358 */ IC_EVEX_L2_W_OPSIZE_K, /* 3359 */ IC_EVEX_L2_K, /* 3360 */ IC_EVEX_L2_K, /* 3361 */ IC_EVEX_L2_XS_K, /* 3362 */ IC_EVEX_L2_XS_K, /* 3363 */ IC_EVEX_L2_XD_K, /* 3364 */ IC_EVEX_L2_XD_K, /* 3365 */ IC_EVEX_L2_XD_K, /* 3366 */ IC_EVEX_L2_XD_K, /* 3367 */ IC_EVEX_L2_W_K, /* 3368 */ IC_EVEX_L2_W_K, /* 3369 */ IC_EVEX_L2_W_XS_K, /* 3370 */ IC_EVEX_L2_W_XS_K, /* 3371 */ IC_EVEX_L2_W_XD_K, /* 3372 */ IC_EVEX_L2_W_XD_K, /* 3373 */ IC_EVEX_L2_W_XD_K, /* 3374 */ IC_EVEX_L2_W_XD_K, /* 3375 */ IC_EVEX_L2_OPSIZE_K, /* 3376 */ IC_EVEX_L2_OPSIZE_K, /* 3377 */ IC_EVEX_L2_OPSIZE_K, /* 3378 */ IC_EVEX_L2_OPSIZE_K, /* 3379 */ IC_EVEX_L2_OPSIZE_K, /* 3380 */ IC_EVEX_L2_OPSIZE_K, /* 3381 */ IC_EVEX_L2_OPSIZE_K, /* 3382 */ IC_EVEX_L2_OPSIZE_K, /* 3383 */ IC_EVEX_L2_W_OPSIZE_K, /* 3384 */ IC_EVEX_L2_W_OPSIZE_K, /* 3385 */ IC_EVEX_L2_W_OPSIZE_K, /* 3386 */ IC_EVEX_L2_W_OPSIZE_K, /* 3387 */ IC_EVEX_L2_W_OPSIZE_K, /* 3388 */ IC_EVEX_L2_W_OPSIZE_K, /* 3389 */ IC_EVEX_L2_W_OPSIZE_K, /* 3390 */ IC_EVEX_L2_W_OPSIZE_K, /* 3391 */ IC_EVEX_L2_K, /* 3392 */ IC_EVEX_L2_K, /* 3393 */ IC_EVEX_L2_XS_K, /* 3394 */ IC_EVEX_L2_XS_K, /* 3395 */ IC_EVEX_L2_XD_K, /* 3396 */ IC_EVEX_L2_XD_K, /* 3397 */ IC_EVEX_L2_XD_K, /* 3398 */ IC_EVEX_L2_XD_K, /* 3399 */ IC_EVEX_L2_W_K, /* 3400 */ IC_EVEX_L2_W_K, /* 3401 */ IC_EVEX_L2_W_XS_K, /* 3402 */ IC_EVEX_L2_W_XS_K, /* 3403 */ IC_EVEX_L2_W_XD_K, /* 3404 */ IC_EVEX_L2_W_XD_K, /* 3405 */ IC_EVEX_L2_W_XD_K, /* 3406 */ IC_EVEX_L2_W_XD_K, /* 3407 */ IC_EVEX_L2_OPSIZE_K, /* 3408 */ IC_EVEX_L2_OPSIZE_K, /* 3409 */ IC_EVEX_L2_OPSIZE_K, /* 3410 */ IC_EVEX_L2_OPSIZE_K, /* 3411 */ IC_EVEX_L2_OPSIZE_K, /* 3412 */ IC_EVEX_L2_OPSIZE_K, /* 3413 */ IC_EVEX_L2_OPSIZE_K, /* 3414 */ IC_EVEX_L2_OPSIZE_K, /* 3415 */ IC_EVEX_L2_W_OPSIZE_K, /* 3416 */ IC_EVEX_L2_W_OPSIZE_K, /* 3417 */ IC_EVEX_L2_W_OPSIZE_K, /* 3418 */ IC_EVEX_L2_W_OPSIZE_K, /* 3419 */ IC_EVEX_L2_W_OPSIZE_K, /* 3420 */ IC_EVEX_L2_W_OPSIZE_K, /* 3421 */ IC_EVEX_L2_W_OPSIZE_K, /* 3422 */ IC_EVEX_L2_W_OPSIZE_K, /* 3423 */ IC_EVEX_L2_K, /* 3424 */ IC_EVEX_L2_K, /* 3425 */ IC_EVEX_L2_XS_K, /* 3426 */ IC_EVEX_L2_XS_K, /* 3427 */ IC_EVEX_L2_XD_K, /* 3428 */ IC_EVEX_L2_XD_K, /* 3429 */ IC_EVEX_L2_XD_K, /* 3430 */ IC_EVEX_L2_XD_K, /* 3431 */ IC_EVEX_L2_W_K, /* 3432 */ IC_EVEX_L2_W_K, /* 3433 */ IC_EVEX_L2_W_XS_K, /* 3434 */ IC_EVEX_L2_W_XS_K, /* 3435 */ IC_EVEX_L2_W_XD_K, /* 3436 */ IC_EVEX_L2_W_XD_K, /* 3437 */ IC_EVEX_L2_W_XD_K, /* 3438 */ IC_EVEX_L2_W_XD_K, /* 3439 */ IC_EVEX_L2_OPSIZE_K, /* 3440 */ IC_EVEX_L2_OPSIZE_K, /* 3441 */ IC_EVEX_L2_OPSIZE_K, /* 3442 */ IC_EVEX_L2_OPSIZE_K, /* 3443 */ IC_EVEX_L2_OPSIZE_K, /* 3444 */ IC_EVEX_L2_OPSIZE_K, /* 3445 */ IC_EVEX_L2_OPSIZE_K, /* 3446 */ IC_EVEX_L2_OPSIZE_K, /* 3447 */ IC_EVEX_L2_W_OPSIZE_K, /* 3448 */ IC_EVEX_L2_W_OPSIZE_K, /* 3449 */ IC_EVEX_L2_W_OPSIZE_K, /* 3450 */ IC_EVEX_L2_W_OPSIZE_K, /* 3451 */ IC_EVEX_L2_W_OPSIZE_K, /* 3452 */ IC_EVEX_L2_W_OPSIZE_K, /* 3453 */ IC_EVEX_L2_W_OPSIZE_K, /* 3454 */ IC_EVEX_L2_W_OPSIZE_K, /* 3455 */ IC_EVEX_L2_K, /* 3456 */ IC_EVEX_L2_K, /* 3457 */ IC_EVEX_L2_XS_K, /* 3458 */ IC_EVEX_L2_XS_K, /* 3459 */ IC_EVEX_L2_XD_K, /* 3460 */ IC_EVEX_L2_XD_K, /* 3461 */ IC_EVEX_L2_XD_K, /* 3462 */ IC_EVEX_L2_XD_K, /* 3463 */ IC_EVEX_L2_W_K, /* 3464 */ IC_EVEX_L2_W_K, /* 3465 */ IC_EVEX_L2_W_XS_K, /* 3466 */ IC_EVEX_L2_W_XS_K, /* 3467 */ IC_EVEX_L2_W_XD_K, /* 3468 */ IC_EVEX_L2_W_XD_K, /* 3469 */ IC_EVEX_L2_W_XD_K, /* 3470 */ IC_EVEX_L2_W_XD_K, /* 3471 */ IC_EVEX_L2_OPSIZE_K, /* 3472 */ IC_EVEX_L2_OPSIZE_K, /* 3473 */ IC_EVEX_L2_OPSIZE_K, /* 3474 */ IC_EVEX_L2_OPSIZE_K, /* 3475 */ IC_EVEX_L2_OPSIZE_K, /* 3476 */ IC_EVEX_L2_OPSIZE_K, /* 3477 */ IC_EVEX_L2_OPSIZE_K, /* 3478 */ IC_EVEX_L2_OPSIZE_K, /* 3479 */ IC_EVEX_L2_W_OPSIZE_K, /* 3480 */ IC_EVEX_L2_W_OPSIZE_K, /* 3481 */ IC_EVEX_L2_W_OPSIZE_K, /* 3482 */ IC_EVEX_L2_W_OPSIZE_K, /* 3483 */ IC_EVEX_L2_W_OPSIZE_K, /* 3484 */ IC_EVEX_L2_W_OPSIZE_K, /* 3485 */ IC_EVEX_L2_W_OPSIZE_K, /* 3486 */ IC_EVEX_L2_W_OPSIZE_K, /* 3487 */ IC_EVEX_L2_K, /* 3488 */ IC_EVEX_L2_K, /* 3489 */ IC_EVEX_L2_XS_K, /* 3490 */ IC_EVEX_L2_XS_K, /* 3491 */ IC_EVEX_L2_XD_K, /* 3492 */ IC_EVEX_L2_XD_K, /* 3493 */ IC_EVEX_L2_XD_K, /* 3494 */ IC_EVEX_L2_XD_K, /* 3495 */ IC_EVEX_L2_W_K, /* 3496 */ IC_EVEX_L2_W_K, /* 3497 */ IC_EVEX_L2_W_XS_K, /* 3498 */ IC_EVEX_L2_W_XS_K, /* 3499 */ IC_EVEX_L2_W_XD_K, /* 3500 */ IC_EVEX_L2_W_XD_K, /* 3501 */ IC_EVEX_L2_W_XD_K, /* 3502 */ IC_EVEX_L2_W_XD_K, /* 3503 */ IC_EVEX_L2_OPSIZE_K, /* 3504 */ IC_EVEX_L2_OPSIZE_K, /* 3505 */ IC_EVEX_L2_OPSIZE_K, /* 3506 */ IC_EVEX_L2_OPSIZE_K, /* 3507 */ IC_EVEX_L2_OPSIZE_K, /* 3508 */ IC_EVEX_L2_OPSIZE_K, /* 3509 */ IC_EVEX_L2_OPSIZE_K, /* 3510 */ IC_EVEX_L2_OPSIZE_K, /* 3511 */ IC_EVEX_L2_W_OPSIZE_K, /* 3512 */ IC_EVEX_L2_W_OPSIZE_K, /* 3513 */ IC_EVEX_L2_W_OPSIZE_K, /* 3514 */ IC_EVEX_L2_W_OPSIZE_K, /* 3515 */ IC_EVEX_L2_W_OPSIZE_K, /* 3516 */ IC_EVEX_L2_W_OPSIZE_K, /* 3517 */ IC_EVEX_L2_W_OPSIZE_K, /* 3518 */ IC_EVEX_L2_W_OPSIZE_K, /* 3519 */ IC_EVEX_L2_K, /* 3520 */ IC_EVEX_L2_K, /* 3521 */ IC_EVEX_L2_XS_K, /* 3522 */ IC_EVEX_L2_XS_K, /* 3523 */ IC_EVEX_L2_XD_K, /* 3524 */ IC_EVEX_L2_XD_K, /* 3525 */ IC_EVEX_L2_XD_K, /* 3526 */ IC_EVEX_L2_XD_K, /* 3527 */ IC_EVEX_L2_W_K, /* 3528 */ IC_EVEX_L2_W_K, /* 3529 */ IC_EVEX_L2_W_XS_K, /* 3530 */ IC_EVEX_L2_W_XS_K, /* 3531 */ IC_EVEX_L2_W_XD_K, /* 3532 */ IC_EVEX_L2_W_XD_K, /* 3533 */ IC_EVEX_L2_W_XD_K, /* 3534 */ IC_EVEX_L2_W_XD_K, /* 3535 */ IC_EVEX_L2_OPSIZE_K, /* 3536 */ IC_EVEX_L2_OPSIZE_K, /* 3537 */ IC_EVEX_L2_OPSIZE_K, /* 3538 */ IC_EVEX_L2_OPSIZE_K, /* 3539 */ IC_EVEX_L2_OPSIZE_K, /* 3540 */ IC_EVEX_L2_OPSIZE_K, /* 3541 */ IC_EVEX_L2_OPSIZE_K, /* 3542 */ IC_EVEX_L2_OPSIZE_K, /* 3543 */ IC_EVEX_L2_W_OPSIZE_K, /* 3544 */ IC_EVEX_L2_W_OPSIZE_K, /* 3545 */ IC_EVEX_L2_W_OPSIZE_K, /* 3546 */ IC_EVEX_L2_W_OPSIZE_K, /* 3547 */ IC_EVEX_L2_W_OPSIZE_K, /* 3548 */ IC_EVEX_L2_W_OPSIZE_K, /* 3549 */ IC_EVEX_L2_W_OPSIZE_K, /* 3550 */ IC_EVEX_L2_W_OPSIZE_K, /* 3551 */ IC_EVEX_L2_K, /* 3552 */ IC_EVEX_L2_K, /* 3553 */ IC_EVEX_L2_XS_K, /* 3554 */ IC_EVEX_L2_XS_K, /* 3555 */ IC_EVEX_L2_XD_K, /* 3556 */ IC_EVEX_L2_XD_K, /* 3557 */ IC_EVEX_L2_XD_K, /* 3558 */ IC_EVEX_L2_XD_K, /* 3559 */ IC_EVEX_L2_W_K, /* 3560 */ IC_EVEX_L2_W_K, /* 3561 */ IC_EVEX_L2_W_XS_K, /* 3562 */ IC_EVEX_L2_W_XS_K, /* 3563 */ IC_EVEX_L2_W_XD_K, /* 3564 */ IC_EVEX_L2_W_XD_K, /* 3565 */ IC_EVEX_L2_W_XD_K, /* 3566 */ IC_EVEX_L2_W_XD_K, /* 3567 */ IC_EVEX_L2_OPSIZE_K, /* 3568 */ IC_EVEX_L2_OPSIZE_K, /* 3569 */ IC_EVEX_L2_OPSIZE_K, /* 3570 */ IC_EVEX_L2_OPSIZE_K, /* 3571 */ IC_EVEX_L2_OPSIZE_K, /* 3572 */ IC_EVEX_L2_OPSIZE_K, /* 3573 */ IC_EVEX_L2_OPSIZE_K, /* 3574 */ IC_EVEX_L2_OPSIZE_K, /* 3575 */ IC_EVEX_L2_W_OPSIZE_K, /* 3576 */ IC_EVEX_L2_W_OPSIZE_K, /* 3577 */ IC_EVEX_L2_W_OPSIZE_K, /* 3578 */ IC_EVEX_L2_W_OPSIZE_K, /* 3579 */ IC_EVEX_L2_W_OPSIZE_K, /* 3580 */ IC_EVEX_L2_W_OPSIZE_K, /* 3581 */ IC_EVEX_L2_W_OPSIZE_K, /* 3582 */ IC_EVEX_L2_W_OPSIZE_K, /* 3583 */ IC, /* 3584 */ IC_64BIT, /* 3585 */ IC_XS, /* 3586 */ IC_64BIT_XS, /* 3587 */ IC_XD, /* 3588 */ IC_64BIT_XD, /* 3589 */ IC_XS, /* 3590 */ IC_64BIT_XS, /* 3591 */ IC, /* 3592 */ IC_64BIT_REXW, /* 3593 */ IC_XS, /* 3594 */ IC_64BIT_REXW_XS, /* 3595 */ IC_XD, /* 3596 */ IC_64BIT_REXW_XD, /* 3597 */ IC_XS, /* 3598 */ IC_64BIT_REXW_XS, /* 3599 */ IC_OPSIZE, /* 3600 */ IC_64BIT_OPSIZE, /* 3601 */ IC_XS_OPSIZE, /* 3602 */ IC_64BIT_XS_OPSIZE, /* 3603 */ IC_XD_OPSIZE, /* 3604 */ IC_64BIT_XD_OPSIZE, /* 3605 */ IC_XS_OPSIZE, /* 3606 */ IC_64BIT_XD_OPSIZE, /* 3607 */ IC_OPSIZE, /* 3608 */ IC_64BIT_REXW_OPSIZE, /* 3609 */ IC_XS_OPSIZE, /* 3610 */ IC_64BIT_REXW_XS, /* 3611 */ IC_XD_OPSIZE, /* 3612 */ IC_64BIT_REXW_XD, /* 3613 */ IC_XS_OPSIZE, /* 3614 */ IC_64BIT_REXW_XS, /* 3615 */ IC_ADSIZE, /* 3616 */ IC_64BIT_ADSIZE, /* 3617 */ IC_XS, /* 3618 */ IC_64BIT_XS, /* 3619 */ IC_XD, /* 3620 */ IC_64BIT_XD, /* 3621 */ IC_XS, /* 3622 */ IC_64BIT_XS, /* 3623 */ IC_ADSIZE, /* 3624 */ IC_64BIT_REXW_ADSIZE, /* 3625 */ IC_XS, /* 3626 */ IC_64BIT_REXW_XS, /* 3627 */ IC_XD, /* 3628 */ IC_64BIT_REXW_XD, /* 3629 */ IC_XS, /* 3630 */ IC_64BIT_REXW_XS, /* 3631 */ IC_OPSIZE_ADSIZE, /* 3632 */ IC_64BIT_OPSIZE_ADSIZE, /* 3633 */ IC_XS_OPSIZE, /* 3634 */ IC_64BIT_XS_OPSIZE, /* 3635 */ IC_XD_OPSIZE, /* 3636 */ IC_64BIT_XD_OPSIZE, /* 3637 */ IC_XS_OPSIZE, /* 3638 */ IC_64BIT_XD_OPSIZE, /* 3639 */ IC_OPSIZE_ADSIZE, /* 3640 */ IC_64BIT_REXW_OPSIZE, /* 3641 */ IC_XS_OPSIZE, /* 3642 */ IC_64BIT_REXW_XS, /* 3643 */ IC_XD_OPSIZE, /* 3644 */ IC_64BIT_REXW_XD, /* 3645 */ IC_XS_OPSIZE, /* 3646 */ IC_64BIT_REXW_XS, /* 3647 */ IC_VEX, /* 3648 */ IC_VEX, /* 3649 */ IC_VEX_XS, /* 3650 */ IC_VEX_XS, /* 3651 */ IC_VEX_XD, /* 3652 */ IC_VEX_XD, /* 3653 */ IC_VEX_XD, /* 3654 */ IC_VEX_XD, /* 3655 */ IC_VEX_W, /* 3656 */ IC_VEX_W, /* 3657 */ IC_VEX_W_XS, /* 3658 */ IC_VEX_W_XS, /* 3659 */ IC_VEX_W_XD, /* 3660 */ IC_VEX_W_XD, /* 3661 */ IC_VEX_W_XD, /* 3662 */ IC_VEX_W_XD, /* 3663 */ IC_VEX_OPSIZE, /* 3664 */ IC_VEX_OPSIZE, /* 3665 */ IC_VEX_OPSIZE, /* 3666 */ IC_VEX_OPSIZE, /* 3667 */ IC_VEX_OPSIZE, /* 3668 */ IC_VEX_OPSIZE, /* 3669 */ IC_VEX_OPSIZE, /* 3670 */ IC_VEX_OPSIZE, /* 3671 */ IC_VEX_W_OPSIZE, /* 3672 */ IC_VEX_W_OPSIZE, /* 3673 */ IC_VEX_W_OPSIZE, /* 3674 */ IC_VEX_W_OPSIZE, /* 3675 */ IC_VEX_W_OPSIZE, /* 3676 */ IC_VEX_W_OPSIZE, /* 3677 */ IC_VEX_W_OPSIZE, /* 3678 */ IC_VEX_W_OPSIZE, /* 3679 */ IC_VEX, /* 3680 */ IC_VEX, /* 3681 */ IC_VEX_XS, /* 3682 */ IC_VEX_XS, /* 3683 */ IC_VEX_XD, /* 3684 */ IC_VEX_XD, /* 3685 */ IC_VEX_XD, /* 3686 */ IC_VEX_XD, /* 3687 */ IC_VEX_W, /* 3688 */ IC_VEX_W, /* 3689 */ IC_VEX_W_XS, /* 3690 */ IC_VEX_W_XS, /* 3691 */ IC_VEX_W_XD, /* 3692 */ IC_VEX_W_XD, /* 3693 */ IC_VEX_W_XD, /* 3694 */ IC_VEX_W_XD, /* 3695 */ IC_VEX_OPSIZE, /* 3696 */ IC_VEX_OPSIZE, /* 3697 */ IC_VEX_OPSIZE, /* 3698 */ IC_VEX_OPSIZE, /* 3699 */ IC_VEX_OPSIZE, /* 3700 */ IC_VEX_OPSIZE, /* 3701 */ IC_VEX_OPSIZE, /* 3702 */ IC_VEX_OPSIZE, /* 3703 */ IC_VEX_W_OPSIZE, /* 3704 */ IC_VEX_W_OPSIZE, /* 3705 */ IC_VEX_W_OPSIZE, /* 3706 */ IC_VEX_W_OPSIZE, /* 3707 */ IC_VEX_W_OPSIZE, /* 3708 */ IC_VEX_W_OPSIZE, /* 3709 */ IC_VEX_W_OPSIZE, /* 3710 */ IC_VEX_W_OPSIZE, /* 3711 */ IC_VEX_L, /* 3712 */ IC_VEX_L, /* 3713 */ IC_VEX_L_XS, /* 3714 */ IC_VEX_L_XS, /* 3715 */ IC_VEX_L_XD, /* 3716 */ IC_VEX_L_XD, /* 3717 */ IC_VEX_L_XD, /* 3718 */ IC_VEX_L_XD, /* 3719 */ IC_VEX_L_W, /* 3720 */ IC_VEX_L_W, /* 3721 */ IC_VEX_L_W_XS, /* 3722 */ IC_VEX_L_W_XS, /* 3723 */ IC_VEX_L_W_XD, /* 3724 */ IC_VEX_L_W_XD, /* 3725 */ IC_VEX_L_W_XD, /* 3726 */ IC_VEX_L_W_XD, /* 3727 */ IC_VEX_L_OPSIZE, /* 3728 */ IC_VEX_L_OPSIZE, /* 3729 */ IC_VEX_L_OPSIZE, /* 3730 */ IC_VEX_L_OPSIZE, /* 3731 */ IC_VEX_L_OPSIZE, /* 3732 */ IC_VEX_L_OPSIZE, /* 3733 */ IC_VEX_L_OPSIZE, /* 3734 */ IC_VEX_L_OPSIZE, /* 3735 */ IC_VEX_L_W_OPSIZE, /* 3736 */ IC_VEX_L_W_OPSIZE, /* 3737 */ IC_VEX_L_W_OPSIZE, /* 3738 */ IC_VEX_L_W_OPSIZE, /* 3739 */ IC_VEX_L_W_OPSIZE, /* 3740 */ IC_VEX_L_W_OPSIZE, /* 3741 */ IC_VEX_L_W_OPSIZE, /* 3742 */ IC_VEX_L_W_OPSIZE, /* 3743 */ IC_VEX_L, /* 3744 */ IC_VEX_L, /* 3745 */ IC_VEX_L_XS, /* 3746 */ IC_VEX_L_XS, /* 3747 */ IC_VEX_L_XD, /* 3748 */ IC_VEX_L_XD, /* 3749 */ IC_VEX_L_XD, /* 3750 */ IC_VEX_L_XD, /* 3751 */ IC_VEX_L_W, /* 3752 */ IC_VEX_L_W, /* 3753 */ IC_VEX_L_W_XS, /* 3754 */ IC_VEX_L_W_XS, /* 3755 */ IC_VEX_L_W_XD, /* 3756 */ IC_VEX_L_W_XD, /* 3757 */ IC_VEX_L_W_XD, /* 3758 */ IC_VEX_L_W_XD, /* 3759 */ IC_VEX_L_OPSIZE, /* 3760 */ IC_VEX_L_OPSIZE, /* 3761 */ IC_VEX_L_OPSIZE, /* 3762 */ IC_VEX_L_OPSIZE, /* 3763 */ IC_VEX_L_OPSIZE, /* 3764 */ IC_VEX_L_OPSIZE, /* 3765 */ IC_VEX_L_OPSIZE, /* 3766 */ IC_VEX_L_OPSIZE, /* 3767 */ IC_VEX_L_W_OPSIZE, /* 3768 */ IC_VEX_L_W_OPSIZE, /* 3769 */ IC_VEX_L_W_OPSIZE, /* 3770 */ IC_VEX_L_W_OPSIZE, /* 3771 */ IC_VEX_L_W_OPSIZE, /* 3772 */ IC_VEX_L_W_OPSIZE, /* 3773 */ IC_VEX_L_W_OPSIZE, /* 3774 */ IC_VEX_L_W_OPSIZE, /* 3775 */ IC_VEX_L, /* 3776 */ IC_VEX_L, /* 3777 */ IC_VEX_L_XS, /* 3778 */ IC_VEX_L_XS, /* 3779 */ IC_VEX_L_XD, /* 3780 */ IC_VEX_L_XD, /* 3781 */ IC_VEX_L_XD, /* 3782 */ IC_VEX_L_XD, /* 3783 */ IC_VEX_L_W, /* 3784 */ IC_VEX_L_W, /* 3785 */ IC_VEX_L_W_XS, /* 3786 */ IC_VEX_L_W_XS, /* 3787 */ IC_VEX_L_W_XD, /* 3788 */ IC_VEX_L_W_XD, /* 3789 */ IC_VEX_L_W_XD, /* 3790 */ IC_VEX_L_W_XD, /* 3791 */ IC_VEX_L_OPSIZE, /* 3792 */ IC_VEX_L_OPSIZE, /* 3793 */ IC_VEX_L_OPSIZE, /* 3794 */ IC_VEX_L_OPSIZE, /* 3795 */ IC_VEX_L_OPSIZE, /* 3796 */ IC_VEX_L_OPSIZE, /* 3797 */ IC_VEX_L_OPSIZE, /* 3798 */ IC_VEX_L_OPSIZE, /* 3799 */ IC_VEX_L_W_OPSIZE, /* 3800 */ IC_VEX_L_W_OPSIZE, /* 3801 */ IC_VEX_L_W_OPSIZE, /* 3802 */ IC_VEX_L_W_OPSIZE, /* 3803 */ IC_VEX_L_W_OPSIZE, /* 3804 */ IC_VEX_L_W_OPSIZE, /* 3805 */ IC_VEX_L_W_OPSIZE, /* 3806 */ IC_VEX_L_W_OPSIZE, /* 3807 */ IC_VEX_L, /* 3808 */ IC_VEX_L, /* 3809 */ IC_VEX_L_XS, /* 3810 */ IC_VEX_L_XS, /* 3811 */ IC_VEX_L_XD, /* 3812 */ IC_VEX_L_XD, /* 3813 */ IC_VEX_L_XD, /* 3814 */ IC_VEX_L_XD, /* 3815 */ IC_VEX_L_W, /* 3816 */ IC_VEX_L_W, /* 3817 */ IC_VEX_L_W_XS, /* 3818 */ IC_VEX_L_W_XS, /* 3819 */ IC_VEX_L_W_XD, /* 3820 */ IC_VEX_L_W_XD, /* 3821 */ IC_VEX_L_W_XD, /* 3822 */ IC_VEX_L_W_XD, /* 3823 */ IC_VEX_L_OPSIZE, /* 3824 */ IC_VEX_L_OPSIZE, /* 3825 */ IC_VEX_L_OPSIZE, /* 3826 */ IC_VEX_L_OPSIZE, /* 3827 */ IC_VEX_L_OPSIZE, /* 3828 */ IC_VEX_L_OPSIZE, /* 3829 */ IC_VEX_L_OPSIZE, /* 3830 */ IC_VEX_L_OPSIZE, /* 3831 */ IC_VEX_L_W_OPSIZE, /* 3832 */ IC_VEX_L_W_OPSIZE, /* 3833 */ IC_VEX_L_W_OPSIZE, /* 3834 */ IC_VEX_L_W_OPSIZE, /* 3835 */ IC_VEX_L_W_OPSIZE, /* 3836 */ IC_VEX_L_W_OPSIZE, /* 3837 */ IC_VEX_L_W_OPSIZE, /* 3838 */ IC_VEX_L_W_OPSIZE, /* 3839 */ IC_EVEX_L2_K, /* 3840 */ IC_EVEX_L2_K, /* 3841 */ IC_EVEX_L2_XS_K, /* 3842 */ IC_EVEX_L2_XS_K, /* 3843 */ IC_EVEX_L2_XD_K, /* 3844 */ IC_EVEX_L2_XD_K, /* 3845 */ IC_EVEX_L2_XD_K, /* 3846 */ IC_EVEX_L2_XD_K, /* 3847 */ IC_EVEX_L2_W_K, /* 3848 */ IC_EVEX_L2_W_K, /* 3849 */ IC_EVEX_L2_W_XS_K, /* 3850 */ IC_EVEX_L2_W_XS_K, /* 3851 */ IC_EVEX_L2_W_XD_K, /* 3852 */ IC_EVEX_L2_W_XD_K, /* 3853 */ IC_EVEX_L2_W_XD_K, /* 3854 */ IC_EVEX_L2_W_XD_K, /* 3855 */ IC_EVEX_L2_OPSIZE_K, /* 3856 */ IC_EVEX_L2_OPSIZE_K, /* 3857 */ IC_EVEX_L2_OPSIZE_K, /* 3858 */ IC_EVEX_L2_OPSIZE_K, /* 3859 */ IC_EVEX_L2_OPSIZE_K, /* 3860 */ IC_EVEX_L2_OPSIZE_K, /* 3861 */ IC_EVEX_L2_OPSIZE_K, /* 3862 */ IC_EVEX_L2_OPSIZE_K, /* 3863 */ IC_EVEX_L2_W_OPSIZE_K, /* 3864 */ IC_EVEX_L2_W_OPSIZE_K, /* 3865 */ IC_EVEX_L2_W_OPSIZE_K, /* 3866 */ IC_EVEX_L2_W_OPSIZE_K, /* 3867 */ IC_EVEX_L2_W_OPSIZE_K, /* 3868 */ IC_EVEX_L2_W_OPSIZE_K, /* 3869 */ IC_EVEX_L2_W_OPSIZE_K, /* 3870 */ IC_EVEX_L2_W_OPSIZE_K, /* 3871 */ IC_EVEX_L2_K, /* 3872 */ IC_EVEX_L2_K, /* 3873 */ IC_EVEX_L2_XS_K, /* 3874 */ IC_EVEX_L2_XS_K, /* 3875 */ IC_EVEX_L2_XD_K, /* 3876 */ IC_EVEX_L2_XD_K, /* 3877 */ IC_EVEX_L2_XD_K, /* 3878 */ IC_EVEX_L2_XD_K, /* 3879 */ IC_EVEX_L2_W_K, /* 3880 */ IC_EVEX_L2_W_K, /* 3881 */ IC_EVEX_L2_W_XS_K, /* 3882 */ IC_EVEX_L2_W_XS_K, /* 3883 */ IC_EVEX_L2_W_XD_K, /* 3884 */ IC_EVEX_L2_W_XD_K, /* 3885 */ IC_EVEX_L2_W_XD_K, /* 3886 */ IC_EVEX_L2_W_XD_K, /* 3887 */ IC_EVEX_L2_OPSIZE_K, /* 3888 */ IC_EVEX_L2_OPSIZE_K, /* 3889 */ IC_EVEX_L2_OPSIZE_K, /* 3890 */ IC_EVEX_L2_OPSIZE_K, /* 3891 */ IC_EVEX_L2_OPSIZE_K, /* 3892 */ IC_EVEX_L2_OPSIZE_K, /* 3893 */ IC_EVEX_L2_OPSIZE_K, /* 3894 */ IC_EVEX_L2_OPSIZE_K, /* 3895 */ IC_EVEX_L2_W_OPSIZE_K, /* 3896 */ IC_EVEX_L2_W_OPSIZE_K, /* 3897 */ IC_EVEX_L2_W_OPSIZE_K, /* 3898 */ IC_EVEX_L2_W_OPSIZE_K, /* 3899 */ IC_EVEX_L2_W_OPSIZE_K, /* 3900 */ IC_EVEX_L2_W_OPSIZE_K, /* 3901 */ IC_EVEX_L2_W_OPSIZE_K, /* 3902 */ IC_EVEX_L2_W_OPSIZE_K, /* 3903 */ IC_EVEX_L2_K, /* 3904 */ IC_EVEX_L2_K, /* 3905 */ IC_EVEX_L2_XS_K, /* 3906 */ IC_EVEX_L2_XS_K, /* 3907 */ IC_EVEX_L2_XD_K, /* 3908 */ IC_EVEX_L2_XD_K, /* 3909 */ IC_EVEX_L2_XD_K, /* 3910 */ IC_EVEX_L2_XD_K, /* 3911 */ IC_EVEX_L2_W_K, /* 3912 */ IC_EVEX_L2_W_K, /* 3913 */ IC_EVEX_L2_W_XS_K, /* 3914 */ IC_EVEX_L2_W_XS_K, /* 3915 */ IC_EVEX_L2_W_XD_K, /* 3916 */ IC_EVEX_L2_W_XD_K, /* 3917 */ IC_EVEX_L2_W_XD_K, /* 3918 */ IC_EVEX_L2_W_XD_K, /* 3919 */ IC_EVEX_L2_OPSIZE_K, /* 3920 */ IC_EVEX_L2_OPSIZE_K, /* 3921 */ IC_EVEX_L2_OPSIZE_K, /* 3922 */ IC_EVEX_L2_OPSIZE_K, /* 3923 */ IC_EVEX_L2_OPSIZE_K, /* 3924 */ IC_EVEX_L2_OPSIZE_K, /* 3925 */ IC_EVEX_L2_OPSIZE_K, /* 3926 */ IC_EVEX_L2_OPSIZE_K, /* 3927 */ IC_EVEX_L2_W_OPSIZE_K, /* 3928 */ IC_EVEX_L2_W_OPSIZE_K, /* 3929 */ IC_EVEX_L2_W_OPSIZE_K, /* 3930 */ IC_EVEX_L2_W_OPSIZE_K, /* 3931 */ IC_EVEX_L2_W_OPSIZE_K, /* 3932 */ IC_EVEX_L2_W_OPSIZE_K, /* 3933 */ IC_EVEX_L2_W_OPSIZE_K, /* 3934 */ IC_EVEX_L2_W_OPSIZE_K, /* 3935 */ IC_EVEX_L2_K, /* 3936 */ IC_EVEX_L2_K, /* 3937 */ IC_EVEX_L2_XS_K, /* 3938 */ IC_EVEX_L2_XS_K, /* 3939 */ IC_EVEX_L2_XD_K, /* 3940 */ IC_EVEX_L2_XD_K, /* 3941 */ IC_EVEX_L2_XD_K, /* 3942 */ IC_EVEX_L2_XD_K, /* 3943 */ IC_EVEX_L2_W_K, /* 3944 */ IC_EVEX_L2_W_K, /* 3945 */ IC_EVEX_L2_W_XS_K, /* 3946 */ IC_EVEX_L2_W_XS_K, /* 3947 */ IC_EVEX_L2_W_XD_K, /* 3948 */ IC_EVEX_L2_W_XD_K, /* 3949 */ IC_EVEX_L2_W_XD_K, /* 3950 */ IC_EVEX_L2_W_XD_K, /* 3951 */ IC_EVEX_L2_OPSIZE_K, /* 3952 */ IC_EVEX_L2_OPSIZE_K, /* 3953 */ IC_EVEX_L2_OPSIZE_K, /* 3954 */ IC_EVEX_L2_OPSIZE_K, /* 3955 */ IC_EVEX_L2_OPSIZE_K, /* 3956 */ IC_EVEX_L2_OPSIZE_K, /* 3957 */ IC_EVEX_L2_OPSIZE_K, /* 3958 */ IC_EVEX_L2_OPSIZE_K, /* 3959 */ IC_EVEX_L2_W_OPSIZE_K, /* 3960 */ IC_EVEX_L2_W_OPSIZE_K, /* 3961 */ IC_EVEX_L2_W_OPSIZE_K, /* 3962 */ IC_EVEX_L2_W_OPSIZE_K, /* 3963 */ IC_EVEX_L2_W_OPSIZE_K, /* 3964 */ IC_EVEX_L2_W_OPSIZE_K, /* 3965 */ IC_EVEX_L2_W_OPSIZE_K, /* 3966 */ IC_EVEX_L2_W_OPSIZE_K, /* 3967 */ IC_EVEX_L2_K, /* 3968 */ IC_EVEX_L2_K, /* 3969 */ IC_EVEX_L2_XS_K, /* 3970 */ IC_EVEX_L2_XS_K, /* 3971 */ IC_EVEX_L2_XD_K, /* 3972 */ IC_EVEX_L2_XD_K, /* 3973 */ IC_EVEX_L2_XD_K, /* 3974 */ IC_EVEX_L2_XD_K, /* 3975 */ IC_EVEX_L2_W_K, /* 3976 */ IC_EVEX_L2_W_K, /* 3977 */ IC_EVEX_L2_W_XS_K, /* 3978 */ IC_EVEX_L2_W_XS_K, /* 3979 */ IC_EVEX_L2_W_XD_K, /* 3980 */ IC_EVEX_L2_W_XD_K, /* 3981 */ IC_EVEX_L2_W_XD_K, /* 3982 */ IC_EVEX_L2_W_XD_K, /* 3983 */ IC_EVEX_L2_OPSIZE_K, /* 3984 */ IC_EVEX_L2_OPSIZE_K, /* 3985 */ IC_EVEX_L2_OPSIZE_K, /* 3986 */ IC_EVEX_L2_OPSIZE_K, /* 3987 */ IC_EVEX_L2_OPSIZE_K, /* 3988 */ IC_EVEX_L2_OPSIZE_K, /* 3989 */ IC_EVEX_L2_OPSIZE_K, /* 3990 */ IC_EVEX_L2_OPSIZE_K, /* 3991 */ IC_EVEX_L2_W_OPSIZE_K, /* 3992 */ IC_EVEX_L2_W_OPSIZE_K, /* 3993 */ IC_EVEX_L2_W_OPSIZE_K, /* 3994 */ IC_EVEX_L2_W_OPSIZE_K, /* 3995 */ IC_EVEX_L2_W_OPSIZE_K, /* 3996 */ IC_EVEX_L2_W_OPSIZE_K, /* 3997 */ IC_EVEX_L2_W_OPSIZE_K, /* 3998 */ IC_EVEX_L2_W_OPSIZE_K, /* 3999 */ IC_EVEX_L2_K, /* 4000 */ IC_EVEX_L2_K, /* 4001 */ IC_EVEX_L2_XS_K, /* 4002 */ IC_EVEX_L2_XS_K, /* 4003 */ IC_EVEX_L2_XD_K, /* 4004 */ IC_EVEX_L2_XD_K, /* 4005 */ IC_EVEX_L2_XD_K, /* 4006 */ IC_EVEX_L2_XD_K, /* 4007 */ IC_EVEX_L2_W_K, /* 4008 */ IC_EVEX_L2_W_K, /* 4009 */ IC_EVEX_L2_W_XS_K, /* 4010 */ IC_EVEX_L2_W_XS_K, /* 4011 */ IC_EVEX_L2_W_XD_K, /* 4012 */ IC_EVEX_L2_W_XD_K, /* 4013 */ IC_EVEX_L2_W_XD_K, /* 4014 */ IC_EVEX_L2_W_XD_K, /* 4015 */ IC_EVEX_L2_OPSIZE_K, /* 4016 */ IC_EVEX_L2_OPSIZE_K, /* 4017 */ IC_EVEX_L2_OPSIZE_K, /* 4018 */ IC_EVEX_L2_OPSIZE_K, /* 4019 */ IC_EVEX_L2_OPSIZE_K, /* 4020 */ IC_EVEX_L2_OPSIZE_K, /* 4021 */ IC_EVEX_L2_OPSIZE_K, /* 4022 */ IC_EVEX_L2_OPSIZE_K, /* 4023 */ IC_EVEX_L2_W_OPSIZE_K, /* 4024 */ IC_EVEX_L2_W_OPSIZE_K, /* 4025 */ IC_EVEX_L2_W_OPSIZE_K, /* 4026 */ IC_EVEX_L2_W_OPSIZE_K, /* 4027 */ IC_EVEX_L2_W_OPSIZE_K, /* 4028 */ IC_EVEX_L2_W_OPSIZE_K, /* 4029 */ IC_EVEX_L2_W_OPSIZE_K, /* 4030 */ IC_EVEX_L2_W_OPSIZE_K, /* 4031 */ IC_EVEX_L2_K, /* 4032 */ IC_EVEX_L2_K, /* 4033 */ IC_EVEX_L2_XS_K, /* 4034 */ IC_EVEX_L2_XS_K, /* 4035 */ IC_EVEX_L2_XD_K, /* 4036 */ IC_EVEX_L2_XD_K, /* 4037 */ IC_EVEX_L2_XD_K, /* 4038 */ IC_EVEX_L2_XD_K, /* 4039 */ IC_EVEX_L2_W_K, /* 4040 */ IC_EVEX_L2_W_K, /* 4041 */ IC_EVEX_L2_W_XS_K, /* 4042 */ IC_EVEX_L2_W_XS_K, /* 4043 */ IC_EVEX_L2_W_XD_K, /* 4044 */ IC_EVEX_L2_W_XD_K, /* 4045 */ IC_EVEX_L2_W_XD_K, /* 4046 */ IC_EVEX_L2_W_XD_K, /* 4047 */ IC_EVEX_L2_OPSIZE_K, /* 4048 */ IC_EVEX_L2_OPSIZE_K, /* 4049 */ IC_EVEX_L2_OPSIZE_K, /* 4050 */ IC_EVEX_L2_OPSIZE_K, /* 4051 */ IC_EVEX_L2_OPSIZE_K, /* 4052 */ IC_EVEX_L2_OPSIZE_K, /* 4053 */ IC_EVEX_L2_OPSIZE_K, /* 4054 */ IC_EVEX_L2_OPSIZE_K, /* 4055 */ IC_EVEX_L2_W_OPSIZE_K, /* 4056 */ IC_EVEX_L2_W_OPSIZE_K, /* 4057 */ IC_EVEX_L2_W_OPSIZE_K, /* 4058 */ IC_EVEX_L2_W_OPSIZE_K, /* 4059 */ IC_EVEX_L2_W_OPSIZE_K, /* 4060 */ IC_EVEX_L2_W_OPSIZE_K, /* 4061 */ IC_EVEX_L2_W_OPSIZE_K, /* 4062 */ IC_EVEX_L2_W_OPSIZE_K, /* 4063 */ IC_EVEX_L2_K, /* 4064 */ IC_EVEX_L2_K, /* 4065 */ IC_EVEX_L2_XS_K, /* 4066 */ IC_EVEX_L2_XS_K, /* 4067 */ IC_EVEX_L2_XD_K, /* 4068 */ IC_EVEX_L2_XD_K, /* 4069 */ IC_EVEX_L2_XD_K, /* 4070 */ IC_EVEX_L2_XD_K, /* 4071 */ IC_EVEX_L2_W_K, /* 4072 */ IC_EVEX_L2_W_K, /* 4073 */ IC_EVEX_L2_W_XS_K, /* 4074 */ IC_EVEX_L2_W_XS_K, /* 4075 */ IC_EVEX_L2_W_XD_K, /* 4076 */ IC_EVEX_L2_W_XD_K, /* 4077 */ IC_EVEX_L2_W_XD_K, /* 4078 */ IC_EVEX_L2_W_XD_K, /* 4079 */ IC_EVEX_L2_OPSIZE_K, /* 4080 */ IC_EVEX_L2_OPSIZE_K, /* 4081 */ IC_EVEX_L2_OPSIZE_K, /* 4082 */ IC_EVEX_L2_OPSIZE_K, /* 4083 */ IC_EVEX_L2_OPSIZE_K, /* 4084 */ IC_EVEX_L2_OPSIZE_K, /* 4085 */ IC_EVEX_L2_OPSIZE_K, /* 4086 */ IC_EVEX_L2_OPSIZE_K, /* 4087 */ IC_EVEX_L2_W_OPSIZE_K, /* 4088 */ IC_EVEX_L2_W_OPSIZE_K, /* 4089 */ IC_EVEX_L2_W_OPSIZE_K, /* 4090 */ IC_EVEX_L2_W_OPSIZE_K, /* 4091 */ IC_EVEX_L2_W_OPSIZE_K, /* 4092 */ IC_EVEX_L2_W_OPSIZE_K, /* 4093 */ IC_EVEX_L2_W_OPSIZE_K, /* 4094 */ IC_EVEX_L2_W_OPSIZE_K, /* 4095 */ IC, /* 4096 */ IC_64BIT, /* 4097 */ IC_XS, /* 4098 */ IC_64BIT_XS, /* 4099 */ IC_XD, /* 4100 */ IC_64BIT_XD, /* 4101 */ IC_XS, /* 4102 */ IC_64BIT_XS, /* 4103 */ IC, /* 4104 */ IC_64BIT_REXW, /* 4105 */ IC_XS, /* 4106 */ IC_64BIT_REXW_XS, /* 4107 */ IC_XD, /* 4108 */ IC_64BIT_REXW_XD, /* 4109 */ IC_XS, /* 4110 */ IC_64BIT_REXW_XS, /* 4111 */ IC_OPSIZE, /* 4112 */ IC_64BIT_OPSIZE, /* 4113 */ IC_XS_OPSIZE, /* 4114 */ IC_64BIT_XS_OPSIZE, /* 4115 */ IC_XD_OPSIZE, /* 4116 */ IC_64BIT_XD_OPSIZE, /* 4117 */ IC_XS_OPSIZE, /* 4118 */ IC_64BIT_XD_OPSIZE, /* 4119 */ IC_OPSIZE, /* 4120 */ IC_64BIT_REXW_OPSIZE, /* 4121 */ IC_XS_OPSIZE, /* 4122 */ IC_64BIT_REXW_XS, /* 4123 */ IC_XD_OPSIZE, /* 4124 */ IC_64BIT_REXW_XD, /* 4125 */ IC_XS_OPSIZE, /* 4126 */ IC_64BIT_REXW_XS, /* 4127 */ IC_ADSIZE, /* 4128 */ IC_64BIT_ADSIZE, /* 4129 */ IC_XS, /* 4130 */ IC_64BIT_XS, /* 4131 */ IC_XD, /* 4132 */ IC_64BIT_XD, /* 4133 */ IC_XS, /* 4134 */ IC_64BIT_XS, /* 4135 */ IC_ADSIZE, /* 4136 */ IC_64BIT_REXW_ADSIZE, /* 4137 */ IC_XS, /* 4138 */ IC_64BIT_REXW_XS, /* 4139 */ IC_XD, /* 4140 */ IC_64BIT_REXW_XD, /* 4141 */ IC_XS, /* 4142 */ IC_64BIT_REXW_XS, /* 4143 */ IC_OPSIZE_ADSIZE, /* 4144 */ IC_64BIT_OPSIZE_ADSIZE, /* 4145 */ IC_XS_OPSIZE, /* 4146 */ IC_64BIT_XS_OPSIZE, /* 4147 */ IC_XD_OPSIZE, /* 4148 */ IC_64BIT_XD_OPSIZE, /* 4149 */ IC_XS_OPSIZE, /* 4150 */ IC_64BIT_XD_OPSIZE, /* 4151 */ IC_OPSIZE_ADSIZE, /* 4152 */ IC_64BIT_REXW_OPSIZE, /* 4153 */ IC_XS_OPSIZE, /* 4154 */ IC_64BIT_REXW_XS, /* 4155 */ IC_XD_OPSIZE, /* 4156 */ IC_64BIT_REXW_XD, /* 4157 */ IC_XS_OPSIZE, /* 4158 */ IC_64BIT_REXW_XS, /* 4159 */ IC_VEX, /* 4160 */ IC_VEX, /* 4161 */ IC_VEX_XS, /* 4162 */ IC_VEX_XS, /* 4163 */ IC_VEX_XD, /* 4164 */ IC_VEX_XD, /* 4165 */ IC_VEX_XD, /* 4166 */ IC_VEX_XD, /* 4167 */ IC_VEX_W, /* 4168 */ IC_VEX_W, /* 4169 */ IC_VEX_W_XS, /* 4170 */ IC_VEX_W_XS, /* 4171 */ IC_VEX_W_XD, /* 4172 */ IC_VEX_W_XD, /* 4173 */ IC_VEX_W_XD, /* 4174 */ IC_VEX_W_XD, /* 4175 */ IC_VEX_OPSIZE, /* 4176 */ IC_VEX_OPSIZE, /* 4177 */ IC_VEX_OPSIZE, /* 4178 */ IC_VEX_OPSIZE, /* 4179 */ IC_VEX_OPSIZE, /* 4180 */ IC_VEX_OPSIZE, /* 4181 */ IC_VEX_OPSIZE, /* 4182 */ IC_VEX_OPSIZE, /* 4183 */ IC_VEX_W_OPSIZE, /* 4184 */ IC_VEX_W_OPSIZE, /* 4185 */ IC_VEX_W_OPSIZE, /* 4186 */ IC_VEX_W_OPSIZE, /* 4187 */ IC_VEX_W_OPSIZE, /* 4188 */ IC_VEX_W_OPSIZE, /* 4189 */ IC_VEX_W_OPSIZE, /* 4190 */ IC_VEX_W_OPSIZE, /* 4191 */ IC_VEX, /* 4192 */ IC_VEX, /* 4193 */ IC_VEX_XS, /* 4194 */ IC_VEX_XS, /* 4195 */ IC_VEX_XD, /* 4196 */ IC_VEX_XD, /* 4197 */ IC_VEX_XD, /* 4198 */ IC_VEX_XD, /* 4199 */ IC_VEX_W, /* 4200 */ IC_VEX_W, /* 4201 */ IC_VEX_W_XS, /* 4202 */ IC_VEX_W_XS, /* 4203 */ IC_VEX_W_XD, /* 4204 */ IC_VEX_W_XD, /* 4205 */ IC_VEX_W_XD, /* 4206 */ IC_VEX_W_XD, /* 4207 */ IC_VEX_OPSIZE, /* 4208 */ IC_VEX_OPSIZE, /* 4209 */ IC_VEX_OPSIZE, /* 4210 */ IC_VEX_OPSIZE, /* 4211 */ IC_VEX_OPSIZE, /* 4212 */ IC_VEX_OPSIZE, /* 4213 */ IC_VEX_OPSIZE, /* 4214 */ IC_VEX_OPSIZE, /* 4215 */ IC_VEX_W_OPSIZE, /* 4216 */ IC_VEX_W_OPSIZE, /* 4217 */ IC_VEX_W_OPSIZE, /* 4218 */ IC_VEX_W_OPSIZE, /* 4219 */ IC_VEX_W_OPSIZE, /* 4220 */ IC_VEX_W_OPSIZE, /* 4221 */ IC_VEX_W_OPSIZE, /* 4222 */ IC_VEX_W_OPSIZE, /* 4223 */ IC_VEX_L, /* 4224 */ IC_VEX_L, /* 4225 */ IC_VEX_L_XS, /* 4226 */ IC_VEX_L_XS, /* 4227 */ IC_VEX_L_XD, /* 4228 */ IC_VEX_L_XD, /* 4229 */ IC_VEX_L_XD, /* 4230 */ IC_VEX_L_XD, /* 4231 */ IC_VEX_L_W, /* 4232 */ IC_VEX_L_W, /* 4233 */ IC_VEX_L_W_XS, /* 4234 */ IC_VEX_L_W_XS, /* 4235 */ IC_VEX_L_W_XD, /* 4236 */ IC_VEX_L_W_XD, /* 4237 */ IC_VEX_L_W_XD, /* 4238 */ IC_VEX_L_W_XD, /* 4239 */ IC_VEX_L_OPSIZE, /* 4240 */ IC_VEX_L_OPSIZE, /* 4241 */ IC_VEX_L_OPSIZE, /* 4242 */ IC_VEX_L_OPSIZE, /* 4243 */ IC_VEX_L_OPSIZE, /* 4244 */ IC_VEX_L_OPSIZE, /* 4245 */ IC_VEX_L_OPSIZE, /* 4246 */ IC_VEX_L_OPSIZE, /* 4247 */ IC_VEX_L_W_OPSIZE, /* 4248 */ IC_VEX_L_W_OPSIZE, /* 4249 */ IC_VEX_L_W_OPSIZE, /* 4250 */ IC_VEX_L_W_OPSIZE, /* 4251 */ IC_VEX_L_W_OPSIZE, /* 4252 */ IC_VEX_L_W_OPSIZE, /* 4253 */ IC_VEX_L_W_OPSIZE, /* 4254 */ IC_VEX_L_W_OPSIZE, /* 4255 */ IC_VEX_L, /* 4256 */ IC_VEX_L, /* 4257 */ IC_VEX_L_XS, /* 4258 */ IC_VEX_L_XS, /* 4259 */ IC_VEX_L_XD, /* 4260 */ IC_VEX_L_XD, /* 4261 */ IC_VEX_L_XD, /* 4262 */ IC_VEX_L_XD, /* 4263 */ IC_VEX_L_W, /* 4264 */ IC_VEX_L_W, /* 4265 */ IC_VEX_L_W_XS, /* 4266 */ IC_VEX_L_W_XS, /* 4267 */ IC_VEX_L_W_XD, /* 4268 */ IC_VEX_L_W_XD, /* 4269 */ IC_VEX_L_W_XD, /* 4270 */ IC_VEX_L_W_XD, /* 4271 */ IC_VEX_L_OPSIZE, /* 4272 */ IC_VEX_L_OPSIZE, /* 4273 */ IC_VEX_L_OPSIZE, /* 4274 */ IC_VEX_L_OPSIZE, /* 4275 */ IC_VEX_L_OPSIZE, /* 4276 */ IC_VEX_L_OPSIZE, /* 4277 */ IC_VEX_L_OPSIZE, /* 4278 */ IC_VEX_L_OPSIZE, /* 4279 */ IC_VEX_L_W_OPSIZE, /* 4280 */ IC_VEX_L_W_OPSIZE, /* 4281 */ IC_VEX_L_W_OPSIZE, /* 4282 */ IC_VEX_L_W_OPSIZE, /* 4283 */ IC_VEX_L_W_OPSIZE, /* 4284 */ IC_VEX_L_W_OPSIZE, /* 4285 */ IC_VEX_L_W_OPSIZE, /* 4286 */ IC_VEX_L_W_OPSIZE, /* 4287 */ IC_VEX_L, /* 4288 */ IC_VEX_L, /* 4289 */ IC_VEX_L_XS, /* 4290 */ IC_VEX_L_XS, /* 4291 */ IC_VEX_L_XD, /* 4292 */ IC_VEX_L_XD, /* 4293 */ IC_VEX_L_XD, /* 4294 */ IC_VEX_L_XD, /* 4295 */ IC_VEX_L_W, /* 4296 */ IC_VEX_L_W, /* 4297 */ IC_VEX_L_W_XS, /* 4298 */ IC_VEX_L_W_XS, /* 4299 */ IC_VEX_L_W_XD, /* 4300 */ IC_VEX_L_W_XD, /* 4301 */ IC_VEX_L_W_XD, /* 4302 */ IC_VEX_L_W_XD, /* 4303 */ IC_VEX_L_OPSIZE, /* 4304 */ IC_VEX_L_OPSIZE, /* 4305 */ IC_VEX_L_OPSIZE, /* 4306 */ IC_VEX_L_OPSIZE, /* 4307 */ IC_VEX_L_OPSIZE, /* 4308 */ IC_VEX_L_OPSIZE, /* 4309 */ IC_VEX_L_OPSIZE, /* 4310 */ IC_VEX_L_OPSIZE, /* 4311 */ IC_VEX_L_W_OPSIZE, /* 4312 */ IC_VEX_L_W_OPSIZE, /* 4313 */ IC_VEX_L_W_OPSIZE, /* 4314 */ IC_VEX_L_W_OPSIZE, /* 4315 */ IC_VEX_L_W_OPSIZE, /* 4316 */ IC_VEX_L_W_OPSIZE, /* 4317 */ IC_VEX_L_W_OPSIZE, /* 4318 */ IC_VEX_L_W_OPSIZE, /* 4319 */ IC_VEX_L, /* 4320 */ IC_VEX_L, /* 4321 */ IC_VEX_L_XS, /* 4322 */ IC_VEX_L_XS, /* 4323 */ IC_VEX_L_XD, /* 4324 */ IC_VEX_L_XD, /* 4325 */ IC_VEX_L_XD, /* 4326 */ IC_VEX_L_XD, /* 4327 */ IC_VEX_L_W, /* 4328 */ IC_VEX_L_W, /* 4329 */ IC_VEX_L_W_XS, /* 4330 */ IC_VEX_L_W_XS, /* 4331 */ IC_VEX_L_W_XD, /* 4332 */ IC_VEX_L_W_XD, /* 4333 */ IC_VEX_L_W_XD, /* 4334 */ IC_VEX_L_W_XD, /* 4335 */ IC_VEX_L_OPSIZE, /* 4336 */ IC_VEX_L_OPSIZE, /* 4337 */ IC_VEX_L_OPSIZE, /* 4338 */ IC_VEX_L_OPSIZE, /* 4339 */ IC_VEX_L_OPSIZE, /* 4340 */ IC_VEX_L_OPSIZE, /* 4341 */ IC_VEX_L_OPSIZE, /* 4342 */ IC_VEX_L_OPSIZE, /* 4343 */ IC_VEX_L_W_OPSIZE, /* 4344 */ IC_VEX_L_W_OPSIZE, /* 4345 */ IC_VEX_L_W_OPSIZE, /* 4346 */ IC_VEX_L_W_OPSIZE, /* 4347 */ IC_VEX_L_W_OPSIZE, /* 4348 */ IC_VEX_L_W_OPSIZE, /* 4349 */ IC_VEX_L_W_OPSIZE, /* 4350 */ IC_VEX_L_W_OPSIZE, /* 4351 */ IC_EVEX_KZ, /* 4352 */ IC_EVEX_KZ, /* 4353 */ IC_EVEX_XS_KZ, /* 4354 */ IC_EVEX_XS_KZ, /* 4355 */ IC_EVEX_XD_KZ, /* 4356 */ IC_EVEX_XD_KZ, /* 4357 */ IC_EVEX_XD_KZ, /* 4358 */ IC_EVEX_XD_KZ, /* 4359 */ IC_EVEX_W_KZ, /* 4360 */ IC_EVEX_W_KZ, /* 4361 */ IC_EVEX_W_XS_KZ, /* 4362 */ IC_EVEX_W_XS_KZ, /* 4363 */ IC_EVEX_W_XD_KZ, /* 4364 */ IC_EVEX_W_XD_KZ, /* 4365 */ IC_EVEX_W_XD_KZ, /* 4366 */ IC_EVEX_W_XD_KZ, /* 4367 */ IC_EVEX_OPSIZE_KZ, /* 4368 */ IC_EVEX_OPSIZE_KZ, /* 4369 */ IC_EVEX_OPSIZE_KZ, /* 4370 */ IC_EVEX_OPSIZE_KZ, /* 4371 */ IC_EVEX_OPSIZE_KZ, /* 4372 */ IC_EVEX_OPSIZE_KZ, /* 4373 */ IC_EVEX_OPSIZE_KZ, /* 4374 */ IC_EVEX_OPSIZE_KZ, /* 4375 */ IC_EVEX_W_OPSIZE_KZ, /* 4376 */ IC_EVEX_W_OPSIZE_KZ, /* 4377 */ IC_EVEX_W_OPSIZE_KZ, /* 4378 */ IC_EVEX_W_OPSIZE_KZ, /* 4379 */ IC_EVEX_W_OPSIZE_KZ, /* 4380 */ IC_EVEX_W_OPSIZE_KZ, /* 4381 */ IC_EVEX_W_OPSIZE_KZ, /* 4382 */ IC_EVEX_W_OPSIZE_KZ, /* 4383 */ IC_EVEX_KZ, /* 4384 */ IC_EVEX_KZ, /* 4385 */ IC_EVEX_XS_KZ, /* 4386 */ IC_EVEX_XS_KZ, /* 4387 */ IC_EVEX_XD_KZ, /* 4388 */ IC_EVEX_XD_KZ, /* 4389 */ IC_EVEX_XD_KZ, /* 4390 */ IC_EVEX_XD_KZ, /* 4391 */ IC_EVEX_W_KZ, /* 4392 */ IC_EVEX_W_KZ, /* 4393 */ IC_EVEX_W_XS_KZ, /* 4394 */ IC_EVEX_W_XS_KZ, /* 4395 */ IC_EVEX_W_XD_KZ, /* 4396 */ IC_EVEX_W_XD_KZ, /* 4397 */ IC_EVEX_W_XD_KZ, /* 4398 */ IC_EVEX_W_XD_KZ, /* 4399 */ IC_EVEX_OPSIZE_KZ, /* 4400 */ IC_EVEX_OPSIZE_KZ, /* 4401 */ IC_EVEX_OPSIZE_KZ, /* 4402 */ IC_EVEX_OPSIZE_KZ, /* 4403 */ IC_EVEX_OPSIZE_KZ, /* 4404 */ IC_EVEX_OPSIZE_KZ, /* 4405 */ IC_EVEX_OPSIZE_KZ, /* 4406 */ IC_EVEX_OPSIZE_KZ, /* 4407 */ IC_EVEX_W_OPSIZE_KZ, /* 4408 */ IC_EVEX_W_OPSIZE_KZ, /* 4409 */ IC_EVEX_W_OPSIZE_KZ, /* 4410 */ IC_EVEX_W_OPSIZE_KZ, /* 4411 */ IC_EVEX_W_OPSIZE_KZ, /* 4412 */ IC_EVEX_W_OPSIZE_KZ, /* 4413 */ IC_EVEX_W_OPSIZE_KZ, /* 4414 */ IC_EVEX_W_OPSIZE_KZ, /* 4415 */ IC_EVEX_KZ, /* 4416 */ IC_EVEX_KZ, /* 4417 */ IC_EVEX_XS_KZ, /* 4418 */ IC_EVEX_XS_KZ, /* 4419 */ IC_EVEX_XD_KZ, /* 4420 */ IC_EVEX_XD_KZ, /* 4421 */ IC_EVEX_XD_KZ, /* 4422 */ IC_EVEX_XD_KZ, /* 4423 */ IC_EVEX_W_KZ, /* 4424 */ IC_EVEX_W_KZ, /* 4425 */ IC_EVEX_W_XS_KZ, /* 4426 */ IC_EVEX_W_XS_KZ, /* 4427 */ IC_EVEX_W_XD_KZ, /* 4428 */ IC_EVEX_W_XD_KZ, /* 4429 */ IC_EVEX_W_XD_KZ, /* 4430 */ IC_EVEX_W_XD_KZ, /* 4431 */ IC_EVEX_OPSIZE_KZ, /* 4432 */ IC_EVEX_OPSIZE_KZ, /* 4433 */ IC_EVEX_OPSIZE_KZ, /* 4434 */ IC_EVEX_OPSIZE_KZ, /* 4435 */ IC_EVEX_OPSIZE_KZ, /* 4436 */ IC_EVEX_OPSIZE_KZ, /* 4437 */ IC_EVEX_OPSIZE_KZ, /* 4438 */ IC_EVEX_OPSIZE_KZ, /* 4439 */ IC_EVEX_W_OPSIZE_KZ, /* 4440 */ IC_EVEX_W_OPSIZE_KZ, /* 4441 */ IC_EVEX_W_OPSIZE_KZ, /* 4442 */ IC_EVEX_W_OPSIZE_KZ, /* 4443 */ IC_EVEX_W_OPSIZE_KZ, /* 4444 */ IC_EVEX_W_OPSIZE_KZ, /* 4445 */ IC_EVEX_W_OPSIZE_KZ, /* 4446 */ IC_EVEX_W_OPSIZE_KZ, /* 4447 */ IC_EVEX_KZ, /* 4448 */ IC_EVEX_KZ, /* 4449 */ IC_EVEX_XS_KZ, /* 4450 */ IC_EVEX_XS_KZ, /* 4451 */ IC_EVEX_XD_KZ, /* 4452 */ IC_EVEX_XD_KZ, /* 4453 */ IC_EVEX_XD_KZ, /* 4454 */ IC_EVEX_XD_KZ, /* 4455 */ IC_EVEX_W_KZ, /* 4456 */ IC_EVEX_W_KZ, /* 4457 */ IC_EVEX_W_XS_KZ, /* 4458 */ IC_EVEX_W_XS_KZ, /* 4459 */ IC_EVEX_W_XD_KZ, /* 4460 */ IC_EVEX_W_XD_KZ, /* 4461 */ IC_EVEX_W_XD_KZ, /* 4462 */ IC_EVEX_W_XD_KZ, /* 4463 */ IC_EVEX_OPSIZE_KZ, /* 4464 */ IC_EVEX_OPSIZE_KZ, /* 4465 */ IC_EVEX_OPSIZE_KZ, /* 4466 */ IC_EVEX_OPSIZE_KZ, /* 4467 */ IC_EVEX_OPSIZE_KZ, /* 4468 */ IC_EVEX_OPSIZE_KZ, /* 4469 */ IC_EVEX_OPSIZE_KZ, /* 4470 */ IC_EVEX_OPSIZE_KZ, /* 4471 */ IC_EVEX_W_OPSIZE_KZ, /* 4472 */ IC_EVEX_W_OPSIZE_KZ, /* 4473 */ IC_EVEX_W_OPSIZE_KZ, /* 4474 */ IC_EVEX_W_OPSIZE_KZ, /* 4475 */ IC_EVEX_W_OPSIZE_KZ, /* 4476 */ IC_EVEX_W_OPSIZE_KZ, /* 4477 */ IC_EVEX_W_OPSIZE_KZ, /* 4478 */ IC_EVEX_W_OPSIZE_KZ, /* 4479 */ IC_EVEX_KZ, /* 4480 */ IC_EVEX_KZ, /* 4481 */ IC_EVEX_XS_KZ, /* 4482 */ IC_EVEX_XS_KZ, /* 4483 */ IC_EVEX_XD_KZ, /* 4484 */ IC_EVEX_XD_KZ, /* 4485 */ IC_EVEX_XD_KZ, /* 4486 */ IC_EVEX_XD_KZ, /* 4487 */ IC_EVEX_W_KZ, /* 4488 */ IC_EVEX_W_KZ, /* 4489 */ IC_EVEX_W_XS_KZ, /* 4490 */ IC_EVEX_W_XS_KZ, /* 4491 */ IC_EVEX_W_XD_KZ, /* 4492 */ IC_EVEX_W_XD_KZ, /* 4493 */ IC_EVEX_W_XD_KZ, /* 4494 */ IC_EVEX_W_XD_KZ, /* 4495 */ IC_EVEX_OPSIZE_KZ, /* 4496 */ IC_EVEX_OPSIZE_KZ, /* 4497 */ IC_EVEX_OPSIZE_KZ, /* 4498 */ IC_EVEX_OPSIZE_KZ, /* 4499 */ IC_EVEX_OPSIZE_KZ, /* 4500 */ IC_EVEX_OPSIZE_KZ, /* 4501 */ IC_EVEX_OPSIZE_KZ, /* 4502 */ IC_EVEX_OPSIZE_KZ, /* 4503 */ IC_EVEX_W_OPSIZE_KZ, /* 4504 */ IC_EVEX_W_OPSIZE_KZ, /* 4505 */ IC_EVEX_W_OPSIZE_KZ, /* 4506 */ IC_EVEX_W_OPSIZE_KZ, /* 4507 */ IC_EVEX_W_OPSIZE_KZ, /* 4508 */ IC_EVEX_W_OPSIZE_KZ, /* 4509 */ IC_EVEX_W_OPSIZE_KZ, /* 4510 */ IC_EVEX_W_OPSIZE_KZ, /* 4511 */ IC_EVEX_KZ, /* 4512 */ IC_EVEX_KZ, /* 4513 */ IC_EVEX_XS_KZ, /* 4514 */ IC_EVEX_XS_KZ, /* 4515 */ IC_EVEX_XD_KZ, /* 4516 */ IC_EVEX_XD_KZ, /* 4517 */ IC_EVEX_XD_KZ, /* 4518 */ IC_EVEX_XD_KZ, /* 4519 */ IC_EVEX_W_KZ, /* 4520 */ IC_EVEX_W_KZ, /* 4521 */ IC_EVEX_W_XS_KZ, /* 4522 */ IC_EVEX_W_XS_KZ, /* 4523 */ IC_EVEX_W_XD_KZ, /* 4524 */ IC_EVEX_W_XD_KZ, /* 4525 */ IC_EVEX_W_XD_KZ, /* 4526 */ IC_EVEX_W_XD_KZ, /* 4527 */ IC_EVEX_OPSIZE_KZ, /* 4528 */ IC_EVEX_OPSIZE_KZ, /* 4529 */ IC_EVEX_OPSIZE_KZ, /* 4530 */ IC_EVEX_OPSIZE_KZ, /* 4531 */ IC_EVEX_OPSIZE_KZ, /* 4532 */ IC_EVEX_OPSIZE_KZ, /* 4533 */ IC_EVEX_OPSIZE_KZ, /* 4534 */ IC_EVEX_OPSIZE_KZ, /* 4535 */ IC_EVEX_W_OPSIZE_KZ, /* 4536 */ IC_EVEX_W_OPSIZE_KZ, /* 4537 */ IC_EVEX_W_OPSIZE_KZ, /* 4538 */ IC_EVEX_W_OPSIZE_KZ, /* 4539 */ IC_EVEX_W_OPSIZE_KZ, /* 4540 */ IC_EVEX_W_OPSIZE_KZ, /* 4541 */ IC_EVEX_W_OPSIZE_KZ, /* 4542 */ IC_EVEX_W_OPSIZE_KZ, /* 4543 */ IC_EVEX_KZ, /* 4544 */ IC_EVEX_KZ, /* 4545 */ IC_EVEX_XS_KZ, /* 4546 */ IC_EVEX_XS_KZ, /* 4547 */ IC_EVEX_XD_KZ, /* 4548 */ IC_EVEX_XD_KZ, /* 4549 */ IC_EVEX_XD_KZ, /* 4550 */ IC_EVEX_XD_KZ, /* 4551 */ IC_EVEX_W_KZ, /* 4552 */ IC_EVEX_W_KZ, /* 4553 */ IC_EVEX_W_XS_KZ, /* 4554 */ IC_EVEX_W_XS_KZ, /* 4555 */ IC_EVEX_W_XD_KZ, /* 4556 */ IC_EVEX_W_XD_KZ, /* 4557 */ IC_EVEX_W_XD_KZ, /* 4558 */ IC_EVEX_W_XD_KZ, /* 4559 */ IC_EVEX_OPSIZE_KZ, /* 4560 */ IC_EVEX_OPSIZE_KZ, /* 4561 */ IC_EVEX_OPSIZE_KZ, /* 4562 */ IC_EVEX_OPSIZE_KZ, /* 4563 */ IC_EVEX_OPSIZE_KZ, /* 4564 */ IC_EVEX_OPSIZE_KZ, /* 4565 */ IC_EVEX_OPSIZE_KZ, /* 4566 */ IC_EVEX_OPSIZE_KZ, /* 4567 */ IC_EVEX_W_OPSIZE_KZ, /* 4568 */ IC_EVEX_W_OPSIZE_KZ, /* 4569 */ IC_EVEX_W_OPSIZE_KZ, /* 4570 */ IC_EVEX_W_OPSIZE_KZ, /* 4571 */ IC_EVEX_W_OPSIZE_KZ, /* 4572 */ IC_EVEX_W_OPSIZE_KZ, /* 4573 */ IC_EVEX_W_OPSIZE_KZ, /* 4574 */ IC_EVEX_W_OPSIZE_KZ, /* 4575 */ IC_EVEX_KZ, /* 4576 */ IC_EVEX_KZ, /* 4577 */ IC_EVEX_XS_KZ, /* 4578 */ IC_EVEX_XS_KZ, /* 4579 */ IC_EVEX_XD_KZ, /* 4580 */ IC_EVEX_XD_KZ, /* 4581 */ IC_EVEX_XD_KZ, /* 4582 */ IC_EVEX_XD_KZ, /* 4583 */ IC_EVEX_W_KZ, /* 4584 */ IC_EVEX_W_KZ, /* 4585 */ IC_EVEX_W_XS_KZ, /* 4586 */ IC_EVEX_W_XS_KZ, /* 4587 */ IC_EVEX_W_XD_KZ, /* 4588 */ IC_EVEX_W_XD_KZ, /* 4589 */ IC_EVEX_W_XD_KZ, /* 4590 */ IC_EVEX_W_XD_KZ, /* 4591 */ IC_EVEX_OPSIZE_KZ, /* 4592 */ IC_EVEX_OPSIZE_KZ, /* 4593 */ IC_EVEX_OPSIZE_KZ, /* 4594 */ IC_EVEX_OPSIZE_KZ, /* 4595 */ IC_EVEX_OPSIZE_KZ, /* 4596 */ IC_EVEX_OPSIZE_KZ, /* 4597 */ IC_EVEX_OPSIZE_KZ, /* 4598 */ IC_EVEX_OPSIZE_KZ, /* 4599 */ IC_EVEX_W_OPSIZE_KZ, /* 4600 */ IC_EVEX_W_OPSIZE_KZ, /* 4601 */ IC_EVEX_W_OPSIZE_KZ, /* 4602 */ IC_EVEX_W_OPSIZE_KZ, /* 4603 */ IC_EVEX_W_OPSIZE_KZ, /* 4604 */ IC_EVEX_W_OPSIZE_KZ, /* 4605 */ IC_EVEX_W_OPSIZE_KZ, /* 4606 */ IC_EVEX_W_OPSIZE_KZ, /* 4607 */ IC, /* 4608 */ IC_64BIT, /* 4609 */ IC_XS, /* 4610 */ IC_64BIT_XS, /* 4611 */ IC_XD, /* 4612 */ IC_64BIT_XD, /* 4613 */ IC_XS, /* 4614 */ IC_64BIT_XS, /* 4615 */ IC, /* 4616 */ IC_64BIT_REXW, /* 4617 */ IC_XS, /* 4618 */ IC_64BIT_REXW_XS, /* 4619 */ IC_XD, /* 4620 */ IC_64BIT_REXW_XD, /* 4621 */ IC_XS, /* 4622 */ IC_64BIT_REXW_XS, /* 4623 */ IC_OPSIZE, /* 4624 */ IC_64BIT_OPSIZE, /* 4625 */ IC_XS_OPSIZE, /* 4626 */ IC_64BIT_XS_OPSIZE, /* 4627 */ IC_XD_OPSIZE, /* 4628 */ IC_64BIT_XD_OPSIZE, /* 4629 */ IC_XS_OPSIZE, /* 4630 */ IC_64BIT_XD_OPSIZE, /* 4631 */ IC_OPSIZE, /* 4632 */ IC_64BIT_REXW_OPSIZE, /* 4633 */ IC_XS_OPSIZE, /* 4634 */ IC_64BIT_REXW_XS, /* 4635 */ IC_XD_OPSIZE, /* 4636 */ IC_64BIT_REXW_XD, /* 4637 */ IC_XS_OPSIZE, /* 4638 */ IC_64BIT_REXW_XS, /* 4639 */ IC_ADSIZE, /* 4640 */ IC_64BIT_ADSIZE, /* 4641 */ IC_XS, /* 4642 */ IC_64BIT_XS, /* 4643 */ IC_XD, /* 4644 */ IC_64BIT_XD, /* 4645 */ IC_XS, /* 4646 */ IC_64BIT_XS, /* 4647 */ IC_ADSIZE, /* 4648 */ IC_64BIT_REXW_ADSIZE, /* 4649 */ IC_XS, /* 4650 */ IC_64BIT_REXW_XS, /* 4651 */ IC_XD, /* 4652 */ IC_64BIT_REXW_XD, /* 4653 */ IC_XS, /* 4654 */ IC_64BIT_REXW_XS, /* 4655 */ IC_OPSIZE_ADSIZE, /* 4656 */ IC_64BIT_OPSIZE_ADSIZE, /* 4657 */ IC_XS_OPSIZE, /* 4658 */ IC_64BIT_XS_OPSIZE, /* 4659 */ IC_XD_OPSIZE, /* 4660 */ IC_64BIT_XD_OPSIZE, /* 4661 */ IC_XS_OPSIZE, /* 4662 */ IC_64BIT_XD_OPSIZE, /* 4663 */ IC_OPSIZE_ADSIZE, /* 4664 */ IC_64BIT_REXW_OPSIZE, /* 4665 */ IC_XS_OPSIZE, /* 4666 */ IC_64BIT_REXW_XS, /* 4667 */ IC_XD_OPSIZE, /* 4668 */ IC_64BIT_REXW_XD, /* 4669 */ IC_XS_OPSIZE, /* 4670 */ IC_64BIT_REXW_XS, /* 4671 */ IC_VEX, /* 4672 */ IC_VEX, /* 4673 */ IC_VEX_XS, /* 4674 */ IC_VEX_XS, /* 4675 */ IC_VEX_XD, /* 4676 */ IC_VEX_XD, /* 4677 */ IC_VEX_XD, /* 4678 */ IC_VEX_XD, /* 4679 */ IC_VEX_W, /* 4680 */ IC_VEX_W, /* 4681 */ IC_VEX_W_XS, /* 4682 */ IC_VEX_W_XS, /* 4683 */ IC_VEX_W_XD, /* 4684 */ IC_VEX_W_XD, /* 4685 */ IC_VEX_W_XD, /* 4686 */ IC_VEX_W_XD, /* 4687 */ IC_VEX_OPSIZE, /* 4688 */ IC_VEX_OPSIZE, /* 4689 */ IC_VEX_OPSIZE, /* 4690 */ IC_VEX_OPSIZE, /* 4691 */ IC_VEX_OPSIZE, /* 4692 */ IC_VEX_OPSIZE, /* 4693 */ IC_VEX_OPSIZE, /* 4694 */ IC_VEX_OPSIZE, /* 4695 */ IC_VEX_W_OPSIZE, /* 4696 */ IC_VEX_W_OPSIZE, /* 4697 */ IC_VEX_W_OPSIZE, /* 4698 */ IC_VEX_W_OPSIZE, /* 4699 */ IC_VEX_W_OPSIZE, /* 4700 */ IC_VEX_W_OPSIZE, /* 4701 */ IC_VEX_W_OPSIZE, /* 4702 */ IC_VEX_W_OPSIZE, /* 4703 */ IC_VEX, /* 4704 */ IC_VEX, /* 4705 */ IC_VEX_XS, /* 4706 */ IC_VEX_XS, /* 4707 */ IC_VEX_XD, /* 4708 */ IC_VEX_XD, /* 4709 */ IC_VEX_XD, /* 4710 */ IC_VEX_XD, /* 4711 */ IC_VEX_W, /* 4712 */ IC_VEX_W, /* 4713 */ IC_VEX_W_XS, /* 4714 */ IC_VEX_W_XS, /* 4715 */ IC_VEX_W_XD, /* 4716 */ IC_VEX_W_XD, /* 4717 */ IC_VEX_W_XD, /* 4718 */ IC_VEX_W_XD, /* 4719 */ IC_VEX_OPSIZE, /* 4720 */ IC_VEX_OPSIZE, /* 4721 */ IC_VEX_OPSIZE, /* 4722 */ IC_VEX_OPSIZE, /* 4723 */ IC_VEX_OPSIZE, /* 4724 */ IC_VEX_OPSIZE, /* 4725 */ IC_VEX_OPSIZE, /* 4726 */ IC_VEX_OPSIZE, /* 4727 */ IC_VEX_W_OPSIZE, /* 4728 */ IC_VEX_W_OPSIZE, /* 4729 */ IC_VEX_W_OPSIZE, /* 4730 */ IC_VEX_W_OPSIZE, /* 4731 */ IC_VEX_W_OPSIZE, /* 4732 */ IC_VEX_W_OPSIZE, /* 4733 */ IC_VEX_W_OPSIZE, /* 4734 */ IC_VEX_W_OPSIZE, /* 4735 */ IC_VEX_L, /* 4736 */ IC_VEX_L, /* 4737 */ IC_VEX_L_XS, /* 4738 */ IC_VEX_L_XS, /* 4739 */ IC_VEX_L_XD, /* 4740 */ IC_VEX_L_XD, /* 4741 */ IC_VEX_L_XD, /* 4742 */ IC_VEX_L_XD, /* 4743 */ IC_VEX_L_W, /* 4744 */ IC_VEX_L_W, /* 4745 */ IC_VEX_L_W_XS, /* 4746 */ IC_VEX_L_W_XS, /* 4747 */ IC_VEX_L_W_XD, /* 4748 */ IC_VEX_L_W_XD, /* 4749 */ IC_VEX_L_W_XD, /* 4750 */ IC_VEX_L_W_XD, /* 4751 */ IC_VEX_L_OPSIZE, /* 4752 */ IC_VEX_L_OPSIZE, /* 4753 */ IC_VEX_L_OPSIZE, /* 4754 */ IC_VEX_L_OPSIZE, /* 4755 */ IC_VEX_L_OPSIZE, /* 4756 */ IC_VEX_L_OPSIZE, /* 4757 */ IC_VEX_L_OPSIZE, /* 4758 */ IC_VEX_L_OPSIZE, /* 4759 */ IC_VEX_L_W_OPSIZE, /* 4760 */ IC_VEX_L_W_OPSIZE, /* 4761 */ IC_VEX_L_W_OPSIZE, /* 4762 */ IC_VEX_L_W_OPSIZE, /* 4763 */ IC_VEX_L_W_OPSIZE, /* 4764 */ IC_VEX_L_W_OPSIZE, /* 4765 */ IC_VEX_L_W_OPSIZE, /* 4766 */ IC_VEX_L_W_OPSIZE, /* 4767 */ IC_VEX_L, /* 4768 */ IC_VEX_L, /* 4769 */ IC_VEX_L_XS, /* 4770 */ IC_VEX_L_XS, /* 4771 */ IC_VEX_L_XD, /* 4772 */ IC_VEX_L_XD, /* 4773 */ IC_VEX_L_XD, /* 4774 */ IC_VEX_L_XD, /* 4775 */ IC_VEX_L_W, /* 4776 */ IC_VEX_L_W, /* 4777 */ IC_VEX_L_W_XS, /* 4778 */ IC_VEX_L_W_XS, /* 4779 */ IC_VEX_L_W_XD, /* 4780 */ IC_VEX_L_W_XD, /* 4781 */ IC_VEX_L_W_XD, /* 4782 */ IC_VEX_L_W_XD, /* 4783 */ IC_VEX_L_OPSIZE, /* 4784 */ IC_VEX_L_OPSIZE, /* 4785 */ IC_VEX_L_OPSIZE, /* 4786 */ IC_VEX_L_OPSIZE, /* 4787 */ IC_VEX_L_OPSIZE, /* 4788 */ IC_VEX_L_OPSIZE, /* 4789 */ IC_VEX_L_OPSIZE, /* 4790 */ IC_VEX_L_OPSIZE, /* 4791 */ IC_VEX_L_W_OPSIZE, /* 4792 */ IC_VEX_L_W_OPSIZE, /* 4793 */ IC_VEX_L_W_OPSIZE, /* 4794 */ IC_VEX_L_W_OPSIZE, /* 4795 */ IC_VEX_L_W_OPSIZE, /* 4796 */ IC_VEX_L_W_OPSIZE, /* 4797 */ IC_VEX_L_W_OPSIZE, /* 4798 */ IC_VEX_L_W_OPSIZE, /* 4799 */ IC_VEX_L, /* 4800 */ IC_VEX_L, /* 4801 */ IC_VEX_L_XS, /* 4802 */ IC_VEX_L_XS, /* 4803 */ IC_VEX_L_XD, /* 4804 */ IC_VEX_L_XD, /* 4805 */ IC_VEX_L_XD, /* 4806 */ IC_VEX_L_XD, /* 4807 */ IC_VEX_L_W, /* 4808 */ IC_VEX_L_W, /* 4809 */ IC_VEX_L_W_XS, /* 4810 */ IC_VEX_L_W_XS, /* 4811 */ IC_VEX_L_W_XD, /* 4812 */ IC_VEX_L_W_XD, /* 4813 */ IC_VEX_L_W_XD, /* 4814 */ IC_VEX_L_W_XD, /* 4815 */ IC_VEX_L_OPSIZE, /* 4816 */ IC_VEX_L_OPSIZE, /* 4817 */ IC_VEX_L_OPSIZE, /* 4818 */ IC_VEX_L_OPSIZE, /* 4819 */ IC_VEX_L_OPSIZE, /* 4820 */ IC_VEX_L_OPSIZE, /* 4821 */ IC_VEX_L_OPSIZE, /* 4822 */ IC_VEX_L_OPSIZE, /* 4823 */ IC_VEX_L_W_OPSIZE, /* 4824 */ IC_VEX_L_W_OPSIZE, /* 4825 */ IC_VEX_L_W_OPSIZE, /* 4826 */ IC_VEX_L_W_OPSIZE, /* 4827 */ IC_VEX_L_W_OPSIZE, /* 4828 */ IC_VEX_L_W_OPSIZE, /* 4829 */ IC_VEX_L_W_OPSIZE, /* 4830 */ IC_VEX_L_W_OPSIZE, /* 4831 */ IC_VEX_L, /* 4832 */ IC_VEX_L, /* 4833 */ IC_VEX_L_XS, /* 4834 */ IC_VEX_L_XS, /* 4835 */ IC_VEX_L_XD, /* 4836 */ IC_VEX_L_XD, /* 4837 */ IC_VEX_L_XD, /* 4838 */ IC_VEX_L_XD, /* 4839 */ IC_VEX_L_W, /* 4840 */ IC_VEX_L_W, /* 4841 */ IC_VEX_L_W_XS, /* 4842 */ IC_VEX_L_W_XS, /* 4843 */ IC_VEX_L_W_XD, /* 4844 */ IC_VEX_L_W_XD, /* 4845 */ IC_VEX_L_W_XD, /* 4846 */ IC_VEX_L_W_XD, /* 4847 */ IC_VEX_L_OPSIZE, /* 4848 */ IC_VEX_L_OPSIZE, /* 4849 */ IC_VEX_L_OPSIZE, /* 4850 */ IC_VEX_L_OPSIZE, /* 4851 */ IC_VEX_L_OPSIZE, /* 4852 */ IC_VEX_L_OPSIZE, /* 4853 */ IC_VEX_L_OPSIZE, /* 4854 */ IC_VEX_L_OPSIZE, /* 4855 */ IC_VEX_L_W_OPSIZE, /* 4856 */ IC_VEX_L_W_OPSIZE, /* 4857 */ IC_VEX_L_W_OPSIZE, /* 4858 */ IC_VEX_L_W_OPSIZE, /* 4859 */ IC_VEX_L_W_OPSIZE, /* 4860 */ IC_VEX_L_W_OPSIZE, /* 4861 */ IC_VEX_L_W_OPSIZE, /* 4862 */ IC_VEX_L_W_OPSIZE, /* 4863 */ IC_EVEX_L_KZ, /* 4864 */ IC_EVEX_L_KZ, /* 4865 */ IC_EVEX_L_XS_KZ, /* 4866 */ IC_EVEX_L_XS_KZ, /* 4867 */ IC_EVEX_L_XD_KZ, /* 4868 */ IC_EVEX_L_XD_KZ, /* 4869 */ IC_EVEX_L_XD_KZ, /* 4870 */ IC_EVEX_L_XD_KZ, /* 4871 */ IC_EVEX_L_W_KZ, /* 4872 */ IC_EVEX_L_W_KZ, /* 4873 */ IC_EVEX_L_W_XS_KZ, /* 4874 */ IC_EVEX_L_W_XS_KZ, /* 4875 */ IC_EVEX_L_W_XD_KZ, /* 4876 */ IC_EVEX_L_W_XD_KZ, /* 4877 */ IC_EVEX_L_W_XD_KZ, /* 4878 */ IC_EVEX_L_W_XD_KZ, /* 4879 */ IC_EVEX_L_OPSIZE_KZ, /* 4880 */ IC_EVEX_L_OPSIZE_KZ, /* 4881 */ IC_EVEX_L_OPSIZE_KZ, /* 4882 */ IC_EVEX_L_OPSIZE_KZ, /* 4883 */ IC_EVEX_L_OPSIZE_KZ, /* 4884 */ IC_EVEX_L_OPSIZE_KZ, /* 4885 */ IC_EVEX_L_OPSIZE_KZ, /* 4886 */ IC_EVEX_L_OPSIZE_KZ, /* 4887 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4888 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4889 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4890 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4891 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4892 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4893 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4894 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4895 */ IC_EVEX_L_KZ, /* 4896 */ IC_EVEX_L_KZ, /* 4897 */ IC_EVEX_L_XS_KZ, /* 4898 */ IC_EVEX_L_XS_KZ, /* 4899 */ IC_EVEX_L_XD_KZ, /* 4900 */ IC_EVEX_L_XD_KZ, /* 4901 */ IC_EVEX_L_XD_KZ, /* 4902 */ IC_EVEX_L_XD_KZ, /* 4903 */ IC_EVEX_L_W_KZ, /* 4904 */ IC_EVEX_L_W_KZ, /* 4905 */ IC_EVEX_L_W_XS_KZ, /* 4906 */ IC_EVEX_L_W_XS_KZ, /* 4907 */ IC_EVEX_L_W_XD_KZ, /* 4908 */ IC_EVEX_L_W_XD_KZ, /* 4909 */ IC_EVEX_L_W_XD_KZ, /* 4910 */ IC_EVEX_L_W_XD_KZ, /* 4911 */ IC_EVEX_L_OPSIZE_KZ, /* 4912 */ IC_EVEX_L_OPSIZE_KZ, /* 4913 */ IC_EVEX_L_OPSIZE_KZ, /* 4914 */ IC_EVEX_L_OPSIZE_KZ, /* 4915 */ IC_EVEX_L_OPSIZE_KZ, /* 4916 */ IC_EVEX_L_OPSIZE_KZ, /* 4917 */ IC_EVEX_L_OPSIZE_KZ, /* 4918 */ IC_EVEX_L_OPSIZE_KZ, /* 4919 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4920 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4921 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4922 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4923 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4924 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4925 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4926 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4927 */ IC_EVEX_L_KZ, /* 4928 */ IC_EVEX_L_KZ, /* 4929 */ IC_EVEX_L_XS_KZ, /* 4930 */ IC_EVEX_L_XS_KZ, /* 4931 */ IC_EVEX_L_XD_KZ, /* 4932 */ IC_EVEX_L_XD_KZ, /* 4933 */ IC_EVEX_L_XD_KZ, /* 4934 */ IC_EVEX_L_XD_KZ, /* 4935 */ IC_EVEX_L_W_KZ, /* 4936 */ IC_EVEX_L_W_KZ, /* 4937 */ IC_EVEX_L_W_XS_KZ, /* 4938 */ IC_EVEX_L_W_XS_KZ, /* 4939 */ IC_EVEX_L_W_XD_KZ, /* 4940 */ IC_EVEX_L_W_XD_KZ, /* 4941 */ IC_EVEX_L_W_XD_KZ, /* 4942 */ IC_EVEX_L_W_XD_KZ, /* 4943 */ IC_EVEX_L_OPSIZE_KZ, /* 4944 */ IC_EVEX_L_OPSIZE_KZ, /* 4945 */ IC_EVEX_L_OPSIZE_KZ, /* 4946 */ IC_EVEX_L_OPSIZE_KZ, /* 4947 */ IC_EVEX_L_OPSIZE_KZ, /* 4948 */ IC_EVEX_L_OPSIZE_KZ, /* 4949 */ IC_EVEX_L_OPSIZE_KZ, /* 4950 */ IC_EVEX_L_OPSIZE_KZ, /* 4951 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4952 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4953 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4954 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4955 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4956 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4957 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4958 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4959 */ IC_EVEX_L_KZ, /* 4960 */ IC_EVEX_L_KZ, /* 4961 */ IC_EVEX_L_XS_KZ, /* 4962 */ IC_EVEX_L_XS_KZ, /* 4963 */ IC_EVEX_L_XD_KZ, /* 4964 */ IC_EVEX_L_XD_KZ, /* 4965 */ IC_EVEX_L_XD_KZ, /* 4966 */ IC_EVEX_L_XD_KZ, /* 4967 */ IC_EVEX_L_W_KZ, /* 4968 */ IC_EVEX_L_W_KZ, /* 4969 */ IC_EVEX_L_W_XS_KZ, /* 4970 */ IC_EVEX_L_W_XS_KZ, /* 4971 */ IC_EVEX_L_W_XD_KZ, /* 4972 */ IC_EVEX_L_W_XD_KZ, /* 4973 */ IC_EVEX_L_W_XD_KZ, /* 4974 */ IC_EVEX_L_W_XD_KZ, /* 4975 */ IC_EVEX_L_OPSIZE_KZ, /* 4976 */ IC_EVEX_L_OPSIZE_KZ, /* 4977 */ IC_EVEX_L_OPSIZE_KZ, /* 4978 */ IC_EVEX_L_OPSIZE_KZ, /* 4979 */ IC_EVEX_L_OPSIZE_KZ, /* 4980 */ IC_EVEX_L_OPSIZE_KZ, /* 4981 */ IC_EVEX_L_OPSIZE_KZ, /* 4982 */ IC_EVEX_L_OPSIZE_KZ, /* 4983 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4984 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4985 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4986 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4987 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4988 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4989 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4990 */ IC_EVEX_L_W_OPSIZE_KZ, /* 4991 */ IC_EVEX_L_KZ, /* 4992 */ IC_EVEX_L_KZ, /* 4993 */ IC_EVEX_L_XS_KZ, /* 4994 */ IC_EVEX_L_XS_KZ, /* 4995 */ IC_EVEX_L_XD_KZ, /* 4996 */ IC_EVEX_L_XD_KZ, /* 4997 */ IC_EVEX_L_XD_KZ, /* 4998 */ IC_EVEX_L_XD_KZ, /* 4999 */ IC_EVEX_L_W_KZ, /* 5000 */ IC_EVEX_L_W_KZ, /* 5001 */ IC_EVEX_L_W_XS_KZ, /* 5002 */ IC_EVEX_L_W_XS_KZ, /* 5003 */ IC_EVEX_L_W_XD_KZ, /* 5004 */ IC_EVEX_L_W_XD_KZ, /* 5005 */ IC_EVEX_L_W_XD_KZ, /* 5006 */ IC_EVEX_L_W_XD_KZ, /* 5007 */ IC_EVEX_L_OPSIZE_KZ, /* 5008 */ IC_EVEX_L_OPSIZE_KZ, /* 5009 */ IC_EVEX_L_OPSIZE_KZ, /* 5010 */ IC_EVEX_L_OPSIZE_KZ, /* 5011 */ IC_EVEX_L_OPSIZE_KZ, /* 5012 */ IC_EVEX_L_OPSIZE_KZ, /* 5013 */ IC_EVEX_L_OPSIZE_KZ, /* 5014 */ IC_EVEX_L_OPSIZE_KZ, /* 5015 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5016 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5017 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5018 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5019 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5020 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5021 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5022 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5023 */ IC_EVEX_L_KZ, /* 5024 */ IC_EVEX_L_KZ, /* 5025 */ IC_EVEX_L_XS_KZ, /* 5026 */ IC_EVEX_L_XS_KZ, /* 5027 */ IC_EVEX_L_XD_KZ, /* 5028 */ IC_EVEX_L_XD_KZ, /* 5029 */ IC_EVEX_L_XD_KZ, /* 5030 */ IC_EVEX_L_XD_KZ, /* 5031 */ IC_EVEX_L_W_KZ, /* 5032 */ IC_EVEX_L_W_KZ, /* 5033 */ IC_EVEX_L_W_XS_KZ, /* 5034 */ IC_EVEX_L_W_XS_KZ, /* 5035 */ IC_EVEX_L_W_XD_KZ, /* 5036 */ IC_EVEX_L_W_XD_KZ, /* 5037 */ IC_EVEX_L_W_XD_KZ, /* 5038 */ IC_EVEX_L_W_XD_KZ, /* 5039 */ IC_EVEX_L_OPSIZE_KZ, /* 5040 */ IC_EVEX_L_OPSIZE_KZ, /* 5041 */ IC_EVEX_L_OPSIZE_KZ, /* 5042 */ IC_EVEX_L_OPSIZE_KZ, /* 5043 */ IC_EVEX_L_OPSIZE_KZ, /* 5044 */ IC_EVEX_L_OPSIZE_KZ, /* 5045 */ IC_EVEX_L_OPSIZE_KZ, /* 5046 */ IC_EVEX_L_OPSIZE_KZ, /* 5047 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5048 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5049 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5050 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5051 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5052 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5053 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5054 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5055 */ IC_EVEX_L_KZ, /* 5056 */ IC_EVEX_L_KZ, /* 5057 */ IC_EVEX_L_XS_KZ, /* 5058 */ IC_EVEX_L_XS_KZ, /* 5059 */ IC_EVEX_L_XD_KZ, /* 5060 */ IC_EVEX_L_XD_KZ, /* 5061 */ IC_EVEX_L_XD_KZ, /* 5062 */ IC_EVEX_L_XD_KZ, /* 5063 */ IC_EVEX_L_W_KZ, /* 5064 */ IC_EVEX_L_W_KZ, /* 5065 */ IC_EVEX_L_W_XS_KZ, /* 5066 */ IC_EVEX_L_W_XS_KZ, /* 5067 */ IC_EVEX_L_W_XD_KZ, /* 5068 */ IC_EVEX_L_W_XD_KZ, /* 5069 */ IC_EVEX_L_W_XD_KZ, /* 5070 */ IC_EVEX_L_W_XD_KZ, /* 5071 */ IC_EVEX_L_OPSIZE_KZ, /* 5072 */ IC_EVEX_L_OPSIZE_KZ, /* 5073 */ IC_EVEX_L_OPSIZE_KZ, /* 5074 */ IC_EVEX_L_OPSIZE_KZ, /* 5075 */ IC_EVEX_L_OPSIZE_KZ, /* 5076 */ IC_EVEX_L_OPSIZE_KZ, /* 5077 */ IC_EVEX_L_OPSIZE_KZ, /* 5078 */ IC_EVEX_L_OPSIZE_KZ, /* 5079 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5080 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5081 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5082 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5083 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5084 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5085 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5086 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5087 */ IC_EVEX_L_KZ, /* 5088 */ IC_EVEX_L_KZ, /* 5089 */ IC_EVEX_L_XS_KZ, /* 5090 */ IC_EVEX_L_XS_KZ, /* 5091 */ IC_EVEX_L_XD_KZ, /* 5092 */ IC_EVEX_L_XD_KZ, /* 5093 */ IC_EVEX_L_XD_KZ, /* 5094 */ IC_EVEX_L_XD_KZ, /* 5095 */ IC_EVEX_L_W_KZ, /* 5096 */ IC_EVEX_L_W_KZ, /* 5097 */ IC_EVEX_L_W_XS_KZ, /* 5098 */ IC_EVEX_L_W_XS_KZ, /* 5099 */ IC_EVEX_L_W_XD_KZ, /* 5100 */ IC_EVEX_L_W_XD_KZ, /* 5101 */ IC_EVEX_L_W_XD_KZ, /* 5102 */ IC_EVEX_L_W_XD_KZ, /* 5103 */ IC_EVEX_L_OPSIZE_KZ, /* 5104 */ IC_EVEX_L_OPSIZE_KZ, /* 5105 */ IC_EVEX_L_OPSIZE_KZ, /* 5106 */ IC_EVEX_L_OPSIZE_KZ, /* 5107 */ IC_EVEX_L_OPSIZE_KZ, /* 5108 */ IC_EVEX_L_OPSIZE_KZ, /* 5109 */ IC_EVEX_L_OPSIZE_KZ, /* 5110 */ IC_EVEX_L_OPSIZE_KZ, /* 5111 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5112 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5113 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5114 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5115 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5116 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5117 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5118 */ IC_EVEX_L_W_OPSIZE_KZ, /* 5119 */ IC, /* 5120 */ IC_64BIT, /* 5121 */ IC_XS, /* 5122 */ IC_64BIT_XS, /* 5123 */ IC_XD, /* 5124 */ IC_64BIT_XD, /* 5125 */ IC_XS, /* 5126 */ IC_64BIT_XS, /* 5127 */ IC, /* 5128 */ IC_64BIT_REXW, /* 5129 */ IC_XS, /* 5130 */ IC_64BIT_REXW_XS, /* 5131 */ IC_XD, /* 5132 */ IC_64BIT_REXW_XD, /* 5133 */ IC_XS, /* 5134 */ IC_64BIT_REXW_XS, /* 5135 */ IC_OPSIZE, /* 5136 */ IC_64BIT_OPSIZE, /* 5137 */ IC_XS_OPSIZE, /* 5138 */ IC_64BIT_XS_OPSIZE, /* 5139 */ IC_XD_OPSIZE, /* 5140 */ IC_64BIT_XD_OPSIZE, /* 5141 */ IC_XS_OPSIZE, /* 5142 */ IC_64BIT_XD_OPSIZE, /* 5143 */ IC_OPSIZE, /* 5144 */ IC_64BIT_REXW_OPSIZE, /* 5145 */ IC_XS_OPSIZE, /* 5146 */ IC_64BIT_REXW_XS, /* 5147 */ IC_XD_OPSIZE, /* 5148 */ IC_64BIT_REXW_XD, /* 5149 */ IC_XS_OPSIZE, /* 5150 */ IC_64BIT_REXW_XS, /* 5151 */ IC_ADSIZE, /* 5152 */ IC_64BIT_ADSIZE, /* 5153 */ IC_XS, /* 5154 */ IC_64BIT_XS, /* 5155 */ IC_XD, /* 5156 */ IC_64BIT_XD, /* 5157 */ IC_XS, /* 5158 */ IC_64BIT_XS, /* 5159 */ IC_ADSIZE, /* 5160 */ IC_64BIT_REXW_ADSIZE, /* 5161 */ IC_XS, /* 5162 */ IC_64BIT_REXW_XS, /* 5163 */ IC_XD, /* 5164 */ IC_64BIT_REXW_XD, /* 5165 */ IC_XS, /* 5166 */ IC_64BIT_REXW_XS, /* 5167 */ IC_OPSIZE_ADSIZE, /* 5168 */ IC_64BIT_OPSIZE_ADSIZE, /* 5169 */ IC_XS_OPSIZE, /* 5170 */ IC_64BIT_XS_OPSIZE, /* 5171 */ IC_XD_OPSIZE, /* 5172 */ IC_64BIT_XD_OPSIZE, /* 5173 */ IC_XS_OPSIZE, /* 5174 */ IC_64BIT_XD_OPSIZE, /* 5175 */ IC_OPSIZE_ADSIZE, /* 5176 */ IC_64BIT_REXW_OPSIZE, /* 5177 */ IC_XS_OPSIZE, /* 5178 */ IC_64BIT_REXW_XS, /* 5179 */ IC_XD_OPSIZE, /* 5180 */ IC_64BIT_REXW_XD, /* 5181 */ IC_XS_OPSIZE, /* 5182 */ IC_64BIT_REXW_XS, /* 5183 */ IC_VEX, /* 5184 */ IC_VEX, /* 5185 */ IC_VEX_XS, /* 5186 */ IC_VEX_XS, /* 5187 */ IC_VEX_XD, /* 5188 */ IC_VEX_XD, /* 5189 */ IC_VEX_XD, /* 5190 */ IC_VEX_XD, /* 5191 */ IC_VEX_W, /* 5192 */ IC_VEX_W, /* 5193 */ IC_VEX_W_XS, /* 5194 */ IC_VEX_W_XS, /* 5195 */ IC_VEX_W_XD, /* 5196 */ IC_VEX_W_XD, /* 5197 */ IC_VEX_W_XD, /* 5198 */ IC_VEX_W_XD, /* 5199 */ IC_VEX_OPSIZE, /* 5200 */ IC_VEX_OPSIZE, /* 5201 */ IC_VEX_OPSIZE, /* 5202 */ IC_VEX_OPSIZE, /* 5203 */ IC_VEX_OPSIZE, /* 5204 */ IC_VEX_OPSIZE, /* 5205 */ IC_VEX_OPSIZE, /* 5206 */ IC_VEX_OPSIZE, /* 5207 */ IC_VEX_W_OPSIZE, /* 5208 */ IC_VEX_W_OPSIZE, /* 5209 */ IC_VEX_W_OPSIZE, /* 5210 */ IC_VEX_W_OPSIZE, /* 5211 */ IC_VEX_W_OPSIZE, /* 5212 */ IC_VEX_W_OPSIZE, /* 5213 */ IC_VEX_W_OPSIZE, /* 5214 */ IC_VEX_W_OPSIZE, /* 5215 */ IC_VEX, /* 5216 */ IC_VEX, /* 5217 */ IC_VEX_XS, /* 5218 */ IC_VEX_XS, /* 5219 */ IC_VEX_XD, /* 5220 */ IC_VEX_XD, /* 5221 */ IC_VEX_XD, /* 5222 */ IC_VEX_XD, /* 5223 */ IC_VEX_W, /* 5224 */ IC_VEX_W, /* 5225 */ IC_VEX_W_XS, /* 5226 */ IC_VEX_W_XS, /* 5227 */ IC_VEX_W_XD, /* 5228 */ IC_VEX_W_XD, /* 5229 */ IC_VEX_W_XD, /* 5230 */ IC_VEX_W_XD, /* 5231 */ IC_VEX_OPSIZE, /* 5232 */ IC_VEX_OPSIZE, /* 5233 */ IC_VEX_OPSIZE, /* 5234 */ IC_VEX_OPSIZE, /* 5235 */ IC_VEX_OPSIZE, /* 5236 */ IC_VEX_OPSIZE, /* 5237 */ IC_VEX_OPSIZE, /* 5238 */ IC_VEX_OPSIZE, /* 5239 */ IC_VEX_W_OPSIZE, /* 5240 */ IC_VEX_W_OPSIZE, /* 5241 */ IC_VEX_W_OPSIZE, /* 5242 */ IC_VEX_W_OPSIZE, /* 5243 */ IC_VEX_W_OPSIZE, /* 5244 */ IC_VEX_W_OPSIZE, /* 5245 */ IC_VEX_W_OPSIZE, /* 5246 */ IC_VEX_W_OPSIZE, /* 5247 */ IC_VEX_L, /* 5248 */ IC_VEX_L, /* 5249 */ IC_VEX_L_XS, /* 5250 */ IC_VEX_L_XS, /* 5251 */ IC_VEX_L_XD, /* 5252 */ IC_VEX_L_XD, /* 5253 */ IC_VEX_L_XD, /* 5254 */ IC_VEX_L_XD, /* 5255 */ IC_VEX_L_W, /* 5256 */ IC_VEX_L_W, /* 5257 */ IC_VEX_L_W_XS, /* 5258 */ IC_VEX_L_W_XS, /* 5259 */ IC_VEX_L_W_XD, /* 5260 */ IC_VEX_L_W_XD, /* 5261 */ IC_VEX_L_W_XD, /* 5262 */ IC_VEX_L_W_XD, /* 5263 */ IC_VEX_L_OPSIZE, /* 5264 */ IC_VEX_L_OPSIZE, /* 5265 */ IC_VEX_L_OPSIZE, /* 5266 */ IC_VEX_L_OPSIZE, /* 5267 */ IC_VEX_L_OPSIZE, /* 5268 */ IC_VEX_L_OPSIZE, /* 5269 */ IC_VEX_L_OPSIZE, /* 5270 */ IC_VEX_L_OPSIZE, /* 5271 */ IC_VEX_L_W_OPSIZE, /* 5272 */ IC_VEX_L_W_OPSIZE, /* 5273 */ IC_VEX_L_W_OPSIZE, /* 5274 */ IC_VEX_L_W_OPSIZE, /* 5275 */ IC_VEX_L_W_OPSIZE, /* 5276 */ IC_VEX_L_W_OPSIZE, /* 5277 */ IC_VEX_L_W_OPSIZE, /* 5278 */ IC_VEX_L_W_OPSIZE, /* 5279 */ IC_VEX_L, /* 5280 */ IC_VEX_L, /* 5281 */ IC_VEX_L_XS, /* 5282 */ IC_VEX_L_XS, /* 5283 */ IC_VEX_L_XD, /* 5284 */ IC_VEX_L_XD, /* 5285 */ IC_VEX_L_XD, /* 5286 */ IC_VEX_L_XD, /* 5287 */ IC_VEX_L_W, /* 5288 */ IC_VEX_L_W, /* 5289 */ IC_VEX_L_W_XS, /* 5290 */ IC_VEX_L_W_XS, /* 5291 */ IC_VEX_L_W_XD, /* 5292 */ IC_VEX_L_W_XD, /* 5293 */ IC_VEX_L_W_XD, /* 5294 */ IC_VEX_L_W_XD, /* 5295 */ IC_VEX_L_OPSIZE, /* 5296 */ IC_VEX_L_OPSIZE, /* 5297 */ IC_VEX_L_OPSIZE, /* 5298 */ IC_VEX_L_OPSIZE, /* 5299 */ IC_VEX_L_OPSIZE, /* 5300 */ IC_VEX_L_OPSIZE, /* 5301 */ IC_VEX_L_OPSIZE, /* 5302 */ IC_VEX_L_OPSIZE, /* 5303 */ IC_VEX_L_W_OPSIZE, /* 5304 */ IC_VEX_L_W_OPSIZE, /* 5305 */ IC_VEX_L_W_OPSIZE, /* 5306 */ IC_VEX_L_W_OPSIZE, /* 5307 */ IC_VEX_L_W_OPSIZE, /* 5308 */ IC_VEX_L_W_OPSIZE, /* 5309 */ IC_VEX_L_W_OPSIZE, /* 5310 */ IC_VEX_L_W_OPSIZE, /* 5311 */ IC_VEX_L, /* 5312 */ IC_VEX_L, /* 5313 */ IC_VEX_L_XS, /* 5314 */ IC_VEX_L_XS, /* 5315 */ IC_VEX_L_XD, /* 5316 */ IC_VEX_L_XD, /* 5317 */ IC_VEX_L_XD, /* 5318 */ IC_VEX_L_XD, /* 5319 */ IC_VEX_L_W, /* 5320 */ IC_VEX_L_W, /* 5321 */ IC_VEX_L_W_XS, /* 5322 */ IC_VEX_L_W_XS, /* 5323 */ IC_VEX_L_W_XD, /* 5324 */ IC_VEX_L_W_XD, /* 5325 */ IC_VEX_L_W_XD, /* 5326 */ IC_VEX_L_W_XD, /* 5327 */ IC_VEX_L_OPSIZE, /* 5328 */ IC_VEX_L_OPSIZE, /* 5329 */ IC_VEX_L_OPSIZE, /* 5330 */ IC_VEX_L_OPSIZE, /* 5331 */ IC_VEX_L_OPSIZE, /* 5332 */ IC_VEX_L_OPSIZE, /* 5333 */ IC_VEX_L_OPSIZE, /* 5334 */ IC_VEX_L_OPSIZE, /* 5335 */ IC_VEX_L_W_OPSIZE, /* 5336 */ IC_VEX_L_W_OPSIZE, /* 5337 */ IC_VEX_L_W_OPSIZE, /* 5338 */ IC_VEX_L_W_OPSIZE, /* 5339 */ IC_VEX_L_W_OPSIZE, /* 5340 */ IC_VEX_L_W_OPSIZE, /* 5341 */ IC_VEX_L_W_OPSIZE, /* 5342 */ IC_VEX_L_W_OPSIZE, /* 5343 */ IC_VEX_L, /* 5344 */ IC_VEX_L, /* 5345 */ IC_VEX_L_XS, /* 5346 */ IC_VEX_L_XS, /* 5347 */ IC_VEX_L_XD, /* 5348 */ IC_VEX_L_XD, /* 5349 */ IC_VEX_L_XD, /* 5350 */ IC_VEX_L_XD, /* 5351 */ IC_VEX_L_W, /* 5352 */ IC_VEX_L_W, /* 5353 */ IC_VEX_L_W_XS, /* 5354 */ IC_VEX_L_W_XS, /* 5355 */ IC_VEX_L_W_XD, /* 5356 */ IC_VEX_L_W_XD, /* 5357 */ IC_VEX_L_W_XD, /* 5358 */ IC_VEX_L_W_XD, /* 5359 */ IC_VEX_L_OPSIZE, /* 5360 */ IC_VEX_L_OPSIZE, /* 5361 */ IC_VEX_L_OPSIZE, /* 5362 */ IC_VEX_L_OPSIZE, /* 5363 */ IC_VEX_L_OPSIZE, /* 5364 */ IC_VEX_L_OPSIZE, /* 5365 */ IC_VEX_L_OPSIZE, /* 5366 */ IC_VEX_L_OPSIZE, /* 5367 */ IC_VEX_L_W_OPSIZE, /* 5368 */ IC_VEX_L_W_OPSIZE, /* 5369 */ IC_VEX_L_W_OPSIZE, /* 5370 */ IC_VEX_L_W_OPSIZE, /* 5371 */ IC_VEX_L_W_OPSIZE, /* 5372 */ IC_VEX_L_W_OPSIZE, /* 5373 */ IC_VEX_L_W_OPSIZE, /* 5374 */ IC_VEX_L_W_OPSIZE, /* 5375 */ IC_EVEX_L2_KZ, /* 5376 */ IC_EVEX_L2_KZ, /* 5377 */ IC_EVEX_L2_XS_KZ, /* 5378 */ IC_EVEX_L2_XS_KZ, /* 5379 */ IC_EVEX_L2_XD_KZ, /* 5380 */ IC_EVEX_L2_XD_KZ, /* 5381 */ IC_EVEX_L2_XD_KZ, /* 5382 */ IC_EVEX_L2_XD_KZ, /* 5383 */ IC_EVEX_L2_W_KZ, /* 5384 */ IC_EVEX_L2_W_KZ, /* 5385 */ IC_EVEX_L2_W_XS_KZ, /* 5386 */ IC_EVEX_L2_W_XS_KZ, /* 5387 */ IC_EVEX_L2_W_XD_KZ, /* 5388 */ IC_EVEX_L2_W_XD_KZ, /* 5389 */ IC_EVEX_L2_W_XD_KZ, /* 5390 */ IC_EVEX_L2_W_XD_KZ, /* 5391 */ IC_EVEX_L2_OPSIZE_KZ, /* 5392 */ IC_EVEX_L2_OPSIZE_KZ, /* 5393 */ IC_EVEX_L2_OPSIZE_KZ, /* 5394 */ IC_EVEX_L2_OPSIZE_KZ, /* 5395 */ IC_EVEX_L2_OPSIZE_KZ, /* 5396 */ IC_EVEX_L2_OPSIZE_KZ, /* 5397 */ IC_EVEX_L2_OPSIZE_KZ, /* 5398 */ IC_EVEX_L2_OPSIZE_KZ, /* 5399 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5400 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5401 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5402 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5403 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5404 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5405 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5406 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5407 */ IC_EVEX_L2_KZ, /* 5408 */ IC_EVEX_L2_KZ, /* 5409 */ IC_EVEX_L2_XS_KZ, /* 5410 */ IC_EVEX_L2_XS_KZ, /* 5411 */ IC_EVEX_L2_XD_KZ, /* 5412 */ IC_EVEX_L2_XD_KZ, /* 5413 */ IC_EVEX_L2_XD_KZ, /* 5414 */ IC_EVEX_L2_XD_KZ, /* 5415 */ IC_EVEX_L2_W_KZ, /* 5416 */ IC_EVEX_L2_W_KZ, /* 5417 */ IC_EVEX_L2_W_XS_KZ, /* 5418 */ IC_EVEX_L2_W_XS_KZ, /* 5419 */ IC_EVEX_L2_W_XD_KZ, /* 5420 */ IC_EVEX_L2_W_XD_KZ, /* 5421 */ IC_EVEX_L2_W_XD_KZ, /* 5422 */ IC_EVEX_L2_W_XD_KZ, /* 5423 */ IC_EVEX_L2_OPSIZE_KZ, /* 5424 */ IC_EVEX_L2_OPSIZE_KZ, /* 5425 */ IC_EVEX_L2_OPSIZE_KZ, /* 5426 */ IC_EVEX_L2_OPSIZE_KZ, /* 5427 */ IC_EVEX_L2_OPSIZE_KZ, /* 5428 */ IC_EVEX_L2_OPSIZE_KZ, /* 5429 */ IC_EVEX_L2_OPSIZE_KZ, /* 5430 */ IC_EVEX_L2_OPSIZE_KZ, /* 5431 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5432 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5433 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5434 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5435 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5436 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5437 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5438 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5439 */ IC_EVEX_L2_KZ, /* 5440 */ IC_EVEX_L2_KZ, /* 5441 */ IC_EVEX_L2_XS_KZ, /* 5442 */ IC_EVEX_L2_XS_KZ, /* 5443 */ IC_EVEX_L2_XD_KZ, /* 5444 */ IC_EVEX_L2_XD_KZ, /* 5445 */ IC_EVEX_L2_XD_KZ, /* 5446 */ IC_EVEX_L2_XD_KZ, /* 5447 */ IC_EVEX_L2_W_KZ, /* 5448 */ IC_EVEX_L2_W_KZ, /* 5449 */ IC_EVEX_L2_W_XS_KZ, /* 5450 */ IC_EVEX_L2_W_XS_KZ, /* 5451 */ IC_EVEX_L2_W_XD_KZ, /* 5452 */ IC_EVEX_L2_W_XD_KZ, /* 5453 */ IC_EVEX_L2_W_XD_KZ, /* 5454 */ IC_EVEX_L2_W_XD_KZ, /* 5455 */ IC_EVEX_L2_OPSIZE_KZ, /* 5456 */ IC_EVEX_L2_OPSIZE_KZ, /* 5457 */ IC_EVEX_L2_OPSIZE_KZ, /* 5458 */ IC_EVEX_L2_OPSIZE_KZ, /* 5459 */ IC_EVEX_L2_OPSIZE_KZ, /* 5460 */ IC_EVEX_L2_OPSIZE_KZ, /* 5461 */ IC_EVEX_L2_OPSIZE_KZ, /* 5462 */ IC_EVEX_L2_OPSIZE_KZ, /* 5463 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5464 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5465 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5466 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5467 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5468 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5469 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5470 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5471 */ IC_EVEX_L2_KZ, /* 5472 */ IC_EVEX_L2_KZ, /* 5473 */ IC_EVEX_L2_XS_KZ, /* 5474 */ IC_EVEX_L2_XS_KZ, /* 5475 */ IC_EVEX_L2_XD_KZ, /* 5476 */ IC_EVEX_L2_XD_KZ, /* 5477 */ IC_EVEX_L2_XD_KZ, /* 5478 */ IC_EVEX_L2_XD_KZ, /* 5479 */ IC_EVEX_L2_W_KZ, /* 5480 */ IC_EVEX_L2_W_KZ, /* 5481 */ IC_EVEX_L2_W_XS_KZ, /* 5482 */ IC_EVEX_L2_W_XS_KZ, /* 5483 */ IC_EVEX_L2_W_XD_KZ, /* 5484 */ IC_EVEX_L2_W_XD_KZ, /* 5485 */ IC_EVEX_L2_W_XD_KZ, /* 5486 */ IC_EVEX_L2_W_XD_KZ, /* 5487 */ IC_EVEX_L2_OPSIZE_KZ, /* 5488 */ IC_EVEX_L2_OPSIZE_KZ, /* 5489 */ IC_EVEX_L2_OPSIZE_KZ, /* 5490 */ IC_EVEX_L2_OPSIZE_KZ, /* 5491 */ IC_EVEX_L2_OPSIZE_KZ, /* 5492 */ IC_EVEX_L2_OPSIZE_KZ, /* 5493 */ IC_EVEX_L2_OPSIZE_KZ, /* 5494 */ IC_EVEX_L2_OPSIZE_KZ, /* 5495 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5496 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5497 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5498 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5499 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5500 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5501 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5502 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5503 */ IC_EVEX_L2_KZ, /* 5504 */ IC_EVEX_L2_KZ, /* 5505 */ IC_EVEX_L2_XS_KZ, /* 5506 */ IC_EVEX_L2_XS_KZ, /* 5507 */ IC_EVEX_L2_XD_KZ, /* 5508 */ IC_EVEX_L2_XD_KZ, /* 5509 */ IC_EVEX_L2_XD_KZ, /* 5510 */ IC_EVEX_L2_XD_KZ, /* 5511 */ IC_EVEX_L2_W_KZ, /* 5512 */ IC_EVEX_L2_W_KZ, /* 5513 */ IC_EVEX_L2_W_XS_KZ, /* 5514 */ IC_EVEX_L2_W_XS_KZ, /* 5515 */ IC_EVEX_L2_W_XD_KZ, /* 5516 */ IC_EVEX_L2_W_XD_KZ, /* 5517 */ IC_EVEX_L2_W_XD_KZ, /* 5518 */ IC_EVEX_L2_W_XD_KZ, /* 5519 */ IC_EVEX_L2_OPSIZE_KZ, /* 5520 */ IC_EVEX_L2_OPSIZE_KZ, /* 5521 */ IC_EVEX_L2_OPSIZE_KZ, /* 5522 */ IC_EVEX_L2_OPSIZE_KZ, /* 5523 */ IC_EVEX_L2_OPSIZE_KZ, /* 5524 */ IC_EVEX_L2_OPSIZE_KZ, /* 5525 */ IC_EVEX_L2_OPSIZE_KZ, /* 5526 */ IC_EVEX_L2_OPSIZE_KZ, /* 5527 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5528 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5529 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5530 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5531 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5532 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5533 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5534 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5535 */ IC_EVEX_L2_KZ, /* 5536 */ IC_EVEX_L2_KZ, /* 5537 */ IC_EVEX_L2_XS_KZ, /* 5538 */ IC_EVEX_L2_XS_KZ, /* 5539 */ IC_EVEX_L2_XD_KZ, /* 5540 */ IC_EVEX_L2_XD_KZ, /* 5541 */ IC_EVEX_L2_XD_KZ, /* 5542 */ IC_EVEX_L2_XD_KZ, /* 5543 */ IC_EVEX_L2_W_KZ, /* 5544 */ IC_EVEX_L2_W_KZ, /* 5545 */ IC_EVEX_L2_W_XS_KZ, /* 5546 */ IC_EVEX_L2_W_XS_KZ, /* 5547 */ IC_EVEX_L2_W_XD_KZ, /* 5548 */ IC_EVEX_L2_W_XD_KZ, /* 5549 */ IC_EVEX_L2_W_XD_KZ, /* 5550 */ IC_EVEX_L2_W_XD_KZ, /* 5551 */ IC_EVEX_L2_OPSIZE_KZ, /* 5552 */ IC_EVEX_L2_OPSIZE_KZ, /* 5553 */ IC_EVEX_L2_OPSIZE_KZ, /* 5554 */ IC_EVEX_L2_OPSIZE_KZ, /* 5555 */ IC_EVEX_L2_OPSIZE_KZ, /* 5556 */ IC_EVEX_L2_OPSIZE_KZ, /* 5557 */ IC_EVEX_L2_OPSIZE_KZ, /* 5558 */ IC_EVEX_L2_OPSIZE_KZ, /* 5559 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5560 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5561 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5562 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5563 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5564 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5565 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5566 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5567 */ IC_EVEX_L2_KZ, /* 5568 */ IC_EVEX_L2_KZ, /* 5569 */ IC_EVEX_L2_XS_KZ, /* 5570 */ IC_EVEX_L2_XS_KZ, /* 5571 */ IC_EVEX_L2_XD_KZ, /* 5572 */ IC_EVEX_L2_XD_KZ, /* 5573 */ IC_EVEX_L2_XD_KZ, /* 5574 */ IC_EVEX_L2_XD_KZ, /* 5575 */ IC_EVEX_L2_W_KZ, /* 5576 */ IC_EVEX_L2_W_KZ, /* 5577 */ IC_EVEX_L2_W_XS_KZ, /* 5578 */ IC_EVEX_L2_W_XS_KZ, /* 5579 */ IC_EVEX_L2_W_XD_KZ, /* 5580 */ IC_EVEX_L2_W_XD_KZ, /* 5581 */ IC_EVEX_L2_W_XD_KZ, /* 5582 */ IC_EVEX_L2_W_XD_KZ, /* 5583 */ IC_EVEX_L2_OPSIZE_KZ, /* 5584 */ IC_EVEX_L2_OPSIZE_KZ, /* 5585 */ IC_EVEX_L2_OPSIZE_KZ, /* 5586 */ IC_EVEX_L2_OPSIZE_KZ, /* 5587 */ IC_EVEX_L2_OPSIZE_KZ, /* 5588 */ IC_EVEX_L2_OPSIZE_KZ, /* 5589 */ IC_EVEX_L2_OPSIZE_KZ, /* 5590 */ IC_EVEX_L2_OPSIZE_KZ, /* 5591 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5592 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5593 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5594 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5595 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5596 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5597 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5598 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5599 */ IC_EVEX_L2_KZ, /* 5600 */ IC_EVEX_L2_KZ, /* 5601 */ IC_EVEX_L2_XS_KZ, /* 5602 */ IC_EVEX_L2_XS_KZ, /* 5603 */ IC_EVEX_L2_XD_KZ, /* 5604 */ IC_EVEX_L2_XD_KZ, /* 5605 */ IC_EVEX_L2_XD_KZ, /* 5606 */ IC_EVEX_L2_XD_KZ, /* 5607 */ IC_EVEX_L2_W_KZ, /* 5608 */ IC_EVEX_L2_W_KZ, /* 5609 */ IC_EVEX_L2_W_XS_KZ, /* 5610 */ IC_EVEX_L2_W_XS_KZ, /* 5611 */ IC_EVEX_L2_W_XD_KZ, /* 5612 */ IC_EVEX_L2_W_XD_KZ, /* 5613 */ IC_EVEX_L2_W_XD_KZ, /* 5614 */ IC_EVEX_L2_W_XD_KZ, /* 5615 */ IC_EVEX_L2_OPSIZE_KZ, /* 5616 */ IC_EVEX_L2_OPSIZE_KZ, /* 5617 */ IC_EVEX_L2_OPSIZE_KZ, /* 5618 */ IC_EVEX_L2_OPSIZE_KZ, /* 5619 */ IC_EVEX_L2_OPSIZE_KZ, /* 5620 */ IC_EVEX_L2_OPSIZE_KZ, /* 5621 */ IC_EVEX_L2_OPSIZE_KZ, /* 5622 */ IC_EVEX_L2_OPSIZE_KZ, /* 5623 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5624 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5625 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5626 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5627 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5628 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5629 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5630 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5631 */ IC, /* 5632 */ IC_64BIT, /* 5633 */ IC_XS, /* 5634 */ IC_64BIT_XS, /* 5635 */ IC_XD, /* 5636 */ IC_64BIT_XD, /* 5637 */ IC_XS, /* 5638 */ IC_64BIT_XS, /* 5639 */ IC, /* 5640 */ IC_64BIT_REXW, /* 5641 */ IC_XS, /* 5642 */ IC_64BIT_REXW_XS, /* 5643 */ IC_XD, /* 5644 */ IC_64BIT_REXW_XD, /* 5645 */ IC_XS, /* 5646 */ IC_64BIT_REXW_XS, /* 5647 */ IC_OPSIZE, /* 5648 */ IC_64BIT_OPSIZE, /* 5649 */ IC_XS_OPSIZE, /* 5650 */ IC_64BIT_XS_OPSIZE, /* 5651 */ IC_XD_OPSIZE, /* 5652 */ IC_64BIT_XD_OPSIZE, /* 5653 */ IC_XS_OPSIZE, /* 5654 */ IC_64BIT_XD_OPSIZE, /* 5655 */ IC_OPSIZE, /* 5656 */ IC_64BIT_REXW_OPSIZE, /* 5657 */ IC_XS_OPSIZE, /* 5658 */ IC_64BIT_REXW_XS, /* 5659 */ IC_XD_OPSIZE, /* 5660 */ IC_64BIT_REXW_XD, /* 5661 */ IC_XS_OPSIZE, /* 5662 */ IC_64BIT_REXW_XS, /* 5663 */ IC_ADSIZE, /* 5664 */ IC_64BIT_ADSIZE, /* 5665 */ IC_XS, /* 5666 */ IC_64BIT_XS, /* 5667 */ IC_XD, /* 5668 */ IC_64BIT_XD, /* 5669 */ IC_XS, /* 5670 */ IC_64BIT_XS, /* 5671 */ IC_ADSIZE, /* 5672 */ IC_64BIT_REXW_ADSIZE, /* 5673 */ IC_XS, /* 5674 */ IC_64BIT_REXW_XS, /* 5675 */ IC_XD, /* 5676 */ IC_64BIT_REXW_XD, /* 5677 */ IC_XS, /* 5678 */ IC_64BIT_REXW_XS, /* 5679 */ IC_OPSIZE_ADSIZE, /* 5680 */ IC_64BIT_OPSIZE_ADSIZE, /* 5681 */ IC_XS_OPSIZE, /* 5682 */ IC_64BIT_XS_OPSIZE, /* 5683 */ IC_XD_OPSIZE, /* 5684 */ IC_64BIT_XD_OPSIZE, /* 5685 */ IC_XS_OPSIZE, /* 5686 */ IC_64BIT_XD_OPSIZE, /* 5687 */ IC_OPSIZE_ADSIZE, /* 5688 */ IC_64BIT_REXW_OPSIZE, /* 5689 */ IC_XS_OPSIZE, /* 5690 */ IC_64BIT_REXW_XS, /* 5691 */ IC_XD_OPSIZE, /* 5692 */ IC_64BIT_REXW_XD, /* 5693 */ IC_XS_OPSIZE, /* 5694 */ IC_64BIT_REXW_XS, /* 5695 */ IC_VEX, /* 5696 */ IC_VEX, /* 5697 */ IC_VEX_XS, /* 5698 */ IC_VEX_XS, /* 5699 */ IC_VEX_XD, /* 5700 */ IC_VEX_XD, /* 5701 */ IC_VEX_XD, /* 5702 */ IC_VEX_XD, /* 5703 */ IC_VEX_W, /* 5704 */ IC_VEX_W, /* 5705 */ IC_VEX_W_XS, /* 5706 */ IC_VEX_W_XS, /* 5707 */ IC_VEX_W_XD, /* 5708 */ IC_VEX_W_XD, /* 5709 */ IC_VEX_W_XD, /* 5710 */ IC_VEX_W_XD, /* 5711 */ IC_VEX_OPSIZE, /* 5712 */ IC_VEX_OPSIZE, /* 5713 */ IC_VEX_OPSIZE, /* 5714 */ IC_VEX_OPSIZE, /* 5715 */ IC_VEX_OPSIZE, /* 5716 */ IC_VEX_OPSIZE, /* 5717 */ IC_VEX_OPSIZE, /* 5718 */ IC_VEX_OPSIZE, /* 5719 */ IC_VEX_W_OPSIZE, /* 5720 */ IC_VEX_W_OPSIZE, /* 5721 */ IC_VEX_W_OPSIZE, /* 5722 */ IC_VEX_W_OPSIZE, /* 5723 */ IC_VEX_W_OPSIZE, /* 5724 */ IC_VEX_W_OPSIZE, /* 5725 */ IC_VEX_W_OPSIZE, /* 5726 */ IC_VEX_W_OPSIZE, /* 5727 */ IC_VEX, /* 5728 */ IC_VEX, /* 5729 */ IC_VEX_XS, /* 5730 */ IC_VEX_XS, /* 5731 */ IC_VEX_XD, /* 5732 */ IC_VEX_XD, /* 5733 */ IC_VEX_XD, /* 5734 */ IC_VEX_XD, /* 5735 */ IC_VEX_W, /* 5736 */ IC_VEX_W, /* 5737 */ IC_VEX_W_XS, /* 5738 */ IC_VEX_W_XS, /* 5739 */ IC_VEX_W_XD, /* 5740 */ IC_VEX_W_XD, /* 5741 */ IC_VEX_W_XD, /* 5742 */ IC_VEX_W_XD, /* 5743 */ IC_VEX_OPSIZE, /* 5744 */ IC_VEX_OPSIZE, /* 5745 */ IC_VEX_OPSIZE, /* 5746 */ IC_VEX_OPSIZE, /* 5747 */ IC_VEX_OPSIZE, /* 5748 */ IC_VEX_OPSIZE, /* 5749 */ IC_VEX_OPSIZE, /* 5750 */ IC_VEX_OPSIZE, /* 5751 */ IC_VEX_W_OPSIZE, /* 5752 */ IC_VEX_W_OPSIZE, /* 5753 */ IC_VEX_W_OPSIZE, /* 5754 */ IC_VEX_W_OPSIZE, /* 5755 */ IC_VEX_W_OPSIZE, /* 5756 */ IC_VEX_W_OPSIZE, /* 5757 */ IC_VEX_W_OPSIZE, /* 5758 */ IC_VEX_W_OPSIZE, /* 5759 */ IC_VEX_L, /* 5760 */ IC_VEX_L, /* 5761 */ IC_VEX_L_XS, /* 5762 */ IC_VEX_L_XS, /* 5763 */ IC_VEX_L_XD, /* 5764 */ IC_VEX_L_XD, /* 5765 */ IC_VEX_L_XD, /* 5766 */ IC_VEX_L_XD, /* 5767 */ IC_VEX_L_W, /* 5768 */ IC_VEX_L_W, /* 5769 */ IC_VEX_L_W_XS, /* 5770 */ IC_VEX_L_W_XS, /* 5771 */ IC_VEX_L_W_XD, /* 5772 */ IC_VEX_L_W_XD, /* 5773 */ IC_VEX_L_W_XD, /* 5774 */ IC_VEX_L_W_XD, /* 5775 */ IC_VEX_L_OPSIZE, /* 5776 */ IC_VEX_L_OPSIZE, /* 5777 */ IC_VEX_L_OPSIZE, /* 5778 */ IC_VEX_L_OPSIZE, /* 5779 */ IC_VEX_L_OPSIZE, /* 5780 */ IC_VEX_L_OPSIZE, /* 5781 */ IC_VEX_L_OPSIZE, /* 5782 */ IC_VEX_L_OPSIZE, /* 5783 */ IC_VEX_L_W_OPSIZE, /* 5784 */ IC_VEX_L_W_OPSIZE, /* 5785 */ IC_VEX_L_W_OPSIZE, /* 5786 */ IC_VEX_L_W_OPSIZE, /* 5787 */ IC_VEX_L_W_OPSIZE, /* 5788 */ IC_VEX_L_W_OPSIZE, /* 5789 */ IC_VEX_L_W_OPSIZE, /* 5790 */ IC_VEX_L_W_OPSIZE, /* 5791 */ IC_VEX_L, /* 5792 */ IC_VEX_L, /* 5793 */ IC_VEX_L_XS, /* 5794 */ IC_VEX_L_XS, /* 5795 */ IC_VEX_L_XD, /* 5796 */ IC_VEX_L_XD, /* 5797 */ IC_VEX_L_XD, /* 5798 */ IC_VEX_L_XD, /* 5799 */ IC_VEX_L_W, /* 5800 */ IC_VEX_L_W, /* 5801 */ IC_VEX_L_W_XS, /* 5802 */ IC_VEX_L_W_XS, /* 5803 */ IC_VEX_L_W_XD, /* 5804 */ IC_VEX_L_W_XD, /* 5805 */ IC_VEX_L_W_XD, /* 5806 */ IC_VEX_L_W_XD, /* 5807 */ IC_VEX_L_OPSIZE, /* 5808 */ IC_VEX_L_OPSIZE, /* 5809 */ IC_VEX_L_OPSIZE, /* 5810 */ IC_VEX_L_OPSIZE, /* 5811 */ IC_VEX_L_OPSIZE, /* 5812 */ IC_VEX_L_OPSIZE, /* 5813 */ IC_VEX_L_OPSIZE, /* 5814 */ IC_VEX_L_OPSIZE, /* 5815 */ IC_VEX_L_W_OPSIZE, /* 5816 */ IC_VEX_L_W_OPSIZE, /* 5817 */ IC_VEX_L_W_OPSIZE, /* 5818 */ IC_VEX_L_W_OPSIZE, /* 5819 */ IC_VEX_L_W_OPSIZE, /* 5820 */ IC_VEX_L_W_OPSIZE, /* 5821 */ IC_VEX_L_W_OPSIZE, /* 5822 */ IC_VEX_L_W_OPSIZE, /* 5823 */ IC_VEX_L, /* 5824 */ IC_VEX_L, /* 5825 */ IC_VEX_L_XS, /* 5826 */ IC_VEX_L_XS, /* 5827 */ IC_VEX_L_XD, /* 5828 */ IC_VEX_L_XD, /* 5829 */ IC_VEX_L_XD, /* 5830 */ IC_VEX_L_XD, /* 5831 */ IC_VEX_L_W, /* 5832 */ IC_VEX_L_W, /* 5833 */ IC_VEX_L_W_XS, /* 5834 */ IC_VEX_L_W_XS, /* 5835 */ IC_VEX_L_W_XD, /* 5836 */ IC_VEX_L_W_XD, /* 5837 */ IC_VEX_L_W_XD, /* 5838 */ IC_VEX_L_W_XD, /* 5839 */ IC_VEX_L_OPSIZE, /* 5840 */ IC_VEX_L_OPSIZE, /* 5841 */ IC_VEX_L_OPSIZE, /* 5842 */ IC_VEX_L_OPSIZE, /* 5843 */ IC_VEX_L_OPSIZE, /* 5844 */ IC_VEX_L_OPSIZE, /* 5845 */ IC_VEX_L_OPSIZE, /* 5846 */ IC_VEX_L_OPSIZE, /* 5847 */ IC_VEX_L_W_OPSIZE, /* 5848 */ IC_VEX_L_W_OPSIZE, /* 5849 */ IC_VEX_L_W_OPSIZE, /* 5850 */ IC_VEX_L_W_OPSIZE, /* 5851 */ IC_VEX_L_W_OPSIZE, /* 5852 */ IC_VEX_L_W_OPSIZE, /* 5853 */ IC_VEX_L_W_OPSIZE, /* 5854 */ IC_VEX_L_W_OPSIZE, /* 5855 */ IC_VEX_L, /* 5856 */ IC_VEX_L, /* 5857 */ IC_VEX_L_XS, /* 5858 */ IC_VEX_L_XS, /* 5859 */ IC_VEX_L_XD, /* 5860 */ IC_VEX_L_XD, /* 5861 */ IC_VEX_L_XD, /* 5862 */ IC_VEX_L_XD, /* 5863 */ IC_VEX_L_W, /* 5864 */ IC_VEX_L_W, /* 5865 */ IC_VEX_L_W_XS, /* 5866 */ IC_VEX_L_W_XS, /* 5867 */ IC_VEX_L_W_XD, /* 5868 */ IC_VEX_L_W_XD, /* 5869 */ IC_VEX_L_W_XD, /* 5870 */ IC_VEX_L_W_XD, /* 5871 */ IC_VEX_L_OPSIZE, /* 5872 */ IC_VEX_L_OPSIZE, /* 5873 */ IC_VEX_L_OPSIZE, /* 5874 */ IC_VEX_L_OPSIZE, /* 5875 */ IC_VEX_L_OPSIZE, /* 5876 */ IC_VEX_L_OPSIZE, /* 5877 */ IC_VEX_L_OPSIZE, /* 5878 */ IC_VEX_L_OPSIZE, /* 5879 */ IC_VEX_L_W_OPSIZE, /* 5880 */ IC_VEX_L_W_OPSIZE, /* 5881 */ IC_VEX_L_W_OPSIZE, /* 5882 */ IC_VEX_L_W_OPSIZE, /* 5883 */ IC_VEX_L_W_OPSIZE, /* 5884 */ IC_VEX_L_W_OPSIZE, /* 5885 */ IC_VEX_L_W_OPSIZE, /* 5886 */ IC_VEX_L_W_OPSIZE, /* 5887 */ IC_EVEX_L2_KZ, /* 5888 */ IC_EVEX_L2_KZ, /* 5889 */ IC_EVEX_L2_XS_KZ, /* 5890 */ IC_EVEX_L2_XS_KZ, /* 5891 */ IC_EVEX_L2_XD_KZ, /* 5892 */ IC_EVEX_L2_XD_KZ, /* 5893 */ IC_EVEX_L2_XD_KZ, /* 5894 */ IC_EVEX_L2_XD_KZ, /* 5895 */ IC_EVEX_L2_W_KZ, /* 5896 */ IC_EVEX_L2_W_KZ, /* 5897 */ IC_EVEX_L2_W_XS_KZ, /* 5898 */ IC_EVEX_L2_W_XS_KZ, /* 5899 */ IC_EVEX_L2_W_XD_KZ, /* 5900 */ IC_EVEX_L2_W_XD_KZ, /* 5901 */ IC_EVEX_L2_W_XD_KZ, /* 5902 */ IC_EVEX_L2_W_XD_KZ, /* 5903 */ IC_EVEX_L2_OPSIZE_KZ, /* 5904 */ IC_EVEX_L2_OPSIZE_KZ, /* 5905 */ IC_EVEX_L2_OPSIZE_KZ, /* 5906 */ IC_EVEX_L2_OPSIZE_KZ, /* 5907 */ IC_EVEX_L2_OPSIZE_KZ, /* 5908 */ IC_EVEX_L2_OPSIZE_KZ, /* 5909 */ IC_EVEX_L2_OPSIZE_KZ, /* 5910 */ IC_EVEX_L2_OPSIZE_KZ, /* 5911 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5912 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5913 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5914 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5915 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5916 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5917 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5918 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5919 */ IC_EVEX_L2_KZ, /* 5920 */ IC_EVEX_L2_KZ, /* 5921 */ IC_EVEX_L2_XS_KZ, /* 5922 */ IC_EVEX_L2_XS_KZ, /* 5923 */ IC_EVEX_L2_XD_KZ, /* 5924 */ IC_EVEX_L2_XD_KZ, /* 5925 */ IC_EVEX_L2_XD_KZ, /* 5926 */ IC_EVEX_L2_XD_KZ, /* 5927 */ IC_EVEX_L2_W_KZ, /* 5928 */ IC_EVEX_L2_W_KZ, /* 5929 */ IC_EVEX_L2_W_XS_KZ, /* 5930 */ IC_EVEX_L2_W_XS_KZ, /* 5931 */ IC_EVEX_L2_W_XD_KZ, /* 5932 */ IC_EVEX_L2_W_XD_KZ, /* 5933 */ IC_EVEX_L2_W_XD_KZ, /* 5934 */ IC_EVEX_L2_W_XD_KZ, /* 5935 */ IC_EVEX_L2_OPSIZE_KZ, /* 5936 */ IC_EVEX_L2_OPSIZE_KZ, /* 5937 */ IC_EVEX_L2_OPSIZE_KZ, /* 5938 */ IC_EVEX_L2_OPSIZE_KZ, /* 5939 */ IC_EVEX_L2_OPSIZE_KZ, /* 5940 */ IC_EVEX_L2_OPSIZE_KZ, /* 5941 */ IC_EVEX_L2_OPSIZE_KZ, /* 5942 */ IC_EVEX_L2_OPSIZE_KZ, /* 5943 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5944 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5945 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5946 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5947 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5948 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5949 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5950 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5951 */ IC_EVEX_L2_KZ, /* 5952 */ IC_EVEX_L2_KZ, /* 5953 */ IC_EVEX_L2_XS_KZ, /* 5954 */ IC_EVEX_L2_XS_KZ, /* 5955 */ IC_EVEX_L2_XD_KZ, /* 5956 */ IC_EVEX_L2_XD_KZ, /* 5957 */ IC_EVEX_L2_XD_KZ, /* 5958 */ IC_EVEX_L2_XD_KZ, /* 5959 */ IC_EVEX_L2_W_KZ, /* 5960 */ IC_EVEX_L2_W_KZ, /* 5961 */ IC_EVEX_L2_W_XS_KZ, /* 5962 */ IC_EVEX_L2_W_XS_KZ, /* 5963 */ IC_EVEX_L2_W_XD_KZ, /* 5964 */ IC_EVEX_L2_W_XD_KZ, /* 5965 */ IC_EVEX_L2_W_XD_KZ, /* 5966 */ IC_EVEX_L2_W_XD_KZ, /* 5967 */ IC_EVEX_L2_OPSIZE_KZ, /* 5968 */ IC_EVEX_L2_OPSIZE_KZ, /* 5969 */ IC_EVEX_L2_OPSIZE_KZ, /* 5970 */ IC_EVEX_L2_OPSIZE_KZ, /* 5971 */ IC_EVEX_L2_OPSIZE_KZ, /* 5972 */ IC_EVEX_L2_OPSIZE_KZ, /* 5973 */ IC_EVEX_L2_OPSIZE_KZ, /* 5974 */ IC_EVEX_L2_OPSIZE_KZ, /* 5975 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5976 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5977 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5978 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5979 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5980 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5981 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5982 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 5983 */ IC_EVEX_L2_KZ, /* 5984 */ IC_EVEX_L2_KZ, /* 5985 */ IC_EVEX_L2_XS_KZ, /* 5986 */ IC_EVEX_L2_XS_KZ, /* 5987 */ IC_EVEX_L2_XD_KZ, /* 5988 */ IC_EVEX_L2_XD_KZ, /* 5989 */ IC_EVEX_L2_XD_KZ, /* 5990 */ IC_EVEX_L2_XD_KZ, /* 5991 */ IC_EVEX_L2_W_KZ, /* 5992 */ IC_EVEX_L2_W_KZ, /* 5993 */ IC_EVEX_L2_W_XS_KZ, /* 5994 */ IC_EVEX_L2_W_XS_KZ, /* 5995 */ IC_EVEX_L2_W_XD_KZ, /* 5996 */ IC_EVEX_L2_W_XD_KZ, /* 5997 */ IC_EVEX_L2_W_XD_KZ, /* 5998 */ IC_EVEX_L2_W_XD_KZ, /* 5999 */ IC_EVEX_L2_OPSIZE_KZ, /* 6000 */ IC_EVEX_L2_OPSIZE_KZ, /* 6001 */ IC_EVEX_L2_OPSIZE_KZ, /* 6002 */ IC_EVEX_L2_OPSIZE_KZ, /* 6003 */ IC_EVEX_L2_OPSIZE_KZ, /* 6004 */ IC_EVEX_L2_OPSIZE_KZ, /* 6005 */ IC_EVEX_L2_OPSIZE_KZ, /* 6006 */ IC_EVEX_L2_OPSIZE_KZ, /* 6007 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6008 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6009 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6010 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6011 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6012 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6013 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6014 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6015 */ IC_EVEX_L2_KZ, /* 6016 */ IC_EVEX_L2_KZ, /* 6017 */ IC_EVEX_L2_XS_KZ, /* 6018 */ IC_EVEX_L2_XS_KZ, /* 6019 */ IC_EVEX_L2_XD_KZ, /* 6020 */ IC_EVEX_L2_XD_KZ, /* 6021 */ IC_EVEX_L2_XD_KZ, /* 6022 */ IC_EVEX_L2_XD_KZ, /* 6023 */ IC_EVEX_L2_W_KZ, /* 6024 */ IC_EVEX_L2_W_KZ, /* 6025 */ IC_EVEX_L2_W_XS_KZ, /* 6026 */ IC_EVEX_L2_W_XS_KZ, /* 6027 */ IC_EVEX_L2_W_XD_KZ, /* 6028 */ IC_EVEX_L2_W_XD_KZ, /* 6029 */ IC_EVEX_L2_W_XD_KZ, /* 6030 */ IC_EVEX_L2_W_XD_KZ, /* 6031 */ IC_EVEX_L2_OPSIZE_KZ, /* 6032 */ IC_EVEX_L2_OPSIZE_KZ, /* 6033 */ IC_EVEX_L2_OPSIZE_KZ, /* 6034 */ IC_EVEX_L2_OPSIZE_KZ, /* 6035 */ IC_EVEX_L2_OPSIZE_KZ, /* 6036 */ IC_EVEX_L2_OPSIZE_KZ, /* 6037 */ IC_EVEX_L2_OPSIZE_KZ, /* 6038 */ IC_EVEX_L2_OPSIZE_KZ, /* 6039 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6040 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6041 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6042 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6043 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6044 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6045 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6046 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6047 */ IC_EVEX_L2_KZ, /* 6048 */ IC_EVEX_L2_KZ, /* 6049 */ IC_EVEX_L2_XS_KZ, /* 6050 */ IC_EVEX_L2_XS_KZ, /* 6051 */ IC_EVEX_L2_XD_KZ, /* 6052 */ IC_EVEX_L2_XD_KZ, /* 6053 */ IC_EVEX_L2_XD_KZ, /* 6054 */ IC_EVEX_L2_XD_KZ, /* 6055 */ IC_EVEX_L2_W_KZ, /* 6056 */ IC_EVEX_L2_W_KZ, /* 6057 */ IC_EVEX_L2_W_XS_KZ, /* 6058 */ IC_EVEX_L2_W_XS_KZ, /* 6059 */ IC_EVEX_L2_W_XD_KZ, /* 6060 */ IC_EVEX_L2_W_XD_KZ, /* 6061 */ IC_EVEX_L2_W_XD_KZ, /* 6062 */ IC_EVEX_L2_W_XD_KZ, /* 6063 */ IC_EVEX_L2_OPSIZE_KZ, /* 6064 */ IC_EVEX_L2_OPSIZE_KZ, /* 6065 */ IC_EVEX_L2_OPSIZE_KZ, /* 6066 */ IC_EVEX_L2_OPSIZE_KZ, /* 6067 */ IC_EVEX_L2_OPSIZE_KZ, /* 6068 */ IC_EVEX_L2_OPSIZE_KZ, /* 6069 */ IC_EVEX_L2_OPSIZE_KZ, /* 6070 */ IC_EVEX_L2_OPSIZE_KZ, /* 6071 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6072 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6073 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6074 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6075 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6076 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6077 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6078 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6079 */ IC_EVEX_L2_KZ, /* 6080 */ IC_EVEX_L2_KZ, /* 6081 */ IC_EVEX_L2_XS_KZ, /* 6082 */ IC_EVEX_L2_XS_KZ, /* 6083 */ IC_EVEX_L2_XD_KZ, /* 6084 */ IC_EVEX_L2_XD_KZ, /* 6085 */ IC_EVEX_L2_XD_KZ, /* 6086 */ IC_EVEX_L2_XD_KZ, /* 6087 */ IC_EVEX_L2_W_KZ, /* 6088 */ IC_EVEX_L2_W_KZ, /* 6089 */ IC_EVEX_L2_W_XS_KZ, /* 6090 */ IC_EVEX_L2_W_XS_KZ, /* 6091 */ IC_EVEX_L2_W_XD_KZ, /* 6092 */ IC_EVEX_L2_W_XD_KZ, /* 6093 */ IC_EVEX_L2_W_XD_KZ, /* 6094 */ IC_EVEX_L2_W_XD_KZ, /* 6095 */ IC_EVEX_L2_OPSIZE_KZ, /* 6096 */ IC_EVEX_L2_OPSIZE_KZ, /* 6097 */ IC_EVEX_L2_OPSIZE_KZ, /* 6098 */ IC_EVEX_L2_OPSIZE_KZ, /* 6099 */ IC_EVEX_L2_OPSIZE_KZ, /* 6100 */ IC_EVEX_L2_OPSIZE_KZ, /* 6101 */ IC_EVEX_L2_OPSIZE_KZ, /* 6102 */ IC_EVEX_L2_OPSIZE_KZ, /* 6103 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6104 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6105 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6106 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6107 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6108 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6109 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6110 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6111 */ IC_EVEX_L2_KZ, /* 6112 */ IC_EVEX_L2_KZ, /* 6113 */ IC_EVEX_L2_XS_KZ, /* 6114 */ IC_EVEX_L2_XS_KZ, /* 6115 */ IC_EVEX_L2_XD_KZ, /* 6116 */ IC_EVEX_L2_XD_KZ, /* 6117 */ IC_EVEX_L2_XD_KZ, /* 6118 */ IC_EVEX_L2_XD_KZ, /* 6119 */ IC_EVEX_L2_W_KZ, /* 6120 */ IC_EVEX_L2_W_KZ, /* 6121 */ IC_EVEX_L2_W_XS_KZ, /* 6122 */ IC_EVEX_L2_W_XS_KZ, /* 6123 */ IC_EVEX_L2_W_XD_KZ, /* 6124 */ IC_EVEX_L2_W_XD_KZ, /* 6125 */ IC_EVEX_L2_W_XD_KZ, /* 6126 */ IC_EVEX_L2_W_XD_KZ, /* 6127 */ IC_EVEX_L2_OPSIZE_KZ, /* 6128 */ IC_EVEX_L2_OPSIZE_KZ, /* 6129 */ IC_EVEX_L2_OPSIZE_KZ, /* 6130 */ IC_EVEX_L2_OPSIZE_KZ, /* 6131 */ IC_EVEX_L2_OPSIZE_KZ, /* 6132 */ IC_EVEX_L2_OPSIZE_KZ, /* 6133 */ IC_EVEX_L2_OPSIZE_KZ, /* 6134 */ IC_EVEX_L2_OPSIZE_KZ, /* 6135 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6136 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6137 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6138 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6139 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6140 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6141 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6142 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 6143 */ IC, /* 6144 */ IC_64BIT, /* 6145 */ IC_XS, /* 6146 */ IC_64BIT_XS, /* 6147 */ IC_XD, /* 6148 */ IC_64BIT_XD, /* 6149 */ IC_XS, /* 6150 */ IC_64BIT_XS, /* 6151 */ IC, /* 6152 */ IC_64BIT_REXW, /* 6153 */ IC_XS, /* 6154 */ IC_64BIT_REXW_XS, /* 6155 */ IC_XD, /* 6156 */ IC_64BIT_REXW_XD, /* 6157 */ IC_XS, /* 6158 */ IC_64BIT_REXW_XS, /* 6159 */ IC_OPSIZE, /* 6160 */ IC_64BIT_OPSIZE, /* 6161 */ IC_XS_OPSIZE, /* 6162 */ IC_64BIT_XS_OPSIZE, /* 6163 */ IC_XD_OPSIZE, /* 6164 */ IC_64BIT_XD_OPSIZE, /* 6165 */ IC_XS_OPSIZE, /* 6166 */ IC_64BIT_XD_OPSIZE, /* 6167 */ IC_OPSIZE, /* 6168 */ IC_64BIT_REXW_OPSIZE, /* 6169 */ IC_XS_OPSIZE, /* 6170 */ IC_64BIT_REXW_XS, /* 6171 */ IC_XD_OPSIZE, /* 6172 */ IC_64BIT_REXW_XD, /* 6173 */ IC_XS_OPSIZE, /* 6174 */ IC_64BIT_REXW_XS, /* 6175 */ IC_ADSIZE, /* 6176 */ IC_64BIT_ADSIZE, /* 6177 */ IC_XS, /* 6178 */ IC_64BIT_XS, /* 6179 */ IC_XD, /* 6180 */ IC_64BIT_XD, /* 6181 */ IC_XS, /* 6182 */ IC_64BIT_XS, /* 6183 */ IC_ADSIZE, /* 6184 */ IC_64BIT_REXW_ADSIZE, /* 6185 */ IC_XS, /* 6186 */ IC_64BIT_REXW_XS, /* 6187 */ IC_XD, /* 6188 */ IC_64BIT_REXW_XD, /* 6189 */ IC_XS, /* 6190 */ IC_64BIT_REXW_XS, /* 6191 */ IC_OPSIZE_ADSIZE, /* 6192 */ IC_64BIT_OPSIZE_ADSIZE, /* 6193 */ IC_XS_OPSIZE, /* 6194 */ IC_64BIT_XS_OPSIZE, /* 6195 */ IC_XD_OPSIZE, /* 6196 */ IC_64BIT_XD_OPSIZE, /* 6197 */ IC_XS_OPSIZE, /* 6198 */ IC_64BIT_XD_OPSIZE, /* 6199 */ IC_OPSIZE_ADSIZE, /* 6200 */ IC_64BIT_REXW_OPSIZE, /* 6201 */ IC_XS_OPSIZE, /* 6202 */ IC_64BIT_REXW_XS, /* 6203 */ IC_XD_OPSIZE, /* 6204 */ IC_64BIT_REXW_XD, /* 6205 */ IC_XS_OPSIZE, /* 6206 */ IC_64BIT_REXW_XS, /* 6207 */ IC_VEX, /* 6208 */ IC_VEX, /* 6209 */ IC_VEX_XS, /* 6210 */ IC_VEX_XS, /* 6211 */ IC_VEX_XD, /* 6212 */ IC_VEX_XD, /* 6213 */ IC_VEX_XD, /* 6214 */ IC_VEX_XD, /* 6215 */ IC_VEX_W, /* 6216 */ IC_VEX_W, /* 6217 */ IC_VEX_W_XS, /* 6218 */ IC_VEX_W_XS, /* 6219 */ IC_VEX_W_XD, /* 6220 */ IC_VEX_W_XD, /* 6221 */ IC_VEX_W_XD, /* 6222 */ IC_VEX_W_XD, /* 6223 */ IC_VEX_OPSIZE, /* 6224 */ IC_VEX_OPSIZE, /* 6225 */ IC_VEX_OPSIZE, /* 6226 */ IC_VEX_OPSIZE, /* 6227 */ IC_VEX_OPSIZE, /* 6228 */ IC_VEX_OPSIZE, /* 6229 */ IC_VEX_OPSIZE, /* 6230 */ IC_VEX_OPSIZE, /* 6231 */ IC_VEX_W_OPSIZE, /* 6232 */ IC_VEX_W_OPSIZE, /* 6233 */ IC_VEX_W_OPSIZE, /* 6234 */ IC_VEX_W_OPSIZE, /* 6235 */ IC_VEX_W_OPSIZE, /* 6236 */ IC_VEX_W_OPSIZE, /* 6237 */ IC_VEX_W_OPSIZE, /* 6238 */ IC_VEX_W_OPSIZE, /* 6239 */ IC_VEX, /* 6240 */ IC_VEX, /* 6241 */ IC_VEX_XS, /* 6242 */ IC_VEX_XS, /* 6243 */ IC_VEX_XD, /* 6244 */ IC_VEX_XD, /* 6245 */ IC_VEX_XD, /* 6246 */ IC_VEX_XD, /* 6247 */ IC_VEX_W, /* 6248 */ IC_VEX_W, /* 6249 */ IC_VEX_W_XS, /* 6250 */ IC_VEX_W_XS, /* 6251 */ IC_VEX_W_XD, /* 6252 */ IC_VEX_W_XD, /* 6253 */ IC_VEX_W_XD, /* 6254 */ IC_VEX_W_XD, /* 6255 */ IC_VEX_OPSIZE, /* 6256 */ IC_VEX_OPSIZE, /* 6257 */ IC_VEX_OPSIZE, /* 6258 */ IC_VEX_OPSIZE, /* 6259 */ IC_VEX_OPSIZE, /* 6260 */ IC_VEX_OPSIZE, /* 6261 */ IC_VEX_OPSIZE, /* 6262 */ IC_VEX_OPSIZE, /* 6263 */ IC_VEX_W_OPSIZE, /* 6264 */ IC_VEX_W_OPSIZE, /* 6265 */ IC_VEX_W_OPSIZE, /* 6266 */ IC_VEX_W_OPSIZE, /* 6267 */ IC_VEX_W_OPSIZE, /* 6268 */ IC_VEX_W_OPSIZE, /* 6269 */ IC_VEX_W_OPSIZE, /* 6270 */ IC_VEX_W_OPSIZE, /* 6271 */ IC_VEX_L, /* 6272 */ IC_VEX_L, /* 6273 */ IC_VEX_L_XS, /* 6274 */ IC_VEX_L_XS, /* 6275 */ IC_VEX_L_XD, /* 6276 */ IC_VEX_L_XD, /* 6277 */ IC_VEX_L_XD, /* 6278 */ IC_VEX_L_XD, /* 6279 */ IC_VEX_L_W, /* 6280 */ IC_VEX_L_W, /* 6281 */ IC_VEX_L_W_XS, /* 6282 */ IC_VEX_L_W_XS, /* 6283 */ IC_VEX_L_W_XD, /* 6284 */ IC_VEX_L_W_XD, /* 6285 */ IC_VEX_L_W_XD, /* 6286 */ IC_VEX_L_W_XD, /* 6287 */ IC_VEX_L_OPSIZE, /* 6288 */ IC_VEX_L_OPSIZE, /* 6289 */ IC_VEX_L_OPSIZE, /* 6290 */ IC_VEX_L_OPSIZE, /* 6291 */ IC_VEX_L_OPSIZE, /* 6292 */ IC_VEX_L_OPSIZE, /* 6293 */ IC_VEX_L_OPSIZE, /* 6294 */ IC_VEX_L_OPSIZE, /* 6295 */ IC_VEX_L_W_OPSIZE, /* 6296 */ IC_VEX_L_W_OPSIZE, /* 6297 */ IC_VEX_L_W_OPSIZE, /* 6298 */ IC_VEX_L_W_OPSIZE, /* 6299 */ IC_VEX_L_W_OPSIZE, /* 6300 */ IC_VEX_L_W_OPSIZE, /* 6301 */ IC_VEX_L_W_OPSIZE, /* 6302 */ IC_VEX_L_W_OPSIZE, /* 6303 */ IC_VEX_L, /* 6304 */ IC_VEX_L, /* 6305 */ IC_VEX_L_XS, /* 6306 */ IC_VEX_L_XS, /* 6307 */ IC_VEX_L_XD, /* 6308 */ IC_VEX_L_XD, /* 6309 */ IC_VEX_L_XD, /* 6310 */ IC_VEX_L_XD, /* 6311 */ IC_VEX_L_W, /* 6312 */ IC_VEX_L_W, /* 6313 */ IC_VEX_L_W_XS, /* 6314 */ IC_VEX_L_W_XS, /* 6315 */ IC_VEX_L_W_XD, /* 6316 */ IC_VEX_L_W_XD, /* 6317 */ IC_VEX_L_W_XD, /* 6318 */ IC_VEX_L_W_XD, /* 6319 */ IC_VEX_L_OPSIZE, /* 6320 */ IC_VEX_L_OPSIZE, /* 6321 */ IC_VEX_L_OPSIZE, /* 6322 */ IC_VEX_L_OPSIZE, /* 6323 */ IC_VEX_L_OPSIZE, /* 6324 */ IC_VEX_L_OPSIZE, /* 6325 */ IC_VEX_L_OPSIZE, /* 6326 */ IC_VEX_L_OPSIZE, /* 6327 */ IC_VEX_L_W_OPSIZE, /* 6328 */ IC_VEX_L_W_OPSIZE, /* 6329 */ IC_VEX_L_W_OPSIZE, /* 6330 */ IC_VEX_L_W_OPSIZE, /* 6331 */ IC_VEX_L_W_OPSIZE, /* 6332 */ IC_VEX_L_W_OPSIZE, /* 6333 */ IC_VEX_L_W_OPSIZE, /* 6334 */ IC_VEX_L_W_OPSIZE, /* 6335 */ IC_VEX_L, /* 6336 */ IC_VEX_L, /* 6337 */ IC_VEX_L_XS, /* 6338 */ IC_VEX_L_XS, /* 6339 */ IC_VEX_L_XD, /* 6340 */ IC_VEX_L_XD, /* 6341 */ IC_VEX_L_XD, /* 6342 */ IC_VEX_L_XD, /* 6343 */ IC_VEX_L_W, /* 6344 */ IC_VEX_L_W, /* 6345 */ IC_VEX_L_W_XS, /* 6346 */ IC_VEX_L_W_XS, /* 6347 */ IC_VEX_L_W_XD, /* 6348 */ IC_VEX_L_W_XD, /* 6349 */ IC_VEX_L_W_XD, /* 6350 */ IC_VEX_L_W_XD, /* 6351 */ IC_VEX_L_OPSIZE, /* 6352 */ IC_VEX_L_OPSIZE, /* 6353 */ IC_VEX_L_OPSIZE, /* 6354 */ IC_VEX_L_OPSIZE, /* 6355 */ IC_VEX_L_OPSIZE, /* 6356 */ IC_VEX_L_OPSIZE, /* 6357 */ IC_VEX_L_OPSIZE, /* 6358 */ IC_VEX_L_OPSIZE, /* 6359 */ IC_VEX_L_W_OPSIZE, /* 6360 */ IC_VEX_L_W_OPSIZE, /* 6361 */ IC_VEX_L_W_OPSIZE, /* 6362 */ IC_VEX_L_W_OPSIZE, /* 6363 */ IC_VEX_L_W_OPSIZE, /* 6364 */ IC_VEX_L_W_OPSIZE, /* 6365 */ IC_VEX_L_W_OPSIZE, /* 6366 */ IC_VEX_L_W_OPSIZE, /* 6367 */ IC_VEX_L, /* 6368 */ IC_VEX_L, /* 6369 */ IC_VEX_L_XS, /* 6370 */ IC_VEX_L_XS, /* 6371 */ IC_VEX_L_XD, /* 6372 */ IC_VEX_L_XD, /* 6373 */ IC_VEX_L_XD, /* 6374 */ IC_VEX_L_XD, /* 6375 */ IC_VEX_L_W, /* 6376 */ IC_VEX_L_W, /* 6377 */ IC_VEX_L_W_XS, /* 6378 */ IC_VEX_L_W_XS, /* 6379 */ IC_VEX_L_W_XD, /* 6380 */ IC_VEX_L_W_XD, /* 6381 */ IC_VEX_L_W_XD, /* 6382 */ IC_VEX_L_W_XD, /* 6383 */ IC_VEX_L_OPSIZE, /* 6384 */ IC_VEX_L_OPSIZE, /* 6385 */ IC_VEX_L_OPSIZE, /* 6386 */ IC_VEX_L_OPSIZE, /* 6387 */ IC_VEX_L_OPSIZE, /* 6388 */ IC_VEX_L_OPSIZE, /* 6389 */ IC_VEX_L_OPSIZE, /* 6390 */ IC_VEX_L_OPSIZE, /* 6391 */ IC_VEX_L_W_OPSIZE, /* 6392 */ IC_VEX_L_W_OPSIZE, /* 6393 */ IC_VEX_L_W_OPSIZE, /* 6394 */ IC_VEX_L_W_OPSIZE, /* 6395 */ IC_VEX_L_W_OPSIZE, /* 6396 */ IC_VEX_L_W_OPSIZE, /* 6397 */ IC_VEX_L_W_OPSIZE, /* 6398 */ IC_VEX_L_W_OPSIZE, /* 6399 */ IC_EVEX_KZ, /* 6400 */ IC_EVEX_KZ, /* 6401 */ IC_EVEX_XS_KZ, /* 6402 */ IC_EVEX_XS_KZ, /* 6403 */ IC_EVEX_XD_KZ, /* 6404 */ IC_EVEX_XD_KZ, /* 6405 */ IC_EVEX_XD_KZ, /* 6406 */ IC_EVEX_XD_KZ, /* 6407 */ IC_EVEX_W_KZ, /* 6408 */ IC_EVEX_W_KZ, /* 6409 */ IC_EVEX_W_XS_KZ, /* 6410 */ IC_EVEX_W_XS_KZ, /* 6411 */ IC_EVEX_W_XD_KZ, /* 6412 */ IC_EVEX_W_XD_KZ, /* 6413 */ IC_EVEX_W_XD_KZ, /* 6414 */ IC_EVEX_W_XD_KZ, /* 6415 */ IC_EVEX_OPSIZE_KZ, /* 6416 */ IC_EVEX_OPSIZE_KZ, /* 6417 */ IC_EVEX_OPSIZE_KZ, /* 6418 */ IC_EVEX_OPSIZE_KZ, /* 6419 */ IC_EVEX_OPSIZE_KZ, /* 6420 */ IC_EVEX_OPSIZE_KZ, /* 6421 */ IC_EVEX_OPSIZE_KZ, /* 6422 */ IC_EVEX_OPSIZE_KZ, /* 6423 */ IC_EVEX_W_OPSIZE_KZ, /* 6424 */ IC_EVEX_W_OPSIZE_KZ, /* 6425 */ IC_EVEX_W_OPSIZE_KZ, /* 6426 */ IC_EVEX_W_OPSIZE_KZ, /* 6427 */ IC_EVEX_W_OPSIZE_KZ, /* 6428 */ IC_EVEX_W_OPSIZE_KZ, /* 6429 */ IC_EVEX_W_OPSIZE_KZ, /* 6430 */ IC_EVEX_W_OPSIZE_KZ, /* 6431 */ IC_EVEX_KZ, /* 6432 */ IC_EVEX_KZ, /* 6433 */ IC_EVEX_XS_KZ, /* 6434 */ IC_EVEX_XS_KZ, /* 6435 */ IC_EVEX_XD_KZ, /* 6436 */ IC_EVEX_XD_KZ, /* 6437 */ IC_EVEX_XD_KZ, /* 6438 */ IC_EVEX_XD_KZ, /* 6439 */ IC_EVEX_W_KZ, /* 6440 */ IC_EVEX_W_KZ, /* 6441 */ IC_EVEX_W_XS_KZ, /* 6442 */ IC_EVEX_W_XS_KZ, /* 6443 */ IC_EVEX_W_XD_KZ, /* 6444 */ IC_EVEX_W_XD_KZ, /* 6445 */ IC_EVEX_W_XD_KZ, /* 6446 */ IC_EVEX_W_XD_KZ, /* 6447 */ IC_EVEX_OPSIZE_KZ, /* 6448 */ IC_EVEX_OPSIZE_KZ, /* 6449 */ IC_EVEX_OPSIZE_KZ, /* 6450 */ IC_EVEX_OPSIZE_KZ, /* 6451 */ IC_EVEX_OPSIZE_KZ, /* 6452 */ IC_EVEX_OPSIZE_KZ, /* 6453 */ IC_EVEX_OPSIZE_KZ, /* 6454 */ IC_EVEX_OPSIZE_KZ, /* 6455 */ IC_EVEX_W_OPSIZE_KZ, /* 6456 */ IC_EVEX_W_OPSIZE_KZ, /* 6457 */ IC_EVEX_W_OPSIZE_KZ, /* 6458 */ IC_EVEX_W_OPSIZE_KZ, /* 6459 */ IC_EVEX_W_OPSIZE_KZ, /* 6460 */ IC_EVEX_W_OPSIZE_KZ, /* 6461 */ IC_EVEX_W_OPSIZE_KZ, /* 6462 */ IC_EVEX_W_OPSIZE_KZ, /* 6463 */ IC_EVEX_KZ, /* 6464 */ IC_EVEX_KZ, /* 6465 */ IC_EVEX_XS_KZ, /* 6466 */ IC_EVEX_XS_KZ, /* 6467 */ IC_EVEX_XD_KZ, /* 6468 */ IC_EVEX_XD_KZ, /* 6469 */ IC_EVEX_XD_KZ, /* 6470 */ IC_EVEX_XD_KZ, /* 6471 */ IC_EVEX_W_KZ, /* 6472 */ IC_EVEX_W_KZ, /* 6473 */ IC_EVEX_W_XS_KZ, /* 6474 */ IC_EVEX_W_XS_KZ, /* 6475 */ IC_EVEX_W_XD_KZ, /* 6476 */ IC_EVEX_W_XD_KZ, /* 6477 */ IC_EVEX_W_XD_KZ, /* 6478 */ IC_EVEX_W_XD_KZ, /* 6479 */ IC_EVEX_OPSIZE_KZ, /* 6480 */ IC_EVEX_OPSIZE_KZ, /* 6481 */ IC_EVEX_OPSIZE_KZ, /* 6482 */ IC_EVEX_OPSIZE_KZ, /* 6483 */ IC_EVEX_OPSIZE_KZ, /* 6484 */ IC_EVEX_OPSIZE_KZ, /* 6485 */ IC_EVEX_OPSIZE_KZ, /* 6486 */ IC_EVEX_OPSIZE_KZ, /* 6487 */ IC_EVEX_W_OPSIZE_KZ, /* 6488 */ IC_EVEX_W_OPSIZE_KZ, /* 6489 */ IC_EVEX_W_OPSIZE_KZ, /* 6490 */ IC_EVEX_W_OPSIZE_KZ, /* 6491 */ IC_EVEX_W_OPSIZE_KZ, /* 6492 */ IC_EVEX_W_OPSIZE_KZ, /* 6493 */ IC_EVEX_W_OPSIZE_KZ, /* 6494 */ IC_EVEX_W_OPSIZE_KZ, /* 6495 */ IC_EVEX_KZ, /* 6496 */ IC_EVEX_KZ, /* 6497 */ IC_EVEX_XS_KZ, /* 6498 */ IC_EVEX_XS_KZ, /* 6499 */ IC_EVEX_XD_KZ, /* 6500 */ IC_EVEX_XD_KZ, /* 6501 */ IC_EVEX_XD_KZ, /* 6502 */ IC_EVEX_XD_KZ, /* 6503 */ IC_EVEX_W_KZ, /* 6504 */ IC_EVEX_W_KZ, /* 6505 */ IC_EVEX_W_XS_KZ, /* 6506 */ IC_EVEX_W_XS_KZ, /* 6507 */ IC_EVEX_W_XD_KZ, /* 6508 */ IC_EVEX_W_XD_KZ, /* 6509 */ IC_EVEX_W_XD_KZ, /* 6510 */ IC_EVEX_W_XD_KZ, /* 6511 */ IC_EVEX_OPSIZE_KZ, /* 6512 */ IC_EVEX_OPSIZE_KZ, /* 6513 */ IC_EVEX_OPSIZE_KZ, /* 6514 */ IC_EVEX_OPSIZE_KZ, /* 6515 */ IC_EVEX_OPSIZE_KZ, /* 6516 */ IC_EVEX_OPSIZE_KZ, /* 6517 */ IC_EVEX_OPSIZE_KZ, /* 6518 */ IC_EVEX_OPSIZE_KZ, /* 6519 */ IC_EVEX_W_OPSIZE_KZ, /* 6520 */ IC_EVEX_W_OPSIZE_KZ, /* 6521 */ IC_EVEX_W_OPSIZE_KZ, /* 6522 */ IC_EVEX_W_OPSIZE_KZ, /* 6523 */ IC_EVEX_W_OPSIZE_KZ, /* 6524 */ IC_EVEX_W_OPSIZE_KZ, /* 6525 */ IC_EVEX_W_OPSIZE_KZ, /* 6526 */ IC_EVEX_W_OPSIZE_KZ, /* 6527 */ IC_EVEX_KZ, /* 6528 */ IC_EVEX_KZ, /* 6529 */ IC_EVEX_XS_KZ, /* 6530 */ IC_EVEX_XS_KZ, /* 6531 */ IC_EVEX_XD_KZ, /* 6532 */ IC_EVEX_XD_KZ, /* 6533 */ IC_EVEX_XD_KZ, /* 6534 */ IC_EVEX_XD_KZ, /* 6535 */ IC_EVEX_W_KZ, /* 6536 */ IC_EVEX_W_KZ, /* 6537 */ IC_EVEX_W_XS_KZ, /* 6538 */ IC_EVEX_W_XS_KZ, /* 6539 */ IC_EVEX_W_XD_KZ, /* 6540 */ IC_EVEX_W_XD_KZ, /* 6541 */ IC_EVEX_W_XD_KZ, /* 6542 */ IC_EVEX_W_XD_KZ, /* 6543 */ IC_EVEX_OPSIZE_KZ, /* 6544 */ IC_EVEX_OPSIZE_KZ, /* 6545 */ IC_EVEX_OPSIZE_KZ, /* 6546 */ IC_EVEX_OPSIZE_KZ, /* 6547 */ IC_EVEX_OPSIZE_KZ, /* 6548 */ IC_EVEX_OPSIZE_KZ, /* 6549 */ IC_EVEX_OPSIZE_KZ, /* 6550 */ IC_EVEX_OPSIZE_KZ, /* 6551 */ IC_EVEX_W_OPSIZE_KZ, /* 6552 */ IC_EVEX_W_OPSIZE_KZ, /* 6553 */ IC_EVEX_W_OPSIZE_KZ, /* 6554 */ IC_EVEX_W_OPSIZE_KZ, /* 6555 */ IC_EVEX_W_OPSIZE_KZ, /* 6556 */ IC_EVEX_W_OPSIZE_KZ, /* 6557 */ IC_EVEX_W_OPSIZE_KZ, /* 6558 */ IC_EVEX_W_OPSIZE_KZ, /* 6559 */ IC_EVEX_KZ, /* 6560 */ IC_EVEX_KZ, /* 6561 */ IC_EVEX_XS_KZ, /* 6562 */ IC_EVEX_XS_KZ, /* 6563 */ IC_EVEX_XD_KZ, /* 6564 */ IC_EVEX_XD_KZ, /* 6565 */ IC_EVEX_XD_KZ, /* 6566 */ IC_EVEX_XD_KZ, /* 6567 */ IC_EVEX_W_KZ, /* 6568 */ IC_EVEX_W_KZ, /* 6569 */ IC_EVEX_W_XS_KZ, /* 6570 */ IC_EVEX_W_XS_KZ, /* 6571 */ IC_EVEX_W_XD_KZ, /* 6572 */ IC_EVEX_W_XD_KZ, /* 6573 */ IC_EVEX_W_XD_KZ, /* 6574 */ IC_EVEX_W_XD_KZ, /* 6575 */ IC_EVEX_OPSIZE_KZ, /* 6576 */ IC_EVEX_OPSIZE_KZ, /* 6577 */ IC_EVEX_OPSIZE_KZ, /* 6578 */ IC_EVEX_OPSIZE_KZ, /* 6579 */ IC_EVEX_OPSIZE_KZ, /* 6580 */ IC_EVEX_OPSIZE_KZ, /* 6581 */ IC_EVEX_OPSIZE_KZ, /* 6582 */ IC_EVEX_OPSIZE_KZ, /* 6583 */ IC_EVEX_W_OPSIZE_KZ, /* 6584 */ IC_EVEX_W_OPSIZE_KZ, /* 6585 */ IC_EVEX_W_OPSIZE_KZ, /* 6586 */ IC_EVEX_W_OPSIZE_KZ, /* 6587 */ IC_EVEX_W_OPSIZE_KZ, /* 6588 */ IC_EVEX_W_OPSIZE_KZ, /* 6589 */ IC_EVEX_W_OPSIZE_KZ, /* 6590 */ IC_EVEX_W_OPSIZE_KZ, /* 6591 */ IC_EVEX_KZ, /* 6592 */ IC_EVEX_KZ, /* 6593 */ IC_EVEX_XS_KZ, /* 6594 */ IC_EVEX_XS_KZ, /* 6595 */ IC_EVEX_XD_KZ, /* 6596 */ IC_EVEX_XD_KZ, /* 6597 */ IC_EVEX_XD_KZ, /* 6598 */ IC_EVEX_XD_KZ, /* 6599 */ IC_EVEX_W_KZ, /* 6600 */ IC_EVEX_W_KZ, /* 6601 */ IC_EVEX_W_XS_KZ, /* 6602 */ IC_EVEX_W_XS_KZ, /* 6603 */ IC_EVEX_W_XD_KZ, /* 6604 */ IC_EVEX_W_XD_KZ, /* 6605 */ IC_EVEX_W_XD_KZ, /* 6606 */ IC_EVEX_W_XD_KZ, /* 6607 */ IC_EVEX_OPSIZE_KZ, /* 6608 */ IC_EVEX_OPSIZE_KZ, /* 6609 */ IC_EVEX_OPSIZE_KZ, /* 6610 */ IC_EVEX_OPSIZE_KZ, /* 6611 */ IC_EVEX_OPSIZE_KZ, /* 6612 */ IC_EVEX_OPSIZE_KZ, /* 6613 */ IC_EVEX_OPSIZE_KZ, /* 6614 */ IC_EVEX_OPSIZE_KZ, /* 6615 */ IC_EVEX_W_OPSIZE_KZ, /* 6616 */ IC_EVEX_W_OPSIZE_KZ, /* 6617 */ IC_EVEX_W_OPSIZE_KZ, /* 6618 */ IC_EVEX_W_OPSIZE_KZ, /* 6619 */ IC_EVEX_W_OPSIZE_KZ, /* 6620 */ IC_EVEX_W_OPSIZE_KZ, /* 6621 */ IC_EVEX_W_OPSIZE_KZ, /* 6622 */ IC_EVEX_W_OPSIZE_KZ, /* 6623 */ IC_EVEX_KZ, /* 6624 */ IC_EVEX_KZ, /* 6625 */ IC_EVEX_XS_KZ, /* 6626 */ IC_EVEX_XS_KZ, /* 6627 */ IC_EVEX_XD_KZ, /* 6628 */ IC_EVEX_XD_KZ, /* 6629 */ IC_EVEX_XD_KZ, /* 6630 */ IC_EVEX_XD_KZ, /* 6631 */ IC_EVEX_W_KZ, /* 6632 */ IC_EVEX_W_KZ, /* 6633 */ IC_EVEX_W_XS_KZ, /* 6634 */ IC_EVEX_W_XS_KZ, /* 6635 */ IC_EVEX_W_XD_KZ, /* 6636 */ IC_EVEX_W_XD_KZ, /* 6637 */ IC_EVEX_W_XD_KZ, /* 6638 */ IC_EVEX_W_XD_KZ, /* 6639 */ IC_EVEX_OPSIZE_KZ, /* 6640 */ IC_EVEX_OPSIZE_KZ, /* 6641 */ IC_EVEX_OPSIZE_KZ, /* 6642 */ IC_EVEX_OPSIZE_KZ, /* 6643 */ IC_EVEX_OPSIZE_KZ, /* 6644 */ IC_EVEX_OPSIZE_KZ, /* 6645 */ IC_EVEX_OPSIZE_KZ, /* 6646 */ IC_EVEX_OPSIZE_KZ, /* 6647 */ IC_EVEX_W_OPSIZE_KZ, /* 6648 */ IC_EVEX_W_OPSIZE_KZ, /* 6649 */ IC_EVEX_W_OPSIZE_KZ, /* 6650 */ IC_EVEX_W_OPSIZE_KZ, /* 6651 */ IC_EVEX_W_OPSIZE_KZ, /* 6652 */ IC_EVEX_W_OPSIZE_KZ, /* 6653 */ IC_EVEX_W_OPSIZE_KZ, /* 6654 */ IC_EVEX_W_OPSIZE_KZ, /* 6655 */ IC, /* 6656 */ IC_64BIT, /* 6657 */ IC_XS, /* 6658 */ IC_64BIT_XS, /* 6659 */ IC_XD, /* 6660 */ IC_64BIT_XD, /* 6661 */ IC_XS, /* 6662 */ IC_64BIT_XS, /* 6663 */ IC, /* 6664 */ IC_64BIT_REXW, /* 6665 */ IC_XS, /* 6666 */ IC_64BIT_REXW_XS, /* 6667 */ IC_XD, /* 6668 */ IC_64BIT_REXW_XD, /* 6669 */ IC_XS, /* 6670 */ IC_64BIT_REXW_XS, /* 6671 */ IC_OPSIZE, /* 6672 */ IC_64BIT_OPSIZE, /* 6673 */ IC_XS_OPSIZE, /* 6674 */ IC_64BIT_XS_OPSIZE, /* 6675 */ IC_XD_OPSIZE, /* 6676 */ IC_64BIT_XD_OPSIZE, /* 6677 */ IC_XS_OPSIZE, /* 6678 */ IC_64BIT_XD_OPSIZE, /* 6679 */ IC_OPSIZE, /* 6680 */ IC_64BIT_REXW_OPSIZE, /* 6681 */ IC_XS_OPSIZE, /* 6682 */ IC_64BIT_REXW_XS, /* 6683 */ IC_XD_OPSIZE, /* 6684 */ IC_64BIT_REXW_XD, /* 6685 */ IC_XS_OPSIZE, /* 6686 */ IC_64BIT_REXW_XS, /* 6687 */ IC_ADSIZE, /* 6688 */ IC_64BIT_ADSIZE, /* 6689 */ IC_XS, /* 6690 */ IC_64BIT_XS, /* 6691 */ IC_XD, /* 6692 */ IC_64BIT_XD, /* 6693 */ IC_XS, /* 6694 */ IC_64BIT_XS, /* 6695 */ IC_ADSIZE, /* 6696 */ IC_64BIT_REXW_ADSIZE, /* 6697 */ IC_XS, /* 6698 */ IC_64BIT_REXW_XS, /* 6699 */ IC_XD, /* 6700 */ IC_64BIT_REXW_XD, /* 6701 */ IC_XS, /* 6702 */ IC_64BIT_REXW_XS, /* 6703 */ IC_OPSIZE_ADSIZE, /* 6704 */ IC_64BIT_OPSIZE_ADSIZE, /* 6705 */ IC_XS_OPSIZE, /* 6706 */ IC_64BIT_XS_OPSIZE, /* 6707 */ IC_XD_OPSIZE, /* 6708 */ IC_64BIT_XD_OPSIZE, /* 6709 */ IC_XS_OPSIZE, /* 6710 */ IC_64BIT_XD_OPSIZE, /* 6711 */ IC_OPSIZE_ADSIZE, /* 6712 */ IC_64BIT_REXW_OPSIZE, /* 6713 */ IC_XS_OPSIZE, /* 6714 */ IC_64BIT_REXW_XS, /* 6715 */ IC_XD_OPSIZE, /* 6716 */ IC_64BIT_REXW_XD, /* 6717 */ IC_XS_OPSIZE, /* 6718 */ IC_64BIT_REXW_XS, /* 6719 */ IC_VEX, /* 6720 */ IC_VEX, /* 6721 */ IC_VEX_XS, /* 6722 */ IC_VEX_XS, /* 6723 */ IC_VEX_XD, /* 6724 */ IC_VEX_XD, /* 6725 */ IC_VEX_XD, /* 6726 */ IC_VEX_XD, /* 6727 */ IC_VEX_W, /* 6728 */ IC_VEX_W, /* 6729 */ IC_VEX_W_XS, /* 6730 */ IC_VEX_W_XS, /* 6731 */ IC_VEX_W_XD, /* 6732 */ IC_VEX_W_XD, /* 6733 */ IC_VEX_W_XD, /* 6734 */ IC_VEX_W_XD, /* 6735 */ IC_VEX_OPSIZE, /* 6736 */ IC_VEX_OPSIZE, /* 6737 */ IC_VEX_OPSIZE, /* 6738 */ IC_VEX_OPSIZE, /* 6739 */ IC_VEX_OPSIZE, /* 6740 */ IC_VEX_OPSIZE, /* 6741 */ IC_VEX_OPSIZE, /* 6742 */ IC_VEX_OPSIZE, /* 6743 */ IC_VEX_W_OPSIZE, /* 6744 */ IC_VEX_W_OPSIZE, /* 6745 */ IC_VEX_W_OPSIZE, /* 6746 */ IC_VEX_W_OPSIZE, /* 6747 */ IC_VEX_W_OPSIZE, /* 6748 */ IC_VEX_W_OPSIZE, /* 6749 */ IC_VEX_W_OPSIZE, /* 6750 */ IC_VEX_W_OPSIZE, /* 6751 */ IC_VEX, /* 6752 */ IC_VEX, /* 6753 */ IC_VEX_XS, /* 6754 */ IC_VEX_XS, /* 6755 */ IC_VEX_XD, /* 6756 */ IC_VEX_XD, /* 6757 */ IC_VEX_XD, /* 6758 */ IC_VEX_XD, /* 6759 */ IC_VEX_W, /* 6760 */ IC_VEX_W, /* 6761 */ IC_VEX_W_XS, /* 6762 */ IC_VEX_W_XS, /* 6763 */ IC_VEX_W_XD, /* 6764 */ IC_VEX_W_XD, /* 6765 */ IC_VEX_W_XD, /* 6766 */ IC_VEX_W_XD, /* 6767 */ IC_VEX_OPSIZE, /* 6768 */ IC_VEX_OPSIZE, /* 6769 */ IC_VEX_OPSIZE, /* 6770 */ IC_VEX_OPSIZE, /* 6771 */ IC_VEX_OPSIZE, /* 6772 */ IC_VEX_OPSIZE, /* 6773 */ IC_VEX_OPSIZE, /* 6774 */ IC_VEX_OPSIZE, /* 6775 */ IC_VEX_W_OPSIZE, /* 6776 */ IC_VEX_W_OPSIZE, /* 6777 */ IC_VEX_W_OPSIZE, /* 6778 */ IC_VEX_W_OPSIZE, /* 6779 */ IC_VEX_W_OPSIZE, /* 6780 */ IC_VEX_W_OPSIZE, /* 6781 */ IC_VEX_W_OPSIZE, /* 6782 */ IC_VEX_W_OPSIZE, /* 6783 */ IC_VEX_L, /* 6784 */ IC_VEX_L, /* 6785 */ IC_VEX_L_XS, /* 6786 */ IC_VEX_L_XS, /* 6787 */ IC_VEX_L_XD, /* 6788 */ IC_VEX_L_XD, /* 6789 */ IC_VEX_L_XD, /* 6790 */ IC_VEX_L_XD, /* 6791 */ IC_VEX_L_W, /* 6792 */ IC_VEX_L_W, /* 6793 */ IC_VEX_L_W_XS, /* 6794 */ IC_VEX_L_W_XS, /* 6795 */ IC_VEX_L_W_XD, /* 6796 */ IC_VEX_L_W_XD, /* 6797 */ IC_VEX_L_W_XD, /* 6798 */ IC_VEX_L_W_XD, /* 6799 */ IC_VEX_L_OPSIZE, /* 6800 */ IC_VEX_L_OPSIZE, /* 6801 */ IC_VEX_L_OPSIZE, /* 6802 */ IC_VEX_L_OPSIZE, /* 6803 */ IC_VEX_L_OPSIZE, /* 6804 */ IC_VEX_L_OPSIZE, /* 6805 */ IC_VEX_L_OPSIZE, /* 6806 */ IC_VEX_L_OPSIZE, /* 6807 */ IC_VEX_L_W_OPSIZE, /* 6808 */ IC_VEX_L_W_OPSIZE, /* 6809 */ IC_VEX_L_W_OPSIZE, /* 6810 */ IC_VEX_L_W_OPSIZE, /* 6811 */ IC_VEX_L_W_OPSIZE, /* 6812 */ IC_VEX_L_W_OPSIZE, /* 6813 */ IC_VEX_L_W_OPSIZE, /* 6814 */ IC_VEX_L_W_OPSIZE, /* 6815 */ IC_VEX_L, /* 6816 */ IC_VEX_L, /* 6817 */ IC_VEX_L_XS, /* 6818 */ IC_VEX_L_XS, /* 6819 */ IC_VEX_L_XD, /* 6820 */ IC_VEX_L_XD, /* 6821 */ IC_VEX_L_XD, /* 6822 */ IC_VEX_L_XD, /* 6823 */ IC_VEX_L_W, /* 6824 */ IC_VEX_L_W, /* 6825 */ IC_VEX_L_W_XS, /* 6826 */ IC_VEX_L_W_XS, /* 6827 */ IC_VEX_L_W_XD, /* 6828 */ IC_VEX_L_W_XD, /* 6829 */ IC_VEX_L_W_XD, /* 6830 */ IC_VEX_L_W_XD, /* 6831 */ IC_VEX_L_OPSIZE, /* 6832 */ IC_VEX_L_OPSIZE, /* 6833 */ IC_VEX_L_OPSIZE, /* 6834 */ IC_VEX_L_OPSIZE, /* 6835 */ IC_VEX_L_OPSIZE, /* 6836 */ IC_VEX_L_OPSIZE, /* 6837 */ IC_VEX_L_OPSIZE, /* 6838 */ IC_VEX_L_OPSIZE, /* 6839 */ IC_VEX_L_W_OPSIZE, /* 6840 */ IC_VEX_L_W_OPSIZE, /* 6841 */ IC_VEX_L_W_OPSIZE, /* 6842 */ IC_VEX_L_W_OPSIZE, /* 6843 */ IC_VEX_L_W_OPSIZE, /* 6844 */ IC_VEX_L_W_OPSIZE, /* 6845 */ IC_VEX_L_W_OPSIZE, /* 6846 */ IC_VEX_L_W_OPSIZE, /* 6847 */ IC_VEX_L, /* 6848 */ IC_VEX_L, /* 6849 */ IC_VEX_L_XS, /* 6850 */ IC_VEX_L_XS, /* 6851 */ IC_VEX_L_XD, /* 6852 */ IC_VEX_L_XD, /* 6853 */ IC_VEX_L_XD, /* 6854 */ IC_VEX_L_XD, /* 6855 */ IC_VEX_L_W, /* 6856 */ IC_VEX_L_W, /* 6857 */ IC_VEX_L_W_XS, /* 6858 */ IC_VEX_L_W_XS, /* 6859 */ IC_VEX_L_W_XD, /* 6860 */ IC_VEX_L_W_XD, /* 6861 */ IC_VEX_L_W_XD, /* 6862 */ IC_VEX_L_W_XD, /* 6863 */ IC_VEX_L_OPSIZE, /* 6864 */ IC_VEX_L_OPSIZE, /* 6865 */ IC_VEX_L_OPSIZE, /* 6866 */ IC_VEX_L_OPSIZE, /* 6867 */ IC_VEX_L_OPSIZE, /* 6868 */ IC_VEX_L_OPSIZE, /* 6869 */ IC_VEX_L_OPSIZE, /* 6870 */ IC_VEX_L_OPSIZE, /* 6871 */ IC_VEX_L_W_OPSIZE, /* 6872 */ IC_VEX_L_W_OPSIZE, /* 6873 */ IC_VEX_L_W_OPSIZE, /* 6874 */ IC_VEX_L_W_OPSIZE, /* 6875 */ IC_VEX_L_W_OPSIZE, /* 6876 */ IC_VEX_L_W_OPSIZE, /* 6877 */ IC_VEX_L_W_OPSIZE, /* 6878 */ IC_VEX_L_W_OPSIZE, /* 6879 */ IC_VEX_L, /* 6880 */ IC_VEX_L, /* 6881 */ IC_VEX_L_XS, /* 6882 */ IC_VEX_L_XS, /* 6883 */ IC_VEX_L_XD, /* 6884 */ IC_VEX_L_XD, /* 6885 */ IC_VEX_L_XD, /* 6886 */ IC_VEX_L_XD, /* 6887 */ IC_VEX_L_W, /* 6888 */ IC_VEX_L_W, /* 6889 */ IC_VEX_L_W_XS, /* 6890 */ IC_VEX_L_W_XS, /* 6891 */ IC_VEX_L_W_XD, /* 6892 */ IC_VEX_L_W_XD, /* 6893 */ IC_VEX_L_W_XD, /* 6894 */ IC_VEX_L_W_XD, /* 6895 */ IC_VEX_L_OPSIZE, /* 6896 */ IC_VEX_L_OPSIZE, /* 6897 */ IC_VEX_L_OPSIZE, /* 6898 */ IC_VEX_L_OPSIZE, /* 6899 */ IC_VEX_L_OPSIZE, /* 6900 */ IC_VEX_L_OPSIZE, /* 6901 */ IC_VEX_L_OPSIZE, /* 6902 */ IC_VEX_L_OPSIZE, /* 6903 */ IC_VEX_L_W_OPSIZE, /* 6904 */ IC_VEX_L_W_OPSIZE, /* 6905 */ IC_VEX_L_W_OPSIZE, /* 6906 */ IC_VEX_L_W_OPSIZE, /* 6907 */ IC_VEX_L_W_OPSIZE, /* 6908 */ IC_VEX_L_W_OPSIZE, /* 6909 */ IC_VEX_L_W_OPSIZE, /* 6910 */ IC_VEX_L_W_OPSIZE, /* 6911 */ IC_EVEX_L_KZ, /* 6912 */ IC_EVEX_L_KZ, /* 6913 */ IC_EVEX_L_XS_KZ, /* 6914 */ IC_EVEX_L_XS_KZ, /* 6915 */ IC_EVEX_L_XD_KZ, /* 6916 */ IC_EVEX_L_XD_KZ, /* 6917 */ IC_EVEX_L_XD_KZ, /* 6918 */ IC_EVEX_L_XD_KZ, /* 6919 */ IC_EVEX_L_W_KZ, /* 6920 */ IC_EVEX_L_W_KZ, /* 6921 */ IC_EVEX_L_W_XS_KZ, /* 6922 */ IC_EVEX_L_W_XS_KZ, /* 6923 */ IC_EVEX_L_W_XD_KZ, /* 6924 */ IC_EVEX_L_W_XD_KZ, /* 6925 */ IC_EVEX_L_W_XD_KZ, /* 6926 */ IC_EVEX_L_W_XD_KZ, /* 6927 */ IC_EVEX_L_OPSIZE_KZ, /* 6928 */ IC_EVEX_L_OPSIZE_KZ, /* 6929 */ IC_EVEX_L_OPSIZE_KZ, /* 6930 */ IC_EVEX_L_OPSIZE_KZ, /* 6931 */ IC_EVEX_L_OPSIZE_KZ, /* 6932 */ IC_EVEX_L_OPSIZE_KZ, /* 6933 */ IC_EVEX_L_OPSIZE_KZ, /* 6934 */ IC_EVEX_L_OPSIZE_KZ, /* 6935 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6936 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6937 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6938 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6939 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6940 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6941 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6942 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6943 */ IC_EVEX_L_KZ, /* 6944 */ IC_EVEX_L_KZ, /* 6945 */ IC_EVEX_L_XS_KZ, /* 6946 */ IC_EVEX_L_XS_KZ, /* 6947 */ IC_EVEX_L_XD_KZ, /* 6948 */ IC_EVEX_L_XD_KZ, /* 6949 */ IC_EVEX_L_XD_KZ, /* 6950 */ IC_EVEX_L_XD_KZ, /* 6951 */ IC_EVEX_L_W_KZ, /* 6952 */ IC_EVEX_L_W_KZ, /* 6953 */ IC_EVEX_L_W_XS_KZ, /* 6954 */ IC_EVEX_L_W_XS_KZ, /* 6955 */ IC_EVEX_L_W_XD_KZ, /* 6956 */ IC_EVEX_L_W_XD_KZ, /* 6957 */ IC_EVEX_L_W_XD_KZ, /* 6958 */ IC_EVEX_L_W_XD_KZ, /* 6959 */ IC_EVEX_L_OPSIZE_KZ, /* 6960 */ IC_EVEX_L_OPSIZE_KZ, /* 6961 */ IC_EVEX_L_OPSIZE_KZ, /* 6962 */ IC_EVEX_L_OPSIZE_KZ, /* 6963 */ IC_EVEX_L_OPSIZE_KZ, /* 6964 */ IC_EVEX_L_OPSIZE_KZ, /* 6965 */ IC_EVEX_L_OPSIZE_KZ, /* 6966 */ IC_EVEX_L_OPSIZE_KZ, /* 6967 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6968 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6969 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6970 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6971 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6972 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6973 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6974 */ IC_EVEX_L_W_OPSIZE_KZ, /* 6975 */ IC_EVEX_L_KZ, /* 6976 */ IC_EVEX_L_KZ, /* 6977 */ IC_EVEX_L_XS_KZ, /* 6978 */ IC_EVEX_L_XS_KZ, /* 6979 */ IC_EVEX_L_XD_KZ, /* 6980 */ IC_EVEX_L_XD_KZ, /* 6981 */ IC_EVEX_L_XD_KZ, /* 6982 */ IC_EVEX_L_XD_KZ, /* 6983 */ IC_EVEX_L_W_KZ, /* 6984 */ IC_EVEX_L_W_KZ, /* 6985 */ IC_EVEX_L_W_XS_KZ, /* 6986 */ IC_EVEX_L_W_XS_KZ, /* 6987 */ IC_EVEX_L_W_XD_KZ, /* 6988 */ IC_EVEX_L_W_XD_KZ, /* 6989 */ IC_EVEX_L_W_XD_KZ, /* 6990 */ IC_EVEX_L_W_XD_KZ, /* 6991 */ IC_EVEX_L_OPSIZE_KZ, /* 6992 */ IC_EVEX_L_OPSIZE_KZ, /* 6993 */ IC_EVEX_L_OPSIZE_KZ, /* 6994 */ IC_EVEX_L_OPSIZE_KZ, /* 6995 */ IC_EVEX_L_OPSIZE_KZ, /* 6996 */ IC_EVEX_L_OPSIZE_KZ, /* 6997 */ IC_EVEX_L_OPSIZE_KZ, /* 6998 */ IC_EVEX_L_OPSIZE_KZ, /* 6999 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7000 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7001 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7002 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7003 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7004 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7005 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7006 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7007 */ IC_EVEX_L_KZ, /* 7008 */ IC_EVEX_L_KZ, /* 7009 */ IC_EVEX_L_XS_KZ, /* 7010 */ IC_EVEX_L_XS_KZ, /* 7011 */ IC_EVEX_L_XD_KZ, /* 7012 */ IC_EVEX_L_XD_KZ, /* 7013 */ IC_EVEX_L_XD_KZ, /* 7014 */ IC_EVEX_L_XD_KZ, /* 7015 */ IC_EVEX_L_W_KZ, /* 7016 */ IC_EVEX_L_W_KZ, /* 7017 */ IC_EVEX_L_W_XS_KZ, /* 7018 */ IC_EVEX_L_W_XS_KZ, /* 7019 */ IC_EVEX_L_W_XD_KZ, /* 7020 */ IC_EVEX_L_W_XD_KZ, /* 7021 */ IC_EVEX_L_W_XD_KZ, /* 7022 */ IC_EVEX_L_W_XD_KZ, /* 7023 */ IC_EVEX_L_OPSIZE_KZ, /* 7024 */ IC_EVEX_L_OPSIZE_KZ, /* 7025 */ IC_EVEX_L_OPSIZE_KZ, /* 7026 */ IC_EVEX_L_OPSIZE_KZ, /* 7027 */ IC_EVEX_L_OPSIZE_KZ, /* 7028 */ IC_EVEX_L_OPSIZE_KZ, /* 7029 */ IC_EVEX_L_OPSIZE_KZ, /* 7030 */ IC_EVEX_L_OPSIZE_KZ, /* 7031 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7032 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7033 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7034 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7035 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7036 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7037 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7038 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7039 */ IC_EVEX_L_KZ, /* 7040 */ IC_EVEX_L_KZ, /* 7041 */ IC_EVEX_L_XS_KZ, /* 7042 */ IC_EVEX_L_XS_KZ, /* 7043 */ IC_EVEX_L_XD_KZ, /* 7044 */ IC_EVEX_L_XD_KZ, /* 7045 */ IC_EVEX_L_XD_KZ, /* 7046 */ IC_EVEX_L_XD_KZ, /* 7047 */ IC_EVEX_L_W_KZ, /* 7048 */ IC_EVEX_L_W_KZ, /* 7049 */ IC_EVEX_L_W_XS_KZ, /* 7050 */ IC_EVEX_L_W_XS_KZ, /* 7051 */ IC_EVEX_L_W_XD_KZ, /* 7052 */ IC_EVEX_L_W_XD_KZ, /* 7053 */ IC_EVEX_L_W_XD_KZ, /* 7054 */ IC_EVEX_L_W_XD_KZ, /* 7055 */ IC_EVEX_L_OPSIZE_KZ, /* 7056 */ IC_EVEX_L_OPSIZE_KZ, /* 7057 */ IC_EVEX_L_OPSIZE_KZ, /* 7058 */ IC_EVEX_L_OPSIZE_KZ, /* 7059 */ IC_EVEX_L_OPSIZE_KZ, /* 7060 */ IC_EVEX_L_OPSIZE_KZ, /* 7061 */ IC_EVEX_L_OPSIZE_KZ, /* 7062 */ IC_EVEX_L_OPSIZE_KZ, /* 7063 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7064 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7065 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7066 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7067 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7068 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7069 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7070 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7071 */ IC_EVEX_L_KZ, /* 7072 */ IC_EVEX_L_KZ, /* 7073 */ IC_EVEX_L_XS_KZ, /* 7074 */ IC_EVEX_L_XS_KZ, /* 7075 */ IC_EVEX_L_XD_KZ, /* 7076 */ IC_EVEX_L_XD_KZ, /* 7077 */ IC_EVEX_L_XD_KZ, /* 7078 */ IC_EVEX_L_XD_KZ, /* 7079 */ IC_EVEX_L_W_KZ, /* 7080 */ IC_EVEX_L_W_KZ, /* 7081 */ IC_EVEX_L_W_XS_KZ, /* 7082 */ IC_EVEX_L_W_XS_KZ, /* 7083 */ IC_EVEX_L_W_XD_KZ, /* 7084 */ IC_EVEX_L_W_XD_KZ, /* 7085 */ IC_EVEX_L_W_XD_KZ, /* 7086 */ IC_EVEX_L_W_XD_KZ, /* 7087 */ IC_EVEX_L_OPSIZE_KZ, /* 7088 */ IC_EVEX_L_OPSIZE_KZ, /* 7089 */ IC_EVEX_L_OPSIZE_KZ, /* 7090 */ IC_EVEX_L_OPSIZE_KZ, /* 7091 */ IC_EVEX_L_OPSIZE_KZ, /* 7092 */ IC_EVEX_L_OPSIZE_KZ, /* 7093 */ IC_EVEX_L_OPSIZE_KZ, /* 7094 */ IC_EVEX_L_OPSIZE_KZ, /* 7095 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7096 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7097 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7098 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7099 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7100 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7101 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7102 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7103 */ IC_EVEX_L_KZ, /* 7104 */ IC_EVEX_L_KZ, /* 7105 */ IC_EVEX_L_XS_KZ, /* 7106 */ IC_EVEX_L_XS_KZ, /* 7107 */ IC_EVEX_L_XD_KZ, /* 7108 */ IC_EVEX_L_XD_KZ, /* 7109 */ IC_EVEX_L_XD_KZ, /* 7110 */ IC_EVEX_L_XD_KZ, /* 7111 */ IC_EVEX_L_W_KZ, /* 7112 */ IC_EVEX_L_W_KZ, /* 7113 */ IC_EVEX_L_W_XS_KZ, /* 7114 */ IC_EVEX_L_W_XS_KZ, /* 7115 */ IC_EVEX_L_W_XD_KZ, /* 7116 */ IC_EVEX_L_W_XD_KZ, /* 7117 */ IC_EVEX_L_W_XD_KZ, /* 7118 */ IC_EVEX_L_W_XD_KZ, /* 7119 */ IC_EVEX_L_OPSIZE_KZ, /* 7120 */ IC_EVEX_L_OPSIZE_KZ, /* 7121 */ IC_EVEX_L_OPSIZE_KZ, /* 7122 */ IC_EVEX_L_OPSIZE_KZ, /* 7123 */ IC_EVEX_L_OPSIZE_KZ, /* 7124 */ IC_EVEX_L_OPSIZE_KZ, /* 7125 */ IC_EVEX_L_OPSIZE_KZ, /* 7126 */ IC_EVEX_L_OPSIZE_KZ, /* 7127 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7128 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7129 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7130 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7131 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7132 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7133 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7134 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7135 */ IC_EVEX_L_KZ, /* 7136 */ IC_EVEX_L_KZ, /* 7137 */ IC_EVEX_L_XS_KZ, /* 7138 */ IC_EVEX_L_XS_KZ, /* 7139 */ IC_EVEX_L_XD_KZ, /* 7140 */ IC_EVEX_L_XD_KZ, /* 7141 */ IC_EVEX_L_XD_KZ, /* 7142 */ IC_EVEX_L_XD_KZ, /* 7143 */ IC_EVEX_L_W_KZ, /* 7144 */ IC_EVEX_L_W_KZ, /* 7145 */ IC_EVEX_L_W_XS_KZ, /* 7146 */ IC_EVEX_L_W_XS_KZ, /* 7147 */ IC_EVEX_L_W_XD_KZ, /* 7148 */ IC_EVEX_L_W_XD_KZ, /* 7149 */ IC_EVEX_L_W_XD_KZ, /* 7150 */ IC_EVEX_L_W_XD_KZ, /* 7151 */ IC_EVEX_L_OPSIZE_KZ, /* 7152 */ IC_EVEX_L_OPSIZE_KZ, /* 7153 */ IC_EVEX_L_OPSIZE_KZ, /* 7154 */ IC_EVEX_L_OPSIZE_KZ, /* 7155 */ IC_EVEX_L_OPSIZE_KZ, /* 7156 */ IC_EVEX_L_OPSIZE_KZ, /* 7157 */ IC_EVEX_L_OPSIZE_KZ, /* 7158 */ IC_EVEX_L_OPSIZE_KZ, /* 7159 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7160 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7161 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7162 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7163 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7164 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7165 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7166 */ IC_EVEX_L_W_OPSIZE_KZ, /* 7167 */ IC, /* 7168 */ IC_64BIT, /* 7169 */ IC_XS, /* 7170 */ IC_64BIT_XS, /* 7171 */ IC_XD, /* 7172 */ IC_64BIT_XD, /* 7173 */ IC_XS, /* 7174 */ IC_64BIT_XS, /* 7175 */ IC, /* 7176 */ IC_64BIT_REXW, /* 7177 */ IC_XS, /* 7178 */ IC_64BIT_REXW_XS, /* 7179 */ IC_XD, /* 7180 */ IC_64BIT_REXW_XD, /* 7181 */ IC_XS, /* 7182 */ IC_64BIT_REXW_XS, /* 7183 */ IC_OPSIZE, /* 7184 */ IC_64BIT_OPSIZE, /* 7185 */ IC_XS_OPSIZE, /* 7186 */ IC_64BIT_XS_OPSIZE, /* 7187 */ IC_XD_OPSIZE, /* 7188 */ IC_64BIT_XD_OPSIZE, /* 7189 */ IC_XS_OPSIZE, /* 7190 */ IC_64BIT_XD_OPSIZE, /* 7191 */ IC_OPSIZE, /* 7192 */ IC_64BIT_REXW_OPSIZE, /* 7193 */ IC_XS_OPSIZE, /* 7194 */ IC_64BIT_REXW_XS, /* 7195 */ IC_XD_OPSIZE, /* 7196 */ IC_64BIT_REXW_XD, /* 7197 */ IC_XS_OPSIZE, /* 7198 */ IC_64BIT_REXW_XS, /* 7199 */ IC_ADSIZE, /* 7200 */ IC_64BIT_ADSIZE, /* 7201 */ IC_XS, /* 7202 */ IC_64BIT_XS, /* 7203 */ IC_XD, /* 7204 */ IC_64BIT_XD, /* 7205 */ IC_XS, /* 7206 */ IC_64BIT_XS, /* 7207 */ IC_ADSIZE, /* 7208 */ IC_64BIT_REXW_ADSIZE, /* 7209 */ IC_XS, /* 7210 */ IC_64BIT_REXW_XS, /* 7211 */ IC_XD, /* 7212 */ IC_64BIT_REXW_XD, /* 7213 */ IC_XS, /* 7214 */ IC_64BIT_REXW_XS, /* 7215 */ IC_OPSIZE_ADSIZE, /* 7216 */ IC_64BIT_OPSIZE_ADSIZE, /* 7217 */ IC_XS_OPSIZE, /* 7218 */ IC_64BIT_XS_OPSIZE, /* 7219 */ IC_XD_OPSIZE, /* 7220 */ IC_64BIT_XD_OPSIZE, /* 7221 */ IC_XS_OPSIZE, /* 7222 */ IC_64BIT_XD_OPSIZE, /* 7223 */ IC_OPSIZE_ADSIZE, /* 7224 */ IC_64BIT_REXW_OPSIZE, /* 7225 */ IC_XS_OPSIZE, /* 7226 */ IC_64BIT_REXW_XS, /* 7227 */ IC_XD_OPSIZE, /* 7228 */ IC_64BIT_REXW_XD, /* 7229 */ IC_XS_OPSIZE, /* 7230 */ IC_64BIT_REXW_XS, /* 7231 */ IC_VEX, /* 7232 */ IC_VEX, /* 7233 */ IC_VEX_XS, /* 7234 */ IC_VEX_XS, /* 7235 */ IC_VEX_XD, /* 7236 */ IC_VEX_XD, /* 7237 */ IC_VEX_XD, /* 7238 */ IC_VEX_XD, /* 7239 */ IC_VEX_W, /* 7240 */ IC_VEX_W, /* 7241 */ IC_VEX_W_XS, /* 7242 */ IC_VEX_W_XS, /* 7243 */ IC_VEX_W_XD, /* 7244 */ IC_VEX_W_XD, /* 7245 */ IC_VEX_W_XD, /* 7246 */ IC_VEX_W_XD, /* 7247 */ IC_VEX_OPSIZE, /* 7248 */ IC_VEX_OPSIZE, /* 7249 */ IC_VEX_OPSIZE, /* 7250 */ IC_VEX_OPSIZE, /* 7251 */ IC_VEX_OPSIZE, /* 7252 */ IC_VEX_OPSIZE, /* 7253 */ IC_VEX_OPSIZE, /* 7254 */ IC_VEX_OPSIZE, /* 7255 */ IC_VEX_W_OPSIZE, /* 7256 */ IC_VEX_W_OPSIZE, /* 7257 */ IC_VEX_W_OPSIZE, /* 7258 */ IC_VEX_W_OPSIZE, /* 7259 */ IC_VEX_W_OPSIZE, /* 7260 */ IC_VEX_W_OPSIZE, /* 7261 */ IC_VEX_W_OPSIZE, /* 7262 */ IC_VEX_W_OPSIZE, /* 7263 */ IC_VEX, /* 7264 */ IC_VEX, /* 7265 */ IC_VEX_XS, /* 7266 */ IC_VEX_XS, /* 7267 */ IC_VEX_XD, /* 7268 */ IC_VEX_XD, /* 7269 */ IC_VEX_XD, /* 7270 */ IC_VEX_XD, /* 7271 */ IC_VEX_W, /* 7272 */ IC_VEX_W, /* 7273 */ IC_VEX_W_XS, /* 7274 */ IC_VEX_W_XS, /* 7275 */ IC_VEX_W_XD, /* 7276 */ IC_VEX_W_XD, /* 7277 */ IC_VEX_W_XD, /* 7278 */ IC_VEX_W_XD, /* 7279 */ IC_VEX_OPSIZE, /* 7280 */ IC_VEX_OPSIZE, /* 7281 */ IC_VEX_OPSIZE, /* 7282 */ IC_VEX_OPSIZE, /* 7283 */ IC_VEX_OPSIZE, /* 7284 */ IC_VEX_OPSIZE, /* 7285 */ IC_VEX_OPSIZE, /* 7286 */ IC_VEX_OPSIZE, /* 7287 */ IC_VEX_W_OPSIZE, /* 7288 */ IC_VEX_W_OPSIZE, /* 7289 */ IC_VEX_W_OPSIZE, /* 7290 */ IC_VEX_W_OPSIZE, /* 7291 */ IC_VEX_W_OPSIZE, /* 7292 */ IC_VEX_W_OPSIZE, /* 7293 */ IC_VEX_W_OPSIZE, /* 7294 */ IC_VEX_W_OPSIZE, /* 7295 */ IC_VEX_L, /* 7296 */ IC_VEX_L, /* 7297 */ IC_VEX_L_XS, /* 7298 */ IC_VEX_L_XS, /* 7299 */ IC_VEX_L_XD, /* 7300 */ IC_VEX_L_XD, /* 7301 */ IC_VEX_L_XD, /* 7302 */ IC_VEX_L_XD, /* 7303 */ IC_VEX_L_W, /* 7304 */ IC_VEX_L_W, /* 7305 */ IC_VEX_L_W_XS, /* 7306 */ IC_VEX_L_W_XS, /* 7307 */ IC_VEX_L_W_XD, /* 7308 */ IC_VEX_L_W_XD, /* 7309 */ IC_VEX_L_W_XD, /* 7310 */ IC_VEX_L_W_XD, /* 7311 */ IC_VEX_L_OPSIZE, /* 7312 */ IC_VEX_L_OPSIZE, /* 7313 */ IC_VEX_L_OPSIZE, /* 7314 */ IC_VEX_L_OPSIZE, /* 7315 */ IC_VEX_L_OPSIZE, /* 7316 */ IC_VEX_L_OPSIZE, /* 7317 */ IC_VEX_L_OPSIZE, /* 7318 */ IC_VEX_L_OPSIZE, /* 7319 */ IC_VEX_L_W_OPSIZE, /* 7320 */ IC_VEX_L_W_OPSIZE, /* 7321 */ IC_VEX_L_W_OPSIZE, /* 7322 */ IC_VEX_L_W_OPSIZE, /* 7323 */ IC_VEX_L_W_OPSIZE, /* 7324 */ IC_VEX_L_W_OPSIZE, /* 7325 */ IC_VEX_L_W_OPSIZE, /* 7326 */ IC_VEX_L_W_OPSIZE, /* 7327 */ IC_VEX_L, /* 7328 */ IC_VEX_L, /* 7329 */ IC_VEX_L_XS, /* 7330 */ IC_VEX_L_XS, /* 7331 */ IC_VEX_L_XD, /* 7332 */ IC_VEX_L_XD, /* 7333 */ IC_VEX_L_XD, /* 7334 */ IC_VEX_L_XD, /* 7335 */ IC_VEX_L_W, /* 7336 */ IC_VEX_L_W, /* 7337 */ IC_VEX_L_W_XS, /* 7338 */ IC_VEX_L_W_XS, /* 7339 */ IC_VEX_L_W_XD, /* 7340 */ IC_VEX_L_W_XD, /* 7341 */ IC_VEX_L_W_XD, /* 7342 */ IC_VEX_L_W_XD, /* 7343 */ IC_VEX_L_OPSIZE, /* 7344 */ IC_VEX_L_OPSIZE, /* 7345 */ IC_VEX_L_OPSIZE, /* 7346 */ IC_VEX_L_OPSIZE, /* 7347 */ IC_VEX_L_OPSIZE, /* 7348 */ IC_VEX_L_OPSIZE, /* 7349 */ IC_VEX_L_OPSIZE, /* 7350 */ IC_VEX_L_OPSIZE, /* 7351 */ IC_VEX_L_W_OPSIZE, /* 7352 */ IC_VEX_L_W_OPSIZE, /* 7353 */ IC_VEX_L_W_OPSIZE, /* 7354 */ IC_VEX_L_W_OPSIZE, /* 7355 */ IC_VEX_L_W_OPSIZE, /* 7356 */ IC_VEX_L_W_OPSIZE, /* 7357 */ IC_VEX_L_W_OPSIZE, /* 7358 */ IC_VEX_L_W_OPSIZE, /* 7359 */ IC_VEX_L, /* 7360 */ IC_VEX_L, /* 7361 */ IC_VEX_L_XS, /* 7362 */ IC_VEX_L_XS, /* 7363 */ IC_VEX_L_XD, /* 7364 */ IC_VEX_L_XD, /* 7365 */ IC_VEX_L_XD, /* 7366 */ IC_VEX_L_XD, /* 7367 */ IC_VEX_L_W, /* 7368 */ IC_VEX_L_W, /* 7369 */ IC_VEX_L_W_XS, /* 7370 */ IC_VEX_L_W_XS, /* 7371 */ IC_VEX_L_W_XD, /* 7372 */ IC_VEX_L_W_XD, /* 7373 */ IC_VEX_L_W_XD, /* 7374 */ IC_VEX_L_W_XD, /* 7375 */ IC_VEX_L_OPSIZE, /* 7376 */ IC_VEX_L_OPSIZE, /* 7377 */ IC_VEX_L_OPSIZE, /* 7378 */ IC_VEX_L_OPSIZE, /* 7379 */ IC_VEX_L_OPSIZE, /* 7380 */ IC_VEX_L_OPSIZE, /* 7381 */ IC_VEX_L_OPSIZE, /* 7382 */ IC_VEX_L_OPSIZE, /* 7383 */ IC_VEX_L_W_OPSIZE, /* 7384 */ IC_VEX_L_W_OPSIZE, /* 7385 */ IC_VEX_L_W_OPSIZE, /* 7386 */ IC_VEX_L_W_OPSIZE, /* 7387 */ IC_VEX_L_W_OPSIZE, /* 7388 */ IC_VEX_L_W_OPSIZE, /* 7389 */ IC_VEX_L_W_OPSIZE, /* 7390 */ IC_VEX_L_W_OPSIZE, /* 7391 */ IC_VEX_L, /* 7392 */ IC_VEX_L, /* 7393 */ IC_VEX_L_XS, /* 7394 */ IC_VEX_L_XS, /* 7395 */ IC_VEX_L_XD, /* 7396 */ IC_VEX_L_XD, /* 7397 */ IC_VEX_L_XD, /* 7398 */ IC_VEX_L_XD, /* 7399 */ IC_VEX_L_W, /* 7400 */ IC_VEX_L_W, /* 7401 */ IC_VEX_L_W_XS, /* 7402 */ IC_VEX_L_W_XS, /* 7403 */ IC_VEX_L_W_XD, /* 7404 */ IC_VEX_L_W_XD, /* 7405 */ IC_VEX_L_W_XD, /* 7406 */ IC_VEX_L_W_XD, /* 7407 */ IC_VEX_L_OPSIZE, /* 7408 */ IC_VEX_L_OPSIZE, /* 7409 */ IC_VEX_L_OPSIZE, /* 7410 */ IC_VEX_L_OPSIZE, /* 7411 */ IC_VEX_L_OPSIZE, /* 7412 */ IC_VEX_L_OPSIZE, /* 7413 */ IC_VEX_L_OPSIZE, /* 7414 */ IC_VEX_L_OPSIZE, /* 7415 */ IC_VEX_L_W_OPSIZE, /* 7416 */ IC_VEX_L_W_OPSIZE, /* 7417 */ IC_VEX_L_W_OPSIZE, /* 7418 */ IC_VEX_L_W_OPSIZE, /* 7419 */ IC_VEX_L_W_OPSIZE, /* 7420 */ IC_VEX_L_W_OPSIZE, /* 7421 */ IC_VEX_L_W_OPSIZE, /* 7422 */ IC_VEX_L_W_OPSIZE, /* 7423 */ IC_EVEX_L2_KZ, /* 7424 */ IC_EVEX_L2_KZ, /* 7425 */ IC_EVEX_L2_XS_KZ, /* 7426 */ IC_EVEX_L2_XS_KZ, /* 7427 */ IC_EVEX_L2_XD_KZ, /* 7428 */ IC_EVEX_L2_XD_KZ, /* 7429 */ IC_EVEX_L2_XD_KZ, /* 7430 */ IC_EVEX_L2_XD_KZ, /* 7431 */ IC_EVEX_L2_W_KZ, /* 7432 */ IC_EVEX_L2_W_KZ, /* 7433 */ IC_EVEX_L2_W_XS_KZ, /* 7434 */ IC_EVEX_L2_W_XS_KZ, /* 7435 */ IC_EVEX_L2_W_XD_KZ, /* 7436 */ IC_EVEX_L2_W_XD_KZ, /* 7437 */ IC_EVEX_L2_W_XD_KZ, /* 7438 */ IC_EVEX_L2_W_XD_KZ, /* 7439 */ IC_EVEX_L2_OPSIZE_KZ, /* 7440 */ IC_EVEX_L2_OPSIZE_KZ, /* 7441 */ IC_EVEX_L2_OPSIZE_KZ, /* 7442 */ IC_EVEX_L2_OPSIZE_KZ, /* 7443 */ IC_EVEX_L2_OPSIZE_KZ, /* 7444 */ IC_EVEX_L2_OPSIZE_KZ, /* 7445 */ IC_EVEX_L2_OPSIZE_KZ, /* 7446 */ IC_EVEX_L2_OPSIZE_KZ, /* 7447 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7448 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7449 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7450 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7451 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7452 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7453 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7454 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7455 */ IC_EVEX_L2_KZ, /* 7456 */ IC_EVEX_L2_KZ, /* 7457 */ IC_EVEX_L2_XS_KZ, /* 7458 */ IC_EVEX_L2_XS_KZ, /* 7459 */ IC_EVEX_L2_XD_KZ, /* 7460 */ IC_EVEX_L2_XD_KZ, /* 7461 */ IC_EVEX_L2_XD_KZ, /* 7462 */ IC_EVEX_L2_XD_KZ, /* 7463 */ IC_EVEX_L2_W_KZ, /* 7464 */ IC_EVEX_L2_W_KZ, /* 7465 */ IC_EVEX_L2_W_XS_KZ, /* 7466 */ IC_EVEX_L2_W_XS_KZ, /* 7467 */ IC_EVEX_L2_W_XD_KZ, /* 7468 */ IC_EVEX_L2_W_XD_KZ, /* 7469 */ IC_EVEX_L2_W_XD_KZ, /* 7470 */ IC_EVEX_L2_W_XD_KZ, /* 7471 */ IC_EVEX_L2_OPSIZE_KZ, /* 7472 */ IC_EVEX_L2_OPSIZE_KZ, /* 7473 */ IC_EVEX_L2_OPSIZE_KZ, /* 7474 */ IC_EVEX_L2_OPSIZE_KZ, /* 7475 */ IC_EVEX_L2_OPSIZE_KZ, /* 7476 */ IC_EVEX_L2_OPSIZE_KZ, /* 7477 */ IC_EVEX_L2_OPSIZE_KZ, /* 7478 */ IC_EVEX_L2_OPSIZE_KZ, /* 7479 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7480 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7481 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7482 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7483 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7484 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7485 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7486 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7487 */ IC_EVEX_L2_KZ, /* 7488 */ IC_EVEX_L2_KZ, /* 7489 */ IC_EVEX_L2_XS_KZ, /* 7490 */ IC_EVEX_L2_XS_KZ, /* 7491 */ IC_EVEX_L2_XD_KZ, /* 7492 */ IC_EVEX_L2_XD_KZ, /* 7493 */ IC_EVEX_L2_XD_KZ, /* 7494 */ IC_EVEX_L2_XD_KZ, /* 7495 */ IC_EVEX_L2_W_KZ, /* 7496 */ IC_EVEX_L2_W_KZ, /* 7497 */ IC_EVEX_L2_W_XS_KZ, /* 7498 */ IC_EVEX_L2_W_XS_KZ, /* 7499 */ IC_EVEX_L2_W_XD_KZ, /* 7500 */ IC_EVEX_L2_W_XD_KZ, /* 7501 */ IC_EVEX_L2_W_XD_KZ, /* 7502 */ IC_EVEX_L2_W_XD_KZ, /* 7503 */ IC_EVEX_L2_OPSIZE_KZ, /* 7504 */ IC_EVEX_L2_OPSIZE_KZ, /* 7505 */ IC_EVEX_L2_OPSIZE_KZ, /* 7506 */ IC_EVEX_L2_OPSIZE_KZ, /* 7507 */ IC_EVEX_L2_OPSIZE_KZ, /* 7508 */ IC_EVEX_L2_OPSIZE_KZ, /* 7509 */ IC_EVEX_L2_OPSIZE_KZ, /* 7510 */ IC_EVEX_L2_OPSIZE_KZ, /* 7511 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7512 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7513 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7514 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7515 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7516 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7517 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7518 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7519 */ IC_EVEX_L2_KZ, /* 7520 */ IC_EVEX_L2_KZ, /* 7521 */ IC_EVEX_L2_XS_KZ, /* 7522 */ IC_EVEX_L2_XS_KZ, /* 7523 */ IC_EVEX_L2_XD_KZ, /* 7524 */ IC_EVEX_L2_XD_KZ, /* 7525 */ IC_EVEX_L2_XD_KZ, /* 7526 */ IC_EVEX_L2_XD_KZ, /* 7527 */ IC_EVEX_L2_W_KZ, /* 7528 */ IC_EVEX_L2_W_KZ, /* 7529 */ IC_EVEX_L2_W_XS_KZ, /* 7530 */ IC_EVEX_L2_W_XS_KZ, /* 7531 */ IC_EVEX_L2_W_XD_KZ, /* 7532 */ IC_EVEX_L2_W_XD_KZ, /* 7533 */ IC_EVEX_L2_W_XD_KZ, /* 7534 */ IC_EVEX_L2_W_XD_KZ, /* 7535 */ IC_EVEX_L2_OPSIZE_KZ, /* 7536 */ IC_EVEX_L2_OPSIZE_KZ, /* 7537 */ IC_EVEX_L2_OPSIZE_KZ, /* 7538 */ IC_EVEX_L2_OPSIZE_KZ, /* 7539 */ IC_EVEX_L2_OPSIZE_KZ, /* 7540 */ IC_EVEX_L2_OPSIZE_KZ, /* 7541 */ IC_EVEX_L2_OPSIZE_KZ, /* 7542 */ IC_EVEX_L2_OPSIZE_KZ, /* 7543 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7544 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7545 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7546 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7547 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7548 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7549 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7550 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7551 */ IC_EVEX_L2_KZ, /* 7552 */ IC_EVEX_L2_KZ, /* 7553 */ IC_EVEX_L2_XS_KZ, /* 7554 */ IC_EVEX_L2_XS_KZ, /* 7555 */ IC_EVEX_L2_XD_KZ, /* 7556 */ IC_EVEX_L2_XD_KZ, /* 7557 */ IC_EVEX_L2_XD_KZ, /* 7558 */ IC_EVEX_L2_XD_KZ, /* 7559 */ IC_EVEX_L2_W_KZ, /* 7560 */ IC_EVEX_L2_W_KZ, /* 7561 */ IC_EVEX_L2_W_XS_KZ, /* 7562 */ IC_EVEX_L2_W_XS_KZ, /* 7563 */ IC_EVEX_L2_W_XD_KZ, /* 7564 */ IC_EVEX_L2_W_XD_KZ, /* 7565 */ IC_EVEX_L2_W_XD_KZ, /* 7566 */ IC_EVEX_L2_W_XD_KZ, /* 7567 */ IC_EVEX_L2_OPSIZE_KZ, /* 7568 */ IC_EVEX_L2_OPSIZE_KZ, /* 7569 */ IC_EVEX_L2_OPSIZE_KZ, /* 7570 */ IC_EVEX_L2_OPSIZE_KZ, /* 7571 */ IC_EVEX_L2_OPSIZE_KZ, /* 7572 */ IC_EVEX_L2_OPSIZE_KZ, /* 7573 */ IC_EVEX_L2_OPSIZE_KZ, /* 7574 */ IC_EVEX_L2_OPSIZE_KZ, /* 7575 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7576 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7577 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7578 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7579 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7580 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7581 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7582 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7583 */ IC_EVEX_L2_KZ, /* 7584 */ IC_EVEX_L2_KZ, /* 7585 */ IC_EVEX_L2_XS_KZ, /* 7586 */ IC_EVEX_L2_XS_KZ, /* 7587 */ IC_EVEX_L2_XD_KZ, /* 7588 */ IC_EVEX_L2_XD_KZ, /* 7589 */ IC_EVEX_L2_XD_KZ, /* 7590 */ IC_EVEX_L2_XD_KZ, /* 7591 */ IC_EVEX_L2_W_KZ, /* 7592 */ IC_EVEX_L2_W_KZ, /* 7593 */ IC_EVEX_L2_W_XS_KZ, /* 7594 */ IC_EVEX_L2_W_XS_KZ, /* 7595 */ IC_EVEX_L2_W_XD_KZ, /* 7596 */ IC_EVEX_L2_W_XD_KZ, /* 7597 */ IC_EVEX_L2_W_XD_KZ, /* 7598 */ IC_EVEX_L2_W_XD_KZ, /* 7599 */ IC_EVEX_L2_OPSIZE_KZ, /* 7600 */ IC_EVEX_L2_OPSIZE_KZ, /* 7601 */ IC_EVEX_L2_OPSIZE_KZ, /* 7602 */ IC_EVEX_L2_OPSIZE_KZ, /* 7603 */ IC_EVEX_L2_OPSIZE_KZ, /* 7604 */ IC_EVEX_L2_OPSIZE_KZ, /* 7605 */ IC_EVEX_L2_OPSIZE_KZ, /* 7606 */ IC_EVEX_L2_OPSIZE_KZ, /* 7607 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7608 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7609 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7610 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7611 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7612 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7613 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7614 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7615 */ IC_EVEX_L2_KZ, /* 7616 */ IC_EVEX_L2_KZ, /* 7617 */ IC_EVEX_L2_XS_KZ, /* 7618 */ IC_EVEX_L2_XS_KZ, /* 7619 */ IC_EVEX_L2_XD_KZ, /* 7620 */ IC_EVEX_L2_XD_KZ, /* 7621 */ IC_EVEX_L2_XD_KZ, /* 7622 */ IC_EVEX_L2_XD_KZ, /* 7623 */ IC_EVEX_L2_W_KZ, /* 7624 */ IC_EVEX_L2_W_KZ, /* 7625 */ IC_EVEX_L2_W_XS_KZ, /* 7626 */ IC_EVEX_L2_W_XS_KZ, /* 7627 */ IC_EVEX_L2_W_XD_KZ, /* 7628 */ IC_EVEX_L2_W_XD_KZ, /* 7629 */ IC_EVEX_L2_W_XD_KZ, /* 7630 */ IC_EVEX_L2_W_XD_KZ, /* 7631 */ IC_EVEX_L2_OPSIZE_KZ, /* 7632 */ IC_EVEX_L2_OPSIZE_KZ, /* 7633 */ IC_EVEX_L2_OPSIZE_KZ, /* 7634 */ IC_EVEX_L2_OPSIZE_KZ, /* 7635 */ IC_EVEX_L2_OPSIZE_KZ, /* 7636 */ IC_EVEX_L2_OPSIZE_KZ, /* 7637 */ IC_EVEX_L2_OPSIZE_KZ, /* 7638 */ IC_EVEX_L2_OPSIZE_KZ, /* 7639 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7640 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7641 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7642 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7643 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7644 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7645 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7646 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7647 */ IC_EVEX_L2_KZ, /* 7648 */ IC_EVEX_L2_KZ, /* 7649 */ IC_EVEX_L2_XS_KZ, /* 7650 */ IC_EVEX_L2_XS_KZ, /* 7651 */ IC_EVEX_L2_XD_KZ, /* 7652 */ IC_EVEX_L2_XD_KZ, /* 7653 */ IC_EVEX_L2_XD_KZ, /* 7654 */ IC_EVEX_L2_XD_KZ, /* 7655 */ IC_EVEX_L2_W_KZ, /* 7656 */ IC_EVEX_L2_W_KZ, /* 7657 */ IC_EVEX_L2_W_XS_KZ, /* 7658 */ IC_EVEX_L2_W_XS_KZ, /* 7659 */ IC_EVEX_L2_W_XD_KZ, /* 7660 */ IC_EVEX_L2_W_XD_KZ, /* 7661 */ IC_EVEX_L2_W_XD_KZ, /* 7662 */ IC_EVEX_L2_W_XD_KZ, /* 7663 */ IC_EVEX_L2_OPSIZE_KZ, /* 7664 */ IC_EVEX_L2_OPSIZE_KZ, /* 7665 */ IC_EVEX_L2_OPSIZE_KZ, /* 7666 */ IC_EVEX_L2_OPSIZE_KZ, /* 7667 */ IC_EVEX_L2_OPSIZE_KZ, /* 7668 */ IC_EVEX_L2_OPSIZE_KZ, /* 7669 */ IC_EVEX_L2_OPSIZE_KZ, /* 7670 */ IC_EVEX_L2_OPSIZE_KZ, /* 7671 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7672 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7673 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7674 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7675 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7676 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7677 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7678 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7679 */ IC, /* 7680 */ IC_64BIT, /* 7681 */ IC_XS, /* 7682 */ IC_64BIT_XS, /* 7683 */ IC_XD, /* 7684 */ IC_64BIT_XD, /* 7685 */ IC_XS, /* 7686 */ IC_64BIT_XS, /* 7687 */ IC, /* 7688 */ IC_64BIT_REXW, /* 7689 */ IC_XS, /* 7690 */ IC_64BIT_REXW_XS, /* 7691 */ IC_XD, /* 7692 */ IC_64BIT_REXW_XD, /* 7693 */ IC_XS, /* 7694 */ IC_64BIT_REXW_XS, /* 7695 */ IC_OPSIZE, /* 7696 */ IC_64BIT_OPSIZE, /* 7697 */ IC_XS_OPSIZE, /* 7698 */ IC_64BIT_XS_OPSIZE, /* 7699 */ IC_XD_OPSIZE, /* 7700 */ IC_64BIT_XD_OPSIZE, /* 7701 */ IC_XS_OPSIZE, /* 7702 */ IC_64BIT_XD_OPSIZE, /* 7703 */ IC_OPSIZE, /* 7704 */ IC_64BIT_REXW_OPSIZE, /* 7705 */ IC_XS_OPSIZE, /* 7706 */ IC_64BIT_REXW_XS, /* 7707 */ IC_XD_OPSIZE, /* 7708 */ IC_64BIT_REXW_XD, /* 7709 */ IC_XS_OPSIZE, /* 7710 */ IC_64BIT_REXW_XS, /* 7711 */ IC_ADSIZE, /* 7712 */ IC_64BIT_ADSIZE, /* 7713 */ IC_XS, /* 7714 */ IC_64BIT_XS, /* 7715 */ IC_XD, /* 7716 */ IC_64BIT_XD, /* 7717 */ IC_XS, /* 7718 */ IC_64BIT_XS, /* 7719 */ IC_ADSIZE, /* 7720 */ IC_64BIT_REXW_ADSIZE, /* 7721 */ IC_XS, /* 7722 */ IC_64BIT_REXW_XS, /* 7723 */ IC_XD, /* 7724 */ IC_64BIT_REXW_XD, /* 7725 */ IC_XS, /* 7726 */ IC_64BIT_REXW_XS, /* 7727 */ IC_OPSIZE_ADSIZE, /* 7728 */ IC_64BIT_OPSIZE_ADSIZE, /* 7729 */ IC_XS_OPSIZE, /* 7730 */ IC_64BIT_XS_OPSIZE, /* 7731 */ IC_XD_OPSIZE, /* 7732 */ IC_64BIT_XD_OPSIZE, /* 7733 */ IC_XS_OPSIZE, /* 7734 */ IC_64BIT_XD_OPSIZE, /* 7735 */ IC_OPSIZE_ADSIZE, /* 7736 */ IC_64BIT_REXW_OPSIZE, /* 7737 */ IC_XS_OPSIZE, /* 7738 */ IC_64BIT_REXW_XS, /* 7739 */ IC_XD_OPSIZE, /* 7740 */ IC_64BIT_REXW_XD, /* 7741 */ IC_XS_OPSIZE, /* 7742 */ IC_64BIT_REXW_XS, /* 7743 */ IC_VEX, /* 7744 */ IC_VEX, /* 7745 */ IC_VEX_XS, /* 7746 */ IC_VEX_XS, /* 7747 */ IC_VEX_XD, /* 7748 */ IC_VEX_XD, /* 7749 */ IC_VEX_XD, /* 7750 */ IC_VEX_XD, /* 7751 */ IC_VEX_W, /* 7752 */ IC_VEX_W, /* 7753 */ IC_VEX_W_XS, /* 7754 */ IC_VEX_W_XS, /* 7755 */ IC_VEX_W_XD, /* 7756 */ IC_VEX_W_XD, /* 7757 */ IC_VEX_W_XD, /* 7758 */ IC_VEX_W_XD, /* 7759 */ IC_VEX_OPSIZE, /* 7760 */ IC_VEX_OPSIZE, /* 7761 */ IC_VEX_OPSIZE, /* 7762 */ IC_VEX_OPSIZE, /* 7763 */ IC_VEX_OPSIZE, /* 7764 */ IC_VEX_OPSIZE, /* 7765 */ IC_VEX_OPSIZE, /* 7766 */ IC_VEX_OPSIZE, /* 7767 */ IC_VEX_W_OPSIZE, /* 7768 */ IC_VEX_W_OPSIZE, /* 7769 */ IC_VEX_W_OPSIZE, /* 7770 */ IC_VEX_W_OPSIZE, /* 7771 */ IC_VEX_W_OPSIZE, /* 7772 */ IC_VEX_W_OPSIZE, /* 7773 */ IC_VEX_W_OPSIZE, /* 7774 */ IC_VEX_W_OPSIZE, /* 7775 */ IC_VEX, /* 7776 */ IC_VEX, /* 7777 */ IC_VEX_XS, /* 7778 */ IC_VEX_XS, /* 7779 */ IC_VEX_XD, /* 7780 */ IC_VEX_XD, /* 7781 */ IC_VEX_XD, /* 7782 */ IC_VEX_XD, /* 7783 */ IC_VEX_W, /* 7784 */ IC_VEX_W, /* 7785 */ IC_VEX_W_XS, /* 7786 */ IC_VEX_W_XS, /* 7787 */ IC_VEX_W_XD, /* 7788 */ IC_VEX_W_XD, /* 7789 */ IC_VEX_W_XD, /* 7790 */ IC_VEX_W_XD, /* 7791 */ IC_VEX_OPSIZE, /* 7792 */ IC_VEX_OPSIZE, /* 7793 */ IC_VEX_OPSIZE, /* 7794 */ IC_VEX_OPSIZE, /* 7795 */ IC_VEX_OPSIZE, /* 7796 */ IC_VEX_OPSIZE, /* 7797 */ IC_VEX_OPSIZE, /* 7798 */ IC_VEX_OPSIZE, /* 7799 */ IC_VEX_W_OPSIZE, /* 7800 */ IC_VEX_W_OPSIZE, /* 7801 */ IC_VEX_W_OPSIZE, /* 7802 */ IC_VEX_W_OPSIZE, /* 7803 */ IC_VEX_W_OPSIZE, /* 7804 */ IC_VEX_W_OPSIZE, /* 7805 */ IC_VEX_W_OPSIZE, /* 7806 */ IC_VEX_W_OPSIZE, /* 7807 */ IC_VEX_L, /* 7808 */ IC_VEX_L, /* 7809 */ IC_VEX_L_XS, /* 7810 */ IC_VEX_L_XS, /* 7811 */ IC_VEX_L_XD, /* 7812 */ IC_VEX_L_XD, /* 7813 */ IC_VEX_L_XD, /* 7814 */ IC_VEX_L_XD, /* 7815 */ IC_VEX_L_W, /* 7816 */ IC_VEX_L_W, /* 7817 */ IC_VEX_L_W_XS, /* 7818 */ IC_VEX_L_W_XS, /* 7819 */ IC_VEX_L_W_XD, /* 7820 */ IC_VEX_L_W_XD, /* 7821 */ IC_VEX_L_W_XD, /* 7822 */ IC_VEX_L_W_XD, /* 7823 */ IC_VEX_L_OPSIZE, /* 7824 */ IC_VEX_L_OPSIZE, /* 7825 */ IC_VEX_L_OPSIZE, /* 7826 */ IC_VEX_L_OPSIZE, /* 7827 */ IC_VEX_L_OPSIZE, /* 7828 */ IC_VEX_L_OPSIZE, /* 7829 */ IC_VEX_L_OPSIZE, /* 7830 */ IC_VEX_L_OPSIZE, /* 7831 */ IC_VEX_L_W_OPSIZE, /* 7832 */ IC_VEX_L_W_OPSIZE, /* 7833 */ IC_VEX_L_W_OPSIZE, /* 7834 */ IC_VEX_L_W_OPSIZE, /* 7835 */ IC_VEX_L_W_OPSIZE, /* 7836 */ IC_VEX_L_W_OPSIZE, /* 7837 */ IC_VEX_L_W_OPSIZE, /* 7838 */ IC_VEX_L_W_OPSIZE, /* 7839 */ IC_VEX_L, /* 7840 */ IC_VEX_L, /* 7841 */ IC_VEX_L_XS, /* 7842 */ IC_VEX_L_XS, /* 7843 */ IC_VEX_L_XD, /* 7844 */ IC_VEX_L_XD, /* 7845 */ IC_VEX_L_XD, /* 7846 */ IC_VEX_L_XD, /* 7847 */ IC_VEX_L_W, /* 7848 */ IC_VEX_L_W, /* 7849 */ IC_VEX_L_W_XS, /* 7850 */ IC_VEX_L_W_XS, /* 7851 */ IC_VEX_L_W_XD, /* 7852 */ IC_VEX_L_W_XD, /* 7853 */ IC_VEX_L_W_XD, /* 7854 */ IC_VEX_L_W_XD, /* 7855 */ IC_VEX_L_OPSIZE, /* 7856 */ IC_VEX_L_OPSIZE, /* 7857 */ IC_VEX_L_OPSIZE, /* 7858 */ IC_VEX_L_OPSIZE, /* 7859 */ IC_VEX_L_OPSIZE, /* 7860 */ IC_VEX_L_OPSIZE, /* 7861 */ IC_VEX_L_OPSIZE, /* 7862 */ IC_VEX_L_OPSIZE, /* 7863 */ IC_VEX_L_W_OPSIZE, /* 7864 */ IC_VEX_L_W_OPSIZE, /* 7865 */ IC_VEX_L_W_OPSIZE, /* 7866 */ IC_VEX_L_W_OPSIZE, /* 7867 */ IC_VEX_L_W_OPSIZE, /* 7868 */ IC_VEX_L_W_OPSIZE, /* 7869 */ IC_VEX_L_W_OPSIZE, /* 7870 */ IC_VEX_L_W_OPSIZE, /* 7871 */ IC_VEX_L, /* 7872 */ IC_VEX_L, /* 7873 */ IC_VEX_L_XS, /* 7874 */ IC_VEX_L_XS, /* 7875 */ IC_VEX_L_XD, /* 7876 */ IC_VEX_L_XD, /* 7877 */ IC_VEX_L_XD, /* 7878 */ IC_VEX_L_XD, /* 7879 */ IC_VEX_L_W, /* 7880 */ IC_VEX_L_W, /* 7881 */ IC_VEX_L_W_XS, /* 7882 */ IC_VEX_L_W_XS, /* 7883 */ IC_VEX_L_W_XD, /* 7884 */ IC_VEX_L_W_XD, /* 7885 */ IC_VEX_L_W_XD, /* 7886 */ IC_VEX_L_W_XD, /* 7887 */ IC_VEX_L_OPSIZE, /* 7888 */ IC_VEX_L_OPSIZE, /* 7889 */ IC_VEX_L_OPSIZE, /* 7890 */ IC_VEX_L_OPSIZE, /* 7891 */ IC_VEX_L_OPSIZE, /* 7892 */ IC_VEX_L_OPSIZE, /* 7893 */ IC_VEX_L_OPSIZE, /* 7894 */ IC_VEX_L_OPSIZE, /* 7895 */ IC_VEX_L_W_OPSIZE, /* 7896 */ IC_VEX_L_W_OPSIZE, /* 7897 */ IC_VEX_L_W_OPSIZE, /* 7898 */ IC_VEX_L_W_OPSIZE, /* 7899 */ IC_VEX_L_W_OPSIZE, /* 7900 */ IC_VEX_L_W_OPSIZE, /* 7901 */ IC_VEX_L_W_OPSIZE, /* 7902 */ IC_VEX_L_W_OPSIZE, /* 7903 */ IC_VEX_L, /* 7904 */ IC_VEX_L, /* 7905 */ IC_VEX_L_XS, /* 7906 */ IC_VEX_L_XS, /* 7907 */ IC_VEX_L_XD, /* 7908 */ IC_VEX_L_XD, /* 7909 */ IC_VEX_L_XD, /* 7910 */ IC_VEX_L_XD, /* 7911 */ IC_VEX_L_W, /* 7912 */ IC_VEX_L_W, /* 7913 */ IC_VEX_L_W_XS, /* 7914 */ IC_VEX_L_W_XS, /* 7915 */ IC_VEX_L_W_XD, /* 7916 */ IC_VEX_L_W_XD, /* 7917 */ IC_VEX_L_W_XD, /* 7918 */ IC_VEX_L_W_XD, /* 7919 */ IC_VEX_L_OPSIZE, /* 7920 */ IC_VEX_L_OPSIZE, /* 7921 */ IC_VEX_L_OPSIZE, /* 7922 */ IC_VEX_L_OPSIZE, /* 7923 */ IC_VEX_L_OPSIZE, /* 7924 */ IC_VEX_L_OPSIZE, /* 7925 */ IC_VEX_L_OPSIZE, /* 7926 */ IC_VEX_L_OPSIZE, /* 7927 */ IC_VEX_L_W_OPSIZE, /* 7928 */ IC_VEX_L_W_OPSIZE, /* 7929 */ IC_VEX_L_W_OPSIZE, /* 7930 */ IC_VEX_L_W_OPSIZE, /* 7931 */ IC_VEX_L_W_OPSIZE, /* 7932 */ IC_VEX_L_W_OPSIZE, /* 7933 */ IC_VEX_L_W_OPSIZE, /* 7934 */ IC_VEX_L_W_OPSIZE, /* 7935 */ IC_EVEX_L2_KZ, /* 7936 */ IC_EVEX_L2_KZ, /* 7937 */ IC_EVEX_L2_XS_KZ, /* 7938 */ IC_EVEX_L2_XS_KZ, /* 7939 */ IC_EVEX_L2_XD_KZ, /* 7940 */ IC_EVEX_L2_XD_KZ, /* 7941 */ IC_EVEX_L2_XD_KZ, /* 7942 */ IC_EVEX_L2_XD_KZ, /* 7943 */ IC_EVEX_L2_W_KZ, /* 7944 */ IC_EVEX_L2_W_KZ, /* 7945 */ IC_EVEX_L2_W_XS_KZ, /* 7946 */ IC_EVEX_L2_W_XS_KZ, /* 7947 */ IC_EVEX_L2_W_XD_KZ, /* 7948 */ IC_EVEX_L2_W_XD_KZ, /* 7949 */ IC_EVEX_L2_W_XD_KZ, /* 7950 */ IC_EVEX_L2_W_XD_KZ, /* 7951 */ IC_EVEX_L2_OPSIZE_KZ, /* 7952 */ IC_EVEX_L2_OPSIZE_KZ, /* 7953 */ IC_EVEX_L2_OPSIZE_KZ, /* 7954 */ IC_EVEX_L2_OPSIZE_KZ, /* 7955 */ IC_EVEX_L2_OPSIZE_KZ, /* 7956 */ IC_EVEX_L2_OPSIZE_KZ, /* 7957 */ IC_EVEX_L2_OPSIZE_KZ, /* 7958 */ IC_EVEX_L2_OPSIZE_KZ, /* 7959 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7960 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7961 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7962 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7963 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7964 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7965 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7966 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7967 */ IC_EVEX_L2_KZ, /* 7968 */ IC_EVEX_L2_KZ, /* 7969 */ IC_EVEX_L2_XS_KZ, /* 7970 */ IC_EVEX_L2_XS_KZ, /* 7971 */ IC_EVEX_L2_XD_KZ, /* 7972 */ IC_EVEX_L2_XD_KZ, /* 7973 */ IC_EVEX_L2_XD_KZ, /* 7974 */ IC_EVEX_L2_XD_KZ, /* 7975 */ IC_EVEX_L2_W_KZ, /* 7976 */ IC_EVEX_L2_W_KZ, /* 7977 */ IC_EVEX_L2_W_XS_KZ, /* 7978 */ IC_EVEX_L2_W_XS_KZ, /* 7979 */ IC_EVEX_L2_W_XD_KZ, /* 7980 */ IC_EVEX_L2_W_XD_KZ, /* 7981 */ IC_EVEX_L2_W_XD_KZ, /* 7982 */ IC_EVEX_L2_W_XD_KZ, /* 7983 */ IC_EVEX_L2_OPSIZE_KZ, /* 7984 */ IC_EVEX_L2_OPSIZE_KZ, /* 7985 */ IC_EVEX_L2_OPSIZE_KZ, /* 7986 */ IC_EVEX_L2_OPSIZE_KZ, /* 7987 */ IC_EVEX_L2_OPSIZE_KZ, /* 7988 */ IC_EVEX_L2_OPSIZE_KZ, /* 7989 */ IC_EVEX_L2_OPSIZE_KZ, /* 7990 */ IC_EVEX_L2_OPSIZE_KZ, /* 7991 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7992 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7993 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7994 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7995 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7996 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7997 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7998 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 7999 */ IC_EVEX_L2_KZ, /* 8000 */ IC_EVEX_L2_KZ, /* 8001 */ IC_EVEX_L2_XS_KZ, /* 8002 */ IC_EVEX_L2_XS_KZ, /* 8003 */ IC_EVEX_L2_XD_KZ, /* 8004 */ IC_EVEX_L2_XD_KZ, /* 8005 */ IC_EVEX_L2_XD_KZ, /* 8006 */ IC_EVEX_L2_XD_KZ, /* 8007 */ IC_EVEX_L2_W_KZ, /* 8008 */ IC_EVEX_L2_W_KZ, /* 8009 */ IC_EVEX_L2_W_XS_KZ, /* 8010 */ IC_EVEX_L2_W_XS_KZ, /* 8011 */ IC_EVEX_L2_W_XD_KZ, /* 8012 */ IC_EVEX_L2_W_XD_KZ, /* 8013 */ IC_EVEX_L2_W_XD_KZ, /* 8014 */ IC_EVEX_L2_W_XD_KZ, /* 8015 */ IC_EVEX_L2_OPSIZE_KZ, /* 8016 */ IC_EVEX_L2_OPSIZE_KZ, /* 8017 */ IC_EVEX_L2_OPSIZE_KZ, /* 8018 */ IC_EVEX_L2_OPSIZE_KZ, /* 8019 */ IC_EVEX_L2_OPSIZE_KZ, /* 8020 */ IC_EVEX_L2_OPSIZE_KZ, /* 8021 */ IC_EVEX_L2_OPSIZE_KZ, /* 8022 */ IC_EVEX_L2_OPSIZE_KZ, /* 8023 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8024 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8025 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8026 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8027 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8028 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8029 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8030 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8031 */ IC_EVEX_L2_KZ, /* 8032 */ IC_EVEX_L2_KZ, /* 8033 */ IC_EVEX_L2_XS_KZ, /* 8034 */ IC_EVEX_L2_XS_KZ, /* 8035 */ IC_EVEX_L2_XD_KZ, /* 8036 */ IC_EVEX_L2_XD_KZ, /* 8037 */ IC_EVEX_L2_XD_KZ, /* 8038 */ IC_EVEX_L2_XD_KZ, /* 8039 */ IC_EVEX_L2_W_KZ, /* 8040 */ IC_EVEX_L2_W_KZ, /* 8041 */ IC_EVEX_L2_W_XS_KZ, /* 8042 */ IC_EVEX_L2_W_XS_KZ, /* 8043 */ IC_EVEX_L2_W_XD_KZ, /* 8044 */ IC_EVEX_L2_W_XD_KZ, /* 8045 */ IC_EVEX_L2_W_XD_KZ, /* 8046 */ IC_EVEX_L2_W_XD_KZ, /* 8047 */ IC_EVEX_L2_OPSIZE_KZ, /* 8048 */ IC_EVEX_L2_OPSIZE_KZ, /* 8049 */ IC_EVEX_L2_OPSIZE_KZ, /* 8050 */ IC_EVEX_L2_OPSIZE_KZ, /* 8051 */ IC_EVEX_L2_OPSIZE_KZ, /* 8052 */ IC_EVEX_L2_OPSIZE_KZ, /* 8053 */ IC_EVEX_L2_OPSIZE_KZ, /* 8054 */ IC_EVEX_L2_OPSIZE_KZ, /* 8055 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8056 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8057 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8058 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8059 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8060 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8061 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8062 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8063 */ IC_EVEX_L2_KZ, /* 8064 */ IC_EVEX_L2_KZ, /* 8065 */ IC_EVEX_L2_XS_KZ, /* 8066 */ IC_EVEX_L2_XS_KZ, /* 8067 */ IC_EVEX_L2_XD_KZ, /* 8068 */ IC_EVEX_L2_XD_KZ, /* 8069 */ IC_EVEX_L2_XD_KZ, /* 8070 */ IC_EVEX_L2_XD_KZ, /* 8071 */ IC_EVEX_L2_W_KZ, /* 8072 */ IC_EVEX_L2_W_KZ, /* 8073 */ IC_EVEX_L2_W_XS_KZ, /* 8074 */ IC_EVEX_L2_W_XS_KZ, /* 8075 */ IC_EVEX_L2_W_XD_KZ, /* 8076 */ IC_EVEX_L2_W_XD_KZ, /* 8077 */ IC_EVEX_L2_W_XD_KZ, /* 8078 */ IC_EVEX_L2_W_XD_KZ, /* 8079 */ IC_EVEX_L2_OPSIZE_KZ, /* 8080 */ IC_EVEX_L2_OPSIZE_KZ, /* 8081 */ IC_EVEX_L2_OPSIZE_KZ, /* 8082 */ IC_EVEX_L2_OPSIZE_KZ, /* 8083 */ IC_EVEX_L2_OPSIZE_KZ, /* 8084 */ IC_EVEX_L2_OPSIZE_KZ, /* 8085 */ IC_EVEX_L2_OPSIZE_KZ, /* 8086 */ IC_EVEX_L2_OPSIZE_KZ, /* 8087 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8088 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8089 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8090 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8091 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8092 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8093 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8094 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8095 */ IC_EVEX_L2_KZ, /* 8096 */ IC_EVEX_L2_KZ, /* 8097 */ IC_EVEX_L2_XS_KZ, /* 8098 */ IC_EVEX_L2_XS_KZ, /* 8099 */ IC_EVEX_L2_XD_KZ, /* 8100 */ IC_EVEX_L2_XD_KZ, /* 8101 */ IC_EVEX_L2_XD_KZ, /* 8102 */ IC_EVEX_L2_XD_KZ, /* 8103 */ IC_EVEX_L2_W_KZ, /* 8104 */ IC_EVEX_L2_W_KZ, /* 8105 */ IC_EVEX_L2_W_XS_KZ, /* 8106 */ IC_EVEX_L2_W_XS_KZ, /* 8107 */ IC_EVEX_L2_W_XD_KZ, /* 8108 */ IC_EVEX_L2_W_XD_KZ, /* 8109 */ IC_EVEX_L2_W_XD_KZ, /* 8110 */ IC_EVEX_L2_W_XD_KZ, /* 8111 */ IC_EVEX_L2_OPSIZE_KZ, /* 8112 */ IC_EVEX_L2_OPSIZE_KZ, /* 8113 */ IC_EVEX_L2_OPSIZE_KZ, /* 8114 */ IC_EVEX_L2_OPSIZE_KZ, /* 8115 */ IC_EVEX_L2_OPSIZE_KZ, /* 8116 */ IC_EVEX_L2_OPSIZE_KZ, /* 8117 */ IC_EVEX_L2_OPSIZE_KZ, /* 8118 */ IC_EVEX_L2_OPSIZE_KZ, /* 8119 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8120 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8121 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8122 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8123 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8124 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8125 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8126 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8127 */ IC_EVEX_L2_KZ, /* 8128 */ IC_EVEX_L2_KZ, /* 8129 */ IC_EVEX_L2_XS_KZ, /* 8130 */ IC_EVEX_L2_XS_KZ, /* 8131 */ IC_EVEX_L2_XD_KZ, /* 8132 */ IC_EVEX_L2_XD_KZ, /* 8133 */ IC_EVEX_L2_XD_KZ, /* 8134 */ IC_EVEX_L2_XD_KZ, /* 8135 */ IC_EVEX_L2_W_KZ, /* 8136 */ IC_EVEX_L2_W_KZ, /* 8137 */ IC_EVEX_L2_W_XS_KZ, /* 8138 */ IC_EVEX_L2_W_XS_KZ, /* 8139 */ IC_EVEX_L2_W_XD_KZ, /* 8140 */ IC_EVEX_L2_W_XD_KZ, /* 8141 */ IC_EVEX_L2_W_XD_KZ, /* 8142 */ IC_EVEX_L2_W_XD_KZ, /* 8143 */ IC_EVEX_L2_OPSIZE_KZ, /* 8144 */ IC_EVEX_L2_OPSIZE_KZ, /* 8145 */ IC_EVEX_L2_OPSIZE_KZ, /* 8146 */ IC_EVEX_L2_OPSIZE_KZ, /* 8147 */ IC_EVEX_L2_OPSIZE_KZ, /* 8148 */ IC_EVEX_L2_OPSIZE_KZ, /* 8149 */ IC_EVEX_L2_OPSIZE_KZ, /* 8150 */ IC_EVEX_L2_OPSIZE_KZ, /* 8151 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8152 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8153 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8154 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8155 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8156 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8157 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8158 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8159 */ IC_EVEX_L2_KZ, /* 8160 */ IC_EVEX_L2_KZ, /* 8161 */ IC_EVEX_L2_XS_KZ, /* 8162 */ IC_EVEX_L2_XS_KZ, /* 8163 */ IC_EVEX_L2_XD_KZ, /* 8164 */ IC_EVEX_L2_XD_KZ, /* 8165 */ IC_EVEX_L2_XD_KZ, /* 8166 */ IC_EVEX_L2_XD_KZ, /* 8167 */ IC_EVEX_L2_W_KZ, /* 8168 */ IC_EVEX_L2_W_KZ, /* 8169 */ IC_EVEX_L2_W_XS_KZ, /* 8170 */ IC_EVEX_L2_W_XS_KZ, /* 8171 */ IC_EVEX_L2_W_XD_KZ, /* 8172 */ IC_EVEX_L2_W_XD_KZ, /* 8173 */ IC_EVEX_L2_W_XD_KZ, /* 8174 */ IC_EVEX_L2_W_XD_KZ, /* 8175 */ IC_EVEX_L2_OPSIZE_KZ, /* 8176 */ IC_EVEX_L2_OPSIZE_KZ, /* 8177 */ IC_EVEX_L2_OPSIZE_KZ, /* 8178 */ IC_EVEX_L2_OPSIZE_KZ, /* 8179 */ IC_EVEX_L2_OPSIZE_KZ, /* 8180 */ IC_EVEX_L2_OPSIZE_KZ, /* 8181 */ IC_EVEX_L2_OPSIZE_KZ, /* 8182 */ IC_EVEX_L2_OPSIZE_KZ, /* 8183 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8184 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8185 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8186 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8187 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8188 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8189 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8190 */ IC_EVEX_L2_W_OPSIZE_KZ, /* 8191 */ IC, /* 8192 */ IC_64BIT, /* 8193 */ IC_XS, /* 8194 */ IC_64BIT_XS, /* 8195 */ IC_XD, /* 8196 */ IC_64BIT_XD, /* 8197 */ IC_XS, /* 8198 */ IC_64BIT_XS, /* 8199 */ IC, /* 8200 */ IC_64BIT_REXW, /* 8201 */ IC_XS, /* 8202 */ IC_64BIT_REXW_XS, /* 8203 */ IC_XD, /* 8204 */ IC_64BIT_REXW_XD, /* 8205 */ IC_XS, /* 8206 */ IC_64BIT_REXW_XS, /* 8207 */ IC_OPSIZE, /* 8208 */ IC_64BIT_OPSIZE, /* 8209 */ IC_XS_OPSIZE, /* 8210 */ IC_64BIT_XS_OPSIZE, /* 8211 */ IC_XD_OPSIZE, /* 8212 */ IC_64BIT_XD_OPSIZE, /* 8213 */ IC_XS_OPSIZE, /* 8214 */ IC_64BIT_XD_OPSIZE, /* 8215 */ IC_OPSIZE, /* 8216 */ IC_64BIT_REXW_OPSIZE, /* 8217 */ IC_XS_OPSIZE, /* 8218 */ IC_64BIT_REXW_XS, /* 8219 */ IC_XD_OPSIZE, /* 8220 */ IC_64BIT_REXW_XD, /* 8221 */ IC_XS_OPSIZE, /* 8222 */ IC_64BIT_REXW_XS, /* 8223 */ IC_ADSIZE, /* 8224 */ IC_64BIT_ADSIZE, /* 8225 */ IC_XS, /* 8226 */ IC_64BIT_XS, /* 8227 */ IC_XD, /* 8228 */ IC_64BIT_XD, /* 8229 */ IC_XS, /* 8230 */ IC_64BIT_XS, /* 8231 */ IC_ADSIZE, /* 8232 */ IC_64BIT_REXW_ADSIZE, /* 8233 */ IC_XS, /* 8234 */ IC_64BIT_REXW_XS, /* 8235 */ IC_XD, /* 8236 */ IC_64BIT_REXW_XD, /* 8237 */ IC_XS, /* 8238 */ IC_64BIT_REXW_XS, /* 8239 */ IC_OPSIZE_ADSIZE, /* 8240 */ IC_64BIT_OPSIZE_ADSIZE, /* 8241 */ IC_XS_OPSIZE, /* 8242 */ IC_64BIT_XS_OPSIZE, /* 8243 */ IC_XD_OPSIZE, /* 8244 */ IC_64BIT_XD_OPSIZE, /* 8245 */ IC_XS_OPSIZE, /* 8246 */ IC_64BIT_XD_OPSIZE, /* 8247 */ IC_OPSIZE_ADSIZE, /* 8248 */ IC_64BIT_REXW_OPSIZE, /* 8249 */ IC_XS_OPSIZE, /* 8250 */ IC_64BIT_REXW_XS, /* 8251 */ IC_XD_OPSIZE, /* 8252 */ IC_64BIT_REXW_XD, /* 8253 */ IC_XS_OPSIZE, /* 8254 */ IC_64BIT_REXW_XS, /* 8255 */ IC_VEX, /* 8256 */ IC_VEX, /* 8257 */ IC_VEX_XS, /* 8258 */ IC_VEX_XS, /* 8259 */ IC_VEX_XD, /* 8260 */ IC_VEX_XD, /* 8261 */ IC_VEX_XD, /* 8262 */ IC_VEX_XD, /* 8263 */ IC_VEX_W, /* 8264 */ IC_VEX_W, /* 8265 */ IC_VEX_W_XS, /* 8266 */ IC_VEX_W_XS, /* 8267 */ IC_VEX_W_XD, /* 8268 */ IC_VEX_W_XD, /* 8269 */ IC_VEX_W_XD, /* 8270 */ IC_VEX_W_XD, /* 8271 */ IC_VEX_OPSIZE, /* 8272 */ IC_VEX_OPSIZE, /* 8273 */ IC_VEX_OPSIZE, /* 8274 */ IC_VEX_OPSIZE, /* 8275 */ IC_VEX_OPSIZE, /* 8276 */ IC_VEX_OPSIZE, /* 8277 */ IC_VEX_OPSIZE, /* 8278 */ IC_VEX_OPSIZE, /* 8279 */ IC_VEX_W_OPSIZE, /* 8280 */ IC_VEX_W_OPSIZE, /* 8281 */ IC_VEX_W_OPSIZE, /* 8282 */ IC_VEX_W_OPSIZE, /* 8283 */ IC_VEX_W_OPSIZE, /* 8284 */ IC_VEX_W_OPSIZE, /* 8285 */ IC_VEX_W_OPSIZE, /* 8286 */ IC_VEX_W_OPSIZE, /* 8287 */ IC_VEX, /* 8288 */ IC_VEX, /* 8289 */ IC_VEX_XS, /* 8290 */ IC_VEX_XS, /* 8291 */ IC_VEX_XD, /* 8292 */ IC_VEX_XD, /* 8293 */ IC_VEX_XD, /* 8294 */ IC_VEX_XD, /* 8295 */ IC_VEX_W, /* 8296 */ IC_VEX_W, /* 8297 */ IC_VEX_W_XS, /* 8298 */ IC_VEX_W_XS, /* 8299 */ IC_VEX_W_XD, /* 8300 */ IC_VEX_W_XD, /* 8301 */ IC_VEX_W_XD, /* 8302 */ IC_VEX_W_XD, /* 8303 */ IC_VEX_OPSIZE, /* 8304 */ IC_VEX_OPSIZE, /* 8305 */ IC_VEX_OPSIZE, /* 8306 */ IC_VEX_OPSIZE, /* 8307 */ IC_VEX_OPSIZE, /* 8308 */ IC_VEX_OPSIZE, /* 8309 */ IC_VEX_OPSIZE, /* 8310 */ IC_VEX_OPSIZE, /* 8311 */ IC_VEX_W_OPSIZE, /* 8312 */ IC_VEX_W_OPSIZE, /* 8313 */ IC_VEX_W_OPSIZE, /* 8314 */ IC_VEX_W_OPSIZE, /* 8315 */ IC_VEX_W_OPSIZE, /* 8316 */ IC_VEX_W_OPSIZE, /* 8317 */ IC_VEX_W_OPSIZE, /* 8318 */ IC_VEX_W_OPSIZE, /* 8319 */ IC_VEX_L, /* 8320 */ IC_VEX_L, /* 8321 */ IC_VEX_L_XS, /* 8322 */ IC_VEX_L_XS, /* 8323 */ IC_VEX_L_XD, /* 8324 */ IC_VEX_L_XD, /* 8325 */ IC_VEX_L_XD, /* 8326 */ IC_VEX_L_XD, /* 8327 */ IC_VEX_L_W, /* 8328 */ IC_VEX_L_W, /* 8329 */ IC_VEX_L_W_XS, /* 8330 */ IC_VEX_L_W_XS, /* 8331 */ IC_VEX_L_W_XD, /* 8332 */ IC_VEX_L_W_XD, /* 8333 */ IC_VEX_L_W_XD, /* 8334 */ IC_VEX_L_W_XD, /* 8335 */ IC_VEX_L_OPSIZE, /* 8336 */ IC_VEX_L_OPSIZE, /* 8337 */ IC_VEX_L_OPSIZE, /* 8338 */ IC_VEX_L_OPSIZE, /* 8339 */ IC_VEX_L_OPSIZE, /* 8340 */ IC_VEX_L_OPSIZE, /* 8341 */ IC_VEX_L_OPSIZE, /* 8342 */ IC_VEX_L_OPSIZE, /* 8343 */ IC_VEX_L_W_OPSIZE, /* 8344 */ IC_VEX_L_W_OPSIZE, /* 8345 */ IC_VEX_L_W_OPSIZE, /* 8346 */ IC_VEX_L_W_OPSIZE, /* 8347 */ IC_VEX_L_W_OPSIZE, /* 8348 */ IC_VEX_L_W_OPSIZE, /* 8349 */ IC_VEX_L_W_OPSIZE, /* 8350 */ IC_VEX_L_W_OPSIZE, /* 8351 */ IC_VEX_L, /* 8352 */ IC_VEX_L, /* 8353 */ IC_VEX_L_XS, /* 8354 */ IC_VEX_L_XS, /* 8355 */ IC_VEX_L_XD, /* 8356 */ IC_VEX_L_XD, /* 8357 */ IC_VEX_L_XD, /* 8358 */ IC_VEX_L_XD, /* 8359 */ IC_VEX_L_W, /* 8360 */ IC_VEX_L_W, /* 8361 */ IC_VEX_L_W_XS, /* 8362 */ IC_VEX_L_W_XS, /* 8363 */ IC_VEX_L_W_XD, /* 8364 */ IC_VEX_L_W_XD, /* 8365 */ IC_VEX_L_W_XD, /* 8366 */ IC_VEX_L_W_XD, /* 8367 */ IC_VEX_L_OPSIZE, /* 8368 */ IC_VEX_L_OPSIZE, /* 8369 */ IC_VEX_L_OPSIZE, /* 8370 */ IC_VEX_L_OPSIZE, /* 8371 */ IC_VEX_L_OPSIZE, /* 8372 */ IC_VEX_L_OPSIZE, /* 8373 */ IC_VEX_L_OPSIZE, /* 8374 */ IC_VEX_L_OPSIZE, /* 8375 */ IC_VEX_L_W_OPSIZE, /* 8376 */ IC_VEX_L_W_OPSIZE, /* 8377 */ IC_VEX_L_W_OPSIZE, /* 8378 */ IC_VEX_L_W_OPSIZE, /* 8379 */ IC_VEX_L_W_OPSIZE, /* 8380 */ IC_VEX_L_W_OPSIZE, /* 8381 */ IC_VEX_L_W_OPSIZE, /* 8382 */ IC_VEX_L_W_OPSIZE, /* 8383 */ IC_VEX_L, /* 8384 */ IC_VEX_L, /* 8385 */ IC_VEX_L_XS, /* 8386 */ IC_VEX_L_XS, /* 8387 */ IC_VEX_L_XD, /* 8388 */ IC_VEX_L_XD, /* 8389 */ IC_VEX_L_XD, /* 8390 */ IC_VEX_L_XD, /* 8391 */ IC_VEX_L_W, /* 8392 */ IC_VEX_L_W, /* 8393 */ IC_VEX_L_W_XS, /* 8394 */ IC_VEX_L_W_XS, /* 8395 */ IC_VEX_L_W_XD, /* 8396 */ IC_VEX_L_W_XD, /* 8397 */ IC_VEX_L_W_XD, /* 8398 */ IC_VEX_L_W_XD, /* 8399 */ IC_VEX_L_OPSIZE, /* 8400 */ IC_VEX_L_OPSIZE, /* 8401 */ IC_VEX_L_OPSIZE, /* 8402 */ IC_VEX_L_OPSIZE, /* 8403 */ IC_VEX_L_OPSIZE, /* 8404 */ IC_VEX_L_OPSIZE, /* 8405 */ IC_VEX_L_OPSIZE, /* 8406 */ IC_VEX_L_OPSIZE, /* 8407 */ IC_VEX_L_W_OPSIZE, /* 8408 */ IC_VEX_L_W_OPSIZE, /* 8409 */ IC_VEX_L_W_OPSIZE, /* 8410 */ IC_VEX_L_W_OPSIZE, /* 8411 */ IC_VEX_L_W_OPSIZE, /* 8412 */ IC_VEX_L_W_OPSIZE, /* 8413 */ IC_VEX_L_W_OPSIZE, /* 8414 */ IC_VEX_L_W_OPSIZE, /* 8415 */ IC_VEX_L, /* 8416 */ IC_VEX_L, /* 8417 */ IC_VEX_L_XS, /* 8418 */ IC_VEX_L_XS, /* 8419 */ IC_VEX_L_XD, /* 8420 */ IC_VEX_L_XD, /* 8421 */ IC_VEX_L_XD, /* 8422 */ IC_VEX_L_XD, /* 8423 */ IC_VEX_L_W, /* 8424 */ IC_VEX_L_W, /* 8425 */ IC_VEX_L_W_XS, /* 8426 */ IC_VEX_L_W_XS, /* 8427 */ IC_VEX_L_W_XD, /* 8428 */ IC_VEX_L_W_XD, /* 8429 */ IC_VEX_L_W_XD, /* 8430 */ IC_VEX_L_W_XD, /* 8431 */ IC_VEX_L_OPSIZE, /* 8432 */ IC_VEX_L_OPSIZE, /* 8433 */ IC_VEX_L_OPSIZE, /* 8434 */ IC_VEX_L_OPSIZE, /* 8435 */ IC_VEX_L_OPSIZE, /* 8436 */ IC_VEX_L_OPSIZE, /* 8437 */ IC_VEX_L_OPSIZE, /* 8438 */ IC_VEX_L_OPSIZE, /* 8439 */ IC_VEX_L_W_OPSIZE, /* 8440 */ IC_VEX_L_W_OPSIZE, /* 8441 */ IC_VEX_L_W_OPSIZE, /* 8442 */ IC_VEX_L_W_OPSIZE, /* 8443 */ IC_VEX_L_W_OPSIZE, /* 8444 */ IC_VEX_L_W_OPSIZE, /* 8445 */ IC_VEX_L_W_OPSIZE, /* 8446 */ IC_VEX_L_W_OPSIZE, /* 8447 */ IC_EVEX_B, /* 8448 */ IC_EVEX_B, /* 8449 */ IC_EVEX_XS_B, /* 8450 */ IC_EVEX_XS_B, /* 8451 */ IC_EVEX_XD_B, /* 8452 */ IC_EVEX_XD_B, /* 8453 */ IC_EVEX_XD_B, /* 8454 */ IC_EVEX_XD_B, /* 8455 */ IC_EVEX_W_B, /* 8456 */ IC_EVEX_W_B, /* 8457 */ IC_EVEX_W_XS_B, /* 8458 */ IC_EVEX_W_XS_B, /* 8459 */ IC_EVEX_W_XD_B, /* 8460 */ IC_EVEX_W_XD_B, /* 8461 */ IC_EVEX_W_XD_B, /* 8462 */ IC_EVEX_W_XD_B, /* 8463 */ IC_EVEX_OPSIZE_B, /* 8464 */ IC_EVEX_OPSIZE_B, /* 8465 */ IC_EVEX_OPSIZE_B, /* 8466 */ IC_EVEX_OPSIZE_B, /* 8467 */ IC_EVEX_OPSIZE_B, /* 8468 */ IC_EVEX_OPSIZE_B, /* 8469 */ IC_EVEX_OPSIZE_B, /* 8470 */ IC_EVEX_OPSIZE_B, /* 8471 */ IC_EVEX_W_OPSIZE_B, /* 8472 */ IC_EVEX_W_OPSIZE_B, /* 8473 */ IC_EVEX_W_OPSIZE_B, /* 8474 */ IC_EVEX_W_OPSIZE_B, /* 8475 */ IC_EVEX_W_OPSIZE_B, /* 8476 */ IC_EVEX_W_OPSIZE_B, /* 8477 */ IC_EVEX_W_OPSIZE_B, /* 8478 */ IC_EVEX_W_OPSIZE_B, /* 8479 */ IC_EVEX_B, /* 8480 */ IC_EVEX_B, /* 8481 */ IC_EVEX_XS_B, /* 8482 */ IC_EVEX_XS_B, /* 8483 */ IC_EVEX_XD_B, /* 8484 */ IC_EVEX_XD_B, /* 8485 */ IC_EVEX_XD_B, /* 8486 */ IC_EVEX_XD_B, /* 8487 */ IC_EVEX_W_B, /* 8488 */ IC_EVEX_W_B, /* 8489 */ IC_EVEX_W_XS_B, /* 8490 */ IC_EVEX_W_XS_B, /* 8491 */ IC_EVEX_W_XD_B, /* 8492 */ IC_EVEX_W_XD_B, /* 8493 */ IC_EVEX_W_XD_B, /* 8494 */ IC_EVEX_W_XD_B, /* 8495 */ IC_EVEX_OPSIZE_B, /* 8496 */ IC_EVEX_OPSIZE_B, /* 8497 */ IC_EVEX_OPSIZE_B, /* 8498 */ IC_EVEX_OPSIZE_B, /* 8499 */ IC_EVEX_OPSIZE_B, /* 8500 */ IC_EVEX_OPSIZE_B, /* 8501 */ IC_EVEX_OPSIZE_B, /* 8502 */ IC_EVEX_OPSIZE_B, /* 8503 */ IC_EVEX_W_OPSIZE_B, /* 8504 */ IC_EVEX_W_OPSIZE_B, /* 8505 */ IC_EVEX_W_OPSIZE_B, /* 8506 */ IC_EVEX_W_OPSIZE_B, /* 8507 */ IC_EVEX_W_OPSIZE_B, /* 8508 */ IC_EVEX_W_OPSIZE_B, /* 8509 */ IC_EVEX_W_OPSIZE_B, /* 8510 */ IC_EVEX_W_OPSIZE_B, /* 8511 */ IC_EVEX_B, /* 8512 */ IC_EVEX_B, /* 8513 */ IC_EVEX_XS_B, /* 8514 */ IC_EVEX_XS_B, /* 8515 */ IC_EVEX_XD_B, /* 8516 */ IC_EVEX_XD_B, /* 8517 */ IC_EVEX_XD_B, /* 8518 */ IC_EVEX_XD_B, /* 8519 */ IC_EVEX_W_B, /* 8520 */ IC_EVEX_W_B, /* 8521 */ IC_EVEX_W_XS_B, /* 8522 */ IC_EVEX_W_XS_B, /* 8523 */ IC_EVEX_W_XD_B, /* 8524 */ IC_EVEX_W_XD_B, /* 8525 */ IC_EVEX_W_XD_B, /* 8526 */ IC_EVEX_W_XD_B, /* 8527 */ IC_EVEX_OPSIZE_B, /* 8528 */ IC_EVEX_OPSIZE_B, /* 8529 */ IC_EVEX_OPSIZE_B, /* 8530 */ IC_EVEX_OPSIZE_B, /* 8531 */ IC_EVEX_OPSIZE_B, /* 8532 */ IC_EVEX_OPSIZE_B, /* 8533 */ IC_EVEX_OPSIZE_B, /* 8534 */ IC_EVEX_OPSIZE_B, /* 8535 */ IC_EVEX_W_OPSIZE_B, /* 8536 */ IC_EVEX_W_OPSIZE_B, /* 8537 */ IC_EVEX_W_OPSIZE_B, /* 8538 */ IC_EVEX_W_OPSIZE_B, /* 8539 */ IC_EVEX_W_OPSIZE_B, /* 8540 */ IC_EVEX_W_OPSIZE_B, /* 8541 */ IC_EVEX_W_OPSIZE_B, /* 8542 */ IC_EVEX_W_OPSIZE_B, /* 8543 */ IC_EVEX_B, /* 8544 */ IC_EVEX_B, /* 8545 */ IC_EVEX_XS_B, /* 8546 */ IC_EVEX_XS_B, /* 8547 */ IC_EVEX_XD_B, /* 8548 */ IC_EVEX_XD_B, /* 8549 */ IC_EVEX_XD_B, /* 8550 */ IC_EVEX_XD_B, /* 8551 */ IC_EVEX_W_B, /* 8552 */ IC_EVEX_W_B, /* 8553 */ IC_EVEX_W_XS_B, /* 8554 */ IC_EVEX_W_XS_B, /* 8555 */ IC_EVEX_W_XD_B, /* 8556 */ IC_EVEX_W_XD_B, /* 8557 */ IC_EVEX_W_XD_B, /* 8558 */ IC_EVEX_W_XD_B, /* 8559 */ IC_EVEX_OPSIZE_B, /* 8560 */ IC_EVEX_OPSIZE_B, /* 8561 */ IC_EVEX_OPSIZE_B, /* 8562 */ IC_EVEX_OPSIZE_B, /* 8563 */ IC_EVEX_OPSIZE_B, /* 8564 */ IC_EVEX_OPSIZE_B, /* 8565 */ IC_EVEX_OPSIZE_B, /* 8566 */ IC_EVEX_OPSIZE_B, /* 8567 */ IC_EVEX_W_OPSIZE_B, /* 8568 */ IC_EVEX_W_OPSIZE_B, /* 8569 */ IC_EVEX_W_OPSIZE_B, /* 8570 */ IC_EVEX_W_OPSIZE_B, /* 8571 */ IC_EVEX_W_OPSIZE_B, /* 8572 */ IC_EVEX_W_OPSIZE_B, /* 8573 */ IC_EVEX_W_OPSIZE_B, /* 8574 */ IC_EVEX_W_OPSIZE_B, /* 8575 */ IC_EVEX_B, /* 8576 */ IC_EVEX_B, /* 8577 */ IC_EVEX_XS_B, /* 8578 */ IC_EVEX_XS_B, /* 8579 */ IC_EVEX_XD_B, /* 8580 */ IC_EVEX_XD_B, /* 8581 */ IC_EVEX_XD_B, /* 8582 */ IC_EVEX_XD_B, /* 8583 */ IC_EVEX_W_B, /* 8584 */ IC_EVEX_W_B, /* 8585 */ IC_EVEX_W_XS_B, /* 8586 */ IC_EVEX_W_XS_B, /* 8587 */ IC_EVEX_W_XD_B, /* 8588 */ IC_EVEX_W_XD_B, /* 8589 */ IC_EVEX_W_XD_B, /* 8590 */ IC_EVEX_W_XD_B, /* 8591 */ IC_EVEX_OPSIZE_B, /* 8592 */ IC_EVEX_OPSIZE_B, /* 8593 */ IC_EVEX_OPSIZE_B, /* 8594 */ IC_EVEX_OPSIZE_B, /* 8595 */ IC_EVEX_OPSIZE_B, /* 8596 */ IC_EVEX_OPSIZE_B, /* 8597 */ IC_EVEX_OPSIZE_B, /* 8598 */ IC_EVEX_OPSIZE_B, /* 8599 */ IC_EVEX_W_OPSIZE_B, /* 8600 */ IC_EVEX_W_OPSIZE_B, /* 8601 */ IC_EVEX_W_OPSIZE_B, /* 8602 */ IC_EVEX_W_OPSIZE_B, /* 8603 */ IC_EVEX_W_OPSIZE_B, /* 8604 */ IC_EVEX_W_OPSIZE_B, /* 8605 */ IC_EVEX_W_OPSIZE_B, /* 8606 */ IC_EVEX_W_OPSIZE_B, /* 8607 */ IC_EVEX_B, /* 8608 */ IC_EVEX_B, /* 8609 */ IC_EVEX_XS_B, /* 8610 */ IC_EVEX_XS_B, /* 8611 */ IC_EVEX_XD_B, /* 8612 */ IC_EVEX_XD_B, /* 8613 */ IC_EVEX_XD_B, /* 8614 */ IC_EVEX_XD_B, /* 8615 */ IC_EVEX_W_B, /* 8616 */ IC_EVEX_W_B, /* 8617 */ IC_EVEX_W_XS_B, /* 8618 */ IC_EVEX_W_XS_B, /* 8619 */ IC_EVEX_W_XD_B, /* 8620 */ IC_EVEX_W_XD_B, /* 8621 */ IC_EVEX_W_XD_B, /* 8622 */ IC_EVEX_W_XD_B, /* 8623 */ IC_EVEX_OPSIZE_B, /* 8624 */ IC_EVEX_OPSIZE_B, /* 8625 */ IC_EVEX_OPSIZE_B, /* 8626 */ IC_EVEX_OPSIZE_B, /* 8627 */ IC_EVEX_OPSIZE_B, /* 8628 */ IC_EVEX_OPSIZE_B, /* 8629 */ IC_EVEX_OPSIZE_B, /* 8630 */ IC_EVEX_OPSIZE_B, /* 8631 */ IC_EVEX_W_OPSIZE_B, /* 8632 */ IC_EVEX_W_OPSIZE_B, /* 8633 */ IC_EVEX_W_OPSIZE_B, /* 8634 */ IC_EVEX_W_OPSIZE_B, /* 8635 */ IC_EVEX_W_OPSIZE_B, /* 8636 */ IC_EVEX_W_OPSIZE_B, /* 8637 */ IC_EVEX_W_OPSIZE_B, /* 8638 */ IC_EVEX_W_OPSIZE_B, /* 8639 */ IC_EVEX_B, /* 8640 */ IC_EVEX_B, /* 8641 */ IC_EVEX_XS_B, /* 8642 */ IC_EVEX_XS_B, /* 8643 */ IC_EVEX_XD_B, /* 8644 */ IC_EVEX_XD_B, /* 8645 */ IC_EVEX_XD_B, /* 8646 */ IC_EVEX_XD_B, /* 8647 */ IC_EVEX_W_B, /* 8648 */ IC_EVEX_W_B, /* 8649 */ IC_EVEX_W_XS_B, /* 8650 */ IC_EVEX_W_XS_B, /* 8651 */ IC_EVEX_W_XD_B, /* 8652 */ IC_EVEX_W_XD_B, /* 8653 */ IC_EVEX_W_XD_B, /* 8654 */ IC_EVEX_W_XD_B, /* 8655 */ IC_EVEX_OPSIZE_B, /* 8656 */ IC_EVEX_OPSIZE_B, /* 8657 */ IC_EVEX_OPSIZE_B, /* 8658 */ IC_EVEX_OPSIZE_B, /* 8659 */ IC_EVEX_OPSIZE_B, /* 8660 */ IC_EVEX_OPSIZE_B, /* 8661 */ IC_EVEX_OPSIZE_B, /* 8662 */ IC_EVEX_OPSIZE_B, /* 8663 */ IC_EVEX_W_OPSIZE_B, /* 8664 */ IC_EVEX_W_OPSIZE_B, /* 8665 */ IC_EVEX_W_OPSIZE_B, /* 8666 */ IC_EVEX_W_OPSIZE_B, /* 8667 */ IC_EVEX_W_OPSIZE_B, /* 8668 */ IC_EVEX_W_OPSIZE_B, /* 8669 */ IC_EVEX_W_OPSIZE_B, /* 8670 */ IC_EVEX_W_OPSIZE_B, /* 8671 */ IC_EVEX_B, /* 8672 */ IC_EVEX_B, /* 8673 */ IC_EVEX_XS_B, /* 8674 */ IC_EVEX_XS_B, /* 8675 */ IC_EVEX_XD_B, /* 8676 */ IC_EVEX_XD_B, /* 8677 */ IC_EVEX_XD_B, /* 8678 */ IC_EVEX_XD_B, /* 8679 */ IC_EVEX_W_B, /* 8680 */ IC_EVEX_W_B, /* 8681 */ IC_EVEX_W_XS_B, /* 8682 */ IC_EVEX_W_XS_B, /* 8683 */ IC_EVEX_W_XD_B, /* 8684 */ IC_EVEX_W_XD_B, /* 8685 */ IC_EVEX_W_XD_B, /* 8686 */ IC_EVEX_W_XD_B, /* 8687 */ IC_EVEX_OPSIZE_B, /* 8688 */ IC_EVEX_OPSIZE_B, /* 8689 */ IC_EVEX_OPSIZE_B, /* 8690 */ IC_EVEX_OPSIZE_B, /* 8691 */ IC_EVEX_OPSIZE_B, /* 8692 */ IC_EVEX_OPSIZE_B, /* 8693 */ IC_EVEX_OPSIZE_B, /* 8694 */ IC_EVEX_OPSIZE_B, /* 8695 */ IC_EVEX_W_OPSIZE_B, /* 8696 */ IC_EVEX_W_OPSIZE_B, /* 8697 */ IC_EVEX_W_OPSIZE_B, /* 8698 */ IC_EVEX_W_OPSIZE_B, /* 8699 */ IC_EVEX_W_OPSIZE_B, /* 8700 */ IC_EVEX_W_OPSIZE_B, /* 8701 */ IC_EVEX_W_OPSIZE_B, /* 8702 */ IC_EVEX_W_OPSIZE_B, /* 8703 */ IC, /* 8704 */ IC_64BIT, /* 8705 */ IC_XS, /* 8706 */ IC_64BIT_XS, /* 8707 */ IC_XD, /* 8708 */ IC_64BIT_XD, /* 8709 */ IC_XS, /* 8710 */ IC_64BIT_XS, /* 8711 */ IC, /* 8712 */ IC_64BIT_REXW, /* 8713 */ IC_XS, /* 8714 */ IC_64BIT_REXW_XS, /* 8715 */ IC_XD, /* 8716 */ IC_64BIT_REXW_XD, /* 8717 */ IC_XS, /* 8718 */ IC_64BIT_REXW_XS, /* 8719 */ IC_OPSIZE, /* 8720 */ IC_64BIT_OPSIZE, /* 8721 */ IC_XS_OPSIZE, /* 8722 */ IC_64BIT_XS_OPSIZE, /* 8723 */ IC_XD_OPSIZE, /* 8724 */ IC_64BIT_XD_OPSIZE, /* 8725 */ IC_XS_OPSIZE, /* 8726 */ IC_64BIT_XD_OPSIZE, /* 8727 */ IC_OPSIZE, /* 8728 */ IC_64BIT_REXW_OPSIZE, /* 8729 */ IC_XS_OPSIZE, /* 8730 */ IC_64BIT_REXW_XS, /* 8731 */ IC_XD_OPSIZE, /* 8732 */ IC_64BIT_REXW_XD, /* 8733 */ IC_XS_OPSIZE, /* 8734 */ IC_64BIT_REXW_XS, /* 8735 */ IC_ADSIZE, /* 8736 */ IC_64BIT_ADSIZE, /* 8737 */ IC_XS, /* 8738 */ IC_64BIT_XS, /* 8739 */ IC_XD, /* 8740 */ IC_64BIT_XD, /* 8741 */ IC_XS, /* 8742 */ IC_64BIT_XS, /* 8743 */ IC_ADSIZE, /* 8744 */ IC_64BIT_REXW_ADSIZE, /* 8745 */ IC_XS, /* 8746 */ IC_64BIT_REXW_XS, /* 8747 */ IC_XD, /* 8748 */ IC_64BIT_REXW_XD, /* 8749 */ IC_XS, /* 8750 */ IC_64BIT_REXW_XS, /* 8751 */ IC_OPSIZE_ADSIZE, /* 8752 */ IC_64BIT_OPSIZE_ADSIZE, /* 8753 */ IC_XS_OPSIZE, /* 8754 */ IC_64BIT_XS_OPSIZE, /* 8755 */ IC_XD_OPSIZE, /* 8756 */ IC_64BIT_XD_OPSIZE, /* 8757 */ IC_XS_OPSIZE, /* 8758 */ IC_64BIT_XD_OPSIZE, /* 8759 */ IC_OPSIZE_ADSIZE, /* 8760 */ IC_64BIT_REXW_OPSIZE, /* 8761 */ IC_XS_OPSIZE, /* 8762 */ IC_64BIT_REXW_XS, /* 8763 */ IC_XD_OPSIZE, /* 8764 */ IC_64BIT_REXW_XD, /* 8765 */ IC_XS_OPSIZE, /* 8766 */ IC_64BIT_REXW_XS, /* 8767 */ IC_VEX, /* 8768 */ IC_VEX, /* 8769 */ IC_VEX_XS, /* 8770 */ IC_VEX_XS, /* 8771 */ IC_VEX_XD, /* 8772 */ IC_VEX_XD, /* 8773 */ IC_VEX_XD, /* 8774 */ IC_VEX_XD, /* 8775 */ IC_VEX_W, /* 8776 */ IC_VEX_W, /* 8777 */ IC_VEX_W_XS, /* 8778 */ IC_VEX_W_XS, /* 8779 */ IC_VEX_W_XD, /* 8780 */ IC_VEX_W_XD, /* 8781 */ IC_VEX_W_XD, /* 8782 */ IC_VEX_W_XD, /* 8783 */ IC_VEX_OPSIZE, /* 8784 */ IC_VEX_OPSIZE, /* 8785 */ IC_VEX_OPSIZE, /* 8786 */ IC_VEX_OPSIZE, /* 8787 */ IC_VEX_OPSIZE, /* 8788 */ IC_VEX_OPSIZE, /* 8789 */ IC_VEX_OPSIZE, /* 8790 */ IC_VEX_OPSIZE, /* 8791 */ IC_VEX_W_OPSIZE, /* 8792 */ IC_VEX_W_OPSIZE, /* 8793 */ IC_VEX_W_OPSIZE, /* 8794 */ IC_VEX_W_OPSIZE, /* 8795 */ IC_VEX_W_OPSIZE, /* 8796 */ IC_VEX_W_OPSIZE, /* 8797 */ IC_VEX_W_OPSIZE, /* 8798 */ IC_VEX_W_OPSIZE, /* 8799 */ IC_VEX, /* 8800 */ IC_VEX, /* 8801 */ IC_VEX_XS, /* 8802 */ IC_VEX_XS, /* 8803 */ IC_VEX_XD, /* 8804 */ IC_VEX_XD, /* 8805 */ IC_VEX_XD, /* 8806 */ IC_VEX_XD, /* 8807 */ IC_VEX_W, /* 8808 */ IC_VEX_W, /* 8809 */ IC_VEX_W_XS, /* 8810 */ IC_VEX_W_XS, /* 8811 */ IC_VEX_W_XD, /* 8812 */ IC_VEX_W_XD, /* 8813 */ IC_VEX_W_XD, /* 8814 */ IC_VEX_W_XD, /* 8815 */ IC_VEX_OPSIZE, /* 8816 */ IC_VEX_OPSIZE, /* 8817 */ IC_VEX_OPSIZE, /* 8818 */ IC_VEX_OPSIZE, /* 8819 */ IC_VEX_OPSIZE, /* 8820 */ IC_VEX_OPSIZE, /* 8821 */ IC_VEX_OPSIZE, /* 8822 */ IC_VEX_OPSIZE, /* 8823 */ IC_VEX_W_OPSIZE, /* 8824 */ IC_VEX_W_OPSIZE, /* 8825 */ IC_VEX_W_OPSIZE, /* 8826 */ IC_VEX_W_OPSIZE, /* 8827 */ IC_VEX_W_OPSIZE, /* 8828 */ IC_VEX_W_OPSIZE, /* 8829 */ IC_VEX_W_OPSIZE, /* 8830 */ IC_VEX_W_OPSIZE, /* 8831 */ IC_VEX_L, /* 8832 */ IC_VEX_L, /* 8833 */ IC_VEX_L_XS, /* 8834 */ IC_VEX_L_XS, /* 8835 */ IC_VEX_L_XD, /* 8836 */ IC_VEX_L_XD, /* 8837 */ IC_VEX_L_XD, /* 8838 */ IC_VEX_L_XD, /* 8839 */ IC_VEX_L_W, /* 8840 */ IC_VEX_L_W, /* 8841 */ IC_VEX_L_W_XS, /* 8842 */ IC_VEX_L_W_XS, /* 8843 */ IC_VEX_L_W_XD, /* 8844 */ IC_VEX_L_W_XD, /* 8845 */ IC_VEX_L_W_XD, /* 8846 */ IC_VEX_L_W_XD, /* 8847 */ IC_VEX_L_OPSIZE, /* 8848 */ IC_VEX_L_OPSIZE, /* 8849 */ IC_VEX_L_OPSIZE, /* 8850 */ IC_VEX_L_OPSIZE, /* 8851 */ IC_VEX_L_OPSIZE, /* 8852 */ IC_VEX_L_OPSIZE, /* 8853 */ IC_VEX_L_OPSIZE, /* 8854 */ IC_VEX_L_OPSIZE, /* 8855 */ IC_VEX_L_W_OPSIZE, /* 8856 */ IC_VEX_L_W_OPSIZE, /* 8857 */ IC_VEX_L_W_OPSIZE, /* 8858 */ IC_VEX_L_W_OPSIZE, /* 8859 */ IC_VEX_L_W_OPSIZE, /* 8860 */ IC_VEX_L_W_OPSIZE, /* 8861 */ IC_VEX_L_W_OPSIZE, /* 8862 */ IC_VEX_L_W_OPSIZE, /* 8863 */ IC_VEX_L, /* 8864 */ IC_VEX_L, /* 8865 */ IC_VEX_L_XS, /* 8866 */ IC_VEX_L_XS, /* 8867 */ IC_VEX_L_XD, /* 8868 */ IC_VEX_L_XD, /* 8869 */ IC_VEX_L_XD, /* 8870 */ IC_VEX_L_XD, /* 8871 */ IC_VEX_L_W, /* 8872 */ IC_VEX_L_W, /* 8873 */ IC_VEX_L_W_XS, /* 8874 */ IC_VEX_L_W_XS, /* 8875 */ IC_VEX_L_W_XD, /* 8876 */ IC_VEX_L_W_XD, /* 8877 */ IC_VEX_L_W_XD, /* 8878 */ IC_VEX_L_W_XD, /* 8879 */ IC_VEX_L_OPSIZE, /* 8880 */ IC_VEX_L_OPSIZE, /* 8881 */ IC_VEX_L_OPSIZE, /* 8882 */ IC_VEX_L_OPSIZE, /* 8883 */ IC_VEX_L_OPSIZE, /* 8884 */ IC_VEX_L_OPSIZE, /* 8885 */ IC_VEX_L_OPSIZE, /* 8886 */ IC_VEX_L_OPSIZE, /* 8887 */ IC_VEX_L_W_OPSIZE, /* 8888 */ IC_VEX_L_W_OPSIZE, /* 8889 */ IC_VEX_L_W_OPSIZE, /* 8890 */ IC_VEX_L_W_OPSIZE, /* 8891 */ IC_VEX_L_W_OPSIZE, /* 8892 */ IC_VEX_L_W_OPSIZE, /* 8893 */ IC_VEX_L_W_OPSIZE, /* 8894 */ IC_VEX_L_W_OPSIZE, /* 8895 */ IC_VEX_L, /* 8896 */ IC_VEX_L, /* 8897 */ IC_VEX_L_XS, /* 8898 */ IC_VEX_L_XS, /* 8899 */ IC_VEX_L_XD, /* 8900 */ IC_VEX_L_XD, /* 8901 */ IC_VEX_L_XD, /* 8902 */ IC_VEX_L_XD, /* 8903 */ IC_VEX_L_W, /* 8904 */ IC_VEX_L_W, /* 8905 */ IC_VEX_L_W_XS, /* 8906 */ IC_VEX_L_W_XS, /* 8907 */ IC_VEX_L_W_XD, /* 8908 */ IC_VEX_L_W_XD, /* 8909 */ IC_VEX_L_W_XD, /* 8910 */ IC_VEX_L_W_XD, /* 8911 */ IC_VEX_L_OPSIZE, /* 8912 */ IC_VEX_L_OPSIZE, /* 8913 */ IC_VEX_L_OPSIZE, /* 8914 */ IC_VEX_L_OPSIZE, /* 8915 */ IC_VEX_L_OPSIZE, /* 8916 */ IC_VEX_L_OPSIZE, /* 8917 */ IC_VEX_L_OPSIZE, /* 8918 */ IC_VEX_L_OPSIZE, /* 8919 */ IC_VEX_L_W_OPSIZE, /* 8920 */ IC_VEX_L_W_OPSIZE, /* 8921 */ IC_VEX_L_W_OPSIZE, /* 8922 */ IC_VEX_L_W_OPSIZE, /* 8923 */ IC_VEX_L_W_OPSIZE, /* 8924 */ IC_VEX_L_W_OPSIZE, /* 8925 */ IC_VEX_L_W_OPSIZE, /* 8926 */ IC_VEX_L_W_OPSIZE, /* 8927 */ IC_VEX_L, /* 8928 */ IC_VEX_L, /* 8929 */ IC_VEX_L_XS, /* 8930 */ IC_VEX_L_XS, /* 8931 */ IC_VEX_L_XD, /* 8932 */ IC_VEX_L_XD, /* 8933 */ IC_VEX_L_XD, /* 8934 */ IC_VEX_L_XD, /* 8935 */ IC_VEX_L_W, /* 8936 */ IC_VEX_L_W, /* 8937 */ IC_VEX_L_W_XS, /* 8938 */ IC_VEX_L_W_XS, /* 8939 */ IC_VEX_L_W_XD, /* 8940 */ IC_VEX_L_W_XD, /* 8941 */ IC_VEX_L_W_XD, /* 8942 */ IC_VEX_L_W_XD, /* 8943 */ IC_VEX_L_OPSIZE, /* 8944 */ IC_VEX_L_OPSIZE, /* 8945 */ IC_VEX_L_OPSIZE, /* 8946 */ IC_VEX_L_OPSIZE, /* 8947 */ IC_VEX_L_OPSIZE, /* 8948 */ IC_VEX_L_OPSIZE, /* 8949 */ IC_VEX_L_OPSIZE, /* 8950 */ IC_VEX_L_OPSIZE, /* 8951 */ IC_VEX_L_W_OPSIZE, /* 8952 */ IC_VEX_L_W_OPSIZE, /* 8953 */ IC_VEX_L_W_OPSIZE, /* 8954 */ IC_VEX_L_W_OPSIZE, /* 8955 */ IC_VEX_L_W_OPSIZE, /* 8956 */ IC_VEX_L_W_OPSIZE, /* 8957 */ IC_VEX_L_W_OPSIZE, /* 8958 */ IC_VEX_L_W_OPSIZE, /* 8959 */ IC_EVEX_L_B, /* 8960 */ IC_EVEX_L_B, /* 8961 */ IC_EVEX_L_XS_B, /* 8962 */ IC_EVEX_L_XS_B, /* 8963 */ IC_EVEX_L_XD_B, /* 8964 */ IC_EVEX_L_XD_B, /* 8965 */ IC_EVEX_L_XD_B, /* 8966 */ IC_EVEX_L_XD_B, /* 8967 */ IC_EVEX_L_W_B, /* 8968 */ IC_EVEX_L_W_B, /* 8969 */ IC_EVEX_L_W_XS_B, /* 8970 */ IC_EVEX_L_W_XS_B, /* 8971 */ IC_EVEX_L_W_XD_B, /* 8972 */ IC_EVEX_L_W_XD_B, /* 8973 */ IC_EVEX_L_W_XD_B, /* 8974 */ IC_EVEX_L_W_XD_B, /* 8975 */ IC_EVEX_L_OPSIZE_B, /* 8976 */ IC_EVEX_L_OPSIZE_B, /* 8977 */ IC_EVEX_L_OPSIZE_B, /* 8978 */ IC_EVEX_L_OPSIZE_B, /* 8979 */ IC_EVEX_L_OPSIZE_B, /* 8980 */ IC_EVEX_L_OPSIZE_B, /* 8981 */ IC_EVEX_L_OPSIZE_B, /* 8982 */ IC_EVEX_L_OPSIZE_B, /* 8983 */ IC_EVEX_L_W_OPSIZE_B, /* 8984 */ IC_EVEX_L_W_OPSIZE_B, /* 8985 */ IC_EVEX_L_W_OPSIZE_B, /* 8986 */ IC_EVEX_L_W_OPSIZE_B, /* 8987 */ IC_EVEX_L_W_OPSIZE_B, /* 8988 */ IC_EVEX_L_W_OPSIZE_B, /* 8989 */ IC_EVEX_L_W_OPSIZE_B, /* 8990 */ IC_EVEX_L_W_OPSIZE_B, /* 8991 */ IC_EVEX_L_B, /* 8992 */ IC_EVEX_L_B, /* 8993 */ IC_EVEX_L_XS_B, /* 8994 */ IC_EVEX_L_XS_B, /* 8995 */ IC_EVEX_L_XD_B, /* 8996 */ IC_EVEX_L_XD_B, /* 8997 */ IC_EVEX_L_XD_B, /* 8998 */ IC_EVEX_L_XD_B, /* 8999 */ IC_EVEX_L_W_B, /* 9000 */ IC_EVEX_L_W_B, /* 9001 */ IC_EVEX_L_W_XS_B, /* 9002 */ IC_EVEX_L_W_XS_B, /* 9003 */ IC_EVEX_L_W_XD_B, /* 9004 */ IC_EVEX_L_W_XD_B, /* 9005 */ IC_EVEX_L_W_XD_B, /* 9006 */ IC_EVEX_L_W_XD_B, /* 9007 */ IC_EVEX_L_OPSIZE_B, /* 9008 */ IC_EVEX_L_OPSIZE_B, /* 9009 */ IC_EVEX_L_OPSIZE_B, /* 9010 */ IC_EVEX_L_OPSIZE_B, /* 9011 */ IC_EVEX_L_OPSIZE_B, /* 9012 */ IC_EVEX_L_OPSIZE_B, /* 9013 */ IC_EVEX_L_OPSIZE_B, /* 9014 */ IC_EVEX_L_OPSIZE_B, /* 9015 */ IC_EVEX_L_W_OPSIZE_B, /* 9016 */ IC_EVEX_L_W_OPSIZE_B, /* 9017 */ IC_EVEX_L_W_OPSIZE_B, /* 9018 */ IC_EVEX_L_W_OPSIZE_B, /* 9019 */ IC_EVEX_L_W_OPSIZE_B, /* 9020 */ IC_EVEX_L_W_OPSIZE_B, /* 9021 */ IC_EVEX_L_W_OPSIZE_B, /* 9022 */ IC_EVEX_L_W_OPSIZE_B, /* 9023 */ IC_EVEX_L_B, /* 9024 */ IC_EVEX_L_B, /* 9025 */ IC_EVEX_L_XS_B, /* 9026 */ IC_EVEX_L_XS_B, /* 9027 */ IC_EVEX_L_XD_B, /* 9028 */ IC_EVEX_L_XD_B, /* 9029 */ IC_EVEX_L_XD_B, /* 9030 */ IC_EVEX_L_XD_B, /* 9031 */ IC_EVEX_L_W_B, /* 9032 */ IC_EVEX_L_W_B, /* 9033 */ IC_EVEX_L_W_XS_B, /* 9034 */ IC_EVEX_L_W_XS_B, /* 9035 */ IC_EVEX_L_W_XD_B, /* 9036 */ IC_EVEX_L_W_XD_B, /* 9037 */ IC_EVEX_L_W_XD_B, /* 9038 */ IC_EVEX_L_W_XD_B, /* 9039 */ IC_EVEX_L_OPSIZE_B, /* 9040 */ IC_EVEX_L_OPSIZE_B, /* 9041 */ IC_EVEX_L_OPSIZE_B, /* 9042 */ IC_EVEX_L_OPSIZE_B, /* 9043 */ IC_EVEX_L_OPSIZE_B, /* 9044 */ IC_EVEX_L_OPSIZE_B, /* 9045 */ IC_EVEX_L_OPSIZE_B, /* 9046 */ IC_EVEX_L_OPSIZE_B, /* 9047 */ IC_EVEX_L_W_OPSIZE_B, /* 9048 */ IC_EVEX_L_W_OPSIZE_B, /* 9049 */ IC_EVEX_L_W_OPSIZE_B, /* 9050 */ IC_EVEX_L_W_OPSIZE_B, /* 9051 */ IC_EVEX_L_W_OPSIZE_B, /* 9052 */ IC_EVEX_L_W_OPSIZE_B, /* 9053 */ IC_EVEX_L_W_OPSIZE_B, /* 9054 */ IC_EVEX_L_W_OPSIZE_B, /* 9055 */ IC_EVEX_L_B, /* 9056 */ IC_EVEX_L_B, /* 9057 */ IC_EVEX_L_XS_B, /* 9058 */ IC_EVEX_L_XS_B, /* 9059 */ IC_EVEX_L_XD_B, /* 9060 */ IC_EVEX_L_XD_B, /* 9061 */ IC_EVEX_L_XD_B, /* 9062 */ IC_EVEX_L_XD_B, /* 9063 */ IC_EVEX_L_W_B, /* 9064 */ IC_EVEX_L_W_B, /* 9065 */ IC_EVEX_L_W_XS_B, /* 9066 */ IC_EVEX_L_W_XS_B, /* 9067 */ IC_EVEX_L_W_XD_B, /* 9068 */ IC_EVEX_L_W_XD_B, /* 9069 */ IC_EVEX_L_W_XD_B, /* 9070 */ IC_EVEX_L_W_XD_B, /* 9071 */ IC_EVEX_L_OPSIZE_B, /* 9072 */ IC_EVEX_L_OPSIZE_B, /* 9073 */ IC_EVEX_L_OPSIZE_B, /* 9074 */ IC_EVEX_L_OPSIZE_B, /* 9075 */ IC_EVEX_L_OPSIZE_B, /* 9076 */ IC_EVEX_L_OPSIZE_B, /* 9077 */ IC_EVEX_L_OPSIZE_B, /* 9078 */ IC_EVEX_L_OPSIZE_B, /* 9079 */ IC_EVEX_L_W_OPSIZE_B, /* 9080 */ IC_EVEX_L_W_OPSIZE_B, /* 9081 */ IC_EVEX_L_W_OPSIZE_B, /* 9082 */ IC_EVEX_L_W_OPSIZE_B, /* 9083 */ IC_EVEX_L_W_OPSIZE_B, /* 9084 */ IC_EVEX_L_W_OPSIZE_B, /* 9085 */ IC_EVEX_L_W_OPSIZE_B, /* 9086 */ IC_EVEX_L_W_OPSIZE_B, /* 9087 */ IC_EVEX_L_B, /* 9088 */ IC_EVEX_L_B, /* 9089 */ IC_EVEX_L_XS_B, /* 9090 */ IC_EVEX_L_XS_B, /* 9091 */ IC_EVEX_L_XD_B, /* 9092 */ IC_EVEX_L_XD_B, /* 9093 */ IC_EVEX_L_XD_B, /* 9094 */ IC_EVEX_L_XD_B, /* 9095 */ IC_EVEX_L_W_B, /* 9096 */ IC_EVEX_L_W_B, /* 9097 */ IC_EVEX_L_W_XS_B, /* 9098 */ IC_EVEX_L_W_XS_B, /* 9099 */ IC_EVEX_L_W_XD_B, /* 9100 */ IC_EVEX_L_W_XD_B, /* 9101 */ IC_EVEX_L_W_XD_B, /* 9102 */ IC_EVEX_L_W_XD_B, /* 9103 */ IC_EVEX_L_OPSIZE_B, /* 9104 */ IC_EVEX_L_OPSIZE_B, /* 9105 */ IC_EVEX_L_OPSIZE_B, /* 9106 */ IC_EVEX_L_OPSIZE_B, /* 9107 */ IC_EVEX_L_OPSIZE_B, /* 9108 */ IC_EVEX_L_OPSIZE_B, /* 9109 */ IC_EVEX_L_OPSIZE_B, /* 9110 */ IC_EVEX_L_OPSIZE_B, /* 9111 */ IC_EVEX_L_W_OPSIZE_B, /* 9112 */ IC_EVEX_L_W_OPSIZE_B, /* 9113 */ IC_EVEX_L_W_OPSIZE_B, /* 9114 */ IC_EVEX_L_W_OPSIZE_B, /* 9115 */ IC_EVEX_L_W_OPSIZE_B, /* 9116 */ IC_EVEX_L_W_OPSIZE_B, /* 9117 */ IC_EVEX_L_W_OPSIZE_B, /* 9118 */ IC_EVEX_L_W_OPSIZE_B, /* 9119 */ IC_EVEX_L_B, /* 9120 */ IC_EVEX_L_B, /* 9121 */ IC_EVEX_L_XS_B, /* 9122 */ IC_EVEX_L_XS_B, /* 9123 */ IC_EVEX_L_XD_B, /* 9124 */ IC_EVEX_L_XD_B, /* 9125 */ IC_EVEX_L_XD_B, /* 9126 */ IC_EVEX_L_XD_B, /* 9127 */ IC_EVEX_L_W_B, /* 9128 */ IC_EVEX_L_W_B, /* 9129 */ IC_EVEX_L_W_XS_B, /* 9130 */ IC_EVEX_L_W_XS_B, /* 9131 */ IC_EVEX_L_W_XD_B, /* 9132 */ IC_EVEX_L_W_XD_B, /* 9133 */ IC_EVEX_L_W_XD_B, /* 9134 */ IC_EVEX_L_W_XD_B, /* 9135 */ IC_EVEX_L_OPSIZE_B, /* 9136 */ IC_EVEX_L_OPSIZE_B, /* 9137 */ IC_EVEX_L_OPSIZE_B, /* 9138 */ IC_EVEX_L_OPSIZE_B, /* 9139 */ IC_EVEX_L_OPSIZE_B, /* 9140 */ IC_EVEX_L_OPSIZE_B, /* 9141 */ IC_EVEX_L_OPSIZE_B, /* 9142 */ IC_EVEX_L_OPSIZE_B, /* 9143 */ IC_EVEX_L_W_OPSIZE_B, /* 9144 */ IC_EVEX_L_W_OPSIZE_B, /* 9145 */ IC_EVEX_L_W_OPSIZE_B, /* 9146 */ IC_EVEX_L_W_OPSIZE_B, /* 9147 */ IC_EVEX_L_W_OPSIZE_B, /* 9148 */ IC_EVEX_L_W_OPSIZE_B, /* 9149 */ IC_EVEX_L_W_OPSIZE_B, /* 9150 */ IC_EVEX_L_W_OPSIZE_B, /* 9151 */ IC_EVEX_L_B, /* 9152 */ IC_EVEX_L_B, /* 9153 */ IC_EVEX_L_XS_B, /* 9154 */ IC_EVEX_L_XS_B, /* 9155 */ IC_EVEX_L_XD_B, /* 9156 */ IC_EVEX_L_XD_B, /* 9157 */ IC_EVEX_L_XD_B, /* 9158 */ IC_EVEX_L_XD_B, /* 9159 */ IC_EVEX_L_W_B, /* 9160 */ IC_EVEX_L_W_B, /* 9161 */ IC_EVEX_L_W_XS_B, /* 9162 */ IC_EVEX_L_W_XS_B, /* 9163 */ IC_EVEX_L_W_XD_B, /* 9164 */ IC_EVEX_L_W_XD_B, /* 9165 */ IC_EVEX_L_W_XD_B, /* 9166 */ IC_EVEX_L_W_XD_B, /* 9167 */ IC_EVEX_L_OPSIZE_B, /* 9168 */ IC_EVEX_L_OPSIZE_B, /* 9169 */ IC_EVEX_L_OPSIZE_B, /* 9170 */ IC_EVEX_L_OPSIZE_B, /* 9171 */ IC_EVEX_L_OPSIZE_B, /* 9172 */ IC_EVEX_L_OPSIZE_B, /* 9173 */ IC_EVEX_L_OPSIZE_B, /* 9174 */ IC_EVEX_L_OPSIZE_B, /* 9175 */ IC_EVEX_L_W_OPSIZE_B, /* 9176 */ IC_EVEX_L_W_OPSIZE_B, /* 9177 */ IC_EVEX_L_W_OPSIZE_B, /* 9178 */ IC_EVEX_L_W_OPSIZE_B, /* 9179 */ IC_EVEX_L_W_OPSIZE_B, /* 9180 */ IC_EVEX_L_W_OPSIZE_B, /* 9181 */ IC_EVEX_L_W_OPSIZE_B, /* 9182 */ IC_EVEX_L_W_OPSIZE_B, /* 9183 */ IC_EVEX_L_B, /* 9184 */ IC_EVEX_L_B, /* 9185 */ IC_EVEX_L_XS_B, /* 9186 */ IC_EVEX_L_XS_B, /* 9187 */ IC_EVEX_L_XD_B, /* 9188 */ IC_EVEX_L_XD_B, /* 9189 */ IC_EVEX_L_XD_B, /* 9190 */ IC_EVEX_L_XD_B, /* 9191 */ IC_EVEX_L_W_B, /* 9192 */ IC_EVEX_L_W_B, /* 9193 */ IC_EVEX_L_W_XS_B, /* 9194 */ IC_EVEX_L_W_XS_B, /* 9195 */ IC_EVEX_L_W_XD_B, /* 9196 */ IC_EVEX_L_W_XD_B, /* 9197 */ IC_EVEX_L_W_XD_B, /* 9198 */ IC_EVEX_L_W_XD_B, /* 9199 */ IC_EVEX_L_OPSIZE_B, /* 9200 */ IC_EVEX_L_OPSIZE_B, /* 9201 */ IC_EVEX_L_OPSIZE_B, /* 9202 */ IC_EVEX_L_OPSIZE_B, /* 9203 */ IC_EVEX_L_OPSIZE_B, /* 9204 */ IC_EVEX_L_OPSIZE_B, /* 9205 */ IC_EVEX_L_OPSIZE_B, /* 9206 */ IC_EVEX_L_OPSIZE_B, /* 9207 */ IC_EVEX_L_W_OPSIZE_B, /* 9208 */ IC_EVEX_L_W_OPSIZE_B, /* 9209 */ IC_EVEX_L_W_OPSIZE_B, /* 9210 */ IC_EVEX_L_W_OPSIZE_B, /* 9211 */ IC_EVEX_L_W_OPSIZE_B, /* 9212 */ IC_EVEX_L_W_OPSIZE_B, /* 9213 */ IC_EVEX_L_W_OPSIZE_B, /* 9214 */ IC_EVEX_L_W_OPSIZE_B, /* 9215 */ IC, /* 9216 */ IC_64BIT, /* 9217 */ IC_XS, /* 9218 */ IC_64BIT_XS, /* 9219 */ IC_XD, /* 9220 */ IC_64BIT_XD, /* 9221 */ IC_XS, /* 9222 */ IC_64BIT_XS, /* 9223 */ IC, /* 9224 */ IC_64BIT_REXW, /* 9225 */ IC_XS, /* 9226 */ IC_64BIT_REXW_XS, /* 9227 */ IC_XD, /* 9228 */ IC_64BIT_REXW_XD, /* 9229 */ IC_XS, /* 9230 */ IC_64BIT_REXW_XS, /* 9231 */ IC_OPSIZE, /* 9232 */ IC_64BIT_OPSIZE, /* 9233 */ IC_XS_OPSIZE, /* 9234 */ IC_64BIT_XS_OPSIZE, /* 9235 */ IC_XD_OPSIZE, /* 9236 */ IC_64BIT_XD_OPSIZE, /* 9237 */ IC_XS_OPSIZE, /* 9238 */ IC_64BIT_XD_OPSIZE, /* 9239 */ IC_OPSIZE, /* 9240 */ IC_64BIT_REXW_OPSIZE, /* 9241 */ IC_XS_OPSIZE, /* 9242 */ IC_64BIT_REXW_XS, /* 9243 */ IC_XD_OPSIZE, /* 9244 */ IC_64BIT_REXW_XD, /* 9245 */ IC_XS_OPSIZE, /* 9246 */ IC_64BIT_REXW_XS, /* 9247 */ IC_ADSIZE, /* 9248 */ IC_64BIT_ADSIZE, /* 9249 */ IC_XS, /* 9250 */ IC_64BIT_XS, /* 9251 */ IC_XD, /* 9252 */ IC_64BIT_XD, /* 9253 */ IC_XS, /* 9254 */ IC_64BIT_XS, /* 9255 */ IC_ADSIZE, /* 9256 */ IC_64BIT_REXW_ADSIZE, /* 9257 */ IC_XS, /* 9258 */ IC_64BIT_REXW_XS, /* 9259 */ IC_XD, /* 9260 */ IC_64BIT_REXW_XD, /* 9261 */ IC_XS, /* 9262 */ IC_64BIT_REXW_XS, /* 9263 */ IC_OPSIZE_ADSIZE, /* 9264 */ IC_64BIT_OPSIZE_ADSIZE, /* 9265 */ IC_XS_OPSIZE, /* 9266 */ IC_64BIT_XS_OPSIZE, /* 9267 */ IC_XD_OPSIZE, /* 9268 */ IC_64BIT_XD_OPSIZE, /* 9269 */ IC_XS_OPSIZE, /* 9270 */ IC_64BIT_XD_OPSIZE, /* 9271 */ IC_OPSIZE_ADSIZE, /* 9272 */ IC_64BIT_REXW_OPSIZE, /* 9273 */ IC_XS_OPSIZE, /* 9274 */ IC_64BIT_REXW_XS, /* 9275 */ IC_XD_OPSIZE, /* 9276 */ IC_64BIT_REXW_XD, /* 9277 */ IC_XS_OPSIZE, /* 9278 */ IC_64BIT_REXW_XS, /* 9279 */ IC_VEX, /* 9280 */ IC_VEX, /* 9281 */ IC_VEX_XS, /* 9282 */ IC_VEX_XS, /* 9283 */ IC_VEX_XD, /* 9284 */ IC_VEX_XD, /* 9285 */ IC_VEX_XD, /* 9286 */ IC_VEX_XD, /* 9287 */ IC_VEX_W, /* 9288 */ IC_VEX_W, /* 9289 */ IC_VEX_W_XS, /* 9290 */ IC_VEX_W_XS, /* 9291 */ IC_VEX_W_XD, /* 9292 */ IC_VEX_W_XD, /* 9293 */ IC_VEX_W_XD, /* 9294 */ IC_VEX_W_XD, /* 9295 */ IC_VEX_OPSIZE, /* 9296 */ IC_VEX_OPSIZE, /* 9297 */ IC_VEX_OPSIZE, /* 9298 */ IC_VEX_OPSIZE, /* 9299 */ IC_VEX_OPSIZE, /* 9300 */ IC_VEX_OPSIZE, /* 9301 */ IC_VEX_OPSIZE, /* 9302 */ IC_VEX_OPSIZE, /* 9303 */ IC_VEX_W_OPSIZE, /* 9304 */ IC_VEX_W_OPSIZE, /* 9305 */ IC_VEX_W_OPSIZE, /* 9306 */ IC_VEX_W_OPSIZE, /* 9307 */ IC_VEX_W_OPSIZE, /* 9308 */ IC_VEX_W_OPSIZE, /* 9309 */ IC_VEX_W_OPSIZE, /* 9310 */ IC_VEX_W_OPSIZE, /* 9311 */ IC_VEX, /* 9312 */ IC_VEX, /* 9313 */ IC_VEX_XS, /* 9314 */ IC_VEX_XS, /* 9315 */ IC_VEX_XD, /* 9316 */ IC_VEX_XD, /* 9317 */ IC_VEX_XD, /* 9318 */ IC_VEX_XD, /* 9319 */ IC_VEX_W, /* 9320 */ IC_VEX_W, /* 9321 */ IC_VEX_W_XS, /* 9322 */ IC_VEX_W_XS, /* 9323 */ IC_VEX_W_XD, /* 9324 */ IC_VEX_W_XD, /* 9325 */ IC_VEX_W_XD, /* 9326 */ IC_VEX_W_XD, /* 9327 */ IC_VEX_OPSIZE, /* 9328 */ IC_VEX_OPSIZE, /* 9329 */ IC_VEX_OPSIZE, /* 9330 */ IC_VEX_OPSIZE, /* 9331 */ IC_VEX_OPSIZE, /* 9332 */ IC_VEX_OPSIZE, /* 9333 */ IC_VEX_OPSIZE, /* 9334 */ IC_VEX_OPSIZE, /* 9335 */ IC_VEX_W_OPSIZE, /* 9336 */ IC_VEX_W_OPSIZE, /* 9337 */ IC_VEX_W_OPSIZE, /* 9338 */ IC_VEX_W_OPSIZE, /* 9339 */ IC_VEX_W_OPSIZE, /* 9340 */ IC_VEX_W_OPSIZE, /* 9341 */ IC_VEX_W_OPSIZE, /* 9342 */ IC_VEX_W_OPSIZE, /* 9343 */ IC_VEX_L, /* 9344 */ IC_VEX_L, /* 9345 */ IC_VEX_L_XS, /* 9346 */ IC_VEX_L_XS, /* 9347 */ IC_VEX_L_XD, /* 9348 */ IC_VEX_L_XD, /* 9349 */ IC_VEX_L_XD, /* 9350 */ IC_VEX_L_XD, /* 9351 */ IC_VEX_L_W, /* 9352 */ IC_VEX_L_W, /* 9353 */ IC_VEX_L_W_XS, /* 9354 */ IC_VEX_L_W_XS, /* 9355 */ IC_VEX_L_W_XD, /* 9356 */ IC_VEX_L_W_XD, /* 9357 */ IC_VEX_L_W_XD, /* 9358 */ IC_VEX_L_W_XD, /* 9359 */ IC_VEX_L_OPSIZE, /* 9360 */ IC_VEX_L_OPSIZE, /* 9361 */ IC_VEX_L_OPSIZE, /* 9362 */ IC_VEX_L_OPSIZE, /* 9363 */ IC_VEX_L_OPSIZE, /* 9364 */ IC_VEX_L_OPSIZE, /* 9365 */ IC_VEX_L_OPSIZE, /* 9366 */ IC_VEX_L_OPSIZE, /* 9367 */ IC_VEX_L_W_OPSIZE, /* 9368 */ IC_VEX_L_W_OPSIZE, /* 9369 */ IC_VEX_L_W_OPSIZE, /* 9370 */ IC_VEX_L_W_OPSIZE, /* 9371 */ IC_VEX_L_W_OPSIZE, /* 9372 */ IC_VEX_L_W_OPSIZE, /* 9373 */ IC_VEX_L_W_OPSIZE, /* 9374 */ IC_VEX_L_W_OPSIZE, /* 9375 */ IC_VEX_L, /* 9376 */ IC_VEX_L, /* 9377 */ IC_VEX_L_XS, /* 9378 */ IC_VEX_L_XS, /* 9379 */ IC_VEX_L_XD, /* 9380 */ IC_VEX_L_XD, /* 9381 */ IC_VEX_L_XD, /* 9382 */ IC_VEX_L_XD, /* 9383 */ IC_VEX_L_W, /* 9384 */ IC_VEX_L_W, /* 9385 */ IC_VEX_L_W_XS, /* 9386 */ IC_VEX_L_W_XS, /* 9387 */ IC_VEX_L_W_XD, /* 9388 */ IC_VEX_L_W_XD, /* 9389 */ IC_VEX_L_W_XD, /* 9390 */ IC_VEX_L_W_XD, /* 9391 */ IC_VEX_L_OPSIZE, /* 9392 */ IC_VEX_L_OPSIZE, /* 9393 */ IC_VEX_L_OPSIZE, /* 9394 */ IC_VEX_L_OPSIZE, /* 9395 */ IC_VEX_L_OPSIZE, /* 9396 */ IC_VEX_L_OPSIZE, /* 9397 */ IC_VEX_L_OPSIZE, /* 9398 */ IC_VEX_L_OPSIZE, /* 9399 */ IC_VEX_L_W_OPSIZE, /* 9400 */ IC_VEX_L_W_OPSIZE, /* 9401 */ IC_VEX_L_W_OPSIZE, /* 9402 */ IC_VEX_L_W_OPSIZE, /* 9403 */ IC_VEX_L_W_OPSIZE, /* 9404 */ IC_VEX_L_W_OPSIZE, /* 9405 */ IC_VEX_L_W_OPSIZE, /* 9406 */ IC_VEX_L_W_OPSIZE, /* 9407 */ IC_VEX_L, /* 9408 */ IC_VEX_L, /* 9409 */ IC_VEX_L_XS, /* 9410 */ IC_VEX_L_XS, /* 9411 */ IC_VEX_L_XD, /* 9412 */ IC_VEX_L_XD, /* 9413 */ IC_VEX_L_XD, /* 9414 */ IC_VEX_L_XD, /* 9415 */ IC_VEX_L_W, /* 9416 */ IC_VEX_L_W, /* 9417 */ IC_VEX_L_W_XS, /* 9418 */ IC_VEX_L_W_XS, /* 9419 */ IC_VEX_L_W_XD, /* 9420 */ IC_VEX_L_W_XD, /* 9421 */ IC_VEX_L_W_XD, /* 9422 */ IC_VEX_L_W_XD, /* 9423 */ IC_VEX_L_OPSIZE, /* 9424 */ IC_VEX_L_OPSIZE, /* 9425 */ IC_VEX_L_OPSIZE, /* 9426 */ IC_VEX_L_OPSIZE, /* 9427 */ IC_VEX_L_OPSIZE, /* 9428 */ IC_VEX_L_OPSIZE, /* 9429 */ IC_VEX_L_OPSIZE, /* 9430 */ IC_VEX_L_OPSIZE, /* 9431 */ IC_VEX_L_W_OPSIZE, /* 9432 */ IC_VEX_L_W_OPSIZE, /* 9433 */ IC_VEX_L_W_OPSIZE, /* 9434 */ IC_VEX_L_W_OPSIZE, /* 9435 */ IC_VEX_L_W_OPSIZE, /* 9436 */ IC_VEX_L_W_OPSIZE, /* 9437 */ IC_VEX_L_W_OPSIZE, /* 9438 */ IC_VEX_L_W_OPSIZE, /* 9439 */ IC_VEX_L, /* 9440 */ IC_VEX_L, /* 9441 */ IC_VEX_L_XS, /* 9442 */ IC_VEX_L_XS, /* 9443 */ IC_VEX_L_XD, /* 9444 */ IC_VEX_L_XD, /* 9445 */ IC_VEX_L_XD, /* 9446 */ IC_VEX_L_XD, /* 9447 */ IC_VEX_L_W, /* 9448 */ IC_VEX_L_W, /* 9449 */ IC_VEX_L_W_XS, /* 9450 */ IC_VEX_L_W_XS, /* 9451 */ IC_VEX_L_W_XD, /* 9452 */ IC_VEX_L_W_XD, /* 9453 */ IC_VEX_L_W_XD, /* 9454 */ IC_VEX_L_W_XD, /* 9455 */ IC_VEX_L_OPSIZE, /* 9456 */ IC_VEX_L_OPSIZE, /* 9457 */ IC_VEX_L_OPSIZE, /* 9458 */ IC_VEX_L_OPSIZE, /* 9459 */ IC_VEX_L_OPSIZE, /* 9460 */ IC_VEX_L_OPSIZE, /* 9461 */ IC_VEX_L_OPSIZE, /* 9462 */ IC_VEX_L_OPSIZE, /* 9463 */ IC_VEX_L_W_OPSIZE, /* 9464 */ IC_VEX_L_W_OPSIZE, /* 9465 */ IC_VEX_L_W_OPSIZE, /* 9466 */ IC_VEX_L_W_OPSIZE, /* 9467 */ IC_VEX_L_W_OPSIZE, /* 9468 */ IC_VEX_L_W_OPSIZE, /* 9469 */ IC_VEX_L_W_OPSIZE, /* 9470 */ IC_VEX_L_W_OPSIZE, /* 9471 */ IC_EVEX_L2_B, /* 9472 */ IC_EVEX_L2_B, /* 9473 */ IC_EVEX_L2_XS_B, /* 9474 */ IC_EVEX_L2_XS_B, /* 9475 */ IC_EVEX_L2_XD_B, /* 9476 */ IC_EVEX_L2_XD_B, /* 9477 */ IC_EVEX_L2_XD_B, /* 9478 */ IC_EVEX_L2_XD_B, /* 9479 */ IC_EVEX_L2_W_B, /* 9480 */ IC_EVEX_L2_W_B, /* 9481 */ IC_EVEX_L2_W_XS_B, /* 9482 */ IC_EVEX_L2_W_XS_B, /* 9483 */ IC_EVEX_L2_W_XD_B, /* 9484 */ IC_EVEX_L2_W_XD_B, /* 9485 */ IC_EVEX_L2_W_XD_B, /* 9486 */ IC_EVEX_L2_W_XD_B, /* 9487 */ IC_EVEX_L2_OPSIZE_B, /* 9488 */ IC_EVEX_L2_OPSIZE_B, /* 9489 */ IC_EVEX_L2_OPSIZE_B, /* 9490 */ IC_EVEX_L2_OPSIZE_B, /* 9491 */ IC_EVEX_L2_OPSIZE_B, /* 9492 */ IC_EVEX_L2_OPSIZE_B, /* 9493 */ IC_EVEX_L2_OPSIZE_B, /* 9494 */ IC_EVEX_L2_OPSIZE_B, /* 9495 */ IC_EVEX_L2_W_OPSIZE_B, /* 9496 */ IC_EVEX_L2_W_OPSIZE_B, /* 9497 */ IC_EVEX_L2_W_OPSIZE_B, /* 9498 */ IC_EVEX_L2_W_OPSIZE_B, /* 9499 */ IC_EVEX_L2_W_OPSIZE_B, /* 9500 */ IC_EVEX_L2_W_OPSIZE_B, /* 9501 */ IC_EVEX_L2_W_OPSIZE_B, /* 9502 */ IC_EVEX_L2_W_OPSIZE_B, /* 9503 */ IC_EVEX_L2_B, /* 9504 */ IC_EVEX_L2_B, /* 9505 */ IC_EVEX_L2_XS_B, /* 9506 */ IC_EVEX_L2_XS_B, /* 9507 */ IC_EVEX_L2_XD_B, /* 9508 */ IC_EVEX_L2_XD_B, /* 9509 */ IC_EVEX_L2_XD_B, /* 9510 */ IC_EVEX_L2_XD_B, /* 9511 */ IC_EVEX_L2_W_B, /* 9512 */ IC_EVEX_L2_W_B, /* 9513 */ IC_EVEX_L2_W_XS_B, /* 9514 */ IC_EVEX_L2_W_XS_B, /* 9515 */ IC_EVEX_L2_W_XD_B, /* 9516 */ IC_EVEX_L2_W_XD_B, /* 9517 */ IC_EVEX_L2_W_XD_B, /* 9518 */ IC_EVEX_L2_W_XD_B, /* 9519 */ IC_EVEX_L2_OPSIZE_B, /* 9520 */ IC_EVEX_L2_OPSIZE_B, /* 9521 */ IC_EVEX_L2_OPSIZE_B, /* 9522 */ IC_EVEX_L2_OPSIZE_B, /* 9523 */ IC_EVEX_L2_OPSIZE_B, /* 9524 */ IC_EVEX_L2_OPSIZE_B, /* 9525 */ IC_EVEX_L2_OPSIZE_B, /* 9526 */ IC_EVEX_L2_OPSIZE_B, /* 9527 */ IC_EVEX_L2_W_OPSIZE_B, /* 9528 */ IC_EVEX_L2_W_OPSIZE_B, /* 9529 */ IC_EVEX_L2_W_OPSIZE_B, /* 9530 */ IC_EVEX_L2_W_OPSIZE_B, /* 9531 */ IC_EVEX_L2_W_OPSIZE_B, /* 9532 */ IC_EVEX_L2_W_OPSIZE_B, /* 9533 */ IC_EVEX_L2_W_OPSIZE_B, /* 9534 */ IC_EVEX_L2_W_OPSIZE_B, /* 9535 */ IC_EVEX_L2_B, /* 9536 */ IC_EVEX_L2_B, /* 9537 */ IC_EVEX_L2_XS_B, /* 9538 */ IC_EVEX_L2_XS_B, /* 9539 */ IC_EVEX_L2_XD_B, /* 9540 */ IC_EVEX_L2_XD_B, /* 9541 */ IC_EVEX_L2_XD_B, /* 9542 */ IC_EVEX_L2_XD_B, /* 9543 */ IC_EVEX_L2_W_B, /* 9544 */ IC_EVEX_L2_W_B, /* 9545 */ IC_EVEX_L2_W_XS_B, /* 9546 */ IC_EVEX_L2_W_XS_B, /* 9547 */ IC_EVEX_L2_W_XD_B, /* 9548 */ IC_EVEX_L2_W_XD_B, /* 9549 */ IC_EVEX_L2_W_XD_B, /* 9550 */ IC_EVEX_L2_W_XD_B, /* 9551 */ IC_EVEX_L2_OPSIZE_B, /* 9552 */ IC_EVEX_L2_OPSIZE_B, /* 9553 */ IC_EVEX_L2_OPSIZE_B, /* 9554 */ IC_EVEX_L2_OPSIZE_B, /* 9555 */ IC_EVEX_L2_OPSIZE_B, /* 9556 */ IC_EVEX_L2_OPSIZE_B, /* 9557 */ IC_EVEX_L2_OPSIZE_B, /* 9558 */ IC_EVEX_L2_OPSIZE_B, /* 9559 */ IC_EVEX_L2_W_OPSIZE_B, /* 9560 */ IC_EVEX_L2_W_OPSIZE_B, /* 9561 */ IC_EVEX_L2_W_OPSIZE_B, /* 9562 */ IC_EVEX_L2_W_OPSIZE_B, /* 9563 */ IC_EVEX_L2_W_OPSIZE_B, /* 9564 */ IC_EVEX_L2_W_OPSIZE_B, /* 9565 */ IC_EVEX_L2_W_OPSIZE_B, /* 9566 */ IC_EVEX_L2_W_OPSIZE_B, /* 9567 */ IC_EVEX_L2_B, /* 9568 */ IC_EVEX_L2_B, /* 9569 */ IC_EVEX_L2_XS_B, /* 9570 */ IC_EVEX_L2_XS_B, /* 9571 */ IC_EVEX_L2_XD_B, /* 9572 */ IC_EVEX_L2_XD_B, /* 9573 */ IC_EVEX_L2_XD_B, /* 9574 */ IC_EVEX_L2_XD_B, /* 9575 */ IC_EVEX_L2_W_B, /* 9576 */ IC_EVEX_L2_W_B, /* 9577 */ IC_EVEX_L2_W_XS_B, /* 9578 */ IC_EVEX_L2_W_XS_B, /* 9579 */ IC_EVEX_L2_W_XD_B, /* 9580 */ IC_EVEX_L2_W_XD_B, /* 9581 */ IC_EVEX_L2_W_XD_B, /* 9582 */ IC_EVEX_L2_W_XD_B, /* 9583 */ IC_EVEX_L2_OPSIZE_B, /* 9584 */ IC_EVEX_L2_OPSIZE_B, /* 9585 */ IC_EVEX_L2_OPSIZE_B, /* 9586 */ IC_EVEX_L2_OPSIZE_B, /* 9587 */ IC_EVEX_L2_OPSIZE_B, /* 9588 */ IC_EVEX_L2_OPSIZE_B, /* 9589 */ IC_EVEX_L2_OPSIZE_B, /* 9590 */ IC_EVEX_L2_OPSIZE_B, /* 9591 */ IC_EVEX_L2_W_OPSIZE_B, /* 9592 */ IC_EVEX_L2_W_OPSIZE_B, /* 9593 */ IC_EVEX_L2_W_OPSIZE_B, /* 9594 */ IC_EVEX_L2_W_OPSIZE_B, /* 9595 */ IC_EVEX_L2_W_OPSIZE_B, /* 9596 */ IC_EVEX_L2_W_OPSIZE_B, /* 9597 */ IC_EVEX_L2_W_OPSIZE_B, /* 9598 */ IC_EVEX_L2_W_OPSIZE_B, /* 9599 */ IC_EVEX_L2_B, /* 9600 */ IC_EVEX_L2_B, /* 9601 */ IC_EVEX_L2_XS_B, /* 9602 */ IC_EVEX_L2_XS_B, /* 9603 */ IC_EVEX_L2_XD_B, /* 9604 */ IC_EVEX_L2_XD_B, /* 9605 */ IC_EVEX_L2_XD_B, /* 9606 */ IC_EVEX_L2_XD_B, /* 9607 */ IC_EVEX_L2_W_B, /* 9608 */ IC_EVEX_L2_W_B, /* 9609 */ IC_EVEX_L2_W_XS_B, /* 9610 */ IC_EVEX_L2_W_XS_B, /* 9611 */ IC_EVEX_L2_W_XD_B, /* 9612 */ IC_EVEX_L2_W_XD_B, /* 9613 */ IC_EVEX_L2_W_XD_B, /* 9614 */ IC_EVEX_L2_W_XD_B, /* 9615 */ IC_EVEX_L2_OPSIZE_B, /* 9616 */ IC_EVEX_L2_OPSIZE_B, /* 9617 */ IC_EVEX_L2_OPSIZE_B, /* 9618 */ IC_EVEX_L2_OPSIZE_B, /* 9619 */ IC_EVEX_L2_OPSIZE_B, /* 9620 */ IC_EVEX_L2_OPSIZE_B, /* 9621 */ IC_EVEX_L2_OPSIZE_B, /* 9622 */ IC_EVEX_L2_OPSIZE_B, /* 9623 */ IC_EVEX_L2_W_OPSIZE_B, /* 9624 */ IC_EVEX_L2_W_OPSIZE_B, /* 9625 */ IC_EVEX_L2_W_OPSIZE_B, /* 9626 */ IC_EVEX_L2_W_OPSIZE_B, /* 9627 */ IC_EVEX_L2_W_OPSIZE_B, /* 9628 */ IC_EVEX_L2_W_OPSIZE_B, /* 9629 */ IC_EVEX_L2_W_OPSIZE_B, /* 9630 */ IC_EVEX_L2_W_OPSIZE_B, /* 9631 */ IC_EVEX_L2_B, /* 9632 */ IC_EVEX_L2_B, /* 9633 */ IC_EVEX_L2_XS_B, /* 9634 */ IC_EVEX_L2_XS_B, /* 9635 */ IC_EVEX_L2_XD_B, /* 9636 */ IC_EVEX_L2_XD_B, /* 9637 */ IC_EVEX_L2_XD_B, /* 9638 */ IC_EVEX_L2_XD_B, /* 9639 */ IC_EVEX_L2_W_B, /* 9640 */ IC_EVEX_L2_W_B, /* 9641 */ IC_EVEX_L2_W_XS_B, /* 9642 */ IC_EVEX_L2_W_XS_B, /* 9643 */ IC_EVEX_L2_W_XD_B, /* 9644 */ IC_EVEX_L2_W_XD_B, /* 9645 */ IC_EVEX_L2_W_XD_B, /* 9646 */ IC_EVEX_L2_W_XD_B, /* 9647 */ IC_EVEX_L2_OPSIZE_B, /* 9648 */ IC_EVEX_L2_OPSIZE_B, /* 9649 */ IC_EVEX_L2_OPSIZE_B, /* 9650 */ IC_EVEX_L2_OPSIZE_B, /* 9651 */ IC_EVEX_L2_OPSIZE_B, /* 9652 */ IC_EVEX_L2_OPSIZE_B, /* 9653 */ IC_EVEX_L2_OPSIZE_B, /* 9654 */ IC_EVEX_L2_OPSIZE_B, /* 9655 */ IC_EVEX_L2_W_OPSIZE_B, /* 9656 */ IC_EVEX_L2_W_OPSIZE_B, /* 9657 */ IC_EVEX_L2_W_OPSIZE_B, /* 9658 */ IC_EVEX_L2_W_OPSIZE_B, /* 9659 */ IC_EVEX_L2_W_OPSIZE_B, /* 9660 */ IC_EVEX_L2_W_OPSIZE_B, /* 9661 */ IC_EVEX_L2_W_OPSIZE_B, /* 9662 */ IC_EVEX_L2_W_OPSIZE_B, /* 9663 */ IC_EVEX_L2_B, /* 9664 */ IC_EVEX_L2_B, /* 9665 */ IC_EVEX_L2_XS_B, /* 9666 */ IC_EVEX_L2_XS_B, /* 9667 */ IC_EVEX_L2_XD_B, /* 9668 */ IC_EVEX_L2_XD_B, /* 9669 */ IC_EVEX_L2_XD_B, /* 9670 */ IC_EVEX_L2_XD_B, /* 9671 */ IC_EVEX_L2_W_B, /* 9672 */ IC_EVEX_L2_W_B, /* 9673 */ IC_EVEX_L2_W_XS_B, /* 9674 */ IC_EVEX_L2_W_XS_B, /* 9675 */ IC_EVEX_L2_W_XD_B, /* 9676 */ IC_EVEX_L2_W_XD_B, /* 9677 */ IC_EVEX_L2_W_XD_B, /* 9678 */ IC_EVEX_L2_W_XD_B, /* 9679 */ IC_EVEX_L2_OPSIZE_B, /* 9680 */ IC_EVEX_L2_OPSIZE_B, /* 9681 */ IC_EVEX_L2_OPSIZE_B, /* 9682 */ IC_EVEX_L2_OPSIZE_B, /* 9683 */ IC_EVEX_L2_OPSIZE_B, /* 9684 */ IC_EVEX_L2_OPSIZE_B, /* 9685 */ IC_EVEX_L2_OPSIZE_B, /* 9686 */ IC_EVEX_L2_OPSIZE_B, /* 9687 */ IC_EVEX_L2_W_OPSIZE_B, /* 9688 */ IC_EVEX_L2_W_OPSIZE_B, /* 9689 */ IC_EVEX_L2_W_OPSIZE_B, /* 9690 */ IC_EVEX_L2_W_OPSIZE_B, /* 9691 */ IC_EVEX_L2_W_OPSIZE_B, /* 9692 */ IC_EVEX_L2_W_OPSIZE_B, /* 9693 */ IC_EVEX_L2_W_OPSIZE_B, /* 9694 */ IC_EVEX_L2_W_OPSIZE_B, /* 9695 */ IC_EVEX_L2_B, /* 9696 */ IC_EVEX_L2_B, /* 9697 */ IC_EVEX_L2_XS_B, /* 9698 */ IC_EVEX_L2_XS_B, /* 9699 */ IC_EVEX_L2_XD_B, /* 9700 */ IC_EVEX_L2_XD_B, /* 9701 */ IC_EVEX_L2_XD_B, /* 9702 */ IC_EVEX_L2_XD_B, /* 9703 */ IC_EVEX_L2_W_B, /* 9704 */ IC_EVEX_L2_W_B, /* 9705 */ IC_EVEX_L2_W_XS_B, /* 9706 */ IC_EVEX_L2_W_XS_B, /* 9707 */ IC_EVEX_L2_W_XD_B, /* 9708 */ IC_EVEX_L2_W_XD_B, /* 9709 */ IC_EVEX_L2_W_XD_B, /* 9710 */ IC_EVEX_L2_W_XD_B, /* 9711 */ IC_EVEX_L2_OPSIZE_B, /* 9712 */ IC_EVEX_L2_OPSIZE_B, /* 9713 */ IC_EVEX_L2_OPSIZE_B, /* 9714 */ IC_EVEX_L2_OPSIZE_B, /* 9715 */ IC_EVEX_L2_OPSIZE_B, /* 9716 */ IC_EVEX_L2_OPSIZE_B, /* 9717 */ IC_EVEX_L2_OPSIZE_B, /* 9718 */ IC_EVEX_L2_OPSIZE_B, /* 9719 */ IC_EVEX_L2_W_OPSIZE_B, /* 9720 */ IC_EVEX_L2_W_OPSIZE_B, /* 9721 */ IC_EVEX_L2_W_OPSIZE_B, /* 9722 */ IC_EVEX_L2_W_OPSIZE_B, /* 9723 */ IC_EVEX_L2_W_OPSIZE_B, /* 9724 */ IC_EVEX_L2_W_OPSIZE_B, /* 9725 */ IC_EVEX_L2_W_OPSIZE_B, /* 9726 */ IC_EVEX_L2_W_OPSIZE_B, /* 9727 */ IC, /* 9728 */ IC_64BIT, /* 9729 */ IC_XS, /* 9730 */ IC_64BIT_XS, /* 9731 */ IC_XD, /* 9732 */ IC_64BIT_XD, /* 9733 */ IC_XS, /* 9734 */ IC_64BIT_XS, /* 9735 */ IC, /* 9736 */ IC_64BIT_REXW, /* 9737 */ IC_XS, /* 9738 */ IC_64BIT_REXW_XS, /* 9739 */ IC_XD, /* 9740 */ IC_64BIT_REXW_XD, /* 9741 */ IC_XS, /* 9742 */ IC_64BIT_REXW_XS, /* 9743 */ IC_OPSIZE, /* 9744 */ IC_64BIT_OPSIZE, /* 9745 */ IC_XS_OPSIZE, /* 9746 */ IC_64BIT_XS_OPSIZE, /* 9747 */ IC_XD_OPSIZE, /* 9748 */ IC_64BIT_XD_OPSIZE, /* 9749 */ IC_XS_OPSIZE, /* 9750 */ IC_64BIT_XD_OPSIZE, /* 9751 */ IC_OPSIZE, /* 9752 */ IC_64BIT_REXW_OPSIZE, /* 9753 */ IC_XS_OPSIZE, /* 9754 */ IC_64BIT_REXW_XS, /* 9755 */ IC_XD_OPSIZE, /* 9756 */ IC_64BIT_REXW_XD, /* 9757 */ IC_XS_OPSIZE, /* 9758 */ IC_64BIT_REXW_XS, /* 9759 */ IC_ADSIZE, /* 9760 */ IC_64BIT_ADSIZE, /* 9761 */ IC_XS, /* 9762 */ IC_64BIT_XS, /* 9763 */ IC_XD, /* 9764 */ IC_64BIT_XD, /* 9765 */ IC_XS, /* 9766 */ IC_64BIT_XS, /* 9767 */ IC_ADSIZE, /* 9768 */ IC_64BIT_REXW_ADSIZE, /* 9769 */ IC_XS, /* 9770 */ IC_64BIT_REXW_XS, /* 9771 */ IC_XD, /* 9772 */ IC_64BIT_REXW_XD, /* 9773 */ IC_XS, /* 9774 */ IC_64BIT_REXW_XS, /* 9775 */ IC_OPSIZE_ADSIZE, /* 9776 */ IC_64BIT_OPSIZE_ADSIZE, /* 9777 */ IC_XS_OPSIZE, /* 9778 */ IC_64BIT_XS_OPSIZE, /* 9779 */ IC_XD_OPSIZE, /* 9780 */ IC_64BIT_XD_OPSIZE, /* 9781 */ IC_XS_OPSIZE, /* 9782 */ IC_64BIT_XD_OPSIZE, /* 9783 */ IC_OPSIZE_ADSIZE, /* 9784 */ IC_64BIT_REXW_OPSIZE, /* 9785 */ IC_XS_OPSIZE, /* 9786 */ IC_64BIT_REXW_XS, /* 9787 */ IC_XD_OPSIZE, /* 9788 */ IC_64BIT_REXW_XD, /* 9789 */ IC_XS_OPSIZE, /* 9790 */ IC_64BIT_REXW_XS, /* 9791 */ IC_VEX, /* 9792 */ IC_VEX, /* 9793 */ IC_VEX_XS, /* 9794 */ IC_VEX_XS, /* 9795 */ IC_VEX_XD, /* 9796 */ IC_VEX_XD, /* 9797 */ IC_VEX_XD, /* 9798 */ IC_VEX_XD, /* 9799 */ IC_VEX_W, /* 9800 */ IC_VEX_W, /* 9801 */ IC_VEX_W_XS, /* 9802 */ IC_VEX_W_XS, /* 9803 */ IC_VEX_W_XD, /* 9804 */ IC_VEX_W_XD, /* 9805 */ IC_VEX_W_XD, /* 9806 */ IC_VEX_W_XD, /* 9807 */ IC_VEX_OPSIZE, /* 9808 */ IC_VEX_OPSIZE, /* 9809 */ IC_VEX_OPSIZE, /* 9810 */ IC_VEX_OPSIZE, /* 9811 */ IC_VEX_OPSIZE, /* 9812 */ IC_VEX_OPSIZE, /* 9813 */ IC_VEX_OPSIZE, /* 9814 */ IC_VEX_OPSIZE, /* 9815 */ IC_VEX_W_OPSIZE, /* 9816 */ IC_VEX_W_OPSIZE, /* 9817 */ IC_VEX_W_OPSIZE, /* 9818 */ IC_VEX_W_OPSIZE, /* 9819 */ IC_VEX_W_OPSIZE, /* 9820 */ IC_VEX_W_OPSIZE, /* 9821 */ IC_VEX_W_OPSIZE, /* 9822 */ IC_VEX_W_OPSIZE, /* 9823 */ IC_VEX, /* 9824 */ IC_VEX, /* 9825 */ IC_VEX_XS, /* 9826 */ IC_VEX_XS, /* 9827 */ IC_VEX_XD, /* 9828 */ IC_VEX_XD, /* 9829 */ IC_VEX_XD, /* 9830 */ IC_VEX_XD, /* 9831 */ IC_VEX_W, /* 9832 */ IC_VEX_W, /* 9833 */ IC_VEX_W_XS, /* 9834 */ IC_VEX_W_XS, /* 9835 */ IC_VEX_W_XD, /* 9836 */ IC_VEX_W_XD, /* 9837 */ IC_VEX_W_XD, /* 9838 */ IC_VEX_W_XD, /* 9839 */ IC_VEX_OPSIZE, /* 9840 */ IC_VEX_OPSIZE, /* 9841 */ IC_VEX_OPSIZE, /* 9842 */ IC_VEX_OPSIZE, /* 9843 */ IC_VEX_OPSIZE, /* 9844 */ IC_VEX_OPSIZE, /* 9845 */ IC_VEX_OPSIZE, /* 9846 */ IC_VEX_OPSIZE, /* 9847 */ IC_VEX_W_OPSIZE, /* 9848 */ IC_VEX_W_OPSIZE, /* 9849 */ IC_VEX_W_OPSIZE, /* 9850 */ IC_VEX_W_OPSIZE, /* 9851 */ IC_VEX_W_OPSIZE, /* 9852 */ IC_VEX_W_OPSIZE, /* 9853 */ IC_VEX_W_OPSIZE, /* 9854 */ IC_VEX_W_OPSIZE, /* 9855 */ IC_VEX_L, /* 9856 */ IC_VEX_L, /* 9857 */ IC_VEX_L_XS, /* 9858 */ IC_VEX_L_XS, /* 9859 */ IC_VEX_L_XD, /* 9860 */ IC_VEX_L_XD, /* 9861 */ IC_VEX_L_XD, /* 9862 */ IC_VEX_L_XD, /* 9863 */ IC_VEX_L_W, /* 9864 */ IC_VEX_L_W, /* 9865 */ IC_VEX_L_W_XS, /* 9866 */ IC_VEX_L_W_XS, /* 9867 */ IC_VEX_L_W_XD, /* 9868 */ IC_VEX_L_W_XD, /* 9869 */ IC_VEX_L_W_XD, /* 9870 */ IC_VEX_L_W_XD, /* 9871 */ IC_VEX_L_OPSIZE, /* 9872 */ IC_VEX_L_OPSIZE, /* 9873 */ IC_VEX_L_OPSIZE, /* 9874 */ IC_VEX_L_OPSIZE, /* 9875 */ IC_VEX_L_OPSIZE, /* 9876 */ IC_VEX_L_OPSIZE, /* 9877 */ IC_VEX_L_OPSIZE, /* 9878 */ IC_VEX_L_OPSIZE, /* 9879 */ IC_VEX_L_W_OPSIZE, /* 9880 */ IC_VEX_L_W_OPSIZE, /* 9881 */ IC_VEX_L_W_OPSIZE, /* 9882 */ IC_VEX_L_W_OPSIZE, /* 9883 */ IC_VEX_L_W_OPSIZE, /* 9884 */ IC_VEX_L_W_OPSIZE, /* 9885 */ IC_VEX_L_W_OPSIZE, /* 9886 */ IC_VEX_L_W_OPSIZE, /* 9887 */ IC_VEX_L, /* 9888 */ IC_VEX_L, /* 9889 */ IC_VEX_L_XS, /* 9890 */ IC_VEX_L_XS, /* 9891 */ IC_VEX_L_XD, /* 9892 */ IC_VEX_L_XD, /* 9893 */ IC_VEX_L_XD, /* 9894 */ IC_VEX_L_XD, /* 9895 */ IC_VEX_L_W, /* 9896 */ IC_VEX_L_W, /* 9897 */ IC_VEX_L_W_XS, /* 9898 */ IC_VEX_L_W_XS, /* 9899 */ IC_VEX_L_W_XD, /* 9900 */ IC_VEX_L_W_XD, /* 9901 */ IC_VEX_L_W_XD, /* 9902 */ IC_VEX_L_W_XD, /* 9903 */ IC_VEX_L_OPSIZE, /* 9904 */ IC_VEX_L_OPSIZE, /* 9905 */ IC_VEX_L_OPSIZE, /* 9906 */ IC_VEX_L_OPSIZE, /* 9907 */ IC_VEX_L_OPSIZE, /* 9908 */ IC_VEX_L_OPSIZE, /* 9909 */ IC_VEX_L_OPSIZE, /* 9910 */ IC_VEX_L_OPSIZE, /* 9911 */ IC_VEX_L_W_OPSIZE, /* 9912 */ IC_VEX_L_W_OPSIZE, /* 9913 */ IC_VEX_L_W_OPSIZE, /* 9914 */ IC_VEX_L_W_OPSIZE, /* 9915 */ IC_VEX_L_W_OPSIZE, /* 9916 */ IC_VEX_L_W_OPSIZE, /* 9917 */ IC_VEX_L_W_OPSIZE, /* 9918 */ IC_VEX_L_W_OPSIZE, /* 9919 */ IC_VEX_L, /* 9920 */ IC_VEX_L, /* 9921 */ IC_VEX_L_XS, /* 9922 */ IC_VEX_L_XS, /* 9923 */ IC_VEX_L_XD, /* 9924 */ IC_VEX_L_XD, /* 9925 */ IC_VEX_L_XD, /* 9926 */ IC_VEX_L_XD, /* 9927 */ IC_VEX_L_W, /* 9928 */ IC_VEX_L_W, /* 9929 */ IC_VEX_L_W_XS, /* 9930 */ IC_VEX_L_W_XS, /* 9931 */ IC_VEX_L_W_XD, /* 9932 */ IC_VEX_L_W_XD, /* 9933 */ IC_VEX_L_W_XD, /* 9934 */ IC_VEX_L_W_XD, /* 9935 */ IC_VEX_L_OPSIZE, /* 9936 */ IC_VEX_L_OPSIZE, /* 9937 */ IC_VEX_L_OPSIZE, /* 9938 */ IC_VEX_L_OPSIZE, /* 9939 */ IC_VEX_L_OPSIZE, /* 9940 */ IC_VEX_L_OPSIZE, /* 9941 */ IC_VEX_L_OPSIZE, /* 9942 */ IC_VEX_L_OPSIZE, /* 9943 */ IC_VEX_L_W_OPSIZE, /* 9944 */ IC_VEX_L_W_OPSIZE, /* 9945 */ IC_VEX_L_W_OPSIZE, /* 9946 */ IC_VEX_L_W_OPSIZE, /* 9947 */ IC_VEX_L_W_OPSIZE, /* 9948 */ IC_VEX_L_W_OPSIZE, /* 9949 */ IC_VEX_L_W_OPSIZE, /* 9950 */ IC_VEX_L_W_OPSIZE, /* 9951 */ IC_VEX_L, /* 9952 */ IC_VEX_L, /* 9953 */ IC_VEX_L_XS, /* 9954 */ IC_VEX_L_XS, /* 9955 */ IC_VEX_L_XD, /* 9956 */ IC_VEX_L_XD, /* 9957 */ IC_VEX_L_XD, /* 9958 */ IC_VEX_L_XD, /* 9959 */ IC_VEX_L_W, /* 9960 */ IC_VEX_L_W, /* 9961 */ IC_VEX_L_W_XS, /* 9962 */ IC_VEX_L_W_XS, /* 9963 */ IC_VEX_L_W_XD, /* 9964 */ IC_VEX_L_W_XD, /* 9965 */ IC_VEX_L_W_XD, /* 9966 */ IC_VEX_L_W_XD, /* 9967 */ IC_VEX_L_OPSIZE, /* 9968 */ IC_VEX_L_OPSIZE, /* 9969 */ IC_VEX_L_OPSIZE, /* 9970 */ IC_VEX_L_OPSIZE, /* 9971 */ IC_VEX_L_OPSIZE, /* 9972 */ IC_VEX_L_OPSIZE, /* 9973 */ IC_VEX_L_OPSIZE, /* 9974 */ IC_VEX_L_OPSIZE, /* 9975 */ IC_VEX_L_W_OPSIZE, /* 9976 */ IC_VEX_L_W_OPSIZE, /* 9977 */ IC_VEX_L_W_OPSIZE, /* 9978 */ IC_VEX_L_W_OPSIZE, /* 9979 */ IC_VEX_L_W_OPSIZE, /* 9980 */ IC_VEX_L_W_OPSIZE, /* 9981 */ IC_VEX_L_W_OPSIZE, /* 9982 */ IC_VEX_L_W_OPSIZE, /* 9983 */ IC_EVEX_L2_B, /* 9984 */ IC_EVEX_L2_B, /* 9985 */ IC_EVEX_L2_XS_B, /* 9986 */ IC_EVEX_L2_XS_B, /* 9987 */ IC_EVEX_L2_XD_B, /* 9988 */ IC_EVEX_L2_XD_B, /* 9989 */ IC_EVEX_L2_XD_B, /* 9990 */ IC_EVEX_L2_XD_B, /* 9991 */ IC_EVEX_L2_W_B, /* 9992 */ IC_EVEX_L2_W_B, /* 9993 */ IC_EVEX_L2_W_XS_B, /* 9994 */ IC_EVEX_L2_W_XS_B, /* 9995 */ IC_EVEX_L2_W_XD_B, /* 9996 */ IC_EVEX_L2_W_XD_B, /* 9997 */ IC_EVEX_L2_W_XD_B, /* 9998 */ IC_EVEX_L2_W_XD_B, /* 9999 */ IC_EVEX_L2_OPSIZE_B, /* 10000 */ IC_EVEX_L2_OPSIZE_B, /* 10001 */ IC_EVEX_L2_OPSIZE_B, /* 10002 */ IC_EVEX_L2_OPSIZE_B, /* 10003 */ IC_EVEX_L2_OPSIZE_B, /* 10004 */ IC_EVEX_L2_OPSIZE_B, /* 10005 */ IC_EVEX_L2_OPSIZE_B, /* 10006 */ IC_EVEX_L2_OPSIZE_B, /* 10007 */ IC_EVEX_L2_W_OPSIZE_B, /* 10008 */ IC_EVEX_L2_W_OPSIZE_B, /* 10009 */ IC_EVEX_L2_W_OPSIZE_B, /* 10010 */ IC_EVEX_L2_W_OPSIZE_B, /* 10011 */ IC_EVEX_L2_W_OPSIZE_B, /* 10012 */ IC_EVEX_L2_W_OPSIZE_B, /* 10013 */ IC_EVEX_L2_W_OPSIZE_B, /* 10014 */ IC_EVEX_L2_W_OPSIZE_B, /* 10015 */ IC_EVEX_L2_B, /* 10016 */ IC_EVEX_L2_B, /* 10017 */ IC_EVEX_L2_XS_B, /* 10018 */ IC_EVEX_L2_XS_B, /* 10019 */ IC_EVEX_L2_XD_B, /* 10020 */ IC_EVEX_L2_XD_B, /* 10021 */ IC_EVEX_L2_XD_B, /* 10022 */ IC_EVEX_L2_XD_B, /* 10023 */ IC_EVEX_L2_W_B, /* 10024 */ IC_EVEX_L2_W_B, /* 10025 */ IC_EVEX_L2_W_XS_B, /* 10026 */ IC_EVEX_L2_W_XS_B, /* 10027 */ IC_EVEX_L2_W_XD_B, /* 10028 */ IC_EVEX_L2_W_XD_B, /* 10029 */ IC_EVEX_L2_W_XD_B, /* 10030 */ IC_EVEX_L2_W_XD_B, /* 10031 */ IC_EVEX_L2_OPSIZE_B, /* 10032 */ IC_EVEX_L2_OPSIZE_B, /* 10033 */ IC_EVEX_L2_OPSIZE_B, /* 10034 */ IC_EVEX_L2_OPSIZE_B, /* 10035 */ IC_EVEX_L2_OPSIZE_B, /* 10036 */ IC_EVEX_L2_OPSIZE_B, /* 10037 */ IC_EVEX_L2_OPSIZE_B, /* 10038 */ IC_EVEX_L2_OPSIZE_B, /* 10039 */ IC_EVEX_L2_W_OPSIZE_B, /* 10040 */ IC_EVEX_L2_W_OPSIZE_B, /* 10041 */ IC_EVEX_L2_W_OPSIZE_B, /* 10042 */ IC_EVEX_L2_W_OPSIZE_B, /* 10043 */ IC_EVEX_L2_W_OPSIZE_B, /* 10044 */ IC_EVEX_L2_W_OPSIZE_B, /* 10045 */ IC_EVEX_L2_W_OPSIZE_B, /* 10046 */ IC_EVEX_L2_W_OPSIZE_B, /* 10047 */ IC_EVEX_L2_B, /* 10048 */ IC_EVEX_L2_B, /* 10049 */ IC_EVEX_L2_XS_B, /* 10050 */ IC_EVEX_L2_XS_B, /* 10051 */ IC_EVEX_L2_XD_B, /* 10052 */ IC_EVEX_L2_XD_B, /* 10053 */ IC_EVEX_L2_XD_B, /* 10054 */ IC_EVEX_L2_XD_B, /* 10055 */ IC_EVEX_L2_W_B, /* 10056 */ IC_EVEX_L2_W_B, /* 10057 */ IC_EVEX_L2_W_XS_B, /* 10058 */ IC_EVEX_L2_W_XS_B, /* 10059 */ IC_EVEX_L2_W_XD_B, /* 10060 */ IC_EVEX_L2_W_XD_B, /* 10061 */ IC_EVEX_L2_W_XD_B, /* 10062 */ IC_EVEX_L2_W_XD_B, /* 10063 */ IC_EVEX_L2_OPSIZE_B, /* 10064 */ IC_EVEX_L2_OPSIZE_B, /* 10065 */ IC_EVEX_L2_OPSIZE_B, /* 10066 */ IC_EVEX_L2_OPSIZE_B, /* 10067 */ IC_EVEX_L2_OPSIZE_B, /* 10068 */ IC_EVEX_L2_OPSIZE_B, /* 10069 */ IC_EVEX_L2_OPSIZE_B, /* 10070 */ IC_EVEX_L2_OPSIZE_B, /* 10071 */ IC_EVEX_L2_W_OPSIZE_B, /* 10072 */ IC_EVEX_L2_W_OPSIZE_B, /* 10073 */ IC_EVEX_L2_W_OPSIZE_B, /* 10074 */ IC_EVEX_L2_W_OPSIZE_B, /* 10075 */ IC_EVEX_L2_W_OPSIZE_B, /* 10076 */ IC_EVEX_L2_W_OPSIZE_B, /* 10077 */ IC_EVEX_L2_W_OPSIZE_B, /* 10078 */ IC_EVEX_L2_W_OPSIZE_B, /* 10079 */ IC_EVEX_L2_B, /* 10080 */ IC_EVEX_L2_B, /* 10081 */ IC_EVEX_L2_XS_B, /* 10082 */ IC_EVEX_L2_XS_B, /* 10083 */ IC_EVEX_L2_XD_B, /* 10084 */ IC_EVEX_L2_XD_B, /* 10085 */ IC_EVEX_L2_XD_B, /* 10086 */ IC_EVEX_L2_XD_B, /* 10087 */ IC_EVEX_L2_W_B, /* 10088 */ IC_EVEX_L2_W_B, /* 10089 */ IC_EVEX_L2_W_XS_B, /* 10090 */ IC_EVEX_L2_W_XS_B, /* 10091 */ IC_EVEX_L2_W_XD_B, /* 10092 */ IC_EVEX_L2_W_XD_B, /* 10093 */ IC_EVEX_L2_W_XD_B, /* 10094 */ IC_EVEX_L2_W_XD_B, /* 10095 */ IC_EVEX_L2_OPSIZE_B, /* 10096 */ IC_EVEX_L2_OPSIZE_B, /* 10097 */ IC_EVEX_L2_OPSIZE_B, /* 10098 */ IC_EVEX_L2_OPSIZE_B, /* 10099 */ IC_EVEX_L2_OPSIZE_B, /* 10100 */ IC_EVEX_L2_OPSIZE_B, /* 10101 */ IC_EVEX_L2_OPSIZE_B, /* 10102 */ IC_EVEX_L2_OPSIZE_B, /* 10103 */ IC_EVEX_L2_W_OPSIZE_B, /* 10104 */ IC_EVEX_L2_W_OPSIZE_B, /* 10105 */ IC_EVEX_L2_W_OPSIZE_B, /* 10106 */ IC_EVEX_L2_W_OPSIZE_B, /* 10107 */ IC_EVEX_L2_W_OPSIZE_B, /* 10108 */ IC_EVEX_L2_W_OPSIZE_B, /* 10109 */ IC_EVEX_L2_W_OPSIZE_B, /* 10110 */ IC_EVEX_L2_W_OPSIZE_B, /* 10111 */ IC_EVEX_L2_B, /* 10112 */ IC_EVEX_L2_B, /* 10113 */ IC_EVEX_L2_XS_B, /* 10114 */ IC_EVEX_L2_XS_B, /* 10115 */ IC_EVEX_L2_XD_B, /* 10116 */ IC_EVEX_L2_XD_B, /* 10117 */ IC_EVEX_L2_XD_B, /* 10118 */ IC_EVEX_L2_XD_B, /* 10119 */ IC_EVEX_L2_W_B, /* 10120 */ IC_EVEX_L2_W_B, /* 10121 */ IC_EVEX_L2_W_XS_B, /* 10122 */ IC_EVEX_L2_W_XS_B, /* 10123 */ IC_EVEX_L2_W_XD_B, /* 10124 */ IC_EVEX_L2_W_XD_B, /* 10125 */ IC_EVEX_L2_W_XD_B, /* 10126 */ IC_EVEX_L2_W_XD_B, /* 10127 */ IC_EVEX_L2_OPSIZE_B, /* 10128 */ IC_EVEX_L2_OPSIZE_B, /* 10129 */ IC_EVEX_L2_OPSIZE_B, /* 10130 */ IC_EVEX_L2_OPSIZE_B, /* 10131 */ IC_EVEX_L2_OPSIZE_B, /* 10132 */ IC_EVEX_L2_OPSIZE_B, /* 10133 */ IC_EVEX_L2_OPSIZE_B, /* 10134 */ IC_EVEX_L2_OPSIZE_B, /* 10135 */ IC_EVEX_L2_W_OPSIZE_B, /* 10136 */ IC_EVEX_L2_W_OPSIZE_B, /* 10137 */ IC_EVEX_L2_W_OPSIZE_B, /* 10138 */ IC_EVEX_L2_W_OPSIZE_B, /* 10139 */ IC_EVEX_L2_W_OPSIZE_B, /* 10140 */ IC_EVEX_L2_W_OPSIZE_B, /* 10141 */ IC_EVEX_L2_W_OPSIZE_B, /* 10142 */ IC_EVEX_L2_W_OPSIZE_B, /* 10143 */ IC_EVEX_L2_B, /* 10144 */ IC_EVEX_L2_B, /* 10145 */ IC_EVEX_L2_XS_B, /* 10146 */ IC_EVEX_L2_XS_B, /* 10147 */ IC_EVEX_L2_XD_B, /* 10148 */ IC_EVEX_L2_XD_B, /* 10149 */ IC_EVEX_L2_XD_B, /* 10150 */ IC_EVEX_L2_XD_B, /* 10151 */ IC_EVEX_L2_W_B, /* 10152 */ IC_EVEX_L2_W_B, /* 10153 */ IC_EVEX_L2_W_XS_B, /* 10154 */ IC_EVEX_L2_W_XS_B, /* 10155 */ IC_EVEX_L2_W_XD_B, /* 10156 */ IC_EVEX_L2_W_XD_B, /* 10157 */ IC_EVEX_L2_W_XD_B, /* 10158 */ IC_EVEX_L2_W_XD_B, /* 10159 */ IC_EVEX_L2_OPSIZE_B, /* 10160 */ IC_EVEX_L2_OPSIZE_B, /* 10161 */ IC_EVEX_L2_OPSIZE_B, /* 10162 */ IC_EVEX_L2_OPSIZE_B, /* 10163 */ IC_EVEX_L2_OPSIZE_B, /* 10164 */ IC_EVEX_L2_OPSIZE_B, /* 10165 */ IC_EVEX_L2_OPSIZE_B, /* 10166 */ IC_EVEX_L2_OPSIZE_B, /* 10167 */ IC_EVEX_L2_W_OPSIZE_B, /* 10168 */ IC_EVEX_L2_W_OPSIZE_B, /* 10169 */ IC_EVEX_L2_W_OPSIZE_B, /* 10170 */ IC_EVEX_L2_W_OPSIZE_B, /* 10171 */ IC_EVEX_L2_W_OPSIZE_B, /* 10172 */ IC_EVEX_L2_W_OPSIZE_B, /* 10173 */ IC_EVEX_L2_W_OPSIZE_B, /* 10174 */ IC_EVEX_L2_W_OPSIZE_B, /* 10175 */ IC_EVEX_L2_B, /* 10176 */ IC_EVEX_L2_B, /* 10177 */ IC_EVEX_L2_XS_B, /* 10178 */ IC_EVEX_L2_XS_B, /* 10179 */ IC_EVEX_L2_XD_B, /* 10180 */ IC_EVEX_L2_XD_B, /* 10181 */ IC_EVEX_L2_XD_B, /* 10182 */ IC_EVEX_L2_XD_B, /* 10183 */ IC_EVEX_L2_W_B, /* 10184 */ IC_EVEX_L2_W_B, /* 10185 */ IC_EVEX_L2_W_XS_B, /* 10186 */ IC_EVEX_L2_W_XS_B, /* 10187 */ IC_EVEX_L2_W_XD_B, /* 10188 */ IC_EVEX_L2_W_XD_B, /* 10189 */ IC_EVEX_L2_W_XD_B, /* 10190 */ IC_EVEX_L2_W_XD_B, /* 10191 */ IC_EVEX_L2_OPSIZE_B, /* 10192 */ IC_EVEX_L2_OPSIZE_B, /* 10193 */ IC_EVEX_L2_OPSIZE_B, /* 10194 */ IC_EVEX_L2_OPSIZE_B, /* 10195 */ IC_EVEX_L2_OPSIZE_B, /* 10196 */ IC_EVEX_L2_OPSIZE_B, /* 10197 */ IC_EVEX_L2_OPSIZE_B, /* 10198 */ IC_EVEX_L2_OPSIZE_B, /* 10199 */ IC_EVEX_L2_W_OPSIZE_B, /* 10200 */ IC_EVEX_L2_W_OPSIZE_B, /* 10201 */ IC_EVEX_L2_W_OPSIZE_B, /* 10202 */ IC_EVEX_L2_W_OPSIZE_B, /* 10203 */ IC_EVEX_L2_W_OPSIZE_B, /* 10204 */ IC_EVEX_L2_W_OPSIZE_B, /* 10205 */ IC_EVEX_L2_W_OPSIZE_B, /* 10206 */ IC_EVEX_L2_W_OPSIZE_B, /* 10207 */ IC_EVEX_L2_B, /* 10208 */ IC_EVEX_L2_B, /* 10209 */ IC_EVEX_L2_XS_B, /* 10210 */ IC_EVEX_L2_XS_B, /* 10211 */ IC_EVEX_L2_XD_B, /* 10212 */ IC_EVEX_L2_XD_B, /* 10213 */ IC_EVEX_L2_XD_B, /* 10214 */ IC_EVEX_L2_XD_B, /* 10215 */ IC_EVEX_L2_W_B, /* 10216 */ IC_EVEX_L2_W_B, /* 10217 */ IC_EVEX_L2_W_XS_B, /* 10218 */ IC_EVEX_L2_W_XS_B, /* 10219 */ IC_EVEX_L2_W_XD_B, /* 10220 */ IC_EVEX_L2_W_XD_B, /* 10221 */ IC_EVEX_L2_W_XD_B, /* 10222 */ IC_EVEX_L2_W_XD_B, /* 10223 */ IC_EVEX_L2_OPSIZE_B, /* 10224 */ IC_EVEX_L2_OPSIZE_B, /* 10225 */ IC_EVEX_L2_OPSIZE_B, /* 10226 */ IC_EVEX_L2_OPSIZE_B, /* 10227 */ IC_EVEX_L2_OPSIZE_B, /* 10228 */ IC_EVEX_L2_OPSIZE_B, /* 10229 */ IC_EVEX_L2_OPSIZE_B, /* 10230 */ IC_EVEX_L2_OPSIZE_B, /* 10231 */ IC_EVEX_L2_W_OPSIZE_B, /* 10232 */ IC_EVEX_L2_W_OPSIZE_B, /* 10233 */ IC_EVEX_L2_W_OPSIZE_B, /* 10234 */ IC_EVEX_L2_W_OPSIZE_B, /* 10235 */ IC_EVEX_L2_W_OPSIZE_B, /* 10236 */ IC_EVEX_L2_W_OPSIZE_B, /* 10237 */ IC_EVEX_L2_W_OPSIZE_B, /* 10238 */ IC_EVEX_L2_W_OPSIZE_B, /* 10239 */ IC, /* 10240 */ IC_64BIT, /* 10241 */ IC_XS, /* 10242 */ IC_64BIT_XS, /* 10243 */ IC_XD, /* 10244 */ IC_64BIT_XD, /* 10245 */ IC_XS, /* 10246 */ IC_64BIT_XS, /* 10247 */ IC, /* 10248 */ IC_64BIT_REXW, /* 10249 */ IC_XS, /* 10250 */ IC_64BIT_REXW_XS, /* 10251 */ IC_XD, /* 10252 */ IC_64BIT_REXW_XD, /* 10253 */ IC_XS, /* 10254 */ IC_64BIT_REXW_XS, /* 10255 */ IC_OPSIZE, /* 10256 */ IC_64BIT_OPSIZE, /* 10257 */ IC_XS_OPSIZE, /* 10258 */ IC_64BIT_XS_OPSIZE, /* 10259 */ IC_XD_OPSIZE, /* 10260 */ IC_64BIT_XD_OPSIZE, /* 10261 */ IC_XS_OPSIZE, /* 10262 */ IC_64BIT_XD_OPSIZE, /* 10263 */ IC_OPSIZE, /* 10264 */ IC_64BIT_REXW_OPSIZE, /* 10265 */ IC_XS_OPSIZE, /* 10266 */ IC_64BIT_REXW_XS, /* 10267 */ IC_XD_OPSIZE, /* 10268 */ IC_64BIT_REXW_XD, /* 10269 */ IC_XS_OPSIZE, /* 10270 */ IC_64BIT_REXW_XS, /* 10271 */ IC_ADSIZE, /* 10272 */ IC_64BIT_ADSIZE, /* 10273 */ IC_XS, /* 10274 */ IC_64BIT_XS, /* 10275 */ IC_XD, /* 10276 */ IC_64BIT_XD, /* 10277 */ IC_XS, /* 10278 */ IC_64BIT_XS, /* 10279 */ IC_ADSIZE, /* 10280 */ IC_64BIT_REXW_ADSIZE, /* 10281 */ IC_XS, /* 10282 */ IC_64BIT_REXW_XS, /* 10283 */ IC_XD, /* 10284 */ IC_64BIT_REXW_XD, /* 10285 */ IC_XS, /* 10286 */ IC_64BIT_REXW_XS, /* 10287 */ IC_OPSIZE_ADSIZE, /* 10288 */ IC_64BIT_OPSIZE_ADSIZE, /* 10289 */ IC_XS_OPSIZE, /* 10290 */ IC_64BIT_XS_OPSIZE, /* 10291 */ IC_XD_OPSIZE, /* 10292 */ IC_64BIT_XD_OPSIZE, /* 10293 */ IC_XS_OPSIZE, /* 10294 */ IC_64BIT_XD_OPSIZE, /* 10295 */ IC_OPSIZE_ADSIZE, /* 10296 */ IC_64BIT_REXW_OPSIZE, /* 10297 */ IC_XS_OPSIZE, /* 10298 */ IC_64BIT_REXW_XS, /* 10299 */ IC_XD_OPSIZE, /* 10300 */ IC_64BIT_REXW_XD, /* 10301 */ IC_XS_OPSIZE, /* 10302 */ IC_64BIT_REXW_XS, /* 10303 */ IC_VEX, /* 10304 */ IC_VEX, /* 10305 */ IC_VEX_XS, /* 10306 */ IC_VEX_XS, /* 10307 */ IC_VEX_XD, /* 10308 */ IC_VEX_XD, /* 10309 */ IC_VEX_XD, /* 10310 */ IC_VEX_XD, /* 10311 */ IC_VEX_W, /* 10312 */ IC_VEX_W, /* 10313 */ IC_VEX_W_XS, /* 10314 */ IC_VEX_W_XS, /* 10315 */ IC_VEX_W_XD, /* 10316 */ IC_VEX_W_XD, /* 10317 */ IC_VEX_W_XD, /* 10318 */ IC_VEX_W_XD, /* 10319 */ IC_VEX_OPSIZE, /* 10320 */ IC_VEX_OPSIZE, /* 10321 */ IC_VEX_OPSIZE, /* 10322 */ IC_VEX_OPSIZE, /* 10323 */ IC_VEX_OPSIZE, /* 10324 */ IC_VEX_OPSIZE, /* 10325 */ IC_VEX_OPSIZE, /* 10326 */ IC_VEX_OPSIZE, /* 10327 */ IC_VEX_W_OPSIZE, /* 10328 */ IC_VEX_W_OPSIZE, /* 10329 */ IC_VEX_W_OPSIZE, /* 10330 */ IC_VEX_W_OPSIZE, /* 10331 */ IC_VEX_W_OPSIZE, /* 10332 */ IC_VEX_W_OPSIZE, /* 10333 */ IC_VEX_W_OPSIZE, /* 10334 */ IC_VEX_W_OPSIZE, /* 10335 */ IC_VEX, /* 10336 */ IC_VEX, /* 10337 */ IC_VEX_XS, /* 10338 */ IC_VEX_XS, /* 10339 */ IC_VEX_XD, /* 10340 */ IC_VEX_XD, /* 10341 */ IC_VEX_XD, /* 10342 */ IC_VEX_XD, /* 10343 */ IC_VEX_W, /* 10344 */ IC_VEX_W, /* 10345 */ IC_VEX_W_XS, /* 10346 */ IC_VEX_W_XS, /* 10347 */ IC_VEX_W_XD, /* 10348 */ IC_VEX_W_XD, /* 10349 */ IC_VEX_W_XD, /* 10350 */ IC_VEX_W_XD, /* 10351 */ IC_VEX_OPSIZE, /* 10352 */ IC_VEX_OPSIZE, /* 10353 */ IC_VEX_OPSIZE, /* 10354 */ IC_VEX_OPSIZE, /* 10355 */ IC_VEX_OPSIZE, /* 10356 */ IC_VEX_OPSIZE, /* 10357 */ IC_VEX_OPSIZE, /* 10358 */ IC_VEX_OPSIZE, /* 10359 */ IC_VEX_W_OPSIZE, /* 10360 */ IC_VEX_W_OPSIZE, /* 10361 */ IC_VEX_W_OPSIZE, /* 10362 */ IC_VEX_W_OPSIZE, /* 10363 */ IC_VEX_W_OPSIZE, /* 10364 */ IC_VEX_W_OPSIZE, /* 10365 */ IC_VEX_W_OPSIZE, /* 10366 */ IC_VEX_W_OPSIZE, /* 10367 */ IC_VEX_L, /* 10368 */ IC_VEX_L, /* 10369 */ IC_VEX_L_XS, /* 10370 */ IC_VEX_L_XS, /* 10371 */ IC_VEX_L_XD, /* 10372 */ IC_VEX_L_XD, /* 10373 */ IC_VEX_L_XD, /* 10374 */ IC_VEX_L_XD, /* 10375 */ IC_VEX_L_W, /* 10376 */ IC_VEX_L_W, /* 10377 */ IC_VEX_L_W_XS, /* 10378 */ IC_VEX_L_W_XS, /* 10379 */ IC_VEX_L_W_XD, /* 10380 */ IC_VEX_L_W_XD, /* 10381 */ IC_VEX_L_W_XD, /* 10382 */ IC_VEX_L_W_XD, /* 10383 */ IC_VEX_L_OPSIZE, /* 10384 */ IC_VEX_L_OPSIZE, /* 10385 */ IC_VEX_L_OPSIZE, /* 10386 */ IC_VEX_L_OPSIZE, /* 10387 */ IC_VEX_L_OPSIZE, /* 10388 */ IC_VEX_L_OPSIZE, /* 10389 */ IC_VEX_L_OPSIZE, /* 10390 */ IC_VEX_L_OPSIZE, /* 10391 */ IC_VEX_L_W_OPSIZE, /* 10392 */ IC_VEX_L_W_OPSIZE, /* 10393 */ IC_VEX_L_W_OPSIZE, /* 10394 */ IC_VEX_L_W_OPSIZE, /* 10395 */ IC_VEX_L_W_OPSIZE, /* 10396 */ IC_VEX_L_W_OPSIZE, /* 10397 */ IC_VEX_L_W_OPSIZE, /* 10398 */ IC_VEX_L_W_OPSIZE, /* 10399 */ IC_VEX_L, /* 10400 */ IC_VEX_L, /* 10401 */ IC_VEX_L_XS, /* 10402 */ IC_VEX_L_XS, /* 10403 */ IC_VEX_L_XD, /* 10404 */ IC_VEX_L_XD, /* 10405 */ IC_VEX_L_XD, /* 10406 */ IC_VEX_L_XD, /* 10407 */ IC_VEX_L_W, /* 10408 */ IC_VEX_L_W, /* 10409 */ IC_VEX_L_W_XS, /* 10410 */ IC_VEX_L_W_XS, /* 10411 */ IC_VEX_L_W_XD, /* 10412 */ IC_VEX_L_W_XD, /* 10413 */ IC_VEX_L_W_XD, /* 10414 */ IC_VEX_L_W_XD, /* 10415 */ IC_VEX_L_OPSIZE, /* 10416 */ IC_VEX_L_OPSIZE, /* 10417 */ IC_VEX_L_OPSIZE, /* 10418 */ IC_VEX_L_OPSIZE, /* 10419 */ IC_VEX_L_OPSIZE, /* 10420 */ IC_VEX_L_OPSIZE, /* 10421 */ IC_VEX_L_OPSIZE, /* 10422 */ IC_VEX_L_OPSIZE, /* 10423 */ IC_VEX_L_W_OPSIZE, /* 10424 */ IC_VEX_L_W_OPSIZE, /* 10425 */ IC_VEX_L_W_OPSIZE, /* 10426 */ IC_VEX_L_W_OPSIZE, /* 10427 */ IC_VEX_L_W_OPSIZE, /* 10428 */ IC_VEX_L_W_OPSIZE, /* 10429 */ IC_VEX_L_W_OPSIZE, /* 10430 */ IC_VEX_L_W_OPSIZE, /* 10431 */ IC_VEX_L, /* 10432 */ IC_VEX_L, /* 10433 */ IC_VEX_L_XS, /* 10434 */ IC_VEX_L_XS, /* 10435 */ IC_VEX_L_XD, /* 10436 */ IC_VEX_L_XD, /* 10437 */ IC_VEX_L_XD, /* 10438 */ IC_VEX_L_XD, /* 10439 */ IC_VEX_L_W, /* 10440 */ IC_VEX_L_W, /* 10441 */ IC_VEX_L_W_XS, /* 10442 */ IC_VEX_L_W_XS, /* 10443 */ IC_VEX_L_W_XD, /* 10444 */ IC_VEX_L_W_XD, /* 10445 */ IC_VEX_L_W_XD, /* 10446 */ IC_VEX_L_W_XD, /* 10447 */ IC_VEX_L_OPSIZE, /* 10448 */ IC_VEX_L_OPSIZE, /* 10449 */ IC_VEX_L_OPSIZE, /* 10450 */ IC_VEX_L_OPSIZE, /* 10451 */ IC_VEX_L_OPSIZE, /* 10452 */ IC_VEX_L_OPSIZE, /* 10453 */ IC_VEX_L_OPSIZE, /* 10454 */ IC_VEX_L_OPSIZE, /* 10455 */ IC_VEX_L_W_OPSIZE, /* 10456 */ IC_VEX_L_W_OPSIZE, /* 10457 */ IC_VEX_L_W_OPSIZE, /* 10458 */ IC_VEX_L_W_OPSIZE, /* 10459 */ IC_VEX_L_W_OPSIZE, /* 10460 */ IC_VEX_L_W_OPSIZE, /* 10461 */ IC_VEX_L_W_OPSIZE, /* 10462 */ IC_VEX_L_W_OPSIZE, /* 10463 */ IC_VEX_L, /* 10464 */ IC_VEX_L, /* 10465 */ IC_VEX_L_XS, /* 10466 */ IC_VEX_L_XS, /* 10467 */ IC_VEX_L_XD, /* 10468 */ IC_VEX_L_XD, /* 10469 */ IC_VEX_L_XD, /* 10470 */ IC_VEX_L_XD, /* 10471 */ IC_VEX_L_W, /* 10472 */ IC_VEX_L_W, /* 10473 */ IC_VEX_L_W_XS, /* 10474 */ IC_VEX_L_W_XS, /* 10475 */ IC_VEX_L_W_XD, /* 10476 */ IC_VEX_L_W_XD, /* 10477 */ IC_VEX_L_W_XD, /* 10478 */ IC_VEX_L_W_XD, /* 10479 */ IC_VEX_L_OPSIZE, /* 10480 */ IC_VEX_L_OPSIZE, /* 10481 */ IC_VEX_L_OPSIZE, /* 10482 */ IC_VEX_L_OPSIZE, /* 10483 */ IC_VEX_L_OPSIZE, /* 10484 */ IC_VEX_L_OPSIZE, /* 10485 */ IC_VEX_L_OPSIZE, /* 10486 */ IC_VEX_L_OPSIZE, /* 10487 */ IC_VEX_L_W_OPSIZE, /* 10488 */ IC_VEX_L_W_OPSIZE, /* 10489 */ IC_VEX_L_W_OPSIZE, /* 10490 */ IC_VEX_L_W_OPSIZE, /* 10491 */ IC_VEX_L_W_OPSIZE, /* 10492 */ IC_VEX_L_W_OPSIZE, /* 10493 */ IC_VEX_L_W_OPSIZE, /* 10494 */ IC_VEX_L_W_OPSIZE, /* 10495 */ IC_EVEX_K_B, /* 10496 */ IC_EVEX_K_B, /* 10497 */ IC_EVEX_XS_K_B, /* 10498 */ IC_EVEX_XS_K_B, /* 10499 */ IC_EVEX_XD_K_B, /* 10500 */ IC_EVEX_XD_K_B, /* 10501 */ IC_EVEX_XD_K_B, /* 10502 */ IC_EVEX_XD_K_B, /* 10503 */ IC_EVEX_W_K_B, /* 10504 */ IC_EVEX_W_K_B, /* 10505 */ IC_EVEX_W_XS_K_B, /* 10506 */ IC_EVEX_W_XS_K_B, /* 10507 */ IC_EVEX_W_XD_K_B, /* 10508 */ IC_EVEX_W_XD_K_B, /* 10509 */ IC_EVEX_W_XD_K_B, /* 10510 */ IC_EVEX_W_XD_K_B, /* 10511 */ IC_EVEX_OPSIZE_K_B, /* 10512 */ IC_EVEX_OPSIZE_K_B, /* 10513 */ IC_EVEX_OPSIZE_K_B, /* 10514 */ IC_EVEX_OPSIZE_K_B, /* 10515 */ IC_EVEX_OPSIZE_K_B, /* 10516 */ IC_EVEX_OPSIZE_K_B, /* 10517 */ IC_EVEX_OPSIZE_K_B, /* 10518 */ IC_EVEX_OPSIZE_K_B, /* 10519 */ IC_EVEX_W_OPSIZE_K_B, /* 10520 */ IC_EVEX_W_OPSIZE_K_B, /* 10521 */ IC_EVEX_W_OPSIZE_K_B, /* 10522 */ IC_EVEX_W_OPSIZE_K_B, /* 10523 */ IC_EVEX_W_OPSIZE_K_B, /* 10524 */ IC_EVEX_W_OPSIZE_K_B, /* 10525 */ IC_EVEX_W_OPSIZE_K_B, /* 10526 */ IC_EVEX_W_OPSIZE_K_B, /* 10527 */ IC_EVEX_K_B, /* 10528 */ IC_EVEX_K_B, /* 10529 */ IC_EVEX_XS_K_B, /* 10530 */ IC_EVEX_XS_K_B, /* 10531 */ IC_EVEX_XD_K_B, /* 10532 */ IC_EVEX_XD_K_B, /* 10533 */ IC_EVEX_XD_K_B, /* 10534 */ IC_EVEX_XD_K_B, /* 10535 */ IC_EVEX_W_K_B, /* 10536 */ IC_EVEX_W_K_B, /* 10537 */ IC_EVEX_W_XS_K_B, /* 10538 */ IC_EVEX_W_XS_K_B, /* 10539 */ IC_EVEX_W_XD_K_B, /* 10540 */ IC_EVEX_W_XD_K_B, /* 10541 */ IC_EVEX_W_XD_K_B, /* 10542 */ IC_EVEX_W_XD_K_B, /* 10543 */ IC_EVEX_OPSIZE_K_B, /* 10544 */ IC_EVEX_OPSIZE_K_B, /* 10545 */ IC_EVEX_OPSIZE_K_B, /* 10546 */ IC_EVEX_OPSIZE_K_B, /* 10547 */ IC_EVEX_OPSIZE_K_B, /* 10548 */ IC_EVEX_OPSIZE_K_B, /* 10549 */ IC_EVEX_OPSIZE_K_B, /* 10550 */ IC_EVEX_OPSIZE_K_B, /* 10551 */ IC_EVEX_W_OPSIZE_K_B, /* 10552 */ IC_EVEX_W_OPSIZE_K_B, /* 10553 */ IC_EVEX_W_OPSIZE_K_B, /* 10554 */ IC_EVEX_W_OPSIZE_K_B, /* 10555 */ IC_EVEX_W_OPSIZE_K_B, /* 10556 */ IC_EVEX_W_OPSIZE_K_B, /* 10557 */ IC_EVEX_W_OPSIZE_K_B, /* 10558 */ IC_EVEX_W_OPSIZE_K_B, /* 10559 */ IC_EVEX_K_B, /* 10560 */ IC_EVEX_K_B, /* 10561 */ IC_EVEX_XS_K_B, /* 10562 */ IC_EVEX_XS_K_B, /* 10563 */ IC_EVEX_XD_K_B, /* 10564 */ IC_EVEX_XD_K_B, /* 10565 */ IC_EVEX_XD_K_B, /* 10566 */ IC_EVEX_XD_K_B, /* 10567 */ IC_EVEX_W_K_B, /* 10568 */ IC_EVEX_W_K_B, /* 10569 */ IC_EVEX_W_XS_K_B, /* 10570 */ IC_EVEX_W_XS_K_B, /* 10571 */ IC_EVEX_W_XD_K_B, /* 10572 */ IC_EVEX_W_XD_K_B, /* 10573 */ IC_EVEX_W_XD_K_B, /* 10574 */ IC_EVEX_W_XD_K_B, /* 10575 */ IC_EVEX_OPSIZE_K_B, /* 10576 */ IC_EVEX_OPSIZE_K_B, /* 10577 */ IC_EVEX_OPSIZE_K_B, /* 10578 */ IC_EVEX_OPSIZE_K_B, /* 10579 */ IC_EVEX_OPSIZE_K_B, /* 10580 */ IC_EVEX_OPSIZE_K_B, /* 10581 */ IC_EVEX_OPSIZE_K_B, /* 10582 */ IC_EVEX_OPSIZE_K_B, /* 10583 */ IC_EVEX_W_OPSIZE_K_B, /* 10584 */ IC_EVEX_W_OPSIZE_K_B, /* 10585 */ IC_EVEX_W_OPSIZE_K_B, /* 10586 */ IC_EVEX_W_OPSIZE_K_B, /* 10587 */ IC_EVEX_W_OPSIZE_K_B, /* 10588 */ IC_EVEX_W_OPSIZE_K_B, /* 10589 */ IC_EVEX_W_OPSIZE_K_B, /* 10590 */ IC_EVEX_W_OPSIZE_K_B, /* 10591 */ IC_EVEX_K_B, /* 10592 */ IC_EVEX_K_B, /* 10593 */ IC_EVEX_XS_K_B, /* 10594 */ IC_EVEX_XS_K_B, /* 10595 */ IC_EVEX_XD_K_B, /* 10596 */ IC_EVEX_XD_K_B, /* 10597 */ IC_EVEX_XD_K_B, /* 10598 */ IC_EVEX_XD_K_B, /* 10599 */ IC_EVEX_W_K_B, /* 10600 */ IC_EVEX_W_K_B, /* 10601 */ IC_EVEX_W_XS_K_B, /* 10602 */ IC_EVEX_W_XS_K_B, /* 10603 */ IC_EVEX_W_XD_K_B, /* 10604 */ IC_EVEX_W_XD_K_B, /* 10605 */ IC_EVEX_W_XD_K_B, /* 10606 */ IC_EVEX_W_XD_K_B, /* 10607 */ IC_EVEX_OPSIZE_K_B, /* 10608 */ IC_EVEX_OPSIZE_K_B, /* 10609 */ IC_EVEX_OPSIZE_K_B, /* 10610 */ IC_EVEX_OPSIZE_K_B, /* 10611 */ IC_EVEX_OPSIZE_K_B, /* 10612 */ IC_EVEX_OPSIZE_K_B, /* 10613 */ IC_EVEX_OPSIZE_K_B, /* 10614 */ IC_EVEX_OPSIZE_K_B, /* 10615 */ IC_EVEX_W_OPSIZE_K_B, /* 10616 */ IC_EVEX_W_OPSIZE_K_B, /* 10617 */ IC_EVEX_W_OPSIZE_K_B, /* 10618 */ IC_EVEX_W_OPSIZE_K_B, /* 10619 */ IC_EVEX_W_OPSIZE_K_B, /* 10620 */ IC_EVEX_W_OPSIZE_K_B, /* 10621 */ IC_EVEX_W_OPSIZE_K_B, /* 10622 */ IC_EVEX_W_OPSIZE_K_B, /* 10623 */ IC_EVEX_K_B, /* 10624 */ IC_EVEX_K_B, /* 10625 */ IC_EVEX_XS_K_B, /* 10626 */ IC_EVEX_XS_K_B, /* 10627 */ IC_EVEX_XD_K_B, /* 10628 */ IC_EVEX_XD_K_B, /* 10629 */ IC_EVEX_XD_K_B, /* 10630 */ IC_EVEX_XD_K_B, /* 10631 */ IC_EVEX_W_K_B, /* 10632 */ IC_EVEX_W_K_B, /* 10633 */ IC_EVEX_W_XS_K_B, /* 10634 */ IC_EVEX_W_XS_K_B, /* 10635 */ IC_EVEX_W_XD_K_B, /* 10636 */ IC_EVEX_W_XD_K_B, /* 10637 */ IC_EVEX_W_XD_K_B, /* 10638 */ IC_EVEX_W_XD_K_B, /* 10639 */ IC_EVEX_OPSIZE_K_B, /* 10640 */ IC_EVEX_OPSIZE_K_B, /* 10641 */ IC_EVEX_OPSIZE_K_B, /* 10642 */ IC_EVEX_OPSIZE_K_B, /* 10643 */ IC_EVEX_OPSIZE_K_B, /* 10644 */ IC_EVEX_OPSIZE_K_B, /* 10645 */ IC_EVEX_OPSIZE_K_B, /* 10646 */ IC_EVEX_OPSIZE_K_B, /* 10647 */ IC_EVEX_W_OPSIZE_K_B, /* 10648 */ IC_EVEX_W_OPSIZE_K_B, /* 10649 */ IC_EVEX_W_OPSIZE_K_B, /* 10650 */ IC_EVEX_W_OPSIZE_K_B, /* 10651 */ IC_EVEX_W_OPSIZE_K_B, /* 10652 */ IC_EVEX_W_OPSIZE_K_B, /* 10653 */ IC_EVEX_W_OPSIZE_K_B, /* 10654 */ IC_EVEX_W_OPSIZE_K_B, /* 10655 */ IC_EVEX_K_B, /* 10656 */ IC_EVEX_K_B, /* 10657 */ IC_EVEX_XS_K_B, /* 10658 */ IC_EVEX_XS_K_B, /* 10659 */ IC_EVEX_XD_K_B, /* 10660 */ IC_EVEX_XD_K_B, /* 10661 */ IC_EVEX_XD_K_B, /* 10662 */ IC_EVEX_XD_K_B, /* 10663 */ IC_EVEX_W_K_B, /* 10664 */ IC_EVEX_W_K_B, /* 10665 */ IC_EVEX_W_XS_K_B, /* 10666 */ IC_EVEX_W_XS_K_B, /* 10667 */ IC_EVEX_W_XD_K_B, /* 10668 */ IC_EVEX_W_XD_K_B, /* 10669 */ IC_EVEX_W_XD_K_B, /* 10670 */ IC_EVEX_W_XD_K_B, /* 10671 */ IC_EVEX_OPSIZE_K_B, /* 10672 */ IC_EVEX_OPSIZE_K_B, /* 10673 */ IC_EVEX_OPSIZE_K_B, /* 10674 */ IC_EVEX_OPSIZE_K_B, /* 10675 */ IC_EVEX_OPSIZE_K_B, /* 10676 */ IC_EVEX_OPSIZE_K_B, /* 10677 */ IC_EVEX_OPSIZE_K_B, /* 10678 */ IC_EVEX_OPSIZE_K_B, /* 10679 */ IC_EVEX_W_OPSIZE_K_B, /* 10680 */ IC_EVEX_W_OPSIZE_K_B, /* 10681 */ IC_EVEX_W_OPSIZE_K_B, /* 10682 */ IC_EVEX_W_OPSIZE_K_B, /* 10683 */ IC_EVEX_W_OPSIZE_K_B, /* 10684 */ IC_EVEX_W_OPSIZE_K_B, /* 10685 */ IC_EVEX_W_OPSIZE_K_B, /* 10686 */ IC_EVEX_W_OPSIZE_K_B, /* 10687 */ IC_EVEX_K_B, /* 10688 */ IC_EVEX_K_B, /* 10689 */ IC_EVEX_XS_K_B, /* 10690 */ IC_EVEX_XS_K_B, /* 10691 */ IC_EVEX_XD_K_B, /* 10692 */ IC_EVEX_XD_K_B, /* 10693 */ IC_EVEX_XD_K_B, /* 10694 */ IC_EVEX_XD_K_B, /* 10695 */ IC_EVEX_W_K_B, /* 10696 */ IC_EVEX_W_K_B, /* 10697 */ IC_EVEX_W_XS_K_B, /* 10698 */ IC_EVEX_W_XS_K_B, /* 10699 */ IC_EVEX_W_XD_K_B, /* 10700 */ IC_EVEX_W_XD_K_B, /* 10701 */ IC_EVEX_W_XD_K_B, /* 10702 */ IC_EVEX_W_XD_K_B, /* 10703 */ IC_EVEX_OPSIZE_K_B, /* 10704 */ IC_EVEX_OPSIZE_K_B, /* 10705 */ IC_EVEX_OPSIZE_K_B, /* 10706 */ IC_EVEX_OPSIZE_K_B, /* 10707 */ IC_EVEX_OPSIZE_K_B, /* 10708 */ IC_EVEX_OPSIZE_K_B, /* 10709 */ IC_EVEX_OPSIZE_K_B, /* 10710 */ IC_EVEX_OPSIZE_K_B, /* 10711 */ IC_EVEX_W_OPSIZE_K_B, /* 10712 */ IC_EVEX_W_OPSIZE_K_B, /* 10713 */ IC_EVEX_W_OPSIZE_K_B, /* 10714 */ IC_EVEX_W_OPSIZE_K_B, /* 10715 */ IC_EVEX_W_OPSIZE_K_B, /* 10716 */ IC_EVEX_W_OPSIZE_K_B, /* 10717 */ IC_EVEX_W_OPSIZE_K_B, /* 10718 */ IC_EVEX_W_OPSIZE_K_B, /* 10719 */ IC_EVEX_K_B, /* 10720 */ IC_EVEX_K_B, /* 10721 */ IC_EVEX_XS_K_B, /* 10722 */ IC_EVEX_XS_K_B, /* 10723 */ IC_EVEX_XD_K_B, /* 10724 */ IC_EVEX_XD_K_B, /* 10725 */ IC_EVEX_XD_K_B, /* 10726 */ IC_EVEX_XD_K_B, /* 10727 */ IC_EVEX_W_K_B, /* 10728 */ IC_EVEX_W_K_B, /* 10729 */ IC_EVEX_W_XS_K_B, /* 10730 */ IC_EVEX_W_XS_K_B, /* 10731 */ IC_EVEX_W_XD_K_B, /* 10732 */ IC_EVEX_W_XD_K_B, /* 10733 */ IC_EVEX_W_XD_K_B, /* 10734 */ IC_EVEX_W_XD_K_B, /* 10735 */ IC_EVEX_OPSIZE_K_B, /* 10736 */ IC_EVEX_OPSIZE_K_B, /* 10737 */ IC_EVEX_OPSIZE_K_B, /* 10738 */ IC_EVEX_OPSIZE_K_B, /* 10739 */ IC_EVEX_OPSIZE_K_B, /* 10740 */ IC_EVEX_OPSIZE_K_B, /* 10741 */ IC_EVEX_OPSIZE_K_B, /* 10742 */ IC_EVEX_OPSIZE_K_B, /* 10743 */ IC_EVEX_W_OPSIZE_K_B, /* 10744 */ IC_EVEX_W_OPSIZE_K_B, /* 10745 */ IC_EVEX_W_OPSIZE_K_B, /* 10746 */ IC_EVEX_W_OPSIZE_K_B, /* 10747 */ IC_EVEX_W_OPSIZE_K_B, /* 10748 */ IC_EVEX_W_OPSIZE_K_B, /* 10749 */ IC_EVEX_W_OPSIZE_K_B, /* 10750 */ IC_EVEX_W_OPSIZE_K_B, /* 10751 */ IC, /* 10752 */ IC_64BIT, /* 10753 */ IC_XS, /* 10754 */ IC_64BIT_XS, /* 10755 */ IC_XD, /* 10756 */ IC_64BIT_XD, /* 10757 */ IC_XS, /* 10758 */ IC_64BIT_XS, /* 10759 */ IC, /* 10760 */ IC_64BIT_REXW, /* 10761 */ IC_XS, /* 10762 */ IC_64BIT_REXW_XS, /* 10763 */ IC_XD, /* 10764 */ IC_64BIT_REXW_XD, /* 10765 */ IC_XS, /* 10766 */ IC_64BIT_REXW_XS, /* 10767 */ IC_OPSIZE, /* 10768 */ IC_64BIT_OPSIZE, /* 10769 */ IC_XS_OPSIZE, /* 10770 */ IC_64BIT_XS_OPSIZE, /* 10771 */ IC_XD_OPSIZE, /* 10772 */ IC_64BIT_XD_OPSIZE, /* 10773 */ IC_XS_OPSIZE, /* 10774 */ IC_64BIT_XD_OPSIZE, /* 10775 */ IC_OPSIZE, /* 10776 */ IC_64BIT_REXW_OPSIZE, /* 10777 */ IC_XS_OPSIZE, /* 10778 */ IC_64BIT_REXW_XS, /* 10779 */ IC_XD_OPSIZE, /* 10780 */ IC_64BIT_REXW_XD, /* 10781 */ IC_XS_OPSIZE, /* 10782 */ IC_64BIT_REXW_XS, /* 10783 */ IC_ADSIZE, /* 10784 */ IC_64BIT_ADSIZE, /* 10785 */ IC_XS, /* 10786 */ IC_64BIT_XS, /* 10787 */ IC_XD, /* 10788 */ IC_64BIT_XD, /* 10789 */ IC_XS, /* 10790 */ IC_64BIT_XS, /* 10791 */ IC_ADSIZE, /* 10792 */ IC_64BIT_REXW_ADSIZE, /* 10793 */ IC_XS, /* 10794 */ IC_64BIT_REXW_XS, /* 10795 */ IC_XD, /* 10796 */ IC_64BIT_REXW_XD, /* 10797 */ IC_XS, /* 10798 */ IC_64BIT_REXW_XS, /* 10799 */ IC_OPSIZE_ADSIZE, /* 10800 */ IC_64BIT_OPSIZE_ADSIZE, /* 10801 */ IC_XS_OPSIZE, /* 10802 */ IC_64BIT_XS_OPSIZE, /* 10803 */ IC_XD_OPSIZE, /* 10804 */ IC_64BIT_XD_OPSIZE, /* 10805 */ IC_XS_OPSIZE, /* 10806 */ IC_64BIT_XD_OPSIZE, /* 10807 */ IC_OPSIZE_ADSIZE, /* 10808 */ IC_64BIT_REXW_OPSIZE, /* 10809 */ IC_XS_OPSIZE, /* 10810 */ IC_64BIT_REXW_XS, /* 10811 */ IC_XD_OPSIZE, /* 10812 */ IC_64BIT_REXW_XD, /* 10813 */ IC_XS_OPSIZE, /* 10814 */ IC_64BIT_REXW_XS, /* 10815 */ IC_VEX, /* 10816 */ IC_VEX, /* 10817 */ IC_VEX_XS, /* 10818 */ IC_VEX_XS, /* 10819 */ IC_VEX_XD, /* 10820 */ IC_VEX_XD, /* 10821 */ IC_VEX_XD, /* 10822 */ IC_VEX_XD, /* 10823 */ IC_VEX_W, /* 10824 */ IC_VEX_W, /* 10825 */ IC_VEX_W_XS, /* 10826 */ IC_VEX_W_XS, /* 10827 */ IC_VEX_W_XD, /* 10828 */ IC_VEX_W_XD, /* 10829 */ IC_VEX_W_XD, /* 10830 */ IC_VEX_W_XD, /* 10831 */ IC_VEX_OPSIZE, /* 10832 */ IC_VEX_OPSIZE, /* 10833 */ IC_VEX_OPSIZE, /* 10834 */ IC_VEX_OPSIZE, /* 10835 */ IC_VEX_OPSIZE, /* 10836 */ IC_VEX_OPSIZE, /* 10837 */ IC_VEX_OPSIZE, /* 10838 */ IC_VEX_OPSIZE, /* 10839 */ IC_VEX_W_OPSIZE, /* 10840 */ IC_VEX_W_OPSIZE, /* 10841 */ IC_VEX_W_OPSIZE, /* 10842 */ IC_VEX_W_OPSIZE, /* 10843 */ IC_VEX_W_OPSIZE, /* 10844 */ IC_VEX_W_OPSIZE, /* 10845 */ IC_VEX_W_OPSIZE, /* 10846 */ IC_VEX_W_OPSIZE, /* 10847 */ IC_VEX, /* 10848 */ IC_VEX, /* 10849 */ IC_VEX_XS, /* 10850 */ IC_VEX_XS, /* 10851 */ IC_VEX_XD, /* 10852 */ IC_VEX_XD, /* 10853 */ IC_VEX_XD, /* 10854 */ IC_VEX_XD, /* 10855 */ IC_VEX_W, /* 10856 */ IC_VEX_W, /* 10857 */ IC_VEX_W_XS, /* 10858 */ IC_VEX_W_XS, /* 10859 */ IC_VEX_W_XD, /* 10860 */ IC_VEX_W_XD, /* 10861 */ IC_VEX_W_XD, /* 10862 */ IC_VEX_W_XD, /* 10863 */ IC_VEX_OPSIZE, /* 10864 */ IC_VEX_OPSIZE, /* 10865 */ IC_VEX_OPSIZE, /* 10866 */ IC_VEX_OPSIZE, /* 10867 */ IC_VEX_OPSIZE, /* 10868 */ IC_VEX_OPSIZE, /* 10869 */ IC_VEX_OPSIZE, /* 10870 */ IC_VEX_OPSIZE, /* 10871 */ IC_VEX_W_OPSIZE, /* 10872 */ IC_VEX_W_OPSIZE, /* 10873 */ IC_VEX_W_OPSIZE, /* 10874 */ IC_VEX_W_OPSIZE, /* 10875 */ IC_VEX_W_OPSIZE, /* 10876 */ IC_VEX_W_OPSIZE, /* 10877 */ IC_VEX_W_OPSIZE, /* 10878 */ IC_VEX_W_OPSIZE, /* 10879 */ IC_VEX_L, /* 10880 */ IC_VEX_L, /* 10881 */ IC_VEX_L_XS, /* 10882 */ IC_VEX_L_XS, /* 10883 */ IC_VEX_L_XD, /* 10884 */ IC_VEX_L_XD, /* 10885 */ IC_VEX_L_XD, /* 10886 */ IC_VEX_L_XD, /* 10887 */ IC_VEX_L_W, /* 10888 */ IC_VEX_L_W, /* 10889 */ IC_VEX_L_W_XS, /* 10890 */ IC_VEX_L_W_XS, /* 10891 */ IC_VEX_L_W_XD, /* 10892 */ IC_VEX_L_W_XD, /* 10893 */ IC_VEX_L_W_XD, /* 10894 */ IC_VEX_L_W_XD, /* 10895 */ IC_VEX_L_OPSIZE, /* 10896 */ IC_VEX_L_OPSIZE, /* 10897 */ IC_VEX_L_OPSIZE, /* 10898 */ IC_VEX_L_OPSIZE, /* 10899 */ IC_VEX_L_OPSIZE, /* 10900 */ IC_VEX_L_OPSIZE, /* 10901 */ IC_VEX_L_OPSIZE, /* 10902 */ IC_VEX_L_OPSIZE, /* 10903 */ IC_VEX_L_W_OPSIZE, /* 10904 */ IC_VEX_L_W_OPSIZE, /* 10905 */ IC_VEX_L_W_OPSIZE, /* 10906 */ IC_VEX_L_W_OPSIZE, /* 10907 */ IC_VEX_L_W_OPSIZE, /* 10908 */ IC_VEX_L_W_OPSIZE, /* 10909 */ IC_VEX_L_W_OPSIZE, /* 10910 */ IC_VEX_L_W_OPSIZE, /* 10911 */ IC_VEX_L, /* 10912 */ IC_VEX_L, /* 10913 */ IC_VEX_L_XS, /* 10914 */ IC_VEX_L_XS, /* 10915 */ IC_VEX_L_XD, /* 10916 */ IC_VEX_L_XD, /* 10917 */ IC_VEX_L_XD, /* 10918 */ IC_VEX_L_XD, /* 10919 */ IC_VEX_L_W, /* 10920 */ IC_VEX_L_W, /* 10921 */ IC_VEX_L_W_XS, /* 10922 */ IC_VEX_L_W_XS, /* 10923 */ IC_VEX_L_W_XD, /* 10924 */ IC_VEX_L_W_XD, /* 10925 */ IC_VEX_L_W_XD, /* 10926 */ IC_VEX_L_W_XD, /* 10927 */ IC_VEX_L_OPSIZE, /* 10928 */ IC_VEX_L_OPSIZE, /* 10929 */ IC_VEX_L_OPSIZE, /* 10930 */ IC_VEX_L_OPSIZE, /* 10931 */ IC_VEX_L_OPSIZE, /* 10932 */ IC_VEX_L_OPSIZE, /* 10933 */ IC_VEX_L_OPSIZE, /* 10934 */ IC_VEX_L_OPSIZE, /* 10935 */ IC_VEX_L_W_OPSIZE, /* 10936 */ IC_VEX_L_W_OPSIZE, /* 10937 */ IC_VEX_L_W_OPSIZE, /* 10938 */ IC_VEX_L_W_OPSIZE, /* 10939 */ IC_VEX_L_W_OPSIZE, /* 10940 */ IC_VEX_L_W_OPSIZE, /* 10941 */ IC_VEX_L_W_OPSIZE, /* 10942 */ IC_VEX_L_W_OPSIZE, /* 10943 */ IC_VEX_L, /* 10944 */ IC_VEX_L, /* 10945 */ IC_VEX_L_XS, /* 10946 */ IC_VEX_L_XS, /* 10947 */ IC_VEX_L_XD, /* 10948 */ IC_VEX_L_XD, /* 10949 */ IC_VEX_L_XD, /* 10950 */ IC_VEX_L_XD, /* 10951 */ IC_VEX_L_W, /* 10952 */ IC_VEX_L_W, /* 10953 */ IC_VEX_L_W_XS, /* 10954 */ IC_VEX_L_W_XS, /* 10955 */ IC_VEX_L_W_XD, /* 10956 */ IC_VEX_L_W_XD, /* 10957 */ IC_VEX_L_W_XD, /* 10958 */ IC_VEX_L_W_XD, /* 10959 */ IC_VEX_L_OPSIZE, /* 10960 */ IC_VEX_L_OPSIZE, /* 10961 */ IC_VEX_L_OPSIZE, /* 10962 */ IC_VEX_L_OPSIZE, /* 10963 */ IC_VEX_L_OPSIZE, /* 10964 */ IC_VEX_L_OPSIZE, /* 10965 */ IC_VEX_L_OPSIZE, /* 10966 */ IC_VEX_L_OPSIZE, /* 10967 */ IC_VEX_L_W_OPSIZE, /* 10968 */ IC_VEX_L_W_OPSIZE, /* 10969 */ IC_VEX_L_W_OPSIZE, /* 10970 */ IC_VEX_L_W_OPSIZE, /* 10971 */ IC_VEX_L_W_OPSIZE, /* 10972 */ IC_VEX_L_W_OPSIZE, /* 10973 */ IC_VEX_L_W_OPSIZE, /* 10974 */ IC_VEX_L_W_OPSIZE, /* 10975 */ IC_VEX_L, /* 10976 */ IC_VEX_L, /* 10977 */ IC_VEX_L_XS, /* 10978 */ IC_VEX_L_XS, /* 10979 */ IC_VEX_L_XD, /* 10980 */ IC_VEX_L_XD, /* 10981 */ IC_VEX_L_XD, /* 10982 */ IC_VEX_L_XD, /* 10983 */ IC_VEX_L_W, /* 10984 */ IC_VEX_L_W, /* 10985 */ IC_VEX_L_W_XS, /* 10986 */ IC_VEX_L_W_XS, /* 10987 */ IC_VEX_L_W_XD, /* 10988 */ IC_VEX_L_W_XD, /* 10989 */ IC_VEX_L_W_XD, /* 10990 */ IC_VEX_L_W_XD, /* 10991 */ IC_VEX_L_OPSIZE, /* 10992 */ IC_VEX_L_OPSIZE, /* 10993 */ IC_VEX_L_OPSIZE, /* 10994 */ IC_VEX_L_OPSIZE, /* 10995 */ IC_VEX_L_OPSIZE, /* 10996 */ IC_VEX_L_OPSIZE, /* 10997 */ IC_VEX_L_OPSIZE, /* 10998 */ IC_VEX_L_OPSIZE, /* 10999 */ IC_VEX_L_W_OPSIZE, /* 11000 */ IC_VEX_L_W_OPSIZE, /* 11001 */ IC_VEX_L_W_OPSIZE, /* 11002 */ IC_VEX_L_W_OPSIZE, /* 11003 */ IC_VEX_L_W_OPSIZE, /* 11004 */ IC_VEX_L_W_OPSIZE, /* 11005 */ IC_VEX_L_W_OPSIZE, /* 11006 */ IC_VEX_L_W_OPSIZE, /* 11007 */ IC_EVEX_L_K_B, /* 11008 */ IC_EVEX_L_K_B, /* 11009 */ IC_EVEX_L_XS_K_B, /* 11010 */ IC_EVEX_L_XS_K_B, /* 11011 */ IC_EVEX_L_XD_K_B, /* 11012 */ IC_EVEX_L_XD_K_B, /* 11013 */ IC_EVEX_L_XD_K_B, /* 11014 */ IC_EVEX_L_XD_K_B, /* 11015 */ IC_EVEX_L_W_K_B, /* 11016 */ IC_EVEX_L_W_K_B, /* 11017 */ IC_EVEX_L_W_XS_K_B, /* 11018 */ IC_EVEX_L_W_XS_K_B, /* 11019 */ IC_EVEX_L_W_XD_K_B, /* 11020 */ IC_EVEX_L_W_XD_K_B, /* 11021 */ IC_EVEX_L_W_XD_K_B, /* 11022 */ IC_EVEX_L_W_XD_K_B, /* 11023 */ IC_EVEX_L_OPSIZE_K_B, /* 11024 */ IC_EVEX_L_OPSIZE_K_B, /* 11025 */ IC_EVEX_L_OPSIZE_K_B, /* 11026 */ IC_EVEX_L_OPSIZE_K_B, /* 11027 */ IC_EVEX_L_OPSIZE_K_B, /* 11028 */ IC_EVEX_L_OPSIZE_K_B, /* 11029 */ IC_EVEX_L_OPSIZE_K_B, /* 11030 */ IC_EVEX_L_OPSIZE_K_B, /* 11031 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11032 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11033 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11034 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11035 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11036 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11037 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11038 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11039 */ IC_EVEX_L_K_B, /* 11040 */ IC_EVEX_L_K_B, /* 11041 */ IC_EVEX_L_XS_K_B, /* 11042 */ IC_EVEX_L_XS_K_B, /* 11043 */ IC_EVEX_L_XD_K_B, /* 11044 */ IC_EVEX_L_XD_K_B, /* 11045 */ IC_EVEX_L_XD_K_B, /* 11046 */ IC_EVEX_L_XD_K_B, /* 11047 */ IC_EVEX_L_W_K_B, /* 11048 */ IC_EVEX_L_W_K_B, /* 11049 */ IC_EVEX_L_W_XS_K_B, /* 11050 */ IC_EVEX_L_W_XS_K_B, /* 11051 */ IC_EVEX_L_W_XD_K_B, /* 11052 */ IC_EVEX_L_W_XD_K_B, /* 11053 */ IC_EVEX_L_W_XD_K_B, /* 11054 */ IC_EVEX_L_W_XD_K_B, /* 11055 */ IC_EVEX_L_OPSIZE_K_B, /* 11056 */ IC_EVEX_L_OPSIZE_K_B, /* 11057 */ IC_EVEX_L_OPSIZE_K_B, /* 11058 */ IC_EVEX_L_OPSIZE_K_B, /* 11059 */ IC_EVEX_L_OPSIZE_K_B, /* 11060 */ IC_EVEX_L_OPSIZE_K_B, /* 11061 */ IC_EVEX_L_OPSIZE_K_B, /* 11062 */ IC_EVEX_L_OPSIZE_K_B, /* 11063 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11064 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11065 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11066 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11067 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11068 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11069 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11070 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11071 */ IC_EVEX_L_K_B, /* 11072 */ IC_EVEX_L_K_B, /* 11073 */ IC_EVEX_L_XS_K_B, /* 11074 */ IC_EVEX_L_XS_K_B, /* 11075 */ IC_EVEX_L_XD_K_B, /* 11076 */ IC_EVEX_L_XD_K_B, /* 11077 */ IC_EVEX_L_XD_K_B, /* 11078 */ IC_EVEX_L_XD_K_B, /* 11079 */ IC_EVEX_L_W_K_B, /* 11080 */ IC_EVEX_L_W_K_B, /* 11081 */ IC_EVEX_L_W_XS_K_B, /* 11082 */ IC_EVEX_L_W_XS_K_B, /* 11083 */ IC_EVEX_L_W_XD_K_B, /* 11084 */ IC_EVEX_L_W_XD_K_B, /* 11085 */ IC_EVEX_L_W_XD_K_B, /* 11086 */ IC_EVEX_L_W_XD_K_B, /* 11087 */ IC_EVEX_L_OPSIZE_K_B, /* 11088 */ IC_EVEX_L_OPSIZE_K_B, /* 11089 */ IC_EVEX_L_OPSIZE_K_B, /* 11090 */ IC_EVEX_L_OPSIZE_K_B, /* 11091 */ IC_EVEX_L_OPSIZE_K_B, /* 11092 */ IC_EVEX_L_OPSIZE_K_B, /* 11093 */ IC_EVEX_L_OPSIZE_K_B, /* 11094 */ IC_EVEX_L_OPSIZE_K_B, /* 11095 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11096 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11097 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11098 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11099 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11100 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11101 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11102 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11103 */ IC_EVEX_L_K_B, /* 11104 */ IC_EVEX_L_K_B, /* 11105 */ IC_EVEX_L_XS_K_B, /* 11106 */ IC_EVEX_L_XS_K_B, /* 11107 */ IC_EVEX_L_XD_K_B, /* 11108 */ IC_EVEX_L_XD_K_B, /* 11109 */ IC_EVEX_L_XD_K_B, /* 11110 */ IC_EVEX_L_XD_K_B, /* 11111 */ IC_EVEX_L_W_K_B, /* 11112 */ IC_EVEX_L_W_K_B, /* 11113 */ IC_EVEX_L_W_XS_K_B, /* 11114 */ IC_EVEX_L_W_XS_K_B, /* 11115 */ IC_EVEX_L_W_XD_K_B, /* 11116 */ IC_EVEX_L_W_XD_K_B, /* 11117 */ IC_EVEX_L_W_XD_K_B, /* 11118 */ IC_EVEX_L_W_XD_K_B, /* 11119 */ IC_EVEX_L_OPSIZE_K_B, /* 11120 */ IC_EVEX_L_OPSIZE_K_B, /* 11121 */ IC_EVEX_L_OPSIZE_K_B, /* 11122 */ IC_EVEX_L_OPSIZE_K_B, /* 11123 */ IC_EVEX_L_OPSIZE_K_B, /* 11124 */ IC_EVEX_L_OPSIZE_K_B, /* 11125 */ IC_EVEX_L_OPSIZE_K_B, /* 11126 */ IC_EVEX_L_OPSIZE_K_B, /* 11127 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11128 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11129 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11130 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11131 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11132 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11133 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11134 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11135 */ IC_EVEX_L_K_B, /* 11136 */ IC_EVEX_L_K_B, /* 11137 */ IC_EVEX_L_XS_K_B, /* 11138 */ IC_EVEX_L_XS_K_B, /* 11139 */ IC_EVEX_L_XD_K_B, /* 11140 */ IC_EVEX_L_XD_K_B, /* 11141 */ IC_EVEX_L_XD_K_B, /* 11142 */ IC_EVEX_L_XD_K_B, /* 11143 */ IC_EVEX_L_W_K_B, /* 11144 */ IC_EVEX_L_W_K_B, /* 11145 */ IC_EVEX_L_W_XS_K_B, /* 11146 */ IC_EVEX_L_W_XS_K_B, /* 11147 */ IC_EVEX_L_W_XD_K_B, /* 11148 */ IC_EVEX_L_W_XD_K_B, /* 11149 */ IC_EVEX_L_W_XD_K_B, /* 11150 */ IC_EVEX_L_W_XD_K_B, /* 11151 */ IC_EVEX_L_OPSIZE_K_B, /* 11152 */ IC_EVEX_L_OPSIZE_K_B, /* 11153 */ IC_EVEX_L_OPSIZE_K_B, /* 11154 */ IC_EVEX_L_OPSIZE_K_B, /* 11155 */ IC_EVEX_L_OPSIZE_K_B, /* 11156 */ IC_EVEX_L_OPSIZE_K_B, /* 11157 */ IC_EVEX_L_OPSIZE_K_B, /* 11158 */ IC_EVEX_L_OPSIZE_K_B, /* 11159 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11160 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11161 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11162 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11163 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11164 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11165 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11166 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11167 */ IC_EVEX_L_K_B, /* 11168 */ IC_EVEX_L_K_B, /* 11169 */ IC_EVEX_L_XS_K_B, /* 11170 */ IC_EVEX_L_XS_K_B, /* 11171 */ IC_EVEX_L_XD_K_B, /* 11172 */ IC_EVEX_L_XD_K_B, /* 11173 */ IC_EVEX_L_XD_K_B, /* 11174 */ IC_EVEX_L_XD_K_B, /* 11175 */ IC_EVEX_L_W_K_B, /* 11176 */ IC_EVEX_L_W_K_B, /* 11177 */ IC_EVEX_L_W_XS_K_B, /* 11178 */ IC_EVEX_L_W_XS_K_B, /* 11179 */ IC_EVEX_L_W_XD_K_B, /* 11180 */ IC_EVEX_L_W_XD_K_B, /* 11181 */ IC_EVEX_L_W_XD_K_B, /* 11182 */ IC_EVEX_L_W_XD_K_B, /* 11183 */ IC_EVEX_L_OPSIZE_K_B, /* 11184 */ IC_EVEX_L_OPSIZE_K_B, /* 11185 */ IC_EVEX_L_OPSIZE_K_B, /* 11186 */ IC_EVEX_L_OPSIZE_K_B, /* 11187 */ IC_EVEX_L_OPSIZE_K_B, /* 11188 */ IC_EVEX_L_OPSIZE_K_B, /* 11189 */ IC_EVEX_L_OPSIZE_K_B, /* 11190 */ IC_EVEX_L_OPSIZE_K_B, /* 11191 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11192 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11193 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11194 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11195 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11196 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11197 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11198 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11199 */ IC_EVEX_L_K_B, /* 11200 */ IC_EVEX_L_K_B, /* 11201 */ IC_EVEX_L_XS_K_B, /* 11202 */ IC_EVEX_L_XS_K_B, /* 11203 */ IC_EVEX_L_XD_K_B, /* 11204 */ IC_EVEX_L_XD_K_B, /* 11205 */ IC_EVEX_L_XD_K_B, /* 11206 */ IC_EVEX_L_XD_K_B, /* 11207 */ IC_EVEX_L_W_K_B, /* 11208 */ IC_EVEX_L_W_K_B, /* 11209 */ IC_EVEX_L_W_XS_K_B, /* 11210 */ IC_EVEX_L_W_XS_K_B, /* 11211 */ IC_EVEX_L_W_XD_K_B, /* 11212 */ IC_EVEX_L_W_XD_K_B, /* 11213 */ IC_EVEX_L_W_XD_K_B, /* 11214 */ IC_EVEX_L_W_XD_K_B, /* 11215 */ IC_EVEX_L_OPSIZE_K_B, /* 11216 */ IC_EVEX_L_OPSIZE_K_B, /* 11217 */ IC_EVEX_L_OPSIZE_K_B, /* 11218 */ IC_EVEX_L_OPSIZE_K_B, /* 11219 */ IC_EVEX_L_OPSIZE_K_B, /* 11220 */ IC_EVEX_L_OPSIZE_K_B, /* 11221 */ IC_EVEX_L_OPSIZE_K_B, /* 11222 */ IC_EVEX_L_OPSIZE_K_B, /* 11223 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11224 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11225 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11226 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11227 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11228 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11229 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11230 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11231 */ IC_EVEX_L_K_B, /* 11232 */ IC_EVEX_L_K_B, /* 11233 */ IC_EVEX_L_XS_K_B, /* 11234 */ IC_EVEX_L_XS_K_B, /* 11235 */ IC_EVEX_L_XD_K_B, /* 11236 */ IC_EVEX_L_XD_K_B, /* 11237 */ IC_EVEX_L_XD_K_B, /* 11238 */ IC_EVEX_L_XD_K_B, /* 11239 */ IC_EVEX_L_W_K_B, /* 11240 */ IC_EVEX_L_W_K_B, /* 11241 */ IC_EVEX_L_W_XS_K_B, /* 11242 */ IC_EVEX_L_W_XS_K_B, /* 11243 */ IC_EVEX_L_W_XD_K_B, /* 11244 */ IC_EVEX_L_W_XD_K_B, /* 11245 */ IC_EVEX_L_W_XD_K_B, /* 11246 */ IC_EVEX_L_W_XD_K_B, /* 11247 */ IC_EVEX_L_OPSIZE_K_B, /* 11248 */ IC_EVEX_L_OPSIZE_K_B, /* 11249 */ IC_EVEX_L_OPSIZE_K_B, /* 11250 */ IC_EVEX_L_OPSIZE_K_B, /* 11251 */ IC_EVEX_L_OPSIZE_K_B, /* 11252 */ IC_EVEX_L_OPSIZE_K_B, /* 11253 */ IC_EVEX_L_OPSIZE_K_B, /* 11254 */ IC_EVEX_L_OPSIZE_K_B, /* 11255 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11256 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11257 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11258 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11259 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11260 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11261 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11262 */ IC_EVEX_L_W_OPSIZE_K_B, /* 11263 */ IC, /* 11264 */ IC_64BIT, /* 11265 */ IC_XS, /* 11266 */ IC_64BIT_XS, /* 11267 */ IC_XD, /* 11268 */ IC_64BIT_XD, /* 11269 */ IC_XS, /* 11270 */ IC_64BIT_XS, /* 11271 */ IC, /* 11272 */ IC_64BIT_REXW, /* 11273 */ IC_XS, /* 11274 */ IC_64BIT_REXW_XS, /* 11275 */ IC_XD, /* 11276 */ IC_64BIT_REXW_XD, /* 11277 */ IC_XS, /* 11278 */ IC_64BIT_REXW_XS, /* 11279 */ IC_OPSIZE, /* 11280 */ IC_64BIT_OPSIZE, /* 11281 */ IC_XS_OPSIZE, /* 11282 */ IC_64BIT_XS_OPSIZE, /* 11283 */ IC_XD_OPSIZE, /* 11284 */ IC_64BIT_XD_OPSIZE, /* 11285 */ IC_XS_OPSIZE, /* 11286 */ IC_64BIT_XD_OPSIZE, /* 11287 */ IC_OPSIZE, /* 11288 */ IC_64BIT_REXW_OPSIZE, /* 11289 */ IC_XS_OPSIZE, /* 11290 */ IC_64BIT_REXW_XS, /* 11291 */ IC_XD_OPSIZE, /* 11292 */ IC_64BIT_REXW_XD, /* 11293 */ IC_XS_OPSIZE, /* 11294 */ IC_64BIT_REXW_XS, /* 11295 */ IC_ADSIZE, /* 11296 */ IC_64BIT_ADSIZE, /* 11297 */ IC_XS, /* 11298 */ IC_64BIT_XS, /* 11299 */ IC_XD, /* 11300 */ IC_64BIT_XD, /* 11301 */ IC_XS, /* 11302 */ IC_64BIT_XS, /* 11303 */ IC_ADSIZE, /* 11304 */ IC_64BIT_REXW_ADSIZE, /* 11305 */ IC_XS, /* 11306 */ IC_64BIT_REXW_XS, /* 11307 */ IC_XD, /* 11308 */ IC_64BIT_REXW_XD, /* 11309 */ IC_XS, /* 11310 */ IC_64BIT_REXW_XS, /* 11311 */ IC_OPSIZE_ADSIZE, /* 11312 */ IC_64BIT_OPSIZE_ADSIZE, /* 11313 */ IC_XS_OPSIZE, /* 11314 */ IC_64BIT_XS_OPSIZE, /* 11315 */ IC_XD_OPSIZE, /* 11316 */ IC_64BIT_XD_OPSIZE, /* 11317 */ IC_XS_OPSIZE, /* 11318 */ IC_64BIT_XD_OPSIZE, /* 11319 */ IC_OPSIZE_ADSIZE, /* 11320 */ IC_64BIT_REXW_OPSIZE, /* 11321 */ IC_XS_OPSIZE, /* 11322 */ IC_64BIT_REXW_XS, /* 11323 */ IC_XD_OPSIZE, /* 11324 */ IC_64BIT_REXW_XD, /* 11325 */ IC_XS_OPSIZE, /* 11326 */ IC_64BIT_REXW_XS, /* 11327 */ IC_VEX, /* 11328 */ IC_VEX, /* 11329 */ IC_VEX_XS, /* 11330 */ IC_VEX_XS, /* 11331 */ IC_VEX_XD, /* 11332 */ IC_VEX_XD, /* 11333 */ IC_VEX_XD, /* 11334 */ IC_VEX_XD, /* 11335 */ IC_VEX_W, /* 11336 */ IC_VEX_W, /* 11337 */ IC_VEX_W_XS, /* 11338 */ IC_VEX_W_XS, /* 11339 */ IC_VEX_W_XD, /* 11340 */ IC_VEX_W_XD, /* 11341 */ IC_VEX_W_XD, /* 11342 */ IC_VEX_W_XD, /* 11343 */ IC_VEX_OPSIZE, /* 11344 */ IC_VEX_OPSIZE, /* 11345 */ IC_VEX_OPSIZE, /* 11346 */ IC_VEX_OPSIZE, /* 11347 */ IC_VEX_OPSIZE, /* 11348 */ IC_VEX_OPSIZE, /* 11349 */ IC_VEX_OPSIZE, /* 11350 */ IC_VEX_OPSIZE, /* 11351 */ IC_VEX_W_OPSIZE, /* 11352 */ IC_VEX_W_OPSIZE, /* 11353 */ IC_VEX_W_OPSIZE, /* 11354 */ IC_VEX_W_OPSIZE, /* 11355 */ IC_VEX_W_OPSIZE, /* 11356 */ IC_VEX_W_OPSIZE, /* 11357 */ IC_VEX_W_OPSIZE, /* 11358 */ IC_VEX_W_OPSIZE, /* 11359 */ IC_VEX, /* 11360 */ IC_VEX, /* 11361 */ IC_VEX_XS, /* 11362 */ IC_VEX_XS, /* 11363 */ IC_VEX_XD, /* 11364 */ IC_VEX_XD, /* 11365 */ IC_VEX_XD, /* 11366 */ IC_VEX_XD, /* 11367 */ IC_VEX_W, /* 11368 */ IC_VEX_W, /* 11369 */ IC_VEX_W_XS, /* 11370 */ IC_VEX_W_XS, /* 11371 */ IC_VEX_W_XD, /* 11372 */ IC_VEX_W_XD, /* 11373 */ IC_VEX_W_XD, /* 11374 */ IC_VEX_W_XD, /* 11375 */ IC_VEX_OPSIZE, /* 11376 */ IC_VEX_OPSIZE, /* 11377 */ IC_VEX_OPSIZE, /* 11378 */ IC_VEX_OPSIZE, /* 11379 */ IC_VEX_OPSIZE, /* 11380 */ IC_VEX_OPSIZE, /* 11381 */ IC_VEX_OPSIZE, /* 11382 */ IC_VEX_OPSIZE, /* 11383 */ IC_VEX_W_OPSIZE, /* 11384 */ IC_VEX_W_OPSIZE, /* 11385 */ IC_VEX_W_OPSIZE, /* 11386 */ IC_VEX_W_OPSIZE, /* 11387 */ IC_VEX_W_OPSIZE, /* 11388 */ IC_VEX_W_OPSIZE, /* 11389 */ IC_VEX_W_OPSIZE, /* 11390 */ IC_VEX_W_OPSIZE, /* 11391 */ IC_VEX_L, /* 11392 */ IC_VEX_L, /* 11393 */ IC_VEX_L_XS, /* 11394 */ IC_VEX_L_XS, /* 11395 */ IC_VEX_L_XD, /* 11396 */ IC_VEX_L_XD, /* 11397 */ IC_VEX_L_XD, /* 11398 */ IC_VEX_L_XD, /* 11399 */ IC_VEX_L_W, /* 11400 */ IC_VEX_L_W, /* 11401 */ IC_VEX_L_W_XS, /* 11402 */ IC_VEX_L_W_XS, /* 11403 */ IC_VEX_L_W_XD, /* 11404 */ IC_VEX_L_W_XD, /* 11405 */ IC_VEX_L_W_XD, /* 11406 */ IC_VEX_L_W_XD, /* 11407 */ IC_VEX_L_OPSIZE, /* 11408 */ IC_VEX_L_OPSIZE, /* 11409 */ IC_VEX_L_OPSIZE, /* 11410 */ IC_VEX_L_OPSIZE, /* 11411 */ IC_VEX_L_OPSIZE, /* 11412 */ IC_VEX_L_OPSIZE, /* 11413 */ IC_VEX_L_OPSIZE, /* 11414 */ IC_VEX_L_OPSIZE, /* 11415 */ IC_VEX_L_W_OPSIZE, /* 11416 */ IC_VEX_L_W_OPSIZE, /* 11417 */ IC_VEX_L_W_OPSIZE, /* 11418 */ IC_VEX_L_W_OPSIZE, /* 11419 */ IC_VEX_L_W_OPSIZE, /* 11420 */ IC_VEX_L_W_OPSIZE, /* 11421 */ IC_VEX_L_W_OPSIZE, /* 11422 */ IC_VEX_L_W_OPSIZE, /* 11423 */ IC_VEX_L, /* 11424 */ IC_VEX_L, /* 11425 */ IC_VEX_L_XS, /* 11426 */ IC_VEX_L_XS, /* 11427 */ IC_VEX_L_XD, /* 11428 */ IC_VEX_L_XD, /* 11429 */ IC_VEX_L_XD, /* 11430 */ IC_VEX_L_XD, /* 11431 */ IC_VEX_L_W, /* 11432 */ IC_VEX_L_W, /* 11433 */ IC_VEX_L_W_XS, /* 11434 */ IC_VEX_L_W_XS, /* 11435 */ IC_VEX_L_W_XD, /* 11436 */ IC_VEX_L_W_XD, /* 11437 */ IC_VEX_L_W_XD, /* 11438 */ IC_VEX_L_W_XD, /* 11439 */ IC_VEX_L_OPSIZE, /* 11440 */ IC_VEX_L_OPSIZE, /* 11441 */ IC_VEX_L_OPSIZE, /* 11442 */ IC_VEX_L_OPSIZE, /* 11443 */ IC_VEX_L_OPSIZE, /* 11444 */ IC_VEX_L_OPSIZE, /* 11445 */ IC_VEX_L_OPSIZE, /* 11446 */ IC_VEX_L_OPSIZE, /* 11447 */ IC_VEX_L_W_OPSIZE, /* 11448 */ IC_VEX_L_W_OPSIZE, /* 11449 */ IC_VEX_L_W_OPSIZE, /* 11450 */ IC_VEX_L_W_OPSIZE, /* 11451 */ IC_VEX_L_W_OPSIZE, /* 11452 */ IC_VEX_L_W_OPSIZE, /* 11453 */ IC_VEX_L_W_OPSIZE, /* 11454 */ IC_VEX_L_W_OPSIZE, /* 11455 */ IC_VEX_L, /* 11456 */ IC_VEX_L, /* 11457 */ IC_VEX_L_XS, /* 11458 */ IC_VEX_L_XS, /* 11459 */ IC_VEX_L_XD, /* 11460 */ IC_VEX_L_XD, /* 11461 */ IC_VEX_L_XD, /* 11462 */ IC_VEX_L_XD, /* 11463 */ IC_VEX_L_W, /* 11464 */ IC_VEX_L_W, /* 11465 */ IC_VEX_L_W_XS, /* 11466 */ IC_VEX_L_W_XS, /* 11467 */ IC_VEX_L_W_XD, /* 11468 */ IC_VEX_L_W_XD, /* 11469 */ IC_VEX_L_W_XD, /* 11470 */ IC_VEX_L_W_XD, /* 11471 */ IC_VEX_L_OPSIZE, /* 11472 */ IC_VEX_L_OPSIZE, /* 11473 */ IC_VEX_L_OPSIZE, /* 11474 */ IC_VEX_L_OPSIZE, /* 11475 */ IC_VEX_L_OPSIZE, /* 11476 */ IC_VEX_L_OPSIZE, /* 11477 */ IC_VEX_L_OPSIZE, /* 11478 */ IC_VEX_L_OPSIZE, /* 11479 */ IC_VEX_L_W_OPSIZE, /* 11480 */ IC_VEX_L_W_OPSIZE, /* 11481 */ IC_VEX_L_W_OPSIZE, /* 11482 */ IC_VEX_L_W_OPSIZE, /* 11483 */ IC_VEX_L_W_OPSIZE, /* 11484 */ IC_VEX_L_W_OPSIZE, /* 11485 */ IC_VEX_L_W_OPSIZE, /* 11486 */ IC_VEX_L_W_OPSIZE, /* 11487 */ IC_VEX_L, /* 11488 */ IC_VEX_L, /* 11489 */ IC_VEX_L_XS, /* 11490 */ IC_VEX_L_XS, /* 11491 */ IC_VEX_L_XD, /* 11492 */ IC_VEX_L_XD, /* 11493 */ IC_VEX_L_XD, /* 11494 */ IC_VEX_L_XD, /* 11495 */ IC_VEX_L_W, /* 11496 */ IC_VEX_L_W, /* 11497 */ IC_VEX_L_W_XS, /* 11498 */ IC_VEX_L_W_XS, /* 11499 */ IC_VEX_L_W_XD, /* 11500 */ IC_VEX_L_W_XD, /* 11501 */ IC_VEX_L_W_XD, /* 11502 */ IC_VEX_L_W_XD, /* 11503 */ IC_VEX_L_OPSIZE, /* 11504 */ IC_VEX_L_OPSIZE, /* 11505 */ IC_VEX_L_OPSIZE, /* 11506 */ IC_VEX_L_OPSIZE, /* 11507 */ IC_VEX_L_OPSIZE, /* 11508 */ IC_VEX_L_OPSIZE, /* 11509 */ IC_VEX_L_OPSIZE, /* 11510 */ IC_VEX_L_OPSIZE, /* 11511 */ IC_VEX_L_W_OPSIZE, /* 11512 */ IC_VEX_L_W_OPSIZE, /* 11513 */ IC_VEX_L_W_OPSIZE, /* 11514 */ IC_VEX_L_W_OPSIZE, /* 11515 */ IC_VEX_L_W_OPSIZE, /* 11516 */ IC_VEX_L_W_OPSIZE, /* 11517 */ IC_VEX_L_W_OPSIZE, /* 11518 */ IC_VEX_L_W_OPSIZE, /* 11519 */ IC_EVEX_L2_K_B, /* 11520 */ IC_EVEX_L2_K_B, /* 11521 */ IC_EVEX_L2_XS_K_B, /* 11522 */ IC_EVEX_L2_XS_K_B, /* 11523 */ IC_EVEX_L2_XD_K_B, /* 11524 */ IC_EVEX_L2_XD_K_B, /* 11525 */ IC_EVEX_L2_XD_K_B, /* 11526 */ IC_EVEX_L2_XD_K_B, /* 11527 */ IC_EVEX_L2_W_K_B, /* 11528 */ IC_EVEX_L2_W_K_B, /* 11529 */ IC_EVEX_L2_W_XS_K_B, /* 11530 */ IC_EVEX_L2_W_XS_K_B, /* 11531 */ IC_EVEX_L2_W_XD_K_B, /* 11532 */ IC_EVEX_L2_W_XD_K_B, /* 11533 */ IC_EVEX_L2_W_XD_K_B, /* 11534 */ IC_EVEX_L2_W_XD_K_B, /* 11535 */ IC_EVEX_L2_OPSIZE_K_B, /* 11536 */ IC_EVEX_L2_OPSIZE_K_B, /* 11537 */ IC_EVEX_L2_OPSIZE_K_B, /* 11538 */ IC_EVEX_L2_OPSIZE_K_B, /* 11539 */ IC_EVEX_L2_OPSIZE_K_B, /* 11540 */ IC_EVEX_L2_OPSIZE_K_B, /* 11541 */ IC_EVEX_L2_OPSIZE_K_B, /* 11542 */ IC_EVEX_L2_OPSIZE_K_B, /* 11543 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11544 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11545 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11546 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11547 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11548 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11549 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11550 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11551 */ IC_EVEX_L2_K_B, /* 11552 */ IC_EVEX_L2_K_B, /* 11553 */ IC_EVEX_L2_XS_K_B, /* 11554 */ IC_EVEX_L2_XS_K_B, /* 11555 */ IC_EVEX_L2_XD_K_B, /* 11556 */ IC_EVEX_L2_XD_K_B, /* 11557 */ IC_EVEX_L2_XD_K_B, /* 11558 */ IC_EVEX_L2_XD_K_B, /* 11559 */ IC_EVEX_L2_W_K_B, /* 11560 */ IC_EVEX_L2_W_K_B, /* 11561 */ IC_EVEX_L2_W_XS_K_B, /* 11562 */ IC_EVEX_L2_W_XS_K_B, /* 11563 */ IC_EVEX_L2_W_XD_K_B, /* 11564 */ IC_EVEX_L2_W_XD_K_B, /* 11565 */ IC_EVEX_L2_W_XD_K_B, /* 11566 */ IC_EVEX_L2_W_XD_K_B, /* 11567 */ IC_EVEX_L2_OPSIZE_K_B, /* 11568 */ IC_EVEX_L2_OPSIZE_K_B, /* 11569 */ IC_EVEX_L2_OPSIZE_K_B, /* 11570 */ IC_EVEX_L2_OPSIZE_K_B, /* 11571 */ IC_EVEX_L2_OPSIZE_K_B, /* 11572 */ IC_EVEX_L2_OPSIZE_K_B, /* 11573 */ IC_EVEX_L2_OPSIZE_K_B, /* 11574 */ IC_EVEX_L2_OPSIZE_K_B, /* 11575 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11576 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11577 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11578 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11579 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11580 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11581 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11582 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11583 */ IC_EVEX_L2_K_B, /* 11584 */ IC_EVEX_L2_K_B, /* 11585 */ IC_EVEX_L2_XS_K_B, /* 11586 */ IC_EVEX_L2_XS_K_B, /* 11587 */ IC_EVEX_L2_XD_K_B, /* 11588 */ IC_EVEX_L2_XD_K_B, /* 11589 */ IC_EVEX_L2_XD_K_B, /* 11590 */ IC_EVEX_L2_XD_K_B, /* 11591 */ IC_EVEX_L2_W_K_B, /* 11592 */ IC_EVEX_L2_W_K_B, /* 11593 */ IC_EVEX_L2_W_XS_K_B, /* 11594 */ IC_EVEX_L2_W_XS_K_B, /* 11595 */ IC_EVEX_L2_W_XD_K_B, /* 11596 */ IC_EVEX_L2_W_XD_K_B, /* 11597 */ IC_EVEX_L2_W_XD_K_B, /* 11598 */ IC_EVEX_L2_W_XD_K_B, /* 11599 */ IC_EVEX_L2_OPSIZE_K_B, /* 11600 */ IC_EVEX_L2_OPSIZE_K_B, /* 11601 */ IC_EVEX_L2_OPSIZE_K_B, /* 11602 */ IC_EVEX_L2_OPSIZE_K_B, /* 11603 */ IC_EVEX_L2_OPSIZE_K_B, /* 11604 */ IC_EVEX_L2_OPSIZE_K_B, /* 11605 */ IC_EVEX_L2_OPSIZE_K_B, /* 11606 */ IC_EVEX_L2_OPSIZE_K_B, /* 11607 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11608 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11609 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11610 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11611 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11612 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11613 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11614 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11615 */ IC_EVEX_L2_K_B, /* 11616 */ IC_EVEX_L2_K_B, /* 11617 */ IC_EVEX_L2_XS_K_B, /* 11618 */ IC_EVEX_L2_XS_K_B, /* 11619 */ IC_EVEX_L2_XD_K_B, /* 11620 */ IC_EVEX_L2_XD_K_B, /* 11621 */ IC_EVEX_L2_XD_K_B, /* 11622 */ IC_EVEX_L2_XD_K_B, /* 11623 */ IC_EVEX_L2_W_K_B, /* 11624 */ IC_EVEX_L2_W_K_B, /* 11625 */ IC_EVEX_L2_W_XS_K_B, /* 11626 */ IC_EVEX_L2_W_XS_K_B, /* 11627 */ IC_EVEX_L2_W_XD_K_B, /* 11628 */ IC_EVEX_L2_W_XD_K_B, /* 11629 */ IC_EVEX_L2_W_XD_K_B, /* 11630 */ IC_EVEX_L2_W_XD_K_B, /* 11631 */ IC_EVEX_L2_OPSIZE_K_B, /* 11632 */ IC_EVEX_L2_OPSIZE_K_B, /* 11633 */ IC_EVEX_L2_OPSIZE_K_B, /* 11634 */ IC_EVEX_L2_OPSIZE_K_B, /* 11635 */ IC_EVEX_L2_OPSIZE_K_B, /* 11636 */ IC_EVEX_L2_OPSIZE_K_B, /* 11637 */ IC_EVEX_L2_OPSIZE_K_B, /* 11638 */ IC_EVEX_L2_OPSIZE_K_B, /* 11639 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11640 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11641 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11642 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11643 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11644 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11645 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11646 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11647 */ IC_EVEX_L2_K_B, /* 11648 */ IC_EVEX_L2_K_B, /* 11649 */ IC_EVEX_L2_XS_K_B, /* 11650 */ IC_EVEX_L2_XS_K_B, /* 11651 */ IC_EVEX_L2_XD_K_B, /* 11652 */ IC_EVEX_L2_XD_K_B, /* 11653 */ IC_EVEX_L2_XD_K_B, /* 11654 */ IC_EVEX_L2_XD_K_B, /* 11655 */ IC_EVEX_L2_W_K_B, /* 11656 */ IC_EVEX_L2_W_K_B, /* 11657 */ IC_EVEX_L2_W_XS_K_B, /* 11658 */ IC_EVEX_L2_W_XS_K_B, /* 11659 */ IC_EVEX_L2_W_XD_K_B, /* 11660 */ IC_EVEX_L2_W_XD_K_B, /* 11661 */ IC_EVEX_L2_W_XD_K_B, /* 11662 */ IC_EVEX_L2_W_XD_K_B, /* 11663 */ IC_EVEX_L2_OPSIZE_K_B, /* 11664 */ IC_EVEX_L2_OPSIZE_K_B, /* 11665 */ IC_EVEX_L2_OPSIZE_K_B, /* 11666 */ IC_EVEX_L2_OPSIZE_K_B, /* 11667 */ IC_EVEX_L2_OPSIZE_K_B, /* 11668 */ IC_EVEX_L2_OPSIZE_K_B, /* 11669 */ IC_EVEX_L2_OPSIZE_K_B, /* 11670 */ IC_EVEX_L2_OPSIZE_K_B, /* 11671 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11672 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11673 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11674 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11675 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11676 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11677 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11678 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11679 */ IC_EVEX_L2_K_B, /* 11680 */ IC_EVEX_L2_K_B, /* 11681 */ IC_EVEX_L2_XS_K_B, /* 11682 */ IC_EVEX_L2_XS_K_B, /* 11683 */ IC_EVEX_L2_XD_K_B, /* 11684 */ IC_EVEX_L2_XD_K_B, /* 11685 */ IC_EVEX_L2_XD_K_B, /* 11686 */ IC_EVEX_L2_XD_K_B, /* 11687 */ IC_EVEX_L2_W_K_B, /* 11688 */ IC_EVEX_L2_W_K_B, /* 11689 */ IC_EVEX_L2_W_XS_K_B, /* 11690 */ IC_EVEX_L2_W_XS_K_B, /* 11691 */ IC_EVEX_L2_W_XD_K_B, /* 11692 */ IC_EVEX_L2_W_XD_K_B, /* 11693 */ IC_EVEX_L2_W_XD_K_B, /* 11694 */ IC_EVEX_L2_W_XD_K_B, /* 11695 */ IC_EVEX_L2_OPSIZE_K_B, /* 11696 */ IC_EVEX_L2_OPSIZE_K_B, /* 11697 */ IC_EVEX_L2_OPSIZE_K_B, /* 11698 */ IC_EVEX_L2_OPSIZE_K_B, /* 11699 */ IC_EVEX_L2_OPSIZE_K_B, /* 11700 */ IC_EVEX_L2_OPSIZE_K_B, /* 11701 */ IC_EVEX_L2_OPSIZE_K_B, /* 11702 */ IC_EVEX_L2_OPSIZE_K_B, /* 11703 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11704 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11705 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11706 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11707 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11708 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11709 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11710 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11711 */ IC_EVEX_L2_K_B, /* 11712 */ IC_EVEX_L2_K_B, /* 11713 */ IC_EVEX_L2_XS_K_B, /* 11714 */ IC_EVEX_L2_XS_K_B, /* 11715 */ IC_EVEX_L2_XD_K_B, /* 11716 */ IC_EVEX_L2_XD_K_B, /* 11717 */ IC_EVEX_L2_XD_K_B, /* 11718 */ IC_EVEX_L2_XD_K_B, /* 11719 */ IC_EVEX_L2_W_K_B, /* 11720 */ IC_EVEX_L2_W_K_B, /* 11721 */ IC_EVEX_L2_W_XS_K_B, /* 11722 */ IC_EVEX_L2_W_XS_K_B, /* 11723 */ IC_EVEX_L2_W_XD_K_B, /* 11724 */ IC_EVEX_L2_W_XD_K_B, /* 11725 */ IC_EVEX_L2_W_XD_K_B, /* 11726 */ IC_EVEX_L2_W_XD_K_B, /* 11727 */ IC_EVEX_L2_OPSIZE_K_B, /* 11728 */ IC_EVEX_L2_OPSIZE_K_B, /* 11729 */ IC_EVEX_L2_OPSIZE_K_B, /* 11730 */ IC_EVEX_L2_OPSIZE_K_B, /* 11731 */ IC_EVEX_L2_OPSIZE_K_B, /* 11732 */ IC_EVEX_L2_OPSIZE_K_B, /* 11733 */ IC_EVEX_L2_OPSIZE_K_B, /* 11734 */ IC_EVEX_L2_OPSIZE_K_B, /* 11735 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11736 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11737 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11738 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11739 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11740 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11741 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11742 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11743 */ IC_EVEX_L2_K_B, /* 11744 */ IC_EVEX_L2_K_B, /* 11745 */ IC_EVEX_L2_XS_K_B, /* 11746 */ IC_EVEX_L2_XS_K_B, /* 11747 */ IC_EVEX_L2_XD_K_B, /* 11748 */ IC_EVEX_L2_XD_K_B, /* 11749 */ IC_EVEX_L2_XD_K_B, /* 11750 */ IC_EVEX_L2_XD_K_B, /* 11751 */ IC_EVEX_L2_W_K_B, /* 11752 */ IC_EVEX_L2_W_K_B, /* 11753 */ IC_EVEX_L2_W_XS_K_B, /* 11754 */ IC_EVEX_L2_W_XS_K_B, /* 11755 */ IC_EVEX_L2_W_XD_K_B, /* 11756 */ IC_EVEX_L2_W_XD_K_B, /* 11757 */ IC_EVEX_L2_W_XD_K_B, /* 11758 */ IC_EVEX_L2_W_XD_K_B, /* 11759 */ IC_EVEX_L2_OPSIZE_K_B, /* 11760 */ IC_EVEX_L2_OPSIZE_K_B, /* 11761 */ IC_EVEX_L2_OPSIZE_K_B, /* 11762 */ IC_EVEX_L2_OPSIZE_K_B, /* 11763 */ IC_EVEX_L2_OPSIZE_K_B, /* 11764 */ IC_EVEX_L2_OPSIZE_K_B, /* 11765 */ IC_EVEX_L2_OPSIZE_K_B, /* 11766 */ IC_EVEX_L2_OPSIZE_K_B, /* 11767 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11768 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11769 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11770 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11771 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11772 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11773 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11774 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 11775 */ IC, /* 11776 */ IC_64BIT, /* 11777 */ IC_XS, /* 11778 */ IC_64BIT_XS, /* 11779 */ IC_XD, /* 11780 */ IC_64BIT_XD, /* 11781 */ IC_XS, /* 11782 */ IC_64BIT_XS, /* 11783 */ IC, /* 11784 */ IC_64BIT_REXW, /* 11785 */ IC_XS, /* 11786 */ IC_64BIT_REXW_XS, /* 11787 */ IC_XD, /* 11788 */ IC_64BIT_REXW_XD, /* 11789 */ IC_XS, /* 11790 */ IC_64BIT_REXW_XS, /* 11791 */ IC_OPSIZE, /* 11792 */ IC_64BIT_OPSIZE, /* 11793 */ IC_XS_OPSIZE, /* 11794 */ IC_64BIT_XS_OPSIZE, /* 11795 */ IC_XD_OPSIZE, /* 11796 */ IC_64BIT_XD_OPSIZE, /* 11797 */ IC_XS_OPSIZE, /* 11798 */ IC_64BIT_XD_OPSIZE, /* 11799 */ IC_OPSIZE, /* 11800 */ IC_64BIT_REXW_OPSIZE, /* 11801 */ IC_XS_OPSIZE, /* 11802 */ IC_64BIT_REXW_XS, /* 11803 */ IC_XD_OPSIZE, /* 11804 */ IC_64BIT_REXW_XD, /* 11805 */ IC_XS_OPSIZE, /* 11806 */ IC_64BIT_REXW_XS, /* 11807 */ IC_ADSIZE, /* 11808 */ IC_64BIT_ADSIZE, /* 11809 */ IC_XS, /* 11810 */ IC_64BIT_XS, /* 11811 */ IC_XD, /* 11812 */ IC_64BIT_XD, /* 11813 */ IC_XS, /* 11814 */ IC_64BIT_XS, /* 11815 */ IC_ADSIZE, /* 11816 */ IC_64BIT_REXW_ADSIZE, /* 11817 */ IC_XS, /* 11818 */ IC_64BIT_REXW_XS, /* 11819 */ IC_XD, /* 11820 */ IC_64BIT_REXW_XD, /* 11821 */ IC_XS, /* 11822 */ IC_64BIT_REXW_XS, /* 11823 */ IC_OPSIZE_ADSIZE, /* 11824 */ IC_64BIT_OPSIZE_ADSIZE, /* 11825 */ IC_XS_OPSIZE, /* 11826 */ IC_64BIT_XS_OPSIZE, /* 11827 */ IC_XD_OPSIZE, /* 11828 */ IC_64BIT_XD_OPSIZE, /* 11829 */ IC_XS_OPSIZE, /* 11830 */ IC_64BIT_XD_OPSIZE, /* 11831 */ IC_OPSIZE_ADSIZE, /* 11832 */ IC_64BIT_REXW_OPSIZE, /* 11833 */ IC_XS_OPSIZE, /* 11834 */ IC_64BIT_REXW_XS, /* 11835 */ IC_XD_OPSIZE, /* 11836 */ IC_64BIT_REXW_XD, /* 11837 */ IC_XS_OPSIZE, /* 11838 */ IC_64BIT_REXW_XS, /* 11839 */ IC_VEX, /* 11840 */ IC_VEX, /* 11841 */ IC_VEX_XS, /* 11842 */ IC_VEX_XS, /* 11843 */ IC_VEX_XD, /* 11844 */ IC_VEX_XD, /* 11845 */ IC_VEX_XD, /* 11846 */ IC_VEX_XD, /* 11847 */ IC_VEX_W, /* 11848 */ IC_VEX_W, /* 11849 */ IC_VEX_W_XS, /* 11850 */ IC_VEX_W_XS, /* 11851 */ IC_VEX_W_XD, /* 11852 */ IC_VEX_W_XD, /* 11853 */ IC_VEX_W_XD, /* 11854 */ IC_VEX_W_XD, /* 11855 */ IC_VEX_OPSIZE, /* 11856 */ IC_VEX_OPSIZE, /* 11857 */ IC_VEX_OPSIZE, /* 11858 */ IC_VEX_OPSIZE, /* 11859 */ IC_VEX_OPSIZE, /* 11860 */ IC_VEX_OPSIZE, /* 11861 */ IC_VEX_OPSIZE, /* 11862 */ IC_VEX_OPSIZE, /* 11863 */ IC_VEX_W_OPSIZE, /* 11864 */ IC_VEX_W_OPSIZE, /* 11865 */ IC_VEX_W_OPSIZE, /* 11866 */ IC_VEX_W_OPSIZE, /* 11867 */ IC_VEX_W_OPSIZE, /* 11868 */ IC_VEX_W_OPSIZE, /* 11869 */ IC_VEX_W_OPSIZE, /* 11870 */ IC_VEX_W_OPSIZE, /* 11871 */ IC_VEX, /* 11872 */ IC_VEX, /* 11873 */ IC_VEX_XS, /* 11874 */ IC_VEX_XS, /* 11875 */ IC_VEX_XD, /* 11876 */ IC_VEX_XD, /* 11877 */ IC_VEX_XD, /* 11878 */ IC_VEX_XD, /* 11879 */ IC_VEX_W, /* 11880 */ IC_VEX_W, /* 11881 */ IC_VEX_W_XS, /* 11882 */ IC_VEX_W_XS, /* 11883 */ IC_VEX_W_XD, /* 11884 */ IC_VEX_W_XD, /* 11885 */ IC_VEX_W_XD, /* 11886 */ IC_VEX_W_XD, /* 11887 */ IC_VEX_OPSIZE, /* 11888 */ IC_VEX_OPSIZE, /* 11889 */ IC_VEX_OPSIZE, /* 11890 */ IC_VEX_OPSIZE, /* 11891 */ IC_VEX_OPSIZE, /* 11892 */ IC_VEX_OPSIZE, /* 11893 */ IC_VEX_OPSIZE, /* 11894 */ IC_VEX_OPSIZE, /* 11895 */ IC_VEX_W_OPSIZE, /* 11896 */ IC_VEX_W_OPSIZE, /* 11897 */ IC_VEX_W_OPSIZE, /* 11898 */ IC_VEX_W_OPSIZE, /* 11899 */ IC_VEX_W_OPSIZE, /* 11900 */ IC_VEX_W_OPSIZE, /* 11901 */ IC_VEX_W_OPSIZE, /* 11902 */ IC_VEX_W_OPSIZE, /* 11903 */ IC_VEX_L, /* 11904 */ IC_VEX_L, /* 11905 */ IC_VEX_L_XS, /* 11906 */ IC_VEX_L_XS, /* 11907 */ IC_VEX_L_XD, /* 11908 */ IC_VEX_L_XD, /* 11909 */ IC_VEX_L_XD, /* 11910 */ IC_VEX_L_XD, /* 11911 */ IC_VEX_L_W, /* 11912 */ IC_VEX_L_W, /* 11913 */ IC_VEX_L_W_XS, /* 11914 */ IC_VEX_L_W_XS, /* 11915 */ IC_VEX_L_W_XD, /* 11916 */ IC_VEX_L_W_XD, /* 11917 */ IC_VEX_L_W_XD, /* 11918 */ IC_VEX_L_W_XD, /* 11919 */ IC_VEX_L_OPSIZE, /* 11920 */ IC_VEX_L_OPSIZE, /* 11921 */ IC_VEX_L_OPSIZE, /* 11922 */ IC_VEX_L_OPSIZE, /* 11923 */ IC_VEX_L_OPSIZE, /* 11924 */ IC_VEX_L_OPSIZE, /* 11925 */ IC_VEX_L_OPSIZE, /* 11926 */ IC_VEX_L_OPSIZE, /* 11927 */ IC_VEX_L_W_OPSIZE, /* 11928 */ IC_VEX_L_W_OPSIZE, /* 11929 */ IC_VEX_L_W_OPSIZE, /* 11930 */ IC_VEX_L_W_OPSIZE, /* 11931 */ IC_VEX_L_W_OPSIZE, /* 11932 */ IC_VEX_L_W_OPSIZE, /* 11933 */ IC_VEX_L_W_OPSIZE, /* 11934 */ IC_VEX_L_W_OPSIZE, /* 11935 */ IC_VEX_L, /* 11936 */ IC_VEX_L, /* 11937 */ IC_VEX_L_XS, /* 11938 */ IC_VEX_L_XS, /* 11939 */ IC_VEX_L_XD, /* 11940 */ IC_VEX_L_XD, /* 11941 */ IC_VEX_L_XD, /* 11942 */ IC_VEX_L_XD, /* 11943 */ IC_VEX_L_W, /* 11944 */ IC_VEX_L_W, /* 11945 */ IC_VEX_L_W_XS, /* 11946 */ IC_VEX_L_W_XS, /* 11947 */ IC_VEX_L_W_XD, /* 11948 */ IC_VEX_L_W_XD, /* 11949 */ IC_VEX_L_W_XD, /* 11950 */ IC_VEX_L_W_XD, /* 11951 */ IC_VEX_L_OPSIZE, /* 11952 */ IC_VEX_L_OPSIZE, /* 11953 */ IC_VEX_L_OPSIZE, /* 11954 */ IC_VEX_L_OPSIZE, /* 11955 */ IC_VEX_L_OPSIZE, /* 11956 */ IC_VEX_L_OPSIZE, /* 11957 */ IC_VEX_L_OPSIZE, /* 11958 */ IC_VEX_L_OPSIZE, /* 11959 */ IC_VEX_L_W_OPSIZE, /* 11960 */ IC_VEX_L_W_OPSIZE, /* 11961 */ IC_VEX_L_W_OPSIZE, /* 11962 */ IC_VEX_L_W_OPSIZE, /* 11963 */ IC_VEX_L_W_OPSIZE, /* 11964 */ IC_VEX_L_W_OPSIZE, /* 11965 */ IC_VEX_L_W_OPSIZE, /* 11966 */ IC_VEX_L_W_OPSIZE, /* 11967 */ IC_VEX_L, /* 11968 */ IC_VEX_L, /* 11969 */ IC_VEX_L_XS, /* 11970 */ IC_VEX_L_XS, /* 11971 */ IC_VEX_L_XD, /* 11972 */ IC_VEX_L_XD, /* 11973 */ IC_VEX_L_XD, /* 11974 */ IC_VEX_L_XD, /* 11975 */ IC_VEX_L_W, /* 11976 */ IC_VEX_L_W, /* 11977 */ IC_VEX_L_W_XS, /* 11978 */ IC_VEX_L_W_XS, /* 11979 */ IC_VEX_L_W_XD, /* 11980 */ IC_VEX_L_W_XD, /* 11981 */ IC_VEX_L_W_XD, /* 11982 */ IC_VEX_L_W_XD, /* 11983 */ IC_VEX_L_OPSIZE, /* 11984 */ IC_VEX_L_OPSIZE, /* 11985 */ IC_VEX_L_OPSIZE, /* 11986 */ IC_VEX_L_OPSIZE, /* 11987 */ IC_VEX_L_OPSIZE, /* 11988 */ IC_VEX_L_OPSIZE, /* 11989 */ IC_VEX_L_OPSIZE, /* 11990 */ IC_VEX_L_OPSIZE, /* 11991 */ IC_VEX_L_W_OPSIZE, /* 11992 */ IC_VEX_L_W_OPSIZE, /* 11993 */ IC_VEX_L_W_OPSIZE, /* 11994 */ IC_VEX_L_W_OPSIZE, /* 11995 */ IC_VEX_L_W_OPSIZE, /* 11996 */ IC_VEX_L_W_OPSIZE, /* 11997 */ IC_VEX_L_W_OPSIZE, /* 11998 */ IC_VEX_L_W_OPSIZE, /* 11999 */ IC_VEX_L, /* 12000 */ IC_VEX_L, /* 12001 */ IC_VEX_L_XS, /* 12002 */ IC_VEX_L_XS, /* 12003 */ IC_VEX_L_XD, /* 12004 */ IC_VEX_L_XD, /* 12005 */ IC_VEX_L_XD, /* 12006 */ IC_VEX_L_XD, /* 12007 */ IC_VEX_L_W, /* 12008 */ IC_VEX_L_W, /* 12009 */ IC_VEX_L_W_XS, /* 12010 */ IC_VEX_L_W_XS, /* 12011 */ IC_VEX_L_W_XD, /* 12012 */ IC_VEX_L_W_XD, /* 12013 */ IC_VEX_L_W_XD, /* 12014 */ IC_VEX_L_W_XD, /* 12015 */ IC_VEX_L_OPSIZE, /* 12016 */ IC_VEX_L_OPSIZE, /* 12017 */ IC_VEX_L_OPSIZE, /* 12018 */ IC_VEX_L_OPSIZE, /* 12019 */ IC_VEX_L_OPSIZE, /* 12020 */ IC_VEX_L_OPSIZE, /* 12021 */ IC_VEX_L_OPSIZE, /* 12022 */ IC_VEX_L_OPSIZE, /* 12023 */ IC_VEX_L_W_OPSIZE, /* 12024 */ IC_VEX_L_W_OPSIZE, /* 12025 */ IC_VEX_L_W_OPSIZE, /* 12026 */ IC_VEX_L_W_OPSIZE, /* 12027 */ IC_VEX_L_W_OPSIZE, /* 12028 */ IC_VEX_L_W_OPSIZE, /* 12029 */ IC_VEX_L_W_OPSIZE, /* 12030 */ IC_VEX_L_W_OPSIZE, /* 12031 */ IC_EVEX_L2_K_B, /* 12032 */ IC_EVEX_L2_K_B, /* 12033 */ IC_EVEX_L2_XS_K_B, /* 12034 */ IC_EVEX_L2_XS_K_B, /* 12035 */ IC_EVEX_L2_XD_K_B, /* 12036 */ IC_EVEX_L2_XD_K_B, /* 12037 */ IC_EVEX_L2_XD_K_B, /* 12038 */ IC_EVEX_L2_XD_K_B, /* 12039 */ IC_EVEX_L2_W_K_B, /* 12040 */ IC_EVEX_L2_W_K_B, /* 12041 */ IC_EVEX_L2_W_XS_K_B, /* 12042 */ IC_EVEX_L2_W_XS_K_B, /* 12043 */ IC_EVEX_L2_W_XD_K_B, /* 12044 */ IC_EVEX_L2_W_XD_K_B, /* 12045 */ IC_EVEX_L2_W_XD_K_B, /* 12046 */ IC_EVEX_L2_W_XD_K_B, /* 12047 */ IC_EVEX_L2_OPSIZE_K_B, /* 12048 */ IC_EVEX_L2_OPSIZE_K_B, /* 12049 */ IC_EVEX_L2_OPSIZE_K_B, /* 12050 */ IC_EVEX_L2_OPSIZE_K_B, /* 12051 */ IC_EVEX_L2_OPSIZE_K_B, /* 12052 */ IC_EVEX_L2_OPSIZE_K_B, /* 12053 */ IC_EVEX_L2_OPSIZE_K_B, /* 12054 */ IC_EVEX_L2_OPSIZE_K_B, /* 12055 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12056 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12057 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12058 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12059 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12060 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12061 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12062 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12063 */ IC_EVEX_L2_K_B, /* 12064 */ IC_EVEX_L2_K_B, /* 12065 */ IC_EVEX_L2_XS_K_B, /* 12066 */ IC_EVEX_L2_XS_K_B, /* 12067 */ IC_EVEX_L2_XD_K_B, /* 12068 */ IC_EVEX_L2_XD_K_B, /* 12069 */ IC_EVEX_L2_XD_K_B, /* 12070 */ IC_EVEX_L2_XD_K_B, /* 12071 */ IC_EVEX_L2_W_K_B, /* 12072 */ IC_EVEX_L2_W_K_B, /* 12073 */ IC_EVEX_L2_W_XS_K_B, /* 12074 */ IC_EVEX_L2_W_XS_K_B, /* 12075 */ IC_EVEX_L2_W_XD_K_B, /* 12076 */ IC_EVEX_L2_W_XD_K_B, /* 12077 */ IC_EVEX_L2_W_XD_K_B, /* 12078 */ IC_EVEX_L2_W_XD_K_B, /* 12079 */ IC_EVEX_L2_OPSIZE_K_B, /* 12080 */ IC_EVEX_L2_OPSIZE_K_B, /* 12081 */ IC_EVEX_L2_OPSIZE_K_B, /* 12082 */ IC_EVEX_L2_OPSIZE_K_B, /* 12083 */ IC_EVEX_L2_OPSIZE_K_B, /* 12084 */ IC_EVEX_L2_OPSIZE_K_B, /* 12085 */ IC_EVEX_L2_OPSIZE_K_B, /* 12086 */ IC_EVEX_L2_OPSIZE_K_B, /* 12087 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12088 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12089 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12090 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12091 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12092 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12093 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12094 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12095 */ IC_EVEX_L2_K_B, /* 12096 */ IC_EVEX_L2_K_B, /* 12097 */ IC_EVEX_L2_XS_K_B, /* 12098 */ IC_EVEX_L2_XS_K_B, /* 12099 */ IC_EVEX_L2_XD_K_B, /* 12100 */ IC_EVEX_L2_XD_K_B, /* 12101 */ IC_EVEX_L2_XD_K_B, /* 12102 */ IC_EVEX_L2_XD_K_B, /* 12103 */ IC_EVEX_L2_W_K_B, /* 12104 */ IC_EVEX_L2_W_K_B, /* 12105 */ IC_EVEX_L2_W_XS_K_B, /* 12106 */ IC_EVEX_L2_W_XS_K_B, /* 12107 */ IC_EVEX_L2_W_XD_K_B, /* 12108 */ IC_EVEX_L2_W_XD_K_B, /* 12109 */ IC_EVEX_L2_W_XD_K_B, /* 12110 */ IC_EVEX_L2_W_XD_K_B, /* 12111 */ IC_EVEX_L2_OPSIZE_K_B, /* 12112 */ IC_EVEX_L2_OPSIZE_K_B, /* 12113 */ IC_EVEX_L2_OPSIZE_K_B, /* 12114 */ IC_EVEX_L2_OPSIZE_K_B, /* 12115 */ IC_EVEX_L2_OPSIZE_K_B, /* 12116 */ IC_EVEX_L2_OPSIZE_K_B, /* 12117 */ IC_EVEX_L2_OPSIZE_K_B, /* 12118 */ IC_EVEX_L2_OPSIZE_K_B, /* 12119 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12120 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12121 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12122 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12123 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12124 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12125 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12126 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12127 */ IC_EVEX_L2_K_B, /* 12128 */ IC_EVEX_L2_K_B, /* 12129 */ IC_EVEX_L2_XS_K_B, /* 12130 */ IC_EVEX_L2_XS_K_B, /* 12131 */ IC_EVEX_L2_XD_K_B, /* 12132 */ IC_EVEX_L2_XD_K_B, /* 12133 */ IC_EVEX_L2_XD_K_B, /* 12134 */ IC_EVEX_L2_XD_K_B, /* 12135 */ IC_EVEX_L2_W_K_B, /* 12136 */ IC_EVEX_L2_W_K_B, /* 12137 */ IC_EVEX_L2_W_XS_K_B, /* 12138 */ IC_EVEX_L2_W_XS_K_B, /* 12139 */ IC_EVEX_L2_W_XD_K_B, /* 12140 */ IC_EVEX_L2_W_XD_K_B, /* 12141 */ IC_EVEX_L2_W_XD_K_B, /* 12142 */ IC_EVEX_L2_W_XD_K_B, /* 12143 */ IC_EVEX_L2_OPSIZE_K_B, /* 12144 */ IC_EVEX_L2_OPSIZE_K_B, /* 12145 */ IC_EVEX_L2_OPSIZE_K_B, /* 12146 */ IC_EVEX_L2_OPSIZE_K_B, /* 12147 */ IC_EVEX_L2_OPSIZE_K_B, /* 12148 */ IC_EVEX_L2_OPSIZE_K_B, /* 12149 */ IC_EVEX_L2_OPSIZE_K_B, /* 12150 */ IC_EVEX_L2_OPSIZE_K_B, /* 12151 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12152 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12153 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12154 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12155 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12156 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12157 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12158 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12159 */ IC_EVEX_L2_K_B, /* 12160 */ IC_EVEX_L2_K_B, /* 12161 */ IC_EVEX_L2_XS_K_B, /* 12162 */ IC_EVEX_L2_XS_K_B, /* 12163 */ IC_EVEX_L2_XD_K_B, /* 12164 */ IC_EVEX_L2_XD_K_B, /* 12165 */ IC_EVEX_L2_XD_K_B, /* 12166 */ IC_EVEX_L2_XD_K_B, /* 12167 */ IC_EVEX_L2_W_K_B, /* 12168 */ IC_EVEX_L2_W_K_B, /* 12169 */ IC_EVEX_L2_W_XS_K_B, /* 12170 */ IC_EVEX_L2_W_XS_K_B, /* 12171 */ IC_EVEX_L2_W_XD_K_B, /* 12172 */ IC_EVEX_L2_W_XD_K_B, /* 12173 */ IC_EVEX_L2_W_XD_K_B, /* 12174 */ IC_EVEX_L2_W_XD_K_B, /* 12175 */ IC_EVEX_L2_OPSIZE_K_B, /* 12176 */ IC_EVEX_L2_OPSIZE_K_B, /* 12177 */ IC_EVEX_L2_OPSIZE_K_B, /* 12178 */ IC_EVEX_L2_OPSIZE_K_B, /* 12179 */ IC_EVEX_L2_OPSIZE_K_B, /* 12180 */ IC_EVEX_L2_OPSIZE_K_B, /* 12181 */ IC_EVEX_L2_OPSIZE_K_B, /* 12182 */ IC_EVEX_L2_OPSIZE_K_B, /* 12183 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12184 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12185 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12186 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12187 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12188 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12189 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12190 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12191 */ IC_EVEX_L2_K_B, /* 12192 */ IC_EVEX_L2_K_B, /* 12193 */ IC_EVEX_L2_XS_K_B, /* 12194 */ IC_EVEX_L2_XS_K_B, /* 12195 */ IC_EVEX_L2_XD_K_B, /* 12196 */ IC_EVEX_L2_XD_K_B, /* 12197 */ IC_EVEX_L2_XD_K_B, /* 12198 */ IC_EVEX_L2_XD_K_B, /* 12199 */ IC_EVEX_L2_W_K_B, /* 12200 */ IC_EVEX_L2_W_K_B, /* 12201 */ IC_EVEX_L2_W_XS_K_B, /* 12202 */ IC_EVEX_L2_W_XS_K_B, /* 12203 */ IC_EVEX_L2_W_XD_K_B, /* 12204 */ IC_EVEX_L2_W_XD_K_B, /* 12205 */ IC_EVEX_L2_W_XD_K_B, /* 12206 */ IC_EVEX_L2_W_XD_K_B, /* 12207 */ IC_EVEX_L2_OPSIZE_K_B, /* 12208 */ IC_EVEX_L2_OPSIZE_K_B, /* 12209 */ IC_EVEX_L2_OPSIZE_K_B, /* 12210 */ IC_EVEX_L2_OPSIZE_K_B, /* 12211 */ IC_EVEX_L2_OPSIZE_K_B, /* 12212 */ IC_EVEX_L2_OPSIZE_K_B, /* 12213 */ IC_EVEX_L2_OPSIZE_K_B, /* 12214 */ IC_EVEX_L2_OPSIZE_K_B, /* 12215 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12216 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12217 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12218 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12219 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12220 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12221 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12222 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12223 */ IC_EVEX_L2_K_B, /* 12224 */ IC_EVEX_L2_K_B, /* 12225 */ IC_EVEX_L2_XS_K_B, /* 12226 */ IC_EVEX_L2_XS_K_B, /* 12227 */ IC_EVEX_L2_XD_K_B, /* 12228 */ IC_EVEX_L2_XD_K_B, /* 12229 */ IC_EVEX_L2_XD_K_B, /* 12230 */ IC_EVEX_L2_XD_K_B, /* 12231 */ IC_EVEX_L2_W_K_B, /* 12232 */ IC_EVEX_L2_W_K_B, /* 12233 */ IC_EVEX_L2_W_XS_K_B, /* 12234 */ IC_EVEX_L2_W_XS_K_B, /* 12235 */ IC_EVEX_L2_W_XD_K_B, /* 12236 */ IC_EVEX_L2_W_XD_K_B, /* 12237 */ IC_EVEX_L2_W_XD_K_B, /* 12238 */ IC_EVEX_L2_W_XD_K_B, /* 12239 */ IC_EVEX_L2_OPSIZE_K_B, /* 12240 */ IC_EVEX_L2_OPSIZE_K_B, /* 12241 */ IC_EVEX_L2_OPSIZE_K_B, /* 12242 */ IC_EVEX_L2_OPSIZE_K_B, /* 12243 */ IC_EVEX_L2_OPSIZE_K_B, /* 12244 */ IC_EVEX_L2_OPSIZE_K_B, /* 12245 */ IC_EVEX_L2_OPSIZE_K_B, /* 12246 */ IC_EVEX_L2_OPSIZE_K_B, /* 12247 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12248 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12249 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12250 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12251 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12252 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12253 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12254 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12255 */ IC_EVEX_L2_K_B, /* 12256 */ IC_EVEX_L2_K_B, /* 12257 */ IC_EVEX_L2_XS_K_B, /* 12258 */ IC_EVEX_L2_XS_K_B, /* 12259 */ IC_EVEX_L2_XD_K_B, /* 12260 */ IC_EVEX_L2_XD_K_B, /* 12261 */ IC_EVEX_L2_XD_K_B, /* 12262 */ IC_EVEX_L2_XD_K_B, /* 12263 */ IC_EVEX_L2_W_K_B, /* 12264 */ IC_EVEX_L2_W_K_B, /* 12265 */ IC_EVEX_L2_W_XS_K_B, /* 12266 */ IC_EVEX_L2_W_XS_K_B, /* 12267 */ IC_EVEX_L2_W_XD_K_B, /* 12268 */ IC_EVEX_L2_W_XD_K_B, /* 12269 */ IC_EVEX_L2_W_XD_K_B, /* 12270 */ IC_EVEX_L2_W_XD_K_B, /* 12271 */ IC_EVEX_L2_OPSIZE_K_B, /* 12272 */ IC_EVEX_L2_OPSIZE_K_B, /* 12273 */ IC_EVEX_L2_OPSIZE_K_B, /* 12274 */ IC_EVEX_L2_OPSIZE_K_B, /* 12275 */ IC_EVEX_L2_OPSIZE_K_B, /* 12276 */ IC_EVEX_L2_OPSIZE_K_B, /* 12277 */ IC_EVEX_L2_OPSIZE_K_B, /* 12278 */ IC_EVEX_L2_OPSIZE_K_B, /* 12279 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12280 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12281 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12282 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12283 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12284 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12285 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12286 */ IC_EVEX_L2_W_OPSIZE_K_B, /* 12287 */ IC, /* 12288 */ IC_64BIT, /* 12289 */ IC_XS, /* 12290 */ IC_64BIT_XS, /* 12291 */ IC_XD, /* 12292 */ IC_64BIT_XD, /* 12293 */ IC_XS, /* 12294 */ IC_64BIT_XS, /* 12295 */ IC, /* 12296 */ IC_64BIT_REXW, /* 12297 */ IC_XS, /* 12298 */ IC_64BIT_REXW_XS, /* 12299 */ IC_XD, /* 12300 */ IC_64BIT_REXW_XD, /* 12301 */ IC_XS, /* 12302 */ IC_64BIT_REXW_XS, /* 12303 */ IC_OPSIZE, /* 12304 */ IC_64BIT_OPSIZE, /* 12305 */ IC_XS_OPSIZE, /* 12306 */ IC_64BIT_XS_OPSIZE, /* 12307 */ IC_XD_OPSIZE, /* 12308 */ IC_64BIT_XD_OPSIZE, /* 12309 */ IC_XS_OPSIZE, /* 12310 */ IC_64BIT_XD_OPSIZE, /* 12311 */ IC_OPSIZE, /* 12312 */ IC_64BIT_REXW_OPSIZE, /* 12313 */ IC_XS_OPSIZE, /* 12314 */ IC_64BIT_REXW_XS, /* 12315 */ IC_XD_OPSIZE, /* 12316 */ IC_64BIT_REXW_XD, /* 12317 */ IC_XS_OPSIZE, /* 12318 */ IC_64BIT_REXW_XS, /* 12319 */ IC_ADSIZE, /* 12320 */ IC_64BIT_ADSIZE, /* 12321 */ IC_XS, /* 12322 */ IC_64BIT_XS, /* 12323 */ IC_XD, /* 12324 */ IC_64BIT_XD, /* 12325 */ IC_XS, /* 12326 */ IC_64BIT_XS, /* 12327 */ IC_ADSIZE, /* 12328 */ IC_64BIT_REXW_ADSIZE, /* 12329 */ IC_XS, /* 12330 */ IC_64BIT_REXW_XS, /* 12331 */ IC_XD, /* 12332 */ IC_64BIT_REXW_XD, /* 12333 */ IC_XS, /* 12334 */ IC_64BIT_REXW_XS, /* 12335 */ IC_OPSIZE_ADSIZE, /* 12336 */ IC_64BIT_OPSIZE_ADSIZE, /* 12337 */ IC_XS_OPSIZE, /* 12338 */ IC_64BIT_XS_OPSIZE, /* 12339 */ IC_XD_OPSIZE, /* 12340 */ IC_64BIT_XD_OPSIZE, /* 12341 */ IC_XS_OPSIZE, /* 12342 */ IC_64BIT_XD_OPSIZE, /* 12343 */ IC_OPSIZE_ADSIZE, /* 12344 */ IC_64BIT_REXW_OPSIZE, /* 12345 */ IC_XS_OPSIZE, /* 12346 */ IC_64BIT_REXW_XS, /* 12347 */ IC_XD_OPSIZE, /* 12348 */ IC_64BIT_REXW_XD, /* 12349 */ IC_XS_OPSIZE, /* 12350 */ IC_64BIT_REXW_XS, /* 12351 */ IC_VEX, /* 12352 */ IC_VEX, /* 12353 */ IC_VEX_XS, /* 12354 */ IC_VEX_XS, /* 12355 */ IC_VEX_XD, /* 12356 */ IC_VEX_XD, /* 12357 */ IC_VEX_XD, /* 12358 */ IC_VEX_XD, /* 12359 */ IC_VEX_W, /* 12360 */ IC_VEX_W, /* 12361 */ IC_VEX_W_XS, /* 12362 */ IC_VEX_W_XS, /* 12363 */ IC_VEX_W_XD, /* 12364 */ IC_VEX_W_XD, /* 12365 */ IC_VEX_W_XD, /* 12366 */ IC_VEX_W_XD, /* 12367 */ IC_VEX_OPSIZE, /* 12368 */ IC_VEX_OPSIZE, /* 12369 */ IC_VEX_OPSIZE, /* 12370 */ IC_VEX_OPSIZE, /* 12371 */ IC_VEX_OPSIZE, /* 12372 */ IC_VEX_OPSIZE, /* 12373 */ IC_VEX_OPSIZE, /* 12374 */ IC_VEX_OPSIZE, /* 12375 */ IC_VEX_W_OPSIZE, /* 12376 */ IC_VEX_W_OPSIZE, /* 12377 */ IC_VEX_W_OPSIZE, /* 12378 */ IC_VEX_W_OPSIZE, /* 12379 */ IC_VEX_W_OPSIZE, /* 12380 */ IC_VEX_W_OPSIZE, /* 12381 */ IC_VEX_W_OPSIZE, /* 12382 */ IC_VEX_W_OPSIZE, /* 12383 */ IC_VEX, /* 12384 */ IC_VEX, /* 12385 */ IC_VEX_XS, /* 12386 */ IC_VEX_XS, /* 12387 */ IC_VEX_XD, /* 12388 */ IC_VEX_XD, /* 12389 */ IC_VEX_XD, /* 12390 */ IC_VEX_XD, /* 12391 */ IC_VEX_W, /* 12392 */ IC_VEX_W, /* 12393 */ IC_VEX_W_XS, /* 12394 */ IC_VEX_W_XS, /* 12395 */ IC_VEX_W_XD, /* 12396 */ IC_VEX_W_XD, /* 12397 */ IC_VEX_W_XD, /* 12398 */ IC_VEX_W_XD, /* 12399 */ IC_VEX_OPSIZE, /* 12400 */ IC_VEX_OPSIZE, /* 12401 */ IC_VEX_OPSIZE, /* 12402 */ IC_VEX_OPSIZE, /* 12403 */ IC_VEX_OPSIZE, /* 12404 */ IC_VEX_OPSIZE, /* 12405 */ IC_VEX_OPSIZE, /* 12406 */ IC_VEX_OPSIZE, /* 12407 */ IC_VEX_W_OPSIZE, /* 12408 */ IC_VEX_W_OPSIZE, /* 12409 */ IC_VEX_W_OPSIZE, /* 12410 */ IC_VEX_W_OPSIZE, /* 12411 */ IC_VEX_W_OPSIZE, /* 12412 */ IC_VEX_W_OPSIZE, /* 12413 */ IC_VEX_W_OPSIZE, /* 12414 */ IC_VEX_W_OPSIZE, /* 12415 */ IC_VEX_L, /* 12416 */ IC_VEX_L, /* 12417 */ IC_VEX_L_XS, /* 12418 */ IC_VEX_L_XS, /* 12419 */ IC_VEX_L_XD, /* 12420 */ IC_VEX_L_XD, /* 12421 */ IC_VEX_L_XD, /* 12422 */ IC_VEX_L_XD, /* 12423 */ IC_VEX_L_W, /* 12424 */ IC_VEX_L_W, /* 12425 */ IC_VEX_L_W_XS, /* 12426 */ IC_VEX_L_W_XS, /* 12427 */ IC_VEX_L_W_XD, /* 12428 */ IC_VEX_L_W_XD, /* 12429 */ IC_VEX_L_W_XD, /* 12430 */ IC_VEX_L_W_XD, /* 12431 */ IC_VEX_L_OPSIZE, /* 12432 */ IC_VEX_L_OPSIZE, /* 12433 */ IC_VEX_L_OPSIZE, /* 12434 */ IC_VEX_L_OPSIZE, /* 12435 */ IC_VEX_L_OPSIZE, /* 12436 */ IC_VEX_L_OPSIZE, /* 12437 */ IC_VEX_L_OPSIZE, /* 12438 */ IC_VEX_L_OPSIZE, /* 12439 */ IC_VEX_L_W_OPSIZE, /* 12440 */ IC_VEX_L_W_OPSIZE, /* 12441 */ IC_VEX_L_W_OPSIZE, /* 12442 */ IC_VEX_L_W_OPSIZE, /* 12443 */ IC_VEX_L_W_OPSIZE, /* 12444 */ IC_VEX_L_W_OPSIZE, /* 12445 */ IC_VEX_L_W_OPSIZE, /* 12446 */ IC_VEX_L_W_OPSIZE, /* 12447 */ IC_VEX_L, /* 12448 */ IC_VEX_L, /* 12449 */ IC_VEX_L_XS, /* 12450 */ IC_VEX_L_XS, /* 12451 */ IC_VEX_L_XD, /* 12452 */ IC_VEX_L_XD, /* 12453 */ IC_VEX_L_XD, /* 12454 */ IC_VEX_L_XD, /* 12455 */ IC_VEX_L_W, /* 12456 */ IC_VEX_L_W, /* 12457 */ IC_VEX_L_W_XS, /* 12458 */ IC_VEX_L_W_XS, /* 12459 */ IC_VEX_L_W_XD, /* 12460 */ IC_VEX_L_W_XD, /* 12461 */ IC_VEX_L_W_XD, /* 12462 */ IC_VEX_L_W_XD, /* 12463 */ IC_VEX_L_OPSIZE, /* 12464 */ IC_VEX_L_OPSIZE, /* 12465 */ IC_VEX_L_OPSIZE, /* 12466 */ IC_VEX_L_OPSIZE, /* 12467 */ IC_VEX_L_OPSIZE, /* 12468 */ IC_VEX_L_OPSIZE, /* 12469 */ IC_VEX_L_OPSIZE, /* 12470 */ IC_VEX_L_OPSIZE, /* 12471 */ IC_VEX_L_W_OPSIZE, /* 12472 */ IC_VEX_L_W_OPSIZE, /* 12473 */ IC_VEX_L_W_OPSIZE, /* 12474 */ IC_VEX_L_W_OPSIZE, /* 12475 */ IC_VEX_L_W_OPSIZE, /* 12476 */ IC_VEX_L_W_OPSIZE, /* 12477 */ IC_VEX_L_W_OPSIZE, /* 12478 */ IC_VEX_L_W_OPSIZE, /* 12479 */ IC_VEX_L, /* 12480 */ IC_VEX_L, /* 12481 */ IC_VEX_L_XS, /* 12482 */ IC_VEX_L_XS, /* 12483 */ IC_VEX_L_XD, /* 12484 */ IC_VEX_L_XD, /* 12485 */ IC_VEX_L_XD, /* 12486 */ IC_VEX_L_XD, /* 12487 */ IC_VEX_L_W, /* 12488 */ IC_VEX_L_W, /* 12489 */ IC_VEX_L_W_XS, /* 12490 */ IC_VEX_L_W_XS, /* 12491 */ IC_VEX_L_W_XD, /* 12492 */ IC_VEX_L_W_XD, /* 12493 */ IC_VEX_L_W_XD, /* 12494 */ IC_VEX_L_W_XD, /* 12495 */ IC_VEX_L_OPSIZE, /* 12496 */ IC_VEX_L_OPSIZE, /* 12497 */ IC_VEX_L_OPSIZE, /* 12498 */ IC_VEX_L_OPSIZE, /* 12499 */ IC_VEX_L_OPSIZE, /* 12500 */ IC_VEX_L_OPSIZE, /* 12501 */ IC_VEX_L_OPSIZE, /* 12502 */ IC_VEX_L_OPSIZE, /* 12503 */ IC_VEX_L_W_OPSIZE, /* 12504 */ IC_VEX_L_W_OPSIZE, /* 12505 */ IC_VEX_L_W_OPSIZE, /* 12506 */ IC_VEX_L_W_OPSIZE, /* 12507 */ IC_VEX_L_W_OPSIZE, /* 12508 */ IC_VEX_L_W_OPSIZE, /* 12509 */ IC_VEX_L_W_OPSIZE, /* 12510 */ IC_VEX_L_W_OPSIZE, /* 12511 */ IC_VEX_L, /* 12512 */ IC_VEX_L, /* 12513 */ IC_VEX_L_XS, /* 12514 */ IC_VEX_L_XS, /* 12515 */ IC_VEX_L_XD, /* 12516 */ IC_VEX_L_XD, /* 12517 */ IC_VEX_L_XD, /* 12518 */ IC_VEX_L_XD, /* 12519 */ IC_VEX_L_W, /* 12520 */ IC_VEX_L_W, /* 12521 */ IC_VEX_L_W_XS, /* 12522 */ IC_VEX_L_W_XS, /* 12523 */ IC_VEX_L_W_XD, /* 12524 */ IC_VEX_L_W_XD, /* 12525 */ IC_VEX_L_W_XD, /* 12526 */ IC_VEX_L_W_XD, /* 12527 */ IC_VEX_L_OPSIZE, /* 12528 */ IC_VEX_L_OPSIZE, /* 12529 */ IC_VEX_L_OPSIZE, /* 12530 */ IC_VEX_L_OPSIZE, /* 12531 */ IC_VEX_L_OPSIZE, /* 12532 */ IC_VEX_L_OPSIZE, /* 12533 */ IC_VEX_L_OPSIZE, /* 12534 */ IC_VEX_L_OPSIZE, /* 12535 */ IC_VEX_L_W_OPSIZE, /* 12536 */ IC_VEX_L_W_OPSIZE, /* 12537 */ IC_VEX_L_W_OPSIZE, /* 12538 */ IC_VEX_L_W_OPSIZE, /* 12539 */ IC_VEX_L_W_OPSIZE, /* 12540 */ IC_VEX_L_W_OPSIZE, /* 12541 */ IC_VEX_L_W_OPSIZE, /* 12542 */ IC_VEX_L_W_OPSIZE, /* 12543 */ IC_EVEX_KZ_B, /* 12544 */ IC_EVEX_KZ_B, /* 12545 */ IC_EVEX_XS_KZ_B, /* 12546 */ IC_EVEX_XS_KZ_B, /* 12547 */ IC_EVEX_XD_KZ_B, /* 12548 */ IC_EVEX_XD_KZ_B, /* 12549 */ IC_EVEX_XD_KZ_B, /* 12550 */ IC_EVEX_XD_KZ_B, /* 12551 */ IC_EVEX_W_KZ_B, /* 12552 */ IC_EVEX_W_KZ_B, /* 12553 */ IC_EVEX_W_XS_KZ_B, /* 12554 */ IC_EVEX_W_XS_KZ_B, /* 12555 */ IC_EVEX_W_XD_KZ_B, /* 12556 */ IC_EVEX_W_XD_KZ_B, /* 12557 */ IC_EVEX_W_XD_KZ_B, /* 12558 */ IC_EVEX_W_XD_KZ_B, /* 12559 */ IC_EVEX_OPSIZE_KZ_B, /* 12560 */ IC_EVEX_OPSIZE_KZ_B, /* 12561 */ IC_EVEX_OPSIZE_KZ_B, /* 12562 */ IC_EVEX_OPSIZE_KZ_B, /* 12563 */ IC_EVEX_OPSIZE_KZ_B, /* 12564 */ IC_EVEX_OPSIZE_KZ_B, /* 12565 */ IC_EVEX_OPSIZE_KZ_B, /* 12566 */ IC_EVEX_OPSIZE_KZ_B, /* 12567 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12568 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12569 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12570 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12571 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12572 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12573 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12574 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12575 */ IC_EVEX_KZ_B, /* 12576 */ IC_EVEX_KZ_B, /* 12577 */ IC_EVEX_XS_KZ_B, /* 12578 */ IC_EVEX_XS_KZ_B, /* 12579 */ IC_EVEX_XD_KZ_B, /* 12580 */ IC_EVEX_XD_KZ_B, /* 12581 */ IC_EVEX_XD_KZ_B, /* 12582 */ IC_EVEX_XD_KZ_B, /* 12583 */ IC_EVEX_W_KZ_B, /* 12584 */ IC_EVEX_W_KZ_B, /* 12585 */ IC_EVEX_W_XS_KZ_B, /* 12586 */ IC_EVEX_W_XS_KZ_B, /* 12587 */ IC_EVEX_W_XD_KZ_B, /* 12588 */ IC_EVEX_W_XD_KZ_B, /* 12589 */ IC_EVEX_W_XD_KZ_B, /* 12590 */ IC_EVEX_W_XD_KZ_B, /* 12591 */ IC_EVEX_OPSIZE_KZ_B, /* 12592 */ IC_EVEX_OPSIZE_KZ_B, /* 12593 */ IC_EVEX_OPSIZE_KZ_B, /* 12594 */ IC_EVEX_OPSIZE_KZ_B, /* 12595 */ IC_EVEX_OPSIZE_KZ_B, /* 12596 */ IC_EVEX_OPSIZE_KZ_B, /* 12597 */ IC_EVEX_OPSIZE_KZ_B, /* 12598 */ IC_EVEX_OPSIZE_KZ_B, /* 12599 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12600 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12601 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12602 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12603 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12604 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12605 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12606 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12607 */ IC_EVEX_KZ_B, /* 12608 */ IC_EVEX_KZ_B, /* 12609 */ IC_EVEX_XS_KZ_B, /* 12610 */ IC_EVEX_XS_KZ_B, /* 12611 */ IC_EVEX_XD_KZ_B, /* 12612 */ IC_EVEX_XD_KZ_B, /* 12613 */ IC_EVEX_XD_KZ_B, /* 12614 */ IC_EVEX_XD_KZ_B, /* 12615 */ IC_EVEX_W_KZ_B, /* 12616 */ IC_EVEX_W_KZ_B, /* 12617 */ IC_EVEX_W_XS_KZ_B, /* 12618 */ IC_EVEX_W_XS_KZ_B, /* 12619 */ IC_EVEX_W_XD_KZ_B, /* 12620 */ IC_EVEX_W_XD_KZ_B, /* 12621 */ IC_EVEX_W_XD_KZ_B, /* 12622 */ IC_EVEX_W_XD_KZ_B, /* 12623 */ IC_EVEX_OPSIZE_KZ_B, /* 12624 */ IC_EVEX_OPSIZE_KZ_B, /* 12625 */ IC_EVEX_OPSIZE_KZ_B, /* 12626 */ IC_EVEX_OPSIZE_KZ_B, /* 12627 */ IC_EVEX_OPSIZE_KZ_B, /* 12628 */ IC_EVEX_OPSIZE_KZ_B, /* 12629 */ IC_EVEX_OPSIZE_KZ_B, /* 12630 */ IC_EVEX_OPSIZE_KZ_B, /* 12631 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12632 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12633 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12634 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12635 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12636 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12637 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12638 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12639 */ IC_EVEX_KZ_B, /* 12640 */ IC_EVEX_KZ_B, /* 12641 */ IC_EVEX_XS_KZ_B, /* 12642 */ IC_EVEX_XS_KZ_B, /* 12643 */ IC_EVEX_XD_KZ_B, /* 12644 */ IC_EVEX_XD_KZ_B, /* 12645 */ IC_EVEX_XD_KZ_B, /* 12646 */ IC_EVEX_XD_KZ_B, /* 12647 */ IC_EVEX_W_KZ_B, /* 12648 */ IC_EVEX_W_KZ_B, /* 12649 */ IC_EVEX_W_XS_KZ_B, /* 12650 */ IC_EVEX_W_XS_KZ_B, /* 12651 */ IC_EVEX_W_XD_KZ_B, /* 12652 */ IC_EVEX_W_XD_KZ_B, /* 12653 */ IC_EVEX_W_XD_KZ_B, /* 12654 */ IC_EVEX_W_XD_KZ_B, /* 12655 */ IC_EVEX_OPSIZE_KZ_B, /* 12656 */ IC_EVEX_OPSIZE_KZ_B, /* 12657 */ IC_EVEX_OPSIZE_KZ_B, /* 12658 */ IC_EVEX_OPSIZE_KZ_B, /* 12659 */ IC_EVEX_OPSIZE_KZ_B, /* 12660 */ IC_EVEX_OPSIZE_KZ_B, /* 12661 */ IC_EVEX_OPSIZE_KZ_B, /* 12662 */ IC_EVEX_OPSIZE_KZ_B, /* 12663 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12664 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12665 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12666 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12667 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12668 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12669 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12670 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12671 */ IC_EVEX_KZ_B, /* 12672 */ IC_EVEX_KZ_B, /* 12673 */ IC_EVEX_XS_KZ_B, /* 12674 */ IC_EVEX_XS_KZ_B, /* 12675 */ IC_EVEX_XD_KZ_B, /* 12676 */ IC_EVEX_XD_KZ_B, /* 12677 */ IC_EVEX_XD_KZ_B, /* 12678 */ IC_EVEX_XD_KZ_B, /* 12679 */ IC_EVEX_W_KZ_B, /* 12680 */ IC_EVEX_W_KZ_B, /* 12681 */ IC_EVEX_W_XS_KZ_B, /* 12682 */ IC_EVEX_W_XS_KZ_B, /* 12683 */ IC_EVEX_W_XD_KZ_B, /* 12684 */ IC_EVEX_W_XD_KZ_B, /* 12685 */ IC_EVEX_W_XD_KZ_B, /* 12686 */ IC_EVEX_W_XD_KZ_B, /* 12687 */ IC_EVEX_OPSIZE_KZ_B, /* 12688 */ IC_EVEX_OPSIZE_KZ_B, /* 12689 */ IC_EVEX_OPSIZE_KZ_B, /* 12690 */ IC_EVEX_OPSIZE_KZ_B, /* 12691 */ IC_EVEX_OPSIZE_KZ_B, /* 12692 */ IC_EVEX_OPSIZE_KZ_B, /* 12693 */ IC_EVEX_OPSIZE_KZ_B, /* 12694 */ IC_EVEX_OPSIZE_KZ_B, /* 12695 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12696 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12697 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12698 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12699 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12700 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12701 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12702 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12703 */ IC_EVEX_KZ_B, /* 12704 */ IC_EVEX_KZ_B, /* 12705 */ IC_EVEX_XS_KZ_B, /* 12706 */ IC_EVEX_XS_KZ_B, /* 12707 */ IC_EVEX_XD_KZ_B, /* 12708 */ IC_EVEX_XD_KZ_B, /* 12709 */ IC_EVEX_XD_KZ_B, /* 12710 */ IC_EVEX_XD_KZ_B, /* 12711 */ IC_EVEX_W_KZ_B, /* 12712 */ IC_EVEX_W_KZ_B, /* 12713 */ IC_EVEX_W_XS_KZ_B, /* 12714 */ IC_EVEX_W_XS_KZ_B, /* 12715 */ IC_EVEX_W_XD_KZ_B, /* 12716 */ IC_EVEX_W_XD_KZ_B, /* 12717 */ IC_EVEX_W_XD_KZ_B, /* 12718 */ IC_EVEX_W_XD_KZ_B, /* 12719 */ IC_EVEX_OPSIZE_KZ_B, /* 12720 */ IC_EVEX_OPSIZE_KZ_B, /* 12721 */ IC_EVEX_OPSIZE_KZ_B, /* 12722 */ IC_EVEX_OPSIZE_KZ_B, /* 12723 */ IC_EVEX_OPSIZE_KZ_B, /* 12724 */ IC_EVEX_OPSIZE_KZ_B, /* 12725 */ IC_EVEX_OPSIZE_KZ_B, /* 12726 */ IC_EVEX_OPSIZE_KZ_B, /* 12727 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12728 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12729 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12730 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12731 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12732 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12733 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12734 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12735 */ IC_EVEX_KZ_B, /* 12736 */ IC_EVEX_KZ_B, /* 12737 */ IC_EVEX_XS_KZ_B, /* 12738 */ IC_EVEX_XS_KZ_B, /* 12739 */ IC_EVEX_XD_KZ_B, /* 12740 */ IC_EVEX_XD_KZ_B, /* 12741 */ IC_EVEX_XD_KZ_B, /* 12742 */ IC_EVEX_XD_KZ_B, /* 12743 */ IC_EVEX_W_KZ_B, /* 12744 */ IC_EVEX_W_KZ_B, /* 12745 */ IC_EVEX_W_XS_KZ_B, /* 12746 */ IC_EVEX_W_XS_KZ_B, /* 12747 */ IC_EVEX_W_XD_KZ_B, /* 12748 */ IC_EVEX_W_XD_KZ_B, /* 12749 */ IC_EVEX_W_XD_KZ_B, /* 12750 */ IC_EVEX_W_XD_KZ_B, /* 12751 */ IC_EVEX_OPSIZE_KZ_B, /* 12752 */ IC_EVEX_OPSIZE_KZ_B, /* 12753 */ IC_EVEX_OPSIZE_KZ_B, /* 12754 */ IC_EVEX_OPSIZE_KZ_B, /* 12755 */ IC_EVEX_OPSIZE_KZ_B, /* 12756 */ IC_EVEX_OPSIZE_KZ_B, /* 12757 */ IC_EVEX_OPSIZE_KZ_B, /* 12758 */ IC_EVEX_OPSIZE_KZ_B, /* 12759 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12760 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12761 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12762 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12763 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12764 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12765 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12766 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12767 */ IC_EVEX_KZ_B, /* 12768 */ IC_EVEX_KZ_B, /* 12769 */ IC_EVEX_XS_KZ_B, /* 12770 */ IC_EVEX_XS_KZ_B, /* 12771 */ IC_EVEX_XD_KZ_B, /* 12772 */ IC_EVEX_XD_KZ_B, /* 12773 */ IC_EVEX_XD_KZ_B, /* 12774 */ IC_EVEX_XD_KZ_B, /* 12775 */ IC_EVEX_W_KZ_B, /* 12776 */ IC_EVEX_W_KZ_B, /* 12777 */ IC_EVEX_W_XS_KZ_B, /* 12778 */ IC_EVEX_W_XS_KZ_B, /* 12779 */ IC_EVEX_W_XD_KZ_B, /* 12780 */ IC_EVEX_W_XD_KZ_B, /* 12781 */ IC_EVEX_W_XD_KZ_B, /* 12782 */ IC_EVEX_W_XD_KZ_B, /* 12783 */ IC_EVEX_OPSIZE_KZ_B, /* 12784 */ IC_EVEX_OPSIZE_KZ_B, /* 12785 */ IC_EVEX_OPSIZE_KZ_B, /* 12786 */ IC_EVEX_OPSIZE_KZ_B, /* 12787 */ IC_EVEX_OPSIZE_KZ_B, /* 12788 */ IC_EVEX_OPSIZE_KZ_B, /* 12789 */ IC_EVEX_OPSIZE_KZ_B, /* 12790 */ IC_EVEX_OPSIZE_KZ_B, /* 12791 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12792 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12793 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12794 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12795 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12796 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12797 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12798 */ IC_EVEX_W_OPSIZE_KZ_B, /* 12799 */ IC, /* 12800 */ IC_64BIT, /* 12801 */ IC_XS, /* 12802 */ IC_64BIT_XS, /* 12803 */ IC_XD, /* 12804 */ IC_64BIT_XD, /* 12805 */ IC_XS, /* 12806 */ IC_64BIT_XS, /* 12807 */ IC, /* 12808 */ IC_64BIT_REXW, /* 12809 */ IC_XS, /* 12810 */ IC_64BIT_REXW_XS, /* 12811 */ IC_XD, /* 12812 */ IC_64BIT_REXW_XD, /* 12813 */ IC_XS, /* 12814 */ IC_64BIT_REXW_XS, /* 12815 */ IC_OPSIZE, /* 12816 */ IC_64BIT_OPSIZE, /* 12817 */ IC_XS_OPSIZE, /* 12818 */ IC_64BIT_XS_OPSIZE, /* 12819 */ IC_XD_OPSIZE, /* 12820 */ IC_64BIT_XD_OPSIZE, /* 12821 */ IC_XS_OPSIZE, /* 12822 */ IC_64BIT_XD_OPSIZE, /* 12823 */ IC_OPSIZE, /* 12824 */ IC_64BIT_REXW_OPSIZE, /* 12825 */ IC_XS_OPSIZE, /* 12826 */ IC_64BIT_REXW_XS, /* 12827 */ IC_XD_OPSIZE, /* 12828 */ IC_64BIT_REXW_XD, /* 12829 */ IC_XS_OPSIZE, /* 12830 */ IC_64BIT_REXW_XS, /* 12831 */ IC_ADSIZE, /* 12832 */ IC_64BIT_ADSIZE, /* 12833 */ IC_XS, /* 12834 */ IC_64BIT_XS, /* 12835 */ IC_XD, /* 12836 */ IC_64BIT_XD, /* 12837 */ IC_XS, /* 12838 */ IC_64BIT_XS, /* 12839 */ IC_ADSIZE, /* 12840 */ IC_64BIT_REXW_ADSIZE, /* 12841 */ IC_XS, /* 12842 */ IC_64BIT_REXW_XS, /* 12843 */ IC_XD, /* 12844 */ IC_64BIT_REXW_XD, /* 12845 */ IC_XS, /* 12846 */ IC_64BIT_REXW_XS, /* 12847 */ IC_OPSIZE_ADSIZE, /* 12848 */ IC_64BIT_OPSIZE_ADSIZE, /* 12849 */ IC_XS_OPSIZE, /* 12850 */ IC_64BIT_XS_OPSIZE, /* 12851 */ IC_XD_OPSIZE, /* 12852 */ IC_64BIT_XD_OPSIZE, /* 12853 */ IC_XS_OPSIZE, /* 12854 */ IC_64BIT_XD_OPSIZE, /* 12855 */ IC_OPSIZE_ADSIZE, /* 12856 */ IC_64BIT_REXW_OPSIZE, /* 12857 */ IC_XS_OPSIZE, /* 12858 */ IC_64BIT_REXW_XS, /* 12859 */ IC_XD_OPSIZE, /* 12860 */ IC_64BIT_REXW_XD, /* 12861 */ IC_XS_OPSIZE, /* 12862 */ IC_64BIT_REXW_XS, /* 12863 */ IC_VEX, /* 12864 */ IC_VEX, /* 12865 */ IC_VEX_XS, /* 12866 */ IC_VEX_XS, /* 12867 */ IC_VEX_XD, /* 12868 */ IC_VEX_XD, /* 12869 */ IC_VEX_XD, /* 12870 */ IC_VEX_XD, /* 12871 */ IC_VEX_W, /* 12872 */ IC_VEX_W, /* 12873 */ IC_VEX_W_XS, /* 12874 */ IC_VEX_W_XS, /* 12875 */ IC_VEX_W_XD, /* 12876 */ IC_VEX_W_XD, /* 12877 */ IC_VEX_W_XD, /* 12878 */ IC_VEX_W_XD, /* 12879 */ IC_VEX_OPSIZE, /* 12880 */ IC_VEX_OPSIZE, /* 12881 */ IC_VEX_OPSIZE, /* 12882 */ IC_VEX_OPSIZE, /* 12883 */ IC_VEX_OPSIZE, /* 12884 */ IC_VEX_OPSIZE, /* 12885 */ IC_VEX_OPSIZE, /* 12886 */ IC_VEX_OPSIZE, /* 12887 */ IC_VEX_W_OPSIZE, /* 12888 */ IC_VEX_W_OPSIZE, /* 12889 */ IC_VEX_W_OPSIZE, /* 12890 */ IC_VEX_W_OPSIZE, /* 12891 */ IC_VEX_W_OPSIZE, /* 12892 */ IC_VEX_W_OPSIZE, /* 12893 */ IC_VEX_W_OPSIZE, /* 12894 */ IC_VEX_W_OPSIZE, /* 12895 */ IC_VEX, /* 12896 */ IC_VEX, /* 12897 */ IC_VEX_XS, /* 12898 */ IC_VEX_XS, /* 12899 */ IC_VEX_XD, /* 12900 */ IC_VEX_XD, /* 12901 */ IC_VEX_XD, /* 12902 */ IC_VEX_XD, /* 12903 */ IC_VEX_W, /* 12904 */ IC_VEX_W, /* 12905 */ IC_VEX_W_XS, /* 12906 */ IC_VEX_W_XS, /* 12907 */ IC_VEX_W_XD, /* 12908 */ IC_VEX_W_XD, /* 12909 */ IC_VEX_W_XD, /* 12910 */ IC_VEX_W_XD, /* 12911 */ IC_VEX_OPSIZE, /* 12912 */ IC_VEX_OPSIZE, /* 12913 */ IC_VEX_OPSIZE, /* 12914 */ IC_VEX_OPSIZE, /* 12915 */ IC_VEX_OPSIZE, /* 12916 */ IC_VEX_OPSIZE, /* 12917 */ IC_VEX_OPSIZE, /* 12918 */ IC_VEX_OPSIZE, /* 12919 */ IC_VEX_W_OPSIZE, /* 12920 */ IC_VEX_W_OPSIZE, /* 12921 */ IC_VEX_W_OPSIZE, /* 12922 */ IC_VEX_W_OPSIZE, /* 12923 */ IC_VEX_W_OPSIZE, /* 12924 */ IC_VEX_W_OPSIZE, /* 12925 */ IC_VEX_W_OPSIZE, /* 12926 */ IC_VEX_W_OPSIZE, /* 12927 */ IC_VEX_L, /* 12928 */ IC_VEX_L, /* 12929 */ IC_VEX_L_XS, /* 12930 */ IC_VEX_L_XS, /* 12931 */ IC_VEX_L_XD, /* 12932 */ IC_VEX_L_XD, /* 12933 */ IC_VEX_L_XD, /* 12934 */ IC_VEX_L_XD, /* 12935 */ IC_VEX_L_W, /* 12936 */ IC_VEX_L_W, /* 12937 */ IC_VEX_L_W_XS, /* 12938 */ IC_VEX_L_W_XS, /* 12939 */ IC_VEX_L_W_XD, /* 12940 */ IC_VEX_L_W_XD, /* 12941 */ IC_VEX_L_W_XD, /* 12942 */ IC_VEX_L_W_XD, /* 12943 */ IC_VEX_L_OPSIZE, /* 12944 */ IC_VEX_L_OPSIZE, /* 12945 */ IC_VEX_L_OPSIZE, /* 12946 */ IC_VEX_L_OPSIZE, /* 12947 */ IC_VEX_L_OPSIZE, /* 12948 */ IC_VEX_L_OPSIZE, /* 12949 */ IC_VEX_L_OPSIZE, /* 12950 */ IC_VEX_L_OPSIZE, /* 12951 */ IC_VEX_L_W_OPSIZE, /* 12952 */ IC_VEX_L_W_OPSIZE, /* 12953 */ IC_VEX_L_W_OPSIZE, /* 12954 */ IC_VEX_L_W_OPSIZE, /* 12955 */ IC_VEX_L_W_OPSIZE, /* 12956 */ IC_VEX_L_W_OPSIZE, /* 12957 */ IC_VEX_L_W_OPSIZE, /* 12958 */ IC_VEX_L_W_OPSIZE, /* 12959 */ IC_VEX_L, /* 12960 */ IC_VEX_L, /* 12961 */ IC_VEX_L_XS, /* 12962 */ IC_VEX_L_XS, /* 12963 */ IC_VEX_L_XD, /* 12964 */ IC_VEX_L_XD, /* 12965 */ IC_VEX_L_XD, /* 12966 */ IC_VEX_L_XD, /* 12967 */ IC_VEX_L_W, /* 12968 */ IC_VEX_L_W, /* 12969 */ IC_VEX_L_W_XS, /* 12970 */ IC_VEX_L_W_XS, /* 12971 */ IC_VEX_L_W_XD, /* 12972 */ IC_VEX_L_W_XD, /* 12973 */ IC_VEX_L_W_XD, /* 12974 */ IC_VEX_L_W_XD, /* 12975 */ IC_VEX_L_OPSIZE, /* 12976 */ IC_VEX_L_OPSIZE, /* 12977 */ IC_VEX_L_OPSIZE, /* 12978 */ IC_VEX_L_OPSIZE, /* 12979 */ IC_VEX_L_OPSIZE, /* 12980 */ IC_VEX_L_OPSIZE, /* 12981 */ IC_VEX_L_OPSIZE, /* 12982 */ IC_VEX_L_OPSIZE, /* 12983 */ IC_VEX_L_W_OPSIZE, /* 12984 */ IC_VEX_L_W_OPSIZE, /* 12985 */ IC_VEX_L_W_OPSIZE, /* 12986 */ IC_VEX_L_W_OPSIZE, /* 12987 */ IC_VEX_L_W_OPSIZE, /* 12988 */ IC_VEX_L_W_OPSIZE, /* 12989 */ IC_VEX_L_W_OPSIZE, /* 12990 */ IC_VEX_L_W_OPSIZE, /* 12991 */ IC_VEX_L, /* 12992 */ IC_VEX_L, /* 12993 */ IC_VEX_L_XS, /* 12994 */ IC_VEX_L_XS, /* 12995 */ IC_VEX_L_XD, /* 12996 */ IC_VEX_L_XD, /* 12997 */ IC_VEX_L_XD, /* 12998 */ IC_VEX_L_XD, /* 12999 */ IC_VEX_L_W, /* 13000 */ IC_VEX_L_W, /* 13001 */ IC_VEX_L_W_XS, /* 13002 */ IC_VEX_L_W_XS, /* 13003 */ IC_VEX_L_W_XD, /* 13004 */ IC_VEX_L_W_XD, /* 13005 */ IC_VEX_L_W_XD, /* 13006 */ IC_VEX_L_W_XD, /* 13007 */ IC_VEX_L_OPSIZE, /* 13008 */ IC_VEX_L_OPSIZE, /* 13009 */ IC_VEX_L_OPSIZE, /* 13010 */ IC_VEX_L_OPSIZE, /* 13011 */ IC_VEX_L_OPSIZE, /* 13012 */ IC_VEX_L_OPSIZE, /* 13013 */ IC_VEX_L_OPSIZE, /* 13014 */ IC_VEX_L_OPSIZE, /* 13015 */ IC_VEX_L_W_OPSIZE, /* 13016 */ IC_VEX_L_W_OPSIZE, /* 13017 */ IC_VEX_L_W_OPSIZE, /* 13018 */ IC_VEX_L_W_OPSIZE, /* 13019 */ IC_VEX_L_W_OPSIZE, /* 13020 */ IC_VEX_L_W_OPSIZE, /* 13021 */ IC_VEX_L_W_OPSIZE, /* 13022 */ IC_VEX_L_W_OPSIZE, /* 13023 */ IC_VEX_L, /* 13024 */ IC_VEX_L, /* 13025 */ IC_VEX_L_XS, /* 13026 */ IC_VEX_L_XS, /* 13027 */ IC_VEX_L_XD, /* 13028 */ IC_VEX_L_XD, /* 13029 */ IC_VEX_L_XD, /* 13030 */ IC_VEX_L_XD, /* 13031 */ IC_VEX_L_W, /* 13032 */ IC_VEX_L_W, /* 13033 */ IC_VEX_L_W_XS, /* 13034 */ IC_VEX_L_W_XS, /* 13035 */ IC_VEX_L_W_XD, /* 13036 */ IC_VEX_L_W_XD, /* 13037 */ IC_VEX_L_W_XD, /* 13038 */ IC_VEX_L_W_XD, /* 13039 */ IC_VEX_L_OPSIZE, /* 13040 */ IC_VEX_L_OPSIZE, /* 13041 */ IC_VEX_L_OPSIZE, /* 13042 */ IC_VEX_L_OPSIZE, /* 13043 */ IC_VEX_L_OPSIZE, /* 13044 */ IC_VEX_L_OPSIZE, /* 13045 */ IC_VEX_L_OPSIZE, /* 13046 */ IC_VEX_L_OPSIZE, /* 13047 */ IC_VEX_L_W_OPSIZE, /* 13048 */ IC_VEX_L_W_OPSIZE, /* 13049 */ IC_VEX_L_W_OPSIZE, /* 13050 */ IC_VEX_L_W_OPSIZE, /* 13051 */ IC_VEX_L_W_OPSIZE, /* 13052 */ IC_VEX_L_W_OPSIZE, /* 13053 */ IC_VEX_L_W_OPSIZE, /* 13054 */ IC_VEX_L_W_OPSIZE, /* 13055 */ IC_EVEX_L_KZ_B, /* 13056 */ IC_EVEX_L_KZ_B, /* 13057 */ IC_EVEX_L_XS_KZ_B, /* 13058 */ IC_EVEX_L_XS_KZ_B, /* 13059 */ IC_EVEX_L_XD_KZ_B, /* 13060 */ IC_EVEX_L_XD_KZ_B, /* 13061 */ IC_EVEX_L_XD_KZ_B, /* 13062 */ IC_EVEX_L_XD_KZ_B, /* 13063 */ IC_EVEX_L_W_KZ_B, /* 13064 */ IC_EVEX_L_W_KZ_B, /* 13065 */ IC_EVEX_L_W_XS_KZ_B, /* 13066 */ IC_EVEX_L_W_XS_KZ_B, /* 13067 */ IC_EVEX_L_W_XD_KZ_B, /* 13068 */ IC_EVEX_L_W_XD_KZ_B, /* 13069 */ IC_EVEX_L_W_XD_KZ_B, /* 13070 */ IC_EVEX_L_W_XD_KZ_B, /* 13071 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13072 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13073 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13074 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13075 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13076 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13077 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13078 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13079 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13080 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13081 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13082 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13083 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13084 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13085 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13086 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13087 */ IC_EVEX_L_KZ_B, /* 13088 */ IC_EVEX_L_KZ_B, /* 13089 */ IC_EVEX_L_XS_KZ_B, /* 13090 */ IC_EVEX_L_XS_KZ_B, /* 13091 */ IC_EVEX_L_XD_KZ_B, /* 13092 */ IC_EVEX_L_XD_KZ_B, /* 13093 */ IC_EVEX_L_XD_KZ_B, /* 13094 */ IC_EVEX_L_XD_KZ_B, /* 13095 */ IC_EVEX_L_W_KZ_B, /* 13096 */ IC_EVEX_L_W_KZ_B, /* 13097 */ IC_EVEX_L_W_XS_KZ_B, /* 13098 */ IC_EVEX_L_W_XS_KZ_B, /* 13099 */ IC_EVEX_L_W_XD_KZ_B, /* 13100 */ IC_EVEX_L_W_XD_KZ_B, /* 13101 */ IC_EVEX_L_W_XD_KZ_B, /* 13102 */ IC_EVEX_L_W_XD_KZ_B, /* 13103 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13104 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13105 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13106 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13107 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13108 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13109 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13110 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13111 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13112 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13113 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13114 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13115 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13116 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13117 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13118 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13119 */ IC_EVEX_L_KZ_B, /* 13120 */ IC_EVEX_L_KZ_B, /* 13121 */ IC_EVEX_L_XS_KZ_B, /* 13122 */ IC_EVEX_L_XS_KZ_B, /* 13123 */ IC_EVEX_L_XD_KZ_B, /* 13124 */ IC_EVEX_L_XD_KZ_B, /* 13125 */ IC_EVEX_L_XD_KZ_B, /* 13126 */ IC_EVEX_L_XD_KZ_B, /* 13127 */ IC_EVEX_L_W_KZ_B, /* 13128 */ IC_EVEX_L_W_KZ_B, /* 13129 */ IC_EVEX_L_W_XS_KZ_B, /* 13130 */ IC_EVEX_L_W_XS_KZ_B, /* 13131 */ IC_EVEX_L_W_XD_KZ_B, /* 13132 */ IC_EVEX_L_W_XD_KZ_B, /* 13133 */ IC_EVEX_L_W_XD_KZ_B, /* 13134 */ IC_EVEX_L_W_XD_KZ_B, /* 13135 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13136 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13137 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13138 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13139 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13140 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13141 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13142 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13143 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13144 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13145 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13146 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13147 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13148 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13149 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13150 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13151 */ IC_EVEX_L_KZ_B, /* 13152 */ IC_EVEX_L_KZ_B, /* 13153 */ IC_EVEX_L_XS_KZ_B, /* 13154 */ IC_EVEX_L_XS_KZ_B, /* 13155 */ IC_EVEX_L_XD_KZ_B, /* 13156 */ IC_EVEX_L_XD_KZ_B, /* 13157 */ IC_EVEX_L_XD_KZ_B, /* 13158 */ IC_EVEX_L_XD_KZ_B, /* 13159 */ IC_EVEX_L_W_KZ_B, /* 13160 */ IC_EVEX_L_W_KZ_B, /* 13161 */ IC_EVEX_L_W_XS_KZ_B, /* 13162 */ IC_EVEX_L_W_XS_KZ_B, /* 13163 */ IC_EVEX_L_W_XD_KZ_B, /* 13164 */ IC_EVEX_L_W_XD_KZ_B, /* 13165 */ IC_EVEX_L_W_XD_KZ_B, /* 13166 */ IC_EVEX_L_W_XD_KZ_B, /* 13167 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13168 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13169 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13170 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13171 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13172 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13173 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13174 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13175 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13176 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13177 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13178 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13179 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13180 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13181 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13182 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13183 */ IC_EVEX_L_KZ_B, /* 13184 */ IC_EVEX_L_KZ_B, /* 13185 */ IC_EVEX_L_XS_KZ_B, /* 13186 */ IC_EVEX_L_XS_KZ_B, /* 13187 */ IC_EVEX_L_XD_KZ_B, /* 13188 */ IC_EVEX_L_XD_KZ_B, /* 13189 */ IC_EVEX_L_XD_KZ_B, /* 13190 */ IC_EVEX_L_XD_KZ_B, /* 13191 */ IC_EVEX_L_W_KZ_B, /* 13192 */ IC_EVEX_L_W_KZ_B, /* 13193 */ IC_EVEX_L_W_XS_KZ_B, /* 13194 */ IC_EVEX_L_W_XS_KZ_B, /* 13195 */ IC_EVEX_L_W_XD_KZ_B, /* 13196 */ IC_EVEX_L_W_XD_KZ_B, /* 13197 */ IC_EVEX_L_W_XD_KZ_B, /* 13198 */ IC_EVEX_L_W_XD_KZ_B, /* 13199 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13200 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13201 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13202 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13203 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13204 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13205 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13206 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13207 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13208 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13209 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13210 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13211 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13212 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13213 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13214 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13215 */ IC_EVEX_L_KZ_B, /* 13216 */ IC_EVEX_L_KZ_B, /* 13217 */ IC_EVEX_L_XS_KZ_B, /* 13218 */ IC_EVEX_L_XS_KZ_B, /* 13219 */ IC_EVEX_L_XD_KZ_B, /* 13220 */ IC_EVEX_L_XD_KZ_B, /* 13221 */ IC_EVEX_L_XD_KZ_B, /* 13222 */ IC_EVEX_L_XD_KZ_B, /* 13223 */ IC_EVEX_L_W_KZ_B, /* 13224 */ IC_EVEX_L_W_KZ_B, /* 13225 */ IC_EVEX_L_W_XS_KZ_B, /* 13226 */ IC_EVEX_L_W_XS_KZ_B, /* 13227 */ IC_EVEX_L_W_XD_KZ_B, /* 13228 */ IC_EVEX_L_W_XD_KZ_B, /* 13229 */ IC_EVEX_L_W_XD_KZ_B, /* 13230 */ IC_EVEX_L_W_XD_KZ_B, /* 13231 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13232 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13233 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13234 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13235 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13236 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13237 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13238 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13239 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13240 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13241 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13242 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13243 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13244 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13245 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13246 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13247 */ IC_EVEX_L_KZ_B, /* 13248 */ IC_EVEX_L_KZ_B, /* 13249 */ IC_EVEX_L_XS_KZ_B, /* 13250 */ IC_EVEX_L_XS_KZ_B, /* 13251 */ IC_EVEX_L_XD_KZ_B, /* 13252 */ IC_EVEX_L_XD_KZ_B, /* 13253 */ IC_EVEX_L_XD_KZ_B, /* 13254 */ IC_EVEX_L_XD_KZ_B, /* 13255 */ IC_EVEX_L_W_KZ_B, /* 13256 */ IC_EVEX_L_W_KZ_B, /* 13257 */ IC_EVEX_L_W_XS_KZ_B, /* 13258 */ IC_EVEX_L_W_XS_KZ_B, /* 13259 */ IC_EVEX_L_W_XD_KZ_B, /* 13260 */ IC_EVEX_L_W_XD_KZ_B, /* 13261 */ IC_EVEX_L_W_XD_KZ_B, /* 13262 */ IC_EVEX_L_W_XD_KZ_B, /* 13263 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13264 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13265 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13266 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13267 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13268 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13269 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13270 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13271 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13272 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13273 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13274 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13275 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13276 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13277 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13278 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13279 */ IC_EVEX_L_KZ_B, /* 13280 */ IC_EVEX_L_KZ_B, /* 13281 */ IC_EVEX_L_XS_KZ_B, /* 13282 */ IC_EVEX_L_XS_KZ_B, /* 13283 */ IC_EVEX_L_XD_KZ_B, /* 13284 */ IC_EVEX_L_XD_KZ_B, /* 13285 */ IC_EVEX_L_XD_KZ_B, /* 13286 */ IC_EVEX_L_XD_KZ_B, /* 13287 */ IC_EVEX_L_W_KZ_B, /* 13288 */ IC_EVEX_L_W_KZ_B, /* 13289 */ IC_EVEX_L_W_XS_KZ_B, /* 13290 */ IC_EVEX_L_W_XS_KZ_B, /* 13291 */ IC_EVEX_L_W_XD_KZ_B, /* 13292 */ IC_EVEX_L_W_XD_KZ_B, /* 13293 */ IC_EVEX_L_W_XD_KZ_B, /* 13294 */ IC_EVEX_L_W_XD_KZ_B, /* 13295 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13296 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13297 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13298 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13299 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13300 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13301 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13302 */ IC_EVEX_L_OPSIZE_KZ_B, /* 13303 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13304 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13305 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13306 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13307 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13308 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13309 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13310 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 13311 */ IC, /* 13312 */ IC_64BIT, /* 13313 */ IC_XS, /* 13314 */ IC_64BIT_XS, /* 13315 */ IC_XD, /* 13316 */ IC_64BIT_XD, /* 13317 */ IC_XS, /* 13318 */ IC_64BIT_XS, /* 13319 */ IC, /* 13320 */ IC_64BIT_REXW, /* 13321 */ IC_XS, /* 13322 */ IC_64BIT_REXW_XS, /* 13323 */ IC_XD, /* 13324 */ IC_64BIT_REXW_XD, /* 13325 */ IC_XS, /* 13326 */ IC_64BIT_REXW_XS, /* 13327 */ IC_OPSIZE, /* 13328 */ IC_64BIT_OPSIZE, /* 13329 */ IC_XS_OPSIZE, /* 13330 */ IC_64BIT_XS_OPSIZE, /* 13331 */ IC_XD_OPSIZE, /* 13332 */ IC_64BIT_XD_OPSIZE, /* 13333 */ IC_XS_OPSIZE, /* 13334 */ IC_64BIT_XD_OPSIZE, /* 13335 */ IC_OPSIZE, /* 13336 */ IC_64BIT_REXW_OPSIZE, /* 13337 */ IC_XS_OPSIZE, /* 13338 */ IC_64BIT_REXW_XS, /* 13339 */ IC_XD_OPSIZE, /* 13340 */ IC_64BIT_REXW_XD, /* 13341 */ IC_XS_OPSIZE, /* 13342 */ IC_64BIT_REXW_XS, /* 13343 */ IC_ADSIZE, /* 13344 */ IC_64BIT_ADSIZE, /* 13345 */ IC_XS, /* 13346 */ IC_64BIT_XS, /* 13347 */ IC_XD, /* 13348 */ IC_64BIT_XD, /* 13349 */ IC_XS, /* 13350 */ IC_64BIT_XS, /* 13351 */ IC_ADSIZE, /* 13352 */ IC_64BIT_REXW_ADSIZE, /* 13353 */ IC_XS, /* 13354 */ IC_64BIT_REXW_XS, /* 13355 */ IC_XD, /* 13356 */ IC_64BIT_REXW_XD, /* 13357 */ IC_XS, /* 13358 */ IC_64BIT_REXW_XS, /* 13359 */ IC_OPSIZE_ADSIZE, /* 13360 */ IC_64BIT_OPSIZE_ADSIZE, /* 13361 */ IC_XS_OPSIZE, /* 13362 */ IC_64BIT_XS_OPSIZE, /* 13363 */ IC_XD_OPSIZE, /* 13364 */ IC_64BIT_XD_OPSIZE, /* 13365 */ IC_XS_OPSIZE, /* 13366 */ IC_64BIT_XD_OPSIZE, /* 13367 */ IC_OPSIZE_ADSIZE, /* 13368 */ IC_64BIT_REXW_OPSIZE, /* 13369 */ IC_XS_OPSIZE, /* 13370 */ IC_64BIT_REXW_XS, /* 13371 */ IC_XD_OPSIZE, /* 13372 */ IC_64BIT_REXW_XD, /* 13373 */ IC_XS_OPSIZE, /* 13374 */ IC_64BIT_REXW_XS, /* 13375 */ IC_VEX, /* 13376 */ IC_VEX, /* 13377 */ IC_VEX_XS, /* 13378 */ IC_VEX_XS, /* 13379 */ IC_VEX_XD, /* 13380 */ IC_VEX_XD, /* 13381 */ IC_VEX_XD, /* 13382 */ IC_VEX_XD, /* 13383 */ IC_VEX_W, /* 13384 */ IC_VEX_W, /* 13385 */ IC_VEX_W_XS, /* 13386 */ IC_VEX_W_XS, /* 13387 */ IC_VEX_W_XD, /* 13388 */ IC_VEX_W_XD, /* 13389 */ IC_VEX_W_XD, /* 13390 */ IC_VEX_W_XD, /* 13391 */ IC_VEX_OPSIZE, /* 13392 */ IC_VEX_OPSIZE, /* 13393 */ IC_VEX_OPSIZE, /* 13394 */ IC_VEX_OPSIZE, /* 13395 */ IC_VEX_OPSIZE, /* 13396 */ IC_VEX_OPSIZE, /* 13397 */ IC_VEX_OPSIZE, /* 13398 */ IC_VEX_OPSIZE, /* 13399 */ IC_VEX_W_OPSIZE, /* 13400 */ IC_VEX_W_OPSIZE, /* 13401 */ IC_VEX_W_OPSIZE, /* 13402 */ IC_VEX_W_OPSIZE, /* 13403 */ IC_VEX_W_OPSIZE, /* 13404 */ IC_VEX_W_OPSIZE, /* 13405 */ IC_VEX_W_OPSIZE, /* 13406 */ IC_VEX_W_OPSIZE, /* 13407 */ IC_VEX, /* 13408 */ IC_VEX, /* 13409 */ IC_VEX_XS, /* 13410 */ IC_VEX_XS, /* 13411 */ IC_VEX_XD, /* 13412 */ IC_VEX_XD, /* 13413 */ IC_VEX_XD, /* 13414 */ IC_VEX_XD, /* 13415 */ IC_VEX_W, /* 13416 */ IC_VEX_W, /* 13417 */ IC_VEX_W_XS, /* 13418 */ IC_VEX_W_XS, /* 13419 */ IC_VEX_W_XD, /* 13420 */ IC_VEX_W_XD, /* 13421 */ IC_VEX_W_XD, /* 13422 */ IC_VEX_W_XD, /* 13423 */ IC_VEX_OPSIZE, /* 13424 */ IC_VEX_OPSIZE, /* 13425 */ IC_VEX_OPSIZE, /* 13426 */ IC_VEX_OPSIZE, /* 13427 */ IC_VEX_OPSIZE, /* 13428 */ IC_VEX_OPSIZE, /* 13429 */ IC_VEX_OPSIZE, /* 13430 */ IC_VEX_OPSIZE, /* 13431 */ IC_VEX_W_OPSIZE, /* 13432 */ IC_VEX_W_OPSIZE, /* 13433 */ IC_VEX_W_OPSIZE, /* 13434 */ IC_VEX_W_OPSIZE, /* 13435 */ IC_VEX_W_OPSIZE, /* 13436 */ IC_VEX_W_OPSIZE, /* 13437 */ IC_VEX_W_OPSIZE, /* 13438 */ IC_VEX_W_OPSIZE, /* 13439 */ IC_VEX_L, /* 13440 */ IC_VEX_L, /* 13441 */ IC_VEX_L_XS, /* 13442 */ IC_VEX_L_XS, /* 13443 */ IC_VEX_L_XD, /* 13444 */ IC_VEX_L_XD, /* 13445 */ IC_VEX_L_XD, /* 13446 */ IC_VEX_L_XD, /* 13447 */ IC_VEX_L_W, /* 13448 */ IC_VEX_L_W, /* 13449 */ IC_VEX_L_W_XS, /* 13450 */ IC_VEX_L_W_XS, /* 13451 */ IC_VEX_L_W_XD, /* 13452 */ IC_VEX_L_W_XD, /* 13453 */ IC_VEX_L_W_XD, /* 13454 */ IC_VEX_L_W_XD, /* 13455 */ IC_VEX_L_OPSIZE, /* 13456 */ IC_VEX_L_OPSIZE, /* 13457 */ IC_VEX_L_OPSIZE, /* 13458 */ IC_VEX_L_OPSIZE, /* 13459 */ IC_VEX_L_OPSIZE, /* 13460 */ IC_VEX_L_OPSIZE, /* 13461 */ IC_VEX_L_OPSIZE, /* 13462 */ IC_VEX_L_OPSIZE, /* 13463 */ IC_VEX_L_W_OPSIZE, /* 13464 */ IC_VEX_L_W_OPSIZE, /* 13465 */ IC_VEX_L_W_OPSIZE, /* 13466 */ IC_VEX_L_W_OPSIZE, /* 13467 */ IC_VEX_L_W_OPSIZE, /* 13468 */ IC_VEX_L_W_OPSIZE, /* 13469 */ IC_VEX_L_W_OPSIZE, /* 13470 */ IC_VEX_L_W_OPSIZE, /* 13471 */ IC_VEX_L, /* 13472 */ IC_VEX_L, /* 13473 */ IC_VEX_L_XS, /* 13474 */ IC_VEX_L_XS, /* 13475 */ IC_VEX_L_XD, /* 13476 */ IC_VEX_L_XD, /* 13477 */ IC_VEX_L_XD, /* 13478 */ IC_VEX_L_XD, /* 13479 */ IC_VEX_L_W, /* 13480 */ IC_VEX_L_W, /* 13481 */ IC_VEX_L_W_XS, /* 13482 */ IC_VEX_L_W_XS, /* 13483 */ IC_VEX_L_W_XD, /* 13484 */ IC_VEX_L_W_XD, /* 13485 */ IC_VEX_L_W_XD, /* 13486 */ IC_VEX_L_W_XD, /* 13487 */ IC_VEX_L_OPSIZE, /* 13488 */ IC_VEX_L_OPSIZE, /* 13489 */ IC_VEX_L_OPSIZE, /* 13490 */ IC_VEX_L_OPSIZE, /* 13491 */ IC_VEX_L_OPSIZE, /* 13492 */ IC_VEX_L_OPSIZE, /* 13493 */ IC_VEX_L_OPSIZE, /* 13494 */ IC_VEX_L_OPSIZE, /* 13495 */ IC_VEX_L_W_OPSIZE, /* 13496 */ IC_VEX_L_W_OPSIZE, /* 13497 */ IC_VEX_L_W_OPSIZE, /* 13498 */ IC_VEX_L_W_OPSIZE, /* 13499 */ IC_VEX_L_W_OPSIZE, /* 13500 */ IC_VEX_L_W_OPSIZE, /* 13501 */ IC_VEX_L_W_OPSIZE, /* 13502 */ IC_VEX_L_W_OPSIZE, /* 13503 */ IC_VEX_L, /* 13504 */ IC_VEX_L, /* 13505 */ IC_VEX_L_XS, /* 13506 */ IC_VEX_L_XS, /* 13507 */ IC_VEX_L_XD, /* 13508 */ IC_VEX_L_XD, /* 13509 */ IC_VEX_L_XD, /* 13510 */ IC_VEX_L_XD, /* 13511 */ IC_VEX_L_W, /* 13512 */ IC_VEX_L_W, /* 13513 */ IC_VEX_L_W_XS, /* 13514 */ IC_VEX_L_W_XS, /* 13515 */ IC_VEX_L_W_XD, /* 13516 */ IC_VEX_L_W_XD, /* 13517 */ IC_VEX_L_W_XD, /* 13518 */ IC_VEX_L_W_XD, /* 13519 */ IC_VEX_L_OPSIZE, /* 13520 */ IC_VEX_L_OPSIZE, /* 13521 */ IC_VEX_L_OPSIZE, /* 13522 */ IC_VEX_L_OPSIZE, /* 13523 */ IC_VEX_L_OPSIZE, /* 13524 */ IC_VEX_L_OPSIZE, /* 13525 */ IC_VEX_L_OPSIZE, /* 13526 */ IC_VEX_L_OPSIZE, /* 13527 */ IC_VEX_L_W_OPSIZE, /* 13528 */ IC_VEX_L_W_OPSIZE, /* 13529 */ IC_VEX_L_W_OPSIZE, /* 13530 */ IC_VEX_L_W_OPSIZE, /* 13531 */ IC_VEX_L_W_OPSIZE, /* 13532 */ IC_VEX_L_W_OPSIZE, /* 13533 */ IC_VEX_L_W_OPSIZE, /* 13534 */ IC_VEX_L_W_OPSIZE, /* 13535 */ IC_VEX_L, /* 13536 */ IC_VEX_L, /* 13537 */ IC_VEX_L_XS, /* 13538 */ IC_VEX_L_XS, /* 13539 */ IC_VEX_L_XD, /* 13540 */ IC_VEX_L_XD, /* 13541 */ IC_VEX_L_XD, /* 13542 */ IC_VEX_L_XD, /* 13543 */ IC_VEX_L_W, /* 13544 */ IC_VEX_L_W, /* 13545 */ IC_VEX_L_W_XS, /* 13546 */ IC_VEX_L_W_XS, /* 13547 */ IC_VEX_L_W_XD, /* 13548 */ IC_VEX_L_W_XD, /* 13549 */ IC_VEX_L_W_XD, /* 13550 */ IC_VEX_L_W_XD, /* 13551 */ IC_VEX_L_OPSIZE, /* 13552 */ IC_VEX_L_OPSIZE, /* 13553 */ IC_VEX_L_OPSIZE, /* 13554 */ IC_VEX_L_OPSIZE, /* 13555 */ IC_VEX_L_OPSIZE, /* 13556 */ IC_VEX_L_OPSIZE, /* 13557 */ IC_VEX_L_OPSIZE, /* 13558 */ IC_VEX_L_OPSIZE, /* 13559 */ IC_VEX_L_W_OPSIZE, /* 13560 */ IC_VEX_L_W_OPSIZE, /* 13561 */ IC_VEX_L_W_OPSIZE, /* 13562 */ IC_VEX_L_W_OPSIZE, /* 13563 */ IC_VEX_L_W_OPSIZE, /* 13564 */ IC_VEX_L_W_OPSIZE, /* 13565 */ IC_VEX_L_W_OPSIZE, /* 13566 */ IC_VEX_L_W_OPSIZE, /* 13567 */ IC_EVEX_L2_KZ_B, /* 13568 */ IC_EVEX_L2_KZ_B, /* 13569 */ IC_EVEX_L2_XS_KZ_B, /* 13570 */ IC_EVEX_L2_XS_KZ_B, /* 13571 */ IC_EVEX_L2_XD_KZ_B, /* 13572 */ IC_EVEX_L2_XD_KZ_B, /* 13573 */ IC_EVEX_L2_XD_KZ_B, /* 13574 */ IC_EVEX_L2_XD_KZ_B, /* 13575 */ IC_EVEX_L2_W_KZ_B, /* 13576 */ IC_EVEX_L2_W_KZ_B, /* 13577 */ IC_EVEX_L2_W_XS_KZ_B, /* 13578 */ IC_EVEX_L2_W_XS_KZ_B, /* 13579 */ IC_EVEX_L2_W_XD_KZ_B, /* 13580 */ IC_EVEX_L2_W_XD_KZ_B, /* 13581 */ IC_EVEX_L2_W_XD_KZ_B, /* 13582 */ IC_EVEX_L2_W_XD_KZ_B, /* 13583 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13584 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13585 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13586 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13587 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13588 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13589 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13590 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13591 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13592 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13593 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13594 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13595 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13596 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13597 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13598 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13599 */ IC_EVEX_L2_KZ_B, /* 13600 */ IC_EVEX_L2_KZ_B, /* 13601 */ IC_EVEX_L2_XS_KZ_B, /* 13602 */ IC_EVEX_L2_XS_KZ_B, /* 13603 */ IC_EVEX_L2_XD_KZ_B, /* 13604 */ IC_EVEX_L2_XD_KZ_B, /* 13605 */ IC_EVEX_L2_XD_KZ_B, /* 13606 */ IC_EVEX_L2_XD_KZ_B, /* 13607 */ IC_EVEX_L2_W_KZ_B, /* 13608 */ IC_EVEX_L2_W_KZ_B, /* 13609 */ IC_EVEX_L2_W_XS_KZ_B, /* 13610 */ IC_EVEX_L2_W_XS_KZ_B, /* 13611 */ IC_EVEX_L2_W_XD_KZ_B, /* 13612 */ IC_EVEX_L2_W_XD_KZ_B, /* 13613 */ IC_EVEX_L2_W_XD_KZ_B, /* 13614 */ IC_EVEX_L2_W_XD_KZ_B, /* 13615 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13616 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13617 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13618 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13619 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13620 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13621 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13622 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13623 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13624 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13625 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13626 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13627 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13628 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13629 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13630 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13631 */ IC_EVEX_L2_KZ_B, /* 13632 */ IC_EVEX_L2_KZ_B, /* 13633 */ IC_EVEX_L2_XS_KZ_B, /* 13634 */ IC_EVEX_L2_XS_KZ_B, /* 13635 */ IC_EVEX_L2_XD_KZ_B, /* 13636 */ IC_EVEX_L2_XD_KZ_B, /* 13637 */ IC_EVEX_L2_XD_KZ_B, /* 13638 */ IC_EVEX_L2_XD_KZ_B, /* 13639 */ IC_EVEX_L2_W_KZ_B, /* 13640 */ IC_EVEX_L2_W_KZ_B, /* 13641 */ IC_EVEX_L2_W_XS_KZ_B, /* 13642 */ IC_EVEX_L2_W_XS_KZ_B, /* 13643 */ IC_EVEX_L2_W_XD_KZ_B, /* 13644 */ IC_EVEX_L2_W_XD_KZ_B, /* 13645 */ IC_EVEX_L2_W_XD_KZ_B, /* 13646 */ IC_EVEX_L2_W_XD_KZ_B, /* 13647 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13648 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13649 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13650 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13651 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13652 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13653 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13654 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13655 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13656 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13657 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13658 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13659 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13660 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13661 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13662 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13663 */ IC_EVEX_L2_KZ_B, /* 13664 */ IC_EVEX_L2_KZ_B, /* 13665 */ IC_EVEX_L2_XS_KZ_B, /* 13666 */ IC_EVEX_L2_XS_KZ_B, /* 13667 */ IC_EVEX_L2_XD_KZ_B, /* 13668 */ IC_EVEX_L2_XD_KZ_B, /* 13669 */ IC_EVEX_L2_XD_KZ_B, /* 13670 */ IC_EVEX_L2_XD_KZ_B, /* 13671 */ IC_EVEX_L2_W_KZ_B, /* 13672 */ IC_EVEX_L2_W_KZ_B, /* 13673 */ IC_EVEX_L2_W_XS_KZ_B, /* 13674 */ IC_EVEX_L2_W_XS_KZ_B, /* 13675 */ IC_EVEX_L2_W_XD_KZ_B, /* 13676 */ IC_EVEX_L2_W_XD_KZ_B, /* 13677 */ IC_EVEX_L2_W_XD_KZ_B, /* 13678 */ IC_EVEX_L2_W_XD_KZ_B, /* 13679 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13680 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13681 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13682 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13683 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13684 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13685 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13686 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13687 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13688 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13689 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13690 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13691 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13692 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13693 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13694 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13695 */ IC_EVEX_L2_KZ_B, /* 13696 */ IC_EVEX_L2_KZ_B, /* 13697 */ IC_EVEX_L2_XS_KZ_B, /* 13698 */ IC_EVEX_L2_XS_KZ_B, /* 13699 */ IC_EVEX_L2_XD_KZ_B, /* 13700 */ IC_EVEX_L2_XD_KZ_B, /* 13701 */ IC_EVEX_L2_XD_KZ_B, /* 13702 */ IC_EVEX_L2_XD_KZ_B, /* 13703 */ IC_EVEX_L2_W_KZ_B, /* 13704 */ IC_EVEX_L2_W_KZ_B, /* 13705 */ IC_EVEX_L2_W_XS_KZ_B, /* 13706 */ IC_EVEX_L2_W_XS_KZ_B, /* 13707 */ IC_EVEX_L2_W_XD_KZ_B, /* 13708 */ IC_EVEX_L2_W_XD_KZ_B, /* 13709 */ IC_EVEX_L2_W_XD_KZ_B, /* 13710 */ IC_EVEX_L2_W_XD_KZ_B, /* 13711 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13712 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13713 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13714 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13715 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13716 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13717 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13718 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13719 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13720 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13721 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13722 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13723 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13724 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13725 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13726 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13727 */ IC_EVEX_L2_KZ_B, /* 13728 */ IC_EVEX_L2_KZ_B, /* 13729 */ IC_EVEX_L2_XS_KZ_B, /* 13730 */ IC_EVEX_L2_XS_KZ_B, /* 13731 */ IC_EVEX_L2_XD_KZ_B, /* 13732 */ IC_EVEX_L2_XD_KZ_B, /* 13733 */ IC_EVEX_L2_XD_KZ_B, /* 13734 */ IC_EVEX_L2_XD_KZ_B, /* 13735 */ IC_EVEX_L2_W_KZ_B, /* 13736 */ IC_EVEX_L2_W_KZ_B, /* 13737 */ IC_EVEX_L2_W_XS_KZ_B, /* 13738 */ IC_EVEX_L2_W_XS_KZ_B, /* 13739 */ IC_EVEX_L2_W_XD_KZ_B, /* 13740 */ IC_EVEX_L2_W_XD_KZ_B, /* 13741 */ IC_EVEX_L2_W_XD_KZ_B, /* 13742 */ IC_EVEX_L2_W_XD_KZ_B, /* 13743 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13744 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13745 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13746 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13747 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13748 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13749 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13750 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13751 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13752 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13753 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13754 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13755 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13756 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13757 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13758 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13759 */ IC_EVEX_L2_KZ_B, /* 13760 */ IC_EVEX_L2_KZ_B, /* 13761 */ IC_EVEX_L2_XS_KZ_B, /* 13762 */ IC_EVEX_L2_XS_KZ_B, /* 13763 */ IC_EVEX_L2_XD_KZ_B, /* 13764 */ IC_EVEX_L2_XD_KZ_B, /* 13765 */ IC_EVEX_L2_XD_KZ_B, /* 13766 */ IC_EVEX_L2_XD_KZ_B, /* 13767 */ IC_EVEX_L2_W_KZ_B, /* 13768 */ IC_EVEX_L2_W_KZ_B, /* 13769 */ IC_EVEX_L2_W_XS_KZ_B, /* 13770 */ IC_EVEX_L2_W_XS_KZ_B, /* 13771 */ IC_EVEX_L2_W_XD_KZ_B, /* 13772 */ IC_EVEX_L2_W_XD_KZ_B, /* 13773 */ IC_EVEX_L2_W_XD_KZ_B, /* 13774 */ IC_EVEX_L2_W_XD_KZ_B, /* 13775 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13776 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13777 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13778 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13779 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13780 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13781 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13782 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13783 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13784 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13785 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13786 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13787 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13788 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13789 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13790 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13791 */ IC_EVEX_L2_KZ_B, /* 13792 */ IC_EVEX_L2_KZ_B, /* 13793 */ IC_EVEX_L2_XS_KZ_B, /* 13794 */ IC_EVEX_L2_XS_KZ_B, /* 13795 */ IC_EVEX_L2_XD_KZ_B, /* 13796 */ IC_EVEX_L2_XD_KZ_B, /* 13797 */ IC_EVEX_L2_XD_KZ_B, /* 13798 */ IC_EVEX_L2_XD_KZ_B, /* 13799 */ IC_EVEX_L2_W_KZ_B, /* 13800 */ IC_EVEX_L2_W_KZ_B, /* 13801 */ IC_EVEX_L2_W_XS_KZ_B, /* 13802 */ IC_EVEX_L2_W_XS_KZ_B, /* 13803 */ IC_EVEX_L2_W_XD_KZ_B, /* 13804 */ IC_EVEX_L2_W_XD_KZ_B, /* 13805 */ IC_EVEX_L2_W_XD_KZ_B, /* 13806 */ IC_EVEX_L2_W_XD_KZ_B, /* 13807 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13808 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13809 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13810 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13811 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13812 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13813 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13814 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 13815 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13816 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13817 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13818 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13819 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13820 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13821 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13822 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 13823 */ IC, /* 13824 */ IC_64BIT, /* 13825 */ IC_XS, /* 13826 */ IC_64BIT_XS, /* 13827 */ IC_XD, /* 13828 */ IC_64BIT_XD, /* 13829 */ IC_XS, /* 13830 */ IC_64BIT_XS, /* 13831 */ IC, /* 13832 */ IC_64BIT_REXW, /* 13833 */ IC_XS, /* 13834 */ IC_64BIT_REXW_XS, /* 13835 */ IC_XD, /* 13836 */ IC_64BIT_REXW_XD, /* 13837 */ IC_XS, /* 13838 */ IC_64BIT_REXW_XS, /* 13839 */ IC_OPSIZE, /* 13840 */ IC_64BIT_OPSIZE, /* 13841 */ IC_XS_OPSIZE, /* 13842 */ IC_64BIT_XS_OPSIZE, /* 13843 */ IC_XD_OPSIZE, /* 13844 */ IC_64BIT_XD_OPSIZE, /* 13845 */ IC_XS_OPSIZE, /* 13846 */ IC_64BIT_XD_OPSIZE, /* 13847 */ IC_OPSIZE, /* 13848 */ IC_64BIT_REXW_OPSIZE, /* 13849 */ IC_XS_OPSIZE, /* 13850 */ IC_64BIT_REXW_XS, /* 13851 */ IC_XD_OPSIZE, /* 13852 */ IC_64BIT_REXW_XD, /* 13853 */ IC_XS_OPSIZE, /* 13854 */ IC_64BIT_REXW_XS, /* 13855 */ IC_ADSIZE, /* 13856 */ IC_64BIT_ADSIZE, /* 13857 */ IC_XS, /* 13858 */ IC_64BIT_XS, /* 13859 */ IC_XD, /* 13860 */ IC_64BIT_XD, /* 13861 */ IC_XS, /* 13862 */ IC_64BIT_XS, /* 13863 */ IC_ADSIZE, /* 13864 */ IC_64BIT_REXW_ADSIZE, /* 13865 */ IC_XS, /* 13866 */ IC_64BIT_REXW_XS, /* 13867 */ IC_XD, /* 13868 */ IC_64BIT_REXW_XD, /* 13869 */ IC_XS, /* 13870 */ IC_64BIT_REXW_XS, /* 13871 */ IC_OPSIZE_ADSIZE, /* 13872 */ IC_64BIT_OPSIZE_ADSIZE, /* 13873 */ IC_XS_OPSIZE, /* 13874 */ IC_64BIT_XS_OPSIZE, /* 13875 */ IC_XD_OPSIZE, /* 13876 */ IC_64BIT_XD_OPSIZE, /* 13877 */ IC_XS_OPSIZE, /* 13878 */ IC_64BIT_XD_OPSIZE, /* 13879 */ IC_OPSIZE_ADSIZE, /* 13880 */ IC_64BIT_REXW_OPSIZE, /* 13881 */ IC_XS_OPSIZE, /* 13882 */ IC_64BIT_REXW_XS, /* 13883 */ IC_XD_OPSIZE, /* 13884 */ IC_64BIT_REXW_XD, /* 13885 */ IC_XS_OPSIZE, /* 13886 */ IC_64BIT_REXW_XS, /* 13887 */ IC_VEX, /* 13888 */ IC_VEX, /* 13889 */ IC_VEX_XS, /* 13890 */ IC_VEX_XS, /* 13891 */ IC_VEX_XD, /* 13892 */ IC_VEX_XD, /* 13893 */ IC_VEX_XD, /* 13894 */ IC_VEX_XD, /* 13895 */ IC_VEX_W, /* 13896 */ IC_VEX_W, /* 13897 */ IC_VEX_W_XS, /* 13898 */ IC_VEX_W_XS, /* 13899 */ IC_VEX_W_XD, /* 13900 */ IC_VEX_W_XD, /* 13901 */ IC_VEX_W_XD, /* 13902 */ IC_VEX_W_XD, /* 13903 */ IC_VEX_OPSIZE, /* 13904 */ IC_VEX_OPSIZE, /* 13905 */ IC_VEX_OPSIZE, /* 13906 */ IC_VEX_OPSIZE, /* 13907 */ IC_VEX_OPSIZE, /* 13908 */ IC_VEX_OPSIZE, /* 13909 */ IC_VEX_OPSIZE, /* 13910 */ IC_VEX_OPSIZE, /* 13911 */ IC_VEX_W_OPSIZE, /* 13912 */ IC_VEX_W_OPSIZE, /* 13913 */ IC_VEX_W_OPSIZE, /* 13914 */ IC_VEX_W_OPSIZE, /* 13915 */ IC_VEX_W_OPSIZE, /* 13916 */ IC_VEX_W_OPSIZE, /* 13917 */ IC_VEX_W_OPSIZE, /* 13918 */ IC_VEX_W_OPSIZE, /* 13919 */ IC_VEX, /* 13920 */ IC_VEX, /* 13921 */ IC_VEX_XS, /* 13922 */ IC_VEX_XS, /* 13923 */ IC_VEX_XD, /* 13924 */ IC_VEX_XD, /* 13925 */ IC_VEX_XD, /* 13926 */ IC_VEX_XD, /* 13927 */ IC_VEX_W, /* 13928 */ IC_VEX_W, /* 13929 */ IC_VEX_W_XS, /* 13930 */ IC_VEX_W_XS, /* 13931 */ IC_VEX_W_XD, /* 13932 */ IC_VEX_W_XD, /* 13933 */ IC_VEX_W_XD, /* 13934 */ IC_VEX_W_XD, /* 13935 */ IC_VEX_OPSIZE, /* 13936 */ IC_VEX_OPSIZE, /* 13937 */ IC_VEX_OPSIZE, /* 13938 */ IC_VEX_OPSIZE, /* 13939 */ IC_VEX_OPSIZE, /* 13940 */ IC_VEX_OPSIZE, /* 13941 */ IC_VEX_OPSIZE, /* 13942 */ IC_VEX_OPSIZE, /* 13943 */ IC_VEX_W_OPSIZE, /* 13944 */ IC_VEX_W_OPSIZE, /* 13945 */ IC_VEX_W_OPSIZE, /* 13946 */ IC_VEX_W_OPSIZE, /* 13947 */ IC_VEX_W_OPSIZE, /* 13948 */ IC_VEX_W_OPSIZE, /* 13949 */ IC_VEX_W_OPSIZE, /* 13950 */ IC_VEX_W_OPSIZE, /* 13951 */ IC_VEX_L, /* 13952 */ IC_VEX_L, /* 13953 */ IC_VEX_L_XS, /* 13954 */ IC_VEX_L_XS, /* 13955 */ IC_VEX_L_XD, /* 13956 */ IC_VEX_L_XD, /* 13957 */ IC_VEX_L_XD, /* 13958 */ IC_VEX_L_XD, /* 13959 */ IC_VEX_L_W, /* 13960 */ IC_VEX_L_W, /* 13961 */ IC_VEX_L_W_XS, /* 13962 */ IC_VEX_L_W_XS, /* 13963 */ IC_VEX_L_W_XD, /* 13964 */ IC_VEX_L_W_XD, /* 13965 */ IC_VEX_L_W_XD, /* 13966 */ IC_VEX_L_W_XD, /* 13967 */ IC_VEX_L_OPSIZE, /* 13968 */ IC_VEX_L_OPSIZE, /* 13969 */ IC_VEX_L_OPSIZE, /* 13970 */ IC_VEX_L_OPSIZE, /* 13971 */ IC_VEX_L_OPSIZE, /* 13972 */ IC_VEX_L_OPSIZE, /* 13973 */ IC_VEX_L_OPSIZE, /* 13974 */ IC_VEX_L_OPSIZE, /* 13975 */ IC_VEX_L_W_OPSIZE, /* 13976 */ IC_VEX_L_W_OPSIZE, /* 13977 */ IC_VEX_L_W_OPSIZE, /* 13978 */ IC_VEX_L_W_OPSIZE, /* 13979 */ IC_VEX_L_W_OPSIZE, /* 13980 */ IC_VEX_L_W_OPSIZE, /* 13981 */ IC_VEX_L_W_OPSIZE, /* 13982 */ IC_VEX_L_W_OPSIZE, /* 13983 */ IC_VEX_L, /* 13984 */ IC_VEX_L, /* 13985 */ IC_VEX_L_XS, /* 13986 */ IC_VEX_L_XS, /* 13987 */ IC_VEX_L_XD, /* 13988 */ IC_VEX_L_XD, /* 13989 */ IC_VEX_L_XD, /* 13990 */ IC_VEX_L_XD, /* 13991 */ IC_VEX_L_W, /* 13992 */ IC_VEX_L_W, /* 13993 */ IC_VEX_L_W_XS, /* 13994 */ IC_VEX_L_W_XS, /* 13995 */ IC_VEX_L_W_XD, /* 13996 */ IC_VEX_L_W_XD, /* 13997 */ IC_VEX_L_W_XD, /* 13998 */ IC_VEX_L_W_XD, /* 13999 */ IC_VEX_L_OPSIZE, /* 14000 */ IC_VEX_L_OPSIZE, /* 14001 */ IC_VEX_L_OPSIZE, /* 14002 */ IC_VEX_L_OPSIZE, /* 14003 */ IC_VEX_L_OPSIZE, /* 14004 */ IC_VEX_L_OPSIZE, /* 14005 */ IC_VEX_L_OPSIZE, /* 14006 */ IC_VEX_L_OPSIZE, /* 14007 */ IC_VEX_L_W_OPSIZE, /* 14008 */ IC_VEX_L_W_OPSIZE, /* 14009 */ IC_VEX_L_W_OPSIZE, /* 14010 */ IC_VEX_L_W_OPSIZE, /* 14011 */ IC_VEX_L_W_OPSIZE, /* 14012 */ IC_VEX_L_W_OPSIZE, /* 14013 */ IC_VEX_L_W_OPSIZE, /* 14014 */ IC_VEX_L_W_OPSIZE, /* 14015 */ IC_VEX_L, /* 14016 */ IC_VEX_L, /* 14017 */ IC_VEX_L_XS, /* 14018 */ IC_VEX_L_XS, /* 14019 */ IC_VEX_L_XD, /* 14020 */ IC_VEX_L_XD, /* 14021 */ IC_VEX_L_XD, /* 14022 */ IC_VEX_L_XD, /* 14023 */ IC_VEX_L_W, /* 14024 */ IC_VEX_L_W, /* 14025 */ IC_VEX_L_W_XS, /* 14026 */ IC_VEX_L_W_XS, /* 14027 */ IC_VEX_L_W_XD, /* 14028 */ IC_VEX_L_W_XD, /* 14029 */ IC_VEX_L_W_XD, /* 14030 */ IC_VEX_L_W_XD, /* 14031 */ IC_VEX_L_OPSIZE, /* 14032 */ IC_VEX_L_OPSIZE, /* 14033 */ IC_VEX_L_OPSIZE, /* 14034 */ IC_VEX_L_OPSIZE, /* 14035 */ IC_VEX_L_OPSIZE, /* 14036 */ IC_VEX_L_OPSIZE, /* 14037 */ IC_VEX_L_OPSIZE, /* 14038 */ IC_VEX_L_OPSIZE, /* 14039 */ IC_VEX_L_W_OPSIZE, /* 14040 */ IC_VEX_L_W_OPSIZE, /* 14041 */ IC_VEX_L_W_OPSIZE, /* 14042 */ IC_VEX_L_W_OPSIZE, /* 14043 */ IC_VEX_L_W_OPSIZE, /* 14044 */ IC_VEX_L_W_OPSIZE, /* 14045 */ IC_VEX_L_W_OPSIZE, /* 14046 */ IC_VEX_L_W_OPSIZE, /* 14047 */ IC_VEX_L, /* 14048 */ IC_VEX_L, /* 14049 */ IC_VEX_L_XS, /* 14050 */ IC_VEX_L_XS, /* 14051 */ IC_VEX_L_XD, /* 14052 */ IC_VEX_L_XD, /* 14053 */ IC_VEX_L_XD, /* 14054 */ IC_VEX_L_XD, /* 14055 */ IC_VEX_L_W, /* 14056 */ IC_VEX_L_W, /* 14057 */ IC_VEX_L_W_XS, /* 14058 */ IC_VEX_L_W_XS, /* 14059 */ IC_VEX_L_W_XD, /* 14060 */ IC_VEX_L_W_XD, /* 14061 */ IC_VEX_L_W_XD, /* 14062 */ IC_VEX_L_W_XD, /* 14063 */ IC_VEX_L_OPSIZE, /* 14064 */ IC_VEX_L_OPSIZE, /* 14065 */ IC_VEX_L_OPSIZE, /* 14066 */ IC_VEX_L_OPSIZE, /* 14067 */ IC_VEX_L_OPSIZE, /* 14068 */ IC_VEX_L_OPSIZE, /* 14069 */ IC_VEX_L_OPSIZE, /* 14070 */ IC_VEX_L_OPSIZE, /* 14071 */ IC_VEX_L_W_OPSIZE, /* 14072 */ IC_VEX_L_W_OPSIZE, /* 14073 */ IC_VEX_L_W_OPSIZE, /* 14074 */ IC_VEX_L_W_OPSIZE, /* 14075 */ IC_VEX_L_W_OPSIZE, /* 14076 */ IC_VEX_L_W_OPSIZE, /* 14077 */ IC_VEX_L_W_OPSIZE, /* 14078 */ IC_VEX_L_W_OPSIZE, /* 14079 */ IC_EVEX_L2_KZ_B, /* 14080 */ IC_EVEX_L2_KZ_B, /* 14081 */ IC_EVEX_L2_XS_KZ_B, /* 14082 */ IC_EVEX_L2_XS_KZ_B, /* 14083 */ IC_EVEX_L2_XD_KZ_B, /* 14084 */ IC_EVEX_L2_XD_KZ_B, /* 14085 */ IC_EVEX_L2_XD_KZ_B, /* 14086 */ IC_EVEX_L2_XD_KZ_B, /* 14087 */ IC_EVEX_L2_W_KZ_B, /* 14088 */ IC_EVEX_L2_W_KZ_B, /* 14089 */ IC_EVEX_L2_W_XS_KZ_B, /* 14090 */ IC_EVEX_L2_W_XS_KZ_B, /* 14091 */ IC_EVEX_L2_W_XD_KZ_B, /* 14092 */ IC_EVEX_L2_W_XD_KZ_B, /* 14093 */ IC_EVEX_L2_W_XD_KZ_B, /* 14094 */ IC_EVEX_L2_W_XD_KZ_B, /* 14095 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14096 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14097 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14098 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14099 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14100 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14101 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14102 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14103 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14104 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14105 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14106 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14107 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14108 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14109 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14110 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14111 */ IC_EVEX_L2_KZ_B, /* 14112 */ IC_EVEX_L2_KZ_B, /* 14113 */ IC_EVEX_L2_XS_KZ_B, /* 14114 */ IC_EVEX_L2_XS_KZ_B, /* 14115 */ IC_EVEX_L2_XD_KZ_B, /* 14116 */ IC_EVEX_L2_XD_KZ_B, /* 14117 */ IC_EVEX_L2_XD_KZ_B, /* 14118 */ IC_EVEX_L2_XD_KZ_B, /* 14119 */ IC_EVEX_L2_W_KZ_B, /* 14120 */ IC_EVEX_L2_W_KZ_B, /* 14121 */ IC_EVEX_L2_W_XS_KZ_B, /* 14122 */ IC_EVEX_L2_W_XS_KZ_B, /* 14123 */ IC_EVEX_L2_W_XD_KZ_B, /* 14124 */ IC_EVEX_L2_W_XD_KZ_B, /* 14125 */ IC_EVEX_L2_W_XD_KZ_B, /* 14126 */ IC_EVEX_L2_W_XD_KZ_B, /* 14127 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14128 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14129 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14130 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14131 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14132 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14133 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14134 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14135 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14136 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14137 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14138 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14139 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14140 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14141 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14142 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14143 */ IC_EVEX_L2_KZ_B, /* 14144 */ IC_EVEX_L2_KZ_B, /* 14145 */ IC_EVEX_L2_XS_KZ_B, /* 14146 */ IC_EVEX_L2_XS_KZ_B, /* 14147 */ IC_EVEX_L2_XD_KZ_B, /* 14148 */ IC_EVEX_L2_XD_KZ_B, /* 14149 */ IC_EVEX_L2_XD_KZ_B, /* 14150 */ IC_EVEX_L2_XD_KZ_B, /* 14151 */ IC_EVEX_L2_W_KZ_B, /* 14152 */ IC_EVEX_L2_W_KZ_B, /* 14153 */ IC_EVEX_L2_W_XS_KZ_B, /* 14154 */ IC_EVEX_L2_W_XS_KZ_B, /* 14155 */ IC_EVEX_L2_W_XD_KZ_B, /* 14156 */ IC_EVEX_L2_W_XD_KZ_B, /* 14157 */ IC_EVEX_L2_W_XD_KZ_B, /* 14158 */ IC_EVEX_L2_W_XD_KZ_B, /* 14159 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14160 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14161 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14162 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14163 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14164 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14165 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14166 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14167 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14168 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14169 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14170 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14171 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14172 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14173 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14174 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14175 */ IC_EVEX_L2_KZ_B, /* 14176 */ IC_EVEX_L2_KZ_B, /* 14177 */ IC_EVEX_L2_XS_KZ_B, /* 14178 */ IC_EVEX_L2_XS_KZ_B, /* 14179 */ IC_EVEX_L2_XD_KZ_B, /* 14180 */ IC_EVEX_L2_XD_KZ_B, /* 14181 */ IC_EVEX_L2_XD_KZ_B, /* 14182 */ IC_EVEX_L2_XD_KZ_B, /* 14183 */ IC_EVEX_L2_W_KZ_B, /* 14184 */ IC_EVEX_L2_W_KZ_B, /* 14185 */ IC_EVEX_L2_W_XS_KZ_B, /* 14186 */ IC_EVEX_L2_W_XS_KZ_B, /* 14187 */ IC_EVEX_L2_W_XD_KZ_B, /* 14188 */ IC_EVEX_L2_W_XD_KZ_B, /* 14189 */ IC_EVEX_L2_W_XD_KZ_B, /* 14190 */ IC_EVEX_L2_W_XD_KZ_B, /* 14191 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14192 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14193 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14194 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14195 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14196 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14197 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14198 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14199 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14200 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14201 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14202 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14203 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14204 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14205 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14206 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14207 */ IC_EVEX_L2_KZ_B, /* 14208 */ IC_EVEX_L2_KZ_B, /* 14209 */ IC_EVEX_L2_XS_KZ_B, /* 14210 */ IC_EVEX_L2_XS_KZ_B, /* 14211 */ IC_EVEX_L2_XD_KZ_B, /* 14212 */ IC_EVEX_L2_XD_KZ_B, /* 14213 */ IC_EVEX_L2_XD_KZ_B, /* 14214 */ IC_EVEX_L2_XD_KZ_B, /* 14215 */ IC_EVEX_L2_W_KZ_B, /* 14216 */ IC_EVEX_L2_W_KZ_B, /* 14217 */ IC_EVEX_L2_W_XS_KZ_B, /* 14218 */ IC_EVEX_L2_W_XS_KZ_B, /* 14219 */ IC_EVEX_L2_W_XD_KZ_B, /* 14220 */ IC_EVEX_L2_W_XD_KZ_B, /* 14221 */ IC_EVEX_L2_W_XD_KZ_B, /* 14222 */ IC_EVEX_L2_W_XD_KZ_B, /* 14223 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14224 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14225 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14226 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14227 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14228 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14229 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14230 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14231 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14232 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14233 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14234 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14235 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14236 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14237 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14238 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14239 */ IC_EVEX_L2_KZ_B, /* 14240 */ IC_EVEX_L2_KZ_B, /* 14241 */ IC_EVEX_L2_XS_KZ_B, /* 14242 */ IC_EVEX_L2_XS_KZ_B, /* 14243 */ IC_EVEX_L2_XD_KZ_B, /* 14244 */ IC_EVEX_L2_XD_KZ_B, /* 14245 */ IC_EVEX_L2_XD_KZ_B, /* 14246 */ IC_EVEX_L2_XD_KZ_B, /* 14247 */ IC_EVEX_L2_W_KZ_B, /* 14248 */ IC_EVEX_L2_W_KZ_B, /* 14249 */ IC_EVEX_L2_W_XS_KZ_B, /* 14250 */ IC_EVEX_L2_W_XS_KZ_B, /* 14251 */ IC_EVEX_L2_W_XD_KZ_B, /* 14252 */ IC_EVEX_L2_W_XD_KZ_B, /* 14253 */ IC_EVEX_L2_W_XD_KZ_B, /* 14254 */ IC_EVEX_L2_W_XD_KZ_B, /* 14255 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14256 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14257 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14258 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14259 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14260 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14261 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14262 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14263 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14264 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14265 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14266 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14267 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14268 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14269 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14270 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14271 */ IC_EVEX_L2_KZ_B, /* 14272 */ IC_EVEX_L2_KZ_B, /* 14273 */ IC_EVEX_L2_XS_KZ_B, /* 14274 */ IC_EVEX_L2_XS_KZ_B, /* 14275 */ IC_EVEX_L2_XD_KZ_B, /* 14276 */ IC_EVEX_L2_XD_KZ_B, /* 14277 */ IC_EVEX_L2_XD_KZ_B, /* 14278 */ IC_EVEX_L2_XD_KZ_B, /* 14279 */ IC_EVEX_L2_W_KZ_B, /* 14280 */ IC_EVEX_L2_W_KZ_B, /* 14281 */ IC_EVEX_L2_W_XS_KZ_B, /* 14282 */ IC_EVEX_L2_W_XS_KZ_B, /* 14283 */ IC_EVEX_L2_W_XD_KZ_B, /* 14284 */ IC_EVEX_L2_W_XD_KZ_B, /* 14285 */ IC_EVEX_L2_W_XD_KZ_B, /* 14286 */ IC_EVEX_L2_W_XD_KZ_B, /* 14287 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14288 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14289 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14290 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14291 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14292 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14293 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14294 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14295 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14296 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14297 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14298 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14299 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14300 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14301 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14302 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14303 */ IC_EVEX_L2_KZ_B, /* 14304 */ IC_EVEX_L2_KZ_B, /* 14305 */ IC_EVEX_L2_XS_KZ_B, /* 14306 */ IC_EVEX_L2_XS_KZ_B, /* 14307 */ IC_EVEX_L2_XD_KZ_B, /* 14308 */ IC_EVEX_L2_XD_KZ_B, /* 14309 */ IC_EVEX_L2_XD_KZ_B, /* 14310 */ IC_EVEX_L2_XD_KZ_B, /* 14311 */ IC_EVEX_L2_W_KZ_B, /* 14312 */ IC_EVEX_L2_W_KZ_B, /* 14313 */ IC_EVEX_L2_W_XS_KZ_B, /* 14314 */ IC_EVEX_L2_W_XS_KZ_B, /* 14315 */ IC_EVEX_L2_W_XD_KZ_B, /* 14316 */ IC_EVEX_L2_W_XD_KZ_B, /* 14317 */ IC_EVEX_L2_W_XD_KZ_B, /* 14318 */ IC_EVEX_L2_W_XD_KZ_B, /* 14319 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14320 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14321 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14322 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14323 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14324 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14325 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14326 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 14327 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14328 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14329 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14330 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14331 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14332 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14333 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14334 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 14335 */ IC, /* 14336 */ IC_64BIT, /* 14337 */ IC_XS, /* 14338 */ IC_64BIT_XS, /* 14339 */ IC_XD, /* 14340 */ IC_64BIT_XD, /* 14341 */ IC_XS, /* 14342 */ IC_64BIT_XS, /* 14343 */ IC, /* 14344 */ IC_64BIT_REXW, /* 14345 */ IC_XS, /* 14346 */ IC_64BIT_REXW_XS, /* 14347 */ IC_XD, /* 14348 */ IC_64BIT_REXW_XD, /* 14349 */ IC_XS, /* 14350 */ IC_64BIT_REXW_XS, /* 14351 */ IC_OPSIZE, /* 14352 */ IC_64BIT_OPSIZE, /* 14353 */ IC_XS_OPSIZE, /* 14354 */ IC_64BIT_XS_OPSIZE, /* 14355 */ IC_XD_OPSIZE, /* 14356 */ IC_64BIT_XD_OPSIZE, /* 14357 */ IC_XS_OPSIZE, /* 14358 */ IC_64BIT_XD_OPSIZE, /* 14359 */ IC_OPSIZE, /* 14360 */ IC_64BIT_REXW_OPSIZE, /* 14361 */ IC_XS_OPSIZE, /* 14362 */ IC_64BIT_REXW_XS, /* 14363 */ IC_XD_OPSIZE, /* 14364 */ IC_64BIT_REXW_XD, /* 14365 */ IC_XS_OPSIZE, /* 14366 */ IC_64BIT_REXW_XS, /* 14367 */ IC_ADSIZE, /* 14368 */ IC_64BIT_ADSIZE, /* 14369 */ IC_XS, /* 14370 */ IC_64BIT_XS, /* 14371 */ IC_XD, /* 14372 */ IC_64BIT_XD, /* 14373 */ IC_XS, /* 14374 */ IC_64BIT_XS, /* 14375 */ IC_ADSIZE, /* 14376 */ IC_64BIT_REXW_ADSIZE, /* 14377 */ IC_XS, /* 14378 */ IC_64BIT_REXW_XS, /* 14379 */ IC_XD, /* 14380 */ IC_64BIT_REXW_XD, /* 14381 */ IC_XS, /* 14382 */ IC_64BIT_REXW_XS, /* 14383 */ IC_OPSIZE_ADSIZE, /* 14384 */ IC_64BIT_OPSIZE_ADSIZE, /* 14385 */ IC_XS_OPSIZE, /* 14386 */ IC_64BIT_XS_OPSIZE, /* 14387 */ IC_XD_OPSIZE, /* 14388 */ IC_64BIT_XD_OPSIZE, /* 14389 */ IC_XS_OPSIZE, /* 14390 */ IC_64BIT_XD_OPSIZE, /* 14391 */ IC_OPSIZE_ADSIZE, /* 14392 */ IC_64BIT_REXW_OPSIZE, /* 14393 */ IC_XS_OPSIZE, /* 14394 */ IC_64BIT_REXW_XS, /* 14395 */ IC_XD_OPSIZE, /* 14396 */ IC_64BIT_REXW_XD, /* 14397 */ IC_XS_OPSIZE, /* 14398 */ IC_64BIT_REXW_XS, /* 14399 */ IC_VEX, /* 14400 */ IC_VEX, /* 14401 */ IC_VEX_XS, /* 14402 */ IC_VEX_XS, /* 14403 */ IC_VEX_XD, /* 14404 */ IC_VEX_XD, /* 14405 */ IC_VEX_XD, /* 14406 */ IC_VEX_XD, /* 14407 */ IC_VEX_W, /* 14408 */ IC_VEX_W, /* 14409 */ IC_VEX_W_XS, /* 14410 */ IC_VEX_W_XS, /* 14411 */ IC_VEX_W_XD, /* 14412 */ IC_VEX_W_XD, /* 14413 */ IC_VEX_W_XD, /* 14414 */ IC_VEX_W_XD, /* 14415 */ IC_VEX_OPSIZE, /* 14416 */ IC_VEX_OPSIZE, /* 14417 */ IC_VEX_OPSIZE, /* 14418 */ IC_VEX_OPSIZE, /* 14419 */ IC_VEX_OPSIZE, /* 14420 */ IC_VEX_OPSIZE, /* 14421 */ IC_VEX_OPSIZE, /* 14422 */ IC_VEX_OPSIZE, /* 14423 */ IC_VEX_W_OPSIZE, /* 14424 */ IC_VEX_W_OPSIZE, /* 14425 */ IC_VEX_W_OPSIZE, /* 14426 */ IC_VEX_W_OPSIZE, /* 14427 */ IC_VEX_W_OPSIZE, /* 14428 */ IC_VEX_W_OPSIZE, /* 14429 */ IC_VEX_W_OPSIZE, /* 14430 */ IC_VEX_W_OPSIZE, /* 14431 */ IC_VEX, /* 14432 */ IC_VEX, /* 14433 */ IC_VEX_XS, /* 14434 */ IC_VEX_XS, /* 14435 */ IC_VEX_XD, /* 14436 */ IC_VEX_XD, /* 14437 */ IC_VEX_XD, /* 14438 */ IC_VEX_XD, /* 14439 */ IC_VEX_W, /* 14440 */ IC_VEX_W, /* 14441 */ IC_VEX_W_XS, /* 14442 */ IC_VEX_W_XS, /* 14443 */ IC_VEX_W_XD, /* 14444 */ IC_VEX_W_XD, /* 14445 */ IC_VEX_W_XD, /* 14446 */ IC_VEX_W_XD, /* 14447 */ IC_VEX_OPSIZE, /* 14448 */ IC_VEX_OPSIZE, /* 14449 */ IC_VEX_OPSIZE, /* 14450 */ IC_VEX_OPSIZE, /* 14451 */ IC_VEX_OPSIZE, /* 14452 */ IC_VEX_OPSIZE, /* 14453 */ IC_VEX_OPSIZE, /* 14454 */ IC_VEX_OPSIZE, /* 14455 */ IC_VEX_W_OPSIZE, /* 14456 */ IC_VEX_W_OPSIZE, /* 14457 */ IC_VEX_W_OPSIZE, /* 14458 */ IC_VEX_W_OPSIZE, /* 14459 */ IC_VEX_W_OPSIZE, /* 14460 */ IC_VEX_W_OPSIZE, /* 14461 */ IC_VEX_W_OPSIZE, /* 14462 */ IC_VEX_W_OPSIZE, /* 14463 */ IC_VEX_L, /* 14464 */ IC_VEX_L, /* 14465 */ IC_VEX_L_XS, /* 14466 */ IC_VEX_L_XS, /* 14467 */ IC_VEX_L_XD, /* 14468 */ IC_VEX_L_XD, /* 14469 */ IC_VEX_L_XD, /* 14470 */ IC_VEX_L_XD, /* 14471 */ IC_VEX_L_W, /* 14472 */ IC_VEX_L_W, /* 14473 */ IC_VEX_L_W_XS, /* 14474 */ IC_VEX_L_W_XS, /* 14475 */ IC_VEX_L_W_XD, /* 14476 */ IC_VEX_L_W_XD, /* 14477 */ IC_VEX_L_W_XD, /* 14478 */ IC_VEX_L_W_XD, /* 14479 */ IC_VEX_L_OPSIZE, /* 14480 */ IC_VEX_L_OPSIZE, /* 14481 */ IC_VEX_L_OPSIZE, /* 14482 */ IC_VEX_L_OPSIZE, /* 14483 */ IC_VEX_L_OPSIZE, /* 14484 */ IC_VEX_L_OPSIZE, /* 14485 */ IC_VEX_L_OPSIZE, /* 14486 */ IC_VEX_L_OPSIZE, /* 14487 */ IC_VEX_L_W_OPSIZE, /* 14488 */ IC_VEX_L_W_OPSIZE, /* 14489 */ IC_VEX_L_W_OPSIZE, /* 14490 */ IC_VEX_L_W_OPSIZE, /* 14491 */ IC_VEX_L_W_OPSIZE, /* 14492 */ IC_VEX_L_W_OPSIZE, /* 14493 */ IC_VEX_L_W_OPSIZE, /* 14494 */ IC_VEX_L_W_OPSIZE, /* 14495 */ IC_VEX_L, /* 14496 */ IC_VEX_L, /* 14497 */ IC_VEX_L_XS, /* 14498 */ IC_VEX_L_XS, /* 14499 */ IC_VEX_L_XD, /* 14500 */ IC_VEX_L_XD, /* 14501 */ IC_VEX_L_XD, /* 14502 */ IC_VEX_L_XD, /* 14503 */ IC_VEX_L_W, /* 14504 */ IC_VEX_L_W, /* 14505 */ IC_VEX_L_W_XS, /* 14506 */ IC_VEX_L_W_XS, /* 14507 */ IC_VEX_L_W_XD, /* 14508 */ IC_VEX_L_W_XD, /* 14509 */ IC_VEX_L_W_XD, /* 14510 */ IC_VEX_L_W_XD, /* 14511 */ IC_VEX_L_OPSIZE, /* 14512 */ IC_VEX_L_OPSIZE, /* 14513 */ IC_VEX_L_OPSIZE, /* 14514 */ IC_VEX_L_OPSIZE, /* 14515 */ IC_VEX_L_OPSIZE, /* 14516 */ IC_VEX_L_OPSIZE, /* 14517 */ IC_VEX_L_OPSIZE, /* 14518 */ IC_VEX_L_OPSIZE, /* 14519 */ IC_VEX_L_W_OPSIZE, /* 14520 */ IC_VEX_L_W_OPSIZE, /* 14521 */ IC_VEX_L_W_OPSIZE, /* 14522 */ IC_VEX_L_W_OPSIZE, /* 14523 */ IC_VEX_L_W_OPSIZE, /* 14524 */ IC_VEX_L_W_OPSIZE, /* 14525 */ IC_VEX_L_W_OPSIZE, /* 14526 */ IC_VEX_L_W_OPSIZE, /* 14527 */ IC_VEX_L, /* 14528 */ IC_VEX_L, /* 14529 */ IC_VEX_L_XS, /* 14530 */ IC_VEX_L_XS, /* 14531 */ IC_VEX_L_XD, /* 14532 */ IC_VEX_L_XD, /* 14533 */ IC_VEX_L_XD, /* 14534 */ IC_VEX_L_XD, /* 14535 */ IC_VEX_L_W, /* 14536 */ IC_VEX_L_W, /* 14537 */ IC_VEX_L_W_XS, /* 14538 */ IC_VEX_L_W_XS, /* 14539 */ IC_VEX_L_W_XD, /* 14540 */ IC_VEX_L_W_XD, /* 14541 */ IC_VEX_L_W_XD, /* 14542 */ IC_VEX_L_W_XD, /* 14543 */ IC_VEX_L_OPSIZE, /* 14544 */ IC_VEX_L_OPSIZE, /* 14545 */ IC_VEX_L_OPSIZE, /* 14546 */ IC_VEX_L_OPSIZE, /* 14547 */ IC_VEX_L_OPSIZE, /* 14548 */ IC_VEX_L_OPSIZE, /* 14549 */ IC_VEX_L_OPSIZE, /* 14550 */ IC_VEX_L_OPSIZE, /* 14551 */ IC_VEX_L_W_OPSIZE, /* 14552 */ IC_VEX_L_W_OPSIZE, /* 14553 */ IC_VEX_L_W_OPSIZE, /* 14554 */ IC_VEX_L_W_OPSIZE, /* 14555 */ IC_VEX_L_W_OPSIZE, /* 14556 */ IC_VEX_L_W_OPSIZE, /* 14557 */ IC_VEX_L_W_OPSIZE, /* 14558 */ IC_VEX_L_W_OPSIZE, /* 14559 */ IC_VEX_L, /* 14560 */ IC_VEX_L, /* 14561 */ IC_VEX_L_XS, /* 14562 */ IC_VEX_L_XS, /* 14563 */ IC_VEX_L_XD, /* 14564 */ IC_VEX_L_XD, /* 14565 */ IC_VEX_L_XD, /* 14566 */ IC_VEX_L_XD, /* 14567 */ IC_VEX_L_W, /* 14568 */ IC_VEX_L_W, /* 14569 */ IC_VEX_L_W_XS, /* 14570 */ IC_VEX_L_W_XS, /* 14571 */ IC_VEX_L_W_XD, /* 14572 */ IC_VEX_L_W_XD, /* 14573 */ IC_VEX_L_W_XD, /* 14574 */ IC_VEX_L_W_XD, /* 14575 */ IC_VEX_L_OPSIZE, /* 14576 */ IC_VEX_L_OPSIZE, /* 14577 */ IC_VEX_L_OPSIZE, /* 14578 */ IC_VEX_L_OPSIZE, /* 14579 */ IC_VEX_L_OPSIZE, /* 14580 */ IC_VEX_L_OPSIZE, /* 14581 */ IC_VEX_L_OPSIZE, /* 14582 */ IC_VEX_L_OPSIZE, /* 14583 */ IC_VEX_L_W_OPSIZE, /* 14584 */ IC_VEX_L_W_OPSIZE, /* 14585 */ IC_VEX_L_W_OPSIZE, /* 14586 */ IC_VEX_L_W_OPSIZE, /* 14587 */ IC_VEX_L_W_OPSIZE, /* 14588 */ IC_VEX_L_W_OPSIZE, /* 14589 */ IC_VEX_L_W_OPSIZE, /* 14590 */ IC_VEX_L_W_OPSIZE, /* 14591 */ IC_EVEX_KZ_B, /* 14592 */ IC_EVEX_KZ_B, /* 14593 */ IC_EVEX_XS_KZ_B, /* 14594 */ IC_EVEX_XS_KZ_B, /* 14595 */ IC_EVEX_XD_KZ_B, /* 14596 */ IC_EVEX_XD_KZ_B, /* 14597 */ IC_EVEX_XD_KZ_B, /* 14598 */ IC_EVEX_XD_KZ_B, /* 14599 */ IC_EVEX_W_KZ_B, /* 14600 */ IC_EVEX_W_KZ_B, /* 14601 */ IC_EVEX_W_XS_KZ_B, /* 14602 */ IC_EVEX_W_XS_KZ_B, /* 14603 */ IC_EVEX_W_XD_KZ_B, /* 14604 */ IC_EVEX_W_XD_KZ_B, /* 14605 */ IC_EVEX_W_XD_KZ_B, /* 14606 */ IC_EVEX_W_XD_KZ_B, /* 14607 */ IC_EVEX_OPSIZE_KZ_B, /* 14608 */ IC_EVEX_OPSIZE_KZ_B, /* 14609 */ IC_EVEX_OPSIZE_KZ_B, /* 14610 */ IC_EVEX_OPSIZE_KZ_B, /* 14611 */ IC_EVEX_OPSIZE_KZ_B, /* 14612 */ IC_EVEX_OPSIZE_KZ_B, /* 14613 */ IC_EVEX_OPSIZE_KZ_B, /* 14614 */ IC_EVEX_OPSIZE_KZ_B, /* 14615 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14616 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14617 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14618 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14619 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14620 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14621 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14622 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14623 */ IC_EVEX_KZ_B, /* 14624 */ IC_EVEX_KZ_B, /* 14625 */ IC_EVEX_XS_KZ_B, /* 14626 */ IC_EVEX_XS_KZ_B, /* 14627 */ IC_EVEX_XD_KZ_B, /* 14628 */ IC_EVEX_XD_KZ_B, /* 14629 */ IC_EVEX_XD_KZ_B, /* 14630 */ IC_EVEX_XD_KZ_B, /* 14631 */ IC_EVEX_W_KZ_B, /* 14632 */ IC_EVEX_W_KZ_B, /* 14633 */ IC_EVEX_W_XS_KZ_B, /* 14634 */ IC_EVEX_W_XS_KZ_B, /* 14635 */ IC_EVEX_W_XD_KZ_B, /* 14636 */ IC_EVEX_W_XD_KZ_B, /* 14637 */ IC_EVEX_W_XD_KZ_B, /* 14638 */ IC_EVEX_W_XD_KZ_B, /* 14639 */ IC_EVEX_OPSIZE_KZ_B, /* 14640 */ IC_EVEX_OPSIZE_KZ_B, /* 14641 */ IC_EVEX_OPSIZE_KZ_B, /* 14642 */ IC_EVEX_OPSIZE_KZ_B, /* 14643 */ IC_EVEX_OPSIZE_KZ_B, /* 14644 */ IC_EVEX_OPSIZE_KZ_B, /* 14645 */ IC_EVEX_OPSIZE_KZ_B, /* 14646 */ IC_EVEX_OPSIZE_KZ_B, /* 14647 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14648 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14649 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14650 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14651 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14652 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14653 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14654 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14655 */ IC_EVEX_KZ_B, /* 14656 */ IC_EVEX_KZ_B, /* 14657 */ IC_EVEX_XS_KZ_B, /* 14658 */ IC_EVEX_XS_KZ_B, /* 14659 */ IC_EVEX_XD_KZ_B, /* 14660 */ IC_EVEX_XD_KZ_B, /* 14661 */ IC_EVEX_XD_KZ_B, /* 14662 */ IC_EVEX_XD_KZ_B, /* 14663 */ IC_EVEX_W_KZ_B, /* 14664 */ IC_EVEX_W_KZ_B, /* 14665 */ IC_EVEX_W_XS_KZ_B, /* 14666 */ IC_EVEX_W_XS_KZ_B, /* 14667 */ IC_EVEX_W_XD_KZ_B, /* 14668 */ IC_EVEX_W_XD_KZ_B, /* 14669 */ IC_EVEX_W_XD_KZ_B, /* 14670 */ IC_EVEX_W_XD_KZ_B, /* 14671 */ IC_EVEX_OPSIZE_KZ_B, /* 14672 */ IC_EVEX_OPSIZE_KZ_B, /* 14673 */ IC_EVEX_OPSIZE_KZ_B, /* 14674 */ IC_EVEX_OPSIZE_KZ_B, /* 14675 */ IC_EVEX_OPSIZE_KZ_B, /* 14676 */ IC_EVEX_OPSIZE_KZ_B, /* 14677 */ IC_EVEX_OPSIZE_KZ_B, /* 14678 */ IC_EVEX_OPSIZE_KZ_B, /* 14679 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14680 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14681 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14682 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14683 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14684 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14685 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14686 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14687 */ IC_EVEX_KZ_B, /* 14688 */ IC_EVEX_KZ_B, /* 14689 */ IC_EVEX_XS_KZ_B, /* 14690 */ IC_EVEX_XS_KZ_B, /* 14691 */ IC_EVEX_XD_KZ_B, /* 14692 */ IC_EVEX_XD_KZ_B, /* 14693 */ IC_EVEX_XD_KZ_B, /* 14694 */ IC_EVEX_XD_KZ_B, /* 14695 */ IC_EVEX_W_KZ_B, /* 14696 */ IC_EVEX_W_KZ_B, /* 14697 */ IC_EVEX_W_XS_KZ_B, /* 14698 */ IC_EVEX_W_XS_KZ_B, /* 14699 */ IC_EVEX_W_XD_KZ_B, /* 14700 */ IC_EVEX_W_XD_KZ_B, /* 14701 */ IC_EVEX_W_XD_KZ_B, /* 14702 */ IC_EVEX_W_XD_KZ_B, /* 14703 */ IC_EVEX_OPSIZE_KZ_B, /* 14704 */ IC_EVEX_OPSIZE_KZ_B, /* 14705 */ IC_EVEX_OPSIZE_KZ_B, /* 14706 */ IC_EVEX_OPSIZE_KZ_B, /* 14707 */ IC_EVEX_OPSIZE_KZ_B, /* 14708 */ IC_EVEX_OPSIZE_KZ_B, /* 14709 */ IC_EVEX_OPSIZE_KZ_B, /* 14710 */ IC_EVEX_OPSIZE_KZ_B, /* 14711 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14712 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14713 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14714 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14715 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14716 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14717 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14718 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14719 */ IC_EVEX_KZ_B, /* 14720 */ IC_EVEX_KZ_B, /* 14721 */ IC_EVEX_XS_KZ_B, /* 14722 */ IC_EVEX_XS_KZ_B, /* 14723 */ IC_EVEX_XD_KZ_B, /* 14724 */ IC_EVEX_XD_KZ_B, /* 14725 */ IC_EVEX_XD_KZ_B, /* 14726 */ IC_EVEX_XD_KZ_B, /* 14727 */ IC_EVEX_W_KZ_B, /* 14728 */ IC_EVEX_W_KZ_B, /* 14729 */ IC_EVEX_W_XS_KZ_B, /* 14730 */ IC_EVEX_W_XS_KZ_B, /* 14731 */ IC_EVEX_W_XD_KZ_B, /* 14732 */ IC_EVEX_W_XD_KZ_B, /* 14733 */ IC_EVEX_W_XD_KZ_B, /* 14734 */ IC_EVEX_W_XD_KZ_B, /* 14735 */ IC_EVEX_OPSIZE_KZ_B, /* 14736 */ IC_EVEX_OPSIZE_KZ_B, /* 14737 */ IC_EVEX_OPSIZE_KZ_B, /* 14738 */ IC_EVEX_OPSIZE_KZ_B, /* 14739 */ IC_EVEX_OPSIZE_KZ_B, /* 14740 */ IC_EVEX_OPSIZE_KZ_B, /* 14741 */ IC_EVEX_OPSIZE_KZ_B, /* 14742 */ IC_EVEX_OPSIZE_KZ_B, /* 14743 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14744 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14745 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14746 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14747 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14748 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14749 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14750 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14751 */ IC_EVEX_KZ_B, /* 14752 */ IC_EVEX_KZ_B, /* 14753 */ IC_EVEX_XS_KZ_B, /* 14754 */ IC_EVEX_XS_KZ_B, /* 14755 */ IC_EVEX_XD_KZ_B, /* 14756 */ IC_EVEX_XD_KZ_B, /* 14757 */ IC_EVEX_XD_KZ_B, /* 14758 */ IC_EVEX_XD_KZ_B, /* 14759 */ IC_EVEX_W_KZ_B, /* 14760 */ IC_EVEX_W_KZ_B, /* 14761 */ IC_EVEX_W_XS_KZ_B, /* 14762 */ IC_EVEX_W_XS_KZ_B, /* 14763 */ IC_EVEX_W_XD_KZ_B, /* 14764 */ IC_EVEX_W_XD_KZ_B, /* 14765 */ IC_EVEX_W_XD_KZ_B, /* 14766 */ IC_EVEX_W_XD_KZ_B, /* 14767 */ IC_EVEX_OPSIZE_KZ_B, /* 14768 */ IC_EVEX_OPSIZE_KZ_B, /* 14769 */ IC_EVEX_OPSIZE_KZ_B, /* 14770 */ IC_EVEX_OPSIZE_KZ_B, /* 14771 */ IC_EVEX_OPSIZE_KZ_B, /* 14772 */ IC_EVEX_OPSIZE_KZ_B, /* 14773 */ IC_EVEX_OPSIZE_KZ_B, /* 14774 */ IC_EVEX_OPSIZE_KZ_B, /* 14775 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14776 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14777 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14778 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14779 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14780 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14781 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14782 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14783 */ IC_EVEX_KZ_B, /* 14784 */ IC_EVEX_KZ_B, /* 14785 */ IC_EVEX_XS_KZ_B, /* 14786 */ IC_EVEX_XS_KZ_B, /* 14787 */ IC_EVEX_XD_KZ_B, /* 14788 */ IC_EVEX_XD_KZ_B, /* 14789 */ IC_EVEX_XD_KZ_B, /* 14790 */ IC_EVEX_XD_KZ_B, /* 14791 */ IC_EVEX_W_KZ_B, /* 14792 */ IC_EVEX_W_KZ_B, /* 14793 */ IC_EVEX_W_XS_KZ_B, /* 14794 */ IC_EVEX_W_XS_KZ_B, /* 14795 */ IC_EVEX_W_XD_KZ_B, /* 14796 */ IC_EVEX_W_XD_KZ_B, /* 14797 */ IC_EVEX_W_XD_KZ_B, /* 14798 */ IC_EVEX_W_XD_KZ_B, /* 14799 */ IC_EVEX_OPSIZE_KZ_B, /* 14800 */ IC_EVEX_OPSIZE_KZ_B, /* 14801 */ IC_EVEX_OPSIZE_KZ_B, /* 14802 */ IC_EVEX_OPSIZE_KZ_B, /* 14803 */ IC_EVEX_OPSIZE_KZ_B, /* 14804 */ IC_EVEX_OPSIZE_KZ_B, /* 14805 */ IC_EVEX_OPSIZE_KZ_B, /* 14806 */ IC_EVEX_OPSIZE_KZ_B, /* 14807 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14808 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14809 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14810 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14811 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14812 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14813 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14814 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14815 */ IC_EVEX_KZ_B, /* 14816 */ IC_EVEX_KZ_B, /* 14817 */ IC_EVEX_XS_KZ_B, /* 14818 */ IC_EVEX_XS_KZ_B, /* 14819 */ IC_EVEX_XD_KZ_B, /* 14820 */ IC_EVEX_XD_KZ_B, /* 14821 */ IC_EVEX_XD_KZ_B, /* 14822 */ IC_EVEX_XD_KZ_B, /* 14823 */ IC_EVEX_W_KZ_B, /* 14824 */ IC_EVEX_W_KZ_B, /* 14825 */ IC_EVEX_W_XS_KZ_B, /* 14826 */ IC_EVEX_W_XS_KZ_B, /* 14827 */ IC_EVEX_W_XD_KZ_B, /* 14828 */ IC_EVEX_W_XD_KZ_B, /* 14829 */ IC_EVEX_W_XD_KZ_B, /* 14830 */ IC_EVEX_W_XD_KZ_B, /* 14831 */ IC_EVEX_OPSIZE_KZ_B, /* 14832 */ IC_EVEX_OPSIZE_KZ_B, /* 14833 */ IC_EVEX_OPSIZE_KZ_B, /* 14834 */ IC_EVEX_OPSIZE_KZ_B, /* 14835 */ IC_EVEX_OPSIZE_KZ_B, /* 14836 */ IC_EVEX_OPSIZE_KZ_B, /* 14837 */ IC_EVEX_OPSIZE_KZ_B, /* 14838 */ IC_EVEX_OPSIZE_KZ_B, /* 14839 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14840 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14841 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14842 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14843 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14844 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14845 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14846 */ IC_EVEX_W_OPSIZE_KZ_B, /* 14847 */ IC, /* 14848 */ IC_64BIT, /* 14849 */ IC_XS, /* 14850 */ IC_64BIT_XS, /* 14851 */ IC_XD, /* 14852 */ IC_64BIT_XD, /* 14853 */ IC_XS, /* 14854 */ IC_64BIT_XS, /* 14855 */ IC, /* 14856 */ IC_64BIT_REXW, /* 14857 */ IC_XS, /* 14858 */ IC_64BIT_REXW_XS, /* 14859 */ IC_XD, /* 14860 */ IC_64BIT_REXW_XD, /* 14861 */ IC_XS, /* 14862 */ IC_64BIT_REXW_XS, /* 14863 */ IC_OPSIZE, /* 14864 */ IC_64BIT_OPSIZE, /* 14865 */ IC_XS_OPSIZE, /* 14866 */ IC_64BIT_XS_OPSIZE, /* 14867 */ IC_XD_OPSIZE, /* 14868 */ IC_64BIT_XD_OPSIZE, /* 14869 */ IC_XS_OPSIZE, /* 14870 */ IC_64BIT_XD_OPSIZE, /* 14871 */ IC_OPSIZE, /* 14872 */ IC_64BIT_REXW_OPSIZE, /* 14873 */ IC_XS_OPSIZE, /* 14874 */ IC_64BIT_REXW_XS, /* 14875 */ IC_XD_OPSIZE, /* 14876 */ IC_64BIT_REXW_XD, /* 14877 */ IC_XS_OPSIZE, /* 14878 */ IC_64BIT_REXW_XS, /* 14879 */ IC_ADSIZE, /* 14880 */ IC_64BIT_ADSIZE, /* 14881 */ IC_XS, /* 14882 */ IC_64BIT_XS, /* 14883 */ IC_XD, /* 14884 */ IC_64BIT_XD, /* 14885 */ IC_XS, /* 14886 */ IC_64BIT_XS, /* 14887 */ IC_ADSIZE, /* 14888 */ IC_64BIT_REXW_ADSIZE, /* 14889 */ IC_XS, /* 14890 */ IC_64BIT_REXW_XS, /* 14891 */ IC_XD, /* 14892 */ IC_64BIT_REXW_XD, /* 14893 */ IC_XS, /* 14894 */ IC_64BIT_REXW_XS, /* 14895 */ IC_OPSIZE_ADSIZE, /* 14896 */ IC_64BIT_OPSIZE_ADSIZE, /* 14897 */ IC_XS_OPSIZE, /* 14898 */ IC_64BIT_XS_OPSIZE, /* 14899 */ IC_XD_OPSIZE, /* 14900 */ IC_64BIT_XD_OPSIZE, /* 14901 */ IC_XS_OPSIZE, /* 14902 */ IC_64BIT_XD_OPSIZE, /* 14903 */ IC_OPSIZE_ADSIZE, /* 14904 */ IC_64BIT_REXW_OPSIZE, /* 14905 */ IC_XS_OPSIZE, /* 14906 */ IC_64BIT_REXW_XS, /* 14907 */ IC_XD_OPSIZE, /* 14908 */ IC_64BIT_REXW_XD, /* 14909 */ IC_XS_OPSIZE, /* 14910 */ IC_64BIT_REXW_XS, /* 14911 */ IC_VEX, /* 14912 */ IC_VEX, /* 14913 */ IC_VEX_XS, /* 14914 */ IC_VEX_XS, /* 14915 */ IC_VEX_XD, /* 14916 */ IC_VEX_XD, /* 14917 */ IC_VEX_XD, /* 14918 */ IC_VEX_XD, /* 14919 */ IC_VEX_W, /* 14920 */ IC_VEX_W, /* 14921 */ IC_VEX_W_XS, /* 14922 */ IC_VEX_W_XS, /* 14923 */ IC_VEX_W_XD, /* 14924 */ IC_VEX_W_XD, /* 14925 */ IC_VEX_W_XD, /* 14926 */ IC_VEX_W_XD, /* 14927 */ IC_VEX_OPSIZE, /* 14928 */ IC_VEX_OPSIZE, /* 14929 */ IC_VEX_OPSIZE, /* 14930 */ IC_VEX_OPSIZE, /* 14931 */ IC_VEX_OPSIZE, /* 14932 */ IC_VEX_OPSIZE, /* 14933 */ IC_VEX_OPSIZE, /* 14934 */ IC_VEX_OPSIZE, /* 14935 */ IC_VEX_W_OPSIZE, /* 14936 */ IC_VEX_W_OPSIZE, /* 14937 */ IC_VEX_W_OPSIZE, /* 14938 */ IC_VEX_W_OPSIZE, /* 14939 */ IC_VEX_W_OPSIZE, /* 14940 */ IC_VEX_W_OPSIZE, /* 14941 */ IC_VEX_W_OPSIZE, /* 14942 */ IC_VEX_W_OPSIZE, /* 14943 */ IC_VEX, /* 14944 */ IC_VEX, /* 14945 */ IC_VEX_XS, /* 14946 */ IC_VEX_XS, /* 14947 */ IC_VEX_XD, /* 14948 */ IC_VEX_XD, /* 14949 */ IC_VEX_XD, /* 14950 */ IC_VEX_XD, /* 14951 */ IC_VEX_W, /* 14952 */ IC_VEX_W, /* 14953 */ IC_VEX_W_XS, /* 14954 */ IC_VEX_W_XS, /* 14955 */ IC_VEX_W_XD, /* 14956 */ IC_VEX_W_XD, /* 14957 */ IC_VEX_W_XD, /* 14958 */ IC_VEX_W_XD, /* 14959 */ IC_VEX_OPSIZE, /* 14960 */ IC_VEX_OPSIZE, /* 14961 */ IC_VEX_OPSIZE, /* 14962 */ IC_VEX_OPSIZE, /* 14963 */ IC_VEX_OPSIZE, /* 14964 */ IC_VEX_OPSIZE, /* 14965 */ IC_VEX_OPSIZE, /* 14966 */ IC_VEX_OPSIZE, /* 14967 */ IC_VEX_W_OPSIZE, /* 14968 */ IC_VEX_W_OPSIZE, /* 14969 */ IC_VEX_W_OPSIZE, /* 14970 */ IC_VEX_W_OPSIZE, /* 14971 */ IC_VEX_W_OPSIZE, /* 14972 */ IC_VEX_W_OPSIZE, /* 14973 */ IC_VEX_W_OPSIZE, /* 14974 */ IC_VEX_W_OPSIZE, /* 14975 */ IC_VEX_L, /* 14976 */ IC_VEX_L, /* 14977 */ IC_VEX_L_XS, /* 14978 */ IC_VEX_L_XS, /* 14979 */ IC_VEX_L_XD, /* 14980 */ IC_VEX_L_XD, /* 14981 */ IC_VEX_L_XD, /* 14982 */ IC_VEX_L_XD, /* 14983 */ IC_VEX_L_W, /* 14984 */ IC_VEX_L_W, /* 14985 */ IC_VEX_L_W_XS, /* 14986 */ IC_VEX_L_W_XS, /* 14987 */ IC_VEX_L_W_XD, /* 14988 */ IC_VEX_L_W_XD, /* 14989 */ IC_VEX_L_W_XD, /* 14990 */ IC_VEX_L_W_XD, /* 14991 */ IC_VEX_L_OPSIZE, /* 14992 */ IC_VEX_L_OPSIZE, /* 14993 */ IC_VEX_L_OPSIZE, /* 14994 */ IC_VEX_L_OPSIZE, /* 14995 */ IC_VEX_L_OPSIZE, /* 14996 */ IC_VEX_L_OPSIZE, /* 14997 */ IC_VEX_L_OPSIZE, /* 14998 */ IC_VEX_L_OPSIZE, /* 14999 */ IC_VEX_L_W_OPSIZE, /* 15000 */ IC_VEX_L_W_OPSIZE, /* 15001 */ IC_VEX_L_W_OPSIZE, /* 15002 */ IC_VEX_L_W_OPSIZE, /* 15003 */ IC_VEX_L_W_OPSIZE, /* 15004 */ IC_VEX_L_W_OPSIZE, /* 15005 */ IC_VEX_L_W_OPSIZE, /* 15006 */ IC_VEX_L_W_OPSIZE, /* 15007 */ IC_VEX_L, /* 15008 */ IC_VEX_L, /* 15009 */ IC_VEX_L_XS, /* 15010 */ IC_VEX_L_XS, /* 15011 */ IC_VEX_L_XD, /* 15012 */ IC_VEX_L_XD, /* 15013 */ IC_VEX_L_XD, /* 15014 */ IC_VEX_L_XD, /* 15015 */ IC_VEX_L_W, /* 15016 */ IC_VEX_L_W, /* 15017 */ IC_VEX_L_W_XS, /* 15018 */ IC_VEX_L_W_XS, /* 15019 */ IC_VEX_L_W_XD, /* 15020 */ IC_VEX_L_W_XD, /* 15021 */ IC_VEX_L_W_XD, /* 15022 */ IC_VEX_L_W_XD, /* 15023 */ IC_VEX_L_OPSIZE, /* 15024 */ IC_VEX_L_OPSIZE, /* 15025 */ IC_VEX_L_OPSIZE, /* 15026 */ IC_VEX_L_OPSIZE, /* 15027 */ IC_VEX_L_OPSIZE, /* 15028 */ IC_VEX_L_OPSIZE, /* 15029 */ IC_VEX_L_OPSIZE, /* 15030 */ IC_VEX_L_OPSIZE, /* 15031 */ IC_VEX_L_W_OPSIZE, /* 15032 */ IC_VEX_L_W_OPSIZE, /* 15033 */ IC_VEX_L_W_OPSIZE, /* 15034 */ IC_VEX_L_W_OPSIZE, /* 15035 */ IC_VEX_L_W_OPSIZE, /* 15036 */ IC_VEX_L_W_OPSIZE, /* 15037 */ IC_VEX_L_W_OPSIZE, /* 15038 */ IC_VEX_L_W_OPSIZE, /* 15039 */ IC_VEX_L, /* 15040 */ IC_VEX_L, /* 15041 */ IC_VEX_L_XS, /* 15042 */ IC_VEX_L_XS, /* 15043 */ IC_VEX_L_XD, /* 15044 */ IC_VEX_L_XD, /* 15045 */ IC_VEX_L_XD, /* 15046 */ IC_VEX_L_XD, /* 15047 */ IC_VEX_L_W, /* 15048 */ IC_VEX_L_W, /* 15049 */ IC_VEX_L_W_XS, /* 15050 */ IC_VEX_L_W_XS, /* 15051 */ IC_VEX_L_W_XD, /* 15052 */ IC_VEX_L_W_XD, /* 15053 */ IC_VEX_L_W_XD, /* 15054 */ IC_VEX_L_W_XD, /* 15055 */ IC_VEX_L_OPSIZE, /* 15056 */ IC_VEX_L_OPSIZE, /* 15057 */ IC_VEX_L_OPSIZE, /* 15058 */ IC_VEX_L_OPSIZE, /* 15059 */ IC_VEX_L_OPSIZE, /* 15060 */ IC_VEX_L_OPSIZE, /* 15061 */ IC_VEX_L_OPSIZE, /* 15062 */ IC_VEX_L_OPSIZE, /* 15063 */ IC_VEX_L_W_OPSIZE, /* 15064 */ IC_VEX_L_W_OPSIZE, /* 15065 */ IC_VEX_L_W_OPSIZE, /* 15066 */ IC_VEX_L_W_OPSIZE, /* 15067 */ IC_VEX_L_W_OPSIZE, /* 15068 */ IC_VEX_L_W_OPSIZE, /* 15069 */ IC_VEX_L_W_OPSIZE, /* 15070 */ IC_VEX_L_W_OPSIZE, /* 15071 */ IC_VEX_L, /* 15072 */ IC_VEX_L, /* 15073 */ IC_VEX_L_XS, /* 15074 */ IC_VEX_L_XS, /* 15075 */ IC_VEX_L_XD, /* 15076 */ IC_VEX_L_XD, /* 15077 */ IC_VEX_L_XD, /* 15078 */ IC_VEX_L_XD, /* 15079 */ IC_VEX_L_W, /* 15080 */ IC_VEX_L_W, /* 15081 */ IC_VEX_L_W_XS, /* 15082 */ IC_VEX_L_W_XS, /* 15083 */ IC_VEX_L_W_XD, /* 15084 */ IC_VEX_L_W_XD, /* 15085 */ IC_VEX_L_W_XD, /* 15086 */ IC_VEX_L_W_XD, /* 15087 */ IC_VEX_L_OPSIZE, /* 15088 */ IC_VEX_L_OPSIZE, /* 15089 */ IC_VEX_L_OPSIZE, /* 15090 */ IC_VEX_L_OPSIZE, /* 15091 */ IC_VEX_L_OPSIZE, /* 15092 */ IC_VEX_L_OPSIZE, /* 15093 */ IC_VEX_L_OPSIZE, /* 15094 */ IC_VEX_L_OPSIZE, /* 15095 */ IC_VEX_L_W_OPSIZE, /* 15096 */ IC_VEX_L_W_OPSIZE, /* 15097 */ IC_VEX_L_W_OPSIZE, /* 15098 */ IC_VEX_L_W_OPSIZE, /* 15099 */ IC_VEX_L_W_OPSIZE, /* 15100 */ IC_VEX_L_W_OPSIZE, /* 15101 */ IC_VEX_L_W_OPSIZE, /* 15102 */ IC_VEX_L_W_OPSIZE, /* 15103 */ IC_EVEX_L_KZ_B, /* 15104 */ IC_EVEX_L_KZ_B, /* 15105 */ IC_EVEX_L_XS_KZ_B, /* 15106 */ IC_EVEX_L_XS_KZ_B, /* 15107 */ IC_EVEX_L_XD_KZ_B, /* 15108 */ IC_EVEX_L_XD_KZ_B, /* 15109 */ IC_EVEX_L_XD_KZ_B, /* 15110 */ IC_EVEX_L_XD_KZ_B, /* 15111 */ IC_EVEX_L_W_KZ_B, /* 15112 */ IC_EVEX_L_W_KZ_B, /* 15113 */ IC_EVEX_L_W_XS_KZ_B, /* 15114 */ IC_EVEX_L_W_XS_KZ_B, /* 15115 */ IC_EVEX_L_W_XD_KZ_B, /* 15116 */ IC_EVEX_L_W_XD_KZ_B, /* 15117 */ IC_EVEX_L_W_XD_KZ_B, /* 15118 */ IC_EVEX_L_W_XD_KZ_B, /* 15119 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15120 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15121 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15122 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15123 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15124 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15125 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15126 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15127 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15128 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15129 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15130 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15131 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15132 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15133 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15134 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15135 */ IC_EVEX_L_KZ_B, /* 15136 */ IC_EVEX_L_KZ_B, /* 15137 */ IC_EVEX_L_XS_KZ_B, /* 15138 */ IC_EVEX_L_XS_KZ_B, /* 15139 */ IC_EVEX_L_XD_KZ_B, /* 15140 */ IC_EVEX_L_XD_KZ_B, /* 15141 */ IC_EVEX_L_XD_KZ_B, /* 15142 */ IC_EVEX_L_XD_KZ_B, /* 15143 */ IC_EVEX_L_W_KZ_B, /* 15144 */ IC_EVEX_L_W_KZ_B, /* 15145 */ IC_EVEX_L_W_XS_KZ_B, /* 15146 */ IC_EVEX_L_W_XS_KZ_B, /* 15147 */ IC_EVEX_L_W_XD_KZ_B, /* 15148 */ IC_EVEX_L_W_XD_KZ_B, /* 15149 */ IC_EVEX_L_W_XD_KZ_B, /* 15150 */ IC_EVEX_L_W_XD_KZ_B, /* 15151 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15152 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15153 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15154 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15155 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15156 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15157 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15158 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15159 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15160 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15161 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15162 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15163 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15164 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15165 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15166 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15167 */ IC_EVEX_L_KZ_B, /* 15168 */ IC_EVEX_L_KZ_B, /* 15169 */ IC_EVEX_L_XS_KZ_B, /* 15170 */ IC_EVEX_L_XS_KZ_B, /* 15171 */ IC_EVEX_L_XD_KZ_B, /* 15172 */ IC_EVEX_L_XD_KZ_B, /* 15173 */ IC_EVEX_L_XD_KZ_B, /* 15174 */ IC_EVEX_L_XD_KZ_B, /* 15175 */ IC_EVEX_L_W_KZ_B, /* 15176 */ IC_EVEX_L_W_KZ_B, /* 15177 */ IC_EVEX_L_W_XS_KZ_B, /* 15178 */ IC_EVEX_L_W_XS_KZ_B, /* 15179 */ IC_EVEX_L_W_XD_KZ_B, /* 15180 */ IC_EVEX_L_W_XD_KZ_B, /* 15181 */ IC_EVEX_L_W_XD_KZ_B, /* 15182 */ IC_EVEX_L_W_XD_KZ_B, /* 15183 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15184 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15185 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15186 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15187 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15188 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15189 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15190 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15191 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15192 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15193 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15194 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15195 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15196 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15197 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15198 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15199 */ IC_EVEX_L_KZ_B, /* 15200 */ IC_EVEX_L_KZ_B, /* 15201 */ IC_EVEX_L_XS_KZ_B, /* 15202 */ IC_EVEX_L_XS_KZ_B, /* 15203 */ IC_EVEX_L_XD_KZ_B, /* 15204 */ IC_EVEX_L_XD_KZ_B, /* 15205 */ IC_EVEX_L_XD_KZ_B, /* 15206 */ IC_EVEX_L_XD_KZ_B, /* 15207 */ IC_EVEX_L_W_KZ_B, /* 15208 */ IC_EVEX_L_W_KZ_B, /* 15209 */ IC_EVEX_L_W_XS_KZ_B, /* 15210 */ IC_EVEX_L_W_XS_KZ_B, /* 15211 */ IC_EVEX_L_W_XD_KZ_B, /* 15212 */ IC_EVEX_L_W_XD_KZ_B, /* 15213 */ IC_EVEX_L_W_XD_KZ_B, /* 15214 */ IC_EVEX_L_W_XD_KZ_B, /* 15215 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15216 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15217 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15218 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15219 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15220 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15221 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15222 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15223 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15224 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15225 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15226 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15227 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15228 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15229 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15230 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15231 */ IC_EVEX_L_KZ_B, /* 15232 */ IC_EVEX_L_KZ_B, /* 15233 */ IC_EVEX_L_XS_KZ_B, /* 15234 */ IC_EVEX_L_XS_KZ_B, /* 15235 */ IC_EVEX_L_XD_KZ_B, /* 15236 */ IC_EVEX_L_XD_KZ_B, /* 15237 */ IC_EVEX_L_XD_KZ_B, /* 15238 */ IC_EVEX_L_XD_KZ_B, /* 15239 */ IC_EVEX_L_W_KZ_B, /* 15240 */ IC_EVEX_L_W_KZ_B, /* 15241 */ IC_EVEX_L_W_XS_KZ_B, /* 15242 */ IC_EVEX_L_W_XS_KZ_B, /* 15243 */ IC_EVEX_L_W_XD_KZ_B, /* 15244 */ IC_EVEX_L_W_XD_KZ_B, /* 15245 */ IC_EVEX_L_W_XD_KZ_B, /* 15246 */ IC_EVEX_L_W_XD_KZ_B, /* 15247 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15248 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15249 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15250 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15251 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15252 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15253 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15254 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15255 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15256 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15257 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15258 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15259 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15260 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15261 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15262 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15263 */ IC_EVEX_L_KZ_B, /* 15264 */ IC_EVEX_L_KZ_B, /* 15265 */ IC_EVEX_L_XS_KZ_B, /* 15266 */ IC_EVEX_L_XS_KZ_B, /* 15267 */ IC_EVEX_L_XD_KZ_B, /* 15268 */ IC_EVEX_L_XD_KZ_B, /* 15269 */ IC_EVEX_L_XD_KZ_B, /* 15270 */ IC_EVEX_L_XD_KZ_B, /* 15271 */ IC_EVEX_L_W_KZ_B, /* 15272 */ IC_EVEX_L_W_KZ_B, /* 15273 */ IC_EVEX_L_W_XS_KZ_B, /* 15274 */ IC_EVEX_L_W_XS_KZ_B, /* 15275 */ IC_EVEX_L_W_XD_KZ_B, /* 15276 */ IC_EVEX_L_W_XD_KZ_B, /* 15277 */ IC_EVEX_L_W_XD_KZ_B, /* 15278 */ IC_EVEX_L_W_XD_KZ_B, /* 15279 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15280 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15281 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15282 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15283 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15284 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15285 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15286 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15287 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15288 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15289 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15290 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15291 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15292 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15293 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15294 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15295 */ IC_EVEX_L_KZ_B, /* 15296 */ IC_EVEX_L_KZ_B, /* 15297 */ IC_EVEX_L_XS_KZ_B, /* 15298 */ IC_EVEX_L_XS_KZ_B, /* 15299 */ IC_EVEX_L_XD_KZ_B, /* 15300 */ IC_EVEX_L_XD_KZ_B, /* 15301 */ IC_EVEX_L_XD_KZ_B, /* 15302 */ IC_EVEX_L_XD_KZ_B, /* 15303 */ IC_EVEX_L_W_KZ_B, /* 15304 */ IC_EVEX_L_W_KZ_B, /* 15305 */ IC_EVEX_L_W_XS_KZ_B, /* 15306 */ IC_EVEX_L_W_XS_KZ_B, /* 15307 */ IC_EVEX_L_W_XD_KZ_B, /* 15308 */ IC_EVEX_L_W_XD_KZ_B, /* 15309 */ IC_EVEX_L_W_XD_KZ_B, /* 15310 */ IC_EVEX_L_W_XD_KZ_B, /* 15311 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15312 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15313 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15314 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15315 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15316 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15317 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15318 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15319 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15320 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15321 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15322 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15323 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15324 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15325 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15326 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15327 */ IC_EVEX_L_KZ_B, /* 15328 */ IC_EVEX_L_KZ_B, /* 15329 */ IC_EVEX_L_XS_KZ_B, /* 15330 */ IC_EVEX_L_XS_KZ_B, /* 15331 */ IC_EVEX_L_XD_KZ_B, /* 15332 */ IC_EVEX_L_XD_KZ_B, /* 15333 */ IC_EVEX_L_XD_KZ_B, /* 15334 */ IC_EVEX_L_XD_KZ_B, /* 15335 */ IC_EVEX_L_W_KZ_B, /* 15336 */ IC_EVEX_L_W_KZ_B, /* 15337 */ IC_EVEX_L_W_XS_KZ_B, /* 15338 */ IC_EVEX_L_W_XS_KZ_B, /* 15339 */ IC_EVEX_L_W_XD_KZ_B, /* 15340 */ IC_EVEX_L_W_XD_KZ_B, /* 15341 */ IC_EVEX_L_W_XD_KZ_B, /* 15342 */ IC_EVEX_L_W_XD_KZ_B, /* 15343 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15344 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15345 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15346 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15347 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15348 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15349 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15350 */ IC_EVEX_L_OPSIZE_KZ_B, /* 15351 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15352 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15353 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15354 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15355 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15356 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15357 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15358 */ IC_EVEX_L_W_OPSIZE_KZ_B, /* 15359 */ IC, /* 15360 */ IC_64BIT, /* 15361 */ IC_XS, /* 15362 */ IC_64BIT_XS, /* 15363 */ IC_XD, /* 15364 */ IC_64BIT_XD, /* 15365 */ IC_XS, /* 15366 */ IC_64BIT_XS, /* 15367 */ IC, /* 15368 */ IC_64BIT_REXW, /* 15369 */ IC_XS, /* 15370 */ IC_64BIT_REXW_XS, /* 15371 */ IC_XD, /* 15372 */ IC_64BIT_REXW_XD, /* 15373 */ IC_XS, /* 15374 */ IC_64BIT_REXW_XS, /* 15375 */ IC_OPSIZE, /* 15376 */ IC_64BIT_OPSIZE, /* 15377 */ IC_XS_OPSIZE, /* 15378 */ IC_64BIT_XS_OPSIZE, /* 15379 */ IC_XD_OPSIZE, /* 15380 */ IC_64BIT_XD_OPSIZE, /* 15381 */ IC_XS_OPSIZE, /* 15382 */ IC_64BIT_XD_OPSIZE, /* 15383 */ IC_OPSIZE, /* 15384 */ IC_64BIT_REXW_OPSIZE, /* 15385 */ IC_XS_OPSIZE, /* 15386 */ IC_64BIT_REXW_XS, /* 15387 */ IC_XD_OPSIZE, /* 15388 */ IC_64BIT_REXW_XD, /* 15389 */ IC_XS_OPSIZE, /* 15390 */ IC_64BIT_REXW_XS, /* 15391 */ IC_ADSIZE, /* 15392 */ IC_64BIT_ADSIZE, /* 15393 */ IC_XS, /* 15394 */ IC_64BIT_XS, /* 15395 */ IC_XD, /* 15396 */ IC_64BIT_XD, /* 15397 */ IC_XS, /* 15398 */ IC_64BIT_XS, /* 15399 */ IC_ADSIZE, /* 15400 */ IC_64BIT_REXW_ADSIZE, /* 15401 */ IC_XS, /* 15402 */ IC_64BIT_REXW_XS, /* 15403 */ IC_XD, /* 15404 */ IC_64BIT_REXW_XD, /* 15405 */ IC_XS, /* 15406 */ IC_64BIT_REXW_XS, /* 15407 */ IC_OPSIZE_ADSIZE, /* 15408 */ IC_64BIT_OPSIZE_ADSIZE, /* 15409 */ IC_XS_OPSIZE, /* 15410 */ IC_64BIT_XS_OPSIZE, /* 15411 */ IC_XD_OPSIZE, /* 15412 */ IC_64BIT_XD_OPSIZE, /* 15413 */ IC_XS_OPSIZE, /* 15414 */ IC_64BIT_XD_OPSIZE, /* 15415 */ IC_OPSIZE_ADSIZE, /* 15416 */ IC_64BIT_REXW_OPSIZE, /* 15417 */ IC_XS_OPSIZE, /* 15418 */ IC_64BIT_REXW_XS, /* 15419 */ IC_XD_OPSIZE, /* 15420 */ IC_64BIT_REXW_XD, /* 15421 */ IC_XS_OPSIZE, /* 15422 */ IC_64BIT_REXW_XS, /* 15423 */ IC_VEX, /* 15424 */ IC_VEX, /* 15425 */ IC_VEX_XS, /* 15426 */ IC_VEX_XS, /* 15427 */ IC_VEX_XD, /* 15428 */ IC_VEX_XD, /* 15429 */ IC_VEX_XD, /* 15430 */ IC_VEX_XD, /* 15431 */ IC_VEX_W, /* 15432 */ IC_VEX_W, /* 15433 */ IC_VEX_W_XS, /* 15434 */ IC_VEX_W_XS, /* 15435 */ IC_VEX_W_XD, /* 15436 */ IC_VEX_W_XD, /* 15437 */ IC_VEX_W_XD, /* 15438 */ IC_VEX_W_XD, /* 15439 */ IC_VEX_OPSIZE, /* 15440 */ IC_VEX_OPSIZE, /* 15441 */ IC_VEX_OPSIZE, /* 15442 */ IC_VEX_OPSIZE, /* 15443 */ IC_VEX_OPSIZE, /* 15444 */ IC_VEX_OPSIZE, /* 15445 */ IC_VEX_OPSIZE, /* 15446 */ IC_VEX_OPSIZE, /* 15447 */ IC_VEX_W_OPSIZE, /* 15448 */ IC_VEX_W_OPSIZE, /* 15449 */ IC_VEX_W_OPSIZE, /* 15450 */ IC_VEX_W_OPSIZE, /* 15451 */ IC_VEX_W_OPSIZE, /* 15452 */ IC_VEX_W_OPSIZE, /* 15453 */ IC_VEX_W_OPSIZE, /* 15454 */ IC_VEX_W_OPSIZE, /* 15455 */ IC_VEX, /* 15456 */ IC_VEX, /* 15457 */ IC_VEX_XS, /* 15458 */ IC_VEX_XS, /* 15459 */ IC_VEX_XD, /* 15460 */ IC_VEX_XD, /* 15461 */ IC_VEX_XD, /* 15462 */ IC_VEX_XD, /* 15463 */ IC_VEX_W, /* 15464 */ IC_VEX_W, /* 15465 */ IC_VEX_W_XS, /* 15466 */ IC_VEX_W_XS, /* 15467 */ IC_VEX_W_XD, /* 15468 */ IC_VEX_W_XD, /* 15469 */ IC_VEX_W_XD, /* 15470 */ IC_VEX_W_XD, /* 15471 */ IC_VEX_OPSIZE, /* 15472 */ IC_VEX_OPSIZE, /* 15473 */ IC_VEX_OPSIZE, /* 15474 */ IC_VEX_OPSIZE, /* 15475 */ IC_VEX_OPSIZE, /* 15476 */ IC_VEX_OPSIZE, /* 15477 */ IC_VEX_OPSIZE, /* 15478 */ IC_VEX_OPSIZE, /* 15479 */ IC_VEX_W_OPSIZE, /* 15480 */ IC_VEX_W_OPSIZE, /* 15481 */ IC_VEX_W_OPSIZE, /* 15482 */ IC_VEX_W_OPSIZE, /* 15483 */ IC_VEX_W_OPSIZE, /* 15484 */ IC_VEX_W_OPSIZE, /* 15485 */ IC_VEX_W_OPSIZE, /* 15486 */ IC_VEX_W_OPSIZE, /* 15487 */ IC_VEX_L, /* 15488 */ IC_VEX_L, /* 15489 */ IC_VEX_L_XS, /* 15490 */ IC_VEX_L_XS, /* 15491 */ IC_VEX_L_XD, /* 15492 */ IC_VEX_L_XD, /* 15493 */ IC_VEX_L_XD, /* 15494 */ IC_VEX_L_XD, /* 15495 */ IC_VEX_L_W, /* 15496 */ IC_VEX_L_W, /* 15497 */ IC_VEX_L_W_XS, /* 15498 */ IC_VEX_L_W_XS, /* 15499 */ IC_VEX_L_W_XD, /* 15500 */ IC_VEX_L_W_XD, /* 15501 */ IC_VEX_L_W_XD, /* 15502 */ IC_VEX_L_W_XD, /* 15503 */ IC_VEX_L_OPSIZE, /* 15504 */ IC_VEX_L_OPSIZE, /* 15505 */ IC_VEX_L_OPSIZE, /* 15506 */ IC_VEX_L_OPSIZE, /* 15507 */ IC_VEX_L_OPSIZE, /* 15508 */ IC_VEX_L_OPSIZE, /* 15509 */ IC_VEX_L_OPSIZE, /* 15510 */ IC_VEX_L_OPSIZE, /* 15511 */ IC_VEX_L_W_OPSIZE, /* 15512 */ IC_VEX_L_W_OPSIZE, /* 15513 */ IC_VEX_L_W_OPSIZE, /* 15514 */ IC_VEX_L_W_OPSIZE, /* 15515 */ IC_VEX_L_W_OPSIZE, /* 15516 */ IC_VEX_L_W_OPSIZE, /* 15517 */ IC_VEX_L_W_OPSIZE, /* 15518 */ IC_VEX_L_W_OPSIZE, /* 15519 */ IC_VEX_L, /* 15520 */ IC_VEX_L, /* 15521 */ IC_VEX_L_XS, /* 15522 */ IC_VEX_L_XS, /* 15523 */ IC_VEX_L_XD, /* 15524 */ IC_VEX_L_XD, /* 15525 */ IC_VEX_L_XD, /* 15526 */ IC_VEX_L_XD, /* 15527 */ IC_VEX_L_W, /* 15528 */ IC_VEX_L_W, /* 15529 */ IC_VEX_L_W_XS, /* 15530 */ IC_VEX_L_W_XS, /* 15531 */ IC_VEX_L_W_XD, /* 15532 */ IC_VEX_L_W_XD, /* 15533 */ IC_VEX_L_W_XD, /* 15534 */ IC_VEX_L_W_XD, /* 15535 */ IC_VEX_L_OPSIZE, /* 15536 */ IC_VEX_L_OPSIZE, /* 15537 */ IC_VEX_L_OPSIZE, /* 15538 */ IC_VEX_L_OPSIZE, /* 15539 */ IC_VEX_L_OPSIZE, /* 15540 */ IC_VEX_L_OPSIZE, /* 15541 */ IC_VEX_L_OPSIZE, /* 15542 */ IC_VEX_L_OPSIZE, /* 15543 */ IC_VEX_L_W_OPSIZE, /* 15544 */ IC_VEX_L_W_OPSIZE, /* 15545 */ IC_VEX_L_W_OPSIZE, /* 15546 */ IC_VEX_L_W_OPSIZE, /* 15547 */ IC_VEX_L_W_OPSIZE, /* 15548 */ IC_VEX_L_W_OPSIZE, /* 15549 */ IC_VEX_L_W_OPSIZE, /* 15550 */ IC_VEX_L_W_OPSIZE, /* 15551 */ IC_VEX_L, /* 15552 */ IC_VEX_L, /* 15553 */ IC_VEX_L_XS, /* 15554 */ IC_VEX_L_XS, /* 15555 */ IC_VEX_L_XD, /* 15556 */ IC_VEX_L_XD, /* 15557 */ IC_VEX_L_XD, /* 15558 */ IC_VEX_L_XD, /* 15559 */ IC_VEX_L_W, /* 15560 */ IC_VEX_L_W, /* 15561 */ IC_VEX_L_W_XS, /* 15562 */ IC_VEX_L_W_XS, /* 15563 */ IC_VEX_L_W_XD, /* 15564 */ IC_VEX_L_W_XD, /* 15565 */ IC_VEX_L_W_XD, /* 15566 */ IC_VEX_L_W_XD, /* 15567 */ IC_VEX_L_OPSIZE, /* 15568 */ IC_VEX_L_OPSIZE, /* 15569 */ IC_VEX_L_OPSIZE, /* 15570 */ IC_VEX_L_OPSIZE, /* 15571 */ IC_VEX_L_OPSIZE, /* 15572 */ IC_VEX_L_OPSIZE, /* 15573 */ IC_VEX_L_OPSIZE, /* 15574 */ IC_VEX_L_OPSIZE, /* 15575 */ IC_VEX_L_W_OPSIZE, /* 15576 */ IC_VEX_L_W_OPSIZE, /* 15577 */ IC_VEX_L_W_OPSIZE, /* 15578 */ IC_VEX_L_W_OPSIZE, /* 15579 */ IC_VEX_L_W_OPSIZE, /* 15580 */ IC_VEX_L_W_OPSIZE, /* 15581 */ IC_VEX_L_W_OPSIZE, /* 15582 */ IC_VEX_L_W_OPSIZE, /* 15583 */ IC_VEX_L, /* 15584 */ IC_VEX_L, /* 15585 */ IC_VEX_L_XS, /* 15586 */ IC_VEX_L_XS, /* 15587 */ IC_VEX_L_XD, /* 15588 */ IC_VEX_L_XD, /* 15589 */ IC_VEX_L_XD, /* 15590 */ IC_VEX_L_XD, /* 15591 */ IC_VEX_L_W, /* 15592 */ IC_VEX_L_W, /* 15593 */ IC_VEX_L_W_XS, /* 15594 */ IC_VEX_L_W_XS, /* 15595 */ IC_VEX_L_W_XD, /* 15596 */ IC_VEX_L_W_XD, /* 15597 */ IC_VEX_L_W_XD, /* 15598 */ IC_VEX_L_W_XD, /* 15599 */ IC_VEX_L_OPSIZE, /* 15600 */ IC_VEX_L_OPSIZE, /* 15601 */ IC_VEX_L_OPSIZE, /* 15602 */ IC_VEX_L_OPSIZE, /* 15603 */ IC_VEX_L_OPSIZE, /* 15604 */ IC_VEX_L_OPSIZE, /* 15605 */ IC_VEX_L_OPSIZE, /* 15606 */ IC_VEX_L_OPSIZE, /* 15607 */ IC_VEX_L_W_OPSIZE, /* 15608 */ IC_VEX_L_W_OPSIZE, /* 15609 */ IC_VEX_L_W_OPSIZE, /* 15610 */ IC_VEX_L_W_OPSIZE, /* 15611 */ IC_VEX_L_W_OPSIZE, /* 15612 */ IC_VEX_L_W_OPSIZE, /* 15613 */ IC_VEX_L_W_OPSIZE, /* 15614 */ IC_VEX_L_W_OPSIZE, /* 15615 */ IC_EVEX_L2_KZ_B, /* 15616 */ IC_EVEX_L2_KZ_B, /* 15617 */ IC_EVEX_L2_XS_KZ_B, /* 15618 */ IC_EVEX_L2_XS_KZ_B, /* 15619 */ IC_EVEX_L2_XD_KZ_B, /* 15620 */ IC_EVEX_L2_XD_KZ_B, /* 15621 */ IC_EVEX_L2_XD_KZ_B, /* 15622 */ IC_EVEX_L2_XD_KZ_B, /* 15623 */ IC_EVEX_L2_W_KZ_B, /* 15624 */ IC_EVEX_L2_W_KZ_B, /* 15625 */ IC_EVEX_L2_W_XS_KZ_B, /* 15626 */ IC_EVEX_L2_W_XS_KZ_B, /* 15627 */ IC_EVEX_L2_W_XD_KZ_B, /* 15628 */ IC_EVEX_L2_W_XD_KZ_B, /* 15629 */ IC_EVEX_L2_W_XD_KZ_B, /* 15630 */ IC_EVEX_L2_W_XD_KZ_B, /* 15631 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15632 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15633 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15634 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15635 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15636 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15637 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15638 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15639 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15640 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15641 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15642 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15643 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15644 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15645 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15646 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15647 */ IC_EVEX_L2_KZ_B, /* 15648 */ IC_EVEX_L2_KZ_B, /* 15649 */ IC_EVEX_L2_XS_KZ_B, /* 15650 */ IC_EVEX_L2_XS_KZ_B, /* 15651 */ IC_EVEX_L2_XD_KZ_B, /* 15652 */ IC_EVEX_L2_XD_KZ_B, /* 15653 */ IC_EVEX_L2_XD_KZ_B, /* 15654 */ IC_EVEX_L2_XD_KZ_B, /* 15655 */ IC_EVEX_L2_W_KZ_B, /* 15656 */ IC_EVEX_L2_W_KZ_B, /* 15657 */ IC_EVEX_L2_W_XS_KZ_B, /* 15658 */ IC_EVEX_L2_W_XS_KZ_B, /* 15659 */ IC_EVEX_L2_W_XD_KZ_B, /* 15660 */ IC_EVEX_L2_W_XD_KZ_B, /* 15661 */ IC_EVEX_L2_W_XD_KZ_B, /* 15662 */ IC_EVEX_L2_W_XD_KZ_B, /* 15663 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15664 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15665 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15666 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15667 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15668 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15669 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15670 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15671 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15672 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15673 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15674 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15675 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15676 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15677 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15678 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15679 */ IC_EVEX_L2_KZ_B, /* 15680 */ IC_EVEX_L2_KZ_B, /* 15681 */ IC_EVEX_L2_XS_KZ_B, /* 15682 */ IC_EVEX_L2_XS_KZ_B, /* 15683 */ IC_EVEX_L2_XD_KZ_B, /* 15684 */ IC_EVEX_L2_XD_KZ_B, /* 15685 */ IC_EVEX_L2_XD_KZ_B, /* 15686 */ IC_EVEX_L2_XD_KZ_B, /* 15687 */ IC_EVEX_L2_W_KZ_B, /* 15688 */ IC_EVEX_L2_W_KZ_B, /* 15689 */ IC_EVEX_L2_W_XS_KZ_B, /* 15690 */ IC_EVEX_L2_W_XS_KZ_B, /* 15691 */ IC_EVEX_L2_W_XD_KZ_B, /* 15692 */ IC_EVEX_L2_W_XD_KZ_B, /* 15693 */ IC_EVEX_L2_W_XD_KZ_B, /* 15694 */ IC_EVEX_L2_W_XD_KZ_B, /* 15695 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15696 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15697 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15698 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15699 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15700 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15701 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15702 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15703 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15704 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15705 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15706 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15707 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15708 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15709 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15710 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15711 */ IC_EVEX_L2_KZ_B, /* 15712 */ IC_EVEX_L2_KZ_B, /* 15713 */ IC_EVEX_L2_XS_KZ_B, /* 15714 */ IC_EVEX_L2_XS_KZ_B, /* 15715 */ IC_EVEX_L2_XD_KZ_B, /* 15716 */ IC_EVEX_L2_XD_KZ_B, /* 15717 */ IC_EVEX_L2_XD_KZ_B, /* 15718 */ IC_EVEX_L2_XD_KZ_B, /* 15719 */ IC_EVEX_L2_W_KZ_B, /* 15720 */ IC_EVEX_L2_W_KZ_B, /* 15721 */ IC_EVEX_L2_W_XS_KZ_B, /* 15722 */ IC_EVEX_L2_W_XS_KZ_B, /* 15723 */ IC_EVEX_L2_W_XD_KZ_B, /* 15724 */ IC_EVEX_L2_W_XD_KZ_B, /* 15725 */ IC_EVEX_L2_W_XD_KZ_B, /* 15726 */ IC_EVEX_L2_W_XD_KZ_B, /* 15727 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15728 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15729 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15730 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15731 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15732 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15733 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15734 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15735 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15736 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15737 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15738 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15739 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15740 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15741 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15742 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15743 */ IC_EVEX_L2_KZ_B, /* 15744 */ IC_EVEX_L2_KZ_B, /* 15745 */ IC_EVEX_L2_XS_KZ_B, /* 15746 */ IC_EVEX_L2_XS_KZ_B, /* 15747 */ IC_EVEX_L2_XD_KZ_B, /* 15748 */ IC_EVEX_L2_XD_KZ_B, /* 15749 */ IC_EVEX_L2_XD_KZ_B, /* 15750 */ IC_EVEX_L2_XD_KZ_B, /* 15751 */ IC_EVEX_L2_W_KZ_B, /* 15752 */ IC_EVEX_L2_W_KZ_B, /* 15753 */ IC_EVEX_L2_W_XS_KZ_B, /* 15754 */ IC_EVEX_L2_W_XS_KZ_B, /* 15755 */ IC_EVEX_L2_W_XD_KZ_B, /* 15756 */ IC_EVEX_L2_W_XD_KZ_B, /* 15757 */ IC_EVEX_L2_W_XD_KZ_B, /* 15758 */ IC_EVEX_L2_W_XD_KZ_B, /* 15759 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15760 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15761 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15762 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15763 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15764 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15765 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15766 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15767 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15768 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15769 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15770 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15771 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15772 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15773 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15774 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15775 */ IC_EVEX_L2_KZ_B, /* 15776 */ IC_EVEX_L2_KZ_B, /* 15777 */ IC_EVEX_L2_XS_KZ_B, /* 15778 */ IC_EVEX_L2_XS_KZ_B, /* 15779 */ IC_EVEX_L2_XD_KZ_B, /* 15780 */ IC_EVEX_L2_XD_KZ_B, /* 15781 */ IC_EVEX_L2_XD_KZ_B, /* 15782 */ IC_EVEX_L2_XD_KZ_B, /* 15783 */ IC_EVEX_L2_W_KZ_B, /* 15784 */ IC_EVEX_L2_W_KZ_B, /* 15785 */ IC_EVEX_L2_W_XS_KZ_B, /* 15786 */ IC_EVEX_L2_W_XS_KZ_B, /* 15787 */ IC_EVEX_L2_W_XD_KZ_B, /* 15788 */ IC_EVEX_L2_W_XD_KZ_B, /* 15789 */ IC_EVEX_L2_W_XD_KZ_B, /* 15790 */ IC_EVEX_L2_W_XD_KZ_B, /* 15791 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15792 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15793 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15794 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15795 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15796 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15797 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15798 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15799 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15800 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15801 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15802 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15803 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15804 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15805 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15806 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15807 */ IC_EVEX_L2_KZ_B, /* 15808 */ IC_EVEX_L2_KZ_B, /* 15809 */ IC_EVEX_L2_XS_KZ_B, /* 15810 */ IC_EVEX_L2_XS_KZ_B, /* 15811 */ IC_EVEX_L2_XD_KZ_B, /* 15812 */ IC_EVEX_L2_XD_KZ_B, /* 15813 */ IC_EVEX_L2_XD_KZ_B, /* 15814 */ IC_EVEX_L2_XD_KZ_B, /* 15815 */ IC_EVEX_L2_W_KZ_B, /* 15816 */ IC_EVEX_L2_W_KZ_B, /* 15817 */ IC_EVEX_L2_W_XS_KZ_B, /* 15818 */ IC_EVEX_L2_W_XS_KZ_B, /* 15819 */ IC_EVEX_L2_W_XD_KZ_B, /* 15820 */ IC_EVEX_L2_W_XD_KZ_B, /* 15821 */ IC_EVEX_L2_W_XD_KZ_B, /* 15822 */ IC_EVEX_L2_W_XD_KZ_B, /* 15823 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15824 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15825 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15826 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15827 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15828 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15829 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15830 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15831 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15832 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15833 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15834 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15835 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15836 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15837 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15838 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15839 */ IC_EVEX_L2_KZ_B, /* 15840 */ IC_EVEX_L2_KZ_B, /* 15841 */ IC_EVEX_L2_XS_KZ_B, /* 15842 */ IC_EVEX_L2_XS_KZ_B, /* 15843 */ IC_EVEX_L2_XD_KZ_B, /* 15844 */ IC_EVEX_L2_XD_KZ_B, /* 15845 */ IC_EVEX_L2_XD_KZ_B, /* 15846 */ IC_EVEX_L2_XD_KZ_B, /* 15847 */ IC_EVEX_L2_W_KZ_B, /* 15848 */ IC_EVEX_L2_W_KZ_B, /* 15849 */ IC_EVEX_L2_W_XS_KZ_B, /* 15850 */ IC_EVEX_L2_W_XS_KZ_B, /* 15851 */ IC_EVEX_L2_W_XD_KZ_B, /* 15852 */ IC_EVEX_L2_W_XD_KZ_B, /* 15853 */ IC_EVEX_L2_W_XD_KZ_B, /* 15854 */ IC_EVEX_L2_W_XD_KZ_B, /* 15855 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15856 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15857 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15858 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15859 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15860 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15861 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15862 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 15863 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15864 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15865 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15866 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15867 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15868 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15869 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15870 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 15871 */ IC, /* 15872 */ IC_64BIT, /* 15873 */ IC_XS, /* 15874 */ IC_64BIT_XS, /* 15875 */ IC_XD, /* 15876 */ IC_64BIT_XD, /* 15877 */ IC_XS, /* 15878 */ IC_64BIT_XS, /* 15879 */ IC, /* 15880 */ IC_64BIT_REXW, /* 15881 */ IC_XS, /* 15882 */ IC_64BIT_REXW_XS, /* 15883 */ IC_XD, /* 15884 */ IC_64BIT_REXW_XD, /* 15885 */ IC_XS, /* 15886 */ IC_64BIT_REXW_XS, /* 15887 */ IC_OPSIZE, /* 15888 */ IC_64BIT_OPSIZE, /* 15889 */ IC_XS_OPSIZE, /* 15890 */ IC_64BIT_XS_OPSIZE, /* 15891 */ IC_XD_OPSIZE, /* 15892 */ IC_64BIT_XD_OPSIZE, /* 15893 */ IC_XS_OPSIZE, /* 15894 */ IC_64BIT_XD_OPSIZE, /* 15895 */ IC_OPSIZE, /* 15896 */ IC_64BIT_REXW_OPSIZE, /* 15897 */ IC_XS_OPSIZE, /* 15898 */ IC_64BIT_REXW_XS, /* 15899 */ IC_XD_OPSIZE, /* 15900 */ IC_64BIT_REXW_XD, /* 15901 */ IC_XS_OPSIZE, /* 15902 */ IC_64BIT_REXW_XS, /* 15903 */ IC_ADSIZE, /* 15904 */ IC_64BIT_ADSIZE, /* 15905 */ IC_XS, /* 15906 */ IC_64BIT_XS, /* 15907 */ IC_XD, /* 15908 */ IC_64BIT_XD, /* 15909 */ IC_XS, /* 15910 */ IC_64BIT_XS, /* 15911 */ IC_ADSIZE, /* 15912 */ IC_64BIT_REXW_ADSIZE, /* 15913 */ IC_XS, /* 15914 */ IC_64BIT_REXW_XS, /* 15915 */ IC_XD, /* 15916 */ IC_64BIT_REXW_XD, /* 15917 */ IC_XS, /* 15918 */ IC_64BIT_REXW_XS, /* 15919 */ IC_OPSIZE_ADSIZE, /* 15920 */ IC_64BIT_OPSIZE_ADSIZE, /* 15921 */ IC_XS_OPSIZE, /* 15922 */ IC_64BIT_XS_OPSIZE, /* 15923 */ IC_XD_OPSIZE, /* 15924 */ IC_64BIT_XD_OPSIZE, /* 15925 */ IC_XS_OPSIZE, /* 15926 */ IC_64BIT_XD_OPSIZE, /* 15927 */ IC_OPSIZE_ADSIZE, /* 15928 */ IC_64BIT_REXW_OPSIZE, /* 15929 */ IC_XS_OPSIZE, /* 15930 */ IC_64BIT_REXW_XS, /* 15931 */ IC_XD_OPSIZE, /* 15932 */ IC_64BIT_REXW_XD, /* 15933 */ IC_XS_OPSIZE, /* 15934 */ IC_64BIT_REXW_XS, /* 15935 */ IC_VEX, /* 15936 */ IC_VEX, /* 15937 */ IC_VEX_XS, /* 15938 */ IC_VEX_XS, /* 15939 */ IC_VEX_XD, /* 15940 */ IC_VEX_XD, /* 15941 */ IC_VEX_XD, /* 15942 */ IC_VEX_XD, /* 15943 */ IC_VEX_W, /* 15944 */ IC_VEX_W, /* 15945 */ IC_VEX_W_XS, /* 15946 */ IC_VEX_W_XS, /* 15947 */ IC_VEX_W_XD, /* 15948 */ IC_VEX_W_XD, /* 15949 */ IC_VEX_W_XD, /* 15950 */ IC_VEX_W_XD, /* 15951 */ IC_VEX_OPSIZE, /* 15952 */ IC_VEX_OPSIZE, /* 15953 */ IC_VEX_OPSIZE, /* 15954 */ IC_VEX_OPSIZE, /* 15955 */ IC_VEX_OPSIZE, /* 15956 */ IC_VEX_OPSIZE, /* 15957 */ IC_VEX_OPSIZE, /* 15958 */ IC_VEX_OPSIZE, /* 15959 */ IC_VEX_W_OPSIZE, /* 15960 */ IC_VEX_W_OPSIZE, /* 15961 */ IC_VEX_W_OPSIZE, /* 15962 */ IC_VEX_W_OPSIZE, /* 15963 */ IC_VEX_W_OPSIZE, /* 15964 */ IC_VEX_W_OPSIZE, /* 15965 */ IC_VEX_W_OPSIZE, /* 15966 */ IC_VEX_W_OPSIZE, /* 15967 */ IC_VEX, /* 15968 */ IC_VEX, /* 15969 */ IC_VEX_XS, /* 15970 */ IC_VEX_XS, /* 15971 */ IC_VEX_XD, /* 15972 */ IC_VEX_XD, /* 15973 */ IC_VEX_XD, /* 15974 */ IC_VEX_XD, /* 15975 */ IC_VEX_W, /* 15976 */ IC_VEX_W, /* 15977 */ IC_VEX_W_XS, /* 15978 */ IC_VEX_W_XS, /* 15979 */ IC_VEX_W_XD, /* 15980 */ IC_VEX_W_XD, /* 15981 */ IC_VEX_W_XD, /* 15982 */ IC_VEX_W_XD, /* 15983 */ IC_VEX_OPSIZE, /* 15984 */ IC_VEX_OPSIZE, /* 15985 */ IC_VEX_OPSIZE, /* 15986 */ IC_VEX_OPSIZE, /* 15987 */ IC_VEX_OPSIZE, /* 15988 */ IC_VEX_OPSIZE, /* 15989 */ IC_VEX_OPSIZE, /* 15990 */ IC_VEX_OPSIZE, /* 15991 */ IC_VEX_W_OPSIZE, /* 15992 */ IC_VEX_W_OPSIZE, /* 15993 */ IC_VEX_W_OPSIZE, /* 15994 */ IC_VEX_W_OPSIZE, /* 15995 */ IC_VEX_W_OPSIZE, /* 15996 */ IC_VEX_W_OPSIZE, /* 15997 */ IC_VEX_W_OPSIZE, /* 15998 */ IC_VEX_W_OPSIZE, /* 15999 */ IC_VEX_L, /* 16000 */ IC_VEX_L, /* 16001 */ IC_VEX_L_XS, /* 16002 */ IC_VEX_L_XS, /* 16003 */ IC_VEX_L_XD, /* 16004 */ IC_VEX_L_XD, /* 16005 */ IC_VEX_L_XD, /* 16006 */ IC_VEX_L_XD, /* 16007 */ IC_VEX_L_W, /* 16008 */ IC_VEX_L_W, /* 16009 */ IC_VEX_L_W_XS, /* 16010 */ IC_VEX_L_W_XS, /* 16011 */ IC_VEX_L_W_XD, /* 16012 */ IC_VEX_L_W_XD, /* 16013 */ IC_VEX_L_W_XD, /* 16014 */ IC_VEX_L_W_XD, /* 16015 */ IC_VEX_L_OPSIZE, /* 16016 */ IC_VEX_L_OPSIZE, /* 16017 */ IC_VEX_L_OPSIZE, /* 16018 */ IC_VEX_L_OPSIZE, /* 16019 */ IC_VEX_L_OPSIZE, /* 16020 */ IC_VEX_L_OPSIZE, /* 16021 */ IC_VEX_L_OPSIZE, /* 16022 */ IC_VEX_L_OPSIZE, /* 16023 */ IC_VEX_L_W_OPSIZE, /* 16024 */ IC_VEX_L_W_OPSIZE, /* 16025 */ IC_VEX_L_W_OPSIZE, /* 16026 */ IC_VEX_L_W_OPSIZE, /* 16027 */ IC_VEX_L_W_OPSIZE, /* 16028 */ IC_VEX_L_W_OPSIZE, /* 16029 */ IC_VEX_L_W_OPSIZE, /* 16030 */ IC_VEX_L_W_OPSIZE, /* 16031 */ IC_VEX_L, /* 16032 */ IC_VEX_L, /* 16033 */ IC_VEX_L_XS, /* 16034 */ IC_VEX_L_XS, /* 16035 */ IC_VEX_L_XD, /* 16036 */ IC_VEX_L_XD, /* 16037 */ IC_VEX_L_XD, /* 16038 */ IC_VEX_L_XD, /* 16039 */ IC_VEX_L_W, /* 16040 */ IC_VEX_L_W, /* 16041 */ IC_VEX_L_W_XS, /* 16042 */ IC_VEX_L_W_XS, /* 16043 */ IC_VEX_L_W_XD, /* 16044 */ IC_VEX_L_W_XD, /* 16045 */ IC_VEX_L_W_XD, /* 16046 */ IC_VEX_L_W_XD, /* 16047 */ IC_VEX_L_OPSIZE, /* 16048 */ IC_VEX_L_OPSIZE, /* 16049 */ IC_VEX_L_OPSIZE, /* 16050 */ IC_VEX_L_OPSIZE, /* 16051 */ IC_VEX_L_OPSIZE, /* 16052 */ IC_VEX_L_OPSIZE, /* 16053 */ IC_VEX_L_OPSIZE, /* 16054 */ IC_VEX_L_OPSIZE, /* 16055 */ IC_VEX_L_W_OPSIZE, /* 16056 */ IC_VEX_L_W_OPSIZE, /* 16057 */ IC_VEX_L_W_OPSIZE, /* 16058 */ IC_VEX_L_W_OPSIZE, /* 16059 */ IC_VEX_L_W_OPSIZE, /* 16060 */ IC_VEX_L_W_OPSIZE, /* 16061 */ IC_VEX_L_W_OPSIZE, /* 16062 */ IC_VEX_L_W_OPSIZE, /* 16063 */ IC_VEX_L, /* 16064 */ IC_VEX_L, /* 16065 */ IC_VEX_L_XS, /* 16066 */ IC_VEX_L_XS, /* 16067 */ IC_VEX_L_XD, /* 16068 */ IC_VEX_L_XD, /* 16069 */ IC_VEX_L_XD, /* 16070 */ IC_VEX_L_XD, /* 16071 */ IC_VEX_L_W, /* 16072 */ IC_VEX_L_W, /* 16073 */ IC_VEX_L_W_XS, /* 16074 */ IC_VEX_L_W_XS, /* 16075 */ IC_VEX_L_W_XD, /* 16076 */ IC_VEX_L_W_XD, /* 16077 */ IC_VEX_L_W_XD, /* 16078 */ IC_VEX_L_W_XD, /* 16079 */ IC_VEX_L_OPSIZE, /* 16080 */ IC_VEX_L_OPSIZE, /* 16081 */ IC_VEX_L_OPSIZE, /* 16082 */ IC_VEX_L_OPSIZE, /* 16083 */ IC_VEX_L_OPSIZE, /* 16084 */ IC_VEX_L_OPSIZE, /* 16085 */ IC_VEX_L_OPSIZE, /* 16086 */ IC_VEX_L_OPSIZE, /* 16087 */ IC_VEX_L_W_OPSIZE, /* 16088 */ IC_VEX_L_W_OPSIZE, /* 16089 */ IC_VEX_L_W_OPSIZE, /* 16090 */ IC_VEX_L_W_OPSIZE, /* 16091 */ IC_VEX_L_W_OPSIZE, /* 16092 */ IC_VEX_L_W_OPSIZE, /* 16093 */ IC_VEX_L_W_OPSIZE, /* 16094 */ IC_VEX_L_W_OPSIZE, /* 16095 */ IC_VEX_L, /* 16096 */ IC_VEX_L, /* 16097 */ IC_VEX_L_XS, /* 16098 */ IC_VEX_L_XS, /* 16099 */ IC_VEX_L_XD, /* 16100 */ IC_VEX_L_XD, /* 16101 */ IC_VEX_L_XD, /* 16102 */ IC_VEX_L_XD, /* 16103 */ IC_VEX_L_W, /* 16104 */ IC_VEX_L_W, /* 16105 */ IC_VEX_L_W_XS, /* 16106 */ IC_VEX_L_W_XS, /* 16107 */ IC_VEX_L_W_XD, /* 16108 */ IC_VEX_L_W_XD, /* 16109 */ IC_VEX_L_W_XD, /* 16110 */ IC_VEX_L_W_XD, /* 16111 */ IC_VEX_L_OPSIZE, /* 16112 */ IC_VEX_L_OPSIZE, /* 16113 */ IC_VEX_L_OPSIZE, /* 16114 */ IC_VEX_L_OPSIZE, /* 16115 */ IC_VEX_L_OPSIZE, /* 16116 */ IC_VEX_L_OPSIZE, /* 16117 */ IC_VEX_L_OPSIZE, /* 16118 */ IC_VEX_L_OPSIZE, /* 16119 */ IC_VEX_L_W_OPSIZE, /* 16120 */ IC_VEX_L_W_OPSIZE, /* 16121 */ IC_VEX_L_W_OPSIZE, /* 16122 */ IC_VEX_L_W_OPSIZE, /* 16123 */ IC_VEX_L_W_OPSIZE, /* 16124 */ IC_VEX_L_W_OPSIZE, /* 16125 */ IC_VEX_L_W_OPSIZE, /* 16126 */ IC_VEX_L_W_OPSIZE, /* 16127 */ IC_EVEX_L2_KZ_B, /* 16128 */ IC_EVEX_L2_KZ_B, /* 16129 */ IC_EVEX_L2_XS_KZ_B, /* 16130 */ IC_EVEX_L2_XS_KZ_B, /* 16131 */ IC_EVEX_L2_XD_KZ_B, /* 16132 */ IC_EVEX_L2_XD_KZ_B, /* 16133 */ IC_EVEX_L2_XD_KZ_B, /* 16134 */ IC_EVEX_L2_XD_KZ_B, /* 16135 */ IC_EVEX_L2_W_KZ_B, /* 16136 */ IC_EVEX_L2_W_KZ_B, /* 16137 */ IC_EVEX_L2_W_XS_KZ_B, /* 16138 */ IC_EVEX_L2_W_XS_KZ_B, /* 16139 */ IC_EVEX_L2_W_XD_KZ_B, /* 16140 */ IC_EVEX_L2_W_XD_KZ_B, /* 16141 */ IC_EVEX_L2_W_XD_KZ_B, /* 16142 */ IC_EVEX_L2_W_XD_KZ_B, /* 16143 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16144 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16145 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16146 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16147 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16148 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16149 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16150 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16151 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16152 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16153 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16154 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16155 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16156 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16157 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16158 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16159 */ IC_EVEX_L2_KZ_B, /* 16160 */ IC_EVEX_L2_KZ_B, /* 16161 */ IC_EVEX_L2_XS_KZ_B, /* 16162 */ IC_EVEX_L2_XS_KZ_B, /* 16163 */ IC_EVEX_L2_XD_KZ_B, /* 16164 */ IC_EVEX_L2_XD_KZ_B, /* 16165 */ IC_EVEX_L2_XD_KZ_B, /* 16166 */ IC_EVEX_L2_XD_KZ_B, /* 16167 */ IC_EVEX_L2_W_KZ_B, /* 16168 */ IC_EVEX_L2_W_KZ_B, /* 16169 */ IC_EVEX_L2_W_XS_KZ_B, /* 16170 */ IC_EVEX_L2_W_XS_KZ_B, /* 16171 */ IC_EVEX_L2_W_XD_KZ_B, /* 16172 */ IC_EVEX_L2_W_XD_KZ_B, /* 16173 */ IC_EVEX_L2_W_XD_KZ_B, /* 16174 */ IC_EVEX_L2_W_XD_KZ_B, /* 16175 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16176 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16177 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16178 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16179 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16180 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16181 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16182 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16183 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16184 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16185 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16186 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16187 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16188 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16189 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16190 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16191 */ IC_EVEX_L2_KZ_B, /* 16192 */ IC_EVEX_L2_KZ_B, /* 16193 */ IC_EVEX_L2_XS_KZ_B, /* 16194 */ IC_EVEX_L2_XS_KZ_B, /* 16195 */ IC_EVEX_L2_XD_KZ_B, /* 16196 */ IC_EVEX_L2_XD_KZ_B, /* 16197 */ IC_EVEX_L2_XD_KZ_B, /* 16198 */ IC_EVEX_L2_XD_KZ_B, /* 16199 */ IC_EVEX_L2_W_KZ_B, /* 16200 */ IC_EVEX_L2_W_KZ_B, /* 16201 */ IC_EVEX_L2_W_XS_KZ_B, /* 16202 */ IC_EVEX_L2_W_XS_KZ_B, /* 16203 */ IC_EVEX_L2_W_XD_KZ_B, /* 16204 */ IC_EVEX_L2_W_XD_KZ_B, /* 16205 */ IC_EVEX_L2_W_XD_KZ_B, /* 16206 */ IC_EVEX_L2_W_XD_KZ_B, /* 16207 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16208 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16209 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16210 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16211 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16212 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16213 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16214 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16215 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16216 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16217 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16218 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16219 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16220 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16221 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16222 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16223 */ IC_EVEX_L2_KZ_B, /* 16224 */ IC_EVEX_L2_KZ_B, /* 16225 */ IC_EVEX_L2_XS_KZ_B, /* 16226 */ IC_EVEX_L2_XS_KZ_B, /* 16227 */ IC_EVEX_L2_XD_KZ_B, /* 16228 */ IC_EVEX_L2_XD_KZ_B, /* 16229 */ IC_EVEX_L2_XD_KZ_B, /* 16230 */ IC_EVEX_L2_XD_KZ_B, /* 16231 */ IC_EVEX_L2_W_KZ_B, /* 16232 */ IC_EVEX_L2_W_KZ_B, /* 16233 */ IC_EVEX_L2_W_XS_KZ_B, /* 16234 */ IC_EVEX_L2_W_XS_KZ_B, /* 16235 */ IC_EVEX_L2_W_XD_KZ_B, /* 16236 */ IC_EVEX_L2_W_XD_KZ_B, /* 16237 */ IC_EVEX_L2_W_XD_KZ_B, /* 16238 */ IC_EVEX_L2_W_XD_KZ_B, /* 16239 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16240 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16241 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16242 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16243 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16244 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16245 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16246 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16247 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16248 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16249 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16250 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16251 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16252 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16253 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16254 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16255 */ IC_EVEX_L2_KZ_B, /* 16256 */ IC_EVEX_L2_KZ_B, /* 16257 */ IC_EVEX_L2_XS_KZ_B, /* 16258 */ IC_EVEX_L2_XS_KZ_B, /* 16259 */ IC_EVEX_L2_XD_KZ_B, /* 16260 */ IC_EVEX_L2_XD_KZ_B, /* 16261 */ IC_EVEX_L2_XD_KZ_B, /* 16262 */ IC_EVEX_L2_XD_KZ_B, /* 16263 */ IC_EVEX_L2_W_KZ_B, /* 16264 */ IC_EVEX_L2_W_KZ_B, /* 16265 */ IC_EVEX_L2_W_XS_KZ_B, /* 16266 */ IC_EVEX_L2_W_XS_KZ_B, /* 16267 */ IC_EVEX_L2_W_XD_KZ_B, /* 16268 */ IC_EVEX_L2_W_XD_KZ_B, /* 16269 */ IC_EVEX_L2_W_XD_KZ_B, /* 16270 */ IC_EVEX_L2_W_XD_KZ_B, /* 16271 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16272 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16273 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16274 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16275 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16276 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16277 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16278 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16279 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16280 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16281 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16282 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16283 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16284 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16285 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16286 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16287 */ IC_EVEX_L2_KZ_B, /* 16288 */ IC_EVEX_L2_KZ_B, /* 16289 */ IC_EVEX_L2_XS_KZ_B, /* 16290 */ IC_EVEX_L2_XS_KZ_B, /* 16291 */ IC_EVEX_L2_XD_KZ_B, /* 16292 */ IC_EVEX_L2_XD_KZ_B, /* 16293 */ IC_EVEX_L2_XD_KZ_B, /* 16294 */ IC_EVEX_L2_XD_KZ_B, /* 16295 */ IC_EVEX_L2_W_KZ_B, /* 16296 */ IC_EVEX_L2_W_KZ_B, /* 16297 */ IC_EVEX_L2_W_XS_KZ_B, /* 16298 */ IC_EVEX_L2_W_XS_KZ_B, /* 16299 */ IC_EVEX_L2_W_XD_KZ_B, /* 16300 */ IC_EVEX_L2_W_XD_KZ_B, /* 16301 */ IC_EVEX_L2_W_XD_KZ_B, /* 16302 */ IC_EVEX_L2_W_XD_KZ_B, /* 16303 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16304 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16305 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16306 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16307 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16308 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16309 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16310 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16311 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16312 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16313 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16314 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16315 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16316 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16317 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16318 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16319 */ IC_EVEX_L2_KZ_B, /* 16320 */ IC_EVEX_L2_KZ_B, /* 16321 */ IC_EVEX_L2_XS_KZ_B, /* 16322 */ IC_EVEX_L2_XS_KZ_B, /* 16323 */ IC_EVEX_L2_XD_KZ_B, /* 16324 */ IC_EVEX_L2_XD_KZ_B, /* 16325 */ IC_EVEX_L2_XD_KZ_B, /* 16326 */ IC_EVEX_L2_XD_KZ_B, /* 16327 */ IC_EVEX_L2_W_KZ_B, /* 16328 */ IC_EVEX_L2_W_KZ_B, /* 16329 */ IC_EVEX_L2_W_XS_KZ_B, /* 16330 */ IC_EVEX_L2_W_XS_KZ_B, /* 16331 */ IC_EVEX_L2_W_XD_KZ_B, /* 16332 */ IC_EVEX_L2_W_XD_KZ_B, /* 16333 */ IC_EVEX_L2_W_XD_KZ_B, /* 16334 */ IC_EVEX_L2_W_XD_KZ_B, /* 16335 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16336 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16337 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16338 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16339 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16340 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16341 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16342 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16343 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16344 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16345 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16346 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16347 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16348 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16349 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16350 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16351 */ IC_EVEX_L2_KZ_B, /* 16352 */ IC_EVEX_L2_KZ_B, /* 16353 */ IC_EVEX_L2_XS_KZ_B, /* 16354 */ IC_EVEX_L2_XS_KZ_B, /* 16355 */ IC_EVEX_L2_XD_KZ_B, /* 16356 */ IC_EVEX_L2_XD_KZ_B, /* 16357 */ IC_EVEX_L2_XD_KZ_B, /* 16358 */ IC_EVEX_L2_XD_KZ_B, /* 16359 */ IC_EVEX_L2_W_KZ_B, /* 16360 */ IC_EVEX_L2_W_KZ_B, /* 16361 */ IC_EVEX_L2_W_XS_KZ_B, /* 16362 */ IC_EVEX_L2_W_XS_KZ_B, /* 16363 */ IC_EVEX_L2_W_XD_KZ_B, /* 16364 */ IC_EVEX_L2_W_XD_KZ_B, /* 16365 */ IC_EVEX_L2_W_XD_KZ_B, /* 16366 */ IC_EVEX_L2_W_XD_KZ_B, /* 16367 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16368 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16369 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16370 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16371 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16372 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16373 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16374 */ IC_EVEX_L2_OPSIZE_KZ_B, /* 16375 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16376 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16377 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16378 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16379 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16380 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16381 */ IC_EVEX_L2_W_OPSIZE_KZ_B, /* 16382 */ IC_EVEX_L2_W_OPSIZE_KZ_B /* 16383 */ }; static const InstrUID modRMTable[] = { /* EmptyTable */ 0x0, /* Table1 */ 0x6d, /* ADD8mr */ 0x71, /* ADD8rr */ /* Table3 */ 0x55, /* ADD32mr */ 0x5b, /* ADD32rr */ /* Table5 */ 0x70, /* ADD8rm */ 0x72, /* ADD8rr_REV */ /* Table7 */ 0x5a, /* ADD32rm */ 0x5d, /* ADD32rr_REV */ /* Table9 */ 0x6a, /* ADD8i8 */ /* Table10 */ 0x52, /* ADD32i32 */ /* Table11 */ 0x422, /* PUSHES32 */ /* Table12 */ 0x401, /* POPES32 */ /* Table13 */ 0x3db, /* OR8mr */ 0x3df, /* OR8rr */ /* Table15 */ 0x3c8, /* OR32mr */ 0x3cd, /* OR32rr */ /* Table17 */ 0x3de, /* OR8rm */ 0x3e0, /* OR8rr_REV */ /* Table19 */ 0x3cc, /* OR32rm */ 0x3ce, /* OR32rr_REV */ /* Table21 */ 0x3d8, /* OR8i8 */ /* Table22 */ 0x3c5, /* OR32i32 */ /* Table23 */ 0x41e, /* PUSHCS32 */ /* Table24 */ 0x3c, /* ADC8mr */ 0x40, /* ADC8rr */ /* Table26 */ 0x2a, /* ADC32mr */ 0x2e, /* ADC32rr */ /* Table28 */ 0x3f, /* ADC8rm */ 0x41, /* ADC8rr_REV */ /* Table30 */ 0x2d, /* ADC32rm */ 0x2f, /* ADC32rr_REV */ /* Table32 */ 0x39, /* ADC8i8 */ /* Table33 */ 0x27, /* ADC32i32 */ /* Table34 */ 0x42d, /* PUSHSS32 */ /* Table35 */ 0x40c, /* POPSS32 */ /* Table36 */ 0x52a, /* SBB8mr */ 0x52e, /* SBB8rr */ /* Table38 */ 0x518, /* SBB32mr */ 0x51c, /* SBB32rr */ /* Table40 */ 0x52d, /* SBB8rm */ 0x52f, /* SBB8rr_REV */ /* Table42 */ 0x51b, /* SBB32rm */ 0x51d, /* SBB32rr_REV */ /* Table44 */ 0x527, /* SBB8i8 */ /* Table45 */ 0x515, /* SBB32i32 */ /* Table46 */ 0x420, /* PUSHDS32 */ /* Table47 */ 0x3ff, /* POPDS32 */ /* Table48 */ 0x99, /* AND8mr */ 0x9d, /* AND8rr */ /* Table50 */ 0x87, /* AND32mr */ 0x8b, /* AND32rr */ /* Table52 */ 0x9c, /* AND8rm */ 0x9e, /* AND8rr_REV */ /* Table54 */ 0x8a, /* AND32rm */ 0x8c, /* AND32rr_REV */ /* Table56 */ 0x96, /* AND8i8 */ /* Table57 */ 0x84, /* AND32i32 */ /* Table58 */ 0x1d5, /* DAA */ /* Table59 */ 0x5ed, /* SUB8mr */ 0x5f1, /* SUB8rr */ /* Table61 */ 0x5db, /* SUB32mr */ 0x5df, /* SUB32rr */ /* Table63 */ 0x5f0, /* SUB8rm */ 0x5f2, /* SUB8rr_REV */ /* Table65 */ 0x5de, /* SUB32rm */ 0x5e0, /* SUB32rr_REV */ /* Table67 */ 0x5ea, /* SUB8i8 */ /* Table68 */ 0x5d8, /* SUB32i32 */ /* Table69 */ 0x1d6, /* DAS */ /* Table70 */ 0x69c, /* XOR8mr */ 0x6a0, /* XOR8rr */ /* Table72 */ 0x68a, /* XOR32mr */ 0x68e, /* XOR32rr */ /* Table74 */ 0x69f, /* XOR8rm */ 0x6a1, /* XOR8rr_REV */ /* Table76 */ 0x68d, /* XOR32rm */ 0x68f, /* XOR32rr_REV */ /* Table78 */ 0x699, /* XOR8i8 */ /* Table79 */ 0x687, /* XOR32i32 */ /* Table80 */ 0x16, /* AAA */ /* Table81 */ 0x1bd, /* CMP8mr */ 0x1c1, /* CMP8rr */ /* Table83 */ 0x1ab, /* CMP32mr */ 0x1af, /* CMP32rr */ /* Table85 */ 0x1c0, /* CMP8rm */ 0x1c2, /* CMP8rr_REV */ /* Table87 */ 0x1ae, /* CMP32rm */ 0x1b0, /* CMP32rr_REV */ /* Table89 */ 0x1ba, /* CMP8i8 */ /* Table90 */ 0x1a8, /* CMP32i32 */ /* Table91 */ 0x19, /* AAS */ /* Table92 */ 0x22c, /* INC32r_alt */ /* Table93 */ 0x1dd, /* DEC32r_alt */ /* Table94 */ 0x412, /* PUSH32r */ /* Table95 */ 0x3f6, /* POP32r */ /* Table96 */ 0x41c, /* PUSHA32 */ /* Table97 */ 0x3fd, /* POPA32 */ /* Table98 */ 0xd6, /* BOUNDS32rm */ 0x0, /* */ /* Table100 */ 0xa3, /* ARPL16mr */ 0xa4, /* ARPL16rr */ /* Table102 */ 0x1d7, /* DATA16_PREFIX */ /* Table103 */ 0x42f, /* PUSHi32 */ /* Table104 */ 0x212, /* IMUL32rmi */ 0x215, /* IMUL32rri */ /* Table106 */ 0x411, /* PUSH32i8 */ /* Table107 */ 0x213, /* IMUL32rmi8 */ 0x216, /* IMUL32rri8 */ /* Table109 */ 0x231, /* INSB */ /* Table110 */ 0x232, /* INSL */ /* Table111 */ 0x3e7, /* OUTSB */ /* Table112 */ 0x3e8, /* OUTSL */ /* Table113 */ 0x278, /* JO_1 */ /* Table114 */ 0x26f, /* JNO_1 */ /* Table115 */ 0x24f, /* JB_1 */ /* Table116 */ 0x246, /* JAE_1 */ /* Table117 */ 0x254, /* JE_1 */ /* Table118 */ 0x26c, /* JNE_1 */ /* Table119 */ 0x24c, /* JBE_1 */ /* Table120 */ 0x249, /* JA_1 */ /* Table121 */ 0x27f, /* JS_1 */ /* Table122 */ 0x275, /* JNS_1 */ /* Table123 */ 0x27b, /* JP_1 */ /* Table124 */ 0x272, /* JNP_1 */ /* Table125 */ 0x260, /* JL_1 */ /* Table126 */ 0x257, /* JGE_1 */ /* Table127 */ 0x25d, /* JLE_1 */ /* Table128 */ 0x25a, /* JG_1 */ /* Table129 */ 0x6b, /* ADD8mi */ 0x3d9, /* OR8mi */ 0x3a, /* ADC8mi */ 0x528, /* SBB8mi */ 0x97, /* AND8mi */ 0x5eb, /* SUB8mi */ 0x69a, /* XOR8mi */ 0x1bb, /* CMP8mi */ 0x6e, /* ADD8ri */ 0x3dc, /* OR8ri */ 0x3d, /* ADC8ri */ 0x52b, /* SBB8ri */ 0x9a, /* AND8ri */ 0x5ee, /* SUB8ri */ 0x69d, /* XOR8ri */ 0x1be, /* CMP8ri */ /* Table145 */ 0x53, /* ADD32mi */ 0x3c6, /* OR32mi */ 0x28, /* ADC32mi */ 0x516, /* SBB32mi */ 0x85, /* AND32mi */ 0x5d9, /* SUB32mi */ 0x688, /* XOR32mi */ 0x1a9, /* CMP32mi */ 0x56, /* ADD32ri */ 0x3ca, /* OR32ri */ 0x2b, /* ADC32ri */ 0x519, /* SBB32ri */ 0x88, /* AND32ri */ 0x5dc, /* SUB32ri */ 0x68b, /* XOR32ri */ 0x1ac, /* CMP32ri */ /* Table161 */ 0x6c, /* ADD8mi8 */ 0x3da, /* OR8mi8 */ 0x3b, /* ADC8mi8 */ 0x529, /* SBB8mi8 */ 0x98, /* AND8mi8 */ 0x5ec, /* SUB8mi8 */ 0x69b, /* XOR8mi8 */ 0x1bc, /* CMP8mi8 */ 0x6f, /* ADD8ri8 */ 0x3dd, /* OR8ri8 */ 0x3e, /* ADC8ri8 */ 0x52c, /* SBB8ri8 */ 0x9b, /* AND8ri8 */ 0x5ef, /* SUB8ri8 */ 0x69e, /* XOR8ri8 */ 0x1bf, /* CMP8ri8 */ /* Table177 */ 0x54, /* ADD32mi8 */ 0x3c7, /* OR32mi8 */ 0x29, /* ADC32mi8 */ 0x517, /* SBB32mi8 */ 0x86, /* AND32mi8 */ 0x5da, /* SUB32mi8 */ 0x689, /* XOR32mi8 */ 0x1aa, /* CMP32mi8 */ 0x57, /* ADD32ri8 */ 0x3cb, /* OR32ri8 */ 0x2c, /* ADC32ri8 */ 0x51a, /* SBB32ri8 */ 0x89, /* AND32ri8 */ 0x5dd, /* SUB32ri8 */ 0x68c, /* XOR32ri8 */ 0x1ad, /* CMP32ri8 */ /* Table193 */ 0x628, /* TEST8rm */ 0x629, /* TEST8rr */ /* Table195 */ 0x619, /* TEST32rm */ 0x61a, /* TEST32rr */ /* Table197 */ 0x675, /* XCHG8rm */ 0x676, /* XCHG8rr */ /* Table199 */ 0x670, /* XCHG32rm */ 0x671, /* XCHG32rr */ /* Table201 */ 0x34d, /* MOV8mr */ 0x356, /* MOV8rr */ /* Table203 */ 0x325, /* MOV32mr */ 0x331, /* MOV32rr */ /* Table205 */ 0x354, /* MOV8rm */ 0x358, /* MOV8rr_REV */ /* Table207 */ 0x330, /* MOV32rm */ 0x332, /* MOV32rr_REV */ /* Table209 */ 0x326, /* MOV32ms */ 0x333, /* MOV32rs */ /* Table211 */ 0x292, /* LEA32r */ 0x0, /* */ /* Table213 */ 0x334, /* MOV32sm */ 0x335, /* MOV32sr */ /* Table215 */ 0x3f7, /* POP32rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x3f8, /* POP32rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table231 */ 0x394, /* NOOP */ /* Table232 */ 0x66e, /* XCHG32ar */ /* Table233 */ 0x1d4, /* CWDE */ /* Table234 */ 0x123, /* CDQ */ /* Table235 */ 0x1f4, /* FARCALL32i */ /* Table236 */ 0x424, /* PUSHF32 */ /* Table237 */ 0x403, /* POPF32 */ /* Table238 */ 0x4d6, /* SAHF */ /* Table239 */ 0x282, /* LAHF */ /* Table240 */ 0x34a, /* MOV8ao32 */ /* Table241 */ 0x320, /* MOV32ao32 */ /* Table242 */ 0x350, /* MOV8o32a */ /* Table243 */ 0x328, /* MOV32o32a */ /* Table244 */ 0x360, /* MOVSB */ /* Table245 */ 0x361, /* MOVSL */ /* Table246 */ 0x1c3, /* CMPSB */ /* Table247 */ 0x1c4, /* CMPSL */ /* Table248 */ 0x622, /* TEST8i8 */ /* Table249 */ 0x614, /* TEST32i32 */ /* Table250 */ 0x5c7, /* STOSB */ /* Table251 */ 0x5c8, /* STOSL */ /* Table252 */ 0x2e9, /* LODSB */ /* Table253 */ 0x2ea, /* LODSL */ /* Table254 */ 0x530, /* SCASB */ /* Table255 */ 0x531, /* SCASL */ /* Table256 */ 0x352, /* MOV8ri */ /* Table257 */ 0x32d, /* MOV32ri */ /* Table258 */ 0x4b5, /* ROL8mi */ 0x4cd, /* ROR8mi */ 0x444, /* RCL8mi */ 0x45c, /* RCR8mi */ 0x579, /* SHL8mi */ 0x5a1, /* SHR8mi */ 0x4eb, /* SAL8mi */ 0x504, /* SAR8mi */ 0x4b8, /* ROL8ri */ 0x4d0, /* ROR8ri */ 0x447, /* RCL8ri */ 0x45f, /* RCR8ri */ 0x57c, /* SHL8ri */ 0x5a4, /* SHR8ri */ 0x4ee, /* SAL8ri */ 0x507, /* SAR8ri */ /* Table274 */ 0x4a9, /* ROL32mi */ 0x4c1, /* ROR32mi */ 0x438, /* RCL32mi */ 0x450, /* RCR32mi */ 0x56d, /* SHL32mi */ 0x595, /* SHR32mi */ 0x4df, /* SAL32mi */ 0x4f8, /* SAR32mi */ 0x4ac, /* ROL32ri */ 0x4c4, /* ROR32ri */ 0x43b, /* RCL32ri */ 0x453, /* RCR32ri */ 0x570, /* SHL32ri */ 0x598, /* SHR32ri */ 0x4e2, /* SAL32ri */ 0x4fb, /* SAR32ri */ /* Table290 */ 0x49a, /* RETIL */ /* Table291 */ 0x49d, /* RETL */ /* Table292 */ 0x298, /* LES32rm */ 0x0, /* */ /* Table294 */ 0x290, /* LDS32rm */ 0x0, /* */ /* Table296 */ 0x34c, /* MOV8mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x353, /* MOV8ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table312 */ 0x324, /* MOV32mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x32f, /* MOV32ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table328 */ 0x1f1, /* ENTER */ /* Table329 */ 0x295, /* LEAVE */ /* Table330 */ 0x2f0, /* LRETIL */ /* Table331 */ 0x2f3, /* LRETL */ /* Table332 */ 0x236, /* INT3 */ /* Table333 */ 0x234, /* INT */ /* Table334 */ 0x237, /* INTO */ /* Table335 */ 0x243, /* IRET32 */ /* Table336 */ 0x4b3, /* ROL8m1 */ 0x4cb, /* ROR8m1 */ 0x442, /* RCL8m1 */ 0x45a, /* RCR8m1 */ 0x577, /* SHL8m1 */ 0x59f, /* SHR8m1 */ 0x4e9, /* SAL8m1 */ 0x502, /* SAR8m1 */ 0x4b6, /* ROL8r1 */ 0x4ce, /* ROR8r1 */ 0x445, /* RCL8r1 */ 0x45d, /* RCR8r1 */ 0x57a, /* SHL8r1 */ 0x5a2, /* SHR8r1 */ 0x4ec, /* SAL8r1 */ 0x505, /* SAR8r1 */ /* Table352 */ 0x4a7, /* ROL32m1 */ 0x4bf, /* ROR32m1 */ 0x436, /* RCL32m1 */ 0x44e, /* RCR32m1 */ 0x56b, /* SHL32m1 */ 0x593, /* SHR32m1 */ 0x4dd, /* SAL32m1 */ 0x4f6, /* SAR32m1 */ 0x4aa, /* ROL32r1 */ 0x4c2, /* ROR32r1 */ 0x439, /* RCL32r1 */ 0x451, /* RCR32r1 */ 0x56e, /* SHL32r1 */ 0x596, /* SHR32r1 */ 0x4e0, /* SAL32r1 */ 0x4f9, /* SAR32r1 */ /* Table368 */ 0x4b4, /* ROL8mCL */ 0x4cc, /* ROR8mCL */ 0x443, /* RCL8mCL */ 0x45b, /* RCR8mCL */ 0x578, /* SHL8mCL */ 0x5a0, /* SHR8mCL */ 0x4ea, /* SAL8mCL */ 0x503, /* SAR8mCL */ 0x4b7, /* ROL8rCL */ 0x4cf, /* ROR8rCL */ 0x446, /* RCL8rCL */ 0x45e, /* RCR8rCL */ 0x57b, /* SHL8rCL */ 0x5a3, /* SHR8rCL */ 0x4ed, /* SAL8rCL */ 0x506, /* SAR8rCL */ /* Table384 */ 0x4a8, /* ROL32mCL */ 0x4c0, /* ROR32mCL */ 0x437, /* RCL32mCL */ 0x44f, /* RCR32mCL */ 0x56c, /* SHL32mCL */ 0x594, /* SHR32mCL */ 0x4de, /* SAL32mCL */ 0x4f7, /* SAR32mCL */ 0x4ab, /* ROL32rCL */ 0x4c3, /* ROR32rCL */ 0x43a, /* RCL32rCL */ 0x452, /* RCR32rCL */ 0x56f, /* SHL32rCL */ 0x597, /* SHR32rCL */ 0x4e1, /* SAL32rCL */ 0x4fa, /* SAR32rCL */ /* Table400 */ 0x18, /* AAM8i8 */ /* Table401 */ 0x17, /* AAD8i8 */ /* Table402 */ 0x4ef, /* SALC */ /* Table403 */ 0x67d, /* XLAT */ /* Table404 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x1fc, /* FSETPM */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table476 */ 0x2ef, /* LOOPNE */ /* Table477 */ 0x2ee, /* LOOPE */ /* Table478 */ 0x2ed, /* LOOP */ /* Table479 */ 0x253, /* JECXZ */ /* Table480 */ 0x225, /* IN8ri */ /* Table481 */ 0x223, /* IN32ri */ /* Table482 */ 0x3e5, /* OUT8ir */ /* Table483 */ 0x3e3, /* OUT32ir */ /* Table484 */ 0x121, /* CALLpcrel32 */ /* Table485 */ 0x26b, /* JMP_4 */ /* Table486 */ 0x1f9, /* FARJMP32i */ /* Table487 */ 0x269, /* JMP_1 */ /* Table488 */ 0x226, /* IN8rr */ /* Table489 */ 0x224, /* IN32rr */ /* Table490 */ 0x3e6, /* OUT8rr */ /* Table491 */ 0x3e4, /* OUT32rr */ /* Table492 */ 0x2d2, /* LOCK_PREFIX */ /* Table493 */ 0x235, /* INT1 */ /* Table494 */ 0x48a, /* REPNE_PREFIX */ /* Table495 */ 0x492, /* REP_PREFIX */ /* Table496 */ 0x1fe, /* HLT */ /* Table497 */ 0x12d, /* CMC */ /* Table498 */ 0x623, /* TEST8mi */ 0x624, /* TEST8mi_alt */ 0x3ba, /* NOT8m */ 0x392, /* NEG8m */ 0x386, /* MUL8m */ 0x21f, /* IMUL8m */ 0x1e8, /* DIV8m */ 0x205, /* IDIV8m */ 0x625, /* TEST8ri */ 0x627, /* TEST8ri_alt */ 0x3bb, /* NOT8r */ 0x393, /* NEG8r */ 0x387, /* MUL8r */ 0x220, /* IMUL8r */ 0x1e9, /* DIV8r */ 0x206, /* IDIV8r */ /* Table514 */ 0x615, /* TEST32mi */ 0x616, /* TEST32mi_alt */ 0x3b6, /* NOT32m */ 0x38e, /* NEG32m */ 0x382, /* MUL32m */ 0x20f, /* IMUL32m */ 0x1e4, /* DIV32m */ 0x201, /* IDIV32m */ 0x617, /* TEST32ri */ 0x618, /* TEST32ri_alt */ 0x3b7, /* NOT32r */ 0x38f, /* NEG32r */ 0x383, /* MUL32r */ 0x210, /* IMUL32r */ 0x1e5, /* DIV32r */ 0x202, /* IDIV32r */ /* Table530 */ 0x126, /* CLC */ /* Table531 */ 0x5c3, /* STC */ /* Table532 */ 0x12a, /* CLI */ /* Table533 */ 0x5c6, /* STI */ /* Table534 */ 0x127, /* CLD */ /* Table535 */ 0x5c4, /* STD */ /* Table536 */ 0x22f, /* INC8m */ 0x1e0, /* DEC8m */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x230, /* INC8r */ 0x1e1, /* DEC8r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table552 */ 0x22a, /* INC32m */ 0x1db, /* DEC32m */ 0x11b, /* CALL32m */ 0x1f5, /* FARCALL32m */ 0x265, /* JMP32m */ 0x1fa, /* FARJMP32m */ 0x413, /* PUSH32rmm */ 0x0, /* */ 0x22b, /* INC32r */ 0x1dc, /* DEC32r */ 0x11c, /* CALL32r */ 0x0, /* */ 0x266, /* JMP32r */ 0x0, /* */ 0x414, /* PUSH32rmr */ 0x0, /* */ /* Table568 */ 0x4a0, /* REX64_PREFIX */ /* Table569 */ 0x418, /* PUSH64r */ /* Table570 */ 0x3f9, /* POP64r */ /* Table571 */ 0x36f, /* MOVSX64rm32_alt */ 0x36c, /* MOVSX64_NOREXrr32 */ /* Table573 */ 0x416, /* PUSH64i32 */ /* Table574 */ 0x417, /* PUSH64i8 */ /* Table575 */ 0x293, /* LEA64_32r */ 0x0, /* */ /* Table577 */ 0x3fa, /* POP64rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x3fb, /* POP64rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table593 */ 0x66f, /* XCHG32ar64 */ /* Table594 */ 0x425, /* PUSHF64 */ /* Table595 */ 0x404, /* POPF64 */ /* Table596 */ 0x34b, /* MOV8ao64 */ /* Table597 */ 0x321, /* MOV32ao64 */ /* Table598 */ 0x351, /* MOV8o64a */ /* Table599 */ 0x329, /* MOV32o64a */ /* Table600 */ 0x49b, /* RETIQ */ /* Table601 */ 0x49e, /* RETQ */ /* Table602 */ 0x296, /* LEAVE64 */ /* Table603 */ 0x27e, /* JRCXZ */ /* Table604 */ 0x11e, /* CALL64pcrel32 */ /* Table605 */ 0x22a, /* INC32m */ 0x1db, /* DEC32m */ 0x11d, /* CALL64m */ 0x1f5, /* FARCALL32m */ 0x267, /* JMP64m */ 0x1fa, /* FARJMP32m */ 0x419, /* PUSH64rmm */ 0x0, /* */ 0x22b, /* INC32r */ 0x1dc, /* DEC32r */ 0x11f, /* CALL64r */ 0x0, /* */ 0x268, /* JMP64r */ 0x0, /* */ 0x41a, /* PUSH64rmr */ 0x0, /* */ /* Table621 */ 0x49, /* ADD16mr */ 0x4f, /* ADD16rr */ /* Table623 */ 0x4e, /* ADD16rm */ 0x51, /* ADD16rr_REV */ /* Table625 */ 0x46, /* ADD16i16 */ /* Table626 */ 0x421, /* PUSHES16 */ /* Table627 */ 0x400, /* POPES16 */ /* Table628 */ 0x3bf, /* OR16mr */ 0x3c3, /* OR16rr */ /* Table630 */ 0x3c2, /* OR16rm */ 0x3c4, /* OR16rr_REV */ /* Table632 */ 0x3bc, /* OR16i16 */ /* Table633 */ 0x41d, /* PUSHCS16 */ /* Table634 */ 0x21, /* ADC16mr */ 0x25, /* ADC16rr */ /* Table636 */ 0x24, /* ADC16rm */ 0x26, /* ADC16rr_REV */ /* Table638 */ 0x1e, /* ADC16i16 */ /* Table639 */ 0x42c, /* PUSHSS16 */ /* Table640 */ 0x40b, /* POPSS16 */ /* Table641 */ 0x50f, /* SBB16mr */ 0x513, /* SBB16rr */ /* Table643 */ 0x512, /* SBB16rm */ 0x514, /* SBB16rr_REV */ /* Table645 */ 0x50c, /* SBB16i16 */ /* Table646 */ 0x41f, /* PUSHDS16 */ /* Table647 */ 0x3fe, /* POPDS16 */ /* Table648 */ 0x7e, /* AND16mr */ 0x82, /* AND16rr */ /* Table650 */ 0x81, /* AND16rm */ 0x83, /* AND16rr_REV */ /* Table652 */ 0x7b, /* AND16i16 */ /* Table653 */ 0x5d2, /* SUB16mr */ 0x5d6, /* SUB16rr */ /* Table655 */ 0x5d5, /* SUB16rm */ 0x5d7, /* SUB16rr_REV */ /* Table657 */ 0x5cf, /* SUB16i16 */ /* Table658 */ 0x681, /* XOR16mr */ 0x685, /* XOR16rr */ /* Table660 */ 0x684, /* XOR16rm */ 0x686, /* XOR16rr_REV */ /* Table662 */ 0x67e, /* XOR16i16 */ /* Table663 */ 0x1a2, /* CMP16mr */ 0x1a6, /* CMP16rr */ /* Table665 */ 0x1a5, /* CMP16rm */ 0x1a7, /* CMP16rr_REV */ /* Table667 */ 0x19f, /* CMP16i16 */ /* Table668 */ 0x229, /* INC16r_alt */ /* Table669 */ 0x1da, /* DEC16r_alt */ /* Table670 */ 0x40e, /* PUSH16r */ /* Table671 */ 0x3f3, /* POP16r */ /* Table672 */ 0x41b, /* PUSHA16 */ /* Table673 */ 0x3fc, /* POPA16 */ /* Table674 */ 0xd5, /* BOUNDS16rm */ 0x0, /* */ /* Table676 */ 0x42e, /* PUSHi16 */ /* Table677 */ 0x20a, /* IMUL16rmi */ 0x20d, /* IMUL16rri */ /* Table679 */ 0x40d, /* PUSH16i8 */ /* Table680 */ 0x20b, /* IMUL16rmi8 */ 0x20e, /* IMUL16rri8 */ /* Table682 */ 0x233, /* INSW */ /* Table683 */ 0x3e9, /* OUTSW */ /* Table684 */ 0x47, /* ADD16mi */ 0x3bd, /* OR16mi */ 0x1f, /* ADC16mi */ 0x50d, /* SBB16mi */ 0x7c, /* AND16mi */ 0x5d0, /* SUB16mi */ 0x67f, /* XOR16mi */ 0x1a0, /* CMP16mi */ 0x4a, /* ADD16ri */ 0x3c0, /* OR16ri */ 0x22, /* ADC16ri */ 0x510, /* SBB16ri */ 0x7f, /* AND16ri */ 0x5d3, /* SUB16ri */ 0x682, /* XOR16ri */ 0x1a3, /* CMP16ri */ /* Table700 */ 0x48, /* ADD16mi8 */ 0x3be, /* OR16mi8 */ 0x20, /* ADC16mi8 */ 0x50e, /* SBB16mi8 */ 0x7d, /* AND16mi8 */ 0x5d1, /* SUB16mi8 */ 0x680, /* XOR16mi8 */ 0x1a1, /* CMP16mi8 */ 0x4b, /* ADD16ri8 */ 0x3c1, /* OR16ri8 */ 0x23, /* ADC16ri8 */ 0x511, /* SBB16ri8 */ 0x80, /* AND16ri8 */ 0x5d4, /* SUB16ri8 */ 0x683, /* XOR16ri8 */ 0x1a4, /* CMP16ri8 */ /* Table716 */ 0x612, /* TEST16rm */ 0x613, /* TEST16rr */ /* Table718 */ 0x66c, /* XCHG16rm */ 0x66d, /* XCHG16rr */ /* Table720 */ 0x312, /* MOV16mr */ 0x31a, /* MOV16rr */ /* Table722 */ 0x319, /* MOV16rm */ 0x31b, /* MOV16rr_REV */ /* Table724 */ 0x313, /* MOV16ms */ 0x31c, /* MOV16rs */ /* Table726 */ 0x291, /* LEA16r */ 0x0, /* */ /* Table728 */ 0x31d, /* MOV16sm */ 0x31e, /* MOV16sr */ /* Table730 */ 0x3f4, /* POP16rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x3f5, /* POP16rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table746 */ 0x66b, /* XCHG16ar */ /* Table747 */ 0x122, /* CBW */ /* Table748 */ 0x1d3, /* CWD */ /* Table749 */ 0x1f2, /* FARCALL16i */ /* Table750 */ 0x423, /* PUSHF16 */ /* Table751 */ 0x402, /* POPF16 */ /* Table752 */ 0x30f, /* MOV16ao32 */ /* Table753 */ 0x315, /* MOV16o32a */ /* Table754 */ 0x363, /* MOVSW */ /* Table755 */ 0x1c6, /* CMPSW */ /* Table756 */ 0x60d, /* TEST16i16 */ /* Table757 */ 0x5ca, /* STOSW */ /* Table758 */ 0x2ec, /* LODSW */ /* Table759 */ 0x533, /* SCASW */ /* Table760 */ 0x317, /* MOV16ri */ /* Table761 */ 0x4a3, /* ROL16mi */ 0x4bb, /* ROR16mi */ 0x432, /* RCL16mi */ 0x44a, /* RCR16mi */ 0x567, /* SHL16mi */ 0x58f, /* SHR16mi */ 0x4d9, /* SAL16mi */ 0x4f2, /* SAR16mi */ 0x4a6, /* ROL16ri */ 0x4be, /* ROR16ri */ 0x435, /* RCL16ri */ 0x44d, /* RCR16ri */ 0x56a, /* SHL16ri */ 0x592, /* SHR16ri */ 0x4dc, /* SAL16ri */ 0x4f5, /* SAR16ri */ /* Table777 */ 0x49c, /* RETIW */ /* Table778 */ 0x49f, /* RETW */ /* Table779 */ 0x297, /* LES16rm */ 0x0, /* */ /* Table781 */ 0x28f, /* LDS16rm */ 0x0, /* */ /* Table783 */ 0x311, /* MOV16mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x318, /* MOV16ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table799 */ 0x2f2, /* LRETIW */ /* Table800 */ 0x2f5, /* LRETW */ /* Table801 */ 0x242, /* IRET16 */ /* Table802 */ 0x4a1, /* ROL16m1 */ 0x4b9, /* ROR16m1 */ 0x430, /* RCL16m1 */ 0x448, /* RCR16m1 */ 0x565, /* SHL16m1 */ 0x58d, /* SHR16m1 */ 0x4d7, /* SAL16m1 */ 0x4f0, /* SAR16m1 */ 0x4a4, /* ROL16r1 */ 0x4bc, /* ROR16r1 */ 0x433, /* RCL16r1 */ 0x44b, /* RCR16r1 */ 0x568, /* SHL16r1 */ 0x590, /* SHR16r1 */ 0x4da, /* SAL16r1 */ 0x4f3, /* SAR16r1 */ /* Table818 */ 0x4a2, /* ROL16mCL */ 0x4ba, /* ROR16mCL */ 0x431, /* RCL16mCL */ 0x449, /* RCR16mCL */ 0x566, /* SHL16mCL */ 0x58e, /* SHR16mCL */ 0x4d8, /* SAL16mCL */ 0x4f1, /* SAR16mCL */ 0x4a5, /* ROL16rCL */ 0x4bd, /* ROR16rCL */ 0x434, /* RCL16rCL */ 0x44c, /* RCR16rCL */ 0x569, /* SHL16rCL */ 0x591, /* SHR16rCL */ 0x4db, /* SAL16rCL */ 0x4f4, /* SAR16rCL */ /* Table834 */ 0x221, /* IN16ri */ /* Table835 */ 0x3e1, /* OUT16ir */ /* Table836 */ 0x120, /* CALLpcrel16 */ /* Table837 */ 0x26a, /* JMP_2 */ /* Table838 */ 0x1f7, /* FARJMP16i */ /* Table839 */ 0x222, /* IN16rr */ /* Table840 */ 0x3e2, /* OUT16rr */ /* Table841 */ 0x60e, /* TEST16mi */ 0x60f, /* TEST16mi_alt */ 0x3b4, /* NOT16m */ 0x38c, /* NEG16m */ 0x380, /* MUL16m */ 0x207, /* IMUL16m */ 0x1e2, /* DIV16m */ 0x1ff, /* IDIV16m */ 0x610, /* TEST16ri */ 0x611, /* TEST16ri_alt */ 0x3b5, /* NOT16r */ 0x38d, /* NEG16r */ 0x381, /* MUL16r */ 0x208, /* IMUL16r */ 0x1e3, /* DIV16r */ 0x200, /* IDIV16r */ /* Table857 */ 0x227, /* INC16m */ 0x1d8, /* DEC16m */ 0x119, /* CALL16m */ 0x1f3, /* FARCALL16m */ 0x263, /* JMP16m */ 0x1f8, /* FARJMP16m */ 0x40f, /* PUSH16rmm */ 0x0, /* */ 0x228, /* INC16r */ 0x1d9, /* DEC16r */ 0x11a, /* CALL16r */ 0x0, /* */ 0x264, /* JMP16r */ 0x0, /* */ 0x410, /* PUSH16rmr */ 0x0, /* */ /* Table873 */ 0x349, /* MOV8ao16 */ /* Table874 */ 0x31f, /* MOV32ao16 */ /* Table875 */ 0x34f, /* MOV8o16a */ /* Table876 */ 0x327, /* MOV32o16a */ /* Table877 */ 0x252, /* JCXZ */ /* Table878 */ 0x30e, /* MOV16ao16 */ /* Table879 */ 0x314, /* MOV16o16a */ /* Table880 */ 0x61, /* ADD64mr */ 0x67, /* ADD64rr */ /* Table882 */ 0x66, /* ADD64rm */ 0x69, /* ADD64rr_REV */ /* Table884 */ 0x5e, /* ADD64i32 */ /* Table885 */ 0x3d2, /* OR64mr */ 0x3d6, /* OR64rr */ /* Table887 */ 0x3d5, /* OR64rm */ 0x3d7, /* OR64rr_REV */ /* Table889 */ 0x3cf, /* OR64i32 */ /* Table890 */ 0x33, /* ADC64mr */ 0x37, /* ADC64rr */ /* Table892 */ 0x36, /* ADC64rm */ 0x38, /* ADC64rr_REV */ /* Table894 */ 0x30, /* ADC64i32 */ /* Table895 */ 0x521, /* SBB64mr */ 0x525, /* SBB64rr */ /* Table897 */ 0x524, /* SBB64rm */ 0x526, /* SBB64rr_REV */ /* Table899 */ 0x51e, /* SBB64i32 */ /* Table900 */ 0x90, /* AND64mr */ 0x94, /* AND64rr */ /* Table902 */ 0x93, /* AND64rm */ 0x95, /* AND64rr_REV */ /* Table904 */ 0x8d, /* AND64i32 */ /* Table905 */ 0x5e4, /* SUB64mr */ 0x5e8, /* SUB64rr */ /* Table907 */ 0x5e7, /* SUB64rm */ 0x5e9, /* SUB64rr_REV */ /* Table909 */ 0x5e1, /* SUB64i32 */ /* Table910 */ 0x693, /* XOR64mr */ 0x697, /* XOR64rr */ /* Table912 */ 0x696, /* XOR64rm */ 0x698, /* XOR64rr_REV */ /* Table914 */ 0x690, /* XOR64i32 */ /* Table915 */ 0x1b4, /* CMP64mr */ 0x1b8, /* CMP64rr */ /* Table917 */ 0x1b7, /* CMP64rm */ 0x1b9, /* CMP64rr_REV */ /* Table919 */ 0x1b1, /* CMP64i32 */ /* Table920 */ 0x36e, /* MOVSX64rm32 */ 0x372, /* MOVSX64rr32 */ /* Table922 */ 0x21a, /* IMUL64rmi32 */ 0x21d, /* IMUL64rri32 */ /* Table924 */ 0x21b, /* IMUL64rmi8 */ 0x21e, /* IMUL64rri8 */ /* Table926 */ 0x5f, /* ADD64mi32 */ 0x3d0, /* OR64mi32 */ 0x31, /* ADC64mi32 */ 0x51f, /* SBB64mi32 */ 0x8e, /* AND64mi32 */ 0x5e2, /* SUB64mi32 */ 0x691, /* XOR64mi32 */ 0x1b2, /* CMP64mi32 */ 0x62, /* ADD64ri32 */ 0x3d3, /* OR64ri32 */ 0x34, /* ADC64ri32 */ 0x522, /* SBB64ri32 */ 0x91, /* AND64ri32 */ 0x5e5, /* SUB64ri32 */ 0x694, /* XOR64ri32 */ 0x1b5, /* CMP64ri32 */ /* Table942 */ 0x60, /* ADD64mi8 */ 0x3d1, /* OR64mi8 */ 0x32, /* ADC64mi8 */ 0x520, /* SBB64mi8 */ 0x8f, /* AND64mi8 */ 0x5e3, /* SUB64mi8 */ 0x692, /* XOR64mi8 */ 0x1b3, /* CMP64mi8 */ 0x64, /* ADD64ri8 */ 0x3d4, /* OR64ri8 */ 0x35, /* ADC64ri8 */ 0x523, /* SBB64ri8 */ 0x92, /* AND64ri8 */ 0x5e6, /* SUB64ri8 */ 0x695, /* XOR64ri8 */ 0x1b6, /* CMP64ri8 */ /* Table958 */ 0x620, /* TEST64rm */ 0x621, /* TEST64rr */ /* Table960 */ 0x673, /* XCHG64rm */ 0x674, /* XCHG64rr */ /* Table962 */ 0x33b, /* MOV64mr */ 0x344, /* MOV64rr */ /* Table964 */ 0x343, /* MOV64rm */ 0x345, /* MOV64rr_REV */ /* Table966 */ 0x33c, /* MOV64ms */ 0x346, /* MOV64rs */ /* Table968 */ 0x294, /* LEA64r */ 0x0, /* */ /* Table970 */ 0x347, /* MOV64sm */ 0x348, /* MOV64sr */ /* Table972 */ 0x672, /* XCHG64ar */ /* Table973 */ 0x124, /* CDQE */ /* Table974 */ 0x1d2, /* CQO */ /* Table975 */ 0x337, /* MOV64ao64 */ /* Table976 */ 0x33e, /* MOV64o64a */ /* Table977 */ 0x362, /* MOVSQ */ /* Table978 */ 0x1c5, /* CMPSQ */ /* Table979 */ 0x61b, /* TEST64i32 */ /* Table980 */ 0x5c9, /* STOSQ */ /* Table981 */ 0x2eb, /* LODSQ */ /* Table982 */ 0x532, /* SCASQ */ /* Table983 */ 0x341, /* MOV64ri */ /* Table984 */ 0x4af, /* ROL64mi */ 0x4c7, /* ROR64mi */ 0x43e, /* RCL64mi */ 0x456, /* RCR64mi */ 0x573, /* SHL64mi */ 0x59b, /* SHR64mi */ 0x4e5, /* SAL64mi */ 0x4fe, /* SAR64mi */ 0x4b2, /* ROL64ri */ 0x4ca, /* ROR64ri */ 0x441, /* RCL64ri */ 0x459, /* RCR64ri */ 0x576, /* SHL64ri */ 0x59e, /* SHR64ri */ 0x4e8, /* SAL64ri */ 0x501, /* SAR64ri */ /* Table1000 */ 0x33a, /* MOV64mi32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x342, /* MOV64ri32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1016 */ 0x2f1, /* LRETIQ */ /* Table1017 */ 0x2f4, /* LRETQ */ /* Table1018 */ 0x244, /* IRET64 */ /* Table1019 */ 0x4ad, /* ROL64m1 */ 0x4c5, /* ROR64m1 */ 0x43c, /* RCL64m1 */ 0x454, /* RCR64m1 */ 0x571, /* SHL64m1 */ 0x599, /* SHR64m1 */ 0x4e3, /* SAL64m1 */ 0x4fc, /* SAR64m1 */ 0x4b0, /* ROL64r1 */ 0x4c8, /* ROR64r1 */ 0x43f, /* RCL64r1 */ 0x457, /* RCR64r1 */ 0x574, /* SHL64r1 */ 0x59c, /* SHR64r1 */ 0x4e6, /* SAL64r1 */ 0x4ff, /* SAR64r1 */ /* Table1035 */ 0x4ae, /* ROL64mCL */ 0x4c6, /* ROR64mCL */ 0x43d, /* RCL64mCL */ 0x455, /* RCR64mCL */ 0x572, /* SHL64mCL */ 0x59a, /* SHR64mCL */ 0x4e4, /* SAL64mCL */ 0x4fd, /* SAR64mCL */ 0x4b1, /* ROL64rCL */ 0x4c9, /* ROR64rCL */ 0x440, /* RCL64rCL */ 0x458, /* RCR64rCL */ 0x575, /* SHL64rCL */ 0x59d, /* SHR64rCL */ 0x4e7, /* SAL64rCL */ 0x500, /* SAR64rCL */ /* Table1051 */ 0x61c, /* TEST64mi32 */ 0x61d, /* TEST64mi32_alt */ 0x3b8, /* NOT64m */ 0x390, /* NEG64m */ 0x384, /* MUL64m */ 0x217, /* IMUL64m */ 0x1e6, /* DIV64m */ 0x203, /* IDIV64m */ 0x61e, /* TEST64ri32 */ 0x61f, /* TEST64ri32_alt */ 0x3b9, /* NOT64r */ 0x391, /* NEG64r */ 0x385, /* MUL64r */ 0x218, /* IMUL64r */ 0x1e7, /* DIV64r */ 0x204, /* IDIV64r */ /* Table1067 */ 0x22d, /* INC64m */ 0x1de, /* DEC64m */ 0x11d, /* CALL64m */ 0x1f6, /* FARCALL64 */ 0x267, /* JMP64m */ 0x1fb, /* FARJMP64 */ 0x419, /* PUSH64rmm */ 0x0, /* */ 0x22e, /* INC64r */ 0x1df, /* DEC64r */ 0x11f, /* CALL64r */ 0x0, /* */ 0x268, /* JMP64r */ 0x0, /* */ 0x41a, /* PUSH64rmr */ 0x0, /* */ /* Table1083 */ 0x415, /* PUSH64i16 */ /* Table1084 */ 0x336, /* MOV64ao32 */ /* Table1085 */ 0x33d, /* MOV64o32a */ /* Table1086 */ 0x22d, /* INC64m */ 0x1de, /* DEC64m */ 0x11d, /* CALL64m */ 0x1f6, /* FARCALL64 */ 0x267, /* JMP64m */ 0x1fb, /* FARJMP64 */ 0x40f, /* PUSH16rmm */ 0x0, /* */ 0x22e, /* INC64r */ 0x1df, /* DEC64r */ 0x11f, /* CALL64r */ 0x0, /* */ 0x268, /* JMP64r */ 0x0, /* */ 0x410, /* PUSH16rmr */ 0x0, /* */ /* Table1102 */ 0x310, /* MOV16ao64 */ /* Table1103 */ 0x316, /* MOV16o64a */ /* Table1104 */ 0x227, /* INC16m */ 0x1d8, /* DEC16m */ 0x11d, /* CALL64m */ 0x1f3, /* FARCALL16m */ 0x267, /* JMP64m */ 0x1f8, /* FARJMP16m */ 0x40f, /* PUSH16rmm */ 0x0, /* */ 0x228, /* INC16r */ 0x1d9, /* DEC16r */ 0x11f, /* CALL64r */ 0x0, /* */ 0x268, /* JMP64r */ 0x0, /* */ 0x410, /* PUSH16rmr */ 0x0, /* */ /* Table1120 */ 0x5b9, /* SLDT16m */ 0x5ce, /* STRm */ 0x2a5, /* LLDT16m */ 0x2ff, /* LTRm */ 0x63e, /* VERRm */ 0x640, /* VERWm */ 0x0, /* */ 0x0, /* */ 0x5bb, /* SLDT32r */ 0x5cc, /* STR32r */ 0x2a6, /* LLDT16r */ 0x300, /* LTRr */ 0x63f, /* VERRr */ 0x641, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table1136 */ 0x563, /* SGDT32m */ 0x5b6, /* SIDT32m */ 0x29d, /* LGDT32m */ 0x2a3, /* LIDT32m */ 0x5be, /* SMSW16m */ 0x0, /* */ 0x2a7, /* LMSW16m */ 0x23b, /* INVLPG */ 0x0, /* */ 0x642, /* VMCALL */ 0x645, /* VMLAUNCH */ 0x64f, /* VMRESUME */ 0x658, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x125, /* CLAC */ 0x5c2, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67c, /* XGETBV */ 0x6ae, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x644, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x650, /* VMRUN32 */ 0x648, /* VMMCALL */ 0x646, /* VMLOAD32 */ 0x652, /* VMSAVE32 */ 0x5c5, /* STGI */ 0x129, /* CLGI */ 0x5b8, /* SKINIT */ 0x23c, /* INVLPGA32 */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x5f3, /* SWAPGS */ 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1208 */ 0x285, /* LAR32rm */ 0x286, /* LAR32rr */ /* Table1210 */ 0x2f8, /* LSL32rm */ 0x2f9, /* LSL32rr */ /* Table1212 */ 0x5f4, /* SYSCALL */ /* Table1213 */ 0x12b, /* CLTS */ /* Table1214 */ 0x5f8, /* SYSRET */ /* Table1215 */ 0x238, /* INVD */ /* Table1216 */ 0x65a, /* WBINVD */ /* Table1217 */ 0x630, /* TRAP */ /* Table1218 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x39d, /* NOOP18_m4 */ 0x39e, /* NOOP18_m5 */ 0x39f, /* NOOP18_m6 */ 0x3a0, /* NOOP18_m7 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x3a1, /* NOOP18_r4 */ 0x3a2, /* NOOP18_r5 */ 0x3a3, /* NOOP18_r6 */ 0x3a4, /* NOOP18_r7 */ /* Table1234 */ 0x3a7, /* NOOPL_19 */ 0x3a5, /* NOOP19rr */ /* Table1236 */ 0x3a8, /* NOOPL_1a */ 0x0, /* */ /* Table1238 */ 0x3a9, /* NOOPL_1b */ 0x0, /* */ /* Table1240 */ 0x3aa, /* NOOPL_1c */ 0x0, /* */ /* Table1242 */ 0x3ab, /* NOOPL_1d */ 0x0, /* */ /* Table1244 */ 0x3ac, /* NOOPL_1e */ 0x0, /* */ /* Table1246 */ 0x3a6, /* NOOPL */ 0x0, /* */ /* Table1248 */ 0x0, /* */ 0x32b, /* MOV32rc */ /* Table1250 */ 0x0, /* */ 0x32c, /* MOV32rd */ /* Table1252 */ 0x0, /* */ 0x322, /* MOV32cr */ /* Table1254 */ 0x0, /* */ 0x323, /* MOV32dr */ /* Table1256 */ 0x662, /* WRMSR */ /* Table1257 */ 0x46c, /* RDTSC */ /* Table1258 */ 0x464, /* RDMSR */ /* Table1259 */ 0x465, /* RDPMC */ /* Table1260 */ 0x5f5, /* SYSENTER */ /* Table1261 */ 0x5f6, /* SYSEXIT */ /* Table1262 */ 0x1fd, /* GETSEC */ /* Table1263 */ 0x17e, /* CMOVO32rm */ 0x17f, /* CMOVO32rr */ /* Table1265 */ 0x16c, /* CMOVNO32rm */ 0x16d, /* CMOVNO32rr */ /* Table1267 */ 0x13c, /* CMOVB32rm */ 0x13d, /* CMOVB32rr */ /* Table1269 */ 0x136, /* CMOVAE32rm */ 0x137, /* CMOVAE32rr */ /* Table1271 */ 0x148, /* CMOVE32rm */ 0x149, /* CMOVE32rr */ /* Table1273 */ 0x166, /* CMOVNE32rm */ 0x167, /* CMOVNE32rr */ /* Table1275 */ 0x142, /* CMOVBE32rm */ 0x143, /* CMOVBE32rr */ /* Table1277 */ 0x130, /* CMOVA32rm */ 0x131, /* CMOVA32rr */ /* Table1279 */ 0x18a, /* CMOVS32rm */ 0x18b, /* CMOVS32rr */ /* Table1281 */ 0x178, /* CMOVNS32rm */ 0x179, /* CMOVNS32rr */ /* Table1283 */ 0x184, /* CMOVP32rm */ 0x185, /* CMOVP32rr */ /* Table1285 */ 0x172, /* CMOVNP32rm */ 0x173, /* CMOVNP32rr */ /* Table1287 */ 0x15a, /* CMOVL32rm */ 0x15b, /* CMOVL32rr */ /* Table1289 */ 0x154, /* CMOVGE32rm */ 0x155, /* CMOVGE32rr */ /* Table1291 */ 0x160, /* CMOVLE32rm */ 0x161, /* CMOVLE32rr */ /* Table1293 */ 0x14e, /* CMOVG32rm */ 0x14f, /* CMOVG32rr */ /* Table1295 */ 0x64b, /* VMREAD32rm */ 0x64c, /* VMREAD32rr */ /* Table1297 */ 0x654, /* VMWRITE32rm */ 0x655, /* VMWRITE32rr */ /* Table1299 */ 0x27a, /* JO_4 */ /* Table1300 */ 0x271, /* JNO_4 */ /* Table1301 */ 0x251, /* JB_4 */ /* Table1302 */ 0x248, /* JAE_4 */ /* Table1303 */ 0x256, /* JE_4 */ /* Table1304 */ 0x26e, /* JNE_4 */ /* Table1305 */ 0x24e, /* JBE_4 */ /* Table1306 */ 0x24b, /* JA_4 */ /* Table1307 */ 0x281, /* JS_4 */ /* Table1308 */ 0x277, /* JNS_4 */ /* Table1309 */ 0x27d, /* JP_4 */ /* Table1310 */ 0x274, /* JNP_4 */ /* Table1311 */ 0x262, /* JL_4 */ /* Table1312 */ 0x259, /* JGE_4 */ /* Table1313 */ 0x25f, /* JLE_4 */ /* Table1314 */ 0x25c, /* JG_4 */ /* Table1315 */ 0x55c, /* SETOm */ 0x55d, /* SETOr */ /* Table1317 */ 0x556, /* SETNOm */ 0x557, /* SETNOr */ /* Table1319 */ 0x548, /* SETBm */ 0x549, /* SETBr */ /* Table1321 */ 0x53e, /* SETAEm */ 0x53f, /* SETAEr */ /* Table1323 */ 0x54a, /* SETEm */ 0x54b, /* SETEr */ /* Table1325 */ 0x554, /* SETNEm */ 0x555, /* SETNEr */ /* Table1327 */ 0x542, /* SETBEm */ 0x543, /* SETBEr */ /* Table1329 */ 0x540, /* SETAm */ 0x541, /* SETAr */ /* Table1331 */ 0x560, /* SETSm */ 0x561, /* SETSr */ /* Table1333 */ 0x55a, /* SETNSm */ 0x55b, /* SETNSr */ /* Table1335 */ 0x55e, /* SETPm */ 0x55f, /* SETPr */ /* Table1337 */ 0x558, /* SETNPm */ 0x559, /* SETNPr */ /* Table1339 */ 0x552, /* SETLm */ 0x553, /* SETLr */ /* Table1341 */ 0x54c, /* SETGEm */ 0x54d, /* SETGEr */ /* Table1343 */ 0x550, /* SETLEm */ 0x551, /* SETLEr */ /* Table1345 */ 0x54e, /* SETGm */ 0x54f, /* SETGr */ /* Table1347 */ 0x427, /* PUSHFS32 */ /* Table1348 */ 0x406, /* POPFS32 */ /* Table1349 */ 0x1d1, /* CPUID */ /* Table1350 */ 0xea, /* BT32mr */ 0xec, /* BT32rr */ /* Table1352 */ 0x582, /* SHLD32mri8 */ 0x584, /* SHLD32rri8 */ /* Table1354 */ 0x581, /* SHLD32mrCL */ 0x583, /* SHLD32rrCL */ /* Table1356 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x30b, /* MONTMUL */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6af, /* XSHA1 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6b0, /* XSHA256 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1428 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6b1, /* XSTORE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67a, /* XCRYPTECB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x677, /* XCRYPTCBC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x679, /* XCRYPTCTR */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x678, /* XCRYPTCFB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67b, /* XCRYPTOFB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1500 */ 0x42a, /* PUSHGS32 */ /* Table1501 */ 0x409, /* POPGS32 */ /* Table1502 */ 0x4d5, /* RSM */ /* Table1503 */ 0x10e, /* BTS32mr */ 0x110, /* BTS32rr */ /* Table1505 */ 0x5aa, /* SHRD32mri8 */ 0x5ac, /* SHRD32rri8 */ /* Table1507 */ 0x5a9, /* SHRD32mrCL */ 0x5ab, /* SHRD32rrCL */ /* Table1509 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6a6, /* XSAVE */ 0x6a2, /* XRSTOR */ 0x6aa, /* XSAVEOPT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1525 */ 0x211, /* IMUL32rm */ 0x214, /* IMUL32rr */ /* Table1527 */ 0x1cf, /* CMPXCHG8rm */ 0x1d0, /* CMPXCHG8rr */ /* Table1529 */ 0x1ca, /* CMPXCHG32rm */ 0x1cb, /* CMPXCHG32rr */ /* Table1531 */ 0x2fd, /* LSS32rm */ 0x0, /* */ /* Table1533 */ 0x102, /* BTR32mr */ 0x104, /* BTR32rr */ /* Table1535 */ 0x29a, /* LFS32rm */ 0x0, /* */ /* Table1537 */ 0x2a0, /* LGS32rm */ 0x0, /* */ /* Table1539 */ 0x379, /* MOVZX32rm8 */ 0x37b, /* MOVZX32rr8 */ /* Table1541 */ 0x378, /* MOVZX32rm16 */ 0x37a, /* MOVZX32rr16 */ /* Table1543 */ 0x63b, /* UD2B */ /* Table1544 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xe9, /* BT32mi8 */ 0x10d, /* BTS32mi8 */ 0x101, /* BTR32mi8 */ 0xf5, /* BTC32mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xeb, /* BT32ri8 */ 0x10f, /* BTS32ri8 */ 0x103, /* BTR32ri8 */ 0xf7, /* BTC32ri8 */ /* Table1560 */ 0xf6, /* BTC32mr */ 0xf8, /* BTC32rr */ /* Table1562 */ 0xd9, /* BSF32rm */ 0xda, /* BSF32rr */ /* Table1564 */ 0xdf, /* BSR32rm */ 0xe0, /* BSR32rr */ /* Table1566 */ 0x369, /* MOVSX32rm8 */ 0x36b, /* MOVSX32rr8 */ /* Table1568 */ 0x368, /* MOVSX32rm16 */ 0x36a, /* MOVSX32rr16 */ /* Table1570 */ 0x669, /* XADD8rm */ 0x66a, /* XADD8rr */ /* Table1572 */ 0x665, /* XADD32rm */ 0x666, /* XADD32rr */ /* Table1574 */ 0x0, /* */ 0x1ce, /* CMPXCHG8B */ 0x0, /* */ 0x6a4, /* XRSTORS */ 0x6a8, /* XSAVEC */ 0x6ac, /* XSAVES */ 0x649, /* VMPTRLDm */ 0x64a, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x467, /* RDRAND32r */ 0x46a, /* RDSEED32r */ /* Table1590 */ 0xe3, /* BSWAP32r */ /* Table1591 */ 0x564, /* SGDT64m */ 0x5b7, /* SIDT64m */ 0x29e, /* LGDT64m */ 0x2a4, /* LIDT64m */ 0x5be, /* SMSW16m */ 0x0, /* */ 0x2a7, /* LMSW16m */ 0x23b, /* INVLPG */ 0x0, /* */ 0x642, /* VMCALL */ 0x645, /* VMLAUNCH */ 0x64f, /* VMRESUME */ 0x658, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x125, /* CLAC */ 0x5c2, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67c, /* XGETBV */ 0x6ae, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x644, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x651, /* VMRUN64 */ 0x648, /* VMMCALL */ 0x647, /* VMLOAD64 */ 0x653, /* VMSAVE64 */ 0x5c5, /* STGI */ 0x129, /* CLGI */ 0x5b8, /* SKINIT */ 0x23d, /* INVLPGA64 */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x5c0, /* SMSW32r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x5f3, /* SWAPGS */ 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1663 */ 0x0, /* */ 0x33f, /* MOV64rc */ /* Table1665 */ 0x0, /* */ 0x340, /* MOV64rd */ /* Table1667 */ 0x0, /* */ 0x338, /* MOV64cr */ /* Table1669 */ 0x0, /* */ 0x339, /* MOV64dr */ /* Table1671 */ 0x64d, /* VMREAD64rm */ 0x64e, /* VMREAD64rr */ /* Table1673 */ 0x656, /* VMWRITE64rm */ 0x657, /* VMWRITE64rr */ /* Table1675 */ 0x428, /* PUSHFS64 */ /* Table1676 */ 0x407, /* POPFS64 */ /* Table1677 */ 0x42b, /* PUSHGS64 */ /* Table1678 */ 0x40a, /* POPGS64 */ /* Table1679 */ 0x5b9, /* SLDT16m */ 0x5ce, /* STRm */ 0x2a5, /* LLDT16m */ 0x2ff, /* LTRm */ 0x63e, /* VERRm */ 0x640, /* VERWm */ 0x0, /* */ 0x0, /* */ 0x5ba, /* SLDT16r */ 0x5cb, /* STR16r */ 0x2a6, /* LLDT16r */ 0x300, /* LTRr */ 0x63f, /* VERRr */ 0x641, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table1695 */ 0x562, /* SGDT16m */ 0x5b5, /* SIDT16m */ 0x29c, /* LGDT16m */ 0x2a2, /* LIDT16m */ 0x5be, /* SMSW16m */ 0x0, /* */ 0x2a7, /* LMSW16m */ 0x23b, /* INVLPG */ 0x0, /* */ 0x642, /* VMCALL */ 0x645, /* VMLAUNCH */ 0x64f, /* VMRESUME */ 0x658, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x125, /* CLAC */ 0x5c2, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67c, /* XGETBV */ 0x6ae, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x644, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x650, /* VMRUN32 */ 0x648, /* VMMCALL */ 0x646, /* VMLOAD32 */ 0x652, /* VMSAVE32 */ 0x5c5, /* STGI */ 0x129, /* CLGI */ 0x5b8, /* SKINIT */ 0x23c, /* INVLPGA32 */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x5f3, /* SWAPGS */ 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1767 */ 0x283, /* LAR16rm */ 0x284, /* LAR16rr */ /* Table1769 */ 0x2f6, /* LSL16rm */ 0x2f7, /* LSL16rr */ /* Table1771 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x395, /* NOOP18_16m4 */ 0x396, /* NOOP18_16m5 */ 0x397, /* NOOP18_16m6 */ 0x398, /* NOOP18_16m7 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x399, /* NOOP18_16r4 */ 0x39a, /* NOOP18_16r5 */ 0x39b, /* NOOP18_16r6 */ 0x39c, /* NOOP18_16r7 */ /* Table1787 */ 0x3ae, /* NOOPW_19 */ 0x3a5, /* NOOP19rr */ /* Table1789 */ 0x3af, /* NOOPW_1a */ 0x0, /* */ /* Table1791 */ 0x3b0, /* NOOPW_1b */ 0x0, /* */ /* Table1793 */ 0x3b1, /* NOOPW_1c */ 0x0, /* */ /* Table1795 */ 0x3b2, /* NOOPW_1d */ 0x0, /* */ /* Table1797 */ 0x3b3, /* NOOPW_1e */ 0x0, /* */ /* Table1799 */ 0x3ad, /* NOOPW */ 0x0, /* */ /* Table1801 */ 0x17c, /* CMOVO16rm */ 0x17d, /* CMOVO16rr */ /* Table1803 */ 0x16a, /* CMOVNO16rm */ 0x16b, /* CMOVNO16rr */ /* Table1805 */ 0x13a, /* CMOVB16rm */ 0x13b, /* CMOVB16rr */ /* Table1807 */ 0x134, /* CMOVAE16rm */ 0x135, /* CMOVAE16rr */ /* Table1809 */ 0x146, /* CMOVE16rm */ 0x147, /* CMOVE16rr */ /* Table1811 */ 0x164, /* CMOVNE16rm */ 0x165, /* CMOVNE16rr */ /* Table1813 */ 0x140, /* CMOVBE16rm */ 0x141, /* CMOVBE16rr */ /* Table1815 */ 0x12e, /* CMOVA16rm */ 0x12f, /* CMOVA16rr */ /* Table1817 */ 0x188, /* CMOVS16rm */ 0x189, /* CMOVS16rr */ /* Table1819 */ 0x176, /* CMOVNS16rm */ 0x177, /* CMOVNS16rr */ /* Table1821 */ 0x182, /* CMOVP16rm */ 0x183, /* CMOVP16rr */ /* Table1823 */ 0x170, /* CMOVNP16rm */ 0x171, /* CMOVNP16rr */ /* Table1825 */ 0x158, /* CMOVL16rm */ 0x159, /* CMOVL16rr */ /* Table1827 */ 0x152, /* CMOVGE16rm */ 0x153, /* CMOVGE16rr */ /* Table1829 */ 0x15e, /* CMOVLE16rm */ 0x15f, /* CMOVLE16rr */ /* Table1831 */ 0x14c, /* CMOVG16rm */ 0x14d, /* CMOVG16rr */ /* Table1833 */ 0x279, /* JO_2 */ /* Table1834 */ 0x270, /* JNO_2 */ /* Table1835 */ 0x250, /* JB_2 */ /* Table1836 */ 0x247, /* JAE_2 */ /* Table1837 */ 0x255, /* JE_2 */ /* Table1838 */ 0x26d, /* JNE_2 */ /* Table1839 */ 0x24d, /* JBE_2 */ /* Table1840 */ 0x24a, /* JA_2 */ /* Table1841 */ 0x280, /* JS_2 */ /* Table1842 */ 0x276, /* JNS_2 */ /* Table1843 */ 0x27c, /* JP_2 */ /* Table1844 */ 0x273, /* JNP_2 */ /* Table1845 */ 0x261, /* JL_2 */ /* Table1846 */ 0x258, /* JGE_2 */ /* Table1847 */ 0x25e, /* JLE_2 */ /* Table1848 */ 0x25b, /* JG_2 */ /* Table1849 */ 0x426, /* PUSHFS16 */ /* Table1850 */ 0x405, /* POPFS16 */ /* Table1851 */ 0xe6, /* BT16mr */ 0xe8, /* BT16rr */ /* Table1853 */ 0x57e, /* SHLD16mri8 */ 0x580, /* SHLD16rri8 */ /* Table1855 */ 0x57d, /* SHLD16mrCL */ 0x57f, /* SHLD16rrCL */ /* Table1857 */ 0x429, /* PUSHGS16 */ /* Table1858 */ 0x408, /* POPGS16 */ /* Table1859 */ 0x10a, /* BTS16mr */ 0x10c, /* BTS16rr */ /* Table1861 */ 0x5a6, /* SHRD16mri8 */ 0x5a8, /* SHRD16rri8 */ /* Table1863 */ 0x5a5, /* SHRD16mrCL */ 0x5a7, /* SHRD16rrCL */ /* Table1865 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6a6, /* XSAVE */ 0x6a2, /* XRSTOR */ 0x12c, /* CLWB */ 0x128, /* CLFLUSHOPT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x3ea, /* PCOMMIT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table1937 */ 0x209, /* IMUL16rm */ 0x20c, /* IMUL16rr */ /* Table1939 */ 0x1c8, /* CMPXCHG16rm */ 0x1c9, /* CMPXCHG16rr */ /* Table1941 */ 0x2fc, /* LSS16rm */ 0x0, /* */ /* Table1943 */ 0xfe, /* BTR16mr */ 0x100, /* BTR16rr */ /* Table1945 */ 0x299, /* LFS16rm */ 0x0, /* */ /* Table1947 */ 0x29f, /* LGS16rm */ 0x0, /* */ /* Table1949 */ 0x374, /* MOVZX16rm8 */ 0x375, /* MOVZX16rr8 */ /* Table1951 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xe5, /* BT16mi8 */ 0x109, /* BTS16mi8 */ 0xfd, /* BTR16mi8 */ 0xf1, /* BTC16mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xe7, /* BT16ri8 */ 0x10b, /* BTS16ri8 */ 0xff, /* BTR16ri8 */ 0xf3, /* BTC16ri8 */ /* Table1967 */ 0xf2, /* BTC16mr */ 0xf4, /* BTC16rr */ /* Table1969 */ 0xd7, /* BSF16rm */ 0xd8, /* BSF16rr */ /* Table1971 */ 0xdd, /* BSR16rm */ 0xde, /* BSR16rr */ /* Table1973 */ 0x364, /* MOVSX16rm8 */ 0x365, /* MOVSX16rr8 */ /* Table1975 */ 0x663, /* XADD16rm */ 0x664, /* XADD16rr */ /* Table1977 */ 0x0, /* */ 0x1ce, /* CMPXCHG8B */ 0x0, /* */ 0x6a4, /* XRSTORS */ 0x6a8, /* XSAVEC */ 0x6ac, /* XSAVES */ 0x643, /* VMCLEARm */ 0x64a, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x466, /* RDRAND16r */ 0x469, /* RDSEED16r */ /* Table1993 */ 0x633, /* TZCNT32rm */ 0x634, /* TZCNT32rr */ /* Table1995 */ 0x307, /* LZCNT32rm */ 0x308, /* LZCNT32rr */ /* Table1997 */ 0x0, /* */ 0x1ce, /* CMPXCHG8B */ 0x0, /* */ 0x6a4, /* XRSTORS */ 0x6a8, /* XSAVEC */ 0x6ac, /* XSAVES */ 0x659, /* VMXON */ 0x64a, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x467, /* RDRAND32r */ 0x46a, /* RDSEED32r */ /* Table2013 */ 0x631, /* TZCNT16rm */ 0x632, /* TZCNT16rr */ /* Table2015 */ 0x305, /* LZCNT16rm */ 0x306, /* LZCNT16rr */ /* Table2017 */ 0x5bc, /* SLDT64m */ 0x5ce, /* STRm */ 0x2a5, /* LLDT16m */ 0x2ff, /* LTRm */ 0x63e, /* VERRm */ 0x640, /* VERWm */ 0x0, /* */ 0x0, /* */ 0x5bd, /* SLDT64r */ 0x5cd, /* STR64r */ 0x2a6, /* LLDT16r */ 0x300, /* LTRr */ 0x63f, /* VERRr */ 0x641, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table2033 */ 0x564, /* SGDT64m */ 0x5b7, /* SIDT64m */ 0x29e, /* LGDT64m */ 0x2a4, /* LIDT64m */ 0x5be, /* SMSW16m */ 0x0, /* */ 0x2a7, /* LMSW16m */ 0x23b, /* INVLPG */ 0x0, /* */ 0x642, /* VMCALL */ 0x645, /* VMLAUNCH */ 0x64f, /* VMRESUME */ 0x658, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x125, /* CLAC */ 0x5c2, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67c, /* XGETBV */ 0x6ae, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x644, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x651, /* VMRUN64 */ 0x648, /* VMMCALL */ 0x647, /* VMLOAD64 */ 0x653, /* VMSAVE64 */ 0x5c5, /* STGI */ 0x129, /* CLGI */ 0x5b8, /* SKINIT */ 0x23d, /* INVLPGA64 */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x5c1, /* SMSW64r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x5f3, /* SWAPGS */ 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2105 */ 0x287, /* LAR64rm */ 0x288, /* LAR64rr */ /* Table2107 */ 0x2fa, /* LSL64rm */ 0x2fb, /* LSL64rr */ /* Table2109 */ 0x5f9, /* SYSRET64 */ /* Table2110 */ 0x5f7, /* SYSEXIT64 */ /* Table2111 */ 0x180, /* CMOVO64rm */ 0x181, /* CMOVO64rr */ /* Table2113 */ 0x16e, /* CMOVNO64rm */ 0x16f, /* CMOVNO64rr */ /* Table2115 */ 0x13e, /* CMOVB64rm */ 0x13f, /* CMOVB64rr */ /* Table2117 */ 0x138, /* CMOVAE64rm */ 0x139, /* CMOVAE64rr */ /* Table2119 */ 0x14a, /* CMOVE64rm */ 0x14b, /* CMOVE64rr */ /* Table2121 */ 0x168, /* CMOVNE64rm */ 0x169, /* CMOVNE64rr */ /* Table2123 */ 0x144, /* CMOVBE64rm */ 0x145, /* CMOVBE64rr */ /* Table2125 */ 0x132, /* CMOVA64rm */ 0x133, /* CMOVA64rr */ /* Table2127 */ 0x18c, /* CMOVS64rm */ 0x18d, /* CMOVS64rr */ /* Table2129 */ 0x17a, /* CMOVNS64rm */ 0x17b, /* CMOVNS64rr */ /* Table2131 */ 0x186, /* CMOVP64rm */ 0x187, /* CMOVP64rr */ /* Table2133 */ 0x174, /* CMOVNP64rm */ 0x175, /* CMOVNP64rr */ /* Table2135 */ 0x15c, /* CMOVL64rm */ 0x15d, /* CMOVL64rr */ /* Table2137 */ 0x156, /* CMOVGE64rm */ 0x157, /* CMOVGE64rr */ /* Table2139 */ 0x162, /* CMOVLE64rm */ 0x163, /* CMOVLE64rr */ /* Table2141 */ 0x150, /* CMOVG64rm */ 0x151, /* CMOVG64rr */ /* Table2143 */ 0xee, /* BT64mr */ 0xf0, /* BT64rr */ /* Table2145 */ 0x586, /* SHLD64mri8 */ 0x588, /* SHLD64rri8 */ /* Table2147 */ 0x585, /* SHLD64mrCL */ 0x587, /* SHLD64rrCL */ /* Table2149 */ 0x112, /* BTS64mr */ 0x114, /* BTS64rr */ /* Table2151 */ 0x5ae, /* SHRD64mri8 */ 0x5b0, /* SHRD64rri8 */ /* Table2153 */ 0x5ad, /* SHRD64mrCL */ 0x5af, /* SHRD64rrCL */ /* Table2155 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6a7, /* XSAVE64 */ 0x6a3, /* XRSTOR64 */ 0x6ab, /* XSAVEOPT64 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2171 */ 0x219, /* IMUL64rm */ 0x21c, /* IMUL64rr */ /* Table2173 */ 0x1cc, /* CMPXCHG64rm */ 0x1cd, /* CMPXCHG64rr */ /* Table2175 */ 0x2fe, /* LSS64rm */ 0x0, /* */ /* Table2177 */ 0x106, /* BTR64mr */ 0x108, /* BTR64rr */ /* Table2179 */ 0x29b, /* LFS64rm */ 0x0, /* */ /* Table2181 */ 0x2a1, /* LGS64rm */ 0x0, /* */ /* Table2183 */ 0x37d, /* MOVZX64rm8_Q */ 0x37f, /* MOVZX64rr8_Q */ /* Table2185 */ 0x37c, /* MOVZX64rm16_Q */ 0x37e, /* MOVZX64rr16_Q */ /* Table2187 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xed, /* BT64mi8 */ 0x111, /* BTS64mi8 */ 0x105, /* BTR64mi8 */ 0xf9, /* BTC64mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xef, /* BT64ri8 */ 0x113, /* BTS64ri8 */ 0x107, /* BTR64ri8 */ 0xfb, /* BTC64ri8 */ /* Table2203 */ 0xfa, /* BTC64mr */ 0xfc, /* BTC64rr */ /* Table2205 */ 0xdb, /* BSF64rm */ 0xdc, /* BSF64rr */ /* Table2207 */ 0xe1, /* BSR64rm */ 0xe2, /* BSR64rr */ /* Table2209 */ 0x370, /* MOVSX64rm8 */ 0x373, /* MOVSX64rr8 */ /* Table2211 */ 0x36d, /* MOVSX64rm16 */ 0x371, /* MOVSX64rr16 */ /* Table2213 */ 0x667, /* XADD64rm */ 0x668, /* XADD64rr */ /* Table2215 */ 0x0, /* */ 0x1c7, /* CMPXCHG16B */ 0x0, /* */ 0x6a5, /* XRSTORS64 */ 0x6a9, /* XSAVEC64 */ 0x6ad, /* XSAVES64 */ 0x649, /* VMPTRLDm */ 0x64a, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x468, /* RDRAND64r */ 0x46b, /* RDSEED64r */ /* Table2231 */ 0xe4, /* BSWAP64r */ /* Table2232 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6a7, /* XSAVE64 */ 0x6a3, /* XRSTOR64 */ 0x6ab, /* XSAVEOPT64 */ 0x128, /* CLFLUSHOPT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x3ea, /* PCOMMIT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2304 */ 0x0, /* */ 0x1c7, /* CMPXCHG16B */ 0x0, /* */ 0x6a5, /* XRSTORS64 */ 0x6a9, /* XSAVEC64 */ 0x6ad, /* XSAVES64 */ 0x643, /* VMCLEARm */ 0x64a, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x468, /* RDRAND64r */ 0x46b, /* RDSEED64r */ /* Table2320 */ 0x564, /* SGDT64m */ 0x5b7, /* SIDT64m */ 0x29e, /* LGDT64m */ 0x2a4, /* LIDT64m */ 0x5be, /* SMSW16m */ 0x0, /* */ 0x2a7, /* LMSW16m */ 0x23b, /* INVLPG */ 0x0, /* */ 0x642, /* VMCALL */ 0x645, /* VMLAUNCH */ 0x64f, /* VMRESUME */ 0x658, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x125, /* CLAC */ 0x5c2, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x67c, /* XGETBV */ 0x6ae, /* XSETBV */ 0x0, /* */ 0x0, /* */ 0x644, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x651, /* VMRUN64 */ 0x648, /* VMMCALL */ 0x647, /* VMLOAD64 */ 0x653, /* VMSAVE64 */ 0x5c5, /* STGI */ 0x129, /* CLGI */ 0x5b8, /* SKINIT */ 0x23d, /* INVLPGA64 */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x5bf, /* SMSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x2a8, /* LMSW16r */ 0x5f3, /* SWAPGS */ 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2392 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6a6, /* XSAVE */ 0x6a2, /* XRSTOR */ 0x6aa, /* XSAVEOPT */ 0x0, /* */ 0x460, /* RDFSBASE */ 0x462, /* RDGSBASE */ 0x65e, /* WRFSBASE */ 0x660, /* WRGSBASE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2408 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x6a7, /* XSAVE64 */ 0x6a3, /* XRSTOR64 */ 0x6ab, /* XSAVEOPT64 */ 0x0, /* */ 0x461, /* RDFSBASE64 */ 0x463, /* RDGSBASE64 */ 0x65f, /* WRFSBASE64 */ 0x661, /* WRGSBASE64 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2424 */ 0x635, /* TZCNT64rm */ 0x636, /* TZCNT64rr */ /* Table2426 */ 0x309, /* LZCNT64rm */ 0x30a, /* LZCNT64rr */ /* Table2428 */ 0x0, /* */ 0x1c7, /* CMPXCHG16B */ 0x0, /* */ 0x6a5, /* XRSTORS64 */ 0x6a9, /* XSAVEC64 */ 0x6ad, /* XSAVES64 */ 0x659, /* VMXON */ 0x64a, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x468, /* RDRAND64r */ 0x46b, /* RDSEED64r */ /* Table2444 */ 0x35c, /* MOVBE32rm */ 0x0, /* */ /* Table2446 */ 0x35b, /* MOVBE32mr */ 0x0, /* */ /* Table2448 */ 0x239, /* INVEPT32 */ 0x0, /* */ /* Table2450 */ 0x240, /* INVVPID32 */ 0x0, /* */ /* Table2452 */ 0x23e, /* INVPCID32 */ 0x0, /* */ /* Table2454 */ 0x35a, /* MOVBE16rm */ 0x0, /* */ /* Table2456 */ 0x359, /* MOVBE16mr */ 0x0, /* */ /* Table2458 */ 0x42, /* ADCX32rm */ 0x43, /* ADCX32rr */ /* Table2460 */ 0x77, /* ADOX32rm */ 0x78, /* ADOX32rr */ /* Table2462 */ 0x35e, /* MOVBE64rm */ 0x0, /* */ /* Table2464 */ 0x35d, /* MOVBE64mr */ 0x0, /* */ /* Table2466 */ 0x23a, /* INVEPT64 */ 0x0, /* */ /* Table2468 */ 0x241, /* INVVPID64 */ 0x0, /* */ /* Table2470 */ 0x23f, /* INVPCID64 */ 0x0, /* */ /* Table2472 */ 0x79, /* ADOX64rm */ 0x7a, /* ADOX64rr */ /* Table2474 */ 0x44, /* ADCX64rm */ 0x45, /* ADCX64rr */ /* Table2476 */ 0x9f, /* ANDN32rm */ 0xa0, /* ANDN32rr */ /* Table2478 */ 0x0, /* */ 0xd1, /* BLSR32rm */ 0xcd, /* BLSMSK32rm */ 0xc5, /* BLSI32rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xd2, /* BLSR32rr */ 0xce, /* BLSMSK32rr */ 0xc6, /* BLSI32rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2494 */ 0x115, /* BZHI32rm */ 0x116, /* BZHI32rr */ /* Table2496 */ 0xa5, /* BEXTR32rm */ 0xa6, /* BEXTR32rr */ /* Table2498 */ 0x3ef, /* PEXT32rm */ 0x3f0, /* PEXT32rr */ /* Table2500 */ 0x508, /* SARX32rm */ 0x509, /* SARX32rr */ /* Table2502 */ 0x3eb, /* PDEP32rm */ 0x3ec, /* PDEP32rr */ /* Table2504 */ 0x388, /* MULX32rm */ 0x389, /* MULX32rr */ /* Table2506 */ 0x5b1, /* SHRX32rm */ 0x5b2, /* SHRX32rr */ /* Table2508 */ 0x589, /* SHLX32rm */ 0x58a, /* SHLX32rr */ /* Table2510 */ 0xa1, /* ANDN64rm */ 0xa2, /* ANDN64rr */ /* Table2512 */ 0x0, /* */ 0xd3, /* BLSR64rm */ 0xcf, /* BLSMSK64rm */ 0xc7, /* BLSI64rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xd4, /* BLSR64rr */ 0xd0, /* BLSMSK64rr */ 0xc8, /* BLSI64rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2528 */ 0x117, /* BZHI64rm */ 0x118, /* BZHI64rr */ /* Table2530 */ 0xa7, /* BEXTR64rm */ 0xa8, /* BEXTR64rr */ /* Table2532 */ 0x3f1, /* PEXT64rm */ 0x3f2, /* PEXT64rr */ /* Table2534 */ 0x50a, /* SARX64rm */ 0x50b, /* SARX64rr */ /* Table2536 */ 0x3ed, /* PDEP64rm */ 0x3ee, /* PDEP64rr */ /* Table2538 */ 0x38a, /* MULX64rm */ 0x38b, /* MULX64rr */ /* Table2540 */ 0x5b3, /* SHRX64rm */ 0x5b4, /* SHRX64rr */ /* Table2542 */ 0x58b, /* SHLX64rm */ 0x58c, /* SHLX64rr */ /* Table2544 */ 0x4d1, /* RORX32mi */ 0x4d2, /* RORX32ri */ /* Table2546 */ 0x4d3, /* RORX64mi */ 0x4d4, /* RORX64ri */ /* Table2548 */ 0x0, /* */ 0xad, /* BLCFILL32rm */ 0xc1, /* BLSFILL32rm */ 0xbd, /* BLCS32rm */ 0x637, /* TZMSK32rm */ 0xb5, /* BLCIC32rm */ 0xc9, /* BLSIC32rm */ 0x5fa, /* T1MSKC32rm */ 0x0, /* */ 0xae, /* BLCFILL32rr */ 0xc2, /* BLSFILL32rr */ 0xbe, /* BLCS32rr */ 0x638, /* TZMSK32rr */ 0xb6, /* BLCIC32rr */ 0xca, /* BLSIC32rr */ 0x5fb, /* T1MSKC32rr */ /* Table2564 */ 0x0, /* */ 0xb9, /* BLCMSK32rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xb1, /* BLCI32rm */ 0x0, /* */ 0x0, /* */ 0xba, /* BLCMSK32rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xb2, /* BLCI32rr */ 0x0, /* */ /* Table2580 */ 0x0, /* */ 0xaf, /* BLCFILL64rm */ 0xc3, /* BLSFILL64rm */ 0xbf, /* BLCS64rm */ 0x639, /* TZMSK64rm */ 0xb7, /* BLCIC64rm */ 0xcb, /* BLSIC64rm */ 0x5fc, /* T1MSKC64rm */ 0x0, /* */ 0xb0, /* BLCFILL64rr */ 0xc4, /* BLSFILL64rr */ 0xc0, /* BLCS64rr */ 0x63a, /* TZMSK64rr */ 0xb8, /* BLCIC64rr */ 0xcc, /* BLSIC64rr */ 0x5fd, /* T1MSKC64rr */ /* Table2596 */ 0x0, /* */ 0xbb, /* BLCMSK64rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xb3, /* BLCI64rm */ 0x0, /* */ 0x0, /* */ 0xbc, /* BLCMSK64rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0xb4, /* BLCI64rr */ 0x0, /* */ /* Table2612 */ 0xa9, /* BEXTRI32mi */ 0xaa, /* BEXTRI32ri */ /* Table2614 */ 0xab, /* BEXTRI64mi */ 0xac, /* BEXTRI64ri */ 0x0 }; static const struct OpcodeDecision x86DisassemblerOneByteOpcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 290 /* Table290 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 329 /* Table329 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 334 /* Table334 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 400 /* Table400 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 401 /* Table401 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 402 /* Table402 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 479 /* Table479 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 484 /* Table484 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 486 /* Table486 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 552 /* Table552 */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 571 /* Table571 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 575 /* Table575 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 597 /* Table597 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 599 /* Table599 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 605 /* Table605 */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 621 /* Table621 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 623 /* Table623 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 625 /* Table625 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 626 /* Table626 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 627 /* Table627 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 628 /* Table628 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 630 /* Table630 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 632 /* Table632 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 633 /* Table633 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 634 /* Table634 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 636 /* Table636 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 638 /* Table638 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 639 /* Table639 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 640 /* Table640 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 641 /* Table641 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 643 /* Table643 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 645 /* Table645 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 646 /* Table646 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 647 /* Table647 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 648 /* Table648 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 650 /* Table650 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 652 /* Table652 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 653 /* Table653 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 655 /* Table655 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 657 /* Table657 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 658 /* Table658 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 660 /* Table660 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 662 /* Table662 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 663 /* Table663 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 665 /* Table665 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 667 /* Table667 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 672 /* Table672 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 673 /* Table673 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 674 /* Table674 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 676 /* Table676 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 677 /* Table677 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 679 /* Table679 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 680 /* Table680 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 682 /* Table682 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 683 /* Table683 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 684 /* Table684 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 700 /* Table700 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 716 /* Table716 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 718 /* Table718 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 720 /* Table720 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 722 /* Table722 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 724 /* Table724 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 726 /* Table726 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 728 /* Table728 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 730 /* Table730 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 747 /* Table747 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 748 /* Table748 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 749 /* Table749 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 750 /* Table750 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 751 /* Table751 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 752 /* Table752 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 753 /* Table753 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 754 /* Table754 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 755 /* Table755 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 756 /* Table756 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 757 /* Table757 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 758 /* Table758 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 759 /* Table759 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 761 /* Table761 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 777 /* Table777 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 778 /* Table778 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 779 /* Table779 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 781 /* Table781 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 783 /* Table783 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 329 /* Table329 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 799 /* Table799 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 800 /* Table800 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 334 /* Table334 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 801 /* Table801 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 802 /* Table802 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 818 /* Table818 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 400 /* Table400 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 401 /* Table401 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 402 /* Table402 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 479 /* Table479 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 834 /* Table834 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 835 /* Table835 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 836 /* Table836 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 837 /* Table837 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 838 /* Table838 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 839 /* Table839 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 840 /* Table840 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 841 /* Table841 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 857 /* Table857 */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 873 /* Table873 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 874 /* Table874 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 875 /* Table875 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 876 /* Table876 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 290 /* Table290 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 329 /* Table329 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 334 /* Table334 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 400 /* Table400 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 401 /* Table401 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 402 /* Table402 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 877 /* Table877 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 484 /* Table484 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 486 /* Table486 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 552 /* Table552 */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 621 /* Table621 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 623 /* Table623 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 625 /* Table625 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 626 /* Table626 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 627 /* Table627 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 628 /* Table628 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 630 /* Table630 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 632 /* Table632 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 633 /* Table633 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 634 /* Table634 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 636 /* Table636 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 638 /* Table638 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 639 /* Table639 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 640 /* Table640 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 641 /* Table641 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 643 /* Table643 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 645 /* Table645 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 646 /* Table646 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 647 /* Table647 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 648 /* Table648 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 650 /* Table650 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 652 /* Table652 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 653 /* Table653 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 655 /* Table655 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 657 /* Table657 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 658 /* Table658 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 660 /* Table660 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 662 /* Table662 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 663 /* Table663 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 665 /* Table665 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 667 /* Table667 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 668 /* Table668 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 669 /* Table669 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 672 /* Table672 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 673 /* Table673 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 674 /* Table674 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 676 /* Table676 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 677 /* Table677 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 679 /* Table679 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 680 /* Table680 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 682 /* Table682 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 683 /* Table683 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 684 /* Table684 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 700 /* Table700 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 716 /* Table716 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 718 /* Table718 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 720 /* Table720 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 722 /* Table722 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 724 /* Table724 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 726 /* Table726 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 728 /* Table728 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 730 /* Table730 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 747 /* Table747 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 748 /* Table748 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 749 /* Table749 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 750 /* Table750 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 751 /* Table751 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 873 /* Table873 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 878 /* Table878 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 875 /* Table875 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 879 /* Table879 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 754 /* Table754 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 755 /* Table755 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 756 /* Table756 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 757 /* Table757 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 758 /* Table758 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 759 /* Table759 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 761 /* Table761 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 777 /* Table777 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 778 /* Table778 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 779 /* Table779 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 781 /* Table781 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 783 /* Table783 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 329 /* Table329 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 799 /* Table799 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 800 /* Table800 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 334 /* Table334 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 801 /* Table801 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 802 /* Table802 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 818 /* Table818 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 400 /* Table400 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 401 /* Table401 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 402 /* Table402 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 877 /* Table877 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 834 /* Table834 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 835 /* Table835 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 836 /* Table836 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 837 /* Table837 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 838 /* Table838 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 839 /* Table839 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 840 /* Table840 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 841 /* Table841 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 857 /* Table857 */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 290 /* Table290 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 329 /* Table329 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 334 /* Table334 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 400 /* Table400 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 401 /* Table401 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 402 /* Table402 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 479 /* Table479 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 484 /* Table484 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 486 /* Table486 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 552 /* Table552 */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 11 /* Table11 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 12 /* Table12 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 23 /* Table23 */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 34 /* Table34 */ }, /* 0x17 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 35 /* Table35 */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 46 /* Table46 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 47 /* Table47 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 58 /* Table58 */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 69 /* Table69 */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 80 /* Table80 */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 91 /* Table91 */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 92 /* Table92 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 93 /* Table93 */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 94 /* Table94 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 95 /* Table95 */ }, /* 0x60 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 96 /* Table96 */ }, /* 0x61 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 97 /* Table97 */ }, /* 0x62 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 98 /* Table98 */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 100 /* Table100 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 103 /* Table103 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 106 /* Table106 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 161 /* Table161 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 211 /* Table211 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 215 /* Table215 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 232 /* Table232 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 235 /* Table235 */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 236 /* Table236 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 237 /* Table237 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 290 /* Table290 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 291 /* Table291 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 329 /* Table329 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 334 /* Table334 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 400 /* Table400 */ }, /* 0xd5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 401 /* Table401 */ }, /* 0xd6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 402 /* Table402 */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 479 /* Table479 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 484 /* Table484 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 486 /* Table486 */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 552 /* Table552 */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 880 /* Table880 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 882 /* Table882 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 884 /* Table884 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 885 /* Table885 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 887 /* Table887 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 889 /* Table889 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 890 /* Table890 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 892 /* Table892 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 894 /* Table894 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 895 /* Table895 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 897 /* Table897 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 899 /* Table899 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 900 /* Table900 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 902 /* Table902 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 904 /* Table904 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 905 /* Table905 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 907 /* Table907 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 909 /* Table909 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 910 /* Table910 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 912 /* Table912 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 914 /* Table914 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 915 /* Table915 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 917 /* Table917 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 919 /* Table919 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 920 /* Table920 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 922 /* Table922 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 924 /* Table924 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 926 /* Table926 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 942 /* Table942 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 958 /* Table958 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 960 /* Table960 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 962 /* Table962 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 964 /* Table964 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 966 /* Table966 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 968 /* Table968 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 970 /* Table970 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 973 /* Table973 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 974 /* Table974 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 975 /* Table975 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 976 /* Table976 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 977 /* Table977 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 978 /* Table978 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 984 /* Table984 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1000 /* Table1000 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1016 /* Table1016 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1019 /* Table1019 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1035 /* Table1035 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1051 /* Table1051 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1067 /* Table1067 */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 880 /* Table880 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 882 /* Table882 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 884 /* Table884 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 885 /* Table885 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 887 /* Table887 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 889 /* Table889 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 890 /* Table890 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 892 /* Table892 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 894 /* Table894 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 895 /* Table895 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 897 /* Table897 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 899 /* Table899 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 900 /* Table900 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 902 /* Table902 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 904 /* Table904 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 905 /* Table905 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 907 /* Table907 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 909 /* Table909 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 910 /* Table910 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 912 /* Table912 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 914 /* Table914 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 915 /* Table915 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 917 /* Table917 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 919 /* Table919 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 920 /* Table920 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1083 /* Table1083 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 922 /* Table922 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 924 /* Table924 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 682 /* Table682 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 683 /* Table683 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 926 /* Table926 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 942 /* Table942 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 958 /* Table958 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 960 /* Table960 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 962 /* Table962 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 964 /* Table964 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 966 /* Table966 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 968 /* Table968 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 970 /* Table970 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 730 /* Table730 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 973 /* Table973 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 974 /* Table974 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 750 /* Table750 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 751 /* Table751 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1084 /* Table1084 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1085 /* Table1085 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 977 /* Table977 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 978 /* Table978 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 984 /* Table984 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 777 /* Table777 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 778 /* Table778 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 779 /* Table779 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 781 /* Table781 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1000 /* Table1000 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1016 /* Table1016 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1019 /* Table1019 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1035 /* Table1035 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 834 /* Table834 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 835 /* Table835 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 836 /* Table836 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 837 /* Table837 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 839 /* Table839 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 840 /* Table840 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1051 /* Table1051 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1086 /* Table1086 */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 621 /* Table621 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 623 /* Table623 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 625 /* Table625 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 628 /* Table628 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 630 /* Table630 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 632 /* Table632 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 634 /* Table634 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 636 /* Table636 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 638 /* Table638 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 641 /* Table641 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 643 /* Table643 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 645 /* Table645 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 648 /* Table648 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 650 /* Table650 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 652 /* Table652 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 653 /* Table653 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 655 /* Table655 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 657 /* Table657 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 658 /* Table658 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 660 /* Table660 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 662 /* Table662 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 663 /* Table663 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 665 /* Table665 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 667 /* Table667 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 571 /* Table571 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1083 /* Table1083 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 677 /* Table677 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 680 /* Table680 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 682 /* Table682 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 683 /* Table683 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 684 /* Table684 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 700 /* Table700 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 716 /* Table716 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 718 /* Table718 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 720 /* Table720 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 722 /* Table722 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 724 /* Table724 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 726 /* Table726 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 728 /* Table728 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 730 /* Table730 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 747 /* Table747 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 748 /* Table748 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 750 /* Table750 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 751 /* Table751 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1102 /* Table1102 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1103 /* Table1103 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 754 /* Table754 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 755 /* Table755 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 756 /* Table756 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 757 /* Table757 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 758 /* Table758 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 759 /* Table759 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 761 /* Table761 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 777 /* Table777 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 778 /* Table778 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 779 /* Table779 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 781 /* Table781 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 783 /* Table783 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 799 /* Table799 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 800 /* Table800 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 801 /* Table801 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 802 /* Table802 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 818 /* Table818 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 834 /* Table834 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 835 /* Table835 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 836 /* Table836 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 837 /* Table837 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 839 /* Table839 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 840 /* Table840 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 841 /* Table841 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1104 /* Table1104 */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 571 /* Table571 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 575 /* Table575 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 240 /* Table240 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 241 /* Table241 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 242 /* Table242 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 243 /* Table243 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 479 /* Table479 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 605 /* Table605 */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 621 /* Table621 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 623 /* Table623 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 625 /* Table625 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 628 /* Table628 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 630 /* Table630 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 632 /* Table632 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 634 /* Table634 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 636 /* Table636 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 638 /* Table638 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 641 /* Table641 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 643 /* Table643 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 645 /* Table645 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 648 /* Table648 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 650 /* Table650 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 652 /* Table652 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 653 /* Table653 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 655 /* Table655 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 657 /* Table657 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 658 /* Table658 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 660 /* Table660 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 662 /* Table662 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 663 /* Table663 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 665 /* Table665 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 667 /* Table667 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 571 /* Table571 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1083 /* Table1083 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 677 /* Table677 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 680 /* Table680 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 682 /* Table682 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 683 /* Table683 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 684 /* Table684 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 700 /* Table700 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 716 /* Table716 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 718 /* Table718 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 720 /* Table720 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 722 /* Table722 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 724 /* Table724 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 726 /* Table726 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 728 /* Table728 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 730 /* Table730 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 746 /* Table746 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 747 /* Table747 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 748 /* Table748 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 750 /* Table750 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 751 /* Table751 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 752 /* Table752 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 753 /* Table753 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 754 /* Table754 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 755 /* Table755 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 756 /* Table756 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 757 /* Table757 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 758 /* Table758 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 759 /* Table759 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 760 /* Table760 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 761 /* Table761 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 777 /* Table777 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 778 /* Table778 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 779 /* Table779 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 781 /* Table781 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 783 /* Table783 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 799 /* Table799 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 800 /* Table800 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 801 /* Table801 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 802 /* Table802 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 818 /* Table818 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 834 /* Table834 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 835 /* Table835 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 836 /* Table836 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 837 /* Table837 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 839 /* Table839 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 840 /* Table840 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 841 /* Table841 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1104 /* Table1104 */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 571 /* Table571 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 575 /* Table575 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 597 /* Table597 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 599 /* Table599 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 605 /* Table605 */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 3 /* Table3 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 7 /* Table7 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 10 /* Table10 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 15 /* Table15 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 19 /* Table19 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 22 /* Table22 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 26 /* Table26 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 30 /* Table30 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 33 /* Table33 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 38 /* Table38 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 42 /* Table42 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 45 /* Table45 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 50 /* Table50 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 54 /* Table54 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 57 /* Table57 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 61 /* Table61 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 65 /* Table65 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 68 /* Table68 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 72 /* Table72 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 76 /* Table76 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 79 /* Table79 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 83 /* Table83 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 87 /* Table87 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 90 /* Table90 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 571 /* Table571 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 104 /* Table104 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 107 /* Table107 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 145 /* Table145 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 177 /* Table177 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 195 /* Table195 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 199 /* Table199 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 203 /* Table203 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 207 /* Table207 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 209 /* Table209 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 575 /* Table575 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 213 /* Table213 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 593 /* Table593 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 233 /* Table233 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 234 /* Table234 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 597 /* Table597 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 599 /* Table599 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 245 /* Table245 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 247 /* Table247 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 249 /* Table249 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 251 /* Table251 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 253 /* Table253 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 255 /* Table255 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 257 /* Table257 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 274 /* Table274 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 312 /* Table312 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 330 /* Table330 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 331 /* Table331 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 335 /* Table335 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 352 /* Table352 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 384 /* Table384 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 514 /* Table514 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 605 /* Table605 */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 880 /* Table880 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 882 /* Table882 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 884 /* Table884 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 885 /* Table885 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 887 /* Table887 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 889 /* Table889 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 890 /* Table890 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 892 /* Table892 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 894 /* Table894 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 895 /* Table895 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 897 /* Table897 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 899 /* Table899 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 900 /* Table900 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 902 /* Table902 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 904 /* Table904 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 905 /* Table905 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 907 /* Table907 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 909 /* Table909 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 910 /* Table910 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 912 /* Table912 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 914 /* Table914 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 915 /* Table915 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 917 /* Table917 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 919 /* Table919 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 920 /* Table920 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 922 /* Table922 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 924 /* Table924 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 926 /* Table926 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 942 /* Table942 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 958 /* Table958 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 960 /* Table960 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 962 /* Table962 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 964 /* Table964 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 966 /* Table966 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 968 /* Table968 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 970 /* Table970 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 973 /* Table973 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 974 /* Table974 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 975 /* Table975 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 976 /* Table976 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 977 /* Table977 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 978 /* Table978 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 984 /* Table984 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1000 /* Table1000 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1016 /* Table1016 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1019 /* Table1019 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1035 /* Table1035 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1051 /* Table1051 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1067 /* Table1067 */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 880 /* Table880 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 882 /* Table882 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 884 /* Table884 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 885 /* Table885 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 887 /* Table887 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 889 /* Table889 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 890 /* Table890 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 892 /* Table892 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 894 /* Table894 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 895 /* Table895 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 897 /* Table897 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 899 /* Table899 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 900 /* Table900 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 902 /* Table902 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 904 /* Table904 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 905 /* Table905 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 907 /* Table907 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 909 /* Table909 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 910 /* Table910 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 912 /* Table912 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 914 /* Table914 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 915 /* Table915 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 917 /* Table917 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 919 /* Table919 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 569 /* Table569 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 570 /* Table570 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 920 /* Table920 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 573 /* Table573 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 922 /* Table922 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 924 /* Table924 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 110 /* Table110 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 112 /* Table112 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 926 /* Table926 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 942 /* Table942 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 958 /* Table958 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 960 /* Table960 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 962 /* Table962 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 964 /* Table964 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 966 /* Table966 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 968 /* Table968 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 970 /* Table970 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 577 /* Table577 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 973 /* Table973 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 974 /* Table974 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 594 /* Table594 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 595 /* Table595 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 975 /* Table975 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 976 /* Table976 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 977 /* Table977 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 978 /* Table978 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 984 /* Table984 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 600 /* Table600 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 601 /* Table601 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 292 /* Table292 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 294 /* Table294 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1000 /* Table1000 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1016 /* Table1016 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1019 /* Table1019 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1035 /* Table1035 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 481 /* Table481 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 483 /* Table483 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 604 /* Table604 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 485 /* Table485 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 489 /* Table489 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 491 /* Table491 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1051 /* Table1051 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1067 /* Table1067 */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1 /* Table1 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 880 /* Table880 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 5 /* Table5 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 882 /* Table882 */ }, /* 0x04 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 9 /* Table9 */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 884 /* Table884 */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 13 /* Table13 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 885 /* Table885 */ }, /* 0x0a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 17 /* Table17 */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 887 /* Table887 */ }, /* 0x0c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 21 /* Table21 */ }, /* 0x0d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 889 /* Table889 */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 24 /* Table24 */ }, /* 0x11 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 890 /* Table890 */ }, /* 0x12 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 28 /* Table28 */ }, /* 0x13 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 892 /* Table892 */ }, /* 0x14 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 32 /* Table32 */ }, /* 0x15 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 894 /* Table894 */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 36 /* Table36 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 895 /* Table895 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 40 /* Table40 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 897 /* Table897 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 44 /* Table44 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 899 /* Table899 */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 48 /* Table48 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 900 /* Table900 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 52 /* Table52 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 902 /* Table902 */ }, /* 0x24 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 56 /* Table56 */ }, /* 0x25 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 904 /* Table904 */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 59 /* Table59 */ }, /* 0x29 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 905 /* Table905 */ }, /* 0x2a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 63 /* Table63 */ }, /* 0x2b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 907 /* Table907 */ }, /* 0x2c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 67 /* Table67 */ }, /* 0x2d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 909 /* Table909 */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 70 /* Table70 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 910 /* Table910 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 74 /* Table74 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 912 /* Table912 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 78 /* Table78 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 914 /* Table914 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 81 /* Table81 */ }, /* 0x39 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 915 /* Table915 */ }, /* 0x3a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 85 /* Table85 */ }, /* 0x3b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 917 /* Table917 */ }, /* 0x3c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 89 /* Table89 */ }, /* 0x3d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 919 /* Table919 */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 568 /* Table568 */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x51 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x52 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x53 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x54 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x55 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x56 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x57 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 670 /* Table670 */ }, /* 0x58 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x59 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x5f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 671 /* Table671 */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 920 /* Table920 */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 102 /* Table102 */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1083 /* Table1083 */ }, /* 0x69 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 922 /* Table922 */ }, /* 0x6a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 574 /* Table574 */ }, /* 0x6b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 924 /* Table924 */ }, /* 0x6c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 109 /* Table109 */ }, /* 0x6d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 682 /* Table682 */ }, /* 0x6e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 111 /* Table111 */ }, /* 0x6f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 683 /* Table683 */ }, /* 0x70 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 113 /* Table113 */ }, /* 0x71 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 114 /* Table114 */ }, /* 0x72 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 115 /* Table115 */ }, /* 0x73 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 116 /* Table116 */ }, /* 0x74 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 117 /* Table117 */ }, /* 0x75 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 118 /* Table118 */ }, /* 0x76 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 119 /* Table119 */ }, /* 0x77 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 120 /* Table120 */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 121 /* Table121 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 122 /* Table122 */ }, /* 0x7a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 123 /* Table123 */ }, /* 0x7b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 124 /* Table124 */ }, /* 0x7c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 125 /* Table125 */ }, /* 0x7d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 126 /* Table126 */ }, /* 0x7e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 127 /* Table127 */ }, /* 0x7f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 128 /* Table128 */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 129 /* Table129 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 926 /* Table926 */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 942 /* Table942 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 193 /* Table193 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 958 /* Table958 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 197 /* Table197 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 960 /* Table960 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 201 /* Table201 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 962 /* Table962 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 205 /* Table205 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 964 /* Table964 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 966 /* Table966 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 968 /* Table968 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 970 /* Table970 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_SPLITREG, 730 /* Table730 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 231 /* Table231 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 972 /* Table972 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 973 /* Table973 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 974 /* Table974 */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 750 /* Table750 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 751 /* Table751 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 238 /* Table238 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 239 /* Table239 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 596 /* Table596 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 975 /* Table975 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 598 /* Table598 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 976 /* Table976 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 244 /* Table244 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 977 /* Table977 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 246 /* Table246 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 978 /* Table978 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 248 /* Table248 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 979 /* Table979 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 250 /* Table250 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 980 /* Table980 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 252 /* Table252 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 981 /* Table981 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 254 /* Table254 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 982 /* Table982 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 256 /* Table256 */ }, /* 0xb8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 983 /* Table983 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 258 /* Table258 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 984 /* Table984 */ }, /* 0xc2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 777 /* Table777 */ }, /* 0xc3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 778 /* Table778 */ }, /* 0xc4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 779 /* Table779 */ }, /* 0xc5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 781 /* Table781 */ }, /* 0xc6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 296 /* Table296 */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1000 /* Table1000 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 328 /* Table328 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 602 /* Table602 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1016 /* Table1016 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1017 /* Table1017 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 332 /* Table332 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 333 /* Table333 */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1018 /* Table1018 */ }, /* 0xd0 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 336 /* Table336 */ }, /* 0xd1 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1019 /* Table1019 */ }, /* 0xd2 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 368 /* Table368 */ }, /* 0xd3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1035 /* Table1035 */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 403 /* Table403 */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 404 /* Table404 */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 476 /* Table476 */ }, /* 0xe1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 477 /* Table477 */ }, /* 0xe2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 478 /* Table478 */ }, /* 0xe3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 603 /* Table603 */ }, /* 0xe4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 480 /* Table480 */ }, /* 0xe5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 834 /* Table834 */ }, /* 0xe6 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 482 /* Table482 */ }, /* 0xe7 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 835 /* Table835 */ }, /* 0xe8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 836 /* Table836 */ }, /* 0xe9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 837 /* Table837 */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 487 /* Table487 */ }, /* 0xec */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 488 /* Table488 */ }, /* 0xed */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 839 /* Table839 */ }, /* 0xee */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 490 /* Table490 */ }, /* 0xef */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 840 /* Table840 */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 492 /* Table492 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 493 /* Table493 */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 494 /* Table494 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 495 /* Table495 */ }, /* 0xf4 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 496 /* Table496 */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 497 /* Table497 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 498 /* Table498 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1051 /* Table1051 */ }, /* 0xf8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 530 /* Table530 */ }, /* 0xf9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 531 /* Table531 */ }, /* 0xfa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 532 /* Table532 */ }, /* 0xfb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 533 /* Table533 */ }, /* 0xfc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 534 /* Table534 */ }, /* 0xfd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 535 /* Table535 */ }, /* 0xfe */ { /* struct ModRMDecision */ MODRM_SPLITREG, 536 /* Table536 */ }, /* 0xff */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1086 /* Table1086 */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerOneByteOpcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 0, 0, 8, 9, 10, 11, 12, 13, 14, 0, 0, 15, 16, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerTwoByteOpcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1136 /* Table1136 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1248 /* Table1248 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1250 /* Table1250 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1252 /* Table1252 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1254 /* Table1254 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1295 /* Table1295 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1297 /* Table1297 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1347 /* Table1347 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1348 /* Table1348 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1500 /* Table1500 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1501 /* Table1501 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1562 /* Table1562 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1564 /* Table1564 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1574 /* Table1574 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1591 /* Table1591 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1562 /* Table1562 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1564 /* Table1564 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1574 /* Table1574 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1679 /* Table1679 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1695 /* Table1695 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1767 /* Table1767 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1769 /* Table1769 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1771 /* Table1771 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1787 /* Table1787 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1789 /* Table1789 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1791 /* Table1791 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1793 /* Table1793 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1795 /* Table1795 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1797 /* Table1797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1799 /* Table1799 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1248 /* Table1248 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1250 /* Table1250 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1252 /* Table1252 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1254 /* Table1254 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1801 /* Table1801 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1803 /* Table1803 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1805 /* Table1805 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1807 /* Table1807 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1809 /* Table1809 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1811 /* Table1811 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1813 /* Table1813 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1815 /* Table1815 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1817 /* Table1817 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1819 /* Table1819 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1821 /* Table1821 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1823 /* Table1823 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1825 /* Table1825 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1827 /* Table1827 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1829 /* Table1829 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1831 /* Table1831 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1295 /* Table1295 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1297 /* Table1297 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1833 /* Table1833 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1834 /* Table1834 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1835 /* Table1835 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1836 /* Table1836 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1837 /* Table1837 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1838 /* Table1838 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1839 /* Table1839 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1840 /* Table1840 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1841 /* Table1841 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1842 /* Table1842 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1843 /* Table1843 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1844 /* Table1844 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1845 /* Table1845 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1851 /* Table1851 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1853 /* Table1853 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1855 /* Table1855 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1857 /* Table1857 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1858 /* Table1858 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1859 /* Table1859 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1861 /* Table1861 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1863 /* Table1863 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1865 /* Table1865 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1937 /* Table1937 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1939 /* Table1939 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1941 /* Table1941 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1943 /* Table1943 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1951 /* Table1951 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1977 /* Table1977 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1136 /* Table1136 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1248 /* Table1248 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1250 /* Table1250 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1252 /* Table1252 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1254 /* Table1254 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1295 /* Table1295 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1297 /* Table1297 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1347 /* Table1347 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1348 /* Table1348 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1500 /* Table1500 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1501 /* Table1501 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1562 /* Table1562 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1564 /* Table1564 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1574 /* Table1574 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1679 /* Table1679 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1695 /* Table1695 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1767 /* Table1767 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1769 /* Table1769 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1771 /* Table1771 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1787 /* Table1787 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1789 /* Table1789 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1791 /* Table1791 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1793 /* Table1793 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1795 /* Table1795 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1797 /* Table1797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1799 /* Table1799 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1248 /* Table1248 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1250 /* Table1250 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1252 /* Table1252 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1254 /* Table1254 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1801 /* Table1801 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1803 /* Table1803 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1805 /* Table1805 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1807 /* Table1807 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1809 /* Table1809 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1811 /* Table1811 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1813 /* Table1813 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1815 /* Table1815 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1817 /* Table1817 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1819 /* Table1819 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1821 /* Table1821 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1823 /* Table1823 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1825 /* Table1825 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1827 /* Table1827 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1829 /* Table1829 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1831 /* Table1831 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1295 /* Table1295 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1297 /* Table1297 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1833 /* Table1833 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1834 /* Table1834 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1835 /* Table1835 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1836 /* Table1836 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1837 /* Table1837 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1838 /* Table1838 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1839 /* Table1839 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1840 /* Table1840 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1841 /* Table1841 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1842 /* Table1842 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1843 /* Table1843 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1844 /* Table1844 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1845 /* Table1845 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1851 /* Table1851 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1853 /* Table1853 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1855 /* Table1855 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1857 /* Table1857 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1858 /* Table1858 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1859 /* Table1859 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1861 /* Table1861 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1863 /* Table1863 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1865 /* Table1865 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1937 /* Table1937 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1939 /* Table1939 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1941 /* Table1941 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1943 /* Table1943 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1951 /* Table1951 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1977 /* Table1977 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1136 /* Table1136 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1248 /* Table1248 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1250 /* Table1250 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1252 /* Table1252 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1254 /* Table1254 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1295 /* Table1295 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1297 /* Table1297 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1347 /* Table1347 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1348 /* Table1348 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1500 /* Table1500 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1501 /* Table1501 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1562 /* Table1562 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1564 /* Table1564 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1574 /* Table1574 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1136 /* Table1136 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1248 /* Table1248 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1250 /* Table1250 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1252 /* Table1252 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1254 /* Table1254 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1295 /* Table1295 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1297 /* Table1297 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1347 /* Table1347 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1348 /* Table1348 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1500 /* Table1500 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1501 /* Table1501 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1997 /* Table1997 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2017 /* Table2017 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2033 /* Table2033 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2105 /* Table2105 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2107 /* Table2107 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2111 /* Table2111 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2113 /* Table2113 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2115 /* Table2115 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2117 /* Table2117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2119 /* Table2119 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2121 /* Table2121 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2123 /* Table2123 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2125 /* Table2125 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2127 /* Table2127 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2129 /* Table2129 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2131 /* Table2131 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2133 /* Table2133 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2135 /* Table2135 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2137 /* Table2137 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2139 /* Table2139 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2141 /* Table2141 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2143 /* Table2143 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2145 /* Table2145 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2147 /* Table2147 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2149 /* Table2149 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2151 /* Table2151 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2155 /* Table2155 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2171 /* Table2171 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2173 /* Table2173 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2175 /* Table2175 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2177 /* Table2177 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2179 /* Table2179 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2181 /* Table2181 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2183 /* Table2183 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2185 /* Table2185 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2187 /* Table2187 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2203 /* Table2203 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2205 /* Table2205 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2207 /* Table2207 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2209 /* Table2209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2211 /* Table2211 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2213 /* Table2213 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2215 /* Table2215 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2017 /* Table2017 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2033 /* Table2033 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2105 /* Table2105 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2107 /* Table2107 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1771 /* Table1771 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1787 /* Table1787 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1789 /* Table1789 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1791 /* Table1791 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1793 /* Table1793 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1795 /* Table1795 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1797 /* Table1797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1799 /* Table1799 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2111 /* Table2111 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2113 /* Table2113 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2115 /* Table2115 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2117 /* Table2117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2119 /* Table2119 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2121 /* Table2121 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2123 /* Table2123 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2125 /* Table2125 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2127 /* Table2127 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2129 /* Table2129 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2131 /* Table2131 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2133 /* Table2133 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2135 /* Table2135 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2137 /* Table2137 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2139 /* Table2139 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2141 /* Table2141 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1833 /* Table1833 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1834 /* Table1834 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1835 /* Table1835 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1836 /* Table1836 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1837 /* Table1837 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1838 /* Table1838 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1839 /* Table1839 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1840 /* Table1840 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1841 /* Table1841 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1842 /* Table1842 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1843 /* Table1843 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1844 /* Table1844 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1845 /* Table1845 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2143 /* Table2143 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2145 /* Table2145 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2147 /* Table2147 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1857 /* Table1857 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1858 /* Table1858 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2149 /* Table2149 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2151 /* Table2151 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2232 /* Table2232 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2171 /* Table2171 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2173 /* Table2173 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2175 /* Table2175 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2177 /* Table2177 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2179 /* Table2179 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2181 /* Table2181 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2183 /* Table2183 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2185 /* Table2185 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2187 /* Table2187 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2203 /* Table2203 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2205 /* Table2205 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2207 /* Table2207 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2209 /* Table2209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2211 /* Table2211 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2213 /* Table2213 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2304 /* Table2304 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1679 /* Table1679 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2320 /* Table2320 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1767 /* Table1767 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1769 /* Table1769 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1771 /* Table1771 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1787 /* Table1787 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1789 /* Table1789 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1791 /* Table1791 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1793 /* Table1793 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1795 /* Table1795 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1797 /* Table1797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1799 /* Table1799 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1801 /* Table1801 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1803 /* Table1803 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1805 /* Table1805 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1807 /* Table1807 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1809 /* Table1809 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1811 /* Table1811 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1813 /* Table1813 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1815 /* Table1815 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1817 /* Table1817 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1819 /* Table1819 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1821 /* Table1821 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1823 /* Table1823 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1825 /* Table1825 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1827 /* Table1827 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1829 /* Table1829 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1831 /* Table1831 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1833 /* Table1833 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1834 /* Table1834 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1835 /* Table1835 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1836 /* Table1836 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1837 /* Table1837 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1838 /* Table1838 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1839 /* Table1839 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1840 /* Table1840 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1841 /* Table1841 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1842 /* Table1842 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1843 /* Table1843 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1844 /* Table1844 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1845 /* Table1845 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1851 /* Table1851 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1853 /* Table1853 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1855 /* Table1855 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1857 /* Table1857 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1858 /* Table1858 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1859 /* Table1859 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1861 /* Table1861 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1863 /* Table1863 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1865 /* Table1865 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1937 /* Table1937 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1939 /* Table1939 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1941 /* Table1941 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1943 /* Table1943 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1951 /* Table1951 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1977 /* Table1977 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1591 /* Table1591 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1562 /* Table1562 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1564 /* Table1564 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1574 /* Table1574 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1679 /* Table1679 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2320 /* Table2320 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1767 /* Table1767 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1769 /* Table1769 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1771 /* Table1771 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1787 /* Table1787 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1789 /* Table1789 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1791 /* Table1791 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1793 /* Table1793 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1795 /* Table1795 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1797 /* Table1797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1799 /* Table1799 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1801 /* Table1801 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1803 /* Table1803 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1805 /* Table1805 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1807 /* Table1807 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1809 /* Table1809 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1811 /* Table1811 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1813 /* Table1813 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1815 /* Table1815 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1817 /* Table1817 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1819 /* Table1819 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1821 /* Table1821 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1823 /* Table1823 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1825 /* Table1825 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1827 /* Table1827 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1829 /* Table1829 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1831 /* Table1831 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1833 /* Table1833 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1834 /* Table1834 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1835 /* Table1835 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1836 /* Table1836 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1837 /* Table1837 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1838 /* Table1838 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1839 /* Table1839 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1840 /* Table1840 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1841 /* Table1841 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1842 /* Table1842 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1843 /* Table1843 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1844 /* Table1844 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1845 /* Table1845 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1851 /* Table1851 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1853 /* Table1853 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1855 /* Table1855 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1857 /* Table1857 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1858 /* Table1858 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1859 /* Table1859 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1861 /* Table1861 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1863 /* Table1863 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1865 /* Table1865 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1937 /* Table1937 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1939 /* Table1939 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1941 /* Table1941 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1943 /* Table1943 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1945 /* Table1945 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1947 /* Table1947 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1949 /* Table1949 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1951 /* Table1951 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1967 /* Table1967 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1969 /* Table1969 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1971 /* Table1971 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1973 /* Table1973 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1975 /* Table1975 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1977 /* Table1977 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1591 /* Table1591 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1509 /* Table1509 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1562 /* Table1562 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1564 /* Table1564 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1574 /* Table1574 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1120 /* Table1120 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1591 /* Table1591 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1208 /* Table1208 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1210 /* Table1210 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1214 /* Table1214 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1261 /* Table1261 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1263 /* Table1263 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1265 /* Table1265 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1267 /* Table1267 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1269 /* Table1269 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1271 /* Table1271 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1273 /* Table1273 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1275 /* Table1275 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1277 /* Table1277 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1279 /* Table1279 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1281 /* Table1281 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1283 /* Table1283 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1285 /* Table1285 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1287 /* Table1287 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1289 /* Table1289 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1291 /* Table1291 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1293 /* Table1293 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1350 /* Table1350 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1352 /* Table1352 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1354 /* Table1354 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1503 /* Table1503 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1505 /* Table1505 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1507 /* Table1507 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2392 /* Table2392 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1525 /* Table1525 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1529 /* Table1529 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1531 /* Table1531 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1533 /* Table1533 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1535 /* Table1535 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1537 /* Table1537 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1539 /* Table1539 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1541 /* Table1541 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1544 /* Table1544 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1560 /* Table1560 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1993 /* Table1993 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1995 /* Table1995 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1566 /* Table1566 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1568 /* Table1568 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1572 /* Table1572 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1997 /* Table1997 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1590 /* Table1590 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2013 /* Table2013 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2015 /* Table2015 */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2017 /* Table2017 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2033 /* Table2033 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2105 /* Table2105 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2107 /* Table2107 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2111 /* Table2111 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2113 /* Table2113 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2115 /* Table2115 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2117 /* Table2117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2119 /* Table2119 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2121 /* Table2121 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2123 /* Table2123 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2125 /* Table2125 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2127 /* Table2127 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2129 /* Table2129 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2131 /* Table2131 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2133 /* Table2133 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2135 /* Table2135 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2137 /* Table2137 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2139 /* Table2139 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2141 /* Table2141 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2143 /* Table2143 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2145 /* Table2145 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2147 /* Table2147 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2149 /* Table2149 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2151 /* Table2151 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2408 /* Table2408 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2171 /* Table2171 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2173 /* Table2173 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2175 /* Table2175 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2177 /* Table2177 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2179 /* Table2179 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2181 /* Table2181 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2183 /* Table2183 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2185 /* Table2185 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2187 /* Table2187 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2203 /* Table2203 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2424 /* Table2424 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2426 /* Table2426 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2209 /* Table2209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2211 /* Table2211 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2213 /* Table2213 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2428 /* Table2428 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2017 /* Table2017 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2033 /* Table2033 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2105 /* Table2105 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2107 /* Table2107 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1218 /* Table1218 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1234 /* Table1234 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1236 /* Table1236 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1238 /* Table1238 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1240 /* Table1240 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1242 /* Table1242 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1244 /* Table1244 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1246 /* Table1246 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2111 /* Table2111 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2113 /* Table2113 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2115 /* Table2115 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2117 /* Table2117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2119 /* Table2119 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2121 /* Table2121 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2123 /* Table2123 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2125 /* Table2125 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2127 /* Table2127 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2129 /* Table2129 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2131 /* Table2131 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2133 /* Table2133 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2135 /* Table2135 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2137 /* Table2137 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2139 /* Table2139 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2141 /* Table2141 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1299 /* Table1299 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1300 /* Table1300 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1301 /* Table1301 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1302 /* Table1302 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1303 /* Table1303 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1304 /* Table1304 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1305 /* Table1305 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1306 /* Table1306 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1307 /* Table1307 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1308 /* Table1308 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1309 /* Table1309 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1310 /* Table1310 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1311 /* Table1311 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1312 /* Table1312 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1313 /* Table1313 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1314 /* Table1314 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1675 /* Table1675 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1676 /* Table1676 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2143 /* Table2143 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2145 /* Table2145 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2147 /* Table2147 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1677 /* Table1677 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1678 /* Table1678 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2149 /* Table2149 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2151 /* Table2151 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2155 /* Table2155 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2171 /* Table2171 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2173 /* Table2173 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2175 /* Table2175 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2177 /* Table2177 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2179 /* Table2179 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2181 /* Table2181 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2183 /* Table2183 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2185 /* Table2185 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2187 /* Table2187 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2203 /* Table2203 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2205 /* Table2205 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2207 /* Table2207 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2209 /* Table2209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2211 /* Table2211 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2213 /* Table2213 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2215 /* Table2215 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2017 /* Table2017 */ }, /* 0x01 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2033 /* Table2033 */ }, /* 0x02 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2105 /* Table2105 */ }, /* 0x03 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2107 /* Table2107 */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1212 /* Table1212 */ }, /* 0x06 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1213 /* Table1213 */ }, /* 0x07 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2109 /* Table2109 */ }, /* 0x08 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1215 /* Table1215 */ }, /* 0x09 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1216 /* Table1216 */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1217 /* Table1217 */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 1771 /* Table1771 */ }, /* 0x19 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1787 /* Table1787 */ }, /* 0x1a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1789 /* Table1789 */ }, /* 0x1b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1791 /* Table1791 */ }, /* 0x1c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1793 /* Table1793 */ }, /* 0x1d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1795 /* Table1795 */ }, /* 0x1e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1797 /* Table1797 */ }, /* 0x1f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1799 /* Table1799 */ }, /* 0x20 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1663 /* Table1663 */ }, /* 0x21 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1665 /* Table1665 */ }, /* 0x22 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1667 /* Table1667 */ }, /* 0x23 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1669 /* Table1669 */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1256 /* Table1256 */ }, /* 0x31 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1257 /* Table1257 */ }, /* 0x32 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1258 /* Table1258 */ }, /* 0x33 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1259 /* Table1259 */ }, /* 0x34 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1260 /* Table1260 */ }, /* 0x35 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2110 /* Table2110 */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1262 /* Table1262 */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2111 /* Table2111 */ }, /* 0x41 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2113 /* Table2113 */ }, /* 0x42 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2115 /* Table2115 */ }, /* 0x43 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2117 /* Table2117 */ }, /* 0x44 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2119 /* Table2119 */ }, /* 0x45 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2121 /* Table2121 */ }, /* 0x46 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2123 /* Table2123 */ }, /* 0x47 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2125 /* Table2125 */ }, /* 0x48 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2127 /* Table2127 */ }, /* 0x49 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2129 /* Table2129 */ }, /* 0x4a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2131 /* Table2131 */ }, /* 0x4b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2133 /* Table2133 */ }, /* 0x4c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2135 /* Table2135 */ }, /* 0x4d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2137 /* Table2137 */ }, /* 0x4e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2139 /* Table2139 */ }, /* 0x4f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2141 /* Table2141 */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1671 /* Table1671 */ }, /* 0x79 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1673 /* Table1673 */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1833 /* Table1833 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1834 /* Table1834 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1835 /* Table1835 */ }, /* 0x83 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1836 /* Table1836 */ }, /* 0x84 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1837 /* Table1837 */ }, /* 0x85 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1838 /* Table1838 */ }, /* 0x86 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1839 /* Table1839 */ }, /* 0x87 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1840 /* Table1840 */ }, /* 0x88 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1841 /* Table1841 */ }, /* 0x89 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1842 /* Table1842 */ }, /* 0x8a */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1843 /* Table1843 */ }, /* 0x8b */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1844 /* Table1844 */ }, /* 0x8c */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1845 /* Table1845 */ }, /* 0x8d */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1846 /* Table1846 */ }, /* 0x8e */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1847 /* Table1847 */ }, /* 0x8f */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1848 /* Table1848 */ }, /* 0x90 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1315 /* Table1315 */ }, /* 0x91 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1317 /* Table1317 */ }, /* 0x92 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1319 /* Table1319 */ }, /* 0x93 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1321 /* Table1321 */ }, /* 0x94 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1323 /* Table1323 */ }, /* 0x95 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1325 /* Table1325 */ }, /* 0x96 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1327 /* Table1327 */ }, /* 0x97 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1329 /* Table1329 */ }, /* 0x98 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1331 /* Table1331 */ }, /* 0x99 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1333 /* Table1333 */ }, /* 0x9a */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1335 /* Table1335 */ }, /* 0x9b */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1337 /* Table1337 */ }, /* 0x9c */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1339 /* Table1339 */ }, /* 0x9d */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1341 /* Table1341 */ }, /* 0x9e */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1343 /* Table1343 */ }, /* 0x9f */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1345 /* Table1345 */ }, /* 0xa0 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1849 /* Table1849 */ }, /* 0xa1 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1850 /* Table1850 */ }, /* 0xa2 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1349 /* Table1349 */ }, /* 0xa3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2143 /* Table2143 */ }, /* 0xa4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2145 /* Table2145 */ }, /* 0xa5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2147 /* Table2147 */ }, /* 0xa6 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1356 /* Table1356 */ }, /* 0xa7 */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 1428 /* Table1428 */ }, /* 0xa8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1857 /* Table1857 */ }, /* 0xa9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1858 /* Table1858 */ }, /* 0xaa */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1502 /* Table1502 */ }, /* 0xab */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2149 /* Table2149 */ }, /* 0xac */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2151 /* Table2151 */ }, /* 0xad */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2153 /* Table2153 */ }, /* 0xae */ { /* struct ModRMDecision */ MODRM_SPLITMISC, 2232 /* Table2232 */ }, /* 0xaf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2171 /* Table2171 */ }, /* 0xb0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1527 /* Table1527 */ }, /* 0xb1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2173 /* Table2173 */ }, /* 0xb2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2175 /* Table2175 */ }, /* 0xb3 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2177 /* Table2177 */ }, /* 0xb4 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2179 /* Table2179 */ }, /* 0xb5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2181 /* Table2181 */ }, /* 0xb6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2183 /* Table2183 */ }, /* 0xb7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2185 /* Table2185 */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 1543 /* Table1543 */ }, /* 0xba */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2187 /* Table2187 */ }, /* 0xbb */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2203 /* Table2203 */ }, /* 0xbc */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2205 /* Table2205 */ }, /* 0xbd */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2207 /* Table2207 */ }, /* 0xbe */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2209 /* Table2209 */ }, /* 0xbf */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2211 /* Table2211 */ }, /* 0xc0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 1570 /* Table1570 */ }, /* 0xc1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2213 /* Table2213 */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2304 /* Table2304 */ }, /* 0xc8 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xc9 */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xca */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcb */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcc */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcd */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xce */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xcf */ { /* struct ModRMDecision */ MODRM_ONEENTRY, 2231 /* Table2231 */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerTwoByteOpcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 16, 17, 18, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerThreeByte38Opcodes[] = { /* IC */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2448 /* Table2448 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2450 /* Table2450 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2452 /* Table2452 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2454 /* Table2454 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2456 /* Table2456 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2458 /* Table2458 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2448 /* Table2448 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2450 /* Table2450 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2452 /* Table2452 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2454 /* Table2454 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2456 /* Table2456 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2458 /* Table2458 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2458 /* Table2458 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2454 /* Table2454 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2456 /* Table2456 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2458 /* Table2458 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_OPSIZE_ADSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2454 /* Table2454 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2456 /* Table2456 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2458 /* Table2458 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2444 /* Table2444 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2446 /* Table2446 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2460 /* Table2460 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2472 /* Table2472 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_64BIT_REXW_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2466 /* Table2466 */ }, /* 0x81 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2468 /* Table2468 */ }, /* 0x82 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2470 /* Table2470 */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2462 /* Table2462 */ }, /* 0xf1 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2464 /* Table2464 */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2474 /* Table2474 */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2476 /* Table2476 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2478 /* Table2478 */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2494 /* Table2494 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2496 /* Table2496 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2498 /* Table2498 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2500 /* Table2500 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2502 /* Table2502 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2504 /* Table2504 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2506 /* Table2506 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2508 /* Table2508 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2510 /* Table2510 */ }, /* 0xf3 */ { /* struct ModRMDecision */ MODRM_SPLITREG, 2512 /* Table2512 */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2528 /* Table2528 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2530 /* Table2530 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XS */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2532 /* Table2532 */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2534 /* Table2534 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2536 /* Table2536 */ }, /* 0xf6 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2538 /* Table2538 */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2540 /* Table2540 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_OPSIZE */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2542 /* Table2542 */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerThreeByte38Opcodes[] = { 1, 2, 3, 4, 0, 5, 6, 7, 0, 0, 8, 9, 10, 11, 12, 13, 14, 0, 0, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const struct OpcodeDecision x86DisassemblerThreeByte3AOpcodes[] = { /* IC_VEX_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2544 /* Table2544 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_VEX_W_XD */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* struct ModRMDecision */ MODRM_SPLITRM, 2546 /* Table2546 */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , /* IC_OF */ { /* struct OpcodeDecision */ { /* 0x00 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x01 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x02 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x03 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x04 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x05 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x06 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x07 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x08 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x09 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x0f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x10 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x11 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x12 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x13 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x14 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x15 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x16 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x17 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x18 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x19 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x1f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x20 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x21 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x22 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x23 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x24 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x25 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x26 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x27 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x28 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x29 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x2f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x30 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x31 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x32 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x33 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x34 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x35 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x36 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x37 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x38 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x39 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x3f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x40 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x41 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x42 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x43 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x44 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x45 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x46 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x47 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x48 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x49 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x4f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x50 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x51 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x52 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x53 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x54 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x55 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x56 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x57 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x58 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x59 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x5f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x60 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x61 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x62 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x63 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x64 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x65 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x66 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x67 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x68 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x69 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x6f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x70 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x71 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x72 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x73 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x74 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x75 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x76 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x77 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x78 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x79 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x7f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x80 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x81 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x82 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x83 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x84 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x85 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x86 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x87 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x88 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x89 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x8f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x90 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x91 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x92 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x93 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x94 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x95 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x96 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x97 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x98 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x99 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9a */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9b */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9c */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9d */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9e */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0x9f */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xa9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xab */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xac */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xad */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xae */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xaf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xb9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xba */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xbf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xc9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xca */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xce */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xcf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xd9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xda */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xde */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xdf */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xe9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xea */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xeb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xec */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xed */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xee */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xef */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf0 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf1 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf2 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf3 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf4 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf5 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf6 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf7 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf8 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xf9 */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfa */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfb */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfc */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfd */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xfe */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ }, /* 0xff */ { /* ModRMDecision */ MODRM_ONEENTRY, 0 /* EmptyTable */ } } } , }; static const uint8_t index_x86DisassemblerThreeByte3AOpcodes[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; capstone-sys-0.11.0/capstone/arch/X86/X86GenInstrInfo.inc010066400017500001750000013336171363402546700211600ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { X86_PHI = 0, X86_INLINEASM = 1, X86_CFI_INSTRUCTION = 2, X86_EH_LABEL = 3, X86_GC_LABEL = 4, X86_KILL = 5, X86_EXTRACT_SUBREG = 6, X86_INSERT_SUBREG = 7, X86_IMPLICIT_DEF = 8, X86_SUBREG_TO_REG = 9, X86_COPY_TO_REGCLASS = 10, X86_DBG_VALUE = 11, X86_REG_SEQUENCE = 12, X86_COPY = 13, X86_BUNDLE = 14, X86_LIFETIME_START = 15, X86_LIFETIME_END = 16, X86_STACKMAP = 17, X86_PATCHPOINT = 18, X86_LOAD_STACK_GUARD = 19, X86_STATEPOINT = 20, X86_FRAME_ALLOC = 21, X86_AAA = 22, X86_AAD8i8 = 23, X86_AAM8i8 = 24, X86_AAS = 25, X86_ABS_F = 26, X86_ABS_Fp32 = 27, X86_ABS_Fp64 = 28, X86_ABS_Fp80 = 29, X86_ACQUIRE_MOV16rm = 30, X86_ACQUIRE_MOV32rm = 31, X86_ACQUIRE_MOV64rm = 32, X86_ACQUIRE_MOV8rm = 33, X86_ADC16i16 = 34, X86_ADC16mi = 35, X86_ADC16mi8 = 36, X86_ADC16mr = 37, X86_ADC16ri = 38, X86_ADC16ri8 = 39, X86_ADC16rm = 40, X86_ADC16rr = 41, X86_ADC16rr_REV = 42, X86_ADC32i32 = 43, X86_ADC32mi = 44, X86_ADC32mi8 = 45, X86_ADC32mr = 46, X86_ADC32ri = 47, X86_ADC32ri8 = 48, X86_ADC32rm = 49, X86_ADC32rr = 50, X86_ADC32rr_REV = 51, X86_ADC64i32 = 52, X86_ADC64mi32 = 53, X86_ADC64mi8 = 54, X86_ADC64mr = 55, X86_ADC64ri32 = 56, X86_ADC64ri8 = 57, X86_ADC64rm = 58, X86_ADC64rr = 59, X86_ADC64rr_REV = 60, X86_ADC8i8 = 61, X86_ADC8mi = 62, X86_ADC8mi8 = 63, X86_ADC8mr = 64, X86_ADC8ri = 65, X86_ADC8ri8 = 66, X86_ADC8rm = 67, X86_ADC8rr = 68, X86_ADC8rr_REV = 69, X86_ADCX32rm = 70, X86_ADCX32rr = 71, X86_ADCX64rm = 72, X86_ADCX64rr = 73, X86_ADD16i16 = 74, X86_ADD16mi = 75, X86_ADD16mi8 = 76, X86_ADD16mr = 77, X86_ADD16ri = 78, X86_ADD16ri8 = 79, X86_ADD16ri8_DB = 80, X86_ADD16ri_DB = 81, X86_ADD16rm = 82, X86_ADD16rr = 83, X86_ADD16rr_DB = 84, X86_ADD16rr_REV = 85, X86_ADD32i32 = 86, X86_ADD32mi = 87, X86_ADD32mi8 = 88, X86_ADD32mr = 89, X86_ADD32ri = 90, X86_ADD32ri8 = 91, X86_ADD32ri8_DB = 92, X86_ADD32ri_DB = 93, X86_ADD32rm = 94, X86_ADD32rr = 95, X86_ADD32rr_DB = 96, X86_ADD32rr_REV = 97, X86_ADD64i32 = 98, X86_ADD64mi32 = 99, X86_ADD64mi8 = 100, X86_ADD64mr = 101, X86_ADD64ri32 = 102, X86_ADD64ri32_DB = 103, X86_ADD64ri8 = 104, X86_ADD64ri8_DB = 105, X86_ADD64rm = 106, X86_ADD64rr = 107, X86_ADD64rr_DB = 108, X86_ADD64rr_REV = 109, X86_ADD8i8 = 110, X86_ADD8mi = 111, X86_ADD8mi8 = 112, X86_ADD8mr = 113, X86_ADD8ri = 114, X86_ADD8ri8 = 115, X86_ADD8rm = 116, X86_ADD8rr = 117, X86_ADD8rr_REV = 118, X86_ADDPDrm = 119, X86_ADDPDrr = 120, X86_ADDPSrm = 121, X86_ADDPSrr = 122, X86_ADDSDrm = 123, X86_ADDSDrm_Int = 124, X86_ADDSDrr = 125, X86_ADDSDrr_Int = 126, X86_ADDSSrm = 127, X86_ADDSSrm_Int = 128, X86_ADDSSrr = 129, X86_ADDSSrr_Int = 130, X86_ADDSUBPDrm = 131, X86_ADDSUBPDrr = 132, X86_ADDSUBPSrm = 133, X86_ADDSUBPSrr = 134, X86_ADD_F32m = 135, X86_ADD_F64m = 136, X86_ADD_FI16m = 137, X86_ADD_FI32m = 138, X86_ADD_FPrST0 = 139, X86_ADD_FST0r = 140, X86_ADD_Fp32 = 141, X86_ADD_Fp32m = 142, X86_ADD_Fp64 = 143, X86_ADD_Fp64m = 144, X86_ADD_Fp64m32 = 145, X86_ADD_Fp80 = 146, X86_ADD_Fp80m32 = 147, X86_ADD_Fp80m64 = 148, X86_ADD_FpI16m32 = 149, X86_ADD_FpI16m64 = 150, X86_ADD_FpI16m80 = 151, X86_ADD_FpI32m32 = 152, X86_ADD_FpI32m64 = 153, X86_ADD_FpI32m80 = 154, X86_ADD_FrST0 = 155, X86_ADJCALLSTACKDOWN32 = 156, X86_ADJCALLSTACKDOWN64 = 157, X86_ADJCALLSTACKUP32 = 158, X86_ADJCALLSTACKUP64 = 159, X86_ADOX32rm = 160, X86_ADOX32rr = 161, X86_ADOX64rm = 162, X86_ADOX64rr = 163, X86_AESDECLASTrm = 164, X86_AESDECLASTrr = 165, X86_AESDECrm = 166, X86_AESDECrr = 167, X86_AESENCLASTrm = 168, X86_AESENCLASTrr = 169, X86_AESENCrm = 170, X86_AESENCrr = 171, X86_AESIMCrm = 172, X86_AESIMCrr = 173, X86_AESKEYGENASSIST128rm = 174, X86_AESKEYGENASSIST128rr = 175, X86_AND16i16 = 176, X86_AND16mi = 177, X86_AND16mi8 = 178, X86_AND16mr = 179, X86_AND16ri = 180, X86_AND16ri8 = 181, X86_AND16rm = 182, X86_AND16rr = 183, X86_AND16rr_REV = 184, X86_AND32i32 = 185, X86_AND32mi = 186, X86_AND32mi8 = 187, X86_AND32mr = 188, X86_AND32ri = 189, X86_AND32ri8 = 190, X86_AND32rm = 191, X86_AND32rr = 192, X86_AND32rr_REV = 193, X86_AND64i32 = 194, X86_AND64mi32 = 195, X86_AND64mi8 = 196, X86_AND64mr = 197, X86_AND64ri32 = 198, X86_AND64ri8 = 199, X86_AND64rm = 200, X86_AND64rr = 201, X86_AND64rr_REV = 202, X86_AND8i8 = 203, X86_AND8mi = 204, X86_AND8mi8 = 205, X86_AND8mr = 206, X86_AND8ri = 207, X86_AND8ri8 = 208, X86_AND8rm = 209, X86_AND8rr = 210, X86_AND8rr_REV = 211, X86_ANDN32rm = 212, X86_ANDN32rr = 213, X86_ANDN64rm = 214, X86_ANDN64rr = 215, X86_ANDNPDrm = 216, X86_ANDNPDrr = 217, X86_ANDNPSrm = 218, X86_ANDNPSrr = 219, X86_ANDPDrm = 220, X86_ANDPDrr = 221, X86_ANDPSrm = 222, X86_ANDPSrr = 223, X86_ARPL16mr = 224, X86_ARPL16rr = 225, X86_AVX2_SETALLONES = 226, X86_AVX512_512_SET0 = 227, X86_AVX_SET0 = 228, X86_BEXTR32rm = 229, X86_BEXTR32rr = 230, X86_BEXTR64rm = 231, X86_BEXTR64rr = 232, X86_BEXTRI32mi = 233, X86_BEXTRI32ri = 234, X86_BEXTRI64mi = 235, X86_BEXTRI64ri = 236, X86_BLCFILL32rm = 237, X86_BLCFILL32rr = 238, X86_BLCFILL64rm = 239, X86_BLCFILL64rr = 240, X86_BLCI32rm = 241, X86_BLCI32rr = 242, X86_BLCI64rm = 243, X86_BLCI64rr = 244, X86_BLCIC32rm = 245, X86_BLCIC32rr = 246, X86_BLCIC64rm = 247, X86_BLCIC64rr = 248, X86_BLCMSK32rm = 249, X86_BLCMSK32rr = 250, X86_BLCMSK64rm = 251, X86_BLCMSK64rr = 252, X86_BLCS32rm = 253, X86_BLCS32rr = 254, X86_BLCS64rm = 255, X86_BLCS64rr = 256, X86_BLENDPDrmi = 257, X86_BLENDPDrri = 258, X86_BLENDPSrmi = 259, X86_BLENDPSrri = 260, X86_BLENDVPDrm0 = 261, X86_BLENDVPDrr0 = 262, X86_BLENDVPSrm0 = 263, X86_BLENDVPSrr0 = 264, X86_BLSFILL32rm = 265, X86_BLSFILL32rr = 266, X86_BLSFILL64rm = 267, X86_BLSFILL64rr = 268, X86_BLSI32rm = 269, X86_BLSI32rr = 270, X86_BLSI64rm = 271, X86_BLSI64rr = 272, X86_BLSIC32rm = 273, X86_BLSIC32rr = 274, X86_BLSIC64rm = 275, X86_BLSIC64rr = 276, X86_BLSMSK32rm = 277, X86_BLSMSK32rr = 278, X86_BLSMSK64rm = 279, X86_BLSMSK64rr = 280, X86_BLSR32rm = 281, X86_BLSR32rr = 282, X86_BLSR64rm = 283, X86_BLSR64rr = 284, X86_BOUNDS16rm = 285, X86_BOUNDS32rm = 286, X86_BSF16rm = 287, X86_BSF16rr = 288, X86_BSF32rm = 289, X86_BSF32rr = 290, X86_BSF64rm = 291, X86_BSF64rr = 292, X86_BSR16rm = 293, X86_BSR16rr = 294, X86_BSR32rm = 295, X86_BSR32rr = 296, X86_BSR64rm = 297, X86_BSR64rr = 298, X86_BSWAP32r = 299, X86_BSWAP64r = 300, X86_BT16mi8 = 301, X86_BT16mr = 302, X86_BT16ri8 = 303, X86_BT16rr = 304, X86_BT32mi8 = 305, X86_BT32mr = 306, X86_BT32ri8 = 307, X86_BT32rr = 308, X86_BT64mi8 = 309, X86_BT64mr = 310, X86_BT64ri8 = 311, X86_BT64rr = 312, X86_BTC16mi8 = 313, X86_BTC16mr = 314, X86_BTC16ri8 = 315, X86_BTC16rr = 316, X86_BTC32mi8 = 317, X86_BTC32mr = 318, X86_BTC32ri8 = 319, X86_BTC32rr = 320, X86_BTC64mi8 = 321, X86_BTC64mr = 322, X86_BTC64ri8 = 323, X86_BTC64rr = 324, X86_BTR16mi8 = 325, X86_BTR16mr = 326, X86_BTR16ri8 = 327, X86_BTR16rr = 328, X86_BTR32mi8 = 329, X86_BTR32mr = 330, X86_BTR32ri8 = 331, X86_BTR32rr = 332, X86_BTR64mi8 = 333, X86_BTR64mr = 334, X86_BTR64ri8 = 335, X86_BTR64rr = 336, X86_BTS16mi8 = 337, X86_BTS16mr = 338, X86_BTS16ri8 = 339, X86_BTS16rr = 340, X86_BTS32mi8 = 341, X86_BTS32mr = 342, X86_BTS32ri8 = 343, X86_BTS32rr = 344, X86_BTS64mi8 = 345, X86_BTS64mr = 346, X86_BTS64ri8 = 347, X86_BTS64rr = 348, X86_BZHI32rm = 349, X86_BZHI32rr = 350, X86_BZHI64rm = 351, X86_BZHI64rr = 352, X86_CALL16m = 353, X86_CALL16r = 354, X86_CALL32m = 355, X86_CALL32r = 356, X86_CALL64m = 357, X86_CALL64pcrel32 = 358, X86_CALL64r = 359, X86_CALLpcrel16 = 360, X86_CALLpcrel32 = 361, X86_CBW = 362, X86_CDQ = 363, X86_CDQE = 364, X86_CHS_F = 365, X86_CHS_Fp32 = 366, X86_CHS_Fp64 = 367, X86_CHS_Fp80 = 368, X86_CLAC = 369, X86_CLC = 370, X86_CLD = 371, X86_CLFLUSH = 372, X86_CLFLUSHOPT = 373, X86_CLGI = 374, X86_CLI = 375, X86_CLTS = 376, X86_CLWB = 377, X86_CMC = 378, X86_CMOVA16rm = 379, X86_CMOVA16rr = 380, X86_CMOVA32rm = 381, X86_CMOVA32rr = 382, X86_CMOVA64rm = 383, X86_CMOVA64rr = 384, X86_CMOVAE16rm = 385, X86_CMOVAE16rr = 386, X86_CMOVAE32rm = 387, X86_CMOVAE32rr = 388, X86_CMOVAE64rm = 389, X86_CMOVAE64rr = 390, X86_CMOVB16rm = 391, X86_CMOVB16rr = 392, X86_CMOVB32rm = 393, X86_CMOVB32rr = 394, X86_CMOVB64rm = 395, X86_CMOVB64rr = 396, X86_CMOVBE16rm = 397, X86_CMOVBE16rr = 398, X86_CMOVBE32rm = 399, X86_CMOVBE32rr = 400, X86_CMOVBE64rm = 401, X86_CMOVBE64rr = 402, X86_CMOVBE_F = 403, X86_CMOVBE_Fp32 = 404, X86_CMOVBE_Fp64 = 405, X86_CMOVBE_Fp80 = 406, X86_CMOVB_F = 407, X86_CMOVB_Fp32 = 408, X86_CMOVB_Fp64 = 409, X86_CMOVB_Fp80 = 410, X86_CMOVE16rm = 411, X86_CMOVE16rr = 412, X86_CMOVE32rm = 413, X86_CMOVE32rr = 414, X86_CMOVE64rm = 415, X86_CMOVE64rr = 416, X86_CMOVE_F = 417, X86_CMOVE_Fp32 = 418, X86_CMOVE_Fp64 = 419, X86_CMOVE_Fp80 = 420, X86_CMOVG16rm = 421, X86_CMOVG16rr = 422, X86_CMOVG32rm = 423, X86_CMOVG32rr = 424, X86_CMOVG64rm = 425, X86_CMOVG64rr = 426, X86_CMOVGE16rm = 427, X86_CMOVGE16rr = 428, X86_CMOVGE32rm = 429, X86_CMOVGE32rr = 430, X86_CMOVGE64rm = 431, X86_CMOVGE64rr = 432, X86_CMOVL16rm = 433, X86_CMOVL16rr = 434, X86_CMOVL32rm = 435, X86_CMOVL32rr = 436, X86_CMOVL64rm = 437, X86_CMOVL64rr = 438, X86_CMOVLE16rm = 439, X86_CMOVLE16rr = 440, X86_CMOVLE32rm = 441, X86_CMOVLE32rr = 442, X86_CMOVLE64rm = 443, X86_CMOVLE64rr = 444, X86_CMOVNBE_F = 445, X86_CMOVNBE_Fp32 = 446, X86_CMOVNBE_Fp64 = 447, X86_CMOVNBE_Fp80 = 448, X86_CMOVNB_F = 449, X86_CMOVNB_Fp32 = 450, X86_CMOVNB_Fp64 = 451, X86_CMOVNB_Fp80 = 452, X86_CMOVNE16rm = 453, X86_CMOVNE16rr = 454, X86_CMOVNE32rm = 455, X86_CMOVNE32rr = 456, X86_CMOVNE64rm = 457, X86_CMOVNE64rr = 458, X86_CMOVNE_F = 459, X86_CMOVNE_Fp32 = 460, X86_CMOVNE_Fp64 = 461, X86_CMOVNE_Fp80 = 462, X86_CMOVNO16rm = 463, X86_CMOVNO16rr = 464, X86_CMOVNO32rm = 465, X86_CMOVNO32rr = 466, X86_CMOVNO64rm = 467, X86_CMOVNO64rr = 468, X86_CMOVNP16rm = 469, X86_CMOVNP16rr = 470, X86_CMOVNP32rm = 471, X86_CMOVNP32rr = 472, X86_CMOVNP64rm = 473, X86_CMOVNP64rr = 474, X86_CMOVNP_F = 475, X86_CMOVNP_Fp32 = 476, X86_CMOVNP_Fp64 = 477, X86_CMOVNP_Fp80 = 478, X86_CMOVNS16rm = 479, X86_CMOVNS16rr = 480, X86_CMOVNS32rm = 481, X86_CMOVNS32rr = 482, X86_CMOVNS64rm = 483, X86_CMOVNS64rr = 484, X86_CMOVO16rm = 485, X86_CMOVO16rr = 486, X86_CMOVO32rm = 487, X86_CMOVO32rr = 488, X86_CMOVO64rm = 489, X86_CMOVO64rr = 490, X86_CMOVP16rm = 491, X86_CMOVP16rr = 492, X86_CMOVP32rm = 493, X86_CMOVP32rr = 494, X86_CMOVP64rm = 495, X86_CMOVP64rr = 496, X86_CMOVP_F = 497, X86_CMOVP_Fp32 = 498, X86_CMOVP_Fp64 = 499, X86_CMOVP_Fp80 = 500, X86_CMOVS16rm = 501, X86_CMOVS16rr = 502, X86_CMOVS32rm = 503, X86_CMOVS32rr = 504, X86_CMOVS64rm = 505, X86_CMOVS64rr = 506, X86_CMOV_FR32 = 507, X86_CMOV_FR64 = 508, X86_CMOV_GR16 = 509, X86_CMOV_GR32 = 510, X86_CMOV_GR8 = 511, X86_CMOV_RFP32 = 512, X86_CMOV_RFP64 = 513, X86_CMOV_RFP80 = 514, X86_CMOV_V16F32 = 515, X86_CMOV_V2F64 = 516, X86_CMOV_V2I64 = 517, X86_CMOV_V4F32 = 518, X86_CMOV_V4F64 = 519, X86_CMOV_V4I64 = 520, X86_CMOV_V8F32 = 521, X86_CMOV_V8F64 = 522, X86_CMOV_V8I64 = 523, X86_CMP16i16 = 524, X86_CMP16mi = 525, X86_CMP16mi8 = 526, X86_CMP16mr = 527, X86_CMP16ri = 528, X86_CMP16ri8 = 529, X86_CMP16rm = 530, X86_CMP16rr = 531, X86_CMP16rr_REV = 532, X86_CMP32i32 = 533, X86_CMP32mi = 534, X86_CMP32mi8 = 535, X86_CMP32mr = 536, X86_CMP32ri = 537, X86_CMP32ri8 = 538, X86_CMP32rm = 539, X86_CMP32rr = 540, X86_CMP32rr_REV = 541, X86_CMP64i32 = 542, X86_CMP64mi32 = 543, X86_CMP64mi8 = 544, X86_CMP64mr = 545, X86_CMP64ri32 = 546, X86_CMP64ri8 = 547, X86_CMP64rm = 548, X86_CMP64rr = 549, X86_CMP64rr_REV = 550, X86_CMP8i8 = 551, X86_CMP8mi = 552, X86_CMP8mi8 = 553, X86_CMP8mr = 554, X86_CMP8ri = 555, X86_CMP8ri8 = 556, X86_CMP8rm = 557, X86_CMP8rr = 558, X86_CMP8rr_REV = 559, X86_CMPPDrmi = 560, X86_CMPPDrmi_alt = 561, X86_CMPPDrri = 562, X86_CMPPDrri_alt = 563, X86_CMPPSrmi = 564, X86_CMPPSrmi_alt = 565, X86_CMPPSrri = 566, X86_CMPPSrri_alt = 567, X86_CMPSB = 568, X86_CMPSDrm = 569, X86_CMPSDrm_alt = 570, X86_CMPSDrr = 571, X86_CMPSDrr_alt = 572, X86_CMPSL = 573, X86_CMPSQ = 574, X86_CMPSSrm = 575, X86_CMPSSrm_alt = 576, X86_CMPSSrr = 577, X86_CMPSSrr_alt = 578, X86_CMPSW = 579, X86_CMPXCHG16B = 580, X86_CMPXCHG16rm = 581, X86_CMPXCHG16rr = 582, X86_CMPXCHG32rm = 583, X86_CMPXCHG32rr = 584, X86_CMPXCHG64rm = 585, X86_CMPXCHG64rr = 586, X86_CMPXCHG8B = 587, X86_CMPXCHG8rm = 588, X86_CMPXCHG8rr = 589, X86_COMISDrm = 590, X86_COMISDrr = 591, X86_COMISSrm = 592, X86_COMISSrr = 593, X86_COMP_FST0r = 594, X86_COM_FIPr = 595, X86_COM_FIr = 596, X86_COM_FST0r = 597, X86_COS_F = 598, X86_COS_Fp32 = 599, X86_COS_Fp64 = 600, X86_COS_Fp80 = 601, X86_CPUID = 602, X86_CQO = 603, X86_CRC32r32m16 = 604, X86_CRC32r32m32 = 605, X86_CRC32r32m8 = 606, X86_CRC32r32r16 = 607, X86_CRC32r32r32 = 608, X86_CRC32r32r8 = 609, X86_CRC32r64m64 = 610, X86_CRC32r64m8 = 611, X86_CRC32r64r64 = 612, X86_CRC32r64r8 = 613, X86_CVTDQ2PDrm = 614, X86_CVTDQ2PDrr = 615, X86_CVTDQ2PSrm = 616, X86_CVTDQ2PSrr = 617, X86_CVTPD2DQrm = 618, X86_CVTPD2DQrr = 619, X86_CVTPD2PSrm = 620, X86_CVTPD2PSrr = 621, X86_CVTPS2DQrm = 622, X86_CVTPS2DQrr = 623, X86_CVTPS2PDrm = 624, X86_CVTPS2PDrr = 625, X86_CVTSD2SI64rm = 626, X86_CVTSD2SI64rr = 627, X86_CVTSD2SIrm = 628, X86_CVTSD2SIrr = 629, X86_CVTSD2SSrm = 630, X86_CVTSD2SSrr = 631, X86_CVTSI2SD64rm = 632, X86_CVTSI2SD64rr = 633, X86_CVTSI2SDrm = 634, X86_CVTSI2SDrr = 635, X86_CVTSI2SS64rm = 636, X86_CVTSI2SS64rr = 637, X86_CVTSI2SSrm = 638, X86_CVTSI2SSrr = 639, X86_CVTSS2SDrm = 640, X86_CVTSS2SDrr = 641, X86_CVTSS2SI64rm = 642, X86_CVTSS2SI64rr = 643, X86_CVTSS2SIrm = 644, X86_CVTSS2SIrr = 645, X86_CVTTPD2DQrm = 646, X86_CVTTPD2DQrr = 647, X86_CVTTPS2DQrm = 648, X86_CVTTPS2DQrr = 649, X86_CVTTSD2SI64rm = 650, X86_CVTTSD2SI64rr = 651, X86_CVTTSD2SIrm = 652, X86_CVTTSD2SIrr = 653, X86_CVTTSS2SI64rm = 654, X86_CVTTSS2SI64rr = 655, X86_CVTTSS2SIrm = 656, X86_CVTTSS2SIrr = 657, X86_CWD = 658, X86_CWDE = 659, X86_DAA = 660, X86_DAS = 661, X86_DATA16_PREFIX = 662, X86_DEC16m = 663, X86_DEC16r = 664, X86_DEC16r_alt = 665, X86_DEC32m = 666, X86_DEC32r = 667, X86_DEC32r_alt = 668, X86_DEC64m = 669, X86_DEC64r = 670, X86_DEC8m = 671, X86_DEC8r = 672, X86_DIV16m = 673, X86_DIV16r = 674, X86_DIV32m = 675, X86_DIV32r = 676, X86_DIV64m = 677, X86_DIV64r = 678, X86_DIV8m = 679, X86_DIV8r = 680, X86_DIVPDrm = 681, X86_DIVPDrr = 682, X86_DIVPSrm = 683, X86_DIVPSrr = 684, X86_DIVR_F32m = 685, X86_DIVR_F64m = 686, X86_DIVR_FI16m = 687, X86_DIVR_FI32m = 688, X86_DIVR_FPrST0 = 689, X86_DIVR_FST0r = 690, X86_DIVR_Fp32m = 691, X86_DIVR_Fp64m = 692, X86_DIVR_Fp64m32 = 693, X86_DIVR_Fp80m32 = 694, X86_DIVR_Fp80m64 = 695, X86_DIVR_FpI16m32 = 696, X86_DIVR_FpI16m64 = 697, X86_DIVR_FpI16m80 = 698, X86_DIVR_FpI32m32 = 699, X86_DIVR_FpI32m64 = 700, X86_DIVR_FpI32m80 = 701, X86_DIVR_FrST0 = 702, X86_DIVSDrm = 703, X86_DIVSDrm_Int = 704, X86_DIVSDrr = 705, X86_DIVSDrr_Int = 706, X86_DIVSSrm = 707, X86_DIVSSrm_Int = 708, X86_DIVSSrr = 709, X86_DIVSSrr_Int = 710, X86_DIV_F32m = 711, X86_DIV_F64m = 712, X86_DIV_FI16m = 713, X86_DIV_FI32m = 714, X86_DIV_FPrST0 = 715, X86_DIV_FST0r = 716, X86_DIV_Fp32 = 717, X86_DIV_Fp32m = 718, X86_DIV_Fp64 = 719, X86_DIV_Fp64m = 720, X86_DIV_Fp64m32 = 721, X86_DIV_Fp80 = 722, X86_DIV_Fp80m32 = 723, X86_DIV_Fp80m64 = 724, X86_DIV_FpI16m32 = 725, X86_DIV_FpI16m64 = 726, X86_DIV_FpI16m80 = 727, X86_DIV_FpI32m32 = 728, X86_DIV_FpI32m64 = 729, X86_DIV_FpI32m80 = 730, X86_DIV_FrST0 = 731, X86_DPPDrmi = 732, X86_DPPDrri = 733, X86_DPPSrmi = 734, X86_DPPSrri = 735, X86_EH_RETURN = 736, X86_EH_RETURN64 = 737, X86_EH_SjLj_LongJmp32 = 738, X86_EH_SjLj_LongJmp64 = 739, X86_EH_SjLj_SetJmp32 = 740, X86_EH_SjLj_SetJmp64 = 741, X86_EH_SjLj_Setup = 742, X86_ENCLS = 743, X86_ENCLU = 744, X86_ENTER = 745, X86_EXTRACTPSmr = 746, X86_EXTRACTPSrr = 747, X86_EXTRQ = 748, X86_EXTRQI = 749, X86_F2XM1 = 750, X86_FARCALL16i = 751, X86_FARCALL16m = 752, X86_FARCALL32i = 753, X86_FARCALL32m = 754, X86_FARCALL64 = 755, X86_FARJMP16i = 756, X86_FARJMP16m = 757, X86_FARJMP32i = 758, X86_FARJMP32m = 759, X86_FARJMP64 = 760, X86_FBLDm = 761, X86_FBSTPm = 762, X86_FCOM32m = 763, X86_FCOM64m = 764, X86_FCOMP32m = 765, X86_FCOMP64m = 766, X86_FCOMPP = 767, X86_FDECSTP = 768, X86_FEMMS = 769, X86_FFREE = 770, X86_FICOM16m = 771, X86_FICOM32m = 772, X86_FICOMP16m = 773, X86_FICOMP32m = 774, X86_FINCSTP = 775, X86_FLDCW16m = 776, X86_FLDENVm = 777, X86_FLDL2E = 778, X86_FLDL2T = 779, X86_FLDLG2 = 780, X86_FLDLN2 = 781, X86_FLDPI = 782, X86_FNCLEX = 783, X86_FNINIT = 784, X86_FNOP = 785, X86_FNSTCW16m = 786, X86_FNSTSW16r = 787, X86_FNSTSWm = 788, X86_FP32_TO_INT16_IN_MEM = 789, X86_FP32_TO_INT32_IN_MEM = 790, X86_FP32_TO_INT64_IN_MEM = 791, X86_FP64_TO_INT16_IN_MEM = 792, X86_FP64_TO_INT32_IN_MEM = 793, X86_FP64_TO_INT64_IN_MEM = 794, X86_FP80_TO_INT16_IN_MEM = 795, X86_FP80_TO_INT32_IN_MEM = 796, X86_FP80_TO_INT64_IN_MEM = 797, X86_FPATAN = 798, X86_FPREM = 799, X86_FPREM1 = 800, X86_FPTAN = 801, X86_FP_FFREEP = 802, X86_FRNDINT = 803, X86_FRSTORm = 804, X86_FSAVEm = 805, X86_FSCALE = 806, X86_FSETPM = 807, X86_FSINCOS = 808, X86_FSTENVm = 809, X86_FXAM = 810, X86_FXRSTOR = 811, X86_FXRSTOR64 = 812, X86_FXSAVE = 813, X86_FXSAVE64 = 814, X86_FXTRACT = 815, X86_FYL2X = 816, X86_FYL2XP1 = 817, X86_FsANDNPDrm = 818, X86_FsANDNPDrr = 819, X86_FsANDNPSrm = 820, X86_FsANDNPSrr = 821, X86_FsANDPDrm = 822, X86_FsANDPDrr = 823, X86_FsANDPSrm = 824, X86_FsANDPSrr = 825, X86_FsFLD0SD = 826, X86_FsFLD0SS = 827, X86_FsMOVAPDrm = 828, X86_FsMOVAPSrm = 829, X86_FsORPDrm = 830, X86_FsORPDrr = 831, X86_FsORPSrm = 832, X86_FsORPSrr = 833, X86_FsVMOVAPDrm = 834, X86_FsVMOVAPSrm = 835, X86_FsXORPDrm = 836, X86_FsXORPDrr = 837, X86_FsXORPSrm = 838, X86_FsXORPSrr = 839, X86_FvANDNPDrm = 840, X86_FvANDNPDrr = 841, X86_FvANDNPSrm = 842, X86_FvANDNPSrr = 843, X86_FvANDPDrm = 844, X86_FvANDPDrr = 845, X86_FvANDPSrm = 846, X86_FvANDPSrr = 847, X86_FvORPDrm = 848, X86_FvORPDrr = 849, X86_FvORPSrm = 850, X86_FvORPSrr = 851, X86_FvXORPDrm = 852, X86_FvXORPDrr = 853, X86_FvXORPSrm = 854, X86_FvXORPSrr = 855, X86_GETSEC = 856, X86_HADDPDrm = 857, X86_HADDPDrr = 858, X86_HADDPSrm = 859, X86_HADDPSrr = 860, X86_HLT = 861, X86_HSUBPDrm = 862, X86_HSUBPDrr = 863, X86_HSUBPSrm = 864, X86_HSUBPSrr = 865, X86_IDIV16m = 866, X86_IDIV16r = 867, X86_IDIV32m = 868, X86_IDIV32r = 869, X86_IDIV64m = 870, X86_IDIV64r = 871, X86_IDIV8m = 872, X86_IDIV8r = 873, X86_ILD_F16m = 874, X86_ILD_F32m = 875, X86_ILD_F64m = 876, X86_ILD_Fp16m32 = 877, X86_ILD_Fp16m64 = 878, X86_ILD_Fp16m80 = 879, X86_ILD_Fp32m32 = 880, X86_ILD_Fp32m64 = 881, X86_ILD_Fp32m80 = 882, X86_ILD_Fp64m32 = 883, X86_ILD_Fp64m64 = 884, X86_ILD_Fp64m80 = 885, X86_IMUL16m = 886, X86_IMUL16r = 887, X86_IMUL16rm = 888, X86_IMUL16rmi = 889, X86_IMUL16rmi8 = 890, X86_IMUL16rr = 891, X86_IMUL16rri = 892, X86_IMUL16rri8 = 893, X86_IMUL32m = 894, X86_IMUL32r = 895, X86_IMUL32rm = 896, X86_IMUL32rmi = 897, X86_IMUL32rmi8 = 898, X86_IMUL32rr = 899, X86_IMUL32rri = 900, X86_IMUL32rri8 = 901, X86_IMUL64m = 902, X86_IMUL64r = 903, X86_IMUL64rm = 904, X86_IMUL64rmi32 = 905, X86_IMUL64rmi8 = 906, X86_IMUL64rr = 907, X86_IMUL64rri32 = 908, X86_IMUL64rri8 = 909, X86_IMUL8m = 910, X86_IMUL8r = 911, X86_IN16ri = 912, X86_IN16rr = 913, X86_IN32ri = 914, X86_IN32rr = 915, X86_IN8ri = 916, X86_IN8rr = 917, X86_INC16m = 918, X86_INC16r = 919, X86_INC16r_alt = 920, X86_INC32m = 921, X86_INC32r = 922, X86_INC32r_alt = 923, X86_INC64m = 924, X86_INC64r = 925, X86_INC8m = 926, X86_INC8r = 927, X86_INSB = 928, X86_INSERTPSrm = 929, X86_INSERTPSrr = 930, X86_INSERTQ = 931, X86_INSERTQI = 932, X86_INSL = 933, X86_INSW = 934, X86_INT = 935, X86_INT1 = 936, X86_INT3 = 937, X86_INTO = 938, X86_INVD = 939, X86_INVEPT32 = 940, X86_INVEPT64 = 941, X86_INVLPG = 942, X86_INVLPGA32 = 943, X86_INVLPGA64 = 944, X86_INVPCID32 = 945, X86_INVPCID64 = 946, X86_INVVPID32 = 947, X86_INVVPID64 = 948, X86_IRET16 = 949, X86_IRET32 = 950, X86_IRET64 = 951, X86_ISTT_FP16m = 952, X86_ISTT_FP32m = 953, X86_ISTT_FP64m = 954, X86_ISTT_Fp16m32 = 955, X86_ISTT_Fp16m64 = 956, X86_ISTT_Fp16m80 = 957, X86_ISTT_Fp32m32 = 958, X86_ISTT_Fp32m64 = 959, X86_ISTT_Fp32m80 = 960, X86_ISTT_Fp64m32 = 961, X86_ISTT_Fp64m64 = 962, X86_ISTT_Fp64m80 = 963, X86_IST_F16m = 964, X86_IST_F32m = 965, X86_IST_FP16m = 966, X86_IST_FP32m = 967, X86_IST_FP64m = 968, X86_IST_Fp16m32 = 969, X86_IST_Fp16m64 = 970, X86_IST_Fp16m80 = 971, X86_IST_Fp32m32 = 972, X86_IST_Fp32m64 = 973, X86_IST_Fp32m80 = 974, X86_IST_Fp64m32 = 975, X86_IST_Fp64m64 = 976, X86_IST_Fp64m80 = 977, X86_Int_CMPSDrm = 978, X86_Int_CMPSDrr = 979, X86_Int_CMPSSrm = 980, X86_Int_CMPSSrr = 981, X86_Int_COMISDrm = 982, X86_Int_COMISDrr = 983, X86_Int_COMISSrm = 984, X86_Int_COMISSrr = 985, X86_Int_CVTSD2SSrm = 986, X86_Int_CVTSD2SSrr = 987, X86_Int_CVTSI2SD64rm = 988, X86_Int_CVTSI2SD64rr = 989, X86_Int_CVTSI2SDrm = 990, X86_Int_CVTSI2SDrr = 991, X86_Int_CVTSI2SS64rm = 992, X86_Int_CVTSI2SS64rr = 993, X86_Int_CVTSI2SSrm = 994, X86_Int_CVTSI2SSrr = 995, X86_Int_CVTSS2SDrm = 996, X86_Int_CVTSS2SDrr = 997, X86_Int_CVTTSD2SI64rm = 998, X86_Int_CVTTSD2SI64rr = 999, X86_Int_CVTTSD2SIrm = 1000, X86_Int_CVTTSD2SIrr = 1001, X86_Int_CVTTSS2SI64rm = 1002, X86_Int_CVTTSS2SI64rr = 1003, X86_Int_CVTTSS2SIrm = 1004, X86_Int_CVTTSS2SIrr = 1005, X86_Int_MemBarrier = 1006, X86_Int_UCOMISDrm = 1007, X86_Int_UCOMISDrr = 1008, X86_Int_UCOMISSrm = 1009, X86_Int_UCOMISSrr = 1010, X86_Int_VCMPSDrm = 1011, X86_Int_VCMPSDrr = 1012, X86_Int_VCMPSSrm = 1013, X86_Int_VCMPSSrr = 1014, X86_Int_VCOMISDZrm = 1015, X86_Int_VCOMISDZrr = 1016, X86_Int_VCOMISDrm = 1017, X86_Int_VCOMISDrr = 1018, X86_Int_VCOMISSZrm = 1019, X86_Int_VCOMISSZrr = 1020, X86_Int_VCOMISSrm = 1021, X86_Int_VCOMISSrr = 1022, X86_Int_VCVTSD2SSrm = 1023, X86_Int_VCVTSD2SSrr = 1024, X86_Int_VCVTSI2SD64Zrm = 1025, X86_Int_VCVTSI2SD64Zrr = 1026, X86_Int_VCVTSI2SD64rm = 1027, X86_Int_VCVTSI2SD64rr = 1028, X86_Int_VCVTSI2SDZrm = 1029, X86_Int_VCVTSI2SDZrr = 1030, X86_Int_VCVTSI2SDrm = 1031, X86_Int_VCVTSI2SDrr = 1032, X86_Int_VCVTSI2SS64Zrm = 1033, X86_Int_VCVTSI2SS64Zrr = 1034, X86_Int_VCVTSI2SS64rm = 1035, X86_Int_VCVTSI2SS64rr = 1036, X86_Int_VCVTSI2SSZrm = 1037, X86_Int_VCVTSI2SSZrr = 1038, X86_Int_VCVTSI2SSrm = 1039, X86_Int_VCVTSI2SSrr = 1040, X86_Int_VCVTSS2SDrm = 1041, X86_Int_VCVTSS2SDrr = 1042, X86_Int_VCVTTSD2SI64Zrm = 1043, X86_Int_VCVTTSD2SI64Zrr = 1044, X86_Int_VCVTTSD2SI64rm = 1045, X86_Int_VCVTTSD2SI64rr = 1046, X86_Int_VCVTTSD2SIZrm = 1047, X86_Int_VCVTTSD2SIZrr = 1048, X86_Int_VCVTTSD2SIrm = 1049, X86_Int_VCVTTSD2SIrr = 1050, X86_Int_VCVTTSD2USI64Zrm = 1051, X86_Int_VCVTTSD2USI64Zrr = 1052, X86_Int_VCVTTSD2USIZrm = 1053, X86_Int_VCVTTSD2USIZrr = 1054, X86_Int_VCVTTSS2SI64Zrm = 1055, X86_Int_VCVTTSS2SI64Zrr = 1056, X86_Int_VCVTTSS2SI64rm = 1057, X86_Int_VCVTTSS2SI64rr = 1058, X86_Int_VCVTTSS2SIZrm = 1059, X86_Int_VCVTTSS2SIZrr = 1060, X86_Int_VCVTTSS2SIrm = 1061, X86_Int_VCVTTSS2SIrr = 1062, X86_Int_VCVTTSS2USI64Zrm = 1063, X86_Int_VCVTTSS2USI64Zrr = 1064, X86_Int_VCVTTSS2USIZrm = 1065, X86_Int_VCVTTSS2USIZrr = 1066, X86_Int_VCVTUSI2SD64Zrm = 1067, X86_Int_VCVTUSI2SD64Zrr = 1068, X86_Int_VCVTUSI2SDZrm = 1069, X86_Int_VCVTUSI2SDZrr = 1070, X86_Int_VCVTUSI2SS64Zrm = 1071, X86_Int_VCVTUSI2SS64Zrr = 1072, X86_Int_VCVTUSI2SSZrm = 1073, X86_Int_VCVTUSI2SSZrr = 1074, X86_Int_VUCOMISDZrm = 1075, X86_Int_VUCOMISDZrr = 1076, X86_Int_VUCOMISDrm = 1077, X86_Int_VUCOMISDrr = 1078, X86_Int_VUCOMISSZrm = 1079, X86_Int_VUCOMISSZrr = 1080, X86_Int_VUCOMISSrm = 1081, X86_Int_VUCOMISSrr = 1082, X86_JAE_1 = 1083, X86_JAE_2 = 1084, X86_JAE_4 = 1085, X86_JA_1 = 1086, X86_JA_2 = 1087, X86_JA_4 = 1088, X86_JBE_1 = 1089, X86_JBE_2 = 1090, X86_JBE_4 = 1091, X86_JB_1 = 1092, X86_JB_2 = 1093, X86_JB_4 = 1094, X86_JCXZ = 1095, X86_JECXZ = 1096, X86_JE_1 = 1097, X86_JE_2 = 1098, X86_JE_4 = 1099, X86_JGE_1 = 1100, X86_JGE_2 = 1101, X86_JGE_4 = 1102, X86_JG_1 = 1103, X86_JG_2 = 1104, X86_JG_4 = 1105, X86_JLE_1 = 1106, X86_JLE_2 = 1107, X86_JLE_4 = 1108, X86_JL_1 = 1109, X86_JL_2 = 1110, X86_JL_4 = 1111, X86_JMP16m = 1112, X86_JMP16r = 1113, X86_JMP32m = 1114, X86_JMP32r = 1115, X86_JMP64m = 1116, X86_JMP64r = 1117, X86_JMP_1 = 1118, X86_JMP_2 = 1119, X86_JMP_4 = 1120, X86_JNE_1 = 1121, X86_JNE_2 = 1122, X86_JNE_4 = 1123, X86_JNO_1 = 1124, X86_JNO_2 = 1125, X86_JNO_4 = 1126, X86_JNP_1 = 1127, X86_JNP_2 = 1128, X86_JNP_4 = 1129, X86_JNS_1 = 1130, X86_JNS_2 = 1131, X86_JNS_4 = 1132, X86_JO_1 = 1133, X86_JO_2 = 1134, X86_JO_4 = 1135, X86_JP_1 = 1136, X86_JP_2 = 1137, X86_JP_4 = 1138, X86_JRCXZ = 1139, X86_JS_1 = 1140, X86_JS_2 = 1141, X86_JS_4 = 1142, X86_KANDBrr = 1143, X86_KANDDrr = 1144, X86_KANDNBrr = 1145, X86_KANDNDrr = 1146, X86_KANDNQrr = 1147, X86_KANDNWrr = 1148, X86_KANDQrr = 1149, X86_KANDWrr = 1150, X86_KMOVBkk = 1151, X86_KMOVBkm = 1152, X86_KMOVBkr = 1153, X86_KMOVBmk = 1154, X86_KMOVBrk = 1155, X86_KMOVDkk = 1156, X86_KMOVDkm = 1157, X86_KMOVDkr = 1158, X86_KMOVDmk = 1159, X86_KMOVDrk = 1160, X86_KMOVQkk = 1161, X86_KMOVQkm = 1162, X86_KMOVQkr = 1163, X86_KMOVQmk = 1164, X86_KMOVQrk = 1165, X86_KMOVWkk = 1166, X86_KMOVWkm = 1167, X86_KMOVWkr = 1168, X86_KMOVWmk = 1169, X86_KMOVWrk = 1170, X86_KNOTBrr = 1171, X86_KNOTDrr = 1172, X86_KNOTQrr = 1173, X86_KNOTWrr = 1174, X86_KORBrr = 1175, X86_KORDrr = 1176, X86_KORQrr = 1177, X86_KORTESTBrr = 1178, X86_KORTESTDrr = 1179, X86_KORTESTQrr = 1180, X86_KORTESTWrr = 1181, X86_KORWrr = 1182, X86_KSET0B = 1183, X86_KSET0W = 1184, X86_KSET1B = 1185, X86_KSET1W = 1186, X86_KSHIFTLBri = 1187, X86_KSHIFTLDri = 1188, X86_KSHIFTLQri = 1189, X86_KSHIFTLWri = 1190, X86_KSHIFTRBri = 1191, X86_KSHIFTRDri = 1192, X86_KSHIFTRQri = 1193, X86_KSHIFTRWri = 1194, X86_KUNPCKBWrr = 1195, X86_KXNORBrr = 1196, X86_KXNORDrr = 1197, X86_KXNORQrr = 1198, X86_KXNORWrr = 1199, X86_KXORBrr = 1200, X86_KXORDrr = 1201, X86_KXORQrr = 1202, X86_KXORWrr = 1203, X86_LAHF = 1204, X86_LAR16rm = 1205, X86_LAR16rr = 1206, X86_LAR32rm = 1207, X86_LAR32rr = 1208, X86_LAR64rm = 1209, X86_LAR64rr = 1210, X86_LCMPXCHG16 = 1211, X86_LCMPXCHG16B = 1212, X86_LCMPXCHG32 = 1213, X86_LCMPXCHG64 = 1214, X86_LCMPXCHG8 = 1215, X86_LCMPXCHG8B = 1216, X86_LDDQUrm = 1217, X86_LDMXCSR = 1218, X86_LDS16rm = 1219, X86_LDS32rm = 1220, X86_LD_F0 = 1221, X86_LD_F1 = 1222, X86_LD_F32m = 1223, X86_LD_F64m = 1224, X86_LD_F80m = 1225, X86_LD_Fp032 = 1226, X86_LD_Fp064 = 1227, X86_LD_Fp080 = 1228, X86_LD_Fp132 = 1229, X86_LD_Fp164 = 1230, X86_LD_Fp180 = 1231, X86_LD_Fp32m = 1232, X86_LD_Fp32m64 = 1233, X86_LD_Fp32m80 = 1234, X86_LD_Fp64m = 1235, X86_LD_Fp64m80 = 1236, X86_LD_Fp80m = 1237, X86_LD_Frr = 1238, X86_LEA16r = 1239, X86_LEA32r = 1240, X86_LEA64_32r = 1241, X86_LEA64r = 1242, X86_LEAVE = 1243, X86_LEAVE64 = 1244, X86_LES16rm = 1245, X86_LES32rm = 1246, X86_LFENCE = 1247, X86_LFS16rm = 1248, X86_LFS32rm = 1249, X86_LFS64rm = 1250, X86_LGDT16m = 1251, X86_LGDT32m = 1252, X86_LGDT64m = 1253, X86_LGS16rm = 1254, X86_LGS32rm = 1255, X86_LGS64rm = 1256, X86_LIDT16m = 1257, X86_LIDT32m = 1258, X86_LIDT64m = 1259, X86_LLDT16m = 1260, X86_LLDT16r = 1261, X86_LMSW16m = 1262, X86_LMSW16r = 1263, X86_LOCK_ADD16mi = 1264, X86_LOCK_ADD16mi8 = 1265, X86_LOCK_ADD16mr = 1266, X86_LOCK_ADD32mi = 1267, X86_LOCK_ADD32mi8 = 1268, X86_LOCK_ADD32mr = 1269, X86_LOCK_ADD64mi32 = 1270, X86_LOCK_ADD64mi8 = 1271, X86_LOCK_ADD64mr = 1272, X86_LOCK_ADD8mi = 1273, X86_LOCK_ADD8mr = 1274, X86_LOCK_AND16mi = 1275, X86_LOCK_AND16mi8 = 1276, X86_LOCK_AND16mr = 1277, X86_LOCK_AND32mi = 1278, X86_LOCK_AND32mi8 = 1279, X86_LOCK_AND32mr = 1280, X86_LOCK_AND64mi32 = 1281, X86_LOCK_AND64mi8 = 1282, X86_LOCK_AND64mr = 1283, X86_LOCK_AND8mi = 1284, X86_LOCK_AND8mr = 1285, X86_LOCK_DEC16m = 1286, X86_LOCK_DEC32m = 1287, X86_LOCK_DEC64m = 1288, X86_LOCK_DEC8m = 1289, X86_LOCK_INC16m = 1290, X86_LOCK_INC32m = 1291, X86_LOCK_INC64m = 1292, X86_LOCK_INC8m = 1293, X86_LOCK_OR16mi = 1294, X86_LOCK_OR16mi8 = 1295, X86_LOCK_OR16mr = 1296, X86_LOCK_OR32mi = 1297, X86_LOCK_OR32mi8 = 1298, X86_LOCK_OR32mr = 1299, X86_LOCK_OR64mi32 = 1300, X86_LOCK_OR64mi8 = 1301, X86_LOCK_OR64mr = 1302, X86_LOCK_OR8mi = 1303, X86_LOCK_OR8mr = 1304, X86_LOCK_PREFIX = 1305, X86_LOCK_SUB16mi = 1306, X86_LOCK_SUB16mi8 = 1307, X86_LOCK_SUB16mr = 1308, X86_LOCK_SUB32mi = 1309, X86_LOCK_SUB32mi8 = 1310, X86_LOCK_SUB32mr = 1311, X86_LOCK_SUB64mi32 = 1312, X86_LOCK_SUB64mi8 = 1313, X86_LOCK_SUB64mr = 1314, X86_LOCK_SUB8mi = 1315, X86_LOCK_SUB8mr = 1316, X86_LOCK_XOR16mi = 1317, X86_LOCK_XOR16mi8 = 1318, X86_LOCK_XOR16mr = 1319, X86_LOCK_XOR32mi = 1320, X86_LOCK_XOR32mi8 = 1321, X86_LOCK_XOR32mr = 1322, X86_LOCK_XOR64mi32 = 1323, X86_LOCK_XOR64mi8 = 1324, X86_LOCK_XOR64mr = 1325, X86_LOCK_XOR8mi = 1326, X86_LOCK_XOR8mr = 1327, X86_LODSB = 1328, X86_LODSL = 1329, X86_LODSQ = 1330, X86_LODSW = 1331, X86_LOOP = 1332, X86_LOOPE = 1333, X86_LOOPNE = 1334, X86_LRETIL = 1335, X86_LRETIQ = 1336, X86_LRETIW = 1337, X86_LRETL = 1338, X86_LRETQ = 1339, X86_LRETW = 1340, X86_LSL16rm = 1341, X86_LSL16rr = 1342, X86_LSL32rm = 1343, X86_LSL32rr = 1344, X86_LSL64rm = 1345, X86_LSL64rr = 1346, X86_LSS16rm = 1347, X86_LSS32rm = 1348, X86_LSS64rm = 1349, X86_LTRm = 1350, X86_LTRr = 1351, X86_LXADD16 = 1352, X86_LXADD32 = 1353, X86_LXADD64 = 1354, X86_LXADD8 = 1355, X86_LZCNT16rm = 1356, X86_LZCNT16rr = 1357, X86_LZCNT32rm = 1358, X86_LZCNT32rr = 1359, X86_LZCNT64rm = 1360, X86_LZCNT64rr = 1361, X86_MASKMOVDQU = 1362, X86_MASKMOVDQU64 = 1363, X86_MAXCPDrm = 1364, X86_MAXCPDrr = 1365, X86_MAXCPSrm = 1366, X86_MAXCPSrr = 1367, X86_MAXCSDrm = 1368, X86_MAXCSDrr = 1369, X86_MAXCSSrm = 1370, X86_MAXCSSrr = 1371, X86_MAXPDrm = 1372, X86_MAXPDrr = 1373, X86_MAXPSrm = 1374, X86_MAXPSrr = 1375, X86_MAXSDrm = 1376, X86_MAXSDrm_Int = 1377, X86_MAXSDrr = 1378, X86_MAXSDrr_Int = 1379, X86_MAXSSrm = 1380, X86_MAXSSrm_Int = 1381, X86_MAXSSrr = 1382, X86_MAXSSrr_Int = 1383, X86_MFENCE = 1384, X86_MINCPDrm = 1385, X86_MINCPDrr = 1386, X86_MINCPSrm = 1387, X86_MINCPSrr = 1388, X86_MINCSDrm = 1389, X86_MINCSDrr = 1390, X86_MINCSSrm = 1391, X86_MINCSSrr = 1392, X86_MINPDrm = 1393, X86_MINPDrr = 1394, X86_MINPSrm = 1395, X86_MINPSrr = 1396, X86_MINSDrm = 1397, X86_MINSDrm_Int = 1398, X86_MINSDrr = 1399, X86_MINSDrr_Int = 1400, X86_MINSSrm = 1401, X86_MINSSrm_Int = 1402, X86_MINSSrr = 1403, X86_MINSSrr_Int = 1404, X86_MMX_CVTPD2PIirm = 1405, X86_MMX_CVTPD2PIirr = 1406, X86_MMX_CVTPI2PDirm = 1407, X86_MMX_CVTPI2PDirr = 1408, X86_MMX_CVTPI2PSirm = 1409, X86_MMX_CVTPI2PSirr = 1410, X86_MMX_CVTPS2PIirm = 1411, X86_MMX_CVTPS2PIirr = 1412, X86_MMX_CVTTPD2PIirm = 1413, X86_MMX_CVTTPD2PIirr = 1414, X86_MMX_CVTTPS2PIirm = 1415, X86_MMX_CVTTPS2PIirr = 1416, X86_MMX_EMMS = 1417, X86_MMX_MASKMOVQ = 1418, X86_MMX_MASKMOVQ64 = 1419, X86_MMX_MOVD64from64rm = 1420, X86_MMX_MOVD64from64rr = 1421, X86_MMX_MOVD64grr = 1422, X86_MMX_MOVD64mr = 1423, X86_MMX_MOVD64rm = 1424, X86_MMX_MOVD64rr = 1425, X86_MMX_MOVD64to64rm = 1426, X86_MMX_MOVD64to64rr = 1427, X86_MMX_MOVDQ2Qrr = 1428, X86_MMX_MOVFR642Qrr = 1429, X86_MMX_MOVNTQmr = 1430, X86_MMX_MOVQ2DQrr = 1431, X86_MMX_MOVQ2FR64rr = 1432, X86_MMX_MOVQ64mr = 1433, X86_MMX_MOVQ64rm = 1434, X86_MMX_MOVQ64rr = 1435, X86_MMX_MOVQ64rr_REV = 1436, X86_MMX_PABSBrm64 = 1437, X86_MMX_PABSBrr64 = 1438, X86_MMX_PABSDrm64 = 1439, X86_MMX_PABSDrr64 = 1440, X86_MMX_PABSWrm64 = 1441, X86_MMX_PABSWrr64 = 1442, X86_MMX_PACKSSDWirm = 1443, X86_MMX_PACKSSDWirr = 1444, X86_MMX_PACKSSWBirm = 1445, X86_MMX_PACKSSWBirr = 1446, X86_MMX_PACKUSWBirm = 1447, X86_MMX_PACKUSWBirr = 1448, X86_MMX_PADDBirm = 1449, X86_MMX_PADDBirr = 1450, X86_MMX_PADDDirm = 1451, X86_MMX_PADDDirr = 1452, X86_MMX_PADDQirm = 1453, X86_MMX_PADDQirr = 1454, X86_MMX_PADDSBirm = 1455, X86_MMX_PADDSBirr = 1456, X86_MMX_PADDSWirm = 1457, X86_MMX_PADDSWirr = 1458, X86_MMX_PADDUSBirm = 1459, X86_MMX_PADDUSBirr = 1460, X86_MMX_PADDUSWirm = 1461, X86_MMX_PADDUSWirr = 1462, X86_MMX_PADDWirm = 1463, X86_MMX_PADDWirr = 1464, X86_MMX_PALIGNR64irm = 1465, X86_MMX_PALIGNR64irr = 1466, X86_MMX_PANDNirm = 1467, X86_MMX_PANDNirr = 1468, X86_MMX_PANDirm = 1469, X86_MMX_PANDirr = 1470, X86_MMX_PAVGBirm = 1471, X86_MMX_PAVGBirr = 1472, X86_MMX_PAVGWirm = 1473, X86_MMX_PAVGWirr = 1474, X86_MMX_PCMPEQBirm = 1475, X86_MMX_PCMPEQBirr = 1476, X86_MMX_PCMPEQDirm = 1477, X86_MMX_PCMPEQDirr = 1478, X86_MMX_PCMPEQWirm = 1479, X86_MMX_PCMPEQWirr = 1480, X86_MMX_PCMPGTBirm = 1481, X86_MMX_PCMPGTBirr = 1482, X86_MMX_PCMPGTDirm = 1483, X86_MMX_PCMPGTDirr = 1484, X86_MMX_PCMPGTWirm = 1485, X86_MMX_PCMPGTWirr = 1486, X86_MMX_PEXTRWirri = 1487, X86_MMX_PHADDSWrm64 = 1488, X86_MMX_PHADDSWrr64 = 1489, X86_MMX_PHADDWrm64 = 1490, X86_MMX_PHADDWrr64 = 1491, X86_MMX_PHADDrm64 = 1492, X86_MMX_PHADDrr64 = 1493, X86_MMX_PHSUBDrm64 = 1494, X86_MMX_PHSUBDrr64 = 1495, X86_MMX_PHSUBSWrm64 = 1496, X86_MMX_PHSUBSWrr64 = 1497, X86_MMX_PHSUBWrm64 = 1498, X86_MMX_PHSUBWrr64 = 1499, X86_MMX_PINSRWirmi = 1500, X86_MMX_PINSRWirri = 1501, X86_MMX_PMADDUBSWrm64 = 1502, X86_MMX_PMADDUBSWrr64 = 1503, X86_MMX_PMADDWDirm = 1504, X86_MMX_PMADDWDirr = 1505, X86_MMX_PMAXSWirm = 1506, X86_MMX_PMAXSWirr = 1507, X86_MMX_PMAXUBirm = 1508, X86_MMX_PMAXUBirr = 1509, X86_MMX_PMINSWirm = 1510, X86_MMX_PMINSWirr = 1511, X86_MMX_PMINUBirm = 1512, X86_MMX_PMINUBirr = 1513, X86_MMX_PMOVMSKBrr = 1514, X86_MMX_PMULHRSWrm64 = 1515, X86_MMX_PMULHRSWrr64 = 1516, X86_MMX_PMULHUWirm = 1517, X86_MMX_PMULHUWirr = 1518, X86_MMX_PMULHWirm = 1519, X86_MMX_PMULHWirr = 1520, X86_MMX_PMULLWirm = 1521, X86_MMX_PMULLWirr = 1522, X86_MMX_PMULUDQirm = 1523, X86_MMX_PMULUDQirr = 1524, X86_MMX_PORirm = 1525, X86_MMX_PORirr = 1526, X86_MMX_PSADBWirm = 1527, X86_MMX_PSADBWirr = 1528, X86_MMX_PSHUFBrm64 = 1529, X86_MMX_PSHUFBrr64 = 1530, X86_MMX_PSHUFWmi = 1531, X86_MMX_PSHUFWri = 1532, X86_MMX_PSIGNBrm64 = 1533, X86_MMX_PSIGNBrr64 = 1534, X86_MMX_PSIGNDrm64 = 1535, X86_MMX_PSIGNDrr64 = 1536, X86_MMX_PSIGNWrm64 = 1537, X86_MMX_PSIGNWrr64 = 1538, X86_MMX_PSLLDri = 1539, X86_MMX_PSLLDrm = 1540, X86_MMX_PSLLDrr = 1541, X86_MMX_PSLLQri = 1542, X86_MMX_PSLLQrm = 1543, X86_MMX_PSLLQrr = 1544, X86_MMX_PSLLWri = 1545, X86_MMX_PSLLWrm = 1546, X86_MMX_PSLLWrr = 1547, X86_MMX_PSRADri = 1548, X86_MMX_PSRADrm = 1549, X86_MMX_PSRADrr = 1550, X86_MMX_PSRAWri = 1551, X86_MMX_PSRAWrm = 1552, X86_MMX_PSRAWrr = 1553, X86_MMX_PSRLDri = 1554, X86_MMX_PSRLDrm = 1555, X86_MMX_PSRLDrr = 1556, X86_MMX_PSRLQri = 1557, X86_MMX_PSRLQrm = 1558, X86_MMX_PSRLQrr = 1559, X86_MMX_PSRLWri = 1560, X86_MMX_PSRLWrm = 1561, X86_MMX_PSRLWrr = 1562, X86_MMX_PSUBBirm = 1563, X86_MMX_PSUBBirr = 1564, X86_MMX_PSUBDirm = 1565, X86_MMX_PSUBDirr = 1566, X86_MMX_PSUBQirm = 1567, X86_MMX_PSUBQirr = 1568, X86_MMX_PSUBSBirm = 1569, X86_MMX_PSUBSBirr = 1570, X86_MMX_PSUBSWirm = 1571, X86_MMX_PSUBSWirr = 1572, X86_MMX_PSUBUSBirm = 1573, X86_MMX_PSUBUSBirr = 1574, X86_MMX_PSUBUSWirm = 1575, X86_MMX_PSUBUSWirr = 1576, X86_MMX_PSUBWirm = 1577, X86_MMX_PSUBWirr = 1578, X86_MMX_PUNPCKHBWirm = 1579, X86_MMX_PUNPCKHBWirr = 1580, X86_MMX_PUNPCKHDQirm = 1581, X86_MMX_PUNPCKHDQirr = 1582, X86_MMX_PUNPCKHWDirm = 1583, X86_MMX_PUNPCKHWDirr = 1584, X86_MMX_PUNPCKLBWirm = 1585, X86_MMX_PUNPCKLBWirr = 1586, X86_MMX_PUNPCKLDQirm = 1587, X86_MMX_PUNPCKLDQirr = 1588, X86_MMX_PUNPCKLWDirm = 1589, X86_MMX_PUNPCKLWDirr = 1590, X86_MMX_PXORirm = 1591, X86_MMX_PXORirr = 1592, X86_MONITOR = 1593, X86_MONITORrrr = 1594, X86_MONTMUL = 1595, X86_MORESTACK_RET = 1596, X86_MORESTACK_RET_RESTORE_R10 = 1597, X86_MOV16ao16 = 1598, X86_MOV16ao32 = 1599, X86_MOV16ao64 = 1600, X86_MOV16mi = 1601, X86_MOV16mr = 1602, X86_MOV16ms = 1603, X86_MOV16o16a = 1604, X86_MOV16o32a = 1605, X86_MOV16o64a = 1606, X86_MOV16ri = 1607, X86_MOV16ri_alt = 1608, X86_MOV16rm = 1609, X86_MOV16rr = 1610, X86_MOV16rr_REV = 1611, X86_MOV16rs = 1612, X86_MOV16sm = 1613, X86_MOV16sr = 1614, X86_MOV32ao16 = 1615, X86_MOV32ao32 = 1616, X86_MOV32ao64 = 1617, X86_MOV32cr = 1618, X86_MOV32dr = 1619, X86_MOV32mi = 1620, X86_MOV32mr = 1621, X86_MOV32ms = 1622, X86_MOV32o16a = 1623, X86_MOV32o32a = 1624, X86_MOV32o64a = 1625, X86_MOV32r0 = 1626, X86_MOV32rc = 1627, X86_MOV32rd = 1628, X86_MOV32ri = 1629, X86_MOV32ri64 = 1630, X86_MOV32ri_alt = 1631, X86_MOV32rm = 1632, X86_MOV32rr = 1633, X86_MOV32rr_REV = 1634, X86_MOV32rs = 1635, X86_MOV32sm = 1636, X86_MOV32sr = 1637, X86_MOV64ao32 = 1638, X86_MOV64ao64 = 1639, X86_MOV64cr = 1640, X86_MOV64dr = 1641, X86_MOV64mi32 = 1642, X86_MOV64mr = 1643, X86_MOV64ms = 1644, X86_MOV64o32a = 1645, X86_MOV64o64a = 1646, X86_MOV64rc = 1647, X86_MOV64rd = 1648, X86_MOV64ri = 1649, X86_MOV64ri32 = 1650, X86_MOV64rm = 1651, X86_MOV64rr = 1652, X86_MOV64rr_REV = 1653, X86_MOV64rs = 1654, X86_MOV64sm = 1655, X86_MOV64sr = 1656, X86_MOV64toPQIrm = 1657, X86_MOV64toPQIrr = 1658, X86_MOV64toSDrm = 1659, X86_MOV64toSDrr = 1660, X86_MOV8ao16 = 1661, X86_MOV8ao32 = 1662, X86_MOV8ao64 = 1663, X86_MOV8mi = 1664, X86_MOV8mr = 1665, X86_MOV8mr_NOREX = 1666, X86_MOV8o16a = 1667, X86_MOV8o32a = 1668, X86_MOV8o64a = 1669, X86_MOV8ri = 1670, X86_MOV8ri_alt = 1671, X86_MOV8rm = 1672, X86_MOV8rm_NOREX = 1673, X86_MOV8rr = 1674, X86_MOV8rr_NOREX = 1675, X86_MOV8rr_REV = 1676, X86_MOVAPDmr = 1677, X86_MOVAPDrm = 1678, X86_MOVAPDrr = 1679, X86_MOVAPDrr_REV = 1680, X86_MOVAPSmr = 1681, X86_MOVAPSrm = 1682, X86_MOVAPSrr = 1683, X86_MOVAPSrr_REV = 1684, X86_MOVBE16mr = 1685, X86_MOVBE16rm = 1686, X86_MOVBE32mr = 1687, X86_MOVBE32rm = 1688, X86_MOVBE64mr = 1689, X86_MOVBE64rm = 1690, X86_MOVDDUPrm = 1691, X86_MOVDDUPrr = 1692, X86_MOVDI2PDIrm = 1693, X86_MOVDI2PDIrr = 1694, X86_MOVDI2SSrm = 1695, X86_MOVDI2SSrr = 1696, X86_MOVDQAmr = 1697, X86_MOVDQArm = 1698, X86_MOVDQArr = 1699, X86_MOVDQArr_REV = 1700, X86_MOVDQUmr = 1701, X86_MOVDQUrm = 1702, X86_MOVDQUrr = 1703, X86_MOVDQUrr_REV = 1704, X86_MOVHLPSrr = 1705, X86_MOVHPDmr = 1706, X86_MOVHPDrm = 1707, X86_MOVHPSmr = 1708, X86_MOVHPSrm = 1709, X86_MOVLHPSrr = 1710, X86_MOVLPDmr = 1711, X86_MOVLPDrm = 1712, X86_MOVLPSmr = 1713, X86_MOVLPSrm = 1714, X86_MOVMSKPDrr = 1715, X86_MOVMSKPSrr = 1716, X86_MOVNTDQArm = 1717, X86_MOVNTDQmr = 1718, X86_MOVNTI_64mr = 1719, X86_MOVNTImr = 1720, X86_MOVNTPDmr = 1721, X86_MOVNTPSmr = 1722, X86_MOVNTSD = 1723, X86_MOVNTSS = 1724, X86_MOVPC32r = 1725, X86_MOVPDI2DImr = 1726, X86_MOVPDI2DIrr = 1727, X86_MOVPQI2QImr = 1728, X86_MOVPQI2QIrr = 1729, X86_MOVPQIto64rm = 1730, X86_MOVPQIto64rr = 1731, X86_MOVQI2PQIrm = 1732, X86_MOVSB = 1733, X86_MOVSDmr = 1734, X86_MOVSDrm = 1735, X86_MOVSDrr = 1736, X86_MOVSDrr_REV = 1737, X86_MOVSDto64mr = 1738, X86_MOVSDto64rr = 1739, X86_MOVSHDUPrm = 1740, X86_MOVSHDUPrr = 1741, X86_MOVSL = 1742, X86_MOVSLDUPrm = 1743, X86_MOVSLDUPrr = 1744, X86_MOVSQ = 1745, X86_MOVSS2DImr = 1746, X86_MOVSS2DIrr = 1747, X86_MOVSSmr = 1748, X86_MOVSSrm = 1749, X86_MOVSSrr = 1750, X86_MOVSSrr_REV = 1751, X86_MOVSW = 1752, X86_MOVSX16rm8 = 1753, X86_MOVSX16rr8 = 1754, X86_MOVSX32_NOREXrm8 = 1755, X86_MOVSX32_NOREXrr8 = 1756, X86_MOVSX32rm16 = 1757, X86_MOVSX32rm8 = 1758, X86_MOVSX32rr16 = 1759, X86_MOVSX32rr8 = 1760, X86_MOVSX64_NOREXrr32 = 1761, X86_MOVSX64rm16 = 1762, X86_MOVSX64rm32 = 1763, X86_MOVSX64rm32_alt = 1764, X86_MOVSX64rm8 = 1765, X86_MOVSX64rr16 = 1766, X86_MOVSX64rr32 = 1767, X86_MOVSX64rr8 = 1768, X86_MOVUPDmr = 1769, X86_MOVUPDrm = 1770, X86_MOVUPDrr = 1771, X86_MOVUPDrr_REV = 1772, X86_MOVUPSmr = 1773, X86_MOVUPSrm = 1774, X86_MOVUPSrr = 1775, X86_MOVUPSrr_REV = 1776, X86_MOVZPQILo2PQIrm = 1777, X86_MOVZPQILo2PQIrr = 1778, X86_MOVZQI2PQIrm = 1779, X86_MOVZQI2PQIrr = 1780, X86_MOVZX16rm8 = 1781, X86_MOVZX16rr8 = 1782, X86_MOVZX32_NOREXrm8 = 1783, X86_MOVZX32_NOREXrr8 = 1784, X86_MOVZX32rm16 = 1785, X86_MOVZX32rm8 = 1786, X86_MOVZX32rr16 = 1787, X86_MOVZX32rr8 = 1788, X86_MOVZX64rm16_Q = 1789, X86_MOVZX64rm8_Q = 1790, X86_MOVZX64rr16_Q = 1791, X86_MOVZX64rr8_Q = 1792, X86_MPSADBWrmi = 1793, X86_MPSADBWrri = 1794, X86_MUL16m = 1795, X86_MUL16r = 1796, X86_MUL32m = 1797, X86_MUL32r = 1798, X86_MUL64m = 1799, X86_MUL64r = 1800, X86_MUL8m = 1801, X86_MUL8r = 1802, X86_MULPDrm = 1803, X86_MULPDrr = 1804, X86_MULPSrm = 1805, X86_MULPSrr = 1806, X86_MULSDrm = 1807, X86_MULSDrm_Int = 1808, X86_MULSDrr = 1809, X86_MULSDrr_Int = 1810, X86_MULSSrm = 1811, X86_MULSSrm_Int = 1812, X86_MULSSrr = 1813, X86_MULSSrr_Int = 1814, X86_MULX32rm = 1815, X86_MULX32rr = 1816, X86_MULX64rm = 1817, X86_MULX64rr = 1818, X86_MUL_F32m = 1819, X86_MUL_F64m = 1820, X86_MUL_FI16m = 1821, X86_MUL_FI32m = 1822, X86_MUL_FPrST0 = 1823, X86_MUL_FST0r = 1824, X86_MUL_Fp32 = 1825, X86_MUL_Fp32m = 1826, X86_MUL_Fp64 = 1827, X86_MUL_Fp64m = 1828, X86_MUL_Fp64m32 = 1829, X86_MUL_Fp80 = 1830, X86_MUL_Fp80m32 = 1831, X86_MUL_Fp80m64 = 1832, X86_MUL_FpI16m32 = 1833, X86_MUL_FpI16m64 = 1834, X86_MUL_FpI16m80 = 1835, X86_MUL_FpI32m32 = 1836, X86_MUL_FpI32m64 = 1837, X86_MUL_FpI32m80 = 1838, X86_MUL_FrST0 = 1839, X86_MWAITrr = 1840, X86_NEG16m = 1841, X86_NEG16r = 1842, X86_NEG32m = 1843, X86_NEG32r = 1844, X86_NEG64m = 1845, X86_NEG64r = 1846, X86_NEG8m = 1847, X86_NEG8r = 1848, X86_NOOP = 1849, X86_NOOP18_16m4 = 1850, X86_NOOP18_16m5 = 1851, X86_NOOP18_16m6 = 1852, X86_NOOP18_16m7 = 1853, X86_NOOP18_16r4 = 1854, X86_NOOP18_16r5 = 1855, X86_NOOP18_16r6 = 1856, X86_NOOP18_16r7 = 1857, X86_NOOP18_m4 = 1858, X86_NOOP18_m5 = 1859, X86_NOOP18_m6 = 1860, X86_NOOP18_m7 = 1861, X86_NOOP18_r4 = 1862, X86_NOOP18_r5 = 1863, X86_NOOP18_r6 = 1864, X86_NOOP18_r7 = 1865, X86_NOOP19rr = 1866, X86_NOOPL = 1867, X86_NOOPL_19 = 1868, X86_NOOPL_1a = 1869, X86_NOOPL_1b = 1870, X86_NOOPL_1c = 1871, X86_NOOPL_1d = 1872, X86_NOOPL_1e = 1873, X86_NOOPW = 1874, X86_NOOPW_19 = 1875, X86_NOOPW_1a = 1876, X86_NOOPW_1b = 1877, X86_NOOPW_1c = 1878, X86_NOOPW_1d = 1879, X86_NOOPW_1e = 1880, X86_NOT16m = 1881, X86_NOT16r = 1882, X86_NOT32m = 1883, X86_NOT32r = 1884, X86_NOT64m = 1885, X86_NOT64r = 1886, X86_NOT8m = 1887, X86_NOT8r = 1888, X86_OR16i16 = 1889, X86_OR16mi = 1890, X86_OR16mi8 = 1891, X86_OR16mr = 1892, X86_OR16ri = 1893, X86_OR16ri8 = 1894, X86_OR16rm = 1895, X86_OR16rr = 1896, X86_OR16rr_REV = 1897, X86_OR32i32 = 1898, X86_OR32mi = 1899, X86_OR32mi8 = 1900, X86_OR32mr = 1901, X86_OR32mrLocked = 1902, X86_OR32ri = 1903, X86_OR32ri8 = 1904, X86_OR32rm = 1905, X86_OR32rr = 1906, X86_OR32rr_REV = 1907, X86_OR64i32 = 1908, X86_OR64mi32 = 1909, X86_OR64mi8 = 1910, X86_OR64mr = 1911, X86_OR64ri32 = 1912, X86_OR64ri8 = 1913, X86_OR64rm = 1914, X86_OR64rr = 1915, X86_OR64rr_REV = 1916, X86_OR8i8 = 1917, X86_OR8mi = 1918, X86_OR8mi8 = 1919, X86_OR8mr = 1920, X86_OR8ri = 1921, X86_OR8ri8 = 1922, X86_OR8rm = 1923, X86_OR8rr = 1924, X86_OR8rr_REV = 1925, X86_ORPDrm = 1926, X86_ORPDrr = 1927, X86_ORPSrm = 1928, X86_ORPSrr = 1929, X86_OUT16ir = 1930, X86_OUT16rr = 1931, X86_OUT32ir = 1932, X86_OUT32rr = 1933, X86_OUT8ir = 1934, X86_OUT8rr = 1935, X86_OUTSB = 1936, X86_OUTSL = 1937, X86_OUTSW = 1938, X86_PABSBrm128 = 1939, X86_PABSBrr128 = 1940, X86_PABSDrm128 = 1941, X86_PABSDrr128 = 1942, X86_PABSWrm128 = 1943, X86_PABSWrr128 = 1944, X86_PACKSSDWrm = 1945, X86_PACKSSDWrr = 1946, X86_PACKSSWBrm = 1947, X86_PACKSSWBrr = 1948, X86_PACKUSDWrm = 1949, X86_PACKUSDWrr = 1950, X86_PACKUSWBrm = 1951, X86_PACKUSWBrr = 1952, X86_PADDBrm = 1953, X86_PADDBrr = 1954, X86_PADDDrm = 1955, X86_PADDDrr = 1956, X86_PADDQrm = 1957, X86_PADDQrr = 1958, X86_PADDSBrm = 1959, X86_PADDSBrr = 1960, X86_PADDSWrm = 1961, X86_PADDSWrr = 1962, X86_PADDUSBrm = 1963, X86_PADDUSBrr = 1964, X86_PADDUSWrm = 1965, X86_PADDUSWrr = 1966, X86_PADDWrm = 1967, X86_PADDWrr = 1968, X86_PALIGNR128rm = 1969, X86_PALIGNR128rr = 1970, X86_PANDNrm = 1971, X86_PANDNrr = 1972, X86_PANDrm = 1973, X86_PANDrr = 1974, X86_PAUSE = 1975, X86_PAVGBrm = 1976, X86_PAVGBrr = 1977, X86_PAVGUSBrm = 1978, X86_PAVGUSBrr = 1979, X86_PAVGWrm = 1980, X86_PAVGWrr = 1981, X86_PBLENDVBrm0 = 1982, X86_PBLENDVBrr0 = 1983, X86_PBLENDWrmi = 1984, X86_PBLENDWrri = 1985, X86_PCLMULQDQrm = 1986, X86_PCLMULQDQrr = 1987, X86_PCMPEQBrm = 1988, X86_PCMPEQBrr = 1989, X86_PCMPEQDrm = 1990, X86_PCMPEQDrr = 1991, X86_PCMPEQQrm = 1992, X86_PCMPEQQrr = 1993, X86_PCMPEQWrm = 1994, X86_PCMPEQWrr = 1995, X86_PCMPESTRIMEM = 1996, X86_PCMPESTRIREG = 1997, X86_PCMPESTRIrm = 1998, X86_PCMPESTRIrr = 1999, X86_PCMPESTRM128MEM = 2000, X86_PCMPESTRM128REG = 2001, X86_PCMPESTRM128rm = 2002, X86_PCMPESTRM128rr = 2003, X86_PCMPGTBrm = 2004, X86_PCMPGTBrr = 2005, X86_PCMPGTDrm = 2006, X86_PCMPGTDrr = 2007, X86_PCMPGTQrm = 2008, X86_PCMPGTQrr = 2009, X86_PCMPGTWrm = 2010, X86_PCMPGTWrr = 2011, X86_PCMPISTRIMEM = 2012, X86_PCMPISTRIREG = 2013, X86_PCMPISTRIrm = 2014, X86_PCMPISTRIrr = 2015, X86_PCMPISTRM128MEM = 2016, X86_PCMPISTRM128REG = 2017, X86_PCMPISTRM128rm = 2018, X86_PCMPISTRM128rr = 2019, X86_PCOMMIT = 2020, X86_PDEP32rm = 2021, X86_PDEP32rr = 2022, X86_PDEP64rm = 2023, X86_PDEP64rr = 2024, X86_PEXT32rm = 2025, X86_PEXT32rr = 2026, X86_PEXT64rm = 2027, X86_PEXT64rr = 2028, X86_PEXTRBmr = 2029, X86_PEXTRBrr = 2030, X86_PEXTRDmr = 2031, X86_PEXTRDrr = 2032, X86_PEXTRQmr = 2033, X86_PEXTRQrr = 2034, X86_PEXTRWmr = 2035, X86_PEXTRWri = 2036, X86_PEXTRWrr_REV = 2037, X86_PF2IDrm = 2038, X86_PF2IDrr = 2039, X86_PF2IWrm = 2040, X86_PF2IWrr = 2041, X86_PFACCrm = 2042, X86_PFACCrr = 2043, X86_PFADDrm = 2044, X86_PFADDrr = 2045, X86_PFCMPEQrm = 2046, X86_PFCMPEQrr = 2047, X86_PFCMPGErm = 2048, X86_PFCMPGErr = 2049, X86_PFCMPGTrm = 2050, X86_PFCMPGTrr = 2051, X86_PFMAXrm = 2052, X86_PFMAXrr = 2053, X86_PFMINrm = 2054, X86_PFMINrr = 2055, X86_PFMULrm = 2056, X86_PFMULrr = 2057, X86_PFNACCrm = 2058, X86_PFNACCrr = 2059, X86_PFPNACCrm = 2060, X86_PFPNACCrr = 2061, X86_PFRCPIT1rm = 2062, X86_PFRCPIT1rr = 2063, X86_PFRCPIT2rm = 2064, X86_PFRCPIT2rr = 2065, X86_PFRCPrm = 2066, X86_PFRCPrr = 2067, X86_PFRSQIT1rm = 2068, X86_PFRSQIT1rr = 2069, X86_PFRSQRTrm = 2070, X86_PFRSQRTrr = 2071, X86_PFSUBRrm = 2072, X86_PFSUBRrr = 2073, X86_PFSUBrm = 2074, X86_PFSUBrr = 2075, X86_PHADDDrm = 2076, X86_PHADDDrr = 2077, X86_PHADDSWrm128 = 2078, X86_PHADDSWrr128 = 2079, X86_PHADDWrm = 2080, X86_PHADDWrr = 2081, X86_PHMINPOSUWrm128 = 2082, X86_PHMINPOSUWrr128 = 2083, X86_PHSUBDrm = 2084, X86_PHSUBDrr = 2085, X86_PHSUBSWrm128 = 2086, X86_PHSUBSWrr128 = 2087, X86_PHSUBWrm = 2088, X86_PHSUBWrr = 2089, X86_PI2FDrm = 2090, X86_PI2FDrr = 2091, X86_PI2FWrm = 2092, X86_PI2FWrr = 2093, X86_PINSRBrm = 2094, X86_PINSRBrr = 2095, X86_PINSRDrm = 2096, X86_PINSRDrr = 2097, X86_PINSRQrm = 2098, X86_PINSRQrr = 2099, X86_PINSRWrmi = 2100, X86_PINSRWrri = 2101, X86_PMADDUBSWrm128 = 2102, X86_PMADDUBSWrr128 = 2103, X86_PMADDWDrm = 2104, X86_PMADDWDrr = 2105, X86_PMAXSBrm = 2106, X86_PMAXSBrr = 2107, X86_PMAXSDrm = 2108, X86_PMAXSDrr = 2109, X86_PMAXSWrm = 2110, X86_PMAXSWrr = 2111, X86_PMAXUBrm = 2112, X86_PMAXUBrr = 2113, X86_PMAXUDrm = 2114, X86_PMAXUDrr = 2115, X86_PMAXUWrm = 2116, X86_PMAXUWrr = 2117, X86_PMINSBrm = 2118, X86_PMINSBrr = 2119, X86_PMINSDrm = 2120, X86_PMINSDrr = 2121, X86_PMINSWrm = 2122, X86_PMINSWrr = 2123, X86_PMINUBrm = 2124, X86_PMINUBrr = 2125, X86_PMINUDrm = 2126, X86_PMINUDrr = 2127, X86_PMINUWrm = 2128, X86_PMINUWrr = 2129, X86_PMOVMSKBrr = 2130, X86_PMOVSXBDrm = 2131, X86_PMOVSXBDrr = 2132, X86_PMOVSXBQrm = 2133, X86_PMOVSXBQrr = 2134, X86_PMOVSXBWrm = 2135, X86_PMOVSXBWrr = 2136, X86_PMOVSXDQrm = 2137, X86_PMOVSXDQrr = 2138, X86_PMOVSXWDrm = 2139, X86_PMOVSXWDrr = 2140, X86_PMOVSXWQrm = 2141, X86_PMOVSXWQrr = 2142, X86_PMOVZXBDrm = 2143, X86_PMOVZXBDrr = 2144, X86_PMOVZXBQrm = 2145, X86_PMOVZXBQrr = 2146, X86_PMOVZXBWrm = 2147, X86_PMOVZXBWrr = 2148, X86_PMOVZXDQrm = 2149, X86_PMOVZXDQrr = 2150, X86_PMOVZXWDrm = 2151, X86_PMOVZXWDrr = 2152, X86_PMOVZXWQrm = 2153, X86_PMOVZXWQrr = 2154, X86_PMULDQrm = 2155, X86_PMULDQrr = 2156, X86_PMULHRSWrm128 = 2157, X86_PMULHRSWrr128 = 2158, X86_PMULHRWrm = 2159, X86_PMULHRWrr = 2160, X86_PMULHUWrm = 2161, X86_PMULHUWrr = 2162, X86_PMULHWrm = 2163, X86_PMULHWrr = 2164, X86_PMULLDrm = 2165, X86_PMULLDrr = 2166, X86_PMULLWrm = 2167, X86_PMULLWrr = 2168, X86_PMULUDQrm = 2169, X86_PMULUDQrr = 2170, X86_POP16r = 2171, X86_POP16rmm = 2172, X86_POP16rmr = 2173, X86_POP32r = 2174, X86_POP32rmm = 2175, X86_POP32rmr = 2176, X86_POP64r = 2177, X86_POP64rmm = 2178, X86_POP64rmr = 2179, X86_POPA16 = 2180, X86_POPA32 = 2181, X86_POPCNT16rm = 2182, X86_POPCNT16rr = 2183, X86_POPCNT32rm = 2184, X86_POPCNT32rr = 2185, X86_POPCNT64rm = 2186, X86_POPCNT64rr = 2187, X86_POPDS16 = 2188, X86_POPDS32 = 2189, X86_POPES16 = 2190, X86_POPES32 = 2191, X86_POPF16 = 2192, X86_POPF32 = 2193, X86_POPF64 = 2194, X86_POPFS16 = 2195, X86_POPFS32 = 2196, X86_POPFS64 = 2197, X86_POPGS16 = 2198, X86_POPGS32 = 2199, X86_POPGS64 = 2200, X86_POPSS16 = 2201, X86_POPSS32 = 2202, X86_PORrm = 2203, X86_PORrr = 2204, X86_PREFETCH = 2205, X86_PREFETCHNTA = 2206, X86_PREFETCHT0 = 2207, X86_PREFETCHT1 = 2208, X86_PREFETCHT2 = 2209, X86_PREFETCHW = 2210, X86_PSADBWrm = 2211, X86_PSADBWrr = 2212, X86_PSHUFBrm = 2213, X86_PSHUFBrr = 2214, X86_PSHUFDmi = 2215, X86_PSHUFDri = 2216, X86_PSHUFHWmi = 2217, X86_PSHUFHWri = 2218, X86_PSHUFLWmi = 2219, X86_PSHUFLWri = 2220, X86_PSIGNBrm = 2221, X86_PSIGNBrr = 2222, X86_PSIGNDrm = 2223, X86_PSIGNDrr = 2224, X86_PSIGNWrm = 2225, X86_PSIGNWrr = 2226, X86_PSLLDQri = 2227, X86_PSLLDri = 2228, X86_PSLLDrm = 2229, X86_PSLLDrr = 2230, X86_PSLLQri = 2231, X86_PSLLQrm = 2232, X86_PSLLQrr = 2233, X86_PSLLWri = 2234, X86_PSLLWrm = 2235, X86_PSLLWrr = 2236, X86_PSRADri = 2237, X86_PSRADrm = 2238, X86_PSRADrr = 2239, X86_PSRAWri = 2240, X86_PSRAWrm = 2241, X86_PSRAWrr = 2242, X86_PSRLDQri = 2243, X86_PSRLDri = 2244, X86_PSRLDrm = 2245, X86_PSRLDrr = 2246, X86_PSRLQri = 2247, X86_PSRLQrm = 2248, X86_PSRLQrr = 2249, X86_PSRLWri = 2250, X86_PSRLWrm = 2251, X86_PSRLWrr = 2252, X86_PSUBBrm = 2253, X86_PSUBBrr = 2254, X86_PSUBDrm = 2255, X86_PSUBDrr = 2256, X86_PSUBQrm = 2257, X86_PSUBQrr = 2258, X86_PSUBSBrm = 2259, X86_PSUBSBrr = 2260, X86_PSUBSWrm = 2261, X86_PSUBSWrr = 2262, X86_PSUBUSBrm = 2263, X86_PSUBUSBrr = 2264, X86_PSUBUSWrm = 2265, X86_PSUBUSWrr = 2266, X86_PSUBWrm = 2267, X86_PSUBWrr = 2268, X86_PSWAPDrm = 2269, X86_PSWAPDrr = 2270, X86_PTESTrm = 2271, X86_PTESTrr = 2272, X86_PUNPCKHBWrm = 2273, X86_PUNPCKHBWrr = 2274, X86_PUNPCKHDQrm = 2275, X86_PUNPCKHDQrr = 2276, X86_PUNPCKHQDQrm = 2277, X86_PUNPCKHQDQrr = 2278, X86_PUNPCKHWDrm = 2279, X86_PUNPCKHWDrr = 2280, X86_PUNPCKLBWrm = 2281, X86_PUNPCKLBWrr = 2282, X86_PUNPCKLDQrm = 2283, X86_PUNPCKLDQrr = 2284, X86_PUNPCKLQDQrm = 2285, X86_PUNPCKLQDQrr = 2286, X86_PUNPCKLWDrm = 2287, X86_PUNPCKLWDrr = 2288, X86_PUSH16i8 = 2289, X86_PUSH16r = 2290, X86_PUSH16rmm = 2291, X86_PUSH16rmr = 2292, X86_PUSH32i8 = 2293, X86_PUSH32r = 2294, X86_PUSH32rmm = 2295, X86_PUSH32rmr = 2296, X86_PUSH64i16 = 2297, X86_PUSH64i32 = 2298, X86_PUSH64i8 = 2299, X86_PUSH64r = 2300, X86_PUSH64rmm = 2301, X86_PUSH64rmr = 2302, X86_PUSHA16 = 2303, X86_PUSHA32 = 2304, X86_PUSHCS16 = 2305, X86_PUSHCS32 = 2306, X86_PUSHDS16 = 2307, X86_PUSHDS32 = 2308, X86_PUSHES16 = 2309, X86_PUSHES32 = 2310, X86_PUSHF16 = 2311, X86_PUSHF32 = 2312, X86_PUSHF64 = 2313, X86_PUSHFS16 = 2314, X86_PUSHFS32 = 2315, X86_PUSHFS64 = 2316, X86_PUSHGS16 = 2317, X86_PUSHGS32 = 2318, X86_PUSHGS64 = 2319, X86_PUSHSS16 = 2320, X86_PUSHSS32 = 2321, X86_PUSHi16 = 2322, X86_PUSHi32 = 2323, X86_PXORrm = 2324, X86_PXORrr = 2325, X86_RCL16m1 = 2326, X86_RCL16mCL = 2327, X86_RCL16mi = 2328, X86_RCL16r1 = 2329, X86_RCL16rCL = 2330, X86_RCL16ri = 2331, X86_RCL32m1 = 2332, X86_RCL32mCL = 2333, X86_RCL32mi = 2334, X86_RCL32r1 = 2335, X86_RCL32rCL = 2336, X86_RCL32ri = 2337, X86_RCL64m1 = 2338, X86_RCL64mCL = 2339, X86_RCL64mi = 2340, X86_RCL64r1 = 2341, X86_RCL64rCL = 2342, X86_RCL64ri = 2343, X86_RCL8m1 = 2344, X86_RCL8mCL = 2345, X86_RCL8mi = 2346, X86_RCL8r1 = 2347, X86_RCL8rCL = 2348, X86_RCL8ri = 2349, X86_RCPPSm = 2350, X86_RCPPSm_Int = 2351, X86_RCPPSr = 2352, X86_RCPPSr_Int = 2353, X86_RCPSSm = 2354, X86_RCPSSm_Int = 2355, X86_RCPSSr = 2356, X86_RCPSSr_Int = 2357, X86_RCR16m1 = 2358, X86_RCR16mCL = 2359, X86_RCR16mi = 2360, X86_RCR16r1 = 2361, X86_RCR16rCL = 2362, X86_RCR16ri = 2363, X86_RCR32m1 = 2364, X86_RCR32mCL = 2365, X86_RCR32mi = 2366, X86_RCR32r1 = 2367, X86_RCR32rCL = 2368, X86_RCR32ri = 2369, X86_RCR64m1 = 2370, X86_RCR64mCL = 2371, X86_RCR64mi = 2372, X86_RCR64r1 = 2373, X86_RCR64rCL = 2374, X86_RCR64ri = 2375, X86_RCR8m1 = 2376, X86_RCR8mCL = 2377, X86_RCR8mi = 2378, X86_RCR8r1 = 2379, X86_RCR8rCL = 2380, X86_RCR8ri = 2381, X86_RDFSBASE = 2382, X86_RDFSBASE64 = 2383, X86_RDGSBASE = 2384, X86_RDGSBASE64 = 2385, X86_RDMSR = 2386, X86_RDPMC = 2387, X86_RDRAND16r = 2388, X86_RDRAND32r = 2389, X86_RDRAND64r = 2390, X86_RDSEED16r = 2391, X86_RDSEED32r = 2392, X86_RDSEED64r = 2393, X86_RDTSC = 2394, X86_RDTSCP = 2395, X86_RELEASE_ADD32mi = 2396, X86_RELEASE_ADD64mi32 = 2397, X86_RELEASE_ADD8mi = 2398, X86_RELEASE_AND32mi = 2399, X86_RELEASE_AND64mi32 = 2400, X86_RELEASE_AND8mi = 2401, X86_RELEASE_DEC16m = 2402, X86_RELEASE_DEC32m = 2403, X86_RELEASE_DEC64m = 2404, X86_RELEASE_DEC8m = 2405, X86_RELEASE_INC16m = 2406, X86_RELEASE_INC32m = 2407, X86_RELEASE_INC64m = 2408, X86_RELEASE_INC8m = 2409, X86_RELEASE_MOV16mi = 2410, X86_RELEASE_MOV16mr = 2411, X86_RELEASE_MOV32mi = 2412, X86_RELEASE_MOV32mr = 2413, X86_RELEASE_MOV64mi32 = 2414, X86_RELEASE_MOV64mr = 2415, X86_RELEASE_MOV8mi = 2416, X86_RELEASE_MOV8mr = 2417, X86_RELEASE_OR32mi = 2418, X86_RELEASE_OR64mi32 = 2419, X86_RELEASE_OR8mi = 2420, X86_RELEASE_XOR32mi = 2421, X86_RELEASE_XOR64mi32 = 2422, X86_RELEASE_XOR8mi = 2423, X86_REPNE_PREFIX = 2424, X86_REP_MOVSB_32 = 2425, X86_REP_MOVSB_64 = 2426, X86_REP_MOVSD_32 = 2427, X86_REP_MOVSD_64 = 2428, X86_REP_MOVSQ_64 = 2429, X86_REP_MOVSW_32 = 2430, X86_REP_MOVSW_64 = 2431, X86_REP_PREFIX = 2432, X86_REP_STOSB_32 = 2433, X86_REP_STOSB_64 = 2434, X86_REP_STOSD_32 = 2435, X86_REP_STOSD_64 = 2436, X86_REP_STOSQ_64 = 2437, X86_REP_STOSW_32 = 2438, X86_REP_STOSW_64 = 2439, X86_RETIL = 2440, X86_RETIQ = 2441, X86_RETIW = 2442, X86_RETL = 2443, X86_RETQ = 2444, X86_RETW = 2445, X86_REX64_PREFIX = 2446, X86_ROL16m1 = 2447, X86_ROL16mCL = 2448, X86_ROL16mi = 2449, X86_ROL16r1 = 2450, X86_ROL16rCL = 2451, X86_ROL16ri = 2452, X86_ROL32m1 = 2453, X86_ROL32mCL = 2454, X86_ROL32mi = 2455, X86_ROL32r1 = 2456, X86_ROL32rCL = 2457, X86_ROL32ri = 2458, X86_ROL64m1 = 2459, X86_ROL64mCL = 2460, X86_ROL64mi = 2461, X86_ROL64r1 = 2462, X86_ROL64rCL = 2463, X86_ROL64ri = 2464, X86_ROL8m1 = 2465, X86_ROL8mCL = 2466, X86_ROL8mi = 2467, X86_ROL8r1 = 2468, X86_ROL8rCL = 2469, X86_ROL8ri = 2470, X86_ROR16m1 = 2471, X86_ROR16mCL = 2472, X86_ROR16mi = 2473, X86_ROR16r1 = 2474, X86_ROR16rCL = 2475, X86_ROR16ri = 2476, X86_ROR32m1 = 2477, X86_ROR32mCL = 2478, X86_ROR32mi = 2479, X86_ROR32r1 = 2480, X86_ROR32rCL = 2481, X86_ROR32ri = 2482, X86_ROR64m1 = 2483, X86_ROR64mCL = 2484, X86_ROR64mi = 2485, X86_ROR64r1 = 2486, X86_ROR64rCL = 2487, X86_ROR64ri = 2488, X86_ROR8m1 = 2489, X86_ROR8mCL = 2490, X86_ROR8mi = 2491, X86_ROR8r1 = 2492, X86_ROR8rCL = 2493, X86_ROR8ri = 2494, X86_RORX32mi = 2495, X86_RORX32ri = 2496, X86_RORX64mi = 2497, X86_RORX64ri = 2498, X86_ROUNDPDm = 2499, X86_ROUNDPDr = 2500, X86_ROUNDPSm = 2501, X86_ROUNDPSr = 2502, X86_ROUNDSDm = 2503, X86_ROUNDSDr = 2504, X86_ROUNDSDr_Int = 2505, X86_ROUNDSSm = 2506, X86_ROUNDSSr = 2507, X86_ROUNDSSr_Int = 2508, X86_RSM = 2509, X86_RSQRTPSm = 2510, X86_RSQRTPSm_Int = 2511, X86_RSQRTPSr = 2512, X86_RSQRTPSr_Int = 2513, X86_RSQRTSSm = 2514, X86_RSQRTSSm_Int = 2515, X86_RSQRTSSr = 2516, X86_RSQRTSSr_Int = 2517, X86_SAHF = 2518, X86_SAL16m1 = 2519, X86_SAL16mCL = 2520, X86_SAL16mi = 2521, X86_SAL16r1 = 2522, X86_SAL16rCL = 2523, X86_SAL16ri = 2524, X86_SAL32m1 = 2525, X86_SAL32mCL = 2526, X86_SAL32mi = 2527, X86_SAL32r1 = 2528, X86_SAL32rCL = 2529, X86_SAL32ri = 2530, X86_SAL64m1 = 2531, X86_SAL64mCL = 2532, X86_SAL64mi = 2533, X86_SAL64r1 = 2534, X86_SAL64rCL = 2535, X86_SAL64ri = 2536, X86_SAL8m1 = 2537, X86_SAL8mCL = 2538, X86_SAL8mi = 2539, X86_SAL8r1 = 2540, X86_SAL8rCL = 2541, X86_SAL8ri = 2542, X86_SALC = 2543, X86_SAR16m1 = 2544, X86_SAR16mCL = 2545, X86_SAR16mi = 2546, X86_SAR16r1 = 2547, X86_SAR16rCL = 2548, X86_SAR16ri = 2549, X86_SAR32m1 = 2550, X86_SAR32mCL = 2551, X86_SAR32mi = 2552, X86_SAR32r1 = 2553, X86_SAR32rCL = 2554, X86_SAR32ri = 2555, X86_SAR64m1 = 2556, X86_SAR64mCL = 2557, X86_SAR64mi = 2558, X86_SAR64r1 = 2559, X86_SAR64rCL = 2560, X86_SAR64ri = 2561, X86_SAR8m1 = 2562, X86_SAR8mCL = 2563, X86_SAR8mi = 2564, X86_SAR8r1 = 2565, X86_SAR8rCL = 2566, X86_SAR8ri = 2567, X86_SARX32rm = 2568, X86_SARX32rr = 2569, X86_SARX64rm = 2570, X86_SARX64rr = 2571, X86_SBB16i16 = 2572, X86_SBB16mi = 2573, X86_SBB16mi8 = 2574, X86_SBB16mr = 2575, X86_SBB16ri = 2576, X86_SBB16ri8 = 2577, X86_SBB16rm = 2578, X86_SBB16rr = 2579, X86_SBB16rr_REV = 2580, X86_SBB32i32 = 2581, X86_SBB32mi = 2582, X86_SBB32mi8 = 2583, X86_SBB32mr = 2584, X86_SBB32ri = 2585, X86_SBB32ri8 = 2586, X86_SBB32rm = 2587, X86_SBB32rr = 2588, X86_SBB32rr_REV = 2589, X86_SBB64i32 = 2590, X86_SBB64mi32 = 2591, X86_SBB64mi8 = 2592, X86_SBB64mr = 2593, X86_SBB64ri32 = 2594, X86_SBB64ri8 = 2595, X86_SBB64rm = 2596, X86_SBB64rr = 2597, X86_SBB64rr_REV = 2598, X86_SBB8i8 = 2599, X86_SBB8mi = 2600, X86_SBB8mi8 = 2601, X86_SBB8mr = 2602, X86_SBB8ri = 2603, X86_SBB8ri8 = 2604, X86_SBB8rm = 2605, X86_SBB8rr = 2606, X86_SBB8rr_REV = 2607, X86_SCASB = 2608, X86_SCASL = 2609, X86_SCASQ = 2610, X86_SCASW = 2611, X86_SEG_ALLOCA_32 = 2612, X86_SEG_ALLOCA_64 = 2613, X86_SEH_EndPrologue = 2614, X86_SEH_Epilogue = 2615, X86_SEH_PushFrame = 2616, X86_SEH_PushReg = 2617, X86_SEH_SaveReg = 2618, X86_SEH_SaveXMM = 2619, X86_SEH_SetFrame = 2620, X86_SEH_StackAlloc = 2621, X86_SETAEm = 2622, X86_SETAEr = 2623, X86_SETAm = 2624, X86_SETAr = 2625, X86_SETBEm = 2626, X86_SETBEr = 2627, X86_SETB_C16r = 2628, X86_SETB_C32r = 2629, X86_SETB_C64r = 2630, X86_SETB_C8r = 2631, X86_SETBm = 2632, X86_SETBr = 2633, X86_SETEm = 2634, X86_SETEr = 2635, X86_SETGEm = 2636, X86_SETGEr = 2637, X86_SETGm = 2638, X86_SETGr = 2639, X86_SETLEm = 2640, X86_SETLEr = 2641, X86_SETLm = 2642, X86_SETLr = 2643, X86_SETNEm = 2644, X86_SETNEr = 2645, X86_SETNOm = 2646, X86_SETNOr = 2647, X86_SETNPm = 2648, X86_SETNPr = 2649, X86_SETNSm = 2650, X86_SETNSr = 2651, X86_SETOm = 2652, X86_SETOr = 2653, X86_SETPm = 2654, X86_SETPr = 2655, X86_SETSm = 2656, X86_SETSr = 2657, X86_SFENCE = 2658, X86_SGDT16m = 2659, X86_SGDT32m = 2660, X86_SGDT64m = 2661, X86_SHA1MSG1rm = 2662, X86_SHA1MSG1rr = 2663, X86_SHA1MSG2rm = 2664, X86_SHA1MSG2rr = 2665, X86_SHA1NEXTErm = 2666, X86_SHA1NEXTErr = 2667, X86_SHA1RNDS4rmi = 2668, X86_SHA1RNDS4rri = 2669, X86_SHA256MSG1rm = 2670, X86_SHA256MSG1rr = 2671, X86_SHA256MSG2rm = 2672, X86_SHA256MSG2rr = 2673, X86_SHA256RNDS2rm = 2674, X86_SHA256RNDS2rr = 2675, X86_SHL16m1 = 2676, X86_SHL16mCL = 2677, X86_SHL16mi = 2678, X86_SHL16r1 = 2679, X86_SHL16rCL = 2680, X86_SHL16ri = 2681, X86_SHL32m1 = 2682, X86_SHL32mCL = 2683, X86_SHL32mi = 2684, X86_SHL32r1 = 2685, X86_SHL32rCL = 2686, X86_SHL32ri = 2687, X86_SHL64m1 = 2688, X86_SHL64mCL = 2689, X86_SHL64mi = 2690, X86_SHL64r1 = 2691, X86_SHL64rCL = 2692, X86_SHL64ri = 2693, X86_SHL8m1 = 2694, X86_SHL8mCL = 2695, X86_SHL8mi = 2696, X86_SHL8r1 = 2697, X86_SHL8rCL = 2698, X86_SHL8ri = 2699, X86_SHLD16mrCL = 2700, X86_SHLD16mri8 = 2701, X86_SHLD16rrCL = 2702, X86_SHLD16rri8 = 2703, X86_SHLD32mrCL = 2704, X86_SHLD32mri8 = 2705, X86_SHLD32rrCL = 2706, X86_SHLD32rri8 = 2707, X86_SHLD64mrCL = 2708, X86_SHLD64mri8 = 2709, X86_SHLD64rrCL = 2710, X86_SHLD64rri8 = 2711, X86_SHLX32rm = 2712, X86_SHLX32rr = 2713, X86_SHLX64rm = 2714, X86_SHLX64rr = 2715, X86_SHR16m1 = 2716, X86_SHR16mCL = 2717, X86_SHR16mi = 2718, X86_SHR16r1 = 2719, X86_SHR16rCL = 2720, X86_SHR16ri = 2721, X86_SHR32m1 = 2722, X86_SHR32mCL = 2723, X86_SHR32mi = 2724, X86_SHR32r1 = 2725, X86_SHR32rCL = 2726, X86_SHR32ri = 2727, X86_SHR64m1 = 2728, X86_SHR64mCL = 2729, X86_SHR64mi = 2730, X86_SHR64r1 = 2731, X86_SHR64rCL = 2732, X86_SHR64ri = 2733, X86_SHR8m1 = 2734, X86_SHR8mCL = 2735, X86_SHR8mi = 2736, X86_SHR8r1 = 2737, X86_SHR8rCL = 2738, X86_SHR8ri = 2739, X86_SHRD16mrCL = 2740, X86_SHRD16mri8 = 2741, X86_SHRD16rrCL = 2742, X86_SHRD16rri8 = 2743, X86_SHRD32mrCL = 2744, X86_SHRD32mri8 = 2745, X86_SHRD32rrCL = 2746, X86_SHRD32rri8 = 2747, X86_SHRD64mrCL = 2748, X86_SHRD64mri8 = 2749, X86_SHRD64rrCL = 2750, X86_SHRD64rri8 = 2751, X86_SHRX32rm = 2752, X86_SHRX32rr = 2753, X86_SHRX64rm = 2754, X86_SHRX64rr = 2755, X86_SHUFPDrmi = 2756, X86_SHUFPDrri = 2757, X86_SHUFPSrmi = 2758, X86_SHUFPSrri = 2759, X86_SIDT16m = 2760, X86_SIDT32m = 2761, X86_SIDT64m = 2762, X86_SIN_F = 2763, X86_SIN_Fp32 = 2764, X86_SIN_Fp64 = 2765, X86_SIN_Fp80 = 2766, X86_SKINIT = 2767, X86_SLDT16m = 2768, X86_SLDT16r = 2769, X86_SLDT32r = 2770, X86_SLDT64m = 2771, X86_SLDT64r = 2772, X86_SMSW16m = 2773, X86_SMSW16r = 2774, X86_SMSW32r = 2775, X86_SMSW64r = 2776, X86_SQRTPDm = 2777, X86_SQRTPDr = 2778, X86_SQRTPSm = 2779, X86_SQRTPSr = 2780, X86_SQRTSDm = 2781, X86_SQRTSDm_Int = 2782, X86_SQRTSDr = 2783, X86_SQRTSDr_Int = 2784, X86_SQRTSSm = 2785, X86_SQRTSSm_Int = 2786, X86_SQRTSSr = 2787, X86_SQRTSSr_Int = 2788, X86_SQRT_F = 2789, X86_SQRT_Fp32 = 2790, X86_SQRT_Fp64 = 2791, X86_SQRT_Fp80 = 2792, X86_STAC = 2793, X86_STC = 2794, X86_STD = 2795, X86_STGI = 2796, X86_STI = 2797, X86_STMXCSR = 2798, X86_STOSB = 2799, X86_STOSL = 2800, X86_STOSQ = 2801, X86_STOSW = 2802, X86_STR16r = 2803, X86_STR32r = 2804, X86_STR64r = 2805, X86_STRm = 2806, X86_ST_F32m = 2807, X86_ST_F64m = 2808, X86_ST_FCOMPST0r = 2809, X86_ST_FCOMPST0r_alt = 2810, X86_ST_FCOMST0r = 2811, X86_ST_FP32m = 2812, X86_ST_FP64m = 2813, X86_ST_FP80m = 2814, X86_ST_FPNCEST0r = 2815, X86_ST_FPST0r = 2816, X86_ST_FPST0r_alt = 2817, X86_ST_FPrr = 2818, X86_ST_FXCHST0r = 2819, X86_ST_FXCHST0r_alt = 2820, X86_ST_Fp32m = 2821, X86_ST_Fp64m = 2822, X86_ST_Fp64m32 = 2823, X86_ST_Fp80m32 = 2824, X86_ST_Fp80m64 = 2825, X86_ST_FpP32m = 2826, X86_ST_FpP64m = 2827, X86_ST_FpP64m32 = 2828, X86_ST_FpP80m = 2829, X86_ST_FpP80m32 = 2830, X86_ST_FpP80m64 = 2831, X86_ST_Frr = 2832, X86_SUB16i16 = 2833, X86_SUB16mi = 2834, X86_SUB16mi8 = 2835, X86_SUB16mr = 2836, X86_SUB16ri = 2837, X86_SUB16ri8 = 2838, X86_SUB16rm = 2839, X86_SUB16rr = 2840, X86_SUB16rr_REV = 2841, X86_SUB32i32 = 2842, X86_SUB32mi = 2843, X86_SUB32mi8 = 2844, X86_SUB32mr = 2845, X86_SUB32ri = 2846, X86_SUB32ri8 = 2847, X86_SUB32rm = 2848, X86_SUB32rr = 2849, X86_SUB32rr_REV = 2850, X86_SUB64i32 = 2851, X86_SUB64mi32 = 2852, X86_SUB64mi8 = 2853, X86_SUB64mr = 2854, X86_SUB64ri32 = 2855, X86_SUB64ri8 = 2856, X86_SUB64rm = 2857, X86_SUB64rr = 2858, X86_SUB64rr_REV = 2859, X86_SUB8i8 = 2860, X86_SUB8mi = 2861, X86_SUB8mi8 = 2862, X86_SUB8mr = 2863, X86_SUB8ri = 2864, X86_SUB8ri8 = 2865, X86_SUB8rm = 2866, X86_SUB8rr = 2867, X86_SUB8rr_REV = 2868, X86_SUBPDrm = 2869, X86_SUBPDrr = 2870, X86_SUBPSrm = 2871, X86_SUBPSrr = 2872, X86_SUBR_F32m = 2873, X86_SUBR_F64m = 2874, X86_SUBR_FI16m = 2875, X86_SUBR_FI32m = 2876, X86_SUBR_FPrST0 = 2877, X86_SUBR_FST0r = 2878, X86_SUBR_Fp32m = 2879, X86_SUBR_Fp64m = 2880, X86_SUBR_Fp64m32 = 2881, X86_SUBR_Fp80m32 = 2882, X86_SUBR_Fp80m64 = 2883, X86_SUBR_FpI16m32 = 2884, X86_SUBR_FpI16m64 = 2885, X86_SUBR_FpI16m80 = 2886, X86_SUBR_FpI32m32 = 2887, X86_SUBR_FpI32m64 = 2888, X86_SUBR_FpI32m80 = 2889, X86_SUBR_FrST0 = 2890, X86_SUBSDrm = 2891, X86_SUBSDrm_Int = 2892, X86_SUBSDrr = 2893, X86_SUBSDrr_Int = 2894, X86_SUBSSrm = 2895, X86_SUBSSrm_Int = 2896, X86_SUBSSrr = 2897, X86_SUBSSrr_Int = 2898, X86_SUB_F32m = 2899, X86_SUB_F64m = 2900, X86_SUB_FI16m = 2901, X86_SUB_FI32m = 2902, X86_SUB_FPrST0 = 2903, X86_SUB_FST0r = 2904, X86_SUB_Fp32 = 2905, X86_SUB_Fp32m = 2906, X86_SUB_Fp64 = 2907, X86_SUB_Fp64m = 2908, X86_SUB_Fp64m32 = 2909, X86_SUB_Fp80 = 2910, X86_SUB_Fp80m32 = 2911, X86_SUB_Fp80m64 = 2912, X86_SUB_FpI16m32 = 2913, X86_SUB_FpI16m64 = 2914, X86_SUB_FpI16m80 = 2915, X86_SUB_FpI32m32 = 2916, X86_SUB_FpI32m64 = 2917, X86_SUB_FpI32m80 = 2918, X86_SUB_FrST0 = 2919, X86_SWAPGS = 2920, X86_SYSCALL = 2921, X86_SYSENTER = 2922, X86_SYSEXIT = 2923, X86_SYSEXIT64 = 2924, X86_SYSRET = 2925, X86_SYSRET64 = 2926, X86_T1MSKC32rm = 2927, X86_T1MSKC32rr = 2928, X86_T1MSKC64rm = 2929, X86_T1MSKC64rr = 2930, X86_TAILJMPd = 2931, X86_TAILJMPd64 = 2932, X86_TAILJMPd64_REX = 2933, X86_TAILJMPm = 2934, X86_TAILJMPm64 = 2935, X86_TAILJMPm64_REX = 2936, X86_TAILJMPr = 2937, X86_TAILJMPr64 = 2938, X86_TAILJMPr64_REX = 2939, X86_TCRETURNdi = 2940, X86_TCRETURNdi64 = 2941, X86_TCRETURNmi = 2942, X86_TCRETURNmi64 = 2943, X86_TCRETURNri = 2944, X86_TCRETURNri64 = 2945, X86_TEST16i16 = 2946, X86_TEST16mi = 2947, X86_TEST16mi_alt = 2948, X86_TEST16ri = 2949, X86_TEST16ri_alt = 2950, X86_TEST16rm = 2951, X86_TEST16rr = 2952, X86_TEST32i32 = 2953, X86_TEST32mi = 2954, X86_TEST32mi_alt = 2955, X86_TEST32ri = 2956, X86_TEST32ri_alt = 2957, X86_TEST32rm = 2958, X86_TEST32rr = 2959, X86_TEST64i32 = 2960, X86_TEST64mi32 = 2961, X86_TEST64mi32_alt = 2962, X86_TEST64ri32 = 2963, X86_TEST64ri32_alt = 2964, X86_TEST64rm = 2965, X86_TEST64rr = 2966, X86_TEST8i8 = 2967, X86_TEST8mi = 2968, X86_TEST8mi_alt = 2969, X86_TEST8ri = 2970, X86_TEST8ri_NOREX = 2971, X86_TEST8ri_alt = 2972, X86_TEST8rm = 2973, X86_TEST8rr = 2974, X86_TLSCall_32 = 2975, X86_TLSCall_64 = 2976, X86_TLS_addr32 = 2977, X86_TLS_addr64 = 2978, X86_TLS_base_addr32 = 2979, X86_TLS_base_addr64 = 2980, X86_TRAP = 2981, X86_TST_F = 2982, X86_TST_Fp32 = 2983, X86_TST_Fp64 = 2984, X86_TST_Fp80 = 2985, X86_TZCNT16rm = 2986, X86_TZCNT16rr = 2987, X86_TZCNT32rm = 2988, X86_TZCNT32rr = 2989, X86_TZCNT64rm = 2990, X86_TZCNT64rr = 2991, X86_TZMSK32rm = 2992, X86_TZMSK32rr = 2993, X86_TZMSK64rm = 2994, X86_TZMSK64rr = 2995, X86_UCOMISDrm = 2996, X86_UCOMISDrr = 2997, X86_UCOMISSrm = 2998, X86_UCOMISSrr = 2999, X86_UCOM_FIPr = 3000, X86_UCOM_FIr = 3001, X86_UCOM_FPPr = 3002, X86_UCOM_FPr = 3003, X86_UCOM_FpIr32 = 3004, X86_UCOM_FpIr64 = 3005, X86_UCOM_FpIr80 = 3006, X86_UCOM_Fpr32 = 3007, X86_UCOM_Fpr64 = 3008, X86_UCOM_Fpr80 = 3009, X86_UCOM_Fr = 3010, X86_UD2B = 3011, X86_UNPCKHPDrm = 3012, X86_UNPCKHPDrr = 3013, X86_UNPCKHPSrm = 3014, X86_UNPCKHPSrr = 3015, X86_UNPCKLPDrm = 3016, X86_UNPCKLPDrr = 3017, X86_UNPCKLPSrm = 3018, X86_UNPCKLPSrr = 3019, X86_VAARG_64 = 3020, X86_VADDPDYrm = 3021, X86_VADDPDYrr = 3022, X86_VADDPDZ128rm = 3023, X86_VADDPDZ128rmb = 3024, X86_VADDPDZ128rmbk = 3025, X86_VADDPDZ128rmbkz = 3026, X86_VADDPDZ128rmk = 3027, X86_VADDPDZ128rmkz = 3028, X86_VADDPDZ128rr = 3029, X86_VADDPDZ128rrk = 3030, X86_VADDPDZ128rrkz = 3031, X86_VADDPDZ256rm = 3032, X86_VADDPDZ256rmb = 3033, X86_VADDPDZ256rmbk = 3034, X86_VADDPDZ256rmbkz = 3035, X86_VADDPDZ256rmk = 3036, X86_VADDPDZ256rmkz = 3037, X86_VADDPDZ256rr = 3038, X86_VADDPDZ256rrk = 3039, X86_VADDPDZ256rrkz = 3040, X86_VADDPDZrb = 3041, X86_VADDPDZrbk = 3042, X86_VADDPDZrbkz = 3043, X86_VADDPDZrm = 3044, X86_VADDPDZrmb = 3045, X86_VADDPDZrmbk = 3046, X86_VADDPDZrmbkz = 3047, X86_VADDPDZrmk = 3048, X86_VADDPDZrmkz = 3049, X86_VADDPDZrr = 3050, X86_VADDPDZrrk = 3051, X86_VADDPDZrrkz = 3052, X86_VADDPDrm = 3053, X86_VADDPDrr = 3054, X86_VADDPSYrm = 3055, X86_VADDPSYrr = 3056, X86_VADDPSZ128rm = 3057, X86_VADDPSZ128rmb = 3058, X86_VADDPSZ128rmbk = 3059, X86_VADDPSZ128rmbkz = 3060, X86_VADDPSZ128rmk = 3061, X86_VADDPSZ128rmkz = 3062, X86_VADDPSZ128rr = 3063, X86_VADDPSZ128rrk = 3064, X86_VADDPSZ128rrkz = 3065, X86_VADDPSZ256rm = 3066, X86_VADDPSZ256rmb = 3067, X86_VADDPSZ256rmbk = 3068, X86_VADDPSZ256rmbkz = 3069, X86_VADDPSZ256rmk = 3070, X86_VADDPSZ256rmkz = 3071, X86_VADDPSZ256rr = 3072, X86_VADDPSZ256rrk = 3073, X86_VADDPSZ256rrkz = 3074, X86_VADDPSZrb = 3075, X86_VADDPSZrbk = 3076, X86_VADDPSZrbkz = 3077, X86_VADDPSZrm = 3078, X86_VADDPSZrmb = 3079, X86_VADDPSZrmbk = 3080, X86_VADDPSZrmbkz = 3081, X86_VADDPSZrmk = 3082, X86_VADDPSZrmkz = 3083, X86_VADDPSZrr = 3084, X86_VADDPSZrrk = 3085, X86_VADDPSZrrkz = 3086, X86_VADDPSrm = 3087, X86_VADDPSrr = 3088, X86_VADDSDZrm = 3089, X86_VADDSDZrm_Int = 3090, X86_VADDSDZrm_Intk = 3091, X86_VADDSDZrm_Intkz = 3092, X86_VADDSDZrr = 3093, X86_VADDSDZrr_Int = 3094, X86_VADDSDZrr_Intk = 3095, X86_VADDSDZrr_Intkz = 3096, X86_VADDSDZrrb = 3097, X86_VADDSDZrrbk = 3098, X86_VADDSDZrrbkz = 3099, X86_VADDSDrm = 3100, X86_VADDSDrm_Int = 3101, X86_VADDSDrr = 3102, X86_VADDSDrr_Int = 3103, X86_VADDSSZrm = 3104, X86_VADDSSZrm_Int = 3105, X86_VADDSSZrm_Intk = 3106, X86_VADDSSZrm_Intkz = 3107, X86_VADDSSZrr = 3108, X86_VADDSSZrr_Int = 3109, X86_VADDSSZrr_Intk = 3110, X86_VADDSSZrr_Intkz = 3111, X86_VADDSSZrrb = 3112, X86_VADDSSZrrbk = 3113, X86_VADDSSZrrbkz = 3114, X86_VADDSSrm = 3115, X86_VADDSSrm_Int = 3116, X86_VADDSSrr = 3117, X86_VADDSSrr_Int = 3118, X86_VADDSUBPDYrm = 3119, X86_VADDSUBPDYrr = 3120, X86_VADDSUBPDrm = 3121, X86_VADDSUBPDrr = 3122, X86_VADDSUBPSYrm = 3123, X86_VADDSUBPSYrr = 3124, X86_VADDSUBPSrm = 3125, X86_VADDSUBPSrr = 3126, X86_VAESDECLASTrm = 3127, X86_VAESDECLASTrr = 3128, X86_VAESDECrm = 3129, X86_VAESDECrr = 3130, X86_VAESENCLASTrm = 3131, X86_VAESENCLASTrr = 3132, X86_VAESENCrm = 3133, X86_VAESENCrr = 3134, X86_VAESIMCrm = 3135, X86_VAESIMCrr = 3136, X86_VAESKEYGENASSIST128rm = 3137, X86_VAESKEYGENASSIST128rr = 3138, X86_VALIGNDrmi = 3139, X86_VALIGNDrri = 3140, X86_VALIGNDrrik = 3141, X86_VALIGNDrrikz = 3142, X86_VALIGNQrmi = 3143, X86_VALIGNQrri = 3144, X86_VALIGNQrrik = 3145, X86_VALIGNQrrikz = 3146, X86_VANDNPDYrm = 3147, X86_VANDNPDYrr = 3148, X86_VANDNPDrm = 3149, X86_VANDNPDrr = 3150, X86_VANDNPSYrm = 3151, X86_VANDNPSYrr = 3152, X86_VANDNPSrm = 3153, X86_VANDNPSrr = 3154, X86_VANDPDYrm = 3155, X86_VANDPDYrr = 3156, X86_VANDPDrm = 3157, X86_VANDPDrr = 3158, X86_VANDPSYrm = 3159, X86_VANDPSYrr = 3160, X86_VANDPSrm = 3161, X86_VANDPSrr = 3162, X86_VASTART_SAVE_XMM_REGS = 3163, X86_VBLENDMPDZ128rm = 3164, X86_VBLENDMPDZ128rmb = 3165, X86_VBLENDMPDZ128rmbk = 3166, X86_VBLENDMPDZ128rmk = 3167, X86_VBLENDMPDZ128rmkz = 3168, X86_VBLENDMPDZ128rr = 3169, X86_VBLENDMPDZ128rrk = 3170, X86_VBLENDMPDZ128rrkz = 3171, X86_VBLENDMPDZ256rm = 3172, X86_VBLENDMPDZ256rmb = 3173, X86_VBLENDMPDZ256rmbk = 3174, X86_VBLENDMPDZ256rmk = 3175, X86_VBLENDMPDZ256rmkz = 3176, X86_VBLENDMPDZ256rr = 3177, X86_VBLENDMPDZ256rrk = 3178, X86_VBLENDMPDZ256rrkz = 3179, X86_VBLENDMPDZrm = 3180, X86_VBLENDMPDZrmb = 3181, X86_VBLENDMPDZrmbk = 3182, X86_VBLENDMPDZrmk = 3183, X86_VBLENDMPDZrmkz = 3184, X86_VBLENDMPDZrr = 3185, X86_VBLENDMPDZrrk = 3186, X86_VBLENDMPDZrrkz = 3187, X86_VBLENDMPSZ128rm = 3188, X86_VBLENDMPSZ128rmb = 3189, X86_VBLENDMPSZ128rmbk = 3190, X86_VBLENDMPSZ128rmk = 3191, X86_VBLENDMPSZ128rmkz = 3192, X86_VBLENDMPSZ128rr = 3193, X86_VBLENDMPSZ128rrk = 3194, X86_VBLENDMPSZ128rrkz = 3195, X86_VBLENDMPSZ256rm = 3196, X86_VBLENDMPSZ256rmb = 3197, X86_VBLENDMPSZ256rmbk = 3198, X86_VBLENDMPSZ256rmk = 3199, X86_VBLENDMPSZ256rmkz = 3200, X86_VBLENDMPSZ256rr = 3201, X86_VBLENDMPSZ256rrk = 3202, X86_VBLENDMPSZ256rrkz = 3203, X86_VBLENDMPSZrm = 3204, X86_VBLENDMPSZrmb = 3205, X86_VBLENDMPSZrmbk = 3206, X86_VBLENDMPSZrmk = 3207, X86_VBLENDMPSZrmkz = 3208, X86_VBLENDMPSZrr = 3209, X86_VBLENDMPSZrrk = 3210, X86_VBLENDMPSZrrkz = 3211, X86_VBLENDPDYrmi = 3212, X86_VBLENDPDYrri = 3213, X86_VBLENDPDrmi = 3214, X86_VBLENDPDrri = 3215, X86_VBLENDPSYrmi = 3216, X86_VBLENDPSYrri = 3217, X86_VBLENDPSrmi = 3218, X86_VBLENDPSrri = 3219, X86_VBLENDVPDYrm = 3220, X86_VBLENDVPDYrr = 3221, X86_VBLENDVPDrm = 3222, X86_VBLENDVPDrr = 3223, X86_VBLENDVPSYrm = 3224, X86_VBLENDVPSYrr = 3225, X86_VBLENDVPSrm = 3226, X86_VBLENDVPSrr = 3227, X86_VBROADCASTF128 = 3228, X86_VBROADCASTI32X4krm = 3229, X86_VBROADCASTI32X4rm = 3230, X86_VBROADCASTI64X4krm = 3231, X86_VBROADCASTI64X4rm = 3232, X86_VBROADCASTSDYrm = 3233, X86_VBROADCASTSDYrr = 3234, X86_VBROADCASTSDZ256m = 3235, X86_VBROADCASTSDZ256mk = 3236, X86_VBROADCASTSDZ256mkz = 3237, X86_VBROADCASTSDZ256r = 3238, X86_VBROADCASTSDZ256rk = 3239, X86_VBROADCASTSDZ256rkz = 3240, X86_VBROADCASTSDZm = 3241, X86_VBROADCASTSDZmk = 3242, X86_VBROADCASTSDZmkz = 3243, X86_VBROADCASTSDZr = 3244, X86_VBROADCASTSDZrk = 3245, X86_VBROADCASTSDZrkz = 3246, X86_VBROADCASTSSYrm = 3247, X86_VBROADCASTSSYrr = 3248, X86_VBROADCASTSSZ128m = 3249, X86_VBROADCASTSSZ128mk = 3250, X86_VBROADCASTSSZ128mkz = 3251, X86_VBROADCASTSSZ128r = 3252, X86_VBROADCASTSSZ128rk = 3253, X86_VBROADCASTSSZ128rkz = 3254, X86_VBROADCASTSSZ256m = 3255, X86_VBROADCASTSSZ256mk = 3256, X86_VBROADCASTSSZ256mkz = 3257, X86_VBROADCASTSSZ256r = 3258, X86_VBROADCASTSSZ256rk = 3259, X86_VBROADCASTSSZ256rkz = 3260, X86_VBROADCASTSSZm = 3261, X86_VBROADCASTSSZmk = 3262, X86_VBROADCASTSSZmkz = 3263, X86_VBROADCASTSSZr = 3264, X86_VBROADCASTSSZrk = 3265, X86_VBROADCASTSSZrkz = 3266, X86_VBROADCASTSSrm = 3267, X86_VBROADCASTSSrr = 3268, X86_VCMPPDYrmi = 3269, X86_VCMPPDYrmi_alt = 3270, X86_VCMPPDYrri = 3271, X86_VCMPPDYrri_alt = 3272, X86_VCMPPDZrmi = 3273, X86_VCMPPDZrmi_alt = 3274, X86_VCMPPDZrri = 3275, X86_VCMPPDZrri_alt = 3276, X86_VCMPPDZrrib = 3277, X86_VCMPPDZrrib_alt = 3278, X86_VCMPPDrmi = 3279, X86_VCMPPDrmi_alt = 3280, X86_VCMPPDrri = 3281, X86_VCMPPDrri_alt = 3282, X86_VCMPPSYrmi = 3283, X86_VCMPPSYrmi_alt = 3284, X86_VCMPPSYrri = 3285, X86_VCMPPSYrri_alt = 3286, X86_VCMPPSZrmi = 3287, X86_VCMPPSZrmi_alt = 3288, X86_VCMPPSZrri = 3289, X86_VCMPPSZrri_alt = 3290, X86_VCMPPSZrrib = 3291, X86_VCMPPSZrrib_alt = 3292, X86_VCMPPSrmi = 3293, X86_VCMPPSrmi_alt = 3294, X86_VCMPPSrri = 3295, X86_VCMPPSrri_alt = 3296, X86_VCMPSDZrm = 3297, X86_VCMPSDZrmi_alt = 3298, X86_VCMPSDZrr = 3299, X86_VCMPSDZrri_alt = 3300, X86_VCMPSDrm = 3301, X86_VCMPSDrm_alt = 3302, X86_VCMPSDrr = 3303, X86_VCMPSDrr_alt = 3304, X86_VCMPSSZrm = 3305, X86_VCMPSSZrmi_alt = 3306, X86_VCMPSSZrr = 3307, X86_VCMPSSZrri_alt = 3308, X86_VCMPSSrm = 3309, X86_VCMPSSrm_alt = 3310, X86_VCMPSSrr = 3311, X86_VCMPSSrr_alt = 3312, X86_VCOMISDZrm = 3313, X86_VCOMISDZrr = 3314, X86_VCOMISDrm = 3315, X86_VCOMISDrr = 3316, X86_VCOMISSZrm = 3317, X86_VCOMISSZrr = 3318, X86_VCOMISSrm = 3319, X86_VCOMISSrr = 3320, X86_VCOMPRESSPDZ128mrk = 3321, X86_VCOMPRESSPDZ128rrk = 3322, X86_VCOMPRESSPDZ128rrkz = 3323, X86_VCOMPRESSPDZ256mrk = 3324, X86_VCOMPRESSPDZ256rrk = 3325, X86_VCOMPRESSPDZ256rrkz = 3326, X86_VCOMPRESSPDZmrk = 3327, X86_VCOMPRESSPDZrrk = 3328, X86_VCOMPRESSPDZrrkz = 3329, X86_VCOMPRESSPSZ128mrk = 3330, X86_VCOMPRESSPSZ128rrk = 3331, X86_VCOMPRESSPSZ128rrkz = 3332, X86_VCOMPRESSPSZ256mrk = 3333, X86_VCOMPRESSPSZ256rrk = 3334, X86_VCOMPRESSPSZ256rrkz = 3335, X86_VCOMPRESSPSZmrk = 3336, X86_VCOMPRESSPSZrrk = 3337, X86_VCOMPRESSPSZrrkz = 3338, X86_VCVTDQ2PDYrm = 3339, X86_VCVTDQ2PDYrr = 3340, X86_VCVTDQ2PDZrm = 3341, X86_VCVTDQ2PDZrr = 3342, X86_VCVTDQ2PDrm = 3343, X86_VCVTDQ2PDrr = 3344, X86_VCVTDQ2PSYrm = 3345, X86_VCVTDQ2PSYrr = 3346, X86_VCVTDQ2PSZrm = 3347, X86_VCVTDQ2PSZrr = 3348, X86_VCVTDQ2PSZrrb = 3349, X86_VCVTDQ2PSrm = 3350, X86_VCVTDQ2PSrr = 3351, X86_VCVTPD2DQXrm = 3352, X86_VCVTPD2DQYrm = 3353, X86_VCVTPD2DQYrr = 3354, X86_VCVTPD2DQZrm = 3355, X86_VCVTPD2DQZrr = 3356, X86_VCVTPD2DQZrrb = 3357, X86_VCVTPD2DQrr = 3358, X86_VCVTPD2PSXrm = 3359, X86_VCVTPD2PSYrm = 3360, X86_VCVTPD2PSYrr = 3361, X86_VCVTPD2PSZrm = 3362, X86_VCVTPD2PSZrr = 3363, X86_VCVTPD2PSZrrb = 3364, X86_VCVTPD2PSrr = 3365, X86_VCVTPD2UDQZrm = 3366, X86_VCVTPD2UDQZrr = 3367, X86_VCVTPD2UDQZrrb = 3368, X86_VCVTPH2PSYrm = 3369, X86_VCVTPH2PSYrr = 3370, X86_VCVTPH2PSZrm = 3371, X86_VCVTPH2PSZrr = 3372, X86_VCVTPH2PSrm = 3373, X86_VCVTPH2PSrr = 3374, X86_VCVTPS2DQYrm = 3375, X86_VCVTPS2DQYrr = 3376, X86_VCVTPS2DQZrm = 3377, X86_VCVTPS2DQZrr = 3378, X86_VCVTPS2DQZrrb = 3379, X86_VCVTPS2DQrm = 3380, X86_VCVTPS2DQrr = 3381, X86_VCVTPS2PDYrm = 3382, X86_VCVTPS2PDYrr = 3383, X86_VCVTPS2PDZrm = 3384, X86_VCVTPS2PDZrr = 3385, X86_VCVTPS2PDrm = 3386, X86_VCVTPS2PDrr = 3387, X86_VCVTPS2PHYmr = 3388, X86_VCVTPS2PHYrr = 3389, X86_VCVTPS2PHZmr = 3390, X86_VCVTPS2PHZrr = 3391, X86_VCVTPS2PHmr = 3392, X86_VCVTPS2PHrr = 3393, X86_VCVTPS2UDQZrm = 3394, X86_VCVTPS2UDQZrr = 3395, X86_VCVTPS2UDQZrrb = 3396, X86_VCVTSD2SI64Zrm = 3397, X86_VCVTSD2SI64Zrr = 3398, X86_VCVTSD2SI64rm = 3399, X86_VCVTSD2SI64rr = 3400, X86_VCVTSD2SIZrm = 3401, X86_VCVTSD2SIZrr = 3402, X86_VCVTSD2SIrm = 3403, X86_VCVTSD2SIrr = 3404, X86_VCVTSD2SSZrm = 3405, X86_VCVTSD2SSZrr = 3406, X86_VCVTSD2SSrm = 3407, X86_VCVTSD2SSrr = 3408, X86_VCVTSD2USI64Zrm = 3409, X86_VCVTSD2USI64Zrr = 3410, X86_VCVTSD2USIZrm = 3411, X86_VCVTSD2USIZrr = 3412, X86_VCVTSI2SD64rm = 3413, X86_VCVTSI2SD64rr = 3414, X86_VCVTSI2SDZrm = 3415, X86_VCVTSI2SDZrr = 3416, X86_VCVTSI2SDrm = 3417, X86_VCVTSI2SDrr = 3418, X86_VCVTSI2SS64rm = 3419, X86_VCVTSI2SS64rr = 3420, X86_VCVTSI2SSZrm = 3421, X86_VCVTSI2SSZrr = 3422, X86_VCVTSI2SSrm = 3423, X86_VCVTSI2SSrr = 3424, X86_VCVTSI642SDZrm = 3425, X86_VCVTSI642SDZrr = 3426, X86_VCVTSI642SSZrm = 3427, X86_VCVTSI642SSZrr = 3428, X86_VCVTSS2SDZrm = 3429, X86_VCVTSS2SDZrr = 3430, X86_VCVTSS2SDrm = 3431, X86_VCVTSS2SDrr = 3432, X86_VCVTSS2SI64Zrm = 3433, X86_VCVTSS2SI64Zrr = 3434, X86_VCVTSS2SI64rm = 3435, X86_VCVTSS2SI64rr = 3436, X86_VCVTSS2SIZrm = 3437, X86_VCVTSS2SIZrr = 3438, X86_VCVTSS2SIrm = 3439, X86_VCVTSS2SIrr = 3440, X86_VCVTSS2USI64Zrm = 3441, X86_VCVTSS2USI64Zrr = 3442, X86_VCVTSS2USIZrm = 3443, X86_VCVTSS2USIZrr = 3444, X86_VCVTTPD2DQXrm = 3445, X86_VCVTTPD2DQYrm = 3446, X86_VCVTTPD2DQYrr = 3447, X86_VCVTTPD2DQZrm = 3448, X86_VCVTTPD2DQZrr = 3449, X86_VCVTTPD2DQrr = 3450, X86_VCVTTPD2UDQZrm = 3451, X86_VCVTTPD2UDQZrr = 3452, X86_VCVTTPS2DQYrm = 3453, X86_VCVTTPS2DQYrr = 3454, X86_VCVTTPS2DQZrm = 3455, X86_VCVTTPS2DQZrr = 3456, X86_VCVTTPS2DQrm = 3457, X86_VCVTTPS2DQrr = 3458, X86_VCVTTPS2UDQZrm = 3459, X86_VCVTTPS2UDQZrr = 3460, X86_VCVTTSD2SI64Zrm = 3461, X86_VCVTTSD2SI64Zrr = 3462, X86_VCVTTSD2SI64rm = 3463, X86_VCVTTSD2SI64rr = 3464, X86_VCVTTSD2SIZrm = 3465, X86_VCVTTSD2SIZrr = 3466, X86_VCVTTSD2SIrm = 3467, X86_VCVTTSD2SIrr = 3468, X86_VCVTTSD2USI64Zrm = 3469, X86_VCVTTSD2USI64Zrr = 3470, X86_VCVTTSD2USIZrm = 3471, X86_VCVTTSD2USIZrr = 3472, X86_VCVTTSS2SI64Zrm = 3473, X86_VCVTTSS2SI64Zrr = 3474, X86_VCVTTSS2SI64rm = 3475, X86_VCVTTSS2SI64rr = 3476, X86_VCVTTSS2SIZrm = 3477, X86_VCVTTSS2SIZrr = 3478, X86_VCVTTSS2SIrm = 3479, X86_VCVTTSS2SIrr = 3480, X86_VCVTTSS2USI64Zrm = 3481, X86_VCVTTSS2USI64Zrr = 3482, X86_VCVTTSS2USIZrm = 3483, X86_VCVTTSS2USIZrr = 3484, X86_VCVTUDQ2PDZrm = 3485, X86_VCVTUDQ2PDZrr = 3486, X86_VCVTUDQ2PSZrm = 3487, X86_VCVTUDQ2PSZrr = 3488, X86_VCVTUDQ2PSZrrb = 3489, X86_VCVTUSI2SDZrm = 3490, X86_VCVTUSI2SDZrr = 3491, X86_VCVTUSI2SSZrm = 3492, X86_VCVTUSI2SSZrr = 3493, X86_VCVTUSI642SDZrm = 3494, X86_VCVTUSI642SDZrr = 3495, X86_VCVTUSI642SSZrm = 3496, X86_VCVTUSI642SSZrr = 3497, X86_VDIVPDYrm = 3498, X86_VDIVPDYrr = 3499, X86_VDIVPDZ128rm = 3500, X86_VDIVPDZ128rmb = 3501, X86_VDIVPDZ128rmbk = 3502, X86_VDIVPDZ128rmbkz = 3503, X86_VDIVPDZ128rmk = 3504, X86_VDIVPDZ128rmkz = 3505, X86_VDIVPDZ128rr = 3506, X86_VDIVPDZ128rrk = 3507, X86_VDIVPDZ128rrkz = 3508, X86_VDIVPDZ256rm = 3509, X86_VDIVPDZ256rmb = 3510, X86_VDIVPDZ256rmbk = 3511, X86_VDIVPDZ256rmbkz = 3512, X86_VDIVPDZ256rmk = 3513, X86_VDIVPDZ256rmkz = 3514, X86_VDIVPDZ256rr = 3515, X86_VDIVPDZ256rrk = 3516, X86_VDIVPDZ256rrkz = 3517, X86_VDIVPDZrb = 3518, X86_VDIVPDZrbk = 3519, X86_VDIVPDZrbkz = 3520, X86_VDIVPDZrm = 3521, X86_VDIVPDZrmb = 3522, X86_VDIVPDZrmbk = 3523, X86_VDIVPDZrmbkz = 3524, X86_VDIVPDZrmk = 3525, X86_VDIVPDZrmkz = 3526, X86_VDIVPDZrr = 3527, X86_VDIVPDZrrk = 3528, X86_VDIVPDZrrkz = 3529, X86_VDIVPDrm = 3530, X86_VDIVPDrr = 3531, X86_VDIVPSYrm = 3532, X86_VDIVPSYrr = 3533, X86_VDIVPSZ128rm = 3534, X86_VDIVPSZ128rmb = 3535, X86_VDIVPSZ128rmbk = 3536, X86_VDIVPSZ128rmbkz = 3537, X86_VDIVPSZ128rmk = 3538, X86_VDIVPSZ128rmkz = 3539, X86_VDIVPSZ128rr = 3540, X86_VDIVPSZ128rrk = 3541, X86_VDIVPSZ128rrkz = 3542, X86_VDIVPSZ256rm = 3543, X86_VDIVPSZ256rmb = 3544, X86_VDIVPSZ256rmbk = 3545, X86_VDIVPSZ256rmbkz = 3546, X86_VDIVPSZ256rmk = 3547, X86_VDIVPSZ256rmkz = 3548, X86_VDIVPSZ256rr = 3549, X86_VDIVPSZ256rrk = 3550, X86_VDIVPSZ256rrkz = 3551, X86_VDIVPSZrb = 3552, X86_VDIVPSZrbk = 3553, X86_VDIVPSZrbkz = 3554, X86_VDIVPSZrm = 3555, X86_VDIVPSZrmb = 3556, X86_VDIVPSZrmbk = 3557, X86_VDIVPSZrmbkz = 3558, X86_VDIVPSZrmk = 3559, X86_VDIVPSZrmkz = 3560, X86_VDIVPSZrr = 3561, X86_VDIVPSZrrk = 3562, X86_VDIVPSZrrkz = 3563, X86_VDIVPSrm = 3564, X86_VDIVPSrr = 3565, X86_VDIVSDZrm = 3566, X86_VDIVSDZrm_Int = 3567, X86_VDIVSDZrm_Intk = 3568, X86_VDIVSDZrm_Intkz = 3569, X86_VDIVSDZrr = 3570, X86_VDIVSDZrr_Int = 3571, X86_VDIVSDZrr_Intk = 3572, X86_VDIVSDZrr_Intkz = 3573, X86_VDIVSDZrrb = 3574, X86_VDIVSDZrrbk = 3575, X86_VDIVSDZrrbkz = 3576, X86_VDIVSDrm = 3577, X86_VDIVSDrm_Int = 3578, X86_VDIVSDrr = 3579, X86_VDIVSDrr_Int = 3580, X86_VDIVSSZrm = 3581, X86_VDIVSSZrm_Int = 3582, X86_VDIVSSZrm_Intk = 3583, X86_VDIVSSZrm_Intkz = 3584, X86_VDIVSSZrr = 3585, X86_VDIVSSZrr_Int = 3586, X86_VDIVSSZrr_Intk = 3587, X86_VDIVSSZrr_Intkz = 3588, X86_VDIVSSZrrb = 3589, X86_VDIVSSZrrbk = 3590, X86_VDIVSSZrrbkz = 3591, X86_VDIVSSrm = 3592, X86_VDIVSSrm_Int = 3593, X86_VDIVSSrr = 3594, X86_VDIVSSrr_Int = 3595, X86_VDPPDrmi = 3596, X86_VDPPDrri = 3597, X86_VDPPSYrmi = 3598, X86_VDPPSYrri = 3599, X86_VDPPSrmi = 3600, X86_VDPPSrri = 3601, X86_VERRm = 3602, X86_VERRr = 3603, X86_VERWm = 3604, X86_VERWr = 3605, X86_VEXP2PDm = 3606, X86_VEXP2PDmb = 3607, X86_VEXP2PDmbk = 3608, X86_VEXP2PDmbkz = 3609, X86_VEXP2PDmk = 3610, X86_VEXP2PDmkz = 3611, X86_VEXP2PDr = 3612, X86_VEXP2PDrb = 3613, X86_VEXP2PDrbk = 3614, X86_VEXP2PDrbkz = 3615, X86_VEXP2PDrk = 3616, X86_VEXP2PDrkz = 3617, X86_VEXP2PSm = 3618, X86_VEXP2PSmb = 3619, X86_VEXP2PSmbk = 3620, X86_VEXP2PSmbkz = 3621, X86_VEXP2PSmk = 3622, X86_VEXP2PSmkz = 3623, X86_VEXP2PSr = 3624, X86_VEXP2PSrb = 3625, X86_VEXP2PSrbk = 3626, X86_VEXP2PSrbkz = 3627, X86_VEXP2PSrk = 3628, X86_VEXP2PSrkz = 3629, X86_VEXPANDPDZ128rmk = 3630, X86_VEXPANDPDZ128rmkz = 3631, X86_VEXPANDPDZ128rrk = 3632, X86_VEXPANDPDZ128rrkz = 3633, X86_VEXPANDPDZ256rmk = 3634, X86_VEXPANDPDZ256rmkz = 3635, X86_VEXPANDPDZ256rrk = 3636, X86_VEXPANDPDZ256rrkz = 3637, X86_VEXPANDPDZrmk = 3638, X86_VEXPANDPDZrmkz = 3639, X86_VEXPANDPDZrrk = 3640, X86_VEXPANDPDZrrkz = 3641, X86_VEXPANDPSZ128rmk = 3642, X86_VEXPANDPSZ128rmkz = 3643, X86_VEXPANDPSZ128rrk = 3644, X86_VEXPANDPSZ128rrkz = 3645, X86_VEXPANDPSZ256rmk = 3646, X86_VEXPANDPSZ256rmkz = 3647, X86_VEXPANDPSZ256rrk = 3648, X86_VEXPANDPSZ256rrkz = 3649, X86_VEXPANDPSZrmk = 3650, X86_VEXPANDPSZrmkz = 3651, X86_VEXPANDPSZrrk = 3652, X86_VEXPANDPSZrrkz = 3653, X86_VEXTRACTF128mr = 3654, X86_VEXTRACTF128rr = 3655, X86_VEXTRACTF32x4rm = 3656, X86_VEXTRACTF32x4rr = 3657, X86_VEXTRACTF32x4rrk = 3658, X86_VEXTRACTF32x4rrkz = 3659, X86_VEXTRACTF64x4rm = 3660, X86_VEXTRACTF64x4rr = 3661, X86_VEXTRACTF64x4rrk = 3662, X86_VEXTRACTF64x4rrkz = 3663, X86_VEXTRACTI128mr = 3664, X86_VEXTRACTI128rr = 3665, X86_VEXTRACTI32x4rm = 3666, X86_VEXTRACTI32x4rr = 3667, X86_VEXTRACTI32x4rrk = 3668, X86_VEXTRACTI32x4rrkz = 3669, X86_VEXTRACTI64x4rm = 3670, X86_VEXTRACTI64x4rr = 3671, X86_VEXTRACTI64x4rrk = 3672, X86_VEXTRACTI64x4rrkz = 3673, X86_VEXTRACTPSmr = 3674, X86_VEXTRACTPSrr = 3675, X86_VEXTRACTPSzmr = 3676, X86_VEXTRACTPSzrr = 3677, X86_VFMADD132PDZ128m = 3678, X86_VFMADD132PDZ128mb = 3679, X86_VFMADD132PDZ256m = 3680, X86_VFMADD132PDZ256mb = 3681, X86_VFMADD132PDZm = 3682, X86_VFMADD132PDZmb = 3683, X86_VFMADD132PSZ128m = 3684, X86_VFMADD132PSZ128mb = 3685, X86_VFMADD132PSZ256m = 3686, X86_VFMADD132PSZ256mb = 3687, X86_VFMADD132PSZm = 3688, X86_VFMADD132PSZmb = 3689, X86_VFMADDPD4mr = 3690, X86_VFMADDPD4mrY = 3691, X86_VFMADDPD4rm = 3692, X86_VFMADDPD4rmY = 3693, X86_VFMADDPD4rr = 3694, X86_VFMADDPD4rrY = 3695, X86_VFMADDPD4rrY_REV = 3696, X86_VFMADDPD4rr_REV = 3697, X86_VFMADDPDZ128v213rm = 3698, X86_VFMADDPDZ128v213rmb = 3699, X86_VFMADDPDZ128v213rmbk = 3700, X86_VFMADDPDZ128v213rmbkz = 3701, X86_VFMADDPDZ128v213rmk = 3702, X86_VFMADDPDZ128v213rmkz = 3703, X86_VFMADDPDZ128v213rr = 3704, X86_VFMADDPDZ128v213rrk = 3705, X86_VFMADDPDZ128v213rrkz = 3706, X86_VFMADDPDZ128v231rm = 3707, X86_VFMADDPDZ128v231rmb = 3708, X86_VFMADDPDZ128v231rmbk = 3709, X86_VFMADDPDZ128v231rmbkz = 3710, X86_VFMADDPDZ128v231rmk = 3711, X86_VFMADDPDZ128v231rmkz = 3712, X86_VFMADDPDZ128v231rr = 3713, X86_VFMADDPDZ128v231rrk = 3714, X86_VFMADDPDZ128v231rrkz = 3715, X86_VFMADDPDZ256v213rm = 3716, X86_VFMADDPDZ256v213rmb = 3717, X86_VFMADDPDZ256v213rmbk = 3718, X86_VFMADDPDZ256v213rmbkz = 3719, X86_VFMADDPDZ256v213rmk = 3720, X86_VFMADDPDZ256v213rmkz = 3721, X86_VFMADDPDZ256v213rr = 3722, X86_VFMADDPDZ256v213rrk = 3723, X86_VFMADDPDZ256v213rrkz = 3724, X86_VFMADDPDZ256v231rm = 3725, X86_VFMADDPDZ256v231rmb = 3726, X86_VFMADDPDZ256v231rmbk = 3727, X86_VFMADDPDZ256v231rmbkz = 3728, X86_VFMADDPDZ256v231rmk = 3729, X86_VFMADDPDZ256v231rmkz = 3730, X86_VFMADDPDZ256v231rr = 3731, X86_VFMADDPDZ256v231rrk = 3732, X86_VFMADDPDZ256v231rrkz = 3733, X86_VFMADDPDZv213rm = 3734, X86_VFMADDPDZv213rmb = 3735, X86_VFMADDPDZv213rmbk = 3736, X86_VFMADDPDZv213rmbkz = 3737, X86_VFMADDPDZv213rmk = 3738, X86_VFMADDPDZv213rmkz = 3739, X86_VFMADDPDZv213rr = 3740, X86_VFMADDPDZv213rrb = 3741, X86_VFMADDPDZv213rrbk = 3742, X86_VFMADDPDZv213rrbkz = 3743, X86_VFMADDPDZv213rrk = 3744, X86_VFMADDPDZv213rrkz = 3745, X86_VFMADDPDZv231rm = 3746, X86_VFMADDPDZv231rmb = 3747, X86_VFMADDPDZv231rmbk = 3748, X86_VFMADDPDZv231rmbkz = 3749, X86_VFMADDPDZv231rmk = 3750, X86_VFMADDPDZv231rmkz = 3751, X86_VFMADDPDZv231rr = 3752, X86_VFMADDPDZv231rrk = 3753, X86_VFMADDPDZv231rrkz = 3754, X86_VFMADDPDr132m = 3755, X86_VFMADDPDr132mY = 3756, X86_VFMADDPDr132r = 3757, X86_VFMADDPDr132rY = 3758, X86_VFMADDPDr213m = 3759, X86_VFMADDPDr213mY = 3760, X86_VFMADDPDr213r = 3761, X86_VFMADDPDr213rY = 3762, X86_VFMADDPDr231m = 3763, X86_VFMADDPDr231mY = 3764, X86_VFMADDPDr231r = 3765, X86_VFMADDPDr231rY = 3766, X86_VFMADDPS4mr = 3767, X86_VFMADDPS4mrY = 3768, X86_VFMADDPS4rm = 3769, X86_VFMADDPS4rmY = 3770, X86_VFMADDPS4rr = 3771, X86_VFMADDPS4rrY = 3772, X86_VFMADDPS4rrY_REV = 3773, X86_VFMADDPS4rr_REV = 3774, X86_VFMADDPSZ128v213rm = 3775, X86_VFMADDPSZ128v213rmb = 3776, X86_VFMADDPSZ128v213rmbk = 3777, X86_VFMADDPSZ128v213rmbkz = 3778, X86_VFMADDPSZ128v213rmk = 3779, X86_VFMADDPSZ128v213rmkz = 3780, X86_VFMADDPSZ128v213rr = 3781, X86_VFMADDPSZ128v213rrk = 3782, X86_VFMADDPSZ128v213rrkz = 3783, X86_VFMADDPSZ128v231rm = 3784, X86_VFMADDPSZ128v231rmb = 3785, X86_VFMADDPSZ128v231rmbk = 3786, X86_VFMADDPSZ128v231rmbkz = 3787, X86_VFMADDPSZ128v231rmk = 3788, X86_VFMADDPSZ128v231rmkz = 3789, X86_VFMADDPSZ128v231rr = 3790, X86_VFMADDPSZ128v231rrk = 3791, X86_VFMADDPSZ128v231rrkz = 3792, X86_VFMADDPSZ256v213rm = 3793, X86_VFMADDPSZ256v213rmb = 3794, X86_VFMADDPSZ256v213rmbk = 3795, X86_VFMADDPSZ256v213rmbkz = 3796, X86_VFMADDPSZ256v213rmk = 3797, X86_VFMADDPSZ256v213rmkz = 3798, X86_VFMADDPSZ256v213rr = 3799, X86_VFMADDPSZ256v213rrk = 3800, X86_VFMADDPSZ256v213rrkz = 3801, X86_VFMADDPSZ256v231rm = 3802, X86_VFMADDPSZ256v231rmb = 3803, X86_VFMADDPSZ256v231rmbk = 3804, X86_VFMADDPSZ256v231rmbkz = 3805, X86_VFMADDPSZ256v231rmk = 3806, X86_VFMADDPSZ256v231rmkz = 3807, X86_VFMADDPSZ256v231rr = 3808, X86_VFMADDPSZ256v231rrk = 3809, X86_VFMADDPSZ256v231rrkz = 3810, X86_VFMADDPSZv213rm = 3811, X86_VFMADDPSZv213rmb = 3812, X86_VFMADDPSZv213rmbk = 3813, X86_VFMADDPSZv213rmbkz = 3814, X86_VFMADDPSZv213rmk = 3815, X86_VFMADDPSZv213rmkz = 3816, X86_VFMADDPSZv213rr = 3817, X86_VFMADDPSZv213rrb = 3818, X86_VFMADDPSZv213rrbk = 3819, X86_VFMADDPSZv213rrbkz = 3820, X86_VFMADDPSZv213rrk = 3821, X86_VFMADDPSZv213rrkz = 3822, X86_VFMADDPSZv231rm = 3823, X86_VFMADDPSZv231rmb = 3824, X86_VFMADDPSZv231rmbk = 3825, X86_VFMADDPSZv231rmbkz = 3826, X86_VFMADDPSZv231rmk = 3827, X86_VFMADDPSZv231rmkz = 3828, X86_VFMADDPSZv231rr = 3829, X86_VFMADDPSZv231rrk = 3830, X86_VFMADDPSZv231rrkz = 3831, X86_VFMADDPSr132m = 3832, X86_VFMADDPSr132mY = 3833, X86_VFMADDPSr132r = 3834, X86_VFMADDPSr132rY = 3835, X86_VFMADDPSr213m = 3836, X86_VFMADDPSr213mY = 3837, X86_VFMADDPSr213r = 3838, X86_VFMADDPSr213rY = 3839, X86_VFMADDPSr231m = 3840, X86_VFMADDPSr231mY = 3841, X86_VFMADDPSr231r = 3842, X86_VFMADDPSr231rY = 3843, X86_VFMADDSD4mr = 3844, X86_VFMADDSD4mr_Int = 3845, X86_VFMADDSD4rm = 3846, X86_VFMADDSD4rm_Int = 3847, X86_VFMADDSD4rr = 3848, X86_VFMADDSD4rr_Int = 3849, X86_VFMADDSD4rr_REV = 3850, X86_VFMADDSDZm = 3851, X86_VFMADDSDZr = 3852, X86_VFMADDSDr132m = 3853, X86_VFMADDSDr132r = 3854, X86_VFMADDSDr213m = 3855, X86_VFMADDSDr213r = 3856, X86_VFMADDSDr231m = 3857, X86_VFMADDSDr231r = 3858, X86_VFMADDSS4mr = 3859, X86_VFMADDSS4mr_Int = 3860, X86_VFMADDSS4rm = 3861, X86_VFMADDSS4rm_Int = 3862, X86_VFMADDSS4rr = 3863, X86_VFMADDSS4rr_Int = 3864, X86_VFMADDSS4rr_REV = 3865, X86_VFMADDSSZm = 3866, X86_VFMADDSSZr = 3867, X86_VFMADDSSr132m = 3868, X86_VFMADDSSr132r = 3869, X86_VFMADDSSr213m = 3870, X86_VFMADDSSr213r = 3871, X86_VFMADDSSr231m = 3872, X86_VFMADDSSr231r = 3873, X86_VFMADDSUB132PDZ128m = 3874, X86_VFMADDSUB132PDZ128mb = 3875, X86_VFMADDSUB132PDZ256m = 3876, X86_VFMADDSUB132PDZ256mb = 3877, X86_VFMADDSUB132PDZm = 3878, X86_VFMADDSUB132PDZmb = 3879, X86_VFMADDSUB132PSZ128m = 3880, X86_VFMADDSUB132PSZ128mb = 3881, X86_VFMADDSUB132PSZ256m = 3882, X86_VFMADDSUB132PSZ256mb = 3883, X86_VFMADDSUB132PSZm = 3884, X86_VFMADDSUB132PSZmb = 3885, X86_VFMADDSUBPD4mr = 3886, X86_VFMADDSUBPD4mrY = 3887, X86_VFMADDSUBPD4rm = 3888, X86_VFMADDSUBPD4rmY = 3889, X86_VFMADDSUBPD4rr = 3890, X86_VFMADDSUBPD4rrY = 3891, X86_VFMADDSUBPD4rrY_REV = 3892, X86_VFMADDSUBPD4rr_REV = 3893, X86_VFMADDSUBPDZ128v213rm = 3894, X86_VFMADDSUBPDZ128v213rmb = 3895, X86_VFMADDSUBPDZ128v213rmbk = 3896, X86_VFMADDSUBPDZ128v213rmbkz = 3897, X86_VFMADDSUBPDZ128v213rmk = 3898, X86_VFMADDSUBPDZ128v213rmkz = 3899, X86_VFMADDSUBPDZ128v213rr = 3900, X86_VFMADDSUBPDZ128v213rrk = 3901, X86_VFMADDSUBPDZ128v213rrkz = 3902, X86_VFMADDSUBPDZ128v231rm = 3903, X86_VFMADDSUBPDZ128v231rmb = 3904, X86_VFMADDSUBPDZ128v231rmbk = 3905, X86_VFMADDSUBPDZ128v231rmbkz = 3906, X86_VFMADDSUBPDZ128v231rmk = 3907, X86_VFMADDSUBPDZ128v231rmkz = 3908, X86_VFMADDSUBPDZ128v231rr = 3909, X86_VFMADDSUBPDZ128v231rrk = 3910, X86_VFMADDSUBPDZ128v231rrkz = 3911, X86_VFMADDSUBPDZ256v213rm = 3912, X86_VFMADDSUBPDZ256v213rmb = 3913, X86_VFMADDSUBPDZ256v213rmbk = 3914, X86_VFMADDSUBPDZ256v213rmbkz = 3915, X86_VFMADDSUBPDZ256v213rmk = 3916, X86_VFMADDSUBPDZ256v213rmkz = 3917, X86_VFMADDSUBPDZ256v213rr = 3918, X86_VFMADDSUBPDZ256v213rrk = 3919, X86_VFMADDSUBPDZ256v213rrkz = 3920, X86_VFMADDSUBPDZ256v231rm = 3921, X86_VFMADDSUBPDZ256v231rmb = 3922, X86_VFMADDSUBPDZ256v231rmbk = 3923, X86_VFMADDSUBPDZ256v231rmbkz = 3924, X86_VFMADDSUBPDZ256v231rmk = 3925, X86_VFMADDSUBPDZ256v231rmkz = 3926, X86_VFMADDSUBPDZ256v231rr = 3927, X86_VFMADDSUBPDZ256v231rrk = 3928, X86_VFMADDSUBPDZ256v231rrkz = 3929, X86_VFMADDSUBPDZv213rm = 3930, X86_VFMADDSUBPDZv213rmb = 3931, X86_VFMADDSUBPDZv213rmbk = 3932, X86_VFMADDSUBPDZv213rmbkz = 3933, X86_VFMADDSUBPDZv213rmk = 3934, X86_VFMADDSUBPDZv213rmkz = 3935, X86_VFMADDSUBPDZv213rr = 3936, X86_VFMADDSUBPDZv213rrb = 3937, X86_VFMADDSUBPDZv213rrbk = 3938, X86_VFMADDSUBPDZv213rrbkz = 3939, X86_VFMADDSUBPDZv213rrk = 3940, X86_VFMADDSUBPDZv213rrkz = 3941, X86_VFMADDSUBPDZv231rm = 3942, X86_VFMADDSUBPDZv231rmb = 3943, X86_VFMADDSUBPDZv231rmbk = 3944, X86_VFMADDSUBPDZv231rmbkz = 3945, X86_VFMADDSUBPDZv231rmk = 3946, X86_VFMADDSUBPDZv231rmkz = 3947, X86_VFMADDSUBPDZv231rr = 3948, X86_VFMADDSUBPDZv231rrk = 3949, X86_VFMADDSUBPDZv231rrkz = 3950, X86_VFMADDSUBPDr132m = 3951, X86_VFMADDSUBPDr132mY = 3952, X86_VFMADDSUBPDr132r = 3953, X86_VFMADDSUBPDr132rY = 3954, X86_VFMADDSUBPDr213m = 3955, X86_VFMADDSUBPDr213mY = 3956, X86_VFMADDSUBPDr213r = 3957, X86_VFMADDSUBPDr213rY = 3958, X86_VFMADDSUBPDr231m = 3959, X86_VFMADDSUBPDr231mY = 3960, X86_VFMADDSUBPDr231r = 3961, X86_VFMADDSUBPDr231rY = 3962, X86_VFMADDSUBPS4mr = 3963, X86_VFMADDSUBPS4mrY = 3964, X86_VFMADDSUBPS4rm = 3965, X86_VFMADDSUBPS4rmY = 3966, X86_VFMADDSUBPS4rr = 3967, X86_VFMADDSUBPS4rrY = 3968, X86_VFMADDSUBPS4rrY_REV = 3969, X86_VFMADDSUBPS4rr_REV = 3970, X86_VFMADDSUBPSZ128v213rm = 3971, X86_VFMADDSUBPSZ128v213rmb = 3972, X86_VFMADDSUBPSZ128v213rmbk = 3973, X86_VFMADDSUBPSZ128v213rmbkz = 3974, X86_VFMADDSUBPSZ128v213rmk = 3975, X86_VFMADDSUBPSZ128v213rmkz = 3976, X86_VFMADDSUBPSZ128v213rr = 3977, X86_VFMADDSUBPSZ128v213rrk = 3978, X86_VFMADDSUBPSZ128v213rrkz = 3979, X86_VFMADDSUBPSZ128v231rm = 3980, X86_VFMADDSUBPSZ128v231rmb = 3981, X86_VFMADDSUBPSZ128v231rmbk = 3982, X86_VFMADDSUBPSZ128v231rmbkz = 3983, X86_VFMADDSUBPSZ128v231rmk = 3984, X86_VFMADDSUBPSZ128v231rmkz = 3985, X86_VFMADDSUBPSZ128v231rr = 3986, X86_VFMADDSUBPSZ128v231rrk = 3987, X86_VFMADDSUBPSZ128v231rrkz = 3988, X86_VFMADDSUBPSZ256v213rm = 3989, X86_VFMADDSUBPSZ256v213rmb = 3990, X86_VFMADDSUBPSZ256v213rmbk = 3991, X86_VFMADDSUBPSZ256v213rmbkz = 3992, X86_VFMADDSUBPSZ256v213rmk = 3993, X86_VFMADDSUBPSZ256v213rmkz = 3994, X86_VFMADDSUBPSZ256v213rr = 3995, X86_VFMADDSUBPSZ256v213rrk = 3996, X86_VFMADDSUBPSZ256v213rrkz = 3997, X86_VFMADDSUBPSZ256v231rm = 3998, X86_VFMADDSUBPSZ256v231rmb = 3999, X86_VFMADDSUBPSZ256v231rmbk = 4000, X86_VFMADDSUBPSZ256v231rmbkz = 4001, X86_VFMADDSUBPSZ256v231rmk = 4002, X86_VFMADDSUBPSZ256v231rmkz = 4003, X86_VFMADDSUBPSZ256v231rr = 4004, X86_VFMADDSUBPSZ256v231rrk = 4005, X86_VFMADDSUBPSZ256v231rrkz = 4006, X86_VFMADDSUBPSZv213rm = 4007, X86_VFMADDSUBPSZv213rmb = 4008, X86_VFMADDSUBPSZv213rmbk = 4009, X86_VFMADDSUBPSZv213rmbkz = 4010, X86_VFMADDSUBPSZv213rmk = 4011, X86_VFMADDSUBPSZv213rmkz = 4012, X86_VFMADDSUBPSZv213rr = 4013, X86_VFMADDSUBPSZv213rrb = 4014, X86_VFMADDSUBPSZv213rrbk = 4015, X86_VFMADDSUBPSZv213rrbkz = 4016, X86_VFMADDSUBPSZv213rrk = 4017, X86_VFMADDSUBPSZv213rrkz = 4018, X86_VFMADDSUBPSZv231rm = 4019, X86_VFMADDSUBPSZv231rmb = 4020, X86_VFMADDSUBPSZv231rmbk = 4021, X86_VFMADDSUBPSZv231rmbkz = 4022, X86_VFMADDSUBPSZv231rmk = 4023, X86_VFMADDSUBPSZv231rmkz = 4024, X86_VFMADDSUBPSZv231rr = 4025, X86_VFMADDSUBPSZv231rrk = 4026, X86_VFMADDSUBPSZv231rrkz = 4027, X86_VFMADDSUBPSr132m = 4028, X86_VFMADDSUBPSr132mY = 4029, X86_VFMADDSUBPSr132r = 4030, X86_VFMADDSUBPSr132rY = 4031, X86_VFMADDSUBPSr213m = 4032, X86_VFMADDSUBPSr213mY = 4033, X86_VFMADDSUBPSr213r = 4034, X86_VFMADDSUBPSr213rY = 4035, X86_VFMADDSUBPSr231m = 4036, X86_VFMADDSUBPSr231mY = 4037, X86_VFMADDSUBPSr231r = 4038, X86_VFMADDSUBPSr231rY = 4039, X86_VFMSUB132PDZ128m = 4040, X86_VFMSUB132PDZ128mb = 4041, X86_VFMSUB132PDZ256m = 4042, X86_VFMSUB132PDZ256mb = 4043, X86_VFMSUB132PDZm = 4044, X86_VFMSUB132PDZmb = 4045, X86_VFMSUB132PSZ128m = 4046, X86_VFMSUB132PSZ128mb = 4047, X86_VFMSUB132PSZ256m = 4048, X86_VFMSUB132PSZ256mb = 4049, X86_VFMSUB132PSZm = 4050, X86_VFMSUB132PSZmb = 4051, X86_VFMSUBADD132PDZ128m = 4052, X86_VFMSUBADD132PDZ128mb = 4053, X86_VFMSUBADD132PDZ256m = 4054, X86_VFMSUBADD132PDZ256mb = 4055, X86_VFMSUBADD132PDZm = 4056, X86_VFMSUBADD132PDZmb = 4057, X86_VFMSUBADD132PSZ128m = 4058, X86_VFMSUBADD132PSZ128mb = 4059, X86_VFMSUBADD132PSZ256m = 4060, X86_VFMSUBADD132PSZ256mb = 4061, X86_VFMSUBADD132PSZm = 4062, X86_VFMSUBADD132PSZmb = 4063, X86_VFMSUBADDPD4mr = 4064, X86_VFMSUBADDPD4mrY = 4065, X86_VFMSUBADDPD4rm = 4066, X86_VFMSUBADDPD4rmY = 4067, X86_VFMSUBADDPD4rr = 4068, X86_VFMSUBADDPD4rrY = 4069, X86_VFMSUBADDPD4rrY_REV = 4070, X86_VFMSUBADDPD4rr_REV = 4071, X86_VFMSUBADDPDZ128v213rm = 4072, X86_VFMSUBADDPDZ128v213rmb = 4073, X86_VFMSUBADDPDZ128v213rmbk = 4074, X86_VFMSUBADDPDZ128v213rmbkz = 4075, X86_VFMSUBADDPDZ128v213rmk = 4076, X86_VFMSUBADDPDZ128v213rmkz = 4077, X86_VFMSUBADDPDZ128v213rr = 4078, X86_VFMSUBADDPDZ128v213rrk = 4079, X86_VFMSUBADDPDZ128v213rrkz = 4080, X86_VFMSUBADDPDZ128v231rm = 4081, X86_VFMSUBADDPDZ128v231rmb = 4082, X86_VFMSUBADDPDZ128v231rmbk = 4083, X86_VFMSUBADDPDZ128v231rmbkz = 4084, X86_VFMSUBADDPDZ128v231rmk = 4085, X86_VFMSUBADDPDZ128v231rmkz = 4086, X86_VFMSUBADDPDZ128v231rr = 4087, X86_VFMSUBADDPDZ128v231rrk = 4088, X86_VFMSUBADDPDZ128v231rrkz = 4089, X86_VFMSUBADDPDZ256v213rm = 4090, X86_VFMSUBADDPDZ256v213rmb = 4091, X86_VFMSUBADDPDZ256v213rmbk = 4092, X86_VFMSUBADDPDZ256v213rmbkz = 4093, X86_VFMSUBADDPDZ256v213rmk = 4094, X86_VFMSUBADDPDZ256v213rmkz = 4095, X86_VFMSUBADDPDZ256v213rr = 4096, X86_VFMSUBADDPDZ256v213rrk = 4097, X86_VFMSUBADDPDZ256v213rrkz = 4098, X86_VFMSUBADDPDZ256v231rm = 4099, X86_VFMSUBADDPDZ256v231rmb = 4100, X86_VFMSUBADDPDZ256v231rmbk = 4101, X86_VFMSUBADDPDZ256v231rmbkz = 4102, X86_VFMSUBADDPDZ256v231rmk = 4103, X86_VFMSUBADDPDZ256v231rmkz = 4104, X86_VFMSUBADDPDZ256v231rr = 4105, X86_VFMSUBADDPDZ256v231rrk = 4106, X86_VFMSUBADDPDZ256v231rrkz = 4107, X86_VFMSUBADDPDZv213rm = 4108, X86_VFMSUBADDPDZv213rmb = 4109, X86_VFMSUBADDPDZv213rmbk = 4110, X86_VFMSUBADDPDZv213rmbkz = 4111, X86_VFMSUBADDPDZv213rmk = 4112, X86_VFMSUBADDPDZv213rmkz = 4113, X86_VFMSUBADDPDZv213rr = 4114, X86_VFMSUBADDPDZv213rrb = 4115, X86_VFMSUBADDPDZv213rrbk = 4116, X86_VFMSUBADDPDZv213rrbkz = 4117, X86_VFMSUBADDPDZv213rrk = 4118, X86_VFMSUBADDPDZv213rrkz = 4119, X86_VFMSUBADDPDZv231rm = 4120, X86_VFMSUBADDPDZv231rmb = 4121, X86_VFMSUBADDPDZv231rmbk = 4122, X86_VFMSUBADDPDZv231rmbkz = 4123, X86_VFMSUBADDPDZv231rmk = 4124, X86_VFMSUBADDPDZv231rmkz = 4125, X86_VFMSUBADDPDZv231rr = 4126, X86_VFMSUBADDPDZv231rrk = 4127, X86_VFMSUBADDPDZv231rrkz = 4128, X86_VFMSUBADDPDr132m = 4129, X86_VFMSUBADDPDr132mY = 4130, X86_VFMSUBADDPDr132r = 4131, X86_VFMSUBADDPDr132rY = 4132, X86_VFMSUBADDPDr213m = 4133, X86_VFMSUBADDPDr213mY = 4134, X86_VFMSUBADDPDr213r = 4135, X86_VFMSUBADDPDr213rY = 4136, X86_VFMSUBADDPDr231m = 4137, X86_VFMSUBADDPDr231mY = 4138, X86_VFMSUBADDPDr231r = 4139, X86_VFMSUBADDPDr231rY = 4140, X86_VFMSUBADDPS4mr = 4141, X86_VFMSUBADDPS4mrY = 4142, X86_VFMSUBADDPS4rm = 4143, X86_VFMSUBADDPS4rmY = 4144, X86_VFMSUBADDPS4rr = 4145, X86_VFMSUBADDPS4rrY = 4146, X86_VFMSUBADDPS4rrY_REV = 4147, X86_VFMSUBADDPS4rr_REV = 4148, X86_VFMSUBADDPSZ128v213rm = 4149, X86_VFMSUBADDPSZ128v213rmb = 4150, X86_VFMSUBADDPSZ128v213rmbk = 4151, X86_VFMSUBADDPSZ128v213rmbkz = 4152, X86_VFMSUBADDPSZ128v213rmk = 4153, X86_VFMSUBADDPSZ128v213rmkz = 4154, X86_VFMSUBADDPSZ128v213rr = 4155, X86_VFMSUBADDPSZ128v213rrk = 4156, X86_VFMSUBADDPSZ128v213rrkz = 4157, X86_VFMSUBADDPSZ128v231rm = 4158, X86_VFMSUBADDPSZ128v231rmb = 4159, X86_VFMSUBADDPSZ128v231rmbk = 4160, X86_VFMSUBADDPSZ128v231rmbkz = 4161, X86_VFMSUBADDPSZ128v231rmk = 4162, X86_VFMSUBADDPSZ128v231rmkz = 4163, X86_VFMSUBADDPSZ128v231rr = 4164, X86_VFMSUBADDPSZ128v231rrk = 4165, X86_VFMSUBADDPSZ128v231rrkz = 4166, X86_VFMSUBADDPSZ256v213rm = 4167, X86_VFMSUBADDPSZ256v213rmb = 4168, X86_VFMSUBADDPSZ256v213rmbk = 4169, X86_VFMSUBADDPSZ256v213rmbkz = 4170, X86_VFMSUBADDPSZ256v213rmk = 4171, X86_VFMSUBADDPSZ256v213rmkz = 4172, X86_VFMSUBADDPSZ256v213rr = 4173, X86_VFMSUBADDPSZ256v213rrk = 4174, X86_VFMSUBADDPSZ256v213rrkz = 4175, X86_VFMSUBADDPSZ256v231rm = 4176, X86_VFMSUBADDPSZ256v231rmb = 4177, X86_VFMSUBADDPSZ256v231rmbk = 4178, X86_VFMSUBADDPSZ256v231rmbkz = 4179, X86_VFMSUBADDPSZ256v231rmk = 4180, X86_VFMSUBADDPSZ256v231rmkz = 4181, X86_VFMSUBADDPSZ256v231rr = 4182, X86_VFMSUBADDPSZ256v231rrk = 4183, X86_VFMSUBADDPSZ256v231rrkz = 4184, X86_VFMSUBADDPSZv213rm = 4185, X86_VFMSUBADDPSZv213rmb = 4186, X86_VFMSUBADDPSZv213rmbk = 4187, X86_VFMSUBADDPSZv213rmbkz = 4188, X86_VFMSUBADDPSZv213rmk = 4189, X86_VFMSUBADDPSZv213rmkz = 4190, X86_VFMSUBADDPSZv213rr = 4191, X86_VFMSUBADDPSZv213rrb = 4192, X86_VFMSUBADDPSZv213rrbk = 4193, X86_VFMSUBADDPSZv213rrbkz = 4194, X86_VFMSUBADDPSZv213rrk = 4195, X86_VFMSUBADDPSZv213rrkz = 4196, X86_VFMSUBADDPSZv231rm = 4197, X86_VFMSUBADDPSZv231rmb = 4198, X86_VFMSUBADDPSZv231rmbk = 4199, X86_VFMSUBADDPSZv231rmbkz = 4200, X86_VFMSUBADDPSZv231rmk = 4201, X86_VFMSUBADDPSZv231rmkz = 4202, X86_VFMSUBADDPSZv231rr = 4203, X86_VFMSUBADDPSZv231rrk = 4204, X86_VFMSUBADDPSZv231rrkz = 4205, X86_VFMSUBADDPSr132m = 4206, X86_VFMSUBADDPSr132mY = 4207, X86_VFMSUBADDPSr132r = 4208, X86_VFMSUBADDPSr132rY = 4209, X86_VFMSUBADDPSr213m = 4210, X86_VFMSUBADDPSr213mY = 4211, X86_VFMSUBADDPSr213r = 4212, X86_VFMSUBADDPSr213rY = 4213, X86_VFMSUBADDPSr231m = 4214, X86_VFMSUBADDPSr231mY = 4215, X86_VFMSUBADDPSr231r = 4216, X86_VFMSUBADDPSr231rY = 4217, X86_VFMSUBPD4mr = 4218, X86_VFMSUBPD4mrY = 4219, X86_VFMSUBPD4rm = 4220, X86_VFMSUBPD4rmY = 4221, X86_VFMSUBPD4rr = 4222, X86_VFMSUBPD4rrY = 4223, X86_VFMSUBPD4rrY_REV = 4224, X86_VFMSUBPD4rr_REV = 4225, X86_VFMSUBPDZ128v213rm = 4226, X86_VFMSUBPDZ128v213rmb = 4227, X86_VFMSUBPDZ128v213rmbk = 4228, X86_VFMSUBPDZ128v213rmbkz = 4229, X86_VFMSUBPDZ128v213rmk = 4230, X86_VFMSUBPDZ128v213rmkz = 4231, X86_VFMSUBPDZ128v213rr = 4232, X86_VFMSUBPDZ128v213rrk = 4233, X86_VFMSUBPDZ128v213rrkz = 4234, X86_VFMSUBPDZ128v231rm = 4235, X86_VFMSUBPDZ128v231rmb = 4236, X86_VFMSUBPDZ128v231rmbk = 4237, X86_VFMSUBPDZ128v231rmbkz = 4238, X86_VFMSUBPDZ128v231rmk = 4239, X86_VFMSUBPDZ128v231rmkz = 4240, X86_VFMSUBPDZ128v231rr = 4241, X86_VFMSUBPDZ128v231rrk = 4242, X86_VFMSUBPDZ128v231rrkz = 4243, X86_VFMSUBPDZ256v213rm = 4244, X86_VFMSUBPDZ256v213rmb = 4245, X86_VFMSUBPDZ256v213rmbk = 4246, X86_VFMSUBPDZ256v213rmbkz = 4247, X86_VFMSUBPDZ256v213rmk = 4248, X86_VFMSUBPDZ256v213rmkz = 4249, X86_VFMSUBPDZ256v213rr = 4250, X86_VFMSUBPDZ256v213rrk = 4251, X86_VFMSUBPDZ256v213rrkz = 4252, X86_VFMSUBPDZ256v231rm = 4253, X86_VFMSUBPDZ256v231rmb = 4254, X86_VFMSUBPDZ256v231rmbk = 4255, X86_VFMSUBPDZ256v231rmbkz = 4256, X86_VFMSUBPDZ256v231rmk = 4257, X86_VFMSUBPDZ256v231rmkz = 4258, X86_VFMSUBPDZ256v231rr = 4259, X86_VFMSUBPDZ256v231rrk = 4260, X86_VFMSUBPDZ256v231rrkz = 4261, X86_VFMSUBPDZv213rm = 4262, X86_VFMSUBPDZv213rmb = 4263, X86_VFMSUBPDZv213rmbk = 4264, X86_VFMSUBPDZv213rmbkz = 4265, X86_VFMSUBPDZv213rmk = 4266, X86_VFMSUBPDZv213rmkz = 4267, X86_VFMSUBPDZv213rr = 4268, X86_VFMSUBPDZv213rrb = 4269, X86_VFMSUBPDZv213rrbk = 4270, X86_VFMSUBPDZv213rrbkz = 4271, X86_VFMSUBPDZv213rrk = 4272, X86_VFMSUBPDZv213rrkz = 4273, X86_VFMSUBPDZv231rm = 4274, X86_VFMSUBPDZv231rmb = 4275, X86_VFMSUBPDZv231rmbk = 4276, X86_VFMSUBPDZv231rmbkz = 4277, X86_VFMSUBPDZv231rmk = 4278, X86_VFMSUBPDZv231rmkz = 4279, X86_VFMSUBPDZv231rr = 4280, X86_VFMSUBPDZv231rrk = 4281, X86_VFMSUBPDZv231rrkz = 4282, X86_VFMSUBPDr132m = 4283, X86_VFMSUBPDr132mY = 4284, X86_VFMSUBPDr132r = 4285, X86_VFMSUBPDr132rY = 4286, X86_VFMSUBPDr213m = 4287, X86_VFMSUBPDr213mY = 4288, X86_VFMSUBPDr213r = 4289, X86_VFMSUBPDr213rY = 4290, X86_VFMSUBPDr231m = 4291, X86_VFMSUBPDr231mY = 4292, X86_VFMSUBPDr231r = 4293, X86_VFMSUBPDr231rY = 4294, X86_VFMSUBPS4mr = 4295, X86_VFMSUBPS4mrY = 4296, X86_VFMSUBPS4rm = 4297, X86_VFMSUBPS4rmY = 4298, X86_VFMSUBPS4rr = 4299, X86_VFMSUBPS4rrY = 4300, X86_VFMSUBPS4rrY_REV = 4301, X86_VFMSUBPS4rr_REV = 4302, X86_VFMSUBPSZ128v213rm = 4303, X86_VFMSUBPSZ128v213rmb = 4304, X86_VFMSUBPSZ128v213rmbk = 4305, X86_VFMSUBPSZ128v213rmbkz = 4306, X86_VFMSUBPSZ128v213rmk = 4307, X86_VFMSUBPSZ128v213rmkz = 4308, X86_VFMSUBPSZ128v213rr = 4309, X86_VFMSUBPSZ128v213rrk = 4310, X86_VFMSUBPSZ128v213rrkz = 4311, X86_VFMSUBPSZ128v231rm = 4312, X86_VFMSUBPSZ128v231rmb = 4313, X86_VFMSUBPSZ128v231rmbk = 4314, X86_VFMSUBPSZ128v231rmbkz = 4315, X86_VFMSUBPSZ128v231rmk = 4316, X86_VFMSUBPSZ128v231rmkz = 4317, X86_VFMSUBPSZ128v231rr = 4318, X86_VFMSUBPSZ128v231rrk = 4319, X86_VFMSUBPSZ128v231rrkz = 4320, X86_VFMSUBPSZ256v213rm = 4321, X86_VFMSUBPSZ256v213rmb = 4322, X86_VFMSUBPSZ256v213rmbk = 4323, X86_VFMSUBPSZ256v213rmbkz = 4324, X86_VFMSUBPSZ256v213rmk = 4325, X86_VFMSUBPSZ256v213rmkz = 4326, X86_VFMSUBPSZ256v213rr = 4327, X86_VFMSUBPSZ256v213rrk = 4328, X86_VFMSUBPSZ256v213rrkz = 4329, X86_VFMSUBPSZ256v231rm = 4330, X86_VFMSUBPSZ256v231rmb = 4331, X86_VFMSUBPSZ256v231rmbk = 4332, X86_VFMSUBPSZ256v231rmbkz = 4333, X86_VFMSUBPSZ256v231rmk = 4334, X86_VFMSUBPSZ256v231rmkz = 4335, X86_VFMSUBPSZ256v231rr = 4336, X86_VFMSUBPSZ256v231rrk = 4337, X86_VFMSUBPSZ256v231rrkz = 4338, X86_VFMSUBPSZv213rm = 4339, X86_VFMSUBPSZv213rmb = 4340, X86_VFMSUBPSZv213rmbk = 4341, X86_VFMSUBPSZv213rmbkz = 4342, X86_VFMSUBPSZv213rmk = 4343, X86_VFMSUBPSZv213rmkz = 4344, X86_VFMSUBPSZv213rr = 4345, X86_VFMSUBPSZv213rrb = 4346, X86_VFMSUBPSZv213rrbk = 4347, X86_VFMSUBPSZv213rrbkz = 4348, X86_VFMSUBPSZv213rrk = 4349, X86_VFMSUBPSZv213rrkz = 4350, X86_VFMSUBPSZv231rm = 4351, X86_VFMSUBPSZv231rmb = 4352, X86_VFMSUBPSZv231rmbk = 4353, X86_VFMSUBPSZv231rmbkz = 4354, X86_VFMSUBPSZv231rmk = 4355, X86_VFMSUBPSZv231rmkz = 4356, X86_VFMSUBPSZv231rr = 4357, X86_VFMSUBPSZv231rrk = 4358, X86_VFMSUBPSZv231rrkz = 4359, X86_VFMSUBPSr132m = 4360, X86_VFMSUBPSr132mY = 4361, X86_VFMSUBPSr132r = 4362, X86_VFMSUBPSr132rY = 4363, X86_VFMSUBPSr213m = 4364, X86_VFMSUBPSr213mY = 4365, X86_VFMSUBPSr213r = 4366, X86_VFMSUBPSr213rY = 4367, X86_VFMSUBPSr231m = 4368, X86_VFMSUBPSr231mY = 4369, X86_VFMSUBPSr231r = 4370, X86_VFMSUBPSr231rY = 4371, X86_VFMSUBSD4mr = 4372, X86_VFMSUBSD4mr_Int = 4373, X86_VFMSUBSD4rm = 4374, X86_VFMSUBSD4rm_Int = 4375, X86_VFMSUBSD4rr = 4376, X86_VFMSUBSD4rr_Int = 4377, X86_VFMSUBSD4rr_REV = 4378, X86_VFMSUBSDZm = 4379, X86_VFMSUBSDZr = 4380, X86_VFMSUBSDr132m = 4381, X86_VFMSUBSDr132r = 4382, X86_VFMSUBSDr213m = 4383, X86_VFMSUBSDr213r = 4384, X86_VFMSUBSDr231m = 4385, X86_VFMSUBSDr231r = 4386, X86_VFMSUBSS4mr = 4387, X86_VFMSUBSS4mr_Int = 4388, X86_VFMSUBSS4rm = 4389, X86_VFMSUBSS4rm_Int = 4390, X86_VFMSUBSS4rr = 4391, X86_VFMSUBSS4rr_Int = 4392, X86_VFMSUBSS4rr_REV = 4393, X86_VFMSUBSSZm = 4394, X86_VFMSUBSSZr = 4395, X86_VFMSUBSSr132m = 4396, X86_VFMSUBSSr132r = 4397, X86_VFMSUBSSr213m = 4398, X86_VFMSUBSSr213r = 4399, X86_VFMSUBSSr231m = 4400, X86_VFMSUBSSr231r = 4401, X86_VFNMADD132PDZ128m = 4402, X86_VFNMADD132PDZ128mb = 4403, X86_VFNMADD132PDZ256m = 4404, X86_VFNMADD132PDZ256mb = 4405, X86_VFNMADD132PDZm = 4406, X86_VFNMADD132PDZmb = 4407, X86_VFNMADD132PSZ128m = 4408, X86_VFNMADD132PSZ128mb = 4409, X86_VFNMADD132PSZ256m = 4410, X86_VFNMADD132PSZ256mb = 4411, X86_VFNMADD132PSZm = 4412, X86_VFNMADD132PSZmb = 4413, X86_VFNMADDPD4mr = 4414, X86_VFNMADDPD4mrY = 4415, X86_VFNMADDPD4rm = 4416, X86_VFNMADDPD4rmY = 4417, X86_VFNMADDPD4rr = 4418, X86_VFNMADDPD4rrY = 4419, X86_VFNMADDPD4rrY_REV = 4420, X86_VFNMADDPD4rr_REV = 4421, X86_VFNMADDPDZ128v213rm = 4422, X86_VFNMADDPDZ128v213rmb = 4423, X86_VFNMADDPDZ128v213rmbk = 4424, X86_VFNMADDPDZ128v213rmbkz = 4425, X86_VFNMADDPDZ128v213rmk = 4426, X86_VFNMADDPDZ128v213rmkz = 4427, X86_VFNMADDPDZ128v213rr = 4428, X86_VFNMADDPDZ128v213rrk = 4429, X86_VFNMADDPDZ128v213rrkz = 4430, X86_VFNMADDPDZ128v231rm = 4431, X86_VFNMADDPDZ128v231rmb = 4432, X86_VFNMADDPDZ128v231rmbk = 4433, X86_VFNMADDPDZ128v231rmbkz = 4434, X86_VFNMADDPDZ128v231rmk = 4435, X86_VFNMADDPDZ128v231rmkz = 4436, X86_VFNMADDPDZ128v231rr = 4437, X86_VFNMADDPDZ128v231rrk = 4438, X86_VFNMADDPDZ128v231rrkz = 4439, X86_VFNMADDPDZ256v213rm = 4440, X86_VFNMADDPDZ256v213rmb = 4441, X86_VFNMADDPDZ256v213rmbk = 4442, X86_VFNMADDPDZ256v213rmbkz = 4443, X86_VFNMADDPDZ256v213rmk = 4444, X86_VFNMADDPDZ256v213rmkz = 4445, X86_VFNMADDPDZ256v213rr = 4446, X86_VFNMADDPDZ256v213rrk = 4447, X86_VFNMADDPDZ256v213rrkz = 4448, X86_VFNMADDPDZ256v231rm = 4449, X86_VFNMADDPDZ256v231rmb = 4450, X86_VFNMADDPDZ256v231rmbk = 4451, X86_VFNMADDPDZ256v231rmbkz = 4452, X86_VFNMADDPDZ256v231rmk = 4453, X86_VFNMADDPDZ256v231rmkz = 4454, X86_VFNMADDPDZ256v231rr = 4455, X86_VFNMADDPDZ256v231rrk = 4456, X86_VFNMADDPDZ256v231rrkz = 4457, X86_VFNMADDPDZv213rm = 4458, X86_VFNMADDPDZv213rmb = 4459, X86_VFNMADDPDZv213rmbk = 4460, X86_VFNMADDPDZv213rmbkz = 4461, X86_VFNMADDPDZv213rmk = 4462, X86_VFNMADDPDZv213rmkz = 4463, X86_VFNMADDPDZv213rr = 4464, X86_VFNMADDPDZv213rrb = 4465, X86_VFNMADDPDZv213rrbk = 4466, X86_VFNMADDPDZv213rrbkz = 4467, X86_VFNMADDPDZv213rrk = 4468, X86_VFNMADDPDZv213rrkz = 4469, X86_VFNMADDPDZv231rm = 4470, X86_VFNMADDPDZv231rmb = 4471, X86_VFNMADDPDZv231rmbk = 4472, X86_VFNMADDPDZv231rmbkz = 4473, X86_VFNMADDPDZv231rmk = 4474, X86_VFNMADDPDZv231rmkz = 4475, X86_VFNMADDPDZv231rr = 4476, X86_VFNMADDPDZv231rrk = 4477, X86_VFNMADDPDZv231rrkz = 4478, X86_VFNMADDPDr132m = 4479, X86_VFNMADDPDr132mY = 4480, X86_VFNMADDPDr132r = 4481, X86_VFNMADDPDr132rY = 4482, X86_VFNMADDPDr213m = 4483, X86_VFNMADDPDr213mY = 4484, X86_VFNMADDPDr213r = 4485, X86_VFNMADDPDr213rY = 4486, X86_VFNMADDPDr231m = 4487, X86_VFNMADDPDr231mY = 4488, X86_VFNMADDPDr231r = 4489, X86_VFNMADDPDr231rY = 4490, X86_VFNMADDPS4mr = 4491, X86_VFNMADDPS4mrY = 4492, X86_VFNMADDPS4rm = 4493, X86_VFNMADDPS4rmY = 4494, X86_VFNMADDPS4rr = 4495, X86_VFNMADDPS4rrY = 4496, X86_VFNMADDPS4rrY_REV = 4497, X86_VFNMADDPS4rr_REV = 4498, X86_VFNMADDPSZ128v213rm = 4499, X86_VFNMADDPSZ128v213rmb = 4500, X86_VFNMADDPSZ128v213rmbk = 4501, X86_VFNMADDPSZ128v213rmbkz = 4502, X86_VFNMADDPSZ128v213rmk = 4503, X86_VFNMADDPSZ128v213rmkz = 4504, X86_VFNMADDPSZ128v213rr = 4505, X86_VFNMADDPSZ128v213rrk = 4506, X86_VFNMADDPSZ128v213rrkz = 4507, X86_VFNMADDPSZ128v231rm = 4508, X86_VFNMADDPSZ128v231rmb = 4509, X86_VFNMADDPSZ128v231rmbk = 4510, X86_VFNMADDPSZ128v231rmbkz = 4511, X86_VFNMADDPSZ128v231rmk = 4512, X86_VFNMADDPSZ128v231rmkz = 4513, X86_VFNMADDPSZ128v231rr = 4514, X86_VFNMADDPSZ128v231rrk = 4515, X86_VFNMADDPSZ128v231rrkz = 4516, X86_VFNMADDPSZ256v213rm = 4517, X86_VFNMADDPSZ256v213rmb = 4518, X86_VFNMADDPSZ256v213rmbk = 4519, X86_VFNMADDPSZ256v213rmbkz = 4520, X86_VFNMADDPSZ256v213rmk = 4521, X86_VFNMADDPSZ256v213rmkz = 4522, X86_VFNMADDPSZ256v213rr = 4523, X86_VFNMADDPSZ256v213rrk = 4524, X86_VFNMADDPSZ256v213rrkz = 4525, X86_VFNMADDPSZ256v231rm = 4526, X86_VFNMADDPSZ256v231rmb = 4527, X86_VFNMADDPSZ256v231rmbk = 4528, X86_VFNMADDPSZ256v231rmbkz = 4529, X86_VFNMADDPSZ256v231rmk = 4530, X86_VFNMADDPSZ256v231rmkz = 4531, X86_VFNMADDPSZ256v231rr = 4532, X86_VFNMADDPSZ256v231rrk = 4533, X86_VFNMADDPSZ256v231rrkz = 4534, X86_VFNMADDPSZv213rm = 4535, X86_VFNMADDPSZv213rmb = 4536, X86_VFNMADDPSZv213rmbk = 4537, X86_VFNMADDPSZv213rmbkz = 4538, X86_VFNMADDPSZv213rmk = 4539, X86_VFNMADDPSZv213rmkz = 4540, X86_VFNMADDPSZv213rr = 4541, X86_VFNMADDPSZv213rrb = 4542, X86_VFNMADDPSZv213rrbk = 4543, X86_VFNMADDPSZv213rrbkz = 4544, X86_VFNMADDPSZv213rrk = 4545, X86_VFNMADDPSZv213rrkz = 4546, X86_VFNMADDPSZv231rm = 4547, X86_VFNMADDPSZv231rmb = 4548, X86_VFNMADDPSZv231rmbk = 4549, X86_VFNMADDPSZv231rmbkz = 4550, X86_VFNMADDPSZv231rmk = 4551, X86_VFNMADDPSZv231rmkz = 4552, X86_VFNMADDPSZv231rr = 4553, X86_VFNMADDPSZv231rrk = 4554, X86_VFNMADDPSZv231rrkz = 4555, X86_VFNMADDPSr132m = 4556, X86_VFNMADDPSr132mY = 4557, X86_VFNMADDPSr132r = 4558, X86_VFNMADDPSr132rY = 4559, X86_VFNMADDPSr213m = 4560, X86_VFNMADDPSr213mY = 4561, X86_VFNMADDPSr213r = 4562, X86_VFNMADDPSr213rY = 4563, X86_VFNMADDPSr231m = 4564, X86_VFNMADDPSr231mY = 4565, X86_VFNMADDPSr231r = 4566, X86_VFNMADDPSr231rY = 4567, X86_VFNMADDSD4mr = 4568, X86_VFNMADDSD4mr_Int = 4569, X86_VFNMADDSD4rm = 4570, X86_VFNMADDSD4rm_Int = 4571, X86_VFNMADDSD4rr = 4572, X86_VFNMADDSD4rr_Int = 4573, X86_VFNMADDSD4rr_REV = 4574, X86_VFNMADDSDZm = 4575, X86_VFNMADDSDZr = 4576, X86_VFNMADDSDr132m = 4577, X86_VFNMADDSDr132r = 4578, X86_VFNMADDSDr213m = 4579, X86_VFNMADDSDr213r = 4580, X86_VFNMADDSDr231m = 4581, X86_VFNMADDSDr231r = 4582, X86_VFNMADDSS4mr = 4583, X86_VFNMADDSS4mr_Int = 4584, X86_VFNMADDSS4rm = 4585, X86_VFNMADDSS4rm_Int = 4586, X86_VFNMADDSS4rr = 4587, X86_VFNMADDSS4rr_Int = 4588, X86_VFNMADDSS4rr_REV = 4589, X86_VFNMADDSSZm = 4590, X86_VFNMADDSSZr = 4591, X86_VFNMADDSSr132m = 4592, X86_VFNMADDSSr132r = 4593, X86_VFNMADDSSr213m = 4594, X86_VFNMADDSSr213r = 4595, X86_VFNMADDSSr231m = 4596, X86_VFNMADDSSr231r = 4597, X86_VFNMSUB132PDZ128m = 4598, X86_VFNMSUB132PDZ128mb = 4599, X86_VFNMSUB132PDZ256m = 4600, X86_VFNMSUB132PDZ256mb = 4601, X86_VFNMSUB132PDZm = 4602, X86_VFNMSUB132PDZmb = 4603, X86_VFNMSUB132PSZ128m = 4604, X86_VFNMSUB132PSZ128mb = 4605, X86_VFNMSUB132PSZ256m = 4606, X86_VFNMSUB132PSZ256mb = 4607, X86_VFNMSUB132PSZm = 4608, X86_VFNMSUB132PSZmb = 4609, X86_VFNMSUBPD4mr = 4610, X86_VFNMSUBPD4mrY = 4611, X86_VFNMSUBPD4rm = 4612, X86_VFNMSUBPD4rmY = 4613, X86_VFNMSUBPD4rr = 4614, X86_VFNMSUBPD4rrY = 4615, X86_VFNMSUBPD4rrY_REV = 4616, X86_VFNMSUBPD4rr_REV = 4617, X86_VFNMSUBPDZ128v213rm = 4618, X86_VFNMSUBPDZ128v213rmb = 4619, X86_VFNMSUBPDZ128v213rmbk = 4620, X86_VFNMSUBPDZ128v213rmbkz = 4621, X86_VFNMSUBPDZ128v213rmk = 4622, X86_VFNMSUBPDZ128v213rmkz = 4623, X86_VFNMSUBPDZ128v213rr = 4624, X86_VFNMSUBPDZ128v213rrk = 4625, X86_VFNMSUBPDZ128v213rrkz = 4626, X86_VFNMSUBPDZ128v231rm = 4627, X86_VFNMSUBPDZ128v231rmb = 4628, X86_VFNMSUBPDZ128v231rmbk = 4629, X86_VFNMSUBPDZ128v231rmbkz = 4630, X86_VFNMSUBPDZ128v231rmk = 4631, X86_VFNMSUBPDZ128v231rmkz = 4632, X86_VFNMSUBPDZ128v231rr = 4633, X86_VFNMSUBPDZ128v231rrk = 4634, X86_VFNMSUBPDZ128v231rrkz = 4635, X86_VFNMSUBPDZ256v213rm = 4636, X86_VFNMSUBPDZ256v213rmb = 4637, X86_VFNMSUBPDZ256v213rmbk = 4638, X86_VFNMSUBPDZ256v213rmbkz = 4639, X86_VFNMSUBPDZ256v213rmk = 4640, X86_VFNMSUBPDZ256v213rmkz = 4641, X86_VFNMSUBPDZ256v213rr = 4642, X86_VFNMSUBPDZ256v213rrk = 4643, X86_VFNMSUBPDZ256v213rrkz = 4644, X86_VFNMSUBPDZ256v231rm = 4645, X86_VFNMSUBPDZ256v231rmb = 4646, X86_VFNMSUBPDZ256v231rmbk = 4647, X86_VFNMSUBPDZ256v231rmbkz = 4648, X86_VFNMSUBPDZ256v231rmk = 4649, X86_VFNMSUBPDZ256v231rmkz = 4650, X86_VFNMSUBPDZ256v231rr = 4651, X86_VFNMSUBPDZ256v231rrk = 4652, X86_VFNMSUBPDZ256v231rrkz = 4653, X86_VFNMSUBPDZv213rm = 4654, X86_VFNMSUBPDZv213rmb = 4655, X86_VFNMSUBPDZv213rmbk = 4656, X86_VFNMSUBPDZv213rmbkz = 4657, X86_VFNMSUBPDZv213rmk = 4658, X86_VFNMSUBPDZv213rmkz = 4659, X86_VFNMSUBPDZv213rr = 4660, X86_VFNMSUBPDZv213rrb = 4661, X86_VFNMSUBPDZv213rrbk = 4662, X86_VFNMSUBPDZv213rrbkz = 4663, X86_VFNMSUBPDZv213rrk = 4664, X86_VFNMSUBPDZv213rrkz = 4665, X86_VFNMSUBPDZv231rm = 4666, X86_VFNMSUBPDZv231rmb = 4667, X86_VFNMSUBPDZv231rmbk = 4668, X86_VFNMSUBPDZv231rmbkz = 4669, X86_VFNMSUBPDZv231rmk = 4670, X86_VFNMSUBPDZv231rmkz = 4671, X86_VFNMSUBPDZv231rr = 4672, X86_VFNMSUBPDZv231rrk = 4673, X86_VFNMSUBPDZv231rrkz = 4674, X86_VFNMSUBPDr132m = 4675, X86_VFNMSUBPDr132mY = 4676, X86_VFNMSUBPDr132r = 4677, X86_VFNMSUBPDr132rY = 4678, X86_VFNMSUBPDr213m = 4679, X86_VFNMSUBPDr213mY = 4680, X86_VFNMSUBPDr213r = 4681, X86_VFNMSUBPDr213rY = 4682, X86_VFNMSUBPDr231m = 4683, X86_VFNMSUBPDr231mY = 4684, X86_VFNMSUBPDr231r = 4685, X86_VFNMSUBPDr231rY = 4686, X86_VFNMSUBPS4mr = 4687, X86_VFNMSUBPS4mrY = 4688, X86_VFNMSUBPS4rm = 4689, X86_VFNMSUBPS4rmY = 4690, X86_VFNMSUBPS4rr = 4691, X86_VFNMSUBPS4rrY = 4692, X86_VFNMSUBPS4rrY_REV = 4693, X86_VFNMSUBPS4rr_REV = 4694, X86_VFNMSUBPSZ128v213rm = 4695, X86_VFNMSUBPSZ128v213rmb = 4696, X86_VFNMSUBPSZ128v213rmbk = 4697, X86_VFNMSUBPSZ128v213rmbkz = 4698, X86_VFNMSUBPSZ128v213rmk = 4699, X86_VFNMSUBPSZ128v213rmkz = 4700, X86_VFNMSUBPSZ128v213rr = 4701, X86_VFNMSUBPSZ128v213rrk = 4702, X86_VFNMSUBPSZ128v213rrkz = 4703, X86_VFNMSUBPSZ128v231rm = 4704, X86_VFNMSUBPSZ128v231rmb = 4705, X86_VFNMSUBPSZ128v231rmbk = 4706, X86_VFNMSUBPSZ128v231rmbkz = 4707, X86_VFNMSUBPSZ128v231rmk = 4708, X86_VFNMSUBPSZ128v231rmkz = 4709, X86_VFNMSUBPSZ128v231rr = 4710, X86_VFNMSUBPSZ128v231rrk = 4711, X86_VFNMSUBPSZ128v231rrkz = 4712, X86_VFNMSUBPSZ256v213rm = 4713, X86_VFNMSUBPSZ256v213rmb = 4714, X86_VFNMSUBPSZ256v213rmbk = 4715, X86_VFNMSUBPSZ256v213rmbkz = 4716, X86_VFNMSUBPSZ256v213rmk = 4717, X86_VFNMSUBPSZ256v213rmkz = 4718, X86_VFNMSUBPSZ256v213rr = 4719, X86_VFNMSUBPSZ256v213rrk = 4720, X86_VFNMSUBPSZ256v213rrkz = 4721, X86_VFNMSUBPSZ256v231rm = 4722, X86_VFNMSUBPSZ256v231rmb = 4723, X86_VFNMSUBPSZ256v231rmbk = 4724, X86_VFNMSUBPSZ256v231rmbkz = 4725, X86_VFNMSUBPSZ256v231rmk = 4726, X86_VFNMSUBPSZ256v231rmkz = 4727, X86_VFNMSUBPSZ256v231rr = 4728, X86_VFNMSUBPSZ256v231rrk = 4729, X86_VFNMSUBPSZ256v231rrkz = 4730, X86_VFNMSUBPSZv213rm = 4731, X86_VFNMSUBPSZv213rmb = 4732, X86_VFNMSUBPSZv213rmbk = 4733, X86_VFNMSUBPSZv213rmbkz = 4734, X86_VFNMSUBPSZv213rmk = 4735, X86_VFNMSUBPSZv213rmkz = 4736, X86_VFNMSUBPSZv213rr = 4737, X86_VFNMSUBPSZv213rrb = 4738, X86_VFNMSUBPSZv213rrbk = 4739, X86_VFNMSUBPSZv213rrbkz = 4740, X86_VFNMSUBPSZv213rrk = 4741, X86_VFNMSUBPSZv213rrkz = 4742, X86_VFNMSUBPSZv231rm = 4743, X86_VFNMSUBPSZv231rmb = 4744, X86_VFNMSUBPSZv231rmbk = 4745, X86_VFNMSUBPSZv231rmbkz = 4746, X86_VFNMSUBPSZv231rmk = 4747, X86_VFNMSUBPSZv231rmkz = 4748, X86_VFNMSUBPSZv231rr = 4749, X86_VFNMSUBPSZv231rrk = 4750, X86_VFNMSUBPSZv231rrkz = 4751, X86_VFNMSUBPSr132m = 4752, X86_VFNMSUBPSr132mY = 4753, X86_VFNMSUBPSr132r = 4754, X86_VFNMSUBPSr132rY = 4755, X86_VFNMSUBPSr213m = 4756, X86_VFNMSUBPSr213mY = 4757, X86_VFNMSUBPSr213r = 4758, X86_VFNMSUBPSr213rY = 4759, X86_VFNMSUBPSr231m = 4760, X86_VFNMSUBPSr231mY = 4761, X86_VFNMSUBPSr231r = 4762, X86_VFNMSUBPSr231rY = 4763, X86_VFNMSUBSD4mr = 4764, X86_VFNMSUBSD4mr_Int = 4765, X86_VFNMSUBSD4rm = 4766, X86_VFNMSUBSD4rm_Int = 4767, X86_VFNMSUBSD4rr = 4768, X86_VFNMSUBSD4rr_Int = 4769, X86_VFNMSUBSD4rr_REV = 4770, X86_VFNMSUBSDZm = 4771, X86_VFNMSUBSDZr = 4772, X86_VFNMSUBSDr132m = 4773, X86_VFNMSUBSDr132r = 4774, X86_VFNMSUBSDr213m = 4775, X86_VFNMSUBSDr213r = 4776, X86_VFNMSUBSDr231m = 4777, X86_VFNMSUBSDr231r = 4778, X86_VFNMSUBSS4mr = 4779, X86_VFNMSUBSS4mr_Int = 4780, X86_VFNMSUBSS4rm = 4781, X86_VFNMSUBSS4rm_Int = 4782, X86_VFNMSUBSS4rr = 4783, X86_VFNMSUBSS4rr_Int = 4784, X86_VFNMSUBSS4rr_REV = 4785, X86_VFNMSUBSSZm = 4786, X86_VFNMSUBSSZr = 4787, X86_VFNMSUBSSr132m = 4788, X86_VFNMSUBSSr132r = 4789, X86_VFNMSUBSSr213m = 4790, X86_VFNMSUBSSr213r = 4791, X86_VFNMSUBSSr231m = 4792, X86_VFNMSUBSSr231r = 4793, X86_VFRCZPDrm = 4794, X86_VFRCZPDrmY = 4795, X86_VFRCZPDrr = 4796, X86_VFRCZPDrrY = 4797, X86_VFRCZPSrm = 4798, X86_VFRCZPSrmY = 4799, X86_VFRCZPSrr = 4800, X86_VFRCZPSrrY = 4801, X86_VFRCZSDrm = 4802, X86_VFRCZSDrr = 4803, X86_VFRCZSSrm = 4804, X86_VFRCZSSrr = 4805, X86_VFsANDNPDrm = 4806, X86_VFsANDNPDrr = 4807, X86_VFsANDNPSrm = 4808, X86_VFsANDNPSrr = 4809, X86_VFsANDPDrm = 4810, X86_VFsANDPDrr = 4811, X86_VFsANDPSrm = 4812, X86_VFsANDPSrr = 4813, X86_VFsORPDrm = 4814, X86_VFsORPDrr = 4815, X86_VFsORPSrm = 4816, X86_VFsORPSrr = 4817, X86_VFsXORPDrm = 4818, X86_VFsXORPDrr = 4819, X86_VFsXORPSrm = 4820, X86_VFsXORPSrr = 4821, X86_VFvANDNPDrm = 4822, X86_VFvANDNPDrr = 4823, X86_VFvANDNPSrm = 4824, X86_VFvANDNPSrr = 4825, X86_VFvANDPDrm = 4826, X86_VFvANDPDrr = 4827, X86_VFvANDPSrm = 4828, X86_VFvANDPSrr = 4829, X86_VFvORPDrm = 4830, X86_VFvORPDrr = 4831, X86_VFvORPSrm = 4832, X86_VFvORPSrr = 4833, X86_VFvXORPDrm = 4834, X86_VFvXORPDrr = 4835, X86_VFvXORPSrm = 4836, X86_VFvXORPSrr = 4837, X86_VGATHERDPDYrm = 4838, X86_VGATHERDPDZrm = 4839, X86_VGATHERDPDrm = 4840, X86_VGATHERDPSYrm = 4841, X86_VGATHERDPSZrm = 4842, X86_VGATHERDPSrm = 4843, X86_VGATHERPF0DPDm = 4844, X86_VGATHERPF0DPSm = 4845, X86_VGATHERPF0QPDm = 4846, X86_VGATHERPF0QPSm = 4847, X86_VGATHERPF1DPDm = 4848, X86_VGATHERPF1DPSm = 4849, X86_VGATHERPF1QPDm = 4850, X86_VGATHERPF1QPSm = 4851, X86_VGATHERQPDYrm = 4852, X86_VGATHERQPDZrm = 4853, X86_VGATHERQPDrm = 4854, X86_VGATHERQPSYrm = 4855, X86_VGATHERQPSZrm = 4856, X86_VGATHERQPSrm = 4857, X86_VHADDPDYrm = 4858, X86_VHADDPDYrr = 4859, X86_VHADDPDrm = 4860, X86_VHADDPDrr = 4861, X86_VHADDPSYrm = 4862, X86_VHADDPSYrr = 4863, X86_VHADDPSrm = 4864, X86_VHADDPSrr = 4865, X86_VHSUBPDYrm = 4866, X86_VHSUBPDYrr = 4867, X86_VHSUBPDrm = 4868, X86_VHSUBPDrr = 4869, X86_VHSUBPSYrm = 4870, X86_VHSUBPSYrr = 4871, X86_VHSUBPSrm = 4872, X86_VHSUBPSrr = 4873, X86_VINSERTF128rm = 4874, X86_VINSERTF128rr = 4875, X86_VINSERTF32x4rm = 4876, X86_VINSERTF32x4rr = 4877, X86_VINSERTF32x8rm = 4878, X86_VINSERTF32x8rr = 4879, X86_VINSERTF64x2rm = 4880, X86_VINSERTF64x2rr = 4881, X86_VINSERTF64x4rm = 4882, X86_VINSERTF64x4rr = 4883, X86_VINSERTI128rm = 4884, X86_VINSERTI128rr = 4885, X86_VINSERTI32x4rm = 4886, X86_VINSERTI32x4rr = 4887, X86_VINSERTI32x8rm = 4888, X86_VINSERTI32x8rr = 4889, X86_VINSERTI64x2rm = 4890, X86_VINSERTI64x2rr = 4891, X86_VINSERTI64x4rm = 4892, X86_VINSERTI64x4rr = 4893, X86_VINSERTPSrm = 4894, X86_VINSERTPSrr = 4895, X86_VINSERTPSzrm = 4896, X86_VINSERTPSzrr = 4897, X86_VLDDQUYrm = 4898, X86_VLDDQUrm = 4899, X86_VLDMXCSR = 4900, X86_VMASKMOVDQU = 4901, X86_VMASKMOVDQU64 = 4902, X86_VMASKMOVPDYmr = 4903, X86_VMASKMOVPDYrm = 4904, X86_VMASKMOVPDmr = 4905, X86_VMASKMOVPDrm = 4906, X86_VMASKMOVPSYmr = 4907, X86_VMASKMOVPSYrm = 4908, X86_VMASKMOVPSmr = 4909, X86_VMASKMOVPSrm = 4910, X86_VMAXCPDYrm = 4911, X86_VMAXCPDYrr = 4912, X86_VMAXCPDrm = 4913, X86_VMAXCPDrr = 4914, X86_VMAXCPSYrm = 4915, X86_VMAXCPSYrr = 4916, X86_VMAXCPSrm = 4917, X86_VMAXCPSrr = 4918, X86_VMAXCSDrm = 4919, X86_VMAXCSDrr = 4920, X86_VMAXCSSrm = 4921, X86_VMAXCSSrr = 4922, X86_VMAXPDYrm = 4923, X86_VMAXPDYrr = 4924, X86_VMAXPDZ128rm = 4925, X86_VMAXPDZ128rmb = 4926, X86_VMAXPDZ128rmbk = 4927, X86_VMAXPDZ128rmbkz = 4928, X86_VMAXPDZ128rmk = 4929, X86_VMAXPDZ128rmkz = 4930, X86_VMAXPDZ128rr = 4931, X86_VMAXPDZ128rrk = 4932, X86_VMAXPDZ128rrkz = 4933, X86_VMAXPDZ256rm = 4934, X86_VMAXPDZ256rmb = 4935, X86_VMAXPDZ256rmbk = 4936, X86_VMAXPDZ256rmbkz = 4937, X86_VMAXPDZ256rmk = 4938, X86_VMAXPDZ256rmkz = 4939, X86_VMAXPDZ256rr = 4940, X86_VMAXPDZ256rrk = 4941, X86_VMAXPDZ256rrkz = 4942, X86_VMAXPDZrm = 4943, X86_VMAXPDZrmb = 4944, X86_VMAXPDZrmbk = 4945, X86_VMAXPDZrmbkz = 4946, X86_VMAXPDZrmk = 4947, X86_VMAXPDZrmkz = 4948, X86_VMAXPDZrr = 4949, X86_VMAXPDZrrk = 4950, X86_VMAXPDZrrkz = 4951, X86_VMAXPDrm = 4952, X86_VMAXPDrr = 4953, X86_VMAXPSYrm = 4954, X86_VMAXPSYrr = 4955, X86_VMAXPSZ128rm = 4956, X86_VMAXPSZ128rmb = 4957, X86_VMAXPSZ128rmbk = 4958, X86_VMAXPSZ128rmbkz = 4959, X86_VMAXPSZ128rmk = 4960, X86_VMAXPSZ128rmkz = 4961, X86_VMAXPSZ128rr = 4962, X86_VMAXPSZ128rrk = 4963, X86_VMAXPSZ128rrkz = 4964, X86_VMAXPSZ256rm = 4965, X86_VMAXPSZ256rmb = 4966, X86_VMAXPSZ256rmbk = 4967, X86_VMAXPSZ256rmbkz = 4968, X86_VMAXPSZ256rmk = 4969, X86_VMAXPSZ256rmkz = 4970, X86_VMAXPSZ256rr = 4971, X86_VMAXPSZ256rrk = 4972, X86_VMAXPSZ256rrkz = 4973, X86_VMAXPSZrm = 4974, X86_VMAXPSZrmb = 4975, X86_VMAXPSZrmbk = 4976, X86_VMAXPSZrmbkz = 4977, X86_VMAXPSZrmk = 4978, X86_VMAXPSZrmkz = 4979, X86_VMAXPSZrr = 4980, X86_VMAXPSZrrk = 4981, X86_VMAXPSZrrkz = 4982, X86_VMAXPSrm = 4983, X86_VMAXPSrr = 4984, X86_VMAXSDZrm = 4985, X86_VMAXSDZrm_Int = 4986, X86_VMAXSDZrm_Intk = 4987, X86_VMAXSDZrm_Intkz = 4988, X86_VMAXSDZrr = 4989, X86_VMAXSDZrr_Int = 4990, X86_VMAXSDZrr_Intk = 4991, X86_VMAXSDZrr_Intkz = 4992, X86_VMAXSDZrrb = 4993, X86_VMAXSDZrrbk = 4994, X86_VMAXSDZrrbkz = 4995, X86_VMAXSDrm = 4996, X86_VMAXSDrm_Int = 4997, X86_VMAXSDrr = 4998, X86_VMAXSDrr_Int = 4999, X86_VMAXSSZrm = 5000, X86_VMAXSSZrm_Int = 5001, X86_VMAXSSZrm_Intk = 5002, X86_VMAXSSZrm_Intkz = 5003, X86_VMAXSSZrr = 5004, X86_VMAXSSZrr_Int = 5005, X86_VMAXSSZrr_Intk = 5006, X86_VMAXSSZrr_Intkz = 5007, X86_VMAXSSZrrb = 5008, X86_VMAXSSZrrbk = 5009, X86_VMAXSSZrrbkz = 5010, X86_VMAXSSrm = 5011, X86_VMAXSSrm_Int = 5012, X86_VMAXSSrr = 5013, X86_VMAXSSrr_Int = 5014, X86_VMCALL = 5015, X86_VMCLEARm = 5016, X86_VMFUNC = 5017, X86_VMINCPDYrm = 5018, X86_VMINCPDYrr = 5019, X86_VMINCPDrm = 5020, X86_VMINCPDrr = 5021, X86_VMINCPSYrm = 5022, X86_VMINCPSYrr = 5023, X86_VMINCPSrm = 5024, X86_VMINCPSrr = 5025, X86_VMINCSDrm = 5026, X86_VMINCSDrr = 5027, X86_VMINCSSrm = 5028, X86_VMINCSSrr = 5029, X86_VMINPDYrm = 5030, X86_VMINPDYrr = 5031, X86_VMINPDZ128rm = 5032, X86_VMINPDZ128rmb = 5033, X86_VMINPDZ128rmbk = 5034, X86_VMINPDZ128rmbkz = 5035, X86_VMINPDZ128rmk = 5036, X86_VMINPDZ128rmkz = 5037, X86_VMINPDZ128rr = 5038, X86_VMINPDZ128rrk = 5039, X86_VMINPDZ128rrkz = 5040, X86_VMINPDZ256rm = 5041, X86_VMINPDZ256rmb = 5042, X86_VMINPDZ256rmbk = 5043, X86_VMINPDZ256rmbkz = 5044, X86_VMINPDZ256rmk = 5045, X86_VMINPDZ256rmkz = 5046, X86_VMINPDZ256rr = 5047, X86_VMINPDZ256rrk = 5048, X86_VMINPDZ256rrkz = 5049, X86_VMINPDZrm = 5050, X86_VMINPDZrmb = 5051, X86_VMINPDZrmbk = 5052, X86_VMINPDZrmbkz = 5053, X86_VMINPDZrmk = 5054, X86_VMINPDZrmkz = 5055, X86_VMINPDZrr = 5056, X86_VMINPDZrrk = 5057, X86_VMINPDZrrkz = 5058, X86_VMINPDrm = 5059, X86_VMINPDrr = 5060, X86_VMINPSYrm = 5061, X86_VMINPSYrr = 5062, X86_VMINPSZ128rm = 5063, X86_VMINPSZ128rmb = 5064, X86_VMINPSZ128rmbk = 5065, X86_VMINPSZ128rmbkz = 5066, X86_VMINPSZ128rmk = 5067, X86_VMINPSZ128rmkz = 5068, X86_VMINPSZ128rr = 5069, X86_VMINPSZ128rrk = 5070, X86_VMINPSZ128rrkz = 5071, X86_VMINPSZ256rm = 5072, X86_VMINPSZ256rmb = 5073, X86_VMINPSZ256rmbk = 5074, X86_VMINPSZ256rmbkz = 5075, X86_VMINPSZ256rmk = 5076, X86_VMINPSZ256rmkz = 5077, X86_VMINPSZ256rr = 5078, X86_VMINPSZ256rrk = 5079, X86_VMINPSZ256rrkz = 5080, X86_VMINPSZrm = 5081, X86_VMINPSZrmb = 5082, X86_VMINPSZrmbk = 5083, X86_VMINPSZrmbkz = 5084, X86_VMINPSZrmk = 5085, X86_VMINPSZrmkz = 5086, X86_VMINPSZrr = 5087, X86_VMINPSZrrk = 5088, X86_VMINPSZrrkz = 5089, X86_VMINPSrm = 5090, X86_VMINPSrr = 5091, X86_VMINSDZrm = 5092, X86_VMINSDZrm_Int = 5093, X86_VMINSDZrm_Intk = 5094, X86_VMINSDZrm_Intkz = 5095, X86_VMINSDZrr = 5096, X86_VMINSDZrr_Int = 5097, X86_VMINSDZrr_Intk = 5098, X86_VMINSDZrr_Intkz = 5099, X86_VMINSDZrrb = 5100, X86_VMINSDZrrbk = 5101, X86_VMINSDZrrbkz = 5102, X86_VMINSDrm = 5103, X86_VMINSDrm_Int = 5104, X86_VMINSDrr = 5105, X86_VMINSDrr_Int = 5106, X86_VMINSSZrm = 5107, X86_VMINSSZrm_Int = 5108, X86_VMINSSZrm_Intk = 5109, X86_VMINSSZrm_Intkz = 5110, X86_VMINSSZrr = 5111, X86_VMINSSZrr_Int = 5112, X86_VMINSSZrr_Intk = 5113, X86_VMINSSZrr_Intkz = 5114, X86_VMINSSZrrb = 5115, X86_VMINSSZrrbk = 5116, X86_VMINSSZrrbkz = 5117, X86_VMINSSrm = 5118, X86_VMINSSrm_Int = 5119, X86_VMINSSrr = 5120, X86_VMINSSrr_Int = 5121, X86_VMLAUNCH = 5122, X86_VMLOAD32 = 5123, X86_VMLOAD64 = 5124, X86_VMMCALL = 5125, X86_VMOV64toPQIZrr = 5126, X86_VMOV64toPQIrm = 5127, X86_VMOV64toPQIrr = 5128, X86_VMOV64toSDZrr = 5129, X86_VMOV64toSDrm = 5130, X86_VMOV64toSDrr = 5131, X86_VMOVAPDYmr = 5132, X86_VMOVAPDYrm = 5133, X86_VMOVAPDYrr = 5134, X86_VMOVAPDYrr_REV = 5135, X86_VMOVAPDZ128mr = 5136, X86_VMOVAPDZ128mrk = 5137, X86_VMOVAPDZ128rm = 5138, X86_VMOVAPDZ128rmk = 5139, X86_VMOVAPDZ128rmkz = 5140, X86_VMOVAPDZ128rr = 5141, X86_VMOVAPDZ128rr_alt = 5142, X86_VMOVAPDZ128rrk = 5143, X86_VMOVAPDZ128rrk_alt = 5144, X86_VMOVAPDZ128rrkz = 5145, X86_VMOVAPDZ128rrkz_alt = 5146, X86_VMOVAPDZ256mr = 5147, X86_VMOVAPDZ256mrk = 5148, X86_VMOVAPDZ256rm = 5149, X86_VMOVAPDZ256rmk = 5150, X86_VMOVAPDZ256rmkz = 5151, X86_VMOVAPDZ256rr = 5152, X86_VMOVAPDZ256rr_alt = 5153, X86_VMOVAPDZ256rrk = 5154, X86_VMOVAPDZ256rrk_alt = 5155, X86_VMOVAPDZ256rrkz = 5156, X86_VMOVAPDZ256rrkz_alt = 5157, X86_VMOVAPDZmr = 5158, X86_VMOVAPDZmrk = 5159, X86_VMOVAPDZrm = 5160, X86_VMOVAPDZrmk = 5161, X86_VMOVAPDZrmkz = 5162, X86_VMOVAPDZrr = 5163, X86_VMOVAPDZrr_alt = 5164, X86_VMOVAPDZrrk = 5165, X86_VMOVAPDZrrk_alt = 5166, X86_VMOVAPDZrrkz = 5167, X86_VMOVAPDZrrkz_alt = 5168, X86_VMOVAPDmr = 5169, X86_VMOVAPDrm = 5170, X86_VMOVAPDrr = 5171, X86_VMOVAPDrr_REV = 5172, X86_VMOVAPSYmr = 5173, X86_VMOVAPSYrm = 5174, X86_VMOVAPSYrr = 5175, X86_VMOVAPSYrr_REV = 5176, X86_VMOVAPSZ128mr = 5177, X86_VMOVAPSZ128mrk = 5178, X86_VMOVAPSZ128rm = 5179, X86_VMOVAPSZ128rmk = 5180, X86_VMOVAPSZ128rmkz = 5181, X86_VMOVAPSZ128rr = 5182, X86_VMOVAPSZ128rr_alt = 5183, X86_VMOVAPSZ128rrk = 5184, X86_VMOVAPSZ128rrk_alt = 5185, X86_VMOVAPSZ128rrkz = 5186, X86_VMOVAPSZ128rrkz_alt = 5187, X86_VMOVAPSZ256mr = 5188, X86_VMOVAPSZ256mrk = 5189, X86_VMOVAPSZ256rm = 5190, X86_VMOVAPSZ256rmk = 5191, X86_VMOVAPSZ256rmkz = 5192, X86_VMOVAPSZ256rr = 5193, X86_VMOVAPSZ256rr_alt = 5194, X86_VMOVAPSZ256rrk = 5195, X86_VMOVAPSZ256rrk_alt = 5196, X86_VMOVAPSZ256rrkz = 5197, X86_VMOVAPSZ256rrkz_alt = 5198, X86_VMOVAPSZmr = 5199, X86_VMOVAPSZmrk = 5200, X86_VMOVAPSZrm = 5201, X86_VMOVAPSZrmk = 5202, X86_VMOVAPSZrmkz = 5203, X86_VMOVAPSZrr = 5204, X86_VMOVAPSZrr_alt = 5205, X86_VMOVAPSZrrk = 5206, X86_VMOVAPSZrrk_alt = 5207, X86_VMOVAPSZrrkz = 5208, X86_VMOVAPSZrrkz_alt = 5209, X86_VMOVAPSmr = 5210, X86_VMOVAPSrm = 5211, X86_VMOVAPSrr = 5212, X86_VMOVAPSrr_REV = 5213, X86_VMOVDDUPYrm = 5214, X86_VMOVDDUPYrr = 5215, X86_VMOVDDUPZrm = 5216, X86_VMOVDDUPZrr = 5217, X86_VMOVDDUPrm = 5218, X86_VMOVDDUPrr = 5219, X86_VMOVDI2PDIZrm = 5220, X86_VMOVDI2PDIZrr = 5221, X86_VMOVDI2PDIrm = 5222, X86_VMOVDI2PDIrr = 5223, X86_VMOVDI2SSZrm = 5224, X86_VMOVDI2SSZrr = 5225, X86_VMOVDI2SSrm = 5226, X86_VMOVDI2SSrr = 5227, X86_VMOVDQA32Z128mr = 5228, X86_VMOVDQA32Z128mrk = 5229, X86_VMOVDQA32Z128rm = 5230, X86_VMOVDQA32Z128rmk = 5231, X86_VMOVDQA32Z128rmkz = 5232, X86_VMOVDQA32Z128rr = 5233, X86_VMOVDQA32Z128rr_alt = 5234, X86_VMOVDQA32Z128rrk = 5235, X86_VMOVDQA32Z128rrk_alt = 5236, X86_VMOVDQA32Z128rrkz = 5237, X86_VMOVDQA32Z128rrkz_alt = 5238, X86_VMOVDQA32Z256mr = 5239, X86_VMOVDQA32Z256mrk = 5240, X86_VMOVDQA32Z256rm = 5241, X86_VMOVDQA32Z256rmk = 5242, X86_VMOVDQA32Z256rmkz = 5243, X86_VMOVDQA32Z256rr = 5244, X86_VMOVDQA32Z256rr_alt = 5245, X86_VMOVDQA32Z256rrk = 5246, X86_VMOVDQA32Z256rrk_alt = 5247, X86_VMOVDQA32Z256rrkz = 5248, X86_VMOVDQA32Z256rrkz_alt = 5249, X86_VMOVDQA32Zmr = 5250, X86_VMOVDQA32Zmrk = 5251, X86_VMOVDQA32Zrm = 5252, X86_VMOVDQA32Zrmk = 5253, X86_VMOVDQA32Zrmkz = 5254, X86_VMOVDQA32Zrr = 5255, X86_VMOVDQA32Zrr_alt = 5256, X86_VMOVDQA32Zrrk = 5257, X86_VMOVDQA32Zrrk_alt = 5258, X86_VMOVDQA32Zrrkz = 5259, X86_VMOVDQA32Zrrkz_alt = 5260, X86_VMOVDQA64Z128mr = 5261, X86_VMOVDQA64Z128mrk = 5262, X86_VMOVDQA64Z128rm = 5263, X86_VMOVDQA64Z128rmk = 5264, X86_VMOVDQA64Z128rmkz = 5265, X86_VMOVDQA64Z128rr = 5266, X86_VMOVDQA64Z128rr_alt = 5267, X86_VMOVDQA64Z128rrk = 5268, X86_VMOVDQA64Z128rrk_alt = 5269, X86_VMOVDQA64Z128rrkz = 5270, X86_VMOVDQA64Z128rrkz_alt = 5271, X86_VMOVDQA64Z256mr = 5272, X86_VMOVDQA64Z256mrk = 5273, X86_VMOVDQA64Z256rm = 5274, X86_VMOVDQA64Z256rmk = 5275, X86_VMOVDQA64Z256rmkz = 5276, X86_VMOVDQA64Z256rr = 5277, X86_VMOVDQA64Z256rr_alt = 5278, X86_VMOVDQA64Z256rrk = 5279, X86_VMOVDQA64Z256rrk_alt = 5280, X86_VMOVDQA64Z256rrkz = 5281, X86_VMOVDQA64Z256rrkz_alt = 5282, X86_VMOVDQA64Zmr = 5283, X86_VMOVDQA64Zmrk = 5284, X86_VMOVDQA64Zrm = 5285, X86_VMOVDQA64Zrmk = 5286, X86_VMOVDQA64Zrmkz = 5287, X86_VMOVDQA64Zrr = 5288, X86_VMOVDQA64Zrr_alt = 5289, X86_VMOVDQA64Zrrk = 5290, X86_VMOVDQA64Zrrk_alt = 5291, X86_VMOVDQA64Zrrkz = 5292, X86_VMOVDQA64Zrrkz_alt = 5293, X86_VMOVDQAYmr = 5294, X86_VMOVDQAYrm = 5295, X86_VMOVDQAYrr = 5296, X86_VMOVDQAYrr_REV = 5297, X86_VMOVDQAmr = 5298, X86_VMOVDQArm = 5299, X86_VMOVDQArr = 5300, X86_VMOVDQArr_REV = 5301, X86_VMOVDQU16Z128mr = 5302, X86_VMOVDQU16Z128mrk = 5303, X86_VMOVDQU16Z128rm = 5304, X86_VMOVDQU16Z128rmk = 5305, X86_VMOVDQU16Z128rmkz = 5306, X86_VMOVDQU16Z128rr = 5307, X86_VMOVDQU16Z128rr_alt = 5308, X86_VMOVDQU16Z128rrk = 5309, X86_VMOVDQU16Z128rrk_alt = 5310, X86_VMOVDQU16Z128rrkz = 5311, X86_VMOVDQU16Z128rrkz_alt = 5312, X86_VMOVDQU16Z256mr = 5313, X86_VMOVDQU16Z256mrk = 5314, X86_VMOVDQU16Z256rm = 5315, X86_VMOVDQU16Z256rmk = 5316, X86_VMOVDQU16Z256rmkz = 5317, X86_VMOVDQU16Z256rr = 5318, X86_VMOVDQU16Z256rr_alt = 5319, X86_VMOVDQU16Z256rrk = 5320, X86_VMOVDQU16Z256rrk_alt = 5321, X86_VMOVDQU16Z256rrkz = 5322, X86_VMOVDQU16Z256rrkz_alt = 5323, X86_VMOVDQU16Zmr = 5324, X86_VMOVDQU16Zmrk = 5325, X86_VMOVDQU16Zrm = 5326, X86_VMOVDQU16Zrmk = 5327, X86_VMOVDQU16Zrmkz = 5328, X86_VMOVDQU16Zrr = 5329, X86_VMOVDQU16Zrr_alt = 5330, X86_VMOVDQU16Zrrk = 5331, X86_VMOVDQU16Zrrk_alt = 5332, X86_VMOVDQU16Zrrkz = 5333, X86_VMOVDQU16Zrrkz_alt = 5334, X86_VMOVDQU32Z128mr = 5335, X86_VMOVDQU32Z128mrk = 5336, X86_VMOVDQU32Z128rm = 5337, X86_VMOVDQU32Z128rmk = 5338, X86_VMOVDQU32Z128rmkz = 5339, X86_VMOVDQU32Z128rr = 5340, X86_VMOVDQU32Z128rr_alt = 5341, X86_VMOVDQU32Z128rrk = 5342, X86_VMOVDQU32Z128rrk_alt = 5343, X86_VMOVDQU32Z128rrkz = 5344, X86_VMOVDQU32Z128rrkz_alt = 5345, X86_VMOVDQU32Z256mr = 5346, X86_VMOVDQU32Z256mrk = 5347, X86_VMOVDQU32Z256rm = 5348, X86_VMOVDQU32Z256rmk = 5349, X86_VMOVDQU32Z256rmkz = 5350, X86_VMOVDQU32Z256rr = 5351, X86_VMOVDQU32Z256rr_alt = 5352, X86_VMOVDQU32Z256rrk = 5353, X86_VMOVDQU32Z256rrk_alt = 5354, X86_VMOVDQU32Z256rrkz = 5355, X86_VMOVDQU32Z256rrkz_alt = 5356, X86_VMOVDQU32Zmr = 5357, X86_VMOVDQU32Zmrk = 5358, X86_VMOVDQU32Zrm = 5359, X86_VMOVDQU32Zrmk = 5360, X86_VMOVDQU32Zrmkz = 5361, X86_VMOVDQU32Zrr = 5362, X86_VMOVDQU32Zrr_alt = 5363, X86_VMOVDQU32Zrrk = 5364, X86_VMOVDQU32Zrrk_alt = 5365, X86_VMOVDQU32Zrrkz = 5366, X86_VMOVDQU32Zrrkz_alt = 5367, X86_VMOVDQU64Z128mr = 5368, X86_VMOVDQU64Z128mrk = 5369, X86_VMOVDQU64Z128rm = 5370, X86_VMOVDQU64Z128rmk = 5371, X86_VMOVDQU64Z128rmkz = 5372, X86_VMOVDQU64Z128rr = 5373, X86_VMOVDQU64Z128rr_alt = 5374, X86_VMOVDQU64Z128rrk = 5375, X86_VMOVDQU64Z128rrk_alt = 5376, X86_VMOVDQU64Z128rrkz = 5377, X86_VMOVDQU64Z128rrkz_alt = 5378, X86_VMOVDQU64Z256mr = 5379, X86_VMOVDQU64Z256mrk = 5380, X86_VMOVDQU64Z256rm = 5381, X86_VMOVDQU64Z256rmk = 5382, X86_VMOVDQU64Z256rmkz = 5383, X86_VMOVDQU64Z256rr = 5384, X86_VMOVDQU64Z256rr_alt = 5385, X86_VMOVDQU64Z256rrk = 5386, X86_VMOVDQU64Z256rrk_alt = 5387, X86_VMOVDQU64Z256rrkz = 5388, X86_VMOVDQU64Z256rrkz_alt = 5389, X86_VMOVDQU64Zmr = 5390, X86_VMOVDQU64Zmrk = 5391, X86_VMOVDQU64Zrm = 5392, X86_VMOVDQU64Zrmk = 5393, X86_VMOVDQU64Zrmkz = 5394, X86_VMOVDQU64Zrr = 5395, X86_VMOVDQU64Zrr_alt = 5396, X86_VMOVDQU64Zrrk = 5397, X86_VMOVDQU64Zrrk_alt = 5398, X86_VMOVDQU64Zrrkz = 5399, X86_VMOVDQU64Zrrkz_alt = 5400, X86_VMOVDQU8Z128mr = 5401, X86_VMOVDQU8Z128mrk = 5402, X86_VMOVDQU8Z128rm = 5403, X86_VMOVDQU8Z128rmk = 5404, X86_VMOVDQU8Z128rmkz = 5405, X86_VMOVDQU8Z128rr = 5406, X86_VMOVDQU8Z128rr_alt = 5407, X86_VMOVDQU8Z128rrk = 5408, X86_VMOVDQU8Z128rrk_alt = 5409, X86_VMOVDQU8Z128rrkz = 5410, X86_VMOVDQU8Z128rrkz_alt = 5411, X86_VMOVDQU8Z256mr = 5412, X86_VMOVDQU8Z256mrk = 5413, X86_VMOVDQU8Z256rm = 5414, X86_VMOVDQU8Z256rmk = 5415, X86_VMOVDQU8Z256rmkz = 5416, X86_VMOVDQU8Z256rr = 5417, X86_VMOVDQU8Z256rr_alt = 5418, X86_VMOVDQU8Z256rrk = 5419, X86_VMOVDQU8Z256rrk_alt = 5420, X86_VMOVDQU8Z256rrkz = 5421, X86_VMOVDQU8Z256rrkz_alt = 5422, X86_VMOVDQU8Zmr = 5423, X86_VMOVDQU8Zmrk = 5424, X86_VMOVDQU8Zrm = 5425, X86_VMOVDQU8Zrmk = 5426, X86_VMOVDQU8Zrmkz = 5427, X86_VMOVDQU8Zrr = 5428, X86_VMOVDQU8Zrr_alt = 5429, X86_VMOVDQU8Zrrk = 5430, X86_VMOVDQU8Zrrk_alt = 5431, X86_VMOVDQU8Zrrkz = 5432, X86_VMOVDQU8Zrrkz_alt = 5433, X86_VMOVDQUYmr = 5434, X86_VMOVDQUYrm = 5435, X86_VMOVDQUYrr = 5436, X86_VMOVDQUYrr_REV = 5437, X86_VMOVDQUmr = 5438, X86_VMOVDQUrm = 5439, X86_VMOVDQUrr = 5440, X86_VMOVDQUrr_REV = 5441, X86_VMOVHLPSZrr = 5442, X86_VMOVHLPSrr = 5443, X86_VMOVHPDmr = 5444, X86_VMOVHPDrm = 5445, X86_VMOVHPSmr = 5446, X86_VMOVHPSrm = 5447, X86_VMOVLHPSZrr = 5448, X86_VMOVLHPSrr = 5449, X86_VMOVLPDmr = 5450, X86_VMOVLPDrm = 5451, X86_VMOVLPSmr = 5452, X86_VMOVLPSrm = 5453, X86_VMOVMSKPDYrr = 5454, X86_VMOVMSKPDrr = 5455, X86_VMOVMSKPSYrr = 5456, X86_VMOVMSKPSrr = 5457, X86_VMOVNTDQAYrm = 5458, X86_VMOVNTDQAZ128rm = 5459, X86_VMOVNTDQAZ256rm = 5460, X86_VMOVNTDQAZrm = 5461, X86_VMOVNTDQArm = 5462, X86_VMOVNTDQYmr = 5463, X86_VMOVNTDQZ128mr = 5464, X86_VMOVNTDQZ256mr = 5465, X86_VMOVNTDQZmr = 5466, X86_VMOVNTDQmr = 5467, X86_VMOVNTPDYmr = 5468, X86_VMOVNTPDZ128mr = 5469, X86_VMOVNTPDZ256mr = 5470, X86_VMOVNTPDZmr = 5471, X86_VMOVNTPDmr = 5472, X86_VMOVNTPSYmr = 5473, X86_VMOVNTPSZ128mr = 5474, X86_VMOVNTPSZ256mr = 5475, X86_VMOVNTPSZmr = 5476, X86_VMOVNTPSmr = 5477, X86_VMOVPDI2DIZmr = 5478, X86_VMOVPDI2DIZrr = 5479, X86_VMOVPDI2DImr = 5480, X86_VMOVPDI2DIrr = 5481, X86_VMOVPQI2QImr = 5482, X86_VMOVPQI2QIrr = 5483, X86_VMOVPQIto64Zmr = 5484, X86_VMOVPQIto64Zrr = 5485, X86_VMOVPQIto64rm = 5486, X86_VMOVPQIto64rr = 5487, X86_VMOVQI2PQIZrm = 5488, X86_VMOVQI2PQIrm = 5489, X86_VMOVSDZmr = 5490, X86_VMOVSDZmrk = 5491, X86_VMOVSDZrm = 5492, X86_VMOVSDZrr = 5493, X86_VMOVSDZrr_REV = 5494, X86_VMOVSDZrrk = 5495, X86_VMOVSDmr = 5496, X86_VMOVSDrm = 5497, X86_VMOVSDrr = 5498, X86_VMOVSDrr_REV = 5499, X86_VMOVSDto64Zmr = 5500, X86_VMOVSDto64Zrr = 5501, X86_VMOVSDto64mr = 5502, X86_VMOVSDto64rr = 5503, X86_VMOVSHDUPYrm = 5504, X86_VMOVSHDUPYrr = 5505, X86_VMOVSHDUPZrm = 5506, X86_VMOVSHDUPZrr = 5507, X86_VMOVSHDUPrm = 5508, X86_VMOVSHDUPrr = 5509, X86_VMOVSLDUPYrm = 5510, X86_VMOVSLDUPYrr = 5511, X86_VMOVSLDUPZrm = 5512, X86_VMOVSLDUPZrr = 5513, X86_VMOVSLDUPrm = 5514, X86_VMOVSLDUPrr = 5515, X86_VMOVSS2DIZmr = 5516, X86_VMOVSS2DIZrr = 5517, X86_VMOVSS2DImr = 5518, X86_VMOVSS2DIrr = 5519, X86_VMOVSSZmr = 5520, X86_VMOVSSZmrk = 5521, X86_VMOVSSZrm = 5522, X86_VMOVSSZrr = 5523, X86_VMOVSSZrr_REV = 5524, X86_VMOVSSZrrk = 5525, X86_VMOVSSmr = 5526, X86_VMOVSSrm = 5527, X86_VMOVSSrr = 5528, X86_VMOVSSrr_REV = 5529, X86_VMOVUPDYmr = 5530, X86_VMOVUPDYrm = 5531, X86_VMOVUPDYrr = 5532, X86_VMOVUPDYrr_REV = 5533, X86_VMOVUPDZ128mr = 5534, X86_VMOVUPDZ128mrk = 5535, X86_VMOVUPDZ128rm = 5536, X86_VMOVUPDZ128rmk = 5537, X86_VMOVUPDZ128rmkz = 5538, X86_VMOVUPDZ128rr = 5539, X86_VMOVUPDZ128rr_alt = 5540, X86_VMOVUPDZ128rrk = 5541, X86_VMOVUPDZ128rrk_alt = 5542, X86_VMOVUPDZ128rrkz = 5543, X86_VMOVUPDZ128rrkz_alt = 5544, X86_VMOVUPDZ256mr = 5545, X86_VMOVUPDZ256mrk = 5546, X86_VMOVUPDZ256rm = 5547, X86_VMOVUPDZ256rmk = 5548, X86_VMOVUPDZ256rmkz = 5549, X86_VMOVUPDZ256rr = 5550, X86_VMOVUPDZ256rr_alt = 5551, X86_VMOVUPDZ256rrk = 5552, X86_VMOVUPDZ256rrk_alt = 5553, X86_VMOVUPDZ256rrkz = 5554, X86_VMOVUPDZ256rrkz_alt = 5555, X86_VMOVUPDZmr = 5556, X86_VMOVUPDZmrk = 5557, X86_VMOVUPDZrm = 5558, X86_VMOVUPDZrmk = 5559, X86_VMOVUPDZrmkz = 5560, X86_VMOVUPDZrr = 5561, X86_VMOVUPDZrr_alt = 5562, X86_VMOVUPDZrrk = 5563, X86_VMOVUPDZrrk_alt = 5564, X86_VMOVUPDZrrkz = 5565, X86_VMOVUPDZrrkz_alt = 5566, X86_VMOVUPDmr = 5567, X86_VMOVUPDrm = 5568, X86_VMOVUPDrr = 5569, X86_VMOVUPDrr_REV = 5570, X86_VMOVUPSYmr = 5571, X86_VMOVUPSYrm = 5572, X86_VMOVUPSYrr = 5573, X86_VMOVUPSYrr_REV = 5574, X86_VMOVUPSZ128mr = 5575, X86_VMOVUPSZ128mrk = 5576, X86_VMOVUPSZ128rm = 5577, X86_VMOVUPSZ128rmk = 5578, X86_VMOVUPSZ128rmkz = 5579, X86_VMOVUPSZ128rr = 5580, X86_VMOVUPSZ128rr_alt = 5581, X86_VMOVUPSZ128rrk = 5582, X86_VMOVUPSZ128rrk_alt = 5583, X86_VMOVUPSZ128rrkz = 5584, X86_VMOVUPSZ128rrkz_alt = 5585, X86_VMOVUPSZ256mr = 5586, X86_VMOVUPSZ256mrk = 5587, X86_VMOVUPSZ256rm = 5588, X86_VMOVUPSZ256rmk = 5589, X86_VMOVUPSZ256rmkz = 5590, X86_VMOVUPSZ256rr = 5591, X86_VMOVUPSZ256rr_alt = 5592, X86_VMOVUPSZ256rrk = 5593, X86_VMOVUPSZ256rrk_alt = 5594, X86_VMOVUPSZ256rrkz = 5595, X86_VMOVUPSZ256rrkz_alt = 5596, X86_VMOVUPSZmr = 5597, X86_VMOVUPSZmrk = 5598, X86_VMOVUPSZrm = 5599, X86_VMOVUPSZrmk = 5600, X86_VMOVUPSZrmkz = 5601, X86_VMOVUPSZrr = 5602, X86_VMOVUPSZrr_alt = 5603, X86_VMOVUPSZrrk = 5604, X86_VMOVUPSZrrk_alt = 5605, X86_VMOVUPSZrrkz = 5606, X86_VMOVUPSZrrkz_alt = 5607, X86_VMOVUPSmr = 5608, X86_VMOVUPSrm = 5609, X86_VMOVUPSrr = 5610, X86_VMOVUPSrr_REV = 5611, X86_VMOVZPQILo2PQIZrm = 5612, X86_VMOVZPQILo2PQIZrr = 5613, X86_VMOVZPQILo2PQIrm = 5614, X86_VMOVZPQILo2PQIrr = 5615, X86_VMOVZQI2PQIrm = 5616, X86_VMOVZQI2PQIrr = 5617, X86_VMPSADBWYrmi = 5618, X86_VMPSADBWYrri = 5619, X86_VMPSADBWrmi = 5620, X86_VMPSADBWrri = 5621, X86_VMPTRLDm = 5622, X86_VMPTRSTm = 5623, X86_VMREAD32rm = 5624, X86_VMREAD32rr = 5625, X86_VMREAD64rm = 5626, X86_VMREAD64rr = 5627, X86_VMRESUME = 5628, X86_VMRUN32 = 5629, X86_VMRUN64 = 5630, X86_VMSAVE32 = 5631, X86_VMSAVE64 = 5632, X86_VMULPDYrm = 5633, X86_VMULPDYrr = 5634, X86_VMULPDZ128rm = 5635, X86_VMULPDZ128rmb = 5636, X86_VMULPDZ128rmbk = 5637, X86_VMULPDZ128rmbkz = 5638, X86_VMULPDZ128rmk = 5639, X86_VMULPDZ128rmkz = 5640, X86_VMULPDZ128rr = 5641, X86_VMULPDZ128rrk = 5642, X86_VMULPDZ128rrkz = 5643, X86_VMULPDZ256rm = 5644, X86_VMULPDZ256rmb = 5645, X86_VMULPDZ256rmbk = 5646, X86_VMULPDZ256rmbkz = 5647, X86_VMULPDZ256rmk = 5648, X86_VMULPDZ256rmkz = 5649, X86_VMULPDZ256rr = 5650, X86_VMULPDZ256rrk = 5651, X86_VMULPDZ256rrkz = 5652, X86_VMULPDZrb = 5653, X86_VMULPDZrbk = 5654, X86_VMULPDZrbkz = 5655, X86_VMULPDZrm = 5656, X86_VMULPDZrmb = 5657, X86_VMULPDZrmbk = 5658, X86_VMULPDZrmbkz = 5659, X86_VMULPDZrmk = 5660, X86_VMULPDZrmkz = 5661, X86_VMULPDZrr = 5662, X86_VMULPDZrrk = 5663, X86_VMULPDZrrkz = 5664, X86_VMULPDrm = 5665, X86_VMULPDrr = 5666, X86_VMULPSYrm = 5667, X86_VMULPSYrr = 5668, X86_VMULPSZ128rm = 5669, X86_VMULPSZ128rmb = 5670, X86_VMULPSZ128rmbk = 5671, X86_VMULPSZ128rmbkz = 5672, X86_VMULPSZ128rmk = 5673, X86_VMULPSZ128rmkz = 5674, X86_VMULPSZ128rr = 5675, X86_VMULPSZ128rrk = 5676, X86_VMULPSZ128rrkz = 5677, X86_VMULPSZ256rm = 5678, X86_VMULPSZ256rmb = 5679, X86_VMULPSZ256rmbk = 5680, X86_VMULPSZ256rmbkz = 5681, X86_VMULPSZ256rmk = 5682, X86_VMULPSZ256rmkz = 5683, X86_VMULPSZ256rr = 5684, X86_VMULPSZ256rrk = 5685, X86_VMULPSZ256rrkz = 5686, X86_VMULPSZrb = 5687, X86_VMULPSZrbk = 5688, X86_VMULPSZrbkz = 5689, X86_VMULPSZrm = 5690, X86_VMULPSZrmb = 5691, X86_VMULPSZrmbk = 5692, X86_VMULPSZrmbkz = 5693, X86_VMULPSZrmk = 5694, X86_VMULPSZrmkz = 5695, X86_VMULPSZrr = 5696, X86_VMULPSZrrk = 5697, X86_VMULPSZrrkz = 5698, X86_VMULPSrm = 5699, X86_VMULPSrr = 5700, X86_VMULSDZrm = 5701, X86_VMULSDZrm_Int = 5702, X86_VMULSDZrm_Intk = 5703, X86_VMULSDZrm_Intkz = 5704, X86_VMULSDZrr = 5705, X86_VMULSDZrr_Int = 5706, X86_VMULSDZrr_Intk = 5707, X86_VMULSDZrr_Intkz = 5708, X86_VMULSDZrrb = 5709, X86_VMULSDZrrbk = 5710, X86_VMULSDZrrbkz = 5711, X86_VMULSDrm = 5712, X86_VMULSDrm_Int = 5713, X86_VMULSDrr = 5714, X86_VMULSDrr_Int = 5715, X86_VMULSSZrm = 5716, X86_VMULSSZrm_Int = 5717, X86_VMULSSZrm_Intk = 5718, X86_VMULSSZrm_Intkz = 5719, X86_VMULSSZrr = 5720, X86_VMULSSZrr_Int = 5721, X86_VMULSSZrr_Intk = 5722, X86_VMULSSZrr_Intkz = 5723, X86_VMULSSZrrb = 5724, X86_VMULSSZrrbk = 5725, X86_VMULSSZrrbkz = 5726, X86_VMULSSrm = 5727, X86_VMULSSrm_Int = 5728, X86_VMULSSrr = 5729, X86_VMULSSrr_Int = 5730, X86_VMWRITE32rm = 5731, X86_VMWRITE32rr = 5732, X86_VMWRITE64rm = 5733, X86_VMWRITE64rr = 5734, X86_VMXOFF = 5735, X86_VMXON = 5736, X86_VORPDYrm = 5737, X86_VORPDYrr = 5738, X86_VORPDrm = 5739, X86_VORPDrr = 5740, X86_VORPSYrm = 5741, X86_VORPSYrr = 5742, X86_VORPSrm = 5743, X86_VORPSrr = 5744, X86_VPABSBrm128 = 5745, X86_VPABSBrm256 = 5746, X86_VPABSBrr128 = 5747, X86_VPABSBrr256 = 5748, X86_VPABSDZrm = 5749, X86_VPABSDZrmb = 5750, X86_VPABSDZrmbk = 5751, X86_VPABSDZrmbkz = 5752, X86_VPABSDZrmk = 5753, X86_VPABSDZrmkz = 5754, X86_VPABSDZrr = 5755, X86_VPABSDZrrk = 5756, X86_VPABSDZrrkz = 5757, X86_VPABSDrm128 = 5758, X86_VPABSDrm256 = 5759, X86_VPABSDrr128 = 5760, X86_VPABSDrr256 = 5761, X86_VPABSQZrm = 5762, X86_VPABSQZrmb = 5763, X86_VPABSQZrmbk = 5764, X86_VPABSQZrmbkz = 5765, X86_VPABSQZrmk = 5766, X86_VPABSQZrmkz = 5767, X86_VPABSQZrr = 5768, X86_VPABSQZrrk = 5769, X86_VPABSQZrrkz = 5770, X86_VPABSWrm128 = 5771, X86_VPABSWrm256 = 5772, X86_VPABSWrr128 = 5773, X86_VPABSWrr256 = 5774, X86_VPACKSSDWYrm = 5775, X86_VPACKSSDWYrr = 5776, X86_VPACKSSDWrm = 5777, X86_VPACKSSDWrr = 5778, X86_VPACKSSWBYrm = 5779, X86_VPACKSSWBYrr = 5780, X86_VPACKSSWBrm = 5781, X86_VPACKSSWBrr = 5782, X86_VPACKUSDWYrm = 5783, X86_VPACKUSDWYrr = 5784, X86_VPACKUSDWrm = 5785, X86_VPACKUSDWrr = 5786, X86_VPACKUSWBYrm = 5787, X86_VPACKUSWBYrr = 5788, X86_VPACKUSWBrm = 5789, X86_VPACKUSWBrr = 5790, X86_VPADDBYrm = 5791, X86_VPADDBYrr = 5792, X86_VPADDBZ128rm = 5793, X86_VPADDBZ128rmk = 5794, X86_VPADDBZ128rmkz = 5795, X86_VPADDBZ128rr = 5796, X86_VPADDBZ128rrk = 5797, X86_VPADDBZ128rrkz = 5798, X86_VPADDBZ256rm = 5799, X86_VPADDBZ256rmk = 5800, X86_VPADDBZ256rmkz = 5801, X86_VPADDBZ256rr = 5802, X86_VPADDBZ256rrk = 5803, X86_VPADDBZ256rrkz = 5804, X86_VPADDBZrm = 5805, X86_VPADDBZrmk = 5806, X86_VPADDBZrmkz = 5807, X86_VPADDBZrr = 5808, X86_VPADDBZrrk = 5809, X86_VPADDBZrrkz = 5810, X86_VPADDBrm = 5811, X86_VPADDBrr = 5812, X86_VPADDDYrm = 5813, X86_VPADDDYrr = 5814, X86_VPADDDZ128rm = 5815, X86_VPADDDZ128rmb = 5816, X86_VPADDDZ128rmbk = 5817, X86_VPADDDZ128rmbkz = 5818, X86_VPADDDZ128rmk = 5819, X86_VPADDDZ128rmkz = 5820, X86_VPADDDZ128rr = 5821, X86_VPADDDZ128rrk = 5822, X86_VPADDDZ128rrkz = 5823, X86_VPADDDZ256rm = 5824, X86_VPADDDZ256rmb = 5825, X86_VPADDDZ256rmbk = 5826, X86_VPADDDZ256rmbkz = 5827, X86_VPADDDZ256rmk = 5828, X86_VPADDDZ256rmkz = 5829, X86_VPADDDZ256rr = 5830, X86_VPADDDZ256rrk = 5831, X86_VPADDDZ256rrkz = 5832, X86_VPADDDZrm = 5833, X86_VPADDDZrmb = 5834, X86_VPADDDZrmbk = 5835, X86_VPADDDZrmbkz = 5836, X86_VPADDDZrmk = 5837, X86_VPADDDZrmkz = 5838, X86_VPADDDZrr = 5839, X86_VPADDDZrrk = 5840, X86_VPADDDZrrkz = 5841, X86_VPADDDrm = 5842, X86_VPADDDrr = 5843, X86_VPADDQYrm = 5844, X86_VPADDQYrr = 5845, X86_VPADDQZ128rm = 5846, X86_VPADDQZ128rmb = 5847, X86_VPADDQZ128rmbk = 5848, X86_VPADDQZ128rmbkz = 5849, X86_VPADDQZ128rmk = 5850, X86_VPADDQZ128rmkz = 5851, X86_VPADDQZ128rr = 5852, X86_VPADDQZ128rrk = 5853, X86_VPADDQZ128rrkz = 5854, X86_VPADDQZ256rm = 5855, X86_VPADDQZ256rmb = 5856, X86_VPADDQZ256rmbk = 5857, X86_VPADDQZ256rmbkz = 5858, X86_VPADDQZ256rmk = 5859, X86_VPADDQZ256rmkz = 5860, X86_VPADDQZ256rr = 5861, X86_VPADDQZ256rrk = 5862, X86_VPADDQZ256rrkz = 5863, X86_VPADDQZrm = 5864, X86_VPADDQZrmb = 5865, X86_VPADDQZrmbk = 5866, X86_VPADDQZrmbkz = 5867, X86_VPADDQZrmk = 5868, X86_VPADDQZrmkz = 5869, X86_VPADDQZrr = 5870, X86_VPADDQZrrk = 5871, X86_VPADDQZrrkz = 5872, X86_VPADDQrm = 5873, X86_VPADDQrr = 5874, X86_VPADDSBYrm = 5875, X86_VPADDSBYrr = 5876, X86_VPADDSBrm = 5877, X86_VPADDSBrr = 5878, X86_VPADDSWYrm = 5879, X86_VPADDSWYrr = 5880, X86_VPADDSWrm = 5881, X86_VPADDSWrr = 5882, X86_VPADDUSBYrm = 5883, X86_VPADDUSBYrr = 5884, X86_VPADDUSBrm = 5885, X86_VPADDUSBrr = 5886, X86_VPADDUSWYrm = 5887, X86_VPADDUSWYrr = 5888, X86_VPADDUSWrm = 5889, X86_VPADDUSWrr = 5890, X86_VPADDWYrm = 5891, X86_VPADDWYrr = 5892, X86_VPADDWZ128rm = 5893, X86_VPADDWZ128rmk = 5894, X86_VPADDWZ128rmkz = 5895, X86_VPADDWZ128rr = 5896, X86_VPADDWZ128rrk = 5897, X86_VPADDWZ128rrkz = 5898, X86_VPADDWZ256rm = 5899, X86_VPADDWZ256rmk = 5900, X86_VPADDWZ256rmkz = 5901, X86_VPADDWZ256rr = 5902, X86_VPADDWZ256rrk = 5903, X86_VPADDWZ256rrkz = 5904, X86_VPADDWZrm = 5905, X86_VPADDWZrmk = 5906, X86_VPADDWZrmkz = 5907, X86_VPADDWZrr = 5908, X86_VPADDWZrrk = 5909, X86_VPADDWZrrkz = 5910, X86_VPADDWrm = 5911, X86_VPADDWrr = 5912, X86_VPALIGNR128rm = 5913, X86_VPALIGNR128rr = 5914, X86_VPALIGNR256rm = 5915, X86_VPALIGNR256rr = 5916, X86_VPANDDZ128rm = 5917, X86_VPANDDZ128rmb = 5918, X86_VPANDDZ128rmbk = 5919, X86_VPANDDZ128rmbkz = 5920, X86_VPANDDZ128rmk = 5921, X86_VPANDDZ128rmkz = 5922, X86_VPANDDZ128rr = 5923, X86_VPANDDZ128rrk = 5924, X86_VPANDDZ128rrkz = 5925, X86_VPANDDZ256rm = 5926, X86_VPANDDZ256rmb = 5927, X86_VPANDDZ256rmbk = 5928, X86_VPANDDZ256rmbkz = 5929, X86_VPANDDZ256rmk = 5930, X86_VPANDDZ256rmkz = 5931, X86_VPANDDZ256rr = 5932, X86_VPANDDZ256rrk = 5933, X86_VPANDDZ256rrkz = 5934, X86_VPANDDZrm = 5935, X86_VPANDDZrmb = 5936, X86_VPANDDZrmbk = 5937, X86_VPANDDZrmbkz = 5938, X86_VPANDDZrmk = 5939, X86_VPANDDZrmkz = 5940, X86_VPANDDZrr = 5941, X86_VPANDDZrrk = 5942, X86_VPANDDZrrkz = 5943, X86_VPANDNDZ128rm = 5944, X86_VPANDNDZ128rmb = 5945, X86_VPANDNDZ128rmbk = 5946, X86_VPANDNDZ128rmbkz = 5947, X86_VPANDNDZ128rmk = 5948, X86_VPANDNDZ128rmkz = 5949, X86_VPANDNDZ128rr = 5950, X86_VPANDNDZ128rrk = 5951, X86_VPANDNDZ128rrkz = 5952, X86_VPANDNDZ256rm = 5953, X86_VPANDNDZ256rmb = 5954, X86_VPANDNDZ256rmbk = 5955, X86_VPANDNDZ256rmbkz = 5956, X86_VPANDNDZ256rmk = 5957, X86_VPANDNDZ256rmkz = 5958, X86_VPANDNDZ256rr = 5959, X86_VPANDNDZ256rrk = 5960, X86_VPANDNDZ256rrkz = 5961, X86_VPANDNDZrm = 5962, X86_VPANDNDZrmb = 5963, X86_VPANDNDZrmbk = 5964, X86_VPANDNDZrmbkz = 5965, X86_VPANDNDZrmk = 5966, X86_VPANDNDZrmkz = 5967, X86_VPANDNDZrr = 5968, X86_VPANDNDZrrk = 5969, X86_VPANDNDZrrkz = 5970, X86_VPANDNQZ128rm = 5971, X86_VPANDNQZ128rmb = 5972, X86_VPANDNQZ128rmbk = 5973, X86_VPANDNQZ128rmbkz = 5974, X86_VPANDNQZ128rmk = 5975, X86_VPANDNQZ128rmkz = 5976, X86_VPANDNQZ128rr = 5977, X86_VPANDNQZ128rrk = 5978, X86_VPANDNQZ128rrkz = 5979, X86_VPANDNQZ256rm = 5980, X86_VPANDNQZ256rmb = 5981, X86_VPANDNQZ256rmbk = 5982, X86_VPANDNQZ256rmbkz = 5983, X86_VPANDNQZ256rmk = 5984, X86_VPANDNQZ256rmkz = 5985, X86_VPANDNQZ256rr = 5986, X86_VPANDNQZ256rrk = 5987, X86_VPANDNQZ256rrkz = 5988, X86_VPANDNQZrm = 5989, X86_VPANDNQZrmb = 5990, X86_VPANDNQZrmbk = 5991, X86_VPANDNQZrmbkz = 5992, X86_VPANDNQZrmk = 5993, X86_VPANDNQZrmkz = 5994, X86_VPANDNQZrr = 5995, X86_VPANDNQZrrk = 5996, X86_VPANDNQZrrkz = 5997, X86_VPANDNYrm = 5998, X86_VPANDNYrr = 5999, X86_VPANDNrm = 6000, X86_VPANDNrr = 6001, X86_VPANDQZ128rm = 6002, X86_VPANDQZ128rmb = 6003, X86_VPANDQZ128rmbk = 6004, X86_VPANDQZ128rmbkz = 6005, X86_VPANDQZ128rmk = 6006, X86_VPANDQZ128rmkz = 6007, X86_VPANDQZ128rr = 6008, X86_VPANDQZ128rrk = 6009, X86_VPANDQZ128rrkz = 6010, X86_VPANDQZ256rm = 6011, X86_VPANDQZ256rmb = 6012, X86_VPANDQZ256rmbk = 6013, X86_VPANDQZ256rmbkz = 6014, X86_VPANDQZ256rmk = 6015, X86_VPANDQZ256rmkz = 6016, X86_VPANDQZ256rr = 6017, X86_VPANDQZ256rrk = 6018, X86_VPANDQZ256rrkz = 6019, X86_VPANDQZrm = 6020, X86_VPANDQZrmb = 6021, X86_VPANDQZrmbk = 6022, X86_VPANDQZrmbkz = 6023, X86_VPANDQZrmk = 6024, X86_VPANDQZrmkz = 6025, X86_VPANDQZrr = 6026, X86_VPANDQZrrk = 6027, X86_VPANDQZrrkz = 6028, X86_VPANDYrm = 6029, X86_VPANDYrr = 6030, X86_VPANDrm = 6031, X86_VPANDrr = 6032, X86_VPAVGBYrm = 6033, X86_VPAVGBYrr = 6034, X86_VPAVGBrm = 6035, X86_VPAVGBrr = 6036, X86_VPAVGWYrm = 6037, X86_VPAVGWYrr = 6038, X86_VPAVGWrm = 6039, X86_VPAVGWrr = 6040, X86_VPBLENDDYrmi = 6041, X86_VPBLENDDYrri = 6042, X86_VPBLENDDrmi = 6043, X86_VPBLENDDrri = 6044, X86_VPBLENDMBZ128rm = 6045, X86_VPBLENDMBZ128rmk = 6046, X86_VPBLENDMBZ128rmkz = 6047, X86_VPBLENDMBZ128rr = 6048, X86_VPBLENDMBZ128rrk = 6049, X86_VPBLENDMBZ128rrkz = 6050, X86_VPBLENDMBZ256rm = 6051, X86_VPBLENDMBZ256rmk = 6052, X86_VPBLENDMBZ256rmkz = 6053, X86_VPBLENDMBZ256rr = 6054, X86_VPBLENDMBZ256rrk = 6055, X86_VPBLENDMBZ256rrkz = 6056, X86_VPBLENDMBZrm = 6057, X86_VPBLENDMBZrmk = 6058, X86_VPBLENDMBZrmkz = 6059, X86_VPBLENDMBZrr = 6060, X86_VPBLENDMBZrrk = 6061, X86_VPBLENDMBZrrkz = 6062, X86_VPBLENDMDZ128rm = 6063, X86_VPBLENDMDZ128rmb = 6064, X86_VPBLENDMDZ128rmbk = 6065, X86_VPBLENDMDZ128rmk = 6066, X86_VPBLENDMDZ128rmkz = 6067, X86_VPBLENDMDZ128rr = 6068, X86_VPBLENDMDZ128rrk = 6069, X86_VPBLENDMDZ128rrkz = 6070, X86_VPBLENDMDZ256rm = 6071, X86_VPBLENDMDZ256rmb = 6072, X86_VPBLENDMDZ256rmbk = 6073, X86_VPBLENDMDZ256rmk = 6074, X86_VPBLENDMDZ256rmkz = 6075, X86_VPBLENDMDZ256rr = 6076, X86_VPBLENDMDZ256rrk = 6077, X86_VPBLENDMDZ256rrkz = 6078, X86_VPBLENDMDZrm = 6079, X86_VPBLENDMDZrmb = 6080, X86_VPBLENDMDZrmbk = 6081, X86_VPBLENDMDZrmk = 6082, X86_VPBLENDMDZrmkz = 6083, X86_VPBLENDMDZrr = 6084, X86_VPBLENDMDZrrk = 6085, X86_VPBLENDMDZrrkz = 6086, X86_VPBLENDMQZ128rm = 6087, X86_VPBLENDMQZ128rmb = 6088, X86_VPBLENDMQZ128rmbk = 6089, X86_VPBLENDMQZ128rmk = 6090, X86_VPBLENDMQZ128rmkz = 6091, X86_VPBLENDMQZ128rr = 6092, X86_VPBLENDMQZ128rrk = 6093, X86_VPBLENDMQZ128rrkz = 6094, X86_VPBLENDMQZ256rm = 6095, X86_VPBLENDMQZ256rmb = 6096, X86_VPBLENDMQZ256rmbk = 6097, X86_VPBLENDMQZ256rmk = 6098, X86_VPBLENDMQZ256rmkz = 6099, X86_VPBLENDMQZ256rr = 6100, X86_VPBLENDMQZ256rrk = 6101, X86_VPBLENDMQZ256rrkz = 6102, X86_VPBLENDMQZrm = 6103, X86_VPBLENDMQZrmb = 6104, X86_VPBLENDMQZrmbk = 6105, X86_VPBLENDMQZrmk = 6106, X86_VPBLENDMQZrmkz = 6107, X86_VPBLENDMQZrr = 6108, X86_VPBLENDMQZrrk = 6109, X86_VPBLENDMQZrrkz = 6110, X86_VPBLENDMWZ128rm = 6111, X86_VPBLENDMWZ128rmk = 6112, X86_VPBLENDMWZ128rmkz = 6113, X86_VPBLENDMWZ128rr = 6114, X86_VPBLENDMWZ128rrk = 6115, X86_VPBLENDMWZ128rrkz = 6116, X86_VPBLENDMWZ256rm = 6117, X86_VPBLENDMWZ256rmk = 6118, X86_VPBLENDMWZ256rmkz = 6119, X86_VPBLENDMWZ256rr = 6120, X86_VPBLENDMWZ256rrk = 6121, X86_VPBLENDMWZ256rrkz = 6122, X86_VPBLENDMWZrm = 6123, X86_VPBLENDMWZrmk = 6124, X86_VPBLENDMWZrmkz = 6125, X86_VPBLENDMWZrr = 6126, X86_VPBLENDMWZrrk = 6127, X86_VPBLENDMWZrrkz = 6128, X86_VPBLENDVBYrm = 6129, X86_VPBLENDVBYrr = 6130, X86_VPBLENDVBrm = 6131, X86_VPBLENDVBrr = 6132, X86_VPBLENDWYrmi = 6133, X86_VPBLENDWYrri = 6134, X86_VPBLENDWrmi = 6135, X86_VPBLENDWrri = 6136, X86_VPBROADCASTBYrm = 6137, X86_VPBROADCASTBYrr = 6138, X86_VPBROADCASTBrZ128r = 6139, X86_VPBROADCASTBrZ128rk = 6140, X86_VPBROADCASTBrZ128rkz = 6141, X86_VPBROADCASTBrZ256r = 6142, X86_VPBROADCASTBrZ256rk = 6143, X86_VPBROADCASTBrZ256rkz = 6144, X86_VPBROADCASTBrZr = 6145, X86_VPBROADCASTBrZrk = 6146, X86_VPBROADCASTBrZrkz = 6147, X86_VPBROADCASTBrm = 6148, X86_VPBROADCASTBrr = 6149, X86_VPBROADCASTDYrm = 6150, X86_VPBROADCASTDYrr = 6151, X86_VPBROADCASTDZkrm = 6152, X86_VPBROADCASTDZkrr = 6153, X86_VPBROADCASTDZrm = 6154, X86_VPBROADCASTDZrr = 6155, X86_VPBROADCASTDrZ128r = 6156, X86_VPBROADCASTDrZ128rk = 6157, X86_VPBROADCASTDrZ128rkz = 6158, X86_VPBROADCASTDrZ256r = 6159, X86_VPBROADCASTDrZ256rk = 6160, X86_VPBROADCASTDrZ256rkz = 6161, X86_VPBROADCASTDrZr = 6162, X86_VPBROADCASTDrZrk = 6163, X86_VPBROADCASTDrZrkz = 6164, X86_VPBROADCASTDrm = 6165, X86_VPBROADCASTDrr = 6166, X86_VPBROADCASTMB2QZ128rr = 6167, X86_VPBROADCASTMB2QZ256rr = 6168, X86_VPBROADCASTMB2QZrr = 6169, X86_VPBROADCASTMW2DZ128rr = 6170, X86_VPBROADCASTMW2DZ256rr = 6171, X86_VPBROADCASTMW2DZrr = 6172, X86_VPBROADCASTQYrm = 6173, X86_VPBROADCASTQYrr = 6174, X86_VPBROADCASTQZkrm = 6175, X86_VPBROADCASTQZkrr = 6176, X86_VPBROADCASTQZrm = 6177, X86_VPBROADCASTQZrr = 6178, X86_VPBROADCASTQrZ128r = 6179, X86_VPBROADCASTQrZ128rk = 6180, X86_VPBROADCASTQrZ128rkz = 6181, X86_VPBROADCASTQrZ256r = 6182, X86_VPBROADCASTQrZ256rk = 6183, X86_VPBROADCASTQrZ256rkz = 6184, X86_VPBROADCASTQrZr = 6185, X86_VPBROADCASTQrZrk = 6186, X86_VPBROADCASTQrZrkz = 6187, X86_VPBROADCASTQrm = 6188, X86_VPBROADCASTQrr = 6189, X86_VPBROADCASTWYrm = 6190, X86_VPBROADCASTWYrr = 6191, X86_VPBROADCASTWrZ128r = 6192, X86_VPBROADCASTWrZ128rk = 6193, X86_VPBROADCASTWrZ128rkz = 6194, X86_VPBROADCASTWrZ256r = 6195, X86_VPBROADCASTWrZ256rk = 6196, X86_VPBROADCASTWrZ256rkz = 6197, X86_VPBROADCASTWrZr = 6198, X86_VPBROADCASTWrZrk = 6199, X86_VPBROADCASTWrZrkz = 6200, X86_VPBROADCASTWrm = 6201, X86_VPBROADCASTWrr = 6202, X86_VPCLMULQDQrm = 6203, X86_VPCLMULQDQrr = 6204, X86_VPCMOVmr = 6205, X86_VPCMOVmrY = 6206, X86_VPCMOVrm = 6207, X86_VPCMOVrmY = 6208, X86_VPCMOVrr = 6209, X86_VPCMOVrrY = 6210, X86_VPCMPBZ128rmi = 6211, X86_VPCMPBZ128rmi_alt = 6212, X86_VPCMPBZ128rmik = 6213, X86_VPCMPBZ128rmik_alt = 6214, X86_VPCMPBZ128rri = 6215, X86_VPCMPBZ128rri_alt = 6216, X86_VPCMPBZ128rrik = 6217, X86_VPCMPBZ128rrik_alt = 6218, X86_VPCMPBZ256rmi = 6219, X86_VPCMPBZ256rmi_alt = 6220, X86_VPCMPBZ256rmik = 6221, X86_VPCMPBZ256rmik_alt = 6222, X86_VPCMPBZ256rri = 6223, X86_VPCMPBZ256rri_alt = 6224, X86_VPCMPBZ256rrik = 6225, X86_VPCMPBZ256rrik_alt = 6226, X86_VPCMPBZrmi = 6227, X86_VPCMPBZrmi_alt = 6228, X86_VPCMPBZrmik = 6229, X86_VPCMPBZrmik_alt = 6230, X86_VPCMPBZrri = 6231, X86_VPCMPBZrri_alt = 6232, X86_VPCMPBZrrik = 6233, X86_VPCMPBZrrik_alt = 6234, X86_VPCMPDZ128rmi = 6235, X86_VPCMPDZ128rmi_alt = 6236, X86_VPCMPDZ128rmib = 6237, X86_VPCMPDZ128rmib_alt = 6238, X86_VPCMPDZ128rmibk = 6239, X86_VPCMPDZ128rmibk_alt = 6240, X86_VPCMPDZ128rmik = 6241, X86_VPCMPDZ128rmik_alt = 6242, X86_VPCMPDZ128rri = 6243, X86_VPCMPDZ128rri_alt = 6244, X86_VPCMPDZ128rrik = 6245, X86_VPCMPDZ128rrik_alt = 6246, X86_VPCMPDZ256rmi = 6247, X86_VPCMPDZ256rmi_alt = 6248, X86_VPCMPDZ256rmib = 6249, X86_VPCMPDZ256rmib_alt = 6250, X86_VPCMPDZ256rmibk = 6251, X86_VPCMPDZ256rmibk_alt = 6252, X86_VPCMPDZ256rmik = 6253, X86_VPCMPDZ256rmik_alt = 6254, X86_VPCMPDZ256rri = 6255, X86_VPCMPDZ256rri_alt = 6256, X86_VPCMPDZ256rrik = 6257, X86_VPCMPDZ256rrik_alt = 6258, X86_VPCMPDZrmi = 6259, X86_VPCMPDZrmi_alt = 6260, X86_VPCMPDZrmib = 6261, X86_VPCMPDZrmib_alt = 6262, X86_VPCMPDZrmibk = 6263, X86_VPCMPDZrmibk_alt = 6264, X86_VPCMPDZrmik = 6265, X86_VPCMPDZrmik_alt = 6266, X86_VPCMPDZrri = 6267, X86_VPCMPDZrri_alt = 6268, X86_VPCMPDZrrik = 6269, X86_VPCMPDZrrik_alt = 6270, X86_VPCMPEQBYrm = 6271, X86_VPCMPEQBYrr = 6272, X86_VPCMPEQBZ128rm = 6273, X86_VPCMPEQBZ128rmk = 6274, X86_VPCMPEQBZ128rr = 6275, X86_VPCMPEQBZ128rrk = 6276, X86_VPCMPEQBZ256rm = 6277, X86_VPCMPEQBZ256rmk = 6278, X86_VPCMPEQBZ256rr = 6279, X86_VPCMPEQBZ256rrk = 6280, X86_VPCMPEQBZrm = 6281, X86_VPCMPEQBZrmk = 6282, X86_VPCMPEQBZrr = 6283, X86_VPCMPEQBZrrk = 6284, X86_VPCMPEQBrm = 6285, X86_VPCMPEQBrr = 6286, X86_VPCMPEQDYrm = 6287, X86_VPCMPEQDYrr = 6288, X86_VPCMPEQDZ128rm = 6289, X86_VPCMPEQDZ128rmb = 6290, X86_VPCMPEQDZ128rmbk = 6291, X86_VPCMPEQDZ128rmk = 6292, X86_VPCMPEQDZ128rr = 6293, X86_VPCMPEQDZ128rrk = 6294, X86_VPCMPEQDZ256rm = 6295, X86_VPCMPEQDZ256rmb = 6296, X86_VPCMPEQDZ256rmbk = 6297, X86_VPCMPEQDZ256rmk = 6298, X86_VPCMPEQDZ256rr = 6299, X86_VPCMPEQDZ256rrk = 6300, X86_VPCMPEQDZrm = 6301, X86_VPCMPEQDZrmb = 6302, X86_VPCMPEQDZrmbk = 6303, X86_VPCMPEQDZrmk = 6304, X86_VPCMPEQDZrr = 6305, X86_VPCMPEQDZrrk = 6306, X86_VPCMPEQDrm = 6307, X86_VPCMPEQDrr = 6308, X86_VPCMPEQQYrm = 6309, X86_VPCMPEQQYrr = 6310, X86_VPCMPEQQZ128rm = 6311, X86_VPCMPEQQZ128rmb = 6312, X86_VPCMPEQQZ128rmbk = 6313, X86_VPCMPEQQZ128rmk = 6314, X86_VPCMPEQQZ128rr = 6315, X86_VPCMPEQQZ128rrk = 6316, X86_VPCMPEQQZ256rm = 6317, X86_VPCMPEQQZ256rmb = 6318, X86_VPCMPEQQZ256rmbk = 6319, X86_VPCMPEQQZ256rmk = 6320, X86_VPCMPEQQZ256rr = 6321, X86_VPCMPEQQZ256rrk = 6322, X86_VPCMPEQQZrm = 6323, X86_VPCMPEQQZrmb = 6324, X86_VPCMPEQQZrmbk = 6325, X86_VPCMPEQQZrmk = 6326, X86_VPCMPEQQZrr = 6327, X86_VPCMPEQQZrrk = 6328, X86_VPCMPEQQrm = 6329, X86_VPCMPEQQrr = 6330, X86_VPCMPEQWYrm = 6331, X86_VPCMPEQWYrr = 6332, X86_VPCMPEQWZ128rm = 6333, X86_VPCMPEQWZ128rmk = 6334, X86_VPCMPEQWZ128rr = 6335, X86_VPCMPEQWZ128rrk = 6336, X86_VPCMPEQWZ256rm = 6337, X86_VPCMPEQWZ256rmk = 6338, X86_VPCMPEQWZ256rr = 6339, X86_VPCMPEQWZ256rrk = 6340, X86_VPCMPEQWZrm = 6341, X86_VPCMPEQWZrmk = 6342, X86_VPCMPEQWZrr = 6343, X86_VPCMPEQWZrrk = 6344, X86_VPCMPEQWrm = 6345, X86_VPCMPEQWrr = 6346, X86_VPCMPESTRIMEM = 6347, X86_VPCMPESTRIREG = 6348, X86_VPCMPESTRIrm = 6349, X86_VPCMPESTRIrr = 6350, X86_VPCMPESTRM128MEM = 6351, X86_VPCMPESTRM128REG = 6352, X86_VPCMPESTRM128rm = 6353, X86_VPCMPESTRM128rr = 6354, X86_VPCMPGTBYrm = 6355, X86_VPCMPGTBYrr = 6356, X86_VPCMPGTBZ128rm = 6357, X86_VPCMPGTBZ128rmk = 6358, X86_VPCMPGTBZ128rr = 6359, X86_VPCMPGTBZ128rrk = 6360, X86_VPCMPGTBZ256rm = 6361, X86_VPCMPGTBZ256rmk = 6362, X86_VPCMPGTBZ256rr = 6363, X86_VPCMPGTBZ256rrk = 6364, X86_VPCMPGTBZrm = 6365, X86_VPCMPGTBZrmk = 6366, X86_VPCMPGTBZrr = 6367, X86_VPCMPGTBZrrk = 6368, X86_VPCMPGTBrm = 6369, X86_VPCMPGTBrr = 6370, X86_VPCMPGTDYrm = 6371, X86_VPCMPGTDYrr = 6372, X86_VPCMPGTDZ128rm = 6373, X86_VPCMPGTDZ128rmb = 6374, X86_VPCMPGTDZ128rmbk = 6375, X86_VPCMPGTDZ128rmk = 6376, X86_VPCMPGTDZ128rr = 6377, X86_VPCMPGTDZ128rrk = 6378, X86_VPCMPGTDZ256rm = 6379, X86_VPCMPGTDZ256rmb = 6380, X86_VPCMPGTDZ256rmbk = 6381, X86_VPCMPGTDZ256rmk = 6382, X86_VPCMPGTDZ256rr = 6383, X86_VPCMPGTDZ256rrk = 6384, X86_VPCMPGTDZrm = 6385, X86_VPCMPGTDZrmb = 6386, X86_VPCMPGTDZrmbk = 6387, X86_VPCMPGTDZrmk = 6388, X86_VPCMPGTDZrr = 6389, X86_VPCMPGTDZrrk = 6390, X86_VPCMPGTDrm = 6391, X86_VPCMPGTDrr = 6392, X86_VPCMPGTQYrm = 6393, X86_VPCMPGTQYrr = 6394, X86_VPCMPGTQZ128rm = 6395, X86_VPCMPGTQZ128rmb = 6396, X86_VPCMPGTQZ128rmbk = 6397, X86_VPCMPGTQZ128rmk = 6398, X86_VPCMPGTQZ128rr = 6399, X86_VPCMPGTQZ128rrk = 6400, X86_VPCMPGTQZ256rm = 6401, X86_VPCMPGTQZ256rmb = 6402, X86_VPCMPGTQZ256rmbk = 6403, X86_VPCMPGTQZ256rmk = 6404, X86_VPCMPGTQZ256rr = 6405, X86_VPCMPGTQZ256rrk = 6406, X86_VPCMPGTQZrm = 6407, X86_VPCMPGTQZrmb = 6408, X86_VPCMPGTQZrmbk = 6409, X86_VPCMPGTQZrmk = 6410, X86_VPCMPGTQZrr = 6411, X86_VPCMPGTQZrrk = 6412, X86_VPCMPGTQrm = 6413, X86_VPCMPGTQrr = 6414, X86_VPCMPGTWYrm = 6415, X86_VPCMPGTWYrr = 6416, X86_VPCMPGTWZ128rm = 6417, X86_VPCMPGTWZ128rmk = 6418, X86_VPCMPGTWZ128rr = 6419, X86_VPCMPGTWZ128rrk = 6420, X86_VPCMPGTWZ256rm = 6421, X86_VPCMPGTWZ256rmk = 6422, X86_VPCMPGTWZ256rr = 6423, X86_VPCMPGTWZ256rrk = 6424, X86_VPCMPGTWZrm = 6425, X86_VPCMPGTWZrmk = 6426, X86_VPCMPGTWZrr = 6427, X86_VPCMPGTWZrrk = 6428, X86_VPCMPGTWrm = 6429, X86_VPCMPGTWrr = 6430, X86_VPCMPISTRIMEM = 6431, X86_VPCMPISTRIREG = 6432, X86_VPCMPISTRIrm = 6433, X86_VPCMPISTRIrr = 6434, X86_VPCMPISTRM128MEM = 6435, X86_VPCMPISTRM128REG = 6436, X86_VPCMPISTRM128rm = 6437, X86_VPCMPISTRM128rr = 6438, X86_VPCMPQZ128rmi = 6439, X86_VPCMPQZ128rmi_alt = 6440, X86_VPCMPQZ128rmib = 6441, X86_VPCMPQZ128rmib_alt = 6442, X86_VPCMPQZ128rmibk = 6443, X86_VPCMPQZ128rmibk_alt = 6444, X86_VPCMPQZ128rmik = 6445, X86_VPCMPQZ128rmik_alt = 6446, X86_VPCMPQZ128rri = 6447, X86_VPCMPQZ128rri_alt = 6448, X86_VPCMPQZ128rrik = 6449, X86_VPCMPQZ128rrik_alt = 6450, X86_VPCMPQZ256rmi = 6451, X86_VPCMPQZ256rmi_alt = 6452, X86_VPCMPQZ256rmib = 6453, X86_VPCMPQZ256rmib_alt = 6454, X86_VPCMPQZ256rmibk = 6455, X86_VPCMPQZ256rmibk_alt = 6456, X86_VPCMPQZ256rmik = 6457, X86_VPCMPQZ256rmik_alt = 6458, X86_VPCMPQZ256rri = 6459, X86_VPCMPQZ256rri_alt = 6460, X86_VPCMPQZ256rrik = 6461, X86_VPCMPQZ256rrik_alt = 6462, X86_VPCMPQZrmi = 6463, X86_VPCMPQZrmi_alt = 6464, X86_VPCMPQZrmib = 6465, X86_VPCMPQZrmib_alt = 6466, X86_VPCMPQZrmibk = 6467, X86_VPCMPQZrmibk_alt = 6468, X86_VPCMPQZrmik = 6469, X86_VPCMPQZrmik_alt = 6470, X86_VPCMPQZrri = 6471, X86_VPCMPQZrri_alt = 6472, X86_VPCMPQZrrik = 6473, X86_VPCMPQZrrik_alt = 6474, X86_VPCMPUBZ128rmi = 6475, X86_VPCMPUBZ128rmi_alt = 6476, X86_VPCMPUBZ128rmik = 6477, X86_VPCMPUBZ128rmik_alt = 6478, X86_VPCMPUBZ128rri = 6479, X86_VPCMPUBZ128rri_alt = 6480, X86_VPCMPUBZ128rrik = 6481, X86_VPCMPUBZ128rrik_alt = 6482, X86_VPCMPUBZ256rmi = 6483, X86_VPCMPUBZ256rmi_alt = 6484, X86_VPCMPUBZ256rmik = 6485, X86_VPCMPUBZ256rmik_alt = 6486, X86_VPCMPUBZ256rri = 6487, X86_VPCMPUBZ256rri_alt = 6488, X86_VPCMPUBZ256rrik = 6489, X86_VPCMPUBZ256rrik_alt = 6490, X86_VPCMPUBZrmi = 6491, X86_VPCMPUBZrmi_alt = 6492, X86_VPCMPUBZrmik = 6493, X86_VPCMPUBZrmik_alt = 6494, X86_VPCMPUBZrri = 6495, X86_VPCMPUBZrri_alt = 6496, X86_VPCMPUBZrrik = 6497, X86_VPCMPUBZrrik_alt = 6498, X86_VPCMPUDZ128rmi = 6499, X86_VPCMPUDZ128rmi_alt = 6500, X86_VPCMPUDZ128rmib = 6501, X86_VPCMPUDZ128rmib_alt = 6502, X86_VPCMPUDZ128rmibk = 6503, X86_VPCMPUDZ128rmibk_alt = 6504, X86_VPCMPUDZ128rmik = 6505, X86_VPCMPUDZ128rmik_alt = 6506, X86_VPCMPUDZ128rri = 6507, X86_VPCMPUDZ128rri_alt = 6508, X86_VPCMPUDZ128rrik = 6509, X86_VPCMPUDZ128rrik_alt = 6510, X86_VPCMPUDZ256rmi = 6511, X86_VPCMPUDZ256rmi_alt = 6512, X86_VPCMPUDZ256rmib = 6513, X86_VPCMPUDZ256rmib_alt = 6514, X86_VPCMPUDZ256rmibk = 6515, X86_VPCMPUDZ256rmibk_alt = 6516, X86_VPCMPUDZ256rmik = 6517, X86_VPCMPUDZ256rmik_alt = 6518, X86_VPCMPUDZ256rri = 6519, X86_VPCMPUDZ256rri_alt = 6520, X86_VPCMPUDZ256rrik = 6521, X86_VPCMPUDZ256rrik_alt = 6522, X86_VPCMPUDZrmi = 6523, X86_VPCMPUDZrmi_alt = 6524, X86_VPCMPUDZrmib = 6525, X86_VPCMPUDZrmib_alt = 6526, X86_VPCMPUDZrmibk = 6527, X86_VPCMPUDZrmibk_alt = 6528, X86_VPCMPUDZrmik = 6529, X86_VPCMPUDZrmik_alt = 6530, X86_VPCMPUDZrri = 6531, X86_VPCMPUDZrri_alt = 6532, X86_VPCMPUDZrrik = 6533, X86_VPCMPUDZrrik_alt = 6534, X86_VPCMPUQZ128rmi = 6535, X86_VPCMPUQZ128rmi_alt = 6536, X86_VPCMPUQZ128rmib = 6537, X86_VPCMPUQZ128rmib_alt = 6538, X86_VPCMPUQZ128rmibk = 6539, X86_VPCMPUQZ128rmibk_alt = 6540, X86_VPCMPUQZ128rmik = 6541, X86_VPCMPUQZ128rmik_alt = 6542, X86_VPCMPUQZ128rri = 6543, X86_VPCMPUQZ128rri_alt = 6544, X86_VPCMPUQZ128rrik = 6545, X86_VPCMPUQZ128rrik_alt = 6546, X86_VPCMPUQZ256rmi = 6547, X86_VPCMPUQZ256rmi_alt = 6548, X86_VPCMPUQZ256rmib = 6549, X86_VPCMPUQZ256rmib_alt = 6550, X86_VPCMPUQZ256rmibk = 6551, X86_VPCMPUQZ256rmibk_alt = 6552, X86_VPCMPUQZ256rmik = 6553, X86_VPCMPUQZ256rmik_alt = 6554, X86_VPCMPUQZ256rri = 6555, X86_VPCMPUQZ256rri_alt = 6556, X86_VPCMPUQZ256rrik = 6557, X86_VPCMPUQZ256rrik_alt = 6558, X86_VPCMPUQZrmi = 6559, X86_VPCMPUQZrmi_alt = 6560, X86_VPCMPUQZrmib = 6561, X86_VPCMPUQZrmib_alt = 6562, X86_VPCMPUQZrmibk = 6563, X86_VPCMPUQZrmibk_alt = 6564, X86_VPCMPUQZrmik = 6565, X86_VPCMPUQZrmik_alt = 6566, X86_VPCMPUQZrri = 6567, X86_VPCMPUQZrri_alt = 6568, X86_VPCMPUQZrrik = 6569, X86_VPCMPUQZrrik_alt = 6570, X86_VPCMPUWZ128rmi = 6571, X86_VPCMPUWZ128rmi_alt = 6572, X86_VPCMPUWZ128rmik = 6573, X86_VPCMPUWZ128rmik_alt = 6574, X86_VPCMPUWZ128rri = 6575, X86_VPCMPUWZ128rri_alt = 6576, X86_VPCMPUWZ128rrik = 6577, X86_VPCMPUWZ128rrik_alt = 6578, X86_VPCMPUWZ256rmi = 6579, X86_VPCMPUWZ256rmi_alt = 6580, X86_VPCMPUWZ256rmik = 6581, X86_VPCMPUWZ256rmik_alt = 6582, X86_VPCMPUWZ256rri = 6583, X86_VPCMPUWZ256rri_alt = 6584, X86_VPCMPUWZ256rrik = 6585, X86_VPCMPUWZ256rrik_alt = 6586, X86_VPCMPUWZrmi = 6587, X86_VPCMPUWZrmi_alt = 6588, X86_VPCMPUWZrmik = 6589, X86_VPCMPUWZrmik_alt = 6590, X86_VPCMPUWZrri = 6591, X86_VPCMPUWZrri_alt = 6592, X86_VPCMPUWZrrik = 6593, X86_VPCMPUWZrrik_alt = 6594, X86_VPCMPWZ128rmi = 6595, X86_VPCMPWZ128rmi_alt = 6596, X86_VPCMPWZ128rmik = 6597, X86_VPCMPWZ128rmik_alt = 6598, X86_VPCMPWZ128rri = 6599, X86_VPCMPWZ128rri_alt = 6600, X86_VPCMPWZ128rrik = 6601, X86_VPCMPWZ128rrik_alt = 6602, X86_VPCMPWZ256rmi = 6603, X86_VPCMPWZ256rmi_alt = 6604, X86_VPCMPWZ256rmik = 6605, X86_VPCMPWZ256rmik_alt = 6606, X86_VPCMPWZ256rri = 6607, X86_VPCMPWZ256rri_alt = 6608, X86_VPCMPWZ256rrik = 6609, X86_VPCMPWZ256rrik_alt = 6610, X86_VPCMPWZrmi = 6611, X86_VPCMPWZrmi_alt = 6612, X86_VPCMPWZrmik = 6613, X86_VPCMPWZrmik_alt = 6614, X86_VPCMPWZrri = 6615, X86_VPCMPWZrri_alt = 6616, X86_VPCMPWZrrik = 6617, X86_VPCMPWZrrik_alt = 6618, X86_VPCOMBmi = 6619, X86_VPCOMBmi_alt = 6620, X86_VPCOMBri = 6621, X86_VPCOMBri_alt = 6622, X86_VPCOMDmi = 6623, X86_VPCOMDmi_alt = 6624, X86_VPCOMDri = 6625, X86_VPCOMDri_alt = 6626, X86_VPCOMPRESSDZ128mrk = 6627, X86_VPCOMPRESSDZ128rrk = 6628, X86_VPCOMPRESSDZ128rrkz = 6629, X86_VPCOMPRESSDZ256mrk = 6630, X86_VPCOMPRESSDZ256rrk = 6631, X86_VPCOMPRESSDZ256rrkz = 6632, X86_VPCOMPRESSDZmrk = 6633, X86_VPCOMPRESSDZrrk = 6634, X86_VPCOMPRESSDZrrkz = 6635, X86_VPCOMPRESSQZ128mrk = 6636, X86_VPCOMPRESSQZ128rrk = 6637, X86_VPCOMPRESSQZ128rrkz = 6638, X86_VPCOMPRESSQZ256mrk = 6639, X86_VPCOMPRESSQZ256rrk = 6640, X86_VPCOMPRESSQZ256rrkz = 6641, X86_VPCOMPRESSQZmrk = 6642, X86_VPCOMPRESSQZrrk = 6643, X86_VPCOMPRESSQZrrkz = 6644, X86_VPCOMQmi = 6645, X86_VPCOMQmi_alt = 6646, X86_VPCOMQri = 6647, X86_VPCOMQri_alt = 6648, X86_VPCOMUBmi = 6649, X86_VPCOMUBmi_alt = 6650, X86_VPCOMUBri = 6651, X86_VPCOMUBri_alt = 6652, X86_VPCOMUDmi = 6653, X86_VPCOMUDmi_alt = 6654, X86_VPCOMUDri = 6655, X86_VPCOMUDri_alt = 6656, X86_VPCOMUQmi = 6657, X86_VPCOMUQmi_alt = 6658, X86_VPCOMUQri = 6659, X86_VPCOMUQri_alt = 6660, X86_VPCOMUWmi = 6661, X86_VPCOMUWmi_alt = 6662, X86_VPCOMUWri = 6663, X86_VPCOMUWri_alt = 6664, X86_VPCOMWmi = 6665, X86_VPCOMWmi_alt = 6666, X86_VPCOMWri = 6667, X86_VPCOMWri_alt = 6668, X86_VPCONFLICTDrm = 6669, X86_VPCONFLICTDrmb = 6670, X86_VPCONFLICTDrmbk = 6671, X86_VPCONFLICTDrmbkz = 6672, X86_VPCONFLICTDrmk = 6673, X86_VPCONFLICTDrmkz = 6674, X86_VPCONFLICTDrr = 6675, X86_VPCONFLICTDrrk = 6676, X86_VPCONFLICTDrrkz = 6677, X86_VPCONFLICTQrm = 6678, X86_VPCONFLICTQrmb = 6679, X86_VPCONFLICTQrmbk = 6680, X86_VPCONFLICTQrmbkz = 6681, X86_VPCONFLICTQrmk = 6682, X86_VPCONFLICTQrmkz = 6683, X86_VPCONFLICTQrr = 6684, X86_VPCONFLICTQrrk = 6685, X86_VPCONFLICTQrrkz = 6686, X86_VPERM2F128rm = 6687, X86_VPERM2F128rr = 6688, X86_VPERM2I128rm = 6689, X86_VPERM2I128rr = 6690, X86_VPERMDYrm = 6691, X86_VPERMDYrr = 6692, X86_VPERMDZrm = 6693, X86_VPERMDZrr = 6694, X86_VPERMI2Drm = 6695, X86_VPERMI2Drmk = 6696, X86_VPERMI2Drmkz = 6697, X86_VPERMI2Drr = 6698, X86_VPERMI2Drrk = 6699, X86_VPERMI2Drrkz = 6700, X86_VPERMI2PDrm = 6701, X86_VPERMI2PDrmk = 6702, X86_VPERMI2PDrmkz = 6703, X86_VPERMI2PDrr = 6704, X86_VPERMI2PDrrk = 6705, X86_VPERMI2PDrrkz = 6706, X86_VPERMI2PSrm = 6707, X86_VPERMI2PSrmk = 6708, X86_VPERMI2PSrmkz = 6709, X86_VPERMI2PSrr = 6710, X86_VPERMI2PSrrk = 6711, X86_VPERMI2PSrrkz = 6712, X86_VPERMI2Qrm = 6713, X86_VPERMI2Qrmk = 6714, X86_VPERMI2Qrmkz = 6715, X86_VPERMI2Qrr = 6716, X86_VPERMI2Qrrk = 6717, X86_VPERMI2Qrrkz = 6718, X86_VPERMIL2PDmr = 6719, X86_VPERMIL2PDmrY = 6720, X86_VPERMIL2PDrm = 6721, X86_VPERMIL2PDrmY = 6722, X86_VPERMIL2PDrr = 6723, X86_VPERMIL2PDrrY = 6724, X86_VPERMIL2PSmr = 6725, X86_VPERMIL2PSmrY = 6726, X86_VPERMIL2PSrm = 6727, X86_VPERMIL2PSrmY = 6728, X86_VPERMIL2PSrr = 6729, X86_VPERMIL2PSrrY = 6730, X86_VPERMILPDYmi = 6731, X86_VPERMILPDYri = 6732, X86_VPERMILPDYrm = 6733, X86_VPERMILPDYrr = 6734, X86_VPERMILPDZmi = 6735, X86_VPERMILPDZri = 6736, X86_VPERMILPDZrm = 6737, X86_VPERMILPDZrr = 6738, X86_VPERMILPDmi = 6739, X86_VPERMILPDri = 6740, X86_VPERMILPDrm = 6741, X86_VPERMILPDrr = 6742, X86_VPERMILPSYmi = 6743, X86_VPERMILPSYri = 6744, X86_VPERMILPSYrm = 6745, X86_VPERMILPSYrr = 6746, X86_VPERMILPSZmi = 6747, X86_VPERMILPSZri = 6748, X86_VPERMILPSZrm = 6749, X86_VPERMILPSZrr = 6750, X86_VPERMILPSmi = 6751, X86_VPERMILPSri = 6752, X86_VPERMILPSrm = 6753, X86_VPERMILPSrr = 6754, X86_VPERMPDYmi = 6755, X86_VPERMPDYri = 6756, X86_VPERMPDZmi = 6757, X86_VPERMPDZri = 6758, X86_VPERMPDZrm = 6759, X86_VPERMPDZrr = 6760, X86_VPERMPSYrm = 6761, X86_VPERMPSYrr = 6762, X86_VPERMPSZrm = 6763, X86_VPERMPSZrr = 6764, X86_VPERMQYmi = 6765, X86_VPERMQYri = 6766, X86_VPERMQZmi = 6767, X86_VPERMQZri = 6768, X86_VPERMQZrm = 6769, X86_VPERMQZrr = 6770, X86_VPERMT2Drm = 6771, X86_VPERMT2Drmk = 6772, X86_VPERMT2Drmkz = 6773, X86_VPERMT2Drr = 6774, X86_VPERMT2Drrk = 6775, X86_VPERMT2Drrkz = 6776, X86_VPERMT2PDrm = 6777, X86_VPERMT2PDrmk = 6778, X86_VPERMT2PDrmkz = 6779, X86_VPERMT2PDrr = 6780, X86_VPERMT2PDrrk = 6781, X86_VPERMT2PDrrkz = 6782, X86_VPERMT2PSrm = 6783, X86_VPERMT2PSrmk = 6784, X86_VPERMT2PSrmkz = 6785, X86_VPERMT2PSrr = 6786, X86_VPERMT2PSrrk = 6787, X86_VPERMT2PSrrkz = 6788, X86_VPERMT2Qrm = 6789, X86_VPERMT2Qrmk = 6790, X86_VPERMT2Qrmkz = 6791, X86_VPERMT2Qrr = 6792, X86_VPERMT2Qrrk = 6793, X86_VPERMT2Qrrkz = 6794, X86_VPEXPANDDZ128rmk = 6795, X86_VPEXPANDDZ128rmkz = 6796, X86_VPEXPANDDZ128rrk = 6797, X86_VPEXPANDDZ128rrkz = 6798, X86_VPEXPANDDZ256rmk = 6799, X86_VPEXPANDDZ256rmkz = 6800, X86_VPEXPANDDZ256rrk = 6801, X86_VPEXPANDDZ256rrkz = 6802, X86_VPEXPANDDZrmk = 6803, X86_VPEXPANDDZrmkz = 6804, X86_VPEXPANDDZrrk = 6805, X86_VPEXPANDDZrrkz = 6806, X86_VPEXPANDQZ128rmk = 6807, X86_VPEXPANDQZ128rmkz = 6808, X86_VPEXPANDQZ128rrk = 6809, X86_VPEXPANDQZ128rrkz = 6810, X86_VPEXPANDQZ256rmk = 6811, X86_VPEXPANDQZ256rmkz = 6812, X86_VPEXPANDQZ256rrk = 6813, X86_VPEXPANDQZ256rrkz = 6814, X86_VPEXPANDQZrmk = 6815, X86_VPEXPANDQZrmkz = 6816, X86_VPEXPANDQZrrk = 6817, X86_VPEXPANDQZrrkz = 6818, X86_VPEXTRBmr = 6819, X86_VPEXTRBrr = 6820, X86_VPEXTRDmr = 6821, X86_VPEXTRDrr = 6822, X86_VPEXTRQmr = 6823, X86_VPEXTRQrr = 6824, X86_VPEXTRWmr = 6825, X86_VPEXTRWri = 6826, X86_VPEXTRWrr_REV = 6827, X86_VPGATHERDDYrm = 6828, X86_VPGATHERDDZrm = 6829, X86_VPGATHERDDrm = 6830, X86_VPGATHERDQYrm = 6831, X86_VPGATHERDQZrm = 6832, X86_VPGATHERDQrm = 6833, X86_VPGATHERQDYrm = 6834, X86_VPGATHERQDZrm = 6835, X86_VPGATHERQDrm = 6836, X86_VPGATHERQQYrm = 6837, X86_VPGATHERQQZrm = 6838, X86_VPGATHERQQrm = 6839, X86_VPHADDBDrm = 6840, X86_VPHADDBDrr = 6841, X86_VPHADDBQrm = 6842, X86_VPHADDBQrr = 6843, X86_VPHADDBWrm = 6844, X86_VPHADDBWrr = 6845, X86_VPHADDDQrm = 6846, X86_VPHADDDQrr = 6847, X86_VPHADDDYrm = 6848, X86_VPHADDDYrr = 6849, X86_VPHADDDrm = 6850, X86_VPHADDDrr = 6851, X86_VPHADDSWrm128 = 6852, X86_VPHADDSWrm256 = 6853, X86_VPHADDSWrr128 = 6854, X86_VPHADDSWrr256 = 6855, X86_VPHADDUBDrm = 6856, X86_VPHADDUBDrr = 6857, X86_VPHADDUBQrm = 6858, X86_VPHADDUBQrr = 6859, X86_VPHADDUBWrm = 6860, X86_VPHADDUBWrr = 6861, X86_VPHADDUDQrm = 6862, X86_VPHADDUDQrr = 6863, X86_VPHADDUWDrm = 6864, X86_VPHADDUWDrr = 6865, X86_VPHADDUWQrm = 6866, X86_VPHADDUWQrr = 6867, X86_VPHADDWDrm = 6868, X86_VPHADDWDrr = 6869, X86_VPHADDWQrm = 6870, X86_VPHADDWQrr = 6871, X86_VPHADDWYrm = 6872, X86_VPHADDWYrr = 6873, X86_VPHADDWrm = 6874, X86_VPHADDWrr = 6875, X86_VPHMINPOSUWrm128 = 6876, X86_VPHMINPOSUWrr128 = 6877, X86_VPHSUBBWrm = 6878, X86_VPHSUBBWrr = 6879, X86_VPHSUBDQrm = 6880, X86_VPHSUBDQrr = 6881, X86_VPHSUBDYrm = 6882, X86_VPHSUBDYrr = 6883, X86_VPHSUBDrm = 6884, X86_VPHSUBDrr = 6885, X86_VPHSUBSWrm128 = 6886, X86_VPHSUBSWrm256 = 6887, X86_VPHSUBSWrr128 = 6888, X86_VPHSUBSWrr256 = 6889, X86_VPHSUBWDrm = 6890, X86_VPHSUBWDrr = 6891, X86_VPHSUBWYrm = 6892, X86_VPHSUBWYrr = 6893, X86_VPHSUBWrm = 6894, X86_VPHSUBWrr = 6895, X86_VPINSRBrm = 6896, X86_VPINSRBrr = 6897, X86_VPINSRDrm = 6898, X86_VPINSRDrr = 6899, X86_VPINSRQrm = 6900, X86_VPINSRQrr = 6901, X86_VPINSRWrmi = 6902, X86_VPINSRWrri = 6903, X86_VPLZCNTDrm = 6904, X86_VPLZCNTDrmb = 6905, X86_VPLZCNTDrmbk = 6906, X86_VPLZCNTDrmbkz = 6907, X86_VPLZCNTDrmk = 6908, X86_VPLZCNTDrmkz = 6909, X86_VPLZCNTDrr = 6910, X86_VPLZCNTDrrk = 6911, X86_VPLZCNTDrrkz = 6912, X86_VPLZCNTQrm = 6913, X86_VPLZCNTQrmb = 6914, X86_VPLZCNTQrmbk = 6915, X86_VPLZCNTQrmbkz = 6916, X86_VPLZCNTQrmk = 6917, X86_VPLZCNTQrmkz = 6918, X86_VPLZCNTQrr = 6919, X86_VPLZCNTQrrk = 6920, X86_VPLZCNTQrrkz = 6921, X86_VPMACSDDrm = 6922, X86_VPMACSDDrr = 6923, X86_VPMACSDQHrm = 6924, X86_VPMACSDQHrr = 6925, X86_VPMACSDQLrm = 6926, X86_VPMACSDQLrr = 6927, X86_VPMACSSDDrm = 6928, X86_VPMACSSDDrr = 6929, X86_VPMACSSDQHrm = 6930, X86_VPMACSSDQHrr = 6931, X86_VPMACSSDQLrm = 6932, X86_VPMACSSDQLrr = 6933, X86_VPMACSSWDrm = 6934, X86_VPMACSSWDrr = 6935, X86_VPMACSSWWrm = 6936, X86_VPMACSSWWrr = 6937, X86_VPMACSWDrm = 6938, X86_VPMACSWDrr = 6939, X86_VPMACSWWrm = 6940, X86_VPMACSWWrr = 6941, X86_VPMADCSSWDrm = 6942, X86_VPMADCSSWDrr = 6943, X86_VPMADCSWDrm = 6944, X86_VPMADCSWDrr = 6945, X86_VPMADDUBSWrm128 = 6946, X86_VPMADDUBSWrm256 = 6947, X86_VPMADDUBSWrr128 = 6948, X86_VPMADDUBSWrr256 = 6949, X86_VPMADDWDYrm = 6950, X86_VPMADDWDYrr = 6951, X86_VPMADDWDrm = 6952, X86_VPMADDWDrr = 6953, X86_VPMASKMOVDYmr = 6954, X86_VPMASKMOVDYrm = 6955, X86_VPMASKMOVDmr = 6956, X86_VPMASKMOVDrm = 6957, X86_VPMASKMOVQYmr = 6958, X86_VPMASKMOVQYrm = 6959, X86_VPMASKMOVQmr = 6960, X86_VPMASKMOVQrm = 6961, X86_VPMAXSBYrm = 6962, X86_VPMAXSBYrr = 6963, X86_VPMAXSBZ128rm = 6964, X86_VPMAXSBZ128rmk = 6965, X86_VPMAXSBZ128rmkz = 6966, X86_VPMAXSBZ128rr = 6967, X86_VPMAXSBZ128rrk = 6968, X86_VPMAXSBZ128rrkz = 6969, X86_VPMAXSBZ256rm = 6970, X86_VPMAXSBZ256rmk = 6971, X86_VPMAXSBZ256rmkz = 6972, X86_VPMAXSBZ256rr = 6973, X86_VPMAXSBZ256rrk = 6974, X86_VPMAXSBZ256rrkz = 6975, X86_VPMAXSBZrm = 6976, X86_VPMAXSBZrmk = 6977, X86_VPMAXSBZrmkz = 6978, X86_VPMAXSBZrr = 6979, X86_VPMAXSBZrrk = 6980, X86_VPMAXSBZrrkz = 6981, X86_VPMAXSBrm = 6982, X86_VPMAXSBrr = 6983, X86_VPMAXSDYrm = 6984, X86_VPMAXSDYrr = 6985, X86_VPMAXSDZ128rm = 6986, X86_VPMAXSDZ128rmb = 6987, X86_VPMAXSDZ128rmbk = 6988, X86_VPMAXSDZ128rmbkz = 6989, X86_VPMAXSDZ128rmk = 6990, X86_VPMAXSDZ128rmkz = 6991, X86_VPMAXSDZ128rr = 6992, X86_VPMAXSDZ128rrk = 6993, X86_VPMAXSDZ128rrkz = 6994, X86_VPMAXSDZ256rm = 6995, X86_VPMAXSDZ256rmb = 6996, X86_VPMAXSDZ256rmbk = 6997, X86_VPMAXSDZ256rmbkz = 6998, X86_VPMAXSDZ256rmk = 6999, X86_VPMAXSDZ256rmkz = 7000, X86_VPMAXSDZ256rr = 7001, X86_VPMAXSDZ256rrk = 7002, X86_VPMAXSDZ256rrkz = 7003, X86_VPMAXSDZrm = 7004, X86_VPMAXSDZrmb = 7005, X86_VPMAXSDZrmbk = 7006, X86_VPMAXSDZrmbkz = 7007, X86_VPMAXSDZrmk = 7008, X86_VPMAXSDZrmkz = 7009, X86_VPMAXSDZrr = 7010, X86_VPMAXSDZrrk = 7011, X86_VPMAXSDZrrkz = 7012, X86_VPMAXSDrm = 7013, X86_VPMAXSDrr = 7014, X86_VPMAXSQZ128rm = 7015, X86_VPMAXSQZ128rmb = 7016, X86_VPMAXSQZ128rmbk = 7017, X86_VPMAXSQZ128rmbkz = 7018, X86_VPMAXSQZ128rmk = 7019, X86_VPMAXSQZ128rmkz = 7020, X86_VPMAXSQZ128rr = 7021, X86_VPMAXSQZ128rrk = 7022, X86_VPMAXSQZ128rrkz = 7023, X86_VPMAXSQZ256rm = 7024, X86_VPMAXSQZ256rmb = 7025, X86_VPMAXSQZ256rmbk = 7026, X86_VPMAXSQZ256rmbkz = 7027, X86_VPMAXSQZ256rmk = 7028, X86_VPMAXSQZ256rmkz = 7029, X86_VPMAXSQZ256rr = 7030, X86_VPMAXSQZ256rrk = 7031, X86_VPMAXSQZ256rrkz = 7032, X86_VPMAXSQZrm = 7033, X86_VPMAXSQZrmb = 7034, X86_VPMAXSQZrmbk = 7035, X86_VPMAXSQZrmbkz = 7036, X86_VPMAXSQZrmk = 7037, X86_VPMAXSQZrmkz = 7038, X86_VPMAXSQZrr = 7039, X86_VPMAXSQZrrk = 7040, X86_VPMAXSQZrrkz = 7041, X86_VPMAXSWYrm = 7042, X86_VPMAXSWYrr = 7043, X86_VPMAXSWZ128rm = 7044, X86_VPMAXSWZ128rmk = 7045, X86_VPMAXSWZ128rmkz = 7046, X86_VPMAXSWZ128rr = 7047, X86_VPMAXSWZ128rrk = 7048, X86_VPMAXSWZ128rrkz = 7049, X86_VPMAXSWZ256rm = 7050, X86_VPMAXSWZ256rmk = 7051, X86_VPMAXSWZ256rmkz = 7052, X86_VPMAXSWZ256rr = 7053, X86_VPMAXSWZ256rrk = 7054, X86_VPMAXSWZ256rrkz = 7055, X86_VPMAXSWZrm = 7056, X86_VPMAXSWZrmk = 7057, X86_VPMAXSWZrmkz = 7058, X86_VPMAXSWZrr = 7059, X86_VPMAXSWZrrk = 7060, X86_VPMAXSWZrrkz = 7061, X86_VPMAXSWrm = 7062, X86_VPMAXSWrr = 7063, X86_VPMAXUBYrm = 7064, X86_VPMAXUBYrr = 7065, X86_VPMAXUBZ128rm = 7066, X86_VPMAXUBZ128rmk = 7067, X86_VPMAXUBZ128rmkz = 7068, X86_VPMAXUBZ128rr = 7069, X86_VPMAXUBZ128rrk = 7070, X86_VPMAXUBZ128rrkz = 7071, X86_VPMAXUBZ256rm = 7072, X86_VPMAXUBZ256rmk = 7073, X86_VPMAXUBZ256rmkz = 7074, X86_VPMAXUBZ256rr = 7075, X86_VPMAXUBZ256rrk = 7076, X86_VPMAXUBZ256rrkz = 7077, X86_VPMAXUBZrm = 7078, X86_VPMAXUBZrmk = 7079, X86_VPMAXUBZrmkz = 7080, X86_VPMAXUBZrr = 7081, X86_VPMAXUBZrrk = 7082, X86_VPMAXUBZrrkz = 7083, X86_VPMAXUBrm = 7084, X86_VPMAXUBrr = 7085, X86_VPMAXUDYrm = 7086, X86_VPMAXUDYrr = 7087, X86_VPMAXUDZ128rm = 7088, X86_VPMAXUDZ128rmb = 7089, X86_VPMAXUDZ128rmbk = 7090, X86_VPMAXUDZ128rmbkz = 7091, X86_VPMAXUDZ128rmk = 7092, X86_VPMAXUDZ128rmkz = 7093, X86_VPMAXUDZ128rr = 7094, X86_VPMAXUDZ128rrk = 7095, X86_VPMAXUDZ128rrkz = 7096, X86_VPMAXUDZ256rm = 7097, X86_VPMAXUDZ256rmb = 7098, X86_VPMAXUDZ256rmbk = 7099, X86_VPMAXUDZ256rmbkz = 7100, X86_VPMAXUDZ256rmk = 7101, X86_VPMAXUDZ256rmkz = 7102, X86_VPMAXUDZ256rr = 7103, X86_VPMAXUDZ256rrk = 7104, X86_VPMAXUDZ256rrkz = 7105, X86_VPMAXUDZrm = 7106, X86_VPMAXUDZrmb = 7107, X86_VPMAXUDZrmbk = 7108, X86_VPMAXUDZrmbkz = 7109, X86_VPMAXUDZrmk = 7110, X86_VPMAXUDZrmkz = 7111, X86_VPMAXUDZrr = 7112, X86_VPMAXUDZrrk = 7113, X86_VPMAXUDZrrkz = 7114, X86_VPMAXUDrm = 7115, X86_VPMAXUDrr = 7116, X86_VPMAXUQZ128rm = 7117, X86_VPMAXUQZ128rmb = 7118, X86_VPMAXUQZ128rmbk = 7119, X86_VPMAXUQZ128rmbkz = 7120, X86_VPMAXUQZ128rmk = 7121, X86_VPMAXUQZ128rmkz = 7122, X86_VPMAXUQZ128rr = 7123, X86_VPMAXUQZ128rrk = 7124, X86_VPMAXUQZ128rrkz = 7125, X86_VPMAXUQZ256rm = 7126, X86_VPMAXUQZ256rmb = 7127, X86_VPMAXUQZ256rmbk = 7128, X86_VPMAXUQZ256rmbkz = 7129, X86_VPMAXUQZ256rmk = 7130, X86_VPMAXUQZ256rmkz = 7131, X86_VPMAXUQZ256rr = 7132, X86_VPMAXUQZ256rrk = 7133, X86_VPMAXUQZ256rrkz = 7134, X86_VPMAXUQZrm = 7135, X86_VPMAXUQZrmb = 7136, X86_VPMAXUQZrmbk = 7137, X86_VPMAXUQZrmbkz = 7138, X86_VPMAXUQZrmk = 7139, X86_VPMAXUQZrmkz = 7140, X86_VPMAXUQZrr = 7141, X86_VPMAXUQZrrk = 7142, X86_VPMAXUQZrrkz = 7143, X86_VPMAXUWYrm = 7144, X86_VPMAXUWYrr = 7145, X86_VPMAXUWZ128rm = 7146, X86_VPMAXUWZ128rmk = 7147, X86_VPMAXUWZ128rmkz = 7148, X86_VPMAXUWZ128rr = 7149, X86_VPMAXUWZ128rrk = 7150, X86_VPMAXUWZ128rrkz = 7151, X86_VPMAXUWZ256rm = 7152, X86_VPMAXUWZ256rmk = 7153, X86_VPMAXUWZ256rmkz = 7154, X86_VPMAXUWZ256rr = 7155, X86_VPMAXUWZ256rrk = 7156, X86_VPMAXUWZ256rrkz = 7157, X86_VPMAXUWZrm = 7158, X86_VPMAXUWZrmk = 7159, X86_VPMAXUWZrmkz = 7160, X86_VPMAXUWZrr = 7161, X86_VPMAXUWZrrk = 7162, X86_VPMAXUWZrrkz = 7163, X86_VPMAXUWrm = 7164, X86_VPMAXUWrr = 7165, X86_VPMINSBYrm = 7166, X86_VPMINSBYrr = 7167, X86_VPMINSBZ128rm = 7168, X86_VPMINSBZ128rmk = 7169, X86_VPMINSBZ128rmkz = 7170, X86_VPMINSBZ128rr = 7171, X86_VPMINSBZ128rrk = 7172, X86_VPMINSBZ128rrkz = 7173, X86_VPMINSBZ256rm = 7174, X86_VPMINSBZ256rmk = 7175, X86_VPMINSBZ256rmkz = 7176, X86_VPMINSBZ256rr = 7177, X86_VPMINSBZ256rrk = 7178, X86_VPMINSBZ256rrkz = 7179, X86_VPMINSBZrm = 7180, X86_VPMINSBZrmk = 7181, X86_VPMINSBZrmkz = 7182, X86_VPMINSBZrr = 7183, X86_VPMINSBZrrk = 7184, X86_VPMINSBZrrkz = 7185, X86_VPMINSBrm = 7186, X86_VPMINSBrr = 7187, X86_VPMINSDYrm = 7188, X86_VPMINSDYrr = 7189, X86_VPMINSDZ128rm = 7190, X86_VPMINSDZ128rmb = 7191, X86_VPMINSDZ128rmbk = 7192, X86_VPMINSDZ128rmbkz = 7193, X86_VPMINSDZ128rmk = 7194, X86_VPMINSDZ128rmkz = 7195, X86_VPMINSDZ128rr = 7196, X86_VPMINSDZ128rrk = 7197, X86_VPMINSDZ128rrkz = 7198, X86_VPMINSDZ256rm = 7199, X86_VPMINSDZ256rmb = 7200, X86_VPMINSDZ256rmbk = 7201, X86_VPMINSDZ256rmbkz = 7202, X86_VPMINSDZ256rmk = 7203, X86_VPMINSDZ256rmkz = 7204, X86_VPMINSDZ256rr = 7205, X86_VPMINSDZ256rrk = 7206, X86_VPMINSDZ256rrkz = 7207, X86_VPMINSDZrm = 7208, X86_VPMINSDZrmb = 7209, X86_VPMINSDZrmbk = 7210, X86_VPMINSDZrmbkz = 7211, X86_VPMINSDZrmk = 7212, X86_VPMINSDZrmkz = 7213, X86_VPMINSDZrr = 7214, X86_VPMINSDZrrk = 7215, X86_VPMINSDZrrkz = 7216, X86_VPMINSDrm = 7217, X86_VPMINSDrr = 7218, X86_VPMINSQZ128rm = 7219, X86_VPMINSQZ128rmb = 7220, X86_VPMINSQZ128rmbk = 7221, X86_VPMINSQZ128rmbkz = 7222, X86_VPMINSQZ128rmk = 7223, X86_VPMINSQZ128rmkz = 7224, X86_VPMINSQZ128rr = 7225, X86_VPMINSQZ128rrk = 7226, X86_VPMINSQZ128rrkz = 7227, X86_VPMINSQZ256rm = 7228, X86_VPMINSQZ256rmb = 7229, X86_VPMINSQZ256rmbk = 7230, X86_VPMINSQZ256rmbkz = 7231, X86_VPMINSQZ256rmk = 7232, X86_VPMINSQZ256rmkz = 7233, X86_VPMINSQZ256rr = 7234, X86_VPMINSQZ256rrk = 7235, X86_VPMINSQZ256rrkz = 7236, X86_VPMINSQZrm = 7237, X86_VPMINSQZrmb = 7238, X86_VPMINSQZrmbk = 7239, X86_VPMINSQZrmbkz = 7240, X86_VPMINSQZrmk = 7241, X86_VPMINSQZrmkz = 7242, X86_VPMINSQZrr = 7243, X86_VPMINSQZrrk = 7244, X86_VPMINSQZrrkz = 7245, X86_VPMINSWYrm = 7246, X86_VPMINSWYrr = 7247, X86_VPMINSWZ128rm = 7248, X86_VPMINSWZ128rmk = 7249, X86_VPMINSWZ128rmkz = 7250, X86_VPMINSWZ128rr = 7251, X86_VPMINSWZ128rrk = 7252, X86_VPMINSWZ128rrkz = 7253, X86_VPMINSWZ256rm = 7254, X86_VPMINSWZ256rmk = 7255, X86_VPMINSWZ256rmkz = 7256, X86_VPMINSWZ256rr = 7257, X86_VPMINSWZ256rrk = 7258, X86_VPMINSWZ256rrkz = 7259, X86_VPMINSWZrm = 7260, X86_VPMINSWZrmk = 7261, X86_VPMINSWZrmkz = 7262, X86_VPMINSWZrr = 7263, X86_VPMINSWZrrk = 7264, X86_VPMINSWZrrkz = 7265, X86_VPMINSWrm = 7266, X86_VPMINSWrr = 7267, X86_VPMINUBYrm = 7268, X86_VPMINUBYrr = 7269, X86_VPMINUBZ128rm = 7270, X86_VPMINUBZ128rmk = 7271, X86_VPMINUBZ128rmkz = 7272, X86_VPMINUBZ128rr = 7273, X86_VPMINUBZ128rrk = 7274, X86_VPMINUBZ128rrkz = 7275, X86_VPMINUBZ256rm = 7276, X86_VPMINUBZ256rmk = 7277, X86_VPMINUBZ256rmkz = 7278, X86_VPMINUBZ256rr = 7279, X86_VPMINUBZ256rrk = 7280, X86_VPMINUBZ256rrkz = 7281, X86_VPMINUBZrm = 7282, X86_VPMINUBZrmk = 7283, X86_VPMINUBZrmkz = 7284, X86_VPMINUBZrr = 7285, X86_VPMINUBZrrk = 7286, X86_VPMINUBZrrkz = 7287, X86_VPMINUBrm = 7288, X86_VPMINUBrr = 7289, X86_VPMINUDYrm = 7290, X86_VPMINUDYrr = 7291, X86_VPMINUDZ128rm = 7292, X86_VPMINUDZ128rmb = 7293, X86_VPMINUDZ128rmbk = 7294, X86_VPMINUDZ128rmbkz = 7295, X86_VPMINUDZ128rmk = 7296, X86_VPMINUDZ128rmkz = 7297, X86_VPMINUDZ128rr = 7298, X86_VPMINUDZ128rrk = 7299, X86_VPMINUDZ128rrkz = 7300, X86_VPMINUDZ256rm = 7301, X86_VPMINUDZ256rmb = 7302, X86_VPMINUDZ256rmbk = 7303, X86_VPMINUDZ256rmbkz = 7304, X86_VPMINUDZ256rmk = 7305, X86_VPMINUDZ256rmkz = 7306, X86_VPMINUDZ256rr = 7307, X86_VPMINUDZ256rrk = 7308, X86_VPMINUDZ256rrkz = 7309, X86_VPMINUDZrm = 7310, X86_VPMINUDZrmb = 7311, X86_VPMINUDZrmbk = 7312, X86_VPMINUDZrmbkz = 7313, X86_VPMINUDZrmk = 7314, X86_VPMINUDZrmkz = 7315, X86_VPMINUDZrr = 7316, X86_VPMINUDZrrk = 7317, X86_VPMINUDZrrkz = 7318, X86_VPMINUDrm = 7319, X86_VPMINUDrr = 7320, X86_VPMINUQZ128rm = 7321, X86_VPMINUQZ128rmb = 7322, X86_VPMINUQZ128rmbk = 7323, X86_VPMINUQZ128rmbkz = 7324, X86_VPMINUQZ128rmk = 7325, X86_VPMINUQZ128rmkz = 7326, X86_VPMINUQZ128rr = 7327, X86_VPMINUQZ128rrk = 7328, X86_VPMINUQZ128rrkz = 7329, X86_VPMINUQZ256rm = 7330, X86_VPMINUQZ256rmb = 7331, X86_VPMINUQZ256rmbk = 7332, X86_VPMINUQZ256rmbkz = 7333, X86_VPMINUQZ256rmk = 7334, X86_VPMINUQZ256rmkz = 7335, X86_VPMINUQZ256rr = 7336, X86_VPMINUQZ256rrk = 7337, X86_VPMINUQZ256rrkz = 7338, X86_VPMINUQZrm = 7339, X86_VPMINUQZrmb = 7340, X86_VPMINUQZrmbk = 7341, X86_VPMINUQZrmbkz = 7342, X86_VPMINUQZrmk = 7343, X86_VPMINUQZrmkz = 7344, X86_VPMINUQZrr = 7345, X86_VPMINUQZrrk = 7346, X86_VPMINUQZrrkz = 7347, X86_VPMINUWYrm = 7348, X86_VPMINUWYrr = 7349, X86_VPMINUWZ128rm = 7350, X86_VPMINUWZ128rmk = 7351, X86_VPMINUWZ128rmkz = 7352, X86_VPMINUWZ128rr = 7353, X86_VPMINUWZ128rrk = 7354, X86_VPMINUWZ128rrkz = 7355, X86_VPMINUWZ256rm = 7356, X86_VPMINUWZ256rmk = 7357, X86_VPMINUWZ256rmkz = 7358, X86_VPMINUWZ256rr = 7359, X86_VPMINUWZ256rrk = 7360, X86_VPMINUWZ256rrkz = 7361, X86_VPMINUWZrm = 7362, X86_VPMINUWZrmk = 7363, X86_VPMINUWZrmkz = 7364, X86_VPMINUWZrr = 7365, X86_VPMINUWZrrk = 7366, X86_VPMINUWZrrkz = 7367, X86_VPMINUWrm = 7368, X86_VPMINUWrr = 7369, X86_VPMOVDBmr = 7370, X86_VPMOVDBmrk = 7371, X86_VPMOVDBrr = 7372, X86_VPMOVDBrrk = 7373, X86_VPMOVDBrrkz = 7374, X86_VPMOVDWmr = 7375, X86_VPMOVDWmrk = 7376, X86_VPMOVDWrr = 7377, X86_VPMOVDWrrk = 7378, X86_VPMOVDWrrkz = 7379, X86_VPMOVM2BZ128rr = 7380, X86_VPMOVM2BZ256rr = 7381, X86_VPMOVM2BZrr = 7382, X86_VPMOVM2DZ128rr = 7383, X86_VPMOVM2DZ256rr = 7384, X86_VPMOVM2DZrr = 7385, X86_VPMOVM2QZ128rr = 7386, X86_VPMOVM2QZ256rr = 7387, X86_VPMOVM2QZrr = 7388, X86_VPMOVM2WZ128rr = 7389, X86_VPMOVM2WZ256rr = 7390, X86_VPMOVM2WZrr = 7391, X86_VPMOVMSKBYrr = 7392, X86_VPMOVMSKBrr = 7393, X86_VPMOVQBmr = 7394, X86_VPMOVQBmrk = 7395, X86_VPMOVQBrr = 7396, X86_VPMOVQBrrk = 7397, X86_VPMOVQBrrkz = 7398, X86_VPMOVQDmr = 7399, X86_VPMOVQDmrk = 7400, X86_VPMOVQDrr = 7401, X86_VPMOVQDrrk = 7402, X86_VPMOVQDrrkz = 7403, X86_VPMOVQWmr = 7404, X86_VPMOVQWmrk = 7405, X86_VPMOVQWrr = 7406, X86_VPMOVQWrrk = 7407, X86_VPMOVQWrrkz = 7408, X86_VPMOVSDBmr = 7409, X86_VPMOVSDBmrk = 7410, X86_VPMOVSDBrr = 7411, X86_VPMOVSDBrrk = 7412, X86_VPMOVSDBrrkz = 7413, X86_VPMOVSDWmr = 7414, X86_VPMOVSDWmrk = 7415, X86_VPMOVSDWrr = 7416, X86_VPMOVSDWrrk = 7417, X86_VPMOVSDWrrkz = 7418, X86_VPMOVSQBmr = 7419, X86_VPMOVSQBmrk = 7420, X86_VPMOVSQBrr = 7421, X86_VPMOVSQBrrk = 7422, X86_VPMOVSQBrrkz = 7423, X86_VPMOVSQDmr = 7424, X86_VPMOVSQDmrk = 7425, X86_VPMOVSQDrr = 7426, X86_VPMOVSQDrrk = 7427, X86_VPMOVSQDrrkz = 7428, X86_VPMOVSQWmr = 7429, X86_VPMOVSQWmrk = 7430, X86_VPMOVSQWrr = 7431, X86_VPMOVSQWrrk = 7432, X86_VPMOVSQWrrkz = 7433, X86_VPMOVSXBDYrm = 7434, X86_VPMOVSXBDYrr = 7435, X86_VPMOVSXBDZrm = 7436, X86_VPMOVSXBDZrmk = 7437, X86_VPMOVSXBDZrmkz = 7438, X86_VPMOVSXBDZrr = 7439, X86_VPMOVSXBDZrrk = 7440, X86_VPMOVSXBDZrrkz = 7441, X86_VPMOVSXBDrm = 7442, X86_VPMOVSXBDrr = 7443, X86_VPMOVSXBQYrm = 7444, X86_VPMOVSXBQYrr = 7445, X86_VPMOVSXBQZrm = 7446, X86_VPMOVSXBQZrmk = 7447, X86_VPMOVSXBQZrmkz = 7448, X86_VPMOVSXBQZrr = 7449, X86_VPMOVSXBQZrrk = 7450, X86_VPMOVSXBQZrrkz = 7451, X86_VPMOVSXBQrm = 7452, X86_VPMOVSXBQrr = 7453, X86_VPMOVSXBWYrm = 7454, X86_VPMOVSXBWYrr = 7455, X86_VPMOVSXBWrm = 7456, X86_VPMOVSXBWrr = 7457, X86_VPMOVSXDQYrm = 7458, X86_VPMOVSXDQYrr = 7459, X86_VPMOVSXDQZrm = 7460, X86_VPMOVSXDQZrmk = 7461, X86_VPMOVSXDQZrmkz = 7462, X86_VPMOVSXDQZrr = 7463, X86_VPMOVSXDQZrrk = 7464, X86_VPMOVSXDQZrrkz = 7465, X86_VPMOVSXDQrm = 7466, X86_VPMOVSXDQrr = 7467, X86_VPMOVSXWDYrm = 7468, X86_VPMOVSXWDYrr = 7469, X86_VPMOVSXWDZrm = 7470, X86_VPMOVSXWDZrmk = 7471, X86_VPMOVSXWDZrmkz = 7472, X86_VPMOVSXWDZrr = 7473, X86_VPMOVSXWDZrrk = 7474, X86_VPMOVSXWDZrrkz = 7475, X86_VPMOVSXWDrm = 7476, X86_VPMOVSXWDrr = 7477, X86_VPMOVSXWQYrm = 7478, X86_VPMOVSXWQYrr = 7479, X86_VPMOVSXWQZrm = 7480, X86_VPMOVSXWQZrmk = 7481, X86_VPMOVSXWQZrmkz = 7482, X86_VPMOVSXWQZrr = 7483, X86_VPMOVSXWQZrrk = 7484, X86_VPMOVSXWQZrrkz = 7485, X86_VPMOVSXWQrm = 7486, X86_VPMOVSXWQrr = 7487, X86_VPMOVUSDBmr = 7488, X86_VPMOVUSDBmrk = 7489, X86_VPMOVUSDBrr = 7490, X86_VPMOVUSDBrrk = 7491, X86_VPMOVUSDBrrkz = 7492, X86_VPMOVUSDWmr = 7493, X86_VPMOVUSDWmrk = 7494, X86_VPMOVUSDWrr = 7495, X86_VPMOVUSDWrrk = 7496, X86_VPMOVUSDWrrkz = 7497, X86_VPMOVUSQBmr = 7498, X86_VPMOVUSQBmrk = 7499, X86_VPMOVUSQBrr = 7500, X86_VPMOVUSQBrrk = 7501, X86_VPMOVUSQBrrkz = 7502, X86_VPMOVUSQDmr = 7503, X86_VPMOVUSQDmrk = 7504, X86_VPMOVUSQDrr = 7505, X86_VPMOVUSQDrrk = 7506, X86_VPMOVUSQDrrkz = 7507, X86_VPMOVUSQWmr = 7508, X86_VPMOVUSQWmrk = 7509, X86_VPMOVUSQWrr = 7510, X86_VPMOVUSQWrrk = 7511, X86_VPMOVUSQWrrkz = 7512, X86_VPMOVZXBDYrm = 7513, X86_VPMOVZXBDYrr = 7514, X86_VPMOVZXBDZrm = 7515, X86_VPMOVZXBDZrmk = 7516, X86_VPMOVZXBDZrmkz = 7517, X86_VPMOVZXBDZrr = 7518, X86_VPMOVZXBDZrrk = 7519, X86_VPMOVZXBDZrrkz = 7520, X86_VPMOVZXBDrm = 7521, X86_VPMOVZXBDrr = 7522, X86_VPMOVZXBQYrm = 7523, X86_VPMOVZXBQYrr = 7524, X86_VPMOVZXBQZrm = 7525, X86_VPMOVZXBQZrmk = 7526, X86_VPMOVZXBQZrmkz = 7527, X86_VPMOVZXBQZrr = 7528, X86_VPMOVZXBQZrrk = 7529, X86_VPMOVZXBQZrrkz = 7530, X86_VPMOVZXBQrm = 7531, X86_VPMOVZXBQrr = 7532, X86_VPMOVZXBWYrm = 7533, X86_VPMOVZXBWYrr = 7534, X86_VPMOVZXBWrm = 7535, X86_VPMOVZXBWrr = 7536, X86_VPMOVZXDQYrm = 7537, X86_VPMOVZXDQYrr = 7538, X86_VPMOVZXDQZrm = 7539, X86_VPMOVZXDQZrmk = 7540, X86_VPMOVZXDQZrmkz = 7541, X86_VPMOVZXDQZrr = 7542, X86_VPMOVZXDQZrrk = 7543, X86_VPMOVZXDQZrrkz = 7544, X86_VPMOVZXDQrm = 7545, X86_VPMOVZXDQrr = 7546, X86_VPMOVZXWDYrm = 7547, X86_VPMOVZXWDYrr = 7548, X86_VPMOVZXWDZrm = 7549, X86_VPMOVZXWDZrmk = 7550, X86_VPMOVZXWDZrmkz = 7551, X86_VPMOVZXWDZrr = 7552, X86_VPMOVZXWDZrrk = 7553, X86_VPMOVZXWDZrrkz = 7554, X86_VPMOVZXWDrm = 7555, X86_VPMOVZXWDrr = 7556, X86_VPMOVZXWQYrm = 7557, X86_VPMOVZXWQYrr = 7558, X86_VPMOVZXWQZrm = 7559, X86_VPMOVZXWQZrmk = 7560, X86_VPMOVZXWQZrmkz = 7561, X86_VPMOVZXWQZrr = 7562, X86_VPMOVZXWQZrrk = 7563, X86_VPMOVZXWQZrrkz = 7564, X86_VPMOVZXWQrm = 7565, X86_VPMOVZXWQrr = 7566, X86_VPMULDQYrm = 7567, X86_VPMULDQYrr = 7568, X86_VPMULDQZrm = 7569, X86_VPMULDQZrmb = 7570, X86_VPMULDQZrmbk = 7571, X86_VPMULDQZrmbkz = 7572, X86_VPMULDQZrmk = 7573, X86_VPMULDQZrmkz = 7574, X86_VPMULDQZrr = 7575, X86_VPMULDQZrrk = 7576, X86_VPMULDQZrrkz = 7577, X86_VPMULDQrm = 7578, X86_VPMULDQrr = 7579, X86_VPMULHRSWrm128 = 7580, X86_VPMULHRSWrm256 = 7581, X86_VPMULHRSWrr128 = 7582, X86_VPMULHRSWrr256 = 7583, X86_VPMULHUWYrm = 7584, X86_VPMULHUWYrr = 7585, X86_VPMULHUWrm = 7586, X86_VPMULHUWrr = 7587, X86_VPMULHWYrm = 7588, X86_VPMULHWYrr = 7589, X86_VPMULHWrm = 7590, X86_VPMULHWrr = 7591, X86_VPMULLDYrm = 7592, X86_VPMULLDYrr = 7593, X86_VPMULLDZ128rm = 7594, X86_VPMULLDZ128rmb = 7595, X86_VPMULLDZ128rmbk = 7596, X86_VPMULLDZ128rmbkz = 7597, X86_VPMULLDZ128rmk = 7598, X86_VPMULLDZ128rmkz = 7599, X86_VPMULLDZ128rr = 7600, X86_VPMULLDZ128rrk = 7601, X86_VPMULLDZ128rrkz = 7602, X86_VPMULLDZ256rm = 7603, X86_VPMULLDZ256rmb = 7604, X86_VPMULLDZ256rmbk = 7605, X86_VPMULLDZ256rmbkz = 7606, X86_VPMULLDZ256rmk = 7607, X86_VPMULLDZ256rmkz = 7608, X86_VPMULLDZ256rr = 7609, X86_VPMULLDZ256rrk = 7610, X86_VPMULLDZ256rrkz = 7611, X86_VPMULLDZrm = 7612, X86_VPMULLDZrmb = 7613, X86_VPMULLDZrmbk = 7614, X86_VPMULLDZrmbkz = 7615, X86_VPMULLDZrmk = 7616, X86_VPMULLDZrmkz = 7617, X86_VPMULLDZrr = 7618, X86_VPMULLDZrrk = 7619, X86_VPMULLDZrrkz = 7620, X86_VPMULLDrm = 7621, X86_VPMULLDrr = 7622, X86_VPMULLQZ128rm = 7623, X86_VPMULLQZ128rmb = 7624, X86_VPMULLQZ128rmbk = 7625, X86_VPMULLQZ128rmbkz = 7626, X86_VPMULLQZ128rmk = 7627, X86_VPMULLQZ128rmkz = 7628, X86_VPMULLQZ128rr = 7629, X86_VPMULLQZ128rrk = 7630, X86_VPMULLQZ128rrkz = 7631, X86_VPMULLQZ256rm = 7632, X86_VPMULLQZ256rmb = 7633, X86_VPMULLQZ256rmbk = 7634, X86_VPMULLQZ256rmbkz = 7635, X86_VPMULLQZ256rmk = 7636, X86_VPMULLQZ256rmkz = 7637, X86_VPMULLQZ256rr = 7638, X86_VPMULLQZ256rrk = 7639, X86_VPMULLQZ256rrkz = 7640, X86_VPMULLQZrm = 7641, X86_VPMULLQZrmb = 7642, X86_VPMULLQZrmbk = 7643, X86_VPMULLQZrmbkz = 7644, X86_VPMULLQZrmk = 7645, X86_VPMULLQZrmkz = 7646, X86_VPMULLQZrr = 7647, X86_VPMULLQZrrk = 7648, X86_VPMULLQZrrkz = 7649, X86_VPMULLWYrm = 7650, X86_VPMULLWYrr = 7651, X86_VPMULLWZ128rm = 7652, X86_VPMULLWZ128rmk = 7653, X86_VPMULLWZ128rmkz = 7654, X86_VPMULLWZ128rr = 7655, X86_VPMULLWZ128rrk = 7656, X86_VPMULLWZ128rrkz = 7657, X86_VPMULLWZ256rm = 7658, X86_VPMULLWZ256rmk = 7659, X86_VPMULLWZ256rmkz = 7660, X86_VPMULLWZ256rr = 7661, X86_VPMULLWZ256rrk = 7662, X86_VPMULLWZ256rrkz = 7663, X86_VPMULLWZrm = 7664, X86_VPMULLWZrmk = 7665, X86_VPMULLWZrmkz = 7666, X86_VPMULLWZrr = 7667, X86_VPMULLWZrrk = 7668, X86_VPMULLWZrrkz = 7669, X86_VPMULLWrm = 7670, X86_VPMULLWrr = 7671, X86_VPMULUDQYrm = 7672, X86_VPMULUDQYrr = 7673, X86_VPMULUDQZrm = 7674, X86_VPMULUDQZrmb = 7675, X86_VPMULUDQZrmbk = 7676, X86_VPMULUDQZrmbkz = 7677, X86_VPMULUDQZrmk = 7678, X86_VPMULUDQZrmkz = 7679, X86_VPMULUDQZrr = 7680, X86_VPMULUDQZrrk = 7681, X86_VPMULUDQZrrkz = 7682, X86_VPMULUDQrm = 7683, X86_VPMULUDQrr = 7684, X86_VPORDZ128rm = 7685, X86_VPORDZ128rmb = 7686, X86_VPORDZ128rmbk = 7687, X86_VPORDZ128rmbkz = 7688, X86_VPORDZ128rmk = 7689, X86_VPORDZ128rmkz = 7690, X86_VPORDZ128rr = 7691, X86_VPORDZ128rrk = 7692, X86_VPORDZ128rrkz = 7693, X86_VPORDZ256rm = 7694, X86_VPORDZ256rmb = 7695, X86_VPORDZ256rmbk = 7696, X86_VPORDZ256rmbkz = 7697, X86_VPORDZ256rmk = 7698, X86_VPORDZ256rmkz = 7699, X86_VPORDZ256rr = 7700, X86_VPORDZ256rrk = 7701, X86_VPORDZ256rrkz = 7702, X86_VPORDZrm = 7703, X86_VPORDZrmb = 7704, X86_VPORDZrmbk = 7705, X86_VPORDZrmbkz = 7706, X86_VPORDZrmk = 7707, X86_VPORDZrmkz = 7708, X86_VPORDZrr = 7709, X86_VPORDZrrk = 7710, X86_VPORDZrrkz = 7711, X86_VPORQZ128rm = 7712, X86_VPORQZ128rmb = 7713, X86_VPORQZ128rmbk = 7714, X86_VPORQZ128rmbkz = 7715, X86_VPORQZ128rmk = 7716, X86_VPORQZ128rmkz = 7717, X86_VPORQZ128rr = 7718, X86_VPORQZ128rrk = 7719, X86_VPORQZ128rrkz = 7720, X86_VPORQZ256rm = 7721, X86_VPORQZ256rmb = 7722, X86_VPORQZ256rmbk = 7723, X86_VPORQZ256rmbkz = 7724, X86_VPORQZ256rmk = 7725, X86_VPORQZ256rmkz = 7726, X86_VPORQZ256rr = 7727, X86_VPORQZ256rrk = 7728, X86_VPORQZ256rrkz = 7729, X86_VPORQZrm = 7730, X86_VPORQZrmb = 7731, X86_VPORQZrmbk = 7732, X86_VPORQZrmbkz = 7733, X86_VPORQZrmk = 7734, X86_VPORQZrmkz = 7735, X86_VPORQZrr = 7736, X86_VPORQZrrk = 7737, X86_VPORQZrrkz = 7738, X86_VPORYrm = 7739, X86_VPORYrr = 7740, X86_VPORrm = 7741, X86_VPORrr = 7742, X86_VPPERMmr = 7743, X86_VPPERMrm = 7744, X86_VPPERMrr = 7745, X86_VPROTBmi = 7746, X86_VPROTBmr = 7747, X86_VPROTBri = 7748, X86_VPROTBrm = 7749, X86_VPROTBrr = 7750, X86_VPROTDmi = 7751, X86_VPROTDmr = 7752, X86_VPROTDri = 7753, X86_VPROTDrm = 7754, X86_VPROTDrr = 7755, X86_VPROTQmi = 7756, X86_VPROTQmr = 7757, X86_VPROTQri = 7758, X86_VPROTQrm = 7759, X86_VPROTQrr = 7760, X86_VPROTWmi = 7761, X86_VPROTWmr = 7762, X86_VPROTWri = 7763, X86_VPROTWrm = 7764, X86_VPROTWrr = 7765, X86_VPSADBWYrm = 7766, X86_VPSADBWYrr = 7767, X86_VPSADBWrm = 7768, X86_VPSADBWrr = 7769, X86_VPSCATTERDDZmr = 7770, X86_VPSCATTERDQZmr = 7771, X86_VPSCATTERQDZmr = 7772, X86_VPSCATTERQQZmr = 7773, X86_VPSHABmr = 7774, X86_VPSHABrm = 7775, X86_VPSHABrr = 7776, X86_VPSHADmr = 7777, X86_VPSHADrm = 7778, X86_VPSHADrr = 7779, X86_VPSHAQmr = 7780, X86_VPSHAQrm = 7781, X86_VPSHAQrr = 7782, X86_VPSHAWmr = 7783, X86_VPSHAWrm = 7784, X86_VPSHAWrr = 7785, X86_VPSHLBmr = 7786, X86_VPSHLBrm = 7787, X86_VPSHLBrr = 7788, X86_VPSHLDmr = 7789, X86_VPSHLDrm = 7790, X86_VPSHLDrr = 7791, X86_VPSHLQmr = 7792, X86_VPSHLQrm = 7793, X86_VPSHLQrr = 7794, X86_VPSHLWmr = 7795, X86_VPSHLWrm = 7796, X86_VPSHLWrr = 7797, X86_VPSHUFBYrm = 7798, X86_VPSHUFBYrr = 7799, X86_VPSHUFBrm = 7800, X86_VPSHUFBrr = 7801, X86_VPSHUFDYmi = 7802, X86_VPSHUFDYri = 7803, X86_VPSHUFDZmi = 7804, X86_VPSHUFDZri = 7805, X86_VPSHUFDmi = 7806, X86_VPSHUFDri = 7807, X86_VPSHUFHWYmi = 7808, X86_VPSHUFHWYri = 7809, X86_VPSHUFHWmi = 7810, X86_VPSHUFHWri = 7811, X86_VPSHUFLWYmi = 7812, X86_VPSHUFLWYri = 7813, X86_VPSHUFLWmi = 7814, X86_VPSHUFLWri = 7815, X86_VPSIGNBYrm = 7816, X86_VPSIGNBYrr = 7817, X86_VPSIGNBrm = 7818, X86_VPSIGNBrr = 7819, X86_VPSIGNDYrm = 7820, X86_VPSIGNDYrr = 7821, X86_VPSIGNDrm = 7822, X86_VPSIGNDrr = 7823, X86_VPSIGNWYrm = 7824, X86_VPSIGNWYrr = 7825, X86_VPSIGNWrm = 7826, X86_VPSIGNWrr = 7827, X86_VPSLLDQYri = 7828, X86_VPSLLDQri = 7829, X86_VPSLLDYri = 7830, X86_VPSLLDYrm = 7831, X86_VPSLLDYrr = 7832, X86_VPSLLDZmi = 7833, X86_VPSLLDZmik = 7834, X86_VPSLLDZmikz = 7835, X86_VPSLLDZri = 7836, X86_VPSLLDZrik = 7837, X86_VPSLLDZrikz = 7838, X86_VPSLLDZrm = 7839, X86_VPSLLDZrmk = 7840, X86_VPSLLDZrmkz = 7841, X86_VPSLLDZrr = 7842, X86_VPSLLDZrrk = 7843, X86_VPSLLDZrrkz = 7844, X86_VPSLLDri = 7845, X86_VPSLLDrm = 7846, X86_VPSLLDrr = 7847, X86_VPSLLQYri = 7848, X86_VPSLLQYrm = 7849, X86_VPSLLQYrr = 7850, X86_VPSLLQZmi = 7851, X86_VPSLLQZmik = 7852, X86_VPSLLQZmikz = 7853, X86_VPSLLQZri = 7854, X86_VPSLLQZrik = 7855, X86_VPSLLQZrikz = 7856, X86_VPSLLQZrm = 7857, X86_VPSLLQZrmk = 7858, X86_VPSLLQZrmkz = 7859, X86_VPSLLQZrr = 7860, X86_VPSLLQZrrk = 7861, X86_VPSLLQZrrkz = 7862, X86_VPSLLQri = 7863, X86_VPSLLQrm = 7864, X86_VPSLLQrr = 7865, X86_VPSLLVDYrm = 7866, X86_VPSLLVDYrr = 7867, X86_VPSLLVDZrm = 7868, X86_VPSLLVDZrmk = 7869, X86_VPSLLVDZrmkz = 7870, X86_VPSLLVDZrr = 7871, X86_VPSLLVDZrrk = 7872, X86_VPSLLVDZrrkz = 7873, X86_VPSLLVDrm = 7874, X86_VPSLLVDrr = 7875, X86_VPSLLVQYrm = 7876, X86_VPSLLVQYrr = 7877, X86_VPSLLVQZrm = 7878, X86_VPSLLVQZrmk = 7879, X86_VPSLLVQZrmkz = 7880, X86_VPSLLVQZrr = 7881, X86_VPSLLVQZrrk = 7882, X86_VPSLLVQZrrkz = 7883, X86_VPSLLVQrm = 7884, X86_VPSLLVQrr = 7885, X86_VPSLLWYri = 7886, X86_VPSLLWYrm = 7887, X86_VPSLLWYrr = 7888, X86_VPSLLWri = 7889, X86_VPSLLWrm = 7890, X86_VPSLLWrr = 7891, X86_VPSRADYri = 7892, X86_VPSRADYrm = 7893, X86_VPSRADYrr = 7894, X86_VPSRADZmi = 7895, X86_VPSRADZmik = 7896, X86_VPSRADZmikz = 7897, X86_VPSRADZri = 7898, X86_VPSRADZrik = 7899, X86_VPSRADZrikz = 7900, X86_VPSRADZrm = 7901, X86_VPSRADZrmk = 7902, X86_VPSRADZrmkz = 7903, X86_VPSRADZrr = 7904, X86_VPSRADZrrk = 7905, X86_VPSRADZrrkz = 7906, X86_VPSRADri = 7907, X86_VPSRADrm = 7908, X86_VPSRADrr = 7909, X86_VPSRAQZmi = 7910, X86_VPSRAQZmik = 7911, X86_VPSRAQZmikz = 7912, X86_VPSRAQZri = 7913, X86_VPSRAQZrik = 7914, X86_VPSRAQZrikz = 7915, X86_VPSRAQZrm = 7916, X86_VPSRAQZrmk = 7917, X86_VPSRAQZrmkz = 7918, X86_VPSRAQZrr = 7919, X86_VPSRAQZrrk = 7920, X86_VPSRAQZrrkz = 7921, X86_VPSRAVDYrm = 7922, X86_VPSRAVDYrr = 7923, X86_VPSRAVDZrm = 7924, X86_VPSRAVDZrmk = 7925, X86_VPSRAVDZrmkz = 7926, X86_VPSRAVDZrr = 7927, X86_VPSRAVDZrrk = 7928, X86_VPSRAVDZrrkz = 7929, X86_VPSRAVDrm = 7930, X86_VPSRAVDrr = 7931, X86_VPSRAVQZrm = 7932, X86_VPSRAVQZrmk = 7933, X86_VPSRAVQZrmkz = 7934, X86_VPSRAVQZrr = 7935, X86_VPSRAVQZrrk = 7936, X86_VPSRAVQZrrkz = 7937, X86_VPSRAWYri = 7938, X86_VPSRAWYrm = 7939, X86_VPSRAWYrr = 7940, X86_VPSRAWri = 7941, X86_VPSRAWrm = 7942, X86_VPSRAWrr = 7943, X86_VPSRLDQYri = 7944, X86_VPSRLDQri = 7945, X86_VPSRLDYri = 7946, X86_VPSRLDYrm = 7947, X86_VPSRLDYrr = 7948, X86_VPSRLDZmi = 7949, X86_VPSRLDZmik = 7950, X86_VPSRLDZmikz = 7951, X86_VPSRLDZri = 7952, X86_VPSRLDZrik = 7953, X86_VPSRLDZrikz = 7954, X86_VPSRLDZrm = 7955, X86_VPSRLDZrmk = 7956, X86_VPSRLDZrmkz = 7957, X86_VPSRLDZrr = 7958, X86_VPSRLDZrrk = 7959, X86_VPSRLDZrrkz = 7960, X86_VPSRLDri = 7961, X86_VPSRLDrm = 7962, X86_VPSRLDrr = 7963, X86_VPSRLQYri = 7964, X86_VPSRLQYrm = 7965, X86_VPSRLQYrr = 7966, X86_VPSRLQZmi = 7967, X86_VPSRLQZmik = 7968, X86_VPSRLQZmikz = 7969, X86_VPSRLQZri = 7970, X86_VPSRLQZrik = 7971, X86_VPSRLQZrikz = 7972, X86_VPSRLQZrm = 7973, X86_VPSRLQZrmk = 7974, X86_VPSRLQZrmkz = 7975, X86_VPSRLQZrr = 7976, X86_VPSRLQZrrk = 7977, X86_VPSRLQZrrkz = 7978, X86_VPSRLQri = 7979, X86_VPSRLQrm = 7980, X86_VPSRLQrr = 7981, X86_VPSRLVDYrm = 7982, X86_VPSRLVDYrr = 7983, X86_VPSRLVDZrm = 7984, X86_VPSRLVDZrmk = 7985, X86_VPSRLVDZrmkz = 7986, X86_VPSRLVDZrr = 7987, X86_VPSRLVDZrrk = 7988, X86_VPSRLVDZrrkz = 7989, X86_VPSRLVDrm = 7990, X86_VPSRLVDrr = 7991, X86_VPSRLVQYrm = 7992, X86_VPSRLVQYrr = 7993, X86_VPSRLVQZrm = 7994, X86_VPSRLVQZrmk = 7995, X86_VPSRLVQZrmkz = 7996, X86_VPSRLVQZrr = 7997, X86_VPSRLVQZrrk = 7998, X86_VPSRLVQZrrkz = 7999, X86_VPSRLVQrm = 8000, X86_VPSRLVQrr = 8001, X86_VPSRLWYri = 8002, X86_VPSRLWYrm = 8003, X86_VPSRLWYrr = 8004, X86_VPSRLWri = 8005, X86_VPSRLWrm = 8006, X86_VPSRLWrr = 8007, X86_VPSUBBYrm = 8008, X86_VPSUBBYrr = 8009, X86_VPSUBBZ128rm = 8010, X86_VPSUBBZ128rmk = 8011, X86_VPSUBBZ128rmkz = 8012, X86_VPSUBBZ128rr = 8013, X86_VPSUBBZ128rrk = 8014, X86_VPSUBBZ128rrkz = 8015, X86_VPSUBBZ256rm = 8016, X86_VPSUBBZ256rmk = 8017, X86_VPSUBBZ256rmkz = 8018, X86_VPSUBBZ256rr = 8019, X86_VPSUBBZ256rrk = 8020, X86_VPSUBBZ256rrkz = 8021, X86_VPSUBBZrm = 8022, X86_VPSUBBZrmk = 8023, X86_VPSUBBZrmkz = 8024, X86_VPSUBBZrr = 8025, X86_VPSUBBZrrk = 8026, X86_VPSUBBZrrkz = 8027, X86_VPSUBBrm = 8028, X86_VPSUBBrr = 8029, X86_VPSUBDYrm = 8030, X86_VPSUBDYrr = 8031, X86_VPSUBDZ128rm = 8032, X86_VPSUBDZ128rmb = 8033, X86_VPSUBDZ128rmbk = 8034, X86_VPSUBDZ128rmbkz = 8035, X86_VPSUBDZ128rmk = 8036, X86_VPSUBDZ128rmkz = 8037, X86_VPSUBDZ128rr = 8038, X86_VPSUBDZ128rrk = 8039, X86_VPSUBDZ128rrkz = 8040, X86_VPSUBDZ256rm = 8041, X86_VPSUBDZ256rmb = 8042, X86_VPSUBDZ256rmbk = 8043, X86_VPSUBDZ256rmbkz = 8044, X86_VPSUBDZ256rmk = 8045, X86_VPSUBDZ256rmkz = 8046, X86_VPSUBDZ256rr = 8047, X86_VPSUBDZ256rrk = 8048, X86_VPSUBDZ256rrkz = 8049, X86_VPSUBDZrm = 8050, X86_VPSUBDZrmb = 8051, X86_VPSUBDZrmbk = 8052, X86_VPSUBDZrmbkz = 8053, X86_VPSUBDZrmk = 8054, X86_VPSUBDZrmkz = 8055, X86_VPSUBDZrr = 8056, X86_VPSUBDZrrk = 8057, X86_VPSUBDZrrkz = 8058, X86_VPSUBDrm = 8059, X86_VPSUBDrr = 8060, X86_VPSUBQYrm = 8061, X86_VPSUBQYrr = 8062, X86_VPSUBQZ128rm = 8063, X86_VPSUBQZ128rmb = 8064, X86_VPSUBQZ128rmbk = 8065, X86_VPSUBQZ128rmbkz = 8066, X86_VPSUBQZ128rmk = 8067, X86_VPSUBQZ128rmkz = 8068, X86_VPSUBQZ128rr = 8069, X86_VPSUBQZ128rrk = 8070, X86_VPSUBQZ128rrkz = 8071, X86_VPSUBQZ256rm = 8072, X86_VPSUBQZ256rmb = 8073, X86_VPSUBQZ256rmbk = 8074, X86_VPSUBQZ256rmbkz = 8075, X86_VPSUBQZ256rmk = 8076, X86_VPSUBQZ256rmkz = 8077, X86_VPSUBQZ256rr = 8078, X86_VPSUBQZ256rrk = 8079, X86_VPSUBQZ256rrkz = 8080, X86_VPSUBQZrm = 8081, X86_VPSUBQZrmb = 8082, X86_VPSUBQZrmbk = 8083, X86_VPSUBQZrmbkz = 8084, X86_VPSUBQZrmk = 8085, X86_VPSUBQZrmkz = 8086, X86_VPSUBQZrr = 8087, X86_VPSUBQZrrk = 8088, X86_VPSUBQZrrkz = 8089, X86_VPSUBQrm = 8090, X86_VPSUBQrr = 8091, X86_VPSUBSBYrm = 8092, X86_VPSUBSBYrr = 8093, X86_VPSUBSBrm = 8094, X86_VPSUBSBrr = 8095, X86_VPSUBSWYrm = 8096, X86_VPSUBSWYrr = 8097, X86_VPSUBSWrm = 8098, X86_VPSUBSWrr = 8099, X86_VPSUBUSBYrm = 8100, X86_VPSUBUSBYrr = 8101, X86_VPSUBUSBrm = 8102, X86_VPSUBUSBrr = 8103, X86_VPSUBUSWYrm = 8104, X86_VPSUBUSWYrr = 8105, X86_VPSUBUSWrm = 8106, X86_VPSUBUSWrr = 8107, X86_VPSUBWYrm = 8108, X86_VPSUBWYrr = 8109, X86_VPSUBWZ128rm = 8110, X86_VPSUBWZ128rmk = 8111, X86_VPSUBWZ128rmkz = 8112, X86_VPSUBWZ128rr = 8113, X86_VPSUBWZ128rrk = 8114, X86_VPSUBWZ128rrkz = 8115, X86_VPSUBWZ256rm = 8116, X86_VPSUBWZ256rmk = 8117, X86_VPSUBWZ256rmkz = 8118, X86_VPSUBWZ256rr = 8119, X86_VPSUBWZ256rrk = 8120, X86_VPSUBWZ256rrkz = 8121, X86_VPSUBWZrm = 8122, X86_VPSUBWZrmk = 8123, X86_VPSUBWZrmkz = 8124, X86_VPSUBWZrr = 8125, X86_VPSUBWZrrk = 8126, X86_VPSUBWZrrkz = 8127, X86_VPSUBWrm = 8128, X86_VPSUBWrr = 8129, X86_VPTESTMDZrm = 8130, X86_VPTESTMDZrr = 8131, X86_VPTESTMQZrm = 8132, X86_VPTESTMQZrr = 8133, X86_VPTESTNMDZrm = 8134, X86_VPTESTNMDZrr = 8135, X86_VPTESTNMQZrm = 8136, X86_VPTESTNMQZrr = 8137, X86_VPTESTYrm = 8138, X86_VPTESTYrr = 8139, X86_VPTESTrm = 8140, X86_VPTESTrr = 8141, X86_VPUNPCKHBWYrm = 8142, X86_VPUNPCKHBWYrr = 8143, X86_VPUNPCKHBWrm = 8144, X86_VPUNPCKHBWrr = 8145, X86_VPUNPCKHDQYrm = 8146, X86_VPUNPCKHDQYrr = 8147, X86_VPUNPCKHDQZrm = 8148, X86_VPUNPCKHDQZrr = 8149, X86_VPUNPCKHDQrm = 8150, X86_VPUNPCKHDQrr = 8151, X86_VPUNPCKHQDQYrm = 8152, X86_VPUNPCKHQDQYrr = 8153, X86_VPUNPCKHQDQZrm = 8154, X86_VPUNPCKHQDQZrr = 8155, X86_VPUNPCKHQDQrm = 8156, X86_VPUNPCKHQDQrr = 8157, X86_VPUNPCKHWDYrm = 8158, X86_VPUNPCKHWDYrr = 8159, X86_VPUNPCKHWDrm = 8160, X86_VPUNPCKHWDrr = 8161, X86_VPUNPCKLBWYrm = 8162, X86_VPUNPCKLBWYrr = 8163, X86_VPUNPCKLBWrm = 8164, X86_VPUNPCKLBWrr = 8165, X86_VPUNPCKLDQYrm = 8166, X86_VPUNPCKLDQYrr = 8167, X86_VPUNPCKLDQZrm = 8168, X86_VPUNPCKLDQZrr = 8169, X86_VPUNPCKLDQrm = 8170, X86_VPUNPCKLDQrr = 8171, X86_VPUNPCKLQDQYrm = 8172, X86_VPUNPCKLQDQYrr = 8173, X86_VPUNPCKLQDQZrm = 8174, X86_VPUNPCKLQDQZrr = 8175, X86_VPUNPCKLQDQrm = 8176, X86_VPUNPCKLQDQrr = 8177, X86_VPUNPCKLWDYrm = 8178, X86_VPUNPCKLWDYrr = 8179, X86_VPUNPCKLWDrm = 8180, X86_VPUNPCKLWDrr = 8181, X86_VPXORDZ128rm = 8182, X86_VPXORDZ128rmb = 8183, X86_VPXORDZ128rmbk = 8184, X86_VPXORDZ128rmbkz = 8185, X86_VPXORDZ128rmk = 8186, X86_VPXORDZ128rmkz = 8187, X86_VPXORDZ128rr = 8188, X86_VPXORDZ128rrk = 8189, X86_VPXORDZ128rrkz = 8190, X86_VPXORDZ256rm = 8191, X86_VPXORDZ256rmb = 8192, X86_VPXORDZ256rmbk = 8193, X86_VPXORDZ256rmbkz = 8194, X86_VPXORDZ256rmk = 8195, X86_VPXORDZ256rmkz = 8196, X86_VPXORDZ256rr = 8197, X86_VPXORDZ256rrk = 8198, X86_VPXORDZ256rrkz = 8199, X86_VPXORDZrm = 8200, X86_VPXORDZrmb = 8201, X86_VPXORDZrmbk = 8202, X86_VPXORDZrmbkz = 8203, X86_VPXORDZrmk = 8204, X86_VPXORDZrmkz = 8205, X86_VPXORDZrr = 8206, X86_VPXORDZrrk = 8207, X86_VPXORDZrrkz = 8208, X86_VPXORQZ128rm = 8209, X86_VPXORQZ128rmb = 8210, X86_VPXORQZ128rmbk = 8211, X86_VPXORQZ128rmbkz = 8212, X86_VPXORQZ128rmk = 8213, X86_VPXORQZ128rmkz = 8214, X86_VPXORQZ128rr = 8215, X86_VPXORQZ128rrk = 8216, X86_VPXORQZ128rrkz = 8217, X86_VPXORQZ256rm = 8218, X86_VPXORQZ256rmb = 8219, X86_VPXORQZ256rmbk = 8220, X86_VPXORQZ256rmbkz = 8221, X86_VPXORQZ256rmk = 8222, X86_VPXORQZ256rmkz = 8223, X86_VPXORQZ256rr = 8224, X86_VPXORQZ256rrk = 8225, X86_VPXORQZ256rrkz = 8226, X86_VPXORQZrm = 8227, X86_VPXORQZrmb = 8228, X86_VPXORQZrmbk = 8229, X86_VPXORQZrmbkz = 8230, X86_VPXORQZrmk = 8231, X86_VPXORQZrmkz = 8232, X86_VPXORQZrr = 8233, X86_VPXORQZrrk = 8234, X86_VPXORQZrrkz = 8235, X86_VPXORYrm = 8236, X86_VPXORYrr = 8237, X86_VPXORrm = 8238, X86_VPXORrr = 8239, X86_VRCP14PDZ128m = 8240, X86_VRCP14PDZ128mb = 8241, X86_VRCP14PDZ128mbk = 8242, X86_VRCP14PDZ128mbkz = 8243, X86_VRCP14PDZ128mk = 8244, X86_VRCP14PDZ128mkz = 8245, X86_VRCP14PDZ128r = 8246, X86_VRCP14PDZ128rk = 8247, X86_VRCP14PDZ128rkz = 8248, X86_VRCP14PDZ256m = 8249, X86_VRCP14PDZ256mb = 8250, X86_VRCP14PDZ256mbk = 8251, X86_VRCP14PDZ256mbkz = 8252, X86_VRCP14PDZ256mk = 8253, X86_VRCP14PDZ256mkz = 8254, X86_VRCP14PDZ256r = 8255, X86_VRCP14PDZ256rk = 8256, X86_VRCP14PDZ256rkz = 8257, X86_VRCP14PDZm = 8258, X86_VRCP14PDZmb = 8259, X86_VRCP14PDZmbk = 8260, X86_VRCP14PDZmbkz = 8261, X86_VRCP14PDZmk = 8262, X86_VRCP14PDZmkz = 8263, X86_VRCP14PDZr = 8264, X86_VRCP14PDZrk = 8265, X86_VRCP14PDZrkz = 8266, X86_VRCP14PSZ128m = 8267, X86_VRCP14PSZ128mb = 8268, X86_VRCP14PSZ128mbk = 8269, X86_VRCP14PSZ128mbkz = 8270, X86_VRCP14PSZ128mk = 8271, X86_VRCP14PSZ128mkz = 8272, X86_VRCP14PSZ128r = 8273, X86_VRCP14PSZ128rk = 8274, X86_VRCP14PSZ128rkz = 8275, X86_VRCP14PSZ256m = 8276, X86_VRCP14PSZ256mb = 8277, X86_VRCP14PSZ256mbk = 8278, X86_VRCP14PSZ256mbkz = 8279, X86_VRCP14PSZ256mk = 8280, X86_VRCP14PSZ256mkz = 8281, X86_VRCP14PSZ256r = 8282, X86_VRCP14PSZ256rk = 8283, X86_VRCP14PSZ256rkz = 8284, X86_VRCP14PSZm = 8285, X86_VRCP14PSZmb = 8286, X86_VRCP14PSZmbk = 8287, X86_VRCP14PSZmbkz = 8288, X86_VRCP14PSZmk = 8289, X86_VRCP14PSZmkz = 8290, X86_VRCP14PSZr = 8291, X86_VRCP14PSZrk = 8292, X86_VRCP14PSZrkz = 8293, X86_VRCP14SDrm = 8294, X86_VRCP14SDrr = 8295, X86_VRCP14SSrm = 8296, X86_VRCP14SSrr = 8297, X86_VRCP28PDm = 8298, X86_VRCP28PDmb = 8299, X86_VRCP28PDmbk = 8300, X86_VRCP28PDmbkz = 8301, X86_VRCP28PDmk = 8302, X86_VRCP28PDmkz = 8303, X86_VRCP28PDr = 8304, X86_VRCP28PDrb = 8305, X86_VRCP28PDrbk = 8306, X86_VRCP28PDrbkz = 8307, X86_VRCP28PDrk = 8308, X86_VRCP28PDrkz = 8309, X86_VRCP28PSm = 8310, X86_VRCP28PSmb = 8311, X86_VRCP28PSmbk = 8312, X86_VRCP28PSmbkz = 8313, X86_VRCP28PSmk = 8314, X86_VRCP28PSmkz = 8315, X86_VRCP28PSr = 8316, X86_VRCP28PSrb = 8317, X86_VRCP28PSrbk = 8318, X86_VRCP28PSrbkz = 8319, X86_VRCP28PSrk = 8320, X86_VRCP28PSrkz = 8321, X86_VRCP28SDm = 8322, X86_VRCP28SDmk = 8323, X86_VRCP28SDmkz = 8324, X86_VRCP28SDr = 8325, X86_VRCP28SDrb = 8326, X86_VRCP28SDrbk = 8327, X86_VRCP28SDrbkz = 8328, X86_VRCP28SDrk = 8329, X86_VRCP28SDrkz = 8330, X86_VRCP28SSm = 8331, X86_VRCP28SSmk = 8332, X86_VRCP28SSmkz = 8333, X86_VRCP28SSr = 8334, X86_VRCP28SSrb = 8335, X86_VRCP28SSrbk = 8336, X86_VRCP28SSrbkz = 8337, X86_VRCP28SSrk = 8338, X86_VRCP28SSrkz = 8339, X86_VRCPPSYm = 8340, X86_VRCPPSYm_Int = 8341, X86_VRCPPSYr = 8342, X86_VRCPPSYr_Int = 8343, X86_VRCPPSm = 8344, X86_VRCPPSm_Int = 8345, X86_VRCPPSr = 8346, X86_VRCPPSr_Int = 8347, X86_VRCPSSm = 8348, X86_VRCPSSm_Int = 8349, X86_VRCPSSr = 8350, X86_VRNDSCALEPDZm = 8351, X86_VRNDSCALEPDZr = 8352, X86_VRNDSCALEPSZm = 8353, X86_VRNDSCALEPSZr = 8354, X86_VRNDSCALESDm = 8355, X86_VRNDSCALESDmk = 8356, X86_VRNDSCALESDmkz = 8357, X86_VRNDSCALESDr = 8358, X86_VRNDSCALESDrb = 8359, X86_VRNDSCALESDrbk = 8360, X86_VRNDSCALESDrbkz = 8361, X86_VRNDSCALESDrk = 8362, X86_VRNDSCALESDrkz = 8363, X86_VRNDSCALESSm = 8364, X86_VRNDSCALESSmk = 8365, X86_VRNDSCALESSmkz = 8366, X86_VRNDSCALESSr = 8367, X86_VRNDSCALESSrb = 8368, X86_VRNDSCALESSrbk = 8369, X86_VRNDSCALESSrbkz = 8370, X86_VRNDSCALESSrk = 8371, X86_VRNDSCALESSrkz = 8372, X86_VROUNDPDm = 8373, X86_VROUNDPDr = 8374, X86_VROUNDPSm = 8375, X86_VROUNDPSr = 8376, X86_VROUNDSDm = 8377, X86_VROUNDSDr = 8378, X86_VROUNDSDr_Int = 8379, X86_VROUNDSSm = 8380, X86_VROUNDSSr = 8381, X86_VROUNDSSr_Int = 8382, X86_VROUNDYPDm = 8383, X86_VROUNDYPDr = 8384, X86_VROUNDYPSm = 8385, X86_VROUNDYPSr = 8386, X86_VRSQRT14PDZ128m = 8387, X86_VRSQRT14PDZ128mb = 8388, X86_VRSQRT14PDZ128mbk = 8389, X86_VRSQRT14PDZ128mbkz = 8390, X86_VRSQRT14PDZ128mk = 8391, X86_VRSQRT14PDZ128mkz = 8392, X86_VRSQRT14PDZ128r = 8393, X86_VRSQRT14PDZ128rk = 8394, X86_VRSQRT14PDZ128rkz = 8395, X86_VRSQRT14PDZ256m = 8396, X86_VRSQRT14PDZ256mb = 8397, X86_VRSQRT14PDZ256mbk = 8398, X86_VRSQRT14PDZ256mbkz = 8399, X86_VRSQRT14PDZ256mk = 8400, X86_VRSQRT14PDZ256mkz = 8401, X86_VRSQRT14PDZ256r = 8402, X86_VRSQRT14PDZ256rk = 8403, X86_VRSQRT14PDZ256rkz = 8404, X86_VRSQRT14PDZm = 8405, X86_VRSQRT14PDZmb = 8406, X86_VRSQRT14PDZmbk = 8407, X86_VRSQRT14PDZmbkz = 8408, X86_VRSQRT14PDZmk = 8409, X86_VRSQRT14PDZmkz = 8410, X86_VRSQRT14PDZr = 8411, X86_VRSQRT14PDZrk = 8412, X86_VRSQRT14PDZrkz = 8413, X86_VRSQRT14PSZ128m = 8414, X86_VRSQRT14PSZ128mb = 8415, X86_VRSQRT14PSZ128mbk = 8416, X86_VRSQRT14PSZ128mbkz = 8417, X86_VRSQRT14PSZ128mk = 8418, X86_VRSQRT14PSZ128mkz = 8419, X86_VRSQRT14PSZ128r = 8420, X86_VRSQRT14PSZ128rk = 8421, X86_VRSQRT14PSZ128rkz = 8422, X86_VRSQRT14PSZ256m = 8423, X86_VRSQRT14PSZ256mb = 8424, X86_VRSQRT14PSZ256mbk = 8425, X86_VRSQRT14PSZ256mbkz = 8426, X86_VRSQRT14PSZ256mk = 8427, X86_VRSQRT14PSZ256mkz = 8428, X86_VRSQRT14PSZ256r = 8429, X86_VRSQRT14PSZ256rk = 8430, X86_VRSQRT14PSZ256rkz = 8431, X86_VRSQRT14PSZm = 8432, X86_VRSQRT14PSZmb = 8433, X86_VRSQRT14PSZmbk = 8434, X86_VRSQRT14PSZmbkz = 8435, X86_VRSQRT14PSZmk = 8436, X86_VRSQRT14PSZmkz = 8437, X86_VRSQRT14PSZr = 8438, X86_VRSQRT14PSZrk = 8439, X86_VRSQRT14PSZrkz = 8440, X86_VRSQRT14SDrm = 8441, X86_VRSQRT14SDrr = 8442, X86_VRSQRT14SSrm = 8443, X86_VRSQRT14SSrr = 8444, X86_VRSQRT28PDm = 8445, X86_VRSQRT28PDmb = 8446, X86_VRSQRT28PDmbk = 8447, X86_VRSQRT28PDmbkz = 8448, X86_VRSQRT28PDmk = 8449, X86_VRSQRT28PDmkz = 8450, X86_VRSQRT28PDr = 8451, X86_VRSQRT28PDrb = 8452, X86_VRSQRT28PDrbk = 8453, X86_VRSQRT28PDrbkz = 8454, X86_VRSQRT28PDrk = 8455, X86_VRSQRT28PDrkz = 8456, X86_VRSQRT28PSm = 8457, X86_VRSQRT28PSmb = 8458, X86_VRSQRT28PSmbk = 8459, X86_VRSQRT28PSmbkz = 8460, X86_VRSQRT28PSmk = 8461, X86_VRSQRT28PSmkz = 8462, X86_VRSQRT28PSr = 8463, X86_VRSQRT28PSrb = 8464, X86_VRSQRT28PSrbk = 8465, X86_VRSQRT28PSrbkz = 8466, X86_VRSQRT28PSrk = 8467, X86_VRSQRT28PSrkz = 8468, X86_VRSQRT28SDm = 8469, X86_VRSQRT28SDmk = 8470, X86_VRSQRT28SDmkz = 8471, X86_VRSQRT28SDr = 8472, X86_VRSQRT28SDrb = 8473, X86_VRSQRT28SDrbk = 8474, X86_VRSQRT28SDrbkz = 8475, X86_VRSQRT28SDrk = 8476, X86_VRSQRT28SDrkz = 8477, X86_VRSQRT28SSm = 8478, X86_VRSQRT28SSmk = 8479, X86_VRSQRT28SSmkz = 8480, X86_VRSQRT28SSr = 8481, X86_VRSQRT28SSrb = 8482, X86_VRSQRT28SSrbk = 8483, X86_VRSQRT28SSrbkz = 8484, X86_VRSQRT28SSrk = 8485, X86_VRSQRT28SSrkz = 8486, X86_VRSQRTPSYm = 8487, X86_VRSQRTPSYm_Int = 8488, X86_VRSQRTPSYr = 8489, X86_VRSQRTPSYr_Int = 8490, X86_VRSQRTPSm = 8491, X86_VRSQRTPSm_Int = 8492, X86_VRSQRTPSr = 8493, X86_VRSQRTPSr_Int = 8494, X86_VRSQRTSSm = 8495, X86_VRSQRTSSm_Int = 8496, X86_VRSQRTSSr = 8497, X86_VSCATTERDPDZmr = 8498, X86_VSCATTERDPSZmr = 8499, X86_VSCATTERPF0DPDm = 8500, X86_VSCATTERPF0DPSm = 8501, X86_VSCATTERPF0QPDm = 8502, X86_VSCATTERPF0QPSm = 8503, X86_VSCATTERPF1DPDm = 8504, X86_VSCATTERPF1DPSm = 8505, X86_VSCATTERPF1QPDm = 8506, X86_VSCATTERPF1QPSm = 8507, X86_VSCATTERQPDZmr = 8508, X86_VSCATTERQPSZmr = 8509, X86_VSHUFPDYrmi = 8510, X86_VSHUFPDYrri = 8511, X86_VSHUFPDZrmi = 8512, X86_VSHUFPDZrri = 8513, X86_VSHUFPDrmi = 8514, X86_VSHUFPDrri = 8515, X86_VSHUFPSYrmi = 8516, X86_VSHUFPSYrri = 8517, X86_VSHUFPSZrmi = 8518, X86_VSHUFPSZrri = 8519, X86_VSHUFPSrmi = 8520, X86_VSHUFPSrri = 8521, X86_VSQRTPDYm = 8522, X86_VSQRTPDYr = 8523, X86_VSQRTPDZ128m = 8524, X86_VSQRTPDZ128mb = 8525, X86_VSQRTPDZ128mbk = 8526, X86_VSQRTPDZ128mbkz = 8527, X86_VSQRTPDZ128mk = 8528, X86_VSQRTPDZ128mkz = 8529, X86_VSQRTPDZ128r = 8530, X86_VSQRTPDZ128rk = 8531, X86_VSQRTPDZ128rkz = 8532, X86_VSQRTPDZ256m = 8533, X86_VSQRTPDZ256mb = 8534, X86_VSQRTPDZ256mbk = 8535, X86_VSQRTPDZ256mbkz = 8536, X86_VSQRTPDZ256mk = 8537, X86_VSQRTPDZ256mkz = 8538, X86_VSQRTPDZ256r = 8539, X86_VSQRTPDZ256rk = 8540, X86_VSQRTPDZ256rkz = 8541, X86_VSQRTPDZm = 8542, X86_VSQRTPDZmb = 8543, X86_VSQRTPDZmbk = 8544, X86_VSQRTPDZmbkz = 8545, X86_VSQRTPDZmk = 8546, X86_VSQRTPDZmkz = 8547, X86_VSQRTPDZr = 8548, X86_VSQRTPDZrk = 8549, X86_VSQRTPDZrkz = 8550, X86_VSQRTPDm = 8551, X86_VSQRTPDr = 8552, X86_VSQRTPSYm = 8553, X86_VSQRTPSYr = 8554, X86_VSQRTPSZ128m = 8555, X86_VSQRTPSZ128mb = 8556, X86_VSQRTPSZ128mbk = 8557, X86_VSQRTPSZ128mbkz = 8558, X86_VSQRTPSZ128mk = 8559, X86_VSQRTPSZ128mkz = 8560, X86_VSQRTPSZ128r = 8561, X86_VSQRTPSZ128rk = 8562, X86_VSQRTPSZ128rkz = 8563, X86_VSQRTPSZ256m = 8564, X86_VSQRTPSZ256mb = 8565, X86_VSQRTPSZ256mbk = 8566, X86_VSQRTPSZ256mbkz = 8567, X86_VSQRTPSZ256mk = 8568, X86_VSQRTPSZ256mkz = 8569, X86_VSQRTPSZ256r = 8570, X86_VSQRTPSZ256rk = 8571, X86_VSQRTPSZ256rkz = 8572, X86_VSQRTPSZm = 8573, X86_VSQRTPSZmb = 8574, X86_VSQRTPSZmbk = 8575, X86_VSQRTPSZmbkz = 8576, X86_VSQRTPSZmk = 8577, X86_VSQRTPSZmkz = 8578, X86_VSQRTPSZr = 8579, X86_VSQRTPSZrk = 8580, X86_VSQRTPSZrkz = 8581, X86_VSQRTPSm = 8582, X86_VSQRTPSr = 8583, X86_VSQRTSDZm = 8584, X86_VSQRTSDZm_Int = 8585, X86_VSQRTSDZr = 8586, X86_VSQRTSDZr_Int = 8587, X86_VSQRTSDm = 8588, X86_VSQRTSDm_Int = 8589, X86_VSQRTSDr = 8590, X86_VSQRTSSZm = 8591, X86_VSQRTSSZm_Int = 8592, X86_VSQRTSSZr = 8593, X86_VSQRTSSZr_Int = 8594, X86_VSQRTSSm = 8595, X86_VSQRTSSm_Int = 8596, X86_VSQRTSSr = 8597, X86_VSTMXCSR = 8598, X86_VSUBPDYrm = 8599, X86_VSUBPDYrr = 8600, X86_VSUBPDZ128rm = 8601, X86_VSUBPDZ128rmb = 8602, X86_VSUBPDZ128rmbk = 8603, X86_VSUBPDZ128rmbkz = 8604, X86_VSUBPDZ128rmk = 8605, X86_VSUBPDZ128rmkz = 8606, X86_VSUBPDZ128rr = 8607, X86_VSUBPDZ128rrk = 8608, X86_VSUBPDZ128rrkz = 8609, X86_VSUBPDZ256rm = 8610, X86_VSUBPDZ256rmb = 8611, X86_VSUBPDZ256rmbk = 8612, X86_VSUBPDZ256rmbkz = 8613, X86_VSUBPDZ256rmk = 8614, X86_VSUBPDZ256rmkz = 8615, X86_VSUBPDZ256rr = 8616, X86_VSUBPDZ256rrk = 8617, X86_VSUBPDZ256rrkz = 8618, X86_VSUBPDZrb = 8619, X86_VSUBPDZrbk = 8620, X86_VSUBPDZrbkz = 8621, X86_VSUBPDZrm = 8622, X86_VSUBPDZrmb = 8623, X86_VSUBPDZrmbk = 8624, X86_VSUBPDZrmbkz = 8625, X86_VSUBPDZrmk = 8626, X86_VSUBPDZrmkz = 8627, X86_VSUBPDZrr = 8628, X86_VSUBPDZrrk = 8629, X86_VSUBPDZrrkz = 8630, X86_VSUBPDrm = 8631, X86_VSUBPDrr = 8632, X86_VSUBPSYrm = 8633, X86_VSUBPSYrr = 8634, X86_VSUBPSZ128rm = 8635, X86_VSUBPSZ128rmb = 8636, X86_VSUBPSZ128rmbk = 8637, X86_VSUBPSZ128rmbkz = 8638, X86_VSUBPSZ128rmk = 8639, X86_VSUBPSZ128rmkz = 8640, X86_VSUBPSZ128rr = 8641, X86_VSUBPSZ128rrk = 8642, X86_VSUBPSZ128rrkz = 8643, X86_VSUBPSZ256rm = 8644, X86_VSUBPSZ256rmb = 8645, X86_VSUBPSZ256rmbk = 8646, X86_VSUBPSZ256rmbkz = 8647, X86_VSUBPSZ256rmk = 8648, X86_VSUBPSZ256rmkz = 8649, X86_VSUBPSZ256rr = 8650, X86_VSUBPSZ256rrk = 8651, X86_VSUBPSZ256rrkz = 8652, X86_VSUBPSZrb = 8653, X86_VSUBPSZrbk = 8654, X86_VSUBPSZrbkz = 8655, X86_VSUBPSZrm = 8656, X86_VSUBPSZrmb = 8657, X86_VSUBPSZrmbk = 8658, X86_VSUBPSZrmbkz = 8659, X86_VSUBPSZrmk = 8660, X86_VSUBPSZrmkz = 8661, X86_VSUBPSZrr = 8662, X86_VSUBPSZrrk = 8663, X86_VSUBPSZrrkz = 8664, X86_VSUBPSrm = 8665, X86_VSUBPSrr = 8666, X86_VSUBSDZrm = 8667, X86_VSUBSDZrm_Int = 8668, X86_VSUBSDZrm_Intk = 8669, X86_VSUBSDZrm_Intkz = 8670, X86_VSUBSDZrr = 8671, X86_VSUBSDZrr_Int = 8672, X86_VSUBSDZrr_Intk = 8673, X86_VSUBSDZrr_Intkz = 8674, X86_VSUBSDZrrb = 8675, X86_VSUBSDZrrbk = 8676, X86_VSUBSDZrrbkz = 8677, X86_VSUBSDrm = 8678, X86_VSUBSDrm_Int = 8679, X86_VSUBSDrr = 8680, X86_VSUBSDrr_Int = 8681, X86_VSUBSSZrm = 8682, X86_VSUBSSZrm_Int = 8683, X86_VSUBSSZrm_Intk = 8684, X86_VSUBSSZrm_Intkz = 8685, X86_VSUBSSZrr = 8686, X86_VSUBSSZrr_Int = 8687, X86_VSUBSSZrr_Intk = 8688, X86_VSUBSSZrr_Intkz = 8689, X86_VSUBSSZrrb = 8690, X86_VSUBSSZrrbk = 8691, X86_VSUBSSZrrbkz = 8692, X86_VSUBSSrm = 8693, X86_VSUBSSrm_Int = 8694, X86_VSUBSSrr = 8695, X86_VSUBSSrr_Int = 8696, X86_VTESTPDYrm = 8697, X86_VTESTPDYrr = 8698, X86_VTESTPDrm = 8699, X86_VTESTPDrr = 8700, X86_VTESTPSYrm = 8701, X86_VTESTPSYrr = 8702, X86_VTESTPSrm = 8703, X86_VTESTPSrr = 8704, X86_VUCOMISDZrm = 8705, X86_VUCOMISDZrr = 8706, X86_VUCOMISDrm = 8707, X86_VUCOMISDrr = 8708, X86_VUCOMISSZrm = 8709, X86_VUCOMISSZrr = 8710, X86_VUCOMISSrm = 8711, X86_VUCOMISSrr = 8712, X86_VUNPCKHPDYrm = 8713, X86_VUNPCKHPDYrr = 8714, X86_VUNPCKHPDZrm = 8715, X86_VUNPCKHPDZrr = 8716, X86_VUNPCKHPDrm = 8717, X86_VUNPCKHPDrr = 8718, X86_VUNPCKHPSYrm = 8719, X86_VUNPCKHPSYrr = 8720, X86_VUNPCKHPSZrm = 8721, X86_VUNPCKHPSZrr = 8722, X86_VUNPCKHPSrm = 8723, X86_VUNPCKHPSrr = 8724, X86_VUNPCKLPDYrm = 8725, X86_VUNPCKLPDYrr = 8726, X86_VUNPCKLPDZrm = 8727, X86_VUNPCKLPDZrr = 8728, X86_VUNPCKLPDrm = 8729, X86_VUNPCKLPDrr = 8730, X86_VUNPCKLPSYrm = 8731, X86_VUNPCKLPSYrr = 8732, X86_VUNPCKLPSZrm = 8733, X86_VUNPCKLPSZrr = 8734, X86_VUNPCKLPSrm = 8735, X86_VUNPCKLPSrr = 8736, X86_VXORPDYrm = 8737, X86_VXORPDYrr = 8738, X86_VXORPDrm = 8739, X86_VXORPDrr = 8740, X86_VXORPSYrm = 8741, X86_VXORPSYrr = 8742, X86_VXORPSrm = 8743, X86_VXORPSrr = 8744, X86_VZEROALL = 8745, X86_VZEROUPPER = 8746, X86_V_SET0 = 8747, X86_V_SETALLONES = 8748, X86_WAIT = 8749, X86_WBINVD = 8750, X86_WIN_ALLOCA = 8751, X86_WIN_FTOL_32 = 8752, X86_WIN_FTOL_64 = 8753, X86_WRFSBASE = 8754, X86_WRFSBASE64 = 8755, X86_WRGSBASE = 8756, X86_WRGSBASE64 = 8757, X86_WRMSR = 8758, X86_XABORT = 8759, X86_XACQUIRE_PREFIX = 8760, X86_XADD16rm = 8761, X86_XADD16rr = 8762, X86_XADD32rm = 8763, X86_XADD32rr = 8764, X86_XADD64rm = 8765, X86_XADD64rr = 8766, X86_XADD8rm = 8767, X86_XADD8rr = 8768, X86_XBEGIN = 8769, X86_XBEGIN_2 = 8770, X86_XBEGIN_4 = 8771, X86_XCHG16ar = 8772, X86_XCHG16rm = 8773, X86_XCHG16rr = 8774, X86_XCHG32ar = 8775, X86_XCHG32ar64 = 8776, X86_XCHG32rm = 8777, X86_XCHG32rr = 8778, X86_XCHG64ar = 8779, X86_XCHG64rm = 8780, X86_XCHG64rr = 8781, X86_XCHG8rm = 8782, X86_XCHG8rr = 8783, X86_XCH_F = 8784, X86_XCRYPTCBC = 8785, X86_XCRYPTCFB = 8786, X86_XCRYPTCTR = 8787, X86_XCRYPTECB = 8788, X86_XCRYPTOFB = 8789, X86_XEND = 8790, X86_XGETBV = 8791, X86_XLAT = 8792, X86_XOR16i16 = 8793, X86_XOR16mi = 8794, X86_XOR16mi8 = 8795, X86_XOR16mr = 8796, X86_XOR16ri = 8797, X86_XOR16ri8 = 8798, X86_XOR16rm = 8799, X86_XOR16rr = 8800, X86_XOR16rr_REV = 8801, X86_XOR32i32 = 8802, X86_XOR32mi = 8803, X86_XOR32mi8 = 8804, X86_XOR32mr = 8805, X86_XOR32ri = 8806, X86_XOR32ri8 = 8807, X86_XOR32rm = 8808, X86_XOR32rr = 8809, X86_XOR32rr_REV = 8810, X86_XOR64i32 = 8811, X86_XOR64mi32 = 8812, X86_XOR64mi8 = 8813, X86_XOR64mr = 8814, X86_XOR64ri32 = 8815, X86_XOR64ri8 = 8816, X86_XOR64rm = 8817, X86_XOR64rr = 8818, X86_XOR64rr_REV = 8819, X86_XOR8i8 = 8820, X86_XOR8mi = 8821, X86_XOR8mi8 = 8822, X86_XOR8mr = 8823, X86_XOR8ri = 8824, X86_XOR8ri8 = 8825, X86_XOR8rm = 8826, X86_XOR8rr = 8827, X86_XOR8rr_REV = 8828, X86_XORPDrm = 8829, X86_XORPDrr = 8830, X86_XORPSrm = 8831, X86_XORPSrr = 8832, X86_XRELEASE_PREFIX = 8833, X86_XRSTOR = 8834, X86_XRSTOR64 = 8835, X86_XRSTORS = 8836, X86_XRSTORS64 = 8837, X86_XSAVE = 8838, X86_XSAVE64 = 8839, X86_XSAVEC = 8840, X86_XSAVEC64 = 8841, X86_XSAVEOPT = 8842, X86_XSAVEOPT64 = 8843, X86_XSAVES = 8844, X86_XSAVES64 = 8845, X86_XSETBV = 8846, X86_XSHA1 = 8847, X86_XSHA256 = 8848, X86_XSTORE = 8849, X86_XTEST = 8850, X86_fdisi8087_nop = 8851, X86_feni8087_nop = 8852, X86_UD0 = 8853, X86_ENDBR32 = 8854, X86_ENDBR64 = 8855, X86_INSTRUCTION_LIST_END = 8856 }; #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC typedef struct x86_op_id_pair { uint16_t first; uint16_t second; } x86_op_id_pair; static const x86_op_id_pair x86_16_bit_eq_tbl[] = { { 31, 30 }, { 32, 30 }, { 43, 34 }, { 44, 35 }, { 45, 36 }, { 46, 37 }, { 47, 38 }, { 48, 39 }, { 49, 40 }, { 50, 41 }, { 51, 42 }, { 52, 34 }, { 54, 36 }, { 55, 37 }, { 57, 39 }, { 58, 40 }, { 59, 41 }, { 60, 42 }, { 86, 74 }, { 87, 75 }, { 88, 76 }, { 89, 77 }, { 90, 78 }, { 91, 79 }, { 92, 80 }, { 93, 81 }, { 94, 82 }, { 95, 83 }, { 96, 84 }, { 97, 85 }, { 98, 74 }, { 100, 76 }, { 101, 77 }, { 104, 79 }, { 105, 80 }, { 106, 82 }, { 107, 83 }, { 108, 84 }, { 109, 85 }, { 138, 137 }, { 152, 149 }, { 153, 150 }, { 154, 151 }, { 185, 176 }, { 186, 177 }, { 187, 178 }, { 188, 179 }, { 189, 180 }, { 190, 181 }, { 191, 182 }, { 192, 183 }, { 193, 184 }, { 194, 176 }, { 196, 178 }, { 197, 179 }, { 199, 181 }, { 200, 182 }, { 201, 183 }, { 202, 184 }, { 286, 285 }, { 289, 287 }, { 290, 288 }, { 291, 287 }, { 292, 288 }, { 295, 293 }, { 296, 294 }, { 297, 293 }, { 298, 294 }, { 305, 301 }, { 306, 302 }, { 307, 303 }, { 308, 304 }, { 309, 301 }, { 310, 302 }, { 311, 303 }, { 312, 304 }, { 317, 313 }, { 318, 314 }, { 319, 315 }, { 320, 316 }, { 321, 313 }, { 322, 314 }, { 323, 315 }, { 324, 316 }, { 329, 325 }, { 330, 326 }, { 331, 327 }, { 332, 328 }, { 333, 325 }, { 334, 326 }, { 335, 327 }, { 336, 328 }, { 341, 337 }, { 342, 338 }, { 343, 339 }, { 344, 340 }, { 345, 337 }, { 346, 338 }, { 347, 339 }, { 348, 340 }, { 355, 353 }, { 356, 354 }, { 357, 353 }, { 359, 354 }, { 361, 360 }, { 371, 658 }, { 381, 379 }, { 382, 380 }, { 383, 379 }, { 384, 380 }, { 387, 385 }, { 388, 386 }, { 389, 385 }, { 390, 386 }, { 393, 391 }, { 394, 392 }, { 395, 391 }, { 396, 392 }, { 399, 397 }, { 400, 398 }, { 401, 397 }, { 402, 398 }, { 413, 411 }, { 414, 412 }, { 415, 411 }, { 416, 412 }, { 423, 421 }, { 424, 422 }, { 425, 421 }, { 426, 422 }, { 429, 427 }, { 430, 428 }, { 431, 427 }, { 432, 428 }, { 435, 433 }, { 436, 434 }, { 437, 433 }, { 438, 434 }, { 441, 439 }, { 442, 440 }, { 443, 439 }, { 444, 440 }, { 455, 453 }, { 456, 454 }, { 457, 453 }, { 458, 454 }, { 465, 463 }, { 466, 464 }, { 467, 463 }, { 468, 464 }, { 471, 469 }, { 472, 470 }, { 473, 469 }, { 474, 470 }, { 481, 479 }, { 482, 480 }, { 483, 479 }, { 484, 480 }, { 487, 485 }, { 488, 486 }, { 489, 485 }, { 490, 486 }, { 493, 491 }, { 494, 492 }, { 495, 491 }, { 496, 492 }, { 503, 501 }, { 504, 502 }, { 505, 501 }, { 506, 502 }, { 510, 509 }, { 533, 524 }, { 534, 525 }, { 535, 526 }, { 536, 527 }, { 537, 528 }, { 538, 529 }, { 539, 530 }, { 540, 531 }, { 541, 532 }, { 542, 524 }, { 544, 526 }, { 545, 527 }, { 547, 529 }, { 548, 530 }, { 549, 531 }, { 550, 532 }, { 573, 579 }, { 574, 579 }, { 583, 581 }, { 584, 582 }, { 585, 581 }, { 586, 582 }, { 605, 604 }, { 608, 607 }, { 666, 663 }, { 667, 664 }, { 668, 665 }, { 669, 663 }, { 670, 664 }, { 675, 673 }, { 676, 674 }, { 677, 673 }, { 678, 674 }, { 688, 687 }, { 699, 696 }, { 700, 697 }, { 701, 698 }, { 714, 713 }, { 728, 725 }, { 729, 726 }, { 730, 727 }, { 753, 751 }, { 754, 752 }, { 758, 756 }, { 759, 757 }, { 772, 771 }, { 774, 773 }, { 790, 789 }, { 791, 789 }, { 793, 792 }, { 794, 792 }, { 796, 795 }, { 797, 795 }, { 868, 866 }, { 869, 867 }, { 870, 866 }, { 871, 867 }, { 875, 874 }, { 876, 874 }, { 880, 877 }, { 881, 878 }, { 882, 879 }, { 883, 877 }, { 884, 878 }, { 885, 879 }, { 894, 886 }, { 895, 887 }, { 896, 888 }, { 897, 889 }, { 898, 890 }, { 899, 891 }, { 900, 892 }, { 901, 893 }, { 902, 886 }, { 903, 887 }, { 904, 888 }, { 906, 890 }, { 907, 891 }, { 909, 893 }, { 914, 912 }, { 915, 913 }, { 921, 918 }, { 922, 919 }, { 923, 920 }, { 924, 918 }, { 925, 919 }, { 933, 934 }, { 937, 936 }, { 950, 949 }, { 951, 949 }, { 953, 952 }, { 954, 952 }, { 958, 955 }, { 959, 956 }, { 960, 957 }, { 961, 955 }, { 962, 956 }, { 963, 957 }, { 965, 964 }, { 967, 966 }, { 968, 966 }, { 972, 969 }, { 973, 970 }, { 974, 971 }, { 975, 969 }, { 976, 970 }, { 977, 971 }, { 1114, 1112 }, { 1115, 1113 }, { 1116, 1112 }, { 1117, 1113 }, { 1147, 1148 }, { 1149, 1150 }, { 1161, 1166 }, { 1162, 1167 }, { 1163, 1168 }, { 1164, 1169 }, { 1165, 1170 }, { 1173, 1174 }, { 1177, 1182 }, { 1180, 1181 }, { 1189, 1190 }, { 1193, 1194 }, { 1198, 1199 }, { 1202, 1203 }, { 1207, 1205 }, { 1208, 1206 }, { 1209, 1205 }, { 1210, 1206 }, { 1213, 1211 }, { 1214, 1211 }, { 1220, 1219 }, { 1240, 1239 }, { 1242, 1239 }, { 1246, 1245 }, { 1249, 1248 }, { 1250, 1248 }, { 1252, 1251 }, { 1253, 1251 }, { 1255, 1254 }, { 1256, 1254 }, { 1258, 1257 }, { 1259, 1257 }, { 1267, 1264 }, { 1268, 1265 }, { 1269, 1266 }, { 1271, 1265 }, { 1272, 1266 }, { 1278, 1275 }, { 1279, 1276 }, { 1280, 1277 }, { 1282, 1276 }, { 1283, 1277 }, { 1287, 1286 }, { 1288, 1286 }, { 1291, 1290 }, { 1292, 1290 }, { 1297, 1294 }, { 1298, 1295 }, { 1299, 1296 }, { 1301, 1295 }, { 1302, 1296 }, { 1309, 1306 }, { 1310, 1307 }, { 1311, 1308 }, { 1313, 1307 }, { 1314, 1308 }, { 1320, 1317 }, { 1321, 1318 }, { 1322, 1319 }, { 1324, 1318 }, { 1325, 1319 }, { 1329, 1331 }, { 1330, 1331 }, { 1335, 1337 }, { 1336, 1337 }, { 1338, 1340 }, { 1339, 1340 }, { 1343, 1341 }, { 1344, 1342 }, { 1345, 1341 }, { 1346, 1342 }, { 1348, 1347 }, { 1349, 1347 }, { 1353, 1352 }, { 1354, 1352 }, { 1358, 1356 }, { 1359, 1357 }, { 1360, 1356 }, { 1361, 1357 }, { 1453, 1463 }, { 1454, 1464 }, { 1542, 1545 }, { 1543, 1546 }, { 1544, 1547 }, { 1557, 1560 }, { 1558, 1561 }, { 1559, 1562 }, { 1567, 1577 }, { 1568, 1578 }, { 1599, 1598 }, { 1600, 1598 }, { 1605, 1604 }, { 1606, 1604 }, { 1615, 1598 }, { 1616, 1598 }, { 1616, 1599 }, { 1616, 1615 }, { 1617, 1598 }, { 1617, 1600 }, { 1617, 1615 }, { 1620, 1601 }, { 1621, 1602 }, { 1622, 1603 }, { 1623, 1604 }, { 1624, 1604 }, { 1624, 1605 }, { 1624, 1623 }, { 1625, 1604 }, { 1625, 1606 }, { 1625, 1623 }, { 1629, 1607 }, { 1631, 1608 }, { 1632, 1609 }, { 1633, 1610 }, { 1634, 1611 }, { 1635, 1612 }, { 1636, 1613 }, { 1637, 1614 }, { 1638, 1598 }, { 1638, 1599 }, { 1639, 1598 }, { 1639, 1600 }, { 1643, 1602 }, { 1644, 1603 }, { 1645, 1604 }, { 1645, 1605 }, { 1646, 1604 }, { 1646, 1606 }, { 1649, 1607 }, { 1651, 1609 }, { 1652, 1610 }, { 1653, 1611 }, { 1654, 1612 }, { 1655, 1613 }, { 1656, 1614 }, { 1662, 1661 }, { 1663, 1661 }, { 1668, 1667 }, { 1669, 1667 }, { 1687, 1685 }, { 1688, 1686 }, { 1689, 1685 }, { 1690, 1686 }, { 1742, 1752 }, { 1745, 1752 }, { 1758, 1753 }, { 1760, 1754 }, { 1763, 1762 }, { 1765, 1753 }, { 1767, 1766 }, { 1768, 1754 }, { 1786, 1781 }, { 1788, 1782 }, { 1797, 1795 }, { 1798, 1796 }, { 1799, 1795 }, { 1800, 1796 }, { 1822, 1821 }, { 1836, 1833 }, { 1837, 1834 }, { 1838, 1835 }, { 1843, 1841 }, { 1844, 1842 }, { 1845, 1841 }, { 1846, 1842 }, { 1850, 1852 }, { 1854, 1856 }, { 1858, 1860 }, { 1862, 1864 }, { 1867, 1874 }, { 1868, 1875 }, { 1869, 1876 }, { 1870, 1877 }, { 1871, 1878 }, { 1872, 1879 }, { 1873, 1880 }, { 1883, 1881 }, { 1884, 1882 }, { 1885, 1881 }, { 1886, 1882 }, { 1898, 1889 }, { 1899, 1890 }, { 1900, 1891 }, { 1901, 1892 }, { 1903, 1893 }, { 1904, 1894 }, { 1905, 1895 }, { 1906, 1896 }, { 1907, 1897 }, { 1908, 1889 }, { 1910, 1891 }, { 1911, 1892 }, { 1913, 1894 }, { 1914, 1895 }, { 1915, 1896 }, { 1916, 1897 }, { 1932, 1930 }, { 1933, 1931 }, { 1937, 1938 }, { 1957, 1967 }, { 1958, 1968 }, { 1992, 1994 }, { 1993, 1995 }, { 2008, 2010 }, { 2009, 2011 }, { 2033, 2035 }, { 2133, 2135 }, { 2134, 2136 }, { 2145, 2147 }, { 2146, 2148 }, { 2174, 2171 }, { 2175, 2172 }, { 2176, 2173 }, { 2177, 2171 }, { 2178, 2172 }, { 2179, 2173 }, { 2181, 2180 }, { 2184, 2182 }, { 2185, 2183 }, { 2186, 2182 }, { 2187, 2183 }, { 2189, 2188 }, { 2191, 2190 }, { 2193, 2192 }, { 2194, 2192 }, { 2196, 2195 }, { 2197, 2195 }, { 2199, 2198 }, { 2200, 2198 }, { 2202, 2201 }, { 2231, 2234 }, { 2232, 2235 }, { 2233, 2236 }, { 2247, 2250 }, { 2248, 2251 }, { 2249, 2252 }, { 2257, 2267 }, { 2258, 2268 }, { 2293, 2289 }, { 2294, 2290 }, { 2295, 2291 }, { 2296, 2292 }, { 2298, 2297 }, { 2299, 2289 }, { 2300, 2290 }, { 2301, 2291 }, { 2302, 2292 }, { 2304, 2303 }, { 2306, 2305 }, { 2308, 2307 }, { 2310, 2309 }, { 2312, 2311 }, { 2313, 2311 }, { 2315, 2314 }, { 2316, 2314 }, { 2318, 2317 }, { 2319, 2317 }, { 2321, 2320 }, { 2323, 2322 }, { 2332, 2326 }, { 2333, 2327 }, { 2334, 2328 }, { 2335, 2329 }, { 2336, 2330 }, { 2337, 2331 }, { 2338, 2326 }, { 2339, 2327 }, { 2340, 2328 }, { 2341, 2329 }, { 2342, 2330 }, { 2343, 2331 }, { 2364, 2358 }, { 2365, 2359 }, { 2366, 2360 }, { 2367, 2361 }, { 2368, 2362 }, { 2369, 2363 }, { 2370, 2358 }, { 2371, 2359 }, { 2372, 2360 }, { 2373, 2361 }, { 2374, 2362 }, { 2375, 2363 }, { 2389, 2388 }, { 2390, 2388 }, { 2392, 2391 }, { 2393, 2391 }, { 2403, 2402 }, { 2404, 2402 }, { 2407, 2406 }, { 2408, 2406 }, { 2412, 2410 }, { 2413, 2411 }, { 2415, 2411 }, { 2429, 2431 }, { 2437, 2439 }, { 2440, 2442 }, { 2441, 2442 }, { 2443, 2445 }, { 2444, 2445 }, { 2453, 2447 }, { 2454, 2448 }, { 2455, 2449 }, { 2456, 2450 }, { 2457, 2451 }, { 2458, 2452 }, { 2459, 2447 }, { 2460, 2448 }, { 2461, 2449 }, { 2462, 2450 }, { 2463, 2451 }, { 2464, 2452 }, { 2477, 2471 }, { 2478, 2472 }, { 2479, 2473 }, { 2480, 2474 }, { 2481, 2475 }, { 2482, 2476 }, { 2483, 2471 }, { 2484, 2472 }, { 2485, 2473 }, { 2486, 2474 }, { 2487, 2475 }, { 2488, 2476 }, { 2525, 2519 }, { 2526, 2520 }, { 2527, 2521 }, { 2528, 2522 }, { 2529, 2523 }, { 2530, 2524 }, { 2531, 2519 }, { 2532, 2520 }, { 2533, 2521 }, { 2534, 2522 }, { 2535, 2523 }, { 2536, 2524 }, { 2550, 2544 }, { 2551, 2545 }, { 2552, 2546 }, { 2553, 2547 }, { 2554, 2548 }, { 2555, 2549 }, { 2556, 2544 }, { 2557, 2545 }, { 2558, 2546 }, { 2559, 2547 }, { 2560, 2548 }, { 2561, 2549 }, { 2581, 2572 }, { 2582, 2573 }, { 2583, 2574 }, { 2584, 2575 }, { 2585, 2576 }, { 2586, 2577 }, { 2587, 2578 }, { 2588, 2579 }, { 2589, 2580 }, { 2590, 2572 }, { 2592, 2574 }, { 2593, 2575 }, { 2595, 2577 }, { 2596, 2578 }, { 2597, 2579 }, { 2598, 2580 }, { 2609, 2611 }, { 2610, 2611 }, { 2629, 2628 }, { 2630, 2628 }, { 2660, 2659 }, { 2661, 2659 }, { 2682, 2676 }, { 2683, 2677 }, { 2684, 2678 }, { 2685, 2679 }, { 2686, 2680 }, { 2687, 2681 }, { 2688, 2676 }, { 2689, 2677 }, { 2690, 2678 }, { 2691, 2679 }, { 2692, 2680 }, { 2693, 2681 }, { 2704, 2700 }, { 2705, 2701 }, { 2706, 2702 }, { 2707, 2703 }, { 2708, 2700 }, { 2709, 2701 }, { 2710, 2702 }, { 2711, 2703 }, { 2722, 2716 }, { 2723, 2717 }, { 2724, 2718 }, { 2725, 2719 }, { 2726, 2720 }, { 2727, 2721 }, { 2728, 2716 }, { 2729, 2717 }, { 2730, 2718 }, { 2731, 2719 }, { 2732, 2720 }, { 2733, 2721 }, { 2744, 2740 }, { 2745, 2741 }, { 2746, 2742 }, { 2747, 2743 }, { 2748, 2740 }, { 2749, 2741 }, { 2750, 2742 }, { 2751, 2743 }, { 2761, 2760 }, { 2762, 2760 }, { 2770, 2769 }, { 2771, 2768 }, { 2772, 2769 }, { 2775, 2774 }, { 2776, 2774 }, { 2800, 2802 }, { 2801, 2802 }, { 2804, 2803 }, { 2805, 2803 }, { 2842, 2833 }, { 2843, 2834 }, { 2844, 2835 }, { 2845, 2836 }, { 2846, 2837 }, { 2847, 2838 }, { 2848, 2839 }, { 2849, 2840 }, { 2850, 2841 }, { 2851, 2833 }, { 2853, 2835 }, { 2854, 2836 }, { 2856, 2838 }, { 2857, 2839 }, { 2858, 2840 }, { 2859, 2841 }, { 2876, 2875 }, { 2887, 2884 }, { 2888, 2885 }, { 2889, 2886 }, { 2902, 2901 }, { 2916, 2913 }, { 2917, 2914 }, { 2918, 2915 }, { 2953, 2946 }, { 2954, 2947 }, { 2955, 2948 }, { 2956, 2949 }, { 2957, 2950 }, { 2958, 2951 }, { 2959, 2952 }, { 2960, 2946 }, { 2965, 2951 }, { 2966, 2952 }, { 2988, 2986 }, { 2989, 2987 }, { 2990, 2986 }, { 2991, 2987 }, { 5335, 5302 }, { 5336, 5303 }, { 5337, 5304 }, { 5338, 5305 }, { 5339, 5306 }, { 5340, 5307 }, { 5341, 5308 }, { 5342, 5309 }, { 5343, 5310 }, { 5344, 5311 }, { 5345, 5312 }, { 5346, 5313 }, { 5347, 5314 }, { 5348, 5315 }, { 5349, 5316 }, { 5350, 5317 }, { 5351, 5318 }, { 5352, 5319 }, { 5353, 5320 }, { 5354, 5321 }, { 5355, 5322 }, { 5356, 5323 }, { 5357, 5324 }, { 5358, 5325 }, { 5359, 5326 }, { 5360, 5327 }, { 5361, 5328 }, { 5362, 5329 }, { 5363, 5330 }, { 5364, 5331 }, { 5365, 5332 }, { 5366, 5333 }, { 5367, 5334 }, { 5368, 5302 }, { 5369, 5303 }, { 5370, 5304 }, { 5371, 5305 }, { 5372, 5306 }, { 5373, 5307 }, { 5374, 5308 }, { 5375, 5309 }, { 5376, 5310 }, { 5377, 5311 }, { 5378, 5312 }, { 5379, 5313 }, { 5380, 5314 }, { 5381, 5315 }, { 5382, 5316 }, { 5383, 5317 }, { 5384, 5318 }, { 5385, 5319 }, { 5386, 5320 }, { 5387, 5321 }, { 5388, 5322 }, { 5389, 5323 }, { 5390, 5324 }, { 5391, 5325 }, { 5392, 5326 }, { 5393, 5327 }, { 5394, 5328 }, { 5395, 5329 }, { 5396, 5330 }, { 5397, 5331 }, { 5398, 5332 }, { 5399, 5333 }, { 5400, 5334 }, { 5844, 5891 }, { 5845, 5892 }, { 5846, 5893 }, { 5850, 5894 }, { 5851, 5895 }, { 5852, 5896 }, { 5853, 5897 }, { 5854, 5898 }, { 5855, 5899 }, { 5859, 5900 }, { 5860, 5901 }, { 5861, 5902 }, { 5862, 5903 }, { 5863, 5904 }, { 5864, 5905 }, { 5868, 5906 }, { 5869, 5907 }, { 5870, 5908 }, { 5871, 5909 }, { 5872, 5910 }, { 5873, 5911 }, { 5874, 5912 }, { 6087, 6111 }, { 6090, 6112 }, { 6091, 6113 }, { 6092, 6114 }, { 6093, 6115 }, { 6094, 6116 }, { 6095, 6117 }, { 6098, 6118 }, { 6099, 6119 }, { 6100, 6120 }, { 6101, 6121 }, { 6102, 6122 }, { 6103, 6123 }, { 6106, 6124 }, { 6107, 6125 }, { 6108, 6126 }, { 6109, 6127 }, { 6110, 6128 }, { 6173, 6190 }, { 6174, 6191 }, { 6179, 6192 }, { 6180, 6193 }, { 6181, 6194 }, { 6182, 6195 }, { 6183, 6196 }, { 6184, 6197 }, { 6185, 6198 }, { 6186, 6199 }, { 6187, 6200 }, { 6188, 6201 }, { 6189, 6202 }, { 6309, 6331 }, { 6310, 6332 }, { 6311, 6333 }, { 6314, 6334 }, { 6315, 6335 }, { 6316, 6336 }, { 6317, 6337 }, { 6320, 6338 }, { 6321, 6339 }, { 6322, 6340 }, { 6323, 6341 }, { 6326, 6342 }, { 6327, 6343 }, { 6328, 6344 }, { 6329, 6345 }, { 6330, 6346 }, { 6393, 6415 }, { 6394, 6416 }, { 6395, 6417 }, { 6398, 6418 }, { 6399, 6419 }, { 6400, 6420 }, { 6401, 6421 }, { 6404, 6422 }, { 6405, 6423 }, { 6406, 6424 }, { 6407, 6425 }, { 6410, 6426 }, { 6411, 6427 }, { 6412, 6428 }, { 6413, 6429 }, { 6414, 6430 }, { 6439, 6595 }, { 6440, 6596 }, { 6445, 6597 }, { 6446, 6598 }, { 6447, 6599 }, { 6448, 6600 }, { 6449, 6601 }, { 6450, 6602 }, { 6451, 6603 }, { 6452, 6604 }, { 6457, 6605 }, { 6458, 6606 }, { 6459, 6607 }, { 6460, 6608 }, { 6461, 6609 }, { 6462, 6610 }, { 6463, 6611 }, { 6464, 6612 }, { 6469, 6613 }, { 6470, 6614 }, { 6471, 6615 }, { 6472, 6616 }, { 6473, 6617 }, { 6474, 6618 }, { 6535, 6571 }, { 6536, 6572 }, { 6541, 6573 }, { 6542, 6574 }, { 6543, 6575 }, { 6544, 6576 }, { 6545, 6577 }, { 6546, 6578 }, { 6547, 6579 }, { 6548, 6580 }, { 6553, 6581 }, { 6554, 6582 }, { 6555, 6583 }, { 6556, 6584 }, { 6557, 6585 }, { 6558, 6586 }, { 6559, 6587 }, { 6560, 6588 }, { 6565, 6589 }, { 6566, 6590 }, { 6567, 6591 }, { 6568, 6592 }, { 6569, 6593 }, { 6570, 6594 }, { 6645, 6665 }, { 6646, 6666 }, { 6647, 6667 }, { 6648, 6668 }, { 6657, 6661 }, { 6658, 6662 }, { 6659, 6663 }, { 6660, 6664 }, { 6823, 6825 }, { 6842, 6844 }, { 6843, 6845 }, { 6858, 6860 }, { 6859, 6861 }, { 7015, 7044 }, { 7019, 7045 }, { 7020, 7046 }, { 7021, 7047 }, { 7022, 7048 }, { 7023, 7049 }, { 7024, 7050 }, { 7028, 7051 }, { 7029, 7052 }, { 7030, 7053 }, { 7031, 7054 }, { 7032, 7055 }, { 7033, 7056 }, { 7037, 7057 }, { 7038, 7058 }, { 7039, 7059 }, { 7040, 7060 }, { 7041, 7061 }, { 7117, 7146 }, { 7121, 7147 }, { 7122, 7148 }, { 7123, 7149 }, { 7124, 7150 }, { 7125, 7151 }, { 7126, 7152 }, { 7130, 7153 }, { 7131, 7154 }, { 7132, 7155 }, { 7133, 7156 }, { 7134, 7157 }, { 7135, 7158 }, { 7139, 7159 }, { 7140, 7160 }, { 7141, 7161 }, { 7142, 7162 }, { 7143, 7163 }, { 7219, 7248 }, { 7223, 7249 }, { 7224, 7250 }, { 7225, 7251 }, { 7226, 7252 }, { 7227, 7253 }, { 7228, 7254 }, { 7232, 7255 }, { 7233, 7256 }, { 7234, 7257 }, { 7235, 7258 }, { 7236, 7259 }, { 7237, 7260 }, { 7241, 7261 }, { 7242, 7262 }, { 7243, 7263 }, { 7244, 7264 }, { 7245, 7265 }, { 7321, 7350 }, { 7325, 7351 }, { 7326, 7352 }, { 7327, 7353 }, { 7328, 7354 }, { 7329, 7355 }, { 7330, 7356 }, { 7334, 7357 }, { 7335, 7358 }, { 7336, 7359 }, { 7337, 7360 }, { 7338, 7361 }, { 7339, 7362 }, { 7343, 7363 }, { 7344, 7364 }, { 7345, 7365 }, { 7346, 7366 }, { 7347, 7367 }, { 7386, 7389 }, { 7387, 7390 }, { 7388, 7391 }, { 7444, 7454 }, { 7445, 7455 }, { 7452, 7456 }, { 7453, 7457 }, { 7523, 7533 }, { 7524, 7534 }, { 7531, 7535 }, { 7532, 7536 }, { 7623, 7652 }, { 7627, 7653 }, { 7628, 7654 }, { 7629, 7655 }, { 7630, 7656 }, { 7631, 7657 }, { 7632, 7658 }, { 7636, 7659 }, { 7637, 7660 }, { 7638, 7661 }, { 7639, 7662 }, { 7640, 7663 }, { 7641, 7664 }, { 7645, 7665 }, { 7646, 7666 }, { 7647, 7667 }, { 7648, 7668 }, { 7649, 7669 }, { 7756, 7761 }, { 7757, 7762 }, { 7758, 7763 }, { 7759, 7764 }, { 7760, 7765 }, { 7780, 7783 }, { 7781, 7784 }, { 7782, 7785 }, { 7792, 7795 }, { 7793, 7796 }, { 7794, 7797 }, { 7848, 7886 }, { 7849, 7887 }, { 7850, 7888 }, { 7863, 7889 }, { 7864, 7890 }, { 7865, 7891 }, { 7964, 8002 }, { 7965, 8003 }, { 7966, 8004 }, { 7979, 8005 }, { 7980, 8006 }, { 7981, 8007 }, { 8061, 8108 }, { 8062, 8109 }, { 8063, 8110 }, { 8067, 8111 }, { 8068, 8112 }, { 8069, 8113 }, { 8070, 8114 }, { 8071, 8115 }, { 8072, 8116 }, { 8076, 8117 }, { 8077, 8118 }, { 8078, 8119 }, { 8079, 8120 }, { 8080, 8121 }, { 8081, 8122 }, { 8085, 8123 }, { 8086, 8124 }, { 8087, 8125 }, { 8088, 8126 }, { 8089, 8127 }, { 8090, 8128 }, { 8091, 8129 }, { 8763, 8761 }, { 8764, 8762 }, { 8765, 8761 }, { 8766, 8762 }, { 8775, 8772 }, { 8777, 8773 }, { 8778, 8774 }, { 8779, 8772 }, { 8780, 8773 }, { 8781, 8774 }, { 8802, 8793 }, { 8803, 8794 }, { 8804, 8795 }, { 8805, 8796 }, { 8806, 8797 }, { 8807, 8798 }, { 8808, 8799 }, { 8809, 8800 }, { 8810, 8801 }, { 8811, 8793 }, { 8813, 8795 }, { 8814, 8796 }, { 8816, 8798 }, { 8817, 8799 }, { 8818, 8800 }, { 8819, 8801 }, }; static const uint16_t x86_16_bit_eq_lookup[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 0, 13, 14, 0, 15, 16, 17, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 32, 33, 0, 0, 34, 35, 36, 37, 38, 39, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 41, 42, 43, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 0, 54, 55, 0, 56, 57, 58, 59, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60, 0, 0, 61, 62, 63, 64, 0, 0, 65, 66, 67, 68, 0, 0, 0, 0, 0, 0, 69, 70, 71, 72, 73, 74, 75, 76, 0, 0, 0, 0, 77, 78, 79, 80, 81, 82, 83, 84, 0, 0, 0, 0, 85, 86, 87, 88, 89, 90, 91, 92, 0, 0, 0, 0, 93, 94, 95, 96, 97, 98, 99, 100, 0, 0, 0, 0, 0, 0, 101, 102, 103, 0, 104, 0, 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 107, 108, 109, 110, 0, 0, 111, 112, 113, 114, 0, 0, 115, 116, 117, 118, 0, 0, 119, 120, 121, 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 123, 124, 125, 126, 0, 0, 0, 0, 0, 0, 127, 128, 129, 130, 0, 0, 131, 132, 133, 134, 0, 0, 135, 136, 137, 138, 0, 0, 139, 140, 141, 142, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 143, 144, 145, 146, 0, 0, 0, 0, 0, 0, 147, 148, 149, 150, 0, 0, 151, 152, 153, 154, 0, 0, 0, 0, 0, 0, 155, 156, 157, 158, 0, 0, 159, 160, 161, 162, 0, 0, 163, 164, 165, 166, 0, 0, 0, 0, 0, 0, 167, 168, 169, 170, 0, 0, 0, 171, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 0, 182, 183, 0, 184, 185, 186, 187, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 188, 189, 0, 0, 0, 0, 0, 0, 0, 0, 190, 191, 192, 193, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 194, 0, 0, 195, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 196, 197, 198, 199, 200, 0, 0, 0, 0, 201, 202, 203, 204, 0, 0, 0, 0, 0, 0, 0, 0, 0, 205, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 206, 207, 208, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 209, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 210, 211, 212, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 213, 214, 0, 0, 0, 215, 216, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 217, 0, 218, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 219, 220, 0, 221, 222, 0, 223, 224, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 225, 226, 227, 228, 0, 0, 0, 229, 230, 0, 0, 0, 231, 232, 233, 234, 235, 236, 0, 0, 0, 0, 0, 0, 0, 0, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 0, 248, 249, 0, 250, 0, 0, 0, 0, 251, 252, 0, 0, 0, 0, 0, 253, 254, 255, 256, 257, 0, 0, 0, 0, 0, 0, 0, 258, 0, 0, 0, 259, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 260, 261, 0, 262, 263, 0, 0, 0, 264, 265, 266, 267, 268, 269, 0, 270, 0, 271, 272, 0, 0, 0, 273, 274, 275, 276, 277, 278, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 279, 280, 281, 282, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 283, 0, 284, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 285, 286, 287, 288, 289, 0, 0, 0, 0, 0, 0, 0, 290, 0, 0, 0, 291, 0, 0, 292, 0, 0, 0, 0, 0, 0, 0, 0, 293, 0, 0, 0, 294, 0, 0, 0, 0, 295, 0, 0, 0, 296, 0, 0, 0, 0, 297, 298, 299, 300, 0, 0, 301, 302, 0, 0, 0, 0, 0, 303, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 304, 0, 305, 0, 0, 0, 306, 0, 0, 307, 308, 0, 309, 310, 0, 311, 312, 0, 313, 314, 0, 0, 0, 0, 0, 0, 0, 315, 316, 317, 0, 318, 319, 0, 0, 0, 0, 0, 320, 321, 322, 0, 323, 324, 0, 0, 0, 325, 326, 0, 0, 327, 328, 0, 0, 0, 0, 329, 330, 331, 0, 332, 333, 0, 0, 0, 0, 0, 0, 334, 335, 336, 0, 337, 338, 0, 0, 0, 0, 0, 339, 340, 341, 0, 342, 343, 0, 0, 0, 344, 345, 0, 0, 0, 0, 346, 347, 0, 348, 349, 0, 0, 0, 350, 351, 352, 353, 0, 354, 355, 0, 0, 0, 356, 357, 0, 0, 0, 358, 359, 360, 361, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 362, 363, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 364, 365, 366, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 367, 368, 369, 0, 0, 0, 0, 0, 0, 0, 370, 371, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 372, 373, 0, 0, 0, 0, 374, 375, 0, 0, 0, 0, 0, 0, 0, 0, 376, 377, 380, 0, 0, 383, 384, 385, 386, 387, 390, 0, 0, 0, 393, 0, 394, 395, 396, 397, 398, 399, 400, 401, 403, 0, 0, 0, 405, 406, 407, 409, 0, 0, 411, 0, 412, 413, 414, 415, 416, 417, 0, 0, 0, 0, 0, 418, 419, 0, 0, 0, 0, 420, 421, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 422, 423, 424, 425, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 426, 0, 0, 427, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 428, 0, 429, 0, 0, 430, 0, 431, 0, 432, 433, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 434, 0, 435, 0, 0, 0, 0, 0, 0, 0, 0, 436, 437, 438, 439, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 440, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 441, 442, 443, 0, 0, 0, 0, 444, 445, 446, 447, 0, 0, 0, 448, 0, 0, 0, 449, 0, 0, 0, 450, 0, 0, 0, 451, 0, 0, 0, 0, 452, 453, 454, 455, 456, 457, 458, 0, 0, 0, 0, 0, 0, 0, 0, 0, 459, 460, 461, 462, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 463, 464, 465, 466, 0, 467, 468, 469, 470, 471, 472, 0, 473, 474, 0, 475, 476, 477, 478, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 479, 480, 0, 0, 0, 481, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 482, 483, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 484, 485, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 486, 487, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 488, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 489, 490, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 491, 492, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 493, 494, 495, 496, 497, 498, 0, 499, 0, 0, 500, 501, 502, 503, 0, 504, 0, 505, 0, 506, 507, 0, 508, 509, 0, 510, 511, 0, 512, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 513, 514, 515, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 516, 517, 518, 0, 0, 0, 0, 0, 0, 0, 519, 520, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 521, 522, 523, 524, 0, 525, 526, 527, 528, 529, 0, 530, 0, 531, 0, 532, 0, 533, 0, 534, 535, 0, 536, 537, 0, 538, 539, 0, 540, 0, 541, 0, 0, 0, 0, 0, 0, 0, 0, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 554, 555, 556, 557, 558, 559, 560, 561, 562, 563, 564, 565, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 566, 567, 0, 568, 569, 0, 0, 0, 0, 0, 0, 0, 0, 0, 570, 571, 0, 0, 572, 573, 0, 0, 0, 574, 575, 0, 576, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 577, 0, 0, 0, 0, 0, 0, 0, 578, 0, 0, 579, 580, 0, 581, 582, 0, 0, 0, 0, 0, 0, 0, 0, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592, 593, 594, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 607, 608, 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 619, 620, 621, 622, 623, 624, 625, 626, 627, 628, 629, 630, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640, 0, 641, 642, 0, 643, 644, 645, 646, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 647, 648, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 649, 650, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 651, 652, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 653, 654, 655, 656, 657, 658, 659, 660, 661, 662, 663, 664, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 665, 666, 667, 668, 669, 670, 671, 672, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 685, 686, 687, 688, 689, 690, 691, 692, 0, 0, 0, 0, 0, 0, 0, 0, 0, 693, 694, 0, 0, 0, 0, 0, 0, 0, 695, 696, 697, 0, 0, 698, 699, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 700, 701, 0, 0, 702, 703, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 704, 705, 706, 707, 708, 709, 710, 711, 712, 713, 0, 714, 715, 0, 716, 717, 718, 719, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 720, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 721, 722, 723, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 724, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 725, 726, 727, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 728, 729, 730, 731, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 949, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 950, 951, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 952, 953, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 954, 0, 0, 0, 955, 956, 957, 958, 959, 960, 0, 0, 0, 961, 962, 963, 964, 965, 966, 0, 0, 0, 967, 968, 969, 970, 971, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 972, 0, 0, 0, 973, 974, 975, 976, 977, 978, 0, 0, 0, 979, 980, 981, 982, 983, 984, 0, 0, 0, 985, 986, 987, 988, 989, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 990, 0, 0, 0, 991, 992, 993, 994, 995, 996, 0, 0, 0, 997, 998, 999, 1000, 1001, 1002, 0, 0, 0, 1003, 1004, 1005, 1006, 1007, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1008, 0, 0, 0, 1009, 1010, 1011, 1012, 1013, 1014, 0, 0, 0, 1015, 1016, 1017, 1018, 1019, 1020, 0, 0, 0, 1021, 1022, 1023, 1024, 1025, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1026, 1027, 1028, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1029, 1030, 0, 0, 0, 0, 0, 0, 1031, 1032, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1033, 1034, 0, 0, 0, 0, 0, 0, 1035, 1036, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1037, 0, 0, 0, 1038, 1039, 1040, 1041, 1042, 1043, 0, 0, 0, 1044, 1045, 1046, 1047, 1048, 1049, 0, 0, 0, 1050, 1051, 1052, 1053, 1054, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1055, 1056, 1057, 1058, 1059, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1060, 1061, 1062, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1063, 1064, 1065, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1066, 1067, 1068, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1069, 1070, 1071, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1072, 1073, 1074, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1075, 1076, 1077, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1078, 1079, 1080, 0, 0, 0, 1081, 1082, 1083, 1084, 1085, 1086, 0, 0, 0, 1087, 1088, 1089, 1090, 1091, 1092, 0, 0, 0, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1100, 1101, 1102, 1103, 0, 0, 0, 0, 0, 0, 0, 0, 1104, 0, 1105, 1106, 1107, 1108, 1109, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1110, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 1118, 1119, 0, 1120, 1121, 0, 1122, 1123, 1124, 1125, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const bool is_64bit_insn[] = { false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, true, true, true, false, false, true, false, true, false, false, true, false, false, false, true, false, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, false, false, false, false, true, true, false, false, false, false, true, true, false, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, true, true, false, false, false, false, true, true, true, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, true, false, false, false, true, false, false, false, false, false, true, true, false, false, true, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, true, false, false, false, true, false, false, false, false, false, true, true, false, false, true, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, true, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, true, false, false, false, false, false, true, true, false, true, false, false, false, false, true, false, false, true, true, false, true, true, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, true, true, false, false, false, false, true, true, false, false, false, false, false, false, true, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, true, false, false, false, false, false, true, true, false, true, false, true, false, false, true, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, true, true, true, false, false, true, false, true, false, false, true, false, false, false, false, false, false, false, true, false, true, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, true, false, false, false, true, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, true, false, true, false, false, true, false, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, 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false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, true, false, true, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, true, false, false, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false, false, false, false, false, false, false, }; #endif // GET_INSTRINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/X86/X86GenInstrInfo_reduce.inc010066400017500001750000002172451363403403300224710ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { X86_PHI = 0, X86_INLINEASM = 1, X86_CFI_INSTRUCTION = 2, X86_EH_LABEL = 3, X86_GC_LABEL = 4, X86_KILL = 5, X86_EXTRACT_SUBREG = 6, X86_INSERT_SUBREG = 7, X86_IMPLICIT_DEF = 8, X86_SUBREG_TO_REG = 9, X86_COPY_TO_REGCLASS = 10, X86_DBG_VALUE = 11, X86_REG_SEQUENCE = 12, X86_COPY = 13, X86_BUNDLE = 14, X86_LIFETIME_START = 15, X86_LIFETIME_END = 16, X86_STACKMAP = 17, X86_PATCHPOINT = 18, X86_LOAD_STACK_GUARD = 19, X86_STATEPOINT = 20, X86_FRAME_ALLOC = 21, X86_AAA = 22, X86_AAD8i8 = 23, X86_AAM8i8 = 24, X86_AAS = 25, X86_ACQUIRE_MOV16rm = 26, X86_ACQUIRE_MOV32rm = 27, X86_ACQUIRE_MOV64rm = 28, X86_ACQUIRE_MOV8rm = 29, X86_ADC16i16 = 30, X86_ADC16mi = 31, X86_ADC16mi8 = 32, X86_ADC16mr = 33, X86_ADC16ri = 34, X86_ADC16ri8 = 35, X86_ADC16rm = 36, X86_ADC16rr = 37, X86_ADC16rr_REV = 38, X86_ADC32i32 = 39, X86_ADC32mi = 40, X86_ADC32mi8 = 41, X86_ADC32mr = 42, X86_ADC32ri = 43, X86_ADC32ri8 = 44, X86_ADC32rm = 45, X86_ADC32rr = 46, X86_ADC32rr_REV = 47, X86_ADC64i32 = 48, X86_ADC64mi32 = 49, X86_ADC64mi8 = 50, X86_ADC64mr = 51, X86_ADC64ri32 = 52, X86_ADC64ri8 = 53, X86_ADC64rm = 54, X86_ADC64rr = 55, X86_ADC64rr_REV = 56, X86_ADC8i8 = 57, X86_ADC8mi = 58, X86_ADC8mi8 = 59, X86_ADC8mr = 60, X86_ADC8ri = 61, X86_ADC8ri8 = 62, X86_ADC8rm = 63, X86_ADC8rr = 64, X86_ADC8rr_REV = 65, X86_ADCX32rm = 66, X86_ADCX32rr = 67, X86_ADCX64rm = 68, X86_ADCX64rr = 69, X86_ADD16i16 = 70, X86_ADD16mi = 71, X86_ADD16mi8 = 72, X86_ADD16mr = 73, X86_ADD16ri = 74, X86_ADD16ri8 = 75, X86_ADD16ri8_DB = 76, X86_ADD16ri_DB = 77, X86_ADD16rm = 78, X86_ADD16rr = 79, X86_ADD16rr_DB = 80, X86_ADD16rr_REV = 81, X86_ADD32i32 = 82, X86_ADD32mi = 83, X86_ADD32mi8 = 84, X86_ADD32mr = 85, X86_ADD32ri = 86, X86_ADD32ri8 = 87, X86_ADD32ri8_DB = 88, X86_ADD32ri_DB = 89, X86_ADD32rm = 90, X86_ADD32rr = 91, X86_ADD32rr_DB = 92, X86_ADD32rr_REV = 93, X86_ADD64i32 = 94, X86_ADD64mi32 = 95, X86_ADD64mi8 = 96, X86_ADD64mr = 97, X86_ADD64ri32 = 98, X86_ADD64ri32_DB = 99, X86_ADD64ri8 = 100, X86_ADD64ri8_DB = 101, X86_ADD64rm = 102, X86_ADD64rr = 103, X86_ADD64rr_DB = 104, X86_ADD64rr_REV = 105, X86_ADD8i8 = 106, X86_ADD8mi = 107, X86_ADD8mi8 = 108, X86_ADD8mr = 109, X86_ADD8ri = 110, X86_ADD8ri8 = 111, X86_ADD8rm = 112, X86_ADD8rr = 113, X86_ADD8rr_REV = 114, X86_ADJCALLSTACKDOWN32 = 115, X86_ADJCALLSTACKDOWN64 = 116, X86_ADJCALLSTACKUP32 = 117, X86_ADJCALLSTACKUP64 = 118, X86_ADOX32rm = 119, X86_ADOX32rr = 120, X86_ADOX64rm = 121, X86_ADOX64rr = 122, X86_AND16i16 = 123, X86_AND16mi = 124, X86_AND16mi8 = 125, X86_AND16mr = 126, X86_AND16ri = 127, X86_AND16ri8 = 128, X86_AND16rm = 129, X86_AND16rr = 130, X86_AND16rr_REV = 131, X86_AND32i32 = 132, X86_AND32mi = 133, X86_AND32mi8 = 134, X86_AND32mr = 135, X86_AND32ri = 136, X86_AND32ri8 = 137, X86_AND32rm = 138, X86_AND32rr = 139, X86_AND32rr_REV = 140, X86_AND64i32 = 141, X86_AND64mi32 = 142, X86_AND64mi8 = 143, X86_AND64mr = 144, X86_AND64ri32 = 145, X86_AND64ri8 = 146, X86_AND64rm = 147, X86_AND64rr = 148, X86_AND64rr_REV = 149, X86_AND8i8 = 150, X86_AND8mi = 151, X86_AND8mi8 = 152, X86_AND8mr = 153, X86_AND8ri = 154, X86_AND8ri8 = 155, X86_AND8rm = 156, X86_AND8rr = 157, X86_AND8rr_REV = 158, X86_ANDN32rm = 159, X86_ANDN32rr = 160, X86_ANDN64rm = 161, X86_ANDN64rr = 162, X86_ARPL16mr = 163, X86_ARPL16rr = 164, X86_BEXTR32rm = 165, X86_BEXTR32rr = 166, X86_BEXTR64rm = 167, X86_BEXTR64rr = 168, X86_BEXTRI32mi = 169, X86_BEXTRI32ri = 170, X86_BEXTRI64mi = 171, X86_BEXTRI64ri = 172, X86_BLCFILL32rm = 173, X86_BLCFILL32rr = 174, X86_BLCFILL64rm = 175, X86_BLCFILL64rr = 176, X86_BLCI32rm = 177, X86_BLCI32rr = 178, X86_BLCI64rm = 179, X86_BLCI64rr = 180, X86_BLCIC32rm = 181, X86_BLCIC32rr = 182, X86_BLCIC64rm = 183, X86_BLCIC64rr = 184, X86_BLCMSK32rm = 185, X86_BLCMSK32rr = 186, X86_BLCMSK64rm = 187, X86_BLCMSK64rr = 188, X86_BLCS32rm = 189, X86_BLCS32rr = 190, X86_BLCS64rm = 191, X86_BLCS64rr = 192, X86_BLSFILL32rm = 193, X86_BLSFILL32rr = 194, X86_BLSFILL64rm = 195, X86_BLSFILL64rr = 196, X86_BLSI32rm = 197, X86_BLSI32rr = 198, X86_BLSI64rm = 199, X86_BLSI64rr = 200, X86_BLSIC32rm = 201, X86_BLSIC32rr = 202, X86_BLSIC64rm = 203, X86_BLSIC64rr = 204, X86_BLSMSK32rm = 205, X86_BLSMSK32rr = 206, X86_BLSMSK64rm = 207, X86_BLSMSK64rr = 208, X86_BLSR32rm = 209, X86_BLSR32rr = 210, X86_BLSR64rm = 211, X86_BLSR64rr = 212, X86_BOUNDS16rm = 213, X86_BOUNDS32rm = 214, X86_BSF16rm = 215, X86_BSF16rr = 216, X86_BSF32rm = 217, X86_BSF32rr = 218, X86_BSF64rm = 219, X86_BSF64rr = 220, X86_BSR16rm = 221, X86_BSR16rr = 222, X86_BSR32rm = 223, X86_BSR32rr = 224, X86_BSR64rm = 225, X86_BSR64rr = 226, X86_BSWAP32r = 227, X86_BSWAP64r = 228, X86_BT16mi8 = 229, X86_BT16mr = 230, X86_BT16ri8 = 231, X86_BT16rr = 232, X86_BT32mi8 = 233, X86_BT32mr = 234, X86_BT32ri8 = 235, X86_BT32rr = 236, X86_BT64mi8 = 237, X86_BT64mr = 238, X86_BT64ri8 = 239, X86_BT64rr = 240, X86_BTC16mi8 = 241, X86_BTC16mr = 242, X86_BTC16ri8 = 243, X86_BTC16rr = 244, X86_BTC32mi8 = 245, X86_BTC32mr = 246, X86_BTC32ri8 = 247, X86_BTC32rr = 248, X86_BTC64mi8 = 249, X86_BTC64mr = 250, X86_BTC64ri8 = 251, X86_BTC64rr = 252, X86_BTR16mi8 = 253, X86_BTR16mr = 254, X86_BTR16ri8 = 255, X86_BTR16rr = 256, X86_BTR32mi8 = 257, X86_BTR32mr = 258, X86_BTR32ri8 = 259, X86_BTR32rr = 260, X86_BTR64mi8 = 261, X86_BTR64mr = 262, X86_BTR64ri8 = 263, X86_BTR64rr = 264, X86_BTS16mi8 = 265, X86_BTS16mr = 266, X86_BTS16ri8 = 267, X86_BTS16rr = 268, X86_BTS32mi8 = 269, X86_BTS32mr = 270, X86_BTS32ri8 = 271, X86_BTS32rr = 272, X86_BTS64mi8 = 273, X86_BTS64mr = 274, X86_BTS64ri8 = 275, X86_BTS64rr = 276, X86_BZHI32rm = 277, X86_BZHI32rr = 278, X86_BZHI64rm = 279, X86_BZHI64rr = 280, X86_CALL16m = 281, X86_CALL16r = 282, X86_CALL32m = 283, X86_CALL32r = 284, X86_CALL64m = 285, X86_CALL64pcrel32 = 286, X86_CALL64r = 287, X86_CALLpcrel16 = 288, X86_CALLpcrel32 = 289, X86_CBW = 290, X86_CDQ = 291, X86_CDQE = 292, X86_CLAC = 293, X86_CLC = 294, X86_CLD = 295, X86_CLFLUSHOPT = 296, X86_CLGI = 297, X86_CLI = 298, X86_CLTS = 299, X86_CLWB = 300, X86_CMC = 301, X86_CMOVA16rm = 302, X86_CMOVA16rr = 303, X86_CMOVA32rm = 304, X86_CMOVA32rr = 305, X86_CMOVA64rm = 306, X86_CMOVA64rr = 307, X86_CMOVAE16rm = 308, X86_CMOVAE16rr = 309, X86_CMOVAE32rm = 310, X86_CMOVAE32rr = 311, X86_CMOVAE64rm = 312, X86_CMOVAE64rr = 313, X86_CMOVB16rm = 314, X86_CMOVB16rr = 315, X86_CMOVB32rm = 316, X86_CMOVB32rr = 317, X86_CMOVB64rm = 318, X86_CMOVB64rr = 319, X86_CMOVBE16rm = 320, X86_CMOVBE16rr = 321, X86_CMOVBE32rm = 322, X86_CMOVBE32rr = 323, X86_CMOVBE64rm = 324, X86_CMOVBE64rr = 325, X86_CMOVE16rm = 326, X86_CMOVE16rr = 327, X86_CMOVE32rm = 328, X86_CMOVE32rr = 329, X86_CMOVE64rm = 330, X86_CMOVE64rr = 331, X86_CMOVG16rm = 332, X86_CMOVG16rr = 333, X86_CMOVG32rm = 334, X86_CMOVG32rr = 335, X86_CMOVG64rm = 336, X86_CMOVG64rr = 337, X86_CMOVGE16rm = 338, X86_CMOVGE16rr = 339, X86_CMOVGE32rm = 340, X86_CMOVGE32rr = 341, X86_CMOVGE64rm = 342, X86_CMOVGE64rr = 343, X86_CMOVL16rm = 344, X86_CMOVL16rr = 345, X86_CMOVL32rm = 346, X86_CMOVL32rr = 347, X86_CMOVL64rm = 348, X86_CMOVL64rr = 349, X86_CMOVLE16rm = 350, X86_CMOVLE16rr = 351, X86_CMOVLE32rm = 352, X86_CMOVLE32rr = 353, X86_CMOVLE64rm = 354, X86_CMOVLE64rr = 355, X86_CMOVNE16rm = 356, X86_CMOVNE16rr = 357, X86_CMOVNE32rm = 358, X86_CMOVNE32rr = 359, X86_CMOVNE64rm = 360, X86_CMOVNE64rr = 361, X86_CMOVNO16rm = 362, X86_CMOVNO16rr = 363, X86_CMOVNO32rm = 364, X86_CMOVNO32rr = 365, X86_CMOVNO64rm = 366, X86_CMOVNO64rr = 367, X86_CMOVNP16rm = 368, X86_CMOVNP16rr = 369, X86_CMOVNP32rm = 370, X86_CMOVNP32rr = 371, X86_CMOVNP64rm = 372, X86_CMOVNP64rr = 373, X86_CMOVNS16rm = 374, X86_CMOVNS16rr = 375, X86_CMOVNS32rm = 376, X86_CMOVNS32rr = 377, X86_CMOVNS64rm = 378, X86_CMOVNS64rr = 379, X86_CMOVO16rm = 380, X86_CMOVO16rr = 381, X86_CMOVO32rm = 382, X86_CMOVO32rr = 383, X86_CMOVO64rm = 384, X86_CMOVO64rr = 385, X86_CMOVP16rm = 386, X86_CMOVP16rr = 387, X86_CMOVP32rm = 388, X86_CMOVP32rr = 389, X86_CMOVP64rm = 390, X86_CMOVP64rr = 391, X86_CMOVS16rm = 392, X86_CMOVS16rr = 393, X86_CMOVS32rm = 394, X86_CMOVS32rr = 395, X86_CMOVS64rm = 396, X86_CMOVS64rr = 397, X86_CMOV_FR32 = 398, X86_CMOV_FR64 = 399, X86_CMOV_GR16 = 400, X86_CMOV_GR32 = 401, X86_CMOV_GR8 = 402, X86_CMOV_RFP32 = 403, X86_CMOV_RFP64 = 404, X86_CMOV_RFP80 = 405, X86_CMOV_V16F32 = 406, X86_CMOV_V2F64 = 407, X86_CMOV_V2I64 = 408, X86_CMOV_V4F32 = 409, X86_CMOV_V4F64 = 410, X86_CMOV_V4I64 = 411, X86_CMOV_V8F32 = 412, X86_CMOV_V8F64 = 413, X86_CMOV_V8I64 = 414, X86_CMP16i16 = 415, X86_CMP16mi = 416, X86_CMP16mi8 = 417, X86_CMP16mr = 418, X86_CMP16ri = 419, X86_CMP16ri8 = 420, X86_CMP16rm = 421, X86_CMP16rr = 422, X86_CMP16rr_REV = 423, X86_CMP32i32 = 424, X86_CMP32mi = 425, X86_CMP32mi8 = 426, X86_CMP32mr = 427, X86_CMP32ri = 428, X86_CMP32ri8 = 429, X86_CMP32rm = 430, X86_CMP32rr = 431, X86_CMP32rr_REV = 432, X86_CMP64i32 = 433, X86_CMP64mi32 = 434, X86_CMP64mi8 = 435, X86_CMP64mr = 436, X86_CMP64ri32 = 437, X86_CMP64ri8 = 438, X86_CMP64rm = 439, X86_CMP64rr = 440, X86_CMP64rr_REV = 441, X86_CMP8i8 = 442, X86_CMP8mi = 443, X86_CMP8mi8 = 444, X86_CMP8mr = 445, X86_CMP8ri = 446, X86_CMP8ri8 = 447, X86_CMP8rm = 448, X86_CMP8rr = 449, X86_CMP8rr_REV = 450, X86_CMPSB = 451, X86_CMPSL = 452, X86_CMPSQ = 453, X86_CMPSW = 454, X86_CMPXCHG16B = 455, X86_CMPXCHG16rm = 456, X86_CMPXCHG16rr = 457, X86_CMPXCHG32rm = 458, X86_CMPXCHG32rr = 459, X86_CMPXCHG64rm = 460, X86_CMPXCHG64rr = 461, X86_CMPXCHG8B = 462, X86_CMPXCHG8rm = 463, X86_CMPXCHG8rr = 464, X86_CPUID = 465, X86_CQO = 466, X86_CWD = 467, X86_CWDE = 468, X86_DAA = 469, X86_DAS = 470, X86_DATA16_PREFIX = 471, X86_DEC16m = 472, X86_DEC16r = 473, X86_DEC16r_alt = 474, X86_DEC32m = 475, X86_DEC32r = 476, X86_DEC32r_alt = 477, X86_DEC64m = 478, X86_DEC64r = 479, X86_DEC8m = 480, X86_DEC8r = 481, X86_DIV16m = 482, X86_DIV16r = 483, X86_DIV32m = 484, X86_DIV32r = 485, X86_DIV64m = 486, X86_DIV64r = 487, X86_DIV8m = 488, X86_DIV8r = 489, X86_EH_RETURN = 490, X86_EH_RETURN64 = 491, X86_EH_SjLj_LongJmp32 = 492, X86_EH_SjLj_LongJmp64 = 493, X86_EH_SjLj_SetJmp32 = 494, X86_EH_SjLj_SetJmp64 = 495, X86_EH_SjLj_Setup = 496, X86_ENTER = 497, X86_FARCALL16i = 498, X86_FARCALL16m = 499, X86_FARCALL32i = 500, X86_FARCALL32m = 501, X86_FARCALL64 = 502, X86_FARJMP16i = 503, X86_FARJMP16m = 504, X86_FARJMP32i = 505, X86_FARJMP32m = 506, X86_FARJMP64 = 507, X86_FSETPM = 508, X86_GETSEC = 509, X86_HLT = 510, X86_IDIV16m = 511, X86_IDIV16r = 512, X86_IDIV32m = 513, X86_IDIV32r = 514, X86_IDIV64m = 515, X86_IDIV64r = 516, X86_IDIV8m = 517, X86_IDIV8r = 518, X86_IMUL16m = 519, X86_IMUL16r = 520, X86_IMUL16rm = 521, X86_IMUL16rmi = 522, X86_IMUL16rmi8 = 523, X86_IMUL16rr = 524, X86_IMUL16rri = 525, X86_IMUL16rri8 = 526, X86_IMUL32m = 527, X86_IMUL32r = 528, X86_IMUL32rm = 529, X86_IMUL32rmi = 530, X86_IMUL32rmi8 = 531, X86_IMUL32rr = 532, X86_IMUL32rri = 533, X86_IMUL32rri8 = 534, X86_IMUL64m = 535, X86_IMUL64r = 536, X86_IMUL64rm = 537, X86_IMUL64rmi32 = 538, X86_IMUL64rmi8 = 539, X86_IMUL64rr = 540, X86_IMUL64rri32 = 541, X86_IMUL64rri8 = 542, X86_IMUL8m = 543, X86_IMUL8r = 544, X86_IN16ri = 545, X86_IN16rr = 546, X86_IN32ri = 547, X86_IN32rr = 548, X86_IN8ri = 549, X86_IN8rr = 550, X86_INC16m = 551, X86_INC16r = 552, X86_INC16r_alt = 553, X86_INC32m = 554, X86_INC32r = 555, X86_INC32r_alt = 556, X86_INC64m = 557, X86_INC64r = 558, X86_INC8m = 559, X86_INC8r = 560, X86_INSB = 561, X86_INSL = 562, X86_INSW = 563, X86_INT = 564, X86_INT1 = 565, X86_INT3 = 566, X86_INTO = 567, X86_INVD = 568, X86_INVEPT32 = 569, X86_INVEPT64 = 570, X86_INVLPG = 571, X86_INVLPGA32 = 572, X86_INVLPGA64 = 573, X86_INVPCID32 = 574, X86_INVPCID64 = 575, X86_INVVPID32 = 576, X86_INVVPID64 = 577, X86_IRET16 = 578, X86_IRET32 = 579, X86_IRET64 = 580, X86_Int_MemBarrier = 581, X86_JAE_1 = 582, X86_JAE_2 = 583, X86_JAE_4 = 584, X86_JA_1 = 585, X86_JA_2 = 586, X86_JA_4 = 587, X86_JBE_1 = 588, X86_JBE_2 = 589, X86_JBE_4 = 590, X86_JB_1 = 591, X86_JB_2 = 592, X86_JB_4 = 593, X86_JCXZ = 594, X86_JECXZ = 595, X86_JE_1 = 596, X86_JE_2 = 597, X86_JE_4 = 598, X86_JGE_1 = 599, X86_JGE_2 = 600, X86_JGE_4 = 601, X86_JG_1 = 602, X86_JG_2 = 603, X86_JG_4 = 604, X86_JLE_1 = 605, X86_JLE_2 = 606, X86_JLE_4 = 607, X86_JL_1 = 608, X86_JL_2 = 609, X86_JL_4 = 610, X86_JMP16m = 611, X86_JMP16r = 612, X86_JMP32m = 613, X86_JMP32r = 614, X86_JMP64m = 615, X86_JMP64r = 616, X86_JMP_1 = 617, X86_JMP_2 = 618, X86_JMP_4 = 619, X86_JNE_1 = 620, X86_JNE_2 = 621, X86_JNE_4 = 622, X86_JNO_1 = 623, X86_JNO_2 = 624, X86_JNO_4 = 625, X86_JNP_1 = 626, X86_JNP_2 = 627, X86_JNP_4 = 628, X86_JNS_1 = 629, X86_JNS_2 = 630, X86_JNS_4 = 631, X86_JO_1 = 632, X86_JO_2 = 633, X86_JO_4 = 634, X86_JP_1 = 635, X86_JP_2 = 636, X86_JP_4 = 637, X86_JRCXZ = 638, X86_JS_1 = 639, X86_JS_2 = 640, X86_JS_4 = 641, X86_LAHF = 642, X86_LAR16rm = 643, X86_LAR16rr = 644, X86_LAR32rm = 645, X86_LAR32rr = 646, X86_LAR64rm = 647, X86_LAR64rr = 648, X86_LCMPXCHG16 = 649, X86_LCMPXCHG16B = 650, X86_LCMPXCHG32 = 651, X86_LCMPXCHG64 = 652, X86_LCMPXCHG8 = 653, X86_LCMPXCHG8B = 654, X86_LDS16rm = 655, X86_LDS32rm = 656, X86_LEA16r = 657, X86_LEA32r = 658, X86_LEA64_32r = 659, X86_LEA64r = 660, X86_LEAVE = 661, X86_LEAVE64 = 662, X86_LES16rm = 663, X86_LES32rm = 664, X86_LFS16rm = 665, X86_LFS32rm = 666, X86_LFS64rm = 667, X86_LGDT16m = 668, X86_LGDT32m = 669, X86_LGDT64m = 670, X86_LGS16rm = 671, X86_LGS32rm = 672, X86_LGS64rm = 673, X86_LIDT16m = 674, X86_LIDT32m = 675, X86_LIDT64m = 676, X86_LLDT16m = 677, X86_LLDT16r = 678, X86_LMSW16m = 679, X86_LMSW16r = 680, X86_LOCK_ADD16mi = 681, X86_LOCK_ADD16mi8 = 682, X86_LOCK_ADD16mr = 683, X86_LOCK_ADD32mi = 684, X86_LOCK_ADD32mi8 = 685, X86_LOCK_ADD32mr = 686, X86_LOCK_ADD64mi32 = 687, X86_LOCK_ADD64mi8 = 688, X86_LOCK_ADD64mr = 689, X86_LOCK_ADD8mi = 690, X86_LOCK_ADD8mr = 691, X86_LOCK_AND16mi = 692, X86_LOCK_AND16mi8 = 693, X86_LOCK_AND16mr = 694, X86_LOCK_AND32mi = 695, X86_LOCK_AND32mi8 = 696, X86_LOCK_AND32mr = 697, X86_LOCK_AND64mi32 = 698, X86_LOCK_AND64mi8 = 699, X86_LOCK_AND64mr = 700, X86_LOCK_AND8mi = 701, X86_LOCK_AND8mr = 702, X86_LOCK_DEC16m = 703, X86_LOCK_DEC32m = 704, X86_LOCK_DEC64m = 705, X86_LOCK_DEC8m = 706, X86_LOCK_INC16m = 707, X86_LOCK_INC32m = 708, X86_LOCK_INC64m = 709, X86_LOCK_INC8m = 710, X86_LOCK_OR16mi = 711, X86_LOCK_OR16mi8 = 712, X86_LOCK_OR16mr = 713, X86_LOCK_OR32mi = 714, X86_LOCK_OR32mi8 = 715, X86_LOCK_OR32mr = 716, X86_LOCK_OR64mi32 = 717, X86_LOCK_OR64mi8 = 718, X86_LOCK_OR64mr = 719, X86_LOCK_OR8mi = 720, X86_LOCK_OR8mr = 721, X86_LOCK_PREFIX = 722, X86_LOCK_SUB16mi = 723, X86_LOCK_SUB16mi8 = 724, X86_LOCK_SUB16mr = 725, X86_LOCK_SUB32mi = 726, X86_LOCK_SUB32mi8 = 727, X86_LOCK_SUB32mr = 728, X86_LOCK_SUB64mi32 = 729, X86_LOCK_SUB64mi8 = 730, X86_LOCK_SUB64mr = 731, X86_LOCK_SUB8mi = 732, X86_LOCK_SUB8mr = 733, X86_LOCK_XOR16mi = 734, X86_LOCK_XOR16mi8 = 735, X86_LOCK_XOR16mr = 736, X86_LOCK_XOR32mi = 737, X86_LOCK_XOR32mi8 = 738, X86_LOCK_XOR32mr = 739, X86_LOCK_XOR64mi32 = 740, X86_LOCK_XOR64mi8 = 741, X86_LOCK_XOR64mr = 742, X86_LOCK_XOR8mi = 743, X86_LOCK_XOR8mr = 744, X86_LODSB = 745, X86_LODSL = 746, X86_LODSQ = 747, X86_LODSW = 748, X86_LOOP = 749, X86_LOOPE = 750, X86_LOOPNE = 751, X86_LRETIL = 752, X86_LRETIQ = 753, X86_LRETIW = 754, X86_LRETL = 755, X86_LRETQ = 756, X86_LRETW = 757, X86_LSL16rm = 758, X86_LSL16rr = 759, X86_LSL32rm = 760, X86_LSL32rr = 761, X86_LSL64rm = 762, X86_LSL64rr = 763, X86_LSS16rm = 764, X86_LSS32rm = 765, X86_LSS64rm = 766, X86_LTRm = 767, X86_LTRr = 768, X86_LXADD16 = 769, X86_LXADD32 = 770, X86_LXADD64 = 771, X86_LXADD8 = 772, X86_LZCNT16rm = 773, X86_LZCNT16rr = 774, X86_LZCNT32rm = 775, X86_LZCNT32rr = 776, X86_LZCNT64rm = 777, X86_LZCNT64rr = 778, X86_MONTMUL = 779, X86_MORESTACK_RET = 780, X86_MORESTACK_RET_RESTORE_R10 = 781, X86_MOV16ao16 = 782, X86_MOV16ao32 = 783, X86_MOV16ao64 = 784, X86_MOV16mi = 785, X86_MOV16mr = 786, X86_MOV16ms = 787, X86_MOV16o16a = 788, X86_MOV16o32a = 789, X86_MOV16o64a = 790, X86_MOV16ri = 791, X86_MOV16ri_alt = 792, X86_MOV16rm = 793, X86_MOV16rr = 794, X86_MOV16rr_REV = 795, X86_MOV16rs = 796, X86_MOV16sm = 797, X86_MOV16sr = 798, X86_MOV32ao16 = 799, X86_MOV32ao32 = 800, X86_MOV32ao64 = 801, X86_MOV32cr = 802, X86_MOV32dr = 803, X86_MOV32mi = 804, X86_MOV32mr = 805, X86_MOV32ms = 806, X86_MOV32o16a = 807, X86_MOV32o32a = 808, X86_MOV32o64a = 809, X86_MOV32r0 = 810, X86_MOV32rc = 811, X86_MOV32rd = 812, X86_MOV32ri = 813, X86_MOV32ri64 = 814, X86_MOV32ri_alt = 815, X86_MOV32rm = 816, X86_MOV32rr = 817, X86_MOV32rr_REV = 818, X86_MOV32rs = 819, X86_MOV32sm = 820, X86_MOV32sr = 821, X86_MOV64ao32 = 822, X86_MOV64ao64 = 823, X86_MOV64cr = 824, X86_MOV64dr = 825, X86_MOV64mi32 = 826, X86_MOV64mr = 827, X86_MOV64ms = 828, X86_MOV64o32a = 829, X86_MOV64o64a = 830, X86_MOV64rc = 831, X86_MOV64rd = 832, X86_MOV64ri = 833, X86_MOV64ri32 = 834, X86_MOV64rm = 835, X86_MOV64rr = 836, X86_MOV64rr_REV = 837, X86_MOV64rs = 838, X86_MOV64sm = 839, X86_MOV64sr = 840, X86_MOV8ao16 = 841, X86_MOV8ao32 = 842, X86_MOV8ao64 = 843, X86_MOV8mi = 844, X86_MOV8mr = 845, X86_MOV8mr_NOREX = 846, X86_MOV8o16a = 847, X86_MOV8o32a = 848, X86_MOV8o64a = 849, X86_MOV8ri = 850, X86_MOV8ri_alt = 851, X86_MOV8rm = 852, X86_MOV8rm_NOREX = 853, X86_MOV8rr = 854, X86_MOV8rr_NOREX = 855, X86_MOV8rr_REV = 856, X86_MOVBE16mr = 857, X86_MOVBE16rm = 858, X86_MOVBE32mr = 859, X86_MOVBE32rm = 860, X86_MOVBE64mr = 861, X86_MOVBE64rm = 862, X86_MOVPC32r = 863, X86_MOVSB = 864, X86_MOVSL = 865, X86_MOVSQ = 866, X86_MOVSW = 867, X86_MOVSX16rm8 = 868, X86_MOVSX16rr8 = 869, X86_MOVSX32_NOREXrm8 = 870, X86_MOVSX32_NOREXrr8 = 871, X86_MOVSX32rm16 = 872, X86_MOVSX32rm8 = 873, X86_MOVSX32rr16 = 874, X86_MOVSX32rr8 = 875, X86_MOVSX64_NOREXrr32 = 876, X86_MOVSX64rm16 = 877, X86_MOVSX64rm32 = 878, X86_MOVSX64rm32_alt = 879, X86_MOVSX64rm8 = 880, X86_MOVSX64rr16 = 881, X86_MOVSX64rr32 = 882, X86_MOVSX64rr8 = 883, X86_MOVZX16rm8 = 884, X86_MOVZX16rr8 = 885, X86_MOVZX32_NOREXrm8 = 886, X86_MOVZX32_NOREXrr8 = 887, X86_MOVZX32rm16 = 888, X86_MOVZX32rm8 = 889, X86_MOVZX32rr16 = 890, X86_MOVZX32rr8 = 891, X86_MOVZX64rm16_Q = 892, X86_MOVZX64rm8_Q = 893, X86_MOVZX64rr16_Q = 894, X86_MOVZX64rr8_Q = 895, X86_MUL16m = 896, X86_MUL16r = 897, X86_MUL32m = 898, X86_MUL32r = 899, X86_MUL64m = 900, X86_MUL64r = 901, X86_MUL8m = 902, X86_MUL8r = 903, X86_MULX32rm = 904, X86_MULX32rr = 905, X86_MULX64rm = 906, X86_MULX64rr = 907, X86_NEG16m = 908, X86_NEG16r = 909, X86_NEG32m = 910, X86_NEG32r = 911, X86_NEG64m = 912, X86_NEG64r = 913, X86_NEG8m = 914, X86_NEG8r = 915, X86_NOOP = 916, X86_NOOP18_16m4 = 917, X86_NOOP18_16m5 = 918, X86_NOOP18_16m6 = 919, X86_NOOP18_16m7 = 920, X86_NOOP18_16r4 = 921, X86_NOOP18_16r5 = 922, X86_NOOP18_16r6 = 923, X86_NOOP18_16r7 = 924, X86_NOOP18_m4 = 925, X86_NOOP18_m5 = 926, X86_NOOP18_m6 = 927, X86_NOOP18_m7 = 928, X86_NOOP18_r4 = 929, X86_NOOP18_r5 = 930, X86_NOOP18_r6 = 931, X86_NOOP18_r7 = 932, X86_NOOP19rr = 933, X86_NOOPL = 934, X86_NOOPL_19 = 935, X86_NOOPL_1a = 936, X86_NOOPL_1b = 937, X86_NOOPL_1c = 938, X86_NOOPL_1d = 939, X86_NOOPL_1e = 940, X86_NOOPW = 941, X86_NOOPW_19 = 942, X86_NOOPW_1a = 943, X86_NOOPW_1b = 944, X86_NOOPW_1c = 945, X86_NOOPW_1d = 946, X86_NOOPW_1e = 947, X86_NOT16m = 948, X86_NOT16r = 949, X86_NOT32m = 950, X86_NOT32r = 951, X86_NOT64m = 952, X86_NOT64r = 953, X86_NOT8m = 954, X86_NOT8r = 955, X86_OR16i16 = 956, X86_OR16mi = 957, X86_OR16mi8 = 958, X86_OR16mr = 959, X86_OR16ri = 960, X86_OR16ri8 = 961, X86_OR16rm = 962, X86_OR16rr = 963, X86_OR16rr_REV = 964, X86_OR32i32 = 965, X86_OR32mi = 966, X86_OR32mi8 = 967, X86_OR32mr = 968, X86_OR32mrLocked = 969, X86_OR32ri = 970, X86_OR32ri8 = 971, X86_OR32rm = 972, X86_OR32rr = 973, X86_OR32rr_REV = 974, X86_OR64i32 = 975, X86_OR64mi32 = 976, X86_OR64mi8 = 977, X86_OR64mr = 978, X86_OR64ri32 = 979, X86_OR64ri8 = 980, X86_OR64rm = 981, X86_OR64rr = 982, X86_OR64rr_REV = 983, X86_OR8i8 = 984, X86_OR8mi = 985, X86_OR8mi8 = 986, X86_OR8mr = 987, X86_OR8ri = 988, X86_OR8ri8 = 989, X86_OR8rm = 990, X86_OR8rr = 991, X86_OR8rr_REV = 992, X86_OUT16ir = 993, X86_OUT16rr = 994, X86_OUT32ir = 995, X86_OUT32rr = 996, X86_OUT8ir = 997, X86_OUT8rr = 998, X86_OUTSB = 999, X86_OUTSL = 1000, X86_OUTSW = 1001, X86_PCOMMIT = 1002, X86_PDEP32rm = 1003, X86_PDEP32rr = 1004, X86_PDEP64rm = 1005, X86_PDEP64rr = 1006, X86_PEXT32rm = 1007, X86_PEXT32rr = 1008, X86_PEXT64rm = 1009, X86_PEXT64rr = 1010, X86_POP16r = 1011, X86_POP16rmm = 1012, X86_POP16rmr = 1013, X86_POP32r = 1014, X86_POP32rmm = 1015, X86_POP32rmr = 1016, X86_POP64r = 1017, X86_POP64rmm = 1018, X86_POP64rmr = 1019, X86_POPA16 = 1020, X86_POPA32 = 1021, X86_POPDS16 = 1022, X86_POPDS32 = 1023, X86_POPES16 = 1024, X86_POPES32 = 1025, X86_POPF16 = 1026, X86_POPF32 = 1027, X86_POPF64 = 1028, X86_POPFS16 = 1029, X86_POPFS32 = 1030, X86_POPFS64 = 1031, X86_POPGS16 = 1032, X86_POPGS32 = 1033, X86_POPGS64 = 1034, X86_POPSS16 = 1035, X86_POPSS32 = 1036, X86_PUSH16i8 = 1037, X86_PUSH16r = 1038, X86_PUSH16rmm = 1039, X86_PUSH16rmr = 1040, X86_PUSH32i8 = 1041, X86_PUSH32r = 1042, X86_PUSH32rmm = 1043, X86_PUSH32rmr = 1044, X86_PUSH64i16 = 1045, X86_PUSH64i32 = 1046, X86_PUSH64i8 = 1047, X86_PUSH64r = 1048, X86_PUSH64rmm = 1049, X86_PUSH64rmr = 1050, X86_PUSHA16 = 1051, X86_PUSHA32 = 1052, X86_PUSHCS16 = 1053, X86_PUSHCS32 = 1054, X86_PUSHDS16 = 1055, X86_PUSHDS32 = 1056, X86_PUSHES16 = 1057, X86_PUSHES32 = 1058, X86_PUSHF16 = 1059, X86_PUSHF32 = 1060, X86_PUSHF64 = 1061, X86_PUSHFS16 = 1062, X86_PUSHFS32 = 1063, X86_PUSHFS64 = 1064, X86_PUSHGS16 = 1065, X86_PUSHGS32 = 1066, X86_PUSHGS64 = 1067, X86_PUSHSS16 = 1068, X86_PUSHSS32 = 1069, X86_PUSHi16 = 1070, X86_PUSHi32 = 1071, X86_RCL16m1 = 1072, X86_RCL16mCL = 1073, X86_RCL16mi = 1074, X86_RCL16r1 = 1075, X86_RCL16rCL = 1076, X86_RCL16ri = 1077, X86_RCL32m1 = 1078, X86_RCL32mCL = 1079, X86_RCL32mi = 1080, X86_RCL32r1 = 1081, X86_RCL32rCL = 1082, X86_RCL32ri = 1083, X86_RCL64m1 = 1084, X86_RCL64mCL = 1085, X86_RCL64mi = 1086, X86_RCL64r1 = 1087, X86_RCL64rCL = 1088, X86_RCL64ri = 1089, X86_RCL8m1 = 1090, X86_RCL8mCL = 1091, X86_RCL8mi = 1092, X86_RCL8r1 = 1093, X86_RCL8rCL = 1094, X86_RCL8ri = 1095, X86_RCR16m1 = 1096, X86_RCR16mCL = 1097, X86_RCR16mi = 1098, X86_RCR16r1 = 1099, X86_RCR16rCL = 1100, X86_RCR16ri = 1101, X86_RCR32m1 = 1102, X86_RCR32mCL = 1103, X86_RCR32mi = 1104, X86_RCR32r1 = 1105, X86_RCR32rCL = 1106, X86_RCR32ri = 1107, X86_RCR64m1 = 1108, X86_RCR64mCL = 1109, X86_RCR64mi = 1110, X86_RCR64r1 = 1111, X86_RCR64rCL = 1112, X86_RCR64ri = 1113, X86_RCR8m1 = 1114, X86_RCR8mCL = 1115, X86_RCR8mi = 1116, X86_RCR8r1 = 1117, X86_RCR8rCL = 1118, X86_RCR8ri = 1119, X86_RDFSBASE = 1120, X86_RDFSBASE64 = 1121, X86_RDGSBASE = 1122, X86_RDGSBASE64 = 1123, X86_RDMSR = 1124, X86_RDPMC = 1125, X86_RDRAND16r = 1126, X86_RDRAND32r = 1127, X86_RDRAND64r = 1128, X86_RDSEED16r = 1129, X86_RDSEED32r = 1130, X86_RDSEED64r = 1131, X86_RDTSC = 1132, X86_RDTSCP = 1133, X86_RELEASE_ADD32mi = 1134, X86_RELEASE_ADD64mi32 = 1135, X86_RELEASE_ADD8mi = 1136, X86_RELEASE_AND32mi = 1137, X86_RELEASE_AND64mi32 = 1138, X86_RELEASE_AND8mi = 1139, X86_RELEASE_DEC16m = 1140, X86_RELEASE_DEC32m = 1141, X86_RELEASE_DEC64m = 1142, X86_RELEASE_DEC8m = 1143, X86_RELEASE_INC16m = 1144, X86_RELEASE_INC32m = 1145, X86_RELEASE_INC64m = 1146, X86_RELEASE_INC8m = 1147, X86_RELEASE_MOV16mi = 1148, X86_RELEASE_MOV16mr = 1149, X86_RELEASE_MOV32mi = 1150, X86_RELEASE_MOV32mr = 1151, X86_RELEASE_MOV64mi32 = 1152, X86_RELEASE_MOV64mr = 1153, X86_RELEASE_MOV8mi = 1154, X86_RELEASE_MOV8mr = 1155, X86_RELEASE_OR32mi = 1156, X86_RELEASE_OR64mi32 = 1157, X86_RELEASE_OR8mi = 1158, X86_RELEASE_XOR32mi = 1159, X86_RELEASE_XOR64mi32 = 1160, X86_RELEASE_XOR8mi = 1161, X86_REPNE_PREFIX = 1162, X86_REP_MOVSB_32 = 1163, X86_REP_MOVSB_64 = 1164, X86_REP_MOVSD_32 = 1165, X86_REP_MOVSD_64 = 1166, X86_REP_MOVSQ_64 = 1167, X86_REP_MOVSW_32 = 1168, X86_REP_MOVSW_64 = 1169, X86_REP_PREFIX = 1170, X86_REP_STOSB_32 = 1171, X86_REP_STOSB_64 = 1172, X86_REP_STOSD_32 = 1173, X86_REP_STOSD_64 = 1174, X86_REP_STOSQ_64 = 1175, X86_REP_STOSW_32 = 1176, X86_REP_STOSW_64 = 1177, X86_RETIL = 1178, X86_RETIQ = 1179, X86_RETIW = 1180, X86_RETL = 1181, X86_RETQ = 1182, X86_RETW = 1183, X86_REX64_PREFIX = 1184, X86_ROL16m1 = 1185, X86_ROL16mCL = 1186, X86_ROL16mi = 1187, X86_ROL16r1 = 1188, X86_ROL16rCL = 1189, X86_ROL16ri = 1190, X86_ROL32m1 = 1191, X86_ROL32mCL = 1192, X86_ROL32mi = 1193, X86_ROL32r1 = 1194, X86_ROL32rCL = 1195, X86_ROL32ri = 1196, X86_ROL64m1 = 1197, X86_ROL64mCL = 1198, X86_ROL64mi = 1199, X86_ROL64r1 = 1200, X86_ROL64rCL = 1201, X86_ROL64ri = 1202, X86_ROL8m1 = 1203, X86_ROL8mCL = 1204, X86_ROL8mi = 1205, X86_ROL8r1 = 1206, X86_ROL8rCL = 1207, X86_ROL8ri = 1208, X86_ROR16m1 = 1209, X86_ROR16mCL = 1210, X86_ROR16mi = 1211, X86_ROR16r1 = 1212, X86_ROR16rCL = 1213, X86_ROR16ri = 1214, X86_ROR32m1 = 1215, X86_ROR32mCL = 1216, X86_ROR32mi = 1217, X86_ROR32r1 = 1218, X86_ROR32rCL = 1219, X86_ROR32ri = 1220, X86_ROR64m1 = 1221, X86_ROR64mCL = 1222, X86_ROR64mi = 1223, X86_ROR64r1 = 1224, X86_ROR64rCL = 1225, X86_ROR64ri = 1226, X86_ROR8m1 = 1227, X86_ROR8mCL = 1228, X86_ROR8mi = 1229, X86_ROR8r1 = 1230, X86_ROR8rCL = 1231, X86_ROR8ri = 1232, X86_RORX32mi = 1233, X86_RORX32ri = 1234, X86_RORX64mi = 1235, X86_RORX64ri = 1236, X86_RSM = 1237, X86_SAHF = 1238, X86_SAL16m1 = 1239, X86_SAL16mCL = 1240, X86_SAL16mi = 1241, X86_SAL16r1 = 1242, X86_SAL16rCL = 1243, X86_SAL16ri = 1244, X86_SAL32m1 = 1245, X86_SAL32mCL = 1246, X86_SAL32mi = 1247, X86_SAL32r1 = 1248, X86_SAL32rCL = 1249, X86_SAL32ri = 1250, X86_SAL64m1 = 1251, X86_SAL64mCL = 1252, X86_SAL64mi = 1253, X86_SAL64r1 = 1254, X86_SAL64rCL = 1255, X86_SAL64ri = 1256, X86_SAL8m1 = 1257, X86_SAL8mCL = 1258, X86_SAL8mi = 1259, X86_SAL8r1 = 1260, X86_SAL8rCL = 1261, X86_SAL8ri = 1262, X86_SALC = 1263, X86_SAR16m1 = 1264, X86_SAR16mCL = 1265, X86_SAR16mi = 1266, X86_SAR16r1 = 1267, X86_SAR16rCL = 1268, X86_SAR16ri = 1269, X86_SAR32m1 = 1270, X86_SAR32mCL = 1271, X86_SAR32mi = 1272, X86_SAR32r1 = 1273, X86_SAR32rCL = 1274, X86_SAR32ri = 1275, X86_SAR64m1 = 1276, X86_SAR64mCL = 1277, X86_SAR64mi = 1278, X86_SAR64r1 = 1279, X86_SAR64rCL = 1280, X86_SAR64ri = 1281, X86_SAR8m1 = 1282, X86_SAR8mCL = 1283, X86_SAR8mi = 1284, X86_SAR8r1 = 1285, X86_SAR8rCL = 1286, X86_SAR8ri = 1287, X86_SARX32rm = 1288, X86_SARX32rr = 1289, X86_SARX64rm = 1290, X86_SARX64rr = 1291, X86_SBB16i16 = 1292, X86_SBB16mi = 1293, X86_SBB16mi8 = 1294, X86_SBB16mr = 1295, X86_SBB16ri = 1296, X86_SBB16ri8 = 1297, X86_SBB16rm = 1298, X86_SBB16rr = 1299, X86_SBB16rr_REV = 1300, X86_SBB32i32 = 1301, X86_SBB32mi = 1302, X86_SBB32mi8 = 1303, X86_SBB32mr = 1304, X86_SBB32ri = 1305, X86_SBB32ri8 = 1306, X86_SBB32rm = 1307, X86_SBB32rr = 1308, X86_SBB32rr_REV = 1309, X86_SBB64i32 = 1310, X86_SBB64mi32 = 1311, X86_SBB64mi8 = 1312, X86_SBB64mr = 1313, X86_SBB64ri32 = 1314, X86_SBB64ri8 = 1315, X86_SBB64rm = 1316, X86_SBB64rr = 1317, X86_SBB64rr_REV = 1318, X86_SBB8i8 = 1319, X86_SBB8mi = 1320, X86_SBB8mi8 = 1321, X86_SBB8mr = 1322, X86_SBB8ri = 1323, X86_SBB8ri8 = 1324, X86_SBB8rm = 1325, X86_SBB8rr = 1326, X86_SBB8rr_REV = 1327, X86_SCASB = 1328, X86_SCASL = 1329, X86_SCASQ = 1330, X86_SCASW = 1331, X86_SEG_ALLOCA_32 = 1332, X86_SEG_ALLOCA_64 = 1333, X86_SEH_EndPrologue = 1334, X86_SEH_Epilogue = 1335, X86_SEH_PushFrame = 1336, X86_SEH_PushReg = 1337, X86_SEH_SaveReg = 1338, X86_SEH_SaveXMM = 1339, X86_SEH_SetFrame = 1340, X86_SEH_StackAlloc = 1341, X86_SETAEm = 1342, X86_SETAEr = 1343, X86_SETAm = 1344, X86_SETAr = 1345, X86_SETBEm = 1346, X86_SETBEr = 1347, X86_SETB_C16r = 1348, X86_SETB_C32r = 1349, X86_SETB_C64r = 1350, X86_SETB_C8r = 1351, X86_SETBm = 1352, X86_SETBr = 1353, X86_SETEm = 1354, X86_SETEr = 1355, X86_SETGEm = 1356, X86_SETGEr = 1357, X86_SETGm = 1358, X86_SETGr = 1359, X86_SETLEm = 1360, X86_SETLEr = 1361, X86_SETLm = 1362, X86_SETLr = 1363, X86_SETNEm = 1364, X86_SETNEr = 1365, X86_SETNOm = 1366, X86_SETNOr = 1367, X86_SETNPm = 1368, X86_SETNPr = 1369, X86_SETNSm = 1370, X86_SETNSr = 1371, X86_SETOm = 1372, X86_SETOr = 1373, X86_SETPm = 1374, X86_SETPr = 1375, X86_SETSm = 1376, X86_SETSr = 1377, X86_SGDT16m = 1378, X86_SGDT32m = 1379, X86_SGDT64m = 1380, X86_SHL16m1 = 1381, X86_SHL16mCL = 1382, X86_SHL16mi = 1383, X86_SHL16r1 = 1384, X86_SHL16rCL = 1385, X86_SHL16ri = 1386, X86_SHL32m1 = 1387, X86_SHL32mCL = 1388, X86_SHL32mi = 1389, X86_SHL32r1 = 1390, X86_SHL32rCL = 1391, X86_SHL32ri = 1392, X86_SHL64m1 = 1393, X86_SHL64mCL = 1394, X86_SHL64mi = 1395, X86_SHL64r1 = 1396, X86_SHL64rCL = 1397, X86_SHL64ri = 1398, X86_SHL8m1 = 1399, X86_SHL8mCL = 1400, X86_SHL8mi = 1401, X86_SHL8r1 = 1402, X86_SHL8rCL = 1403, X86_SHL8ri = 1404, X86_SHLD16mrCL = 1405, X86_SHLD16mri8 = 1406, X86_SHLD16rrCL = 1407, X86_SHLD16rri8 = 1408, X86_SHLD32mrCL = 1409, X86_SHLD32mri8 = 1410, X86_SHLD32rrCL = 1411, X86_SHLD32rri8 = 1412, X86_SHLD64mrCL = 1413, X86_SHLD64mri8 = 1414, X86_SHLD64rrCL = 1415, X86_SHLD64rri8 = 1416, X86_SHLX32rm = 1417, X86_SHLX32rr = 1418, X86_SHLX64rm = 1419, X86_SHLX64rr = 1420, X86_SHR16m1 = 1421, X86_SHR16mCL = 1422, X86_SHR16mi = 1423, X86_SHR16r1 = 1424, X86_SHR16rCL = 1425, X86_SHR16ri = 1426, X86_SHR32m1 = 1427, X86_SHR32mCL = 1428, X86_SHR32mi = 1429, X86_SHR32r1 = 1430, X86_SHR32rCL = 1431, X86_SHR32ri = 1432, X86_SHR64m1 = 1433, X86_SHR64mCL = 1434, X86_SHR64mi = 1435, X86_SHR64r1 = 1436, X86_SHR64rCL = 1437, X86_SHR64ri = 1438, X86_SHR8m1 = 1439, X86_SHR8mCL = 1440, X86_SHR8mi = 1441, X86_SHR8r1 = 1442, X86_SHR8rCL = 1443, X86_SHR8ri = 1444, X86_SHRD16mrCL = 1445, X86_SHRD16mri8 = 1446, X86_SHRD16rrCL = 1447, X86_SHRD16rri8 = 1448, X86_SHRD32mrCL = 1449, X86_SHRD32mri8 = 1450, X86_SHRD32rrCL = 1451, X86_SHRD32rri8 = 1452, X86_SHRD64mrCL = 1453, X86_SHRD64mri8 = 1454, X86_SHRD64rrCL = 1455, X86_SHRD64rri8 = 1456, X86_SHRX32rm = 1457, X86_SHRX32rr = 1458, X86_SHRX64rm = 1459, X86_SHRX64rr = 1460, X86_SIDT16m = 1461, X86_SIDT32m = 1462, X86_SIDT64m = 1463, X86_SKINIT = 1464, X86_SLDT16m = 1465, X86_SLDT16r = 1466, X86_SLDT32r = 1467, X86_SLDT64m = 1468, X86_SLDT64r = 1469, X86_SMSW16m = 1470, X86_SMSW16r = 1471, X86_SMSW32r = 1472, X86_SMSW64r = 1473, X86_STAC = 1474, X86_STC = 1475, X86_STD = 1476, X86_STGI = 1477, X86_STI = 1478, X86_STOSB = 1479, X86_STOSL = 1480, X86_STOSQ = 1481, X86_STOSW = 1482, X86_STR16r = 1483, X86_STR32r = 1484, X86_STR64r = 1485, X86_STRm = 1486, X86_SUB16i16 = 1487, X86_SUB16mi = 1488, X86_SUB16mi8 = 1489, X86_SUB16mr = 1490, X86_SUB16ri = 1491, X86_SUB16ri8 = 1492, X86_SUB16rm = 1493, X86_SUB16rr = 1494, X86_SUB16rr_REV = 1495, X86_SUB32i32 = 1496, X86_SUB32mi = 1497, X86_SUB32mi8 = 1498, X86_SUB32mr = 1499, X86_SUB32ri = 1500, X86_SUB32ri8 = 1501, X86_SUB32rm = 1502, X86_SUB32rr = 1503, X86_SUB32rr_REV = 1504, X86_SUB64i32 = 1505, X86_SUB64mi32 = 1506, X86_SUB64mi8 = 1507, X86_SUB64mr = 1508, X86_SUB64ri32 = 1509, X86_SUB64ri8 = 1510, X86_SUB64rm = 1511, X86_SUB64rr = 1512, X86_SUB64rr_REV = 1513, X86_SUB8i8 = 1514, X86_SUB8mi = 1515, X86_SUB8mi8 = 1516, X86_SUB8mr = 1517, X86_SUB8ri = 1518, X86_SUB8ri8 = 1519, X86_SUB8rm = 1520, X86_SUB8rr = 1521, X86_SUB8rr_REV = 1522, X86_SWAPGS = 1523, X86_SYSCALL = 1524, X86_SYSENTER = 1525, X86_SYSEXIT = 1526, X86_SYSEXIT64 = 1527, X86_SYSRET = 1528, X86_SYSRET64 = 1529, X86_T1MSKC32rm = 1530, X86_T1MSKC32rr = 1531, X86_T1MSKC64rm = 1532, X86_T1MSKC64rr = 1533, X86_TAILJMPd = 1534, X86_TAILJMPd64 = 1535, X86_TAILJMPd64_REX = 1536, X86_TAILJMPm = 1537, X86_TAILJMPm64 = 1538, X86_TAILJMPm64_REX = 1539, X86_TAILJMPr = 1540, X86_TAILJMPr64 = 1541, X86_TAILJMPr64_REX = 1542, X86_TCRETURNdi = 1543, X86_TCRETURNdi64 = 1544, X86_TCRETURNmi = 1545, X86_TCRETURNmi64 = 1546, X86_TCRETURNri = 1547, X86_TCRETURNri64 = 1548, X86_TEST16i16 = 1549, X86_TEST16mi = 1550, X86_TEST16mi_alt = 1551, X86_TEST16ri = 1552, X86_TEST16ri_alt = 1553, X86_TEST16rm = 1554, X86_TEST16rr = 1555, X86_TEST32i32 = 1556, X86_TEST32mi = 1557, X86_TEST32mi_alt = 1558, X86_TEST32ri = 1559, X86_TEST32ri_alt = 1560, X86_TEST32rm = 1561, X86_TEST32rr = 1562, X86_TEST64i32 = 1563, X86_TEST64mi32 = 1564, X86_TEST64mi32_alt = 1565, X86_TEST64ri32 = 1566, X86_TEST64ri32_alt = 1567, X86_TEST64rm = 1568, X86_TEST64rr = 1569, X86_TEST8i8 = 1570, X86_TEST8mi = 1571, X86_TEST8mi_alt = 1572, X86_TEST8ri = 1573, X86_TEST8ri_NOREX = 1574, X86_TEST8ri_alt = 1575, X86_TEST8rm = 1576, X86_TEST8rr = 1577, X86_TLSCall_32 = 1578, X86_TLSCall_64 = 1579, X86_TLS_addr32 = 1580, X86_TLS_addr64 = 1581, X86_TLS_base_addr32 = 1582, X86_TLS_base_addr64 = 1583, X86_TRAP = 1584, X86_TZCNT16rm = 1585, X86_TZCNT16rr = 1586, X86_TZCNT32rm = 1587, X86_TZCNT32rr = 1588, X86_TZCNT64rm = 1589, X86_TZCNT64rr = 1590, X86_TZMSK32rm = 1591, X86_TZMSK32rr = 1592, X86_TZMSK64rm = 1593, X86_TZMSK64rr = 1594, X86_UD2B = 1595, X86_VAARG_64 = 1596, X86_VASTART_SAVE_XMM_REGS = 1597, X86_VERRm = 1598, X86_VERRr = 1599, X86_VERWm = 1600, X86_VERWr = 1601, X86_VMCALL = 1602, X86_VMCLEARm = 1603, X86_VMFUNC = 1604, X86_VMLAUNCH = 1605, X86_VMLOAD32 = 1606, X86_VMLOAD64 = 1607, X86_VMMCALL = 1608, X86_VMPTRLDm = 1609, X86_VMPTRSTm = 1610, X86_VMREAD32rm = 1611, X86_VMREAD32rr = 1612, X86_VMREAD64rm = 1613, X86_VMREAD64rr = 1614, X86_VMRESUME = 1615, X86_VMRUN32 = 1616, X86_VMRUN64 = 1617, X86_VMSAVE32 = 1618, X86_VMSAVE64 = 1619, X86_VMWRITE32rm = 1620, X86_VMWRITE32rr = 1621, X86_VMWRITE64rm = 1622, X86_VMWRITE64rr = 1623, X86_VMXOFF = 1624, X86_VMXON = 1625, X86_WBINVD = 1626, X86_WIN_ALLOCA = 1627, X86_WIN_FTOL_32 = 1628, X86_WIN_FTOL_64 = 1629, X86_WRFSBASE = 1630, X86_WRFSBASE64 = 1631, X86_WRGSBASE = 1632, X86_WRGSBASE64 = 1633, X86_WRMSR = 1634, X86_XADD16rm = 1635, X86_XADD16rr = 1636, X86_XADD32rm = 1637, X86_XADD32rr = 1638, X86_XADD64rm = 1639, X86_XADD64rr = 1640, X86_XADD8rm = 1641, X86_XADD8rr = 1642, X86_XCHG16ar = 1643, X86_XCHG16rm = 1644, X86_XCHG16rr = 1645, X86_XCHG32ar = 1646, X86_XCHG32ar64 = 1647, X86_XCHG32rm = 1648, X86_XCHG32rr = 1649, X86_XCHG64ar = 1650, X86_XCHG64rm = 1651, X86_XCHG64rr = 1652, X86_XCHG8rm = 1653, X86_XCHG8rr = 1654, X86_XCRYPTCBC = 1655, X86_XCRYPTCFB = 1656, X86_XCRYPTCTR = 1657, X86_XCRYPTECB = 1658, X86_XCRYPTOFB = 1659, X86_XGETBV = 1660, X86_XLAT = 1661, X86_XOR16i16 = 1662, X86_XOR16mi = 1663, X86_XOR16mi8 = 1664, X86_XOR16mr = 1665, X86_XOR16ri = 1666, X86_XOR16ri8 = 1667, X86_XOR16rm = 1668, X86_XOR16rr = 1669, X86_XOR16rr_REV = 1670, X86_XOR32i32 = 1671, X86_XOR32mi = 1672, X86_XOR32mi8 = 1673, X86_XOR32mr = 1674, X86_XOR32ri = 1675, X86_XOR32ri8 = 1676, X86_XOR32rm = 1677, X86_XOR32rr = 1678, X86_XOR32rr_REV = 1679, X86_XOR64i32 = 1680, X86_XOR64mi32 = 1681, X86_XOR64mi8 = 1682, X86_XOR64mr = 1683, X86_XOR64ri32 = 1684, X86_XOR64ri8 = 1685, X86_XOR64rm = 1686, X86_XOR64rr = 1687, X86_XOR64rr_REV = 1688, X86_XOR8i8 = 1689, X86_XOR8mi = 1690, X86_XOR8mi8 = 1691, X86_XOR8mr = 1692, X86_XOR8ri = 1693, X86_XOR8ri8 = 1694, X86_XOR8rm = 1695, X86_XOR8rr = 1696, X86_XOR8rr_REV = 1697, X86_XRSTOR = 1698, X86_XRSTOR64 = 1699, X86_XRSTORS = 1700, X86_XRSTORS64 = 1701, X86_XSAVE = 1702, X86_XSAVE64 = 1703, X86_XSAVEC = 1704, X86_XSAVEC64 = 1705, X86_XSAVEOPT = 1706, X86_XSAVEOPT64 = 1707, X86_XSAVES = 1708, X86_XSAVES64 = 1709, X86_XSETBV = 1710, X86_XSHA1 = 1711, X86_XSHA256 = 1712, X86_XSTORE = 1713, X86_UD0 = 1714, X86_ENDBR32 = 8854, X86_ENDBR64 = 8855, X86_INSTRUCTION_LIST_END = 1715 }; #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC typedef struct x86_op_id_pair { uint16_t first; uint16_t second; } x86_op_id_pair; static const x86_op_id_pair x86_16_bit_eq_tbl[] = { { 27, 26 }, { 28, 26 }, { 39, 30 }, { 40, 31 }, { 41, 32 }, { 42, 33 }, { 43, 34 }, { 44, 35 }, { 45, 36 }, { 46, 37 }, { 47, 38 }, { 48, 30 }, { 50, 32 }, { 51, 33 }, { 53, 35 }, { 54, 36 }, { 55, 37 }, { 56, 38 }, { 82, 70 }, { 83, 71 }, { 84, 72 }, { 85, 73 }, { 86, 74 }, { 87, 75 }, { 88, 76 }, { 89, 77 }, { 90, 78 }, { 91, 79 }, { 92, 80 }, { 93, 81 }, { 94, 70 }, { 96, 72 }, { 97, 73 }, { 100, 75 }, { 101, 76 }, { 102, 78 }, { 103, 79 }, { 104, 80 }, { 105, 81 }, { 132, 123 }, { 133, 124 }, { 134, 125 }, { 135, 126 }, { 136, 127 }, { 137, 128 }, { 138, 129 }, { 139, 130 }, { 140, 131 }, { 141, 123 }, { 143, 125 }, { 144, 126 }, { 146, 128 }, { 147, 129 }, { 148, 130 }, { 149, 131 }, { 214, 213 }, { 217, 215 }, { 218, 216 }, { 219, 215 }, { 220, 216 }, { 223, 221 }, { 224, 222 }, { 225, 221 }, { 226, 222 }, { 233, 229 }, { 234, 230 }, { 235, 231 }, { 236, 232 }, { 237, 229 }, { 238, 230 }, { 239, 231 }, { 240, 232 }, { 245, 241 }, { 246, 242 }, { 247, 243 }, { 248, 244 }, { 249, 241 }, { 250, 242 }, { 251, 243 }, { 252, 244 }, { 257, 253 }, { 258, 254 }, { 259, 255 }, { 260, 256 }, { 261, 253 }, { 262, 254 }, { 263, 255 }, { 264, 256 }, { 269, 265 }, { 270, 266 }, { 271, 267 }, { 272, 268 }, { 273, 265 }, { 274, 266 }, { 275, 267 }, { 276, 268 }, { 283, 281 }, { 284, 282 }, { 285, 281 }, { 287, 282 }, { 289, 288 }, { 295, 467 }, { 304, 302 }, { 305, 303 }, { 306, 302 }, { 307, 303 }, { 310, 308 }, { 311, 309 }, { 312, 308 }, { 313, 309 }, { 316, 314 }, { 317, 315 }, { 318, 314 }, { 319, 315 }, { 322, 320 }, { 323, 321 }, { 324, 320 }, { 325, 321 }, { 328, 326 }, { 329, 327 }, { 330, 326 }, { 331, 327 }, { 334, 332 }, { 335, 333 }, { 336, 332 }, { 337, 333 }, { 340, 338 }, { 341, 339 }, { 342, 338 }, { 343, 339 }, { 346, 344 }, { 347, 345 }, { 348, 344 }, { 349, 345 }, { 352, 350 }, { 353, 351 }, { 354, 350 }, { 355, 351 }, { 358, 356 }, { 359, 357 }, { 360, 356 }, { 361, 357 }, { 364, 362 }, { 365, 363 }, { 366, 362 }, { 367, 363 }, { 370, 368 }, { 371, 369 }, { 372, 368 }, { 373, 369 }, { 376, 374 }, { 377, 375 }, { 378, 374 }, { 379, 375 }, { 382, 380 }, { 383, 381 }, { 384, 380 }, { 385, 381 }, { 388, 386 }, { 389, 387 }, { 390, 386 }, { 391, 387 }, { 394, 392 }, { 395, 393 }, { 396, 392 }, { 397, 393 }, { 401, 400 }, { 424, 415 }, { 425, 416 }, { 426, 417 }, { 427, 418 }, { 428, 419 }, { 429, 420 }, { 430, 421 }, { 431, 422 }, { 432, 423 }, { 433, 415 }, { 435, 417 }, { 436, 418 }, { 438, 420 }, { 439, 421 }, { 440, 422 }, { 441, 423 }, { 452, 454 }, { 453, 454 }, { 458, 456 }, { 459, 457 }, { 460, 456 }, { 461, 457 }, { 475, 472 }, { 476, 473 }, { 477, 474 }, { 478, 472 }, { 479, 473 }, { 484, 482 }, { 485, 483 }, { 486, 482 }, { 487, 483 }, { 500, 498 }, { 501, 499 }, { 505, 503 }, { 506, 504 }, { 513, 511 }, { 514, 512 }, { 515, 511 }, { 516, 512 }, { 527, 519 }, { 528, 520 }, { 529, 521 }, { 530, 522 }, { 531, 523 }, { 532, 524 }, { 533, 525 }, { 534, 526 }, { 535, 519 }, { 536, 520 }, { 537, 521 }, { 539, 523 }, { 540, 524 }, { 542, 526 }, { 547, 545 }, { 548, 546 }, { 554, 551 }, { 555, 552 }, { 556, 553 }, { 557, 551 }, { 558, 552 }, { 562, 563 }, { 566, 565 }, { 579, 578 }, { 580, 578 }, { 613, 611 }, { 614, 612 }, { 615, 611 }, { 616, 612 }, { 645, 643 }, { 646, 644 }, { 647, 643 }, { 648, 644 }, { 651, 649 }, { 652, 649 }, { 656, 655 }, { 658, 657 }, { 660, 657 }, { 664, 663 }, { 666, 665 }, { 667, 665 }, { 669, 668 }, { 670, 668 }, { 672, 671 }, { 673, 671 }, { 675, 674 }, { 676, 674 }, { 684, 681 }, { 685, 682 }, { 686, 683 }, { 688, 682 }, { 689, 683 }, { 695, 692 }, { 696, 693 }, { 697, 694 }, { 699, 693 }, { 700, 694 }, { 704, 703 }, { 705, 703 }, { 708, 707 }, { 709, 707 }, { 714, 711 }, { 715, 712 }, { 716, 713 }, { 718, 712 }, { 719, 713 }, { 726, 723 }, { 727, 724 }, { 728, 725 }, { 730, 724 }, { 731, 725 }, { 737, 734 }, { 738, 735 }, { 739, 736 }, { 741, 735 }, { 742, 736 }, { 746, 748 }, { 747, 748 }, { 752, 754 }, { 753, 754 }, { 755, 757 }, { 756, 757 }, { 760, 758 }, { 761, 759 }, { 762, 758 }, { 763, 759 }, { 765, 764 }, { 766, 764 }, { 770, 769 }, { 771, 769 }, { 775, 773 }, { 776, 774 }, { 777, 773 }, { 778, 774 }, { 783, 782 }, { 784, 782 }, { 789, 788 }, { 790, 788 }, { 799, 782 }, { 800, 782 }, { 800, 783 }, { 800, 799 }, { 801, 782 }, { 801, 784 }, { 801, 799 }, { 804, 785 }, { 805, 786 }, { 806, 787 }, { 807, 788 }, { 808, 788 }, { 808, 789 }, { 808, 807 }, { 809, 788 }, { 809, 790 }, { 809, 807 }, { 813, 791 }, { 815, 792 }, { 816, 793 }, { 817, 794 }, { 818, 795 }, { 819, 796 }, { 820, 797 }, { 821, 798 }, { 822, 782 }, { 822, 783 }, { 823, 782 }, { 823, 784 }, { 827, 786 }, { 828, 787 }, { 829, 788 }, { 829, 789 }, { 830, 788 }, { 830, 790 }, { 833, 791 }, { 835, 793 }, { 836, 794 }, { 837, 795 }, { 838, 796 }, { 839, 797 }, { 840, 798 }, { 842, 841 }, { 843, 841 }, { 848, 847 }, { 849, 847 }, { 859, 857 }, { 860, 858 }, { 861, 857 }, { 862, 858 }, { 865, 867 }, { 866, 867 }, { 873, 868 }, { 875, 869 }, { 878, 877 }, { 880, 868 }, { 882, 881 }, { 883, 869 }, { 889, 884 }, { 891, 885 }, { 898, 896 }, { 899, 897 }, { 900, 896 }, { 901, 897 }, { 910, 908 }, { 911, 909 }, { 912, 908 }, { 913, 909 }, { 917, 919 }, { 921, 923 }, { 925, 927 }, { 929, 931 }, { 934, 941 }, { 935, 942 }, { 936, 943 }, { 937, 944 }, { 938, 945 }, { 939, 946 }, { 940, 947 }, { 950, 948 }, { 951, 949 }, { 952, 948 }, { 953, 949 }, { 965, 956 }, { 966, 957 }, { 967, 958 }, { 968, 959 }, { 970, 960 }, { 971, 961 }, { 972, 962 }, { 973, 963 }, { 974, 964 }, { 975, 956 }, { 977, 958 }, { 978, 959 }, { 980, 961 }, { 981, 962 }, { 982, 963 }, { 983, 964 }, { 995, 993 }, { 996, 994 }, { 1000, 1001 }, { 1014, 1011 }, { 1015, 1012 }, { 1016, 1013 }, { 1017, 1011 }, { 1018, 1012 }, { 1019, 1013 }, { 1021, 1020 }, { 1023, 1022 }, { 1025, 1024 }, { 1027, 1026 }, { 1028, 1026 }, { 1030, 1029 }, { 1031, 1029 }, { 1033, 1032 }, { 1034, 1032 }, { 1036, 1035 }, { 1041, 1037 }, { 1042, 1038 }, { 1043, 1039 }, { 1044, 1040 }, { 1046, 1045 }, { 1047, 1037 }, { 1048, 1038 }, { 1049, 1039 }, { 1050, 1040 }, { 1052, 1051 }, { 1054, 1053 }, { 1056, 1055 }, { 1058, 1057 }, { 1060, 1059 }, { 1061, 1059 }, { 1063, 1062 }, { 1064, 1062 }, { 1066, 1065 }, { 1067, 1065 }, { 1069, 1068 }, { 1071, 1070 }, { 1078, 1072 }, { 1079, 1073 }, { 1080, 1074 }, { 1081, 1075 }, { 1082, 1076 }, { 1083, 1077 }, { 1084, 1072 }, { 1085, 1073 }, { 1086, 1074 }, { 1087, 1075 }, { 1088, 1076 }, { 1089, 1077 }, { 1102, 1096 }, { 1103, 1097 }, { 1104, 1098 }, { 1105, 1099 }, { 1106, 1100 }, { 1107, 1101 }, { 1108, 1096 }, { 1109, 1097 }, { 1110, 1098 }, { 1111, 1099 }, { 1112, 1100 }, { 1113, 1101 }, { 1127, 1126 }, { 1128, 1126 }, { 1130, 1129 }, { 1131, 1129 }, { 1141, 1140 }, { 1142, 1140 }, { 1145, 1144 }, { 1146, 1144 }, { 1150, 1148 }, { 1151, 1149 }, { 1153, 1149 }, { 1167, 1169 }, { 1175, 1177 }, { 1178, 1180 }, { 1179, 1180 }, { 1181, 1183 }, { 1182, 1183 }, { 1191, 1185 }, { 1192, 1186 }, { 1193, 1187 }, { 1194, 1188 }, { 1195, 1189 }, { 1196, 1190 }, { 1197, 1185 }, { 1198, 1186 }, { 1199, 1187 }, { 1200, 1188 }, { 1201, 1189 }, { 1202, 1190 }, { 1215, 1209 }, { 1216, 1210 }, { 1217, 1211 }, { 1218, 1212 }, { 1219, 1213 }, { 1220, 1214 }, { 1221, 1209 }, { 1222, 1210 }, { 1223, 1211 }, { 1224, 1212 }, { 1225, 1213 }, { 1226, 1214 }, { 1245, 1239 }, { 1246, 1240 }, { 1247, 1241 }, { 1248, 1242 }, { 1249, 1243 }, { 1250, 1244 }, { 1251, 1239 }, { 1252, 1240 }, { 1253, 1241 }, { 1254, 1242 }, { 1255, 1243 }, { 1256, 1244 }, { 1270, 1264 }, { 1271, 1265 }, { 1272, 1266 }, { 1273, 1267 }, { 1274, 1268 }, { 1275, 1269 }, { 1276, 1264 }, { 1277, 1265 }, { 1278, 1266 }, { 1279, 1267 }, { 1280, 1268 }, { 1281, 1269 }, { 1301, 1292 }, { 1302, 1293 }, { 1303, 1294 }, { 1304, 1295 }, { 1305, 1296 }, { 1306, 1297 }, { 1307, 1298 }, { 1308, 1299 }, { 1309, 1300 }, { 1310, 1292 }, { 1312, 1294 }, { 1313, 1295 }, { 1315, 1297 }, { 1316, 1298 }, { 1317, 1299 }, { 1318, 1300 }, { 1329, 1331 }, { 1330, 1331 }, { 1349, 1348 }, { 1350, 1348 }, { 1379, 1378 }, { 1380, 1378 }, { 1387, 1381 }, { 1388, 1382 }, { 1389, 1383 }, { 1390, 1384 }, { 1391, 1385 }, { 1392, 1386 }, { 1393, 1381 }, { 1394, 1382 }, { 1395, 1383 }, { 1396, 1384 }, { 1397, 1385 }, { 1398, 1386 }, { 1409, 1405 }, { 1410, 1406 }, { 1411, 1407 }, { 1412, 1408 }, { 1413, 1405 }, { 1414, 1406 }, { 1415, 1407 }, { 1416, 1408 }, { 1427, 1421 }, { 1428, 1422 }, { 1429, 1423 }, { 1430, 1424 }, { 1431, 1425 }, { 1432, 1426 }, { 1433, 1421 }, { 1434, 1422 }, { 1435, 1423 }, { 1436, 1424 }, { 1437, 1425 }, { 1438, 1426 }, { 1449, 1445 }, { 1450, 1446 }, { 1451, 1447 }, { 1452, 1448 }, { 1453, 1445 }, { 1454, 1446 }, { 1455, 1447 }, { 1456, 1448 }, { 1462, 1461 }, { 1463, 1461 }, { 1467, 1466 }, { 1468, 1465 }, { 1469, 1466 }, { 1472, 1471 }, { 1473, 1471 }, { 1480, 1482 }, { 1481, 1482 }, { 1484, 1483 }, { 1485, 1483 }, { 1496, 1487 }, { 1497, 1488 }, { 1498, 1489 }, { 1499, 1490 }, { 1500, 1491 }, { 1501, 1492 }, { 1502, 1493 }, { 1503, 1494 }, { 1504, 1495 }, { 1505, 1487 }, { 1507, 1489 }, { 1508, 1490 }, { 1510, 1492 }, { 1511, 1493 }, { 1512, 1494 }, { 1513, 1495 }, { 1556, 1549 }, { 1557, 1550 }, { 1558, 1551 }, { 1559, 1552 }, { 1560, 1553 }, { 1561, 1554 }, { 1562, 1555 }, { 1563, 1549 }, { 1568, 1554 }, { 1569, 1555 }, { 1587, 1585 }, { 1588, 1586 }, { 1589, 1585 }, { 1590, 1586 }, { 1637, 1635 }, { 1638, 1636 }, { 1639, 1635 }, { 1640, 1636 }, { 1646, 1643 }, { 1648, 1644 }, { 1649, 1645 }, { 1650, 1643 }, { 1651, 1644 }, { 1652, 1645 }, { 1671, 1662 }, { 1672, 1663 }, { 1673, 1664 }, { 1674, 1665 }, { 1675, 1666 }, { 1676, 1667 }, { 1677, 1668 }, { 1678, 1669 }, { 1679, 1670 }, { 1680, 1662 }, { 1682, 1664 }, { 1683, 1665 }, { 1685, 1667 }, { 1686, 1668 }, { 1687, 1669 }, { 1688, 1670 }, }; static const uint16_t x86_16_bit_eq_lookup[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 0, 13, 14, 0, 15, 16, 17, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 32, 33, 0, 0, 34, 35, 36, 37, 38, 39, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 0, 50, 51, 0, 52, 53, 54, 55, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 56, 0, 0, 57, 58, 59, 60, 0, 0, 61, 62, 63, 64, 0, 0, 0, 0, 0, 0, 65, 66, 67, 68, 69, 70, 71, 72, 0, 0, 0, 0, 73, 74, 75, 76, 77, 78, 79, 80, 0, 0, 0, 0, 81, 82, 83, 84, 85, 86, 87, 88, 0, 0, 0, 0, 89, 90, 91, 92, 93, 94, 95, 96, 0, 0, 0, 0, 0, 0, 97, 98, 99, 0, 100, 0, 101, 0, 0, 0, 0, 0, 102, 0, 0, 0, 0, 0, 0, 0, 0, 103, 104, 105, 106, 0, 0, 107, 108, 109, 110, 0, 0, 111, 112, 113, 114, 0, 0, 115, 116, 117, 118, 0, 0, 119, 120, 121, 122, 0, 0, 123, 124, 125, 126, 0, 0, 127, 128, 129, 130, 0, 0, 131, 132, 133, 134, 0, 0, 135, 136, 137, 138, 0, 0, 139, 140, 141, 142, 0, 0, 143, 144, 145, 146, 0, 0, 147, 148, 149, 150, 0, 0, 151, 152, 153, 154, 0, 0, 155, 156, 157, 158, 0, 0, 159, 160, 161, 162, 0, 0, 163, 164, 165, 166, 0, 0, 0, 167, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 0, 178, 179, 0, 180, 181, 182, 183, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 184, 185, 0, 0, 0, 0, 186, 187, 188, 189, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 190, 191, 192, 193, 194, 0, 0, 0, 0, 195, 196, 197, 198, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 199, 200, 0, 0, 0, 201, 202, 0, 0, 0, 0, 0, 0, 203, 204, 205, 206, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 207, 208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 0, 218, 219, 0, 220, 0, 0, 0, 0, 221, 222, 0, 0, 0, 0, 0, 223, 224, 225, 226, 227, 0, 0, 0, 228, 0, 0, 0, 229, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 230, 231, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 232, 233, 234, 235, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 236, 237, 238, 239, 0, 0, 240, 241, 0, 0, 0, 242, 0, 243, 0, 244, 0, 0, 0, 245, 0, 246, 247, 0, 248, 249, 0, 250, 251, 0, 252, 253, 0, 0, 0, 0, 0, 0, 0, 254, 255, 256, 0, 257, 258, 0, 0, 0, 0, 0, 259, 260, 261, 0, 262, 263, 0, 0, 0, 264, 265, 0, 0, 266, 267, 0, 0, 0, 0, 268, 269, 270, 0, 271, 272, 0, 0, 0, 0, 0, 0, 273, 274, 275, 0, 276, 277, 0, 0, 0, 0, 0, 278, 279, 280, 0, 281, 282, 0, 0, 0, 283, 284, 0, 0, 0, 0, 285, 286, 0, 287, 288, 0, 0, 0, 289, 290, 291, 292, 0, 293, 294, 0, 0, 0, 295, 296, 0, 0, 0, 297, 298, 299, 300, 0, 0, 0, 0, 301, 302, 0, 0, 0, 0, 303, 304, 0, 0, 0, 0, 0, 0, 0, 0, 305, 306, 309, 0, 0, 312, 313, 314, 315, 316, 319, 0, 0, 0, 322, 0, 323, 324, 325, 326, 327, 328, 329, 330, 332, 0, 0, 0, 334, 335, 336, 338, 0, 0, 340, 0, 341, 342, 343, 344, 345, 346, 0, 347, 348, 0, 0, 0, 0, 349, 350, 0, 0, 0, 0, 0, 0, 0, 0, 0, 351, 352, 353, 354, 0, 0, 355, 356, 0, 0, 0, 0, 0, 0, 357, 0, 358, 0, 0, 359, 0, 360, 0, 361, 362, 0, 0, 0, 0, 0, 363, 0, 364, 0, 0, 0, 0, 0, 0, 365, 366, 367, 368, 0, 0, 0, 0, 0, 0, 0, 0, 369, 370, 371, 372, 0, 0, 0, 373, 0, 0, 0, 374, 0, 0, 0, 375, 0, 0, 0, 376, 0, 0, 0, 0, 377, 378, 379, 380, 381, 382, 383, 0, 0, 0, 0, 0, 0, 0, 0, 0, 384, 385, 386, 387, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 388, 389, 390, 391, 0, 392, 393, 394, 395, 396, 397, 0, 398, 399, 0, 400, 401, 402, 403, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 404, 405, 0, 0, 0, 406, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 407, 408, 409, 410, 411, 412, 0, 413, 0, 414, 0, 415, 0, 416, 417, 0, 418, 419, 0, 420, 421, 0, 422, 0, 0, 0, 0, 423, 424, 425, 426, 0, 427, 428, 429, 430, 431, 0, 432, 0, 433, 0, 434, 0, 435, 0, 436, 437, 0, 438, 439, 0, 440, 441, 0, 442, 0, 443, 0, 0, 0, 0, 0, 0, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 468, 469, 0, 470, 471, 0, 0, 0, 0, 0, 0, 0, 0, 0, 472, 473, 0, 0, 474, 475, 0, 0, 0, 476, 477, 0, 478, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 479, 0, 0, 0, 0, 0, 0, 0, 480, 0, 0, 481, 482, 0, 483, 484, 0, 0, 0, 0, 0, 0, 0, 0, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 521, 522, 523, 524, 525, 526, 527, 528, 529, 530, 531, 532, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 0, 543, 544, 0, 545, 546, 547, 548, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 549, 550, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 551, 552, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 553, 554, 0, 0, 0, 0, 0, 0, 555, 556, 557, 558, 559, 560, 561, 562, 563, 564, 565, 566, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 567, 568, 569, 570, 571, 572, 573, 574, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 575, 576, 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 587, 588, 589, 590, 591, 592, 593, 594, 0, 0, 0, 0, 0, 595, 596, 0, 0, 0, 597, 598, 599, 0, 0, 600, 601, 0, 0, 0, 0, 0, 0, 602, 603, 0, 0, 604, 605, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 606, 607, 608, 609, 610, 611, 612, 613, 614, 615, 0, 616, 617, 0, 618, 619, 620, 621, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 622, 623, 624, 625, 626, 627, 628, 629, 0, 0, 0, 0, 630, 631, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 632, 633, 634, 635, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 636, 637, 638, 639, 0, 0, 0, 0, 0, 640, 0, 641, 642, 643, 644, 645, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 0, 656, 657, 0, 658, 659, 660, 661, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const bool is_64bit_insn[] = { false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, true, false, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, true, true, false, false, false, false, false, false, true, true, false, false, false, false, true, true, false, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, true, true, false, false, false, false, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, true, false, false, false, false, true, false, false, true, true, false, true, true, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, true, true, false, false, false, true, false, true, false, true, false, false, false, false, false, false, true, false, false, false, false, true, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, true, false, false, true, false, true, false, true, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, true, false, false, false, false, false, false, true, true, false, true, false, false, false, false, true, false, false, true, false, false, true, false, false, true, false, false, false, false, false, false, false, false, false, false, true, true, true, false, false, false, false, false, false, false, false, true, true, true, false, false, false, false, true, false, false, false, true, false, false, false, false, false, false, false, true, true, true, false, false, false, false, false, false, false, false, false, true, true, true, false, false, false, false, false, false, false, false, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, true, false, false, false, false, true, false, false, false, false, false, true, true, false, false, false, false, false, true, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, true, false, false, false, false, true, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, true, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, true, true, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, false, false, true, true, false, false, false, false, false, false, true, true, true, false, false, false, false, false, false, false, false, true, false, false, true, false, false, true, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, true, false, false, true, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, true, false, true, false, false, false, false, true, false, false, true, false, false, false, true, false, false, true, false, false, false, true, false, false, false, true, false, false, false, false, false, true, true, false, false, false, true, false, false, true, false, false, false, true, false, true, true, false, true, false, false, true, false, true, true, false, true, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, false, false, true, true, false, false, true, false, false, false, false, true, true, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, true, false, false, true, true, false, true, true, false, true, true, false, true, true, false, true, false, true, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, true, false, true, false, true, false, false, false, false, false, true, true, false, false, true, true, false, true, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, true, true, false, false, true, false, true, false, false, true, true, false, false, false, false, false, true, false, true, false, true, false, false, false, false, false, true, true, false, false, false, false, false, false, true, false, false, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false, false, false, false, }; #endif // GET_INSTRINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/X86/X86GenRegisterInfo.inc010066400017500001750000001513051363402546700216340ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { X86_NoRegister, X86_AH = 1, X86_AL = 2, X86_AX = 3, X86_BH = 4, X86_BL = 5, X86_BP = 6, X86_BPL = 7, X86_BX = 8, X86_CH = 9, X86_CL = 10, X86_CS = 11, X86_CX = 12, X86_DH = 13, X86_DI = 14, X86_DIL = 15, X86_DL = 16, X86_DS = 17, X86_DX = 18, X86_EAX = 19, X86_EBP = 20, X86_EBX = 21, X86_ECX = 22, X86_EDI = 23, X86_EDX = 24, X86_EFLAGS = 25, X86_EIP = 26, X86_EIZ = 27, X86_ES = 28, X86_ESI = 29, X86_ESP = 30, X86_FPSW = 31, X86_FS = 32, X86_GS = 33, X86_IP = 34, X86_RAX = 35, X86_RBP = 36, X86_RBX = 37, X86_RCX = 38, X86_RDI = 39, X86_RDX = 40, X86_RIP = 41, X86_RIZ = 42, X86_RSI = 43, X86_RSP = 44, X86_SI = 45, X86_SIL = 46, X86_SP = 47, X86_SPL = 48, X86_SS = 49, X86_CR0 = 50, X86_CR1 = 51, X86_CR2 = 52, X86_CR3 = 53, X86_CR4 = 54, X86_CR5 = 55, X86_CR6 = 56, X86_CR7 = 57, X86_CR8 = 58, X86_CR9 = 59, X86_CR10 = 60, X86_CR11 = 61, X86_CR12 = 62, X86_CR13 = 63, X86_CR14 = 64, X86_CR15 = 65, X86_DR0 = 66, X86_DR1 = 67, X86_DR2 = 68, X86_DR3 = 69, X86_DR4 = 70, X86_DR5 = 71, X86_DR6 = 72, X86_DR7 = 73, X86_DR8 = 74, X86_DR9 = 75, X86_DR10 = 76, X86_DR11 = 77, X86_DR12 = 78, X86_DR13 = 79, X86_DR14 = 80, X86_DR15 = 81, X86_FP0 = 82, X86_FP1 = 83, X86_FP2 = 84, X86_FP3 = 85, X86_FP4 = 86, X86_FP5 = 87, X86_FP6 = 88, X86_FP7 = 89, X86_K0 = 90, X86_K1 = 91, X86_K2 = 92, X86_K3 = 93, X86_K4 = 94, X86_K5 = 95, X86_K6 = 96, X86_K7 = 97, X86_MM0 = 98, X86_MM1 = 99, X86_MM2 = 100, X86_MM3 = 101, X86_MM4 = 102, X86_MM5 = 103, X86_MM6 = 104, X86_MM7 = 105, X86_R8 = 106, X86_R9 = 107, X86_R10 = 108, X86_R11 = 109, X86_R12 = 110, X86_R13 = 111, X86_R14 = 112, X86_R15 = 113, X86_ST0 = 114, X86_ST1 = 115, X86_ST2 = 116, X86_ST3 = 117, X86_ST4 = 118, X86_ST5 = 119, X86_ST6 = 120, X86_ST7 = 121, X86_XMM0 = 122, X86_XMM1 = 123, X86_XMM2 = 124, X86_XMM3 = 125, X86_XMM4 = 126, X86_XMM5 = 127, X86_XMM6 = 128, X86_XMM7 = 129, X86_XMM8 = 130, X86_XMM9 = 131, X86_XMM10 = 132, X86_XMM11 = 133, X86_XMM12 = 134, X86_XMM13 = 135, X86_XMM14 = 136, X86_XMM15 = 137, X86_XMM16 = 138, X86_XMM17 = 139, X86_XMM18 = 140, X86_XMM19 = 141, X86_XMM20 = 142, X86_XMM21 = 143, X86_XMM22 = 144, X86_XMM23 = 145, X86_XMM24 = 146, X86_XMM25 = 147, X86_XMM26 = 148, X86_XMM27 = 149, X86_XMM28 = 150, X86_XMM29 = 151, X86_XMM30 = 152, X86_XMM31 = 153, X86_YMM0 = 154, X86_YMM1 = 155, X86_YMM2 = 156, X86_YMM3 = 157, X86_YMM4 = 158, X86_YMM5 = 159, X86_YMM6 = 160, X86_YMM7 = 161, X86_YMM8 = 162, X86_YMM9 = 163, X86_YMM10 = 164, X86_YMM11 = 165, X86_YMM12 = 166, X86_YMM13 = 167, X86_YMM14 = 168, X86_YMM15 = 169, X86_YMM16 = 170, X86_YMM17 = 171, X86_YMM18 = 172, X86_YMM19 = 173, X86_YMM20 = 174, X86_YMM21 = 175, X86_YMM22 = 176, X86_YMM23 = 177, X86_YMM24 = 178, X86_YMM25 = 179, X86_YMM26 = 180, X86_YMM27 = 181, X86_YMM28 = 182, X86_YMM29 = 183, X86_YMM30 = 184, X86_YMM31 = 185, X86_ZMM0 = 186, X86_ZMM1 = 187, X86_ZMM2 = 188, X86_ZMM3 = 189, X86_ZMM4 = 190, X86_ZMM5 = 191, X86_ZMM6 = 192, X86_ZMM7 = 193, X86_ZMM8 = 194, X86_ZMM9 = 195, X86_ZMM10 = 196, X86_ZMM11 = 197, X86_ZMM12 = 198, X86_ZMM13 = 199, X86_ZMM14 = 200, X86_ZMM15 = 201, X86_ZMM16 = 202, X86_ZMM17 = 203, X86_ZMM18 = 204, X86_ZMM19 = 205, X86_ZMM20 = 206, X86_ZMM21 = 207, X86_ZMM22 = 208, X86_ZMM23 = 209, X86_ZMM24 = 210, X86_ZMM25 = 211, X86_ZMM26 = 212, X86_ZMM27 = 213, X86_ZMM28 = 214, X86_ZMM29 = 215, X86_ZMM30 = 216, X86_ZMM31 = 217, X86_R8B = 218, X86_R9B = 219, X86_R10B = 220, X86_R11B = 221, X86_R12B = 222, X86_R13B = 223, X86_R14B = 224, X86_R15B = 225, X86_R8D = 226, X86_R9D = 227, X86_R10D = 228, X86_R11D = 229, X86_R12D = 230, X86_R13D = 231, X86_R14D = 232, X86_R15D = 233, X86_R8W = 234, X86_R9W = 235, X86_R10W = 236, X86_R11W = 237, X86_R12W = 238, X86_R13W = 239, X86_R14W = 240, X86_R15W = 241, X86_NUM_TARGET_REGS // 242 }; // Register classes enum { X86_GR8RegClassID = 0, X86_GR8_NOREXRegClassID = 1, X86_VK1RegClassID = 2, X86_VK2RegClassID = 3, X86_VK4RegClassID = 4, X86_VK8RegClassID = 5, X86_VK1WMRegClassID = 6, X86_VK2WMRegClassID = 7, X86_VK4WMRegClassID = 8, X86_VK8WMRegClassID = 9, X86_GR8_ABCD_HRegClassID = 10, X86_GR8_ABCD_LRegClassID = 11, X86_GR16RegClassID = 12, X86_GR16_NOREXRegClassID = 13, X86_VK16RegClassID = 14, X86_VK16WMRegClassID = 15, X86_SEGMENT_REGRegClassID = 16, X86_GR16_ABCDRegClassID = 17, X86_FPCCRRegClassID = 18, X86_FR32XRegClassID = 19, X86_FR32RegClassID = 20, X86_GR32RegClassID = 21, X86_GR32_NOAXRegClassID = 22, X86_GR32_NOSPRegClassID = 23, X86_GR32_NOAX_and_GR32_NOSPRegClassID = 24, X86_DEBUG_REGRegClassID = 25, X86_GR32_NOREXRegClassID = 26, X86_VK32RegClassID = 27, X86_GR32_NOAX_and_GR32_NOREXRegClassID = 28, X86_GR32_NOREX_NOSPRegClassID = 29, X86_RFP32RegClassID = 30, X86_VK32WMRegClassID = 31, X86_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID = 32, X86_GR32_ABCDRegClassID = 33, X86_GR32_ABCD_and_GR32_NOAXRegClassID = 34, X86_GR32_TCRegClassID = 35, X86_GR32_ADRegClassID = 36, X86_GR32_NOAX_and_GR32_TCRegClassID = 37, X86_CCRRegClassID = 38, X86_GR32_AD_and_GR32_NOAXRegClassID = 39, X86_RFP64RegClassID = 40, X86_FR64XRegClassID = 41, X86_GR64RegClassID = 42, X86_CONTROL_REGRegClassID = 43, X86_FR64RegClassID = 44, X86_GR64_with_sub_8bitRegClassID = 45, X86_GR64_NOSPRegClassID = 46, X86_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 47, X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPRegClassID = 48, X86_GR64_NOREXRegClassID = 49, X86_GR64_TCRegClassID = 50, X86_GR64_NOSP_and_GR64_TCRegClassID = 51, X86_GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 52, X86_VK64RegClassID = 53, X86_VR64RegClassID = 54, X86_GR64_NOREX_NOSPRegClassID = 55, X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 56, X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID = 57, X86_VK64WMRegClassID = 58, X86_GR64_NOREX_and_GR64_TCRegClassID = 59, X86_GR64_TCW64RegClassID = 60, X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID = 61, X86_GR64_NOREX_NOSP_and_GR64_TCRegClassID = 62, X86_GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 63, X86_GR64_ABCDRegClassID = 64, X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID = 65, X86_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXRegClassID = 66, X86_GR64_with_sub_32bit_in_GR32_TCRegClassID = 67, X86_GR64_with_sub_32bit_in_GR32_ADRegClassID = 68, X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCRegClassID = 69, X86_GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXRegClassID = 70, X86_RSTRegClassID = 71, X86_RFP80RegClassID = 72, X86_VR128XRegClassID = 73, X86_VR128RegClassID = 74, X86_VR256XRegClassID = 75, X86_VR256RegClassID = 76, X86_VR512RegClassID = 77, X86_VR512_with_sub_xmm_in_FR32RegClassID = 78, }; #endif // GET_REGINFO_ENUM #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg X86RegDiffLists[] = { /* 0 */ 0, 1, 0, /* 3 */ 2, 1, 0, /* 6 */ 5, 1, 0, /* 9 */ 65522, 16, 1, 0, /* 13 */ 65522, 17, 1, 0, /* 17 */ 65427, 1, 0, /* 20 */ 65475, 1, 0, /* 23 */ 65520, 65522, 1, 0, /* 27 */ 65520, 65527, 1, 0, /* 31 */ 8, 2, 0, /* 34 */ 4, 0, /* 36 */ 65521, 8, 0, /* 39 */ 9, 0, /* 41 */ 13, 0, /* 43 */ 65535, 65519, 14, 0, /* 47 */ 65535, 65520, 14, 0, /* 51 */ 65528, 15, 0, /* 54 */ 2, 6, 16, 0, /* 58 */ 5, 6, 16, 0, /* 62 */ 65535, 9, 16, 0, /* 66 */ 2, 10, 16, 0, /* 70 */ 3, 10, 16, 0, /* 74 */ 3, 13, 16, 0, /* 78 */ 4, 13, 16, 0, /* 82 */ 65535, 14, 16, 0, /* 86 */ 1, 16, 16, 0, /* 90 */ 2, 16, 16, 0, /* 94 */ 17, 0, /* 96 */ 32, 32, 0, /* 99 */ 65221, 0, /* 101 */ 65381, 0, /* 103 */ 65389, 0, /* 105 */ 65397, 0, /* 107 */ 16, 65528, 65416, 0, /* 111 */ 65445, 0, /* 113 */ 65477, 0, /* 115 */ 65504, 65504, 0, /* 118 */ 65509, 0, /* 120 */ 120, 8, 65520, 0, /* 124 */ 65523, 0, /* 126 */ 65530, 0, /* 128 */ 65531, 0, /* 130 */ 65532, 0, /* 132 */ 65520, 65530, 65534, 65533, 0, /* 137 */ 65534, 0, /* 139 */ 65520, 65523, 65533, 65535, 0, /* 144 */ 65520, 65526, 65534, 65535, 0, /* 149 */ 65520, 65520, 65535, 65535, 0, }; static const uint16_t X86SubRegIdxLists[] = { /* 0 */ 4, 3, 1, 0, /* 4 */ 4, 3, 1, 2, 0, /* 9 */ 4, 3, 0, /* 12 */ 6, 5, 0, }; static MCRegisterDesc X86RegDesc[] = { // Descriptors { 5, 0, 0, 0, 0, 0 }, { 850, 2, 90, 3, 2273, 0 }, { 878, 2, 86, 3, 2273, 0 }, { 996, 151, 87, 6, 0, 2 }, { 853, 2, 78, 3, 2193, 0 }, { 881, 2, 74, 3, 2193, 0 }, { 907, 1, 83, 2, 544, 3 }, { 898, 2, 82, 3, 544, 0 }, { 1004, 141, 75, 6, 48, 2 }, { 856, 2, 70, 3, 2081, 0 }, { 884, 2, 66, 3, 2081, 0 }, { 930, 2, 2, 3, 2081, 0 }, { 1012, 146, 67, 6, 96, 2 }, { 859, 2, 58, 3, 2049, 0 }, { 863, 1, 63, 2, 624, 3 }, { 890, 2, 62, 3, 624, 0 }, { 887, 2, 54, 3, 2017, 0 }, { 933, 2, 2, 3, 2017, 0 }, { 1020, 134, 55, 6, 496, 2 }, { 995, 150, 56, 5, 0, 2 }, { 906, 24, 56, 1, 544, 3 }, { 1003, 140, 56, 5, 323, 2 }, { 1011, 145, 56, 5, 323, 2 }, { 862, 28, 56, 1, 624, 3 }, { 1019, 133, 56, 5, 496, 2 }, { 942, 2, 2, 3, 1985, 0 }, { 914, 37, 52, 10, 1985, 5 }, { 1027, 2, 2, 3, 1985, 0 }, { 936, 2, 2, 3, 1985, 0 }, { 870, 10, 45, 1, 1985, 3 }, { 922, 14, 45, 1, 1985, 3 }, { 990, 2, 2, 3, 1985, 0 }, { 939, 2, 2, 3, 1985, 0 }, { 946, 2, 2, 3, 1985, 0 }, { 915, 2, 51, 3, 656, 0 }, { 999, 149, 2, 4, 0, 2 }, { 910, 23, 2, 0, 544, 3 }, { 1007, 139, 2, 4, 275, 2 }, { 1015, 144, 2, 4, 275, 2 }, { 866, 27, 2, 0, 624, 3 }, { 1023, 132, 2, 4, 496, 2 }, { 918, 36, 2, 9, 1592, 5 }, { 1031, 2, 2, 3, 1592, 0 }, { 874, 9, 2, 0, 1889, 3 }, { 926, 13, 2, 0, 1889, 3 }, { 871, 1, 48, 2, 896, 3 }, { 894, 2, 47, 3, 896, 0 }, { 923, 1, 44, 2, 1504, 3 }, { 902, 2, 43, 3, 1504, 0 }, { 949, 2, 2, 3, 1889, 0 }, { 86, 2, 2, 3, 1889, 0 }, { 184, 2, 2, 3, 1889, 0 }, { 264, 2, 2, 3, 1889, 0 }, { 344, 2, 2, 3, 1889, 0 }, { 424, 2, 2, 3, 1889, 0 }, { 504, 2, 2, 3, 1889, 0 }, { 574, 2, 2, 3, 1889, 0 }, { 644, 2, 2, 3, 1889, 0 }, { 707, 2, 2, 3, 1889, 0 }, { 766, 2, 2, 3, 1889, 0 }, { 18, 2, 2, 3, 1889, 0 }, { 116, 2, 2, 3, 1889, 0 }, { 214, 2, 2, 3, 1889, 0 }, { 294, 2, 2, 3, 1889, 0 }, { 374, 2, 2, 3, 1889, 0 }, { 454, 2, 2, 3, 1889, 0 }, { 90, 2, 2, 3, 1889, 0 }, { 188, 2, 2, 3, 1889, 0 }, { 268, 2, 2, 3, 1889, 0 }, { 348, 2, 2, 3, 1889, 0 }, { 428, 2, 2, 3, 1889, 0 }, { 508, 2, 2, 3, 1889, 0 }, { 578, 2, 2, 3, 1889, 0 }, { 648, 2, 2, 3, 1889, 0 }, { 711, 2, 2, 3, 1889, 0 }, { 770, 2, 2, 3, 1889, 0 }, { 23, 2, 2, 3, 1889, 0 }, { 121, 2, 2, 3, 1889, 0 }, { 219, 2, 2, 3, 1889, 0 }, { 299, 2, 2, 3, 1889, 0 }, { 379, 2, 2, 3, 1889, 0 }, { 459, 2, 2, 3, 1889, 0 }, { 82, 2, 2, 3, 1889, 0 }, { 180, 2, 2, 3, 1889, 0 }, { 260, 2, 2, 3, 1889, 0 }, { 340, 2, 2, 3, 1889, 0 }, { 420, 2, 2, 3, 1889, 0 }, { 500, 2, 2, 3, 1889, 0 }, { 570, 2, 2, 3, 1889, 0 }, { 640, 2, 2, 3, 1889, 0 }, { 64, 2, 2, 3, 1889, 0 }, { 162, 2, 2, 3, 1889, 0 }, { 242, 2, 2, 3, 1889, 0 }, { 322, 2, 2, 3, 1889, 0 }, { 402, 2, 2, 3, 1889, 0 }, { 482, 2, 2, 3, 1889, 0 }, { 552, 2, 2, 3, 1889, 0 }, { 622, 2, 2, 3, 1889, 0 }, { 68, 2, 2, 3, 1889, 0 }, { 166, 2, 2, 3, 1889, 0 }, { 246, 2, 2, 3, 1889, 0 }, { 326, 2, 2, 3, 1889, 0 }, { 406, 2, 2, 3, 1889, 0 }, { 486, 2, 2, 3, 1889, 0 }, { 556, 2, 2, 3, 1889, 0 }, { 626, 2, 2, 3, 1889, 0 }, { 708, 120, 2, 0, 1889, 3 }, { 767, 120, 2, 0, 1889, 3 }, { 19, 120, 2, 0, 1889, 3 }, { 117, 120, 2, 0, 1889, 3 }, { 215, 120, 2, 0, 1889, 3 }, { 295, 120, 2, 0, 1889, 3 }, { 375, 120, 2, 0, 1889, 3 }, { 455, 120, 2, 0, 1889, 3 }, { 94, 2, 2, 3, 1889, 0 }, { 192, 2, 2, 3, 1889, 0 }, { 272, 2, 2, 3, 1889, 0 }, { 352, 2, 2, 3, 1889, 0 }, { 432, 2, 2, 3, 1889, 0 }, { 512, 2, 2, 3, 1889, 0 }, { 582, 2, 2, 3, 1889, 0 }, { 652, 2, 2, 3, 1889, 0 }, { 67, 2, 96, 3, 1889, 0 }, { 165, 2, 96, 3, 1889, 0 }, { 245, 2, 96, 3, 1889, 0 }, { 325, 2, 96, 3, 1889, 0 }, { 405, 2, 96, 3, 1889, 0 }, { 485, 2, 96, 3, 1889, 0 }, { 555, 2, 96, 3, 1889, 0 }, { 625, 2, 96, 3, 1889, 0 }, { 692, 2, 96, 3, 1889, 0 }, { 751, 2, 96, 3, 1889, 0 }, { 0, 2, 96, 3, 1889, 0 }, { 98, 2, 96, 3, 1889, 0 }, { 196, 2, 96, 3, 1889, 0 }, { 276, 2, 96, 3, 1889, 0 }, { 356, 2, 96, 3, 1889, 0 }, { 436, 2, 96, 3, 1889, 0 }, { 516, 2, 96, 3, 1889, 0 }, { 586, 2, 96, 3, 1889, 0 }, { 656, 2, 96, 3, 1889, 0 }, { 715, 2, 96, 3, 1889, 0 }, { 28, 2, 96, 3, 1889, 0 }, { 126, 2, 96, 3, 1889, 0 }, { 224, 2, 96, 3, 1889, 0 }, { 304, 2, 96, 3, 1889, 0 }, { 384, 2, 96, 3, 1889, 0 }, { 464, 2, 96, 3, 1889, 0 }, { 534, 2, 96, 3, 1889, 0 }, { 604, 2, 96, 3, 1889, 0 }, { 674, 2, 96, 3, 1889, 0 }, { 733, 2, 96, 3, 1889, 0 }, { 46, 2, 96, 3, 1889, 0 }, { 144, 2, 96, 3, 1889, 0 }, { 72, 116, 97, 13, 1809, 7 }, { 170, 116, 97, 13, 1809, 7 }, { 250, 116, 97, 13, 1809, 7 }, { 330, 116, 97, 13, 1809, 7 }, { 410, 116, 97, 13, 1809, 7 }, { 490, 116, 97, 13, 1809, 7 }, { 560, 116, 97, 13, 1809, 7 }, { 630, 116, 97, 13, 1809, 7 }, { 697, 116, 97, 13, 1809, 7 }, { 756, 116, 97, 13, 1809, 7 }, { 6, 116, 97, 13, 1809, 7 }, { 104, 116, 97, 13, 1809, 7 }, { 202, 116, 97, 13, 1809, 7 }, { 282, 116, 97, 13, 1809, 7 }, { 362, 116, 97, 13, 1809, 7 }, { 442, 116, 97, 13, 1809, 7 }, { 522, 116, 97, 13, 1809, 7 }, { 592, 116, 97, 13, 1809, 7 }, { 662, 116, 97, 13, 1809, 7 }, { 721, 116, 97, 13, 1809, 7 }, { 34, 116, 97, 13, 1809, 7 }, { 132, 116, 97, 13, 1809, 7 }, { 230, 116, 97, 13, 1809, 7 }, { 310, 116, 97, 13, 1809, 7 }, { 390, 116, 97, 13, 1809, 7 }, { 470, 116, 97, 13, 1809, 7 }, { 540, 116, 97, 13, 1809, 7 }, { 610, 116, 97, 13, 1809, 7 }, { 680, 116, 97, 13, 1809, 7 }, { 739, 116, 97, 13, 1809, 7 }, { 52, 116, 97, 13, 1809, 7 }, { 150, 116, 97, 13, 1809, 7 }, { 77, 115, 2, 12, 1777, 7 }, { 175, 115, 2, 12, 1777, 7 }, { 255, 115, 2, 12, 1777, 7 }, { 335, 115, 2, 12, 1777, 7 }, { 415, 115, 2, 12, 1777, 7 }, { 495, 115, 2, 12, 1777, 7 }, { 565, 115, 2, 12, 1777, 7 }, { 635, 115, 2, 12, 1777, 7 }, { 702, 115, 2, 12, 1777, 7 }, { 761, 115, 2, 12, 1777, 7 }, { 12, 115, 2, 12, 1777, 7 }, { 110, 115, 2, 12, 1777, 7 }, { 208, 115, 2, 12, 1777, 7 }, { 288, 115, 2, 12, 1777, 7 }, { 368, 115, 2, 12, 1777, 7 }, { 448, 115, 2, 12, 1777, 7 }, { 528, 115, 2, 12, 1777, 7 }, { 598, 115, 2, 12, 1777, 7 }, { 668, 115, 2, 12, 1777, 7 }, { 727, 115, 2, 12, 1777, 7 }, { 40, 115, 2, 12, 1777, 7 }, { 138, 115, 2, 12, 1777, 7 }, { 236, 115, 2, 12, 1777, 7 }, { 316, 115, 2, 12, 1777, 7 }, { 396, 115, 2, 12, 1777, 7 }, { 476, 115, 2, 12, 1777, 7 }, { 546, 115, 2, 12, 1777, 7 }, { 616, 115, 2, 12, 1777, 7 }, { 686, 115, 2, 12, 1777, 7 }, { 745, 115, 2, 12, 1777, 7 }, { 58, 115, 2, 12, 1777, 7 }, { 156, 115, 2, 12, 1777, 7 }, { 804, 2, 107, 3, 1681, 0 }, { 808, 2, 107, 3, 1681, 0 }, { 774, 2, 107, 3, 1681, 0 }, { 779, 2, 107, 3, 1681, 0 }, { 784, 2, 107, 3, 1681, 0 }, { 789, 2, 107, 3, 1681, 0 }, { 794, 2, 107, 3, 1681, 0 }, { 799, 2, 107, 3, 1681, 0 }, { 842, 121, 109, 1, 1649, 3 }, { 846, 121, 109, 1, 1649, 3 }, { 812, 121, 109, 1, 1649, 3 }, { 817, 121, 109, 1, 1649, 3 }, { 822, 121, 109, 1, 1649, 3 }, { 827, 121, 109, 1, 1649, 3 }, { 832, 121, 109, 1, 1649, 3 }, { 837, 121, 109, 1, 1649, 3 }, { 982, 122, 108, 2, 1617, 3 }, { 986, 122, 108, 2, 1617, 3 }, { 952, 122, 108, 2, 1617, 3 }, { 957, 122, 108, 2, 1617, 3 }, { 962, 122, 108, 2, 1617, 3 }, { 967, 122, 108, 2, 1617, 3 }, { 972, 122, 108, 2, 1617, 3 }, { 977, 122, 108, 2, 1617, 3 }, }; // GR8 Register Class... static const MCPhysReg GR8[] = { X86_AL, X86_CL, X86_DL, X86_AH, X86_CH, X86_DH, X86_BL, X86_BH, X86_SIL, X86_DIL, X86_BPL, X86_SPL, X86_R8B, X86_R9B, X86_R10B, X86_R11B, X86_R14B, X86_R15B, X86_R12B, X86_R13B, }; // GR8 Bit set. static uint8_t GR8Bits[] = { 0xb6, 0xa6, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR8_NOREX Register Class... static const MCPhysReg GR8_NOREX[] = { X86_AL, X86_CL, X86_DL, X86_AH, X86_CH, X86_DH, X86_BL, X86_BH, }; // GR8_NOREX Bit set. static const uint8_t GR8_NOREXBits[] = { 0x36, 0x26, 0x01, }; // VK1 Register Class... static const MCPhysReg VK1[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK1 Bit set. static uint8_t VK1Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // VK2 Register Class... static const MCPhysReg VK2[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK2 Bit set. static uint8_t VK2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // VK4 Register Class... static const MCPhysReg VK4[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK4 Bit set. static uint8_t VK4Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // VK8 Register Class... static const MCPhysReg VK8[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK8 Bit set. static uint8_t VK8Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // VK1WM Register Class... static const MCPhysReg VK1WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK1WM Bit set. static uint8_t VK1WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // VK2WM Register Class... static const MCPhysReg VK2WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK2WM Bit set. static uint8_t VK2WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // VK4WM Register Class... static const MCPhysReg VK4WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK4WM Bit set. static uint8_t VK4WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // VK8WM Register Class... static const MCPhysReg VK8WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK8WM Bit set. static uint8_t VK8WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // GR8_ABCD_H Register Class... static MCPhysReg GR8_ABCD_H[] = { X86_AH, X86_CH, X86_DH, X86_BH, }; // GR8_ABCD_H Bit set. static uint8_t GR8_ABCD_HBits[] = { 0x12, 0x22, }; // GR8_ABCD_L Register Class... static MCPhysReg GR8_ABCD_L[] = { X86_AL, X86_CL, X86_DL, X86_BL, }; // GR8_ABCD_L Bit set. static uint8_t GR8_ABCD_LBits[] = { 0x24, 0x04, 0x01, }; // GR16 Register Class... static MCPhysReg GR16[] = { X86_AX, X86_CX, X86_DX, X86_SI, X86_DI, X86_BX, X86_BP, X86_SP, X86_R8W, X86_R9W, X86_R10W, X86_R11W, X86_R14W, X86_R15W, X86_R12W, X86_R13W, }; // GR16 Bit set. static uint8_t GR16Bits[] = { 0x48, 0x51, 0x04, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR16_NOREX Register Class... static MCPhysReg GR16_NOREX[] = { X86_AX, X86_CX, X86_DX, X86_SI, X86_DI, X86_BX, X86_BP, X86_SP, }; // GR16_NOREX Bit set. static uint8_t GR16_NOREXBits[] = { 0x48, 0x51, 0x04, 0x00, 0x00, 0xa0, }; // VK16 Register Class... static MCPhysReg VK16[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK16 Bit set. static uint8_t VK16Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // VK16WM Register Class... static MCPhysReg VK16WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK16WM Bit set. static uint8_t VK16WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // SEGMENT_REG Register Class... static const MCPhysReg SEGMENT_REG[] = { X86_CS, X86_DS, X86_SS, X86_ES, X86_FS, X86_GS, }; // SEGMENT_REG Bit set. static const uint8_t SEGMENT_REGBits[] = { 0x00, 0x08, 0x02, 0x10, 0x03, 0x00, 0x02, }; // GR16_ABCD Register Class... static const MCPhysReg GR16_ABCD[] = { X86_AX, X86_CX, X86_DX, X86_BX, }; // GR16_ABCD Bit set. static const uint8_t GR16_ABCDBits[] = { 0x08, 0x11, 0x04, }; // FPCCR Register Class... static const MCPhysReg FPCCR[] = { X86_FPSW, }; // FPCCR Bit set. static const uint8_t FPCCRBits[] = { 0x00, 0x00, 0x00, 0x80, }; // FR32X Register Class... static const MCPhysReg FR32X[] = { X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, }; // FR32X Bit set. static uint8_t FR32XBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, }; // FR32 Register Class... static const MCPhysReg FR32[] = { X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, }; // FR32 Bit set. static uint8_t FR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // GR32 Register Class... static const MCPhysReg GR32[] = { X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, }; // GR32 Bit set. static uint8_t GR32Bits[] = { 0x00, 0x00, 0xf8, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR32_NOAX Register Class... static const MCPhysReg GR32_NOAX[] = { X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, }; // GR32_NOAX Bit set. static uint8_t GR32_NOAXBits[] = { 0x00, 0x00, 0xf0, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR32_NOSP Register Class... static const MCPhysReg GR32_NOSP[] = { X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, }; // GR32_NOSP Bit set. static uint8_t GR32_NOSPBits[] = { 0x00, 0x00, 0xf8, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR32_NOAX_and_GR32_NOSP Register Class... static const MCPhysReg GR32_NOAX_and_GR32_NOSP[] = { X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, }; // GR32_NOAX_and_GR32_NOSP Bit set. static uint8_t GR32_NOAX_and_GR32_NOSPBits[] = { 0x00, 0x00, 0xf0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // DEBUG_REG Register Class... static const MCPhysReg DEBUG_REG[] = { X86_DR0, X86_DR1, X86_DR2, X86_DR3, X86_DR4, X86_DR5, X86_DR6, X86_DR7, }; // DEBUG_REG Bit set. static const uint8_t DEBUG_REGBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR32_NOREX Register Class... static const MCPhysReg GR32_NOREX[] = { X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, }; // GR32_NOREX Bit set. static const uint8_t GR32_NOREXBits[] = { 0x00, 0x00, 0xf8, 0x61, }; // VK32 Register Class... static const MCPhysReg VK32[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK32 Bit set. static uint8_t VK32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR32_NOAX_and_GR32_NOREX Register Class... static const MCPhysReg GR32_NOAX_and_GR32_NOREX[] = { X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, }; // GR32_NOAX_and_GR32_NOREX Bit set. static const uint8_t GR32_NOAX_and_GR32_NOREXBits[] = { 0x00, 0x00, 0xf0, 0x61, }; // GR32_NOREX_NOSP Register Class... static const MCPhysReg GR32_NOREX_NOSP[] = { X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, }; // GR32_NOREX_NOSP Bit set. static const uint8_t GR32_NOREX_NOSPBits[] = { 0x00, 0x00, 0xf8, 0x21, }; // RFP32 Register Class... static const MCPhysReg RFP32[] = { X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, }; // RFP32 Bit set. static uint8_t RFP32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, }; // VK32WM Register Class... static const MCPhysReg VK32WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK32WM Bit set. static uint8_t VK32WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // GR32_NOAX_and_GR32_NOREX_NOSP Register Class... static const MCPhysReg GR32_NOAX_and_GR32_NOREX_NOSP[] = { X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, }; // GR32_NOAX_and_GR32_NOREX_NOSP Bit set. static const uint8_t GR32_NOAX_and_GR32_NOREX_NOSPBits[] = { 0x00, 0x00, 0xf0, 0x21, }; // GR32_ABCD Register Class... static const MCPhysReg GR32_ABCD[] = { X86_EAX, X86_ECX, X86_EDX, X86_EBX, }; // GR32_ABCD Bit set. static const uint8_t GR32_ABCDBits[] = { 0x00, 0x00, 0x68, 0x01, }; // GR32_ABCD_and_GR32_NOAX Register Class... static const MCPhysReg GR32_ABCD_and_GR32_NOAX[] = { X86_ECX, X86_EDX, X86_EBX, }; // GR32_ABCD_and_GR32_NOAX Bit set. static const uint8_t GR32_ABCD_and_GR32_NOAXBits[] = { 0x00, 0x00, 0x60, 0x01, }; // GR32_TC Register Class... static const MCPhysReg GR32_TC[] = { X86_EAX, X86_ECX, X86_EDX, }; // GR32_TC Bit set. static const uint8_t GR32_TCBits[] = { 0x00, 0x00, 0x48, 0x01, }; // GR32_AD Register Class... static const MCPhysReg GR32_AD[] = { X86_EAX, X86_EDX, }; // GR32_AD Bit set. static const uint8_t GR32_ADBits[] = { 0x00, 0x00, 0x08, 0x01, }; // GR32_NOAX_and_GR32_TC Register Class... static const MCPhysReg GR32_NOAX_and_GR32_TC[] = { X86_ECX, X86_EDX, }; // GR32_NOAX_and_GR32_TC Bit set. static const uint8_t GR32_NOAX_and_GR32_TCBits[] = { 0x00, 0x00, 0x40, 0x01, }; // CCR Register Class... static const MCPhysReg CCR[] = { X86_EFLAGS, }; // CCR Bit set. static const uint8_t CCRBits[] = { 0x00, 0x00, 0x00, 0x02, }; // GR32_AD_and_GR32_NOAX Register Class... static const MCPhysReg GR32_AD_and_GR32_NOAX[] = { X86_EDX, }; // GR32_AD_and_GR32_NOAX Bit set. static const uint8_t GR32_AD_and_GR32_NOAXBits[] = { 0x00, 0x00, 0x00, 0x01, }; // RFP64 Register Class... static const MCPhysReg RFP64[] = { X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, }; // RFP64 Bit set. static uint8_t RFP64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, }; // FR64X Register Class... static const MCPhysReg FR64X[] = { X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, }; // FR64X Bit set. static uint8_t FR64XBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, }; // GR64 Register Class... static const MCPhysReg GR64[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, X86_RIP, }; // GR64 Bit set. static uint8_t GR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // CONTROL_REG Register Class... static const MCPhysReg CONTROL_REG[] = { X86_CR0, X86_CR1, X86_CR2, X86_CR3, X86_CR4, X86_CR5, X86_CR6, X86_CR7, X86_CR8, X86_CR9, X86_CR10, X86_CR11, X86_CR12, X86_CR13, X86_CR14, X86_CR15, }; // CONTROL_REG Bit set. static const uint8_t CONTROL_REGBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // FR64 Register Class... static const MCPhysReg FR64[] = { X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, }; // FR64 Bit set. static uint8_t FR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // GR64_with_sub_8bit Register Class... static const MCPhysReg GR64_with_sub_8bit[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, }; // GR64_with_sub_8bit Bit set. static uint8_t GR64_with_sub_8bitBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR64_NOSP Register Class... static const MCPhysReg GR64_NOSP[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, }; // GR64_NOSP Bit set. static uint8_t GR64_NOSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR64_with_sub_32bit_in_GR32_NOAX Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX[] = { X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, }; // GR64_with_sub_32bit_in_GR32_NOAX Bit set. static uint8_t GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP[] = { X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP Bit set. static uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR64_NOREX Register Class... static const MCPhysReg GR64_NOREX[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, X86_RIP, }; // GR64_NOREX Bit set. static const uint8_t GR64_NOREXBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1b, }; // GR64_TC Register Class... static const MCPhysReg GR64_TC[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, X86_RIP, }; // GR64_TC Bit set. static uint8_t GR64_TCBits[] = { 0x00, 0x00, 0x00, 0x00, 0xc8, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, }; // GR64_NOSP_and_GR64_TC Register Class... static const MCPhysReg GR64_NOSP_and_GR64_TC[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, }; // GR64_NOSP_and_GR64_TC Bit set. static uint8_t GR64_NOSP_and_GR64_TCBits[] = { 0x00, 0x00, 0x00, 0x00, 0xc8, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, }; // GR64_with_sub_16bit_in_GR16_NOREX Register Class... static const MCPhysReg GR64_with_sub_16bit_in_GR16_NOREX[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, }; // GR64_with_sub_16bit_in_GR16_NOREX Bit set. static const uint8_t GR64_with_sub_16bit_in_GR16_NOREXBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0x19, }; // VK64 Register Class... static const MCPhysReg VK64[] = { X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK64 Bit set. static uint8_t VK64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // VR64 Register Class... static const MCPhysReg VR64[] = { X86_MM0, X86_MM1, X86_MM2, X86_MM3, X86_MM4, X86_MM5, X86_MM6, X86_MM7, }; // VR64 Bit set. static uint8_t VR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // GR64_NOREX_NOSP Register Class... static const MCPhysReg GR64_NOREX_NOSP[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, }; // GR64_NOREX_NOSP Bit set. static const uint8_t GR64_NOREX_NOSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf8, 0x09, }; // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX Register Class... static const MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX[] = { X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, }; // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX Bit set. static uint8_t GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = { X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, }; // VK64WM Register Class... static const MCPhysReg VK64WM[] = { X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, }; // VK64WM Bit set. static uint8_t VK64WMBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, }; // GR64_NOREX_and_GR64_TC Register Class... static const MCPhysReg GR64_NOREX_and_GR64_TC[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RIP, }; // GR64_NOREX_and_GR64_TC Bit set. static const uint8_t GR64_NOREX_and_GR64_TCBits[] = { 0x00, 0x00, 0x00, 0x00, 0xc8, 0x0b, }; // GR64_TCW64 Register Class... static const MCPhysReg GR64_TCW64[] = { X86_RAX, X86_RCX, X86_RDX, X86_R8, X86_R9, X86_R11, }; // GR64_TCW64 Bit set. static uint8_t GR64_TCW64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP[] = { X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits[] = { 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, }; // GR64_NOREX_NOSP_and_GR64_TC Register Class... static const MCPhysReg GR64_NOREX_NOSP_and_GR64_TC[] = { X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, }; // GR64_NOREX_NOSP_and_GR64_TC Bit set. static const uint8_t GR64_NOREX_NOSP_and_GR64_TCBits[] = { 0x00, 0x00, 0x00, 0x00, 0xc8, 0x09, }; // GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX Register Class... static const MCPhysReg GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX[] = { X86_RCX, X86_RDX, X86_R8, X86_R9, X86_R11, }; // GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX Bit set. static uint8_t GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, }; // GR64_ABCD Register Class... static const MCPhysReg GR64_ABCD[] = { X86_RAX, X86_RCX, X86_RDX, X86_RBX, }; // GR64_ABCD Bit set. static const uint8_t GR64_ABCDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x68, 0x01, }; // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Register Class... static const MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = { X86_RCX, X86_RDX, X86_RSI, X86_RDI, }; // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Bit set. static const uint8_t GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits[] = { 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, }; // GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX[] = { X86_RCX, X86_RDX, X86_RBX, }; // GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits[] = { 0x00, 0x00, 0x00, 0x00, 0x60, 0x01, }; // GR64_with_sub_32bit_in_GR32_TC Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_TC[] = { X86_RAX, X86_RCX, X86_RDX, }; // GR64_with_sub_32bit_in_GR32_TC Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_TCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, }; // GR64_with_sub_32bit_in_GR32_AD Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_AD[] = { X86_RAX, X86_RDX, }; // GR64_with_sub_32bit_in_GR32_AD Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_ADBits[] = { 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC[] = { X86_RCX, X86_RDX, }; // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits[] = { 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, }; // GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX Register Class... static const MCPhysReg GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX[] = { X86_RDX, }; // GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX Bit set. static const uint8_t GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, }; // RST Register Class... static const MCPhysReg RST[] = { X86_ST0, X86_ST1, X86_ST2, X86_ST3, X86_ST4, X86_ST5, X86_ST6, X86_ST7, }; // RST Bit set. static uint8_t RSTBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, }; // RFP80 Register Class... static const MCPhysReg RFP80[] = { X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, }; // RFP80 Bit set. static uint8_t RFP80Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, }; // VR128X Register Class... static const MCPhysReg VR128X[] = { X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, }; // VR128X Bit set. static uint8_t VR128XBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, }; // VR128 Register Class... static const MCPhysReg VR128[] = { X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, }; // VR128 Bit set. static uint8_t VR128Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // VR256X Register Class... static const MCPhysReg VR256X[] = { X86_YMM0, X86_YMM1, X86_YMM2, X86_YMM3, X86_YMM4, X86_YMM5, X86_YMM6, X86_YMM7, X86_YMM8, X86_YMM9, X86_YMM10, X86_YMM11, X86_YMM12, X86_YMM13, X86_YMM14, X86_YMM15, X86_YMM16, X86_YMM17, X86_YMM18, X86_YMM19, X86_YMM20, X86_YMM21, X86_YMM22, X86_YMM23, X86_YMM24, X86_YMM25, X86_YMM26, X86_YMM27, X86_YMM28, X86_YMM29, X86_YMM30, X86_YMM31, }; // VR256X Bit set. static uint8_t VR256XBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, }; // VR256 Register Class... static const MCPhysReg VR256[] = { X86_YMM0, X86_YMM1, X86_YMM2, X86_YMM3, X86_YMM4, X86_YMM5, X86_YMM6, X86_YMM7, X86_YMM8, X86_YMM9, X86_YMM10, X86_YMM11, X86_YMM12, X86_YMM13, X86_YMM14, X86_YMM15, }; // VR256 Bit set. static uint8_t VR256Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; // VR512 Register Class... static const MCPhysReg VR512[] = { X86_ZMM0, X86_ZMM1, X86_ZMM2, X86_ZMM3, X86_ZMM4, X86_ZMM5, X86_ZMM6, X86_ZMM7, X86_ZMM8, X86_ZMM9, X86_ZMM10, X86_ZMM11, X86_ZMM12, X86_ZMM13, X86_ZMM14, X86_ZMM15, X86_ZMM16, X86_ZMM17, X86_ZMM18, X86_ZMM19, X86_ZMM20, X86_ZMM21, X86_ZMM22, X86_ZMM23, X86_ZMM24, X86_ZMM25, X86_ZMM26, X86_ZMM27, X86_ZMM28, X86_ZMM29, X86_ZMM30, X86_ZMM31, }; // VR512 Bit set. static uint8_t VR512Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, }; // VR512_with_sub_xmm_in_FR32 Register Class... static const MCPhysReg VR512_with_sub_xmm_in_FR32[] = { X86_ZMM0, X86_ZMM1, X86_ZMM2, X86_ZMM3, X86_ZMM4, X86_ZMM5, X86_ZMM6, X86_ZMM7, X86_ZMM8, X86_ZMM9, X86_ZMM10, X86_ZMM11, X86_ZMM12, X86_ZMM13, X86_ZMM14, X86_ZMM15, }; // VR512_with_sub_xmm_in_FR32 Bit set. static uint8_t VR512_with_sub_xmm_in_FR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, }; static MCRegisterClass X86MCRegisterClasses[] = { { GR8, GR8Bits, 130, 20, sizeof(GR8Bits), X86_GR8RegClassID, 1, 1, 1, 1 }, { GR8_NOREX, GR8_NOREXBits, 897, 8, sizeof(GR8_NOREXBits), X86_GR8_NOREXRegClassID, 1, 1, 1, 1 }, { VK1, VK1Bits, 6, 8, sizeof(VK1Bits), X86_VK1RegClassID, 1, 1, 1, 1 }, { VK2, VK2Bits, 59, 8, sizeof(VK2Bits), X86_VK2RegClassID, 1, 1, 1, 1 }, { VK4, VK4Bits, 100, 8, sizeof(VK4Bits), X86_VK4RegClassID, 1, 1, 1, 1 }, { VK8, VK8Bits, 126, 8, sizeof(VK8Bits), X86_VK8RegClassID, 1, 1, 1, 1 }, { VK1WM, VK1WMBits, 400, 7, sizeof(VK1WMBits), X86_VK1WMRegClassID, 1, 1, 1, 1 }, { VK2WM, VK2WMBits, 413, 7, sizeof(VK2WMBits), X86_VK2WMRegClassID, 1, 1, 1, 1 }, { VK4WM, VK4WMBits, 426, 7, sizeof(VK4WMBits), X86_VK4WMRegClassID, 1, 1, 1, 1 }, { VK8WM, VK8WMBits, 439, 7, sizeof(VK8WMBits), X86_VK8WMRegClassID, 1, 1, 1, 1 }, { GR8_ABCD_H, GR8_ABCD_HBits, 378, 4, sizeof(GR8_ABCD_HBits), X86_GR8_ABCD_HRegClassID, 1, 1, 1, 1 }, { GR8_ABCD_L, GR8_ABCD_LBits, 389, 4, sizeof(GR8_ABCD_LBits), X86_GR8_ABCD_LRegClassID, 1, 1, 1, 1 }, { GR16, GR16Bits, 109, 16, sizeof(GR16Bits), X86_GR16RegClassID, 2, 2, 1, 1 }, { GR16_NOREX, GR16_NOREXBits, 886, 8, sizeof(GR16_NOREXBits), X86_GR16_NOREXRegClassID, 2, 2, 1, 1 }, { VK16, VK16Bits, 104, 8, sizeof(VK16Bits), X86_VK16RegClassID, 2, 2, 1, 1 }, { VK16WM, VK16WMBits, 432, 7, sizeof(VK16WMBits), X86_VK16WMRegClassID, 2, 2, 1, 1 }, { SEGMENT_REG, SEGMENT_REGBits, 366, 6, sizeof(SEGMENT_REGBits), X86_SEGMENT_REGRegClassID, 2, 2, 1, 1 }, { GR16_ABCD, GR16_ABCDBits, 334, 4, sizeof(GR16_ABCDBits), X86_GR16_ABCDRegClassID, 2, 2, 1, 1 }, { FPCCR, FPCCRBits, 571, 1, sizeof(FPCCRBits), X86_FPCCRRegClassID, 2, 2, -1, 0 }, { FR32X, FR32XBits, 581, 32, sizeof(FR32XBits), X86_FR32XRegClassID, 4, 4, 1, 1 }, { FR32, FR32Bits, 49, 16, sizeof(FR32Bits), X86_FR32RegClassID, 4, 4, 1, 1 }, { GR32, GR32Bits, 54, 16, sizeof(GR32Bits), X86_GR32RegClassID, 4, 4, 1, 1 }, { GR32_NOAX, GR32_NOAXBits, 642, 15, sizeof(GR32_NOAXBits), X86_GR32_NOAXRegClassID, 4, 4, 1, 1 }, { GR32_NOSP, GR32_NOSPBits, 482, 15, sizeof(GR32_NOSPBits), X86_GR32_NOSPRegClassID, 4, 4, 1, 1 }, { GR32_NOAX_and_GR32_NOSP, GR32_NOAX_and_GR32_NOSPBits, 468, 14, sizeof(GR32_NOAX_and_GR32_NOSPBits), X86_GR32_NOAX_and_GR32_NOSPRegClassID, 4, 4, 1, 1 }, { DEBUG_REG, DEBUG_REGBits, 344, 8, sizeof(DEBUG_REGBits), X86_DEBUG_REGRegClassID, 4, 4, 1, 1 }, { GR32_NOREX, GR32_NOREXBits, 841, 8, sizeof(GR32_NOREXBits), X86_GR32_NOREXRegClassID, 4, 4, 1, 1 }, { VK32, VK32Bits, 16, 8, sizeof(VK32Bits), X86_VK32RegClassID, 4, 4, 1, 1 }, { GR32_NOAX_and_GR32_NOREX, GR32_NOAX_and_GR32_NOREXBits, 827, 7, sizeof(GR32_NOAX_and_GR32_NOREXBits), X86_GR32_NOAX_and_GR32_NOREXRegClassID, 4, 4, 1, 1 }, { GR32_NOREX_NOSP, GR32_NOREX_NOSPBits, 539, 7, sizeof(GR32_NOREX_NOSPBits), X86_GR32_NOREX_NOSPRegClassID, 4, 4, 1, 1 }, { RFP32, RFP32Bits, 21, 7, sizeof(RFP32Bits), X86_RFP32RegClassID, 4, 4, 1, 1 }, { VK32WM, VK32WMBits, 406, 7, sizeof(VK32WMBits), X86_VK32WMRegClassID, 4, 4, 1, 1 }, { GR32_NOAX_and_GR32_NOREX_NOSP, GR32_NOAX_and_GR32_NOREX_NOSPBits, 525, 6, sizeof(GR32_NOAX_and_GR32_NOREX_NOSPBits), X86_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID, 4, 4, 1, 1 }, { GR32_ABCD, GR32_ABCDBits, 314, 4, sizeof(GR32_ABCDBits), X86_GR32_ABCDRegClassID, 4, 4, 1, 1 }, { GR32_ABCD_and_GR32_NOAX, GR32_ABCD_and_GR32_NOAXBits, 675, 3, sizeof(GR32_ABCD_and_GR32_NOAXBits), X86_GR32_ABCD_and_GR32_NOAXRegClassID, 4, 4, 1, 1 }, { GR32_TC, GR32_TCBits, 171, 3, sizeof(GR32_TCBits), X86_GR32_TCRegClassID, 4, 4, 1, 1 }, { GR32_AD, GR32_ADBits, 306, 2, sizeof(GR32_ADBits), X86_GR32_ADRegClassID, 4, 4, 1, 1 }, { GR32_NOAX_and_GR32_TC, GR32_NOAX_and_GR32_TCBits, 157, 2, sizeof(GR32_NOAX_and_GR32_TCBits), X86_GR32_NOAX_and_GR32_TCRegClassID, 4, 4, 1, 1 }, { CCR, CCRBits, 573, 1, sizeof(CCRBits), X86_CCRRegClassID, 4, 4, -1, 0 }, { GR32_AD_and_GR32_NOAX, GR32_AD_and_GR32_NOAXBits, 630, 1, sizeof(GR32_AD_and_GR32_NOAXBits), X86_GR32_AD_and_GR32_NOAXRegClassID, 4, 4, 1, 1 }, { RFP64, RFP64Bits, 68, 7, sizeof(RFP64Bits), X86_RFP64RegClassID, 8, 4, 1, 1 }, { FR64X, FR64XBits, 587, 32, sizeof(FR64XBits), X86_FR64XRegClassID, 8, 8, 1, 1 }, { GR64, GR64Bits, 79, 17, sizeof(GR64Bits), X86_GR64RegClassID, 8, 8, 1, 1 }, { CONTROL_REG, CONTROL_REGBits, 354, 16, sizeof(CONTROL_REGBits), X86_CONTROL_REGRegClassID, 8, 8, 1, 1 }, { FR64, FR64Bits, 74, 16, sizeof(FR64Bits), X86_FR64RegClassID, 8, 8, 1, 1 }, { GR64_with_sub_8bit, GR64_with_sub_8bitBits, 907, 16, sizeof(GR64_with_sub_8bitBits), X86_GR64_with_sub_8bitRegClassID, 8, 8, 1, 1 }, { GR64_NOSP, GR64_NOSPBits, 492, 15, sizeof(GR64_NOSPBits), X86_GR64_NOSPRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_NOAX, GR64_with_sub_32bit_in_GR32_NOAXBits, 714, 15, sizeof(GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits, 445, 14, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPRegClassID, 8, 8, 1, 1 }, { GR64_NOREX, GR64_NOREXBits, 852, 9, sizeof(GR64_NOREXBits), X86_GR64_NOREXRegClassID, 8, 8, 1, 1 }, { GR64_TC, GR64_TCBits, 224, 9, sizeof(GR64_TCBits), X86_GR64_TCRegClassID, 8, 8, 1, 1 }, { GR64_NOSP_and_GR64_TC, GR64_NOSP_and_GR64_TCBits, 210, 8, sizeof(GR64_NOSP_and_GR64_TCBits), X86_GR64_NOSP_and_GR64_TCRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_16bit_in_GR16_NOREX, GR64_with_sub_16bit_in_GR16_NOREXBits, 863, 8, sizeof(GR64_with_sub_16bit_in_GR16_NOREXBits), X86_GR64_with_sub_16bit_in_GR16_NOREXRegClassID, 8, 8, 1, 1 }, { VK64, VK64Bits, 63, 8, sizeof(VK64Bits), X86_VK64RegClassID, 8, 8, 1, 1 }, { VR64, VR64Bits, 84, 8, sizeof(VR64Bits), X86_VR64RegClassID, 8, 8, 1, 1 }, { GR64_NOREX_NOSP, GR64_NOREX_NOSPBits, 555, 7, sizeof(GR64_NOREX_NOSPBits), X86_GR64_NOREX_NOSPRegClassID, 8, 8, 1, 1 }, { GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX, GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits, 747, 7, sizeof(GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits, 804, 7, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID, 8, 8, 1, 1 }, { VK64WM, VK64WMBits, 419, 7, sizeof(VK64WMBits), X86_VK64WMRegClassID, 8, 8, 1, 1 }, { GR64_NOREX_and_GR64_TC, GR64_NOREX_and_GR64_TCBits, 260, 6, sizeof(GR64_NOREX_and_GR64_TCBits), X86_GR64_NOREX_and_GR64_TCRegClassID, 8, 8, 1, 1 }, { GR64_TCW64, GR64_TCW64Bits, 89, 6, sizeof(GR64_TCW64Bits), X86_GR64_TCW64RegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits, 502, 6, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID, 8, 8, 1, 1 }, { GR64_NOREX_NOSP_and_GR64_TC, GR64_NOREX_NOSP_and_GR64_TCBits, 232, 5, sizeof(GR64_NOREX_NOSP_and_GR64_TCBits), X86_GR64_NOREX_NOSP_and_GR64_TCRegClassID, 8, 8, 1, 1 }, { GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX, GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits, 699, 5, sizeof(GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, { GR64_ABCD, GR64_ABCDBits, 324, 4, sizeof(GR64_ABCDBits), X86_GR64_ABCDRegClassID, 8, 8, 1, 1 }, { GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX, GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits, 792, 4, sizeof(GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits), X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX, GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits, 652, 3, sizeof(GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_TC, GR64_with_sub_32bit_in_GR32_TCBits, 179, 3, sizeof(GR64_with_sub_32bit_in_GR32_TCBits), X86_GR64_with_sub_32bit_in_GR32_TCRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_AD, GR64_with_sub_32bit_in_GR32_ADBits, 283, 2, sizeof(GR64_with_sub_32bit_in_GR32_ADBits), X86_GR64_with_sub_32bit_in_GR32_ADRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits, 134, 2, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCRegClassID, 8, 8, 1, 1 }, { GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX, GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits, 607, 1, sizeof(GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXRegClassID, 8, 8, 1, 1 }, { RST, RSTBits, 577, 8, sizeof(RSTBits), X86_RSTRegClassID, 10, 4, 1, 0 }, { RFP80, RFP80Bits, 0, 7, sizeof(RFP80Bits), X86_RFP80RegClassID, 10, 4, 1, 1 }, { VR128X, VR128XBits, 600, 32, sizeof(VR128XBits), X86_VR128XRegClassID, 16, 16, 1, 1 }, { VR128, VR128Bits, 120, 16, sizeof(VR128Bits), X86_VR128RegClassID, 16, 16, 1, 1 }, { VR256X, VR256XBits, 593, 32, sizeof(VR256XBits), X86_VR256XRegClassID, 32, 32, 1, 1 }, { VR256, VR256Bits, 114, 16, sizeof(VR256Bits), X86_VR256RegClassID, 32, 32, 1, 1 }, { VR512, VR512Bits, 10, 32, sizeof(VR512Bits), X86_VR512RegClassID, 64, 64, 1, 1 }, { VR512_with_sub_xmm_in_FR32, VR512_with_sub_xmm_in_FR32Bits, 27, 16, sizeof(VR512_with_sub_xmm_in_FR32Bits), X86_VR512_with_sub_xmm_in_FR32RegClassID, 64, 64, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/X86/X86ImmSize.inc010066400017500001750000000164621363402546700201630ustar0000000000000000{1, 1, X86_AAD8i8}, {1, 1, X86_AAM8i8}, {2, 2, X86_ADC16i16}, {2, 2, X86_ADC16mi}, {1, 2, X86_ADC16mi8}, {2, 2, X86_ADC16ri}, {1, 2, X86_ADC16ri8}, {4, 4, X86_ADC32i32}, {4, 4, X86_ADC32mi}, {1, 4, X86_ADC32mi8}, {4, 4, X86_ADC32ri}, {1, 4, X86_ADC32ri8}, {4, 8, X86_ADC64i32}, {4, 8, X86_ADC64mi32}, {1, 8, X86_ADC64mi8}, {4, 8, X86_ADC64ri32}, {1, 8, X86_ADC64ri8}, {1, 1, X86_ADC8i8}, {1, 1, X86_ADC8mi}, {1, 1, X86_ADC8mi8}, {1, 1, X86_ADC8ri}, {1, 1, X86_ADC8ri8}, {2, 2, X86_ADD16i16}, {2, 2, X86_ADD16mi}, {1, 2, X86_ADD16mi8}, {2, 2, X86_ADD16ri}, {1, 2, X86_ADD16ri8}, {4, 4, X86_ADD32i32}, {4, 4, X86_ADD32mi}, {1, 4, X86_ADD32mi8}, {4, 4, X86_ADD32ri}, {1, 4, X86_ADD32ri8}, {4, 8, X86_ADD64i32}, {4, 8, X86_ADD64mi32}, {1, 8, X86_ADD64mi8}, {4, 8, X86_ADD64ri32}, {1, 8, X86_ADD64ri8}, {1, 1, X86_ADD8i8}, {1, 1, X86_ADD8mi}, {1, 1, X86_ADD8mi8}, {1, 1, X86_ADD8ri}, {1, 1, X86_ADD8ri8}, {2, 2, X86_AND16i16}, {2, 2, X86_AND16mi}, {1, 2, X86_AND16mi8}, {2, 2, X86_AND16ri}, {1, 2, X86_AND16ri8}, {4, 4, X86_AND32i32}, {4, 4, X86_AND32mi}, {1, 4, X86_AND32mi8}, {4, 4, X86_AND32ri}, {1, 4, X86_AND32ri8}, {4, 8, X86_AND64i32}, {4, 8, X86_AND64mi32}, {1, 8, X86_AND64mi8}, {4, 8, X86_AND64ri32}, {1, 8, X86_AND64ri8}, {1, 1, X86_AND8i8}, {1, 1, X86_AND8mi}, {1, 1, X86_AND8mi8}, {1, 1, X86_AND8ri}, {1, 1, X86_AND8ri8}, {1, 1, X86_BT16mi8}, {1, 1, X86_BT16ri8}, {1, 1, X86_BT32mi8}, {1, 1, X86_BT32ri8}, {1, 1, X86_BT64mi8}, {1, 1, X86_BT64ri8}, {1, 1, X86_BTC16mi8}, {1, 1, X86_BTC16ri8}, {1, 1, X86_BTC32mi8}, {1, 1, X86_BTC32ri8}, {1, 1, X86_BTC64mi8}, {1, 1, X86_BTC64ri8}, {1, 1, X86_BTR16mi8}, {1, 1, X86_BTR16ri8}, {1, 1, X86_BTR32mi8}, {1, 1, X86_BTR32ri8}, {1, 1, X86_BTR64mi8}, {1, 1, X86_BTR64ri8}, {1, 1, X86_BTS16mi8}, {1, 1, X86_BTS16ri8}, {1, 1, X86_BTS32mi8}, {1, 1, X86_BTS32ri8}, {1, 1, X86_BTS64mi8}, {1, 1, X86_BTS64ri8}, {2, 2, X86_CALLpcrel16}, {2, 2, X86_CMP16i16}, {2, 2, X86_CMP16mi}, {1, 2, X86_CMP16mi8}, {2, 2, X86_CMP16ri}, {1, 2, X86_CMP16ri8}, {4, 4, X86_CMP32i32}, {4, 4, X86_CMP32mi}, {1, 4, X86_CMP32mi8}, {4, 4, X86_CMP32ri}, {1, 4, X86_CMP32ri8}, {4, 8, X86_CMP64i32}, {4, 8, X86_CMP64mi32}, {1, 8, X86_CMP64mi8}, {4, 8, X86_CMP64ri32}, {1, 8, X86_CMP64ri8}, {1, 1, X86_CMP8i8}, {1, 1, X86_CMP8mi}, {1, 1, X86_CMP8mi8}, {1, 1, X86_CMP8ri}, {1, 1, X86_CMP8ri8}, {1, 2, X86_IMUL16rmi8}, {1, 2, X86_IMUL16rri8}, {1, 4, X86_IMUL32rmi8}, {1, 4, X86_IMUL32rri8}, {4, 8, X86_IMUL64rmi32}, {1, 8, X86_IMUL64rmi8}, {4, 8, X86_IMUL64rri32}, {1, 8, X86_IMUL64rri8}, {2, 2, X86_IN16ri}, {4, 4, X86_IN32ri}, {1, 1, X86_IN8ri}, {2, 2, X86_JMP_2}, {2, 2, X86_MOV16mi}, {2, 2, X86_MOV16ri}, {2, 2, X86_MOV16ri_alt}, {4, 4, X86_MOV32mi}, {4, 4, X86_MOV32ri}, {8, 8, X86_MOV32ri64}, {4, 4, X86_MOV32ri_alt}, {4, 8, X86_MOV64mi32}, {8, 8, X86_MOV64ri}, {4, 8, X86_MOV64ri32}, {1, 1, X86_MOV8mi}, {1, 1, X86_MOV8ri}, {1, 1, X86_MOV8ri_alt}, {2, 2, X86_OR16i16}, {2, 2, X86_OR16mi}, {1, 2, X86_OR16mi8}, {2, 2, X86_OR16ri}, {1, 2, X86_OR16ri8}, {4, 4, X86_OR32i32}, {4, 4, X86_OR32mi}, {1, 4, X86_OR32mi8}, {4, 4, X86_OR32ri}, {1, 4, X86_OR32ri8}, {4, 8, X86_OR64i32}, {4, 8, X86_OR64mi32}, {1, 8, X86_OR64mi8}, {4, 8, X86_OR64ri32}, {1, 8, X86_OR64ri8}, {1, 1, X86_OR8i8}, {1, 1, X86_OR8mi}, {1, 1, X86_OR8mi8}, {1, 1, X86_OR8ri}, {1, 1, X86_OR8ri8}, {1, 2, X86_PUSH16i8}, {1, 4, X86_PUSH32i8}, {2, 8, X86_PUSH64i16}, {4, 8, X86_PUSH64i32}, {1, 8, X86_PUSH64i8}, {2, 2, X86_PUSHi16}, {4, 4, X86_PUSHi32}, {1, 1, X86_RCL16mi}, {1, 1, X86_RCL16ri}, {1, 1, X86_RCL32mi}, {1, 1, X86_RCL32ri}, {1, 1, X86_RCL64mi}, {1, 1, X86_RCL64ri}, {1, 1, X86_RCL8mi}, {1, 1, X86_RCL8ri}, {1, 1, X86_RCR16mi}, {1, 1, X86_RCR16ri}, {1, 1, X86_RCR32mi}, {1, 1, X86_RCR32ri}, {1, 1, X86_RCR64mi}, {1, 1, X86_RCR64ri}, {1, 1, X86_RCR8mi}, {1, 1, X86_RCR8ri}, {4, 4, X86_RELEASE_ADD32mi}, {4, 8, X86_RELEASE_ADD64mi32}, {1, 1, X86_RELEASE_ADD8mi}, {4, 4, X86_RELEASE_AND32mi}, {4, 8, X86_RELEASE_AND64mi32}, {1, 1, X86_RELEASE_AND8mi}, {2, 2, X86_RELEASE_MOV16mi}, {4, 4, X86_RELEASE_MOV32mi}, {4, 8, X86_RELEASE_MOV64mi32}, {1, 1, X86_RELEASE_MOV8mi}, {4, 4, X86_RELEASE_OR32mi}, {4, 8, X86_RELEASE_OR64mi32}, {1, 1, X86_RELEASE_OR8mi}, {4, 4, X86_RELEASE_XOR32mi}, {4, 8, X86_RELEASE_XOR64mi32}, {1, 1, X86_RELEASE_XOR8mi}, {1, 1, X86_ROL16mi}, {1, 1, X86_ROL16ri}, {1, 1, X86_ROL32mi}, {1, 1, X86_ROL32ri}, {1, 1, X86_ROL64mi}, {1, 1, X86_ROL64ri}, {1, 1, X86_ROL8mi}, {1, 1, X86_ROL8ri}, {1, 1, X86_ROR16mi}, {1, 1, X86_ROR16ri}, {1, 1, X86_ROR32mi}, {1, 1, X86_ROR32ri}, {1, 1, X86_ROR64mi}, {1, 1, X86_ROR64ri}, {1, 1, X86_ROR8mi}, {1, 1, X86_ROR8ri}, {4, 4, X86_RORX32mi}, {4, 4, X86_RORX32ri}, {8, 8, X86_RORX64mi}, {8, 8, X86_RORX64ri}, {1, 1, X86_SAL16mi}, {1, 1, X86_SAL16ri}, {1, 1, X86_SAL32mi}, {1, 1, X86_SAL32ri}, {1, 1, X86_SAL64mi}, {1, 1, X86_SAL64ri}, {1, 1, X86_SAL8mi}, {1, 1, X86_SAL8ri}, {1, 1, X86_SAR16mi}, {1, 1, X86_SAR16ri}, {1, 1, X86_SAR32mi}, {1, 1, X86_SAR32ri}, {1, 1, X86_SAR64mi}, {1, 1, X86_SAR64ri}, {1, 1, X86_SAR8mi}, {1, 1, X86_SAR8ri}, {2, 2, X86_SBB16i16}, {2, 2, X86_SBB16mi}, {1, 2, X86_SBB16mi8}, {2, 2, X86_SBB16ri}, {1, 2, X86_SBB16ri8}, {4, 4, X86_SBB32i32}, {4, 4, X86_SBB32mi}, {1, 4, X86_SBB32mi8}, {4, 4, X86_SBB32ri}, {1, 4, X86_SBB32ri8}, {4, 8, X86_SBB64i32}, {4, 8, X86_SBB64mi32}, {1, 8, X86_SBB64mi8}, {4, 8, X86_SBB64ri32}, {1, 8, X86_SBB64ri8}, {1, 1, X86_SBB8i8}, {1, 1, X86_SBB8mi}, {1, 1, X86_SBB8mi8}, {1, 1, X86_SBB8ri}, {1, 1, X86_SBB8ri8}, {1, 1, X86_SHL16mi}, {1, 1, X86_SHL16ri}, {1, 1, X86_SHL32mi}, {1, 1, X86_SHL32ri}, {1, 1, X86_SHL64mi}, {1, 1, X86_SHL64ri}, {1, 1, X86_SHL8mi}, {1, 1, X86_SHL8ri}, {1, 1, X86_SHLD16mri8}, {1, 1, X86_SHLD16rri8}, {1, 1, X86_SHLD32mri8}, {1, 1, X86_SHLD32rri8}, {1, 1, X86_SHLD64mri8}, {1, 1, X86_SHLD64rri8}, {1, 1, X86_SHR16mi}, {1, 1, X86_SHR16ri}, {1, 1, X86_SHR32mi}, {1, 1, X86_SHR32ri}, {1, 1, X86_SHR64mi}, {1, 1, X86_SHR64ri}, {1, 1, X86_SHR8mi}, {1, 1, X86_SHR8ri}, {1, 1, X86_SHRD16mri8}, {1, 1, X86_SHRD16rri8}, {1, 1, X86_SHRD32mri8}, {1, 1, X86_SHRD32rri8}, {1, 1, X86_SHRD64mri8}, {1, 1, X86_SHRD64rri8}, {2, 2, X86_SUB16i16}, {2, 2, X86_SUB16mi}, {1, 2, X86_SUB16mi8}, {2, 2, X86_SUB16ri}, {1, 2, X86_SUB16ri8}, {4, 4, X86_SUB32i32}, {4, 4, X86_SUB32mi}, {1, 4, X86_SUB32mi8}, {4, 4, X86_SUB32ri}, {1, 4, X86_SUB32ri8}, {4, 8, X86_SUB64i32}, {4, 8, X86_SUB64mi32}, {1, 8, X86_SUB64mi8}, {4, 8, X86_SUB64ri32}, {1, 8, X86_SUB64ri8}, {1, 1, X86_SUB8i8}, {1, 1, X86_SUB8mi}, {1, 1, X86_SUB8mi8}, {1, 1, X86_SUB8ri}, {1, 1, X86_SUB8ri8}, {8, 8, X86_TCRETURNdi64}, {8, 8, X86_TCRETURNmi64}, {8, 8, X86_TCRETURNri64}, {2, 2, X86_TEST16i16}, {2, 2, X86_TEST16mi}, {2, 2, X86_TEST16mi_alt}, {2, 2, X86_TEST16ri}, {2, 2, X86_TEST16ri_alt}, {4, 4, X86_TEST32i32}, {4, 4, X86_TEST32mi}, {4, 4, X86_TEST32mi_alt}, {4, 4, X86_TEST32ri}, {4, 4, X86_TEST32ri_alt}, {4, 8, X86_TEST64i32}, {4, 8, X86_TEST64mi32}, {4, 4, X86_TEST64mi32_alt}, {4, 8, X86_TEST64ri32}, {4, 4, X86_TEST64ri32_alt}, {1, 1, X86_TEST8i8}, {1, 1, X86_TEST8mi}, {1, 1, X86_TEST8mi_alt}, {1, 1, X86_TEST8ri}, {1, 1, X86_TEST8ri_NOREX}, {1, 1, X86_TEST8ri_alt}, {2, 2, X86_XOR16i16}, {2, 2, X86_XOR16mi}, {1, 2, X86_XOR16mi8}, {2, 2, X86_XOR16ri}, {1, 2, X86_XOR16ri8}, {4, 4, X86_XOR32i32}, {4, 4, X86_XOR32mi}, {1, 4, X86_XOR32mi8}, {4, 4, X86_XOR32ri}, {1, 4, X86_XOR32ri8}, {4, 8, X86_XOR64i32}, {4, 8, X86_XOR64mi32}, {1, 8, X86_XOR64mi8}, {4, 8, X86_XOR64ri32}, {1, 8, X86_XOR64ri8}, {1, 1, X86_XOR8i8}, {1, 1, X86_XOR8mi}, {1, 1, X86_XOR8mi8}, {1, 1, X86_XOR8ri}, {1, 1, X86_XOR8ri8}, capstone-sys-0.11.0/capstone/arch/X86/X86InstPrinter.h010066400017500001750000000014771363402546700205450ustar0000000000000000//= X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -*- C++ -*-=// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an X86 MCInst to Intel style .s file syntax. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_X86_INSTPRINTER_H #define CS_X86_INSTPRINTER_H #include "../../MCInst.h" #include "../../SStream.h" void X86_Intel_printInst(MCInst *MI, SStream *OS, void *Info); void X86_ATT_printInst(MCInst *MI, SStream *OS, void *Info); #endif capstone-sys-0.11.0/capstone/arch/X86/X86IntelInstPrinter.c010066400017500001750000001032711363402546700215270ustar0000000000000000//===-- X86IntelInstPrinter.cpp - Intel assembly instruction printing -----===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file includes code for rendering MCInst instances as Intel-style // assembly. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_X86 #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable:4996) // disable MSVC's warning on strncpy() #pragma warning(disable:28719) // disable MSVC's warning on strncpy() #endif #if !defined(CAPSTONE_HAS_OSXKERNEL) #include #endif #include #if defined(CAPSTONE_HAS_OSXKERNEL) #include #include #else #include #include #endif #include #include "../../utils.h" #include "../../MCInst.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "X86InstPrinter.h" #include "X86Mapping.h" #define GET_INSTRINFO_ENUM #ifdef CAPSTONE_X86_REDUCE #include "X86GenInstrInfo_reduce.inc" #else #include "X86GenInstrInfo.inc" #endif #include "X86BaseInfo.h" static void printMemReference(MCInst *MI, unsigned Op, SStream *O); static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static void set_mem_access(MCInst *MI, bool status) { if (MI->csh->detail != CS_OPT_ON) return; MI->csh->doing_mem = status; if (!status) // done, create the next operand slot MI->flat_insn->detail->x86.op_count++; } static void printopaquemem(MCInst *MI, unsigned OpNo, SStream *O) { // FIXME: do this with autogen // printf(">>> ID = %u\n", MI->flat_insn->id); switch(MI->flat_insn->id) { default: SStream_concat0(O, "ptr "); break; case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: case X86_INS_FXRSTOR: case X86_INS_FXSAVE: case X86_INS_LJMP: case X86_INS_LCALL: // do not print "ptr" break; } switch(MI->csh->mode) { case CS_MODE_16: switch(MI->flat_insn->id) { default: MI->x86opsize = 2; break; case X86_INS_LJMP: case X86_INS_LCALL: MI->x86opsize = 4; break; case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: MI->x86opsize = 6; break; } break; case CS_MODE_32: switch(MI->flat_insn->id) { default: MI->x86opsize = 4; break; case X86_INS_LJMP: case X86_INS_LCALL: case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: MI->x86opsize = 6; break; } break; case CS_MODE_64: switch(MI->flat_insn->id) { default: MI->x86opsize = 8; break; case X86_INS_LJMP: case X86_INS_LCALL: case X86_INS_SGDT: case X86_INS_SIDT: case X86_INS_LGDT: case X86_INS_LIDT: MI->x86opsize = 10; break; } break; default: // never reach break; } printMemReference(MI, OpNo, O); } static void printi8mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "byte ptr "); MI->x86opsize = 1; printMemReference(MI, OpNo, O); } static void printi16mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 2; SStream_concat0(O, "word ptr "); printMemReference(MI, OpNo, O); } static void printi32mem(MCInst *MI, unsigned OpNo, SStream *O) { MI->x86opsize = 4; SStream_concat0(O, "dword ptr "); printMemReference(MI, OpNo, O); } static void printi64mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "qword ptr "); MI->x86opsize = 8; printMemReference(MI, OpNo, O); } static void printi128mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "xmmword ptr "); MI->x86opsize = 16; printMemReference(MI, OpNo, O); } #ifndef CAPSTONE_X86_REDUCE static void printi256mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "ymmword ptr "); MI->x86opsize = 32; printMemReference(MI, OpNo, O); } static void printi512mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "zmmword ptr "); MI->x86opsize = 64; printMemReference(MI, OpNo, O); } static void printf32mem(MCInst *MI, unsigned OpNo, SStream *O) { switch(MCInst_getOpcode(MI)) { default: SStream_concat0(O, "dword ptr "); MI->x86opsize = 4; break; case X86_FBSTPm: case X86_FBLDm: // TODO: fix this in tablegen instead SStream_concat0(O, "tbyte ptr "); MI->x86opsize = 10; break; case X86_FSTENVm: case X86_FLDENVm: // TODO: fix this in tablegen instead switch(MI->csh->mode) { default: // never reach break; case CS_MODE_16: MI->x86opsize = 14; break; case CS_MODE_32: case CS_MODE_64: MI->x86opsize = 28; break; } break; } printMemReference(MI, OpNo, O); } static void printf64mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "qword ptr "); MI->x86opsize = 8; printMemReference(MI, OpNo, O); } static void printf80mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "xword ptr "); MI->x86opsize = 10; printMemReference(MI, OpNo, O); } static void printf128mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "xmmword ptr "); MI->x86opsize = 16; printMemReference(MI, OpNo, O); } static void printf256mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "ymmword ptr "); MI->x86opsize = 32; printMemReference(MI, OpNo, O); } static void printf512mem(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "zmmword ptr "); MI->x86opsize = 64; printMemReference(MI, OpNo, O); } static void printSSECC(MCInst *MI, unsigned Op, SStream *OS) { uint8_t Imm = (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 7); switch (Imm) { default: break; // never reach case 0: SStream_concat0(OS, "eq"); op_addSseCC(MI, X86_SSE_CC_EQ); break; case 1: SStream_concat0(OS, "lt"); op_addSseCC(MI, X86_SSE_CC_LT); break; case 2: SStream_concat0(OS, "le"); op_addSseCC(MI, X86_SSE_CC_LE); break; case 3: SStream_concat0(OS, "unord"); op_addSseCC(MI, X86_SSE_CC_UNORD); break; case 4: SStream_concat0(OS, "neq"); op_addSseCC(MI, X86_SSE_CC_NEQ); break; case 5: SStream_concat0(OS, "nlt"); op_addSseCC(MI, X86_SSE_CC_NLT); break; case 6: SStream_concat0(OS, "nle"); op_addSseCC(MI, X86_SSE_CC_NLE); break; case 7: SStream_concat0(OS, "ord"); op_addSseCC(MI, X86_SSE_CC_ORD); break; } MI->popcode_adjust = Imm + 1; } static void printAVXCC(MCInst *MI, unsigned Op, SStream *O) { uint8_t Imm = (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f); switch (Imm) { default: break;//printf("Invalid avxcc argument!\n"); break; case 0: SStream_concat0(O, "eq"); op_addAvxCC(MI, X86_AVX_CC_EQ); break; case 1: SStream_concat0(O, "lt"); op_addAvxCC(MI, X86_AVX_CC_LT); break; case 2: SStream_concat0(O, "le"); op_addAvxCC(MI, X86_AVX_CC_LE); break; case 3: SStream_concat0(O, "unord"); op_addAvxCC(MI, X86_AVX_CC_UNORD); break; case 4: SStream_concat0(O, "neq"); op_addAvxCC(MI, X86_AVX_CC_NEQ); break; case 5: SStream_concat0(O, "nlt"); op_addAvxCC(MI, X86_AVX_CC_NLT); break; case 6: SStream_concat0(O, "nle"); op_addAvxCC(MI, X86_AVX_CC_NLE); break; case 7: SStream_concat0(O, "ord"); op_addAvxCC(MI, X86_AVX_CC_ORD); break; case 8: SStream_concat0(O, "eq_uq"); op_addAvxCC(MI, X86_AVX_CC_EQ_UQ); break; case 9: SStream_concat0(O, "nge"); op_addAvxCC(MI, X86_AVX_CC_NGE); break; case 0xa: SStream_concat0(O, "ngt"); op_addAvxCC(MI, X86_AVX_CC_NGT); break; case 0xb: SStream_concat0(O, "false"); op_addAvxCC(MI, X86_AVX_CC_FALSE); break; case 0xc: SStream_concat0(O, "neq_oq"); op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ); break; case 0xd: SStream_concat0(O, "ge"); op_addAvxCC(MI, X86_AVX_CC_GE); break; case 0xe: SStream_concat0(O, "gt"); op_addAvxCC(MI, X86_AVX_CC_GT); break; case 0xf: SStream_concat0(O, "true"); op_addAvxCC(MI, X86_AVX_CC_TRUE); break; case 0x10: SStream_concat0(O, "eq_os"); op_addAvxCC(MI, X86_AVX_CC_EQ_OS); break; case 0x11: SStream_concat0(O, "lt_oq"); op_addAvxCC(MI, X86_AVX_CC_LT_OQ); break; case 0x12: SStream_concat0(O, "le_oq"); op_addAvxCC(MI, X86_AVX_CC_LE_OQ); break; case 0x13: SStream_concat0(O, "unord_s"); op_addAvxCC(MI, X86_AVX_CC_UNORD_S); break; case 0x14: SStream_concat0(O, "neq_us"); op_addAvxCC(MI, X86_AVX_CC_NEQ_US); break; case 0x15: SStream_concat0(O, "nlt_uq"); op_addAvxCC(MI, X86_AVX_CC_NLT_UQ); break; case 0x16: SStream_concat0(O, "nle_uq"); op_addAvxCC(MI, X86_AVX_CC_NLE_UQ); break; case 0x17: SStream_concat0(O, "ord_s"); op_addAvxCC(MI, X86_AVX_CC_ORD_S); break; case 0x18: SStream_concat0(O, "eq_us"); op_addAvxCC(MI, X86_AVX_CC_EQ_US); break; case 0x19: SStream_concat0(O, "nge_uq"); op_addAvxCC(MI, X86_AVX_CC_NGE_UQ); break; case 0x1a: SStream_concat0(O, "ngt_uq"); op_addAvxCC(MI, X86_AVX_CC_NGT_UQ); break; case 0x1b: SStream_concat0(O, "false_os"); op_addAvxCC(MI, X86_AVX_CC_FALSE_OS); break; case 0x1c: SStream_concat0(O, "neq_os"); op_addAvxCC(MI, X86_AVX_CC_NEQ_OS); break; case 0x1d: SStream_concat0(O, "ge_oq"); op_addAvxCC(MI, X86_AVX_CC_GE_OQ); break; case 0x1e: SStream_concat0(O, "gt_oq"); op_addAvxCC(MI, X86_AVX_CC_GT_OQ); break; case 0x1f: SStream_concat0(O, "true_us"); op_addAvxCC(MI, X86_AVX_CC_TRUE_US); break; } MI->popcode_adjust = Imm + 1; } static void printXOPCC(MCInst *MI, unsigned Op, SStream *O) { int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)); switch (Imm) { default: // llvm_unreachable("Invalid xopcc argument!"); case 0: SStream_concat0(O, "lt"); op_addXopCC(MI, X86_XOP_CC_LT); break; case 1: SStream_concat0(O, "le"); op_addXopCC(MI, X86_XOP_CC_LE); break; case 2: SStream_concat0(O, "gt"); op_addXopCC(MI, X86_XOP_CC_GT); break; case 3: SStream_concat0(O, "ge"); op_addXopCC(MI, X86_XOP_CC_GE); break; case 4: SStream_concat0(O, "eq"); op_addXopCC(MI, X86_XOP_CC_EQ); break; case 5: SStream_concat0(O, "neq"); op_addXopCC(MI, X86_XOP_CC_NEQ); break; case 6: SStream_concat0(O, "false"); op_addXopCC(MI, X86_XOP_CC_FALSE); break; case 7: SStream_concat0(O, "true"); op_addXopCC(MI, X86_XOP_CC_TRUE); break; } } static void printRoundingControl(MCInst *MI, unsigned Op, SStream *O) { int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3; switch (Imm) { case 0: SStream_concat0(O, "{rn-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RN); break; case 1: SStream_concat0(O, "{rd-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RD); break; case 2: SStream_concat0(O, "{ru-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RU); break; case 3: SStream_concat0(O, "{rz-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RZ); break; default: break; // never reach } } #endif static const char *getRegisterName(unsigned RegNo); static void printRegName(SStream *OS, unsigned RegNo) { SStream_concat0(OS, getRegisterName(RegNo)); } // for MASM syntax, 0x123 = 123h, 0xA123 = 0A123h // this function tell us if we need to have prefix 0 in front of a number static bool need_zero_prefix(uint64_t imm) { // find the first hex letter representing imm while(imm >= 0x10) imm >>= 4; if (imm < 0xa) return false; else // this need 0 prefix return true; } static void printImm(MCInst *MI, SStream *O, int64_t imm, bool positive) { if (positive) { // always print this number in positive form if (MI->csh->syntax == CS_OPT_SYNTAX_MASM) { if (imm < 0) { if (MI->op1_size) { switch(MI->op1_size) { default: break; case 1: imm &= 0xff; break; case 2: imm &= 0xffff; break; case 4: imm &= 0xffffffff; break; } } if (imm == 0x8000000000000000LL) // imm == -imm SStream_concat0(O, "8000000000000000h"); else if (need_zero_prefix(imm)) SStream_concat(O, "0%"PRIx64"h", imm); else SStream_concat(O, "%"PRIx64"h", imm); } else { if (imm > HEX_THRESHOLD) { if (need_zero_prefix(imm)) SStream_concat(O, "0%"PRIx64"h", imm); else SStream_concat(O, "%"PRIx64"h", imm); } else SStream_concat(O, "%"PRIu64, imm); } } else { // Intel syntax if (imm < 0) { if (MI->op1_size) { switch(MI->op1_size) { default: break; case 1: imm &= 0xff; break; case 2: imm &= 0xffff; break; case 4: imm &= 0xffffffff; break; } } SStream_concat(O, "0x%"PRIx64, imm); } else { if (imm > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, imm); else SStream_concat(O, "%"PRIu64, imm); } } } else { if (MI->csh->syntax == CS_OPT_SYNTAX_MASM) { if (imm < 0) { if (imm == 0x8000000000000000LL) // imm == -imm SStream_concat0(O, "8000000000000000h"); else if (imm < -HEX_THRESHOLD) { if (need_zero_prefix(imm)) SStream_concat(O, "-0%"PRIx64"h", -imm); else SStream_concat(O, "-%"PRIx64"h", -imm); } else SStream_concat(O, "-%"PRIu64, -imm); } else { if (imm > HEX_THRESHOLD) { if (need_zero_prefix(imm)) SStream_concat(O, "0%"PRIx64"h", imm); else SStream_concat(O, "%"PRIx64"h", imm); } else SStream_concat(O, "%"PRIu64, imm); } } else { // Intel syntax if (imm < 0) { if (imm == 0x8000000000000000LL) // imm == -imm SStream_concat0(O, "0x8000000000000000"); else if (imm < -HEX_THRESHOLD) SStream_concat(O, "-0x%"PRIx64, -imm); else SStream_concat(O, "-%"PRIu64, -imm); } else { if (imm > HEX_THRESHOLD) SStream_concat(O, "0x%"PRIx64, imm); else SStream_concat(O, "%"PRIu64, imm); } } } } // local printOperand, without updating public operands static void _printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { printRegName(O, MCOperand_getReg(Op)); } else if (MCOperand_isImm(Op)) { int64_t imm = MCOperand_getImm(Op); printImm(MI, O, imm, MI->csh->imm_unsigned); } } #ifndef CAPSTONE_DIET // copy & normalize access info static void get_op_access(cs_struct *h, unsigned int id, uint8_t *access, uint64_t *eflags) { #ifndef CAPSTONE_DIET uint8_t i; uint8_t *arr = X86_get_op_access(h, id, eflags); if (!arr) { access[0] = 0; return; } // copy to access but zero out CS_AC_IGNORE for(i = 0; arr[i]; i++) { if (arr[i] != CS_AC_IGNORE) access[i] = arr[i]; else access[i] = 0; } // mark the end of array access[i] = 0; #endif } #endif static void printSrcIdx(MCInst *MI, unsigned Op, SStream *O) { MCOperand *SegReg; int reg; if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif } SegReg = MCInst_getOperand(MI, Op+1); reg = MCOperand_getReg(SegReg); // If this has a segment register, print it. if (reg) { _printOperand(MI, Op+1, O); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; } SStream_concat0(O, ":"); } SStream_concat0(O, "["); set_mem_access(MI, true); printOperand(MI, Op, O); SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printDstIdx(MCInst *MI, unsigned Op, SStream *O) { if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif } // DI accesses are always ES-based on non-64bit mode if (MI->csh->mode != CS_MODE_64) { SStream_concat(O, "es:["); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_ES; } } else SStream_concat(O, "["); set_mem_access(MI, true); printOperand(MI, Op, O); SStream_concat0(O, "]"); set_mem_access(MI, false); } static void printSrcIdx8(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "byte ptr "); MI->x86opsize = 1; printSrcIdx(MI, OpNo, O); } static void printSrcIdx16(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "word ptr "); MI->x86opsize = 2; printSrcIdx(MI, OpNo, O); } static void printSrcIdx32(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "dword ptr "); MI->x86opsize = 4; printSrcIdx(MI, OpNo, O); } static void printSrcIdx64(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "qword ptr "); MI->x86opsize = 8; printSrcIdx(MI, OpNo, O); } static void printDstIdx8(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "byte ptr "); MI->x86opsize = 1; printDstIdx(MI, OpNo, O); } static void printDstIdx16(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "word ptr "); MI->x86opsize = 2; printDstIdx(MI, OpNo, O); } static void printDstIdx32(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "dword ptr "); MI->x86opsize = 4; printDstIdx(MI, OpNo, O); } static void printDstIdx64(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "qword ptr "); MI->x86opsize = 8; printDstIdx(MI, OpNo, O); } static void printMemOffset(MCInst *MI, unsigned Op, SStream *O) { MCOperand *DispSpec = MCInst_getOperand(MI, Op); MCOperand *SegReg = MCInst_getOperand(MI, Op + 1); int reg; if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif } // If this has a segment register, print it. reg = MCOperand_getReg(SegReg); if (reg) { _printOperand(MI, Op + 1, O); SStream_concat0(O, ":"); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; } } SStream_concat0(O, "["); if (MCOperand_isImm(DispSpec)) { int64_t imm = MCOperand_getImm(DispSpec); if (MI->csh->detail) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm; if (imm < 0) printImm(MI, O, arch_masks[MI->csh->mode] & imm, true); else printImm(MI, O, imm, true); } SStream_concat0(O, "]"); if (MI->csh->detail) MI->flat_insn->detail->x86.op_count++; if (MI->op1_size == 0) MI->op1_size = MI->x86opsize; } #ifndef CAPSTONE_X86_REDUCE static void printU8Imm(MCInst *MI, unsigned Op, SStream *O) { uint8_t val = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0xff; printImm(MI, O, val, true); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = val; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = 1; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif MI->flat_insn->detail->x86.op_count++; } } #endif static void printMemOffs8(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "byte ptr "); MI->x86opsize = 1; printMemOffset(MI, OpNo, O); } static void printMemOffs16(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "word ptr "); MI->x86opsize = 2; printMemOffset(MI, OpNo, O); } static void printMemOffs32(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "dword ptr "); MI->x86opsize = 4; printMemOffset(MI, OpNo, O); } static void printMemOffs64(MCInst *MI, unsigned OpNo, SStream *O) { SStream_concat0(O, "qword ptr "); MI->x86opsize = 8; printMemOffset(MI, OpNo, O); } #ifndef CAPSTONE_DIET static char *printAliasInstr(MCInst *MI, SStream *OS, void *info); #endif static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI); void X86_Intel_printInst(MCInst *MI, SStream *O, void *Info) { #ifndef CAPSTONE_DIET char *mnem; #endif x86_reg reg, reg2; enum cs_ac_type access1, access2; // perhaps this instruction does not need printer if (MI->assembly[0]) { strncpy(O->buffer, MI->assembly, sizeof(O->buffer)); return; } #ifndef CAPSTONE_DIET // Try to print any aliases first. mnem = printAliasInstr(MI, O, Info); if (mnem) cs_mem_free(mnem); else #endif printInstruction(MI, O, Info); reg = X86_insn_reg_intel(MCInst_getOpcode(MI), &access1); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6] = {0}; #endif // first op can be embedded in the asm by llvm. // so we have to add the missing register as the first operand if (reg) { // shift all the ops right to leave 1st slot for this new register op memmove(&(MI->flat_insn->detail->x86.operands[1]), &(MI->flat_insn->detail->x86.operands[0]), sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - 1)); MI->flat_insn->detail->x86.operands[0].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[0].reg = reg; MI->flat_insn->detail->x86.operands[0].size = MI->csh->regsize_map[reg]; MI->flat_insn->detail->x86.operands[0].access = access1; MI->flat_insn->detail->x86.op_count++; } else { if (X86_insn_reg_intel2(MCInst_getOpcode(MI), ®, &access1, ®2, &access2)) { MI->flat_insn->detail->x86.operands[0].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[0].reg = reg; MI->flat_insn->detail->x86.operands[0].size = MI->csh->regsize_map[reg]; MI->flat_insn->detail->x86.operands[0].access = access1; MI->flat_insn->detail->x86.operands[1].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[1].reg = reg2; MI->flat_insn->detail->x86.operands[1].size = MI->csh->regsize_map[reg2]; MI->flat_insn->detail->x86.operands[1].access = access2; MI->flat_insn->detail->x86.op_count = 2; } } #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[0].access = access[0]; MI->flat_insn->detail->x86.operands[1].access = access[1]; #endif } if (MI->op1_size == 0 && reg) MI->op1_size = MI->csh->regsize_map[reg]; } /// printPCRelImm - This is used to print an immediate value that ends up /// being encoded as a pc-relative value. static void printPCRelImm(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isImm(Op)) { int64_t imm = MCOperand_getImm(Op) + MI->flat_insn->size + MI->address; uint8_t opsize = X86_immediate_size(MI->Opcode, NULL); // truncat imm for non-64bit if (MI->csh->mode != CS_MODE_64) { imm = imm & 0xffffffff; } if (MI->csh->mode == CS_MODE_16 && (MI->Opcode != X86_JMP_4 && MI->Opcode != X86_CALLpcrel32)) imm = imm & 0xffff; // Hack: X86 16bit with opcode X86_JMP_4 if (MI->csh->mode == CS_MODE_16 && (MI->Opcode == X86_JMP_4 && MI->x86_prefix[2] != 0x66)) imm = imm & 0xffff; // CALL/JMP rel16 is special if (MI->Opcode == X86_CALLpcrel16 || MI->Opcode == X86_JMP_2) imm = imm & 0xffff; printImm(MI, O, imm, true); if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; // if op_count > 0, then this operand's size is taken from the destination op if (MI->flat_insn->detail->x86.op_count > 0) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->flat_insn->detail->x86.operands[0].size; else if (opsize > 0) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = opsize; else MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = imm; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif MI->flat_insn->detail->x86.op_count++; } if (MI->op1_size == 0) MI->op1_size = MI->imm_size; } } static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) { MCOperand *Op = MCInst_getOperand(MI, OpNo); if (MCOperand_isReg(Op)) { unsigned int reg = MCOperand_getReg(Op); printRegName(O, reg); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = reg; } else { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg]; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif MI->flat_insn->detail->x86.op_count++; } } if (MI->op1_size == 0) MI->op1_size = MI->csh->regsize_map[reg]; } else if (MCOperand_isImm(Op)) { uint8_t encsize; int64_t imm = MCOperand_getImm(Op); uint8_t opsize = X86_immediate_size(MCInst_getOpcode(MI), &encsize); if (opsize == 1) // print 1 byte immediate in positive form imm = imm & 0xff; // printf(">>> id = %u\n", MI->flat_insn->id); switch(MI->flat_insn->id) { default: printImm(MI, O, imm, MI->csh->imm_unsigned); break; case X86_INS_MOVABS: // do not print number in negative form printImm(MI, O, imm, true); break; case X86_INS_IN: case X86_INS_OUT: case X86_INS_INT: // do not print number in negative form imm = imm & 0xff; printImm(MI, O, imm, true); break; case X86_INS_LCALL: case X86_INS_LJMP: // always print address in positive form if (OpNo == 1) { // ptr16 part imm = imm & 0xffff; opsize = 2; } printImm(MI, O, imm, true); break; case X86_INS_AND: case X86_INS_OR: case X86_INS_XOR: // do not print number in negative form if (imm >= 0 && imm <= HEX_THRESHOLD) printImm(MI, O, imm, true); else { imm = arch_masks[opsize? opsize : MI->imm_size] & imm; printImm(MI, O, imm, true); } break; case X86_INS_RET: case X86_INS_RETF: // RET imm16 if (imm >= 0 && imm <= HEX_THRESHOLD) printImm(MI, O, imm, true); else { imm = 0xffff & imm; printImm(MI, O, imm, true); } break; } if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm; } else { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; if (opsize > 0) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = opsize; MI->flat_insn->detail->x86.encoding.imm_size = encsize; } else if (MI->flat_insn->detail->x86.op_count > 0) { if (MI->flat_insn->id != X86_INS_LCALL && MI->flat_insn->id != X86_INS_LJMP) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->flat_insn->detail->x86.operands[0].size; } else MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size; } else MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = imm; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif MI->flat_insn->detail->x86.op_count++; } } } } static void printMemReference(MCInst *MI, unsigned Op, SStream *O) { bool NeedPlus = false; MCOperand *BaseReg = MCInst_getOperand(MI, Op + X86_AddrBaseReg); uint64_t ScaleVal = MCOperand_getImm(MCInst_getOperand(MI, Op + X86_AddrScaleAmt)); MCOperand *IndexReg = MCInst_getOperand(MI, Op + X86_AddrIndexReg); MCOperand *DispSpec = MCInst_getOperand(MI, Op + X86_AddrDisp); MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); int reg; if (MI->csh->detail) { #ifndef CAPSTONE_DIET uint8_t access[6]; #endif MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = MCOperand_getReg(BaseReg); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = MCOperand_getReg(IndexReg); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; #ifndef CAPSTONE_DIET get_op_access(MI->csh, MCInst_getOpcode(MI), access, &MI->flat_insn->detail->x86.eflags); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].access = access[MI->flat_insn->detail->x86.op_count]; #endif } // If this has a segment register, print it. reg = MCOperand_getReg(SegReg); if (reg) { _printOperand(MI, Op + X86_AddrSegmentReg, O); if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; } SStream_concat0(O, ":"); } SStream_concat0(O, "["); if (MCOperand_getReg(BaseReg)) { _printOperand(MI, Op + X86_AddrBaseReg, O); NeedPlus = true; } if (MCOperand_getReg(IndexReg)) { if (NeedPlus) SStream_concat0(O, " + "); _printOperand(MI, Op + X86_AddrIndexReg, O); if (ScaleVal != 1) SStream_concat(O, "*%u", ScaleVal); NeedPlus = true; } if (MCOperand_isImm(DispSpec)) { int64_t DispVal = MCOperand_getImm(DispSpec); if (MI->csh->detail) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = DispVal; if (DispVal) { if (NeedPlus) { if (DispVal < 0) { SStream_concat0(O, " - "); printImm(MI, O, -DispVal, true); } else { SStream_concat0(O, " + "); printImm(MI, O, DispVal, true); } } else { // memory reference to an immediate address if (DispVal < 0) { printImm(MI, O, arch_masks[MI->csh->mode] & DispVal, true); } else { printImm(MI, O, DispVal, true); } } } else { // DispVal = 0 if (!NeedPlus) // [0] SStream_concat0(O, "0"); } } SStream_concat0(O, "]"); if (MI->csh->detail) MI->flat_insn->detail->x86.op_count++; if (MI->op1_size == 0) MI->op1_size = MI->x86opsize; } static void printanymem(MCInst *MI, unsigned OpNo, SStream *O) { switch(MI->Opcode) { default: break; case X86_LEA16r: MI->x86opsize = 2; break; case X86_LEA32r: case X86_LEA64_32r: MI->x86opsize = 4; break; case X86_LEA64r: MI->x86opsize = 8; break; } printMemReference(MI, OpNo, O); } #define GET_REGINFO_ENUM #include "X86GenRegisterInfo.inc" #define PRINT_ALIAS_INSTR #ifdef CAPSTONE_X86_REDUCE #include "X86GenAsmWriter1_reduce.inc" #else #include "X86GenAsmWriter1.inc" #endif #endif capstone-sys-0.11.0/capstone/arch/X86/X86Mapping.c010066400017500001750000003305421363403403300176350ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_X86 #if defined(CAPSTONE_HAS_OSXKERNEL) #include #endif #include #ifndef CAPSTONE_HAS_OSXKERNEL #include #else #include "qsort.h" #endif #include "X86Mapping.h" #include "X86DisassemblerDecoder.h" #include "../../utils.h" const uint64_t arch_masks[9] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffLL }; static const x86_reg sib_base_map[] = { X86_REG_INVALID, #define ENTRY(x) X86_REG_##x, ALL_SIB_BASES #undef ENTRY }; // Fill-ins to make the compiler happy. These constants are never actually // assigned; they are just filler to make an automatically-generated switch // statement work. enum { X86_REG_BX_SI = 500, X86_REG_BX_DI = 501, X86_REG_BP_SI = 502, X86_REG_BP_DI = 503, X86_REG_sib = 504, X86_REG_sib64 = 505 }; static const x86_reg sib_index_map[] = { X86_REG_INVALID, #define ENTRY(x) X86_REG_##x, ALL_EA_BASES REGS_XMM REGS_YMM REGS_ZMM #undef ENTRY }; static const x86_reg segment_map[] = { X86_REG_INVALID, X86_REG_CS, X86_REG_SS, X86_REG_DS, X86_REG_ES, X86_REG_FS, X86_REG_GS, }; x86_reg x86_map_sib_base(int r) { return sib_base_map[r]; } x86_reg x86_map_sib_index(int r) { return sib_index_map[r]; } x86_reg x86_map_segment(int r) { return segment_map[r]; } #ifndef CAPSTONE_DIET static const name_map reg_name_maps[] = { { X86_REG_INVALID, NULL }, { X86_REG_AH, "ah" }, { X86_REG_AL, "al" }, { X86_REG_AX, "ax" }, { X86_REG_BH, "bh" }, { X86_REG_BL, "bl" }, { X86_REG_BP, "bp" }, { X86_REG_BPL, "bpl" }, { X86_REG_BX, "bx" }, { X86_REG_CH, "ch" }, { X86_REG_CL, "cl" }, { X86_REG_CS, "cs" }, { X86_REG_CX, "cx" }, { X86_REG_DH, "dh" }, { X86_REG_DI, "di" }, { X86_REG_DIL, "dil" }, { X86_REG_DL, "dl" }, { X86_REG_DS, "ds" }, { X86_REG_DX, "dx" }, { X86_REG_EAX, "eax" }, { X86_REG_EBP, "ebp" }, { X86_REG_EBX, "ebx" }, { X86_REG_ECX, "ecx" }, { X86_REG_EDI, "edi" }, { X86_REG_EDX, "edx" }, { X86_REG_EFLAGS, "flags" }, { X86_REG_EIP, "eip" }, { X86_REG_EIZ, "eiz" }, { X86_REG_ES, "es" }, { X86_REG_ESI, "esi" }, { X86_REG_ESP, "esp" }, { X86_REG_FPSW, "fpsw" }, { X86_REG_FS, "fs" }, { X86_REG_GS, "gs" }, { X86_REG_IP, "ip" }, { X86_REG_RAX, "rax" }, { X86_REG_RBP, "rbp" }, { X86_REG_RBX, "rbx" }, { X86_REG_RCX, "rcx" }, { X86_REG_RDI, "rdi" }, { X86_REG_RDX, "rdx" }, { X86_REG_RIP, "rip" }, { X86_REG_RIZ, "riz" }, { X86_REG_RSI, "rsi" }, { X86_REG_RSP, "rsp" }, { X86_REG_SI, "si" }, { X86_REG_SIL, "sil" }, { X86_REG_SP, "sp" }, { X86_REG_SPL, "spl" }, { X86_REG_SS, "ss" }, { X86_REG_CR0, "cr0" }, { X86_REG_CR1, "cr1" }, { X86_REG_CR2, "cr2" }, { X86_REG_CR3, "cr3" }, { X86_REG_CR4, "cr4" }, { X86_REG_CR5, "cr5" }, { X86_REG_CR6, "cr6" }, { X86_REG_CR7, "cr7" }, { X86_REG_CR8, "cr8" }, { X86_REG_CR9, "cr9" }, { X86_REG_CR10, "cr10" }, { X86_REG_CR11, "cr11" }, { X86_REG_CR12, "cr12" }, { X86_REG_CR13, "cr13" }, { X86_REG_CR14, "cr14" }, { X86_REG_CR15, "cr15" }, { X86_REG_DR0, "dr0" }, { X86_REG_DR1, "dr1" }, { X86_REG_DR2, "dr2" }, { X86_REG_DR3, "dr3" }, { X86_REG_DR4, "dr4" }, { X86_REG_DR5, "dr5" }, { X86_REG_DR6, "dr6" }, { X86_REG_DR7, "dr7" }, { X86_REG_DR8, "dr8" }, { X86_REG_DR9, "dr9" }, { X86_REG_DR10, "dr10" }, { X86_REG_DR11, "dr11" }, { X86_REG_DR12, "dr12" }, { X86_REG_DR13, "dr13" }, { X86_REG_DR14, "dr14" }, { X86_REG_DR15, "dr15" }, { X86_REG_FP0, "fp0" }, { X86_REG_FP1, "fp1" }, { X86_REG_FP2, "fp2" }, { X86_REG_FP3, "fp3" }, { X86_REG_FP4, "fp4" }, { X86_REG_FP5, "fp5" }, { X86_REG_FP6, "fp6" }, { X86_REG_FP7, "fp7" }, { X86_REG_K0, "k0" }, { X86_REG_K1, "k1" }, { X86_REG_K2, "k2" }, { X86_REG_K3, "k3" }, { X86_REG_K4, "k4" }, { X86_REG_K5, "k5" }, { X86_REG_K6, "k6" }, { X86_REG_K7, "k7" }, { X86_REG_MM0, "mm0" }, { X86_REG_MM1, "mm1" }, { X86_REG_MM2, "mm2" }, { X86_REG_MM3, "mm3" }, { X86_REG_MM4, "mm4" }, { X86_REG_MM5, "mm5" }, { X86_REG_MM6, "mm6" }, { X86_REG_MM7, "mm7" }, { X86_REG_R8, "r8" }, { X86_REG_R9, "r9" }, { X86_REG_R10, "r10" }, { X86_REG_R11, "r11" }, { X86_REG_R12, "r12" }, { X86_REG_R13, "r13" }, { X86_REG_R14, "r14" }, { X86_REG_R15, "r15" }, { X86_REG_ST0, "st(0)" }, { X86_REG_ST1, "st(1)" }, { X86_REG_ST2, "st(2)" }, { X86_REG_ST3, "st(3)" }, { X86_REG_ST4, "st(4)" }, { X86_REG_ST5, "st(5)" }, { X86_REG_ST6, "st(6)" }, { X86_REG_ST7, "st(7)" }, { X86_REG_XMM0, "xmm0" }, { X86_REG_XMM1, "xmm1" }, { X86_REG_XMM2, "xmm2" }, { X86_REG_XMM3, "xmm3" }, { X86_REG_XMM4, "xmm4" }, { X86_REG_XMM5, "xmm5" }, { X86_REG_XMM6, "xmm6" }, { X86_REG_XMM7, "xmm7" }, { X86_REG_XMM8, "xmm8" }, { X86_REG_XMM9, "xmm9" }, { X86_REG_XMM10, "xmm10" }, { X86_REG_XMM11, "xmm11" }, { X86_REG_XMM12, "xmm12" }, { X86_REG_XMM13, "xmm13" }, { X86_REG_XMM14, "xmm14" }, { X86_REG_XMM15, "xmm15" }, { X86_REG_XMM16, "xmm16" }, { X86_REG_XMM17, "xmm17" }, { X86_REG_XMM18, "xmm18" }, { X86_REG_XMM19, "xmm19" }, { X86_REG_XMM20, "xmm20" }, { X86_REG_XMM21, "xmm21" }, { X86_REG_XMM22, "xmm22" }, { X86_REG_XMM23, "xmm23" }, { X86_REG_XMM24, "xmm24" }, { X86_REG_XMM25, "xmm25" }, { X86_REG_XMM26, "xmm26" }, { X86_REG_XMM27, "xmm27" }, { X86_REG_XMM28, "xmm28" }, { X86_REG_XMM29, "xmm29" }, { X86_REG_XMM30, "xmm30" }, { X86_REG_XMM31, "xmm31" }, { X86_REG_YMM0, "ymm0" }, { X86_REG_YMM1, "ymm1" }, { X86_REG_YMM2, "ymm2" }, { X86_REG_YMM3, "ymm3" }, { X86_REG_YMM4, "ymm4" }, { X86_REG_YMM5, "ymm5" }, { X86_REG_YMM6, "ymm6" }, { X86_REG_YMM7, "ymm7" }, { X86_REG_YMM8, "ymm8" }, { X86_REG_YMM9, "ymm9" }, { X86_REG_YMM10, "ymm10" }, { X86_REG_YMM11, "ymm11" }, { X86_REG_YMM12, "ymm12" }, { X86_REG_YMM13, "ymm13" }, { X86_REG_YMM14, "ymm14" }, { X86_REG_YMM15, "ymm15" }, { X86_REG_YMM16, "ymm16" }, { X86_REG_YMM17, "ymm17" }, { X86_REG_YMM18, "ymm18" }, { X86_REG_YMM19, "ymm19" }, { X86_REG_YMM20, "ymm20" }, { X86_REG_YMM21, "ymm21" }, { X86_REG_YMM22, "ymm22" }, { X86_REG_YMM23, "ymm23" }, { X86_REG_YMM24, "ymm24" }, { X86_REG_YMM25, "ymm25" }, { X86_REG_YMM26, "ymm26" }, { X86_REG_YMM27, "ymm27" }, { X86_REG_YMM28, "ymm28" }, { X86_REG_YMM29, "ymm29" }, { X86_REG_YMM30, "ymm30" }, { X86_REG_YMM31, "ymm31" }, { X86_REG_ZMM0, "zmm0" }, { X86_REG_ZMM1, "zmm1" }, { X86_REG_ZMM2, "zmm2" }, { X86_REG_ZMM3, "zmm3" }, { X86_REG_ZMM4, "zmm4" }, { X86_REG_ZMM5, "zmm5" }, { X86_REG_ZMM6, "zmm6" }, { X86_REG_ZMM7, "zmm7" }, { X86_REG_ZMM8, "zmm8" }, { X86_REG_ZMM9, "zmm9" }, { X86_REG_ZMM10, "zmm10" }, { X86_REG_ZMM11, "zmm11" }, { X86_REG_ZMM12, "zmm12" }, { X86_REG_ZMM13, "zmm13" }, { X86_REG_ZMM14, "zmm14" }, { X86_REG_ZMM15, "zmm15" }, { X86_REG_ZMM16, "zmm16" }, { X86_REG_ZMM17, "zmm17" }, { X86_REG_ZMM18, "zmm18" }, { X86_REG_ZMM19, "zmm19" }, { X86_REG_ZMM20, "zmm20" }, { X86_REG_ZMM21, "zmm21" }, { X86_REG_ZMM22, "zmm22" }, { X86_REG_ZMM23, "zmm23" }, { X86_REG_ZMM24, "zmm24" }, { X86_REG_ZMM25, "zmm25" }, { X86_REG_ZMM26, "zmm26" }, { X86_REG_ZMM27, "zmm27" }, { X86_REG_ZMM28, "zmm28" }, { X86_REG_ZMM29, "zmm29" }, { X86_REG_ZMM30, "zmm30" }, { X86_REG_ZMM31, "zmm31" }, { X86_REG_R8B, "r8b" }, { X86_REG_R9B, "r9b" }, { X86_REG_R10B, "r10b" }, { X86_REG_R11B, "r11b" }, { X86_REG_R12B, "r12b" }, { X86_REG_R13B, "r13b" }, { X86_REG_R14B, "r14b" }, { X86_REG_R15B, "r15b" }, { X86_REG_R8D, "r8d" }, { X86_REG_R9D, "r9d" }, { X86_REG_R10D, "r10d" }, { X86_REG_R11D, "r11d" }, { X86_REG_R12D, "r12d" }, { X86_REG_R13D, "r13d" }, { X86_REG_R14D, "r14d" }, { X86_REG_R15D, "r15d" }, { X86_REG_R8W, "r8w" }, { X86_REG_R9W, "r9w" }, { X86_REG_R10W, "r10w" }, { X86_REG_R11W, "r11w" }, { X86_REG_R12W, "r12w" }, { X86_REG_R13W, "r13w" }, { X86_REG_R14W, "r14w" }, { X86_REG_R15W, "r15w" }, }; #endif // register size in non-64bit mode const uint8_t regsize_map_32 [] = { 0, // { X86_REG_INVALID, NULL }, 1, // { X86_REG_AH, "ah" }, 1, // { X86_REG_AL, "al" }, 2, // { X86_REG_AX, "ax" }, 1, // { X86_REG_BH, "bh" }, 1, // { X86_REG_BL, "bl" }, 2, // { X86_REG_BP, "bp" }, 1, // { X86_REG_BPL, "bpl" }, 2, // { X86_REG_BX, "bx" }, 1, // { X86_REG_CH, "ch" }, 1, // { X86_REG_CL, "cl" }, 2, // { X86_REG_CS, "cs" }, 2, // { X86_REG_CX, "cx" }, 1, // { X86_REG_DH, "dh" }, 2, // { X86_REG_DI, "di" }, 1, // { X86_REG_DIL, "dil" }, 1, // { X86_REG_DL, "dl" }, 2, // { X86_REG_DS, "ds" }, 2, // { X86_REG_DX, "dx" }, 4, // { X86_REG_EAX, "eax" }, 4, // { X86_REG_EBP, "ebp" }, 4, // { X86_REG_EBX, "ebx" }, 4, // { X86_REG_ECX, "ecx" }, 4, // { X86_REG_EDI, "edi" }, 4, // { X86_REG_EDX, "edx" }, 4, // { X86_REG_EFLAGS, "flags" }, 4, // { X86_REG_EIP, "eip" }, 4, // { X86_REG_EIZ, "eiz" }, 2, // { X86_REG_ES, "es" }, 4, // { X86_REG_ESI, "esi" }, 4, // { X86_REG_ESP, "esp" }, 10, // { X86_REG_FPSW, "fpsw" }, 2, // { X86_REG_FS, "fs" }, 2, // { X86_REG_GS, "gs" }, 2, // { X86_REG_IP, "ip" }, 8, // { X86_REG_RAX, "rax" }, 8, // { X86_REG_RBP, "rbp" }, 8, // { X86_REG_RBX, "rbx" }, 8, // { X86_REG_RCX, "rcx" }, 8, // { X86_REG_RDI, "rdi" }, 8, // { X86_REG_RDX, "rdx" }, 8, // { X86_REG_RIP, "rip" }, 8, // { X86_REG_RIZ, "riz" }, 8, // { X86_REG_RSI, "rsi" }, 8, // { X86_REG_RSP, "rsp" }, 2, // { X86_REG_SI, "si" }, 1, // { X86_REG_SIL, "sil" }, 2, // { X86_REG_SP, "sp" }, 1, // { X86_REG_SPL, "spl" }, 2, // { X86_REG_SS, "ss" }, 4, // { X86_REG_CR0, "cr0" }, 4, // { X86_REG_CR1, "cr1" }, 4, // { X86_REG_CR2, "cr2" }, 4, // { X86_REG_CR3, "cr3" }, 4, // { X86_REG_CR4, "cr4" }, 8, // { X86_REG_CR5, "cr5" }, 8, // { X86_REG_CR6, "cr6" }, 8, // { X86_REG_CR7, "cr7" }, 8, // { X86_REG_CR8, "cr8" }, 8, // { X86_REG_CR9, "cr9" }, 8, // { X86_REG_CR10, "cr10" }, 8, // { X86_REG_CR11, "cr11" }, 8, // { X86_REG_CR12, "cr12" }, 8, // { X86_REG_CR13, "cr13" }, 8, // { X86_REG_CR14, "cr14" }, 8, // { X86_REG_CR15, "cr15" }, 4, // { X86_REG_DR0, "dr0" }, 4, // { X86_REG_DR1, "dr1" }, 4, // { X86_REG_DR2, "dr2" }, 4, // { X86_REG_DR3, "dr3" }, 4, // { X86_REG_DR4, "dr4" }, 4, // { X86_REG_DR5, "dr5" }, 4, // { X86_REG_DR6, "dr6" }, 4, // { X86_REG_DR7, "dr7" }, 4, // { X86_REG_DR8, "dr8" }, 4, // { X86_REG_DR9, "dr9" }, 4, // { X86_REG_DR10, "dr10" }, 4, // { X86_REG_DR11, "dr11" }, 4, // { X86_REG_DR12, "dr12" }, 4, // { X86_REG_DR13, "dr13" }, 4, // { X86_REG_DR14, "dr14" }, 4, // { X86_REG_DR15, "dr15" }, 10, // { X86_REG_FP0, "fp0" }, 10, // { X86_REG_FP1, "fp1" }, 10, // { X86_REG_FP2, "fp2" }, 10, // { X86_REG_FP3, "fp3" }, 10, // { X86_REG_FP4, "fp4" }, 10, // { X86_REG_FP5, "fp5" }, 10, // { X86_REG_FP6, "fp6" }, 10, // { X86_REG_FP7, "fp7" }, 2, // { X86_REG_K0, "k0" }, 2, // { X86_REG_K1, "k1" }, 2, // { X86_REG_K2, "k2" }, 2, // { X86_REG_K3, "k3" }, 2, // { X86_REG_K4, "k4" }, 2, // { X86_REG_K5, "k5" }, 2, // { X86_REG_K6, "k6" }, 2, // { X86_REG_K7, "k7" }, 8, // { X86_REG_MM0, "mm0" }, 8, // { X86_REG_MM1, "mm1" }, 8, // { X86_REG_MM2, "mm2" }, 8, // { X86_REG_MM3, "mm3" }, 8, // { X86_REG_MM4, "mm4" }, 8, // { X86_REG_MM5, "mm5" }, 8, // { X86_REG_MM6, "mm6" }, 8, // { X86_REG_MM7, "mm7" }, 8, // { X86_REG_R8, "r8" }, 8, // { X86_REG_R9, "r9" }, 8, // { X86_REG_R10, "r10" }, 8, // { X86_REG_R11, "r11" }, 8, // { X86_REG_R12, "r12" }, 8, // { X86_REG_R13, "r13" }, 8, // { X86_REG_R14, "r14" }, 8, // { X86_REG_R15, "r15" }, 10, // { X86_REG_ST0, "st0" }, 10, // { X86_REG_ST1, "st1" }, 10, // { X86_REG_ST2, "st2" }, 10, // { X86_REG_ST3, "st3" }, 10, // { X86_REG_ST4, "st4" }, 10, // { X86_REG_ST5, "st5" }, 10, // { X86_REG_ST6, "st6" }, 10, // { X86_REG_ST7, "st7" }, 16, // { X86_REG_XMM0, "xmm0" }, 16, // { X86_REG_XMM1, "xmm1" }, 16, // { X86_REG_XMM2, "xmm2" }, 16, // { X86_REG_XMM3, "xmm3" }, 16, // { X86_REG_XMM4, "xmm4" }, 16, // { X86_REG_XMM5, "xmm5" }, 16, // { X86_REG_XMM6, "xmm6" }, 16, // { X86_REG_XMM7, "xmm7" }, 16, // { X86_REG_XMM8, "xmm8" }, 16, // { X86_REG_XMM9, "xmm9" }, 16, // { X86_REG_XMM10, "xmm10" }, 16, // { X86_REG_XMM11, "xmm11" }, 16, // { X86_REG_XMM12, "xmm12" }, 16, // { X86_REG_XMM13, "xmm13" }, 16, // { X86_REG_XMM14, "xmm14" }, 16, // { X86_REG_XMM15, "xmm15" }, 16, // { X86_REG_XMM16, "xmm16" }, 16, // { X86_REG_XMM17, "xmm17" }, 16, // { X86_REG_XMM18, "xmm18" }, 16, // { X86_REG_XMM19, "xmm19" }, 16, // { X86_REG_XMM20, "xmm20" }, 16, // { X86_REG_XMM21, "xmm21" }, 16, // { X86_REG_XMM22, "xmm22" }, 16, // { X86_REG_XMM23, "xmm23" }, 16, // { X86_REG_XMM24, "xmm24" }, 16, // { X86_REG_XMM25, "xmm25" }, 16, // { X86_REG_XMM26, "xmm26" }, 16, // { X86_REG_XMM27, "xmm27" }, 16, // { X86_REG_XMM28, "xmm28" }, 16, // { X86_REG_XMM29, "xmm29" }, 16, // { X86_REG_XMM30, "xmm30" }, 16, // { X86_REG_XMM31, "xmm31" }, 32, // { X86_REG_YMM0, "ymm0" }, 32, // { X86_REG_YMM1, "ymm1" }, 32, // { X86_REG_YMM2, "ymm2" }, 32, // { X86_REG_YMM3, "ymm3" }, 32, // { X86_REG_YMM4, "ymm4" }, 32, // { X86_REG_YMM5, "ymm5" }, 32, // { X86_REG_YMM6, "ymm6" }, 32, // { X86_REG_YMM7, "ymm7" }, 32, // { X86_REG_YMM8, "ymm8" }, 32, // { X86_REG_YMM9, "ymm9" }, 32, // { X86_REG_YMM10, "ymm10" }, 32, // { X86_REG_YMM11, "ymm11" }, 32, // { X86_REG_YMM12, "ymm12" }, 32, // { X86_REG_YMM13, "ymm13" }, 32, // { X86_REG_YMM14, "ymm14" }, 32, // { X86_REG_YMM15, "ymm15" }, 32, // { X86_REG_YMM16, "ymm16" }, 32, // { X86_REG_YMM17, "ymm17" }, 32, // { X86_REG_YMM18, "ymm18" }, 32, // { X86_REG_YMM19, "ymm19" }, 32, // { X86_REG_YMM20, "ymm20" }, 32, // { X86_REG_YMM21, "ymm21" }, 32, // { X86_REG_YMM22, "ymm22" }, 32, // { X86_REG_YMM23, "ymm23" }, 32, // { X86_REG_YMM24, "ymm24" }, 32, // { X86_REG_YMM25, "ymm25" }, 32, // { X86_REG_YMM26, "ymm26" }, 32, // { X86_REG_YMM27, "ymm27" }, 32, // { X86_REG_YMM28, "ymm28" }, 32, // { X86_REG_YMM29, "ymm29" }, 32, // { X86_REG_YMM30, "ymm30" }, 32, // { X86_REG_YMM31, "ymm31" }, 64, // { X86_REG_ZMM0, "zmm0" }, 64, // { X86_REG_ZMM1, "zmm1" }, 64, // { X86_REG_ZMM2, "zmm2" }, 64, // { X86_REG_ZMM3, "zmm3" }, 64, // { X86_REG_ZMM4, "zmm4" }, 64, // { X86_REG_ZMM5, "zmm5" }, 64, // { X86_REG_ZMM6, "zmm6" }, 64, // { X86_REG_ZMM7, "zmm7" }, 64, // { X86_REG_ZMM8, "zmm8" }, 64, // { X86_REG_ZMM9, "zmm9" }, 64, // { X86_REG_ZMM10, "zmm10" }, 64, // { X86_REG_ZMM11, "zmm11" }, 64, // { X86_REG_ZMM12, "zmm12" }, 64, // { X86_REG_ZMM13, "zmm13" }, 64, // { X86_REG_ZMM14, "zmm14" }, 64, // { X86_REG_ZMM15, "zmm15" }, 64, // { X86_REG_ZMM16, "zmm16" }, 64, // { X86_REG_ZMM17, "zmm17" }, 64, // { X86_REG_ZMM18, "zmm18" }, 64, // { X86_REG_ZMM19, "zmm19" }, 64, // { X86_REG_ZMM20, "zmm20" }, 64, // { X86_REG_ZMM21, "zmm21" }, 64, // { X86_REG_ZMM22, "zmm22" }, 64, // { X86_REG_ZMM23, "zmm23" }, 64, // { X86_REG_ZMM24, "zmm24" }, 64, // { X86_REG_ZMM25, "zmm25" }, 64, // { X86_REG_ZMM26, "zmm26" }, 64, // { X86_REG_ZMM27, "zmm27" }, 64, // { X86_REG_ZMM28, "zmm28" }, 64, // { X86_REG_ZMM29, "zmm29" }, 64, // { X86_REG_ZMM30, "zmm30" }, 64, // { X86_REG_ZMM31, "zmm31" }, 1, // { X86_REG_R8B, "r8b" }, 1, // { X86_REG_R9B, "r9b" }, 1, // { X86_REG_R10B, "r10b" }, 1, // { X86_REG_R11B, "r11b" }, 1, // { X86_REG_R12B, "r12b" }, 1, // { X86_REG_R13B, "r13b" }, 1, // { X86_REG_R14B, "r14b" }, 1, // { X86_REG_R15B, "r15b" }, 4, // { X86_REG_R8D, "r8d" }, 4, // { X86_REG_R9D, "r9d" }, 4, // { X86_REG_R10D, "r10d" }, 4, // { X86_REG_R11D, "r11d" }, 4, // { X86_REG_R12D, "r12d" }, 4, // { X86_REG_R13D, "r13d" }, 4, // { X86_REG_R14D, "r14d" }, 4, // { X86_REG_R15D, "r15d" }, 2, // { X86_REG_R8W, "r8w" }, 2, // { X86_REG_R9W, "r9w" }, 2, // { X86_REG_R10W, "r10w" }, 2, // { X86_REG_R11W, "r11w" }, 2, // { X86_REG_R12W, "r12w" }, 2, // { X86_REG_R13W, "r13w" }, 2, // { X86_REG_R14W, "r14w" }, 2, // { X86_REG_R15W, "r15w" }, }; // register size in 64bit mode const uint8_t regsize_map_64 [] = { 0, // { X86_REG_INVALID, NULL }, 1, // { X86_REG_AH, "ah" }, 1, // { X86_REG_AL, "al" }, 2, // { X86_REG_AX, "ax" }, 1, // { X86_REG_BH, "bh" }, 1, // { X86_REG_BL, "bl" }, 2, // { X86_REG_BP, "bp" }, 1, // { X86_REG_BPL, "bpl" }, 2, // { X86_REG_BX, "bx" }, 1, // { X86_REG_CH, "ch" }, 1, // { X86_REG_CL, "cl" }, 2, // { X86_REG_CS, "cs" }, 2, // { X86_REG_CX, "cx" }, 1, // { X86_REG_DH, "dh" }, 2, // { X86_REG_DI, "di" }, 1, // { X86_REG_DIL, "dil" }, 1, // { X86_REG_DL, "dl" }, 2, // { X86_REG_DS, "ds" }, 2, // { X86_REG_DX, "dx" }, 4, // { X86_REG_EAX, "eax" }, 4, // { X86_REG_EBP, "ebp" }, 4, // { X86_REG_EBX, "ebx" }, 4, // { X86_REG_ECX, "ecx" }, 4, // { X86_REG_EDI, "edi" }, 4, // { X86_REG_EDX, "edx" }, 8, // { X86_REG_EFLAGS, "flags" }, 4, // { X86_REG_EIP, "eip" }, 4, // { X86_REG_EIZ, "eiz" }, 2, // { X86_REG_ES, "es" }, 4, // { X86_REG_ESI, "esi" }, 4, // { X86_REG_ESP, "esp" }, 10, // { X86_REG_FPSW, "fpsw" }, 2, // { X86_REG_FS, "fs" }, 2, // { X86_REG_GS, "gs" }, 2, // { X86_REG_IP, "ip" }, 8, // { X86_REG_RAX, "rax" }, 8, // { X86_REG_RBP, "rbp" }, 8, // { X86_REG_RBX, "rbx" }, 8, // { X86_REG_RCX, "rcx" }, 8, // { X86_REG_RDI, "rdi" }, 8, // { X86_REG_RDX, "rdx" }, 8, // { X86_REG_RIP, "rip" }, 8, // { X86_REG_RIZ, "riz" }, 8, // { X86_REG_RSI, "rsi" }, 8, // { X86_REG_RSP, "rsp" }, 2, // { X86_REG_SI, "si" }, 1, // { X86_REG_SIL, "sil" }, 2, // { X86_REG_SP, "sp" }, 1, // { X86_REG_SPL, "spl" }, 2, // { X86_REG_SS, "ss" }, 8, // { X86_REG_CR0, "cr0" }, 8, // { X86_REG_CR1, "cr1" }, 8, // { X86_REG_CR2, "cr2" }, 8, // { X86_REG_CR3, "cr3" }, 8, // { X86_REG_CR4, "cr4" }, 8, // { X86_REG_CR5, "cr5" }, 8, // { X86_REG_CR6, "cr6" }, 8, // { X86_REG_CR7, "cr7" }, 8, // { X86_REG_CR8, "cr8" }, 8, // { X86_REG_CR9, "cr9" }, 8, // { X86_REG_CR10, "cr10" }, 8, // { X86_REG_CR11, "cr11" }, 8, // { X86_REG_CR12, "cr12" }, 8, // { X86_REG_CR13, "cr13" }, 8, // { X86_REG_CR14, "cr14" }, 8, // { X86_REG_CR15, "cr15" }, 8, // { X86_REG_DR0, "dr0" }, 8, // { X86_REG_DR1, "dr1" }, 8, // { X86_REG_DR2, "dr2" }, 8, // { X86_REG_DR3, "dr3" }, 8, // { X86_REG_DR4, "dr4" }, 8, // { X86_REG_DR5, "dr5" }, 8, // { X86_REG_DR6, "dr6" }, 8, // { X86_REG_DR7, "dr7" }, 8, // { X86_REG_DR8, "dr8" }, 8, // { X86_REG_DR9, "dr9" }, 8, // { X86_REG_DR10, "dr10" }, 8, // { X86_REG_DR11, "dr11" }, 8, // { X86_REG_DR12, "dr12" }, 8, // { X86_REG_DR13, "dr13" }, 8, // { X86_REG_DR14, "dr14" }, 8, // { X86_REG_DR15, "dr15" }, 10, // { X86_REG_FP0, "fp0" }, 10, // { X86_REG_FP1, "fp1" }, 10, // { X86_REG_FP2, "fp2" }, 10, // { X86_REG_FP3, "fp3" }, 10, // { X86_REG_FP4, "fp4" }, 10, // { X86_REG_FP5, "fp5" }, 10, // { X86_REG_FP6, "fp6" }, 10, // { X86_REG_FP7, "fp7" }, 2, // { X86_REG_K0, "k0" }, 2, // { X86_REG_K1, "k1" }, 2, // { X86_REG_K2, "k2" }, 2, // { X86_REG_K3, "k3" }, 2, // { X86_REG_K4, "k4" }, 2, // { X86_REG_K5, "k5" }, 2, // { X86_REG_K6, "k6" }, 2, // { X86_REG_K7, "k7" }, 8, // { X86_REG_MM0, "mm0" }, 8, // { X86_REG_MM1, "mm1" }, 8, // { X86_REG_MM2, "mm2" }, 8, // { X86_REG_MM3, "mm3" }, 8, // { X86_REG_MM4, "mm4" }, 8, // { X86_REG_MM5, "mm5" }, 8, // { X86_REG_MM6, "mm6" }, 8, // { X86_REG_MM7, "mm7" }, 8, // { X86_REG_R8, "r8" }, 8, // { X86_REG_R9, "r9" }, 8, // { X86_REG_R10, "r10" }, 8, // { X86_REG_R11, "r11" }, 8, // { X86_REG_R12, "r12" }, 8, // { X86_REG_R13, "r13" }, 8, // { X86_REG_R14, "r14" }, 8, // { X86_REG_R15, "r15" }, 10, // { X86_REG_ST0, "st0" }, 10, // { X86_REG_ST1, "st1" }, 10, // { X86_REG_ST2, "st2" }, 10, // { X86_REG_ST3, "st3" }, 10, // { X86_REG_ST4, "st4" }, 10, // { X86_REG_ST5, "st5" }, 10, // { X86_REG_ST6, "st6" }, 10, // { X86_REG_ST7, "st7" }, 16, // { X86_REG_XMM0, "xmm0" }, 16, // { X86_REG_XMM1, "xmm1" }, 16, // { X86_REG_XMM2, "xmm2" }, 16, // { X86_REG_XMM3, "xmm3" }, 16, // { X86_REG_XMM4, "xmm4" }, 16, // { X86_REG_XMM5, "xmm5" }, 16, // { X86_REG_XMM6, "xmm6" }, 16, // { X86_REG_XMM7, "xmm7" }, 16, // { X86_REG_XMM8, "xmm8" }, 16, // { X86_REG_XMM9, "xmm9" }, 16, // { X86_REG_XMM10, "xmm10" }, 16, // { X86_REG_XMM11, "xmm11" }, 16, // { X86_REG_XMM12, "xmm12" }, 16, // { X86_REG_XMM13, "xmm13" }, 16, // { X86_REG_XMM14, "xmm14" }, 16, // { X86_REG_XMM15, "xmm15" }, 16, // { X86_REG_XMM16, "xmm16" }, 16, // { X86_REG_XMM17, "xmm17" }, 16, // { X86_REG_XMM18, "xmm18" }, 16, // { X86_REG_XMM19, "xmm19" }, 16, // { X86_REG_XMM20, "xmm20" }, 16, // { X86_REG_XMM21, "xmm21" }, 16, // { X86_REG_XMM22, "xmm22" }, 16, // { X86_REG_XMM23, "xmm23" }, 16, // { X86_REG_XMM24, "xmm24" }, 16, // { X86_REG_XMM25, "xmm25" }, 16, // { X86_REG_XMM26, "xmm26" }, 16, // { X86_REG_XMM27, "xmm27" }, 16, // { X86_REG_XMM28, "xmm28" }, 16, // { X86_REG_XMM29, "xmm29" }, 16, // { X86_REG_XMM30, "xmm30" }, 16, // { X86_REG_XMM31, "xmm31" }, 32, // { X86_REG_YMM0, "ymm0" }, 32, // { X86_REG_YMM1, "ymm1" }, 32, // { X86_REG_YMM2, "ymm2" }, 32, // { X86_REG_YMM3, "ymm3" }, 32, // { X86_REG_YMM4, "ymm4" }, 32, // { X86_REG_YMM5, "ymm5" }, 32, // { X86_REG_YMM6, "ymm6" }, 32, // { X86_REG_YMM7, "ymm7" }, 32, // { X86_REG_YMM8, "ymm8" }, 32, // { X86_REG_YMM9, "ymm9" }, 32, // { X86_REG_YMM10, "ymm10" }, 32, // { X86_REG_YMM11, "ymm11" }, 32, // { X86_REG_YMM12, "ymm12" }, 32, // { X86_REG_YMM13, "ymm13" }, 32, // { X86_REG_YMM14, "ymm14" }, 32, // { X86_REG_YMM15, "ymm15" }, 32, // { X86_REG_YMM16, "ymm16" }, 32, // { X86_REG_YMM17, "ymm17" }, 32, // { X86_REG_YMM18, "ymm18" }, 32, // { X86_REG_YMM19, "ymm19" }, 32, // { X86_REG_YMM20, "ymm20" }, 32, // { X86_REG_YMM21, "ymm21" }, 32, // { X86_REG_YMM22, "ymm22" }, 32, // { X86_REG_YMM23, "ymm23" }, 32, // { X86_REG_YMM24, "ymm24" }, 32, // { X86_REG_YMM25, "ymm25" }, 32, // { X86_REG_YMM26, "ymm26" }, 32, // { X86_REG_YMM27, "ymm27" }, 32, // { X86_REG_YMM28, "ymm28" }, 32, // { X86_REG_YMM29, "ymm29" }, 32, // { X86_REG_YMM30, "ymm30" }, 32, // { X86_REG_YMM31, "ymm31" }, 64, // { X86_REG_ZMM0, "zmm0" }, 64, // { X86_REG_ZMM1, "zmm1" }, 64, // { X86_REG_ZMM2, "zmm2" }, 64, // { X86_REG_ZMM3, "zmm3" }, 64, // { X86_REG_ZMM4, "zmm4" }, 64, // { X86_REG_ZMM5, "zmm5" }, 64, // { X86_REG_ZMM6, "zmm6" }, 64, // { X86_REG_ZMM7, "zmm7" }, 64, // { X86_REG_ZMM8, "zmm8" }, 64, // { X86_REG_ZMM9, "zmm9" }, 64, // { X86_REG_ZMM10, "zmm10" }, 64, // { X86_REG_ZMM11, "zmm11" }, 64, // { X86_REG_ZMM12, "zmm12" }, 64, // { X86_REG_ZMM13, "zmm13" }, 64, // { X86_REG_ZMM14, "zmm14" }, 64, // { X86_REG_ZMM15, "zmm15" }, 64, // { X86_REG_ZMM16, "zmm16" }, 64, // { X86_REG_ZMM17, "zmm17" }, 64, // { X86_REG_ZMM18, "zmm18" }, 64, // { X86_REG_ZMM19, "zmm19" }, 64, // { X86_REG_ZMM20, "zmm20" }, 64, // { X86_REG_ZMM21, "zmm21" }, 64, // { X86_REG_ZMM22, "zmm22" }, 64, // { X86_REG_ZMM23, "zmm23" }, 64, // { X86_REG_ZMM24, "zmm24" }, 64, // { X86_REG_ZMM25, "zmm25" }, 64, // { X86_REG_ZMM26, "zmm26" }, 64, // { X86_REG_ZMM27, "zmm27" }, 64, // { X86_REG_ZMM28, "zmm28" }, 64, // { X86_REG_ZMM29, "zmm29" }, 64, // { X86_REG_ZMM30, "zmm30" }, 64, // { X86_REG_ZMM31, "zmm31" }, 1, // { X86_REG_R8B, "r8b" }, 1, // { X86_REG_R9B, "r9b" }, 1, // { X86_REG_R10B, "r10b" }, 1, // { X86_REG_R11B, "r11b" }, 1, // { X86_REG_R12B, "r12b" }, 1, // { X86_REG_R13B, "r13b" }, 1, // { X86_REG_R14B, "r14b" }, 1, // { X86_REG_R15B, "r15b" }, 4, // { X86_REG_R8D, "r8d" }, 4, // { X86_REG_R9D, "r9d" }, 4, // { X86_REG_R10D, "r10d" }, 4, // { X86_REG_R11D, "r11d" }, 4, // { X86_REG_R12D, "r12d" }, 4, // { X86_REG_R13D, "r13d" }, 4, // { X86_REG_R14D, "r14d" }, 4, // { X86_REG_R15D, "r15d" }, 2, // { X86_REG_R8W, "r8w" }, 2, // { X86_REG_R9W, "r9w" }, 2, // { X86_REG_R10W, "r10w" }, 2, // { X86_REG_R11W, "r11w" }, 2, // { X86_REG_R12W, "r12w" }, 2, // { X86_REG_R13W, "r13w" }, 2, // { X86_REG_R14W, "r14w" }, 2, // { X86_REG_R15W, "r15w" }, }; const char *X86_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET cs_struct *ud = (cs_struct *)handle; if (reg >= ARR_SIZE(reg_name_maps)) return NULL; if (reg == X86_REG_EFLAGS) { if (ud->mode & CS_MODE_32) return "eflags"; if (ud->mode & CS_MODE_64) return "rflags"; } return reg_name_maps[reg].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map insn_name_maps[] = { { X86_INS_INVALID, NULL }, { X86_INS_AAA, "aaa" }, { X86_INS_AAD, "aad" }, { X86_INS_AAM, "aam" }, { X86_INS_AAS, "aas" }, { X86_INS_FABS, "fabs" }, { X86_INS_ADC, "adc" }, { X86_INS_ADCX, "adcx" }, { X86_INS_ADD, "add" }, { X86_INS_ADDPD, "addpd" }, { X86_INS_ADDPS, "addps" }, { X86_INS_ADDSD, "addsd" }, { X86_INS_ADDSS, "addss" }, { X86_INS_ADDSUBPD, "addsubpd" }, { X86_INS_ADDSUBPS, "addsubps" }, { X86_INS_FADD, "fadd" }, { X86_INS_FIADD, "fiadd" }, { X86_INS_FADDP, "faddp" }, { X86_INS_ADOX, "adox" }, { X86_INS_AESDECLAST, "aesdeclast" }, { X86_INS_AESDEC, "aesdec" }, { X86_INS_AESENCLAST, "aesenclast" }, { X86_INS_AESENC, "aesenc" }, { X86_INS_AESIMC, "aesimc" }, { X86_INS_AESKEYGENASSIST, "aeskeygenassist" }, { X86_INS_AND, "and" }, { X86_INS_ANDN, "andn" }, { X86_INS_ANDNPD, "andnpd" }, { X86_INS_ANDNPS, "andnps" }, { X86_INS_ANDPD, "andpd" }, { X86_INS_ANDPS, "andps" }, { X86_INS_ARPL, "arpl" }, { X86_INS_BEXTR, "bextr" }, { X86_INS_BLCFILL, "blcfill" }, { X86_INS_BLCI, "blci" }, { X86_INS_BLCIC, "blcic" }, { X86_INS_BLCMSK, "blcmsk" }, { X86_INS_BLCS, "blcs" }, { X86_INS_BLENDPD, "blendpd" }, { X86_INS_BLENDPS, "blendps" }, { X86_INS_BLENDVPD, "blendvpd" }, { X86_INS_BLENDVPS, "blendvps" }, { X86_INS_BLSFILL, "blsfill" }, { X86_INS_BLSI, "blsi" }, { X86_INS_BLSIC, "blsic" }, { X86_INS_BLSMSK, "blsmsk" }, { X86_INS_BLSR, "blsr" }, { X86_INS_BOUND, "bound" }, { X86_INS_BSF, "bsf" }, { X86_INS_BSR, "bsr" }, { X86_INS_BSWAP, "bswap" }, { X86_INS_BT, "bt" }, { X86_INS_BTC, "btc" }, { X86_INS_BTR, "btr" }, { X86_INS_BTS, "bts" }, { X86_INS_BZHI, "bzhi" }, { X86_INS_CALL, "call" }, { X86_INS_CBW, "cbw" }, { X86_INS_CDQ, "cdq" }, { X86_INS_CDQE, "cdqe" }, { X86_INS_FCHS, "fchs" }, { X86_INS_CLAC, "clac" }, { X86_INS_CLC, "clc" }, { X86_INS_CLD, "cld" }, { X86_INS_CLFLUSH, "clflush" }, { X86_INS_CLFLUSHOPT, "clflushopt" }, { X86_INS_CLGI, "clgi" }, { X86_INS_CLI, "cli" }, { X86_INS_CLTS, "clts" }, { X86_INS_CLWB, "clwb" }, { X86_INS_CMC, "cmc" }, { X86_INS_CMOVA, "cmova" }, { X86_INS_CMOVAE, "cmovae" }, { X86_INS_CMOVB, "cmovb" }, { X86_INS_CMOVBE, "cmovbe" }, { X86_INS_FCMOVBE, "fcmovbe" }, { X86_INS_FCMOVB, "fcmovb" }, { X86_INS_CMOVE, "cmove" }, { X86_INS_FCMOVE, "fcmove" }, { X86_INS_CMOVG, "cmovg" }, { X86_INS_CMOVGE, "cmovge" }, { X86_INS_CMOVL, "cmovl" }, { X86_INS_CMOVLE, "cmovle" }, { X86_INS_FCMOVNBE, "fcmovnbe" }, { X86_INS_FCMOVNB, "fcmovnb" }, { X86_INS_CMOVNE, "cmovne" }, { X86_INS_FCMOVNE, "fcmovne" }, { X86_INS_CMOVNO, "cmovno" }, { X86_INS_CMOVNP, "cmovnp" }, { X86_INS_FCMOVNU, "fcmovnu" }, { X86_INS_CMOVNS, "cmovns" }, { X86_INS_CMOVO, "cmovo" }, { X86_INS_CMOVP, "cmovp" }, { X86_INS_FCMOVU, "fcmovu" }, { X86_INS_CMOVS, "cmovs" }, { X86_INS_CMP, "cmp" }, { X86_INS_CMPSB, "cmpsb" }, { X86_INS_CMPSQ, "cmpsq" }, { X86_INS_CMPSW, "cmpsw" }, { X86_INS_CMPXCHG16B, "cmpxchg16b" }, { X86_INS_CMPXCHG, "cmpxchg" }, { X86_INS_CMPXCHG8B, "cmpxchg8b" }, { X86_INS_COMISD, "comisd" }, { X86_INS_COMISS, "comiss" }, { X86_INS_FCOMP, "fcomp" }, { X86_INS_FCOMIP, "fcomip" }, { X86_INS_FCOMI, "fcomi" }, { X86_INS_FCOM, "fcom" }, { X86_INS_FCOS, "fcos" }, { X86_INS_CPUID, "cpuid" }, { X86_INS_CQO, "cqo" }, { X86_INS_CRC32, "crc32" }, { X86_INS_CVTDQ2PD, "cvtdq2pd" }, { X86_INS_CVTDQ2PS, "cvtdq2ps" }, { X86_INS_CVTPD2DQ, "cvtpd2dq" }, { X86_INS_CVTPD2PS, "cvtpd2ps" }, { X86_INS_CVTPS2DQ, "cvtps2dq" }, { X86_INS_CVTPS2PD, "cvtps2pd" }, { X86_INS_CVTSD2SI, "cvtsd2si" }, { X86_INS_CVTSD2SS, "cvtsd2ss" }, { X86_INS_CVTSI2SD, "cvtsi2sd" }, { X86_INS_CVTSI2SS, "cvtsi2ss" }, { X86_INS_CVTSS2SD, "cvtss2sd" }, { X86_INS_CVTSS2SI, "cvtss2si" }, { X86_INS_CVTTPD2DQ, "cvttpd2dq" }, { X86_INS_CVTTPS2DQ, "cvttps2dq" }, { X86_INS_CVTTSD2SI, "cvttsd2si" }, { X86_INS_CVTTSS2SI, "cvttss2si" }, { X86_INS_CWD, "cwd" }, { X86_INS_CWDE, "cwde" }, { X86_INS_DAA, "daa" }, { X86_INS_DAS, "das" }, { X86_INS_DATA16, "data16" }, { X86_INS_DEC, "dec" }, { X86_INS_DIV, "div" }, { X86_INS_DIVPD, "divpd" }, { X86_INS_DIVPS, "divps" }, { X86_INS_FDIVR, "fdivr" }, { X86_INS_FIDIVR, "fidivr" }, { X86_INS_FDIVRP, "fdivrp" }, { X86_INS_DIVSD, "divsd" }, { X86_INS_DIVSS, "divss" }, { X86_INS_FDIV, "fdiv" }, { X86_INS_FIDIV, "fidiv" }, { X86_INS_FDIVP, "fdivp" }, { X86_INS_DPPD, "dppd" }, { X86_INS_DPPS, "dpps" }, { X86_INS_RET, "ret" }, { X86_INS_ENCLS, "encls" }, { X86_INS_ENCLU, "enclu" }, { X86_INS_ENTER, "enter" }, { X86_INS_EXTRACTPS, "extractps" }, { X86_INS_EXTRQ, "extrq" }, { X86_INS_F2XM1, "f2xm1" }, { X86_INS_LCALL, "lcall" }, { X86_INS_LJMP, "ljmp" }, { X86_INS_FBLD, "fbld" }, { X86_INS_FBSTP, "fbstp" }, { X86_INS_FCOMPP, "fcompp" }, { X86_INS_FDECSTP, "fdecstp" }, { X86_INS_FEMMS, "femms" }, { X86_INS_FFREE, "ffree" }, { X86_INS_FICOM, "ficom" }, { X86_INS_FICOMP, "ficomp" }, { X86_INS_FINCSTP, "fincstp" }, { X86_INS_FLDCW, "fldcw" }, { X86_INS_FLDENV, "fldenv" }, { X86_INS_FLDL2E, "fldl2e" }, { X86_INS_FLDL2T, "fldl2t" }, { X86_INS_FLDLG2, "fldlg2" }, { X86_INS_FLDLN2, "fldln2" }, { X86_INS_FLDPI, "fldpi" }, { X86_INS_FNCLEX, "fnclex" }, { X86_INS_FNINIT, "fninit" }, { X86_INS_FNOP, "fnop" }, { X86_INS_FNSTCW, "fnstcw" }, { X86_INS_FNSTSW, "fnstsw" }, { X86_INS_FPATAN, "fpatan" }, { X86_INS_FPREM, "fprem" }, { X86_INS_FPREM1, "fprem1" }, { X86_INS_FPTAN, "fptan" }, { X86_INS_FFREEP, "ffreep" }, { X86_INS_FRNDINT, "frndint" }, { X86_INS_FRSTOR, "frstor" }, { X86_INS_FNSAVE, "fnsave" }, { X86_INS_FSCALE, "fscale" }, { X86_INS_FSETPM, "fsetpm" }, { X86_INS_FSINCOS, "fsincos" }, { X86_INS_FNSTENV, "fnstenv" }, { X86_INS_FXAM, "fxam" }, { X86_INS_FXRSTOR, "fxrstor" }, { X86_INS_FXRSTOR64, "fxrstor64" }, { X86_INS_FXSAVE, "fxsave" }, { X86_INS_FXSAVE64, "fxsave64" }, { X86_INS_FXTRACT, "fxtract" }, { X86_INS_FYL2X, "fyl2x" }, { X86_INS_FYL2XP1, "fyl2xp1" }, { X86_INS_MOVAPD, "movapd" }, { X86_INS_MOVAPS, "movaps" }, { X86_INS_ORPD, "orpd" }, { X86_INS_ORPS, "orps" }, { X86_INS_VMOVAPD, "vmovapd" }, { X86_INS_VMOVAPS, "vmovaps" }, { X86_INS_XORPD, "xorpd" }, { X86_INS_XORPS, "xorps" }, { X86_INS_GETSEC, "getsec" }, { X86_INS_HADDPD, "haddpd" }, { X86_INS_HADDPS, "haddps" }, { X86_INS_HLT, "hlt" }, { X86_INS_HSUBPD, "hsubpd" }, { X86_INS_HSUBPS, "hsubps" }, { X86_INS_IDIV, "idiv" }, { X86_INS_FILD, "fild" }, { X86_INS_IMUL, "imul" }, { X86_INS_IN, "in" }, { X86_INS_INC, "inc" }, { X86_INS_INSB, "insb" }, { X86_INS_INSERTPS, "insertps" }, { X86_INS_INSERTQ, "insertq" }, { X86_INS_INSD, "insd" }, { X86_INS_INSW, "insw" }, { X86_INS_INT, "int" }, { X86_INS_INT1, "int1" }, { X86_INS_INT3, "int3" }, { X86_INS_INTO, "into" }, { X86_INS_INVD, "invd" }, { X86_INS_INVEPT, "invept" }, { X86_INS_INVLPG, "invlpg" }, { X86_INS_INVLPGA, "invlpga" }, { X86_INS_INVPCID, "invpcid" }, { X86_INS_INVVPID, "invvpid" }, { X86_INS_IRET, "iret" }, { X86_INS_IRETD, "iretd" }, { X86_INS_IRETQ, "iretq" }, { X86_INS_FISTTP, "fisttp" }, { X86_INS_FIST, "fist" }, { X86_INS_FISTP, "fistp" }, { X86_INS_UCOMISD, "ucomisd" }, { X86_INS_UCOMISS, "ucomiss" }, { X86_INS_VCOMISD, "vcomisd" }, { X86_INS_VCOMISS, "vcomiss" }, { X86_INS_VCVTSD2SS, "vcvtsd2ss" }, { X86_INS_VCVTSI2SD, "vcvtsi2sd" }, { X86_INS_VCVTSI2SS, "vcvtsi2ss" }, { X86_INS_VCVTSS2SD, "vcvtss2sd" }, { X86_INS_VCVTTSD2SI, "vcvttsd2si" }, { X86_INS_VCVTTSD2USI, "vcvttsd2usi" }, { X86_INS_VCVTTSS2SI, "vcvttss2si" }, { X86_INS_VCVTTSS2USI, "vcvttss2usi" }, { X86_INS_VCVTUSI2SD, "vcvtusi2sd" }, { X86_INS_VCVTUSI2SS, "vcvtusi2ss" }, { X86_INS_VUCOMISD, "vucomisd" }, { X86_INS_VUCOMISS, "vucomiss" }, { X86_INS_JAE, "jae" }, { X86_INS_JA, "ja" }, { X86_INS_JBE, "jbe" }, { X86_INS_JB, "jb" }, { X86_INS_JCXZ, "jcxz" }, { X86_INS_JECXZ, "jecxz" }, { X86_INS_JE, "je" }, { X86_INS_JGE, "jge" }, { X86_INS_JG, "jg" }, { X86_INS_JLE, "jle" }, { X86_INS_JL, "jl" }, { X86_INS_JMP, "jmp" }, { X86_INS_JNE, "jne" }, { X86_INS_JNO, "jno" }, { X86_INS_JNP, "jnp" }, { X86_INS_JNS, "jns" }, { X86_INS_JO, "jo" }, { X86_INS_JP, "jp" }, { X86_INS_JRCXZ, "jrcxz" }, { X86_INS_JS, "js" }, { X86_INS_KANDB, "kandb" }, { X86_INS_KANDD, "kandd" }, { X86_INS_KANDNB, "kandnb" }, { X86_INS_KANDND, "kandnd" }, { X86_INS_KANDNQ, "kandnq" }, { X86_INS_KANDNW, "kandnw" }, { X86_INS_KANDQ, "kandq" }, { X86_INS_KANDW, "kandw" }, { X86_INS_KMOVB, "kmovb" }, { X86_INS_KMOVD, "kmovd" }, { X86_INS_KMOVQ, "kmovq" }, { X86_INS_KMOVW, "kmovw" }, { X86_INS_KNOTB, "knotb" }, { X86_INS_KNOTD, "knotd" }, { X86_INS_KNOTQ, "knotq" }, { X86_INS_KNOTW, "knotw" }, { X86_INS_KORB, "korb" }, { X86_INS_KORD, "kord" }, { X86_INS_KORQ, "korq" }, { X86_INS_KORTESTB, "kortestb" }, { X86_INS_KORTESTD, "kortestd" }, { X86_INS_KORTESTQ, "kortestq" }, { X86_INS_KORTESTW, "kortestw" }, { X86_INS_KORW, "korw" }, { X86_INS_KSHIFTLB, "kshiftlb" }, { X86_INS_KSHIFTLD, "kshiftld" }, { X86_INS_KSHIFTLQ, "kshiftlq" }, { X86_INS_KSHIFTLW, "kshiftlw" }, { X86_INS_KSHIFTRB, "kshiftrb" }, { X86_INS_KSHIFTRD, "kshiftrd" }, { X86_INS_KSHIFTRQ, "kshiftrq" }, { X86_INS_KSHIFTRW, "kshiftrw" }, { X86_INS_KUNPCKBW, "kunpckbw" }, { X86_INS_KXNORB, "kxnorb" }, { X86_INS_KXNORD, "kxnord" }, { X86_INS_KXNORQ, "kxnorq" }, { X86_INS_KXNORW, "kxnorw" }, { X86_INS_KXORB, "kxorb" }, { X86_INS_KXORD, "kxord" }, { X86_INS_KXORQ, "kxorq" }, { X86_INS_KXORW, "kxorw" }, { X86_INS_LAHF, "lahf" }, { X86_INS_LAR, "lar" }, { X86_INS_LDDQU, "lddqu" }, { X86_INS_LDMXCSR, "ldmxcsr" }, { X86_INS_LDS, "lds" }, { X86_INS_FLDZ, "fldz" }, { X86_INS_FLD1, "fld1" }, { X86_INS_FLD, "fld" }, { X86_INS_LEA, "lea" }, { X86_INS_LEAVE, "leave" }, { X86_INS_LES, "les" }, { X86_INS_LFENCE, "lfence" }, { X86_INS_LFS, "lfs" }, { X86_INS_LGDT, "lgdt" }, { X86_INS_LGS, "lgs" }, { X86_INS_LIDT, "lidt" }, { X86_INS_LLDT, "lldt" }, { X86_INS_LMSW, "lmsw" }, { X86_INS_OR, "or" }, { X86_INS_SUB, "sub" }, { X86_INS_XOR, "xor" }, { X86_INS_LODSB, "lodsb" }, { X86_INS_LODSD, "lodsd" }, { X86_INS_LODSQ, "lodsq" }, { X86_INS_LODSW, "lodsw" }, { X86_INS_LOOP, "loop" }, { X86_INS_LOOPE, "loope" }, { X86_INS_LOOPNE, "loopne" }, { X86_INS_RETF, "retf" }, { X86_INS_RETFQ, "retfq" }, { X86_INS_LSL, "lsl" }, { X86_INS_LSS, "lss" }, { X86_INS_LTR, "ltr" }, { X86_INS_XADD, "xadd" }, { X86_INS_LZCNT, "lzcnt" }, { X86_INS_MASKMOVDQU, "maskmovdqu" }, { X86_INS_MAXPD, "maxpd" }, { X86_INS_MAXPS, "maxps" }, { X86_INS_MAXSD, "maxsd" }, { X86_INS_MAXSS, "maxss" }, { X86_INS_MFENCE, "mfence" }, { X86_INS_MINPD, "minpd" }, { X86_INS_MINPS, "minps" }, { X86_INS_MINSD, "minsd" }, { X86_INS_MINSS, "minss" }, { X86_INS_CVTPD2PI, "cvtpd2pi" }, { X86_INS_CVTPI2PD, "cvtpi2pd" }, { X86_INS_CVTPI2PS, "cvtpi2ps" }, { X86_INS_CVTPS2PI, "cvtps2pi" }, { X86_INS_CVTTPD2PI, "cvttpd2pi" }, { X86_INS_CVTTPS2PI, "cvttps2pi" }, { X86_INS_EMMS, "emms" }, { X86_INS_MASKMOVQ, "maskmovq" }, { X86_INS_MOVD, "movd" }, { X86_INS_MOVDQ2Q, "movdq2q" }, { X86_INS_MOVNTQ, "movntq" }, { X86_INS_MOVQ2DQ, "movq2dq" }, { X86_INS_MOVQ, "movq" }, { X86_INS_PABSB, "pabsb" }, { X86_INS_PABSD, "pabsd" }, { X86_INS_PABSW, "pabsw" }, { X86_INS_PACKSSDW, "packssdw" }, { X86_INS_PACKSSWB, "packsswb" }, { X86_INS_PACKUSWB, "packuswb" }, { X86_INS_PADDB, "paddb" }, { X86_INS_PADDD, "paddd" }, { X86_INS_PADDQ, "paddq" }, { X86_INS_PADDSB, "paddsb" }, { X86_INS_PADDSW, "paddsw" }, { X86_INS_PADDUSB, "paddusb" }, { X86_INS_PADDUSW, "paddusw" }, { X86_INS_PADDW, "paddw" }, { X86_INS_PALIGNR, "palignr" }, { X86_INS_PANDN, "pandn" }, { X86_INS_PAND, "pand" }, { X86_INS_PAVGB, "pavgb" }, { X86_INS_PAVGW, "pavgw" }, { X86_INS_PCMPEQB, "pcmpeqb" }, { X86_INS_PCMPEQD, "pcmpeqd" }, { X86_INS_PCMPEQW, "pcmpeqw" }, { X86_INS_PCMPGTB, "pcmpgtb" }, { X86_INS_PCMPGTD, "pcmpgtd" }, { X86_INS_PCMPGTW, "pcmpgtw" }, { X86_INS_PEXTRW, "pextrw" }, { X86_INS_PHADDSW, "phaddsw" }, { X86_INS_PHADDW, "phaddw" }, { X86_INS_PHADDD, "phaddd" }, { X86_INS_PHSUBD, "phsubd" }, { X86_INS_PHSUBSW, "phsubsw" }, { X86_INS_PHSUBW, "phsubw" }, { X86_INS_PINSRW, "pinsrw" }, { X86_INS_PMADDUBSW, "pmaddubsw" }, { X86_INS_PMADDWD, "pmaddwd" }, { X86_INS_PMAXSW, "pmaxsw" }, { X86_INS_PMAXUB, "pmaxub" }, { X86_INS_PMINSW, "pminsw" }, { X86_INS_PMINUB, "pminub" }, { X86_INS_PMOVMSKB, "pmovmskb" }, { X86_INS_PMULHRSW, "pmulhrsw" }, { X86_INS_PMULHUW, "pmulhuw" }, { X86_INS_PMULHW, "pmulhw" }, { X86_INS_PMULLW, "pmullw" }, { X86_INS_PMULUDQ, "pmuludq" }, { X86_INS_POR, "por" }, { X86_INS_PSADBW, "psadbw" }, { X86_INS_PSHUFB, "pshufb" }, { X86_INS_PSHUFW, "pshufw" }, { X86_INS_PSIGNB, "psignb" }, { X86_INS_PSIGND, "psignd" }, { X86_INS_PSIGNW, "psignw" }, { X86_INS_PSLLD, "pslld" }, { X86_INS_PSLLQ, "psllq" }, { X86_INS_PSLLW, "psllw" }, { X86_INS_PSRAD, "psrad" }, { X86_INS_PSRAW, "psraw" }, { X86_INS_PSRLD, "psrld" }, { X86_INS_PSRLQ, "psrlq" }, { X86_INS_PSRLW, "psrlw" }, { X86_INS_PSUBB, "psubb" }, { X86_INS_PSUBD, "psubd" }, { X86_INS_PSUBQ, "psubq" }, { X86_INS_PSUBSB, "psubsb" }, { X86_INS_PSUBSW, "psubsw" }, { X86_INS_PSUBUSB, "psubusb" }, { X86_INS_PSUBUSW, "psubusw" }, { X86_INS_PSUBW, "psubw" }, { X86_INS_PUNPCKHBW, "punpckhbw" }, { X86_INS_PUNPCKHDQ, "punpckhdq" }, { X86_INS_PUNPCKHWD, "punpckhwd" }, { X86_INS_PUNPCKLBW, "punpcklbw" }, { X86_INS_PUNPCKLDQ, "punpckldq" }, { X86_INS_PUNPCKLWD, "punpcklwd" }, { X86_INS_PXOR, "pxor" }, { X86_INS_MONITOR, "monitor" }, { X86_INS_MONTMUL, "montmul" }, { X86_INS_MOV, "mov" }, { X86_INS_MOVABS, "movabs" }, { X86_INS_MOVBE, "movbe" }, { X86_INS_MOVDDUP, "movddup" }, { X86_INS_MOVDQA, "movdqa" }, { X86_INS_MOVDQU, "movdqu" }, { X86_INS_MOVHLPS, "movhlps" }, { X86_INS_MOVHPD, "movhpd" }, { X86_INS_MOVHPS, "movhps" }, { X86_INS_MOVLHPS, "movlhps" }, { X86_INS_MOVLPD, "movlpd" }, { X86_INS_MOVLPS, "movlps" }, { X86_INS_MOVMSKPD, "movmskpd" }, { X86_INS_MOVMSKPS, "movmskps" }, { X86_INS_MOVNTDQA, "movntdqa" }, { X86_INS_MOVNTDQ, "movntdq" }, { X86_INS_MOVNTI, "movnti" }, { X86_INS_MOVNTPD, "movntpd" }, { X86_INS_MOVNTPS, "movntps" }, { X86_INS_MOVNTSD, "movntsd" }, { X86_INS_MOVNTSS, "movntss" }, { X86_INS_MOVSB, "movsb" }, { X86_INS_MOVSD, "movsd" }, { X86_INS_MOVSHDUP, "movshdup" }, { X86_INS_MOVSLDUP, "movsldup" }, { X86_INS_MOVSQ, "movsq" }, { X86_INS_MOVSS, "movss" }, { X86_INS_MOVSW, "movsw" }, { X86_INS_MOVSX, "movsx" }, { X86_INS_MOVSXD, "movsxd" }, { X86_INS_MOVUPD, "movupd" }, { X86_INS_MOVUPS, "movups" }, { X86_INS_MOVZX, "movzx" }, { X86_INS_MPSADBW, "mpsadbw" }, { X86_INS_MUL, "mul" }, { X86_INS_MULPD, "mulpd" }, { X86_INS_MULPS, "mulps" }, { X86_INS_MULSD, "mulsd" }, { X86_INS_MULSS, "mulss" }, { X86_INS_MULX, "mulx" }, { X86_INS_FMUL, "fmul" }, { X86_INS_FIMUL, "fimul" }, { X86_INS_FMULP, "fmulp" }, { X86_INS_MWAIT, "mwait" }, { X86_INS_NEG, "neg" }, { X86_INS_NOP, "nop" }, { X86_INS_NOT, "not" }, { X86_INS_OUT, "out" }, { X86_INS_OUTSB, "outsb" }, { X86_INS_OUTSD, "outsd" }, { X86_INS_OUTSW, "outsw" }, { X86_INS_PACKUSDW, "packusdw" }, { X86_INS_PAUSE, "pause" }, { X86_INS_PAVGUSB, "pavgusb" }, { X86_INS_PBLENDVB, "pblendvb" }, { X86_INS_PBLENDW, "pblendw" }, { X86_INS_PCLMULQDQ, "pclmulqdq" }, { X86_INS_PCMPEQQ, "pcmpeqq" }, { X86_INS_PCMPESTRI, "pcmpestri" }, { X86_INS_PCMPESTRM, "pcmpestrm" }, { X86_INS_PCMPGTQ, "pcmpgtq" }, { X86_INS_PCMPISTRI, "pcmpistri" }, { X86_INS_PCMPISTRM, "pcmpistrm" }, { X86_INS_PCOMMIT, "pcommit" }, { X86_INS_PDEP, "pdep" }, { X86_INS_PEXT, "pext" }, { X86_INS_PEXTRB, "pextrb" }, { X86_INS_PEXTRD, "pextrd" }, { X86_INS_PEXTRQ, "pextrq" }, { X86_INS_PF2ID, "pf2id" }, { X86_INS_PF2IW, "pf2iw" }, { X86_INS_PFACC, "pfacc" }, { X86_INS_PFADD, "pfadd" }, { X86_INS_PFCMPEQ, "pfcmpeq" }, { X86_INS_PFCMPGE, "pfcmpge" }, { X86_INS_PFCMPGT, "pfcmpgt" }, { X86_INS_PFMAX, "pfmax" }, { X86_INS_PFMIN, "pfmin" }, { X86_INS_PFMUL, "pfmul" }, { X86_INS_PFNACC, "pfnacc" }, { X86_INS_PFPNACC, "pfpnacc" }, { X86_INS_PFRCPIT1, "pfrcpit1" }, { X86_INS_PFRCPIT2, "pfrcpit2" }, { X86_INS_PFRCP, "pfrcp" }, { X86_INS_PFRSQIT1, "pfrsqit1" }, { X86_INS_PFRSQRT, "pfrsqrt" }, { X86_INS_PFSUBR, "pfsubr" }, { X86_INS_PFSUB, "pfsub" }, { X86_INS_PHMINPOSUW, "phminposuw" }, { X86_INS_PI2FD, "pi2fd" }, { X86_INS_PI2FW, "pi2fw" }, { X86_INS_PINSRB, "pinsrb" }, { X86_INS_PINSRD, "pinsrd" }, { X86_INS_PINSRQ, "pinsrq" }, { X86_INS_PMAXSB, "pmaxsb" }, { X86_INS_PMAXSD, "pmaxsd" }, { X86_INS_PMAXUD, "pmaxud" }, { X86_INS_PMAXUW, "pmaxuw" }, { X86_INS_PMINSB, "pminsb" }, { X86_INS_PMINSD, "pminsd" }, { X86_INS_PMINUD, "pminud" }, { X86_INS_PMINUW, "pminuw" }, { X86_INS_PMOVSXBD, "pmovsxbd" }, { X86_INS_PMOVSXBQ, "pmovsxbq" }, { X86_INS_PMOVSXBW, "pmovsxbw" }, { X86_INS_PMOVSXDQ, "pmovsxdq" }, { X86_INS_PMOVSXWD, "pmovsxwd" }, { X86_INS_PMOVSXWQ, "pmovsxwq" }, { X86_INS_PMOVZXBD, "pmovzxbd" }, { X86_INS_PMOVZXBQ, "pmovzxbq" }, { X86_INS_PMOVZXBW, "pmovzxbw" }, { X86_INS_PMOVZXDQ, "pmovzxdq" }, { X86_INS_PMOVZXWD, "pmovzxwd" }, { X86_INS_PMOVZXWQ, "pmovzxwq" }, { X86_INS_PMULDQ, "pmuldq" }, { X86_INS_PMULHRW, "pmulhrw" }, { X86_INS_PMULLD, "pmulld" }, { X86_INS_POP, "pop" }, { X86_INS_POPAW, "popaw" }, { X86_INS_POPAL, "popal" }, { X86_INS_POPCNT, "popcnt" }, { X86_INS_POPF, "popf" }, { X86_INS_POPFD, "popfd" }, { X86_INS_POPFQ, "popfq" }, { X86_INS_PREFETCH, "prefetch" }, { X86_INS_PREFETCHNTA, "prefetchnta" }, { X86_INS_PREFETCHT0, "prefetcht0" }, { X86_INS_PREFETCHT1, "prefetcht1" }, { X86_INS_PREFETCHT2, "prefetcht2" }, { X86_INS_PREFETCHW, "prefetchw" }, { X86_INS_PSHUFD, "pshufd" }, { X86_INS_PSHUFHW, "pshufhw" }, { X86_INS_PSHUFLW, "pshuflw" }, { X86_INS_PSLLDQ, "pslldq" }, { X86_INS_PSRLDQ, "psrldq" }, { X86_INS_PSWAPD, "pswapd" }, { X86_INS_PTEST, "ptest" }, { X86_INS_PUNPCKHQDQ, "punpckhqdq" }, { X86_INS_PUNPCKLQDQ, "punpcklqdq" }, { X86_INS_PUSH, "push" }, { X86_INS_PUSHAW, "pushaw" }, { X86_INS_PUSHAL, "pushal" }, { X86_INS_PUSHF, "pushf" }, { X86_INS_PUSHFD, "pushfd" }, { X86_INS_PUSHFQ, "pushfq" }, { X86_INS_RCL, "rcl" }, { X86_INS_RCPPS, "rcpps" }, { X86_INS_RCPSS, "rcpss" }, { X86_INS_RCR, "rcr" }, { X86_INS_RDFSBASE, "rdfsbase" }, { X86_INS_RDGSBASE, "rdgsbase" }, { X86_INS_RDMSR, "rdmsr" }, { X86_INS_RDPMC, "rdpmc" }, { X86_INS_RDRAND, "rdrand" }, { X86_INS_RDSEED, "rdseed" }, { X86_INS_RDTSC, "rdtsc" }, { X86_INS_RDTSCP, "rdtscp" }, { X86_INS_ROL, "rol" }, { X86_INS_ROR, "ror" }, { X86_INS_RORX, "rorx" }, { X86_INS_ROUNDPD, "roundpd" }, { X86_INS_ROUNDPS, "roundps" }, { X86_INS_ROUNDSD, "roundsd" }, { X86_INS_ROUNDSS, "roundss" }, { X86_INS_RSM, "rsm" }, { X86_INS_RSQRTPS, "rsqrtps" }, { X86_INS_RSQRTSS, "rsqrtss" }, { X86_INS_SAHF, "sahf" }, { X86_INS_SAL, "sal" }, { X86_INS_SALC, "salc" }, { X86_INS_SAR, "sar" }, { X86_INS_SARX, "sarx" }, { X86_INS_SBB, "sbb" }, { X86_INS_SCASB, "scasb" }, { X86_INS_SCASD, "scasd" }, { X86_INS_SCASQ, "scasq" }, { X86_INS_SCASW, "scasw" }, { X86_INS_SETAE, "setae" }, { X86_INS_SETA, "seta" }, { X86_INS_SETBE, "setbe" }, { X86_INS_SETB, "setb" }, { X86_INS_SETE, "sete" }, { X86_INS_SETGE, "setge" }, { X86_INS_SETG, "setg" }, { X86_INS_SETLE, "setle" }, { X86_INS_SETL, "setl" }, { X86_INS_SETNE, "setne" }, { X86_INS_SETNO, "setno" }, { X86_INS_SETNP, "setnp" }, { X86_INS_SETNS, "setns" }, { X86_INS_SETO, "seto" }, { X86_INS_SETP, "setp" }, { X86_INS_SETS, "sets" }, { X86_INS_SFENCE, "sfence" }, { X86_INS_SGDT, "sgdt" }, { X86_INS_SHA1MSG1, "sha1msg1" }, { X86_INS_SHA1MSG2, "sha1msg2" }, { X86_INS_SHA1NEXTE, "sha1nexte" }, { X86_INS_SHA1RNDS4, "sha1rnds4" }, { X86_INS_SHA256MSG1, "sha256msg1" }, { X86_INS_SHA256MSG2, "sha256msg2" }, { X86_INS_SHA256RNDS2, "sha256rnds2" }, { X86_INS_SHL, "shl" }, { X86_INS_SHLD, "shld" }, { X86_INS_SHLX, "shlx" }, { X86_INS_SHR, "shr" }, { X86_INS_SHRD, "shrd" }, { X86_INS_SHRX, "shrx" }, { X86_INS_SHUFPD, "shufpd" }, { X86_INS_SHUFPS, "shufps" }, { X86_INS_SIDT, "sidt" }, { X86_INS_FSIN, "fsin" }, { X86_INS_SKINIT, "skinit" }, { X86_INS_SLDT, "sldt" }, { X86_INS_SMSW, "smsw" }, { X86_INS_SQRTPD, "sqrtpd" }, { X86_INS_SQRTPS, "sqrtps" }, { X86_INS_SQRTSD, "sqrtsd" }, { X86_INS_SQRTSS, "sqrtss" }, { X86_INS_FSQRT, "fsqrt" }, { X86_INS_STAC, "stac" }, { X86_INS_STC, "stc" }, { X86_INS_STD, "std" }, { X86_INS_STGI, "stgi" }, { X86_INS_STI, "sti" }, { X86_INS_STMXCSR, "stmxcsr" }, { X86_INS_STOSB, "stosb" }, { X86_INS_STOSD, "stosd" }, { X86_INS_STOSQ, "stosq" }, { X86_INS_STOSW, "stosw" }, { X86_INS_STR, "str" }, { X86_INS_FST, "fst" }, { X86_INS_FSTP, "fstp" }, { X86_INS_FSTPNCE, "fstpnce" }, { X86_INS_FXCH, "fxch" }, { X86_INS_SUBPD, "subpd" }, { X86_INS_SUBPS, "subps" }, { X86_INS_FSUBR, "fsubr" }, { X86_INS_FISUBR, "fisubr" }, { X86_INS_FSUBRP, "fsubrp" }, { X86_INS_SUBSD, "subsd" }, { X86_INS_SUBSS, "subss" }, { X86_INS_FSUB, "fsub" }, { X86_INS_FISUB, "fisub" }, { X86_INS_FSUBP, "fsubp" }, { X86_INS_SWAPGS, "swapgs" }, { X86_INS_SYSCALL, "syscall" }, { X86_INS_SYSENTER, "sysenter" }, { X86_INS_SYSEXIT, "sysexit" }, { X86_INS_SYSRET, "sysret" }, { X86_INS_T1MSKC, "t1mskc" }, { X86_INS_TEST, "test" }, { X86_INS_UD2, "ud2" }, { X86_INS_FTST, "ftst" }, { X86_INS_TZCNT, "tzcnt" }, { X86_INS_TZMSK, "tzmsk" }, { X86_INS_FUCOMIP, "fucomip" }, { X86_INS_FUCOMI, "fucomi" }, { X86_INS_FUCOMPP, "fucompp" }, { X86_INS_FUCOMP, "fucomp" }, { X86_INS_FUCOM, "fucom" }, { X86_INS_UD2B, "ud2b" }, { X86_INS_UNPCKHPD, "unpckhpd" }, { X86_INS_UNPCKHPS, "unpckhps" }, { X86_INS_UNPCKLPD, "unpcklpd" }, { X86_INS_UNPCKLPS, "unpcklps" }, { X86_INS_VADDPD, "vaddpd" }, { X86_INS_VADDPS, "vaddps" }, { X86_INS_VADDSD, "vaddsd" }, { X86_INS_VADDSS, "vaddss" }, { X86_INS_VADDSUBPD, "vaddsubpd" }, { X86_INS_VADDSUBPS, "vaddsubps" }, { X86_INS_VAESDECLAST, "vaesdeclast" }, { X86_INS_VAESDEC, "vaesdec" }, { X86_INS_VAESENCLAST, "vaesenclast" }, { X86_INS_VAESENC, "vaesenc" }, { X86_INS_VAESIMC, "vaesimc" }, { X86_INS_VAESKEYGENASSIST, "vaeskeygenassist" }, { X86_INS_VALIGND, "valignd" }, { X86_INS_VALIGNQ, "valignq" }, { X86_INS_VANDNPD, "vandnpd" }, { X86_INS_VANDNPS, "vandnps" }, { X86_INS_VANDPD, "vandpd" }, { X86_INS_VANDPS, "vandps" }, { X86_INS_VBLENDMPD, "vblendmpd" }, { X86_INS_VBLENDMPS, "vblendmps" }, { X86_INS_VBLENDPD, "vblendpd" }, { X86_INS_VBLENDPS, "vblendps" }, { X86_INS_VBLENDVPD, "vblendvpd" }, { X86_INS_VBLENDVPS, "vblendvps" }, { X86_INS_VBROADCASTF128, "vbroadcastf128" }, { X86_INS_VBROADCASTI32X4, "vbroadcasti32x4" }, { X86_INS_VBROADCASTI64X4, "vbroadcasti64x4" }, { X86_INS_VBROADCASTSD, "vbroadcastsd" }, { X86_INS_VBROADCASTSS, "vbroadcastss" }, { X86_INS_VCOMPRESSPD, "vcompresspd" }, { X86_INS_VCOMPRESSPS, "vcompressps" }, { X86_INS_VCVTDQ2PD, "vcvtdq2pd" }, { X86_INS_VCVTDQ2PS, "vcvtdq2ps" }, { X86_INS_VCVTPD2DQX, "vcvtpd2dqx" }, { X86_INS_VCVTPD2DQ, "vcvtpd2dq" }, { X86_INS_VCVTPD2PSX, "vcvtpd2psx" }, { X86_INS_VCVTPD2PS, "vcvtpd2ps" }, { X86_INS_VCVTPD2UDQ, "vcvtpd2udq" }, { X86_INS_VCVTPH2PS, "vcvtph2ps" }, { X86_INS_VCVTPS2DQ, "vcvtps2dq" }, { X86_INS_VCVTPS2PD, "vcvtps2pd" }, { X86_INS_VCVTPS2PH, "vcvtps2ph" }, { X86_INS_VCVTPS2UDQ, "vcvtps2udq" }, { X86_INS_VCVTSD2SI, "vcvtsd2si" }, { X86_INS_VCVTSD2USI, "vcvtsd2usi" }, { X86_INS_VCVTSS2SI, "vcvtss2si" }, { X86_INS_VCVTSS2USI, "vcvtss2usi" }, { X86_INS_VCVTTPD2DQX, "vcvttpd2dqx" }, { X86_INS_VCVTTPD2DQ, "vcvttpd2dq" }, { X86_INS_VCVTTPD2UDQ, "vcvttpd2udq" }, { X86_INS_VCVTTPS2DQ, "vcvttps2dq" }, { X86_INS_VCVTTPS2UDQ, "vcvttps2udq" }, { X86_INS_VCVTUDQ2PD, "vcvtudq2pd" }, { X86_INS_VCVTUDQ2PS, "vcvtudq2ps" }, { X86_INS_VDIVPD, "vdivpd" }, { X86_INS_VDIVPS, "vdivps" }, { X86_INS_VDIVSD, "vdivsd" }, { X86_INS_VDIVSS, "vdivss" }, { X86_INS_VDPPD, "vdppd" }, { X86_INS_VDPPS, "vdpps" }, { X86_INS_VERR, "verr" }, { X86_INS_VERW, "verw" }, { X86_INS_VEXP2PD, "vexp2pd" }, { X86_INS_VEXP2PS, "vexp2ps" }, { X86_INS_VEXPANDPD, "vexpandpd" }, { X86_INS_VEXPANDPS, "vexpandps" }, { X86_INS_VEXTRACTF128, "vextractf128" }, { X86_INS_VEXTRACTF32X4, "vextractf32x4" }, { X86_INS_VEXTRACTF64X4, "vextractf64x4" }, { X86_INS_VEXTRACTI128, "vextracti128" }, { X86_INS_VEXTRACTI32X4, "vextracti32x4" }, { X86_INS_VEXTRACTI64X4, "vextracti64x4" }, { X86_INS_VEXTRACTPS, "vextractps" }, { X86_INS_VFMADD132PD, "vfmadd132pd" }, { X86_INS_VFMADD132PS, "vfmadd132ps" }, { X86_INS_VFMADDPD, "vfmaddpd" }, { X86_INS_VFMADD213PD, "vfmadd213pd" }, { X86_INS_VFMADD231PD, "vfmadd231pd" }, { X86_INS_VFMADDPS, "vfmaddps" }, { X86_INS_VFMADD213PS, "vfmadd213ps" }, { X86_INS_VFMADD231PS, "vfmadd231ps" }, { X86_INS_VFMADDSD, "vfmaddsd" }, { X86_INS_VFMADD213SD, "vfmadd213sd" }, { X86_INS_VFMADD132SD, "vfmadd132sd" }, { X86_INS_VFMADD231SD, "vfmadd231sd" }, { X86_INS_VFMADDSS, "vfmaddss" }, { X86_INS_VFMADD213SS, "vfmadd213ss" }, { X86_INS_VFMADD132SS, "vfmadd132ss" }, { X86_INS_VFMADD231SS, "vfmadd231ss" }, { X86_INS_VFMADDSUB132PD, "vfmaddsub132pd" }, { X86_INS_VFMADDSUB132PS, "vfmaddsub132ps" }, { X86_INS_VFMADDSUBPD, "vfmaddsubpd" }, { X86_INS_VFMADDSUB213PD, "vfmaddsub213pd" }, { X86_INS_VFMADDSUB231PD, "vfmaddsub231pd" }, { X86_INS_VFMADDSUBPS, "vfmaddsubps" }, { X86_INS_VFMADDSUB213PS, "vfmaddsub213ps" }, { X86_INS_VFMADDSUB231PS, "vfmaddsub231ps" }, { X86_INS_VFMSUB132PD, "vfmsub132pd" }, { X86_INS_VFMSUB132PS, "vfmsub132ps" }, { X86_INS_VFMSUBADD132PD, "vfmsubadd132pd" }, { X86_INS_VFMSUBADD132PS, "vfmsubadd132ps" }, { X86_INS_VFMSUBADDPD, "vfmsubaddpd" }, { X86_INS_VFMSUBADD213PD, "vfmsubadd213pd" }, { X86_INS_VFMSUBADD231PD, "vfmsubadd231pd" }, { X86_INS_VFMSUBADDPS, "vfmsubaddps" }, { X86_INS_VFMSUBADD213PS, "vfmsubadd213ps" }, { X86_INS_VFMSUBADD231PS, "vfmsubadd231ps" }, { X86_INS_VFMSUBPD, "vfmsubpd" }, { X86_INS_VFMSUB213PD, "vfmsub213pd" }, { X86_INS_VFMSUB231PD, "vfmsub231pd" }, { X86_INS_VFMSUBPS, "vfmsubps" }, { X86_INS_VFMSUB213PS, "vfmsub213ps" }, { X86_INS_VFMSUB231PS, "vfmsub231ps" }, { X86_INS_VFMSUBSD, "vfmsubsd" }, { X86_INS_VFMSUB213SD, "vfmsub213sd" }, { X86_INS_VFMSUB132SD, "vfmsub132sd" }, { X86_INS_VFMSUB231SD, "vfmsub231sd" }, { X86_INS_VFMSUBSS, "vfmsubss" }, { X86_INS_VFMSUB213SS, "vfmsub213ss" }, { X86_INS_VFMSUB132SS, "vfmsub132ss" }, { X86_INS_VFMSUB231SS, "vfmsub231ss" }, { X86_INS_VFNMADD132PD, "vfnmadd132pd" }, { X86_INS_VFNMADD132PS, "vfnmadd132ps" }, { X86_INS_VFNMADDPD, "vfnmaddpd" }, { X86_INS_VFNMADD213PD, "vfnmadd213pd" }, { X86_INS_VFNMADD231PD, "vfnmadd231pd" }, { X86_INS_VFNMADDPS, "vfnmaddps" }, { X86_INS_VFNMADD213PS, "vfnmadd213ps" }, { X86_INS_VFNMADD231PS, "vfnmadd231ps" }, { X86_INS_VFNMADDSD, "vfnmaddsd" }, { X86_INS_VFNMADD213SD, "vfnmadd213sd" }, { X86_INS_VFNMADD132SD, "vfnmadd132sd" }, { X86_INS_VFNMADD231SD, "vfnmadd231sd" }, { X86_INS_VFNMADDSS, "vfnmaddss" }, { X86_INS_VFNMADD213SS, "vfnmadd213ss" }, { X86_INS_VFNMADD132SS, "vfnmadd132ss" }, { X86_INS_VFNMADD231SS, "vfnmadd231ss" }, { X86_INS_VFNMSUB132PD, "vfnmsub132pd" }, { X86_INS_VFNMSUB132PS, "vfnmsub132ps" }, { X86_INS_VFNMSUBPD, "vfnmsubpd" }, { X86_INS_VFNMSUB213PD, "vfnmsub213pd" }, { X86_INS_VFNMSUB231PD, "vfnmsub231pd" }, { X86_INS_VFNMSUBPS, "vfnmsubps" }, { X86_INS_VFNMSUB213PS, "vfnmsub213ps" }, { X86_INS_VFNMSUB231PS, "vfnmsub231ps" }, { X86_INS_VFNMSUBSD, "vfnmsubsd" }, { X86_INS_VFNMSUB213SD, "vfnmsub213sd" }, { X86_INS_VFNMSUB132SD, "vfnmsub132sd" }, { X86_INS_VFNMSUB231SD, "vfnmsub231sd" }, { X86_INS_VFNMSUBSS, "vfnmsubss" }, { X86_INS_VFNMSUB213SS, "vfnmsub213ss" }, { X86_INS_VFNMSUB132SS, "vfnmsub132ss" }, { X86_INS_VFNMSUB231SS, "vfnmsub231ss" }, { X86_INS_VFRCZPD, "vfrczpd" }, { X86_INS_VFRCZPS, "vfrczps" }, { X86_INS_VFRCZSD, "vfrczsd" }, { X86_INS_VFRCZSS, "vfrczss" }, { X86_INS_VORPD, "vorpd" }, { X86_INS_VORPS, "vorps" }, { X86_INS_VXORPD, "vxorpd" }, { X86_INS_VXORPS, "vxorps" }, { X86_INS_VGATHERDPD, "vgatherdpd" }, { X86_INS_VGATHERDPS, "vgatherdps" }, { X86_INS_VGATHERPF0DPD, "vgatherpf0dpd" }, { X86_INS_VGATHERPF0DPS, "vgatherpf0dps" }, { X86_INS_VGATHERPF0QPD, "vgatherpf0qpd" }, { X86_INS_VGATHERPF0QPS, "vgatherpf0qps" }, { X86_INS_VGATHERPF1DPD, "vgatherpf1dpd" }, { X86_INS_VGATHERPF1DPS, "vgatherpf1dps" }, { X86_INS_VGATHERPF1QPD, "vgatherpf1qpd" }, { X86_INS_VGATHERPF1QPS, "vgatherpf1qps" }, { X86_INS_VGATHERQPD, "vgatherqpd" }, { X86_INS_VGATHERQPS, "vgatherqps" }, { X86_INS_VHADDPD, "vhaddpd" }, { X86_INS_VHADDPS, "vhaddps" }, { X86_INS_VHSUBPD, "vhsubpd" }, { X86_INS_VHSUBPS, "vhsubps" }, { X86_INS_VINSERTF128, "vinsertf128" }, { X86_INS_VINSERTF32X4, "vinsertf32x4" }, { X86_INS_VINSERTF32X8, "vinsertf32x8" }, { X86_INS_VINSERTF64X2, "vinsertf64x2" }, { X86_INS_VINSERTF64X4, "vinsertf64x4" }, { X86_INS_VINSERTI128, "vinserti128" }, { X86_INS_VINSERTI32X4, "vinserti32x4" }, { X86_INS_VINSERTI32X8, "vinserti32x8" }, { X86_INS_VINSERTI64X2, "vinserti64x2" }, { X86_INS_VINSERTI64X4, "vinserti64x4" }, { X86_INS_VINSERTPS, "vinsertps" }, { X86_INS_VLDDQU, "vlddqu" }, { X86_INS_VLDMXCSR, "vldmxcsr" }, { X86_INS_VMASKMOVDQU, "vmaskmovdqu" }, { X86_INS_VMASKMOVPD, "vmaskmovpd" }, { X86_INS_VMASKMOVPS, "vmaskmovps" }, { X86_INS_VMAXPD, "vmaxpd" }, { X86_INS_VMAXPS, "vmaxps" }, { X86_INS_VMAXSD, "vmaxsd" }, { X86_INS_VMAXSS, "vmaxss" }, { X86_INS_VMCALL, "vmcall" }, { X86_INS_VMCLEAR, "vmclear" }, { X86_INS_VMFUNC, "vmfunc" }, { X86_INS_VMINPD, "vminpd" }, { X86_INS_VMINPS, "vminps" }, { X86_INS_VMINSD, "vminsd" }, { X86_INS_VMINSS, "vminss" }, { X86_INS_VMLAUNCH, "vmlaunch" }, { X86_INS_VMLOAD, "vmload" }, { X86_INS_VMMCALL, "vmmcall" }, { X86_INS_VMOVQ, "vmovq" }, { X86_INS_VMOVDDUP, "vmovddup" }, { X86_INS_VMOVD, "vmovd" }, { X86_INS_VMOVDQA32, "vmovdqa32" }, { X86_INS_VMOVDQA64, "vmovdqa64" }, { X86_INS_VMOVDQA, "vmovdqa" }, { X86_INS_VMOVDQU16, "vmovdqu16" }, { X86_INS_VMOVDQU32, "vmovdqu32" }, { X86_INS_VMOVDQU64, "vmovdqu64" }, { X86_INS_VMOVDQU8, "vmovdqu8" }, { X86_INS_VMOVDQU, "vmovdqu" }, { X86_INS_VMOVHLPS, "vmovhlps" }, { X86_INS_VMOVHPD, "vmovhpd" }, { X86_INS_VMOVHPS, "vmovhps" }, { X86_INS_VMOVLHPS, "vmovlhps" }, { X86_INS_VMOVLPD, "vmovlpd" }, { X86_INS_VMOVLPS, "vmovlps" }, { X86_INS_VMOVMSKPD, "vmovmskpd" }, { X86_INS_VMOVMSKPS, "vmovmskps" }, { X86_INS_VMOVNTDQA, "vmovntdqa" }, { X86_INS_VMOVNTDQ, "vmovntdq" }, { X86_INS_VMOVNTPD, "vmovntpd" }, { X86_INS_VMOVNTPS, "vmovntps" }, { X86_INS_VMOVSD, "vmovsd" }, { X86_INS_VMOVSHDUP, "vmovshdup" }, { X86_INS_VMOVSLDUP, "vmovsldup" }, { X86_INS_VMOVSS, "vmovss" }, { X86_INS_VMOVUPD, "vmovupd" }, { X86_INS_VMOVUPS, "vmovups" }, { X86_INS_VMPSADBW, "vmpsadbw" }, { X86_INS_VMPTRLD, "vmptrld" }, { X86_INS_VMPTRST, "vmptrst" }, { X86_INS_VMREAD, "vmread" }, { X86_INS_VMRESUME, "vmresume" }, { X86_INS_VMRUN, "vmrun" }, { X86_INS_VMSAVE, "vmsave" }, { X86_INS_VMULPD, "vmulpd" }, { X86_INS_VMULPS, "vmulps" }, { X86_INS_VMULSD, "vmulsd" }, { X86_INS_VMULSS, "vmulss" }, { X86_INS_VMWRITE, "vmwrite" }, { X86_INS_VMXOFF, "vmxoff" }, { X86_INS_VMXON, "vmxon" }, { X86_INS_VPABSB, "vpabsb" }, { X86_INS_VPABSD, "vpabsd" }, { X86_INS_VPABSQ, "vpabsq" }, { X86_INS_VPABSW, "vpabsw" }, { X86_INS_VPACKSSDW, "vpackssdw" }, { X86_INS_VPACKSSWB, "vpacksswb" }, { X86_INS_VPACKUSDW, "vpackusdw" }, { X86_INS_VPACKUSWB, "vpackuswb" }, { X86_INS_VPADDB, "vpaddb" }, { X86_INS_VPADDD, "vpaddd" }, { X86_INS_VPADDQ, "vpaddq" }, { X86_INS_VPADDSB, "vpaddsb" }, { X86_INS_VPADDSW, "vpaddsw" }, { X86_INS_VPADDUSB, "vpaddusb" }, { X86_INS_VPADDUSW, "vpaddusw" }, { X86_INS_VPADDW, "vpaddw" }, { X86_INS_VPALIGNR, "vpalignr" }, { X86_INS_VPANDD, "vpandd" }, { X86_INS_VPANDND, "vpandnd" }, { X86_INS_VPANDNQ, "vpandnq" }, { X86_INS_VPANDN, "vpandn" }, { X86_INS_VPANDQ, "vpandq" }, { X86_INS_VPAND, "vpand" }, { X86_INS_VPAVGB, "vpavgb" }, { X86_INS_VPAVGW, "vpavgw" }, { X86_INS_VPBLENDD, "vpblendd" }, { X86_INS_VPBLENDMB, "vpblendmb" }, { X86_INS_VPBLENDMD, "vpblendmd" }, { X86_INS_VPBLENDMQ, "vpblendmq" }, { X86_INS_VPBLENDMW, "vpblendmw" }, { X86_INS_VPBLENDVB, "vpblendvb" }, { X86_INS_VPBLENDW, "vpblendw" }, { X86_INS_VPBROADCASTB, "vpbroadcastb" }, { X86_INS_VPBROADCASTD, "vpbroadcastd" }, { X86_INS_VPBROADCASTMB2Q, "vpbroadcastmb2q" }, { X86_INS_VPBROADCASTMW2D, "vpbroadcastmw2d" }, { X86_INS_VPBROADCASTQ, "vpbroadcastq" }, { X86_INS_VPBROADCASTW, "vpbroadcastw" }, { X86_INS_VPCLMULQDQ, "vpclmulqdq" }, { X86_INS_VPCMOV, "vpcmov" }, { X86_INS_VPCMPB, "vpcmpb" }, { X86_INS_VPCMPD, "vpcmpd" }, { X86_INS_VPCMPEQB, "vpcmpeqb" }, { X86_INS_VPCMPEQD, "vpcmpeqd" }, { X86_INS_VPCMPEQQ, "vpcmpeqq" }, { X86_INS_VPCMPEQW, "vpcmpeqw" }, { X86_INS_VPCMPESTRI, "vpcmpestri" }, { X86_INS_VPCMPESTRM, "vpcmpestrm" }, { X86_INS_VPCMPGTB, "vpcmpgtb" }, { X86_INS_VPCMPGTD, "vpcmpgtd" }, { X86_INS_VPCMPGTQ, "vpcmpgtq" }, { X86_INS_VPCMPGTW, "vpcmpgtw" }, { X86_INS_VPCMPISTRI, "vpcmpistri" }, { X86_INS_VPCMPISTRM, "vpcmpistrm" }, { X86_INS_VPCMPQ, "vpcmpq" }, { X86_INS_VPCMPUB, "vpcmpub" }, { X86_INS_VPCMPUD, "vpcmpud" }, { X86_INS_VPCMPUQ, "vpcmpuq" }, { X86_INS_VPCMPUW, "vpcmpuw" }, { X86_INS_VPCMPW, "vpcmpw" }, { X86_INS_VPCOMB, "vpcomb" }, { X86_INS_VPCOMD, "vpcomd" }, { X86_INS_VPCOMPRESSD, "vpcompressd" }, { X86_INS_VPCOMPRESSQ, "vpcompressq" }, { X86_INS_VPCOMQ, "vpcomq" }, { X86_INS_VPCOMUB, "vpcomub" }, { X86_INS_VPCOMUD, "vpcomud" }, { X86_INS_VPCOMUQ, "vpcomuq" }, { X86_INS_VPCOMUW, "vpcomuw" }, { X86_INS_VPCOMW, "vpcomw" }, { X86_INS_VPCONFLICTD, "vpconflictd" }, { X86_INS_VPCONFLICTQ, "vpconflictq" }, { X86_INS_VPERM2F128, "vperm2f128" }, { X86_INS_VPERM2I128, "vperm2i128" }, { X86_INS_VPERMD, "vpermd" }, { X86_INS_VPERMI2D, "vpermi2d" }, { X86_INS_VPERMI2PD, "vpermi2pd" }, { X86_INS_VPERMI2PS, "vpermi2ps" }, { X86_INS_VPERMI2Q, "vpermi2q" }, { X86_INS_VPERMIL2PD, "vpermil2pd" }, { X86_INS_VPERMIL2PS, "vpermil2ps" }, { X86_INS_VPERMILPD, "vpermilpd" }, { X86_INS_VPERMILPS, "vpermilps" }, { X86_INS_VPERMPD, "vpermpd" }, { X86_INS_VPERMPS, "vpermps" }, { X86_INS_VPERMQ, "vpermq" }, { X86_INS_VPERMT2D, "vpermt2d" }, { X86_INS_VPERMT2PD, "vpermt2pd" }, { X86_INS_VPERMT2PS, "vpermt2ps" }, { X86_INS_VPERMT2Q, "vpermt2q" }, { X86_INS_VPEXPANDD, "vpexpandd" }, { X86_INS_VPEXPANDQ, "vpexpandq" }, { X86_INS_VPEXTRB, "vpextrb" }, { X86_INS_VPEXTRD, "vpextrd" }, { X86_INS_VPEXTRQ, "vpextrq" }, { X86_INS_VPEXTRW, "vpextrw" }, { X86_INS_VPGATHERDD, "vpgatherdd" }, { X86_INS_VPGATHERDQ, "vpgatherdq" }, { X86_INS_VPGATHERQD, "vpgatherqd" }, { X86_INS_VPGATHERQQ, "vpgatherqq" }, { X86_INS_VPHADDBD, "vphaddbd" }, { X86_INS_VPHADDBQ, "vphaddbq" }, { X86_INS_VPHADDBW, "vphaddbw" }, { X86_INS_VPHADDDQ, "vphadddq" }, { X86_INS_VPHADDD, "vphaddd" }, { X86_INS_VPHADDSW, "vphaddsw" }, { X86_INS_VPHADDUBD, "vphaddubd" }, { X86_INS_VPHADDUBQ, "vphaddubq" }, { X86_INS_VPHADDUBW, "vphaddubw" }, { X86_INS_VPHADDUDQ, "vphaddudq" }, { X86_INS_VPHADDUWD, "vphadduwd" }, { X86_INS_VPHADDUWQ, "vphadduwq" }, { X86_INS_VPHADDWD, "vphaddwd" }, { X86_INS_VPHADDWQ, "vphaddwq" }, { X86_INS_VPHADDW, "vphaddw" }, { X86_INS_VPHMINPOSUW, "vphminposuw" }, { X86_INS_VPHSUBBW, "vphsubbw" }, { X86_INS_VPHSUBDQ, "vphsubdq" }, { X86_INS_VPHSUBD, "vphsubd" }, { X86_INS_VPHSUBSW, "vphsubsw" }, { X86_INS_VPHSUBWD, "vphsubwd" }, { X86_INS_VPHSUBW, "vphsubw" }, { X86_INS_VPINSRB, "vpinsrb" }, { X86_INS_VPINSRD, "vpinsrd" }, { X86_INS_VPINSRQ, "vpinsrq" }, { X86_INS_VPINSRW, "vpinsrw" }, { X86_INS_VPLZCNTD, "vplzcntd" }, { X86_INS_VPLZCNTQ, "vplzcntq" }, { X86_INS_VPMACSDD, "vpmacsdd" }, { X86_INS_VPMACSDQH, "vpmacsdqh" }, { X86_INS_VPMACSDQL, "vpmacsdql" }, { X86_INS_VPMACSSDD, "vpmacssdd" }, { X86_INS_VPMACSSDQH, "vpmacssdqh" }, { X86_INS_VPMACSSDQL, "vpmacssdql" }, { X86_INS_VPMACSSWD, "vpmacsswd" }, { X86_INS_VPMACSSWW, "vpmacssww" }, { X86_INS_VPMACSWD, "vpmacswd" }, { X86_INS_VPMACSWW, "vpmacsww" }, { X86_INS_VPMADCSSWD, "vpmadcsswd" }, { X86_INS_VPMADCSWD, "vpmadcswd" }, { X86_INS_VPMADDUBSW, "vpmaddubsw" }, { X86_INS_VPMADDWD, "vpmaddwd" }, { X86_INS_VPMASKMOVD, "vpmaskmovd" }, { X86_INS_VPMASKMOVQ, "vpmaskmovq" }, { X86_INS_VPMAXSB, "vpmaxsb" }, { X86_INS_VPMAXSD, "vpmaxsd" }, { X86_INS_VPMAXSQ, "vpmaxsq" }, { X86_INS_VPMAXSW, "vpmaxsw" }, { X86_INS_VPMAXUB, "vpmaxub" }, { X86_INS_VPMAXUD, "vpmaxud" }, { X86_INS_VPMAXUQ, "vpmaxuq" }, { X86_INS_VPMAXUW, "vpmaxuw" }, { X86_INS_VPMINSB, "vpminsb" }, { X86_INS_VPMINSD, "vpminsd" }, { X86_INS_VPMINSQ, "vpminsq" }, { X86_INS_VPMINSW, "vpminsw" }, { X86_INS_VPMINUB, "vpminub" }, { X86_INS_VPMINUD, "vpminud" }, { X86_INS_VPMINUQ, "vpminuq" }, { X86_INS_VPMINUW, "vpminuw" }, { X86_INS_VPMOVDB, "vpmovdb" }, { X86_INS_VPMOVDW, "vpmovdw" }, { X86_INS_VPMOVM2B, "vpmovm2b" }, { X86_INS_VPMOVM2D, "vpmovm2d" }, { X86_INS_VPMOVM2Q, "vpmovm2q" }, { X86_INS_VPMOVM2W, "vpmovm2w" }, { X86_INS_VPMOVMSKB, "vpmovmskb" }, { X86_INS_VPMOVQB, "vpmovqb" }, { X86_INS_VPMOVQD, "vpmovqd" }, { X86_INS_VPMOVQW, "vpmovqw" }, { X86_INS_VPMOVSDB, "vpmovsdb" }, { X86_INS_VPMOVSDW, "vpmovsdw" }, { X86_INS_VPMOVSQB, "vpmovsqb" }, { X86_INS_VPMOVSQD, "vpmovsqd" }, { X86_INS_VPMOVSQW, "vpmovsqw" }, { X86_INS_VPMOVSXBD, "vpmovsxbd" }, { X86_INS_VPMOVSXBQ, "vpmovsxbq" }, { X86_INS_VPMOVSXBW, "vpmovsxbw" }, { X86_INS_VPMOVSXDQ, "vpmovsxdq" }, { X86_INS_VPMOVSXWD, "vpmovsxwd" }, { X86_INS_VPMOVSXWQ, "vpmovsxwq" }, { X86_INS_VPMOVUSDB, "vpmovusdb" }, { X86_INS_VPMOVUSDW, "vpmovusdw" }, { X86_INS_VPMOVUSQB, "vpmovusqb" }, { X86_INS_VPMOVUSQD, "vpmovusqd" }, { X86_INS_VPMOVUSQW, "vpmovusqw" }, { X86_INS_VPMOVZXBD, "vpmovzxbd" }, { X86_INS_VPMOVZXBQ, "vpmovzxbq" }, { X86_INS_VPMOVZXBW, "vpmovzxbw" }, { X86_INS_VPMOVZXDQ, "vpmovzxdq" }, { X86_INS_VPMOVZXWD, "vpmovzxwd" }, { X86_INS_VPMOVZXWQ, "vpmovzxwq" }, { X86_INS_VPMULDQ, "vpmuldq" }, { X86_INS_VPMULHRSW, "vpmulhrsw" }, { X86_INS_VPMULHUW, "vpmulhuw" }, { X86_INS_VPMULHW, "vpmulhw" }, { X86_INS_VPMULLD, "vpmulld" }, { X86_INS_VPMULLQ, "vpmullq" }, { X86_INS_VPMULLW, "vpmullw" }, { X86_INS_VPMULUDQ, "vpmuludq" }, { X86_INS_VPORD, "vpord" }, { X86_INS_VPORQ, "vporq" }, { X86_INS_VPOR, "vpor" }, { X86_INS_VPPERM, "vpperm" }, { X86_INS_VPROTB, "vprotb" }, { X86_INS_VPROTD, "vprotd" }, { X86_INS_VPROTQ, "vprotq" }, { X86_INS_VPROTW, "vprotw" }, { X86_INS_VPSADBW, "vpsadbw" }, { X86_INS_VPSCATTERDD, "vpscatterdd" }, { X86_INS_VPSCATTERDQ, "vpscatterdq" }, { X86_INS_VPSCATTERQD, "vpscatterqd" }, { X86_INS_VPSCATTERQQ, "vpscatterqq" }, { X86_INS_VPSHAB, "vpshab" }, { X86_INS_VPSHAD, "vpshad" }, { X86_INS_VPSHAQ, "vpshaq" }, { X86_INS_VPSHAW, "vpshaw" }, { X86_INS_VPSHLB, "vpshlb" }, { X86_INS_VPSHLD, "vpshld" }, { X86_INS_VPSHLQ, "vpshlq" }, { X86_INS_VPSHLW, "vpshlw" }, { X86_INS_VPSHUFB, "vpshufb" }, { X86_INS_VPSHUFD, "vpshufd" }, { X86_INS_VPSHUFHW, "vpshufhw" }, { X86_INS_VPSHUFLW, "vpshuflw" }, { X86_INS_VPSIGNB, "vpsignb" }, { X86_INS_VPSIGND, "vpsignd" }, { X86_INS_VPSIGNW, "vpsignw" }, { X86_INS_VPSLLDQ, "vpslldq" }, { X86_INS_VPSLLD, "vpslld" }, { X86_INS_VPSLLQ, "vpsllq" }, { X86_INS_VPSLLVD, "vpsllvd" }, { X86_INS_VPSLLVQ, "vpsllvq" }, { X86_INS_VPSLLW, "vpsllw" }, { X86_INS_VPSRAD, "vpsrad" }, { X86_INS_VPSRAQ, "vpsraq" }, { X86_INS_VPSRAVD, "vpsravd" }, { X86_INS_VPSRAVQ, "vpsravq" }, { X86_INS_VPSRAW, "vpsraw" }, { X86_INS_VPSRLDQ, "vpsrldq" }, { X86_INS_VPSRLD, "vpsrld" }, { X86_INS_VPSRLQ, "vpsrlq" }, { X86_INS_VPSRLVD, "vpsrlvd" }, { X86_INS_VPSRLVQ, "vpsrlvq" }, { X86_INS_VPSRLW, "vpsrlw" }, { X86_INS_VPSUBB, "vpsubb" }, { X86_INS_VPSUBD, "vpsubd" }, { X86_INS_VPSUBQ, "vpsubq" }, { X86_INS_VPSUBSB, "vpsubsb" }, { X86_INS_VPSUBSW, "vpsubsw" }, { X86_INS_VPSUBUSB, "vpsubusb" }, { X86_INS_VPSUBUSW, "vpsubusw" }, { X86_INS_VPSUBW, "vpsubw" }, { X86_INS_VPTESTMD, "vptestmd" }, { X86_INS_VPTESTMQ, "vptestmq" }, { X86_INS_VPTESTNMD, "vptestnmd" }, { X86_INS_VPTESTNMQ, "vptestnmq" }, { X86_INS_VPTEST, "vptest" }, { X86_INS_VPUNPCKHBW, "vpunpckhbw" }, { X86_INS_VPUNPCKHDQ, "vpunpckhdq" }, { X86_INS_VPUNPCKHQDQ, "vpunpckhqdq" }, { X86_INS_VPUNPCKHWD, "vpunpckhwd" }, { X86_INS_VPUNPCKLBW, "vpunpcklbw" }, { X86_INS_VPUNPCKLDQ, "vpunpckldq" }, { X86_INS_VPUNPCKLQDQ, "vpunpcklqdq" }, { X86_INS_VPUNPCKLWD, "vpunpcklwd" }, { X86_INS_VPXORD, "vpxord" }, { X86_INS_VPXORQ, "vpxorq" }, { X86_INS_VPXOR, "vpxor" }, { X86_INS_VRCP14PD, "vrcp14pd" }, { X86_INS_VRCP14PS, "vrcp14ps" }, { X86_INS_VRCP14SD, "vrcp14sd" }, { X86_INS_VRCP14SS, "vrcp14ss" }, { X86_INS_VRCP28PD, "vrcp28pd" }, { X86_INS_VRCP28PS, "vrcp28ps" }, { X86_INS_VRCP28SD, "vrcp28sd" }, { X86_INS_VRCP28SS, "vrcp28ss" }, { X86_INS_VRCPPS, "vrcpps" }, { X86_INS_VRCPSS, "vrcpss" }, { X86_INS_VRNDSCALEPD, "vrndscalepd" }, { X86_INS_VRNDSCALEPS, "vrndscaleps" }, { X86_INS_VRNDSCALESD, "vrndscalesd" }, { X86_INS_VRNDSCALESS, "vrndscaless" }, { X86_INS_VROUNDPD, "vroundpd" }, { X86_INS_VROUNDPS, "vroundps" }, { X86_INS_VROUNDSD, "vroundsd" }, { X86_INS_VROUNDSS, "vroundss" }, { X86_INS_VRSQRT14PD, "vrsqrt14pd" }, { X86_INS_VRSQRT14PS, "vrsqrt14ps" }, { X86_INS_VRSQRT14SD, "vrsqrt14sd" }, { X86_INS_VRSQRT14SS, "vrsqrt14ss" }, { X86_INS_VRSQRT28PD, "vrsqrt28pd" }, { X86_INS_VRSQRT28PS, "vrsqrt28ps" }, { X86_INS_VRSQRT28SD, "vrsqrt28sd" }, { X86_INS_VRSQRT28SS, "vrsqrt28ss" }, { X86_INS_VRSQRTPS, "vrsqrtps" }, { X86_INS_VRSQRTSS, "vrsqrtss" }, { X86_INS_VSCATTERDPD, "vscatterdpd" }, { X86_INS_VSCATTERDPS, "vscatterdps" }, { X86_INS_VSCATTERPF0DPD, "vscatterpf0dpd" }, { X86_INS_VSCATTERPF0DPS, "vscatterpf0dps" }, { X86_INS_VSCATTERPF0QPD, "vscatterpf0qpd" }, { X86_INS_VSCATTERPF0QPS, "vscatterpf0qps" }, { X86_INS_VSCATTERPF1DPD, "vscatterpf1dpd" }, { X86_INS_VSCATTERPF1DPS, "vscatterpf1dps" }, { X86_INS_VSCATTERPF1QPD, "vscatterpf1qpd" }, { X86_INS_VSCATTERPF1QPS, "vscatterpf1qps" }, { X86_INS_VSCATTERQPD, "vscatterqpd" }, { X86_INS_VSCATTERQPS, "vscatterqps" }, { X86_INS_VSHUFPD, "vshufpd" }, { X86_INS_VSHUFPS, "vshufps" }, { X86_INS_VSQRTPD, "vsqrtpd" }, { X86_INS_VSQRTPS, "vsqrtps" }, { X86_INS_VSQRTSD, "vsqrtsd" }, { X86_INS_VSQRTSS, "vsqrtss" }, { X86_INS_VSTMXCSR, "vstmxcsr" }, { X86_INS_VSUBPD, "vsubpd" }, { X86_INS_VSUBPS, "vsubps" }, { X86_INS_VSUBSD, "vsubsd" }, { X86_INS_VSUBSS, "vsubss" }, { X86_INS_VTESTPD, "vtestpd" }, { X86_INS_VTESTPS, "vtestps" }, { X86_INS_VUNPCKHPD, "vunpckhpd" }, { X86_INS_VUNPCKHPS, "vunpckhps" }, { X86_INS_VUNPCKLPD, "vunpcklpd" }, { X86_INS_VUNPCKLPS, "vunpcklps" }, { X86_INS_VZEROALL, "vzeroall" }, { X86_INS_VZEROUPPER, "vzeroupper" }, { X86_INS_WAIT, "wait" }, { X86_INS_WBINVD, "wbinvd" }, { X86_INS_WRFSBASE, "wrfsbase" }, { X86_INS_WRGSBASE, "wrgsbase" }, { X86_INS_WRMSR, "wrmsr" }, { X86_INS_XABORT, "xabort" }, { X86_INS_XACQUIRE, "xacquire" }, { X86_INS_XBEGIN, "xbegin" }, { X86_INS_XCHG, "xchg" }, { X86_INS_XCRYPTCBC, "xcryptcbc" }, { X86_INS_XCRYPTCFB, "xcryptcfb" }, { X86_INS_XCRYPTCTR, "xcryptctr" }, { X86_INS_XCRYPTECB, "xcryptecb" }, { X86_INS_XCRYPTOFB, "xcryptofb" }, { X86_INS_XEND, "xend" }, { X86_INS_XGETBV, "xgetbv" }, { X86_INS_XLATB, "xlatb" }, { X86_INS_XRELEASE, "xrelease" }, { X86_INS_XRSTOR, "xrstor" }, { X86_INS_XRSTOR64, "xrstor64" }, { X86_INS_XRSTORS, "xrstors" }, { X86_INS_XRSTORS64, "xrstors64" }, { X86_INS_XSAVE, "xsave" }, { X86_INS_XSAVE64, "xsave64" }, { X86_INS_XSAVEC, "xsavec" }, { X86_INS_XSAVEC64, "xsavec64" }, { X86_INS_XSAVEOPT, "xsaveopt" }, { X86_INS_XSAVEOPT64, "xsaveopt64" }, { X86_INS_XSAVES, "xsaves" }, { X86_INS_XSAVES64, "xsaves64" }, { X86_INS_XSETBV, "xsetbv" }, { X86_INS_XSHA1, "xsha1" }, { X86_INS_XSHA256, "xsha256" }, { X86_INS_XSTORE, "xstore" }, { X86_INS_XTEST, "xtest" }, { X86_INS_FDISI8087_NOP, "fdisi8087_nop" }, { X86_INS_FENI8087_NOP, "feni8087_nop" }, // pseudo instructions { X86_INS_CMPSS, "cmpss" }, { X86_INS_CMPEQSS, "cmpeqss" }, { X86_INS_CMPLTSS, "cmpltss" }, { X86_INS_CMPLESS, "cmpless" }, { X86_INS_CMPUNORDSS, "cmpunordss" }, { X86_INS_CMPNEQSS, "cmpneqss" }, { X86_INS_CMPNLTSS, "cmpnltss" }, { X86_INS_CMPNLESS, "cmpnless" }, { X86_INS_CMPORDSS, "cmpordss" }, { X86_INS_CMPSD, "cmpsd" }, { X86_INS_CMPEQSD, "cmpeqsd" }, { X86_INS_CMPLTSD, "cmpltsd" }, { X86_INS_CMPLESD, "cmplesd" }, { X86_INS_CMPUNORDSD, "cmpunordsd" }, { X86_INS_CMPNEQSD, "cmpneqsd" }, { X86_INS_CMPNLTSD, "cmpnltsd" }, { X86_INS_CMPNLESD, "cmpnlesd" }, { X86_INS_CMPORDSD, "cmpordsd" }, { X86_INS_CMPPS, "cmpps" }, { X86_INS_CMPEQPS, "cmpeqps" }, { X86_INS_CMPLTPS, "cmpltps" }, { X86_INS_CMPLEPS, "cmpleps" }, { X86_INS_CMPUNORDPS, "cmpunordps" }, { X86_INS_CMPNEQPS, "cmpneqps" }, { X86_INS_CMPNLTPS, "cmpnltps" }, { X86_INS_CMPNLEPS, "cmpnleps" }, { X86_INS_CMPORDPS, "cmpordps" }, { X86_INS_CMPPD, "cmppd" }, { X86_INS_CMPEQPD, "cmpeqpd" }, { X86_INS_CMPLTPD, "cmpltpd" }, { X86_INS_CMPLEPD, "cmplepd" }, { X86_INS_CMPUNORDPD, "cmpunordpd" }, { X86_INS_CMPNEQPD, "cmpneqpd" }, { X86_INS_CMPNLTPD, "cmpnltpd" }, { X86_INS_CMPNLEPD, "cmpnlepd" }, { X86_INS_CMPORDPD, "cmpordpd" }, { X86_INS_VCMPSS, "vcmpss" }, { X86_INS_VCMPEQSS, "vcmpeqss" }, { X86_INS_VCMPLTSS, "vcmpltss" }, { X86_INS_VCMPLESS, "vcmpless" }, { X86_INS_VCMPUNORDSS, "vcmpunordss" }, { X86_INS_VCMPNEQSS, "vcmpneqss" }, { X86_INS_VCMPNLTSS, "vcmpnltss" }, { X86_INS_VCMPNLESS, "vcmpnless" }, { X86_INS_VCMPORDSS, "vcmpordss" }, { X86_INS_VCMPEQ_UQSS, "vcmpeq_uqss" }, { X86_INS_VCMPNGESS, "vcmpngess" }, { X86_INS_VCMPNGTSS, "vcmpngtss" }, { X86_INS_VCMPFALSESS, "vcmpfalsess" }, { X86_INS_VCMPNEQ_OQSS, "vcmpneq_oqss" }, { X86_INS_VCMPGESS, "vcmpgess" }, { X86_INS_VCMPGTSS, "vcmpgtss" }, { X86_INS_VCMPTRUESS, "vcmptruess" }, { X86_INS_VCMPEQ_OSSS, "vcmpeq_osss" }, { X86_INS_VCMPLT_OQSS, "vcmplt_oqss" }, { X86_INS_VCMPLE_OQSS, "vcmple_oqss" }, { X86_INS_VCMPUNORD_SSS, "vcmpunord_sss" }, { X86_INS_VCMPNEQ_USSS, "vcmpneq_usss" }, { X86_INS_VCMPNLT_UQSS, "vcmpnlt_uqss" }, { X86_INS_VCMPNLE_UQSS, "vcmpnle_uqss" }, { X86_INS_VCMPORD_SSS, "vcmpord_sss" }, { X86_INS_VCMPEQ_USSS, "vcmpeq_usss" }, { X86_INS_VCMPNGE_UQSS, "vcmpnge_uqss" }, { X86_INS_VCMPNGT_UQSS, "vcmpngt_uqss" }, { X86_INS_VCMPFALSE_OSSS, "vcmpfalse_osss" }, { X86_INS_VCMPNEQ_OSSS, "vcmpneq_osss" }, { X86_INS_VCMPGE_OQSS, "vcmpge_oqss" }, { X86_INS_VCMPGT_OQSS, "vcmpgt_oqss" }, { X86_INS_VCMPTRUE_USSS, "vcmptrue_usss" }, { X86_INS_VCMPSD, "vcmpsd" }, { X86_INS_VCMPEQSD, "vcmpeqsd" }, { X86_INS_VCMPLTSD, "vcmpltsd" }, { X86_INS_VCMPLESD, "vcmplesd" }, { X86_INS_VCMPUNORDSD, "vcmpunordsd" }, { X86_INS_VCMPNEQSD, "vcmpneqsd" }, { X86_INS_VCMPNLTSD, "vcmpnltsd" }, { X86_INS_VCMPNLESD, "vcmpnlesd" }, { X86_INS_VCMPORDSD, "vcmpordsd" }, { X86_INS_VCMPEQ_UQSD, "vcmpeq_uqsd" }, { X86_INS_VCMPNGESD, "vcmpngesd" }, { X86_INS_VCMPNGTSD, "vcmpngtsd" }, { X86_INS_VCMPFALSESD, "vcmpfalsesd" }, { X86_INS_VCMPNEQ_OQSD, "vcmpneq_oqsd" }, { X86_INS_VCMPGESD, "vcmpgesd" }, { X86_INS_VCMPGTSD, "vcmpgtsd" }, { X86_INS_VCMPTRUESD, "vcmptruesd" }, { X86_INS_VCMPEQ_OSSD, "vcmpeq_ossd" }, { X86_INS_VCMPLT_OQSD, "vcmplt_oqsd" }, { X86_INS_VCMPLE_OQSD, "vcmple_oqsd" }, { X86_INS_VCMPUNORD_SSD, "vcmpunord_ssd" }, { X86_INS_VCMPNEQ_USSD, "vcmpneq_ussd" }, { X86_INS_VCMPNLT_UQSD, "vcmpnlt_uqsd" }, { X86_INS_VCMPNLE_UQSD, "vcmpnle_uqsd" }, { X86_INS_VCMPORD_SSD, "vcmpord_ssd" }, { X86_INS_VCMPEQ_USSD, "vcmpeq_ussd" }, { X86_INS_VCMPNGE_UQSD, "vcmpnge_uqsd" }, { X86_INS_VCMPNGT_UQSD, "vcmpngt_uqsd" }, { X86_INS_VCMPFALSE_OSSD, "vcmpfalse_ossd" }, { X86_INS_VCMPNEQ_OSSD, "vcmpneq_ossd" }, { X86_INS_VCMPGE_OQSD, "vcmpge_oqsd" }, { X86_INS_VCMPGT_OQSD, "vcmpgt_oqsd" }, { X86_INS_VCMPTRUE_USSD, "vcmptrue_ussd" }, { X86_INS_VCMPPS, "vcmpps" }, { X86_INS_VCMPEQPS, "vcmpeqps" }, { X86_INS_VCMPLTPS, "vcmpltps" }, { X86_INS_VCMPLEPS, "vcmpleps" }, { X86_INS_VCMPUNORDPS, "vcmpunordps" }, { X86_INS_VCMPNEQPS, "vcmpneqps" }, { X86_INS_VCMPNLTPS, "vcmpnltps" }, { X86_INS_VCMPNLEPS, "vcmpnleps" }, { X86_INS_VCMPORDPS, "vcmpordps" }, { X86_INS_VCMPEQ_UQPS, "vcmpeq_uqps" }, { X86_INS_VCMPNGEPS, "vcmpngeps" }, { X86_INS_VCMPNGTPS, "vcmpngtps" }, { X86_INS_VCMPFALSEPS, "vcmpfalseps" }, { X86_INS_VCMPNEQ_OQPS, "vcmpneq_oqps" }, { X86_INS_VCMPGEPS, "vcmpgeps" }, { X86_INS_VCMPGTPS, "vcmpgtps" }, { X86_INS_VCMPTRUEPS, "vcmptrueps" }, { X86_INS_VCMPEQ_OSPS, "vcmpeq_osps" }, { X86_INS_VCMPLT_OQPS, "vcmplt_oqps" }, { X86_INS_VCMPLE_OQPS, "vcmple_oqps" }, { X86_INS_VCMPUNORD_SPS, "vcmpunord_sps" }, { X86_INS_VCMPNEQ_USPS, "vcmpneq_usps" }, { X86_INS_VCMPNLT_UQPS, "vcmpnlt_uqps" }, { X86_INS_VCMPNLE_UQPS, "vcmpnle_uqps" }, { X86_INS_VCMPORD_SPS, "vcmpord_sps" }, { X86_INS_VCMPEQ_USPS, "vcmpeq_usps" }, { X86_INS_VCMPNGE_UQPS, "vcmpnge_uqps" }, { X86_INS_VCMPNGT_UQPS, "vcmpngt_uqps" }, { X86_INS_VCMPFALSE_OSPS, "vcmpfalse_osps" }, { X86_INS_VCMPNEQ_OSPS, "vcmpneq_osps" }, { X86_INS_VCMPGE_OQPS, "vcmpge_oqps" }, { X86_INS_VCMPGT_OQPS, "vcmpgt_oqps" }, { X86_INS_VCMPTRUE_USPS, "vcmptrue_usps" }, { X86_INS_VCMPPD, "vcmppd" }, { X86_INS_VCMPEQPD, "vcmpeqpd" }, { X86_INS_VCMPLTPD, "vcmpltpd" }, { X86_INS_VCMPLEPD, "vcmplepd" }, { X86_INS_VCMPUNORDPD, "vcmpunordpd" }, { X86_INS_VCMPNEQPD, "vcmpneqpd" }, { X86_INS_VCMPNLTPD, "vcmpnltpd" }, { X86_INS_VCMPNLEPD, "vcmpnlepd" }, { X86_INS_VCMPORDPD, "vcmpordpd" }, { X86_INS_VCMPEQ_UQPD, "vcmpeq_uqpd" }, { X86_INS_VCMPNGEPD, "vcmpngepd" }, { X86_INS_VCMPNGTPD, "vcmpngtpd" }, { X86_INS_VCMPFALSEPD, "vcmpfalsepd" }, { X86_INS_VCMPNEQ_OQPD, "vcmpneq_oqpd" }, { X86_INS_VCMPGEPD, "vcmpgepd" }, { X86_INS_VCMPGTPD, "vcmpgtpd" }, { X86_INS_VCMPTRUEPD, "vcmptruepd" }, { X86_INS_VCMPEQ_OSPD, "vcmpeq_ospd" }, { X86_INS_VCMPLT_OQPD, "vcmplt_oqpd" }, { X86_INS_VCMPLE_OQPD, "vcmple_oqpd" }, { X86_INS_VCMPUNORD_SPD, "vcmpunord_spd" }, { X86_INS_VCMPNEQ_USPD, "vcmpneq_uspd" }, { X86_INS_VCMPNLT_UQPD, "vcmpnlt_uqpd" }, { X86_INS_VCMPNLE_UQPD, "vcmpnle_uqpd" }, { X86_INS_VCMPORD_SPD, "vcmpord_spd" }, { X86_INS_VCMPEQ_USPD, "vcmpeq_uspd" }, { X86_INS_VCMPNGE_UQPD, "vcmpnge_uqpd" }, { X86_INS_VCMPNGT_UQPD, "vcmpngt_uqpd" }, { X86_INS_VCMPFALSE_OSPD, "vcmpfalse_ospd" }, { X86_INS_VCMPNEQ_OSPD, "vcmpneq_ospd" }, { X86_INS_VCMPGE_OQPD, "vcmpge_oqpd" }, { X86_INS_VCMPGT_OQPD, "vcmpgt_oqpd" }, { X86_INS_VCMPTRUE_USPD, "vcmptrue_uspd" }, { X86_INS_UD0, "ud0" }, { X86_INS_ENDBR32, "endbr32" }, { X86_INS_ENDBR64, "endbr64" }, }; #endif const char *X86_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET if (id >= X86_INS_ENDING) return NULL; return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { // generic groups { X86_GRP_INVALID, NULL }, { X86_GRP_JUMP, "jump" }, { X86_GRP_CALL, "call" }, { X86_GRP_RET, "ret" }, { X86_GRP_INT, "int" }, { X86_GRP_IRET, "iret" }, { X86_GRP_PRIVILEGE, "privilege" }, { X86_GRP_BRANCH_RELATIVE, "branch_relative" }, // architecture-specific groups { X86_GRP_VM, "vm" }, { X86_GRP_3DNOW, "3dnow" }, { X86_GRP_AES, "aes" }, { X86_GRP_ADX, "adx" }, { X86_GRP_AVX, "avx" }, { X86_GRP_AVX2, "avx2" }, { X86_GRP_AVX512, "avx512" }, { X86_GRP_BMI, "bmi" }, { X86_GRP_BMI2, "bmi2" }, { X86_GRP_CMOV, "cmov" }, { X86_GRP_F16C, "fc16" }, { X86_GRP_FMA, "fma" }, { X86_GRP_FMA4, "fma4" }, { X86_GRP_FSGSBASE, "fsgsbase" }, { X86_GRP_HLE, "hle" }, { X86_GRP_MMX, "mmx" }, { X86_GRP_MODE32, "mode32" }, { X86_GRP_MODE64, "mode64" }, { X86_GRP_RTM, "rtm" }, { X86_GRP_SHA, "sha" }, { X86_GRP_SSE1, "sse1" }, { X86_GRP_SSE2, "sse2" }, { X86_GRP_SSE3, "sse3" }, { X86_GRP_SSE41, "sse41" }, { X86_GRP_SSE42, "sse42" }, { X86_GRP_SSE4A, "sse4a" }, { X86_GRP_SSSE3, "ssse3" }, { X86_GRP_PCLMUL, "pclmul" }, { X86_GRP_XOP, "xop" }, { X86_GRP_CDI, "cdi" }, { X86_GRP_ERI, "eri" }, { X86_GRP_TBM, "tbm" }, { X86_GRP_16BITMODE, "16bitmode" }, { X86_GRP_NOT64BITMODE, "not64bitmode" }, { X86_GRP_SGX, "sgx" }, { X86_GRP_DQI, "dqi" }, { X86_GRP_BWI, "bwi" }, { X86_GRP_PFI, "pfi" }, { X86_GRP_VLX, "vlx" }, { X86_GRP_SMAP, "smap" }, { X86_GRP_NOVLX, "novlx" }, { X86_GRP_FPU, "fpu" }, }; #endif const char *X86_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } #define GET_INSTRINFO_ENUM #ifdef CAPSTONE_X86_REDUCE #include "X86GenInstrInfo_reduce.inc" #else #include "X86GenInstrInfo.inc" #endif #ifndef CAPSTONE_X86_REDUCE static const insn_map insns[] = { // full x86 instructions // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "X86MappingInsn.inc" }; #else // X86 reduce (defined CAPSTONE_X86_REDUCE) static insn_map insns[] = { // reduce x86 instructions // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "X86MappingInsn_reduce.inc" }; #endif #ifndef CAPSTONE_DIET // replace r1 = r2 static void arr_replace(uint16_t *arr, uint8_t max, x86_reg r1, x86_reg r2) { uint8_t i; for(i = 0; i < max; i++) { if (arr[i] == r1) { arr[i] = r2; break; } } } #endif // given internal insn id, return public instruction info void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); // special cases when regs_write[] depends on arch switch(id) { default: memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); break; case X86_RDTSC: if (h->mode == CS_MODE_64) { memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); } else { insn->detail->regs_write[0] = X86_REG_EAX; insn->detail->regs_write[1] = X86_REG_EDX; insn->detail->regs_write_count = 2; } break; case X86_RDTSCP: if (h->mode == CS_MODE_64) { memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); } else { insn->detail->regs_write[0] = X86_REG_EAX; insn->detail->regs_write[1] = X86_REG_ECX; insn->detail->regs_write[2] = X86_REG_EDX; insn->detail->regs_write_count = 3; } break; } switch(insn->id) { default: break; case X86_INS_LOOP: case X86_INS_LOOPE: case X86_INS_LOOPNE: switch(h->mode) { default: break; case CS_MODE_16: insn->detail->regs_read[0] = X86_REG_CX; insn->detail->regs_read_count = 1; insn->detail->regs_write[0] = X86_REG_CX; insn->detail->regs_write_count = 1; break; case CS_MODE_32: insn->detail->regs_read[0] = X86_REG_ECX; insn->detail->regs_read_count = 1; insn->detail->regs_write[0] = X86_REG_ECX; insn->detail->regs_write_count = 1; break; case CS_MODE_64: insn->detail->regs_read[0] = X86_REG_RCX; insn->detail->regs_read_count = 1; insn->detail->regs_write[0] = X86_REG_RCX; insn->detail->regs_write_count = 1; break; } // LOOPE & LOOPNE also read EFLAGS if (insn->id != X86_INS_LOOP) { insn->detail->regs_read[1] = X86_REG_EFLAGS; insn->detail->regs_read_count = 2; } break; case X86_INS_LODSB: case X86_INS_LODSD: case X86_INS_LODSQ: case X86_INS_LODSW: switch(h->mode) { default: break; case CS_MODE_16: arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_SI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_SI); break; case CS_MODE_64: arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_RSI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_RSI); break; } break; case X86_INS_SCASB: case X86_INS_SCASW: case X86_INS_SCASQ: case X86_INS_STOSB: case X86_INS_STOSD: case X86_INS_STOSQ: case X86_INS_STOSW: switch(h->mode) { default: break; case CS_MODE_16: arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_DI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_DI); break; case CS_MODE_64: arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_RDI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_RDI); break; } break; case X86_INS_CMPSB: case X86_INS_CMPSD: case X86_INS_CMPSQ: case X86_INS_CMPSW: case X86_INS_MOVSB: case X86_INS_MOVSW: case X86_INS_MOVSD: case X86_INS_MOVSQ: switch(h->mode) { default: break; case CS_MODE_16: arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_DI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_DI); arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_SI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_SI); break; case CS_MODE_64: arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_RDI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_RDI); arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_RSI); arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_RSI); break; } break; case X86_INS_RET: switch(h->mode) { case CS_MODE_16: insn->detail->regs_write[0] = X86_REG_SP; insn->detail->regs_read[0] = X86_REG_SP; break; case CS_MODE_32: insn->detail->regs_write[0] = X86_REG_ESP; insn->detail->regs_read[0] = X86_REG_ESP; break; default: // 64-bit insn->detail->regs_write[0] = X86_REG_RSP; insn->detail->regs_read[0] = X86_REG_RSP; break; } insn->detail->regs_write_count = 1; insn->detail->regs_read_count = 1; break; } memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = X86_GRP_JUMP; insn->detail->groups_count++; } switch (insns[i].id) { case X86_OUT8ir: case X86_OUT16ir: case X86_OUT32ir: if (insn->detail->x86.operands[0].imm == -78) { // Writing to port 0xb2 causes an SMI on most platforms // See: http://cs.gmu.edu/~tr-admin/papers/GMU-CS-TR-2011-8.pdf insn->detail->groups[insn->detail->groups_count] = X86_GRP_INT; insn->detail->groups_count++; } break; default: break; } #endif } } } // map special instructions with accumulate registers. // this is needed because LLVM embeds these register names into AsmStrs[], // but not separately in operands struct insn_reg { uint16_t insn; x86_reg reg; enum cs_ac_type access; }; struct insn_reg2 { uint16_t insn; x86_reg reg1, reg2; enum cs_ac_type access1, access2; }; static struct insn_reg insn_regs_att[] = { { X86_INSB, X86_REG_DX }, { X86_INSW, X86_REG_DX }, { X86_INSL, X86_REG_DX }, { X86_MOV8o16a, X86_REG_AL }, { X86_MOV8o32a, X86_REG_AL }, { X86_MOV8o64a, X86_REG_AL }, { X86_MOV16o16a, X86_REG_AX }, { X86_MOV16o32a, X86_REG_AX }, { X86_MOV16o64a, X86_REG_AX }, { X86_MOV32o16a, X86_REG_EAX }, { X86_MOV32o32a, X86_REG_EAX }, { X86_MOV32o64a, X86_REG_EAX }, { X86_MOV64o32a, X86_REG_RAX }, { X86_MOV64o64a, X86_REG_RAX }, { X86_PUSHCS32, X86_REG_CS }, { X86_PUSHDS32, X86_REG_DS }, { X86_PUSHES32, X86_REG_ES }, { X86_PUSHFS32, X86_REG_FS }, { X86_PUSHGS32, X86_REG_GS }, { X86_PUSHSS32, X86_REG_SS }, { X86_PUSHFS64, X86_REG_FS }, { X86_PUSHGS64, X86_REG_GS }, { X86_PUSHCS16, X86_REG_CS }, { X86_PUSHDS16, X86_REG_DS }, { X86_PUSHES16, X86_REG_ES }, { X86_PUSHFS16, X86_REG_FS }, { X86_PUSHGS16, X86_REG_GS }, { X86_PUSHSS16, X86_REG_SS }, { X86_POPDS32, X86_REG_DS }, { X86_POPES32, X86_REG_ES }, { X86_POPFS32, X86_REG_FS }, { X86_POPGS32, X86_REG_GS }, { X86_POPSS32, X86_REG_SS }, { X86_POPFS64, X86_REG_FS }, { X86_POPGS64, X86_REG_GS }, { X86_POPDS16, X86_REG_DS }, { X86_POPES16, X86_REG_ES }, { X86_POPFS16, X86_REG_FS }, { X86_POPGS16, X86_REG_GS }, { X86_POPSS16, X86_REG_SS }, { X86_RCL32rCL, X86_REG_CL }, { X86_SHL8rCL, X86_REG_CL }, { X86_SHL16rCL, X86_REG_CL }, { X86_SHL32rCL, X86_REG_CL }, { X86_SHL64rCL, X86_REG_CL }, { X86_SAL8rCL, X86_REG_CL }, { X86_SAL16rCL, X86_REG_CL }, { X86_SAL32rCL, X86_REG_CL }, { X86_SAL64rCL, X86_REG_CL }, { X86_SHR8rCL, X86_REG_CL }, { X86_SHR16rCL, X86_REG_CL }, { X86_SHR32rCL, X86_REG_CL }, { X86_SHR64rCL, X86_REG_CL }, { X86_SAR8rCL, X86_REG_CL }, { X86_SAR16rCL, X86_REG_CL }, { X86_SAR32rCL, X86_REG_CL }, { X86_SAR64rCL, X86_REG_CL }, { X86_RCL8rCL, X86_REG_CL }, { X86_RCL16rCL, X86_REG_CL }, { X86_RCL32rCL, X86_REG_CL }, { X86_RCL64rCL, X86_REG_CL }, { X86_RCR8rCL, X86_REG_CL }, { X86_RCR16rCL, X86_REG_CL }, { X86_RCR32rCL, X86_REG_CL }, { X86_RCR64rCL, X86_REG_CL }, { X86_ROL8rCL, X86_REG_CL }, { X86_ROL16rCL, X86_REG_CL }, { X86_ROL32rCL, X86_REG_CL }, { X86_ROL64rCL, X86_REG_CL }, { X86_ROR8rCL, X86_REG_CL }, { X86_ROR16rCL, X86_REG_CL }, { X86_ROR32rCL, X86_REG_CL }, { X86_ROR64rCL, X86_REG_CL }, { X86_SHLD16rrCL, X86_REG_CL }, { X86_SHRD16rrCL, X86_REG_CL }, { X86_SHLD32rrCL, X86_REG_CL }, { X86_SHRD32rrCL, X86_REG_CL }, { X86_SHLD64rrCL, X86_REG_CL }, { X86_SHRD64rrCL, X86_REG_CL }, { X86_SHLD16mrCL, X86_REG_CL }, { X86_SHRD16mrCL, X86_REG_CL }, { X86_SHLD32mrCL, X86_REG_CL }, { X86_SHRD32mrCL, X86_REG_CL }, { X86_SHLD64mrCL, X86_REG_CL }, { X86_SHRD64mrCL, X86_REG_CL }, { X86_OUT8ir, X86_REG_AL }, { X86_OUT16ir, X86_REG_AX }, { X86_OUT32ir, X86_REG_EAX }, #ifndef CAPSTONE_X86_REDUCE { X86_SKINIT, X86_REG_EAX }, { X86_VMRUN32, X86_REG_EAX }, { X86_VMRUN64, X86_REG_RAX }, { X86_VMLOAD32, X86_REG_EAX }, { X86_VMLOAD64, X86_REG_RAX }, { X86_VMSAVE32, X86_REG_EAX }, { X86_VMSAVE64, X86_REG_RAX }, { X86_FNSTSW16r, X86_REG_AX }, { X86_ADD_FrST0, X86_REG_ST0 }, { X86_SUB_FrST0, X86_REG_ST0 }, { X86_SUBR_FrST0, X86_REG_ST0 }, { X86_MUL_FrST0, X86_REG_ST0 }, { X86_DIV_FrST0, X86_REG_ST0 }, { X86_DIVR_FrST0, X86_REG_ST0 }, #endif }; static struct insn_reg insn_regs_intel[] = { { X86_OUTSB, X86_REG_DX, CS_AC_WRITE }, { X86_OUTSW, X86_REG_DX, CS_AC_WRITE }, { X86_OUTSL, X86_REG_DX, CS_AC_WRITE }, { X86_MOV8ao16, X86_REG_AL, CS_AC_WRITE }, // 16-bit A0 1020 // mov al, byte ptr [0x2010] { X86_MOV8ao32, X86_REG_AL, CS_AC_WRITE }, // 32-bit A0 10203040 // mov al, byte ptr [0x40302010] { X86_MOV8ao64, X86_REG_AL, CS_AC_WRITE }, // 64-bit 66 A0 1020304050607080 // movabs al, byte ptr [0x8070605040302010] { X86_MOV16ao16, X86_REG_AX, CS_AC_WRITE }, // 16-bit A1 1020 // mov ax, word ptr [0x2010] { X86_MOV16ao32, X86_REG_AX, CS_AC_WRITE }, // 32-bit A1 10203040 // mov ax, word ptr [0x40302010] { X86_MOV16ao64, X86_REG_AX, CS_AC_WRITE }, // 64-bit 66 A1 1020304050607080 // movabs ax, word ptr [0x8070605040302010] { X86_MOV32ao16, X86_REG_EAX, CS_AC_WRITE }, // 32-bit 67 A1 1020 // mov eax, dword ptr [0x2010] { X86_MOV32ao32, X86_REG_EAX, CS_AC_WRITE }, // 32-bit A1 10203040 // mov eax, dword ptr [0x40302010] { X86_MOV32ao64, X86_REG_EAX, CS_AC_WRITE }, // 64-bit A1 1020304050607080 // movabs eax, dword ptr [0x8070605040302010] { X86_MOV64ao32, X86_REG_RAX, CS_AC_WRITE }, // 64-bit 48 8B04 10203040 // mov rax, qword ptr [0x40302010] { X86_MOV64ao64, X86_REG_RAX, CS_AC_WRITE }, // 64-bit 48 A1 1020304050607080 // movabs rax, qword ptr [0x8070605040302010] { X86_LODSQ, X86_REG_RAX, CS_AC_WRITE }, { X86_OR32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_SUB32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_TEST32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_ADD32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_XCHG64ar, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_LODSB, X86_REG_AL, CS_AC_WRITE }, { X86_AND32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_IN16ri, X86_REG_AX, CS_AC_WRITE }, { X86_CMP64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_XOR32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_XCHG16ar, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_LODSW, X86_REG_AX, CS_AC_WRITE }, { X86_AND16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_ADC16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_XCHG32ar64, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_ADC8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_CMP32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_AND8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_SCASW, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_XOR8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_SUB16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_OR16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_XCHG32ar, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_SBB8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_SCASQ, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_SBB32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_XOR64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_SUB64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_ADD64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_OR8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_TEST64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_SBB16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_TEST8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_IN8ri, X86_REG_AL, CS_AC_WRITE }, { X86_TEST16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_SCASL, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_SUB8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_ADD8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_OR64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_SCASB, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_SBB64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_ADD16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_XOR16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_AND64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_LODSL, X86_REG_EAX, CS_AC_WRITE }, { X86_CMP8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ }, { X86_ADC64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ }, { X86_CMP16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ }, { X86_ADC32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ }, { X86_IN32ri, X86_REG_EAX, CS_AC_WRITE }, { X86_PUSHCS32, X86_REG_CS, CS_AC_READ }, { X86_PUSHDS32, X86_REG_DS, CS_AC_READ }, { X86_PUSHES32, X86_REG_ES, CS_AC_READ }, { X86_PUSHFS32, X86_REG_FS, CS_AC_READ }, { X86_PUSHGS32, X86_REG_GS, CS_AC_READ }, { X86_PUSHSS32, X86_REG_SS, CS_AC_READ }, { X86_PUSHFS64, X86_REG_FS, CS_AC_READ }, { X86_PUSHGS64, X86_REG_GS, CS_AC_READ }, { X86_PUSHCS16, X86_REG_CS, CS_AC_READ }, { X86_PUSHDS16, X86_REG_DS, CS_AC_READ }, { X86_PUSHES16, X86_REG_ES, CS_AC_READ }, { X86_PUSHFS16, X86_REG_FS, CS_AC_READ }, { X86_PUSHGS16, X86_REG_GS, CS_AC_READ }, { X86_PUSHSS16, X86_REG_SS, CS_AC_READ }, { X86_POPDS32, X86_REG_DS, CS_AC_WRITE }, { X86_POPES32, X86_REG_ES, CS_AC_WRITE }, { X86_POPFS32, X86_REG_FS, CS_AC_WRITE }, { X86_POPGS32, X86_REG_GS, CS_AC_WRITE }, { X86_POPSS32, X86_REG_SS, CS_AC_WRITE }, { X86_POPFS64, X86_REG_FS, CS_AC_WRITE }, { X86_POPGS64, X86_REG_GS, CS_AC_WRITE }, { X86_POPDS16, X86_REG_DS, CS_AC_WRITE }, { X86_POPES16, X86_REG_ES, CS_AC_WRITE }, { X86_POPFS16, X86_REG_FS, CS_AC_WRITE }, { X86_POPGS16, X86_REG_GS, CS_AC_WRITE }, { X86_POPSS16, X86_REG_SS, CS_AC_WRITE }, #ifndef CAPSTONE_X86_REDUCE { X86_SKINIT, X86_REG_EAX, CS_AC_WRITE }, { X86_VMRUN32, X86_REG_EAX, CS_AC_WRITE }, { X86_VMRUN64, X86_REG_RAX, CS_AC_WRITE }, { X86_VMLOAD32, X86_REG_EAX, CS_AC_WRITE }, { X86_VMLOAD64, X86_REG_RAX, CS_AC_WRITE }, { X86_VMSAVE32, X86_REG_EAX, CS_AC_READ }, { X86_VMSAVE64, X86_REG_RAX, CS_AC_READ }, { X86_FNSTSW16r, X86_REG_AX, CS_AC_WRITE }, { X86_CMOVB_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVBE_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVE_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVP_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVNB_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVNBE_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVNE_F, X86_REG_ST0, CS_AC_WRITE }, { X86_CMOVNP_F, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FXCHST0r, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FXCHST0r_alt, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FCOMST0r, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FCOMPST0r, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FCOMPST0r_alt, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FPST0r, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FPST0r_alt, X86_REG_ST0, CS_AC_WRITE }, { X86_ST_FPNCEST0r, X86_REG_ST0, CS_AC_WRITE }, #endif }; static struct insn_reg2 insn_regs_intel2[] = { { X86_IN8rr, X86_REG_AL, X86_REG_DX, CS_AC_WRITE, CS_AC_READ }, { X86_IN16rr, X86_REG_AX, X86_REG_DX, CS_AC_WRITE, CS_AC_READ }, { X86_IN32rr, X86_REG_EAX, X86_REG_DX, CS_AC_WRITE, CS_AC_READ }, { X86_OUT8rr, X86_REG_DX, X86_REG_AL, CS_AC_READ, CS_AC_READ }, { X86_OUT16rr, X86_REG_DX, X86_REG_AX, CS_AC_READ, CS_AC_READ }, { X86_OUT32rr, X86_REG_DX, X86_REG_EAX, CS_AC_READ, CS_AC_READ }, { X86_INVLPGA32, X86_REG_EAX, X86_REG_ECX, CS_AC_READ, CS_AC_READ }, { X86_INVLPGA64, X86_REG_RAX, X86_REG_ECX, CS_AC_READ, CS_AC_READ }, }; static struct insn_reg insn_regs_intel_sorted [ARR_SIZE(insn_regs_intel)]; // Explicitly specified calling convention with CAPSTONE_API so that it is always // compiled as __cdecl on MSVC and does not cause a compile error even when // default calling convention is __stdcall (eg. capstone_static_winkernel project) static int CAPSTONE_API regs_cmp(const void *a, const void *b) { uint16_t l = ((struct insn_reg *)a)->insn; uint16_t r = ((struct insn_reg *)b)->insn; return (l - r); } // return register of given instruction id // return 0 if not found // this is to handle instructions embedding accumulate registers into AsmStrs[] x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access) { static bool intel_regs_sorted = false; unsigned int first = 0; unsigned int last = ARR_SIZE(insn_regs_intel) - 1; unsigned int mid; if (!intel_regs_sorted) { memcpy(insn_regs_intel_sorted, insn_regs_intel, sizeof(insn_regs_intel_sorted)); qsort(insn_regs_intel_sorted, ARR_SIZE(insn_regs_intel_sorted), sizeof(struct insn_reg), regs_cmp); intel_regs_sorted = true; } if (insn_regs_intel_sorted[0].insn > id || insn_regs_intel_sorted[last].insn < id) { return 0; } while (first <= last) { mid = (first + last) / 2; if (insn_regs_intel_sorted[mid].insn < id) { first = mid + 1; } else if (insn_regs_intel_sorted[mid].insn == id) { if (access) { *access = insn_regs_intel_sorted[mid].access; } return insn_regs_intel_sorted[mid].reg; } else { if (mid == 0) break; last = mid - 1; } } // not found return 0; } bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2) { unsigned int i; for (i = 0; i < ARR_SIZE(insn_regs_intel2); i++) { if (insn_regs_intel2[i].insn == id) { *reg1 = insn_regs_intel2[i].reg1; *reg2 = insn_regs_intel2[i].reg2; if (access1) *access1 = insn_regs_intel2[i].access1; if (access2) *access2 = insn_regs_intel2[i].access2; return true; } } // not found return false; } // ATT just reuses Intel data, but with the order of registers reversed bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2) { unsigned int i; for (i = 0; i < ARR_SIZE(insn_regs_intel2); i++) { if (insn_regs_intel2[i].insn == id) { // reverse order of Intel syntax registers *reg1 = insn_regs_intel2[i].reg2; *reg2 = insn_regs_intel2[i].reg1; if (access1) *access1 = insn_regs_intel2[i].access2; if (access2) *access2 = insn_regs_intel2[i].access1; return true; } } // not found return false; } x86_reg X86_insn_reg_att(unsigned int id, enum cs_ac_type *access) { unsigned int i; for (i = 0; i < ARR_SIZE(insn_regs_att); i++) { if (insn_regs_att[i].insn == id) { if (access) *access = insn_regs_att[i].access; return insn_regs_att[i].reg; } } // not found return 0; } // given MCInst's id, find out if this insn is valid for REPNE prefix static bool valid_repne(cs_struct *h, unsigned int opcode) { unsigned int id; int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); if (i != 0) { id = insns[i].mapid; switch(id) { default: return false; case X86_INS_CMPSB: case X86_INS_CMPSW: case X86_INS_CMPSQ: case X86_INS_SCASB: case X86_INS_SCASW: case X86_INS_SCASQ: case X86_INS_MOVSB: case X86_INS_MOVSW: case X86_INS_MOVSQ: case X86_INS_LODSB: case X86_INS_LODSW: case X86_INS_LODSD: case X86_INS_LODSQ: case X86_INS_STOSB: case X86_INS_STOSW: case X86_INS_STOSD: case X86_INS_STOSQ: case X86_INS_INSB: case X86_INS_INSW: case X86_INS_INSD: case X86_INS_OUTSB: case X86_INS_OUTSW: case X86_INS_OUTSD: return true; case X86_INS_MOVSD: if (opcode == X86_MOVSW) // REP MOVSB return true; return false; case X86_INS_CMPSD: if (opcode == X86_CMPSL) // REP CMPSD return true; return false; case X86_INS_SCASD: if (opcode == X86_SCASL) // REP SCASD return true; return false; } } // not found return false; } // given MCInst's id, find out if this insn is valid for BND prefix // BND prefix is valid for CALL/JMP/RET #ifndef CAPSTONE_DIET static bool valid_bnd(cs_struct *h, unsigned int opcode) { unsigned int id; int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); if (i != 0) { id = insns[i].mapid; switch(id) { default: return false; case X86_INS_JAE: case X86_INS_JA: case X86_INS_JBE: case X86_INS_JB: case X86_INS_JCXZ: case X86_INS_JECXZ: case X86_INS_JE: case X86_INS_JGE: case X86_INS_JG: case X86_INS_JLE: case X86_INS_JL: case X86_INS_JMP: case X86_INS_JNE: case X86_INS_JNO: case X86_INS_JNP: case X86_INS_JNS: case X86_INS_JO: case X86_INS_JP: case X86_INS_JRCXZ: case X86_INS_JS: case X86_INS_CALL: case X86_INS_RET: case X86_INS_RETF: case X86_INS_RETFQ: return true; } } // not found return false; } #endif // return true if the opcode is XCHG [mem] static bool xchg_mem(unsigned int opcode) { switch(opcode) { default: return false; case X86_XCHG8rm: case X86_XCHG16rm: case X86_XCHG32rm: case X86_XCHG64rm: return true; } } // given MCInst's id, find out if this insn is valid for REP prefix static bool valid_rep(cs_struct *h, unsigned int opcode) { unsigned int id; int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); if (i != 0) { id = insns[i].mapid; switch(id) { default: return false; case X86_INS_MOVSB: case X86_INS_MOVSW: case X86_INS_MOVSQ: case X86_INS_LODSB: case X86_INS_LODSW: case X86_INS_LODSQ: case X86_INS_STOSB: case X86_INS_STOSW: case X86_INS_STOSQ: case X86_INS_INSB: case X86_INS_INSW: case X86_INS_INSD: case X86_INS_OUTSB: case X86_INS_OUTSW: case X86_INS_OUTSD: return true; // following are some confused instructions, which have the same // mnemonics in 128bit media instructions. Intel is horribly crazy! case X86_INS_MOVSD: if (opcode == X86_MOVSL) // REP MOVSD return true; return false; case X86_INS_LODSD: if (opcode == X86_LODSL) // REP LODSD return true; return false; case X86_INS_STOSD: if (opcode == X86_STOSL) // REP STOSD return true; return false; } } // not found return false; } // given MCInst's id, find out if this insn is valid for REPE prefix static bool valid_repe(cs_struct *h, unsigned int opcode) { unsigned int id; int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache); if (i != 0) { id = insns[i].mapid; switch(id) { default: return false; case X86_INS_CMPSB: case X86_INS_CMPSW: case X86_INS_CMPSQ: case X86_INS_SCASB: case X86_INS_SCASW: case X86_INS_SCASQ: return true; // following are some confused instructions, which have the same // mnemonics in 128bit media instructions. Intel is horribly crazy! case X86_INS_CMPSD: if (opcode == X86_CMPSL) // REP CMPSD return true; return false; case X86_INS_SCASD: if (opcode == X86_SCASL) // REP SCASD return true; return false; } } // not found return false; } #ifndef CAPSTONE_DIET // add *CX register to regs_read[] & regs_write[] static void add_cx(MCInst *MI) { if (MI->csh->detail) { x86_reg cx; if (MI->csh->mode & CS_MODE_16) cx = X86_REG_CX; else if (MI->csh->mode & CS_MODE_32) cx = X86_REG_ECX; else // 64-bit cx = X86_REG_RCX; MI->flat_insn->detail->regs_read[MI->flat_insn->detail->regs_read_count] = cx; MI->flat_insn->detail->regs_read_count++; MI->flat_insn->detail->regs_write[MI->flat_insn->detail->regs_write_count] = cx; MI->flat_insn->detail->regs_write_count++; } } #endif // return true if we patch the mnemonic bool X86_lockrep(MCInst *MI, SStream *O) { unsigned int opcode; bool res = false; switch(MI->x86_prefix[0]) { default: break; case 0xf0: #ifndef CAPSTONE_DIET if (MI->xAcquireRelease == 0xf2) SStream_concat(O, "xacquire|lock|"); else if (MI->xAcquireRelease == 0xf3) SStream_concat(O, "xrelease|lock|"); else SStream_concat(O, "lock|"); #endif break; case 0xf2: // repne opcode = MCInst_getOpcode(MI); #ifndef CAPSTONE_DIET // only care about memonic in standard (non-diet) mode if (xchg_mem(opcode) && MI->xAcquireRelease) { SStream_concat(O, "xacquire|"); } else if (valid_repne(MI->csh, opcode)) { SStream_concat(O, "repne|"); add_cx(MI); } else if (valid_bnd(MI->csh, opcode)) { SStream_concat(O, "bnd|"); } else { // invalid prefix MI->x86_prefix[0] = 0; // handle special cases #ifndef CAPSTONE_X86_REDUCE if (opcode == X86_MULPDrr) { MCInst_setOpcode(MI, X86_MULSDrr); SStream_concat(O, "mulsd\t"); res = true; } #endif } #else // diet mode -> only patch opcode in special cases if (!valid_repne(MI->csh, opcode)) { MI->x86_prefix[0] = 0; } #ifndef CAPSTONE_X86_REDUCE // handle special cases if (opcode == X86_MULPDrr) { MCInst_setOpcode(MI, X86_MULSDrr); } #endif #endif break; case 0xf3: opcode = MCInst_getOpcode(MI); #ifndef CAPSTONE_DIET // only care about memonic in standard (non-diet) mode if (xchg_mem(opcode) && MI->xAcquireRelease) { SStream_concat(O, "xrelease|"); } else if (valid_rep(MI->csh, opcode)) { SStream_concat(O, "rep|"); add_cx(MI); } else if (valid_repe(MI->csh, opcode)) { SStream_concat(O, "repe|"); add_cx(MI); } else { // invalid prefix MI->x86_prefix[0] = 0; // handle special cases #ifndef CAPSTONE_X86_REDUCE if (opcode == X86_MULPDrr) { MCInst_setOpcode(MI, X86_MULSSrr); SStream_concat(O, "mulss\t"); res = true; } #endif } #else // diet mode -> only patch opcode in special cases if (!valid_rep(MI->csh, opcode) && !valid_repe(MI->csh, opcode)) { MI->x86_prefix[0] = 0; } #ifndef CAPSTONE_X86_REDUCE // handle special cases if (opcode == X86_MULPDrr) { MCInst_setOpcode(MI, X86_MULSSrr); } #endif #endif break; } // copy normalized prefix[] back to x86.prefix[] if (MI->csh->detail) memcpy(MI->flat_insn->detail->x86.prefix, MI->x86_prefix, ARR_SIZE(MI->x86_prefix)); return res; } void op_addReg(MCInst *MI, int reg) { if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg]; MI->flat_insn->detail->x86.op_count++; } if (MI->op1_size == 0) MI->op1_size = MI->csh->regsize_map[reg]; } void op_addImm(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = v; // if op_count > 0, then this operand's size is taken from the destination op if (MI->csh->syntax != CS_OPT_SYNTAX_ATT) { if (MI->flat_insn->detail->x86.op_count > 0) MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->flat_insn->detail->x86.operands[0].size; else MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size; } else MI->has_imm = true; MI->flat_insn->detail->x86.op_count++; } if (MI->op1_size == 0) MI->op1_size = MI->imm_size; } void op_addXopCC(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->x86.xop_cc = v; } } void op_addSseCC(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->x86.sse_cc = v; } } void op_addAvxCC(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->x86.avx_cc = v; } } void op_addAvxRoundingMode(MCInst *MI, int v) { if (MI->csh->detail) { MI->flat_insn->detail->x86.avx_rm = v; } } // below functions supply details to X86GenAsmWriter*.inc void op_addAvxZeroOpmask(MCInst *MI) { if (MI->csh->detail) { // link with the previous operand MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].avx_zero_opmask = true; } } void op_addAvxSae(MCInst *MI) { if (MI->csh->detail) { MI->flat_insn->detail->x86.avx_sae = true; } } void op_addAvxBroadcast(MCInst *MI, x86_avx_bcast v) { if (MI->csh->detail) { // link with the previous operand MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].avx_bcast = v; } } #ifndef CAPSTONE_DIET // map instruction to its characteristics typedef struct insn_op { uint64_t flags; // how this instruction update EFLAGS(arithmetic instrcutions) of FPU FLAGS(for FPU instructions) uint8_t access[6]; } insn_op; static insn_op insn_ops[] = { { /* NULL item */ 0, { 0 } }, #ifdef CAPSTONE_X86_REDUCE #include "X86MappingInsnOp_reduce.inc" #else #include "X86MappingInsnOp.inc" #endif }; // given internal insn id, return operand access info uint8_t *X86_get_op_access(cs_struct *h, unsigned int id, uint64_t *eflags) { int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { *eflags = insn_ops[i].flags; return insn_ops[i].access; } return NULL; } void X86_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count) { uint8_t i; uint8_t read_count, write_count; cs_x86 *x86 = &(insn->detail->x86); read_count = insn->detail->regs_read_count; write_count = insn->detail->regs_write_count; // implicit registers memcpy(regs_read, insn->detail->regs_read, read_count * sizeof(insn->detail->regs_read[0])); memcpy(regs_write, insn->detail->regs_write, write_count * sizeof(insn->detail->regs_write[0])); // explicit registers for (i = 0; i < x86->op_count; i++) { cs_x86_op *op = &(x86->operands[i]); switch((int)op->type) { case X86_OP_REG: if ((op->access & CS_AC_READ) && !arr_exist(regs_read, read_count, op->reg)) { regs_read[read_count] = op->reg; read_count++; } if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) { regs_write[write_count] = op->reg; write_count++; } break; case X86_OP_MEM: // registers appeared in memory references always being read if ((op->mem.segment != X86_REG_INVALID)) { regs_read[read_count] = op->mem.segment; read_count++; } if ((op->mem.base != X86_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.base)) { regs_read[read_count] = op->mem.base; read_count++; } if ((op->mem.index != X86_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.index)) { regs_read[read_count] = op->mem.index; read_count++; } default: break; } } *regs_read_count = read_count; *regs_write_count = write_count; } #endif // map immediate size to instruction id static struct size_id { uint8_t enc_size; uint8_t size; uint16_t id; } x86_imm_size[] = { #include "X86ImmSize.inc" }; // given the instruction name, return the size of its immediate operand (or 0) uint8_t X86_immediate_size(unsigned int id, uint8_t *enc_size) { #if 0 // linear searching unsigned int i; for (i = 0; i < ARR_SIZE(x86_imm_size); i++) { if (id == x86_imm_size[i].id) { return x86_imm_size[i].size; } } #endif // binary searching since the IDs are sorted in order unsigned int left, right, m; left = 0; right = ARR_SIZE(x86_imm_size) - 1; while(left <= right) { m = (left + right) / 2; if (id == x86_imm_size[m].id) { if (enc_size != NULL) *enc_size = x86_imm_size[m].enc_size; return x86_imm_size[m].size; } if (id < x86_imm_size[m].id) right = m - 1; else left = m + 1; } // not found return 0; } #endif capstone-sys-0.11.0/capstone/arch/X86/X86Mapping.h010066400017500001750000000045231363402546700176520ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_X86_MAP_H #define CS_X86_MAP_H #include "capstone/capstone.h" #include "../../cs_priv.h" // map sib_base to x86_reg x86_reg x86_map_sib_base(int r); // map sib_index to x86_reg x86_reg x86_map_sib_index(int r); // map seg_override to x86_reg x86_reg x86_map_segment(int r); // return name of regiser in friendly string const char *X86_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); // return insn name, given insn id const char *X86_insn_name(csh handle, unsigned int id); // return group name, given group id const char *X86_group_name(csh handle, unsigned int id); // return register of given instruction id // return 0 if not found // this is to handle instructions embedding accumulate registers into AsmStrs[] x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access); x86_reg X86_insn_reg_att(unsigned int id, enum cs_ac_type *access); bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2); bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2); extern const uint64_t arch_masks[9]; // handle LOCK/REP/REPNE prefixes // return True if we patch mnemonic, like in MULPD case bool X86_lockrep(MCInst *MI, SStream *O); // map registers to sizes extern const uint8_t regsize_map_32[]; extern const uint8_t regsize_map_64[]; void op_addReg(MCInst *MI, int reg); void op_addImm(MCInst *MI, int v); void op_addAvxBroadcast(MCInst *MI, x86_avx_bcast v); void op_addXopCC(MCInst *MI, int v); void op_addSseCC(MCInst *MI, int v); void op_addAvxCC(MCInst *MI, int v); void op_addAvxZeroOpmask(MCInst *MI); void op_addAvxSae(MCInst *MI); void op_addAvxRoundingMode(MCInst *MI, int v); // given internal insn id, return operand access info uint8_t *X86_get_op_access(cs_struct *h, unsigned int id, uint64_t *eflags); void X86_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count); // given the instruction id, return the size of its immediate operand (or 0) uint8_t X86_immediate_size(unsigned int id, uint8_t *enc_size); #endif capstone-sys-0.11.0/capstone/arch/X86/X86MappingInsn.inc010066400017500001750000036011521363402546700210300ustar0000000000000000// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) // By Nguyen Anh Quynh { X86_AAA, X86_INS_AAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AAD8i8, X86_INS_AAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AAM8i8, X86_INS_AAM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AAS, X86_INS_AAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ABS_F, X86_INS_FABS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADC16i16, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16ri, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32i32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32ri, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64i32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64mi32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64ri32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8i8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADC8mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8ri, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADC8rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADCX32rm, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADCX32rr, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADCX64rm, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADCX64rr, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADD16i16, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32i32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64i32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64mi32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64ri32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8i8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADD8mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADD8rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADDPDrm, X86_INS_ADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ADDPDrr, X86_INS_ADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ADDPSrm, X86_INS_ADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ADDPSrr, X86_INS_ADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ADDSDrm, X86_INS_ADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ADDSDrm_Int, X86_INS_ADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ADDSDrr, X86_INS_ADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ADDSDrr_Int, X86_INS_ADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ADDSSrm, X86_INS_ADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ADDSSrm_Int, X86_INS_ADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ADDSSrr, X86_INS_ADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ADDSSrr_Int, X86_INS_ADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ADDSUBPDrm, X86_INS_ADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_ADDSUBPDrr, X86_INS_ADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_ADDSUBPSrm, X86_INS_ADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_ADDSUBPSrr, X86_INS_ADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_ADD_F32m, X86_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADD_F64m, X86_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADD_FI16m, X86_INS_FIADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADD_FI32m, X86_INS_FIADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADD_FPrST0, X86_INS_FADDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADD_FST0r, X86_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADD_FrST0, X86_INS_FADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ADOX32rm, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADOX32rr, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADOX64rm, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADOX64rr, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_AESDECLASTrm, X86_INS_AESDECLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESDECLASTrr, X86_INS_AESDECLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESDECrm, X86_INS_AESDEC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESDECrr, X86_INS_AESDEC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESENCLASTrm, X86_INS_AESENCLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESENCLASTrr, X86_INS_AESENCLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESENCrm, X86_INS_AESENC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESENCrr, X86_INS_AESENC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESIMCrm, X86_INS_AESIMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESIMCrr, X86_INS_AESIMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESKEYGENASSIST128rm, X86_INS_AESKEYGENASSIST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AESKEYGENASSIST128rr, X86_INS_AESKEYGENASSIST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_AND16i16, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32i32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64i32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64mi32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64ri32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8i8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AND8mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AND8rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ANDN32rm, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDN32rr, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDN64rm, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDN64rr, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDNPDrm, X86_INS_ANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ANDNPDrr, X86_INS_ANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ANDNPSrm, X86_INS_ANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ANDNPSrr, X86_INS_ANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ANDPDrm, X86_INS_ANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ANDPDrr, X86_INS_ANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ANDPSrm, X86_INS_ANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ANDPSrr, X86_INS_ANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ARPL16mr, X86_INS_ARPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ARPL16rr, X86_INS_ARPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_BEXTR32rm, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTR32rr, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTR64rm, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTR64rr, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTRI32mi, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BEXTRI32ri, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BEXTRI64mi, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BEXTRI64ri, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL32rm, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL32rr, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL64rm, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL64rr, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI32rm, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI32rr, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI64rm, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI64rr, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC32rm, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC32rr, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC64rm, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC64rr, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK32rm, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK32rr, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK64rm, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK64rr, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS32rm, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS32rr, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS64rm, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS64rr, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLENDPDrmi, X86_INS_BLENDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDPDrri, X86_INS_BLENDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDPSrmi, X86_INS_BLENDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDPSrri, X86_INS_BLENDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDVPDrm0, X86_INS_BLENDVPD, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDVPDrr0, X86_INS_BLENDVPD, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDVPSrm0, X86_INS_BLENDVPS, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLENDVPSrr0, X86_INS_BLENDVPS, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_BLSFILL32rm, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL32rr, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL64rm, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL64rr, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSI32rm, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSI32rr, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSI64rm, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSI64rr, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSIC32rm, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSIC32rr, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSIC64rm, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSIC64rr, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSMSK32rm, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSMSK32rr, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSMSK64rm, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSMSK64rr, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR32rm, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR32rr, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR64rm, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR64rr, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BOUNDS16rm, X86_INS_BOUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_BOUNDS32rm, X86_INS_BOUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_BSF16rm, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF16rr, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF32rm, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF32rr, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF64rm, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF64rr, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR16rm, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR16rr, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR32rm, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR32rr, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR64rm, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR64rr, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSWAP32r, X86_INS_BSWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_BSWAP64r, X86_INS_BSWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_BT16mi8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT16mr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT16ri8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT16rr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32mi8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32mr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32ri8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32rr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64mi8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64mr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64ri8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64rr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16mi8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16mr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16ri8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16rr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32mi8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32mr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32ri8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32rr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64mi8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64mr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64ri8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64rr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16mi8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16mr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16ri8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16rr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32mi8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32mr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32ri8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32rr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64mi8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64mr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64ri8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64rr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16mi8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16mr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16ri8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16rr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32mi8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32mr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32ri8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32rr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64mi8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64mr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64ri8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64rr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BZHI32rm, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_BZHI32rr, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_BZHI64rm, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_BZHI64rr, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_CALL16m, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL16r, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL32m, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL32r, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL64m, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_CALL64pcrel32, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_CALL, X86_GRP_BRANCH_RELATIVE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_CALL64r, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_CALLpcrel16, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_BRANCH_RELATIVE, 0 }, 0, 0 #endif }, { X86_CALLpcrel32, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_BRANCH_RELATIVE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CBW, X86_INS_CBW, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_CDQ, X86_INS_CDQ, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0 #endif }, { X86_CDQE, X86_INS_CDQE, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_RAX, 0 }, { 0 }, 0, 0 #endif }, { X86_CHS_F, X86_INS_FCHS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CLAC, X86_INS_CLAC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_CLC, X86_INS_CLC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CLD, X86_INS_CLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CLFLUSH, X86_INS_CLFLUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CLGI, X86_INS_CLGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_CLI, X86_INS_CLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_CLTS, X86_INS_CLTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CLWB, X86_INS_CLWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMC, X86_INS_CMC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMOVA16rm, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA16rr, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA32rm, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA32rr, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA64rm, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA64rr, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE16rm, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE16rr, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE32rm, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE32rr, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE64rm, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE64rr, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB16rm, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB16rr, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB32rm, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB32rr, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB64rm, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB64rr, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE16rm, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE16rr, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE32rm, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE32rr, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE64rm, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE64rr, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE_F, X86_INS_FCMOVBE, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVB_F, X86_INS_FCMOVB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVE16rm, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE16rr, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE32rm, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE32rr, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE64rm, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE64rr, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE_F, X86_INS_FCMOVE, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVG16rm, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG16rr, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG32rm, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG32rr, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG64rm, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG64rr, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE16rm, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE16rr, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE32rm, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE32rr, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE64rm, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE64rr, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL16rm, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL16rr, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL32rm, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL32rr, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL64rm, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL64rr, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE16rm, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE16rr, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE32rm, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE32rr, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE64rm, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE64rr, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNBE_F, X86_INS_FCMOVNBE, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVNB_F, X86_INS_FCMOVNB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE16rm, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE16rr, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE32rm, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE32rr, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE64rm, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE64rr, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE_F, X86_INS_FCMOVNE, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVNO16rm, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO16rr, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO32rm, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO32rr, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO64rm, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO64rr, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP16rm, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP16rr, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP32rm, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP32rr, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP64rm, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP64rr, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP_F, X86_INS_FCMOVNU, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVNS16rm, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS16rr, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS32rm, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS32rr, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS64rm, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS64rr, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO16rm, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO16rr, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO32rm, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO32rr, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO64rm, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO64rr, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP16rm, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP16rr, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP32rm, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP32rr, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP64rm, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP64rr, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP_F, X86_INS_FCMOVU, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CMOVS16rm, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS16rr, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS32rm, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS32rr, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS64rm, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS64rr, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMP16i16, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16ri, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32i32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32ri, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64i32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64mi32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64ri32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8i8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CMP8mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8ri, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CMP8rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPPDrmi, X86_INS_CMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPPDrmi_alt, X86_INS_CMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPPDrri, X86_INS_CMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPPDrri_alt, X86_INS_CMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPPSrmi, X86_INS_CMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPPSrmi_alt, X86_INS_CMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPPSrri, X86_INS_CMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPPSrri_alt, X86_INS_CMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPSB, X86_INS_CMPSB, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSDrm, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPSDrm_alt, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPSDrr, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPSDrr_alt, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CMPSL, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSQ, X86_INS_CMPSQ, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSSrm, X86_INS_CMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPSSrm_alt, X86_INS_CMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPSSrr, X86_INS_CMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPSSrr_alt, X86_INS_CMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CMPSW, X86_INS_CMPSW, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG16B, X86_INS_CMPXCHG16B, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG16rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG16rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG32rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG32rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG64rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG64rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG8B, X86_INS_CMPXCHG8B, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG8rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG8rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_COMISDrm, X86_INS_COMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_COMISDrr, X86_INS_COMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_COMISSrm, X86_INS_COMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_COMISSrr, X86_INS_COMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_COMP_FST0r, X86_INS_FCOMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_COM_FIPr, X86_INS_FCOMIP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_COM_FIr, X86_INS_FCOMI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_COM_FST0r, X86_INS_FCOM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_COS_F, X86_INS_FCOS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_CPUID, X86_INS_CPUID, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, 0, 0 #endif }, { X86_CQO, X86_INS_CQO, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0 #endif }, { X86_CRC32r32m16, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r32m32, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r32m8, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r32r16, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r32r32, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r32r8, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r64m64, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r64m8, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r64r64, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CRC32r64r8, X86_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_CVTDQ2PDrm, X86_INS_CVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTDQ2PDrr, X86_INS_CVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTDQ2PSrm, X86_INS_CVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTDQ2PSrr, X86_INS_CVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPD2DQrm, X86_INS_CVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPD2DQrr, X86_INS_CVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPD2PSrm, X86_INS_CVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPD2PSrr, X86_INS_CVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPS2DQrm, X86_INS_CVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPS2DQrr, X86_INS_CVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPS2PDrm, X86_INS_CVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTPS2PDrr, X86_INS_CVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSD2SI64rm, X86_INS_CVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSD2SI64rr, X86_INS_CVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSD2SIrm, X86_INS_CVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSD2SIrr, X86_INS_CVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSD2SSrm, X86_INS_CVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSD2SSrr, X86_INS_CVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSI2SD64rm, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSI2SD64rr, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSI2SDrm, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSI2SDrr, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSI2SS64rm, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSI2SS64rr, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSI2SSrm, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSI2SSrr, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSS2SDrm, X86_INS_CVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSS2SDrr, X86_INS_CVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTSS2SI64rm, X86_INS_CVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSS2SI64rr, X86_INS_CVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSS2SIrm, X86_INS_CVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTSS2SIrr, X86_INS_CVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTTPD2DQrm, X86_INS_CVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTPD2DQrr, X86_INS_CVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTPS2DQrm, X86_INS_CVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTPS2DQrr, X86_INS_CVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTSD2SI64rm, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTSD2SI64rr, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTSD2SIrm, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTSD2SIrr, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_CVTTSS2SI64rm, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTTSS2SI64rr, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTTSS2SIrm, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CVTTSS2SIrr, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_CWD, X86_INS_CWD, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, 0 }, { 0 }, 0, 0 #endif }, { X86_CWDE, X86_INS_CWDE, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_DAA, X86_INS_DAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DAS, X86_INS_DAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DATA16_PREFIX, X86_INS_DATA16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_DEC16m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC16r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC16r_alt, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DEC32m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC32r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC32r_alt, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DEC64m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC64r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC8m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC8r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV16m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV16r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV32m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV32r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV64m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV64r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV8m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV8r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIVPDrm, X86_INS_DIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_DIVPDrr, X86_INS_DIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_DIVPSrm, X86_INS_DIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_DIVPSrr, X86_INS_DIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_DIVR_F32m, X86_INS_FDIVR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVR_F64m, X86_INS_FDIVR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVR_FI16m, X86_INS_FIDIVR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVR_FI32m, X86_INS_FIDIVR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVR_FPrST0, X86_INS_FDIVRP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVR_FST0r, X86_INS_FDIVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVR_FrST0, X86_INS_FDIVR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIVSDrm, X86_INS_DIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_DIVSDrm_Int, X86_INS_DIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_DIVSDrr, X86_INS_DIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_DIVSDrr_Int, X86_INS_DIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_DIVSSrm, X86_INS_DIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_DIVSSrm_Int, X86_INS_DIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_DIVSSrr, X86_INS_DIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_DIVSSrr_Int, X86_INS_DIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_DIV_F32m, X86_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIV_F64m, X86_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIV_FI16m, X86_INS_FIDIV, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIV_FI32m, X86_INS_FIDIV, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIV_FPrST0, X86_INS_FDIVP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIV_FST0r, X86_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DIV_FrST0, X86_INS_FDIV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_DPPDrmi, X86_INS_DPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_DPPDrri, X86_INS_DPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_DPPSrmi, X86_INS_DPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_DPPSrri, X86_INS_DPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ENCLS, X86_INS_ENCLS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_ENCLU, X86_INS_ENCLU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_ENTER, X86_INS_ENTER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_EXTRACTPSmr, X86_INS_EXTRACTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_EXTRACTPSrr, X86_INS_EXTRACTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_EXTRQ, X86_INS_EXTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0 #endif }, { X86_EXTRQI, X86_INS_EXTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0 #endif }, { X86_F2XM1, X86_INS_F2XM1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FARCALL16i, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_FARCALL16m, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_FARCALL32i, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_FARCALL32m, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_FARCALL64, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_FARJMP16i, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_FARJMP16m, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { X86_FARJMP32i, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_FARJMP32m, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { X86_FARJMP64, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { X86_FBLDm, X86_INS_FBLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FBSTPm, X86_INS_FBSTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FCOM32m, X86_INS_FCOM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FCOM64m, X86_INS_FCOM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FCOMP32m, X86_INS_FCOMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FCOMP64m, X86_INS_FCOMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FCOMPP, X86_INS_FCOMPP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FDECSTP, X86_INS_FDECSTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FEMMS, X86_INS_FEMMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_FFREE, X86_INS_FFREE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FICOM16m, X86_INS_FICOM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FICOM32m, X86_INS_FICOM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FICOMP16m, X86_INS_FICOMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FICOMP32m, X86_INS_FICOMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FINCSTP, X86_INS_FINCSTP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FLDCW16m, X86_INS_FLDCW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FLDENVm, X86_INS_FLDENV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FLDL2E, X86_INS_FLDL2E, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FLDL2T, X86_INS_FLDL2T, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FLDLG2, X86_INS_FLDLG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FLDLN2, X86_INS_FLDLN2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FLDPI, X86_INS_FLDPI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FNCLEX, X86_INS_FNCLEX, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FNINIT, X86_INS_FNINIT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FNOP, X86_INS_FNOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FNSTCW16m, X86_INS_FNSTCW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FNSTSW16r, X86_INS_FNSTSW, #ifndef CAPSTONE_DIET { X86_REG_FPSW, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_FNSTSWm, X86_INS_FNSTSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FPATAN, X86_INS_FPATAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FPREM, X86_INS_FPREM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FPREM1, X86_INS_FPREM1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FPTAN, X86_INS_FPTAN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FP_FFREEP, X86_INS_FFREEP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0 #endif }, { X86_FRNDINT, X86_INS_FRNDINT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FRSTORm, X86_INS_FRSTOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FSAVEm, X86_INS_FNSAVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FSCALE, X86_INS_FSCALE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FSETPM, X86_INS_FSETPM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FSINCOS, X86_INS_FSINCOS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FSTENVm, X86_INS_FNSTENV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FXAM, X86_INS_FXAM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FXRSTOR, X86_INS_FXRSTOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FXRSTOR64, X86_INS_FXRSTOR64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_FXSAVE, X86_INS_FXSAVE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FXSAVE64, X86_INS_FXSAVE64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_FXTRACT, X86_INS_FXTRACT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FYL2X, X86_INS_FYL2X, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FYL2XP1, X86_INS_FYL2XP1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_FsANDNPDrm, X86_INS_ANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsANDNPDrr, X86_INS_ANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsANDNPSrm, X86_INS_ANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsANDNPSrr, X86_INS_ANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsANDPDrm, X86_INS_ANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsANDPDrr, X86_INS_ANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsANDPSrm, X86_INS_ANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsANDPSrr, X86_INS_ANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsMOVAPDrm, X86_INS_MOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsMOVAPSrm, X86_INS_MOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsORPDrm, X86_INS_ORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsORPDrr, X86_INS_ORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsORPSrm, X86_INS_ORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsORPSrr, X86_INS_ORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsVMOVAPDrm, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_FsVMOVAPSrm, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_FsXORPDrm, X86_INS_XORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsXORPDrr, X86_INS_XORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FsXORPSrm, X86_INS_XORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FsXORPSrr, X86_INS_XORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvANDNPDrm, X86_INS_ANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvANDNPDrr, X86_INS_ANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvANDNPSrm, X86_INS_ANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvANDNPSrr, X86_INS_ANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvANDPDrm, X86_INS_ANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvANDPDrr, X86_INS_ANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvANDPSrm, X86_INS_ANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvANDPSrr, X86_INS_ANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvORPDrm, X86_INS_ORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvORPDrr, X86_INS_ORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvORPSrm, X86_INS_ORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvORPSrr, X86_INS_ORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvXORPDrm, X86_INS_XORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvXORPDrr, X86_INS_XORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_FvXORPSrm, X86_INS_XORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_FvXORPSrr, X86_INS_XORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_GETSEC, X86_INS_GETSEC, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, 0 }, { 0 }, 0, 0 #endif }, { X86_HADDPDrm, X86_INS_HADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HADDPDrr, X86_INS_HADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HADDPSrm, X86_INS_HADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HADDPSrr, X86_INS_HADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HLT, X86_INS_HLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_HSUBPDrm, X86_INS_HSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HSUBPDrr, X86_INS_HSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HSUBPSrm, X86_INS_HSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_HSUBPSrr, X86_INS_HSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_IDIV16m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV16r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV32m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV32r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV64m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV64r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV8m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV8r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ILD_F16m, X86_INS_FILD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ILD_F32m, X86_INS_FILD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ILD_F64m, X86_INS_FILD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_IMUL16m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rm, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rmi, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rmi8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rr, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rri, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rri8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rm, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rmi, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rmi8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rr, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rri, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rri8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rm, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rmi32, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rmi8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rr, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rri32, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rri8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL8m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL8r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN16ri, X86_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN16rr, X86_INS_IN, #ifndef CAPSTONE_DIET { X86_REG_DX, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN32ri, X86_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN32rr, X86_INS_IN, #ifndef CAPSTONE_DIET { X86_REG_DX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN8ri, X86_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0 #endif }, { X86_IN8rr, X86_INS_IN, #ifndef CAPSTONE_DIET { X86_REG_DX, 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0 #endif }, { X86_INC16m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC16r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC16r_alt, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INC32m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC32r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC32r_alt, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INC64m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC64r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC8m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC8r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INSB, X86_INS_INSB, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_INSERTPSrm, X86_INS_INSERTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_INSERTPSrr, X86_INS_INSERTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_INSERTQ, X86_INS_INSERTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0 #endif }, { X86_INSERTQI, X86_INS_INSERTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0 #endif }, { X86_INSL, X86_INS_INSD, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_INSW, X86_INS_INSW, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_INT, X86_INS_INT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_INT1, X86_INS_INT1, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_INT3, X86_INS_INT3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_INTO, X86_INS_INTO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_INT, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVD, X86_INS_INVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_INVEPT32, X86_INS_INVEPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVEPT64, X86_INS_INVEPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_INVLPG, X86_INS_INVLPG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_INVLPGA32, X86_INS_INVLPGA, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVLPGA64, X86_INS_INVLPGA, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_INVPCID32, X86_INS_INVPCID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVPCID64, X86_INS_INVPCID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_INVVPID32, X86_INS_INVVPID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVVPID64, X86_INS_INVVPID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_IRET16, X86_INS_IRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_IRET32, X86_INS_IRETD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_IRET64, X86_INS_IRETQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_ISTT_FP16m, X86_INS_FISTTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ISTT_FP32m, X86_INS_FISTTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ISTT_FP64m, X86_INS_FISTTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_IST_F16m, X86_INS_FIST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_IST_F32m, X86_INS_FIST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_IST_FP16m, X86_INS_FISTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_IST_FP32m, X86_INS_FISTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_IST_FP64m, X86_INS_FISTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_Int_CMPSDrm, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CMPSDrr, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CMPSSrm, X86_INS_CMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CMPSSrr, X86_INS_CMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_COMISDrm, X86_INS_COMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_COMISDrr, X86_INS_COMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_COMISSrm, X86_INS_COMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_COMISSrr, X86_INS_COMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTSD2SSrm, X86_INS_CVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSD2SSrr, X86_INS_CVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SD64rm, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SD64rr, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SDrm, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SDrr, X86_INS_CVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SS64rm, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SS64rr, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SSrm, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTSI2SSrr, X86_INS_CVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTSS2SDrm, X86_INS_CVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTSS2SDrr, X86_INS_CVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTTSD2SI64rm, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTTSD2SI64rr, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTTSD2SIrm, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTTSD2SIrr, X86_INS_CVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_CVTTSS2SI64rm, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTTSS2SI64rr, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTTSS2SIrm, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_CVTTSS2SIrr, X86_INS_CVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_UCOMISDrm, X86_INS_UCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_UCOMISDrr, X86_INS_UCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_Int_UCOMISSrm, X86_INS_UCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_UCOMISSrr, X86_INS_UCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_Int_VCMPSDrm, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCMPSDrr, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCMPSSrm, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCMPSSrr, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCOMISDZrm, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCOMISDZrr, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCOMISDrm, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCOMISDrr, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCOMISSZrm, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCOMISSZrr, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCOMISSrm, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCOMISSrr, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSD2SSrm, X86_INS_VCVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSD2SSrr, X86_INS_VCVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SD64Zrm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SD64Zrr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SD64rm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SD64rr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SDZrm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SDZrr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SDrm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SDrr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SS64Zrm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SS64Zrr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SS64rm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SS64rr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SSZrm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SSZrr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SSrm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSI2SSrr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSS2SDrm, X86_INS_VCVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTSS2SDrr, X86_INS_VCVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SD64Zrm, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SD64Zrr, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SS64Zrm, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SS64Zrr, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISDZrm, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISDZrr, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISDrm, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISDrr, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISSZrm, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISSZrr, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISSrm, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_Int_VUCOMISSrr, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_JAE_1, X86_INS_JAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JAE_2, X86_INS_JAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JAE_4, X86_INS_JAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JA_1, X86_INS_JA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JA_2, X86_INS_JA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JA_4, X86_INS_JA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JBE_1, X86_INS_JBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JBE_2, X86_INS_JBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JBE_4, X86_INS_JBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JB_1, X86_INS_JB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JB_2, X86_INS_JB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JB_4, X86_INS_JB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JCXZ, X86_INS_JCXZ, #ifndef CAPSTONE_DIET { X86_REG_CX, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JECXZ, X86_INS_JECXZ, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JE_1, X86_INS_JE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JE_2, X86_INS_JE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JE_4, X86_INS_JE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JGE_1, X86_INS_JGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JGE_2, X86_INS_JGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JGE_4, X86_INS_JGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JG_1, X86_INS_JG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JG_2, X86_INS_JG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JG_4, X86_INS_JG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JLE_1, X86_INS_JLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JLE_2, X86_INS_JLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JLE_4, X86_INS_JLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JL_1, X86_INS_JL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JL_2, X86_INS_JL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JL_4, X86_INS_JL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JMP16m, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP16r, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP32m, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP32r, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP64m, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1 #endif }, { X86_JMP64r, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1 #endif }, { X86_JMP_1, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JMP_2, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JMP_4, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNE_1, X86_INS_JNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNE_2, X86_INS_JNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNE_4, X86_INS_JNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNO_1, X86_INS_JNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNO_2, X86_INS_JNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNO_4, X86_INS_JNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNP_1, X86_INS_JNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNP_2, X86_INS_JNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNP_4, X86_INS_JNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNS_1, X86_INS_JNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNS_2, X86_INS_JNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JNS_4, X86_INS_JNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JO_1, X86_INS_JO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JO_2, X86_INS_JO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JO_4, X86_INS_JO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JP_1, X86_INS_JP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JP_2, X86_INS_JP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JP_4, X86_INS_JP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JRCXZ, X86_INS_JRCXZ, #ifndef CAPSTONE_DIET { X86_REG_RCX, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JS_1, X86_INS_JS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JS_2, X86_INS_JS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_JS_4, X86_INS_JS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 1, 0 #endif }, { X86_KANDBrr, X86_INS_KANDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KANDDrr, X86_INS_KANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KANDNBrr, X86_INS_KANDNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KANDNDrr, X86_INS_KANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KANDNQrr, X86_INS_KANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KANDNWrr, X86_INS_KANDNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KANDQrr, X86_INS_KANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KANDWrr, X86_INS_KANDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KMOVBkk, X86_INS_KMOVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KMOVBkm, X86_INS_KMOVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KMOVBkr, X86_INS_KMOVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KMOVBmk, X86_INS_KMOVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KMOVBrk, X86_INS_KMOVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KMOVDkk, X86_INS_KMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVDkm, X86_INS_KMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVDkr, X86_INS_KMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVDmk, X86_INS_KMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVDrk, X86_INS_KMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVQkk, X86_INS_KMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVQkm, X86_INS_KMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVQkr, X86_INS_KMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVQmk, X86_INS_KMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVQrk, X86_INS_KMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KMOVWkk, X86_INS_KMOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KMOVWkm, X86_INS_KMOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KMOVWkr, X86_INS_KMOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KMOVWmk, X86_INS_KMOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KMOVWrk, X86_INS_KMOVW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KNOTBrr, X86_INS_KNOTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KNOTDrr, X86_INS_KNOTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KNOTQrr, X86_INS_KNOTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KNOTWrr, X86_INS_KNOTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KORBrr, X86_INS_KORB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KORDrr, X86_INS_KORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KORQrr, X86_INS_KORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KORTESTBrr, X86_INS_KORTESTB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KORTESTDrr, X86_INS_KORTESTD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KORTESTQrr, X86_INS_KORTESTQ, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KORTESTWrr, X86_INS_KORTESTW, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KORWrr, X86_INS_KORW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KSHIFTLBri, X86_INS_KSHIFTLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KSHIFTLDri, X86_INS_KSHIFTLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KSHIFTLQri, X86_INS_KSHIFTLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KSHIFTLWri, X86_INS_KSHIFTLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KSHIFTRBri, X86_INS_KSHIFTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KSHIFTRDri, X86_INS_KSHIFTRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KSHIFTRQri, X86_INS_KSHIFTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KSHIFTRWri, X86_INS_KSHIFTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KUNPCKBWrr, X86_INS_KUNPCKBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KXNORBrr, X86_INS_KXNORB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KXNORDrr, X86_INS_KXNORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KXNORQrr, X86_INS_KXNORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KXNORWrr, X86_INS_KXNORW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_KXORBrr, X86_INS_KXORB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_KXORDrr, X86_INS_KXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KXORQrr, X86_INS_KXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_KXORWrr, X86_INS_KXORW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_LAHF, X86_INS_LAHF, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_AH, 0 }, { 0 }, 0, 0 #endif }, { X86_LAR16rm, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR16rr, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR32rm, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR32rr, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR64rm, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR64rr, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG16, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG16B, X86_INS_CMPXCHG16B, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG32, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG64, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG8, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG8B, X86_INS_CMPXCHG8B, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LDDQUrm, X86_INS_LDDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_LDMXCSR, X86_INS_LDMXCSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_LDS16rm, X86_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LDS32rm, X86_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LD_F0, X86_INS_FLDZ, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_LD_F1, X86_INS_FLD1, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_LD_F32m, X86_INS_FLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_LD_F64m, X86_INS_FLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_LD_F80m, X86_INS_FLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_LD_Frr, X86_INS_FLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_LEA16r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LEA32r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LEA64_32r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LEA64r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LEAVE, X86_INS_LEAVE, #ifndef CAPSTONE_DIET { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LEAVE64, X86_INS_LEAVE, #ifndef CAPSTONE_DIET { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LES16rm, X86_INS_LES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LES32rm, X86_INS_LES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LFENCE, X86_INS_LFENCE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_LFS16rm, X86_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LFS32rm, X86_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LFS64rm, X86_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LGDT16m, X86_INS_LGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LGDT32m, X86_INS_LGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LGDT64m, X86_INS_LGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LGS16rm, X86_INS_LGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LGS32rm, X86_INS_LGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LGS64rm, X86_INS_LGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LIDT16m, X86_INS_LIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LIDT32m, X86_INS_LIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LIDT64m, X86_INS_LIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LLDT16m, X86_INS_LLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LLDT16r, X86_INS_LLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LMSW16m, X86_INS_LMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LMSW16r, X86_INS_LMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LOCK_ADD16mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD16mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD16mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD32mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD32mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD32mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD64mi32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD64mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD64mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD8mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD8mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND16mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND16mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND16mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND32mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND32mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND32mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND64mi32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND64mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND64mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND8mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND8mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC16m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC32m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC64m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC8m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC16m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC32m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC64m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC8m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR16mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR16mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR16mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR32mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR32mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR32mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR64mi32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR64mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR64mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR8mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR8mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB16mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB16mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB16mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB32mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB32mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB32mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB64mi32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB64mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB64mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB8mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB8mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR16mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR16mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR16mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR32mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR32mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR32mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR64mi32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR64mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR64mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR8mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR8mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSB, X86_INS_LODSB, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AL, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSL, X86_INS_LODSD, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EAX, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSQ, X86_INS_LODSQ, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_RAX, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSW, X86_INS_LODSW, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AX, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LOOP, X86_INS_LOOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 0, 0 #endif }, { X86_LOOPE, X86_INS_LOOPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 0, 0 #endif }, { X86_LOOPNE, X86_INS_LOOPNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BRANCH_RELATIVE, 0 }, 0, 0 #endif }, { X86_LRETIL, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LRETIQ, X86_INS_RETFQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LRETIW, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LRETL, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LRETQ, X86_INS_RETFQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LRETW, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LSL16rm, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL16rr, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL32rm, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL32rr, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL64rm, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL64rr, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSS16rm, X86_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSS32rm, X86_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSS64rm, X86_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LTRm, X86_INS_LTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LTRr, X86_INS_LTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LXADD16, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LXADD32, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LXADD64, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LXADD8, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT16rm, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT16rr, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT32rm, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT32rr, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT64rm, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT64rr, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MASKMOVDQU, X86_INS_MASKMOVDQU, #ifndef CAPSTONE_DIET { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_SSE2, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MASKMOVDQU64, X86_INS_MASKMOVDQU, #ifndef CAPSTONE_DIET { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_SSE2, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MAXCPDrm, X86_INS_MAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXCPDrr, X86_INS_MAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXCPSrm, X86_INS_MAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXCPSrr, X86_INS_MAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXCSDrm, X86_INS_MAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXCSDrr, X86_INS_MAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXCSSrm, X86_INS_MAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXCSSrr, X86_INS_MAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXPDrm, X86_INS_MAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXPDrr, X86_INS_MAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXPSrm, X86_INS_MAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXPSrr, X86_INS_MAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXSDrm, X86_INS_MAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXSDrm_Int, X86_INS_MAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXSDrr, X86_INS_MAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXSDrr_Int, X86_INS_MAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MAXSSrm, X86_INS_MAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXSSrm_Int, X86_INS_MAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXSSrr, X86_INS_MAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MAXSSrr_Int, X86_INS_MAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MFENCE, X86_INS_MFENCE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINCPDrm, X86_INS_MINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINCPDrr, X86_INS_MINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINCPSrm, X86_INS_MINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINCPSrr, X86_INS_MINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINCSDrm, X86_INS_MINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINCSDrr, X86_INS_MINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINCSSrm, X86_INS_MINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINCSSrr, X86_INS_MINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINPDrm, X86_INS_MINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINPDrr, X86_INS_MINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINPSrm, X86_INS_MINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINPSrr, X86_INS_MINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINSDrm, X86_INS_MINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINSDrm_Int, X86_INS_MINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINSDrr, X86_INS_MINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINSDrr_Int, X86_INS_MINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MINSSrm, X86_INS_MINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINSSrm_Int, X86_INS_MINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINSSrr, X86_INS_MINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MINSSrr_Int, X86_INS_MINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_CVTPD2PIirm, X86_INS_CVTPD2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_CVTPD2PIirr, X86_INS_CVTPD2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_CVTPI2PDirm, X86_INS_CVTPI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_CVTPI2PDirr, X86_INS_CVTPI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_CVTPI2PSirm, X86_INS_CVTPI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_CVTPI2PSirr, X86_INS_CVTPI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_CVTPS2PIirm, X86_INS_CVTPS2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_CVTPS2PIirr, X86_INS_CVTPS2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_CVTTPD2PIirm, X86_INS_CVTTPD2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_CVTTPD2PIirr, X86_INS_CVTTPD2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_CVTTPS2PIirm, X86_INS_CVTTPS2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_CVTTPS2PIirr, X86_INS_CVTTPS2PI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MMX_EMMS, X86_INS_EMMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ, #ifndef CAPSTONE_DIET { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_MMX, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ, #ifndef CAPSTONE_DIET { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_MMX, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64from64rm, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64from64rr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64grr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64mr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64rm, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64rr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64to64rm, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVD64to64rr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVDQ2Qrr, X86_INS_MOVDQ2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_MOVFR642Qrr, X86_INS_MOVDQ2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_MOVNTQmr, X86_INS_MOVNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVQ2DQrr, X86_INS_MOVQ2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_MOVQ2FR64rr, X86_INS_MOVQ2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MMX_MOVQ64mr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVQ64rm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVQ64rr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_MOVQ64rr_REV, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PABSBrm64, X86_INS_PABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PABSBrr64, X86_INS_PABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PABSDrm64, X86_INS_PABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PABSDrr64, X86_INS_PABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PABSWrm64, X86_INS_PABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PABSWrr64, X86_INS_PABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PACKSSDWirm, X86_INS_PACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PACKSSDWirr, X86_INS_PACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PACKSSWBirm, X86_INS_PACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PACKSSWBirr, X86_INS_PACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PACKUSWBirm, X86_INS_PACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PACKUSWBirr, X86_INS_PACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDBirm, X86_INS_PADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDBirr, X86_INS_PADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDDirm, X86_INS_PADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDDirr, X86_INS_PADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDQirm, X86_INS_PADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDQirr, X86_INS_PADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDSBirm, X86_INS_PADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDSBirr, X86_INS_PADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDSWirm, X86_INS_PADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDSWirr, X86_INS_PADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDUSBirm, X86_INS_PADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDUSBirr, X86_INS_PADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDUSWirm, X86_INS_PADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDUSWirr, X86_INS_PADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDWirm, X86_INS_PADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PADDWirr, X86_INS_PADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PALIGNR64irm, X86_INS_PALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PALIGNR64irr, X86_INS_PALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PANDNirm, X86_INS_PANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PANDNirr, X86_INS_PANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PANDirm, X86_INS_PAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PANDirr, X86_INS_PAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PAVGBirm, X86_INS_PAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PAVGBirr, X86_INS_PAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PAVGWirm, X86_INS_PAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PAVGWirr, X86_INS_PAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPEQBirm, X86_INS_PCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPEQBirr, X86_INS_PCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPEQDirm, X86_INS_PCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPEQDirr, X86_INS_PCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPEQWirm, X86_INS_PCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPEQWirr, X86_INS_PCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPGTBirm, X86_INS_PCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPGTBirr, X86_INS_PCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPGTDirm, X86_INS_PCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPGTDirr, X86_INS_PCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPGTWirm, X86_INS_PCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PCMPGTWirr, X86_INS_PCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PEXTRWirri, X86_INS_PEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PHADDSWrm64, X86_INS_PHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHADDSWrr64, X86_INS_PHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHADDWrm64, X86_INS_PHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHADDWrr64, X86_INS_PHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHADDrm64, X86_INS_PHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHADDrr64, X86_INS_PHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHSUBDrm64, X86_INS_PHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHSUBDrr64, X86_INS_PHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHSUBSWrm64, X86_INS_PHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHSUBSWrr64, X86_INS_PHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHSUBWrm64, X86_INS_PHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PHSUBWrr64, X86_INS_PHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PINSRWirmi, X86_INS_PINSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PINSRWirri, X86_INS_PINSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMADDUBSWrm64, X86_INS_PMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PMADDUBSWrr64, X86_INS_PMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PMADDWDirm, X86_INS_PMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMADDWDirr, X86_INS_PMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMAXSWirm, X86_INS_PMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMAXSWirr, X86_INS_PMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMAXUBirm, X86_INS_PMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMAXUBirr, X86_INS_PMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMINSWirm, X86_INS_PMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMINSWirr, X86_INS_PMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMINUBirm, X86_INS_PMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMINUBirr, X86_INS_PMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMOVMSKBrr, X86_INS_PMOVMSKB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULHRSWrm64, X86_INS_PMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PMULHRSWrr64, X86_INS_PMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PMULHUWirm, X86_INS_PMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULHUWirr, X86_INS_PMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULHWirm, X86_INS_PMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULHWirr, X86_INS_PMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULLWirm, X86_INS_PMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULLWirr, X86_INS_PMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULUDQirm, X86_INS_PMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PMULUDQirr, X86_INS_PMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PORirm, X86_INS_POR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PORirr, X86_INS_POR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSADBWirm, X86_INS_PSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSADBWirr, X86_INS_PSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSHUFBrm64, X86_INS_PSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSHUFBrr64, X86_INS_PSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSHUFWmi, X86_INS_PSHUFW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSHUFWri, X86_INS_PSHUFW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSIGNBrm64, X86_INS_PSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSIGNBrr64, X86_INS_PSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSIGNDrm64, X86_INS_PSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSIGNDrr64, X86_INS_PSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSIGNWrm64, X86_INS_PSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSIGNWrr64, X86_INS_PSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_MMX_PSLLDri, X86_INS_PSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLDrm, X86_INS_PSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLDrr, X86_INS_PSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLQri, X86_INS_PSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLQrm, X86_INS_PSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLQrr, X86_INS_PSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLWri, X86_INS_PSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLWrm, X86_INS_PSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSLLWrr, X86_INS_PSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRADri, X86_INS_PSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRADrm, X86_INS_PSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRADrr, X86_INS_PSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRAWri, X86_INS_PSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRAWrm, X86_INS_PSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRAWrr, X86_INS_PSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLDri, X86_INS_PSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLDrm, X86_INS_PSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLDrr, X86_INS_PSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLQri, X86_INS_PSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLQrm, X86_INS_PSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLQrr, X86_INS_PSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLWri, X86_INS_PSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLWrm, X86_INS_PSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSRLWrr, X86_INS_PSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBBirm, X86_INS_PSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBBirr, X86_INS_PSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBDirm, X86_INS_PSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBDirr, X86_INS_PSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBQirm, X86_INS_PSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBQirr, X86_INS_PSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBSBirm, X86_INS_PSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBSBirr, X86_INS_PSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBSWirm, X86_INS_PSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBSWirr, X86_INS_PSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBUSBirm, X86_INS_PSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBUSBirr, X86_INS_PSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBUSWirm, X86_INS_PSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBUSWirr, X86_INS_PSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBWirm, X86_INS_PSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PSUBWirr, X86_INS_PSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKHBWirm, X86_INS_PUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKHBWirr, X86_INS_PUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKHDQirm, X86_INS_PUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKHDQirr, X86_INS_PUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKHWDirm, X86_INS_PUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKHWDirr, X86_INS_PUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKLBWirm, X86_INS_PUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKLBWirr, X86_INS_PUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKLDQirm, X86_INS_PUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKLDQirr, X86_INS_PUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKLWDirm, X86_INS_PUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PUNPCKLWDirr, X86_INS_PUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PXORirm, X86_INS_PXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MMX_PXORirr, X86_INS_PXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0 #endif }, { X86_MONITORrrr, X86_INS_MONITOR, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MONTMUL, X86_INS_MONTMUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RSI, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_RSI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ao16, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16mi, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ms, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16o16a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ri, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ri_alt, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rs, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16sm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV16sr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV32ao16, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32cr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32dr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32mi, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ms, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32o16a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rc, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32rd, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32ri, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ri_alt, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rs, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32sm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV32sr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV64ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64cr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64dr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64mi32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64ms, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rc, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64rd, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64ri, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64ri32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rs, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64sm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV64sr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV64toPQIrm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOV64toPQIrr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOV64toSDrm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOV64toSDrr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOV8ao16, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8mi, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8mr_NOREX, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8o16a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ri, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ri_alt, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rm_NOREX, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rr_NOREX, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVAPDmr, X86_INS_MOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVAPDrm, X86_INS_MOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVAPDrr, X86_INS_MOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVAPDrr_REV, X86_INS_MOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVAPSmr, X86_INS_MOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVAPSrm, X86_INS_MOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVAPSrr, X86_INS_MOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVAPSrr_REV, X86_INS_MOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVBE16mr, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE16rm, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE32mr, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE32rm, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE64mr, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE64rm, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVDDUPrm, X86_INS_MOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MOVDDUPrr, X86_INS_MOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MOVDI2PDIrm, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDI2PDIrr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDI2SSrm, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDI2SSrr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQAmr, X86_INS_MOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQArm, X86_INS_MOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQArr, X86_INS_MOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQArr_REV, X86_INS_MOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQUmr, X86_INS_MOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQUrm, X86_INS_MOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQUrr, X86_INS_MOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVDQUrr_REV, X86_INS_MOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVHLPSrr, X86_INS_MOVHLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVHPDmr, X86_INS_MOVHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVHPDrm, X86_INS_MOVHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVHPSmr, X86_INS_MOVHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVHPSrm, X86_INS_MOVHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVLHPSrr, X86_INS_MOVLHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVLPDmr, X86_INS_MOVLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVLPDrm, X86_INS_MOVLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVLPSmr, X86_INS_MOVLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVLPSrm, X86_INS_MOVLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVMSKPDrr, X86_INS_MOVMSKPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVMSKPSrr, X86_INS_MOVMSKPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVNTDQArm, X86_INS_MOVNTDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_MOVNTDQmr, X86_INS_MOVNTDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVNTI_64mr, X86_INS_MOVNTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVNTImr, X86_INS_MOVNTI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVNTPDmr, X86_INS_MOVNTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVNTPSmr, X86_INS_MOVNTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVNTSD, X86_INS_MOVNTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0 #endif }, { X86_MOVNTSS, X86_INS_MOVNTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0 #endif }, { X86_MOVPDI2DImr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVPDI2DIrr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVPQI2QImr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVPQI2QIrr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVPQIto64rm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVPQIto64rr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVQI2PQIrm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSB, X86_INS_MOVSB, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSDmr, X86_INS_MOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSDrm, X86_INS_MOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSDrr, X86_INS_MOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSDrr_REV, X86_INS_MOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSDto64mr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSDto64rr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSHDUPrm, X86_INS_MOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MOVSHDUPrr, X86_INS_MOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MOVSL, X86_INS_MOVSD, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSLDUPrm, X86_INS_MOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MOVSLDUPrr, X86_INS_MOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_MOVSQ, X86_INS_MOVSQ, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSS2DImr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSS2DIrr, X86_INS_MOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVSSmr, X86_INS_MOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVSSrm, X86_INS_MOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVSSrr, X86_INS_MOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVSSrr_REV, X86_INS_MOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVSW, X86_INS_MOVSW, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX16rm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX16rr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32_NOREXrm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32_NOREXrr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rm16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rr16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rm16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64rm32, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rm32_alt, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64rr16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64rr32, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVUPDmr, X86_INS_MOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVUPDrm, X86_INS_MOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVUPDrr, X86_INS_MOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVUPDrr_REV, X86_INS_MOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVUPSmr, X86_INS_MOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVUPSrm, X86_INS_MOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVUPSrr, X86_INS_MOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVUPSrr_REV, X86_INS_MOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MOVZPQILo2PQIrm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVZPQILo2PQIrr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVZQI2PQIrm, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVZQI2PQIrr, X86_INS_MOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MOVZX16rm8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX16rr8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32_NOREXrm8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32_NOREXrr8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rm16, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rm8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rr16, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rr8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rm16_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rm8_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rr16_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rr8_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MPSADBWrmi, X86_INS_MPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_MPSADBWrri, X86_INS_MPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_MUL16m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL16r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL32m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL32r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL64m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL64r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL8m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL8r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_MULPDrm, X86_INS_MULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MULPDrr, X86_INS_MULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MULPSrm, X86_INS_MULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MULPSrr, X86_INS_MULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MULSDrm, X86_INS_MULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MULSDrm_Int, X86_INS_MULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MULSDrr, X86_INS_MULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MULSDrr_Int, X86_INS_MULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_MULSSrm, X86_INS_MULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MULSSrm_Int, X86_INS_MULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MULSSrr, X86_INS_MULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MULSSrr_Int, X86_INS_MULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_MULX32rm, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MULX32rr, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MULX64rm, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MULX64rr, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MUL_F32m, X86_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MUL_F64m, X86_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MUL_FI16m, X86_INS_FIMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MUL_FI32m, X86_INS_FIMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MUL_FPrST0, X86_INS_FMULP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MUL_FST0r, X86_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MUL_FrST0, X86_INS_FMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_MWAITrr, X86_INS_MWAIT, #ifndef CAPSTONE_DIET { X86_REG_ECX, X86_REG_EAX, 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0 #endif }, { X86_NEG16m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG16r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG32m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG32r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG64m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG64r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG8m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG8r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP19rr, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_19, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1a, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1b, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1c, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1d, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1e, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_19, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1a, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1b, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1c, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1d, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1e, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT16m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT16r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT32m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT32r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT64m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT64r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT8m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT8r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OR16i16, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32i32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mrLocked, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_OR32ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64i32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64mi32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64ri32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8i8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_OR8mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_OR8rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ORPDrm, X86_INS_ORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ORPDrr, X86_INS_ORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_ORPSrm, X86_INS_ORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_ORPSrr, X86_INS_ORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_OUT16ir, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT16rr, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT32ir, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT32rr, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT8ir, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT8rr, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUTSB, X86_INS_OUTSB, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_OUTSL, X86_INS_OUTSD, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_OUTSW, X86_INS_OUTSW, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_PABSBrm128, X86_INS_PABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PABSBrr128, X86_INS_PABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PABSDrm128, X86_INS_PABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PABSDrr128, X86_INS_PABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PABSWrm128, X86_INS_PABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PABSWrr128, X86_INS_PABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PACKSSDWrm, X86_INS_PACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PACKSSDWrr, X86_INS_PACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PACKSSWBrm, X86_INS_PACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PACKSSWBrr, X86_INS_PACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PACKUSDWrm, X86_INS_PACKUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PACKUSDWrr, X86_INS_PACKUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PACKUSWBrm, X86_INS_PACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PACKUSWBrr, X86_INS_PACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDBrm, X86_INS_PADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDBrr, X86_INS_PADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDDrm, X86_INS_PADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDDrr, X86_INS_PADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDQrm, X86_INS_PADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDQrr, X86_INS_PADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDSBrm, X86_INS_PADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDSBrr, X86_INS_PADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDSWrm, X86_INS_PADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDSWrr, X86_INS_PADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDUSBrm, X86_INS_PADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDUSBrr, X86_INS_PADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDUSWrm, X86_INS_PADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDUSWrr, X86_INS_PADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDWrm, X86_INS_PADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PADDWrr, X86_INS_PADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PALIGNR128rm, X86_INS_PALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PALIGNR128rr, X86_INS_PALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PANDNrm, X86_INS_PANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PANDNrr, X86_INS_PANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PANDrm, X86_INS_PAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PANDrr, X86_INS_PAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PAUSE, X86_INS_PAUSE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PAVGBrm, X86_INS_PAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PAVGBrr, X86_INS_PAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PAVGUSBrm, X86_INS_PAVGUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PAVGUSBrr, X86_INS_PAVGUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PAVGWrm, X86_INS_PAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PAVGWrr, X86_INS_PAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PBLENDVBrm0, X86_INS_PBLENDVB, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PBLENDVBrr0, X86_INS_PBLENDVB, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PBLENDWrmi, X86_INS_PBLENDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PBLENDWrri, X86_INS_PBLENDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PCLMULQDQrm, X86_INS_PCLMULQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PCLMUL, 0 }, 0, 0 #endif }, { X86_PCLMULQDQrr, X86_INS_PCLMULQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PCLMUL, 0 }, 0, 0 #endif }, { X86_PCMPEQBrm, X86_INS_PCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPEQBrr, X86_INS_PCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPEQDrm, X86_INS_PCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPEQDrr, X86_INS_PCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPEQQrm, X86_INS_PCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PCMPEQQrr, X86_INS_PCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PCMPEQWrm, X86_INS_PCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPEQWrr, X86_INS_PCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPESTRIrm, X86_INS_PCMPESTRI, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPESTRIrr, X86_INS_PCMPESTRI, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPESTRM128rm, X86_INS_PCMPESTRM, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPESTRM128rr, X86_INS_PCMPESTRM, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPGTBrm, X86_INS_PCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPGTBrr, X86_INS_PCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPGTDrm, X86_INS_PCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPGTDrr, X86_INS_PCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPGTQrm, X86_INS_PCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPGTQrr, X86_INS_PCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPGTWrm, X86_INS_PCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPGTWrr, X86_INS_PCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PCMPISTRIrm, X86_INS_PCMPISTRI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPISTRIrr, X86_INS_PCMPISTRI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPISTRM128rm, X86_INS_PCMPISTRM, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCMPISTRM128rr, X86_INS_PCMPISTRM, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0 #endif }, { X86_PCOMMIT, X86_INS_PCOMMIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PDEP32rm, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PDEP32rr, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PDEP64rm, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PDEP64rr, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT32rm, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT32rr, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT64rm, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT64rr, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXTRBmr, X86_INS_PEXTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRBrr, X86_INS_PEXTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRDmr, X86_INS_PEXTRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRDrr, X86_INS_PEXTRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRQmr, X86_INS_PEXTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRQrr, X86_INS_PEXTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRWmr, X86_INS_PEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PEXTRWri, X86_INS_PEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PEXTRWrr_REV, X86_INS_PEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PF2IDrm, X86_INS_PF2ID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PF2IDrr, X86_INS_PF2ID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PF2IWrm, X86_INS_PF2IW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PF2IWrr, X86_INS_PF2IW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFACCrm, X86_INS_PFACC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFACCrr, X86_INS_PFACC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFADDrm, X86_INS_PFADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFADDrr, X86_INS_PFADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFCMPEQrm, X86_INS_PFCMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFCMPEQrr, X86_INS_PFCMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFCMPGErm, X86_INS_PFCMPGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFCMPGErr, X86_INS_PFCMPGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFCMPGTrm, X86_INS_PFCMPGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFCMPGTrr, X86_INS_PFCMPGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFMAXrm, X86_INS_PFMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFMAXrr, X86_INS_PFMAX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFMINrm, X86_INS_PFMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFMINrr, X86_INS_PFMIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFMULrm, X86_INS_PFMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFMULrr, X86_INS_PFMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFNACCrm, X86_INS_PFNACC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFNACCrr, X86_INS_PFNACC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFPNACCrm, X86_INS_PFPNACC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFPNACCrr, X86_INS_PFPNACC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRCPIT1rm, X86_INS_PFRCPIT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRCPIT1rr, X86_INS_PFRCPIT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRCPIT2rm, X86_INS_PFRCPIT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRCPIT2rr, X86_INS_PFRCPIT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRCPrm, X86_INS_PFRCP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRCPrr, X86_INS_PFRCP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRSQIT1rm, X86_INS_PFRSQIT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRSQIT1rr, X86_INS_PFRSQIT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRSQRTrm, X86_INS_PFRSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFRSQRTrr, X86_INS_PFRSQRT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFSUBRrm, X86_INS_PFSUBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFSUBRrr, X86_INS_PFSUBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFSUBrm, X86_INS_PFSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PFSUBrr, X86_INS_PFSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PHADDDrm, X86_INS_PHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHADDDrr, X86_INS_PHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHADDSWrm128, X86_INS_PHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHADDSWrr128, X86_INS_PHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHADDWrm, X86_INS_PHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHADDWrr, X86_INS_PHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHMINPOSUWrm128, X86_INS_PHMINPOSUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PHMINPOSUWrr128, X86_INS_PHMINPOSUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PHSUBDrm, X86_INS_PHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHSUBDrr, X86_INS_PHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHSUBSWrm128, X86_INS_PHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHSUBSWrr128, X86_INS_PHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHSUBWrm, X86_INS_PHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PHSUBWrr, X86_INS_PHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PI2FDrm, X86_INS_PI2FD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PI2FDrr, X86_INS_PI2FD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PI2FWrm, X86_INS_PI2FW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PI2FWrr, X86_INS_PI2FW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PINSRBrm, X86_INS_PINSRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PINSRBrr, X86_INS_PINSRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PINSRDrm, X86_INS_PINSRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PINSRDrr, X86_INS_PINSRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PINSRQrm, X86_INS_PINSRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PINSRQrr, X86_INS_PINSRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PINSRWrmi, X86_INS_PINSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PINSRWrri, X86_INS_PINSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMADDUBSWrm128, X86_INS_PMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PMADDUBSWrr128, X86_INS_PMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PMADDWDrm, X86_INS_PMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMADDWDrr, X86_INS_PMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMAXSBrm, X86_INS_PMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXSBrr, X86_INS_PMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXSDrm, X86_INS_PMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXSDrr, X86_INS_PMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXSWrm, X86_INS_PMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMAXSWrr, X86_INS_PMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMAXUBrm, X86_INS_PMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMAXUBrr, X86_INS_PMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMAXUDrm, X86_INS_PMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXUDrr, X86_INS_PMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXUWrm, X86_INS_PMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMAXUWrr, X86_INS_PMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINSBrm, X86_INS_PMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINSBrr, X86_INS_PMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINSDrm, X86_INS_PMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINSDrr, X86_INS_PMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINSWrm, X86_INS_PMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMINSWrr, X86_INS_PMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMINUBrm, X86_INS_PMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMINUBrr, X86_INS_PMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMINUDrm, X86_INS_PMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINUDrr, X86_INS_PMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINUWrm, X86_INS_PMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMINUWrr, X86_INS_PMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVMSKBrr, X86_INS_PMOVMSKB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMOVSXBDrm, X86_INS_PMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXBDrr, X86_INS_PMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXBQrm, X86_INS_PMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXBQrr, X86_INS_PMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXBWrm, X86_INS_PMOVSXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXBWrr, X86_INS_PMOVSXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXDQrm, X86_INS_PMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXDQrr, X86_INS_PMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXWDrm, X86_INS_PMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXWDrr, X86_INS_PMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXWQrm, X86_INS_PMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVSXWQrr, X86_INS_PMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXBDrm, X86_INS_PMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXBDrr, X86_INS_PMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXBQrm, X86_INS_PMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXBQrr, X86_INS_PMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXBWrm, X86_INS_PMOVZXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXBWrr, X86_INS_PMOVZXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXDQrm, X86_INS_PMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXDQrr, X86_INS_PMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXWDrm, X86_INS_PMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXWDrr, X86_INS_PMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXWQrm, X86_INS_PMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMOVZXWQrr, X86_INS_PMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMULDQrm, X86_INS_PMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMULDQrr, X86_INS_PMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMULHRSWrm128, X86_INS_PMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PMULHRSWrr128, X86_INS_PMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PMULHRWrm, X86_INS_PMULHRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PMULHRWrr, X86_INS_PMULHRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PMULHUWrm, X86_INS_PMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULHUWrr, X86_INS_PMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULHWrm, X86_INS_PMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULHWrr, X86_INS_PMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULLDrm, X86_INS_PMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMULLDrr, X86_INS_PMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PMULLWrm, X86_INS_PMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULLWrr, X86_INS_PMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULUDQrm, X86_INS_PMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PMULUDQrr, X86_INS_PMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_POP16r, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_POP16rmm, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_POP16rmr, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_POP32r, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POP32rmm, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POP32rmr, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POP64r, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POP64rmm, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POP64rmr, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPA16, X86_INS_POPAW, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPA32, X86_INS_POPAL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPCNT16rm, X86_INS_POPCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPCNT16rr, X86_INS_POPCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPCNT32rm, X86_INS_POPCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPCNT32rr, X86_INS_POPCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPCNT64rm, X86_INS_POPCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPCNT64rr, X86_INS_POPCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPDS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPDS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPES16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPES32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPF16, X86_INS_POPF, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPF32, X86_INS_POPFD, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPF64, X86_INS_POPFQ, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPFS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_POPFS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPFS64, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPGS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_POPGS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPGS64, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPSS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPSS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PORrm, X86_INS_POR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PORrr, X86_INS_POR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PREFETCH, X86_INS_PREFETCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PREFETCHNTA, X86_INS_PREFETCHNTA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_PREFETCHT0, X86_INS_PREFETCHT0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_PREFETCHT1, X86_INS_PREFETCHT1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_PREFETCHT2, X86_INS_PREFETCHT2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_PREFETCHW, X86_INS_PREFETCHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PSADBWrm, X86_INS_PSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSADBWrr, X86_INS_PSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSHUFBrm, X86_INS_PSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSHUFBrr, X86_INS_PSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSHUFDmi, X86_INS_PSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSHUFDri, X86_INS_PSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSHUFHWmi, X86_INS_PSHUFHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSHUFHWri, X86_INS_PSHUFHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSHUFLWmi, X86_INS_PSHUFLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSHUFLWri, X86_INS_PSHUFLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSIGNBrm, X86_INS_PSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSIGNBrr, X86_INS_PSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSIGNDrm, X86_INS_PSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSIGNDrr, X86_INS_PSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSIGNWrm, X86_INS_PSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSIGNWrr, X86_INS_PSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0 #endif }, { X86_PSLLDQri, X86_INS_PSLLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLDri, X86_INS_PSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLDrm, X86_INS_PSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLDrr, X86_INS_PSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLQri, X86_INS_PSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLQrm, X86_INS_PSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLQrr, X86_INS_PSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLWri, X86_INS_PSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLWrm, X86_INS_PSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSLLWrr, X86_INS_PSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRADri, X86_INS_PSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRADrm, X86_INS_PSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRADrr, X86_INS_PSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRAWri, X86_INS_PSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRAWrm, X86_INS_PSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRAWrr, X86_INS_PSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLDQri, X86_INS_PSRLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLDri, X86_INS_PSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLDrm, X86_INS_PSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLDrr, X86_INS_PSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLQri, X86_INS_PSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLQrm, X86_INS_PSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLQrr, X86_INS_PSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLWri, X86_INS_PSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLWrm, X86_INS_PSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSRLWrr, X86_INS_PSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBBrm, X86_INS_PSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBBrr, X86_INS_PSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBDrm, X86_INS_PSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBDrr, X86_INS_PSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBQrm, X86_INS_PSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBQrr, X86_INS_PSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBSBrm, X86_INS_PSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBSBrr, X86_INS_PSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBSWrm, X86_INS_PSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBSWrr, X86_INS_PSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBUSBrm, X86_INS_PSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBUSBrr, X86_INS_PSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBUSWrm, X86_INS_PSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBUSWrr, X86_INS_PSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBWrm, X86_INS_PSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSUBWrr, X86_INS_PSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PSWAPDrm, X86_INS_PSWAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PSWAPDrr, X86_INS_PSWAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0 #endif }, { X86_PTESTrm, X86_INS_PTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PTESTrr, X86_INS_PTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_PUNPCKHBWrm, X86_INS_PUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHBWrr, X86_INS_PUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHDQrm, X86_INS_PUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHDQrr, X86_INS_PUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHQDQrm, X86_INS_PUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHQDQrr, X86_INS_PUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHWDrm, X86_INS_PUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKHWDrr, X86_INS_PUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLBWrm, X86_INS_PUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLBWrr, X86_INS_PUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLDQrm, X86_INS_PUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLDQrr, X86_INS_PUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLQDQrm, X86_INS_PUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLQDQrr, X86_INS_PUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLWDrm, X86_INS_PUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUNPCKLWDrr, X86_INS_PUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PUSH16i8, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH16r, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSH16rmm, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSH16rmr, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSH32i8, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH32r, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH32rmm, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH32rmr, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH64i16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64i32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64i8, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64r, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64rmm, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64rmr, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHA16, X86_INS_PUSHAW, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHA32, X86_INS_PUSHAL, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHCS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHCS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHDS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHDS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHES16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHES32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHF16, X86_INS_PUSHF, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSHF32, X86_INS_PUSHFD, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHF64, X86_INS_PUSHFQ, #ifndef CAPSTONE_DIET { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHFS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PUSHFS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHFS64, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHGS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PUSHGS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHGS64, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHSS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHSS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHi16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHi32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PXORrm, X86_INS_PXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_PXORrr, X86_INS_PXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_RCL16m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCPPSm, X86_INS_RCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RCPPSm_Int, X86_INS_RCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RCPPSr, X86_INS_RCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RCPPSr_Int, X86_INS_RCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RCPSSm, X86_INS_RCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RCPSSm_Int, X86_INS_RCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_RCPSSr, X86_INS_RCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RCPSSr_Int, X86_INS_RCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDFSBASE, X86_INS_RDFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDFSBASE64, X86_INS_RDFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDGSBASE, X86_INS_RDGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDGSBASE64, X86_INS_RDGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDMSR, X86_INS_RDMSR, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0 #endif }, { X86_RDPMC, X86_INS_RDPMC, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_RDRAND16r, X86_INS_RDRAND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDRAND32r, X86_INS_RDRAND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDRAND64r, X86_INS_RDRAND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDSEED16r, X86_INS_RDSEED, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDSEED32r, X86_INS_RDSEED, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDSEED64r, X86_INS_RDSEED, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDTSC, X86_INS_RDTSC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0 #endif }, { X86_RDTSCP, X86_INS_RDTSCP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_RETIL, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_RETIQ, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RETIW, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_RETL, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_RETQ, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RETW, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_ROL16m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RORX32mi, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RORX32ri, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RORX64mi, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RORX64ri, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_ROUNDPDm, X86_INS_ROUNDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDPDr, X86_INS_ROUNDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDPSm, X86_INS_ROUNDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDPSr, X86_INS_ROUNDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDSDm, X86_INS_ROUNDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDSDr, X86_INS_ROUNDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDSDr_Int, X86_INS_ROUNDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDSSm, X86_INS_ROUNDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDSSr, X86_INS_ROUNDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_ROUNDSSr_Int, X86_INS_ROUNDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0 #endif }, { X86_RSM, X86_INS_RSM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_RSQRTPSm, X86_INS_RSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RSQRTPSm_Int, X86_INS_RSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RSQRTPSr, X86_INS_RSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RSQRTPSr_Int, X86_INS_RSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RSQRTSSm, X86_INS_RSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RSQRTSSm_Int, X86_INS_RSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_RSQRTSSr, X86_INS_RSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_RSQRTSSr_Int, X86_INS_RSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SAHF, X86_INS_SAHF, #ifndef CAPSTONE_DIET { X86_REG_AH, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SALC, X86_INS_SALC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_AL, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SAR16m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SARX32rm, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SARX32rr, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SARX64rm, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SARX64rr, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SBB16i16, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16ri, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32i32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32ri, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64i32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64mi32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64ri32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8i8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SBB8mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8ri, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SBB8rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASB, X86_INS_SCASB, #ifndef CAPSTONE_DIET { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASL, X86_INS_SCASD, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASQ, X86_INS_SCASQ, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASW, X86_INS_SCASW, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SETAEm, X86_INS_SETAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETAEr, X86_INS_SETAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETAm, X86_INS_SETA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETAr, X86_INS_SETA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBEm, X86_INS_SETBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBEr, X86_INS_SETBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBm, X86_INS_SETB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBr, X86_INS_SETB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETEm, X86_INS_SETE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETEr, X86_INS_SETE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGEm, X86_INS_SETGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGEr, X86_INS_SETGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGm, X86_INS_SETG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGr, X86_INS_SETG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLEm, X86_INS_SETLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLEr, X86_INS_SETLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLm, X86_INS_SETL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLr, X86_INS_SETL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNEm, X86_INS_SETNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNEr, X86_INS_SETNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNOm, X86_INS_SETNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNOr, X86_INS_SETNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNPm, X86_INS_SETNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNPr, X86_INS_SETNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNSm, X86_INS_SETNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNSr, X86_INS_SETNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETOm, X86_INS_SETO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETOr, X86_INS_SETO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETPm, X86_INS_SETP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETPr, X86_INS_SETP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETSm, X86_INS_SETS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETSr, X86_INS_SETS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SFENCE, X86_INS_SFENCE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SGDT16m, X86_INS_SGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SGDT32m, X86_INS_SGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SGDT64m, X86_INS_SGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_SHA1MSG1rm, X86_INS_SHA1MSG1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1MSG1rr, X86_INS_SHA1MSG1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1MSG2rm, X86_INS_SHA1MSG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1MSG2rr, X86_INS_SHA1MSG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1NEXTErm, X86_INS_SHA1NEXTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1NEXTErr, X86_INS_SHA1NEXTE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1RNDS4rmi, X86_INS_SHA1RNDS4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA1RNDS4rri, X86_INS_SHA1RNDS4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA256MSG1rm, X86_INS_SHA256MSG1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA256MSG1rr, X86_INS_SHA256MSG1, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA256MSG2rm, X86_INS_SHA256MSG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA256MSG2rr, X86_INS_SHA256MSG2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA256RNDS2rm, X86_INS_SHA256RNDS2, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHA256RNDS2rr, X86_INS_SHA256RNDS2, #ifndef CAPSTONE_DIET { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0 #endif }, { X86_SHL16m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16mrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16mri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16rrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16rri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32mrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32mri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32rrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32rri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64mrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64mri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64rrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64rri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLX32rm, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHLX32rr, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHLX64rm, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHLX64rr, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHR16m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16mrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16mri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16rrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16rri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32mrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32mri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32rrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32rri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64mrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64mri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64rrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64rri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRX32rm, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHRX32rr, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHRX64rm, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHRX64rr, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHUFPDrmi, X86_INS_SHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SHUFPDrri, X86_INS_SHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SHUFPSrmi, X86_INS_SHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SHUFPSrri, X86_INS_SHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SIDT16m, X86_INS_SIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SIDT32m, X86_INS_SIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SIDT64m, X86_INS_SIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_SIN_F, X86_INS_FSIN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SKINIT, X86_INS_SKINIT, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_SLDT16m, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT16r, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT32r, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT64m, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT64r, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW16m, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW16r, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW32r, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW64r, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SQRTPDm, X86_INS_SQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SQRTPDr, X86_INS_SQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SQRTPSm, X86_INS_SQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SQRTPSr, X86_INS_SQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SQRTSDm, X86_INS_SQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SQRTSDm_Int, X86_INS_SQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SQRTSDr, X86_INS_SQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SQRTSDr_Int, X86_INS_SQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SQRTSSm, X86_INS_SQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SQRTSSm_Int, X86_INS_SQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SQRTSSr, X86_INS_SQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SQRTSSr_Int, X86_INS_SQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SQRT_F, X86_INS_FSQRT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_STAC, X86_INS_STAC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STC, X86_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_STD, X86_INS_STD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_STGI, X86_INS_STGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_STI, X86_INS_STI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STMXCSR, X86_INS_STMXCSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_STOSB, X86_INS_STOSB, #ifndef CAPSTONE_DIET { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STOSL, X86_INS_STOSD, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STOSQ, X86_INS_STOSQ, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RCX, X86_REG_RDI, X86_REG_EFLAGS, 0 }, { X86_REG_RCX, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STOSW, X86_INS_STOSW, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STR16r, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STR32r, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STR64r, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STRm, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_ST_F32m, X86_INS_FST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_F64m, X86_INS_FST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FCOMPST0r, X86_INS_FCOMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FCOMPST0r_alt, X86_INS_FCOMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FCOMST0r, X86_INS_FCOM, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FP32m, X86_INS_FSTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FP64m, X86_INS_FSTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FP80m, X86_INS_FSTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FPNCEST0r, X86_INS_FSTPNCE, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FPST0r, X86_INS_FSTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FPST0r_alt, X86_INS_FSTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FPrr, X86_INS_FSTP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0 #endif }, { X86_ST_FXCHST0r, X86_INS_FXCH, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_FXCHST0r_alt, X86_INS_FXCH, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_ST_Frr, X86_INS_FST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB16i16, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32i32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64i32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64mi32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64ri32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8i8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SUB8mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SUB8rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUBPDrm, X86_INS_SUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SUBPDrr, X86_INS_SUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SUBPSrm, X86_INS_SUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SUBPSrr, X86_INS_SUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SUBR_F32m, X86_INS_FSUBR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBR_F64m, X86_INS_FSUBR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBR_FI16m, X86_INS_FISUBR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBR_FI32m, X86_INS_FISUBR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBR_FPrST0, X86_INS_FSUBRP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBR_FST0r, X86_INS_FSUBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBR_FrST0, X86_INS_FSUBR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUBSDrm, X86_INS_SUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SUBSDrm_Int, X86_INS_SUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SUBSDrr, X86_INS_SUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SUBSDrr_Int, X86_INS_SUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_SUBSSrm, X86_INS_SUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SUBSSrm_Int, X86_INS_SUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SUBSSrr, X86_INS_SUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SUBSSrr_Int, X86_INS_SUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_SUB_F32m, X86_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB_F64m, X86_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB_FI16m, X86_INS_FISUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB_FI32m, X86_INS_FISUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB_FPrST0, X86_INS_FSUBP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB_FST0r, X86_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SUB_FrST0, X86_INS_FSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_SWAPGS, X86_INS_SWAPGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_SYSCALL, X86_INS_SYSCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_SYSENTER, X86_INS_SYSENTER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_SYSEXIT, X86_INS_SYSEXIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_SYSEXIT64, X86_INS_SYSEXIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_SYSRET, X86_INS_SYSRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_SYSRET64, X86_INS_SYSRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_T1MSKC32rm, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_T1MSKC32rr, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_T1MSKC64rm, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_T1MSKC64rr, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TEST16i16, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16mi, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16mi_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16ri, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16ri_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32i32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32mi, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32mi_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32ri, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32ri_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64i32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64mi32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64mi32_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64ri32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64ri32_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8i8, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8mi, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8mi_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8ri, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8ri_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TRAP, X86_INS_UD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_TST_F, X86_INS_FTST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_TZCNT16rm, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT16rr, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT32rm, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT32rr, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT64rm, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT64rr, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZMSK32rm, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TZMSK32rr, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TZMSK64rm, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TZMSK64rr, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_UCOMISDrm, X86_INS_UCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_UCOMISDrr, X86_INS_UCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_UCOMISSrm, X86_INS_UCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_UCOMISSrr, X86_INS_UCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_UCOM_FIPr, X86_INS_FUCOMIP, #ifndef CAPSTONE_DIET { X86_REG_ST0, 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_UCOM_FIr, X86_INS_FUCOMI, #ifndef CAPSTONE_DIET { X86_REG_ST0, 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_UCOM_FPPr, X86_INS_FUCOMPP, #ifndef CAPSTONE_DIET { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_UCOM_FPr, X86_INS_FUCOMP, #ifndef CAPSTONE_DIET { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_UCOM_Fr, X86_INS_FUCOM, #ifndef CAPSTONE_DIET { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_UD2B, X86_INS_UD2B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_UNPCKHPDrm, X86_INS_UNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_UNPCKHPDrr, X86_INS_UNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_UNPCKHPSrm, X86_INS_UNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_UNPCKHPSrr, X86_INS_UNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_UNPCKLPDrm, X86_INS_UNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_UNPCKLPDrr, X86_INS_UNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_UNPCKLPSrm, X86_INS_UNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_UNPCKLPSrr, X86_INS_UNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_VADDPDYrm, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPDYrr, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rm, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rmb, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rmbk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rmbkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rmk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rmkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rr, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rrk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ128rrkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rm, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rmb, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rmbk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rmbkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rmk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rmkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rr, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rrk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZ256rrkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPDZrb, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrbk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrbkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrm, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrmb, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrmbk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrmbkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrmk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrmkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrr, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrrk, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDZrrkz, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPDrm, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPDrr, X86_INS_VADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPSYrm, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPSYrr, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rm, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rmb, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rmbk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rmbkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rmk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rmkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rr, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rrk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ128rrkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rm, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rmb, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rmbk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rmbkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rmk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rmkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rr, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rrk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZ256rrkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VADDPSZrb, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrbk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrbkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrm, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrmb, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrmbk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrmbkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrmk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrmkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrr, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrrk, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSZrrkz, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDPSrm, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDPSrr, X86_INS_VADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VADDSDZrm, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrm_Int, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrm_Intk, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrm_Intkz, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrr, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrr_Int, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrr_Intk, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrr_Intkz, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrrb, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrrbk, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDZrrbkz, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSDrm, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSDrm_Int, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSDrr, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSDrr_Int, X86_INS_VADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSSZrm, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrm_Int, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrm_Intk, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrm_Intkz, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrr, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrr_Int, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrr_Intk, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrr_Intkz, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrrb, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrrbk, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSZrrbkz, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VADDSSrm, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSSrm_Int, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSSrr, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSSrr_Int, X86_INS_VADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPDYrm, X86_INS_VADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPDYrr, X86_INS_VADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPDrm, X86_INS_VADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPDrr, X86_INS_VADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPSYrm, X86_INS_VADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPSYrr, X86_INS_VADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPSrm, X86_INS_VADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VADDSUBPSrr, X86_INS_VADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VAESDECLASTrm, X86_INS_VAESDECLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESDECLASTrr, X86_INS_VAESDECLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESDECrm, X86_INS_VAESDEC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESDECrr, X86_INS_VAESDEC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESENCLASTrm, X86_INS_VAESENCLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESENCLASTrr, X86_INS_VAESENCLAST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESENCrm, X86_INS_VAESENC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESENCrr, X86_INS_VAESENC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESIMCrm, X86_INS_VAESIMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESIMCrr, X86_INS_VAESIMC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESKEYGENASSIST128rm, X86_INS_VAESKEYGENASSIST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VAESKEYGENASSIST128rr, X86_INS_VAESKEYGENASSIST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0 #endif }, { X86_VALIGNDrmi, X86_INS_VALIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNDrri, X86_INS_VALIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNDrrik, X86_INS_VALIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNDrrikz, X86_INS_VALIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNQrmi, X86_INS_VALIGNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNQrri, X86_INS_VALIGNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNQrrik, X86_INS_VALIGNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VALIGNQrrikz, X86_INS_VALIGNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VANDNPDYrm, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPDYrr, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPDrm, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPDrr, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPSYrm, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPSYrr, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPSrm, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDNPSrr, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPDYrm, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPDYrr, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPDrm, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPDrr, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPSYrm, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPSYrr, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPSrm, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VANDPSrr, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rm, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rmb, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rmbk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rmk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rmkz, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rr, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rrk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ128rrkz, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rm, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rmb, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rmbk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rmk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rmkz, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rr, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rrk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZ256rrkz, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrm, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrmb, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrmbk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrmk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrmkz, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrr, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrrk, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPDZrrkz, X86_INS_VBLENDMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rm, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rmb, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rmbk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rmk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rmkz, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rr, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rrk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ128rrkz, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rm, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rmb, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rmbk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rmk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rmkz, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rr, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rrk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZ256rrkz, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrm, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrmb, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrmbk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrmk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrmkz, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrr, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrrk, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDMPSZrrkz, X86_INS_VBLENDMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBLENDPDYrmi, X86_INS_VBLENDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPDYrri, X86_INS_VBLENDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPDrmi, X86_INS_VBLENDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPDrri, X86_INS_VBLENDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPSYrmi, X86_INS_VBLENDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPSYrri, X86_INS_VBLENDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPSrmi, X86_INS_VBLENDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDPSrri, X86_INS_VBLENDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPDYrm, X86_INS_VBLENDVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPDYrr, X86_INS_VBLENDVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPDrm, X86_INS_VBLENDVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPDrr, X86_INS_VBLENDVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPSYrm, X86_INS_VBLENDVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPSYrr, X86_INS_VBLENDVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPSrm, X86_INS_VBLENDVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBLENDVPSrr, X86_INS_VBLENDVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBROADCASTF128, X86_INS_VBROADCASTF128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBROADCASTI32X4krm, X86_INS_VBROADCASTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTI32X4rm, X86_INS_VBROADCASTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTI64X4krm, X86_INS_VBROADCASTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTI64X4rm, X86_INS_VBROADCASTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDYrm, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDYrr, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZ256m, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZ256mk, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZ256mkz, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZ256r, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZ256rk, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZ256rkz, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZm, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZmk, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZmkz, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZr, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZrk, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSDZrkz, X86_INS_VBROADCASTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSYrm, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSYrr, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ128m, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ128mk, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ128mkz, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ128r, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ128rk, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ128rkz, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ256m, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ256mk, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ256mkz, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ256r, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ256rk, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZ256rkz, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZm, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZmk, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZmkz, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZr, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZrk, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSZrkz, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSrm, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VBROADCASTSSrr, X86_INS_VBROADCASTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VCMPPDYrmi, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDYrmi_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDYrri, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDYrri_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDZrmi, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPDZrmi_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPDZrri, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPDZrri_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPDZrrib, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPDZrrib_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPDrmi, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDrmi_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDrri, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPDrri_alt, X86_INS_VCMPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSYrmi, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSYrmi_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSYrri, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSYrri_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSZrmi, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPSZrmi_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPSZrri, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPSZrri_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPSZrrib, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPSZrrib_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPPSrmi, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSrmi_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSrri, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPPSrri_alt, X86_INS_VCMPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSDZrm, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSDZrmi_alt, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSDZrr, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSDZrri_alt, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSDrm, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSDrm_alt, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSDrr, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSDrr_alt, X86_INS_VCMPSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSSZrm, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSSZrmi_alt, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSSZrr, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSSZrri_alt, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCMPSSrm, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSSrm_alt, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSSrr, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCMPSSrr_alt, X86_INS_VCMPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCOMISDZrm, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMISDZrr, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMISDrm, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCOMISDrr, X86_INS_VCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCOMISSZrm, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMISSZrr, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMISSrm, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCOMISSrr, X86_INS_VCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZ128mrk, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZ128rrk, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZ128rrkz, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZ256mrk, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZ256rrk, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZ256rrkz, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZmrk, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZrrk, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPDZrrkz, X86_INS_VCOMPRESSPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZ128mrk, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZ128rrk, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZ128rrkz, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZ256mrk, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZ256rrk, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZ256rrkz, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZmrk, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZrrk, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCOMPRESSPSZrrkz, X86_INS_VCOMPRESSPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PDYrm, X86_INS_VCVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PDYrr, X86_INS_VCVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PDZrm, X86_INS_VCVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PDZrr, X86_INS_VCVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PDrm, X86_INS_VCVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PDrr, X86_INS_VCVTDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSYrm, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSYrr, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSZrm, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSZrr, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSZrrb, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSrm, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTDQ2PSrr, X86_INS_VCVTDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQXrm, X86_INS_VCVTPD2DQX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQYrm, X86_INS_VCVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQYrr, X86_INS_VCVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQZrm, X86_INS_VCVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQZrr, X86_INS_VCVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQZrrb, X86_INS_VCVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2DQrr, X86_INS_VCVTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSXrm, X86_INS_VCVTPD2PSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSYrm, X86_INS_VCVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSYrr, X86_INS_VCVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSZrm, X86_INS_VCVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSZrr, X86_INS_VCVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSZrrb, X86_INS_VCVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2PSrr, X86_INS_VCVTPD2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPD2UDQZrm, X86_INS_VCVTPD2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2UDQZrr, X86_INS_VCVTPD2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPD2UDQZrrb, X86_INS_VCVTPD2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPH2PSYrm, X86_INS_VCVTPH2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPH2PSYrr, X86_INS_VCVTPH2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPH2PSZrm, X86_INS_VCVTPH2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPH2PSZrr, X86_INS_VCVTPH2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPH2PSrm, X86_INS_VCVTPH2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPH2PSrr, X86_INS_VCVTPH2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQYrm, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQYrr, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQZrm, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQZrr, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQZrrb, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQrm, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2DQrr, X86_INS_VCVTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2PDYrm, X86_INS_VCVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2PDYrr, X86_INS_VCVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2PDZrm, X86_INS_VCVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2PDZrr, X86_INS_VCVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2PDrm, X86_INS_VCVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2PDrr, X86_INS_VCVTPS2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTPS2PHYmr, X86_INS_VCVTPS2PH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPS2PHYrr, X86_INS_VCVTPS2PH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPS2PHZmr, X86_INS_VCVTPS2PH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2PHZrr, X86_INS_VCVTPS2PH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2PHmr, X86_INS_VCVTPS2PH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPS2PHrr, X86_INS_VCVTPS2PH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0 #endif }, { X86_VCVTPS2UDQZrm, X86_INS_VCVTPS2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2UDQZrr, X86_INS_VCVTPS2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTPS2UDQZrrb, X86_INS_VCVTPS2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SI64Zrm, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SI64Zrr, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SI64rm, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSD2SI64rr, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSD2SIZrm, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SIZrr, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SIrm, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSD2SIrr, X86_INS_VCVTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSD2SSZrm, X86_INS_VCVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SSZrr, X86_INS_VCVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2SSrm, X86_INS_VCVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSD2SSrr, X86_INS_VCVTSD2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSD2USI64Zrm, X86_INS_VCVTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2USI64Zrr, X86_INS_VCVTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2USIZrm, X86_INS_VCVTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSD2USIZrr, X86_INS_VCVTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI2SD64rm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SD64rr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SDZrm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI2SDZrr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI2SDrm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SDrr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SS64rm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SS64rr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SSZrm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI2SSZrr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI2SSrm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI2SSrr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSI642SDZrm, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI642SDZrr, X86_INS_VCVTSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI642SSZrm, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSI642SSZrr, X86_INS_VCVTSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SDZrm, X86_INS_VCVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SDZrr, X86_INS_VCVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SDrm, X86_INS_VCVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSS2SDrr, X86_INS_VCVTSS2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSS2SI64Zrm, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SI64Zrr, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SI64rm, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSS2SI64rr, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSS2SIZrm, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SIZrr, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2SIrm, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSS2SIrr, X86_INS_VCVTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTSS2USI64Zrm, X86_INS_VCVTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2USI64Zrr, X86_INS_VCVTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2USIZrm, X86_INS_VCVTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTSS2USIZrr, X86_INS_VCVTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPD2DQXrm, X86_INS_VCVTTPD2DQX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPD2DQYrm, X86_INS_VCVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPD2DQYrr, X86_INS_VCVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPD2DQZrm, X86_INS_VCVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPD2DQZrr, X86_INS_VCVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPD2DQrr, X86_INS_VCVTTPD2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPD2UDQZrm, X86_INS_VCVTTPD2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPD2UDQZrr, X86_INS_VCVTTPD2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPS2DQYrm, X86_INS_VCVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPS2DQYrr, X86_INS_VCVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPS2DQZrm, X86_INS_VCVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPS2DQZrr, X86_INS_VCVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPS2DQrm, X86_INS_VCVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPS2DQrr, X86_INS_VCVTTPS2DQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTPS2UDQZrm, X86_INS_VCVTTPS2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTPS2UDQZrr, X86_INS_VCVTTPS2UDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUDQ2PDZrm, X86_INS_VCVTUDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUDQ2PDZrr, X86_INS_VCVTUDQ2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUDQ2PSZrm, X86_INS_VCVTUDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUDQ2PSZrr, X86_INS_VCVTUDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUDQ2PSZrrb, X86_INS_VCVTUDQ2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI642SDZrm, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI642SDZrr, X86_INS_VCVTUSI2SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI642SSZrm, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VCVTUSI642SSZrr, X86_INS_VCVTUSI2SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDYrm, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPDYrr, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rm, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rmb, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rmbk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rmbkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rmk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rmkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rr, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rrk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ128rrkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rm, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rmb, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rmbk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rmbkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rmk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rmkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rr, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rrk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZ256rrkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPDZrb, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrbk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrbkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrm, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrmb, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrmbk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrmbkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrmk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrmkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrr, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrrk, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDZrrkz, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPDrm, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPDrr, X86_INS_VDIVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPSYrm, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPSYrr, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rm, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rmb, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rmbk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rmk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rmkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rr, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rrk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ128rrkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rm, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rmb, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rmbk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rmk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rmkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rr, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rrk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZ256rrkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VDIVPSZrb, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrbk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrbkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrm, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrmb, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrmbk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrmbkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrmk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrmkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrr, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrrk, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSZrrkz, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVPSrm, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVPSrr, X86_INS_VDIVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VDIVSDZrm, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrm_Int, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrm_Intk, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrm_Intkz, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrr, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrr_Int, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrr_Intk, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrr_Intkz, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrrb, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrrbk, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDZrrbkz, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSDrm, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSDrm_Int, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSDrr, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSDrr_Int, X86_INS_VDIVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSSZrm, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrm_Int, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrm_Intk, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrm_Intkz, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrr, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrr_Int, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrr_Intk, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrr_Intkz, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrrb, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrrbk, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSZrrbkz, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VDIVSSrm, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSSrm_Int, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSSrr, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDIVSSrr_Int, X86_INS_VDIVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDPPDrmi, X86_INS_VDPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDPPDrri, X86_INS_VDPPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDPPSYrmi, X86_INS_VDPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDPPSYrri, X86_INS_VDPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDPPSrmi, X86_INS_VDPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VDPPSrri, X86_INS_VDPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VERRm, X86_INS_VERR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERRr, X86_INS_VERR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERWm, X86_INS_VERW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERWr, X86_INS_VERW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VEXP2PDm, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDmb, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDmbk, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDmbkz, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDmk, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDmkz, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDr, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDrb, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDrbk, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDrbkz, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDrk, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PDrkz, X86_INS_VEXP2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSm, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSmb, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSmbk, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSmbkz, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSmk, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSmkz, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSr, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSrb, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSrbk, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSrbkz, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSrk, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXP2PSrkz, X86_INS_VEXP2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ128rmk, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ128rmkz, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ128rrk, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ128rrkz, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ256rmk, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ256rmkz, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ256rrk, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZ256rrkz, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZrmk, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZrmkz, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZrrk, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPDZrrkz, X86_INS_VEXPANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ128rmk, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ128rmkz, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ128rrk, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ128rrkz, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ256rmk, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ256rmkz, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ256rrk, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZ256rrkz, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZrmk, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZrmkz, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZrrk, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXPANDPSZrrkz, X86_INS_VEXPANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF128mr, X86_INS_VEXTRACTF128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VEXTRACTF128rr, X86_INS_VEXTRACTF128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VEXTRACTF32x4rm, X86_INS_VEXTRACTF32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF32x4rr, X86_INS_VEXTRACTF32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF32x4rrk, X86_INS_VEXTRACTF32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF32x4rrkz, X86_INS_VEXTRACTF32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF64x4rm, X86_INS_VEXTRACTF64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF64x4rr, X86_INS_VEXTRACTF64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF64x4rrk, X86_INS_VEXTRACTF64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTF64x4rrkz, X86_INS_VEXTRACTF64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI128mr, X86_INS_VEXTRACTI128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VEXTRACTI128rr, X86_INS_VEXTRACTI128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VEXTRACTI32x4rm, X86_INS_VEXTRACTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI32x4rr, X86_INS_VEXTRACTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI32x4rrk, X86_INS_VEXTRACTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI32x4rrkz, X86_INS_VEXTRACTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI64x4rm, X86_INS_VEXTRACTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI64x4rr, X86_INS_VEXTRACTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI64x4rrk, X86_INS_VEXTRACTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTI64x4rrkz, X86_INS_VEXTRACTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTPSmr, X86_INS_VEXTRACTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VEXTRACTPSrr, X86_INS_VEXTRACTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VEXTRACTPSzmr, X86_INS_VEXTRACTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VEXTRACTPSzrr, X86_INS_VEXTRACTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PDZ128m, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PDZ128mb, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PDZ256m, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PDZ256mb, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PDZm, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PDZmb, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PSZ128m, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PSZ128mb, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PSZ256m, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PSZ256mb, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PSZm, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADD132PSZmb, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPD4mr, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4mrY, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4rm, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4rmY, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4rr, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4rrY, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4rrY_REV, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPD4rr_REV, X86_INS_VFMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rm, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rmb, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rmbk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rmbkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rmk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rmkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rr, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rrk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v213rrkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rm, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rmb, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rmbk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rmbkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rmk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rmkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rr, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rrk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ128v231rrkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rm, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rmb, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rmbk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rmbkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rmk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rmkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rr, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rrk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v213rrkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rm, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rmb, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rmbk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rmbkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rmk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rmkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rr, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rrk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZ256v231rrkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rm, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rmb, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rmbk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rmbkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rmk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rmkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rr, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rrb, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rrbk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rrbkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rrk, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv213rrkz, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rm, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rmb, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rmbk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rmbkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rmk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rmkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rr, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rrk, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDZv231rrkz, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPDr132m, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr132mY, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr132r, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr132rY, X86_INS_VFMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr213m, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr213mY, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr213r, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr213rY, X86_INS_VFMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr231m, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr231mY, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr231r, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPDr231rY, X86_INS_VFMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPS4mr, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4mrY, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4rm, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4rmY, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4rr, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4rrY, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4rrY_REV, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPS4rr_REV, X86_INS_VFMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rm, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rmb, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rmbk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rmbkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rmk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rmkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rr, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rrk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v213rrkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rm, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rmb, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rmbk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rmbkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rmk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rmkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rr, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rrk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ128v231rrkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rm, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rmb, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rmbk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rmbkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rmk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rmkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rr, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rrk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v213rrkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rm, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rmb, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rmbk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rmbkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rmk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rmkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rr, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rrk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZ256v231rrkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rm, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rmb, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rmbk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rmbkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rmk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rmkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rr, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rrb, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rrbk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rrbkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rrk, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv213rrkz, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rm, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rmb, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rmbk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rmbkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rmk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rmkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rr, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rrk, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSZv231rrkz, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDPSr132m, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr132mY, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr132r, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr132rY, X86_INS_VFMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr213m, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr213mY, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr213r, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr213rY, X86_INS_VFMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr231m, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr231mY, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr231r, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDPSr231rY, X86_INS_VFMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSD4mr, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSD4mr_Int, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSD4rm, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSD4rm_Int, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSD4rr, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSD4rr_Int, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSD4rr_REV, X86_INS_VFMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSDZm, X86_INS_VFMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSDZr, X86_INS_VFMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSDr132m, X86_INS_VFMADD132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSDr132r, X86_INS_VFMADD132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSDr213m, X86_INS_VFMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSDr213r, X86_INS_VFMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSDr231m, X86_INS_VFMADD231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSDr231r, X86_INS_VFMADD231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSS4mr, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSS4mr_Int, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSS4rm, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSS4rm_Int, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSS4rr, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSS4rr_Int, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSS4rr_REV, X86_INS_VFMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSSZm, X86_INS_VFMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSSZr, X86_INS_VFMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSSr132m, X86_INS_VFMADD132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSSr132r, X86_INS_VFMADD132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSSr213m, X86_INS_VFMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSSr213r, X86_INS_VFMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSSr231m, X86_INS_VFMADD231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSSr231r, X86_INS_VFMADD231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PDZ128m, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PDZ128mb, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PDZ256m, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PDZ256mb, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PDZm, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PDZmb, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PSZ128m, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PSZ128mb, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PSZ256m, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PSZ256mb, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PSZm, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUB132PSZmb, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4mr, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4mrY, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4rm, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4rmY, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4rr, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4rrY, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4rrY_REV, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPD4rr_REV, X86_INS_VFMADDSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rm, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rmb, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rmbk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rmbkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rmk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rmkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rr, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rrk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v213rrkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rm, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rmb, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rmbk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rmbkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rmk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rmkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rr, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rrk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ128v231rrkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rm, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rmb, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rmbk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rmbkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rmk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rmkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rr, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rrk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v213rrkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rm, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rmb, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rmbk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rmbkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rmk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rmkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rr, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rrk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZ256v231rrkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rm, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rmb, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rmbk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rmbkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rmk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rmkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rr, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rrb, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rrbk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rrbkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rrk, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv213rrkz, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rm, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rmb, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rmbk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rmbkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rmk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rmkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rr, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rrk, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDZv231rrkz, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr132m, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr132mY, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr132r, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr132rY, X86_INS_VFMADDSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr213m, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr213mY, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr213r, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr213rY, X86_INS_VFMADDSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr231m, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr231mY, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr231r, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPDr231rY, X86_INS_VFMADDSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4mr, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4mrY, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4rm, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4rmY, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4rr, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4rrY, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4rrY_REV, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPS4rr_REV, X86_INS_VFMADDSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rm, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rmb, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rmbk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rmbkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rmk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rmkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rr, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rrk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v213rrkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rm, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rmb, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rmbk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rmbkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rmk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rmkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rr, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rrk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ128v231rrkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rm, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rmb, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rmbk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rmbkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rmk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rmkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rr, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rrk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v213rrkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rm, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rmb, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rmbk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rmbkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rmk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rmkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rr, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rrk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZ256v231rrkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rm, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rmb, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rmbk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rmbkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rmk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rmkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rr, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rrb, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rrbk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rrbkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rrk, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv213rrkz, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rm, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rmb, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rmbk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rmbkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rmk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rmkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rr, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rrk, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSZv231rrkz, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr132m, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr132mY, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr132r, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr132rY, X86_INS_VFMADDSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr213m, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr213mY, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr213r, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr213rY, X86_INS_VFMADDSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr231m, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr231mY, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr231r, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMADDSUBPSr231rY, X86_INS_VFMADDSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUB132PDZ128m, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PDZ128mb, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PDZ256m, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PDZ256mb, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PDZm, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PDZmb, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PSZ128m, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PSZ128mb, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PSZ256m, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PSZ256mb, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PSZm, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUB132PSZmb, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PDZ128m, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PDZ128mb, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PDZ256m, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PDZ256mb, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PDZm, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PDZmb, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PSZ128m, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PSZ128mb, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PSZ256m, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PSZ256mb, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PSZm, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADD132PSZmb, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4mr, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4mrY, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4rm, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4rmY, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4rr, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4rrY, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4rrY_REV, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPD4rr_REV, X86_INS_VFMSUBADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rm, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rmb, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rmbk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rmbkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rmk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rmkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rr, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rrk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v213rrkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rm, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rmb, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rmbk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rmbkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rmk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rmkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rr, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rrk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ128v231rrkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rm, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rmb, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rmbk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rmbkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rmk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rmkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rr, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rrk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v213rrkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rm, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rmb, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rmbk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rmbkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rmk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rmkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rr, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rrk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZ256v231rrkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rm, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rmb, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rmbk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rmbkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rmk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rmkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rr, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rrb, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rrbk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rrbkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rrk, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv213rrkz, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rm, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rmb, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rmbk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rmbkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rmk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rmkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rr, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rrk, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDZv231rrkz, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr132m, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr132mY, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr132r, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr132rY, X86_INS_VFMSUBADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr213m, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr213mY, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr213r, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr213rY, X86_INS_VFMSUBADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr231m, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr231mY, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr231r, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPDr231rY, X86_INS_VFMSUBADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4mr, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4mrY, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4rm, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4rmY, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4rr, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4rrY, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4rrY_REV, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPS4rr_REV, X86_INS_VFMSUBADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rm, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rmb, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rmbk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rmbkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rmk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rmkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rr, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rrk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v213rrkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rm, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rmb, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rmbk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rmbkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rmk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rmkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rr, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rrk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ128v231rrkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rm, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rmb, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rmbk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rmbkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rmk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rmkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rr, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rrk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v213rrkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rm, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rmb, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rmbk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rmbkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rmk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rmkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rr, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rrk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZ256v231rrkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rm, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rmb, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rmbk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rmbkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rmk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rmkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rr, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rrb, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rrbk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rrbkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rrk, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv213rrkz, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rm, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rmb, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rmbk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rmbkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rmk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rmkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rr, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rrk, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSZv231rrkz, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr132m, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr132mY, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr132r, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr132rY, X86_INS_VFMSUBADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr213m, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr213mY, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr213r, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr213rY, X86_INS_VFMSUBADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr231m, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr231mY, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr231r, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBADDPSr231rY, X86_INS_VFMSUBADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4mr, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4mrY, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4rm, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4rmY, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4rr, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4rrY, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4rrY_REV, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPD4rr_REV, X86_INS_VFMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rm, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rmb, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rmbk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rmbkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rmk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rmkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rr, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rrk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v213rrkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rm, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rmb, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rmbk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rmbkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rmk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rmkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rr, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rrk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ128v231rrkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rm, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rmb, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rmbk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rmbkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rmk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rmkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rr, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rrk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v213rrkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rm, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rmb, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rmbk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rmbkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rmk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rmkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rr, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rrk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZ256v231rrkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rm, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rmb, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rmbk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rmbkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rmk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rmkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rr, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rrb, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rrbk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rrbkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rrk, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv213rrkz, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rm, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rmb, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rmbk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rmbkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rmk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rmkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rr, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rrk, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDZv231rrkz, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr132m, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr132mY, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr132r, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr132rY, X86_INS_VFMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr213m, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr213mY, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr213r, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr213rY, X86_INS_VFMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr231m, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr231mY, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr231r, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPDr231rY, X86_INS_VFMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4mr, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4mrY, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4rm, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4rmY, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4rr, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4rrY, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4rrY_REV, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPS4rr_REV, X86_INS_VFMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rm, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rmb, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rmbk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rmbkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rmk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rmkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rr, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rrk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v213rrkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rm, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rmb, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rmbk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rmbkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rmk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rmkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rr, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rrk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ128v231rrkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rm, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rmb, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rmbk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rmbkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rmk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rmkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rr, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rrk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v213rrkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rm, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rmb, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rmbk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rmbkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rmk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rmkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rr, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rrk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZ256v231rrkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rm, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rmb, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rmbk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rmbkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rmk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rmkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rr, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rrb, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rrbk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rrbkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rrk, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv213rrkz, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rm, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rmb, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rmbk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rmbkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rmk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rmkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rr, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rrk, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSZv231rrkz, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr132m, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr132mY, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr132r, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr132rY, X86_INS_VFMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr213m, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr213mY, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr213r, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr213rY, X86_INS_VFMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr231m, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr231mY, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr231r, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBPSr231rY, X86_INS_VFMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4mr, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4mr_Int, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4rm, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4rm_Int, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4rr, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4rr_Int, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSD4rr_REV, X86_INS_VFMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSDZm, X86_INS_VFMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBSDZr, X86_INS_VFMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBSDr132m, X86_INS_VFMSUB132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSDr132r, X86_INS_VFMSUB132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSDr213m, X86_INS_VFMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSDr213r, X86_INS_VFMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSDr231m, X86_INS_VFMSUB231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSDr231r, X86_INS_VFMSUB231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4mr, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4mr_Int, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4rm, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4rm_Int, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4rr, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4rr_Int, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSS4rr_REV, X86_INS_VFMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFMSUBSSZm, X86_INS_VFMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBSSZr, X86_INS_VFMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFMSUBSSr132m, X86_INS_VFMSUB132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSSr132r, X86_INS_VFMSUB132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSSr213m, X86_INS_VFMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSSr213r, X86_INS_VFMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSSr231m, X86_INS_VFMSUB231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFMSUBSSr231r, X86_INS_VFMSUB231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADD132PDZ128m, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PDZ128mb, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PDZ256m, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PDZ256mb, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PDZm, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PDZmb, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PSZ128m, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PSZ128mb, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PSZ256m, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PSZ256mb, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PSZm, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADD132PSZmb, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4mr, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4mrY, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4rm, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4rmY, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4rr, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4rrY, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4rrY_REV, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPD4rr_REV, X86_INS_VFNMADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rm, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rmb, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rmbk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rmbkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rmk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rmkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rr, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rrk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v213rrkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rm, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rmb, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rmbk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rmbkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rmk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rmkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rr, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rrk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ128v231rrkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rm, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rmb, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rmbk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rmbkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rmk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rmkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rr, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rrk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v213rrkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rm, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rmb, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rmbk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rmbkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rmk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rmkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rr, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rrk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZ256v231rrkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rm, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rmb, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rmbk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rmbkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rmk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rmkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rr, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rrb, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rrbk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rrbkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rrk, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv213rrkz, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rm, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rmb, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rmbk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rmbkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rmk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rmkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rr, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rrk, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDZv231rrkz, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr132m, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr132mY, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr132r, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr132rY, X86_INS_VFNMADD132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr213m, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr213mY, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr213r, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr213rY, X86_INS_VFNMADD213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr231m, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr231mY, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr231r, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPDr231rY, X86_INS_VFNMADD231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4mr, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4mrY, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4rm, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4rmY, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4rr, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4rrY, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4rrY_REV, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPS4rr_REV, X86_INS_VFNMADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rm, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rmb, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rmbk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rmbkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rmk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rmkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rr, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rrk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v213rrkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rm, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rmb, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rmbk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rmbkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rmk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rmkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rr, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rrk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ128v231rrkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rm, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rmb, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rmbk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rmbkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rmk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rmkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rr, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rrk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v213rrkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rm, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rmb, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rmbk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rmbkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rmk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rmkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rr, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rrk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZ256v231rrkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rm, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rmb, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rmbk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rmbkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rmk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rmkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rr, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rrb, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rrbk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rrbkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rrk, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv213rrkz, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rm, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rmb, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rmbk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rmbkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rmk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rmkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rr, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rrk, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSZv231rrkz, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr132m, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr132mY, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr132r, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr132rY, X86_INS_VFNMADD132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr213m, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr213mY, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr213r, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr213rY, X86_INS_VFNMADD213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr231m, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr231mY, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr231r, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDPSr231rY, X86_INS_VFNMADD231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4mr, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4mr_Int, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4rm, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4rm_Int, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4rr, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4rr_Int, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSD4rr_REV, X86_INS_VFNMADDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSDZm, X86_INS_VFNMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDSDZr, X86_INS_VFNMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDSDr132m, X86_INS_VFNMADD132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSDr132r, X86_INS_VFNMADD132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSDr213m, X86_INS_VFNMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSDr213r, X86_INS_VFNMADD213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSDr231m, X86_INS_VFNMADD231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSDr231r, X86_INS_VFNMADD231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4mr, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4mr_Int, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4rm, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4rm_Int, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4rr, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4rr_Int, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSS4rr_REV, X86_INS_VFNMADDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMADDSSZm, X86_INS_VFNMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDSSZr, X86_INS_VFNMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMADDSSr132m, X86_INS_VFNMADD132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSSr132r, X86_INS_VFNMADD132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSSr213m, X86_INS_VFNMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSSr213r, X86_INS_VFNMADD213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSSr231m, X86_INS_VFNMADD231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMADDSSr231r, X86_INS_VFNMADD231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PDZ128m, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PDZ128mb, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PDZ256m, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PDZ256mb, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PDZm, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PDZmb, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PSZ128m, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PSZ128mb, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PSZ256m, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PSZ256mb, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PSZm, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUB132PSZmb, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4mr, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4mrY, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4rm, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4rmY, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4rr, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4rrY, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4rrY_REV, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPD4rr_REV, X86_INS_VFNMSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rm, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rmb, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rmbk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rmbkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rmk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rmkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rr, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rrk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v213rrkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rm, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rmb, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rmbk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rmbkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rmk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rmkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rr, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rrk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ128v231rrkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rm, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rmb, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rmbk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rmbkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rmk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rmkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rr, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rrk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v213rrkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rm, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rmb, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rmbk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rmbkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rmk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rmkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rr, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rrk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZ256v231rrkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rm, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rmb, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rmbk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rmbkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rmk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rmkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rr, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rrb, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rrbk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rrbkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rrk, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv213rrkz, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rm, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rmb, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rmbk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rmbkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rmk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rmkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rr, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rrk, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDZv231rrkz, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr132m, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr132mY, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr132r, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr132rY, X86_INS_VFNMSUB132PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr213m, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr213mY, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr213r, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr213rY, X86_INS_VFNMSUB213PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr231m, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr231mY, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr231r, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPDr231rY, X86_INS_VFNMSUB231PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4mr, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4mrY, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4rm, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4rmY, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4rr, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4rrY, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4rrY_REV, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPS4rr_REV, X86_INS_VFNMSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rm, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rmb, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rmbk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rmbkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rmk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rmkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rr, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rrk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v213rrkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rm, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rmb, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rmbk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rmbkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rmk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rmkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rr, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rrk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ128v231rrkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rm, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rmb, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rmbk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rmbkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rmk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rmkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rr, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rrk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v213rrkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rm, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rmb, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rmbk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rmbkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rmk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rmkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rr, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rrk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZ256v231rrkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rm, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rmb, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rmbk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rmbkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rmk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rmkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rr, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rrb, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rrbk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rrbkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rrk, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv213rrkz, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rm, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rmb, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rmbk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rmbkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rmk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rmkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rr, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rrk, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSZv231rrkz, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr132m, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr132mY, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr132r, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr132rY, X86_INS_VFNMSUB132PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr213m, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr213mY, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr213r, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr213rY, X86_INS_VFNMSUB213PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr231m, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr231mY, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr231r, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBPSr231rY, X86_INS_VFNMSUB231PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4mr, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4mr_Int, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4rm, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4rm_Int, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4rr, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4rr_Int, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSD4rr_REV, X86_INS_VFNMSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDZm, X86_INS_VFNMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDZr, X86_INS_VFNMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDr132m, X86_INS_VFNMSUB132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDr132r, X86_INS_VFNMSUB132SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDr213m, X86_INS_VFNMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDr213r, X86_INS_VFNMSUB213SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDr231m, X86_INS_VFNMSUB231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSDr231r, X86_INS_VFNMSUB231SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4mr, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4mr_Int, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4rm, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4rm_Int, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4rr, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4rr_Int, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSS4rr_REV, X86_INS_VFNMSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSZm, X86_INS_VFNMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSZr, X86_INS_VFNMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSr132m, X86_INS_VFNMSUB132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSr132r, X86_INS_VFNMSUB132SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSr213m, X86_INS_VFNMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSr213r, X86_INS_VFNMSUB213SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSr231m, X86_INS_VFNMSUB231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFNMSUBSSr231r, X86_INS_VFNMSUB231SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0 #endif }, { X86_VFRCZPDrm, X86_INS_VFRCZPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPDrmY, X86_INS_VFRCZPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPDrr, X86_INS_VFRCZPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPDrrY, X86_INS_VFRCZPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPSrm, X86_INS_VFRCZPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPSrmY, X86_INS_VFRCZPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPSrr, X86_INS_VFRCZPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZPSrrY, X86_INS_VFRCZPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZSDrm, X86_INS_VFRCZSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZSDrr, X86_INS_VFRCZSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZSSrm, X86_INS_VFRCZSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFRCZSSrr, X86_INS_VFRCZSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VFsANDNPDrm, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDNPDrr, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDNPSrm, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDNPSrr, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDPDrm, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDPDrr, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDPSrm, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsANDPSrr, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsORPDrm, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsORPDrr, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsORPSrm, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsORPSrr, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsXORPDrm, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsXORPDrr, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsXORPSrm, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFsXORPSrr, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VFvANDNPDrm, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDNPDrr, X86_INS_VANDNPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDNPSrm, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDNPSrr, X86_INS_VANDNPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDPDrm, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDPDrr, X86_INS_VANDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDPSrm, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvANDPSrr, X86_INS_VANDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvORPDrm, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvORPDrr, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvORPSrm, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvORPSrr, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvXORPDrm, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvXORPDrr, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvXORPSrm, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VFvXORPSrr, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VGATHERDPDYrm, X86_INS_VGATHERDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERDPDZrm, X86_INS_VGATHERDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VGATHERDPDrm, X86_INS_VGATHERDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERDPSYrm, X86_INS_VGATHERDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERDPSZrm, X86_INS_VGATHERDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VGATHERDPSrm, X86_INS_VGATHERDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERPF0DPDm, X86_INS_VGATHERPF0DPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF0DPSm, X86_INS_VGATHERPF0DPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF0QPDm, X86_INS_VGATHERPF0QPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF0QPSm, X86_INS_VGATHERPF0QPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF1DPDm, X86_INS_VGATHERPF1DPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF1DPSm, X86_INS_VGATHERPF1DPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF1QPDm, X86_INS_VGATHERPF1QPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERPF1QPSm, X86_INS_VGATHERPF1QPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VGATHERQPDYrm, X86_INS_VGATHERQPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERQPDZrm, X86_INS_VGATHERQPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VGATHERQPDrm, X86_INS_VGATHERQPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERQPSYrm, X86_INS_VGATHERQPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VGATHERQPSZrm, X86_INS_VGATHERQPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VGATHERQPSrm, X86_INS_VGATHERQPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VHADDPDYrm, X86_INS_VHADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPDYrr, X86_INS_VHADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPDrm, X86_INS_VHADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPDrr, X86_INS_VHADDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPSYrm, X86_INS_VHADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPSYrr, X86_INS_VHADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPSrm, X86_INS_VHADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHADDPSrr, X86_INS_VHADDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPDYrm, X86_INS_VHSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPDYrr, X86_INS_VHSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPDrm, X86_INS_VHSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPDrr, X86_INS_VHSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPSYrm, X86_INS_VHSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPSYrr, X86_INS_VHSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPSrm, X86_INS_VHSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VHSUBPSrr, X86_INS_VHSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VINSERTF128rm, X86_INS_VINSERTF128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VINSERTF128rr, X86_INS_VINSERTF128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VINSERTF32x4rm, X86_INS_VINSERTF32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTF32x4rr, X86_INS_VINSERTF32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTF32x8rm, X86_INS_VINSERTF32X8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTF32x8rr, X86_INS_VINSERTF32X8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTF64x2rm, X86_INS_VINSERTF64X2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTF64x2rr, X86_INS_VINSERTF64X2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTF64x4rm, X86_INS_VINSERTF64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTF64x4rr, X86_INS_VINSERTF64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTI128rm, X86_INS_VINSERTI128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VINSERTI128rr, X86_INS_VINSERTI128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VINSERTI32x4rm, X86_INS_VINSERTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTI32x4rr, X86_INS_VINSERTI32X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTI32x8rm, X86_INS_VINSERTI32X8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTI32x8rr, X86_INS_VINSERTI32X8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTI64x2rm, X86_INS_VINSERTI64X2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTI64x2rr, X86_INS_VINSERTI64X2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VINSERTI64x4rm, X86_INS_VINSERTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTI64x4rr, X86_INS_VINSERTI64X4, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTPSrm, X86_INS_VINSERTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VINSERTPSrr, X86_INS_VINSERTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VINSERTPSzrm, X86_INS_VINSERTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VINSERTPSzrr, X86_INS_VINSERTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VLDDQUYrm, X86_INS_VLDDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VLDDQUrm, X86_INS_VLDDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VLDMXCSR, X86_INS_VLDMXCSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVDQU, X86_INS_VMASKMOVDQU, #ifndef CAPSTONE_DIET { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMASKMOVDQU64, X86_INS_VMASKMOVDQU, #ifndef CAPSTONE_DIET { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMASKMOVPDYmr, X86_INS_VMASKMOVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPDYrm, X86_INS_VMASKMOVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPDmr, X86_INS_VMASKMOVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPDrm, X86_INS_VMASKMOVPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPSYmr, X86_INS_VMASKMOVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPSYrm, X86_INS_VMASKMOVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPSmr, X86_INS_VMASKMOVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMASKMOVPSrm, X86_INS_VMASKMOVPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXCPDYrm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPDYrr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPDrm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPDrr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPSYrm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPSYrr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPSrm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCPSrr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXCSDrm, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXCSDrr, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXCSSrm, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXCSSrr, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXPDYrm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPDYrr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rmb, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rmbk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rmbkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rmk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rmkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rrk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ128rrkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rmb, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rmbk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rmbkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rmk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rmkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rrk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZ256rrkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPDZrm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrmb, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrmbk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrmbkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrmk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrmkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrrk, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDZrrkz, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPDrm, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPDrr, X86_INS_VMAXPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPSYrm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPSYrr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rmb, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rmbk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rmbkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rmk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rmkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rrk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ128rrkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rmb, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rmbk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rmbkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rmk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rmkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rrk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZ256rrkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMAXPSZrm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrmb, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrmbk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrmbkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrmk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrmkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrrk, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSZrrkz, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXPSrm, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXPSrr, X86_INS_VMAXPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMAXSDZrm, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrm_Int, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrm_Intk, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrm_Intkz, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrr, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrr_Int, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrr_Intk, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrr_Intkz, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrrb, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrrbk, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDZrrbkz, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSDrm, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSDrm_Int, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSDrr, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSDrr_Int, X86_INS_VMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSSZrm, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrm_Int, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrm_Intk, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrm_Intkz, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrr, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrr_Int, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrr_Intk, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrr_Intkz, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrrb, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrrbk, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSZrrbkz, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMAXSSrm, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSSrm_Int, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSSrr, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMAXSSrr_Int, X86_INS_VMAXSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMCALL, X86_INS_VMCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMCLEARm, X86_INS_VMCLEAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMFUNC, X86_INS_VMFUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMINCPDYrm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPDYrr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPDrm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPDrr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPSYrm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPSYrr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPSrm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCPSrr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINCSDrm, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINCSDrr, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINCSSrm, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINCSSrr, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINPDYrm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPDYrr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rmb, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rmbk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rmbkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rmk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rmkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rrk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ128rrkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rmb, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rmbk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rmbkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rmk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rmkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rrk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZ256rrkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPDZrm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrmb, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrmbk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrmbkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrmk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrmkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrrk, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDZrrkz, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPDrm, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPDrr, X86_INS_VMINPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPSYrm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPSYrr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rmb, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rmbk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rmbkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rmk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rmkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rrk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ128rrkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rmb, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rmbk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rmbkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rmk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rmkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rrk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZ256rrkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMINPSZrm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrmb, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrmbk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrmbkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrmk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrmkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrrk, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSZrrkz, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINPSrm, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINPSrr, X86_INS_VMINPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMINSDZrm, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrm_Int, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrm_Intk, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrm_Intkz, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrr, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrr_Int, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrr_Intk, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrr_Intkz, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrrb, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrrbk, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDZrrbkz, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSDrm, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSDrm_Int, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSDrr, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSDrr_Int, X86_INS_VMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSSZrm, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrm_Int, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrm_Intk, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrm_Intkz, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrr, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrr_Int, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrr_Intk, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrr_Intkz, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrrb, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrrbk, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSZrrbkz, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMINSSrm, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSSrm_Int, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSSrr, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMINSSrr_Int, X86_INS_VMINSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMLAUNCH, X86_INS_VMLAUNCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMLOAD32, X86_INS_VMLOAD, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMLOAD64, X86_INS_VMLOAD, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMMCALL, X86_INS_VMMCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMOV64toPQIZrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOV64toPQIrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOV64toPQIrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOV64toSDZrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOV64toSDrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOV64toSDrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVAPDYmr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDYrm, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDYrr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDYrr_REV, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128mr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128mrk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rm, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rmk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rmkz, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rr_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rrk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rrk_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rrkz, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ128rrkz_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256mr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256mrk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rm, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rmk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rmkz, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rr_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rrk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rrk_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rrkz, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZ256rrkz_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDZmr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZmrk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrm, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrmk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrmkz, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrr_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrrk, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrrk_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrrkz, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDZrrkz_alt, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPDmr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDrm, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDrr, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPDrr_REV, X86_INS_VMOVAPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVAPSYmr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSYrm, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSYrr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSYrr_REV, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128mr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128mrk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rm, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rmk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rmkz, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rr_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rrk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rrk_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rrkz, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ128rrkz_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256mr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256mrk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rm, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rmk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rmkz, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rr_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rrk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rrk_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rrkz, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZ256rrkz_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSZmr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZmrk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrm, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrmk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrmkz, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrr_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrrk, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrrk_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrrkz, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSZrrkz_alt, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVAPSmr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSrm, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSrr, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVAPSrr_REV, X86_INS_VMOVAPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDDUPYrm, X86_INS_VMOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDDUPYrr, X86_INS_VMOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDDUPZrm, X86_INS_VMOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDDUPZrr, X86_INS_VMOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDDUPrm, X86_INS_VMOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDDUPrr, X86_INS_VMOVDDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDI2PDIZrm, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDI2PDIZrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDI2PDIrm, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDI2PDIrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDI2SSZrm, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDI2SSZrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDI2SSrm, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDI2SSrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128mr, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128mrk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rm, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rmk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rmkz, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rr, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rr_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rrk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rrk_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rrkz, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z128rrkz_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256mr, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256mrk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rm, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rmk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rmkz, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rr, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rr_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rrk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rrk_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rrkz, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Z256rrkz_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zmr, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zmrk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrm, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrmk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrmkz, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrr, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrr_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrrk, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrrk_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrrkz, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA32Zrrkz_alt, X86_INS_VMOVDQA32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128mr, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128mrk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rm, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rmk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rmkz, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rr, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rr_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rrk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rrk_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rrkz, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z128rrkz_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256mr, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256mrk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rm, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rmk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rmkz, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rr, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rr_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rrk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rrk_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rrkz, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Z256rrkz_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zmr, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zmrk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrm, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrmk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrmkz, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrr, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrr_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrrk, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrrk_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrrkz, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQA64Zrrkz_alt, X86_INS_VMOVDQA64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQAYmr, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQAYrm, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQAYrr, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQAYrr_REV, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQAmr, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQArm, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQArr, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQArr_REV, X86_INS_VMOVDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128mr, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128mrk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rm, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rmk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rmkz, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rr, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rr_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rrk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rrk_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rrkz, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z128rrkz_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256mr, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256mrk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rm, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rmk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rmkz, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rr, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rr_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rrk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rrk_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rrkz, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Z256rrkz_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zmr, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zmrk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrm, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrmk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrmkz, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrr, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrr_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrrk, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrrk_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrrkz, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU16Zrrkz_alt, X86_INS_VMOVDQU16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128mr, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128mrk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rm, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rmk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rmkz, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rr, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rr_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rrk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rrk_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rrkz, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z128rrkz_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256mr, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256mrk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rm, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rmk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rmkz, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rr, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rr_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rrk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rrk_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rrkz, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Z256rrkz_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zmr, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zmrk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrm, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrmk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrmkz, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrr, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrr_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrrk, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrrk_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrrkz, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU32Zrrkz_alt, X86_INS_VMOVDQU32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128mr, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128mrk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rm, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rmk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rmkz, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rr, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rr_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rrk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rrk_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rrkz, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z128rrkz_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256mr, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256mrk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rm, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rmk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rmkz, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rr, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rr_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rrk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rrk_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rrkz, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Z256rrkz_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zmr, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zmrk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrm, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrmk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrmkz, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrr, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrr_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrrk, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrrk_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrrkz, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU64Zrrkz_alt, X86_INS_VMOVDQU64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128mr, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128mrk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rm, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rmk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rmkz, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rr, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rr_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rrk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rrk_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rrkz, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z128rrkz_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256mr, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256mrk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rm, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rmk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rmkz, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rr, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rr_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rrk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rrk_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rrkz, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Z256rrkz_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zmr, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zmrk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrm, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrmk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrmkz, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrr, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrr_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrrk, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrrk_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrrkz, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQU8Zrrkz_alt, X86_INS_VMOVDQU8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VMOVDQUYmr, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUYrm, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUYrr, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUYrr_REV, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUmr, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUrm, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUrr, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVDQUrr_REV, X86_INS_VMOVDQU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVHLPSZrr, X86_INS_VMOVHLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVHLPSrr, X86_INS_VMOVHLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVHPDmr, X86_INS_VMOVHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVHPDrm, X86_INS_VMOVHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVHPSmr, X86_INS_VMOVHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVHPSrm, X86_INS_VMOVHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVLHPSZrr, X86_INS_VMOVLHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVLHPSrr, X86_INS_VMOVLHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVLPDmr, X86_INS_VMOVLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVLPDrm, X86_INS_VMOVLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVLPSmr, X86_INS_VMOVLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVLPSrm, X86_INS_VMOVLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVMSKPDYrr, X86_INS_VMOVMSKPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVMSKPDrr, X86_INS_VMOVMSKPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVMSKPSYrr, X86_INS_VMOVMSKPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVMSKPSrr, X86_INS_VMOVMSKPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQAYrm, X86_INS_VMOVNTDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VMOVNTDQAZ128rm, X86_INS_VMOVNTDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQAZ256rm, X86_INS_VMOVNTDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQAZrm, X86_INS_VMOVNTDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVNTDQArm, X86_INS_VMOVNTDQA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQYmr, X86_INS_VMOVNTDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQZ128mr, X86_INS_VMOVNTDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQZ256mr, X86_INS_VMOVNTDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTDQZmr, X86_INS_VMOVNTDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVNTDQmr, X86_INS_VMOVNTDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPDYmr, X86_INS_VMOVNTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPDZ128mr, X86_INS_VMOVNTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPDZ256mr, X86_INS_VMOVNTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPDZmr, X86_INS_VMOVNTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVNTPDmr, X86_INS_VMOVNTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPSYmr, X86_INS_VMOVNTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPSZ128mr, X86_INS_VMOVNTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPSZ256mr, X86_INS_VMOVNTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVNTPSZmr, X86_INS_VMOVNTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVNTPSmr, X86_INS_VMOVNTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVPDI2DIZmr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVPDI2DIZrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVPDI2DImr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVPDI2DIrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVPQI2QImr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVPQI2QIrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVPQIto64Zmr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMOVPQIto64Zrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMOVPQIto64rm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVPQIto64rr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVQI2PQIZrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVQI2PQIrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSDZmr, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDZmrk, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDZrm, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDZrr, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDZrr_REV, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDZrrk, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDmr, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSDrm, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSDrr, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSDrr_REV, X86_INS_VMOVSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSDto64Zmr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDto64Zrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSDto64mr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSDto64rr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSHDUPYrm, X86_INS_VMOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSHDUPYrr, X86_INS_VMOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSHDUPZrm, X86_INS_VMOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSHDUPZrr, X86_INS_VMOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSHDUPrm, X86_INS_VMOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSHDUPrr, X86_INS_VMOVSHDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSLDUPYrm, X86_INS_VMOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSLDUPYrr, X86_INS_VMOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSLDUPZrm, X86_INS_VMOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSLDUPZrr, X86_INS_VMOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSLDUPrm, X86_INS_VMOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSLDUPrr, X86_INS_VMOVSLDUP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSS2DIZmr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSS2DIZrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSS2DImr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSS2DIrr, X86_INS_VMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSSZmr, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSSZmrk, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSSZrm, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSSZrr, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSSZrr_REV, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSSZrrk, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVSSmr, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSSrm, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSSrr, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVSSrr_REV, X86_INS_VMOVSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVUPDYmr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDYrm, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDYrr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDYrr_REV, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128mr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128mrk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rm, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rmk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rmkz, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rr_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rrk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rrk_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rrkz, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ128rrkz_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256mr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256mrk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rm, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rmk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rmkz, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rr_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rrk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rrk_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rrkz, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZ256rrkz_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDZmr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZmrk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrm, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrmk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrmkz, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrr_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrrk, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrrk_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrrkz, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDZrrkz_alt, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPDmr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDrm, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDrr, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPDrr_REV, X86_INS_VMOVUPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVUPSYmr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSYrm, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSYrr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSYrr_REV, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128mr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128mrk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rm, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rmk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rmkz, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rr_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rrk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rrk_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rrkz, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ128rrkz_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256mr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256mrk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rm, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rmk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rmkz, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rr_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rrk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rrk_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rrkz, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZ256rrkz_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSZmr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZmrk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrm, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrmk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrmkz, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrr_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrrk, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrrk_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrrkz, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSZrrkz_alt, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVUPSmr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSrm, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSrr, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMOVUPSrr_REV, X86_INS_VMOVUPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVZPQILo2PQIZrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVZPQILo2PQIZrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMOVZPQILo2PQIrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVZPQILo2PQIrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVZQI2PQIrm, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMOVZQI2PQIrr, X86_INS_VMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMPSADBWYrmi, X86_INS_VMPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VMPSADBWYrri, X86_INS_VMPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VMPSADBWrmi, X86_INS_VMPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMPSADBWrri, X86_INS_VMPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMPTRLDm, X86_INS_VMPTRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMPTRSTm, X86_INS_VMPTRST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMREAD32rm, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMREAD32rr, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMREAD64rm, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMREAD64rr, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMRESUME, X86_INS_VMRESUME, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMRUN32, X86_INS_VMRUN, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMRUN64, X86_INS_VMRUN, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMSAVE32, X86_INS_VMSAVE, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMSAVE64, X86_INS_VMSAVE, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMULPDYrm, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPDYrr, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rm, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rmb, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rmbk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rmbkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rmk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rmkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rr, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rrk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ128rrkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rm, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rmb, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rmbk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rmbkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rmk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rmkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rr, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rrk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZ256rrkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPDZrb, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrbk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrbkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrm, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrmb, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrmbk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrmbkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrmk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrmkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrr, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrrk, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDZrrkz, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPDrm, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPDrr, X86_INS_VMULPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPSYrm, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPSYrr, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rm, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rmb, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rmbk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rmbkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rmk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rmkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rr, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rrk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ128rrkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rm, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rmb, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rmbk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rmbkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rmk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rmkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rr, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rrk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZ256rrkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VMULPSZrb, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrbk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrbkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrm, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrmb, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrmbk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrmbkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrmk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrmkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrr, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrrk, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSZrrkz, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULPSrm, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULPSrr, X86_INS_VMULPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VMULSDZrm, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrm_Int, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrm_Intk, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrm_Intkz, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrr, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrr_Int, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrr_Intk, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrr_Intkz, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrrb, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrrbk, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDZrrbkz, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSDrm, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSDrm_Int, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSDrr, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSDrr_Int, X86_INS_VMULSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSSZrm, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrm_Int, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrm_Intk, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrm_Intkz, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrr, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrr_Int, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrr_Intk, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrr_Intkz, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrrb, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrrbk, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSZrrbkz, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VMULSSrm, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSSrm_Int, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSSrr, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMULSSrr_Int, X86_INS_VMULSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VMWRITE32rm, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMWRITE32rr, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMWRITE64rm, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMWRITE64rr, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMXOFF, X86_INS_VMXOFF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMXON, X86_INS_VMXON, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VORPDYrm, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPDYrr, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPDrm, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPDrr, X86_INS_VORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPSYrm, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPSYrr, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPSrm, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VORPSrr, X86_INS_VORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPABSBrm128, X86_INS_VPABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPABSBrm256, X86_INS_VPABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPABSBrr128, X86_INS_VPABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPABSBrr256, X86_INS_VPABSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPABSDZrm, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrmb, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrmbk, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrmbkz, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrmk, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrmkz, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrr, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrrk, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDZrrkz, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSDrm128, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPABSDrm256, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPABSDrr128, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPABSDrr256, X86_INS_VPABSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPABSQZrm, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrmb, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrmbk, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrmbkz, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrmk, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrmkz, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrr, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrrk, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSQZrrkz, X86_INS_VPABSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPABSWrm128, X86_INS_VPABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPABSWrm256, X86_INS_VPABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPABSWrr128, X86_INS_VPABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPABSWrr256, X86_INS_VPABSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKSSDWYrm, X86_INS_VPACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKSSDWYrr, X86_INS_VPACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKSSDWrm, X86_INS_VPACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKSSDWrr, X86_INS_VPACKSSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKSSWBYrm, X86_INS_VPACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKSSWBYrr, X86_INS_VPACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKSSWBrm, X86_INS_VPACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKSSWBrr, X86_INS_VPACKSSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKUSDWYrm, X86_INS_VPACKUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKUSDWYrr, X86_INS_VPACKUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKUSDWrm, X86_INS_VPACKUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKUSDWrr, X86_INS_VPACKUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKUSWBYrm, X86_INS_VPACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKUSWBYrr, X86_INS_VPACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPACKUSWBrm, X86_INS_VPACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPACKUSWBrr, X86_INS_VPACKUSWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDBYrm, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDBYrr, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ128rm, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ128rmk, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ128rmkz, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ128rr, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ128rrk, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ128rrkz, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ256rm, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ256rmk, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ256rmkz, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ256rr, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ256rrk, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZ256rrkz, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDBZrm, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDBZrmk, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDBZrmkz, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDBZrr, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDBZrrk, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDBZrrkz, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDBrm, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDBrr, X86_INS_VPADDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDDYrm, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDDYrr, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rm, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rmb, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rmbk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rmbkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rmk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rmkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rr, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rrk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ128rrkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rm, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rmb, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rmbk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rmbkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rmk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rmkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rr, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rrk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZ256rrkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDDZrm, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrmb, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrmbk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrmbkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrmk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrmkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrr, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrrk, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDZrrkz, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDDrm, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDDrr, X86_INS_VPADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDQYrm, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDQYrr, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rm, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rmb, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rmbk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rmbkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rmk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rmkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rr, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rrk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ128rrkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rm, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rmb, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rmbk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rmbkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rmk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rmkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rr, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rrk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZ256rrkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDQZrm, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrmb, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrmbk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrmbkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrmk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrmkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrr, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrrk, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQZrrkz, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPADDQrm, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDQrr, X86_INS_VPADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDSBYrm, X86_INS_VPADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDSBYrr, X86_INS_VPADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDSBrm, X86_INS_VPADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDSBrr, X86_INS_VPADDSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDSWYrm, X86_INS_VPADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDSWYrr, X86_INS_VPADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDSWrm, X86_INS_VPADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDSWrr, X86_INS_VPADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDUSBYrm, X86_INS_VPADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDUSBYrr, X86_INS_VPADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDUSBrm, X86_INS_VPADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDUSBrr, X86_INS_VPADDUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDUSWYrm, X86_INS_VPADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDUSWYrr, X86_INS_VPADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPADDUSWrm, X86_INS_VPADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDUSWrr, X86_INS_VPADDUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPADDWYrm, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDWYrr, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ128rm, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ128rmk, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ128rmkz, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ128rr, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ128rrk, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ128rrkz, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ256rm, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ256rmk, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ256rmkz, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ256rr, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ256rrk, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZ256rrkz, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPADDWZrm, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDWZrmk, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDWZrmkz, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDWZrr, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDWZrrk, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDWZrrkz, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPADDWrm, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPADDWrr, X86_INS_VPADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPALIGNR128rm, X86_INS_VPALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPALIGNR128rr, X86_INS_VPALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPALIGNR256rm, X86_INS_VPALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPALIGNR256rr, X86_INS_VPALIGNR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rm, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rmb, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rmbk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rmbkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rmk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rmkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rr, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rrk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ128rrkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rm, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rmb, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rmbk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rmbkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rmk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rmkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rr, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rrk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZ256rrkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDDZrm, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrmb, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrmbk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrmbkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrmk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrmkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrr, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrrk, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDDZrrkz, X86_INS_VPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rm, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rmb, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rmbk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rmbkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rmk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rmkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rr, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rrk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ128rrkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rm, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rmb, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rmbk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rmbkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rmk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rmkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rr, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rrk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZ256rrkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNDZrm, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrmb, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrmbk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrmbkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrmk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrmkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrr, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrrk, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNDZrrkz, X86_INS_VPANDND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rm, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rmb, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rmbk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rmbkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rmk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rmkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rr, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rrk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ128rrkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rm, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rmb, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rmbk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rmbkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rmk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rmkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rr, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rrk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZ256rrkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDNQZrm, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrmb, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrmbk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrmbkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrmk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrmkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrr, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrrk, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNQZrrkz, X86_INS_VPANDNQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDNYrm, X86_INS_VPANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDNYrr, X86_INS_VPANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDNrm, X86_INS_VPANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDNrr, X86_INS_VPANDN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rm, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rmb, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rmbk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rmbkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rmk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rmkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rr, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rrk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ128rrkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rm, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rmb, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rmbk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rmbkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rmk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rmkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rr, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rrk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZ256rrkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPANDQZrm, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrmb, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrmbk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrmbkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrmk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrmkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrr, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrrk, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDQZrrkz, X86_INS_VPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPANDYrm, X86_INS_VPAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDYrr, X86_INS_VPAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDrm, X86_INS_VPAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPANDrr, X86_INS_VPAND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPAVGBYrm, X86_INS_VPAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPAVGBYrr, X86_INS_VPAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPAVGBrm, X86_INS_VPAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPAVGBrr, X86_INS_VPAVGB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPAVGWYrm, X86_INS_VPAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPAVGWYrr, X86_INS_VPAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPAVGWrm, X86_INS_VPAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPAVGWrr, X86_INS_VPAVGW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPBLENDDYrmi, X86_INS_VPBLENDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDDYrri, X86_INS_VPBLENDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDDrmi, X86_INS_VPBLENDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDDrri, X86_INS_VPBLENDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ128rm, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ128rmk, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ128rmkz, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ128rr, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ128rrk, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ128rrkz, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ256rm, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ256rmk, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ256rmkz, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ256rr, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ256rrk, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZ256rrkz, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZrm, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZrmk, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZrmkz, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZrr, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZrrk, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMBZrrkz, X86_INS_VPBLENDMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rm, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rmb, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rmbk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rmk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rmkz, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rr, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rrk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ128rrkz, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rm, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rmb, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rmbk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rmk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rmkz, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rr, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rrk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZ256rrkz, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrm, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrmb, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrmbk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrmk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrmkz, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrr, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrrk, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMDZrrkz, X86_INS_VPBLENDMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rm, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rmb, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rmbk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rmk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rmkz, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rr, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rrk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ128rrkz, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rm, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rmb, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rmbk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rmk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rmkz, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rr, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rrk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZ256rrkz, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrm, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrmb, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrmbk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrmk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrmkz, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrr, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrrk, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMQZrrkz, X86_INS_VPBLENDMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ128rm, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ128rmk, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ128rmkz, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ128rr, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ128rrk, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ128rrkz, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ256rm, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ256rmk, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ256rmkz, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ256rr, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ256rrk, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZ256rrkz, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZrm, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZrmk, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZrmkz, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZrr, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZrrk, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDMWZrrkz, X86_INS_VPBLENDMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBLENDVBYrm, X86_INS_VPBLENDVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDVBYrr, X86_INS_VPBLENDVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDVBrm, X86_INS_VPBLENDVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPBLENDVBrr, X86_INS_VPBLENDVB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPBLENDWYrmi, X86_INS_VPBLENDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDWYrri, X86_INS_VPBLENDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBLENDWrmi, X86_INS_VPBLENDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPBLENDWrri, X86_INS_VPBLENDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBYrm, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBYrr, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZ128r, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZ128rk, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZ128rkz, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZ256r, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZ256rk, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZ256rkz, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZr, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZrk, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrZrkz, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrm, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTBrr, X86_INS_VPBROADCASTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDYrm, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDYrr, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDZkrm, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDZkrr, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDZrm, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDZrr, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZ128r, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZ128rk, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZ128rkz, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZ256r, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZ256rk, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZ256rkz, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZr, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZrk, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrZrkz, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrm, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTDrr, X86_INS_VPBROADCASTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTMB2QZ128rr, X86_INS_VPBROADCASTMB2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTMB2QZ256rr, X86_INS_VPBROADCASTMB2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTMB2QZrr, X86_INS_VPBROADCASTMB2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTMW2DZ128rr, X86_INS_VPBROADCASTMW2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTMW2DZ256rr, X86_INS_VPBROADCASTMW2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTMW2DZrr, X86_INS_VPBROADCASTMW2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQYrm, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQYrr, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQZkrm, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQZkrr, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQZrm, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQZrr, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZ128r, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZ128rk, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZ128rkz, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZ256r, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZ256rk, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZ256rkz, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZr, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZrk, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrZrkz, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrm, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTQrr, X86_INS_VPBROADCASTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWYrm, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWYrr, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZ128r, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZ128rk, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZ128rkz, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZ256r, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZ256rk, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZ256rkz, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZr, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZrk, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrZrkz, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrm, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPBROADCASTWrr, X86_INS_VPBROADCASTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPCLMULQDQrm, X86_INS_VPCLMULQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_PCLMUL, 0 }, 0, 0 #endif }, { X86_VPCLMULQDQrr, X86_INS_VPCLMULQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_PCLMUL, 0 }, 0, 0 #endif }, { X86_VPCMOVmr, X86_INS_VPCMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCMOVmrY, X86_INS_VPCMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCMOVrm, X86_INS_VPCMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCMOVrmY, X86_INS_VPCMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCMOVrr, X86_INS_VPCMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCMOVrrY, X86_INS_VPCMOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rmi, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rmi_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rmik, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rmik_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rri, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rri_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rrik, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ128rrik_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rmi, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rmi_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rmik, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rmik_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rri, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rri_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rrik, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZ256rrik_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPBZrmi, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrmi_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrmik, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrmik_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrri, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrri_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrrik, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPBZrrik_alt, X86_INS_VPCMPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmi, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmi_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmib, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmib_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmibk, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmibk_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmik, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rmik_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rri, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rri_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rrik, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ128rrik_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmi, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmi_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmib, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmib_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmibk, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmibk_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmik, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rmik_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rri, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rri_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rrik, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZ256rrik_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmi, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmi_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmib, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmib_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmibk, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmibk_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmik, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrmik_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrri, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrri_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrrik, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPDZrrik_alt, X86_INS_VPCMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQBYrm, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBYrr, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ128rm, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ128rmk, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ128rr, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ128rrk, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ256rm, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ256rmk, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ256rr, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZ256rrk, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZrm, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZrmk, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZrr, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQBZrrk, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQBrm, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQBrr, X86_INS_VPCMPEQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDYrm, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDYrr, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ128rm, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ128rmb, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ128rmbk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ128rmk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ128rr, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ128rrk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ256rm, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ256rmb, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ256rmbk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ256rmk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ256rr, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZ256rrk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZrm, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZrmb, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZrmbk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZrmk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZrr, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQDZrrk, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQDrm, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQDrr, X86_INS_VPCMPEQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQYrm, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPCMPEQQYrr, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ128rm, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ128rmb, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ128rmbk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ128rmk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ128rr, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ128rrk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ256rm, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ256rmb, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ256rmbk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ256rmk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ256rr, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZ256rrk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZrm, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZrmb, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZrmbk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZrmk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZrr, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQQZrrk, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPEQQrm, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQQrr, X86_INS_VPCMPEQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWYrm, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWYrr, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ128rm, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ128rmk, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ128rr, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ128rrk, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ256rm, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ256rmk, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ256rr, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZ256rrk, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZrm, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZrmk, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZrr, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQWZrrk, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPEQWrm, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPEQWrr, X86_INS_VPCMPEQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPESTRIrm, X86_INS_VPCMPESTRI, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPESTRIrr, X86_INS_VPCMPESTRI, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPESTRM128rm, X86_INS_VPCMPESTRM, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPESTRM128rr, X86_INS_VPCMPESTRM, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBYrm, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBYrr, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ128rm, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ128rmk, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ128rr, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ128rrk, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ256rm, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ256rmk, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ256rr, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZ256rrk, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZrm, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZrmk, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZrr, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTBZrrk, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTBrm, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTBrr, X86_INS_VPCMPGTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDYrm, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDYrr, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ128rm, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ128rmb, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ128rmbk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ128rmk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ128rr, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ128rrk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ256rm, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ256rmb, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ256rmbk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ256rmk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ256rr, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZ256rrk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZrm, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZrmb, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZrmbk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZrmk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZrr, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTDZrrk, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTDrm, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTDrr, X86_INS_VPCMPGTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQYrm, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPCMPGTQYrr, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ128rm, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ128rmb, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ128rmbk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ128rmk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ128rr, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ128rrk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ256rm, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ256rmb, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ256rmbk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ256rmk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ256rr, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZ256rrk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZrm, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZrmb, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZrmbk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZrmk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZrr, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTQZrrk, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPGTQrm, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPGTQrr, X86_INS_VPCMPGTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWYrm, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWYrr, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ128rm, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ128rmk, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ128rr, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ128rrk, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ256rm, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ256rmk, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ256rr, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZ256rrk, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZrm, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZrmk, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZrr, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTWZrrk, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPGTWrm, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPGTWrr, X86_INS_VPCMPGTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPCMPISTRIrm, X86_INS_VPCMPISTRI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPISTRIrr, X86_INS_VPCMPISTRI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPISTRM128rm, X86_INS_VPCMPISTRM, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPISTRM128rr, X86_INS_VPCMPISTRM, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmi, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmi_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmib, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmib_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmibk, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmibk_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmik, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rmik_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rri, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rri_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rrik, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ128rrik_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmi, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmi_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmib, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmib_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmibk, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmibk_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmik, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rmik_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rri, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rri_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rrik, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZ256rrik_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmi, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmi_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmib, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmib_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmibk, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmibk_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmik, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrmik_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrri, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrri_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrrik, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPQZrrik_alt, X86_INS_VPCMPQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rmi, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rmi_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rmik, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rmik_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rri, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rri_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rrik, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ128rrik_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rmi, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rmi_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rmik, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rmik_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rri, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rri_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rrik, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZ256rrik_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrmi, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrmi_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrmik, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrmik_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrri, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrri_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrrik, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUBZrrik_alt, X86_INS_VPCMPUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmi, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmi_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmib, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmib_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmibk, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmibk_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmik, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rmik_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rri, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rri_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rrik, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ128rrik_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmi, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmi_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmib, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmib_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmibk, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmibk_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmik, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rmik_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rri, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rri_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rrik, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZ256rrik_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmi, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmi_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmib, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmib_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmibk, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmibk_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmik, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrmik_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrri, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrri_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrrik, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUDZrrik_alt, X86_INS_VPCMPUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmi, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmi_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmib, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmib_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmibk, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmibk_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmik, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rmik_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rri, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rri_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rrik, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ128rrik_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmi, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmi_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmib, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmib_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmibk, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmibk_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmik, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rmik_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rri, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rri_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rrik, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZ256rrik_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmi, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmi_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmib, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmib_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmibk, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmibk_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmik, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrmik_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrri, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrri_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrrik, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUQZrrik_alt, X86_INS_VPCMPUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rmi, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rmi_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rmik, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rmik_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rri, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rri_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rrik, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ128rrik_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rmi, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rmi_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rmik, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rmik_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rri, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rri_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rrik, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZ256rrik_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrmi, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrmi_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrmik, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrmik_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrri, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrri_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrrik, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPUWZrrik_alt, X86_INS_VPCMPUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rmi, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rmi_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rmik, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rmik_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rri, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rri_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rrik, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ128rrik_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rmi, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rmi_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rmik, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rmik_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rri, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rri_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rrik, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZ256rrik_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCMPWZrmi, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrmi_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrmik, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrmik_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrri, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrri_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrrik, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCMPWZrrik_alt, X86_INS_VPCMPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPCOMBmi, X86_INS_VPCOMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMBmi_alt, X86_INS_VPCOMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMBri, X86_INS_VPCOMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMBri_alt, X86_INS_VPCOMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMDmi, X86_INS_VPCOMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMDmi_alt, X86_INS_VPCOMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMDri, X86_INS_VPCOMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMDri_alt, X86_INS_VPCOMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZ128mrk, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZ128rrk, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZ128rrkz, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZ256mrk, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZ256rrk, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZ256rrkz, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZmrk, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZrrk, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSDZrrkz, X86_INS_VPCOMPRESSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZ128mrk, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZ128rrk, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZ128rrkz, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZ256mrk, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZ256rrk, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZ256rrkz, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZmrk, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZrrk, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCOMPRESSQZrrkz, X86_INS_VPCOMPRESSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPCOMQmi, X86_INS_VPCOMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMQmi_alt, X86_INS_VPCOMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMQri, X86_INS_VPCOMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMQri_alt, X86_INS_VPCOMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUBmi, X86_INS_VPCOMUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUBmi_alt, X86_INS_VPCOMUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUBri, X86_INS_VPCOMUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUBri_alt, X86_INS_VPCOMUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUDmi, X86_INS_VPCOMUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUDmi_alt, X86_INS_VPCOMUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUDri, X86_INS_VPCOMUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUDri_alt, X86_INS_VPCOMUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUQmi, X86_INS_VPCOMUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUQmi_alt, X86_INS_VPCOMUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUQri, X86_INS_VPCOMUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUQri_alt, X86_INS_VPCOMUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUWmi, X86_INS_VPCOMUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUWmi_alt, X86_INS_VPCOMUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUWri, X86_INS_VPCOMUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMUWri_alt, X86_INS_VPCOMUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMWmi, X86_INS_VPCOMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMWmi_alt, X86_INS_VPCOMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMWri, X86_INS_VPCOMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCOMWri_alt, X86_INS_VPCOMW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrm, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrmb, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrmbk, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrmbkz, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrmk, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrmkz, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrr, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrrk, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTDrrkz, X86_INS_VPCONFLICTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrm, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrmb, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrmbk, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrmbkz, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrmk, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrmkz, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrr, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrrk, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPCONFLICTQrrkz, X86_INS_VPCONFLICTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPERM2F128rm, X86_INS_VPERM2F128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERM2F128rr, X86_INS_VPERM2F128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERM2I128rm, X86_INS_VPERM2I128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERM2I128rr, X86_INS_VPERM2I128, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMDYrm, X86_INS_VPERMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMDYrr, X86_INS_VPERMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMDZrm, X86_INS_VPERMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMDZrr, X86_INS_VPERMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Drm, X86_INS_VPERMI2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Drmk, X86_INS_VPERMI2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Drmkz, X86_INS_VPERMI2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Drr, X86_INS_VPERMI2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Drrk, X86_INS_VPERMI2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Drrkz, X86_INS_VPERMI2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PDrm, X86_INS_VPERMI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PDrmk, X86_INS_VPERMI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PDrmkz, X86_INS_VPERMI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PDrr, X86_INS_VPERMI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PDrrk, X86_INS_VPERMI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PDrrkz, X86_INS_VPERMI2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PSrm, X86_INS_VPERMI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PSrmk, X86_INS_VPERMI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PSrmkz, X86_INS_VPERMI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PSrr, X86_INS_VPERMI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PSrrk, X86_INS_VPERMI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2PSrrkz, X86_INS_VPERMI2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Qrm, X86_INS_VPERMI2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Qrmk, X86_INS_VPERMI2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Qrmkz, X86_INS_VPERMI2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Qrr, X86_INS_VPERMI2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Qrrk, X86_INS_VPERMI2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMI2Qrrkz, X86_INS_VPERMI2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMIL2PDmr, X86_INS_VPERMIL2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PDmrY, X86_INS_VPERMIL2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PDrm, X86_INS_VPERMIL2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PDrmY, X86_INS_VPERMIL2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PDrr, X86_INS_VPERMIL2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PDrrY, X86_INS_VPERMIL2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PSmr, X86_INS_VPERMIL2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PSmrY, X86_INS_VPERMIL2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PSrm, X86_INS_VPERMIL2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PSrmY, X86_INS_VPERMIL2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PSrr, X86_INS_VPERMIL2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMIL2PSrrY, X86_INS_VPERMIL2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPERMILPDYmi, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDYri, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDYrm, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDYrr, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDZmi, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPDZri, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPDZrm, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPDZrr, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPDmi, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDri, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDrm, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPDrr, X86_INS_VPERMILPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSYmi, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSYri, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSYrm, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSYrr, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSZmi, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPSZri, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPSZrm, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPSZrr, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMILPSmi, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSri, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSrm, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMILPSrr, X86_INS_VPERMILPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPERMPDYmi, X86_INS_VPERMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMPDYri, X86_INS_VPERMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMPDZmi, X86_INS_VPERMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMPDZri, X86_INS_VPERMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMPDZrm, X86_INS_VPERMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMPDZrr, X86_INS_VPERMPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMPSYrm, X86_INS_VPERMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMPSYrr, X86_INS_VPERMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMPSZrm, X86_INS_VPERMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMPSZrr, X86_INS_VPERMPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMQYmi, X86_INS_VPERMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMQYri, X86_INS_VPERMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPERMQZmi, X86_INS_VPERMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMQZri, X86_INS_VPERMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMQZrm, X86_INS_VPERMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMQZrr, X86_INS_VPERMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Drm, X86_INS_VPERMT2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Drmk, X86_INS_VPERMT2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Drmkz, X86_INS_VPERMT2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Drr, X86_INS_VPERMT2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Drrk, X86_INS_VPERMT2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Drrkz, X86_INS_VPERMT2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PDrm, X86_INS_VPERMT2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PDrmk, X86_INS_VPERMT2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PDrmkz, X86_INS_VPERMT2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PDrr, X86_INS_VPERMT2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PDrrk, X86_INS_VPERMT2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PDrrkz, X86_INS_VPERMT2PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PSrm, X86_INS_VPERMT2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PSrmk, X86_INS_VPERMT2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PSrmkz, X86_INS_VPERMT2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PSrr, X86_INS_VPERMT2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PSrrk, X86_INS_VPERMT2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2PSrrkz, X86_INS_VPERMT2PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Qrm, X86_INS_VPERMT2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Qrmk, X86_INS_VPERMT2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Qrmkz, X86_INS_VPERMT2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Qrr, X86_INS_VPERMT2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Qrrk, X86_INS_VPERMT2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPERMT2Qrrkz, X86_INS_VPERMT2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ128rmk, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ128rmkz, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ128rrk, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ128rrkz, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ256rmk, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ256rmkz, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ256rrk, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZ256rrkz, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZrmk, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZrmkz, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZrrk, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDDZrrkz, X86_INS_VPEXPANDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ128rmk, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ128rmkz, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ128rrk, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ128rrkz, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ256rmk, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ256rmkz, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ256rrk, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZ256rrkz, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZrmk, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZrmkz, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZrrk, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXPANDQZrrkz, X86_INS_VPEXPANDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPEXTRBmr, X86_INS_VPEXTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRBrr, X86_INS_VPEXTRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRDmr, X86_INS_VPEXTRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRDrr, X86_INS_VPEXTRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRQmr, X86_INS_VPEXTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRQrr, X86_INS_VPEXTRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRWmr, X86_INS_VPEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRWri, X86_INS_VPEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPEXTRWrr_REV, X86_INS_VPEXTRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPGATHERDDYrm, X86_INS_VPGATHERDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERDDZrm, X86_INS_VPGATHERDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPGATHERDDrm, X86_INS_VPGATHERDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERDQYrm, X86_INS_VPGATHERDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERDQZrm, X86_INS_VPGATHERDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPGATHERDQrm, X86_INS_VPGATHERDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERQDYrm, X86_INS_VPGATHERQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERQDZrm, X86_INS_VPGATHERQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPGATHERQDrm, X86_INS_VPGATHERQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERQQYrm, X86_INS_VPGATHERQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPGATHERQQZrm, X86_INS_VPGATHERQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPGATHERQQrm, X86_INS_VPGATHERQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDBDrm, X86_INS_VPHADDBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDBDrr, X86_INS_VPHADDBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDBQrm, X86_INS_VPHADDBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDBQrr, X86_INS_VPHADDBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDBWrm, X86_INS_VPHADDBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDBWrr, X86_INS_VPHADDBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDDQrm, X86_INS_VPHADDDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDDQrr, X86_INS_VPHADDDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDDYrm, X86_INS_VPHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDDYrr, X86_INS_VPHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDDrm, X86_INS_VPHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHADDDrr, X86_INS_VPHADDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHADDSWrm128, X86_INS_VPHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHADDSWrm256, X86_INS_VPHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDSWrr128, X86_INS_VPHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHADDSWrr256, X86_INS_VPHADDSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDUBDrm, X86_INS_VPHADDUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUBDrr, X86_INS_VPHADDUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUBQrm, X86_INS_VPHADDUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUBQrr, X86_INS_VPHADDUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUBWrm, X86_INS_VPHADDUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUBWrr, X86_INS_VPHADDUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUDQrm, X86_INS_VPHADDUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUDQrr, X86_INS_VPHADDUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUWDrm, X86_INS_VPHADDUWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUWDrr, X86_INS_VPHADDUWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUWQrm, X86_INS_VPHADDUWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDUWQrr, X86_INS_VPHADDUWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDWDrm, X86_INS_VPHADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDWDrr, X86_INS_VPHADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDWQrm, X86_INS_VPHADDWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDWQrr, X86_INS_VPHADDWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHADDWYrm, X86_INS_VPHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDWYrr, X86_INS_VPHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHADDWrm, X86_INS_VPHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHADDWrr, X86_INS_VPHADDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHMINPOSUWrm128, X86_INS_VPHMINPOSUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHMINPOSUWrr128, X86_INS_VPHMINPOSUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHSUBBWrm, X86_INS_VPHSUBBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHSUBBWrr, X86_INS_VPHSUBBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHSUBDQrm, X86_INS_VPHSUBDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHSUBDQrr, X86_INS_VPHSUBDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHSUBDYrm, X86_INS_VPHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHSUBDYrr, X86_INS_VPHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHSUBDrm, X86_INS_VPHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHSUBDrr, X86_INS_VPHSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHSUBSWrm128, X86_INS_VPHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHSUBSWrm256, X86_INS_VPHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHSUBSWrr128, X86_INS_VPHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHSUBSWrr256, X86_INS_VPHSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHSUBWDrm, X86_INS_VPHSUBWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHSUBWDrr, X86_INS_VPHSUBWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPHSUBWYrm, X86_INS_VPHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHSUBWYrr, X86_INS_VPHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPHSUBWrm, X86_INS_VPHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPHSUBWrr, X86_INS_VPHSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRBrm, X86_INS_VPINSRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRBrr, X86_INS_VPINSRB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRDrm, X86_INS_VPINSRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRDrr, X86_INS_VPINSRD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRQrm, X86_INS_VPINSRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRQrr, X86_INS_VPINSRQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRWrmi, X86_INS_VPINSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPINSRWrri, X86_INS_VPINSRW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrm, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrmb, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrmbk, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrmbkz, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrmk, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrmkz, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrr, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrrk, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTDrrkz, X86_INS_VPLZCNTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrm, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrmb, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrmbk, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrmbkz, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrmk, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrmkz, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrr, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrrk, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPLZCNTQrrkz, X86_INS_VPLZCNTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPMACSDDrm, X86_INS_VPMACSDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSDDrr, X86_INS_VPMACSDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSDQHrm, X86_INS_VPMACSDQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSDQHrr, X86_INS_VPMACSDQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSDQLrm, X86_INS_VPMACSDQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSDQLrr, X86_INS_VPMACSDQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSDDrm, X86_INS_VPMACSSDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSDDrr, X86_INS_VPMACSSDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSDQHrm, X86_INS_VPMACSSDQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSDQHrr, X86_INS_VPMACSSDQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSDQLrm, X86_INS_VPMACSSDQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSDQLrr, X86_INS_VPMACSSDQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSWDrm, X86_INS_VPMACSSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSWDrr, X86_INS_VPMACSSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSWWrm, X86_INS_VPMACSSWW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSSWWrr, X86_INS_VPMACSSWW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSWDrm, X86_INS_VPMACSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSWDrr, X86_INS_VPMACSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSWWrm, X86_INS_VPMACSWW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMACSWWrr, X86_INS_VPMACSWW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMADCSSWDrm, X86_INS_VPMADCSSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMADCSSWDrr, X86_INS_VPMADCSSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMADCSWDrm, X86_INS_VPMADCSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMADCSWDrr, X86_INS_VPMADCSWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPMADDUBSWrm128, X86_INS_VPMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMADDUBSWrm256, X86_INS_VPMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMADDUBSWrr128, X86_INS_VPMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMADDUBSWrr256, X86_INS_VPMADDUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMADDWDYrm, X86_INS_VPMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMADDWDYrr, X86_INS_VPMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMADDWDrm, X86_INS_VPMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMADDWDrr, X86_INS_VPMADDWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMASKMOVDYmr, X86_INS_VPMASKMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVDYrm, X86_INS_VPMASKMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVDmr, X86_INS_VPMASKMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVDrm, X86_INS_VPMASKMOVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVQYmr, X86_INS_VPMASKMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVQYrm, X86_INS_VPMASKMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVQmr, X86_INS_VPMASKMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMASKMOVQrm, X86_INS_VPMASKMOVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMAXSBYrm, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBYrr, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ128rm, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ128rmk, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ128rmkz, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ128rr, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ128rrk, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ128rrkz, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ256rm, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ256rmk, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ256rmkz, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ256rr, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ256rrk, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZ256rrkz, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBZrm, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSBZrmk, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSBZrmkz, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSBZrr, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSBZrrk, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSBZrrkz, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSBrm, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSBrr, X86_INS_VPMAXSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDYrm, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDYrr, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rm, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rmb, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rmbk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rmbkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rmk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rmkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rr, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rrk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ128rrkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rm, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rmb, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rmbk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rmbkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rmk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rmkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rr, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rrk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZ256rrkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrm, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrmb, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrmbk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrmbkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrmk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrmkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrr, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrrk, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDZrrkz, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSDrm, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSDrr, X86_INS_VPMAXSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rm, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rmb, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rmbk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rmbkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rmk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rmkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rr, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rrk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ128rrkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rm, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rmb, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rmbk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rmbkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rmk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rmkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rr, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rrk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZ256rrkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrm, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrmb, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrmbk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrmbkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrmk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrmkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrr, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrrk, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSQZrrkz, X86_INS_VPMAXSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXSWYrm, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWYrr, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ128rm, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ128rmk, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ128rmkz, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ128rr, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ128rrk, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ128rrkz, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ256rm, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ256rmk, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ256rmkz, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ256rr, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ256rrk, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZ256rrkz, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWZrm, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSWZrmk, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSWZrmkz, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSWZrr, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSWZrrk, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSWZrrkz, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXSWrm, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXSWrr, X86_INS_VPMAXSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBYrm, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBYrr, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ128rm, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ128rmk, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ128rmkz, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ128rr, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ128rrk, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ128rrkz, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ256rm, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ256rmk, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ256rmkz, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ256rr, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ256rrk, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZ256rrkz, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBZrm, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUBZrmk, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUBZrmkz, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUBZrr, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUBZrrk, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUBZrrkz, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUBrm, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUBrr, X86_INS_VPMAXUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDYrm, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDYrr, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rm, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rmb, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rmbk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rmbkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rmk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rmkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rr, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rrk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ128rrkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rm, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rmb, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rmbk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rmbkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rmk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rmkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rr, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rrk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZ256rrkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrm, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrmb, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrmbk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrmbkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrmk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrmkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrr, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrrk, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDZrrkz, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUDrm, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUDrr, X86_INS_VPMAXUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rm, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rmb, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rmbk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rmbkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rmk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rmkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rr, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rrk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ128rrkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rm, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rmb, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rmbk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rmbkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rmk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rmkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rr, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rrk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZ256rrkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrm, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrmb, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrmbk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrmbkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrmk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrmkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrr, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrrk, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUQZrrkz, X86_INS_VPMAXUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMAXUWYrm, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWYrr, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ128rm, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ128rmk, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ128rmkz, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ128rr, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ128rrk, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ128rrkz, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ256rm, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ256rmk, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ256rmkz, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ256rr, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ256rrk, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZ256rrkz, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWZrm, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUWZrmk, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUWZrmkz, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUWZrr, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUWZrrk, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUWZrrkz, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMAXUWrm, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMAXUWrr, X86_INS_VPMAXUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSBYrm, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSBYrr, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ128rm, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ128rmk, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ128rmkz, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ128rr, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ128rrk, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ128rrkz, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ256rm, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ256rmk, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ256rmkz, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ256rr, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ256rrk, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZ256rrkz, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSBZrm, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSBZrmk, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSBZrmkz, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSBZrr, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSBZrrk, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSBZrrkz, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSBrm, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSBrr, X86_INS_VPMINSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSDYrm, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSDYrr, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rm, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rmb, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rmbk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rmbkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rmk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rmkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rr, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rrk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ128rrkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rm, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rmb, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rmbk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rmbkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rmk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rmkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rr, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rrk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZ256rrkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSDZrm, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrmb, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrmbk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrmbkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrmk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrmkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrr, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrrk, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDZrrkz, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSDrm, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSDrr, X86_INS_VPMINSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rm, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rmb, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rmbk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rmbkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rmk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rmkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rr, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rrk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ128rrkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rm, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rmb, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rmbk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rmbkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rmk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rmkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rr, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rrk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZ256rrkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSQZrm, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrmb, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrmbk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrmbkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrmk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrmkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrr, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrrk, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSQZrrkz, X86_INS_VPMINSQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINSWYrm, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSWYrr, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ128rm, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ128rmk, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ128rmkz, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ128rr, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ128rrk, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ128rrkz, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ256rm, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ256rmk, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ256rmkz, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ256rr, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ256rrk, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZ256rrkz, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINSWZrm, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSWZrmk, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSWZrmkz, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSWZrr, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSWZrrk, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSWZrrkz, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINSWrm, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINSWrr, X86_INS_VPMINSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUBYrm, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUBYrr, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ128rm, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ128rmk, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ128rmkz, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ128rr, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ128rrk, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ128rrkz, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ256rm, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ256rmk, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ256rmkz, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ256rr, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ256rrk, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZ256rrkz, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUBZrm, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUBZrmk, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUBZrmkz, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUBZrr, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUBZrrk, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUBZrrkz, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUBrm, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUBrr, X86_INS_VPMINUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUDYrm, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUDYrr, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rm, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rmb, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rmbk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rmbkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rmk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rmkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rr, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rrk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ128rrkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rm, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rmb, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rmbk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rmbkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rmk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rmkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rr, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rrk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZ256rrkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUDZrm, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrmb, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrmbk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrmbkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrmk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrmkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrr, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrrk, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDZrrkz, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUDrm, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUDrr, X86_INS_VPMINUD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rm, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rmb, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rmbk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rmbkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rmk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rmkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rr, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rrk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ128rrkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rm, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rmb, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rmbk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rmbkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rmk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rmkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rr, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rrk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZ256rrkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUQZrm, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrmb, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrmbk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrmbkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrmk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrmkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrr, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrrk, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUQZrrkz, X86_INS_VPMINUQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMINUWYrm, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUWYrr, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ128rm, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ128rmk, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ128rmkz, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ128rr, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ128rrk, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ128rrkz, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ256rm, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ256rmk, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ256rmkz, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ256rr, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ256rrk, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZ256rrkz, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMINUWZrm, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUWZrmk, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUWZrmkz, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUWZrr, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUWZrrk, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUWZrrkz, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMINUWrm, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMINUWrr, X86_INS_VPMINUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMOVDBmr, X86_INS_VPMOVDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDBmrk, X86_INS_VPMOVDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDBrr, X86_INS_VPMOVDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDBrrk, X86_INS_VPMOVDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDBrrkz, X86_INS_VPMOVDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDWmr, X86_INS_VPMOVDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDWmrk, X86_INS_VPMOVDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDWrr, X86_INS_VPMOVDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDWrrk, X86_INS_VPMOVDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVDWrrkz, X86_INS_VPMOVDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVM2BZ128rr, X86_INS_VPMOVM2B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2BZ256rr, X86_INS_VPMOVM2B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2BZrr, X86_INS_VPMOVM2B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMOVM2DZ128rr, X86_INS_VPMOVM2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2DZ256rr, X86_INS_VPMOVM2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2DZrr, X86_INS_VPMOVM2D, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMOVM2QZ128rr, X86_INS_VPMOVM2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2QZ256rr, X86_INS_VPMOVM2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2QZrr, X86_INS_VPMOVM2Q, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMOVM2WZ128rr, X86_INS_VPMOVM2W, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2WZ256rr, X86_INS_VPMOVM2W, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMOVM2WZrr, X86_INS_VPMOVM2W, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMOVMSKBYrr, X86_INS_VPMOVMSKB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVMSKBrr, X86_INS_VPMOVMSKB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVQBmr, X86_INS_VPMOVQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQBmrk, X86_INS_VPMOVQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQBrr, X86_INS_VPMOVQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQBrrk, X86_INS_VPMOVQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQBrrkz, X86_INS_VPMOVQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQDmr, X86_INS_VPMOVQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQDmrk, X86_INS_VPMOVQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQDrr, X86_INS_VPMOVQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQDrrk, X86_INS_VPMOVQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQDrrkz, X86_INS_VPMOVQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQWmr, X86_INS_VPMOVQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQWmrk, X86_INS_VPMOVQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQWrr, X86_INS_VPMOVQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQWrrk, X86_INS_VPMOVQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVQWrrkz, X86_INS_VPMOVQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDBmr, X86_INS_VPMOVSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDBmrk, X86_INS_VPMOVSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDBrr, X86_INS_VPMOVSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDBrrk, X86_INS_VPMOVSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDBrrkz, X86_INS_VPMOVSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDWmr, X86_INS_VPMOVSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDWmrk, X86_INS_VPMOVSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDWrr, X86_INS_VPMOVSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDWrrk, X86_INS_VPMOVSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSDWrrkz, X86_INS_VPMOVSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQBmr, X86_INS_VPMOVSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQBmrk, X86_INS_VPMOVSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQBrr, X86_INS_VPMOVSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQBrrk, X86_INS_VPMOVSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQBrrkz, X86_INS_VPMOVSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQDmr, X86_INS_VPMOVSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQDmrk, X86_INS_VPMOVSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQDrr, X86_INS_VPMOVSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQDrrk, X86_INS_VPMOVSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQDrrkz, X86_INS_VPMOVSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQWmr, X86_INS_VPMOVSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQWmrk, X86_INS_VPMOVSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQWrr, X86_INS_VPMOVSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQWrrk, X86_INS_VPMOVSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSQWrrkz, X86_INS_VPMOVSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDYrm, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDYrr, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDZrm, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDZrmk, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDZrmkz, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDZrr, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDZrrk, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDZrrkz, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDrm, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXBDrr, X86_INS_VPMOVSXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQYrm, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQYrr, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQZrm, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQZrmk, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQZrmkz, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQZrr, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQZrrk, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQZrrkz, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQrm, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXBQrr, X86_INS_VPMOVSXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXBWYrm, X86_INS_VPMOVSXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXBWYrr, X86_INS_VPMOVSXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXBWrm, X86_INS_VPMOVSXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXBWrr, X86_INS_VPMOVSXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQYrm, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQYrr, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQZrm, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQZrmk, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQZrmkz, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQZrr, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQZrrk, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQZrrkz, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQrm, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXDQrr, X86_INS_VPMOVSXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDYrm, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDYrr, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDZrm, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDZrmk, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDZrmkz, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDZrr, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDZrrk, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDZrrkz, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDrm, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXWDrr, X86_INS_VPMOVSXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQYrm, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQYrr, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQZrm, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQZrmk, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQZrmkz, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQZrr, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQZrrk, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQZrrkz, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQrm, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVSXWQrr, X86_INS_VPMOVSXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVUSDBmr, X86_INS_VPMOVUSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDBmrk, X86_INS_VPMOVUSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDBrr, X86_INS_VPMOVUSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDBrrk, X86_INS_VPMOVUSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDBrrkz, X86_INS_VPMOVUSDB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDWmr, X86_INS_VPMOVUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDWmrk, X86_INS_VPMOVUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDWrr, X86_INS_VPMOVUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDWrrk, X86_INS_VPMOVUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSDWrrkz, X86_INS_VPMOVUSDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQBmr, X86_INS_VPMOVUSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQBmrk, X86_INS_VPMOVUSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQBrr, X86_INS_VPMOVUSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQBrrk, X86_INS_VPMOVUSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQBrrkz, X86_INS_VPMOVUSQB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQDmr, X86_INS_VPMOVUSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQDmrk, X86_INS_VPMOVUSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQDrr, X86_INS_VPMOVUSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQDrrk, X86_INS_VPMOVUSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQDrrkz, X86_INS_VPMOVUSQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQWmr, X86_INS_VPMOVUSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQWmrk, X86_INS_VPMOVUSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQWrr, X86_INS_VPMOVUSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQWrrk, X86_INS_VPMOVUSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVUSQWrrkz, X86_INS_VPMOVUSQW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDYrm, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDYrr, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDZrm, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDZrmk, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDZrmkz, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDZrr, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDZrrk, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDZrrkz, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDrm, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXBDrr, X86_INS_VPMOVZXBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQYrm, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQYrr, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQZrm, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQZrmk, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQZrmkz, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQZrr, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQZrrk, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQZrrkz, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQrm, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXBQrr, X86_INS_VPMOVZXBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXBWYrm, X86_INS_VPMOVZXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXBWYrr, X86_INS_VPMOVZXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXBWrm, X86_INS_VPMOVZXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXBWrr, X86_INS_VPMOVZXBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQYrm, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQYrr, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQZrm, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQZrmk, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQZrmkz, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQZrr, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQZrrk, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQZrrkz, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQrm, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXDQrr, X86_INS_VPMOVZXDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDYrm, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDYrr, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDZrm, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDZrmk, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDZrmkz, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDZrr, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDZrrk, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDZrrkz, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDrm, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXWDrr, X86_INS_VPMOVZXWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQYrm, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQYrr, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQZrm, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQZrmk, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQZrmkz, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQZrr, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQZrrk, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQZrrkz, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQrm, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMOVZXWQrr, X86_INS_VPMOVZXWQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMULDQYrm, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULDQYrr, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULDQZrm, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrmb, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrmbk, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrmbkz, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrmk, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrmkz, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrr, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrrk, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQZrrkz, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULDQrm, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULDQrr, X86_INS_VPMULDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHRSWrm128, X86_INS_VPMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMULHRSWrm256, X86_INS_VPMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMULHRSWrr128, X86_INS_VPMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMULHRSWrr256, X86_INS_VPMULHRSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMULHUWYrm, X86_INS_VPMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHUWYrr, X86_INS_VPMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHUWrm, X86_INS_VPMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHUWrr, X86_INS_VPMULHUW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHWYrm, X86_INS_VPMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHWYrr, X86_INS_VPMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHWrm, X86_INS_VPMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULHWrr, X86_INS_VPMULHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULLDYrm, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMULLDYrr, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rm, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rmb, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rmbk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rmbkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rmk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rmkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rr, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rrk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ128rrkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rm, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rmb, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rmbk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rmbkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rmk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rmkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rr, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rrk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZ256rrkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLDZrm, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrmb, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrmbk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrmbkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrmk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrmkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrr, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrrk, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDZrrkz, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULLDrm, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULLDrr, X86_INS_VPMULLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rm, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rmb, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rmbk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rmbkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rmk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rmkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rr, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rrk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ128rrkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rm, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rmb, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rmbk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rmbkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rmk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rmkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rr, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rrk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZ256rrkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLQZrm, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrmb, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrmbk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrmbkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrmk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrmkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrr, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrrk, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLQZrrkz, X86_INS_VPMULLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0 #endif }, { X86_VPMULLWYrm, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULLWYrr, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ128rm, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ128rmk, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ128rmkz, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ128rr, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ128rrk, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ128rrkz, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ256rm, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ256rmk, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ256rmkz, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ256rr, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ256rrk, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZ256rrkz, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPMULLWZrm, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMULLWZrmk, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMULLWZrmkz, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMULLWZrr, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMULLWZrrk, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMULLWZrrkz, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPMULLWrm, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULLWrr, X86_INS_VPMULLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPMULUDQYrm, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMULUDQYrr, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrm, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrmb, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrmbk, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrmbkz, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrmk, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrmkz, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrr, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrrk, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQZrrkz, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPMULUDQrm, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPMULUDQrr, X86_INS_VPMULUDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rm, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rmb, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rmbk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rmbkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rmk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rmkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rr, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rrk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ128rrkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rm, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rmb, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rmbk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rmbkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rmk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rmkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rr, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rrk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZ256rrkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORDZrm, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrmb, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrmbk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrmbkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrmk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrmkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrr, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrrk, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORDZrrkz, X86_INS_VPORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZ128rm, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rmb, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rmbk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rmbkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rmk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rmkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rr, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rrk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ128rrkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rm, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rmb, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rmbk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rmbkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rmk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rmkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rr, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rrk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZ256rrkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPORQZrm, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrmb, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrmbk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrmbkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrmk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrmkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrr, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrrk, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORQZrrkz, X86_INS_VPORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPORYrm, X86_INS_VPOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPORYrr, X86_INS_VPOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPORrm, X86_INS_VPOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPORrr, X86_INS_VPOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPPERMmr, X86_INS_VPPERM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPPERMrm, X86_INS_VPPERM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPPERMrr, X86_INS_VPPERM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTBmi, X86_INS_VPROTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTBmr, X86_INS_VPROTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTBri, X86_INS_VPROTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTBrm, X86_INS_VPROTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTBrr, X86_INS_VPROTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTDmi, X86_INS_VPROTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTDmr, X86_INS_VPROTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTDri, X86_INS_VPROTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTDrm, X86_INS_VPROTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTDrr, X86_INS_VPROTD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTQmi, X86_INS_VPROTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTQmr, X86_INS_VPROTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTQri, X86_INS_VPROTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTQrm, X86_INS_VPROTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTQrr, X86_INS_VPROTQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTWmi, X86_INS_VPROTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTWmr, X86_INS_VPROTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTWri, X86_INS_VPROTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTWrm, X86_INS_VPROTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPROTWrr, X86_INS_VPROTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSADBWYrm, X86_INS_VPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSADBWYrr, X86_INS_VPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSADBWrm, X86_INS_VPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSADBWrr, X86_INS_VPSADBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSCATTERDDZmr, X86_INS_VPSCATTERDD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSCATTERDQZmr, X86_INS_VPSCATTERDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSCATTERQDZmr, X86_INS_VPSCATTERQD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSCATTERQQZmr, X86_INS_VPSCATTERQQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSHABmr, X86_INS_VPSHAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHABrm, X86_INS_VPSHAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHABrr, X86_INS_VPSHAB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHADmr, X86_INS_VPSHAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHADrm, X86_INS_VPSHAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHADrr, X86_INS_VPSHAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHAQmr, X86_INS_VPSHAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHAQrm, X86_INS_VPSHAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHAQrr, X86_INS_VPSHAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHAWmr, X86_INS_VPSHAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHAWrm, X86_INS_VPSHAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHAWrr, X86_INS_VPSHAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLBmr, X86_INS_VPSHLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLBrm, X86_INS_VPSHLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLBrr, X86_INS_VPSHLB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLDmr, X86_INS_VPSHLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLDrm, X86_INS_VPSHLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLDrr, X86_INS_VPSHLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLQmr, X86_INS_VPSHLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLQrm, X86_INS_VPSHLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLQrr, X86_INS_VPSHLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLWmr, X86_INS_VPSHLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLWrm, X86_INS_VPSHLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHLWrr, X86_INS_VPSHLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0 #endif }, { X86_VPSHUFBYrm, X86_INS_VPSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFBYrr, X86_INS_VPSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFBrm, X86_INS_VPSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFBrr, X86_INS_VPSHUFB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFDYmi, X86_INS_VPSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFDYri, X86_INS_VPSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFDZmi, X86_INS_VPSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSHUFDZri, X86_INS_VPSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSHUFDmi, X86_INS_VPSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFDri, X86_INS_VPSHUFD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFHWYmi, X86_INS_VPSHUFHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFHWYri, X86_INS_VPSHUFHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFHWmi, X86_INS_VPSHUFHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFHWri, X86_INS_VPSHUFHW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFLWYmi, X86_INS_VPSHUFLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFLWYri, X86_INS_VPSHUFLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSHUFLWmi, X86_INS_VPSHUFLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSHUFLWri, X86_INS_VPSHUFLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSIGNBYrm, X86_INS_VPSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSIGNBYrr, X86_INS_VPSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSIGNBrm, X86_INS_VPSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSIGNBrr, X86_INS_VPSIGNB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSIGNDYrm, X86_INS_VPSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSIGNDYrr, X86_INS_VPSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSIGNDrm, X86_INS_VPSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSIGNDrr, X86_INS_VPSIGND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSIGNWYrm, X86_INS_VPSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSIGNWYrr, X86_INS_VPSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSIGNWrm, X86_INS_VPSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSIGNWrr, X86_INS_VPSIGNW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLDQYri, X86_INS_VPSLLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLDQri, X86_INS_VPSLLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLDYri, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLDYrm, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLDYrr, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLDZmi, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZmik, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZmikz, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZri, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrik, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrikz, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrm, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrmk, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrmkz, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrr, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrrk, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDZrrkz, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLDri, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLDrm, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLDrr, X86_INS_VPSLLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLQYri, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLQYrm, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLQYrr, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLQZmi, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZmik, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZmikz, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZri, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrik, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrikz, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrm, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrmk, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrmkz, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrr, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrrk, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQZrrkz, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLQri, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLQrm, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLQrr, X86_INS_VPSLLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLVDYrm, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVDYrr, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVDZrm, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVDZrmk, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVDZrmkz, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVDZrr, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVDZrrk, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVDZrrkz, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVDrm, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVDrr, X86_INS_VPSLLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVQYrm, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVQYrr, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVQZrm, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVQZrmk, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVQZrmkz, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVQZrr, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVQZrrk, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVQZrrkz, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSLLVQrm, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLVQrr, X86_INS_VPSLLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLWYri, X86_INS_VPSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLWYrm, X86_INS_VPSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLWYrr, X86_INS_VPSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSLLWri, X86_INS_VPSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLWrm, X86_INS_VPSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSLLWrr, X86_INS_VPSLLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRADYri, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRADYrm, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRADYrr, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRADZmi, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZmik, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZmikz, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZri, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrik, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrikz, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrm, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrmk, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrmkz, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrr, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrrk, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADZrrkz, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRADri, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRADrm, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRADrr, X86_INS_VPSRAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRAQZmi, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZmik, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZmikz, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZri, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrik, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrikz, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrm, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrmk, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrmkz, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrr, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrrk, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAQZrrkz, X86_INS_VPSRAQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDYrm, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAVDYrr, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAVDZrm, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDZrmk, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDZrmkz, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDZrr, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDZrrk, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDZrrkz, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVDrm, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAVDrr, X86_INS_VPSRAVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAVQZrm, X86_INS_VPSRAVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVQZrmk, X86_INS_VPSRAVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVQZrmkz, X86_INS_VPSRAVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVQZrr, X86_INS_VPSRAVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVQZrrk, X86_INS_VPSRAVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAVQZrrkz, X86_INS_VPSRAVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRAWYri, X86_INS_VPSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAWYrm, X86_INS_VPSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAWYrr, X86_INS_VPSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRAWri, X86_INS_VPSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRAWrm, X86_INS_VPSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRAWrr, X86_INS_VPSRAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLDQYri, X86_INS_VPSRLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLDQri, X86_INS_VPSRLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLDYri, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLDYrm, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLDYrr, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLDZmi, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZmik, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZmikz, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZri, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrik, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrikz, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrm, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrmk, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrmkz, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrr, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrrk, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDZrrkz, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLDri, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLDrm, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLDrr, X86_INS_VPSRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLQYri, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLQYrm, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLQYrr, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLQZmi, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZmik, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZmikz, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZri, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrik, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrikz, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrm, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrmk, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrmkz, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrr, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrrk, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQZrrkz, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLQri, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLQrm, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLQrr, X86_INS_VPSRLQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLVDYrm, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVDYrr, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVDZrm, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVDZrmk, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVDZrmkz, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVDZrr, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVDZrrk, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVDZrrkz, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVDrm, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVDrr, X86_INS_VPSRLVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVQYrm, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVQYrr, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVQZrm, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVQZrmk, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVQZrmkz, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVQZrr, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVQZrrk, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVQZrrkz, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSRLVQrm, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLVQrr, X86_INS_VPSRLVQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLWYri, X86_INS_VPSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLWYrm, X86_INS_VPSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLWYrr, X86_INS_VPSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSRLWri, X86_INS_VPSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLWrm, X86_INS_VPSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSRLWrr, X86_INS_VPSRLW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSUBBYrm, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBBYrr, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ128rm, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ128rmk, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ128rmkz, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ128rr, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ128rrk, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ128rrkz, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ256rm, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ256rmk, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ256rmkz, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ256rr, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ256rrk, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZ256rrkz, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBBZrm, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBBZrmk, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBBZrmkz, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBBZrr, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBBZrrk, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBBZrrkz, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBBrm, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBBrr, X86_INS_VPSUBB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBDYrm, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBDYrr, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rm, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rmb, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rmbk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rmbkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rmk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rmkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rr, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rrk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ128rrkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rm, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rmb, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rmbk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rmbkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rmk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rmkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rr, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rrk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZ256rrkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBDZrm, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrmb, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrmbk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrmbkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrmk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrmkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrr, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrrk, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDZrrkz, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBDrm, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBDrr, X86_INS_VPSUBD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBQYrm, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBQYrr, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rm, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rmb, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rmbk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rmbkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rmk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rmkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rr, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rrk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ128rrkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rm, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rmb, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rmbk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rmbkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rmk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rmkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rr, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rrk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZ256rrkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBQZrm, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrmb, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrmbk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrmbkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrmk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrmkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrr, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrrk, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQZrrkz, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPSUBQrm, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBQrr, X86_INS_VPSUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBSBYrm, X86_INS_VPSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSUBSBYrr, X86_INS_VPSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSUBSBrm, X86_INS_VPSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSUBSBrr, X86_INS_VPSUBSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSUBSWYrm, X86_INS_VPSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSUBSWYrr, X86_INS_VPSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPSUBSWrm, X86_INS_VPSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSUBSWrr, X86_INS_VPSUBSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPSUBUSBYrm, X86_INS_VPSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSBYrr, X86_INS_VPSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSBrm, X86_INS_VPSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSBrr, X86_INS_VPSUBUSB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSWYrm, X86_INS_VPSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSWYrr, X86_INS_VPSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSWrm, X86_INS_VPSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBUSWrr, X86_INS_VPSUBUSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBWYrm, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBWYrr, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ128rm, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ128rmk, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ128rmkz, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ128rr, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ128rrk, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ128rrkz, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ256rm, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ256rmk, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ256rmkz, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ256rr, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ256rrk, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZ256rrkz, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPSUBWZrm, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBWZrmk, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBWZrmkz, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBWZrr, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBWZrrk, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBWZrrkz, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0 #endif }, { X86_VPSUBWrm, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPSUBWrr, X86_INS_VPSUBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPTESTMDZrm, X86_INS_VPTESTMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPTESTMDZrr, X86_INS_VPTESTMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPTESTMQZrm, X86_INS_VPTESTMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPTESTMQZrr, X86_INS_VPTESTMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPTESTNMDZrm, X86_INS_VPTESTNMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPTESTNMDZrr, X86_INS_VPTESTNMD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPTESTNMQZrm, X86_INS_VPTESTNMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPTESTNMQZrr, X86_INS_VPTESTNMQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0 #endif }, { X86_VPTESTYrm, X86_INS_VPTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPTESTYrr, X86_INS_VPTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPTESTrm, X86_INS_VPTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPTESTrr, X86_INS_VPTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHBWYrm, X86_INS_VPUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHBWYrr, X86_INS_VPUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHBWrm, X86_INS_VPUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHBWrr, X86_INS_VPUNPCKHBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHDQYrm, X86_INS_VPUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHDQYrr, X86_INS_VPUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHDQZrm, X86_INS_VPUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKHDQZrr, X86_INS_VPUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKHDQrm, X86_INS_VPUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHDQrr, X86_INS_VPUNPCKHDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHQDQYrm, X86_INS_VPUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHQDQYrr, X86_INS_VPUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHQDQZrm, X86_INS_VPUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKHQDQZrr, X86_INS_VPUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKHQDQrm, X86_INS_VPUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHQDQrr, X86_INS_VPUNPCKHQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHWDYrm, X86_INS_VPUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHWDYrr, X86_INS_VPUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKHWDrm, X86_INS_VPUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKHWDrr, X86_INS_VPUNPCKHWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLBWYrm, X86_INS_VPUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLBWYrr, X86_INS_VPUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLBWrm, X86_INS_VPUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLBWrr, X86_INS_VPUNPCKLBW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLDQYrm, X86_INS_VPUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLDQYrr, X86_INS_VPUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLDQZrm, X86_INS_VPUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKLDQZrr, X86_INS_VPUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKLDQrm, X86_INS_VPUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLDQrr, X86_INS_VPUNPCKLDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLQDQYrm, X86_INS_VPUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLQDQYrr, X86_INS_VPUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLQDQZrm, X86_INS_VPUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKLQDQZrr, X86_INS_VPUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPUNPCKLQDQrm, X86_INS_VPUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLQDQrr, X86_INS_VPUNPCKLQDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLWDYrm, X86_INS_VPUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLWDYrr, X86_INS_VPUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0 #endif }, { X86_VPUNPCKLWDrm, X86_INS_VPUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPUNPCKLWDrr, X86_INS_VPUNPCKLWD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rm, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rmb, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rmbk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rmbkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rmk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rmkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rr, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rrk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ128rrkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rm, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rmb, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rmbk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rmbkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rmk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rmkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rr, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rrk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZ256rrkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORDZrm, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrmb, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrmbk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrmbkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrmk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrmkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrr, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrrk, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORDZrrkz, X86_INS_VPXORD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rm, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rmb, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rmbk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rmbkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rmk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rmkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rr, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rrk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ128rrkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rm, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rmb, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rmbk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rmbkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rmk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rmkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rr, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rrk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZ256rrkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VPXORQZrm, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrmb, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrmbk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrmbkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrmk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrmkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrr, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrrk, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORQZrrkz, X86_INS_VPXORQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VPXORYrm, X86_INS_VPXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPXORYrr, X86_INS_VPXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPXORrm, X86_INS_VPXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VPXORrr, X86_INS_VPXOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128m, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128mb, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128mbk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128mbkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128mk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128mkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128r, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128rk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ128rkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256m, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256mb, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256mbk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256mbkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256mk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256mkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256r, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256rk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZ256rkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PDZm, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZmb, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZmbk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZmbkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZmk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZmkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZr, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZrk, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PDZrkz, X86_INS_VRCP14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128m, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128mb, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128mbk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128mbkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128mk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128mkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128r, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128rk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ128rkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256m, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256mb, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256mbk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256mbkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256mk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256mkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256r, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256rk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZ256rkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRCP14PSZm, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZmb, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZmbk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZmbkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZmk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZmkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZr, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZrk, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14PSZrkz, X86_INS_VRCP14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14SDrm, X86_INS_VRCP14SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14SDrr, X86_INS_VRCP14SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14SSrm, X86_INS_VRCP14SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP14SSrr, X86_INS_VRCP14SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRCP28PDm, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDmb, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDmbk, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDmbkz, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDmk, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDmkz, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDr, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDrb, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDrbk, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDrbkz, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDrk, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PDrkz, X86_INS_VRCP28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSm, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSmb, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSmbk, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSmbkz, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSmk, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSmkz, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSr, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSrb, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSrbk, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSrbkz, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSrk, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28PSrkz, X86_INS_VRCP28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDm, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDmk, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDmkz, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDr, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDrb, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDrbk, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDrbkz, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDrk, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SDrkz, X86_INS_VRCP28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSm, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSmk, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSmkz, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSr, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSrb, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSrbk, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSrbkz, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSrk, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCP28SSrkz, X86_INS_VRCP28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRCPPSYm, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSYm_Int, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSYr, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSYr_Int, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSm, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSm_Int, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSr, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPPSr_Int, X86_INS_VRCPPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRCPSSm, X86_INS_VRCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VRCPSSm_Int, X86_INS_VRCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VRCPSSr, X86_INS_VRCPSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VRNDSCALEPDZm, X86_INS_VRNDSCALEPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALEPDZr, X86_INS_VRNDSCALEPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALEPSZm, X86_INS_VRNDSCALEPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALEPSZr, X86_INS_VRNDSCALEPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDm, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDmk, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDmkz, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDr, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDrb, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDrbk, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDrbkz, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDrk, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESDrkz, X86_INS_VRNDSCALESD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSm, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSmk, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSmkz, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSr, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSrb, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSrbk, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSrbkz, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSrk, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRNDSCALESSrkz, X86_INS_VRNDSCALESS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VROUNDPDm, X86_INS_VROUNDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDPDr, X86_INS_VROUNDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDPSm, X86_INS_VROUNDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDPSr, X86_INS_VROUNDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDSDm, X86_INS_VROUNDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDSDr, X86_INS_VROUNDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDSDr_Int, X86_INS_VROUNDSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDSSm, X86_INS_VROUNDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDSSr, X86_INS_VROUNDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDSSr_Int, X86_INS_VROUNDSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDYPDm, X86_INS_VROUNDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDYPDr, X86_INS_VROUNDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDYPSm, X86_INS_VROUNDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VROUNDYPSr, X86_INS_VROUNDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128m, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128mb, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128mbk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128mbkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128mk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128mkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128r, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128rk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ128rkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256m, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256mb, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256mbk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256mbkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256mk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256mkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256r, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256rk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZ256rkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZm, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZmb, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZmbk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZmbkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZmk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZmkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZr, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZrk, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PDZrkz, X86_INS_VRSQRT14PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128m, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128mb, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128mbk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128mbkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128mk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128mkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128r, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128rk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ128rkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256m, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256mb, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256mbk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256mbkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256mk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256mkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256r, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256rk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZ256rkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZm, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZmb, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZmbk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZmbkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZmk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZmkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZr, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZrk, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14PSZrkz, X86_INS_VRSQRT14PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14SDrm, X86_INS_VRSQRT14SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14SDrr, X86_INS_VRSQRT14SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14SSrm, X86_INS_VRSQRT14SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT14SSrr, X86_INS_VRSQRT14SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDm, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDmb, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDmbk, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDmbkz, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDmk, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDmkz, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDr, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDrb, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDrbk, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDrbkz, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDrk, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PDrkz, X86_INS_VRSQRT28PD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSm, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSmb, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSmbk, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSmbkz, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSmk, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSmkz, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSr, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSrb, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSrbk, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSrbkz, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSrk, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28PSrkz, X86_INS_VRSQRT28PS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDm, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDmk, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDmkz, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDr, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDrb, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDrbk, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDrbkz, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDrk, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SDrkz, X86_INS_VRSQRT28SD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSm, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSmk, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSmkz, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSr, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSrb, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSrbk, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSrbkz, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSrk, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRT28SSrkz, X86_INS_VRSQRT28SS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0 #endif }, { X86_VRSQRTPSYm, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSYm_Int, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSYr, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSYr_Int, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSm, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSm_Int, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSr, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTPSr_Int, X86_INS_VRSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VRSQRTSSm, X86_INS_VRSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VRSQRTSSm_Int, X86_INS_VRSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VRSQRTSSr, X86_INS_VRSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSCATTERDPDZmr, X86_INS_VSCATTERDPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSCATTERDPSZmr, X86_INS_VSCATTERDPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSCATTERPF0DPDm, X86_INS_VSCATTERPF0DPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF0DPSm, X86_INS_VSCATTERPF0DPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF0QPDm, X86_INS_VSCATTERPF0QPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF0QPSm, X86_INS_VSCATTERPF0QPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF1DPDm, X86_INS_VSCATTERPF1DPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF1DPSm, X86_INS_VSCATTERPF1DPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF1QPDm, X86_INS_VSCATTERPF1QPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERPF1QPSm, X86_INS_VSCATTERPF1QPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0 #endif }, { X86_VSCATTERQPDZmr, X86_INS_VSCATTERQPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSCATTERQPSZmr, X86_INS_VSCATTERQPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSHUFPDYrmi, X86_INS_VSHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPDYrri, X86_INS_VSHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPDZrmi, X86_INS_VSHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSHUFPDZrri, X86_INS_VSHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSHUFPDrmi, X86_INS_VSHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPDrri, X86_INS_VSHUFPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPSYrmi, X86_INS_VSHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPSYrri, X86_INS_VSHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPSZrmi, X86_INS_VSHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSHUFPSZrri, X86_INS_VSHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSHUFPSrmi, X86_INS_VSHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSHUFPSrri, X86_INS_VSHUFPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPDYm, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPDYr, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128m, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128mb, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128mbk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128mbkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128mk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128mkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128r, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128rk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ128rkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256m, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256mb, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256mbk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256mbkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256mk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256mkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256r, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256rk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZ256rkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPDZm, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZmb, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZmbk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZmbkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZmk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZmkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZr, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZrk, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDZrkz, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPDm, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPDr, X86_INS_VSQRTPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPSYm, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPSYr, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128m, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128mb, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128mbk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128mbkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128mk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128mkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128r, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128rk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ128rkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256m, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256mb, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256mbk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256mbkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256mk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256mkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256r, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256rk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZ256rkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSQRTPSZm, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZmb, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZmbk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZmbkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZmk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZmkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZr, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZrk, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSZrkz, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTPSm, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTPSr, X86_INS_VSQRTPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSQRTSDZm, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSDZm_Int, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSDZr, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSDZr_Int, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSDm, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSQRTSDm_Int, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSQRTSDr, X86_INS_VSQRTSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSQRTSSZm, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSSZm_Int, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSSZr, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSSZr_Int, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSQRTSSm, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSQRTSSm_Int, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSQRTSSr, X86_INS_VSQRTSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VSTMXCSR, X86_INS_VSTMXCSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBPDYrm, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPDYrr, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rm, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rmb, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rmbk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rmbkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rmk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rmkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rr, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rrk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ128rrkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rm, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rmb, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rmbk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rmbkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rmk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rmkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rr, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rrk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZ256rrkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPDZrb, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrbk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrbkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrm, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrmb, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrmbk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrmbkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrmk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrmkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrr, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrrk, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDZrrkz, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPDrm, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPDrr, X86_INS_VSUBPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPSYrm, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPSYrr, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rm, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rmb, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rmbk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rmbkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rmk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rmkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rr, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rrk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ128rrkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rm, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rmb, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rmbk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rmbkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rmk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rmkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rr, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rrk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZ256rrkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0 #endif }, { X86_VSUBPSZrb, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrbk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrbkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrm, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrmb, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrmbk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrmbkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrmk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrmkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrr, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrrk, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSZrrkz, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBPSrm, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBPSrr, X86_INS_VSUBPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VSUBSDZrm, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrm_Int, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrm_Intk, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrm_Intkz, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrr, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrr_Int, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrr_Intk, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrr_Intkz, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrrb, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrrbk, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDZrrbkz, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSDrm, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSDrm_Int, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSDrr, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSDrr_Int, X86_INS_VSUBSD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSSZrm, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrm_Int, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrm_Intk, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrm_Intkz, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrr, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrr_Int, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrr_Intk, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrr_Intkz, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrrb, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrrbk, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSZrrbkz, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VSUBSSrm, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSSrm_Int, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSSrr, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VSUBSSrr_Int, X86_INS_VSUBSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPDYrm, X86_INS_VTESTPD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPDYrr, X86_INS_VTESTPD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPDrm, X86_INS_VTESTPD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPDrr, X86_INS_VTESTPD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPSYrm, X86_INS_VTESTPS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPSYrr, X86_INS_VTESTPS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPSrm, X86_INS_VTESTPS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VTESTPSrr, X86_INS_VTESTPS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUCOMISDZrm, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUCOMISDZrr, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUCOMISDrm, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUCOMISDrr, X86_INS_VUCOMISD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUCOMISSZrm, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUCOMISSZrr, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUCOMISSrm, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUCOMISSrr, X86_INS_VUCOMISS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPDYrm, X86_INS_VUNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPDYrr, X86_INS_VUNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPDZrm, X86_INS_VUNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKHPDZrr, X86_INS_VUNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKHPDrm, X86_INS_VUNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPDrr, X86_INS_VUNPCKHPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPSYrm, X86_INS_VUNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPSYrr, X86_INS_VUNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPSZrm, X86_INS_VUNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKHPSZrr, X86_INS_VUNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKHPSrm, X86_INS_VUNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKHPSrr, X86_INS_VUNPCKHPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPDYrm, X86_INS_VUNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPDYrr, X86_INS_VUNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPDZrm, X86_INS_VUNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKLPDZrr, X86_INS_VUNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKLPDrm, X86_INS_VUNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPDrr, X86_INS_VUNPCKLPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPSYrm, X86_INS_VUNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPSYrr, X86_INS_VUNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPSZrm, X86_INS_VUNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKLPSZrr, X86_INS_VUNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 #endif }, { X86_VUNPCKLPSrm, X86_INS_VUNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VUNPCKLPSrr, X86_INS_VUNPCKLPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VXORPDYrm, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPDYrr, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPDrm, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPDrr, X86_INS_VXORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPSYrm, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPSYrr, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPSrm, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VXORPSrr, X86_INS_VXORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0 #endif }, { X86_VZEROALL, X86_INS_VZEROALL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_VZEROUPPER, X86_INS_VZEROUPPER, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, 0 }, { X86_GRP_AVX, 0 }, 0, 0 #endif }, { X86_WAIT, X86_INS_WAIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_WBINVD, X86_INS_WBINVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_WRFSBASE, X86_INS_WRFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRFSBASE64, X86_INS_WRFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRGSBASE, X86_INS_WRGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRGSBASE64, X86_INS_WRGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRMSR, X86_INS_WRMSR, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_XABORT, X86_INS_XABORT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RTM, 0 }, 0, 0 #endif }, { X86_XACQUIRE_PREFIX, X86_INS_XACQUIRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_HLE, 0 }, 0, 0 #endif }, { X86_XADD16rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD16rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD32rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD32rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD64rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD64rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD8rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD8rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XBEGIN_2, X86_INS_XBEGIN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EAX, 0 }, { X86_GRP_BRANCH_RELATIVE, X86_GRP_RTM, 0 }, 1, 0 #endif }, { X86_XBEGIN_4, X86_INS_XBEGIN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EAX, 0 }, { X86_GRP_BRANCH_RELATIVE, X86_GRP_RTM, 0 }, 1, 0 #endif }, { X86_XCHG16ar, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG16rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG16rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG32ar, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_XCHG32ar64, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XCHG32rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG32rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG64ar, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG64rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG64rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG8rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG8rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCH_F, X86_INS_FXCH, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_FPU, 0 }, 0, 0 #endif }, { X86_XCRYPTCBC, X86_INS_XCRYPTCBC, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTCFB, X86_INS_XCRYPTCFB, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTCTR, X86_INS_XCRYPTCTR, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTECB, X86_INS_XCRYPTECB, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTOFB, X86_INS_XCRYPTOFB, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XEND, X86_INS_XEND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RTM, 0 }, 0, 0 #endif }, { X86_XGETBV, X86_INS_XGETBV, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { X86_REG_EDX, X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_XLAT, X86_INS_XLATB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16i16, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32i32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64i32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64mi32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64ri32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8i8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_XOR8mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_XOR8rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XORPDrm, X86_INS_XORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_XORPDrr, X86_INS_XORPD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0 #endif }, { X86_XORPSrm, X86_INS_XORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_XORPSrr, X86_INS_XORPS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0 #endif }, { X86_XRELEASE_PREFIX, X86_INS_XRELEASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_HLE, 0 }, 0, 0 #endif }, { X86_XRSTOR, X86_INS_XRSTOR, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XRSTOR64, X86_INS_XRSTOR64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XRSTORS, X86_INS_XRSTORS, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_XRSTORS64, X86_INS_XRSTORS64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVE, X86_INS_XSAVE, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVE64, X86_INS_XSAVE64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVEC, X86_INS_XSAVEC, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVEC64, X86_INS_XSAVEC64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVEOPT, X86_INS_XSAVEOPT, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVEOPT64, X86_INS_XSAVEOPT64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVES, X86_INS_XSAVES, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVES64, X86_INS_XSAVES64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSETBV, X86_INS_XSETBV, #ifndef CAPSTONE_DIET { X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_XSHA1, X86_INS_XSHA1, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XSHA256, X86_INS_XSHA256, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XSTORE, X86_INS_XSTORE, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XTEST, X86_INS_XTEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_fdisi8087_nop, X86_INS_FDISI8087_NOP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0 #endif }, { X86_feni8087_nop, X86_INS_FENI8087_NOP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0 #endif }, { X86_UD0, X86_INS_UD0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_ENDBR32, X86_INS_ENDBR32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_ENDBR64, X86_INS_ENDBR64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/X86/X86MappingInsnOp.inc010066400017500001750000046167711363403403300213320ustar0000000000000000// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) // By Nguyen Anh Quynh { /* X86_AAA, X86_INS_AAA: aaa */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_AAD8i8, X86_INS_AAD: aad $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_IGNORE, 0 } }, { /* X86_AAM8i8, X86_INS_AAM: aam $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_IGNORE, 0 } }, { /* X86_AAS, X86_INS_AAS: aas */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_ABS_F, X86_INS_FABS: fabs */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_ADC16i16, X86_INS_ADC: adc{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16mi, X86_INS_ADC: adc{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16mi8, X86_INS_ADC: adc{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16mr, X86_INS_ADC: adc{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC16ri, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16ri8, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16rm, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC16rr, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC16rr_REV, X86_INS_ADC: adc{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32i32, X86_INS_ADC: adc{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32mi, X86_INS_ADC: adc{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32mi8, X86_INS_ADC: adc{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32mr, X86_INS_ADC: adc{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32ri, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32ri8, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32rm, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32rr, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32rr_REV, X86_INS_ADC: adc{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64i32, X86_INS_ADC: adc{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64mi32, X86_INS_ADC: adc{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64mi8, X86_INS_ADC: adc{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64mr, X86_INS_ADC: adc{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64ri32, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64ri8, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64rm, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64rr, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64rr_REV, X86_INS_ADC: adc{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8i8, X86_INS_ADC: adc{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8mi, X86_INS_ADC: adc{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8mi8, X86_INS_ADC: adc{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8mr, X86_INS_ADC: adc{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8ri, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8ri8, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8rm, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8rr, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8rr_REV, X86_INS_ADC: adc{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX32rm, X86_INS_ADCX: adcx{l} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX32rr, X86_INS_ADCX: adcx{l} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX64rm, X86_INS_ADCX: adcx{q} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX64rr, X86_INS_ADCX: adcx{q} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16i16, X86_INS_ADD: add{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16mi, X86_INS_ADD: add{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16mi8, X86_INS_ADD: add{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16mr, X86_INS_ADD: add{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16ri, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16ri8, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16rm, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16rr, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16rr_REV, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32i32, X86_INS_ADD: add{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32mi, X86_INS_ADD: add{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32mi8, X86_INS_ADD: add{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32mr, X86_INS_ADD: add{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32ri, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32ri8, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32rm, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32rr, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32rr_REV, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64i32, X86_INS_ADD: add{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64mi32, X86_INS_ADD: add{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64mi8, X86_INS_ADD: add{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64mr, X86_INS_ADD: add{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64ri32, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64ri8, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64rm, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64rr, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64rr_REV, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8i8, X86_INS_ADD: add{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8mi, X86_INS_ADD: add{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8mi8, X86_INS_ADD: add{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8mr, X86_INS_ADD: add{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8ri, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8ri8, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8rm, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8rr, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8rr_REV, X86_INS_ADD: add{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDPDrm, X86_INS_ADDPD: addpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDPDrr, X86_INS_ADDPD: addpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDPSrm, X86_INS_ADDPS: addps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDPSrr, X86_INS_ADDPS: addps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSDrm, X86_INS_ADDSD: addsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSDrm_Int, X86_INS_ADDSD: addsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADDSDrr, X86_INS_ADDSD: addsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSDrr_Int, X86_INS_ADDSD: addsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSSrm, X86_INS_ADDSS: addss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSSrm_Int, X86_INS_ADDSS: addss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADDSSrr, X86_INS_ADDSS: addss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSSrr_Int, X86_INS_ADDSS: addss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSUBPDrm, X86_INS_ADDSUBPD: addsubpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSUBPDrr, X86_INS_ADDSUBPD: addsubpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSUBPSrm, X86_INS_ADDSUBPS: addsubps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADDSUBPSrr, X86_INS_ADDSUBPS: addsubps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD_F32m, X86_INS_FADD: fadd{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ADD_F64m, X86_INS_FADD: fadd{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ADD_FI16m, X86_INS_FIADD: fiadd{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ADD_FI32m, X86_INS_FIADD: fiadd{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ADD_FPrST0, X86_INS_FADDP: faddp $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ADD_FST0r, X86_INS_FADD: fadd $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ADD_FrST0, X86_INS_FADD: fadd $op, st(0) */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ADOX32rm, X86_INS_ADOX: adox{l} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX32rr, X86_INS_ADOX: adox{l} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX64rm, X86_INS_ADOX: adox{q} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX64rr, X86_INS_ADOX: adox{q} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESDECLASTrm, X86_INS_AESDECLAST: aesdeclast $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESDECLASTrr, X86_INS_AESDECLAST: aesdeclast $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESDECrm, X86_INS_AESDEC: aesdec $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESDECrr, X86_INS_AESDEC: aesdec $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESENCLASTrm, X86_INS_AESENCLAST: aesenclast $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESENCLASTrr, X86_INS_AESENCLAST: aesenclast $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESENCrm, X86_INS_AESENC: aesenc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESENCrr, X86_INS_AESENC: aesenc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESIMCrm, X86_INS_AESIMC: aesimc $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESIMCrr, X86_INS_AESIMC: aesimc $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AESKEYGENASSIST128rm, X86_INS_AESKEYGENASSIST: aeskeygenassist $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_AESKEYGENASSIST128rr, X86_INS_AESKEYGENASSIST: aeskeygenassist $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_AND16i16, X86_INS_AND: and{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16mi, X86_INS_AND: and{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16mi8, X86_INS_AND: and{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16mr, X86_INS_AND: and{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16ri, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16ri8, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16rm, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16rr, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16rr_REV, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32i32, X86_INS_AND: and{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32mi, X86_INS_AND: and{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32mi8, X86_INS_AND: and{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32mr, X86_INS_AND: and{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32ri, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32ri8, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32rm, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32rr, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32rr_REV, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64i32, X86_INS_AND: and{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64mi32, X86_INS_AND: and{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64mi8, X86_INS_AND: and{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64mr, X86_INS_AND: and{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64ri32, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64ri8, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64rm, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64rr, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64rr_REV, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8i8, X86_INS_AND: and{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8mi, X86_INS_AND: and{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8mi8, X86_INS_AND: and{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8mr, X86_INS_AND: and{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8ri, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8ri8, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8rm, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8rr, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8rr_REV, X86_INS_AND: and{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDN32rm, X86_INS_ANDN: andn{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDN32rr, X86_INS_ANDN: andn{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDN64rm, X86_INS_ANDN: andn{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDN64rr, X86_INS_ANDN: andn{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDNPDrm, X86_INS_ANDNPD: andnpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDNPDrr, X86_INS_ANDNPD: andnpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDNPSrm, X86_INS_ANDNPS: andnps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDNPSrr, X86_INS_ANDNPS: andnps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDPDrm, X86_INS_ANDPD: andpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDPDrr, X86_INS_ANDPD: andpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDPSrm, X86_INS_ANDPS: andps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDPSrr, X86_INS_ANDPS: andps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ARPL16mr, X86_INS_ARPL: arpl $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ARPL16rr, X86_INS_ARPL: arpl $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BEXTR32rm, X86_INS_BEXTR: bextr{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTR32rr, X86_INS_BEXTR: bextr{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTR64rm, X86_INS_BEXTR: bextr{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTR64rr, X86_INS_BEXTR: bextr{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTRI32mi, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BEXTRI32ri, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BEXTRI64mi, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BEXTRI64ri, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BLCFILL32rm, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCFILL32rr, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCFILL64rm, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCFILL64rr, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI32rm, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI32rr, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI64rm, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI64rr, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC32rm, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC32rr, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC64rm, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC64rr, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK32rm, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK32rr, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK64rm, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK64rr, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS32rm, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS32rr, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS64rm, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS64rr, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLENDPDrmi, X86_INS_BLENDPD: blendpd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BLENDPDrri, X86_INS_BLENDPD: blendpd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BLENDPSrmi, X86_INS_BLENDPS: blendps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BLENDPSrri, X86_INS_BLENDPS: blendps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BLENDVPDrm0, X86_INS_BLENDVPD: blendvpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLENDVPDrr0, X86_INS_BLENDVPD: blendvpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLENDVPSrm0, X86_INS_BLENDVPS: blendvps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLENDVPSrr0, X86_INS_BLENDVPS: blendvps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL32rm, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL32rr, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL64rm, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL64rr, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI32rm, X86_INS_BLSI: blsi{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI32rr, X86_INS_BLSI: blsi{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI64rm, X86_INS_BLSI: blsi{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI64rr, X86_INS_BLSI: blsi{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC32rm, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC32rr, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC64rm, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC64rr, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK32rm, X86_INS_BLSMSK: blsmsk{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK32rr, X86_INS_BLSMSK: blsmsk{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK64rm, X86_INS_BLSMSK: blsmsk{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK64rr, X86_INS_BLSMSK: blsmsk{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR32rm, X86_INS_BLSR: blsr{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR32rr, X86_INS_BLSR: blsr{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR64rm, X86_INS_BLSR: blsr{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR64rr, X86_INS_BLSR: blsr{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BOUNDS16rm, X86_INS_BOUND: bound $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BOUNDS32rm, X86_INS_BOUND: bound $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF16rm, X86_INS_BSF: bsf{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF16rr, X86_INS_BSF: bsf{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF32rm, X86_INS_BSF: bsf{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF32rr, X86_INS_BSF: bsf{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF64rm, X86_INS_BSF: bsf{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF64rr, X86_INS_BSF: bsf{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR16rm, X86_INS_BSR: bsr{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR16rr, X86_INS_BSR: bsr{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR32rm, X86_INS_BSR: bsr{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR32rr, X86_INS_BSR: bsr{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR64rm, X86_INS_BSR: bsr{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR64rr, X86_INS_BSR: bsr{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSWAP32r, X86_INS_BSWAP: bswap{l} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_BSWAP64r, X86_INS_BSWAP: bswap{q} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_BT16mi8, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT16mr, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT16ri8, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT16rr, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT32mi8, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT32mr, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT32ri8, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT32rr, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT64mi8, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT64mr, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT64ri8, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT64rr, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BTC16mi8, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC16mr, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC16ri8, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC16rr, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC32mi8, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC32mr, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC32ri8, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC32rr, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC64mi8, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC64mr, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC64ri8, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC64rr, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR16mi8, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR16mr, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR16ri8, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR16rr, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR32mi8, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR32mr, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR32ri8, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR32rr, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR64mi8, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR64mr, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR64ri8, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR64rr, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS16mi8, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS16mr, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS16ri8, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS16rr, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS32mi8, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS32mr, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS32ri8, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS32rr, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS64mi8, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS64mr, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS64ri8, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS64rr, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BZHI32rm, X86_INS_BZHI: bzhi{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BZHI32rr, X86_INS_BZHI: bzhi{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BZHI64rm, X86_INS_BZHI: bzhi{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BZHI64rr, X86_INS_BZHI: bzhi{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CALL16m, X86_INS_CALL: call{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL16r, X86_INS_CALL: call{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL32m, X86_INS_CALL: call{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL32r, X86_INS_CALL: call{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL64m, X86_INS_CALL: call{q} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL64pcrel32, X86_INS_CALL: call{q} $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALL64r, X86_INS_CALL: call{q} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALLpcrel16, X86_INS_CALL: call{w} $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALLpcrel32, X86_INS_CALL: call{l} $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CBW, X86_INS_CBW: cbw */ 0, { 0 } }, { /* X86_CDQ, X86_INS_CDQ: cdq */ 0, { 0 } }, { /* X86_CDQE, X86_INS_CDQE: cdqe */ 0, { 0 } }, { /* X86_CHS_F, X86_INS_FCHS: fchs */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_CLAC, X86_INS_CLAC: clac */ X86_EFLAGS_RESET_AC, { 0 } }, { /* X86_CLC, X86_INS_CLC: clc */ X86_EFLAGS_RESET_CF, { 0 } }, { /* X86_CLD, X86_INS_CLD: cld */ X86_EFLAGS_RESET_DF, { 0 } }, { /* X86_CLFLUSH, X86_INS_CLFLUSH: clflush $src */ 0, { CS_AC_READ, 0 } }, { /* X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT: clflushopt $src */ 0, { CS_AC_READ, 0 } }, { /* X86_CLGI, X86_INS_CLGI: clgi */ 0, { 0 } }, { /* X86_CLI, X86_INS_CLI: cli */ X86_EFLAGS_RESET_IF, { 0 } }, { /* X86_CLTS, X86_INS_CLTS: clts */ 0, { 0 } }, { /* X86_CLWB, X86_INS_CLWB: clwb $src */ 0, { CS_AC_READ, 0 } }, { /* X86_CMC, X86_INS_CMC: cmc */ X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_CMOVA16rm, X86_INS_CMOVA: cmova{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA16rr, X86_INS_CMOVA: cmova{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA32rm, X86_INS_CMOVA: cmova{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA32rr, X86_INS_CMOVA: cmova{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA64rm, X86_INS_CMOVA: cmova{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA64rr, X86_INS_CMOVA: cmova{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE16rm, X86_INS_CMOVAE: cmovae{w} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE16rr, X86_INS_CMOVAE: cmovae{w} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE32rm, X86_INS_CMOVAE: cmovae{l} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE32rr, X86_INS_CMOVAE: cmovae{l} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE64rm, X86_INS_CMOVAE: cmovae{q} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE64rr, X86_INS_CMOVAE: cmovae{q} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB16rm, X86_INS_CMOVB: cmovb{w} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB16rr, X86_INS_CMOVB: cmovb{w} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB32rm, X86_INS_CMOVB: cmovb{l} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB32rr, X86_INS_CMOVB: cmovb{l} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB64rm, X86_INS_CMOVB: cmovb{q} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB64rr, X86_INS_CMOVB: cmovb{q} $dst, $src2 */ X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE16rm, X86_INS_CMOVBE: cmovbe{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE16rr, X86_INS_CMOVBE: cmovbe{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE32rm, X86_INS_CMOVBE: cmovbe{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE32rr, X86_INS_CMOVBE: cmovbe{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE64rm, X86_INS_CMOVBE: cmovbe{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE64rr, X86_INS_CMOVBE: cmovbe{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE_F, X86_INS_FCMOVBE: fcmovbe st(0), $op */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVB_F, X86_INS_FCMOVB: fcmovb st(0), $op */ X86_EFLAGS_TEST_CF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVE16rm, X86_INS_CMOVE: cmove{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE16rr, X86_INS_CMOVE: cmove{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE32rm, X86_INS_CMOVE: cmove{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE32rr, X86_INS_CMOVE: cmove{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE64rm, X86_INS_CMOVE: cmove{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE64rr, X86_INS_CMOVE: cmove{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE_F, X86_INS_FCMOVE: fcmove st(0), $op */ X86_EFLAGS_TEST_ZF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVG16rm, X86_INS_CMOVG: cmovg{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG16rr, X86_INS_CMOVG: cmovg{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG32rm, X86_INS_CMOVG: cmovg{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG32rr, X86_INS_CMOVG: cmovg{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG64rm, X86_INS_CMOVG: cmovg{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG64rr, X86_INS_CMOVG: cmovg{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE16rm, X86_INS_CMOVGE: cmovge{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE16rr, X86_INS_CMOVGE: cmovge{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE32rm, X86_INS_CMOVGE: cmovge{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE32rr, X86_INS_CMOVGE: cmovge{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE64rm, X86_INS_CMOVGE: cmovge{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE64rr, X86_INS_CMOVGE: cmovge{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL16rm, X86_INS_CMOVL: cmovl{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL16rr, X86_INS_CMOVL: cmovl{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL32rm, X86_INS_CMOVL: cmovl{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL32rr, X86_INS_CMOVL: cmovl{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL64rm, X86_INS_CMOVL: cmovl{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL64rr, X86_INS_CMOVL: cmovl{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE16rm, X86_INS_CMOVLE: cmovle{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE16rr, X86_INS_CMOVLE: cmovle{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE32rm, X86_INS_CMOVLE: cmovle{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE32rr, X86_INS_CMOVLE: cmovle{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE64rm, X86_INS_CMOVLE: cmovle{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE64rr, X86_INS_CMOVLE: cmovle{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNBE_F, X86_INS_FCMOVNBE: fcmovnbe st(0), $op */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVNB_F, X86_INS_FCMOVNB: fcmovnb st(0), $op */ X86_EFLAGS_TEST_CF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVNE16rm, X86_INS_CMOVNE: cmovne{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE16rr, X86_INS_CMOVNE: cmovne{w} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE32rm, X86_INS_CMOVNE: cmovne{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE32rr, X86_INS_CMOVNE: cmovne{l} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE64rm, X86_INS_CMOVNE: cmovne{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE64rr, X86_INS_CMOVNE: cmovne{q} $dst, $src2 */ X86_EFLAGS_TEST_ZF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE_F, X86_INS_FCMOVNE: fcmovne st(0), $op */ X86_EFLAGS_TEST_ZF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVNO16rm, X86_INS_CMOVNO: cmovno{w} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO16rr, X86_INS_CMOVNO: cmovno{w} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO32rm, X86_INS_CMOVNO: cmovno{l} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO32rr, X86_INS_CMOVNO: cmovno{l} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO64rm, X86_INS_CMOVNO: cmovno{q} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO64rr, X86_INS_CMOVNO: cmovno{q} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP16rm, X86_INS_CMOVNP: cmovnp{w} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP16rr, X86_INS_CMOVNP: cmovnp{w} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP32rm, X86_INS_CMOVNP: cmovnp{l} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP32rr, X86_INS_CMOVNP: cmovnp{l} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP64rm, X86_INS_CMOVNP: cmovnp{q} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP64rr, X86_INS_CMOVNP: cmovnp{q} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP_F, X86_INS_FCMOVNU: fcmovnu st(0), $op */ X86_EFLAGS_TEST_PF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVNS16rm, X86_INS_CMOVNS: cmovns{w} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS16rr, X86_INS_CMOVNS: cmovns{w} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS32rm, X86_INS_CMOVNS: cmovns{l} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS32rr, X86_INS_CMOVNS: cmovns{l} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS64rm, X86_INS_CMOVNS: cmovns{q} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS64rr, X86_INS_CMOVNS: cmovns{q} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO16rm, X86_INS_CMOVO: cmovo{w} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO16rr, X86_INS_CMOVO: cmovo{w} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO32rm, X86_INS_CMOVO: cmovo{l} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO32rr, X86_INS_CMOVO: cmovo{l} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO64rm, X86_INS_CMOVO: cmovo{q} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO64rr, X86_INS_CMOVO: cmovo{q} $dst, $src2 */ X86_EFLAGS_TEST_OF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP16rm, X86_INS_CMOVP: cmovp{w} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP16rr, X86_INS_CMOVP: cmovp{w} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP32rm, X86_INS_CMOVP: cmovp{l} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP32rr, X86_INS_CMOVP: cmovp{l} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP64rm, X86_INS_CMOVP: cmovp{q} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP64rr, X86_INS_CMOVP: cmovp{q} $dst, $src2 */ X86_EFLAGS_TEST_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP_F, X86_INS_FCMOVU: fcmovu st(0), $op */ X86_EFLAGS_TEST_PF, { CS_AC_READ, CS_AC_WRITE, 0 } }, { /* X86_CMOVS16rm, X86_INS_CMOVS: cmovs{w} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS16rr, X86_INS_CMOVS: cmovs{w} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS32rm, X86_INS_CMOVS: cmovs{l} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS32rr, X86_INS_CMOVS: cmovs{l} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS64rm, X86_INS_CMOVS: cmovs{q} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS64rr, X86_INS_CMOVS: cmovs{q} $dst, $src2 */ X86_EFLAGS_TEST_SF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMP16i16, X86_INS_CMP: cmp{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16mi, X86_INS_CMP: cmp{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16mi8, X86_INS_CMP: cmp{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16mr, X86_INS_CMP: cmp{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP16ri, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16ri8, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16rm, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP16rr, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP16rr_REV, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32i32, X86_INS_CMP: cmp{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32mi, X86_INS_CMP: cmp{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32mi8, X86_INS_CMP: cmp{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32mr, X86_INS_CMP: cmp{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32ri, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32ri8, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32rm, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32rr, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32rr_REV, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64i32, X86_INS_CMP: cmp{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64mi32, X86_INS_CMP: cmp{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64mi8, X86_INS_CMP: cmp{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64mr, X86_INS_CMP: cmp{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64ri32, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64ri8, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64rm, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64rr, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64rr_REV, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8i8, X86_INS_CMP: cmp{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8mi, X86_INS_CMP: cmp{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8mi8, X86_INS_CMP: cmp{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8mr, X86_INS_CMP: cmp{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8ri, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8ri8, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8rm, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8rr, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8rr_REV, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPPDrmi, X86_INS_CMPPD: cmp${cc}pd $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPPDrmi_alt, X86_INS_CMPPD: cmppd $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPPDrri, X86_INS_CMPPD: cmp${cc}pd $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPPDrri_alt, X86_INS_CMPPD: cmppd $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPPSrmi, X86_INS_CMPPS: cmp${cc}ps $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPPSrmi_alt, X86_INS_CMPPS: cmpps $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPPSrri, X86_INS_CMPPS: cmp${cc}ps $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPPSrri_alt, X86_INS_CMPPS: cmpps $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPSB, X86_INS_CMPSB: cmpsb $src, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPSDrm, X86_INS_CMPSD: cmp${cc}sd $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPSDrm_alt, X86_INS_CMPSD: cmpsd $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPSDrr, X86_INS_CMPSD: cmp${cc}sd $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPSDrr_alt, X86_INS_CMPSD: cmpsd $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPSL, X86_INS_CMPSD: cmps{l|d} {$dst, $src|$src, $dst} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_CMPSQ, X86_INS_CMPSQ: cmpsq $src, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPSSrm, X86_INS_CMPSS: cmp${cc}ss $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPSSrm_alt, X86_INS_CMPSS: cmpss $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPSSrr, X86_INS_CMPSS: cmp${cc}ss $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPSSrr_alt, X86_INS_CMPSS: cmpss $dst, $src2, $cc */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMPSW, X86_INS_CMPSW: cmpsw $src, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b $dst */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_CMPXCHG16rm, X86_INS_CMPXCHG: cmpxchg{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG16rr, X86_INS_CMPXCHG: cmpxchg{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPXCHG32rm, X86_INS_CMPXCHG: cmpxchg{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG32rr, X86_INS_CMPXCHG: cmpxchg{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPXCHG64rm, X86_INS_CMPXCHG: cmpxchg{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG64rr, X86_INS_CMPXCHG: cmpxchg{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b $dst */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_CMPXCHG8rm, X86_INS_CMPXCHG: cmpxchg{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG8rr, X86_INS_CMPXCHG: cmpxchg{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_COMISDrm, X86_INS_COMISD: comisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_COMISDrr, X86_INS_COMISD: comisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_COMISSrm, X86_INS_COMISS: comiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_COMISSrr, X86_INS_COMISS: comiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_COMP_FST0r, X86_INS_FCOMP: fcomp $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_COM_FIPr, X86_INS_FCOMIP: fcomip $reg */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_COM_FIr, X86_INS_FCOMI: fcomi $reg */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_COM_FST0r, X86_INS_FCOM: fcom $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_COS_F, X86_INS_FCOS: fcos */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_CPUID, X86_INS_CPUID: cpuid */ 0, { 0 } }, { /* X86_CQO, X86_INS_CQO: cqo */ 0, { 0 } }, { /* X86_CRC32r32m16, X86_INS_CRC32: crc32{w} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r32m32, X86_INS_CRC32: crc32{l} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r32m8, X86_INS_CRC32: crc32{b} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r32r16, X86_INS_CRC32: crc32{w} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r32r32, X86_INS_CRC32: crc32{l} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r32r8, X86_INS_CRC32: crc32{b} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r64m64, X86_INS_CRC32: crc32{q} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r64m8, X86_INS_CRC32: crc32{b} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r64r64, X86_INS_CRC32: crc32{q} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CRC32r64r8, X86_INS_CRC32: crc32{b} $src1, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTDQ2PDrm, X86_INS_CVTDQ2PD: cvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTDQ2PDrr, X86_INS_CVTDQ2PD: cvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTDQ2PSrm, X86_INS_CVTDQ2PS: cvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTDQ2PSrr, X86_INS_CVTDQ2PS: cvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPD2DQrm, X86_INS_CVTPD2DQ: cvtpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPD2DQrr, X86_INS_CVTPD2DQ: cvtpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPD2PSrm, X86_INS_CVTPD2PS: cvtpd2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPD2PSrr, X86_INS_CVTPD2PS: cvtpd2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPS2DQrm, X86_INS_CVTPS2DQ: cvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPS2DQrr, X86_INS_CVTPS2DQ: cvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPS2PDrm, X86_INS_CVTPS2PD: cvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTPS2PDrr, X86_INS_CVTPS2PD: cvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSD2SI64rm, X86_INS_CVTSD2SI: cvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_CVTSD2SI64rr, X86_INS_CVTSD2SI: cvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSD2SIrm, X86_INS_CVTSD2SI: cvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_CVTSD2SIrr, X86_INS_CVTSD2SI: cvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSD2SSrm, X86_INS_CVTSD2SS: cvtsd2ss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSD2SSrr, X86_INS_CVTSD2SS: cvtsd2ss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SD64rm, X86_INS_CVTSI2SD: cvtsi2sd{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SD64rr, X86_INS_CVTSI2SD: cvtsi2sd{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SDrm, X86_INS_CVTSI2SD: cvtsi2sd{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SDrr, X86_INS_CVTSI2SD: cvtsi2sd{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SS64rm, X86_INS_CVTSI2SS: cvtsi2ss{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SS64rr, X86_INS_CVTSI2SS: cvtsi2ss{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SSrm, X86_INS_CVTSI2SS: cvtsi2ss{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSI2SSrr, X86_INS_CVTSI2SS: cvtsi2ss{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSS2SDrm, X86_INS_CVTSS2SD: cvtss2sd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSS2SDrr, X86_INS_CVTSS2SD: cvtss2sd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSS2SI64rm, X86_INS_CVTSS2SI: cvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_CVTSS2SI64rr, X86_INS_CVTSS2SI: cvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTSS2SIrm, X86_INS_CVTSS2SI: cvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_CVTSS2SIrr, X86_INS_CVTSS2SI: cvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTPD2DQrm, X86_INS_CVTTPD2DQ: cvttpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTPD2DQrr, X86_INS_CVTTPD2DQ: cvttpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTPS2DQrm, X86_INS_CVTTPS2DQ: cvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTPS2DQrr, X86_INS_CVTTPS2DQ: cvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSD2SI64rm, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSD2SI64rr, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSD2SIrm, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSD2SIrr, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSS2SI64rm, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSS2SI64rr, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSS2SIrm, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CVTTSS2SIrr, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CWD, X86_INS_CWD: cwd */ 0, { 0 } }, { /* X86_CWDE, X86_INS_CWDE: cwde */ 0, { 0 } }, { /* X86_DAA, X86_INS_DAA: daa */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_DAS, X86_INS_DAS: das */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_DATA16_PREFIX, X86_INS_DATA16: data16 */ 0, { 0 } }, { /* X86_DEC16m, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC16r, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC16r_alt, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC32m, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC32r, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC32r_alt, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC64m, X86_INS_DEC: dec{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC64r, X86_INS_DEC: dec{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC8m, X86_INS_DEC: dec{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC8r, X86_INS_DEC: dec{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DIV16m, X86_INS_DIV: div{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV16r, X86_INS_DIV: div{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV32m, X86_INS_DIV: div{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV32r, X86_INS_DIV: div{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV64m, X86_INS_DIV: div{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV64r, X86_INS_DIV: div{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV8m, X86_INS_DIV: div{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV8r, X86_INS_DIV: div{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIVPDrm, X86_INS_DIVPD: divpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVPDrr, X86_INS_DIVPD: divpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVPSrm, X86_INS_DIVPS: divps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVPSrr, X86_INS_DIVPS: divps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVR_F32m, X86_INS_FDIVR: fdivr{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIVR_F64m, X86_INS_FDIVR: fdivr{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIVR_FI16m, X86_INS_FIDIVR: fidivr{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIVR_FI32m, X86_INS_FIDIVR: fidivr{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIVR_FPrST0, X86_INS_FDIVRP: fdivrp $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIVR_FST0r, X86_INS_FDIVR: fdivr $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIVR_FrST0, X86_INS_FDIVR: fdiv{|r} {%st(0), $op|$op, st(0)} */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_DIVSDrm, X86_INS_DIVSD: divsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVSDrm_Int, X86_INS_DIVSD: divsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_DIVSDrr, X86_INS_DIVSD: divsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVSDrr_Int, X86_INS_DIVSD: divsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVSSrm, X86_INS_DIVSS: divss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVSSrm_Int, X86_INS_DIVSS: divss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_DIVSSrr, X86_INS_DIVSS: divss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIVSSrr_Int, X86_INS_DIVSS: divss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_DIV_F32m, X86_INS_FDIV: fdiv{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIV_F64m, X86_INS_FDIV: fdiv{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIV_FI16m, X86_INS_FIDIV: fidiv{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIV_FI32m, X86_INS_FIDIV: fidiv{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIV_FPrST0, X86_INS_FDIVP: fdiv{r}p $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIV_FST0r, X86_INS_FDIV: fdiv $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_DIV_FrST0, X86_INS_FDIV: fdiv{r} $op, st(0) */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_DPPDrmi, X86_INS_DPPD: dppd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_DPPDrri, X86_INS_DPPD: dppd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_DPPSrmi, X86_INS_DPPS: dpps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_DPPSrri, X86_INS_DPPS: dpps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ENCLS, X86_INS_ENCLS: encls */ 0, { 0 } }, { /* X86_ENCLU, X86_INS_ENCLU: enclu */ 0, { 0 } }, { /* X86_ENTER, X86_INS_ENTER: enter $len, $lvl */ 0, { CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_EXTRACTPSmr, X86_INS_EXTRACTPS: extractps $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_EXTRACTPSrr, X86_INS_EXTRACTPS: extractps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_EXTRQ, X86_INS_EXTRQ: extrq $src, $mask */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_EXTRQI, X86_INS_EXTRQ: extrq $src, $len, $idx */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_F2XM1, X86_INS_F2XM1: f2xm1 */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FARCALL16i, X86_INS_LCALL: lcall{w} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARCALL16m, X86_INS_LCALL: lcall{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARCALL32i, X86_INS_LCALL: lcall{l} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARCALL32m, X86_INS_LCALL: lcall{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARCALL64, X86_INS_LCALL: lcall{q} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARJMP16i, X86_INS_LJMP: ljmp{w} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARJMP16m, X86_INS_LJMP: ljmp{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARJMP32i, X86_INS_LJMP: ljmp{l} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARJMP32m, X86_INS_LJMP: ljmp{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARJMP64, X86_INS_LJMP: ljmp{q} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FBLDm, X86_INS_FBLD: fbld $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_FBSTPm, X86_INS_FBSTP: fbstp $dst */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_FCOM32m, X86_INS_FCOM: fcom{s} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FCOM64m, X86_INS_FCOM: fcom{l} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FCOMP32m, X86_INS_FCOMP: fcomp{s} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FCOMP64m, X86_INS_FCOMP: fcomp{l} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FCOMPP, X86_INS_FCOMPP: fcompp */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { 0 } }, { /* X86_FDECSTP, X86_INS_FDECSTP: fdecstp */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FEMMS, X86_INS_FEMMS: femms */ 0, { 0 } }, { /* X86_FFREE, X86_INS_FFREE: ffree $reg */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_FICOM16m, X86_INS_FICOM: ficom{s} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FICOM32m, X86_INS_FICOM: ficom{l} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FICOMP16m, X86_INS_FICOMP: ficomp{s} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FICOMP32m, X86_INS_FICOMP: ficomp{l} $src */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_FINCSTP, X86_INS_FINCSTP: fincstp */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FLDCW16m, X86_INS_FLDCW: fldcw $dst */ X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_FLDENVm, X86_INS_FLDENV: fldenv $src */ 0, { CS_AC_READ, 0 } }, { /* X86_FLDL2E, X86_INS_FLDL2E: fldl2e */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FLDL2T, X86_INS_FLDL2T: fldl2t */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FLDLG2, X86_INS_FLDLG2: fldlg2 */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FLDLN2, X86_INS_FLDLN2: fldln2 */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FLDPI, X86_INS_FLDPI: fldpi */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FNCLEX, X86_INS_FNCLEX: fnclex */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FNINIT, X86_INS_FNINIT: fninit */ X86_FPU_FLAGS_RESET_C0 | X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_RESET_C2 | X86_FPU_FLAGS_RESET_C3, { 0 } }, { /* X86_FNOP, X86_INS_FNOP: fnop */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FNSTCW16m, X86_INS_FNSTCW: fnstcw $dst */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_FNSTSW16r, X86_INS_FNSTSW: fnstsw ax */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_FNSTSWm, X86_INS_FNSTSW: fnstsw $dst */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_FPATAN, X86_INS_FPATAN: fpatan */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FPREM, X86_INS_FPREM: fprem */ X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { 0 } }, { /* X86_FPREM1, X86_INS_FPREM1: fprem1 */ X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { 0 } }, { /* X86_FPTAN, X86_INS_FPTAN: fptan */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FP_FFREEP, X86_INS_FFREEP: ffreep $op */ 0, { CS_AC_WRITE, 0 } }, { /* X86_FRNDINT, X86_INS_FRNDINT: frndint */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FRSTORm, X86_INS_FRSTOR: frstor $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_FSAVEm, X86_INS_FNSAVE: fnsave $dst */ X86_FPU_FLAGS_RESET_C0 | X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_RESET_C2 | X86_FPU_FLAGS_RESET_C3, { CS_AC_WRITE, 0 } }, { /* X86_FSCALE, X86_INS_FSCALE: fscale */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FSETPM, X86_INS_FSETPM: fsetpm */ 0, { 0 } }, { /* X86_FSINCOS, X86_INS_FSINCOS: fsincos */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FSTENVm, X86_INS_FNSTENV: fnstenv $dst */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_FXAM, X86_INS_FXAM: fxam */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { 0 } }, { /* X86_FXRSTOR, X86_INS_FXRSTOR: fxrstor $src */ 0, { CS_AC_READ, 0 } }, { /* X86_FXRSTOR64, X86_INS_FXRSTOR64: fxrstor64 $src */ 0, { CS_AC_READ, 0 } }, { /* X86_FXSAVE, X86_INS_FXSAVE: fxsave $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_FXSAVE64, X86_INS_FXSAVE64: fxsave64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_FXTRACT, X86_INS_FXTRACT: fxtract */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FYL2X, X86_INS_FYL2X: fyl2x */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FYL2XP1, X86_INS_FYL2XP1: fyl2xp1 */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_FsANDNPDrm, X86_INS_ANDNPD: andnpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDNPDrr, X86_INS_ANDNPD: andnpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDNPSrm, X86_INS_ANDNPS: andnps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDNPSrr, X86_INS_ANDNPS: andnps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDPDrm, X86_INS_ANDPD: andpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDPDrr, X86_INS_ANDPD: andpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDPSrm, X86_INS_ANDPS: andps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsANDPSrr, X86_INS_ANDPS: andps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsMOVAPDrm, X86_INS_MOVAPD: movapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsMOVAPSrm, X86_INS_MOVAPS: movaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsORPDrm, X86_INS_ORPD: orpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsORPDrr, X86_INS_ORPD: orpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsORPSrm, X86_INS_ORPS: orps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsORPSrr, X86_INS_ORPS: orps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsVMOVAPDrm, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsVMOVAPSrm, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsXORPDrm, X86_INS_XORPD: xorpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsXORPDrr, X86_INS_XORPD: xorpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsXORPSrm, X86_INS_XORPS: xorps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FsXORPSrr, X86_INS_XORPS: xorps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDNPDrm, X86_INS_ANDNPD: andnpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDNPDrr, X86_INS_ANDNPD: andnpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDNPSrm, X86_INS_ANDNPS: andnps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDNPSrr, X86_INS_ANDNPS: andnps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDPDrm, X86_INS_ANDPD: andpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDPDrr, X86_INS_ANDPD: andpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDPSrm, X86_INS_ANDPS: andps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvANDPSrr, X86_INS_ANDPS: andps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvORPDrm, X86_INS_ORPD: orpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvORPDrr, X86_INS_ORPD: orpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvORPSrm, X86_INS_ORPS: orps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvORPSrr, X86_INS_ORPS: orps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvXORPDrm, X86_INS_XORPD: xorpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvXORPDrr, X86_INS_XORPD: xorpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvXORPSrm, X86_INS_XORPS: xorps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_FvXORPSrr, X86_INS_XORPS: xorps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_GETSEC, X86_INS_GETSEC: getsec */ 0, { 0 } }, { /* X86_HADDPDrm, X86_INS_HADDPD: haddpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HADDPDrr, X86_INS_HADDPD: haddpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HADDPSrm, X86_INS_HADDPS: haddps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HADDPSrr, X86_INS_HADDPS: haddps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HLT, X86_INS_HLT: hlt */ 0, { 0 } }, { /* X86_HSUBPDrm, X86_INS_HSUBPD: hsubpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HSUBPDrr, X86_INS_HSUBPD: hsubpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HSUBPSrm, X86_INS_HSUBPS: hsubps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_HSUBPSrr, X86_INS_HSUBPS: hsubps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IDIV16m, X86_INS_IDIV: idiv{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV16r, X86_INS_IDIV: idiv{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV32m, X86_INS_IDIV: idiv{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV32r, X86_INS_IDIV: idiv{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV64m, X86_INS_IDIV: idiv{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV64r, X86_INS_IDIV: idiv{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV8m, X86_INS_IDIV: idiv{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV8r, X86_INS_IDIV: idiv{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_ILD_F16m, X86_INS_FILD: fild{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ILD_F32m, X86_INS_FILD: fild{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ILD_F64m, X86_INS_FILD: fild{ll} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_IMUL16m, X86_INS_IMUL: imul{w} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL16r, X86_INS_IMUL: imul{w} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL16rm, X86_INS_IMUL: imul{w} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL16rmi, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL16rmi8, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL16rr, X86_INS_IMUL: imul{w} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL16rri, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL16rri8, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32m, X86_INS_IMUL: imul{l} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL32r, X86_INS_IMUL: imul{l} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL32rm, X86_INS_IMUL: imul{l} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL32rmi, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32rmi8, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32rr, X86_INS_IMUL: imul{l} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL32rri, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32rri8, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64m, X86_INS_IMUL: imul{q} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL64r, X86_INS_IMUL: imul{q} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL64rm, X86_INS_IMUL: imul{q} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL64rmi32, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64rmi8, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64rr, X86_INS_IMUL: imul{q} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL64rri32, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64rri8, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL8m, X86_INS_IMUL: imul{b} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL8r, X86_INS_IMUL: imul{b} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IN16ri, X86_INS_IN: in{w} ax, $port */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_IN16rr, X86_INS_IN: in{w} ax, dx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IN32ri, X86_INS_IN: in{l} eax, $port */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_IN32rr, X86_INS_IN: in{l} eax, dx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IN8ri, X86_INS_IN: in{b} al, $port */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_IN8rr, X86_INS_IN: in{b} al, dx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_INC16m, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC16r, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC16r_alt, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC32m, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC32r, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC32r_alt, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC64m, X86_INS_INC: inc{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC64r, X86_INS_INC: inc{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC8m, X86_INS_INC: inc{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC8r, X86_INS_INC: inc{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INSB, X86_INS_INSB: insb $dst, dx */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_INSERTPSrm, X86_INS_INSERTPS: insertps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_INSERTPSrr, X86_INS_INSERTPS: insertps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_INSERTQ, X86_INS_INSERTQ: insertq $src, $mask */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_INSERTQI, X86_INS_INSERTQ: insertq $src, $src2, $len, $idx */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_INSL, X86_INS_INSD: ins{l|d} {%dx, $dst|$dst, dx} */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_INSW, X86_INS_INSW: insw $dst, dx */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_INT, X86_INS_INT: int $trap */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { CS_AC_IGNORE, 0 } }, { /* X86_INT1, X86_INS_INT1: int1 */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_INT3, X86_INS_INT3: int3 */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_INTO, X86_INS_INTO: into */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_INVD, X86_INS_INVD: invd */ 0, { 0 } }, { /* X86_INVEPT32, X86_INS_INVEPT: invept $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVEPT64, X86_INS_INVEPT: invept $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVLPG, X86_INS_INVLPG: invlpg $addr */ 0, { CS_AC_READ, 0 } }, { /* X86_INVLPGA32, X86_INS_INVLPGA: invlpga eax, ecx */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVLPGA64, X86_INS_INVLPGA: invlpga rax, ecx */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVPCID32, X86_INS_INVPCID: invpcid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVPCID64, X86_INS_INVPCID: invpcid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVVPID32, X86_INS_INVVPID: invvpid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVVPID64, X86_INS_INVVPID: invvpid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_IRET16, X86_INS_IRET: iret{w} */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_IRET32, X86_INS_IRETD: iretd */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_IRET64, X86_INS_IRETQ: iretq */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_ISTT_FP16m, X86_INS_FISTTP: fisttp{s} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ISTT_FP32m, X86_INS_FISTTP: fisttp{l} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ISTT_FP64m, X86_INS_FISTTP: fisttp{ll} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_IST_F16m, X86_INS_FIST: fist{s} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_IST_F32m, X86_INS_FIST: fist{l} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_IST_FP16m, X86_INS_FISTP: fistp{s} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_IST_FP32m, X86_INS_FISTP: fistp{l} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_IST_FP64m, X86_INS_FISTP: fistp{ll} $dst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_Int_CMPSDrm, X86_INS_CMPSD: cmp${cc}sd $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CMPSDrr, X86_INS_CMPSD: cmp${cc}sd $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CMPSSrm, X86_INS_CMPSS: cmp${cc}ss $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CMPSSrr, X86_INS_CMPSS: cmp${cc}ss $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_COMISDrm, X86_INS_COMISD: comisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_COMISDrr, X86_INS_COMISD: comisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_COMISSrm, X86_INS_COMISS: comiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_COMISSrr, X86_INS_COMISS: comiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_CVTSD2SSrm, X86_INS_CVTSD2SS: cvtsd2ss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_CVTSD2SSrr, X86_INS_CVTSD2SS: cvtsd2ss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SD64rm, X86_INS_CVTSI2SD: cvtsi2sd{q} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SD64rr, X86_INS_CVTSI2SD: cvtsi2sd{q} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SDrm, X86_INS_CVTSI2SD: cvtsi2sd{l} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SDrr, X86_INS_CVTSI2SD: cvtsi2sd{l} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SS64rm, X86_INS_CVTSI2SS: cvtsi2ss{q} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SS64rr, X86_INS_CVTSI2SS: cvtsi2ss{q} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SSrm, X86_INS_CVTSI2SS: cvtsi2ss{l} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSI2SSrr, X86_INS_CVTSI2SS: cvtsi2ss{l} $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTSS2SDrm, X86_INS_CVTSS2SD: cvtss2sd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_CVTSS2SDrr, X86_INS_CVTSS2SD: cvtss2sd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTTSD2SI64rm, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_CVTTSD2SI64rr, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTTSD2SIrm, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_CVTTSD2SIrr, X86_INS_CVTTSD2SI: cvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTTSS2SI64rm, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_CVTTSS2SI64rr, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_CVTTSS2SIrm, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_CVTTSS2SIrr, X86_INS_CVTTSS2SI: cvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_UCOMISDrm, X86_INS_UCOMISD: ucomisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_UCOMISDrr, X86_INS_UCOMISD: ucomisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_UCOMISSrm, X86_INS_UCOMISS: ucomiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_UCOMISSrr, X86_INS_UCOMISS: ucomiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCMPSDrm, X86_INS_VCMPSD: vcmp${cc}sd $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCMPSDrr, X86_INS_VCMPSD: vcmp${cc}sd $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCMPSSrm, X86_INS_VCMPSS: vcmp${cc}ss $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCMPSSrr, X86_INS_VCMPSS: vcmp${cc}ss $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISDZrm, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISDZrr, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISDrm, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISDrr, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISSZrm, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISSZrr, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISSrm, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCOMISSrr, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSD2SSrm, X86_INS_VCVTSD2SS: vcvtsd2ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTSD2SSrr, X86_INS_VCVTSD2SS: vcvtsd2ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SD64Zrm, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SD64Zrr, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SD64rm, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SD64rr, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SDrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SDrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SS64Zrm, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SS64Zrr, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SS64rm, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SS64rr, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SSrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSI2SSrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTSS2SDrm, X86_INS_VCVTSS2SD: vcvtss2sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTSS2SDrr, X86_INS_VCVTSS2SD: vcvtss2sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_Int_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SD64Zrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SD64Zrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SS64Zrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SS64Zrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISDZrm, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISDZrr, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISDrm, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISDrr, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISSZrm, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISSZrr, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISSrm, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_Int_VUCOMISSrr, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_JAE_1, X86_INS_JAE: jae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JAE_2, X86_INS_JAE: jae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JAE_4, X86_INS_JAE: jae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JA_1, X86_INS_JA: ja $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JA_2, X86_INS_JA: ja $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JA_4, X86_INS_JA: ja $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JBE_1, X86_INS_JBE: jbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JBE_2, X86_INS_JBE: jbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JBE_4, X86_INS_JBE: jbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JB_1, X86_INS_JB: jb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JB_2, X86_INS_JB: jb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JB_4, X86_INS_JB: jb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JCXZ, X86_INS_JCXZ: jcxz $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JECXZ, X86_INS_JECXZ: jecxz $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JE_1, X86_INS_JE: je $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JE_2, X86_INS_JE: je $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JE_4, X86_INS_JE: je $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JGE_1, X86_INS_JGE: jge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JGE_2, X86_INS_JGE: jge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JGE_4, X86_INS_JGE: jge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JG_1, X86_INS_JG: jg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JG_2, X86_INS_JG: jg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JG_4, X86_INS_JG: jg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JLE_1, X86_INS_JLE: jle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JLE_2, X86_INS_JLE: jle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JLE_4, X86_INS_JLE: jle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JL_1, X86_INS_JL: jl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JL_2, X86_INS_JL: jl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JL_4, X86_INS_JL: jl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JMP16m, X86_INS_JMP: jmp{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP16r, X86_INS_JMP: jmp{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP32m, X86_INS_JMP: jmp{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP32r, X86_INS_JMP: jmp{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP64m, X86_INS_JMP: jmp{q} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP64r, X86_INS_JMP: jmp{q} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP_1, X86_INS_JMP: jmp $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP_2, X86_INS_JMP: jmp $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP_4, X86_INS_JMP: jmp $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JNE_1, X86_INS_JNE: jne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JNE_2, X86_INS_JNE: jne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JNE_4, X86_INS_JNE: jne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JNO_1, X86_INS_JNO: jno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JNO_2, X86_INS_JNO: jno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JNO_4, X86_INS_JNO: jno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JNP_1, X86_INS_JNP: jnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JNP_2, X86_INS_JNP: jnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JNP_4, X86_INS_JNP: jnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JNS_1, X86_INS_JNS: jns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JNS_2, X86_INS_JNS: jns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JNS_4, X86_INS_JNS: jns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JO_1, X86_INS_JO: jo $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JO_2, X86_INS_JO: jo $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JO_4, X86_INS_JO: jo $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JP_1, X86_INS_JP: jp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JP_2, X86_INS_JP: jp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JP_4, X86_INS_JP: jp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JRCXZ, X86_INS_JRCXZ: jrcxz $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JS_1, X86_INS_JS: js $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JS_2, X86_INS_JS: js $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JS_4, X86_INS_JS: js $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_KANDBrr, X86_INS_KANDB: kandb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDDrr, X86_INS_KANDD: kandd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDNBrr, X86_INS_KANDNB: kandnb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDNDrr, X86_INS_KANDND: kandnd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDNQrr, X86_INS_KANDNQ: kandnq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDNWrr, X86_INS_KANDNW: kandnw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDQrr, X86_INS_KANDQ: kandq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KANDWrr, X86_INS_KANDW: kandw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KMOVBkk, X86_INS_KMOVB: kmovb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVBkm, X86_INS_KMOVB: kmovb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVBkr, X86_INS_KMOVB: kmovb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVBmk, X86_INS_KMOVB: kmovb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KMOVBrk, X86_INS_KMOVB: kmovb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVDkk, X86_INS_KMOVD: kmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVDkm, X86_INS_KMOVD: kmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVDkr, X86_INS_KMOVD: kmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVDmk, X86_INS_KMOVD: kmovd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KMOVDrk, X86_INS_KMOVD: kmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVQkk, X86_INS_KMOVQ: kmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVQkm, X86_INS_KMOVQ: kmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVQkr, X86_INS_KMOVQ: kmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVQmk, X86_INS_KMOVQ: kmovq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KMOVQrk, X86_INS_KMOVQ: kmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVWkk, X86_INS_KMOVW: kmovw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVWkm, X86_INS_KMOVW: kmovw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVWkr, X86_INS_KMOVW: kmovw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KMOVWmk, X86_INS_KMOVW: kmovw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KMOVWrk, X86_INS_KMOVW: kmovw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KNOTBrr, X86_INS_KNOTB: knotb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KNOTDrr, X86_INS_KNOTD: knotd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KNOTQrr, X86_INS_KNOTQ: knotq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KNOTWrr, X86_INS_KNOTW: knotw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_KORBrr, X86_INS_KORB: korb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORDrr, X86_INS_KORD: kord $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORQrr, X86_INS_KORQ: korq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORTESTBrr, X86_INS_KORTESTB: kortestb $src1, $src2 */ X86_REG_EFLAGS, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORTESTDrr, X86_INS_KORTESTD: kortestd $src1, $src2 */ X86_REG_EFLAGS, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORTESTQrr, X86_INS_KORTESTQ: kortestq $src1, $src2 */ X86_REG_EFLAGS, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORTESTWrr, X86_INS_KORTESTW: kortestw $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KORWrr, X86_INS_KORW: korw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KSHIFTLBri, X86_INS_KSHIFTLB: kshiftlb $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTLDri, X86_INS_KSHIFTLD: kshiftld $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTLQri, X86_INS_KSHIFTLQ: kshiftlq $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTLWri, X86_INS_KSHIFTLW: kshiftlw $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTRBri, X86_INS_KSHIFTRB: kshiftrb $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTRDri, X86_INS_KSHIFTRD: kshiftrd $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTRQri, X86_INS_KSHIFTRQ: kshiftrq $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KSHIFTRWri, X86_INS_KSHIFTRW: kshiftrw $dst, $src, $imm */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_KUNPCKBWrr, X86_INS_KUNPCKBW: kunpckbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXNORBrr, X86_INS_KXNORB: kxnorb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXNORDrr, X86_INS_KXNORD: kxnord $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXNORQrr, X86_INS_KXNORQ: kxnorq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXNORWrr, X86_INS_KXNORW: kxnorw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXORBrr, X86_INS_KXORB: kxorb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXORDrr, X86_INS_KXORD: kxord $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXORQrr, X86_INS_KXORQ: kxorq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_KXORWrr, X86_INS_KXORW: kxorw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LAHF, X86_INS_LAHF: lahf */ 0, { 0 } }, { /* X86_LAR16rm, X86_INS_LAR: lar{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR16rr, X86_INS_LAR: lar{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR32rm, X86_INS_LAR: lar{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR32rr, X86_INS_LAR: lar{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR64rm, X86_INS_LAR: lar{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR64rr, X86_INS_LAR: lar{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG16, X86_INS_CMPXCHG: cmpxchg{w} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b $ptr */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_LCMPXCHG32, X86_INS_CMPXCHG: cmpxchg{l} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG64, X86_INS_CMPXCHG: cmpxchg{q} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG8, X86_INS_CMPXCHG: cmpxchg{b} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b $ptr */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_LDDQUrm, X86_INS_LDDQU: lddqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LDMXCSR, X86_INS_LDMXCSR: ldmxcsr $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LDS16rm, X86_INS_LDS: lds{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LDS32rm, X86_INS_LDS: lds{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LD_F0, X86_INS_FLDZ: fldz */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_LD_F1, X86_INS_FLD1: fld1 */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_LD_F32m, X86_INS_FLD: fld{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_LD_F64m, X86_INS_FLD: fld{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_LD_F80m, X86_INS_FLD: fld{t} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_LD_Frr, X86_INS_FLD: fld $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_LEA16r, X86_INS_LEA: lea{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LEA32r, X86_INS_LEA: lea{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LEA64_32r, X86_INS_LEA: lea{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LEA64r, X86_INS_LEA: lea{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LEAVE, X86_INS_LEAVE: leave */ 0, { 0 } }, { /* X86_LEAVE64, X86_INS_LEAVE: leave */ 0, { 0 } }, { /* X86_LES16rm, X86_INS_LES: les{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LES32rm, X86_INS_LES: les{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LFENCE, X86_INS_LFENCE: lfence */ 0, { 0 } }, { /* X86_LFS16rm, X86_INS_LFS: lfs{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LFS32rm, X86_INS_LFS: lfs{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LFS64rm, X86_INS_LFS: lfs{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LGDT16m, X86_INS_LGDT: lgdt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LGDT32m, X86_INS_LGDT: lgdt{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LGDT64m, X86_INS_LGDT: lgdt{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LGS16rm, X86_INS_LGS: lgs{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LGS32rm, X86_INS_LGS: lgs{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LGS64rm, X86_INS_LGS: lgs{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LIDT16m, X86_INS_LIDT: lidt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LIDT32m, X86_INS_LIDT: lidt{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LIDT64m, X86_INS_LIDT: lidt{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LLDT16m, X86_INS_LLDT: lldt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LLDT16r, X86_INS_LLDT: lldt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LMSW16m, X86_INS_LMSW: lmsw{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LMSW16r, X86_INS_LMSW: lmsw{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LOCK_ADD16mi, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD16mi8, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD16mr, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_ADD32mi, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD32mi8, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD32mr, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_ADD64mi32, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD64mi8, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD64mr, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_ADD8mi, X86_INS_ADD: add{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD8mr, X86_INS_ADD: add{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND16mi, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND16mi8, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND16mr, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND32mi, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND32mi8, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND32mr, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND64mi32, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND64mi8, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND64mr, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND8mi, X86_INS_AND: and{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND8mr, X86_INS_AND: and{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_DEC16m, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_DEC32m, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_DEC64m, X86_INS_DEC: dec{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_DEC8m, X86_INS_DEC: dec{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC16m, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC32m, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC64m, X86_INS_INC: inc{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC8m, X86_INS_INC: inc{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_OR16mi, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR16mi8, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR16mr, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_OR32mi, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR32mi8, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR32mr, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_OR64mi32, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR64mi8, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR64mr, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_OR8mi, X86_INS_OR: or{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR8mr, X86_INS_OR: or{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB16mi, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB16mi8, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB16mr, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB32mi, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB32mi8, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB32mr, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB64mi32, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB64mi8, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB64mr, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB8mi, X86_INS_SUB: sub{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB8mr, X86_INS_SUB: sub{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR16mi, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR16mi8, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR16mr, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR32mi, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR32mi8, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR32mr, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR64mi32, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR64mi8, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR64mr, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR8mi, X86_INS_XOR: xor{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR8mr, X86_INS_XOR: xor{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LODSB, X86_INS_LODSB: lodsb al, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LODSL, X86_INS_LODSD: lods{l|d} {$src, %eax|eax, $src} */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LODSQ, X86_INS_LODSQ: lodsq rax, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LODSW, X86_INS_LODSW: lodsw ax, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LOOP, X86_INS_LOOP: loop $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LOOPE, X86_INS_LOOPE: loope $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_LOOPNE, X86_INS_LOOPNE: loopne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_LRETIL, X86_INS_RETF: {l}retf $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LRETIQ, X86_INS_RETFQ: {l}retfq $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LRETIW, X86_INS_RETF: {l}retf $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LRETL, X86_INS_RETF: {l}retf */ 0, { 0 } }, { /* X86_LRETQ, X86_INS_RETFQ: {l}retfq */ 0, { 0 } }, { /* X86_LRETW, X86_INS_RETF: {l}retf */ 0, { 0 } }, { /* X86_LSL16rm, X86_INS_LSL: lsl{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL16rr, X86_INS_LSL: lsl{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL32rm, X86_INS_LSL: lsl{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL32rr, X86_INS_LSL: lsl{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL64rm, X86_INS_LSL: lsl{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL64rr, X86_INS_LSL: lsl{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSS16rm, X86_INS_LSS: lss{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSS32rm, X86_INS_LSS: lss{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSS64rm, X86_INS_LSS: lss{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LTRm, X86_INS_LTR: ltr{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LTRr, X86_INS_LTR: ltr{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LXADD16, X86_INS_XADD: xadd{w} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LXADD32, X86_INS_XADD: xadd{l} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LXADD64, X86_INS_XADD: xadd{q} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LXADD8, X86_INS_XADD: xadd{b} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LZCNT16rm, X86_INS_LZCNT: lzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT16rr, X86_INS_LZCNT: lzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT32rm, X86_INS_LZCNT: lzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT32rr, X86_INS_LZCNT: lzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT64rm, X86_INS_LZCNT: lzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT64rr, X86_INS_LZCNT: lzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MASKMOVDQU, X86_INS_MASKMOVDQU: maskmovdqu $src, $mask */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MASKMOVDQU64, X86_INS_MASKMOVDQU: maskmovdqu $src, $mask */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MAXCPDrm, X86_INS_MAXPD: maxpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCPDrr, X86_INS_MAXPD: maxpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCPSrm, X86_INS_MAXPS: maxps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCPSrr, X86_INS_MAXPS: maxps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCSDrm, X86_INS_MAXSD: maxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCSDrr, X86_INS_MAXSD: maxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCSSrm, X86_INS_MAXSS: maxss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXCSSrr, X86_INS_MAXSS: maxss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXPDrm, X86_INS_MAXPD: maxpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXPDrr, X86_INS_MAXPD: maxpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXPSrm, X86_INS_MAXPS: maxps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXPSrr, X86_INS_MAXPS: maxps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXSDrm, X86_INS_MAXSD: maxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXSDrm_Int, X86_INS_MAXSD: maxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MAXSDrr, X86_INS_MAXSD: maxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXSDrr_Int, X86_INS_MAXSD: maxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXSSrm, X86_INS_MAXSS: maxss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXSSrm_Int, X86_INS_MAXSS: maxss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MAXSSrr, X86_INS_MAXSS: maxss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MAXSSrr_Int, X86_INS_MAXSS: maxss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MFENCE, X86_INS_MFENCE: mfence */ 0, { 0 } }, { /* X86_MINCPDrm, X86_INS_MINPD: minpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCPDrr, X86_INS_MINPD: minpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCPSrm, X86_INS_MINPS: minps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCPSrr, X86_INS_MINPS: minps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCSDrm, X86_INS_MINSD: minsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCSDrr, X86_INS_MINSD: minsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCSSrm, X86_INS_MINSS: minss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINCSSrr, X86_INS_MINSS: minss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINPDrm, X86_INS_MINPD: minpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINPDrr, X86_INS_MINPD: minpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINPSrm, X86_INS_MINPS: minps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINPSrr, X86_INS_MINPS: minps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINSDrm, X86_INS_MINSD: minsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINSDrm_Int, X86_INS_MINSD: minsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MINSDrr, X86_INS_MINSD: minsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINSDrr_Int, X86_INS_MINSD: minsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINSSrm, X86_INS_MINSS: minss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINSSrm_Int, X86_INS_MINSS: minss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MINSSrr, X86_INS_MINSS: minss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MINSSrr_Int, X86_INS_MINSS: minss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPD2PIirm, X86_INS_CVTPD2PI: cvtpd2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPD2PIirr, X86_INS_CVTPD2PI: cvtpd2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPI2PDirm, X86_INS_CVTPI2PD: cvtpi2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPI2PDirr, X86_INS_CVTPI2PD: cvtpi2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPI2PSirm, X86_INS_CVTPI2PS: cvtpi2ps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPI2PSirr, X86_INS_CVTPI2PS: cvtpi2ps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPS2PIirm, X86_INS_CVTPS2PI: cvtps2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTPS2PIirr, X86_INS_CVTPS2PI: cvtps2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTTPD2PIirm, X86_INS_CVTTPD2PI: cvttpd2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTTPD2PIirr, X86_INS_CVTTPD2PI: cvttpd2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTTPS2PIirm, X86_INS_CVTTPS2PI: cvttps2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_CVTTPS2PIirr, X86_INS_CVTTPS2PI: cvttps2pi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_EMMS, X86_INS_EMMS: emms */ 0, { 0 } }, { /* X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ: maskmovq $src, $mask */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ: maskmovq $src, $mask */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64from64rm, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64from64rr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64grr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64mr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64rm, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64rr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64to64rm, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVD64to64rr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVDQ2Qrr, X86_INS_MOVDQ2Q: movdq2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVFR642Qrr, X86_INS_MOVDQ2Q: movdq2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVNTQmr, X86_INS_MOVNTQ: movntq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MMX_MOVQ2DQrr, X86_INS_MOVQ2DQ: movq2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVQ2FR64rr, X86_INS_MOVQ2DQ: movq2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVQ64mr, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MMX_MOVQ64rm, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVQ64rr, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_MOVQ64rr_REV, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PABSBrm64, X86_INS_PABSB: pabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PABSBrr64, X86_INS_PABSB: pabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PABSDrm64, X86_INS_PABSD: pabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PABSDrr64, X86_INS_PABSD: pabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PABSWrm64, X86_INS_PABSW: pabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PABSWrr64, X86_INS_PABSW: pabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PACKSSDWirm, X86_INS_PACKSSDW: packssdw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PACKSSDWirr, X86_INS_PACKSSDW: packssdw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PACKSSWBirm, X86_INS_PACKSSWB: packsswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PACKSSWBirr, X86_INS_PACKSSWB: packsswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PACKUSWBirm, X86_INS_PACKUSWB: packuswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PACKUSWBirr, X86_INS_PACKUSWB: packuswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDBirm, X86_INS_PADDB: paddb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDBirr, X86_INS_PADDB: paddb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDDirm, X86_INS_PADDD: paddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDDirr, X86_INS_PADDD: paddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDQirm, X86_INS_PADDQ: paddq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDQirr, X86_INS_PADDQ: paddq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDSBirm, X86_INS_PADDSB: paddsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDSBirr, X86_INS_PADDSB: paddsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDSWirm, X86_INS_PADDSW: paddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDSWirr, X86_INS_PADDSW: paddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDUSBirm, X86_INS_PADDUSB: paddusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDUSBirr, X86_INS_PADDUSB: paddusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDUSWirm, X86_INS_PADDUSW: paddusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDUSWirr, X86_INS_PADDUSW: paddusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDWirm, X86_INS_PADDW: paddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PADDWirr, X86_INS_PADDW: paddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PALIGNR64irm, X86_INS_PALIGNR: palignr $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PALIGNR64irr, X86_INS_PALIGNR: palignr $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PANDNirm, X86_INS_PANDN: pandn $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PANDNirr, X86_INS_PANDN: pandn $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PANDirm, X86_INS_PAND: pand $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PANDirr, X86_INS_PAND: pand $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PAVGBirm, X86_INS_PAVGB: pavgb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PAVGBirr, X86_INS_PAVGB: pavgb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PAVGWirm, X86_INS_PAVGW: pavgw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PAVGWirr, X86_INS_PAVGW: pavgw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPEQBirm, X86_INS_PCMPEQB: pcmpeqb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPEQBirr, X86_INS_PCMPEQB: pcmpeqb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPEQDirm, X86_INS_PCMPEQD: pcmpeqd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPEQDirr, X86_INS_PCMPEQD: pcmpeqd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPEQWirm, X86_INS_PCMPEQW: pcmpeqw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPEQWirr, X86_INS_PCMPEQW: pcmpeqw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPGTBirm, X86_INS_PCMPGTB: pcmpgtb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPGTBirr, X86_INS_PCMPGTB: pcmpgtb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPGTDirm, X86_INS_PCMPGTD: pcmpgtd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPGTDirr, X86_INS_PCMPGTD: pcmpgtd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPGTWirm, X86_INS_PCMPGTW: pcmpgtw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PCMPGTWirr, X86_INS_PCMPGTW: pcmpgtw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PEXTRWirri, X86_INS_PEXTRW: pextrw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PHADDSWrm64, X86_INS_PHADDSW: phaddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHADDSWrr64, X86_INS_PHADDSW: phaddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHADDWrm64, X86_INS_PHADDW: phaddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHADDWrr64, X86_INS_PHADDW: phaddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHADDrm64, X86_INS_PHADDD: phaddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHADDrr64, X86_INS_PHADDD: phaddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHSUBDrm64, X86_INS_PHSUBD: phsubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHSUBDrr64, X86_INS_PHSUBD: phsubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHSUBSWrm64, X86_INS_PHSUBSW: phsubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHSUBSWrr64, X86_INS_PHSUBSW: phsubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHSUBWrm64, X86_INS_PHSUBW: phsubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PHSUBWrr64, X86_INS_PHSUBW: phsubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PINSRWirmi, X86_INS_PINSRW: pinsrw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PINSRWirri, X86_INS_PINSRW: pinsrw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PMADDUBSWrm64, X86_INS_PMADDUBSW: pmaddubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMADDUBSWrr64, X86_INS_PMADDUBSW: pmaddubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMADDWDirm, X86_INS_PMADDWD: pmaddwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMADDWDirr, X86_INS_PMADDWD: pmaddwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMAXSWirm, X86_INS_PMAXSW: pmaxsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMAXSWirr, X86_INS_PMAXSW: pmaxsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMAXUBirm, X86_INS_PMAXUB: pmaxub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMAXUBirr, X86_INS_PMAXUB: pmaxub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMINSWirm, X86_INS_PMINSW: pminsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMINSWirr, X86_INS_PMINSW: pminsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMINUBirm, X86_INS_PMINUB: pminub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMINUBirr, X86_INS_PMINUB: pminub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMOVMSKBrr, X86_INS_PMOVMSKB: pmovmskb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULHRSWrm64, X86_INS_PMULHRSW: pmulhrsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULHRSWrr64, X86_INS_PMULHRSW: pmulhrsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULHUWirm, X86_INS_PMULHUW: pmulhuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULHUWirr, X86_INS_PMULHUW: pmulhuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULHWirm, X86_INS_PMULHW: pmulhw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULHWirr, X86_INS_PMULHW: pmulhw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULLWirm, X86_INS_PMULLW: pmullw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULLWirr, X86_INS_PMULLW: pmullw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULUDQirm, X86_INS_PMULUDQ: pmuludq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PMULUDQirr, X86_INS_PMULUDQ: pmuludq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PORirm, X86_INS_POR: por $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PORirr, X86_INS_POR: por $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSADBWirm, X86_INS_PSADBW: psadbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSADBWirr, X86_INS_PSADBW: psadbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSHUFBrm64, X86_INS_PSHUFB: pshufb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSHUFBrr64, X86_INS_PSHUFB: pshufb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSHUFWmi, X86_INS_PSHUFW: pshufw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSHUFWri, X86_INS_PSHUFW: pshufw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSIGNBrm64, X86_INS_PSIGNB: psignb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSIGNBrr64, X86_INS_PSIGNB: psignb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSIGNDrm64, X86_INS_PSIGND: psignd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSIGNDrr64, X86_INS_PSIGND: psignd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSIGNWrm64, X86_INS_PSIGNW: psignw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSIGNWrr64, X86_INS_PSIGNW: psignw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSLLDri, X86_INS_PSLLD: pslld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSLLDrm, X86_INS_PSLLD: pslld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSLLDrr, X86_INS_PSLLD: pslld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSLLQri, X86_INS_PSLLQ: psllq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSLLQrm, X86_INS_PSLLQ: psllq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSLLQrr, X86_INS_PSLLQ: psllq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSLLWri, X86_INS_PSLLW: psllw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSLLWrm, X86_INS_PSLLW: psllw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSLLWrr, X86_INS_PSLLW: psllw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRADri, X86_INS_PSRAD: psrad $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSRADrm, X86_INS_PSRAD: psrad $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRADrr, X86_INS_PSRAD: psrad $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRAWri, X86_INS_PSRAW: psraw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSRAWrm, X86_INS_PSRAW: psraw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRAWrr, X86_INS_PSRAW: psraw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRLDri, X86_INS_PSRLD: psrld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSRLDrm, X86_INS_PSRLD: psrld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRLDrr, X86_INS_PSRLD: psrld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRLQri, X86_INS_PSRLQ: psrlq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSRLQrm, X86_INS_PSRLQ: psrlq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRLQrr, X86_INS_PSRLQ: psrlq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRLWri, X86_INS_PSRLW: psrlw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MMX_PSRLWrm, X86_INS_PSRLW: psrlw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSRLWrr, X86_INS_PSRLW: psrlw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBBirm, X86_INS_PSUBB: psubb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBBirr, X86_INS_PSUBB: psubb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBDirm, X86_INS_PSUBD: psubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBDirr, X86_INS_PSUBD: psubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBQirm, X86_INS_PSUBQ: psubq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBQirr, X86_INS_PSUBQ: psubq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBSBirm, X86_INS_PSUBSB: psubsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBSBirr, X86_INS_PSUBSB: psubsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBSWirm, X86_INS_PSUBSW: psubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBSWirr, X86_INS_PSUBSW: psubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBUSBirm, X86_INS_PSUBUSB: psubusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBUSBirr, X86_INS_PSUBUSB: psubusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBUSWirm, X86_INS_PSUBUSW: psubusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBUSWirr, X86_INS_PSUBUSW: psubusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBWirm, X86_INS_PSUBW: psubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PSUBWirr, X86_INS_PSUBW: psubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKHBWirm, X86_INS_PUNPCKHBW: punpckhbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKHBWirr, X86_INS_PUNPCKHBW: punpckhbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKHDQirm, X86_INS_PUNPCKHDQ: punpckhdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKHDQirr, X86_INS_PUNPCKHDQ: punpckhdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKHWDirm, X86_INS_PUNPCKHWD: punpckhwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKHWDirr, X86_INS_PUNPCKHWD: punpckhwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKLBWirm, X86_INS_PUNPCKLBW: punpcklbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKLBWirr, X86_INS_PUNPCKLBW: punpcklbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKLDQirm, X86_INS_PUNPCKLDQ: punpckldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKLDQirr, X86_INS_PUNPCKLDQ: punpckldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKLWDirm, X86_INS_PUNPCKLWD: punpcklwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PUNPCKLWDirr, X86_INS_PUNPCKLWD: punpcklwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PXORirm, X86_INS_PXOR: pxor $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MMX_PXORirr, X86_INS_PXOR: pxor $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MONITORrrr, X86_INS_MONITOR: monitor */ 0, { 0 } }, { /* X86_MONTMUL, X86_INS_MONTMUL: montmul */ 0, { 0 } }, { /* X86_MOV16ao16, X86_INS_MOV: mov{w} ax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ao32, X86_INS_MOV: mov{w} ax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ao64, X86_INS_MOVABS: movabs{w} ax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16mi, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV16mr, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ms, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16o16a, X86_INS_MOV: mov{w} $dst, ax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16o32a, X86_INS_MOV: mov{w} $dst, ax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16o64a, X86_INS_MOVABS: movabs{w} $dst, ax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ri, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV16ri_alt, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV16rm, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16rr, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16rr_REV, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16rs, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16sm, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16sr, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ao16, X86_INS_MOV: mov{l} eax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ao32, X86_INS_MOV: mov{l} eax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ao64, X86_INS_MOVABS: movabs{l} eax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32cr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32dr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32mi, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV32mr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ms, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32o16a, X86_INS_MOV: mov{l} $dst, eax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32o32a, X86_INS_MOV: mov{l} $dst, eax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32o64a, X86_INS_MOVABS: movabs{l} $dst, eax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rc, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rd, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ri, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV32ri_alt, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV32rm, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rr_REV, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rs, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32sm, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32sr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ao32, X86_INS_MOV: mov{q} rax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ao64, X86_INS_MOVABS: movabs{q} rax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64cr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64dr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64mi32, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV64mr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ms, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64o32a, X86_INS_MOV: mov{q} $dst, rax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64o64a, X86_INS_MOVABS: movabs{q} $dst, rax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rc, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rd, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ri, X86_INS_MOVABS: movabs{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV64ri32, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV64rm, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rr_REV, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rs, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64sm, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64sr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64toPQIrm, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64toPQIrr, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64toSDrm, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64toSDrr, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ao16, X86_INS_MOV: mov{b} al, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ao32, X86_INS_MOV: mov{b} al, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ao64, X86_INS_MOVABS: movabs{b} al, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8mi, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV8mr, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8mr_NOREX, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8o16a, X86_INS_MOV: mov{b} $dst, al */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8o32a, X86_INS_MOV: mov{b} $dst, al */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8o64a, X86_INS_MOVABS: movabs{b} $dst, al */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ri, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV8ri_alt, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV8rm, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rm_NOREX, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rr, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rr_NOREX, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rr_REV, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPDmr, X86_INS_MOVAPD: movapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPDrm, X86_INS_MOVAPD: movapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPDrr, X86_INS_MOVAPD: movapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPDrr_REV, X86_INS_MOVAPD: movapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPSmr, X86_INS_MOVAPS: movaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPSrm, X86_INS_MOVAPS: movaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPSrr, X86_INS_MOVAPS: movaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVAPSrr_REV, X86_INS_MOVAPS: movaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVBE16mr, X86_INS_MOVBE: movbe{w} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVBE16rm, X86_INS_MOVBE: movbe{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVBE32mr, X86_INS_MOVBE: movbe{l} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVBE32rm, X86_INS_MOVBE: movbe{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVBE64mr, X86_INS_MOVBE: movbe{q} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVBE64rm, X86_INS_MOVBE: movbe{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDDUPrm, X86_INS_MOVDDUP: movddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDDUPrr, X86_INS_MOVDDUP: movddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDI2PDIrm, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDI2PDIrr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDI2SSrm, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDI2SSrr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQAmr, X86_INS_MOVDQA: movdqa $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVDQArm, X86_INS_MOVDQA: movdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQArr, X86_INS_MOVDQA: movdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQArr_REV, X86_INS_MOVDQA: movdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQUmr, X86_INS_MOVDQU: movdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQUrm, X86_INS_MOVDQU: movdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQUrr, X86_INS_MOVDQU: movdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVDQUrr_REV, X86_INS_MOVDQU: movdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVHLPSrr, X86_INS_MOVHLPS: movhlps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVHPDmr, X86_INS_MOVHPD: movhpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVHPDrm, X86_INS_MOVHPD: movhpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVHPSmr, X86_INS_MOVHPS: movhps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVHPSrm, X86_INS_MOVHPS: movhps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVLHPSrr, X86_INS_MOVLHPS: movlhps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVLPDmr, X86_INS_MOVLPD: movlpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVLPDrm, X86_INS_MOVLPD: movlpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVLPSmr, X86_INS_MOVLPS: movlps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVLPSrm, X86_INS_MOVLPS: movlps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVMSKPDrr, X86_INS_MOVMSKPD: movmskpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVMSKPSrr, X86_INS_MOVMSKPS: movmskps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVNTDQArm, X86_INS_MOVNTDQA: movntdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVNTDQmr, X86_INS_MOVNTDQ: movntdq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVNTI_64mr, X86_INS_MOVNTI: movnti{q} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVNTImr, X86_INS_MOVNTI: movnti{l} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVNTPDmr, X86_INS_MOVNTPD: movntpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVNTPSmr, X86_INS_MOVNTPS: movntps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVNTSD, X86_INS_MOVNTSD: movntsd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVNTSS, X86_INS_MOVNTSS: movntss $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVPDI2DImr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVPDI2DIrr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVPQI2QImr, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVPQI2QIrr, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVPQIto64rm, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVPQIto64rr, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVQI2PQIrm, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSB, X86_INS_MOVSB: movsb $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSDmr, X86_INS_MOVSD: movsd $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSDrm, X86_INS_MOVSD: movsd $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSDrr, X86_INS_MOVSD: movsd $dst, $src2 */ X86_EFLAGS_TEST_DF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSDrr_REV, X86_INS_MOVSD: movsd $dst, $src2 */ X86_EFLAGS_TEST_DF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSDto64mr, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVSDto64rr, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSHDUPrm, X86_INS_MOVSHDUP: movshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSHDUPrr, X86_INS_MOVSHDUP: movshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSL, X86_INS_MOVSD: movs{l|d} {$src, $dst|$dst, $src} */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSLDUPrm, X86_INS_MOVSLDUP: movsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSLDUPrr, X86_INS_MOVSLDUP: movsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSQ, X86_INS_MOVSQ: movsq $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSS2DImr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVSS2DIrr, X86_INS_MOVD: movd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSSmr, X86_INS_MOVSS: movss $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSSrm, X86_INS_MOVSS: movss $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSSrr, X86_INS_MOVSS: movss $dst, $src2 */ X86_EFLAGS_TEST_DF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSSrr_REV, X86_INS_MOVSS: movss $dst, $src2 */ X86_EFLAGS_TEST_DF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSW, X86_INS_MOVSW: movsw $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX16rm8, X86_INS_MOVSX: movs{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX16rr8, X86_INS_MOVSX: movs{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32_NOREXrm8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32_NOREXrr8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rm16, X86_INS_MOVSX: movs{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rm8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rr16, X86_INS_MOVSX: movs{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rr8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm16, X86_INS_MOVSX: movs{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm32, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm32_alt, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm8, X86_INS_MOVSX: movs{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rr16, X86_INS_MOVSX: movs{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rr32, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rr8, X86_INS_MOVSX: movs{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVUPDmr, X86_INS_MOVUPD: movupd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVUPDrm, X86_INS_MOVUPD: movupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVUPDrr, X86_INS_MOVUPD: movupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVUPDrr_REV, X86_INS_MOVUPD: movupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVUPSmr, X86_INS_MOVUPS: movups $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVUPSrm, X86_INS_MOVUPS: movups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVUPSrr, X86_INS_MOVUPS: movups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVUPSrr_REV, X86_INS_MOVUPS: movups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZPQILo2PQIrm, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZPQILo2PQIrr, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZQI2PQIrm, X86_INS_MOVQ: movq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZQI2PQIrr, X86_INS_MOVQ: mov{d|q} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX16rm8, X86_INS_MOVZX: movz{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX16rr8, X86_INS_MOVZX: movz{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32_NOREXrm8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32_NOREXrr8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rm16, X86_INS_MOVZX: movz{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rm8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rr16, X86_INS_MOVZX: movz{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rr8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rm16_Q, X86_INS_MOVZX: movz{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rm8_Q, X86_INS_MOVZX: movz{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rr16_Q, X86_INS_MOVZX: movz{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rr8_Q, X86_INS_MOVZX: movz{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MPSADBWrmi, X86_INS_MPSADBW: mpsadbw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MPSADBWrri, X86_INS_MPSADBW: mpsadbw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_MUL16m, X86_INS_MUL: mul{w} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL16r, X86_INS_MUL: mul{w} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL32m, X86_INS_MUL: mul{l} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL32r, X86_INS_MUL: mul{l} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL64m, X86_INS_MUL: mul{q} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL64r, X86_INS_MUL: mul{q} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL8m, X86_INS_MUL: mul{b} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL8r, X86_INS_MUL: mul{b} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MULPDrm, X86_INS_MULPD: mulpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULPDrr, X86_INS_MULPD: mulpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULPSrm, X86_INS_MULPS: mulps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULPSrr, X86_INS_MULPS: mulps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULSDrm, X86_INS_MULSD: mulsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULSDrm_Int, X86_INS_MULSD: mulsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MULSDrr, X86_INS_MULSD: mulsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULSDrr_Int, X86_INS_MULSD: mulsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULSSrm, X86_INS_MULSS: mulss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULSSrm_Int, X86_INS_MULSS: mulss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MULSSrr, X86_INS_MULSS: mulss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULSSrr_Int, X86_INS_MULSS: mulss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX32rm, X86_INS_MULX: mulx{l} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX32rr, X86_INS_MULX: mulx{l} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX64rm, X86_INS_MULX: mulx{q} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX64rr, X86_INS_MULX: mulx{q} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MUL_F32m, X86_INS_FMUL: fmul{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_MUL_F64m, X86_INS_FMUL: fmul{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_MUL_FI16m, X86_INS_FIMUL: fimul{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_MUL_FI32m, X86_INS_FIMUL: fimul{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_MUL_FPrST0, X86_INS_FMULP: fmulp $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_MUL_FST0r, X86_INS_FMUL: fmul $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_MUL_FrST0, X86_INS_FMUL: fmul $op, st(0) */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MWAITrr, X86_INS_MWAIT: mwait */ 0, { 0 } }, { /* X86_NEG16m, X86_INS_NEG: neg{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG16r, X86_INS_NEG: neg{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG32m, X86_INS_NEG: neg{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG32r, X86_INS_NEG: neg{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG64m, X86_INS_NEG: neg{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG64r, X86_INS_NEG: neg{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG8m, X86_INS_NEG: neg{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG8r, X86_INS_NEG: neg{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOOP, X86_INS_NOP: nop */ 0, { 0 } }, { /* X86_NOOP18_16m4, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16m5, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16m6, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16m7, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r4, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r5, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r6, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r7, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m4, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m5, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m6, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m7, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r4, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r5, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r6, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r7, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP19rr, X86_INS_NOP: nop $src, $val */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_NOOPL, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_19, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1a, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1b, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1c, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1d, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1e, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_19, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1a, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1b, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1c, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1d, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1e, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOT16m, X86_INS_NOT: not{w} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT16r, X86_INS_NOT: not{w} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT32m, X86_INS_NOT: not{l} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT32r, X86_INS_NOT: not{l} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT64m, X86_INS_NOT: not{q} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT64r, X86_INS_NOT: not{q} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT8m, X86_INS_NOT: not{b} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT8r, X86_INS_NOT: not{b} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_OR16i16, X86_INS_OR: or{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16mi, X86_INS_OR: or{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16mi8, X86_INS_OR: or{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16mr, X86_INS_OR: or{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR16ri, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16ri8, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16rm, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR16rr, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR16rr_REV, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32i32, X86_INS_OR: or{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32mi, X86_INS_OR: or{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32mi8, X86_INS_OR: or{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32mr, X86_INS_OR: or{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32mrLocked, X86_INS_OR: or{l} $dst, $zero */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OR32ri, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32ri8, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32rm, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32rr, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32rr_REV, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64i32, X86_INS_OR: or{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64mi32, X86_INS_OR: or{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64mi8, X86_INS_OR: or{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64mr, X86_INS_OR: or{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64ri32, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64ri8, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64rm, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64rr, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64rr_REV, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8i8, X86_INS_OR: or{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8mi, X86_INS_OR: or{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8mi8, X86_INS_OR: or{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8mr, X86_INS_OR: or{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8ri, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8ri8, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8rm, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8rr, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8rr_REV, X86_INS_OR: or{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ORPDrm, X86_INS_ORPD: orpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ORPDrr, X86_INS_ORPD: orpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ORPSrm, X86_INS_ORPS: orps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ORPSrr, X86_INS_ORPS: orps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OUT16ir, X86_INS_OUT: out{w} $port, ax */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_OUT16rr, X86_INS_OUT: out{w} dx, ax */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OUT32ir, X86_INS_OUT: out{l} $port, eax */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_OUT32rr, X86_INS_OUT: out{l} dx, eax */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OUT8ir, X86_INS_OUT: out{b} $port, al */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_OUT8rr, X86_INS_OUT: out{b} dx, al */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OUTSB, X86_INS_OUTSB: outsb dx, $src */ X86_EFLAGS_TEST_DF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_OUTSL, X86_INS_OUTSD: outs{l|d} {$src, %dx|dx, $src} */ X86_EFLAGS_TEST_DF, { CS_AC_IGNORE, 0 } }, { /* X86_OUTSW, X86_INS_OUTSW: outsw dx, $src */ X86_EFLAGS_TEST_DF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PABSBrm128, X86_INS_PABSB: pabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PABSBrr128, X86_INS_PABSB: pabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PABSDrm128, X86_INS_PABSD: pabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PABSDrr128, X86_INS_PABSD: pabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PABSWrm128, X86_INS_PABSW: pabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PABSWrr128, X86_INS_PABSW: pabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKSSDWrm, X86_INS_PACKSSDW: packssdw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKSSDWrr, X86_INS_PACKSSDW: packssdw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKSSWBrm, X86_INS_PACKSSWB: packsswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKSSWBrr, X86_INS_PACKSSWB: packsswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKUSDWrm, X86_INS_PACKUSDW: packusdw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKUSDWrr, X86_INS_PACKUSDW: packusdw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKUSWBrm, X86_INS_PACKUSWB: packuswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PACKUSWBrr, X86_INS_PACKUSWB: packuswb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDBrm, X86_INS_PADDB: paddb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDBrr, X86_INS_PADDB: paddb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDDrm, X86_INS_PADDD: paddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDDrr, X86_INS_PADDD: paddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDQrm, X86_INS_PADDQ: paddq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDQrr, X86_INS_PADDQ: paddq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDSBrm, X86_INS_PADDSB: paddsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDSBrr, X86_INS_PADDSB: paddsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDSWrm, X86_INS_PADDSW: paddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDSWrr, X86_INS_PADDSW: paddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDUSBrm, X86_INS_PADDUSB: paddusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDUSBrr, X86_INS_PADDUSB: paddusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDUSWrm, X86_INS_PADDUSW: paddusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDUSWrr, X86_INS_PADDUSW: paddusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDWrm, X86_INS_PADDW: paddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PADDWrr, X86_INS_PADDW: paddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PALIGNR128rm, X86_INS_PALIGNR: palignr $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PALIGNR128rr, X86_INS_PALIGNR: palignr $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PANDNrm, X86_INS_PANDN: pandn $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PANDNrr, X86_INS_PANDN: pandn $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PANDrm, X86_INS_PAND: pand $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PANDrr, X86_INS_PAND: pand $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PAUSE, X86_INS_PAUSE: pause */ 0, { 0 } }, { /* X86_PAVGBrm, X86_INS_PAVGB: pavgb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PAVGBrr, X86_INS_PAVGB: pavgb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PAVGUSBrm, X86_INS_PAVGUSB: pavgusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PAVGUSBrr, X86_INS_PAVGUSB: pavgusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PAVGWrm, X86_INS_PAVGW: pavgw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PAVGWrr, X86_INS_PAVGW: pavgw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PBLENDVBrm0, X86_INS_PBLENDVB: pblendvb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PBLENDVBrr0, X86_INS_PBLENDVB: pblendvb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PBLENDWrmi, X86_INS_PBLENDW: pblendw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PBLENDWrri, X86_INS_PBLENDW: pblendw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCLMULQDQrm, X86_INS_PCLMULQDQ: pclmulqdq $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCLMULQDQrr, X86_INS_PCLMULQDQ: pclmulqdq $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPEQBrm, X86_INS_PCMPEQB: pcmpeqb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQBrr, X86_INS_PCMPEQB: pcmpeqb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQDrm, X86_INS_PCMPEQD: pcmpeqd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQDrr, X86_INS_PCMPEQD: pcmpeqd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQQrm, X86_INS_PCMPEQQ: pcmpeqq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQQrr, X86_INS_PCMPEQQ: pcmpeqq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQWrm, X86_INS_PCMPEQW: pcmpeqw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPEQWrr, X86_INS_PCMPEQW: pcmpeqw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPESTRIrm, X86_INS_PCMPESTRI: pcmpestri $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPESTRIrr, X86_INS_PCMPESTRI: pcmpestri $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPESTRM128rm, X86_INS_PCMPESTRM: pcmpestrm $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPESTRM128rr, X86_INS_PCMPESTRM: pcmpestrm $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPGTBrm, X86_INS_PCMPGTB: pcmpgtb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTBrr, X86_INS_PCMPGTB: pcmpgtb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTDrm, X86_INS_PCMPGTD: pcmpgtd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTDrr, X86_INS_PCMPGTD: pcmpgtd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTQrm, X86_INS_PCMPGTQ: pcmpgtq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTQrr, X86_INS_PCMPGTQ: pcmpgtq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTWrm, X86_INS_PCMPGTW: pcmpgtw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPGTWrr, X86_INS_PCMPGTW: pcmpgtw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PCMPISTRIrm, X86_INS_PCMPISTRI: pcmpistri $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPISTRIrr, X86_INS_PCMPISTRI: pcmpistri $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPISTRM128rm, X86_INS_PCMPISTRM: pcmpistrm $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCMPISTRM128rr, X86_INS_PCMPISTRM: pcmpistrm $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCOMMIT, X86_INS_PCOMMIT: pcommit */ 0, { 0 } }, { /* X86_PDEP32rm, X86_INS_PDEP: pdep{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PDEP32rr, X86_INS_PDEP: pdep{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PDEP64rm, X86_INS_PDEP: pdep{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PDEP64rr, X86_INS_PDEP: pdep{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT32rm, X86_INS_PEXT: pext{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT32rr, X86_INS_PEXT: pext{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT64rm, X86_INS_PEXT: pext{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT64rr, X86_INS_PEXT: pext{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXTRBmr, X86_INS_PEXTRB: pextrb $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRBrr, X86_INS_PEXTRB: pextrb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRDmr, X86_INS_PEXTRD: pextrd $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRDrr, X86_INS_PEXTRD: pextrd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRQmr, X86_INS_PEXTRQ: pextrq $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRQrr, X86_INS_PEXTRQ: pextrq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRWmr, X86_INS_PEXTRW: pextrw $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRWri, X86_INS_PEXTRW: pextrw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PEXTRWrr_REV, X86_INS_PEXTRW: pextrw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PF2IDrm, X86_INS_PF2ID: pf2id $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PF2IDrr, X86_INS_PF2ID: pf2id $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PF2IWrm, X86_INS_PF2IW: pf2iw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PF2IWrr, X86_INS_PF2IW: pf2iw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFACCrm, X86_INS_PFACC: pfacc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFACCrr, X86_INS_PFACC: pfacc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFADDrm, X86_INS_PFADD: pfadd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFADDrr, X86_INS_PFADD: pfadd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFCMPEQrm, X86_INS_PFCMPEQ: pfcmpeq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFCMPEQrr, X86_INS_PFCMPEQ: pfcmpeq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFCMPGErm, X86_INS_PFCMPGE: pfcmpge $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFCMPGErr, X86_INS_PFCMPGE: pfcmpge $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFCMPGTrm, X86_INS_PFCMPGT: pfcmpgt $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFCMPGTrr, X86_INS_PFCMPGT: pfcmpgt $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFMAXrm, X86_INS_PFMAX: pfmax $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFMAXrr, X86_INS_PFMAX: pfmax $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFMINrm, X86_INS_PFMIN: pfmin $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFMINrr, X86_INS_PFMIN: pfmin $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFMULrm, X86_INS_PFMUL: pfmul $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFMULrr, X86_INS_PFMUL: pfmul $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFNACCrm, X86_INS_PFNACC: pfnacc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFNACCrr, X86_INS_PFNACC: pfnacc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFPNACCrm, X86_INS_PFPNACC: pfpnacc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFPNACCrr, X86_INS_PFPNACC: pfpnacc $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRCPIT1rm, X86_INS_PFRCPIT1: pfrcpit1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRCPIT1rr, X86_INS_PFRCPIT1: pfrcpit1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRCPIT2rm, X86_INS_PFRCPIT2: pfrcpit2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRCPIT2rr, X86_INS_PFRCPIT2: pfrcpit2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRCPrm, X86_INS_PFRCP: pfrcp $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRCPrr, X86_INS_PFRCP: pfrcp $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRSQIT1rm, X86_INS_PFRSQIT1: pfrsqit1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRSQIT1rr, X86_INS_PFRSQIT1: pfrsqit1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRSQRTrm, X86_INS_PFRSQRT: pfrsqrt $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFRSQRTrr, X86_INS_PFRSQRT: pfrsqrt $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFSUBRrm, X86_INS_PFSUBR: pfsubr $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFSUBRrr, X86_INS_PFSUBR: pfsubr $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFSUBrm, X86_INS_PFSUB: pfsub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PFSUBrr, X86_INS_PFSUB: pfsub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHADDDrm, X86_INS_PHADDD: phaddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHADDDrr, X86_INS_PHADDD: phaddd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHADDSWrm128, X86_INS_PHADDSW: phaddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHADDSWrr128, X86_INS_PHADDSW: phaddsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHADDWrm, X86_INS_PHADDW: phaddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHADDWrr, X86_INS_PHADDW: phaddw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHMINPOSUWrm128, X86_INS_PHMINPOSUW: phminposuw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHMINPOSUWrr128, X86_INS_PHMINPOSUW: phminposuw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHSUBDrm, X86_INS_PHSUBD: phsubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHSUBDrr, X86_INS_PHSUBD: phsubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHSUBSWrm128, X86_INS_PHSUBSW: phsubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHSUBSWrr128, X86_INS_PHSUBSW: phsubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHSUBWrm, X86_INS_PHSUBW: phsubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PHSUBWrr, X86_INS_PHSUBW: phsubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PI2FDrm, X86_INS_PI2FD: pi2fd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PI2FDrr, X86_INS_PI2FD: pi2fd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PI2FWrm, X86_INS_PI2FW: pi2fw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PI2FWrr, X86_INS_PI2FW: pi2fw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PINSRBrm, X86_INS_PINSRB: pinsrb $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRBrr, X86_INS_PINSRB: pinsrb $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRDrm, X86_INS_PINSRD: pinsrd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRDrr, X86_INS_PINSRD: pinsrd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRQrm, X86_INS_PINSRQ: pinsrq $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRQrr, X86_INS_PINSRQ: pinsrq $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRWrmi, X86_INS_PINSRW: pinsrw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PINSRWrri, X86_INS_PINSRW: pinsrw $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PMADDUBSWrm128, X86_INS_PMADDUBSW: pmaddubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMADDUBSWrr128, X86_INS_PMADDUBSW: pmaddubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMADDWDrm, X86_INS_PMADDWD: pmaddwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMADDWDrr, X86_INS_PMADDWD: pmaddwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXSBrm, X86_INS_PMAXSB: pmaxsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXSBrr, X86_INS_PMAXSB: pmaxsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXSDrm, X86_INS_PMAXSD: pmaxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXSDrr, X86_INS_PMAXSD: pmaxsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXSWrm, X86_INS_PMAXSW: pmaxsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXSWrr, X86_INS_PMAXSW: pmaxsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXUBrm, X86_INS_PMAXUB: pmaxub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXUBrr, X86_INS_PMAXUB: pmaxub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXUDrm, X86_INS_PMAXUD: pmaxud $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXUDrr, X86_INS_PMAXUD: pmaxud $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXUWrm, X86_INS_PMAXUW: pmaxuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMAXUWrr, X86_INS_PMAXUW: pmaxuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINSBrm, X86_INS_PMINSB: pminsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINSBrr, X86_INS_PMINSB: pminsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINSDrm, X86_INS_PMINSD: pminsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINSDrr, X86_INS_PMINSD: pminsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINSWrm, X86_INS_PMINSW: pminsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINSWrr, X86_INS_PMINSW: pminsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINUBrm, X86_INS_PMINUB: pminub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINUBrr, X86_INS_PMINUB: pminub $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINUDrm, X86_INS_PMINUD: pminud $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINUDrr, X86_INS_PMINUD: pminud $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINUWrm, X86_INS_PMINUW: pminuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMINUWrr, X86_INS_PMINUW: pminuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVMSKBrr, X86_INS_PMOVMSKB: pmovmskb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXBDrm, X86_INS_PMOVSXBD: pmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXBDrr, X86_INS_PMOVSXBD: pmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXBQrm, X86_INS_PMOVSXBQ: pmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXBQrr, X86_INS_PMOVSXBQ: pmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXBWrm, X86_INS_PMOVSXBW: pmovsxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXBWrr, X86_INS_PMOVSXBW: pmovsxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXDQrm, X86_INS_PMOVSXDQ: pmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXDQrr, X86_INS_PMOVSXDQ: pmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXWDrm, X86_INS_PMOVSXWD: pmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXWDrr, X86_INS_PMOVSXWD: pmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXWQrm, X86_INS_PMOVSXWQ: pmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVSXWQrr, X86_INS_PMOVSXWQ: pmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXBDrm, X86_INS_PMOVZXBD: pmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXBDrr, X86_INS_PMOVZXBD: pmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXBQrm, X86_INS_PMOVZXBQ: pmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXBQrr, X86_INS_PMOVZXBQ: pmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXBWrm, X86_INS_PMOVZXBW: pmovzxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXBWrr, X86_INS_PMOVZXBW: pmovzxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXDQrm, X86_INS_PMOVZXDQ: pmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXDQrr, X86_INS_PMOVZXDQ: pmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXWDrm, X86_INS_PMOVZXWD: pmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXWDrr, X86_INS_PMOVZXWD: pmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXWQrm, X86_INS_PMOVZXWQ: pmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMOVZXWQrr, X86_INS_PMOVZXWQ: pmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULDQrm, X86_INS_PMULDQ: pmuldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULDQrr, X86_INS_PMULDQ: pmuldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHRSWrm128, X86_INS_PMULHRSW: pmulhrsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHRSWrr128, X86_INS_PMULHRSW: pmulhrsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHRWrm, X86_INS_PMULHRW: pmulhrw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHRWrr, X86_INS_PMULHRW: pmulhrw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHUWrm, X86_INS_PMULHUW: pmulhuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHUWrr, X86_INS_PMULHUW: pmulhuw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHWrm, X86_INS_PMULHW: pmulhw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULHWrr, X86_INS_PMULHW: pmulhw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULLDrm, X86_INS_PMULLD: pmulld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULLDrr, X86_INS_PMULLD: pmulld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULLWrm, X86_INS_PMULLW: pmullw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULLWrr, X86_INS_PMULLW: pmullw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULUDQrm, X86_INS_PMULUDQ: pmuludq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PMULUDQrr, X86_INS_PMULUDQ: pmuludq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POP16r, X86_INS_POP: pop{w} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP16rmm, X86_INS_POP: pop{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP16rmr, X86_INS_POP: pop{w} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP32r, X86_INS_POP: pop{l} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP32rmm, X86_INS_POP: pop{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP32rmr, X86_INS_POP: pop{l} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP64r, X86_INS_POP: pop{q} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP64rmm, X86_INS_POP: pop{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP64rmr, X86_INS_POP: pop{q} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POPA16, X86_INS_POPAW: popaw */ 0, { 0 } }, { /* X86_POPA32, X86_INS_POPAL: popal */ 0, { 0 } }, { /* X86_POPCNT16rm, X86_INS_POPCNT: popcnt{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POPCNT16rr, X86_INS_POPCNT: popcnt{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POPCNT32rm, X86_INS_POPCNT: popcnt{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POPCNT32rr, X86_INS_POPCNT: popcnt{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POPCNT64rm, X86_INS_POPCNT: popcnt{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POPCNT64rr, X86_INS_POPCNT: popcnt{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_POPDS16, X86_INS_POP: pop{w} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPDS32, X86_INS_POP: pop{l} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPES16, X86_INS_POP: pop{w} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPES32, X86_INS_POP: pop{l} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPF16, X86_INS_POPF: popf{w} */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_POPF32, X86_INS_POPFD: popfd */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_POPF64, X86_INS_POPFQ: popfq */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_POPFS16, X86_INS_POP: pop{w} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPFS32, X86_INS_POP: pop{l} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPFS64, X86_INS_POP: pop{q} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPGS16, X86_INS_POP: pop{w} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPGS32, X86_INS_POP: pop{l} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPGS64, X86_INS_POP: pop{q} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPSS16, X86_INS_POP: pop{w} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPSS32, X86_INS_POP: pop{l} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PORrm, X86_INS_POR: por $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PORrr, X86_INS_POR: por $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PREFETCH, X86_INS_PREFETCH: prefetch $addr */ 0, { CS_AC_READ, 0 } }, { /* X86_PREFETCHNTA, X86_INS_PREFETCHNTA: prefetchnta $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PREFETCHT0, X86_INS_PREFETCHT0: prefetcht0 $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PREFETCHT1, X86_INS_PREFETCHT1: prefetcht1 $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PREFETCHT2, X86_INS_PREFETCHT2: prefetcht2 $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PREFETCHW, X86_INS_PREFETCHW: prefetchw $addr */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { CS_AC_READ, 0 } }, { /* X86_PSADBWrm, X86_INS_PSADBW: psadbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSADBWrr, X86_INS_PSADBW: psadbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSHUFBrm, X86_INS_PSHUFB: pshufb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSHUFBrr, X86_INS_PSHUFB: pshufb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSHUFDmi, X86_INS_PSHUFD: pshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PSHUFDri, X86_INS_PSHUFD: pshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PSHUFHWmi, X86_INS_PSHUFHW: pshufhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PSHUFHWri, X86_INS_PSHUFHW: pshufhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PSHUFLWmi, X86_INS_PSHUFLW: pshuflw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PSHUFLWri, X86_INS_PSHUFLW: pshuflw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PSIGNBrm, X86_INS_PSIGNB: psignb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSIGNBrr, X86_INS_PSIGNB: psignb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSIGNDrm, X86_INS_PSIGND: psignd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSIGNDrr, X86_INS_PSIGND: psignd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSIGNWrm, X86_INS_PSIGNW: psignw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSIGNWrr, X86_INS_PSIGNW: psignw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSLLDQri, X86_INS_PSLLDQ: pslldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSLLDri, X86_INS_PSLLD: pslld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSLLDrm, X86_INS_PSLLD: pslld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSLLDrr, X86_INS_PSLLD: pslld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSLLQri, X86_INS_PSLLQ: psllq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSLLQrm, X86_INS_PSLLQ: psllq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSLLQrr, X86_INS_PSLLQ: psllq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSLLWri, X86_INS_PSLLW: psllw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSLLWrm, X86_INS_PSLLW: psllw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSLLWrr, X86_INS_PSLLW: psllw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRADri, X86_INS_PSRAD: psrad $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSRADrm, X86_INS_PSRAD: psrad $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRADrr, X86_INS_PSRAD: psrad $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRAWri, X86_INS_PSRAW: psraw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSRAWrm, X86_INS_PSRAW: psraw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRAWrr, X86_INS_PSRAW: psraw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRLDQri, X86_INS_PSRLDQ: psrldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSRLDri, X86_INS_PSRLD: psrld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSRLDrm, X86_INS_PSRLD: psrld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRLDrr, X86_INS_PSRLD: psrld $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRLQri, X86_INS_PSRLQ: psrlq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSRLQrm, X86_INS_PSRLQ: psrlq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRLQrr, X86_INS_PSRLQ: psrlq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRLWri, X86_INS_PSRLW: psrlw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_PSRLWrm, X86_INS_PSRLW: psrlw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSRLWrr, X86_INS_PSRLW: psrlw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBBrm, X86_INS_PSUBB: psubb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBBrr, X86_INS_PSUBB: psubb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBDrm, X86_INS_PSUBD: psubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBDrr, X86_INS_PSUBD: psubd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBQrm, X86_INS_PSUBQ: psubq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBQrr, X86_INS_PSUBQ: psubq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBSBrm, X86_INS_PSUBSB: psubsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBSBrr, X86_INS_PSUBSB: psubsb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBSWrm, X86_INS_PSUBSW: psubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBSWrr, X86_INS_PSUBSW: psubsw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBUSBrm, X86_INS_PSUBUSB: psubusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBUSBrr, X86_INS_PSUBUSB: psubusb $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBUSWrm, X86_INS_PSUBUSW: psubusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBUSWrr, X86_INS_PSUBUSW: psubusw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBWrm, X86_INS_PSUBW: psubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSUBWrr, X86_INS_PSUBW: psubw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSWAPDrm, X86_INS_PSWAPD: pswapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PSWAPDrr, X86_INS_PSWAPD: pswapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PTESTrm, X86_INS_PTEST: ptest $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PTESTrr, X86_INS_PTEST: ptest $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PUNPCKHBWrm, X86_INS_PUNPCKHBW: punpckhbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHBWrr, X86_INS_PUNPCKHBW: punpckhbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHDQrm, X86_INS_PUNPCKHDQ: punpckhdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHDQrr, X86_INS_PUNPCKHDQ: punpckhdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHQDQrm, X86_INS_PUNPCKHQDQ: punpckhqdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHQDQrr, X86_INS_PUNPCKHQDQ: punpckhqdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHWDrm, X86_INS_PUNPCKHWD: punpckhwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKHWDrr, X86_INS_PUNPCKHWD: punpckhwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLBWrm, X86_INS_PUNPCKLBW: punpcklbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLBWrr, X86_INS_PUNPCKLBW: punpcklbw $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLDQrm, X86_INS_PUNPCKLDQ: punpckldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLDQrr, X86_INS_PUNPCKLDQ: punpckldq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLQDQrm, X86_INS_PUNPCKLQDQ: punpcklqdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLQDQrr, X86_INS_PUNPCKLQDQ: punpcklqdq $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLWDrm, X86_INS_PUNPCKLWD: punpcklwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUNPCKLWDrr, X86_INS_PUNPCKLWD: punpcklwd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PUSH16i8, X86_INS_PUSH: push{w} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH16r, X86_INS_PUSH: push{w} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH16rmm, X86_INS_PUSH: push{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH16rmr, X86_INS_PUSH: push{w} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH32i8, X86_INS_PUSH: push{l} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH32r, X86_INS_PUSH: push{l} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH32rmm, X86_INS_PUSH: push{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH32rmr, X86_INS_PUSH: push{l} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH64i16, X86_INS_PUSH: push{w} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH64i32, X86_INS_PUSH: push{q} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH64i8, X86_INS_PUSH: push{q} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH64r, X86_INS_PUSH: push{q} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH64rmm, X86_INS_PUSH: push{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH64rmr, X86_INS_PUSH: push{q} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSHA16, X86_INS_PUSHAW: pushaw */ 0, { 0 } }, { /* X86_PUSHA32, X86_INS_PUSHAL: pushal */ 0, { 0 } }, { /* X86_PUSHCS16, X86_INS_PUSH: push{w} cs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHCS32, X86_INS_PUSH: push{l} cs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHDS16, X86_INS_PUSH: push{w} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHDS32, X86_INS_PUSH: push{l} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHES16, X86_INS_PUSH: push{w} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHES32, X86_INS_PUSH: push{l} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHF16, X86_INS_PUSHF: pushf{w} */ 0, { 0 } }, { /* X86_PUSHF32, X86_INS_PUSHFD: pushfd */ 0, { 0 } }, { /* X86_PUSHF64, X86_INS_PUSHFQ: pushfq */ 0, { 0 } }, { /* X86_PUSHFS16, X86_INS_PUSH: push{w} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHFS32, X86_INS_PUSH: push{l} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHFS64, X86_INS_PUSH: push{q} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHGS16, X86_INS_PUSH: push{w} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHGS32, X86_INS_PUSH: push{l} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHGS64, X86_INS_PUSH: push{q} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHSS16, X86_INS_PUSH: push{w} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHSS32, X86_INS_PUSH: push{l} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHi16, X86_INS_PUSH: push{w} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHi32, X86_INS_PUSH: push{l} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PXORrm, X86_INS_PXOR: pxor $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_PXORrr, X86_INS_PXOR: pxor $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL16m1, X86_INS_RCL: rcl{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL16mCL, X86_INS_RCL: rcl{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL16mi, X86_INS_RCL: rcl{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL16r1, X86_INS_RCL: rcl{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL16rCL, X86_INS_RCL: rcl{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL16ri, X86_INS_RCL: rcl{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL32m1, X86_INS_RCL: rcl{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL32mCL, X86_INS_RCL: rcl{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL32mi, X86_INS_RCL: rcl{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL32r1, X86_INS_RCL: rcl{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL32rCL, X86_INS_RCL: rcl{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL32ri, X86_INS_RCL: rcl{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL64m1, X86_INS_RCL: rcl{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL64mCL, X86_INS_RCL: rcl{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL64mi, X86_INS_RCL: rcl{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL64r1, X86_INS_RCL: rcl{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL64rCL, X86_INS_RCL: rcl{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL64ri, X86_INS_RCL: rcl{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL8m1, X86_INS_RCL: rcl{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL8mCL, X86_INS_RCL: rcl{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL8mi, X86_INS_RCL: rcl{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL8r1, X86_INS_RCL: rcl{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL8rCL, X86_INS_RCL: rcl{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL8ri, X86_INS_RCL: rcl{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCPPSm, X86_INS_RCPPS: rcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCPPSm_Int, X86_INS_RCPPS: rcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCPPSr, X86_INS_RCPPS: rcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCPPSr_Int, X86_INS_RCPPS: rcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCPSSm, X86_INS_RCPSS: rcpss $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCPSSm_Int, X86_INS_RCPSS: rcpss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCPSSr, X86_INS_RCPSS: rcpss $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCPSSr_Int, X86_INS_RCPSS: rcpss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR16m1, X86_INS_RCR: rcr{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR16mCL, X86_INS_RCR: rcr{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR16mi, X86_INS_RCR: rcr{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR16r1, X86_INS_RCR: rcr{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR16rCL, X86_INS_RCR: rcr{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR16ri, X86_INS_RCR: rcr{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR32m1, X86_INS_RCR: rcr{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR32mCL, X86_INS_RCR: rcr{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR32mi, X86_INS_RCR: rcr{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR32r1, X86_INS_RCR: rcr{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR32rCL, X86_INS_RCR: rcr{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR32ri, X86_INS_RCR: rcr{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR64m1, X86_INS_RCR: rcr{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR64mCL, X86_INS_RCR: rcr{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR64mi, X86_INS_RCR: rcr{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR64r1, X86_INS_RCR: rcr{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR64rCL, X86_INS_RCR: rcr{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR64ri, X86_INS_RCR: rcr{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR8m1, X86_INS_RCR: rcr{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR8mCL, X86_INS_RCR: rcr{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR8mi, X86_INS_RCR: rcr{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR8r1, X86_INS_RCR: rcr{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR8rCL, X86_INS_RCR: rcr{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR8ri, X86_INS_RCR: rcr{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RDFSBASE, X86_INS_RDFSBASE: rdfsbase{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDFSBASE64, X86_INS_RDFSBASE: rdfsbase{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDGSBASE, X86_INS_RDGSBASE: rdgsbase{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDGSBASE64, X86_INS_RDGSBASE: rdgsbase{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDMSR, X86_INS_RDMSR: rdmsr */ 0, { 0 } }, { /* X86_RDPMC, X86_INS_RDPMC: rdpmc */ 0, { 0 } }, { /* X86_RDRAND16r, X86_INS_RDRAND: rdrand{w} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDRAND32r, X86_INS_RDRAND: rdrand{l} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDRAND64r, X86_INS_RDRAND: rdrand{q} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDSEED16r, X86_INS_RDSEED: rdseed{w} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDSEED32r, X86_INS_RDSEED: rdseed{l} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDSEED64r, X86_INS_RDSEED: rdseed{q} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDTSC, X86_INS_RDTSC: rdtsc */ 0, { 0 } }, { /* X86_RDTSCP, X86_INS_RDTSCP: rdtscp */ 0, { 0 } }, { /* X86_RETIL, X86_INS_RET: ret{l} $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RETIQ, X86_INS_RET: ret{q} $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RETIW, X86_INS_RET: ret{w} $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RETL, X86_INS_RET: ret{l} */ 0, { 0 } }, { /* X86_RETQ, X86_INS_RET: ret{q} */ 0, { 0 } }, { /* X86_RETW, X86_INS_RET: ret{w} */ 0, { 0 } }, { /* X86_ROL16m1, X86_INS_ROL: rol{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL16mCL, X86_INS_ROL: rol{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL16mi, X86_INS_ROL: rol{w} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL16r1, X86_INS_ROL: rol{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL16rCL, X86_INS_ROL: rol{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL16ri, X86_INS_ROL: rol{w} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL32m1, X86_INS_ROL: rol{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL32mCL, X86_INS_ROL: rol{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL32mi, X86_INS_ROL: rol{l} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL32r1, X86_INS_ROL: rol{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL32rCL, X86_INS_ROL: rol{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL32ri, X86_INS_ROL: rol{l} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL64m1, X86_INS_ROL: rol{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL64mCL, X86_INS_ROL: rol{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL64mi, X86_INS_ROL: rol{q} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL64r1, X86_INS_ROL: rol{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL64rCL, X86_INS_ROL: rol{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL64ri, X86_INS_ROL: rol{q} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL8m1, X86_INS_ROL: rol{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL8mCL, X86_INS_ROL: rol{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL8mi, X86_INS_ROL: rol{b} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL8r1, X86_INS_ROL: rol{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL8rCL, X86_INS_ROL: rol{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL8ri, X86_INS_ROL: rol{b} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR16m1, X86_INS_ROR: ror{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR16mCL, X86_INS_ROR: ror{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR16mi, X86_INS_ROR: ror{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR16r1, X86_INS_ROR: ror{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR16rCL, X86_INS_ROR: ror{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR16ri, X86_INS_ROR: ror{w} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR32m1, X86_INS_ROR: ror{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR32mCL, X86_INS_ROR: ror{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR32mi, X86_INS_ROR: ror{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR32r1, X86_INS_ROR: ror{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR32rCL, X86_INS_ROR: ror{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR32ri, X86_INS_ROR: ror{l} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR64m1, X86_INS_ROR: ror{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR64mCL, X86_INS_ROR: ror{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR64mi, X86_INS_ROR: ror{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR64r1, X86_INS_ROR: ror{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR64rCL, X86_INS_ROR: ror{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR64ri, X86_INS_ROR: ror{q} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR8m1, X86_INS_ROR: ror{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR8mCL, X86_INS_ROR: ror{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR8mi, X86_INS_ROR: ror{b} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR8r1, X86_INS_ROR: ror{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR8rCL, X86_INS_ROR: ror{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR8ri, X86_INS_ROR: ror{b} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RORX32mi, X86_INS_RORX: rorx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RORX32ri, X86_INS_RORX: rorx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RORX64mi, X86_INS_RORX: rorx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RORX64ri, X86_INS_RORX: rorx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDPDm, X86_INS_ROUNDPD: roundpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDPDr, X86_INS_ROUNDPD: roundpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDPSm, X86_INS_ROUNDPS: roundps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDPSr, X86_INS_ROUNDPS: roundps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDSDm, X86_INS_ROUNDSD: roundsd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDSDr, X86_INS_ROUNDSD: roundsd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDSDr_Int, X86_INS_ROUNDSD: roundsd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDSSm, X86_INS_ROUNDSS: roundss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDSSr, X86_INS_ROUNDSS: roundss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROUNDSSr_Int, X86_INS_ROUNDSS: roundss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RSM, X86_INS_RSM: rsm */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_RSQRTPSm, X86_INS_RSQRTPS: rsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RSQRTPSm_Int, X86_INS_RSQRTPS: rsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RSQRTPSr, X86_INS_RSQRTPS: rsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RSQRTPSr_Int, X86_INS_RSQRTPS: rsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RSQRTSSm, X86_INS_RSQRTSS: rsqrtss $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RSQRTSSm_Int, X86_INS_RSQRTSS: rsqrtss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RSQRTSSr, X86_INS_RSQRTSS: rsqrtss $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RSQRTSSr_Int, X86_INS_RSQRTSS: rsqrtss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAHF, X86_INS_SAHF: sahf */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_SAL16m1, X86_INS_SAL: sal{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL16mCL, X86_INS_SAL: sal{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL16mi, X86_INS_SAL: sal{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL16r1, X86_INS_SAL: sal{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL16rCL, X86_INS_SAL: sal{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL16ri, X86_INS_SAL: sal{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32m1, X86_INS_SAL: sal{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32mCL, X86_INS_SAL: sal{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL32mi, X86_INS_SAL: sal{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32r1, X86_INS_SAL: sal{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32rCL, X86_INS_SAL: sal{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL32ri, X86_INS_SAL: sal{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64m1, X86_INS_SAL: sal{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64mCL, X86_INS_SAL: sal{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL64mi, X86_INS_SAL: sal{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64r1, X86_INS_SAL: sal{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64rCL, X86_INS_SAL: sal{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL64ri, X86_INS_SAL: sal{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8m1, X86_INS_SAL: sal{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8mCL, X86_INS_SAL: sal{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL8mi, X86_INS_SAL: sal{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8r1, X86_INS_SAL: sal{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8rCL, X86_INS_SAL: sal{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL8ri, X86_INS_SAL: sal{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SALC, X86_INS_SALC: salc */ 0, { 0 } }, { /* X86_SAR16m1, X86_INS_SAR: sar{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR16mCL, X86_INS_SAR: sar{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR16mi, X86_INS_SAR: sar{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR16r1, X86_INS_SAR: sar{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR16rCL, X86_INS_SAR: sar{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR16ri, X86_INS_SAR: sar{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32m1, X86_INS_SAR: sar{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32mCL, X86_INS_SAR: sar{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR32mi, X86_INS_SAR: sar{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32r1, X86_INS_SAR: sar{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32rCL, X86_INS_SAR: sar{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR32ri, X86_INS_SAR: sar{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64m1, X86_INS_SAR: sar{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64mCL, X86_INS_SAR: sar{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR64mi, X86_INS_SAR: sar{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64r1, X86_INS_SAR: sar{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64rCL, X86_INS_SAR: sar{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR64ri, X86_INS_SAR: sar{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8m1, X86_INS_SAR: sar{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8mCL, X86_INS_SAR: sar{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR8mi, X86_INS_SAR: sar{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8r1, X86_INS_SAR: sar{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8rCL, X86_INS_SAR: sar{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR8ri, X86_INS_SAR: sar{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SARX32rm, X86_INS_SARX: sarx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SARX32rr, X86_INS_SARX: sarx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SARX64rm, X86_INS_SARX: sarx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SARX64rr, X86_INS_SARX: sarx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SBB16i16, X86_INS_SBB: sbb{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16mi, X86_INS_SBB: sbb{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16mi8, X86_INS_SBB: sbb{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16mr, X86_INS_SBB: sbb{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB16ri, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16ri8, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16rm, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB16rr, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB16rr_REV, X86_INS_SBB: sbb{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32i32, X86_INS_SBB: sbb{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32mi, X86_INS_SBB: sbb{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32mi8, X86_INS_SBB: sbb{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32mr, X86_INS_SBB: sbb{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32ri, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32ri8, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32rm, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32rr, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32rr_REV, X86_INS_SBB: sbb{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64i32, X86_INS_SBB: sbb{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64mi32, X86_INS_SBB: sbb{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64mi8, X86_INS_SBB: sbb{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64mr, X86_INS_SBB: sbb{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64ri32, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64ri8, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64rm, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64rr, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64rr_REV, X86_INS_SBB: sbb{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8i8, X86_INS_SBB: sbb{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8mi, X86_INS_SBB: sbb{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8mi8, X86_INS_SBB: sbb{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8mr, X86_INS_SBB: sbb{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8ri, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8ri8, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8rm, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8rr, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8rr_REV, X86_INS_SBB: sbb{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SCASB, X86_INS_SCASB: scasb al, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SCASL, X86_INS_SCASD: scas{l|d} {$dst, %eax|eax, $dst} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SCASQ, X86_INS_SCASQ: scasq rax, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SCASW, X86_INS_SCASW: scasw ax, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SETAEm, X86_INS_SETAE: setae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETAEr, X86_INS_SETAE: setae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETAm, X86_INS_SETA: seta $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETAr, X86_INS_SETA: seta $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETBEm, X86_INS_SETBE: setbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETBEr, X86_INS_SETBE: setbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETBm, X86_INS_SETB: setb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETBr, X86_INS_SETB: setb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETEm, X86_INS_SETE: sete $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETEr, X86_INS_SETE: sete $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETGEm, X86_INS_SETGE: setge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETGEr, X86_INS_SETGE: setge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SETGm, X86_INS_SETG: setg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ, 0 } }, { /* X86_SETGr, X86_INS_SETG: setg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETLEm, X86_INS_SETLE: setle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ, 0 } }, { /* X86_SETLEr, X86_INS_SETLE: setle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETLm, X86_INS_SETL: setl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETLr, X86_INS_SETL: setl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SETNEm, X86_INS_SETNE: setne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETNEr, X86_INS_SETNE: setne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETNOm, X86_INS_SETNO: setno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_READ, 0 } }, { /* X86_SETNOr, X86_INS_SETNO: setno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_WRITE, 0 } }, { /* X86_SETNPm, X86_INS_SETNP: setnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_READ, 0 } }, { /* X86_SETNPr, X86_INS_SETNP: setnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_WRITE, 0 } }, { /* X86_SETNSm, X86_INS_SETNS: setns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETNSr, X86_INS_SETNS: setns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SETOm, X86_INS_SETO: seto $dst */ X86_EFLAGS_TEST_OF, { CS_AC_READ, 0 } }, { /* X86_SETOr, X86_INS_SETO: seto $dst */ X86_EFLAGS_TEST_OF, { CS_AC_WRITE, 0 } }, { /* X86_SETPm, X86_INS_SETP: setp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_READ, 0 } }, { /* X86_SETPr, X86_INS_SETP: setp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_WRITE, 0 } }, { /* X86_SETSm, X86_INS_SETS: sets $dst */ X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETSr, X86_INS_SETS: sets $dst */ X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SFENCE, X86_INS_SFENCE: sfence */ 0, { 0 } }, { /* X86_SGDT16m, X86_INS_SGDT: sgdt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SGDT32m, X86_INS_SGDT: sgdt{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SGDT64m, X86_INS_SGDT: sgdt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SHA1MSG1rm, X86_INS_SHA1MSG1: sha1msg1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA1MSG1rr, X86_INS_SHA1MSG1: sha1msg1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA1MSG2rm, X86_INS_SHA1MSG2: sha1msg2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA1MSG2rr, X86_INS_SHA1MSG2: sha1msg2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA1NEXTErm, X86_INS_SHA1NEXTE: sha1nexte $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA1NEXTErr, X86_INS_SHA1NEXTE: sha1nexte $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA1RNDS4rmi, X86_INS_SHA1RNDS4: sha1rnds4 $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHA1RNDS4rri, X86_INS_SHA1RNDS4: sha1rnds4 $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHA256MSG1rm, X86_INS_SHA256MSG1: sha256msg1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA256MSG1rr, X86_INS_SHA256MSG1: sha256msg1 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA256MSG2rm, X86_INS_SHA256MSG2: sha256msg2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA256MSG2rr, X86_INS_SHA256MSG2: sha256msg2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA256RNDS2rm, X86_INS_SHA256RNDS2: sha256rnds2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHA256RNDS2rr, X86_INS_SHA256RNDS2: sha256rnds2 $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL16m1, X86_INS_SHL: shl{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL16mCL, X86_INS_SHL: shl{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL16mi, X86_INS_SHL: shl{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL16r1, X86_INS_SHL: shl{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL16rCL, X86_INS_SHL: shl{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL16ri, X86_INS_SHL: shl{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32m1, X86_INS_SHL: shl{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32mCL, X86_INS_SHL: shl{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL32mi, X86_INS_SHL: shl{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32r1, X86_INS_SHL: shl{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32rCL, X86_INS_SHL: shl{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL32ri, X86_INS_SHL: shl{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64m1, X86_INS_SHL: shl{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64mCL, X86_INS_SHL: shl{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL64mi, X86_INS_SHL: shl{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64r1, X86_INS_SHL: shl{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64rCL, X86_INS_SHL: shl{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL64ri, X86_INS_SHL: shl{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8m1, X86_INS_SHL: shl{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8mCL, X86_INS_SHL: shl{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL8mi, X86_INS_SHL: shl{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8r1, X86_INS_SHL: shl{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8rCL, X86_INS_SHL: shl{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL8ri, X86_INS_SHL: shl{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHLD16mrCL, X86_INS_SHLD: shld{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD16mri8, X86_INS_SHLD: shld{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD16rrCL, X86_INS_SHLD: shld{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD16rri8, X86_INS_SHLD: shld{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD32mrCL, X86_INS_SHLD: shld{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD32mri8, X86_INS_SHLD: shld{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD32rrCL, X86_INS_SHLD: shld{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD32rri8, X86_INS_SHLD: shld{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD64mrCL, X86_INS_SHLD: shld{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD64mri8, X86_INS_SHLD: shld{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD64rrCL, X86_INS_SHLD: shld{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD64rri8, X86_INS_SHLD: shld{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLX32rm, X86_INS_SHLX: shlx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLX32rr, X86_INS_SHLX: shlx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLX64rm, X86_INS_SHLX: shlx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLX64rr, X86_INS_SHLX: shlx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHR16m1, X86_INS_SHR: shr{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR16mCL, X86_INS_SHR: shr{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR16mi, X86_INS_SHR: shr{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR16r1, X86_INS_SHR: shr{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR16rCL, X86_INS_SHR: shr{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR16ri, X86_INS_SHR: shr{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32m1, X86_INS_SHR: shr{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32mCL, X86_INS_SHR: shr{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR32mi, X86_INS_SHR: shr{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32r1, X86_INS_SHR: shr{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32rCL, X86_INS_SHR: shr{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR32ri, X86_INS_SHR: shr{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64m1, X86_INS_SHR: shr{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64mCL, X86_INS_SHR: shr{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR64mi, X86_INS_SHR: shr{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64r1, X86_INS_SHR: shr{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64rCL, X86_INS_SHR: shr{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR64ri, X86_INS_SHR: shr{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8m1, X86_INS_SHR: shr{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8mCL, X86_INS_SHR: shr{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR8mi, X86_INS_SHR: shr{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8r1, X86_INS_SHR: shr{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8rCL, X86_INS_SHR: shr{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR8ri, X86_INS_SHR: shr{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHRD16mrCL, X86_INS_SHRD: shrd{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD16mri8, X86_INS_SHRD: shrd{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD16rrCL, X86_INS_SHRD: shrd{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD16rri8, X86_INS_SHRD: shrd{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD32mrCL, X86_INS_SHRD: shrd{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD32mri8, X86_INS_SHRD: shrd{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD32rrCL, X86_INS_SHRD: shrd{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD32rri8, X86_INS_SHRD: shrd{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD64mrCL, X86_INS_SHRD: shrd{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD64mri8, X86_INS_SHRD: shrd{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD64rrCL, X86_INS_SHRD: shrd{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD64rri8, X86_INS_SHRD: shrd{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRX32rm, X86_INS_SHRX: shrx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRX32rr, X86_INS_SHRX: shrx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRX64rm, X86_INS_SHRX: shrx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRX64rr, X86_INS_SHRX: shrx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHUFPDrmi, X86_INS_SHUFPD: shufpd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHUFPDrri, X86_INS_SHUFPD: shufpd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHUFPSrmi, X86_INS_SHUFPS: shufps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHUFPSrri, X86_INS_SHUFPS: shufps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SIDT16m, X86_INS_SIDT: sidt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SIDT32m, X86_INS_SIDT: sidt{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SIDT64m, X86_INS_SIDT: sidt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SIN_F, X86_INS_FSIN: fsin */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_SKINIT, X86_INS_SKINIT: skinit eax */ 0, { CS_AC_READ, 0 } }, { /* X86_SLDT16m, X86_INS_SLDT: sldt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT16r, X86_INS_SLDT: sldt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT32r, X86_INS_SLDT: sldt{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT64m, X86_INS_SLDT: sldt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT64r, X86_INS_SLDT: sldt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW16m, X86_INS_SMSW: smsw{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW16r, X86_INS_SMSW: smsw{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW32r, X86_INS_SMSW: smsw{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW64r, X86_INS_SMSW: smsw{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SQRTPDm, X86_INS_SQRTPD: sqrtpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTPDr, X86_INS_SQRTPD: sqrtpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTPSm, X86_INS_SQRTPS: sqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTPSr, X86_INS_SQRTPS: sqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTSDm, X86_INS_SQRTSD: sqrtsd $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTSDm_Int, X86_INS_SQRTSD: sqrtsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SQRTSDr, X86_INS_SQRTSD: sqrtsd $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTSDr_Int, X86_INS_SQRTSD: sqrtsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTSSm, X86_INS_SQRTSS: sqrtss $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTSSm_Int, X86_INS_SQRTSS: sqrtss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SQRTSSr, X86_INS_SQRTSS: sqrtss $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRTSSr_Int, X86_INS_SQRTSS: sqrtss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SQRT_F, X86_INS_FSQRT: fsqrt */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_STAC, X86_INS_STAC: stac */ 0, { 0 } }, { /* X86_STC, X86_INS_STC: stc */ X86_EFLAGS_SET_CF, { 0 } }, { /* X86_STD, X86_INS_STD: std */ X86_EFLAGS_SET_DF, { 0 } }, { /* X86_STGI, X86_INS_STGI: stgi */ 0, { 0 } }, { /* X86_STI, X86_INS_STI: sti */ X86_EFLAGS_SET_IF, { 0 } }, { /* X86_STMXCSR, X86_INS_STMXCSR: stmxcsr $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_STOSB, X86_INS_STOSB: stosb $dst, al */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STOSL, X86_INS_STOSD: stos{l|d} {%eax, $dst|$dst, eax} */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STOSQ, X86_INS_STOSQ: stosq $dst, rax */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STOSW, X86_INS_STOSW: stosw $dst, ax */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STR16r, X86_INS_STR: str{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STR32r, X86_INS_STR: str{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STR64r, X86_INS_STR: str{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STRm, X86_INS_STR: str{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_ST_F32m, X86_INS_FST: fst{s} $dst */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ST_F64m, X86_INS_FST: fst{l} $dst */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ST_FCOMPST0r, X86_INS_FCOMP: fcomp st(0), $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ST_FCOMPST0r_alt, X86_INS_FCOMP: fcomp st(0), $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ST_FCOMST0r, X86_INS_FCOM: fcom st(0), $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ST_FP32m, X86_INS_FSTP: fstp{s} $dst */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ST_FP64m, X86_INS_FSTP: fstp{l} $dst */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_ST_FP80m, X86_INS_FSTP: fstp{t} $dst */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_ST_FPNCEST0r, X86_INS_FSTPNCE: fstpnce $op, st(0) */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ST_FPST0r, X86_INS_FSTP: fstp $op, st(0) */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ST_FPST0r_alt, X86_INS_FSTP: fstp $op, st(0) */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ST_FPrr, X86_INS_FSTP: fstp $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_WRITE, 0 } }, { /* X86_ST_FXCHST0r, X86_INS_FXCH: fxch st(0), $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ST_FXCHST0r_alt, X86_INS_FXCH: fxch st(0), $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ST_Frr, X86_INS_FST: fst $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB16i16, X86_INS_SUB: sub{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16mi, X86_INS_SUB: sub{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16mi8, X86_INS_SUB: sub{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16mr, X86_INS_SUB: sub{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB16ri, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16ri8, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16rm, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB16rr, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB16rr_REV, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32i32, X86_INS_SUB: sub{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32mi, X86_INS_SUB: sub{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32mi8, X86_INS_SUB: sub{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32mr, X86_INS_SUB: sub{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32ri, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32ri8, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32rm, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32rr, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32rr_REV, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64i32, X86_INS_SUB: sub{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64mi32, X86_INS_SUB: sub{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64mi8, X86_INS_SUB: sub{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64mr, X86_INS_SUB: sub{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64ri32, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64ri8, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64rm, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64rr, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64rr_REV, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8i8, X86_INS_SUB: sub{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8mi, X86_INS_SUB: sub{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8mi8, X86_INS_SUB: sub{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8mr, X86_INS_SUB: sub{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8ri, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8ri8, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8rm, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8rr, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8rr_REV, X86_INS_SUB: sub{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBPDrm, X86_INS_SUBPD: subpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBPDrr, X86_INS_SUBPD: subpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBPSrm, X86_INS_SUBPS: subps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBPSrr, X86_INS_SUBPS: subps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBR_F32m, X86_INS_FSUBR: fsubr{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUBR_F64m, X86_INS_FSUBR: fsubr{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUBR_FI16m, X86_INS_FISUBR: fisubr{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUBR_FI32m, X86_INS_FISUBR: fisubr{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUBR_FPrST0, X86_INS_FSUBRP: fsubrp $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUBR_FST0r, X86_INS_FSUBR: fsubr $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUBR_FrST0, X86_INS_FSUBR: fsub{|r} {%st(0), $op|$op, st(0)} */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SUBSDrm, X86_INS_SUBSD: subsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBSDrm_Int, X86_INS_SUBSD: subsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUBSDrr, X86_INS_SUBSD: subsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBSDrr_Int, X86_INS_SUBSD: subsd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBSSrm, X86_INS_SUBSS: subss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBSSrm_Int, X86_INS_SUBSS: subss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUBSSrr, X86_INS_SUBSS: subss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUBSSrr_Int, X86_INS_SUBSS: subss $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB_F32m, X86_INS_FSUB: fsub{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB_F64m, X86_INS_FSUB: fsub{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB_FI16m, X86_INS_FISUB: fisub{s} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB_FI32m, X86_INS_FISUB: fisub{l} $src */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB_FPrST0, X86_INS_FSUBP: fsub{r}p $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB_FST0r, X86_INS_FSUB: fsub $op */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_SUB_FrST0, X86_INS_FSUB: fsub{r} $op, st(0) */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SWAPGS, X86_INS_SWAPGS: swapgs */ 0, { 0 } }, { /* X86_SYSCALL, X86_INS_SYSCALL: syscall */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSENTER, X86_INS_SYSENTER: sysenter */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSEXIT, X86_INS_SYSEXIT: sysexit{l} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSEXIT64, X86_INS_SYSEXIT: sysexit{q} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSRET, X86_INS_SYSRET: sysret{l} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSRET64, X86_INS_SYSRET: sysret{q} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_T1MSKC32rm, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_T1MSKC32rr, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_T1MSKC64rm, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_T1MSKC64rr, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TEST16i16, X86_INS_TEST: test{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST16mi, X86_INS_TEST: test{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST16mi_alt, X86_INS_TEST: test{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST16ri, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST16ri_alt, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST16rm, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST16rr, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST32i32, X86_INS_TEST: test{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST32mi, X86_INS_TEST: test{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST32mi_alt, X86_INS_TEST: test{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST32ri, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST32ri_alt, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST32rm, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST32rr, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST64i32, X86_INS_TEST: test{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST64mi32, X86_INS_TEST: test{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST64mi32_alt, X86_INS_TEST: test{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST64ri32, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST64ri32_alt, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST64rm, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST64rr, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST8i8, X86_INS_TEST: test{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST8mi, X86_INS_TEST: test{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST8mi_alt, X86_INS_TEST: test{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST8ri, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST8ri_alt, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST8rm, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST8rr, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TRAP, X86_INS_UD2: ud2 */ 0, { 0 } }, { /* X86_TST_F, X86_INS_FTST: ftst */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { 0 } }, { /* X86_TZCNT16rm, X86_INS_TZCNT: tzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT16rr, X86_INS_TZCNT: tzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT32rm, X86_INS_TZCNT: tzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT32rr, X86_INS_TZCNT: tzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT64rm, X86_INS_TZCNT: tzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT64rr, X86_INS_TZCNT: tzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK32rm, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK32rr, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK64rm, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK64rr, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UCOMISDrm, X86_INS_UCOMISD: ucomisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_UCOMISDrr, X86_INS_UCOMISD: ucomisd $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_UCOMISSrm, X86_INS_UCOMISS: ucomiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_UCOMISSrr, X86_INS_UCOMISS: ucomiss $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_UCOM_FIPr, X86_INS_FUCOMIP: fucomip $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_UCOM_FIr, X86_INS_FUCOMI: fucomi $reg */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_UCOM_FPPr, X86_INS_FUCOMPP: fucompp */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { 0 } }, { /* X86_UCOM_FPr, X86_INS_FUCOMP: fucomp $reg */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_UCOM_Fr, X86_INS_FUCOM: fucom $reg */ X86_FPU_FLAGS_MODIFY_C1 | X86_FPU_FLAGS_MODIFY_C0 | X86_FPU_FLAGS_MODIFY_C2 | X86_FPU_FLAGS_MODIFY_C3, { CS_AC_READ, 0 } }, { /* X86_UD2B, X86_INS_UD2B: ud2b */ 0, { 0 } }, { /* X86_UNPCKHPDrm, X86_INS_UNPCKHPD: unpckhpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKHPDrr, X86_INS_UNPCKHPD: unpckhpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKHPSrm, X86_INS_UNPCKHPS: unpckhps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKHPSrr, X86_INS_UNPCKHPS: unpckhps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKLPDrm, X86_INS_UNPCKLPD: unpcklpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKLPDrr, X86_INS_UNPCKLPD: unpcklpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKLPSrm, X86_INS_UNPCKLPS: unpcklps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UNPCKLPSrr, X86_INS_UNPCKLPS: unpcklps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VADDPDYrm, X86_INS_VADDPD: vaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDYrr, X86_INS_VADDPD: vaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rm, X86_INS_VADDPD: vaddpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rmb, X86_INS_VADDPD: vaddpd {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rmbk, X86_INS_VADDPD: vaddpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rmbkz, X86_INS_VADDPD: vaddpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rmk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rmkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rr, X86_INS_VADDPD: vaddpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rrk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ128rrkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rm, X86_INS_VADDPD: vaddpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rmb, X86_INS_VADDPD: vaddpd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rmbk, X86_INS_VADDPD: vaddpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rmbkz, X86_INS_VADDPD: vaddpd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rmk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rmkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rr, X86_INS_VADDPD: vaddpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rrk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZ256rrkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrb, X86_INS_VADDPD: vaddpd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDPDZrbk, X86_INS_VADDPD: vaddpd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDPDZrbkz, X86_INS_VADDPD: vaddpd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDPDZrm, X86_INS_VADDPD: vaddpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrmb, X86_INS_VADDPD: vaddpd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrmbk, X86_INS_VADDPD: vaddpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrmbkz, X86_INS_VADDPD: vaddpd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrmk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrmkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrr, X86_INS_VADDPD: vaddpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrrk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDZrrkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDrm, X86_INS_VADDPD: vaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPDrr, X86_INS_VADDPD: vaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSYrm, X86_INS_VADDPS: vaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSYrr, X86_INS_VADDPS: vaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rm, X86_INS_VADDPS: vaddps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rmb, X86_INS_VADDPS: vaddps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rmbk, X86_INS_VADDPS: vaddps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rmbkz, X86_INS_VADDPS: vaddps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rmk, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rmkz, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rr, X86_INS_VADDPS: vaddps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rrk, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ128rrkz, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rm, X86_INS_VADDPS: vaddps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rmb, X86_INS_VADDPS: vaddps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rmbk, X86_INS_VADDPS: vaddps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rmbkz, X86_INS_VADDPS: vaddps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rmk, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rmkz, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rr, X86_INS_VADDPS: vaddps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rrk, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZ256rrkz, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrb, X86_INS_VADDPS: vaddps $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDPSZrbk, X86_INS_VADDPS: vaddps {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDPSZrbkz, X86_INS_VADDPS: vaddps {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDPSZrm, X86_INS_VADDPS: vaddps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrmb, X86_INS_VADDPS: vaddps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrmbk, X86_INS_VADDPS: vaddps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrmbkz, X86_INS_VADDPS: vaddps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrmk, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrmkz, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrr, X86_INS_VADDPS: vaddps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrrk, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSZrrkz, X86_INS_VADDPS: vaddps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSrm, X86_INS_VADDPS: vaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDPSrr, X86_INS_VADDPS: vaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrm, X86_INS_VADDSD: vaddsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrm_Int, X86_INS_VADDSD: vaddsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrm_Intk, X86_INS_VADDSD: vaddsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrm_Intkz, X86_INS_VADDSD: vaddsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrr, X86_INS_VADDSD: vaddsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrr_Int, X86_INS_VADDSD: vaddsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrr_Intk, X86_INS_VADDSD: vaddsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrr_Intkz, X86_INS_VADDSD: vaddsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDZrrb, X86_INS_VADDSD: vaddsd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSDZrrbk, X86_INS_VADDSD: vaddsd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSDZrrbkz, X86_INS_VADDSD: vaddsd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSDrm, X86_INS_VADDSD: vaddsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDrm_Int, X86_INS_VADDSD: vaddsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSDrr, X86_INS_VADDSD: vaddsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSDrr_Int, X86_INS_VADDSD: vaddsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrm, X86_INS_VADDSS: vaddss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrm_Int, X86_INS_VADDSS: vaddss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrm_Intk, X86_INS_VADDSS: vaddss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrm_Intkz, X86_INS_VADDSS: vaddss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrr, X86_INS_VADDSS: vaddss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrr_Int, X86_INS_VADDSS: vaddss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrr_Intk, X86_INS_VADDSS: vaddss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrr_Intkz, X86_INS_VADDSS: vaddss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSZrrb, X86_INS_VADDSS: vaddss $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSSZrrbk, X86_INS_VADDSS: vaddss {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSSZrrbkz, X86_INS_VADDSS: vaddss {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSSrm, X86_INS_VADDSS: vaddss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSrm_Int, X86_INS_VADDSS: vaddss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VADDSSrr, X86_INS_VADDSS: vaddss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSSrr_Int, X86_INS_VADDSS: vaddss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPDYrm, X86_INS_VADDSUBPD: vaddsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPDYrr, X86_INS_VADDSUBPD: vaddsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPDrm, X86_INS_VADDSUBPD: vaddsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPDrr, X86_INS_VADDSUBPD: vaddsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPSYrm, X86_INS_VADDSUBPS: vaddsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPSYrr, X86_INS_VADDSUBPS: vaddsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPSrm, X86_INS_VADDSUBPS: vaddsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VADDSUBPSrr, X86_INS_VADDSUBPS: vaddsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESDECLASTrm, X86_INS_VAESDECLAST: vaesdeclast $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESDECLASTrr, X86_INS_VAESDECLAST: vaesdeclast $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESDECrm, X86_INS_VAESDEC: vaesdec $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESDECrr, X86_INS_VAESDEC: vaesdec $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESENCLASTrm, X86_INS_VAESENCLAST: vaesenclast $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESENCLASTrr, X86_INS_VAESENCLAST: vaesenclast $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESENCrm, X86_INS_VAESENC: vaesenc $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESENCrr, X86_INS_VAESENC: vaesenc $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VAESIMCrm, X86_INS_VAESIMC: vaesimc $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VAESIMCrr, X86_INS_VAESIMC: vaesimc $dst, $src1 */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VAESKEYGENASSIST128rm, X86_INS_VAESKEYGENASSIST: vaeskeygenassist $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VAESKEYGENASSIST128rr, X86_INS_VAESKEYGENASSIST: vaeskeygenassist $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNDrmi, X86_INS_VALIGND: valignd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNDrri, X86_INS_VALIGND: valignd $dst , $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNDrrik, X86_INS_VALIGND: valignd {$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNDrrikz, X86_INS_VALIGND: valignd {$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNQrmi, X86_INS_VALIGNQ: valignq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNQrri, X86_INS_VALIGNQ: valignq $dst , $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNQrrik, X86_INS_VALIGNQ: valignq {$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VALIGNQrrikz, X86_INS_VALIGNQ: valignq {$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VANDNPDYrm, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPDYrr, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPDrm, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPDrr, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPSYrm, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPSYrr, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPSrm, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDNPSrr, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPDYrm, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPDYrr, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPDrm, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPDrr, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPSYrm, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPSYrr, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPSrm, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VANDPSrr, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rm, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rmb, X86_INS_VBLENDMPD: vblendmpd {${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rmbk, X86_INS_VBLENDMPD: vblendmpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rmk, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rmkz, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rr, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rrk, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ128rrkz, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rm, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rmb, X86_INS_VBLENDMPD: vblendmpd {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rmbk, X86_INS_VBLENDMPD: vblendmpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rmk, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rmkz, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rr, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rrk, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZ256rrkz, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrm, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrmb, X86_INS_VBLENDMPD: vblendmpd {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrmbk, X86_INS_VBLENDMPD: vblendmpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrmk, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrmkz, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrr, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrrk, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPDZrrkz, X86_INS_VBLENDMPD: vblendmpd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rm, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rmb, X86_INS_VBLENDMPS: vblendmps {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rmbk, X86_INS_VBLENDMPS: vblendmps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rmk, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rmkz, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rr, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rrk, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ128rrkz, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rm, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rmb, X86_INS_VBLENDMPS: vblendmps {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rmbk, X86_INS_VBLENDMPS: vblendmps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rmk, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rmkz, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rr, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rrk, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZ256rrkz, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrm, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrmb, X86_INS_VBLENDMPS: vblendmps {${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrmbk, X86_INS_VBLENDMPS: vblendmps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrmk, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrmkz, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrr, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrrk, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDMPSZrrkz, X86_INS_VBLENDMPS: vblendmps {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDPDYrmi, X86_INS_VBLENDPD: vblendpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPDYrri, X86_INS_VBLENDPD: vblendpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPDrmi, X86_INS_VBLENDPD: vblendpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPDrri, X86_INS_VBLENDPD: vblendpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPSYrmi, X86_INS_VBLENDPS: vblendps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPSYrri, X86_INS_VBLENDPS: vblendps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPSrmi, X86_INS_VBLENDPS: vblendps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDPSrri, X86_INS_VBLENDPS: vblendps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VBLENDVPDYrm, X86_INS_VBLENDVPD: vblendvpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPDYrr, X86_INS_VBLENDVPD: vblendvpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPDrm, X86_INS_VBLENDVPD: vblendvpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPDrr, X86_INS_VBLENDVPD: vblendvpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPSYrm, X86_INS_VBLENDVPS: vblendvps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPSYrr, X86_INS_VBLENDVPS: vblendvps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPSrm, X86_INS_VBLENDVPS: vblendvps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBLENDVPSrr, X86_INS_VBLENDVPS: vblendvps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VBROADCASTF128, X86_INS_VBROADCASTF128: vbroadcastf128 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTI32X4krm, X86_INS_VBROADCASTI32X4: vbroadcasti32x4 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTI32X4rm, X86_INS_VBROADCASTI32X4: vbroadcasti32x4 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTI64X4krm, X86_INS_VBROADCASTI64X4: vbroadcasti64x4 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTI64X4rm, X86_INS_VBROADCASTI64X4: vbroadcasti64x4 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDYrm, X86_INS_VBROADCASTSD: vbroadcastsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDYrr, X86_INS_VBROADCASTSD: vbroadcastsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZ256m, X86_INS_VBROADCASTSD: vbroadcastsd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZ256mk, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZ256mkz, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZ256r, X86_INS_VBROADCASTSD: vbroadcastsd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZ256rk, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZ256rkz, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZm, X86_INS_VBROADCASTSD: vbroadcastsd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZmk, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZmkz, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZr, X86_INS_VBROADCASTSD: vbroadcastsd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZrk, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSDZrkz, X86_INS_VBROADCASTSD: vbroadcastsd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSYrm, X86_INS_VBROADCASTSS: vbroadcastss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSYrr, X86_INS_VBROADCASTSS: vbroadcastss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ128m, X86_INS_VBROADCASTSS: vbroadcastss $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ128mk, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ128mkz, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ128r, X86_INS_VBROADCASTSS: vbroadcastss $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ128rk, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ128rkz, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ256m, X86_INS_VBROADCASTSS: vbroadcastss $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ256mk, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ256mkz, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ256r, X86_INS_VBROADCASTSS: vbroadcastss $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ256rk, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZ256rkz, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZm, X86_INS_VBROADCASTSS: vbroadcastss $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZmk, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZmkz, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZr, X86_INS_VBROADCASTSS: vbroadcastss $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZrk, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSZrkz, X86_INS_VBROADCASTSS: vbroadcastss {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSrm, X86_INS_VBROADCASTSS: vbroadcastss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VBROADCASTSSrr, X86_INS_VBROADCASTSS: vbroadcastss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCMPPDYrmi, X86_INS_VCMPPD: vcmp${cc}pd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPDYrmi_alt, X86_INS_VCMPPD: vcmppd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDYrri, X86_INS_VCMPPD: vcmp${cc}pd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPDYrri_alt, X86_INS_VCMPPD: vcmppd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDZrmi, X86_INS_VCMPPD: vcmp${cc}pd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDZrmi_alt, X86_INS_VCMPPD: vcmppd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDZrri, X86_INS_VCMPPD: vcmp${cc}pd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPDZrri_alt, X86_INS_VCMPPD: vcmppd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDZrrib, X86_INS_VCMPPD: vcmp${cc}pd {{sae}, $src2, $src1, $dst|$dst, $src1, $src2, {sae}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPDZrrib_alt, X86_INS_VCMPPD: vcmppd {{sae}, $cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc, {sae}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDrmi, X86_INS_VCMPPD: vcmp${cc}pd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPDrmi_alt, X86_INS_VCMPPD: vcmppd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPDrri, X86_INS_VCMPPD: vcmp${cc}pd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPDrri_alt, X86_INS_VCMPPD: vcmppd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSYrmi, X86_INS_VCMPPS: vcmp${cc}ps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPSYrmi_alt, X86_INS_VCMPPS: vcmpps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSYrri, X86_INS_VCMPPS: vcmp${cc}ps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPSYrri_alt, X86_INS_VCMPPS: vcmpps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSZrmi, X86_INS_VCMPPS: vcmp${cc}ps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSZrmi_alt, X86_INS_VCMPPS: vcmpps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSZrri, X86_INS_VCMPPS: vcmp${cc}ps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPSZrri_alt, X86_INS_VCMPPS: vcmpps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSZrrib, X86_INS_VCMPPS: vcmp${cc}ps {{sae}, $src2, $src1, $dst|$dst, $src1, $src2, {sae}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPSZrrib_alt, X86_INS_VCMPPS: vcmpps {{sae}, $cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc, {sae}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSrmi, X86_INS_VCMPPS: vcmp${cc}ps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPSrmi_alt, X86_INS_VCMPPS: vcmpps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPPSrri, X86_INS_VCMPPS: vcmp${cc}ps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPPSrri_alt, X86_INS_VCMPPS: vcmpps $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSDZrm, X86_INS_VCMPSD: vcmp${cc}sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSDZrmi_alt, X86_INS_VCMPSD: vcmpsd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSDZrr, X86_INS_VCMPSD: vcmp${cc}sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSDZrri_alt, X86_INS_VCMPSD: vcmpsd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSDrm, X86_INS_VCMPSD: vcmp${cc}sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSDrm_alt, X86_INS_VCMPSD: vcmpsd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSDrr, X86_INS_VCMPSD: vcmp${cc}sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSDrr_alt, X86_INS_VCMPSD: vcmpsd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSSZrm, X86_INS_VCMPSS: vcmp${cc}ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSSZrmi_alt, X86_INS_VCMPSS: vcmpss $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSSZrr, X86_INS_VCMPSS: vcmp${cc}ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSSZrri_alt, X86_INS_VCMPSS: vcmpss $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSSrm, X86_INS_VCMPSS: vcmp${cc}ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSSrm_alt, X86_INS_VCMPSS: vcmpss $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCMPSSrr, X86_INS_VCMPSS: vcmp${cc}ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCMPSSrr_alt, X86_INS_VCMPSS: vcmpss $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCOMISDZrm, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISDZrr, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISDrm, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISDrr, X86_INS_VCOMISD: vcomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISSZrm, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISSZrr, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISSrm, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMISSrr, X86_INS_VCOMISS: vcomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZ128mrk, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZ128rrk, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZ128rrkz, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZ256mrk, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZ256rrk, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZ256rrkz, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZmrk, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZrrk, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPDZrrkz, X86_INS_VCOMPRESSPD: vcompresspd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZ128mrk, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZ128rrk, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZ128rrkz, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZ256mrk, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZ256rrk, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZ256rrkz, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZmrk, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZrrk, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCOMPRESSPSZrrkz, X86_INS_VCOMPRESSPS: vcompressps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PDYrm, X86_INS_VCVTDQ2PD: vcvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PDYrr, X86_INS_VCVTDQ2PD: vcvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PDZrm, X86_INS_VCVTDQ2PD: vcvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PDZrr, X86_INS_VCVTDQ2PD: vcvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PDrm, X86_INS_VCVTDQ2PD: vcvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PDrr, X86_INS_VCVTDQ2PD: vcvtdq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PSYrm, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PSYrr, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PSZrm, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PSZrr, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PSZrrb, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTDQ2PSrm, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTDQ2PSrr, X86_INS_VCVTDQ2PS: vcvtdq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2DQXrm, X86_INS_VCVTPD2DQX: vcvtpd2dqx $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2DQYrm, X86_INS_VCVTPD2DQ: vcvtpd2dq{y} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2DQYrr, X86_INS_VCVTPD2DQ: vcvtpd2dq{y} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2DQZrm, X86_INS_VCVTPD2DQ: vcvtpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2DQZrr, X86_INS_VCVTPD2DQ: vcvtpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2DQZrrb, X86_INS_VCVTPD2DQ: vcvtpd2dq $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPD2DQrr, X86_INS_VCVTPD2DQ: vcvtpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2PSXrm, X86_INS_VCVTPD2PSX: vcvtpd2psx $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2PSYrm, X86_INS_VCVTPD2PS: vcvtpd2ps{y} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2PSYrr, X86_INS_VCVTPD2PS: vcvtpd2ps{y} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2PSZrm, X86_INS_VCVTPD2PS: vcvtpd2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2PSZrr, X86_INS_VCVTPD2PS: vcvtpd2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2PSZrrb, X86_INS_VCVTPD2PS: vcvtpd2ps $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPD2PSrr, X86_INS_VCVTPD2PS: vcvtpd2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2UDQZrm, X86_INS_VCVTPD2UDQ: vcvtpd2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2UDQZrr, X86_INS_VCVTPD2UDQ: vcvtpd2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPD2UDQZrrb, X86_INS_VCVTPD2UDQ: vcvtpd2udq $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPH2PSYrm, X86_INS_VCVTPH2PS: vcvtph2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPH2PSYrr, X86_INS_VCVTPH2PS: vcvtph2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPH2PSZrm, X86_INS_VCVTPH2PS: vcvtph2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPH2PSZrr, X86_INS_VCVTPH2PS: vcvtph2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPH2PSrm, X86_INS_VCVTPH2PS: vcvtph2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPH2PSrr, X86_INS_VCVTPH2PS: vcvtph2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2DQYrm, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2DQYrr, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2DQZrm, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2DQZrr, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2DQZrrb, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2DQrm, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2DQrr, X86_INS_VCVTPS2DQ: vcvtps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PDYrm, X86_INS_VCVTPS2PD: vcvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PDYrr, X86_INS_VCVTPS2PD: vcvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PDZrm, X86_INS_VCVTPS2PD: vcvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PDZrr, X86_INS_VCVTPS2PD: vcvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PDrm, X86_INS_VCVTPS2PD: vcvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PDrr, X86_INS_VCVTPS2PD: vcvtps2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2PHYmr, X86_INS_VCVTPS2PH: vcvtps2ph $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2PHYrr, X86_INS_VCVTPS2PH: vcvtps2ph $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2PHZmr, X86_INS_VCVTPS2PH: vcvtps2ph $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2PHZrr, X86_INS_VCVTPS2PH: vcvtps2ph $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2PHmr, X86_INS_VCVTPS2PH: vcvtps2ph $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2PHrr, X86_INS_VCVTPS2PH: vcvtps2ph $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTPS2UDQZrm, X86_INS_VCVTPS2UDQ: vcvtps2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2UDQZrr, X86_INS_VCVTPS2UDQ: vcvtps2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTPS2UDQZrrb, X86_INS_VCVTPS2UDQ: vcvtps2udq $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2SI64Zrm, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2SI64Zrr, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SI64rm, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2SI64rr, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SIZrm, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2SIZrr, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SIrm, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2SIrr, X86_INS_VCVTSD2SI: vcvtsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SSZrm, X86_INS_VCVTSD2SS: vcvtsd2ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SSZrr, X86_INS_VCVTSD2SS: vcvtsd2ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SSrm, X86_INS_VCVTSD2SS: vcvtsd2ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSD2SSrr, X86_INS_VCVTSD2SS: vcvtsd2ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSD2USI64Zrm, X86_INS_VCVTSD2USI: vcvtsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2USI64Zrr, X86_INS_VCVTSD2USI: vcvtsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSD2USIZrm, X86_INS_VCVTSD2USI: vcvtsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSD2USIZrr, X86_INS_VCVTSD2USI: vcvtsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SD64rm, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SD64rr, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SDrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SDrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SS64rm, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SS64rr, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SSrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI2SSrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI642SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI642SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI642SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSI642SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SDZrm, X86_INS_VCVTSS2SD: vcvtss2sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SDZrr, X86_INS_VCVTSS2SD: vcvtss2sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SDrm, X86_INS_VCVTSS2SD: vcvtss2sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SDrr, X86_INS_VCVTSS2SD: vcvtss2sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SI64Zrm, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSS2SI64Zrr, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SI64rm, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSS2SI64rr, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SIZrm, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSS2SIZrr, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSS2SIrm, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSS2SIrr, X86_INS_VCVTSS2SI: vcvtss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSS2USI64Zrm, X86_INS_VCVTSS2USI: vcvtss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSS2USI64Zrr, X86_INS_VCVTSS2USI: vcvtss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTSS2USIZrm, X86_INS_VCVTSS2USI: vcvtss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VCVTSS2USIZrr, X86_INS_VCVTSS2USI: vcvtss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2DQXrm, X86_INS_VCVTTPD2DQX: vcvttpd2dqx $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2DQYrm, X86_INS_VCVTTPD2DQ: vcvttpd2dq{y} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2DQYrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq{y} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2DQZrm, X86_INS_VCVTTPD2DQ: vcvttpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2DQZrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2DQrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2UDQZrm, X86_INS_VCVTTPD2UDQ: vcvttpd2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPD2UDQZrr, X86_INS_VCVTTPD2UDQ: vcvttpd2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2DQYrm, X86_INS_VCVTTPS2DQ: vcvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2DQYrr, X86_INS_VCVTTPS2DQ: vcvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2DQZrm, X86_INS_VCVTTPS2DQ: vcvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2DQZrr, X86_INS_VCVTTPS2DQ: vcvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2DQrm, X86_INS_VCVTTPS2DQ: vcvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2DQrr, X86_INS_VCVTTPS2DQ: vcvttps2dq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2UDQZrm, X86_INS_VCVTTPS2UDQ: vcvttps2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTPS2UDQZrr, X86_INS_VCVTTPS2UDQ: vcvttps2udq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI: vcvttsd2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI: vcvttsd2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI: vcvttss2si $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI: vcvttss2usi $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTUDQ2PDZrm, X86_INS_VCVTUDQ2PD: vcvtudq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTUDQ2PDZrr, X86_INS_VCVTUDQ2PD: vcvtudq2pd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTUDQ2PSZrm, X86_INS_VCVTUDQ2PS: vcvtudq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTUDQ2PSZrr, X86_INS_VCVTUDQ2PS: vcvtudq2ps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VCVTUDQ2PSZrrb, X86_INS_VCVTUDQ2PS: vcvtudq2ps $dst, $src, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{l} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI642SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI642SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI642SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VCVTUSI642SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{q} $dst, $src1, $src */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDYrm, X86_INS_VDIVPD: vdivpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDYrr, X86_INS_VDIVPD: vdivpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rm, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rmb, X86_INS_VDIVPD: vdivpd {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rmbk, X86_INS_VDIVPD: vdivpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rmbkz, X86_INS_VDIVPD: vdivpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rmk, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rmkz, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rr, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rrk, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ128rrkz, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rm, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rmb, X86_INS_VDIVPD: vdivpd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rmbk, X86_INS_VDIVPD: vdivpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rmbkz, X86_INS_VDIVPD: vdivpd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rmk, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rmkz, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rr, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rrk, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZ256rrkz, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrb, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVPDZrbk, X86_INS_VDIVPD: vdivpd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVPDZrbkz, X86_INS_VDIVPD: vdivpd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVPDZrm, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrmb, X86_INS_VDIVPD: vdivpd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrmbk, X86_INS_VDIVPD: vdivpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrmbkz, X86_INS_VDIVPD: vdivpd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrmk, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrmkz, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrr, X86_INS_VDIVPD: vdivpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrrk, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDZrrkz, X86_INS_VDIVPD: vdivpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDrm, X86_INS_VDIVPD: vdivpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPDrr, X86_INS_VDIVPD: vdivpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSYrm, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSYrr, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rm, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rmb, X86_INS_VDIVPS: vdivps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rmbk, X86_INS_VDIVPS: vdivps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS: vdivps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rmk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rmkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rr, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rrk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ128rrkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rm, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rmb, X86_INS_VDIVPS: vdivps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rmbk, X86_INS_VDIVPS: vdivps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS: vdivps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rmk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rmkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rr, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rrk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZ256rrkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrb, X86_INS_VDIVPS: vdivps $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVPSZrbk, X86_INS_VDIVPS: vdivps {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVPSZrbkz, X86_INS_VDIVPS: vdivps {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVPSZrm, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrmb, X86_INS_VDIVPS: vdivps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrmbk, X86_INS_VDIVPS: vdivps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrmbkz, X86_INS_VDIVPS: vdivps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrmk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrmkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrr, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrrk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSZrrkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSrm, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVPSrr, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrm, X86_INS_VDIVSD: vdivsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrm_Int, X86_INS_VDIVSD: vdivsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrm_Intk, X86_INS_VDIVSD: vdivsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrm_Intkz, X86_INS_VDIVSD: vdivsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrr, X86_INS_VDIVSD: vdivsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrr_Int, X86_INS_VDIVSD: vdivsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrr_Intk, X86_INS_VDIVSD: vdivsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrr_Intkz, X86_INS_VDIVSD: vdivsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDZrrb, X86_INS_VDIVSD: vdivsd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSDZrrbk, X86_INS_VDIVSD: vdivsd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSDZrrbkz, X86_INS_VDIVSD: vdivsd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSDrm, X86_INS_VDIVSD: vdivsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDrm_Int, X86_INS_VDIVSD: vdivsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSDrr, X86_INS_VDIVSD: vdivsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSDrr_Int, X86_INS_VDIVSD: vdivsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrm, X86_INS_VDIVSS: vdivss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrm_Int, X86_INS_VDIVSS: vdivss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrm_Intk, X86_INS_VDIVSS: vdivss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrm_Intkz, X86_INS_VDIVSS: vdivss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrr, X86_INS_VDIVSS: vdivss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrr_Int, X86_INS_VDIVSS: vdivss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrr_Intk, X86_INS_VDIVSS: vdivss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrr_Intkz, X86_INS_VDIVSS: vdivss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSZrrb, X86_INS_VDIVSS: vdivss $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSSZrrbk, X86_INS_VDIVSS: vdivss {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSSZrrbkz, X86_INS_VDIVSS: vdivss {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSSrm, X86_INS_VDIVSS: vdivss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSrm_Int, X86_INS_VDIVSS: vdivss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDIVSSrr, X86_INS_VDIVSS: vdivss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDIVSSrr_Int, X86_INS_VDIVSS: vdivss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VDPPDrmi, X86_INS_VDPPD: vdppd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDPPDrri, X86_INS_VDPPD: vdppd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDPPSYrmi, X86_INS_VDPPS: vdpps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDPPSYrri, X86_INS_VDPPS: vdpps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDPPSrmi, X86_INS_VDPPS: vdpps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VDPPSrri, X86_INS_VDPPS: vdpps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VERRm, X86_INS_VERR: verr $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VERRr, X86_INS_VERR: verr $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VERWm, X86_INS_VERW: verw $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VERWr, X86_INS_VERW: verw $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VEXP2PDm, X86_INS_VEXP2PD: vexp2pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDmb, X86_INS_VEXP2PD: vexp2pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDmbk, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDmbkz, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDmk, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDmkz, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDr, X86_INS_VEXP2PD: vexp2pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDrb, X86_INS_VEXP2PD: vexp2pd {$src, $dst {sae}|$dst {sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDrbk, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDrbkz, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDrk, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PDrkz, X86_INS_VEXP2PD: vexp2pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSm, X86_INS_VEXP2PS: vexp2ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSmb, X86_INS_VEXP2PS: vexp2ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSmbk, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSmbkz, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSmk, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSmkz, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSr, X86_INS_VEXP2PS: vexp2ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSrb, X86_INS_VEXP2PS: vexp2ps {$src, $dst {sae}|$dst {sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSrbk, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSrbkz, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSrk, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXP2PSrkz, X86_INS_VEXP2PS: vexp2ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ128rmk, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ128rmkz, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ128rrk, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ128rrkz, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ256rmk, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ256rmkz, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ256rrk, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZ256rrkz, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZrmk, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZrmkz, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZrrk, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPDZrrkz, X86_INS_VEXPANDPD: vexpandpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ128rmk, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ128rmkz, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ128rrk, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ128rrkz, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ256rmk, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ256rmkz, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ256rrk, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZ256rrkz, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZrmk, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZrmkz, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZrrk, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXPANDPSZrrkz, X86_INS_VEXPANDPS: vexpandps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VEXTRACTF128mr, X86_INS_VEXTRACTF128: vextractf128 $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF128rr, X86_INS_VEXTRACTF128: vextractf128 $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF32x4rm, X86_INS_VEXTRACTF32X4: vextractf32x4 $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF32x4rr, X86_INS_VEXTRACTF32X4: vextractf32x4 $dst , $src1, $idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF32x4rrk, X86_INS_VEXTRACTF32X4: vextractf32x4 {$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF32x4rrkz, X86_INS_VEXTRACTF32X4: vextractf32x4 {$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF64x4rm, X86_INS_VEXTRACTF64X4: vextractf64x4 $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF64x4rr, X86_INS_VEXTRACTF64X4: vextractf64x4 $dst , $src1, $idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF64x4rrk, X86_INS_VEXTRACTF64X4: vextractf64x4 {$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTF64x4rrkz, X86_INS_VEXTRACTF64X4: vextractf64x4 {$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI128mr, X86_INS_VEXTRACTI128: vextracti128 $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI128rr, X86_INS_VEXTRACTI128: vextracti128 $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI32x4rm, X86_INS_VEXTRACTI32X4: vextracti32x4 $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI32x4rr, X86_INS_VEXTRACTI32X4: vextracti32x4 $dst , $src1, $idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI32x4rrk, X86_INS_VEXTRACTI32X4: vextracti32x4 {$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI32x4rrkz, X86_INS_VEXTRACTI32X4: vextracti32x4 {$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI64x4rm, X86_INS_VEXTRACTI64X4: vextracti64x4 $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI64x4rr, X86_INS_VEXTRACTI64X4: vextracti64x4 $dst , $src1, $idx */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI64x4rrk, X86_INS_VEXTRACTI64X4: vextracti64x4 {$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTI64x4rrkz, X86_INS_VEXTRACTI64X4: vextracti64x4 {$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTPSmr, X86_INS_VEXTRACTPS: vextractps $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTPSrr, X86_INS_VEXTRACTPS: vextractps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTPSzmr, X86_INS_VEXTRACTPS: vextractps $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VEXTRACTPSzrr, X86_INS_VEXTRACTPS: vextractps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADD132PDZ128m, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PDZ128mb, X86_INS_VFMADD132PD: vfmadd132pd {${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PDZ256m, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PDZ256mb, X86_INS_VFMADD132PD: vfmadd132pd {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PDZm, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PDZmb, X86_INS_VFMADD132PD: vfmadd132pd {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PSZ128m, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PSZ128mb, X86_INS_VFMADD132PS: vfmadd132ps {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PSZ256m, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PSZ256mb, X86_INS_VFMADD132PS: vfmadd132ps {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PSZm, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADD132PSZmb, X86_INS_VFMADD132PS: vfmadd132ps {${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4mr, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4mrY, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4rm, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4rmY, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4rr, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4rrY, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4rrY_REV, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPD4rr_REV, X86_INS_VFMADDPD: vfmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rm, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rmb, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rmbk, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rmk, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rmkz, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rr, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rrk, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v213rrkz, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rm, X86_INS_VFMADD231PD: vfmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rmb, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rmbk, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rmk, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rmkz, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rr, X86_INS_VFMADD231PD: vfmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rrk, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ128v231rrkz, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rm, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rmb, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rmbk, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rmk, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rmkz, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rr, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rrk, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v213rrkz, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rm, X86_INS_VFMADD231PD: vfmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rmb, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rmbk, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rmk, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rmkz, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rr, X86_INS_VFMADD231PD: vfmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rrk, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZ256v231rrkz, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rm, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rmb, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rmbk, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rmk, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rmkz, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rr, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rrb, X86_INS_VFMADD213PD: vfmadd213pd $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDPDZv213rrbk, X86_INS_VFMADD213PD: vfmadd213pd {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDPDZv213rrbkz, X86_INS_VFMADD213PD: vfmadd213pd {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDPDZv213rrk, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv213rrkz, X86_INS_VFMADD213PD: vfmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rm, X86_INS_VFMADD231PD: vfmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rmb, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rmbk, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rmk, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rmkz, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rr, X86_INS_VFMADD231PD: vfmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rrk, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDZv231rrkz, X86_INS_VFMADD231PD: vfmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr132m, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr132mY, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr132r, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr132rY, X86_INS_VFMADD132PD: vfmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr213m, X86_INS_VFMADD213PD: vfmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr213mY, X86_INS_VFMADD213PD: vfmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr213r, X86_INS_VFMADD213PD: vfmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr213rY, X86_INS_VFMADD213PD: vfmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr231m, X86_INS_VFMADD231PD: vfmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr231mY, X86_INS_VFMADD231PD: vfmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr231r, X86_INS_VFMADD231PD: vfmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPDr231rY, X86_INS_VFMADD231PD: vfmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4mr, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4mrY, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4rm, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4rmY, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4rr, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4rrY, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4rrY_REV, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPS4rr_REV, X86_INS_VFMADDPS: vfmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rm, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rmb, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rmbk, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rmk, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rmkz, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rr, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rrk, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v213rrkz, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rm, X86_INS_VFMADD231PS: vfmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rmb, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rmbk, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rmk, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rmkz, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rr, X86_INS_VFMADD231PS: vfmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rrk, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ128v231rrkz, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rm, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rmb, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rmbk, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rmk, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rmkz, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rr, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rrk, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v213rrkz, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rm, X86_INS_VFMADD231PS: vfmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rmb, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rmbk, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rmk, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rmkz, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rr, X86_INS_VFMADD231PS: vfmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rrk, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZ256v231rrkz, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rm, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rmb, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rmbk, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rmk, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rmkz, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rr, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rrb, X86_INS_VFMADD213PS: vfmadd213ps $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDPSZv213rrbk, X86_INS_VFMADD213PS: vfmadd213ps {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDPSZv213rrbkz, X86_INS_VFMADD213PS: vfmadd213ps {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDPSZv213rrk, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv213rrkz, X86_INS_VFMADD213PS: vfmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rm, X86_INS_VFMADD231PS: vfmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rmb, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rmbk, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rmk, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rmkz, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rr, X86_INS_VFMADD231PS: vfmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rrk, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSZv231rrkz, X86_INS_VFMADD231PS: vfmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr132m, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr132mY, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr132r, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr132rY, X86_INS_VFMADD132PS: vfmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr213m, X86_INS_VFMADD213PS: vfmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr213mY, X86_INS_VFMADD213PS: vfmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr213r, X86_INS_VFMADD213PS: vfmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr213rY, X86_INS_VFMADD213PS: vfmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr231m, X86_INS_VFMADD231PS: vfmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr231mY, X86_INS_VFMADD231PS: vfmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr231r, X86_INS_VFMADD231PS: vfmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDPSr231rY, X86_INS_VFMADD231PS: vfmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSD4mr, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSD4mr_Int, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFMADDSD4rm, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSD4rm_Int, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSD4rr, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSD4rr_Int, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSD4rr_REV, X86_INS_VFMADDSD: vfmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDZm, X86_INS_VFMADD213SD: vfmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDZr, X86_INS_VFMADD213SD: vfmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDr132m, X86_INS_VFMADD132SD: vfmadd132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDr132r, X86_INS_VFMADD132SD: vfmadd132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDr213m, X86_INS_VFMADD213SD: vfmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDr213r, X86_INS_VFMADD213SD: vfmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDr231m, X86_INS_VFMADD231SD: vfmadd231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSDr231r, X86_INS_VFMADD231SD: vfmadd231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSS4mr, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSS4mr_Int, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFMADDSS4rm, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSS4rm_Int, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSS4rr, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSS4rr_Int, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSS4rr_REV, X86_INS_VFMADDSS: vfmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSZm, X86_INS_VFMADD213SS: vfmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSZr, X86_INS_VFMADD213SS: vfmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSr132m, X86_INS_VFMADD132SS: vfmadd132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSr132r, X86_INS_VFMADD132SS: vfmadd132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSr213m, X86_INS_VFMADD213SS: vfmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSr213r, X86_INS_VFMADD213SS: vfmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSr231m, X86_INS_VFMADD231SS: vfmadd231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSSr231r, X86_INS_VFMADD231SS: vfmadd231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PDZ128m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PDZ128mb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd {${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PDZ256m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PDZ256mb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PDZm, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PDZmb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PSZ128m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PSZ128mb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PSZ256m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PSZ256mb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PSZm, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUB132PSZmb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps {${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4mr, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4mrY, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4rm, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4rmY, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4rr, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4rrY, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4rrY_REV, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPD4rr_REV, X86_INS_VFMADDSUBPD: vfmaddsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ128v231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZ256v231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rrb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSUBPDZv213rrbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSUBPDZv213rrbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSUBPDZv213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDZv231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr132m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr132mY, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr132r, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr132rY, X86_INS_VFMADDSUB132PD: vfmaddsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr213m, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr213mY, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr213r, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr213rY, X86_INS_VFMADDSUB213PD: vfmaddsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr231m, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr231mY, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr231r, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPDr231rY, X86_INS_VFMADDSUB231PD: vfmaddsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4mr, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4mrY, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4rm, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4rmY, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4rr, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4rrY, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4rrY_REV, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPS4rr_REV, X86_INS_VFMADDSUBPS: vfmaddsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ128v231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZ256v231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rrb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSUBPSZv213rrbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSUBPSZv213rrbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMADDSUBPSZv213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSZv231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr132m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr132mY, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr132r, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr132rY, X86_INS_VFMADDSUB132PS: vfmaddsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr213m, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr213mY, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr213r, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr213rY, X86_INS_VFMADDSUB213PS: vfmaddsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr231m, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr231mY, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr231r, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMADDSUBPSr231rY, X86_INS_VFMADDSUB231PS: vfmaddsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PDZ128m, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PDZ128mb, X86_INS_VFMSUB132PD: vfmsub132pd {${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PDZ256m, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PDZ256mb, X86_INS_VFMSUB132PD: vfmsub132pd {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PDZm, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PDZmb, X86_INS_VFMSUB132PD: vfmsub132pd {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PSZ128m, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PSZ128mb, X86_INS_VFMSUB132PS: vfmsub132ps {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PSZ256m, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PSZ256mb, X86_INS_VFMSUB132PS: vfmsub132ps {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PSZm, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUB132PSZmb, X86_INS_VFMSUB132PS: vfmsub132ps {${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PDZ128m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PDZ128mb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd {${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PDZ256m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PDZ256mb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PDZm, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PDZmb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PSZ128m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PSZ128mb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PSZ256m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PSZ256mb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PSZm, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADD132PSZmb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps {${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4mr, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4mrY, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4rm, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4rmY, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4rr, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4rrY, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4rrY_REV, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPD4rr_REV, X86_INS_VFMSUBADDPD: vfmsubaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ128v231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZ256v231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rrb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBADDPDZv213rrbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBADDPDZv213rrbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBADDPDZv213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDZv231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr132m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr132mY, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr132r, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr132rY, X86_INS_VFMSUBADD132PD: vfmsubadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr213m, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr213mY, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr213r, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr213rY, X86_INS_VFMSUBADD213PD: vfmsubadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr231m, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr231mY, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr231r, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPDr231rY, X86_INS_VFMSUBADD231PD: vfmsubadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4mr, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4mrY, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4rm, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4rmY, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4rr, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4rrY, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4rrY_REV, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPS4rr_REV, X86_INS_VFMSUBADDPS: vfmsubaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ128v231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZ256v231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rrb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBADDPSZv213rrbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBADDPSZv213rrbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBADDPSZv213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSZv231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr132m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr132mY, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr132r, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr132rY, X86_INS_VFMSUBADD132PS: vfmsubadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr213m, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr213mY, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr213r, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr213rY, X86_INS_VFMSUBADD213PS: vfmsubadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr231m, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr231mY, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr231r, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBADDPSr231rY, X86_INS_VFMSUBADD231PS: vfmsubadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4mr, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4mrY, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4rm, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4rmY, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4rr, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4rrY, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4rrY_REV, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPD4rr_REV, X86_INS_VFMSUBPD: vfmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rm, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rmb, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rmk, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rr, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rrk, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rm, X86_INS_VFMSUB231PD: vfmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rmb, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rmk, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rr, X86_INS_VFMSUB231PD: vfmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rrk, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ128v231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rm, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rmb, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rmk, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rr, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rrk, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rm, X86_INS_VFMSUB231PD: vfmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rmb, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rmk, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rr, X86_INS_VFMSUB231PD: vfmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rrk, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZ256v231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rm, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rmb, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rmk, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rr, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rrb, X86_INS_VFMSUB213PD: vfmsub213pd $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBPDZv213rrbk, X86_INS_VFMSUB213PD: vfmsub213pd {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBPDZv213rrbkz, X86_INS_VFMSUB213PD: vfmsub213pd {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBPDZv213rrk, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rm, X86_INS_VFMSUB231PD: vfmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rmb, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rmk, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rr, X86_INS_VFMSUB231PD: vfmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rrk, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDZv231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr132m, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr132mY, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr132r, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr132rY, X86_INS_VFMSUB132PD: vfmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr213m, X86_INS_VFMSUB213PD: vfmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr213mY, X86_INS_VFMSUB213PD: vfmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr213r, X86_INS_VFMSUB213PD: vfmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr213rY, X86_INS_VFMSUB213PD: vfmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr231m, X86_INS_VFMSUB231PD: vfmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr231mY, X86_INS_VFMSUB231PD: vfmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr231r, X86_INS_VFMSUB231PD: vfmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPDr231rY, X86_INS_VFMSUB231PD: vfmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4mr, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4mrY, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4rm, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4rmY, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4rr, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4rrY, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4rrY_REV, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPS4rr_REV, X86_INS_VFMSUBPS: vfmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rm, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rmb, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rmk, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rr, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rrk, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rm, X86_INS_VFMSUB231PS: vfmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rmb, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rmk, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rr, X86_INS_VFMSUB231PS: vfmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rrk, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ128v231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rm, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rmb, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rmk, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rr, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rrk, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rm, X86_INS_VFMSUB231PS: vfmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rmb, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rmk, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rr, X86_INS_VFMSUB231PS: vfmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rrk, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZ256v231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rm, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rmb, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rmk, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rr, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rrb, X86_INS_VFMSUB213PS: vfmsub213ps $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBPSZv213rrbk, X86_INS_VFMSUB213PS: vfmsub213ps {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBPSZv213rrbkz, X86_INS_VFMSUB213PS: vfmsub213ps {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBPSZv213rrk, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rm, X86_INS_VFMSUB231PS: vfmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rmb, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rmk, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rr, X86_INS_VFMSUB231PS: vfmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rrk, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSZv231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr132m, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr132mY, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr132r, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr132rY, X86_INS_VFMSUB132PS: vfmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr213m, X86_INS_VFMSUB213PS: vfmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr213mY, X86_INS_VFMSUB213PS: vfmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr213r, X86_INS_VFMSUB213PS: vfmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr213rY, X86_INS_VFMSUB213PS: vfmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr231m, X86_INS_VFMSUB231PS: vfmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr231mY, X86_INS_VFMSUB231PS: vfmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr231r, X86_INS_VFMSUB231PS: vfmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBPSr231rY, X86_INS_VFMSUB231PS: vfmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSD4mr, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSD4mr_Int, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFMSUBSD4rm, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSD4rm_Int, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBSD4rr, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSD4rr_Int, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSD4rr_REV, X86_INS_VFMSUBSD: vfmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDZm, X86_INS_VFMSUB213SD: vfmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDZr, X86_INS_VFMSUB213SD: vfmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDr132m, X86_INS_VFMSUB132SD: vfmsub132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDr132r, X86_INS_VFMSUB132SD: vfmsub132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDr213m, X86_INS_VFMSUB213SD: vfmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDr213r, X86_INS_VFMSUB213SD: vfmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDr231m, X86_INS_VFMSUB231SD: vfmsub231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSDr231r, X86_INS_VFMSUB231SD: vfmsub231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSS4mr, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSS4mr_Int, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFMSUBSS4rm, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSS4rm_Int, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFMSUBSS4rr, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSS4rr_Int, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSS4rr_REV, X86_INS_VFMSUBSS: vfmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSZm, X86_INS_VFMSUB213SS: vfmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSZr, X86_INS_VFMSUB213SS: vfmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSr132m, X86_INS_VFMSUB132SS: vfmsub132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSr132r, X86_INS_VFMSUB132SS: vfmsub132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSr213m, X86_INS_VFMSUB213SS: vfmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSr213r, X86_INS_VFMSUB213SS: vfmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSr231m, X86_INS_VFMSUB231SS: vfmsub231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFMSUBSSr231r, X86_INS_VFMSUB231SS: vfmsub231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PDZ128m, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PDZ128mb, X86_INS_VFNMADD132PD: vfnmadd132pd {${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PDZ256m, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PDZ256mb, X86_INS_VFNMADD132PD: vfnmadd132pd {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PDZm, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PDZmb, X86_INS_VFNMADD132PD: vfnmadd132pd {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PSZ128m, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PSZ128mb, X86_INS_VFNMADD132PS: vfnmadd132ps {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PSZ256m, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PSZ256mb, X86_INS_VFNMADD132PS: vfnmadd132ps {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PSZm, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADD132PSZmb, X86_INS_VFNMADD132PS: vfnmadd132ps {${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4mr, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4mrY, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4rm, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4rmY, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4rr, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4rrY, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4rrY_REV, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPD4rr_REV, X86_INS_VFNMADDPD: vfnmaddpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rm, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rr, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rm, X86_INS_VFNMADD231PD: vfnmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rr, X86_INS_VFNMADD231PD: vfnmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ128v231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rm, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rr, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rm, X86_INS_VFNMADD231PD: vfnmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rr, X86_INS_VFNMADD231PD: vfnmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZ256v231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rm, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rr, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rrb, X86_INS_VFNMADD213PD: vfnmadd213pd $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDPDZv213rrbk, X86_INS_VFNMADD213PD: vfnmadd213pd {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDPDZv213rrbkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDPDZv213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rm, X86_INS_VFNMADD231PD: vfnmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rr, X86_INS_VFNMADD231PD: vfnmadd231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDZv231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr132m, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr132mY, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr132r, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr132rY, X86_INS_VFNMADD132PD: vfnmadd132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr213m, X86_INS_VFNMADD213PD: vfnmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr213mY, X86_INS_VFNMADD213PD: vfnmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr213r, X86_INS_VFNMADD213PD: vfnmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr213rY, X86_INS_VFNMADD213PD: vfnmadd213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr231m, X86_INS_VFNMADD231PD: vfnmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr231mY, X86_INS_VFNMADD231PD: vfnmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr231r, X86_INS_VFNMADD231PD: vfnmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPDr231rY, X86_INS_VFNMADD231PD: vfnmadd231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4mr, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4mrY, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4rm, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4rmY, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4rr, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4rrY, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4rrY_REV, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPS4rr_REV, X86_INS_VFNMADDPS: vfnmaddps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rm, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rr, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rm, X86_INS_VFNMADD231PS: vfnmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rr, X86_INS_VFNMADD231PS: vfnmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ128v231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rm, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rr, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rm, X86_INS_VFNMADD231PS: vfnmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rr, X86_INS_VFNMADD231PS: vfnmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZ256v231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rm, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rr, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rrb, X86_INS_VFNMADD213PS: vfnmadd213ps $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDPSZv213rrbk, X86_INS_VFNMADD213PS: vfnmadd213ps {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDPSZv213rrbkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDPSZv213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rm, X86_INS_VFNMADD231PS: vfnmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rr, X86_INS_VFNMADD231PS: vfnmadd231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSZv231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr132m, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr132mY, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr132r, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr132rY, X86_INS_VFNMADD132PS: vfnmadd132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr213m, X86_INS_VFNMADD213PS: vfnmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr213mY, X86_INS_VFNMADD213PS: vfnmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr213r, X86_INS_VFNMADD213PS: vfnmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr213rY, X86_INS_VFNMADD213PS: vfnmadd213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr231m, X86_INS_VFNMADD231PS: vfnmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr231mY, X86_INS_VFNMADD231PS: vfnmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr231r, X86_INS_VFNMADD231PS: vfnmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDPSr231rY, X86_INS_VFNMADD231PS: vfnmadd231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSD4mr, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSD4mr_Int, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFNMADDSD4rm, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSD4rm_Int, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDSD4rr, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSD4rr_Int, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSD4rr_REV, X86_INS_VFNMADDSD: vfnmaddsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDZm, X86_INS_VFNMADD213SD: vfnmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDZr, X86_INS_VFNMADD213SD: vfnmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDr132m, X86_INS_VFNMADD132SD: vfnmadd132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDr132r, X86_INS_VFNMADD132SD: vfnmadd132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDr213m, X86_INS_VFNMADD213SD: vfnmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDr213r, X86_INS_VFNMADD213SD: vfnmadd213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDr231m, X86_INS_VFNMADD231SD: vfnmadd231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSDr231r, X86_INS_VFNMADD231SD: vfnmadd231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSS4mr, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSS4mr_Int, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFNMADDSS4rm, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSS4rm_Int, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMADDSS4rr, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSS4rr_Int, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSS4rr_REV, X86_INS_VFNMADDSS: vfnmaddss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSZm, X86_INS_VFNMADD213SS: vfnmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSZr, X86_INS_VFNMADD213SS: vfnmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSr132m, X86_INS_VFNMADD132SS: vfnmadd132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSr132r, X86_INS_VFNMADD132SS: vfnmadd132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSr213m, X86_INS_VFNMADD213SS: vfnmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSr213r, X86_INS_VFNMADD213SS: vfnmadd213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSr231m, X86_INS_VFNMADD231SS: vfnmadd231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMADDSSr231r, X86_INS_VFNMADD231SS: vfnmadd231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PDZ128m, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PDZ128mb, X86_INS_VFNMSUB132PD: vfnmsub132pd {${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PDZ256m, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PDZ256mb, X86_INS_VFNMSUB132PD: vfnmsub132pd {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PDZm, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PDZmb, X86_INS_VFNMSUB132PD: vfnmsub132pd {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PSZ128m, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PSZ128mb, X86_INS_VFNMSUB132PS: vfnmsub132ps {${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PSZ256m, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PSZ256mb, X86_INS_VFNMSUB132PS: vfnmsub132ps {${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PSZm, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src3, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUB132PSZmb, X86_INS_VFNMSUB132PS: vfnmsub132ps {${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4mr, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4mrY, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4rm, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4rmY, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4rr, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4rrY, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4rrY_REV, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPD4rr_REV, X86_INS_VFNMSUBPD: vfnmsubpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ128v231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZ256v231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rrb, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBPDZv213rrbk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBPDZv213rrbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBPDZv213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDZv231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr132m, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr132mY, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr132r, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr132rY, X86_INS_VFNMSUB132PD: vfnmsub132pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr213m, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr213mY, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr213r, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr213rY, X86_INS_VFNMSUB213PD: vfnmsub213pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr231m, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr231mY, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr231r, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPDr231rY, X86_INS_VFNMSUB231PD: vfnmsub231pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4mr, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4mrY, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4rm, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4rmY, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4rr, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4rrY, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4rrY_REV, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPS4rr_REV, X86_INS_VFNMSUBPS: vfnmsubps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ128v231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZ256v231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rrb, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst , $src2, $src3, $rc */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBPSZv213rrbk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBPSZv213rrbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBPSZv213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst , $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSZv231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr132m, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr132mY, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr132r, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr132rY, X86_INS_VFNMSUB132PS: vfnmsub132ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr213m, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr213mY, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr213r, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr213rY, X86_INS_VFNMSUB213PS: vfnmsub213ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr231m, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr231mY, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr231r, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBPSr231rY, X86_INS_VFNMSUB231PS: vfnmsub231ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSD4mr, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSD4mr_Int, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSD4rm, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSD4rm_Int, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBSD4rr, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSD4rr_Int, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSD4rr_REV, X86_INS_VFNMSUBSD: vfnmsubsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDZm, X86_INS_VFNMSUB213SD: vfnmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDZr, X86_INS_VFNMSUB213SD: vfnmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDr132m, X86_INS_VFNMSUB132SD: vfnmsub132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDr132r, X86_INS_VFNMSUB132SD: vfnmsub132sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDr213m, X86_INS_VFNMSUB213SD: vfnmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDr213r, X86_INS_VFNMSUB213SD: vfnmsub213sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDr231m, X86_INS_VFNMSUB231SD: vfnmsub231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSDr231r, X86_INS_VFNMSUB231SD: vfnmsub231sd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSS4mr, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSS4mr_Int, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSS4rm, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSS4rm_Int, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VFNMSUBSS4rr, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSS4rr_Int, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSS4rr_REV, X86_INS_VFNMSUBSS: vfnmsubss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSZm, X86_INS_VFNMSUB213SS: vfnmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSZr, X86_INS_VFNMSUB213SS: vfnmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSr132m, X86_INS_VFNMSUB132SS: vfnmsub132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSr132r, X86_INS_VFNMSUB132SS: vfnmsub132ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSr213m, X86_INS_VFNMSUB213SS: vfnmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSr213r, X86_INS_VFNMSUB213SS: vfnmsub213ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSr231m, X86_INS_VFNMSUB231SS: vfnmsub231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFNMSUBSSr231r, X86_INS_VFNMSUB231SS: vfnmsub231ss $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFRCZPDrm, X86_INS_VFRCZPD: vfrczpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPDrmY, X86_INS_VFRCZPD: vfrczpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPDrr, X86_INS_VFRCZPD: vfrczpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPDrrY, X86_INS_VFRCZPD: vfrczpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPSrm, X86_INS_VFRCZPS: vfrczps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPSrmY, X86_INS_VFRCZPS: vfrczps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPSrr, X86_INS_VFRCZPS: vfrczps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZPSrrY, X86_INS_VFRCZPS: vfrczps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZSDrm, X86_INS_VFRCZSD: vfrczsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VFRCZSDrr, X86_INS_VFRCZSD: vfrczsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFRCZSSrm, X86_INS_VFRCZSS: vfrczss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_VFRCZSSrr, X86_INS_VFRCZSS: vfrczss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VFsANDNPDrm, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDNPDrr, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDNPSrm, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDNPSrr, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDPDrm, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDPDrr, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDPSrm, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsANDPSrr, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsORPDrm, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsORPDrr, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsORPSrm, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsORPSrr, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsXORPDrm, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsXORPDrr, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsXORPSrm, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFsXORPSrr, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDNPDrm, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDNPDrr, X86_INS_VANDNPD: vandnpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDNPSrm, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDNPSrr, X86_INS_VANDNPS: vandnps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDPDrm, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDPDrr, X86_INS_VANDPD: vandpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDPSrm, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvANDPSrr, X86_INS_VANDPS: vandps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvORPDrm, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvORPDrr, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvORPSrm, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvORPSrr, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvXORPDrm, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvXORPDrr, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvXORPSrm, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VFvXORPSrr, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERDPDYrm, X86_INS_VGATHERDPD: vgatherdpd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERDPDZrm, X86_INS_VGATHERDPD: vgatherdpd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VGATHERDPDrm, X86_INS_VGATHERDPD: vgatherdpd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERDPSYrm, X86_INS_VGATHERDPS: vgatherdps $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERDPSZrm, X86_INS_VGATHERDPS: vgatherdps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VGATHERDPSrm, X86_INS_VGATHERDPS: vgatherdps $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERPF0DPDm, X86_INS_VGATHERPF0DPD: vgatherpf0dpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF0DPSm, X86_INS_VGATHERPF0DPS: vgatherpf0dps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF0QPDm, X86_INS_VGATHERPF0QPD: vgatherpf0qpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF0QPSm, X86_INS_VGATHERPF0QPS: vgatherpf0qps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF1DPDm, X86_INS_VGATHERPF1DPD: vgatherpf1dpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF1DPSm, X86_INS_VGATHERPF1DPS: vgatherpf1dps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF1QPDm, X86_INS_VGATHERPF1QPD: vgatherpf1qpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERPF1QPSm, X86_INS_VGATHERPF1QPS: vgatherpf1qps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VGATHERQPDYrm, X86_INS_VGATHERQPD: vgatherqpd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERQPDZrm, X86_INS_VGATHERQPD: vgatherqpd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VGATHERQPDrm, X86_INS_VGATHERQPD: vgatherqpd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERQPSYrm, X86_INS_VGATHERQPS: vgatherqps $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VGATHERQPSZrm, X86_INS_VGATHERQPS: vgatherqps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VGATHERQPSrm, X86_INS_VGATHERQPS: vgatherqps $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPDYrm, X86_INS_VHADDPD: vhaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPDYrr, X86_INS_VHADDPD: vhaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPDrm, X86_INS_VHADDPD: vhaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPDrr, X86_INS_VHADDPD: vhaddpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPSYrm, X86_INS_VHADDPS: vhaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPSYrr, X86_INS_VHADDPS: vhaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPSrm, X86_INS_VHADDPS: vhaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHADDPSrr, X86_INS_VHADDPS: vhaddps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPDYrm, X86_INS_VHSUBPD: vhsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPDYrr, X86_INS_VHSUBPD: vhsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPDrm, X86_INS_VHSUBPD: vhsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPDrr, X86_INS_VHSUBPD: vhsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPSYrm, X86_INS_VHSUBPS: vhsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPSYrr, X86_INS_VHSUBPS: vhsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPSrm, X86_INS_VHSUBPS: vhsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VHSUBPSrr, X86_INS_VHSUBPS: vhsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VINSERTF128rm, X86_INS_VINSERTF128: vinsertf128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF128rr, X86_INS_VINSERTF128: vinsertf128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF32x4rm, X86_INS_VINSERTF32X4: vinsertf32x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF32x4rr, X86_INS_VINSERTF32X4: vinsertf32x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF32x8rm, X86_INS_VINSERTF32X8: vinsertf32x8 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF32x8rr, X86_INS_VINSERTF32X8: vinsertf32x8 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF64x2rm, X86_INS_VINSERTF64X2: vinsertf64x2 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF64x2rr, X86_INS_VINSERTF64X2: vinsertf64x2 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF64x4rm, X86_INS_VINSERTF64X4: vinsertf64x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTF64x4rr, X86_INS_VINSERTF64X4: vinsertf64x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI128rm, X86_INS_VINSERTI128: vinserti128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI128rr, X86_INS_VINSERTI128: vinserti128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI32x4rm, X86_INS_VINSERTI32X4: vinserti32x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI32x4rr, X86_INS_VINSERTI32X4: vinserti32x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI32x8rm, X86_INS_VINSERTI32X8: vinserti32x8 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI32x8rr, X86_INS_VINSERTI32X8: vinserti32x8 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI64x2rm, X86_INS_VINSERTI64X2: vinserti64x2 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI64x2rr, X86_INS_VINSERTI64X2: vinserti64x2 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI64x4rm, X86_INS_VINSERTI64X4: vinserti64x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTI64x4rr, X86_INS_VINSERTI64X4: vinserti64x4 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTPSrm, X86_INS_VINSERTPS: vinsertps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTPSrr, X86_INS_VINSERTPS: vinsertps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTPSzrm, X86_INS_VINSERTPS: vinsertps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VINSERTPSzrr, X86_INS_VINSERTPS: vinsertps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VLDDQUYrm, X86_INS_VLDDQU: vlddqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VLDDQUrm, X86_INS_VLDDQU: vlddqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VLDMXCSR, X86_INS_VLDMXCSR: vldmxcsr $src */ 0, { CS_AC_READ, 0 } }, { /* X86_VMASKMOVDQU, X86_INS_VMASKMOVDQU: vmaskmovdqu $src, $mask */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVDQU64, X86_INS_VMASKMOVDQU: vmaskmovdqu $src, $mask */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPDYmr, X86_INS_VMASKMOVPD: vmaskmovpd $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPDYrm, X86_INS_VMASKMOVPD: vmaskmovpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPDmr, X86_INS_VMASKMOVPD: vmaskmovpd $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPDrm, X86_INS_VMASKMOVPD: vmaskmovpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPSYmr, X86_INS_VMASKMOVPS: vmaskmovps $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPSYrm, X86_INS_VMASKMOVPS: vmaskmovps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPSmr, X86_INS_VMASKMOVPS: vmaskmovps $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMASKMOVPSrm, X86_INS_VMASKMOVPS: vmaskmovps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPDYrm, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPDYrr, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPDrm, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPDrr, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPSYrm, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPSYrr, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPSrm, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCPSrr, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCSDrm, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCSDrr, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCSSrm, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXCSSrr, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDYrm, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDYrr, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rm, X86_INS_VMAXPD: vmaxpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rmb, X86_INS_VMAXPD: vmaxpd {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rmbk, X86_INS_VMAXPD: vmaxpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rmbkz, X86_INS_VMAXPD: vmaxpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rmk, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rmkz, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rr, X86_INS_VMAXPD: vmaxpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rrk, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ128rrkz, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rm, X86_INS_VMAXPD: vmaxpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rmb, X86_INS_VMAXPD: vmaxpd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rmbk, X86_INS_VMAXPD: vmaxpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rmbkz, X86_INS_VMAXPD: vmaxpd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rmk, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rmkz, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rr, X86_INS_VMAXPD: vmaxpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rrk, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZ256rrkz, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrm, X86_INS_VMAXPD: vmaxpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrmb, X86_INS_VMAXPD: vmaxpd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrmbk, X86_INS_VMAXPD: vmaxpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrmbkz, X86_INS_VMAXPD: vmaxpd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrmk, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrmkz, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrr, X86_INS_VMAXPD: vmaxpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrrk, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDZrrkz, X86_INS_VMAXPD: vmaxpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDrm, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPDrr, X86_INS_VMAXPD: vmaxpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSYrm, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSYrr, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rm, X86_INS_VMAXPS: vmaxps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rmb, X86_INS_VMAXPS: vmaxps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rmbk, X86_INS_VMAXPS: vmaxps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rmbkz, X86_INS_VMAXPS: vmaxps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rmk, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rmkz, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rr, X86_INS_VMAXPS: vmaxps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rrk, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ128rrkz, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rm, X86_INS_VMAXPS: vmaxps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rmb, X86_INS_VMAXPS: vmaxps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rmbk, X86_INS_VMAXPS: vmaxps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rmbkz, X86_INS_VMAXPS: vmaxps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rmk, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rmkz, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rr, X86_INS_VMAXPS: vmaxps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rrk, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZ256rrkz, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrm, X86_INS_VMAXPS: vmaxps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrmb, X86_INS_VMAXPS: vmaxps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrmbk, X86_INS_VMAXPS: vmaxps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrmbkz, X86_INS_VMAXPS: vmaxps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrmk, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrmkz, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrr, X86_INS_VMAXPS: vmaxps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrrk, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSZrrkz, X86_INS_VMAXPS: vmaxps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSrm, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXPSrr, X86_INS_VMAXPS: vmaxps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrm, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrm_Int, X86_INS_VMAXSD: vmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrm_Intk, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrm_Intkz, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrr, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrr_Int, X86_INS_VMAXSD: vmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrr_Intk, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrr_Intkz, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrrb, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrrbk, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDZrrbkz, X86_INS_VMAXSD: vmaxsd {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDrm, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDrm_Int, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMAXSDrr, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSDrr_Int, X86_INS_VMAXSD: vmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrm, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrm_Int, X86_INS_VMAXSS: vmaxss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrm_Intk, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrm_Intkz, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrr, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrr_Int, X86_INS_VMAXSS: vmaxss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrr_Intk, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrr_Intkz, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrrb, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrrbk, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSZrrbkz, X86_INS_VMAXSS: vmaxss {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSrm, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSrm_Int, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMAXSSrr, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMAXSSrr_Int, X86_INS_VMAXSS: vmaxss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMCALL, X86_INS_VMCALL: vmcall */ 0, { 0 } }, { /* X86_VMCLEARm, X86_INS_VMCLEAR: vmclear $vmcs */ 0, { CS_AC_READ, 0 } }, { /* X86_VMFUNC, X86_INS_VMFUNC: vmfunc */ 0, { 0 } }, { /* X86_VMINCPDYrm, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPDYrr, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPDrm, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPDrr, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPSYrm, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPSYrr, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPSrm, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCPSrr, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCSDrm, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCSDrr, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCSSrm, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINCSSrr, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDYrm, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDYrr, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rm, X86_INS_VMINPD: vminpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rmb, X86_INS_VMINPD: vminpd {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rmbk, X86_INS_VMINPD: vminpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rmbkz, X86_INS_VMINPD: vminpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rmk, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rmkz, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rr, X86_INS_VMINPD: vminpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rrk, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ128rrkz, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rm, X86_INS_VMINPD: vminpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rmb, X86_INS_VMINPD: vminpd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rmbk, X86_INS_VMINPD: vminpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rmbkz, X86_INS_VMINPD: vminpd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rmk, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rmkz, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rr, X86_INS_VMINPD: vminpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rrk, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZ256rrkz, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrm, X86_INS_VMINPD: vminpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrmb, X86_INS_VMINPD: vminpd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrmbk, X86_INS_VMINPD: vminpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrmbkz, X86_INS_VMINPD: vminpd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrmk, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrmkz, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrr, X86_INS_VMINPD: vminpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrrk, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDZrrkz, X86_INS_VMINPD: vminpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDrm, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPDrr, X86_INS_VMINPD: vminpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSYrm, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSYrr, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rm, X86_INS_VMINPS: vminps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rmb, X86_INS_VMINPS: vminps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rmbk, X86_INS_VMINPS: vminps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rmbkz, X86_INS_VMINPS: vminps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rmk, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rmkz, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rr, X86_INS_VMINPS: vminps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rrk, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ128rrkz, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rm, X86_INS_VMINPS: vminps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rmb, X86_INS_VMINPS: vminps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rmbk, X86_INS_VMINPS: vminps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rmbkz, X86_INS_VMINPS: vminps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rmk, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rmkz, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rr, X86_INS_VMINPS: vminps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rrk, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZ256rrkz, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrm, X86_INS_VMINPS: vminps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrmb, X86_INS_VMINPS: vminps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrmbk, X86_INS_VMINPS: vminps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrmbkz, X86_INS_VMINPS: vminps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrmk, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrmkz, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrr, X86_INS_VMINPS: vminps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrrk, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSZrrkz, X86_INS_VMINPS: vminps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSrm, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINPSrr, X86_INS_VMINPS: vminps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrm, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrm_Int, X86_INS_VMINSD: vminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrm_Intk, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrm_Intkz, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrr, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrr_Int, X86_INS_VMINSD: vminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrr_Intk, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrr_Intkz, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrrb, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrrbk, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDZrrbkz, X86_INS_VMINSD: vminsd {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDrm, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDrm_Int, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMINSDrr, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSDrr_Int, X86_INS_VMINSD: vminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrm, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrm_Int, X86_INS_VMINSS: vminss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrm_Intk, X86_INS_VMINSS: vminss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrm_Intkz, X86_INS_VMINSS: vminss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrr, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrr_Int, X86_INS_VMINSS: vminss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrr_Intk, X86_INS_VMINSS: vminss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrr_Intkz, X86_INS_VMINSS: vminss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrrb, X86_INS_VMINSS: vminss {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrrbk, X86_INS_VMINSS: vminss {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSZrrbkz, X86_INS_VMINSS: vminss {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSrm, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSrm_Int, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMINSSrr, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMINSSrr_Int, X86_INS_VMINSS: vminss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMLAUNCH, X86_INS_VMLAUNCH: vmlaunch */ 0, { 0 } }, { /* X86_VMLOAD32, X86_INS_VMLOAD: vmload eax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMLOAD64, X86_INS_VMLOAD: vmload rax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMMCALL, X86_INS_VMMCALL: vmmcall */ 0, { 0 } }, { /* X86_VMOV64toPQIZrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOV64toPQIrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOV64toPQIrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOV64toSDZrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOV64toSDrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOV64toSDrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDYmr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDYrm, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDYrr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDYrr_REV, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128mr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128mrk, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rm, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rmk, X86_INS_VMOVAPD: vmovapd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rmkz, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rr_alt, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rrk, X86_INS_VMOVAPD: vmovapd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rrk_alt, X86_INS_VMOVAPD: vmovapd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rrkz, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ128rrkz_alt, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256mr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256mrk, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rm, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rmk, X86_INS_VMOVAPD: vmovapd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rmkz, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rr_alt, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rrk, X86_INS_VMOVAPD: vmovapd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rrk_alt, X86_INS_VMOVAPD: vmovapd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rrkz, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZ256rrkz_alt, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZmr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZmrk, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrm, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrmk, X86_INS_VMOVAPD: vmovapd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrmkz, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrr_alt, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrrk, X86_INS_VMOVAPD: vmovapd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrrk_alt, X86_INS_VMOVAPD: vmovapd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrrkz, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDZrrkz_alt, X86_INS_VMOVAPD: vmovapd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDmr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPDrm, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDrr, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPDrr_REV, X86_INS_VMOVAPD: vmovapd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSYmr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSYrm, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSYrr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSYrr_REV, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128mr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128mrk, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rm, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rmk, X86_INS_VMOVAPS: vmovaps {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rmkz, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rr_alt, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rrk, X86_INS_VMOVAPS: vmovaps {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rrk_alt, X86_INS_VMOVAPS: vmovaps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rrkz, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ128rrkz_alt, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256mr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256mrk, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rm, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rmk, X86_INS_VMOVAPS: vmovaps {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rmkz, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rr_alt, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rrk, X86_INS_VMOVAPS: vmovaps {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rrk_alt, X86_INS_VMOVAPS: vmovaps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rrkz, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZ256rrkz_alt, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZmr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZmrk, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrm, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrmk, X86_INS_VMOVAPS: vmovaps {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrmkz, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrr_alt, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrrk, X86_INS_VMOVAPS: vmovaps {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrrk_alt, X86_INS_VMOVAPS: vmovaps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrrkz, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSZrrkz_alt, X86_INS_VMOVAPS: vmovaps {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSmr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVAPSrm, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSrr, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVAPSrr_REV, X86_INS_VMOVAPS: vmovaps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDDUPYrm, X86_INS_VMOVDDUP: vmovddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDDUPYrr, X86_INS_VMOVDDUP: vmovddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDDUPZrm, X86_INS_VMOVDDUP: vmovddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDDUPZrr, X86_INS_VMOVDDUP: vmovddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDDUPrm, X86_INS_VMOVDDUP: vmovddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDDUPrr, X86_INS_VMOVDDUP: vmovddup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2PDIZrm, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2PDIZrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2PDIrm, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2PDIrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2SSZrm, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2SSZrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2SSrm, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDI2SSrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128mr, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128mrk, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rm, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rmk, X86_INS_VMOVDQA32: vmovdqa32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rmkz, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rr, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rr_alt, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rrk, X86_INS_VMOVDQA32: vmovdqa32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rrk_alt, X86_INS_VMOVDQA32: vmovdqa32 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rrkz, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z128rrkz_alt, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256mr, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256mrk, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rm, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rmk, X86_INS_VMOVDQA32: vmovdqa32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rmkz, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rr, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rr_alt, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rrk, X86_INS_VMOVDQA32: vmovdqa32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rrk_alt, X86_INS_VMOVDQA32: vmovdqa32 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rrkz, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Z256rrkz_alt, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zmr, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zmrk, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrm, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrmk, X86_INS_VMOVDQA32: vmovdqa32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrmkz, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrr, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrr_alt, X86_INS_VMOVDQA32: vmovdqa32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrrk, X86_INS_VMOVDQA32: vmovdqa32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrrk_alt, X86_INS_VMOVDQA32: vmovdqa32 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrrkz, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA32Zrrkz_alt, X86_INS_VMOVDQA32: vmovdqa32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128mr, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128mrk, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rm, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rmk, X86_INS_VMOVDQA64: vmovdqa64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rmkz, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rr, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rr_alt, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rrk, X86_INS_VMOVDQA64: vmovdqa64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rrk_alt, X86_INS_VMOVDQA64: vmovdqa64 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rrkz, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z128rrkz_alt, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256mr, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256mrk, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rm, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rmk, X86_INS_VMOVDQA64: vmovdqa64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rmkz, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rr, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rr_alt, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rrk, X86_INS_VMOVDQA64: vmovdqa64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rrk_alt, X86_INS_VMOVDQA64: vmovdqa64 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rrkz, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Z256rrkz_alt, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zmr, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zmrk, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrm, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrmk, X86_INS_VMOVDQA64: vmovdqa64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrmkz, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrr, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrr_alt, X86_INS_VMOVDQA64: vmovdqa64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrrk, X86_INS_VMOVDQA64: vmovdqa64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrrk_alt, X86_INS_VMOVDQA64: vmovdqa64 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrrkz, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQA64Zrrkz_alt, X86_INS_VMOVDQA64: vmovdqa64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQAYmr, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQAYrm, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQAYrr, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQAYrr_REV, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQAmr, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQArm, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQArr, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQArr_REV, X86_INS_VMOVDQA: vmovdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128mr, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128mrk, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rm, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rmk, X86_INS_VMOVDQU16: vmovdqu16 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rmkz, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rr, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rr_alt, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rrk, X86_INS_VMOVDQU16: vmovdqu16 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rrk_alt, X86_INS_VMOVDQU16: vmovdqu16 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rrkz, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z128rrkz_alt, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256mr, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256mrk, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rm, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rmk, X86_INS_VMOVDQU16: vmovdqu16 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rmkz, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rr, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rr_alt, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rrk, X86_INS_VMOVDQU16: vmovdqu16 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rrk_alt, X86_INS_VMOVDQU16: vmovdqu16 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rrkz, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Z256rrkz_alt, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zmr, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zmrk, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrm, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrmk, X86_INS_VMOVDQU16: vmovdqu16 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrmkz, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrr, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrr_alt, X86_INS_VMOVDQU16: vmovdqu16 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrrk, X86_INS_VMOVDQU16: vmovdqu16 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrrk_alt, X86_INS_VMOVDQU16: vmovdqu16 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrrkz, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU16Zrrkz_alt, X86_INS_VMOVDQU16: vmovdqu16 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128mr, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128mrk, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rm, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rmk, X86_INS_VMOVDQU32: vmovdqu32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rmkz, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rr, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rr_alt, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rrk, X86_INS_VMOVDQU32: vmovdqu32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rrk_alt, X86_INS_VMOVDQU32: vmovdqu32 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rrkz, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z128rrkz_alt, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256mr, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256mrk, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rm, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rmk, X86_INS_VMOVDQU32: vmovdqu32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rmkz, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rr, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rr_alt, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rrk, X86_INS_VMOVDQU32: vmovdqu32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rrk_alt, X86_INS_VMOVDQU32: vmovdqu32 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rrkz, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Z256rrkz_alt, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zmr, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zmrk, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrm, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrmk, X86_INS_VMOVDQU32: vmovdqu32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrmkz, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrr, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrr_alt, X86_INS_VMOVDQU32: vmovdqu32 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrrk, X86_INS_VMOVDQU32: vmovdqu32 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrrk_alt, X86_INS_VMOVDQU32: vmovdqu32 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrrkz, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU32Zrrkz_alt, X86_INS_VMOVDQU32: vmovdqu32 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128mr, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128mrk, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rm, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rmk, X86_INS_VMOVDQU64: vmovdqu64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rmkz, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rr, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rr_alt, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rrk, X86_INS_VMOVDQU64: vmovdqu64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rrk_alt, X86_INS_VMOVDQU64: vmovdqu64 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rrkz, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z128rrkz_alt, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256mr, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256mrk, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rm, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rmk, X86_INS_VMOVDQU64: vmovdqu64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rmkz, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rr, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rr_alt, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rrk, X86_INS_VMOVDQU64: vmovdqu64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rrk_alt, X86_INS_VMOVDQU64: vmovdqu64 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rrkz, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Z256rrkz_alt, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zmr, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zmrk, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrm, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrmk, X86_INS_VMOVDQU64: vmovdqu64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrmkz, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrr, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrr_alt, X86_INS_VMOVDQU64: vmovdqu64 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrrk, X86_INS_VMOVDQU64: vmovdqu64 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrrk_alt, X86_INS_VMOVDQU64: vmovdqu64 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrrkz, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU64Zrrkz_alt, X86_INS_VMOVDQU64: vmovdqu64 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128mr, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128mrk, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rm, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rmk, X86_INS_VMOVDQU8: vmovdqu8 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rmkz, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rr, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rr_alt, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rrk, X86_INS_VMOVDQU8: vmovdqu8 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rrk_alt, X86_INS_VMOVDQU8: vmovdqu8 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rrkz, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z128rrkz_alt, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256mr, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256mrk, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rm, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rmk, X86_INS_VMOVDQU8: vmovdqu8 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rmkz, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rr, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rr_alt, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rrk, X86_INS_VMOVDQU8: vmovdqu8 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rrk_alt, X86_INS_VMOVDQU8: vmovdqu8 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rrkz, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Z256rrkz_alt, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zmr, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zmrk, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrm, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrmk, X86_INS_VMOVDQU8: vmovdqu8 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrmkz, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrr, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrr_alt, X86_INS_VMOVDQU8: vmovdqu8 $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrrk, X86_INS_VMOVDQU8: vmovdqu8 {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrrk_alt, X86_INS_VMOVDQU8: vmovdqu8 {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrrkz, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQU8Zrrkz_alt, X86_INS_VMOVDQU8: vmovdqu8 {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQUYmr, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQUYrm, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQUYrr, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQUYrr_REV, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQUmr, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVDQUrm, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQUrr, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVDQUrr_REV, X86_INS_VMOVDQU: vmovdqu $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVHLPSZrr, X86_INS_VMOVHLPS: vmovhlps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVHLPSrr, X86_INS_VMOVHLPS: vmovhlps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVHPDmr, X86_INS_VMOVHPD: vmovhpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVHPDrm, X86_INS_VMOVHPD: vmovhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVHPSmr, X86_INS_VMOVHPS: vmovhps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVHPSrm, X86_INS_VMOVHPS: vmovhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVLHPSZrr, X86_INS_VMOVLHPS: vmovlhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVLHPSrr, X86_INS_VMOVLHPS: vmovlhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVLPDmr, X86_INS_VMOVLPD: vmovlpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVLPDrm, X86_INS_VMOVLPD: vmovlpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVLPSmr, X86_INS_VMOVLPS: vmovlps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVLPSrm, X86_INS_VMOVLPS: vmovlps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVMSKPDYrr, X86_INS_VMOVMSKPD: vmovmskpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVMSKPDrr, X86_INS_VMOVMSKPD: vmovmskpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVMSKPSYrr, X86_INS_VMOVMSKPS: vmovmskps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVMSKPSrr, X86_INS_VMOVMSKPS: vmovmskps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQAYrm, X86_INS_VMOVNTDQA: vmovntdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQAZ128rm, X86_INS_VMOVNTDQA: vmovntdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQAZ256rm, X86_INS_VMOVNTDQA: vmovntdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQAZrm, X86_INS_VMOVNTDQA: vmovntdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQArm, X86_INS_VMOVNTDQA: vmovntdqa $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQYmr, X86_INS_VMOVNTDQ: vmovntdq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQZ128mr, X86_INS_VMOVNTDQ: vmovntdq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQZ256mr, X86_INS_VMOVNTDQ: vmovntdq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQZmr, X86_INS_VMOVNTDQ: vmovntdq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTDQmr, X86_INS_VMOVNTDQ: vmovntdq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPDYmr, X86_INS_VMOVNTPD: vmovntpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPDZ128mr, X86_INS_VMOVNTPD: vmovntpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPDZ256mr, X86_INS_VMOVNTPD: vmovntpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPDZmr, X86_INS_VMOVNTPD: vmovntpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPDmr, X86_INS_VMOVNTPD: vmovntpd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPSYmr, X86_INS_VMOVNTPS: vmovntps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPSZ128mr, X86_INS_VMOVNTPS: vmovntps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPSZ256mr, X86_INS_VMOVNTPS: vmovntps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPSZmr, X86_INS_VMOVNTPS: vmovntps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVNTPSmr, X86_INS_VMOVNTPS: vmovntps $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVPDI2DIZmr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVPDI2DIZrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVPDI2DImr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVPDI2DIrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVPQI2QImr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVPQI2QIrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVPQIto64Zmr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVPQIto64Zrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVPQIto64rm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVPQIto64rr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVQI2PQIZrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVQI2PQIrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSDZmr, X86_INS_VMOVSD: vmovsd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDZmrk, X86_INS_VMOVSD: vmovsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDZrm, X86_INS_VMOVSD: vmovsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSDZrr, X86_INS_VMOVSD: vmovsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDZrr_REV, X86_INS_VMOVSD: vmovsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDZrrk, X86_INS_VMOVSD: vmovsd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDmr, X86_INS_VMOVSD: vmovsd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDrm, X86_INS_VMOVSD: vmovsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSDrr, X86_INS_VMOVSD: vmovsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDrr_REV, X86_INS_VMOVSD: vmovsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDto64Zmr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDto64Zrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSDto64mr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSDto64rr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSHDUPYrm, X86_INS_VMOVSHDUP: vmovshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSHDUPYrr, X86_INS_VMOVSHDUP: vmovshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSHDUPZrm, X86_INS_VMOVSHDUP: vmovshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSHDUPZrr, X86_INS_VMOVSHDUP: vmovshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSHDUPrm, X86_INS_VMOVSHDUP: vmovshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSHDUPrr, X86_INS_VMOVSHDUP: vmovshdup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSLDUPYrm, X86_INS_VMOVSLDUP: vmovsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSLDUPYrr, X86_INS_VMOVSLDUP: vmovsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSLDUPZrm, X86_INS_VMOVSLDUP: vmovsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSLDUPZrr, X86_INS_VMOVSLDUP: vmovsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSLDUPrm, X86_INS_VMOVSLDUP: vmovsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSLDUPrr, X86_INS_VMOVSLDUP: vmovsldup $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSS2DIZmr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSS2DIZrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSS2DImr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSS2DIrr, X86_INS_VMOVD: vmovd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSSZmr, X86_INS_VMOVSS: vmovss $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSZmrk, X86_INS_VMOVSS: vmovss {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSZrm, X86_INS_VMOVSS: vmovss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSSZrr, X86_INS_VMOVSS: vmovss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSZrr_REV, X86_INS_VMOVSS: vmovss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSZrrk, X86_INS_VMOVSS: vmovss {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSmr, X86_INS_VMOVSS: vmovss $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSrm, X86_INS_VMOVSS: vmovss $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVSSrr, X86_INS_VMOVSS: vmovss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVSSrr_REV, X86_INS_VMOVSS: vmovss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDYmr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDYrm, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDYrr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDYrr_REV, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128mr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128mrk, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rm, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rmk, X86_INS_VMOVUPD: vmovupd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rmkz, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rr_alt, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rrk, X86_INS_VMOVUPD: vmovupd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rrk_alt, X86_INS_VMOVUPD: vmovupd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rrkz, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ128rrkz_alt, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256mr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256mrk, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rm, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rmk, X86_INS_VMOVUPD: vmovupd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rmkz, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rr_alt, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rrk, X86_INS_VMOVUPD: vmovupd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rrk_alt, X86_INS_VMOVUPD: vmovupd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rrkz, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZ256rrkz_alt, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZmr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZmrk, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrm, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrmk, X86_INS_VMOVUPD: vmovupd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrmkz, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrr_alt, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrrk, X86_INS_VMOVUPD: vmovupd {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrrk_alt, X86_INS_VMOVUPD: vmovupd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrrkz, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDZrrkz_alt, X86_INS_VMOVUPD: vmovupd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDmr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPDrm, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDrr, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPDrr_REV, X86_INS_VMOVUPD: vmovupd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSYmr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSYrm, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSYrr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSYrr_REV, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128mr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128mrk, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rm, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rmk, X86_INS_VMOVUPS: vmovups {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rmkz, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rr_alt, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rrk, X86_INS_VMOVUPS: vmovups {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rrk_alt, X86_INS_VMOVUPS: vmovups {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rrkz, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ128rrkz_alt, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256mr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256mrk, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rm, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rmk, X86_INS_VMOVUPS: vmovups {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rmkz, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rr_alt, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rrk, X86_INS_VMOVUPS: vmovups {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rrk_alt, X86_INS_VMOVUPS: vmovups {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rrkz, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZ256rrkz_alt, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZmr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZmrk, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrm, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrmk, X86_INS_VMOVUPS: vmovups {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrmkz, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrr_alt, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrrk, X86_INS_VMOVUPS: vmovups {$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrrk_alt, X86_INS_VMOVUPS: vmovups {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrrkz, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSZrrkz_alt, X86_INS_VMOVUPS: vmovups {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSmr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMOVUPSrm, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSrr, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVUPSrr_REV, X86_INS_VMOVUPS: vmovups $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVZPQILo2PQIZrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVZPQILo2PQIZrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVZPQILo2PQIrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVZPQILo2PQIrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVZQI2PQIrm, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMOVZQI2PQIrr, X86_INS_VMOVQ: vmovq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMPSADBWYrmi, X86_INS_VMPSADBW: vmpsadbw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMPSADBWYrri, X86_INS_VMPSADBW: vmpsadbw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMPSADBWrmi, X86_INS_VMPSADBW: vmpsadbw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMPSADBWrri, X86_INS_VMPSADBW: vmpsadbw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMPTRLDm, X86_INS_VMPTRLD: vmptrld $vmcs */ 0, { CS_AC_READ, 0 } }, { /* X86_VMPTRSTm, X86_INS_VMPTRST: vmptrst $vmcs */ 0, { CS_AC_WRITE, 0 } }, { /* X86_VMREAD32rm, X86_INS_VMREAD: vmread{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMREAD32rr, X86_INS_VMREAD: vmread{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMREAD64rm, X86_INS_VMREAD: vmread{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMREAD64rr, X86_INS_VMREAD: vmread{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMRESUME, X86_INS_VMRESUME: vmresume */ 0, { 0 } }, { /* X86_VMRUN32, X86_INS_VMRUN: vmrun eax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMRUN64, X86_INS_VMRUN: vmrun rax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMSAVE32, X86_INS_VMSAVE: vmsave eax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMSAVE64, X86_INS_VMSAVE: vmsave rax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMULPDYrm, X86_INS_VMULPD: vmulpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDYrr, X86_INS_VMULPD: vmulpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rm, X86_INS_VMULPD: vmulpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rmb, X86_INS_VMULPD: vmulpd {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rmbk, X86_INS_VMULPD: vmulpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rmbkz, X86_INS_VMULPD: vmulpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rmk, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rmkz, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rr, X86_INS_VMULPD: vmulpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rrk, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ128rrkz, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rm, X86_INS_VMULPD: vmulpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rmb, X86_INS_VMULPD: vmulpd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rmbk, X86_INS_VMULPD: vmulpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rmbkz, X86_INS_VMULPD: vmulpd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rmk, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rmkz, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rr, X86_INS_VMULPD: vmulpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rrk, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZ256rrkz, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrb, X86_INS_VMULPD: vmulpd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULPDZrbk, X86_INS_VMULPD: vmulpd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULPDZrbkz, X86_INS_VMULPD: vmulpd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULPDZrm, X86_INS_VMULPD: vmulpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrmb, X86_INS_VMULPD: vmulpd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrmbk, X86_INS_VMULPD: vmulpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrmbkz, X86_INS_VMULPD: vmulpd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrmk, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrmkz, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrr, X86_INS_VMULPD: vmulpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrrk, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDZrrkz, X86_INS_VMULPD: vmulpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDrm, X86_INS_VMULPD: vmulpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPDrr, X86_INS_VMULPD: vmulpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSYrm, X86_INS_VMULPS: vmulps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSYrr, X86_INS_VMULPS: vmulps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rm, X86_INS_VMULPS: vmulps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rmb, X86_INS_VMULPS: vmulps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rmbk, X86_INS_VMULPS: vmulps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rmbkz, X86_INS_VMULPS: vmulps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rmk, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rmkz, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rr, X86_INS_VMULPS: vmulps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rrk, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ128rrkz, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rm, X86_INS_VMULPS: vmulps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rmb, X86_INS_VMULPS: vmulps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rmbk, X86_INS_VMULPS: vmulps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rmbkz, X86_INS_VMULPS: vmulps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rmk, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rmkz, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rr, X86_INS_VMULPS: vmulps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rrk, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZ256rrkz, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrb, X86_INS_VMULPS: vmulps $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULPSZrbk, X86_INS_VMULPS: vmulps {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULPSZrbkz, X86_INS_VMULPS: vmulps {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULPSZrm, X86_INS_VMULPS: vmulps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrmb, X86_INS_VMULPS: vmulps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrmbk, X86_INS_VMULPS: vmulps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrmbkz, X86_INS_VMULPS: vmulps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrmk, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrmkz, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrr, X86_INS_VMULPS: vmulps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrrk, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSZrrkz, X86_INS_VMULPS: vmulps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSrm, X86_INS_VMULPS: vmulps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULPSrr, X86_INS_VMULPS: vmulps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrm, X86_INS_VMULSD: vmulsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrm_Int, X86_INS_VMULSD: vmulsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrm_Intk, X86_INS_VMULSD: vmulsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrm_Intkz, X86_INS_VMULSD: vmulsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrr, X86_INS_VMULSD: vmulsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrr_Int, X86_INS_VMULSD: vmulsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrr_Intk, X86_INS_VMULSD: vmulsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrr_Intkz, X86_INS_VMULSD: vmulsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDZrrb, X86_INS_VMULSD: vmulsd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSDZrrbk, X86_INS_VMULSD: vmulsd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSDZrrbkz, X86_INS_VMULSD: vmulsd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSDrm, X86_INS_VMULSD: vmulsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDrm_Int, X86_INS_VMULSD: vmulsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSDrr, X86_INS_VMULSD: vmulsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSDrr_Int, X86_INS_VMULSD: vmulsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrm, X86_INS_VMULSS: vmulss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrm_Int, X86_INS_VMULSS: vmulss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrm_Intk, X86_INS_VMULSS: vmulss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrm_Intkz, X86_INS_VMULSS: vmulss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrr, X86_INS_VMULSS: vmulss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrr_Int, X86_INS_VMULSS: vmulss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrr_Intk, X86_INS_VMULSS: vmulss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrr_Intkz, X86_INS_VMULSS: vmulss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSZrrb, X86_INS_VMULSS: vmulss $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSSZrrbk, X86_INS_VMULSS: vmulss {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSSZrrbkz, X86_INS_VMULSS: vmulss {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSSrm, X86_INS_VMULSS: vmulss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSrm_Int, X86_INS_VMULSS: vmulss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VMULSSrr, X86_INS_VMULSS: vmulss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMULSSrr_Int, X86_INS_VMULSS: vmulss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VMWRITE32rm, X86_INS_VMWRITE: vmwrite{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMWRITE32rr, X86_INS_VMWRITE: vmwrite{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMWRITE64rm, X86_INS_VMWRITE: vmwrite{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMWRITE64rr, X86_INS_VMWRITE: vmwrite{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMXOFF, X86_INS_VMXOFF: vmxoff */ 0, { 0 } }, { /* X86_VMXON, X86_INS_VMXON: vmxon $vmxon */ 0, { CS_AC_READ, 0 } }, { /* X86_VORPDYrm, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPDYrr, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPDrm, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPDrr, X86_INS_VORPD: vorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPSYrm, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPSYrr, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPSrm, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VORPSrr, X86_INS_VORPS: vorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPABSBrm128, X86_INS_VPABSB: vpabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSBrm256, X86_INS_VPABSB: vpabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSBrr128, X86_INS_VPABSB: vpabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSBrr256, X86_INS_VPABSB: vpabsb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrm, X86_INS_VPABSD: vpabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrmb, X86_INS_VPABSD: vpabsd {${src}{1to16}, $dst|$dst, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrmbk, X86_INS_VPABSD: vpabsd {${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrmbkz, X86_INS_VPABSD: vpabsd {${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrmk, X86_INS_VPABSD: vpabsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrmkz, X86_INS_VPABSD: vpabsd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrr, X86_INS_VPABSD: vpabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrrk, X86_INS_VPABSD: vpabsd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDZrrkz, X86_INS_VPABSD: vpabsd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDrm128, X86_INS_VPABSD: vpabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDrm256, X86_INS_VPABSD: vpabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDrr128, X86_INS_VPABSD: vpabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSDrr256, X86_INS_VPABSD: vpabsd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrm, X86_INS_VPABSQ: vpabsq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrmb, X86_INS_VPABSQ: vpabsq {${src}{1to8}, $dst|$dst, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrmbk, X86_INS_VPABSQ: vpabsq {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrmbkz, X86_INS_VPABSQ: vpabsq {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrmk, X86_INS_VPABSQ: vpabsq {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrmkz, X86_INS_VPABSQ: vpabsq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrr, X86_INS_VPABSQ: vpabsq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrrk, X86_INS_VPABSQ: vpabsq {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSQZrrkz, X86_INS_VPABSQ: vpabsq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSWrm128, X86_INS_VPABSW: vpabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSWrm256, X86_INS_VPABSW: vpabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSWrr128, X86_INS_VPABSW: vpabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPABSWrr256, X86_INS_VPABSW: vpabsw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPACKSSDWYrm, X86_INS_VPACKSSDW: vpackssdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSDWYrr, X86_INS_VPACKSSDW: vpackssdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSDWrm, X86_INS_VPACKSSDW: vpackssdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSDWrr, X86_INS_VPACKSSDW: vpackssdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSWBYrm, X86_INS_VPACKSSWB: vpacksswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSWBYrr, X86_INS_VPACKSSWB: vpacksswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSWBrm, X86_INS_VPACKSSWB: vpacksswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKSSWBrr, X86_INS_VPACKSSWB: vpacksswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSDWYrm, X86_INS_VPACKUSDW: vpackusdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSDWYrr, X86_INS_VPACKUSDW: vpackusdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSDWrm, X86_INS_VPACKUSDW: vpackusdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSDWrr, X86_INS_VPACKUSDW: vpackusdw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSWBYrm, X86_INS_VPACKUSWB: vpackuswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSWBYrr, X86_INS_VPACKUSWB: vpackuswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSWBrm, X86_INS_VPACKUSWB: vpackuswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPACKUSWBrr, X86_INS_VPACKUSWB: vpackuswb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBYrm, X86_INS_VPADDB: vpaddb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBYrr, X86_INS_VPADDB: vpaddb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ128rm, X86_INS_VPADDB: vpaddb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ128rmk, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ128rmkz, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ128rr, X86_INS_VPADDB: vpaddb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ128rrk, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ128rrkz, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ256rm, X86_INS_VPADDB: vpaddb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ256rmk, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ256rmkz, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ256rr, X86_INS_VPADDB: vpaddb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ256rrk, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZ256rrkz, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZrm, X86_INS_VPADDB: vpaddb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZrmk, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZrmkz, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZrr, X86_INS_VPADDB: vpaddb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZrrk, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBZrrkz, X86_INS_VPADDB: vpaddb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBrm, X86_INS_VPADDB: vpaddb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDBrr, X86_INS_VPADDB: vpaddb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDYrm, X86_INS_VPADDD: vpaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDYrr, X86_INS_VPADDD: vpaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rm, X86_INS_VPADDD: vpaddd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rmb, X86_INS_VPADDD: vpaddd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rmbk, X86_INS_VPADDD: vpaddd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rmbkz, X86_INS_VPADDD: vpaddd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rmk, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rmkz, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rr, X86_INS_VPADDD: vpaddd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rrk, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ128rrkz, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rm, X86_INS_VPADDD: vpaddd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rmb, X86_INS_VPADDD: vpaddd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rmbk, X86_INS_VPADDD: vpaddd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rmbkz, X86_INS_VPADDD: vpaddd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rmk, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rmkz, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rr, X86_INS_VPADDD: vpaddd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rrk, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZ256rrkz, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrm, X86_INS_VPADDD: vpaddd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrmb, X86_INS_VPADDD: vpaddd {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrmbk, X86_INS_VPADDD: vpaddd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrmbkz, X86_INS_VPADDD: vpaddd {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrmk, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrmkz, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrr, X86_INS_VPADDD: vpaddd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrrk, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDZrrkz, X86_INS_VPADDD: vpaddd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDrm, X86_INS_VPADDD: vpaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDDrr, X86_INS_VPADDD: vpaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQYrm, X86_INS_VPADDQ: vpaddq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQYrr, X86_INS_VPADDQ: vpaddq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rm, X86_INS_VPADDQ: vpaddq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rmb, X86_INS_VPADDQ: vpaddq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rmbk, X86_INS_VPADDQ: vpaddq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rmbkz, X86_INS_VPADDQ: vpaddq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rmk, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rmkz, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rr, X86_INS_VPADDQ: vpaddq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rrk, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ128rrkz, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rm, X86_INS_VPADDQ: vpaddq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rmb, X86_INS_VPADDQ: vpaddq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rmbk, X86_INS_VPADDQ: vpaddq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rmbkz, X86_INS_VPADDQ: vpaddq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rmk, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rmkz, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rr, X86_INS_VPADDQ: vpaddq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rrk, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZ256rrkz, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrm, X86_INS_VPADDQ: vpaddq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrmb, X86_INS_VPADDQ: vpaddq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrmbk, X86_INS_VPADDQ: vpaddq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrmbkz, X86_INS_VPADDQ: vpaddq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrmk, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrmkz, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrr, X86_INS_VPADDQ: vpaddq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrrk, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQZrrkz, X86_INS_VPADDQ: vpaddq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQrm, X86_INS_VPADDQ: vpaddq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDQrr, X86_INS_VPADDQ: vpaddq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSBYrm, X86_INS_VPADDSB: vpaddsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSBYrr, X86_INS_VPADDSB: vpaddsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSBrm, X86_INS_VPADDSB: vpaddsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSBrr, X86_INS_VPADDSB: vpaddsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSWYrm, X86_INS_VPADDSW: vpaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSWYrr, X86_INS_VPADDSW: vpaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSWrm, X86_INS_VPADDSW: vpaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDSWrr, X86_INS_VPADDSW: vpaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSBYrm, X86_INS_VPADDUSB: vpaddusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSBYrr, X86_INS_VPADDUSB: vpaddusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSBrm, X86_INS_VPADDUSB: vpaddusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSBrr, X86_INS_VPADDUSB: vpaddusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSWYrm, X86_INS_VPADDUSW: vpaddusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSWYrr, X86_INS_VPADDUSW: vpaddusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSWrm, X86_INS_VPADDUSW: vpaddusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDUSWrr, X86_INS_VPADDUSW: vpaddusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWYrm, X86_INS_VPADDW: vpaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWYrr, X86_INS_VPADDW: vpaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ128rm, X86_INS_VPADDW: vpaddw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ128rmk, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ128rmkz, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ128rr, X86_INS_VPADDW: vpaddw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ128rrk, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ128rrkz, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ256rm, X86_INS_VPADDW: vpaddw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ256rmk, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ256rmkz, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ256rr, X86_INS_VPADDW: vpaddw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ256rrk, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZ256rrkz, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZrm, X86_INS_VPADDW: vpaddw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZrmk, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZrmkz, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZrr, X86_INS_VPADDW: vpaddw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZrrk, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWZrrkz, X86_INS_VPADDW: vpaddw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWrm, X86_INS_VPADDW: vpaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPADDWrr, X86_INS_VPADDW: vpaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPALIGNR128rm, X86_INS_VPALIGNR: vpalignr $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPALIGNR128rr, X86_INS_VPALIGNR: vpalignr $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPALIGNR256rm, X86_INS_VPALIGNR: vpalignr $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPALIGNR256rr, X86_INS_VPALIGNR: vpalignr $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPANDDZ128rm, X86_INS_VPANDD: vpandd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rmb, X86_INS_VPANDD: vpandd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rmbk, X86_INS_VPANDD: vpandd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rmbkz, X86_INS_VPANDD: vpandd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rmk, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rmkz, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rr, X86_INS_VPANDD: vpandd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rrk, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ128rrkz, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rm, X86_INS_VPANDD: vpandd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rmb, X86_INS_VPANDD: vpandd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rmbk, X86_INS_VPANDD: vpandd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rmbkz, X86_INS_VPANDD: vpandd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rmk, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rmkz, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rr, X86_INS_VPANDD: vpandd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rrk, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZ256rrkz, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrm, X86_INS_VPANDD: vpandd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrmb, X86_INS_VPANDD: vpandd {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrmbk, X86_INS_VPANDD: vpandd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrmbkz, X86_INS_VPANDD: vpandd {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrmk, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrmkz, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrr, X86_INS_VPANDD: vpandd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrrk, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDDZrrkz, X86_INS_VPANDD: vpandd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rm, X86_INS_VPANDND: vpandnd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rmb, X86_INS_VPANDND: vpandnd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rmbk, X86_INS_VPANDND: vpandnd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rmbkz, X86_INS_VPANDND: vpandnd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rmk, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rmkz, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rr, X86_INS_VPANDND: vpandnd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rrk, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ128rrkz, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rm, X86_INS_VPANDND: vpandnd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rmb, X86_INS_VPANDND: vpandnd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rmbk, X86_INS_VPANDND: vpandnd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rmbkz, X86_INS_VPANDND: vpandnd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rmk, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rmkz, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rr, X86_INS_VPANDND: vpandnd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rrk, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZ256rrkz, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrm, X86_INS_VPANDND: vpandnd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrmb, X86_INS_VPANDND: vpandnd {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrmbk, X86_INS_VPANDND: vpandnd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrmbkz, X86_INS_VPANDND: vpandnd {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrmk, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrmkz, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrr, X86_INS_VPANDND: vpandnd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrrk, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNDZrrkz, X86_INS_VPANDND: vpandnd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rm, X86_INS_VPANDNQ: vpandnq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rmb, X86_INS_VPANDNQ: vpandnq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rmbk, X86_INS_VPANDNQ: vpandnq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rmbkz, X86_INS_VPANDNQ: vpandnq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rmk, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rmkz, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rr, X86_INS_VPANDNQ: vpandnq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rrk, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ128rrkz, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rm, X86_INS_VPANDNQ: vpandnq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rmb, X86_INS_VPANDNQ: vpandnq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rmbk, X86_INS_VPANDNQ: vpandnq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rmbkz, X86_INS_VPANDNQ: vpandnq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rmk, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rmkz, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rr, X86_INS_VPANDNQ: vpandnq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rrk, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZ256rrkz, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrm, X86_INS_VPANDNQ: vpandnq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrmb, X86_INS_VPANDNQ: vpandnq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrmbk, X86_INS_VPANDNQ: vpandnq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrmbkz, X86_INS_VPANDNQ: vpandnq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrmk, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrmkz, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrr, X86_INS_VPANDNQ: vpandnq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrrk, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNQZrrkz, X86_INS_VPANDNQ: vpandnq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNYrm, X86_INS_VPANDN: vpandn $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNYrr, X86_INS_VPANDN: vpandn $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNrm, X86_INS_VPANDN: vpandn $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDNrr, X86_INS_VPANDN: vpandn $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rm, X86_INS_VPANDQ: vpandq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rmb, X86_INS_VPANDQ: vpandq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rmbk, X86_INS_VPANDQ: vpandq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rmbkz, X86_INS_VPANDQ: vpandq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rmk, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rmkz, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rr, X86_INS_VPANDQ: vpandq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rrk, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ128rrkz, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rm, X86_INS_VPANDQ: vpandq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rmb, X86_INS_VPANDQ: vpandq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rmbk, X86_INS_VPANDQ: vpandq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rmbkz, X86_INS_VPANDQ: vpandq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rmk, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rmkz, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rr, X86_INS_VPANDQ: vpandq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rrk, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZ256rrkz, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrm, X86_INS_VPANDQ: vpandq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrmb, X86_INS_VPANDQ: vpandq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrmbk, X86_INS_VPANDQ: vpandq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrmbkz, X86_INS_VPANDQ: vpandq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrmk, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrmkz, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrr, X86_INS_VPANDQ: vpandq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrrk, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDQZrrkz, X86_INS_VPANDQ: vpandq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDYrm, X86_INS_VPAND: vpand $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDYrr, X86_INS_VPAND: vpand $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDrm, X86_INS_VPAND: vpand $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPANDrr, X86_INS_VPAND: vpand $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGBYrm, X86_INS_VPAVGB: vpavgb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGBYrr, X86_INS_VPAVGB: vpavgb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGBrm, X86_INS_VPAVGB: vpavgb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGBrr, X86_INS_VPAVGB: vpavgb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGWYrm, X86_INS_VPAVGW: vpavgw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGWYrr, X86_INS_VPAVGW: vpavgw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGWrm, X86_INS_VPAVGW: vpavgw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPAVGWrr, X86_INS_VPAVGW: vpavgw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDDYrmi, X86_INS_VPBLENDD: vpblendd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDDYrri, X86_INS_VPBLENDD: vpblendd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDDrmi, X86_INS_VPBLENDD: vpblendd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDDrri, X86_INS_VPBLENDD: vpblendd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDMBZ128rm, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ128rmk, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ128rmkz, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ128rr, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ128rrk, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ128rrkz, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ256rm, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ256rmk, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ256rmkz, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ256rr, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ256rrk, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZ256rrkz, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZrm, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZrmk, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZrmkz, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZrr, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZrrk, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMBZrrkz, X86_INS_VPBLENDMB: vpblendmb {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rm, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rmb, X86_INS_VPBLENDMD: vpblendmd {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rmbk, X86_INS_VPBLENDMD: vpblendmd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rmk, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rmkz, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rr, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rrk, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ128rrkz, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rm, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rmb, X86_INS_VPBLENDMD: vpblendmd {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rmbk, X86_INS_VPBLENDMD: vpblendmd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rmk, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rmkz, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rr, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rrk, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZ256rrkz, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrm, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrmb, X86_INS_VPBLENDMD: vpblendmd {${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrmbk, X86_INS_VPBLENDMD: vpblendmd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrmk, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrmkz, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrr, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrrk, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMDZrrkz, X86_INS_VPBLENDMD: vpblendmd {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rm, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rmb, X86_INS_VPBLENDMQ: vpblendmq {${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rmbk, X86_INS_VPBLENDMQ: vpblendmq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rmk, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rmkz, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rr, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rrk, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ128rrkz, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rm, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rmb, X86_INS_VPBLENDMQ: vpblendmq {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rmbk, X86_INS_VPBLENDMQ: vpblendmq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rmk, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rmkz, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rr, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rrk, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZ256rrkz, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrm, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrmb, X86_INS_VPBLENDMQ: vpblendmq {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrmbk, X86_INS_VPBLENDMQ: vpblendmq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrmk, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrmkz, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrr, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrrk, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMQZrrkz, X86_INS_VPBLENDMQ: vpblendmq {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ128rm, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ128rmk, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ128rmkz, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ128rr, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ128rrk, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ128rrkz, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ256rm, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ256rmk, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ256rmkz, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ256rr, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ256rrk, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZ256rrkz, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZrm, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZrmk, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZrmkz, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZrr, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} |${dst}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZrrk, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDMWZrrkz, X86_INS_VPBLENDMW: vpblendmw {$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDVBYrm, X86_INS_VPBLENDVB: vpblendvb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDVBYrr, X86_INS_VPBLENDVB: vpblendvb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDVBrm, X86_INS_VPBLENDVB: vpblendvb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDVBrr, X86_INS_VPBLENDVB: vpblendvb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPBLENDWYrmi, X86_INS_VPBLENDW: vpblendw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDWYrri, X86_INS_VPBLENDW: vpblendw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDWrmi, X86_INS_VPBLENDW: vpblendw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBLENDWrri, X86_INS_VPBLENDW: vpblendw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPBROADCASTBYrm, X86_INS_VPBROADCASTB: vpbroadcastb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBYrr, X86_INS_VPBROADCASTB: vpbroadcastb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZ128r, X86_INS_VPBROADCASTB: vpbroadcastb $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZ128rk, X86_INS_VPBROADCASTB: vpbroadcastb {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZ128rkz, X86_INS_VPBROADCASTB: vpbroadcastb {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZ256r, X86_INS_VPBROADCASTB: vpbroadcastb $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZ256rk, X86_INS_VPBROADCASTB: vpbroadcastb {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZ256rkz, X86_INS_VPBROADCASTB: vpbroadcastb {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZr, X86_INS_VPBROADCASTB: vpbroadcastb $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZrk, X86_INS_VPBROADCASTB: vpbroadcastb {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrZrkz, X86_INS_VPBROADCASTB: vpbroadcastb {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrm, X86_INS_VPBROADCASTB: vpbroadcastb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTBrr, X86_INS_VPBROADCASTB: vpbroadcastb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDYrm, X86_INS_VPBROADCASTD: vpbroadcastd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDYrr, X86_INS_VPBROADCASTD: vpbroadcastd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDZkrm, X86_INS_VPBROADCASTD: vpbroadcastd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDZkrr, X86_INS_VPBROADCASTD: vpbroadcastd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDZrm, X86_INS_VPBROADCASTD: vpbroadcastd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDZrr, X86_INS_VPBROADCASTD: vpbroadcastd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZ128r, X86_INS_VPBROADCASTD: vpbroadcastd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZ128rk, X86_INS_VPBROADCASTD: vpbroadcastd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZ128rkz, X86_INS_VPBROADCASTD: vpbroadcastd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZ256r, X86_INS_VPBROADCASTD: vpbroadcastd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZ256rk, X86_INS_VPBROADCASTD: vpbroadcastd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZ256rkz, X86_INS_VPBROADCASTD: vpbroadcastd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZr, X86_INS_VPBROADCASTD: vpbroadcastd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZrk, X86_INS_VPBROADCASTD: vpbroadcastd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrZrkz, X86_INS_VPBROADCASTD: vpbroadcastd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrm, X86_INS_VPBROADCASTD: vpbroadcastd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTDrr, X86_INS_VPBROADCASTD: vpbroadcastd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTMB2QZ128rr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTMB2QZ256rr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTMB2QZrr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTMW2DZ128rr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTMW2DZ256rr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTMW2DZrr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQYrm, X86_INS_VPBROADCASTQ: vpbroadcastq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQYrr, X86_INS_VPBROADCASTQ: vpbroadcastq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQZkrm, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQZkrr, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQZrm, X86_INS_VPBROADCASTQ: vpbroadcastq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQZrr, X86_INS_VPBROADCASTQ: vpbroadcastq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZ128r, X86_INS_VPBROADCASTQ: vpbroadcastq $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZ128rk, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZ128rkz, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZ256r, X86_INS_VPBROADCASTQ: vpbroadcastq $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZ256rk, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZ256rkz, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZr, X86_INS_VPBROADCASTQ: vpbroadcastq $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZrk, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrZrkz, X86_INS_VPBROADCASTQ: vpbroadcastq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrm, X86_INS_VPBROADCASTQ: vpbroadcastq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTQrr, X86_INS_VPBROADCASTQ: vpbroadcastq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWYrm, X86_INS_VPBROADCASTW: vpbroadcastw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWYrr, X86_INS_VPBROADCASTW: vpbroadcastw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZ128r, X86_INS_VPBROADCASTW: vpbroadcastw $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZ128rk, X86_INS_VPBROADCASTW: vpbroadcastw {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZ128rkz, X86_INS_VPBROADCASTW: vpbroadcastw {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZ256r, X86_INS_VPBROADCASTW: vpbroadcastw $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZ256rk, X86_INS_VPBROADCASTW: vpbroadcastw {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZ256rkz, X86_INS_VPBROADCASTW: vpbroadcastw {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZr, X86_INS_VPBROADCASTW: vpbroadcastw $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZrk, X86_INS_VPBROADCASTW: vpbroadcastw {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrZrkz, X86_INS_VPBROADCASTW: vpbroadcastw {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrm, X86_INS_VPBROADCASTW: vpbroadcastw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPBROADCASTWrr, X86_INS_VPBROADCASTW: vpbroadcastw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCLMULQDQrm, X86_INS_VPCLMULQDQ: vpclmulqdq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCLMULQDQrr, X86_INS_VPCLMULQDQ: vpclmulqdq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMOVmr, X86_INS_VPCMOV: vpcmov $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMOVmrY, X86_INS_VPCMOV: vpcmov $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMOVrm, X86_INS_VPCMOV: vpcmov $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMOVrmY, X86_INS_VPCMOV: vpcmov $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMOVrr, X86_INS_VPCMOV: vpcmov $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMOVrrY, X86_INS_VPCMOV: vpcmov $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ128rmi, X86_INS_VPCMPB: vpcmp${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ128rmi_alt, X86_INS_VPCMPB: vpcmpb $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ128rmik, X86_INS_VPCMPB: vpcmp${cc}b {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ128rmik_alt, X86_INS_VPCMPB: vpcmpb {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ128rri, X86_INS_VPCMPB: vpcmp${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ128rri_alt, X86_INS_VPCMPB: vpcmpb $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ128rrik, X86_INS_VPCMPB: vpcmp${cc}b {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ128rrik_alt, X86_INS_VPCMPB: vpcmpb {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ256rmi, X86_INS_VPCMPB: vpcmp${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ256rmi_alt, X86_INS_VPCMPB: vpcmpb $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ256rmik, X86_INS_VPCMPB: vpcmp${cc}b {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ256rmik_alt, X86_INS_VPCMPB: vpcmpb {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ256rri, X86_INS_VPCMPB: vpcmp${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ256rri_alt, X86_INS_VPCMPB: vpcmpb $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZ256rrik, X86_INS_VPCMPB: vpcmp${cc}b {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZ256rrik_alt, X86_INS_VPCMPB: vpcmpb {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZrmi, X86_INS_VPCMPB: vpcmp${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZrmi_alt, X86_INS_VPCMPB: vpcmpb $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZrmik, X86_INS_VPCMPB: vpcmp${cc}b {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZrmik_alt, X86_INS_VPCMPB: vpcmpb {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZrri, X86_INS_VPCMPB: vpcmp${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZrri_alt, X86_INS_VPCMPB: vpcmpb $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPBZrrik, X86_INS_VPCMPB: vpcmp${cc}b {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPBZrrik_alt, X86_INS_VPCMPB: vpcmpb {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ128rmi, X86_INS_VPCMPD: vpcmp${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ128rmi_alt, X86_INS_VPCMPD: vpcmpd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ128rmib, X86_INS_VPCMPD: vpcmp${cc}d {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ128rmib_alt, X86_INS_VPCMPD: vpcmpd {$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ128rmibk, X86_INS_VPCMPD: vpcmp${cc}d {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ128rmibk_alt, X86_INS_VPCMPD: vpcmpd {$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ128rmik, X86_INS_VPCMPD: vpcmp${cc}d {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ128rmik_alt, X86_INS_VPCMPD: vpcmpd {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ128rri, X86_INS_VPCMPD: vpcmp${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ128rri_alt, X86_INS_VPCMPD: vpcmpd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ128rrik, X86_INS_VPCMPD: vpcmp${cc}d {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ128rrik_alt, X86_INS_VPCMPD: vpcmpd {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ256rmi, X86_INS_VPCMPD: vpcmp${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ256rmi_alt, X86_INS_VPCMPD: vpcmpd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ256rmib, X86_INS_VPCMPD: vpcmp${cc}d {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ256rmib_alt, X86_INS_VPCMPD: vpcmpd {$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ256rmibk, X86_INS_VPCMPD: vpcmp${cc}d {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ256rmibk_alt, X86_INS_VPCMPD: vpcmpd {$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ256rmik, X86_INS_VPCMPD: vpcmp${cc}d {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ256rmik_alt, X86_INS_VPCMPD: vpcmpd {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ256rri, X86_INS_VPCMPD: vpcmp${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ256rri_alt, X86_INS_VPCMPD: vpcmpd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZ256rrik, X86_INS_VPCMPD: vpcmp${cc}d {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZ256rrik_alt, X86_INS_VPCMPD: vpcmpd {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZrmi, X86_INS_VPCMPD: vpcmp${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZrmi_alt, X86_INS_VPCMPD: vpcmpd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZrmib, X86_INS_VPCMPD: vpcmp${cc}d {${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZrmib_alt, X86_INS_VPCMPD: vpcmpd {$cc, ${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZrmibk, X86_INS_VPCMPD: vpcmp${cc}d {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZrmibk_alt, X86_INS_VPCMPD: vpcmpd {$cc, ${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZrmik, X86_INS_VPCMPD: vpcmp${cc}d {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZrmik_alt, X86_INS_VPCMPD: vpcmpd {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZrri, X86_INS_VPCMPD: vpcmp${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZrri_alt, X86_INS_VPCMPD: vpcmpd $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPDZrrik, X86_INS_VPCMPD: vpcmp${cc}d {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPDZrrik_alt, X86_INS_VPCMPD: vpcmpd {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPEQBYrm, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBYrr, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ128rm, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ128rmk, X86_INS_VPCMPEQB: vpcmpeqb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ128rr, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ128rrk, X86_INS_VPCMPEQB: vpcmpeqb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ256rm, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ256rmk, X86_INS_VPCMPEQB: vpcmpeqb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ256rr, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZ256rrk, X86_INS_VPCMPEQB: vpcmpeqb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZrm, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZrmk, X86_INS_VPCMPEQB: vpcmpeqb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZrr, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBZrrk, X86_INS_VPCMPEQB: vpcmpeqb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBrm, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQBrr, X86_INS_VPCMPEQB: vpcmpeqb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDYrm, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDYrr, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ128rm, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ128rmb, X86_INS_VPCMPEQD: vpcmpeqd {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ128rmbk, X86_INS_VPCMPEQD: vpcmpeqd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ128rmk, X86_INS_VPCMPEQD: vpcmpeqd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ128rr, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ128rrk, X86_INS_VPCMPEQD: vpcmpeqd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ256rm, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ256rmb, X86_INS_VPCMPEQD: vpcmpeqd {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ256rmbk, X86_INS_VPCMPEQD: vpcmpeqd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ256rmk, X86_INS_VPCMPEQD: vpcmpeqd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ256rr, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZ256rrk, X86_INS_VPCMPEQD: vpcmpeqd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZrm, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZrmb, X86_INS_VPCMPEQD: vpcmpeqd {${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZrmbk, X86_INS_VPCMPEQD: vpcmpeqd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZrmk, X86_INS_VPCMPEQD: vpcmpeqd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZrr, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDZrrk, X86_INS_VPCMPEQD: vpcmpeqd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDrm, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQDrr, X86_INS_VPCMPEQD: vpcmpeqd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQYrm, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQYrr, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ128rm, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ128rmb, X86_INS_VPCMPEQQ: vpcmpeqq {${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ128rmbk, X86_INS_VPCMPEQQ: vpcmpeqq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ128rmk, X86_INS_VPCMPEQQ: vpcmpeqq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ128rr, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ128rrk, X86_INS_VPCMPEQQ: vpcmpeqq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ256rm, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ256rmb, X86_INS_VPCMPEQQ: vpcmpeqq {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ256rmbk, X86_INS_VPCMPEQQ: vpcmpeqq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ256rmk, X86_INS_VPCMPEQQ: vpcmpeqq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ256rr, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZ256rrk, X86_INS_VPCMPEQQ: vpcmpeqq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZrm, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZrmb, X86_INS_VPCMPEQQ: vpcmpeqq {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZrmbk, X86_INS_VPCMPEQQ: vpcmpeqq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZrmk, X86_INS_VPCMPEQQ: vpcmpeqq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZrr, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQZrrk, X86_INS_VPCMPEQQ: vpcmpeqq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQrm, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQQrr, X86_INS_VPCMPEQQ: vpcmpeqq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWYrm, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWYrr, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ128rm, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ128rmk, X86_INS_VPCMPEQW: vpcmpeqw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ128rr, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ128rrk, X86_INS_VPCMPEQW: vpcmpeqw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ256rm, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ256rmk, X86_INS_VPCMPEQW: vpcmpeqw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ256rr, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZ256rrk, X86_INS_VPCMPEQW: vpcmpeqw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZrm, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZrmk, X86_INS_VPCMPEQW: vpcmpeqw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZrr, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWZrrk, X86_INS_VPCMPEQW: vpcmpeqw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWrm, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPEQWrr, X86_INS_VPCMPEQW: vpcmpeqw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPESTRIrm, X86_INS_VPCMPESTRI: vpcmpestri $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPESTRIrr, X86_INS_VPCMPESTRI: vpcmpestri $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPESTRM128rm, X86_INS_VPCMPESTRM: vpcmpestrm $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPESTRM128rr, X86_INS_VPCMPESTRM: vpcmpestrm $src1, $src3, $src5 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPGTBYrm, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBYrr, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ128rm, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ128rmk, X86_INS_VPCMPGTB: vpcmpgtb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ128rr, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ128rrk, X86_INS_VPCMPGTB: vpcmpgtb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ256rm, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ256rmk, X86_INS_VPCMPGTB: vpcmpgtb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ256rr, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZ256rrk, X86_INS_VPCMPGTB: vpcmpgtb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZrm, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZrmk, X86_INS_VPCMPGTB: vpcmpgtb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZrr, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBZrrk, X86_INS_VPCMPGTB: vpcmpgtb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBrm, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTBrr, X86_INS_VPCMPGTB: vpcmpgtb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDYrm, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDYrr, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ128rm, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ128rmb, X86_INS_VPCMPGTD: vpcmpgtd {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ128rmbk, X86_INS_VPCMPGTD: vpcmpgtd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ128rmk, X86_INS_VPCMPGTD: vpcmpgtd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ128rr, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ128rrk, X86_INS_VPCMPGTD: vpcmpgtd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ256rm, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ256rmb, X86_INS_VPCMPGTD: vpcmpgtd {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ256rmbk, X86_INS_VPCMPGTD: vpcmpgtd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ256rmk, X86_INS_VPCMPGTD: vpcmpgtd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ256rr, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZ256rrk, X86_INS_VPCMPGTD: vpcmpgtd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZrm, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZrmb, X86_INS_VPCMPGTD: vpcmpgtd {${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZrmbk, X86_INS_VPCMPGTD: vpcmpgtd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZrmk, X86_INS_VPCMPGTD: vpcmpgtd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZrr, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDZrrk, X86_INS_VPCMPGTD: vpcmpgtd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDrm, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTDrr, X86_INS_VPCMPGTD: vpcmpgtd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQYrm, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQYrr, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ128rm, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ128rmb, X86_INS_VPCMPGTQ: vpcmpgtq {${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ128rmbk, X86_INS_VPCMPGTQ: vpcmpgtq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ128rmk, X86_INS_VPCMPGTQ: vpcmpgtq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ128rr, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ128rrk, X86_INS_VPCMPGTQ: vpcmpgtq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ256rm, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ256rmb, X86_INS_VPCMPGTQ: vpcmpgtq {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ256rmbk, X86_INS_VPCMPGTQ: vpcmpgtq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ256rmk, X86_INS_VPCMPGTQ: vpcmpgtq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ256rr, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZ256rrk, X86_INS_VPCMPGTQ: vpcmpgtq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZrm, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZrmb, X86_INS_VPCMPGTQ: vpcmpgtq {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZrmbk, X86_INS_VPCMPGTQ: vpcmpgtq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZrmk, X86_INS_VPCMPGTQ: vpcmpgtq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZrr, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQZrrk, X86_INS_VPCMPGTQ: vpcmpgtq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQrm, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTQrr, X86_INS_VPCMPGTQ: vpcmpgtq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWYrm, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWYrr, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ128rm, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ128rmk, X86_INS_VPCMPGTW: vpcmpgtw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ128rr, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ128rrk, X86_INS_VPCMPGTW: vpcmpgtw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ256rm, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ256rmk, X86_INS_VPCMPGTW: vpcmpgtw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ256rr, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZ256rrk, X86_INS_VPCMPGTW: vpcmpgtw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZrm, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZrmk, X86_INS_VPCMPGTW: vpcmpgtw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZrr, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWZrrk, X86_INS_VPCMPGTW: vpcmpgtw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWrm, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPGTWrr, X86_INS_VPCMPGTW: vpcmpgtw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPISTRIrm, X86_INS_VPCMPISTRI: vpcmpistri $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPISTRIrr, X86_INS_VPCMPISTRI: vpcmpistri $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPISTRM128rm, X86_INS_VPCMPISTRM: vpcmpistrm $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPISTRM128rr, X86_INS_VPCMPISTRM: vpcmpistrm $src1, $src2, $src3 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ128rmi, X86_INS_VPCMPQ: vpcmp${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ128rmi_alt, X86_INS_VPCMPQ: vpcmpq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ128rmib, X86_INS_VPCMPQ: vpcmp${cc}q {${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ128rmib_alt, X86_INS_VPCMPQ: vpcmpq {$cc, ${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ128rmibk, X86_INS_VPCMPQ: vpcmp${cc}q {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ128rmibk_alt, X86_INS_VPCMPQ: vpcmpq {$cc, ${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ128rmik, X86_INS_VPCMPQ: vpcmp${cc}q {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ128rmik_alt, X86_INS_VPCMPQ: vpcmpq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ128rri, X86_INS_VPCMPQ: vpcmp${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ128rri_alt, X86_INS_VPCMPQ: vpcmpq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ128rrik, X86_INS_VPCMPQ: vpcmp${cc}q {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ128rrik_alt, X86_INS_VPCMPQ: vpcmpq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ256rmi, X86_INS_VPCMPQ: vpcmp${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ256rmi_alt, X86_INS_VPCMPQ: vpcmpq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ256rmib, X86_INS_VPCMPQ: vpcmp${cc}q {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ256rmib_alt, X86_INS_VPCMPQ: vpcmpq {$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ256rmibk, X86_INS_VPCMPQ: vpcmp${cc}q {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ256rmibk_alt, X86_INS_VPCMPQ: vpcmpq {$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ256rmik, X86_INS_VPCMPQ: vpcmp${cc}q {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ256rmik_alt, X86_INS_VPCMPQ: vpcmpq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ256rri, X86_INS_VPCMPQ: vpcmp${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ256rri_alt, X86_INS_VPCMPQ: vpcmpq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZ256rrik, X86_INS_VPCMPQ: vpcmp${cc}q {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZ256rrik_alt, X86_INS_VPCMPQ: vpcmpq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZrmi, X86_INS_VPCMPQ: vpcmp${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZrmi_alt, X86_INS_VPCMPQ: vpcmpq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZrmib, X86_INS_VPCMPQ: vpcmp${cc}q {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZrmib_alt, X86_INS_VPCMPQ: vpcmpq {$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZrmibk, X86_INS_VPCMPQ: vpcmp${cc}q {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZrmibk_alt, X86_INS_VPCMPQ: vpcmpq {$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZrmik, X86_INS_VPCMPQ: vpcmp${cc}q {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZrmik_alt, X86_INS_VPCMPQ: vpcmpq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZrri, X86_INS_VPCMPQ: vpcmp${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZrri_alt, X86_INS_VPCMPQ: vpcmpq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPQZrrik, X86_INS_VPCMPQ: vpcmp${cc}q {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPQZrrik_alt, X86_INS_VPCMPQ: vpcmpq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ128rmi, X86_INS_VPCMPUB: vpcmp${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ128rmi_alt, X86_INS_VPCMPUB: vpcmpub $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ128rmik, X86_INS_VPCMPUB: vpcmp${cc}ub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ128rmik_alt, X86_INS_VPCMPUB: vpcmpub {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ128rri, X86_INS_VPCMPUB: vpcmp${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ128rri_alt, X86_INS_VPCMPUB: vpcmpub $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ128rrik, X86_INS_VPCMPUB: vpcmp${cc}ub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ128rrik_alt, X86_INS_VPCMPUB: vpcmpub {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ256rmi, X86_INS_VPCMPUB: vpcmp${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ256rmi_alt, X86_INS_VPCMPUB: vpcmpub $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ256rmik, X86_INS_VPCMPUB: vpcmp${cc}ub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ256rmik_alt, X86_INS_VPCMPUB: vpcmpub {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ256rri, X86_INS_VPCMPUB: vpcmp${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ256rri_alt, X86_INS_VPCMPUB: vpcmpub $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZ256rrik, X86_INS_VPCMPUB: vpcmp${cc}ub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZ256rrik_alt, X86_INS_VPCMPUB: vpcmpub {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZrmi, X86_INS_VPCMPUB: vpcmp${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZrmi_alt, X86_INS_VPCMPUB: vpcmpub $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZrmik, X86_INS_VPCMPUB: vpcmp${cc}ub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZrmik_alt, X86_INS_VPCMPUB: vpcmpub {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZrri, X86_INS_VPCMPUB: vpcmp${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZrri_alt, X86_INS_VPCMPUB: vpcmpub $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUBZrrik, X86_INS_VPCMPUB: vpcmp${cc}ub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUBZrrik_alt, X86_INS_VPCMPUB: vpcmpub {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ128rmi, X86_INS_VPCMPUD: vpcmp${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ128rmi_alt, X86_INS_VPCMPUD: vpcmpud $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ128rmib, X86_INS_VPCMPUD: vpcmp${cc}ud {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ128rmib_alt, X86_INS_VPCMPUD: vpcmpud {$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ128rmibk, X86_INS_VPCMPUD: vpcmp${cc}ud {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ128rmibk_alt, X86_INS_VPCMPUD: vpcmpud {$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ128rmik, X86_INS_VPCMPUD: vpcmp${cc}ud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ128rmik_alt, X86_INS_VPCMPUD: vpcmpud {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ128rri, X86_INS_VPCMPUD: vpcmp${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ128rri_alt, X86_INS_VPCMPUD: vpcmpud $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ128rrik, X86_INS_VPCMPUD: vpcmp${cc}ud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ128rrik_alt, X86_INS_VPCMPUD: vpcmpud {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ256rmi, X86_INS_VPCMPUD: vpcmp${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ256rmi_alt, X86_INS_VPCMPUD: vpcmpud $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ256rmib, X86_INS_VPCMPUD: vpcmp${cc}ud {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ256rmib_alt, X86_INS_VPCMPUD: vpcmpud {$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ256rmibk, X86_INS_VPCMPUD: vpcmp${cc}ud {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ256rmibk_alt, X86_INS_VPCMPUD: vpcmpud {$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ256rmik, X86_INS_VPCMPUD: vpcmp${cc}ud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ256rmik_alt, X86_INS_VPCMPUD: vpcmpud {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ256rri, X86_INS_VPCMPUD: vpcmp${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ256rri_alt, X86_INS_VPCMPUD: vpcmpud $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZ256rrik, X86_INS_VPCMPUD: vpcmp${cc}ud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZ256rrik_alt, X86_INS_VPCMPUD: vpcmpud {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZrmi, X86_INS_VPCMPUD: vpcmp${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZrmi_alt, X86_INS_VPCMPUD: vpcmpud $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZrmib, X86_INS_VPCMPUD: vpcmp${cc}ud {${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZrmib_alt, X86_INS_VPCMPUD: vpcmpud {$cc, ${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZrmibk, X86_INS_VPCMPUD: vpcmp${cc}ud {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZrmibk_alt, X86_INS_VPCMPUD: vpcmpud {$cc, ${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZrmik, X86_INS_VPCMPUD: vpcmp${cc}ud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZrmik_alt, X86_INS_VPCMPUD: vpcmpud {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZrri, X86_INS_VPCMPUD: vpcmp${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZrri_alt, X86_INS_VPCMPUD: vpcmpud $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUDZrrik, X86_INS_VPCMPUD: vpcmp${cc}ud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUDZrrik_alt, X86_INS_VPCMPUD: vpcmpud {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ128rmi, X86_INS_VPCMPUQ: vpcmp${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ128rmi_alt, X86_INS_VPCMPUQ: vpcmpuq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ128rmib, X86_INS_VPCMPUQ: vpcmp${cc}uq {${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ128rmib_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, ${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ128rmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ128rmibk_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, ${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ128rmik, X86_INS_VPCMPUQ: vpcmp${cc}uq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ128rmik_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ128rri, X86_INS_VPCMPUQ: vpcmp${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ128rri_alt, X86_INS_VPCMPUQ: vpcmpuq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ128rrik, X86_INS_VPCMPUQ: vpcmp${cc}uq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ128rrik_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ256rmi, X86_INS_VPCMPUQ: vpcmp${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ256rmi_alt, X86_INS_VPCMPUQ: vpcmpuq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ256rmib, X86_INS_VPCMPUQ: vpcmp${cc}uq {${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ256rmib_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ256rmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ256rmibk_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ256rmik, X86_INS_VPCMPUQ: vpcmp${cc}uq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ256rmik_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ256rri, X86_INS_VPCMPUQ: vpcmp${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ256rri_alt, X86_INS_VPCMPUQ: vpcmpuq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZ256rrik, X86_INS_VPCMPUQ: vpcmp${cc}uq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZ256rrik_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZrmi, X86_INS_VPCMPUQ: vpcmp${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZrmi_alt, X86_INS_VPCMPUQ: vpcmpuq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZrmib, X86_INS_VPCMPUQ: vpcmp${cc}uq {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZrmib_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZrmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZrmibk_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZrmik, X86_INS_VPCMPUQ: vpcmp${cc}uq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZrmik_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZrri, X86_INS_VPCMPUQ: vpcmp${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZrri_alt, X86_INS_VPCMPUQ: vpcmpuq $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUQZrrik, X86_INS_VPCMPUQ: vpcmp${cc}uq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUQZrrik_alt, X86_INS_VPCMPUQ: vpcmpuq {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ128rmi, X86_INS_VPCMPUW: vpcmp${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ128rmi_alt, X86_INS_VPCMPUW: vpcmpuw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ128rmik, X86_INS_VPCMPUW: vpcmp${cc}uw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ128rmik_alt, X86_INS_VPCMPUW: vpcmpuw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ128rri, X86_INS_VPCMPUW: vpcmp${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ128rri_alt, X86_INS_VPCMPUW: vpcmpuw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ128rrik, X86_INS_VPCMPUW: vpcmp${cc}uw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ128rrik_alt, X86_INS_VPCMPUW: vpcmpuw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ256rmi, X86_INS_VPCMPUW: vpcmp${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ256rmi_alt, X86_INS_VPCMPUW: vpcmpuw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ256rmik, X86_INS_VPCMPUW: vpcmp${cc}uw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ256rmik_alt, X86_INS_VPCMPUW: vpcmpuw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ256rri, X86_INS_VPCMPUW: vpcmp${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ256rri_alt, X86_INS_VPCMPUW: vpcmpuw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZ256rrik, X86_INS_VPCMPUW: vpcmp${cc}uw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZ256rrik_alt, X86_INS_VPCMPUW: vpcmpuw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZrmi, X86_INS_VPCMPUW: vpcmp${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZrmi_alt, X86_INS_VPCMPUW: vpcmpuw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZrmik, X86_INS_VPCMPUW: vpcmp${cc}uw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZrmik_alt, X86_INS_VPCMPUW: vpcmpuw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZrri, X86_INS_VPCMPUW: vpcmp${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZrri_alt, X86_INS_VPCMPUW: vpcmpuw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPUWZrrik, X86_INS_VPCMPUW: vpcmp${cc}uw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPUWZrrik_alt, X86_INS_VPCMPUW: vpcmpuw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ128rmi, X86_INS_VPCMPW: vpcmp${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ128rmi_alt, X86_INS_VPCMPW: vpcmpw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ128rmik, X86_INS_VPCMPW: vpcmp${cc}w {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ128rmik_alt, X86_INS_VPCMPW: vpcmpw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ128rri, X86_INS_VPCMPW: vpcmp${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ128rri_alt, X86_INS_VPCMPW: vpcmpw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ128rrik, X86_INS_VPCMPW: vpcmp${cc}w {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ128rrik_alt, X86_INS_VPCMPW: vpcmpw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ256rmi, X86_INS_VPCMPW: vpcmp${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ256rmi_alt, X86_INS_VPCMPW: vpcmpw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ256rmik, X86_INS_VPCMPW: vpcmp${cc}w {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ256rmik_alt, X86_INS_VPCMPW: vpcmpw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ256rri, X86_INS_VPCMPW: vpcmp${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ256rri_alt, X86_INS_VPCMPW: vpcmpw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZ256rrik, X86_INS_VPCMPW: vpcmp${cc}w {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZ256rrik_alt, X86_INS_VPCMPW: vpcmpw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZrmi, X86_INS_VPCMPW: vpcmp${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZrmi_alt, X86_INS_VPCMPW: vpcmpw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZrmik, X86_INS_VPCMPW: vpcmp${cc}w {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZrmik_alt, X86_INS_VPCMPW: vpcmpw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZrri, X86_INS_VPCMPW: vpcmp${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZrri_alt, X86_INS_VPCMPW: vpcmpw $dst, $src1, $src2, $cc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCMPWZrrik, X86_INS_VPCMPW: vpcmp${cc}w {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCMPWZrrik_alt, X86_INS_VPCMPW: vpcmpw {$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMBmi, X86_INS_VPCOMB: vpcom${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMBmi_alt, X86_INS_VPCOMB: vpcomb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMBri, X86_INS_VPCOMB: vpcom${cc}b $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMBri_alt, X86_INS_VPCOMB: vpcomb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMDmi, X86_INS_VPCOMD: vpcom${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMDmi_alt, X86_INS_VPCOMD: vpcomd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMDri, X86_INS_VPCOMD: vpcom${cc}d $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMDri_alt, X86_INS_VPCOMD: vpcomd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMPRESSDZ128mrk, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZ128rrk, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZ128rrkz, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZ256mrk, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZ256rrk, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZ256rrkz, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZmrk, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZrrk, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSDZrrkz, X86_INS_VPCOMPRESSD: vpcompressd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZ128mrk, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZ128rrk, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZ128rrkz, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZ256mrk, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZ256rrk, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZ256rrkz, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZmrk, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZrrk, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMPRESSQZrrkz, X86_INS_VPCOMPRESSQ: vpcompressq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCOMQmi, X86_INS_VPCOMQ: vpcom${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMQmi_alt, X86_INS_VPCOMQ: vpcomq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMQri, X86_INS_VPCOMQ: vpcom${cc}q $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMQri_alt, X86_INS_VPCOMQ: vpcomq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUBmi, X86_INS_VPCOMUB: vpcom${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUBmi_alt, X86_INS_VPCOMUB: vpcomub $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUBri, X86_INS_VPCOMUB: vpcom${cc}ub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUBri_alt, X86_INS_VPCOMUB: vpcomub $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUDmi, X86_INS_VPCOMUD: vpcom${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUDmi_alt, X86_INS_VPCOMUD: vpcomud $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUDri, X86_INS_VPCOMUD: vpcom${cc}ud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUDri_alt, X86_INS_VPCOMUD: vpcomud $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUQmi, X86_INS_VPCOMUQ: vpcom${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUQmi_alt, X86_INS_VPCOMUQ: vpcomuq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUQri, X86_INS_VPCOMUQ: vpcom${cc}uq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUQri_alt, X86_INS_VPCOMUQ: vpcomuq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUWmi, X86_INS_VPCOMUW: vpcom${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUWmi_alt, X86_INS_VPCOMUW: vpcomuw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMUWri, X86_INS_VPCOMUW: vpcom${cc}uw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMUWri_alt, X86_INS_VPCOMUW: vpcomuw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMWmi, X86_INS_VPCOMW: vpcom${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMWmi_alt, X86_INS_VPCOMW: vpcomw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCOMWri, X86_INS_VPCOMW: vpcom${cc}w $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPCOMWri_alt, X86_INS_VPCOMW: vpcomw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPCONFLICTDrm, X86_INS_VPCONFLICTD: vpconflictd {$src, ${dst}|${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrmb, X86_INS_VPCONFLICTD: vpconflictd {${src}{1to16}, ${dst}|${dst}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrmbk, X86_INS_VPCONFLICTD: vpconflictd {${src2}{1to16}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrmbkz, X86_INS_VPCONFLICTD: vpconflictd {${src}{1to16}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrmk, X86_INS_VPCONFLICTD: vpconflictd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrmkz, X86_INS_VPCONFLICTD: vpconflictd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrr, X86_INS_VPCONFLICTD: vpconflictd {$src, ${dst} |${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrrk, X86_INS_VPCONFLICTD: vpconflictd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTDrrkz, X86_INS_VPCONFLICTD: vpconflictd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrm, X86_INS_VPCONFLICTQ: vpconflictq {$src, ${dst}|${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrmb, X86_INS_VPCONFLICTQ: vpconflictq {${src}{1to8}, ${dst}|${dst}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrmbk, X86_INS_VPCONFLICTQ: vpconflictq {${src2}{1to8}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrmbkz, X86_INS_VPCONFLICTQ: vpconflictq {${src}{1to8}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrmk, X86_INS_VPCONFLICTQ: vpconflictq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrmkz, X86_INS_VPCONFLICTQ: vpconflictq {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrr, X86_INS_VPCONFLICTQ: vpconflictq {$src, ${dst} |${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrrk, X86_INS_VPCONFLICTQ: vpconflictq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPCONFLICTQrrkz, X86_INS_VPCONFLICTQ: vpconflictq {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPERM2F128rm, X86_INS_VPERM2F128: vperm2f128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERM2F128rr, X86_INS_VPERM2F128: vperm2f128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERM2I128rm, X86_INS_VPERM2I128: vperm2i128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERM2I128rr, X86_INS_VPERM2I128: vperm2i128 $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMDYrm, X86_INS_VPERMD: vpermd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMDYrr, X86_INS_VPERMD: vpermd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMDZrm, X86_INS_VPERMD: vpermd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMDZrr, X86_INS_VPERMD: vpermd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Drm, X86_INS_VPERMI2D: vpermi2d $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Drmk, X86_INS_VPERMI2D: vpermi2d {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Drmkz, X86_INS_VPERMI2D: vpermi2d {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Drr, X86_INS_VPERMI2D: vpermi2d $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Drrk, X86_INS_VPERMI2D: vpermi2d {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Drrkz, X86_INS_VPERMI2D: vpermi2d {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PDrm, X86_INS_VPERMI2PD: vpermi2pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PDrmk, X86_INS_VPERMI2PD: vpermi2pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PDrmkz, X86_INS_VPERMI2PD: vpermi2pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PDrr, X86_INS_VPERMI2PD: vpermi2pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PDrrk, X86_INS_VPERMI2PD: vpermi2pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PDrrkz, X86_INS_VPERMI2PD: vpermi2pd {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PSrm, X86_INS_VPERMI2PS: vpermi2ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PSrmk, X86_INS_VPERMI2PS: vpermi2ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PSrmkz, X86_INS_VPERMI2PS: vpermi2ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PSrr, X86_INS_VPERMI2PS: vpermi2ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PSrrk, X86_INS_VPERMI2PS: vpermi2ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2PSrrkz, X86_INS_VPERMI2PS: vpermi2ps {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Qrm, X86_INS_VPERMI2Q: vpermi2q $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Qrmk, X86_INS_VPERMI2Q: vpermi2q {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Qrmkz, X86_INS_VPERMI2Q: vpermi2q {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Qrr, X86_INS_VPERMI2Q: vpermi2q $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Qrrk, X86_INS_VPERMI2Q: vpermi2q {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMI2Qrrkz, X86_INS_VPERMI2Q: vpermi2q {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMIL2PDmr, X86_INS_VPERMIL2PD: vpermil2pd $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PDmrY, X86_INS_VPERMIL2PD: vpermil2pd $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PDrm, X86_INS_VPERMIL2PD: vpermil2pd $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PDrmY, X86_INS_VPERMIL2PD: vpermil2pd $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PDrr, X86_INS_VPERMIL2PD: vpermil2pd $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PDrrY, X86_INS_VPERMIL2PD: vpermil2pd $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PSmr, X86_INS_VPERMIL2PS: vpermil2ps $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PSmrY, X86_INS_VPERMIL2PS: vpermil2ps $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PSrm, X86_INS_VPERMIL2PS: vpermil2ps $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PSrmY, X86_INS_VPERMIL2PS: vpermil2ps $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PSrr, X86_INS_VPERMIL2PS: vpermil2ps $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMIL2PSrrY, X86_INS_VPERMIL2PS: vpermil2ps $dst, $src1, $src2, $src3, $src4 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDYmi, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDYri, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDYrm, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPDYrr, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPDZmi, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDZri, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDZrm, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPDZrr, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPDmi, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDri, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPDrm, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPDrr, X86_INS_VPERMILPD: vpermilpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPSYmi, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPSYri, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPSYrm, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPSYrr, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPSZmi, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPSZri, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPSZrm, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPSZrr, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPSmi, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPSri, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMILPSrm, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMILPSrr, X86_INS_VPERMILPS: vpermilps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMPDYmi, X86_INS_VPERMPD: vpermpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMPDYri, X86_INS_VPERMPD: vpermpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMPDZmi, X86_INS_VPERMPD: vpermpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMPDZri, X86_INS_VPERMPD: vpermpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMPDZrm, X86_INS_VPERMPD: vpermpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMPDZrr, X86_INS_VPERMPD: vpermpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMPSYrm, X86_INS_VPERMPS: vpermps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMPSYrr, X86_INS_VPERMPS: vpermps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMPSZrm, X86_INS_VPERMPS: vpermps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMPSZrr, X86_INS_VPERMPS: vpermps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMQYmi, X86_INS_VPERMQ: vpermq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMQYri, X86_INS_VPERMQ: vpermq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMQZmi, X86_INS_VPERMQ: vpermq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMQZri, X86_INS_VPERMQ: vpermq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPERMQZrm, X86_INS_VPERMQ: vpermq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMQZrr, X86_INS_VPERMQ: vpermq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Drm, X86_INS_VPERMT2D: vpermt2d $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Drmk, X86_INS_VPERMT2D: vpermt2d {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Drmkz, X86_INS_VPERMT2D: vpermt2d {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Drr, X86_INS_VPERMT2D: vpermt2d $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Drrk, X86_INS_VPERMT2D: vpermt2d {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Drrkz, X86_INS_VPERMT2D: vpermt2d {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PDrm, X86_INS_VPERMT2PD: vpermt2pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PDrmk, X86_INS_VPERMT2PD: vpermt2pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PDrmkz, X86_INS_VPERMT2PD: vpermt2pd {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PDrr, X86_INS_VPERMT2PD: vpermt2pd $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PDrrk, X86_INS_VPERMT2PD: vpermt2pd {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PDrrkz, X86_INS_VPERMT2PD: vpermt2pd {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PSrm, X86_INS_VPERMT2PS: vpermt2ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PSrmk, X86_INS_VPERMT2PS: vpermt2ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PSrmkz, X86_INS_VPERMT2PS: vpermt2ps {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PSrr, X86_INS_VPERMT2PS: vpermt2ps $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PSrrk, X86_INS_VPERMT2PS: vpermt2ps {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2PSrrkz, X86_INS_VPERMT2PS: vpermt2ps {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Qrm, X86_INS_VPERMT2Q: vpermt2q $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Qrmk, X86_INS_VPERMT2Q: vpermt2q {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Qrmkz, X86_INS_VPERMT2Q: vpermt2q {$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Qrr, X86_INS_VPERMT2Q: vpermt2q $dst, $src2, $src3 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Qrrk, X86_INS_VPERMT2Q: vpermt2q {$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPERMT2Qrrkz, X86_INS_VPERMT2Q: vpermt2q {$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ128rmk, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ128rmkz, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ128rrk, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ128rrkz, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ256rmk, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ256rmkz, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ256rrk, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZ256rrkz, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZrmk, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZrmkz, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZrrk, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDDZrrkz, X86_INS_VPEXPANDD: vpexpandd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ128rmk, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ128rmkz, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ128rrk, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ128rrkz, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ256rmk, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ256rmkz, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ256rrk, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZ256rrkz, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZrmk, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZrmkz, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZrrk, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXPANDQZrrkz, X86_INS_VPEXPANDQ: vpexpandq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPEXTRBmr, X86_INS_VPEXTRB: vpextrb $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRBrr, X86_INS_VPEXTRB: vpextrb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRDmr, X86_INS_VPEXTRD: vpextrd $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRDrr, X86_INS_VPEXTRD: vpextrd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRQmr, X86_INS_VPEXTRQ: vpextrq $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRQrr, X86_INS_VPEXTRQ: vpextrq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRWmr, X86_INS_VPEXTRW: vpextrw $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRWri, X86_INS_VPEXTRW: vpextrw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPEXTRWrr_REV, X86_INS_VPEXTRW: vpextrw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPGATHERDDYrm, X86_INS_VPGATHERDD: vpgatherdd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERDDZrm, X86_INS_VPGATHERDD: vpgatherdd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPGATHERDDrm, X86_INS_VPGATHERDD: vpgatherdd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERDQYrm, X86_INS_VPGATHERDQ: vpgatherdq $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERDQZrm, X86_INS_VPGATHERDQ: vpgatherdq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPGATHERDQrm, X86_INS_VPGATHERDQ: vpgatherdq $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERQDYrm, X86_INS_VPGATHERQD: vpgatherqd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERQDZrm, X86_INS_VPGATHERQD: vpgatherqd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPGATHERQDrm, X86_INS_VPGATHERQD: vpgatherqd $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERQQYrm, X86_INS_VPGATHERQQ: vpgatherqq $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPGATHERQQZrm, X86_INS_VPGATHERQQ: vpgatherqq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPGATHERQQrm, X86_INS_VPGATHERQQ: vpgatherqq $dst, $src2, $mask */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDBDrm, X86_INS_VPHADDBD: vphaddbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDBDrr, X86_INS_VPHADDBD: vphaddbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDBQrm, X86_INS_VPHADDBQ: vphaddbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDBQrr, X86_INS_VPHADDBQ: vphaddbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDBWrm, X86_INS_VPHADDBW: vphaddbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDBWrr, X86_INS_VPHADDBW: vphaddbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDDQrm, X86_INS_VPHADDDQ: vphadddq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDDQrr, X86_INS_VPHADDDQ: vphadddq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDDYrm, X86_INS_VPHADDD: vphaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDDYrr, X86_INS_VPHADDD: vphaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDDrm, X86_INS_VPHADDD: vphaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDDrr, X86_INS_VPHADDD: vphaddd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDSWrm128, X86_INS_VPHADDSW: vphaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDSWrm256, X86_INS_VPHADDSW: vphaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDSWrr128, X86_INS_VPHADDSW: vphaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDSWrr256, X86_INS_VPHADDSW: vphaddsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDUBDrm, X86_INS_VPHADDUBD: vphaddubd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUBDrr, X86_INS_VPHADDUBD: vphaddubd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUBQrm, X86_INS_VPHADDUBQ: vphaddubq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUBQrr, X86_INS_VPHADDUBQ: vphaddubq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUBWrm, X86_INS_VPHADDUBW: vphaddubw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUBWrr, X86_INS_VPHADDUBW: vphaddubw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUDQrm, X86_INS_VPHADDUDQ: vphaddudq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUDQrr, X86_INS_VPHADDUDQ: vphaddudq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUWDrm, X86_INS_VPHADDUWD: vphadduwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUWDrr, X86_INS_VPHADDUWD: vphadduwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUWQrm, X86_INS_VPHADDUWQ: vphadduwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDUWQrr, X86_INS_VPHADDUWQ: vphadduwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDWDrm, X86_INS_VPHADDWD: vphaddwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDWDrr, X86_INS_VPHADDWD: vphaddwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDWQrm, X86_INS_VPHADDWQ: vphaddwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDWQrr, X86_INS_VPHADDWQ: vphaddwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHADDWYrm, X86_INS_VPHADDW: vphaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDWYrr, X86_INS_VPHADDW: vphaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDWrm, X86_INS_VPHADDW: vphaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHADDWrr, X86_INS_VPHADDW: vphaddw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHMINPOSUWrm128, X86_INS_VPHMINPOSUW: vphminposuw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHMINPOSUWrr128, X86_INS_VPHMINPOSUW: vphminposuw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBBWrm, X86_INS_VPHSUBBW: vphsubbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBBWrr, X86_INS_VPHSUBBW: vphsubbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBDQrm, X86_INS_VPHSUBDQ: vphsubdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBDQrr, X86_INS_VPHSUBDQ: vphsubdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBDYrm, X86_INS_VPHSUBD: vphsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBDYrr, X86_INS_VPHSUBD: vphsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBDrm, X86_INS_VPHSUBD: vphsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBDrr, X86_INS_VPHSUBD: vphsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBSWrm128, X86_INS_VPHSUBSW: vphsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBSWrm256, X86_INS_VPHSUBSW: vphsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBSWrr128, X86_INS_VPHSUBSW: vphsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBSWrr256, X86_INS_VPHSUBSW: vphsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBWDrm, X86_INS_VPHSUBWD: vphsubwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBWDrr, X86_INS_VPHSUBWD: vphsubwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPHSUBWYrm, X86_INS_VPHSUBW: vphsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBWYrr, X86_INS_VPHSUBW: vphsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBWrm, X86_INS_VPHSUBW: vphsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPHSUBWrr, X86_INS_VPHSUBW: vphsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPINSRBrm, X86_INS_VPINSRB: vpinsrb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRBrr, X86_INS_VPINSRB: vpinsrb $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRDrm, X86_INS_VPINSRD: vpinsrd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRDrr, X86_INS_VPINSRD: vpinsrd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRQrm, X86_INS_VPINSRQ: vpinsrq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRQrr, X86_INS_VPINSRQ: vpinsrq $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRWrmi, X86_INS_VPINSRW: vpinsrw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPINSRWrri, X86_INS_VPINSRW: vpinsrw $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPLZCNTDrm, X86_INS_VPLZCNTD: vplzcntd {$src, ${dst}|${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrmb, X86_INS_VPLZCNTD: vplzcntd {${src}{1to16}, ${dst}|${dst}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrmbk, X86_INS_VPLZCNTD: vplzcntd {${src2}{1to16}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrmbkz, X86_INS_VPLZCNTD: vplzcntd {${src}{1to16}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrmk, X86_INS_VPLZCNTD: vplzcntd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrmkz, X86_INS_VPLZCNTD: vplzcntd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrr, X86_INS_VPLZCNTD: vplzcntd {$src, ${dst} |${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrrk, X86_INS_VPLZCNTD: vplzcntd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTDrrkz, X86_INS_VPLZCNTD: vplzcntd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrm, X86_INS_VPLZCNTQ: vplzcntq {$src, ${dst}|${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrmb, X86_INS_VPLZCNTQ: vplzcntq {${src}{1to8}, ${dst}|${dst}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrmbk, X86_INS_VPLZCNTQ: vplzcntq {${src2}{1to8}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrmbkz, X86_INS_VPLZCNTQ: vplzcntq {${src}{1to8}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrmk, X86_INS_VPLZCNTQ: vplzcntq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrmkz, X86_INS_VPLZCNTQ: vplzcntq {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrr, X86_INS_VPLZCNTQ: vplzcntq {$src, ${dst} |${dst}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrrk, X86_INS_VPLZCNTQ: vplzcntq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPLZCNTQrrkz, X86_INS_VPLZCNTQ: vplzcntq {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMACSDDrm, X86_INS_VPMACSDD: vpmacsdd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSDDrr, X86_INS_VPMACSDD: vpmacsdd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSDQHrm, X86_INS_VPMACSDQH: vpmacsdqh $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSDQHrr, X86_INS_VPMACSDQH: vpmacsdqh $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSDQLrm, X86_INS_VPMACSDQL: vpmacsdql $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSDQLrr, X86_INS_VPMACSDQL: vpmacsdql $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSDDrm, X86_INS_VPMACSSDD: vpmacssdd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSDDrr, X86_INS_VPMACSSDD: vpmacssdd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSDQHrm, X86_INS_VPMACSSDQH: vpmacssdqh $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSDQHrr, X86_INS_VPMACSSDQH: vpmacssdqh $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSDQLrm, X86_INS_VPMACSSDQL: vpmacssdql $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSDQLrr, X86_INS_VPMACSSDQL: vpmacssdql $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSWDrm, X86_INS_VPMACSSWD: vpmacsswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSWDrr, X86_INS_VPMACSSWD: vpmacsswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSWWrm, X86_INS_VPMACSSWW: vpmacssww $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSSWWrr, X86_INS_VPMACSSWW: vpmacssww $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSWDrm, X86_INS_VPMACSWD: vpmacswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSWDrr, X86_INS_VPMACSWD: vpmacswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSWWrm, X86_INS_VPMACSWW: vpmacsww $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMACSWWrr, X86_INS_VPMACSWW: vpmacsww $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADCSSWDrm, X86_INS_VPMADCSSWD: vpmadcsswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADCSSWDrr, X86_INS_VPMADCSSWD: vpmadcsswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADCSWDrm, X86_INS_VPMADCSWD: vpmadcswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADCSWDrr, X86_INS_VPMADCSWD: vpmadcswd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDUBSWrm128, X86_INS_VPMADDUBSW: vpmaddubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDUBSWrm256, X86_INS_VPMADDUBSW: vpmaddubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDUBSWrr128, X86_INS_VPMADDUBSW: vpmaddubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDUBSWrr256, X86_INS_VPMADDUBSW: vpmaddubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDWDYrm, X86_INS_VPMADDWD: vpmaddwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDWDYrr, X86_INS_VPMADDWD: vpmaddwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDWDrm, X86_INS_VPMADDWD: vpmaddwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMADDWDrr, X86_INS_VPMADDWD: vpmaddwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVDYmr, X86_INS_VPMASKMOVD: vpmaskmovd $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVDYrm, X86_INS_VPMASKMOVD: vpmaskmovd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVDmr, X86_INS_VPMASKMOVD: vpmaskmovd $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVDrm, X86_INS_VPMASKMOVD: vpmaskmovd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVQYmr, X86_INS_VPMASKMOVQ: vpmaskmovq $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVQYrm, X86_INS_VPMASKMOVQ: vpmaskmovq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVQmr, X86_INS_VPMASKMOVQ: vpmaskmovq $dst, $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMASKMOVQrm, X86_INS_VPMASKMOVQ: vpmaskmovq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBYrm, X86_INS_VPMAXSB: vpmaxsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBYrr, X86_INS_VPMAXSB: vpmaxsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ128rm, X86_INS_VPMAXSB: vpmaxsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ128rmk, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ128rmkz, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ128rr, X86_INS_VPMAXSB: vpmaxsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ128rrk, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ128rrkz, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ256rm, X86_INS_VPMAXSB: vpmaxsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ256rmk, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ256rmkz, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ256rr, X86_INS_VPMAXSB: vpmaxsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ256rrk, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZ256rrkz, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZrm, X86_INS_VPMAXSB: vpmaxsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZrmk, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZrmkz, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZrr, X86_INS_VPMAXSB: vpmaxsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZrrk, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBZrrkz, X86_INS_VPMAXSB: vpmaxsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBrm, X86_INS_VPMAXSB: vpmaxsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSBrr, X86_INS_VPMAXSB: vpmaxsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDYrm, X86_INS_VPMAXSD: vpmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDYrr, X86_INS_VPMAXSD: vpmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rm, X86_INS_VPMAXSD: vpmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rmb, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rmbk, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rmbkz, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rmk, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rmkz, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rr, X86_INS_VPMAXSD: vpmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rrk, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ128rrkz, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rm, X86_INS_VPMAXSD: vpmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rmb, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rmbk, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rmbkz, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rmk, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rmkz, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rr, X86_INS_VPMAXSD: vpmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rrk, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZ256rrkz, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrm, X86_INS_VPMAXSD: vpmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrmb, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrmbk, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrmbkz, X86_INS_VPMAXSD: vpmaxsd {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrmk, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrmkz, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrr, X86_INS_VPMAXSD: vpmaxsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrrk, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDZrrkz, X86_INS_VPMAXSD: vpmaxsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDrm, X86_INS_VPMAXSD: vpmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSDrr, X86_INS_VPMAXSD: vpmaxsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rm, X86_INS_VPMAXSQ: vpmaxsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rmb, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rmbk, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rmbkz, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rmk, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rmkz, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rr, X86_INS_VPMAXSQ: vpmaxsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rrk, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ128rrkz, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rm, X86_INS_VPMAXSQ: vpmaxsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rmb, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rmbk, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rmbkz, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rmk, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rmkz, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rr, X86_INS_VPMAXSQ: vpmaxsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rrk, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZ256rrkz, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrm, X86_INS_VPMAXSQ: vpmaxsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrmb, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrmbk, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrmbkz, X86_INS_VPMAXSQ: vpmaxsq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrmk, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrmkz, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrr, X86_INS_VPMAXSQ: vpmaxsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrrk, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSQZrrkz, X86_INS_VPMAXSQ: vpmaxsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWYrm, X86_INS_VPMAXSW: vpmaxsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWYrr, X86_INS_VPMAXSW: vpmaxsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ128rm, X86_INS_VPMAXSW: vpmaxsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ128rmk, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ128rmkz, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ128rr, X86_INS_VPMAXSW: vpmaxsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ128rrk, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ128rrkz, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ256rm, X86_INS_VPMAXSW: vpmaxsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ256rmk, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ256rmkz, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ256rr, X86_INS_VPMAXSW: vpmaxsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ256rrk, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZ256rrkz, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZrm, X86_INS_VPMAXSW: vpmaxsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZrmk, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZrmkz, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZrr, X86_INS_VPMAXSW: vpmaxsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZrrk, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWZrrkz, X86_INS_VPMAXSW: vpmaxsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWrm, X86_INS_VPMAXSW: vpmaxsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXSWrr, X86_INS_VPMAXSW: vpmaxsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBYrm, X86_INS_VPMAXUB: vpmaxub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBYrr, X86_INS_VPMAXUB: vpmaxub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ128rm, X86_INS_VPMAXUB: vpmaxub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ128rmk, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ128rmkz, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ128rr, X86_INS_VPMAXUB: vpmaxub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ128rrk, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ128rrkz, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ256rm, X86_INS_VPMAXUB: vpmaxub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ256rmk, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ256rmkz, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ256rr, X86_INS_VPMAXUB: vpmaxub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ256rrk, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZ256rrkz, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZrm, X86_INS_VPMAXUB: vpmaxub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZrmk, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZrmkz, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZrr, X86_INS_VPMAXUB: vpmaxub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZrrk, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBZrrkz, X86_INS_VPMAXUB: vpmaxub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBrm, X86_INS_VPMAXUB: vpmaxub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUBrr, X86_INS_VPMAXUB: vpmaxub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDYrm, X86_INS_VPMAXUD: vpmaxud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDYrr, X86_INS_VPMAXUD: vpmaxud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rm, X86_INS_VPMAXUD: vpmaxud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rmb, X86_INS_VPMAXUD: vpmaxud {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rmbk, X86_INS_VPMAXUD: vpmaxud {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rmbkz, X86_INS_VPMAXUD: vpmaxud {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rmk, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rmkz, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rr, X86_INS_VPMAXUD: vpmaxud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rrk, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ128rrkz, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rm, X86_INS_VPMAXUD: vpmaxud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rmb, X86_INS_VPMAXUD: vpmaxud {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rmbk, X86_INS_VPMAXUD: vpmaxud {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rmbkz, X86_INS_VPMAXUD: vpmaxud {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rmk, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rmkz, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rr, X86_INS_VPMAXUD: vpmaxud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rrk, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZ256rrkz, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrm, X86_INS_VPMAXUD: vpmaxud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrmb, X86_INS_VPMAXUD: vpmaxud {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrmbk, X86_INS_VPMAXUD: vpmaxud {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrmbkz, X86_INS_VPMAXUD: vpmaxud {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrmk, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrmkz, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrr, X86_INS_VPMAXUD: vpmaxud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrrk, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDZrrkz, X86_INS_VPMAXUD: vpmaxud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDrm, X86_INS_VPMAXUD: vpmaxud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUDrr, X86_INS_VPMAXUD: vpmaxud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rm, X86_INS_VPMAXUQ: vpmaxuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rmb, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rmbk, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rmbkz, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rmk, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rmkz, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rr, X86_INS_VPMAXUQ: vpmaxuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rrk, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ128rrkz, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rm, X86_INS_VPMAXUQ: vpmaxuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rmb, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rmbk, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rmbkz, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rmk, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rmkz, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rr, X86_INS_VPMAXUQ: vpmaxuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rrk, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZ256rrkz, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrm, X86_INS_VPMAXUQ: vpmaxuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrmb, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrmbk, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrmbkz, X86_INS_VPMAXUQ: vpmaxuq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrmk, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrmkz, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrr, X86_INS_VPMAXUQ: vpmaxuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrrk, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUQZrrkz, X86_INS_VPMAXUQ: vpmaxuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWYrm, X86_INS_VPMAXUW: vpmaxuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWYrr, X86_INS_VPMAXUW: vpmaxuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ128rm, X86_INS_VPMAXUW: vpmaxuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ128rmk, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ128rmkz, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ128rr, X86_INS_VPMAXUW: vpmaxuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ128rrk, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ128rrkz, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ256rm, X86_INS_VPMAXUW: vpmaxuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ256rmk, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ256rmkz, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ256rr, X86_INS_VPMAXUW: vpmaxuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ256rrk, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZ256rrkz, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZrm, X86_INS_VPMAXUW: vpmaxuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZrmk, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZrmkz, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZrr, X86_INS_VPMAXUW: vpmaxuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZrrk, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWZrrkz, X86_INS_VPMAXUW: vpmaxuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWrm, X86_INS_VPMAXUW: vpmaxuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMAXUWrr, X86_INS_VPMAXUW: vpmaxuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBYrm, X86_INS_VPMINSB: vpminsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBYrr, X86_INS_VPMINSB: vpminsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ128rm, X86_INS_VPMINSB: vpminsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ128rmk, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ128rmkz, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ128rr, X86_INS_VPMINSB: vpminsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ128rrk, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ128rrkz, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ256rm, X86_INS_VPMINSB: vpminsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ256rmk, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ256rmkz, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ256rr, X86_INS_VPMINSB: vpminsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ256rrk, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZ256rrkz, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZrm, X86_INS_VPMINSB: vpminsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZrmk, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZrmkz, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZrr, X86_INS_VPMINSB: vpminsb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZrrk, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBZrrkz, X86_INS_VPMINSB: vpminsb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBrm, X86_INS_VPMINSB: vpminsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSBrr, X86_INS_VPMINSB: vpminsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDYrm, X86_INS_VPMINSD: vpminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDYrr, X86_INS_VPMINSD: vpminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rm, X86_INS_VPMINSD: vpminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rmb, X86_INS_VPMINSD: vpminsd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rmbk, X86_INS_VPMINSD: vpminsd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rmbkz, X86_INS_VPMINSD: vpminsd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rmk, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rmkz, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rr, X86_INS_VPMINSD: vpminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rrk, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ128rrkz, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rm, X86_INS_VPMINSD: vpminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rmb, X86_INS_VPMINSD: vpminsd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rmbk, X86_INS_VPMINSD: vpminsd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rmbkz, X86_INS_VPMINSD: vpminsd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rmk, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rmkz, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rr, X86_INS_VPMINSD: vpminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rrk, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZ256rrkz, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrm, X86_INS_VPMINSD: vpminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrmb, X86_INS_VPMINSD: vpminsd {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrmbk, X86_INS_VPMINSD: vpminsd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrmbkz, X86_INS_VPMINSD: vpminsd {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrmk, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrmkz, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrr, X86_INS_VPMINSD: vpminsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrrk, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDZrrkz, X86_INS_VPMINSD: vpminsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDrm, X86_INS_VPMINSD: vpminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSDrr, X86_INS_VPMINSD: vpminsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rm, X86_INS_VPMINSQ: vpminsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rmb, X86_INS_VPMINSQ: vpminsq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rmbk, X86_INS_VPMINSQ: vpminsq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rmbkz, X86_INS_VPMINSQ: vpminsq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rmk, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rmkz, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rr, X86_INS_VPMINSQ: vpminsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rrk, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ128rrkz, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rm, X86_INS_VPMINSQ: vpminsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rmb, X86_INS_VPMINSQ: vpminsq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rmbk, X86_INS_VPMINSQ: vpminsq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rmbkz, X86_INS_VPMINSQ: vpminsq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rmk, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rmkz, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rr, X86_INS_VPMINSQ: vpminsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rrk, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZ256rrkz, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrm, X86_INS_VPMINSQ: vpminsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrmb, X86_INS_VPMINSQ: vpminsq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrmbk, X86_INS_VPMINSQ: vpminsq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrmbkz, X86_INS_VPMINSQ: vpminsq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrmk, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrmkz, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrr, X86_INS_VPMINSQ: vpminsq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrrk, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSQZrrkz, X86_INS_VPMINSQ: vpminsq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWYrm, X86_INS_VPMINSW: vpminsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWYrr, X86_INS_VPMINSW: vpminsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ128rm, X86_INS_VPMINSW: vpminsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ128rmk, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ128rmkz, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ128rr, X86_INS_VPMINSW: vpminsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ128rrk, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ128rrkz, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ256rm, X86_INS_VPMINSW: vpminsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ256rmk, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ256rmkz, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ256rr, X86_INS_VPMINSW: vpminsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ256rrk, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZ256rrkz, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZrm, X86_INS_VPMINSW: vpminsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZrmk, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZrmkz, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZrr, X86_INS_VPMINSW: vpminsw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZrrk, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWZrrkz, X86_INS_VPMINSW: vpminsw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWrm, X86_INS_VPMINSW: vpminsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINSWrr, X86_INS_VPMINSW: vpminsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBYrm, X86_INS_VPMINUB: vpminub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBYrr, X86_INS_VPMINUB: vpminub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ128rm, X86_INS_VPMINUB: vpminub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ128rmk, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ128rmkz, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ128rr, X86_INS_VPMINUB: vpminub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ128rrk, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ128rrkz, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ256rm, X86_INS_VPMINUB: vpminub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ256rmk, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ256rmkz, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ256rr, X86_INS_VPMINUB: vpminub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ256rrk, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZ256rrkz, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZrm, X86_INS_VPMINUB: vpminub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZrmk, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZrmkz, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZrr, X86_INS_VPMINUB: vpminub $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZrrk, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBZrrkz, X86_INS_VPMINUB: vpminub {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBrm, X86_INS_VPMINUB: vpminub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUBrr, X86_INS_VPMINUB: vpminub $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDYrm, X86_INS_VPMINUD: vpminud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDYrr, X86_INS_VPMINUD: vpminud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rm, X86_INS_VPMINUD: vpminud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rmb, X86_INS_VPMINUD: vpminud {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rmbk, X86_INS_VPMINUD: vpminud {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rmbkz, X86_INS_VPMINUD: vpminud {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rmk, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rmkz, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rr, X86_INS_VPMINUD: vpminud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rrk, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ128rrkz, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rm, X86_INS_VPMINUD: vpminud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rmb, X86_INS_VPMINUD: vpminud {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rmbk, X86_INS_VPMINUD: vpminud {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rmbkz, X86_INS_VPMINUD: vpminud {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rmk, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rmkz, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rr, X86_INS_VPMINUD: vpminud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rrk, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZ256rrkz, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrm, X86_INS_VPMINUD: vpminud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrmb, X86_INS_VPMINUD: vpminud {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrmbk, X86_INS_VPMINUD: vpminud {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrmbkz, X86_INS_VPMINUD: vpminud {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrmk, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrmkz, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrr, X86_INS_VPMINUD: vpminud $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrrk, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDZrrkz, X86_INS_VPMINUD: vpminud {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDrm, X86_INS_VPMINUD: vpminud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUDrr, X86_INS_VPMINUD: vpminud $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rm, X86_INS_VPMINUQ: vpminuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rmb, X86_INS_VPMINUQ: vpminuq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rmbk, X86_INS_VPMINUQ: vpminuq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rmbkz, X86_INS_VPMINUQ: vpminuq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rmk, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rmkz, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rr, X86_INS_VPMINUQ: vpminuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rrk, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ128rrkz, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rm, X86_INS_VPMINUQ: vpminuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rmb, X86_INS_VPMINUQ: vpminuq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rmbk, X86_INS_VPMINUQ: vpminuq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rmbkz, X86_INS_VPMINUQ: vpminuq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rmk, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rmkz, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rr, X86_INS_VPMINUQ: vpminuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rrk, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZ256rrkz, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrm, X86_INS_VPMINUQ: vpminuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrmb, X86_INS_VPMINUQ: vpminuq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrmbk, X86_INS_VPMINUQ: vpminuq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrmbkz, X86_INS_VPMINUQ: vpminuq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrmk, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrmkz, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrr, X86_INS_VPMINUQ: vpminuq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrrk, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUQZrrkz, X86_INS_VPMINUQ: vpminuq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWYrm, X86_INS_VPMINUW: vpminuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWYrr, X86_INS_VPMINUW: vpminuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ128rm, X86_INS_VPMINUW: vpminuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ128rmk, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ128rmkz, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ128rr, X86_INS_VPMINUW: vpminuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ128rrk, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ128rrkz, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ256rm, X86_INS_VPMINUW: vpminuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ256rmk, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ256rmkz, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ256rr, X86_INS_VPMINUW: vpminuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ256rrk, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZ256rrkz, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZrm, X86_INS_VPMINUW: vpminuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZrmk, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZrmkz, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZrr, X86_INS_VPMINUW: vpminuw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZrrk, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWZrrkz, X86_INS_VPMINUW: vpminuw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWrm, X86_INS_VPMINUW: vpminuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMINUWrr, X86_INS_VPMINUW: vpminuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVDBmr, X86_INS_VPMOVDB: vpmovdb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVDBmrk, X86_INS_VPMOVDB: vpmovdb {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVDBrr, X86_INS_VPMOVDB: vpmovdb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVDBrrk, X86_INS_VPMOVDB: vpmovdb {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVDBrrkz, X86_INS_VPMOVDB: vpmovdb {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVDWmr, X86_INS_VPMOVDW: vpmovdw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVDWmrk, X86_INS_VPMOVDW: vpmovdw {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVDWrr, X86_INS_VPMOVDW: vpmovdw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVDWrrk, X86_INS_VPMOVDW: vpmovdw {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVDWrrkz, X86_INS_VPMOVDW: vpmovdw {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2BZ128rr, X86_INS_VPMOVM2B: vpmovm2b $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2BZ256rr, X86_INS_VPMOVM2B: vpmovm2b $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2BZrr, X86_INS_VPMOVM2B: vpmovm2b $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2DZ128rr, X86_INS_VPMOVM2D: vpmovm2d $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2DZ256rr, X86_INS_VPMOVM2D: vpmovm2d $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2DZrr, X86_INS_VPMOVM2D: vpmovm2d $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2QZ128rr, X86_INS_VPMOVM2Q: vpmovm2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2QZ256rr, X86_INS_VPMOVM2Q: vpmovm2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2QZrr, X86_INS_VPMOVM2Q: vpmovm2q $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2WZ128rr, X86_INS_VPMOVM2W: vpmovm2w $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2WZ256rr, X86_INS_VPMOVM2W: vpmovm2w $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVM2WZrr, X86_INS_VPMOVM2W: vpmovm2w $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVMSKBYrr, X86_INS_VPMOVMSKB: vpmovmskb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVMSKBrr, X86_INS_VPMOVMSKB: vpmovmskb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQBmr, X86_INS_VPMOVQB: vpmovqb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVQBmrk, X86_INS_VPMOVQB: vpmovqb {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVQBrr, X86_INS_VPMOVQB: vpmovqb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQBrrk, X86_INS_VPMOVQB: vpmovqb {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQBrrkz, X86_INS_VPMOVQB: vpmovqb {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQDmr, X86_INS_VPMOVQD: vpmovqd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVQDmrk, X86_INS_VPMOVQD: vpmovqd {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVQDrr, X86_INS_VPMOVQD: vpmovqd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQDrrk, X86_INS_VPMOVQD: vpmovqd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQDrrkz, X86_INS_VPMOVQD: vpmovqd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQWmr, X86_INS_VPMOVQW: vpmovqw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVQWmrk, X86_INS_VPMOVQW: vpmovqw {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVQWrr, X86_INS_VPMOVQW: vpmovqw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQWrrk, X86_INS_VPMOVQW: vpmovqw {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVQWrrkz, X86_INS_VPMOVQW: vpmovqw {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSDBmr, X86_INS_VPMOVSDB: vpmovsdb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSDBmrk, X86_INS_VPMOVSDB: vpmovsdb {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSDBrr, X86_INS_VPMOVSDB: vpmovsdb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSDBrrk, X86_INS_VPMOVSDB: vpmovsdb {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSDBrrkz, X86_INS_VPMOVSDB: vpmovsdb {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSDWmr, X86_INS_VPMOVSDW: vpmovsdw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSDWmrk, X86_INS_VPMOVSDW: vpmovsdw {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSDWrr, X86_INS_VPMOVSDW: vpmovsdw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSDWrrk, X86_INS_VPMOVSDW: vpmovsdw {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSDWrrkz, X86_INS_VPMOVSDW: vpmovsdw {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQBmr, X86_INS_VPMOVSQB: vpmovsqb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSQBmrk, X86_INS_VPMOVSQB: vpmovsqb {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSQBrr, X86_INS_VPMOVSQB: vpmovsqb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQBrrk, X86_INS_VPMOVSQB: vpmovsqb {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQBrrkz, X86_INS_VPMOVSQB: vpmovsqb {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQDmr, X86_INS_VPMOVSQD: vpmovsqd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSQDmrk, X86_INS_VPMOVSQD: vpmovsqd {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSQDrr, X86_INS_VPMOVSQD: vpmovsqd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQDrrk, X86_INS_VPMOVSQD: vpmovsqd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQDrrkz, X86_INS_VPMOVSQD: vpmovsqd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQWmr, X86_INS_VPMOVSQW: vpmovsqw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSQWmrk, X86_INS_VPMOVSQW: vpmovsqw {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVSQWrr, X86_INS_VPMOVSQW: vpmovsqw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQWrrk, X86_INS_VPMOVSQW: vpmovsqw {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSQWrrkz, X86_INS_VPMOVSQW: vpmovsqw {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDYrm, X86_INS_VPMOVSXBD: vpmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDYrr, X86_INS_VPMOVSXBD: vpmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDZrm, X86_INS_VPMOVSXBD: vpmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDZrmk, X86_INS_VPMOVSXBD: vpmovsxbd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDZrmkz, X86_INS_VPMOVSXBD: vpmovsxbd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDZrr, X86_INS_VPMOVSXBD: vpmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDZrrk, X86_INS_VPMOVSXBD: vpmovsxbd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDZrrkz, X86_INS_VPMOVSXBD: vpmovsxbd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDrm, X86_INS_VPMOVSXBD: vpmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBDrr, X86_INS_VPMOVSXBD: vpmovsxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQYrm, X86_INS_VPMOVSXBQ: vpmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQYrr, X86_INS_VPMOVSXBQ: vpmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQZrm, X86_INS_VPMOVSXBQ: vpmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQZrmk, X86_INS_VPMOVSXBQ: vpmovsxbq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQZrmkz, X86_INS_VPMOVSXBQ: vpmovsxbq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQZrr, X86_INS_VPMOVSXBQ: vpmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQZrrk, X86_INS_VPMOVSXBQ: vpmovsxbq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQZrrkz, X86_INS_VPMOVSXBQ: vpmovsxbq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQrm, X86_INS_VPMOVSXBQ: vpmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBQrr, X86_INS_VPMOVSXBQ: vpmovsxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBWYrm, X86_INS_VPMOVSXBW: vpmovsxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBWYrr, X86_INS_VPMOVSXBW: vpmovsxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBWrm, X86_INS_VPMOVSXBW: vpmovsxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXBWrr, X86_INS_VPMOVSXBW: vpmovsxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQYrm, X86_INS_VPMOVSXDQ: vpmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQYrr, X86_INS_VPMOVSXDQ: vpmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQZrm, X86_INS_VPMOVSXDQ: vpmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQZrmk, X86_INS_VPMOVSXDQ: vpmovsxdq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQZrmkz, X86_INS_VPMOVSXDQ: vpmovsxdq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQZrr, X86_INS_VPMOVSXDQ: vpmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQZrrk, X86_INS_VPMOVSXDQ: vpmovsxdq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQZrrkz, X86_INS_VPMOVSXDQ: vpmovsxdq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQrm, X86_INS_VPMOVSXDQ: vpmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXDQrr, X86_INS_VPMOVSXDQ: vpmovsxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDYrm, X86_INS_VPMOVSXWD: vpmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDYrr, X86_INS_VPMOVSXWD: vpmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDZrm, X86_INS_VPMOVSXWD: vpmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDZrmk, X86_INS_VPMOVSXWD: vpmovsxwd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDZrmkz, X86_INS_VPMOVSXWD: vpmovsxwd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDZrr, X86_INS_VPMOVSXWD: vpmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDZrrk, X86_INS_VPMOVSXWD: vpmovsxwd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDZrrkz, X86_INS_VPMOVSXWD: vpmovsxwd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDrm, X86_INS_VPMOVSXWD: vpmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWDrr, X86_INS_VPMOVSXWD: vpmovsxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQYrm, X86_INS_VPMOVSXWQ: vpmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQYrr, X86_INS_VPMOVSXWQ: vpmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQZrm, X86_INS_VPMOVSXWQ: vpmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQZrmk, X86_INS_VPMOVSXWQ: vpmovsxwq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQZrmkz, X86_INS_VPMOVSXWQ: vpmovsxwq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQZrr, X86_INS_VPMOVSXWQ: vpmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQZrrk, X86_INS_VPMOVSXWQ: vpmovsxwq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQZrrkz, X86_INS_VPMOVSXWQ: vpmovsxwq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQrm, X86_INS_VPMOVSXWQ: vpmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVSXWQrr, X86_INS_VPMOVSXWQ: vpmovsxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDBmr, X86_INS_VPMOVUSDB: vpmovusdb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDBmrk, X86_INS_VPMOVUSDB: vpmovusdb {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDBrr, X86_INS_VPMOVUSDB: vpmovusdb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDBrrk, X86_INS_VPMOVUSDB: vpmovusdb {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDBrrkz, X86_INS_VPMOVUSDB: vpmovusdb {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDWmr, X86_INS_VPMOVUSDW: vpmovusdw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDWmrk, X86_INS_VPMOVUSDW: vpmovusdw {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDWrr, X86_INS_VPMOVUSDW: vpmovusdw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDWrrk, X86_INS_VPMOVUSDW: vpmovusdw {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSDWrrkz, X86_INS_VPMOVUSDW: vpmovusdw {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQBmr, X86_INS_VPMOVUSQB: vpmovusqb $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQBmrk, X86_INS_VPMOVUSQB: vpmovusqb {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQBrr, X86_INS_VPMOVUSQB: vpmovusqb $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQBrrk, X86_INS_VPMOVUSQB: vpmovusqb {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQBrrkz, X86_INS_VPMOVUSQB: vpmovusqb {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQDmr, X86_INS_VPMOVUSQD: vpmovusqd $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQDmrk, X86_INS_VPMOVUSQD: vpmovusqd {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQDrr, X86_INS_VPMOVUSQD: vpmovusqd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQDrrk, X86_INS_VPMOVUSQD: vpmovusqd {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQDrrkz, X86_INS_VPMOVUSQD: vpmovusqd {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQWmr, X86_INS_VPMOVUSQW: vpmovusqw $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQWmrk, X86_INS_VPMOVUSQW: vpmovusqw {$src, $dst {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQWrr, X86_INS_VPMOVUSQW: vpmovusqw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQWrrk, X86_INS_VPMOVUSQW: vpmovusqw {$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVUSQWrrkz, X86_INS_VPMOVUSQW: vpmovusqw {$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDYrm, X86_INS_VPMOVZXBD: vpmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDYrr, X86_INS_VPMOVZXBD: vpmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDZrm, X86_INS_VPMOVZXBD: vpmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDZrmk, X86_INS_VPMOVZXBD: vpmovzxbd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDZrmkz, X86_INS_VPMOVZXBD: vpmovzxbd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDZrr, X86_INS_VPMOVZXBD: vpmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDZrrk, X86_INS_VPMOVZXBD: vpmovzxbd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDZrrkz, X86_INS_VPMOVZXBD: vpmovzxbd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDrm, X86_INS_VPMOVZXBD: vpmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBDrr, X86_INS_VPMOVZXBD: vpmovzxbd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQYrm, X86_INS_VPMOVZXBQ: vpmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQYrr, X86_INS_VPMOVZXBQ: vpmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQZrm, X86_INS_VPMOVZXBQ: vpmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQZrmk, X86_INS_VPMOVZXBQ: vpmovzxbq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQZrmkz, X86_INS_VPMOVZXBQ: vpmovzxbq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQZrr, X86_INS_VPMOVZXBQ: vpmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQZrrk, X86_INS_VPMOVZXBQ: vpmovzxbq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQZrrkz, X86_INS_VPMOVZXBQ: vpmovzxbq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQrm, X86_INS_VPMOVZXBQ: vpmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBQrr, X86_INS_VPMOVZXBQ: vpmovzxbq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBWYrm, X86_INS_VPMOVZXBW: vpmovzxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBWYrr, X86_INS_VPMOVZXBW: vpmovzxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBWrm, X86_INS_VPMOVZXBW: vpmovzxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXBWrr, X86_INS_VPMOVZXBW: vpmovzxbw $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQYrm, X86_INS_VPMOVZXDQ: vpmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQYrr, X86_INS_VPMOVZXDQ: vpmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQZrm, X86_INS_VPMOVZXDQ: vpmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQZrmk, X86_INS_VPMOVZXDQ: vpmovzxdq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQZrmkz, X86_INS_VPMOVZXDQ: vpmovzxdq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQZrr, X86_INS_VPMOVZXDQ: vpmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQZrrk, X86_INS_VPMOVZXDQ: vpmovzxdq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQZrrkz, X86_INS_VPMOVZXDQ: vpmovzxdq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQrm, X86_INS_VPMOVZXDQ: vpmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXDQrr, X86_INS_VPMOVZXDQ: vpmovzxdq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDYrm, X86_INS_VPMOVZXWD: vpmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDYrr, X86_INS_VPMOVZXWD: vpmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDZrm, X86_INS_VPMOVZXWD: vpmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDZrmk, X86_INS_VPMOVZXWD: vpmovzxwd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDZrmkz, X86_INS_VPMOVZXWD: vpmovzxwd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDZrr, X86_INS_VPMOVZXWD: vpmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDZrrk, X86_INS_VPMOVZXWD: vpmovzxwd {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDZrrkz, X86_INS_VPMOVZXWD: vpmovzxwd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDrm, X86_INS_VPMOVZXWD: vpmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWDrr, X86_INS_VPMOVZXWD: vpmovzxwd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQYrm, X86_INS_VPMOVZXWQ: vpmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQYrr, X86_INS_VPMOVZXWQ: vpmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQZrm, X86_INS_VPMOVZXWQ: vpmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQZrmk, X86_INS_VPMOVZXWQ: vpmovzxwq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQZrmkz, X86_INS_VPMOVZXWQ: vpmovzxwq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQZrr, X86_INS_VPMOVZXWQ: vpmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQZrrk, X86_INS_VPMOVZXWQ: vpmovzxwq {$src, $dst {${mask}} |$dst {${mask}}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQZrrkz, X86_INS_VPMOVZXWQ: vpmovzxwq {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQrm, X86_INS_VPMOVZXWQ: vpmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMOVZXWQrr, X86_INS_VPMOVZXWQ: vpmovzxwq $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VPMULDQYrm, X86_INS_VPMULDQ: vpmuldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQYrr, X86_INS_VPMULDQ: vpmuldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrm, X86_INS_VPMULDQ: vpmuldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrmb, X86_INS_VPMULDQ: vpmuldq {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrmbk, X86_INS_VPMULDQ: vpmuldq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrmbkz, X86_INS_VPMULDQ: vpmuldq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrmk, X86_INS_VPMULDQ: vpmuldq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrmkz, X86_INS_VPMULDQ: vpmuldq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrr, X86_INS_VPMULDQ: vpmuldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrrk, X86_INS_VPMULDQ: vpmuldq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQZrrkz, X86_INS_VPMULDQ: vpmuldq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQrm, X86_INS_VPMULDQ: vpmuldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULDQrr, X86_INS_VPMULDQ: vpmuldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHRSWrm128, X86_INS_VPMULHRSW: vpmulhrsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHRSWrm256, X86_INS_VPMULHRSW: vpmulhrsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHRSWrr128, X86_INS_VPMULHRSW: vpmulhrsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHRSWrr256, X86_INS_VPMULHRSW: vpmulhrsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHUWYrm, X86_INS_VPMULHUW: vpmulhuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHUWYrr, X86_INS_VPMULHUW: vpmulhuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHUWrm, X86_INS_VPMULHUW: vpmulhuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHUWrr, X86_INS_VPMULHUW: vpmulhuw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHWYrm, X86_INS_VPMULHW: vpmulhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHWYrr, X86_INS_VPMULHW: vpmulhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHWrm, X86_INS_VPMULHW: vpmulhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULHWrr, X86_INS_VPMULHW: vpmulhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDYrm, X86_INS_VPMULLD: vpmulld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDYrr, X86_INS_VPMULLD: vpmulld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rm, X86_INS_VPMULLD: vpmulld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rmb, X86_INS_VPMULLD: vpmulld {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rmbk, X86_INS_VPMULLD: vpmulld {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rmbkz, X86_INS_VPMULLD: vpmulld {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rmk, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rmkz, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rr, X86_INS_VPMULLD: vpmulld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rrk, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ128rrkz, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rm, X86_INS_VPMULLD: vpmulld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rmb, X86_INS_VPMULLD: vpmulld {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rmbk, X86_INS_VPMULLD: vpmulld {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rmbkz, X86_INS_VPMULLD: vpmulld {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rmk, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rmkz, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rr, X86_INS_VPMULLD: vpmulld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rrk, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZ256rrkz, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrm, X86_INS_VPMULLD: vpmulld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrmb, X86_INS_VPMULLD: vpmulld {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrmbk, X86_INS_VPMULLD: vpmulld {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrmbkz, X86_INS_VPMULLD: vpmulld {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrmk, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrmkz, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrr, X86_INS_VPMULLD: vpmulld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrrk, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDZrrkz, X86_INS_VPMULLD: vpmulld {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDrm, X86_INS_VPMULLD: vpmulld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLDrr, X86_INS_VPMULLD: vpmulld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rm, X86_INS_VPMULLQ: vpmullq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rmb, X86_INS_VPMULLQ: vpmullq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rmbk, X86_INS_VPMULLQ: vpmullq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rmbkz, X86_INS_VPMULLQ: vpmullq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rmk, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rmkz, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rr, X86_INS_VPMULLQ: vpmullq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rrk, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ128rrkz, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rm, X86_INS_VPMULLQ: vpmullq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rmb, X86_INS_VPMULLQ: vpmullq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rmbk, X86_INS_VPMULLQ: vpmullq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rmbkz, X86_INS_VPMULLQ: vpmullq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rmk, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rmkz, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rr, X86_INS_VPMULLQ: vpmullq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rrk, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZ256rrkz, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrm, X86_INS_VPMULLQ: vpmullq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrmb, X86_INS_VPMULLQ: vpmullq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrmbk, X86_INS_VPMULLQ: vpmullq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrmbkz, X86_INS_VPMULLQ: vpmullq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrmk, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrmkz, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrr, X86_INS_VPMULLQ: vpmullq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrrk, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLQZrrkz, X86_INS_VPMULLQ: vpmullq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWYrm, X86_INS_VPMULLW: vpmullw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWYrr, X86_INS_VPMULLW: vpmullw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ128rm, X86_INS_VPMULLW: vpmullw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ128rmk, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ128rmkz, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ128rr, X86_INS_VPMULLW: vpmullw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ128rrk, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ128rrkz, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ256rm, X86_INS_VPMULLW: vpmullw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ256rmk, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ256rmkz, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ256rr, X86_INS_VPMULLW: vpmullw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ256rrk, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZ256rrkz, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZrm, X86_INS_VPMULLW: vpmullw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZrmk, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZrmkz, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZrr, X86_INS_VPMULLW: vpmullw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZrrk, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWZrrkz, X86_INS_VPMULLW: vpmullw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWrm, X86_INS_VPMULLW: vpmullw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULLWrr, X86_INS_VPMULLW: vpmullw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQYrm, X86_INS_VPMULUDQ: vpmuludq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQYrr, X86_INS_VPMULUDQ: vpmuludq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrm, X86_INS_VPMULUDQ: vpmuludq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrmb, X86_INS_VPMULUDQ: vpmuludq {${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrmbk, X86_INS_VPMULUDQ: vpmuludq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrmbkz, X86_INS_VPMULUDQ: vpmuludq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrmk, X86_INS_VPMULUDQ: vpmuludq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrmkz, X86_INS_VPMULUDQ: vpmuludq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrr, X86_INS_VPMULUDQ: vpmuludq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrrk, X86_INS_VPMULUDQ: vpmuludq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQZrrkz, X86_INS_VPMULUDQ: vpmuludq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQrm, X86_INS_VPMULUDQ: vpmuludq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPMULUDQrr, X86_INS_VPMULUDQ: vpmuludq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rm, X86_INS_VPORD: vpord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rmb, X86_INS_VPORD: vpord {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rmbk, X86_INS_VPORD: vpord {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rmbkz, X86_INS_VPORD: vpord {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rmk, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rmkz, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rr, X86_INS_VPORD: vpord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rrk, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ128rrkz, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rm, X86_INS_VPORD: vpord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rmb, X86_INS_VPORD: vpord {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rmbk, X86_INS_VPORD: vpord {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rmbkz, X86_INS_VPORD: vpord {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rmk, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rmkz, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rr, X86_INS_VPORD: vpord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rrk, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZ256rrkz, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrm, X86_INS_VPORD: vpord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrmb, X86_INS_VPORD: vpord {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrmbk, X86_INS_VPORD: vpord {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrmbkz, X86_INS_VPORD: vpord {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrmk, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrmkz, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrr, X86_INS_VPORD: vpord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrrk, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORDZrrkz, X86_INS_VPORD: vpord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rm, X86_INS_VPORQ: vporq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rmb, X86_INS_VPORQ: vporq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rmbk, X86_INS_VPORQ: vporq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rmbkz, X86_INS_VPORQ: vporq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rmk, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rmkz, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rr, X86_INS_VPORQ: vporq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rrk, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ128rrkz, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rm, X86_INS_VPORQ: vporq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rmb, X86_INS_VPORQ: vporq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rmbk, X86_INS_VPORQ: vporq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rmbkz, X86_INS_VPORQ: vporq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rmk, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rmkz, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rr, X86_INS_VPORQ: vporq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rrk, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZ256rrkz, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrm, X86_INS_VPORQ: vporq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrmb, X86_INS_VPORQ: vporq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrmbk, X86_INS_VPORQ: vporq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrmbkz, X86_INS_VPORQ: vporq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrmk, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrmkz, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrr, X86_INS_VPORQ: vporq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrrk, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORQZrrkz, X86_INS_VPORQ: vporq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORYrm, X86_INS_VPOR: vpor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORYrr, X86_INS_VPOR: vpor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORrm, X86_INS_VPOR: vpor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPORrr, X86_INS_VPOR: vpor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPPERMmr, X86_INS_VPPERM: vpperm $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPPERMrm, X86_INS_VPPERM: vpperm $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPPERMrr, X86_INS_VPPERM: vpperm $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTBmi, X86_INS_VPROTB: vprotb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTBmr, X86_INS_VPROTB: vprotb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTBri, X86_INS_VPROTB: vprotb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTBrm, X86_INS_VPROTB: vprotb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTBrr, X86_INS_VPROTB: vprotb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTDmi, X86_INS_VPROTD: vprotd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTDmr, X86_INS_VPROTD: vprotd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTDri, X86_INS_VPROTD: vprotd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTDrm, X86_INS_VPROTD: vprotd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTDrr, X86_INS_VPROTD: vprotd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTQmi, X86_INS_VPROTQ: vprotq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTQmr, X86_INS_VPROTQ: vprotq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTQri, X86_INS_VPROTQ: vprotq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTQrm, X86_INS_VPROTQ: vprotq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTQrr, X86_INS_VPROTQ: vprotq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTWmi, X86_INS_VPROTW: vprotw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTWmr, X86_INS_VPROTW: vprotw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTWri, X86_INS_VPROTW: vprotw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPROTWrm, X86_INS_VPROTW: vprotw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPROTWrr, X86_INS_VPROTW: vprotw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSADBWYrm, X86_INS_VPSADBW: vpsadbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSADBWYrr, X86_INS_VPSADBW: vpsadbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSADBWrm, X86_INS_VPSADBW: vpsadbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSADBWrr, X86_INS_VPSADBW: vpsadbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSCATTERDDZmr, X86_INS_VPSCATTERDD: vpscatterdd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSCATTERDQZmr, X86_INS_VPSCATTERDQ: vpscatterdq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSCATTERQDZmr, X86_INS_VPSCATTERQD: vpscatterqd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSCATTERQQZmr, X86_INS_VPSCATTERQQ: vpscatterqq {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHABmr, X86_INS_VPSHAB: vpshab $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHABrm, X86_INS_VPSHAB: vpshab $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHABrr, X86_INS_VPSHAB: vpshab $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHADmr, X86_INS_VPSHAD: vpshad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHADrm, X86_INS_VPSHAD: vpshad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHADrr, X86_INS_VPSHAD: vpshad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHAQmr, X86_INS_VPSHAQ: vpshaq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHAQrm, X86_INS_VPSHAQ: vpshaq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHAQrr, X86_INS_VPSHAQ: vpshaq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHAWmr, X86_INS_VPSHAW: vpshaw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHAWrm, X86_INS_VPSHAW: vpshaw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHAWrr, X86_INS_VPSHAW: vpshaw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLBmr, X86_INS_VPSHLB: vpshlb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLBrm, X86_INS_VPSHLB: vpshlb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLBrr, X86_INS_VPSHLB: vpshlb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLDmr, X86_INS_VPSHLD: vpshld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLDrm, X86_INS_VPSHLD: vpshld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLDrr, X86_INS_VPSHLD: vpshld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLQmr, X86_INS_VPSHLQ: vpshlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLQrm, X86_INS_VPSHLQ: vpshlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLQrr, X86_INS_VPSHLQ: vpshlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLWmr, X86_INS_VPSHLW: vpshlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLWrm, X86_INS_VPSHLW: vpshlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHLWrr, X86_INS_VPSHLW: vpshlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHUFBYrm, X86_INS_VPSHUFB: vpshufb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHUFBYrr, X86_INS_VPSHUFB: vpshufb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHUFBrm, X86_INS_VPSHUFB: vpshufb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHUFBrr, X86_INS_VPSHUFB: vpshufb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSHUFDYmi, X86_INS_VPSHUFD: vpshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFDYri, X86_INS_VPSHUFD: vpshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFDZmi, X86_INS_VPSHUFD: vpshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFDZri, X86_INS_VPSHUFD: vpshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFDmi, X86_INS_VPSHUFD: vpshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFDri, X86_INS_VPSHUFD: vpshufd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFHWYmi, X86_INS_VPSHUFHW: vpshufhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFHWYri, X86_INS_VPSHUFHW: vpshufhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFHWmi, X86_INS_VPSHUFHW: vpshufhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFHWri, X86_INS_VPSHUFHW: vpshufhw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFLWYmi, X86_INS_VPSHUFLW: vpshuflw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFLWYri, X86_INS_VPSHUFLW: vpshuflw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFLWmi, X86_INS_VPSHUFLW: vpshuflw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSHUFLWri, X86_INS_VPSHUFLW: vpshuflw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSIGNBYrm, X86_INS_VPSIGNB: vpsignb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNBYrr, X86_INS_VPSIGNB: vpsignb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNBrm, X86_INS_VPSIGNB: vpsignb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNBrr, X86_INS_VPSIGNB: vpsignb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNDYrm, X86_INS_VPSIGND: vpsignd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNDYrr, X86_INS_VPSIGND: vpsignd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNDrm, X86_INS_VPSIGND: vpsignd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNDrr, X86_INS_VPSIGND: vpsignd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNWYrm, X86_INS_VPSIGNW: vpsignw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNWYrr, X86_INS_VPSIGNW: vpsignw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNWrm, X86_INS_VPSIGNW: vpsignw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSIGNWrr, X86_INS_VPSIGNW: vpsignw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDQYri, X86_INS_VPSLLDQ: vpslldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDQri, X86_INS_VPSLLDQ: vpslldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDYri, X86_INS_VPSLLD: vpslld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDYrm, X86_INS_VPSLLD: vpslld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDYrr, X86_INS_VPSLLD: vpslld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDZmi, X86_INS_VPSLLD: vpslld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDZmik, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDZmikz, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDZri, X86_INS_VPSLLD: vpslld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDZrik, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDZrikz, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDZrm, X86_INS_VPSLLD: vpslld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDZrmk, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDZrmkz, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDZrr, X86_INS_VPSLLD: vpslld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDZrrk, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDZrrkz, X86_INS_VPSLLD: vpslld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDri, X86_INS_VPSLLD: vpslld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLDrm, X86_INS_VPSLLD: vpslld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLDrr, X86_INS_VPSLLD: vpslld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQYri, X86_INS_VPSLLQ: vpsllq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQYrm, X86_INS_VPSLLQ: vpsllq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQYrr, X86_INS_VPSLLQ: vpsllq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQZmi, X86_INS_VPSLLQ: vpsllq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQZmik, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQZmikz, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQZri, X86_INS_VPSLLQ: vpsllq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQZrik, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQZrikz, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQZrm, X86_INS_VPSLLQ: vpsllq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQZrmk, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQZrmkz, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQZrr, X86_INS_VPSLLQ: vpsllq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQZrrk, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQZrrkz, X86_INS_VPSLLQ: vpsllq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQri, X86_INS_VPSLLQ: vpsllq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLQrm, X86_INS_VPSLLQ: vpsllq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLQrr, X86_INS_VPSLLQ: vpsllq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDYrm, X86_INS_VPSLLVD: vpsllvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDYrr, X86_INS_VPSLLVD: vpsllvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDZrm, X86_INS_VPSLLVD: vpsllvd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDZrmk, X86_INS_VPSLLVD: vpsllvd {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDZrmkz, X86_INS_VPSLLVD: vpsllvd {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDZrr, X86_INS_VPSLLVD: vpsllvd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDZrrk, X86_INS_VPSLLVD: vpsllvd {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDZrrkz, X86_INS_VPSLLVD: vpsllvd {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDrm, X86_INS_VPSLLVD: vpsllvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVDrr, X86_INS_VPSLLVD: vpsllvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQYrm, X86_INS_VPSLLVQ: vpsllvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQYrr, X86_INS_VPSLLVQ: vpsllvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQZrm, X86_INS_VPSLLVQ: vpsllvq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQZrmk, X86_INS_VPSLLVQ: vpsllvq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQZrmkz, X86_INS_VPSLLVQ: vpsllvq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQZrr, X86_INS_VPSLLVQ: vpsllvq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQZrrk, X86_INS_VPSLLVQ: vpsllvq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQZrrkz, X86_INS_VPSLLVQ: vpsllvq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQrm, X86_INS_VPSLLVQ: vpsllvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLVQrr, X86_INS_VPSLLVQ: vpsllvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLWYri, X86_INS_VPSLLW: vpsllw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLWYrm, X86_INS_VPSLLW: vpsllw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLWYrr, X86_INS_VPSLLW: vpsllw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLWri, X86_INS_VPSLLW: vpsllw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSLLWrm, X86_INS_VPSLLW: vpsllw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSLLWrr, X86_INS_VPSLLW: vpsllw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADYri, X86_INS_VPSRAD: vpsrad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADYrm, X86_INS_VPSRAD: vpsrad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADYrr, X86_INS_VPSRAD: vpsrad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADZmi, X86_INS_VPSRAD: vpsrad $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADZmik, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADZmikz, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADZri, X86_INS_VPSRAD: vpsrad $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADZrik, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADZrikz, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADZrm, X86_INS_VPSRAD: vpsrad $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADZrmk, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADZrmkz, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADZrr, X86_INS_VPSRAD: vpsrad $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADZrrk, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADZrrkz, X86_INS_VPSRAD: vpsrad {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADri, X86_INS_VPSRAD: vpsrad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRADrm, X86_INS_VPSRAD: vpsrad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRADrr, X86_INS_VPSRAD: vpsrad $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAQZmi, X86_INS_VPSRAQ: vpsraq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAQZmik, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAQZmikz, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAQZri, X86_INS_VPSRAQ: vpsraq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAQZrik, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAQZrikz, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAQZrm, X86_INS_VPSRAQ: vpsraq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAQZrmk, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAQZrmkz, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAQZrr, X86_INS_VPSRAQ: vpsraq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAQZrrk, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAQZrrkz, X86_INS_VPSRAQ: vpsraq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDYrm, X86_INS_VPSRAVD: vpsravd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDYrr, X86_INS_VPSRAVD: vpsravd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDZrm, X86_INS_VPSRAVD: vpsravd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDZrmk, X86_INS_VPSRAVD: vpsravd {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDZrmkz, X86_INS_VPSRAVD: vpsravd {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDZrr, X86_INS_VPSRAVD: vpsravd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDZrrk, X86_INS_VPSRAVD: vpsravd {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDZrrkz, X86_INS_VPSRAVD: vpsravd {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDrm, X86_INS_VPSRAVD: vpsravd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVDrr, X86_INS_VPSRAVD: vpsravd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVQZrm, X86_INS_VPSRAVQ: vpsravq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVQZrmk, X86_INS_VPSRAVQ: vpsravq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVQZrmkz, X86_INS_VPSRAVQ: vpsravq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVQZrr, X86_INS_VPSRAVQ: vpsravq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVQZrrk, X86_INS_VPSRAVQ: vpsravq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAVQZrrkz, X86_INS_VPSRAVQ: vpsravq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAWYri, X86_INS_VPSRAW: vpsraw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAWYrm, X86_INS_VPSRAW: vpsraw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAWYrr, X86_INS_VPSRAW: vpsraw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAWri, X86_INS_VPSRAW: vpsraw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRAWrm, X86_INS_VPSRAW: vpsraw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRAWrr, X86_INS_VPSRAW: vpsraw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDQYri, X86_INS_VPSRLDQ: vpsrldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDQri, X86_INS_VPSRLDQ: vpsrldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDYri, X86_INS_VPSRLD: vpsrld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDYrm, X86_INS_VPSRLD: vpsrld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDYrr, X86_INS_VPSRLD: vpsrld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDZmi, X86_INS_VPSRLD: vpsrld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDZmik, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDZmikz, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDZri, X86_INS_VPSRLD: vpsrld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDZrik, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDZrikz, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDZrm, X86_INS_VPSRLD: vpsrld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDZrmk, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDZrmkz, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDZrr, X86_INS_VPSRLD: vpsrld $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDZrrk, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDZrrkz, X86_INS_VPSRLD: vpsrld {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDri, X86_INS_VPSRLD: vpsrld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLDrm, X86_INS_VPSRLD: vpsrld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLDrr, X86_INS_VPSRLD: vpsrld $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQYri, X86_INS_VPSRLQ: vpsrlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQYrm, X86_INS_VPSRLQ: vpsrlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQYrr, X86_INS_VPSRLQ: vpsrlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQZmi, X86_INS_VPSRLQ: vpsrlq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQZmik, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQZmikz, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQZri, X86_INS_VPSRLQ: vpsrlq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQZrik, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQZrikz, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQZrm, X86_INS_VPSRLQ: vpsrlq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQZrmk, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQZrmkz, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQZrr, X86_INS_VPSRLQ: vpsrlq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQZrrk, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQZrrkz, X86_INS_VPSRLQ: vpsrlq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQri, X86_INS_VPSRLQ: vpsrlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLQrm, X86_INS_VPSRLQ: vpsrlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLQrr, X86_INS_VPSRLQ: vpsrlq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDYrm, X86_INS_VPSRLVD: vpsrlvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDYrr, X86_INS_VPSRLVD: vpsrlvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDZrm, X86_INS_VPSRLVD: vpsrlvd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDZrmk, X86_INS_VPSRLVD: vpsrlvd {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDZrmkz, X86_INS_VPSRLVD: vpsrlvd {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDZrr, X86_INS_VPSRLVD: vpsrlvd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDZrrk, X86_INS_VPSRLVD: vpsrlvd {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDZrrkz, X86_INS_VPSRLVD: vpsrlvd {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDrm, X86_INS_VPSRLVD: vpsrlvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVDrr, X86_INS_VPSRLVD: vpsrlvd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQYrm, X86_INS_VPSRLVQ: vpsrlvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQYrr, X86_INS_VPSRLVQ: vpsrlvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQZrm, X86_INS_VPSRLVQ: vpsrlvq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQZrmk, X86_INS_VPSRLVQ: vpsrlvq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQZrmkz, X86_INS_VPSRLVQ: vpsrlvq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQZrr, X86_INS_VPSRLVQ: vpsrlvq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQZrrk, X86_INS_VPSRLVQ: vpsrlvq {$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQZrrkz, X86_INS_VPSRLVQ: vpsrlvq {$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQrm, X86_INS_VPSRLVQ: vpsrlvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLVQrr, X86_INS_VPSRLVQ: vpsrlvq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLWYri, X86_INS_VPSRLW: vpsrlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLWYrm, X86_INS_VPSRLW: vpsrlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLWYrr, X86_INS_VPSRLW: vpsrlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLWri, X86_INS_VPSRLW: vpsrlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VPSRLWrm, X86_INS_VPSRLW: vpsrlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSRLWrr, X86_INS_VPSRLW: vpsrlw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBYrm, X86_INS_VPSUBB: vpsubb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBYrr, X86_INS_VPSUBB: vpsubb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ128rm, X86_INS_VPSUBB: vpsubb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ128rmk, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ128rmkz, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ128rr, X86_INS_VPSUBB: vpsubb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ128rrk, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ128rrkz, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ256rm, X86_INS_VPSUBB: vpsubb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ256rmk, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ256rmkz, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ256rr, X86_INS_VPSUBB: vpsubb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ256rrk, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZ256rrkz, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZrm, X86_INS_VPSUBB: vpsubb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZrmk, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZrmkz, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZrr, X86_INS_VPSUBB: vpsubb $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZrrk, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBZrrkz, X86_INS_VPSUBB: vpsubb {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBrm, X86_INS_VPSUBB: vpsubb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBBrr, X86_INS_VPSUBB: vpsubb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDYrm, X86_INS_VPSUBD: vpsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDYrr, X86_INS_VPSUBD: vpsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rm, X86_INS_VPSUBD: vpsubd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rmb, X86_INS_VPSUBD: vpsubd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rmbk, X86_INS_VPSUBD: vpsubd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rmbkz, X86_INS_VPSUBD: vpsubd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rmk, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rmkz, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rr, X86_INS_VPSUBD: vpsubd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rrk, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ128rrkz, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rm, X86_INS_VPSUBD: vpsubd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rmb, X86_INS_VPSUBD: vpsubd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rmbk, X86_INS_VPSUBD: vpsubd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rmbkz, X86_INS_VPSUBD: vpsubd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rmk, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rmkz, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rr, X86_INS_VPSUBD: vpsubd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rrk, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZ256rrkz, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrm, X86_INS_VPSUBD: vpsubd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrmb, X86_INS_VPSUBD: vpsubd {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrmbk, X86_INS_VPSUBD: vpsubd {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrmbkz, X86_INS_VPSUBD: vpsubd {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrmk, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrmkz, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrr, X86_INS_VPSUBD: vpsubd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrrk, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDZrrkz, X86_INS_VPSUBD: vpsubd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDrm, X86_INS_VPSUBD: vpsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBDrr, X86_INS_VPSUBD: vpsubd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQYrm, X86_INS_VPSUBQ: vpsubq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQYrr, X86_INS_VPSUBQ: vpsubq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rm, X86_INS_VPSUBQ: vpsubq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rmb, X86_INS_VPSUBQ: vpsubq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rmbk, X86_INS_VPSUBQ: vpsubq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rmbkz, X86_INS_VPSUBQ: vpsubq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rmk, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rmkz, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rr, X86_INS_VPSUBQ: vpsubq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rrk, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ128rrkz, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rm, X86_INS_VPSUBQ: vpsubq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rmb, X86_INS_VPSUBQ: vpsubq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rmbk, X86_INS_VPSUBQ: vpsubq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rmbkz, X86_INS_VPSUBQ: vpsubq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rmk, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rmkz, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rr, X86_INS_VPSUBQ: vpsubq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rrk, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZ256rrkz, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrm, X86_INS_VPSUBQ: vpsubq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrmb, X86_INS_VPSUBQ: vpsubq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrmbk, X86_INS_VPSUBQ: vpsubq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrmbkz, X86_INS_VPSUBQ: vpsubq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrmk, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrmkz, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrr, X86_INS_VPSUBQ: vpsubq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrrk, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQZrrkz, X86_INS_VPSUBQ: vpsubq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQrm, X86_INS_VPSUBQ: vpsubq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBQrr, X86_INS_VPSUBQ: vpsubq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSBYrm, X86_INS_VPSUBSB: vpsubsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSBYrr, X86_INS_VPSUBSB: vpsubsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSBrm, X86_INS_VPSUBSB: vpsubsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSBrr, X86_INS_VPSUBSB: vpsubsb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSWYrm, X86_INS_VPSUBSW: vpsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSWYrr, X86_INS_VPSUBSW: vpsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSWrm, X86_INS_VPSUBSW: vpsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBSWrr, X86_INS_VPSUBSW: vpsubsw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSBYrm, X86_INS_VPSUBUSB: vpsubusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSBYrr, X86_INS_VPSUBUSB: vpsubusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSBrm, X86_INS_VPSUBUSB: vpsubusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSBrr, X86_INS_VPSUBUSB: vpsubusb $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSWYrm, X86_INS_VPSUBUSW: vpsubusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSWYrr, X86_INS_VPSUBUSW: vpsubusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSWrm, X86_INS_VPSUBUSW: vpsubusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBUSWrr, X86_INS_VPSUBUSW: vpsubusw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWYrm, X86_INS_VPSUBW: vpsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWYrr, X86_INS_VPSUBW: vpsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ128rm, X86_INS_VPSUBW: vpsubw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ128rmk, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ128rmkz, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ128rr, X86_INS_VPSUBW: vpsubw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ128rrk, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ128rrkz, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ256rm, X86_INS_VPSUBW: vpsubw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ256rmk, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ256rmkz, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ256rr, X86_INS_VPSUBW: vpsubw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ256rrk, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZ256rrkz, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZrm, X86_INS_VPSUBW: vpsubw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZrmk, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZrmkz, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZrr, X86_INS_VPSUBW: vpsubw $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZrrk, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWZrrkz, X86_INS_VPSUBW: vpsubw {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWrm, X86_INS_VPSUBW: vpsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPSUBWrr, X86_INS_VPSUBW: vpsubw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTMDZrm, X86_INS_VPTESTMD: vptestmd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTMDZrr, X86_INS_VPTESTMD: vptestmd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTMQZrm, X86_INS_VPTESTMQ: vptestmq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTMQZrr, X86_INS_VPTESTMQ: vptestmq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTNMDZrm, X86_INS_VPTESTNMD: vptestnmd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTNMDZrr, X86_INS_VPTESTNMD: vptestnmd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTNMQZrm, X86_INS_VPTESTNMQ: vptestnmq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTNMQZrr, X86_INS_VPTESTNMQ: vptestnmq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTYrm, X86_INS_VPTEST: vptest $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTYrr, X86_INS_VPTEST: vptest $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTrm, X86_INS_VPTEST: vptest $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPTESTrr, X86_INS_VPTEST: vptest $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHBWYrm, X86_INS_VPUNPCKHBW: vpunpckhbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHBWYrr, X86_INS_VPUNPCKHBW: vpunpckhbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHBWrm, X86_INS_VPUNPCKHBW: vpunpckhbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHBWrr, X86_INS_VPUNPCKHBW: vpunpckhbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHDQYrm, X86_INS_VPUNPCKHDQ: vpunpckhdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHDQYrr, X86_INS_VPUNPCKHDQ: vpunpckhdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHDQZrm, X86_INS_VPUNPCKHDQ: vpunpckhdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHDQZrr, X86_INS_VPUNPCKHDQ: vpunpckhdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHDQrm, X86_INS_VPUNPCKHDQ: vpunpckhdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHDQrr, X86_INS_VPUNPCKHDQ: vpunpckhdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHQDQYrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHQDQYrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHQDQZrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHQDQZrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHQDQrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHQDQrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHWDYrm, X86_INS_VPUNPCKHWD: vpunpckhwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHWDYrr, X86_INS_VPUNPCKHWD: vpunpckhwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHWDrm, X86_INS_VPUNPCKHWD: vpunpckhwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKHWDrr, X86_INS_VPUNPCKHWD: vpunpckhwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLBWYrm, X86_INS_VPUNPCKLBW: vpunpcklbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLBWYrr, X86_INS_VPUNPCKLBW: vpunpcklbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLBWrm, X86_INS_VPUNPCKLBW: vpunpcklbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLBWrr, X86_INS_VPUNPCKLBW: vpunpcklbw $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLDQYrm, X86_INS_VPUNPCKLDQ: vpunpckldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLDQYrr, X86_INS_VPUNPCKLDQ: vpunpckldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLDQZrm, X86_INS_VPUNPCKLDQ: vpunpckldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLDQZrr, X86_INS_VPUNPCKLDQ: vpunpckldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLDQrm, X86_INS_VPUNPCKLDQ: vpunpckldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLDQrr, X86_INS_VPUNPCKLDQ: vpunpckldq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLQDQYrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLQDQYrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLQDQZrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLQDQZrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLQDQrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLQDQrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLWDYrm, X86_INS_VPUNPCKLWD: vpunpcklwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLWDYrr, X86_INS_VPUNPCKLWD: vpunpcklwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLWDrm, X86_INS_VPUNPCKLWD: vpunpcklwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPUNPCKLWDrr, X86_INS_VPUNPCKLWD: vpunpcklwd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rm, X86_INS_VPXORD: vpxord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rmb, X86_INS_VPXORD: vpxord {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rmbk, X86_INS_VPXORD: vpxord {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rmbkz, X86_INS_VPXORD: vpxord {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rmk, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rmkz, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rr, X86_INS_VPXORD: vpxord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rrk, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ128rrkz, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rm, X86_INS_VPXORD: vpxord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rmb, X86_INS_VPXORD: vpxord {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rmbk, X86_INS_VPXORD: vpxord {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rmbkz, X86_INS_VPXORD: vpxord {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rmk, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rmkz, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rr, X86_INS_VPXORD: vpxord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rrk, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZ256rrkz, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrm, X86_INS_VPXORD: vpxord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrmb, X86_INS_VPXORD: vpxord {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrmbk, X86_INS_VPXORD: vpxord {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrmbkz, X86_INS_VPXORD: vpxord {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrmk, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrmkz, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrr, X86_INS_VPXORD: vpxord $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrrk, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORDZrrkz, X86_INS_VPXORD: vpxord {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rm, X86_INS_VPXORQ: vpxorq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rmb, X86_INS_VPXORQ: vpxorq {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rmbk, X86_INS_VPXORQ: vpxorq {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rmbkz, X86_INS_VPXORQ: vpxorq {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rmk, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rmkz, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rr, X86_INS_VPXORQ: vpxorq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rrk, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ128rrkz, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rm, X86_INS_VPXORQ: vpxorq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rmb, X86_INS_VPXORQ: vpxorq {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rmbk, X86_INS_VPXORQ: vpxorq {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rmbkz, X86_INS_VPXORQ: vpxorq {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rmk, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rmkz, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rr, X86_INS_VPXORQ: vpxorq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rrk, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZ256rrkz, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrm, X86_INS_VPXORQ: vpxorq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrmb, X86_INS_VPXORQ: vpxorq {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrmbk, X86_INS_VPXORQ: vpxorq {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrmbkz, X86_INS_VPXORQ: vpxorq {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrmk, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrmkz, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrr, X86_INS_VPXORQ: vpxorq $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrrk, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORQZrrkz, X86_INS_VPXORQ: vpxorq {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORYrm, X86_INS_VPXOR: vpxor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORYrr, X86_INS_VPXOR: vpxor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORrm, X86_INS_VPXOR: vpxor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VPXORrr, X86_INS_VPXOR: vpxor $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128m, X86_INS_VRCP14PD: vrcp14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128mb, X86_INS_VRCP14PD: vrcp14pd {${src}{1to2}, $dst |$dst , ${src}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128mbk, X86_INS_VRCP14PD: vrcp14pd {${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128mbkz, X86_INS_VRCP14PD: vrcp14pd {${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128mk, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128mkz, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128r, X86_INS_VRCP14PD: vrcp14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128rk, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ128rkz, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256m, X86_INS_VRCP14PD: vrcp14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256mb, X86_INS_VRCP14PD: vrcp14pd {${src}{1to4}, $dst |$dst , ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256mbk, X86_INS_VRCP14PD: vrcp14pd {${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256mbkz, X86_INS_VRCP14PD: vrcp14pd {${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256mk, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256mkz, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256r, X86_INS_VRCP14PD: vrcp14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256rk, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZ256rkz, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZm, X86_INS_VRCP14PD: vrcp14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZmb, X86_INS_VRCP14PD: vrcp14pd {${src}{1to8}, $dst |$dst , ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZmbk, X86_INS_VRCP14PD: vrcp14pd {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZmbkz, X86_INS_VRCP14PD: vrcp14pd {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZmk, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZmkz, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZr, X86_INS_VRCP14PD: vrcp14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZrk, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PDZrkz, X86_INS_VRCP14PD: vrcp14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128m, X86_INS_VRCP14PS: vrcp14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128mb, X86_INS_VRCP14PS: vrcp14ps {${src}{1to4}, $dst |$dst , ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128mbk, X86_INS_VRCP14PS: vrcp14ps {${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128mbkz, X86_INS_VRCP14PS: vrcp14ps {${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128mk, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128mkz, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128r, X86_INS_VRCP14PS: vrcp14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128rk, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ128rkz, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256m, X86_INS_VRCP14PS: vrcp14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256mb, X86_INS_VRCP14PS: vrcp14ps {${src}{1to8}, $dst |$dst , ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256mbk, X86_INS_VRCP14PS: vrcp14ps {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256mbkz, X86_INS_VRCP14PS: vrcp14ps {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256mk, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256mkz, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256r, X86_INS_VRCP14PS: vrcp14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256rk, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZ256rkz, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZm, X86_INS_VRCP14PS: vrcp14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZmb, X86_INS_VRCP14PS: vrcp14ps {${src}{1to16}, $dst |$dst , ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZmbk, X86_INS_VRCP14PS: vrcp14ps {${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZmbkz, X86_INS_VRCP14PS: vrcp14ps {${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZmk, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZmkz, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZr, X86_INS_VRCP14PS: vrcp14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZrk, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14PSZrkz, X86_INS_VRCP14PS: vrcp14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP14SDrm, X86_INS_VRCP14SD: vrcp14sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP14SDrr, X86_INS_VRCP14SD: vrcp14sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP14SSrm, X86_INS_VRCP14SS: vrcp14ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP14SSrr, X86_INS_VRCP14SS: vrcp14ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28PDm, X86_INS_VRCP28PD: vrcp28pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDmb, X86_INS_VRCP28PD: vrcp28pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDmbk, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDmbkz, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDmk, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDmkz, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDr, X86_INS_VRCP28PD: vrcp28pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDrb, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {sae}|$dst {sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDrbk, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDrbkz, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDrk, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PDrkz, X86_INS_VRCP28PD: vrcp28pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSm, X86_INS_VRCP28PS: vrcp28ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSmb, X86_INS_VRCP28PS: vrcp28ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSmbk, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSmbkz, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSmk, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSmkz, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSr, X86_INS_VRCP28PS: vrcp28ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSrb, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {sae}|$dst {sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSrbk, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSrbkz, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSrk, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28PSrkz, X86_INS_VRCP28PS: vrcp28ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCP28SDm, X86_INS_VRCP28SD: vrcp28sd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDmk, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDmkz, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDr, X86_INS_VRCP28SD: vrcp28sd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDrb, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDrbk, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDrbkz, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDrk, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SDrkz, X86_INS_VRCP28SD: vrcp28sd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSm, X86_INS_VRCP28SS: vrcp28ss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSmk, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSmkz, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSr, X86_INS_VRCP28SS: vrcp28ss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSrb, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSrbk, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSrbkz, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSrk, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCP28SSrkz, X86_INS_VRCP28SS: vrcp28ss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCPPSYm, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSYm_Int, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSYr, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSYr_Int, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSm, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSm_Int, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSr, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPPSr_Int, X86_INS_VRCPPS: vrcpps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRCPSSm, X86_INS_VRCPSS: vrcpss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRCPSSm_Int, X86_INS_VRCPSS: vrcpss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRCPSSr, X86_INS_VRCPSS: vrcpss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRNDSCALEPDZm, X86_INS_VRNDSCALEPD: vrndscalepd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALEPDZr, X86_INS_VRNDSCALEPD: vrndscalepd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALEPSZm, X86_INS_VRNDSCALEPS: vrndscaleps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALEPSZr, X86_INS_VRNDSCALEPS: vrndscaleps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDm, X86_INS_VRNDSCALESD: vrndscalesd $dst , $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDmk, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDmkz, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDr, X86_INS_VRNDSCALESD: vrndscalesd $dst , $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDrb, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDrbk, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDrbkz, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDrk, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESDrkz, X86_INS_VRNDSCALESD: vrndscalesd {$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSm, X86_INS_VRNDSCALESS: vrndscaless $dst , $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSmk, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSmkz, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSr, X86_INS_VRNDSCALESS: vrndscaless $dst , $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSrb, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSrbk, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSrbkz, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSrk, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRNDSCALESSrkz, X86_INS_VRNDSCALESS: vrndscaless {$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDPDm, X86_INS_VROUNDPD: vroundpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDPDr, X86_INS_VROUNDPD: vroundpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDPSm, X86_INS_VROUNDPS: vroundps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDPSr, X86_INS_VROUNDPS: vroundps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDSDm, X86_INS_VROUNDSD: vroundsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDSDr, X86_INS_VROUNDSD: vroundsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDSDr_Int, X86_INS_VROUNDSD: vroundsd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDSSm, X86_INS_VROUNDSS: vroundss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDSSr, X86_INS_VROUNDSS: vroundss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDSSr_Int, X86_INS_VROUNDSS: vroundss $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDYPDm, X86_INS_VROUNDPD: vroundpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDYPDr, X86_INS_VROUNDPD: vroundpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDYPSm, X86_INS_VROUNDPS: vroundps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VROUNDYPSr, X86_INS_VROUNDPS: vroundps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRSQRT14PDZ128m, X86_INS_VRSQRT14PD: vrsqrt14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128mb, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to2}, $dst |$dst , ${src}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128mbk, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128mbkz, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128mk, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128mkz, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128r, X86_INS_VRSQRT14PD: vrsqrt14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128rk, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ128rkz, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256m, X86_INS_VRSQRT14PD: vrsqrt14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256mb, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to4}, $dst |$dst , ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256mbk, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256mbkz, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256mk, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256mkz, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256r, X86_INS_VRSQRT14PD: vrsqrt14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256rk, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZ256rkz, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZm, X86_INS_VRSQRT14PD: vrsqrt14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZmb, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to8}, $dst |$dst , ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZmbk, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZmbkz, X86_INS_VRSQRT14PD: vrsqrt14pd {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZmk, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZmkz, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZr, X86_INS_VRSQRT14PD: vrsqrt14pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZrk, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PDZrkz, X86_INS_VRSQRT14PD: vrsqrt14pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128m, X86_INS_VRSQRT14PS: vrsqrt14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128mb, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to4}, $dst |$dst , ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128mbk, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128mbkz, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128mk, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128mkz, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128r, X86_INS_VRSQRT14PS: vrsqrt14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128rk, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ128rkz, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256m, X86_INS_VRSQRT14PS: vrsqrt14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256mb, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to8}, $dst |$dst , ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256mbk, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256mbkz, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256mk, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256mkz, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256r, X86_INS_VRSQRT14PS: vrsqrt14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256rk, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZ256rkz, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZm, X86_INS_VRSQRT14PS: vrsqrt14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZmb, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to16}, $dst |$dst , ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZmbk, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZmbkz, X86_INS_VRSQRT14PS: vrsqrt14ps {${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZmk, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZmkz, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZr, X86_INS_VRSQRT14PS: vrsqrt14ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZrk, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14PSZrkz, X86_INS_VRSQRT14PS: vrsqrt14ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT14SDrm, X86_INS_VRSQRT14SD: vrsqrt14sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT14SDrr, X86_INS_VRSQRT14SD: vrsqrt14sd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT14SSrm, X86_INS_VRSQRT14SS: vrsqrt14ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT14SSrr, X86_INS_VRSQRT14SS: vrsqrt14ss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDm, X86_INS_VRSQRT28PD: vrsqrt28pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDmb, X86_INS_VRSQRT28PD: vrsqrt28pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDmbk, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDmbkz, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDmk, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDmkz, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDr, X86_INS_VRSQRT28PD: vrsqrt28pd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDrb, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {sae}|$dst {sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDrbk, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDrbkz, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDrk, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PDrkz, X86_INS_VRSQRT28PD: vrsqrt28pd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSm, X86_INS_VRSQRT28PS: vrsqrt28ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSmb, X86_INS_VRSQRT28PS: vrsqrt28ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSmbk, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSmbkz, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSmk, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSmkz, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSr, X86_INS_VRSQRT28PS: vrsqrt28ps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSrb, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {sae}|$dst {sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSrbk, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSrbkz, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSrk, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28PSrkz, X86_INS_VRSQRT28PS: vrsqrt28ps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDm, X86_INS_VRSQRT28SD: vrsqrt28sd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDmk, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDmkz, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDr, X86_INS_VRSQRT28SD: vrsqrt28sd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDrb, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDrbk, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDrbkz, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDrk, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SDrkz, X86_INS_VRSQRT28SD: vrsqrt28sd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSm, X86_INS_VRSQRT28SS: vrsqrt28ss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSmk, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSmkz, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSr, X86_INS_VRSQRT28SS: vrsqrt28ss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSrb, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSrbk, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSrbkz, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSrk, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRT28SSrkz, X86_INS_VRSQRT28SS: vrsqrt28ss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSYm, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSYm_Int, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSYr, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSYr_Int, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSm, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSm_Int, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSr, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTPSr_Int, X86_INS_VRSQRTPS: vrsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VRSQRTSSm, X86_INS_VRSQRTSS: vrsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VRSQRTSSm_Int, X86_INS_VRSQRTSS: vrsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VRSQRTSSr, X86_INS_VRSQRTSS: vrsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSCATTERDPDZmr, X86_INS_VSCATTERDPD: vscatterdpd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSCATTERDPSZmr, X86_INS_VSCATTERDPS: vscatterdps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSCATTERPF0DPDm, X86_INS_VSCATTERPF0DPD: vscatterpf0dpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF0DPSm, X86_INS_VSCATTERPF0DPS: vscatterpf0dps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF0QPDm, X86_INS_VSCATTERPF0QPD: vscatterpf0qpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF0QPSm, X86_INS_VSCATTERPF0QPS: vscatterpf0qps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF1DPDm, X86_INS_VSCATTERPF1DPD: vscatterpf1dpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF1DPSm, X86_INS_VSCATTERPF1DPS: vscatterpf1dps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF1QPDm, X86_INS_VSCATTERPF1QPD: vscatterpf1qpd {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERPF1QPSm, X86_INS_VSCATTERPF1QPS: vscatterpf1qps {$src {${mask}}|{${mask}}, $src} */ 0, { CS_AC_READ, 0 } }, { /* X86_VSCATTERQPDZmr, X86_INS_VSCATTERQPD: vscatterqpd {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSCATTERQPSZmr, X86_INS_VSCATTERQPS: vscatterqps {$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSHUFPDYrmi, X86_INS_VSHUFPD: vshufpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPDYrri, X86_INS_VSHUFPD: vshufpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPDZrmi, X86_INS_VSHUFPD: vshufpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPDZrri, X86_INS_VSHUFPD: vshufpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPDrmi, X86_INS_VSHUFPD: vshufpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPDrri, X86_INS_VSHUFPD: vshufpd $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPSYrmi, X86_INS_VSHUFPS: vshufps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPSYrri, X86_INS_VSHUFPS: vshufps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPSZrmi, X86_INS_VSHUFPS: vshufps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPSZrri, X86_INS_VSHUFPS: vshufps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPSrmi, X86_INS_VSHUFPS: vshufps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSHUFPSrri, X86_INS_VSHUFPS: vshufps $dst, $src1, $src2, $src3 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSQRTPDYm, X86_INS_VSQRTPD: vsqrtpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDYr, X86_INS_VSQRTPD: vsqrtpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128m, X86_INS_VSQRTPD: vsqrtpd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128mb, X86_INS_VSQRTPD: vsqrtpd {${src}{1to2}, $dst |$dst , ${src}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128mbk, X86_INS_VSQRTPD: vsqrtpd {${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128mbkz, X86_INS_VSQRTPD: vsqrtpd {${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128mk, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128mkz, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128r, X86_INS_VSQRTPD: vsqrtpd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128rk, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ128rkz, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256m, X86_INS_VSQRTPD: vsqrtpd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256mb, X86_INS_VSQRTPD: vsqrtpd {${src}{1to4}, $dst |$dst , ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256mbk, X86_INS_VSQRTPD: vsqrtpd {${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256mbkz, X86_INS_VSQRTPD: vsqrtpd {${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256mk, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256mkz, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256r, X86_INS_VSQRTPD: vsqrtpd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256rk, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZ256rkz, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZm, X86_INS_VSQRTPD: vsqrtpd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZmb, X86_INS_VSQRTPD: vsqrtpd {${src}{1to8}, $dst |$dst , ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZmbk, X86_INS_VSQRTPD: vsqrtpd {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZmbkz, X86_INS_VSQRTPD: vsqrtpd {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZmk, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZmkz, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZr, X86_INS_VSQRTPD: vsqrtpd $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZrk, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDZrkz, X86_INS_VSQRTPD: vsqrtpd {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDm, X86_INS_VSQRTPD: vsqrtpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPDr, X86_INS_VSQRTPD: vsqrtpd $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSYm, X86_INS_VSQRTPS: vsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSYr, X86_INS_VSQRTPS: vsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128m, X86_INS_VSQRTPS: vsqrtps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128mb, X86_INS_VSQRTPS: vsqrtps {${src}{1to4}, $dst |$dst , ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128mbk, X86_INS_VSQRTPS: vsqrtps {${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128mbkz, X86_INS_VSQRTPS: vsqrtps {${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128mk, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128mkz, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128r, X86_INS_VSQRTPS: vsqrtps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128rk, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ128rkz, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256m, X86_INS_VSQRTPS: vsqrtps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256mb, X86_INS_VSQRTPS: vsqrtps {${src}{1to8}, $dst |$dst , ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256mbk, X86_INS_VSQRTPS: vsqrtps {${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256mbkz, X86_INS_VSQRTPS: vsqrtps {${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256mk, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256mkz, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256r, X86_INS_VSQRTPS: vsqrtps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256rk, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZ256rkz, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZm, X86_INS_VSQRTPS: vsqrtps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZmb, X86_INS_VSQRTPS: vsqrtps {${src}{1to16}, $dst |$dst , ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZmbk, X86_INS_VSQRTPS: vsqrtps {${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZmbkz, X86_INS_VSQRTPS: vsqrtps {${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZmk, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZmkz, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZr, X86_INS_VSQRTPS: vsqrtps $dst , $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZrk, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}}|$dst {${mask}}, $src} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSZrkz, X86_INS_VSQRTPS: vsqrtps {$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSm, X86_INS_VSQRTPS: vsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTPSr, X86_INS_VSQRTPS: vsqrtps $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VSQRTSDZm, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSDZm_Int, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSQRTSDZr, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSDZr_Int, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSDm, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSDm_Int, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSQRTSDr, X86_INS_VSQRTSD: vsqrtsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSSZm, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSSZm_Int, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSQRTSSZr, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSSZr_Int, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSSm, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSQRTSSm_Int, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSQRTSSr, X86_INS_VSQRTSS: vsqrtss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSTMXCSR, X86_INS_VSTMXCSR: vstmxcsr $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_VSUBPDYrm, X86_INS_VSUBPD: vsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDYrr, X86_INS_VSUBPD: vsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rm, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rmb, X86_INS_VSUBPD: vsubpd {${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rmbk, X86_INS_VSUBPD: vsubpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rmbkz, X86_INS_VSUBPD: vsubpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rmk, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rmkz, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rr, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rrk, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ128rrkz, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rm, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rmb, X86_INS_VSUBPD: vsubpd {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rmbk, X86_INS_VSUBPD: vsubpd {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rmbkz, X86_INS_VSUBPD: vsubpd {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rmk, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rmkz, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rr, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rrk, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZ256rrkz, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrb, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBPDZrbk, X86_INS_VSUBPD: vsubpd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBPDZrbkz, X86_INS_VSUBPD: vsubpd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBPDZrm, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrmb, X86_INS_VSUBPD: vsubpd {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrmbk, X86_INS_VSUBPD: vsubpd {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrmbkz, X86_INS_VSUBPD: vsubpd {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrmk, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrmkz, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrr, X86_INS_VSUBPD: vsubpd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrrk, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDZrrkz, X86_INS_VSUBPD: vsubpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDrm, X86_INS_VSUBPD: vsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPDrr, X86_INS_VSUBPD: vsubpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSYrm, X86_INS_VSUBPS: vsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSYrr, X86_INS_VSUBPS: vsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rm, X86_INS_VSUBPS: vsubps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rmb, X86_INS_VSUBPS: vsubps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rmbk, X86_INS_VSUBPS: vsubps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rmbkz, X86_INS_VSUBPS: vsubps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rmk, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rmkz, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rr, X86_INS_VSUBPS: vsubps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rrk, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ128rrkz, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rm, X86_INS_VSUBPS: vsubps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rmb, X86_INS_VSUBPS: vsubps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rmbk, X86_INS_VSUBPS: vsubps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rmbkz, X86_INS_VSUBPS: vsubps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rmk, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rmkz, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rr, X86_INS_VSUBPS: vsubps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rrk, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZ256rrkz, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrb, X86_INS_VSUBPS: vsubps $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBPSZrbk, X86_INS_VSUBPS: vsubps {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBPSZrbkz, X86_INS_VSUBPS: vsubps {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBPSZrm, X86_INS_VSUBPS: vsubps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrmb, X86_INS_VSUBPS: vsubps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrmbk, X86_INS_VSUBPS: vsubps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrmbkz, X86_INS_VSUBPS: vsubps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrmk, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrmkz, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrr, X86_INS_VSUBPS: vsubps $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrrk, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSZrrkz, X86_INS_VSUBPS: vsubps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSrm, X86_INS_VSUBPS: vsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBPSrr, X86_INS_VSUBPS: vsubps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrm, X86_INS_VSUBSD: vsubsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrm_Int, X86_INS_VSUBSD: vsubsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrm_Intk, X86_INS_VSUBSD: vsubsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrm_Intkz, X86_INS_VSUBSD: vsubsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrr, X86_INS_VSUBSD: vsubsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrr_Int, X86_INS_VSUBSD: vsubsd $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrr_Intk, X86_INS_VSUBSD: vsubsd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrr_Intkz, X86_INS_VSUBSD: vsubsd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDZrrb, X86_INS_VSUBSD: vsubsd $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSDZrrbk, X86_INS_VSUBSD: vsubsd {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSDZrrbkz, X86_INS_VSUBSD: vsubsd {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSDrm, X86_INS_VSUBSD: vsubsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDrm_Int, X86_INS_VSUBSD: vsubsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSDrr, X86_INS_VSUBSD: vsubsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSDrr_Int, X86_INS_VSUBSD: vsubsd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrm, X86_INS_VSUBSS: vsubss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrm_Int, X86_INS_VSUBSS: vsubss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrm_Intk, X86_INS_VSUBSS: vsubss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrm_Intkz, X86_INS_VSUBSS: vsubss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrr, X86_INS_VSUBSS: vsubss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrr_Int, X86_INS_VSUBSS: vsubss $dst , $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrr_Intk, X86_INS_VSUBSS: vsubss {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrr_Intkz, X86_INS_VSUBSS: vsubss {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSZrrb, X86_INS_VSUBSS: vsubss $dst , $src1, $src2, $rc */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSSZrrbk, X86_INS_VSUBSS: vsubss {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSSZrrbkz, X86_INS_VSUBSS: vsubss {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSSrm, X86_INS_VSUBSS: vsubss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSrm_Int, X86_INS_VSUBSS: vsubss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_VSUBSSrr, X86_INS_VSUBSS: vsubss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VSUBSSrr_Int, X86_INS_VSUBSS: vsubss $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPDYrm, X86_INS_VTESTPD: vtestpd $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPDYrr, X86_INS_VTESTPD: vtestpd $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPDrm, X86_INS_VTESTPD: vtestpd $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPDrr, X86_INS_VTESTPD: vtestpd $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPSYrm, X86_INS_VTESTPS: vtestps $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPSYrr, X86_INS_VTESTPS: vtestps $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPSrm, X86_INS_VTESTPS: vtestps $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VTESTPSrr, X86_INS_VTESTPS: vtestps $src1, $src2 */ X86_EFLAGS_RESET_0F | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISDZrm, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISDZrr, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISDrm, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISDrr, X86_INS_VUCOMISD: vucomisd $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISSZrm, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISSZrr, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISSrm, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUCOMISSrr, X86_INS_VUCOMISS: vucomiss $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPDYrm, X86_INS_VUNPCKHPD: vunpckhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPDYrr, X86_INS_VUNPCKHPD: vunpckhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPDZrm, X86_INS_VUNPCKHPD: vunpckhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPDZrr, X86_INS_VUNPCKHPD: vunpckhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPDrm, X86_INS_VUNPCKHPD: vunpckhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPDrr, X86_INS_VUNPCKHPD: vunpckhpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPSYrm, X86_INS_VUNPCKHPS: vunpckhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPSYrr, X86_INS_VUNPCKHPS: vunpckhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPSZrm, X86_INS_VUNPCKHPS: vunpckhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPSZrr, X86_INS_VUNPCKHPS: vunpckhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPSrm, X86_INS_VUNPCKHPS: vunpckhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKHPSrr, X86_INS_VUNPCKHPS: vunpckhps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPDYrm, X86_INS_VUNPCKLPD: vunpcklpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPDYrr, X86_INS_VUNPCKLPD: vunpcklpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPDZrm, X86_INS_VUNPCKLPD: vunpcklpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPDZrr, X86_INS_VUNPCKLPD: vunpcklpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPDrm, X86_INS_VUNPCKLPD: vunpcklpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPDrr, X86_INS_VUNPCKLPD: vunpcklpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPSYrm, X86_INS_VUNPCKLPS: vunpcklps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPSYrr, X86_INS_VUNPCKLPS: vunpcklps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPSZrm, X86_INS_VUNPCKLPS: vunpcklps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPSZrr, X86_INS_VUNPCKLPS: vunpcklps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPSrm, X86_INS_VUNPCKLPS: vunpcklps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VUNPCKLPSrr, X86_INS_VUNPCKLPS: vunpcklps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPDYrm, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPDYrr, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPDrm, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPDrr, X86_INS_VXORPD: vxorpd $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPSYrm, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPSYrr, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPSrm, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VXORPSrr, X86_INS_VXORPS: vxorps $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_VZEROALL, X86_INS_VZEROALL: vzeroall */ 0, { 0 } }, { /* X86_VZEROUPPER, X86_INS_VZEROUPPER: vzeroupper */ 0, { 0 } }, { /* X86_WAIT, X86_INS_WAIT: wait */ X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C1 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { 0 } }, { /* X86_WBINVD, X86_INS_WBINVD: wbinvd */ 0, { 0 } }, { /* X86_WRFSBASE, X86_INS_WRFSBASE: wrfsbase{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRFSBASE64, X86_INS_WRFSBASE: wrfsbase{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRGSBASE, X86_INS_WRGSBASE: wrgsbase{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRGSBASE64, X86_INS_WRGSBASE: wrgsbase{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRMSR, X86_INS_WRMSR: wrmsr */ 0, { 0 } }, { /* X86_XABORT, X86_INS_XABORT: xabort $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_XACQUIRE_PREFIX, X86_INS_XACQUIRE: xacquire */ 0, { 0 } }, { /* X86_XADD16rm, X86_INS_XADD: xadd{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD16rr, X86_INS_XADD: xadd{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD32rm, X86_INS_XADD: xadd{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD32rr, X86_INS_XADD: xadd{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD64rm, X86_INS_XADD: xadd{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD64rr, X86_INS_XADD: xadd{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD8rm, X86_INS_XADD: xadd{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD8rr, X86_INS_XADD: xadd{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XBEGIN_2, X86_INS_XBEGIN: xbegin $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_XBEGIN_4, X86_INS_XBEGIN: xbegin $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_XCHG16ar, X86_INS_XCHG: xchg{w} ax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG16rm, X86_INS_XCHG: xchg{w} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG16rr, X86_INS_XCHG: xchg{w} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32ar, X86_INS_XCHG: xchg{l} eax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32ar64, X86_INS_XCHG: xchg{l} eax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32rm, X86_INS_XCHG: xchg{l} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32rr, X86_INS_XCHG: xchg{l} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG64ar, X86_INS_XCHG: xchg{q} rax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG64rm, X86_INS_XCHG: xchg{q} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG64rr, X86_INS_XCHG: xchg{q} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG8rm, X86_INS_XCHG: xchg{b} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG8rr, X86_INS_XCHG: xchg{b} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCH_F, X86_INS_FXCH: fxch $op */ X86_FPU_FLAGS_RESET_C1 | X86_FPU_FLAGS_UNDEFINED_C0 | X86_FPU_FLAGS_UNDEFINED_C2 | X86_FPU_FLAGS_UNDEFINED_C3, { CS_AC_READ, 0 } }, { /* X86_XCRYPTCBC, X86_INS_XCRYPTCBC: xcryptcbc */ 0, { 0 } }, { /* X86_XCRYPTCFB, X86_INS_XCRYPTCFB: xcryptcfb */ 0, { 0 } }, { /* X86_XCRYPTCTR, X86_INS_XCRYPTCTR: xcryptctr */ 0, { 0 } }, { /* X86_XCRYPTECB, X86_INS_XCRYPTECB: xcryptecb */ 0, { 0 } }, { /* X86_XCRYPTOFB, X86_INS_XCRYPTOFB: xcryptofb */ 0, { 0 } }, { /* X86_XEND, X86_INS_XEND: xend */ 0, { 0 } }, { /* X86_XGETBV, X86_INS_XGETBV: xgetbv */ 0, { 0 } }, { /* X86_XLAT, X86_INS_XLATB: xlatb */ 0, { 0 } }, { /* X86_XOR16i16, X86_INS_XOR: xor{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16mi, X86_INS_XOR: xor{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16mi8, X86_INS_XOR: xor{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16mr, X86_INS_XOR: xor{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR16ri, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16ri8, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16rm, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR16rr, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR16rr_REV, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32i32, X86_INS_XOR: xor{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32mi, X86_INS_XOR: xor{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32mi8, X86_INS_XOR: xor{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32mr, X86_INS_XOR: xor{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32ri, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32ri8, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32rm, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32rr, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32rr_REV, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64i32, X86_INS_XOR: xor{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64mi32, X86_INS_XOR: xor{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64mi8, X86_INS_XOR: xor{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64mr, X86_INS_XOR: xor{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64ri32, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64ri8, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64rm, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64rr, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64rr_REV, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8i8, X86_INS_XOR: xor{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8mi, X86_INS_XOR: xor{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8mi8, X86_INS_XOR: xor{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8mr, X86_INS_XOR: xor{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8ri, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8ri8, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8rm, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8rr, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8rr_REV, X86_INS_XOR: xor{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XORPDrm, X86_INS_XORPD: xorpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XORPDrr, X86_INS_XORPD: xorpd $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XORPSrm, X86_INS_XORPS: xorps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XORPSrr, X86_INS_XORPS: xorps $dst, $src2 */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XRELEASE_PREFIX, X86_INS_XRELEASE: xrelease */ 0, { 0 } }, { /* X86_XRSTOR, X86_INS_XRSTOR: xrstor $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XRSTOR64, X86_INS_XRSTOR64: xrstor64 $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XRSTORS, X86_INS_XRSTORS: xrstors $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XRSTORS64, X86_INS_XRSTORS64: xrstors64 $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XSAVE, X86_INS_XSAVE: xsave $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVE64, X86_INS_XSAVE64: xsave64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEC, X86_INS_XSAVEC: xsavec $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEC64, X86_INS_XSAVEC64: xsavec64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEOPT, X86_INS_XSAVEOPT: xsaveopt $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEOPT64, X86_INS_XSAVEOPT64: xsaveopt64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVES, X86_INS_XSAVES: xsaves $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVES64, X86_INS_XSAVES64: xsaves64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSETBV, X86_INS_XSETBV: xsetbv */ 0, { 0 } }, { /* X86_XSHA1, X86_INS_XSHA1: xsha1 */ 0, { 0 } }, { /* X86_XSHA256, X86_INS_XSHA256: xsha256 */ 0, { 0 } }, { /* X86_XSTORE, X86_INS_XSTORE: xstore */ 0, { 0 } }, { /* X86_XTEST, X86_INS_XTEST: xtest */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_AF, { 0 } }, { /* X86_fdisi8087_nop, X86_INS_FDISI8087_NOP: fdisi8087_nop */ 0, { 0 } }, { /* X86_feni8087_nop, X86_INS_FENI8087_NOP: feni8087_nop */ 0, { 0 } }, capstone-sys-0.11.0/capstone/arch/X86/X86MappingInsnOp_reduce.inc010066400017500001750000010060521363403403300226370ustar0000000000000000// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) // By Nguyen Anh Quynh { /* X86_AAA, X86_INS_AAA: aaa */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_AAD8i8, X86_INS_AAD: aad $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_IGNORE, 0 } }, { /* X86_AAM8i8, X86_INS_AAM: aam $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_IGNORE, 0 } }, { /* X86_AAS, X86_INS_AAS: aas */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_ADC16i16, X86_INS_ADC: adc{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16mi, X86_INS_ADC: adc{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16mi8, X86_INS_ADC: adc{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16mr, X86_INS_ADC: adc{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC16ri, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16ri8, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC16rm, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC16rr, X86_INS_ADC: adc{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC16rr_REV, X86_INS_ADC: adc{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32i32, X86_INS_ADC: adc{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32mi, X86_INS_ADC: adc{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32mi8, X86_INS_ADC: adc{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32mr, X86_INS_ADC: adc{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32ri, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32ri8, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC32rm, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32rr, X86_INS_ADC: adc{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC32rr_REV, X86_INS_ADC: adc{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64i32, X86_INS_ADC: adc{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64mi32, X86_INS_ADC: adc{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64mi8, X86_INS_ADC: adc{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64mr, X86_INS_ADC: adc{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64ri32, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64ri8, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC64rm, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64rr, X86_INS_ADC: adc{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC64rr_REV, X86_INS_ADC: adc{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8i8, X86_INS_ADC: adc{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8mi, X86_INS_ADC: adc{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8mi8, X86_INS_ADC: adc{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8mr, X86_INS_ADC: adc{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8ri, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8ri8, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADC8rm, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8rr, X86_INS_ADC: adc{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADC8rr_REV, X86_INS_ADC: adc{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX32rm, X86_INS_ADCX: adcx{l} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX32rr, X86_INS_ADCX: adcx{l} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX64rm, X86_INS_ADCX: adcx{q} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADCX64rr, X86_INS_ADCX: adcx{q} $dst, $src */ X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16i16, X86_INS_ADD: add{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16mi, X86_INS_ADD: add{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16mi8, X86_INS_ADD: add{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16mr, X86_INS_ADD: add{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16ri, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16ri8, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD16rm, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16rr, X86_INS_ADD: add{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD16rr_REV, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32i32, X86_INS_ADD: add{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32mi, X86_INS_ADD: add{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32mi8, X86_INS_ADD: add{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32mr, X86_INS_ADD: add{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32ri, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32ri8, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD32rm, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32rr, X86_INS_ADD: add{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD32rr_REV, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64i32, X86_INS_ADD: add{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64mi32, X86_INS_ADD: add{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64mi8, X86_INS_ADD: add{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64mr, X86_INS_ADD: add{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64ri32, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64ri8, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD64rm, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64rr, X86_INS_ADD: add{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD64rr_REV, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8i8, X86_INS_ADD: add{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8mi, X86_INS_ADD: add{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8mi8, X86_INS_ADD: add{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8mr, X86_INS_ADD: add{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8ri, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8ri8, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ADD8rm, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8rr, X86_INS_ADD: add{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADD8rr_REV, X86_INS_ADD: add{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX32rm, X86_INS_ADOX: adox{l} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX32rr, X86_INS_ADOX: adox{l} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX64rm, X86_INS_ADOX: adox{q} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ADOX64rr, X86_INS_ADOX: adox{q} $dst, $src */ X86_EFLAGS_MODIFY_OF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16i16, X86_INS_AND: and{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16mi, X86_INS_AND: and{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16mi8, X86_INS_AND: and{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16mr, X86_INS_AND: and{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16ri, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16ri8, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND16rm, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16rr, X86_INS_AND: and{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND16rr_REV, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32i32, X86_INS_AND: and{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32mi, X86_INS_AND: and{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32mi8, X86_INS_AND: and{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32mr, X86_INS_AND: and{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32ri, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32ri8, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND32rm, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32rr, X86_INS_AND: and{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND32rr_REV, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64i32, X86_INS_AND: and{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64mi32, X86_INS_AND: and{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64mi8, X86_INS_AND: and{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64mr, X86_INS_AND: and{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64ri32, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64ri8, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND64rm, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64rr, X86_INS_AND: and{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND64rr_REV, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8i8, X86_INS_AND: and{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8mi, X86_INS_AND: and{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8mi8, X86_INS_AND: and{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8mr, X86_INS_AND: and{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8ri, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8ri8, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_AND8rm, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8rr, X86_INS_AND: and{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_AND8rr_REV, X86_INS_AND: and{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ANDN32rm, X86_INS_ANDN: andn{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDN32rr, X86_INS_ANDN: andn{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDN64rm, X86_INS_ANDN: andn{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ANDN64rr, X86_INS_ANDN: andn{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_CF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ARPL16mr, X86_INS_ARPL: arpl $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ARPL16rr, X86_INS_ARPL: arpl $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BEXTR32rm, X86_INS_BEXTR: bextr{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTR32rr, X86_INS_BEXTR: bextr{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTR64rm, X86_INS_BEXTR: bextr{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTR64rr, X86_INS_BEXTR: bextr{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BEXTRI32mi, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BEXTRI32ri, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BEXTRI64mi, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BEXTRI64ri, X86_INS_BEXTR: bextr $dst, $src1, $cntl */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_RESET_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_IF | X86_EFLAGS_RESET_DF | X86_EFLAGS_RESET_NT | X86_EFLAGS_RESET_RF, { 0 }, }, { /* X86_BLCFILL32rm, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCFILL32rr, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCFILL64rm, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCFILL64rr, X86_INS_BLCFILL: blcfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI32rm, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI32rr, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI64rm, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCI64rr, X86_INS_BLCI: blci $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC32rm, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC32rr, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC64rm, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCIC64rr, X86_INS_BLCIC: blcic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK32rm, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK32rr, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK64rm, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCMSK64rr, X86_INS_BLCMSK: blcmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS32rm, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS32rr, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS64rm, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLCS64rr, X86_INS_BLCS: blcs $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL32rm, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL32rr, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL64rm, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSFILL64rr, X86_INS_BLSFILL: blsfill $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI32rm, X86_INS_BLSI: blsi{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI32rr, X86_INS_BLSI: blsi{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI64rm, X86_INS_BLSI: blsi{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSI64rr, X86_INS_BLSI: blsi{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC32rm, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC32rr, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC64rm, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSIC64rr, X86_INS_BLSIC: blsic $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK32rm, X86_INS_BLSMSK: blsmsk{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK32rr, X86_INS_BLSMSK: blsmsk{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK64rm, X86_INS_BLSMSK: blsmsk{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSMSK64rr, X86_INS_BLSMSK: blsmsk{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR32rm, X86_INS_BLSR: blsr{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR32rr, X86_INS_BLSR: blsr{l} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR64rm, X86_INS_BLSR: blsr{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BLSR64rr, X86_INS_BLSR: blsr{q} $dst, $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BOUNDS16rm, X86_INS_BOUND: bound $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BOUNDS32rm, X86_INS_BOUND: bound $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF16rm, X86_INS_BSF: bsf{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF16rr, X86_INS_BSF: bsf{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF32rm, X86_INS_BSF: bsf{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF32rr, X86_INS_BSF: bsf{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF64rm, X86_INS_BSF: bsf{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSF64rr, X86_INS_BSF: bsf{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR16rm, X86_INS_BSR: bsr{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR16rr, X86_INS_BSR: bsr{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR32rm, X86_INS_BSR: bsr{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR32rr, X86_INS_BSR: bsr{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR64rm, X86_INS_BSR: bsr{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSR64rr, X86_INS_BSR: bsr{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BSWAP32r, X86_INS_BSWAP: bswap{l} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_BSWAP64r, X86_INS_BSWAP: bswap{q} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_BT16mi8, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT16mr, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT16ri8, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT16rr, X86_INS_BT: bt{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT32mi8, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT32mr, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT32ri8, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT32rr, X86_INS_BT: bt{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT64mi8, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT64mr, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BT64ri8, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_BT64rr, X86_INS_BT: bt{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BTC16mi8, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC16mr, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC16ri8, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC16rr, X86_INS_BTC: btc{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC32mi8, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC32mr, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC32ri8, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC32rr, X86_INS_BTC: btc{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC64mi8, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC64mr, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTC64ri8, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTC64rr, X86_INS_BTC: btc{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR16mi8, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR16mr, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR16ri8, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR16rr, X86_INS_BTR: btr{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR32mi8, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR32mr, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR32ri8, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR32rr, X86_INS_BTR: btr{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR64mi8, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR64mr, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTR64ri8, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTR64rr, X86_INS_BTR: btr{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS16mi8, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS16mr, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS16ri8, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS16rr, X86_INS_BTS: bts{w} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS32mi8, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS32mr, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS32ri8, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS32rr, X86_INS_BTS: bts{l} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS64mi8, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS64mr, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BTS64ri8, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_BTS64rr, X86_INS_BTS: bts{q} $src1, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_BZHI32rm, X86_INS_BZHI: bzhi{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BZHI32rr, X86_INS_BZHI: bzhi{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BZHI64rm, X86_INS_BZHI: bzhi{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_BZHI64rr, X86_INS_BZHI: bzhi{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_RESET_OF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CALL16m, X86_INS_CALL: call{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL16r, X86_INS_CALL: call{w} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALL32m, X86_INS_CALL: call{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL32r, X86_INS_CALL: call{l} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALL64m, X86_INS_CALL: call{q} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_CALL64pcrel32, X86_INS_CALL: call{q} $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALL64r, X86_INS_CALL: call{q} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALLpcrel16, X86_INS_CALL: call{w} $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CALLpcrel32, X86_INS_CALL: call{l} $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_CBW, X86_INS_CBW: cbw */ 0, { 0 } }, { /* X86_CDQ, X86_INS_CDQ: cdq */ 0, { 0 } }, { /* X86_CDQE, X86_INS_CDQE: cdqe */ 0, { 0 } }, { /* X86_CLAC, X86_INS_CLAC: clac */ X86_EFLAGS_RESET_AC, { 0 } }, { /* X86_CLC, X86_INS_CLC: clc */ X86_EFLAGS_RESET_CF, { 0 } }, { /* X86_CLD, X86_INS_CLD: cld */ X86_EFLAGS_RESET_DF, { 0 } }, { /* X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT: clflushopt $src */ 0, { CS_AC_READ, 0 } }, { /* X86_CLGI, X86_INS_CLGI: clgi */ 0, { 0 } }, { /* X86_CLI, X86_INS_CLI: cli */ X86_EFLAGS_RESET_IF, { 0 } }, { /* X86_CLTS, X86_INS_CLTS: clts */ 0, { 0 } }, { /* X86_CLWB, X86_INS_CLWB: clwb $src */ 0, { CS_AC_READ, 0 } }, { /* X86_CMC, X86_INS_CMC: cmc */ X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_CMOVA16rm, X86_INS_CMOVA: cmova{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA16rr, X86_INS_CMOVA: cmova{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA32rm, X86_INS_CMOVA: cmova{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA32rr, X86_INS_CMOVA: cmova{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA64rm, X86_INS_CMOVA: cmova{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVA64rr, X86_INS_CMOVA: cmova{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE16rm, X86_INS_CMOVAE: cmovae{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE16rr, X86_INS_CMOVAE: cmovae{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE32rm, X86_INS_CMOVAE: cmovae{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE32rr, X86_INS_CMOVAE: cmovae{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE64rm, X86_INS_CMOVAE: cmovae{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVAE64rr, X86_INS_CMOVAE: cmovae{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB16rm, X86_INS_CMOVB: cmovb{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB16rr, X86_INS_CMOVB: cmovb{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB32rm, X86_INS_CMOVB: cmovb{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB32rr, X86_INS_CMOVB: cmovb{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB64rm, X86_INS_CMOVB: cmovb{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVB64rr, X86_INS_CMOVB: cmovb{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE16rm, X86_INS_CMOVBE: cmovbe{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE16rr, X86_INS_CMOVBE: cmovbe{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE32rm, X86_INS_CMOVBE: cmovbe{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE32rr, X86_INS_CMOVBE: cmovbe{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE64rm, X86_INS_CMOVBE: cmovbe{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVBE64rr, X86_INS_CMOVBE: cmovbe{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE16rm, X86_INS_CMOVE: cmove{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE16rr, X86_INS_CMOVE: cmove{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE32rm, X86_INS_CMOVE: cmove{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE32rr, X86_INS_CMOVE: cmove{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE64rm, X86_INS_CMOVE: cmove{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVE64rr, X86_INS_CMOVE: cmove{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG16rm, X86_INS_CMOVG: cmovg{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG16rr, X86_INS_CMOVG: cmovg{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG32rm, X86_INS_CMOVG: cmovg{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG32rr, X86_INS_CMOVG: cmovg{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG64rm, X86_INS_CMOVG: cmovg{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVG64rr, X86_INS_CMOVG: cmovg{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE16rm, X86_INS_CMOVGE: cmovge{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE16rr, X86_INS_CMOVGE: cmovge{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE32rm, X86_INS_CMOVGE: cmovge{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE32rr, X86_INS_CMOVGE: cmovge{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE64rm, X86_INS_CMOVGE: cmovge{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVGE64rr, X86_INS_CMOVGE: cmovge{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL16rm, X86_INS_CMOVL: cmovl{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL16rr, X86_INS_CMOVL: cmovl{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL32rm, X86_INS_CMOVL: cmovl{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL32rr, X86_INS_CMOVL: cmovl{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL64rm, X86_INS_CMOVL: cmovl{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVL64rr, X86_INS_CMOVL: cmovl{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE16rm, X86_INS_CMOVLE: cmovle{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE16rr, X86_INS_CMOVLE: cmovle{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE32rm, X86_INS_CMOVLE: cmovle{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE32rr, X86_INS_CMOVLE: cmovle{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE64rm, X86_INS_CMOVLE: cmovle{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVLE64rr, X86_INS_CMOVLE: cmovle{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE16rm, X86_INS_CMOVNE: cmovne{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE16rr, X86_INS_CMOVNE: cmovne{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE32rm, X86_INS_CMOVNE: cmovne{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE32rr, X86_INS_CMOVNE: cmovne{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE64rm, X86_INS_CMOVNE: cmovne{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNE64rr, X86_INS_CMOVNE: cmovne{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO16rm, X86_INS_CMOVNO: cmovno{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO16rr, X86_INS_CMOVNO: cmovno{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO32rm, X86_INS_CMOVNO: cmovno{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO32rr, X86_INS_CMOVNO: cmovno{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO64rm, X86_INS_CMOVNO: cmovno{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNO64rr, X86_INS_CMOVNO: cmovno{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP16rm, X86_INS_CMOVNP: cmovnp{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP16rr, X86_INS_CMOVNP: cmovnp{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP32rm, X86_INS_CMOVNP: cmovnp{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP32rr, X86_INS_CMOVNP: cmovnp{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP64rm, X86_INS_CMOVNP: cmovnp{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNP64rr, X86_INS_CMOVNP: cmovnp{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS16rm, X86_INS_CMOVNS: cmovns{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS16rr, X86_INS_CMOVNS: cmovns{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS32rm, X86_INS_CMOVNS: cmovns{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS32rr, X86_INS_CMOVNS: cmovns{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS64rm, X86_INS_CMOVNS: cmovns{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVNS64rr, X86_INS_CMOVNS: cmovns{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO16rm, X86_INS_CMOVO: cmovo{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO16rr, X86_INS_CMOVO: cmovo{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO32rm, X86_INS_CMOVO: cmovo{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO32rr, X86_INS_CMOVO: cmovo{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO64rm, X86_INS_CMOVO: cmovo{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVO64rr, X86_INS_CMOVO: cmovo{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP16rm, X86_INS_CMOVP: cmovp{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP16rr, X86_INS_CMOVP: cmovp{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP32rm, X86_INS_CMOVP: cmovp{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP32rr, X86_INS_CMOVP: cmovp{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP64rm, X86_INS_CMOVP: cmovp{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVP64rr, X86_INS_CMOVP: cmovp{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS16rm, X86_INS_CMOVS: cmovs{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS16rr, X86_INS_CMOVS: cmovs{w} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS32rm, X86_INS_CMOVS: cmovs{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS32rr, X86_INS_CMOVS: cmovs{l} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS64rm, X86_INS_CMOVS: cmovs{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMOVS64rr, X86_INS_CMOVS: cmovs{q} $dst, $src2 */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMP16i16, X86_INS_CMP: cmp{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16mi, X86_INS_CMP: cmp{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16mi8, X86_INS_CMP: cmp{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16mr, X86_INS_CMP: cmp{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP16ri, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16ri8, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP16rm, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP16rr, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP16rr_REV, X86_INS_CMP: cmp{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32i32, X86_INS_CMP: cmp{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32mi, X86_INS_CMP: cmp{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32mi8, X86_INS_CMP: cmp{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32mr, X86_INS_CMP: cmp{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32ri, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32ri8, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP32rm, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32rr, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP32rr_REV, X86_INS_CMP: cmp{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64i32, X86_INS_CMP: cmp{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64mi32, X86_INS_CMP: cmp{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64mi8, X86_INS_CMP: cmp{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64mr, X86_INS_CMP: cmp{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64ri32, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64ri8, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP64rm, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64rr, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP64rr_REV, X86_INS_CMP: cmp{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8i8, X86_INS_CMP: cmp{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8mi, X86_INS_CMP: cmp{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8mi8, X86_INS_CMP: cmp{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8mr, X86_INS_CMP: cmp{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8ri, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8ri8, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_CMP8rm, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8rr, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMP8rr_REV, X86_INS_CMP: cmp{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPSB, X86_INS_CMPSB: cmpsb $src, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPSL, X86_INS_CMPSD: cmps{l|d} {$dst, $src|$src, $dst} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_CMPSQ, X86_INS_CMPSQ: cmpsq $src, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPSW, X86_INS_CMPSW: cmpsw $src, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b $dst */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_CMPXCHG16rm, X86_INS_CMPXCHG: cmpxchg{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG16rr, X86_INS_CMPXCHG: cmpxchg{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPXCHG32rm, X86_INS_CMPXCHG: cmpxchg{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG32rr, X86_INS_CMPXCHG: cmpxchg{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPXCHG64rm, X86_INS_CMPXCHG: cmpxchg{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG64rr, X86_INS_CMPXCHG: cmpxchg{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b $dst */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_CMPXCHG8rm, X86_INS_CMPXCHG: cmpxchg{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_CMPXCHG8rr, X86_INS_CMPXCHG: cmpxchg{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_CPUID, X86_INS_CPUID: cpuid */ 0, { 0 } }, { /* X86_CQO, X86_INS_CQO: cqo */ 0, { 0 } }, { /* X86_CWD, X86_INS_CWD: cwd */ 0, { 0 } }, { /* X86_CWDE, X86_INS_CWDE: cwde */ 0, { 0 } }, { /* X86_DAA, X86_INS_DAA: daa */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_DAS, X86_INS_DAS: das */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_DATA16_PREFIX, X86_INS_DATA16: data16 */ 0, { 0 } }, { /* X86_DEC16m, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC16r, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC16r_alt, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC32m, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC32r, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC32r_alt, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC64m, X86_INS_DEC: dec{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC64r, X86_INS_DEC: dec{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC8m, X86_INS_DEC: dec{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DEC8r, X86_INS_DEC: dec{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_DIV16m, X86_INS_DIV: div{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV16r, X86_INS_DIV: div{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV32m, X86_INS_DIV: div{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV32r, X86_INS_DIV: div{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV64m, X86_INS_DIV: div{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV64r, X86_INS_DIV: div{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV8m, X86_INS_DIV: div{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_DIV8r, X86_INS_DIV: div{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_ENTER, X86_INS_ENTER: enter $len, $lvl */ 0, { CS_AC_IGNORE, CS_AC_IGNORE, 0 } }, { /* X86_FARCALL16i, X86_INS_LCALL: lcall{w} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARCALL16m, X86_INS_LCALL: lcall{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARCALL32i, X86_INS_LCALL: lcall{l} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARCALL32m, X86_INS_LCALL: lcall{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARCALL64, X86_INS_LCALL: lcall{q} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARJMP16i, X86_INS_LJMP: ljmp{w} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARJMP16m, X86_INS_LJMP: ljmp{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARJMP32i, X86_INS_LJMP: ljmp{l} $seg : $off */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FARJMP32m, X86_INS_LJMP: ljmp{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_FARJMP64, X86_INS_LJMP: ljmp{q} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_FSETPM, X86_INS_FSETPM: fsetpm */ 0, { 0 } }, { /* X86_GETSEC, X86_INS_GETSEC: getsec */ 0, { 0 } }, { /* X86_HLT, X86_INS_HLT: hlt */ 0, { 0 } }, { /* X86_IDIV16m, X86_INS_IDIV: idiv{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV16r, X86_INS_IDIV: idiv{w} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV32m, X86_INS_IDIV: idiv{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV32r, X86_INS_IDIV: idiv{l} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV64m, X86_INS_IDIV: idiv{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV64r, X86_INS_IDIV: idiv{q} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV8m, X86_INS_IDIV: idiv{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IDIV8r, X86_INS_IDIV: idiv{b} $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF, { CS_AC_READ, 0 } }, { /* X86_IMUL16m, X86_INS_IMUL: imul{w} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL16r, X86_INS_IMUL: imul{w} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL16rm, X86_INS_IMUL: imul{w} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL16rmi, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL16rmi8, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL16rr, X86_INS_IMUL: imul{w} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL16rri, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL16rri8, X86_INS_IMUL: imul{w} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32m, X86_INS_IMUL: imul{l} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL32r, X86_INS_IMUL: imul{l} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL32rm, X86_INS_IMUL: imul{l} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL32rmi, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32rmi8, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32rr, X86_INS_IMUL: imul{l} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL32rri, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL32rri8, X86_INS_IMUL: imul{l} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64m, X86_INS_IMUL: imul{q} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL64r, X86_INS_IMUL: imul{q} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL64rm, X86_INS_IMUL: imul{q} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL64rmi32, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64rmi8, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64rr, X86_INS_IMUL: imul{q} $dst, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IMUL64rri32, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL64rri8, X86_INS_IMUL: imul{q} $dst, $src1, $src2 */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_IMUL8m, X86_INS_IMUL: imul{b} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IMUL8r, X86_INS_IMUL: imul{b} $src */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF, { CS_AC_READ, 0 } }, { /* X86_IN16ri, X86_INS_IN: in{w} ax, $port */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_IN16rr, X86_INS_IN: in{w} ax, dx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IN32ri, X86_INS_IN: in{l} eax, $port */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_IN32rr, X86_INS_IN: in{l} eax, dx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_IN8ri, X86_INS_IN: in{b} al, $port */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_IN8rr, X86_INS_IN: in{b} al, dx */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_INC16m, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC16r, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC16r_alt, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC32m, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC32r, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC32r_alt, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC64m, X86_INS_INC: inc{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC64r, X86_INS_INC: inc{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC8m, X86_INS_INC: inc{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INC8r, X86_INS_INC: inc{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_INSB, X86_INS_INSB: insb $dst, dx */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_INSL, X86_INS_INSD: ins{l|d} {%dx, $dst|$dst, dx} */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_INSW, X86_INS_INSW: insw $dst, dx */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_INT, X86_INS_INT: int $trap */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { CS_AC_IGNORE, 0 } }, { /* X86_INT1, X86_INS_INT1: int1 */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_INT3, X86_INS_INT3: int3 */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_INTO, X86_INS_INTO: into */ X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_INVD, X86_INS_INVD: invd */ 0, { 0 } }, { /* X86_INVEPT32, X86_INS_INVEPT: invept $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVEPT64, X86_INS_INVEPT: invept $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVLPG, X86_INS_INVLPG: invlpg $addr */ 0, { CS_AC_READ, 0 } }, { /* X86_INVLPGA32, X86_INS_INVLPGA: invlpga eax, ecx */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVLPGA64, X86_INS_INVLPGA: invlpga rax, ecx */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVPCID32, X86_INS_INVPCID: invpcid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVPCID64, X86_INS_INVPCID: invpcid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVVPID32, X86_INS_INVVPID: invvpid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_INVVPID64, X86_INS_INVVPID: invvpid $src1, $src2 */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_IRET16, X86_INS_IRET: iret{w} */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_IRET32, X86_INS_IRETD: iretd */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_IRET64, X86_INS_IRETQ: iretq */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_JAE_1, X86_INS_JAE: jae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JAE_2, X86_INS_JAE: jae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JAE_4, X86_INS_JAE: jae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JA_1, X86_INS_JA: ja $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JA_2, X86_INS_JA: ja $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JA_4, X86_INS_JA: ja $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JBE_1, X86_INS_JBE: jbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JBE_2, X86_INS_JBE: jbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JBE_4, X86_INS_JBE: jbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JB_1, X86_INS_JB: jb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JB_2, X86_INS_JB: jb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JB_4, X86_INS_JB: jb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_IGNORE, 0 } }, { /* X86_JCXZ, X86_INS_JCXZ: jcxz $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JECXZ, X86_INS_JECXZ: jecxz $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JE_1, X86_INS_JE: je $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JE_2, X86_INS_JE: je $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JE_4, X86_INS_JE: je $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JGE_1, X86_INS_JGE: jge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JGE_2, X86_INS_JGE: jge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JGE_4, X86_INS_JGE: jge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JG_1, X86_INS_JG: jg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JG_2, X86_INS_JG: jg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JG_4, X86_INS_JG: jg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JLE_1, X86_INS_JLE: jle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JLE_2, X86_INS_JLE: jle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JLE_4, X86_INS_JLE: jle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JL_1, X86_INS_JL: jl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JL_2, X86_INS_JL: jl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JL_4, X86_INS_JL: jl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JMP16m, X86_INS_JMP: jmp{w} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP16r, X86_INS_JMP: jmp{w} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP32m, X86_INS_JMP: jmp{l} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP32r, X86_INS_JMP: jmp{l} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP64m, X86_INS_JMP: jmp{q} {*}$dst */ 0, { CS_AC_READ, 0 } }, { /* X86_JMP64r, X86_INS_JMP: jmp{q} {*}$dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP_1, X86_INS_JMP: jmp $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP_2, X86_INS_JMP: jmp $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JMP_4, X86_INS_JMP: jmp $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JNE_1, X86_INS_JNE: jne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JNE_2, X86_INS_JNE: jne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JNE_4, X86_INS_JNE: jne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_JNO_1, X86_INS_JNO: jno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JNO_2, X86_INS_JNO: jno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JNO_4, X86_INS_JNO: jno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JNP_1, X86_INS_JNP: jnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JNP_2, X86_INS_JNP: jnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JNP_4, X86_INS_JNP: jnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JNS_1, X86_INS_JNS: jns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JNS_2, X86_INS_JNS: jns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JNS_4, X86_INS_JNS: jns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JO_1, X86_INS_JO: jo $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JO_2, X86_INS_JO: jo $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JO_4, X86_INS_JO: jo $dst */ X86_EFLAGS_TEST_OF, { CS_AC_IGNORE, 0 } }, { /* X86_JP_1, X86_INS_JP: jp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JP_2, X86_INS_JP: jp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JP_4, X86_INS_JP: jp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_IGNORE, 0 } }, { /* X86_JRCXZ, X86_INS_JRCXZ: jrcxz $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_JS_1, X86_INS_JS: js $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JS_2, X86_INS_JS: js $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_JS_4, X86_INS_JS: js $dst */ X86_EFLAGS_TEST_SF, { CS_AC_IGNORE, 0 } }, { /* X86_LAHF, X86_INS_LAHF: lahf */ 0, { 0 } }, { /* X86_LAR16rm, X86_INS_LAR: lar{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR16rr, X86_INS_LAR: lar{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR32rm, X86_INS_LAR: lar{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR32rr, X86_INS_LAR: lar{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR64rm, X86_INS_LAR: lar{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LAR64rr, X86_INS_LAR: lar{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG16, X86_INS_CMPXCHG: cmpxchg{w} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b $ptr */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_LCMPXCHG32, X86_INS_CMPXCHG: cmpxchg{l} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG64, X86_INS_CMPXCHG: cmpxchg{q} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG8, X86_INS_CMPXCHG: cmpxchg{b} $ptr, $swap */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LCMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b $ptr */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_LDS16rm, X86_INS_LDS: lds{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LDS32rm, X86_INS_LDS: lds{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LEA16r, X86_INS_LEA: lea{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_LEA32r, X86_INS_LEA: lea{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_LEA64_32r, X86_INS_LEA: lea{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_LEA64r, X86_INS_LEA: lea{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_LEAVE, X86_INS_LEAVE: leave */ 0, { 0 } }, { /* X86_LEAVE64, X86_INS_LEAVE: leave */ 0, { 0 } }, { /* X86_LES16rm, X86_INS_LES: les{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LES32rm, X86_INS_LES: les{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LFS16rm, X86_INS_LFS: lfs{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LFS32rm, X86_INS_LFS: lfs{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LFS64rm, X86_INS_LFS: lfs{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LGDT16m, X86_INS_LGDT: lgdt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LGDT32m, X86_INS_LGDT: lgdt{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LGDT64m, X86_INS_LGDT: lgdt{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LGS16rm, X86_INS_LGS: lgs{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LGS32rm, X86_INS_LGS: lgs{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LGS64rm, X86_INS_LGS: lgs{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LIDT16m, X86_INS_LIDT: lidt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LIDT32m, X86_INS_LIDT: lidt{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LIDT64m, X86_INS_LIDT: lidt{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LLDT16m, X86_INS_LLDT: lldt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LLDT16r, X86_INS_LLDT: lldt{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LMSW16m, X86_INS_LMSW: lmsw{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LMSW16r, X86_INS_LMSW: lmsw{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LOCK_ADD16mi, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD16mi8, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD16mr, X86_INS_ADD: add{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_ADD32mi, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD32mi8, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD32mr, X86_INS_ADD: add{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_ADD64mi32, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD64mi8, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD64mr, X86_INS_ADD: add{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_ADD8mi, X86_INS_ADD: add{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_ADD8mr, X86_INS_ADD: add{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND16mi, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND16mi8, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND16mr, X86_INS_AND: and{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND32mi, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND32mi8, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND32mr, X86_INS_AND: and{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND64mi32, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND64mi8, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND64mr, X86_INS_AND: and{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_AND8mi, X86_INS_AND: and{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_AND8mr, X86_INS_AND: and{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_DEC16m, X86_INS_DEC: dec{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_DEC32m, X86_INS_DEC: dec{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_DEC64m, X86_INS_DEC: dec{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_DEC8m, X86_INS_DEC: dec{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC16m, X86_INS_INC: inc{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC32m, X86_INS_INC: inc{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC64m, X86_INS_INC: inc{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_INC8m, X86_INS_INC: inc{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF, { CS_AC_READ, 0 } }, { /* X86_LOCK_OR16mi, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR16mi8, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR16mr, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_OR32mi, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR32mi8, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR32mr, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_OR64mi32, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR64mi8, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR64mr, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_OR8mi, X86_INS_OR: or{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_OR8mr, X86_INS_OR: or{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB16mi, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB16mi8, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB16mr, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB32mi, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB32mi8, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB32mr, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB64mi32, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB64mi8, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB64mr, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_SUB8mi, X86_INS_SUB: sub{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_SUB8mr, X86_INS_SUB: sub{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR16mi, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR16mi8, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR16mr, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR32mi, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR32mi8, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR32mr, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR64mi32, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR64mi8, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR64mr, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LOCK_XOR8mi, X86_INS_XOR: xor{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_LOCK_XOR8mr, X86_INS_XOR: xor{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_LODSB, X86_INS_LODSB: lodsb al, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LODSL, X86_INS_LODSD: lods{l|d} {$src, %eax|eax, $src} */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LODSQ, X86_INS_LODSQ: lodsq rax, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LODSW, X86_INS_LODSW: lodsw ax, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LOOP, X86_INS_LOOP: loop $dst */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LOOPE, X86_INS_LOOPE: loope $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_LOOPNE, X86_INS_LOOPNE: loopne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_IGNORE, 0 } }, { /* X86_LRETIL, X86_INS_RETF: {l}retf $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LRETIQ, X86_INS_RETFQ: {l}retfq $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LRETIW, X86_INS_RETF: {l}retf $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_LRETL, X86_INS_RETF: {l}retf */ 0, { 0 } }, { /* X86_LRETQ, X86_INS_RETFQ: {l}retfq */ 0, { 0 } }, { /* X86_LRETW, X86_INS_RETF: {l}retf */ 0, { 0 } }, { /* X86_LSL16rm, X86_INS_LSL: lsl{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL16rr, X86_INS_LSL: lsl{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL32rm, X86_INS_LSL: lsl{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL32rr, X86_INS_LSL: lsl{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL64rm, X86_INS_LSL: lsl{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSL64rr, X86_INS_LSL: lsl{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSS16rm, X86_INS_LSS: lss{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSS32rm, X86_INS_LSS: lss{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LSS64rm, X86_INS_LSS: lss{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LTRm, X86_INS_LTR: ltr{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LTRr, X86_INS_LTR: ltr{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_LXADD16, X86_INS_XADD: xadd{w} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LXADD32, X86_INS_XADD: xadd{l} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LXADD64, X86_INS_XADD: xadd{q} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LXADD8, X86_INS_XADD: xadd{b} $ptr, $val */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_LZCNT16rm, X86_INS_LZCNT: lzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT16rr, X86_INS_LZCNT: lzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT32rm, X86_INS_LZCNT: lzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT32rr, X86_INS_LZCNT: lzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT64rm, X86_INS_LZCNT: lzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_LZCNT64rr, X86_INS_LZCNT: lzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MONTMUL, X86_INS_MONTMUL: montmul */ 0, { 0 } }, { /* X86_MOV16ao16, X86_INS_MOV: mov{w} ax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ao32, X86_INS_MOV: mov{w} ax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ao64, X86_INS_MOVABS: movabs{w} ax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16mi, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV16mr, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ms, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16o16a, X86_INS_MOV: mov{w} $dst, ax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16o32a, X86_INS_MOV: mov{w} $dst, ax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16o64a, X86_INS_MOVABS: movabs{w} $dst, ax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16ri, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV16ri_alt, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV16rm, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16rr, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16rr_REV, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16rs, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16sm, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV16sr, X86_INS_MOV: mov{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ao16, X86_INS_MOV: mov{l} eax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ao32, X86_INS_MOV: mov{l} eax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ao64, X86_INS_MOVABS: movabs{l} eax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32cr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32dr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32mi, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV32mr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ms, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32o16a, X86_INS_MOV: mov{l} $dst, eax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32o32a, X86_INS_MOV: mov{l} $dst, eax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32o64a, X86_INS_MOVABS: movabs{l} $dst, eax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rc, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rd, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32ri, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV32ri_alt, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV32rm, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rr_REV, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32rs, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32sm, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV32sr, X86_INS_MOV: mov{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ao32, X86_INS_MOV: mov{q} rax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ao64, X86_INS_MOVABS: movabs{q} rax, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64cr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64dr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64mi32, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV64mr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ms, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64o32a, X86_INS_MOV: mov{q} $dst, rax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64o64a, X86_INS_MOVABS: movabs{q} $dst, rax */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rc, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rd, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64ri, X86_INS_MOVABS: movabs{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV64ri32, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV64rm, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rr_REV, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64rs, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64sm, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV64sr, X86_INS_MOV: mov{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ao16, X86_INS_MOV: mov{b} al, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ao32, X86_INS_MOV: mov{b} al, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ao64, X86_INS_MOVABS: movabs{b} al, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8mi, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV8mr, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8mr_NOREX, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8o16a, X86_INS_MOV: mov{b} $dst, al */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8o32a, X86_INS_MOV: mov{b} $dst, al */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8o64a, X86_INS_MOVABS: movabs{b} $dst, al */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8ri, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV8ri_alt, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_MOV8rm, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rm_NOREX, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rr, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rr_NOREX, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOV8rr_REV, X86_INS_MOV: mov{b} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVBE16mr, X86_INS_MOVBE: movbe{w} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVBE16rm, X86_INS_MOVBE: movbe{w} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVBE32mr, X86_INS_MOVBE: movbe{l} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVBE32rm, X86_INS_MOVBE: movbe{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVBE64mr, X86_INS_MOVBE: movbe{q} $dst, $src */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_MOVBE64rm, X86_INS_MOVBE: movbe{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSB, X86_INS_MOVSB: movsb $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSL, X86_INS_MOVSD: movs{l|d} {$src, $dst|$dst, $src} */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSQ, X86_INS_MOVSQ: movsq $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSW, X86_INS_MOVSW: movsw $dst, $src */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX16rm8, X86_INS_MOVSX: movs{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX16rr8, X86_INS_MOVSX: movs{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32_NOREXrm8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32_NOREXrr8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rm16, X86_INS_MOVSX: movs{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rm8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rr16, X86_INS_MOVSX: movs{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX32rr8, X86_INS_MOVSX: movs{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm16, X86_INS_MOVSX: movs{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm32, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm32_alt, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rm8, X86_INS_MOVSX: movs{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rr16, X86_INS_MOVSX: movs{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rr32, X86_INS_MOVSXD: movs{lq|xd} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVSX64rr8, X86_INS_MOVSX: movs{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX16rm8, X86_INS_MOVZX: movz{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX16rr8, X86_INS_MOVZX: movz{bw|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32_NOREXrm8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32_NOREXrr8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rm16, X86_INS_MOVZX: movz{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rm8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rr16, X86_INS_MOVZX: movz{wl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX32rr8, X86_INS_MOVZX: movz{bl|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rm16_Q, X86_INS_MOVZX: movz{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rm8_Q, X86_INS_MOVZX: movz{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rr16_Q, X86_INS_MOVZX: movz{wq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MOVZX64rr8_Q, X86_INS_MOVZX: movz{bq|x} {$src, $dst|$dst, $src} */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MUL16m, X86_INS_MUL: mul{w} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL16r, X86_INS_MUL: mul{w} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL32m, X86_INS_MUL: mul{l} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL32r, X86_INS_MUL: mul{l} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL64m, X86_INS_MUL: mul{q} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL64r, X86_INS_MUL: mul{q} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL8m, X86_INS_MUL: mul{b} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MUL8r, X86_INS_MUL: mul{b} $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, 0 } }, { /* X86_MULX32rm, X86_INS_MULX: mulx{l} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX32rr, X86_INS_MULX: mulx{l} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX64rm, X86_INS_MULX: mulx{q} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_MULX64rr, X86_INS_MULX: mulx{q} $dst1, $dst2, $src */ 0, { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_NEG16m, X86_INS_NEG: neg{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG16r, X86_INS_NEG: neg{w} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG32m, X86_INS_NEG: neg{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG32r, X86_INS_NEG: neg{l} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG64m, X86_INS_NEG: neg{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG64r, X86_INS_NEG: neg{q} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG8m, X86_INS_NEG: neg{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NEG8r, X86_INS_NEG: neg{b} $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOOP, X86_INS_NOP: nop */ 0, { 0 } }, { /* X86_NOOP18_16m4, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16m5, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16m6, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16m7, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r4, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r5, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r6, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_16r7, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m4, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m5, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m6, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_m7, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r4, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r5, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r6, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP18_r7, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOP19rr, X86_INS_NOP: nop $src, $val */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_NOOPL, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_19, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1a, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1b, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1c, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1d, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPL_1e, X86_INS_NOP: nop{l} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_19, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1a, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1b, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1c, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1d, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOOPW_1e, X86_INS_NOP: nop{w} $zero */ 0, { CS_AC_READ, 0 } }, { /* X86_NOT16m, X86_INS_NOT: not{w} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT16r, X86_INS_NOT: not{w} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT32m, X86_INS_NOT: not{l} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT32r, X86_INS_NOT: not{l} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT64m, X86_INS_NOT: not{q} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT64r, X86_INS_NOT: not{q} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT8m, X86_INS_NOT: not{b} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_NOT8r, X86_INS_NOT: not{b} $dst */ 0, { CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_OR16i16, X86_INS_OR: or{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16mi, X86_INS_OR: or{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16mi8, X86_INS_OR: or{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16mr, X86_INS_OR: or{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR16ri, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16ri8, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR16rm, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR16rr, X86_INS_OR: or{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR16rr_REV, X86_INS_OR: or{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32i32, X86_INS_OR: or{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32mi, X86_INS_OR: or{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32mi8, X86_INS_OR: or{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32mr, X86_INS_OR: or{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32mrLocked, X86_INS_OR: or{l} $dst, $zero */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OR32ri, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32ri8, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR32rm, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32rr, X86_INS_OR: or{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR32rr_REV, X86_INS_OR: or{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64i32, X86_INS_OR: or{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64mi32, X86_INS_OR: or{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64mi8, X86_INS_OR: or{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64mr, X86_INS_OR: or{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64ri32, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64ri8, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR64rm, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64rr, X86_INS_OR: or{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR64rr_REV, X86_INS_OR: or{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8i8, X86_INS_OR: or{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8mi, X86_INS_OR: or{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8mi8, X86_INS_OR: or{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8mr, X86_INS_OR: or{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8ri, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8ri8, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_OR8rm, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8rr, X86_INS_OR: or{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OR8rr_REV, X86_INS_OR: or{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_OUT16ir, X86_INS_OUT: out{w} $port, ax */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_OUT16rr, X86_INS_OUT: out{w} dx, ax */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OUT32ir, X86_INS_OUT: out{l} $port, eax */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_OUT32rr, X86_INS_OUT: out{l} dx, eax */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OUT8ir, X86_INS_OUT: out{b} $port, al */ 0, { CS_AC_IGNORE, CS_AC_READ, 0 } }, { /* X86_OUT8rr, X86_INS_OUT: out{b} dx, al */ 0, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_OUTSB, X86_INS_OUTSB: outsb dx, $src */ X86_EFLAGS_TEST_DF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_OUTSL, X86_INS_OUTSD: outs{l|d} {$src, %dx|dx, $src} */ X86_EFLAGS_TEST_DF, { CS_AC_IGNORE, 0 } }, { /* X86_OUTSW, X86_INS_OUTSW: outsw dx, $src */ X86_EFLAGS_TEST_DF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_PCOMMIT, X86_INS_PCOMMIT: pcommit */ 0, { 0 } }, { /* X86_PDEP32rm, X86_INS_PDEP: pdep{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PDEP32rr, X86_INS_PDEP: pdep{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PDEP64rm, X86_INS_PDEP: pdep{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PDEP64rr, X86_INS_PDEP: pdep{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT32rm, X86_INS_PEXT: pext{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT32rr, X86_INS_PEXT: pext{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT64rm, X86_INS_PEXT: pext{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_PEXT64rr, X86_INS_PEXT: pext{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_POP16r, X86_INS_POP: pop{w} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP16rmm, X86_INS_POP: pop{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP16rmr, X86_INS_POP: pop{w} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP32r, X86_INS_POP: pop{l} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP32rmm, X86_INS_POP: pop{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP32rmr, X86_INS_POP: pop{l} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP64r, X86_INS_POP: pop{q} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP64rmm, X86_INS_POP: pop{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POP64rmr, X86_INS_POP: pop{q} $reg */ 0, { CS_AC_WRITE, 0 } }, { /* X86_POPA16, X86_INS_POPAW: popaw */ 0, { 0 } }, { /* X86_POPA32, X86_INS_POPAL: popal */ 0, { 0 } }, { /* X86_POPDS16, X86_INS_POP: pop{w} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPDS32, X86_INS_POP: pop{l} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPES16, X86_INS_POP: pop{w} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPES32, X86_INS_POP: pop{l} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPF16, X86_INS_POPF: popf{w} */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_POPF32, X86_INS_POPFD: popfd */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_POPF64, X86_INS_POPFQ: popfq */ X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_POPFS16, X86_INS_POP: pop{w} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPFS32, X86_INS_POP: pop{l} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPFS64, X86_INS_POP: pop{q} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPGS16, X86_INS_POP: pop{w} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPGS32, X86_INS_POP: pop{l} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPGS64, X86_INS_POP: pop{q} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPSS16, X86_INS_POP: pop{w} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_POPSS32, X86_INS_POP: pop{l} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH16i8, X86_INS_PUSH: push{w} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH16r, X86_INS_PUSH: push{w} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH16rmm, X86_INS_PUSH: push{w} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH16rmr, X86_INS_PUSH: push{w} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH32i8, X86_INS_PUSH: push{l} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH32r, X86_INS_PUSH: push{l} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH32rmm, X86_INS_PUSH: push{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH32rmr, X86_INS_PUSH: push{l} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH64i16, X86_INS_PUSH: push{w} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH64i32, X86_INS_PUSH: push{q} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH64i8, X86_INS_PUSH: push{q} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSH64r, X86_INS_PUSH: push{q} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH64rmm, X86_INS_PUSH: push{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSH64rmr, X86_INS_PUSH: push{q} $reg */ 0, { CS_AC_READ, 0 } }, { /* X86_PUSHA16, X86_INS_PUSHAW: pushaw */ 0, { 0 } }, { /* X86_PUSHA32, X86_INS_PUSHAL: pushal */ 0, { 0 } }, { /* X86_PUSHCS16, X86_INS_PUSH: push{w} cs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHCS32, X86_INS_PUSH: push{l} cs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHDS16, X86_INS_PUSH: push{w} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHDS32, X86_INS_PUSH: push{l} ds */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHES16, X86_INS_PUSH: push{w} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHES32, X86_INS_PUSH: push{l} es */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHF16, X86_INS_PUSHF: pushf{w} */ 0, { 0 } }, { /* X86_PUSHF32, X86_INS_PUSHFD: pushfd */ 0, { 0 } }, { /* X86_PUSHF64, X86_INS_PUSHFQ: pushfq */ 0, { 0 } }, { /* X86_PUSHFS16, X86_INS_PUSH: push{w} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHFS32, X86_INS_PUSH: push{l} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHFS64, X86_INS_PUSH: push{q} fs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHGS16, X86_INS_PUSH: push{w} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHGS32, X86_INS_PUSH: push{l} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHGS64, X86_INS_PUSH: push{q} gs */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHSS16, X86_INS_PUSH: push{w} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHSS32, X86_INS_PUSH: push{l} ss */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHi16, X86_INS_PUSH: push{w} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_PUSHi32, X86_INS_PUSH: push{l} $imm */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RCL16m1, X86_INS_RCL: rcl{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL16mCL, X86_INS_RCL: rcl{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL16mi, X86_INS_RCL: rcl{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL16r1, X86_INS_RCL: rcl{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL16rCL, X86_INS_RCL: rcl{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL16ri, X86_INS_RCL: rcl{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL32m1, X86_INS_RCL: rcl{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL32mCL, X86_INS_RCL: rcl{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL32mi, X86_INS_RCL: rcl{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL32r1, X86_INS_RCL: rcl{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL32rCL, X86_INS_RCL: rcl{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL32ri, X86_INS_RCL: rcl{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL64m1, X86_INS_RCL: rcl{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL64mCL, X86_INS_RCL: rcl{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL64mi, X86_INS_RCL: rcl{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL64r1, X86_INS_RCL: rcl{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL64rCL, X86_INS_RCL: rcl{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL64ri, X86_INS_RCL: rcl{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL8m1, X86_INS_RCL: rcl{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL8mCL, X86_INS_RCL: rcl{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCL8mi, X86_INS_RCL: rcl{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCL8r1, X86_INS_RCL: rcl{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCL8rCL, X86_INS_RCL: rcl{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCL8ri, X86_INS_RCL: rcl{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR16m1, X86_INS_RCR: rcr{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR16mCL, X86_INS_RCR: rcr{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR16mi, X86_INS_RCR: rcr{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR16r1, X86_INS_RCR: rcr{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR16rCL, X86_INS_RCR: rcr{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR16ri, X86_INS_RCR: rcr{w} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR32m1, X86_INS_RCR: rcr{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR32mCL, X86_INS_RCR: rcr{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR32mi, X86_INS_RCR: rcr{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR32r1, X86_INS_RCR: rcr{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR32rCL, X86_INS_RCR: rcr{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR32ri, X86_INS_RCR: rcr{l} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR64m1, X86_INS_RCR: rcr{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR64mCL, X86_INS_RCR: rcr{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR64mi, X86_INS_RCR: rcr{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR64r1, X86_INS_RCR: rcr{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR64rCL, X86_INS_RCR: rcr{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR64ri, X86_INS_RCR: rcr{q} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR8m1, X86_INS_RCR: rcr{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR8mCL, X86_INS_RCR: rcr{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_RCR8mi, X86_INS_RCR: rcr{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RCR8r1, X86_INS_RCR: rcr{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RCR8rCL, X86_INS_RCR: rcr{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_RCR8ri, X86_INS_RCR: rcr{b} $dst, $cnt */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RDFSBASE, X86_INS_RDFSBASE: rdfsbase{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDFSBASE64, X86_INS_RDFSBASE: rdfsbase{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDGSBASE, X86_INS_RDGSBASE: rdgsbase{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDGSBASE64, X86_INS_RDGSBASE: rdgsbase{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_RDMSR, X86_INS_RDMSR: rdmsr */ 0, { 0 } }, { /* X86_RDPMC, X86_INS_RDPMC: rdpmc */ 0, { 0 } }, { /* X86_RDRAND16r, X86_INS_RDRAND: rdrand{w} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDRAND32r, X86_INS_RDRAND: rdrand{l} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDRAND64r, X86_INS_RDRAND: rdrand{q} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDSEED16r, X86_INS_RDSEED: rdseed{w} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDSEED32r, X86_INS_RDSEED: rdseed{l} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDSEED64r, X86_INS_RDSEED: rdseed{q} $dst */ X86_EFLAGS_MODIFY_CF | X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_RESET_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF, { CS_AC_WRITE, 0 } }, { /* X86_RDTSC, X86_INS_RDTSC: rdtsc */ 0, { 0 } }, { /* X86_RDTSCP, X86_INS_RDTSCP: rdtscp */ 0, { 0 } }, { /* X86_RETIL, X86_INS_RET: ret{l} $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RETIQ, X86_INS_RET: ret{q} $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RETIW, X86_INS_RET: ret{w} $amt */ 0, { CS_AC_IGNORE, 0 } }, { /* X86_RETL, X86_INS_RET: ret{l} */ 0, { 0 } }, { /* X86_RETQ, X86_INS_RET: ret{q} */ 0, { 0 } }, { /* X86_RETW, X86_INS_RET: ret{w} */ 0, { 0 } }, { /* X86_ROL16m1, X86_INS_ROL: rol{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL16mCL, X86_INS_ROL: rol{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL16mi, X86_INS_ROL: rol{w} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL16r1, X86_INS_ROL: rol{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL16rCL, X86_INS_ROL: rol{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL16ri, X86_INS_ROL: rol{w} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL32m1, X86_INS_ROL: rol{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL32mCL, X86_INS_ROL: rol{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL32mi, X86_INS_ROL: rol{l} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL32r1, X86_INS_ROL: rol{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL32rCL, X86_INS_ROL: rol{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL32ri, X86_INS_ROL: rol{l} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL64m1, X86_INS_ROL: rol{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL64mCL, X86_INS_ROL: rol{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL64mi, X86_INS_ROL: rol{q} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL64r1, X86_INS_ROL: rol{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL64rCL, X86_INS_ROL: rol{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL64ri, X86_INS_ROL: rol{q} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL8m1, X86_INS_ROL: rol{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL8mCL, X86_INS_ROL: rol{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROL8mi, X86_INS_ROL: rol{b} $dst, $src1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROL8r1, X86_INS_ROL: rol{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROL8rCL, X86_INS_ROL: rol{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROL8ri, X86_INS_ROL: rol{b} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR16m1, X86_INS_ROR: ror{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR16mCL, X86_INS_ROR: ror{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR16mi, X86_INS_ROR: ror{w} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR16r1, X86_INS_ROR: ror{w} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR16rCL, X86_INS_ROR: ror{w} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR16ri, X86_INS_ROR: ror{w} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR32m1, X86_INS_ROR: ror{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR32mCL, X86_INS_ROR: ror{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR32mi, X86_INS_ROR: ror{l} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR32r1, X86_INS_ROR: ror{l} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR32rCL, X86_INS_ROR: ror{l} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR32ri, X86_INS_ROR: ror{l} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR64m1, X86_INS_ROR: ror{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR64mCL, X86_INS_ROR: ror{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR64mi, X86_INS_ROR: ror{q} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR64r1, X86_INS_ROR: ror{q} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR64rCL, X86_INS_ROR: ror{q} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR64ri, X86_INS_ROR: ror{q} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR8m1, X86_INS_ROR: ror{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR8mCL, X86_INS_ROR: ror{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_ROR8mi, X86_INS_ROR: ror{b} $dst, $src */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_ROR8r1, X86_INS_ROR: ror{b} $dst, 1 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_ROR8rCL, X86_INS_ROR: ror{b} $dst, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_ROR8ri, X86_INS_ROR: ror{b} $dst, $src2 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_RORX32mi, X86_INS_RORX: rorx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RORX32ri, X86_INS_RORX: rorx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RORX64mi, X86_INS_RORX: rorx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RORX64ri, X86_INS_RORX: rorx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_RSM, X86_INS_RSM: rsm */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SAHF, X86_INS_SAHF: sahf */ X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { 0 } }, { /* X86_SAL16m1, X86_INS_SAL: sal{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL16mCL, X86_INS_SAL: sal{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL16mi, X86_INS_SAL: sal{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL16r1, X86_INS_SAL: sal{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL16rCL, X86_INS_SAL: sal{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL16ri, X86_INS_SAL: sal{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32m1, X86_INS_SAL: sal{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32mCL, X86_INS_SAL: sal{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL32mi, X86_INS_SAL: sal{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32r1, X86_INS_SAL: sal{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL32rCL, X86_INS_SAL: sal{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL32ri, X86_INS_SAL: sal{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64m1, X86_INS_SAL: sal{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64mCL, X86_INS_SAL: sal{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL64mi, X86_INS_SAL: sal{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64r1, X86_INS_SAL: sal{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL64rCL, X86_INS_SAL: sal{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL64ri, X86_INS_SAL: sal{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8m1, X86_INS_SAL: sal{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8mCL, X86_INS_SAL: sal{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL8mi, X86_INS_SAL: sal{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8r1, X86_INS_SAL: sal{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAL8rCL, X86_INS_SAL: sal{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAL8ri, X86_INS_SAL: sal{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SALC, X86_INS_SALC: salc */ 0, { 0 } }, { /* X86_SAR16m1, X86_INS_SAR: sar{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR16mCL, X86_INS_SAR: sar{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR16mi, X86_INS_SAR: sar{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR16r1, X86_INS_SAR: sar{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR16rCL, X86_INS_SAR: sar{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR16ri, X86_INS_SAR: sar{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32m1, X86_INS_SAR: sar{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32mCL, X86_INS_SAR: sar{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR32mi, X86_INS_SAR: sar{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32r1, X86_INS_SAR: sar{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR32rCL, X86_INS_SAR: sar{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR32ri, X86_INS_SAR: sar{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64m1, X86_INS_SAR: sar{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64mCL, X86_INS_SAR: sar{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR64mi, X86_INS_SAR: sar{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64r1, X86_INS_SAR: sar{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR64rCL, X86_INS_SAR: sar{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR64ri, X86_INS_SAR: sar{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8m1, X86_INS_SAR: sar{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8mCL, X86_INS_SAR: sar{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR8mi, X86_INS_SAR: sar{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8r1, X86_INS_SAR: sar{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SAR8rCL, X86_INS_SAR: sar{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SAR8ri, X86_INS_SAR: sar{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SARX32rm, X86_INS_SARX: sarx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SARX32rr, X86_INS_SARX: sarx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SARX64rm, X86_INS_SARX: sarx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SARX64rr, X86_INS_SARX: sarx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SBB16i16, X86_INS_SBB: sbb{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16mi, X86_INS_SBB: sbb{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16mi8, X86_INS_SBB: sbb{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16mr, X86_INS_SBB: sbb{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB16ri, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16ri8, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB16rm, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB16rr, X86_INS_SBB: sbb{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB16rr_REV, X86_INS_SBB: sbb{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32i32, X86_INS_SBB: sbb{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32mi, X86_INS_SBB: sbb{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32mi8, X86_INS_SBB: sbb{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32mr, X86_INS_SBB: sbb{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32ri, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32ri8, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB32rm, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32rr, X86_INS_SBB: sbb{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB32rr_REV, X86_INS_SBB: sbb{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64i32, X86_INS_SBB: sbb{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64mi32, X86_INS_SBB: sbb{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64mi8, X86_INS_SBB: sbb{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64mr, X86_INS_SBB: sbb{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64ri32, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64ri8, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB64rm, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64rr, X86_INS_SBB: sbb{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB64rr_REV, X86_INS_SBB: sbb{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8i8, X86_INS_SBB: sbb{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8mi, X86_INS_SBB: sbb{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8mi8, X86_INS_SBB: sbb{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8mr, X86_INS_SBB: sbb{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8ri, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8ri8, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SBB8rm, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8rr, X86_INS_SBB: sbb{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SBB8rr_REV, X86_INS_SBB: sbb{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SCASB, X86_INS_SCASB: scasb al, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SCASL, X86_INS_SCASD: scas{l|d} {$dst, %eax|eax, $dst} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SCASQ, X86_INS_SCASQ: scasq rax, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SCASW, X86_INS_SCASW: scasw ax, $dst */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SETAEm, X86_INS_SETAE: setae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETAEr, X86_INS_SETAE: setae $dst */ X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETAm, X86_INS_SETA: seta $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETAr, X86_INS_SETA: seta $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETBEm, X86_INS_SETBE: setbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETBEr, X86_INS_SETBE: setbe $dst */ X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETBm, X86_INS_SETB: setb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_READ, 0 } }, { /* X86_SETBr, X86_INS_SETB: setb $dst */ X86_EFLAGS_TEST_CF, { CS_AC_WRITE, 0 } }, { /* X86_SETEm, X86_INS_SETE: sete $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_READ, 0 } }, { /* X86_SETEr, X86_INS_SETE: sete $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETGEm, X86_INS_SETGE: setge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETGEr, X86_INS_SETGE: setge $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SETGm, X86_INS_SETG: setg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ, 0 } }, { /* X86_SETGr, X86_INS_SETG: setg $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETLEm, X86_INS_SETLE: setle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_READ, 0 } }, { /* X86_SETLEr, X86_INS_SETLE: setle $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETLm, X86_INS_SETL: setl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETLr, X86_INS_SETL: setl $dst */ X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SETNEm, X86_INS_SETNE: setne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_READ, 0 } }, { /* X86_SETNEr, X86_INS_SETNE: setne $dst */ X86_EFLAGS_TEST_ZF, { CS_AC_WRITE, 0 } }, { /* X86_SETNOm, X86_INS_SETNO: setno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_READ, 0 } }, { /* X86_SETNOr, X86_INS_SETNO: setno $dst */ X86_EFLAGS_TEST_OF, { CS_AC_WRITE, 0 } }, { /* X86_SETNPm, X86_INS_SETNP: setnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_READ, 0 } }, { /* X86_SETNPr, X86_INS_SETNP: setnp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_WRITE, 0 } }, { /* X86_SETNSm, X86_INS_SETNS: setns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETNSr, X86_INS_SETNS: setns $dst */ X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SETOm, X86_INS_SETO: seto $dst */ X86_EFLAGS_TEST_OF, { CS_AC_READ, 0 } }, { /* X86_SETOr, X86_INS_SETO: seto $dst */ X86_EFLAGS_TEST_OF, { CS_AC_WRITE, 0 } }, { /* X86_SETPm, X86_INS_SETP: setp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_READ, 0 } }, { /* X86_SETPr, X86_INS_SETP: setp $dst */ X86_EFLAGS_TEST_PF, { CS_AC_WRITE, 0 } }, { /* X86_SETSm, X86_INS_SETS: sets $dst */ X86_EFLAGS_TEST_SF, { CS_AC_READ, 0 } }, { /* X86_SETSr, X86_INS_SETS: sets $dst */ X86_EFLAGS_TEST_SF, { CS_AC_WRITE, 0 } }, { /* X86_SGDT16m, X86_INS_SGDT: sgdt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SGDT32m, X86_INS_SGDT: sgdt{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SGDT64m, X86_INS_SGDT: sgdt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SHL16m1, X86_INS_SHL: shl{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL16mCL, X86_INS_SHL: shl{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL16mi, X86_INS_SHL: shl{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL16r1, X86_INS_SHL: shl{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL16rCL, X86_INS_SHL: shl{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL16ri, X86_INS_SHL: shl{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32m1, X86_INS_SHL: shl{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32mCL, X86_INS_SHL: shl{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL32mi, X86_INS_SHL: shl{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32r1, X86_INS_SHL: shl{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL32rCL, X86_INS_SHL: shl{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL32ri, X86_INS_SHL: shl{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64m1, X86_INS_SHL: shl{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64mCL, X86_INS_SHL: shl{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL64mi, X86_INS_SHL: shl{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64r1, X86_INS_SHL: shl{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL64rCL, X86_INS_SHL: shl{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL64ri, X86_INS_SHL: shl{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8m1, X86_INS_SHL: shl{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8mCL, X86_INS_SHL: shl{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL8mi, X86_INS_SHL: shl{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8r1, X86_INS_SHL: shl{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHL8rCL, X86_INS_SHL: shl{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHL8ri, X86_INS_SHL: shl{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHLD16mrCL, X86_INS_SHLD: shld{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD16mri8, X86_INS_SHLD: shld{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD16rrCL, X86_INS_SHLD: shld{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD16rri8, X86_INS_SHLD: shld{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD32mrCL, X86_INS_SHLD: shld{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD32mri8, X86_INS_SHLD: shld{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD32rrCL, X86_INS_SHLD: shld{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD32rri8, X86_INS_SHLD: shld{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD64mrCL, X86_INS_SHLD: shld{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD64mri8, X86_INS_SHLD: shld{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLD64rrCL, X86_INS_SHLD: shld{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLD64rri8, X86_INS_SHLD: shld{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHLX32rm, X86_INS_SHLX: shlx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLX32rr, X86_INS_SHLX: shlx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLX64rm, X86_INS_SHLX: shlx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHLX64rr, X86_INS_SHLX: shlx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHR16m1, X86_INS_SHR: shr{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR16mCL, X86_INS_SHR: shr{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR16mi, X86_INS_SHR: shr{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR16r1, X86_INS_SHR: shr{w} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR16rCL, X86_INS_SHR: shr{w} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR16ri, X86_INS_SHR: shr{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32m1, X86_INS_SHR: shr{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32mCL, X86_INS_SHR: shr{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR32mi, X86_INS_SHR: shr{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32r1, X86_INS_SHR: shr{l} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR32rCL, X86_INS_SHR: shr{l} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR32ri, X86_INS_SHR: shr{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64m1, X86_INS_SHR: shr{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64mCL, X86_INS_SHR: shr{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR64mi, X86_INS_SHR: shr{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64r1, X86_INS_SHR: shr{q} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR64rCL, X86_INS_SHR: shr{q} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR64ri, X86_INS_SHR: shr{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8m1, X86_INS_SHR: shr{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8mCL, X86_INS_SHR: shr{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR8mi, X86_INS_SHR: shr{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8r1, X86_INS_SHR: shr{b} $dst, 1 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHR8rCL, X86_INS_SHR: shr{b} $dst, cl */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SHR8ri, X86_INS_SHR: shr{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SHRD16mrCL, X86_INS_SHRD: shrd{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD16mri8, X86_INS_SHRD: shrd{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD16rrCL, X86_INS_SHRD: shrd{w} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD16rri8, X86_INS_SHRD: shrd{w} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD32mrCL, X86_INS_SHRD: shrd{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD32mri8, X86_INS_SHRD: shrd{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD32rrCL, X86_INS_SHRD: shrd{l} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD32rri8, X86_INS_SHRD: shrd{l} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD64mrCL, X86_INS_SHRD: shrd{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD64mri8, X86_INS_SHRD: shrd{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRD64rrCL, X86_INS_SHRD: shrd{q} $dst, $src2, cl */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRD64rri8, X86_INS_SHRD: shrd{q} $dst, $src2, $src3 */ X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_SHRX32rm, X86_INS_SHRX: shrx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRX32rr, X86_INS_SHRX: shrx{l} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRX64rm, X86_INS_SHRX: shrx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SHRX64rr, X86_INS_SHRX: shrx{q} $dst, $src1, $src2 */ 0, { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_SIDT16m, X86_INS_SIDT: sidt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SIDT32m, X86_INS_SIDT: sidt{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SIDT64m, X86_INS_SIDT: sidt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SKINIT, X86_INS_SKINIT: skinit eax */ 0, { CS_AC_READ, 0 } }, { /* X86_SLDT16m, X86_INS_SLDT: sldt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT16r, X86_INS_SLDT: sldt{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT32r, X86_INS_SLDT: sldt{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT64m, X86_INS_SLDT: sldt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SLDT64r, X86_INS_SLDT: sldt{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW16m, X86_INS_SMSW: smsw{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW16r, X86_INS_SMSW: smsw{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW32r, X86_INS_SMSW: smsw{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SMSW64r, X86_INS_SMSW: smsw{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STAC, X86_INS_STAC: stac */ 0, { 0 } }, { /* X86_STC, X86_INS_STC: stc */ X86_EFLAGS_SET_CF, { 0 } }, { /* X86_STD, X86_INS_STD: std */ X86_EFLAGS_SET_DF, { 0 } }, { /* X86_STGI, X86_INS_STGI: stgi */ 0, { 0 } }, { /* X86_STI, X86_INS_STI: sti */ X86_EFLAGS_SET_IF, { 0 } }, { /* X86_STOSB, X86_INS_STOSB: stosb $dst, al */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STOSL, X86_INS_STOSD: stos{l|d} {%eax, $dst|$dst, eax} */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STOSQ, X86_INS_STOSQ: stosq $dst, rax */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STOSW, X86_INS_STOSW: stosw $dst, ax */ X86_EFLAGS_TEST_DF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_STR16r, X86_INS_STR: str{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STR32r, X86_INS_STR: str{l} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STR64r, X86_INS_STR: str{q} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_STRm, X86_INS_STR: str{w} $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_SUB16i16, X86_INS_SUB: sub{w} ax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16mi, X86_INS_SUB: sub{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16mi8, X86_INS_SUB: sub{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16mr, X86_INS_SUB: sub{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB16ri, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16ri8, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB16rm, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB16rr, X86_INS_SUB: sub{w} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB16rr_REV, X86_INS_SUB: sub{w} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32i32, X86_INS_SUB: sub{l} eax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32mi, X86_INS_SUB: sub{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32mi8, X86_INS_SUB: sub{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32mr, X86_INS_SUB: sub{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32ri, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32ri8, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB32rm, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32rr, X86_INS_SUB: sub{l} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB32rr_REV, X86_INS_SUB: sub{l} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64i32, X86_INS_SUB: sub{q} rax, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64mi32, X86_INS_SUB: sub{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64mi8, X86_INS_SUB: sub{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64mr, X86_INS_SUB: sub{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64ri32, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64ri8, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB64rm, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64rr, X86_INS_SUB: sub{q} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB64rr_REV, X86_INS_SUB: sub{q} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8i8, X86_INS_SUB: sub{b} al, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8mi, X86_INS_SUB: sub{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8mi8, X86_INS_SUB: sub{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8mr, X86_INS_SUB: sub{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8ri, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8ri8, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_SUB8rm, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8rr, X86_INS_SUB: sub{b} $src1, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SUB8rr_REV, X86_INS_SUB: sub{b} $dst, $src2 */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_SWAPGS, X86_INS_SWAPGS: swapgs */ 0, { 0 } }, { /* X86_SYSCALL, X86_INS_SYSCALL: syscall */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSENTER, X86_INS_SYSENTER: sysenter */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSEXIT, X86_INS_SYSEXIT: sysexit{l} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSEXIT64, X86_INS_SYSEXIT: sysexit{q} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSRET, X86_INS_SYSRET: sysret{l} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_SYSRET64, X86_INS_SYSRET: sysret{q} */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF, { 0 } }, { /* X86_T1MSKC32rm, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_T1MSKC32rr, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_T1MSKC64rm, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_T1MSKC64rr, X86_INS_T1MSKC: t1mskc $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TEST16i16, X86_INS_TEST: test{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST16mi, X86_INS_TEST: test{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST16mi_alt, X86_INS_TEST: test{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST16ri, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST16ri_alt, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST16rm, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST16rr, X86_INS_TEST: test{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST32i32, X86_INS_TEST: test{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST32mi, X86_INS_TEST: test{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST32mi_alt, X86_INS_TEST: test{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST32ri, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST32ri_alt, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST32rm, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST32rr, X86_INS_TEST: test{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST64i32, X86_INS_TEST: test{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST64mi32, X86_INS_TEST: test{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST64mi32_alt, X86_INS_TEST: test{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST64ri32, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST64ri32_alt, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST64rm, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST64rr, X86_INS_TEST: test{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST8i8, X86_INS_TEST: test{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST8mi, X86_INS_TEST: test{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST8mi_alt, X86_INS_TEST: test{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_TEST8ri, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST8ri_alt, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_IGNORE, 0 } }, { /* X86_TEST8rm, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TEST8rr, X86_INS_TEST: test{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ, CS_AC_READ, 0 } }, { /* X86_TRAP, X86_INS_UD2: ud2 */ 0, { 0 } }, { /* X86_TZCNT16rm, X86_INS_TZCNT: tzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT16rr, X86_INS_TZCNT: tzcnt{w} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT32rm, X86_INS_TZCNT: tzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT32rr, X86_INS_TZCNT: tzcnt{l} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT64rm, X86_INS_TZCNT: tzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZCNT64rr, X86_INS_TZCNT: tzcnt{q} $dst, $src */ X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_AF, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK32rm, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK32rr, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK64rm, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_TZMSK64rr, X86_INS_TZMSK: tzmsk $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_UD2B, X86_INS_UD2B: ud2b */ 0, { 0 } }, { /* X86_VERRm, X86_INS_VERR: verr $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VERRr, X86_INS_VERR: verr $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VERWm, X86_INS_VERW: verw $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VERWr, X86_INS_VERW: verw $seg */ X86_EFLAGS_MODIFY_ZF, { CS_AC_READ, 0 } }, { /* X86_VMCALL, X86_INS_VMCALL: vmcall */ 0, { 0 } }, { /* X86_VMCLEARm, X86_INS_VMCLEAR: vmclear $vmcs */ 0, { CS_AC_READ, 0 } }, { /* X86_VMFUNC, X86_INS_VMFUNC: vmfunc */ 0, { 0 } }, { /* X86_VMLAUNCH, X86_INS_VMLAUNCH: vmlaunch */ 0, { 0 } }, { /* X86_VMLOAD32, X86_INS_VMLOAD: vmload eax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMLOAD64, X86_INS_VMLOAD: vmload rax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMMCALL, X86_INS_VMMCALL: vmmcall */ 0, { 0 } }, { /* X86_VMPTRLDm, X86_INS_VMPTRLD: vmptrld $vmcs */ 0, { CS_AC_READ, 0 } }, { /* X86_VMPTRSTm, X86_INS_VMPTRST: vmptrst $vmcs */ 0, { CS_AC_WRITE, 0 } }, { /* X86_VMREAD32rm, X86_INS_VMREAD: vmread{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMREAD32rr, X86_INS_VMREAD: vmread{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMREAD64rm, X86_INS_VMREAD: vmread{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMREAD64rr, X86_INS_VMREAD: vmread{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMRESUME, X86_INS_VMRESUME: vmresume */ 0, { 0 } }, { /* X86_VMRUN32, X86_INS_VMRUN: vmrun eax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMRUN64, X86_INS_VMRUN: vmrun rax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMSAVE32, X86_INS_VMSAVE: vmsave eax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMSAVE64, X86_INS_VMSAVE: vmsave rax */ 0, { CS_AC_READ, 0 } }, { /* X86_VMWRITE32rm, X86_INS_VMWRITE: vmwrite{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMWRITE32rr, X86_INS_VMWRITE: vmwrite{l} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMWRITE64rm, X86_INS_VMWRITE: vmwrite{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMWRITE64rr, X86_INS_VMWRITE: vmwrite{q} $dst, $src */ 0, { CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_VMXOFF, X86_INS_VMXOFF: vmxoff */ 0, { 0 } }, { /* X86_VMXON, X86_INS_VMXON: vmxon $vmxon */ 0, { CS_AC_READ, 0 } }, { /* X86_WBINVD, X86_INS_WBINVD: wbinvd */ 0, { 0 } }, { /* X86_WRFSBASE, X86_INS_WRFSBASE: wrfsbase{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRFSBASE64, X86_INS_WRFSBASE: wrfsbase{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRGSBASE, X86_INS_WRGSBASE: wrgsbase{l} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRGSBASE64, X86_INS_WRGSBASE: wrgsbase{q} $src */ 0, { CS_AC_READ, 0 } }, { /* X86_WRMSR, X86_INS_WRMSR: wrmsr */ 0, { 0 } }, { /* X86_XADD16rm, X86_INS_XADD: xadd{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD16rr, X86_INS_XADD: xadd{w} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD32rm, X86_INS_XADD: xadd{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD32rr, X86_INS_XADD: xadd{l} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD64rm, X86_INS_XADD: xadd{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD64rr, X86_INS_XADD: xadd{q} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD8rm, X86_INS_XADD: xadd{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XADD8rr, X86_INS_XADD: xadd{b} $dst, $src */ X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG16ar, X86_INS_XCHG: xchg{w} ax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG16rm, X86_INS_XCHG: xchg{w} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG16rr, X86_INS_XCHG: xchg{w} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32ar, X86_INS_XCHG: xchg{l} eax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32ar64, X86_INS_XCHG: xchg{l} eax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32rm, X86_INS_XCHG: xchg{l} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG32rr, X86_INS_XCHG: xchg{l} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG64ar, X86_INS_XCHG: xchg{q} rax, $src */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG64rm, X86_INS_XCHG: xchg{q} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG64rr, X86_INS_XCHG: xchg{q} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG8rm, X86_INS_XCHG: xchg{b} $ptr, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCHG8rr, X86_INS_XCHG: xchg{b} $src, $val */ 0, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 } }, { /* X86_XCRYPTCBC, X86_INS_XCRYPTCBC: xcryptcbc */ 0, { 0 } }, { /* X86_XCRYPTCFB, X86_INS_XCRYPTCFB: xcryptcfb */ 0, { 0 } }, { /* X86_XCRYPTCTR, X86_INS_XCRYPTCTR: xcryptctr */ 0, { 0 } }, { /* X86_XCRYPTECB, X86_INS_XCRYPTECB: xcryptecb */ 0, { 0 } }, { /* X86_XCRYPTOFB, X86_INS_XCRYPTOFB: xcryptofb */ 0, { 0 } }, { /* X86_XGETBV, X86_INS_XGETBV: xgetbv */ 0, { 0 } }, { /* X86_XLAT, X86_INS_XLATB: xlatb */ 0, { 0 } }, { /* X86_XOR16i16, X86_INS_XOR: xor{w} ax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16mi, X86_INS_XOR: xor{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16mi8, X86_INS_XOR: xor{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16mr, X86_INS_XOR: xor{w} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR16ri, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16ri8, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR16rm, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR16rr, X86_INS_XOR: xor{w} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR16rr_REV, X86_INS_XOR: xor{w} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32i32, X86_INS_XOR: xor{l} eax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32mi, X86_INS_XOR: xor{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32mi8, X86_INS_XOR: xor{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32mr, X86_INS_XOR: xor{l} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32ri, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32ri8, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR32rm, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32rr, X86_INS_XOR: xor{l} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR32rr_REV, X86_INS_XOR: xor{l} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64i32, X86_INS_XOR: xor{q} rax, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64mi32, X86_INS_XOR: xor{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64mi8, X86_INS_XOR: xor{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64mr, X86_INS_XOR: xor{q} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64ri32, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64ri8, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR64rm, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64rr, X86_INS_XOR: xor{q} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR64rr_REV, X86_INS_XOR: xor{q} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8i8, X86_INS_XOR: xor{b} al, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8mi, X86_INS_XOR: xor{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8mi8, X86_INS_XOR: xor{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8mr, X86_INS_XOR: xor{b} $dst, $src */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8ri, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8ri8, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 } }, { /* X86_XOR8rm, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8rr, X86_INS_XOR: xor{b} $src1, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XOR8rr_REV, X86_INS_XOR: xor{b} $dst, $src2 */ X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF, { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 } }, { /* X86_XRSTOR, X86_INS_XRSTOR: xrstor $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XRSTOR64, X86_INS_XRSTOR64: xrstor64 $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XRSTORS, X86_INS_XRSTORS: xrstors $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XRSTORS64, X86_INS_XRSTORS64: xrstors64 $dst */ 0, { CS_AC_READ, 0 } }, { /* X86_XSAVE, X86_INS_XSAVE: xsave $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVE64, X86_INS_XSAVE64: xsave64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEC, X86_INS_XSAVEC: xsavec $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEC64, X86_INS_XSAVEC64: xsavec64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEOPT, X86_INS_XSAVEOPT: xsaveopt $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVEOPT64, X86_INS_XSAVEOPT64: xsaveopt64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVES, X86_INS_XSAVES: xsaves $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSAVES64, X86_INS_XSAVES64: xsaves64 $dst */ 0, { CS_AC_WRITE, 0 } }, { /* X86_XSETBV, X86_INS_XSETBV: xsetbv */ 0, { 0 } }, { /* X86_XSHA1, X86_INS_XSHA1: xsha1 */ 0, { 0 } }, { /* X86_XSHA256, X86_INS_XSHA256: xsha256 */ 0, { 0 } }, { /* X86_XSTORE, X86_INS_XSTORE: xstore */ 0, { 0 } }, capstone-sys-0.11.0/capstone/arch/X86/X86MappingInsn_reduce.inc010066400017500001750000005256461363403403300223560ustar0000000000000000// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) // By Nguyen Anh Quynh { X86_AAA, X86_INS_AAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AAD8i8, X86_INS_AAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AAM8i8, X86_INS_AAM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AAS, X86_INS_AAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADC16i16, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16ri, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC16rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32i32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32ri, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC32rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64i32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64mi32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64ri32, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC64rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8i8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8mi8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADC8mr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8ri, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8ri8, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADC8rm, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8rr, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADC8rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADCX32rm, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADCX32rr, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADCX64rm, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADCX64rr, X86_INS_ADCX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADD16i16, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD16rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32i32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD32rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64i32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64mi32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64ri32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD64rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8i8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADD8mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8ri8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ADD8rm, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8rr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADD8rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ADOX32rm, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADOX32rr, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADOX64rm, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_ADOX64rr, X86_INS_ADOX, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0 #endif }, { X86_AND16i16, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND16rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32i32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND32rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64i32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64mi32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64ri32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND64rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8i8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AND8mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8ri8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_AND8rm, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8rr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_AND8rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ANDN32rm, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDN32rr, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDN64rm, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ANDN64rr, X86_INS_ANDN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_ARPL16mr, X86_INS_ARPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_ARPL16rr, X86_INS_ARPL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_BEXTR32rm, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTR32rr, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTR64rm, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTR64rr, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BEXTRI32mi, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BEXTRI32ri, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BEXTRI64mi, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BEXTRI64ri, X86_INS_BEXTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL32rm, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL32rr, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL64rm, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCFILL64rr, X86_INS_BLCFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI32rm, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI32rr, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI64rm, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCI64rr, X86_INS_BLCI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC32rm, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC32rr, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC64rm, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCIC64rr, X86_INS_BLCIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK32rm, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK32rr, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK64rm, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCMSK64rr, X86_INS_BLCMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS32rm, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS32rr, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS64rm, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLCS64rr, X86_INS_BLCS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL32rm, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL32rr, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL64rm, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSFILL64rr, X86_INS_BLSFILL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSI32rm, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSI32rr, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSI64rm, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSI64rr, X86_INS_BLSI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSIC32rm, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSIC32rr, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSIC64rm, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSIC64rr, X86_INS_BLSIC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_BLSMSK32rm, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSMSK32rr, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSMSK64rm, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSMSK64rr, X86_INS_BLSMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR32rm, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR32rr, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR64rm, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BLSR64rr, X86_INS_BLSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_BOUNDS16rm, X86_INS_BOUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_BOUNDS32rm, X86_INS_BOUND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_BSF16rm, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF16rr, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF32rm, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF32rr, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF64rm, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSF64rr, X86_INS_BSF, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR16rm, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR16rr, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR32rm, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR32rr, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR64rm, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSR64rr, X86_INS_BSR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BSWAP32r, X86_INS_BSWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_BSWAP64r, X86_INS_BSWAP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_BT16mi8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT16mr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT16ri8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT16rr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32mi8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32mr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32ri8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT32rr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64mi8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64mr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64ri8, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BT64rr, X86_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16mi8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16mr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16ri8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC16rr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32mi8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32mr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32ri8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC32rr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64mi8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64mr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64ri8, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTC64rr, X86_INS_BTC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16mi8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16mr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16ri8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR16rr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32mi8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32mr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32ri8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR32rr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64mi8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64mr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64ri8, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTR64rr, X86_INS_BTR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16mi8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16mr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16ri8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS16rr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32mi8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32mr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32ri8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS32rr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64mi8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64mr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64ri8, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BTS64rr, X86_INS_BTS, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_BZHI32rm, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_BZHI32rr, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_BZHI64rm, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_BZHI64rr, X86_INS_BZHI, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_CALL16m, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL16r, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL32m, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL32r, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CALL64m, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_CALL64pcrel32, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_CALL64r, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_CALLpcrel16, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_CALLpcrel32, X86_INS_CALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CBW, X86_INS_CBW, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_CDQ, X86_INS_CDQ, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0 #endif }, { X86_CDQE, X86_INS_CDQE, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_RAX, 0 }, { 0 }, 0, 0 #endif }, { X86_CLAC, X86_INS_CLAC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_CLC, X86_INS_CLC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CLD, X86_INS_CLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CLGI, X86_INS_CLGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_CLI, X86_INS_CLI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_CLTS, X86_INS_CLTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CLWB, X86_INS_CLWB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMC, X86_INS_CMC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMOVA16rm, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA16rr, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA32rm, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA32rr, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA64rm, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVA64rr, X86_INS_CMOVA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE16rm, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE16rr, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE32rm, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE32rr, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE64rm, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVAE64rr, X86_INS_CMOVAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB16rm, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB16rr, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB32rm, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB32rr, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB64rm, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVB64rr, X86_INS_CMOVB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE16rm, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE16rr, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE32rm, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE32rr, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE64rm, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVBE64rr, X86_INS_CMOVBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE16rm, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE16rr, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE32rm, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE32rr, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE64rm, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVE64rr, X86_INS_CMOVE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG16rm, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG16rr, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG32rm, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG32rr, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG64rm, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVG64rr, X86_INS_CMOVG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE16rm, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE16rr, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE32rm, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE32rr, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE64rm, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVGE64rr, X86_INS_CMOVGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL16rm, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL16rr, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL32rm, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL32rr, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL64rm, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVL64rr, X86_INS_CMOVL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE16rm, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE16rr, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE32rm, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE32rr, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE64rm, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVLE64rr, X86_INS_CMOVLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE16rm, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE16rr, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE32rm, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE32rr, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE64rm, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNE64rr, X86_INS_CMOVNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO16rm, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO16rr, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO32rm, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO32rr, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO64rm, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNO64rr, X86_INS_CMOVNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP16rm, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP16rr, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP32rm, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP32rr, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP64rm, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNP64rr, X86_INS_CMOVNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS16rm, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS16rr, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS32rm, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS32rr, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS64rm, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVNS64rr, X86_INS_CMOVNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO16rm, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO16rr, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO32rm, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO32rr, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO64rm, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVO64rr, X86_INS_CMOVO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP16rm, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP16rr, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP32rm, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP32rr, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP64rm, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVP64rr, X86_INS_CMOVP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS16rm, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS16rr, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS32rm, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS32rr, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS64rm, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMOVS64rr, X86_INS_CMOVS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0 #endif }, { X86_CMP16i16, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16ri, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP16rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32i32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32ri, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP32rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64i32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64mi32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64ri32, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP64rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8i8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8mi8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CMP8mr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8ri, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8ri8, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_CMP8rm, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8rr, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMP8rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSB, X86_INS_CMPSB, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSL, X86_INS_CMPSD, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSQ, X86_INS_CMPSQ, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPSW, X86_INS_CMPSW, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG16B, X86_INS_CMPXCHG16B, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG16rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG16rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG32rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG32rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG64rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG64rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG8B, X86_INS_CMPXCHG8B, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG8rm, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CMPXCHG8rr, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_CPUID, X86_INS_CPUID, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, 0, 0 #endif }, { X86_CQO, X86_INS_CQO, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0 #endif }, { X86_CWD, X86_INS_CWD, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, 0 }, { 0 }, 0, 0 #endif }, { X86_CWDE, X86_INS_CWDE, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_DAA, X86_INS_DAA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DAS, X86_INS_DAS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DATA16_PREFIX, X86_INS_DATA16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_DEC16m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC16r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC16r_alt, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DEC32m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC32r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC32r_alt, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_DEC64m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC64r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC8m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DEC8r, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV16m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV16r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV32m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV32r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV64m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV64r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV8m, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_DIV8r, X86_INS_DIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ENTER, X86_INS_ENTER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_FARCALL16i, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_FARCALL16m, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_FARCALL32i, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_FARCALL32m, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_FARCALL64, X86_INS_LCALL, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0 #endif }, { X86_FARJMP16i, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_FARJMP16m, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { X86_FARJMP32i, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_FARJMP32m, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { X86_FARJMP64, X86_INS_LJMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { X86_FSETPM, X86_INS_FSETPM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_GETSEC, X86_INS_GETSEC, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, 0 }, { 0 }, 0, 0 #endif }, { X86_HLT, X86_INS_HLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_IDIV16m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV16r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV32m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV32r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV64m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV64r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV8m, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IDIV8r, X86_INS_IDIV, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rm, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rmi, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rmi8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rr, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rri, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL16rri8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rm, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rmi, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rmi8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rr, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rri, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL32rri8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rm, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rmi32, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rmi8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rr, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rri32, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL64rri8, X86_INS_IMUL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL8m, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IMUL8r, X86_INS_IMUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN16ri, X86_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN16rr, X86_INS_IN, #ifndef CAPSTONE_DIET { X86_REG_DX, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN32ri, X86_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN32rr, X86_INS_IN, #ifndef CAPSTONE_DIET { X86_REG_DX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_IN8ri, X86_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0 #endif }, { X86_IN8rr, X86_INS_IN, #ifndef CAPSTONE_DIET { X86_REG_DX, 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0 #endif }, { X86_INC16m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC16r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC16r_alt, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INC32m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC32r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC32r_alt, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INC64m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC64r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC8m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INC8r, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_INSB, X86_INS_INSB, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_INSL, X86_INS_INSD, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_INSW, X86_INS_INSW, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_INT, X86_INS_INT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_INT1, X86_INS_INT1, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_INT3, X86_INS_INT3, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_INTO, X86_INS_INTO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_INT, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVD, X86_INS_INVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_INVEPT32, X86_INS_INVEPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVEPT64, X86_INS_INVEPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_INVLPG, X86_INS_INVLPG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_INVLPGA32, X86_INS_INVLPGA, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVLPGA64, X86_INS_INVLPGA, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_INVPCID32, X86_INS_INVPCID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVPCID64, X86_INS_INVPCID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_INVVPID32, X86_INS_INVVPID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_INVVPID64, X86_INS_INVVPID, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_IRET16, X86_INS_IRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_IRET32, X86_INS_IRETD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_IRET64, X86_INS_IRETQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_JAE_1, X86_INS_JAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JAE_2, X86_INS_JAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JAE_4, X86_INS_JAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JA_1, X86_INS_JA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JA_2, X86_INS_JA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JA_4, X86_INS_JA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JBE_1, X86_INS_JBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JBE_2, X86_INS_JBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JBE_4, X86_INS_JBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JB_1, X86_INS_JB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JB_2, X86_INS_JB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JB_4, X86_INS_JB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JCXZ, X86_INS_JCXZ, #ifndef CAPSTONE_DIET { X86_REG_CX, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JECXZ, X86_INS_JECXZ, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JE_1, X86_INS_JE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JE_2, X86_INS_JE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JE_4, X86_INS_JE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JGE_1, X86_INS_JGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JGE_2, X86_INS_JGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JGE_4, X86_INS_JGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JG_1, X86_INS_JG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JG_2, X86_INS_JG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JG_4, X86_INS_JG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JLE_1, X86_INS_JLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JLE_2, X86_INS_JLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JLE_4, X86_INS_JLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JL_1, X86_INS_JL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JL_2, X86_INS_JL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JL_4, X86_INS_JL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JMP16m, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP16r, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP32m, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP32r, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1 #endif }, { X86_JMP64m, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1 #endif }, { X86_JMP64r, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1 #endif }, { X86_JMP_1, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JMP_2, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JMP_4, X86_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNE_1, X86_INS_JNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNE_2, X86_INS_JNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNE_4, X86_INS_JNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNO_1, X86_INS_JNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNO_2, X86_INS_JNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNO_4, X86_INS_JNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNP_1, X86_INS_JNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNP_2, X86_INS_JNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNP_4, X86_INS_JNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNS_1, X86_INS_JNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNS_2, X86_INS_JNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JNS_4, X86_INS_JNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JO_1, X86_INS_JO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JO_2, X86_INS_JO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JO_4, X86_INS_JO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JP_1, X86_INS_JP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JP_2, X86_INS_JP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JP_4, X86_INS_JP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JRCXZ, X86_INS_JRCXZ, #ifndef CAPSTONE_DIET { X86_REG_RCX, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JS_1, X86_INS_JS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JS_2, X86_INS_JS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_JS_4, X86_INS_JS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0 #endif }, { X86_LAHF, X86_INS_LAHF, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_AH, 0 }, { 0 }, 0, 0 #endif }, { X86_LAR16rm, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR16rr, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR32rm, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR32rr, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR64rm, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LAR64rr, X86_INS_LAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG16, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG16B, X86_INS_CMPXCHG16B, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG32, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG64, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG8, X86_INS_CMPXCHG, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LCMPXCHG8B, X86_INS_CMPXCHG8B, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LDS16rm, X86_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LDS32rm, X86_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LEA16r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LEA32r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LEA64_32r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LEA64r, X86_INS_LEA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LEAVE, X86_INS_LEAVE, #ifndef CAPSTONE_DIET { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LEAVE64, X86_INS_LEAVE, #ifndef CAPSTONE_DIET { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LES16rm, X86_INS_LES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LES32rm, X86_INS_LES, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LFS16rm, X86_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LFS32rm, X86_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LFS64rm, X86_INS_LFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LGDT16m, X86_INS_LGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LGDT32m, X86_INS_LGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LGDT64m, X86_INS_LGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LGS16rm, X86_INS_LGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LGS32rm, X86_INS_LGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LGS64rm, X86_INS_LGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LIDT16m, X86_INS_LIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LIDT32m, X86_INS_LIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_LIDT64m, X86_INS_LIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LLDT16m, X86_INS_LLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LLDT16r, X86_INS_LLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LMSW16m, X86_INS_LMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LMSW16r, X86_INS_LMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LOCK_ADD16mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD16mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD16mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD32mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD32mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD32mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD64mi32, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD64mi8, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD64mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD8mi, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_ADD8mr, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND16mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND16mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND16mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND32mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND32mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND32mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND64mi32, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND64mi8, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND64mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND8mi, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_AND8mr, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC16m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC32m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC64m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_DEC8m, X86_INS_DEC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC16m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC32m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC64m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_INC8m, X86_INS_INC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR16mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR16mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR16mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR32mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR32mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR32mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR64mi32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR64mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR64mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR8mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_OR8mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB16mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB16mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB16mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB32mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB32mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB32mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB64mi32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB64mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB64mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB8mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_SUB8mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR16mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR16mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR16mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR32mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR32mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR32mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR64mi32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR64mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR64mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR8mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LOCK_XOR8mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSB, X86_INS_LODSB, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AL, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSL, X86_INS_LODSD, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EAX, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSQ, X86_INS_LODSQ, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_RAX, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LODSW, X86_INS_LODSW, #ifndef CAPSTONE_DIET { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AX, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_LOOP, X86_INS_LOOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LOOPE, X86_INS_LOOPE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LOOPNE, X86_INS_LOOPNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LRETIL, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LRETIQ, X86_INS_RETFQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LRETIW, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LRETL, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LRETQ, X86_INS_RETFQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_LRETW, X86_INS_RETF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_LSL16rm, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL16rr, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL32rm, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL32rr, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL64rm, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSL64rr, X86_INS_LSL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSS16rm, X86_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSS32rm, X86_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LSS64rm, X86_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_LTRm, X86_INS_LTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LTRr, X86_INS_LTR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_LXADD16, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LXADD32, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LXADD64, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LXADD8, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT16rm, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT16rr, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT32rm, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT32rr, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT64rm, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_LZCNT64rr, X86_INS_LZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MONTMUL, X86_INS_MONTMUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RSI, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_RSI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ao16, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16mi, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ms, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16o16a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ri, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16ri_alt, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16rs, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV16sm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV16sr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV32ao16, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32cr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32dr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32mi, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ms, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32o16a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rc, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32rd, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_MOV32ri, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32ri_alt, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32rs, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV32sm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV32sr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV64ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64cr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64dr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64mi32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64ms, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rc, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64rd, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOV64ri, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64ri32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64rs, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV64sm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV64sr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_MOV8ao16, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ao32, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ao64, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8mi, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8mr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8mr_NOREX, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8o16a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8o32a, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8o64a, X86_INS_MOVABS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ri, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8ri_alt, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rm, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rm_NOREX, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rr, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rr_NOREX, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOV8rr_REV, X86_INS_MOV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE16mr, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE16rm, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE32mr, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE32rm, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE64mr, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVBE64rm, X86_INS_MOVBE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSB, X86_INS_MOVSB, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSL, X86_INS_MOVSD, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSQ, X86_INS_MOVSQ, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSW, X86_INS_MOVSW, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX16rm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX16rr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32_NOREXrm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32_NOREXrr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rm16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rr16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX32rr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rm16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64rm32, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rm32_alt, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rm8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64rr16, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVSX64rr32, X86_INS_MOVSXD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_MOVSX64rr8, X86_INS_MOVSX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX16rm8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX16rr8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32_NOREXrm8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32_NOREXrr8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rm16, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rm8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rr16, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX32rr8, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rm16_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rm8_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rr16_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MOVZX64rr8_Q, X86_INS_MOVZX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_MUL16m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL16r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL32m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL32r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL64m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL64r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL8m, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_MUL8r, X86_INS_MUL, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0 #endif }, { X86_MULX32rm, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MULX32rr, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MULX64rm, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_MULX64rr, X86_INS_MULX, #ifndef CAPSTONE_DIET { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_NEG16m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG16r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG32m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG32r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG64m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG64r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG8m, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NEG8r, X86_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16m7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_16r7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_m7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r4, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r5, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r6, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP18_r7, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOP19rr, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_19, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1a, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1b, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1c, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1d, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPL_1e, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_19, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1a, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1b, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1c, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1d, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOOPW_1e, X86_INS_NOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT16m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT16r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT32m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT32r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT64m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT64r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT8m, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_NOT8r, X86_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OR16i16, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR16rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32i32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32mrLocked, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_OR32ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR32rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64i32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64mi32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64ri32, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR64rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8i8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8mi, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8mi8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_OR8mr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8ri8, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_OR8rm, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8rr, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OR8rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_OUT16ir, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT16rr, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT32ir, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT32rr, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT8ir, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUT8rr, X86_INS_OUT, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_OUTSB, X86_INS_OUTSB, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_OUTSL, X86_INS_OUTSD, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_OUTSW, X86_INS_OUTSW, #ifndef CAPSTONE_DIET { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0 #endif }, { X86_PCOMMIT, X86_INS_PCOMMIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PDEP32rm, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PDEP32rr, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PDEP64rm, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PDEP64rr, X86_INS_PDEP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT32rm, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT32rr, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT64rm, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_PEXT64rr, X86_INS_PEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_POP16r, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_POP16rmm, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_POP16rmr, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_POP32r, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POP32rmm, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POP32rmr, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POP64r, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POP64rmm, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POP64rmr, X86_INS_POP, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPA16, X86_INS_POPAW, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPA32, X86_INS_POPAL, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPDS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPDS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPES16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPES32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPF16, X86_INS_POPF, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_POPF32, X86_INS_POPFD, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPF64, X86_INS_POPFQ, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPFS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_POPFS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPFS64, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPGS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_POPGS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPGS64, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_POPSS16, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_POPSS32, X86_INS_POP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH16i8, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH16r, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSH16rmm, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSH16rmr, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSH32i8, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH32r, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH32rmm, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH32rmr, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSH64i16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64i32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64i8, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64r, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64rmm, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSH64rmr, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHA16, X86_INS_PUSHAW, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHA32, X86_INS_PUSHAL, #ifndef CAPSTONE_DIET { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHCS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHCS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHDS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHDS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHES16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHES32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHF16, X86_INS_PUSHF, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0 #endif }, { X86_PUSHF32, X86_INS_PUSHFD, #ifndef CAPSTONE_DIET { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHF64, X86_INS_PUSHFQ, #ifndef CAPSTONE_DIET { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHFS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PUSHFS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHFS64, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHGS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_PUSHGS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHGS64, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_PUSHSS16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHSS32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHi16, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_PUSHi32, X86_INS_PUSH, #ifndef CAPSTONE_DIET { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_RCL16m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL16ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL32ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL64ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8m1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8mCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8mi, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8r1, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8rCL, X86_INS_RCL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCL8ri, X86_INS_RCL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR16ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR32ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR64ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8m1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8mCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8mi, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8r1, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8rCL, X86_INS_RCR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RCR8ri, X86_INS_RCR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDFSBASE, X86_INS_RDFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDFSBASE64, X86_INS_RDFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDGSBASE, X86_INS_RDGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDGSBASE64, X86_INS_RDGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RDMSR, X86_INS_RDMSR, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0 #endif }, { X86_RDPMC, X86_INS_RDPMC, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_RDRAND16r, X86_INS_RDRAND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDRAND32r, X86_INS_RDRAND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDRAND64r, X86_INS_RDRAND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDSEED16r, X86_INS_RDSEED, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDSEED32r, X86_INS_RDSEED, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDSEED64r, X86_INS_RDSEED, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RDTSC, X86_INS_RDTSC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0 #endif }, { X86_RDTSCP, X86_INS_RDTSCP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_RETIL, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_RETIQ, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RETIW, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_RETL, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_RETQ, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_RETW, X86_INS_RET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0 #endif }, { X86_ROL16m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL16ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL32ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL64ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8m1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8mCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8mi, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8r1, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8rCL, X86_INS_ROL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROL8ri, X86_INS_ROL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR16ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR32ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR64ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8m1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8mCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8mi, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8r1, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8rCL, X86_INS_ROR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_ROR8ri, X86_INS_ROR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_RORX32mi, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RORX32ri, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RORX64mi, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RORX64ri, X86_INS_RORX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_RSM, X86_INS_RSM, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_SAHF, X86_INS_SAHF, #ifndef CAPSTONE_DIET { X86_REG_AH, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL16ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL32ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL64ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8m1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8mCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8mi, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8r1, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8rCL, X86_INS_SAL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAL8ri, X86_INS_SAL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SALC, X86_INS_SALC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_AL, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SAR16m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR16ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR32ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR64ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8m1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8mCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8mi, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8r1, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8rCL, X86_INS_SAR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SAR8ri, X86_INS_SAR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SARX32rm, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SARX32rr, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SARX64rm, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SARX64rr, X86_INS_SARX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SBB16i16, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16ri, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB16rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32i32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32ri, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB32rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64i32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64mi32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64ri32, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB64rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8i8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8mi8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SBB8mr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8ri, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8ri8, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SBB8rm, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8rr, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SBB8rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASB, X86_INS_SCASB, #ifndef CAPSTONE_DIET { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASL, X86_INS_SCASD, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASQ, X86_INS_SCASQ, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SCASW, X86_INS_SCASW, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SETAEm, X86_INS_SETAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETAEr, X86_INS_SETAE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETAm, X86_INS_SETA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETAr, X86_INS_SETA, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBEm, X86_INS_SETBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBEr, X86_INS_SETBE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBm, X86_INS_SETB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETBr, X86_INS_SETB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETEm, X86_INS_SETE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETEr, X86_INS_SETE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGEm, X86_INS_SETGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGEr, X86_INS_SETGE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGm, X86_INS_SETG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETGr, X86_INS_SETG, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLEm, X86_INS_SETLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLEr, X86_INS_SETLE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLm, X86_INS_SETL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETLr, X86_INS_SETL, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNEm, X86_INS_SETNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNEr, X86_INS_SETNE, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNOm, X86_INS_SETNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNOr, X86_INS_SETNO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNPm, X86_INS_SETNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNPr, X86_INS_SETNP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNSm, X86_INS_SETNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETNSr, X86_INS_SETNS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETOm, X86_INS_SETO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETOr, X86_INS_SETO, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETPm, X86_INS_SETP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETPr, X86_INS_SETP, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETSm, X86_INS_SETS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SETSr, X86_INS_SETS, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SGDT16m, X86_INS_SGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SGDT32m, X86_INS_SGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SGDT64m, X86_INS_SGDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_SHL16m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL16ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL32ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL64ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8m1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8mCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8mi, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8r1, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8rCL, X86_INS_SHL, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHL8ri, X86_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16mrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16mri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16rrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD16rri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32mrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32mri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32rrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD32rri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64mrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64mri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64rrCL, X86_INS_SHLD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLD64rri8, X86_INS_SHLD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHLX32rm, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHLX32rr, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHLX64rm, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHLX64rr, X86_INS_SHLX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHR16m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR16ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR32ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR64ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8m1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8mCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8mi, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8r1, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8rCL, X86_INS_SHR, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHR8ri, X86_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16mrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16mri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16rrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD16rri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32mrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32mri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32rrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD32rri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64mrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64mri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64rrCL, X86_INS_SHRD, #ifndef CAPSTONE_DIET { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRD64rri8, X86_INS_SHRD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SHRX32rm, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHRX32rr, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHRX64rm, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SHRX64rr, X86_INS_SHRX, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0 #endif }, { X86_SIDT16m, X86_INS_SIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SIDT32m, X86_INS_SIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SIDT64m, X86_INS_SIDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_SKINIT, X86_INS_SKINIT, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_SLDT16m, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT16r, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT32r, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT64m, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SLDT64r, X86_INS_SLDT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW16m, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW16r, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW32r, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_SMSW64r, X86_INS_SMSW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_STAC, X86_INS_STAC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STC, X86_INS_STC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_STD, X86_INS_STD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_STGI, X86_INS_STGI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_STI, X86_INS_STI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STOSB, X86_INS_STOSB, #ifndef CAPSTONE_DIET { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STOSL, X86_INS_STOSD, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STOSQ, X86_INS_STOSQ, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RCX, X86_REG_RDI, X86_REG_EFLAGS, 0 }, { X86_REG_RCX, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STOSW, X86_INS_STOSW, #ifndef CAPSTONE_DIET { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0 #endif }, { X86_STR16r, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STR32r, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STR64r, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_STRm, X86_INS_STR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_SUB16i16, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB16rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32i32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB32rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64i32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64mi32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64ri32, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB64rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8i8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8mi, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8mi8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SUB8mr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8ri8, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_SUB8rm, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8rr, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SUB8rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_SWAPGS, X86_INS_SWAPGS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_SYSCALL, X86_INS_SYSCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_SYSENTER, X86_INS_SYSENTER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0 #endif }, { X86_SYSEXIT, X86_INS_SYSEXIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_SYSEXIT64, X86_INS_SYSEXIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_SYSRET, X86_INS_SYSRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0 #endif }, { X86_SYSRET64, X86_INS_SYSRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_T1MSKC32rm, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_T1MSKC32rr, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_T1MSKC64rm, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_T1MSKC64rr, X86_INS_T1MSKC, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TEST16i16, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16mi, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16mi_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16ri, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16ri_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST16rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32i32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32mi, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32mi_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32ri, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32ri_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST32rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64i32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64mi32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64mi32_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64ri32, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64ri32_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST64rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8i8, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8mi, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8mi_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8ri, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8ri_alt, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8rm, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TEST8rr, X86_INS_TEST, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_TRAP, X86_INS_UD2, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_TZCNT16rm, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT16rr, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT32rm, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT32rr, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT64rm, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZCNT64rr, X86_INS_TZCNT, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0 #endif }, { X86_TZMSK32rm, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TZMSK32rr, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TZMSK64rm, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_TZMSK64rr, X86_INS_TZMSK, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0 #endif }, { X86_UD2B, X86_INS_UD2B, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERRm, X86_INS_VERR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERRr, X86_INS_VERR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERWm, X86_INS_VERW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VERWr, X86_INS_VERW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_VMCALL, X86_INS_VMCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMCLEARm, X86_INS_VMCLEAR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMFUNC, X86_INS_VMFUNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMLAUNCH, X86_INS_VMLAUNCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMLOAD32, X86_INS_VMLOAD, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMLOAD64, X86_INS_VMLOAD, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMMCALL, X86_INS_VMMCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMPTRLDm, X86_INS_VMPTRLD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMPTRSTm, X86_INS_VMPTRST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMREAD32rm, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMREAD32rr, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMREAD64rm, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMREAD64rr, X86_INS_VMREAD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMRESUME, X86_INS_VMRESUME, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMRUN32, X86_INS_VMRUN, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMRUN64, X86_INS_VMRUN, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMSAVE32, X86_INS_VMSAVE, #ifndef CAPSTONE_DIET { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMSAVE64, X86_INS_VMSAVE, #ifndef CAPSTONE_DIET { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMWRITE32rm, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMWRITE32rr, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_VMWRITE64rm, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMWRITE64rr, X86_INS_VMWRITE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_VMXOFF, X86_INS_VMXOFF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_VMXON, X86_INS_VMXON, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_VM, 0 }, 0, 0 #endif }, { X86_WBINVD, X86_INS_WBINVD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_WRFSBASE, X86_INS_WRFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRFSBASE64, X86_INS_WRFSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRGSBASE, X86_INS_WRGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRGSBASE64, X86_INS_WRGSBASE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_WRMSR, X86_INS_WRMSR, #ifndef CAPSTONE_DIET { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_XADD16rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD16rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD32rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD32rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD64rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD64rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD8rm, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XADD8rr, X86_INS_XADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG16ar, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG16rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG16rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG32ar, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_XCHG32ar64, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XCHG32rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG32rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG64ar, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG64rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG64rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG8rm, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCHG8rr, X86_INS_XCHG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTCBC, X86_INS_XCRYPTCBC, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTCFB, X86_INS_XCRYPTCFB, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTCTR, X86_INS_XCRYPTCTR, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTECB, X86_INS_XCRYPTECB, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XCRYPTOFB, X86_INS_XCRYPTOFB, #ifndef CAPSTONE_DIET { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XGETBV, X86_INS_XGETBV, #ifndef CAPSTONE_DIET { X86_REG_ECX, 0 }, { X86_REG_EDX, X86_REG_EAX, 0 }, { 0 }, 0, 0 #endif }, { X86_XLAT, X86_INS_XLATB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16i16, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR16rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32i32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR32rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64i32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64mi32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64ri32, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR64rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8i8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8mi, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8mi8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_XOR8mr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8ri8, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { X86_XOR8rm, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8rr, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XOR8rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 #endif }, { X86_XRSTOR, X86_INS_XRSTOR, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XRSTOR64, X86_INS_XRSTOR64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XRSTORS, X86_INS_XRSTORS, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_XRSTORS64, X86_INS_XRSTORS64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVE, X86_INS_XSAVE, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVE64, X86_INS_XSAVE64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVEC, X86_INS_XSAVEC, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVEC64, X86_INS_XSAVEC64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVEOPT, X86_INS_XSAVEOPT, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVEOPT64, X86_INS_XSAVEOPT64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSAVES, X86_INS_XSAVES, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_XSAVES64, X86_INS_XSAVES64, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0 #endif }, { X86_XSETBV, X86_INS_XSETBV, #ifndef CAPSTONE_DIET { X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0 #endif }, { X86_XSHA1, X86_INS_XSHA1, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XSHA256, X86_INS_XSHA256, #ifndef CAPSTONE_DIET { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_XSTORE, X86_INS_XSTORE, #ifndef CAPSTONE_DIET { X86_REG_RDX, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RDI, 0 }, { 0 }, 0, 0 #endif }, { X86_UD0, X86_INS_UD0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_ENDBR32, X86_INS_ENDBR32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { X86_ENDBR64, X86_INS_ENDBR64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/X86/X86Module.c010066400017500001750000000041711363402546700174760ustar0000000000000000/* Capstone Disassembly Engine */ /* By Dang Hoang Vu 2013 */ #ifdef CAPSTONE_HAS_X86 #include "../../cs_priv.h" #include "../../MCRegisterInfo.h" #include "X86Disassembler.h" #include "X86InstPrinter.h" #include "X86Mapping.h" #include "X86Module.h" cs_err X86_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); X86_init(mri); // by default, we use Intel syntax ud->printer = X86_Intel_printInst; ud->syntax = CS_OPT_SYNTAX_INTEL; ud->printer_info = mri; ud->disasm = X86_getInstruction; ud->reg_name = X86_reg_name; ud->insn_id = X86_get_insn_id; ud->insn_name = X86_insn_name; ud->group_name = X86_group_name; ud->post_printer = NULL;; #ifndef CAPSTONE_DIET ud->reg_access = X86_reg_access; #endif if (ud->mode == CS_MODE_64) ud->regsize_map = regsize_map_64; else ud->regsize_map = regsize_map_32; return CS_ERR_OK; } cs_err X86_option(cs_struct *handle, cs_opt_type type, size_t value) { switch(type) { default: break; case CS_OPT_MODE: if (value == CS_MODE_64) handle->regsize_map = regsize_map_64; else handle->regsize_map = regsize_map_32; handle->mode = (cs_mode)value; break; case CS_OPT_SYNTAX: switch(value) { default: // wrong syntax value handle->errnum = CS_ERR_OPTION; return CS_ERR_OPTION; case CS_OPT_SYNTAX_DEFAULT: case CS_OPT_SYNTAX_INTEL: handle->syntax = CS_OPT_SYNTAX_INTEL; handle->printer = X86_Intel_printInst; break; case CS_OPT_SYNTAX_MASM: handle->printer = X86_Intel_printInst; handle->syntax = (int)value; break; case CS_OPT_SYNTAX_ATT: #if !defined(CAPSTONE_DIET) && !defined(CAPSTONE_X86_ATT_DISABLE) handle->printer = X86_ATT_printInst; handle->syntax = CS_OPT_SYNTAX_ATT; break; #elif !defined(CAPSTONE_DIET) && defined(CAPSTONE_X86_ATT_DISABLE) // ATT syntax is unsupported handle->errnum = CS_ERR_X86_ATT; return CS_ERR_X86_ATT; #else // CAPSTONE_DIET // this is irrelevant in CAPSTONE_DIET mode handle->errnum = CS_ERR_DIET; return CS_ERR_DIET; #endif } break; } return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/X86/X86Module.h010066400017500001750000000004311363402546700174760ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_X86_MODULE_H #define CS_X86_MODULE_H #include "../../utils.h" cs_err X86_global_init(cs_struct *ud); cs_err X86_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreDisassembler.c010066400017500001750000000601161363402546700217550ustar0000000000000000//===------ XCoreDisassembler.cpp - Disassembler for PowerPC ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_XCORE #include // DEBUG #include #include #include "../../cs_priv.h" #include "../../utils.h" #include "XCoreDisassembler.h" #include "../../MCInst.h" #include "../../MCInstrDesc.h" #include "../../MCFixedLenDisassembler.h" #include "../../MCRegisterInfo.h" #include "../../MCDisassembler.h" #include "../../MathExtras.h" static uint64_t getFeatureBits(int mode) { // support everything return (uint64_t)-1; } static bool readInstruction16(const uint8_t *code, size_t code_len, uint16_t *insn) { if (code_len < 2) // insufficient data return false; // Encoded as a little-endian 16-bit word in the stream. *insn = (code[0] << 0) | (code[1] << 8); return true; } static bool readInstruction32(const uint8_t *code, size_t code_len, uint32_t *insn) { if (code_len < 4) // insufficient data return false; // Encoded as a little-endian 32-bit word in the stream. *insn = (code[0] << 0) | (code[1] << 8) | (code[2] << 16) | ((uint32_t) code[3] << 24); return true; } static unsigned getReg(const MCRegisterInfo *MRI, unsigned RC, unsigned RegNo) { const MCRegisterClass *rc = MCRegisterInfo_getRegClass(MRI, RC); return rc->RegsBegin[RegNo]; } static DecodeStatus DecodeGRRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeRRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeBitpOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeNegImmOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus Decode2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus Decode2RImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeR2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus Decode2RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeRUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeRUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeRUSSrcDstBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLR2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus Decode3RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus Decode3RImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus Decode2RUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus Decode2RUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL3RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL3RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL2RUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL2RUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL6RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL5RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL4RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeL4RSrcDstSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder); #include "XCoreGenDisassemblerTables.inc" #define GET_REGINFO_ENUM #define GET_REGINFO_MC_DESC #include "XCoreGenRegisterInfo.inc" static DecodeStatus DecodeGRRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 11) return MCDisassembler_Fail; Reg = getReg(Decoder, XCore_GRRegsRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeRRegsRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { unsigned Reg; if (RegNo > 15) return MCDisassembler_Fail; Reg = getReg(Decoder, XCore_RRegsRegClassID, RegNo); MCOperand_CreateReg0(Inst, Reg); return MCDisassembler_Success; } static DecodeStatus DecodeBitpOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { static const unsigned Values[] = { 32 /*bpw*/, 1, 2, 3, 4, 5, 6, 7, 8, 16, 24, 32 }; if (Val > 11) return MCDisassembler_Fail; MCOperand_CreateImm0(Inst, Values[Val]); return MCDisassembler_Success; } static DecodeStatus DecodeNegImmOperand(MCInst *Inst, unsigned Val, uint64_t Address, const void *Decoder) { MCOperand_CreateImm0(Inst, -(int64_t)Val); return MCDisassembler_Success; } static DecodeStatus Decode2OpInstruction(unsigned Insn, unsigned *Op1, unsigned *Op2) { unsigned Op1High, Op2High; unsigned Combined = fieldFromInstruction_4(Insn, 6, 5); if (Combined < 27) return MCDisassembler_Fail; if (fieldFromInstruction_4(Insn, 5, 1)) { if (Combined == 31) return MCDisassembler_Fail; Combined += 5; } Combined -= 27; Op1High = Combined % 3; Op2High = Combined / 3; *Op1 = (Op1High << 2) | fieldFromInstruction_4(Insn, 2, 2); *Op2 = (Op2High << 2) | fieldFromInstruction_4(Insn, 0, 2); return MCDisassembler_Success; } static DecodeStatus Decode3OpInstruction(unsigned Insn, unsigned *Op1, unsigned *Op2, unsigned *Op3) { unsigned Op1High, Op2High, Op3High; unsigned Combined = fieldFromInstruction_4(Insn, 6, 5); if (Combined >= 27) return MCDisassembler_Fail; Op1High = Combined % 3; Op2High = (Combined / 3) % 3; Op3High = Combined / 9; *Op1 = (Op1High << 2) | fieldFromInstruction_4(Insn, 4, 2); *Op2 = (Op2High << 2) | fieldFromInstruction_4(Insn, 2, 2); *Op3 = (Op3High << 2) | fieldFromInstruction_4(Insn, 0, 2); return MCDisassembler_Success; } #define GET_INSTRINFO_ENUM #include "XCoreGenInstrInfo.inc" static DecodeStatus Decode2OpInstructionFail(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { // Try and decode as a 3R instruction. unsigned Opcode = fieldFromInstruction_4(Insn, 11, 5); switch (Opcode) { case 0x0: MCInst_setOpcode(Inst, XCore_STW_2rus); return Decode2RUSInstruction(Inst, Insn, Address, Decoder); case 0x1: MCInst_setOpcode(Inst, XCore_LDW_2rus); return Decode2RUSInstruction(Inst, Insn, Address, Decoder); case 0x2: MCInst_setOpcode(Inst, XCore_ADD_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x3: MCInst_setOpcode(Inst, XCore_SUB_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x4: MCInst_setOpcode(Inst, XCore_SHL_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x5: MCInst_setOpcode(Inst, XCore_SHR_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x6: MCInst_setOpcode(Inst, XCore_EQ_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x7: MCInst_setOpcode(Inst, XCore_AND_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x8: MCInst_setOpcode(Inst, XCore_OR_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x9: MCInst_setOpcode(Inst, XCore_LDW_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x10: MCInst_setOpcode(Inst, XCore_LD16S_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x11: MCInst_setOpcode(Inst, XCore_LD8U_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x12: MCInst_setOpcode(Inst, XCore_ADD_2rus); return Decode2RUSInstruction(Inst, Insn, Address, Decoder); case 0x13: MCInst_setOpcode(Inst, XCore_SUB_2rus); return Decode2RUSInstruction(Inst, Insn, Address, Decoder); case 0x14: MCInst_setOpcode(Inst, XCore_SHL_2rus); return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder); case 0x15: MCInst_setOpcode(Inst, XCore_SHR_2rus); return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder); case 0x16: MCInst_setOpcode(Inst, XCore_EQ_2rus); return Decode2RUSInstruction(Inst, Insn, Address, Decoder); case 0x17: MCInst_setOpcode(Inst, XCore_TSETR_3r); return Decode3RImmInstruction(Inst, Insn, Address, Decoder); case 0x18: MCInst_setOpcode(Inst, XCore_LSS_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); case 0x19: MCInst_setOpcode(Inst, XCore_LSU_3r); return Decode3RInstruction(Inst, Insn, Address, Decoder); } return MCDisassembler_Fail; } static DecodeStatus Decode2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op1, &Op2); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); return S; } static DecodeStatus Decode2RImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op1, &Op2); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); MCOperand_CreateImm0(Inst, Op1); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); return S; } static DecodeStatus DecodeR2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op2, &Op1); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); return S; } static DecodeStatus Decode2RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op1, &Op2); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); return S; } static DecodeStatus DecodeRUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op1, &Op2); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); MCOperand_CreateImm0(Inst, Op2); return S; } static DecodeStatus DecodeRUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op1, &Op2); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeBitpOperand(Inst, Op2, Address, Decoder); return S; } static DecodeStatus DecodeRUSSrcDstBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(Insn, &Op1, &Op2); if (S != MCDisassembler_Success) return Decode2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeBitpOperand(Inst, Op2, Address, Decoder); return S; } static DecodeStatus DecodeL2OpInstructionFail(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { // Try and decode as a L3R / L2RUS instruction. unsigned Opcode = fieldFromInstruction_4(Insn, 16, 4) | fieldFromInstruction_4(Insn, 27, 5) << 4; switch (Opcode) { case 0x0c: MCInst_setOpcode(Inst, XCore_STW_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x1c: MCInst_setOpcode(Inst, XCore_XOR_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x2c: MCInst_setOpcode(Inst, XCore_ASHR_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x3c: MCInst_setOpcode(Inst, XCore_LDAWF_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x4c: MCInst_setOpcode(Inst, XCore_LDAWB_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x5c: MCInst_setOpcode(Inst, XCore_LDA16F_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x6c: MCInst_setOpcode(Inst, XCore_LDA16B_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x7c: MCInst_setOpcode(Inst, XCore_MUL_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x8c: MCInst_setOpcode(Inst, XCore_DIVS_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x9c: MCInst_setOpcode(Inst, XCore_DIVU_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x10c: MCInst_setOpcode(Inst, XCore_ST16_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x11c: MCInst_setOpcode(Inst, XCore_ST8_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x12c: MCInst_setOpcode(Inst, XCore_ASHR_l2rus); return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder); case 0x12d: MCInst_setOpcode(Inst, XCore_OUTPW_l2rus); return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder); case 0x12e: MCInst_setOpcode(Inst, XCore_INPW_l2rus); return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder); case 0x13c: MCInst_setOpcode(Inst, XCore_LDAWF_l2rus); return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder); case 0x14c: MCInst_setOpcode(Inst, XCore_LDAWB_l2rus); return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder); case 0x15c: MCInst_setOpcode(Inst, XCore_CRC_l3r); return DecodeL3RSrcDstInstruction(Inst, Insn, Address, Decoder); case 0x18c: MCInst_setOpcode(Inst, XCore_REMS_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); case 0x19c: MCInst_setOpcode(Inst, XCore_REMU_l3r); return DecodeL3RInstruction(Inst, Insn, Address, Decoder); } return MCDisassembler_Fail; } static DecodeStatus DecodeL2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2); if (S != MCDisassembler_Success) return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); return S; } static DecodeStatus DecodeLR2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2; DecodeStatus S = Decode2OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2); if (S != MCDisassembler_Success) return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); return S; } static DecodeStatus Decode3RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(Insn, &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus Decode3RImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(Insn, &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { MCOperand_CreateImm0(Inst, Op1); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus Decode2RUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(Insn, &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); MCOperand_CreateImm0(Inst, Op3); } return S; } static DecodeStatus Decode2RUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(Insn, &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeBitpOperand(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus DecodeL3RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus DecodeL3RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus DecodeL2RUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); MCOperand_CreateImm0(Inst, Op3); } return S; } static DecodeStatus DecodeL2RUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeBitpOperand(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus DecodeL6RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3, Op4, Op5, Op6; DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S != MCDisassembler_Success) return S; S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 16, 16), &Op4, &Op5, &Op6); if (S != MCDisassembler_Success) return S; DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op6, Address, Decoder); return S; } static DecodeStatus DecodeL5RInstructionFail(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Opcode; // Try and decode as a L6R instruction. MCInst_clear(Inst); Opcode = fieldFromInstruction_4(Insn, 27, 5); switch (Opcode) { default: break; case 0x00: MCInst_setOpcode(Inst, XCore_LMUL_l6r); return DecodeL6RInstruction(Inst, Insn, Address, Decoder); } return MCDisassembler_Fail; } static DecodeStatus DecodeL5RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3, Op4, Op5; DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S != MCDisassembler_Success) return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder); S = Decode2OpInstruction(fieldFromInstruction_4(Insn, 16, 16), &Op4, &Op5); if (S != MCDisassembler_Success) return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder); return S; } static DecodeStatus DecodeL4RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; unsigned Op4 = fieldFromInstruction_4(Insn, 16, 4); DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); S = DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); } if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); } return S; } static DecodeStatus DecodeL4RSrcDstSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, const void *Decoder) { unsigned Op1, Op2, Op3; unsigned Op4 = fieldFromInstruction_4(Insn, 16, 4); DecodeStatus S = Decode3OpInstruction(fieldFromInstruction_4(Insn, 0, 16), &Op1, &Op2, &Op3); if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); S = DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); } if (S == MCDisassembler_Success) { DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder); } return S; } #define GET_SUBTARGETINFO_ENUM #include "XCoreGenInstrInfo.inc" bool XCore_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *MI, uint16_t *size, uint64_t address, void *info) { uint16_t insn16; uint32_t insn32; DecodeStatus Result; if (!readInstruction16(code, code_len, &insn16)) { return false; } if (MI->flat_insn->detail) { memset(MI->flat_insn->detail, 0, offsetof(cs_detail, xcore)+sizeof(cs_xcore)); } // Calling the auto-generated decoder function. Result = decodeInstruction_2(DecoderTable16, MI, insn16, address, info, 0); if (Result != MCDisassembler_Fail) { *size = 2; return true; } if (!readInstruction32(code, code_len, &insn32)) { return false; } // Calling the auto-generated decoder function. Result = decodeInstruction_4(DecoderTable32, MI, insn32, address, info, 0); if (Result != MCDisassembler_Fail) { *size = 4; return true; } return false; } void XCore_init(MCRegisterInfo *MRI) { /* InitMCRegisterInfo(XCoreRegDesc, 17, RA, PC, XCoreMCRegisterClasses, 2, XCoreRegUnitRoots, 16, XCoreRegDiffLists, XCoreRegStrings, XCoreSubRegIdxLists, 1, XCoreSubRegIdxRanges, XCoreRegEncodingTable); */ MCRegisterInfo_InitMCRegisterInfo(MRI, XCoreRegDesc, 17, 0, 0, XCoreMCRegisterClasses, 2, 0, 0, XCoreRegDiffLists, 0, XCoreSubRegIdxLists, 1, 0); } #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreDisassembler.h010066400017500001750000000006561363402546700217650ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_XCOREDISASSEMBLER_H #define CS_XCOREDISASSEMBLER_H #include "capstone/capstone.h" #include "../../MCRegisterInfo.h" #include "../../MCInst.h" void XCore_init(MCRegisterInfo *MRI); bool XCore_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreGenAsmWriter.inc010066400017500001750000000564061363402546700222450ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Assembly Writer Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include // debug #include /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) { static const uint32_t OpInfo[] = { 0U, // PHI 0U, // INLINEASM 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 665U, // DBG_VALUE 0U, // REG_SEQUENCE 0U, // COPY 658U, // BUNDLE 687U, // LIFETIME_START 645U, // LIFETIME_END 0U, // STACKMAP 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // STATEPOINT 0U, // FRAME_ALLOC 2250U, // ADD_2rus 2250U, // ADD_3r 10363U, // ADJCALLSTACKDOWN 10383U, // ADJCALLSTACKUP 2361840U, // ANDNOT_2r 2255U, // AND_3r 2404U, // ASHR_l2rus 2404U, // ASHR_l3r 10769U, // BAU_1r 2099777U, // BITREV_l2r 19161U, // BLACP_lu10 19161U, // BLACP_u10 10672U, // BLAT_lu6 10672U, // BLAT_u6 10425U, // BLA_1r 10510U, // BLRB_lu10 10510U, // BLRB_u10 10510U, // BLRF_lu10 10510U, // BLRF_u10 2099418U, // BRBF_lru6 2099418U, // BRBF_ru6 2099638U, // BRBT_lru6 2099638U, // BRBT_ru6 10774U, // BRBU_lu6 10774U, // BRBU_u6 2099418U, // BRFF_lru6 2099418U, // BRFF_ru6 2099638U, // BRFT_lru6 2099638U, // BRFT_ru6 10774U, // BRFU_lu6 10774U, // BRFU_u6 10791U, // BRU_1r 553511U, // BR_JT 815655U, // BR_JT32 2099768U, // BYTEREV_l2r 2132815U, // CHKCT_2r 2132815U, // CHKCT_rus 1163U, // CLRE_0R 19301U, // CLRPT_1R 10614U, // CLRSR_branch_lu6 10614U, // CLRSR_branch_u6 10614U, // CLRSR_lu6 10614U, // CLRSR_u6 2099807U, // CLZ_l2r 5247047U, // CRC8_l4r 17041459U, // CRC_l3r 1168U, // DCALL_0R 1200U, // DENTSP_0R 10488U, // DGETREG_1r 2474U, // DIVS_l3r 2610U, // DIVU_l3r 1207U, // DRESTSP_0R 1242U, // DRET_0R 10475U, // ECALLF_1r 10723U, // ECALLT_1r 19342U, // EDU_1r 6334686U, // EEF_2r 6334929U, // EET_2r 19351U, // EEU_1r 2099310U, // EH_RETURN 6334765U, // ENDIN_2r 10569U, // ENTSP_lu6 10569U, // ENTSP_u6 2400U, // EQ_2rus 2400U, // EQ_3r 10554U, // EXTDP_lu6 10554U, // EXTDP_u6 10585U, // EXTSP_lu6 10585U, // EXTSP_u6 10401U, // FRAME_TO_ARGS_OFFSET 19256U, // FREER_1r 1236U, // FREET_0R 6334676U, // GETD_l2r 1139U, // GETED_0R 1224U, // GETET_0R 1151U, // GETID_0R 1174U, // GETKEP_0R 1187U, // GETKSP_0R 6334772U, // GETN_l2r 51670U, // GETPS_l2r 2099588U, // GETR_rus 10252U, // GETSR_lu6 10252U, // GETSR_u6 6334968U, // GETST_2r 6334883U, // GETTS_2r 6334906U, // INCT_2r 62438U, // INITCP_2r 70630U, // INITDP_2r 78822U, // INITLR_l2r 87014U, // INITPC_2r 95206U, // INITSP_2r 8432212U, // INPW_l2rus 6596970U, // INSHR_2r 6334955U, // INT_2r 6334768U, // IN_2r 675U, // Int_MemBarrier 10528U, // KCALL_1r 10528U, // KCALL_lu6 10528U, // KCALL_u6 10568U, // KENTSP_lu6 10568U, // KENTSP_u6 10576U, // KRESTSP_lu6 10576U, // KRESTSP_u6 1247U, // KRET_0R 45093065U, // LADD_l5r 12585354U, // LD16S_3r 12585483U, // LD8U_3r 14682170U, // LDA16B_l3r 12585018U, // LDA16F_l3r 10241U, // LDAPB_lu10 10241U, // LDAPB_u10 10241U, // LDAPF_lu10 10241U, // LDAPF_lu10_ba 10241U, // LDAPF_u10 14682697U, // LDAWB_l2rus 14682697U, // LDAWB_l3r 19134U, // LDAWCP_lu6 19134U, // LDAWCP_u6 100937U, // LDAWDP_lru6 100937U, // LDAWDP_ru6 2099282U, // LDAWFI 12585545U, // LDAWF_l2rus 12585545U, // LDAWF_l3r 109129U, // LDAWSP_lru6 109129U, // LDAWSP_ru6 2099396U, // LDC_lru6 2099396U, // LDC_ru6 1105U, // LDET_0R 184551985U, // LDIVU_l5r 1075U, // LDSED_0R 1015U, // LDSPC_0R 1045U, // LDSSR_0R 117327U, // LDWCP_lru6 19148U, // LDWCP_lu10 117327U, // LDWCP_ru6 19148U, // LDWCP_u10 100943U, // LDWDP_lru6 100943U, // LDWDP_ru6 2099292U, // LDWFI 109135U, // LDWSP_lru6 109135U, // LDWSP_ru6 12585551U, // LDW_2rus 12585551U, // LDW_3r 268437799U, // LMUL_l6r 2462U, // LSS_3r 45093054U, // LSUB_l5r 2604U, // LSU_3r 452987281U, // MACCS_l4r 452987418U, // MACCU_l4r 19224U, // MJOIN_1r 2099463U, // MKMSK_2r 2099463U, // MKMSK_rus 19169U, // MSYNC_1r 2344U, // MUL_l3r 2099443U, // NEG 2099699U, // NOT 2418U, // OR_3r 2132826U, // OUTCT_2r 2132826U, // OUTCT_rus 78681013U, // OUTPW_l2rus 2136899U, // OUTSHR_2r 2132859U, // OUTT_2r 2132869U, // OUT_2r 6334721U, // PEEK_2r 2456U, // REMS_l3r 2593U, // REMU_l3r 10561U, // RETSP_lu6 10561U, // RETSP_u6 612U, // SELECT_CC 2132748U, // SETCLK_l2r 10264U, // SETCP_1r 2132728U, // SETC_l2r 2132728U, // SETC_lru6 2132728U, // SETC_ru6 10273U, // SETDP_1r 2132738U, // SETD_2r 125856U, // SETEV_1r 632U, // SETKEP_0R 2132771U, // SETN_l2r 2132716U, // SETPSC_2r 2132951U, // SETPS_l2r 2132848U, // SETPT_2r 2132939U, // SETRDY_l2r 10282U, // SETSP_1r 10621U, // SETSR_branch_lu6 10621U, // SETSR_branch_u6 10621U, // SETSR_lu6 10621U, // SETSR_u6 2132928U, // SETTW_l2r 125867U, // SETV_1r 2361855U, // SEXT_2r 2361855U, // SEXT_rus 2331U, // SHL_2rus 2331U, // SHL_3r 2405U, // SHR_2rus 2405U, // SHR_3r 1133U, // SSYNC_0r 12585025U, // ST16_l3r 12585037U, // ST8_l3r 1119U, // STET_0R 1090U, // STSED_0R 1030U, // STSPC_0R 1060U, // STSSR_0R 100954U, // STWDP_lru6 100954U, // STWDP_ru6 2099301U, // STWFI 109146U, // STWSP_lru6 109146U, // STWSP_ru6 12585562U, // STW_2rus 12585562U, // STW_l3r 2239U, // SUB_2rus 2239U, // SUB_3r 19245U, // SYNCR_1r 6334912U, // TESTCT_2r 6334738U, // TESTLCL_l2r 6334920U, // TESTWCT_2r 2100415U, // TSETMR_2r 138207U, // TSETR_3r 19438U, // TSTART_1R 10467U, // WAITEF_1R 10715U, // WAITET_1R 1252U, // WAITEU_0R 2417U, // XOR_l3r 2361861U, // ZEXT_2r 2361861U, // ZEXT_rus 0U }; static const char AsmStrs[] = { /* 0 */ 'l', 'd', 'a', 'p', 32, 'r', '1', '1', ',', 32, 0, /* 11 */ 'g', 'e', 't', 's', 'r', 32, 'r', '1', '1', ',', 32, 0, /* 23 */ 's', 'e', 't', 32, 'c', 'p', ',', 32, 0, /* 32 */ 's', 'e', 't', 32, 'd', 'p', ',', 32, 0, /* 41 */ 's', 'e', 't', 32, 's', 'p', ',', 32, 0, /* 50 */ 'c', 'r', 'c', '3', '2', 32, 0, /* 57 */ 'l', 'd', 'a', '1', '6', 32, 0, /* 64 */ 's', 't', '1', '6', 32, 0, /* 70 */ 'c', 'r', 'c', '8', 32, 0, /* 76 */ 's', 't', '8', 32, 0, /* 81 */ '#', 32, 'L', 'D', 'A', 'W', 'F', 'I', 32, 0, /* 91 */ '#', 32, 'L', 'D', 'W', 'F', 'I', 32, 0, /* 100 */ '#', 32, 'S', 'T', 'W', 'F', 'I', 32, 0, /* 109 */ '#', 32, 'E', 'H', '_', 'R', 'E', 'T', 'U', 'R', 'N', 32, 0, /* 122 */ '#', 32, 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 32, 0, /* 142 */ '#', 32, 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 32, 0, /* 160 */ '#', 32, 'F', 'R', 'A', 'M', 'E', '_', 'T', 'O', '_', 'A', 'R', 'G', 'S', '_', 'O', 'F', 'F', 'S', 'E', 'T', 32, 0, /* 184 */ 'b', 'l', 'a', 32, 0, /* 189 */ 'l', 's', 'u', 'b', 32, 0, /* 195 */ 'l', 'd', 'c', 32, 0, /* 200 */ 'l', 'a', 'd', 'd', 32, 0, /* 206 */ 'a', 'n', 'd', 32, 0, /* 211 */ 'g', 'e', 't', 'd', 32, 0, /* 217 */ 'b', 'f', 32, 0, /* 221 */ 'e', 'e', 'f', 32, 0, /* 226 */ 'w', 'a', 'i', 't', 'e', 'f', 32, 0, /* 234 */ 'e', 'c', 'a', 'l', 'l', 'f', 32, 0, /* 242 */ 'n', 'e', 'g', 32, 0, /* 247 */ 'd', 'g', 'e', 't', 'r', 'e', 'g', 32, 0, /* 256 */ 'p', 'e', 'e', 'k', 32, 0, /* 262 */ 'm', 'k', 'm', 's', 'k', 32, 0, /* 269 */ 'b', 'l', 32, 0, /* 273 */ 't', 'e', 's', 't', 'l', 'c', 'l', 32, 0, /* 282 */ 's', 'h', 'l', 32, 0, /* 287 */ 'k', 'c', 'a', 'l', 'l', 32, 0, /* 294 */ 'l', 'm', 'u', 'l', 32, 0, /* 300 */ 'e', 'n', 'd', 'i', 'n', 32, 0, /* 307 */ 'g', 'e', 't', 'n', 32, 0, /* 313 */ 'e', 'x', 't', 'd', 'p', 32, 0, /* 320 */ 'r', 'e', 't', 's', 'p', 32, 0, /* 327 */ 'k', 'e', 'n', 't', 's', 'p', 32, 0, /* 335 */ 'k', 'r', 'e', 's', 't', 's', 'p', 32, 0, /* 344 */ 'e', 'x', 't', 's', 'p', 32, 0, /* 351 */ 'e', 'q', 32, 0, /* 355 */ 'a', 's', 'h', 'r', 32, 0, /* 361 */ 'i', 'n', 's', 'h', 'r', 32, 0, /* 368 */ 'x', 'o', 'r', 32, 0, /* 373 */ 'c', 'l', 'r', 's', 'r', 32, 0, /* 380 */ 's', 'e', 't', 's', 'r', 32, 0, /* 387 */ 'g', 'e', 't', 'r', 32, 0, /* 393 */ 'l', 'd', '1', '6', 's', 32, 0, /* 400 */ 'm', 'a', 'c', 'c', 's', 32, 0, /* 407 */ 'r', 'e', 'm', 's', 32, 0, /* 413 */ 'l', 's', 's', 32, 0, /* 418 */ 'g', 'e', 't', 't', 's', 32, 0, /* 425 */ 'd', 'i', 'v', 's', 32, 0, /* 431 */ 'b', 'l', 'a', 't', 32, 0, /* 437 */ 'b', 't', 32, 0, /* 441 */ 'i', 'n', 'c', 't', 32, 0, /* 447 */ 't', 'e', 's', 't', 'c', 't', 32, 0, /* 455 */ 't', 'e', 's', 't', 'w', 'c', 't', 32, 0, /* 464 */ 'e', 'e', 't', 32, 0, /* 469 */ 'g', 'e', 't', 32, 0, /* 474 */ 'w', 'a', 'i', 't', 'e', 't', 32, 0, /* 482 */ 'e', 'c', 'a', 'l', 'l', 't', 32, 0, /* 490 */ 'i', 'n', 't', 32, 0, /* 495 */ 'a', 'n', 'd', 'n', 'o', 't', 32, 0, /* 503 */ 'g', 'e', 't', 's', 't', 32, 0, /* 510 */ 's', 'e', 'x', 't', 32, 0, /* 516 */ 'z', 'e', 'x', 't', 32, 0, /* 522 */ 'l', 'd', '8', 'u', 32, 0, /* 528 */ 'b', 'a', 'u', 32, 0, /* 533 */ 'b', 'u', 32, 0, /* 537 */ 'm', 'a', 'c', 'c', 'u', 32, 0, /* 544 */ 'r', 'e', 'm', 'u', 32, 0, /* 550 */ 'b', 'r', 'u', 32, 0, /* 555 */ 'l', 's', 'u', 32, 0, /* 560 */ 'l', 'd', 'i', 'v', 'u', 32, 0, /* 567 */ 'b', 'y', 't', 'e', 'r', 'e', 'v', 32, 0, /* 576 */ 'b', 'i', 't', 'r', 'e', 'v', 32, 0, /* 584 */ 'l', 'd', 'a', 'w', 32, 0, /* 590 */ 'l', 'd', 'w', 32, 0, /* 595 */ 'i', 'n', 'p', 'w', 32, 0, /* 601 */ 's', 't', 'w', 32, 0, /* 606 */ 'c', 'l', 'z', 32, 0, /* 611 */ '#', 32, 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', 32, 'P', 'S', 'E', 'U', 'D', 'O', '!', 0, /* 631 */ 's', 'e', 't', 32, 'k', 'e', 'p', ',', 32, 'r', '1', '1', 0, /* 644 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, /* 657 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, /* 664 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, /* 674 */ '#', 'M', 'E', 'M', 'B', 'A', 'R', 'R', 'I', 'E', 'R', 0, /* 686 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, /* 701 */ 'l', 'd', 'a', 'w', 32, 'r', '1', '1', ',', 32, 'c', 'p', '[', 0, /* 715 */ 'l', 'd', 'w', 32, 'r', '1', '1', ',', 32, 'c', 'p', '[', 0, /* 728 */ 'b', 'l', 'a', 32, 'c', 'p', '[', 0, /* 736 */ 'm', 's', 'y', 'n', 'c', 32, 'r', 'e', 's', '[', 0, /* 747 */ 's', 'e', 't', 'p', 's', 'c', 32, 'r', 'e', 's', '[', 0, /* 759 */ 's', 'e', 't', 'c', 32, 'r', 'e', 's', '[', 0, /* 769 */ 's', 'e', 't', 'd', 32, 'r', 'e', 's', '[', 0, /* 779 */ 's', 'e', 't', 'c', 'l', 'k', 32, 'r', 'e', 's', '[', 0, /* 791 */ 'm', 'j', 'o', 'i', 'n', 32, 'r', 'e', 's', '[', 0, /* 802 */ 's', 'e', 't', 'n', 32, 'r', 'e', 's', '[', 0, /* 812 */ 's', 'y', 'n', 'c', 'r', 32, 'r', 'e', 's', '[', 0, /* 823 */ 'f', 'r', 'e', 'e', 'r', 32, 'r', 'e', 's', '[', 0, /* 834 */ 'o', 'u', 't', 's', 'h', 'r', 32, 'r', 'e', 's', '[', 0, /* 846 */ 'c', 'h', 'k', 'c', 't', 32, 'r', 'e', 's', '[', 0, /* 857 */ 'o', 'u', 't', 'c', 't', 32, 'r', 'e', 's', '[', 0, /* 868 */ 'c', 'l', 'r', 'p', 't', 32, 'r', 'e', 's', '[', 0, /* 879 */ 's', 'e', 't', 'p', 't', 32, 'r', 'e', 's', '[', 0, /* 890 */ 'o', 'u', 't', 't', 32, 'r', 'e', 's', '[', 0, /* 900 */ 'o', 'u', 't', 32, 'r', 'e', 's', '[', 0, /* 909 */ 'e', 'd', 'u', 32, 'r', 'e', 's', '[', 0, /* 918 */ 'e', 'e', 'u', 32, 'r', 'e', 's', '[', 0, /* 927 */ 's', 'e', 't', 'e', 'v', 32, 'r', 'e', 's', '[', 0, /* 938 */ 's', 'e', 't', 'v', 32, 'r', 'e', 's', '[', 0, /* 948 */ 'o', 'u', 't', 'p', 'w', 32, 'r', 'e', 's', '[', 0, /* 959 */ 's', 'e', 't', 't', 'w', 32, 'r', 'e', 's', '[', 0, /* 970 */ 's', 'e', 't', 'r', 'd', 'y', 32, 'r', 'e', 's', '[', 0, /* 982 */ 's', 'e', 't', 32, 'p', 's', '[', 0, /* 990 */ 's', 'e', 't', 32, 't', '[', 0, /* 997 */ 'i', 'n', 'i', 't', 32, 't', '[', 0, /* 1005 */ 's', 't', 'a', 'r', 't', 32, 't', '[', 0, /* 1014 */ 'l', 'd', 'w', 32, 's', 'p', 'c', ',', 32, 's', 'p', '[', '1', ']', 0, /* 1029 */ 's', 't', 'w', 32, 's', 'p', 'c', ',', 32, 's', 'p', '[', '1', ']', 0, /* 1044 */ 'l', 'd', 'w', 32, 's', 's', 'r', ',', 32, 's', 'p', '[', '2', ']', 0, /* 1059 */ 's', 't', 'w', 32, 's', 's', 'r', ',', 32, 's', 'p', '[', '2', ']', 0, /* 1074 */ 'l', 'd', 'w', 32, 's', 'e', 'd', ',', 32, 's', 'p', '[', '3', ']', 0, /* 1089 */ 's', 't', 'w', 32, 's', 'e', 'd', ',', 32, 's', 'p', '[', '3', ']', 0, /* 1104 */ 'l', 'd', 'w', 32, 'e', 't', ',', 32, 's', 'p', '[', '4', ']', 0, /* 1118 */ 's', 't', 'w', 32, 'e', 't', ',', 32, 's', 'p', '[', '4', ']', 0, /* 1132 */ 's', 's', 'y', 'n', 'c', 0, /* 1138 */ 'g', 'e', 't', 32, 'r', '1', '1', ',', 32, 'e', 'd', 0, /* 1150 */ 'g', 'e', 't', 32, 'r', '1', '1', ',', 32, 'i', 'd', 0, /* 1162 */ 'c', 'l', 'r', 'e', 0, /* 1167 */ 'd', 'c', 'a', 'l', 'l', 0, /* 1173 */ 'g', 'e', 't', 32, 'r', '1', '1', ',', 32, 'k', 'e', 'p', 0, /* 1186 */ 'g', 'e', 't', 32, 'r', '1', '1', ',', 32, 'k', 's', 'p', 0, /* 1199 */ 'd', 'e', 'n', 't', 's', 'p', 0, /* 1206 */ 'd', 'r', 'e', 's', 't', 's', 'p', 0, /* 1214 */ 't', 's', 'e', 't', 'm', 'r', 32, 'r', 0, /* 1223 */ 'g', 'e', 't', 32, 'r', '1', '1', ',', 32, 'e', 't', 0, /* 1235 */ 'f', 'r', 'e', 'e', 't', 0, /* 1241 */ 'd', 'r', 'e', 't', 0, /* 1246 */ 'k', 'r', 'e', 't', 0, /* 1251 */ 'w', 'a', 'i', 't', 'e', 'u', 0, }; // Emit the opcode for the instruction. uint32_t Bits = OpInfo[MCInst_getOpcode(MI)]; // assert(Bits != 0 && "Cannot print this instruction."); #ifndef CAPSTONE_DIET SStream_concat0(O, AsmStrs+(Bits & 2047)-1); #endif if (strchr((const char *)AsmStrs+(Bits & 2047)-1, '[')) { set_mem_access(MI, true, 0); } // Fragment 0 encoded into 2 bits for 4 unique commands. //printf(">>%s\n", AsmStrs+(Bits & 2047)-1); //printf("Frag-0: %u\n", (Bits >> 11) & 3); switch ((Bits >> 11) & 3) { default: // unreachable. case 0: // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, CLRE_0R, DCALL_0R, DE... // already done. this means we have to extract details out ourself. XCore_insn_extract(MI, (const char *)AsmStrs+(Bits & 2047)-1); return; break; case 1: // ADD_2rus, ADD_3r, ADJCALLSTACKDOWN, ADJCALLSTACKUP, ANDNOT_2r, AND_3r,... printOperand(MI, 0, O); break; case 2: // BR_JT, BR_JT32, CRC8_l4r, INITCP_2r, INITDP_2r, INITLR_l2r, INITPC_2r,... printOperand(MI, 1, O); break; case 3: // OUTSHR_2r, TSETR_3r printOperand(MI, 2, O); break; } // Fragment 1 encoded into 5 bits for 17 unique commands. //printf("Frag-1: %u\n", (Bits >> 13) & 31); switch ((Bits >> 13) & 31) { default: // unreachable. case 0: // ADD_2rus, ADD_3r, ANDNOT_2r, AND_3r, ASHR_l2rus, ASHR_l3r, BITREV_l2r,... SStream_concat0(O, ", "); break; case 1: // ADJCALLSTACKDOWN, ADJCALLSTACKUP, BAU_1r, BLAT_lu6, BLAT_u6, BLA_1r, B... return; break; case 2: // BLACP_lu10, BLACP_u10, CLRPT_1R, EDU_1r, EEU_1r, FREER_1r, LDAWCP_lu6,... SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 3: // BR_JT, BR_JT32 SStream_concat0(O, "\n"); break; case 4: // CHKCT_2r, CHKCT_rus, OUTCT_2r, OUTCT_rus, OUTPW_l2rus, OUTSHR_2r, OUTT... SStream_concat0(O, "], "); set_mem_access(MI, false, 0); break; case 5: // EEF_2r, EET_2r, ENDIN_2r, GETD_l2r, GETN_l2r, GETST_2r, GETTS_2r, INCT... SStream_concat0(O, ", res["); set_mem_access(MI, true, 0); break; case 6: // GETPS_l2r SStream_concat0(O, ", ps["); set_mem_access(MI, true, 0); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 7: // INITCP_2r SStream_concat0(O, "]:cp, "); set_mem_access(MI, false, XCORE_REG_CP); printOperand(MI, 0, O); return; break; case 8: // INITDP_2r SStream_concat0(O, "]:dp, "); set_mem_access(MI, false, XCORE_REG_DP); printOperand(MI, 0, O); return; break; case 9: // INITLR_l2r SStream_concat0(O, "]:lr, "); set_mem_access(MI, false, XCORE_REG_LR); printOperand(MI, 0, O); return; break; case 10: // INITPC_2r SStream_concat0(O, "]:pc, "); set_mem_access(MI, false, XCORE_REG_PC); printOperand(MI, 0, O); return; break; case 11: // INITSP_2r SStream_concat0(O, "]:sp, "); set_mem_access(MI, false, XCORE_REG_SP); printOperand(MI, 0, O); return; break; case 12: // LDAWDP_lru6, LDAWDP_ru6, LDWDP_lru6, LDWDP_ru6, STWDP_lru6, STWDP_ru6 SStream_concat0(O, ", dp["); set_mem_access(MI, true, XCORE_REG_DP); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 13: // LDAWSP_lru6, LDAWSP_ru6, LDWSP_lru6, LDWSP_ru6, STWSP_lru6, STWSP_ru6 SStream_concat0(O, ", sp["); set_mem_access(MI, true, XCORE_REG_SP); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 14: // LDWCP_lru6, LDWCP_ru6 SStream_concat0(O, ", cp["); set_mem_access(MI, true, XCORE_REG_CP); printOperand(MI, 1, O); SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 15: // SETEV_1r, SETV_1r SStream_concat0(O, "], r11"); set_mem_access(MI, false, 0); return; break; case 16: // TSETR_3r SStream_concat0(O, "]:r"); set_mem_access(MI, false, 0); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; } // Fragment 2 encoded into 3 bits for 5 unique commands. //printf("Frag-2: %u\n", (Bits >> 18) & 7); switch ((Bits >> 18) & 7) { default: // unreachable. case 0: // ADD_2rus, ADD_3r, AND_3r, ASHR_l2rus, ASHR_l3r, BITREV_l2r, BRBF_lru6,... printOperand(MI, 1, O); break; case 1: // ANDNOT_2r, CRC_l3r, INSHR_2r, SEXT_2r, SEXT_rus, ZEXT_2r, ZEXT_rus printOperand(MI, 2, O); break; case 2: // BR_JT printInlineJT(MI, 0, O); return; break; case 3: // BR_JT32 printInlineJT32(MI, 0, O); return; break; case 4: // CRC8_l4r, LADD_l5r, LSUB_l5r, OUTPW_l2rus printOperand(MI, 0, O); SStream_concat0(O, ", "); break; } // Fragment 3 encoded into 3 bits for 8 unique commands. //printf("Frag-3: %u\n", (Bits >> 21) & 7); switch ((Bits >> 21) & 7) { default: // unreachable. case 0: // ADD_2rus, ADD_3r, AND_3r, ASHR_l2rus, ASHR_l3r, CRC_l3r, DIVS_l3r, DIV... SStream_concat0(O, ", "); break; case 1: // ANDNOT_2r, BITREV_l2r, BRBF_lru6, BRBF_ru6, BRBT_lru6, BRBT_ru6, BRFF_... return; break; case 2: // CRC8_l4r printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); return; break; case 3: // EEF_2r, EET_2r, ENDIN_2r, GETD_l2r, GETN_l2r, GETST_2r, GETTS_2r, INCT... SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 4: // INPW_l2rus SStream_concat0(O, "], "); set_mem_access(MI, false, 0); printOperand(MI, 2, O); return; break; case 5: // LADD_l5r, LSUB_l5r, OUTPW_l2rus printOperand(MI, 2, O); break; case 6: // LD16S_3r, LD8U_3r, LDA16F_l3r, LDAWF_l2rus, LDAWF_l3r, LDW_2rus, LDW_3... SStream_concat0(O, "["); set_mem_access(MI, true, 0xffff); printOperand(MI, 2, O); SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; case 7: // LDA16B_l3r, LDAWB_l2rus, LDAWB_l3r SStream_concat0(O, "[-"); set_mem_access(MI, true, -0xffff); printOperand(MI, 2, O); SStream_concat0(O, "]"); set_mem_access(MI, false, 0); return; break; } // Fragment 4 encoded into 3 bits for 5 unique commands. //printf("Frag-4: %u\n", (Bits >> 24) & 7); switch ((Bits >> 24) & 7) { default: // unreachable. case 0: // ADD_2rus, ADD_3r, AND_3r, ASHR_l2rus, ASHR_l3r, DIVS_l3r, DIVU_l3r, EQ... printOperand(MI, 2, O); break; case 1: // CRC_l3r printOperand(MI, 3, O); return; break; case 2: // LADD_l5r, LSUB_l5r SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); return; break; case 3: // LDIVU_l5r, MACCS_l4r, MACCU_l4r printOperand(MI, 4, O); SStream_concat0(O, ", "); break; case 4: // OUTPW_l2rus return; break; } // Fragment 5 encoded into 2 bits for 4 unique commands. //printf("Frag-5: %u\n", (Bits >> 27) & 3); switch ((Bits >> 27) & 3) { default: // unreachable. case 0: // ADD_2rus, ADD_3r, AND_3r, ASHR_l2rus, ASHR_l3r, DIVS_l3r, DIVU_l3r, EQ... return; break; case 1: // LDIVU_l5r printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 3, O); return; break; case 2: // LMUL_l6r SStream_concat0(O, ", "); printOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 4, O); SStream_concat0(O, ", "); printOperand(MI, 5, O); return; break; case 3: // MACCS_l4r, MACCU_l4r printOperand(MI, 5, O); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { // assert(RegNo && RegNo < 17 && "Invalid register number!"); #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ 'r', '1', '0', 0, /* 4 */ 'r', '0', 0, /* 7 */ 'r', '1', '1', 0, /* 11 */ 'r', '1', 0, /* 14 */ 'r', '2', 0, /* 17 */ 'r', '3', 0, /* 20 */ 'r', '4', 0, /* 23 */ 'r', '5', 0, /* 26 */ 'r', '6', 0, /* 29 */ 'r', '7', 0, /* 32 */ 'r', '8', 0, /* 35 */ 'r', '9', 0, /* 38 */ 'c', 'p', 0, /* 41 */ 'd', 'p', 0, /* 44 */ 's', 'p', 0, /* 47 */ 'l', 'r', 0, }; static const uint8_t RegAsmOffset[] = { 38, 41, 47, 44, 4, 11, 14, 17, 20, 23, 26, 29, 32, 35, 0, 7, }; //int i; //for (i = 0; i < sizeof(RegAsmOffset); i++) // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); //printf("*************************\n"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif } capstone-sys-0.11.0/capstone/arch/XCore/XCoreGenDisassemblerTables.inc010066400017500001750000001313461363402546700240750ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* * XCore Disassembler *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #include "../../MCInst.h" #include "../../LEB128.h" // Helper function for extracting fields from encoded instructions. #define FieldFromInstruction(fname, InsnType) \ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ { \ InsnType fieldMask; \ if (numBits == sizeof(InsnType)*8) \ fieldMask = (InsnType)(-1LL); \ else \ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ return (insn & fieldMask) >> startBit; \ } static const uint8_t DecoderTable16[] = { /* 0 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ... /* 3 */ MCD_OPC_FilterValue, 0, 108, 0, // Skip to: 115 /* 7 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ... /* 10 */ MCD_OPC_FilterValue, 236, 15, 4, 0, // Skip to: 19 /* 15 */ MCD_OPC_Decode, 243, 1, 0, // Opcode: WAITEU_0R /* 19 */ MCD_OPC_FilterValue, 237, 15, 3, 0, // Skip to: 27 /* 24 */ MCD_OPC_Decode, 59, 0, // Opcode: CLRE_0R /* 27 */ MCD_OPC_FilterValue, 238, 15, 4, 0, // Skip to: 36 /* 32 */ MCD_OPC_Decode, 218, 1, 0, // Opcode: SSYNC_0r /* 36 */ MCD_OPC_FilterValue, 239, 15, 3, 0, // Skip to: 44 /* 41 */ MCD_OPC_Decode, 93, 0, // Opcode: FREET_0R /* 44 */ MCD_OPC_FilterValue, 252, 15, 3, 0, // Skip to: 52 /* 49 */ MCD_OPC_Decode, 68, 0, // Opcode: DCALL_0R /* 52 */ MCD_OPC_FilterValue, 253, 15, 3, 0, // Skip to: 60 /* 57 */ MCD_OPC_Decode, 125, 0, // Opcode: KRET_0R /* 60 */ MCD_OPC_FilterValue, 254, 15, 3, 0, // Skip to: 68 /* 65 */ MCD_OPC_Decode, 74, 0, // Opcode: DRET_0R /* 68 */ MCD_OPC_FilterValue, 255, 15, 4, 0, // Skip to: 77 /* 73 */ MCD_OPC_Decode, 199, 1, 0, // Opcode: SETKEP_0R /* 77 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 80 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 87 /* 84 */ MCD_OPC_Decode, 77, 1, // Opcode: EDU_1r /* 87 */ MCD_OPC_FilterValue, 127, 3, 0, // Skip to: 94 /* 91 */ MCD_OPC_Decode, 80, 1, // Opcode: EEU_1r /* 94 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 97 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 104 /* 101 */ MCD_OPC_Decode, 111, 2, // Opcode: INITPC_2r /* 104 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 111 /* 108 */ MCD_OPC_Decode, 105, 2, // Opcode: GETST_2r /* 111 */ MCD_OPC_Decode, 230, 1, 3, // Opcode: STW_2rus /* 115 */ MCD_OPC_FilterValue, 1, 114, 0, // Skip to: 233 /* 119 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ... /* 122 */ MCD_OPC_FilterValue, 236, 15, 4, 0, // Skip to: 131 /* 127 */ MCD_OPC_Decode, 152, 1, 0, // Opcode: LDSPC_0R /* 131 */ MCD_OPC_FilterValue, 237, 15, 4, 0, // Skip to: 140 /* 136 */ MCD_OPC_Decode, 223, 1, 0, // Opcode: STSPC_0R /* 140 */ MCD_OPC_FilterValue, 238, 15, 4, 0, // Skip to: 149 /* 145 */ MCD_OPC_Decode, 153, 1, 0, // Opcode: LDSSR_0R /* 149 */ MCD_OPC_FilterValue, 239, 15, 4, 0, // Skip to: 158 /* 154 */ MCD_OPC_Decode, 224, 1, 0, // Opcode: STSSR_0R /* 158 */ MCD_OPC_FilterValue, 252, 15, 4, 0, // Skip to: 167 /* 163 */ MCD_OPC_Decode, 222, 1, 0, // Opcode: STSED_0R /* 167 */ MCD_OPC_FilterValue, 253, 15, 4, 0, // Skip to: 176 /* 172 */ MCD_OPC_Decode, 221, 1, 0, // Opcode: STET_0R /* 176 */ MCD_OPC_FilterValue, 254, 15, 3, 0, // Skip to: 184 /* 181 */ MCD_OPC_Decode, 95, 0, // Opcode: GETED_0R /* 184 */ MCD_OPC_FilterValue, 255, 15, 3, 0, // Skip to: 192 /* 189 */ MCD_OPC_Decode, 96, 0, // Opcode: GETET_0R /* 192 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 195 */ MCD_OPC_FilterValue, 126, 4, 0, // Skip to: 203 /* 199 */ MCD_OPC_Decode, 242, 1, 1, // Opcode: WAITET_1R /* 203 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 211 /* 207 */ MCD_OPC_Decode, 241, 1, 1, // Opcode: WAITEF_1R /* 211 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 214 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 221 /* 218 */ MCD_OPC_Decode, 109, 2, // Opcode: INITDP_2r /* 221 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 229 /* 225 */ MCD_OPC_Decode, 183, 1, 4, // Opcode: OUTT_2r /* 229 */ MCD_OPC_Decode, 163, 1, 3, // Opcode: LDW_2rus /* 233 */ MCD_OPC_FilterValue, 2, 100, 0, // Skip to: 337 /* 237 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ... /* 240 */ MCD_OPC_FilterValue, 236, 15, 3, 0, // Skip to: 248 /* 245 */ MCD_OPC_Decode, 69, 0, // Opcode: DENTSP_0R /* 248 */ MCD_OPC_FilterValue, 237, 15, 3, 0, // Skip to: 256 /* 253 */ MCD_OPC_Decode, 73, 0, // Opcode: DRESTSP_0R /* 256 */ MCD_OPC_FilterValue, 238, 15, 3, 0, // Skip to: 264 /* 261 */ MCD_OPC_Decode, 97, 0, // Opcode: GETID_0R /* 264 */ MCD_OPC_FilterValue, 239, 15, 3, 0, // Skip to: 272 /* 269 */ MCD_OPC_Decode, 98, 0, // Opcode: GETKEP_0R /* 272 */ MCD_OPC_FilterValue, 252, 15, 3, 0, // Skip to: 280 /* 277 */ MCD_OPC_Decode, 99, 0, // Opcode: GETKSP_0R /* 280 */ MCD_OPC_FilterValue, 253, 15, 4, 0, // Skip to: 289 /* 285 */ MCD_OPC_Decode, 151, 1, 0, // Opcode: LDSED_0R /* 289 */ MCD_OPC_FilterValue, 254, 15, 4, 0, // Skip to: 298 /* 294 */ MCD_OPC_Decode, 149, 1, 0, // Opcode: LDET_0R /* 298 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 301 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 308 /* 305 */ MCD_OPC_Decode, 92, 1, // Opcode: FREER_1r /* 308 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 316 /* 312 */ MCD_OPC_Decode, 171, 1, 1, // Opcode: MJOIN_1r /* 316 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 319 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 326 /* 323 */ MCD_OPC_Decode, 112, 2, // Opcode: INITSP_2r /* 326 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 334 /* 330 */ MCD_OPC_Decode, 197, 1, 4, // Opcode: SETD_2r /* 334 */ MCD_OPC_Decode, 23, 5, // Opcode: ADD_3r /* 337 */ MCD_OPC_FilterValue, 3, 41, 0, // Skip to: 382 /* 341 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 344 */ MCD_OPC_FilterValue, 126, 4, 0, // Skip to: 352 /* 348 */ MCD_OPC_Decode, 240, 1, 1, // Opcode: TSTART_1R /* 352 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 360 /* 356 */ MCD_OPC_Decode, 174, 1, 1, // Opcode: MSYNC_1r /* 360 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 363 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 370 /* 367 */ MCD_OPC_Decode, 108, 2, // Opcode: INITCP_2r /* 370 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 378 /* 374 */ MCD_OPC_Decode, 238, 1, 6, // Opcode: TSETMR_2r /* 378 */ MCD_OPC_Decode, 233, 1, 5, // Opcode: SUB_3r /* 382 */ MCD_OPC_FilterValue, 4, 30, 0, // Skip to: 416 /* 386 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 389 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 396 /* 393 */ MCD_OPC_Decode, 36, 1, // Opcode: BLA_1r /* 396 */ MCD_OPC_FilterValue, 127, 3, 0, // Skip to: 403 /* 400 */ MCD_OPC_Decode, 30, 1, // Opcode: BAU_1r /* 403 */ MCD_OPC_CheckField, 4, 1, 1, 3, 0, // Skip to: 412 /* 409 */ MCD_OPC_Decode, 79, 2, // Opcode: EET_2r /* 412 */ MCD_OPC_Decode, 215, 1, 5, // Opcode: SHL_3r /* 416 */ MCD_OPC_FilterValue, 5, 39, 0, // Skip to: 459 /* 420 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 423 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 430 /* 427 */ MCD_OPC_Decode, 53, 1, // Opcode: BRU_1r /* 430 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 438 /* 434 */ MCD_OPC_Decode, 205, 1, 1, // Opcode: SETSP_1r /* 438 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 441 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 448 /* 445 */ MCD_OPC_Decode, 26, 7, // Opcode: ANDNOT_2r /* 448 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 455 /* 452 */ MCD_OPC_Decode, 78, 2, // Opcode: EEF_2r /* 455 */ MCD_OPC_Decode, 217, 1, 5, // Opcode: SHR_3r /* 459 */ MCD_OPC_FilterValue, 6, 41, 0, // Skip to: 504 /* 463 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 466 */ MCD_OPC_FilterValue, 126, 4, 0, // Skip to: 474 /* 470 */ MCD_OPC_Decode, 196, 1, 1, // Opcode: SETDP_1r /* 474 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 482 /* 478 */ MCD_OPC_Decode, 192, 1, 1, // Opcode: SETCP_1r /* 482 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 485 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 493 /* 489 */ MCD_OPC_Decode, 212, 1, 7, // Opcode: SEXT_2r /* 493 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 501 /* 497 */ MCD_OPC_Decode, 213, 1, 8, // Opcode: SEXT_rus /* 501 */ MCD_OPC_Decode, 86, 5, // Opcode: EQ_3r /* 504 */ MCD_OPC_FilterValue, 7, 39, 0, // Skip to: 547 /* 508 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 511 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 518 /* 515 */ MCD_OPC_Decode, 70, 1, // Opcode: DGETREG_1r /* 518 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 526 /* 522 */ MCD_OPC_Decode, 198, 1, 1, // Opcode: SETEV_1r /* 526 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 529 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 536 /* 533 */ MCD_OPC_Decode, 106, 2, // Opcode: GETTS_2r /* 536 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 544 /* 540 */ MCD_OPC_Decode, 203, 1, 4, // Opcode: SETPT_2r /* 544 */ MCD_OPC_Decode, 27, 5, // Opcode: AND_3r /* 547 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 592 /* 551 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 554 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 561 /* 558 */ MCD_OPC_Decode, 118, 1, // Opcode: KCALL_1r /* 561 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 569 /* 565 */ MCD_OPC_Decode, 211, 1, 1, // Opcode: SETV_1r /* 569 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 572 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 580 /* 576 */ MCD_OPC_Decode, 245, 1, 7, // Opcode: ZEXT_2r /* 580 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 588 /* 584 */ MCD_OPC_Decode, 246, 1, 8, // Opcode: ZEXT_rus /* 588 */ MCD_OPC_Decode, 178, 1, 5, // Opcode: OR_3r /* 592 */ MCD_OPC_FilterValue, 9, 40, 0, // Skip to: 636 /* 596 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 599 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 606 /* 603 */ MCD_OPC_Decode, 75, 1, // Opcode: ECALLF_1r /* 606 */ MCD_OPC_FilterValue, 127, 3, 0, // Skip to: 613 /* 610 */ MCD_OPC_Decode, 76, 1, // Opcode: ECALLT_1r /* 613 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 616 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 624 /* 620 */ MCD_OPC_Decode, 179, 1, 2, // Opcode: OUTCT_2r /* 624 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 632 /* 628 */ MCD_OPC_Decode, 180, 1, 9, // Opcode: OUTCT_rus /* 632 */ MCD_OPC_Decode, 164, 1, 5, // Opcode: LDW_3r /* 636 */ MCD_OPC_FilterValue, 10, 19, 0, // Skip to: 659 /* 640 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 643 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 651 /* 647 */ MCD_OPC_Decode, 226, 1, 10, // Opcode: STWDP_ru6 /* 651 */ MCD_OPC_FilterValue, 1, 54, 2, // Skip to: 1221 /* 655 */ MCD_OPC_Decode, 229, 1, 10, // Opcode: STWSP_ru6 /* 659 */ MCD_OPC_FilterValue, 11, 19, 0, // Skip to: 682 /* 663 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 666 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 674 /* 670 */ MCD_OPC_Decode, 159, 1, 10, // Opcode: LDWDP_ru6 /* 674 */ MCD_OPC_FilterValue, 1, 31, 2, // Skip to: 1221 /* 678 */ MCD_OPC_Decode, 162, 1, 10, // Opcode: LDWSP_ru6 /* 682 */ MCD_OPC_FilterValue, 12, 19, 0, // Skip to: 705 /* 686 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 689 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 697 /* 693 */ MCD_OPC_Decode, 141, 1, 10, // Opcode: LDAWDP_ru6 /* 697 */ MCD_OPC_FilterValue, 1, 8, 2, // Skip to: 1221 /* 701 */ MCD_OPC_Decode, 146, 1, 10, // Opcode: LDAWSP_ru6 /* 705 */ MCD_OPC_FilterValue, 13, 19, 0, // Skip to: 728 /* 709 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 712 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 720 /* 716 */ MCD_OPC_Decode, 148, 1, 10, // Opcode: LDC_ru6 /* 720 */ MCD_OPC_FilterValue, 1, 241, 1, // Skip to: 1221 /* 724 */ MCD_OPC_Decode, 156, 1, 10, // Opcode: LDWCP_ru6 /* 728 */ MCD_OPC_FilterValue, 14, 80, 0, // Skip to: 812 /* 732 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 735 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 773 /* 739 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 742 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 749 /* 746 */ MCD_OPC_Decode, 52, 11, // Opcode: BRFU_u6 /* 749 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 756 /* 753 */ MCD_OPC_Decode, 35, 11, // Opcode: BLAT_u6 /* 756 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 763 /* 760 */ MCD_OPC_Decode, 88, 11, // Opcode: EXTDP_u6 /* 763 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 770 /* 767 */ MCD_OPC_Decode, 120, 11, // Opcode: KCALL_u6 /* 770 */ MCD_OPC_Decode, 50, 12, // Opcode: BRFT_ru6 /* 773 */ MCD_OPC_FilterValue, 1, 188, 1, // Skip to: 1221 /* 777 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 780 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 787 /* 784 */ MCD_OPC_Decode, 46, 13, // Opcode: BRBU_u6 /* 787 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 794 /* 791 */ MCD_OPC_Decode, 84, 11, // Opcode: ENTSP_u6 /* 794 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 801 /* 798 */ MCD_OPC_Decode, 90, 11, // Opcode: EXTSP_u6 /* 801 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 809 /* 805 */ MCD_OPC_Decode, 189, 1, 11, // Opcode: RETSP_u6 /* 809 */ MCD_OPC_Decode, 44, 14, // Opcode: BRBT_ru6 /* 812 */ MCD_OPC_FilterValue, 15, 67, 0, // Skip to: 883 /* 816 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 819 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 858 /* 823 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 826 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 833 /* 830 */ MCD_OPC_Decode, 64, 11, // Opcode: CLRSR_u6 /* 833 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 841 /* 837 */ MCD_OPC_Decode, 209, 1, 11, // Opcode: SETSR_u6 /* 841 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 848 /* 845 */ MCD_OPC_Decode, 122, 11, // Opcode: KENTSP_u6 /* 848 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 855 /* 852 */ MCD_OPC_Decode, 124, 11, // Opcode: KRESTSP_u6 /* 855 */ MCD_OPC_Decode, 48, 12, // Opcode: BRFF_ru6 /* 858 */ MCD_OPC_FilterValue, 1, 103, 1, // Skip to: 1221 /* 862 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ... /* 865 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 872 /* 869 */ MCD_OPC_Decode, 104, 11, // Opcode: GETSR_u6 /* 872 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 880 /* 876 */ MCD_OPC_Decode, 139, 1, 11, // Opcode: LDAWCP_u6 /* 880 */ MCD_OPC_Decode, 42, 14, // Opcode: BRBF_ru6 /* 883 */ MCD_OPC_FilterValue, 16, 38, 0, // Skip to: 925 /* 887 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ... /* 890 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 897 /* 894 */ MCD_OPC_Decode, 60, 1, // Opcode: CLRPT_1R /* 897 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 905 /* 901 */ MCD_OPC_Decode, 234, 1, 1, // Opcode: SYNCR_1r /* 905 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 908 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 915 /* 912 */ MCD_OPC_Decode, 102, 9, // Opcode: GETR_rus /* 915 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 922 /* 919 */ MCD_OPC_Decode, 107, 2, // Opcode: INCT_2r /* 922 */ MCD_OPC_Decode, 127, 5, // Opcode: LD16S_3r /* 925 */ MCD_OPC_FilterValue, 17, 22, 0, // Skip to: 951 /* 929 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 932 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 940 /* 936 */ MCD_OPC_Decode, 177, 1, 2, // Opcode: NOT /* 940 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 947 /* 944 */ MCD_OPC_Decode, 115, 2, // Opcode: INT_2r /* 947 */ MCD_OPC_Decode, 128, 1, 5, // Opcode: LD8U_3r /* 951 */ MCD_OPC_FilterValue, 18, 21, 0, // Skip to: 976 /* 955 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 958 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 966 /* 962 */ MCD_OPC_Decode, 176, 1, 2, // Opcode: NEG /* 966 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 973 /* 970 */ MCD_OPC_Decode, 82, 2, // Opcode: ENDIN_2r /* 973 */ MCD_OPC_Decode, 22, 3, // Opcode: ADD_2rus /* 976 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 984 /* 980 */ MCD_OPC_Decode, 232, 1, 3, // Opcode: SUB_2rus /* 984 */ MCD_OPC_FilterValue, 20, 23, 0, // Skip to: 1011 /* 988 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 991 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 999 /* 995 */ MCD_OPC_Decode, 172, 1, 2, // Opcode: MKMSK_2r /* 999 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1007 /* 1003 */ MCD_OPC_Decode, 173, 1, 15, // Opcode: MKMSK_rus /* 1007 */ MCD_OPC_Decode, 214, 1, 16, // Opcode: SHL_2rus /* 1011 */ MCD_OPC_FilterValue, 21, 23, 0, // Skip to: 1038 /* 1015 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1018 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1026 /* 1022 */ MCD_OPC_Decode, 184, 1, 4, // Opcode: OUT_2r /* 1026 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1034 /* 1030 */ MCD_OPC_Decode, 182, 1, 7, // Opcode: OUTSHR_2r /* 1034 */ MCD_OPC_Decode, 216, 1, 16, // Opcode: SHR_2rus /* 1038 */ MCD_OPC_FilterValue, 22, 20, 0, // Skip to: 1062 /* 1042 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1045 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1052 /* 1049 */ MCD_OPC_Decode, 116, 2, // Opcode: IN_2r /* 1052 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 1059 /* 1056 */ MCD_OPC_Decode, 114, 7, // Opcode: INSHR_2r /* 1059 */ MCD_OPC_Decode, 85, 3, // Opcode: EQ_2rus /* 1062 */ MCD_OPC_FilterValue, 23, 23, 0, // Skip to: 1089 /* 1066 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1069 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1077 /* 1073 */ MCD_OPC_Decode, 185, 1, 2, // Opcode: PEEK_2r /* 1077 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1085 /* 1081 */ MCD_OPC_Decode, 235, 1, 2, // Opcode: TESTCT_2r /* 1085 */ MCD_OPC_Decode, 239, 1, 17, // Opcode: TSETR_3r /* 1089 */ MCD_OPC_FilterValue, 24, 23, 0, // Skip to: 1116 /* 1093 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1096 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1104 /* 1100 */ MCD_OPC_Decode, 201, 1, 4, // Opcode: SETPSC_2r /* 1104 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1112 /* 1108 */ MCD_OPC_Decode, 237, 1, 2, // Opcode: TESTWCT_2r /* 1112 */ MCD_OPC_Decode, 166, 1, 5, // Opcode: LSS_3r /* 1116 */ MCD_OPC_FilterValue, 25, 21, 0, // Skip to: 1141 /* 1120 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 1123 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1130 /* 1127 */ MCD_OPC_Decode, 57, 2, // Opcode: CHKCT_2r /* 1130 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 1137 /* 1134 */ MCD_OPC_Decode, 58, 15, // Opcode: CHKCT_rus /* 1137 */ MCD_OPC_Decode, 168, 1, 5, // Opcode: LSU_3r /* 1141 */ MCD_OPC_FilterValue, 26, 17, 0, // Skip to: 1162 /* 1145 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 1148 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1155 /* 1152 */ MCD_OPC_Decode, 40, 18, // Opcode: BLRF_u10 /* 1155 */ MCD_OPC_FilterValue, 1, 62, 0, // Skip to: 1221 /* 1159 */ MCD_OPC_Decode, 38, 19, // Opcode: BLRB_u10 /* 1162 */ MCD_OPC_FilterValue, 27, 19, 0, // Skip to: 1185 /* 1166 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 1169 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1177 /* 1173 */ MCD_OPC_Decode, 135, 1, 18, // Opcode: LDAPF_u10 /* 1177 */ MCD_OPC_FilterValue, 1, 40, 0, // Skip to: 1221 /* 1181 */ MCD_OPC_Decode, 132, 1, 19, // Opcode: LDAPB_u10 /* 1185 */ MCD_OPC_FilterValue, 28, 18, 0, // Skip to: 1207 /* 1189 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ... /* 1192 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1199 /* 1196 */ MCD_OPC_Decode, 33, 18, // Opcode: BLACP_u10 /* 1199 */ MCD_OPC_FilterValue, 1, 18, 0, // Skip to: 1221 /* 1203 */ MCD_OPC_Decode, 157, 1, 18, // Opcode: LDWCP_u10 /* 1207 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 1221 /* 1211 */ MCD_OPC_CheckField, 10, 1, 0, 4, 0, // Skip to: 1221 /* 1217 */ MCD_OPC_Decode, 195, 1, 12, // Opcode: SETC_ru6 /* 1221 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTable32[] = { /* 0 */ MCD_OPC_ExtractField, 27, 5, // Inst{31-27} ... /* 3 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 96 /* 7 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ... /* 10 */ MCD_OPC_FilterValue, 31, 216, 3, // Skip to: 998 /* 14 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 17 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 31 /* 21 */ MCD_OPC_CheckField, 16, 11, 236, 15, 17, 0, // Skip to: 45 /* 28 */ MCD_OPC_Decode, 31, 20, // Opcode: BITREV_l2r /* 31 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 45 /* 35 */ MCD_OPC_CheckField, 16, 11, 236, 15, 3, 0, // Skip to: 45 /* 42 */ MCD_OPC_Decode, 56, 20, // Opcode: BYTEREV_l2r /* 45 */ MCD_OPC_CheckField, 16, 11, 236, 15, 4, 0, // Skip to: 56 /* 52 */ MCD_OPC_Decode, 231, 1, 21, // Opcode: STW_l3r /* 56 */ MCD_OPC_ExtractField, 20, 7, // Inst{26-20} ... /* 59 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 66 /* 63 */ MCD_OPC_Decode, 66, 22, // Opcode: CRC8_l4r /* 66 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 74 /* 70 */ MCD_OPC_Decode, 170, 1, 23, // Opcode: MACCU_l4r /* 74 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 77 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 85 /* 81 */ MCD_OPC_Decode, 150, 1, 24, // Opcode: LDIVU_l5r /* 85 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 92 /* 89 */ MCD_OPC_Decode, 126, 24, // Opcode: LADD_l5r /* 92 */ MCD_OPC_Decode, 165, 1, 25, // Opcode: LMUL_l6r /* 96 */ MCD_OPC_FilterValue, 1, 86, 0, // Skip to: 186 /* 100 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ... /* 103 */ MCD_OPC_FilterValue, 31, 123, 3, // Skip to: 998 /* 107 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ... /* 110 */ MCD_OPC_FilterValue, 0, 116, 3, // Skip to: 998 /* 114 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 117 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 136 /* 121 */ MCD_OPC_CheckField, 21, 6, 63, 29, 0, // Skip to: 156 /* 127 */ MCD_OPC_CheckField, 16, 4, 12, 23, 0, // Skip to: 156 /* 133 */ MCD_OPC_Decode, 65, 20, // Opcode: CLZ_l2r /* 136 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 156 /* 140 */ MCD_OPC_CheckField, 21, 6, 63, 10, 0, // Skip to: 156 /* 146 */ MCD_OPC_CheckField, 16, 4, 12, 4, 0, // Skip to: 156 /* 152 */ MCD_OPC_Decode, 191, 1, 26, // Opcode: SETCLK_l2r /* 156 */ MCD_OPC_CheckField, 21, 6, 63, 10, 0, // Skip to: 172 /* 162 */ MCD_OPC_CheckField, 16, 4, 12, 4, 0, // Skip to: 172 /* 168 */ MCD_OPC_Decode, 244, 1, 21, // Opcode: XOR_l3r /* 172 */ MCD_OPC_CheckField, 21, 6, 63, 4, 0, // Skip to: 182 /* 178 */ MCD_OPC_Decode, 169, 1, 23, // Opcode: MACCS_l4r /* 182 */ MCD_OPC_Decode, 167, 1, 24, // Opcode: LSUB_l5r /* 186 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 219 /* 190 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ... /* 193 */ MCD_OPC_FilterValue, 159, 251, 3, 31, 3, // Skip to: 998 /* 199 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 202 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 209 /* 206 */ MCD_OPC_Decode, 110, 20, // Opcode: INITLR_l2r /* 209 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 216 /* 213 */ MCD_OPC_Decode, 101, 20, // Opcode: GETPS_l2r /* 216 */ MCD_OPC_Decode, 29, 21, // Opcode: ASHR_l3r /* 219 */ MCD_OPC_FilterValue, 3, 31, 0, // Skip to: 254 /* 223 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ... /* 226 */ MCD_OPC_FilterValue, 159, 251, 3, 254, 2, // Skip to: 998 /* 232 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 235 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 243 /* 239 */ MCD_OPC_Decode, 202, 1, 26, // Opcode: SETPS_l2r /* 243 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 250 /* 247 */ MCD_OPC_Decode, 94, 20, // Opcode: GETD_l2r /* 250 */ MCD_OPC_Decode, 144, 1, 21, // Opcode: LDAWF_l3r /* 254 */ MCD_OPC_FilterValue, 4, 32, 0, // Skip to: 290 /* 258 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ... /* 261 */ MCD_OPC_FilterValue, 159, 251, 3, 219, 2, // Skip to: 998 /* 267 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 270 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 278 /* 274 */ MCD_OPC_Decode, 236, 1, 20, // Opcode: TESTLCL_l2r /* 278 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 286 /* 282 */ MCD_OPC_Decode, 210, 1, 26, // Opcode: SETTW_l2r /* 286 */ MCD_OPC_Decode, 137, 1, 21, // Opcode: LDAWB_l3r /* 290 */ MCD_OPC_FilterValue, 5, 32, 0, // Skip to: 326 /* 294 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ... /* 297 */ MCD_OPC_FilterValue, 159, 251, 3, 183, 2, // Skip to: 998 /* 303 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 306 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 314 /* 310 */ MCD_OPC_Decode, 204, 1, 26, // Opcode: SETRDY_l2r /* 314 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 322 /* 318 */ MCD_OPC_Decode, 193, 1, 20, // Opcode: SETC_l2r /* 322 */ MCD_OPC_Decode, 130, 1, 21, // Opcode: LDA16F_l3r /* 326 */ MCD_OPC_FilterValue, 6, 31, 0, // Skip to: 361 /* 330 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ... /* 333 */ MCD_OPC_FilterValue, 159, 251, 3, 147, 2, // Skip to: 998 /* 339 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ... /* 342 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 350 /* 346 */ MCD_OPC_Decode, 200, 1, 26, // Opcode: SETN_l2r /* 350 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 357 /* 354 */ MCD_OPC_Decode, 100, 20, // Opcode: GETN_l2r /* 357 */ MCD_OPC_Decode, 129, 1, 21, // Opcode: LDA16B_l3r /* 361 */ MCD_OPC_FilterValue, 7, 12, 0, // Skip to: 377 /* 365 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 113, 2, // Skip to: 998 /* 373 */ MCD_OPC_Decode, 175, 1, 21, // Opcode: MUL_l3r /* 377 */ MCD_OPC_FilterValue, 8, 11, 0, // Skip to: 392 /* 381 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 97, 2, // Skip to: 998 /* 389 */ MCD_OPC_Decode, 71, 21, // Opcode: DIVS_l3r /* 392 */ MCD_OPC_FilterValue, 9, 11, 0, // Skip to: 407 /* 396 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 82, 2, // Skip to: 998 /* 404 */ MCD_OPC_Decode, 72, 21, // Opcode: DIVU_l3r /* 407 */ MCD_OPC_FilterValue, 10, 31, 0, // Skip to: 442 /* 411 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 414 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 428 /* 418 */ MCD_OPC_CheckField, 10, 6, 60, 62, 2, // Skip to: 998 /* 424 */ MCD_OPC_Decode, 225, 1, 27, // Opcode: STWDP_lru6 /* 428 */ MCD_OPC_FilterValue, 1, 54, 2, // Skip to: 998 /* 432 */ MCD_OPC_CheckField, 10, 6, 60, 48, 2, // Skip to: 998 /* 438 */ MCD_OPC_Decode, 228, 1, 27, // Opcode: STWSP_lru6 /* 442 */ MCD_OPC_FilterValue, 11, 31, 0, // Skip to: 477 /* 446 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 449 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 463 /* 453 */ MCD_OPC_CheckField, 10, 6, 60, 27, 2, // Skip to: 998 /* 459 */ MCD_OPC_Decode, 158, 1, 27, // Opcode: LDWDP_lru6 /* 463 */ MCD_OPC_FilterValue, 1, 19, 2, // Skip to: 998 /* 467 */ MCD_OPC_CheckField, 10, 6, 60, 13, 2, // Skip to: 998 /* 473 */ MCD_OPC_Decode, 161, 1, 27, // Opcode: LDWSP_lru6 /* 477 */ MCD_OPC_FilterValue, 12, 31, 0, // Skip to: 512 /* 481 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 484 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 498 /* 488 */ MCD_OPC_CheckField, 10, 6, 60, 248, 1, // Skip to: 998 /* 494 */ MCD_OPC_Decode, 140, 1, 27, // Opcode: LDAWDP_lru6 /* 498 */ MCD_OPC_FilterValue, 1, 240, 1, // Skip to: 998 /* 502 */ MCD_OPC_CheckField, 10, 6, 60, 234, 1, // Skip to: 998 /* 508 */ MCD_OPC_Decode, 145, 1, 27, // Opcode: LDAWSP_lru6 /* 512 */ MCD_OPC_FilterValue, 13, 31, 0, // Skip to: 547 /* 516 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 519 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 533 /* 523 */ MCD_OPC_CheckField, 10, 6, 60, 213, 1, // Skip to: 998 /* 529 */ MCD_OPC_Decode, 147, 1, 27, // Opcode: LDC_lru6 /* 533 */ MCD_OPC_FilterValue, 1, 205, 1, // Skip to: 998 /* 537 */ MCD_OPC_CheckField, 10, 6, 60, 199, 1, // Skip to: 998 /* 543 */ MCD_OPC_Decode, 154, 1, 27, // Opcode: LDWCP_lru6 /* 547 */ MCD_OPC_FilterValue, 14, 94, 0, // Skip to: 645 /* 551 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 554 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 599 /* 558 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 561 */ MCD_OPC_FilterValue, 60, 177, 1, // Skip to: 998 /* 565 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 568 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 575 /* 572 */ MCD_OPC_Decode, 51, 28, // Opcode: BRFU_lu6 /* 575 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 582 /* 579 */ MCD_OPC_Decode, 34, 28, // Opcode: BLAT_lu6 /* 582 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 589 /* 586 */ MCD_OPC_Decode, 87, 28, // Opcode: EXTDP_lu6 /* 589 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 596 /* 593 */ MCD_OPC_Decode, 119, 28, // Opcode: KCALL_lu6 /* 596 */ MCD_OPC_Decode, 49, 29, // Opcode: BRFT_lru6 /* 599 */ MCD_OPC_FilterValue, 1, 139, 1, // Skip to: 998 /* 603 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 606 */ MCD_OPC_FilterValue, 60, 132, 1, // Skip to: 998 /* 610 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 613 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 620 /* 617 */ MCD_OPC_Decode, 45, 30, // Opcode: BRBU_lu6 /* 620 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 627 /* 624 */ MCD_OPC_Decode, 83, 28, // Opcode: ENTSP_lu6 /* 627 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 634 /* 631 */ MCD_OPC_Decode, 89, 28, // Opcode: EXTSP_lu6 /* 634 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 642 /* 638 */ MCD_OPC_Decode, 188, 1, 28, // Opcode: RETSP_lu6 /* 642 */ MCD_OPC_Decode, 43, 31, // Opcode: BRBT_lru6 /* 645 */ MCD_OPC_FilterValue, 15, 81, 0, // Skip to: 730 /* 649 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 652 */ MCD_OPC_FilterValue, 0, 42, 0, // Skip to: 698 /* 656 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 659 */ MCD_OPC_FilterValue, 60, 79, 1, // Skip to: 998 /* 663 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 666 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 673 /* 670 */ MCD_OPC_Decode, 63, 28, // Opcode: CLRSR_lu6 /* 673 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 681 /* 677 */ MCD_OPC_Decode, 208, 1, 28, // Opcode: SETSR_lu6 /* 681 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 688 /* 685 */ MCD_OPC_Decode, 121, 28, // Opcode: KENTSP_lu6 /* 688 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 695 /* 692 */ MCD_OPC_Decode, 123, 28, // Opcode: KRESTSP_lu6 /* 695 */ MCD_OPC_Decode, 47, 29, // Opcode: BRFF_lru6 /* 698 */ MCD_OPC_FilterValue, 1, 40, 1, // Skip to: 998 /* 702 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ... /* 705 */ MCD_OPC_FilterValue, 60, 33, 1, // Skip to: 998 /* 709 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ... /* 712 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 719 /* 716 */ MCD_OPC_Decode, 103, 28, // Opcode: GETSR_lu6 /* 719 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 727 /* 723 */ MCD_OPC_Decode, 138, 1, 28, // Opcode: LDAWCP_lu6 /* 727 */ MCD_OPC_Decode, 41, 31, // Opcode: BRBF_lru6 /* 730 */ MCD_OPC_FilterValue, 16, 12, 0, // Skip to: 746 /* 734 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 0, 1, // Skip to: 998 /* 742 */ MCD_OPC_Decode, 219, 1, 21, // Opcode: ST16_l3r /* 746 */ MCD_OPC_FilterValue, 17, 12, 0, // Skip to: 762 /* 750 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 240, 0, // Skip to: 998 /* 758 */ MCD_OPC_Decode, 220, 1, 21, // Opcode: ST8_l3r /* 762 */ MCD_OPC_FilterValue, 18, 31, 0, // Skip to: 797 /* 766 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ... /* 769 */ MCD_OPC_FilterValue, 159, 251, 3, 3, 0, // Skip to: 778 /* 775 */ MCD_OPC_Decode, 28, 32, // Opcode: ASHR_l2rus /* 778 */ MCD_OPC_FilterValue, 191, 251, 3, 4, 0, // Skip to: 788 /* 784 */ MCD_OPC_Decode, 181, 1, 32, // Opcode: OUTPW_l2rus /* 788 */ MCD_OPC_FilterValue, 223, 251, 3, 204, 0, // Skip to: 998 /* 794 */ MCD_OPC_Decode, 113, 32, // Opcode: INPW_l2rus /* 797 */ MCD_OPC_FilterValue, 19, 12, 0, // Skip to: 813 /* 801 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 189, 0, // Skip to: 998 /* 809 */ MCD_OPC_Decode, 143, 1, 33, // Opcode: LDAWF_l2rus /* 813 */ MCD_OPC_FilterValue, 20, 12, 0, // Skip to: 829 /* 817 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 173, 0, // Skip to: 998 /* 825 */ MCD_OPC_Decode, 136, 1, 33, // Opcode: LDAWB_l2rus /* 829 */ MCD_OPC_FilterValue, 21, 11, 0, // Skip to: 844 /* 833 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 157, 0, // Skip to: 998 /* 841 */ MCD_OPC_Decode, 67, 34, // Opcode: CRC_l3r /* 844 */ MCD_OPC_FilterValue, 24, 12, 0, // Skip to: 860 /* 848 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 142, 0, // Skip to: 998 /* 856 */ MCD_OPC_Decode, 186, 1, 21, // Opcode: REMS_l3r /* 860 */ MCD_OPC_FilterValue, 25, 12, 0, // Skip to: 876 /* 864 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 126, 0, // Skip to: 998 /* 872 */ MCD_OPC_Decode, 187, 1, 21, // Opcode: REMU_l3r /* 876 */ MCD_OPC_FilterValue, 26, 29, 0, // Skip to: 909 /* 880 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 883 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 896 /* 887 */ MCD_OPC_CheckField, 10, 6, 60, 105, 0, // Skip to: 998 /* 893 */ MCD_OPC_Decode, 39, 35, // Opcode: BLRF_lu10 /* 896 */ MCD_OPC_FilterValue, 1, 98, 0, // Skip to: 998 /* 900 */ MCD_OPC_CheckField, 10, 6, 60, 92, 0, // Skip to: 998 /* 906 */ MCD_OPC_Decode, 37, 36, // Opcode: BLRB_lu10 /* 909 */ MCD_OPC_FilterValue, 27, 31, 0, // Skip to: 944 /* 913 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 916 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 930 /* 920 */ MCD_OPC_CheckField, 10, 6, 60, 72, 0, // Skip to: 998 /* 926 */ MCD_OPC_Decode, 133, 1, 35, // Opcode: LDAPF_lu10 /* 930 */ MCD_OPC_FilterValue, 1, 64, 0, // Skip to: 998 /* 934 */ MCD_OPC_CheckField, 10, 6, 60, 58, 0, // Skip to: 998 /* 940 */ MCD_OPC_Decode, 131, 1, 36, // Opcode: LDAPB_lu10 /* 944 */ MCD_OPC_FilterValue, 28, 30, 0, // Skip to: 978 /* 948 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ... /* 951 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 964 /* 955 */ MCD_OPC_CheckField, 10, 6, 60, 37, 0, // Skip to: 998 /* 961 */ MCD_OPC_Decode, 32, 35, // Opcode: BLACP_lu10 /* 964 */ MCD_OPC_FilterValue, 1, 30, 0, // Skip to: 998 /* 968 */ MCD_OPC_CheckField, 10, 6, 60, 24, 0, // Skip to: 998 /* 974 */ MCD_OPC_Decode, 155, 1, 35, // Opcode: LDWCP_lu10 /* 978 */ MCD_OPC_FilterValue, 29, 16, 0, // Skip to: 998 /* 982 */ MCD_OPC_CheckField, 26, 1, 0, 10, 0, // Skip to: 998 /* 988 */ MCD_OPC_CheckField, 10, 6, 60, 4, 0, // Skip to: 998 /* 994 */ MCD_OPC_Decode, 194, 1, 29, // Opcode: SETC_lru6 /* 998 */ MCD_OPC_Fail, 0 }; static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits) { return true; //llvm_unreachable("Invalid index!"); } #define DecodeToMCInst(fname,fieldname, InsnType) \ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ uint64_t Address, const void *Decoder) \ { \ InsnType tmp; \ switch (Idx) { \ default: \ case 0: \ return S; \ case 1: \ tmp = fieldname(insn, 0, 4); \ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 2: \ if (Decode2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 3: \ if (Decode2RUSInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 4: \ if (DecodeR2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 5: \ if (Decode3RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 6: \ if (Decode2RImmInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 7: \ if (Decode2RSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 8: \ if (DecodeRUSSrcDstBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 9: \ if (DecodeRUSInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 10: \ tmp = fieldname(insn, 6, 4); \ if (DecodeRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 11: \ tmp = fieldname(insn, 0, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 12: \ tmp = fieldname(insn, 6, 4); \ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 6); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 13: \ tmp = fieldname(insn, 0, 6); \ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 14: \ tmp = fieldname(insn, 6, 4); \ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = fieldname(insn, 0, 6); \ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 15: \ if (DecodeRUSBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 16: \ if (Decode2RUSBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 17: \ if (Decode3RImmInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 18: \ tmp = fieldname(insn, 0, 10); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 19: \ tmp = fieldname(insn, 0, 10); \ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 20: \ if (DecodeL2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 21: \ if (DecodeL3RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 22: \ if (DecodeL4RSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 23: \ if (DecodeL4RSrcDstSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 24: \ if (DecodeL5RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 25: \ if (DecodeL6RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 26: \ if (DecodeLR2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 27: \ tmp = fieldname(insn, 22, 4); \ if (DecodeRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 6); \ tmp |= (fieldname(insn, 16, 6) << 0); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 28: \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 6); \ tmp |= (fieldname(insn, 16, 6) << 0); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 29: \ tmp = fieldname(insn, 22, 4); \ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 6); \ tmp |= (fieldname(insn, 16, 6) << 0); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 30: \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 6); \ tmp |= (fieldname(insn, 16, 6) << 0); \ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 31: \ tmp = fieldname(insn, 22, 4); \ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 6); \ tmp |= (fieldname(insn, 16, 6) << 0); \ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 32: \ if (DecodeL2RUSBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 33: \ if (DecodeL2RUSInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 34: \ if (DecodeL3RSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ case 35: \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 10); \ tmp |= (fieldname(insn, 16, 10) << 0); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ case 36: \ tmp = 0; \ tmp |= (fieldname(insn, 0, 10) << 10); \ tmp |= (fieldname(insn, 16, 10) << 0); \ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \ return S; \ } \ } #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \ { \ uint64_t Bits = getFeatureBits(feature); \ const uint8_t *Ptr = DecodeTable; \ uint32_t CurFieldValue = 0, ExpectedValue; \ DecodeStatus S = MCDisassembler_Success; \ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \ InsnType Val, FieldValue, PositiveMask, NegativeMask; \ bool Pred, Fail; \ for (;;) { \ switch (*Ptr) { \ default: \ return MCDisassembler_Fail; \ case MCD_OPC_ExtractField: { \ Start = *++Ptr; \ Len = *++Ptr; \ ++Ptr; \ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \ break; \ } \ case MCD_OPC_FilterValue: { \ Val = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (Val != CurFieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckField: { \ Start = *++Ptr; \ Len = *++Ptr; \ FieldValue = fieldname(insn, Start, Len); \ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ if (ExpectedValue != FieldValue) \ Ptr += NumToSkip; \ break; \ } \ case MCD_OPC_CheckPredicate: { \ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NumToSkip = *Ptr++; \ NumToSkip |= (*Ptr++) << 8; \ Pred = checkDecoderPredicate(PIdx, Bits); \ if (!Pred) \ Ptr += NumToSkip; \ (void)Pred; \ break; \ } \ case MCD_OPC_Decode: { \ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ MCInst_setOpcode(MI, Opc); \ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \ } \ case MCD_OPC_SoftFail: { \ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \ Ptr += Len; \ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \ Ptr += Len; \ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \ if (Fail) \ S = MCDisassembler_SoftFail; \ break; \ } \ case MCD_OPC_Fail: { \ return MCDisassembler_Fail; \ } \ } \ } \ } FieldFromInstruction(fieldFromInstruction_2, uint16_t) DecodeToMCInst(decodeToMCInst_2, fieldFromInstruction_2, uint16_t) DecodeInstruction(decodeInstruction_2, fieldFromInstruction_2, decodeToMCInst_2, uint16_t) FieldFromInstruction(fieldFromInstruction_4, uint32_t) DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t) capstone-sys-0.11.0/capstone/arch/XCore/XCoreGenInstrInfo.inc010066400017500001750000000161371363402546700222400ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { XCore_PHI = 0, XCore_INLINEASM = 1, XCore_CFI_INSTRUCTION = 2, XCore_EH_LABEL = 3, XCore_GC_LABEL = 4, XCore_KILL = 5, XCore_EXTRACT_SUBREG = 6, XCore_INSERT_SUBREG = 7, XCore_IMPLICIT_DEF = 8, XCore_SUBREG_TO_REG = 9, XCore_COPY_TO_REGCLASS = 10, XCore_DBG_VALUE = 11, XCore_REG_SEQUENCE = 12, XCore_COPY = 13, XCore_BUNDLE = 14, XCore_LIFETIME_START = 15, XCore_LIFETIME_END = 16, XCore_STACKMAP = 17, XCore_PATCHPOINT = 18, XCore_LOAD_STACK_GUARD = 19, XCore_STATEPOINT = 20, XCore_FRAME_ALLOC = 21, XCore_ADD_2rus = 22, XCore_ADD_3r = 23, XCore_ADJCALLSTACKDOWN = 24, XCore_ADJCALLSTACKUP = 25, XCore_ANDNOT_2r = 26, XCore_AND_3r = 27, XCore_ASHR_l2rus = 28, XCore_ASHR_l3r = 29, XCore_BAU_1r = 30, XCore_BITREV_l2r = 31, XCore_BLACP_lu10 = 32, XCore_BLACP_u10 = 33, XCore_BLAT_lu6 = 34, XCore_BLAT_u6 = 35, XCore_BLA_1r = 36, XCore_BLRB_lu10 = 37, XCore_BLRB_u10 = 38, XCore_BLRF_lu10 = 39, XCore_BLRF_u10 = 40, XCore_BRBF_lru6 = 41, XCore_BRBF_ru6 = 42, XCore_BRBT_lru6 = 43, XCore_BRBT_ru6 = 44, XCore_BRBU_lu6 = 45, XCore_BRBU_u6 = 46, XCore_BRFF_lru6 = 47, XCore_BRFF_ru6 = 48, XCore_BRFT_lru6 = 49, XCore_BRFT_ru6 = 50, XCore_BRFU_lu6 = 51, XCore_BRFU_u6 = 52, XCore_BRU_1r = 53, XCore_BR_JT = 54, XCore_BR_JT32 = 55, XCore_BYTEREV_l2r = 56, XCore_CHKCT_2r = 57, XCore_CHKCT_rus = 58, XCore_CLRE_0R = 59, XCore_CLRPT_1R = 60, XCore_CLRSR_branch_lu6 = 61, XCore_CLRSR_branch_u6 = 62, XCore_CLRSR_lu6 = 63, XCore_CLRSR_u6 = 64, XCore_CLZ_l2r = 65, XCore_CRC8_l4r = 66, XCore_CRC_l3r = 67, XCore_DCALL_0R = 68, XCore_DENTSP_0R = 69, XCore_DGETREG_1r = 70, XCore_DIVS_l3r = 71, XCore_DIVU_l3r = 72, XCore_DRESTSP_0R = 73, XCore_DRET_0R = 74, XCore_ECALLF_1r = 75, XCore_ECALLT_1r = 76, XCore_EDU_1r = 77, XCore_EEF_2r = 78, XCore_EET_2r = 79, XCore_EEU_1r = 80, XCore_EH_RETURN = 81, XCore_ENDIN_2r = 82, XCore_ENTSP_lu6 = 83, XCore_ENTSP_u6 = 84, XCore_EQ_2rus = 85, XCore_EQ_3r = 86, XCore_EXTDP_lu6 = 87, XCore_EXTDP_u6 = 88, XCore_EXTSP_lu6 = 89, XCore_EXTSP_u6 = 90, XCore_FRAME_TO_ARGS_OFFSET = 91, XCore_FREER_1r = 92, XCore_FREET_0R = 93, XCore_GETD_l2r = 94, XCore_GETED_0R = 95, XCore_GETET_0R = 96, XCore_GETID_0R = 97, XCore_GETKEP_0R = 98, XCore_GETKSP_0R = 99, XCore_GETN_l2r = 100, XCore_GETPS_l2r = 101, XCore_GETR_rus = 102, XCore_GETSR_lu6 = 103, XCore_GETSR_u6 = 104, XCore_GETST_2r = 105, XCore_GETTS_2r = 106, XCore_INCT_2r = 107, XCore_INITCP_2r = 108, XCore_INITDP_2r = 109, XCore_INITLR_l2r = 110, XCore_INITPC_2r = 111, XCore_INITSP_2r = 112, XCore_INPW_l2rus = 113, XCore_INSHR_2r = 114, XCore_INT_2r = 115, XCore_IN_2r = 116, XCore_Int_MemBarrier = 117, XCore_KCALL_1r = 118, XCore_KCALL_lu6 = 119, XCore_KCALL_u6 = 120, XCore_KENTSP_lu6 = 121, XCore_KENTSP_u6 = 122, XCore_KRESTSP_lu6 = 123, XCore_KRESTSP_u6 = 124, XCore_KRET_0R = 125, XCore_LADD_l5r = 126, XCore_LD16S_3r = 127, XCore_LD8U_3r = 128, XCore_LDA16B_l3r = 129, XCore_LDA16F_l3r = 130, XCore_LDAPB_lu10 = 131, XCore_LDAPB_u10 = 132, XCore_LDAPF_lu10 = 133, XCore_LDAPF_lu10_ba = 134, XCore_LDAPF_u10 = 135, XCore_LDAWB_l2rus = 136, XCore_LDAWB_l3r = 137, XCore_LDAWCP_lu6 = 138, XCore_LDAWCP_u6 = 139, XCore_LDAWDP_lru6 = 140, XCore_LDAWDP_ru6 = 141, XCore_LDAWFI = 142, XCore_LDAWF_l2rus = 143, XCore_LDAWF_l3r = 144, XCore_LDAWSP_lru6 = 145, XCore_LDAWSP_ru6 = 146, XCore_LDC_lru6 = 147, XCore_LDC_ru6 = 148, XCore_LDET_0R = 149, XCore_LDIVU_l5r = 150, XCore_LDSED_0R = 151, XCore_LDSPC_0R = 152, XCore_LDSSR_0R = 153, XCore_LDWCP_lru6 = 154, XCore_LDWCP_lu10 = 155, XCore_LDWCP_ru6 = 156, XCore_LDWCP_u10 = 157, XCore_LDWDP_lru6 = 158, XCore_LDWDP_ru6 = 159, XCore_LDWFI = 160, XCore_LDWSP_lru6 = 161, XCore_LDWSP_ru6 = 162, XCore_LDW_2rus = 163, XCore_LDW_3r = 164, XCore_LMUL_l6r = 165, XCore_LSS_3r = 166, XCore_LSUB_l5r = 167, XCore_LSU_3r = 168, XCore_MACCS_l4r = 169, XCore_MACCU_l4r = 170, XCore_MJOIN_1r = 171, XCore_MKMSK_2r = 172, XCore_MKMSK_rus = 173, XCore_MSYNC_1r = 174, XCore_MUL_l3r = 175, XCore_NEG = 176, XCore_NOT = 177, XCore_OR_3r = 178, XCore_OUTCT_2r = 179, XCore_OUTCT_rus = 180, XCore_OUTPW_l2rus = 181, XCore_OUTSHR_2r = 182, XCore_OUTT_2r = 183, XCore_OUT_2r = 184, XCore_PEEK_2r = 185, XCore_REMS_l3r = 186, XCore_REMU_l3r = 187, XCore_RETSP_lu6 = 188, XCore_RETSP_u6 = 189, XCore_SELECT_CC = 190, XCore_SETCLK_l2r = 191, XCore_SETCP_1r = 192, XCore_SETC_l2r = 193, XCore_SETC_lru6 = 194, XCore_SETC_ru6 = 195, XCore_SETDP_1r = 196, XCore_SETD_2r = 197, XCore_SETEV_1r = 198, XCore_SETKEP_0R = 199, XCore_SETN_l2r = 200, XCore_SETPSC_2r = 201, XCore_SETPS_l2r = 202, XCore_SETPT_2r = 203, XCore_SETRDY_l2r = 204, XCore_SETSP_1r = 205, XCore_SETSR_branch_lu6 = 206, XCore_SETSR_branch_u6 = 207, XCore_SETSR_lu6 = 208, XCore_SETSR_u6 = 209, XCore_SETTW_l2r = 210, XCore_SETV_1r = 211, XCore_SEXT_2r = 212, XCore_SEXT_rus = 213, XCore_SHL_2rus = 214, XCore_SHL_3r = 215, XCore_SHR_2rus = 216, XCore_SHR_3r = 217, XCore_SSYNC_0r = 218, XCore_ST16_l3r = 219, XCore_ST8_l3r = 220, XCore_STET_0R = 221, XCore_STSED_0R = 222, XCore_STSPC_0R = 223, XCore_STSSR_0R = 224, XCore_STWDP_lru6 = 225, XCore_STWDP_ru6 = 226, XCore_STWFI = 227, XCore_STWSP_lru6 = 228, XCore_STWSP_ru6 = 229, XCore_STW_2rus = 230, XCore_STW_l3r = 231, XCore_SUB_2rus = 232, XCore_SUB_3r = 233, XCore_SYNCR_1r = 234, XCore_TESTCT_2r = 235, XCore_TESTLCL_l2r = 236, XCore_TESTWCT_2r = 237, XCore_TSETMR_2r = 238, XCore_TSETR_3r = 239, XCore_TSTART_1R = 240, XCore_WAITEF_1R = 241, XCore_WAITET_1R = 242, XCore_WAITEU_0R = 243, XCore_XOR_l3r = 244, XCore_ZEXT_2r = 245, XCore_ZEXT_rus = 246, XCore_INSTRUCTION_LIST_END = 247 }; #endif // GET_INSTRINFO_ENUM capstone-sys-0.11.0/capstone/arch/XCore/XCoreGenRegisterInfo.inc010066400017500001750000000063101363402546700227150ustar0000000000000000/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM enum { XCore_NoRegister, XCore_CP = 1, XCore_DP = 2, XCore_LR = 3, XCore_SP = 4, XCore_R0 = 5, XCore_R1 = 6, XCore_R2 = 7, XCore_R3 = 8, XCore_R4 = 9, XCore_R5 = 10, XCore_R6 = 11, XCore_R7 = 12, XCore_R8 = 13, XCore_R9 = 14, XCore_R10 = 15, XCore_R11 = 16, XCore_NUM_TARGET_REGS // 17 }; // Register classes enum { XCore_RRegsRegClassID = 0, XCore_GRRegsRegClassID = 1 }; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC static const MCPhysReg XCoreRegDiffLists[] = { /* 0 */ 65535, 0, }; static const uint16_t XCoreSubRegIdxLists[] = { /* 0 */ 0, }; static MCRegisterDesc XCoreRegDesc[] = { // Descriptors { 3, 0, 0, 0, 0, 0 }, { 38, 1, 1, 0, 1, 0 }, { 41, 1, 1, 0, 1, 0 }, { 47, 1, 1, 0, 1, 0 }, { 44, 1, 1, 0, 1, 0 }, { 4, 1, 1, 0, 1, 0 }, { 11, 1, 1, 0, 1, 0 }, { 14, 1, 1, 0, 1, 0 }, { 17, 1, 1, 0, 1, 0 }, { 20, 1, 1, 0, 1, 0 }, { 23, 1, 1, 0, 1, 0 }, { 26, 1, 1, 0, 1, 0 }, { 29, 1, 1, 0, 1, 0 }, { 32, 1, 1, 0, 1, 0 }, { 35, 1, 1, 0, 1, 0 }, { 0, 1, 1, 0, 1, 0 }, { 7, 1, 1, 0, 1, 0 }, }; // RRegs Register Class... static const MCPhysReg RRegs[] = { XCore_R0, XCore_R1, XCore_R2, XCore_R3, XCore_R4, XCore_R5, XCore_R6, XCore_R7, XCore_R8, XCore_R9, XCore_R10, XCore_R11, XCore_CP, XCore_DP, XCore_SP, XCore_LR, }; // RRegs Bit set. static const uint8_t RRegsBits[] = { 0xfe, 0xff, 0x01, }; // GRRegs Register Class... static const MCPhysReg GRRegs[] = { XCore_R0, XCore_R1, XCore_R2, XCore_R3, XCore_R4, XCore_R5, XCore_R6, XCore_R7, XCore_R8, XCore_R9, XCore_R10, XCore_R11, }; // GRRegs Bit set. static const uint8_t GRRegsBits[] = { 0xe0, 0xff, 0x01, }; static MCRegisterClass XCoreMCRegisterClasses[] = { { RRegs, RRegsBits, 1, 16, sizeof(RRegsBits), XCore_RRegsRegClassID, 4, 4, 1, 0 }, { GRRegs, GRRegsBits, 0, 12, sizeof(GRRegsBits), XCore_GRRegsRegClassID, 4, 4, 1, 1 }, }; #endif // GET_REGINFO_MC_DESC capstone-sys-0.11.0/capstone/arch/XCore/XCoreInstPrinter.c010066400017500001750000000175061363402546700216260ustar0000000000000000//===-- XCoreInstPrinter.cpp - Convert XCore MCInst to assembly syntax --------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This class prints an XCore MCInst to a .s file. // //===----------------------------------------------------------------------===// /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_XCORE #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable : 4996) // disable MSVC's warning on strcpy() #pragma warning(disable : 28719) // disable MSVC's warning on strcpy() #endif #include #include #include #include #include "XCoreInstPrinter.h" #include "../../MCInst.h" #include "../../utils.h" #include "../../SStream.h" #include "../../MCRegisterInfo.h" #include "../../MathExtras.h" #include "XCoreMapping.h" static const char *getRegisterName(unsigned RegNo); void XCore_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) { /* if (((cs_struct *)ud)->detail != CS_OPT_ON) return; */ } // stw sed, sp[3] void XCore_insn_extract(MCInst *MI, const char *code) { int id; char *p, *p2; char tmp[128]; strcpy(tmp, code); // safe because code is way shorter than 128 bytes // find the first space p = strchr(tmp, ' '); if (p) { p++; // find the next ',' p2 = strchr(p, ','); if (p2) { *p2 = '\0'; id = XCore_reg_id(p); if (id) { // register if (MI->csh->detail) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; MI->flat_insn->detail->xcore.op_count++; } } // next should be register, or memory? // skip space p2++; while(*p2 && *p2 == ' ') p2++; if (*p2) { // find '[' p = p2; while(*p && *p != '[') p++; if (*p) { // this is '[' *p = '\0'; id = XCore_reg_id(p2); if (id) { // base register if (MI->csh->detail) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_MEM; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)id; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = XCORE_REG_INVALID; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; } p++; p2 = p; // until ']' while(*p && *p != ']') p++; if (*p) { *p = '\0'; // p2 is either index, or disp id = XCore_reg_id(p2); if (id) { // index register if (MI->csh->detail) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = (uint8_t)id; } } else { // a number means disp if (MI->csh->detail) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = atoi(p2); } } } if (MI->csh->detail) { MI->flat_insn->detail->xcore.op_count++; } } } else { // a register? id = XCore_reg_id(p2); if (id) { // register if (MI->csh->detail) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; MI->flat_insn->detail->xcore.op_count++; } } } } } else { id = XCore_reg_id(p); if (id) { // register if (MI->csh->detail) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; MI->flat_insn->detail->xcore.op_count++; } } } } } static void set_mem_access(MCInst *MI, bool status, int reg) { if (MI->csh->detail != CS_OPT_ON) return; MI->csh->doing_mem = status; if (status) { if (reg != 0xffff && reg != -0xffff) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_MEM; if (reg) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)reg; } else { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = XCORE_REG_INVALID; } MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = XCORE_REG_INVALID; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; } else { // the last op should be the memory base MI->flat_insn->detail->xcore.op_count--; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_MEM; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = XCORE_REG_INVALID; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; if (reg > 0) MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; else MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = -1; } } else { if (reg) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = (uint8_t)reg; // done, create the next operand slot MI->flat_insn->detail->xcore.op_count++; } } } static void _printOperand(MCInst *MI, MCOperand *MO, SStream *O) { if (MCOperand_isReg(MO)) { unsigned reg; reg = MCOperand_getReg(MO); SStream_concat0(O, getRegisterName(reg)); if (MI->csh->detail) { if (MI->csh->doing_mem) { if (MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base == ARM_REG_INVALID) MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)reg; else MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = (uint8_t)reg; } else { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; MI->flat_insn->detail->xcore.op_count++; } } } else if (MCOperand_isImm(MO)) { int32_t Imm = (int32_t)MCOperand_getImm(MO); printInt32(O, Imm); if (MI->csh->detail) { if (MI->csh->doing_mem) { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = Imm; } else { MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_IMM; MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].imm = Imm; MI->flat_insn->detail->xcore.op_count++; } } } } static void printOperand(MCInst *MI, int OpNum, SStream *O) { if (OpNum >= MI->size) return; _printOperand(MI, MCInst_getOperand(MI, OpNum), O); } static void printInlineJT(MCInst *MI, int OpNum, SStream *O) { } static void printInlineJT32(MCInst *MI, int OpNum, SStream *O) { } #define PRINT_ALIAS_INSTR #include "XCoreGenAsmWriter.inc" void XCore_printInst(MCInst *MI, SStream *O, void *Info) { printInstruction(MI, O, Info); set_mem_access(MI, false, 0); } #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreInstPrinter.h010066400017500001750000000007441363402546700216270ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_XCOREINSTPRINTER_H #define CS_XCOREINSTPRINTER_H #include "../../MCInst.h" #include "../../MCRegisterInfo.h" #include "../../SStream.h" void XCore_printInst(MCInst *MI, SStream *O, void *Info); void XCore_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); // extract details from assembly code @code void XCore_insn_extract(MCInst *MI, const char *code); #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreMapping.c010066400017500001750000000161301363402546700207300ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_XCORE #include // debug #include #include "../../utils.h" #include "XCoreMapping.h" #define GET_INSTRINFO_ENUM #include "XCoreGenInstrInfo.inc" static const name_map reg_name_maps[] = { { XCORE_REG_INVALID, NULL }, { XCORE_REG_CP, "cp" }, { XCORE_REG_DP, "dp" }, { XCORE_REG_LR, "lr" }, { XCORE_REG_SP, "sp" }, { XCORE_REG_R0, "r0" }, { XCORE_REG_R1, "r1" }, { XCORE_REG_R2, "r2" }, { XCORE_REG_R3, "r3" }, { XCORE_REG_R4, "r4" }, { XCORE_REG_R5, "r5" }, { XCORE_REG_R6, "r6" }, { XCORE_REG_R7, "r7" }, { XCORE_REG_R8, "r8" }, { XCORE_REG_R9, "r9" }, { XCORE_REG_R10, "r10" }, { XCORE_REG_R11, "r11" }, // pseudo registers { XCORE_REG_PC, "pc" }, { XCORE_REG_SCP, "scp" }, { XCORE_REG_SSR, "ssr" }, { XCORE_REG_ET, "et" }, { XCORE_REG_ED, "ed" }, { XCORE_REG_SED, "sed" }, { XCORE_REG_KEP, "kep" }, { XCORE_REG_KSP, "ksp" }, { XCORE_REG_ID, "id" }, }; const char *XCore_reg_name(csh handle, unsigned int reg) { #ifndef CAPSTONE_DIET if (reg >= ARR_SIZE(reg_name_maps)) return NULL; return reg_name_maps[reg].name; #else return NULL; #endif } xcore_reg XCore_reg_id(char *name) { int i; for(i = 1; i < ARR_SIZE(reg_name_maps); i++) { if (!strcmp(name, reg_name_maps[i].name)) return reg_name_maps[i].id; } // not found return 0; } static const insn_map insns[] = { // dummy item { 0, 0, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, #include "XCoreMappingInsn.inc" }; // given internal insn id, return public instruction info void XCore_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) { unsigned short i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); if (i != 0) { insn->id = insns[i].mapid; if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); if (insns[i].branch || insns[i].indirect_branch) { // this insn also belongs to JUMP group. add JUMP group insn->detail->groups[insn->detail->groups_count] = XCORE_GRP_JUMP; insn->detail->groups_count++; } #endif } } } #ifndef CAPSTONE_DIET static const name_map insn_name_maps[] = { { XCORE_INS_INVALID, NULL }, { XCORE_INS_ADD, "add" }, { XCORE_INS_ANDNOT, "andnot" }, { XCORE_INS_AND, "and" }, { XCORE_INS_ASHR, "ashr" }, { XCORE_INS_BAU, "bau" }, { XCORE_INS_BITREV, "bitrev" }, { XCORE_INS_BLA, "bla" }, { XCORE_INS_BLAT, "blat" }, { XCORE_INS_BL, "bl" }, { XCORE_INS_BF, "bf" }, { XCORE_INS_BT, "bt" }, { XCORE_INS_BU, "bu" }, { XCORE_INS_BRU, "bru" }, { XCORE_INS_BYTEREV, "byterev" }, { XCORE_INS_CHKCT, "chkct" }, { XCORE_INS_CLRE, "clre" }, { XCORE_INS_CLRPT, "clrpt" }, { XCORE_INS_CLRSR, "clrsr" }, { XCORE_INS_CLZ, "clz" }, { XCORE_INS_CRC8, "crc8" }, { XCORE_INS_CRC32, "crc32" }, { XCORE_INS_DCALL, "dcall" }, { XCORE_INS_DENTSP, "dentsp" }, { XCORE_INS_DGETREG, "dgetreg" }, { XCORE_INS_DIVS, "divs" }, { XCORE_INS_DIVU, "divu" }, { XCORE_INS_DRESTSP, "drestsp" }, { XCORE_INS_DRET, "dret" }, { XCORE_INS_ECALLF, "ecallf" }, { XCORE_INS_ECALLT, "ecallt" }, { XCORE_INS_EDU, "edu" }, { XCORE_INS_EEF, "eef" }, { XCORE_INS_EET, "eet" }, { XCORE_INS_EEU, "eeu" }, { XCORE_INS_ENDIN, "endin" }, { XCORE_INS_ENTSP, "entsp" }, { XCORE_INS_EQ, "eq" }, { XCORE_INS_EXTDP, "extdp" }, { XCORE_INS_EXTSP, "extsp" }, { XCORE_INS_FREER, "freer" }, { XCORE_INS_FREET, "freet" }, { XCORE_INS_GETD, "getd" }, { XCORE_INS_GET, "get" }, { XCORE_INS_GETN, "getn" }, { XCORE_INS_GETR, "getr" }, { XCORE_INS_GETSR, "getsr" }, { XCORE_INS_GETST, "getst" }, { XCORE_INS_GETTS, "getts" }, { XCORE_INS_INCT, "inct" }, { XCORE_INS_INIT, "init" }, { XCORE_INS_INPW, "inpw" }, { XCORE_INS_INSHR, "inshr" }, { XCORE_INS_INT, "int" }, { XCORE_INS_IN, "in" }, { XCORE_INS_KCALL, "kcall" }, { XCORE_INS_KENTSP, "kentsp" }, { XCORE_INS_KRESTSP, "krestsp" }, { XCORE_INS_KRET, "kret" }, { XCORE_INS_LADD, "ladd" }, { XCORE_INS_LD16S, "ld16s" }, { XCORE_INS_LD8U, "ld8u" }, { XCORE_INS_LDA16, "lda16" }, { XCORE_INS_LDAP, "ldap" }, { XCORE_INS_LDAW, "ldaw" }, { XCORE_INS_LDC, "ldc" }, { XCORE_INS_LDW, "ldw" }, { XCORE_INS_LDIVU, "ldivu" }, { XCORE_INS_LMUL, "lmul" }, { XCORE_INS_LSS, "lss" }, { XCORE_INS_LSUB, "lsub" }, { XCORE_INS_LSU, "lsu" }, { XCORE_INS_MACCS, "maccs" }, { XCORE_INS_MACCU, "maccu" }, { XCORE_INS_MJOIN, "mjoin" }, { XCORE_INS_MKMSK, "mkmsk" }, { XCORE_INS_MSYNC, "msync" }, { XCORE_INS_MUL, "mul" }, { XCORE_INS_NEG, "neg" }, { XCORE_INS_NOT, "not" }, { XCORE_INS_OR, "or" }, { XCORE_INS_OUTCT, "outct" }, { XCORE_INS_OUTPW, "outpw" }, { XCORE_INS_OUTSHR, "outshr" }, { XCORE_INS_OUTT, "outt" }, { XCORE_INS_OUT, "out" }, { XCORE_INS_PEEK, "peek" }, { XCORE_INS_REMS, "rems" }, { XCORE_INS_REMU, "remu" }, { XCORE_INS_RETSP, "retsp" }, { XCORE_INS_SETCLK, "setclk" }, { XCORE_INS_SET, "set" }, { XCORE_INS_SETC, "setc" }, { XCORE_INS_SETD, "setd" }, { XCORE_INS_SETEV, "setev" }, { XCORE_INS_SETN, "setn" }, { XCORE_INS_SETPSC, "setpsc" }, { XCORE_INS_SETPT, "setpt" }, { XCORE_INS_SETRDY, "setrdy" }, { XCORE_INS_SETSR, "setsr" }, { XCORE_INS_SETTW, "settw" }, { XCORE_INS_SETV, "setv" }, { XCORE_INS_SEXT, "sext" }, { XCORE_INS_SHL, "shl" }, { XCORE_INS_SHR, "shr" }, { XCORE_INS_SSYNC, "ssync" }, { XCORE_INS_ST16, "st16" }, { XCORE_INS_ST8, "st8" }, { XCORE_INS_STW, "stw" }, { XCORE_INS_SUB, "sub" }, { XCORE_INS_SYNCR, "syncr" }, { XCORE_INS_TESTCT, "testct" }, { XCORE_INS_TESTLCL, "testlcl" }, { XCORE_INS_TESTWCT, "testwct" }, { XCORE_INS_TSETMR, "tsetmr" }, { XCORE_INS_START, "start" }, { XCORE_INS_WAITEF, "waitef" }, { XCORE_INS_WAITET, "waitet" }, { XCORE_INS_WAITEU, "waiteu" }, { XCORE_INS_XOR, "xor" }, { XCORE_INS_ZEXT, "zext" }, }; // special alias insn static const name_map alias_insn_names[] = { { 0, NULL } }; #endif const char *XCore_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET unsigned int i; if (id >= XCORE_INS_ENDING) return NULL; // handle special alias first for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { if (alias_insn_names[i].id == id) return alias_insn_names[i].name; } return insn_name_maps[id].name; #else return NULL; #endif } #ifndef CAPSTONE_DIET static const name_map group_name_maps[] = { { XCORE_GRP_INVALID, NULL }, { XCORE_GRP_JUMP, "jump" }, }; #endif const char *XCore_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } // map internal raw register to 'public' register xcore_reg XCore_map_register(unsigned int r) { static const unsigned int map[] = { 0, }; if (r < ARR_SIZE(map)) return map[r]; // cannot find this register return 0; } #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreMapping.h010066400017500001750000000012741363402546700207400ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_XCORE_MAP_H #define CS_XCORE_MAP_H #include "capstone/capstone.h" // return name of regiser in friendly string const char *XCore_reg_name(csh handle, unsigned int reg); // given internal insn id, return public instruction info void XCore_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); const char *XCore_insn_name(csh handle, unsigned int id); const char *XCore_group_name(csh handle, unsigned int id); // map internal raw register to 'public' register xcore_reg XCore_map_register(unsigned int r); // map register name to register ID xcore_reg XCore_reg_id(char *name); #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreMappingInsn.inc010066400017500001750000000525561363402546700221230ustar0000000000000000// This is auto-gen data for Capstone engine (www.capstone-engine.org) // By Nguyen Anh Quynh { XCore_ADD_2rus, XCORE_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ADD_3r, XCORE_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ANDNOT_2r, XCORE_INS_ANDNOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_AND_3r, XCORE_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ASHR_l2rus, XCORE_INS_ASHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ASHR_l3r, XCORE_INS_ASHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_BAU_1r, XCORE_INS_BAU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_BITREV_l2r, XCORE_INS_BITREV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_BLACP_lu10, XCORE_INS_BLA, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BLACP_u10, XCORE_INS_BLA, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BLAT_lu6, XCORE_INS_BLAT, #ifndef CAPSTONE_DIET { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_BLAT_u6, XCORE_INS_BLAT, #ifndef CAPSTONE_DIET { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_BLA_1r, XCORE_INS_BLA, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BLRB_lu10, XCORE_INS_BL, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BLRB_u10, XCORE_INS_BL, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BLRF_lu10, XCORE_INS_BL, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BLRF_u10, XCORE_INS_BL, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0 #endif }, { XCore_BRBF_lru6, XCORE_INS_BF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRBF_ru6, XCORE_INS_BF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRBT_lru6, XCORE_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRBT_ru6, XCORE_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRBU_lu6, XCORE_INS_BU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRBU_u6, XCORE_INS_BU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRFF_lru6, XCORE_INS_BF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRFF_ru6, XCORE_INS_BF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRFT_lru6, XCORE_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRFT_ru6, XCORE_INS_BT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRFU_lu6, XCORE_INS_BU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRFU_u6, XCORE_INS_BU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 0 #endif }, { XCore_BRU_1r, XCORE_INS_BRU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_BYTEREV_l2r, XCORE_INS_BYTEREV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CHKCT_2r, XCORE_INS_CHKCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CHKCT_rus, XCORE_INS_CHKCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CLRE_0R, XCORE_INS_CLRE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CLRPT_1R, XCORE_INS_CLRPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CLRSR_branch_lu6, XCORE_INS_CLRSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_CLRSR_branch_u6, XCORE_INS_CLRSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_CLRSR_lu6, XCORE_INS_CLRSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CLRSR_u6, XCORE_INS_CLRSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CLZ_l2r, XCORE_INS_CLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CRC8_l4r, XCORE_INS_CRC8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_CRC_l3r, XCORE_INS_CRC32, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_DCALL_0R, XCORE_INS_DCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_DENTSP_0R, XCORE_INS_DENTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_DGETREG_1r, XCORE_INS_DGETREG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_DIVS_l3r, XCORE_INS_DIVS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_DIVU_l3r, XCORE_INS_DIVU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_DRESTSP_0R, XCORE_INS_DRESTSP, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_DRET_0R, XCORE_INS_DRET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ECALLF_1r, XCORE_INS_ECALLF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ECALLT_1r, XCORE_INS_ECALLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EDU_1r, XCORE_INS_EDU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EEF_2r, XCORE_INS_EEF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EET_2r, XCORE_INS_EET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EEU_1r, XCORE_INS_EEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ENDIN_2r, XCORE_INS_ENDIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ENTSP_lu6, XCORE_INS_ENTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_ENTSP_u6, XCORE_INS_ENTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_EQ_2rus, XCORE_INS_EQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EQ_3r, XCORE_INS_EQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EXTDP_lu6, XCORE_INS_EXTDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EXTDP_u6, XCORE_INS_EXTDP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_EXTSP_lu6, XCORE_INS_EXTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_EXTSP_u6, XCORE_INS_EXTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_FREER_1r, XCORE_INS_FREER, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_FREET_0R, XCORE_INS_FREET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_GETD_l2r, XCORE_INS_GETD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_GETED_0R, XCORE_INS_GET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETET_0R, XCORE_INS_GET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETID_0R, XCORE_INS_GET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETKEP_0R, XCORE_INS_GET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETKSP_0R, XCORE_INS_GET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETN_l2r, XCORE_INS_GETN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_GETPS_l2r, XCORE_INS_GET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_GETR_rus, XCORE_INS_GETR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_GETSR_lu6, XCORE_INS_GETSR, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETSR_u6, XCORE_INS_GETSR, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_GETST_2r, XCORE_INS_GETST, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_GETTS_2r, XCORE_INS_GETTS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INCT_2r, XCORE_INS_INCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INITCP_2r, XCORE_INS_INIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INITDP_2r, XCORE_INS_INIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INITLR_l2r, XCORE_INS_INIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INITPC_2r, XCORE_INS_INIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INITSP_2r, XCORE_INS_INIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INPW_l2rus, XCORE_INS_INPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INSHR_2r, XCORE_INS_INSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_INT_2r, XCORE_INS_INT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_IN_2r, XCORE_INS_IN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_KCALL_1r, XCORE_INS_KCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_KCALL_lu6, XCORE_INS_KCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_KCALL_u6, XCORE_INS_KCALL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_KENTSP_lu6, XCORE_INS_KENTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_KENTSP_u6, XCORE_INS_KENTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_KRESTSP_lu6, XCORE_INS_KRESTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_KRESTSP_u6, XCORE_INS_KRESTSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_KRET_0R, XCORE_INS_KRET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_LADD_l5r, XCORE_INS_LADD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LD16S_3r, XCORE_INS_LD16S, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LD8U_3r, XCORE_INS_LD8U, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDA16B_l3r, XCORE_INS_LDA16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDA16F_l3r, XCORE_INS_LDA16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAPB_lu10, XCORE_INS_LDAP, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAPB_u10, XCORE_INS_LDAP, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAPF_lu10, XCORE_INS_LDAP, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAPF_lu10_ba, XCORE_INS_LDAP, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAPF_u10, XCORE_INS_LDAP, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWB_l2rus, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWB_l3r, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWCP_lu6, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWCP_u6, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWDP_lru6, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWDP_ru6, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWF_l2rus, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWF_l3r, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWSP_lru6, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDAWSP_ru6, XCORE_INS_LDAW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDC_lru6, XCORE_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDC_ru6, XCORE_INS_LDC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDET_0R, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDIVU_l5r, XCORE_INS_LDIVU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDSED_0R, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDSPC_0R, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDSSR_0R, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWCP_lru6, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWCP_lu10, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWCP_ru6, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWCP_u10, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWDP_lru6, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWDP_ru6, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWSP_lru6, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDWSP_ru6, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDW_2rus, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LDW_3r, XCORE_INS_LDW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LMUL_l6r, XCORE_INS_LMUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LSS_3r, XCORE_INS_LSS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LSUB_l5r, XCORE_INS_LSUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_LSU_3r, XCORE_INS_LSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MACCS_l4r, XCORE_INS_MACCS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MACCU_l4r, XCORE_INS_MACCU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MJOIN_1r, XCORE_INS_MJOIN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MKMSK_2r, XCORE_INS_MKMSK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MKMSK_rus, XCORE_INS_MKMSK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MSYNC_1r, XCORE_INS_MSYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_MUL_l3r, XCORE_INS_MUL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_NEG, XCORE_INS_NEG, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_NOT, XCORE_INS_NOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OR_3r, XCORE_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OUTCT_2r, XCORE_INS_OUTCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OUTCT_rus, XCORE_INS_OUTCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OUTPW_l2rus, XCORE_INS_OUTPW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OUTSHR_2r, XCORE_INS_OUTSHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OUTT_2r, XCORE_INS_OUTT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_OUT_2r, XCORE_INS_OUT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_PEEK_2r, XCORE_INS_PEEK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_REMS_l3r, XCORE_INS_REMS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_REMU_l3r, XCORE_INS_REMU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_RETSP_lu6, XCORE_INS_RETSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_RETSP_u6, XCORE_INS_RETSP, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_SETCLK_l2r, XCORE_INS_SETCLK, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETCP_1r, XCORE_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETC_l2r, XCORE_INS_SETC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETC_lru6, XCORE_INS_SETC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETC_ru6, XCORE_INS_SETC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETDP_1r, XCORE_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETD_2r, XCORE_INS_SETD, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETEV_1r, XCORE_INS_SETEV, #ifndef CAPSTONE_DIET { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETKEP_0R, XCORE_INS_SET, #ifndef CAPSTONE_DIET { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETN_l2r, XCORE_INS_SETN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETPSC_2r, XCORE_INS_SETPSC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETPS_l2r, XCORE_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETPT_2r, XCORE_INS_SETPT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETRDY_l2r, XCORE_INS_SETRDY, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETSP_1r, XCORE_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0 #endif }, { XCore_SETSR_branch_lu6, XCORE_INS_SETSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_SETSR_branch_u6, XCORE_INS_SETSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_SETSR_lu6, XCORE_INS_SETSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETSR_u6, XCORE_INS_SETSR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETTW_l2r, XCORE_INS_SETTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SETV_1r, XCORE_INS_SETV, #ifndef CAPSTONE_DIET { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SEXT_2r, XCORE_INS_SEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SEXT_rus, XCORE_INS_SEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SHL_2rus, XCORE_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SHL_3r, XCORE_INS_SHL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SHR_2rus, XCORE_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SHR_3r, XCORE_INS_SHR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SSYNC_0r, XCORE_INS_SSYNC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ST16_l3r, XCORE_INS_ST16, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ST8_l3r, XCORE_INS_ST8, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STET_0R, XCORE_INS_STW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STSED_0R, XCORE_INS_STW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STSPC_0R, XCORE_INS_STW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STSSR_0R, XCORE_INS_STW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STWDP_lru6, XCORE_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STWDP_ru6, XCORE_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STWSP_lru6, XCORE_INS_STW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STWSP_ru6, XCORE_INS_STW, #ifndef CAPSTONE_DIET { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STW_2rus, XCORE_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_STW_l3r, XCORE_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SUB_2rus, XCORE_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SUB_3r, XCORE_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_SYNCR_1r, XCORE_INS_SYNCR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_TESTCT_2r, XCORE_INS_TESTCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_TESTLCL_l2r, XCORE_INS_TESTLCL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_TESTWCT_2r, XCORE_INS_TESTWCT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_TSETMR_2r, XCORE_INS_TSETMR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_TSETR_3r, XCORE_INS_SET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_TSTART_1R, XCORE_INS_START, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_WAITEF_1R, XCORE_INS_WAITEF, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_WAITET_1R, XCORE_INS_WAITET, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_WAITEU_0R, XCORE_INS_WAITEU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 1, 1 #endif }, { XCore_XOR_l3r, XCORE_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ZEXT_2r, XCORE_INS_ZEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, { XCore_ZEXT_rus, XCORE_INS_ZEXT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0 #endif }, capstone-sys-0.11.0/capstone/arch/XCore/XCoreModule.c010066400017500001750000000016711363402546700205660ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef CAPSTONE_HAS_XCORE #include "../../utils.h" #include "../../MCRegisterInfo.h" #include "XCoreDisassembler.h" #include "XCoreInstPrinter.h" #include "XCoreMapping.h" #include "XCoreModule.h" cs_err XCore_global_init(cs_struct *ud) { MCRegisterInfo *mri; mri = cs_mem_malloc(sizeof(*mri)); XCore_init(mri); ud->printer = XCore_printInst; ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = XCore_getInstruction; ud->post_printer = XCore_post_printer; ud->reg_name = XCore_reg_name; ud->insn_id = XCore_get_insn_id; ud->insn_name = XCore_insn_name; ud->group_name = XCore_group_name; return CS_ERR_OK; } cs_err XCore_option(cs_struct *handle, cs_opt_type type, size_t value) { // Do not set mode because only CS_MODE_BIG_ENDIAN is valid; we cannot // test for CS_MODE_LITTLE_ENDIAN because it is 0 return CS_ERR_OK; } #endif capstone-sys-0.11.0/capstone/arch/XCore/XCoreModule.h010066400017500001750000000004411363402546700205650ustar0000000000000000/* Capstone Disassembly Engine */ /* By Travis Finkenauer , 2018 */ #ifndef CS_XCORE_MODULE_H #define CS_XCORE_MODULE_H #include "../../utils.h" cs_err XCore_global_init(cs_struct *ud); cs_err XCore_option(cs_struct *handle, cs_opt_type type, size_t value); #endif capstone-sys-0.11.0/capstone/bindings/Makefile010066400017500001750000000050511363402546700175300ustar0000000000000000TMPDIR = /tmp/capstone_test DIFF = diff -u -w TEST = $(TMPDIR)/test TEST_ARM = $(TMPDIR)/test_arm TEST_ARM64 = $(TMPDIR)/test_arm64 TEST_M68K = $(TMPDIR)/test_m68k TEST_MIPS = $(TMPDIR)/test_mips TEST_PPC = $(TMPDIR)/test_ppc TEST_SPARC = $(TMPDIR)/test_sparc TEST_SYSZ = $(TMPDIR)/test_systemz TEST_X86 = $(TMPDIR)/test_x86 TEST_XCORE = $(TMPDIR)/test_xcore PYTHON2 = python .PHONY: all expected python java ocaml all: cd python && $(MAKE) gen_const cd java && $(MAKE) gen_const cd ocaml && $(MAKE) gen_const tests: expected python java #oclma ruby test_java: expected java test_python: expected python expected: cd ../tests && $(MAKE) mkdir -p $(TMPDIR) ../tests/test > $(TEST)_e ../tests/test_arm > $(TEST_ARM)_e ../tests/test_arm64 > $(TEST_ARM64)_e ../tests/test_m68k > $(TEST_M68K)_e ../tests/test_mips > $(TEST_MIPS)_e ../tests/test_ppc > $(TEST_PPC)_e ../tests/test_sparc > $(TEST_SPARC)_e ../tests/test_systemz > $(TEST_SYSZ)_e ../tests/test_x86 > $(TEST_X86)_e ../tests/test_xcore > $(TEST_XCORE)_e python: FORCE cd python && $(MAKE) $(PYTHON2) python/test.py > $(TEST)_o $(PYTHON2) python/test_arm.py > $(TEST_ARM)_o $(PYTHON2) python/test_arm64.py > $(TEST_ARM64)_o $(PYTHON2) python/test_m68k.py > $(TEST_M68K)_o $(PYTHON2) python/test_mips.py > $(TEST_MIPS)_o $(PYTHON2) python/test_ppc.py > $(TEST_PPC)_o $(PYTHON2) python/test_sparc.py > $(TEST_SPARC)_o $(PYTHON2) python/test_systemz.py > $(TEST_SYSZ)_o $(PYTHON2) python/test_x86.py > $(TEST_X86)_o $(PYTHON2) python/test_xcore.py > $(TEST_XCORE)_o $(MAKE) test_diff java: FORCE cd java && $(MAKE) cd java && ./run.sh > $(TEST)_o cd java && ./run.sh arm > $(TEST_ARM)_o cd java && ./run.sh arm64 > $(TEST_ARM64)_o cd java && ./run.sh mips > $(TEST_MIPS)_o cd java && ./run.sh ppc > $(TEST_PPC)_o cd java && ./run.sh sparc > $(TEST_SPARC)_o cd java && ./run.sh systemz > $(TEST_SYSZ)_o cd java && ./run.sh x86 > $(TEST_X86)_o cd java && ./run.sh xcore > $(TEST_XCORE)_o $(MAKE) test_diff ocaml: FORCE test_diff: FORCE $(DIFF) $(TEST)_e $(TEST)_o $(DIFF) $(TEST_ARM)_e $(TEST_ARM)_o $(DIFF) $(TEST_ARM64)_e $(TEST_ARM64)_o $(DIFF) $(TEST_M68K)_e $(TEST_M68K)_o $(DIFF) $(TEST_MIPS)_e $(TEST_MIPS)_o $(DIFF) $(TEST_PPC)_e $(TEST_PPC)_o $(DIFF) $(TEST_SPARC)_e $(TEST_SPARC)_o $(DIFF) $(TEST_SYSZ)_e $(TEST_SYSZ)_o $(DIFF) $(TEST_X86)_e $(TEST_X86)_o $(DIFF) $(TEST_XCORE)_e $(TEST_XCORE)_o clean: rm -rf $(TMPDIR) cd java && $(MAKE) clean cd python && $(MAKE) clean cd ocaml && $(MAKE) clean check: make -C ocaml check make -C python check make -C java check FORCE: capstone-sys-0.11.0/capstone/bindings/README010066400017500001750000000033121363403403300167330ustar0000000000000000This directory contains bindings & test code for Python, Java & OCaml. See /README for how to compile & install each binding. More bindings created & maintained by the community are available as followings. - Gapstone: Go binding (by Scott Knight). https://github.com/knightsc/gapstone - Crabstone: Ruby binding for Capstone 3+ (by david942j). https://github.com/david942j/crabstone - Crabstone: Ruby binding (by Ben Nagy). https://github.com/bnagy/crabstone - Capstone-Vala: Vala binding (by Pancake). https://github.com/radare/capstone-vala - Node-Capstone: NodeJS binding (by Jason Oster). https://github.com/parasyte/node-capstone - CCcapstone: C++ binding (by Peter Hlavaty). https://github.com/zer0mem/cccapstone - LuaCapstone: Lua binding (by Antonio Davide). https://github.com/Dax89/LuaCapstone - Capstone-RS: Rust binding (by Richo Healey). https://github.com/capstone-rust/capstone-rs - Capstone.NET: .NET framework binding (by Ahmed Garhy). https://github.com/9ee1/Capstone.NET - CapstoneJ: High level Java wrapper for Capstone-java (by Keve Müller). https://github.com/kevemueller/capstonej - Hapstone: Haskell binding (by ibabushkin) https://github.com/ibabushkin/hapstone - Emacs-capstone: Emacs (elisp) binding (by Bas Alberts) https://github.com/collarchoke/emacs-capstone - C# binding (by Matt Graeber). Note: this is only for Capstone v2.0. https://github.com/mattifestation/capstone - PowerShell binding (by Ruben Boonen). https://github.com/aquynh/capstone/tree/master/bindings/powershell - PHP binding (by Fadhil Mandaga). https://github.com/firodj/php-capstone - capstone-d: D binding (by Dimitri Bohlender) https://github.com/bohlender/capstone-d capstone-sys-0.11.0/capstone/bindings/const_generator.py010066400017500001750000000141201363402546700216330ustar0000000000000000# Capstone Disassembler Engine # By Dang Hoang Vu, 2013 from __future__ import print_function import sys, re INCL_DIR = '../include/capstone/' include = [ 'arm.h', 'arm64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h' ] template = { 'java': { 'header': "// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT\npackage capstone;\n\npublic class %s_const {\n", 'footer': "}", 'line_format': '\tpublic static final int %s = %s;\n', 'out_file': './java/capstone/%s_const.java', # prefixes for constant filenames of all archs - case sensitive 'arm.h': 'Arm', 'arm64.h': 'Arm64', 'm68k.h': 'M68k', 'mips.h': 'Mips', 'x86.h': 'X86', 'ppc.h': 'Ppc', 'sparc.h': 'Sparc', 'systemz.h': 'Sysz', 'xcore.h': 'Xcore', 'tms320c64x.h': 'TMS320C64x', 'm680x.h': 'M680x', 'evm.h': 'Evm', 'comment_open': '\t//', 'comment_close': '', }, 'python': { 'header': "# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.py]\n", 'footer': "", 'line_format': '%s = %s\n', 'out_file': './python/capstone/%s_const.py', # prefixes for constant filenames of all archs - case sensitive 'arm.h': 'arm', 'arm64.h': 'arm64', 'm68k.h': 'm68k', 'mips.h': 'mips', 'x86.h': 'x86', 'ppc.h': 'ppc', 'sparc.h': 'sparc', 'systemz.h': 'sysz', 'xcore.h': 'xcore', 'tms320c64x.h': 'tms320c64x', 'm680x.h': 'm680x', 'evm.h': 'evm', 'comment_open': '#', 'comment_close': '', }, 'ocaml': { 'header': "(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.ml] *)\n", 'footer': "", 'line_format': 'let _%s = %s;;\n', 'out_file': './ocaml/%s_const.ml', # prefixes for constant filenames of all archs - case sensitive 'arm.h': 'arm', 'arm64.h': 'arm64', 'mips.h': 'mips', 'm68k.h': 'm68k', 'x86.h': 'x86', 'ppc.h': 'ppc', 'sparc.h': 'sparc', 'systemz.h': 'sysz', 'xcore.h': 'xcore', 'tms320c64x.h': 'tms320c64x', 'm680x.h': 'm680x', 'evm.h': 'evm', 'comment_open': '(*', 'comment_close': ' *)', }, } # markup for comments to be added to autogen files MARKUP = '//>' def gen(lang): global include, INCL_DIR print('Generating bindings for', lang) templ = template[lang] print('Generating bindings for', lang) for target in include: prefix = templ[target] outfile = open(templ['out_file'] %(prefix), 'wb') # open as binary prevents windows newlines outfile.write((templ['header'] % (prefix)).encode("utf-8")) lines = open(INCL_DIR + target).readlines() count = 0 for line in lines: line = line.strip() if line.startswith(MARKUP): # markup for comments outfile.write(("\n%s%s%s\n" %(templ['comment_open'], \ line.replace(MARKUP, ''), \ templ['comment_close']) ).encode("utf-8")) continue if line == '' or line.startswith('//'): continue if line.startswith('#define '): line = line[8:] #cut off define xline = re.split('\s+', line, 1) #split to at most 2 express if len(xline) != 2: continue if '(' in xline[0] or ')' in xline[0]: #does it look like a function continue xline.insert(1, '=') # insert an = so the expression below can parse it line = ' '.join(xline) if not line.startswith(prefix.upper()): continue tmp = line.strip().split(',') for t in tmp: t = t.strip() if not t or t.startswith('//'): continue # hacky: remove type cast (uint64_t) t = t.replace('(uint64_t)', '') t = re.sub(r'\((\d+)ULL << (\d+)\)', r'\1 << \2', t) # (1ULL<<1) to 1 << 1 f = re.split('\s+', t) if f[0].startswith(prefix.upper()): if len(f) > 1 and f[1] not in ('//', '///<', '='): print("Error: Unable to convert %s" % f) continue elif len(f) > 1 and f[1] == '=': rhs = ''.join(f[2:]) else: rhs = str(count) count += 1 try: count = int(rhs) + 1 if (count == 1): outfile.write(("\n").encode("utf-8")) except ValueError: if lang == 'ocaml': # ocaml uses lsl for '<<', lor for '|' rhs = rhs.replace('<<', ' lsl ') rhs = rhs.replace('|', ' lor ') # ocaml variable has _ as prefix if rhs[0].isalpha(): rhs = '_' + rhs outfile.write((templ['line_format'] %(f[0].strip(), rhs)).encode("utf-8")) outfile.write((templ['footer']).encode("utf-8")) outfile.close() def main(): try: if sys.argv[1] == 'all': for key in template.keys(): gen(key) else: gen(sys.argv[1]) except: raise RuntimeError("Unsupported binding %s" % sys.argv[1]) if __name__ == "__main__": if len(sys.argv) < 2: print("Usage:", sys.argv[0], " ") sys.exit(1) main() capstone-sys-0.11.0/capstone/bindings/java/.gitignore010066400017500001750000000000151363402546700207740ustar0000000000000000*.class tags capstone-sys-0.11.0/capstone/bindings/java/Makefile010066400017500001750000000033751363402546700204600ustar0000000000000000# Capstone Disassembler Engine # By Nguyen Anh Quynh , 2013> ifndef BUILDDIR BLDIR = . OBJDIR = . else BLDIR = $(abspath $(BUILDDIR))/bindings/java OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/java endif JNA = /usr/share/java/jna/jna.jar ifneq ($(wildcard $(JNA)),) else ifneq ($(wildcard /usr/share/java/jna.jar),) JNA = /usr/share/java/jna.jar else JNA = endif endif PYTHON2 = python CAPSTONE_JAVA = Capstone.java Arm_const.java Arm64_const.java Mips_const.java \ X86_const.java Xcore_const.java Ppc_const.java Sparc_const.java\ Sysz_const.java M680x_const.java \ Arm.java Arm64.java Mips.java X86.java Xcore.java Ppc.java\ Sparc.java Systemz.java M680x.java all: gen_const capstone tests capstone: capstone_class @mkdir -p $(BLDIR) cd $(OBJDIR) && jar cf $(BLDIR)/capstone.jar capstone/*.class capstone_class: jna ifdef BUILDDIR @mkdir -p $(OBJDIR) cd capstone && javac -d $(OBJDIR) -classpath $(JNA) $(CAPSTONE_JAVA) else cd capstone && javac -classpath $(JNA) $(CAPSTONE_JAVA) endif tests: capstone_class jna @mkdir -p $(OBJDIR) javac -d $(OBJDIR) -classpath "$(JNA):$(BLDIR)/capstone.jar" TestBasic.java\ TestArm.java TestArm64.java TestMips.java TestX86.java TestXcore.java\ TestPpc.java TestSparc.java TestSystemz.java TestM680x.java gen_const: cd ../ && $(PYTHON2) const_generator.py java jna: @if [ ! $(JNA) ]; then echo "*** Unable to find JNA ***"; exit 1; fi clean: rm -rf $(OBJDIR)/capstone/*.class rm -rf $(OBJDIR)/*.class $(OBJDIR)/*.log $(BLDIR)/*.jar ifdef BUILDDIR rm -rf $(BLDIR) rm -rf $(OBJDIR) endif TESTS = testbasic arm arm64 m680x mips ppc sparc systemz x86 xcore check: @for t in $(TESTS); do \ echo Check $$t ... ; \ ./run.sh $$t > /dev/null && echo OK || echo FAILED; \ done capstone-sys-0.11.0/capstone/bindings/java/README010066400017500001750000000014761363402546700177000ustar0000000000000000This has been tested with OpenJDK version 6 & 7 on Ubuntu-12.04 and Arch Linux-3.11, 64-bit. - OpenJDK is required to compile and run this test code. For example, install OpenJDK 6 with: $ sudo apt-get install openjdk-6-jre-headless openjdk-6-jdk - Java Native Access is required to run the code, you can install it with: $ sudo apt-get install libjna-java - To compile and run this Java test code: $ make $ ./run.sh This directory contains some test code to show how to use Capstone API. - TestBasic.java This code shows the most simple form of API where we only want to get basic information out of disassembled instruction, such as address, mnemonic and operand string. - Test.java These code show how to retrieve architecture-specific information for each architecture. capstone-sys-0.11.0/capstone/bindings/java/TestArm.java010066400017500001750000000134301363402546700212330ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 import capstone.Capstone; import capstone.Arm; import static capstone.Arm_const.*; public class TestArm { static byte[] hexString2Byte(String s) { // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java int len = s.length(); byte[] data = new byte[len / 2]; for (int i = 0; i < len; i += 2) { data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4) + Character.digit(s.charAt(i+1), 16)); } return data; } static final String ARM_CODE = "EDFFFFEB04e02de500000000e08322e5f102030e0000a0e30230c1e7000053e3000201f10540d0e8"; static final String ARM_CODE2 = "d1e800f0f02404071f3cf2c000004ff00001466c"; static final String THUMB_CODE2 = "4ff00001bde80088d1e800f018bfadbff3ff0b0c86f3008980f3008c4ffa99f6d0ffa201"; static final String THUMB_CODE = "7047eb4683b0c9681fb130bfaff32084"; public static Capstone cs; private static String hex(int i) { return Integer.toString(i, 16); } private static String hex(long i) { return Long.toString(i, 16); } public static void print_ins_detail(Capstone.CsInsn ins) { System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr); Arm.OpInfo operands = (Arm.OpInfo) ins.operands; if (operands.op.length != 0) { System.out.printf("\top_count: %d\n", operands.op.length); for (int c=0; c 0) System.out.printf("\t\t\toperands[%d].vector_index = %d\n", c, (i.vector_index)); if (i.shift.type != ARM_SFT_INVALID && i.shift.value > 0) System.out.printf("\t\t\tShift: %d = %d\n", i.shift.type, i.shift.value); if (i.subtracted) System.out.printf("\t\t\toperands[%d].subtracted = True\n", c); } } if (operands.writeback) System.out.println("\tWrite-back: True"); if (operands.updateFlags) System.out.println("\tUpdate-flags: True"); if (operands.cc != ARM_CC_AL && operands.cc != ARM_CC_INVALID) System.out.printf("\tCode condition: %d\n", operands.cc); if (operands.cpsMode > 0) System.out.printf("\tCPSI-mode: %d\n", operands.cpsMode); if (operands.cpsFlag > 0) System.out.printf("\tCPSI-flag: %d\n", operands.cpsFlag); if (operands.vectorData > 0) System.out.printf("\tVector-data: %d\n", operands.vectorData); if (operands.vectorSize > 0) System.out.printf("\tVector-size: %d\n", operands.vectorSize); if (operands.usermode) System.out.printf("\tUser-mode: True\n"); } public static void main(String argv[]) { final TestBasic.platform[] all_tests = { new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_ARM, hexString2Byte(ARM_CODE), "ARM"), new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(THUMB_CODE), "Thumb"), new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(ARM_CODE2), "Thumb-mixed"), new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, Capstone.CS_OPT_SYNTAX_NOREGNAME, hexString2Byte(THUMB_CODE2), "Thumb-2 & register named with numbers"), }; for (int i=0; i 0) System.out.printf("\t\t\tShift: type = %d, value = %d\n", i.shift.type, i.shift.value); if (i.ext != ARM64_EXT_INVALID) System.out.printf("\t\t\tExt: %d\n", i.ext); if (i.vas != ARM64_VAS_INVALID) System.out.printf("\t\t\tVector Arrangement Specifier: 0x%x\n", i.vas); if (i.vess != ARM64_VESS_INVALID) System.out.printf("\t\t\tVector Element Size Specifier: %d\n", i.vess); if (i.vector_index != -1) System.out.printf("\t\t\tVector Index: %d\n", i.vector_index); } } if (operands.writeback) System.out.println("\tWrite-back: True"); if (operands.updateFlags) System.out.println("\tUpdate-flags: True"); if (operands.cc != ARM64_CC_AL && operands.cc != ARM64_CC_INVALID) System.out.printf("\tCode-condition: %d\n", operands.cc); } public static void main(String argv[]) { final TestBasic.platform[] all_tests = { new TestBasic.platform(Capstone.CS_ARCH_ARM64, Capstone.CS_MODE_ARM, hexString2Byte(ARM64_CODE), "ARM-64"), }; for (int i=0; i, 2013> */ import capstone.Capstone; public class TestBasic { public static class platform { public int arch; public int mode; public int syntax; public byte[] code; public String comment; public platform(int a, int m, int syt, byte[] c, String s) { arch = a; mode = m; code = c; comment = s; syntax = syt; } public platform(int a, int m, byte[] c, String s) { arch = a; mode = m; code = c; comment = s; } }; static public String stringToHex(byte[] code) { StringBuilder buf = new StringBuilder(200); for (byte ch: code) { if (buf.length() > 0) buf.append(' '); buf.append(String.format("0x%02x", ch)); } return buf.toString(); } public static final byte[] PPC_CODE = new byte[] {(byte)0x80, (byte)0x20, (byte)0x00, (byte)0x00, (byte)0x80, (byte)0x3f, (byte)0x00, (byte)0x00, (byte)0x10, (byte)0x43, (byte)0x23, (byte)0x0e, (byte)0xd0, (byte)0x44, (byte)0x00, (byte)0x80, (byte)0x4c, (byte)0x43, (byte)0x22, (byte)0x02, (byte)0x2d, (byte)0x03, (byte)0x00, (byte)0x80, (byte)0x7c, (byte)0x43, (byte)0x20, (byte)0x14, (byte)0x7c, (byte)0x43, (byte)0x20, (byte)0x93, (byte)0x4f, (byte)0x20, (byte)0x00, (byte)0x21, (byte)0x4c, (byte)0xc8, (byte)0x00, (byte)0x21 }; public static final byte[] X86_CODE = new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, (byte)0x00, (byte)0x00 }; public static final byte[] SPARC_CODE = new byte[] { (byte)0x80, (byte)0xa0, (byte)0x40, (byte)0x02, (byte)0x85, (byte)0xc2, (byte)0x60, (byte)0x08, (byte)0x85, (byte)0xe8, (byte)0x20, (byte)0x01, (byte)0x81, (byte)0xe8, (byte)0x00, (byte)0x00, (byte)0x90, (byte)0x10, (byte)0x20, (byte)0x01, (byte)0xd5, (byte)0xf6, (byte)0x10, (byte)0x16, (byte)0x21, (byte)0x00, (byte)0x00, (byte)0x0a, (byte)0x86, (byte)0x00, (byte)0x40, (byte)0x02, (byte)0x01, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x12, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0x10, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0xa0, (byte)0x02, (byte)0x00, (byte)0x09, (byte)0x0d, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0xd4, (byte)0x20, (byte)0x60, (byte)0x00, (byte)0xd4, (byte)0x4e, (byte)0x00, (byte)0x16, (byte)0x2a, (byte)0xc2, (byte)0x80, (byte)0x03 }; public static final byte[] SYSZ_CODE = new byte[] { (byte)0xed, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x1a, (byte)0x5a, (byte)0x0f, (byte)0x1f, (byte)0xff, (byte)0xc2, (byte)0x09, (byte)0x80, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x07, (byte)0xf7, (byte)0xeb, (byte)0x2a, (byte)0xff, (byte)0xff, (byte)0x7f, (byte)0x57, (byte)0xe3, (byte)0x01, (byte)0xff, (byte)0xff, (byte)0x7f, (byte)0x57, (byte)0xeb, (byte)0x00, (byte)0xf0, (byte)0x00, (byte)0x00, (byte)0x24, (byte)0xb2, (byte)0x4f, (byte)0x00, (byte)0x78 }; public static final byte[] SPARCV9_CODE = new byte[] { (byte)0x81, (byte)0xa8, (byte)0x0a, (byte)0x24, (byte)0x89, (byte)0xa0, (byte)0x10, (byte)0x20, (byte)0x89, (byte)0xa0, (byte)0x1a, (byte)0x60, (byte)0x89, (byte)0xa0, (byte)0x00, (byte)0xe0 }; public static final byte[] XCORE_CODE = new byte[] { (byte)0xfe, (byte)0x0f, (byte)0xfe, (byte)0x17, (byte)0x13, (byte)0x17, (byte)0xc6, (byte)0xfe, (byte)0xec, (byte)0x17, (byte)0x97, (byte)0xf8, (byte)0xec, (byte)0x4f, (byte)0x1f, (byte)0xfd, (byte)0xec, (byte)0x37, (byte)0x07, (byte)0xf2, (byte)0x45, (byte)0x5b, (byte)0xf9, (byte)0xfa, (byte)0x02, (byte)0x06, (byte)0x1b, (byte)0x10 }; static public void main(String argv[]) { platform[] platforms = { new platform( Capstone.CS_ARCH_X86, Capstone.CS_MODE_16, Capstone.CS_OPT_SYNTAX_INTEL, new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, (byte)0x00, (byte)0x00 }, "X86 16bit (Intel syntax)" ), new platform( Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, Capstone.CS_OPT_SYNTAX_ATT, X86_CODE, "X86 32bit (ATT syntax)" ), new platform( Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, X86_CODE, "X86 32 (Intel syntax)" ), new platform( Capstone.CS_ARCH_X86, Capstone.CS_MODE_64, new byte[] {(byte)0x55, (byte)0x48, (byte)0x8b, (byte)0x05, (byte)0xb8, (byte)0x13, (byte)0x00, (byte)0x00 }, "X86 64 (Intel syntax)" ), new platform( Capstone.CS_ARCH_ARM, Capstone.CS_MODE_ARM, new byte[] { (byte)0xED, (byte)0xFF, (byte)0xFF, (byte)0xEB, (byte)0x04, (byte)0xe0, (byte)0x2d, (byte)0xe5, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0xe0, (byte)0x83, (byte)0x22, (byte)0xe5, (byte)0xf1, (byte)0x02, (byte)0x03, (byte)0x0e, (byte)0x00, (byte)0x00, (byte)0xa0, (byte)0xe3, (byte)0x02, (byte)0x30, (byte)0xc1, (byte)0xe7, (byte)0x00, (byte)0x00, (byte)0x53, (byte)0xe3 }, "ARM" ), new platform( Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, new byte[] {(byte)0x4f, (byte)0xf0, (byte)0x00, (byte)0x01, (byte)0xbd, (byte)0xe8, (byte)0x00, (byte)0x88, (byte)0xd1, (byte)0xe8, (byte)0x00, (byte)0xf0 }, "THUMB-2" ), new platform( Capstone.CS_ARCH_ARM, Capstone.CS_MODE_ARM, new byte[] {(byte)0x10, (byte)0xf1, (byte)0x10, (byte)0xe7, (byte)0x11, (byte)0xf2, (byte)0x31, (byte)0xe7, (byte)0xdc, (byte)0xa1, (byte)0x2e, (byte)0xf3, (byte)0xe8, (byte)0x4e, (byte)0x62, (byte)0xf3 }, "ARM: Cortex-A15 + NEON" ), new platform( Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, new byte[] {(byte)0x70, (byte)0x47, (byte)0xeb, (byte)0x46, (byte)0x83, (byte)0xb0, (byte)0xc9, (byte)0x68 }, "THUMB" ), new platform( Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_MIPS32 + Capstone.CS_MODE_BIG_ENDIAN, new byte[] {(byte)0x0C, (byte)0x10, (byte)0x00, (byte)0x97, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x24, (byte)0x02, (byte)0x00, (byte)0x0c, (byte)0x8f, (byte)0xa2, (byte)0x00, (byte)0x00, (byte)0x34, (byte)0x21, (byte)0x34, (byte)0x56 }, "MIPS-32 (Big-endian)" ), new platform( Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_MIPS64+ Capstone.CS_MODE_LITTLE_ENDIAN, new byte[] {(byte)0x56, (byte)0x34, (byte)0x21, (byte)0x34, (byte)0xc2, (byte)0x17, (byte)0x01, (byte)0x00 }, "MIPS-64-EL (Little-endian)" ), new platform( Capstone.CS_ARCH_ARM64, Capstone.CS_MODE_ARM, new byte [] { 0x21, 0x7c, 0x02, (byte)0x9b, 0x21, 0x7c, 0x00, 0x53, 0x00, 0x40, 0x21, 0x4b, (byte)0xe1, 0x0b, 0x40, (byte)0xb9 }, "ARM-64" ), new platform ( Capstone.CS_ARCH_PPC, Capstone.CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64" ), new platform ( Capstone.CS_ARCH_PPC, Capstone.CS_MODE_BIG_ENDIAN, Capstone.CS_OPT_SYNTAX_NOREGNAME, PPC_CODE, "PPC-64, print register with number only" ), new platform ( Capstone.CS_ARCH_SPARC, Capstone.CS_MODE_BIG_ENDIAN, SPARC_CODE, "Sparc" ), new platform ( Capstone.CS_ARCH_SPARC, Capstone.CS_MODE_BIG_ENDIAN + Capstone.CS_MODE_V9, SPARCV9_CODE, "SparcV9" ), new platform ( Capstone.CS_ARCH_SYSZ, 0, SYSZ_CODE, "SystemZ" ), new platform ( Capstone.CS_ARCH_XCORE, 0, XCORE_CODE, "XCore" ), }; for (int j = 0; j < platforms.length; j++) { System.out.println("****************"); System.out.println(String.format("Platform: %s", platforms[j].comment)); System.out.println(String.format("Code: %s", stringToHex(platforms[j].code))); System.out.println("Disasm:"); Capstone cs = new Capstone(platforms[j].arch, platforms[j].mode); if (platforms[j].syntax != 0) cs.setSyntax(platforms[j].syntax); Capstone.CsInsn[] all_insn = cs.disasm(platforms[j].code, 0x1000); for (int i = 0; i < all_insn.length; i++) { System.out.println(String.format("0x%x: \t%s\t%s", all_insn[i].address, all_insn[i].mnemonic, all_insn[i].opStr)); } System.out.printf("0x%x:\n\n", all_insn[all_insn.length-1].address + all_insn[all_insn.length-1].size); // Close when done cs.close(); } } } capstone-sys-0.11.0/capstone/bindings/java/TestM680x.java010066400017500001750000000211671363402546700213440ustar0000000000000000// Capstone Java binding /* M680X Backend by Wolfgang Schwotzer 2017 */ import java.lang.*; import capstone.Capstone; import capstone.M680x; import static capstone.M680x_const.*; public class TestM680x { static final String sAccess[] = { "UNCHANGED", "READ", "WRITE", "READ | WRITE", }; static final String M6800_CODE = "010936647f7410009010A410b6100039"; static final String M6801_CODE = "04053c3d389310ec10ed1039"; static final String M6805_CODE = "047f00172228002e0040425a708e979ca015ad00c31000da1234e57ffe"; static final String M6808_CODE = "31220035224510004b005110525e226265123472848586878a8b8c9495a710af109e607f9e6b7f009ed610009ee67f"; static final String HD6301_CODE = "6b100071100072101039"; static final String M6809_CODE = "0610191a551e0123e931063455a681a7897fffa69d1000a791a69f100011ac99100039A607A627A647A667A60FA610A680A681A682A683A684A685A686A6887FA68880A6897FFFA6898000A68BA68C10A68D1000A691A693A694A695A696A6987FA69880A6997FFFA6998000A69BA69C10A69D1000A69F1000"; static final String M6811_CODE = "0203127f100013990800147f02157f011e7f20008fcf18081830183c1867188c1000188f18ce100018ff10001aa37f1aac1aee7f1aef7fcdac7f"; static final String CPU12_CODE = "000401000c00800e008000111e100080003b4a1000044b01044f7f80008f1000b752b7b1a667a6fea6f71802e23039e21000180c30391000181118121000181900181e00183e183f00"; static final String HD6309_CODE = "0110106210107b101000cd499602d21030231038103b1053105d1130431011372510113812113923113b34118e100011af1011ab1011f68000"; static final String HCS08_CODE = "3210009eae9ece7f9ebe10009efe7f3e10009ef37f9610009eff7f82"; static byte[] hexString2Byte(String s) { // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java int len = s.length(); byte[] data = new byte[len / 2]; for (int i = 0; i < len; i += 2) { data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4) + Character.digit(s.charAt(i+1), 16)); } return data; } static public String stringToHexUc(byte[] code) { StringBuilder buf = new StringBuilder(800); for (byte ch: code) { buf.append(String.format(" 0x%02x", ch)); } return buf.toString(); } static public String stringToHexShortUc(byte[] code) { StringBuilder buf = new StringBuilder(800); for (byte ch: code) { buf.append(String.format("%02x", ch)); } return buf.toString(); } public static Capstone cs; /* private static String hex(int i) { return Integer.toString(i, 16); } private static String hex(long i) { return Long.toString(i, 16); } */ public static void print_ins_detail(Capstone.CsInsn ins) { String bytes = stringToHexShortUc(ins.bytes); System.out.printf("0x%04x:\t%s\t%s\t%s\n", ins.address, bytes, ins.mnemonic, ins.opStr); M680x.OpInfo operands = (M680x.OpInfo) ins.operands; if (operands.op.length != 0) { System.out.printf("\top_count: %d\n", operands.op.length); for (int c = 0; c < operands.op.length; c++) { M680x.Operand i = (M680x.Operand) operands.op[c]; if (i.type == M680X_OP_REGISTER) { String comment = ""; if ((c == 0 && ((operands.flags & M680X_FIRST_OP_IN_MNEM) != 0)) || (c == 1 && ((operands.flags & M680X_SECOND_OP_IN_MNEM) != 0))) comment = " (in mnemonic)"; System.out.printf("\t\toperands[%d].type: REGISTER = %s%s\n", c, ins.regName(i.value.reg), comment); } if (i.type == M680X_OP_CONSTANT) System.out.printf("\t\toperands[%d].type: CONSTANT = %d\n", c, i.value.const_val); if (i.type == M680X_OP_IMMEDIATE) System.out.printf("\t\toperands[%d].type: IMMEDIATE = #%d\n", c, i.value.imm); if (i.type == M680X_OP_DIRECT) System.out.printf("\t\toperands[%d].type: DIRECT = 0x%02x\n", c, i.value.direct_addr); if (i.type == M680X_OP_EXTENDED) System.out.printf("\t\toperands[%d].type: EXTENDED %s = 0x%04x\n", c, i.value.ext.indirect != 0 ? "INDIRECT" : "", i.value.ext.address); if (i.type == M680X_OP_RELATIVE) System.out.printf("\t\toperands[%d].type: RELATIVE = 0x%04x\n", c, i.value.rel.address ); if (i.type == M680X_OP_INDEXED) { System.out.printf("\t\toperands[%d].type: INDEXED%s\n", c, (i.value.idx.flags & M680X_IDX_INDIRECT) != 0 ? " INDIRECT" : ""); if (i.value.idx.base_reg != M680X_REG_INVALID) { String regName = ins.regName(i.value.idx.base_reg); if (regName != null) System.out.printf("\t\t\tbase register: %s\n", regName); } if (i.value.idx.offset_reg != M680X_REG_INVALID) { String regName = ins.regName(i.value.idx.offset_reg); if (regName != null) System.out.printf("\t\t\toffset register: %s\n", regName); } if ((i.value.idx.offset_bits != 0) && (i.value.idx.offset_reg == M680X_REG_INVALID) && (i.value.idx.inc_dec == 0)) { System.out.printf("\t\t\toffset: %d\n", i.value.idx.offset); if (i.value.idx.base_reg == M680X_REG_PC) System.out.printf("\t\t\toffset address: 0x%04x\n", i.value.idx.offset_addr); System.out.printf("\t\t\toffset bits: %d\n", i.value.idx.offset_bits); } if (i.value.idx.inc_dec != 0) { String post_pre = (i.value.idx.flags & M680X_IDX_POST_INC_DEC) != 0 ? "post" : "pre"; String inc_dec = i.value.idx.inc_dec > 0 ? "increment" : "decrement"; System.out.printf("\t\t\t%s %s: %d\n", post_pre, inc_dec, Math.abs(i.value.idx.inc_dec)); } } if (i.size != 0) System.out.printf("\t\t\tsize: %d\n", i.size); if (i.access != Capstone.CS_AC_INVALID) System.out.printf("\t\t\taccess: %s\n", sAccess[i.access]); } } if (ins.regsRead.length > 0) { System.out.printf("\tRegisters read:"); for (int c = 0; c < ins.regsRead.length; c++) { System.out.printf(" %s", ins.regName(ins.regsRead[c])); } System.out.printf("\n"); } if (ins.regsWrite.length > 0) { System.out.printf("\tRegisters modified:"); for (int c = 0; c < ins.regsWrite.length; c++) { System.out.printf(" %s", ins.regName(ins.regsWrite[c])); } System.out.printf("\n"); } if (ins.groups.length > 0) System.out.printf("\tgroups_count: %d\n", ins.groups.length); } public static void main(String argv[]) { final TestBasic.platform[] all_tests = { new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6301, hexString2Byte(HD6301_CODE), "M680X_HD6301"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6309, hexString2Byte(HD6309_CODE), "M680X_HD6309"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6800, hexString2Byte(M6800_CODE), "M680X_M6800"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6801, hexString2Byte(M6801_CODE), "M680X_M6801"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6805, hexString2Byte(M6805_CODE), "M680X_M68HC05"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6808, hexString2Byte(M6808_CODE), "M680X_M68HC08"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6809, hexString2Byte(M6809_CODE), "M680X_M6809"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_6811, hexString2Byte(M6811_CODE), "M680X_M68HC11"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_CPU12, hexString2Byte(CPU12_CODE), "M680X_CPU12"), new TestBasic.platform(Capstone.CS_ARCH_M680X, Capstone.CS_MODE_M680X_HCS08, hexString2Byte(HCS08_CODE), "M680X_HCS08"), }; for (int i=0; i 0) { System.out.printf("\timm_count: %d\n", count); System.out.printf("\timm offset: 0x%x\n", operands.encoding.immOffset); System.out.printf("\timm size: 0x%x\n", operands.encoding.immSize); for (int i=0; i 0) { System.out.printf("\tRegisters read:"); for (int i = 0; i < regsRead.length; i++) { System.out.printf(" %s", ins.regName(regsRead[i])); } System.out.print("\n"); } if (regsWrite.length > 0) { System.out.printf("\tRegister modified:"); for (int i = 0; i < regsWrite.length; i++) { System.out.printf(" %s", ins.regName(regsWrite[i])); } System.out.print("\n"); } } } } public static void main(String argv[]) { final TestBasic.platform[] all_tests = { new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_16, hexString2Byte(X86_CODE16), "X86 16bit (Intel syntax)"), new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, Capstone.CS_OPT_SYNTAX_ATT, hexString2Byte(X86_CODE32), "X86 32 (AT&T syntax)"), new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, hexString2Byte(X86_CODE32), "X86 32 (Intel syntax)"), new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_64, hexString2Byte(X86_CODE64), "X86 64 (Intel syntax)"), }; for (int i=0; i 0); writeback = (op_info.writeback > 0); memBarrier = op_info.mem_barrier; op = op_info.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/Arm64.java010066400017500001750000000060441363402546700223640ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.Arm64_const.*; public class Arm64 { public static class MemType extends Structure { public int base; public int index; public int disp; @Override public List getFieldOrder() { return Arrays.asList("base", "index", "disp"); } } public static class OpValue extends Union { public int reg; public long imm; public double fp; public MemType mem; public int pstate; public int sys; public int prefetch; public int barrier; @Override public List getFieldOrder() { return Arrays.asList("reg", "imm", "fp", "mem", "pstate", "sys", "prefetch", "barrier"); } } public static class OpShift extends Structure { public int type; public int value; @Override public List getFieldOrder() { return Arrays.asList("type","value"); } } public static class Operand extends Structure { public int vector_index; public int vas; public int vess; public OpShift shift; public int ext; public int type; public OpValue value; public void read() { readField("type"); if (type == ARM64_OP_MEM) value.setType(MemType.class); if (type == ARM64_OP_FP) value.setType(Double.TYPE); if (type == ARM64_OP_IMM || type == ARM64_OP_CIMM || type == ARM64_OP_REG || type == ARM64_OP_REG_MRS || type == ARM64_OP_REG_MSR || type == ARM64_OP_PSTATE || type == ARM64_OP_SYS || type == ARM64_OP_PREFETCH || type == ARM64_OP_BARRIER) value.setType(Integer.TYPE); if (type == ARM64_OP_INVALID) return; readField("value"); readField("ext"); readField("shift"); readField("vess"); readField("vas"); readField("vector_index"); } @Override public List getFieldOrder() { return Arrays.asList("vector_index", "vas", "vess", "shift", "ext", "type", "value"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public int cc; public byte _update_flags; public byte _writeback; public byte op_count; public Operand [] op; public UnionOpInfo() { op = new Operand[8]; } public void read() { readField("cc"); readField("_update_flags"); readField("_writeback"); readField("op_count"); op = new Operand[op_count]; if (op_count != 0) readField("op"); } @Override public List getFieldOrder() { return Arrays.asList("cc", "_update_flags", "_writeback", "op_count", "op"); } } public static class OpInfo extends Capstone.OpInfo { public int cc; public boolean updateFlags; public boolean writeback; public Operand [] op = null; public OpInfo(UnionOpInfo op_info) { cc = op_info.cc; updateFlags = (op_info._update_flags > 0); writeback = (op_info._writeback > 0); op = op_info.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/Arm64_const.java010066400017500001750000001353151363402546700235760ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class Arm64_const { public static final int ARM64_SFT_INVALID = 0; public static final int ARM64_SFT_LSL = 1; public static final int ARM64_SFT_MSL = 2; public static final int ARM64_SFT_LSR = 3; public static final int ARM64_SFT_ASR = 4; public static final int ARM64_SFT_ROR = 5; public static final int ARM64_EXT_INVALID = 0; public static final int ARM64_EXT_UXTB = 1; public static final int ARM64_EXT_UXTH = 2; public static final int ARM64_EXT_UXTW = 3; public static final int ARM64_EXT_UXTX = 4; public static final int ARM64_EXT_SXTB = 5; public static final int ARM64_EXT_SXTH = 6; public static final int ARM64_EXT_SXTW = 7; public static final int ARM64_EXT_SXTX = 8; public static final int ARM64_CC_INVALID = 0; public static final int ARM64_CC_EQ = 1; public static final int ARM64_CC_NE = 2; public static final int ARM64_CC_HS = 3; public static final int ARM64_CC_LO = 4; public static final int ARM64_CC_MI = 5; public static final int ARM64_CC_PL = 6; public static final int ARM64_CC_VS = 7; public static final int ARM64_CC_VC = 8; public static final int ARM64_CC_HI = 9; public static final int ARM64_CC_LS = 10; public static final int ARM64_CC_GE = 11; public static final int ARM64_CC_LT = 12; public static final int ARM64_CC_GT = 13; public static final int ARM64_CC_LE = 14; public static final int ARM64_CC_AL = 15; public static final int ARM64_CC_NV = 16; public static final int ARM64_SYSREG_INVALID = 0; public static final int ARM64_SYSREG_MDCCSR_EL0 = 0x9808; public static final int ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828; public static final int ARM64_SYSREG_MDRAR_EL1 = 0x8080; public static final int ARM64_SYSREG_OSLSR_EL1 = 0x808c; public static final int ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83f6; public static final int ARM64_SYSREG_PMCEID0_EL0 = 0xdce6; public static final int ARM64_SYSREG_PMCEID1_EL0 = 0xdce7; public static final int ARM64_SYSREG_MIDR_EL1 = 0xc000; public static final int ARM64_SYSREG_CCSIDR_EL1 = 0xc800; public static final int ARM64_SYSREG_CLIDR_EL1 = 0xc801; public static final int ARM64_SYSREG_CTR_EL0 = 0xd801; public static final int ARM64_SYSREG_MPIDR_EL1 = 0xc005; public static final int ARM64_SYSREG_REVIDR_EL1 = 0xc006; public static final int ARM64_SYSREG_AIDR_EL1 = 0xc807; public static final int ARM64_SYSREG_DCZID_EL0 = 0xd807; public static final int ARM64_SYSREG_ID_PFR0_EL1 = 0xc008; public static final int ARM64_SYSREG_ID_PFR1_EL1 = 0xc009; public static final int ARM64_SYSREG_ID_DFR0_EL1 = 0xc00a; public static final int ARM64_SYSREG_ID_AFR0_EL1 = 0xc00b; public static final int ARM64_SYSREG_ID_MMFR0_EL1 = 0xc00c; public static final int ARM64_SYSREG_ID_MMFR1_EL1 = 0xc00d; public static final int ARM64_SYSREG_ID_MMFR2_EL1 = 0xc00e; public static final int ARM64_SYSREG_ID_MMFR3_EL1 = 0xc00f; public static final int ARM64_SYSREG_ID_ISAR0_EL1 = 0xc010; public static final int ARM64_SYSREG_ID_ISAR1_EL1 = 0xc011; public static final int ARM64_SYSREG_ID_ISAR2_EL1 = 0xc012; public static final int ARM64_SYSREG_ID_ISAR3_EL1 = 0xc013; public static final int ARM64_SYSREG_ID_ISAR4_EL1 = 0xc014; public static final int ARM64_SYSREG_ID_ISAR5_EL1 = 0xc015; public static final int ARM64_SYSREG_ID_A64PFR0_EL1 = 0xc020; public static final int ARM64_SYSREG_ID_A64PFR1_EL1 = 0xc021; public static final int ARM64_SYSREG_ID_A64DFR0_EL1 = 0xc028; public static final int ARM64_SYSREG_ID_A64DFR1_EL1 = 0xc029; public static final int ARM64_SYSREG_ID_A64AFR0_EL1 = 0xc02c; public static final int ARM64_SYSREG_ID_A64AFR1_EL1 = 0xc02d; public static final int ARM64_SYSREG_ID_A64ISAR0_EL1 = 0xc030; public static final int ARM64_SYSREG_ID_A64ISAR1_EL1 = 0xc031; public static final int ARM64_SYSREG_ID_A64MMFR0_EL1 = 0xc038; public static final int ARM64_SYSREG_ID_A64MMFR1_EL1 = 0xc039; public static final int ARM64_SYSREG_MVFR0_EL1 = 0xc018; public static final int ARM64_SYSREG_MVFR1_EL1 = 0xc019; public static final int ARM64_SYSREG_MVFR2_EL1 = 0xc01a; public static final int ARM64_SYSREG_RVBAR_EL1 = 0xc601; public static final int ARM64_SYSREG_RVBAR_EL2 = 0xe601; public static final int ARM64_SYSREG_RVBAR_EL3 = 0xf601; public static final int ARM64_SYSREG_ISR_EL1 = 0xc608; public static final int ARM64_SYSREG_CNTPCT_EL0 = 0xdf01; public static final int ARM64_SYSREG_CNTVCT_EL0 = 0xdf02; public static final int ARM64_SYSREG_TRCSTATR = 0x8818; public static final int ARM64_SYSREG_TRCIDR8 = 0x8806; public static final int ARM64_SYSREG_TRCIDR9 = 0x880e; public static final int ARM64_SYSREG_TRCIDR10 = 0x8816; public static final int ARM64_SYSREG_TRCIDR11 = 0x881e; public static final int ARM64_SYSREG_TRCIDR12 = 0x8826; public static final int ARM64_SYSREG_TRCIDR13 = 0x882e; public static final int ARM64_SYSREG_TRCIDR0 = 0x8847; public static final int ARM64_SYSREG_TRCIDR1 = 0x884f; public static final int ARM64_SYSREG_TRCIDR2 = 0x8857; public static final int ARM64_SYSREG_TRCIDR3 = 0x885f; public static final int ARM64_SYSREG_TRCIDR4 = 0x8867; public static final int ARM64_SYSREG_TRCIDR5 = 0x886f; public static final int ARM64_SYSREG_TRCIDR6 = 0x8877; public static final int ARM64_SYSREG_TRCIDR7 = 0x887f; public static final int ARM64_SYSREG_TRCOSLSR = 0x888c; public static final int ARM64_SYSREG_TRCPDSR = 0x88ac; public static final int ARM64_SYSREG_TRCDEVAFF0 = 0x8bd6; public static final int ARM64_SYSREG_TRCDEVAFF1 = 0x8bde; public static final int ARM64_SYSREG_TRCLSR = 0x8bee; public static final int ARM64_SYSREG_TRCAUTHSTATUS = 0x8bf6; public static final int ARM64_SYSREG_TRCDEVARCH = 0x8bfe; public static final int ARM64_SYSREG_TRCDEVID = 0x8b97; public static final int ARM64_SYSREG_TRCDEVTYPE = 0x8b9f; public static final int ARM64_SYSREG_TRCPIDR4 = 0x8ba7; public static final int ARM64_SYSREG_TRCPIDR5 = 0x8baf; public static final int ARM64_SYSREG_TRCPIDR6 = 0x8bb7; public static final int ARM64_SYSREG_TRCPIDR7 = 0x8bbf; public static final int ARM64_SYSREG_TRCPIDR0 = 0x8bc7; public static final int ARM64_SYSREG_TRCPIDR1 = 0x8bcf; public static final int ARM64_SYSREG_TRCPIDR2 = 0x8bd7; public static final int ARM64_SYSREG_TRCPIDR3 = 0x8bdf; public static final int ARM64_SYSREG_TRCCIDR0 = 0x8be7; public static final int ARM64_SYSREG_TRCCIDR1 = 0x8bef; public static final int ARM64_SYSREG_TRCCIDR2 = 0x8bf7; public static final int ARM64_SYSREG_TRCCIDR3 = 0x8bff; public static final int ARM64_SYSREG_ICC_IAR1_EL1 = 0xc660; public static final int ARM64_SYSREG_ICC_IAR0_EL1 = 0xc640; public static final int ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xc662; public static final int ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xc642; public static final int ARM64_SYSREG_ICC_RPR_EL1 = 0xc65b; public static final int ARM64_SYSREG_ICH_VTR_EL2 = 0xe659; public static final int ARM64_SYSREG_ICH_EISR_EL2 = 0xe65b; public static final int ARM64_SYSREG_ICH_ELSR_EL2 = 0xe65d; public static final int ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828; public static final int ARM64_SYSREG_OSLAR_EL1 = 0x8084; public static final int ARM64_SYSREG_PMSWINC_EL0 = 0xdce4; public static final int ARM64_SYSREG_TRCOSLAR = 0x8884; public static final int ARM64_SYSREG_TRCLAR = 0x8be6; public static final int ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661; public static final int ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641; public static final int ARM64_SYSREG_ICC_DIR_EL1 = 0xc659; public static final int ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d; public static final int ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e; public static final int ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f; public static final int ARM64_PSTATE_INVALID = 0; public static final int ARM64_PSTATE_SPSEL = 0x05; public static final int ARM64_PSTATE_DAIFSET = 0x1e; public static final int ARM64_PSTATE_DAIFCLR = 0x1f; public static final int ARM64_VAS_INVALID = 0; public static final int ARM64_VAS_8B = 1; public static final int ARM64_VAS_16B = 2; public static final int ARM64_VAS_4H = 3; public static final int ARM64_VAS_8H = 4; public static final int ARM64_VAS_2S = 5; public static final int ARM64_VAS_4S = 6; public static final int ARM64_VAS_1D = 7; public static final int ARM64_VAS_2D = 8; public static final int ARM64_VAS_1Q = 9; public static final int ARM64_VESS_INVALID = 0; public static final int ARM64_VESS_B = 1; public static final int ARM64_VESS_H = 2; public static final int ARM64_VESS_S = 3; public static final int ARM64_VESS_D = 4; public static final int ARM64_BARRIER_INVALID = 0; public static final int ARM64_BARRIER_OSHLD = 0x1; public static final int ARM64_BARRIER_OSHST = 0x2; public static final int ARM64_BARRIER_OSH = 0x3; public static final int ARM64_BARRIER_NSHLD = 0x5; public static final int ARM64_BARRIER_NSHST = 0x6; public static final int ARM64_BARRIER_NSH = 0x7; public static final int ARM64_BARRIER_ISHLD = 0x9; public static final int ARM64_BARRIER_ISHST = 0xa; public static final int ARM64_BARRIER_ISH = 0xb; public static final int ARM64_BARRIER_LD = 0xd; public static final int ARM64_BARRIER_ST = 0xe; public static final int ARM64_BARRIER_SY = 0xf; public static final int ARM64_OP_INVALID = 0; public static final int ARM64_OP_REG = 1; public static final int ARM64_OP_IMM = 2; public static final int ARM64_OP_MEM = 3; public static final int ARM64_OP_FP = 4; public static final int ARM64_OP_CIMM = 64; public static final int ARM64_OP_REG_MRS = 65; public static final int ARM64_OP_REG_MSR = 66; public static final int ARM64_OP_PSTATE = 67; public static final int ARM64_OP_SYS = 68; public static final int ARM64_OP_PREFETCH = 69; public static final int ARM64_OP_BARRIER = 70; public static final int ARM64_TLBI_INVALID = 0; public static final int ARM64_TLBI_VMALLE1IS = 1; public static final int ARM64_TLBI_VAE1IS = 2; public static final int ARM64_TLBI_ASIDE1IS = 3; public static final int ARM64_TLBI_VAAE1IS = 4; public static final int ARM64_TLBI_VALE1IS = 5; public static final int ARM64_TLBI_VAALE1IS = 6; public static final int ARM64_TLBI_ALLE2IS = 7; public static final int ARM64_TLBI_VAE2IS = 8; public static final int ARM64_TLBI_ALLE1IS = 9; public static final int ARM64_TLBI_VALE2IS = 10; public static final int ARM64_TLBI_VMALLS12E1IS = 11; public static final int ARM64_TLBI_ALLE3IS = 12; public static final int ARM64_TLBI_VAE3IS = 13; public static final int ARM64_TLBI_VALE3IS = 14; public static final int ARM64_TLBI_IPAS2E1IS = 15; public static final int ARM64_TLBI_IPAS2LE1IS = 16; public static final int ARM64_TLBI_IPAS2E1 = 17; public static final int ARM64_TLBI_IPAS2LE1 = 18; public static final int ARM64_TLBI_VMALLE1 = 19; public static final int ARM64_TLBI_VAE1 = 20; public static final int ARM64_TLBI_ASIDE1 = 21; public static final int ARM64_TLBI_VAAE1 = 22; public static final int ARM64_TLBI_VALE1 = 23; public static final int ARM64_TLBI_VAALE1 = 24; public static final int ARM64_TLBI_ALLE2 = 25; public static final int ARM64_TLBI_VAE2 = 26; public static final int ARM64_TLBI_ALLE1 = 27; public static final int ARM64_TLBI_VALE2 = 28; public static final int ARM64_TLBI_VMALLS12E1 = 29; public static final int ARM64_TLBI_ALLE3 = 30; public static final int ARM64_TLBI_VAE3 = 31; public static final int ARM64_TLBI_VALE3 = 32; public static final int ARM64_AT_S1E1R = 33; public static final int ARM64_AT_S1E1W = 34; public static final int ARM64_AT_S1E0R = 35; public static final int ARM64_AT_S1E0W = 36; public static final int ARM64_AT_S1E2R = 37; public static final int ARM64_AT_S1E2W = 38; public static final int ARM64_AT_S12E1R = 39; public static final int ARM64_AT_S12E1W = 40; public static final int ARM64_AT_S12E0R = 41; public static final int ARM64_AT_S12E0W = 42; public static final int ARM64_AT_S1E3R = 43; public static final int ARM64_AT_S1E3W = 44; public static final int ARM64_DC_INVALID = 0; public static final int ARM64_DC_ZVA = 1; public static final int ARM64_DC_IVAC = 2; public static final int ARM64_DC_ISW = 3; public static final int ARM64_DC_CVAC = 4; public static final int ARM64_DC_CSW = 5; public static final int ARM64_DC_CVAU = 6; public static final int ARM64_DC_CIVAC = 7; public static final int ARM64_DC_CISW = 8; public static final int ARM64_IC_INVALID = 0; public static final int ARM64_IC_IALLUIS = 1; public static final int ARM64_IC_IALLU = 2; public static final int ARM64_IC_IVAU = 3; public static final int ARM64_PRFM_INVALID = 0; public static final int ARM64_PRFM_PLDL1KEEP = 0x00+1; public static final int ARM64_PRFM_PLDL1STRM = 0x01+1; public static final int ARM64_PRFM_PLDL2KEEP = 0x02+1; public static final int ARM64_PRFM_PLDL2STRM = 0x03+1; public static final int ARM64_PRFM_PLDL3KEEP = 0x04+1; public static final int ARM64_PRFM_PLDL3STRM = 0x05+1; public static final int ARM64_PRFM_PLIL1KEEP = 0x08+1; public static final int ARM64_PRFM_PLIL1STRM = 0x09+1; public static final int ARM64_PRFM_PLIL2KEEP = 0x0a+1; public static final int ARM64_PRFM_PLIL2STRM = 0x0b+1; public static final int ARM64_PRFM_PLIL3KEEP = 0x0c+1; public static final int ARM64_PRFM_PLIL3STRM = 0x0d+1; public static final int ARM64_PRFM_PSTL1KEEP = 0x10+1; public static final int ARM64_PRFM_PSTL1STRM = 0x11+1; public static final int ARM64_PRFM_PSTL2KEEP = 0x12+1; public static final int ARM64_PRFM_PSTL2STRM = 0x13+1; public static final int ARM64_PRFM_PSTL3KEEP = 0x14+1; public static final int ARM64_PRFM_PSTL3STRM = 0x15+1; public static final int ARM64_REG_INVALID = 0; public static final int ARM64_REG_X29 = 1; public static final int ARM64_REG_X30 = 2; public static final int ARM64_REG_NZCV = 3; public static final int ARM64_REG_SP = 4; public static final int ARM64_REG_WSP = 5; public static final int ARM64_REG_WZR = 6; public static final int ARM64_REG_XZR = 7; public static final int ARM64_REG_B0 = 8; public static final int ARM64_REG_B1 = 9; public static final int ARM64_REG_B2 = 10; public static final int ARM64_REG_B3 = 11; public static final int ARM64_REG_B4 = 12; public static final int ARM64_REG_B5 = 13; public static final int ARM64_REG_B6 = 14; public static final int ARM64_REG_B7 = 15; public static final int ARM64_REG_B8 = 16; public static final int ARM64_REG_B9 = 17; public static final int ARM64_REG_B10 = 18; public static final int ARM64_REG_B11 = 19; public static final int ARM64_REG_B12 = 20; public static final int ARM64_REG_B13 = 21; public static final int ARM64_REG_B14 = 22; public static final int ARM64_REG_B15 = 23; public static final int ARM64_REG_B16 = 24; public static final int ARM64_REG_B17 = 25; public static final int ARM64_REG_B18 = 26; public static final int ARM64_REG_B19 = 27; public static final int ARM64_REG_B20 = 28; public static final int ARM64_REG_B21 = 29; public static final int ARM64_REG_B22 = 30; public static final int ARM64_REG_B23 = 31; public static final int ARM64_REG_B24 = 32; public static final int ARM64_REG_B25 = 33; public static final int ARM64_REG_B26 = 34; public static final int ARM64_REG_B27 = 35; public static final int ARM64_REG_B28 = 36; public static final int ARM64_REG_B29 = 37; public static final int ARM64_REG_B30 = 38; public static final int ARM64_REG_B31 = 39; public static final int ARM64_REG_D0 = 40; public static final int ARM64_REG_D1 = 41; public static final int ARM64_REG_D2 = 42; public static final int ARM64_REG_D3 = 43; public static final int ARM64_REG_D4 = 44; public static final int ARM64_REG_D5 = 45; public static final int ARM64_REG_D6 = 46; public static final int ARM64_REG_D7 = 47; public static final int ARM64_REG_D8 = 48; public static final int ARM64_REG_D9 = 49; public static final int ARM64_REG_D10 = 50; public static final int ARM64_REG_D11 = 51; public static final int ARM64_REG_D12 = 52; public static final int ARM64_REG_D13 = 53; public static final int ARM64_REG_D14 = 54; public static final int ARM64_REG_D15 = 55; public static final int ARM64_REG_D16 = 56; public static final int ARM64_REG_D17 = 57; public static final int ARM64_REG_D18 = 58; public static final int ARM64_REG_D19 = 59; public static final int ARM64_REG_D20 = 60; public static final int ARM64_REG_D21 = 61; public static final int ARM64_REG_D22 = 62; public static final int ARM64_REG_D23 = 63; public static final int ARM64_REG_D24 = 64; public static final int ARM64_REG_D25 = 65; public static final int ARM64_REG_D26 = 66; public static final int ARM64_REG_D27 = 67; public static final int ARM64_REG_D28 = 68; public static final int ARM64_REG_D29 = 69; public static final int ARM64_REG_D30 = 70; public static final int ARM64_REG_D31 = 71; public static final int ARM64_REG_H0 = 72; public static final int ARM64_REG_H1 = 73; public static final int ARM64_REG_H2 = 74; public static final int ARM64_REG_H3 = 75; public static final int ARM64_REG_H4 = 76; public static final int ARM64_REG_H5 = 77; public static final int ARM64_REG_H6 = 78; public static final int ARM64_REG_H7 = 79; public static final int ARM64_REG_H8 = 80; public static final int ARM64_REG_H9 = 81; public static final int ARM64_REG_H10 = 82; public static final int ARM64_REG_H11 = 83; public static final int ARM64_REG_H12 = 84; public static final int ARM64_REG_H13 = 85; public static final int ARM64_REG_H14 = 86; public static final int ARM64_REG_H15 = 87; public static final int ARM64_REG_H16 = 88; public static final int ARM64_REG_H17 = 89; public static final int ARM64_REG_H18 = 90; public static final int ARM64_REG_H19 = 91; public static final int ARM64_REG_H20 = 92; public static final int ARM64_REG_H21 = 93; public static final int ARM64_REG_H22 = 94; public static final int ARM64_REG_H23 = 95; public static final int ARM64_REG_H24 = 96; public static final int ARM64_REG_H25 = 97; public static final int ARM64_REG_H26 = 98; public static final int ARM64_REG_H27 = 99; public static final int ARM64_REG_H28 = 100; public static final int ARM64_REG_H29 = 101; public static final int ARM64_REG_H30 = 102; public static final int ARM64_REG_H31 = 103; public static final int ARM64_REG_Q0 = 104; public static final int ARM64_REG_Q1 = 105; public static final int ARM64_REG_Q2 = 106; public static final int ARM64_REG_Q3 = 107; public static final int ARM64_REG_Q4 = 108; public static final int ARM64_REG_Q5 = 109; public static final int ARM64_REG_Q6 = 110; public static final int ARM64_REG_Q7 = 111; public static final int ARM64_REG_Q8 = 112; public static final int ARM64_REG_Q9 = 113; public static final int ARM64_REG_Q10 = 114; public static final int ARM64_REG_Q11 = 115; public static final int ARM64_REG_Q12 = 116; public static final int ARM64_REG_Q13 = 117; public static final int ARM64_REG_Q14 = 118; public static final int ARM64_REG_Q15 = 119; public static final int ARM64_REG_Q16 = 120; public static final int ARM64_REG_Q17 = 121; public static final int ARM64_REG_Q18 = 122; public static final int ARM64_REG_Q19 = 123; public static final int ARM64_REG_Q20 = 124; public static final int ARM64_REG_Q21 = 125; public static final int ARM64_REG_Q22 = 126; public static final int ARM64_REG_Q23 = 127; public static final int ARM64_REG_Q24 = 128; public static final int ARM64_REG_Q25 = 129; public static final int ARM64_REG_Q26 = 130; public static final int ARM64_REG_Q27 = 131; public static final int ARM64_REG_Q28 = 132; public static final int ARM64_REG_Q29 = 133; public static final int ARM64_REG_Q30 = 134; public static final int ARM64_REG_Q31 = 135; public static final int ARM64_REG_S0 = 136; public static final int ARM64_REG_S1 = 137; public static final int ARM64_REG_S2 = 138; public static final int ARM64_REG_S3 = 139; public static final int ARM64_REG_S4 = 140; public static final int ARM64_REG_S5 = 141; public static final int ARM64_REG_S6 = 142; public static final int ARM64_REG_S7 = 143; public static final int ARM64_REG_S8 = 144; public static final int ARM64_REG_S9 = 145; public static final int ARM64_REG_S10 = 146; public static final int ARM64_REG_S11 = 147; public static final int ARM64_REG_S12 = 148; public static final int ARM64_REG_S13 = 149; public static final int ARM64_REG_S14 = 150; public static final int ARM64_REG_S15 = 151; public static final int ARM64_REG_S16 = 152; public static final int ARM64_REG_S17 = 153; public static final int ARM64_REG_S18 = 154; public static final int ARM64_REG_S19 = 155; public static final int ARM64_REG_S20 = 156; public static final int ARM64_REG_S21 = 157; public static final int ARM64_REG_S22 = 158; public static final int ARM64_REG_S23 = 159; public static final int ARM64_REG_S24 = 160; public static final int ARM64_REG_S25 = 161; public static final int ARM64_REG_S26 = 162; public static final int ARM64_REG_S27 = 163; public static final int ARM64_REG_S28 = 164; public static final int ARM64_REG_S29 = 165; public static final int ARM64_REG_S30 = 166; public static final int ARM64_REG_S31 = 167; public static final int ARM64_REG_W0 = 168; public static final int ARM64_REG_W1 = 169; public static final int ARM64_REG_W2 = 170; public static final int ARM64_REG_W3 = 171; public static final int ARM64_REG_W4 = 172; public static final int ARM64_REG_W5 = 173; public static final int ARM64_REG_W6 = 174; public static final int ARM64_REG_W7 = 175; public static final int ARM64_REG_W8 = 176; public static final int ARM64_REG_W9 = 177; public static final int ARM64_REG_W10 = 178; public static final int ARM64_REG_W11 = 179; public static final int ARM64_REG_W12 = 180; public static final int ARM64_REG_W13 = 181; public static final int ARM64_REG_W14 = 182; public static final int ARM64_REG_W15 = 183; public static final int ARM64_REG_W16 = 184; public static final int ARM64_REG_W17 = 185; public static final int ARM64_REG_W18 = 186; public static final int ARM64_REG_W19 = 187; public static final int ARM64_REG_W20 = 188; public static final int ARM64_REG_W21 = 189; public static final int ARM64_REG_W22 = 190; public static final int ARM64_REG_W23 = 191; public static final int ARM64_REG_W24 = 192; public static final int ARM64_REG_W25 = 193; public static final int ARM64_REG_W26 = 194; public static final int ARM64_REG_W27 = 195; public static final int ARM64_REG_W28 = 196; public static final int ARM64_REG_W29 = 197; public static final int ARM64_REG_W30 = 198; public static final int ARM64_REG_X0 = 199; public static final int ARM64_REG_X1 = 200; public static final int ARM64_REG_X2 = 201; public static final int ARM64_REG_X3 = 202; public static final int ARM64_REG_X4 = 203; public static final int ARM64_REG_X5 = 204; public static final int ARM64_REG_X6 = 205; public static final int ARM64_REG_X7 = 206; public static final int ARM64_REG_X8 = 207; public static final int ARM64_REG_X9 = 208; public static final int ARM64_REG_X10 = 209; public static final int ARM64_REG_X11 = 210; public static final int ARM64_REG_X12 = 211; public static final int ARM64_REG_X13 = 212; public static final int ARM64_REG_X14 = 213; public static final int ARM64_REG_X15 = 214; public static final int ARM64_REG_X16 = 215; public static final int ARM64_REG_X17 = 216; public static final int ARM64_REG_X18 = 217; public static final int ARM64_REG_X19 = 218; public static final int ARM64_REG_X20 = 219; public static final int ARM64_REG_X21 = 220; public static final int ARM64_REG_X22 = 221; public static final int ARM64_REG_X23 = 222; public static final int ARM64_REG_X24 = 223; public static final int ARM64_REG_X25 = 224; public static final int ARM64_REG_X26 = 225; public static final int ARM64_REG_X27 = 226; public static final int ARM64_REG_X28 = 227; public static final int ARM64_REG_V0 = 228; public static final int ARM64_REG_V1 = 229; public static final int ARM64_REG_V2 = 230; public static final int ARM64_REG_V3 = 231; public static final int ARM64_REG_V4 = 232; public static final int ARM64_REG_V5 = 233; public static final int ARM64_REG_V6 = 234; public static final int ARM64_REG_V7 = 235; public static final int ARM64_REG_V8 = 236; public static final int ARM64_REG_V9 = 237; public static final int ARM64_REG_V10 = 238; public static final int ARM64_REG_V11 = 239; public static final int ARM64_REG_V12 = 240; public static final int ARM64_REG_V13 = 241; public static final int ARM64_REG_V14 = 242; public static final int ARM64_REG_V15 = 243; public static final int ARM64_REG_V16 = 244; public static final int ARM64_REG_V17 = 245; public static final int ARM64_REG_V18 = 246; public static final int ARM64_REG_V19 = 247; public static final int ARM64_REG_V20 = 248; public static final int ARM64_REG_V21 = 249; public static final int ARM64_REG_V22 = 250; public static final int ARM64_REG_V23 = 251; public static final int ARM64_REG_V24 = 252; public static final int ARM64_REG_V25 = 253; public static final int ARM64_REG_V26 = 254; public static final int ARM64_REG_V27 = 255; public static final int ARM64_REG_V28 = 256; public static final int ARM64_REG_V29 = 257; public static final int ARM64_REG_V30 = 258; public static final int ARM64_REG_V31 = 259; public static final int ARM64_REG_ENDING = 260; public static final int ARM64_REG_IP0 = ARM64_REG_X16; public static final int ARM64_REG_IP1 = ARM64_REG_X17; public static final int ARM64_REG_FP = ARM64_REG_X29; public static final int ARM64_REG_LR = ARM64_REG_X30; public static final int ARM64_INS_INVALID = 0; public static final int ARM64_INS_ABS = 1; public static final int ARM64_INS_ADC = 2; public static final int ARM64_INS_ADDHN = 3; public static final int ARM64_INS_ADDHN2 = 4; public static final int ARM64_INS_ADDP = 5; public static final int ARM64_INS_ADD = 6; public static final int ARM64_INS_ADDV = 7; public static final int ARM64_INS_ADR = 8; public static final int ARM64_INS_ADRP = 9; public static final int ARM64_INS_AESD = 10; public static final int ARM64_INS_AESE = 11; public static final int ARM64_INS_AESIMC = 12; public static final int ARM64_INS_AESMC = 13; public static final int ARM64_INS_AND = 14; public static final int ARM64_INS_ASR = 15; public static final int ARM64_INS_B = 16; public static final int ARM64_INS_BFM = 17; public static final int ARM64_INS_BIC = 18; public static final int ARM64_INS_BIF = 19; public static final int ARM64_INS_BIT = 20; public static final int ARM64_INS_BL = 21; public static final int ARM64_INS_BLR = 22; public static final int ARM64_INS_BR = 23; public static final int ARM64_INS_BRK = 24; public static final int ARM64_INS_BSL = 25; public static final int ARM64_INS_CBNZ = 26; public static final int ARM64_INS_CBZ = 27; public static final int ARM64_INS_CCMN = 28; public static final int ARM64_INS_CCMP = 29; public static final int ARM64_INS_CLREX = 30; public static final int ARM64_INS_CLS = 31; public static final int ARM64_INS_CLZ = 32; public static final int ARM64_INS_CMEQ = 33; public static final int ARM64_INS_CMGE = 34; public static final int ARM64_INS_CMGT = 35; public static final int ARM64_INS_CMHI = 36; public static final int ARM64_INS_CMHS = 37; public static final int ARM64_INS_CMLE = 38; public static final int ARM64_INS_CMLT = 39; public static final int ARM64_INS_CMTST = 40; public static final int ARM64_INS_CNT = 41; public static final int ARM64_INS_MOV = 42; public static final int ARM64_INS_CRC32B = 43; public static final int ARM64_INS_CRC32CB = 44; public static final int ARM64_INS_CRC32CH = 45; public static final int ARM64_INS_CRC32CW = 46; public static final int ARM64_INS_CRC32CX = 47; public static final int ARM64_INS_CRC32H = 48; public static final int ARM64_INS_CRC32W = 49; public static final int ARM64_INS_CRC32X = 50; public static final int ARM64_INS_CSEL = 51; public static final int ARM64_INS_CSINC = 52; public static final int ARM64_INS_CSINV = 53; public static final int ARM64_INS_CSNEG = 54; public static final int ARM64_INS_DCPS1 = 55; public static final int ARM64_INS_DCPS2 = 56; public static final int ARM64_INS_DCPS3 = 57; public static final int ARM64_INS_DMB = 58; public static final int ARM64_INS_DRPS = 59; public static final int ARM64_INS_DSB = 60; public static final int ARM64_INS_DUP = 61; public static final int ARM64_INS_EON = 62; public static final int ARM64_INS_EOR = 63; public static final int ARM64_INS_ERET = 64; public static final int ARM64_INS_EXTR = 65; public static final int ARM64_INS_EXT = 66; public static final int ARM64_INS_FABD = 67; public static final int ARM64_INS_FABS = 68; public static final int ARM64_INS_FACGE = 69; public static final int ARM64_INS_FACGT = 70; public static final int ARM64_INS_FADD = 71; public static final int ARM64_INS_FADDP = 72; public static final int ARM64_INS_FCCMP = 73; public static final int ARM64_INS_FCCMPE = 74; public static final int ARM64_INS_FCMEQ = 75; public static final int ARM64_INS_FCMGE = 76; public static final int ARM64_INS_FCMGT = 77; public static final int ARM64_INS_FCMLE = 78; public static final int ARM64_INS_FCMLT = 79; public static final int ARM64_INS_FCMP = 80; public static final int ARM64_INS_FCMPE = 81; public static final int ARM64_INS_FCSEL = 82; public static final int ARM64_INS_FCVTAS = 83; public static final int ARM64_INS_FCVTAU = 84; public static final int ARM64_INS_FCVT = 85; public static final int ARM64_INS_FCVTL = 86; public static final int ARM64_INS_FCVTL2 = 87; public static final int ARM64_INS_FCVTMS = 88; public static final int ARM64_INS_FCVTMU = 89; public static final int ARM64_INS_FCVTNS = 90; public static final int ARM64_INS_FCVTNU = 91; public static final int ARM64_INS_FCVTN = 92; public static final int ARM64_INS_FCVTN2 = 93; public static final int ARM64_INS_FCVTPS = 94; public static final int ARM64_INS_FCVTPU = 95; public static final int ARM64_INS_FCVTXN = 96; public static final int ARM64_INS_FCVTXN2 = 97; public static final int ARM64_INS_FCVTZS = 98; public static final int ARM64_INS_FCVTZU = 99; public static final int ARM64_INS_FDIV = 100; public static final int ARM64_INS_FMADD = 101; public static final int ARM64_INS_FMAX = 102; public static final int ARM64_INS_FMAXNM = 103; public static final int ARM64_INS_FMAXNMP = 104; public static final int ARM64_INS_FMAXNMV = 105; public static final int ARM64_INS_FMAXP = 106; public static final int ARM64_INS_FMAXV = 107; public static final int ARM64_INS_FMIN = 108; public static final int ARM64_INS_FMINNM = 109; public static final int ARM64_INS_FMINNMP = 110; public static final int ARM64_INS_FMINNMV = 111; public static final int ARM64_INS_FMINP = 112; public static final int ARM64_INS_FMINV = 113; public static final int ARM64_INS_FMLA = 114; public static final int ARM64_INS_FMLS = 115; public static final int ARM64_INS_FMOV = 116; public static final int ARM64_INS_FMSUB = 117; public static final int ARM64_INS_FMUL = 118; public static final int ARM64_INS_FMULX = 119; public static final int ARM64_INS_FNEG = 120; public static final int ARM64_INS_FNMADD = 121; public static final int ARM64_INS_FNMSUB = 122; public static final int ARM64_INS_FNMUL = 123; public static final int ARM64_INS_FRECPE = 124; public static final int ARM64_INS_FRECPS = 125; public static final int ARM64_INS_FRECPX = 126; public static final int ARM64_INS_FRINTA = 127; public static final int ARM64_INS_FRINTI = 128; public static final int ARM64_INS_FRINTM = 129; public static final int ARM64_INS_FRINTN = 130; public static final int ARM64_INS_FRINTP = 131; public static final int ARM64_INS_FRINTX = 132; public static final int ARM64_INS_FRINTZ = 133; public static final int ARM64_INS_FRSQRTE = 134; public static final int ARM64_INS_FRSQRTS = 135; public static final int ARM64_INS_FSQRT = 136; public static final int ARM64_INS_FSUB = 137; public static final int ARM64_INS_HINT = 138; public static final int ARM64_INS_HLT = 139; public static final int ARM64_INS_HVC = 140; public static final int ARM64_INS_INS = 141; public static final int ARM64_INS_ISB = 142; public static final int ARM64_INS_LD1 = 143; public static final int ARM64_INS_LD1R = 144; public static final int ARM64_INS_LD2R = 145; public static final int ARM64_INS_LD2 = 146; public static final int ARM64_INS_LD3R = 147; public static final int ARM64_INS_LD3 = 148; public static final int ARM64_INS_LD4 = 149; public static final int ARM64_INS_LD4R = 150; public static final int ARM64_INS_LDARB = 151; public static final int ARM64_INS_LDARH = 152; public static final int ARM64_INS_LDAR = 153; public static final int ARM64_INS_LDAXP = 154; public static final int ARM64_INS_LDAXRB = 155; public static final int ARM64_INS_LDAXRH = 156; public static final int ARM64_INS_LDAXR = 157; public static final int ARM64_INS_LDNP = 158; public static final int ARM64_INS_LDP = 159; public static final int ARM64_INS_LDPSW = 160; public static final int ARM64_INS_LDRB = 161; public static final int ARM64_INS_LDR = 162; public static final int ARM64_INS_LDRH = 163; public static final int ARM64_INS_LDRSB = 164; public static final int ARM64_INS_LDRSH = 165; public static final int ARM64_INS_LDRSW = 166; public static final int ARM64_INS_LDTRB = 167; public static final int ARM64_INS_LDTRH = 168; public static final int ARM64_INS_LDTRSB = 169; public static final int ARM64_INS_LDTRSH = 170; public static final int ARM64_INS_LDTRSW = 171; public static final int ARM64_INS_LDTR = 172; public static final int ARM64_INS_LDURB = 173; public static final int ARM64_INS_LDUR = 174; public static final int ARM64_INS_LDURH = 175; public static final int ARM64_INS_LDURSB = 176; public static final int ARM64_INS_LDURSH = 177; public static final int ARM64_INS_LDURSW = 178; public static final int ARM64_INS_LDXP = 179; public static final int ARM64_INS_LDXRB = 180; public static final int ARM64_INS_LDXRH = 181; public static final int ARM64_INS_LDXR = 182; public static final int ARM64_INS_LSL = 183; public static final int ARM64_INS_LSR = 184; public static final int ARM64_INS_MADD = 185; public static final int ARM64_INS_MLA = 186; public static final int ARM64_INS_MLS = 187; public static final int ARM64_INS_MOVI = 188; public static final int ARM64_INS_MOVK = 189; public static final int ARM64_INS_MOVN = 190; public static final int ARM64_INS_MOVZ = 191; public static final int ARM64_INS_MRS = 192; public static final int ARM64_INS_MSR = 193; public static final int ARM64_INS_MSUB = 194; public static final int ARM64_INS_MUL = 195; public static final int ARM64_INS_MVNI = 196; public static final int ARM64_INS_NEG = 197; public static final int ARM64_INS_NOT = 198; public static final int ARM64_INS_ORN = 199; public static final int ARM64_INS_ORR = 200; public static final int ARM64_INS_PMULL2 = 201; public static final int ARM64_INS_PMULL = 202; public static final int ARM64_INS_PMUL = 203; public static final int ARM64_INS_PRFM = 204; public static final int ARM64_INS_PRFUM = 205; public static final int ARM64_INS_RADDHN = 206; public static final int ARM64_INS_RADDHN2 = 207; public static final int ARM64_INS_RBIT = 208; public static final int ARM64_INS_RET = 209; public static final int ARM64_INS_REV16 = 210; public static final int ARM64_INS_REV32 = 211; public static final int ARM64_INS_REV64 = 212; public static final int ARM64_INS_REV = 213; public static final int ARM64_INS_ROR = 214; public static final int ARM64_INS_RSHRN2 = 215; public static final int ARM64_INS_RSHRN = 216; public static final int ARM64_INS_RSUBHN = 217; public static final int ARM64_INS_RSUBHN2 = 218; public static final int ARM64_INS_SABAL2 = 219; public static final int ARM64_INS_SABAL = 220; public static final int ARM64_INS_SABA = 221; public static final int ARM64_INS_SABDL2 = 222; public static final int ARM64_INS_SABDL = 223; public static final int ARM64_INS_SABD = 224; public static final int ARM64_INS_SADALP = 225; public static final int ARM64_INS_SADDLP = 226; public static final int ARM64_INS_SADDLV = 227; public static final int ARM64_INS_SADDL2 = 228; public static final int ARM64_INS_SADDL = 229; public static final int ARM64_INS_SADDW2 = 230; public static final int ARM64_INS_SADDW = 231; public static final int ARM64_INS_SBC = 232; public static final int ARM64_INS_SBFM = 233; public static final int ARM64_INS_SCVTF = 234; public static final int ARM64_INS_SDIV = 235; public static final int ARM64_INS_SHA1C = 236; public static final int ARM64_INS_SHA1H = 237; public static final int ARM64_INS_SHA1M = 238; public static final int ARM64_INS_SHA1P = 239; public static final int ARM64_INS_SHA1SU0 = 240; public static final int ARM64_INS_SHA1SU1 = 241; public static final int ARM64_INS_SHA256H2 = 242; public static final int ARM64_INS_SHA256H = 243; public static final int ARM64_INS_SHA256SU0 = 244; public static final int ARM64_INS_SHA256SU1 = 245; public static final int ARM64_INS_SHADD = 246; public static final int ARM64_INS_SHLL2 = 247; public static final int ARM64_INS_SHLL = 248; public static final int ARM64_INS_SHL = 249; public static final int ARM64_INS_SHRN2 = 250; public static final int ARM64_INS_SHRN = 251; public static final int ARM64_INS_SHSUB = 252; public static final int ARM64_INS_SLI = 253; public static final int ARM64_INS_SMADDL = 254; public static final int ARM64_INS_SMAXP = 255; public static final int ARM64_INS_SMAXV = 256; public static final int ARM64_INS_SMAX = 257; public static final int ARM64_INS_SMC = 258; public static final int ARM64_INS_SMINP = 259; public static final int ARM64_INS_SMINV = 260; public static final int ARM64_INS_SMIN = 261; public static final int ARM64_INS_SMLAL2 = 262; public static final int ARM64_INS_SMLAL = 263; public static final int ARM64_INS_SMLSL2 = 264; public static final int ARM64_INS_SMLSL = 265; public static final int ARM64_INS_SMOV = 266; public static final int ARM64_INS_SMSUBL = 267; public static final int ARM64_INS_SMULH = 268; public static final int ARM64_INS_SMULL2 = 269; public static final int ARM64_INS_SMULL = 270; public static final int ARM64_INS_SQABS = 271; public static final int ARM64_INS_SQADD = 272; public static final int ARM64_INS_SQDMLAL = 273; public static final int ARM64_INS_SQDMLAL2 = 274; public static final int ARM64_INS_SQDMLSL = 275; public static final int ARM64_INS_SQDMLSL2 = 276; public static final int ARM64_INS_SQDMULH = 277; public static final int ARM64_INS_SQDMULL = 278; public static final int ARM64_INS_SQDMULL2 = 279; public static final int ARM64_INS_SQNEG = 280; public static final int ARM64_INS_SQRDMULH = 281; public static final int ARM64_INS_SQRSHL = 282; public static final int ARM64_INS_SQRSHRN = 283; public static final int ARM64_INS_SQRSHRN2 = 284; public static final int ARM64_INS_SQRSHRUN = 285; public static final int ARM64_INS_SQRSHRUN2 = 286; public static final int ARM64_INS_SQSHLU = 287; public static final int ARM64_INS_SQSHL = 288; public static final int ARM64_INS_SQSHRN = 289; public static final int ARM64_INS_SQSHRN2 = 290; public static final int ARM64_INS_SQSHRUN = 291; public static final int ARM64_INS_SQSHRUN2 = 292; public static final int ARM64_INS_SQSUB = 293; public static final int ARM64_INS_SQXTN2 = 294; public static final int ARM64_INS_SQXTN = 295; public static final int ARM64_INS_SQXTUN2 = 296; public static final int ARM64_INS_SQXTUN = 297; public static final int ARM64_INS_SRHADD = 298; public static final int ARM64_INS_SRI = 299; public static final int ARM64_INS_SRSHL = 300; public static final int ARM64_INS_SRSHR = 301; public static final int ARM64_INS_SRSRA = 302; public static final int ARM64_INS_SSHLL2 = 303; public static final int ARM64_INS_SSHLL = 304; public static final int ARM64_INS_SSHL = 305; public static final int ARM64_INS_SSHR = 306; public static final int ARM64_INS_SSRA = 307; public static final int ARM64_INS_SSUBL2 = 308; public static final int ARM64_INS_SSUBL = 309; public static final int ARM64_INS_SSUBW2 = 310; public static final int ARM64_INS_SSUBW = 311; public static final int ARM64_INS_ST1 = 312; public static final int ARM64_INS_ST2 = 313; public static final int ARM64_INS_ST3 = 314; public static final int ARM64_INS_ST4 = 315; public static final int ARM64_INS_STLRB = 316; public static final int ARM64_INS_STLRH = 317; public static final int ARM64_INS_STLR = 318; public static final int ARM64_INS_STLXP = 319; public static final int ARM64_INS_STLXRB = 320; public static final int ARM64_INS_STLXRH = 321; public static final int ARM64_INS_STLXR = 322; public static final int ARM64_INS_STNP = 323; public static final int ARM64_INS_STP = 324; public static final int ARM64_INS_STRB = 325; public static final int ARM64_INS_STR = 326; public static final int ARM64_INS_STRH = 327; public static final int ARM64_INS_STTRB = 328; public static final int ARM64_INS_STTRH = 329; public static final int ARM64_INS_STTR = 330; public static final int ARM64_INS_STURB = 331; public static final int ARM64_INS_STUR = 332; public static final int ARM64_INS_STURH = 333; public static final int ARM64_INS_STXP = 334; public static final int ARM64_INS_STXRB = 335; public static final int ARM64_INS_STXRH = 336; public static final int ARM64_INS_STXR = 337; public static final int ARM64_INS_SUBHN = 338; public static final int ARM64_INS_SUBHN2 = 339; public static final int ARM64_INS_SUB = 340; public static final int ARM64_INS_SUQADD = 341; public static final int ARM64_INS_SVC = 342; public static final int ARM64_INS_SYSL = 343; public static final int ARM64_INS_SYS = 344; public static final int ARM64_INS_TBL = 345; public static final int ARM64_INS_TBNZ = 346; public static final int ARM64_INS_TBX = 347; public static final int ARM64_INS_TBZ = 348; public static final int ARM64_INS_TRN1 = 349; public static final int ARM64_INS_TRN2 = 350; public static final int ARM64_INS_UABAL2 = 351; public static final int ARM64_INS_UABAL = 352; public static final int ARM64_INS_UABA = 353; public static final int ARM64_INS_UABDL2 = 354; public static final int ARM64_INS_UABDL = 355; public static final int ARM64_INS_UABD = 356; public static final int ARM64_INS_UADALP = 357; public static final int ARM64_INS_UADDLP = 358; public static final int ARM64_INS_UADDLV = 359; public static final int ARM64_INS_UADDL2 = 360; public static final int ARM64_INS_UADDL = 361; public static final int ARM64_INS_UADDW2 = 362; public static final int ARM64_INS_UADDW = 363; public static final int ARM64_INS_UBFM = 364; public static final int ARM64_INS_UCVTF = 365; public static final int ARM64_INS_UDIV = 366; public static final int ARM64_INS_UHADD = 367; public static final int ARM64_INS_UHSUB = 368; public static final int ARM64_INS_UMADDL = 369; public static final int ARM64_INS_UMAXP = 370; public static final int ARM64_INS_UMAXV = 371; public static final int ARM64_INS_UMAX = 372; public static final int ARM64_INS_UMINP = 373; public static final int ARM64_INS_UMINV = 374; public static final int ARM64_INS_UMIN = 375; public static final int ARM64_INS_UMLAL2 = 376; public static final int ARM64_INS_UMLAL = 377; public static final int ARM64_INS_UMLSL2 = 378; public static final int ARM64_INS_UMLSL = 379; public static final int ARM64_INS_UMOV = 380; public static final int ARM64_INS_UMSUBL = 381; public static final int ARM64_INS_UMULH = 382; public static final int ARM64_INS_UMULL2 = 383; public static final int ARM64_INS_UMULL = 384; public static final int ARM64_INS_UQADD = 385; public static final int ARM64_INS_UQRSHL = 386; public static final int ARM64_INS_UQRSHRN = 387; public static final int ARM64_INS_UQRSHRN2 = 388; public static final int ARM64_INS_UQSHL = 389; public static final int ARM64_INS_UQSHRN = 390; public static final int ARM64_INS_UQSHRN2 = 391; public static final int ARM64_INS_UQSUB = 392; public static final int ARM64_INS_UQXTN2 = 393; public static final int ARM64_INS_UQXTN = 394; public static final int ARM64_INS_URECPE = 395; public static final int ARM64_INS_URHADD = 396; public static final int ARM64_INS_URSHL = 397; public static final int ARM64_INS_URSHR = 398; public static final int ARM64_INS_URSQRTE = 399; public static final int ARM64_INS_URSRA = 400; public static final int ARM64_INS_USHLL2 = 401; public static final int ARM64_INS_USHLL = 402; public static final int ARM64_INS_USHL = 403; public static final int ARM64_INS_USHR = 404; public static final int ARM64_INS_USQADD = 405; public static final int ARM64_INS_USRA = 406; public static final int ARM64_INS_USUBL2 = 407; public static final int ARM64_INS_USUBL = 408; public static final int ARM64_INS_USUBW2 = 409; public static final int ARM64_INS_USUBW = 410; public static final int ARM64_INS_UZP1 = 411; public static final int ARM64_INS_UZP2 = 412; public static final int ARM64_INS_XTN2 = 413; public static final int ARM64_INS_XTN = 414; public static final int ARM64_INS_ZIP1 = 415; public static final int ARM64_INS_ZIP2 = 416; public static final int ARM64_INS_MNEG = 417; public static final int ARM64_INS_UMNEGL = 418; public static final int ARM64_INS_SMNEGL = 419; public static final int ARM64_INS_NOP = 420; public static final int ARM64_INS_YIELD = 421; public static final int ARM64_INS_WFE = 422; public static final int ARM64_INS_WFI = 423; public static final int ARM64_INS_SEV = 424; public static final int ARM64_INS_SEVL = 425; public static final int ARM64_INS_NGC = 426; public static final int ARM64_INS_SBFIZ = 427; public static final int ARM64_INS_UBFIZ = 428; public static final int ARM64_INS_SBFX = 429; public static final int ARM64_INS_UBFX = 430; public static final int ARM64_INS_BFI = 431; public static final int ARM64_INS_BFXIL = 432; public static final int ARM64_INS_CMN = 433; public static final int ARM64_INS_MVN = 434; public static final int ARM64_INS_TST = 435; public static final int ARM64_INS_CSET = 436; public static final int ARM64_INS_CINC = 437; public static final int ARM64_INS_CSETM = 438; public static final int ARM64_INS_CINV = 439; public static final int ARM64_INS_CNEG = 440; public static final int ARM64_INS_SXTB = 441; public static final int ARM64_INS_SXTH = 442; public static final int ARM64_INS_SXTW = 443; public static final int ARM64_INS_CMP = 444; public static final int ARM64_INS_UXTB = 445; public static final int ARM64_INS_UXTH = 446; public static final int ARM64_INS_UXTW = 447; public static final int ARM64_INS_IC = 448; public static final int ARM64_INS_DC = 449; public static final int ARM64_INS_AT = 450; public static final int ARM64_INS_TLBI = 451; public static final int ARM64_INS_NEGS = 452; public static final int ARM64_INS_NGCS = 453; public static final int ARM64_INS_ENDING = 454; public static final int ARM64_GRP_INVALID = 0; public static final int ARM64_GRP_JUMP = 1; public static final int ARM64_GRP_CALL = 2; public static final int ARM64_GRP_RET = 3; public static final int ARM64_GRP_INT = 4; public static final int ARM64_GRP_PRIVILEGE = 6; public static final int ARM64_GRP_BRANCH_RELATIVE = 7; public static final int ARM64_GRP_CRYPTO = 128; public static final int ARM64_GRP_FPARMV8 = 129; public static final int ARM64_GRP_NEON = 130; public static final int ARM64_GRP_CRC = 131; public static final int ARM64_GRP_ENDING = 132; }capstone-sys-0.11.0/capstone/bindings/java/capstone/Arm_const.java010066400017500001750000001043611363402546700234210ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class Arm_const { public static final int ARM_SFT_INVALID = 0; public static final int ARM_SFT_ASR = 1; public static final int ARM_SFT_LSL = 2; public static final int ARM_SFT_LSR = 3; public static final int ARM_SFT_ROR = 4; public static final int ARM_SFT_RRX = 5; public static final int ARM_SFT_ASR_REG = 6; public static final int ARM_SFT_LSL_REG = 7; public static final int ARM_SFT_LSR_REG = 8; public static final int ARM_SFT_ROR_REG = 9; public static final int ARM_SFT_RRX_REG = 10; public static final int ARM_CC_INVALID = 0; public static final int ARM_CC_EQ = 1; public static final int ARM_CC_NE = 2; public static final int ARM_CC_HS = 3; public static final int ARM_CC_LO = 4; public static final int ARM_CC_MI = 5; public static final int ARM_CC_PL = 6; public static final int ARM_CC_VS = 7; public static final int ARM_CC_VC = 8; public static final int ARM_CC_HI = 9; public static final int ARM_CC_LS = 10; public static final int ARM_CC_GE = 11; public static final int ARM_CC_LT = 12; public static final int ARM_CC_GT = 13; public static final int ARM_CC_LE = 14; public static final int ARM_CC_AL = 15; public static final int ARM_SYSREG_INVALID = 0; public static final int ARM_SYSREG_SPSR_C = 1; public static final int ARM_SYSREG_SPSR_X = 2; public static final int ARM_SYSREG_SPSR_S = 4; public static final int ARM_SYSREG_SPSR_F = 8; public static final int ARM_SYSREG_CPSR_C = 16; public static final int ARM_SYSREG_CPSR_X = 32; public static final int ARM_SYSREG_CPSR_S = 64; public static final int ARM_SYSREG_CPSR_F = 128; public static final int ARM_SYSREG_APSR = 256; public static final int ARM_SYSREG_APSR_G = 257; public static final int ARM_SYSREG_APSR_NZCVQ = 258; public static final int ARM_SYSREG_APSR_NZCVQG = 259; public static final int ARM_SYSREG_IAPSR = 260; public static final int ARM_SYSREG_IAPSR_G = 261; public static final int ARM_SYSREG_IAPSR_NZCVQG = 262; public static final int ARM_SYSREG_IAPSR_NZCVQ = 263; public static final int ARM_SYSREG_EAPSR = 264; public static final int ARM_SYSREG_EAPSR_G = 265; public static final int ARM_SYSREG_EAPSR_NZCVQG = 266; public static final int ARM_SYSREG_EAPSR_NZCVQ = 267; public static final int ARM_SYSREG_XPSR = 268; public static final int ARM_SYSREG_XPSR_G = 269; public static final int ARM_SYSREG_XPSR_NZCVQG = 270; public static final int ARM_SYSREG_XPSR_NZCVQ = 271; public static final int ARM_SYSREG_IPSR = 272; public static final int ARM_SYSREG_EPSR = 273; public static final int ARM_SYSREG_IEPSR = 274; public static final int ARM_SYSREG_MSP = 275; public static final int ARM_SYSREG_PSP = 276; public static final int ARM_SYSREG_PRIMASK = 277; public static final int ARM_SYSREG_BASEPRI = 278; public static final int ARM_SYSREG_BASEPRI_MAX = 279; public static final int ARM_SYSREG_FAULTMASK = 280; public static final int ARM_SYSREG_CONTROL = 281; public static final int ARM_SYSREG_R8_USR = 282; public static final int ARM_SYSREG_R9_USR = 283; public static final int ARM_SYSREG_R10_USR = 284; public static final int ARM_SYSREG_R11_USR = 285; public static final int ARM_SYSREG_R12_USR = 286; public static final int ARM_SYSREG_SP_USR = 287; public static final int ARM_SYSREG_LR_USR = 288; public static final int ARM_SYSREG_R8_FIQ = 289; public static final int ARM_SYSREG_R9_FIQ = 290; public static final int ARM_SYSREG_R10_FIQ = 291; public static final int ARM_SYSREG_R11_FIQ = 292; public static final int ARM_SYSREG_R12_FIQ = 293; public static final int ARM_SYSREG_SP_FIQ = 294; public static final int ARM_SYSREG_LR_FIQ = 295; public static final int ARM_SYSREG_LR_IRQ = 296; public static final int ARM_SYSREG_SP_IRQ = 297; public static final int ARM_SYSREG_LR_SVC = 298; public static final int ARM_SYSREG_SP_SVC = 299; public static final int ARM_SYSREG_LR_ABT = 300; public static final int ARM_SYSREG_SP_ABT = 301; public static final int ARM_SYSREG_LR_UND = 302; public static final int ARM_SYSREG_SP_UND = 303; public static final int ARM_SYSREG_LR_MON = 304; public static final int ARM_SYSREG_SP_MON = 305; public static final int ARM_SYSREG_ELR_HYP = 306; public static final int ARM_SYSREG_SP_HYP = 307; public static final int ARM_SYSREG_SPSR_FIQ = 308; public static final int ARM_SYSREG_SPSR_IRQ = 309; public static final int ARM_SYSREG_SPSR_SVC = 310; public static final int ARM_SYSREG_SPSR_ABT = 311; public static final int ARM_SYSREG_SPSR_UND = 312; public static final int ARM_SYSREG_SPSR_MON = 313; public static final int ARM_SYSREG_SPSR_HYP = 314; public static final int ARM_MB_INVALID = 0; public static final int ARM_MB_RESERVED_0 = 1; public static final int ARM_MB_OSHLD = 2; public static final int ARM_MB_OSHST = 3; public static final int ARM_MB_OSH = 4; public static final int ARM_MB_RESERVED_4 = 5; public static final int ARM_MB_NSHLD = 6; public static final int ARM_MB_NSHST = 7; public static final int ARM_MB_NSH = 8; public static final int ARM_MB_RESERVED_8 = 9; public static final int ARM_MB_ISHLD = 10; public static final int ARM_MB_ISHST = 11; public static final int ARM_MB_ISH = 12; public static final int ARM_MB_RESERVED_12 = 13; public static final int ARM_MB_LD = 14; public static final int ARM_MB_ST = 15; public static final int ARM_MB_SY = 16; public static final int ARM_OP_INVALID = 0; public static final int ARM_OP_REG = 1; public static final int ARM_OP_IMM = 2; public static final int ARM_OP_MEM = 3; public static final int ARM_OP_FP = 4; public static final int ARM_OP_CIMM = 64; public static final int ARM_OP_PIMM = 65; public static final int ARM_OP_SETEND = 66; public static final int ARM_OP_SYSREG = 67; public static final int ARM_SETEND_INVALID = 0; public static final int ARM_SETEND_BE = 1; public static final int ARM_SETEND_LE = 2; public static final int ARM_CPSMODE_INVALID = 0; public static final int ARM_CPSMODE_IE = 2; public static final int ARM_CPSMODE_ID = 3; public static final int ARM_CPSFLAG_INVALID = 0; public static final int ARM_CPSFLAG_F = 1; public static final int ARM_CPSFLAG_I = 2; public static final int ARM_CPSFLAG_A = 4; public static final int ARM_CPSFLAG_NONE = 16; public static final int ARM_VECTORDATA_INVALID = 0; public static final int ARM_VECTORDATA_I8 = 1; public static final int ARM_VECTORDATA_I16 = 2; public static final int ARM_VECTORDATA_I32 = 3; public static final int ARM_VECTORDATA_I64 = 4; public static final int ARM_VECTORDATA_S8 = 5; public static final int ARM_VECTORDATA_S16 = 6; public static final int ARM_VECTORDATA_S32 = 7; public static final int ARM_VECTORDATA_S64 = 8; public static final int ARM_VECTORDATA_U8 = 9; public static final int ARM_VECTORDATA_U16 = 10; public static final int ARM_VECTORDATA_U32 = 11; public static final int ARM_VECTORDATA_U64 = 12; public static final int ARM_VECTORDATA_P8 = 13; public static final int ARM_VECTORDATA_F32 = 14; public static final int ARM_VECTORDATA_F64 = 15; public static final int ARM_VECTORDATA_F16F64 = 16; public static final int ARM_VECTORDATA_F64F16 = 17; public static final int ARM_VECTORDATA_F32F16 = 18; public static final int ARM_VECTORDATA_F16F32 = 19; public static final int ARM_VECTORDATA_F64F32 = 20; public static final int ARM_VECTORDATA_F32F64 = 21; public static final int ARM_VECTORDATA_S32F32 = 22; public static final int ARM_VECTORDATA_U32F32 = 23; public static final int ARM_VECTORDATA_F32S32 = 24; public static final int ARM_VECTORDATA_F32U32 = 25; public static final int ARM_VECTORDATA_F64S16 = 26; public static final int ARM_VECTORDATA_F32S16 = 27; public static final int ARM_VECTORDATA_F64S32 = 28; public static final int ARM_VECTORDATA_S16F64 = 29; public static final int ARM_VECTORDATA_S16F32 = 30; public static final int ARM_VECTORDATA_S32F64 = 31; public static final int ARM_VECTORDATA_U16F64 = 32; public static final int ARM_VECTORDATA_U16F32 = 33; public static final int ARM_VECTORDATA_U32F64 = 34; public static final int ARM_VECTORDATA_F64U16 = 35; public static final int ARM_VECTORDATA_F32U16 = 36; public static final int ARM_VECTORDATA_F64U32 = 37; public static final int ARM_REG_INVALID = 0; public static final int ARM_REG_APSR = 1; public static final int ARM_REG_APSR_NZCV = 2; public static final int ARM_REG_CPSR = 3; public static final int ARM_REG_FPEXC = 4; public static final int ARM_REG_FPINST = 5; public static final int ARM_REG_FPSCR = 6; public static final int ARM_REG_FPSCR_NZCV = 7; public static final int ARM_REG_FPSID = 8; public static final int ARM_REG_ITSTATE = 9; public static final int ARM_REG_LR = 10; public static final int ARM_REG_PC = 11; public static final int ARM_REG_SP = 12; public static final int ARM_REG_SPSR = 13; public static final int ARM_REG_D0 = 14; public static final int ARM_REG_D1 = 15; public static final int ARM_REG_D2 = 16; public static final int ARM_REG_D3 = 17; public static final int ARM_REG_D4 = 18; public static final int ARM_REG_D5 = 19; public static final int ARM_REG_D6 = 20; public static final int ARM_REG_D7 = 21; public static final int ARM_REG_D8 = 22; public static final int ARM_REG_D9 = 23; public static final int ARM_REG_D10 = 24; public static final int ARM_REG_D11 = 25; public static final int ARM_REG_D12 = 26; public static final int ARM_REG_D13 = 27; public static final int ARM_REG_D14 = 28; public static final int ARM_REG_D15 = 29; public static final int ARM_REG_D16 = 30; public static final int ARM_REG_D17 = 31; public static final int ARM_REG_D18 = 32; public static final int ARM_REG_D19 = 33; public static final int ARM_REG_D20 = 34; public static final int ARM_REG_D21 = 35; public static final int ARM_REG_D22 = 36; public static final int ARM_REG_D23 = 37; public static final int ARM_REG_D24 = 38; public static final int ARM_REG_D25 = 39; public static final int ARM_REG_D26 = 40; public static final int ARM_REG_D27 = 41; public static final int ARM_REG_D28 = 42; public static final int ARM_REG_D29 = 43; public static final int ARM_REG_D30 = 44; public static final int ARM_REG_D31 = 45; public static final int ARM_REG_FPINST2 = 46; public static final int ARM_REG_MVFR0 = 47; public static final int ARM_REG_MVFR1 = 48; public static final int ARM_REG_MVFR2 = 49; public static final int ARM_REG_Q0 = 50; public static final int ARM_REG_Q1 = 51; public static final int ARM_REG_Q2 = 52; public static final int ARM_REG_Q3 = 53; public static final int ARM_REG_Q4 = 54; public static final int ARM_REG_Q5 = 55; public static final int ARM_REG_Q6 = 56; public static final int ARM_REG_Q7 = 57; public static final int ARM_REG_Q8 = 58; public static final int ARM_REG_Q9 = 59; public static final int ARM_REG_Q10 = 60; public static final int ARM_REG_Q11 = 61; public static final int ARM_REG_Q12 = 62; public static final int ARM_REG_Q13 = 63; public static final int ARM_REG_Q14 = 64; public static final int ARM_REG_Q15 = 65; public static final int ARM_REG_R0 = 66; public static final int ARM_REG_R1 = 67; public static final int ARM_REG_R2 = 68; public static final int ARM_REG_R3 = 69; public static final int ARM_REG_R4 = 70; public static final int ARM_REG_R5 = 71; public static final int ARM_REG_R6 = 72; public static final int ARM_REG_R7 = 73; public static final int ARM_REG_R8 = 74; public static final int ARM_REG_R9 = 75; public static final int ARM_REG_R10 = 76; public static final int ARM_REG_R11 = 77; public static final int ARM_REG_R12 = 78; public static final int ARM_REG_S0 = 79; public static final int ARM_REG_S1 = 80; public static final int ARM_REG_S2 = 81; public static final int ARM_REG_S3 = 82; public static final int ARM_REG_S4 = 83; public static final int ARM_REG_S5 = 84; public static final int ARM_REG_S6 = 85; public static final int ARM_REG_S7 = 86; public static final int ARM_REG_S8 = 87; public static final int ARM_REG_S9 = 88; public static final int ARM_REG_S10 = 89; public static final int ARM_REG_S11 = 90; public static final int ARM_REG_S12 = 91; public static final int ARM_REG_S13 = 92; public static final int ARM_REG_S14 = 93; public static final int ARM_REG_S15 = 94; public static final int ARM_REG_S16 = 95; public static final int ARM_REG_S17 = 96; public static final int ARM_REG_S18 = 97; public static final int ARM_REG_S19 = 98; public static final int ARM_REG_S20 = 99; public static final int ARM_REG_S21 = 100; public static final int ARM_REG_S22 = 101; public static final int ARM_REG_S23 = 102; public static final int ARM_REG_S24 = 103; public static final int ARM_REG_S25 = 104; public static final int ARM_REG_S26 = 105; public static final int ARM_REG_S27 = 106; public static final int ARM_REG_S28 = 107; public static final int ARM_REG_S29 = 108; public static final int ARM_REG_S30 = 109; public static final int ARM_REG_S31 = 110; public static final int ARM_REG_ENDING = 111; public static final int ARM_REG_R13 = ARM_REG_SP; public static final int ARM_REG_R14 = ARM_REG_LR; public static final int ARM_REG_R15 = ARM_REG_PC; public static final int ARM_REG_SB = ARM_REG_R9; public static final int ARM_REG_SL = ARM_REG_R10; public static final int ARM_REG_FP = ARM_REG_R11; public static final int ARM_REG_IP = ARM_REG_R12; public static final int ARM_INS_INVALID = 0; public static final int ARM_INS_ADC = 1; public static final int ARM_INS_ADD = 2; public static final int ARM_INS_ADR = 3; public static final int ARM_INS_AESD = 4; public static final int ARM_INS_AESE = 5; public static final int ARM_INS_AESIMC = 6; public static final int ARM_INS_AESMC = 7; public static final int ARM_INS_AND = 8; public static final int ARM_INS_BFC = 9; public static final int ARM_INS_BFI = 10; public static final int ARM_INS_BIC = 11; public static final int ARM_INS_BKPT = 12; public static final int ARM_INS_BL = 13; public static final int ARM_INS_BLX = 14; public static final int ARM_INS_BX = 15; public static final int ARM_INS_BXJ = 16; public static final int ARM_INS_B = 17; public static final int ARM_INS_CDP = 18; public static final int ARM_INS_CDP2 = 19; public static final int ARM_INS_CLREX = 20; public static final int ARM_INS_CLZ = 21; public static final int ARM_INS_CMN = 22; public static final int ARM_INS_CMP = 23; public static final int ARM_INS_CPS = 24; public static final int ARM_INS_CRC32B = 25; public static final int ARM_INS_CRC32CB = 26; public static final int ARM_INS_CRC32CH = 27; public static final int ARM_INS_CRC32CW = 28; public static final int ARM_INS_CRC32H = 29; public static final int ARM_INS_CRC32W = 30; public static final int ARM_INS_DBG = 31; public static final int ARM_INS_DMB = 32; public static final int ARM_INS_DSB = 33; public static final int ARM_INS_EOR = 34; public static final int ARM_INS_ERET = 35; public static final int ARM_INS_VMOV = 36; public static final int ARM_INS_FLDMDBX = 37; public static final int ARM_INS_FLDMIAX = 38; public static final int ARM_INS_VMRS = 39; public static final int ARM_INS_FSTMDBX = 40; public static final int ARM_INS_FSTMIAX = 41; public static final int ARM_INS_HINT = 42; public static final int ARM_INS_HLT = 43; public static final int ARM_INS_HVC = 44; public static final int ARM_INS_ISB = 45; public static final int ARM_INS_LDA = 46; public static final int ARM_INS_LDAB = 47; public static final int ARM_INS_LDAEX = 48; public static final int ARM_INS_LDAEXB = 49; public static final int ARM_INS_LDAEXD = 50; public static final int ARM_INS_LDAEXH = 51; public static final int ARM_INS_LDAH = 52; public static final int ARM_INS_LDC2L = 53; public static final int ARM_INS_LDC2 = 54; public static final int ARM_INS_LDCL = 55; public static final int ARM_INS_LDC = 56; public static final int ARM_INS_LDMDA = 57; public static final int ARM_INS_LDMDB = 58; public static final int ARM_INS_LDM = 59; public static final int ARM_INS_LDMIB = 60; public static final int ARM_INS_LDRBT = 61; public static final int ARM_INS_LDRB = 62; public static final int ARM_INS_LDRD = 63; public static final int ARM_INS_LDREX = 64; public static final int ARM_INS_LDREXB = 65; public static final int ARM_INS_LDREXD = 66; public static final int ARM_INS_LDREXH = 67; public static final int ARM_INS_LDRH = 68; public static final int ARM_INS_LDRHT = 69; public static final int ARM_INS_LDRSB = 70; public static final int ARM_INS_LDRSBT = 71; public static final int ARM_INS_LDRSH = 72; public static final int ARM_INS_LDRSHT = 73; public static final int ARM_INS_LDRT = 74; public static final int ARM_INS_LDR = 75; public static final int ARM_INS_MCR = 76; public static final int ARM_INS_MCR2 = 77; public static final int ARM_INS_MCRR = 78; public static final int ARM_INS_MCRR2 = 79; public static final int ARM_INS_MLA = 80; public static final int ARM_INS_MLS = 81; public static final int ARM_INS_MOV = 82; public static final int ARM_INS_MOVT = 83; public static final int ARM_INS_MOVW = 84; public static final int ARM_INS_MRC = 85; public static final int ARM_INS_MRC2 = 86; public static final int ARM_INS_MRRC = 87; public static final int ARM_INS_MRRC2 = 88; public static final int ARM_INS_MRS = 89; public static final int ARM_INS_MSR = 90; public static final int ARM_INS_MUL = 91; public static final int ARM_INS_MVN = 92; public static final int ARM_INS_ORR = 93; public static final int ARM_INS_PKHBT = 94; public static final int ARM_INS_PKHTB = 95; public static final int ARM_INS_PLDW = 96; public static final int ARM_INS_PLD = 97; public static final int ARM_INS_PLI = 98; public static final int ARM_INS_QADD = 99; public static final int ARM_INS_QADD16 = 100; public static final int ARM_INS_QADD8 = 101; public static final int ARM_INS_QASX = 102; public static final int ARM_INS_QDADD = 103; public static final int ARM_INS_QDSUB = 104; public static final int ARM_INS_QSAX = 105; public static final int ARM_INS_QSUB = 106; public static final int ARM_INS_QSUB16 = 107; public static final int ARM_INS_QSUB8 = 108; public static final int ARM_INS_RBIT = 109; public static final int ARM_INS_REV = 110; public static final int ARM_INS_REV16 = 111; public static final int ARM_INS_REVSH = 112; public static final int ARM_INS_RFEDA = 113; public static final int ARM_INS_RFEDB = 114; public static final int ARM_INS_RFEIA = 115; public static final int ARM_INS_RFEIB = 116; public static final int ARM_INS_RSB = 117; public static final int ARM_INS_RSC = 118; public static final int ARM_INS_SADD16 = 119; public static final int ARM_INS_SADD8 = 120; public static final int ARM_INS_SASX = 121; public static final int ARM_INS_SBC = 122; public static final int ARM_INS_SBFX = 123; public static final int ARM_INS_SDIV = 124; public static final int ARM_INS_SEL = 125; public static final int ARM_INS_SETEND = 126; public static final int ARM_INS_SHA1C = 127; public static final int ARM_INS_SHA1H = 128; public static final int ARM_INS_SHA1M = 129; public static final int ARM_INS_SHA1P = 130; public static final int ARM_INS_SHA1SU0 = 131; public static final int ARM_INS_SHA1SU1 = 132; public static final int ARM_INS_SHA256H = 133; public static final int ARM_INS_SHA256H2 = 134; public static final int ARM_INS_SHA256SU0 = 135; public static final int ARM_INS_SHA256SU1 = 136; public static final int ARM_INS_SHADD16 = 137; public static final int ARM_INS_SHADD8 = 138; public static final int ARM_INS_SHASX = 139; public static final int ARM_INS_SHSAX = 140; public static final int ARM_INS_SHSUB16 = 141; public static final int ARM_INS_SHSUB8 = 142; public static final int ARM_INS_SMC = 143; public static final int ARM_INS_SMLABB = 144; public static final int ARM_INS_SMLABT = 145; public static final int ARM_INS_SMLAD = 146; public static final int ARM_INS_SMLADX = 147; public static final int ARM_INS_SMLAL = 148; public static final int ARM_INS_SMLALBB = 149; public static final int ARM_INS_SMLALBT = 150; public static final int ARM_INS_SMLALD = 151; public static final int ARM_INS_SMLALDX = 152; public static final int ARM_INS_SMLALTB = 153; public static final int ARM_INS_SMLALTT = 154; public static final int ARM_INS_SMLATB = 155; public static final int ARM_INS_SMLATT = 156; public static final int ARM_INS_SMLAWB = 157; public static final int ARM_INS_SMLAWT = 158; public static final int ARM_INS_SMLSD = 159; public static final int ARM_INS_SMLSDX = 160; public static final int ARM_INS_SMLSLD = 161; public static final int ARM_INS_SMLSLDX = 162; public static final int ARM_INS_SMMLA = 163; public static final int ARM_INS_SMMLAR = 164; public static final int ARM_INS_SMMLS = 165; public static final int ARM_INS_SMMLSR = 166; public static final int ARM_INS_SMMUL = 167; public static final int ARM_INS_SMMULR = 168; public static final int ARM_INS_SMUAD = 169; public static final int ARM_INS_SMUADX = 170; public static final int ARM_INS_SMULBB = 171; public static final int ARM_INS_SMULBT = 172; public static final int ARM_INS_SMULL = 173; public static final int ARM_INS_SMULTB = 174; public static final int ARM_INS_SMULTT = 175; public static final int ARM_INS_SMULWB = 176; public static final int ARM_INS_SMULWT = 177; public static final int ARM_INS_SMUSD = 178; public static final int ARM_INS_SMUSDX = 179; public static final int ARM_INS_SRSDA = 180; public static final int ARM_INS_SRSDB = 181; public static final int ARM_INS_SRSIA = 182; public static final int ARM_INS_SRSIB = 183; public static final int ARM_INS_SSAT = 184; public static final int ARM_INS_SSAT16 = 185; public static final int ARM_INS_SSAX = 186; public static final int ARM_INS_SSUB16 = 187; public static final int ARM_INS_SSUB8 = 188; public static final int ARM_INS_STC2L = 189; public static final int ARM_INS_STC2 = 190; public static final int ARM_INS_STCL = 191; public static final int ARM_INS_STC = 192; public static final int ARM_INS_STL = 193; public static final int ARM_INS_STLB = 194; public static final int ARM_INS_STLEX = 195; public static final int ARM_INS_STLEXB = 196; public static final int ARM_INS_STLEXD = 197; public static final int ARM_INS_STLEXH = 198; public static final int ARM_INS_STLH = 199; public static final int ARM_INS_STMDA = 200; public static final int ARM_INS_STMDB = 201; public static final int ARM_INS_STM = 202; public static final int ARM_INS_STMIB = 203; public static final int ARM_INS_STRBT = 204; public static final int ARM_INS_STRB = 205; public static final int ARM_INS_STRD = 206; public static final int ARM_INS_STREX = 207; public static final int ARM_INS_STREXB = 208; public static final int ARM_INS_STREXD = 209; public static final int ARM_INS_STREXH = 210; public static final int ARM_INS_STRH = 211; public static final int ARM_INS_STRHT = 212; public static final int ARM_INS_STRT = 213; public static final int ARM_INS_STR = 214; public static final int ARM_INS_SUB = 215; public static final int ARM_INS_SVC = 216; public static final int ARM_INS_SWP = 217; public static final int ARM_INS_SWPB = 218; public static final int ARM_INS_SXTAB = 219; public static final int ARM_INS_SXTAB16 = 220; public static final int ARM_INS_SXTAH = 221; public static final int ARM_INS_SXTB = 222; public static final int ARM_INS_SXTB16 = 223; public static final int ARM_INS_SXTH = 224; public static final int ARM_INS_TEQ = 225; public static final int ARM_INS_TRAP = 226; public static final int ARM_INS_TST = 227; public static final int ARM_INS_UADD16 = 228; public static final int ARM_INS_UADD8 = 229; public static final int ARM_INS_UASX = 230; public static final int ARM_INS_UBFX = 231; public static final int ARM_INS_UDF = 232; public static final int ARM_INS_UDIV = 233; public static final int ARM_INS_UHADD16 = 234; public static final int ARM_INS_UHADD8 = 235; public static final int ARM_INS_UHASX = 236; public static final int ARM_INS_UHSAX = 237; public static final int ARM_INS_UHSUB16 = 238; public static final int ARM_INS_UHSUB8 = 239; public static final int ARM_INS_UMAAL = 240; public static final int ARM_INS_UMLAL = 241; public static final int ARM_INS_UMULL = 242; public static final int ARM_INS_UQADD16 = 243; public static final int ARM_INS_UQADD8 = 244; public static final int ARM_INS_UQASX = 245; public static final int ARM_INS_UQSAX = 246; public static final int ARM_INS_UQSUB16 = 247; public static final int ARM_INS_UQSUB8 = 248; public static final int ARM_INS_USAD8 = 249; public static final int ARM_INS_USADA8 = 250; public static final int ARM_INS_USAT = 251; public static final int ARM_INS_USAT16 = 252; public static final int ARM_INS_USAX = 253; public static final int ARM_INS_USUB16 = 254; public static final int ARM_INS_USUB8 = 255; public static final int ARM_INS_UXTAB = 256; public static final int ARM_INS_UXTAB16 = 257; public static final int ARM_INS_UXTAH = 258; public static final int ARM_INS_UXTB = 259; public static final int ARM_INS_UXTB16 = 260; public static final int ARM_INS_UXTH = 261; public static final int ARM_INS_VABAL = 262; public static final int ARM_INS_VABA = 263; public static final int ARM_INS_VABDL = 264; public static final int ARM_INS_VABD = 265; public static final int ARM_INS_VABS = 266; public static final int ARM_INS_VACGE = 267; public static final int ARM_INS_VACGT = 268; public static final int ARM_INS_VADD = 269; public static final int ARM_INS_VADDHN = 270; public static final int ARM_INS_VADDL = 271; public static final int ARM_INS_VADDW = 272; public static final int ARM_INS_VAND = 273; public static final int ARM_INS_VBIC = 274; public static final int ARM_INS_VBIF = 275; public static final int ARM_INS_VBIT = 276; public static final int ARM_INS_VBSL = 277; public static final int ARM_INS_VCEQ = 278; public static final int ARM_INS_VCGE = 279; public static final int ARM_INS_VCGT = 280; public static final int ARM_INS_VCLE = 281; public static final int ARM_INS_VCLS = 282; public static final int ARM_INS_VCLT = 283; public static final int ARM_INS_VCLZ = 284; public static final int ARM_INS_VCMP = 285; public static final int ARM_INS_VCMPE = 286; public static final int ARM_INS_VCNT = 287; public static final int ARM_INS_VCVTA = 288; public static final int ARM_INS_VCVTB = 289; public static final int ARM_INS_VCVT = 290; public static final int ARM_INS_VCVTM = 291; public static final int ARM_INS_VCVTN = 292; public static final int ARM_INS_VCVTP = 293; public static final int ARM_INS_VCVTT = 294; public static final int ARM_INS_VDIV = 295; public static final int ARM_INS_VDUP = 296; public static final int ARM_INS_VEOR = 297; public static final int ARM_INS_VEXT = 298; public static final int ARM_INS_VFMA = 299; public static final int ARM_INS_VFMS = 300; public static final int ARM_INS_VFNMA = 301; public static final int ARM_INS_VFNMS = 302; public static final int ARM_INS_VHADD = 303; public static final int ARM_INS_VHSUB = 304; public static final int ARM_INS_VLD1 = 305; public static final int ARM_INS_VLD2 = 306; public static final int ARM_INS_VLD3 = 307; public static final int ARM_INS_VLD4 = 308; public static final int ARM_INS_VLDMDB = 309; public static final int ARM_INS_VLDMIA = 310; public static final int ARM_INS_VLDR = 311; public static final int ARM_INS_VMAXNM = 312; public static final int ARM_INS_VMAX = 313; public static final int ARM_INS_VMINNM = 314; public static final int ARM_INS_VMIN = 315; public static final int ARM_INS_VMLA = 316; public static final int ARM_INS_VMLAL = 317; public static final int ARM_INS_VMLS = 318; public static final int ARM_INS_VMLSL = 319; public static final int ARM_INS_VMOVL = 320; public static final int ARM_INS_VMOVN = 321; public static final int ARM_INS_VMSR = 322; public static final int ARM_INS_VMUL = 323; public static final int ARM_INS_VMULL = 324; public static final int ARM_INS_VMVN = 325; public static final int ARM_INS_VNEG = 326; public static final int ARM_INS_VNMLA = 327; public static final int ARM_INS_VNMLS = 328; public static final int ARM_INS_VNMUL = 329; public static final int ARM_INS_VORN = 330; public static final int ARM_INS_VORR = 331; public static final int ARM_INS_VPADAL = 332; public static final int ARM_INS_VPADDL = 333; public static final int ARM_INS_VPADD = 334; public static final int ARM_INS_VPMAX = 335; public static final int ARM_INS_VPMIN = 336; public static final int ARM_INS_VQABS = 337; public static final int ARM_INS_VQADD = 338; public static final int ARM_INS_VQDMLAL = 339; public static final int ARM_INS_VQDMLSL = 340; public static final int ARM_INS_VQDMULH = 341; public static final int ARM_INS_VQDMULL = 342; public static final int ARM_INS_VQMOVUN = 343; public static final int ARM_INS_VQMOVN = 344; public static final int ARM_INS_VQNEG = 345; public static final int ARM_INS_VQRDMULH = 346; public static final int ARM_INS_VQRSHL = 347; public static final int ARM_INS_VQRSHRN = 348; public static final int ARM_INS_VQRSHRUN = 349; public static final int ARM_INS_VQSHL = 350; public static final int ARM_INS_VQSHLU = 351; public static final int ARM_INS_VQSHRN = 352; public static final int ARM_INS_VQSHRUN = 353; public static final int ARM_INS_VQSUB = 354; public static final int ARM_INS_VRADDHN = 355; public static final int ARM_INS_VRECPE = 356; public static final int ARM_INS_VRECPS = 357; public static final int ARM_INS_VREV16 = 358; public static final int ARM_INS_VREV32 = 359; public static final int ARM_INS_VREV64 = 360; public static final int ARM_INS_VRHADD = 361; public static final int ARM_INS_VRINTA = 362; public static final int ARM_INS_VRINTM = 363; public static final int ARM_INS_VRINTN = 364; public static final int ARM_INS_VRINTP = 365; public static final int ARM_INS_VRINTR = 366; public static final int ARM_INS_VRINTX = 367; public static final int ARM_INS_VRINTZ = 368; public static final int ARM_INS_VRSHL = 369; public static final int ARM_INS_VRSHRN = 370; public static final int ARM_INS_VRSHR = 371; public static final int ARM_INS_VRSQRTE = 372; public static final int ARM_INS_VRSQRTS = 373; public static final int ARM_INS_VRSRA = 374; public static final int ARM_INS_VRSUBHN = 375; public static final int ARM_INS_VSELEQ = 376; public static final int ARM_INS_VSELGE = 377; public static final int ARM_INS_VSELGT = 378; public static final int ARM_INS_VSELVS = 379; public static final int ARM_INS_VSHLL = 380; public static final int ARM_INS_VSHL = 381; public static final int ARM_INS_VSHRN = 382; public static final int ARM_INS_VSHR = 383; public static final int ARM_INS_VSLI = 384; public static final int ARM_INS_VSQRT = 385; public static final int ARM_INS_VSRA = 386; public static final int ARM_INS_VSRI = 387; public static final int ARM_INS_VST1 = 388; public static final int ARM_INS_VST2 = 389; public static final int ARM_INS_VST3 = 390; public static final int ARM_INS_VST4 = 391; public static final int ARM_INS_VSTMDB = 392; public static final int ARM_INS_VSTMIA = 393; public static final int ARM_INS_VSTR = 394; public static final int ARM_INS_VSUB = 395; public static final int ARM_INS_VSUBHN = 396; public static final int ARM_INS_VSUBL = 397; public static final int ARM_INS_VSUBW = 398; public static final int ARM_INS_VSWP = 399; public static final int ARM_INS_VTBL = 400; public static final int ARM_INS_VTBX = 401; public static final int ARM_INS_VCVTR = 402; public static final int ARM_INS_VTRN = 403; public static final int ARM_INS_VTST = 404; public static final int ARM_INS_VUZP = 405; public static final int ARM_INS_VZIP = 406; public static final int ARM_INS_ADDW = 407; public static final int ARM_INS_ASR = 408; public static final int ARM_INS_DCPS1 = 409; public static final int ARM_INS_DCPS2 = 410; public static final int ARM_INS_DCPS3 = 411; public static final int ARM_INS_IT = 412; public static final int ARM_INS_LSL = 413; public static final int ARM_INS_LSR = 414; public static final int ARM_INS_ORN = 415; public static final int ARM_INS_ROR = 416; public static final int ARM_INS_RRX = 417; public static final int ARM_INS_SUBW = 418; public static final int ARM_INS_TBB = 419; public static final int ARM_INS_TBH = 420; public static final int ARM_INS_CBNZ = 421; public static final int ARM_INS_CBZ = 422; public static final int ARM_INS_POP = 423; public static final int ARM_INS_PUSH = 424; public static final int ARM_INS_NOP = 425; public static final int ARM_INS_YIELD = 426; public static final int ARM_INS_WFE = 427; public static final int ARM_INS_WFI = 428; public static final int ARM_INS_SEV = 429; public static final int ARM_INS_SEVL = 430; public static final int ARM_INS_VPUSH = 431; public static final int ARM_INS_VPOP = 432; public static final int ARM_INS_ENDING = 433; public static final int ARM_GRP_INVALID = 0; public static final int ARM_GRP_JUMP = 1; public static final int ARM_GRP_CALL = 2; public static final int ARM_GRP_INT = 4; public static final int ARM_GRP_PRIVILEGE = 6; public static final int ARM_GRP_BRANCH_RELATIVE = 7; public static final int ARM_GRP_CRYPTO = 128; public static final int ARM_GRP_DATABARRIER = 129; public static final int ARM_GRP_DIVIDE = 130; public static final int ARM_GRP_FPARMV8 = 131; public static final int ARM_GRP_MULTPRO = 132; public static final int ARM_GRP_NEON = 133; public static final int ARM_GRP_T2EXTRACTPACK = 134; public static final int ARM_GRP_THUMB2DSP = 135; public static final int ARM_GRP_TRUSTZONE = 136; public static final int ARM_GRP_V4T = 137; public static final int ARM_GRP_V5T = 138; public static final int ARM_GRP_V5TE = 139; public static final int ARM_GRP_V6 = 140; public static final int ARM_GRP_V6T2 = 141; public static final int ARM_GRP_V7 = 142; public static final int ARM_GRP_V8 = 143; public static final int ARM_GRP_VFP2 = 144; public static final int ARM_GRP_VFP3 = 145; public static final int ARM_GRP_VFP4 = 146; public static final int ARM_GRP_ARM = 147; public static final int ARM_GRP_MCLASS = 148; public static final int ARM_GRP_NOTMCLASS = 149; public static final int ARM_GRP_THUMB = 150; public static final int ARM_GRP_THUMB1ONLY = 151; public static final int ARM_GRP_THUMB2 = 152; public static final int ARM_GRP_PREV8 = 153; public static final int ARM_GRP_FPVMLX = 154; public static final int ARM_GRP_MULOPS = 155; public static final int ARM_GRP_CRC = 156; public static final int ARM_GRP_DPVFP = 157; public static final int ARM_GRP_V6M = 158; public static final int ARM_GRP_VIRTUALIZATION = 159; public static final int ARM_GRP_ENDING = 160; }capstone-sys-0.11.0/capstone/bindings/java/capstone/Capstone.java010066400017500001750000000504161363403403300232360ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Library; import com.sun.jna.Memory; import com.sun.jna.Native; import com.sun.jna.NativeLong; import com.sun.jna.ptr.ByteByReference; import com.sun.jna.ptr.NativeLongByReference; import com.sun.jna.Structure; import com.sun.jna.Union; import com.sun.jna.Pointer; import com.sun.jna.ptr.PointerByReference; import com.sun.jna.ptr.IntByReference; import java.util.List; import java.util.Arrays; import java.lang.RuntimeException; public class Capstone { protected static abstract class OpInfo {}; protected static abstract class UnionOpInfo extends Structure {}; public static class UnionArch extends Union { public static class ByValue extends UnionArch implements Union.ByValue {}; public Arm.UnionOpInfo arm; public Arm64.UnionOpInfo arm64; public X86.UnionOpInfo x86; public Mips.UnionOpInfo mips; public Ppc.UnionOpInfo ppc; public Sparc.UnionOpInfo sparc; public Systemz.UnionOpInfo sysz; public Xcore.UnionOpInfo xcore; public M680x.UnionOpInfo m680x; } protected static class _cs_insn extends Structure { // instruction ID. public int id; // instruction address. public long address; // instruction size. public short size; // machine bytes of instruction. public byte[] bytes; // instruction mnemonic. NOTE: irrelevant for diet engine. public byte[] mnemonic; // instruction operands. NOTE: irrelevant for diet engine. public byte[] op_str; // detail information of instruction. public _cs_detail.ByReference cs_detail; public _cs_insn() { bytes = new byte[16]; mnemonic = new byte[32]; op_str = new byte[160]; java.util.Arrays.fill(mnemonic, (byte) 0); java.util.Arrays.fill(op_str, (byte) 0); } public _cs_insn(Pointer p) { this(); useMemory(p); read(); } @Override public List getFieldOrder() { return Arrays.asList("id", "address", "size", "bytes", "mnemonic", "op_str", "cs_detail"); } } protected static class _cs_detail extends Structure { public static class ByReference extends _cs_detail implements Structure.ByReference {}; // list of all implicit registers being read. public short[] regs_read = new short[12]; public byte regs_read_count; // list of all implicit registers being written. public short[] regs_write = new short[20]; public byte regs_write_count; // list of semantic groups this instruction belongs to. public byte[] groups = new byte[8]; public byte groups_count; public UnionArch arch; @Override public List getFieldOrder() { return Arrays.asList("regs_read", "regs_read_count", "regs_write", "regs_write_count", "groups", "groups_count", "arch"); } } public static class CsInsn { private Pointer csh; private CS cs; private _cs_insn raw; private int arch; // instruction ID. public int id; // instruction address. public long address; // instruction size. public short size; // Machine bytes of this instruction, with number of bytes indicated by size above public byte[] bytes; // instruction mnemonic. NOTE: irrelevant for diet engine. public String mnemonic; // instruction operands. NOTE: irrelevant for diet engine. public String opStr; // list of all implicit registers being read. public short[] regsRead; // list of all implicit registers being written. public short[] regsWrite; // list of semantic groups this instruction belongs to. public byte[] groups; public OpInfo operands; public CsInsn (_cs_insn insn, int _arch, Pointer _csh, CS _cs, boolean diet) { id = insn.id; address = insn.address; size = insn.size; if (!diet) { int lm = 0; while (insn.mnemonic[lm++] != 0); int lo = 0; while (insn.op_str[lo++] != 0); mnemonic = new String(insn.mnemonic, 0, lm-1); opStr = new String(insn.op_str, 0, lo-1); bytes = Arrays.copyOf(insn.bytes, insn.size); } cs = _cs; arch = _arch; raw = insn; csh = _csh; if (insn.cs_detail != null) { if (!diet) { regsRead = new short[insn.cs_detail.regs_read_count]; for (int i=0; i 2017 */ package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.M680x_const.*; public class M680x { public static class OpIndexed extends Structure { public int base_reg; public int offset_reg; public short offset; public short offset_addr; public byte offset_bits; public byte inc_dec; public byte flags; @Override public List getFieldOrder() { return Arrays.asList("base_reg", "offset_reg", "offset", "offset_addr", "offset_bits", "inc_dec", "flags"); } } public static class OpRelative extends Structure { public short address; public short offset; @Override public List getFieldOrder() { return Arrays.asList("address", "offset"); } } public static class OpExtended extends Structure { public short address; public byte indirect; @Override public List getFieldOrder() { return Arrays.asList("address", "indirect"); } } public static class OpValue extends Union { public int imm; public int reg; public OpIndexed idx; public OpRelative rel; public OpExtended ext; public byte direct_addr; public byte const_val; @Override public List getFieldOrder() { return Arrays.asList("imm", "reg", "idx", "rel", "ext", "direct_addr", "const_val"); } } public static class Operand extends Structure { public int type; public OpValue value; public byte size; public byte access; public void read() { readField("type"); if (type == M680X_OP_IMMEDIATE) value.setType(Integer.TYPE); if (type == M680X_OP_REGISTER) value.setType(Integer.TYPE); if (type == M680X_OP_INDEXED) value.setType(OpIndexed.class); if (type == M680X_OP_RELATIVE) value.setType(OpRelative.class); if (type == M680X_OP_EXTENDED) value.setType(OpExtended.class); if (type == M680X_OP_DIRECT) value.setType(Integer.TYPE); if (type == M680X_OP_INVALID) return; readField("value"); readField("size"); readField("access"); } @Override public List getFieldOrder() { return Arrays.asList("type", "value", "size", "access"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public byte flags; public byte op_count; public Operand [] op; public UnionOpInfo() { op = new Operand[9]; } public void read() { readField("flags"); readField("op_count"); op = new Operand[op_count]; if (op_count != 0) readField("op"); } @Override public List getFieldOrder() { return Arrays.asList("flags", "op_count", "op"); } } public static class OpInfo extends Capstone.OpInfo { public byte flags; public Operand [] op = null; public OpInfo(UnionOpInfo op_info) { flags = op_info.flags; op = op_info.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/M680x_const.java010066400017500001750000000452011363402546700235210ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class M680x_const { public static final int M680X_OPERAND_COUNT = 9; public static final int M680X_REG_INVALID = 0; public static final int M680X_REG_A = 1; public static final int M680X_REG_B = 2; public static final int M680X_REG_E = 3; public static final int M680X_REG_F = 4; public static final int M680X_REG_0 = 5; public static final int M680X_REG_D = 6; public static final int M680X_REG_W = 7; public static final int M680X_REG_CC = 8; public static final int M680X_REG_DP = 9; public static final int M680X_REG_MD = 10; public static final int M680X_REG_HX = 11; public static final int M680X_REG_H = 12; public static final int M680X_REG_X = 13; public static final int M680X_REG_Y = 14; public static final int M680X_REG_S = 15; public static final int M680X_REG_U = 16; public static final int M680X_REG_V = 17; public static final int M680X_REG_Q = 18; public static final int M680X_REG_PC = 19; public static final int M680X_REG_TMP2 = 20; public static final int M680X_REG_TMP3 = 21; public static final int M680X_REG_ENDING = 22; public static final int M680X_OP_INVALID = 0; public static final int M680X_OP_REGISTER = 1; public static final int M680X_OP_IMMEDIATE = 2; public static final int M680X_OP_INDEXED = 3; public static final int M680X_OP_EXTENDED = 4; public static final int M680X_OP_DIRECT = 5; public static final int M680X_OP_RELATIVE = 6; public static final int M680X_OP_CONSTANT = 7; public static final int M680X_OFFSET_NONE = 0; public static final int M680X_OFFSET_BITS_5 = 5; public static final int M680X_OFFSET_BITS_8 = 8; public static final int M680X_OFFSET_BITS_9 = 9; public static final int M680X_OFFSET_BITS_16 = 16; public static final int M680X_IDX_INDIRECT = 1; public static final int M680X_IDX_NO_COMMA = 2; public static final int M680X_IDX_POST_INC_DEC = 4; public static final int M680X_GRP_INVALID = 0; public static final int M680X_GRP_JUMP = 1; public static final int M680X_GRP_CALL = 2; public static final int M680X_GRP_RET = 3; public static final int M680X_GRP_INT = 4; public static final int M680X_GRP_IRET = 5; public static final int M680X_GRP_PRIV = 6; public static final int M680X_GRP_BRAREL = 7; public static final int M680X_GRP_ENDING = 8; public static final int M680X_FIRST_OP_IN_MNEM = 1; public static final int M680X_SECOND_OP_IN_MNEM = 2; public static final int M680X_INS_INVLD = 0; public static final int M680X_INS_ABA = 1; public static final int M680X_INS_ABX = 2; public static final int M680X_INS_ABY = 3; public static final int M680X_INS_ADC = 4; public static final int M680X_INS_ADCA = 5; public static final int M680X_INS_ADCB = 6; public static final int M680X_INS_ADCD = 7; public static final int M680X_INS_ADCR = 8; public static final int M680X_INS_ADD = 9; public static final int M680X_INS_ADDA = 10; public static final int M680X_INS_ADDB = 11; public static final int M680X_INS_ADDD = 12; public static final int M680X_INS_ADDE = 13; public static final int M680X_INS_ADDF = 14; public static final int M680X_INS_ADDR = 15; public static final int M680X_INS_ADDW = 16; public static final int M680X_INS_AIM = 17; public static final int M680X_INS_AIS = 18; public static final int M680X_INS_AIX = 19; public static final int M680X_INS_AND = 20; public static final int M680X_INS_ANDA = 21; public static final int M680X_INS_ANDB = 22; public static final int M680X_INS_ANDCC = 23; public static final int M680X_INS_ANDD = 24; public static final int M680X_INS_ANDR = 25; public static final int M680X_INS_ASL = 26; public static final int M680X_INS_ASLA = 27; public static final int M680X_INS_ASLB = 28; public static final int M680X_INS_ASLD = 29; public static final int M680X_INS_ASR = 30; public static final int M680X_INS_ASRA = 31; public static final int M680X_INS_ASRB = 32; public static final int M680X_INS_ASRD = 33; public static final int M680X_INS_ASRX = 34; public static final int M680X_INS_BAND = 35; public static final int M680X_INS_BCC = 36; public static final int M680X_INS_BCLR = 37; public static final int M680X_INS_BCS = 38; public static final int M680X_INS_BEOR = 39; public static final int M680X_INS_BEQ = 40; public static final int M680X_INS_BGE = 41; public static final int M680X_INS_BGND = 42; public static final int M680X_INS_BGT = 43; public static final int M680X_INS_BHCC = 44; public static final int M680X_INS_BHCS = 45; public static final int M680X_INS_BHI = 46; public static final int M680X_INS_BIAND = 47; public static final int M680X_INS_BIEOR = 48; public static final int M680X_INS_BIH = 49; public static final int M680X_INS_BIL = 50; public static final int M680X_INS_BIOR = 51; public static final int M680X_INS_BIT = 52; public static final int M680X_INS_BITA = 53; public static final int M680X_INS_BITB = 54; public static final int M680X_INS_BITD = 55; public static final int M680X_INS_BITMD = 56; public static final int M680X_INS_BLE = 57; public static final int M680X_INS_BLS = 58; public static final int M680X_INS_BLT = 59; public static final int M680X_INS_BMC = 60; public static final int M680X_INS_BMI = 61; public static final int M680X_INS_BMS = 62; public static final int M680X_INS_BNE = 63; public static final int M680X_INS_BOR = 64; public static final int M680X_INS_BPL = 65; public static final int M680X_INS_BRCLR = 66; public static final int M680X_INS_BRSET = 67; public static final int M680X_INS_BRA = 68; public static final int M680X_INS_BRN = 69; public static final int M680X_INS_BSET = 70; public static final int M680X_INS_BSR = 71; public static final int M680X_INS_BVC = 72; public static final int M680X_INS_BVS = 73; public static final int M680X_INS_CALL = 74; public static final int M680X_INS_CBA = 75; public static final int M680X_INS_CBEQ = 76; public static final int M680X_INS_CBEQA = 77; public static final int M680X_INS_CBEQX = 78; public static final int M680X_INS_CLC = 79; public static final int M680X_INS_CLI = 80; public static final int M680X_INS_CLR = 81; public static final int M680X_INS_CLRA = 82; public static final int M680X_INS_CLRB = 83; public static final int M680X_INS_CLRD = 84; public static final int M680X_INS_CLRE = 85; public static final int M680X_INS_CLRF = 86; public static final int M680X_INS_CLRH = 87; public static final int M680X_INS_CLRW = 88; public static final int M680X_INS_CLRX = 89; public static final int M680X_INS_CLV = 90; public static final int M680X_INS_CMP = 91; public static final int M680X_INS_CMPA = 92; public static final int M680X_INS_CMPB = 93; public static final int M680X_INS_CMPD = 94; public static final int M680X_INS_CMPE = 95; public static final int M680X_INS_CMPF = 96; public static final int M680X_INS_CMPR = 97; public static final int M680X_INS_CMPS = 98; public static final int M680X_INS_CMPU = 99; public static final int M680X_INS_CMPW = 100; public static final int M680X_INS_CMPX = 101; public static final int M680X_INS_CMPY = 102; public static final int M680X_INS_COM = 103; public static final int M680X_INS_COMA = 104; public static final int M680X_INS_COMB = 105; public static final int M680X_INS_COMD = 106; public static final int M680X_INS_COME = 107; public static final int M680X_INS_COMF = 108; public static final int M680X_INS_COMW = 109; public static final int M680X_INS_COMX = 110; public static final int M680X_INS_CPD = 111; public static final int M680X_INS_CPHX = 112; public static final int M680X_INS_CPS = 113; public static final int M680X_INS_CPX = 114; public static final int M680X_INS_CPY = 115; public static final int M680X_INS_CWAI = 116; public static final int M680X_INS_DAA = 117; public static final int M680X_INS_DBEQ = 118; public static final int M680X_INS_DBNE = 119; public static final int M680X_INS_DBNZ = 120; public static final int M680X_INS_DBNZA = 121; public static final int M680X_INS_DBNZX = 122; public static final int M680X_INS_DEC = 123; public static final int M680X_INS_DECA = 124; public static final int M680X_INS_DECB = 125; public static final int M680X_INS_DECD = 126; public static final int M680X_INS_DECE = 127; public static final int M680X_INS_DECF = 128; public static final int M680X_INS_DECW = 129; public static final int M680X_INS_DECX = 130; public static final int M680X_INS_DES = 131; public static final int M680X_INS_DEX = 132; public static final int M680X_INS_DEY = 133; public static final int M680X_INS_DIV = 134; public static final int M680X_INS_DIVD = 135; public static final int M680X_INS_DIVQ = 136; public static final int M680X_INS_EDIV = 137; public static final int M680X_INS_EDIVS = 138; public static final int M680X_INS_EIM = 139; public static final int M680X_INS_EMACS = 140; public static final int M680X_INS_EMAXD = 141; public static final int M680X_INS_EMAXM = 142; public static final int M680X_INS_EMIND = 143; public static final int M680X_INS_EMINM = 144; public static final int M680X_INS_EMUL = 145; public static final int M680X_INS_EMULS = 146; public static final int M680X_INS_EOR = 147; public static final int M680X_INS_EORA = 148; public static final int M680X_INS_EORB = 149; public static final int M680X_INS_EORD = 150; public static final int M680X_INS_EORR = 151; public static final int M680X_INS_ETBL = 152; public static final int M680X_INS_EXG = 153; public static final int M680X_INS_FDIV = 154; public static final int M680X_INS_IBEQ = 155; public static final int M680X_INS_IBNE = 156; public static final int M680X_INS_IDIV = 157; public static final int M680X_INS_IDIVS = 158; public static final int M680X_INS_ILLGL = 159; public static final int M680X_INS_INC = 160; public static final int M680X_INS_INCA = 161; public static final int M680X_INS_INCB = 162; public static final int M680X_INS_INCD = 163; public static final int M680X_INS_INCE = 164; public static final int M680X_INS_INCF = 165; public static final int M680X_INS_INCW = 166; public static final int M680X_INS_INCX = 167; public static final int M680X_INS_INS = 168; public static final int M680X_INS_INX = 169; public static final int M680X_INS_INY = 170; public static final int M680X_INS_JMP = 171; public static final int M680X_INS_JSR = 172; public static final int M680X_INS_LBCC = 173; public static final int M680X_INS_LBCS = 174; public static final int M680X_INS_LBEQ = 175; public static final int M680X_INS_LBGE = 176; public static final int M680X_INS_LBGT = 177; public static final int M680X_INS_LBHI = 178; public static final int M680X_INS_LBLE = 179; public static final int M680X_INS_LBLS = 180; public static final int M680X_INS_LBLT = 181; public static final int M680X_INS_LBMI = 182; public static final int M680X_INS_LBNE = 183; public static final int M680X_INS_LBPL = 184; public static final int M680X_INS_LBRA = 185; public static final int M680X_INS_LBRN = 186; public static final int M680X_INS_LBSR = 187; public static final int M680X_INS_LBVC = 188; public static final int M680X_INS_LBVS = 189; public static final int M680X_INS_LDA = 190; public static final int M680X_INS_LDAA = 191; public static final int M680X_INS_LDAB = 192; public static final int M680X_INS_LDB = 193; public static final int M680X_INS_LDBT = 194; public static final int M680X_INS_LDD = 195; public static final int M680X_INS_LDE = 196; public static final int M680X_INS_LDF = 197; public static final int M680X_INS_LDHX = 198; public static final int M680X_INS_LDMD = 199; public static final int M680X_INS_LDQ = 200; public static final int M680X_INS_LDS = 201; public static final int M680X_INS_LDU = 202; public static final int M680X_INS_LDW = 203; public static final int M680X_INS_LDX = 204; public static final int M680X_INS_LDY = 205; public static final int M680X_INS_LEAS = 206; public static final int M680X_INS_LEAU = 207; public static final int M680X_INS_LEAX = 208; public static final int M680X_INS_LEAY = 209; public static final int M680X_INS_LSL = 210; public static final int M680X_INS_LSLA = 211; public static final int M680X_INS_LSLB = 212; public static final int M680X_INS_LSLD = 213; public static final int M680X_INS_LSLX = 214; public static final int M680X_INS_LSR = 215; public static final int M680X_INS_LSRA = 216; public static final int M680X_INS_LSRB = 217; public static final int M680X_INS_LSRD = 218; public static final int M680X_INS_LSRW = 219; public static final int M680X_INS_LSRX = 220; public static final int M680X_INS_MAXA = 221; public static final int M680X_INS_MAXM = 222; public static final int M680X_INS_MEM = 223; public static final int M680X_INS_MINA = 224; public static final int M680X_INS_MINM = 225; public static final int M680X_INS_MOV = 226; public static final int M680X_INS_MOVB = 227; public static final int M680X_INS_MOVW = 228; public static final int M680X_INS_MUL = 229; public static final int M680X_INS_MULD = 230; public static final int M680X_INS_NEG = 231; public static final int M680X_INS_NEGA = 232; public static final int M680X_INS_NEGB = 233; public static final int M680X_INS_NEGD = 234; public static final int M680X_INS_NEGX = 235; public static final int M680X_INS_NOP = 236; public static final int M680X_INS_NSA = 237; public static final int M680X_INS_OIM = 238; public static final int M680X_INS_ORA = 239; public static final int M680X_INS_ORAA = 240; public static final int M680X_INS_ORAB = 241; public static final int M680X_INS_ORB = 242; public static final int M680X_INS_ORCC = 243; public static final int M680X_INS_ORD = 244; public static final int M680X_INS_ORR = 245; public static final int M680X_INS_PSHA = 246; public static final int M680X_INS_PSHB = 247; public static final int M680X_INS_PSHC = 248; public static final int M680X_INS_PSHD = 249; public static final int M680X_INS_PSHH = 250; public static final int M680X_INS_PSHS = 251; public static final int M680X_INS_PSHSW = 252; public static final int M680X_INS_PSHU = 253; public static final int M680X_INS_PSHUW = 254; public static final int M680X_INS_PSHX = 255; public static final int M680X_INS_PSHY = 256; public static final int M680X_INS_PULA = 257; public static final int M680X_INS_PULB = 258; public static final int M680X_INS_PULC = 259; public static final int M680X_INS_PULD = 260; public static final int M680X_INS_PULH = 261; public static final int M680X_INS_PULS = 262; public static final int M680X_INS_PULSW = 263; public static final int M680X_INS_PULU = 264; public static final int M680X_INS_PULUW = 265; public static final int M680X_INS_PULX = 266; public static final int M680X_INS_PULY = 267; public static final int M680X_INS_REV = 268; public static final int M680X_INS_REVW = 269; public static final int M680X_INS_ROL = 270; public static final int M680X_INS_ROLA = 271; public static final int M680X_INS_ROLB = 272; public static final int M680X_INS_ROLD = 273; public static final int M680X_INS_ROLW = 274; public static final int M680X_INS_ROLX = 275; public static final int M680X_INS_ROR = 276; public static final int M680X_INS_RORA = 277; public static final int M680X_INS_RORB = 278; public static final int M680X_INS_RORD = 279; public static final int M680X_INS_RORW = 280; public static final int M680X_INS_RORX = 281; public static final int M680X_INS_RSP = 282; public static final int M680X_INS_RTC = 283; public static final int M680X_INS_RTI = 284; public static final int M680X_INS_RTS = 285; public static final int M680X_INS_SBA = 286; public static final int M680X_INS_SBC = 287; public static final int M680X_INS_SBCA = 288; public static final int M680X_INS_SBCB = 289; public static final int M680X_INS_SBCD = 290; public static final int M680X_INS_SBCR = 291; public static final int M680X_INS_SEC = 292; public static final int M680X_INS_SEI = 293; public static final int M680X_INS_SEV = 294; public static final int M680X_INS_SEX = 295; public static final int M680X_INS_SEXW = 296; public static final int M680X_INS_SLP = 297; public static final int M680X_INS_STA = 298; public static final int M680X_INS_STAA = 299; public static final int M680X_INS_STAB = 300; public static final int M680X_INS_STB = 301; public static final int M680X_INS_STBT = 302; public static final int M680X_INS_STD = 303; public static final int M680X_INS_STE = 304; public static final int M680X_INS_STF = 305; public static final int M680X_INS_STOP = 306; public static final int M680X_INS_STHX = 307; public static final int M680X_INS_STQ = 308; public static final int M680X_INS_STS = 309; public static final int M680X_INS_STU = 310; public static final int M680X_INS_STW = 311; public static final int M680X_INS_STX = 312; public static final int M680X_INS_STY = 313; public static final int M680X_INS_SUB = 314; public static final int M680X_INS_SUBA = 315; public static final int M680X_INS_SUBB = 316; public static final int M680X_INS_SUBD = 317; public static final int M680X_INS_SUBE = 318; public static final int M680X_INS_SUBF = 319; public static final int M680X_INS_SUBR = 320; public static final int M680X_INS_SUBW = 321; public static final int M680X_INS_SWI = 322; public static final int M680X_INS_SWI2 = 323; public static final int M680X_INS_SWI3 = 324; public static final int M680X_INS_SYNC = 325; public static final int M680X_INS_TAB = 326; public static final int M680X_INS_TAP = 327; public static final int M680X_INS_TAX = 328; public static final int M680X_INS_TBA = 329; public static final int M680X_INS_TBEQ = 330; public static final int M680X_INS_TBL = 331; public static final int M680X_INS_TBNE = 332; public static final int M680X_INS_TEST = 333; public static final int M680X_INS_TFM = 334; public static final int M680X_INS_TFR = 335; public static final int M680X_INS_TIM = 336; public static final int M680X_INS_TPA = 337; public static final int M680X_INS_TST = 338; public static final int M680X_INS_TSTA = 339; public static final int M680X_INS_TSTB = 340; public static final int M680X_INS_TSTD = 341; public static final int M680X_INS_TSTE = 342; public static final int M680X_INS_TSTF = 343; public static final int M680X_INS_TSTW = 344; public static final int M680X_INS_TSTX = 345; public static final int M680X_INS_TSX = 346; public static final int M680X_INS_TSY = 347; public static final int M680X_INS_TXA = 348; public static final int M680X_INS_TXS = 349; public static final int M680X_INS_TYS = 350; public static final int M680X_INS_WAI = 351; public static final int M680X_INS_WAIT = 352; public static final int M680X_INS_WAV = 353; public static final int M680X_INS_WAVR = 354; public static final int M680X_INS_XGDX = 355; public static final int M680X_INS_XGDY = 356; public static final int M680X_INS_ENDING = 357; }capstone-sys-0.11.0/capstone/bindings/java/capstone/M68k_const.java010066400017500001750000000534631363402546700234350ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class M68k_const { public static final int M68K_OPERAND_COUNT = 4; public static final int M68K_REG_INVALID = 0; public static final int M68K_REG_D0 = 1; public static final int M68K_REG_D1 = 2; public static final int M68K_REG_D2 = 3; public static final int M68K_REG_D3 = 4; public static final int M68K_REG_D4 = 5; public static final int M68K_REG_D5 = 6; public static final int M68K_REG_D6 = 7; public static final int M68K_REG_D7 = 8; public static final int M68K_REG_A0 = 9; public static final int M68K_REG_A1 = 10; public static final int M68K_REG_A2 = 11; public static final int M68K_REG_A3 = 12; public static final int M68K_REG_A4 = 13; public static final int M68K_REG_A5 = 14; public static final int M68K_REG_A6 = 15; public static final int M68K_REG_A7 = 16; public static final int M68K_REG_FP0 = 17; public static final int M68K_REG_FP1 = 18; public static final int M68K_REG_FP2 = 19; public static final int M68K_REG_FP3 = 20; public static final int M68K_REG_FP4 = 21; public static final int M68K_REG_FP5 = 22; public static final int M68K_REG_FP6 = 23; public static final int M68K_REG_FP7 = 24; public static final int M68K_REG_PC = 25; public static final int M68K_REG_SR = 26; public static final int M68K_REG_CCR = 27; public static final int M68K_REG_SFC = 28; public static final int M68K_REG_DFC = 29; public static final int M68K_REG_USP = 30; public static final int M68K_REG_VBR = 31; public static final int M68K_REG_CACR = 32; public static final int M68K_REG_CAAR = 33; public static final int M68K_REG_MSP = 34; public static final int M68K_REG_ISP = 35; public static final int M68K_REG_TC = 36; public static final int M68K_REG_ITT0 = 37; public static final int M68K_REG_ITT1 = 38; public static final int M68K_REG_DTT0 = 39; public static final int M68K_REG_DTT1 = 40; public static final int M68K_REG_MMUSR = 41; public static final int M68K_REG_URP = 42; public static final int M68K_REG_SRP = 43; public static final int M68K_REG_FPCR = 44; public static final int M68K_REG_FPSR = 45; public static final int M68K_REG_FPIAR = 46; public static final int M68K_REG_ENDING = 47; public static final int M68K_AM_NONE = 0; public static final int M68K_AM_REG_DIRECT_DATA = 1; public static final int M68K_AM_REG_DIRECT_ADDR = 2; public static final int M68K_AM_REGI_ADDR = 3; public static final int M68K_AM_REGI_ADDR_POST_INC = 4; public static final int M68K_AM_REGI_ADDR_PRE_DEC = 5; public static final int M68K_AM_REGI_ADDR_DISP = 6; public static final int M68K_AM_AREGI_INDEX_8_BIT_DISP = 7; public static final int M68K_AM_AREGI_INDEX_BASE_DISP = 8; public static final int M68K_AM_MEMI_POST_INDEX = 9; public static final int M68K_AM_MEMI_PRE_INDEX = 10; public static final int M68K_AM_PCI_DISP = 11; public static final int M68K_AM_PCI_INDEX_8_BIT_DISP = 12; public static final int M68K_AM_PCI_INDEX_BASE_DISP = 13; public static final int M68K_AM_PC_MEMI_POST_INDEX = 14; public static final int M68K_AM_PC_MEMI_PRE_INDEX = 15; public static final int M68K_AM_ABSOLUTE_DATA_SHORT = 16; public static final int M68K_AM_ABSOLUTE_DATA_LONG = 17; public static final int M68K_AM_IMMEDIATE = 18; public static final int M68K_AM_BRANCH_DISPLACEMENT = 19; public static final int M68K_OP_INVALID = 0; public static final int M68K_OP_REG = 1; public static final int M68K_OP_IMM = 2; public static final int M68K_OP_MEM = 3; public static final int M68K_OP_FP_SINGLE = 4; public static final int M68K_OP_FP_DOUBLE = 5; public static final int M68K_OP_REG_BITS = 6; public static final int M68K_OP_REG_PAIR = 7; public static final int M68K_OP_BR_DISP = 8; public static final int M68K_OP_BR_DISP_SIZE_INVALID = 0; public static final int M68K_OP_BR_DISP_SIZE_BYTE = 1; public static final int M68K_OP_BR_DISP_SIZE_WORD = 2; public static final int M68K_OP_BR_DISP_SIZE_LONG = 4; public static final int M68K_CPU_SIZE_NONE = 0; public static final int M68K_CPU_SIZE_BYTE = 1; public static final int M68K_CPU_SIZE_WORD = 2; public static final int M68K_CPU_SIZE_LONG = 4; public static final int M68K_FPU_SIZE_NONE = 0; public static final int M68K_FPU_SIZE_SINGLE = 4; public static final int M68K_FPU_SIZE_DOUBLE = 8; public static final int M68K_FPU_SIZE_EXTENDED = 12; public static final int M68K_SIZE_TYPE_INVALID = 0; public static final int M68K_SIZE_TYPE_CPU = 1; public static final int M68K_SIZE_TYPE_FPU = 2; public static final int M68K_INS_INVALID = 0; public static final int M68K_INS_ABCD = 1; public static final int M68K_INS_ADD = 2; public static final int M68K_INS_ADDA = 3; public static final int M68K_INS_ADDI = 4; public static final int M68K_INS_ADDQ = 5; public static final int M68K_INS_ADDX = 6; public static final int M68K_INS_AND = 7; public static final int M68K_INS_ANDI = 8; public static final int M68K_INS_ASL = 9; public static final int M68K_INS_ASR = 10; public static final int M68K_INS_BHS = 11; public static final int M68K_INS_BLO = 12; public static final int M68K_INS_BHI = 13; public static final int M68K_INS_BLS = 14; public static final int M68K_INS_BCC = 15; public static final int M68K_INS_BCS = 16; public static final int M68K_INS_BNE = 17; public static final int M68K_INS_BEQ = 18; public static final int M68K_INS_BVC = 19; public static final int M68K_INS_BVS = 20; public static final int M68K_INS_BPL = 21; public static final int M68K_INS_BMI = 22; public static final int M68K_INS_BGE = 23; public static final int M68K_INS_BLT = 24; public static final int M68K_INS_BGT = 25; public static final int M68K_INS_BLE = 26; public static final int M68K_INS_BRA = 27; public static final int M68K_INS_BSR = 28; public static final int M68K_INS_BCHG = 29; public static final int M68K_INS_BCLR = 30; public static final int M68K_INS_BSET = 31; public static final int M68K_INS_BTST = 32; public static final int M68K_INS_BFCHG = 33; public static final int M68K_INS_BFCLR = 34; public static final int M68K_INS_BFEXTS = 35; public static final int M68K_INS_BFEXTU = 36; public static final int M68K_INS_BFFFO = 37; public static final int M68K_INS_BFINS = 38; public static final int M68K_INS_BFSET = 39; public static final int M68K_INS_BFTST = 40; public static final int M68K_INS_BKPT = 41; public static final int M68K_INS_CALLM = 42; public static final int M68K_INS_CAS = 43; public static final int M68K_INS_CAS2 = 44; public static final int M68K_INS_CHK = 45; public static final int M68K_INS_CHK2 = 46; public static final int M68K_INS_CLR = 47; public static final int M68K_INS_CMP = 48; public static final int M68K_INS_CMPA = 49; public static final int M68K_INS_CMPI = 50; public static final int M68K_INS_CMPM = 51; public static final int M68K_INS_CMP2 = 52; public static final int M68K_INS_CINVL = 53; public static final int M68K_INS_CINVP = 54; public static final int M68K_INS_CINVA = 55; public static final int M68K_INS_CPUSHL = 56; public static final int M68K_INS_CPUSHP = 57; public static final int M68K_INS_CPUSHA = 58; public static final int M68K_INS_DBT = 59; public static final int M68K_INS_DBF = 60; public static final int M68K_INS_DBHI = 61; public static final int M68K_INS_DBLS = 62; public static final int M68K_INS_DBCC = 63; public static final int M68K_INS_DBCS = 64; public static final int M68K_INS_DBNE = 65; public static final int M68K_INS_DBEQ = 66; public static final int M68K_INS_DBVC = 67; public static final int M68K_INS_DBVS = 68; public static final int M68K_INS_DBPL = 69; public static final int M68K_INS_DBMI = 70; public static final int M68K_INS_DBGE = 71; public static final int M68K_INS_DBLT = 72; public static final int M68K_INS_DBGT = 73; public static final int M68K_INS_DBLE = 74; public static final int M68K_INS_DBRA = 75; public static final int M68K_INS_DIVS = 76; public static final int M68K_INS_DIVSL = 77; public static final int M68K_INS_DIVU = 78; public static final int M68K_INS_DIVUL = 79; public static final int M68K_INS_EOR = 80; public static final int M68K_INS_EORI = 81; public static final int M68K_INS_EXG = 82; public static final int M68K_INS_EXT = 83; public static final int M68K_INS_EXTB = 84; public static final int M68K_INS_FABS = 85; public static final int M68K_INS_FSABS = 86; public static final int M68K_INS_FDABS = 87; public static final int M68K_INS_FACOS = 88; public static final int M68K_INS_FADD = 89; public static final int M68K_INS_FSADD = 90; public static final int M68K_INS_FDADD = 91; public static final int M68K_INS_FASIN = 92; public static final int M68K_INS_FATAN = 93; public static final int M68K_INS_FATANH = 94; public static final int M68K_INS_FBF = 95; public static final int M68K_INS_FBEQ = 96; public static final int M68K_INS_FBOGT = 97; public static final int M68K_INS_FBOGE = 98; public static final int M68K_INS_FBOLT = 99; public static final int M68K_INS_FBOLE = 100; public static final int M68K_INS_FBOGL = 101; public static final int M68K_INS_FBOR = 102; public static final int M68K_INS_FBUN = 103; public static final int M68K_INS_FBUEQ = 104; public static final int M68K_INS_FBUGT = 105; public static final int M68K_INS_FBUGE = 106; public static final int M68K_INS_FBULT = 107; public static final int M68K_INS_FBULE = 108; public static final int M68K_INS_FBNE = 109; public static final int M68K_INS_FBT = 110; public static final int M68K_INS_FBSF = 111; public static final int M68K_INS_FBSEQ = 112; public static final int M68K_INS_FBGT = 113; public static final int M68K_INS_FBGE = 114; public static final int M68K_INS_FBLT = 115; public static final int M68K_INS_FBLE = 116; public static final int M68K_INS_FBGL = 117; public static final int M68K_INS_FBGLE = 118; public static final int M68K_INS_FBNGLE = 119; public static final int M68K_INS_FBNGL = 120; public static final int M68K_INS_FBNLE = 121; public static final int M68K_INS_FBNLT = 122; public static final int M68K_INS_FBNGE = 123; public static final int M68K_INS_FBNGT = 124; public static final int M68K_INS_FBSNE = 125; public static final int M68K_INS_FBST = 126; public static final int M68K_INS_FCMP = 127; public static final int M68K_INS_FCOS = 128; public static final int M68K_INS_FCOSH = 129; public static final int M68K_INS_FDBF = 130; public static final int M68K_INS_FDBEQ = 131; public static final int M68K_INS_FDBOGT = 132; public static final int M68K_INS_FDBOGE = 133; public static final int M68K_INS_FDBOLT = 134; public static final int M68K_INS_FDBOLE = 135; public static final int M68K_INS_FDBOGL = 136; public static final int M68K_INS_FDBOR = 137; public static final int M68K_INS_FDBUN = 138; public static final int M68K_INS_FDBUEQ = 139; public static final int M68K_INS_FDBUGT = 140; public static final int M68K_INS_FDBUGE = 141; public static final int M68K_INS_FDBULT = 142; public static final int M68K_INS_FDBULE = 143; public static final int M68K_INS_FDBNE = 144; public static final int M68K_INS_FDBT = 145; public static final int M68K_INS_FDBSF = 146; public static final int M68K_INS_FDBSEQ = 147; public static final int M68K_INS_FDBGT = 148; public static final int M68K_INS_FDBGE = 149; public static final int M68K_INS_FDBLT = 150; public static final int M68K_INS_FDBLE = 151; public static final int M68K_INS_FDBGL = 152; public static final int M68K_INS_FDBGLE = 153; public static final int M68K_INS_FDBNGLE = 154; public static final int M68K_INS_FDBNGL = 155; public static final int M68K_INS_FDBNLE = 156; public static final int M68K_INS_FDBNLT = 157; public static final int M68K_INS_FDBNGE = 158; public static final int M68K_INS_FDBNGT = 159; public static final int M68K_INS_FDBSNE = 160; public static final int M68K_INS_FDBST = 161; public static final int M68K_INS_FDIV = 162; public static final int M68K_INS_FSDIV = 163; public static final int M68K_INS_FDDIV = 164; public static final int M68K_INS_FETOX = 165; public static final int M68K_INS_FETOXM1 = 166; public static final int M68K_INS_FGETEXP = 167; public static final int M68K_INS_FGETMAN = 168; public static final int M68K_INS_FINT = 169; public static final int M68K_INS_FINTRZ = 170; public static final int M68K_INS_FLOG10 = 171; public static final int M68K_INS_FLOG2 = 172; public static final int M68K_INS_FLOGN = 173; public static final int M68K_INS_FLOGNP1 = 174; public static final int M68K_INS_FMOD = 175; public static final int M68K_INS_FMOVE = 176; public static final int M68K_INS_FSMOVE = 177; public static final int M68K_INS_FDMOVE = 178; public static final int M68K_INS_FMOVECR = 179; public static final int M68K_INS_FMOVEM = 180; public static final int M68K_INS_FMUL = 181; public static final int M68K_INS_FSMUL = 182; public static final int M68K_INS_FDMUL = 183; public static final int M68K_INS_FNEG = 184; public static final int M68K_INS_FSNEG = 185; public static final int M68K_INS_FDNEG = 186; public static final int M68K_INS_FNOP = 187; public static final int M68K_INS_FREM = 188; public static final int M68K_INS_FRESTORE = 189; public static final int M68K_INS_FSAVE = 190; public static final int M68K_INS_FSCALE = 191; public static final int M68K_INS_FSGLDIV = 192; public static final int M68K_INS_FSGLMUL = 193; public static final int M68K_INS_FSIN = 194; public static final int M68K_INS_FSINCOS = 195; public static final int M68K_INS_FSINH = 196; public static final int M68K_INS_FSQRT = 197; public static final int M68K_INS_FSSQRT = 198; public static final int M68K_INS_FDSQRT = 199; public static final int M68K_INS_FSF = 200; public static final int M68K_INS_FSBEQ = 201; public static final int M68K_INS_FSOGT = 202; public static final int M68K_INS_FSOGE = 203; public static final int M68K_INS_FSOLT = 204; public static final int M68K_INS_FSOLE = 205; public static final int M68K_INS_FSOGL = 206; public static final int M68K_INS_FSOR = 207; public static final int M68K_INS_FSUN = 208; public static final int M68K_INS_FSUEQ = 209; public static final int M68K_INS_FSUGT = 210; public static final int M68K_INS_FSUGE = 211; public static final int M68K_INS_FSULT = 212; public static final int M68K_INS_FSULE = 213; public static final int M68K_INS_FSNE = 214; public static final int M68K_INS_FST = 215; public static final int M68K_INS_FSSF = 216; public static final int M68K_INS_FSSEQ = 217; public static final int M68K_INS_FSGT = 218; public static final int M68K_INS_FSGE = 219; public static final int M68K_INS_FSLT = 220; public static final int M68K_INS_FSLE = 221; public static final int M68K_INS_FSGL = 222; public static final int M68K_INS_FSGLE = 223; public static final int M68K_INS_FSNGLE = 224; public static final int M68K_INS_FSNGL = 225; public static final int M68K_INS_FSNLE = 226; public static final int M68K_INS_FSNLT = 227; public static final int M68K_INS_FSNGE = 228; public static final int M68K_INS_FSNGT = 229; public static final int M68K_INS_FSSNE = 230; public static final int M68K_INS_FSST = 231; public static final int M68K_INS_FSUB = 232; public static final int M68K_INS_FSSUB = 233; public static final int M68K_INS_FDSUB = 234; public static final int M68K_INS_FTAN = 235; public static final int M68K_INS_FTANH = 236; public static final int M68K_INS_FTENTOX = 237; public static final int M68K_INS_FTRAPF = 238; public static final int M68K_INS_FTRAPEQ = 239; public static final int M68K_INS_FTRAPOGT = 240; public static final int M68K_INS_FTRAPOGE = 241; public static final int M68K_INS_FTRAPOLT = 242; public static final int M68K_INS_FTRAPOLE = 243; public static final int M68K_INS_FTRAPOGL = 244; public static final int M68K_INS_FTRAPOR = 245; public static final int M68K_INS_FTRAPUN = 246; public static final int M68K_INS_FTRAPUEQ = 247; public static final int M68K_INS_FTRAPUGT = 248; public static final int M68K_INS_FTRAPUGE = 249; public static final int M68K_INS_FTRAPULT = 250; public static final int M68K_INS_FTRAPULE = 251; public static final int M68K_INS_FTRAPNE = 252; public static final int M68K_INS_FTRAPT = 253; public static final int M68K_INS_FTRAPSF = 254; public static final int M68K_INS_FTRAPSEQ = 255; public static final int M68K_INS_FTRAPGT = 256; public static final int M68K_INS_FTRAPGE = 257; public static final int M68K_INS_FTRAPLT = 258; public static final int M68K_INS_FTRAPLE = 259; public static final int M68K_INS_FTRAPGL = 260; public static final int M68K_INS_FTRAPGLE = 261; public static final int M68K_INS_FTRAPNGLE = 262; public static final int M68K_INS_FTRAPNGL = 263; public static final int M68K_INS_FTRAPNLE = 264; public static final int M68K_INS_FTRAPNLT = 265; public static final int M68K_INS_FTRAPNGE = 266; public static final int M68K_INS_FTRAPNGT = 267; public static final int M68K_INS_FTRAPSNE = 268; public static final int M68K_INS_FTRAPST = 269; public static final int M68K_INS_FTST = 270; public static final int M68K_INS_FTWOTOX = 271; public static final int M68K_INS_HALT = 272; public static final int M68K_INS_ILLEGAL = 273; public static final int M68K_INS_JMP = 274; public static final int M68K_INS_JSR = 275; public static final int M68K_INS_LEA = 276; public static final int M68K_INS_LINK = 277; public static final int M68K_INS_LPSTOP = 278; public static final int M68K_INS_LSL = 279; public static final int M68K_INS_LSR = 280; public static final int M68K_INS_MOVE = 281; public static final int M68K_INS_MOVEA = 282; public static final int M68K_INS_MOVEC = 283; public static final int M68K_INS_MOVEM = 284; public static final int M68K_INS_MOVEP = 285; public static final int M68K_INS_MOVEQ = 286; public static final int M68K_INS_MOVES = 287; public static final int M68K_INS_MOVE16 = 288; public static final int M68K_INS_MULS = 289; public static final int M68K_INS_MULU = 290; public static final int M68K_INS_NBCD = 291; public static final int M68K_INS_NEG = 292; public static final int M68K_INS_NEGX = 293; public static final int M68K_INS_NOP = 294; public static final int M68K_INS_NOT = 295; public static final int M68K_INS_OR = 296; public static final int M68K_INS_ORI = 297; public static final int M68K_INS_PACK = 298; public static final int M68K_INS_PEA = 299; public static final int M68K_INS_PFLUSH = 300; public static final int M68K_INS_PFLUSHA = 301; public static final int M68K_INS_PFLUSHAN = 302; public static final int M68K_INS_PFLUSHN = 303; public static final int M68K_INS_PLOADR = 304; public static final int M68K_INS_PLOADW = 305; public static final int M68K_INS_PLPAR = 306; public static final int M68K_INS_PLPAW = 307; public static final int M68K_INS_PMOVE = 308; public static final int M68K_INS_PMOVEFD = 309; public static final int M68K_INS_PTESTR = 310; public static final int M68K_INS_PTESTW = 311; public static final int M68K_INS_PULSE = 312; public static final int M68K_INS_REMS = 313; public static final int M68K_INS_REMU = 314; public static final int M68K_INS_RESET = 315; public static final int M68K_INS_ROL = 316; public static final int M68K_INS_ROR = 317; public static final int M68K_INS_ROXL = 318; public static final int M68K_INS_ROXR = 319; public static final int M68K_INS_RTD = 320; public static final int M68K_INS_RTE = 321; public static final int M68K_INS_RTM = 322; public static final int M68K_INS_RTR = 323; public static final int M68K_INS_RTS = 324; public static final int M68K_INS_SBCD = 325; public static final int M68K_INS_ST = 326; public static final int M68K_INS_SF = 327; public static final int M68K_INS_SHI = 328; public static final int M68K_INS_SLS = 329; public static final int M68K_INS_SCC = 330; public static final int M68K_INS_SHS = 331; public static final int M68K_INS_SCS = 332; public static final int M68K_INS_SLO = 333; public static final int M68K_INS_SNE = 334; public static final int M68K_INS_SEQ = 335; public static final int M68K_INS_SVC = 336; public static final int M68K_INS_SVS = 337; public static final int M68K_INS_SPL = 338; public static final int M68K_INS_SMI = 339; public static final int M68K_INS_SGE = 340; public static final int M68K_INS_SLT = 341; public static final int M68K_INS_SGT = 342; public static final int M68K_INS_SLE = 343; public static final int M68K_INS_STOP = 344; public static final int M68K_INS_SUB = 345; public static final int M68K_INS_SUBA = 346; public static final int M68K_INS_SUBI = 347; public static final int M68K_INS_SUBQ = 348; public static final int M68K_INS_SUBX = 349; public static final int M68K_INS_SWAP = 350; public static final int M68K_INS_TAS = 351; public static final int M68K_INS_TRAP = 352; public static final int M68K_INS_TRAPV = 353; public static final int M68K_INS_TRAPT = 354; public static final int M68K_INS_TRAPF = 355; public static final int M68K_INS_TRAPHI = 356; public static final int M68K_INS_TRAPLS = 357; public static final int M68K_INS_TRAPCC = 358; public static final int M68K_INS_TRAPHS = 359; public static final int M68K_INS_TRAPCS = 360; public static final int M68K_INS_TRAPLO = 361; public static final int M68K_INS_TRAPNE = 362; public static final int M68K_INS_TRAPEQ = 363; public static final int M68K_INS_TRAPVC = 364; public static final int M68K_INS_TRAPVS = 365; public static final int M68K_INS_TRAPPL = 366; public static final int M68K_INS_TRAPMI = 367; public static final int M68K_INS_TRAPGE = 368; public static final int M68K_INS_TRAPLT = 369; public static final int M68K_INS_TRAPGT = 370; public static final int M68K_INS_TRAPLE = 371; public static final int M68K_INS_TST = 372; public static final int M68K_INS_UNLK = 373; public static final int M68K_INS_UNPK = 374; public static final int M68K_INS_ENDING = 375; public static final int M68K_GRP_INVALID = 0; public static final int M68K_GRP_JUMP = 1; public static final int M68K_GRP_RET = 3; public static final int M68K_GRP_IRET = 5; public static final int M68K_GRP_BRANCH_RELATIVE = 7; public static final int M68K_GRP_ENDING = 8; }capstone-sys-0.11.0/capstone/bindings/java/capstone/Mips.java010066400017500001750000000033661363402546700224070ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.Mips_const.*; public class Mips { public static class MemType extends Structure { public int base; public long disp; @Override public List getFieldOrder() { return Arrays.asList("base", "disp"); } } public static class OpValue extends Union { public int reg; public long imm; public MemType mem; @Override public List getFieldOrder() { return Arrays.asList("reg", "imm", "mem"); } } public static class Operand extends Structure { public int type; public OpValue value; public void read() { super.read(); if (type == MIPS_OP_MEM) value.setType(MemType.class); if (type == MIPS_OP_IMM) value.setType(Long.TYPE); if (type == MIPS_OP_REG) value.setType(Integer.TYPE); if (type == MIPS_OP_INVALID) return; readField("value"); } @Override public List getFieldOrder() { return Arrays.asList("type", "value"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public byte op_count; public Operand [] op; public UnionOpInfo() { op = new Operand[10]; } public void read() { readField("op_count"); op = new Operand[op_count]; if (op_count != 0) readField("op"); } @Override public List getFieldOrder() { return Arrays.asList("op_count", "op"); } } public static class OpInfo extends Capstone.OpInfo { public Operand [] op; public OpInfo(UnionOpInfo e) { op = e.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/Mips_const.java010066400017500001750000001156601363402546700236160ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class Mips_const { public static final int MIPS_OP_INVALID = 0; public static final int MIPS_OP_REG = 1; public static final int MIPS_OP_IMM = 2; public static final int MIPS_OP_MEM = 3; public static final int MIPS_REG_INVALID = 0; public static final int MIPS_REG_PC = 1; public static final int MIPS_REG_0 = 2; public static final int MIPS_REG_1 = 3; public static final int MIPS_REG_2 = 4; public static final int MIPS_REG_3 = 5; public static final int MIPS_REG_4 = 6; public static final int MIPS_REG_5 = 7; public static final int MIPS_REG_6 = 8; public static final int MIPS_REG_7 = 9; public static final int MIPS_REG_8 = 10; public static final int MIPS_REG_9 = 11; public static final int MIPS_REG_10 = 12; public static final int MIPS_REG_11 = 13; public static final int MIPS_REG_12 = 14; public static final int MIPS_REG_13 = 15; public static final int MIPS_REG_14 = 16; public static final int MIPS_REG_15 = 17; public static final int MIPS_REG_16 = 18; public static final int MIPS_REG_17 = 19; public static final int MIPS_REG_18 = 20; public static final int MIPS_REG_19 = 21; public static final int MIPS_REG_20 = 22; public static final int MIPS_REG_21 = 23; public static final int MIPS_REG_22 = 24; public static final int MIPS_REG_23 = 25; public static final int MIPS_REG_24 = 26; public static final int MIPS_REG_25 = 27; public static final int MIPS_REG_26 = 28; public static final int MIPS_REG_27 = 29; public static final int MIPS_REG_28 = 30; public static final int MIPS_REG_29 = 31; public static final int MIPS_REG_30 = 32; public static final int MIPS_REG_31 = 33; public static final int MIPS_REG_DSPCCOND = 34; public static final int MIPS_REG_DSPCARRY = 35; public static final int MIPS_REG_DSPEFI = 36; public static final int MIPS_REG_DSPOUTFLAG = 37; public static final int MIPS_REG_DSPOUTFLAG16_19 = 38; public static final int MIPS_REG_DSPOUTFLAG20 = 39; public static final int MIPS_REG_DSPOUTFLAG21 = 40; public static final int MIPS_REG_DSPOUTFLAG22 = 41; public static final int MIPS_REG_DSPOUTFLAG23 = 42; public static final int MIPS_REG_DSPPOS = 43; public static final int MIPS_REG_DSPSCOUNT = 44; public static final int MIPS_REG_AC0 = 45; public static final int MIPS_REG_AC1 = 46; public static final int MIPS_REG_AC2 = 47; public static final int MIPS_REG_AC3 = 48; public static final int MIPS_REG_CC0 = 49; public static final int MIPS_REG_CC1 = 50; public static final int MIPS_REG_CC2 = 51; public static final int MIPS_REG_CC3 = 52; public static final int MIPS_REG_CC4 = 53; public static final int MIPS_REG_CC5 = 54; public static final int MIPS_REG_CC6 = 55; public static final int MIPS_REG_CC7 = 56; public static final int MIPS_REG_F0 = 57; public static final int MIPS_REG_F1 = 58; public static final int MIPS_REG_F2 = 59; public static final int MIPS_REG_F3 = 60; public static final int MIPS_REG_F4 = 61; public static final int MIPS_REG_F5 = 62; public static final int MIPS_REG_F6 = 63; public static final int MIPS_REG_F7 = 64; public static final int MIPS_REG_F8 = 65; public static final int MIPS_REG_F9 = 66; public static final int MIPS_REG_F10 = 67; public static final int MIPS_REG_F11 = 68; public static final int MIPS_REG_F12 = 69; public static final int MIPS_REG_F13 = 70; public static final int MIPS_REG_F14 = 71; public static final int MIPS_REG_F15 = 72; public static final int MIPS_REG_F16 = 73; public static final int MIPS_REG_F17 = 74; public static final int MIPS_REG_F18 = 75; public static final int MIPS_REG_F19 = 76; public static final int MIPS_REG_F20 = 77; public static final int MIPS_REG_F21 = 78; public static final int MIPS_REG_F22 = 79; public static final int MIPS_REG_F23 = 80; public static final int MIPS_REG_F24 = 81; public static final int MIPS_REG_F25 = 82; public static final int MIPS_REG_F26 = 83; public static final int MIPS_REG_F27 = 84; public static final int MIPS_REG_F28 = 85; public static final int MIPS_REG_F29 = 86; public static final int MIPS_REG_F30 = 87; public static final int MIPS_REG_F31 = 88; public static final int MIPS_REG_FCC0 = 89; public static final int MIPS_REG_FCC1 = 90; public static final int MIPS_REG_FCC2 = 91; public static final int MIPS_REG_FCC3 = 92; public static final int MIPS_REG_FCC4 = 93; public static final int MIPS_REG_FCC5 = 94; public static final int MIPS_REG_FCC6 = 95; public static final int MIPS_REG_FCC7 = 96; public static final int MIPS_REG_W0 = 97; public static final int MIPS_REG_W1 = 98; public static final int MIPS_REG_W2 = 99; public static final int MIPS_REG_W3 = 100; public static final int MIPS_REG_W4 = 101; public static final int MIPS_REG_W5 = 102; public static final int MIPS_REG_W6 = 103; public static final int MIPS_REG_W7 = 104; public static final int MIPS_REG_W8 = 105; public static final int MIPS_REG_W9 = 106; public static final int MIPS_REG_W10 = 107; public static final int MIPS_REG_W11 = 108; public static final int MIPS_REG_W12 = 109; public static final int MIPS_REG_W13 = 110; public static final int MIPS_REG_W14 = 111; public static final int MIPS_REG_W15 = 112; public static final int MIPS_REG_W16 = 113; public static final int MIPS_REG_W17 = 114; public static final int MIPS_REG_W18 = 115; public static final int MIPS_REG_W19 = 116; public static final int MIPS_REG_W20 = 117; public static final int MIPS_REG_W21 = 118; public static final int MIPS_REG_W22 = 119; public static final int MIPS_REG_W23 = 120; public static final int MIPS_REG_W24 = 121; public static final int MIPS_REG_W25 = 122; public static final int MIPS_REG_W26 = 123; public static final int MIPS_REG_W27 = 124; public static final int MIPS_REG_W28 = 125; public static final int MIPS_REG_W29 = 126; public static final int MIPS_REG_W30 = 127; public static final int MIPS_REG_W31 = 128; public static final int MIPS_REG_HI = 129; public static final int MIPS_REG_LO = 130; public static final int MIPS_REG_P0 = 131; public static final int MIPS_REG_P1 = 132; public static final int MIPS_REG_P2 = 133; public static final int MIPS_REG_MPL0 = 134; public static final int MIPS_REG_MPL1 = 135; public static final int MIPS_REG_MPL2 = 136; public static final int MIPS_REG_ENDING = 137; public static final int MIPS_REG_ZERO = MIPS_REG_0; public static final int MIPS_REG_AT = MIPS_REG_1; public static final int MIPS_REG_V0 = MIPS_REG_2; public static final int MIPS_REG_V1 = MIPS_REG_3; public static final int MIPS_REG_A0 = MIPS_REG_4; public static final int MIPS_REG_A1 = MIPS_REG_5; public static final int MIPS_REG_A2 = MIPS_REG_6; public static final int MIPS_REG_A3 = MIPS_REG_7; public static final int MIPS_REG_T0 = MIPS_REG_8; public static final int MIPS_REG_T1 = MIPS_REG_9; public static final int MIPS_REG_T2 = MIPS_REG_10; public static final int MIPS_REG_T3 = MIPS_REG_11; public static final int MIPS_REG_T4 = MIPS_REG_12; public static final int MIPS_REG_T5 = MIPS_REG_13; public static final int MIPS_REG_T6 = MIPS_REG_14; public static final int MIPS_REG_T7 = MIPS_REG_15; public static final int MIPS_REG_S0 = MIPS_REG_16; public static final int MIPS_REG_S1 = MIPS_REG_17; public static final int MIPS_REG_S2 = MIPS_REG_18; public static final int MIPS_REG_S3 = MIPS_REG_19; public static final int MIPS_REG_S4 = MIPS_REG_20; public static final int MIPS_REG_S5 = MIPS_REG_21; public static final int MIPS_REG_S6 = MIPS_REG_22; public static final int MIPS_REG_S7 = MIPS_REG_23; public static final int MIPS_REG_T8 = MIPS_REG_24; public static final int MIPS_REG_T9 = MIPS_REG_25; public static final int MIPS_REG_K0 = MIPS_REG_26; public static final int MIPS_REG_K1 = MIPS_REG_27; public static final int MIPS_REG_GP = MIPS_REG_28; public static final int MIPS_REG_SP = MIPS_REG_29; public static final int MIPS_REG_FP = MIPS_REG_30; public static final int MIPS_REG_S8 = MIPS_REG_30; public static final int MIPS_REG_RA = MIPS_REG_31; public static final int MIPS_REG_HI0 = MIPS_REG_AC0; public static final int MIPS_REG_HI1 = MIPS_REG_AC1; public static final int MIPS_REG_HI2 = MIPS_REG_AC2; public static final int MIPS_REG_HI3 = MIPS_REG_AC3; public static final int MIPS_REG_LO0 = MIPS_REG_HI0; public static final int MIPS_REG_LO1 = MIPS_REG_HI1; public static final int MIPS_REG_LO2 = MIPS_REG_HI2; public static final int MIPS_REG_LO3 = MIPS_REG_HI3; public static final int MIPS_INS_INVALID = 0; public static final int MIPS_INS_ABSQ_S = 1; public static final int MIPS_INS_ADD = 2; public static final int MIPS_INS_ADDIUPC = 3; public static final int MIPS_INS_ADDIUR1SP = 4; public static final int MIPS_INS_ADDIUR2 = 5; public static final int MIPS_INS_ADDIUS5 = 6; public static final int MIPS_INS_ADDIUSP = 7; public static final int MIPS_INS_ADDQH = 8; public static final int MIPS_INS_ADDQH_R = 9; public static final int MIPS_INS_ADDQ = 10; public static final int MIPS_INS_ADDQ_S = 11; public static final int MIPS_INS_ADDSC = 12; public static final int MIPS_INS_ADDS_A = 13; public static final int MIPS_INS_ADDS_S = 14; public static final int MIPS_INS_ADDS_U = 15; public static final int MIPS_INS_ADDU16 = 16; public static final int MIPS_INS_ADDUH = 17; public static final int MIPS_INS_ADDUH_R = 18; public static final int MIPS_INS_ADDU = 19; public static final int MIPS_INS_ADDU_S = 20; public static final int MIPS_INS_ADDVI = 21; public static final int MIPS_INS_ADDV = 22; public static final int MIPS_INS_ADDWC = 23; public static final int MIPS_INS_ADD_A = 24; public static final int MIPS_INS_ADDI = 25; public static final int MIPS_INS_ADDIU = 26; public static final int MIPS_INS_ALIGN = 27; public static final int MIPS_INS_ALUIPC = 28; public static final int MIPS_INS_AND = 29; public static final int MIPS_INS_AND16 = 30; public static final int MIPS_INS_ANDI16 = 31; public static final int MIPS_INS_ANDI = 32; public static final int MIPS_INS_APPEND = 33; public static final int MIPS_INS_ASUB_S = 34; public static final int MIPS_INS_ASUB_U = 35; public static final int MIPS_INS_AUI = 36; public static final int MIPS_INS_AUIPC = 37; public static final int MIPS_INS_AVER_S = 38; public static final int MIPS_INS_AVER_U = 39; public static final int MIPS_INS_AVE_S = 40; public static final int MIPS_INS_AVE_U = 41; public static final int MIPS_INS_B16 = 42; public static final int MIPS_INS_BADDU = 43; public static final int MIPS_INS_BAL = 44; public static final int MIPS_INS_BALC = 45; public static final int MIPS_INS_BALIGN = 46; public static final int MIPS_INS_BBIT0 = 47; public static final int MIPS_INS_BBIT032 = 48; public static final int MIPS_INS_BBIT1 = 49; public static final int MIPS_INS_BBIT132 = 50; public static final int MIPS_INS_BC = 51; public static final int MIPS_INS_BC0F = 52; public static final int MIPS_INS_BC0FL = 53; public static final int MIPS_INS_BC0T = 54; public static final int MIPS_INS_BC0TL = 55; public static final int MIPS_INS_BC1EQZ = 56; public static final int MIPS_INS_BC1F = 57; public static final int MIPS_INS_BC1FL = 58; public static final int MIPS_INS_BC1NEZ = 59; public static final int MIPS_INS_BC1T = 60; public static final int MIPS_INS_BC1TL = 61; public static final int MIPS_INS_BC2EQZ = 62; public static final int MIPS_INS_BC2F = 63; public static final int MIPS_INS_BC2FL = 64; public static final int MIPS_INS_BC2NEZ = 65; public static final int MIPS_INS_BC2T = 66; public static final int MIPS_INS_BC2TL = 67; public static final int MIPS_INS_BC3F = 68; public static final int MIPS_INS_BC3FL = 69; public static final int MIPS_INS_BC3T = 70; public static final int MIPS_INS_BC3TL = 71; public static final int MIPS_INS_BCLRI = 72; public static final int MIPS_INS_BCLR = 73; public static final int MIPS_INS_BEQ = 74; public static final int MIPS_INS_BEQC = 75; public static final int MIPS_INS_BEQL = 76; public static final int MIPS_INS_BEQZ16 = 77; public static final int MIPS_INS_BEQZALC = 78; public static final int MIPS_INS_BEQZC = 79; public static final int MIPS_INS_BGEC = 80; public static final int MIPS_INS_BGEUC = 81; public static final int MIPS_INS_BGEZ = 82; public static final int MIPS_INS_BGEZAL = 83; public static final int MIPS_INS_BGEZALC = 84; public static final int MIPS_INS_BGEZALL = 85; public static final int MIPS_INS_BGEZALS = 86; public static final int MIPS_INS_BGEZC = 87; public static final int MIPS_INS_BGEZL = 88; public static final int MIPS_INS_BGTZ = 89; public static final int MIPS_INS_BGTZALC = 90; public static final int MIPS_INS_BGTZC = 91; public static final int MIPS_INS_BGTZL = 92; public static final int MIPS_INS_BINSLI = 93; public static final int MIPS_INS_BINSL = 94; public static final int MIPS_INS_BINSRI = 95; public static final int MIPS_INS_BINSR = 96; public static final int MIPS_INS_BITREV = 97; public static final int MIPS_INS_BITSWAP = 98; public static final int MIPS_INS_BLEZ = 99; public static final int MIPS_INS_BLEZALC = 100; public static final int MIPS_INS_BLEZC = 101; public static final int MIPS_INS_BLEZL = 102; public static final int MIPS_INS_BLTC = 103; public static final int MIPS_INS_BLTUC = 104; public static final int MIPS_INS_BLTZ = 105; public static final int MIPS_INS_BLTZAL = 106; public static final int MIPS_INS_BLTZALC = 107; public static final int MIPS_INS_BLTZALL = 108; public static final int MIPS_INS_BLTZALS = 109; public static final int MIPS_INS_BLTZC = 110; public static final int MIPS_INS_BLTZL = 111; public static final int MIPS_INS_BMNZI = 112; public static final int MIPS_INS_BMNZ = 113; public static final int MIPS_INS_BMZI = 114; public static final int MIPS_INS_BMZ = 115; public static final int MIPS_INS_BNE = 116; public static final int MIPS_INS_BNEC = 117; public static final int MIPS_INS_BNEGI = 118; public static final int MIPS_INS_BNEG = 119; public static final int MIPS_INS_BNEL = 120; public static final int MIPS_INS_BNEZ16 = 121; public static final int MIPS_INS_BNEZALC = 122; public static final int MIPS_INS_BNEZC = 123; public static final int MIPS_INS_BNVC = 124; public static final int MIPS_INS_BNZ = 125; public static final int MIPS_INS_BOVC = 126; public static final int MIPS_INS_BPOSGE32 = 127; public static final int MIPS_INS_BREAK = 128; public static final int MIPS_INS_BREAK16 = 129; public static final int MIPS_INS_BSELI = 130; public static final int MIPS_INS_BSEL = 131; public static final int MIPS_INS_BSETI = 132; public static final int MIPS_INS_BSET = 133; public static final int MIPS_INS_BZ = 134; public static final int MIPS_INS_BEQZ = 135; public static final int MIPS_INS_B = 136; public static final int MIPS_INS_BNEZ = 137; public static final int MIPS_INS_BTEQZ = 138; public static final int MIPS_INS_BTNEZ = 139; public static final int MIPS_INS_CACHE = 140; public static final int MIPS_INS_CEIL = 141; public static final int MIPS_INS_CEQI = 142; public static final int MIPS_INS_CEQ = 143; public static final int MIPS_INS_CFC1 = 144; public static final int MIPS_INS_CFCMSA = 145; public static final int MIPS_INS_CINS = 146; public static final int MIPS_INS_CINS32 = 147; public static final int MIPS_INS_CLASS = 148; public static final int MIPS_INS_CLEI_S = 149; public static final int MIPS_INS_CLEI_U = 150; public static final int MIPS_INS_CLE_S = 151; public static final int MIPS_INS_CLE_U = 152; public static final int MIPS_INS_CLO = 153; public static final int MIPS_INS_CLTI_S = 154; public static final int MIPS_INS_CLTI_U = 155; public static final int MIPS_INS_CLT_S = 156; public static final int MIPS_INS_CLT_U = 157; public static final int MIPS_INS_CLZ = 158; public static final int MIPS_INS_CMPGDU = 159; public static final int MIPS_INS_CMPGU = 160; public static final int MIPS_INS_CMPU = 161; public static final int MIPS_INS_CMP = 162; public static final int MIPS_INS_COPY_S = 163; public static final int MIPS_INS_COPY_U = 164; public static final int MIPS_INS_CTC1 = 165; public static final int MIPS_INS_CTCMSA = 166; public static final int MIPS_INS_CVT = 167; public static final int MIPS_INS_C = 168; public static final int MIPS_INS_CMPI = 169; public static final int MIPS_INS_DADD = 170; public static final int MIPS_INS_DADDI = 171; public static final int MIPS_INS_DADDIU = 172; public static final int MIPS_INS_DADDU = 173; public static final int MIPS_INS_DAHI = 174; public static final int MIPS_INS_DALIGN = 175; public static final int MIPS_INS_DATI = 176; public static final int MIPS_INS_DAUI = 177; public static final int MIPS_INS_DBITSWAP = 178; public static final int MIPS_INS_DCLO = 179; public static final int MIPS_INS_DCLZ = 180; public static final int MIPS_INS_DDIV = 181; public static final int MIPS_INS_DDIVU = 182; public static final int MIPS_INS_DERET = 183; public static final int MIPS_INS_DEXT = 184; public static final int MIPS_INS_DEXTM = 185; public static final int MIPS_INS_DEXTU = 186; public static final int MIPS_INS_DI = 187; public static final int MIPS_INS_DINS = 188; public static final int MIPS_INS_DINSM = 189; public static final int MIPS_INS_DINSU = 190; public static final int MIPS_INS_DIV = 191; public static final int MIPS_INS_DIVU = 192; public static final int MIPS_INS_DIV_S = 193; public static final int MIPS_INS_DIV_U = 194; public static final int MIPS_INS_DLSA = 195; public static final int MIPS_INS_DMFC0 = 196; public static final int MIPS_INS_DMFC1 = 197; public static final int MIPS_INS_DMFC2 = 198; public static final int MIPS_INS_DMOD = 199; public static final int MIPS_INS_DMODU = 200; public static final int MIPS_INS_DMTC0 = 201; public static final int MIPS_INS_DMTC1 = 202; public static final int MIPS_INS_DMTC2 = 203; public static final int MIPS_INS_DMUH = 204; public static final int MIPS_INS_DMUHU = 205; public static final int MIPS_INS_DMUL = 206; public static final int MIPS_INS_DMULT = 207; public static final int MIPS_INS_DMULTU = 208; public static final int MIPS_INS_DMULU = 209; public static final int MIPS_INS_DOTP_S = 210; public static final int MIPS_INS_DOTP_U = 211; public static final int MIPS_INS_DPADD_S = 212; public static final int MIPS_INS_DPADD_U = 213; public static final int MIPS_INS_DPAQX_SA = 214; public static final int MIPS_INS_DPAQX_S = 215; public static final int MIPS_INS_DPAQ_SA = 216; public static final int MIPS_INS_DPAQ_S = 217; public static final int MIPS_INS_DPAU = 218; public static final int MIPS_INS_DPAX = 219; public static final int MIPS_INS_DPA = 220; public static final int MIPS_INS_DPOP = 221; public static final int MIPS_INS_DPSQX_SA = 222; public static final int MIPS_INS_DPSQX_S = 223; public static final int MIPS_INS_DPSQ_SA = 224; public static final int MIPS_INS_DPSQ_S = 225; public static final int MIPS_INS_DPSUB_S = 226; public static final int MIPS_INS_DPSUB_U = 227; public static final int MIPS_INS_DPSU = 228; public static final int MIPS_INS_DPSX = 229; public static final int MIPS_INS_DPS = 230; public static final int MIPS_INS_DROTR = 231; public static final int MIPS_INS_DROTR32 = 232; public static final int MIPS_INS_DROTRV = 233; public static final int MIPS_INS_DSBH = 234; public static final int MIPS_INS_DSHD = 235; public static final int MIPS_INS_DSLL = 236; public static final int MIPS_INS_DSLL32 = 237; public static final int MIPS_INS_DSLLV = 238; public static final int MIPS_INS_DSRA = 239; public static final int MIPS_INS_DSRA32 = 240; public static final int MIPS_INS_DSRAV = 241; public static final int MIPS_INS_DSRL = 242; public static final int MIPS_INS_DSRL32 = 243; public static final int MIPS_INS_DSRLV = 244; public static final int MIPS_INS_DSUB = 245; public static final int MIPS_INS_DSUBU = 246; public static final int MIPS_INS_EHB = 247; public static final int MIPS_INS_EI = 248; public static final int MIPS_INS_ERET = 249; public static final int MIPS_INS_EXT = 250; public static final int MIPS_INS_EXTP = 251; public static final int MIPS_INS_EXTPDP = 252; public static final int MIPS_INS_EXTPDPV = 253; public static final int MIPS_INS_EXTPV = 254; public static final int MIPS_INS_EXTRV_RS = 255; public static final int MIPS_INS_EXTRV_R = 256; public static final int MIPS_INS_EXTRV_S = 257; public static final int MIPS_INS_EXTRV = 258; public static final int MIPS_INS_EXTR_RS = 259; public static final int MIPS_INS_EXTR_R = 260; public static final int MIPS_INS_EXTR_S = 261; public static final int MIPS_INS_EXTR = 262; public static final int MIPS_INS_EXTS = 263; public static final int MIPS_INS_EXTS32 = 264; public static final int MIPS_INS_ABS = 265; public static final int MIPS_INS_FADD = 266; public static final int MIPS_INS_FCAF = 267; public static final int MIPS_INS_FCEQ = 268; public static final int MIPS_INS_FCLASS = 269; public static final int MIPS_INS_FCLE = 270; public static final int MIPS_INS_FCLT = 271; public static final int MIPS_INS_FCNE = 272; public static final int MIPS_INS_FCOR = 273; public static final int MIPS_INS_FCUEQ = 274; public static final int MIPS_INS_FCULE = 275; public static final int MIPS_INS_FCULT = 276; public static final int MIPS_INS_FCUNE = 277; public static final int MIPS_INS_FCUN = 278; public static final int MIPS_INS_FDIV = 279; public static final int MIPS_INS_FEXDO = 280; public static final int MIPS_INS_FEXP2 = 281; public static final int MIPS_INS_FEXUPL = 282; public static final int MIPS_INS_FEXUPR = 283; public static final int MIPS_INS_FFINT_S = 284; public static final int MIPS_INS_FFINT_U = 285; public static final int MIPS_INS_FFQL = 286; public static final int MIPS_INS_FFQR = 287; public static final int MIPS_INS_FILL = 288; public static final int MIPS_INS_FLOG2 = 289; public static final int MIPS_INS_FLOOR = 290; public static final int MIPS_INS_FMADD = 291; public static final int MIPS_INS_FMAX_A = 292; public static final int MIPS_INS_FMAX = 293; public static final int MIPS_INS_FMIN_A = 294; public static final int MIPS_INS_FMIN = 295; public static final int MIPS_INS_MOV = 296; public static final int MIPS_INS_FMSUB = 297; public static final int MIPS_INS_FMUL = 298; public static final int MIPS_INS_MUL = 299; public static final int MIPS_INS_NEG = 300; public static final int MIPS_INS_FRCP = 301; public static final int MIPS_INS_FRINT = 302; public static final int MIPS_INS_FRSQRT = 303; public static final int MIPS_INS_FSAF = 304; public static final int MIPS_INS_FSEQ = 305; public static final int MIPS_INS_FSLE = 306; public static final int MIPS_INS_FSLT = 307; public static final int MIPS_INS_FSNE = 308; public static final int MIPS_INS_FSOR = 309; public static final int MIPS_INS_FSQRT = 310; public static final int MIPS_INS_SQRT = 311; public static final int MIPS_INS_FSUB = 312; public static final int MIPS_INS_SUB = 313; public static final int MIPS_INS_FSUEQ = 314; public static final int MIPS_INS_FSULE = 315; public static final int MIPS_INS_FSULT = 316; public static final int MIPS_INS_FSUNE = 317; public static final int MIPS_INS_FSUN = 318; public static final int MIPS_INS_FTINT_S = 319; public static final int MIPS_INS_FTINT_U = 320; public static final int MIPS_INS_FTQ = 321; public static final int MIPS_INS_FTRUNC_S = 322; public static final int MIPS_INS_FTRUNC_U = 323; public static final int MIPS_INS_HADD_S = 324; public static final int MIPS_INS_HADD_U = 325; public static final int MIPS_INS_HSUB_S = 326; public static final int MIPS_INS_HSUB_U = 327; public static final int MIPS_INS_ILVEV = 328; public static final int MIPS_INS_ILVL = 329; public static final int MIPS_INS_ILVOD = 330; public static final int MIPS_INS_ILVR = 331; public static final int MIPS_INS_INS = 332; public static final int MIPS_INS_INSERT = 333; public static final int MIPS_INS_INSV = 334; public static final int MIPS_INS_INSVE = 335; public static final int MIPS_INS_J = 336; public static final int MIPS_INS_JAL = 337; public static final int MIPS_INS_JALR = 338; public static final int MIPS_INS_JALRS16 = 339; public static final int MIPS_INS_JALRS = 340; public static final int MIPS_INS_JALS = 341; public static final int MIPS_INS_JALX = 342; public static final int MIPS_INS_JIALC = 343; public static final int MIPS_INS_JIC = 344; public static final int MIPS_INS_JR = 345; public static final int MIPS_INS_JR16 = 346; public static final int MIPS_INS_JRADDIUSP = 347; public static final int MIPS_INS_JRC = 348; public static final int MIPS_INS_JALRC = 349; public static final int MIPS_INS_LB = 350; public static final int MIPS_INS_LBU16 = 351; public static final int MIPS_INS_LBUX = 352; public static final int MIPS_INS_LBU = 353; public static final int MIPS_INS_LD = 354; public static final int MIPS_INS_LDC1 = 355; public static final int MIPS_INS_LDC2 = 356; public static final int MIPS_INS_LDC3 = 357; public static final int MIPS_INS_LDI = 358; public static final int MIPS_INS_LDL = 359; public static final int MIPS_INS_LDPC = 360; public static final int MIPS_INS_LDR = 361; public static final int MIPS_INS_LDXC1 = 362; public static final int MIPS_INS_LH = 363; public static final int MIPS_INS_LHU16 = 364; public static final int MIPS_INS_LHX = 365; public static final int MIPS_INS_LHU = 366; public static final int MIPS_INS_LI16 = 367; public static final int MIPS_INS_LL = 368; public static final int MIPS_INS_LLD = 369; public static final int MIPS_INS_LSA = 370; public static final int MIPS_INS_LUXC1 = 371; public static final int MIPS_INS_LUI = 372; public static final int MIPS_INS_LW = 373; public static final int MIPS_INS_LW16 = 374; public static final int MIPS_INS_LWC1 = 375; public static final int MIPS_INS_LWC2 = 376; public static final int MIPS_INS_LWC3 = 377; public static final int MIPS_INS_LWL = 378; public static final int MIPS_INS_LWM16 = 379; public static final int MIPS_INS_LWM32 = 380; public static final int MIPS_INS_LWPC = 381; public static final int MIPS_INS_LWP = 382; public static final int MIPS_INS_LWR = 383; public static final int MIPS_INS_LWUPC = 384; public static final int MIPS_INS_LWU = 385; public static final int MIPS_INS_LWX = 386; public static final int MIPS_INS_LWXC1 = 387; public static final int MIPS_INS_LWXS = 388; public static final int MIPS_INS_LI = 389; public static final int MIPS_INS_MADD = 390; public static final int MIPS_INS_MADDF = 391; public static final int MIPS_INS_MADDR_Q = 392; public static final int MIPS_INS_MADDU = 393; public static final int MIPS_INS_MADDV = 394; public static final int MIPS_INS_MADD_Q = 395; public static final int MIPS_INS_MAQ_SA = 396; public static final int MIPS_INS_MAQ_S = 397; public static final int MIPS_INS_MAXA = 398; public static final int MIPS_INS_MAXI_S = 399; public static final int MIPS_INS_MAXI_U = 400; public static final int MIPS_INS_MAX_A = 401; public static final int MIPS_INS_MAX = 402; public static final int MIPS_INS_MAX_S = 403; public static final int MIPS_INS_MAX_U = 404; public static final int MIPS_INS_MFC0 = 405; public static final int MIPS_INS_MFC1 = 406; public static final int MIPS_INS_MFC2 = 407; public static final int MIPS_INS_MFHC1 = 408; public static final int MIPS_INS_MFHI = 409; public static final int MIPS_INS_MFLO = 410; public static final int MIPS_INS_MINA = 411; public static final int MIPS_INS_MINI_S = 412; public static final int MIPS_INS_MINI_U = 413; public static final int MIPS_INS_MIN_A = 414; public static final int MIPS_INS_MIN = 415; public static final int MIPS_INS_MIN_S = 416; public static final int MIPS_INS_MIN_U = 417; public static final int MIPS_INS_MOD = 418; public static final int MIPS_INS_MODSUB = 419; public static final int MIPS_INS_MODU = 420; public static final int MIPS_INS_MOD_S = 421; public static final int MIPS_INS_MOD_U = 422; public static final int MIPS_INS_MOVE = 423; public static final int MIPS_INS_MOVEP = 424; public static final int MIPS_INS_MOVF = 425; public static final int MIPS_INS_MOVN = 426; public static final int MIPS_INS_MOVT = 427; public static final int MIPS_INS_MOVZ = 428; public static final int MIPS_INS_MSUB = 429; public static final int MIPS_INS_MSUBF = 430; public static final int MIPS_INS_MSUBR_Q = 431; public static final int MIPS_INS_MSUBU = 432; public static final int MIPS_INS_MSUBV = 433; public static final int MIPS_INS_MSUB_Q = 434; public static final int MIPS_INS_MTC0 = 435; public static final int MIPS_INS_MTC1 = 436; public static final int MIPS_INS_MTC2 = 437; public static final int MIPS_INS_MTHC1 = 438; public static final int MIPS_INS_MTHI = 439; public static final int MIPS_INS_MTHLIP = 440; public static final int MIPS_INS_MTLO = 441; public static final int MIPS_INS_MTM0 = 442; public static final int MIPS_INS_MTM1 = 443; public static final int MIPS_INS_MTM2 = 444; public static final int MIPS_INS_MTP0 = 445; public static final int MIPS_INS_MTP1 = 446; public static final int MIPS_INS_MTP2 = 447; public static final int MIPS_INS_MUH = 448; public static final int MIPS_INS_MUHU = 449; public static final int MIPS_INS_MULEQ_S = 450; public static final int MIPS_INS_MULEU_S = 451; public static final int MIPS_INS_MULQ_RS = 452; public static final int MIPS_INS_MULQ_S = 453; public static final int MIPS_INS_MULR_Q = 454; public static final int MIPS_INS_MULSAQ_S = 455; public static final int MIPS_INS_MULSA = 456; public static final int MIPS_INS_MULT = 457; public static final int MIPS_INS_MULTU = 458; public static final int MIPS_INS_MULU = 459; public static final int MIPS_INS_MULV = 460; public static final int MIPS_INS_MUL_Q = 461; public static final int MIPS_INS_MUL_S = 462; public static final int MIPS_INS_NLOC = 463; public static final int MIPS_INS_NLZC = 464; public static final int MIPS_INS_NMADD = 465; public static final int MIPS_INS_NMSUB = 466; public static final int MIPS_INS_NOR = 467; public static final int MIPS_INS_NORI = 468; public static final int MIPS_INS_NOT16 = 469; public static final int MIPS_INS_NOT = 470; public static final int MIPS_INS_OR = 471; public static final int MIPS_INS_OR16 = 472; public static final int MIPS_INS_ORI = 473; public static final int MIPS_INS_PACKRL = 474; public static final int MIPS_INS_PAUSE = 475; public static final int MIPS_INS_PCKEV = 476; public static final int MIPS_INS_PCKOD = 477; public static final int MIPS_INS_PCNT = 478; public static final int MIPS_INS_PICK = 479; public static final int MIPS_INS_POP = 480; public static final int MIPS_INS_PRECEQU = 481; public static final int MIPS_INS_PRECEQ = 482; public static final int MIPS_INS_PRECEU = 483; public static final int MIPS_INS_PRECRQU_S = 484; public static final int MIPS_INS_PRECRQ = 485; public static final int MIPS_INS_PRECRQ_RS = 486; public static final int MIPS_INS_PRECR = 487; public static final int MIPS_INS_PRECR_SRA = 488; public static final int MIPS_INS_PRECR_SRA_R = 489; public static final int MIPS_INS_PREF = 490; public static final int MIPS_INS_PREPEND = 491; public static final int MIPS_INS_RADDU = 492; public static final int MIPS_INS_RDDSP = 493; public static final int MIPS_INS_RDHWR = 494; public static final int MIPS_INS_REPLV = 495; public static final int MIPS_INS_REPL = 496; public static final int MIPS_INS_RINT = 497; public static final int MIPS_INS_ROTR = 498; public static final int MIPS_INS_ROTRV = 499; public static final int MIPS_INS_ROUND = 500; public static final int MIPS_INS_SAT_S = 501; public static final int MIPS_INS_SAT_U = 502; public static final int MIPS_INS_SB = 503; public static final int MIPS_INS_SB16 = 504; public static final int MIPS_INS_SC = 505; public static final int MIPS_INS_SCD = 506; public static final int MIPS_INS_SD = 507; public static final int MIPS_INS_SDBBP = 508; public static final int MIPS_INS_SDBBP16 = 509; public static final int MIPS_INS_SDC1 = 510; public static final int MIPS_INS_SDC2 = 511; public static final int MIPS_INS_SDC3 = 512; public static final int MIPS_INS_SDL = 513; public static final int MIPS_INS_SDR = 514; public static final int MIPS_INS_SDXC1 = 515; public static final int MIPS_INS_SEB = 516; public static final int MIPS_INS_SEH = 517; public static final int MIPS_INS_SELEQZ = 518; public static final int MIPS_INS_SELNEZ = 519; public static final int MIPS_INS_SEL = 520; public static final int MIPS_INS_SEQ = 521; public static final int MIPS_INS_SEQI = 522; public static final int MIPS_INS_SH = 523; public static final int MIPS_INS_SH16 = 524; public static final int MIPS_INS_SHF = 525; public static final int MIPS_INS_SHILO = 526; public static final int MIPS_INS_SHILOV = 527; public static final int MIPS_INS_SHLLV = 528; public static final int MIPS_INS_SHLLV_S = 529; public static final int MIPS_INS_SHLL = 530; public static final int MIPS_INS_SHLL_S = 531; public static final int MIPS_INS_SHRAV = 532; public static final int MIPS_INS_SHRAV_R = 533; public static final int MIPS_INS_SHRA = 534; public static final int MIPS_INS_SHRA_R = 535; public static final int MIPS_INS_SHRLV = 536; public static final int MIPS_INS_SHRL = 537; public static final int MIPS_INS_SLDI = 538; public static final int MIPS_INS_SLD = 539; public static final int MIPS_INS_SLL = 540; public static final int MIPS_INS_SLL16 = 541; public static final int MIPS_INS_SLLI = 542; public static final int MIPS_INS_SLLV = 543; public static final int MIPS_INS_SLT = 544; public static final int MIPS_INS_SLTI = 545; public static final int MIPS_INS_SLTIU = 546; public static final int MIPS_INS_SLTU = 547; public static final int MIPS_INS_SNE = 548; public static final int MIPS_INS_SNEI = 549; public static final int MIPS_INS_SPLATI = 550; public static final int MIPS_INS_SPLAT = 551; public static final int MIPS_INS_SRA = 552; public static final int MIPS_INS_SRAI = 553; public static final int MIPS_INS_SRARI = 554; public static final int MIPS_INS_SRAR = 555; public static final int MIPS_INS_SRAV = 556; public static final int MIPS_INS_SRL = 557; public static final int MIPS_INS_SRL16 = 558; public static final int MIPS_INS_SRLI = 559; public static final int MIPS_INS_SRLRI = 560; public static final int MIPS_INS_SRLR = 561; public static final int MIPS_INS_SRLV = 562; public static final int MIPS_INS_SSNOP = 563; public static final int MIPS_INS_ST = 564; public static final int MIPS_INS_SUBQH = 565; public static final int MIPS_INS_SUBQH_R = 566; public static final int MIPS_INS_SUBQ = 567; public static final int MIPS_INS_SUBQ_S = 568; public static final int MIPS_INS_SUBSUS_U = 569; public static final int MIPS_INS_SUBSUU_S = 570; public static final int MIPS_INS_SUBS_S = 571; public static final int MIPS_INS_SUBS_U = 572; public static final int MIPS_INS_SUBU16 = 573; public static final int MIPS_INS_SUBUH = 574; public static final int MIPS_INS_SUBUH_R = 575; public static final int MIPS_INS_SUBU = 576; public static final int MIPS_INS_SUBU_S = 577; public static final int MIPS_INS_SUBVI = 578; public static final int MIPS_INS_SUBV = 579; public static final int MIPS_INS_SUXC1 = 580; public static final int MIPS_INS_SW = 581; public static final int MIPS_INS_SW16 = 582; public static final int MIPS_INS_SWC1 = 583; public static final int MIPS_INS_SWC2 = 584; public static final int MIPS_INS_SWC3 = 585; public static final int MIPS_INS_SWL = 586; public static final int MIPS_INS_SWM16 = 587; public static final int MIPS_INS_SWM32 = 588; public static final int MIPS_INS_SWP = 589; public static final int MIPS_INS_SWR = 590; public static final int MIPS_INS_SWXC1 = 591; public static final int MIPS_INS_SYNC = 592; public static final int MIPS_INS_SYNCI = 593; public static final int MIPS_INS_SYSCALL = 594; public static final int MIPS_INS_TEQ = 595; public static final int MIPS_INS_TEQI = 596; public static final int MIPS_INS_TGE = 597; public static final int MIPS_INS_TGEI = 598; public static final int MIPS_INS_TGEIU = 599; public static final int MIPS_INS_TGEU = 600; public static final int MIPS_INS_TLBP = 601; public static final int MIPS_INS_TLBR = 602; public static final int MIPS_INS_TLBWI = 603; public static final int MIPS_INS_TLBWR = 604; public static final int MIPS_INS_TLT = 605; public static final int MIPS_INS_TLTI = 606; public static final int MIPS_INS_TLTIU = 607; public static final int MIPS_INS_TLTU = 608; public static final int MIPS_INS_TNE = 609; public static final int MIPS_INS_TNEI = 610; public static final int MIPS_INS_TRUNC = 611; public static final int MIPS_INS_V3MULU = 612; public static final int MIPS_INS_VMM0 = 613; public static final int MIPS_INS_VMULU = 614; public static final int MIPS_INS_VSHF = 615; public static final int MIPS_INS_WAIT = 616; public static final int MIPS_INS_WRDSP = 617; public static final int MIPS_INS_WSBH = 618; public static final int MIPS_INS_XOR = 619; public static final int MIPS_INS_XOR16 = 620; public static final int MIPS_INS_XORI = 621; // some alias instructions public static final int MIPS_INS_NOP = 622; public static final int MIPS_INS_NEGU = 623; // special instructions public static final int MIPS_INS_JALR_HB = 624; public static final int MIPS_INS_JR_HB = 625; public static final int MIPS_INS_ENDING = 626; public static final int MIPS_GRP_INVALID = 0; public static final int MIPS_GRP_JUMP = 1; public static final int MIPS_GRP_CALL = 2; public static final int MIPS_GRP_RET = 3; public static final int MIPS_GRP_INT = 4; public static final int MIPS_GRP_IRET = 5; public static final int MIPS_GRP_PRIVILEGE = 6; public static final int MIPS_GRP_BRANCH_RELATIVE = 7; public static final int MIPS_GRP_BITCOUNT = 128; public static final int MIPS_GRP_DSP = 129; public static final int MIPS_GRP_DSPR2 = 130; public static final int MIPS_GRP_FPIDX = 131; public static final int MIPS_GRP_MSA = 132; public static final int MIPS_GRP_MIPS32R2 = 133; public static final int MIPS_GRP_MIPS64 = 134; public static final int MIPS_GRP_MIPS64R2 = 135; public static final int MIPS_GRP_SEINREG = 136; public static final int MIPS_GRP_STDENC = 137; public static final int MIPS_GRP_SWAP = 138; public static final int MIPS_GRP_MICROMIPS = 139; public static final int MIPS_GRP_MIPS16MODE = 140; public static final int MIPS_GRP_FP64BIT = 141; public static final int MIPS_GRP_NONANSFPMATH = 142; public static final int MIPS_GRP_NOTFP64BIT = 143; public static final int MIPS_GRP_NOTINMICROMIPS = 144; public static final int MIPS_GRP_NOTNACL = 145; public static final int MIPS_GRP_NOTMIPS32R6 = 146; public static final int MIPS_GRP_NOTMIPS64R6 = 147; public static final int MIPS_GRP_CNMIPS = 148; public static final int MIPS_GRP_MIPS32 = 149; public static final int MIPS_GRP_MIPS32R6 = 150; public static final int MIPS_GRP_MIPS64R6 = 151; public static final int MIPS_GRP_MIPS2 = 152; public static final int MIPS_GRP_MIPS3 = 153; public static final int MIPS_GRP_MIPS3_32 = 154; public static final int MIPS_GRP_MIPS3_32R2 = 155; public static final int MIPS_GRP_MIPS4_32 = 156; public static final int MIPS_GRP_MIPS4_32R2 = 157; public static final int MIPS_GRP_MIPS5_32R2 = 158; public static final int MIPS_GRP_GP32BIT = 159; public static final int MIPS_GRP_GP64BIT = 160; public static final int MIPS_GRP_ENDING = 161; }capstone-sys-0.11.0/capstone/bindings/java/capstone/Ppc.java010066400017500001750000000043631363402546700222170ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.Ppc_const.*; public class Ppc { public static class MemType extends Structure { public int base; public int disp; @Override public List getFieldOrder() { return Arrays.asList("base", "disp"); } } public static class CrxType extends Structure { public int scale; public int reg; public int cond; @Override public List getFieldOrder() { return Arrays.asList("scale", "reg", "cond"); } } public static class OpValue extends Union { public int reg; public long imm; public MemType mem; public CrxType crx; } public static class Operand extends Structure { public int type; public OpValue value; public void read() { readField("type"); if (type == PPC_OP_MEM) value.setType(MemType.class); if (type == PPC_OP_CRX) value.setType(CrxType.class); if (type == PPC_OP_IMM || type == PPC_OP_REG) value.setType(Integer.TYPE); if (type == PPC_OP_INVALID) return; readField("value"); } @Override public List getFieldOrder() { return Arrays.asList("type", "value"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public int bc; public int bh; public byte update_cr0; public byte op_count; public Operand [] op; public UnionOpInfo() { op = new Operand[8]; } public void read() { readField("bc"); readField("bh"); readField("update_cr0"); readField("op_count"); op = new Operand[op_count]; if (op_count != 0) readField("op"); } @Override public List getFieldOrder() { return Arrays.asList("bc", "bh", "update_cr0", "op_count", "op"); } } public static class OpInfo extends Capstone.OpInfo { public int bc; public int bh; public boolean updateCr0; public Operand [] op; public OpInfo(UnionOpInfo op_info) { bc = op_info.bc; bh = op_info.bh; updateCr0 = (op_info.update_cr0 > 0); op = op_info.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/Ppc_const.java010066400017500001750000001743201363402546700234260ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class Ppc_const { public static final int PPC_BC_INVALID = 0; public static final int PPC_BC_LT = (0<<5)|12; public static final int PPC_BC_LE = (1<<5)|4; public static final int PPC_BC_EQ = (2<<5)|12; public static final int PPC_BC_GE = (0<<5)|4; public static final int PPC_BC_GT = (1<<5)|12; public static final int PPC_BC_NE = (2<<5)|4; public static final int PPC_BC_UN = (3<<5)|12; public static final int PPC_BC_NU = (3<<5)|4; public static final int PPC_BC_SO = (4<<5)|12; public static final int PPC_BC_NS = (4<<5)|4; public static final int PPC_BH_INVALID = 0; public static final int PPC_BH_PLUS = 1; public static final int PPC_BH_MINUS = 2; public static final int PPC_OP_INVALID = 0; public static final int PPC_OP_REG = 1; public static final int PPC_OP_IMM = 2; public static final int PPC_OP_MEM = 3; public static final int PPC_OP_CRX = 64; public static final int PPC_REG_INVALID = 0; public static final int PPC_REG_CARRY = 1; public static final int PPC_REG_CR0 = 2; public static final int PPC_REG_CR1 = 3; public static final int PPC_REG_CR2 = 4; public static final int PPC_REG_CR3 = 5; public static final int PPC_REG_CR4 = 6; public static final int PPC_REG_CR5 = 7; public static final int PPC_REG_CR6 = 8; public static final int PPC_REG_CR7 = 9; public static final int PPC_REG_CTR = 10; public static final int PPC_REG_F0 = 11; public static final int PPC_REG_F1 = 12; public static final int PPC_REG_F2 = 13; public static final int PPC_REG_F3 = 14; public static final int PPC_REG_F4 = 15; public static final int PPC_REG_F5 = 16; public static final int PPC_REG_F6 = 17; public static final int PPC_REG_F7 = 18; public static final int PPC_REG_F8 = 19; public static final int PPC_REG_F9 = 20; public static final int PPC_REG_F10 = 21; public static final int PPC_REG_F11 = 22; public static final int PPC_REG_F12 = 23; public static final int PPC_REG_F13 = 24; public static final int PPC_REG_F14 = 25; public static final int PPC_REG_F15 = 26; public static final int PPC_REG_F16 = 27; public static final int PPC_REG_F17 = 28; public static final int PPC_REG_F18 = 29; public static final int PPC_REG_F19 = 30; public static final int PPC_REG_F20 = 31; public static final int PPC_REG_F21 = 32; public static final int PPC_REG_F22 = 33; public static final int PPC_REG_F23 = 34; public static final int PPC_REG_F24 = 35; public static final int PPC_REG_F25 = 36; public static final int PPC_REG_F26 = 37; public static final int PPC_REG_F27 = 38; public static final int PPC_REG_F28 = 39; public static final int PPC_REG_F29 = 40; public static final int PPC_REG_F30 = 41; public static final int PPC_REG_F31 = 42; public static final int PPC_REG_LR = 43; public static final int PPC_REG_R0 = 44; public static final int PPC_REG_R1 = 45; public static final int PPC_REG_R2 = 46; public static final int PPC_REG_R3 = 47; public static final int PPC_REG_R4 = 48; public static final int PPC_REG_R5 = 49; public static final int PPC_REG_R6 = 50; public static final int PPC_REG_R7 = 51; public static final int PPC_REG_R8 = 52; public static final int PPC_REG_R9 = 53; public static final int PPC_REG_R10 = 54; public static final int PPC_REG_R11 = 55; public static final int PPC_REG_R12 = 56; public static final int PPC_REG_R13 = 57; public static final int PPC_REG_R14 = 58; public static final int PPC_REG_R15 = 59; public static final int PPC_REG_R16 = 60; public static final int PPC_REG_R17 = 61; public static final int PPC_REG_R18 = 62; public static final int PPC_REG_R19 = 63; public static final int PPC_REG_R20 = 64; public static final int PPC_REG_R21 = 65; public static final int PPC_REG_R22 = 66; public static final int PPC_REG_R23 = 67; public static final int PPC_REG_R24 = 68; public static final int PPC_REG_R25 = 69; public static final int PPC_REG_R26 = 70; public static final int PPC_REG_R27 = 71; public static final int PPC_REG_R28 = 72; public static final int PPC_REG_R29 = 73; public static final int PPC_REG_R30 = 74; public static final int PPC_REG_R31 = 75; public static final int PPC_REG_V0 = 76; public static final int PPC_REG_V1 = 77; public static final int PPC_REG_V2 = 78; public static final int PPC_REG_V3 = 79; public static final int PPC_REG_V4 = 80; public static final int PPC_REG_V5 = 81; public static final int PPC_REG_V6 = 82; public static final int PPC_REG_V7 = 83; public static final int PPC_REG_V8 = 84; public static final int PPC_REG_V9 = 85; public static final int PPC_REG_V10 = 86; public static final int PPC_REG_V11 = 87; public static final int PPC_REG_V12 = 88; public static final int PPC_REG_V13 = 89; public static final int PPC_REG_V14 = 90; public static final int PPC_REG_V15 = 91; public static final int PPC_REG_V16 = 92; public static final int PPC_REG_V17 = 93; public static final int PPC_REG_V18 = 94; public static final int PPC_REG_V19 = 95; public static final int PPC_REG_V20 = 96; public static final int PPC_REG_V21 = 97; public static final int PPC_REG_V22 = 98; public static final int PPC_REG_V23 = 99; public static final int PPC_REG_V24 = 100; public static final int PPC_REG_V25 = 101; public static final int PPC_REG_V26 = 102; public static final int PPC_REG_V27 = 103; public static final int PPC_REG_V28 = 104; public static final int PPC_REG_V29 = 105; public static final int PPC_REG_V30 = 106; public static final int PPC_REG_V31 = 107; public static final int PPC_REG_VRSAVE = 108; public static final int PPC_REG_VS0 = 109; public static final int PPC_REG_VS1 = 110; public static final int PPC_REG_VS2 = 111; public static final int PPC_REG_VS3 = 112; public static final int PPC_REG_VS4 = 113; public static final int PPC_REG_VS5 = 114; public static final int PPC_REG_VS6 = 115; public static final int PPC_REG_VS7 = 116; public static final int PPC_REG_VS8 = 117; public static final int PPC_REG_VS9 = 118; public static final int PPC_REG_VS10 = 119; public static final int PPC_REG_VS11 = 120; public static final int PPC_REG_VS12 = 121; public static final int PPC_REG_VS13 = 122; public static final int PPC_REG_VS14 = 123; public static final int PPC_REG_VS15 = 124; public static final int PPC_REG_VS16 = 125; public static final int PPC_REG_VS17 = 126; public static final int PPC_REG_VS18 = 127; public static final int PPC_REG_VS19 = 128; public static final int PPC_REG_VS20 = 129; public static final int PPC_REG_VS21 = 130; public static final int PPC_REG_VS22 = 131; public static final int PPC_REG_VS23 = 132; public static final int PPC_REG_VS24 = 133; public static final int PPC_REG_VS25 = 134; public static final int PPC_REG_VS26 = 135; public static final int PPC_REG_VS27 = 136; public static final int PPC_REG_VS28 = 137; public static final int PPC_REG_VS29 = 138; public static final int PPC_REG_VS30 = 139; public static final int PPC_REG_VS31 = 140; public static final int PPC_REG_VS32 = 141; public static final int PPC_REG_VS33 = 142; public static final int PPC_REG_VS34 = 143; public static final int PPC_REG_VS35 = 144; public static final int PPC_REG_VS36 = 145; public static final int PPC_REG_VS37 = 146; public static final int PPC_REG_VS38 = 147; public static final int PPC_REG_VS39 = 148; public static final int PPC_REG_VS40 = 149; public static final int PPC_REG_VS41 = 150; public static final int PPC_REG_VS42 = 151; public static final int PPC_REG_VS43 = 152; public static final int PPC_REG_VS44 = 153; public static final int PPC_REG_VS45 = 154; public static final int PPC_REG_VS46 = 155; public static final int PPC_REG_VS47 = 156; public static final int PPC_REG_VS48 = 157; public static final int PPC_REG_VS49 = 158; public static final int PPC_REG_VS50 = 159; public static final int PPC_REG_VS51 = 160; public static final int PPC_REG_VS52 = 161; public static final int PPC_REG_VS53 = 162; public static final int PPC_REG_VS54 = 163; public static final int PPC_REG_VS55 = 164; public static final int PPC_REG_VS56 = 165; public static final int PPC_REG_VS57 = 166; public static final int PPC_REG_VS58 = 167; public static final int PPC_REG_VS59 = 168; public static final int PPC_REG_VS60 = 169; public static final int PPC_REG_VS61 = 170; public static final int PPC_REG_VS62 = 171; public static final int PPC_REG_VS63 = 172; public static final int PPC_REG_Q0 = 173; public static final int PPC_REG_Q1 = 174; public static final int PPC_REG_Q2 = 175; public static final int PPC_REG_Q3 = 176; public static final int PPC_REG_Q4 = 177; public static final int PPC_REG_Q5 = 178; public static final int PPC_REG_Q6 = 179; public static final int PPC_REG_Q7 = 180; public static final int PPC_REG_Q8 = 181; public static final int PPC_REG_Q9 = 182; public static final int PPC_REG_Q10 = 183; public static final int PPC_REG_Q11 = 184; public static final int PPC_REG_Q12 = 185; public static final int PPC_REG_Q13 = 186; public static final int PPC_REG_Q14 = 187; public static final int PPC_REG_Q15 = 188; public static final int PPC_REG_Q16 = 189; public static final int PPC_REG_Q17 = 190; public static final int PPC_REG_Q18 = 191; public static final int PPC_REG_Q19 = 192; public static final int PPC_REG_Q20 = 193; public static final int PPC_REG_Q21 = 194; public static final int PPC_REG_Q22 = 195; public static final int PPC_REG_Q23 = 196; public static final int PPC_REG_Q24 = 197; public static final int PPC_REG_Q25 = 198; public static final int PPC_REG_Q26 = 199; public static final int PPC_REG_Q27 = 200; public static final int PPC_REG_Q28 = 201; public static final int PPC_REG_Q29 = 202; public static final int PPC_REG_Q30 = 203; public static final int PPC_REG_Q31 = 204; public static final int PPC_REG_RM = 205; public static final int PPC_REG_CTR8 = 206; public static final int PPC_REG_LR8 = 207; public static final int PPC_REG_CR1EQ = 208; public static final int PPC_REG_X2 = 209; public static final int PPC_REG_ENDING = 210; public static final int PPC_INS_INVALID = 0; public static final int PPC_INS_ADD = 1; public static final int PPC_INS_ADDC = 2; public static final int PPC_INS_ADDE = 3; public static final int PPC_INS_ADDI = 4; public static final int PPC_INS_ADDIC = 5; public static final int PPC_INS_ADDIS = 6; public static final int PPC_INS_ADDME = 7; public static final int PPC_INS_ADDZE = 8; public static final int PPC_INS_AND = 9; public static final int PPC_INS_ANDC = 10; public static final int PPC_INS_ANDIS = 11; public static final int PPC_INS_ANDI = 12; public static final int PPC_INS_ATTN = 13; public static final int PPC_INS_B = 14; public static final int PPC_INS_BA = 15; public static final int PPC_INS_BC = 16; public static final int PPC_INS_BCCTR = 17; public static final int PPC_INS_BCCTRL = 18; public static final int PPC_INS_BCL = 19; public static final int PPC_INS_BCLR = 20; public static final int PPC_INS_BCLRL = 21; public static final int PPC_INS_BCTR = 22; public static final int PPC_INS_BCTRL = 23; public static final int PPC_INS_BCT = 24; public static final int PPC_INS_BDNZ = 25; public static final int PPC_INS_BDNZA = 26; public static final int PPC_INS_BDNZL = 27; public static final int PPC_INS_BDNZLA = 28; public static final int PPC_INS_BDNZLR = 29; public static final int PPC_INS_BDNZLRL = 30; public static final int PPC_INS_BDZ = 31; public static final int PPC_INS_BDZA = 32; public static final int PPC_INS_BDZL = 33; public static final int PPC_INS_BDZLA = 34; public static final int PPC_INS_BDZLR = 35; public static final int PPC_INS_BDZLRL = 36; public static final int PPC_INS_BL = 37; public static final int PPC_INS_BLA = 38; public static final int PPC_INS_BLR = 39; public static final int PPC_INS_BLRL = 40; public static final int PPC_INS_BRINC = 41; public static final int PPC_INS_CMPB = 42; public static final int PPC_INS_CMPD = 43; public static final int PPC_INS_CMPDI = 44; public static final int PPC_INS_CMPLD = 45; public static final int PPC_INS_CMPLDI = 46; public static final int PPC_INS_CMPLW = 47; public static final int PPC_INS_CMPLWI = 48; public static final int PPC_INS_CMPW = 49; public static final int PPC_INS_CMPWI = 50; public static final int PPC_INS_CNTLZD = 51; public static final int PPC_INS_CNTLZW = 52; public static final int PPC_INS_CREQV = 53; public static final int PPC_INS_CRXOR = 54; public static final int PPC_INS_CRAND = 55; public static final int PPC_INS_CRANDC = 56; public static final int PPC_INS_CRNAND = 57; public static final int PPC_INS_CRNOR = 58; public static final int PPC_INS_CROR = 59; public static final int PPC_INS_CRORC = 60; public static final int PPC_INS_DCBA = 61; public static final int PPC_INS_DCBF = 62; public static final int PPC_INS_DCBI = 63; public static final int PPC_INS_DCBST = 64; public static final int PPC_INS_DCBT = 65; public static final int PPC_INS_DCBTST = 66; public static final int PPC_INS_DCBZ = 67; public static final int PPC_INS_DCBZL = 68; public static final int PPC_INS_DCCCI = 69; public static final int PPC_INS_DIVD = 70; public static final int PPC_INS_DIVDU = 71; public static final int PPC_INS_DIVW = 72; public static final int PPC_INS_DIVWU = 73; public static final int PPC_INS_DSS = 74; public static final int PPC_INS_DSSALL = 75; public static final int PPC_INS_DST = 76; public static final int PPC_INS_DSTST = 77; public static final int PPC_INS_DSTSTT = 78; public static final int PPC_INS_DSTT = 79; public static final int PPC_INS_EQV = 80; public static final int PPC_INS_EVABS = 81; public static final int PPC_INS_EVADDIW = 82; public static final int PPC_INS_EVADDSMIAAW = 83; public static final int PPC_INS_EVADDSSIAAW = 84; public static final int PPC_INS_EVADDUMIAAW = 85; public static final int PPC_INS_EVADDUSIAAW = 86; public static final int PPC_INS_EVADDW = 87; public static final int PPC_INS_EVAND = 88; public static final int PPC_INS_EVANDC = 89; public static final int PPC_INS_EVCMPEQ = 90; public static final int PPC_INS_EVCMPGTS = 91; public static final int PPC_INS_EVCMPGTU = 92; public static final int PPC_INS_EVCMPLTS = 93; public static final int PPC_INS_EVCMPLTU = 94; public static final int PPC_INS_EVCNTLSW = 95; public static final int PPC_INS_EVCNTLZW = 96; public static final int PPC_INS_EVDIVWS = 97; public static final int PPC_INS_EVDIVWU = 98; public static final int PPC_INS_EVEQV = 99; public static final int PPC_INS_EVEXTSB = 100; public static final int PPC_INS_EVEXTSH = 101; public static final int PPC_INS_EVLDD = 102; public static final int PPC_INS_EVLDDX = 103; public static final int PPC_INS_EVLDH = 104; public static final int PPC_INS_EVLDHX = 105; public static final int PPC_INS_EVLDW = 106; public static final int PPC_INS_EVLDWX = 107; public static final int PPC_INS_EVLHHESPLAT = 108; public static final int PPC_INS_EVLHHESPLATX = 109; public static final int PPC_INS_EVLHHOSSPLAT = 110; public static final int PPC_INS_EVLHHOSSPLATX = 111; public static final int PPC_INS_EVLHHOUSPLAT = 112; public static final int PPC_INS_EVLHHOUSPLATX = 113; public static final int PPC_INS_EVLWHE = 114; public static final int PPC_INS_EVLWHEX = 115; public static final int PPC_INS_EVLWHOS = 116; public static final int PPC_INS_EVLWHOSX = 117; public static final int PPC_INS_EVLWHOU = 118; public static final int PPC_INS_EVLWHOUX = 119; public static final int PPC_INS_EVLWHSPLAT = 120; public static final int PPC_INS_EVLWHSPLATX = 121; public static final int PPC_INS_EVLWWSPLAT = 122; public static final int PPC_INS_EVLWWSPLATX = 123; public static final int PPC_INS_EVMERGEHI = 124; public static final int PPC_INS_EVMERGEHILO = 125; public static final int PPC_INS_EVMERGELO = 126; public static final int PPC_INS_EVMERGELOHI = 127; public static final int PPC_INS_EVMHEGSMFAA = 128; public static final int PPC_INS_EVMHEGSMFAN = 129; public static final int PPC_INS_EVMHEGSMIAA = 130; public static final int PPC_INS_EVMHEGSMIAN = 131; public static final int PPC_INS_EVMHEGUMIAA = 132; public static final int PPC_INS_EVMHEGUMIAN = 133; public static final int PPC_INS_EVMHESMF = 134; public static final int PPC_INS_EVMHESMFA = 135; public static final int PPC_INS_EVMHESMFAAW = 136; public static final int PPC_INS_EVMHESMFANW = 137; public static final int PPC_INS_EVMHESMI = 138; public static final int PPC_INS_EVMHESMIA = 139; public static final int PPC_INS_EVMHESMIAAW = 140; public static final int PPC_INS_EVMHESMIANW = 141; public static final int PPC_INS_EVMHESSF = 142; public static final int PPC_INS_EVMHESSFA = 143; public static final int PPC_INS_EVMHESSFAAW = 144; public static final int PPC_INS_EVMHESSFANW = 145; public static final int PPC_INS_EVMHESSIAAW = 146; public static final int PPC_INS_EVMHESSIANW = 147; public static final int PPC_INS_EVMHEUMI = 148; public static final int PPC_INS_EVMHEUMIA = 149; public static final int PPC_INS_EVMHEUMIAAW = 150; public static final int PPC_INS_EVMHEUMIANW = 151; public static final int PPC_INS_EVMHEUSIAAW = 152; public static final int PPC_INS_EVMHEUSIANW = 153; public static final int PPC_INS_EVMHOGSMFAA = 154; public static final int PPC_INS_EVMHOGSMFAN = 155; public static final int PPC_INS_EVMHOGSMIAA = 156; public static final int PPC_INS_EVMHOGSMIAN = 157; public static final int PPC_INS_EVMHOGUMIAA = 158; public static final int PPC_INS_EVMHOGUMIAN = 159; public static final int PPC_INS_EVMHOSMF = 160; public static final int PPC_INS_EVMHOSMFA = 161; public static final int PPC_INS_EVMHOSMFAAW = 162; public static final int PPC_INS_EVMHOSMFANW = 163; public static final int PPC_INS_EVMHOSMI = 164; public static final int PPC_INS_EVMHOSMIA = 165; public static final int PPC_INS_EVMHOSMIAAW = 166; public static final int PPC_INS_EVMHOSMIANW = 167; public static final int PPC_INS_EVMHOSSF = 168; public static final int PPC_INS_EVMHOSSFA = 169; public static final int PPC_INS_EVMHOSSFAAW = 170; public static final int PPC_INS_EVMHOSSFANW = 171; public static final int PPC_INS_EVMHOSSIAAW = 172; public static final int PPC_INS_EVMHOSSIANW = 173; public static final int PPC_INS_EVMHOUMI = 174; public static final int PPC_INS_EVMHOUMIA = 175; public static final int PPC_INS_EVMHOUMIAAW = 176; public static final int PPC_INS_EVMHOUMIANW = 177; public static final int PPC_INS_EVMHOUSIAAW = 178; public static final int PPC_INS_EVMHOUSIANW = 179; public static final int PPC_INS_EVMRA = 180; public static final int PPC_INS_EVMWHSMF = 181; public static final int PPC_INS_EVMWHSMFA = 182; public static final int PPC_INS_EVMWHSMI = 183; public static final int PPC_INS_EVMWHSMIA = 184; public static final int PPC_INS_EVMWHSSF = 185; public static final int PPC_INS_EVMWHSSFA = 186; public static final int PPC_INS_EVMWHUMI = 187; public static final int PPC_INS_EVMWHUMIA = 188; public static final int PPC_INS_EVMWLSMIAAW = 189; public static final int PPC_INS_EVMWLSMIANW = 190; public static final int PPC_INS_EVMWLSSIAAW = 191; public static final int PPC_INS_EVMWLSSIANW = 192; public static final int PPC_INS_EVMWLUMI = 193; public static final int PPC_INS_EVMWLUMIA = 194; public static final int PPC_INS_EVMWLUMIAAW = 195; public static final int PPC_INS_EVMWLUMIANW = 196; public static final int PPC_INS_EVMWLUSIAAW = 197; public static final int PPC_INS_EVMWLUSIANW = 198; public static final int PPC_INS_EVMWSMF = 199; public static final int PPC_INS_EVMWSMFA = 200; public static final int PPC_INS_EVMWSMFAA = 201; public static final int PPC_INS_EVMWSMFAN = 202; public static final int PPC_INS_EVMWSMI = 203; public static final int PPC_INS_EVMWSMIA = 204; public static final int PPC_INS_EVMWSMIAA = 205; public static final int PPC_INS_EVMWSMIAN = 206; public static final int PPC_INS_EVMWSSF = 207; public static final int PPC_INS_EVMWSSFA = 208; public static final int PPC_INS_EVMWSSFAA = 209; public static final int PPC_INS_EVMWSSFAN = 210; public static final int PPC_INS_EVMWUMI = 211; public static final int PPC_INS_EVMWUMIA = 212; public static final int PPC_INS_EVMWUMIAA = 213; public static final int PPC_INS_EVMWUMIAN = 214; public static final int PPC_INS_EVNAND = 215; public static final int PPC_INS_EVNEG = 216; public static final int PPC_INS_EVNOR = 217; public static final int PPC_INS_EVOR = 218; public static final int PPC_INS_EVORC = 219; public static final int PPC_INS_EVRLW = 220; public static final int PPC_INS_EVRLWI = 221; public static final int PPC_INS_EVRNDW = 222; public static final int PPC_INS_EVSLW = 223; public static final int PPC_INS_EVSLWI = 224; public static final int PPC_INS_EVSPLATFI = 225; public static final int PPC_INS_EVSPLATI = 226; public static final int PPC_INS_EVSRWIS = 227; public static final int PPC_INS_EVSRWIU = 228; public static final int PPC_INS_EVSRWS = 229; public static final int PPC_INS_EVSRWU = 230; public static final int PPC_INS_EVSTDD = 231; public static final int PPC_INS_EVSTDDX = 232; public static final int PPC_INS_EVSTDH = 233; public static final int PPC_INS_EVSTDHX = 234; public static final int PPC_INS_EVSTDW = 235; public static final int PPC_INS_EVSTDWX = 236; public static final int PPC_INS_EVSTWHE = 237; public static final int PPC_INS_EVSTWHEX = 238; public static final int PPC_INS_EVSTWHO = 239; public static final int PPC_INS_EVSTWHOX = 240; public static final int PPC_INS_EVSTWWE = 241; public static final int PPC_INS_EVSTWWEX = 242; public static final int PPC_INS_EVSTWWO = 243; public static final int PPC_INS_EVSTWWOX = 244; public static final int PPC_INS_EVSUBFSMIAAW = 245; public static final int PPC_INS_EVSUBFSSIAAW = 246; public static final int PPC_INS_EVSUBFUMIAAW = 247; public static final int PPC_INS_EVSUBFUSIAAW = 248; public static final int PPC_INS_EVSUBFW = 249; public static final int PPC_INS_EVSUBIFW = 250; public static final int PPC_INS_EVXOR = 251; public static final int PPC_INS_EXTSB = 252; public static final int PPC_INS_EXTSH = 253; public static final int PPC_INS_EXTSW = 254; public static final int PPC_INS_EIEIO = 255; public static final int PPC_INS_FABS = 256; public static final int PPC_INS_FADD = 257; public static final int PPC_INS_FADDS = 258; public static final int PPC_INS_FCFID = 259; public static final int PPC_INS_FCFIDS = 260; public static final int PPC_INS_FCFIDU = 261; public static final int PPC_INS_FCFIDUS = 262; public static final int PPC_INS_FCMPU = 263; public static final int PPC_INS_FCPSGN = 264; public static final int PPC_INS_FCTID = 265; public static final int PPC_INS_FCTIDUZ = 266; public static final int PPC_INS_FCTIDZ = 267; public static final int PPC_INS_FCTIW = 268; public static final int PPC_INS_FCTIWUZ = 269; public static final int PPC_INS_FCTIWZ = 270; public static final int PPC_INS_FDIV = 271; public static final int PPC_INS_FDIVS = 272; public static final int PPC_INS_FMADD = 273; public static final int PPC_INS_FMADDS = 274; public static final int PPC_INS_FMR = 275; public static final int PPC_INS_FMSUB = 276; public static final int PPC_INS_FMSUBS = 277; public static final int PPC_INS_FMUL = 278; public static final int PPC_INS_FMULS = 279; public static final int PPC_INS_FNABS = 280; public static final int PPC_INS_FNEG = 281; public static final int PPC_INS_FNMADD = 282; public static final int PPC_INS_FNMADDS = 283; public static final int PPC_INS_FNMSUB = 284; public static final int PPC_INS_FNMSUBS = 285; public static final int PPC_INS_FRE = 286; public static final int PPC_INS_FRES = 287; public static final int PPC_INS_FRIM = 288; public static final int PPC_INS_FRIN = 289; public static final int PPC_INS_FRIP = 290; public static final int PPC_INS_FRIZ = 291; public static final int PPC_INS_FRSP = 292; public static final int PPC_INS_FRSQRTE = 293; public static final int PPC_INS_FRSQRTES = 294; public static final int PPC_INS_FSEL = 295; public static final int PPC_INS_FSQRT = 296; public static final int PPC_INS_FSQRTS = 297; public static final int PPC_INS_FSUB = 298; public static final int PPC_INS_FSUBS = 299; public static final int PPC_INS_ICBI = 300; public static final int PPC_INS_ICBT = 301; public static final int PPC_INS_ICCCI = 302; public static final int PPC_INS_ISEL = 303; public static final int PPC_INS_ISYNC = 304; public static final int PPC_INS_LA = 305; public static final int PPC_INS_LBZ = 306; public static final int PPC_INS_LBZCIX = 307; public static final int PPC_INS_LBZU = 308; public static final int PPC_INS_LBZUX = 309; public static final int PPC_INS_LBZX = 310; public static final int PPC_INS_LD = 311; public static final int PPC_INS_LDARX = 312; public static final int PPC_INS_LDBRX = 313; public static final int PPC_INS_LDCIX = 314; public static final int PPC_INS_LDU = 315; public static final int PPC_INS_LDUX = 316; public static final int PPC_INS_LDX = 317; public static final int PPC_INS_LFD = 318; public static final int PPC_INS_LFDU = 319; public static final int PPC_INS_LFDUX = 320; public static final int PPC_INS_LFDX = 321; public static final int PPC_INS_LFIWAX = 322; public static final int PPC_INS_LFIWZX = 323; public static final int PPC_INS_LFS = 324; public static final int PPC_INS_LFSU = 325; public static final int PPC_INS_LFSUX = 326; public static final int PPC_INS_LFSX = 327; public static final int PPC_INS_LHA = 328; public static final int PPC_INS_LHAU = 329; public static final int PPC_INS_LHAUX = 330; public static final int PPC_INS_LHAX = 331; public static final int PPC_INS_LHBRX = 332; public static final int PPC_INS_LHZ = 333; public static final int PPC_INS_LHZCIX = 334; public static final int PPC_INS_LHZU = 335; public static final int PPC_INS_LHZUX = 336; public static final int PPC_INS_LHZX = 337; public static final int PPC_INS_LI = 338; public static final int PPC_INS_LIS = 339; public static final int PPC_INS_LMW = 340; public static final int PPC_INS_LSWI = 341; public static final int PPC_INS_LVEBX = 342; public static final int PPC_INS_LVEHX = 343; public static final int PPC_INS_LVEWX = 344; public static final int PPC_INS_LVSL = 345; public static final int PPC_INS_LVSR = 346; public static final int PPC_INS_LVX = 347; public static final int PPC_INS_LVXL = 348; public static final int PPC_INS_LWA = 349; public static final int PPC_INS_LWARX = 350; public static final int PPC_INS_LWAUX = 351; public static final int PPC_INS_LWAX = 352; public static final int PPC_INS_LWBRX = 353; public static final int PPC_INS_LWZ = 354; public static final int PPC_INS_LWZCIX = 355; public static final int PPC_INS_LWZU = 356; public static final int PPC_INS_LWZUX = 357; public static final int PPC_INS_LWZX = 358; public static final int PPC_INS_LXSDX = 359; public static final int PPC_INS_LXVD2X = 360; public static final int PPC_INS_LXVDSX = 361; public static final int PPC_INS_LXVW4X = 362; public static final int PPC_INS_MBAR = 363; public static final int PPC_INS_MCRF = 364; public static final int PPC_INS_MCRFS = 365; public static final int PPC_INS_MFCR = 366; public static final int PPC_INS_MFCTR = 367; public static final int PPC_INS_MFDCR = 368; public static final int PPC_INS_MFFS = 369; public static final int PPC_INS_MFLR = 370; public static final int PPC_INS_MFMSR = 371; public static final int PPC_INS_MFOCRF = 372; public static final int PPC_INS_MFSPR = 373; public static final int PPC_INS_MFSR = 374; public static final int PPC_INS_MFSRIN = 375; public static final int PPC_INS_MFTB = 376; public static final int PPC_INS_MFVSCR = 377; public static final int PPC_INS_MSYNC = 378; public static final int PPC_INS_MTCRF = 379; public static final int PPC_INS_MTCTR = 380; public static final int PPC_INS_MTDCR = 381; public static final int PPC_INS_MTFSB0 = 382; public static final int PPC_INS_MTFSB1 = 383; public static final int PPC_INS_MTFSF = 384; public static final int PPC_INS_MTFSFI = 385; public static final int PPC_INS_MTLR = 386; public static final int PPC_INS_MTMSR = 387; public static final int PPC_INS_MTMSRD = 388; public static final int PPC_INS_MTOCRF = 389; public static final int PPC_INS_MTSPR = 390; public static final int PPC_INS_MTSR = 391; public static final int PPC_INS_MTSRIN = 392; public static final int PPC_INS_MTVSCR = 393; public static final int PPC_INS_MULHD = 394; public static final int PPC_INS_MULHDU = 395; public static final int PPC_INS_MULHW = 396; public static final int PPC_INS_MULHWU = 397; public static final int PPC_INS_MULLD = 398; public static final int PPC_INS_MULLI = 399; public static final int PPC_INS_MULLW = 400; public static final int PPC_INS_NAND = 401; public static final int PPC_INS_NEG = 402; public static final int PPC_INS_NOP = 403; public static final int PPC_INS_ORI = 404; public static final int PPC_INS_NOR = 405; public static final int PPC_INS_OR = 406; public static final int PPC_INS_ORC = 407; public static final int PPC_INS_ORIS = 408; public static final int PPC_INS_POPCNTD = 409; public static final int PPC_INS_POPCNTW = 410; public static final int PPC_INS_QVALIGNI = 411; public static final int PPC_INS_QVESPLATI = 412; public static final int PPC_INS_QVFABS = 413; public static final int PPC_INS_QVFADD = 414; public static final int PPC_INS_QVFADDS = 415; public static final int PPC_INS_QVFCFID = 416; public static final int PPC_INS_QVFCFIDS = 417; public static final int PPC_INS_QVFCFIDU = 418; public static final int PPC_INS_QVFCFIDUS = 419; public static final int PPC_INS_QVFCMPEQ = 420; public static final int PPC_INS_QVFCMPGT = 421; public static final int PPC_INS_QVFCMPLT = 422; public static final int PPC_INS_QVFCPSGN = 423; public static final int PPC_INS_QVFCTID = 424; public static final int PPC_INS_QVFCTIDU = 425; public static final int PPC_INS_QVFCTIDUZ = 426; public static final int PPC_INS_QVFCTIDZ = 427; public static final int PPC_INS_QVFCTIW = 428; public static final int PPC_INS_QVFCTIWU = 429; public static final int PPC_INS_QVFCTIWUZ = 430; public static final int PPC_INS_QVFCTIWZ = 431; public static final int PPC_INS_QVFLOGICAL = 432; public static final int PPC_INS_QVFMADD = 433; public static final int PPC_INS_QVFMADDS = 434; public static final int PPC_INS_QVFMR = 435; public static final int PPC_INS_QVFMSUB = 436; public static final int PPC_INS_QVFMSUBS = 437; public static final int PPC_INS_QVFMUL = 438; public static final int PPC_INS_QVFMULS = 439; public static final int PPC_INS_QVFNABS = 440; public static final int PPC_INS_QVFNEG = 441; public static final int PPC_INS_QVFNMADD = 442; public static final int PPC_INS_QVFNMADDS = 443; public static final int PPC_INS_QVFNMSUB = 444; public static final int PPC_INS_QVFNMSUBS = 445; public static final int PPC_INS_QVFPERM = 446; public static final int PPC_INS_QVFRE = 447; public static final int PPC_INS_QVFRES = 448; public static final int PPC_INS_QVFRIM = 449; public static final int PPC_INS_QVFRIN = 450; public static final int PPC_INS_QVFRIP = 451; public static final int PPC_INS_QVFRIZ = 452; public static final int PPC_INS_QVFRSP = 453; public static final int PPC_INS_QVFRSQRTE = 454; public static final int PPC_INS_QVFRSQRTES = 455; public static final int PPC_INS_QVFSEL = 456; public static final int PPC_INS_QVFSUB = 457; public static final int PPC_INS_QVFSUBS = 458; public static final int PPC_INS_QVFTSTNAN = 459; public static final int PPC_INS_QVFXMADD = 460; public static final int PPC_INS_QVFXMADDS = 461; public static final int PPC_INS_QVFXMUL = 462; public static final int PPC_INS_QVFXMULS = 463; public static final int PPC_INS_QVFXXCPNMADD = 464; public static final int PPC_INS_QVFXXCPNMADDS = 465; public static final int PPC_INS_QVFXXMADD = 466; public static final int PPC_INS_QVFXXMADDS = 467; public static final int PPC_INS_QVFXXNPMADD = 468; public static final int PPC_INS_QVFXXNPMADDS = 469; public static final int PPC_INS_QVGPCI = 470; public static final int PPC_INS_QVLFCDUX = 471; public static final int PPC_INS_QVLFCDUXA = 472; public static final int PPC_INS_QVLFCDX = 473; public static final int PPC_INS_QVLFCDXA = 474; public static final int PPC_INS_QVLFCSUX = 475; public static final int PPC_INS_QVLFCSUXA = 476; public static final int PPC_INS_QVLFCSX = 477; public static final int PPC_INS_QVLFCSXA = 478; public static final int PPC_INS_QVLFDUX = 479; public static final int PPC_INS_QVLFDUXA = 480; public static final int PPC_INS_QVLFDX = 481; public static final int PPC_INS_QVLFDXA = 482; public static final int PPC_INS_QVLFIWAX = 483; public static final int PPC_INS_QVLFIWAXA = 484; public static final int PPC_INS_QVLFIWZX = 485; public static final int PPC_INS_QVLFIWZXA = 486; public static final int PPC_INS_QVLFSUX = 487; public static final int PPC_INS_QVLFSUXA = 488; public static final int PPC_INS_QVLFSX = 489; public static final int PPC_INS_QVLFSXA = 490; public static final int PPC_INS_QVLPCLDX = 491; public static final int PPC_INS_QVLPCLSX = 492; public static final int PPC_INS_QVLPCRDX = 493; public static final int PPC_INS_QVLPCRSX = 494; public static final int PPC_INS_QVSTFCDUX = 495; public static final int PPC_INS_QVSTFCDUXA = 496; public static final int PPC_INS_QVSTFCDUXI = 497; public static final int PPC_INS_QVSTFCDUXIA = 498; public static final int PPC_INS_QVSTFCDX = 499; public static final int PPC_INS_QVSTFCDXA = 500; public static final int PPC_INS_QVSTFCDXI = 501; public static final int PPC_INS_QVSTFCDXIA = 502; public static final int PPC_INS_QVSTFCSUX = 503; public static final int PPC_INS_QVSTFCSUXA = 504; public static final int PPC_INS_QVSTFCSUXI = 505; public static final int PPC_INS_QVSTFCSUXIA = 506; public static final int PPC_INS_QVSTFCSX = 507; public static final int PPC_INS_QVSTFCSXA = 508; public static final int PPC_INS_QVSTFCSXI = 509; public static final int PPC_INS_QVSTFCSXIA = 510; public static final int PPC_INS_QVSTFDUX = 511; public static final int PPC_INS_QVSTFDUXA = 512; public static final int PPC_INS_QVSTFDUXI = 513; public static final int PPC_INS_QVSTFDUXIA = 514; public static final int PPC_INS_QVSTFDX = 515; public static final int PPC_INS_QVSTFDXA = 516; public static final int PPC_INS_QVSTFDXI = 517; public static final int PPC_INS_QVSTFDXIA = 518; public static final int PPC_INS_QVSTFIWX = 519; public static final int PPC_INS_QVSTFIWXA = 520; public static final int PPC_INS_QVSTFSUX = 521; public static final int PPC_INS_QVSTFSUXA = 522; public static final int PPC_INS_QVSTFSUXI = 523; public static final int PPC_INS_QVSTFSUXIA = 524; public static final int PPC_INS_QVSTFSX = 525; public static final int PPC_INS_QVSTFSXA = 526; public static final int PPC_INS_QVSTFSXI = 527; public static final int PPC_INS_QVSTFSXIA = 528; public static final int PPC_INS_RFCI = 529; public static final int PPC_INS_RFDI = 530; public static final int PPC_INS_RFI = 531; public static final int PPC_INS_RFID = 532; public static final int PPC_INS_RFMCI = 533; public static final int PPC_INS_RLDCL = 534; public static final int PPC_INS_RLDCR = 535; public static final int PPC_INS_RLDIC = 536; public static final int PPC_INS_RLDICL = 537; public static final int PPC_INS_RLDICR = 538; public static final int PPC_INS_RLDIMI = 539; public static final int PPC_INS_RLWIMI = 540; public static final int PPC_INS_RLWINM = 541; public static final int PPC_INS_RLWNM = 542; public static final int PPC_INS_SC = 543; public static final int PPC_INS_SLBIA = 544; public static final int PPC_INS_SLBIE = 545; public static final int PPC_INS_SLBMFEE = 546; public static final int PPC_INS_SLBMTE = 547; public static final int PPC_INS_SLD = 548; public static final int PPC_INS_SLW = 549; public static final int PPC_INS_SRAD = 550; public static final int PPC_INS_SRADI = 551; public static final int PPC_INS_SRAW = 552; public static final int PPC_INS_SRAWI = 553; public static final int PPC_INS_SRD = 554; public static final int PPC_INS_SRW = 555; public static final int PPC_INS_STB = 556; public static final int PPC_INS_STBCIX = 557; public static final int PPC_INS_STBU = 558; public static final int PPC_INS_STBUX = 559; public static final int PPC_INS_STBX = 560; public static final int PPC_INS_STD = 561; public static final int PPC_INS_STDBRX = 562; public static final int PPC_INS_STDCIX = 563; public static final int PPC_INS_STDCX = 564; public static final int PPC_INS_STDU = 565; public static final int PPC_INS_STDUX = 566; public static final int PPC_INS_STDX = 567; public static final int PPC_INS_STFD = 568; public static final int PPC_INS_STFDU = 569; public static final int PPC_INS_STFDUX = 570; public static final int PPC_INS_STFDX = 571; public static final int PPC_INS_STFIWX = 572; public static final int PPC_INS_STFS = 573; public static final int PPC_INS_STFSU = 574; public static final int PPC_INS_STFSUX = 575; public static final int PPC_INS_STFSX = 576; public static final int PPC_INS_STH = 577; public static final int PPC_INS_STHBRX = 578; public static final int PPC_INS_STHCIX = 579; public static final int PPC_INS_STHU = 580; public static final int PPC_INS_STHUX = 581; public static final int PPC_INS_STHX = 582; public static final int PPC_INS_STMW = 583; public static final int PPC_INS_STSWI = 584; public static final int PPC_INS_STVEBX = 585; public static final int PPC_INS_STVEHX = 586; public static final int PPC_INS_STVEWX = 587; public static final int PPC_INS_STVX = 588; public static final int PPC_INS_STVXL = 589; public static final int PPC_INS_STW = 590; public static final int PPC_INS_STWBRX = 591; public static final int PPC_INS_STWCIX = 592; public static final int PPC_INS_STWCX = 593; public static final int PPC_INS_STWU = 594; public static final int PPC_INS_STWUX = 595; public static final int PPC_INS_STWX = 596; public static final int PPC_INS_STXSDX = 597; public static final int PPC_INS_STXVD2X = 598; public static final int PPC_INS_STXVW4X = 599; public static final int PPC_INS_SUBF = 600; public static final int PPC_INS_SUBFC = 601; public static final int PPC_INS_SUBFE = 602; public static final int PPC_INS_SUBFIC = 603; public static final int PPC_INS_SUBFME = 604; public static final int PPC_INS_SUBFZE = 605; public static final int PPC_INS_SYNC = 606; public static final int PPC_INS_TD = 607; public static final int PPC_INS_TDI = 608; public static final int PPC_INS_TLBIA = 609; public static final int PPC_INS_TLBIE = 610; public static final int PPC_INS_TLBIEL = 611; public static final int PPC_INS_TLBIVAX = 612; public static final int PPC_INS_TLBLD = 613; public static final int PPC_INS_TLBLI = 614; public static final int PPC_INS_TLBRE = 615; public static final int PPC_INS_TLBSX = 616; public static final int PPC_INS_TLBSYNC = 617; public static final int PPC_INS_TLBWE = 618; public static final int PPC_INS_TRAP = 619; public static final int PPC_INS_TW = 620; public static final int PPC_INS_TWI = 621; public static final int PPC_INS_VADDCUW = 622; public static final int PPC_INS_VADDFP = 623; public static final int PPC_INS_VADDSBS = 624; public static final int PPC_INS_VADDSHS = 625; public static final int PPC_INS_VADDSWS = 626; public static final int PPC_INS_VADDUBM = 627; public static final int PPC_INS_VADDUBS = 628; public static final int PPC_INS_VADDUDM = 629; public static final int PPC_INS_VADDUHM = 630; public static final int PPC_INS_VADDUHS = 631; public static final int PPC_INS_VADDUWM = 632; public static final int PPC_INS_VADDUWS = 633; public static final int PPC_INS_VAND = 634; public static final int PPC_INS_VANDC = 635; public static final int PPC_INS_VAVGSB = 636; public static final int PPC_INS_VAVGSH = 637; public static final int PPC_INS_VAVGSW = 638; public static final int PPC_INS_VAVGUB = 639; public static final int PPC_INS_VAVGUH = 640; public static final int PPC_INS_VAVGUW = 641; public static final int PPC_INS_VCFSX = 642; public static final int PPC_INS_VCFUX = 643; public static final int PPC_INS_VCLZB = 644; public static final int PPC_INS_VCLZD = 645; public static final int PPC_INS_VCLZH = 646; public static final int PPC_INS_VCLZW = 647; public static final int PPC_INS_VCMPBFP = 648; public static final int PPC_INS_VCMPEQFP = 649; public static final int PPC_INS_VCMPEQUB = 650; public static final int PPC_INS_VCMPEQUD = 651; public static final int PPC_INS_VCMPEQUH = 652; public static final int PPC_INS_VCMPEQUW = 653; public static final int PPC_INS_VCMPGEFP = 654; public static final int PPC_INS_VCMPGTFP = 655; public static final int PPC_INS_VCMPGTSB = 656; public static final int PPC_INS_VCMPGTSD = 657; public static final int PPC_INS_VCMPGTSH = 658; public static final int PPC_INS_VCMPGTSW = 659; public static final int PPC_INS_VCMPGTUB = 660; public static final int PPC_INS_VCMPGTUD = 661; public static final int PPC_INS_VCMPGTUH = 662; public static final int PPC_INS_VCMPGTUW = 663; public static final int PPC_INS_VCTSXS = 664; public static final int PPC_INS_VCTUXS = 665; public static final int PPC_INS_VEQV = 666; public static final int PPC_INS_VEXPTEFP = 667; public static final int PPC_INS_VLOGEFP = 668; public static final int PPC_INS_VMADDFP = 669; public static final int PPC_INS_VMAXFP = 670; public static final int PPC_INS_VMAXSB = 671; public static final int PPC_INS_VMAXSD = 672; public static final int PPC_INS_VMAXSH = 673; public static final int PPC_INS_VMAXSW = 674; public static final int PPC_INS_VMAXUB = 675; public static final int PPC_INS_VMAXUD = 676; public static final int PPC_INS_VMAXUH = 677; public static final int PPC_INS_VMAXUW = 678; public static final int PPC_INS_VMHADDSHS = 679; public static final int PPC_INS_VMHRADDSHS = 680; public static final int PPC_INS_VMINUD = 681; public static final int PPC_INS_VMINFP = 682; public static final int PPC_INS_VMINSB = 683; public static final int PPC_INS_VMINSD = 684; public static final int PPC_INS_VMINSH = 685; public static final int PPC_INS_VMINSW = 686; public static final int PPC_INS_VMINUB = 687; public static final int PPC_INS_VMINUH = 688; public static final int PPC_INS_VMINUW = 689; public static final int PPC_INS_VMLADDUHM = 690; public static final int PPC_INS_VMRGHB = 691; public static final int PPC_INS_VMRGHH = 692; public static final int PPC_INS_VMRGHW = 693; public static final int PPC_INS_VMRGLB = 694; public static final int PPC_INS_VMRGLH = 695; public static final int PPC_INS_VMRGLW = 696; public static final int PPC_INS_VMSUMMBM = 697; public static final int PPC_INS_VMSUMSHM = 698; public static final int PPC_INS_VMSUMSHS = 699; public static final int PPC_INS_VMSUMUBM = 700; public static final int PPC_INS_VMSUMUHM = 701; public static final int PPC_INS_VMSUMUHS = 702; public static final int PPC_INS_VMULESB = 703; public static final int PPC_INS_VMULESH = 704; public static final int PPC_INS_VMULESW = 705; public static final int PPC_INS_VMULEUB = 706; public static final int PPC_INS_VMULEUH = 707; public static final int PPC_INS_VMULEUW = 708; public static final int PPC_INS_VMULOSB = 709; public static final int PPC_INS_VMULOSH = 710; public static final int PPC_INS_VMULOSW = 711; public static final int PPC_INS_VMULOUB = 712; public static final int PPC_INS_VMULOUH = 713; public static final int PPC_INS_VMULOUW = 714; public static final int PPC_INS_VMULUWM = 715; public static final int PPC_INS_VNAND = 716; public static final int PPC_INS_VNMSUBFP = 717; public static final int PPC_INS_VNOR = 718; public static final int PPC_INS_VOR = 719; public static final int PPC_INS_VORC = 720; public static final int PPC_INS_VPERM = 721; public static final int PPC_INS_VPKPX = 722; public static final int PPC_INS_VPKSHSS = 723; public static final int PPC_INS_VPKSHUS = 724; public static final int PPC_INS_VPKSWSS = 725; public static final int PPC_INS_VPKSWUS = 726; public static final int PPC_INS_VPKUHUM = 727; public static final int PPC_INS_VPKUHUS = 728; public static final int PPC_INS_VPKUWUM = 729; public static final int PPC_INS_VPKUWUS = 730; public static final int PPC_INS_VPOPCNTB = 731; public static final int PPC_INS_VPOPCNTD = 732; public static final int PPC_INS_VPOPCNTH = 733; public static final int PPC_INS_VPOPCNTW = 734; public static final int PPC_INS_VREFP = 735; public static final int PPC_INS_VRFIM = 736; public static final int PPC_INS_VRFIN = 737; public static final int PPC_INS_VRFIP = 738; public static final int PPC_INS_VRFIZ = 739; public static final int PPC_INS_VRLB = 740; public static final int PPC_INS_VRLD = 741; public static final int PPC_INS_VRLH = 742; public static final int PPC_INS_VRLW = 743; public static final int PPC_INS_VRSQRTEFP = 744; public static final int PPC_INS_VSEL = 745; public static final int PPC_INS_VSL = 746; public static final int PPC_INS_VSLB = 747; public static final int PPC_INS_VSLD = 748; public static final int PPC_INS_VSLDOI = 749; public static final int PPC_INS_VSLH = 750; public static final int PPC_INS_VSLO = 751; public static final int PPC_INS_VSLW = 752; public static final int PPC_INS_VSPLTB = 753; public static final int PPC_INS_VSPLTH = 754; public static final int PPC_INS_VSPLTISB = 755; public static final int PPC_INS_VSPLTISH = 756; public static final int PPC_INS_VSPLTISW = 757; public static final int PPC_INS_VSPLTW = 758; public static final int PPC_INS_VSR = 759; public static final int PPC_INS_VSRAB = 760; public static final int PPC_INS_VSRAD = 761; public static final int PPC_INS_VSRAH = 762; public static final int PPC_INS_VSRAW = 763; public static final int PPC_INS_VSRB = 764; public static final int PPC_INS_VSRD = 765; public static final int PPC_INS_VSRH = 766; public static final int PPC_INS_VSRO = 767; public static final int PPC_INS_VSRW = 768; public static final int PPC_INS_VSUBCUW = 769; public static final int PPC_INS_VSUBFP = 770; public static final int PPC_INS_VSUBSBS = 771; public static final int PPC_INS_VSUBSHS = 772; public static final int PPC_INS_VSUBSWS = 773; public static final int PPC_INS_VSUBUBM = 774; public static final int PPC_INS_VSUBUBS = 775; public static final int PPC_INS_VSUBUDM = 776; public static final int PPC_INS_VSUBUHM = 777; public static final int PPC_INS_VSUBUHS = 778; public static final int PPC_INS_VSUBUWM = 779; public static final int PPC_INS_VSUBUWS = 780; public static final int PPC_INS_VSUM2SWS = 781; public static final int PPC_INS_VSUM4SBS = 782; public static final int PPC_INS_VSUM4SHS = 783; public static final int PPC_INS_VSUM4UBS = 784; public static final int PPC_INS_VSUMSWS = 785; public static final int PPC_INS_VUPKHPX = 786; public static final int PPC_INS_VUPKHSB = 787; public static final int PPC_INS_VUPKHSH = 788; public static final int PPC_INS_VUPKLPX = 789; public static final int PPC_INS_VUPKLSB = 790; public static final int PPC_INS_VUPKLSH = 791; public static final int PPC_INS_VXOR = 792; public static final int PPC_INS_WAIT = 793; public static final int PPC_INS_WRTEE = 794; public static final int PPC_INS_WRTEEI = 795; public static final int PPC_INS_XOR = 796; public static final int PPC_INS_XORI = 797; public static final int PPC_INS_XORIS = 798; public static final int PPC_INS_XSABSDP = 799; public static final int PPC_INS_XSADDDP = 800; public static final int PPC_INS_XSCMPODP = 801; public static final int PPC_INS_XSCMPUDP = 802; public static final int PPC_INS_XSCPSGNDP = 803; public static final int PPC_INS_XSCVDPSP = 804; public static final int PPC_INS_XSCVDPSXDS = 805; public static final int PPC_INS_XSCVDPSXWS = 806; public static final int PPC_INS_XSCVDPUXDS = 807; public static final int PPC_INS_XSCVDPUXWS = 808; public static final int PPC_INS_XSCVSPDP = 809; public static final int PPC_INS_XSCVSXDDP = 810; public static final int PPC_INS_XSCVUXDDP = 811; public static final int PPC_INS_XSDIVDP = 812; public static final int PPC_INS_XSMADDADP = 813; public static final int PPC_INS_XSMADDMDP = 814; public static final int PPC_INS_XSMAXDP = 815; public static final int PPC_INS_XSMINDP = 816; public static final int PPC_INS_XSMSUBADP = 817; public static final int PPC_INS_XSMSUBMDP = 818; public static final int PPC_INS_XSMULDP = 819; public static final int PPC_INS_XSNABSDP = 820; public static final int PPC_INS_XSNEGDP = 821; public static final int PPC_INS_XSNMADDADP = 822; public static final int PPC_INS_XSNMADDMDP = 823; public static final int PPC_INS_XSNMSUBADP = 824; public static final int PPC_INS_XSNMSUBMDP = 825; public static final int PPC_INS_XSRDPI = 826; public static final int PPC_INS_XSRDPIC = 827; public static final int PPC_INS_XSRDPIM = 828; public static final int PPC_INS_XSRDPIP = 829; public static final int PPC_INS_XSRDPIZ = 830; public static final int PPC_INS_XSREDP = 831; public static final int PPC_INS_XSRSQRTEDP = 832; public static final int PPC_INS_XSSQRTDP = 833; public static final int PPC_INS_XSSUBDP = 834; public static final int PPC_INS_XSTDIVDP = 835; public static final int PPC_INS_XSTSQRTDP = 836; public static final int PPC_INS_XVABSDP = 837; public static final int PPC_INS_XVABSSP = 838; public static final int PPC_INS_XVADDDP = 839; public static final int PPC_INS_XVADDSP = 840; public static final int PPC_INS_XVCMPEQDP = 841; public static final int PPC_INS_XVCMPEQSP = 842; public static final int PPC_INS_XVCMPGEDP = 843; public static final int PPC_INS_XVCMPGESP = 844; public static final int PPC_INS_XVCMPGTDP = 845; public static final int PPC_INS_XVCMPGTSP = 846; public static final int PPC_INS_XVCPSGNDP = 847; public static final int PPC_INS_XVCPSGNSP = 848; public static final int PPC_INS_XVCVDPSP = 849; public static final int PPC_INS_XVCVDPSXDS = 850; public static final int PPC_INS_XVCVDPSXWS = 851; public static final int PPC_INS_XVCVDPUXDS = 852; public static final int PPC_INS_XVCVDPUXWS = 853; public static final int PPC_INS_XVCVSPDP = 854; public static final int PPC_INS_XVCVSPSXDS = 855; public static final int PPC_INS_XVCVSPSXWS = 856; public static final int PPC_INS_XVCVSPUXDS = 857; public static final int PPC_INS_XVCVSPUXWS = 858; public static final int PPC_INS_XVCVSXDDP = 859; public static final int PPC_INS_XVCVSXDSP = 860; public static final int PPC_INS_XVCVSXWDP = 861; public static final int PPC_INS_XVCVSXWSP = 862; public static final int PPC_INS_XVCVUXDDP = 863; public static final int PPC_INS_XVCVUXDSP = 864; public static final int PPC_INS_XVCVUXWDP = 865; public static final int PPC_INS_XVCVUXWSP = 866; public static final int PPC_INS_XVDIVDP = 867; public static final int PPC_INS_XVDIVSP = 868; public static final int PPC_INS_XVMADDADP = 869; public static final int PPC_INS_XVMADDASP = 870; public static final int PPC_INS_XVMADDMDP = 871; public static final int PPC_INS_XVMADDMSP = 872; public static final int PPC_INS_XVMAXDP = 873; public static final int PPC_INS_XVMAXSP = 874; public static final int PPC_INS_XVMINDP = 875; public static final int PPC_INS_XVMINSP = 876; public static final int PPC_INS_XVMSUBADP = 877; public static final int PPC_INS_XVMSUBASP = 878; public static final int PPC_INS_XVMSUBMDP = 879; public static final int PPC_INS_XVMSUBMSP = 880; public static final int PPC_INS_XVMULDP = 881; public static final int PPC_INS_XVMULSP = 882; public static final int PPC_INS_XVNABSDP = 883; public static final int PPC_INS_XVNABSSP = 884; public static final int PPC_INS_XVNEGDP = 885; public static final int PPC_INS_XVNEGSP = 886; public static final int PPC_INS_XVNMADDADP = 887; public static final int PPC_INS_XVNMADDASP = 888; public static final int PPC_INS_XVNMADDMDP = 889; public static final int PPC_INS_XVNMADDMSP = 890; public static final int PPC_INS_XVNMSUBADP = 891; public static final int PPC_INS_XVNMSUBASP = 892; public static final int PPC_INS_XVNMSUBMDP = 893; public static final int PPC_INS_XVNMSUBMSP = 894; public static final int PPC_INS_XVRDPI = 895; public static final int PPC_INS_XVRDPIC = 896; public static final int PPC_INS_XVRDPIM = 897; public static final int PPC_INS_XVRDPIP = 898; public static final int PPC_INS_XVRDPIZ = 899; public static final int PPC_INS_XVREDP = 900; public static final int PPC_INS_XVRESP = 901; public static final int PPC_INS_XVRSPI = 902; public static final int PPC_INS_XVRSPIC = 903; public static final int PPC_INS_XVRSPIM = 904; public static final int PPC_INS_XVRSPIP = 905; public static final int PPC_INS_XVRSPIZ = 906; public static final int PPC_INS_XVRSQRTEDP = 907; public static final int PPC_INS_XVRSQRTESP = 908; public static final int PPC_INS_XVSQRTDP = 909; public static final int PPC_INS_XVSQRTSP = 910; public static final int PPC_INS_XVSUBDP = 911; public static final int PPC_INS_XVSUBSP = 912; public static final int PPC_INS_XVTDIVDP = 913; public static final int PPC_INS_XVTDIVSP = 914; public static final int PPC_INS_XVTSQRTDP = 915; public static final int PPC_INS_XVTSQRTSP = 916; public static final int PPC_INS_XXLAND = 917; public static final int PPC_INS_XXLANDC = 918; public static final int PPC_INS_XXLEQV = 919; public static final int PPC_INS_XXLNAND = 920; public static final int PPC_INS_XXLNOR = 921; public static final int PPC_INS_XXLOR = 922; public static final int PPC_INS_XXLORC = 923; public static final int PPC_INS_XXLXOR = 924; public static final int PPC_INS_XXMRGHW = 925; public static final int PPC_INS_XXMRGLW = 926; public static final int PPC_INS_XXPERMDI = 927; public static final int PPC_INS_XXSEL = 928; public static final int PPC_INS_XXSLDWI = 929; public static final int PPC_INS_XXSPLTW = 930; public static final int PPC_INS_BCA = 931; public static final int PPC_INS_BCLA = 932; public static final int PPC_INS_SLWI = 933; public static final int PPC_INS_SRWI = 934; public static final int PPC_INS_SLDI = 935; public static final int PPC_INS_BTA = 936; public static final int PPC_INS_CRSET = 937; public static final int PPC_INS_CRNOT = 938; public static final int PPC_INS_CRMOVE = 939; public static final int PPC_INS_CRCLR = 940; public static final int PPC_INS_MFBR0 = 941; public static final int PPC_INS_MFBR1 = 942; public static final int PPC_INS_MFBR2 = 943; public static final int PPC_INS_MFBR3 = 944; public static final int PPC_INS_MFBR4 = 945; public static final int PPC_INS_MFBR5 = 946; public static final int PPC_INS_MFBR6 = 947; public static final int PPC_INS_MFBR7 = 948; public static final int PPC_INS_MFXER = 949; public static final int PPC_INS_MFRTCU = 950; public static final int PPC_INS_MFRTCL = 951; public static final int PPC_INS_MFDSCR = 952; public static final int PPC_INS_MFDSISR = 953; public static final int PPC_INS_MFDAR = 954; public static final int PPC_INS_MFSRR2 = 955; public static final int PPC_INS_MFSRR3 = 956; public static final int PPC_INS_MFCFAR = 957; public static final int PPC_INS_MFAMR = 958; public static final int PPC_INS_MFPID = 959; public static final int PPC_INS_MFTBLO = 960; public static final int PPC_INS_MFTBHI = 961; public static final int PPC_INS_MFDBATU = 962; public static final int PPC_INS_MFDBATL = 963; public static final int PPC_INS_MFIBATU = 964; public static final int PPC_INS_MFIBATL = 965; public static final int PPC_INS_MFDCCR = 966; public static final int PPC_INS_MFICCR = 967; public static final int PPC_INS_MFDEAR = 968; public static final int PPC_INS_MFESR = 969; public static final int PPC_INS_MFSPEFSCR = 970; public static final int PPC_INS_MFTCR = 971; public static final int PPC_INS_MFASR = 972; public static final int PPC_INS_MFPVR = 973; public static final int PPC_INS_MFTBU = 974; public static final int PPC_INS_MTCR = 975; public static final int PPC_INS_MTBR0 = 976; public static final int PPC_INS_MTBR1 = 977; public static final int PPC_INS_MTBR2 = 978; public static final int PPC_INS_MTBR3 = 979; public static final int PPC_INS_MTBR4 = 980; public static final int PPC_INS_MTBR5 = 981; public static final int PPC_INS_MTBR6 = 982; public static final int PPC_INS_MTBR7 = 983; public static final int PPC_INS_MTXER = 984; public static final int PPC_INS_MTDSCR = 985; public static final int PPC_INS_MTDSISR = 986; public static final int PPC_INS_MTDAR = 987; public static final int PPC_INS_MTSRR2 = 988; public static final int PPC_INS_MTSRR3 = 989; public static final int PPC_INS_MTCFAR = 990; public static final int PPC_INS_MTAMR = 991; public static final int PPC_INS_MTPID = 992; public static final int PPC_INS_MTTBL = 993; public static final int PPC_INS_MTTBU = 994; public static final int PPC_INS_MTTBLO = 995; public static final int PPC_INS_MTTBHI = 996; public static final int PPC_INS_MTDBATU = 997; public static final int PPC_INS_MTDBATL = 998; public static final int PPC_INS_MTIBATU = 999; public static final int PPC_INS_MTIBATL = 1000; public static final int PPC_INS_MTDCCR = 1001; public static final int PPC_INS_MTICCR = 1002; public static final int PPC_INS_MTDEAR = 1003; public static final int PPC_INS_MTESR = 1004; public static final int PPC_INS_MTSPEFSCR = 1005; public static final int PPC_INS_MTTCR = 1006; public static final int PPC_INS_NOT = 1007; public static final int PPC_INS_MR = 1008; public static final int PPC_INS_ROTLD = 1009; public static final int PPC_INS_ROTLDI = 1010; public static final int PPC_INS_CLRLDI = 1011; public static final int PPC_INS_ROTLWI = 1012; public static final int PPC_INS_CLRLWI = 1013; public static final int PPC_INS_ROTLW = 1014; public static final int PPC_INS_SUB = 1015; public static final int PPC_INS_SUBC = 1016; public static final int PPC_INS_LWSYNC = 1017; public static final int PPC_INS_PTESYNC = 1018; public static final int PPC_INS_TDLT = 1019; public static final int PPC_INS_TDEQ = 1020; public static final int PPC_INS_TDGT = 1021; public static final int PPC_INS_TDNE = 1022; public static final int PPC_INS_TDLLT = 1023; public static final int PPC_INS_TDLGT = 1024; public static final int PPC_INS_TDU = 1025; public static final int PPC_INS_TDLTI = 1026; public static final int PPC_INS_TDEQI = 1027; public static final int PPC_INS_TDGTI = 1028; public static final int PPC_INS_TDNEI = 1029; public static final int PPC_INS_TDLLTI = 1030; public static final int PPC_INS_TDLGTI = 1031; public static final int PPC_INS_TDUI = 1032; public static final int PPC_INS_TLBREHI = 1033; public static final int PPC_INS_TLBRELO = 1034; public static final int PPC_INS_TLBWEHI = 1035; public static final int PPC_INS_TLBWELO = 1036; public static final int PPC_INS_TWLT = 1037; public static final int PPC_INS_TWEQ = 1038; public static final int PPC_INS_TWGT = 1039; public static final int PPC_INS_TWNE = 1040; public static final int PPC_INS_TWLLT = 1041; public static final int PPC_INS_TWLGT = 1042; public static final int PPC_INS_TWU = 1043; public static final int PPC_INS_TWLTI = 1044; public static final int PPC_INS_TWEQI = 1045; public static final int PPC_INS_TWGTI = 1046; public static final int PPC_INS_TWNEI = 1047; public static final int PPC_INS_TWLLTI = 1048; public static final int PPC_INS_TWLGTI = 1049; public static final int PPC_INS_TWUI = 1050; public static final int PPC_INS_WAITRSV = 1051; public static final int PPC_INS_WAITIMPL = 1052; public static final int PPC_INS_XNOP = 1053; public static final int PPC_INS_XVMOVDP = 1054; public static final int PPC_INS_XVMOVSP = 1055; public static final int PPC_INS_XXSPLTD = 1056; public static final int PPC_INS_XXMRGHD = 1057; public static final int PPC_INS_XXMRGLD = 1058; public static final int PPC_INS_XXSWAPD = 1059; public static final int PPC_INS_BT = 1060; public static final int PPC_INS_BF = 1061; public static final int PPC_INS_BDNZT = 1062; public static final int PPC_INS_BDNZF = 1063; public static final int PPC_INS_BDZF = 1064; public static final int PPC_INS_BDZT = 1065; public static final int PPC_INS_BFA = 1066; public static final int PPC_INS_BDNZTA = 1067; public static final int PPC_INS_BDNZFA = 1068; public static final int PPC_INS_BDZTA = 1069; public static final int PPC_INS_BDZFA = 1070; public static final int PPC_INS_BTCTR = 1071; public static final int PPC_INS_BFCTR = 1072; public static final int PPC_INS_BTCTRL = 1073; public static final int PPC_INS_BFCTRL = 1074; public static final int PPC_INS_BTL = 1075; public static final int PPC_INS_BFL = 1076; public static final int PPC_INS_BDNZTL = 1077; public static final int PPC_INS_BDNZFL = 1078; public static final int PPC_INS_BDZTL = 1079; public static final int PPC_INS_BDZFL = 1080; public static final int PPC_INS_BTLA = 1081; public static final int PPC_INS_BFLA = 1082; public static final int PPC_INS_BDNZTLA = 1083; public static final int PPC_INS_BDNZFLA = 1084; public static final int PPC_INS_BDZTLA = 1085; public static final int PPC_INS_BDZFLA = 1086; public static final int PPC_INS_BTLR = 1087; public static final int PPC_INS_BFLR = 1088; public static final int PPC_INS_BDNZTLR = 1089; public static final int PPC_INS_BDZTLR = 1090; public static final int PPC_INS_BDZFLR = 1091; public static final int PPC_INS_BTLRL = 1092; public static final int PPC_INS_BFLRL = 1093; public static final int PPC_INS_BDNZTLRL = 1094; public static final int PPC_INS_BDNZFLRL = 1095; public static final int PPC_INS_BDZTLRL = 1096; public static final int PPC_INS_BDZFLRL = 1097; public static final int PPC_INS_QVFAND = 1098; public static final int PPC_INS_QVFCLR = 1099; public static final int PPC_INS_QVFANDC = 1100; public static final int PPC_INS_QVFCTFB = 1101; public static final int PPC_INS_QVFXOR = 1102; public static final int PPC_INS_QVFOR = 1103; public static final int PPC_INS_QVFNOR = 1104; public static final int PPC_INS_QVFEQU = 1105; public static final int PPC_INS_QVFNOT = 1106; public static final int PPC_INS_QVFORC = 1107; public static final int PPC_INS_QVFNAND = 1108; public static final int PPC_INS_QVFSET = 1109; public static final int PPC_INS_ENDING = 1110; public static final int PPC_GRP_INVALID = 0; public static final int PPC_GRP_JUMP = 1; public static final int PPC_GRP_ALTIVEC = 128; public static final int PPC_GRP_MODE32 = 129; public static final int PPC_GRP_MODE64 = 130; public static final int PPC_GRP_BOOKE = 131; public static final int PPC_GRP_NOTBOOKE = 132; public static final int PPC_GRP_SPE = 133; public static final int PPC_GRP_VSX = 134; public static final int PPC_GRP_E500 = 135; public static final int PPC_GRP_PPC4XX = 136; public static final int PPC_GRP_PPC6XX = 137; public static final int PPC_GRP_ICBT = 138; public static final int PPC_GRP_P8ALTIVEC = 139; public static final int PPC_GRP_P8VECTOR = 140; public static final int PPC_GRP_QPX = 141; public static final int PPC_GRP_ENDING = 142; }capstone-sys-0.11.0/capstone/bindings/java/capstone/Sparc.java010066400017500001750000000035331363402546700225430ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.Sparc_const.*; public class Sparc { public static class MemType extends Structure { public byte base; public byte index; public int disp; @Override public List getFieldOrder() { return Arrays.asList("base", "index", "disp"); } } public static class OpValue extends Union { public int reg; public int imm; public MemType mem; } public static class Operand extends Structure { public int type; public OpValue value; public void read() { readField("type"); if (type == SPARC_OP_MEM) value.setType(MemType.class); if (type == SPARC_OP_IMM || type == SPARC_OP_REG) value.setType(Integer.TYPE); if (type == SPARC_OP_INVALID) return; readField("value"); } @Override public List getFieldOrder() { return Arrays.asList("type", "value"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public int cc; public int hint; public byte op_count; public Operand [] op; public UnionOpInfo() { op = new Operand[4]; } public void read() { readField("cc"); readField("hint"); readField("op_count"); op = new Operand[op_count]; if (op_count != 0) readField("op"); } @Override public List getFieldOrder() { return Arrays.asList("cc", "hint", "op_count", "op"); } } public static class OpInfo extends Capstone.OpInfo { public int cc; public int hint; public Operand [] op; public OpInfo(UnionOpInfo op_info) { cc = op_info.cc; hint = op_info.hint; op = op_info.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/Sparc_const.java010066400017500001750000000474321363402546700237570ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class Sparc_const { public static final int SPARC_CC_INVALID = 0; public static final int SPARC_CC_ICC_A = 8+256; public static final int SPARC_CC_ICC_N = 0+256; public static final int SPARC_CC_ICC_NE = 9+256; public static final int SPARC_CC_ICC_E = 1+256; public static final int SPARC_CC_ICC_G = 10+256; public static final int SPARC_CC_ICC_LE = 2+256; public static final int SPARC_CC_ICC_GE = 11+256; public static final int SPARC_CC_ICC_L = 3+256; public static final int SPARC_CC_ICC_GU = 12+256; public static final int SPARC_CC_ICC_LEU = 4+256; public static final int SPARC_CC_ICC_CC = 13+256; public static final int SPARC_CC_ICC_CS = 5+256; public static final int SPARC_CC_ICC_POS = 14+256; public static final int SPARC_CC_ICC_NEG = 6+256; public static final int SPARC_CC_ICC_VC = 15+256; public static final int SPARC_CC_ICC_VS = 7+256; public static final int SPARC_CC_FCC_A = 8+16+256; public static final int SPARC_CC_FCC_N = 0+16+256; public static final int SPARC_CC_FCC_U = 7+16+256; public static final int SPARC_CC_FCC_G = 6+16+256; public static final int SPARC_CC_FCC_UG = 5+16+256; public static final int SPARC_CC_FCC_L = 4+16+256; public static final int SPARC_CC_FCC_UL = 3+16+256; public static final int SPARC_CC_FCC_LG = 2+16+256; public static final int SPARC_CC_FCC_NE = 1+16+256; public static final int SPARC_CC_FCC_E = 9+16+256; public static final int SPARC_CC_FCC_UE = 10+16+256; public static final int SPARC_CC_FCC_GE = 11+16+256; public static final int SPARC_CC_FCC_UGE = 12+16+256; public static final int SPARC_CC_FCC_LE = 13+16+256; public static final int SPARC_CC_FCC_ULE = 14+16+256; public static final int SPARC_CC_FCC_O = 15+16+256; public static final int SPARC_HINT_INVALID = 0; public static final int SPARC_HINT_A = 1<<0; public static final int SPARC_HINT_PT = 1<<1; public static final int SPARC_HINT_PN = 1<<2; public static final int SPARC_OP_INVALID = 0; public static final int SPARC_OP_REG = 1; public static final int SPARC_OP_IMM = 2; public static final int SPARC_OP_MEM = 3; public static final int SPARC_REG_INVALID = 0; public static final int SPARC_REG_F0 = 1; public static final int SPARC_REG_F1 = 2; public static final int SPARC_REG_F2 = 3; public static final int SPARC_REG_F3 = 4; public static final int SPARC_REG_F4 = 5; public static final int SPARC_REG_F5 = 6; public static final int SPARC_REG_F6 = 7; public static final int SPARC_REG_F7 = 8; public static final int SPARC_REG_F8 = 9; public static final int SPARC_REG_F9 = 10; public static final int SPARC_REG_F10 = 11; public static final int SPARC_REG_F11 = 12; public static final int SPARC_REG_F12 = 13; public static final int SPARC_REG_F13 = 14; public static final int SPARC_REG_F14 = 15; public static final int SPARC_REG_F15 = 16; public static final int SPARC_REG_F16 = 17; public static final int SPARC_REG_F17 = 18; public static final int SPARC_REG_F18 = 19; public static final int SPARC_REG_F19 = 20; public static final int SPARC_REG_F20 = 21; public static final int SPARC_REG_F21 = 22; public static final int SPARC_REG_F22 = 23; public static final int SPARC_REG_F23 = 24; public static final int SPARC_REG_F24 = 25; public static final int SPARC_REG_F25 = 26; public static final int SPARC_REG_F26 = 27; public static final int SPARC_REG_F27 = 28; public static final int SPARC_REG_F28 = 29; public static final int SPARC_REG_F29 = 30; public static final int SPARC_REG_F30 = 31; public static final int SPARC_REG_F31 = 32; public static final int SPARC_REG_F32 = 33; public static final int SPARC_REG_F34 = 34; public static final int SPARC_REG_F36 = 35; public static final int SPARC_REG_F38 = 36; public static final int SPARC_REG_F40 = 37; public static final int SPARC_REG_F42 = 38; public static final int SPARC_REG_F44 = 39; public static final int SPARC_REG_F46 = 40; public static final int SPARC_REG_F48 = 41; public static final int SPARC_REG_F50 = 42; public static final int SPARC_REG_F52 = 43; public static final int SPARC_REG_F54 = 44; public static final int SPARC_REG_F56 = 45; public static final int SPARC_REG_F58 = 46; public static final int SPARC_REG_F60 = 47; public static final int SPARC_REG_F62 = 48; public static final int SPARC_REG_FCC0 = 49; public static final int SPARC_REG_FCC1 = 50; public static final int SPARC_REG_FCC2 = 51; public static final int SPARC_REG_FCC3 = 52; public static final int SPARC_REG_FP = 53; public static final int SPARC_REG_G0 = 54; public static final int SPARC_REG_G1 = 55; public static final int SPARC_REG_G2 = 56; public static final int SPARC_REG_G3 = 57; public static final int SPARC_REG_G4 = 58; public static final int SPARC_REG_G5 = 59; public static final int SPARC_REG_G6 = 60; public static final int SPARC_REG_G7 = 61; public static final int SPARC_REG_I0 = 62; public static final int SPARC_REG_I1 = 63; public static final int SPARC_REG_I2 = 64; public static final int SPARC_REG_I3 = 65; public static final int SPARC_REG_I4 = 66; public static final int SPARC_REG_I5 = 67; public static final int SPARC_REG_I7 = 68; public static final int SPARC_REG_ICC = 69; public static final int SPARC_REG_L0 = 70; public static final int SPARC_REG_L1 = 71; public static final int SPARC_REG_L2 = 72; public static final int SPARC_REG_L3 = 73; public static final int SPARC_REG_L4 = 74; public static final int SPARC_REG_L5 = 75; public static final int SPARC_REG_L6 = 76; public static final int SPARC_REG_L7 = 77; public static final int SPARC_REG_O0 = 78; public static final int SPARC_REG_O1 = 79; public static final int SPARC_REG_O2 = 80; public static final int SPARC_REG_O3 = 81; public static final int SPARC_REG_O4 = 82; public static final int SPARC_REG_O5 = 83; public static final int SPARC_REG_O7 = 84; public static final int SPARC_REG_SP = 85; public static final int SPARC_REG_Y = 86; public static final int SPARC_REG_XCC = 87; public static final int SPARC_REG_ENDING = 88; public static final int SPARC_REG_O6 = SPARC_REG_SP; public static final int SPARC_REG_I6 = SPARC_REG_FP; public static final int SPARC_INS_INVALID = 0; public static final int SPARC_INS_ADDCC = 1; public static final int SPARC_INS_ADDX = 2; public static final int SPARC_INS_ADDXCC = 3; public static final int SPARC_INS_ADDXC = 4; public static final int SPARC_INS_ADDXCCC = 5; public static final int SPARC_INS_ADD = 6; public static final int SPARC_INS_ALIGNADDR = 7; public static final int SPARC_INS_ALIGNADDRL = 8; public static final int SPARC_INS_ANDCC = 9; public static final int SPARC_INS_ANDNCC = 10; public static final int SPARC_INS_ANDN = 11; public static final int SPARC_INS_AND = 12; public static final int SPARC_INS_ARRAY16 = 13; public static final int SPARC_INS_ARRAY32 = 14; public static final int SPARC_INS_ARRAY8 = 15; public static final int SPARC_INS_B = 16; public static final int SPARC_INS_JMP = 17; public static final int SPARC_INS_BMASK = 18; public static final int SPARC_INS_FB = 19; public static final int SPARC_INS_BRGEZ = 20; public static final int SPARC_INS_BRGZ = 21; public static final int SPARC_INS_BRLEZ = 22; public static final int SPARC_INS_BRLZ = 23; public static final int SPARC_INS_BRNZ = 24; public static final int SPARC_INS_BRZ = 25; public static final int SPARC_INS_BSHUFFLE = 26; public static final int SPARC_INS_CALL = 27; public static final int SPARC_INS_CASX = 28; public static final int SPARC_INS_CAS = 29; public static final int SPARC_INS_CMASK16 = 30; public static final int SPARC_INS_CMASK32 = 31; public static final int SPARC_INS_CMASK8 = 32; public static final int SPARC_INS_CMP = 33; public static final int SPARC_INS_EDGE16 = 34; public static final int SPARC_INS_EDGE16L = 35; public static final int SPARC_INS_EDGE16LN = 36; public static final int SPARC_INS_EDGE16N = 37; public static final int SPARC_INS_EDGE32 = 38; public static final int SPARC_INS_EDGE32L = 39; public static final int SPARC_INS_EDGE32LN = 40; public static final int SPARC_INS_EDGE32N = 41; public static final int SPARC_INS_EDGE8 = 42; public static final int SPARC_INS_EDGE8L = 43; public static final int SPARC_INS_EDGE8LN = 44; public static final int SPARC_INS_EDGE8N = 45; public static final int SPARC_INS_FABSD = 46; public static final int SPARC_INS_FABSQ = 47; public static final int SPARC_INS_FABSS = 48; public static final int SPARC_INS_FADDD = 49; public static final int SPARC_INS_FADDQ = 50; public static final int SPARC_INS_FADDS = 51; public static final int SPARC_INS_FALIGNDATA = 52; public static final int SPARC_INS_FAND = 53; public static final int SPARC_INS_FANDNOT1 = 54; public static final int SPARC_INS_FANDNOT1S = 55; public static final int SPARC_INS_FANDNOT2 = 56; public static final int SPARC_INS_FANDNOT2S = 57; public static final int SPARC_INS_FANDS = 58; public static final int SPARC_INS_FCHKSM16 = 59; public static final int SPARC_INS_FCMPD = 60; public static final int SPARC_INS_FCMPEQ16 = 61; public static final int SPARC_INS_FCMPEQ32 = 62; public static final int SPARC_INS_FCMPGT16 = 63; public static final int SPARC_INS_FCMPGT32 = 64; public static final int SPARC_INS_FCMPLE16 = 65; public static final int SPARC_INS_FCMPLE32 = 66; public static final int SPARC_INS_FCMPNE16 = 67; public static final int SPARC_INS_FCMPNE32 = 68; public static final int SPARC_INS_FCMPQ = 69; public static final int SPARC_INS_FCMPS = 70; public static final int SPARC_INS_FDIVD = 71; public static final int SPARC_INS_FDIVQ = 72; public static final int SPARC_INS_FDIVS = 73; public static final int SPARC_INS_FDMULQ = 74; public static final int SPARC_INS_FDTOI = 75; public static final int SPARC_INS_FDTOQ = 76; public static final int SPARC_INS_FDTOS = 77; public static final int SPARC_INS_FDTOX = 78; public static final int SPARC_INS_FEXPAND = 79; public static final int SPARC_INS_FHADDD = 80; public static final int SPARC_INS_FHADDS = 81; public static final int SPARC_INS_FHSUBD = 82; public static final int SPARC_INS_FHSUBS = 83; public static final int SPARC_INS_FITOD = 84; public static final int SPARC_INS_FITOQ = 85; public static final int SPARC_INS_FITOS = 86; public static final int SPARC_INS_FLCMPD = 87; public static final int SPARC_INS_FLCMPS = 88; public static final int SPARC_INS_FLUSHW = 89; public static final int SPARC_INS_FMEAN16 = 90; public static final int SPARC_INS_FMOVD = 91; public static final int SPARC_INS_FMOVQ = 92; public static final int SPARC_INS_FMOVRDGEZ = 93; public static final int SPARC_INS_FMOVRQGEZ = 94; public static final int SPARC_INS_FMOVRSGEZ = 95; public static final int SPARC_INS_FMOVRDGZ = 96; public static final int SPARC_INS_FMOVRQGZ = 97; public static final int SPARC_INS_FMOVRSGZ = 98; public static final int SPARC_INS_FMOVRDLEZ = 99; public static final int SPARC_INS_FMOVRQLEZ = 100; public static final int SPARC_INS_FMOVRSLEZ = 101; public static final int SPARC_INS_FMOVRDLZ = 102; public static final int SPARC_INS_FMOVRQLZ = 103; public static final int SPARC_INS_FMOVRSLZ = 104; public static final int SPARC_INS_FMOVRDNZ = 105; public static final int SPARC_INS_FMOVRQNZ = 106; public static final int SPARC_INS_FMOVRSNZ = 107; public static final int SPARC_INS_FMOVRDZ = 108; public static final int SPARC_INS_FMOVRQZ = 109; public static final int SPARC_INS_FMOVRSZ = 110; public static final int SPARC_INS_FMOVS = 111; public static final int SPARC_INS_FMUL8SUX16 = 112; public static final int SPARC_INS_FMUL8ULX16 = 113; public static final int SPARC_INS_FMUL8X16 = 114; public static final int SPARC_INS_FMUL8X16AL = 115; public static final int SPARC_INS_FMUL8X16AU = 116; public static final int SPARC_INS_FMULD = 117; public static final int SPARC_INS_FMULD8SUX16 = 118; public static final int SPARC_INS_FMULD8ULX16 = 119; public static final int SPARC_INS_FMULQ = 120; public static final int SPARC_INS_FMULS = 121; public static final int SPARC_INS_FNADDD = 122; public static final int SPARC_INS_FNADDS = 123; public static final int SPARC_INS_FNAND = 124; public static final int SPARC_INS_FNANDS = 125; public static final int SPARC_INS_FNEGD = 126; public static final int SPARC_INS_FNEGQ = 127; public static final int SPARC_INS_FNEGS = 128; public static final int SPARC_INS_FNHADDD = 129; public static final int SPARC_INS_FNHADDS = 130; public static final int SPARC_INS_FNOR = 131; public static final int SPARC_INS_FNORS = 132; public static final int SPARC_INS_FNOT1 = 133; public static final int SPARC_INS_FNOT1S = 134; public static final int SPARC_INS_FNOT2 = 135; public static final int SPARC_INS_FNOT2S = 136; public static final int SPARC_INS_FONE = 137; public static final int SPARC_INS_FONES = 138; public static final int SPARC_INS_FOR = 139; public static final int SPARC_INS_FORNOT1 = 140; public static final int SPARC_INS_FORNOT1S = 141; public static final int SPARC_INS_FORNOT2 = 142; public static final int SPARC_INS_FORNOT2S = 143; public static final int SPARC_INS_FORS = 144; public static final int SPARC_INS_FPACK16 = 145; public static final int SPARC_INS_FPACK32 = 146; public static final int SPARC_INS_FPACKFIX = 147; public static final int SPARC_INS_FPADD16 = 148; public static final int SPARC_INS_FPADD16S = 149; public static final int SPARC_INS_FPADD32 = 150; public static final int SPARC_INS_FPADD32S = 151; public static final int SPARC_INS_FPADD64 = 152; public static final int SPARC_INS_FPMERGE = 153; public static final int SPARC_INS_FPSUB16 = 154; public static final int SPARC_INS_FPSUB16S = 155; public static final int SPARC_INS_FPSUB32 = 156; public static final int SPARC_INS_FPSUB32S = 157; public static final int SPARC_INS_FQTOD = 158; public static final int SPARC_INS_FQTOI = 159; public static final int SPARC_INS_FQTOS = 160; public static final int SPARC_INS_FQTOX = 161; public static final int SPARC_INS_FSLAS16 = 162; public static final int SPARC_INS_FSLAS32 = 163; public static final int SPARC_INS_FSLL16 = 164; public static final int SPARC_INS_FSLL32 = 165; public static final int SPARC_INS_FSMULD = 166; public static final int SPARC_INS_FSQRTD = 167; public static final int SPARC_INS_FSQRTQ = 168; public static final int SPARC_INS_FSQRTS = 169; public static final int SPARC_INS_FSRA16 = 170; public static final int SPARC_INS_FSRA32 = 171; public static final int SPARC_INS_FSRC1 = 172; public static final int SPARC_INS_FSRC1S = 173; public static final int SPARC_INS_FSRC2 = 174; public static final int SPARC_INS_FSRC2S = 175; public static final int SPARC_INS_FSRL16 = 176; public static final int SPARC_INS_FSRL32 = 177; public static final int SPARC_INS_FSTOD = 178; public static final int SPARC_INS_FSTOI = 179; public static final int SPARC_INS_FSTOQ = 180; public static final int SPARC_INS_FSTOX = 181; public static final int SPARC_INS_FSUBD = 182; public static final int SPARC_INS_FSUBQ = 183; public static final int SPARC_INS_FSUBS = 184; public static final int SPARC_INS_FXNOR = 185; public static final int SPARC_INS_FXNORS = 186; public static final int SPARC_INS_FXOR = 187; public static final int SPARC_INS_FXORS = 188; public static final int SPARC_INS_FXTOD = 189; public static final int SPARC_INS_FXTOQ = 190; public static final int SPARC_INS_FXTOS = 191; public static final int SPARC_INS_FZERO = 192; public static final int SPARC_INS_FZEROS = 193; public static final int SPARC_INS_JMPL = 194; public static final int SPARC_INS_LDD = 195; public static final int SPARC_INS_LD = 196; public static final int SPARC_INS_LDQ = 197; public static final int SPARC_INS_LDSB = 198; public static final int SPARC_INS_LDSH = 199; public static final int SPARC_INS_LDSW = 200; public static final int SPARC_INS_LDUB = 201; public static final int SPARC_INS_LDUH = 202; public static final int SPARC_INS_LDX = 203; public static final int SPARC_INS_LZCNT = 204; public static final int SPARC_INS_MEMBAR = 205; public static final int SPARC_INS_MOVDTOX = 206; public static final int SPARC_INS_MOV = 207; public static final int SPARC_INS_MOVRGEZ = 208; public static final int SPARC_INS_MOVRGZ = 209; public static final int SPARC_INS_MOVRLEZ = 210; public static final int SPARC_INS_MOVRLZ = 211; public static final int SPARC_INS_MOVRNZ = 212; public static final int SPARC_INS_MOVRZ = 213; public static final int SPARC_INS_MOVSTOSW = 214; public static final int SPARC_INS_MOVSTOUW = 215; public static final int SPARC_INS_MULX = 216; public static final int SPARC_INS_NOP = 217; public static final int SPARC_INS_ORCC = 218; public static final int SPARC_INS_ORNCC = 219; public static final int SPARC_INS_ORN = 220; public static final int SPARC_INS_OR = 221; public static final int SPARC_INS_PDIST = 222; public static final int SPARC_INS_PDISTN = 223; public static final int SPARC_INS_POPC = 224; public static final int SPARC_INS_RD = 225; public static final int SPARC_INS_RESTORE = 226; public static final int SPARC_INS_RETT = 227; public static final int SPARC_INS_SAVE = 228; public static final int SPARC_INS_SDIVCC = 229; public static final int SPARC_INS_SDIVX = 230; public static final int SPARC_INS_SDIV = 231; public static final int SPARC_INS_SETHI = 232; public static final int SPARC_INS_SHUTDOWN = 233; public static final int SPARC_INS_SIAM = 234; public static final int SPARC_INS_SLLX = 235; public static final int SPARC_INS_SLL = 236; public static final int SPARC_INS_SMULCC = 237; public static final int SPARC_INS_SMUL = 238; public static final int SPARC_INS_SRAX = 239; public static final int SPARC_INS_SRA = 240; public static final int SPARC_INS_SRLX = 241; public static final int SPARC_INS_SRL = 242; public static final int SPARC_INS_STBAR = 243; public static final int SPARC_INS_STB = 244; public static final int SPARC_INS_STD = 245; public static final int SPARC_INS_ST = 246; public static final int SPARC_INS_STH = 247; public static final int SPARC_INS_STQ = 248; public static final int SPARC_INS_STX = 249; public static final int SPARC_INS_SUBCC = 250; public static final int SPARC_INS_SUBX = 251; public static final int SPARC_INS_SUBXCC = 252; public static final int SPARC_INS_SUB = 253; public static final int SPARC_INS_SWAP = 254; public static final int SPARC_INS_TADDCCTV = 255; public static final int SPARC_INS_TADDCC = 256; public static final int SPARC_INS_T = 257; public static final int SPARC_INS_TSUBCCTV = 258; public static final int SPARC_INS_TSUBCC = 259; public static final int SPARC_INS_UDIVCC = 260; public static final int SPARC_INS_UDIVX = 261; public static final int SPARC_INS_UDIV = 262; public static final int SPARC_INS_UMULCC = 263; public static final int SPARC_INS_UMULXHI = 264; public static final int SPARC_INS_UMUL = 265; public static final int SPARC_INS_UNIMP = 266; public static final int SPARC_INS_FCMPED = 267; public static final int SPARC_INS_FCMPEQ = 268; public static final int SPARC_INS_FCMPES = 269; public static final int SPARC_INS_WR = 270; public static final int SPARC_INS_XMULX = 271; public static final int SPARC_INS_XMULXHI = 272; public static final int SPARC_INS_XNORCC = 273; public static final int SPARC_INS_XNOR = 274; public static final int SPARC_INS_XORCC = 275; public static final int SPARC_INS_XOR = 276; public static final int SPARC_INS_RET = 277; public static final int SPARC_INS_RETL = 278; public static final int SPARC_INS_ENDING = 279; public static final int SPARC_GRP_INVALID = 0; public static final int SPARC_GRP_JUMP = 1; public static final int SPARC_GRP_HARDQUAD = 128; public static final int SPARC_GRP_V9 = 129; public static final int SPARC_GRP_VIS = 130; public static final int SPARC_GRP_VIS2 = 131; public static final int SPARC_GRP_VIS3 = 132; public static final int SPARC_GRP_32BIT = 133; public static final int SPARC_GRP_64BIT = 134; public static final int SPARC_GRP_ENDING = 135; }capstone-sys-0.11.0/capstone/bindings/java/capstone/Systemz.java010066400017500001750000000035311363402546700231470ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.Sysz_const.*; public class Systemz { public static class MemType extends Structure { public byte base; public byte index; public long length; public long disp; @Override public List getFieldOrder() { return Arrays.asList("base", "index", "length", "disp"); } } public static class OpValue extends Union { public int reg; public long imm; public MemType mem; } public static class Operand extends Structure { public int type; public OpValue value; public void read() { readField("type"); if (type == SYSZ_OP_MEM) value.setType(MemType.class); if (type == SYSZ_OP_IMM) value.setType(Long.TYPE); if (type == SYSZ_OP_REG || type == SYSZ_OP_ACREG) value.setType(Integer.TYPE); if (type == SYSZ_OP_INVALID) return; readField("value"); } @Override public List getFieldOrder() { return Arrays.asList("type", "value"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public int cc; public byte op_count; public Operand [] op; public UnionOpInfo() { op = new Operand[6]; } public void read() { readField("cc"); readField("op_count"); op = new Operand[op_count]; if (op_count != 0) readField("op"); } @Override public List getFieldOrder() { return Arrays.asList("cc", "op_count", "op"); } } public static class OpInfo extends Capstone.OpInfo { public int cc; public Operand [] op; public OpInfo(UnionOpInfo op_info) { cc = op_info.cc; op = op_info.op; } } } capstone-sys-0.11.0/capstone/bindings/java/capstone/Sysz_const.java010066400017500001750000001032731363402546700236530ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class Sysz_const { public static final int SYSZ_CC_INVALID = 0; public static final int SYSZ_CC_O = 1; public static final int SYSZ_CC_H = 2; public static final int SYSZ_CC_NLE = 3; public static final int SYSZ_CC_L = 4; public static final int SYSZ_CC_NHE = 5; public static final int SYSZ_CC_LH = 6; public static final int SYSZ_CC_NE = 7; public static final int SYSZ_CC_E = 8; public static final int SYSZ_CC_NLH = 9; public static final int SYSZ_CC_HE = 10; public static final int SYSZ_CC_NL = 11; public static final int SYSZ_CC_LE = 12; public static final int SYSZ_CC_NH = 13; public static final int SYSZ_CC_NO = 14; public static final int SYSZ_OP_INVALID = 0; public static final int SYSZ_OP_REG = 1; public static final int SYSZ_OP_IMM = 2; public static final int SYSZ_OP_MEM = 3; public static final int SYSZ_OP_ACREG = 64; public static final int SYSZ_REG_INVALID = 0; public static final int SYSZ_REG_0 = 1; public static final int SYSZ_REG_1 = 2; public static final int SYSZ_REG_2 = 3; public static final int SYSZ_REG_3 = 4; public static final int SYSZ_REG_4 = 5; public static final int SYSZ_REG_5 = 6; public static final int SYSZ_REG_6 = 7; public static final int SYSZ_REG_7 = 8; public static final int SYSZ_REG_8 = 9; public static final int SYSZ_REG_9 = 10; public static final int SYSZ_REG_10 = 11; public static final int SYSZ_REG_11 = 12; public static final int SYSZ_REG_12 = 13; public static final int SYSZ_REG_13 = 14; public static final int SYSZ_REG_14 = 15; public static final int SYSZ_REG_15 = 16; public static final int SYSZ_REG_CC = 17; public static final int SYSZ_REG_F0 = 18; public static final int SYSZ_REG_F1 = 19; public static final int SYSZ_REG_F2 = 20; public static final int SYSZ_REG_F3 = 21; public static final int SYSZ_REG_F4 = 22; public static final int SYSZ_REG_F5 = 23; public static final int SYSZ_REG_F6 = 24; public static final int SYSZ_REG_F7 = 25; public static final int SYSZ_REG_F8 = 26; public static final int SYSZ_REG_F9 = 27; public static final int SYSZ_REG_F10 = 28; public static final int SYSZ_REG_F11 = 29; public static final int SYSZ_REG_F12 = 30; public static final int SYSZ_REG_F13 = 31; public static final int SYSZ_REG_F14 = 32; public static final int SYSZ_REG_F15 = 33; public static final int SYSZ_REG_R0L = 34; public static final int SYSZ_REG_ENDING = 35; public static final int SYSZ_INS_INVALID = 0; public static final int SYSZ_INS_A = 1; public static final int SYSZ_INS_ADB = 2; public static final int SYSZ_INS_ADBR = 3; public static final int SYSZ_INS_AEB = 4; public static final int SYSZ_INS_AEBR = 5; public static final int SYSZ_INS_AFI = 6; public static final int SYSZ_INS_AG = 7; public static final int SYSZ_INS_AGF = 8; public static final int SYSZ_INS_AGFI = 9; public static final int SYSZ_INS_AGFR = 10; public static final int SYSZ_INS_AGHI = 11; public static final int SYSZ_INS_AGHIK = 12; public static final int SYSZ_INS_AGR = 13; public static final int SYSZ_INS_AGRK = 14; public static final int SYSZ_INS_AGSI = 15; public static final int SYSZ_INS_AH = 16; public static final int SYSZ_INS_AHI = 17; public static final int SYSZ_INS_AHIK = 18; public static final int SYSZ_INS_AHY = 19; public static final int SYSZ_INS_AIH = 20; public static final int SYSZ_INS_AL = 21; public static final int SYSZ_INS_ALC = 22; public static final int SYSZ_INS_ALCG = 23; public static final int SYSZ_INS_ALCGR = 24; public static final int SYSZ_INS_ALCR = 25; public static final int SYSZ_INS_ALFI = 26; public static final int SYSZ_INS_ALG = 27; public static final int SYSZ_INS_ALGF = 28; public static final int SYSZ_INS_ALGFI = 29; public static final int SYSZ_INS_ALGFR = 30; public static final int SYSZ_INS_ALGHSIK = 31; public static final int SYSZ_INS_ALGR = 32; public static final int SYSZ_INS_ALGRK = 33; public static final int SYSZ_INS_ALHSIK = 34; public static final int SYSZ_INS_ALR = 35; public static final int SYSZ_INS_ALRK = 36; public static final int SYSZ_INS_ALY = 37; public static final int SYSZ_INS_AR = 38; public static final int SYSZ_INS_ARK = 39; public static final int SYSZ_INS_ASI = 40; public static final int SYSZ_INS_AXBR = 41; public static final int SYSZ_INS_AY = 42; public static final int SYSZ_INS_BCR = 43; public static final int SYSZ_INS_BRC = 44; public static final int SYSZ_INS_BRCL = 45; public static final int SYSZ_INS_CGIJ = 46; public static final int SYSZ_INS_CGRJ = 47; public static final int SYSZ_INS_CIJ = 48; public static final int SYSZ_INS_CLGIJ = 49; public static final int SYSZ_INS_CLGRJ = 50; public static final int SYSZ_INS_CLIJ = 51; public static final int SYSZ_INS_CLRJ = 52; public static final int SYSZ_INS_CRJ = 53; public static final int SYSZ_INS_BER = 54; public static final int SYSZ_INS_JE = 55; public static final int SYSZ_INS_JGE = 56; public static final int SYSZ_INS_LOCE = 57; public static final int SYSZ_INS_LOCGE = 58; public static final int SYSZ_INS_LOCGRE = 59; public static final int SYSZ_INS_LOCRE = 60; public static final int SYSZ_INS_STOCE = 61; public static final int SYSZ_INS_STOCGE = 62; public static final int SYSZ_INS_BHR = 63; public static final int SYSZ_INS_BHER = 64; public static final int SYSZ_INS_JHE = 65; public static final int SYSZ_INS_JGHE = 66; public static final int SYSZ_INS_LOCHE = 67; public static final int SYSZ_INS_LOCGHE = 68; public static final int SYSZ_INS_LOCGRHE = 69; public static final int SYSZ_INS_LOCRHE = 70; public static final int SYSZ_INS_STOCHE = 71; public static final int SYSZ_INS_STOCGHE = 72; public static final int SYSZ_INS_JH = 73; public static final int SYSZ_INS_JGH = 74; public static final int SYSZ_INS_LOCH = 75; public static final int SYSZ_INS_LOCGH = 76; public static final int SYSZ_INS_LOCGRH = 77; public static final int SYSZ_INS_LOCRH = 78; public static final int SYSZ_INS_STOCH = 79; public static final int SYSZ_INS_STOCGH = 80; public static final int SYSZ_INS_CGIJNLH = 81; public static final int SYSZ_INS_CGRJNLH = 82; public static final int SYSZ_INS_CIJNLH = 83; public static final int SYSZ_INS_CLGIJNLH = 84; public static final int SYSZ_INS_CLGRJNLH = 85; public static final int SYSZ_INS_CLIJNLH = 86; public static final int SYSZ_INS_CLRJNLH = 87; public static final int SYSZ_INS_CRJNLH = 88; public static final int SYSZ_INS_CGIJE = 89; public static final int SYSZ_INS_CGRJE = 90; public static final int SYSZ_INS_CIJE = 91; public static final int SYSZ_INS_CLGIJE = 92; public static final int SYSZ_INS_CLGRJE = 93; public static final int SYSZ_INS_CLIJE = 94; public static final int SYSZ_INS_CLRJE = 95; public static final int SYSZ_INS_CRJE = 96; public static final int SYSZ_INS_CGIJNLE = 97; public static final int SYSZ_INS_CGRJNLE = 98; public static final int SYSZ_INS_CIJNLE = 99; public static final int SYSZ_INS_CLGIJNLE = 100; public static final int SYSZ_INS_CLGRJNLE = 101; public static final int SYSZ_INS_CLIJNLE = 102; public static final int SYSZ_INS_CLRJNLE = 103; public static final int SYSZ_INS_CRJNLE = 104; public static final int SYSZ_INS_CGIJH = 105; public static final int SYSZ_INS_CGRJH = 106; public static final int SYSZ_INS_CIJH = 107; public static final int SYSZ_INS_CLGIJH = 108; public static final int SYSZ_INS_CLGRJH = 109; public static final int SYSZ_INS_CLIJH = 110; public static final int SYSZ_INS_CLRJH = 111; public static final int SYSZ_INS_CRJH = 112; public static final int SYSZ_INS_CGIJNL = 113; public static final int SYSZ_INS_CGRJNL = 114; public static final int SYSZ_INS_CIJNL = 115; public static final int SYSZ_INS_CLGIJNL = 116; public static final int SYSZ_INS_CLGRJNL = 117; public static final int SYSZ_INS_CLIJNL = 118; public static final int SYSZ_INS_CLRJNL = 119; public static final int SYSZ_INS_CRJNL = 120; public static final int SYSZ_INS_CGIJHE = 121; public static final int SYSZ_INS_CGRJHE = 122; public static final int SYSZ_INS_CIJHE = 123; public static final int SYSZ_INS_CLGIJHE = 124; public static final int SYSZ_INS_CLGRJHE = 125; public static final int SYSZ_INS_CLIJHE = 126; public static final int SYSZ_INS_CLRJHE = 127; public static final int SYSZ_INS_CRJHE = 128; public static final int SYSZ_INS_CGIJNHE = 129; public static final int SYSZ_INS_CGRJNHE = 130; public static final int SYSZ_INS_CIJNHE = 131; public static final int SYSZ_INS_CLGIJNHE = 132; public static final int SYSZ_INS_CLGRJNHE = 133; public static final int SYSZ_INS_CLIJNHE = 134; public static final int SYSZ_INS_CLRJNHE = 135; public static final int SYSZ_INS_CRJNHE = 136; public static final int SYSZ_INS_CGIJL = 137; public static final int SYSZ_INS_CGRJL = 138; public static final int SYSZ_INS_CIJL = 139; public static final int SYSZ_INS_CLGIJL = 140; public static final int SYSZ_INS_CLGRJL = 141; public static final int SYSZ_INS_CLIJL = 142; public static final int SYSZ_INS_CLRJL = 143; public static final int SYSZ_INS_CRJL = 144; public static final int SYSZ_INS_CGIJNH = 145; public static final int SYSZ_INS_CGRJNH = 146; public static final int SYSZ_INS_CIJNH = 147; public static final int SYSZ_INS_CLGIJNH = 148; public static final int SYSZ_INS_CLGRJNH = 149; public static final int SYSZ_INS_CLIJNH = 150; public static final int SYSZ_INS_CLRJNH = 151; public static final int SYSZ_INS_CRJNH = 152; public static final int SYSZ_INS_CGIJLE = 153; public static final int SYSZ_INS_CGRJLE = 154; public static final int SYSZ_INS_CIJLE = 155; public static final int SYSZ_INS_CLGIJLE = 156; public static final int SYSZ_INS_CLGRJLE = 157; public static final int SYSZ_INS_CLIJLE = 158; public static final int SYSZ_INS_CLRJLE = 159; public static final int SYSZ_INS_CRJLE = 160; public static final int SYSZ_INS_CGIJNE = 161; public static final int SYSZ_INS_CGRJNE = 162; public static final int SYSZ_INS_CIJNE = 163; public static final int SYSZ_INS_CLGIJNE = 164; public static final int SYSZ_INS_CLGRJNE = 165; public static final int SYSZ_INS_CLIJNE = 166; public static final int SYSZ_INS_CLRJNE = 167; public static final int SYSZ_INS_CRJNE = 168; public static final int SYSZ_INS_CGIJLH = 169; public static final int SYSZ_INS_CGRJLH = 170; public static final int SYSZ_INS_CIJLH = 171; public static final int SYSZ_INS_CLGIJLH = 172; public static final int SYSZ_INS_CLGRJLH = 173; public static final int SYSZ_INS_CLIJLH = 174; public static final int SYSZ_INS_CLRJLH = 175; public static final int SYSZ_INS_CRJLH = 176; public static final int SYSZ_INS_BLR = 177; public static final int SYSZ_INS_BLER = 178; public static final int SYSZ_INS_JLE = 179; public static final int SYSZ_INS_JGLE = 180; public static final int SYSZ_INS_LOCLE = 181; public static final int SYSZ_INS_LOCGLE = 182; public static final int SYSZ_INS_LOCGRLE = 183; public static final int SYSZ_INS_LOCRLE = 184; public static final int SYSZ_INS_STOCLE = 185; public static final int SYSZ_INS_STOCGLE = 186; public static final int SYSZ_INS_BLHR = 187; public static final int SYSZ_INS_JLH = 188; public static final int SYSZ_INS_JGLH = 189; public static final int SYSZ_INS_LOCLH = 190; public static final int SYSZ_INS_LOCGLH = 191; public static final int SYSZ_INS_LOCGRLH = 192; public static final int SYSZ_INS_LOCRLH = 193; public static final int SYSZ_INS_STOCLH = 194; public static final int SYSZ_INS_STOCGLH = 195; public static final int SYSZ_INS_JL = 196; public static final int SYSZ_INS_JGL = 197; public static final int SYSZ_INS_LOCL = 198; public static final int SYSZ_INS_LOCGL = 199; public static final int SYSZ_INS_LOCGRL = 200; public static final int SYSZ_INS_LOCRL = 201; public static final int SYSZ_INS_LOC = 202; public static final int SYSZ_INS_LOCG = 203; public static final int SYSZ_INS_LOCGR = 204; public static final int SYSZ_INS_LOCR = 205; public static final int SYSZ_INS_STOCL = 206; public static final int SYSZ_INS_STOCGL = 207; public static final int SYSZ_INS_BNER = 208; public static final int SYSZ_INS_JNE = 209; public static final int SYSZ_INS_JGNE = 210; public static final int SYSZ_INS_LOCNE = 211; public static final int SYSZ_INS_LOCGNE = 212; public static final int SYSZ_INS_LOCGRNE = 213; public static final int SYSZ_INS_LOCRNE = 214; public static final int SYSZ_INS_STOCNE = 215; public static final int SYSZ_INS_STOCGNE = 216; public static final int SYSZ_INS_BNHR = 217; public static final int SYSZ_INS_BNHER = 218; public static final int SYSZ_INS_JNHE = 219; public static final int SYSZ_INS_JGNHE = 220; public static final int SYSZ_INS_LOCNHE = 221; public static final int SYSZ_INS_LOCGNHE = 222; public static final int SYSZ_INS_LOCGRNHE = 223; public static final int SYSZ_INS_LOCRNHE = 224; public static final int SYSZ_INS_STOCNHE = 225; public static final int SYSZ_INS_STOCGNHE = 226; public static final int SYSZ_INS_JNH = 227; public static final int SYSZ_INS_JGNH = 228; public static final int SYSZ_INS_LOCNH = 229; public static final int SYSZ_INS_LOCGNH = 230; public static final int SYSZ_INS_LOCGRNH = 231; public static final int SYSZ_INS_LOCRNH = 232; public static final int SYSZ_INS_STOCNH = 233; public static final int SYSZ_INS_STOCGNH = 234; public static final int SYSZ_INS_BNLR = 235; public static final int SYSZ_INS_BNLER = 236; public static final int SYSZ_INS_JNLE = 237; public static final int SYSZ_INS_JGNLE = 238; public static final int SYSZ_INS_LOCNLE = 239; public static final int SYSZ_INS_LOCGNLE = 240; public static final int SYSZ_INS_LOCGRNLE = 241; public static final int SYSZ_INS_LOCRNLE = 242; public static final int SYSZ_INS_STOCNLE = 243; public static final int SYSZ_INS_STOCGNLE = 244; public static final int SYSZ_INS_BNLHR = 245; public static final int SYSZ_INS_JNLH = 246; public static final int SYSZ_INS_JGNLH = 247; public static final int SYSZ_INS_LOCNLH = 248; public static final int SYSZ_INS_LOCGNLH = 249; public static final int SYSZ_INS_LOCGRNLH = 250; public static final int SYSZ_INS_LOCRNLH = 251; public static final int SYSZ_INS_STOCNLH = 252; public static final int SYSZ_INS_STOCGNLH = 253; public static final int SYSZ_INS_JNL = 254; public static final int SYSZ_INS_JGNL = 255; public static final int SYSZ_INS_LOCNL = 256; public static final int SYSZ_INS_LOCGNL = 257; public static final int SYSZ_INS_LOCGRNL = 258; public static final int SYSZ_INS_LOCRNL = 259; public static final int SYSZ_INS_STOCNL = 260; public static final int SYSZ_INS_STOCGNL = 261; public static final int SYSZ_INS_BNOR = 262; public static final int SYSZ_INS_JNO = 263; public static final int SYSZ_INS_JGNO = 264; public static final int SYSZ_INS_LOCNO = 265; public static final int SYSZ_INS_LOCGNO = 266; public static final int SYSZ_INS_LOCGRNO = 267; public static final int SYSZ_INS_LOCRNO = 268; public static final int SYSZ_INS_STOCNO = 269; public static final int SYSZ_INS_STOCGNO = 270; public static final int SYSZ_INS_BOR = 271; public static final int SYSZ_INS_JO = 272; public static final int SYSZ_INS_JGO = 273; public static final int SYSZ_INS_LOCO = 274; public static final int SYSZ_INS_LOCGO = 275; public static final int SYSZ_INS_LOCGRO = 276; public static final int SYSZ_INS_LOCRO = 277; public static final int SYSZ_INS_STOCO = 278; public static final int SYSZ_INS_STOCGO = 279; public static final int SYSZ_INS_STOC = 280; public static final int SYSZ_INS_STOCG = 281; public static final int SYSZ_INS_BASR = 282; public static final int SYSZ_INS_BR = 283; public static final int SYSZ_INS_BRAS = 284; public static final int SYSZ_INS_BRASL = 285; public static final int SYSZ_INS_J = 286; public static final int SYSZ_INS_JG = 287; public static final int SYSZ_INS_BRCT = 288; public static final int SYSZ_INS_BRCTG = 289; public static final int SYSZ_INS_C = 290; public static final int SYSZ_INS_CDB = 291; public static final int SYSZ_INS_CDBR = 292; public static final int SYSZ_INS_CDFBR = 293; public static final int SYSZ_INS_CDGBR = 294; public static final int SYSZ_INS_CDLFBR = 295; public static final int SYSZ_INS_CDLGBR = 296; public static final int SYSZ_INS_CEB = 297; public static final int SYSZ_INS_CEBR = 298; public static final int SYSZ_INS_CEFBR = 299; public static final int SYSZ_INS_CEGBR = 300; public static final int SYSZ_INS_CELFBR = 301; public static final int SYSZ_INS_CELGBR = 302; public static final int SYSZ_INS_CFDBR = 303; public static final int SYSZ_INS_CFEBR = 304; public static final int SYSZ_INS_CFI = 305; public static final int SYSZ_INS_CFXBR = 306; public static final int SYSZ_INS_CG = 307; public static final int SYSZ_INS_CGDBR = 308; public static final int SYSZ_INS_CGEBR = 309; public static final int SYSZ_INS_CGF = 310; public static final int SYSZ_INS_CGFI = 311; public static final int SYSZ_INS_CGFR = 312; public static final int SYSZ_INS_CGFRL = 313; public static final int SYSZ_INS_CGH = 314; public static final int SYSZ_INS_CGHI = 315; public static final int SYSZ_INS_CGHRL = 316; public static final int SYSZ_INS_CGHSI = 317; public static final int SYSZ_INS_CGR = 318; public static final int SYSZ_INS_CGRL = 319; public static final int SYSZ_INS_CGXBR = 320; public static final int SYSZ_INS_CH = 321; public static final int SYSZ_INS_CHF = 322; public static final int SYSZ_INS_CHHSI = 323; public static final int SYSZ_INS_CHI = 324; public static final int SYSZ_INS_CHRL = 325; public static final int SYSZ_INS_CHSI = 326; public static final int SYSZ_INS_CHY = 327; public static final int SYSZ_INS_CIH = 328; public static final int SYSZ_INS_CL = 329; public static final int SYSZ_INS_CLC = 330; public static final int SYSZ_INS_CLFDBR = 331; public static final int SYSZ_INS_CLFEBR = 332; public static final int SYSZ_INS_CLFHSI = 333; public static final int SYSZ_INS_CLFI = 334; public static final int SYSZ_INS_CLFXBR = 335; public static final int SYSZ_INS_CLG = 336; public static final int SYSZ_INS_CLGDBR = 337; public static final int SYSZ_INS_CLGEBR = 338; public static final int SYSZ_INS_CLGF = 339; public static final int SYSZ_INS_CLGFI = 340; public static final int SYSZ_INS_CLGFR = 341; public static final int SYSZ_INS_CLGFRL = 342; public static final int SYSZ_INS_CLGHRL = 343; public static final int SYSZ_INS_CLGHSI = 344; public static final int SYSZ_INS_CLGR = 345; public static final int SYSZ_INS_CLGRL = 346; public static final int SYSZ_INS_CLGXBR = 347; public static final int SYSZ_INS_CLHF = 348; public static final int SYSZ_INS_CLHHSI = 349; public static final int SYSZ_INS_CLHRL = 350; public static final int SYSZ_INS_CLI = 351; public static final int SYSZ_INS_CLIH = 352; public static final int SYSZ_INS_CLIY = 353; public static final int SYSZ_INS_CLR = 354; public static final int SYSZ_INS_CLRL = 355; public static final int SYSZ_INS_CLST = 356; public static final int SYSZ_INS_CLY = 357; public static final int SYSZ_INS_CPSDR = 358; public static final int SYSZ_INS_CR = 359; public static final int SYSZ_INS_CRL = 360; public static final int SYSZ_INS_CS = 361; public static final int SYSZ_INS_CSG = 362; public static final int SYSZ_INS_CSY = 363; public static final int SYSZ_INS_CXBR = 364; public static final int SYSZ_INS_CXFBR = 365; public static final int SYSZ_INS_CXGBR = 366; public static final int SYSZ_INS_CXLFBR = 367; public static final int SYSZ_INS_CXLGBR = 368; public static final int SYSZ_INS_CY = 369; public static final int SYSZ_INS_DDB = 370; public static final int SYSZ_INS_DDBR = 371; public static final int SYSZ_INS_DEB = 372; public static final int SYSZ_INS_DEBR = 373; public static final int SYSZ_INS_DL = 374; public static final int SYSZ_INS_DLG = 375; public static final int SYSZ_INS_DLGR = 376; public static final int SYSZ_INS_DLR = 377; public static final int SYSZ_INS_DSG = 378; public static final int SYSZ_INS_DSGF = 379; public static final int SYSZ_INS_DSGFR = 380; public static final int SYSZ_INS_DSGR = 381; public static final int SYSZ_INS_DXBR = 382; public static final int SYSZ_INS_EAR = 383; public static final int SYSZ_INS_FIDBR = 384; public static final int SYSZ_INS_FIDBRA = 385; public static final int SYSZ_INS_FIEBR = 386; public static final int SYSZ_INS_FIEBRA = 387; public static final int SYSZ_INS_FIXBR = 388; public static final int SYSZ_INS_FIXBRA = 389; public static final int SYSZ_INS_FLOGR = 390; public static final int SYSZ_INS_IC = 391; public static final int SYSZ_INS_ICY = 392; public static final int SYSZ_INS_IIHF = 393; public static final int SYSZ_INS_IIHH = 394; public static final int SYSZ_INS_IIHL = 395; public static final int SYSZ_INS_IILF = 396; public static final int SYSZ_INS_IILH = 397; public static final int SYSZ_INS_IILL = 398; public static final int SYSZ_INS_IPM = 399; public static final int SYSZ_INS_L = 400; public static final int SYSZ_INS_LA = 401; public static final int SYSZ_INS_LAA = 402; public static final int SYSZ_INS_LAAG = 403; public static final int SYSZ_INS_LAAL = 404; public static final int SYSZ_INS_LAALG = 405; public static final int SYSZ_INS_LAN = 406; public static final int SYSZ_INS_LANG = 407; public static final int SYSZ_INS_LAO = 408; public static final int SYSZ_INS_LAOG = 409; public static final int SYSZ_INS_LARL = 410; public static final int SYSZ_INS_LAX = 411; public static final int SYSZ_INS_LAXG = 412; public static final int SYSZ_INS_LAY = 413; public static final int SYSZ_INS_LB = 414; public static final int SYSZ_INS_LBH = 415; public static final int SYSZ_INS_LBR = 416; public static final int SYSZ_INS_LCDBR = 417; public static final int SYSZ_INS_LCEBR = 418; public static final int SYSZ_INS_LCGFR = 419; public static final int SYSZ_INS_LCGR = 420; public static final int SYSZ_INS_LCR = 421; public static final int SYSZ_INS_LCXBR = 422; public static final int SYSZ_INS_LD = 423; public static final int SYSZ_INS_LDEB = 424; public static final int SYSZ_INS_LDEBR = 425; public static final int SYSZ_INS_LDGR = 426; public static final int SYSZ_INS_LDR = 427; public static final int SYSZ_INS_LDXBR = 428; public static final int SYSZ_INS_LDXBRA = 429; public static final int SYSZ_INS_LDY = 430; public static final int SYSZ_INS_LE = 431; public static final int SYSZ_INS_LEDBR = 432; public static final int SYSZ_INS_LEDBRA = 433; public static final int SYSZ_INS_LER = 434; public static final int SYSZ_INS_LEXBR = 435; public static final int SYSZ_INS_LEXBRA = 436; public static final int SYSZ_INS_LEY = 437; public static final int SYSZ_INS_LFH = 438; public static final int SYSZ_INS_LG = 439; public static final int SYSZ_INS_LGB = 440; public static final int SYSZ_INS_LGBR = 441; public static final int SYSZ_INS_LGDR = 442; public static final int SYSZ_INS_LGF = 443; public static final int SYSZ_INS_LGFI = 444; public static final int SYSZ_INS_LGFR = 445; public static final int SYSZ_INS_LGFRL = 446; public static final int SYSZ_INS_LGH = 447; public static final int SYSZ_INS_LGHI = 448; public static final int SYSZ_INS_LGHR = 449; public static final int SYSZ_INS_LGHRL = 450; public static final int SYSZ_INS_LGR = 451; public static final int SYSZ_INS_LGRL = 452; public static final int SYSZ_INS_LH = 453; public static final int SYSZ_INS_LHH = 454; public static final int SYSZ_INS_LHI = 455; public static final int SYSZ_INS_LHR = 456; public static final int SYSZ_INS_LHRL = 457; public static final int SYSZ_INS_LHY = 458; public static final int SYSZ_INS_LLC = 459; public static final int SYSZ_INS_LLCH = 460; public static final int SYSZ_INS_LLCR = 461; public static final int SYSZ_INS_LLGC = 462; public static final int SYSZ_INS_LLGCR = 463; public static final int SYSZ_INS_LLGF = 464; public static final int SYSZ_INS_LLGFR = 465; public static final int SYSZ_INS_LLGFRL = 466; public static final int SYSZ_INS_LLGH = 467; public static final int SYSZ_INS_LLGHR = 468; public static final int SYSZ_INS_LLGHRL = 469; public static final int SYSZ_INS_LLH = 470; public static final int SYSZ_INS_LLHH = 471; public static final int SYSZ_INS_LLHR = 472; public static final int SYSZ_INS_LLHRL = 473; public static final int SYSZ_INS_LLIHF = 474; public static final int SYSZ_INS_LLIHH = 475; public static final int SYSZ_INS_LLIHL = 476; public static final int SYSZ_INS_LLILF = 477; public static final int SYSZ_INS_LLILH = 478; public static final int SYSZ_INS_LLILL = 479; public static final int SYSZ_INS_LMG = 480; public static final int SYSZ_INS_LNDBR = 481; public static final int SYSZ_INS_LNEBR = 482; public static final int SYSZ_INS_LNGFR = 483; public static final int SYSZ_INS_LNGR = 484; public static final int SYSZ_INS_LNR = 485; public static final int SYSZ_INS_LNXBR = 486; public static final int SYSZ_INS_LPDBR = 487; public static final int SYSZ_INS_LPEBR = 488; public static final int SYSZ_INS_LPGFR = 489; public static final int SYSZ_INS_LPGR = 490; public static final int SYSZ_INS_LPR = 491; public static final int SYSZ_INS_LPXBR = 492; public static final int SYSZ_INS_LR = 493; public static final int SYSZ_INS_LRL = 494; public static final int SYSZ_INS_LRV = 495; public static final int SYSZ_INS_LRVG = 496; public static final int SYSZ_INS_LRVGR = 497; public static final int SYSZ_INS_LRVR = 498; public static final int SYSZ_INS_LT = 499; public static final int SYSZ_INS_LTDBR = 500; public static final int SYSZ_INS_LTEBR = 501; public static final int SYSZ_INS_LTG = 502; public static final int SYSZ_INS_LTGF = 503; public static final int SYSZ_INS_LTGFR = 504; public static final int SYSZ_INS_LTGR = 505; public static final int SYSZ_INS_LTR = 506; public static final int SYSZ_INS_LTXBR = 507; public static final int SYSZ_INS_LXDB = 508; public static final int SYSZ_INS_LXDBR = 509; public static final int SYSZ_INS_LXEB = 510; public static final int SYSZ_INS_LXEBR = 511; public static final int SYSZ_INS_LXR = 512; public static final int SYSZ_INS_LY = 513; public static final int SYSZ_INS_LZDR = 514; public static final int SYSZ_INS_LZER = 515; public static final int SYSZ_INS_LZXR = 516; public static final int SYSZ_INS_MADB = 517; public static final int SYSZ_INS_MADBR = 518; public static final int SYSZ_INS_MAEB = 519; public static final int SYSZ_INS_MAEBR = 520; public static final int SYSZ_INS_MDB = 521; public static final int SYSZ_INS_MDBR = 522; public static final int SYSZ_INS_MDEB = 523; public static final int SYSZ_INS_MDEBR = 524; public static final int SYSZ_INS_MEEB = 525; public static final int SYSZ_INS_MEEBR = 526; public static final int SYSZ_INS_MGHI = 527; public static final int SYSZ_INS_MH = 528; public static final int SYSZ_INS_MHI = 529; public static final int SYSZ_INS_MHY = 530; public static final int SYSZ_INS_MLG = 531; public static final int SYSZ_INS_MLGR = 532; public static final int SYSZ_INS_MS = 533; public static final int SYSZ_INS_MSDB = 534; public static final int SYSZ_INS_MSDBR = 535; public static final int SYSZ_INS_MSEB = 536; public static final int SYSZ_INS_MSEBR = 537; public static final int SYSZ_INS_MSFI = 538; public static final int SYSZ_INS_MSG = 539; public static final int SYSZ_INS_MSGF = 540; public static final int SYSZ_INS_MSGFI = 541; public static final int SYSZ_INS_MSGFR = 542; public static final int SYSZ_INS_MSGR = 543; public static final int SYSZ_INS_MSR = 544; public static final int SYSZ_INS_MSY = 545; public static final int SYSZ_INS_MVC = 546; public static final int SYSZ_INS_MVGHI = 547; public static final int SYSZ_INS_MVHHI = 548; public static final int SYSZ_INS_MVHI = 549; public static final int SYSZ_INS_MVI = 550; public static final int SYSZ_INS_MVIY = 551; public static final int SYSZ_INS_MVST = 552; public static final int SYSZ_INS_MXBR = 553; public static final int SYSZ_INS_MXDB = 554; public static final int SYSZ_INS_MXDBR = 555; public static final int SYSZ_INS_N = 556; public static final int SYSZ_INS_NC = 557; public static final int SYSZ_INS_NG = 558; public static final int SYSZ_INS_NGR = 559; public static final int SYSZ_INS_NGRK = 560; public static final int SYSZ_INS_NI = 561; public static final int SYSZ_INS_NIHF = 562; public static final int SYSZ_INS_NIHH = 563; public static final int SYSZ_INS_NIHL = 564; public static final int SYSZ_INS_NILF = 565; public static final int SYSZ_INS_NILH = 566; public static final int SYSZ_INS_NILL = 567; public static final int SYSZ_INS_NIY = 568; public static final int SYSZ_INS_NR = 569; public static final int SYSZ_INS_NRK = 570; public static final int SYSZ_INS_NY = 571; public static final int SYSZ_INS_O = 572; public static final int SYSZ_INS_OC = 573; public static final int SYSZ_INS_OG = 574; public static final int SYSZ_INS_OGR = 575; public static final int SYSZ_INS_OGRK = 576; public static final int SYSZ_INS_OI = 577; public static final int SYSZ_INS_OIHF = 578; public static final int SYSZ_INS_OIHH = 579; public static final int SYSZ_INS_OIHL = 580; public static final int SYSZ_INS_OILF = 581; public static final int SYSZ_INS_OILH = 582; public static final int SYSZ_INS_OILL = 583; public static final int SYSZ_INS_OIY = 584; public static final int SYSZ_INS_OR = 585; public static final int SYSZ_INS_ORK = 586; public static final int SYSZ_INS_OY = 587; public static final int SYSZ_INS_PFD = 588; public static final int SYSZ_INS_PFDRL = 589; public static final int SYSZ_INS_RISBG = 590; public static final int SYSZ_INS_RISBHG = 591; public static final int SYSZ_INS_RISBLG = 592; public static final int SYSZ_INS_RLL = 593; public static final int SYSZ_INS_RLLG = 594; public static final int SYSZ_INS_RNSBG = 595; public static final int SYSZ_INS_ROSBG = 596; public static final int SYSZ_INS_RXSBG = 597; public static final int SYSZ_INS_S = 598; public static final int SYSZ_INS_SDB = 599; public static final int SYSZ_INS_SDBR = 600; public static final int SYSZ_INS_SEB = 601; public static final int SYSZ_INS_SEBR = 602; public static final int SYSZ_INS_SG = 603; public static final int SYSZ_INS_SGF = 604; public static final int SYSZ_INS_SGFR = 605; public static final int SYSZ_INS_SGR = 606; public static final int SYSZ_INS_SGRK = 607; public static final int SYSZ_INS_SH = 608; public static final int SYSZ_INS_SHY = 609; public static final int SYSZ_INS_SL = 610; public static final int SYSZ_INS_SLB = 611; public static final int SYSZ_INS_SLBG = 612; public static final int SYSZ_INS_SLBR = 613; public static final int SYSZ_INS_SLFI = 614; public static final int SYSZ_INS_SLG = 615; public static final int SYSZ_INS_SLBGR = 616; public static final int SYSZ_INS_SLGF = 617; public static final int SYSZ_INS_SLGFI = 618; public static final int SYSZ_INS_SLGFR = 619; public static final int SYSZ_INS_SLGR = 620; public static final int SYSZ_INS_SLGRK = 621; public static final int SYSZ_INS_SLL = 622; public static final int SYSZ_INS_SLLG = 623; public static final int SYSZ_INS_SLLK = 624; public static final int SYSZ_INS_SLR = 625; public static final int SYSZ_INS_SLRK = 626; public static final int SYSZ_INS_SLY = 627; public static final int SYSZ_INS_SQDB = 628; public static final int SYSZ_INS_SQDBR = 629; public static final int SYSZ_INS_SQEB = 630; public static final int SYSZ_INS_SQEBR = 631; public static final int SYSZ_INS_SQXBR = 632; public static final int SYSZ_INS_SR = 633; public static final int SYSZ_INS_SRA = 634; public static final int SYSZ_INS_SRAG = 635; public static final int SYSZ_INS_SRAK = 636; public static final int SYSZ_INS_SRK = 637; public static final int SYSZ_INS_SRL = 638; public static final int SYSZ_INS_SRLG = 639; public static final int SYSZ_INS_SRLK = 640; public static final int SYSZ_INS_SRST = 641; public static final int SYSZ_INS_ST = 642; public static final int SYSZ_INS_STC = 643; public static final int SYSZ_INS_STCH = 644; public static final int SYSZ_INS_STCY = 645; public static final int SYSZ_INS_STD = 646; public static final int SYSZ_INS_STDY = 647; public static final int SYSZ_INS_STE = 648; public static final int SYSZ_INS_STEY = 649; public static final int SYSZ_INS_STFH = 650; public static final int SYSZ_INS_STG = 651; public static final int SYSZ_INS_STGRL = 652; public static final int SYSZ_INS_STH = 653; public static final int SYSZ_INS_STHH = 654; public static final int SYSZ_INS_STHRL = 655; public static final int SYSZ_INS_STHY = 656; public static final int SYSZ_INS_STMG = 657; public static final int SYSZ_INS_STRL = 658; public static final int SYSZ_INS_STRV = 659; public static final int SYSZ_INS_STRVG = 660; public static final int SYSZ_INS_STY = 661; public static final int SYSZ_INS_SXBR = 662; public static final int SYSZ_INS_SY = 663; public static final int SYSZ_INS_TM = 664; public static final int SYSZ_INS_TMHH = 665; public static final int SYSZ_INS_TMHL = 666; public static final int SYSZ_INS_TMLH = 667; public static final int SYSZ_INS_TMLL = 668; public static final int SYSZ_INS_TMY = 669; public static final int SYSZ_INS_X = 670; public static final int SYSZ_INS_XC = 671; public static final int SYSZ_INS_XG = 672; public static final int SYSZ_INS_XGR = 673; public static final int SYSZ_INS_XGRK = 674; public static final int SYSZ_INS_XI = 675; public static final int SYSZ_INS_XIHF = 676; public static final int SYSZ_INS_XILF = 677; public static final int SYSZ_INS_XIY = 678; public static final int SYSZ_INS_XR = 679; public static final int SYSZ_INS_XRK = 680; public static final int SYSZ_INS_XY = 681; public static final int SYSZ_INS_ENDING = 682; public static final int SYSZ_GRP_INVALID = 0; public static final int SYSZ_GRP_JUMP = 1; public static final int SYSZ_GRP_DISTINCTOPS = 128; public static final int SYSZ_GRP_FPEXTENSION = 129; public static final int SYSZ_GRP_HIGHWORD = 130; public static final int SYSZ_GRP_INTERLOCKEDACCESS1 = 131; public static final int SYSZ_GRP_LOADSTOREONCOND = 132; public static final int SYSZ_GRP_ENDING = 133; }capstone-sys-0.11.0/capstone/bindings/java/capstone/TMS320C64x_const.java010066400017500001750000000331351363402546700242370ustar0000000000000000// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT package capstone; public class TMS320C64x_const { public static final int TMS320C64X_OP_INVALID = 0; public static final int TMS320C64X_OP_REG = 1; public static final int TMS320C64X_OP_IMM = 2; public static final int TMS320C64X_OP_MEM = 3; public static final int TMS320C64X_OP_REGPAIR = 64; public static final int TMS320C64X_MEM_DISP_INVALID = 0; public static final int TMS320C64X_MEM_DISP_CONSTANT = 1; public static final int TMS320C64X_MEM_DISP_REGISTER = 2; public static final int TMS320C64X_MEM_DIR_INVALID = 0; public static final int TMS320C64X_MEM_DIR_FW = 1; public static final int TMS320C64X_MEM_DIR_BW = 2; public static final int TMS320C64X_MEM_MOD_INVALID = 0; public static final int TMS320C64X_MEM_MOD_NO = 1; public static final int TMS320C64X_MEM_MOD_PRE = 2; public static final int TMS320C64X_MEM_MOD_POST = 3; public static final int TMS320C64X_REG_INVALID = 0; public static final int TMS320C64X_REG_AMR = 1; public static final int TMS320C64X_REG_CSR = 2; public static final int TMS320C64X_REG_DIER = 3; public static final int TMS320C64X_REG_DNUM = 4; public static final int TMS320C64X_REG_ECR = 5; public static final int TMS320C64X_REG_GFPGFR = 6; public static final int TMS320C64X_REG_GPLYA = 7; public static final int TMS320C64X_REG_GPLYB = 8; public static final int TMS320C64X_REG_ICR = 9; public static final int TMS320C64X_REG_IER = 10; public static final int TMS320C64X_REG_IERR = 11; public static final int TMS320C64X_REG_ILC = 12; public static final int TMS320C64X_REG_IRP = 13; public static final int TMS320C64X_REG_ISR = 14; public static final int TMS320C64X_REG_ISTP = 15; public static final int TMS320C64X_REG_ITSR = 16; public static final int TMS320C64X_REG_NRP = 17; public static final int TMS320C64X_REG_NTSR = 18; public static final int TMS320C64X_REG_REP = 19; public static final int TMS320C64X_REG_RILC = 20; public static final int TMS320C64X_REG_SSR = 21; public static final int TMS320C64X_REG_TSCH = 22; public static final int TMS320C64X_REG_TSCL = 23; public static final int TMS320C64X_REG_TSR = 24; public static final int TMS320C64X_REG_A0 = 25; public static final int TMS320C64X_REG_A1 = 26; public static final int TMS320C64X_REG_A2 = 27; public static final int TMS320C64X_REG_A3 = 28; public static final int TMS320C64X_REG_A4 = 29; public static final int TMS320C64X_REG_A5 = 30; public static final int TMS320C64X_REG_A6 = 31; public static final int TMS320C64X_REG_A7 = 32; public static final int TMS320C64X_REG_A8 = 33; public static final int TMS320C64X_REG_A9 = 34; public static final int TMS320C64X_REG_A10 = 35; public static final int TMS320C64X_REG_A11 = 36; public static final int TMS320C64X_REG_A12 = 37; public static final int TMS320C64X_REG_A13 = 38; public static final int TMS320C64X_REG_A14 = 39; public static final int TMS320C64X_REG_A15 = 40; public static final int TMS320C64X_REG_A16 = 41; public static final int TMS320C64X_REG_A17 = 42; public static final int TMS320C64X_REG_A18 = 43; public static final int TMS320C64X_REG_A19 = 44; public static final int TMS320C64X_REG_A20 = 45; public static final int TMS320C64X_REG_A21 = 46; public static final int TMS320C64X_REG_A22 = 47; public static final int TMS320C64X_REG_A23 = 48; public static final int TMS320C64X_REG_A24 = 49; public static final int TMS320C64X_REG_A25 = 50; public static final int TMS320C64X_REG_A26 = 51; public static final int TMS320C64X_REG_A27 = 52; public static final int TMS320C64X_REG_A28 = 53; public static final int TMS320C64X_REG_A29 = 54; public static final int TMS320C64X_REG_A30 = 55; public static final int TMS320C64X_REG_A31 = 56; public static final int TMS320C64X_REG_B0 = 57; public static final int TMS320C64X_REG_B1 = 58; public static final int TMS320C64X_REG_B2 = 59; public static final int TMS320C64X_REG_B3 = 60; public static final int TMS320C64X_REG_B4 = 61; public static final int TMS320C64X_REG_B5 = 62; public static final int TMS320C64X_REG_B6 = 63; public static final int TMS320C64X_REG_B7 = 64; public static final int TMS320C64X_REG_B8 = 65; public static final int TMS320C64X_REG_B9 = 66; public static final int TMS320C64X_REG_B10 = 67; public static final int TMS320C64X_REG_B11 = 68; public static final int TMS320C64X_REG_B12 = 69; public static final int TMS320C64X_REG_B13 = 70; public static final int TMS320C64X_REG_B14 = 71; public static final int TMS320C64X_REG_B15 = 72; public static final int TMS320C64X_REG_B16 = 73; public static final int TMS320C64X_REG_B17 = 74; public static final int TMS320C64X_REG_B18 = 75; public static final int TMS320C64X_REG_B19 = 76; public static final int TMS320C64X_REG_B20 = 77; public static final int TMS320C64X_REG_B21 = 78; public static final int TMS320C64X_REG_B22 = 79; public static final int TMS320C64X_REG_B23 = 80; public static final int TMS320C64X_REG_B24 = 81; public static final int TMS320C64X_REG_B25 = 82; public static final int TMS320C64X_REG_B26 = 83; public static final int TMS320C64X_REG_B27 = 84; public static final int TMS320C64X_REG_B28 = 85; public static final int TMS320C64X_REG_B29 = 86; public static final int TMS320C64X_REG_B30 = 87; public static final int TMS320C64X_REG_B31 = 88; public static final int TMS320C64X_REG_PCE1 = 89; public static final int TMS320C64X_REG_ENDING = 90; public static final int TMS320C64X_REG_EFR = TMS320C64X_REG_ECR; public static final int TMS320C64X_REG_IFR = TMS320C64X_REG_ISR; public static final int TMS320C64X_INS_INVALID = 0; public static final int TMS320C64X_INS_ABS = 1; public static final int TMS320C64X_INS_ABS2 = 2; public static final int TMS320C64X_INS_ADD = 3; public static final int TMS320C64X_INS_ADD2 = 4; public static final int TMS320C64X_INS_ADD4 = 5; public static final int TMS320C64X_INS_ADDAB = 6; public static final int TMS320C64X_INS_ADDAD = 7; public static final int TMS320C64X_INS_ADDAH = 8; public static final int TMS320C64X_INS_ADDAW = 9; public static final int TMS320C64X_INS_ADDK = 10; public static final int TMS320C64X_INS_ADDKPC = 11; public static final int TMS320C64X_INS_ADDU = 12; public static final int TMS320C64X_INS_AND = 13; public static final int TMS320C64X_INS_ANDN = 14; public static final int TMS320C64X_INS_AVG2 = 15; public static final int TMS320C64X_INS_AVGU4 = 16; public static final int TMS320C64X_INS_B = 17; public static final int TMS320C64X_INS_BDEC = 18; public static final int TMS320C64X_INS_BITC4 = 19; public static final int TMS320C64X_INS_BNOP = 20; public static final int TMS320C64X_INS_BPOS = 21; public static final int TMS320C64X_INS_CLR = 22; public static final int TMS320C64X_INS_CMPEQ = 23; public static final int TMS320C64X_INS_CMPEQ2 = 24; public static final int TMS320C64X_INS_CMPEQ4 = 25; public static final int TMS320C64X_INS_CMPGT = 26; public static final int TMS320C64X_INS_CMPGT2 = 27; public static final int TMS320C64X_INS_CMPGTU4 = 28; public static final int TMS320C64X_INS_CMPLT = 29; public static final int TMS320C64X_INS_CMPLTU = 30; public static final int TMS320C64X_INS_DEAL = 31; public static final int TMS320C64X_INS_DOTP2 = 32; public static final int TMS320C64X_INS_DOTPN2 = 33; public static final int TMS320C64X_INS_DOTPNRSU2 = 34; public static final int TMS320C64X_INS_DOTPRSU2 = 35; public static final int TMS320C64X_INS_DOTPSU4 = 36; public static final int TMS320C64X_INS_DOTPU4 = 37; public static final int TMS320C64X_INS_EXT = 38; public static final int TMS320C64X_INS_EXTU = 39; public static final int TMS320C64X_INS_GMPGTU = 40; public static final int TMS320C64X_INS_GMPY4 = 41; public static final int TMS320C64X_INS_LDB = 42; public static final int TMS320C64X_INS_LDBU = 43; public static final int TMS320C64X_INS_LDDW = 44; public static final int TMS320C64X_INS_LDH = 45; public static final int TMS320C64X_INS_LDHU = 46; public static final int TMS320C64X_INS_LDNDW = 47; public static final int TMS320C64X_INS_LDNW = 48; public static final int TMS320C64X_INS_LDW = 49; public static final int TMS320C64X_INS_LMBD = 50; public static final int TMS320C64X_INS_MAX2 = 51; public static final int TMS320C64X_INS_MAXU4 = 52; public static final int TMS320C64X_INS_MIN2 = 53; public static final int TMS320C64X_INS_MINU4 = 54; public static final int TMS320C64X_INS_MPY = 55; public static final int TMS320C64X_INS_MPY2 = 56; public static final int TMS320C64X_INS_MPYH = 57; public static final int TMS320C64X_INS_MPYHI = 58; public static final int TMS320C64X_INS_MPYHIR = 59; public static final int TMS320C64X_INS_MPYHL = 60; public static final int TMS320C64X_INS_MPYHLU = 61; public static final int TMS320C64X_INS_MPYHSLU = 62; public static final int TMS320C64X_INS_MPYHSU = 63; public static final int TMS320C64X_INS_MPYHU = 64; public static final int TMS320C64X_INS_MPYHULS = 65; public static final int TMS320C64X_INS_MPYHUS = 66; public static final int TMS320C64X_INS_MPYLH = 67; public static final int TMS320C64X_INS_MPYLHU = 68; public static final int TMS320C64X_INS_MPYLI = 69; public static final int TMS320C64X_INS_MPYLIR = 70; public static final int TMS320C64X_INS_MPYLSHU = 71; public static final int TMS320C64X_INS_MPYLUHS = 72; public static final int TMS320C64X_INS_MPYSU = 73; public static final int TMS320C64X_INS_MPYSU4 = 74; public static final int TMS320C64X_INS_MPYU = 75; public static final int TMS320C64X_INS_MPYU4 = 76; public static final int TMS320C64X_INS_MPYUS = 77; public static final int TMS320C64X_INS_MVC = 78; public static final int TMS320C64X_INS_MVD = 79; public static final int TMS320C64X_INS_MVK = 80; public static final int TMS320C64X_INS_MVKL = 81; public static final int TMS320C64X_INS_MVKLH = 82; public static final int TMS320C64X_INS_NOP = 83; public static final int TMS320C64X_INS_NORM = 84; public static final int TMS320C64X_INS_OR = 85; public static final int TMS320C64X_INS_PACK2 = 86; public static final int TMS320C64X_INS_PACKH2 = 87; public static final int TMS320C64X_INS_PACKH4 = 88; public static final int TMS320C64X_INS_PACKHL2 = 89; public static final int TMS320C64X_INS_PACKL4 = 90; public static final int TMS320C64X_INS_PACKLH2 = 91; public static final int TMS320C64X_INS_ROTL = 92; public static final int TMS320C64X_INS_SADD = 93; public static final int TMS320C64X_INS_SADD2 = 94; public static final int TMS320C64X_INS_SADDU4 = 95; public static final int TMS320C64X_INS_SADDUS2 = 96; public static final int TMS320C64X_INS_SAT = 97; public static final int TMS320C64X_INS_SET = 98; public static final int TMS320C64X_INS_SHFL = 99; public static final int TMS320C64X_INS_SHL = 100; public static final int TMS320C64X_INS_SHLMB = 101; public static final int TMS320C64X_INS_SHR = 102; public static final int TMS320C64X_INS_SHR2 = 103; public static final int TMS320C64X_INS_SHRMB = 104; public static final int TMS320C64X_INS_SHRU = 105; public static final int TMS320C64X_INS_SHRU2 = 106; public static final int TMS320C64X_INS_SMPY = 107; public static final int TMS320C64X_INS_SMPY2 = 108; public static final int TMS320C64X_INS_SMPYH = 109; public static final int TMS320C64X_INS_SMPYHL = 110; public static final int TMS320C64X_INS_SMPYLH = 111; public static final int TMS320C64X_INS_SPACK2 = 112; public static final int TMS320C64X_INS_SPACKU4 = 113; public static final int TMS320C64X_INS_SSHL = 114; public static final int TMS320C64X_INS_SSHVL = 115; public static final int TMS320C64X_INS_SSHVR = 116; public static final int TMS320C64X_INS_SSUB = 117; public static final int TMS320C64X_INS_STB = 118; public static final int TMS320C64X_INS_STDW = 119; public static final int TMS320C64X_INS_STH = 120; public static final int TMS320C64X_INS_STNDW = 121; public static final int TMS320C64X_INS_STNW = 122; public static final int TMS320C64X_INS_STW = 123; public static final int TMS320C64X_INS_SUB = 124; public static final int TMS320C64X_INS_SUB2 = 125; public static final int TMS320C64X_INS_SUB4 = 126; public static final int TMS320C64X_INS_SUBAB = 127; public static final int TMS320C64X_INS_SUBABS4 = 128; public static final int TMS320C64X_INS_SUBAH = 129; public static final int TMS320C64X_INS_SUBAW = 130; public static final int TMS320C64X_INS_SUBC = 131; public static final int TMS320C64X_INS_SUBU = 132; public static final int TMS320C64X_INS_SWAP4 = 133; public static final int TMS320C64X_INS_UNPKHU4 = 134; public static final int TMS320C64X_INS_UNPKLU4 = 135; public static final int TMS320C64X_INS_XOR = 136; public static final int TMS320C64X_INS_XPND2 = 137; public static final int TMS320C64X_INS_XPND4 = 138; public static final int TMS320C64X_INS_IDLE = 139; public static final int TMS320C64X_INS_MV = 140; public static final int TMS320C64X_INS_NEG = 141; public static final int TMS320C64X_INS_NOT = 142; public static final int TMS320C64X_INS_SWAP2 = 143; public static final int TMS320C64X_INS_ZERO = 144; public static final int TMS320C64X_INS_ENDING = 145; public static final int TMS320C64X_GRP_INVALID = 0; public static final int TMS320C64X_GRP_JUMP = 1; public static final int TMS320C64X_GRP_FUNIT_D = 128; public static final int TMS320C64X_GRP_FUNIT_L = 129; public static final int TMS320C64X_GRP_FUNIT_M = 130; public static final int TMS320C64X_GRP_FUNIT_S = 131; public static final int TMS320C64X_GRP_FUNIT_NO = 132; public static final int TMS320C64X_GRP_ENDING = 133; public static final int TMS320C64X_FUNIT_INVALID = 0; public static final int TMS320C64X_FUNIT_D = 1; public static final int TMS320C64X_FUNIT_L = 2; public static final int TMS320C64X_FUNIT_M = 3; public static final int TMS320C64X_FUNIT_S = 4; public static final int TMS320C64X_FUNIT_NO = 5; }capstone-sys-0.11.0/capstone/bindings/java/capstone/X86.java010066400017500001750000000074671363402546700220720ustar0000000000000000// Capstone Java binding // By Nguyen Anh Quynh & Dang Hoang Vu, 2013 package capstone; import com.sun.jna.Structure; import com.sun.jna.Union; import java.util.List; import java.util.Arrays; import static capstone.X86_const.*; public class X86 { public static class MemType extends Structure { public int segment; public int base; public int index; public int scale; public long disp; @Override public List getFieldOrder() { return Arrays.asList("segment", "base", "index", "scale", "disp"); } } public static class Encoding extends Structure { public byte modrmOffset; public byte dispOffset; public byte dispSize; public byte immOffset; public byte immSize; @Override public List getFieldOrder() { return Arrays.asList("modrmOffset", "dispOffset", "dispSize", "immOffset", "immSize"); } } public static class OpValue extends Union { public int reg; public long imm; public MemType mem; @Override public List getFieldOrder() { return Arrays.asList("reg", "imm", "mem"); } } public static class Operand extends Structure { public int type; public OpValue value; public byte size; public byte access; public int avx_bcast; public boolean avx_zero_opmask; public void read() { super.read(); if (type == X86_OP_MEM) value.setType(MemType.class); if (type == X86_OP_IMM) value.setType(Long.TYPE); if (type == X86_OP_REG) value.setType(Integer.TYPE); if (type == X86_OP_INVALID) return; readField("value"); } @Override public List getFieldOrder() { return Arrays.asList("type", "value", "size", "access", "avx_bcast", "avx_zero_opmask"); } } public static class UnionOpInfo extends Capstone.UnionOpInfo { public byte [] prefix; public byte [] opcode; public byte rex; public byte addr_size; public byte modrm; public byte sib; public long disp; public int sib_index; public byte sib_scale; public int sib_base; public int xop_cc; public int sse_cc; public int avx_cc; public byte avx_sae; public int avx_rm; public long eflags; public byte op_count; public Operand [] op; public Encoding encoding; public UnionOpInfo() { op = new Operand[8]; opcode = new byte[4]; prefix = new byte[4]; } @Override public List getFieldOrder() { return Arrays.asList("prefix", "opcode", "rex", "addr_size", "modrm", "sib", "disp", "sib_index", "sib_scale", "sib_base", "xop_cc", "sse_cc", "avx_cc", "avx_sae", "avx_rm", "eflags", "op_count", "op", "encoding"); } } public static class OpInfo extends Capstone.OpInfo { public byte [] prefix; public byte [] opcode; public byte opSize; public byte rex; public byte addrSize; public byte dispSize; public byte immSize; public byte modrm; public byte sib; public long disp; public int sibIndex; public byte sibScale; public int sibBase; public int xopCC; public int sseCC; public int avxCC; public boolean avxSae; public int avxRm; public long eflags; public Operand[] op; public Encoding encoding; public OpInfo(UnionOpInfo e) { prefix = e.prefix; opcode = e.opcode; rex = e.rex; addrSize = e.addr_size; modrm = e.modrm; sib = e.sib; disp = e.disp; sibIndex = e.sib_index; sibScale = e.sib_scale; sibBase = e.sib_base; xopCC = e.xop_cc; sseCC = e.sse_cc; avxCC = e.avx_cc; avxSae = e.avx_sae > 0; avxRm = e.avx_rm; eflags = e.eflags; op = new Operand[e.op_count]; for (int i=0; i, 2013-2015 LIB = capstone FLAGS = '-Wall -Wextra -Wwrite-strings' PYTHON2 = python all: arm_const.cmxa arm64_const.cmxa m680x_const.cmxa mips_const.cmxa ppc_const.cmxa sparc_const.cmxa sysz_const.cmxa x86_const.cmxa xcore_const.cmxa arm.cmxa arm64.cmxa m680x.cmxa mips.cmxa ppc.cmxa x86.cmxa sparc.cmxa systemz.cmxa xcore.cmxa capstone.cmxa test_basic.cmx test_detail.cmx test_x86.cmx test_arm.cmx test_arm64.cmx test_mips.cmx test_ppc.cmx test_sparc.cmx test_systemz.cmx test_xcore.cmx test_m680x.cmx ocaml.o ocamlopt -o test_basic -ccopt $(FLAGS) ocaml.o capstone.cmx test_basic.cmx -cclib -l$(LIB) ocamlopt -o test_detail -ccopt $(FLAGS) capstone.cmx ocaml.o test_detail.cmx -cclib -l$(LIB) ocamlopt -o test_x86 -ccopt $(FLAGS) capstone.cmx ocaml.o x86.cmx x86_const.cmx test_x86.cmx -cclib -l$(LIB) ocamlopt -o test_arm -ccopt $(FLAGS) capstone.cmx ocaml.o arm.cmx arm_const.cmx test_arm.cmx -cclib -l$(LIB) ocamlopt -o test_arm64 -ccopt $(FLAGS) capstone.cmx ocaml.o arm64.cmx arm64_const.cmx test_arm64.cmx -cclib -l$(LIB) ocamlopt -o test_mips -ccopt $(FLAGS) capstone.cmx ocaml.o mips.cmx mips_const.cmx test_mips.cmx -cclib -l$(LIB) ocamlopt -o test_ppc -ccopt $(FLAGS) capstone.cmx ocaml.o ppc.cmx ppc_const.cmx test_ppc.cmx -cclib -l$(LIB) ocamlopt -o test_sparc -ccopt $(FLAGS) capstone.cmx ocaml.o sparc.cmx sparc_const.cmx test_sparc.cmx -cclib -l$(LIB) ocamlopt -o test_systemz -ccopt $(FLAGS) capstone.cmx ocaml.o systemz.cmx sysz_const.cmx test_systemz.cmx -cclib -l$(LIB) ocamlopt -o test_xcore -ccopt $(FLAGS) capstone.cmx ocaml.o xcore.cmx xcore_const.cmx test_xcore.cmx -cclib -l$(LIB) ocamlopt -o test_m680x -ccopt $(FLAGS) capstone.cmx ocaml.o m680x.cmx m680x_const.cmx test_m680x.cmx -cclib -l$(LIB) test_basic.cmx: test_basic.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_detail.cmx: test_detail.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_x86.cmx: test_x86.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_arm.cmx: test_arm.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_arm64.cmx: test_arm64.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_mips.cmx: test_mips.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_ppc.cmx: test_ppc.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_sparc.cmx: test_sparc.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_systemz.cmx: test_systemz.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_xcore.cmx: test_xcore.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) test_m680x.cmx: test_m680x.ml ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) ocaml.o: ocaml.c ocamlc -ccopt $(FLAGS) -c $< capstone.mli: capstone.ml ocamlc -ccopt $(FLAGS) -i $< > $@ capstone.cmi: capstone.mli ocamlc -ccopt $(FLAGS) -c $< capstone.cmx: capstone.ml capstone.cmi ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB) capstone.cmxa: capstone.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< -cclib -lsb_ocaml -cclib -l$(LIB) x86.mli: x86.ml ocamlc -ccopt $(FLAGS) -i $< > $@ x86.cmi: x86.mli ocamlc -ccopt $(FLAGS) -c $< x86.cmx: x86.ml x86.cmi ocamlopt -ccopt $(FLAGS) -c $< x86.cmxa: x86.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< x86_const.mli: x86_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ x86_const.cmi: x86_const.mli ocamlc -ccopt $(FLAGS) -c $< x86_const.cmx: x86_const.ml x86_const.cmi ocamlopt -ccopt $(FLAGS) -c $< x86_const.cmxa: x86_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< arm.mli: arm.ml ocamlc -ccopt $(FLAGS) -i $< > $@ arm.cmi: arm.mli ocamlc -ccopt $(FLAGS) -c $< arm.cmx: arm.ml arm.cmi ocamlopt -ccopt $(FLAGS) -c $< arm.cmxa: arm.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< arm_const.mli: arm_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ arm_const.cmi: arm_const.mli ocamlc -ccopt $(FLAGS) -c $< arm_const.cmx: arm_const.ml arm_const.cmi ocamlopt -ccopt $(FLAGS) -c $< arm_const.cmxa: arm_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< arm64.mli: arm64.ml ocamlc -ccopt $(FLAGS) -i $< > $@ arm64.cmi: arm64.mli ocamlc -ccopt $(FLAGS) -c $< arm64.cmx: arm64.ml arm64.cmi ocamlopt -ccopt $(FLAGS) -c $< arm64.cmxa: arm64.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< arm64_const.mli: arm64_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ arm64_const.cmi: arm64_const.mli ocamlc -ccopt $(FLAGS) -c $< arm64_const.cmx: arm64_const.ml arm64_const.cmi ocamlopt -ccopt $(FLAGS) -c $< arm64_const.cmxa: arm64_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< m680x.mli: m680x.ml ocamlc -ccopt $(FLAGS) -i $< > $@ m680x.cmi: m680x.mli ocamlc -ccopt $(FLAGS) -c $< m680x.cmx: m680x.ml m680x.cmi ocamlopt -ccopt $(FLAGS) -c $< m680x.cmxa: m680x.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< m680x_const.mli: m680x_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ m680x_const.cmi: m680x_const.mli ocamlc -ccopt $(FLAGS) -c $< m680x_const.cmx: m680x_const.ml m680x_const.cmi ocamlopt -ccopt $(FLAGS) -c $< m680x_const.cmxa: m680x_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< mips.mli: mips.ml ocamlc -ccopt $(FLAGS) -i $< > $@ mips.cmi: mips.mli ocamlc -ccopt $(FLAGS) -c $< mips.cmx: mips.ml mips.cmi ocamlopt -ccopt $(FLAGS) -c $< mips.cmxa: mips.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< mips_const.mli: mips_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ mips_const.cmi: mips_const.mli ocamlc -ccopt $(FLAGS) -c $< mips_const.cmx: mips_const.ml mips_const.cmi ocamlopt -ccopt $(FLAGS) -c $< mips_const.cmxa: mips_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< ppc.mli: ppc.ml ocamlc -ccopt $(FLAGS) -i $< > $@ ppc.cmi: ppc.mli ocamlc -ccopt $(FLAGS) -c $< ppc.cmx: ppc.ml ppc.cmi ocamlopt -ccopt $(FLAGS) -c $< ppc.cmxa: ppc.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< ppc_const.mli: ppc_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ ppc_const.cmi: ppc_const.mli ocamlc -ccopt $(FLAGS) -c $< ppc_const.cmx: ppc_const.ml ppc_const.cmi ocamlopt -ccopt $(FLAGS) -c $< ppc_const.cmxa: ppc_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< sparc.mli: sparc.ml ocamlc -ccopt $(FLAGS) -i $< > $@ sparc.cmi: sparc.mli ocamlc -ccopt $(FLAGS) -c $< sparc.cmx: sparc.ml sparc.cmi ocamlopt -ccopt $(FLAGS) -c $< sparc.cmxa: sparc.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< sparc_const.mli: sparc_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ sparc_const.cmi: sparc_const.mli ocamlc -ccopt $(FLAGS) -c $< sparc_const.cmx: sparc_const.ml sparc_const.cmi ocamlopt -ccopt $(FLAGS) -c $< sparc_const.cmxa: sparc_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< systemz.mli: systemz.ml ocamlc -ccopt $(FLAGS) -i $< > $@ systemz.cmi: systemz.mli ocamlc -ccopt $(FLAGS) -c $< systemz.cmx: systemz.ml systemz.cmi ocamlopt -ccopt $(FLAGS) -c $< systemz.cmxa: systemz.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< sysz_const.mli: sysz_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ sysz_const.cmi: sysz_const.mli ocamlc -ccopt $(FLAGS) -c $< sysz_const.cmx: sysz_const.ml sysz_const.cmi ocamlopt -ccopt $(FLAGS) -c $< sysz_const.cmxa: sysz_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< xcore.mli: xcore.ml ocamlc -ccopt $(FLAGS) -i $< > $@ xcore.cmi: xcore.mli ocamlc -ccopt $(FLAGS) -c $< xcore.cmx: xcore.ml xcore.cmi ocamlopt -ccopt $(FLAGS) -c $< xcore.cmxa: xcore.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< xcore_const.mli: xcore_const.ml ocamlc -ccopt $(FLAGS) -i $< > $@ xcore_const.cmi: xcore_const.mli ocamlc -ccopt $(FLAGS) -c $< xcore_const.cmx: xcore_const.ml xcore_const.cmi ocamlopt -ccopt $(FLAGS) -c $< xcore_const.cmxa: xcore_const.cmx ocamlopt -ccopt $(FLAGS) -a -o $@ $< clean: rm -f *.[oa] *.so *.cm[ixoa] *.cmxa *.mli test_basic test_detail test_x86 test_arm test_arm64 test_mips test_ppc test_sparc test_systemz test_xcore test_m680x gen_const: cd .. && $(PYTHON2) const_generator.py ocaml TESTS = test_basic test_detail test_arm test_arm64 test_m680x test_mips test_ppc TESTS += test_sparc test_systemz test_x86 test_xcore check: @for t in $(TESTS); do \ echo Check $$t ... ; \ ./$$t > /dev/null && echo OK || echo FAILED; \ done capstone-sys-0.11.0/capstone/bindings/ocaml/README010066400017500001750000000014411363402546700200420ustar0000000000000000To compile Ocaml binding, Ocaml toolchain is needed. On Ubuntu Linux, you can install Ocaml with: $ sudo apt-get install ocaml-nox To compile Ocaml binding, simply run "make" on the command line. This directory also contains some test code to show how to use Capstone API. - test_basic.ml This code shows the most simple form of API where we only want to get basic information out of disassembled instruction, such as address, mnemonic and operand string. - test_detail.ml: This code shows how to access to architecture-neutral information in disassembled instructions, such as implicit registers read/written, or groups of instructions that this instruction belong to. - test_.ml These code show how to access architecture-specific information for each architecture. capstone-sys-0.11.0/capstone/bindings/ocaml/arm.ml010066400017500001750000000020041363402546700202670ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Arm_const let _CS_OP_ARCH = 5;; let _CS_OP_CIMM = _CS_OP_ARCH (* C-Immediate *) let _CS_OP_PIMM = _CS_OP_ARCH + 1 (* P-Immediate *) (* architecture specific info of instruction *) type arm_op_shift = { shift_type: int; (* TODO: covert this to pattern like arm_op_value? *) shift_value: int; } type arm_op_mem = { base: int; index: int; scale: int; disp: int; lshift: int; } type arm_op_value = | ARM_OP_INVALID of int | ARM_OP_REG of int | ARM_OP_CIMM of int | ARM_OP_PIMM of int | ARM_OP_IMM of int | ARM_OP_FP of float | ARM_OP_MEM of arm_op_mem | ARM_OP_SETEND of int type arm_op = { vector_index: int; shift: arm_op_shift; value: arm_op_value; subtracted: bool; access: int; neon_lane: int; } type cs_arm = { usermode: bool; vector_size: int; vector_data: int; cps_mode: int; cps_flag: int; cc: int; update_flags: bool; writeback: bool; mem_barrier: int; operands: arm_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/arm64.ml010066400017500001750000000015001363402546700204410ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Arm64_const (* architecture specific info of instruction *) type arm64_op_shift = { shift_type: int; shift_value: int; } type arm64_op_mem = { base: int; index: int; disp: int } type arm64_op_value = | ARM64_OP_INVALID of int | ARM64_OP_REG of int | ARM64_OP_CIMM of int | ARM64_OP_IMM of int | ARM64_OP_FP of float | ARM64_OP_MEM of arm64_op_mem | ARM64_OP_REG_MRS of int | ARM64_OP_REG_MSR of int | ARM64_OP_PSTATE of int | ARM64_OP_SYS of int | ARM64_OP_PREFETCH of int | ARM64_OP_BARRIER of int type arm64_op = { vector_index: int; vas: int; vess: int; shift: arm64_op_shift; ext: int; value: arm64_op_value; } type cs_arm64 = { cc: int; update_flags: bool; writeback: bool; operands: arm64_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/arm64_const.ml010066400017500001750000000705171363402546700216650ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.ml] *) let _ARM64_SFT_INVALID = 0;; let _ARM64_SFT_LSL = 1;; let _ARM64_SFT_MSL = 2;; let _ARM64_SFT_LSR = 3;; let _ARM64_SFT_ASR = 4;; let _ARM64_SFT_ROR = 5;; let _ARM64_EXT_INVALID = 0;; let _ARM64_EXT_UXTB = 1;; let _ARM64_EXT_UXTH = 2;; let _ARM64_EXT_UXTW = 3;; let _ARM64_EXT_UXTX = 4;; let _ARM64_EXT_SXTB = 5;; let _ARM64_EXT_SXTH = 6;; let _ARM64_EXT_SXTW = 7;; let _ARM64_EXT_SXTX = 8;; let _ARM64_CC_INVALID = 0;; let _ARM64_CC_EQ = 1;; let _ARM64_CC_NE = 2;; let _ARM64_CC_HS = 3;; let _ARM64_CC_LO = 4;; let _ARM64_CC_MI = 5;; let _ARM64_CC_PL = 6;; let _ARM64_CC_VS = 7;; let _ARM64_CC_VC = 8;; let _ARM64_CC_HI = 9;; let _ARM64_CC_LS = 10;; let _ARM64_CC_GE = 11;; let _ARM64_CC_LT = 12;; let _ARM64_CC_GT = 13;; let _ARM64_CC_LE = 14;; let _ARM64_CC_AL = 15;; let _ARM64_CC_NV = 16;; let _ARM64_SYSREG_INVALID = 0;; let _ARM64_SYSREG_MDCCSR_EL0 = 0x9808;; let _ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828;; let _ARM64_SYSREG_MDRAR_EL1 = 0x8080;; let _ARM64_SYSREG_OSLSR_EL1 = 0x808c;; let _ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83f6;; let _ARM64_SYSREG_PMCEID0_EL0 = 0xdce6;; let _ARM64_SYSREG_PMCEID1_EL0 = 0xdce7;; let _ARM64_SYSREG_MIDR_EL1 = 0xc000;; let _ARM64_SYSREG_CCSIDR_EL1 = 0xc800;; let _ARM64_SYSREG_CLIDR_EL1 = 0xc801;; let _ARM64_SYSREG_CTR_EL0 = 0xd801;; let _ARM64_SYSREG_MPIDR_EL1 = 0xc005;; let _ARM64_SYSREG_REVIDR_EL1 = 0xc006;; let _ARM64_SYSREG_AIDR_EL1 = 0xc807;; let _ARM64_SYSREG_DCZID_EL0 = 0xd807;; let _ARM64_SYSREG_ID_PFR0_EL1 = 0xc008;; let _ARM64_SYSREG_ID_PFR1_EL1 = 0xc009;; let _ARM64_SYSREG_ID_DFR0_EL1 = 0xc00a;; let _ARM64_SYSREG_ID_AFR0_EL1 = 0xc00b;; let _ARM64_SYSREG_ID_MMFR0_EL1 = 0xc00c;; let _ARM64_SYSREG_ID_MMFR1_EL1 = 0xc00d;; let _ARM64_SYSREG_ID_MMFR2_EL1 = 0xc00e;; let _ARM64_SYSREG_ID_MMFR3_EL1 = 0xc00f;; let _ARM64_SYSREG_ID_ISAR0_EL1 = 0xc010;; let _ARM64_SYSREG_ID_ISAR1_EL1 = 0xc011;; let _ARM64_SYSREG_ID_ISAR2_EL1 = 0xc012;; let _ARM64_SYSREG_ID_ISAR3_EL1 = 0xc013;; let _ARM64_SYSREG_ID_ISAR4_EL1 = 0xc014;; let _ARM64_SYSREG_ID_ISAR5_EL1 = 0xc015;; let _ARM64_SYSREG_ID_A64PFR0_EL1 = 0xc020;; let _ARM64_SYSREG_ID_A64PFR1_EL1 = 0xc021;; let _ARM64_SYSREG_ID_A64DFR0_EL1 = 0xc028;; let _ARM64_SYSREG_ID_A64DFR1_EL1 = 0xc029;; let _ARM64_SYSREG_ID_A64AFR0_EL1 = 0xc02c;; let _ARM64_SYSREG_ID_A64AFR1_EL1 = 0xc02d;; let _ARM64_SYSREG_ID_A64ISAR0_EL1 = 0xc030;; let _ARM64_SYSREG_ID_A64ISAR1_EL1 = 0xc031;; let _ARM64_SYSREG_ID_A64MMFR0_EL1 = 0xc038;; let _ARM64_SYSREG_ID_A64MMFR1_EL1 = 0xc039;; let _ARM64_SYSREG_MVFR0_EL1 = 0xc018;; let _ARM64_SYSREG_MVFR1_EL1 = 0xc019;; let _ARM64_SYSREG_MVFR2_EL1 = 0xc01a;; let _ARM64_SYSREG_RVBAR_EL1 = 0xc601;; let _ARM64_SYSREG_RVBAR_EL2 = 0xe601;; let _ARM64_SYSREG_RVBAR_EL3 = 0xf601;; let _ARM64_SYSREG_ISR_EL1 = 0xc608;; let _ARM64_SYSREG_CNTPCT_EL0 = 0xdf01;; let _ARM64_SYSREG_CNTVCT_EL0 = 0xdf02;; let _ARM64_SYSREG_TRCSTATR = 0x8818;; let _ARM64_SYSREG_TRCIDR8 = 0x8806;; let _ARM64_SYSREG_TRCIDR9 = 0x880e;; let _ARM64_SYSREG_TRCIDR10 = 0x8816;; let _ARM64_SYSREG_TRCIDR11 = 0x881e;; let _ARM64_SYSREG_TRCIDR12 = 0x8826;; let _ARM64_SYSREG_TRCIDR13 = 0x882e;; let _ARM64_SYSREG_TRCIDR0 = 0x8847;; let _ARM64_SYSREG_TRCIDR1 = 0x884f;; let _ARM64_SYSREG_TRCIDR2 = 0x8857;; let _ARM64_SYSREG_TRCIDR3 = 0x885f;; let _ARM64_SYSREG_TRCIDR4 = 0x8867;; let _ARM64_SYSREG_TRCIDR5 = 0x886f;; let _ARM64_SYSREG_TRCIDR6 = 0x8877;; let _ARM64_SYSREG_TRCIDR7 = 0x887f;; let _ARM64_SYSREG_TRCOSLSR = 0x888c;; let _ARM64_SYSREG_TRCPDSR = 0x88ac;; let _ARM64_SYSREG_TRCDEVAFF0 = 0x8bd6;; let _ARM64_SYSREG_TRCDEVAFF1 = 0x8bde;; let _ARM64_SYSREG_TRCLSR = 0x8bee;; let _ARM64_SYSREG_TRCAUTHSTATUS = 0x8bf6;; let _ARM64_SYSREG_TRCDEVARCH = 0x8bfe;; let _ARM64_SYSREG_TRCDEVID = 0x8b97;; let _ARM64_SYSREG_TRCDEVTYPE = 0x8b9f;; let _ARM64_SYSREG_TRCPIDR4 = 0x8ba7;; let _ARM64_SYSREG_TRCPIDR5 = 0x8baf;; let _ARM64_SYSREG_TRCPIDR6 = 0x8bb7;; let _ARM64_SYSREG_TRCPIDR7 = 0x8bbf;; let _ARM64_SYSREG_TRCPIDR0 = 0x8bc7;; let _ARM64_SYSREG_TRCPIDR1 = 0x8bcf;; let _ARM64_SYSREG_TRCPIDR2 = 0x8bd7;; let _ARM64_SYSREG_TRCPIDR3 = 0x8bdf;; let _ARM64_SYSREG_TRCCIDR0 = 0x8be7;; let _ARM64_SYSREG_TRCCIDR1 = 0x8bef;; let _ARM64_SYSREG_TRCCIDR2 = 0x8bf7;; let _ARM64_SYSREG_TRCCIDR3 = 0x8bff;; let _ARM64_SYSREG_ICC_IAR1_EL1 = 0xc660;; let _ARM64_SYSREG_ICC_IAR0_EL1 = 0xc640;; let _ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xc662;; let _ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xc642;; let _ARM64_SYSREG_ICC_RPR_EL1 = 0xc65b;; let _ARM64_SYSREG_ICH_VTR_EL2 = 0xe659;; let _ARM64_SYSREG_ICH_EISR_EL2 = 0xe65b;; let _ARM64_SYSREG_ICH_ELSR_EL2 = 0xe65d;; let _ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828;; let _ARM64_SYSREG_OSLAR_EL1 = 0x8084;; let _ARM64_SYSREG_PMSWINC_EL0 = 0xdce4;; let _ARM64_SYSREG_TRCOSLAR = 0x8884;; let _ARM64_SYSREG_TRCLAR = 0x8be6;; let _ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661;; let _ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641;; let _ARM64_SYSREG_ICC_DIR_EL1 = 0xc659;; let _ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d;; let _ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e;; let _ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f;; let _ARM64_PSTATE_INVALID = 0;; let _ARM64_PSTATE_SPSEL = 0x05;; let _ARM64_PSTATE_DAIFSET = 0x1e;; let _ARM64_PSTATE_DAIFCLR = 0x1f;; let _ARM64_VAS_INVALID = 0;; let _ARM64_VAS_8B = 1;; let _ARM64_VAS_16B = 2;; let _ARM64_VAS_4H = 3;; let _ARM64_VAS_8H = 4;; let _ARM64_VAS_2S = 5;; let _ARM64_VAS_4S = 6;; let _ARM64_VAS_1D = 7;; let _ARM64_VAS_2D = 8;; let _ARM64_VAS_1Q = 9;; let _ARM64_VESS_INVALID = 0;; let _ARM64_VESS_B = 1;; let _ARM64_VESS_H = 2;; let _ARM64_VESS_S = 3;; let _ARM64_VESS_D = 4;; let _ARM64_BARRIER_INVALID = 0;; let _ARM64_BARRIER_OSHLD = 0x1;; let _ARM64_BARRIER_OSHST = 0x2;; let _ARM64_BARRIER_OSH = 0x3;; let _ARM64_BARRIER_NSHLD = 0x5;; let _ARM64_BARRIER_NSHST = 0x6;; let _ARM64_BARRIER_NSH = 0x7;; let _ARM64_BARRIER_ISHLD = 0x9;; let _ARM64_BARRIER_ISHST = 0xa;; let _ARM64_BARRIER_ISH = 0xb;; let _ARM64_BARRIER_LD = 0xd;; let _ARM64_BARRIER_ST = 0xe;; let _ARM64_BARRIER_SY = 0xf;; let _ARM64_OP_INVALID = 0;; let _ARM64_OP_REG = 1;; let _ARM64_OP_IMM = 2;; let _ARM64_OP_MEM = 3;; let _ARM64_OP_FP = 4;; let _ARM64_OP_CIMM = 64;; let _ARM64_OP_REG_MRS = 65;; let _ARM64_OP_REG_MSR = 66;; let _ARM64_OP_PSTATE = 67;; let _ARM64_OP_SYS = 68;; let _ARM64_OP_PREFETCH = 69;; let _ARM64_OP_BARRIER = 70;; let _ARM64_TLBI_INVALID = 0;; let _ARM64_TLBI_VMALLE1IS = 1;; let _ARM64_TLBI_VAE1IS = 2;; let _ARM64_TLBI_ASIDE1IS = 3;; let _ARM64_TLBI_VAAE1IS = 4;; let _ARM64_TLBI_VALE1IS = 5;; let _ARM64_TLBI_VAALE1IS = 6;; let _ARM64_TLBI_ALLE2IS = 7;; let _ARM64_TLBI_VAE2IS = 8;; let _ARM64_TLBI_ALLE1IS = 9;; let _ARM64_TLBI_VALE2IS = 10;; let _ARM64_TLBI_VMALLS12E1IS = 11;; let _ARM64_TLBI_ALLE3IS = 12;; let _ARM64_TLBI_VAE3IS = 13;; let _ARM64_TLBI_VALE3IS = 14;; let _ARM64_TLBI_IPAS2E1IS = 15;; let _ARM64_TLBI_IPAS2LE1IS = 16;; let _ARM64_TLBI_IPAS2E1 = 17;; let _ARM64_TLBI_IPAS2LE1 = 18;; let _ARM64_TLBI_VMALLE1 = 19;; let _ARM64_TLBI_VAE1 = 20;; let _ARM64_TLBI_ASIDE1 = 21;; let _ARM64_TLBI_VAAE1 = 22;; let _ARM64_TLBI_VALE1 = 23;; let _ARM64_TLBI_VAALE1 = 24;; let _ARM64_TLBI_ALLE2 = 25;; let _ARM64_TLBI_VAE2 = 26;; let _ARM64_TLBI_ALLE1 = 27;; let _ARM64_TLBI_VALE2 = 28;; let _ARM64_TLBI_VMALLS12E1 = 29;; let _ARM64_TLBI_ALLE3 = 30;; let _ARM64_TLBI_VAE3 = 31;; let _ARM64_TLBI_VALE3 = 32;; let _ARM64_AT_S1E1R = 33;; let _ARM64_AT_S1E1W = 34;; let _ARM64_AT_S1E0R = 35;; let _ARM64_AT_S1E0W = 36;; let _ARM64_AT_S1E2R = 37;; let _ARM64_AT_S1E2W = 38;; let _ARM64_AT_S12E1R = 39;; let _ARM64_AT_S12E1W = 40;; let _ARM64_AT_S12E0R = 41;; let _ARM64_AT_S12E0W = 42;; let _ARM64_AT_S1E3R = 43;; let _ARM64_AT_S1E3W = 44;; let _ARM64_DC_INVALID = 0;; let _ARM64_DC_ZVA = 1;; let _ARM64_DC_IVAC = 2;; let _ARM64_DC_ISW = 3;; let _ARM64_DC_CVAC = 4;; let _ARM64_DC_CSW = 5;; let _ARM64_DC_CVAU = 6;; let _ARM64_DC_CIVAC = 7;; let _ARM64_DC_CISW = 8;; let _ARM64_IC_INVALID = 0;; let _ARM64_IC_IALLUIS = 1;; let _ARM64_IC_IALLU = 2;; let _ARM64_IC_IVAU = 3;; let _ARM64_PRFM_INVALID = 0;; let _ARM64_PRFM_PLDL1KEEP = 0x00+1;; let _ARM64_PRFM_PLDL1STRM = 0x01+1;; let _ARM64_PRFM_PLDL2KEEP = 0x02+1;; let _ARM64_PRFM_PLDL2STRM = 0x03+1;; let _ARM64_PRFM_PLDL3KEEP = 0x04+1;; let _ARM64_PRFM_PLDL3STRM = 0x05+1;; let _ARM64_PRFM_PLIL1KEEP = 0x08+1;; let _ARM64_PRFM_PLIL1STRM = 0x09+1;; let _ARM64_PRFM_PLIL2KEEP = 0x0a+1;; let _ARM64_PRFM_PLIL2STRM = 0x0b+1;; let _ARM64_PRFM_PLIL3KEEP = 0x0c+1;; let _ARM64_PRFM_PLIL3STRM = 0x0d+1;; let _ARM64_PRFM_PSTL1KEEP = 0x10+1;; let _ARM64_PRFM_PSTL1STRM = 0x11+1;; let _ARM64_PRFM_PSTL2KEEP = 0x12+1;; let _ARM64_PRFM_PSTL2STRM = 0x13+1;; let _ARM64_PRFM_PSTL3KEEP = 0x14+1;; let _ARM64_PRFM_PSTL3STRM = 0x15+1;; let _ARM64_REG_INVALID = 0;; let _ARM64_REG_X29 = 1;; let _ARM64_REG_X30 = 2;; let _ARM64_REG_NZCV = 3;; let _ARM64_REG_SP = 4;; let _ARM64_REG_WSP = 5;; let _ARM64_REG_WZR = 6;; let _ARM64_REG_XZR = 7;; let _ARM64_REG_B0 = 8;; let _ARM64_REG_B1 = 9;; let _ARM64_REG_B2 = 10;; let _ARM64_REG_B3 = 11;; let _ARM64_REG_B4 = 12;; let _ARM64_REG_B5 = 13;; let _ARM64_REG_B6 = 14;; let _ARM64_REG_B7 = 15;; let _ARM64_REG_B8 = 16;; let _ARM64_REG_B9 = 17;; let _ARM64_REG_B10 = 18;; let _ARM64_REG_B11 = 19;; let _ARM64_REG_B12 = 20;; let _ARM64_REG_B13 = 21;; let _ARM64_REG_B14 = 22;; let _ARM64_REG_B15 = 23;; let _ARM64_REG_B16 = 24;; let _ARM64_REG_B17 = 25;; let _ARM64_REG_B18 = 26;; let _ARM64_REG_B19 = 27;; let _ARM64_REG_B20 = 28;; let _ARM64_REG_B21 = 29;; let _ARM64_REG_B22 = 30;; let _ARM64_REG_B23 = 31;; let _ARM64_REG_B24 = 32;; let _ARM64_REG_B25 = 33;; let _ARM64_REG_B26 = 34;; let _ARM64_REG_B27 = 35;; let _ARM64_REG_B28 = 36;; let _ARM64_REG_B29 = 37;; let _ARM64_REG_B30 = 38;; let _ARM64_REG_B31 = 39;; let _ARM64_REG_D0 = 40;; let _ARM64_REG_D1 = 41;; let _ARM64_REG_D2 = 42;; let _ARM64_REG_D3 = 43;; let _ARM64_REG_D4 = 44;; let _ARM64_REG_D5 = 45;; let _ARM64_REG_D6 = 46;; let _ARM64_REG_D7 = 47;; let _ARM64_REG_D8 = 48;; let _ARM64_REG_D9 = 49;; let _ARM64_REG_D10 = 50;; let _ARM64_REG_D11 = 51;; let _ARM64_REG_D12 = 52;; let _ARM64_REG_D13 = 53;; let _ARM64_REG_D14 = 54;; let _ARM64_REG_D15 = 55;; let _ARM64_REG_D16 = 56;; let _ARM64_REG_D17 = 57;; let _ARM64_REG_D18 = 58;; let _ARM64_REG_D19 = 59;; let _ARM64_REG_D20 = 60;; let _ARM64_REG_D21 = 61;; let _ARM64_REG_D22 = 62;; let _ARM64_REG_D23 = 63;; let _ARM64_REG_D24 = 64;; let _ARM64_REG_D25 = 65;; let _ARM64_REG_D26 = 66;; let _ARM64_REG_D27 = 67;; let _ARM64_REG_D28 = 68;; let _ARM64_REG_D29 = 69;; let _ARM64_REG_D30 = 70;; let _ARM64_REG_D31 = 71;; let _ARM64_REG_H0 = 72;; let _ARM64_REG_H1 = 73;; let _ARM64_REG_H2 = 74;; let _ARM64_REG_H3 = 75;; let _ARM64_REG_H4 = 76;; let _ARM64_REG_H5 = 77;; let _ARM64_REG_H6 = 78;; let _ARM64_REG_H7 = 79;; let _ARM64_REG_H8 = 80;; let _ARM64_REG_H9 = 81;; let _ARM64_REG_H10 = 82;; let _ARM64_REG_H11 = 83;; let _ARM64_REG_H12 = 84;; let _ARM64_REG_H13 = 85;; let _ARM64_REG_H14 = 86;; let _ARM64_REG_H15 = 87;; let _ARM64_REG_H16 = 88;; let _ARM64_REG_H17 = 89;; let _ARM64_REG_H18 = 90;; let _ARM64_REG_H19 = 91;; let _ARM64_REG_H20 = 92;; let _ARM64_REG_H21 = 93;; let _ARM64_REG_H22 = 94;; let _ARM64_REG_H23 = 95;; let _ARM64_REG_H24 = 96;; let _ARM64_REG_H25 = 97;; let _ARM64_REG_H26 = 98;; let _ARM64_REG_H27 = 99;; let _ARM64_REG_H28 = 100;; let _ARM64_REG_H29 = 101;; let _ARM64_REG_H30 = 102;; let _ARM64_REG_H31 = 103;; let _ARM64_REG_Q0 = 104;; let _ARM64_REG_Q1 = 105;; let _ARM64_REG_Q2 = 106;; let _ARM64_REG_Q3 = 107;; let _ARM64_REG_Q4 = 108;; let _ARM64_REG_Q5 = 109;; let _ARM64_REG_Q6 = 110;; let _ARM64_REG_Q7 = 111;; let _ARM64_REG_Q8 = 112;; let _ARM64_REG_Q9 = 113;; let _ARM64_REG_Q10 = 114;; let _ARM64_REG_Q11 = 115;; let _ARM64_REG_Q12 = 116;; let _ARM64_REG_Q13 = 117;; let _ARM64_REG_Q14 = 118;; let _ARM64_REG_Q15 = 119;; let _ARM64_REG_Q16 = 120;; let _ARM64_REG_Q17 = 121;; let _ARM64_REG_Q18 = 122;; let _ARM64_REG_Q19 = 123;; let _ARM64_REG_Q20 = 124;; let _ARM64_REG_Q21 = 125;; let _ARM64_REG_Q22 = 126;; let _ARM64_REG_Q23 = 127;; let _ARM64_REG_Q24 = 128;; let _ARM64_REG_Q25 = 129;; let _ARM64_REG_Q26 = 130;; let _ARM64_REG_Q27 = 131;; let _ARM64_REG_Q28 = 132;; let _ARM64_REG_Q29 = 133;; let _ARM64_REG_Q30 = 134;; let _ARM64_REG_Q31 = 135;; let _ARM64_REG_S0 = 136;; let _ARM64_REG_S1 = 137;; let _ARM64_REG_S2 = 138;; let _ARM64_REG_S3 = 139;; let _ARM64_REG_S4 = 140;; let _ARM64_REG_S5 = 141;; let _ARM64_REG_S6 = 142;; let _ARM64_REG_S7 = 143;; let _ARM64_REG_S8 = 144;; let _ARM64_REG_S9 = 145;; let _ARM64_REG_S10 = 146;; let _ARM64_REG_S11 = 147;; let _ARM64_REG_S12 = 148;; let _ARM64_REG_S13 = 149;; let _ARM64_REG_S14 = 150;; let _ARM64_REG_S15 = 151;; let _ARM64_REG_S16 = 152;; let _ARM64_REG_S17 = 153;; let _ARM64_REG_S18 = 154;; let _ARM64_REG_S19 = 155;; let _ARM64_REG_S20 = 156;; let _ARM64_REG_S21 = 157;; let _ARM64_REG_S22 = 158;; let _ARM64_REG_S23 = 159;; let _ARM64_REG_S24 = 160;; let _ARM64_REG_S25 = 161;; let _ARM64_REG_S26 = 162;; let _ARM64_REG_S27 = 163;; let _ARM64_REG_S28 = 164;; let _ARM64_REG_S29 = 165;; let _ARM64_REG_S30 = 166;; let _ARM64_REG_S31 = 167;; let _ARM64_REG_W0 = 168;; let _ARM64_REG_W1 = 169;; let _ARM64_REG_W2 = 170;; let _ARM64_REG_W3 = 171;; let _ARM64_REG_W4 = 172;; let _ARM64_REG_W5 = 173;; let _ARM64_REG_W6 = 174;; let _ARM64_REG_W7 = 175;; let _ARM64_REG_W8 = 176;; let _ARM64_REG_W9 = 177;; let _ARM64_REG_W10 = 178;; let _ARM64_REG_W11 = 179;; let _ARM64_REG_W12 = 180;; let _ARM64_REG_W13 = 181;; let _ARM64_REG_W14 = 182;; let _ARM64_REG_W15 = 183;; let _ARM64_REG_W16 = 184;; let _ARM64_REG_W17 = 185;; let _ARM64_REG_W18 = 186;; let _ARM64_REG_W19 = 187;; let _ARM64_REG_W20 = 188;; let _ARM64_REG_W21 = 189;; let _ARM64_REG_W22 = 190;; let _ARM64_REG_W23 = 191;; let _ARM64_REG_W24 = 192;; let _ARM64_REG_W25 = 193;; let _ARM64_REG_W26 = 194;; let _ARM64_REG_W27 = 195;; let _ARM64_REG_W28 = 196;; let _ARM64_REG_W29 = 197;; let _ARM64_REG_W30 = 198;; let _ARM64_REG_X0 = 199;; let _ARM64_REG_X1 = 200;; let _ARM64_REG_X2 = 201;; let _ARM64_REG_X3 = 202;; let _ARM64_REG_X4 = 203;; let _ARM64_REG_X5 = 204;; let _ARM64_REG_X6 = 205;; let _ARM64_REG_X7 = 206;; let _ARM64_REG_X8 = 207;; let _ARM64_REG_X9 = 208;; let _ARM64_REG_X10 = 209;; let _ARM64_REG_X11 = 210;; let _ARM64_REG_X12 = 211;; let _ARM64_REG_X13 = 212;; let _ARM64_REG_X14 = 213;; let _ARM64_REG_X15 = 214;; let _ARM64_REG_X16 = 215;; let _ARM64_REG_X17 = 216;; let _ARM64_REG_X18 = 217;; let _ARM64_REG_X19 = 218;; let _ARM64_REG_X20 = 219;; let _ARM64_REG_X21 = 220;; let _ARM64_REG_X22 = 221;; let _ARM64_REG_X23 = 222;; let _ARM64_REG_X24 = 223;; let _ARM64_REG_X25 = 224;; let _ARM64_REG_X26 = 225;; let _ARM64_REG_X27 = 226;; let _ARM64_REG_X28 = 227;; let _ARM64_REG_V0 = 228;; let _ARM64_REG_V1 = 229;; let _ARM64_REG_V2 = 230;; let _ARM64_REG_V3 = 231;; let _ARM64_REG_V4 = 232;; let _ARM64_REG_V5 = 233;; let _ARM64_REG_V6 = 234;; let _ARM64_REG_V7 = 235;; let _ARM64_REG_V8 = 236;; let _ARM64_REG_V9 = 237;; let _ARM64_REG_V10 = 238;; let _ARM64_REG_V11 = 239;; let _ARM64_REG_V12 = 240;; let _ARM64_REG_V13 = 241;; let _ARM64_REG_V14 = 242;; let _ARM64_REG_V15 = 243;; let _ARM64_REG_V16 = 244;; let _ARM64_REG_V17 = 245;; let _ARM64_REG_V18 = 246;; let _ARM64_REG_V19 = 247;; let _ARM64_REG_V20 = 248;; let _ARM64_REG_V21 = 249;; let _ARM64_REG_V22 = 250;; let _ARM64_REG_V23 = 251;; let _ARM64_REG_V24 = 252;; let _ARM64_REG_V25 = 253;; let _ARM64_REG_V26 = 254;; let _ARM64_REG_V27 = 255;; let _ARM64_REG_V28 = 256;; let _ARM64_REG_V29 = 257;; let _ARM64_REG_V30 = 258;; let _ARM64_REG_V31 = 259;; let _ARM64_REG_ENDING = 260;; let _ARM64_REG_IP0 = _ARM64_REG_X16;; let _ARM64_REG_IP1 = _ARM64_REG_X17;; let _ARM64_REG_FP = _ARM64_REG_X29;; let _ARM64_REG_LR = _ARM64_REG_X30;; let _ARM64_INS_INVALID = 0;; let _ARM64_INS_ABS = 1;; let _ARM64_INS_ADC = 2;; let _ARM64_INS_ADDHN = 3;; let _ARM64_INS_ADDHN2 = 4;; let _ARM64_INS_ADDP = 5;; let _ARM64_INS_ADD = 6;; let _ARM64_INS_ADDV = 7;; let _ARM64_INS_ADR = 8;; let _ARM64_INS_ADRP = 9;; let _ARM64_INS_AESD = 10;; let _ARM64_INS_AESE = 11;; let _ARM64_INS_AESIMC = 12;; let _ARM64_INS_AESMC = 13;; let _ARM64_INS_AND = 14;; let _ARM64_INS_ASR = 15;; let _ARM64_INS_B = 16;; let _ARM64_INS_BFM = 17;; let _ARM64_INS_BIC = 18;; let _ARM64_INS_BIF = 19;; let _ARM64_INS_BIT = 20;; let _ARM64_INS_BL = 21;; let _ARM64_INS_BLR = 22;; let _ARM64_INS_BR = 23;; let _ARM64_INS_BRK = 24;; let _ARM64_INS_BSL = 25;; let _ARM64_INS_CBNZ = 26;; let _ARM64_INS_CBZ = 27;; let _ARM64_INS_CCMN = 28;; let _ARM64_INS_CCMP = 29;; let _ARM64_INS_CLREX = 30;; let _ARM64_INS_CLS = 31;; let _ARM64_INS_CLZ = 32;; let _ARM64_INS_CMEQ = 33;; let _ARM64_INS_CMGE = 34;; let _ARM64_INS_CMGT = 35;; let _ARM64_INS_CMHI = 36;; let _ARM64_INS_CMHS = 37;; let _ARM64_INS_CMLE = 38;; let _ARM64_INS_CMLT = 39;; let _ARM64_INS_CMTST = 40;; let _ARM64_INS_CNT = 41;; let _ARM64_INS_MOV = 42;; let _ARM64_INS_CRC32B = 43;; let _ARM64_INS_CRC32CB = 44;; let _ARM64_INS_CRC32CH = 45;; let _ARM64_INS_CRC32CW = 46;; let _ARM64_INS_CRC32CX = 47;; let _ARM64_INS_CRC32H = 48;; let _ARM64_INS_CRC32W = 49;; let _ARM64_INS_CRC32X = 50;; let _ARM64_INS_CSEL = 51;; let _ARM64_INS_CSINC = 52;; let _ARM64_INS_CSINV = 53;; let _ARM64_INS_CSNEG = 54;; let _ARM64_INS_DCPS1 = 55;; let _ARM64_INS_DCPS2 = 56;; let _ARM64_INS_DCPS3 = 57;; let _ARM64_INS_DMB = 58;; let _ARM64_INS_DRPS = 59;; let _ARM64_INS_DSB = 60;; let _ARM64_INS_DUP = 61;; let _ARM64_INS_EON = 62;; let _ARM64_INS_EOR = 63;; let _ARM64_INS_ERET = 64;; let _ARM64_INS_EXTR = 65;; let _ARM64_INS_EXT = 66;; let _ARM64_INS_FABD = 67;; let _ARM64_INS_FABS = 68;; let _ARM64_INS_FACGE = 69;; let _ARM64_INS_FACGT = 70;; let _ARM64_INS_FADD = 71;; let _ARM64_INS_FADDP = 72;; let _ARM64_INS_FCCMP = 73;; let _ARM64_INS_FCCMPE = 74;; let _ARM64_INS_FCMEQ = 75;; let _ARM64_INS_FCMGE = 76;; let _ARM64_INS_FCMGT = 77;; let _ARM64_INS_FCMLE = 78;; let _ARM64_INS_FCMLT = 79;; let _ARM64_INS_FCMP = 80;; let _ARM64_INS_FCMPE = 81;; let _ARM64_INS_FCSEL = 82;; let _ARM64_INS_FCVTAS = 83;; let _ARM64_INS_FCVTAU = 84;; let _ARM64_INS_FCVT = 85;; let _ARM64_INS_FCVTL = 86;; let _ARM64_INS_FCVTL2 = 87;; let _ARM64_INS_FCVTMS = 88;; let _ARM64_INS_FCVTMU = 89;; let _ARM64_INS_FCVTNS = 90;; let _ARM64_INS_FCVTNU = 91;; let _ARM64_INS_FCVTN = 92;; let _ARM64_INS_FCVTN2 = 93;; let _ARM64_INS_FCVTPS = 94;; let _ARM64_INS_FCVTPU = 95;; let _ARM64_INS_FCVTXN = 96;; let _ARM64_INS_FCVTXN2 = 97;; let _ARM64_INS_FCVTZS = 98;; let _ARM64_INS_FCVTZU = 99;; let _ARM64_INS_FDIV = 100;; let _ARM64_INS_FMADD = 101;; let _ARM64_INS_FMAX = 102;; let _ARM64_INS_FMAXNM = 103;; let _ARM64_INS_FMAXNMP = 104;; let _ARM64_INS_FMAXNMV = 105;; let _ARM64_INS_FMAXP = 106;; let _ARM64_INS_FMAXV = 107;; let _ARM64_INS_FMIN = 108;; let _ARM64_INS_FMINNM = 109;; let _ARM64_INS_FMINNMP = 110;; let _ARM64_INS_FMINNMV = 111;; let _ARM64_INS_FMINP = 112;; let _ARM64_INS_FMINV = 113;; let _ARM64_INS_FMLA = 114;; let _ARM64_INS_FMLS = 115;; let _ARM64_INS_FMOV = 116;; let _ARM64_INS_FMSUB = 117;; let _ARM64_INS_FMUL = 118;; let _ARM64_INS_FMULX = 119;; let _ARM64_INS_FNEG = 120;; let _ARM64_INS_FNMADD = 121;; let _ARM64_INS_FNMSUB = 122;; let _ARM64_INS_FNMUL = 123;; let _ARM64_INS_FRECPE = 124;; let _ARM64_INS_FRECPS = 125;; let _ARM64_INS_FRECPX = 126;; let _ARM64_INS_FRINTA = 127;; let _ARM64_INS_FRINTI = 128;; let _ARM64_INS_FRINTM = 129;; let _ARM64_INS_FRINTN = 130;; let _ARM64_INS_FRINTP = 131;; let _ARM64_INS_FRINTX = 132;; let _ARM64_INS_FRINTZ = 133;; let _ARM64_INS_FRSQRTE = 134;; let _ARM64_INS_FRSQRTS = 135;; let _ARM64_INS_FSQRT = 136;; let _ARM64_INS_FSUB = 137;; let _ARM64_INS_HINT = 138;; let _ARM64_INS_HLT = 139;; let _ARM64_INS_HVC = 140;; let _ARM64_INS_INS = 141;; let _ARM64_INS_ISB = 142;; let _ARM64_INS_LD1 = 143;; let _ARM64_INS_LD1R = 144;; let _ARM64_INS_LD2R = 145;; let _ARM64_INS_LD2 = 146;; let _ARM64_INS_LD3R = 147;; let _ARM64_INS_LD3 = 148;; let _ARM64_INS_LD4 = 149;; let _ARM64_INS_LD4R = 150;; let _ARM64_INS_LDARB = 151;; let _ARM64_INS_LDARH = 152;; let _ARM64_INS_LDAR = 153;; let _ARM64_INS_LDAXP = 154;; let _ARM64_INS_LDAXRB = 155;; let _ARM64_INS_LDAXRH = 156;; let _ARM64_INS_LDAXR = 157;; let _ARM64_INS_LDNP = 158;; let _ARM64_INS_LDP = 159;; let _ARM64_INS_LDPSW = 160;; let _ARM64_INS_LDRB = 161;; let _ARM64_INS_LDR = 162;; let _ARM64_INS_LDRH = 163;; let _ARM64_INS_LDRSB = 164;; let _ARM64_INS_LDRSH = 165;; let _ARM64_INS_LDRSW = 166;; let _ARM64_INS_LDTRB = 167;; let _ARM64_INS_LDTRH = 168;; let _ARM64_INS_LDTRSB = 169;; let _ARM64_INS_LDTRSH = 170;; let _ARM64_INS_LDTRSW = 171;; let _ARM64_INS_LDTR = 172;; let _ARM64_INS_LDURB = 173;; let _ARM64_INS_LDUR = 174;; let _ARM64_INS_LDURH = 175;; let _ARM64_INS_LDURSB = 176;; let _ARM64_INS_LDURSH = 177;; let _ARM64_INS_LDURSW = 178;; let _ARM64_INS_LDXP = 179;; let _ARM64_INS_LDXRB = 180;; let _ARM64_INS_LDXRH = 181;; let _ARM64_INS_LDXR = 182;; let _ARM64_INS_LSL = 183;; let _ARM64_INS_LSR = 184;; let _ARM64_INS_MADD = 185;; let _ARM64_INS_MLA = 186;; let _ARM64_INS_MLS = 187;; let _ARM64_INS_MOVI = 188;; let _ARM64_INS_MOVK = 189;; let _ARM64_INS_MOVN = 190;; let _ARM64_INS_MOVZ = 191;; let _ARM64_INS_MRS = 192;; let _ARM64_INS_MSR = 193;; let _ARM64_INS_MSUB = 194;; let _ARM64_INS_MUL = 195;; let _ARM64_INS_MVNI = 196;; let _ARM64_INS_NEG = 197;; let _ARM64_INS_NOT = 198;; let _ARM64_INS_ORN = 199;; let _ARM64_INS_ORR = 200;; let _ARM64_INS_PMULL2 = 201;; let _ARM64_INS_PMULL = 202;; let _ARM64_INS_PMUL = 203;; let _ARM64_INS_PRFM = 204;; let _ARM64_INS_PRFUM = 205;; let _ARM64_INS_RADDHN = 206;; let _ARM64_INS_RADDHN2 = 207;; let _ARM64_INS_RBIT = 208;; let _ARM64_INS_RET = 209;; let _ARM64_INS_REV16 = 210;; let _ARM64_INS_REV32 = 211;; let _ARM64_INS_REV64 = 212;; let _ARM64_INS_REV = 213;; let _ARM64_INS_ROR = 214;; let _ARM64_INS_RSHRN2 = 215;; let _ARM64_INS_RSHRN = 216;; let _ARM64_INS_RSUBHN = 217;; let _ARM64_INS_RSUBHN2 = 218;; let _ARM64_INS_SABAL2 = 219;; let _ARM64_INS_SABAL = 220;; let _ARM64_INS_SABA = 221;; let _ARM64_INS_SABDL2 = 222;; let _ARM64_INS_SABDL = 223;; let _ARM64_INS_SABD = 224;; let _ARM64_INS_SADALP = 225;; let _ARM64_INS_SADDLP = 226;; let _ARM64_INS_SADDLV = 227;; let _ARM64_INS_SADDL2 = 228;; let _ARM64_INS_SADDL = 229;; let _ARM64_INS_SADDW2 = 230;; let _ARM64_INS_SADDW = 231;; let _ARM64_INS_SBC = 232;; let _ARM64_INS_SBFM = 233;; let _ARM64_INS_SCVTF = 234;; let _ARM64_INS_SDIV = 235;; let _ARM64_INS_SHA1C = 236;; let _ARM64_INS_SHA1H = 237;; let _ARM64_INS_SHA1M = 238;; let _ARM64_INS_SHA1P = 239;; let _ARM64_INS_SHA1SU0 = 240;; let _ARM64_INS_SHA1SU1 = 241;; let _ARM64_INS_SHA256H2 = 242;; let _ARM64_INS_SHA256H = 243;; let _ARM64_INS_SHA256SU0 = 244;; let _ARM64_INS_SHA256SU1 = 245;; let _ARM64_INS_SHADD = 246;; let _ARM64_INS_SHLL2 = 247;; let _ARM64_INS_SHLL = 248;; let _ARM64_INS_SHL = 249;; let _ARM64_INS_SHRN2 = 250;; let _ARM64_INS_SHRN = 251;; let _ARM64_INS_SHSUB = 252;; let _ARM64_INS_SLI = 253;; let _ARM64_INS_SMADDL = 254;; let _ARM64_INS_SMAXP = 255;; let _ARM64_INS_SMAXV = 256;; let _ARM64_INS_SMAX = 257;; let _ARM64_INS_SMC = 258;; let _ARM64_INS_SMINP = 259;; let _ARM64_INS_SMINV = 260;; let _ARM64_INS_SMIN = 261;; let _ARM64_INS_SMLAL2 = 262;; let _ARM64_INS_SMLAL = 263;; let _ARM64_INS_SMLSL2 = 264;; let _ARM64_INS_SMLSL = 265;; let _ARM64_INS_SMOV = 266;; let _ARM64_INS_SMSUBL = 267;; let _ARM64_INS_SMULH = 268;; let _ARM64_INS_SMULL2 = 269;; let _ARM64_INS_SMULL = 270;; let _ARM64_INS_SQABS = 271;; let _ARM64_INS_SQADD = 272;; let _ARM64_INS_SQDMLAL = 273;; let _ARM64_INS_SQDMLAL2 = 274;; let _ARM64_INS_SQDMLSL = 275;; let _ARM64_INS_SQDMLSL2 = 276;; let _ARM64_INS_SQDMULH = 277;; let _ARM64_INS_SQDMULL = 278;; let _ARM64_INS_SQDMULL2 = 279;; let _ARM64_INS_SQNEG = 280;; let _ARM64_INS_SQRDMULH = 281;; let _ARM64_INS_SQRSHL = 282;; let _ARM64_INS_SQRSHRN = 283;; let _ARM64_INS_SQRSHRN2 = 284;; let _ARM64_INS_SQRSHRUN = 285;; let _ARM64_INS_SQRSHRUN2 = 286;; let _ARM64_INS_SQSHLU = 287;; let _ARM64_INS_SQSHL = 288;; let _ARM64_INS_SQSHRN = 289;; let _ARM64_INS_SQSHRN2 = 290;; let _ARM64_INS_SQSHRUN = 291;; let _ARM64_INS_SQSHRUN2 = 292;; let _ARM64_INS_SQSUB = 293;; let _ARM64_INS_SQXTN2 = 294;; let _ARM64_INS_SQXTN = 295;; let _ARM64_INS_SQXTUN2 = 296;; let _ARM64_INS_SQXTUN = 297;; let _ARM64_INS_SRHADD = 298;; let _ARM64_INS_SRI = 299;; let _ARM64_INS_SRSHL = 300;; let _ARM64_INS_SRSHR = 301;; let _ARM64_INS_SRSRA = 302;; let _ARM64_INS_SSHLL2 = 303;; let _ARM64_INS_SSHLL = 304;; let _ARM64_INS_SSHL = 305;; let _ARM64_INS_SSHR = 306;; let _ARM64_INS_SSRA = 307;; let _ARM64_INS_SSUBL2 = 308;; let _ARM64_INS_SSUBL = 309;; let _ARM64_INS_SSUBW2 = 310;; let _ARM64_INS_SSUBW = 311;; let _ARM64_INS_ST1 = 312;; let _ARM64_INS_ST2 = 313;; let _ARM64_INS_ST3 = 314;; let _ARM64_INS_ST4 = 315;; let _ARM64_INS_STLRB = 316;; let _ARM64_INS_STLRH = 317;; let _ARM64_INS_STLR = 318;; let _ARM64_INS_STLXP = 319;; let _ARM64_INS_STLXRB = 320;; let _ARM64_INS_STLXRH = 321;; let _ARM64_INS_STLXR = 322;; let _ARM64_INS_STNP = 323;; let _ARM64_INS_STP = 324;; let _ARM64_INS_STRB = 325;; let _ARM64_INS_STR = 326;; let _ARM64_INS_STRH = 327;; let _ARM64_INS_STTRB = 328;; let _ARM64_INS_STTRH = 329;; let _ARM64_INS_STTR = 330;; let _ARM64_INS_STURB = 331;; let _ARM64_INS_STUR = 332;; let _ARM64_INS_STURH = 333;; let _ARM64_INS_STXP = 334;; let _ARM64_INS_STXRB = 335;; let _ARM64_INS_STXRH = 336;; let _ARM64_INS_STXR = 337;; let _ARM64_INS_SUBHN = 338;; let _ARM64_INS_SUBHN2 = 339;; let _ARM64_INS_SUB = 340;; let _ARM64_INS_SUQADD = 341;; let _ARM64_INS_SVC = 342;; let _ARM64_INS_SYSL = 343;; let _ARM64_INS_SYS = 344;; let _ARM64_INS_TBL = 345;; let _ARM64_INS_TBNZ = 346;; let _ARM64_INS_TBX = 347;; let _ARM64_INS_TBZ = 348;; let _ARM64_INS_TRN1 = 349;; let _ARM64_INS_TRN2 = 350;; let _ARM64_INS_UABAL2 = 351;; let _ARM64_INS_UABAL = 352;; let _ARM64_INS_UABA = 353;; let _ARM64_INS_UABDL2 = 354;; let _ARM64_INS_UABDL = 355;; let _ARM64_INS_UABD = 356;; let _ARM64_INS_UADALP = 357;; let _ARM64_INS_UADDLP = 358;; let _ARM64_INS_UADDLV = 359;; let _ARM64_INS_UADDL2 = 360;; let _ARM64_INS_UADDL = 361;; let _ARM64_INS_UADDW2 = 362;; let _ARM64_INS_UADDW = 363;; let _ARM64_INS_UBFM = 364;; let _ARM64_INS_UCVTF = 365;; let _ARM64_INS_UDIV = 366;; let _ARM64_INS_UHADD = 367;; let _ARM64_INS_UHSUB = 368;; let _ARM64_INS_UMADDL = 369;; let _ARM64_INS_UMAXP = 370;; let _ARM64_INS_UMAXV = 371;; let _ARM64_INS_UMAX = 372;; let _ARM64_INS_UMINP = 373;; let _ARM64_INS_UMINV = 374;; let _ARM64_INS_UMIN = 375;; let _ARM64_INS_UMLAL2 = 376;; let _ARM64_INS_UMLAL = 377;; let _ARM64_INS_UMLSL2 = 378;; let _ARM64_INS_UMLSL = 379;; let _ARM64_INS_UMOV = 380;; let _ARM64_INS_UMSUBL = 381;; let _ARM64_INS_UMULH = 382;; let _ARM64_INS_UMULL2 = 383;; let _ARM64_INS_UMULL = 384;; let _ARM64_INS_UQADD = 385;; let _ARM64_INS_UQRSHL = 386;; let _ARM64_INS_UQRSHRN = 387;; let _ARM64_INS_UQRSHRN2 = 388;; let _ARM64_INS_UQSHL = 389;; let _ARM64_INS_UQSHRN = 390;; let _ARM64_INS_UQSHRN2 = 391;; let _ARM64_INS_UQSUB = 392;; let _ARM64_INS_UQXTN2 = 393;; let _ARM64_INS_UQXTN = 394;; let _ARM64_INS_URECPE = 395;; let _ARM64_INS_URHADD = 396;; let _ARM64_INS_URSHL = 397;; let _ARM64_INS_URSHR = 398;; let _ARM64_INS_URSQRTE = 399;; let _ARM64_INS_URSRA = 400;; let _ARM64_INS_USHLL2 = 401;; let _ARM64_INS_USHLL = 402;; let _ARM64_INS_USHL = 403;; let _ARM64_INS_USHR = 404;; let _ARM64_INS_USQADD = 405;; let _ARM64_INS_USRA = 406;; let _ARM64_INS_USUBL2 = 407;; let _ARM64_INS_USUBL = 408;; let _ARM64_INS_USUBW2 = 409;; let _ARM64_INS_USUBW = 410;; let _ARM64_INS_UZP1 = 411;; let _ARM64_INS_UZP2 = 412;; let _ARM64_INS_XTN2 = 413;; let _ARM64_INS_XTN = 414;; let _ARM64_INS_ZIP1 = 415;; let _ARM64_INS_ZIP2 = 416;; let _ARM64_INS_MNEG = 417;; let _ARM64_INS_UMNEGL = 418;; let _ARM64_INS_SMNEGL = 419;; let _ARM64_INS_NOP = 420;; let _ARM64_INS_YIELD = 421;; let _ARM64_INS_WFE = 422;; let _ARM64_INS_WFI = 423;; let _ARM64_INS_SEV = 424;; let _ARM64_INS_SEVL = 425;; let _ARM64_INS_NGC = 426;; let _ARM64_INS_SBFIZ = 427;; let _ARM64_INS_UBFIZ = 428;; let _ARM64_INS_SBFX = 429;; let _ARM64_INS_UBFX = 430;; let _ARM64_INS_BFI = 431;; let _ARM64_INS_BFXIL = 432;; let _ARM64_INS_CMN = 433;; let _ARM64_INS_MVN = 434;; let _ARM64_INS_TST = 435;; let _ARM64_INS_CSET = 436;; let _ARM64_INS_CINC = 437;; let _ARM64_INS_CSETM = 438;; let _ARM64_INS_CINV = 439;; let _ARM64_INS_CNEG = 440;; let _ARM64_INS_SXTB = 441;; let _ARM64_INS_SXTH = 442;; let _ARM64_INS_SXTW = 443;; let _ARM64_INS_CMP = 444;; let _ARM64_INS_UXTB = 445;; let _ARM64_INS_UXTH = 446;; let _ARM64_INS_UXTW = 447;; let _ARM64_INS_IC = 448;; let _ARM64_INS_DC = 449;; let _ARM64_INS_AT = 450;; let _ARM64_INS_TLBI = 451;; let _ARM64_INS_NEGS = 452;; let _ARM64_INS_NGCS = 453;; let _ARM64_INS_ENDING = 454;; let _ARM64_GRP_INVALID = 0;; let _ARM64_GRP_JUMP = 1;; let _ARM64_GRP_CALL = 2;; let _ARM64_GRP_RET = 3;; let _ARM64_GRP_INT = 4;; let _ARM64_GRP_PRIVILEGE = 6;; let _ARM64_GRP_BRANCH_RELATIVE = 7;; let _ARM64_GRP_CRYPTO = 128;; let _ARM64_GRP_FPARMV8 = 129;; let _ARM64_GRP_NEON = 130;; let _ARM64_GRP_CRC = 131;; let _ARM64_GRP_ENDING = 132;; capstone-sys-0.11.0/capstone/bindings/ocaml/arm_const.ml010066400017500001750000000501171363402546700215050ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.ml] *) let _ARM_SFT_INVALID = 0;; let _ARM_SFT_ASR = 1;; let _ARM_SFT_LSL = 2;; let _ARM_SFT_LSR = 3;; let _ARM_SFT_ROR = 4;; let _ARM_SFT_RRX = 5;; let _ARM_SFT_ASR_REG = 6;; let _ARM_SFT_LSL_REG = 7;; let _ARM_SFT_LSR_REG = 8;; let _ARM_SFT_ROR_REG = 9;; let _ARM_SFT_RRX_REG = 10;; let _ARM_CC_INVALID = 0;; let _ARM_CC_EQ = 1;; let _ARM_CC_NE = 2;; let _ARM_CC_HS = 3;; let _ARM_CC_LO = 4;; let _ARM_CC_MI = 5;; let _ARM_CC_PL = 6;; let _ARM_CC_VS = 7;; let _ARM_CC_VC = 8;; let _ARM_CC_HI = 9;; let _ARM_CC_LS = 10;; let _ARM_CC_GE = 11;; let _ARM_CC_LT = 12;; let _ARM_CC_GT = 13;; let _ARM_CC_LE = 14;; let _ARM_CC_AL = 15;; let _ARM_SYSREG_INVALID = 0;; let _ARM_SYSREG_SPSR_C = 1;; let _ARM_SYSREG_SPSR_X = 2;; let _ARM_SYSREG_SPSR_S = 4;; let _ARM_SYSREG_SPSR_F = 8;; let _ARM_SYSREG_CPSR_C = 16;; let _ARM_SYSREG_CPSR_X = 32;; let _ARM_SYSREG_CPSR_S = 64;; let _ARM_SYSREG_CPSR_F = 128;; let _ARM_SYSREG_APSR = 256;; let _ARM_SYSREG_APSR_G = 257;; let _ARM_SYSREG_APSR_NZCVQ = 258;; let _ARM_SYSREG_APSR_NZCVQG = 259;; let _ARM_SYSREG_IAPSR = 260;; let _ARM_SYSREG_IAPSR_G = 261;; let _ARM_SYSREG_IAPSR_NZCVQG = 262;; let _ARM_SYSREG_IAPSR_NZCVQ = 263;; let _ARM_SYSREG_EAPSR = 264;; let _ARM_SYSREG_EAPSR_G = 265;; let _ARM_SYSREG_EAPSR_NZCVQG = 266;; let _ARM_SYSREG_EAPSR_NZCVQ = 267;; let _ARM_SYSREG_XPSR = 268;; let _ARM_SYSREG_XPSR_G = 269;; let _ARM_SYSREG_XPSR_NZCVQG = 270;; let _ARM_SYSREG_XPSR_NZCVQ = 271;; let _ARM_SYSREG_IPSR = 272;; let _ARM_SYSREG_EPSR = 273;; let _ARM_SYSREG_IEPSR = 274;; let _ARM_SYSREG_MSP = 275;; let _ARM_SYSREG_PSP = 276;; let _ARM_SYSREG_PRIMASK = 277;; let _ARM_SYSREG_BASEPRI = 278;; let _ARM_SYSREG_BASEPRI_MAX = 279;; let _ARM_SYSREG_FAULTMASK = 280;; let _ARM_SYSREG_CONTROL = 281;; let _ARM_SYSREG_R8_USR = 282;; let _ARM_SYSREG_R9_USR = 283;; let _ARM_SYSREG_R10_USR = 284;; let _ARM_SYSREG_R11_USR = 285;; let _ARM_SYSREG_R12_USR = 286;; let _ARM_SYSREG_SP_USR = 287;; let _ARM_SYSREG_LR_USR = 288;; let _ARM_SYSREG_R8_FIQ = 289;; let _ARM_SYSREG_R9_FIQ = 290;; let _ARM_SYSREG_R10_FIQ = 291;; let _ARM_SYSREG_R11_FIQ = 292;; let _ARM_SYSREG_R12_FIQ = 293;; let _ARM_SYSREG_SP_FIQ = 294;; let _ARM_SYSREG_LR_FIQ = 295;; let _ARM_SYSREG_LR_IRQ = 296;; let _ARM_SYSREG_SP_IRQ = 297;; let _ARM_SYSREG_LR_SVC = 298;; let _ARM_SYSREG_SP_SVC = 299;; let _ARM_SYSREG_LR_ABT = 300;; let _ARM_SYSREG_SP_ABT = 301;; let _ARM_SYSREG_LR_UND = 302;; let _ARM_SYSREG_SP_UND = 303;; let _ARM_SYSREG_LR_MON = 304;; let _ARM_SYSREG_SP_MON = 305;; let _ARM_SYSREG_ELR_HYP = 306;; let _ARM_SYSREG_SP_HYP = 307;; let _ARM_SYSREG_SPSR_FIQ = 308;; let _ARM_SYSREG_SPSR_IRQ = 309;; let _ARM_SYSREG_SPSR_SVC = 310;; let _ARM_SYSREG_SPSR_ABT = 311;; let _ARM_SYSREG_SPSR_UND = 312;; let _ARM_SYSREG_SPSR_MON = 313;; let _ARM_SYSREG_SPSR_HYP = 314;; let _ARM_MB_INVALID = 0;; let _ARM_MB_RESERVED_0 = 1;; let _ARM_MB_OSHLD = 2;; let _ARM_MB_OSHST = 3;; let _ARM_MB_OSH = 4;; let _ARM_MB_RESERVED_4 = 5;; let _ARM_MB_NSHLD = 6;; let _ARM_MB_NSHST = 7;; let _ARM_MB_NSH = 8;; let _ARM_MB_RESERVED_8 = 9;; let _ARM_MB_ISHLD = 10;; let _ARM_MB_ISHST = 11;; let _ARM_MB_ISH = 12;; let _ARM_MB_RESERVED_12 = 13;; let _ARM_MB_LD = 14;; let _ARM_MB_ST = 15;; let _ARM_MB_SY = 16;; let _ARM_OP_INVALID = 0;; let _ARM_OP_REG = 1;; let _ARM_OP_IMM = 2;; let _ARM_OP_MEM = 3;; let _ARM_OP_FP = 4;; let _ARM_OP_CIMM = 64;; let _ARM_OP_PIMM = 65;; let _ARM_OP_SETEND = 66;; let _ARM_OP_SYSREG = 67;; let _ARM_SETEND_INVALID = 0;; let _ARM_SETEND_BE = 1;; let _ARM_SETEND_LE = 2;; let _ARM_CPSMODE_INVALID = 0;; let _ARM_CPSMODE_IE = 2;; let _ARM_CPSMODE_ID = 3;; let _ARM_CPSFLAG_INVALID = 0;; let _ARM_CPSFLAG_F = 1;; let _ARM_CPSFLAG_I = 2;; let _ARM_CPSFLAG_A = 4;; let _ARM_CPSFLAG_NONE = 16;; let _ARM_VECTORDATA_INVALID = 0;; let _ARM_VECTORDATA_I8 = 1;; let _ARM_VECTORDATA_I16 = 2;; let _ARM_VECTORDATA_I32 = 3;; let _ARM_VECTORDATA_I64 = 4;; let _ARM_VECTORDATA_S8 = 5;; let _ARM_VECTORDATA_S16 = 6;; let _ARM_VECTORDATA_S32 = 7;; let _ARM_VECTORDATA_S64 = 8;; let _ARM_VECTORDATA_U8 = 9;; let _ARM_VECTORDATA_U16 = 10;; let _ARM_VECTORDATA_U32 = 11;; let _ARM_VECTORDATA_U64 = 12;; let _ARM_VECTORDATA_P8 = 13;; let _ARM_VECTORDATA_F32 = 14;; let _ARM_VECTORDATA_F64 = 15;; let _ARM_VECTORDATA_F16F64 = 16;; let _ARM_VECTORDATA_F64F16 = 17;; let _ARM_VECTORDATA_F32F16 = 18;; let _ARM_VECTORDATA_F16F32 = 19;; let _ARM_VECTORDATA_F64F32 = 20;; let _ARM_VECTORDATA_F32F64 = 21;; let _ARM_VECTORDATA_S32F32 = 22;; let _ARM_VECTORDATA_U32F32 = 23;; let _ARM_VECTORDATA_F32S32 = 24;; let _ARM_VECTORDATA_F32U32 = 25;; let _ARM_VECTORDATA_F64S16 = 26;; let _ARM_VECTORDATA_F32S16 = 27;; let _ARM_VECTORDATA_F64S32 = 28;; let _ARM_VECTORDATA_S16F64 = 29;; let _ARM_VECTORDATA_S16F32 = 30;; let _ARM_VECTORDATA_S32F64 = 31;; let _ARM_VECTORDATA_U16F64 = 32;; let _ARM_VECTORDATA_U16F32 = 33;; let _ARM_VECTORDATA_U32F64 = 34;; let _ARM_VECTORDATA_F64U16 = 35;; let _ARM_VECTORDATA_F32U16 = 36;; let _ARM_VECTORDATA_F64U32 = 37;; let _ARM_REG_INVALID = 0;; let _ARM_REG_APSR = 1;; let _ARM_REG_APSR_NZCV = 2;; let _ARM_REG_CPSR = 3;; let _ARM_REG_FPEXC = 4;; let _ARM_REG_FPINST = 5;; let _ARM_REG_FPSCR = 6;; let _ARM_REG_FPSCR_NZCV = 7;; let _ARM_REG_FPSID = 8;; let _ARM_REG_ITSTATE = 9;; let _ARM_REG_LR = 10;; let _ARM_REG_PC = 11;; let _ARM_REG_SP = 12;; let _ARM_REG_SPSR = 13;; let _ARM_REG_D0 = 14;; let _ARM_REG_D1 = 15;; let _ARM_REG_D2 = 16;; let _ARM_REG_D3 = 17;; let _ARM_REG_D4 = 18;; let _ARM_REG_D5 = 19;; let _ARM_REG_D6 = 20;; let _ARM_REG_D7 = 21;; let _ARM_REG_D8 = 22;; let _ARM_REG_D9 = 23;; let _ARM_REG_D10 = 24;; let _ARM_REG_D11 = 25;; let _ARM_REG_D12 = 26;; let _ARM_REG_D13 = 27;; let _ARM_REG_D14 = 28;; let _ARM_REG_D15 = 29;; let _ARM_REG_D16 = 30;; let _ARM_REG_D17 = 31;; let _ARM_REG_D18 = 32;; let _ARM_REG_D19 = 33;; let _ARM_REG_D20 = 34;; let _ARM_REG_D21 = 35;; let _ARM_REG_D22 = 36;; let _ARM_REG_D23 = 37;; let _ARM_REG_D24 = 38;; let _ARM_REG_D25 = 39;; let _ARM_REG_D26 = 40;; let _ARM_REG_D27 = 41;; let _ARM_REG_D28 = 42;; let _ARM_REG_D29 = 43;; let _ARM_REG_D30 = 44;; let _ARM_REG_D31 = 45;; let _ARM_REG_FPINST2 = 46;; let _ARM_REG_MVFR0 = 47;; let _ARM_REG_MVFR1 = 48;; let _ARM_REG_MVFR2 = 49;; let _ARM_REG_Q0 = 50;; let _ARM_REG_Q1 = 51;; let _ARM_REG_Q2 = 52;; let _ARM_REG_Q3 = 53;; let _ARM_REG_Q4 = 54;; let _ARM_REG_Q5 = 55;; let _ARM_REG_Q6 = 56;; let _ARM_REG_Q7 = 57;; let _ARM_REG_Q8 = 58;; let _ARM_REG_Q9 = 59;; let _ARM_REG_Q10 = 60;; let _ARM_REG_Q11 = 61;; let _ARM_REG_Q12 = 62;; let _ARM_REG_Q13 = 63;; let _ARM_REG_Q14 = 64;; let _ARM_REG_Q15 = 65;; let _ARM_REG_R0 = 66;; let _ARM_REG_R1 = 67;; let _ARM_REG_R2 = 68;; let _ARM_REG_R3 = 69;; let _ARM_REG_R4 = 70;; let _ARM_REG_R5 = 71;; let _ARM_REG_R6 = 72;; let _ARM_REG_R7 = 73;; let _ARM_REG_R8 = 74;; let _ARM_REG_R9 = 75;; let _ARM_REG_R10 = 76;; let _ARM_REG_R11 = 77;; let _ARM_REG_R12 = 78;; let _ARM_REG_S0 = 79;; let _ARM_REG_S1 = 80;; let _ARM_REG_S2 = 81;; let _ARM_REG_S3 = 82;; let _ARM_REG_S4 = 83;; let _ARM_REG_S5 = 84;; let _ARM_REG_S6 = 85;; let _ARM_REG_S7 = 86;; let _ARM_REG_S8 = 87;; let _ARM_REG_S9 = 88;; let _ARM_REG_S10 = 89;; let _ARM_REG_S11 = 90;; let _ARM_REG_S12 = 91;; let _ARM_REG_S13 = 92;; let _ARM_REG_S14 = 93;; let _ARM_REG_S15 = 94;; let _ARM_REG_S16 = 95;; let _ARM_REG_S17 = 96;; let _ARM_REG_S18 = 97;; let _ARM_REG_S19 = 98;; let _ARM_REG_S20 = 99;; let _ARM_REG_S21 = 100;; let _ARM_REG_S22 = 101;; let _ARM_REG_S23 = 102;; let _ARM_REG_S24 = 103;; let _ARM_REG_S25 = 104;; let _ARM_REG_S26 = 105;; let _ARM_REG_S27 = 106;; let _ARM_REG_S28 = 107;; let _ARM_REG_S29 = 108;; let _ARM_REG_S30 = 109;; let _ARM_REG_S31 = 110;; let _ARM_REG_ENDING = 111;; let _ARM_REG_R13 = _ARM_REG_SP;; let _ARM_REG_R14 = _ARM_REG_LR;; let _ARM_REG_R15 = _ARM_REG_PC;; let _ARM_REG_SB = _ARM_REG_R9;; let _ARM_REG_SL = _ARM_REG_R10;; let _ARM_REG_FP = _ARM_REG_R11;; let _ARM_REG_IP = _ARM_REG_R12;; let _ARM_INS_INVALID = 0;; let _ARM_INS_ADC = 1;; let _ARM_INS_ADD = 2;; let _ARM_INS_ADR = 3;; let _ARM_INS_AESD = 4;; let _ARM_INS_AESE = 5;; let _ARM_INS_AESIMC = 6;; let _ARM_INS_AESMC = 7;; let _ARM_INS_AND = 8;; let _ARM_INS_BFC = 9;; let _ARM_INS_BFI = 10;; let _ARM_INS_BIC = 11;; let _ARM_INS_BKPT = 12;; let _ARM_INS_BL = 13;; let _ARM_INS_BLX = 14;; let _ARM_INS_BX = 15;; let _ARM_INS_BXJ = 16;; let _ARM_INS_B = 17;; let _ARM_INS_CDP = 18;; let _ARM_INS_CDP2 = 19;; let _ARM_INS_CLREX = 20;; let _ARM_INS_CLZ = 21;; let _ARM_INS_CMN = 22;; let _ARM_INS_CMP = 23;; let _ARM_INS_CPS = 24;; let _ARM_INS_CRC32B = 25;; let _ARM_INS_CRC32CB = 26;; let _ARM_INS_CRC32CH = 27;; let _ARM_INS_CRC32CW = 28;; let _ARM_INS_CRC32H = 29;; let _ARM_INS_CRC32W = 30;; let _ARM_INS_DBG = 31;; let _ARM_INS_DMB = 32;; let _ARM_INS_DSB = 33;; let _ARM_INS_EOR = 34;; let _ARM_INS_ERET = 35;; let _ARM_INS_VMOV = 36;; let _ARM_INS_FLDMDBX = 37;; let _ARM_INS_FLDMIAX = 38;; let _ARM_INS_VMRS = 39;; let _ARM_INS_FSTMDBX = 40;; let _ARM_INS_FSTMIAX = 41;; let _ARM_INS_HINT = 42;; let _ARM_INS_HLT = 43;; let _ARM_INS_HVC = 44;; let _ARM_INS_ISB = 45;; let _ARM_INS_LDA = 46;; let _ARM_INS_LDAB = 47;; let _ARM_INS_LDAEX = 48;; let _ARM_INS_LDAEXB = 49;; let _ARM_INS_LDAEXD = 50;; let _ARM_INS_LDAEXH = 51;; let _ARM_INS_LDAH = 52;; let _ARM_INS_LDC2L = 53;; let _ARM_INS_LDC2 = 54;; let _ARM_INS_LDCL = 55;; let _ARM_INS_LDC = 56;; let _ARM_INS_LDMDA = 57;; let _ARM_INS_LDMDB = 58;; let _ARM_INS_LDM = 59;; let _ARM_INS_LDMIB = 60;; let _ARM_INS_LDRBT = 61;; let _ARM_INS_LDRB = 62;; let _ARM_INS_LDRD = 63;; let _ARM_INS_LDREX = 64;; let _ARM_INS_LDREXB = 65;; let _ARM_INS_LDREXD = 66;; let _ARM_INS_LDREXH = 67;; let _ARM_INS_LDRH = 68;; let _ARM_INS_LDRHT = 69;; let _ARM_INS_LDRSB = 70;; let _ARM_INS_LDRSBT = 71;; let _ARM_INS_LDRSH = 72;; let _ARM_INS_LDRSHT = 73;; let _ARM_INS_LDRT = 74;; let _ARM_INS_LDR = 75;; let _ARM_INS_MCR = 76;; let _ARM_INS_MCR2 = 77;; let _ARM_INS_MCRR = 78;; let _ARM_INS_MCRR2 = 79;; let _ARM_INS_MLA = 80;; let _ARM_INS_MLS = 81;; let _ARM_INS_MOV = 82;; let _ARM_INS_MOVT = 83;; let _ARM_INS_MOVW = 84;; let _ARM_INS_MRC = 85;; let _ARM_INS_MRC2 = 86;; let _ARM_INS_MRRC = 87;; let _ARM_INS_MRRC2 = 88;; let _ARM_INS_MRS = 89;; let _ARM_INS_MSR = 90;; let _ARM_INS_MUL = 91;; let _ARM_INS_MVN = 92;; let _ARM_INS_ORR = 93;; let _ARM_INS_PKHBT = 94;; let _ARM_INS_PKHTB = 95;; let _ARM_INS_PLDW = 96;; let _ARM_INS_PLD = 97;; let _ARM_INS_PLI = 98;; let _ARM_INS_QADD = 99;; let _ARM_INS_QADD16 = 100;; let _ARM_INS_QADD8 = 101;; let _ARM_INS_QASX = 102;; let _ARM_INS_QDADD = 103;; let _ARM_INS_QDSUB = 104;; let _ARM_INS_QSAX = 105;; let _ARM_INS_QSUB = 106;; let _ARM_INS_QSUB16 = 107;; let _ARM_INS_QSUB8 = 108;; let _ARM_INS_RBIT = 109;; let _ARM_INS_REV = 110;; let _ARM_INS_REV16 = 111;; let _ARM_INS_REVSH = 112;; let _ARM_INS_RFEDA = 113;; let _ARM_INS_RFEDB = 114;; let _ARM_INS_RFEIA = 115;; let _ARM_INS_RFEIB = 116;; let _ARM_INS_RSB = 117;; let _ARM_INS_RSC = 118;; let _ARM_INS_SADD16 = 119;; let _ARM_INS_SADD8 = 120;; let _ARM_INS_SASX = 121;; let _ARM_INS_SBC = 122;; let _ARM_INS_SBFX = 123;; let _ARM_INS_SDIV = 124;; let _ARM_INS_SEL = 125;; let _ARM_INS_SETEND = 126;; let _ARM_INS_SHA1C = 127;; let _ARM_INS_SHA1H = 128;; let _ARM_INS_SHA1M = 129;; let _ARM_INS_SHA1P = 130;; let _ARM_INS_SHA1SU0 = 131;; let _ARM_INS_SHA1SU1 = 132;; let _ARM_INS_SHA256H = 133;; let _ARM_INS_SHA256H2 = 134;; let _ARM_INS_SHA256SU0 = 135;; let _ARM_INS_SHA256SU1 = 136;; let _ARM_INS_SHADD16 = 137;; let _ARM_INS_SHADD8 = 138;; let _ARM_INS_SHASX = 139;; let _ARM_INS_SHSAX = 140;; let _ARM_INS_SHSUB16 = 141;; let _ARM_INS_SHSUB8 = 142;; let _ARM_INS_SMC = 143;; let _ARM_INS_SMLABB = 144;; let _ARM_INS_SMLABT = 145;; let _ARM_INS_SMLAD = 146;; let _ARM_INS_SMLADX = 147;; let _ARM_INS_SMLAL = 148;; let _ARM_INS_SMLALBB = 149;; let _ARM_INS_SMLALBT = 150;; let _ARM_INS_SMLALD = 151;; let _ARM_INS_SMLALDX = 152;; let _ARM_INS_SMLALTB = 153;; let _ARM_INS_SMLALTT = 154;; let _ARM_INS_SMLATB = 155;; let _ARM_INS_SMLATT = 156;; let _ARM_INS_SMLAWB = 157;; let _ARM_INS_SMLAWT = 158;; let _ARM_INS_SMLSD = 159;; let _ARM_INS_SMLSDX = 160;; let _ARM_INS_SMLSLD = 161;; let _ARM_INS_SMLSLDX = 162;; let _ARM_INS_SMMLA = 163;; let _ARM_INS_SMMLAR = 164;; let _ARM_INS_SMMLS = 165;; let _ARM_INS_SMMLSR = 166;; let _ARM_INS_SMMUL = 167;; let _ARM_INS_SMMULR = 168;; let _ARM_INS_SMUAD = 169;; let _ARM_INS_SMUADX = 170;; let _ARM_INS_SMULBB = 171;; let _ARM_INS_SMULBT = 172;; let _ARM_INS_SMULL = 173;; let _ARM_INS_SMULTB = 174;; let _ARM_INS_SMULTT = 175;; let _ARM_INS_SMULWB = 176;; let _ARM_INS_SMULWT = 177;; let _ARM_INS_SMUSD = 178;; let _ARM_INS_SMUSDX = 179;; let _ARM_INS_SRSDA = 180;; let _ARM_INS_SRSDB = 181;; let _ARM_INS_SRSIA = 182;; let _ARM_INS_SRSIB = 183;; let _ARM_INS_SSAT = 184;; let _ARM_INS_SSAT16 = 185;; let _ARM_INS_SSAX = 186;; let _ARM_INS_SSUB16 = 187;; let _ARM_INS_SSUB8 = 188;; let _ARM_INS_STC2L = 189;; let _ARM_INS_STC2 = 190;; let _ARM_INS_STCL = 191;; let _ARM_INS_STC = 192;; let _ARM_INS_STL = 193;; let _ARM_INS_STLB = 194;; let _ARM_INS_STLEX = 195;; let _ARM_INS_STLEXB = 196;; let _ARM_INS_STLEXD = 197;; let _ARM_INS_STLEXH = 198;; let _ARM_INS_STLH = 199;; let _ARM_INS_STMDA = 200;; let _ARM_INS_STMDB = 201;; let _ARM_INS_STM = 202;; let _ARM_INS_STMIB = 203;; let _ARM_INS_STRBT = 204;; let _ARM_INS_STRB = 205;; let _ARM_INS_STRD = 206;; let _ARM_INS_STREX = 207;; let _ARM_INS_STREXB = 208;; let _ARM_INS_STREXD = 209;; let _ARM_INS_STREXH = 210;; let _ARM_INS_STRH = 211;; let _ARM_INS_STRHT = 212;; let _ARM_INS_STRT = 213;; let _ARM_INS_STR = 214;; let _ARM_INS_SUB = 215;; let _ARM_INS_SVC = 216;; let _ARM_INS_SWP = 217;; let _ARM_INS_SWPB = 218;; let _ARM_INS_SXTAB = 219;; let _ARM_INS_SXTAB16 = 220;; let _ARM_INS_SXTAH = 221;; let _ARM_INS_SXTB = 222;; let _ARM_INS_SXTB16 = 223;; let _ARM_INS_SXTH = 224;; let _ARM_INS_TEQ = 225;; let _ARM_INS_TRAP = 226;; let _ARM_INS_TST = 227;; let _ARM_INS_UADD16 = 228;; let _ARM_INS_UADD8 = 229;; let _ARM_INS_UASX = 230;; let _ARM_INS_UBFX = 231;; let _ARM_INS_UDF = 232;; let _ARM_INS_UDIV = 233;; let _ARM_INS_UHADD16 = 234;; let _ARM_INS_UHADD8 = 235;; let _ARM_INS_UHASX = 236;; let _ARM_INS_UHSAX = 237;; let _ARM_INS_UHSUB16 = 238;; let _ARM_INS_UHSUB8 = 239;; let _ARM_INS_UMAAL = 240;; let _ARM_INS_UMLAL = 241;; let _ARM_INS_UMULL = 242;; let _ARM_INS_UQADD16 = 243;; let _ARM_INS_UQADD8 = 244;; let _ARM_INS_UQASX = 245;; let _ARM_INS_UQSAX = 246;; let _ARM_INS_UQSUB16 = 247;; let _ARM_INS_UQSUB8 = 248;; let _ARM_INS_USAD8 = 249;; let _ARM_INS_USADA8 = 250;; let _ARM_INS_USAT = 251;; let _ARM_INS_USAT16 = 252;; let _ARM_INS_USAX = 253;; let _ARM_INS_USUB16 = 254;; let _ARM_INS_USUB8 = 255;; let _ARM_INS_UXTAB = 256;; let _ARM_INS_UXTAB16 = 257;; let _ARM_INS_UXTAH = 258;; let _ARM_INS_UXTB = 259;; let _ARM_INS_UXTB16 = 260;; let _ARM_INS_UXTH = 261;; let _ARM_INS_VABAL = 262;; let _ARM_INS_VABA = 263;; let _ARM_INS_VABDL = 264;; let _ARM_INS_VABD = 265;; let _ARM_INS_VABS = 266;; let _ARM_INS_VACGE = 267;; let _ARM_INS_VACGT = 268;; let _ARM_INS_VADD = 269;; let _ARM_INS_VADDHN = 270;; let _ARM_INS_VADDL = 271;; let _ARM_INS_VADDW = 272;; let _ARM_INS_VAND = 273;; let _ARM_INS_VBIC = 274;; let _ARM_INS_VBIF = 275;; let _ARM_INS_VBIT = 276;; let _ARM_INS_VBSL = 277;; let _ARM_INS_VCEQ = 278;; let _ARM_INS_VCGE = 279;; let _ARM_INS_VCGT = 280;; let _ARM_INS_VCLE = 281;; let _ARM_INS_VCLS = 282;; let _ARM_INS_VCLT = 283;; let _ARM_INS_VCLZ = 284;; let _ARM_INS_VCMP = 285;; let _ARM_INS_VCMPE = 286;; let _ARM_INS_VCNT = 287;; let _ARM_INS_VCVTA = 288;; let _ARM_INS_VCVTB = 289;; let _ARM_INS_VCVT = 290;; let _ARM_INS_VCVTM = 291;; let _ARM_INS_VCVTN = 292;; let _ARM_INS_VCVTP = 293;; let _ARM_INS_VCVTT = 294;; let _ARM_INS_VDIV = 295;; let _ARM_INS_VDUP = 296;; let _ARM_INS_VEOR = 297;; let _ARM_INS_VEXT = 298;; let _ARM_INS_VFMA = 299;; let _ARM_INS_VFMS = 300;; let _ARM_INS_VFNMA = 301;; let _ARM_INS_VFNMS = 302;; let _ARM_INS_VHADD = 303;; let _ARM_INS_VHSUB = 304;; let _ARM_INS_VLD1 = 305;; let _ARM_INS_VLD2 = 306;; let _ARM_INS_VLD3 = 307;; let _ARM_INS_VLD4 = 308;; let _ARM_INS_VLDMDB = 309;; let _ARM_INS_VLDMIA = 310;; let _ARM_INS_VLDR = 311;; let _ARM_INS_VMAXNM = 312;; let _ARM_INS_VMAX = 313;; let _ARM_INS_VMINNM = 314;; let _ARM_INS_VMIN = 315;; let _ARM_INS_VMLA = 316;; let _ARM_INS_VMLAL = 317;; let _ARM_INS_VMLS = 318;; let _ARM_INS_VMLSL = 319;; let _ARM_INS_VMOVL = 320;; let _ARM_INS_VMOVN = 321;; let _ARM_INS_VMSR = 322;; let _ARM_INS_VMUL = 323;; let _ARM_INS_VMULL = 324;; let _ARM_INS_VMVN = 325;; let _ARM_INS_VNEG = 326;; let _ARM_INS_VNMLA = 327;; let _ARM_INS_VNMLS = 328;; let _ARM_INS_VNMUL = 329;; let _ARM_INS_VORN = 330;; let _ARM_INS_VORR = 331;; let _ARM_INS_VPADAL = 332;; let _ARM_INS_VPADDL = 333;; let _ARM_INS_VPADD = 334;; let _ARM_INS_VPMAX = 335;; let _ARM_INS_VPMIN = 336;; let _ARM_INS_VQABS = 337;; let _ARM_INS_VQADD = 338;; let _ARM_INS_VQDMLAL = 339;; let _ARM_INS_VQDMLSL = 340;; let _ARM_INS_VQDMULH = 341;; let _ARM_INS_VQDMULL = 342;; let _ARM_INS_VQMOVUN = 343;; let _ARM_INS_VQMOVN = 344;; let _ARM_INS_VQNEG = 345;; let _ARM_INS_VQRDMULH = 346;; let _ARM_INS_VQRSHL = 347;; let _ARM_INS_VQRSHRN = 348;; let _ARM_INS_VQRSHRUN = 349;; let _ARM_INS_VQSHL = 350;; let _ARM_INS_VQSHLU = 351;; let _ARM_INS_VQSHRN = 352;; let _ARM_INS_VQSHRUN = 353;; let _ARM_INS_VQSUB = 354;; let _ARM_INS_VRADDHN = 355;; let _ARM_INS_VRECPE = 356;; let _ARM_INS_VRECPS = 357;; let _ARM_INS_VREV16 = 358;; let _ARM_INS_VREV32 = 359;; let _ARM_INS_VREV64 = 360;; let _ARM_INS_VRHADD = 361;; let _ARM_INS_VRINTA = 362;; let _ARM_INS_VRINTM = 363;; let _ARM_INS_VRINTN = 364;; let _ARM_INS_VRINTP = 365;; let _ARM_INS_VRINTR = 366;; let _ARM_INS_VRINTX = 367;; let _ARM_INS_VRINTZ = 368;; let _ARM_INS_VRSHL = 369;; let _ARM_INS_VRSHRN = 370;; let _ARM_INS_VRSHR = 371;; let _ARM_INS_VRSQRTE = 372;; let _ARM_INS_VRSQRTS = 373;; let _ARM_INS_VRSRA = 374;; let _ARM_INS_VRSUBHN = 375;; let _ARM_INS_VSELEQ = 376;; let _ARM_INS_VSELGE = 377;; let _ARM_INS_VSELGT = 378;; let _ARM_INS_VSELVS = 379;; let _ARM_INS_VSHLL = 380;; let _ARM_INS_VSHL = 381;; let _ARM_INS_VSHRN = 382;; let _ARM_INS_VSHR = 383;; let _ARM_INS_VSLI = 384;; let _ARM_INS_VSQRT = 385;; let _ARM_INS_VSRA = 386;; let _ARM_INS_VSRI = 387;; let _ARM_INS_VST1 = 388;; let _ARM_INS_VST2 = 389;; let _ARM_INS_VST3 = 390;; let _ARM_INS_VST4 = 391;; let _ARM_INS_VSTMDB = 392;; let _ARM_INS_VSTMIA = 393;; let _ARM_INS_VSTR = 394;; let _ARM_INS_VSUB = 395;; let _ARM_INS_VSUBHN = 396;; let _ARM_INS_VSUBL = 397;; let _ARM_INS_VSUBW = 398;; let _ARM_INS_VSWP = 399;; let _ARM_INS_VTBL = 400;; let _ARM_INS_VTBX = 401;; let _ARM_INS_VCVTR = 402;; let _ARM_INS_VTRN = 403;; let _ARM_INS_VTST = 404;; let _ARM_INS_VUZP = 405;; let _ARM_INS_VZIP = 406;; let _ARM_INS_ADDW = 407;; let _ARM_INS_ASR = 408;; let _ARM_INS_DCPS1 = 409;; let _ARM_INS_DCPS2 = 410;; let _ARM_INS_DCPS3 = 411;; let _ARM_INS_IT = 412;; let _ARM_INS_LSL = 413;; let _ARM_INS_LSR = 414;; let _ARM_INS_ORN = 415;; let _ARM_INS_ROR = 416;; let _ARM_INS_RRX = 417;; let _ARM_INS_SUBW = 418;; let _ARM_INS_TBB = 419;; let _ARM_INS_TBH = 420;; let _ARM_INS_CBNZ = 421;; let _ARM_INS_CBZ = 422;; let _ARM_INS_POP = 423;; let _ARM_INS_PUSH = 424;; let _ARM_INS_NOP = 425;; let _ARM_INS_YIELD = 426;; let _ARM_INS_WFE = 427;; let _ARM_INS_WFI = 428;; let _ARM_INS_SEV = 429;; let _ARM_INS_SEVL = 430;; let _ARM_INS_VPUSH = 431;; let _ARM_INS_VPOP = 432;; let _ARM_INS_ENDING = 433;; let _ARM_GRP_INVALID = 0;; let _ARM_GRP_JUMP = 1;; let _ARM_GRP_CALL = 2;; let _ARM_GRP_INT = 4;; let _ARM_GRP_PRIVILEGE = 6;; let _ARM_GRP_BRANCH_RELATIVE = 7;; let _ARM_GRP_CRYPTO = 128;; let _ARM_GRP_DATABARRIER = 129;; let _ARM_GRP_DIVIDE = 130;; let _ARM_GRP_FPARMV8 = 131;; let _ARM_GRP_MULTPRO = 132;; let _ARM_GRP_NEON = 133;; let _ARM_GRP_T2EXTRACTPACK = 134;; let _ARM_GRP_THUMB2DSP = 135;; let _ARM_GRP_TRUSTZONE = 136;; let _ARM_GRP_V4T = 137;; let _ARM_GRP_V5T = 138;; let _ARM_GRP_V5TE = 139;; let _ARM_GRP_V6 = 140;; let _ARM_GRP_V6T2 = 141;; let _ARM_GRP_V7 = 142;; let _ARM_GRP_V8 = 143;; let _ARM_GRP_VFP2 = 144;; let _ARM_GRP_VFP3 = 145;; let _ARM_GRP_VFP4 = 146;; let _ARM_GRP_ARM = 147;; let _ARM_GRP_MCLASS = 148;; let _ARM_GRP_NOTMCLASS = 149;; let _ARM_GRP_THUMB = 150;; let _ARM_GRP_THUMB1ONLY = 151;; let _ARM_GRP_THUMB2 = 152;; let _ARM_GRP_PREV8 = 153;; let _ARM_GRP_FPVMLX = 154;; let _ARM_GRP_MULOPS = 155;; let _ARM_GRP_CRC = 156;; let _ARM_GRP_DPVFP = 157;; let _ARM_GRP_V6M = 158;; let _ARM_GRP_VIRTUALIZATION = 159;; let _ARM_GRP_ENDING = 160;; capstone-sys-0.11.0/capstone/bindings/ocaml/capstone.ml010066400017500001750000000163301363402546700213330ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Arm open Arm64 open Mips open Ppc open X86 open Sparc open Systemz open Xcore open M680x open Printf (* debug *) (* Hardware architectures *) type arch = | CS_ARCH_ARM | CS_ARCH_ARM64 | CS_ARCH_MIPS | CS_ARCH_X86 | CS_ARCH_PPC | CS_ARCH_SPARC | CS_ARCH_SYSZ | CS_ARCH_XCORE | CS_ARCH_M68K | CS_ARCH_TMS320C64X | CS_ARCH_M680X (* Hardware modes *) type mode = | CS_MODE_LITTLE_ENDIAN (* little-endian mode (default mode) *) | CS_MODE_ARM (* ARM mode *) | CS_MODE_16 (* 16-bit mode (for X86) *) | CS_MODE_32 (* 32-bit mode (for X86) *) | CS_MODE_64 (* 64-bit mode (for X86, PPC) *) | CS_MODE_THUMB (* ARM's Thumb mode, including Thumb-2 *) | CS_MODE_MCLASS (* ARM's MClass mode *) | CS_MODE_V8 (* ARMv8 A32 encodings for ARM *) | CS_MODE_MICRO (* MicroMips mode (MIPS architecture) *) | CS_MODE_MIPS3 (* Mips3 mode (MIPS architecture) *) | CS_MODE_MIPS32R6 (* Mips32-R6 mode (MIPS architecture) *) | CS_MODE_MIPS2 (* Mips2 mode (MIPS architecture) *) | CS_MODE_V9 (* SparcV9 mode (Sparc architecture) *) | CS_MODE_BIG_ENDIAN (* big-endian mode *) | CS_MODE_MIPS32 (* Mips32 mode (for Mips) *) | CS_MODE_MIPS64 (* Mips64 mode (for Mips) *) | CS_MODE_QPX (* Quad Processing eXtensions mode (PowerPC) *) | CS_MODE_M680X_6301 (* M680X Hitachi 6301,6303 mode *) | CS_MODE_M680X_6309 (* M680X Hitachi 6309 mode *) | CS_MODE_M680X_6800 (* M680X Motorola 6800,6802 mode *) | CS_MODE_M680X_6801 (* M680X Motorola 6801,6803 mode *) | CS_MODE_M680X_6805 (* M680X Motorola 6805 mode *) | CS_MODE_M680X_6808 (* M680X Motorola 6808 mode *) | CS_MODE_M680X_6809 (* M680X Motorola 6809 mode *) | CS_MODE_M680X_6811 (* M680X Motorola/Freescale 68HC11 mode *) | CS_MODE_M680X_CPU12 (* M680X Motorola/Freescale/NXP CPU12 mode *) | CS_MODE_M680X_HCS08 (* M680X Freescale HCS08 mode *) (* Runtime option for the disassembled engine *) type opt_type = | CS_OPT_SYNTAX (* Asssembly output syntax *) | CS_OPT_DETAIL (* Break down instruction structure into details *) | CS_OPT_MODE (* Change engine's mode at run-time *) | CS_OPT_MEM (* User-defined dynamic memory related functions *) | CS_OPT_SKIPDATA (* Skip data when disassembling. Then engine is in SKIPDATA mode. *) | CS_OPT_SKIPDATA_SETUP (* Setup user-defined function for SKIPDATA option *) (* Common instruction operand access types - to be consistent across all architectures. *) (* It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE *) let _CS_AC_INVALID = 0;; (* Uninitialized/invalid access type. *) let _CS_AC_READ = 1 lsl 0;; (* Operand read from memory or register. *) let _CS_AC_WRITE = 1 lsl 1;; (* Operand write to memory or register. *) (* Runtime option value (associated with option type above) *) let _CS_OPT_OFF = 0L;; (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *) let _CS_OPT_ON = 3L;; (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *) let _CS_OPT_SYNTAX_DEFAULT = 0L;; (* Default asm syntax (CS_OPT_SYNTAX). *) let _CS_OPT_SYNTAX_INTEL = 1L;; (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *) let _CS_OPT_SYNTAX_ATT = 2L;; (* X86 ATT asm syntax (CS_OPT_SYNTAX). *) let _CS_OPT_SYNTAX_NOREGNAME = 3L;; (* Prints register name with only number (CS_OPT_SYNTAX) *) (* Common instruction operand types - to be consistent across all architectures. *) let _CS_OP_INVALID = 0;; (* uninitialized/invalid operand. *) let _CS_OP_REG = 1;; (* Register operand. *) let _CS_OP_IMM = 2;; (* Immediate operand. *) let _CS_OP_MEM = 3;; (* Memory operand. *) let _CS_OP_FP = 4;; (* Floating-Point operand. *) (* Common instruction groups - to be consistent across all architectures. *) let _CS_GRP_INVALID = 0;; (* uninitialized/invalid group. *) let _CS_GRP_JUMP = 1;; (* all jump instructions (conditional+direct+indirect jumps) *) let _CS_GRP_CALL = 2;; (* all call instructions *) let _CS_GRP_RET = 3;; (* all return instructions *) let _CS_GRP_INT = 4;; (* all interrupt instructions (int+syscall) *) let _CS_GRP_IRET = 5;; (* all interrupt return instructions *) let _CS_GRP_PRIVILEGE = 6;; (* all privileged instructions *) type cs_arch = | CS_INFO_ARM of cs_arm | CS_INFO_ARM64 of cs_arm64 | CS_INFO_MIPS of cs_mips | CS_INFO_X86 of cs_x86 | CS_INFO_PPC of cs_ppc | CS_INFO_SPARC of cs_sparc | CS_INFO_SYSZ of cs_sysz | CS_INFO_XCORE of cs_xcore | CS_INFO_M680X of cs_m680x type csh = { h: Int64.t; a: arch; } type cs_insn0 = { id: int; address: int; size: int; bytes: int array; mnemonic: string; op_str: string; regs_read: int array; regs_write: int array; groups: int array; arch: cs_arch; } external _cs_open: arch -> mode list -> Int64.t option = "ocaml_open" external cs_disasm_quick: arch -> mode list -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm" external _cs_disasm_internal: arch -> Int64.t -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm_internal" external _cs_reg_name: Int64.t -> int -> string = "ocaml_register_name" external _cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name" external _cs_group_name: Int64.t -> int -> string = "ocaml_group_name" external cs_version: unit -> int = "ocaml_version" external _cs_option: Int64.t -> opt_type -> Int64.t -> int = "ocaml_option" external _cs_close: Int64.t -> int = "ocaml_close" let cs_open _arch _mode: csh = ( let _handle = _cs_open _arch _mode in ( match _handle with | None -> { h = 0L; a = _arch } | Some v -> { h = v; a = _arch } ); );; let cs_close handle = ( _cs_close handle.h; ) let cs_option handle opt value = ( _cs_option handle.h opt value; );; let cs_disasm handle code address count = ( _cs_disasm_internal handle.a handle.h code address count; );; let cs_reg_name handle id = ( _cs_reg_name handle.h id; );; let cs_insn_name handle id = ( _cs_insn_name handle.h id; );; let cs_group_name handle id = ( _cs_group_name handle.h id; );; class cs_insn c a = let csh = c in let (id, address, size, bytes, mnemonic, op_str, regs_read, regs_write, groups, arch) = (a.id, a.address, a.size, a.bytes, a.mnemonic, a.op_str, a.regs_read, a.regs_write, a.groups, a.arch) in object method id = id; method address = address; method size = size; method bytes = bytes; method mnemonic = mnemonic; method op_str = op_str; method regs_read = regs_read; method regs_write = regs_write; method groups = groups; method arch = arch; method reg_name id = _cs_reg_name csh.h id; method insn_name id = _cs_insn_name csh.h id; method group_name id = _cs_group_name csh.h id; end;; let cs_insn_group handle insn group_id = List.exists (fun g -> g == group_id) (Array.to_list insn.groups);; let cs_reg_read handle insn reg_id = List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_read);; let cs_reg_write handle insn reg_id = List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_write);; class cs a m = let mode = m and arch = a in let handle = cs_open arch mode in object method disasm code offset count = let insns = (_cs_disasm_internal arch handle.h code offset count) in List.map (fun x -> new cs_insn handle x) insns; end;; capstone-sys-0.11.0/capstone/bindings/ocaml/evm_const.ml010066400017500001750000000100271363402546700215110ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.ml] *) let _EVM_INS_STOP = 0;; let _EVM_INS_ADD = 1;; let _EVM_INS_MUL = 2;; let _EVM_INS_SUB = 3;; let _EVM_INS_DIV = 4;; let _EVM_INS_SDIV = 5;; let _EVM_INS_MOD = 6;; let _EVM_INS_SMOD = 7;; let _EVM_INS_ADDMOD = 8;; let _EVM_INS_MULMOD = 9;; let _EVM_INS_EXP = 10;; let _EVM_INS_SIGNEXTEND = 11;; let _EVM_INS_LT = 16;; let _EVM_INS_GT = 17;; let _EVM_INS_SLT = 18;; let _EVM_INS_SGT = 19;; let _EVM_INS_EQ = 20;; let _EVM_INS_ISZERO = 21;; let _EVM_INS_AND = 22;; let _EVM_INS_OR = 23;; let _EVM_INS_XOR = 24;; let _EVM_INS_NOT = 25;; let _EVM_INS_BYTE = 26;; let _EVM_INS_SHA3 = 32;; let _EVM_INS_ADDRESS = 48;; let _EVM_INS_BALANCE = 49;; let _EVM_INS_ORIGIN = 50;; let _EVM_INS_CALLER = 51;; let _EVM_INS_CALLVALUE = 52;; let _EVM_INS_CALLDATALOAD = 53;; let _EVM_INS_CALLDATASIZE = 54;; let _EVM_INS_CALLDATACOPY = 55;; let _EVM_INS_CODESIZE = 56;; let _EVM_INS_CODECOPY = 57;; let _EVM_INS_GASPRICE = 58;; let _EVM_INS_EXTCODESIZE = 59;; let _EVM_INS_EXTCODECOPY = 60;; let _EVM_INS_RETURNDATASIZE = 61;; let _EVM_INS_RETURNDATACOPY = 62;; let _EVM_INS_BLOCKHASH = 64;; let _EVM_INS_COINBASE = 65;; let _EVM_INS_TIMESTAMP = 66;; let _EVM_INS_NUMBER = 67;; let _EVM_INS_DIFFICULTY = 68;; let _EVM_INS_GASLIMIT = 69;; let _EVM_INS_POP = 80;; let _EVM_INS_MLOAD = 81;; let _EVM_INS_MSTORE = 82;; let _EVM_INS_MSTORE8 = 83;; let _EVM_INS_SLOAD = 84;; let _EVM_INS_SSTORE = 85;; let _EVM_INS_JUMP = 86;; let _EVM_INS_JUMPI = 87;; let _EVM_INS_PC = 88;; let _EVM_INS_MSIZE = 89;; let _EVM_INS_GAS = 90;; let _EVM_INS_JUMPDEST = 91;; let _EVM_INS_PUSH1 = 96;; let _EVM_INS_PUSH2 = 97;; let _EVM_INS_PUSH3 = 98;; let _EVM_INS_PUSH4 = 99;; let _EVM_INS_PUSH5 = 100;; let _EVM_INS_PUSH6 = 101;; let _EVM_INS_PUSH7 = 102;; let _EVM_INS_PUSH8 = 103;; let _EVM_INS_PUSH9 = 104;; let _EVM_INS_PUSH10 = 105;; let _EVM_INS_PUSH11 = 106;; let _EVM_INS_PUSH12 = 107;; let _EVM_INS_PUSH13 = 108;; let _EVM_INS_PUSH14 = 109;; let _EVM_INS_PUSH15 = 110;; let _EVM_INS_PUSH16 = 111;; let _EVM_INS_PUSH17 = 112;; let _EVM_INS_PUSH18 = 113;; let _EVM_INS_PUSH19 = 114;; let _EVM_INS_PUSH20 = 115;; let _EVM_INS_PUSH21 = 116;; let _EVM_INS_PUSH22 = 117;; let _EVM_INS_PUSH23 = 118;; let _EVM_INS_PUSH24 = 119;; let _EVM_INS_PUSH25 = 120;; let _EVM_INS_PUSH26 = 121;; let _EVM_INS_PUSH27 = 122;; let _EVM_INS_PUSH28 = 123;; let _EVM_INS_PUSH29 = 124;; let _EVM_INS_PUSH30 = 125;; let _EVM_INS_PUSH31 = 126;; let _EVM_INS_PUSH32 = 127;; let _EVM_INS_DUP1 = 128;; let _EVM_INS_DUP2 = 129;; let _EVM_INS_DUP3 = 130;; let _EVM_INS_DUP4 = 131;; let _EVM_INS_DUP5 = 132;; let _EVM_INS_DUP6 = 133;; let _EVM_INS_DUP7 = 134;; let _EVM_INS_DUP8 = 135;; let _EVM_INS_DUP9 = 136;; let _EVM_INS_DUP10 = 137;; let _EVM_INS_DUP11 = 138;; let _EVM_INS_DUP12 = 139;; let _EVM_INS_DUP13 = 140;; let _EVM_INS_DUP14 = 141;; let _EVM_INS_DUP15 = 142;; let _EVM_INS_DUP16 = 143;; let _EVM_INS_SWAP1 = 144;; let _EVM_INS_SWAP2 = 145;; let _EVM_INS_SWAP3 = 146;; let _EVM_INS_SWAP4 = 147;; let _EVM_INS_SWAP5 = 148;; let _EVM_INS_SWAP6 = 149;; let _EVM_INS_SWAP7 = 150;; let _EVM_INS_SWAP8 = 151;; let _EVM_INS_SWAP9 = 152;; let _EVM_INS_SWAP10 = 153;; let _EVM_INS_SWAP11 = 154;; let _EVM_INS_SWAP12 = 155;; let _EVM_INS_SWAP13 = 156;; let _EVM_INS_SWAP14 = 157;; let _EVM_INS_SWAP15 = 158;; let _EVM_INS_SWAP16 = 159;; let _EVM_INS_LOG0 = 160;; let _EVM_INS_LOG1 = 161;; let _EVM_INS_LOG2 = 162;; let _EVM_INS_LOG3 = 163;; let _EVM_INS_LOG4 = 164;; let _EVM_INS_CREATE = 240;; let _EVM_INS_CALL = 241;; let _EVM_INS_CALLCODE = 242;; let _EVM_INS_RETURN = 243;; let _EVM_INS_DELEGATECALL = 244;; let _EVM_INS_CALLBLACKBOX = 245;; let _EVM_INS_STATICCALL = 250;; let _EVM_INS_REVERT = 253;; let _EVM_INS_SUICIDE = 255;; let _EVM_INS_INVALID = 512;; let _EVM_INS_ENDING = 513;; let _EVM_GRP_INVALID = 0;; let _EVM_GRP_JUMP = 1;; let _EVM_GRP_MATH = 8;; let _EVM_GRP_STACK_WRITE = 9;; let _EVM_GRP_STACK_READ = 10;; let _EVM_GRP_MEM_WRITE = 11;; let _EVM_GRP_MEM_READ = 12;; let _EVM_GRP_STORE_WRITE = 13;; let _EVM_GRP_STORE_READ = 14;; let _EVM_GRP_HALT = 15;; let _EVM_GRP_ENDING = 16;; capstone-sys-0.11.0/capstone/bindings/ocaml/m680x.ml010066400017500001750000000014761363402546700204060ustar0000000000000000(* Capstone Disassembly Engine * M680X Backend by Wolfgang Schwotzer 2017 *) open M680x_const (* architecture specific info of instruction *) type m680x_op_idx = { base_reg: int; offset_reg: int; offset: int; offset_addr: int; offset_bits: int; inc_dec: int; flags: int; } type m680x_op_rel = { addr_rel: int; offset: int; } type m680x_op_ext = { addr_ext: int; indirect: bool; } type m680x_op_value = | M680X_OP_INVALID of int | M680X_OP_IMMEDIATE of int | M680X_OP_REGISTER of int | M680X_OP_INDEXED of m680x_op_idx | M680X_OP_RELATIVE of m680x_op_rel | M680X_OP_EXTENDED of m680x_op_ext | M680X_OP_DIRECT of int | M680X_OP_CONSTANT of int type m680x_op = { value: m680x_op_value; size: int; access: int; } type cs_m680x = { flags: int; operands: m680x_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/m680x_const.ml010066400017500001750000000260131363402546700216060ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m680x_const.ml] *) let _M680X_OPERAND_COUNT = 9;; let _M680X_REG_INVALID = 0;; let _M680X_REG_A = 1;; let _M680X_REG_B = 2;; let _M680X_REG_E = 3;; let _M680X_REG_F = 4;; let _M680X_REG_0 = 5;; let _M680X_REG_D = 6;; let _M680X_REG_W = 7;; let _M680X_REG_CC = 8;; let _M680X_REG_DP = 9;; let _M680X_REG_MD = 10;; let _M680X_REG_HX = 11;; let _M680X_REG_H = 12;; let _M680X_REG_X = 13;; let _M680X_REG_Y = 14;; let _M680X_REG_S = 15;; let _M680X_REG_U = 16;; let _M680X_REG_V = 17;; let _M680X_REG_Q = 18;; let _M680X_REG_PC = 19;; let _M680X_REG_TMP2 = 20;; let _M680X_REG_TMP3 = 21;; let _M680X_REG_ENDING = 22;; let _M680X_OP_INVALID = 0;; let _M680X_OP_REGISTER = 1;; let _M680X_OP_IMMEDIATE = 2;; let _M680X_OP_INDEXED = 3;; let _M680X_OP_EXTENDED = 4;; let _M680X_OP_DIRECT = 5;; let _M680X_OP_RELATIVE = 6;; let _M680X_OP_CONSTANT = 7;; let _M680X_OFFSET_NONE = 0;; let _M680X_OFFSET_BITS_5 = 5;; let _M680X_OFFSET_BITS_8 = 8;; let _M680X_OFFSET_BITS_9 = 9;; let _M680X_OFFSET_BITS_16 = 16;; let _M680X_IDX_INDIRECT = 1;; let _M680X_IDX_NO_COMMA = 2;; let _M680X_IDX_POST_INC_DEC = 4;; let _M680X_GRP_INVALID = 0;; let _M680X_GRP_JUMP = 1;; let _M680X_GRP_CALL = 2;; let _M680X_GRP_RET = 3;; let _M680X_GRP_INT = 4;; let _M680X_GRP_IRET = 5;; let _M680X_GRP_PRIV = 6;; let _M680X_GRP_BRAREL = 7;; let _M680X_GRP_ENDING = 8;; let _M680X_FIRST_OP_IN_MNEM = 1;; let _M680X_SECOND_OP_IN_MNEM = 2;; let _M680X_INS_INVLD = 0;; let _M680X_INS_ABA = 1;; let _M680X_INS_ABX = 2;; let _M680X_INS_ABY = 3;; let _M680X_INS_ADC = 4;; let _M680X_INS_ADCA = 5;; let _M680X_INS_ADCB = 6;; let _M680X_INS_ADCD = 7;; let _M680X_INS_ADCR = 8;; let _M680X_INS_ADD = 9;; let _M680X_INS_ADDA = 10;; let _M680X_INS_ADDB = 11;; let _M680X_INS_ADDD = 12;; let _M680X_INS_ADDE = 13;; let _M680X_INS_ADDF = 14;; let _M680X_INS_ADDR = 15;; let _M680X_INS_ADDW = 16;; let _M680X_INS_AIM = 17;; let _M680X_INS_AIS = 18;; let _M680X_INS_AIX = 19;; let _M680X_INS_AND = 20;; let _M680X_INS_ANDA = 21;; let _M680X_INS_ANDB = 22;; let _M680X_INS_ANDCC = 23;; let _M680X_INS_ANDD = 24;; let _M680X_INS_ANDR = 25;; let _M680X_INS_ASL = 26;; let _M680X_INS_ASLA = 27;; let _M680X_INS_ASLB = 28;; let _M680X_INS_ASLD = 29;; let _M680X_INS_ASR = 30;; let _M680X_INS_ASRA = 31;; let _M680X_INS_ASRB = 32;; let _M680X_INS_ASRD = 33;; let _M680X_INS_ASRX = 34;; let _M680X_INS_BAND = 35;; let _M680X_INS_BCC = 36;; let _M680X_INS_BCLR = 37;; let _M680X_INS_BCS = 38;; let _M680X_INS_BEOR = 39;; let _M680X_INS_BEQ = 40;; let _M680X_INS_BGE = 41;; let _M680X_INS_BGND = 42;; let _M680X_INS_BGT = 43;; let _M680X_INS_BHCC = 44;; let _M680X_INS_BHCS = 45;; let _M680X_INS_BHI = 46;; let _M680X_INS_BIAND = 47;; let _M680X_INS_BIEOR = 48;; let _M680X_INS_BIH = 49;; let _M680X_INS_BIL = 50;; let _M680X_INS_BIOR = 51;; let _M680X_INS_BIT = 52;; let _M680X_INS_BITA = 53;; let _M680X_INS_BITB = 54;; let _M680X_INS_BITD = 55;; let _M680X_INS_BITMD = 56;; let _M680X_INS_BLE = 57;; let _M680X_INS_BLS = 58;; let _M680X_INS_BLT = 59;; let _M680X_INS_BMC = 60;; let _M680X_INS_BMI = 61;; let _M680X_INS_BMS = 62;; let _M680X_INS_BNE = 63;; let _M680X_INS_BOR = 64;; let _M680X_INS_BPL = 65;; let _M680X_INS_BRCLR = 66;; let _M680X_INS_BRSET = 67;; let _M680X_INS_BRA = 68;; let _M680X_INS_BRN = 69;; let _M680X_INS_BSET = 70;; let _M680X_INS_BSR = 71;; let _M680X_INS_BVC = 72;; let _M680X_INS_BVS = 73;; let _M680X_INS_CALL = 74;; let _M680X_INS_CBA = 75;; let _M680X_INS_CBEQ = 76;; let _M680X_INS_CBEQA = 77;; let _M680X_INS_CBEQX = 78;; let _M680X_INS_CLC = 79;; let _M680X_INS_CLI = 80;; let _M680X_INS_CLR = 81;; let _M680X_INS_CLRA = 82;; let _M680X_INS_CLRB = 83;; let _M680X_INS_CLRD = 84;; let _M680X_INS_CLRE = 85;; let _M680X_INS_CLRF = 86;; let _M680X_INS_CLRH = 87;; let _M680X_INS_CLRW = 88;; let _M680X_INS_CLRX = 89;; let _M680X_INS_CLV = 90;; let _M680X_INS_CMP = 91;; let _M680X_INS_CMPA = 92;; let _M680X_INS_CMPB = 93;; let _M680X_INS_CMPD = 94;; let _M680X_INS_CMPE = 95;; let _M680X_INS_CMPF = 96;; let _M680X_INS_CMPR = 97;; let _M680X_INS_CMPS = 98;; let _M680X_INS_CMPU = 99;; let _M680X_INS_CMPW = 100;; let _M680X_INS_CMPX = 101;; let _M680X_INS_CMPY = 102;; let _M680X_INS_COM = 103;; let _M680X_INS_COMA = 104;; let _M680X_INS_COMB = 105;; let _M680X_INS_COMD = 106;; let _M680X_INS_COME = 107;; let _M680X_INS_COMF = 108;; let _M680X_INS_COMW = 109;; let _M680X_INS_COMX = 110;; let _M680X_INS_CPD = 111;; let _M680X_INS_CPHX = 112;; let _M680X_INS_CPS = 113;; let _M680X_INS_CPX = 114;; let _M680X_INS_CPY = 115;; let _M680X_INS_CWAI = 116;; let _M680X_INS_DAA = 117;; let _M680X_INS_DBEQ = 118;; let _M680X_INS_DBNE = 119;; let _M680X_INS_DBNZ = 120;; let _M680X_INS_DBNZA = 121;; let _M680X_INS_DBNZX = 122;; let _M680X_INS_DEC = 123;; let _M680X_INS_DECA = 124;; let _M680X_INS_DECB = 125;; let _M680X_INS_DECD = 126;; let _M680X_INS_DECE = 127;; let _M680X_INS_DECF = 128;; let _M680X_INS_DECW = 129;; let _M680X_INS_DECX = 130;; let _M680X_INS_DES = 131;; let _M680X_INS_DEX = 132;; let _M680X_INS_DEY = 133;; let _M680X_INS_DIV = 134;; let _M680X_INS_DIVD = 135;; let _M680X_INS_DIVQ = 136;; let _M680X_INS_EDIV = 137;; let _M680X_INS_EDIVS = 138;; let _M680X_INS_EIM = 139;; let _M680X_INS_EMACS = 140;; let _M680X_INS_EMAXD = 141;; let _M680X_INS_EMAXM = 142;; let _M680X_INS_EMIND = 143;; let _M680X_INS_EMINM = 144;; let _M680X_INS_EMUL = 145;; let _M680X_INS_EMULS = 146;; let _M680X_INS_EOR = 147;; let _M680X_INS_EORA = 148;; let _M680X_INS_EORB = 149;; let _M680X_INS_EORD = 150;; let _M680X_INS_EORR = 151;; let _M680X_INS_ETBL = 152;; let _M680X_INS_EXG = 153;; let _M680X_INS_FDIV = 154;; let _M680X_INS_IBEQ = 155;; let _M680X_INS_IBNE = 156;; let _M680X_INS_IDIV = 157;; let _M680X_INS_IDIVS = 158;; let _M680X_INS_ILLGL = 159;; let _M680X_INS_INC = 160;; let _M680X_INS_INCA = 161;; let _M680X_INS_INCB = 162;; let _M680X_INS_INCD = 163;; let _M680X_INS_INCE = 164;; let _M680X_INS_INCF = 165;; let _M680X_INS_INCW = 166;; let _M680X_INS_INCX = 167;; let _M680X_INS_INS = 168;; let _M680X_INS_INX = 169;; let _M680X_INS_INY = 170;; let _M680X_INS_JMP = 171;; let _M680X_INS_JSR = 172;; let _M680X_INS_LBCC = 173;; let _M680X_INS_LBCS = 174;; let _M680X_INS_LBEQ = 175;; let _M680X_INS_LBGE = 176;; let _M680X_INS_LBGT = 177;; let _M680X_INS_LBHI = 178;; let _M680X_INS_LBLE = 179;; let _M680X_INS_LBLS = 180;; let _M680X_INS_LBLT = 181;; let _M680X_INS_LBMI = 182;; let _M680X_INS_LBNE = 183;; let _M680X_INS_LBPL = 184;; let _M680X_INS_LBRA = 185;; let _M680X_INS_LBRN = 186;; let _M680X_INS_LBSR = 187;; let _M680X_INS_LBVC = 188;; let _M680X_INS_LBVS = 189;; let _M680X_INS_LDA = 190;; let _M680X_INS_LDAA = 191;; let _M680X_INS_LDAB = 192;; let _M680X_INS_LDB = 193;; let _M680X_INS_LDBT = 194;; let _M680X_INS_LDD = 195;; let _M680X_INS_LDE = 196;; let _M680X_INS_LDF = 197;; let _M680X_INS_LDHX = 198;; let _M680X_INS_LDMD = 199;; let _M680X_INS_LDQ = 200;; let _M680X_INS_LDS = 201;; let _M680X_INS_LDU = 202;; let _M680X_INS_LDW = 203;; let _M680X_INS_LDX = 204;; let _M680X_INS_LDY = 205;; let _M680X_INS_LEAS = 206;; let _M680X_INS_LEAU = 207;; let _M680X_INS_LEAX = 208;; let _M680X_INS_LEAY = 209;; let _M680X_INS_LSL = 210;; let _M680X_INS_LSLA = 211;; let _M680X_INS_LSLB = 212;; let _M680X_INS_LSLD = 213;; let _M680X_INS_LSLX = 214;; let _M680X_INS_LSR = 215;; let _M680X_INS_LSRA = 216;; let _M680X_INS_LSRB = 217;; let _M680X_INS_LSRD = 218;; let _M680X_INS_LSRW = 219;; let _M680X_INS_LSRX = 220;; let _M680X_INS_MAXA = 221;; let _M680X_INS_MAXM = 222;; let _M680X_INS_MEM = 223;; let _M680X_INS_MINA = 224;; let _M680X_INS_MINM = 225;; let _M680X_INS_MOV = 226;; let _M680X_INS_MOVB = 227;; let _M680X_INS_MOVW = 228;; let _M680X_INS_MUL = 229;; let _M680X_INS_MULD = 230;; let _M680X_INS_NEG = 231;; let _M680X_INS_NEGA = 232;; let _M680X_INS_NEGB = 233;; let _M680X_INS_NEGD = 234;; let _M680X_INS_NEGX = 235;; let _M680X_INS_NOP = 236;; let _M680X_INS_NSA = 237;; let _M680X_INS_OIM = 238;; let _M680X_INS_ORA = 239;; let _M680X_INS_ORAA = 240;; let _M680X_INS_ORAB = 241;; let _M680X_INS_ORB = 242;; let _M680X_INS_ORCC = 243;; let _M680X_INS_ORD = 244;; let _M680X_INS_ORR = 245;; let _M680X_INS_PSHA = 246;; let _M680X_INS_PSHB = 247;; let _M680X_INS_PSHC = 248;; let _M680X_INS_PSHD = 249;; let _M680X_INS_PSHH = 250;; let _M680X_INS_PSHS = 251;; let _M680X_INS_PSHSW = 252;; let _M680X_INS_PSHU = 253;; let _M680X_INS_PSHUW = 254;; let _M680X_INS_PSHX = 255;; let _M680X_INS_PSHY = 256;; let _M680X_INS_PULA = 257;; let _M680X_INS_PULB = 258;; let _M680X_INS_PULC = 259;; let _M680X_INS_PULD = 260;; let _M680X_INS_PULH = 261;; let _M680X_INS_PULS = 262;; let _M680X_INS_PULSW = 263;; let _M680X_INS_PULU = 264;; let _M680X_INS_PULUW = 265;; let _M680X_INS_PULX = 266;; let _M680X_INS_PULY = 267;; let _M680X_INS_REV = 268;; let _M680X_INS_REVW = 269;; let _M680X_INS_ROL = 270;; let _M680X_INS_ROLA = 271;; let _M680X_INS_ROLB = 272;; let _M680X_INS_ROLD = 273;; let _M680X_INS_ROLW = 274;; let _M680X_INS_ROLX = 275;; let _M680X_INS_ROR = 276;; let _M680X_INS_RORA = 277;; let _M680X_INS_RORB = 278;; let _M680X_INS_RORD = 279;; let _M680X_INS_RORW = 280;; let _M680X_INS_RORX = 281;; let _M680X_INS_RSP = 282;; let _M680X_INS_RTC = 283;; let _M680X_INS_RTI = 284;; let _M680X_INS_RTS = 285;; let _M680X_INS_SBA = 286;; let _M680X_INS_SBC = 287;; let _M680X_INS_SBCA = 288;; let _M680X_INS_SBCB = 289;; let _M680X_INS_SBCD = 290;; let _M680X_INS_SBCR = 291;; let _M680X_INS_SEC = 292;; let _M680X_INS_SEI = 293;; let _M680X_INS_SEV = 294;; let _M680X_INS_SEX = 295;; let _M680X_INS_SEXW = 296;; let _M680X_INS_SLP = 297;; let _M680X_INS_STA = 298;; let _M680X_INS_STAA = 299;; let _M680X_INS_STAB = 300;; let _M680X_INS_STB = 301;; let _M680X_INS_STBT = 302;; let _M680X_INS_STD = 303;; let _M680X_INS_STE = 304;; let _M680X_INS_STF = 305;; let _M680X_INS_STOP = 306;; let _M680X_INS_STHX = 307;; let _M680X_INS_STQ = 308;; let _M680X_INS_STS = 309;; let _M680X_INS_STU = 310;; let _M680X_INS_STW = 311;; let _M680X_INS_STX = 312;; let _M680X_INS_STY = 313;; let _M680X_INS_SUB = 314;; let _M680X_INS_SUBA = 315;; let _M680X_INS_SUBB = 316;; let _M680X_INS_SUBD = 317;; let _M680X_INS_SUBE = 318;; let _M680X_INS_SUBF = 319;; let _M680X_INS_SUBR = 320;; let _M680X_INS_SUBW = 321;; let _M680X_INS_SWI = 322;; let _M680X_INS_SWI2 = 323;; let _M680X_INS_SWI3 = 324;; let _M680X_INS_SYNC = 325;; let _M680X_INS_TAB = 326;; let _M680X_INS_TAP = 327;; let _M680X_INS_TAX = 328;; let _M680X_INS_TBA = 329;; let _M680X_INS_TBEQ = 330;; let _M680X_INS_TBL = 331;; let _M680X_INS_TBNE = 332;; let _M680X_INS_TEST = 333;; let _M680X_INS_TFM = 334;; let _M680X_INS_TFR = 335;; let _M680X_INS_TIM = 336;; let _M680X_INS_TPA = 337;; let _M680X_INS_TST = 338;; let _M680X_INS_TSTA = 339;; let _M680X_INS_TSTB = 340;; let _M680X_INS_TSTD = 341;; let _M680X_INS_TSTE = 342;; let _M680X_INS_TSTF = 343;; let _M680X_INS_TSTW = 344;; let _M680X_INS_TSTX = 345;; let _M680X_INS_TSX = 346;; let _M680X_INS_TSY = 347;; let _M680X_INS_TXA = 348;; let _M680X_INS_TXS = 349;; let _M680X_INS_TYS = 350;; let _M680X_INS_WAI = 351;; let _M680X_INS_WAIT = 352;; let _M680X_INS_WAV = 353;; let _M680X_INS_WAVR = 354;; let _M680X_INS_XGDX = 355;; let _M680X_INS_XGDY = 356;; let _M680X_INS_ENDING = 357;; capstone-sys-0.11.0/capstone/bindings/ocaml/m68k_const.ml010066400017500001750000000317271363402546700215210ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.ml] *) let _M68K_OPERAND_COUNT = 4;; let _M68K_REG_INVALID = 0;; let _M68K_REG_D0 = 1;; let _M68K_REG_D1 = 2;; let _M68K_REG_D2 = 3;; let _M68K_REG_D3 = 4;; let _M68K_REG_D4 = 5;; let _M68K_REG_D5 = 6;; let _M68K_REG_D6 = 7;; let _M68K_REG_D7 = 8;; let _M68K_REG_A0 = 9;; let _M68K_REG_A1 = 10;; let _M68K_REG_A2 = 11;; let _M68K_REG_A3 = 12;; let _M68K_REG_A4 = 13;; let _M68K_REG_A5 = 14;; let _M68K_REG_A6 = 15;; let _M68K_REG_A7 = 16;; let _M68K_REG_FP0 = 17;; let _M68K_REG_FP1 = 18;; let _M68K_REG_FP2 = 19;; let _M68K_REG_FP3 = 20;; let _M68K_REG_FP4 = 21;; let _M68K_REG_FP5 = 22;; let _M68K_REG_FP6 = 23;; let _M68K_REG_FP7 = 24;; let _M68K_REG_PC = 25;; let _M68K_REG_SR = 26;; let _M68K_REG_CCR = 27;; let _M68K_REG_SFC = 28;; let _M68K_REG_DFC = 29;; let _M68K_REG_USP = 30;; let _M68K_REG_VBR = 31;; let _M68K_REG_CACR = 32;; let _M68K_REG_CAAR = 33;; let _M68K_REG_MSP = 34;; let _M68K_REG_ISP = 35;; let _M68K_REG_TC = 36;; let _M68K_REG_ITT0 = 37;; let _M68K_REG_ITT1 = 38;; let _M68K_REG_DTT0 = 39;; let _M68K_REG_DTT1 = 40;; let _M68K_REG_MMUSR = 41;; let _M68K_REG_URP = 42;; let _M68K_REG_SRP = 43;; let _M68K_REG_FPCR = 44;; let _M68K_REG_FPSR = 45;; let _M68K_REG_FPIAR = 46;; let _M68K_REG_ENDING = 47;; let _M68K_AM_NONE = 0;; let _M68K_AM_REG_DIRECT_DATA = 1;; let _M68K_AM_REG_DIRECT_ADDR = 2;; let _M68K_AM_REGI_ADDR = 3;; let _M68K_AM_REGI_ADDR_POST_INC = 4;; let _M68K_AM_REGI_ADDR_PRE_DEC = 5;; let _M68K_AM_REGI_ADDR_DISP = 6;; let _M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;; let _M68K_AM_AREGI_INDEX_BASE_DISP = 8;; let _M68K_AM_MEMI_POST_INDEX = 9;; let _M68K_AM_MEMI_PRE_INDEX = 10;; let _M68K_AM_PCI_DISP = 11;; let _M68K_AM_PCI_INDEX_8_BIT_DISP = 12;; let _M68K_AM_PCI_INDEX_BASE_DISP = 13;; let _M68K_AM_PC_MEMI_POST_INDEX = 14;; let _M68K_AM_PC_MEMI_PRE_INDEX = 15;; let _M68K_AM_ABSOLUTE_DATA_SHORT = 16;; let _M68K_AM_ABSOLUTE_DATA_LONG = 17;; let _M68K_AM_IMMEDIATE = 18;; let _M68K_AM_BRANCH_DISPLACEMENT = 19;; let _M68K_OP_INVALID = 0;; let _M68K_OP_REG = 1;; let _M68K_OP_IMM = 2;; let _M68K_OP_MEM = 3;; let _M68K_OP_FP_SINGLE = 4;; let _M68K_OP_FP_DOUBLE = 5;; let _M68K_OP_REG_BITS = 6;; let _M68K_OP_REG_PAIR = 7;; let _M68K_OP_BR_DISP = 8;; let _M68K_OP_BR_DISP_SIZE_INVALID = 0;; let _M68K_OP_BR_DISP_SIZE_BYTE = 1;; let _M68K_OP_BR_DISP_SIZE_WORD = 2;; let _M68K_OP_BR_DISP_SIZE_LONG = 4;; let _M68K_CPU_SIZE_NONE = 0;; let _M68K_CPU_SIZE_BYTE = 1;; let _M68K_CPU_SIZE_WORD = 2;; let _M68K_CPU_SIZE_LONG = 4;; let _M68K_FPU_SIZE_NONE = 0;; let _M68K_FPU_SIZE_SINGLE = 4;; let _M68K_FPU_SIZE_DOUBLE = 8;; let _M68K_FPU_SIZE_EXTENDED = 12;; let _M68K_SIZE_TYPE_INVALID = 0;; let _M68K_SIZE_TYPE_CPU = 1;; let _M68K_SIZE_TYPE_FPU = 2;; let _M68K_INS_INVALID = 0;; let _M68K_INS_ABCD = 1;; let _M68K_INS_ADD = 2;; let _M68K_INS_ADDA = 3;; let _M68K_INS_ADDI = 4;; let _M68K_INS_ADDQ = 5;; let _M68K_INS_ADDX = 6;; let _M68K_INS_AND = 7;; let _M68K_INS_ANDI = 8;; let _M68K_INS_ASL = 9;; let _M68K_INS_ASR = 10;; let _M68K_INS_BHS = 11;; let _M68K_INS_BLO = 12;; let _M68K_INS_BHI = 13;; let _M68K_INS_BLS = 14;; let _M68K_INS_BCC = 15;; let _M68K_INS_BCS = 16;; let _M68K_INS_BNE = 17;; let _M68K_INS_BEQ = 18;; let _M68K_INS_BVC = 19;; let _M68K_INS_BVS = 20;; let _M68K_INS_BPL = 21;; let _M68K_INS_BMI = 22;; let _M68K_INS_BGE = 23;; let _M68K_INS_BLT = 24;; let _M68K_INS_BGT = 25;; let _M68K_INS_BLE = 26;; let _M68K_INS_BRA = 27;; let _M68K_INS_BSR = 28;; let _M68K_INS_BCHG = 29;; let _M68K_INS_BCLR = 30;; let _M68K_INS_BSET = 31;; let _M68K_INS_BTST = 32;; let _M68K_INS_BFCHG = 33;; let _M68K_INS_BFCLR = 34;; let _M68K_INS_BFEXTS = 35;; let _M68K_INS_BFEXTU = 36;; let _M68K_INS_BFFFO = 37;; let _M68K_INS_BFINS = 38;; let _M68K_INS_BFSET = 39;; let _M68K_INS_BFTST = 40;; let _M68K_INS_BKPT = 41;; let _M68K_INS_CALLM = 42;; let _M68K_INS_CAS = 43;; let _M68K_INS_CAS2 = 44;; let _M68K_INS_CHK = 45;; let _M68K_INS_CHK2 = 46;; let _M68K_INS_CLR = 47;; let _M68K_INS_CMP = 48;; let _M68K_INS_CMPA = 49;; let _M68K_INS_CMPI = 50;; let _M68K_INS_CMPM = 51;; let _M68K_INS_CMP2 = 52;; let _M68K_INS_CINVL = 53;; let _M68K_INS_CINVP = 54;; let _M68K_INS_CINVA = 55;; let _M68K_INS_CPUSHL = 56;; let _M68K_INS_CPUSHP = 57;; let _M68K_INS_CPUSHA = 58;; let _M68K_INS_DBT = 59;; let _M68K_INS_DBF = 60;; let _M68K_INS_DBHI = 61;; let _M68K_INS_DBLS = 62;; let _M68K_INS_DBCC = 63;; let _M68K_INS_DBCS = 64;; let _M68K_INS_DBNE = 65;; let _M68K_INS_DBEQ = 66;; let _M68K_INS_DBVC = 67;; let _M68K_INS_DBVS = 68;; let _M68K_INS_DBPL = 69;; let _M68K_INS_DBMI = 70;; let _M68K_INS_DBGE = 71;; let _M68K_INS_DBLT = 72;; let _M68K_INS_DBGT = 73;; let _M68K_INS_DBLE = 74;; let _M68K_INS_DBRA = 75;; let _M68K_INS_DIVS = 76;; let _M68K_INS_DIVSL = 77;; let _M68K_INS_DIVU = 78;; let _M68K_INS_DIVUL = 79;; let _M68K_INS_EOR = 80;; let _M68K_INS_EORI = 81;; let _M68K_INS_EXG = 82;; let _M68K_INS_EXT = 83;; let _M68K_INS_EXTB = 84;; let _M68K_INS_FABS = 85;; let _M68K_INS_FSABS = 86;; let _M68K_INS_FDABS = 87;; let _M68K_INS_FACOS = 88;; let _M68K_INS_FADD = 89;; let _M68K_INS_FSADD = 90;; let _M68K_INS_FDADD = 91;; let _M68K_INS_FASIN = 92;; let _M68K_INS_FATAN = 93;; let _M68K_INS_FATANH = 94;; let _M68K_INS_FBF = 95;; let _M68K_INS_FBEQ = 96;; let _M68K_INS_FBOGT = 97;; let _M68K_INS_FBOGE = 98;; let _M68K_INS_FBOLT = 99;; let _M68K_INS_FBOLE = 100;; let _M68K_INS_FBOGL = 101;; let _M68K_INS_FBOR = 102;; let _M68K_INS_FBUN = 103;; let _M68K_INS_FBUEQ = 104;; let _M68K_INS_FBUGT = 105;; let _M68K_INS_FBUGE = 106;; let _M68K_INS_FBULT = 107;; let _M68K_INS_FBULE = 108;; let _M68K_INS_FBNE = 109;; let _M68K_INS_FBT = 110;; let _M68K_INS_FBSF = 111;; let _M68K_INS_FBSEQ = 112;; let _M68K_INS_FBGT = 113;; let _M68K_INS_FBGE = 114;; let _M68K_INS_FBLT = 115;; let _M68K_INS_FBLE = 116;; let _M68K_INS_FBGL = 117;; let _M68K_INS_FBGLE = 118;; let _M68K_INS_FBNGLE = 119;; let _M68K_INS_FBNGL = 120;; let _M68K_INS_FBNLE = 121;; let _M68K_INS_FBNLT = 122;; let _M68K_INS_FBNGE = 123;; let _M68K_INS_FBNGT = 124;; let _M68K_INS_FBSNE = 125;; let _M68K_INS_FBST = 126;; let _M68K_INS_FCMP = 127;; let _M68K_INS_FCOS = 128;; let _M68K_INS_FCOSH = 129;; let _M68K_INS_FDBF = 130;; let _M68K_INS_FDBEQ = 131;; let _M68K_INS_FDBOGT = 132;; let _M68K_INS_FDBOGE = 133;; let _M68K_INS_FDBOLT = 134;; let _M68K_INS_FDBOLE = 135;; let _M68K_INS_FDBOGL = 136;; let _M68K_INS_FDBOR = 137;; let _M68K_INS_FDBUN = 138;; let _M68K_INS_FDBUEQ = 139;; let _M68K_INS_FDBUGT = 140;; let _M68K_INS_FDBUGE = 141;; let _M68K_INS_FDBULT = 142;; let _M68K_INS_FDBULE = 143;; let _M68K_INS_FDBNE = 144;; let _M68K_INS_FDBT = 145;; let _M68K_INS_FDBSF = 146;; let _M68K_INS_FDBSEQ = 147;; let _M68K_INS_FDBGT = 148;; let _M68K_INS_FDBGE = 149;; let _M68K_INS_FDBLT = 150;; let _M68K_INS_FDBLE = 151;; let _M68K_INS_FDBGL = 152;; let _M68K_INS_FDBGLE = 153;; let _M68K_INS_FDBNGLE = 154;; let _M68K_INS_FDBNGL = 155;; let _M68K_INS_FDBNLE = 156;; let _M68K_INS_FDBNLT = 157;; let _M68K_INS_FDBNGE = 158;; let _M68K_INS_FDBNGT = 159;; let _M68K_INS_FDBSNE = 160;; let _M68K_INS_FDBST = 161;; let _M68K_INS_FDIV = 162;; let _M68K_INS_FSDIV = 163;; let _M68K_INS_FDDIV = 164;; let _M68K_INS_FETOX = 165;; let _M68K_INS_FETOXM1 = 166;; let _M68K_INS_FGETEXP = 167;; let _M68K_INS_FGETMAN = 168;; let _M68K_INS_FINT = 169;; let _M68K_INS_FINTRZ = 170;; let _M68K_INS_FLOG10 = 171;; let _M68K_INS_FLOG2 = 172;; let _M68K_INS_FLOGN = 173;; let _M68K_INS_FLOGNP1 = 174;; let _M68K_INS_FMOD = 175;; let _M68K_INS_FMOVE = 176;; let _M68K_INS_FSMOVE = 177;; let _M68K_INS_FDMOVE = 178;; let _M68K_INS_FMOVECR = 179;; let _M68K_INS_FMOVEM = 180;; let _M68K_INS_FMUL = 181;; let _M68K_INS_FSMUL = 182;; let _M68K_INS_FDMUL = 183;; let _M68K_INS_FNEG = 184;; let _M68K_INS_FSNEG = 185;; let _M68K_INS_FDNEG = 186;; let _M68K_INS_FNOP = 187;; let _M68K_INS_FREM = 188;; let _M68K_INS_FRESTORE = 189;; let _M68K_INS_FSAVE = 190;; let _M68K_INS_FSCALE = 191;; let _M68K_INS_FSGLDIV = 192;; let _M68K_INS_FSGLMUL = 193;; let _M68K_INS_FSIN = 194;; let _M68K_INS_FSINCOS = 195;; let _M68K_INS_FSINH = 196;; let _M68K_INS_FSQRT = 197;; let _M68K_INS_FSSQRT = 198;; let _M68K_INS_FDSQRT = 199;; let _M68K_INS_FSF = 200;; let _M68K_INS_FSBEQ = 201;; let _M68K_INS_FSOGT = 202;; let _M68K_INS_FSOGE = 203;; let _M68K_INS_FSOLT = 204;; let _M68K_INS_FSOLE = 205;; let _M68K_INS_FSOGL = 206;; let _M68K_INS_FSOR = 207;; let _M68K_INS_FSUN = 208;; let _M68K_INS_FSUEQ = 209;; let _M68K_INS_FSUGT = 210;; let _M68K_INS_FSUGE = 211;; let _M68K_INS_FSULT = 212;; let _M68K_INS_FSULE = 213;; let _M68K_INS_FSNE = 214;; let _M68K_INS_FST = 215;; let _M68K_INS_FSSF = 216;; let _M68K_INS_FSSEQ = 217;; let _M68K_INS_FSGT = 218;; let _M68K_INS_FSGE = 219;; let _M68K_INS_FSLT = 220;; let _M68K_INS_FSLE = 221;; let _M68K_INS_FSGL = 222;; let _M68K_INS_FSGLE = 223;; let _M68K_INS_FSNGLE = 224;; let _M68K_INS_FSNGL = 225;; let _M68K_INS_FSNLE = 226;; let _M68K_INS_FSNLT = 227;; let _M68K_INS_FSNGE = 228;; let _M68K_INS_FSNGT = 229;; let _M68K_INS_FSSNE = 230;; let _M68K_INS_FSST = 231;; let _M68K_INS_FSUB = 232;; let _M68K_INS_FSSUB = 233;; let _M68K_INS_FDSUB = 234;; let _M68K_INS_FTAN = 235;; let _M68K_INS_FTANH = 236;; let _M68K_INS_FTENTOX = 237;; let _M68K_INS_FTRAPF = 238;; let _M68K_INS_FTRAPEQ = 239;; let _M68K_INS_FTRAPOGT = 240;; let _M68K_INS_FTRAPOGE = 241;; let _M68K_INS_FTRAPOLT = 242;; let _M68K_INS_FTRAPOLE = 243;; let _M68K_INS_FTRAPOGL = 244;; let _M68K_INS_FTRAPOR = 245;; let _M68K_INS_FTRAPUN = 246;; let _M68K_INS_FTRAPUEQ = 247;; let _M68K_INS_FTRAPUGT = 248;; let _M68K_INS_FTRAPUGE = 249;; let _M68K_INS_FTRAPULT = 250;; let _M68K_INS_FTRAPULE = 251;; let _M68K_INS_FTRAPNE = 252;; let _M68K_INS_FTRAPT = 253;; let _M68K_INS_FTRAPSF = 254;; let _M68K_INS_FTRAPSEQ = 255;; let _M68K_INS_FTRAPGT = 256;; let _M68K_INS_FTRAPGE = 257;; let _M68K_INS_FTRAPLT = 258;; let _M68K_INS_FTRAPLE = 259;; let _M68K_INS_FTRAPGL = 260;; let _M68K_INS_FTRAPGLE = 261;; let _M68K_INS_FTRAPNGLE = 262;; let _M68K_INS_FTRAPNGL = 263;; let _M68K_INS_FTRAPNLE = 264;; let _M68K_INS_FTRAPNLT = 265;; let _M68K_INS_FTRAPNGE = 266;; let _M68K_INS_FTRAPNGT = 267;; let _M68K_INS_FTRAPSNE = 268;; let _M68K_INS_FTRAPST = 269;; let _M68K_INS_FTST = 270;; let _M68K_INS_FTWOTOX = 271;; let _M68K_INS_HALT = 272;; let _M68K_INS_ILLEGAL = 273;; let _M68K_INS_JMP = 274;; let _M68K_INS_JSR = 275;; let _M68K_INS_LEA = 276;; let _M68K_INS_LINK = 277;; let _M68K_INS_LPSTOP = 278;; let _M68K_INS_LSL = 279;; let _M68K_INS_LSR = 280;; let _M68K_INS_MOVE = 281;; let _M68K_INS_MOVEA = 282;; let _M68K_INS_MOVEC = 283;; let _M68K_INS_MOVEM = 284;; let _M68K_INS_MOVEP = 285;; let _M68K_INS_MOVEQ = 286;; let _M68K_INS_MOVES = 287;; let _M68K_INS_MOVE16 = 288;; let _M68K_INS_MULS = 289;; let _M68K_INS_MULU = 290;; let _M68K_INS_NBCD = 291;; let _M68K_INS_NEG = 292;; let _M68K_INS_NEGX = 293;; let _M68K_INS_NOP = 294;; let _M68K_INS_NOT = 295;; let _M68K_INS_OR = 296;; let _M68K_INS_ORI = 297;; let _M68K_INS_PACK = 298;; let _M68K_INS_PEA = 299;; let _M68K_INS_PFLUSH = 300;; let _M68K_INS_PFLUSHA = 301;; let _M68K_INS_PFLUSHAN = 302;; let _M68K_INS_PFLUSHN = 303;; let _M68K_INS_PLOADR = 304;; let _M68K_INS_PLOADW = 305;; let _M68K_INS_PLPAR = 306;; let _M68K_INS_PLPAW = 307;; let _M68K_INS_PMOVE = 308;; let _M68K_INS_PMOVEFD = 309;; let _M68K_INS_PTESTR = 310;; let _M68K_INS_PTESTW = 311;; let _M68K_INS_PULSE = 312;; let _M68K_INS_REMS = 313;; let _M68K_INS_REMU = 314;; let _M68K_INS_RESET = 315;; let _M68K_INS_ROL = 316;; let _M68K_INS_ROR = 317;; let _M68K_INS_ROXL = 318;; let _M68K_INS_ROXR = 319;; let _M68K_INS_RTD = 320;; let _M68K_INS_RTE = 321;; let _M68K_INS_RTM = 322;; let _M68K_INS_RTR = 323;; let _M68K_INS_RTS = 324;; let _M68K_INS_SBCD = 325;; let _M68K_INS_ST = 326;; let _M68K_INS_SF = 327;; let _M68K_INS_SHI = 328;; let _M68K_INS_SLS = 329;; let _M68K_INS_SCC = 330;; let _M68K_INS_SHS = 331;; let _M68K_INS_SCS = 332;; let _M68K_INS_SLO = 333;; let _M68K_INS_SNE = 334;; let _M68K_INS_SEQ = 335;; let _M68K_INS_SVC = 336;; let _M68K_INS_SVS = 337;; let _M68K_INS_SPL = 338;; let _M68K_INS_SMI = 339;; let _M68K_INS_SGE = 340;; let _M68K_INS_SLT = 341;; let _M68K_INS_SGT = 342;; let _M68K_INS_SLE = 343;; let _M68K_INS_STOP = 344;; let _M68K_INS_SUB = 345;; let _M68K_INS_SUBA = 346;; let _M68K_INS_SUBI = 347;; let _M68K_INS_SUBQ = 348;; let _M68K_INS_SUBX = 349;; let _M68K_INS_SWAP = 350;; let _M68K_INS_TAS = 351;; let _M68K_INS_TRAP = 352;; let _M68K_INS_TRAPV = 353;; let _M68K_INS_TRAPT = 354;; let _M68K_INS_TRAPF = 355;; let _M68K_INS_TRAPHI = 356;; let _M68K_INS_TRAPLS = 357;; let _M68K_INS_TRAPCC = 358;; let _M68K_INS_TRAPHS = 359;; let _M68K_INS_TRAPCS = 360;; let _M68K_INS_TRAPLO = 361;; let _M68K_INS_TRAPNE = 362;; let _M68K_INS_TRAPEQ = 363;; let _M68K_INS_TRAPVC = 364;; let _M68K_INS_TRAPVS = 365;; let _M68K_INS_TRAPPL = 366;; let _M68K_INS_TRAPMI = 367;; let _M68K_INS_TRAPGE = 368;; let _M68K_INS_TRAPLT = 369;; let _M68K_INS_TRAPGT = 370;; let _M68K_INS_TRAPLE = 371;; let _M68K_INS_TST = 372;; let _M68K_INS_UNLK = 373;; let _M68K_INS_UNPK = 374;; let _M68K_INS_ENDING = 375;; let _M68K_GRP_INVALID = 0;; let _M68K_GRP_JUMP = 1;; let _M68K_GRP_RET = 3;; let _M68K_GRP_IRET = 5;; let _M68K_GRP_BRANCH_RELATIVE = 7;; let _M68K_GRP_ENDING = 8;; capstone-sys-0.11.0/capstone/bindings/ocaml/mips.ml010066400017500001750000000006321363402546700204650ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Mips_const (* architecture specific info of instruction *) type mips_op_mem = { base: int; disp: int } type mips_op_value = | MIPS_OP_INVALID of int | MIPS_OP_REG of int | MIPS_OP_IMM of int | MIPS_OP_MEM of mips_op_mem type mips_op = { value: mips_op_value; } type cs_mips = { operands: mips_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/mips_const.ml010066400017500001750000000562061363402546700217030ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.ml] *) let _MIPS_OP_INVALID = 0;; let _MIPS_OP_REG = 1;; let _MIPS_OP_IMM = 2;; let _MIPS_OP_MEM = 3;; let _MIPS_REG_INVALID = 0;; let _MIPS_REG_PC = 1;; let _MIPS_REG_0 = 2;; let _MIPS_REG_1 = 3;; let _MIPS_REG_2 = 4;; let _MIPS_REG_3 = 5;; let _MIPS_REG_4 = 6;; let _MIPS_REG_5 = 7;; let _MIPS_REG_6 = 8;; let _MIPS_REG_7 = 9;; let _MIPS_REG_8 = 10;; let _MIPS_REG_9 = 11;; let _MIPS_REG_10 = 12;; let _MIPS_REG_11 = 13;; let _MIPS_REG_12 = 14;; let _MIPS_REG_13 = 15;; let _MIPS_REG_14 = 16;; let _MIPS_REG_15 = 17;; let _MIPS_REG_16 = 18;; let _MIPS_REG_17 = 19;; let _MIPS_REG_18 = 20;; let _MIPS_REG_19 = 21;; let _MIPS_REG_20 = 22;; let _MIPS_REG_21 = 23;; let _MIPS_REG_22 = 24;; let _MIPS_REG_23 = 25;; let _MIPS_REG_24 = 26;; let _MIPS_REG_25 = 27;; let _MIPS_REG_26 = 28;; let _MIPS_REG_27 = 29;; let _MIPS_REG_28 = 30;; let _MIPS_REG_29 = 31;; let _MIPS_REG_30 = 32;; let _MIPS_REG_31 = 33;; let _MIPS_REG_DSPCCOND = 34;; let _MIPS_REG_DSPCARRY = 35;; let _MIPS_REG_DSPEFI = 36;; let _MIPS_REG_DSPOUTFLAG = 37;; let _MIPS_REG_DSPOUTFLAG16_19 = 38;; let _MIPS_REG_DSPOUTFLAG20 = 39;; let _MIPS_REG_DSPOUTFLAG21 = 40;; let _MIPS_REG_DSPOUTFLAG22 = 41;; let _MIPS_REG_DSPOUTFLAG23 = 42;; let _MIPS_REG_DSPPOS = 43;; let _MIPS_REG_DSPSCOUNT = 44;; let _MIPS_REG_AC0 = 45;; let _MIPS_REG_AC1 = 46;; let _MIPS_REG_AC2 = 47;; let _MIPS_REG_AC3 = 48;; let _MIPS_REG_CC0 = 49;; let _MIPS_REG_CC1 = 50;; let _MIPS_REG_CC2 = 51;; let _MIPS_REG_CC3 = 52;; let _MIPS_REG_CC4 = 53;; let _MIPS_REG_CC5 = 54;; let _MIPS_REG_CC6 = 55;; let _MIPS_REG_CC7 = 56;; let _MIPS_REG_F0 = 57;; let _MIPS_REG_F1 = 58;; let _MIPS_REG_F2 = 59;; let _MIPS_REG_F3 = 60;; let _MIPS_REG_F4 = 61;; let _MIPS_REG_F5 = 62;; let _MIPS_REG_F6 = 63;; let _MIPS_REG_F7 = 64;; let _MIPS_REG_F8 = 65;; let _MIPS_REG_F9 = 66;; let _MIPS_REG_F10 = 67;; let _MIPS_REG_F11 = 68;; let _MIPS_REG_F12 = 69;; let _MIPS_REG_F13 = 70;; let _MIPS_REG_F14 = 71;; let _MIPS_REG_F15 = 72;; let _MIPS_REG_F16 = 73;; let _MIPS_REG_F17 = 74;; let _MIPS_REG_F18 = 75;; let _MIPS_REG_F19 = 76;; let _MIPS_REG_F20 = 77;; let _MIPS_REG_F21 = 78;; let _MIPS_REG_F22 = 79;; let _MIPS_REG_F23 = 80;; let _MIPS_REG_F24 = 81;; let _MIPS_REG_F25 = 82;; let _MIPS_REG_F26 = 83;; let _MIPS_REG_F27 = 84;; let _MIPS_REG_F28 = 85;; let _MIPS_REG_F29 = 86;; let _MIPS_REG_F30 = 87;; let _MIPS_REG_F31 = 88;; let _MIPS_REG_FCC0 = 89;; let _MIPS_REG_FCC1 = 90;; let _MIPS_REG_FCC2 = 91;; let _MIPS_REG_FCC3 = 92;; let _MIPS_REG_FCC4 = 93;; let _MIPS_REG_FCC5 = 94;; let _MIPS_REG_FCC6 = 95;; let _MIPS_REG_FCC7 = 96;; let _MIPS_REG_W0 = 97;; let _MIPS_REG_W1 = 98;; let _MIPS_REG_W2 = 99;; let _MIPS_REG_W3 = 100;; let _MIPS_REG_W4 = 101;; let _MIPS_REG_W5 = 102;; let _MIPS_REG_W6 = 103;; let _MIPS_REG_W7 = 104;; let _MIPS_REG_W8 = 105;; let _MIPS_REG_W9 = 106;; let _MIPS_REG_W10 = 107;; let _MIPS_REG_W11 = 108;; let _MIPS_REG_W12 = 109;; let _MIPS_REG_W13 = 110;; let _MIPS_REG_W14 = 111;; let _MIPS_REG_W15 = 112;; let _MIPS_REG_W16 = 113;; let _MIPS_REG_W17 = 114;; let _MIPS_REG_W18 = 115;; let _MIPS_REG_W19 = 116;; let _MIPS_REG_W20 = 117;; let _MIPS_REG_W21 = 118;; let _MIPS_REG_W22 = 119;; let _MIPS_REG_W23 = 120;; let _MIPS_REG_W24 = 121;; let _MIPS_REG_W25 = 122;; let _MIPS_REG_W26 = 123;; let _MIPS_REG_W27 = 124;; let _MIPS_REG_W28 = 125;; let _MIPS_REG_W29 = 126;; let _MIPS_REG_W30 = 127;; let _MIPS_REG_W31 = 128;; let _MIPS_REG_HI = 129;; let _MIPS_REG_LO = 130;; let _MIPS_REG_P0 = 131;; let _MIPS_REG_P1 = 132;; let _MIPS_REG_P2 = 133;; let _MIPS_REG_MPL0 = 134;; let _MIPS_REG_MPL1 = 135;; let _MIPS_REG_MPL2 = 136;; let _MIPS_REG_ENDING = 137;; let _MIPS_REG_ZERO = _MIPS_REG_0;; let _MIPS_REG_AT = _MIPS_REG_1;; let _MIPS_REG_V0 = _MIPS_REG_2;; let _MIPS_REG_V1 = _MIPS_REG_3;; let _MIPS_REG_A0 = _MIPS_REG_4;; let _MIPS_REG_A1 = _MIPS_REG_5;; let _MIPS_REG_A2 = _MIPS_REG_6;; let _MIPS_REG_A3 = _MIPS_REG_7;; let _MIPS_REG_T0 = _MIPS_REG_8;; let _MIPS_REG_T1 = _MIPS_REG_9;; let _MIPS_REG_T2 = _MIPS_REG_10;; let _MIPS_REG_T3 = _MIPS_REG_11;; let _MIPS_REG_T4 = _MIPS_REG_12;; let _MIPS_REG_T5 = _MIPS_REG_13;; let _MIPS_REG_T6 = _MIPS_REG_14;; let _MIPS_REG_T7 = _MIPS_REG_15;; let _MIPS_REG_S0 = _MIPS_REG_16;; let _MIPS_REG_S1 = _MIPS_REG_17;; let _MIPS_REG_S2 = _MIPS_REG_18;; let _MIPS_REG_S3 = _MIPS_REG_19;; let _MIPS_REG_S4 = _MIPS_REG_20;; let _MIPS_REG_S5 = _MIPS_REG_21;; let _MIPS_REG_S6 = _MIPS_REG_22;; let _MIPS_REG_S7 = _MIPS_REG_23;; let _MIPS_REG_T8 = _MIPS_REG_24;; let _MIPS_REG_T9 = _MIPS_REG_25;; let _MIPS_REG_K0 = _MIPS_REG_26;; let _MIPS_REG_K1 = _MIPS_REG_27;; let _MIPS_REG_GP = _MIPS_REG_28;; let _MIPS_REG_SP = _MIPS_REG_29;; let _MIPS_REG_FP = _MIPS_REG_30;; let _MIPS_REG_S8 = _MIPS_REG_30;; let _MIPS_REG_RA = _MIPS_REG_31;; let _MIPS_REG_HI0 = _MIPS_REG_AC0;; let _MIPS_REG_HI1 = _MIPS_REG_AC1;; let _MIPS_REG_HI2 = _MIPS_REG_AC2;; let _MIPS_REG_HI3 = _MIPS_REG_AC3;; let _MIPS_REG_LO0 = _MIPS_REG_HI0;; let _MIPS_REG_LO1 = _MIPS_REG_HI1;; let _MIPS_REG_LO2 = _MIPS_REG_HI2;; let _MIPS_REG_LO3 = _MIPS_REG_HI3;; let _MIPS_INS_INVALID = 0;; let _MIPS_INS_ABSQ_S = 1;; let _MIPS_INS_ADD = 2;; let _MIPS_INS_ADDIUPC = 3;; let _MIPS_INS_ADDIUR1SP = 4;; let _MIPS_INS_ADDIUR2 = 5;; let _MIPS_INS_ADDIUS5 = 6;; let _MIPS_INS_ADDIUSP = 7;; let _MIPS_INS_ADDQH = 8;; let _MIPS_INS_ADDQH_R = 9;; let _MIPS_INS_ADDQ = 10;; let _MIPS_INS_ADDQ_S = 11;; let _MIPS_INS_ADDSC = 12;; let _MIPS_INS_ADDS_A = 13;; let _MIPS_INS_ADDS_S = 14;; let _MIPS_INS_ADDS_U = 15;; let _MIPS_INS_ADDU16 = 16;; let _MIPS_INS_ADDUH = 17;; let _MIPS_INS_ADDUH_R = 18;; let _MIPS_INS_ADDU = 19;; let _MIPS_INS_ADDU_S = 20;; let _MIPS_INS_ADDVI = 21;; let _MIPS_INS_ADDV = 22;; let _MIPS_INS_ADDWC = 23;; let _MIPS_INS_ADD_A = 24;; let _MIPS_INS_ADDI = 25;; let _MIPS_INS_ADDIU = 26;; let _MIPS_INS_ALIGN = 27;; let _MIPS_INS_ALUIPC = 28;; let _MIPS_INS_AND = 29;; let _MIPS_INS_AND16 = 30;; let _MIPS_INS_ANDI16 = 31;; let _MIPS_INS_ANDI = 32;; let _MIPS_INS_APPEND = 33;; let _MIPS_INS_ASUB_S = 34;; let _MIPS_INS_ASUB_U = 35;; let _MIPS_INS_AUI = 36;; let _MIPS_INS_AUIPC = 37;; let _MIPS_INS_AVER_S = 38;; let _MIPS_INS_AVER_U = 39;; let _MIPS_INS_AVE_S = 40;; let _MIPS_INS_AVE_U = 41;; let _MIPS_INS_B16 = 42;; let _MIPS_INS_BADDU = 43;; let _MIPS_INS_BAL = 44;; let _MIPS_INS_BALC = 45;; let _MIPS_INS_BALIGN = 46;; let _MIPS_INS_BBIT0 = 47;; let _MIPS_INS_BBIT032 = 48;; let _MIPS_INS_BBIT1 = 49;; let _MIPS_INS_BBIT132 = 50;; let _MIPS_INS_BC = 51;; let _MIPS_INS_BC0F = 52;; let _MIPS_INS_BC0FL = 53;; let _MIPS_INS_BC0T = 54;; let _MIPS_INS_BC0TL = 55;; let _MIPS_INS_BC1EQZ = 56;; let _MIPS_INS_BC1F = 57;; let _MIPS_INS_BC1FL = 58;; let _MIPS_INS_BC1NEZ = 59;; let _MIPS_INS_BC1T = 60;; let _MIPS_INS_BC1TL = 61;; let _MIPS_INS_BC2EQZ = 62;; let _MIPS_INS_BC2F = 63;; let _MIPS_INS_BC2FL = 64;; let _MIPS_INS_BC2NEZ = 65;; let _MIPS_INS_BC2T = 66;; let _MIPS_INS_BC2TL = 67;; let _MIPS_INS_BC3F = 68;; let _MIPS_INS_BC3FL = 69;; let _MIPS_INS_BC3T = 70;; let _MIPS_INS_BC3TL = 71;; let _MIPS_INS_BCLRI = 72;; let _MIPS_INS_BCLR = 73;; let _MIPS_INS_BEQ = 74;; let _MIPS_INS_BEQC = 75;; let _MIPS_INS_BEQL = 76;; let _MIPS_INS_BEQZ16 = 77;; let _MIPS_INS_BEQZALC = 78;; let _MIPS_INS_BEQZC = 79;; let _MIPS_INS_BGEC = 80;; let _MIPS_INS_BGEUC = 81;; let _MIPS_INS_BGEZ = 82;; let _MIPS_INS_BGEZAL = 83;; let _MIPS_INS_BGEZALC = 84;; let _MIPS_INS_BGEZALL = 85;; let _MIPS_INS_BGEZALS = 86;; let _MIPS_INS_BGEZC = 87;; let _MIPS_INS_BGEZL = 88;; let _MIPS_INS_BGTZ = 89;; let _MIPS_INS_BGTZALC = 90;; let _MIPS_INS_BGTZC = 91;; let _MIPS_INS_BGTZL = 92;; let _MIPS_INS_BINSLI = 93;; let _MIPS_INS_BINSL = 94;; let _MIPS_INS_BINSRI = 95;; let _MIPS_INS_BINSR = 96;; let _MIPS_INS_BITREV = 97;; let _MIPS_INS_BITSWAP = 98;; let _MIPS_INS_BLEZ = 99;; let _MIPS_INS_BLEZALC = 100;; let _MIPS_INS_BLEZC = 101;; let _MIPS_INS_BLEZL = 102;; let _MIPS_INS_BLTC = 103;; let _MIPS_INS_BLTUC = 104;; let _MIPS_INS_BLTZ = 105;; let _MIPS_INS_BLTZAL = 106;; let _MIPS_INS_BLTZALC = 107;; let _MIPS_INS_BLTZALL = 108;; let _MIPS_INS_BLTZALS = 109;; let _MIPS_INS_BLTZC = 110;; let _MIPS_INS_BLTZL = 111;; let _MIPS_INS_BMNZI = 112;; let _MIPS_INS_BMNZ = 113;; let _MIPS_INS_BMZI = 114;; let _MIPS_INS_BMZ = 115;; let _MIPS_INS_BNE = 116;; let _MIPS_INS_BNEC = 117;; let _MIPS_INS_BNEGI = 118;; let _MIPS_INS_BNEG = 119;; let _MIPS_INS_BNEL = 120;; let _MIPS_INS_BNEZ16 = 121;; let _MIPS_INS_BNEZALC = 122;; let _MIPS_INS_BNEZC = 123;; let _MIPS_INS_BNVC = 124;; let _MIPS_INS_BNZ = 125;; let _MIPS_INS_BOVC = 126;; let _MIPS_INS_BPOSGE32 = 127;; let _MIPS_INS_BREAK = 128;; let _MIPS_INS_BREAK16 = 129;; let _MIPS_INS_BSELI = 130;; let _MIPS_INS_BSEL = 131;; let _MIPS_INS_BSETI = 132;; let _MIPS_INS_BSET = 133;; let _MIPS_INS_BZ = 134;; let _MIPS_INS_BEQZ = 135;; let _MIPS_INS_B = 136;; let _MIPS_INS_BNEZ = 137;; let _MIPS_INS_BTEQZ = 138;; let _MIPS_INS_BTNEZ = 139;; let _MIPS_INS_CACHE = 140;; let _MIPS_INS_CEIL = 141;; let _MIPS_INS_CEQI = 142;; let _MIPS_INS_CEQ = 143;; let _MIPS_INS_CFC1 = 144;; let _MIPS_INS_CFCMSA = 145;; let _MIPS_INS_CINS = 146;; let _MIPS_INS_CINS32 = 147;; let _MIPS_INS_CLASS = 148;; let _MIPS_INS_CLEI_S = 149;; let _MIPS_INS_CLEI_U = 150;; let _MIPS_INS_CLE_S = 151;; let _MIPS_INS_CLE_U = 152;; let _MIPS_INS_CLO = 153;; let _MIPS_INS_CLTI_S = 154;; let _MIPS_INS_CLTI_U = 155;; let _MIPS_INS_CLT_S = 156;; let _MIPS_INS_CLT_U = 157;; let _MIPS_INS_CLZ = 158;; let _MIPS_INS_CMPGDU = 159;; let _MIPS_INS_CMPGU = 160;; let _MIPS_INS_CMPU = 161;; let _MIPS_INS_CMP = 162;; let _MIPS_INS_COPY_S = 163;; let _MIPS_INS_COPY_U = 164;; let _MIPS_INS_CTC1 = 165;; let _MIPS_INS_CTCMSA = 166;; let _MIPS_INS_CVT = 167;; let _MIPS_INS_C = 168;; let _MIPS_INS_CMPI = 169;; let _MIPS_INS_DADD = 170;; let _MIPS_INS_DADDI = 171;; let _MIPS_INS_DADDIU = 172;; let _MIPS_INS_DADDU = 173;; let _MIPS_INS_DAHI = 174;; let _MIPS_INS_DALIGN = 175;; let _MIPS_INS_DATI = 176;; let _MIPS_INS_DAUI = 177;; let _MIPS_INS_DBITSWAP = 178;; let _MIPS_INS_DCLO = 179;; let _MIPS_INS_DCLZ = 180;; let _MIPS_INS_DDIV = 181;; let _MIPS_INS_DDIVU = 182;; let _MIPS_INS_DERET = 183;; let _MIPS_INS_DEXT = 184;; let _MIPS_INS_DEXTM = 185;; let _MIPS_INS_DEXTU = 186;; let _MIPS_INS_DI = 187;; let _MIPS_INS_DINS = 188;; let _MIPS_INS_DINSM = 189;; let _MIPS_INS_DINSU = 190;; let _MIPS_INS_DIV = 191;; let _MIPS_INS_DIVU = 192;; let _MIPS_INS_DIV_S = 193;; let _MIPS_INS_DIV_U = 194;; let _MIPS_INS_DLSA = 195;; let _MIPS_INS_DMFC0 = 196;; let _MIPS_INS_DMFC1 = 197;; let _MIPS_INS_DMFC2 = 198;; let _MIPS_INS_DMOD = 199;; let _MIPS_INS_DMODU = 200;; let _MIPS_INS_DMTC0 = 201;; let _MIPS_INS_DMTC1 = 202;; let _MIPS_INS_DMTC2 = 203;; let _MIPS_INS_DMUH = 204;; let _MIPS_INS_DMUHU = 205;; let _MIPS_INS_DMUL = 206;; let _MIPS_INS_DMULT = 207;; let _MIPS_INS_DMULTU = 208;; let _MIPS_INS_DMULU = 209;; let _MIPS_INS_DOTP_S = 210;; let _MIPS_INS_DOTP_U = 211;; let _MIPS_INS_DPADD_S = 212;; let _MIPS_INS_DPADD_U = 213;; let _MIPS_INS_DPAQX_SA = 214;; let _MIPS_INS_DPAQX_S = 215;; let _MIPS_INS_DPAQ_SA = 216;; let _MIPS_INS_DPAQ_S = 217;; let _MIPS_INS_DPAU = 218;; let _MIPS_INS_DPAX = 219;; let _MIPS_INS_DPA = 220;; let _MIPS_INS_DPOP = 221;; let _MIPS_INS_DPSQX_SA = 222;; let _MIPS_INS_DPSQX_S = 223;; let _MIPS_INS_DPSQ_SA = 224;; let _MIPS_INS_DPSQ_S = 225;; let _MIPS_INS_DPSUB_S = 226;; let _MIPS_INS_DPSUB_U = 227;; let _MIPS_INS_DPSU = 228;; let _MIPS_INS_DPSX = 229;; let _MIPS_INS_DPS = 230;; let _MIPS_INS_DROTR = 231;; let _MIPS_INS_DROTR32 = 232;; let _MIPS_INS_DROTRV = 233;; let _MIPS_INS_DSBH = 234;; let _MIPS_INS_DSHD = 235;; let _MIPS_INS_DSLL = 236;; let _MIPS_INS_DSLL32 = 237;; let _MIPS_INS_DSLLV = 238;; let _MIPS_INS_DSRA = 239;; let _MIPS_INS_DSRA32 = 240;; let _MIPS_INS_DSRAV = 241;; let _MIPS_INS_DSRL = 242;; let _MIPS_INS_DSRL32 = 243;; let _MIPS_INS_DSRLV = 244;; let _MIPS_INS_DSUB = 245;; let _MIPS_INS_DSUBU = 246;; let _MIPS_INS_EHB = 247;; let _MIPS_INS_EI = 248;; let _MIPS_INS_ERET = 249;; let _MIPS_INS_EXT = 250;; let _MIPS_INS_EXTP = 251;; let _MIPS_INS_EXTPDP = 252;; let _MIPS_INS_EXTPDPV = 253;; let _MIPS_INS_EXTPV = 254;; let _MIPS_INS_EXTRV_RS = 255;; let _MIPS_INS_EXTRV_R = 256;; let _MIPS_INS_EXTRV_S = 257;; let _MIPS_INS_EXTRV = 258;; let _MIPS_INS_EXTR_RS = 259;; let _MIPS_INS_EXTR_R = 260;; let _MIPS_INS_EXTR_S = 261;; let _MIPS_INS_EXTR = 262;; let _MIPS_INS_EXTS = 263;; let _MIPS_INS_EXTS32 = 264;; let _MIPS_INS_ABS = 265;; let _MIPS_INS_FADD = 266;; let _MIPS_INS_FCAF = 267;; let _MIPS_INS_FCEQ = 268;; let _MIPS_INS_FCLASS = 269;; let _MIPS_INS_FCLE = 270;; let _MIPS_INS_FCLT = 271;; let _MIPS_INS_FCNE = 272;; let _MIPS_INS_FCOR = 273;; let _MIPS_INS_FCUEQ = 274;; let _MIPS_INS_FCULE = 275;; let _MIPS_INS_FCULT = 276;; let _MIPS_INS_FCUNE = 277;; let _MIPS_INS_FCUN = 278;; let _MIPS_INS_FDIV = 279;; let _MIPS_INS_FEXDO = 280;; let _MIPS_INS_FEXP2 = 281;; let _MIPS_INS_FEXUPL = 282;; let _MIPS_INS_FEXUPR = 283;; let _MIPS_INS_FFINT_S = 284;; let _MIPS_INS_FFINT_U = 285;; let _MIPS_INS_FFQL = 286;; let _MIPS_INS_FFQR = 287;; let _MIPS_INS_FILL = 288;; let _MIPS_INS_FLOG2 = 289;; let _MIPS_INS_FLOOR = 290;; let _MIPS_INS_FMADD = 291;; let _MIPS_INS_FMAX_A = 292;; let _MIPS_INS_FMAX = 293;; let _MIPS_INS_FMIN_A = 294;; let _MIPS_INS_FMIN = 295;; let _MIPS_INS_MOV = 296;; let _MIPS_INS_FMSUB = 297;; let _MIPS_INS_FMUL = 298;; let _MIPS_INS_MUL = 299;; let _MIPS_INS_NEG = 300;; let _MIPS_INS_FRCP = 301;; let _MIPS_INS_FRINT = 302;; let _MIPS_INS_FRSQRT = 303;; let _MIPS_INS_FSAF = 304;; let _MIPS_INS_FSEQ = 305;; let _MIPS_INS_FSLE = 306;; let _MIPS_INS_FSLT = 307;; let _MIPS_INS_FSNE = 308;; let _MIPS_INS_FSOR = 309;; let _MIPS_INS_FSQRT = 310;; let _MIPS_INS_SQRT = 311;; let _MIPS_INS_FSUB = 312;; let _MIPS_INS_SUB = 313;; let _MIPS_INS_FSUEQ = 314;; let _MIPS_INS_FSULE = 315;; let _MIPS_INS_FSULT = 316;; let _MIPS_INS_FSUNE = 317;; let _MIPS_INS_FSUN = 318;; let _MIPS_INS_FTINT_S = 319;; let _MIPS_INS_FTINT_U = 320;; let _MIPS_INS_FTQ = 321;; let _MIPS_INS_FTRUNC_S = 322;; let _MIPS_INS_FTRUNC_U = 323;; let _MIPS_INS_HADD_S = 324;; let _MIPS_INS_HADD_U = 325;; let _MIPS_INS_HSUB_S = 326;; let _MIPS_INS_HSUB_U = 327;; let _MIPS_INS_ILVEV = 328;; let _MIPS_INS_ILVL = 329;; let _MIPS_INS_ILVOD = 330;; let _MIPS_INS_ILVR = 331;; let _MIPS_INS_INS = 332;; let _MIPS_INS_INSERT = 333;; let _MIPS_INS_INSV = 334;; let _MIPS_INS_INSVE = 335;; let _MIPS_INS_J = 336;; let _MIPS_INS_JAL = 337;; let _MIPS_INS_JALR = 338;; let _MIPS_INS_JALRS16 = 339;; let _MIPS_INS_JALRS = 340;; let _MIPS_INS_JALS = 341;; let _MIPS_INS_JALX = 342;; let _MIPS_INS_JIALC = 343;; let _MIPS_INS_JIC = 344;; let _MIPS_INS_JR = 345;; let _MIPS_INS_JR16 = 346;; let _MIPS_INS_JRADDIUSP = 347;; let _MIPS_INS_JRC = 348;; let _MIPS_INS_JALRC = 349;; let _MIPS_INS_LB = 350;; let _MIPS_INS_LBU16 = 351;; let _MIPS_INS_LBUX = 352;; let _MIPS_INS_LBU = 353;; let _MIPS_INS_LD = 354;; let _MIPS_INS_LDC1 = 355;; let _MIPS_INS_LDC2 = 356;; let _MIPS_INS_LDC3 = 357;; let _MIPS_INS_LDI = 358;; let _MIPS_INS_LDL = 359;; let _MIPS_INS_LDPC = 360;; let _MIPS_INS_LDR = 361;; let _MIPS_INS_LDXC1 = 362;; let _MIPS_INS_LH = 363;; let _MIPS_INS_LHU16 = 364;; let _MIPS_INS_LHX = 365;; let _MIPS_INS_LHU = 366;; let _MIPS_INS_LI16 = 367;; let _MIPS_INS_LL = 368;; let _MIPS_INS_LLD = 369;; let _MIPS_INS_LSA = 370;; let _MIPS_INS_LUXC1 = 371;; let _MIPS_INS_LUI = 372;; let _MIPS_INS_LW = 373;; let _MIPS_INS_LW16 = 374;; let _MIPS_INS_LWC1 = 375;; let _MIPS_INS_LWC2 = 376;; let _MIPS_INS_LWC3 = 377;; let _MIPS_INS_LWL = 378;; let _MIPS_INS_LWM16 = 379;; let _MIPS_INS_LWM32 = 380;; let _MIPS_INS_LWPC = 381;; let _MIPS_INS_LWP = 382;; let _MIPS_INS_LWR = 383;; let _MIPS_INS_LWUPC = 384;; let _MIPS_INS_LWU = 385;; let _MIPS_INS_LWX = 386;; let _MIPS_INS_LWXC1 = 387;; let _MIPS_INS_LWXS = 388;; let _MIPS_INS_LI = 389;; let _MIPS_INS_MADD = 390;; let _MIPS_INS_MADDF = 391;; let _MIPS_INS_MADDR_Q = 392;; let _MIPS_INS_MADDU = 393;; let _MIPS_INS_MADDV = 394;; let _MIPS_INS_MADD_Q = 395;; let _MIPS_INS_MAQ_SA = 396;; let _MIPS_INS_MAQ_S = 397;; let _MIPS_INS_MAXA = 398;; let _MIPS_INS_MAXI_S = 399;; let _MIPS_INS_MAXI_U = 400;; let _MIPS_INS_MAX_A = 401;; let _MIPS_INS_MAX = 402;; let _MIPS_INS_MAX_S = 403;; let _MIPS_INS_MAX_U = 404;; let _MIPS_INS_MFC0 = 405;; let _MIPS_INS_MFC1 = 406;; let _MIPS_INS_MFC2 = 407;; let _MIPS_INS_MFHC1 = 408;; let _MIPS_INS_MFHI = 409;; let _MIPS_INS_MFLO = 410;; let _MIPS_INS_MINA = 411;; let _MIPS_INS_MINI_S = 412;; let _MIPS_INS_MINI_U = 413;; let _MIPS_INS_MIN_A = 414;; let _MIPS_INS_MIN = 415;; let _MIPS_INS_MIN_S = 416;; let _MIPS_INS_MIN_U = 417;; let _MIPS_INS_MOD = 418;; let _MIPS_INS_MODSUB = 419;; let _MIPS_INS_MODU = 420;; let _MIPS_INS_MOD_S = 421;; let _MIPS_INS_MOD_U = 422;; let _MIPS_INS_MOVE = 423;; let _MIPS_INS_MOVEP = 424;; let _MIPS_INS_MOVF = 425;; let _MIPS_INS_MOVN = 426;; let _MIPS_INS_MOVT = 427;; let _MIPS_INS_MOVZ = 428;; let _MIPS_INS_MSUB = 429;; let _MIPS_INS_MSUBF = 430;; let _MIPS_INS_MSUBR_Q = 431;; let _MIPS_INS_MSUBU = 432;; let _MIPS_INS_MSUBV = 433;; let _MIPS_INS_MSUB_Q = 434;; let _MIPS_INS_MTC0 = 435;; let _MIPS_INS_MTC1 = 436;; let _MIPS_INS_MTC2 = 437;; let _MIPS_INS_MTHC1 = 438;; let _MIPS_INS_MTHI = 439;; let _MIPS_INS_MTHLIP = 440;; let _MIPS_INS_MTLO = 441;; let _MIPS_INS_MTM0 = 442;; let _MIPS_INS_MTM1 = 443;; let _MIPS_INS_MTM2 = 444;; let _MIPS_INS_MTP0 = 445;; let _MIPS_INS_MTP1 = 446;; let _MIPS_INS_MTP2 = 447;; let _MIPS_INS_MUH = 448;; let _MIPS_INS_MUHU = 449;; let _MIPS_INS_MULEQ_S = 450;; let _MIPS_INS_MULEU_S = 451;; let _MIPS_INS_MULQ_RS = 452;; let _MIPS_INS_MULQ_S = 453;; let _MIPS_INS_MULR_Q = 454;; let _MIPS_INS_MULSAQ_S = 455;; let _MIPS_INS_MULSA = 456;; let _MIPS_INS_MULT = 457;; let _MIPS_INS_MULTU = 458;; let _MIPS_INS_MULU = 459;; let _MIPS_INS_MULV = 460;; let _MIPS_INS_MUL_Q = 461;; let _MIPS_INS_MUL_S = 462;; let _MIPS_INS_NLOC = 463;; let _MIPS_INS_NLZC = 464;; let _MIPS_INS_NMADD = 465;; let _MIPS_INS_NMSUB = 466;; let _MIPS_INS_NOR = 467;; let _MIPS_INS_NORI = 468;; let _MIPS_INS_NOT16 = 469;; let _MIPS_INS_NOT = 470;; let _MIPS_INS_OR = 471;; let _MIPS_INS_OR16 = 472;; let _MIPS_INS_ORI = 473;; let _MIPS_INS_PACKRL = 474;; let _MIPS_INS_PAUSE = 475;; let _MIPS_INS_PCKEV = 476;; let _MIPS_INS_PCKOD = 477;; let _MIPS_INS_PCNT = 478;; let _MIPS_INS_PICK = 479;; let _MIPS_INS_POP = 480;; let _MIPS_INS_PRECEQU = 481;; let _MIPS_INS_PRECEQ = 482;; let _MIPS_INS_PRECEU = 483;; let _MIPS_INS_PRECRQU_S = 484;; let _MIPS_INS_PRECRQ = 485;; let _MIPS_INS_PRECRQ_RS = 486;; let _MIPS_INS_PRECR = 487;; let _MIPS_INS_PRECR_SRA = 488;; let _MIPS_INS_PRECR_SRA_R = 489;; let _MIPS_INS_PREF = 490;; let _MIPS_INS_PREPEND = 491;; let _MIPS_INS_RADDU = 492;; let _MIPS_INS_RDDSP = 493;; let _MIPS_INS_RDHWR = 494;; let _MIPS_INS_REPLV = 495;; let _MIPS_INS_REPL = 496;; let _MIPS_INS_RINT = 497;; let _MIPS_INS_ROTR = 498;; let _MIPS_INS_ROTRV = 499;; let _MIPS_INS_ROUND = 500;; let _MIPS_INS_SAT_S = 501;; let _MIPS_INS_SAT_U = 502;; let _MIPS_INS_SB = 503;; let _MIPS_INS_SB16 = 504;; let _MIPS_INS_SC = 505;; let _MIPS_INS_SCD = 506;; let _MIPS_INS_SD = 507;; let _MIPS_INS_SDBBP = 508;; let _MIPS_INS_SDBBP16 = 509;; let _MIPS_INS_SDC1 = 510;; let _MIPS_INS_SDC2 = 511;; let _MIPS_INS_SDC3 = 512;; let _MIPS_INS_SDL = 513;; let _MIPS_INS_SDR = 514;; let _MIPS_INS_SDXC1 = 515;; let _MIPS_INS_SEB = 516;; let _MIPS_INS_SEH = 517;; let _MIPS_INS_SELEQZ = 518;; let _MIPS_INS_SELNEZ = 519;; let _MIPS_INS_SEL = 520;; let _MIPS_INS_SEQ = 521;; let _MIPS_INS_SEQI = 522;; let _MIPS_INS_SH = 523;; let _MIPS_INS_SH16 = 524;; let _MIPS_INS_SHF = 525;; let _MIPS_INS_SHILO = 526;; let _MIPS_INS_SHILOV = 527;; let _MIPS_INS_SHLLV = 528;; let _MIPS_INS_SHLLV_S = 529;; let _MIPS_INS_SHLL = 530;; let _MIPS_INS_SHLL_S = 531;; let _MIPS_INS_SHRAV = 532;; let _MIPS_INS_SHRAV_R = 533;; let _MIPS_INS_SHRA = 534;; let _MIPS_INS_SHRA_R = 535;; let _MIPS_INS_SHRLV = 536;; let _MIPS_INS_SHRL = 537;; let _MIPS_INS_SLDI = 538;; let _MIPS_INS_SLD = 539;; let _MIPS_INS_SLL = 540;; let _MIPS_INS_SLL16 = 541;; let _MIPS_INS_SLLI = 542;; let _MIPS_INS_SLLV = 543;; let _MIPS_INS_SLT = 544;; let _MIPS_INS_SLTI = 545;; let _MIPS_INS_SLTIU = 546;; let _MIPS_INS_SLTU = 547;; let _MIPS_INS_SNE = 548;; let _MIPS_INS_SNEI = 549;; let _MIPS_INS_SPLATI = 550;; let _MIPS_INS_SPLAT = 551;; let _MIPS_INS_SRA = 552;; let _MIPS_INS_SRAI = 553;; let _MIPS_INS_SRARI = 554;; let _MIPS_INS_SRAR = 555;; let _MIPS_INS_SRAV = 556;; let _MIPS_INS_SRL = 557;; let _MIPS_INS_SRL16 = 558;; let _MIPS_INS_SRLI = 559;; let _MIPS_INS_SRLRI = 560;; let _MIPS_INS_SRLR = 561;; let _MIPS_INS_SRLV = 562;; let _MIPS_INS_SSNOP = 563;; let _MIPS_INS_ST = 564;; let _MIPS_INS_SUBQH = 565;; let _MIPS_INS_SUBQH_R = 566;; let _MIPS_INS_SUBQ = 567;; let _MIPS_INS_SUBQ_S = 568;; let _MIPS_INS_SUBSUS_U = 569;; let _MIPS_INS_SUBSUU_S = 570;; let _MIPS_INS_SUBS_S = 571;; let _MIPS_INS_SUBS_U = 572;; let _MIPS_INS_SUBU16 = 573;; let _MIPS_INS_SUBUH = 574;; let _MIPS_INS_SUBUH_R = 575;; let _MIPS_INS_SUBU = 576;; let _MIPS_INS_SUBU_S = 577;; let _MIPS_INS_SUBVI = 578;; let _MIPS_INS_SUBV = 579;; let _MIPS_INS_SUXC1 = 580;; let _MIPS_INS_SW = 581;; let _MIPS_INS_SW16 = 582;; let _MIPS_INS_SWC1 = 583;; let _MIPS_INS_SWC2 = 584;; let _MIPS_INS_SWC3 = 585;; let _MIPS_INS_SWL = 586;; let _MIPS_INS_SWM16 = 587;; let _MIPS_INS_SWM32 = 588;; let _MIPS_INS_SWP = 589;; let _MIPS_INS_SWR = 590;; let _MIPS_INS_SWXC1 = 591;; let _MIPS_INS_SYNC = 592;; let _MIPS_INS_SYNCI = 593;; let _MIPS_INS_SYSCALL = 594;; let _MIPS_INS_TEQ = 595;; let _MIPS_INS_TEQI = 596;; let _MIPS_INS_TGE = 597;; let _MIPS_INS_TGEI = 598;; let _MIPS_INS_TGEIU = 599;; let _MIPS_INS_TGEU = 600;; let _MIPS_INS_TLBP = 601;; let _MIPS_INS_TLBR = 602;; let _MIPS_INS_TLBWI = 603;; let _MIPS_INS_TLBWR = 604;; let _MIPS_INS_TLT = 605;; let _MIPS_INS_TLTI = 606;; let _MIPS_INS_TLTIU = 607;; let _MIPS_INS_TLTU = 608;; let _MIPS_INS_TNE = 609;; let _MIPS_INS_TNEI = 610;; let _MIPS_INS_TRUNC = 611;; let _MIPS_INS_V3MULU = 612;; let _MIPS_INS_VMM0 = 613;; let _MIPS_INS_VMULU = 614;; let _MIPS_INS_VSHF = 615;; let _MIPS_INS_WAIT = 616;; let _MIPS_INS_WRDSP = 617;; let _MIPS_INS_WSBH = 618;; let _MIPS_INS_XOR = 619;; let _MIPS_INS_XOR16 = 620;; let _MIPS_INS_XORI = 621;; (* some alias instructions *) let _MIPS_INS_NOP = 622;; let _MIPS_INS_NEGU = 623;; (* special instructions *) let _MIPS_INS_JALR_HB = 624;; let _MIPS_INS_JR_HB = 625;; let _MIPS_INS_ENDING = 626;; let _MIPS_GRP_INVALID = 0;; let _MIPS_GRP_JUMP = 1;; let _MIPS_GRP_CALL = 2;; let _MIPS_GRP_RET = 3;; let _MIPS_GRP_INT = 4;; let _MIPS_GRP_IRET = 5;; let _MIPS_GRP_PRIVILEGE = 6;; let _MIPS_GRP_BRANCH_RELATIVE = 7;; let _MIPS_GRP_BITCOUNT = 128;; let _MIPS_GRP_DSP = 129;; let _MIPS_GRP_DSPR2 = 130;; let _MIPS_GRP_FPIDX = 131;; let _MIPS_GRP_MSA = 132;; let _MIPS_GRP_MIPS32R2 = 133;; let _MIPS_GRP_MIPS64 = 134;; let _MIPS_GRP_MIPS64R2 = 135;; let _MIPS_GRP_SEINREG = 136;; let _MIPS_GRP_STDENC = 137;; let _MIPS_GRP_SWAP = 138;; let _MIPS_GRP_MICROMIPS = 139;; let _MIPS_GRP_MIPS16MODE = 140;; let _MIPS_GRP_FP64BIT = 141;; let _MIPS_GRP_NONANSFPMATH = 142;; let _MIPS_GRP_NOTFP64BIT = 143;; let _MIPS_GRP_NOTINMICROMIPS = 144;; let _MIPS_GRP_NOTNACL = 145;; let _MIPS_GRP_NOTMIPS32R6 = 146;; let _MIPS_GRP_NOTMIPS64R6 = 147;; let _MIPS_GRP_CNMIPS = 148;; let _MIPS_GRP_MIPS32 = 149;; let _MIPS_GRP_MIPS32R6 = 150;; let _MIPS_GRP_MIPS64R6 = 151;; let _MIPS_GRP_MIPS2 = 152;; let _MIPS_GRP_MIPS3 = 153;; let _MIPS_GRP_MIPS3_32 = 154;; let _MIPS_GRP_MIPS3_32R2 = 155;; let _MIPS_GRP_MIPS4_32 = 156;; let _MIPS_GRP_MIPS4_32R2 = 157;; let _MIPS_GRP_MIPS5_32R2 = 158;; let _MIPS_GRP_GP32BIT = 159;; let _MIPS_GRP_GP64BIT = 160;; let _MIPS_GRP_ENDING = 161;; capstone-sys-0.11.0/capstone/bindings/ocaml/ocaml.c010066400017500001750000001003421363403403300204060ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013> */ #include // debug #include #include #include #include #include #include "capstone/capstone.h" #define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) // count the number of positive members in @list static unsigned int list_count(uint8_t *list, unsigned int max) { unsigned int i; for(i = 0; i < max; i++) if (list[i] == 0) return i; return max; } CAMLprim value _cs_disasm(cs_arch arch, csh handle, const uint8_t * code, size_t code_len, uint64_t addr, size_t count) { CAMLparam0(); CAMLlocal5(list, cons, rec_insn, array, tmp); CAMLlocal4(arch_info, op_info_val, tmp2, tmp3); cs_insn *insn; size_t c; list = Val_emptylist; c = cs_disasm(handle, code, code_len, addr, count, &insn); if (c) { //printf("Found %lu insn, addr: %lx\n", c, addr); uint64_t j; for (j = c; j > 0; j--) { unsigned int lcount, i; cons = caml_alloc(2, 0); rec_insn = caml_alloc(10, 0); Store_field(rec_insn, 0, Val_int(insn[j-1].id)); Store_field(rec_insn, 1, Val_int(insn[j-1].address)); Store_field(rec_insn, 2, Val_int(insn[j-1].size)); // copy raw bytes of instruction lcount = insn[j-1].size; if (lcount) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { Store_field(array, i, Val_int(insn[j-1].bytes[i])); } } else array = Atom(0); // empty list Store_field(rec_insn, 3, array); Store_field(rec_insn, 4, caml_copy_string(insn[j-1].mnemonic)); Store_field(rec_insn, 5, caml_copy_string(insn[j-1].op_str)); // copy read registers if (insn[0].detail) { lcount = (insn[j-1]).detail->regs_read_count; if (lcount) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { Store_field(array, i, Val_int(insn[j-1].detail->regs_read[i])); } } else array = Atom(0); // empty list } else array = Atom(0); // empty list Store_field(rec_insn, 6, array); if (insn[0].detail) { lcount = (insn[j-1]).detail->regs_write_count; if (lcount) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { Store_field(array, i, Val_int(insn[j-1].detail->regs_write[i])); } } else array = Atom(0); // empty list } else array = Atom(0); // empty list Store_field(rec_insn, 7, array); if (insn[0].detail) { lcount = (insn[j-1]).detail->groups_count; if (lcount) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { Store_field(array, i, Val_int(insn[j-1].detail->groups[i])); } } else array = Atom(0); // empty list } else array = Atom(0); // empty list Store_field(rec_insn, 8, array); if (insn[j-1].detail) { switch(arch) { case CS_ARCH_ARM: arch_info = caml_alloc(1, 0); op_info_val = caml_alloc(10, 0); Store_field(op_info_val, 0, Val_bool(insn[j-1].detail->arm.usermode)); Store_field(op_info_val, 1, Val_int(insn[j-1].detail->arm.vector_size)); Store_field(op_info_val, 2, Val_int(insn[j-1].detail->arm.vector_data)); Store_field(op_info_val, 3, Val_int(insn[j-1].detail->arm.cps_mode)); Store_field(op_info_val, 4, Val_int(insn[j-1].detail->arm.cps_flag)); Store_field(op_info_val, 5, Val_int(insn[j-1].detail->arm.cc)); Store_field(op_info_val, 6, Val_bool(insn[j-1].detail->arm.update_flags)); Store_field(op_info_val, 7, Val_bool(insn[j-1].detail->arm.writeback)); Store_field(op_info_val, 8, Val_int(insn[j-1].detail->arm.mem_barrier)); lcount = insn[j-1].detail->arm.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(6, 0); switch(insn[j-1].detail->arm.operands[i].type) { case ARM_OP_REG: case ARM_OP_SYSREG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].reg)); break; case ARM_OP_CIMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); break; case ARM_OP_PIMM: tmp = caml_alloc(1, 3); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); break; case ARM_OP_IMM: tmp = caml_alloc(1, 4); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); break; case ARM_OP_FP: tmp = caml_alloc(1, 5); Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm.operands[i].fp)); break; case ARM_OP_MEM: tmp = caml_alloc(1, 6); tmp3 = caml_alloc(5, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].mem.index)); Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm.operands[i].mem.scale)); Store_field(tmp3, 3, Val_int(insn[j-1].detail->arm.operands[i].mem.disp)); Store_field(tmp3, 4, Val_int(insn[j-1].detail->arm.operands[i].mem.lshift)); Store_field(tmp, 0, tmp3); break; case ARM_OP_SETEND: tmp = caml_alloc(1, 7); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].setend)); break; default: break; } tmp3 = caml_alloc(2, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].shift.type)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].shift.value)); Store_field(tmp2, 0, Val_int(insn[j-1].detail->arm.operands[i].vector_index)); Store_field(tmp2, 1, tmp3); Store_field(tmp2, 2, tmp); Store_field(tmp2, 3, Val_bool(insn[j-1].detail->arm.operands[i].subtracted)); Store_field(tmp2, 4, Val_int(insn[j-1].detail->arm.operands[i].access)); Store_field(tmp2, 5, Val_int(insn[j-1].detail->arm.operands[i].neon_lane)); Store_field(array, i, tmp2); } } else // empty list array = Atom(0); Store_field(op_info_val, 9, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_ARM64: arch_info = caml_alloc(1, 1); op_info_val = caml_alloc(4, 0); Store_field(op_info_val, 0, Val_int(insn[j-1].detail->arm64.cc)); Store_field(op_info_val, 1, Val_bool(insn[j-1].detail->arm64.update_flags)); Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->arm64.writeback)); lcount = insn[j-1].detail->arm64.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(6, 0); switch(insn[j-1].detail->arm64.operands[i].type) { case ARM64_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg)); break; case ARM64_OP_CIMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm)); break; case ARM64_OP_IMM: tmp = caml_alloc(1, 3); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm)); break; case ARM64_OP_FP: tmp = caml_alloc(1, 4); Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm64.operands[i].fp)); break; case ARM64_OP_MEM: tmp = caml_alloc(1, 5); tmp3 = caml_alloc(3, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm64.operands[i].mem.index)); Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm64.operands[i].mem.disp)); Store_field(tmp, 0, tmp3); break; case ARM64_OP_REG_MRS: tmp = caml_alloc(1, 6); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg)); break; case ARM64_OP_REG_MSR: tmp = caml_alloc(1, 7); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg)); break; case ARM64_OP_PSTATE: tmp = caml_alloc(1, 8); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].pstate)); break; case ARM64_OP_SYS: tmp = caml_alloc(1, 9); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].sys)); break; case ARM64_OP_PREFETCH: tmp = caml_alloc(1, 10); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].prefetch)); break; case ARM64_OP_BARRIER: tmp = caml_alloc(1, 11); Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].barrier)); break; default: break; } tmp3 = caml_alloc(2, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].shift.type)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm64.operands[i].shift.value)); Store_field(tmp2, 0, Val_int(insn[j-1].detail->arm64.operands[i].vector_index)); Store_field(tmp2, 1, Val_int(insn[j-1].detail->arm64.operands[i].vas)); Store_field(tmp2, 2, Val_int(insn[j-1].detail->arm64.operands[i].vess)); Store_field(tmp2, 3, tmp3); Store_field(tmp2, 4, Val_int(insn[j-1].detail->arm64.operands[i].ext)); Store_field(tmp2, 5, tmp); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 3, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_MIPS: arch_info = caml_alloc(1, 2); op_info_val = caml_alloc(1, 0); lcount = insn[j-1].detail->mips.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(1, 0); switch(insn[j-1].detail->mips.operands[i].type) { case MIPS_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->mips.operands[i].reg)); break; case MIPS_OP_IMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->mips.operands[i].imm)); break; case MIPS_OP_MEM: tmp = caml_alloc(1, 3); tmp3 = caml_alloc(2, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->mips.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->mips.operands[i].mem.disp)); Store_field(tmp, 0, tmp3); break; default: break; } Store_field(tmp2, 0, tmp); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 0, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_X86: arch_info = caml_alloc(1, 3); op_info_val = caml_alloc(17, 0); // fill prefix lcount = list_count(insn[j-1].detail->x86.prefix, ARR_SIZE(insn[j-1].detail->x86.prefix)); if (lcount) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { Store_field(array, i, Val_int(insn[j-1].detail->x86.prefix[i])); } } else array = Atom(0); Store_field(op_info_val, 0, array); // fill opcode lcount = list_count(insn[j-1].detail->x86.opcode, ARR_SIZE(insn[j-1].detail->x86.opcode)); if (lcount) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { Store_field(array, i, Val_int(insn[j-1].detail->x86.opcode[i])); } } else array = Atom(0); Store_field(op_info_val, 1, array); Store_field(op_info_val, 2, Val_int(insn[j-1].detail->x86.rex)); Store_field(op_info_val, 3, Val_int(insn[j-1].detail->x86.addr_size)); Store_field(op_info_val, 4, Val_int(insn[j-1].detail->x86.modrm)); Store_field(op_info_val, 5, Val_int(insn[j-1].detail->x86.sib)); Store_field(op_info_val, 6, Val_int(insn[j-1].detail->x86.disp)); Store_field(op_info_val, 7, Val_int(insn[j-1].detail->x86.sib_index)); Store_field(op_info_val, 8, Val_int(insn[j-1].detail->x86.sib_scale)); Store_field(op_info_val, 9, Val_int(insn[j-1].detail->x86.sib_base)); Store_field(op_info_val, 10, Val_int(insn[j-1].detail->x86.xop_cc)); Store_field(op_info_val, 11, Val_int(insn[j-1].detail->x86.sse_cc)); Store_field(op_info_val, 12, Val_int(insn[j-1].detail->x86.avx_cc)); Store_field(op_info_val, 13, Val_int(insn[j-1].detail->x86.avx_sae)); Store_field(op_info_val, 14, Val_int(insn[j-1].detail->x86.avx_rm)); Store_field(op_info_val, 15, Val_int(insn[j-1].detail->x86.eflags)); lcount = insn[j-1].detail->x86.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { switch(insn[j-1].detail->x86.operands[i].type) { case X86_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->x86.operands[i].reg)); break; case X86_OP_IMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->x86.operands[i].imm)); break; case X86_OP_MEM: tmp = caml_alloc(1, 3); tmp2 = caml_alloc(5, 0); Store_field(tmp2, 0, Val_int(insn[j-1].detail->x86.operands[i].mem.segment)); Store_field(tmp2, 1, Val_int(insn[j-1].detail->x86.operands[i].mem.base)); Store_field(tmp2, 2, Val_int(insn[j-1].detail->x86.operands[i].mem.index)); Store_field(tmp2, 3, Val_int(insn[j-1].detail->x86.operands[i].mem.scale)); Store_field(tmp2, 4, Val_int(insn[j-1].detail->x86.operands[i].mem.disp)); Store_field(tmp, 0, tmp2); break; default: tmp = caml_alloc(1, 0); // X86_OP_INVALID break; } tmp2 = caml_alloc(5, 0); Store_field(tmp2, 0, tmp); Store_field(tmp2, 1, Val_int(insn[j-1].detail->x86.operands[i].size)); Store_field(tmp2, 2, Val_int(insn[j-1].detail->x86.operands[i].access)); Store_field(tmp2, 3, Val_int(insn[j-1].detail->x86.operands[i].avx_bcast)); Store_field(tmp2, 4, Val_int(insn[j-1].detail->x86.operands[i].avx_zero_opmask)); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 16, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_PPC: arch_info = caml_alloc(1, 4); op_info_val = caml_alloc(4, 0); Store_field(op_info_val, 0, Val_int(insn[j-1].detail->ppc.bc)); Store_field(op_info_val, 1, Val_int(insn[j-1].detail->ppc.bh)); Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->ppc.update_cr0)); lcount = insn[j-1].detail->ppc.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(1, 0); switch(insn[j-1].detail->ppc.operands[i].type) { case PPC_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->ppc.operands[i].reg)); break; case PPC_OP_IMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->ppc.operands[i].imm)); break; case PPC_OP_MEM: tmp = caml_alloc(1, 3); tmp3 = caml_alloc(2, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->ppc.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->ppc.operands[i].mem.disp)); Store_field(tmp, 0, tmp3); break; case PPC_OP_CRX: tmp = caml_alloc(1, 4); tmp3 = caml_alloc(3, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->ppc.operands[i].crx.scale)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->ppc.operands[i].crx.reg)); Store_field(tmp3, 2, Val_int(insn[j-1].detail->ppc.operands[i].crx.cond)); Store_field(tmp, 0, tmp3); break; default: break; } Store_field(tmp2, 0, tmp); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 3, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_SPARC: arch_info = caml_alloc(1, 5); op_info_val = caml_alloc(3, 0); Store_field(op_info_val, 0, Val_int(insn[j-1].detail->sparc.cc)); Store_field(op_info_val, 1, Val_int(insn[j-1].detail->sparc.hint)); lcount = insn[j-1].detail->sparc.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(1, 0); switch(insn[j-1].detail->sparc.operands[i].type) { case SPARC_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->sparc.operands[i].reg)); break; case SPARC_OP_IMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->sparc.operands[i].imm)); break; case SPARC_OP_MEM: tmp = caml_alloc(1, 3); tmp3 = caml_alloc(3, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->sparc.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->sparc.operands[i].mem.index)); Store_field(tmp3, 2, Val_int(insn[j-1].detail->sparc.operands[i].mem.disp)); Store_field(tmp, 0, tmp3); break; default: break; } Store_field(tmp2, 0, tmp); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 2, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_SYSZ: arch_info = caml_alloc(1, 6); op_info_val = caml_alloc(2, 0); Store_field(op_info_val, 0, Val_int(insn[j-1].detail->sysz.cc)); lcount = insn[j-1].detail->sysz.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(1, 0); switch(insn[j-1].detail->sysz.operands[i].type) { case SYSZ_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->sysz.operands[i].reg)); break; case SYSZ_OP_ACREG: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->sysz.operands[i].reg)); break; case SYSZ_OP_IMM: tmp = caml_alloc(1, 3); Store_field(tmp, 0, Val_int(insn[j-1].detail->sysz.operands[i].imm)); break; case SYSZ_OP_MEM: tmp = caml_alloc(1, 4); tmp3 = caml_alloc(4, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->sysz.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->sysz.operands[i].mem.index)); Store_field(tmp3, 2, caml_copy_int64(insn[j-1].detail->sysz.operands[i].mem.length)); Store_field(tmp3, 3, caml_copy_int64(insn[j-1].detail->sysz.operands[i].mem.disp)); Store_field(tmp, 0, tmp3); break; default: break; } Store_field(tmp2, 0, tmp); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 1, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_XCORE: arch_info = caml_alloc(1, 7); op_info_val = caml_alloc(1, 0); lcount = insn[j-1].detail->xcore.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(1, 0); switch(insn[j-1].detail->xcore.operands[i].type) { case XCORE_OP_REG: tmp = caml_alloc(1, 1); Store_field(tmp, 0, Val_int(insn[j-1].detail->xcore.operands[i].reg)); break; case XCORE_OP_IMM: tmp = caml_alloc(1, 2); Store_field(tmp, 0, Val_int(insn[j-1].detail->xcore.operands[i].imm)); break; case XCORE_OP_MEM: tmp = caml_alloc(1, 3); tmp3 = caml_alloc(4, 0); Store_field(tmp3, 0, Val_int(insn[j-1].detail->xcore.operands[i].mem.base)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->xcore.operands[i].mem.index)); Store_field(tmp3, 2, caml_copy_int64(insn[j-1].detail->xcore.operands[i].mem.disp)); Store_field(tmp3, 3, caml_copy_int64(insn[j-1].detail->xcore.operands[i].mem.direct)); Store_field(tmp, 0, tmp3); break; default: break; } Store_field(tmp2, 0, tmp); Store_field(array, i, tmp2); } } else // empty array array = Atom(0); Store_field(op_info_val, 0, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; case CS_ARCH_M680X: arch_info = caml_alloc(1, 8); op_info_val = caml_alloc(2, 0); // struct cs_m680x Store_field(op_info_val, 0, Val_int(insn[j-1].detail->m680x.flags)); lcount = insn[j-1].detail->m680x.op_count; if (lcount > 0) { array = caml_alloc(lcount, 0); for (i = 0; i < lcount; i++) { tmp2 = caml_alloc(3, 0); // m680x_op switch(insn[j-1].detail->m680x.operands[i].type) { case M680X_OP_IMMEDIATE: tmp = caml_alloc(1, 1); // imm Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].imm)); break; case M680X_OP_REGISTER: tmp = caml_alloc(1, 2); // reg Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].reg)); break; case M680X_OP_INDEXED: tmp = caml_alloc(1, 3); tmp3 = caml_alloc(7, 0); // m680x_op_idx Store_field(tmp3, 0, Val_int(insn[j-1].detail->m680x.operands[i].idx.base_reg)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_reg)); Store_field(tmp3, 2, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset)); Store_field(tmp3, 3, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_addr)); Store_field(tmp3, 4, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_bits)); Store_field(tmp3, 5, Val_int(insn[j-1].detail->m680x.operands[i].idx.inc_dec)); Store_field(tmp3, 6, Val_int(insn[j-1].detail->m680x.operands[i].idx.flags)); Store_field(tmp, 0, tmp3); break; case M680X_OP_RELATIVE: tmp = caml_alloc(1, 4); tmp3 = caml_alloc(2, 0); // m680x_op_rel Store_field(tmp3, 0, Val_int(insn[j-1].detail->m680x.operands[i].rel.address)); Store_field(tmp3, 1, Val_int(insn[j-1].detail->m680x.operands[i].rel.offset)); Store_field(tmp, 0, tmp3); break; case M680X_OP_EXTENDED: tmp = caml_alloc(1, 5); tmp3 = caml_alloc(2, 0); // m680x_op_ext Store_field(tmp3, 0, Val_int(insn[j-1].detail->m680x.operands[i].ext.address)); Store_field(tmp3, 1, Val_bool(insn[j-1].detail->m680x.operands[i].ext.indirect)); Store_field(tmp, 0, tmp3); break; case M680X_OP_DIRECT: tmp = caml_alloc(1, 6); // direct_addr Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].direct_addr)); break; case M680X_OP_CONSTANT: tmp = caml_alloc(1, 7); // const_val Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].const_val)); break; default: break; } Store_field(tmp2, 0, tmp); // add union Store_field(tmp2, 1, Val_int(insn[j-1].detail->m680x.operands[i].size)); Store_field(tmp2, 2, Val_int(insn[j-1].detail->m680x.operands[i].access)); Store_field(array, i, tmp2); // add operand to operand array } } else // empty list array = Atom(0); Store_field(op_info_val, 1, array); // finally, insert this into arch_info Store_field(arch_info, 0, op_info_val); Store_field(rec_insn, 9, arch_info); break; default: break; } } Store_field(cons, 0, rec_insn); // head Store_field(cons, 1, list); // tail list = cons; } cs_free(insn, count); } // do not free the handle here //cs_close(&handle); CAMLreturn(list); } CAMLprim value ocaml_cs_disasm(value _arch, value _mode, value _code, value _addr, value _count) { CAMLparam5(_arch, _mode, _code, _addr, _count); CAMLlocal1(head); csh handle; cs_arch arch; cs_mode mode = 0; const uint8_t *code; uint64_t addr; size_t count, code_len; switch (Int_val(_arch)) { case 0: arch = CS_ARCH_ARM; break; case 1: arch = CS_ARCH_ARM64; break; case 2: arch = CS_ARCH_MIPS; break; case 3: arch = CS_ARCH_X86; break; case 4: arch = CS_ARCH_PPC; break; case 5: arch = CS_ARCH_SPARC; break; case 6: arch = CS_ARCH_SYSZ; break; case 7: arch = CS_ARCH_XCORE; break; case 8: arch = CS_ARCH_M68K; break; case 9: arch = CS_ARCH_TMS320C64X; break; case 10: arch = CS_ARCH_M680X; break; default: caml_invalid_argument("Invalid arch"); return Val_emptylist; } while (_mode != Val_emptylist) { head = Field(_mode, 0); /* accessing the head */ switch (Int_val(head)) { case 0: mode |= CS_MODE_LITTLE_ENDIAN; break; case 1: mode |= CS_MODE_ARM; break; case 2: mode |= CS_MODE_16; break; case 3: mode |= CS_MODE_32; break; case 4: mode |= CS_MODE_64; break; case 5: mode |= CS_MODE_THUMB; break; case 6: mode |= CS_MODE_MCLASS; break; case 7: mode |= CS_MODE_V8; break; case 8: mode |= CS_MODE_MICRO; break; case 9: mode |= CS_MODE_MIPS3; break; case 10: mode |= CS_MODE_MIPS32R6; break; case 11: mode |= CS_MODE_MIPS2; break; case 12: mode |= CS_MODE_V9; break; case 13: mode |= CS_MODE_BIG_ENDIAN; break; case 14: mode |= CS_MODE_MIPS32; break; case 15: mode |= CS_MODE_MIPS64; break; case 16: mode |= CS_MODE_QPX; break; case 17: mode |= CS_MODE_M680X_6301; break; case 18: mode |= CS_MODE_M680X_6309; break; case 19: mode |= CS_MODE_M680X_6800; break; case 20: mode |= CS_MODE_M680X_6801; break; case 21: mode |= CS_MODE_M680X_6805; break; case 22: mode |= CS_MODE_M680X_6808; break; case 23: mode |= CS_MODE_M680X_6809; break; case 24: mode |= CS_MODE_M680X_6811; break; case 25: mode |= CS_MODE_M680X_CPU12; break; case 26: mode |= CS_MODE_M680X_HCS08; break; default: caml_invalid_argument("Invalid mode"); return Val_emptylist; } _mode = Field(_mode, 1); /* point to the tail for next loop */ } cs_err ret = cs_open(arch, mode, &handle); if (ret != CS_ERR_OK) { return Val_emptylist; } code = (uint8_t *)String_val(_code); code_len = caml_string_length(_code); addr = Int64_val(_addr); count = Int64_val(_count); CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count)); } CAMLprim value ocaml_cs_disasm_internal(value _arch, value _handle, value _code, value _addr, value _count) { CAMLparam5(_arch, _handle, _code, _addr, _count); csh handle; cs_arch arch; const uint8_t *code; uint64_t addr, count, code_len; handle = Int64_val(_handle); arch = Int_val(_arch); code = (uint8_t *)String_val(_code); code_len = caml_string_length(_code); addr = Int64_val(_addr); count = Int64_val(_count); CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count)); } CAMLprim value ocaml_open(value _arch, value _mode) { CAMLparam2(_arch, _mode); CAMLlocal2(list, head); csh handle; cs_arch arch; cs_mode mode = 0; list = Val_emptylist; switch (Int_val(_arch)) { case 0: arch = CS_ARCH_ARM; break; case 1: arch = CS_ARCH_ARM64; break; case 2: arch = CS_ARCH_MIPS; break; case 3: arch = CS_ARCH_X86; break; case 4: arch = CS_ARCH_PPC; break; case 5: arch = CS_ARCH_SPARC; break; case 6: arch = CS_ARCH_SYSZ; break; case 7: arch = CS_ARCH_XCORE; break; case 8: arch = CS_ARCH_M68K; break; case 9: arch = CS_ARCH_TMS320C64X; break; case 10: arch = CS_ARCH_M680X; break; default: caml_invalid_argument("Invalid arch"); return Val_emptylist; } while (_mode != Val_emptylist) { head = Field(_mode, 0); /* accessing the head */ switch (Int_val(head)) { case 0: mode |= CS_MODE_LITTLE_ENDIAN; break; case 1: mode |= CS_MODE_ARM; break; case 2: mode |= CS_MODE_16; break; case 3: mode |= CS_MODE_32; break; case 4: mode |= CS_MODE_64; break; case 5: mode |= CS_MODE_THUMB; break; case 6: mode |= CS_MODE_MCLASS; break; case 7: mode |= CS_MODE_V8; break; case 8: mode |= CS_MODE_MICRO; break; case 9: mode |= CS_MODE_MIPS3; break; case 10: mode |= CS_MODE_MIPS32R6; break; case 11: mode |= CS_MODE_MIPS2; break; case 12: mode |= CS_MODE_V9; break; case 13: mode |= CS_MODE_BIG_ENDIAN; break; case 14: mode |= CS_MODE_MIPS32; break; case 15: mode |= CS_MODE_MIPS64; break; case 16: mode |= CS_MODE_QPX; break; case 17: mode |= CS_MODE_M680X_6301; break; case 18: mode |= CS_MODE_M680X_6309; break; case 19: mode |= CS_MODE_M680X_6800; break; case 20: mode |= CS_MODE_M680X_6801; break; case 21: mode |= CS_MODE_M680X_6805; break; case 22: mode |= CS_MODE_M680X_6808; break; case 23: mode |= CS_MODE_M680X_6809; break; case 24: mode |= CS_MODE_M680X_6811; break; case 25: mode |= CS_MODE_M680X_CPU12; break; case 26: mode |= CS_MODE_M680X_HCS08; break; default: caml_invalid_argument("Invalid mode"); return Val_emptylist; } _mode = Field(_mode, 1); /* point to the tail for next loop */ } if (cs_open(arch, mode, &handle) != 0) CAMLreturn(Val_int(0)); CAMLlocal1(result); result = caml_alloc(1, 0); Store_field(result, 0, caml_copy_int64(handle)); CAMLreturn(result); } CAMLprim value ocaml_option(value _handle, value _opt, value _value) { CAMLparam3(_handle, _opt, _value); cs_opt_type opt; int err; switch (Int_val(_opt)) { case 0: opt = CS_OPT_SYNTAX; break; case 1: opt = CS_OPT_DETAIL; break; case 2: opt = CS_OPT_MODE; break; case 3: opt = CS_OPT_MEM; break; case 4: opt = CS_OPT_SKIPDATA; break; case 5: opt = CS_OPT_SKIPDATA_SETUP; break; default: caml_invalid_argument("Invalid option"); CAMLreturn(Val_int(CS_ERR_OPTION)); } err = cs_option(Int64_val(_handle), opt, Int64_val(_value)); CAMLreturn(Val_int(err)); } CAMLprim value ocaml_register_name(value _handle, value _reg) { const char *name = cs_reg_name(Int64_val(_handle), Int_val(_reg)); if (!name) { caml_invalid_argument("invalid reg_id"); name = "invalid"; } return caml_copy_string(name); } CAMLprim value ocaml_instruction_name(value _handle, value _insn) { const char *name = cs_insn_name(Int64_val(_handle), Int_val(_insn)); if (!name) { caml_invalid_argument("invalid insn_id"); name = "invalid"; } return caml_copy_string(name); } CAMLprim value ocaml_group_name(value _handle, value _insn) { const char *name = cs_group_name(Int64_val(_handle), Int_val(_insn)); if (!name) { caml_invalid_argument("invalid insn_id"); name = "invalid"; } return caml_copy_string(name); } CAMLprim value ocaml_version(void) { int version = cs_version(NULL, NULL); return Val_int(version); } CAMLprim value ocaml_close(value _handle) { CAMLparam1(_handle); csh h; h = Int64_val(_handle); CAMLreturn(Val_int(cs_close(&h))); } capstone-sys-0.11.0/capstone/bindings/ocaml/ppc.ml010066400017500001750000000007471363402546700203060ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Ppc_const type ppc_op_mem = { base: int; disp: int; } type ppc_op_crx = { scale: int; reg: int; cond: int; } type ppc_op_value = | PPC_OP_INVALID of int | PPC_OP_REG of int | PPC_OP_IMM of int | PPC_OP_MEM of ppc_op_mem | PPC_OP_CRX of ppc_op_crx type ppc_op = { value: ppc_op_value; } type cs_ppc = { bc: int; bh: int; update_cr0: bool; operands: ppc_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/ppc_const.ml010066400017500001750000001120611363402546700215050ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.ml] *) let _PPC_BC_INVALID = 0;; let _PPC_BC_LT = (0 lsl 5) lor 12;; let _PPC_BC_LE = (1 lsl 5) lor 4;; let _PPC_BC_EQ = (2 lsl 5) lor 12;; let _PPC_BC_GE = (0 lsl 5) lor 4;; let _PPC_BC_GT = (1 lsl 5) lor 12;; let _PPC_BC_NE = (2 lsl 5) lor 4;; let _PPC_BC_UN = (3 lsl 5) lor 12;; let _PPC_BC_NU = (3 lsl 5) lor 4;; let _PPC_BC_SO = (4 lsl 5) lor 12;; let _PPC_BC_NS = (4 lsl 5) lor 4;; let _PPC_BH_INVALID = 0;; let _PPC_BH_PLUS = 1;; let _PPC_BH_MINUS = 2;; let _PPC_OP_INVALID = 0;; let _PPC_OP_REG = 1;; let _PPC_OP_IMM = 2;; let _PPC_OP_MEM = 3;; let _PPC_OP_CRX = 64;; let _PPC_REG_INVALID = 0;; let _PPC_REG_CARRY = 1;; let _PPC_REG_CR0 = 2;; let _PPC_REG_CR1 = 3;; let _PPC_REG_CR2 = 4;; let _PPC_REG_CR3 = 5;; let _PPC_REG_CR4 = 6;; let _PPC_REG_CR5 = 7;; let _PPC_REG_CR6 = 8;; let _PPC_REG_CR7 = 9;; let _PPC_REG_CTR = 10;; let _PPC_REG_F0 = 11;; let _PPC_REG_F1 = 12;; let _PPC_REG_F2 = 13;; let _PPC_REG_F3 = 14;; let _PPC_REG_F4 = 15;; let _PPC_REG_F5 = 16;; let _PPC_REG_F6 = 17;; let _PPC_REG_F7 = 18;; let _PPC_REG_F8 = 19;; let _PPC_REG_F9 = 20;; let _PPC_REG_F10 = 21;; let _PPC_REG_F11 = 22;; let _PPC_REG_F12 = 23;; let _PPC_REG_F13 = 24;; let _PPC_REG_F14 = 25;; let _PPC_REG_F15 = 26;; let _PPC_REG_F16 = 27;; let _PPC_REG_F17 = 28;; let _PPC_REG_F18 = 29;; let _PPC_REG_F19 = 30;; let _PPC_REG_F20 = 31;; let _PPC_REG_F21 = 32;; let _PPC_REG_F22 = 33;; let _PPC_REG_F23 = 34;; let _PPC_REG_F24 = 35;; let _PPC_REG_F25 = 36;; let _PPC_REG_F26 = 37;; let _PPC_REG_F27 = 38;; let _PPC_REG_F28 = 39;; let _PPC_REG_F29 = 40;; let _PPC_REG_F30 = 41;; let _PPC_REG_F31 = 42;; let _PPC_REG_LR = 43;; let _PPC_REG_R0 = 44;; let _PPC_REG_R1 = 45;; let _PPC_REG_R2 = 46;; let _PPC_REG_R3 = 47;; let _PPC_REG_R4 = 48;; let _PPC_REG_R5 = 49;; let _PPC_REG_R6 = 50;; let _PPC_REG_R7 = 51;; let _PPC_REG_R8 = 52;; let _PPC_REG_R9 = 53;; let _PPC_REG_R10 = 54;; let _PPC_REG_R11 = 55;; let _PPC_REG_R12 = 56;; let _PPC_REG_R13 = 57;; let _PPC_REG_R14 = 58;; let _PPC_REG_R15 = 59;; let _PPC_REG_R16 = 60;; let _PPC_REG_R17 = 61;; let _PPC_REG_R18 = 62;; let _PPC_REG_R19 = 63;; let _PPC_REG_R20 = 64;; let _PPC_REG_R21 = 65;; let _PPC_REG_R22 = 66;; let _PPC_REG_R23 = 67;; let _PPC_REG_R24 = 68;; let _PPC_REG_R25 = 69;; let _PPC_REG_R26 = 70;; let _PPC_REG_R27 = 71;; let _PPC_REG_R28 = 72;; let _PPC_REG_R29 = 73;; let _PPC_REG_R30 = 74;; let _PPC_REG_R31 = 75;; let _PPC_REG_V0 = 76;; let _PPC_REG_V1 = 77;; let _PPC_REG_V2 = 78;; let _PPC_REG_V3 = 79;; let _PPC_REG_V4 = 80;; let _PPC_REG_V5 = 81;; let _PPC_REG_V6 = 82;; let _PPC_REG_V7 = 83;; let _PPC_REG_V8 = 84;; let _PPC_REG_V9 = 85;; let _PPC_REG_V10 = 86;; let _PPC_REG_V11 = 87;; let _PPC_REG_V12 = 88;; let _PPC_REG_V13 = 89;; let _PPC_REG_V14 = 90;; let _PPC_REG_V15 = 91;; let _PPC_REG_V16 = 92;; let _PPC_REG_V17 = 93;; let _PPC_REG_V18 = 94;; let _PPC_REG_V19 = 95;; let _PPC_REG_V20 = 96;; let _PPC_REG_V21 = 97;; let _PPC_REG_V22 = 98;; let _PPC_REG_V23 = 99;; let _PPC_REG_V24 = 100;; let _PPC_REG_V25 = 101;; let _PPC_REG_V26 = 102;; let _PPC_REG_V27 = 103;; let _PPC_REG_V28 = 104;; let _PPC_REG_V29 = 105;; let _PPC_REG_V30 = 106;; let _PPC_REG_V31 = 107;; let _PPC_REG_VRSAVE = 108;; let _PPC_REG_VS0 = 109;; let _PPC_REG_VS1 = 110;; let _PPC_REG_VS2 = 111;; let _PPC_REG_VS3 = 112;; let _PPC_REG_VS4 = 113;; let _PPC_REG_VS5 = 114;; let _PPC_REG_VS6 = 115;; let _PPC_REG_VS7 = 116;; let _PPC_REG_VS8 = 117;; let _PPC_REG_VS9 = 118;; let _PPC_REG_VS10 = 119;; let _PPC_REG_VS11 = 120;; let _PPC_REG_VS12 = 121;; let _PPC_REG_VS13 = 122;; let _PPC_REG_VS14 = 123;; let _PPC_REG_VS15 = 124;; let _PPC_REG_VS16 = 125;; let _PPC_REG_VS17 = 126;; let _PPC_REG_VS18 = 127;; let _PPC_REG_VS19 = 128;; let _PPC_REG_VS20 = 129;; let _PPC_REG_VS21 = 130;; let _PPC_REG_VS22 = 131;; let _PPC_REG_VS23 = 132;; let _PPC_REG_VS24 = 133;; let _PPC_REG_VS25 = 134;; let _PPC_REG_VS26 = 135;; let _PPC_REG_VS27 = 136;; let _PPC_REG_VS28 = 137;; let _PPC_REG_VS29 = 138;; let _PPC_REG_VS30 = 139;; let _PPC_REG_VS31 = 140;; let _PPC_REG_VS32 = 141;; let _PPC_REG_VS33 = 142;; let _PPC_REG_VS34 = 143;; let _PPC_REG_VS35 = 144;; let _PPC_REG_VS36 = 145;; let _PPC_REG_VS37 = 146;; let _PPC_REG_VS38 = 147;; let _PPC_REG_VS39 = 148;; let _PPC_REG_VS40 = 149;; let _PPC_REG_VS41 = 150;; let _PPC_REG_VS42 = 151;; let _PPC_REG_VS43 = 152;; let _PPC_REG_VS44 = 153;; let _PPC_REG_VS45 = 154;; let _PPC_REG_VS46 = 155;; let _PPC_REG_VS47 = 156;; let _PPC_REG_VS48 = 157;; let _PPC_REG_VS49 = 158;; let _PPC_REG_VS50 = 159;; let _PPC_REG_VS51 = 160;; let _PPC_REG_VS52 = 161;; let _PPC_REG_VS53 = 162;; let _PPC_REG_VS54 = 163;; let _PPC_REG_VS55 = 164;; let _PPC_REG_VS56 = 165;; let _PPC_REG_VS57 = 166;; let _PPC_REG_VS58 = 167;; let _PPC_REG_VS59 = 168;; let _PPC_REG_VS60 = 169;; let _PPC_REG_VS61 = 170;; let _PPC_REG_VS62 = 171;; let _PPC_REG_VS63 = 172;; let _PPC_REG_Q0 = 173;; let _PPC_REG_Q1 = 174;; let _PPC_REG_Q2 = 175;; let _PPC_REG_Q3 = 176;; let _PPC_REG_Q4 = 177;; let _PPC_REG_Q5 = 178;; let _PPC_REG_Q6 = 179;; let _PPC_REG_Q7 = 180;; let _PPC_REG_Q8 = 181;; let _PPC_REG_Q9 = 182;; let _PPC_REG_Q10 = 183;; let _PPC_REG_Q11 = 184;; let _PPC_REG_Q12 = 185;; let _PPC_REG_Q13 = 186;; let _PPC_REG_Q14 = 187;; let _PPC_REG_Q15 = 188;; let _PPC_REG_Q16 = 189;; let _PPC_REG_Q17 = 190;; let _PPC_REG_Q18 = 191;; let _PPC_REG_Q19 = 192;; let _PPC_REG_Q20 = 193;; let _PPC_REG_Q21 = 194;; let _PPC_REG_Q22 = 195;; let _PPC_REG_Q23 = 196;; let _PPC_REG_Q24 = 197;; let _PPC_REG_Q25 = 198;; let _PPC_REG_Q26 = 199;; let _PPC_REG_Q27 = 200;; let _PPC_REG_Q28 = 201;; let _PPC_REG_Q29 = 202;; let _PPC_REG_Q30 = 203;; let _PPC_REG_Q31 = 204;; let _PPC_REG_RM = 205;; let _PPC_REG_CTR8 = 206;; let _PPC_REG_LR8 = 207;; let _PPC_REG_CR1EQ = 208;; let _PPC_REG_X2 = 209;; let _PPC_REG_ENDING = 210;; let _PPC_INS_INVALID = 0;; let _PPC_INS_ADD = 1;; let _PPC_INS_ADDC = 2;; let _PPC_INS_ADDE = 3;; let _PPC_INS_ADDI = 4;; let _PPC_INS_ADDIC = 5;; let _PPC_INS_ADDIS = 6;; let _PPC_INS_ADDME = 7;; let _PPC_INS_ADDZE = 8;; let _PPC_INS_AND = 9;; let _PPC_INS_ANDC = 10;; let _PPC_INS_ANDIS = 11;; let _PPC_INS_ANDI = 12;; let _PPC_INS_ATTN = 13;; let _PPC_INS_B = 14;; let _PPC_INS_BA = 15;; let _PPC_INS_BC = 16;; let _PPC_INS_BCCTR = 17;; let _PPC_INS_BCCTRL = 18;; let _PPC_INS_BCL = 19;; let _PPC_INS_BCLR = 20;; let _PPC_INS_BCLRL = 21;; let _PPC_INS_BCTR = 22;; let _PPC_INS_BCTRL = 23;; let _PPC_INS_BCT = 24;; let _PPC_INS_BDNZ = 25;; let _PPC_INS_BDNZA = 26;; let _PPC_INS_BDNZL = 27;; let _PPC_INS_BDNZLA = 28;; let _PPC_INS_BDNZLR = 29;; let _PPC_INS_BDNZLRL = 30;; let _PPC_INS_BDZ = 31;; let _PPC_INS_BDZA = 32;; let _PPC_INS_BDZL = 33;; let _PPC_INS_BDZLA = 34;; let _PPC_INS_BDZLR = 35;; let _PPC_INS_BDZLRL = 36;; let _PPC_INS_BL = 37;; let _PPC_INS_BLA = 38;; let _PPC_INS_BLR = 39;; let _PPC_INS_BLRL = 40;; let _PPC_INS_BRINC = 41;; let _PPC_INS_CMPB = 42;; let _PPC_INS_CMPD = 43;; let _PPC_INS_CMPDI = 44;; let _PPC_INS_CMPLD = 45;; let _PPC_INS_CMPLDI = 46;; let _PPC_INS_CMPLW = 47;; let _PPC_INS_CMPLWI = 48;; let _PPC_INS_CMPW = 49;; let _PPC_INS_CMPWI = 50;; let _PPC_INS_CNTLZD = 51;; let _PPC_INS_CNTLZW = 52;; let _PPC_INS_CREQV = 53;; let _PPC_INS_CRXOR = 54;; let _PPC_INS_CRAND = 55;; let _PPC_INS_CRANDC = 56;; let _PPC_INS_CRNAND = 57;; let _PPC_INS_CRNOR = 58;; let _PPC_INS_CROR = 59;; let _PPC_INS_CRORC = 60;; let _PPC_INS_DCBA = 61;; let _PPC_INS_DCBF = 62;; let _PPC_INS_DCBI = 63;; let _PPC_INS_DCBST = 64;; let _PPC_INS_DCBT = 65;; let _PPC_INS_DCBTST = 66;; let _PPC_INS_DCBZ = 67;; let _PPC_INS_DCBZL = 68;; let _PPC_INS_DCCCI = 69;; let _PPC_INS_DIVD = 70;; let _PPC_INS_DIVDU = 71;; let _PPC_INS_DIVW = 72;; let _PPC_INS_DIVWU = 73;; let _PPC_INS_DSS = 74;; let _PPC_INS_DSSALL = 75;; let _PPC_INS_DST = 76;; let _PPC_INS_DSTST = 77;; let _PPC_INS_DSTSTT = 78;; let _PPC_INS_DSTT = 79;; let _PPC_INS_EQV = 80;; let _PPC_INS_EVABS = 81;; let _PPC_INS_EVADDIW = 82;; let _PPC_INS_EVADDSMIAAW = 83;; let _PPC_INS_EVADDSSIAAW = 84;; let _PPC_INS_EVADDUMIAAW = 85;; let _PPC_INS_EVADDUSIAAW = 86;; let _PPC_INS_EVADDW = 87;; let _PPC_INS_EVAND = 88;; let _PPC_INS_EVANDC = 89;; let _PPC_INS_EVCMPEQ = 90;; let _PPC_INS_EVCMPGTS = 91;; let _PPC_INS_EVCMPGTU = 92;; let _PPC_INS_EVCMPLTS = 93;; let _PPC_INS_EVCMPLTU = 94;; let _PPC_INS_EVCNTLSW = 95;; let _PPC_INS_EVCNTLZW = 96;; let _PPC_INS_EVDIVWS = 97;; let _PPC_INS_EVDIVWU = 98;; let _PPC_INS_EVEQV = 99;; let _PPC_INS_EVEXTSB = 100;; let _PPC_INS_EVEXTSH = 101;; let _PPC_INS_EVLDD = 102;; let _PPC_INS_EVLDDX = 103;; let _PPC_INS_EVLDH = 104;; let _PPC_INS_EVLDHX = 105;; let _PPC_INS_EVLDW = 106;; let _PPC_INS_EVLDWX = 107;; let _PPC_INS_EVLHHESPLAT = 108;; let _PPC_INS_EVLHHESPLATX = 109;; let _PPC_INS_EVLHHOSSPLAT = 110;; let _PPC_INS_EVLHHOSSPLATX = 111;; let _PPC_INS_EVLHHOUSPLAT = 112;; let _PPC_INS_EVLHHOUSPLATX = 113;; let _PPC_INS_EVLWHE = 114;; let _PPC_INS_EVLWHEX = 115;; let _PPC_INS_EVLWHOS = 116;; let _PPC_INS_EVLWHOSX = 117;; let _PPC_INS_EVLWHOU = 118;; let _PPC_INS_EVLWHOUX = 119;; let _PPC_INS_EVLWHSPLAT = 120;; let _PPC_INS_EVLWHSPLATX = 121;; let _PPC_INS_EVLWWSPLAT = 122;; let _PPC_INS_EVLWWSPLATX = 123;; let _PPC_INS_EVMERGEHI = 124;; let _PPC_INS_EVMERGEHILO = 125;; let _PPC_INS_EVMERGELO = 126;; let _PPC_INS_EVMERGELOHI = 127;; let _PPC_INS_EVMHEGSMFAA = 128;; let _PPC_INS_EVMHEGSMFAN = 129;; let _PPC_INS_EVMHEGSMIAA = 130;; let _PPC_INS_EVMHEGSMIAN = 131;; let _PPC_INS_EVMHEGUMIAA = 132;; let _PPC_INS_EVMHEGUMIAN = 133;; let _PPC_INS_EVMHESMF = 134;; let _PPC_INS_EVMHESMFA = 135;; let _PPC_INS_EVMHESMFAAW = 136;; let _PPC_INS_EVMHESMFANW = 137;; let _PPC_INS_EVMHESMI = 138;; let _PPC_INS_EVMHESMIA = 139;; let _PPC_INS_EVMHESMIAAW = 140;; let _PPC_INS_EVMHESMIANW = 141;; let _PPC_INS_EVMHESSF = 142;; let _PPC_INS_EVMHESSFA = 143;; let _PPC_INS_EVMHESSFAAW = 144;; let _PPC_INS_EVMHESSFANW = 145;; let _PPC_INS_EVMHESSIAAW = 146;; let _PPC_INS_EVMHESSIANW = 147;; let _PPC_INS_EVMHEUMI = 148;; let _PPC_INS_EVMHEUMIA = 149;; let _PPC_INS_EVMHEUMIAAW = 150;; let _PPC_INS_EVMHEUMIANW = 151;; let _PPC_INS_EVMHEUSIAAW = 152;; let _PPC_INS_EVMHEUSIANW = 153;; let _PPC_INS_EVMHOGSMFAA = 154;; let _PPC_INS_EVMHOGSMFAN = 155;; let _PPC_INS_EVMHOGSMIAA = 156;; let _PPC_INS_EVMHOGSMIAN = 157;; let _PPC_INS_EVMHOGUMIAA = 158;; let _PPC_INS_EVMHOGUMIAN = 159;; let _PPC_INS_EVMHOSMF = 160;; let _PPC_INS_EVMHOSMFA = 161;; let _PPC_INS_EVMHOSMFAAW = 162;; let _PPC_INS_EVMHOSMFANW = 163;; let _PPC_INS_EVMHOSMI = 164;; let _PPC_INS_EVMHOSMIA = 165;; let _PPC_INS_EVMHOSMIAAW = 166;; let _PPC_INS_EVMHOSMIANW = 167;; let _PPC_INS_EVMHOSSF = 168;; let _PPC_INS_EVMHOSSFA = 169;; let _PPC_INS_EVMHOSSFAAW = 170;; let _PPC_INS_EVMHOSSFANW = 171;; let _PPC_INS_EVMHOSSIAAW = 172;; let _PPC_INS_EVMHOSSIANW = 173;; let _PPC_INS_EVMHOUMI = 174;; let _PPC_INS_EVMHOUMIA = 175;; let _PPC_INS_EVMHOUMIAAW = 176;; let _PPC_INS_EVMHOUMIANW = 177;; let _PPC_INS_EVMHOUSIAAW = 178;; let _PPC_INS_EVMHOUSIANW = 179;; let _PPC_INS_EVMRA = 180;; let _PPC_INS_EVMWHSMF = 181;; let _PPC_INS_EVMWHSMFA = 182;; let _PPC_INS_EVMWHSMI = 183;; let _PPC_INS_EVMWHSMIA = 184;; let _PPC_INS_EVMWHSSF = 185;; let _PPC_INS_EVMWHSSFA = 186;; let _PPC_INS_EVMWHUMI = 187;; let _PPC_INS_EVMWHUMIA = 188;; let _PPC_INS_EVMWLSMIAAW = 189;; let _PPC_INS_EVMWLSMIANW = 190;; let _PPC_INS_EVMWLSSIAAW = 191;; let _PPC_INS_EVMWLSSIANW = 192;; let _PPC_INS_EVMWLUMI = 193;; let _PPC_INS_EVMWLUMIA = 194;; let _PPC_INS_EVMWLUMIAAW = 195;; let _PPC_INS_EVMWLUMIANW = 196;; let _PPC_INS_EVMWLUSIAAW = 197;; let _PPC_INS_EVMWLUSIANW = 198;; let _PPC_INS_EVMWSMF = 199;; let _PPC_INS_EVMWSMFA = 200;; let _PPC_INS_EVMWSMFAA = 201;; let _PPC_INS_EVMWSMFAN = 202;; let _PPC_INS_EVMWSMI = 203;; let _PPC_INS_EVMWSMIA = 204;; let _PPC_INS_EVMWSMIAA = 205;; let _PPC_INS_EVMWSMIAN = 206;; let _PPC_INS_EVMWSSF = 207;; let _PPC_INS_EVMWSSFA = 208;; let _PPC_INS_EVMWSSFAA = 209;; let _PPC_INS_EVMWSSFAN = 210;; let _PPC_INS_EVMWUMI = 211;; let _PPC_INS_EVMWUMIA = 212;; let _PPC_INS_EVMWUMIAA = 213;; let _PPC_INS_EVMWUMIAN = 214;; let _PPC_INS_EVNAND = 215;; let _PPC_INS_EVNEG = 216;; let _PPC_INS_EVNOR = 217;; let _PPC_INS_EVOR = 218;; let _PPC_INS_EVORC = 219;; let _PPC_INS_EVRLW = 220;; let _PPC_INS_EVRLWI = 221;; let _PPC_INS_EVRNDW = 222;; let _PPC_INS_EVSLW = 223;; let _PPC_INS_EVSLWI = 224;; let _PPC_INS_EVSPLATFI = 225;; let _PPC_INS_EVSPLATI = 226;; let _PPC_INS_EVSRWIS = 227;; let _PPC_INS_EVSRWIU = 228;; let _PPC_INS_EVSRWS = 229;; let _PPC_INS_EVSRWU = 230;; let _PPC_INS_EVSTDD = 231;; let _PPC_INS_EVSTDDX = 232;; let _PPC_INS_EVSTDH = 233;; let _PPC_INS_EVSTDHX = 234;; let _PPC_INS_EVSTDW = 235;; let _PPC_INS_EVSTDWX = 236;; let _PPC_INS_EVSTWHE = 237;; let _PPC_INS_EVSTWHEX = 238;; let _PPC_INS_EVSTWHO = 239;; let _PPC_INS_EVSTWHOX = 240;; let _PPC_INS_EVSTWWE = 241;; let _PPC_INS_EVSTWWEX = 242;; let _PPC_INS_EVSTWWO = 243;; let _PPC_INS_EVSTWWOX = 244;; let _PPC_INS_EVSUBFSMIAAW = 245;; let _PPC_INS_EVSUBFSSIAAW = 246;; let _PPC_INS_EVSUBFUMIAAW = 247;; let _PPC_INS_EVSUBFUSIAAW = 248;; let _PPC_INS_EVSUBFW = 249;; let _PPC_INS_EVSUBIFW = 250;; let _PPC_INS_EVXOR = 251;; let _PPC_INS_EXTSB = 252;; let _PPC_INS_EXTSH = 253;; let _PPC_INS_EXTSW = 254;; let _PPC_INS_EIEIO = 255;; let _PPC_INS_FABS = 256;; let _PPC_INS_FADD = 257;; let _PPC_INS_FADDS = 258;; let _PPC_INS_FCFID = 259;; let _PPC_INS_FCFIDS = 260;; let _PPC_INS_FCFIDU = 261;; let _PPC_INS_FCFIDUS = 262;; let _PPC_INS_FCMPU = 263;; let _PPC_INS_FCPSGN = 264;; let _PPC_INS_FCTID = 265;; let _PPC_INS_FCTIDUZ = 266;; let _PPC_INS_FCTIDZ = 267;; let _PPC_INS_FCTIW = 268;; let _PPC_INS_FCTIWUZ = 269;; let _PPC_INS_FCTIWZ = 270;; let _PPC_INS_FDIV = 271;; let _PPC_INS_FDIVS = 272;; let _PPC_INS_FMADD = 273;; let _PPC_INS_FMADDS = 274;; let _PPC_INS_FMR = 275;; let _PPC_INS_FMSUB = 276;; let _PPC_INS_FMSUBS = 277;; let _PPC_INS_FMUL = 278;; let _PPC_INS_FMULS = 279;; let _PPC_INS_FNABS = 280;; let _PPC_INS_FNEG = 281;; let _PPC_INS_FNMADD = 282;; let _PPC_INS_FNMADDS = 283;; let _PPC_INS_FNMSUB = 284;; let _PPC_INS_FNMSUBS = 285;; let _PPC_INS_FRE = 286;; let _PPC_INS_FRES = 287;; let _PPC_INS_FRIM = 288;; let _PPC_INS_FRIN = 289;; let _PPC_INS_FRIP = 290;; let _PPC_INS_FRIZ = 291;; let _PPC_INS_FRSP = 292;; let _PPC_INS_FRSQRTE = 293;; let _PPC_INS_FRSQRTES = 294;; let _PPC_INS_FSEL = 295;; let _PPC_INS_FSQRT = 296;; let _PPC_INS_FSQRTS = 297;; let _PPC_INS_FSUB = 298;; let _PPC_INS_FSUBS = 299;; let _PPC_INS_ICBI = 300;; let _PPC_INS_ICBT = 301;; let _PPC_INS_ICCCI = 302;; let _PPC_INS_ISEL = 303;; let _PPC_INS_ISYNC = 304;; let _PPC_INS_LA = 305;; let _PPC_INS_LBZ = 306;; let _PPC_INS_LBZCIX = 307;; let _PPC_INS_LBZU = 308;; let _PPC_INS_LBZUX = 309;; let _PPC_INS_LBZX = 310;; let _PPC_INS_LD = 311;; let _PPC_INS_LDARX = 312;; let _PPC_INS_LDBRX = 313;; let _PPC_INS_LDCIX = 314;; let _PPC_INS_LDU = 315;; let _PPC_INS_LDUX = 316;; let _PPC_INS_LDX = 317;; let _PPC_INS_LFD = 318;; let _PPC_INS_LFDU = 319;; let _PPC_INS_LFDUX = 320;; let _PPC_INS_LFDX = 321;; let _PPC_INS_LFIWAX = 322;; let _PPC_INS_LFIWZX = 323;; let _PPC_INS_LFS = 324;; let _PPC_INS_LFSU = 325;; let _PPC_INS_LFSUX = 326;; let _PPC_INS_LFSX = 327;; let _PPC_INS_LHA = 328;; let _PPC_INS_LHAU = 329;; let _PPC_INS_LHAUX = 330;; let _PPC_INS_LHAX = 331;; let _PPC_INS_LHBRX = 332;; let _PPC_INS_LHZ = 333;; let _PPC_INS_LHZCIX = 334;; let _PPC_INS_LHZU = 335;; let _PPC_INS_LHZUX = 336;; let _PPC_INS_LHZX = 337;; let _PPC_INS_LI = 338;; let _PPC_INS_LIS = 339;; let _PPC_INS_LMW = 340;; let _PPC_INS_LSWI = 341;; let _PPC_INS_LVEBX = 342;; let _PPC_INS_LVEHX = 343;; let _PPC_INS_LVEWX = 344;; let _PPC_INS_LVSL = 345;; let _PPC_INS_LVSR = 346;; let _PPC_INS_LVX = 347;; let _PPC_INS_LVXL = 348;; let _PPC_INS_LWA = 349;; let _PPC_INS_LWARX = 350;; let _PPC_INS_LWAUX = 351;; let _PPC_INS_LWAX = 352;; let _PPC_INS_LWBRX = 353;; let _PPC_INS_LWZ = 354;; let _PPC_INS_LWZCIX = 355;; let _PPC_INS_LWZU = 356;; let _PPC_INS_LWZUX = 357;; let _PPC_INS_LWZX = 358;; let _PPC_INS_LXSDX = 359;; let _PPC_INS_LXVD2X = 360;; let _PPC_INS_LXVDSX = 361;; let _PPC_INS_LXVW4X = 362;; let _PPC_INS_MBAR = 363;; let _PPC_INS_MCRF = 364;; let _PPC_INS_MCRFS = 365;; let _PPC_INS_MFCR = 366;; let _PPC_INS_MFCTR = 367;; let _PPC_INS_MFDCR = 368;; let _PPC_INS_MFFS = 369;; let _PPC_INS_MFLR = 370;; let _PPC_INS_MFMSR = 371;; let _PPC_INS_MFOCRF = 372;; let _PPC_INS_MFSPR = 373;; let _PPC_INS_MFSR = 374;; let _PPC_INS_MFSRIN = 375;; let _PPC_INS_MFTB = 376;; let _PPC_INS_MFVSCR = 377;; let _PPC_INS_MSYNC = 378;; let _PPC_INS_MTCRF = 379;; let _PPC_INS_MTCTR = 380;; let _PPC_INS_MTDCR = 381;; let _PPC_INS_MTFSB0 = 382;; let _PPC_INS_MTFSB1 = 383;; let _PPC_INS_MTFSF = 384;; let _PPC_INS_MTFSFI = 385;; let _PPC_INS_MTLR = 386;; let _PPC_INS_MTMSR = 387;; let _PPC_INS_MTMSRD = 388;; let _PPC_INS_MTOCRF = 389;; let _PPC_INS_MTSPR = 390;; let _PPC_INS_MTSR = 391;; let _PPC_INS_MTSRIN = 392;; let _PPC_INS_MTVSCR = 393;; let _PPC_INS_MULHD = 394;; let _PPC_INS_MULHDU = 395;; let _PPC_INS_MULHW = 396;; let _PPC_INS_MULHWU = 397;; let _PPC_INS_MULLD = 398;; let _PPC_INS_MULLI = 399;; let _PPC_INS_MULLW = 400;; let _PPC_INS_NAND = 401;; let _PPC_INS_NEG = 402;; let _PPC_INS_NOP = 403;; let _PPC_INS_ORI = 404;; let _PPC_INS_NOR = 405;; let _PPC_INS_OR = 406;; let _PPC_INS_ORC = 407;; let _PPC_INS_ORIS = 408;; let _PPC_INS_POPCNTD = 409;; let _PPC_INS_POPCNTW = 410;; let _PPC_INS_QVALIGNI = 411;; let _PPC_INS_QVESPLATI = 412;; let _PPC_INS_QVFABS = 413;; let _PPC_INS_QVFADD = 414;; let _PPC_INS_QVFADDS = 415;; let _PPC_INS_QVFCFID = 416;; let _PPC_INS_QVFCFIDS = 417;; let _PPC_INS_QVFCFIDU = 418;; let _PPC_INS_QVFCFIDUS = 419;; let _PPC_INS_QVFCMPEQ = 420;; let _PPC_INS_QVFCMPGT = 421;; let _PPC_INS_QVFCMPLT = 422;; let _PPC_INS_QVFCPSGN = 423;; let _PPC_INS_QVFCTID = 424;; let _PPC_INS_QVFCTIDU = 425;; let _PPC_INS_QVFCTIDUZ = 426;; let _PPC_INS_QVFCTIDZ = 427;; let _PPC_INS_QVFCTIW = 428;; let _PPC_INS_QVFCTIWU = 429;; let _PPC_INS_QVFCTIWUZ = 430;; let _PPC_INS_QVFCTIWZ = 431;; let _PPC_INS_QVFLOGICAL = 432;; let _PPC_INS_QVFMADD = 433;; let _PPC_INS_QVFMADDS = 434;; let _PPC_INS_QVFMR = 435;; let _PPC_INS_QVFMSUB = 436;; let _PPC_INS_QVFMSUBS = 437;; let _PPC_INS_QVFMUL = 438;; let _PPC_INS_QVFMULS = 439;; let _PPC_INS_QVFNABS = 440;; let _PPC_INS_QVFNEG = 441;; let _PPC_INS_QVFNMADD = 442;; let _PPC_INS_QVFNMADDS = 443;; let _PPC_INS_QVFNMSUB = 444;; let _PPC_INS_QVFNMSUBS = 445;; let _PPC_INS_QVFPERM = 446;; let _PPC_INS_QVFRE = 447;; let _PPC_INS_QVFRES = 448;; let _PPC_INS_QVFRIM = 449;; let _PPC_INS_QVFRIN = 450;; let _PPC_INS_QVFRIP = 451;; let _PPC_INS_QVFRIZ = 452;; let _PPC_INS_QVFRSP = 453;; let _PPC_INS_QVFRSQRTE = 454;; let _PPC_INS_QVFRSQRTES = 455;; let _PPC_INS_QVFSEL = 456;; let _PPC_INS_QVFSUB = 457;; let _PPC_INS_QVFSUBS = 458;; let _PPC_INS_QVFTSTNAN = 459;; let _PPC_INS_QVFXMADD = 460;; let _PPC_INS_QVFXMADDS = 461;; let _PPC_INS_QVFXMUL = 462;; let _PPC_INS_QVFXMULS = 463;; let _PPC_INS_QVFXXCPNMADD = 464;; let _PPC_INS_QVFXXCPNMADDS = 465;; let _PPC_INS_QVFXXMADD = 466;; let _PPC_INS_QVFXXMADDS = 467;; let _PPC_INS_QVFXXNPMADD = 468;; let _PPC_INS_QVFXXNPMADDS = 469;; let _PPC_INS_QVGPCI = 470;; let _PPC_INS_QVLFCDUX = 471;; let _PPC_INS_QVLFCDUXA = 472;; let _PPC_INS_QVLFCDX = 473;; let _PPC_INS_QVLFCDXA = 474;; let _PPC_INS_QVLFCSUX = 475;; let _PPC_INS_QVLFCSUXA = 476;; let _PPC_INS_QVLFCSX = 477;; let _PPC_INS_QVLFCSXA = 478;; let _PPC_INS_QVLFDUX = 479;; let _PPC_INS_QVLFDUXA = 480;; let _PPC_INS_QVLFDX = 481;; let _PPC_INS_QVLFDXA = 482;; let _PPC_INS_QVLFIWAX = 483;; let _PPC_INS_QVLFIWAXA = 484;; let _PPC_INS_QVLFIWZX = 485;; let _PPC_INS_QVLFIWZXA = 486;; let _PPC_INS_QVLFSUX = 487;; let _PPC_INS_QVLFSUXA = 488;; let _PPC_INS_QVLFSX = 489;; let _PPC_INS_QVLFSXA = 490;; let _PPC_INS_QVLPCLDX = 491;; let _PPC_INS_QVLPCLSX = 492;; let _PPC_INS_QVLPCRDX = 493;; let _PPC_INS_QVLPCRSX = 494;; let _PPC_INS_QVSTFCDUX = 495;; let _PPC_INS_QVSTFCDUXA = 496;; let _PPC_INS_QVSTFCDUXI = 497;; let _PPC_INS_QVSTFCDUXIA = 498;; let _PPC_INS_QVSTFCDX = 499;; let _PPC_INS_QVSTFCDXA = 500;; let _PPC_INS_QVSTFCDXI = 501;; let _PPC_INS_QVSTFCDXIA = 502;; let _PPC_INS_QVSTFCSUX = 503;; let _PPC_INS_QVSTFCSUXA = 504;; let _PPC_INS_QVSTFCSUXI = 505;; let _PPC_INS_QVSTFCSUXIA = 506;; let _PPC_INS_QVSTFCSX = 507;; let _PPC_INS_QVSTFCSXA = 508;; let _PPC_INS_QVSTFCSXI = 509;; let _PPC_INS_QVSTFCSXIA = 510;; let _PPC_INS_QVSTFDUX = 511;; let _PPC_INS_QVSTFDUXA = 512;; let _PPC_INS_QVSTFDUXI = 513;; let _PPC_INS_QVSTFDUXIA = 514;; let _PPC_INS_QVSTFDX = 515;; let _PPC_INS_QVSTFDXA = 516;; let _PPC_INS_QVSTFDXI = 517;; let _PPC_INS_QVSTFDXIA = 518;; let _PPC_INS_QVSTFIWX = 519;; let _PPC_INS_QVSTFIWXA = 520;; let _PPC_INS_QVSTFSUX = 521;; let _PPC_INS_QVSTFSUXA = 522;; let _PPC_INS_QVSTFSUXI = 523;; let _PPC_INS_QVSTFSUXIA = 524;; let _PPC_INS_QVSTFSX = 525;; let _PPC_INS_QVSTFSXA = 526;; let _PPC_INS_QVSTFSXI = 527;; let _PPC_INS_QVSTFSXIA = 528;; let _PPC_INS_RFCI = 529;; let _PPC_INS_RFDI = 530;; let _PPC_INS_RFI = 531;; let _PPC_INS_RFID = 532;; let _PPC_INS_RFMCI = 533;; let _PPC_INS_RLDCL = 534;; let _PPC_INS_RLDCR = 535;; let _PPC_INS_RLDIC = 536;; let _PPC_INS_RLDICL = 537;; let _PPC_INS_RLDICR = 538;; let _PPC_INS_RLDIMI = 539;; let _PPC_INS_RLWIMI = 540;; let _PPC_INS_RLWINM = 541;; let _PPC_INS_RLWNM = 542;; let _PPC_INS_SC = 543;; let _PPC_INS_SLBIA = 544;; let _PPC_INS_SLBIE = 545;; let _PPC_INS_SLBMFEE = 546;; let _PPC_INS_SLBMTE = 547;; let _PPC_INS_SLD = 548;; let _PPC_INS_SLW = 549;; let _PPC_INS_SRAD = 550;; let _PPC_INS_SRADI = 551;; let _PPC_INS_SRAW = 552;; let _PPC_INS_SRAWI = 553;; let _PPC_INS_SRD = 554;; let _PPC_INS_SRW = 555;; let _PPC_INS_STB = 556;; let _PPC_INS_STBCIX = 557;; let _PPC_INS_STBU = 558;; let _PPC_INS_STBUX = 559;; let _PPC_INS_STBX = 560;; let _PPC_INS_STD = 561;; let _PPC_INS_STDBRX = 562;; let _PPC_INS_STDCIX = 563;; let _PPC_INS_STDCX = 564;; let _PPC_INS_STDU = 565;; let _PPC_INS_STDUX = 566;; let _PPC_INS_STDX = 567;; let _PPC_INS_STFD = 568;; let _PPC_INS_STFDU = 569;; let _PPC_INS_STFDUX = 570;; let _PPC_INS_STFDX = 571;; let _PPC_INS_STFIWX = 572;; let _PPC_INS_STFS = 573;; let _PPC_INS_STFSU = 574;; let _PPC_INS_STFSUX = 575;; let _PPC_INS_STFSX = 576;; let _PPC_INS_STH = 577;; let _PPC_INS_STHBRX = 578;; let _PPC_INS_STHCIX = 579;; let _PPC_INS_STHU = 580;; let _PPC_INS_STHUX = 581;; let _PPC_INS_STHX = 582;; let _PPC_INS_STMW = 583;; let _PPC_INS_STSWI = 584;; let _PPC_INS_STVEBX = 585;; let _PPC_INS_STVEHX = 586;; let _PPC_INS_STVEWX = 587;; let _PPC_INS_STVX = 588;; let _PPC_INS_STVXL = 589;; let _PPC_INS_STW = 590;; let _PPC_INS_STWBRX = 591;; let _PPC_INS_STWCIX = 592;; let _PPC_INS_STWCX = 593;; let _PPC_INS_STWU = 594;; let _PPC_INS_STWUX = 595;; let _PPC_INS_STWX = 596;; let _PPC_INS_STXSDX = 597;; let _PPC_INS_STXVD2X = 598;; let _PPC_INS_STXVW4X = 599;; let _PPC_INS_SUBF = 600;; let _PPC_INS_SUBFC = 601;; let _PPC_INS_SUBFE = 602;; let _PPC_INS_SUBFIC = 603;; let _PPC_INS_SUBFME = 604;; let _PPC_INS_SUBFZE = 605;; let _PPC_INS_SYNC = 606;; let _PPC_INS_TD = 607;; let _PPC_INS_TDI = 608;; let _PPC_INS_TLBIA = 609;; let _PPC_INS_TLBIE = 610;; let _PPC_INS_TLBIEL = 611;; let _PPC_INS_TLBIVAX = 612;; let _PPC_INS_TLBLD = 613;; let _PPC_INS_TLBLI = 614;; let _PPC_INS_TLBRE = 615;; let _PPC_INS_TLBSX = 616;; let _PPC_INS_TLBSYNC = 617;; let _PPC_INS_TLBWE = 618;; let _PPC_INS_TRAP = 619;; let _PPC_INS_TW = 620;; let _PPC_INS_TWI = 621;; let _PPC_INS_VADDCUW = 622;; let _PPC_INS_VADDFP = 623;; let _PPC_INS_VADDSBS = 624;; let _PPC_INS_VADDSHS = 625;; let _PPC_INS_VADDSWS = 626;; let _PPC_INS_VADDUBM = 627;; let _PPC_INS_VADDUBS = 628;; let _PPC_INS_VADDUDM = 629;; let _PPC_INS_VADDUHM = 630;; let _PPC_INS_VADDUHS = 631;; let _PPC_INS_VADDUWM = 632;; let _PPC_INS_VADDUWS = 633;; let _PPC_INS_VAND = 634;; let _PPC_INS_VANDC = 635;; let _PPC_INS_VAVGSB = 636;; let _PPC_INS_VAVGSH = 637;; let _PPC_INS_VAVGSW = 638;; let _PPC_INS_VAVGUB = 639;; let _PPC_INS_VAVGUH = 640;; let _PPC_INS_VAVGUW = 641;; let _PPC_INS_VCFSX = 642;; let _PPC_INS_VCFUX = 643;; let _PPC_INS_VCLZB = 644;; let _PPC_INS_VCLZD = 645;; let _PPC_INS_VCLZH = 646;; let _PPC_INS_VCLZW = 647;; let _PPC_INS_VCMPBFP = 648;; let _PPC_INS_VCMPEQFP = 649;; let _PPC_INS_VCMPEQUB = 650;; let _PPC_INS_VCMPEQUD = 651;; let _PPC_INS_VCMPEQUH = 652;; let _PPC_INS_VCMPEQUW = 653;; let _PPC_INS_VCMPGEFP = 654;; let _PPC_INS_VCMPGTFP = 655;; let _PPC_INS_VCMPGTSB = 656;; let _PPC_INS_VCMPGTSD = 657;; let _PPC_INS_VCMPGTSH = 658;; let _PPC_INS_VCMPGTSW = 659;; let _PPC_INS_VCMPGTUB = 660;; let _PPC_INS_VCMPGTUD = 661;; let _PPC_INS_VCMPGTUH = 662;; let _PPC_INS_VCMPGTUW = 663;; let _PPC_INS_VCTSXS = 664;; let _PPC_INS_VCTUXS = 665;; let _PPC_INS_VEQV = 666;; let _PPC_INS_VEXPTEFP = 667;; let _PPC_INS_VLOGEFP = 668;; let _PPC_INS_VMADDFP = 669;; let _PPC_INS_VMAXFP = 670;; let _PPC_INS_VMAXSB = 671;; let _PPC_INS_VMAXSD = 672;; let _PPC_INS_VMAXSH = 673;; let _PPC_INS_VMAXSW = 674;; let _PPC_INS_VMAXUB = 675;; let _PPC_INS_VMAXUD = 676;; let _PPC_INS_VMAXUH = 677;; let _PPC_INS_VMAXUW = 678;; let _PPC_INS_VMHADDSHS = 679;; let _PPC_INS_VMHRADDSHS = 680;; let _PPC_INS_VMINUD = 681;; let _PPC_INS_VMINFP = 682;; let _PPC_INS_VMINSB = 683;; let _PPC_INS_VMINSD = 684;; let _PPC_INS_VMINSH = 685;; let _PPC_INS_VMINSW = 686;; let _PPC_INS_VMINUB = 687;; let _PPC_INS_VMINUH = 688;; let _PPC_INS_VMINUW = 689;; let _PPC_INS_VMLADDUHM = 690;; let _PPC_INS_VMRGHB = 691;; let _PPC_INS_VMRGHH = 692;; let _PPC_INS_VMRGHW = 693;; let _PPC_INS_VMRGLB = 694;; let _PPC_INS_VMRGLH = 695;; let _PPC_INS_VMRGLW = 696;; let _PPC_INS_VMSUMMBM = 697;; let _PPC_INS_VMSUMSHM = 698;; let _PPC_INS_VMSUMSHS = 699;; let _PPC_INS_VMSUMUBM = 700;; let _PPC_INS_VMSUMUHM = 701;; let _PPC_INS_VMSUMUHS = 702;; let _PPC_INS_VMULESB = 703;; let _PPC_INS_VMULESH = 704;; let _PPC_INS_VMULESW = 705;; let _PPC_INS_VMULEUB = 706;; let _PPC_INS_VMULEUH = 707;; let _PPC_INS_VMULEUW = 708;; let _PPC_INS_VMULOSB = 709;; let _PPC_INS_VMULOSH = 710;; let _PPC_INS_VMULOSW = 711;; let _PPC_INS_VMULOUB = 712;; let _PPC_INS_VMULOUH = 713;; let _PPC_INS_VMULOUW = 714;; let _PPC_INS_VMULUWM = 715;; let _PPC_INS_VNAND = 716;; let _PPC_INS_VNMSUBFP = 717;; let _PPC_INS_VNOR = 718;; let _PPC_INS_VOR = 719;; let _PPC_INS_VORC = 720;; let _PPC_INS_VPERM = 721;; let _PPC_INS_VPKPX = 722;; let _PPC_INS_VPKSHSS = 723;; let _PPC_INS_VPKSHUS = 724;; let _PPC_INS_VPKSWSS = 725;; let _PPC_INS_VPKSWUS = 726;; let _PPC_INS_VPKUHUM = 727;; let _PPC_INS_VPKUHUS = 728;; let _PPC_INS_VPKUWUM = 729;; let _PPC_INS_VPKUWUS = 730;; let _PPC_INS_VPOPCNTB = 731;; let _PPC_INS_VPOPCNTD = 732;; let _PPC_INS_VPOPCNTH = 733;; let _PPC_INS_VPOPCNTW = 734;; let _PPC_INS_VREFP = 735;; let _PPC_INS_VRFIM = 736;; let _PPC_INS_VRFIN = 737;; let _PPC_INS_VRFIP = 738;; let _PPC_INS_VRFIZ = 739;; let _PPC_INS_VRLB = 740;; let _PPC_INS_VRLD = 741;; let _PPC_INS_VRLH = 742;; let _PPC_INS_VRLW = 743;; let _PPC_INS_VRSQRTEFP = 744;; let _PPC_INS_VSEL = 745;; let _PPC_INS_VSL = 746;; let _PPC_INS_VSLB = 747;; let _PPC_INS_VSLD = 748;; let _PPC_INS_VSLDOI = 749;; let _PPC_INS_VSLH = 750;; let _PPC_INS_VSLO = 751;; let _PPC_INS_VSLW = 752;; let _PPC_INS_VSPLTB = 753;; let _PPC_INS_VSPLTH = 754;; let _PPC_INS_VSPLTISB = 755;; let _PPC_INS_VSPLTISH = 756;; let _PPC_INS_VSPLTISW = 757;; let _PPC_INS_VSPLTW = 758;; let _PPC_INS_VSR = 759;; let _PPC_INS_VSRAB = 760;; let _PPC_INS_VSRAD = 761;; let _PPC_INS_VSRAH = 762;; let _PPC_INS_VSRAW = 763;; let _PPC_INS_VSRB = 764;; let _PPC_INS_VSRD = 765;; let _PPC_INS_VSRH = 766;; let _PPC_INS_VSRO = 767;; let _PPC_INS_VSRW = 768;; let _PPC_INS_VSUBCUW = 769;; let _PPC_INS_VSUBFP = 770;; let _PPC_INS_VSUBSBS = 771;; let _PPC_INS_VSUBSHS = 772;; let _PPC_INS_VSUBSWS = 773;; let _PPC_INS_VSUBUBM = 774;; let _PPC_INS_VSUBUBS = 775;; let _PPC_INS_VSUBUDM = 776;; let _PPC_INS_VSUBUHM = 777;; let _PPC_INS_VSUBUHS = 778;; let _PPC_INS_VSUBUWM = 779;; let _PPC_INS_VSUBUWS = 780;; let _PPC_INS_VSUM2SWS = 781;; let _PPC_INS_VSUM4SBS = 782;; let _PPC_INS_VSUM4SHS = 783;; let _PPC_INS_VSUM4UBS = 784;; let _PPC_INS_VSUMSWS = 785;; let _PPC_INS_VUPKHPX = 786;; let _PPC_INS_VUPKHSB = 787;; let _PPC_INS_VUPKHSH = 788;; let _PPC_INS_VUPKLPX = 789;; let _PPC_INS_VUPKLSB = 790;; let _PPC_INS_VUPKLSH = 791;; let _PPC_INS_VXOR = 792;; let _PPC_INS_WAIT = 793;; let _PPC_INS_WRTEE = 794;; let _PPC_INS_WRTEEI = 795;; let _PPC_INS_XOR = 796;; let _PPC_INS_XORI = 797;; let _PPC_INS_XORIS = 798;; let _PPC_INS_XSABSDP = 799;; let _PPC_INS_XSADDDP = 800;; let _PPC_INS_XSCMPODP = 801;; let _PPC_INS_XSCMPUDP = 802;; let _PPC_INS_XSCPSGNDP = 803;; let _PPC_INS_XSCVDPSP = 804;; let _PPC_INS_XSCVDPSXDS = 805;; let _PPC_INS_XSCVDPSXWS = 806;; let _PPC_INS_XSCVDPUXDS = 807;; let _PPC_INS_XSCVDPUXWS = 808;; let _PPC_INS_XSCVSPDP = 809;; let _PPC_INS_XSCVSXDDP = 810;; let _PPC_INS_XSCVUXDDP = 811;; let _PPC_INS_XSDIVDP = 812;; let _PPC_INS_XSMADDADP = 813;; let _PPC_INS_XSMADDMDP = 814;; let _PPC_INS_XSMAXDP = 815;; let _PPC_INS_XSMINDP = 816;; let _PPC_INS_XSMSUBADP = 817;; let _PPC_INS_XSMSUBMDP = 818;; let _PPC_INS_XSMULDP = 819;; let _PPC_INS_XSNABSDP = 820;; let _PPC_INS_XSNEGDP = 821;; let _PPC_INS_XSNMADDADP = 822;; let _PPC_INS_XSNMADDMDP = 823;; let _PPC_INS_XSNMSUBADP = 824;; let _PPC_INS_XSNMSUBMDP = 825;; let _PPC_INS_XSRDPI = 826;; let _PPC_INS_XSRDPIC = 827;; let _PPC_INS_XSRDPIM = 828;; let _PPC_INS_XSRDPIP = 829;; let _PPC_INS_XSRDPIZ = 830;; let _PPC_INS_XSREDP = 831;; let _PPC_INS_XSRSQRTEDP = 832;; let _PPC_INS_XSSQRTDP = 833;; let _PPC_INS_XSSUBDP = 834;; let _PPC_INS_XSTDIVDP = 835;; let _PPC_INS_XSTSQRTDP = 836;; let _PPC_INS_XVABSDP = 837;; let _PPC_INS_XVABSSP = 838;; let _PPC_INS_XVADDDP = 839;; let _PPC_INS_XVADDSP = 840;; let _PPC_INS_XVCMPEQDP = 841;; let _PPC_INS_XVCMPEQSP = 842;; let _PPC_INS_XVCMPGEDP = 843;; let _PPC_INS_XVCMPGESP = 844;; let _PPC_INS_XVCMPGTDP = 845;; let _PPC_INS_XVCMPGTSP = 846;; let _PPC_INS_XVCPSGNDP = 847;; let _PPC_INS_XVCPSGNSP = 848;; let _PPC_INS_XVCVDPSP = 849;; let _PPC_INS_XVCVDPSXDS = 850;; let _PPC_INS_XVCVDPSXWS = 851;; let _PPC_INS_XVCVDPUXDS = 852;; let _PPC_INS_XVCVDPUXWS = 853;; let _PPC_INS_XVCVSPDP = 854;; let _PPC_INS_XVCVSPSXDS = 855;; let _PPC_INS_XVCVSPSXWS = 856;; let _PPC_INS_XVCVSPUXDS = 857;; let _PPC_INS_XVCVSPUXWS = 858;; let _PPC_INS_XVCVSXDDP = 859;; let _PPC_INS_XVCVSXDSP = 860;; let _PPC_INS_XVCVSXWDP = 861;; let _PPC_INS_XVCVSXWSP = 862;; let _PPC_INS_XVCVUXDDP = 863;; let _PPC_INS_XVCVUXDSP = 864;; let _PPC_INS_XVCVUXWDP = 865;; let _PPC_INS_XVCVUXWSP = 866;; let _PPC_INS_XVDIVDP = 867;; let _PPC_INS_XVDIVSP = 868;; let _PPC_INS_XVMADDADP = 869;; let _PPC_INS_XVMADDASP = 870;; let _PPC_INS_XVMADDMDP = 871;; let _PPC_INS_XVMADDMSP = 872;; let _PPC_INS_XVMAXDP = 873;; let _PPC_INS_XVMAXSP = 874;; let _PPC_INS_XVMINDP = 875;; let _PPC_INS_XVMINSP = 876;; let _PPC_INS_XVMSUBADP = 877;; let _PPC_INS_XVMSUBASP = 878;; let _PPC_INS_XVMSUBMDP = 879;; let _PPC_INS_XVMSUBMSP = 880;; let _PPC_INS_XVMULDP = 881;; let _PPC_INS_XVMULSP = 882;; let _PPC_INS_XVNABSDP = 883;; let _PPC_INS_XVNABSSP = 884;; let _PPC_INS_XVNEGDP = 885;; let _PPC_INS_XVNEGSP = 886;; let _PPC_INS_XVNMADDADP = 887;; let _PPC_INS_XVNMADDASP = 888;; let _PPC_INS_XVNMADDMDP = 889;; let _PPC_INS_XVNMADDMSP = 890;; let _PPC_INS_XVNMSUBADP = 891;; let _PPC_INS_XVNMSUBASP = 892;; let _PPC_INS_XVNMSUBMDP = 893;; let _PPC_INS_XVNMSUBMSP = 894;; let _PPC_INS_XVRDPI = 895;; let _PPC_INS_XVRDPIC = 896;; let _PPC_INS_XVRDPIM = 897;; let _PPC_INS_XVRDPIP = 898;; let _PPC_INS_XVRDPIZ = 899;; let _PPC_INS_XVREDP = 900;; let _PPC_INS_XVRESP = 901;; let _PPC_INS_XVRSPI = 902;; let _PPC_INS_XVRSPIC = 903;; let _PPC_INS_XVRSPIM = 904;; let _PPC_INS_XVRSPIP = 905;; let _PPC_INS_XVRSPIZ = 906;; let _PPC_INS_XVRSQRTEDP = 907;; let _PPC_INS_XVRSQRTESP = 908;; let _PPC_INS_XVSQRTDP = 909;; let _PPC_INS_XVSQRTSP = 910;; let _PPC_INS_XVSUBDP = 911;; let _PPC_INS_XVSUBSP = 912;; let _PPC_INS_XVTDIVDP = 913;; let _PPC_INS_XVTDIVSP = 914;; let _PPC_INS_XVTSQRTDP = 915;; let _PPC_INS_XVTSQRTSP = 916;; let _PPC_INS_XXLAND = 917;; let _PPC_INS_XXLANDC = 918;; let _PPC_INS_XXLEQV = 919;; let _PPC_INS_XXLNAND = 920;; let _PPC_INS_XXLNOR = 921;; let _PPC_INS_XXLOR = 922;; let _PPC_INS_XXLORC = 923;; let _PPC_INS_XXLXOR = 924;; let _PPC_INS_XXMRGHW = 925;; let _PPC_INS_XXMRGLW = 926;; let _PPC_INS_XXPERMDI = 927;; let _PPC_INS_XXSEL = 928;; let _PPC_INS_XXSLDWI = 929;; let _PPC_INS_XXSPLTW = 930;; let _PPC_INS_BCA = 931;; let _PPC_INS_BCLA = 932;; let _PPC_INS_SLWI = 933;; let _PPC_INS_SRWI = 934;; let _PPC_INS_SLDI = 935;; let _PPC_INS_BTA = 936;; let _PPC_INS_CRSET = 937;; let _PPC_INS_CRNOT = 938;; let _PPC_INS_CRMOVE = 939;; let _PPC_INS_CRCLR = 940;; let _PPC_INS_MFBR0 = 941;; let _PPC_INS_MFBR1 = 942;; let _PPC_INS_MFBR2 = 943;; let _PPC_INS_MFBR3 = 944;; let _PPC_INS_MFBR4 = 945;; let _PPC_INS_MFBR5 = 946;; let _PPC_INS_MFBR6 = 947;; let _PPC_INS_MFBR7 = 948;; let _PPC_INS_MFXER = 949;; let _PPC_INS_MFRTCU = 950;; let _PPC_INS_MFRTCL = 951;; let _PPC_INS_MFDSCR = 952;; let _PPC_INS_MFDSISR = 953;; let _PPC_INS_MFDAR = 954;; let _PPC_INS_MFSRR2 = 955;; let _PPC_INS_MFSRR3 = 956;; let _PPC_INS_MFCFAR = 957;; let _PPC_INS_MFAMR = 958;; let _PPC_INS_MFPID = 959;; let _PPC_INS_MFTBLO = 960;; let _PPC_INS_MFTBHI = 961;; let _PPC_INS_MFDBATU = 962;; let _PPC_INS_MFDBATL = 963;; let _PPC_INS_MFIBATU = 964;; let _PPC_INS_MFIBATL = 965;; let _PPC_INS_MFDCCR = 966;; let _PPC_INS_MFICCR = 967;; let _PPC_INS_MFDEAR = 968;; let _PPC_INS_MFESR = 969;; let _PPC_INS_MFSPEFSCR = 970;; let _PPC_INS_MFTCR = 971;; let _PPC_INS_MFASR = 972;; let _PPC_INS_MFPVR = 973;; let _PPC_INS_MFTBU = 974;; let _PPC_INS_MTCR = 975;; let _PPC_INS_MTBR0 = 976;; let _PPC_INS_MTBR1 = 977;; let _PPC_INS_MTBR2 = 978;; let _PPC_INS_MTBR3 = 979;; let _PPC_INS_MTBR4 = 980;; let _PPC_INS_MTBR5 = 981;; let _PPC_INS_MTBR6 = 982;; let _PPC_INS_MTBR7 = 983;; let _PPC_INS_MTXER = 984;; let _PPC_INS_MTDSCR = 985;; let _PPC_INS_MTDSISR = 986;; let _PPC_INS_MTDAR = 987;; let _PPC_INS_MTSRR2 = 988;; let _PPC_INS_MTSRR3 = 989;; let _PPC_INS_MTCFAR = 990;; let _PPC_INS_MTAMR = 991;; let _PPC_INS_MTPID = 992;; let _PPC_INS_MTTBL = 993;; let _PPC_INS_MTTBU = 994;; let _PPC_INS_MTTBLO = 995;; let _PPC_INS_MTTBHI = 996;; let _PPC_INS_MTDBATU = 997;; let _PPC_INS_MTDBATL = 998;; let _PPC_INS_MTIBATU = 999;; let _PPC_INS_MTIBATL = 1000;; let _PPC_INS_MTDCCR = 1001;; let _PPC_INS_MTICCR = 1002;; let _PPC_INS_MTDEAR = 1003;; let _PPC_INS_MTESR = 1004;; let _PPC_INS_MTSPEFSCR = 1005;; let _PPC_INS_MTTCR = 1006;; let _PPC_INS_NOT = 1007;; let _PPC_INS_MR = 1008;; let _PPC_INS_ROTLD = 1009;; let _PPC_INS_ROTLDI = 1010;; let _PPC_INS_CLRLDI = 1011;; let _PPC_INS_ROTLWI = 1012;; let _PPC_INS_CLRLWI = 1013;; let _PPC_INS_ROTLW = 1014;; let _PPC_INS_SUB = 1015;; let _PPC_INS_SUBC = 1016;; let _PPC_INS_LWSYNC = 1017;; let _PPC_INS_PTESYNC = 1018;; let _PPC_INS_TDLT = 1019;; let _PPC_INS_TDEQ = 1020;; let _PPC_INS_TDGT = 1021;; let _PPC_INS_TDNE = 1022;; let _PPC_INS_TDLLT = 1023;; let _PPC_INS_TDLGT = 1024;; let _PPC_INS_TDU = 1025;; let _PPC_INS_TDLTI = 1026;; let _PPC_INS_TDEQI = 1027;; let _PPC_INS_TDGTI = 1028;; let _PPC_INS_TDNEI = 1029;; let _PPC_INS_TDLLTI = 1030;; let _PPC_INS_TDLGTI = 1031;; let _PPC_INS_TDUI = 1032;; let _PPC_INS_TLBREHI = 1033;; let _PPC_INS_TLBRELO = 1034;; let _PPC_INS_TLBWEHI = 1035;; let _PPC_INS_TLBWELO = 1036;; let _PPC_INS_TWLT = 1037;; let _PPC_INS_TWEQ = 1038;; let _PPC_INS_TWGT = 1039;; let _PPC_INS_TWNE = 1040;; let _PPC_INS_TWLLT = 1041;; let _PPC_INS_TWLGT = 1042;; let _PPC_INS_TWU = 1043;; let _PPC_INS_TWLTI = 1044;; let _PPC_INS_TWEQI = 1045;; let _PPC_INS_TWGTI = 1046;; let _PPC_INS_TWNEI = 1047;; let _PPC_INS_TWLLTI = 1048;; let _PPC_INS_TWLGTI = 1049;; let _PPC_INS_TWUI = 1050;; let _PPC_INS_WAITRSV = 1051;; let _PPC_INS_WAITIMPL = 1052;; let _PPC_INS_XNOP = 1053;; let _PPC_INS_XVMOVDP = 1054;; let _PPC_INS_XVMOVSP = 1055;; let _PPC_INS_XXSPLTD = 1056;; let _PPC_INS_XXMRGHD = 1057;; let _PPC_INS_XXMRGLD = 1058;; let _PPC_INS_XXSWAPD = 1059;; let _PPC_INS_BT = 1060;; let _PPC_INS_BF = 1061;; let _PPC_INS_BDNZT = 1062;; let _PPC_INS_BDNZF = 1063;; let _PPC_INS_BDZF = 1064;; let _PPC_INS_BDZT = 1065;; let _PPC_INS_BFA = 1066;; let _PPC_INS_BDNZTA = 1067;; let _PPC_INS_BDNZFA = 1068;; let _PPC_INS_BDZTA = 1069;; let _PPC_INS_BDZFA = 1070;; let _PPC_INS_BTCTR = 1071;; let _PPC_INS_BFCTR = 1072;; let _PPC_INS_BTCTRL = 1073;; let _PPC_INS_BFCTRL = 1074;; let _PPC_INS_BTL = 1075;; let _PPC_INS_BFL = 1076;; let _PPC_INS_BDNZTL = 1077;; let _PPC_INS_BDNZFL = 1078;; let _PPC_INS_BDZTL = 1079;; let _PPC_INS_BDZFL = 1080;; let _PPC_INS_BTLA = 1081;; let _PPC_INS_BFLA = 1082;; let _PPC_INS_BDNZTLA = 1083;; let _PPC_INS_BDNZFLA = 1084;; let _PPC_INS_BDZTLA = 1085;; let _PPC_INS_BDZFLA = 1086;; let _PPC_INS_BTLR = 1087;; let _PPC_INS_BFLR = 1088;; let _PPC_INS_BDNZTLR = 1089;; let _PPC_INS_BDZTLR = 1090;; let _PPC_INS_BDZFLR = 1091;; let _PPC_INS_BTLRL = 1092;; let _PPC_INS_BFLRL = 1093;; let _PPC_INS_BDNZTLRL = 1094;; let _PPC_INS_BDNZFLRL = 1095;; let _PPC_INS_BDZTLRL = 1096;; let _PPC_INS_BDZFLRL = 1097;; let _PPC_INS_QVFAND = 1098;; let _PPC_INS_QVFCLR = 1099;; let _PPC_INS_QVFANDC = 1100;; let _PPC_INS_QVFCTFB = 1101;; let _PPC_INS_QVFXOR = 1102;; let _PPC_INS_QVFOR = 1103;; let _PPC_INS_QVFNOR = 1104;; let _PPC_INS_QVFEQU = 1105;; let _PPC_INS_QVFNOT = 1106;; let _PPC_INS_QVFORC = 1107;; let _PPC_INS_QVFNAND = 1108;; let _PPC_INS_QVFSET = 1109;; let _PPC_INS_ENDING = 1110;; let _PPC_GRP_INVALID = 0;; let _PPC_GRP_JUMP = 1;; let _PPC_GRP_ALTIVEC = 128;; let _PPC_GRP_MODE32 = 129;; let _PPC_GRP_MODE64 = 130;; let _PPC_GRP_BOOKE = 131;; let _PPC_GRP_NOTBOOKE = 132;; let _PPC_GRP_SPE = 133;; let _PPC_GRP_VSX = 134;; let _PPC_GRP_E500 = 135;; let _PPC_GRP_PPC4XX = 136;; let _PPC_GRP_PPC6XX = 137;; let _PPC_GRP_ICBT = 138;; let _PPC_GRP_P8ALTIVEC = 139;; let _PPC_GRP_P8VECTOR = 140;; let _PPC_GRP_QPX = 141;; let _PPC_GRP_ENDING = 142;; capstone-sys-0.11.0/capstone/bindings/ocaml/sparc.ml010066400017500001750000000006441363402546700206300ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Sparc_const type sparc_op_mem = { base: int; index: int; disp: int; } type sparc_op_value = | SPARC_OP_INVALID of int | SPARC_OP_REG of int | SPARC_OP_IMM of int | SPARC_OP_MEM of sparc_op_mem type sparc_op = { value: sparc_op_value; } type cs_sparc = { cc: int; hint: int; operands: sparc_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/sparc_const.ml010066400017500001750000000276701363402546700220460ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.ml] *) let _SPARC_CC_INVALID = 0;; let _SPARC_CC_ICC_A = 8+256;; let _SPARC_CC_ICC_N = 0+256;; let _SPARC_CC_ICC_NE = 9+256;; let _SPARC_CC_ICC_E = 1+256;; let _SPARC_CC_ICC_G = 10+256;; let _SPARC_CC_ICC_LE = 2+256;; let _SPARC_CC_ICC_GE = 11+256;; let _SPARC_CC_ICC_L = 3+256;; let _SPARC_CC_ICC_GU = 12+256;; let _SPARC_CC_ICC_LEU = 4+256;; let _SPARC_CC_ICC_CC = 13+256;; let _SPARC_CC_ICC_CS = 5+256;; let _SPARC_CC_ICC_POS = 14+256;; let _SPARC_CC_ICC_NEG = 6+256;; let _SPARC_CC_ICC_VC = 15+256;; let _SPARC_CC_ICC_VS = 7+256;; let _SPARC_CC_FCC_A = 8+16+256;; let _SPARC_CC_FCC_N = 0+16+256;; let _SPARC_CC_FCC_U = 7+16+256;; let _SPARC_CC_FCC_G = 6+16+256;; let _SPARC_CC_FCC_UG = 5+16+256;; let _SPARC_CC_FCC_L = 4+16+256;; let _SPARC_CC_FCC_UL = 3+16+256;; let _SPARC_CC_FCC_LG = 2+16+256;; let _SPARC_CC_FCC_NE = 1+16+256;; let _SPARC_CC_FCC_E = 9+16+256;; let _SPARC_CC_FCC_UE = 10+16+256;; let _SPARC_CC_FCC_GE = 11+16+256;; let _SPARC_CC_FCC_UGE = 12+16+256;; let _SPARC_CC_FCC_LE = 13+16+256;; let _SPARC_CC_FCC_ULE = 14+16+256;; let _SPARC_CC_FCC_O = 15+16+256;; let _SPARC_HINT_INVALID = 0;; let _SPARC_HINT_A = 1 lsl 0;; let _SPARC_HINT_PT = 1 lsl 1;; let _SPARC_HINT_PN = 1 lsl 2;; let _SPARC_OP_INVALID = 0;; let _SPARC_OP_REG = 1;; let _SPARC_OP_IMM = 2;; let _SPARC_OP_MEM = 3;; let _SPARC_REG_INVALID = 0;; let _SPARC_REG_F0 = 1;; let _SPARC_REG_F1 = 2;; let _SPARC_REG_F2 = 3;; let _SPARC_REG_F3 = 4;; let _SPARC_REG_F4 = 5;; let _SPARC_REG_F5 = 6;; let _SPARC_REG_F6 = 7;; let _SPARC_REG_F7 = 8;; let _SPARC_REG_F8 = 9;; let _SPARC_REG_F9 = 10;; let _SPARC_REG_F10 = 11;; let _SPARC_REG_F11 = 12;; let _SPARC_REG_F12 = 13;; let _SPARC_REG_F13 = 14;; let _SPARC_REG_F14 = 15;; let _SPARC_REG_F15 = 16;; let _SPARC_REG_F16 = 17;; let _SPARC_REG_F17 = 18;; let _SPARC_REG_F18 = 19;; let _SPARC_REG_F19 = 20;; let _SPARC_REG_F20 = 21;; let _SPARC_REG_F21 = 22;; let _SPARC_REG_F22 = 23;; let _SPARC_REG_F23 = 24;; let _SPARC_REG_F24 = 25;; let _SPARC_REG_F25 = 26;; let _SPARC_REG_F26 = 27;; let _SPARC_REG_F27 = 28;; let _SPARC_REG_F28 = 29;; let _SPARC_REG_F29 = 30;; let _SPARC_REG_F30 = 31;; let _SPARC_REG_F31 = 32;; let _SPARC_REG_F32 = 33;; let _SPARC_REG_F34 = 34;; let _SPARC_REG_F36 = 35;; let _SPARC_REG_F38 = 36;; let _SPARC_REG_F40 = 37;; let _SPARC_REG_F42 = 38;; let _SPARC_REG_F44 = 39;; let _SPARC_REG_F46 = 40;; let _SPARC_REG_F48 = 41;; let _SPARC_REG_F50 = 42;; let _SPARC_REG_F52 = 43;; let _SPARC_REG_F54 = 44;; let _SPARC_REG_F56 = 45;; let _SPARC_REG_F58 = 46;; let _SPARC_REG_F60 = 47;; let _SPARC_REG_F62 = 48;; let _SPARC_REG_FCC0 = 49;; let _SPARC_REG_FCC1 = 50;; let _SPARC_REG_FCC2 = 51;; let _SPARC_REG_FCC3 = 52;; let _SPARC_REG_FP = 53;; let _SPARC_REG_G0 = 54;; let _SPARC_REG_G1 = 55;; let _SPARC_REG_G2 = 56;; let _SPARC_REG_G3 = 57;; let _SPARC_REG_G4 = 58;; let _SPARC_REG_G5 = 59;; let _SPARC_REG_G6 = 60;; let _SPARC_REG_G7 = 61;; let _SPARC_REG_I0 = 62;; let _SPARC_REG_I1 = 63;; let _SPARC_REG_I2 = 64;; let _SPARC_REG_I3 = 65;; let _SPARC_REG_I4 = 66;; let _SPARC_REG_I5 = 67;; let _SPARC_REG_I7 = 68;; let _SPARC_REG_ICC = 69;; let _SPARC_REG_L0 = 70;; let _SPARC_REG_L1 = 71;; let _SPARC_REG_L2 = 72;; let _SPARC_REG_L3 = 73;; let _SPARC_REG_L4 = 74;; let _SPARC_REG_L5 = 75;; let _SPARC_REG_L6 = 76;; let _SPARC_REG_L7 = 77;; let _SPARC_REG_O0 = 78;; let _SPARC_REG_O1 = 79;; let _SPARC_REG_O2 = 80;; let _SPARC_REG_O3 = 81;; let _SPARC_REG_O4 = 82;; let _SPARC_REG_O5 = 83;; let _SPARC_REG_O7 = 84;; let _SPARC_REG_SP = 85;; let _SPARC_REG_Y = 86;; let _SPARC_REG_XCC = 87;; let _SPARC_REG_ENDING = 88;; let _SPARC_REG_O6 = _SPARC_REG_SP;; let _SPARC_REG_I6 = _SPARC_REG_FP;; let _SPARC_INS_INVALID = 0;; let _SPARC_INS_ADDCC = 1;; let _SPARC_INS_ADDX = 2;; let _SPARC_INS_ADDXCC = 3;; let _SPARC_INS_ADDXC = 4;; let _SPARC_INS_ADDXCCC = 5;; let _SPARC_INS_ADD = 6;; let _SPARC_INS_ALIGNADDR = 7;; let _SPARC_INS_ALIGNADDRL = 8;; let _SPARC_INS_ANDCC = 9;; let _SPARC_INS_ANDNCC = 10;; let _SPARC_INS_ANDN = 11;; let _SPARC_INS_AND = 12;; let _SPARC_INS_ARRAY16 = 13;; let _SPARC_INS_ARRAY32 = 14;; let _SPARC_INS_ARRAY8 = 15;; let _SPARC_INS_B = 16;; let _SPARC_INS_JMP = 17;; let _SPARC_INS_BMASK = 18;; let _SPARC_INS_FB = 19;; let _SPARC_INS_BRGEZ = 20;; let _SPARC_INS_BRGZ = 21;; let _SPARC_INS_BRLEZ = 22;; let _SPARC_INS_BRLZ = 23;; let _SPARC_INS_BRNZ = 24;; let _SPARC_INS_BRZ = 25;; let _SPARC_INS_BSHUFFLE = 26;; let _SPARC_INS_CALL = 27;; let _SPARC_INS_CASX = 28;; let _SPARC_INS_CAS = 29;; let _SPARC_INS_CMASK16 = 30;; let _SPARC_INS_CMASK32 = 31;; let _SPARC_INS_CMASK8 = 32;; let _SPARC_INS_CMP = 33;; let _SPARC_INS_EDGE16 = 34;; let _SPARC_INS_EDGE16L = 35;; let _SPARC_INS_EDGE16LN = 36;; let _SPARC_INS_EDGE16N = 37;; let _SPARC_INS_EDGE32 = 38;; let _SPARC_INS_EDGE32L = 39;; let _SPARC_INS_EDGE32LN = 40;; let _SPARC_INS_EDGE32N = 41;; let _SPARC_INS_EDGE8 = 42;; let _SPARC_INS_EDGE8L = 43;; let _SPARC_INS_EDGE8LN = 44;; let _SPARC_INS_EDGE8N = 45;; let _SPARC_INS_FABSD = 46;; let _SPARC_INS_FABSQ = 47;; let _SPARC_INS_FABSS = 48;; let _SPARC_INS_FADDD = 49;; let _SPARC_INS_FADDQ = 50;; let _SPARC_INS_FADDS = 51;; let _SPARC_INS_FALIGNDATA = 52;; let _SPARC_INS_FAND = 53;; let _SPARC_INS_FANDNOT1 = 54;; let _SPARC_INS_FANDNOT1S = 55;; let _SPARC_INS_FANDNOT2 = 56;; let _SPARC_INS_FANDNOT2S = 57;; let _SPARC_INS_FANDS = 58;; let _SPARC_INS_FCHKSM16 = 59;; let _SPARC_INS_FCMPD = 60;; let _SPARC_INS_FCMPEQ16 = 61;; let _SPARC_INS_FCMPEQ32 = 62;; let _SPARC_INS_FCMPGT16 = 63;; let _SPARC_INS_FCMPGT32 = 64;; let _SPARC_INS_FCMPLE16 = 65;; let _SPARC_INS_FCMPLE32 = 66;; let _SPARC_INS_FCMPNE16 = 67;; let _SPARC_INS_FCMPNE32 = 68;; let _SPARC_INS_FCMPQ = 69;; let _SPARC_INS_FCMPS = 70;; let _SPARC_INS_FDIVD = 71;; let _SPARC_INS_FDIVQ = 72;; let _SPARC_INS_FDIVS = 73;; let _SPARC_INS_FDMULQ = 74;; let _SPARC_INS_FDTOI = 75;; let _SPARC_INS_FDTOQ = 76;; let _SPARC_INS_FDTOS = 77;; let _SPARC_INS_FDTOX = 78;; let _SPARC_INS_FEXPAND = 79;; let _SPARC_INS_FHADDD = 80;; let _SPARC_INS_FHADDS = 81;; let _SPARC_INS_FHSUBD = 82;; let _SPARC_INS_FHSUBS = 83;; let _SPARC_INS_FITOD = 84;; let _SPARC_INS_FITOQ = 85;; let _SPARC_INS_FITOS = 86;; let _SPARC_INS_FLCMPD = 87;; let _SPARC_INS_FLCMPS = 88;; let _SPARC_INS_FLUSHW = 89;; let _SPARC_INS_FMEAN16 = 90;; let _SPARC_INS_FMOVD = 91;; let _SPARC_INS_FMOVQ = 92;; let _SPARC_INS_FMOVRDGEZ = 93;; let _SPARC_INS_FMOVRQGEZ = 94;; let _SPARC_INS_FMOVRSGEZ = 95;; let _SPARC_INS_FMOVRDGZ = 96;; let _SPARC_INS_FMOVRQGZ = 97;; let _SPARC_INS_FMOVRSGZ = 98;; let _SPARC_INS_FMOVRDLEZ = 99;; let _SPARC_INS_FMOVRQLEZ = 100;; let _SPARC_INS_FMOVRSLEZ = 101;; let _SPARC_INS_FMOVRDLZ = 102;; let _SPARC_INS_FMOVRQLZ = 103;; let _SPARC_INS_FMOVRSLZ = 104;; let _SPARC_INS_FMOVRDNZ = 105;; let _SPARC_INS_FMOVRQNZ = 106;; let _SPARC_INS_FMOVRSNZ = 107;; let _SPARC_INS_FMOVRDZ = 108;; let _SPARC_INS_FMOVRQZ = 109;; let _SPARC_INS_FMOVRSZ = 110;; let _SPARC_INS_FMOVS = 111;; let _SPARC_INS_FMUL8SUX16 = 112;; let _SPARC_INS_FMUL8ULX16 = 113;; let _SPARC_INS_FMUL8X16 = 114;; let _SPARC_INS_FMUL8X16AL = 115;; let _SPARC_INS_FMUL8X16AU = 116;; let _SPARC_INS_FMULD = 117;; let _SPARC_INS_FMULD8SUX16 = 118;; let _SPARC_INS_FMULD8ULX16 = 119;; let _SPARC_INS_FMULQ = 120;; let _SPARC_INS_FMULS = 121;; let _SPARC_INS_FNADDD = 122;; let _SPARC_INS_FNADDS = 123;; let _SPARC_INS_FNAND = 124;; let _SPARC_INS_FNANDS = 125;; let _SPARC_INS_FNEGD = 126;; let _SPARC_INS_FNEGQ = 127;; let _SPARC_INS_FNEGS = 128;; let _SPARC_INS_FNHADDD = 129;; let _SPARC_INS_FNHADDS = 130;; let _SPARC_INS_FNOR = 131;; let _SPARC_INS_FNORS = 132;; let _SPARC_INS_FNOT1 = 133;; let _SPARC_INS_FNOT1S = 134;; let _SPARC_INS_FNOT2 = 135;; let _SPARC_INS_FNOT2S = 136;; let _SPARC_INS_FONE = 137;; let _SPARC_INS_FONES = 138;; let _SPARC_INS_FOR = 139;; let _SPARC_INS_FORNOT1 = 140;; let _SPARC_INS_FORNOT1S = 141;; let _SPARC_INS_FORNOT2 = 142;; let _SPARC_INS_FORNOT2S = 143;; let _SPARC_INS_FORS = 144;; let _SPARC_INS_FPACK16 = 145;; let _SPARC_INS_FPACK32 = 146;; let _SPARC_INS_FPACKFIX = 147;; let _SPARC_INS_FPADD16 = 148;; let _SPARC_INS_FPADD16S = 149;; let _SPARC_INS_FPADD32 = 150;; let _SPARC_INS_FPADD32S = 151;; let _SPARC_INS_FPADD64 = 152;; let _SPARC_INS_FPMERGE = 153;; let _SPARC_INS_FPSUB16 = 154;; let _SPARC_INS_FPSUB16S = 155;; let _SPARC_INS_FPSUB32 = 156;; let _SPARC_INS_FPSUB32S = 157;; let _SPARC_INS_FQTOD = 158;; let _SPARC_INS_FQTOI = 159;; let _SPARC_INS_FQTOS = 160;; let _SPARC_INS_FQTOX = 161;; let _SPARC_INS_FSLAS16 = 162;; let _SPARC_INS_FSLAS32 = 163;; let _SPARC_INS_FSLL16 = 164;; let _SPARC_INS_FSLL32 = 165;; let _SPARC_INS_FSMULD = 166;; let _SPARC_INS_FSQRTD = 167;; let _SPARC_INS_FSQRTQ = 168;; let _SPARC_INS_FSQRTS = 169;; let _SPARC_INS_FSRA16 = 170;; let _SPARC_INS_FSRA32 = 171;; let _SPARC_INS_FSRC1 = 172;; let _SPARC_INS_FSRC1S = 173;; let _SPARC_INS_FSRC2 = 174;; let _SPARC_INS_FSRC2S = 175;; let _SPARC_INS_FSRL16 = 176;; let _SPARC_INS_FSRL32 = 177;; let _SPARC_INS_FSTOD = 178;; let _SPARC_INS_FSTOI = 179;; let _SPARC_INS_FSTOQ = 180;; let _SPARC_INS_FSTOX = 181;; let _SPARC_INS_FSUBD = 182;; let _SPARC_INS_FSUBQ = 183;; let _SPARC_INS_FSUBS = 184;; let _SPARC_INS_FXNOR = 185;; let _SPARC_INS_FXNORS = 186;; let _SPARC_INS_FXOR = 187;; let _SPARC_INS_FXORS = 188;; let _SPARC_INS_FXTOD = 189;; let _SPARC_INS_FXTOQ = 190;; let _SPARC_INS_FXTOS = 191;; let _SPARC_INS_FZERO = 192;; let _SPARC_INS_FZEROS = 193;; let _SPARC_INS_JMPL = 194;; let _SPARC_INS_LDD = 195;; let _SPARC_INS_LD = 196;; let _SPARC_INS_LDQ = 197;; let _SPARC_INS_LDSB = 198;; let _SPARC_INS_LDSH = 199;; let _SPARC_INS_LDSW = 200;; let _SPARC_INS_LDUB = 201;; let _SPARC_INS_LDUH = 202;; let _SPARC_INS_LDX = 203;; let _SPARC_INS_LZCNT = 204;; let _SPARC_INS_MEMBAR = 205;; let _SPARC_INS_MOVDTOX = 206;; let _SPARC_INS_MOV = 207;; let _SPARC_INS_MOVRGEZ = 208;; let _SPARC_INS_MOVRGZ = 209;; let _SPARC_INS_MOVRLEZ = 210;; let _SPARC_INS_MOVRLZ = 211;; let _SPARC_INS_MOVRNZ = 212;; let _SPARC_INS_MOVRZ = 213;; let _SPARC_INS_MOVSTOSW = 214;; let _SPARC_INS_MOVSTOUW = 215;; let _SPARC_INS_MULX = 216;; let _SPARC_INS_NOP = 217;; let _SPARC_INS_ORCC = 218;; let _SPARC_INS_ORNCC = 219;; let _SPARC_INS_ORN = 220;; let _SPARC_INS_OR = 221;; let _SPARC_INS_PDIST = 222;; let _SPARC_INS_PDISTN = 223;; let _SPARC_INS_POPC = 224;; let _SPARC_INS_RD = 225;; let _SPARC_INS_RESTORE = 226;; let _SPARC_INS_RETT = 227;; let _SPARC_INS_SAVE = 228;; let _SPARC_INS_SDIVCC = 229;; let _SPARC_INS_SDIVX = 230;; let _SPARC_INS_SDIV = 231;; let _SPARC_INS_SETHI = 232;; let _SPARC_INS_SHUTDOWN = 233;; let _SPARC_INS_SIAM = 234;; let _SPARC_INS_SLLX = 235;; let _SPARC_INS_SLL = 236;; let _SPARC_INS_SMULCC = 237;; let _SPARC_INS_SMUL = 238;; let _SPARC_INS_SRAX = 239;; let _SPARC_INS_SRA = 240;; let _SPARC_INS_SRLX = 241;; let _SPARC_INS_SRL = 242;; let _SPARC_INS_STBAR = 243;; let _SPARC_INS_STB = 244;; let _SPARC_INS_STD = 245;; let _SPARC_INS_ST = 246;; let _SPARC_INS_STH = 247;; let _SPARC_INS_STQ = 248;; let _SPARC_INS_STX = 249;; let _SPARC_INS_SUBCC = 250;; let _SPARC_INS_SUBX = 251;; let _SPARC_INS_SUBXCC = 252;; let _SPARC_INS_SUB = 253;; let _SPARC_INS_SWAP = 254;; let _SPARC_INS_TADDCCTV = 255;; let _SPARC_INS_TADDCC = 256;; let _SPARC_INS_T = 257;; let _SPARC_INS_TSUBCCTV = 258;; let _SPARC_INS_TSUBCC = 259;; let _SPARC_INS_UDIVCC = 260;; let _SPARC_INS_UDIVX = 261;; let _SPARC_INS_UDIV = 262;; let _SPARC_INS_UMULCC = 263;; let _SPARC_INS_UMULXHI = 264;; let _SPARC_INS_UMUL = 265;; let _SPARC_INS_UNIMP = 266;; let _SPARC_INS_FCMPED = 267;; let _SPARC_INS_FCMPEQ = 268;; let _SPARC_INS_FCMPES = 269;; let _SPARC_INS_WR = 270;; let _SPARC_INS_XMULX = 271;; let _SPARC_INS_XMULXHI = 272;; let _SPARC_INS_XNORCC = 273;; let _SPARC_INS_XNOR = 274;; let _SPARC_INS_XORCC = 275;; let _SPARC_INS_XOR = 276;; let _SPARC_INS_RET = 277;; let _SPARC_INS_RETL = 278;; let _SPARC_INS_ENDING = 279;; let _SPARC_GRP_INVALID = 0;; let _SPARC_GRP_JUMP = 1;; let _SPARC_GRP_HARDQUAD = 128;; let _SPARC_GRP_V9 = 129;; let _SPARC_GRP_VIS = 130;; let _SPARC_GRP_VIS2 = 131;; let _SPARC_GRP_VIS3 = 132;; let _SPARC_GRP_32BIT = 133;; let _SPARC_GRP_64BIT = 134;; let _SPARC_GRP_ENDING = 135;; capstone-sys-0.11.0/capstone/bindings/ocaml/systemz.ml010066400017500001750000000006651363402546700212410ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Sysz_const type sysz_op_mem = { base: int; index: int; length: int64; disp: int64; } type sysz_op_value = | SYSZ_OP_INVALID of int | SYSZ_OP_REG of int | SYSZ_OP_ACREG of int | SYSZ_OP_IMM of int | SYSZ_OP_MEM of sysz_op_mem type sysz_op = { value: sysz_op_value; } type cs_sysz = { cc: int; operands: sysz_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/sysz_const.ml010066400017500001750000000474571363402546700217530ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sysz_const.ml] *) let _SYSZ_CC_INVALID = 0;; let _SYSZ_CC_O = 1;; let _SYSZ_CC_H = 2;; let _SYSZ_CC_NLE = 3;; let _SYSZ_CC_L = 4;; let _SYSZ_CC_NHE = 5;; let _SYSZ_CC_LH = 6;; let _SYSZ_CC_NE = 7;; let _SYSZ_CC_E = 8;; let _SYSZ_CC_NLH = 9;; let _SYSZ_CC_HE = 10;; let _SYSZ_CC_NL = 11;; let _SYSZ_CC_LE = 12;; let _SYSZ_CC_NH = 13;; let _SYSZ_CC_NO = 14;; let _SYSZ_OP_INVALID = 0;; let _SYSZ_OP_REG = 1;; let _SYSZ_OP_IMM = 2;; let _SYSZ_OP_MEM = 3;; let _SYSZ_OP_ACREG = 64;; let _SYSZ_REG_INVALID = 0;; let _SYSZ_REG_0 = 1;; let _SYSZ_REG_1 = 2;; let _SYSZ_REG_2 = 3;; let _SYSZ_REG_3 = 4;; let _SYSZ_REG_4 = 5;; let _SYSZ_REG_5 = 6;; let _SYSZ_REG_6 = 7;; let _SYSZ_REG_7 = 8;; let _SYSZ_REG_8 = 9;; let _SYSZ_REG_9 = 10;; let _SYSZ_REG_10 = 11;; let _SYSZ_REG_11 = 12;; let _SYSZ_REG_12 = 13;; let _SYSZ_REG_13 = 14;; let _SYSZ_REG_14 = 15;; let _SYSZ_REG_15 = 16;; let _SYSZ_REG_CC = 17;; let _SYSZ_REG_F0 = 18;; let _SYSZ_REG_F1 = 19;; let _SYSZ_REG_F2 = 20;; let _SYSZ_REG_F3 = 21;; let _SYSZ_REG_F4 = 22;; let _SYSZ_REG_F5 = 23;; let _SYSZ_REG_F6 = 24;; let _SYSZ_REG_F7 = 25;; let _SYSZ_REG_F8 = 26;; let _SYSZ_REG_F9 = 27;; let _SYSZ_REG_F10 = 28;; let _SYSZ_REG_F11 = 29;; let _SYSZ_REG_F12 = 30;; let _SYSZ_REG_F13 = 31;; let _SYSZ_REG_F14 = 32;; let _SYSZ_REG_F15 = 33;; let _SYSZ_REG_R0L = 34;; let _SYSZ_REG_ENDING = 35;; let _SYSZ_INS_INVALID = 0;; let _SYSZ_INS_A = 1;; let _SYSZ_INS_ADB = 2;; let _SYSZ_INS_ADBR = 3;; let _SYSZ_INS_AEB = 4;; let _SYSZ_INS_AEBR = 5;; let _SYSZ_INS_AFI = 6;; let _SYSZ_INS_AG = 7;; let _SYSZ_INS_AGF = 8;; let _SYSZ_INS_AGFI = 9;; let _SYSZ_INS_AGFR = 10;; let _SYSZ_INS_AGHI = 11;; let _SYSZ_INS_AGHIK = 12;; let _SYSZ_INS_AGR = 13;; let _SYSZ_INS_AGRK = 14;; let _SYSZ_INS_AGSI = 15;; let _SYSZ_INS_AH = 16;; let _SYSZ_INS_AHI = 17;; let _SYSZ_INS_AHIK = 18;; let _SYSZ_INS_AHY = 19;; let _SYSZ_INS_AIH = 20;; let _SYSZ_INS_AL = 21;; let _SYSZ_INS_ALC = 22;; let _SYSZ_INS_ALCG = 23;; let _SYSZ_INS_ALCGR = 24;; let _SYSZ_INS_ALCR = 25;; let _SYSZ_INS_ALFI = 26;; let _SYSZ_INS_ALG = 27;; let _SYSZ_INS_ALGF = 28;; let _SYSZ_INS_ALGFI = 29;; let _SYSZ_INS_ALGFR = 30;; let _SYSZ_INS_ALGHSIK = 31;; let _SYSZ_INS_ALGR = 32;; let _SYSZ_INS_ALGRK = 33;; let _SYSZ_INS_ALHSIK = 34;; let _SYSZ_INS_ALR = 35;; let _SYSZ_INS_ALRK = 36;; let _SYSZ_INS_ALY = 37;; let _SYSZ_INS_AR = 38;; let _SYSZ_INS_ARK = 39;; let _SYSZ_INS_ASI = 40;; let _SYSZ_INS_AXBR = 41;; let _SYSZ_INS_AY = 42;; let _SYSZ_INS_BCR = 43;; let _SYSZ_INS_BRC = 44;; let _SYSZ_INS_BRCL = 45;; let _SYSZ_INS_CGIJ = 46;; let _SYSZ_INS_CGRJ = 47;; let _SYSZ_INS_CIJ = 48;; let _SYSZ_INS_CLGIJ = 49;; let _SYSZ_INS_CLGRJ = 50;; let _SYSZ_INS_CLIJ = 51;; let _SYSZ_INS_CLRJ = 52;; let _SYSZ_INS_CRJ = 53;; let _SYSZ_INS_BER = 54;; let _SYSZ_INS_JE = 55;; let _SYSZ_INS_JGE = 56;; let _SYSZ_INS_LOCE = 57;; let _SYSZ_INS_LOCGE = 58;; let _SYSZ_INS_LOCGRE = 59;; let _SYSZ_INS_LOCRE = 60;; let _SYSZ_INS_STOCE = 61;; let _SYSZ_INS_STOCGE = 62;; let _SYSZ_INS_BHR = 63;; let _SYSZ_INS_BHER = 64;; let _SYSZ_INS_JHE = 65;; let _SYSZ_INS_JGHE = 66;; let _SYSZ_INS_LOCHE = 67;; let _SYSZ_INS_LOCGHE = 68;; let _SYSZ_INS_LOCGRHE = 69;; let _SYSZ_INS_LOCRHE = 70;; let _SYSZ_INS_STOCHE = 71;; let _SYSZ_INS_STOCGHE = 72;; let _SYSZ_INS_JH = 73;; let _SYSZ_INS_JGH = 74;; let _SYSZ_INS_LOCH = 75;; let _SYSZ_INS_LOCGH = 76;; let _SYSZ_INS_LOCGRH = 77;; let _SYSZ_INS_LOCRH = 78;; let _SYSZ_INS_STOCH = 79;; let _SYSZ_INS_STOCGH = 80;; let _SYSZ_INS_CGIJNLH = 81;; let _SYSZ_INS_CGRJNLH = 82;; let _SYSZ_INS_CIJNLH = 83;; let _SYSZ_INS_CLGIJNLH = 84;; let _SYSZ_INS_CLGRJNLH = 85;; let _SYSZ_INS_CLIJNLH = 86;; let _SYSZ_INS_CLRJNLH = 87;; let _SYSZ_INS_CRJNLH = 88;; let _SYSZ_INS_CGIJE = 89;; let _SYSZ_INS_CGRJE = 90;; let _SYSZ_INS_CIJE = 91;; let _SYSZ_INS_CLGIJE = 92;; let _SYSZ_INS_CLGRJE = 93;; let _SYSZ_INS_CLIJE = 94;; let _SYSZ_INS_CLRJE = 95;; let _SYSZ_INS_CRJE = 96;; let _SYSZ_INS_CGIJNLE = 97;; let _SYSZ_INS_CGRJNLE = 98;; let _SYSZ_INS_CIJNLE = 99;; let _SYSZ_INS_CLGIJNLE = 100;; let _SYSZ_INS_CLGRJNLE = 101;; let _SYSZ_INS_CLIJNLE = 102;; let _SYSZ_INS_CLRJNLE = 103;; let _SYSZ_INS_CRJNLE = 104;; let _SYSZ_INS_CGIJH = 105;; let _SYSZ_INS_CGRJH = 106;; let _SYSZ_INS_CIJH = 107;; let _SYSZ_INS_CLGIJH = 108;; let _SYSZ_INS_CLGRJH = 109;; let _SYSZ_INS_CLIJH = 110;; let _SYSZ_INS_CLRJH = 111;; let _SYSZ_INS_CRJH = 112;; let _SYSZ_INS_CGIJNL = 113;; let _SYSZ_INS_CGRJNL = 114;; let _SYSZ_INS_CIJNL = 115;; let _SYSZ_INS_CLGIJNL = 116;; let _SYSZ_INS_CLGRJNL = 117;; let _SYSZ_INS_CLIJNL = 118;; let _SYSZ_INS_CLRJNL = 119;; let _SYSZ_INS_CRJNL = 120;; let _SYSZ_INS_CGIJHE = 121;; let _SYSZ_INS_CGRJHE = 122;; let _SYSZ_INS_CIJHE = 123;; let _SYSZ_INS_CLGIJHE = 124;; let _SYSZ_INS_CLGRJHE = 125;; let _SYSZ_INS_CLIJHE = 126;; let _SYSZ_INS_CLRJHE = 127;; let _SYSZ_INS_CRJHE = 128;; let _SYSZ_INS_CGIJNHE = 129;; let _SYSZ_INS_CGRJNHE = 130;; let _SYSZ_INS_CIJNHE = 131;; let _SYSZ_INS_CLGIJNHE = 132;; let _SYSZ_INS_CLGRJNHE = 133;; let _SYSZ_INS_CLIJNHE = 134;; let _SYSZ_INS_CLRJNHE = 135;; let _SYSZ_INS_CRJNHE = 136;; let _SYSZ_INS_CGIJL = 137;; let _SYSZ_INS_CGRJL = 138;; let _SYSZ_INS_CIJL = 139;; let _SYSZ_INS_CLGIJL = 140;; let _SYSZ_INS_CLGRJL = 141;; let _SYSZ_INS_CLIJL = 142;; let _SYSZ_INS_CLRJL = 143;; let _SYSZ_INS_CRJL = 144;; let _SYSZ_INS_CGIJNH = 145;; let _SYSZ_INS_CGRJNH = 146;; let _SYSZ_INS_CIJNH = 147;; let _SYSZ_INS_CLGIJNH = 148;; let _SYSZ_INS_CLGRJNH = 149;; let _SYSZ_INS_CLIJNH = 150;; let _SYSZ_INS_CLRJNH = 151;; let _SYSZ_INS_CRJNH = 152;; let _SYSZ_INS_CGIJLE = 153;; let _SYSZ_INS_CGRJLE = 154;; let _SYSZ_INS_CIJLE = 155;; let _SYSZ_INS_CLGIJLE = 156;; let _SYSZ_INS_CLGRJLE = 157;; let _SYSZ_INS_CLIJLE = 158;; let _SYSZ_INS_CLRJLE = 159;; let _SYSZ_INS_CRJLE = 160;; let _SYSZ_INS_CGIJNE = 161;; let _SYSZ_INS_CGRJNE = 162;; let _SYSZ_INS_CIJNE = 163;; let _SYSZ_INS_CLGIJNE = 164;; let _SYSZ_INS_CLGRJNE = 165;; let _SYSZ_INS_CLIJNE = 166;; let _SYSZ_INS_CLRJNE = 167;; let _SYSZ_INS_CRJNE = 168;; let _SYSZ_INS_CGIJLH = 169;; let _SYSZ_INS_CGRJLH = 170;; let _SYSZ_INS_CIJLH = 171;; let _SYSZ_INS_CLGIJLH = 172;; let _SYSZ_INS_CLGRJLH = 173;; let _SYSZ_INS_CLIJLH = 174;; let _SYSZ_INS_CLRJLH = 175;; let _SYSZ_INS_CRJLH = 176;; let _SYSZ_INS_BLR = 177;; let _SYSZ_INS_BLER = 178;; let _SYSZ_INS_JLE = 179;; let _SYSZ_INS_JGLE = 180;; let _SYSZ_INS_LOCLE = 181;; let _SYSZ_INS_LOCGLE = 182;; let _SYSZ_INS_LOCGRLE = 183;; let _SYSZ_INS_LOCRLE = 184;; let _SYSZ_INS_STOCLE = 185;; let _SYSZ_INS_STOCGLE = 186;; let _SYSZ_INS_BLHR = 187;; let _SYSZ_INS_JLH = 188;; let _SYSZ_INS_JGLH = 189;; let _SYSZ_INS_LOCLH = 190;; let _SYSZ_INS_LOCGLH = 191;; let _SYSZ_INS_LOCGRLH = 192;; let _SYSZ_INS_LOCRLH = 193;; let _SYSZ_INS_STOCLH = 194;; let _SYSZ_INS_STOCGLH = 195;; let _SYSZ_INS_JL = 196;; let _SYSZ_INS_JGL = 197;; let _SYSZ_INS_LOCL = 198;; let _SYSZ_INS_LOCGL = 199;; let _SYSZ_INS_LOCGRL = 200;; let _SYSZ_INS_LOCRL = 201;; let _SYSZ_INS_LOC = 202;; let _SYSZ_INS_LOCG = 203;; let _SYSZ_INS_LOCGR = 204;; let _SYSZ_INS_LOCR = 205;; let _SYSZ_INS_STOCL = 206;; let _SYSZ_INS_STOCGL = 207;; let _SYSZ_INS_BNER = 208;; let _SYSZ_INS_JNE = 209;; let _SYSZ_INS_JGNE = 210;; let _SYSZ_INS_LOCNE = 211;; let _SYSZ_INS_LOCGNE = 212;; let _SYSZ_INS_LOCGRNE = 213;; let _SYSZ_INS_LOCRNE = 214;; let _SYSZ_INS_STOCNE = 215;; let _SYSZ_INS_STOCGNE = 216;; let _SYSZ_INS_BNHR = 217;; let _SYSZ_INS_BNHER = 218;; let _SYSZ_INS_JNHE = 219;; let _SYSZ_INS_JGNHE = 220;; let _SYSZ_INS_LOCNHE = 221;; let _SYSZ_INS_LOCGNHE = 222;; let _SYSZ_INS_LOCGRNHE = 223;; let _SYSZ_INS_LOCRNHE = 224;; let _SYSZ_INS_STOCNHE = 225;; let _SYSZ_INS_STOCGNHE = 226;; let _SYSZ_INS_JNH = 227;; let _SYSZ_INS_JGNH = 228;; let _SYSZ_INS_LOCNH = 229;; let _SYSZ_INS_LOCGNH = 230;; let _SYSZ_INS_LOCGRNH = 231;; let _SYSZ_INS_LOCRNH = 232;; let _SYSZ_INS_STOCNH = 233;; let _SYSZ_INS_STOCGNH = 234;; let _SYSZ_INS_BNLR = 235;; let _SYSZ_INS_BNLER = 236;; let _SYSZ_INS_JNLE = 237;; let _SYSZ_INS_JGNLE = 238;; let _SYSZ_INS_LOCNLE = 239;; let _SYSZ_INS_LOCGNLE = 240;; let _SYSZ_INS_LOCGRNLE = 241;; let _SYSZ_INS_LOCRNLE = 242;; let _SYSZ_INS_STOCNLE = 243;; let _SYSZ_INS_STOCGNLE = 244;; let _SYSZ_INS_BNLHR = 245;; let _SYSZ_INS_JNLH = 246;; let _SYSZ_INS_JGNLH = 247;; let _SYSZ_INS_LOCNLH = 248;; let _SYSZ_INS_LOCGNLH = 249;; let _SYSZ_INS_LOCGRNLH = 250;; let _SYSZ_INS_LOCRNLH = 251;; let _SYSZ_INS_STOCNLH = 252;; let _SYSZ_INS_STOCGNLH = 253;; let _SYSZ_INS_JNL = 254;; let _SYSZ_INS_JGNL = 255;; let _SYSZ_INS_LOCNL = 256;; let _SYSZ_INS_LOCGNL = 257;; let _SYSZ_INS_LOCGRNL = 258;; let _SYSZ_INS_LOCRNL = 259;; let _SYSZ_INS_STOCNL = 260;; let _SYSZ_INS_STOCGNL = 261;; let _SYSZ_INS_BNOR = 262;; let _SYSZ_INS_JNO = 263;; let _SYSZ_INS_JGNO = 264;; let _SYSZ_INS_LOCNO = 265;; let _SYSZ_INS_LOCGNO = 266;; let _SYSZ_INS_LOCGRNO = 267;; let _SYSZ_INS_LOCRNO = 268;; let _SYSZ_INS_STOCNO = 269;; let _SYSZ_INS_STOCGNO = 270;; let _SYSZ_INS_BOR = 271;; let _SYSZ_INS_JO = 272;; let _SYSZ_INS_JGO = 273;; let _SYSZ_INS_LOCO = 274;; let _SYSZ_INS_LOCGO = 275;; let _SYSZ_INS_LOCGRO = 276;; let _SYSZ_INS_LOCRO = 277;; let _SYSZ_INS_STOCO = 278;; let _SYSZ_INS_STOCGO = 279;; let _SYSZ_INS_STOC = 280;; let _SYSZ_INS_STOCG = 281;; let _SYSZ_INS_BASR = 282;; let _SYSZ_INS_BR = 283;; let _SYSZ_INS_BRAS = 284;; let _SYSZ_INS_BRASL = 285;; let _SYSZ_INS_J = 286;; let _SYSZ_INS_JG = 287;; let _SYSZ_INS_BRCT = 288;; let _SYSZ_INS_BRCTG = 289;; let _SYSZ_INS_C = 290;; let _SYSZ_INS_CDB = 291;; let _SYSZ_INS_CDBR = 292;; let _SYSZ_INS_CDFBR = 293;; let _SYSZ_INS_CDGBR = 294;; let _SYSZ_INS_CDLFBR = 295;; let _SYSZ_INS_CDLGBR = 296;; let _SYSZ_INS_CEB = 297;; let _SYSZ_INS_CEBR = 298;; let _SYSZ_INS_CEFBR = 299;; let _SYSZ_INS_CEGBR = 300;; let _SYSZ_INS_CELFBR = 301;; let _SYSZ_INS_CELGBR = 302;; let _SYSZ_INS_CFDBR = 303;; let _SYSZ_INS_CFEBR = 304;; let _SYSZ_INS_CFI = 305;; let _SYSZ_INS_CFXBR = 306;; let _SYSZ_INS_CG = 307;; let _SYSZ_INS_CGDBR = 308;; let _SYSZ_INS_CGEBR = 309;; let _SYSZ_INS_CGF = 310;; let _SYSZ_INS_CGFI = 311;; let _SYSZ_INS_CGFR = 312;; let _SYSZ_INS_CGFRL = 313;; let _SYSZ_INS_CGH = 314;; let _SYSZ_INS_CGHI = 315;; let _SYSZ_INS_CGHRL = 316;; let _SYSZ_INS_CGHSI = 317;; let _SYSZ_INS_CGR = 318;; let _SYSZ_INS_CGRL = 319;; let _SYSZ_INS_CGXBR = 320;; let _SYSZ_INS_CH = 321;; let _SYSZ_INS_CHF = 322;; let _SYSZ_INS_CHHSI = 323;; let _SYSZ_INS_CHI = 324;; let _SYSZ_INS_CHRL = 325;; let _SYSZ_INS_CHSI = 326;; let _SYSZ_INS_CHY = 327;; let _SYSZ_INS_CIH = 328;; let _SYSZ_INS_CL = 329;; let _SYSZ_INS_CLC = 330;; let _SYSZ_INS_CLFDBR = 331;; let _SYSZ_INS_CLFEBR = 332;; let _SYSZ_INS_CLFHSI = 333;; let _SYSZ_INS_CLFI = 334;; let _SYSZ_INS_CLFXBR = 335;; let _SYSZ_INS_CLG = 336;; let _SYSZ_INS_CLGDBR = 337;; let _SYSZ_INS_CLGEBR = 338;; let _SYSZ_INS_CLGF = 339;; let _SYSZ_INS_CLGFI = 340;; let _SYSZ_INS_CLGFR = 341;; let _SYSZ_INS_CLGFRL = 342;; let _SYSZ_INS_CLGHRL = 343;; let _SYSZ_INS_CLGHSI = 344;; let _SYSZ_INS_CLGR = 345;; let _SYSZ_INS_CLGRL = 346;; let _SYSZ_INS_CLGXBR = 347;; let _SYSZ_INS_CLHF = 348;; let _SYSZ_INS_CLHHSI = 349;; let _SYSZ_INS_CLHRL = 350;; let _SYSZ_INS_CLI = 351;; let _SYSZ_INS_CLIH = 352;; let _SYSZ_INS_CLIY = 353;; let _SYSZ_INS_CLR = 354;; let _SYSZ_INS_CLRL = 355;; let _SYSZ_INS_CLST = 356;; let _SYSZ_INS_CLY = 357;; let _SYSZ_INS_CPSDR = 358;; let _SYSZ_INS_CR = 359;; let _SYSZ_INS_CRL = 360;; let _SYSZ_INS_CS = 361;; let _SYSZ_INS_CSG = 362;; let _SYSZ_INS_CSY = 363;; let _SYSZ_INS_CXBR = 364;; let _SYSZ_INS_CXFBR = 365;; let _SYSZ_INS_CXGBR = 366;; let _SYSZ_INS_CXLFBR = 367;; let _SYSZ_INS_CXLGBR = 368;; let _SYSZ_INS_CY = 369;; let _SYSZ_INS_DDB = 370;; let _SYSZ_INS_DDBR = 371;; let _SYSZ_INS_DEB = 372;; let _SYSZ_INS_DEBR = 373;; let _SYSZ_INS_DL = 374;; let _SYSZ_INS_DLG = 375;; let _SYSZ_INS_DLGR = 376;; let _SYSZ_INS_DLR = 377;; let _SYSZ_INS_DSG = 378;; let _SYSZ_INS_DSGF = 379;; let _SYSZ_INS_DSGFR = 380;; let _SYSZ_INS_DSGR = 381;; let _SYSZ_INS_DXBR = 382;; let _SYSZ_INS_EAR = 383;; let _SYSZ_INS_FIDBR = 384;; let _SYSZ_INS_FIDBRA = 385;; let _SYSZ_INS_FIEBR = 386;; let _SYSZ_INS_FIEBRA = 387;; let _SYSZ_INS_FIXBR = 388;; let _SYSZ_INS_FIXBRA = 389;; let _SYSZ_INS_FLOGR = 390;; let _SYSZ_INS_IC = 391;; let _SYSZ_INS_ICY = 392;; let _SYSZ_INS_IIHF = 393;; let _SYSZ_INS_IIHH = 394;; let _SYSZ_INS_IIHL = 395;; let _SYSZ_INS_IILF = 396;; let _SYSZ_INS_IILH = 397;; let _SYSZ_INS_IILL = 398;; let _SYSZ_INS_IPM = 399;; let _SYSZ_INS_L = 400;; let _SYSZ_INS_LA = 401;; let _SYSZ_INS_LAA = 402;; let _SYSZ_INS_LAAG = 403;; let _SYSZ_INS_LAAL = 404;; let _SYSZ_INS_LAALG = 405;; let _SYSZ_INS_LAN = 406;; let _SYSZ_INS_LANG = 407;; let _SYSZ_INS_LAO = 408;; let _SYSZ_INS_LAOG = 409;; let _SYSZ_INS_LARL = 410;; let _SYSZ_INS_LAX = 411;; let _SYSZ_INS_LAXG = 412;; let _SYSZ_INS_LAY = 413;; let _SYSZ_INS_LB = 414;; let _SYSZ_INS_LBH = 415;; let _SYSZ_INS_LBR = 416;; let _SYSZ_INS_LCDBR = 417;; let _SYSZ_INS_LCEBR = 418;; let _SYSZ_INS_LCGFR = 419;; let _SYSZ_INS_LCGR = 420;; let _SYSZ_INS_LCR = 421;; let _SYSZ_INS_LCXBR = 422;; let _SYSZ_INS_LD = 423;; let _SYSZ_INS_LDEB = 424;; let _SYSZ_INS_LDEBR = 425;; let _SYSZ_INS_LDGR = 426;; let _SYSZ_INS_LDR = 427;; let _SYSZ_INS_LDXBR = 428;; let _SYSZ_INS_LDXBRA = 429;; let _SYSZ_INS_LDY = 430;; let _SYSZ_INS_LE = 431;; let _SYSZ_INS_LEDBR = 432;; let _SYSZ_INS_LEDBRA = 433;; let _SYSZ_INS_LER = 434;; let _SYSZ_INS_LEXBR = 435;; let _SYSZ_INS_LEXBRA = 436;; let _SYSZ_INS_LEY = 437;; let _SYSZ_INS_LFH = 438;; let _SYSZ_INS_LG = 439;; let _SYSZ_INS_LGB = 440;; let _SYSZ_INS_LGBR = 441;; let _SYSZ_INS_LGDR = 442;; let _SYSZ_INS_LGF = 443;; let _SYSZ_INS_LGFI = 444;; let _SYSZ_INS_LGFR = 445;; let _SYSZ_INS_LGFRL = 446;; let _SYSZ_INS_LGH = 447;; let _SYSZ_INS_LGHI = 448;; let _SYSZ_INS_LGHR = 449;; let _SYSZ_INS_LGHRL = 450;; let _SYSZ_INS_LGR = 451;; let _SYSZ_INS_LGRL = 452;; let _SYSZ_INS_LH = 453;; let _SYSZ_INS_LHH = 454;; let _SYSZ_INS_LHI = 455;; let _SYSZ_INS_LHR = 456;; let _SYSZ_INS_LHRL = 457;; let _SYSZ_INS_LHY = 458;; let _SYSZ_INS_LLC = 459;; let _SYSZ_INS_LLCH = 460;; let _SYSZ_INS_LLCR = 461;; let _SYSZ_INS_LLGC = 462;; let _SYSZ_INS_LLGCR = 463;; let _SYSZ_INS_LLGF = 464;; let _SYSZ_INS_LLGFR = 465;; let _SYSZ_INS_LLGFRL = 466;; let _SYSZ_INS_LLGH = 467;; let _SYSZ_INS_LLGHR = 468;; let _SYSZ_INS_LLGHRL = 469;; let _SYSZ_INS_LLH = 470;; let _SYSZ_INS_LLHH = 471;; let _SYSZ_INS_LLHR = 472;; let _SYSZ_INS_LLHRL = 473;; let _SYSZ_INS_LLIHF = 474;; let _SYSZ_INS_LLIHH = 475;; let _SYSZ_INS_LLIHL = 476;; let _SYSZ_INS_LLILF = 477;; let _SYSZ_INS_LLILH = 478;; let _SYSZ_INS_LLILL = 479;; let _SYSZ_INS_LMG = 480;; let _SYSZ_INS_LNDBR = 481;; let _SYSZ_INS_LNEBR = 482;; let _SYSZ_INS_LNGFR = 483;; let _SYSZ_INS_LNGR = 484;; let _SYSZ_INS_LNR = 485;; let _SYSZ_INS_LNXBR = 486;; let _SYSZ_INS_LPDBR = 487;; let _SYSZ_INS_LPEBR = 488;; let _SYSZ_INS_LPGFR = 489;; let _SYSZ_INS_LPGR = 490;; let _SYSZ_INS_LPR = 491;; let _SYSZ_INS_LPXBR = 492;; let _SYSZ_INS_LR = 493;; let _SYSZ_INS_LRL = 494;; let _SYSZ_INS_LRV = 495;; let _SYSZ_INS_LRVG = 496;; let _SYSZ_INS_LRVGR = 497;; let _SYSZ_INS_LRVR = 498;; let _SYSZ_INS_LT = 499;; let _SYSZ_INS_LTDBR = 500;; let _SYSZ_INS_LTEBR = 501;; let _SYSZ_INS_LTG = 502;; let _SYSZ_INS_LTGF = 503;; let _SYSZ_INS_LTGFR = 504;; let _SYSZ_INS_LTGR = 505;; let _SYSZ_INS_LTR = 506;; let _SYSZ_INS_LTXBR = 507;; let _SYSZ_INS_LXDB = 508;; let _SYSZ_INS_LXDBR = 509;; let _SYSZ_INS_LXEB = 510;; let _SYSZ_INS_LXEBR = 511;; let _SYSZ_INS_LXR = 512;; let _SYSZ_INS_LY = 513;; let _SYSZ_INS_LZDR = 514;; let _SYSZ_INS_LZER = 515;; let _SYSZ_INS_LZXR = 516;; let _SYSZ_INS_MADB = 517;; let _SYSZ_INS_MADBR = 518;; let _SYSZ_INS_MAEB = 519;; let _SYSZ_INS_MAEBR = 520;; let _SYSZ_INS_MDB = 521;; let _SYSZ_INS_MDBR = 522;; let _SYSZ_INS_MDEB = 523;; let _SYSZ_INS_MDEBR = 524;; let _SYSZ_INS_MEEB = 525;; let _SYSZ_INS_MEEBR = 526;; let _SYSZ_INS_MGHI = 527;; let _SYSZ_INS_MH = 528;; let _SYSZ_INS_MHI = 529;; let _SYSZ_INS_MHY = 530;; let _SYSZ_INS_MLG = 531;; let _SYSZ_INS_MLGR = 532;; let _SYSZ_INS_MS = 533;; let _SYSZ_INS_MSDB = 534;; let _SYSZ_INS_MSDBR = 535;; let _SYSZ_INS_MSEB = 536;; let _SYSZ_INS_MSEBR = 537;; let _SYSZ_INS_MSFI = 538;; let _SYSZ_INS_MSG = 539;; let _SYSZ_INS_MSGF = 540;; let _SYSZ_INS_MSGFI = 541;; let _SYSZ_INS_MSGFR = 542;; let _SYSZ_INS_MSGR = 543;; let _SYSZ_INS_MSR = 544;; let _SYSZ_INS_MSY = 545;; let _SYSZ_INS_MVC = 546;; let _SYSZ_INS_MVGHI = 547;; let _SYSZ_INS_MVHHI = 548;; let _SYSZ_INS_MVHI = 549;; let _SYSZ_INS_MVI = 550;; let _SYSZ_INS_MVIY = 551;; let _SYSZ_INS_MVST = 552;; let _SYSZ_INS_MXBR = 553;; let _SYSZ_INS_MXDB = 554;; let _SYSZ_INS_MXDBR = 555;; let _SYSZ_INS_N = 556;; let _SYSZ_INS_NC = 557;; let _SYSZ_INS_NG = 558;; let _SYSZ_INS_NGR = 559;; let _SYSZ_INS_NGRK = 560;; let _SYSZ_INS_NI = 561;; let _SYSZ_INS_NIHF = 562;; let _SYSZ_INS_NIHH = 563;; let _SYSZ_INS_NIHL = 564;; let _SYSZ_INS_NILF = 565;; let _SYSZ_INS_NILH = 566;; let _SYSZ_INS_NILL = 567;; let _SYSZ_INS_NIY = 568;; let _SYSZ_INS_NR = 569;; let _SYSZ_INS_NRK = 570;; let _SYSZ_INS_NY = 571;; let _SYSZ_INS_O = 572;; let _SYSZ_INS_OC = 573;; let _SYSZ_INS_OG = 574;; let _SYSZ_INS_OGR = 575;; let _SYSZ_INS_OGRK = 576;; let _SYSZ_INS_OI = 577;; let _SYSZ_INS_OIHF = 578;; let _SYSZ_INS_OIHH = 579;; let _SYSZ_INS_OIHL = 580;; let _SYSZ_INS_OILF = 581;; let _SYSZ_INS_OILH = 582;; let _SYSZ_INS_OILL = 583;; let _SYSZ_INS_OIY = 584;; let _SYSZ_INS_OR = 585;; let _SYSZ_INS_ORK = 586;; let _SYSZ_INS_OY = 587;; let _SYSZ_INS_PFD = 588;; let _SYSZ_INS_PFDRL = 589;; let _SYSZ_INS_RISBG = 590;; let _SYSZ_INS_RISBHG = 591;; let _SYSZ_INS_RISBLG = 592;; let _SYSZ_INS_RLL = 593;; let _SYSZ_INS_RLLG = 594;; let _SYSZ_INS_RNSBG = 595;; let _SYSZ_INS_ROSBG = 596;; let _SYSZ_INS_RXSBG = 597;; let _SYSZ_INS_S = 598;; let _SYSZ_INS_SDB = 599;; let _SYSZ_INS_SDBR = 600;; let _SYSZ_INS_SEB = 601;; let _SYSZ_INS_SEBR = 602;; let _SYSZ_INS_SG = 603;; let _SYSZ_INS_SGF = 604;; let _SYSZ_INS_SGFR = 605;; let _SYSZ_INS_SGR = 606;; let _SYSZ_INS_SGRK = 607;; let _SYSZ_INS_SH = 608;; let _SYSZ_INS_SHY = 609;; let _SYSZ_INS_SL = 610;; let _SYSZ_INS_SLB = 611;; let _SYSZ_INS_SLBG = 612;; let _SYSZ_INS_SLBR = 613;; let _SYSZ_INS_SLFI = 614;; let _SYSZ_INS_SLG = 615;; let _SYSZ_INS_SLBGR = 616;; let _SYSZ_INS_SLGF = 617;; let _SYSZ_INS_SLGFI = 618;; let _SYSZ_INS_SLGFR = 619;; let _SYSZ_INS_SLGR = 620;; let _SYSZ_INS_SLGRK = 621;; let _SYSZ_INS_SLL = 622;; let _SYSZ_INS_SLLG = 623;; let _SYSZ_INS_SLLK = 624;; let _SYSZ_INS_SLR = 625;; let _SYSZ_INS_SLRK = 626;; let _SYSZ_INS_SLY = 627;; let _SYSZ_INS_SQDB = 628;; let _SYSZ_INS_SQDBR = 629;; let _SYSZ_INS_SQEB = 630;; let _SYSZ_INS_SQEBR = 631;; let _SYSZ_INS_SQXBR = 632;; let _SYSZ_INS_SR = 633;; let _SYSZ_INS_SRA = 634;; let _SYSZ_INS_SRAG = 635;; let _SYSZ_INS_SRAK = 636;; let _SYSZ_INS_SRK = 637;; let _SYSZ_INS_SRL = 638;; let _SYSZ_INS_SRLG = 639;; let _SYSZ_INS_SRLK = 640;; let _SYSZ_INS_SRST = 641;; let _SYSZ_INS_ST = 642;; let _SYSZ_INS_STC = 643;; let _SYSZ_INS_STCH = 644;; let _SYSZ_INS_STCY = 645;; let _SYSZ_INS_STD = 646;; let _SYSZ_INS_STDY = 647;; let _SYSZ_INS_STE = 648;; let _SYSZ_INS_STEY = 649;; let _SYSZ_INS_STFH = 650;; let _SYSZ_INS_STG = 651;; let _SYSZ_INS_STGRL = 652;; let _SYSZ_INS_STH = 653;; let _SYSZ_INS_STHH = 654;; let _SYSZ_INS_STHRL = 655;; let _SYSZ_INS_STHY = 656;; let _SYSZ_INS_STMG = 657;; let _SYSZ_INS_STRL = 658;; let _SYSZ_INS_STRV = 659;; let _SYSZ_INS_STRVG = 660;; let _SYSZ_INS_STY = 661;; let _SYSZ_INS_SXBR = 662;; let _SYSZ_INS_SY = 663;; let _SYSZ_INS_TM = 664;; let _SYSZ_INS_TMHH = 665;; let _SYSZ_INS_TMHL = 666;; let _SYSZ_INS_TMLH = 667;; let _SYSZ_INS_TMLL = 668;; let _SYSZ_INS_TMY = 669;; let _SYSZ_INS_X = 670;; let _SYSZ_INS_XC = 671;; let _SYSZ_INS_XG = 672;; let _SYSZ_INS_XGR = 673;; let _SYSZ_INS_XGRK = 674;; let _SYSZ_INS_XI = 675;; let _SYSZ_INS_XIHF = 676;; let _SYSZ_INS_XILF = 677;; let _SYSZ_INS_XIY = 678;; let _SYSZ_INS_XR = 679;; let _SYSZ_INS_XRK = 680;; let _SYSZ_INS_XY = 681;; let _SYSZ_INS_ENDING = 682;; let _SYSZ_GRP_INVALID = 0;; let _SYSZ_GRP_JUMP = 1;; let _SYSZ_GRP_DISTINCTOPS = 128;; let _SYSZ_GRP_FPEXTENSION = 129;; let _SYSZ_GRP_HIGHWORD = 130;; let _SYSZ_GRP_INTERLOCKEDACCESS1 = 131;; let _SYSZ_GRP_LOADSTOREONCOND = 132;; let _SYSZ_GRP_ENDING = 133;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_arm.ml010066400017500001750000000063621363402546700213410ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Printf open Capstone open Arm open Arm_const let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";; let _ARM_CODE2 = "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c";; let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0";; let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68\x1f\xb1";; let all_tests = [ (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM"); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "Thumb"); (CS_ARCH_ARM, [CS_MODE_THUMB], _ARM_CODE2, "Thumb-mixed"); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "Thumb-2"); ];; let print_op handle i op = ( match op.value with | ARM_OP_INVALID _ -> (); (* this would never happens *) | ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | ARM_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm; | ARM_OP_PIMM imm -> printf "\t\top[%d]: P-IMM = %u\n" i imm; | ARM_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | ARM_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp; | ARM_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.index != 0 then printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index); if mem.scale != 1 then printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale; if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; if mem.lshift != 0 then printf "\t\t\toperands[%u].mem.lshift: 0x%x\n" i mem.lshift; ); | ARM_OP_SETEND sd -> printf "\t\top[%d]: SETEND = %u\n" i sd; ); if op.shift.shift_type != _ARM_SFT_INVALID && op.shift.shift_value > 0 then printf "\t\t\tShift: type = %u, value = %u\n" op.shift.shift_type op.shift.shift_value; ();; let print_detail handle insn = match insn.arch with | CS_INFO_ARM arm -> ( if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then printf "\tCode condition: %u\n" arm.cc; if arm.update_flags then printf "\tUpdate-flags: True\n"; if arm.writeback then printf "\tWriteback: True\n"; (* print all operands info (type & value) *) if (Array.length arm.operands) > 0 then ( printf "\top_count: %d\n" (Array.length arm.operands); Array.iteri (print_op handle) arm.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_arm64.ml010066400017500001750000000057721363402546700215170ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Printf open Capstone open Arm64 open Arm64_const let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b";; let all_tests = [ (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64"); ];; let print_op handle i op = ( match op.value with | ARM64_OP_INVALID _ -> (); (* this would never happens *) | ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | ARM64_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm; | ARM64_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | ARM64_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp; | ARM64_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.index != 0 then printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index); if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; ); | ARM64_OP_REG_MRS reg -> printf "\t\top[%d]: REG_MRS = %u\n" i reg; | ARM64_OP_REG_MSR reg -> printf "\t\top[%d]: REG_MSR = %u\n" i reg; | ARM64_OP_PSTATE v -> printf "\t\top[%d]: PSTATE = %u\n" i v; | ARM64_OP_SYS v -> printf "\t\top[%d]: SYS = %u\n" i v; | ARM64_OP_PREFETCH v -> printf "\t\top[%d]: PREFETCH = %u\n" i v; | ARM64_OP_BARRIER v -> printf "\t\top[%d]: BARRIER = %u\n" i v; ); if op.shift.shift_type != _ARM64_SFT_INVALID && op.shift.shift_value > 0 then printf "\t\t\tShift: type = %u, value = %u\n" op.shift.shift_type op.shift.shift_value; if op.ext != _ARM64_EXT_INVALID then printf "\t\t\tExt: %u\n" op.ext; ();; let print_detail handle insn = match insn.arch with | CS_INFO_ARM64 arm64 -> ( if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then printf "\tCode condition: %u\n" arm64.cc; if arm64.update_flags then printf "\tUpdate-flags: True\n"; if arm64.writeback then printf "\tWriteback: True\n"; (* print all operands info (type & value) *) if (Array.length arm64.operands) > 0 then ( printf "\top_count: %d\n" (Array.length arm64.operands); Array.iteri (print_op handle) arm64.operands; ); printf "\n"; ) | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_basic.ml010066400017500001750000000071531363402546700216420ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Printf open List open Capstone let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";; let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";; let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";; let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";; let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";; let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";; let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";; let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";; let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";; let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";; let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";; let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";; let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";; let all_tests = [ (CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L); (CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT); (CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L); (CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L); (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0L); (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0L); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L); (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L); (CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L); (CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L); (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L); (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0L); (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0L); (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0L); ];; let print_insn insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;; let print_arch x = let (arch, mode, code, comment, syntax) = x in let handle = cs_open arch mode in ( if syntax != 0L then ( let err = cs_option handle CS_OPT_SYNTAX syntax in match err with | _ -> (); ); let insns = cs_disasm handle code 0x1000L 0L in ( printf "*************\n"; printf "Platform: %s\n" comment; List.iter print_insn insns; ); match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; );; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_detail.ml010066400017500001750000000101261363402546700220150ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Printf open List open Capstone let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";; let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";; let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";; let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";; let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";; let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";; let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";; let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";; let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";; let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";; let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";; let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";; let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";; let all_tests = [ (CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0); (CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0); (CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0); (CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0); (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0); (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0); (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0); (CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0); (CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0); (CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0); (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0); (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0); ];; let print_detail handle insn = (* print immediate operands *) if (Array.length insn.regs_read) > 0 then begin printf "\tImplicit registers read: "; Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_read; printf "\n"; end; if (Array.length insn.regs_write) > 0 then begin printf "\tImplicit registers written: "; Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_write; printf "\n"; end; if (Array.length insn.groups) > 0 then begin printf "\tThis instruction belongs to groups: "; Array.iter (printf "%u ") insn.groups; printf "\n"; end; printf "\n";; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment, syntax) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_m680x.ml010066400017500001750000000155661363402546700214520ustar0000000000000000(* Capstone Disassembly Engine * M680X Backend by Wolfgang Schwotzer 2017 *) open Printf open Capstone open M680x open M680x_const let print_char_hex ch = printf " 0x%02x" (Char.code ch) let print_int_hex_short value = printf "%02x" value let print_string_hex comment str = printf "%s" comment; String.iter print_char_hex str; printf "\n" let print_array_hex_short arr = Array.iter print_int_hex_short arr let s_access = [ "UNCHANGED"; "READ"; "WRITE"; "READ | WRITE" ];; let _M6800_CODE = "\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39";; let _M6801_CODE = "\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39";; let _M6805_CODE = "\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe";; let _M6808_CODE = "\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f";; let _HD6301_CODE = "\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39";; let _M6809_CODE = "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00";; let _HD6309_CODE = "\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00";; let _M6811_CODE = "\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f";; let _CPU12_CODE = "\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00";; let _HCS08_CODE = "\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82";; let bit_set value mask = value land mask != 0 let all_tests = [ (CS_ARCH_M680X, [CS_MODE_M680X_6301], _HD6301_CODE, "M680X_HD6301"); (CS_ARCH_M680X, [CS_MODE_M680X_6309], _HD6309_CODE, "M680X_HD6309"); (CS_ARCH_M680X, [CS_MODE_M680X_6800], _M6800_CODE, "M680X_M6800"); (CS_ARCH_M680X, [CS_MODE_M680X_6801], _M6801_CODE, "M680X_M6801"); (CS_ARCH_M680X, [CS_MODE_M680X_6805], _M6805_CODE, "M680X_M68HC05"); (CS_ARCH_M680X, [CS_MODE_M680X_6808], _M6808_CODE, "M680X_M68HC08"); (CS_ARCH_M680X, [CS_MODE_M680X_6809], _M6809_CODE, "M680X_M6809"); (CS_ARCH_M680X, [CS_MODE_M680X_6811], _M6811_CODE, "M680X_M68HC11"); (CS_ARCH_M680X, [CS_MODE_M680X_CPU12], _CPU12_CODE, "M680X_CPU12"); (CS_ARCH_M680X, [CS_MODE_M680X_HCS08], _HCS08_CODE, "M680X_HCS08"); ];; let print_inc_dec inc_dec is_post = ( printf "\t\t\t"; if is_post then printf "post" else printf "pre"; if inc_dec > 0 then printf " increment: %d\n" inc_dec else printf " decrement: %d\n" (abs inc_dec); ); ();; let print_op handle flags i op = ( match op.value with | M680X_OP_INVALID _ -> (); (* this would never happens *) | M680X_OP_REGISTER reg -> ( printf "\t\toperands[%d].type: REGISTER = %s" i (cs_reg_name handle reg); if (((i == 0) && (bit_set flags _M680X_FIRST_OP_IN_MNEM)) || ((i == 1) && (bit_set flags _M680X_SECOND_OP_IN_MNEM))) then printf " (in mnemonic)"; printf "\n"; ); | M680X_OP_IMMEDIATE imm -> printf "\t\toperands[%d].type: IMMEDIATE = #%d\n" i imm; | M680X_OP_DIRECT direct_addr -> printf "\t\toperands[%d].type: DIRECT = 0x%02x\n" i direct_addr; | M680X_OP_EXTENDED ext -> ( printf "\t\toperands[%d].type: EXTENDED " i; if ext.indirect then printf "INDIRECT"; printf " = 0x%04x\n" ext.addr_ext; ); | M680X_OP_RELATIVE rel -> printf "\t\toperands[%d].type: RELATIVE = 0x%04x\n" i rel.addr_rel; | M680X_OP_INDEXED idx -> ( printf "\t\toperands[%d].type: INDEXED" i; if (bit_set idx.flags _M680X_IDX_INDIRECT) then printf " INDIRECT"; printf "\n"; if idx.base_reg != _M680X_REG_INVALID then printf "\t\t\tbase register: %s\n" (cs_reg_name handle idx.base_reg); if idx.offset_reg != _M680X_REG_INVALID then printf "\t\t\toffset register: %s\n" (cs_reg_name handle idx.offset_reg); if idx.offset_bits != 0 && idx.offset_reg == 0 && idx.inc_dec == 0 then begin printf "\t\t\toffset: %d\n" idx.offset; if idx.base_reg == _M680X_REG_PC then printf "\t\t\toffset address: 0x%x\n" idx.offset_addr; printf "\t\t\toffset bits: %u\n" idx.offset_bits; end; if idx.inc_dec != 0 then print_inc_dec idx.inc_dec (bit_set idx.flags _M680X_IDX_POST_INC_DEC); ); | M680X_OP_CONSTANT const_val -> printf "\t\toperands[%d].type: CONSTANT = %d\n" i const_val; ); if op.size != 0 then printf "\t\t\tsize: %d\n" op.size; if op.access != _CS_AC_INVALID then printf "\t\t\taccess: %s\n" (List.nth s_access op.access); ();; let print_detail handle insn = match insn.arch with | CS_INFO_M680X m680x -> ( (* print all operands info (type & value) *) if (Array.length m680x.operands) > 0 then ( printf "\top_count: %d\n" (Array.length m680x.operands); Array.iteri (print_op handle m680x.flags) m680x.operands; ); ); | _ -> (); ;; let print_reg handle reg = printf " %s" (cs_reg_name handle reg) let print_insn handle insn = printf "0x%04x:\t" insn.address; print_array_hex_short insn.bytes; printf "\t%s\t%s\n" insn.mnemonic insn.op_str; print_detail handle insn; if (Array.length insn.regs_read) > 0 then begin printf "\tRegisters read:"; Array.iter (print_reg handle) insn.regs_read; printf "\n"; end; if (Array.length insn.regs_write) > 0 then begin printf "\tRegisters modified:"; Array.iter (print_reg handle) insn.regs_write; printf "\n"; end; if (Array.length insn.groups) > 0 then printf "\tgroups_count: %d\n" (Array.length insn.groups); printf "\n" let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "********************\n"; printf "Platform: %s\n" comment; print_string_hex "Code: " code; printf "Disasm:\n"; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_mips.ml010066400017500001750000000040311363402546700215210ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Printf open Capstone open Mips let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";; let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";; let all_tests = [ (CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)"); (CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)"); ];; let print_op handle i op = ( match op.value with | MIPS_OP_INVALID _ -> (); (* this would never happens *) | MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | MIPS_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | MIPS_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; ); ); ();; let print_detail handle insn = match insn.arch with | CS_INFO_MIPS mips -> ( (* print all operands info (type & value) *) if (Array.length mips.operands) > 0 then ( printf "\top_count: %d\n" (Array.length mips.operands); Array.iteri (print_op handle) mips.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_ppc.ml010066400017500001750000000043761363402546700213470ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Printf open Capstone open Ppc let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";; let all_tests = [ (CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64"); ];; let print_op handle i op = ( match op.value with | PPC_OP_INVALID _ -> (); (* this would never happens *) | PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | PPC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | PPC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; ); | PPC_OP_CRX crx -> ( printf "\t\top[%d]: CRX\n" i; if crx.scale != 0 then printf "\t\t\toperands[%u].crx.scale = %u\n" i crx.scale; if crx.reg != 0 then printf "\t\t\toperands[%u].crx.reg = %s\n" i (cs_reg_name handle crx.reg); if crx.cond != 0 then printf "\t\t\toperands[%u].crx.cond = 0x%x\n" i crx.cond; ); ); ();; let print_detail handle insn = match insn.arch with | CS_INFO_PPC ppc -> ( (* print all operands info (type & value) *) if (Array.length ppc.operands) > 0 then ( printf "\top_count: %d\n" (Array.length ppc.operands); Array.iteri (print_op handle) ppc.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_sparc.ml010066400017500001750000000044571363402546700216750ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Printf open Capstone open Sparc let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";; let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";; let all_tests = [ (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc"); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9"); ];; let print_op handle i op = ( match op.value with | SPARC_OP_INVALID _ -> (); (* this would never happens *) | SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | SPARC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | SPARC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.index != 0 then printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index; if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; ); ); ();; let print_detail handle insn = match insn.arch with | CS_INFO_SPARC sparc -> ( (* print all operands info (type & value) *) if (Array.length sparc.operands) > 0 then ( printf "\top_count: %d\n" (Array.length sparc.operands); Array.iteri (print_op handle) sparc.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_systemz.ml010066400017500001750000000042641363402546700222770ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Printf open Capstone open Systemz let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";; let all_tests = [ (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ"); ];; let print_op handle i op = ( match op.value with | SYSZ_OP_INVALID _ -> (); (* this would never happens *) | SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | SYSZ_OP_ACREG reg -> printf "\t\top[%d]: ACREG = %u\n" i reg; | SYSZ_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | SYSZ_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.index != 0 then printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index; if mem.length != 0L then printf "\t\t\toperands[%u].mem.length: 0x%Lx\n" i mem.length; if mem.disp != 0L then printf "\t\t\toperands[%u].mem.disp: 0x%Lx\n" i mem.disp; ); ); ();; let print_detail handle insn = match insn.arch with | CS_INFO_SYSZ sysz -> ( (* print all operands info (type & value) *) if (Array.length sysz.operands) > 0 then ( printf "\top_count: %d\n" (Array.length sysz.operands); Array.iteri (print_op handle) sysz.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_x86.ml010066400017500001750000000066011363403403300211700ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open Printf open Capstone open X86 open X86_const let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";; let all_tests = [ (CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L); (CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT); (CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L); (CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L); ];; let print_op handle i op = ( match op.value with | X86_OP_INVALID _ -> (); (* this would never happens *) | X86_OP_REG reg -> printf "\t\top[%d]: REG = %s [sz=%d]\n" i (cs_reg_name handle reg) op.size; | X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x [sz=%d]\n" i imm op.size; | X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM [sz=%d]\n" i op.size; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.index != 0 then printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index); if mem.scale != 1 then printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale; if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; ); ); ();; let print_detail handle mode insn = match insn.arch with | CS_INFO_X86 x86 -> ( print_string_hex "\tPrefix: " x86.prefix; (* print instruction's opcode *) print_string_hex "\tOpcode: " x86.opcode; (* print operand's size, address size, displacement size & immediate size *) printf "\taddr_size: %u\n" x86.addr_size; (* print modRM byte *) printf "\tmodrm: 0x%x\n" x86.modrm; (* print displacement value *) if x86.disp != 0 then printf "\tdisp: 0x%x\n" x86.disp; (* SIB is invalid in 16-bit mode *) if not (List.mem CS_MODE_16 mode) then ( (* print SIB byte *) printf "\tsib: 0x%x\n" x86.sib; (* print sib index/scale/base (if applicable) *) if x86.sib_index != _X86_REG_INVALID then printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n" (cs_reg_name handle x86.sib_index) x86.sib_scale (cs_reg_name handle x86.sib_base); ); (* print all operands info (type & value) *) if (Array.length x86.operands) > 0 then ( printf "\top_count: %d\n" (Array.length x86.operands); Array.iteri (print_op handle) x86.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle mode insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle mode insn let print_arch x = let (arch, mode, code, comment, syntax) = x in let handle = cs_open arch mode in ( if syntax != 0L then ( let err = cs_option handle CS_OPT_SYNTAX syntax in match err with | _ -> (); ); let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in ( printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle mode) insns; ); match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; );; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/test_xcore.ml010066400017500001750000000041151363402546700216740ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Printf open Capstone open Xcore let print_string_hex comment str = printf "%s" comment; for i = 0 to (Array.length str - 1) do printf "0x%02x " str.(i) done; printf "\n" let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";; let all_tests = [ (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore"); ];; let print_op handle i op = ( match op.value with | XCORE_OP_INVALID _ -> (); (* this would never happens *) | XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg); | XCORE_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; | XCORE_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; if mem.base != 0 then printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base); if mem.index != 0 then printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index; if mem.disp != 0 then printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp; if mem.direct != 0 then printf "\t\t\toperands[%u].mem.direct: 0x%x\n" i mem.direct; ); ); ();; let print_detail handle insn = match insn.arch with | CS_INFO_XCORE xcore -> ( (* print all operands info (type & value) *) if (Array.length xcore.operands) > 0 then ( printf "\top_count: %d\n" (Array.length xcore.operands); Array.iteri (print_op handle) xcore.operands; ); printf "\n"; ); | _ -> (); ;; let print_insn handle insn = printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; print_detail handle insn let print_arch x = let (arch, mode, code, comment) = x in let handle = cs_open arch mode in let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in match err with | _ -> (); let insns = cs_disasm handle code 0x1000L 0L in printf "*************\n"; printf "Platform: %s\n" comment; List.iter (print_insn handle) insns; match cs_close handle with | 0 -> (); | _ -> printf "Failed to close handle"; ;; List.iter print_arch all_tests;; capstone-sys-0.11.0/capstone/bindings/ocaml/tms320c64x_const.ml010066400017500001750000000211401363402546700224550ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.ml] *) let _TMS320C64X_OP_INVALID = 0;; let _TMS320C64X_OP_REG = 1;; let _TMS320C64X_OP_IMM = 2;; let _TMS320C64X_OP_MEM = 3;; let _TMS320C64X_OP_REGPAIR = 64;; let _TMS320C64X_MEM_DISP_INVALID = 0;; let _TMS320C64X_MEM_DISP_CONSTANT = 1;; let _TMS320C64X_MEM_DISP_REGISTER = 2;; let _TMS320C64X_MEM_DIR_INVALID = 0;; let _TMS320C64X_MEM_DIR_FW = 1;; let _TMS320C64X_MEM_DIR_BW = 2;; let _TMS320C64X_MEM_MOD_INVALID = 0;; let _TMS320C64X_MEM_MOD_NO = 1;; let _TMS320C64X_MEM_MOD_PRE = 2;; let _TMS320C64X_MEM_MOD_POST = 3;; let _TMS320C64X_REG_INVALID = 0;; let _TMS320C64X_REG_AMR = 1;; let _TMS320C64X_REG_CSR = 2;; let _TMS320C64X_REG_DIER = 3;; let _TMS320C64X_REG_DNUM = 4;; let _TMS320C64X_REG_ECR = 5;; let _TMS320C64X_REG_GFPGFR = 6;; let _TMS320C64X_REG_GPLYA = 7;; let _TMS320C64X_REG_GPLYB = 8;; let _TMS320C64X_REG_ICR = 9;; let _TMS320C64X_REG_IER = 10;; let _TMS320C64X_REG_IERR = 11;; let _TMS320C64X_REG_ILC = 12;; let _TMS320C64X_REG_IRP = 13;; let _TMS320C64X_REG_ISR = 14;; let _TMS320C64X_REG_ISTP = 15;; let _TMS320C64X_REG_ITSR = 16;; let _TMS320C64X_REG_NRP = 17;; let _TMS320C64X_REG_NTSR = 18;; let _TMS320C64X_REG_REP = 19;; let _TMS320C64X_REG_RILC = 20;; let _TMS320C64X_REG_SSR = 21;; let _TMS320C64X_REG_TSCH = 22;; let _TMS320C64X_REG_TSCL = 23;; let _TMS320C64X_REG_TSR = 24;; let _TMS320C64X_REG_A0 = 25;; let _TMS320C64X_REG_A1 = 26;; let _TMS320C64X_REG_A2 = 27;; let _TMS320C64X_REG_A3 = 28;; let _TMS320C64X_REG_A4 = 29;; let _TMS320C64X_REG_A5 = 30;; let _TMS320C64X_REG_A6 = 31;; let _TMS320C64X_REG_A7 = 32;; let _TMS320C64X_REG_A8 = 33;; let _TMS320C64X_REG_A9 = 34;; let _TMS320C64X_REG_A10 = 35;; let _TMS320C64X_REG_A11 = 36;; let _TMS320C64X_REG_A12 = 37;; let _TMS320C64X_REG_A13 = 38;; let _TMS320C64X_REG_A14 = 39;; let _TMS320C64X_REG_A15 = 40;; let _TMS320C64X_REG_A16 = 41;; let _TMS320C64X_REG_A17 = 42;; let _TMS320C64X_REG_A18 = 43;; let _TMS320C64X_REG_A19 = 44;; let _TMS320C64X_REG_A20 = 45;; let _TMS320C64X_REG_A21 = 46;; let _TMS320C64X_REG_A22 = 47;; let _TMS320C64X_REG_A23 = 48;; let _TMS320C64X_REG_A24 = 49;; let _TMS320C64X_REG_A25 = 50;; let _TMS320C64X_REG_A26 = 51;; let _TMS320C64X_REG_A27 = 52;; let _TMS320C64X_REG_A28 = 53;; let _TMS320C64X_REG_A29 = 54;; let _TMS320C64X_REG_A30 = 55;; let _TMS320C64X_REG_A31 = 56;; let _TMS320C64X_REG_B0 = 57;; let _TMS320C64X_REG_B1 = 58;; let _TMS320C64X_REG_B2 = 59;; let _TMS320C64X_REG_B3 = 60;; let _TMS320C64X_REG_B4 = 61;; let _TMS320C64X_REG_B5 = 62;; let _TMS320C64X_REG_B6 = 63;; let _TMS320C64X_REG_B7 = 64;; let _TMS320C64X_REG_B8 = 65;; let _TMS320C64X_REG_B9 = 66;; let _TMS320C64X_REG_B10 = 67;; let _TMS320C64X_REG_B11 = 68;; let _TMS320C64X_REG_B12 = 69;; let _TMS320C64X_REG_B13 = 70;; let _TMS320C64X_REG_B14 = 71;; let _TMS320C64X_REG_B15 = 72;; let _TMS320C64X_REG_B16 = 73;; let _TMS320C64X_REG_B17 = 74;; let _TMS320C64X_REG_B18 = 75;; let _TMS320C64X_REG_B19 = 76;; let _TMS320C64X_REG_B20 = 77;; let _TMS320C64X_REG_B21 = 78;; let _TMS320C64X_REG_B22 = 79;; let _TMS320C64X_REG_B23 = 80;; let _TMS320C64X_REG_B24 = 81;; let _TMS320C64X_REG_B25 = 82;; let _TMS320C64X_REG_B26 = 83;; let _TMS320C64X_REG_B27 = 84;; let _TMS320C64X_REG_B28 = 85;; let _TMS320C64X_REG_B29 = 86;; let _TMS320C64X_REG_B30 = 87;; let _TMS320C64X_REG_B31 = 88;; let _TMS320C64X_REG_PCE1 = 89;; let _TMS320C64X_REG_ENDING = 90;; let _TMS320C64X_REG_EFR = _TMS320C64X_REG_ECR;; let _TMS320C64X_REG_IFR = _TMS320C64X_REG_ISR;; let _TMS320C64X_INS_INVALID = 0;; let _TMS320C64X_INS_ABS = 1;; let _TMS320C64X_INS_ABS2 = 2;; let _TMS320C64X_INS_ADD = 3;; let _TMS320C64X_INS_ADD2 = 4;; let _TMS320C64X_INS_ADD4 = 5;; let _TMS320C64X_INS_ADDAB = 6;; let _TMS320C64X_INS_ADDAD = 7;; let _TMS320C64X_INS_ADDAH = 8;; let _TMS320C64X_INS_ADDAW = 9;; let _TMS320C64X_INS_ADDK = 10;; let _TMS320C64X_INS_ADDKPC = 11;; let _TMS320C64X_INS_ADDU = 12;; let _TMS320C64X_INS_AND = 13;; let _TMS320C64X_INS_ANDN = 14;; let _TMS320C64X_INS_AVG2 = 15;; let _TMS320C64X_INS_AVGU4 = 16;; let _TMS320C64X_INS_B = 17;; let _TMS320C64X_INS_BDEC = 18;; let _TMS320C64X_INS_BITC4 = 19;; let _TMS320C64X_INS_BNOP = 20;; let _TMS320C64X_INS_BPOS = 21;; let _TMS320C64X_INS_CLR = 22;; let _TMS320C64X_INS_CMPEQ = 23;; let _TMS320C64X_INS_CMPEQ2 = 24;; let _TMS320C64X_INS_CMPEQ4 = 25;; let _TMS320C64X_INS_CMPGT = 26;; let _TMS320C64X_INS_CMPGT2 = 27;; let _TMS320C64X_INS_CMPGTU4 = 28;; let _TMS320C64X_INS_CMPLT = 29;; let _TMS320C64X_INS_CMPLTU = 30;; let _TMS320C64X_INS_DEAL = 31;; let _TMS320C64X_INS_DOTP2 = 32;; let _TMS320C64X_INS_DOTPN2 = 33;; let _TMS320C64X_INS_DOTPNRSU2 = 34;; let _TMS320C64X_INS_DOTPRSU2 = 35;; let _TMS320C64X_INS_DOTPSU4 = 36;; let _TMS320C64X_INS_DOTPU4 = 37;; let _TMS320C64X_INS_EXT = 38;; let _TMS320C64X_INS_EXTU = 39;; let _TMS320C64X_INS_GMPGTU = 40;; let _TMS320C64X_INS_GMPY4 = 41;; let _TMS320C64X_INS_LDB = 42;; let _TMS320C64X_INS_LDBU = 43;; let _TMS320C64X_INS_LDDW = 44;; let _TMS320C64X_INS_LDH = 45;; let _TMS320C64X_INS_LDHU = 46;; let _TMS320C64X_INS_LDNDW = 47;; let _TMS320C64X_INS_LDNW = 48;; let _TMS320C64X_INS_LDW = 49;; let _TMS320C64X_INS_LMBD = 50;; let _TMS320C64X_INS_MAX2 = 51;; let _TMS320C64X_INS_MAXU4 = 52;; let _TMS320C64X_INS_MIN2 = 53;; let _TMS320C64X_INS_MINU4 = 54;; let _TMS320C64X_INS_MPY = 55;; let _TMS320C64X_INS_MPY2 = 56;; let _TMS320C64X_INS_MPYH = 57;; let _TMS320C64X_INS_MPYHI = 58;; let _TMS320C64X_INS_MPYHIR = 59;; let _TMS320C64X_INS_MPYHL = 60;; let _TMS320C64X_INS_MPYHLU = 61;; let _TMS320C64X_INS_MPYHSLU = 62;; let _TMS320C64X_INS_MPYHSU = 63;; let _TMS320C64X_INS_MPYHU = 64;; let _TMS320C64X_INS_MPYHULS = 65;; let _TMS320C64X_INS_MPYHUS = 66;; let _TMS320C64X_INS_MPYLH = 67;; let _TMS320C64X_INS_MPYLHU = 68;; let _TMS320C64X_INS_MPYLI = 69;; let _TMS320C64X_INS_MPYLIR = 70;; let _TMS320C64X_INS_MPYLSHU = 71;; let _TMS320C64X_INS_MPYLUHS = 72;; let _TMS320C64X_INS_MPYSU = 73;; let _TMS320C64X_INS_MPYSU4 = 74;; let _TMS320C64X_INS_MPYU = 75;; let _TMS320C64X_INS_MPYU4 = 76;; let _TMS320C64X_INS_MPYUS = 77;; let _TMS320C64X_INS_MVC = 78;; let _TMS320C64X_INS_MVD = 79;; let _TMS320C64X_INS_MVK = 80;; let _TMS320C64X_INS_MVKL = 81;; let _TMS320C64X_INS_MVKLH = 82;; let _TMS320C64X_INS_NOP = 83;; let _TMS320C64X_INS_NORM = 84;; let _TMS320C64X_INS_OR = 85;; let _TMS320C64X_INS_PACK2 = 86;; let _TMS320C64X_INS_PACKH2 = 87;; let _TMS320C64X_INS_PACKH4 = 88;; let _TMS320C64X_INS_PACKHL2 = 89;; let _TMS320C64X_INS_PACKL4 = 90;; let _TMS320C64X_INS_PACKLH2 = 91;; let _TMS320C64X_INS_ROTL = 92;; let _TMS320C64X_INS_SADD = 93;; let _TMS320C64X_INS_SADD2 = 94;; let _TMS320C64X_INS_SADDU4 = 95;; let _TMS320C64X_INS_SADDUS2 = 96;; let _TMS320C64X_INS_SAT = 97;; let _TMS320C64X_INS_SET = 98;; let _TMS320C64X_INS_SHFL = 99;; let _TMS320C64X_INS_SHL = 100;; let _TMS320C64X_INS_SHLMB = 101;; let _TMS320C64X_INS_SHR = 102;; let _TMS320C64X_INS_SHR2 = 103;; let _TMS320C64X_INS_SHRMB = 104;; let _TMS320C64X_INS_SHRU = 105;; let _TMS320C64X_INS_SHRU2 = 106;; let _TMS320C64X_INS_SMPY = 107;; let _TMS320C64X_INS_SMPY2 = 108;; let _TMS320C64X_INS_SMPYH = 109;; let _TMS320C64X_INS_SMPYHL = 110;; let _TMS320C64X_INS_SMPYLH = 111;; let _TMS320C64X_INS_SPACK2 = 112;; let _TMS320C64X_INS_SPACKU4 = 113;; let _TMS320C64X_INS_SSHL = 114;; let _TMS320C64X_INS_SSHVL = 115;; let _TMS320C64X_INS_SSHVR = 116;; let _TMS320C64X_INS_SSUB = 117;; let _TMS320C64X_INS_STB = 118;; let _TMS320C64X_INS_STDW = 119;; let _TMS320C64X_INS_STH = 120;; let _TMS320C64X_INS_STNDW = 121;; let _TMS320C64X_INS_STNW = 122;; let _TMS320C64X_INS_STW = 123;; let _TMS320C64X_INS_SUB = 124;; let _TMS320C64X_INS_SUB2 = 125;; let _TMS320C64X_INS_SUB4 = 126;; let _TMS320C64X_INS_SUBAB = 127;; let _TMS320C64X_INS_SUBABS4 = 128;; let _TMS320C64X_INS_SUBAH = 129;; let _TMS320C64X_INS_SUBAW = 130;; let _TMS320C64X_INS_SUBC = 131;; let _TMS320C64X_INS_SUBU = 132;; let _TMS320C64X_INS_SWAP4 = 133;; let _TMS320C64X_INS_UNPKHU4 = 134;; let _TMS320C64X_INS_UNPKLU4 = 135;; let _TMS320C64X_INS_XOR = 136;; let _TMS320C64X_INS_XPND2 = 137;; let _TMS320C64X_INS_XPND4 = 138;; let _TMS320C64X_INS_IDLE = 139;; let _TMS320C64X_INS_MV = 140;; let _TMS320C64X_INS_NEG = 141;; let _TMS320C64X_INS_NOT = 142;; let _TMS320C64X_INS_SWAP2 = 143;; let _TMS320C64X_INS_ZERO = 144;; let _TMS320C64X_INS_ENDING = 145;; let _TMS320C64X_GRP_INVALID = 0;; let _TMS320C64X_GRP_JUMP = 1;; let _TMS320C64X_GRP_FUNIT_D = 128;; let _TMS320C64X_GRP_FUNIT_L = 129;; let _TMS320C64X_GRP_FUNIT_M = 130;; let _TMS320C64X_GRP_FUNIT_S = 131;; let _TMS320C64X_GRP_FUNIT_NO = 132;; let _TMS320C64X_GRP_ENDING = 133;; let _TMS320C64X_FUNIT_INVALID = 0;; let _TMS320C64X_FUNIT_D = 1;; let _TMS320C64X_FUNIT_L = 2;; let _TMS320C64X_FUNIT_M = 3;; let _TMS320C64X_FUNIT_S = 4;; let _TMS320C64X_FUNIT_NO = 5;; capstone-sys-0.11.0/capstone/bindings/ocaml/x86.ml010066400017500001750000000013521363402546700201420ustar0000000000000000(* Capstone Disassembly Engine * By Nguyen Anh Quynh , 2013-2014 *) open X86_const (* architecture specific info of instruction *) type x86_op_mem = { segment: int; base: int; index: int; scale: int; disp: int; } type x86_op_value = | X86_OP_INVALID of int | X86_OP_REG of int | X86_OP_IMM of int | X86_OP_MEM of x86_op_mem type x86_op = { value: x86_op_value; size: int; access: int; avx_bcast: int; avx_zero_opmask: int; } type cs_x86 = { prefix: int array; opcode: int array; rex: int; addr_size: int; modrm: int; sib: int; disp: int; sib_index: int; sib_scale: int; sib_base: int; xop_cc: int; sse_cc: int; avx_cc: int; avx_sae: int; avx_rm: int; eflags: int; operands: x86_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/x86_const.ml010066400017500001750000001575751363402546700213730ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.ml] *) let _X86_REG_INVALID = 0;; let _X86_REG_AH = 1;; let _X86_REG_AL = 2;; let _X86_REG_AX = 3;; let _X86_REG_BH = 4;; let _X86_REG_BL = 5;; let _X86_REG_BP = 6;; let _X86_REG_BPL = 7;; let _X86_REG_BX = 8;; let _X86_REG_CH = 9;; let _X86_REG_CL = 10;; let _X86_REG_CS = 11;; let _X86_REG_CX = 12;; let _X86_REG_DH = 13;; let _X86_REG_DI = 14;; let _X86_REG_DIL = 15;; let _X86_REG_DL = 16;; let _X86_REG_DS = 17;; let _X86_REG_DX = 18;; let _X86_REG_EAX = 19;; let _X86_REG_EBP = 20;; let _X86_REG_EBX = 21;; let _X86_REG_ECX = 22;; let _X86_REG_EDI = 23;; let _X86_REG_EDX = 24;; let _X86_REG_EFLAGS = 25;; let _X86_REG_EIP = 26;; let _X86_REG_EIZ = 27;; let _X86_REG_ES = 28;; let _X86_REG_ESI = 29;; let _X86_REG_ESP = 30;; let _X86_REG_FPSW = 31;; let _X86_REG_FS = 32;; let _X86_REG_GS = 33;; let _X86_REG_IP = 34;; let _X86_REG_RAX = 35;; let _X86_REG_RBP = 36;; let _X86_REG_RBX = 37;; let _X86_REG_RCX = 38;; let _X86_REG_RDI = 39;; let _X86_REG_RDX = 40;; let _X86_REG_RIP = 41;; let _X86_REG_RIZ = 42;; let _X86_REG_RSI = 43;; let _X86_REG_RSP = 44;; let _X86_REG_SI = 45;; let _X86_REG_SIL = 46;; let _X86_REG_SP = 47;; let _X86_REG_SPL = 48;; let _X86_REG_SS = 49;; let _X86_REG_CR0 = 50;; let _X86_REG_CR1 = 51;; let _X86_REG_CR2 = 52;; let _X86_REG_CR3 = 53;; let _X86_REG_CR4 = 54;; let _X86_REG_CR5 = 55;; let _X86_REG_CR6 = 56;; let _X86_REG_CR7 = 57;; let _X86_REG_CR8 = 58;; let _X86_REG_CR9 = 59;; let _X86_REG_CR10 = 60;; let _X86_REG_CR11 = 61;; let _X86_REG_CR12 = 62;; let _X86_REG_CR13 = 63;; let _X86_REG_CR14 = 64;; let _X86_REG_CR15 = 65;; let _X86_REG_DR0 = 66;; let _X86_REG_DR1 = 67;; let _X86_REG_DR2 = 68;; let _X86_REG_DR3 = 69;; let _X86_REG_DR4 = 70;; let _X86_REG_DR5 = 71;; let _X86_REG_DR6 = 72;; let _X86_REG_DR7 = 73;; let _X86_REG_DR8 = 74;; let _X86_REG_DR9 = 75;; let _X86_REG_DR10 = 76;; let _X86_REG_DR11 = 77;; let _X86_REG_DR12 = 78;; let _X86_REG_DR13 = 79;; let _X86_REG_DR14 = 80;; let _X86_REG_DR15 = 81;; let _X86_REG_FP0 = 82;; let _X86_REG_FP1 = 83;; let _X86_REG_FP2 = 84;; let _X86_REG_FP3 = 85;; let _X86_REG_FP4 = 86;; let _X86_REG_FP5 = 87;; let _X86_REG_FP6 = 88;; let _X86_REG_FP7 = 89;; let _X86_REG_K0 = 90;; let _X86_REG_K1 = 91;; let _X86_REG_K2 = 92;; let _X86_REG_K3 = 93;; let _X86_REG_K4 = 94;; let _X86_REG_K5 = 95;; let _X86_REG_K6 = 96;; let _X86_REG_K7 = 97;; let _X86_REG_MM0 = 98;; let _X86_REG_MM1 = 99;; let _X86_REG_MM2 = 100;; let _X86_REG_MM3 = 101;; let _X86_REG_MM4 = 102;; let _X86_REG_MM5 = 103;; let _X86_REG_MM6 = 104;; let _X86_REG_MM7 = 105;; let _X86_REG_R8 = 106;; let _X86_REG_R9 = 107;; let _X86_REG_R10 = 108;; let _X86_REG_R11 = 109;; let _X86_REG_R12 = 110;; let _X86_REG_R13 = 111;; let _X86_REG_R14 = 112;; let _X86_REG_R15 = 113;; let _X86_REG_ST0 = 114;; let _X86_REG_ST1 = 115;; let _X86_REG_ST2 = 116;; let _X86_REG_ST3 = 117;; let _X86_REG_ST4 = 118;; let _X86_REG_ST5 = 119;; let _X86_REG_ST6 = 120;; let _X86_REG_ST7 = 121;; let _X86_REG_XMM0 = 122;; let _X86_REG_XMM1 = 123;; let _X86_REG_XMM2 = 124;; let _X86_REG_XMM3 = 125;; let _X86_REG_XMM4 = 126;; let _X86_REG_XMM5 = 127;; let _X86_REG_XMM6 = 128;; let _X86_REG_XMM7 = 129;; let _X86_REG_XMM8 = 130;; let _X86_REG_XMM9 = 131;; let _X86_REG_XMM10 = 132;; let _X86_REG_XMM11 = 133;; let _X86_REG_XMM12 = 134;; let _X86_REG_XMM13 = 135;; let _X86_REG_XMM14 = 136;; let _X86_REG_XMM15 = 137;; let _X86_REG_XMM16 = 138;; let _X86_REG_XMM17 = 139;; let _X86_REG_XMM18 = 140;; let _X86_REG_XMM19 = 141;; let _X86_REG_XMM20 = 142;; let _X86_REG_XMM21 = 143;; let _X86_REG_XMM22 = 144;; let _X86_REG_XMM23 = 145;; let _X86_REG_XMM24 = 146;; let _X86_REG_XMM25 = 147;; let _X86_REG_XMM26 = 148;; let _X86_REG_XMM27 = 149;; let _X86_REG_XMM28 = 150;; let _X86_REG_XMM29 = 151;; let _X86_REG_XMM30 = 152;; let _X86_REG_XMM31 = 153;; let _X86_REG_YMM0 = 154;; let _X86_REG_YMM1 = 155;; let _X86_REG_YMM2 = 156;; let _X86_REG_YMM3 = 157;; let _X86_REG_YMM4 = 158;; let _X86_REG_YMM5 = 159;; let _X86_REG_YMM6 = 160;; let _X86_REG_YMM7 = 161;; let _X86_REG_YMM8 = 162;; let _X86_REG_YMM9 = 163;; let _X86_REG_YMM10 = 164;; let _X86_REG_YMM11 = 165;; let _X86_REG_YMM12 = 166;; let _X86_REG_YMM13 = 167;; let _X86_REG_YMM14 = 168;; let _X86_REG_YMM15 = 169;; let _X86_REG_YMM16 = 170;; let _X86_REG_YMM17 = 171;; let _X86_REG_YMM18 = 172;; let _X86_REG_YMM19 = 173;; let _X86_REG_YMM20 = 174;; let _X86_REG_YMM21 = 175;; let _X86_REG_YMM22 = 176;; let _X86_REG_YMM23 = 177;; let _X86_REG_YMM24 = 178;; let _X86_REG_YMM25 = 179;; let _X86_REG_YMM26 = 180;; let _X86_REG_YMM27 = 181;; let _X86_REG_YMM28 = 182;; let _X86_REG_YMM29 = 183;; let _X86_REG_YMM30 = 184;; let _X86_REG_YMM31 = 185;; let _X86_REG_ZMM0 = 186;; let _X86_REG_ZMM1 = 187;; let _X86_REG_ZMM2 = 188;; let _X86_REG_ZMM3 = 189;; let _X86_REG_ZMM4 = 190;; let _X86_REG_ZMM5 = 191;; let _X86_REG_ZMM6 = 192;; let _X86_REG_ZMM7 = 193;; let _X86_REG_ZMM8 = 194;; let _X86_REG_ZMM9 = 195;; let _X86_REG_ZMM10 = 196;; let _X86_REG_ZMM11 = 197;; let _X86_REG_ZMM12 = 198;; let _X86_REG_ZMM13 = 199;; let _X86_REG_ZMM14 = 200;; let _X86_REG_ZMM15 = 201;; let _X86_REG_ZMM16 = 202;; let _X86_REG_ZMM17 = 203;; let _X86_REG_ZMM18 = 204;; let _X86_REG_ZMM19 = 205;; let _X86_REG_ZMM20 = 206;; let _X86_REG_ZMM21 = 207;; let _X86_REG_ZMM22 = 208;; let _X86_REG_ZMM23 = 209;; let _X86_REG_ZMM24 = 210;; let _X86_REG_ZMM25 = 211;; let _X86_REG_ZMM26 = 212;; let _X86_REG_ZMM27 = 213;; let _X86_REG_ZMM28 = 214;; let _X86_REG_ZMM29 = 215;; let _X86_REG_ZMM30 = 216;; let _X86_REG_ZMM31 = 217;; let _X86_REG_R8B = 218;; let _X86_REG_R9B = 219;; let _X86_REG_R10B = 220;; let _X86_REG_R11B = 221;; let _X86_REG_R12B = 222;; let _X86_REG_R13B = 223;; let _X86_REG_R14B = 224;; let _X86_REG_R15B = 225;; let _X86_REG_R8D = 226;; let _X86_REG_R9D = 227;; let _X86_REG_R10D = 228;; let _X86_REG_R11D = 229;; let _X86_REG_R12D = 230;; let _X86_REG_R13D = 231;; let _X86_REG_R14D = 232;; let _X86_REG_R15D = 233;; let _X86_REG_R8W = 234;; let _X86_REG_R9W = 235;; let _X86_REG_R10W = 236;; let _X86_REG_R11W = 237;; let _X86_REG_R12W = 238;; let _X86_REG_R13W = 239;; let _X86_REG_R14W = 240;; let _X86_REG_R15W = 241;; let _X86_REG_ENDING = 242;; let _X86_EFLAGS_MODIFY_AF = 1 lsl 0;; let _X86_EFLAGS_MODIFY_CF = 1 lsl 1;; let _X86_EFLAGS_MODIFY_SF = 1 lsl 2;; let _X86_EFLAGS_MODIFY_ZF = 1 lsl 3;; let _X86_EFLAGS_MODIFY_PF = 1 lsl 4;; let _X86_EFLAGS_MODIFY_OF = 1 lsl 5;; let _X86_EFLAGS_MODIFY_TF = 1 lsl 6;; let _X86_EFLAGS_MODIFY_IF = 1 lsl 7;; let _X86_EFLAGS_MODIFY_DF = 1 lsl 8;; let _X86_EFLAGS_MODIFY_NT = 1 lsl 9;; let _X86_EFLAGS_MODIFY_RF = 1 lsl 10;; let _X86_EFLAGS_PRIOR_OF = 1 lsl 11;; let _X86_EFLAGS_PRIOR_SF = 1 lsl 12;; let _X86_EFLAGS_PRIOR_ZF = 1 lsl 13;; let _X86_EFLAGS_PRIOR_AF = 1 lsl 14;; let _X86_EFLAGS_PRIOR_PF = 1 lsl 15;; let _X86_EFLAGS_PRIOR_CF = 1 lsl 16;; let _X86_EFLAGS_PRIOR_TF = 1 lsl 17;; let _X86_EFLAGS_PRIOR_IF = 1 lsl 18;; let _X86_EFLAGS_PRIOR_DF = 1 lsl 19;; let _X86_EFLAGS_PRIOR_NT = 1 lsl 20;; let _X86_EFLAGS_RESET_OF = 1 lsl 21;; let _X86_EFLAGS_RESET_CF = 1 lsl 22;; let _X86_EFLAGS_RESET_DF = 1 lsl 23;; let _X86_EFLAGS_RESET_IF = 1 lsl 24;; let _X86_EFLAGS_RESET_SF = 1 lsl 25;; let _X86_EFLAGS_RESET_AF = 1 lsl 26;; let _X86_EFLAGS_RESET_TF = 1 lsl 27;; let _X86_EFLAGS_RESET_NT = 1 lsl 28;; let _X86_EFLAGS_RESET_PF = 1 lsl 29;; let _X86_EFLAGS_SET_CF = 1 lsl 30;; let _X86_EFLAGS_SET_DF = 1 lsl 31;; let _X86_EFLAGS_SET_IF = 1 lsl 32;; let _X86_EFLAGS_TEST_OF = 1 lsl 33;; let _X86_EFLAGS_TEST_SF = 1 lsl 34;; let _X86_EFLAGS_TEST_ZF = 1 lsl 35;; let _X86_EFLAGS_TEST_PF = 1 lsl 36;; let _X86_EFLAGS_TEST_CF = 1 lsl 37;; let _X86_EFLAGS_TEST_NT = 1 lsl 38;; let _X86_EFLAGS_TEST_DF = 1 lsl 39;; let _X86_EFLAGS_UNDEFINED_OF = 1 lsl 40;; let _X86_EFLAGS_UNDEFINED_SF = 1 lsl 41;; let _X86_EFLAGS_UNDEFINED_ZF = 1 lsl 42;; let _X86_EFLAGS_UNDEFINED_PF = 1 lsl 43;; let _X86_EFLAGS_UNDEFINED_AF = 1 lsl 44;; let _X86_EFLAGS_UNDEFINED_CF = 1 lsl 45;; let _X86_EFLAGS_RESET_RF = 1 lsl 46;; let _X86_EFLAGS_TEST_RF = 1 lsl 47;; let _X86_EFLAGS_TEST_IF = 1 lsl 48;; let _X86_EFLAGS_TEST_TF = 1 lsl 49;; let _X86_EFLAGS_TEST_AF = 1 lsl 50;; let _X86_EFLAGS_RESET_ZF = 1 lsl 51;; let _X86_EFLAGS_SET_OF = 1 lsl 52;; let _X86_EFLAGS_SET_SF = 1 lsl 53;; let _X86_EFLAGS_SET_ZF = 1 lsl 54;; let _X86_EFLAGS_SET_AF = 1 lsl 55;; let _X86_EFLAGS_SET_PF = 1 lsl 56;; let _X86_EFLAGS_RESET_0F = 1 lsl 57;; let _X86_EFLAGS_RESET_AC = 1 lsl 58;; let _X86_FPU_FLAGS_MODIFY_C0 = 1 lsl 0;; let _X86_FPU_FLAGS_MODIFY_C1 = 1 lsl 1;; let _X86_FPU_FLAGS_MODIFY_C2 = 1 lsl 2;; let _X86_FPU_FLAGS_MODIFY_C3 = 1 lsl 3;; let _X86_FPU_FLAGS_RESET_C0 = 1 lsl 4;; let _X86_FPU_FLAGS_RESET_C1 = 1 lsl 5;; let _X86_FPU_FLAGS_RESET_C2 = 1 lsl 6;; let _X86_FPU_FLAGS_RESET_C3 = 1 lsl 7;; let _X86_FPU_FLAGS_SET_C0 = 1 lsl 8;; let _X86_FPU_FLAGS_SET_C1 = 1 lsl 9;; let _X86_FPU_FLAGS_SET_C2 = 1 lsl 10;; let _X86_FPU_FLAGS_SET_C3 = 1 lsl 11;; let _X86_FPU_FLAGS_UNDEFINED_C0 = 1 lsl 12;; let _X86_FPU_FLAGS_UNDEFINED_C1 = 1 lsl 13;; let _X86_FPU_FLAGS_UNDEFINED_C2 = 1 lsl 14;; let _X86_FPU_FLAGS_UNDEFINED_C3 = 1 lsl 15;; let _X86_FPU_FLAGS_TEST_C0 = 1 lsl 16;; let _X86_FPU_FLAGS_TEST_C1 = 1 lsl 17;; let _X86_FPU_FLAGS_TEST_C2 = 1 lsl 18;; let _X86_FPU_FLAGS_TEST_C3 = 1 lsl 19;; let _X86_OP_INVALID = 0;; let _X86_OP_REG = 1;; let _X86_OP_IMM = 2;; let _X86_OP_MEM = 3;; let _X86_XOP_CC_INVALID = 0;; let _X86_XOP_CC_LT = 1;; let _X86_XOP_CC_LE = 2;; let _X86_XOP_CC_GT = 3;; let _X86_XOP_CC_GE = 4;; let _X86_XOP_CC_EQ = 5;; let _X86_XOP_CC_NEQ = 6;; let _X86_XOP_CC_FALSE = 7;; let _X86_XOP_CC_TRUE = 8;; let _X86_AVX_BCAST_INVALID = 0;; let _X86_AVX_BCAST_2 = 1;; let _X86_AVX_BCAST_4 = 2;; let _X86_AVX_BCAST_8 = 3;; let _X86_AVX_BCAST_16 = 4;; let _X86_SSE_CC_INVALID = 0;; let _X86_SSE_CC_EQ = 1;; let _X86_SSE_CC_LT = 2;; let _X86_SSE_CC_LE = 3;; let _X86_SSE_CC_UNORD = 4;; let _X86_SSE_CC_NEQ = 5;; let _X86_SSE_CC_NLT = 6;; let _X86_SSE_CC_NLE = 7;; let _X86_SSE_CC_ORD = 8;; let _X86_AVX_CC_INVALID = 0;; let _X86_AVX_CC_EQ = 1;; let _X86_AVX_CC_LT = 2;; let _X86_AVX_CC_LE = 3;; let _X86_AVX_CC_UNORD = 4;; let _X86_AVX_CC_NEQ = 5;; let _X86_AVX_CC_NLT = 6;; let _X86_AVX_CC_NLE = 7;; let _X86_AVX_CC_ORD = 8;; let _X86_AVX_CC_EQ_UQ = 9;; let _X86_AVX_CC_NGE = 10;; let _X86_AVX_CC_NGT = 11;; let _X86_AVX_CC_FALSE = 12;; let _X86_AVX_CC_NEQ_OQ = 13;; let _X86_AVX_CC_GE = 14;; let _X86_AVX_CC_GT = 15;; let _X86_AVX_CC_TRUE = 16;; let _X86_AVX_CC_EQ_OS = 17;; let _X86_AVX_CC_LT_OQ = 18;; let _X86_AVX_CC_LE_OQ = 19;; let _X86_AVX_CC_UNORD_S = 20;; let _X86_AVX_CC_NEQ_US = 21;; let _X86_AVX_CC_NLT_UQ = 22;; let _X86_AVX_CC_NLE_UQ = 23;; let _X86_AVX_CC_ORD_S = 24;; let _X86_AVX_CC_EQ_US = 25;; let _X86_AVX_CC_NGE_UQ = 26;; let _X86_AVX_CC_NGT_UQ = 27;; let _X86_AVX_CC_FALSE_OS = 28;; let _X86_AVX_CC_NEQ_OS = 29;; let _X86_AVX_CC_GE_OQ = 30;; let _X86_AVX_CC_GT_OQ = 31;; let _X86_AVX_CC_TRUE_US = 32;; let _X86_AVX_RM_INVALID = 0;; let _X86_AVX_RM_RN = 1;; let _X86_AVX_RM_RD = 2;; let _X86_AVX_RM_RU = 3;; let _X86_AVX_RM_RZ = 4;; let _X86_PREFIX_LOCK = 0xf0;; let _X86_PREFIX_REP = 0xf3;; let _X86_PREFIX_REPE = 0xf3;; let _X86_PREFIX_REPNE = 0xf2;; let _X86_PREFIX_CS = 0x2e;; let _X86_PREFIX_SS = 0x36;; let _X86_PREFIX_DS = 0x3e;; let _X86_PREFIX_ES = 0x26;; let _X86_PREFIX_FS = 0x64;; let _X86_PREFIX_GS = 0x65;; let _X86_PREFIX_OPSIZE = 0x66;; let _X86_PREFIX_ADDRSIZE = 0x67;; let _X86_INS_INVALID = 0;; let _X86_INS_AAA = 1;; let _X86_INS_AAD = 2;; let _X86_INS_AAM = 3;; let _X86_INS_AAS = 4;; let _X86_INS_FABS = 5;; let _X86_INS_ADC = 6;; let _X86_INS_ADCX = 7;; let _X86_INS_ADD = 8;; let _X86_INS_ADDPD = 9;; let _X86_INS_ADDPS = 10;; let _X86_INS_ADDSD = 11;; let _X86_INS_ADDSS = 12;; let _X86_INS_ADDSUBPD = 13;; let _X86_INS_ADDSUBPS = 14;; let _X86_INS_FADD = 15;; let _X86_INS_FIADD = 16;; let _X86_INS_FADDP = 17;; let _X86_INS_ADOX = 18;; let _X86_INS_AESDECLAST = 19;; let _X86_INS_AESDEC = 20;; let _X86_INS_AESENCLAST = 21;; let _X86_INS_AESENC = 22;; let _X86_INS_AESIMC = 23;; let _X86_INS_AESKEYGENASSIST = 24;; let _X86_INS_AND = 25;; let _X86_INS_ANDN = 26;; let _X86_INS_ANDNPD = 27;; let _X86_INS_ANDNPS = 28;; let _X86_INS_ANDPD = 29;; let _X86_INS_ANDPS = 30;; let _X86_INS_ARPL = 31;; let _X86_INS_BEXTR = 32;; let _X86_INS_BLCFILL = 33;; let _X86_INS_BLCI = 34;; let _X86_INS_BLCIC = 35;; let _X86_INS_BLCMSK = 36;; let _X86_INS_BLCS = 37;; let _X86_INS_BLENDPD = 38;; let _X86_INS_BLENDPS = 39;; let _X86_INS_BLENDVPD = 40;; let _X86_INS_BLENDVPS = 41;; let _X86_INS_BLSFILL = 42;; let _X86_INS_BLSI = 43;; let _X86_INS_BLSIC = 44;; let _X86_INS_BLSMSK = 45;; let _X86_INS_BLSR = 46;; let _X86_INS_BOUND = 47;; let _X86_INS_BSF = 48;; let _X86_INS_BSR = 49;; let _X86_INS_BSWAP = 50;; let _X86_INS_BT = 51;; let _X86_INS_BTC = 52;; let _X86_INS_BTR = 53;; let _X86_INS_BTS = 54;; let _X86_INS_BZHI = 55;; let _X86_INS_CALL = 56;; let _X86_INS_CBW = 57;; let _X86_INS_CDQ = 58;; let _X86_INS_CDQE = 59;; let _X86_INS_FCHS = 60;; let _X86_INS_CLAC = 61;; let _X86_INS_CLC = 62;; let _X86_INS_CLD = 63;; let _X86_INS_CLFLUSH = 64;; let _X86_INS_CLFLUSHOPT = 65;; let _X86_INS_CLGI = 66;; let _X86_INS_CLI = 67;; let _X86_INS_CLTS = 68;; let _X86_INS_CLWB = 69;; let _X86_INS_CMC = 70;; let _X86_INS_CMOVA = 71;; let _X86_INS_CMOVAE = 72;; let _X86_INS_CMOVB = 73;; let _X86_INS_CMOVBE = 74;; let _X86_INS_FCMOVBE = 75;; let _X86_INS_FCMOVB = 76;; let _X86_INS_CMOVE = 77;; let _X86_INS_FCMOVE = 78;; let _X86_INS_CMOVG = 79;; let _X86_INS_CMOVGE = 80;; let _X86_INS_CMOVL = 81;; let _X86_INS_CMOVLE = 82;; let _X86_INS_FCMOVNBE = 83;; let _X86_INS_FCMOVNB = 84;; let _X86_INS_CMOVNE = 85;; let _X86_INS_FCMOVNE = 86;; let _X86_INS_CMOVNO = 87;; let _X86_INS_CMOVNP = 88;; let _X86_INS_FCMOVNU = 89;; let _X86_INS_CMOVNS = 90;; let _X86_INS_CMOVO = 91;; let _X86_INS_CMOVP = 92;; let _X86_INS_FCMOVU = 93;; let _X86_INS_CMOVS = 94;; let _X86_INS_CMP = 95;; let _X86_INS_CMPSB = 96;; let _X86_INS_CMPSQ = 97;; let _X86_INS_CMPSW = 98;; let _X86_INS_CMPXCHG16B = 99;; let _X86_INS_CMPXCHG = 100;; let _X86_INS_CMPXCHG8B = 101;; let _X86_INS_COMISD = 102;; let _X86_INS_COMISS = 103;; let _X86_INS_FCOMP = 104;; let _X86_INS_FCOMIP = 105;; let _X86_INS_FCOMI = 106;; let _X86_INS_FCOM = 107;; let _X86_INS_FCOS = 108;; let _X86_INS_CPUID = 109;; let _X86_INS_CQO = 110;; let _X86_INS_CRC32 = 111;; let _X86_INS_CVTDQ2PD = 112;; let _X86_INS_CVTDQ2PS = 113;; let _X86_INS_CVTPD2DQ = 114;; let _X86_INS_CVTPD2PS = 115;; let _X86_INS_CVTPS2DQ = 116;; let _X86_INS_CVTPS2PD = 117;; let _X86_INS_CVTSD2SI = 118;; let _X86_INS_CVTSD2SS = 119;; let _X86_INS_CVTSI2SD = 120;; let _X86_INS_CVTSI2SS = 121;; let _X86_INS_CVTSS2SD = 122;; let _X86_INS_CVTSS2SI = 123;; let _X86_INS_CVTTPD2DQ = 124;; let _X86_INS_CVTTPS2DQ = 125;; let _X86_INS_CVTTSD2SI = 126;; let _X86_INS_CVTTSS2SI = 127;; let _X86_INS_CWD = 128;; let _X86_INS_CWDE = 129;; let _X86_INS_DAA = 130;; let _X86_INS_DAS = 131;; let _X86_INS_DATA16 = 132;; let _X86_INS_DEC = 133;; let _X86_INS_DIV = 134;; let _X86_INS_DIVPD = 135;; let _X86_INS_DIVPS = 136;; let _X86_INS_FDIVR = 137;; let _X86_INS_FIDIVR = 138;; let _X86_INS_FDIVRP = 139;; let _X86_INS_DIVSD = 140;; let _X86_INS_DIVSS = 141;; let _X86_INS_FDIV = 142;; let _X86_INS_FIDIV = 143;; let _X86_INS_FDIVP = 144;; let _X86_INS_DPPD = 145;; let _X86_INS_DPPS = 146;; let _X86_INS_RET = 147;; let _X86_INS_ENCLS = 148;; let _X86_INS_ENCLU = 149;; let _X86_INS_ENTER = 150;; let _X86_INS_EXTRACTPS = 151;; let _X86_INS_EXTRQ = 152;; let _X86_INS_F2XM1 = 153;; let _X86_INS_LCALL = 154;; let _X86_INS_LJMP = 155;; let _X86_INS_FBLD = 156;; let _X86_INS_FBSTP = 157;; let _X86_INS_FCOMPP = 158;; let _X86_INS_FDECSTP = 159;; let _X86_INS_FEMMS = 160;; let _X86_INS_FFREE = 161;; let _X86_INS_FICOM = 162;; let _X86_INS_FICOMP = 163;; let _X86_INS_FINCSTP = 164;; let _X86_INS_FLDCW = 165;; let _X86_INS_FLDENV = 166;; let _X86_INS_FLDL2E = 167;; let _X86_INS_FLDL2T = 168;; let _X86_INS_FLDLG2 = 169;; let _X86_INS_FLDLN2 = 170;; let _X86_INS_FLDPI = 171;; let _X86_INS_FNCLEX = 172;; let _X86_INS_FNINIT = 173;; let _X86_INS_FNOP = 174;; let _X86_INS_FNSTCW = 175;; let _X86_INS_FNSTSW = 176;; let _X86_INS_FPATAN = 177;; let _X86_INS_FPREM = 178;; let _X86_INS_FPREM1 = 179;; let _X86_INS_FPTAN = 180;; let _X86_INS_FFREEP = 181;; let _X86_INS_FRNDINT = 182;; let _X86_INS_FRSTOR = 183;; let _X86_INS_FNSAVE = 184;; let _X86_INS_FSCALE = 185;; let _X86_INS_FSETPM = 186;; let _X86_INS_FSINCOS = 187;; let _X86_INS_FNSTENV = 188;; let _X86_INS_FXAM = 189;; let _X86_INS_FXRSTOR = 190;; let _X86_INS_FXRSTOR64 = 191;; let _X86_INS_FXSAVE = 192;; let _X86_INS_FXSAVE64 = 193;; let _X86_INS_FXTRACT = 194;; let _X86_INS_FYL2X = 195;; let _X86_INS_FYL2XP1 = 196;; let _X86_INS_MOVAPD = 197;; let _X86_INS_MOVAPS = 198;; let _X86_INS_ORPD = 199;; let _X86_INS_ORPS = 200;; let _X86_INS_VMOVAPD = 201;; let _X86_INS_VMOVAPS = 202;; let _X86_INS_XORPD = 203;; let _X86_INS_XORPS = 204;; let _X86_INS_GETSEC = 205;; let _X86_INS_HADDPD = 206;; let _X86_INS_HADDPS = 207;; let _X86_INS_HLT = 208;; let _X86_INS_HSUBPD = 209;; let _X86_INS_HSUBPS = 210;; let _X86_INS_IDIV = 211;; let _X86_INS_FILD = 212;; let _X86_INS_IMUL = 213;; let _X86_INS_IN = 214;; let _X86_INS_INC = 215;; let _X86_INS_INSB = 216;; let _X86_INS_INSERTPS = 217;; let _X86_INS_INSERTQ = 218;; let _X86_INS_INSD = 219;; let _X86_INS_INSW = 220;; let _X86_INS_INT = 221;; let _X86_INS_INT1 = 222;; let _X86_INS_INT3 = 223;; let _X86_INS_INTO = 224;; let _X86_INS_INVD = 225;; let _X86_INS_INVEPT = 226;; let _X86_INS_INVLPG = 227;; let _X86_INS_INVLPGA = 228;; let _X86_INS_INVPCID = 229;; let _X86_INS_INVVPID = 230;; let _X86_INS_IRET = 231;; let _X86_INS_IRETD = 232;; let _X86_INS_IRETQ = 233;; let _X86_INS_FISTTP = 234;; let _X86_INS_FIST = 235;; let _X86_INS_FISTP = 236;; let _X86_INS_UCOMISD = 237;; let _X86_INS_UCOMISS = 238;; let _X86_INS_VCOMISD = 239;; let _X86_INS_VCOMISS = 240;; let _X86_INS_VCVTSD2SS = 241;; let _X86_INS_VCVTSI2SD = 242;; let _X86_INS_VCVTSI2SS = 243;; let _X86_INS_VCVTSS2SD = 244;; let _X86_INS_VCVTTSD2SI = 245;; let _X86_INS_VCVTTSD2USI = 246;; let _X86_INS_VCVTTSS2SI = 247;; let _X86_INS_VCVTTSS2USI = 248;; let _X86_INS_VCVTUSI2SD = 249;; let _X86_INS_VCVTUSI2SS = 250;; let _X86_INS_VUCOMISD = 251;; let _X86_INS_VUCOMISS = 252;; let _X86_INS_JAE = 253;; let _X86_INS_JA = 254;; let _X86_INS_JBE = 255;; let _X86_INS_JB = 256;; let _X86_INS_JCXZ = 257;; let _X86_INS_JECXZ = 258;; let _X86_INS_JE = 259;; let _X86_INS_JGE = 260;; let _X86_INS_JG = 261;; let _X86_INS_JLE = 262;; let _X86_INS_JL = 263;; let _X86_INS_JMP = 264;; let _X86_INS_JNE = 265;; let _X86_INS_JNO = 266;; let _X86_INS_JNP = 267;; let _X86_INS_JNS = 268;; let _X86_INS_JO = 269;; let _X86_INS_JP = 270;; let _X86_INS_JRCXZ = 271;; let _X86_INS_JS = 272;; let _X86_INS_KANDB = 273;; let _X86_INS_KANDD = 274;; let _X86_INS_KANDNB = 275;; let _X86_INS_KANDND = 276;; let _X86_INS_KANDNQ = 277;; let _X86_INS_KANDNW = 278;; let _X86_INS_KANDQ = 279;; let _X86_INS_KANDW = 280;; let _X86_INS_KMOVB = 281;; let _X86_INS_KMOVD = 282;; let _X86_INS_KMOVQ = 283;; let _X86_INS_KMOVW = 284;; let _X86_INS_KNOTB = 285;; let _X86_INS_KNOTD = 286;; let _X86_INS_KNOTQ = 287;; let _X86_INS_KNOTW = 288;; let _X86_INS_KORB = 289;; let _X86_INS_KORD = 290;; let _X86_INS_KORQ = 291;; let _X86_INS_KORTESTB = 292;; let _X86_INS_KORTESTD = 293;; let _X86_INS_KORTESTQ = 294;; let _X86_INS_KORTESTW = 295;; let _X86_INS_KORW = 296;; let _X86_INS_KSHIFTLB = 297;; let _X86_INS_KSHIFTLD = 298;; let _X86_INS_KSHIFTLQ = 299;; let _X86_INS_KSHIFTLW = 300;; let _X86_INS_KSHIFTRB = 301;; let _X86_INS_KSHIFTRD = 302;; let _X86_INS_KSHIFTRQ = 303;; let _X86_INS_KSHIFTRW = 304;; let _X86_INS_KUNPCKBW = 305;; let _X86_INS_KXNORB = 306;; let _X86_INS_KXNORD = 307;; let _X86_INS_KXNORQ = 308;; let _X86_INS_KXNORW = 309;; let _X86_INS_KXORB = 310;; let _X86_INS_KXORD = 311;; let _X86_INS_KXORQ = 312;; let _X86_INS_KXORW = 313;; let _X86_INS_LAHF = 314;; let _X86_INS_LAR = 315;; let _X86_INS_LDDQU = 316;; let _X86_INS_LDMXCSR = 317;; let _X86_INS_LDS = 318;; let _X86_INS_FLDZ = 319;; let _X86_INS_FLD1 = 320;; let _X86_INS_FLD = 321;; let _X86_INS_LEA = 322;; let _X86_INS_LEAVE = 323;; let _X86_INS_LES = 324;; let _X86_INS_LFENCE = 325;; let _X86_INS_LFS = 326;; let _X86_INS_LGDT = 327;; let _X86_INS_LGS = 328;; let _X86_INS_LIDT = 329;; let _X86_INS_LLDT = 330;; let _X86_INS_LMSW = 331;; let _X86_INS_OR = 332;; let _X86_INS_SUB = 333;; let _X86_INS_XOR = 334;; let _X86_INS_LODSB = 335;; let _X86_INS_LODSD = 336;; let _X86_INS_LODSQ = 337;; let _X86_INS_LODSW = 338;; let _X86_INS_LOOP = 339;; let _X86_INS_LOOPE = 340;; let _X86_INS_LOOPNE = 341;; let _X86_INS_RETF = 342;; let _X86_INS_RETFQ = 343;; let _X86_INS_LSL = 344;; let _X86_INS_LSS = 345;; let _X86_INS_LTR = 346;; let _X86_INS_XADD = 347;; let _X86_INS_LZCNT = 348;; let _X86_INS_MASKMOVDQU = 349;; let _X86_INS_MAXPD = 350;; let _X86_INS_MAXPS = 351;; let _X86_INS_MAXSD = 352;; let _X86_INS_MAXSS = 353;; let _X86_INS_MFENCE = 354;; let _X86_INS_MINPD = 355;; let _X86_INS_MINPS = 356;; let _X86_INS_MINSD = 357;; let _X86_INS_MINSS = 358;; let _X86_INS_CVTPD2PI = 359;; let _X86_INS_CVTPI2PD = 360;; let _X86_INS_CVTPI2PS = 361;; let _X86_INS_CVTPS2PI = 362;; let _X86_INS_CVTTPD2PI = 363;; let _X86_INS_CVTTPS2PI = 364;; let _X86_INS_EMMS = 365;; let _X86_INS_MASKMOVQ = 366;; let _X86_INS_MOVD = 367;; let _X86_INS_MOVDQ2Q = 368;; let _X86_INS_MOVNTQ = 369;; let _X86_INS_MOVQ2DQ = 370;; let _X86_INS_MOVQ = 371;; let _X86_INS_PABSB = 372;; let _X86_INS_PABSD = 373;; let _X86_INS_PABSW = 374;; let _X86_INS_PACKSSDW = 375;; let _X86_INS_PACKSSWB = 376;; let _X86_INS_PACKUSWB = 377;; let _X86_INS_PADDB = 378;; let _X86_INS_PADDD = 379;; let _X86_INS_PADDQ = 380;; let _X86_INS_PADDSB = 381;; let _X86_INS_PADDSW = 382;; let _X86_INS_PADDUSB = 383;; let _X86_INS_PADDUSW = 384;; let _X86_INS_PADDW = 385;; let _X86_INS_PALIGNR = 386;; let _X86_INS_PANDN = 387;; let _X86_INS_PAND = 388;; let _X86_INS_PAVGB = 389;; let _X86_INS_PAVGW = 390;; let _X86_INS_PCMPEQB = 391;; let _X86_INS_PCMPEQD = 392;; let _X86_INS_PCMPEQW = 393;; let _X86_INS_PCMPGTB = 394;; let _X86_INS_PCMPGTD = 395;; let _X86_INS_PCMPGTW = 396;; let _X86_INS_PEXTRW = 397;; let _X86_INS_PHADDSW = 398;; let _X86_INS_PHADDW = 399;; let _X86_INS_PHADDD = 400;; let _X86_INS_PHSUBD = 401;; let _X86_INS_PHSUBSW = 402;; let _X86_INS_PHSUBW = 403;; let _X86_INS_PINSRW = 404;; let _X86_INS_PMADDUBSW = 405;; let _X86_INS_PMADDWD = 406;; let _X86_INS_PMAXSW = 407;; let _X86_INS_PMAXUB = 408;; let _X86_INS_PMINSW = 409;; let _X86_INS_PMINUB = 410;; let _X86_INS_PMOVMSKB = 411;; let _X86_INS_PMULHRSW = 412;; let _X86_INS_PMULHUW = 413;; let _X86_INS_PMULHW = 414;; let _X86_INS_PMULLW = 415;; let _X86_INS_PMULUDQ = 416;; let _X86_INS_POR = 417;; let _X86_INS_PSADBW = 418;; let _X86_INS_PSHUFB = 419;; let _X86_INS_PSHUFW = 420;; let _X86_INS_PSIGNB = 421;; let _X86_INS_PSIGND = 422;; let _X86_INS_PSIGNW = 423;; let _X86_INS_PSLLD = 424;; let _X86_INS_PSLLQ = 425;; let _X86_INS_PSLLW = 426;; let _X86_INS_PSRAD = 427;; let _X86_INS_PSRAW = 428;; let _X86_INS_PSRLD = 429;; let _X86_INS_PSRLQ = 430;; let _X86_INS_PSRLW = 431;; let _X86_INS_PSUBB = 432;; let _X86_INS_PSUBD = 433;; let _X86_INS_PSUBQ = 434;; let _X86_INS_PSUBSB = 435;; let _X86_INS_PSUBSW = 436;; let _X86_INS_PSUBUSB = 437;; let _X86_INS_PSUBUSW = 438;; let _X86_INS_PSUBW = 439;; let _X86_INS_PUNPCKHBW = 440;; let _X86_INS_PUNPCKHDQ = 441;; let _X86_INS_PUNPCKHWD = 442;; let _X86_INS_PUNPCKLBW = 443;; let _X86_INS_PUNPCKLDQ = 444;; let _X86_INS_PUNPCKLWD = 445;; let _X86_INS_PXOR = 446;; let _X86_INS_MONITOR = 447;; let _X86_INS_MONTMUL = 448;; let _X86_INS_MOV = 449;; let _X86_INS_MOVABS = 450;; let _X86_INS_MOVBE = 451;; let _X86_INS_MOVDDUP = 452;; let _X86_INS_MOVDQA = 453;; let _X86_INS_MOVDQU = 454;; let _X86_INS_MOVHLPS = 455;; let _X86_INS_MOVHPD = 456;; let _X86_INS_MOVHPS = 457;; let _X86_INS_MOVLHPS = 458;; let _X86_INS_MOVLPD = 459;; let _X86_INS_MOVLPS = 460;; let _X86_INS_MOVMSKPD = 461;; let _X86_INS_MOVMSKPS = 462;; let _X86_INS_MOVNTDQA = 463;; let _X86_INS_MOVNTDQ = 464;; let _X86_INS_MOVNTI = 465;; let _X86_INS_MOVNTPD = 466;; let _X86_INS_MOVNTPS = 467;; let _X86_INS_MOVNTSD = 468;; let _X86_INS_MOVNTSS = 469;; let _X86_INS_MOVSB = 470;; let _X86_INS_MOVSD = 471;; let _X86_INS_MOVSHDUP = 472;; let _X86_INS_MOVSLDUP = 473;; let _X86_INS_MOVSQ = 474;; let _X86_INS_MOVSS = 475;; let _X86_INS_MOVSW = 476;; let _X86_INS_MOVSX = 477;; let _X86_INS_MOVSXD = 478;; let _X86_INS_MOVUPD = 479;; let _X86_INS_MOVUPS = 480;; let _X86_INS_MOVZX = 481;; let _X86_INS_MPSADBW = 482;; let _X86_INS_MUL = 483;; let _X86_INS_MULPD = 484;; let _X86_INS_MULPS = 485;; let _X86_INS_MULSD = 486;; let _X86_INS_MULSS = 487;; let _X86_INS_MULX = 488;; let _X86_INS_FMUL = 489;; let _X86_INS_FIMUL = 490;; let _X86_INS_FMULP = 491;; let _X86_INS_MWAIT = 492;; let _X86_INS_NEG = 493;; let _X86_INS_NOP = 494;; let _X86_INS_NOT = 495;; let _X86_INS_OUT = 496;; let _X86_INS_OUTSB = 497;; let _X86_INS_OUTSD = 498;; let _X86_INS_OUTSW = 499;; let _X86_INS_PACKUSDW = 500;; let _X86_INS_PAUSE = 501;; let _X86_INS_PAVGUSB = 502;; let _X86_INS_PBLENDVB = 503;; let _X86_INS_PBLENDW = 504;; let _X86_INS_PCLMULQDQ = 505;; let _X86_INS_PCMPEQQ = 506;; let _X86_INS_PCMPESTRI = 507;; let _X86_INS_PCMPESTRM = 508;; let _X86_INS_PCMPGTQ = 509;; let _X86_INS_PCMPISTRI = 510;; let _X86_INS_PCMPISTRM = 511;; let _X86_INS_PCOMMIT = 512;; let _X86_INS_PDEP = 513;; let _X86_INS_PEXT = 514;; let _X86_INS_PEXTRB = 515;; let _X86_INS_PEXTRD = 516;; let _X86_INS_PEXTRQ = 517;; let _X86_INS_PF2ID = 518;; let _X86_INS_PF2IW = 519;; let _X86_INS_PFACC = 520;; let _X86_INS_PFADD = 521;; let _X86_INS_PFCMPEQ = 522;; let _X86_INS_PFCMPGE = 523;; let _X86_INS_PFCMPGT = 524;; let _X86_INS_PFMAX = 525;; let _X86_INS_PFMIN = 526;; let _X86_INS_PFMUL = 527;; let _X86_INS_PFNACC = 528;; let _X86_INS_PFPNACC = 529;; let _X86_INS_PFRCPIT1 = 530;; let _X86_INS_PFRCPIT2 = 531;; let _X86_INS_PFRCP = 532;; let _X86_INS_PFRSQIT1 = 533;; let _X86_INS_PFRSQRT = 534;; let _X86_INS_PFSUBR = 535;; let _X86_INS_PFSUB = 536;; let _X86_INS_PHMINPOSUW = 537;; let _X86_INS_PI2FD = 538;; let _X86_INS_PI2FW = 539;; let _X86_INS_PINSRB = 540;; let _X86_INS_PINSRD = 541;; let _X86_INS_PINSRQ = 542;; let _X86_INS_PMAXSB = 543;; let _X86_INS_PMAXSD = 544;; let _X86_INS_PMAXUD = 545;; let _X86_INS_PMAXUW = 546;; let _X86_INS_PMINSB = 547;; let _X86_INS_PMINSD = 548;; let _X86_INS_PMINUD = 549;; let _X86_INS_PMINUW = 550;; let _X86_INS_PMOVSXBD = 551;; let _X86_INS_PMOVSXBQ = 552;; let _X86_INS_PMOVSXBW = 553;; let _X86_INS_PMOVSXDQ = 554;; let _X86_INS_PMOVSXWD = 555;; let _X86_INS_PMOVSXWQ = 556;; let _X86_INS_PMOVZXBD = 557;; let _X86_INS_PMOVZXBQ = 558;; let _X86_INS_PMOVZXBW = 559;; let _X86_INS_PMOVZXDQ = 560;; let _X86_INS_PMOVZXWD = 561;; let _X86_INS_PMOVZXWQ = 562;; let _X86_INS_PMULDQ = 563;; let _X86_INS_PMULHRW = 564;; let _X86_INS_PMULLD = 565;; let _X86_INS_POP = 566;; let _X86_INS_POPAW = 567;; let _X86_INS_POPAL = 568;; let _X86_INS_POPCNT = 569;; let _X86_INS_POPF = 570;; let _X86_INS_POPFD = 571;; let _X86_INS_POPFQ = 572;; let _X86_INS_PREFETCH = 573;; let _X86_INS_PREFETCHNTA = 574;; let _X86_INS_PREFETCHT0 = 575;; let _X86_INS_PREFETCHT1 = 576;; let _X86_INS_PREFETCHT2 = 577;; let _X86_INS_PREFETCHW = 578;; let _X86_INS_PSHUFD = 579;; let _X86_INS_PSHUFHW = 580;; let _X86_INS_PSHUFLW = 581;; let _X86_INS_PSLLDQ = 582;; let _X86_INS_PSRLDQ = 583;; let _X86_INS_PSWAPD = 584;; let _X86_INS_PTEST = 585;; let _X86_INS_PUNPCKHQDQ = 586;; let _X86_INS_PUNPCKLQDQ = 587;; let _X86_INS_PUSH = 588;; let _X86_INS_PUSHAW = 589;; let _X86_INS_PUSHAL = 590;; let _X86_INS_PUSHF = 591;; let _X86_INS_PUSHFD = 592;; let _X86_INS_PUSHFQ = 593;; let _X86_INS_RCL = 594;; let _X86_INS_RCPPS = 595;; let _X86_INS_RCPSS = 596;; let _X86_INS_RCR = 597;; let _X86_INS_RDFSBASE = 598;; let _X86_INS_RDGSBASE = 599;; let _X86_INS_RDMSR = 600;; let _X86_INS_RDPMC = 601;; let _X86_INS_RDRAND = 602;; let _X86_INS_RDSEED = 603;; let _X86_INS_RDTSC = 604;; let _X86_INS_RDTSCP = 605;; let _X86_INS_ROL = 606;; let _X86_INS_ROR = 607;; let _X86_INS_RORX = 608;; let _X86_INS_ROUNDPD = 609;; let _X86_INS_ROUNDPS = 610;; let _X86_INS_ROUNDSD = 611;; let _X86_INS_ROUNDSS = 612;; let _X86_INS_RSM = 613;; let _X86_INS_RSQRTPS = 614;; let _X86_INS_RSQRTSS = 615;; let _X86_INS_SAHF = 616;; let _X86_INS_SAL = 617;; let _X86_INS_SALC = 618;; let _X86_INS_SAR = 619;; let _X86_INS_SARX = 620;; let _X86_INS_SBB = 621;; let _X86_INS_SCASB = 622;; let _X86_INS_SCASD = 623;; let _X86_INS_SCASQ = 624;; let _X86_INS_SCASW = 625;; let _X86_INS_SETAE = 626;; let _X86_INS_SETA = 627;; let _X86_INS_SETBE = 628;; let _X86_INS_SETB = 629;; let _X86_INS_SETE = 630;; let _X86_INS_SETGE = 631;; let _X86_INS_SETG = 632;; let _X86_INS_SETLE = 633;; let _X86_INS_SETL = 634;; let _X86_INS_SETNE = 635;; let _X86_INS_SETNO = 636;; let _X86_INS_SETNP = 637;; let _X86_INS_SETNS = 638;; let _X86_INS_SETO = 639;; let _X86_INS_SETP = 640;; let _X86_INS_SETS = 641;; let _X86_INS_SFENCE = 642;; let _X86_INS_SGDT = 643;; let _X86_INS_SHA1MSG1 = 644;; let _X86_INS_SHA1MSG2 = 645;; let _X86_INS_SHA1NEXTE = 646;; let _X86_INS_SHA1RNDS4 = 647;; let _X86_INS_SHA256MSG1 = 648;; let _X86_INS_SHA256MSG2 = 649;; let _X86_INS_SHA256RNDS2 = 650;; let _X86_INS_SHL = 651;; let _X86_INS_SHLD = 652;; let _X86_INS_SHLX = 653;; let _X86_INS_SHR = 654;; let _X86_INS_SHRD = 655;; let _X86_INS_SHRX = 656;; let _X86_INS_SHUFPD = 657;; let _X86_INS_SHUFPS = 658;; let _X86_INS_SIDT = 659;; let _X86_INS_FSIN = 660;; let _X86_INS_SKINIT = 661;; let _X86_INS_SLDT = 662;; let _X86_INS_SMSW = 663;; let _X86_INS_SQRTPD = 664;; let _X86_INS_SQRTPS = 665;; let _X86_INS_SQRTSD = 666;; let _X86_INS_SQRTSS = 667;; let _X86_INS_FSQRT = 668;; let _X86_INS_STAC = 669;; let _X86_INS_STC = 670;; let _X86_INS_STD = 671;; let _X86_INS_STGI = 672;; let _X86_INS_STI = 673;; let _X86_INS_STMXCSR = 674;; let _X86_INS_STOSB = 675;; let _X86_INS_STOSD = 676;; let _X86_INS_STOSQ = 677;; let _X86_INS_STOSW = 678;; let _X86_INS_STR = 679;; let _X86_INS_FST = 680;; let _X86_INS_FSTP = 681;; let _X86_INS_FSTPNCE = 682;; let _X86_INS_FXCH = 683;; let _X86_INS_SUBPD = 684;; let _X86_INS_SUBPS = 685;; let _X86_INS_FSUBR = 686;; let _X86_INS_FISUBR = 687;; let _X86_INS_FSUBRP = 688;; let _X86_INS_SUBSD = 689;; let _X86_INS_SUBSS = 690;; let _X86_INS_FSUB = 691;; let _X86_INS_FISUB = 692;; let _X86_INS_FSUBP = 693;; let _X86_INS_SWAPGS = 694;; let _X86_INS_SYSCALL = 695;; let _X86_INS_SYSENTER = 696;; let _X86_INS_SYSEXIT = 697;; let _X86_INS_SYSRET = 698;; let _X86_INS_T1MSKC = 699;; let _X86_INS_TEST = 700;; let _X86_INS_UD2 = 701;; let _X86_INS_FTST = 702;; let _X86_INS_TZCNT = 703;; let _X86_INS_TZMSK = 704;; let _X86_INS_FUCOMIP = 705;; let _X86_INS_FUCOMI = 706;; let _X86_INS_FUCOMPP = 707;; let _X86_INS_FUCOMP = 708;; let _X86_INS_FUCOM = 709;; let _X86_INS_UD2B = 710;; let _X86_INS_UNPCKHPD = 711;; let _X86_INS_UNPCKHPS = 712;; let _X86_INS_UNPCKLPD = 713;; let _X86_INS_UNPCKLPS = 714;; let _X86_INS_VADDPD = 715;; let _X86_INS_VADDPS = 716;; let _X86_INS_VADDSD = 717;; let _X86_INS_VADDSS = 718;; let _X86_INS_VADDSUBPD = 719;; let _X86_INS_VADDSUBPS = 720;; let _X86_INS_VAESDECLAST = 721;; let _X86_INS_VAESDEC = 722;; let _X86_INS_VAESENCLAST = 723;; let _X86_INS_VAESENC = 724;; let _X86_INS_VAESIMC = 725;; let _X86_INS_VAESKEYGENASSIST = 726;; let _X86_INS_VALIGND = 727;; let _X86_INS_VALIGNQ = 728;; let _X86_INS_VANDNPD = 729;; let _X86_INS_VANDNPS = 730;; let _X86_INS_VANDPD = 731;; let _X86_INS_VANDPS = 732;; let _X86_INS_VBLENDMPD = 733;; let _X86_INS_VBLENDMPS = 734;; let _X86_INS_VBLENDPD = 735;; let _X86_INS_VBLENDPS = 736;; let _X86_INS_VBLENDVPD = 737;; let _X86_INS_VBLENDVPS = 738;; let _X86_INS_VBROADCASTF128 = 739;; let _X86_INS_VBROADCASTI32X4 = 740;; let _X86_INS_VBROADCASTI64X4 = 741;; let _X86_INS_VBROADCASTSD = 742;; let _X86_INS_VBROADCASTSS = 743;; let _X86_INS_VCOMPRESSPD = 744;; let _X86_INS_VCOMPRESSPS = 745;; let _X86_INS_VCVTDQ2PD = 746;; let _X86_INS_VCVTDQ2PS = 747;; let _X86_INS_VCVTPD2DQX = 748;; let _X86_INS_VCVTPD2DQ = 749;; let _X86_INS_VCVTPD2PSX = 750;; let _X86_INS_VCVTPD2PS = 751;; let _X86_INS_VCVTPD2UDQ = 752;; let _X86_INS_VCVTPH2PS = 753;; let _X86_INS_VCVTPS2DQ = 754;; let _X86_INS_VCVTPS2PD = 755;; let _X86_INS_VCVTPS2PH = 756;; let _X86_INS_VCVTPS2UDQ = 757;; let _X86_INS_VCVTSD2SI = 758;; let _X86_INS_VCVTSD2USI = 759;; let _X86_INS_VCVTSS2SI = 760;; let _X86_INS_VCVTSS2USI = 761;; let _X86_INS_VCVTTPD2DQX = 762;; let _X86_INS_VCVTTPD2DQ = 763;; let _X86_INS_VCVTTPD2UDQ = 764;; let _X86_INS_VCVTTPS2DQ = 765;; let _X86_INS_VCVTTPS2UDQ = 766;; let _X86_INS_VCVTUDQ2PD = 767;; let _X86_INS_VCVTUDQ2PS = 768;; let _X86_INS_VDIVPD = 769;; let _X86_INS_VDIVPS = 770;; let _X86_INS_VDIVSD = 771;; let _X86_INS_VDIVSS = 772;; let _X86_INS_VDPPD = 773;; let _X86_INS_VDPPS = 774;; let _X86_INS_VERR = 775;; let _X86_INS_VERW = 776;; let _X86_INS_VEXP2PD = 777;; let _X86_INS_VEXP2PS = 778;; let _X86_INS_VEXPANDPD = 779;; let _X86_INS_VEXPANDPS = 780;; let _X86_INS_VEXTRACTF128 = 781;; let _X86_INS_VEXTRACTF32X4 = 782;; let _X86_INS_VEXTRACTF64X4 = 783;; let _X86_INS_VEXTRACTI128 = 784;; let _X86_INS_VEXTRACTI32X4 = 785;; let _X86_INS_VEXTRACTI64X4 = 786;; let _X86_INS_VEXTRACTPS = 787;; let _X86_INS_VFMADD132PD = 788;; let _X86_INS_VFMADD132PS = 789;; let _X86_INS_VFMADDPD = 790;; let _X86_INS_VFMADD213PD = 791;; let _X86_INS_VFMADD231PD = 792;; let _X86_INS_VFMADDPS = 793;; let _X86_INS_VFMADD213PS = 794;; let _X86_INS_VFMADD231PS = 795;; let _X86_INS_VFMADDSD = 796;; let _X86_INS_VFMADD213SD = 797;; let _X86_INS_VFMADD132SD = 798;; let _X86_INS_VFMADD231SD = 799;; let _X86_INS_VFMADDSS = 800;; let _X86_INS_VFMADD213SS = 801;; let _X86_INS_VFMADD132SS = 802;; let _X86_INS_VFMADD231SS = 803;; let _X86_INS_VFMADDSUB132PD = 804;; let _X86_INS_VFMADDSUB132PS = 805;; let _X86_INS_VFMADDSUBPD = 806;; let _X86_INS_VFMADDSUB213PD = 807;; let _X86_INS_VFMADDSUB231PD = 808;; let _X86_INS_VFMADDSUBPS = 809;; let _X86_INS_VFMADDSUB213PS = 810;; let _X86_INS_VFMADDSUB231PS = 811;; let _X86_INS_VFMSUB132PD = 812;; let _X86_INS_VFMSUB132PS = 813;; let _X86_INS_VFMSUBADD132PD = 814;; let _X86_INS_VFMSUBADD132PS = 815;; let _X86_INS_VFMSUBADDPD = 816;; let _X86_INS_VFMSUBADD213PD = 817;; let _X86_INS_VFMSUBADD231PD = 818;; let _X86_INS_VFMSUBADDPS = 819;; let _X86_INS_VFMSUBADD213PS = 820;; let _X86_INS_VFMSUBADD231PS = 821;; let _X86_INS_VFMSUBPD = 822;; let _X86_INS_VFMSUB213PD = 823;; let _X86_INS_VFMSUB231PD = 824;; let _X86_INS_VFMSUBPS = 825;; let _X86_INS_VFMSUB213PS = 826;; let _X86_INS_VFMSUB231PS = 827;; let _X86_INS_VFMSUBSD = 828;; let _X86_INS_VFMSUB213SD = 829;; let _X86_INS_VFMSUB132SD = 830;; let _X86_INS_VFMSUB231SD = 831;; let _X86_INS_VFMSUBSS = 832;; let _X86_INS_VFMSUB213SS = 833;; let _X86_INS_VFMSUB132SS = 834;; let _X86_INS_VFMSUB231SS = 835;; let _X86_INS_VFNMADD132PD = 836;; let _X86_INS_VFNMADD132PS = 837;; let _X86_INS_VFNMADDPD = 838;; let _X86_INS_VFNMADD213PD = 839;; let _X86_INS_VFNMADD231PD = 840;; let _X86_INS_VFNMADDPS = 841;; let _X86_INS_VFNMADD213PS = 842;; let _X86_INS_VFNMADD231PS = 843;; let _X86_INS_VFNMADDSD = 844;; let _X86_INS_VFNMADD213SD = 845;; let _X86_INS_VFNMADD132SD = 846;; let _X86_INS_VFNMADD231SD = 847;; let _X86_INS_VFNMADDSS = 848;; let _X86_INS_VFNMADD213SS = 849;; let _X86_INS_VFNMADD132SS = 850;; let _X86_INS_VFNMADD231SS = 851;; let _X86_INS_VFNMSUB132PD = 852;; let _X86_INS_VFNMSUB132PS = 853;; let _X86_INS_VFNMSUBPD = 854;; let _X86_INS_VFNMSUB213PD = 855;; let _X86_INS_VFNMSUB231PD = 856;; let _X86_INS_VFNMSUBPS = 857;; let _X86_INS_VFNMSUB213PS = 858;; let _X86_INS_VFNMSUB231PS = 859;; let _X86_INS_VFNMSUBSD = 860;; let _X86_INS_VFNMSUB213SD = 861;; let _X86_INS_VFNMSUB132SD = 862;; let _X86_INS_VFNMSUB231SD = 863;; let _X86_INS_VFNMSUBSS = 864;; let _X86_INS_VFNMSUB213SS = 865;; let _X86_INS_VFNMSUB132SS = 866;; let _X86_INS_VFNMSUB231SS = 867;; let _X86_INS_VFRCZPD = 868;; let _X86_INS_VFRCZPS = 869;; let _X86_INS_VFRCZSD = 870;; let _X86_INS_VFRCZSS = 871;; let _X86_INS_VORPD = 872;; let _X86_INS_VORPS = 873;; let _X86_INS_VXORPD = 874;; let _X86_INS_VXORPS = 875;; let _X86_INS_VGATHERDPD = 876;; let _X86_INS_VGATHERDPS = 877;; let _X86_INS_VGATHERPF0DPD = 878;; let _X86_INS_VGATHERPF0DPS = 879;; let _X86_INS_VGATHERPF0QPD = 880;; let _X86_INS_VGATHERPF0QPS = 881;; let _X86_INS_VGATHERPF1DPD = 882;; let _X86_INS_VGATHERPF1DPS = 883;; let _X86_INS_VGATHERPF1QPD = 884;; let _X86_INS_VGATHERPF1QPS = 885;; let _X86_INS_VGATHERQPD = 886;; let _X86_INS_VGATHERQPS = 887;; let _X86_INS_VHADDPD = 888;; let _X86_INS_VHADDPS = 889;; let _X86_INS_VHSUBPD = 890;; let _X86_INS_VHSUBPS = 891;; let _X86_INS_VINSERTF128 = 892;; let _X86_INS_VINSERTF32X4 = 893;; let _X86_INS_VINSERTF32X8 = 894;; let _X86_INS_VINSERTF64X2 = 895;; let _X86_INS_VINSERTF64X4 = 896;; let _X86_INS_VINSERTI128 = 897;; let _X86_INS_VINSERTI32X4 = 898;; let _X86_INS_VINSERTI32X8 = 899;; let _X86_INS_VINSERTI64X2 = 900;; let _X86_INS_VINSERTI64X4 = 901;; let _X86_INS_VINSERTPS = 902;; let _X86_INS_VLDDQU = 903;; let _X86_INS_VLDMXCSR = 904;; let _X86_INS_VMASKMOVDQU = 905;; let _X86_INS_VMASKMOVPD = 906;; let _X86_INS_VMASKMOVPS = 907;; let _X86_INS_VMAXPD = 908;; let _X86_INS_VMAXPS = 909;; let _X86_INS_VMAXSD = 910;; let _X86_INS_VMAXSS = 911;; let _X86_INS_VMCALL = 912;; let _X86_INS_VMCLEAR = 913;; let _X86_INS_VMFUNC = 914;; let _X86_INS_VMINPD = 915;; let _X86_INS_VMINPS = 916;; let _X86_INS_VMINSD = 917;; let _X86_INS_VMINSS = 918;; let _X86_INS_VMLAUNCH = 919;; let _X86_INS_VMLOAD = 920;; let _X86_INS_VMMCALL = 921;; let _X86_INS_VMOVQ = 922;; let _X86_INS_VMOVDDUP = 923;; let _X86_INS_VMOVD = 924;; let _X86_INS_VMOVDQA32 = 925;; let _X86_INS_VMOVDQA64 = 926;; let _X86_INS_VMOVDQA = 927;; let _X86_INS_VMOVDQU16 = 928;; let _X86_INS_VMOVDQU32 = 929;; let _X86_INS_VMOVDQU64 = 930;; let _X86_INS_VMOVDQU8 = 931;; let _X86_INS_VMOVDQU = 932;; let _X86_INS_VMOVHLPS = 933;; let _X86_INS_VMOVHPD = 934;; let _X86_INS_VMOVHPS = 935;; let _X86_INS_VMOVLHPS = 936;; let _X86_INS_VMOVLPD = 937;; let _X86_INS_VMOVLPS = 938;; let _X86_INS_VMOVMSKPD = 939;; let _X86_INS_VMOVMSKPS = 940;; let _X86_INS_VMOVNTDQA = 941;; let _X86_INS_VMOVNTDQ = 942;; let _X86_INS_VMOVNTPD = 943;; let _X86_INS_VMOVNTPS = 944;; let _X86_INS_VMOVSD = 945;; let _X86_INS_VMOVSHDUP = 946;; let _X86_INS_VMOVSLDUP = 947;; let _X86_INS_VMOVSS = 948;; let _X86_INS_VMOVUPD = 949;; let _X86_INS_VMOVUPS = 950;; let _X86_INS_VMPSADBW = 951;; let _X86_INS_VMPTRLD = 952;; let _X86_INS_VMPTRST = 953;; let _X86_INS_VMREAD = 954;; let _X86_INS_VMRESUME = 955;; let _X86_INS_VMRUN = 956;; let _X86_INS_VMSAVE = 957;; let _X86_INS_VMULPD = 958;; let _X86_INS_VMULPS = 959;; let _X86_INS_VMULSD = 960;; let _X86_INS_VMULSS = 961;; let _X86_INS_VMWRITE = 962;; let _X86_INS_VMXOFF = 963;; let _X86_INS_VMXON = 964;; let _X86_INS_VPABSB = 965;; let _X86_INS_VPABSD = 966;; let _X86_INS_VPABSQ = 967;; let _X86_INS_VPABSW = 968;; let _X86_INS_VPACKSSDW = 969;; let _X86_INS_VPACKSSWB = 970;; let _X86_INS_VPACKUSDW = 971;; let _X86_INS_VPACKUSWB = 972;; let _X86_INS_VPADDB = 973;; let _X86_INS_VPADDD = 974;; let _X86_INS_VPADDQ = 975;; let _X86_INS_VPADDSB = 976;; let _X86_INS_VPADDSW = 977;; let _X86_INS_VPADDUSB = 978;; let _X86_INS_VPADDUSW = 979;; let _X86_INS_VPADDW = 980;; let _X86_INS_VPALIGNR = 981;; let _X86_INS_VPANDD = 982;; let _X86_INS_VPANDND = 983;; let _X86_INS_VPANDNQ = 984;; let _X86_INS_VPANDN = 985;; let _X86_INS_VPANDQ = 986;; let _X86_INS_VPAND = 987;; let _X86_INS_VPAVGB = 988;; let _X86_INS_VPAVGW = 989;; let _X86_INS_VPBLENDD = 990;; let _X86_INS_VPBLENDMB = 991;; let _X86_INS_VPBLENDMD = 992;; let _X86_INS_VPBLENDMQ = 993;; let _X86_INS_VPBLENDMW = 994;; let _X86_INS_VPBLENDVB = 995;; let _X86_INS_VPBLENDW = 996;; let _X86_INS_VPBROADCASTB = 997;; let _X86_INS_VPBROADCASTD = 998;; let _X86_INS_VPBROADCASTMB2Q = 999;; let _X86_INS_VPBROADCASTMW2D = 1000;; let _X86_INS_VPBROADCASTQ = 1001;; let _X86_INS_VPBROADCASTW = 1002;; let _X86_INS_VPCLMULQDQ = 1003;; let _X86_INS_VPCMOV = 1004;; let _X86_INS_VPCMPB = 1005;; let _X86_INS_VPCMPD = 1006;; let _X86_INS_VPCMPEQB = 1007;; let _X86_INS_VPCMPEQD = 1008;; let _X86_INS_VPCMPEQQ = 1009;; let _X86_INS_VPCMPEQW = 1010;; let _X86_INS_VPCMPESTRI = 1011;; let _X86_INS_VPCMPESTRM = 1012;; let _X86_INS_VPCMPGTB = 1013;; let _X86_INS_VPCMPGTD = 1014;; let _X86_INS_VPCMPGTQ = 1015;; let _X86_INS_VPCMPGTW = 1016;; let _X86_INS_VPCMPISTRI = 1017;; let _X86_INS_VPCMPISTRM = 1018;; let _X86_INS_VPCMPQ = 1019;; let _X86_INS_VPCMPUB = 1020;; let _X86_INS_VPCMPUD = 1021;; let _X86_INS_VPCMPUQ = 1022;; let _X86_INS_VPCMPUW = 1023;; let _X86_INS_VPCMPW = 1024;; let _X86_INS_VPCOMB = 1025;; let _X86_INS_VPCOMD = 1026;; let _X86_INS_VPCOMPRESSD = 1027;; let _X86_INS_VPCOMPRESSQ = 1028;; let _X86_INS_VPCOMQ = 1029;; let _X86_INS_VPCOMUB = 1030;; let _X86_INS_VPCOMUD = 1031;; let _X86_INS_VPCOMUQ = 1032;; let _X86_INS_VPCOMUW = 1033;; let _X86_INS_VPCOMW = 1034;; let _X86_INS_VPCONFLICTD = 1035;; let _X86_INS_VPCONFLICTQ = 1036;; let _X86_INS_VPERM2F128 = 1037;; let _X86_INS_VPERM2I128 = 1038;; let _X86_INS_VPERMD = 1039;; let _X86_INS_VPERMI2D = 1040;; let _X86_INS_VPERMI2PD = 1041;; let _X86_INS_VPERMI2PS = 1042;; let _X86_INS_VPERMI2Q = 1043;; let _X86_INS_VPERMIL2PD = 1044;; let _X86_INS_VPERMIL2PS = 1045;; let _X86_INS_VPERMILPD = 1046;; let _X86_INS_VPERMILPS = 1047;; let _X86_INS_VPERMPD = 1048;; let _X86_INS_VPERMPS = 1049;; let _X86_INS_VPERMQ = 1050;; let _X86_INS_VPERMT2D = 1051;; let _X86_INS_VPERMT2PD = 1052;; let _X86_INS_VPERMT2PS = 1053;; let _X86_INS_VPERMT2Q = 1054;; let _X86_INS_VPEXPANDD = 1055;; let _X86_INS_VPEXPANDQ = 1056;; let _X86_INS_VPEXTRB = 1057;; let _X86_INS_VPEXTRD = 1058;; let _X86_INS_VPEXTRQ = 1059;; let _X86_INS_VPEXTRW = 1060;; let _X86_INS_VPGATHERDD = 1061;; let _X86_INS_VPGATHERDQ = 1062;; let _X86_INS_VPGATHERQD = 1063;; let _X86_INS_VPGATHERQQ = 1064;; let _X86_INS_VPHADDBD = 1065;; let _X86_INS_VPHADDBQ = 1066;; let _X86_INS_VPHADDBW = 1067;; let _X86_INS_VPHADDDQ = 1068;; let _X86_INS_VPHADDD = 1069;; let _X86_INS_VPHADDSW = 1070;; let _X86_INS_VPHADDUBD = 1071;; let _X86_INS_VPHADDUBQ = 1072;; let _X86_INS_VPHADDUBW = 1073;; let _X86_INS_VPHADDUDQ = 1074;; let _X86_INS_VPHADDUWD = 1075;; let _X86_INS_VPHADDUWQ = 1076;; let _X86_INS_VPHADDWD = 1077;; let _X86_INS_VPHADDWQ = 1078;; let _X86_INS_VPHADDW = 1079;; let _X86_INS_VPHMINPOSUW = 1080;; let _X86_INS_VPHSUBBW = 1081;; let _X86_INS_VPHSUBDQ = 1082;; let _X86_INS_VPHSUBD = 1083;; let _X86_INS_VPHSUBSW = 1084;; let _X86_INS_VPHSUBWD = 1085;; let _X86_INS_VPHSUBW = 1086;; let _X86_INS_VPINSRB = 1087;; let _X86_INS_VPINSRD = 1088;; let _X86_INS_VPINSRQ = 1089;; let _X86_INS_VPINSRW = 1090;; let _X86_INS_VPLZCNTD = 1091;; let _X86_INS_VPLZCNTQ = 1092;; let _X86_INS_VPMACSDD = 1093;; let _X86_INS_VPMACSDQH = 1094;; let _X86_INS_VPMACSDQL = 1095;; let _X86_INS_VPMACSSDD = 1096;; let _X86_INS_VPMACSSDQH = 1097;; let _X86_INS_VPMACSSDQL = 1098;; let _X86_INS_VPMACSSWD = 1099;; let _X86_INS_VPMACSSWW = 1100;; let _X86_INS_VPMACSWD = 1101;; let _X86_INS_VPMACSWW = 1102;; let _X86_INS_VPMADCSSWD = 1103;; let _X86_INS_VPMADCSWD = 1104;; let _X86_INS_VPMADDUBSW = 1105;; let _X86_INS_VPMADDWD = 1106;; let _X86_INS_VPMASKMOVD = 1107;; let _X86_INS_VPMASKMOVQ = 1108;; let _X86_INS_VPMAXSB = 1109;; let _X86_INS_VPMAXSD = 1110;; let _X86_INS_VPMAXSQ = 1111;; let _X86_INS_VPMAXSW = 1112;; let _X86_INS_VPMAXUB = 1113;; let _X86_INS_VPMAXUD = 1114;; let _X86_INS_VPMAXUQ = 1115;; let _X86_INS_VPMAXUW = 1116;; let _X86_INS_VPMINSB = 1117;; let _X86_INS_VPMINSD = 1118;; let _X86_INS_VPMINSQ = 1119;; let _X86_INS_VPMINSW = 1120;; let _X86_INS_VPMINUB = 1121;; let _X86_INS_VPMINUD = 1122;; let _X86_INS_VPMINUQ = 1123;; let _X86_INS_VPMINUW = 1124;; let _X86_INS_VPMOVDB = 1125;; let _X86_INS_VPMOVDW = 1126;; let _X86_INS_VPMOVM2B = 1127;; let _X86_INS_VPMOVM2D = 1128;; let _X86_INS_VPMOVM2Q = 1129;; let _X86_INS_VPMOVM2W = 1130;; let _X86_INS_VPMOVMSKB = 1131;; let _X86_INS_VPMOVQB = 1132;; let _X86_INS_VPMOVQD = 1133;; let _X86_INS_VPMOVQW = 1134;; let _X86_INS_VPMOVSDB = 1135;; let _X86_INS_VPMOVSDW = 1136;; let _X86_INS_VPMOVSQB = 1137;; let _X86_INS_VPMOVSQD = 1138;; let _X86_INS_VPMOVSQW = 1139;; let _X86_INS_VPMOVSXBD = 1140;; let _X86_INS_VPMOVSXBQ = 1141;; let _X86_INS_VPMOVSXBW = 1142;; let _X86_INS_VPMOVSXDQ = 1143;; let _X86_INS_VPMOVSXWD = 1144;; let _X86_INS_VPMOVSXWQ = 1145;; let _X86_INS_VPMOVUSDB = 1146;; let _X86_INS_VPMOVUSDW = 1147;; let _X86_INS_VPMOVUSQB = 1148;; let _X86_INS_VPMOVUSQD = 1149;; let _X86_INS_VPMOVUSQW = 1150;; let _X86_INS_VPMOVZXBD = 1151;; let _X86_INS_VPMOVZXBQ = 1152;; let _X86_INS_VPMOVZXBW = 1153;; let _X86_INS_VPMOVZXDQ = 1154;; let _X86_INS_VPMOVZXWD = 1155;; let _X86_INS_VPMOVZXWQ = 1156;; let _X86_INS_VPMULDQ = 1157;; let _X86_INS_VPMULHRSW = 1158;; let _X86_INS_VPMULHUW = 1159;; let _X86_INS_VPMULHW = 1160;; let _X86_INS_VPMULLD = 1161;; let _X86_INS_VPMULLQ = 1162;; let _X86_INS_VPMULLW = 1163;; let _X86_INS_VPMULUDQ = 1164;; let _X86_INS_VPORD = 1165;; let _X86_INS_VPORQ = 1166;; let _X86_INS_VPOR = 1167;; let _X86_INS_VPPERM = 1168;; let _X86_INS_VPROTB = 1169;; let _X86_INS_VPROTD = 1170;; let _X86_INS_VPROTQ = 1171;; let _X86_INS_VPROTW = 1172;; let _X86_INS_VPSADBW = 1173;; let _X86_INS_VPSCATTERDD = 1174;; let _X86_INS_VPSCATTERDQ = 1175;; let _X86_INS_VPSCATTERQD = 1176;; let _X86_INS_VPSCATTERQQ = 1177;; let _X86_INS_VPSHAB = 1178;; let _X86_INS_VPSHAD = 1179;; let _X86_INS_VPSHAQ = 1180;; let _X86_INS_VPSHAW = 1181;; let _X86_INS_VPSHLB = 1182;; let _X86_INS_VPSHLD = 1183;; let _X86_INS_VPSHLQ = 1184;; let _X86_INS_VPSHLW = 1185;; let _X86_INS_VPSHUFB = 1186;; let _X86_INS_VPSHUFD = 1187;; let _X86_INS_VPSHUFHW = 1188;; let _X86_INS_VPSHUFLW = 1189;; let _X86_INS_VPSIGNB = 1190;; let _X86_INS_VPSIGND = 1191;; let _X86_INS_VPSIGNW = 1192;; let _X86_INS_VPSLLDQ = 1193;; let _X86_INS_VPSLLD = 1194;; let _X86_INS_VPSLLQ = 1195;; let _X86_INS_VPSLLVD = 1196;; let _X86_INS_VPSLLVQ = 1197;; let _X86_INS_VPSLLW = 1198;; let _X86_INS_VPSRAD = 1199;; let _X86_INS_VPSRAQ = 1200;; let _X86_INS_VPSRAVD = 1201;; let _X86_INS_VPSRAVQ = 1202;; let _X86_INS_VPSRAW = 1203;; let _X86_INS_VPSRLDQ = 1204;; let _X86_INS_VPSRLD = 1205;; let _X86_INS_VPSRLQ = 1206;; let _X86_INS_VPSRLVD = 1207;; let _X86_INS_VPSRLVQ = 1208;; let _X86_INS_VPSRLW = 1209;; let _X86_INS_VPSUBB = 1210;; let _X86_INS_VPSUBD = 1211;; let _X86_INS_VPSUBQ = 1212;; let _X86_INS_VPSUBSB = 1213;; let _X86_INS_VPSUBSW = 1214;; let _X86_INS_VPSUBUSB = 1215;; let _X86_INS_VPSUBUSW = 1216;; let _X86_INS_VPSUBW = 1217;; let _X86_INS_VPTESTMD = 1218;; let _X86_INS_VPTESTMQ = 1219;; let _X86_INS_VPTESTNMD = 1220;; let _X86_INS_VPTESTNMQ = 1221;; let _X86_INS_VPTEST = 1222;; let _X86_INS_VPUNPCKHBW = 1223;; let _X86_INS_VPUNPCKHDQ = 1224;; let _X86_INS_VPUNPCKHQDQ = 1225;; let _X86_INS_VPUNPCKHWD = 1226;; let _X86_INS_VPUNPCKLBW = 1227;; let _X86_INS_VPUNPCKLDQ = 1228;; let _X86_INS_VPUNPCKLQDQ = 1229;; let _X86_INS_VPUNPCKLWD = 1230;; let _X86_INS_VPXORD = 1231;; let _X86_INS_VPXORQ = 1232;; let _X86_INS_VPXOR = 1233;; let _X86_INS_VRCP14PD = 1234;; let _X86_INS_VRCP14PS = 1235;; let _X86_INS_VRCP14SD = 1236;; let _X86_INS_VRCP14SS = 1237;; let _X86_INS_VRCP28PD = 1238;; let _X86_INS_VRCP28PS = 1239;; let _X86_INS_VRCP28SD = 1240;; let _X86_INS_VRCP28SS = 1241;; let _X86_INS_VRCPPS = 1242;; let _X86_INS_VRCPSS = 1243;; let _X86_INS_VRNDSCALEPD = 1244;; let _X86_INS_VRNDSCALEPS = 1245;; let _X86_INS_VRNDSCALESD = 1246;; let _X86_INS_VRNDSCALESS = 1247;; let _X86_INS_VROUNDPD = 1248;; let _X86_INS_VROUNDPS = 1249;; let _X86_INS_VROUNDSD = 1250;; let _X86_INS_VROUNDSS = 1251;; let _X86_INS_VRSQRT14PD = 1252;; let _X86_INS_VRSQRT14PS = 1253;; let _X86_INS_VRSQRT14SD = 1254;; let _X86_INS_VRSQRT14SS = 1255;; let _X86_INS_VRSQRT28PD = 1256;; let _X86_INS_VRSQRT28PS = 1257;; let _X86_INS_VRSQRT28SD = 1258;; let _X86_INS_VRSQRT28SS = 1259;; let _X86_INS_VRSQRTPS = 1260;; let _X86_INS_VRSQRTSS = 1261;; let _X86_INS_VSCATTERDPD = 1262;; let _X86_INS_VSCATTERDPS = 1263;; let _X86_INS_VSCATTERPF0DPD = 1264;; let _X86_INS_VSCATTERPF0DPS = 1265;; let _X86_INS_VSCATTERPF0QPD = 1266;; let _X86_INS_VSCATTERPF0QPS = 1267;; let _X86_INS_VSCATTERPF1DPD = 1268;; let _X86_INS_VSCATTERPF1DPS = 1269;; let _X86_INS_VSCATTERPF1QPD = 1270;; let _X86_INS_VSCATTERPF1QPS = 1271;; let _X86_INS_VSCATTERQPD = 1272;; let _X86_INS_VSCATTERQPS = 1273;; let _X86_INS_VSHUFPD = 1274;; let _X86_INS_VSHUFPS = 1275;; let _X86_INS_VSQRTPD = 1276;; let _X86_INS_VSQRTPS = 1277;; let _X86_INS_VSQRTSD = 1278;; let _X86_INS_VSQRTSS = 1279;; let _X86_INS_VSTMXCSR = 1280;; let _X86_INS_VSUBPD = 1281;; let _X86_INS_VSUBPS = 1282;; let _X86_INS_VSUBSD = 1283;; let _X86_INS_VSUBSS = 1284;; let _X86_INS_VTESTPD = 1285;; let _X86_INS_VTESTPS = 1286;; let _X86_INS_VUNPCKHPD = 1287;; let _X86_INS_VUNPCKHPS = 1288;; let _X86_INS_VUNPCKLPD = 1289;; let _X86_INS_VUNPCKLPS = 1290;; let _X86_INS_VZEROALL = 1291;; let _X86_INS_VZEROUPPER = 1292;; let _X86_INS_WAIT = 1293;; let _X86_INS_WBINVD = 1294;; let _X86_INS_WRFSBASE = 1295;; let _X86_INS_WRGSBASE = 1296;; let _X86_INS_WRMSR = 1297;; let _X86_INS_XABORT = 1298;; let _X86_INS_XACQUIRE = 1299;; let _X86_INS_XBEGIN = 1300;; let _X86_INS_XCHG = 1301;; let _X86_INS_XCRYPTCBC = 1302;; let _X86_INS_XCRYPTCFB = 1303;; let _X86_INS_XCRYPTCTR = 1304;; let _X86_INS_XCRYPTECB = 1305;; let _X86_INS_XCRYPTOFB = 1306;; let _X86_INS_XEND = 1307;; let _X86_INS_XGETBV = 1308;; let _X86_INS_XLATB = 1309;; let _X86_INS_XRELEASE = 1310;; let _X86_INS_XRSTOR = 1311;; let _X86_INS_XRSTOR64 = 1312;; let _X86_INS_XRSTORS = 1313;; let _X86_INS_XRSTORS64 = 1314;; let _X86_INS_XSAVE = 1315;; let _X86_INS_XSAVE64 = 1316;; let _X86_INS_XSAVEC = 1317;; let _X86_INS_XSAVEC64 = 1318;; let _X86_INS_XSAVEOPT = 1319;; let _X86_INS_XSAVEOPT64 = 1320;; let _X86_INS_XSAVES = 1321;; let _X86_INS_XSAVES64 = 1322;; let _X86_INS_XSETBV = 1323;; let _X86_INS_XSHA1 = 1324;; let _X86_INS_XSHA256 = 1325;; let _X86_INS_XSTORE = 1326;; let _X86_INS_XTEST = 1327;; let _X86_INS_FDISI8087_NOP = 1328;; let _X86_INS_FENI8087_NOP = 1329;; let _X86_INS_CMPSS = 1330;; let _X86_INS_CMPEQSS = 1331;; let _X86_INS_CMPLTSS = 1332;; let _X86_INS_CMPLESS = 1333;; let _X86_INS_CMPUNORDSS = 1334;; let _X86_INS_CMPNEQSS = 1335;; let _X86_INS_CMPNLTSS = 1336;; let _X86_INS_CMPNLESS = 1337;; let _X86_INS_CMPORDSS = 1338;; let _X86_INS_CMPSD = 1339;; let _X86_INS_CMPEQSD = 1340;; let _X86_INS_CMPLTSD = 1341;; let _X86_INS_CMPLESD = 1342;; let _X86_INS_CMPUNORDSD = 1343;; let _X86_INS_CMPNEQSD = 1344;; let _X86_INS_CMPNLTSD = 1345;; let _X86_INS_CMPNLESD = 1346;; let _X86_INS_CMPORDSD = 1347;; let _X86_INS_CMPPS = 1348;; let _X86_INS_CMPEQPS = 1349;; let _X86_INS_CMPLTPS = 1350;; let _X86_INS_CMPLEPS = 1351;; let _X86_INS_CMPUNORDPS = 1352;; let _X86_INS_CMPNEQPS = 1353;; let _X86_INS_CMPNLTPS = 1354;; let _X86_INS_CMPNLEPS = 1355;; let _X86_INS_CMPORDPS = 1356;; let _X86_INS_CMPPD = 1357;; let _X86_INS_CMPEQPD = 1358;; let _X86_INS_CMPLTPD = 1359;; let _X86_INS_CMPLEPD = 1360;; let _X86_INS_CMPUNORDPD = 1361;; let _X86_INS_CMPNEQPD = 1362;; let _X86_INS_CMPNLTPD = 1363;; let _X86_INS_CMPNLEPD = 1364;; let _X86_INS_CMPORDPD = 1365;; let _X86_INS_VCMPSS = 1366;; let _X86_INS_VCMPEQSS = 1367;; let _X86_INS_VCMPLTSS = 1368;; let _X86_INS_VCMPLESS = 1369;; let _X86_INS_VCMPUNORDSS = 1370;; let _X86_INS_VCMPNEQSS = 1371;; let _X86_INS_VCMPNLTSS = 1372;; let _X86_INS_VCMPNLESS = 1373;; let _X86_INS_VCMPORDSS = 1374;; let _X86_INS_VCMPEQ_UQSS = 1375;; let _X86_INS_VCMPNGESS = 1376;; let _X86_INS_VCMPNGTSS = 1377;; let _X86_INS_VCMPFALSESS = 1378;; let _X86_INS_VCMPNEQ_OQSS = 1379;; let _X86_INS_VCMPGESS = 1380;; let _X86_INS_VCMPGTSS = 1381;; let _X86_INS_VCMPTRUESS = 1382;; let _X86_INS_VCMPEQ_OSSS = 1383;; let _X86_INS_VCMPLT_OQSS = 1384;; let _X86_INS_VCMPLE_OQSS = 1385;; let _X86_INS_VCMPUNORD_SSS = 1386;; let _X86_INS_VCMPNEQ_USSS = 1387;; let _X86_INS_VCMPNLT_UQSS = 1388;; let _X86_INS_VCMPNLE_UQSS = 1389;; let _X86_INS_VCMPORD_SSS = 1390;; let _X86_INS_VCMPEQ_USSS = 1391;; let _X86_INS_VCMPNGE_UQSS = 1392;; let _X86_INS_VCMPNGT_UQSS = 1393;; let _X86_INS_VCMPFALSE_OSSS = 1394;; let _X86_INS_VCMPNEQ_OSSS = 1395;; let _X86_INS_VCMPGE_OQSS = 1396;; let _X86_INS_VCMPGT_OQSS = 1397;; let _X86_INS_VCMPTRUE_USSS = 1398;; let _X86_INS_VCMPSD = 1399;; let _X86_INS_VCMPEQSD = 1400;; let _X86_INS_VCMPLTSD = 1401;; let _X86_INS_VCMPLESD = 1402;; let _X86_INS_VCMPUNORDSD = 1403;; let _X86_INS_VCMPNEQSD = 1404;; let _X86_INS_VCMPNLTSD = 1405;; let _X86_INS_VCMPNLESD = 1406;; let _X86_INS_VCMPORDSD = 1407;; let _X86_INS_VCMPEQ_UQSD = 1408;; let _X86_INS_VCMPNGESD = 1409;; let _X86_INS_VCMPNGTSD = 1410;; let _X86_INS_VCMPFALSESD = 1411;; let _X86_INS_VCMPNEQ_OQSD = 1412;; let _X86_INS_VCMPGESD = 1413;; let _X86_INS_VCMPGTSD = 1414;; let _X86_INS_VCMPTRUESD = 1415;; let _X86_INS_VCMPEQ_OSSD = 1416;; let _X86_INS_VCMPLT_OQSD = 1417;; let _X86_INS_VCMPLE_OQSD = 1418;; let _X86_INS_VCMPUNORD_SSD = 1419;; let _X86_INS_VCMPNEQ_USSD = 1420;; let _X86_INS_VCMPNLT_UQSD = 1421;; let _X86_INS_VCMPNLE_UQSD = 1422;; let _X86_INS_VCMPORD_SSD = 1423;; let _X86_INS_VCMPEQ_USSD = 1424;; let _X86_INS_VCMPNGE_UQSD = 1425;; let _X86_INS_VCMPNGT_UQSD = 1426;; let _X86_INS_VCMPFALSE_OSSD = 1427;; let _X86_INS_VCMPNEQ_OSSD = 1428;; let _X86_INS_VCMPGE_OQSD = 1429;; let _X86_INS_VCMPGT_OQSD = 1430;; let _X86_INS_VCMPTRUE_USSD = 1431;; let _X86_INS_VCMPPS = 1432;; let _X86_INS_VCMPEQPS = 1433;; let _X86_INS_VCMPLTPS = 1434;; let _X86_INS_VCMPLEPS = 1435;; let _X86_INS_VCMPUNORDPS = 1436;; let _X86_INS_VCMPNEQPS = 1437;; let _X86_INS_VCMPNLTPS = 1438;; let _X86_INS_VCMPNLEPS = 1439;; let _X86_INS_VCMPORDPS = 1440;; let _X86_INS_VCMPEQ_UQPS = 1441;; let _X86_INS_VCMPNGEPS = 1442;; let _X86_INS_VCMPNGTPS = 1443;; let _X86_INS_VCMPFALSEPS = 1444;; let _X86_INS_VCMPNEQ_OQPS = 1445;; let _X86_INS_VCMPGEPS = 1446;; let _X86_INS_VCMPGTPS = 1447;; let _X86_INS_VCMPTRUEPS = 1448;; let _X86_INS_VCMPEQ_OSPS = 1449;; let _X86_INS_VCMPLT_OQPS = 1450;; let _X86_INS_VCMPLE_OQPS = 1451;; let _X86_INS_VCMPUNORD_SPS = 1452;; let _X86_INS_VCMPNEQ_USPS = 1453;; let _X86_INS_VCMPNLT_UQPS = 1454;; let _X86_INS_VCMPNLE_UQPS = 1455;; let _X86_INS_VCMPORD_SPS = 1456;; let _X86_INS_VCMPEQ_USPS = 1457;; let _X86_INS_VCMPNGE_UQPS = 1458;; let _X86_INS_VCMPNGT_UQPS = 1459;; let _X86_INS_VCMPFALSE_OSPS = 1460;; let _X86_INS_VCMPNEQ_OSPS = 1461;; let _X86_INS_VCMPGE_OQPS = 1462;; let _X86_INS_VCMPGT_OQPS = 1463;; let _X86_INS_VCMPTRUE_USPS = 1464;; let _X86_INS_VCMPPD = 1465;; let _X86_INS_VCMPEQPD = 1466;; let _X86_INS_VCMPLTPD = 1467;; let _X86_INS_VCMPLEPD = 1468;; let _X86_INS_VCMPUNORDPD = 1469;; let _X86_INS_VCMPNEQPD = 1470;; let _X86_INS_VCMPNLTPD = 1471;; let _X86_INS_VCMPNLEPD = 1472;; let _X86_INS_VCMPORDPD = 1473;; let _X86_INS_VCMPEQ_UQPD = 1474;; let _X86_INS_VCMPNGEPD = 1475;; let _X86_INS_VCMPNGTPD = 1476;; let _X86_INS_VCMPFALSEPD = 1477;; let _X86_INS_VCMPNEQ_OQPD = 1478;; let _X86_INS_VCMPGEPD = 1479;; let _X86_INS_VCMPGTPD = 1480;; let _X86_INS_VCMPTRUEPD = 1481;; let _X86_INS_VCMPEQ_OSPD = 1482;; let _X86_INS_VCMPLT_OQPD = 1483;; let _X86_INS_VCMPLE_OQPD = 1484;; let _X86_INS_VCMPUNORD_SPD = 1485;; let _X86_INS_VCMPNEQ_USPD = 1486;; let _X86_INS_VCMPNLT_UQPD = 1487;; let _X86_INS_VCMPNLE_UQPD = 1488;; let _X86_INS_VCMPORD_SPD = 1489;; let _X86_INS_VCMPEQ_USPD = 1490;; let _X86_INS_VCMPNGE_UQPD = 1491;; let _X86_INS_VCMPNGT_UQPD = 1492;; let _X86_INS_VCMPFALSE_OSPD = 1493;; let _X86_INS_VCMPNEQ_OSPD = 1494;; let _X86_INS_VCMPGE_OQPD = 1495;; let _X86_INS_VCMPGT_OQPD = 1496;; let _X86_INS_VCMPTRUE_USPD = 1497;; let _X86_INS_UD0 = 1498;; let _X86_INS_ENDBR32 = 1499;; let _X86_INS_ENDBR64 = 1500;; let _X86_INS_ENDING = 1501;; let _X86_GRP_INVALID = 0;; let _X86_GRP_JUMP = 1;; let _X86_GRP_CALL = 2;; let _X86_GRP_RET = 3;; let _X86_GRP_INT = 4;; let _X86_GRP_IRET = 5;; let _X86_GRP_PRIVILEGE = 6;; let _X86_GRP_BRANCH_RELATIVE = 7;; let _X86_GRP_VM = 128;; let _X86_GRP_3DNOW = 129;; let _X86_GRP_AES = 130;; let _X86_GRP_ADX = 131;; let _X86_GRP_AVX = 132;; let _X86_GRP_AVX2 = 133;; let _X86_GRP_AVX512 = 134;; let _X86_GRP_BMI = 135;; let _X86_GRP_BMI2 = 136;; let _X86_GRP_CMOV = 137;; let _X86_GRP_F16C = 138;; let _X86_GRP_FMA = 139;; let _X86_GRP_FMA4 = 140;; let _X86_GRP_FSGSBASE = 141;; let _X86_GRP_HLE = 142;; let _X86_GRP_MMX = 143;; let _X86_GRP_MODE32 = 144;; let _X86_GRP_MODE64 = 145;; let _X86_GRP_RTM = 146;; let _X86_GRP_SHA = 147;; let _X86_GRP_SSE1 = 148;; let _X86_GRP_SSE2 = 149;; let _X86_GRP_SSE3 = 150;; let _X86_GRP_SSE41 = 151;; let _X86_GRP_SSE42 = 152;; let _X86_GRP_SSE4A = 153;; let _X86_GRP_SSSE3 = 154;; let _X86_GRP_PCLMUL = 155;; let _X86_GRP_XOP = 156;; let _X86_GRP_CDI = 157;; let _X86_GRP_ERI = 158;; let _X86_GRP_TBM = 159;; let _X86_GRP_16BITMODE = 160;; let _X86_GRP_NOT64BITMODE = 161;; let _X86_GRP_SGX = 162;; let _X86_GRP_DQI = 163;; let _X86_GRP_BWI = 164;; let _X86_GRP_PFI = 165;; let _X86_GRP_VLX = 166;; let _X86_GRP_SMAP = 167;; let _X86_GRP_NOVLX = 168;; let _X86_GRP_FPU = 169;; let _X86_GRP_ENDING = 170;; capstone-sys-0.11.0/capstone/bindings/ocaml/xcore.ml010066400017500001750000000006331363402546700206360ustar0000000000000000(* Capstone Disassembly Engine * By Guillaume Jeanne , 2014> *) open Xcore_const type xcore_op_mem = { base: int; index: int; disp: int; direct: int; } type xcore_op_value = | XCORE_OP_INVALID of int | XCORE_OP_REG of int | XCORE_OP_IMM of int | XCORE_OP_MEM of xcore_op_mem type xcore_op = { value: xcore_op_value; } type cs_xcore = { operands: xcore_op array; } capstone-sys-0.11.0/capstone/bindings/ocaml/xcore_const.ml010066400017500001750000000103111363402546700220360ustar0000000000000000(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.ml] *) let _XCORE_OP_INVALID = 0;; let _XCORE_OP_REG = 1;; let _XCORE_OP_IMM = 2;; let _XCORE_OP_MEM = 3;; let _XCORE_REG_INVALID = 0;; let _XCORE_REG_CP = 1;; let _XCORE_REG_DP = 2;; let _XCORE_REG_LR = 3;; let _XCORE_REG_SP = 4;; let _XCORE_REG_R0 = 5;; let _XCORE_REG_R1 = 6;; let _XCORE_REG_R2 = 7;; let _XCORE_REG_R3 = 8;; let _XCORE_REG_R4 = 9;; let _XCORE_REG_R5 = 10;; let _XCORE_REG_R6 = 11;; let _XCORE_REG_R7 = 12;; let _XCORE_REG_R8 = 13;; let _XCORE_REG_R9 = 14;; let _XCORE_REG_R10 = 15;; let _XCORE_REG_R11 = 16;; let _XCORE_REG_PC = 17;; let _XCORE_REG_SCP = 18;; let _XCORE_REG_SSR = 19;; let _XCORE_REG_ET = 20;; let _XCORE_REG_ED = 21;; let _XCORE_REG_SED = 22;; let _XCORE_REG_KEP = 23;; let _XCORE_REG_KSP = 24;; let _XCORE_REG_ID = 25;; let _XCORE_REG_ENDING = 26;; let _XCORE_INS_INVALID = 0;; let _XCORE_INS_ADD = 1;; let _XCORE_INS_ANDNOT = 2;; let _XCORE_INS_AND = 3;; let _XCORE_INS_ASHR = 4;; let _XCORE_INS_BAU = 5;; let _XCORE_INS_BITREV = 6;; let _XCORE_INS_BLA = 7;; let _XCORE_INS_BLAT = 8;; let _XCORE_INS_BL = 9;; let _XCORE_INS_BF = 10;; let _XCORE_INS_BT = 11;; let _XCORE_INS_BU = 12;; let _XCORE_INS_BRU = 13;; let _XCORE_INS_BYTEREV = 14;; let _XCORE_INS_CHKCT = 15;; let _XCORE_INS_CLRE = 16;; let _XCORE_INS_CLRPT = 17;; let _XCORE_INS_CLRSR = 18;; let _XCORE_INS_CLZ = 19;; let _XCORE_INS_CRC8 = 20;; let _XCORE_INS_CRC32 = 21;; let _XCORE_INS_DCALL = 22;; let _XCORE_INS_DENTSP = 23;; let _XCORE_INS_DGETREG = 24;; let _XCORE_INS_DIVS = 25;; let _XCORE_INS_DIVU = 26;; let _XCORE_INS_DRESTSP = 27;; let _XCORE_INS_DRET = 28;; let _XCORE_INS_ECALLF = 29;; let _XCORE_INS_ECALLT = 30;; let _XCORE_INS_EDU = 31;; let _XCORE_INS_EEF = 32;; let _XCORE_INS_EET = 33;; let _XCORE_INS_EEU = 34;; let _XCORE_INS_ENDIN = 35;; let _XCORE_INS_ENTSP = 36;; let _XCORE_INS_EQ = 37;; let _XCORE_INS_EXTDP = 38;; let _XCORE_INS_EXTSP = 39;; let _XCORE_INS_FREER = 40;; let _XCORE_INS_FREET = 41;; let _XCORE_INS_GETD = 42;; let _XCORE_INS_GET = 43;; let _XCORE_INS_GETN = 44;; let _XCORE_INS_GETR = 45;; let _XCORE_INS_GETSR = 46;; let _XCORE_INS_GETST = 47;; let _XCORE_INS_GETTS = 48;; let _XCORE_INS_INCT = 49;; let _XCORE_INS_INIT = 50;; let _XCORE_INS_INPW = 51;; let _XCORE_INS_INSHR = 52;; let _XCORE_INS_INT = 53;; let _XCORE_INS_IN = 54;; let _XCORE_INS_KCALL = 55;; let _XCORE_INS_KENTSP = 56;; let _XCORE_INS_KRESTSP = 57;; let _XCORE_INS_KRET = 58;; let _XCORE_INS_LADD = 59;; let _XCORE_INS_LD16S = 60;; let _XCORE_INS_LD8U = 61;; let _XCORE_INS_LDA16 = 62;; let _XCORE_INS_LDAP = 63;; let _XCORE_INS_LDAW = 64;; let _XCORE_INS_LDC = 65;; let _XCORE_INS_LDW = 66;; let _XCORE_INS_LDIVU = 67;; let _XCORE_INS_LMUL = 68;; let _XCORE_INS_LSS = 69;; let _XCORE_INS_LSUB = 70;; let _XCORE_INS_LSU = 71;; let _XCORE_INS_MACCS = 72;; let _XCORE_INS_MACCU = 73;; let _XCORE_INS_MJOIN = 74;; let _XCORE_INS_MKMSK = 75;; let _XCORE_INS_MSYNC = 76;; let _XCORE_INS_MUL = 77;; let _XCORE_INS_NEG = 78;; let _XCORE_INS_NOT = 79;; let _XCORE_INS_OR = 80;; let _XCORE_INS_OUTCT = 81;; let _XCORE_INS_OUTPW = 82;; let _XCORE_INS_OUTSHR = 83;; let _XCORE_INS_OUTT = 84;; let _XCORE_INS_OUT = 85;; let _XCORE_INS_PEEK = 86;; let _XCORE_INS_REMS = 87;; let _XCORE_INS_REMU = 88;; let _XCORE_INS_RETSP = 89;; let _XCORE_INS_SETCLK = 90;; let _XCORE_INS_SET = 91;; let _XCORE_INS_SETC = 92;; let _XCORE_INS_SETD = 93;; let _XCORE_INS_SETEV = 94;; let _XCORE_INS_SETN = 95;; let _XCORE_INS_SETPSC = 96;; let _XCORE_INS_SETPT = 97;; let _XCORE_INS_SETRDY = 98;; let _XCORE_INS_SETSR = 99;; let _XCORE_INS_SETTW = 100;; let _XCORE_INS_SETV = 101;; let _XCORE_INS_SEXT = 102;; let _XCORE_INS_SHL = 103;; let _XCORE_INS_SHR = 104;; let _XCORE_INS_SSYNC = 105;; let _XCORE_INS_ST16 = 106;; let _XCORE_INS_ST8 = 107;; let _XCORE_INS_STW = 108;; let _XCORE_INS_SUB = 109;; let _XCORE_INS_SYNCR = 110;; let _XCORE_INS_TESTCT = 111;; let _XCORE_INS_TESTLCL = 112;; let _XCORE_INS_TESTWCT = 113;; let _XCORE_INS_TSETMR = 114;; let _XCORE_INS_START = 115;; let _XCORE_INS_WAITEF = 116;; let _XCORE_INS_WAITET = 117;; let _XCORE_INS_WAITEU = 118;; let _XCORE_INS_XOR = 119;; let _XCORE_INS_ZEXT = 120;; let _XCORE_INS_ENDING = 121;; let _XCORE_GRP_INVALID = 0;; let _XCORE_GRP_JUMP = 1;; let _XCORE_GRP_ENDING = 2;; capstone-sys-0.11.0/capstone/capstone.pc.in010066400017500001750000000005451363402546700170430ustar0000000000000000prefix=@CMAKE_INSTALL_PREFIX@ exec_prefix=${prefix} libdir=${prefix}/lib@LIBSUFFIX@ includedir=${prefix}/include/capstone Name: capstone Description: Capstone disassembly engine Version: @VERSION_MAJOR@.@VERSION_MINOR@.@VERSION_PATCH@ URL: http://www.capstone-engine.org archive=${libdir}/libcapstone.a Libs: -L${libdir} -lcapstone Cflags: -I${includedir} capstone-sys-0.11.0/capstone/cmake.sh010077500017500001750000000016711363403403300157030ustar0000000000000000#!/bin/sh # Capstone disassembler engine (www.capstone-engine.org) # Build Capstone libs for specified architecture, or all if none is specified (libcapstone.so & libcapstone.a) on *nix with CMake & make # By Nguyen Anh Quynh, Jorn Vernee, 2019 FLAGS="-DCMAKE_BUILD_TYPE=Release" # Uncomment below line to compile in Diet mode # FLAGS+=" -DCAPSTONE_BUILD_DIET=ON" case $1 in ARM) ARCH=ARM ;; ARM64) ARCH=ARM64 ;; M68K) ARCH=M68K ;; MIPS) ARCH=MIPS ;; PowerPC) ARCH=PPC ;; Sparc) ARCH=SPARC ;; SystemZ) ARCH=SYSZ ;; XCore) ARCH=XCORE ;; x86) ARCH=X86 ;; TMS320C64x) ARCH=TMS320C64X ;; M680x) ARCH=M680X ;; EVM) ARCH=EVM ;; *) ;; esac if [ "x${ARCH}" = "x" ]; then FLAGS+=" -DCAPSTONE_ARCHITECTURE_DEFAULT=ON" else FLAGS+=" -DCAPSTONE_ARCHITECTURE_DEFAULT=OFF -DCAPSTONE_${ARCH}_SUPPORT=ON" fi cmake $FLAGS .. make -j8 capstone-sys-0.11.0/capstone/config.mk010066400017500001750000000064661363402546700161040ustar0000000000000000# This file contains all customized compile options for Capstone. # Consult COMPILE.TXT & docs/README for details. ################################################################################ # Specify which archs you want to compile in. By default, we build all archs. CAPSTONE_ARCHS ?= arm aarch64 m68k mips powerpc sparc systemz x86 xcore tms320c64x m680x evm ################################################################################ # Comment out the line below ('CAPSTONE_USE_SYS_DYN_MEM = yes'), or change it to # 'CAPSTONE_USE_SYS_DYN_MEM = no' if do NOT use malloc/calloc/realloc/free/ # vsnprintf() provided by system for internal dynamic memory management. # # NOTE: in that case, specify your own malloc/calloc/realloc/free/vsnprintf() # functions in your program via API cs_option(), using CS_OPT_MEM option type. CAPSTONE_USE_SYS_DYN_MEM ?= yes ################################################################################ # Change 'CAPSTONE_DIET = no' to 'CAPSTONE_DIET = yes' to make the library # more compact: use less memory & smaller in binary size. # This setup will remove the @mnemonic & @op_str data, plus semantic information # such as @regs_read/write & @group. The amount of binary size reduced is # up to 50% in some individual archs. # # NOTE: we still keep all those related fileds @mnemonic, @op_str, @regs_read, # @regs_write, @groups, etc in fields in cs_insn structure regardless, but they # will not be updated (i.e empty), thus become irrelevant. CAPSTONE_DIET ?= no ################################################################################ # Change 'CAPSTONE_X86_REDUCE = no' to 'CAPSTONE_X86_REDUCE = yes' to remove # non-critical instruction sets of X86, making the binary size smaller by ~60%. # This is desired in special cases, such as OS kernel, where these kind of # instructions are not used. # # The list of instruction sets to be removed includes: # - Floating Point Unit (FPU) # - MultiMedia eXtension (MMX) # - Streaming SIMD Extensions (SSE) # - 3DNow # - Advanced Vector Extensions (AVX) # - Fused Multiply Add Operations (FMA) # - eXtended Operations (XOP) # - Transactional Synchronization Extensions (TSX) # # Due to this removal, the related instructions are nolonger supported. # # By default, Capstone is compiled with 'CAPSTONE_X86_REDUCE = no', # thus supports complete X86 instructions. CAPSTONE_X86_REDUCE ?= no ################################################################################ # Change 'CAPSTONE_X86_ATT_DISABLE = no' to 'CAPSTONE_X86_ATT_DISABLE = yes' to # disable AT&T syntax on x86 to reduce library size. CAPSTONE_X86_ATT_DISABLE ?= no ################################################################################ # Change 'CAPSTONE_STATIC = yes' to 'CAPSTONE_STATIC = no' to avoid building # a static library. CAPSTONE_STATIC ?= yes ################################################################################ # Change 'CAPSTONE_SHARED = yes' to 'CAPSTONE_SHARED = no' to avoid building # a shared library. CAPSTONE_SHARED ?= yes ################################################################################ # Change 'CAPSTONE_HAS_OSXKERNEL = no' to 'CAPSTONE_HAS_OSXKERNEL = yes' to # enable OS X kernel embedding support. If 'CAPSTONE_USE_SYS_DYN_MEM = yes', # then kern_os_* functions are used for memory management. CAPSTONE_HAS_OSXKERNEL ?= no capstone-sys-0.11.0/capstone/cs.c010066400017500001750000001077301363402546700150530ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) #pragma warning(disable:4996) // disable MSVC's warning on strcpy() #pragma warning(disable:28719) // disable MSVC's warning on strcpy() #endif #if defined(CAPSTONE_HAS_OSXKERNEL) #include #include #else #include #include #include #endif #include #include #include "utils.h" #include "MCRegisterInfo.h" #if defined(_KERNEL_MODE) #include "windows\winkernel_mm.h" #endif // Issue #681: Windows kernel does not support formatting float point #if defined(_KERNEL_MODE) && !defined(CAPSTONE_DIET) #if defined(CAPSTONE_HAS_ARM) || defined(CAPSTONE_HAS_ARM64) || defined(CAPSTONE_HAS_M68K) #define CAPSTONE_STR_INTERNAL(x) #x #define CAPSTONE_STR(x) CAPSTONE_STR_INTERNAL(x) #define CAPSTONE_MSVC_WRANING_PREFIX __FILE__ "("CAPSTONE_STR(__LINE__)") : warning message : " #pragma message(CAPSTONE_MSVC_WRANING_PREFIX "Windows driver does not support full features for selected architecture(s). Define CAPSTONE_DIET to compile Capstone with only supported features. See issue #681 for details.") #undef CAPSTONE_MSVC_WRANING_PREFIX #undef CAPSTONE_STR #undef CAPSTONE_STR_INTERNAL #endif #endif // defined(_KERNEL_MODE) && !defined(CAPSTONE_DIET) #if !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(CAPSTONE_DIET) && !defined(_KERNEL_MODE) #define INSN_CACHE_SIZE 32 #else // reduce stack variable size for kernel/firmware #define INSN_CACHE_SIZE 8 #endif // default SKIPDATA mnemonic #ifndef CAPSTONE_DIET #define SKIPDATA_MNEM ".byte" #else // No printing is available in diet mode #define SKIPDATA_MNEM NULL #endif #include "arch/AArch64/AArch64Module.h" #include "arch/ARM/ARMModule.h" #include "arch/EVM/EVMModule.h" #include "arch/M680X/M680XModule.h" #include "arch/M68K/M68KModule.h" #include "arch/Mips/MipsModule.h" #include "arch/PowerPC/PPCModule.h" #include "arch/Sparc/SparcModule.h" #include "arch/SystemZ/SystemZModule.h" #include "arch/TMS320C64x/TMS320C64xModule.h" #include "arch/X86/X86Module.h" #include "arch/XCore/XCoreModule.h" // constructor initialization for all archs static cs_err (*cs_arch_init[MAX_ARCH])(cs_struct *) = { #ifdef CAPSTONE_HAS_ARM ARM_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_ARM64 AArch64_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_MIPS Mips_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_X86 X86_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_POWERPC PPC_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_SPARC Sparc_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_SYSZ SystemZ_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_XCORE XCore_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_M68K M68K_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_TMS320C64X TMS320C64x_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_M680X M680X_global_init, #else NULL, #endif #ifdef CAPSTONE_HAS_EVM EVM_global_init, #else NULL, #endif }; // support cs_option() for all archs static cs_err (*cs_arch_option[MAX_ARCH]) (cs_struct *, cs_opt_type, size_t value) = { #ifdef CAPSTONE_HAS_ARM ARM_option, #else NULL, #endif #ifdef CAPSTONE_HAS_ARM64 AArch64_option, #else NULL, #endif #ifdef CAPSTONE_HAS_MIPS Mips_option, #else NULL, #endif #ifdef CAPSTONE_HAS_X86 X86_option, #else NULL, #endif #ifdef CAPSTONE_HAS_POWERPC PPC_option, #else NULL, #endif #ifdef CAPSTONE_HAS_SPARC Sparc_option, #else NULL, #endif #ifdef CAPSTONE_HAS_SYSZ SystemZ_option, #else NULL, #endif #ifdef CAPSTONE_HAS_XCORE XCore_option, #else NULL, #endif #ifdef CAPSTONE_HAS_M68K M68K_option, #else NULL, #endif #ifdef CAPSTONE_HAS_TMS320C64X TMS320C64x_option, #else NULL, #endif #ifdef CAPSTONE_HAS_M680X M680X_option, #else NULL, #endif #ifdef CAPSTONE_HAS_EVM EVM_option, #else NULL, #endif }; // bitmask for finding disallowed modes for an arch: // to be called in cs_open()/cs_option() static cs_mode cs_arch_disallowed_mode_mask[MAX_ARCH] = { #ifdef CAPSTONE_HAS_ARM ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_V8 | CS_MODE_MCLASS | CS_MODE_THUMB | CS_MODE_BIG_ENDIAN), #else 0, #endif #ifdef CAPSTONE_HAS_ARM64 ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_BIG_ENDIAN), #else 0, #endif #ifdef CAPSTONE_HAS_MIPS ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_MICRO | CS_MODE_MIPS32R6 | CS_MODE_BIG_ENDIAN | CS_MODE_MIPS2 | CS_MODE_MIPS3), #else 0, #endif #ifdef CAPSTONE_HAS_X86 ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_16), #else 0, #endif #ifdef CAPSTONE_HAS_POWERPC ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_BIG_ENDIAN | CS_MODE_QPX), #else 0, #endif #ifdef CAPSTONE_HAS_SPARC ~(CS_MODE_BIG_ENDIAN | CS_MODE_V9), #else 0, #endif #ifdef CAPSTONE_HAS_SYSZ ~(CS_MODE_BIG_ENDIAN), #else 0, #endif #ifdef CAPSTONE_HAS_XCORE ~(CS_MODE_BIG_ENDIAN), #else 0, #endif #ifdef CAPSTONE_HAS_M68K ~(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_000 | CS_MODE_M68K_010 | CS_MODE_M68K_020 | CS_MODE_M68K_030 | CS_MODE_M68K_040 | CS_MODE_M68K_060), #else 0, #endif #ifdef CAPSTONE_HAS_TMS320C64X ~(CS_MODE_BIG_ENDIAN), #else 0, #endif #ifdef CAPSTONE_HAS_M680X ~(CS_MODE_M680X_6301 | CS_MODE_M680X_6309 | CS_MODE_M680X_6800 | CS_MODE_M680X_6801 | CS_MODE_M680X_6805 | CS_MODE_M680X_6808 | CS_MODE_M680X_6809 | CS_MODE_M680X_6811 | CS_MODE_M680X_CPU12 | CS_MODE_M680X_HCS08), #else 0, #endif #ifdef CAPSTONE_HAS_EVM 0, #else 0, #endif }; // bitmask of enabled architectures static uint32_t all_arch = 0 #ifdef CAPSTONE_HAS_ARM | (1 << CS_ARCH_ARM) #endif #ifdef CAPSTONE_HAS_ARM64 | (1 << CS_ARCH_ARM64) #endif #ifdef CAPSTONE_HAS_MIPS | (1 << CS_ARCH_MIPS) #endif #ifdef CAPSTONE_HAS_X86 | (1 << CS_ARCH_X86) #endif #ifdef CAPSTONE_HAS_POWERPC | (1 << CS_ARCH_PPC) #endif #ifdef CAPSTONE_HAS_SPARC | (1 << CS_ARCH_SPARC) #endif #ifdef CAPSTONE_HAS_SYSZ | (1 << CS_ARCH_SYSZ) #endif #ifdef CAPSTONE_HAS_XCORE | (1 << CS_ARCH_XCORE) #endif #ifdef CAPSTONE_HAS_M68K | (1 << CS_ARCH_M68K) #endif #ifdef CAPSTONE_HAS_TMS320C64X | (1 << CS_ARCH_TMS320C64X) #endif #ifdef CAPSTONE_HAS_M680X | (1 << CS_ARCH_M680X) #endif #ifdef CAPSTONE_HAS_EVM | (1 << CS_ARCH_EVM) #endif ; #if defined(CAPSTONE_USE_SYS_DYN_MEM) #if !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(_KERNEL_MODE) // default cs_malloc_t cs_mem_malloc = malloc; cs_calloc_t cs_mem_calloc = calloc; cs_realloc_t cs_mem_realloc = realloc; cs_free_t cs_mem_free = free; #if defined(_WIN32_WCE) cs_vsnprintf_t cs_vsnprintf = _vsnprintf; #else cs_vsnprintf_t cs_vsnprintf = vsnprintf; #endif // defined(_WIN32_WCE) #elif defined(_KERNEL_MODE) // Windows driver cs_malloc_t cs_mem_malloc = cs_winkernel_malloc; cs_calloc_t cs_mem_calloc = cs_winkernel_calloc; cs_realloc_t cs_mem_realloc = cs_winkernel_realloc; cs_free_t cs_mem_free = cs_winkernel_free; cs_vsnprintf_t cs_vsnprintf = cs_winkernel_vsnprintf; #else // OSX kernel extern void* kern_os_malloc(size_t size); extern void kern_os_free(void* addr); extern void* kern_os_realloc(void* addr, size_t nsize); static void* cs_kern_os_calloc(size_t num, size_t size) { return kern_os_malloc(num * size); // malloc bzeroes the buffer } cs_malloc_t cs_mem_malloc = kern_os_malloc; cs_calloc_t cs_mem_calloc = cs_kern_os_calloc; cs_realloc_t cs_mem_realloc = kern_os_realloc; cs_free_t cs_mem_free = kern_os_free; cs_vsnprintf_t cs_vsnprintf = vsnprintf; #endif // !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(_KERNEL_MODE) #else // User-defined cs_malloc_t cs_mem_malloc = NULL; cs_calloc_t cs_mem_calloc = NULL; cs_realloc_t cs_mem_realloc = NULL; cs_free_t cs_mem_free = NULL; cs_vsnprintf_t cs_vsnprintf = NULL; #endif // defined(CAPSTONE_USE_SYS_DYN_MEM) CAPSTONE_EXPORT unsigned int CAPSTONE_API cs_version(int *major, int *minor) { if (major != NULL && minor != NULL) { *major = CS_API_MAJOR; *minor = CS_API_MINOR; } return (CS_API_MAJOR << 8) + CS_API_MINOR; } CAPSTONE_EXPORT bool CAPSTONE_API cs_support(int query) { if (query == CS_ARCH_ALL) return all_arch == ((1 << CS_ARCH_ARM) | (1 << CS_ARCH_ARM64) | (1 << CS_ARCH_MIPS) | (1 << CS_ARCH_X86) | (1 << CS_ARCH_PPC) | (1 << CS_ARCH_SPARC) | (1 << CS_ARCH_SYSZ) | (1 << CS_ARCH_XCORE) | (1 << CS_ARCH_M68K) | (1 << CS_ARCH_TMS320C64X) | (1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM)); if ((unsigned int)query < CS_ARCH_MAX) return all_arch & (1 << query); if (query == CS_SUPPORT_DIET) { #ifdef CAPSTONE_DIET return true; #else return false; #endif } if (query == CS_SUPPORT_X86_REDUCE) { #if defined(CAPSTONE_HAS_X86) && defined(CAPSTONE_X86_REDUCE) return true; #else return false; #endif } // unsupported query return false; } CAPSTONE_EXPORT cs_err CAPSTONE_API cs_errno(csh handle) { struct cs_struct *ud; if (!handle) return CS_ERR_CSH; ud = (struct cs_struct *)(uintptr_t)handle; return ud->errnum; } CAPSTONE_EXPORT const char * CAPSTONE_API cs_strerror(cs_err code) { switch(code) { default: return "Unknown error code"; case CS_ERR_OK: return "OK (CS_ERR_OK)"; case CS_ERR_MEM: return "Out of memory (CS_ERR_MEM)"; case CS_ERR_ARCH: return "Invalid/unsupported architecture(CS_ERR_ARCH)"; case CS_ERR_HANDLE: return "Invalid handle (CS_ERR_HANDLE)"; case CS_ERR_CSH: return "Invalid csh (CS_ERR_CSH)"; case CS_ERR_MODE: return "Invalid mode (CS_ERR_MODE)"; case CS_ERR_OPTION: return "Invalid option (CS_ERR_OPTION)"; case CS_ERR_DETAIL: return "Details are unavailable (CS_ERR_DETAIL)"; case CS_ERR_MEMSETUP: return "Dynamic memory management uninitialized (CS_ERR_MEMSETUP)"; case CS_ERR_VERSION: return "Different API version between core & binding (CS_ERR_VERSION)"; case CS_ERR_DIET: return "Information irrelevant in diet engine (CS_ERR_DIET)"; case CS_ERR_SKIPDATA: return "Information irrelevant for 'data' instruction in SKIPDATA mode (CS_ERR_SKIPDATA)"; case CS_ERR_X86_ATT: return "AT&T syntax is unavailable (CS_ERR_X86_ATT)"; case CS_ERR_X86_INTEL: return "INTEL syntax is unavailable (CS_ERR_X86_INTEL)"; case CS_ERR_X86_MASM: return "MASM syntax is unavailable (CS_ERR_X86_MASM)"; } } CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle) { cs_err err; struct cs_struct *ud; if (!cs_mem_malloc || !cs_mem_calloc || !cs_mem_realloc || !cs_mem_free || !cs_vsnprintf) // Error: before cs_open(), dynamic memory management must be initialized // with cs_option(CS_OPT_MEM) return CS_ERR_MEMSETUP; if (arch < CS_ARCH_MAX && cs_arch_init[arch]) { // verify if requested mode is valid if (mode & cs_arch_disallowed_mode_mask[arch]) { *handle = 0; return CS_ERR_MODE; } ud = cs_mem_calloc(1, sizeof(*ud)); if (!ud) { // memory insufficient return CS_ERR_MEM; } ud->errnum = CS_ERR_OK; ud->arch = arch; ud->mode = mode; // by default, do not break instruction into details ud->detail = CS_OPT_OFF; // default skipdata setup ud->skipdata_setup.mnemonic = SKIPDATA_MNEM; err = cs_arch_init[ud->arch](ud); if (err) { cs_mem_free(ud); *handle = 0; return err; } *handle = (uintptr_t)ud; return CS_ERR_OK; } else { *handle = 0; return CS_ERR_ARCH; } } CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle) { struct cs_struct *ud; struct insn_mnem *next, *tmp; if (*handle == 0) // invalid handle return CS_ERR_CSH; ud = (struct cs_struct *)(*handle); if (ud->printer_info) cs_mem_free(ud->printer_info); // free the linked list of customized mnemonic tmp = ud->mnem_list; while(tmp) { next = tmp->next; cs_mem_free(tmp); tmp = next; } cs_mem_free(ud->insn_cache); memset(ud, 0, sizeof(*ud)); cs_mem_free(ud); // invalidate this handle by ZERO out its value. // this is to make sure it is unusable after cs_close() *handle = 0; return CS_ERR_OK; } // fill insn with mnemonic & operands info static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci, PostPrinter_t postprinter, const uint8_t *code) { #ifndef CAPSTONE_DIET char *sp, *mnem; #endif uint16_t copy_size = MIN(sizeof(insn->bytes), insn->size); // fill the instruction bytes. // we might skip some redundant bytes in front in the case of X86 memcpy(insn->bytes, code + insn->size - copy_size, copy_size); insn->size = copy_size; // alias instruction might have ID saved in OpcodePub if (MCInst_getOpcodePub(mci)) insn->id = MCInst_getOpcodePub(mci); // post printer handles some corner cases (hacky) if (postprinter) postprinter((csh)handle, insn, buffer, mci); #ifndef CAPSTONE_DIET // fill in mnemonic & operands // find first space or tab mnem = insn->mnemonic; for (sp = buffer; *sp; sp++) { if (*sp == ' '|| *sp == '\t') break; if (*sp == '|') // lock|rep prefix for x86 *sp = ' '; // copy to @mnemonic *mnem = *sp; mnem++; } *mnem = '\0'; // we might have customized mnemonic if (handle->mnem_list) { struct insn_mnem *tmp = handle->mnem_list; while(tmp) { if (tmp->insn.id == insn->id) { // found this instruction, so copy its mnemonic (void)strncpy(insn->mnemonic, tmp->insn.mnemonic, sizeof(insn->mnemonic) - 1); insn->mnemonic[sizeof(insn->mnemonic) - 1] = '\0'; break; } tmp = tmp->next; } } // copy @op_str if (*sp) { // find the next non-space char sp++; for (; ((*sp == ' ') || (*sp == '\t')); sp++); strncpy(insn->op_str, sp, sizeof(insn->op_str) - 1); insn->op_str[sizeof(insn->op_str) - 1] = '\0'; } else insn->op_str[0] = '\0'; #endif } // how many bytes will we skip when encountering data (CS_OPT_SKIPDATA)? // this very much depends on instruction alignment requirement of each arch. static uint8_t skipdata_size(cs_struct *handle) { switch(handle->arch) { default: // should never reach return (uint8_t)-1; case CS_ARCH_ARM: // skip 2 bytes on Thumb mode. if (handle->mode & CS_MODE_THUMB) return 2; // otherwise, skip 4 bytes return 4; case CS_ARCH_ARM64: case CS_ARCH_MIPS: case CS_ARCH_PPC: case CS_ARCH_SPARC: // skip 4 bytes return 4; case CS_ARCH_SYSZ: // SystemZ instruction's length can be 2, 4 or 6 bytes, // so we just skip 2 bytes return 2; case CS_ARCH_X86: // X86 has no restriction on instruction alignment return 1; case CS_ARCH_XCORE: // XCore instruction's length can be 2 or 4 bytes, // so we just skip 2 bytes return 2; case CS_ARCH_M68K: // M68K has 2 bytes instruction alignment but contain multibyte instruction so we skip 2 bytes return 2; case CS_ARCH_TMS320C64X: // TMS320C64x alignment is 4. return 4; case CS_ARCH_M680X: // M680X alignment is 1. return 1; case CS_ARCH_EVM: // EVM alignment is 1. return 1; } } CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value) { struct cs_struct *handle; cs_opt_mnem *opt; // cs_option() can be called with NULL handle just for CS_OPT_MEM // This is supposed to be executed before all other APIs (even cs_open()) if (type == CS_OPT_MEM) { cs_opt_mem *mem = (cs_opt_mem *)value; cs_mem_malloc = mem->malloc; cs_mem_calloc = mem->calloc; cs_mem_realloc = mem->realloc; cs_mem_free = mem->free; cs_vsnprintf = mem->vsnprintf; return CS_ERR_OK; } handle = (struct cs_struct *)(uintptr_t)ud; if (!handle) return CS_ERR_CSH; switch(type) { default: break; case CS_OPT_UNSIGNED: handle->imm_unsigned = (cs_opt_value)value; return CS_ERR_OK; case CS_OPT_DETAIL: handle->detail = (cs_opt_value)value; return CS_ERR_OK; case CS_OPT_SKIPDATA: handle->skipdata = (value == CS_OPT_ON); if (handle->skipdata) { if (handle->skipdata_size == 0) { // set the default skipdata size handle->skipdata_size = skipdata_size(handle); } } return CS_ERR_OK; case CS_OPT_SKIPDATA_SETUP: if (value) handle->skipdata_setup = *((cs_opt_skipdata *)value); return CS_ERR_OK; case CS_OPT_MNEMONIC: opt = (cs_opt_mnem *)value; if (opt->id) { if (opt->mnemonic) { struct insn_mnem *tmp; // add new instruction, or replace existing instruction // 1. find if we already had this insn in the linked list tmp = handle->mnem_list; while(tmp) { if (tmp->insn.id == opt->id) { // found this instruction, so replace its mnemonic (void)strncpy(tmp->insn.mnemonic, opt->mnemonic, sizeof(tmp->insn.mnemonic) - 1); tmp->insn.mnemonic[sizeof(tmp->insn.mnemonic) - 1] = '\0'; break; } tmp = tmp->next; } // 2. add this instruction if we have not had it yet if (!tmp) { tmp = cs_mem_malloc(sizeof(*tmp)); tmp->insn.id = opt->id; (void)strncpy(tmp->insn.mnemonic, opt->mnemonic, sizeof(tmp->insn.mnemonic) - 1); tmp->insn.mnemonic[sizeof(tmp->insn.mnemonic) - 1] = '\0'; // this new instruction is heading the list tmp->next = handle->mnem_list; handle->mnem_list = tmp; } return CS_ERR_OK; } else { struct insn_mnem *prev, *tmp; // we want to delete an existing instruction // iterate the list to find the instruction to remove it tmp = handle->mnem_list; prev = tmp; while(tmp) { if (tmp->insn.id == opt->id) { // delete this instruction if (tmp == prev) { // head of the list handle->mnem_list = tmp->next; } else { prev->next = tmp->next; } cs_mem_free(tmp); break; } prev = tmp; tmp = tmp->next; } } } return CS_ERR_OK; case CS_OPT_MODE: // verify if requested mode is valid if (value & cs_arch_disallowed_mode_mask[handle->arch]) { return CS_ERR_OPTION; } break; } return cs_arch_option[handle->arch](handle, type, value); } // generate @op_str for data instruction of SKIPDATA #ifndef CAPSTONE_DIET static void skipdata_opstr(char *opstr, const uint8_t *buffer, size_t size) { char *p = opstr; int len; size_t i; size_t available = sizeof(((cs_insn*)NULL)->op_str); if (!size) { opstr[0] = '\0'; return; } len = cs_snprintf(p, available, "0x%02x", buffer[0]); p+= len; available -= len; for(i = 1; i < size; i++) { len = cs_snprintf(p, available, ", 0x%02x", buffer[i]); if (len < 0) { break; } if ((size_t)len > available - 1) { break; } p+= len; available -= len; } } #endif // dynamicly allocate memory to contain disasm insn // NOTE: caller must free() the allocated memory itself to avoid memory leaking CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn) { struct cs_struct *handle; MCInst mci; uint16_t insn_size; size_t c = 0, i; unsigned int f = 0; // index of the next instruction in the cache cs_insn *insn_cache; // cache contains disassembled instructions void *total = NULL; size_t total_size = 0; // total size of output buffer containing all insns bool r; void *tmp; size_t skipdata_bytes; uint64_t offset_org; // save all the original info of the buffer size_t size_org; const uint8_t *buffer_org; unsigned int cache_size = INSN_CACHE_SIZE; size_t next_offset; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle) { // FIXME: how to handle this case: // handle->errnum = CS_ERR_HANDLE; return 0; } handle->errnum = CS_ERR_OK; // reset IT block of ARM structure if (handle->arch == CS_ARCH_ARM) handle->ITBlock.size = 0; #ifdef CAPSTONE_USE_SYS_DYN_MEM if (count > 0 && count <= INSN_CACHE_SIZE) cache_size = (unsigned int) count; #endif // save the original offset for SKIPDATA buffer_org = buffer; offset_org = offset; size_org = size; total_size = sizeof(cs_insn) * cache_size; total = cs_mem_malloc(total_size); if (total == NULL) { // insufficient memory handle->errnum = CS_ERR_MEM; return 0; } insn_cache = total; while (size > 0) { MCInst_Init(&mci); mci.csh = handle; // relative branches need to know the address & size of current insn mci.address = offset; if (handle->detail) { // allocate memory for @detail pointer insn_cache->detail = cs_mem_malloc(sizeof(cs_detail)); } else { insn_cache->detail = NULL; } // save all the information for non-detailed mode mci.flat_insn = insn_cache; mci.flat_insn->address = offset; #ifdef CAPSTONE_DIET // zero out mnemonic & op_str mci.flat_insn->mnemonic[0] = '\0'; mci.flat_insn->op_str[0] = '\0'; #endif r = handle->disasm(ud, buffer, size, &mci, &insn_size, offset, handle->getinsn_info); if (r) { SStream ss; SStream_Init(&ss); mci.flat_insn->size = insn_size; // map internal instruction opcode to public insn ID handle->insn_id(handle, insn_cache, mci.Opcode); handle->printer(&mci, &ss, handle->printer_info); fill_insn(handle, insn_cache, ss.buffer, &mci, handle->post_printer, buffer); // adjust for pseudo opcode (X86) if (handle->arch == CS_ARCH_X86) insn_cache->id += mci.popcode_adjust; next_offset = insn_size; } else { // encounter a broken instruction // free memory of @detail pointer if (handle->detail) { cs_mem_free(insn_cache->detail); } // if there is no request to skip data, or remaining data is too small, // then bail out if (!handle->skipdata || handle->skipdata_size > size) break; if (handle->skipdata_setup.callback) { skipdata_bytes = handle->skipdata_setup.callback(buffer_org, size_org, (size_t)(offset - offset_org), handle->skipdata_setup.user_data); if (skipdata_bytes > size) // remaining data is not enough break; if (!skipdata_bytes) // user requested not to skip data, so bail out break; } else skipdata_bytes = handle->skipdata_size; // we have to skip some amount of data, depending on arch & mode insn_cache->id = 0; // invalid ID for this "data" instruction insn_cache->address = offset; insn_cache->size = (uint16_t)skipdata_bytes; memcpy(insn_cache->bytes, buffer, skipdata_bytes); #ifdef CAPSTONE_DIET insn_cache->mnemonic[0] = '\0'; insn_cache->op_str[0] = '\0'; #else strncpy(insn_cache->mnemonic, handle->skipdata_setup.mnemonic, sizeof(insn_cache->mnemonic) - 1); skipdata_opstr(insn_cache->op_str, buffer, skipdata_bytes); #endif insn_cache->detail = NULL; next_offset = skipdata_bytes; } // one more instruction entering the cache f++; // one more instruction disassembled c++; if (count > 0 && c == count) // already got requested number of instructions break; if (f == cache_size) { // full cache, so expand the cache to contain incoming insns cache_size = cache_size * 8 / 5; // * 1.6 ~ golden ratio total_size += (sizeof(cs_insn) * cache_size); tmp = cs_mem_realloc(total, total_size); if (tmp == NULL) { // insufficient memory if (handle->detail) { insn_cache = (cs_insn *)total; for (i = 0; i < c; i++, insn_cache++) cs_mem_free(insn_cache->detail); } cs_mem_free(total); *insn = NULL; handle->errnum = CS_ERR_MEM; return 0; } total = tmp; // continue to fill in the cache after the last instruction insn_cache = (cs_insn *)((char *)total + sizeof(cs_insn) * c); // reset f back to 0, so we fill in the cache from begining f = 0; } else insn_cache++; buffer += next_offset; size -= next_offset; offset += next_offset; } if (!c) { // we did not disassemble any instruction cs_mem_free(total); total = NULL; } else if (f != cache_size) { // total did not fully use the last cache, so downsize it tmp = cs_mem_realloc(total, total_size - (cache_size - f) * sizeof(*insn_cache)); if (tmp == NULL) { // insufficient memory // free all detail pointers if (handle->detail) { insn_cache = (cs_insn *)total; for (i = 0; i < c; i++, insn_cache++) cs_mem_free(insn_cache->detail); } cs_mem_free(total); *insn = NULL; handle->errnum = CS_ERR_MEM; return 0; } total = tmp; } *insn = total; return c; } CAPSTONE_EXPORT CAPSTONE_DEPRECATED size_t CAPSTONE_API cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn) { return cs_disasm(ud, buffer, size, offset, count, insn); } CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count) { size_t i; // free all detail pointers for (i = 0; i < count; i++) cs_mem_free(insn[i].detail); // then free pointer to cs_insn array cs_mem_free(insn); } CAPSTONE_EXPORT cs_insn * CAPSTONE_API cs_malloc(csh ud) { cs_insn *insn; struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud; insn = cs_mem_malloc(sizeof(cs_insn)); if (!insn) { // insufficient memory handle->errnum = CS_ERR_MEM; return NULL; } else { if (handle->detail) { // allocate memory for @detail pointer insn->detail = cs_mem_malloc(sizeof(cs_detail)); if (insn->detail == NULL) { // insufficient memory cs_mem_free(insn); handle->errnum = CS_ERR_MEM; return NULL; } } else insn->detail = NULL; } return insn; } // iterator for instruction "single-stepping" CAPSTONE_EXPORT bool CAPSTONE_API cs_disasm_iter(csh ud, const uint8_t **code, size_t *size, uint64_t *address, cs_insn *insn) { struct cs_struct *handle; uint16_t insn_size; MCInst mci; bool r; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle) { return false; } handle->errnum = CS_ERR_OK; MCInst_Init(&mci); mci.csh = handle; // relative branches need to know the address & size of current insn mci.address = *address; // save all the information for non-detailed mode mci.flat_insn = insn; mci.flat_insn->address = *address; #ifdef CAPSTONE_DIET // zero out mnemonic & op_str mci.flat_insn->mnemonic[0] = '\0'; mci.flat_insn->op_str[0] = '\0'; #endif r = handle->disasm(ud, *code, *size, &mci, &insn_size, *address, handle->getinsn_info); if (r) { SStream ss; SStream_Init(&ss); mci.flat_insn->size = insn_size; // map internal instruction opcode to public insn ID handle->insn_id(handle, insn, mci.Opcode); handle->printer(&mci, &ss, handle->printer_info); fill_insn(handle, insn, ss.buffer, &mci, handle->post_printer, *code); // adjust for pseudo opcode (X86) if (handle->arch == CS_ARCH_X86) insn->id += mci.popcode_adjust; *code += insn_size; *size -= insn_size; *address += insn_size; } else { // encounter a broken instruction size_t skipdata_bytes; // if there is no request to skip data, or remaining data is too small, // then bail out if (!handle->skipdata || handle->skipdata_size > *size) return false; if (handle->skipdata_setup.callback) { skipdata_bytes = handle->skipdata_setup.callback(*code, *size, 0, handle->skipdata_setup.user_data); if (skipdata_bytes > *size) // remaining data is not enough return false; if (!skipdata_bytes) // user requested not to skip data, so bail out return false; } else skipdata_bytes = handle->skipdata_size; // we have to skip some amount of data, depending on arch & mode insn->id = 0; // invalid ID for this "data" instruction insn->address = *address; insn->size = (uint16_t)skipdata_bytes; #ifdef CAPSTONE_DIET insn->mnemonic[0] = '\0'; insn->op_str[0] = '\0'; #else memcpy(insn->bytes, *code, skipdata_bytes); strncpy(insn->mnemonic, handle->skipdata_setup.mnemonic, sizeof(insn->mnemonic) - 1); skipdata_opstr(insn->op_str, *code, skipdata_bytes); #endif *code += skipdata_bytes; *size -= skipdata_bytes; *address += skipdata_bytes; } return true; } // return friendly name of regiser in a string CAPSTONE_EXPORT const char * CAPSTONE_API cs_reg_name(csh ud, unsigned int reg) { struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud; if (!handle || handle->reg_name == NULL) { return NULL; } return handle->reg_name(ud, reg); } CAPSTONE_EXPORT const char * CAPSTONE_API cs_insn_name(csh ud, unsigned int insn) { struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud; if (!handle || handle->insn_name == NULL) { return NULL; } return handle->insn_name(ud, insn); } CAPSTONE_EXPORT const char * CAPSTONE_API cs_group_name(csh ud, unsigned int group) { struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud; if (!handle || handle->group_name == NULL) { return NULL; } return handle->group_name(ud, group); } CAPSTONE_EXPORT bool CAPSTONE_API cs_insn_group(csh ud, const cs_insn *insn, unsigned int group_id) { struct cs_struct *handle; if (!ud) return false; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle->detail) { handle->errnum = CS_ERR_DETAIL; return false; } if (!insn->id) { handle->errnum = CS_ERR_SKIPDATA; return false; } if (!insn->detail) { handle->errnum = CS_ERR_DETAIL; return false; } return arr_exist8(insn->detail->groups, insn->detail->groups_count, group_id); } CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_read(csh ud, const cs_insn *insn, unsigned int reg_id) { struct cs_struct *handle; if (!ud) return false; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle->detail) { handle->errnum = CS_ERR_DETAIL; return false; } if (!insn->id) { handle->errnum = CS_ERR_SKIPDATA; return false; } if (!insn->detail) { handle->errnum = CS_ERR_DETAIL; return false; } return arr_exist(insn->detail->regs_read, insn->detail->regs_read_count, reg_id); } CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_write(csh ud, const cs_insn *insn, unsigned int reg_id) { struct cs_struct *handle; if (!ud) return false; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle->detail) { handle->errnum = CS_ERR_DETAIL; return false; } if (!insn->id) { handle->errnum = CS_ERR_SKIPDATA; return false; } if (!insn->detail) { handle->errnum = CS_ERR_DETAIL; return false; } return arr_exist(insn->detail->regs_write, insn->detail->regs_write_count, reg_id); } CAPSTONE_EXPORT int CAPSTONE_API cs_op_count(csh ud, const cs_insn *insn, unsigned int op_type) { struct cs_struct *handle; unsigned int count = 0, i; if (!ud) return -1; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle->detail) { handle->errnum = CS_ERR_DETAIL; return -1; } if (!insn->id) { handle->errnum = CS_ERR_SKIPDATA; return -1; } if (!insn->detail) { handle->errnum = CS_ERR_DETAIL; return -1; } handle->errnum = CS_ERR_OK; switch (handle->arch) { default: handle->errnum = CS_ERR_HANDLE; return -1; case CS_ARCH_ARM: for (i = 0; i < insn->detail->arm.op_count; i++) if (insn->detail->arm.operands[i].type == (arm_op_type)op_type) count++; break; case CS_ARCH_ARM64: for (i = 0; i < insn->detail->arm64.op_count; i++) if (insn->detail->arm64.operands[i].type == (arm64_op_type)op_type) count++; break; case CS_ARCH_X86: for (i = 0; i < insn->detail->x86.op_count; i++) if (insn->detail->x86.operands[i].type == (x86_op_type)op_type) count++; break; case CS_ARCH_MIPS: for (i = 0; i < insn->detail->mips.op_count; i++) if (insn->detail->mips.operands[i].type == (mips_op_type)op_type) count++; break; case CS_ARCH_PPC: for (i = 0; i < insn->detail->ppc.op_count; i++) if (insn->detail->ppc.operands[i].type == (ppc_op_type)op_type) count++; break; case CS_ARCH_SPARC: for (i = 0; i < insn->detail->sparc.op_count; i++) if (insn->detail->sparc.operands[i].type == (sparc_op_type)op_type) count++; break; case CS_ARCH_SYSZ: for (i = 0; i < insn->detail->sysz.op_count; i++) if (insn->detail->sysz.operands[i].type == (sysz_op_type)op_type) count++; break; case CS_ARCH_XCORE: for (i = 0; i < insn->detail->xcore.op_count; i++) if (insn->detail->xcore.operands[i].type == (xcore_op_type)op_type) count++; break; case CS_ARCH_M68K: for (i = 0; i < insn->detail->m68k.op_count; i++) if (insn->detail->m68k.operands[i].type == (m68k_op_type)op_type) count++; break; case CS_ARCH_TMS320C64X: for (i = 0; i < insn->detail->tms320c64x.op_count; i++) if (insn->detail->tms320c64x.operands[i].type == (tms320c64x_op_type)op_type) count++; break; case CS_ARCH_M680X: for (i = 0; i < insn->detail->m680x.op_count; i++) if (insn->detail->m680x.operands[i].type == (m680x_op_type)op_type) count++; break; case CS_ARCH_EVM: #if 0 for (i = 0; i < insn->detail->evm.op_count; i++) if (insn->detail->evm.operands[i].type == (evm_op_type)op_type) count++; #endif break; } return count; } CAPSTONE_EXPORT int CAPSTONE_API cs_op_index(csh ud, const cs_insn *insn, unsigned int op_type, unsigned int post) { struct cs_struct *handle; unsigned int count = 0, i; if (!ud) return -1; handle = (struct cs_struct *)(uintptr_t)ud; if (!handle->detail) { handle->errnum = CS_ERR_DETAIL; return -1; } if (!insn->id) { handle->errnum = CS_ERR_SKIPDATA; return -1; } if (!insn->detail) { handle->errnum = CS_ERR_DETAIL; return -1; } handle->errnum = CS_ERR_OK; switch (handle->arch) { default: handle->errnum = CS_ERR_HANDLE; return -1; case CS_ARCH_ARM: for (i = 0; i < insn->detail->arm.op_count; i++) { if (insn->detail->arm.operands[i].type == (arm_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_ARM64: for (i = 0; i < insn->detail->arm64.op_count; i++) { if (insn->detail->arm64.operands[i].type == (arm64_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_X86: for (i = 0; i < insn->detail->x86.op_count; i++) { if (insn->detail->x86.operands[i].type == (x86_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_MIPS: for (i = 0; i < insn->detail->mips.op_count; i++) { if (insn->detail->mips.operands[i].type == (mips_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_PPC: for (i = 0; i < insn->detail->ppc.op_count; i++) { if (insn->detail->ppc.operands[i].type == (ppc_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_SPARC: for (i = 0; i < insn->detail->sparc.op_count; i++) { if (insn->detail->sparc.operands[i].type == (sparc_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_SYSZ: for (i = 0; i < insn->detail->sysz.op_count; i++) { if (insn->detail->sysz.operands[i].type == (sysz_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_XCORE: for (i = 0; i < insn->detail->xcore.op_count; i++) { if (insn->detail->xcore.operands[i].type == (xcore_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_M68K: for (i = 0; i < insn->detail->m68k.op_count; i++) { if (insn->detail->m68k.operands[i].type == (m68k_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_TMS320C64X: for (i = 0; i < insn->detail->tms320c64x.op_count; i++) { if (insn->detail->tms320c64x.operands[i].type == (tms320c64x_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_M680X: for (i = 0; i < insn->detail->m680x.op_count; i++) { if (insn->detail->m680x.operands[i].type == (m680x_op_type)op_type) count++; if (count == post) return i; } break; case CS_ARCH_EVM: #if 0 for (i = 0; i < insn->detail->evm.op_count; i++) { if (insn->detail->evm.operands[i].type == (evm_op_type)op_type) count++; if (count == post) return i; } #endif break; } return -1; } CAPSTONE_EXPORT cs_err CAPSTONE_API cs_regs_access(csh ud, const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count) { struct cs_struct *handle; if (!ud) return -1; handle = (struct cs_struct *)(uintptr_t)ud; #ifdef CAPSTONE_DIET // This API does not work in DIET mode handle->errnum = CS_ERR_DIET; return CS_ERR_DIET; #else if (!handle->detail) { handle->errnum = CS_ERR_DETAIL; return CS_ERR_DETAIL; } if (!insn->id) { handle->errnum = CS_ERR_SKIPDATA; return CS_ERR_SKIPDATA; } if (!insn->detail) { handle->errnum = CS_ERR_DETAIL; return CS_ERR_DETAIL; } if (handle->reg_access) { handle->reg_access(insn, regs_read, regs_read_count, regs_write, regs_write_count); } else { // this arch is unsupported yet handle->errnum = CS_ERR_ARCH; return CS_ERR_ARCH; } return CS_ERR_OK; #endif } capstone-sys-0.11.0/capstone/cs_priv.h010066400017500001750000000060271363403403300161020ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_PRIV_H #define CS_PRIV_H #ifdef CAPSTONE_DEBUG #include #endif #include #include "MCInst.h" #include "SStream.h" typedef void (*Printer_t)(MCInst *MI, SStream *OS, void *info); // function to be called after Printer_t // this is the best time to gather insn's characteristics typedef void (*PostPrinter_t)(csh handle, cs_insn *, char *mnem, MCInst *mci); typedef bool (*Disasm_t)(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); typedef const char *(*GetName_t)(csh handle, unsigned int id); typedef void (*GetID_t)(cs_struct *h, cs_insn *insn, unsigned int id); // return register name, given register ID typedef const char *(*GetRegisterName_t)(unsigned RegNo); // return registers accessed by instruction typedef void (*GetRegisterAccess_t)(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count); // for ARM only typedef struct ARM_ITStatus { unsigned char ITStates[8]; unsigned int size; } ARM_ITStatus; // Customize mnemonic for instructions with alternative name. struct customized_mnem { // ID of instruction to be customized. unsigned int id; // Customized instruction mnemonic. char mnemonic[CS_MNEMONIC_SIZE]; }; struct insn_mnem { struct customized_mnem insn; struct insn_mnem *next; // linked list of customized mnemonics }; struct cs_struct { cs_arch arch; cs_mode mode; Printer_t printer; // asm printer void *printer_info; // aux info for printer Disasm_t disasm; // disassembler void *getinsn_info; // auxiliary info for printer GetName_t reg_name; GetName_t insn_name; GetName_t group_name; GetID_t insn_id; PostPrinter_t post_printer; cs_err errnum; ARM_ITStatus ITBlock; // for Arm only cs_opt_value detail, imm_unsigned; int syntax; // asm syntax for simple printer such as ARM, Mips & PPC bool doing_mem; // handling memory operand in InstPrinter code unsigned short *insn_cache; // index caching for mapping.c GetRegisterName_t get_regname; bool skipdata; // set this to True if we skip data when disassembling uint8_t skipdata_size; // how many bytes to skip cs_opt_skipdata skipdata_setup; // user-defined skipdata setup const uint8_t *regsize_map; // map to register size (x86-only for now) GetRegisterAccess_t reg_access; struct insn_mnem *mnem_list; // linked list of customized instruction mnemonic }; #define MAX_ARCH CS_ARCH_MAX // Returns a bool (0 or 1) whether big endian is enabled for a mode #define MODE_IS_BIG_ENDIAN(mode) (((mode) & CS_MODE_BIG_ENDIAN) != 0) extern cs_malloc_t cs_mem_malloc; extern cs_calloc_t cs_mem_calloc; extern cs_realloc_t cs_mem_realloc; extern cs_free_t cs_mem_free; extern cs_vsnprintf_t cs_vsnprintf; // By defining CAPSTONE_DEBUG assertions can be used. // For any release build CAPSTONE_DEBUG has to be undefined. #ifdef CAPSTONE_DEBUG #define CS_ASSERT(expr) assert(expr) #else #define CS_ASSERT(expr) #endif #endif capstone-sys-0.11.0/capstone/cstool/Makefile010066400017500001750000000015631363402546700172420ustar0000000000000000# Makefile for Cstool of Capstone Disassembly Engine include ../functions.mk .PHONY: clean all LIBNAME = capstone CFLAGS += -I../include -I. LDFLAGS += -O3 -Wall -L.. -l$(LIBNAME) TARGET = cstool SOURCES := $(wildcard *.c) OBJECTS := $(SOURCES:.c=.o) LIBCAPSTONE = libcapstone.a IS_CYGWIN := $(shell $(CC) -dumpmachine 2>/dev/null | grep -i cygwin | wc -l) ifeq ($(IS_CYGWIN),1) LIBCAPSTONE = capstone.lib else IS_MINGW := $(shell $(CC) --version 2>/dev/null | grep -i "\(mingw\|MSYS\)" | wc -l) ifeq ($(IS_MINGW),1) LIBCAPSTONE = capstone.lib endif endif all: $(TARGET) $(TARGET): ../$(LIBCAPSTONE) $(OBJECTS) ifeq ($(V),0) $(call log,LINK,$@) @${CC} $(OBJECTS) $(LDFLAGS) -o $@ else ${CC} $(OBJECTS) $(LDFLAGS) -o $@ endif clean: ${RM} -rf *.o $(TARGET) %.o: %.c ifeq ($(V),0) $(call log,CC,$@) @${CC} $(CFLAGS) -c $< -o $@ else ${CC} $(CFLAGS) -c $< -o $@ endif capstone-sys-0.11.0/capstone/cstool/README010066400017500001750000000024331363402546700164570ustar0000000000000000This directory contains cstool of Capstone Engine. Cstool is a command-line tool to disassemble assembly hex-string. For example, to decode a hexcode string for Intel 32bit, run: $ cstool x32 "90 91" 0 90 nop 1 91 xchg eax, ecx Cstool disassembles the input and prints out the assembly instructions. On each line, the first column is the instruction offset, the second column is opcodes, and the rest is the instruction itself. Cstool is flexible enough to accept all kind of hexcode format. The following inputs have the same output with the example above. $ cstool x32 "0x90 0x91" $ cstool x32 "\x90\x91" $ cstool x32 "90,91" $ cstool x32 "90;91" $ cstool x32 "90+91" $ cstool x32 "90:91" To print out instruction details, run Cstool with -d option, like below. $ cstool -d x32 "01 d8" 0 01d8 add eax, ebx Prefix:0x00 0x00 0x00 0x00 Opcode:0x01 0x00 0x00 0x00 rex: 0x0 addr_size: 4 modrm: 0xd8 disp: 0x0 sib: 0x0 op_count: 2 operands[0].type: REG = eax operands[0].size: 4 operands[0].access: READ | WRITE operands[1].type: REG = ebx operands[1].size: 4 operands[1].access: READ Registers read: eax ebx Registers modified: eflags eax EFLAGS: MOD_AF MOD_CF MOD_SF MOD_ZF MOD_PF MOD_OF To see all the supported options, run ./cstool capstone-sys-0.11.0/capstone/cstool/cstool.c010066400017500001750000000332311363403403300172330ustar0000000000000000/* Tang Yuhang 2016 */ /* pancake 2017 */ #include #include #include #include "getopt.h" #include static struct { const char *name; cs_arch arch; cs_mode mode; } all_archs[] = { { "arm", CS_ARCH_ARM, CS_MODE_ARM }, { "armb", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_BIG_ENDIAN }, { "armbe", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_BIG_ENDIAN }, { "arml", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_LITTLE_ENDIAN }, { "armle", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_LITTLE_ENDIAN }, { "armv8", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_V8 }, { "thumbv8", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB | CS_MODE_V8 }, { "cortexm", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB | CS_MODE_MCLASS }, { "thumb", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB }, { "thumbbe", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB | CS_MODE_BIG_ENDIAN }, { "thumble", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB | CS_MODE_LITTLE_ENDIAN }, { "arm64", CS_ARCH_ARM64, CS_MODE_LITTLE_ENDIAN }, { "arm64be", CS_ARCH_ARM64, CS_MODE_BIG_ENDIAN }, { "mips", CS_ARCH_MIPS, CS_MODE_MIPS32 | CS_MODE_LITTLE_ENDIAN }, { "mipsmicro", CS_ARCH_MIPS, CS_MODE_MIPS32 | CS_MODE_MICRO }, { "mipsbemicro", CS_ARCH_MIPS, CS_MODE_MIPS32 | CS_MODE_MICRO | CS_MODE_BIG_ENDIAN }, { "mipsbe32r6", CS_ARCH_MIPS, CS_MODE_MIPS32R6 | CS_MODE_BIG_ENDIAN}, { "mipsbe32r6micro", CS_ARCH_MIPS, CS_MODE_MIPS32R6 | CS_MODE_BIG_ENDIAN | CS_MODE_MICRO }, { "mips32r6", CS_ARCH_MIPS, CS_MODE_MIPS32R6 }, { "mips32r6micro", CS_ARCH_MIPS, CS_MODE_MIPS32R6 | CS_MODE_MICRO }, { "mipsbe", CS_ARCH_MIPS, CS_MODE_MIPS32 | CS_MODE_BIG_ENDIAN }, { "mips64", CS_ARCH_MIPS, CS_MODE_MIPS64 | CS_MODE_LITTLE_ENDIAN }, { "mips64be", CS_ARCH_MIPS, CS_MODE_MIPS64 | CS_MODE_BIG_ENDIAN }, { "x16", CS_ARCH_X86, CS_MODE_16 }, // CS_MODE_16 { "x16att", CS_ARCH_X86, CS_MODE_16 }, // CS_MODE_16 , CS_OPT_SYNTAX_ATT { "x32", CS_ARCH_X86, CS_MODE_32 }, // CS_MODE_32 { "x32att", CS_ARCH_X86, CS_MODE_32 }, // CS_MODE_32, CS_OPT_SYNTAX_ATT { "x64", CS_ARCH_X86, CS_MODE_64 }, // CS_MODE_64 { "x64att", CS_ARCH_X86, CS_MODE_64 }, // CS_MODE_64, CS_OPT_SYNTAX_ATT { "ppc32", CS_ARCH_PPC, CS_MODE_32 | CS_MODE_LITTLE_ENDIAN }, { "ppc32be", CS_ARCH_PPC, CS_MODE_32 | CS_MODE_BIG_ENDIAN }, { "ppc32qpx", CS_ARCH_PPC, CS_MODE_32 | CS_MODE_QPX | CS_MODE_LITTLE_ENDIAN }, { "ppc32beqpx", CS_ARCH_PPC, CS_MODE_32 | CS_MODE_QPX | CS_MODE_BIG_ENDIAN }, { "ppc64", CS_ARCH_PPC, CS_MODE_64 | CS_MODE_LITTLE_ENDIAN }, { "ppc64be", CS_ARCH_PPC, CS_MODE_64 | CS_MODE_BIG_ENDIAN }, { "ppc64qpx", CS_ARCH_PPC, CS_MODE_64 | CS_MODE_QPX | CS_MODE_LITTLE_ENDIAN }, { "ppc64beqpx", CS_ARCH_PPC, CS_MODE_64 | CS_MODE_QPX | CS_MODE_BIG_ENDIAN }, { "sparc", CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN }, { "sparcv9", CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN | CS_MODE_V9 }, { "systemz", CS_ARCH_SYSZ, CS_MODE_BIG_ENDIAN }, { "sysz", CS_ARCH_SYSZ, CS_MODE_BIG_ENDIAN }, { "s390x", CS_ARCH_SYSZ, CS_MODE_BIG_ENDIAN }, { "xcore", CS_ARCH_XCORE, CS_MODE_BIG_ENDIAN }, { "m68k", CS_ARCH_M68K, CS_MODE_BIG_ENDIAN }, { "m68k40", CS_ARCH_M68K, CS_MODE_M68K_040 }, { "tms320c64x", CS_ARCH_TMS320C64X, CS_MODE_BIG_ENDIAN }, { "m6800", CS_ARCH_M680X, CS_MODE_M680X_6800 }, { "m6801", CS_ARCH_M680X, CS_MODE_M680X_6801 }, { "m6805", CS_ARCH_M680X, CS_MODE_M680X_6805 }, { "m6808", CS_ARCH_M680X, CS_MODE_M680X_6808 }, { "m6809", CS_ARCH_M680X, CS_MODE_M680X_6809 }, { "m6811", CS_ARCH_M680X, CS_MODE_M680X_6811 }, { "cpu12", CS_ARCH_M680X, CS_MODE_M680X_CPU12 }, { "hd6301", CS_ARCH_M680X, CS_MODE_M680X_6301 }, { "hd6309", CS_ARCH_M680X, CS_MODE_M680X_6309 }, { "hcs08", CS_ARCH_M680X, CS_MODE_M680X_HCS08 }, { "evm", CS_ARCH_EVM, 0 }, { NULL } }; void print_insn_detail_x86(csh ud, cs_mode mode, cs_insn *ins); void print_insn_detail_arm(csh handle, cs_insn *ins); void print_insn_detail_arm64(csh handle, cs_insn *ins); void print_insn_detail_mips(csh handle, cs_insn *ins); void print_insn_detail_ppc(csh handle, cs_insn *ins); void print_insn_detail_sparc(csh handle, cs_insn *ins); void print_insn_detail_sysz(csh handle, cs_insn *ins); void print_insn_detail_xcore(csh handle, cs_insn *ins); void print_insn_detail_m68k(csh handle, cs_insn *ins); void print_insn_detail_tms320c64x(csh handle, cs_insn *ins); void print_insn_detail_m680x(csh handle, cs_insn *ins); void print_insn_detail_evm(csh handle, cs_insn *ins); static void print_details(csh handle, cs_arch arch, cs_mode md, cs_insn *ins); void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } // convert hexchar to hexnum static uint8_t char_to_hexnum(char c) { if (c >= '0' && c <= '9') { return (uint8_t)(c - '0'); } if (c >= 'a' && c <= 'f') { return (uint8_t)(10 + c - 'a'); } // c >= 'A' && c <= 'F' return (uint8_t)(10 + c - 'A'); } // convert user input (char[]) to uint8_t[], each element of which is // valid hexadecimal, and return actual length of uint8_t[] in @size. static uint8_t *preprocess(char *code, size_t *size) { size_t i = 0, j = 0; uint8_t high, low; uint8_t *result; if (strlen(code) == 0) return NULL; result = (uint8_t *)malloc(strlen(code)); if (result != NULL) { while (code[i] != '\0') { if (isxdigit(code[i]) && isxdigit(code[i+1])) { high = 16 * char_to_hexnum(code[i]); low = char_to_hexnum(code[i+1]); result[j] = high + low; i++; j++; } i++; } *size = j; } return result; } static void usage(char *prog) { printf("Cstool for Capstone Disassembler Engine v%u.%u.%u\n\n", CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA); printf("Syntax: %s [-d|-s|-u|-v] [start-address-in-hex-format]\n", prog); printf("\nThe following options are supported:\n"); if (cs_support(CS_ARCH_X86)) { printf(" x16: 16-bit mode (X86)\n"); printf(" x32: 32-bit mode (X86)\n"); printf(" x64: 64-bit mode (X86)\n"); printf(" x16att: 16-bit mode (X86) syntax-att\n"); printf(" x32att: 32-bit mode (X86) syntax-att\n"); printf(" x64att: 64-bit mode (X86) syntax-att\n"); } if (cs_support(CS_ARCH_ARM)) { printf(" arm: arm\n"); printf(" armbe: arm + big endian\n"); printf(" thumb: thumb mode\n"); printf(" thumbbe: thumb + big endian\n"); printf(" cortexm: thumb + cortex-m extensions\n"); printf(" armv8: arm v8\n"); printf(" thumbv8: thumb v8\n"); } if (cs_support(CS_ARCH_ARM64)) { printf(" arm64: aarch64 mode\n"); printf(" arm64be: aarch64 + big endian\n"); } if (cs_support(CS_ARCH_MIPS)) { printf(" mips: mips32 + little endian\n"); printf(" mipsbe: mips32 + big endian\n"); printf(" mips64: mips64 + little endian\n"); printf(" mips64be: mips64 + big endian\n"); } if (cs_support(CS_ARCH_PPC)) { printf(" ppc32: ppc32 + little endian\n"); printf(" ppc32be: ppc32 + big endian\n"); printf(" ppc32qpx: ppc32 + qpx + little endian\n"); printf(" ppc32beqpx: ppc32 + qpx + big endian\n"); printf(" ppc64: ppc64 + little endian\n"); printf(" ppc64be: ppc64 + big endian\n"); printf(" ppc64qpx: ppc64 + qpx + little endian\n"); printf(" ppc64beqpx: ppc64 + qpx + big endian\n"); } if (cs_support(CS_ARCH_SPARC)) { printf(" sparc: sparc\n"); } if (cs_support(CS_ARCH_SYSZ)) { printf(" systemz: systemz (s390x)\n"); } if (cs_support(CS_ARCH_XCORE)) { printf(" xcore: xcore\n"); } if (cs_support(CS_ARCH_M68K)) { printf(" m68k: m68k + big endian\n"); printf(" m68k40: m68k_040\n"); } if (cs_support(CS_ARCH_TMS320C64X)) { printf(" tms320c64x: TMS320C64x\n"); } if (cs_support(CS_ARCH_M680X)) { printf(" m6800: M6800/2\n"); printf(" m6801: M6801/3\n"); printf(" m6805: M6805\n"); printf(" m6808: M68HC08\n"); printf(" m6809: M6809\n"); printf(" m6811: M68HC11\n"); printf(" cpu12: M68HC12/HCS12\n"); printf(" hd6301: HD6301/3\n"); printf(" hd6309: HD6309\n"); printf(" hcs08: HCS08\n"); } if (cs_support(CS_ARCH_EVM)) { printf(" evm: Ethereum Virtual Machine\n"); } printf("\nExtra options:\n"); printf(" -d show detailed information of the instructions\n"); printf(" -s decode in SKIPDATA mode\n"); printf(" -u show immediates as unsigned\n"); printf(" -v show version & Capstone core build info\n\n"); } static void print_details(csh handle, cs_arch arch, cs_mode md, cs_insn *ins) { printf("\tID: %u (%s)\n", ins->id, cs_insn_name(handle, ins->id)); switch(arch) { case CS_ARCH_X86: print_insn_detail_x86(handle, md, ins); break; case CS_ARCH_ARM: print_insn_detail_arm(handle, ins); break; case CS_ARCH_ARM64: print_insn_detail_arm64(handle, ins); break; case CS_ARCH_MIPS: print_insn_detail_mips(handle, ins); break; case CS_ARCH_PPC: print_insn_detail_ppc(handle, ins); break; case CS_ARCH_SPARC: print_insn_detail_sparc(handle, ins); break; case CS_ARCH_SYSZ: print_insn_detail_sysz(handle, ins); break; case CS_ARCH_XCORE: print_insn_detail_xcore(handle, ins); break; case CS_ARCH_M68K: print_insn_detail_m68k(handle, ins); break; case CS_ARCH_TMS320C64X: print_insn_detail_tms320c64x(handle, ins); break; case CS_ARCH_M680X: print_insn_detail_m680x(handle, ins); break; case CS_ARCH_EVM: print_insn_detail_evm(handle, ins); break; default: break; } if (ins->detail->groups_count) { int j; printf("\tGroups: "); for(j = 0; j < ins->detail->groups_count; j++) { printf("%s ", cs_group_name(handle, ins->detail->groups[j])); } printf("\n"); } printf("\n"); } int main(int argc, char **argv) { int i, c; csh handle; char *mode; uint8_t *assembly; size_t count, size; uint64_t address = 0LL; cs_insn *insn; cs_err err; cs_mode md; cs_arch arch = CS_ARCH_ALL; bool detail_flag = false; bool unsigned_flag = false; bool skipdata = false; int args_left; while ((c = getopt (argc, argv, "sudhv")) != -1) { switch (c) { case 's': skipdata = true; break; case 'u': unsigned_flag = true; break; case 'd': detail_flag = true; break; case 'v': printf("Cstool for Capstone Disassembler Engine v%u.%u.%u\n", CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA); printf("Capstone build: "); if (cs_support(CS_ARCH_X86)) { printf("x86=1 "); } if (cs_support(CS_ARCH_ARM)) { printf("arm=1 "); } if (cs_support(CS_ARCH_ARM64)) { printf("arm64=1 "); } if (cs_support(CS_ARCH_MIPS)) { printf("mips=1 "); } if (cs_support(CS_ARCH_PPC)) { printf("ppc=1 "); } if (cs_support(CS_ARCH_SPARC)) { printf("sparc=1 "); } if (cs_support(CS_ARCH_SYSZ)) { printf("sysz=1 "); } if (cs_support(CS_ARCH_XCORE)) { printf("xcore=1 "); } if (cs_support(CS_ARCH_M68K)) { printf("m68k=1 "); } if (cs_support(CS_ARCH_TMS320C64X)) { printf("tms320c64x=1 "); } if (cs_support(CS_ARCH_M680X)) { printf("m680x=1 "); } if (cs_support(CS_ARCH_EVM)) { printf("evm=1 "); } if (cs_support(CS_SUPPORT_DIET)) { printf("diet=1 "); } if (cs_support(CS_SUPPORT_X86_REDUCE)) { printf("x86_reduce=1 "); } printf("\n"); return 0; case 'h': usage(argv[0]); return 0; default: usage(argv[0]); return -1; } } args_left = argc - optind; if (args_left < 2 || args_left > 3) { usage(argv[0]); return -1; } mode = argv[optind]; assembly = preprocess(argv[optind + 1], &size); if (!assembly) { usage(argv[0]); return -1; } if (args_left == 3) { char *temp, *src = argv[optind + 2]; address = strtoull(src, &temp, 16); if (temp == src || *temp != '\0' || errno == ERANGE) { printf("ERROR: invalid address argument, quit!\n"); return -2; } } for (i = 0; all_archs[i].name; i++) { if (!strcmp(all_archs[i].name, mode)) { arch = all_archs[i].arch; err = cs_open(all_archs[i].arch, all_archs[i].mode, &handle); if (!err) { md = all_archs[i].mode; if (strstr (mode, "att")) { cs_option(handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT); } // turn on SKIPDATA mode if (skipdata) cs_option(handle, CS_OPT_SKIPDATA, CS_OPT_ON); } break; } } if (arch == CS_ARCH_ALL) { printf("ERROR: Invalid : \"%s\", quit!\n", mode); usage(argv[0]); return -1; } if (err) { printf("ERROR: Failed on cs_open(), quit!\n"); usage(argv[0]); return -1; } if (detail_flag) { cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); } if (unsigned_flag) { cs_option(handle, CS_OPT_UNSIGNED, CS_OPT_ON); } count = cs_disasm(handle, assembly, size, address, 0, &insn); if (count > 0) { size_t i; for (i = 0; i < count; i++) { int j; printf("%2"PRIx64" ", insn[i].address); for (j = 0; j < insn[i].size; j++) { if (j > 0) putchar(' '); printf("%02x", insn[i].bytes[j]); } // X86 instruction size is variable. // align assembly instruction after the opcode if (arch == CS_ARCH_X86) { for (; j < 16; j++) { printf(" "); } } printf(" %s\t%s\n", insn[i].mnemonic, insn[i].op_str); if (detail_flag) { print_details(handle, arch, md, &insn[i]); } } cs_free(insn, count); } else { printf("ERROR: invalid assembly code\n"); return(-4); } cs_close(&handle); free(assembly); return 0; } capstone-sys-0.11.0/capstone/cstool/cstool_arm.c010066400017500001750000000103561363402546700201100ustar0000000000000000#include #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_arm(csh handle, cs_insn *ins) { cs_arm *arm; int i; cs_regs regs_read, regs_write; uint8_t regs_read_count, regs_write_count; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; arm = &(ins->detail->arm); if (arm->op_count) printf("\top_count: %u\n", arm->op_count); for (i = 0; i < arm->op_count; i++) { cs_arm_op *op = &(arm->operands[i]); switch((int)op->type) { default: break; case ARM_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case ARM_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case ARM_OP_FP: #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point printf("\t\toperands[%u].type: FP = \n", i); #else printf("\t\toperands[%u].type: FP = %f\n", i, op->fp); #endif break; case ARM_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != ARM_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != ARM_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.scale != 1) printf("\t\t\toperands[%u].mem.scale: %d\n", i, op->mem.scale); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); if (op->mem.lshift != 0) printf("\t\t\toperands[%u].mem.lshift: 0x%x\n", i, op->mem.lshift); break; case ARM_OP_PIMM: printf("\t\toperands[%u].type: P-IMM = %u\n", i, op->imm); break; case ARM_OP_CIMM: printf("\t\toperands[%u].type: C-IMM = %u\n", i, op->imm); break; case ARM_OP_SETEND: printf("\t\toperands[%u].type: SETEND = %s\n", i, op->setend == ARM_SETEND_BE? "be" : "le"); break; case ARM_OP_SYSREG: printf("\t\toperands[%u].type: SYSREG = %u\n", i, op->reg); break; } if (op->neon_lane != -1) { printf("\t\toperands[%u].neon_lane = %u\n", i, op->neon_lane); } switch(op->access) { default: break; case CS_AC_READ: printf("\t\toperands[%u].access: READ\n", i); break; case CS_AC_WRITE: printf("\t\toperands[%u].access: WRITE\n", i); break; case CS_AC_READ | CS_AC_WRITE: printf("\t\toperands[%u].access: READ | WRITE\n", i); break; } if (op->shift.type != ARM_SFT_INVALID && op->shift.value) { if (op->shift.type < ARM_SFT_ASR_REG) // shift with constant value printf("\t\t\tShift: %u = %u\n", op->shift.type, op->shift.value); else // shift with register printf("\t\t\tShift: %u = %s\n", op->shift.type, cs_reg_name(handle, op->shift.value)); } if (op->vector_index != -1) { printf("\t\toperands[%u].vector_index = %u\n", i, op->vector_index); } if (op->subtracted) printf("\t\tSubtracted: True\n"); } if (arm->cc != ARM_CC_AL && arm->cc != ARM_CC_INVALID) printf("\tCode condition: %u\n", arm->cc); if (arm->update_flags) printf("\tUpdate-flags: True\n"); if (arm->writeback) printf("\tWrite-back: True\n"); if (arm->cps_mode) printf("\tCPSI-mode: %u\n", arm->cps_mode); if (arm->cps_flag) printf("\tCPSI-flag: %u\n", arm->cps_flag); if (arm->vector_data) printf("\tVector-data: %u\n", arm->vector_data); if (arm->vector_size) printf("\tVector-size: %u\n", arm->vector_size); if (arm->usermode) printf("\tUser-mode: True\n"); if (arm->mem_barrier) printf("\tMemory-barrier: %u\n", arm->mem_barrier); // Print out all registers accessed by this instruction (either implicit or explicit) if (!cs_regs_access(handle, ins, regs_read, ®s_read_count, regs_write, ®s_write_count)) { if (regs_read_count) { printf("\tRegisters read:"); for(i = 0; i < regs_read_count; i++) { printf(" %s", cs_reg_name(handle, regs_read[i])); } printf("\n"); } if (regs_write_count) { printf("\tRegisters modified:"); for(i = 0; i < regs_write_count; i++) { printf(" %s", cs_reg_name(handle, regs_write[i])); } printf("\n"); } } } capstone-sys-0.11.0/capstone/cstool/cstool_arm64.c010066400017500001750000000077151363402546700202670ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013> */ #include #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_arm64(csh handle, cs_insn *ins) { cs_arm64 *arm64; int i; cs_regs regs_read, regs_write; uint8_t regs_read_count, regs_write_count; uint8_t access; // detail can be NULL if SKIPDATA option is turned ON if (ins->detail == NULL) return; arm64 = &(ins->detail->arm64); if (arm64->op_count) printf("\top_count: %u\n", arm64->op_count); for (i = 0; i < arm64->op_count; i++) { cs_arm64_op *op = &(arm64->operands[i]); switch(op->type) { default: break; case ARM64_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case ARM64_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case ARM64_OP_FP: #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point printf("\t\toperands[%u].type: FP = \n", i); #else printf("\t\toperands[%u].type: FP = %f\n", i, op->fp); #endif break; case ARM64_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != ARM64_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != ARM64_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; case ARM64_OP_CIMM: printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm); break; case ARM64_OP_REG_MRS: printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg); break; case ARM64_OP_REG_MSR: printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg); break; case ARM64_OP_PSTATE: printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate); break; case ARM64_OP_SYS: printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys); break; case ARM64_OP_PREFETCH: printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch); break; case ARM64_OP_BARRIER: printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier); break; } access = op->access; switch(access) { default: break; case CS_AC_READ: printf("\t\toperands[%u].access: READ\n", i); break; case CS_AC_WRITE: printf("\t\toperands[%u].access: WRITE\n", i); break; case CS_AC_READ | CS_AC_WRITE: printf("\t\toperands[%u].access: READ | WRITE\n", i); break; } if (op->shift.type != ARM64_SFT_INVALID && op->shift.value) printf("\t\t\tShift: type = %u, value = %u\n", op->shift.type, op->shift.value); if (op->ext != ARM64_EXT_INVALID) printf("\t\t\tExt: %u\n", op->ext); if (op->vas != ARM64_VAS_INVALID) printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas); if (op->vess != ARM64_VESS_INVALID) printf("\t\t\tVector Element Size Specifier: %u\n", op->vess); if (op->vector_index != -1) printf("\t\t\tVector Index: %u\n", op->vector_index); } if (arm64->update_flags) printf("\tUpdate-flags: True\n"); if (arm64->writeback) printf("\tWrite-back: True\n"); if (arm64->cc) printf("\tCode-condition: %u\n", arm64->cc); // Print out all registers accessed by this instruction (either implicit or explicit) if (!cs_regs_access(handle, ins, regs_read, ®s_read_count, regs_write, ®s_write_count)) { if (regs_read_count) { printf("\tRegisters read:"); for(i = 0; i < regs_read_count; i++) { printf(" %s", cs_reg_name(handle, regs_read[i])); } printf("\n"); } if (regs_write_count) { printf("\tRegisters modified:"); for(i = 0; i < regs_write_count; i++) { printf(" %s", cs_reg_name(handle, regs_write[i])); } printf("\n"); } } } capstone-sys-0.11.0/capstone/cstool/cstool_evm.c010066400017500001750000000010141363402546700201070ustar0000000000000000#include #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_evm(csh handle, cs_insn *ins) { cs_evm *evm; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; evm = &(ins->detail->evm); if (evm->pop) printf("\tPop: %u\n", evm->pop); if (evm->push) printf("\tPush: %u\n", evm->push); if (evm->fee) printf("\tGas fee: %u\n", evm->fee); } capstone-sys-0.11.0/capstone/cstool/cstool_m680x.c010066400017500001750000000067361363402546700202220ustar0000000000000000/* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); static const char *s_access[] = { "UNCHANGED", "READ", "WRITE", "READ | WRITE", }; void print_read_write_regs(csh handle, cs_detail *detail) { int i; if (detail->regs_read_count > 0) { printf("\treading from regs: "); for (i = 0; i < detail->regs_read_count; ++i) { if (i > 0) printf(", "); printf("%s", cs_reg_name(handle, detail->regs_read[i])); } printf("\n"); } if (detail->regs_write_count > 0) { printf("\twriting to regs: "); for (i = 0; i < detail->regs_write_count; ++i) { if (i > 0) printf(", "); printf("%s", cs_reg_name(handle, detail->regs_write[i])); } printf("\n"); } } void print_insn_detail_m680x(csh handle, cs_insn *insn) { cs_detail *detail = insn->detail; cs_m680x *m680x = NULL; int i; // detail can be NULL on "data" instruction if SKIPDATA option is // turned ON if (detail == NULL) return; m680x = &detail->m680x; if (m680x->op_count) printf("\top_count: %u\n", m680x->op_count); for (i = 0; i < m680x->op_count; i++) { cs_m680x_op *op = &(m680x->operands[i]); const char *comment; switch ((int)op->type) { default: break; case M680X_OP_REGISTER: comment = ""; if ((i == 0 && m680x->flags & M680X_FIRST_OP_IN_MNEM) || (i == 1 && m680x->flags & M680X_SECOND_OP_IN_MNEM)) comment = " (in mnemonic)"; printf("\t\toperands[%u].type: REGISTER = %s%s\n", i, cs_reg_name(handle, op->reg), comment); break; case M680X_OP_CONSTANT: printf("\t\toperands[%u].type: CONSTANT = %u\n", i, op->const_val); break; case M680X_OP_IMMEDIATE: printf("\t\toperands[%u].type: IMMEDIATE = #%d\n", i, op->imm); break; case M680X_OP_DIRECT: printf("\t\toperands[%u].type: DIRECT = 0x%02x\n", i, op->direct_addr); break; case M680X_OP_EXTENDED: printf("\t\toperands[%u].type: EXTENDED %s = 0x%04x\n", i, op->ext.indirect ? "INDIRECT" : "", op->ext.address); break; case M680X_OP_RELATIVE: printf("\t\toperands[%u].type: RELATIVE = 0x%04x\n", i, op->rel.address); break; case M680X_OP_INDEXED: printf("\t\toperands[%u].type: INDEXED%s\n", i, (op->idx.flags & M680X_IDX_INDIRECT) ? " INDIRECT" : ""); if (op->idx.base_reg != M680X_REG_INVALID) printf("\t\t\tbase register: %s\n", cs_reg_name(handle, op->idx.base_reg)); if (op->idx.offset_reg != M680X_REG_INVALID) printf("\t\t\toffset register: %s\n", cs_reg_name(handle, op->idx.offset_reg)); if ((op->idx.offset_bits != 0) && (op->idx.offset_reg == M680X_REG_INVALID) && !op->idx.inc_dec) { printf("\t\t\toffset: %d\n", op->idx.offset); if (op->idx.base_reg == M680X_REG_PC) printf("\t\t\toffset address: 0x%x\n", op->idx.offset_addr); printf("\t\t\toffset bits: %u\n", op->idx.offset_bits); } if (op->idx.inc_dec) { const char *post_pre = op->idx.flags & M680X_IDX_POST_INC_DEC ? "post" : "pre"; const char *inc_dec = (op->idx.inc_dec > 0) ? "increment" : "decrement"; printf("\t\t\t%s %s: %d\n", post_pre, inc_dec, abs(op->idx.inc_dec)); } break; } if (op->size != 0) printf("\t\t\tsize: %u\n", op->size); if (op->access != CS_AC_INVALID) printf("\t\t\taccess: %s\n", s_access[op->access]); } print_read_write_regs(handle, detail); } capstone-sys-0.11.0/capstone/cstool/cstool_m68k.c010066400017500001750000000064751363402546700201250ustar0000000000000000// // cstool_m68k.c // // // Created by YUHANG TANG on 26/10/16. // // #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); static const char* s_addressing_modes[] = { "", "Register Direct - Data", "Register Direct - Address", "Register Indirect - Address", "Register Indirect - Address with Postincrement", "Register Indirect - Address with Predecrement", "Register Indirect - Address with Displacement", "Address Register Indirect With Index - 8-bit displacement", "Address Register Indirect With Index - Base displacement", "Memory indirect - Postindex", "Memory indirect - Preindex", "Program Counter Indirect - with Displacement", "Program Counter Indirect with Index - with 8-Bit Displacement", "Program Counter Indirect with Index - with Base Displacement", "Program Counter Memory Indirect - Postindexed", "Program Counter Memory Indirect - Preindexed", "Absolute Data Addressing - Short", "Absolute Data Addressing - Long", "Immediate value", }; static void print_read_write_regs(cs_detail* detail, csh handle) { int i; for (i = 0; i < detail->regs_read_count; ++i) { uint16_t reg_id = detail->regs_read[i]; const char* reg_name = cs_reg_name(handle, reg_id); printf("\treading from reg: %s\n", reg_name); } for (i = 0; i < detail->regs_write_count; ++i) { uint16_t reg_id = detail->regs_write[i]; const char* reg_name = cs_reg_name(handle, reg_id); printf("\twriting to reg: %s\n", reg_name); } } void print_insn_detail_m68k(csh handle, cs_insn *ins) { cs_m68k* m68k; cs_detail* detail; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; detail = ins->detail; m68k = &detail->m68k; if (m68k->op_count) printf("\top_count: %u\n", m68k->op_count); print_read_write_regs(detail, handle); printf("\tgroups_count: %u\n", detail->groups_count); for (i = 0; i < m68k->op_count; i++) { cs_m68k_op* op = &(m68k->operands[i]); switch((int)op->type) { default: break; case M68K_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case M68K_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, (int)op->imm); break; case M68K_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base_reg != M68K_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base_reg)); if (op->mem.index_reg != M68K_REG_INVALID) { printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index_reg)); printf("\t\t\toperands[%u].mem.index: size = %c\n", i, op->mem.index_size ? 'l' : 'w'); } if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); if (op->mem.scale != 0) printf("\t\t\toperands[%u].mem.scale: %d\n", i, op->mem.scale); printf("\t\taddress mode: %s\n", s_addressing_modes[op->address_mode]); break; case M68K_OP_FP_SINGLE: printf("\t\toperands[%u].type: FP_SINGLE\n", i); printf("\t\t\toperands[%u].simm: %f\n", i, op->simm); break; case M68K_OP_FP_DOUBLE: printf("\t\toperands[%u].type: FP_DOUBLE\n", i); printf("\t\t\toperands[%u].dimm: %lf\n", i, op->dimm); break; } } } capstone-sys-0.11.0/capstone/cstool/cstool_mips.c010066400017500001750000000022741363402546700203010ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013> */ #include #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_mips(csh handle, cs_insn *ins) { int i; cs_mips *mips; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; mips = &(ins->detail->mips); if (mips->op_count) printf("\top_count: %u\n", mips->op_count); for (i = 0; i < mips->op_count; i++) { cs_mips_op *op = &(mips->operands[i]); switch((int)op->type) { default: break; case MIPS_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case MIPS_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case MIPS_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != MIPS_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); break; } } } capstone-sys-0.11.0/capstone/cstool/cstool_ppc.c010066400017500001750000000041251363402546700201100ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013> */ #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); static const char* get_bc_name(int bc) { switch(bc) { default: case PPC_BC_INVALID: return ("invalid"); case PPC_BC_LT: return ("lt"); case PPC_BC_LE: return ("le"); case PPC_BC_EQ: return ("eq"); case PPC_BC_GE: return ("ge"); case PPC_BC_GT: return ("gt"); case PPC_BC_NE: return ("ne"); case PPC_BC_UN: return ("un"); case PPC_BC_NU: return ("nu"); case PPC_BC_SO: return ("so"); case PPC_BC_NS: return ("ns"); } } void print_insn_detail_ppc(csh handle, cs_insn *ins) { cs_ppc *ppc; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; ppc = &(ins->detail->ppc); if (ppc->op_count) printf("\top_count: %u\n", ppc->op_count); for (i = 0; i < ppc->op_count; i++) { cs_ppc_op *op = &(ppc->operands[i]); switch((int)op->type) { default: break; case PPC_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case PPC_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%"PRIx64"\n", i, op->imm); break; case PPC_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != PPC_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; case PPC_OP_CRX: printf("\t\toperands[%u].type: CRX\n", i); printf("\t\t\toperands[%u].crx.scale: %d\n", i, op->crx.scale); printf("\t\t\toperands[%u].crx.reg: %s\n", i, cs_reg_name(handle, op->crx.reg)); printf("\t\t\toperands[%u].crx.cond: %s\n", i, get_bc_name(op->crx.cond)); break; } } if (ppc->bc != 0) printf("\tBranch code: %u\n", ppc->bc); if (ppc->bh != 0) printf("\tBranch hint: %u\n", ppc->bh); if (ppc->update_cr0) printf("\tUpdate-CR0: True\n"); } capstone-sys-0.11.0/capstone/cstool/cstool_sparc.c010066400017500001750000000027061363402546700204410ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2014 */ #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_sparc(csh handle, cs_insn *ins) { cs_sparc *sparc; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; sparc = &(ins->detail->sparc); if (sparc->op_count) printf("\top_count: %u\n", sparc->op_count); for (i = 0; i < sparc->op_count; i++) { cs_sparc_op *op = &(sparc->operands[i]); switch((int)op->type) { default: break; case SPARC_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case SPARC_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case SPARC_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; } } if (sparc->cc != 0) printf("\tCode condition: %u\n", sparc->cc); if (sparc->hint != 0) printf("\tHint code: %u\n", sparc->hint); } capstone-sys-0.11.0/capstone/cstool/cstool_systemz.c010066400017500001750000000031161363402546700210430ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2014 */ #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_sysz(csh handle, cs_insn *ins) { cs_sysz *sysz; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; sysz = &(ins->detail->sysz); if (sysz->op_count) printf("\top_count: %u\n", sysz->op_count); for (i = 0; i < sysz->op_count; i++) { cs_sysz_op *op = &(sysz->operands[i]); switch((int)op->type) { default: break; case SYSZ_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case SYSZ_OP_ACREG: printf("\t\toperands[%u].type: ACREG = %u\n", i, op->reg); break; case SYSZ_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case SYSZ_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != SYSZ_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != SYSZ_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.length != 0) printf("\t\t\toperands[%u].mem.length: 0x%" PRIx64 "\n", i, op->mem.length); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); break; } } if (sysz->cc != 0) printf("\tCode condition: %u\n", sysz->cc); } capstone-sys-0.11.0/capstone/cstool/cstool_tms320c64x.c010066400017500001750000000067551363402546700210760ustar0000000000000000/* Capstone Disassembler Engine */ /* By Fotis Loukos , 2017 */ #include #include void print_string_hex(const char *comment, unsigned char *str, size_t len); void print_insn_detail_tms320c64x(csh handle, cs_insn *ins) { cs_tms320c64x *tms320c64x; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; tms320c64x = &(ins->detail->tms320c64x); if (tms320c64x->op_count) printf("\top_count: %u\n", tms320c64x->op_count); for (i = 0; i < tms320c64x->op_count; i++) { cs_tms320c64x_op *op = &(tms320c64x->operands[i]); switch((int)op->type) { default: break; case TMS320C64X_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case TMS320C64X_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case TMS320C64X_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != TMS320C64X_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); printf("\t\t\toperands[%u].mem.disptype: ", i); if(op->mem.disptype == TMS320C64X_MEM_DISP_INVALID) { printf("Invalid\n"); printf("\t\t\toperands[%u].mem.disp: %u\n", i, op->mem.disp); } if(op->mem.disptype == TMS320C64X_MEM_DISP_CONSTANT) { printf("Constant\n"); printf("\t\t\toperands[%u].mem.disp: %u\n", i, op->mem.disp); } if(op->mem.disptype == TMS320C64X_MEM_DISP_REGISTER) { printf("Register\n"); printf("\t\t\toperands[%u].mem.disp: %s\n", i, cs_reg_name(handle, op->mem.disp)); } printf("\t\t\toperands[%u].mem.unit: %u\n", i, op->mem.unit); printf("\t\t\toperands[%u].mem.direction: ", i); if(op->mem.direction == TMS320C64X_MEM_DIR_INVALID) printf("Invalid\n"); if(op->mem.direction == TMS320C64X_MEM_DIR_FW) printf("Forward\n"); if(op->mem.direction == TMS320C64X_MEM_DIR_BW) printf("Backward\n"); printf("\t\t\toperands[%u].mem.modify: ", i); if(op->mem.modify == TMS320C64X_MEM_MOD_INVALID) printf("Invalid\n"); if(op->mem.modify == TMS320C64X_MEM_MOD_NO) printf("No\n"); if(op->mem.modify == TMS320C64X_MEM_MOD_PRE) printf("Pre\n"); if(op->mem.modify == TMS320C64X_MEM_MOD_POST) printf("Post\n"); printf("\t\t\toperands[%u].mem.scaled: %u\n", i, op->mem.scaled); break; case TMS320C64X_OP_REGPAIR: printf("\t\toperands[%u].type: REGPAIR = %s:%s\n", i, cs_reg_name(handle, op->reg + 1), cs_reg_name(handle, op->reg)); break; } } printf("\tFunctional unit: "); switch(tms320c64x->funit.unit) { case TMS320C64X_FUNIT_D: printf("D%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_L: printf("L%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_M: printf("M%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_S: printf("S%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_NO: printf("No Functional Unit\n"); break; default: printf("Unknown (Unit %u, Side %u)\n", tms320c64x->funit.unit, tms320c64x->funit.side); break; } if(tms320c64x->funit.crosspath == 1) printf("\tCrosspath: 1\n"); if(tms320c64x->condition.reg != TMS320C64X_REG_INVALID) printf("\tCondition: [%c%s]\n", (tms320c64x->condition.zero == 1) ? '!' : ' ', cs_reg_name(handle, tms320c64x->condition.reg)); printf("\tParallel: %s\n", (tms320c64x->parallel == 1) ? "true" : "false"); printf("\n"); } capstone-sys-0.11.0/capstone/cstool/cstool_x86.c010066400017500001750000000214121363402546700177510ustar0000000000000000/* By Nguyen Anh Quynh , 2013> */ #include #include #include void print_string_hex(const char *comment, unsigned char *str, size_t len); static const char *get_eflag_name(uint64_t flag) { switch(flag) { default: return NULL; case X86_EFLAGS_UNDEFINED_OF: return "UNDEF_OF"; case X86_EFLAGS_UNDEFINED_SF: return "UNDEF_SF"; case X86_EFLAGS_UNDEFINED_ZF: return "UNDEF_ZF"; case X86_EFLAGS_MODIFY_AF: return "MOD_AF"; case X86_EFLAGS_UNDEFINED_PF: return "UNDEF_PF"; case X86_EFLAGS_MODIFY_CF: return "MOD_CF"; case X86_EFLAGS_MODIFY_SF: return "MOD_SF"; case X86_EFLAGS_MODIFY_ZF: return "MOD_ZF"; case X86_EFLAGS_UNDEFINED_AF: return "UNDEF_AF"; case X86_EFLAGS_MODIFY_PF: return "MOD_PF"; case X86_EFLAGS_UNDEFINED_CF: return "UNDEF_CF"; case X86_EFLAGS_MODIFY_OF: return "MOD_OF"; case X86_EFLAGS_RESET_OF: return "RESET_OF"; case X86_EFLAGS_RESET_CF: return "RESET_CF"; case X86_EFLAGS_RESET_DF: return "RESET_DF"; case X86_EFLAGS_RESET_IF: return "RESET_IF"; case X86_EFLAGS_RESET_ZF: return "RESET_ZF"; case X86_EFLAGS_TEST_OF: return "TEST_OF"; case X86_EFLAGS_TEST_SF: return "TEST_SF"; case X86_EFLAGS_TEST_ZF: return "TEST_ZF"; case X86_EFLAGS_TEST_PF: return "TEST_PF"; case X86_EFLAGS_TEST_CF: return "TEST_CF"; case X86_EFLAGS_RESET_SF: return "RESET_SF"; case X86_EFLAGS_RESET_AF: return "RESET_AF"; case X86_EFLAGS_RESET_TF: return "RESET_TF"; case X86_EFLAGS_RESET_NT: return "RESET_NT"; case X86_EFLAGS_PRIOR_OF: return "PRIOR_OF"; case X86_EFLAGS_PRIOR_SF: return "PRIOR_SF"; case X86_EFLAGS_PRIOR_ZF: return "PRIOR_ZF"; case X86_EFLAGS_PRIOR_AF: return "PRIOR_AF"; case X86_EFLAGS_PRIOR_PF: return "PRIOR_PF"; case X86_EFLAGS_PRIOR_CF: return "PRIOR_CF"; case X86_EFLAGS_PRIOR_TF: return "PRIOR_TF"; case X86_EFLAGS_PRIOR_IF: return "PRIOR_IF"; case X86_EFLAGS_PRIOR_DF: return "PRIOR_DF"; case X86_EFLAGS_TEST_NT: return "TEST_NT"; case X86_EFLAGS_TEST_DF: return "TEST_DF"; case X86_EFLAGS_RESET_PF: return "RESET_PF"; case X86_EFLAGS_PRIOR_NT: return "PRIOR_NT"; case X86_EFLAGS_MODIFY_TF: return "MOD_TF"; case X86_EFLAGS_MODIFY_IF: return "MOD_IF"; case X86_EFLAGS_MODIFY_DF: return "MOD_DF"; case X86_EFLAGS_MODIFY_NT: return "MOD_NT"; case X86_EFLAGS_MODIFY_RF: return "MOD_RF"; case X86_EFLAGS_SET_CF: return "SET_CF"; case X86_EFLAGS_SET_DF: return "SET_DF"; case X86_EFLAGS_SET_IF: return "SET_IF"; case X86_EFLAGS_SET_OF: return "SET_OF"; case X86_EFLAGS_SET_SF: return "SET_SF"; case X86_EFLAGS_SET_ZF: return "SET_ZF"; case X86_EFLAGS_SET_AF: return "SET_AF"; case X86_EFLAGS_SET_PF: return "SET_PF"; case X86_EFLAGS_TEST_AF: return "TEST_AF"; case X86_EFLAGS_TEST_TF: return "TEST_TF"; case X86_EFLAGS_TEST_RF: return "TEST_RF"; case X86_EFLAGS_RESET_0F: return "RESET_0F"; case X86_EFLAGS_RESET_AC: return "RESET_AC"; } } static const char *get_fpu_flag_name(uint64_t flag) { switch (flag) { default: return NULL; case X86_FPU_FLAGS_MODIFY_C0: return "MOD_C0"; case X86_FPU_FLAGS_MODIFY_C1: return "MOD_C1"; case X86_FPU_FLAGS_MODIFY_C2: return "MOD_C2"; case X86_FPU_FLAGS_MODIFY_C3: return "MOD_C3"; case X86_FPU_FLAGS_RESET_C0: return "RESET_C0"; case X86_FPU_FLAGS_RESET_C1: return "RESET_C1"; case X86_FPU_FLAGS_RESET_C2: return "RESET_C2"; case X86_FPU_FLAGS_RESET_C3: return "RESET_C3"; case X86_FPU_FLAGS_SET_C0: return "SET_C0"; case X86_FPU_FLAGS_SET_C1: return "SET_C1"; case X86_FPU_FLAGS_SET_C2: return "SET_C2"; case X86_FPU_FLAGS_SET_C3: return "SET_C3"; case X86_FPU_FLAGS_UNDEFINED_C0: return "UNDEF_C0"; case X86_FPU_FLAGS_UNDEFINED_C1: return "UNDEF_C1"; case X86_FPU_FLAGS_UNDEFINED_C2: return "UNDEF_C2"; case X86_FPU_FLAGS_UNDEFINED_C3: return "UNDEF_C3"; case X86_FPU_FLAGS_TEST_C0: return "TEST_C0"; case X86_FPU_FLAGS_TEST_C1: return "TEST_C1"; case X86_FPU_FLAGS_TEST_C2: return "TEST_C2"; case X86_FPU_FLAGS_TEST_C3: return "TEST_C3"; } } void print_insn_detail_x86(csh ud, cs_mode mode, cs_insn *ins) { int count, i; cs_x86 *x86; cs_regs regs_read, regs_write; uint8_t regs_read_count, regs_write_count; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; x86 = &(ins->detail->x86); print_string_hex("\tPrefix:", x86->prefix, 4); print_string_hex("\tOpcode:", x86->opcode, 4); printf("\trex: 0x%x\n", x86->rex); printf("\taddr_size: %u\n", x86->addr_size); printf("\tmodrm: 0x%x\n", x86->modrm); printf("\tdisp: 0x%" PRIx64 "\n", x86->disp); // SIB is not available in 16-bit mode if ((mode & CS_MODE_16) == 0) { printf("\tsib: 0x%x\n", x86->sib); if (x86->sib_base != X86_REG_INVALID) printf("\t\tsib_base: %s\n", cs_reg_name(ud, x86->sib_base)); if (x86->sib_index != X86_REG_INVALID) printf("\t\tsib_index: %s\n", cs_reg_name(ud, x86->sib_index)); if (x86->sib_scale != 0) printf("\t\tsib_scale: %d\n", x86->sib_scale); } // XOP code condition if (x86->xop_cc != X86_XOP_CC_INVALID) { printf("\txop_cc: %u\n", x86->xop_cc); } // SSE code condition if (x86->sse_cc != X86_SSE_CC_INVALID) { printf("\tsse_cc: %u\n", x86->sse_cc); } // AVX code condition if (x86->avx_cc != X86_AVX_CC_INVALID) { printf("\tavx_cc: %u\n", x86->avx_cc); } // AVX Suppress All Exception if (x86->avx_sae) { printf("\tavx_sae: %u\n", x86->avx_sae); } // AVX Rounding Mode if (x86->avx_rm != X86_AVX_RM_INVALID) { printf("\tavx_rm: %u\n", x86->avx_rm); } // Print out all immediate operands count = cs_op_count(ud, ins, X86_OP_IMM); if (count > 0) { printf("\timm_count: %u\n", count); for (i = 1; i < count + 1; i++) { int index = cs_op_index(ud, ins, X86_OP_IMM, i); printf("\t\timms[%u]: 0x%" PRIx64 "\n", i, x86->operands[index].imm); } } if (x86->op_count) printf("\top_count: %u\n", x86->op_count); // Print out all operands for (i = 0; i < x86->op_count; i++) { cs_x86_op *op = &(x86->operands[i]); switch((int)op->type) { case X86_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(ud, op->reg)); break; case X86_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case X86_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.segment != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.segment: REG = %s\n", i, cs_reg_name(ud, op->mem.segment)); if (op->mem.base != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(ud, op->mem.base)); if (op->mem.index != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(ud, op->mem.index)); if (op->mem.scale != 1) printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); break; default: break; } // AVX broadcast type if (op->avx_bcast != X86_AVX_BCAST_INVALID) printf("\t\toperands[%u].avx_bcast: %u\n", i, op->avx_bcast); // AVX zero opmask {z} if (op->avx_zero_opmask != false) printf("\t\toperands[%u].avx_zero_opmask: TRUE\n", i); printf("\t\toperands[%u].size: %u\n", i, op->size); switch(op->access) { default: break; case CS_AC_READ: printf("\t\toperands[%u].access: READ\n", i); break; case CS_AC_WRITE: printf("\t\toperands[%u].access: WRITE\n", i); break; case CS_AC_READ | CS_AC_WRITE: printf("\t\toperands[%u].access: READ | WRITE\n", i); break; } } // Print out all registers accessed by this instruction (either implicit or explicit) if (!cs_regs_access(ud, ins, regs_read, ®s_read_count, regs_write, ®s_write_count)) { if (regs_read_count) { printf("\tRegisters read:"); for(i = 0; i < regs_read_count; i++) { printf(" %s", cs_reg_name(ud, regs_read[i])); } printf("\n"); } if (regs_write_count) { printf("\tRegisters modified:"); for(i = 0; i < regs_write_count; i++) { printf(" %s", cs_reg_name(ud, regs_write[i])); } printf("\n"); } } if (x86->eflags || x86->fpu_flags) { for(i = 0; i < ins->detail->groups_count; i++) { if (ins->detail->groups[i] == X86_GRP_FPU) { printf("\tFPU_FLAGS:"); for(i = 0; i <= 63; i++) if (x86->fpu_flags & ((uint64_t)1 << i)) { printf(" %s", get_fpu_flag_name((uint64_t)1 << i)); } printf("\n"); break; } } if (i == ins->detail->groups_count) { printf("\tEFLAGS:"); for(i = 0; i <= 63; i++) if (x86->eflags & ((uint64_t)1 << i)) { printf(" %s", get_eflag_name((uint64_t)1 << i)); } printf("\n"); } } } capstone-sys-0.11.0/capstone/cstool/cstool_xcore.c010066400017500001750000000026341363402546700204510ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2014 */ #include #include void print_string_hex(char *comment, unsigned char *str, size_t len); void print_insn_detail_xcore(csh handle, cs_insn *ins) { cs_xcore *xcore; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; xcore = &(ins->detail->xcore); if (xcore->op_count) printf("\top_count: %u\n", xcore->op_count); for (i = 0; i < xcore->op_count; i++) { cs_xcore_op *op = &(xcore->operands[i]); switch((int)op->type) { default: break; case XCORE_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case XCORE_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case XCORE_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != XCORE_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != XCORE_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); if (op->mem.direct != 1) printf("\t\t\toperands[%u].mem.direct: -1\n", i); break; } } printf("\n"); } capstone-sys-0.11.0/capstone/cstool/getopt.h010066400017500001750000000036421363402546700172550ustar0000000000000000#include #include // global int opterr = 1, /* if error message should be printed */ optind = 1, /* index into parent argv vector */ optopt, /* character checked for validity */ optreset; /* reset getopt */ const char *optarg; /* argument associated with option */ #define BADCH (int)'?' #define BADARG (int)':' #define EMSG "" /* * getopt -- * Parse argc/argv argument vector. */ int getopt (int nargc, char * const nargv[], const char *ostr) { static const char *place = EMSG; /* option letter processing */ const char *oli; /* option letter list index */ if (optreset || !*place) { /* update scanning pointer */ optreset = 0; if (optind >= nargc || *(place = nargv[optind]) != '-') { place = EMSG; return (-1); } if (place[1] && *++place == '-') { /* found "--" */ ++optind; place = EMSG; return (-1); } } /* option letter okay? */ if ((optopt = (int)*place++) == (int)':' || !(oli = strchr (ostr, optopt))) { /* * if the user didn't specify '-' as an option, * assume it means -1. */ if (optopt == (int)'-') return (-1); if (!*place) ++optind; if (opterr && *ostr != ':') (void)printf ("illegal option -- %c\n", optopt); return (BADCH); } if (*++oli != ':') { /* don't need argument */ optarg = NULL; if (!*place) ++optind; } else { /* need an argument */ if (*place) /* no white space */ optarg = place; else if (nargc <= ++optind) { /* no arg */ place = EMSG; if (*ostr == ':') return (BADARG); if (opterr) (void)printf ("option requires an argument -- %c\n", optopt); return (BADCH); } else /* white space */ optarg = nargv[optind]; place = EMSG; ++optind; } return optopt; /* dump back option letter */ } capstone-sys-0.11.0/capstone/functions.mk010066400017500001750000000002771363402546700166410ustar0000000000000000# Capstone Disassembly Engine # Common functions used by Makefile & tests/Makefile define compile ${CC} ${CFLAGS} -c $< -o $@ endef define log @printf " %-7s %s\n" "$(1)" "$(2)" endef capstone-sys-0.11.0/capstone/include/capstone/arm.h010066400017500001750000000445531363402546700204740ustar0000000000000000#ifndef CAPSTONE_ARM_H #define CAPSTONE_ARM_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// ARM shift type typedef enum arm_shifter { ARM_SFT_INVALID = 0, ARM_SFT_ASR, ///< shift with immediate const ARM_SFT_LSL, ///< shift with immediate const ARM_SFT_LSR, ///< shift with immediate const ARM_SFT_ROR, ///< shift with immediate const ARM_SFT_RRX, ///< shift with immediate const ARM_SFT_ASR_REG, ///< shift with register ARM_SFT_LSL_REG, ///< shift with register ARM_SFT_LSR_REG, ///< shift with register ARM_SFT_ROR_REG, ///< shift with register ARM_SFT_RRX_REG, ///< shift with register } arm_shifter; /// ARM condition code typedef enum arm_cc { ARM_CC_INVALID = 0, ARM_CC_EQ, ///< Equal Equal ARM_CC_NE, ///< Not equal Not equal, or unordered ARM_CC_HS, ///< Carry set >, ==, or unordered ARM_CC_LO, ///< Carry clear Less than ARM_CC_MI, ///< Minus, negative Less than ARM_CC_PL, ///< Plus, positive or zero >, ==, or unordered ARM_CC_VS, ///< Overflow Unordered ARM_CC_VC, ///< No overflow Not unordered ARM_CC_HI, ///< Unsigned higher Greater than, or unordered ARM_CC_LS, ///< Unsigned lower or same Less than or equal ARM_CC_GE, ///< Greater than or equal Greater than or equal ARM_CC_LT, ///< Less than Less than, or unordered ARM_CC_GT, ///< Greater than Greater than ARM_CC_LE, ///< Less than or equal <, ==, or unordered ARM_CC_AL ///< Always (unconditional) Always (unconditional) } arm_cc; typedef enum arm_sysreg { /// Special registers for MSR ARM_SYSREG_INVALID = 0, // SPSR* registers can be OR combined ARM_SYSREG_SPSR_C = 1, ARM_SYSREG_SPSR_X = 2, ARM_SYSREG_SPSR_S = 4, ARM_SYSREG_SPSR_F = 8, // CPSR* registers can be OR combined ARM_SYSREG_CPSR_C = 16, ARM_SYSREG_CPSR_X = 32, ARM_SYSREG_CPSR_S = 64, ARM_SYSREG_CPSR_F = 128, // independent registers ARM_SYSREG_APSR = 256, ARM_SYSREG_APSR_G, ARM_SYSREG_APSR_NZCVQ, ARM_SYSREG_APSR_NZCVQG, ARM_SYSREG_IAPSR, ARM_SYSREG_IAPSR_G, ARM_SYSREG_IAPSR_NZCVQG, ARM_SYSREG_IAPSR_NZCVQ, ARM_SYSREG_EAPSR, ARM_SYSREG_EAPSR_G, ARM_SYSREG_EAPSR_NZCVQG, ARM_SYSREG_EAPSR_NZCVQ, ARM_SYSREG_XPSR, ARM_SYSREG_XPSR_G, ARM_SYSREG_XPSR_NZCVQG, ARM_SYSREG_XPSR_NZCVQ, ARM_SYSREG_IPSR, ARM_SYSREG_EPSR, ARM_SYSREG_IEPSR, ARM_SYSREG_MSP, ARM_SYSREG_PSP, ARM_SYSREG_PRIMASK, ARM_SYSREG_BASEPRI, ARM_SYSREG_BASEPRI_MAX, ARM_SYSREG_FAULTMASK, ARM_SYSREG_CONTROL, // Banked Registers ARM_SYSREG_R8_USR, ARM_SYSREG_R9_USR, ARM_SYSREG_R10_USR, ARM_SYSREG_R11_USR, ARM_SYSREG_R12_USR, ARM_SYSREG_SP_USR, ARM_SYSREG_LR_USR, ARM_SYSREG_R8_FIQ, ARM_SYSREG_R9_FIQ, ARM_SYSREG_R10_FIQ, ARM_SYSREG_R11_FIQ, ARM_SYSREG_R12_FIQ, ARM_SYSREG_SP_FIQ, ARM_SYSREG_LR_FIQ, ARM_SYSREG_LR_IRQ, ARM_SYSREG_SP_IRQ, ARM_SYSREG_LR_SVC, ARM_SYSREG_SP_SVC, ARM_SYSREG_LR_ABT, ARM_SYSREG_SP_ABT, ARM_SYSREG_LR_UND, ARM_SYSREG_SP_UND, ARM_SYSREG_LR_MON, ARM_SYSREG_SP_MON, ARM_SYSREG_ELR_HYP, ARM_SYSREG_SP_HYP, ARM_SYSREG_SPSR_FIQ, ARM_SYSREG_SPSR_IRQ, ARM_SYSREG_SPSR_SVC, ARM_SYSREG_SPSR_ABT, ARM_SYSREG_SPSR_UND, ARM_SYSREG_SPSR_MON, ARM_SYSREG_SPSR_HYP, } arm_sysreg; /// The memory barrier constants map directly to the 4-bit encoding of /// the option field for Memory Barrier operations. typedef enum arm_mem_barrier { ARM_MB_INVALID = 0, ARM_MB_RESERVED_0, ARM_MB_OSHLD, ARM_MB_OSHST, ARM_MB_OSH, ARM_MB_RESERVED_4, ARM_MB_NSHLD, ARM_MB_NSHST, ARM_MB_NSH, ARM_MB_RESERVED_8, ARM_MB_ISHLD, ARM_MB_ISHST, ARM_MB_ISH, ARM_MB_RESERVED_12, ARM_MB_LD, ARM_MB_ST, ARM_MB_SY, } arm_mem_barrier; /// Operand type for instruction's operands typedef enum arm_op_type { ARM_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). ARM_OP_REG, ///< = CS_OP_REG (Register operand). ARM_OP_IMM, ///< = CS_OP_IMM (Immediate operand). ARM_OP_MEM, ///< = CS_OP_MEM (Memory operand). ARM_OP_FP, ///< = CS_OP_FP (Floating-Point operand). ARM_OP_CIMM = 64, ///< C-Immediate (coprocessor registers) ARM_OP_PIMM, ///< P-Immediate (coprocessor registers) ARM_OP_SETEND, ///< operand for SETEND instruction ARM_OP_SYSREG, ///< MSR/MRS special register operand } arm_op_type; /// Operand type for SETEND instruction typedef enum arm_setend_type { ARM_SETEND_INVALID = 0, ///< Uninitialized. ARM_SETEND_BE, ///< BE operand. ARM_SETEND_LE, ///< LE operand } arm_setend_type; typedef enum arm_cpsmode_type { ARM_CPSMODE_INVALID = 0, ARM_CPSMODE_IE = 2, ARM_CPSMODE_ID = 3 } arm_cpsmode_type; /// Operand type for SETEND instruction typedef enum arm_cpsflag_type { ARM_CPSFLAG_INVALID = 0, ARM_CPSFLAG_F = 1, ARM_CPSFLAG_I = 2, ARM_CPSFLAG_A = 4, ARM_CPSFLAG_NONE = 16, ///< no flag } arm_cpsflag_type; /// Data type for elements of vector instructions. typedef enum arm_vectordata_type { ARM_VECTORDATA_INVALID = 0, // Integer type ARM_VECTORDATA_I8, ARM_VECTORDATA_I16, ARM_VECTORDATA_I32, ARM_VECTORDATA_I64, // Signed integer type ARM_VECTORDATA_S8, ARM_VECTORDATA_S16, ARM_VECTORDATA_S32, ARM_VECTORDATA_S64, // Unsigned integer type ARM_VECTORDATA_U8, ARM_VECTORDATA_U16, ARM_VECTORDATA_U32, ARM_VECTORDATA_U64, // Data type for VMUL/VMULL ARM_VECTORDATA_P8, // Floating type ARM_VECTORDATA_F32, ARM_VECTORDATA_F64, // Convert float <-> float ARM_VECTORDATA_F16F64, // f16.f64 ARM_VECTORDATA_F64F16, // f64.f16 ARM_VECTORDATA_F32F16, // f32.f16 ARM_VECTORDATA_F16F32, // f32.f16 ARM_VECTORDATA_F64F32, // f64.f32 ARM_VECTORDATA_F32F64, // f32.f64 // Convert integer <-> float ARM_VECTORDATA_S32F32, // s32.f32 ARM_VECTORDATA_U32F32, // u32.f32 ARM_VECTORDATA_F32S32, // f32.s32 ARM_VECTORDATA_F32U32, // f32.u32 ARM_VECTORDATA_F64S16, // f64.s16 ARM_VECTORDATA_F32S16, // f32.s16 ARM_VECTORDATA_F64S32, // f64.s32 ARM_VECTORDATA_S16F64, // s16.f64 ARM_VECTORDATA_S16F32, // s16.f64 ARM_VECTORDATA_S32F64, // s32.f64 ARM_VECTORDATA_U16F64, // u16.f64 ARM_VECTORDATA_U16F32, // u16.f32 ARM_VECTORDATA_U32F64, // u32.f64 ARM_VECTORDATA_F64U16, // f64.u16 ARM_VECTORDATA_F32U16, // f32.u16 ARM_VECTORDATA_F64U32, // f64.u32 } arm_vectordata_type; /// ARM registers typedef enum arm_reg { ARM_REG_INVALID = 0, ARM_REG_APSR, ARM_REG_APSR_NZCV, ARM_REG_CPSR, ARM_REG_FPEXC, ARM_REG_FPINST, ARM_REG_FPSCR, ARM_REG_FPSCR_NZCV, ARM_REG_FPSID, ARM_REG_ITSTATE, ARM_REG_LR, ARM_REG_PC, ARM_REG_SP, ARM_REG_SPSR, ARM_REG_D0, ARM_REG_D1, ARM_REG_D2, ARM_REG_D3, ARM_REG_D4, ARM_REG_D5, ARM_REG_D6, ARM_REG_D7, ARM_REG_D8, ARM_REG_D9, ARM_REG_D10, ARM_REG_D11, ARM_REG_D12, ARM_REG_D13, ARM_REG_D14, ARM_REG_D15, ARM_REG_D16, ARM_REG_D17, ARM_REG_D18, ARM_REG_D19, ARM_REG_D20, ARM_REG_D21, ARM_REG_D22, ARM_REG_D23, ARM_REG_D24, ARM_REG_D25, ARM_REG_D26, ARM_REG_D27, ARM_REG_D28, ARM_REG_D29, ARM_REG_D30, ARM_REG_D31, ARM_REG_FPINST2, ARM_REG_MVFR0, ARM_REG_MVFR1, ARM_REG_MVFR2, ARM_REG_Q0, ARM_REG_Q1, ARM_REG_Q2, ARM_REG_Q3, ARM_REG_Q4, ARM_REG_Q5, ARM_REG_Q6, ARM_REG_Q7, ARM_REG_Q8, ARM_REG_Q9, ARM_REG_Q10, ARM_REG_Q11, ARM_REG_Q12, ARM_REG_Q13, ARM_REG_Q14, ARM_REG_Q15, ARM_REG_R0, ARM_REG_R1, ARM_REG_R2, ARM_REG_R3, ARM_REG_R4, ARM_REG_R5, ARM_REG_R6, ARM_REG_R7, ARM_REG_R8, ARM_REG_R9, ARM_REG_R10, ARM_REG_R11, ARM_REG_R12, ARM_REG_S0, ARM_REG_S1, ARM_REG_S2, ARM_REG_S3, ARM_REG_S4, ARM_REG_S5, ARM_REG_S6, ARM_REG_S7, ARM_REG_S8, ARM_REG_S9, ARM_REG_S10, ARM_REG_S11, ARM_REG_S12, ARM_REG_S13, ARM_REG_S14, ARM_REG_S15, ARM_REG_S16, ARM_REG_S17, ARM_REG_S18, ARM_REG_S19, ARM_REG_S20, ARM_REG_S21, ARM_REG_S22, ARM_REG_S23, ARM_REG_S24, ARM_REG_S25, ARM_REG_S26, ARM_REG_S27, ARM_REG_S28, ARM_REG_S29, ARM_REG_S30, ARM_REG_S31, ARM_REG_ENDING, // <-- mark the end of the list or registers // alias registers ARM_REG_R13 = ARM_REG_SP, ARM_REG_R14 = ARM_REG_LR, ARM_REG_R15 = ARM_REG_PC, ARM_REG_SB = ARM_REG_R9, ARM_REG_SL = ARM_REG_R10, ARM_REG_FP = ARM_REG_R11, ARM_REG_IP = ARM_REG_R12, } arm_reg; /// Instruction's operand referring to memory /// This is associated with ARM_OP_MEM operand type above typedef struct arm_op_mem { arm_reg base; ///< base register arm_reg index; ///< index register int scale; ///< scale for index register (can be 1, or -1) int disp; ///< displacement/offset value /// left-shift on index register, or 0 if irrelevant /// NOTE: this value can also be fetched via operand.shift.value int lshift; } arm_op_mem; /// Instruction operand typedef struct cs_arm_op { int vector_index; ///< Vector Index for some vector operands (or -1 if irrelevant) struct { arm_shifter type; unsigned int value; } shift; arm_op_type type; ///< operand type union { int reg; ///< register value for REG/SYSREG operand int32_t imm; ///< immediate value for C-IMM, P-IMM or IMM operand double fp; ///< floating point value for FP operand arm_op_mem mem; ///< base/index/scale/disp value for MEM operand arm_setend_type setend; ///< SETEND instruction's operand type }; /// in some instructions, an operand can be subtracted or added to /// the base register, /// if TRUE, this operand is subtracted. otherwise, it is added. bool subtracted; /// How is this operand accessed? (READ, WRITE or READ|WRITE) /// This field is combined of cs_ac_type. /// NOTE: this field is irrelevant if engine is compiled in DIET mode. uint8_t access; /// Neon lane index for NEON instructions (or -1 if irrelevant) int8_t neon_lane; } cs_arm_op; /// Instruction structure typedef struct cs_arm { bool usermode; ///< User-mode registers to be loaded (for LDM/STM instructions) int vector_size; ///< Scalar size for vector instructions arm_vectordata_type vector_data; ///< Data type for elements of vector instructions arm_cpsmode_type cps_mode; ///< CPS mode for CPS instruction arm_cpsflag_type cps_flag; ///< CPS mode for CPS instruction arm_cc cc; ///< conditional code for this insn bool update_flags; ///< does this insn update flags? bool writeback; ///< does this insn write-back? arm_mem_barrier mem_barrier; ///< Option for some memory barrier instructions /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_arm_op operands[36]; ///< operands for this instruction. } cs_arm; /// ARM instruction typedef enum arm_insn { ARM_INS_INVALID = 0, ARM_INS_ADC, ARM_INS_ADD, ARM_INS_ADR, ARM_INS_AESD, ARM_INS_AESE, ARM_INS_AESIMC, ARM_INS_AESMC, ARM_INS_AND, ARM_INS_BFC, ARM_INS_BFI, ARM_INS_BIC, ARM_INS_BKPT, ARM_INS_BL, ARM_INS_BLX, ARM_INS_BX, ARM_INS_BXJ, ARM_INS_B, ARM_INS_CDP, ARM_INS_CDP2, ARM_INS_CLREX, ARM_INS_CLZ, ARM_INS_CMN, ARM_INS_CMP, ARM_INS_CPS, ARM_INS_CRC32B, ARM_INS_CRC32CB, ARM_INS_CRC32CH, ARM_INS_CRC32CW, ARM_INS_CRC32H, ARM_INS_CRC32W, ARM_INS_DBG, ARM_INS_DMB, ARM_INS_DSB, ARM_INS_EOR, ARM_INS_ERET, ARM_INS_VMOV, ARM_INS_FLDMDBX, ARM_INS_FLDMIAX, ARM_INS_VMRS, ARM_INS_FSTMDBX, ARM_INS_FSTMIAX, ARM_INS_HINT, ARM_INS_HLT, ARM_INS_HVC, ARM_INS_ISB, ARM_INS_LDA, ARM_INS_LDAB, ARM_INS_LDAEX, ARM_INS_LDAEXB, ARM_INS_LDAEXD, ARM_INS_LDAEXH, ARM_INS_LDAH, ARM_INS_LDC2L, ARM_INS_LDC2, ARM_INS_LDCL, ARM_INS_LDC, ARM_INS_LDMDA, ARM_INS_LDMDB, ARM_INS_LDM, ARM_INS_LDMIB, ARM_INS_LDRBT, ARM_INS_LDRB, ARM_INS_LDRD, ARM_INS_LDREX, ARM_INS_LDREXB, ARM_INS_LDREXD, ARM_INS_LDREXH, ARM_INS_LDRH, ARM_INS_LDRHT, ARM_INS_LDRSB, ARM_INS_LDRSBT, ARM_INS_LDRSH, ARM_INS_LDRSHT, ARM_INS_LDRT, ARM_INS_LDR, ARM_INS_MCR, ARM_INS_MCR2, ARM_INS_MCRR, ARM_INS_MCRR2, ARM_INS_MLA, ARM_INS_MLS, ARM_INS_MOV, ARM_INS_MOVT, ARM_INS_MOVW, ARM_INS_MRC, ARM_INS_MRC2, ARM_INS_MRRC, ARM_INS_MRRC2, ARM_INS_MRS, ARM_INS_MSR, ARM_INS_MUL, ARM_INS_MVN, ARM_INS_ORR, ARM_INS_PKHBT, ARM_INS_PKHTB, ARM_INS_PLDW, ARM_INS_PLD, ARM_INS_PLI, ARM_INS_QADD, ARM_INS_QADD16, ARM_INS_QADD8, ARM_INS_QASX, ARM_INS_QDADD, ARM_INS_QDSUB, ARM_INS_QSAX, ARM_INS_QSUB, ARM_INS_QSUB16, ARM_INS_QSUB8, ARM_INS_RBIT, ARM_INS_REV, ARM_INS_REV16, ARM_INS_REVSH, ARM_INS_RFEDA, ARM_INS_RFEDB, ARM_INS_RFEIA, ARM_INS_RFEIB, ARM_INS_RSB, ARM_INS_RSC, ARM_INS_SADD16, ARM_INS_SADD8, ARM_INS_SASX, ARM_INS_SBC, ARM_INS_SBFX, ARM_INS_SDIV, ARM_INS_SEL, ARM_INS_SETEND, ARM_INS_SHA1C, ARM_INS_SHA1H, ARM_INS_SHA1M, ARM_INS_SHA1P, ARM_INS_SHA1SU0, ARM_INS_SHA1SU1, ARM_INS_SHA256H, ARM_INS_SHA256H2, ARM_INS_SHA256SU0, ARM_INS_SHA256SU1, ARM_INS_SHADD16, ARM_INS_SHADD8, ARM_INS_SHASX, ARM_INS_SHSAX, ARM_INS_SHSUB16, ARM_INS_SHSUB8, ARM_INS_SMC, ARM_INS_SMLABB, ARM_INS_SMLABT, ARM_INS_SMLAD, ARM_INS_SMLADX, ARM_INS_SMLAL, ARM_INS_SMLALBB, ARM_INS_SMLALBT, ARM_INS_SMLALD, ARM_INS_SMLALDX, ARM_INS_SMLALTB, ARM_INS_SMLALTT, ARM_INS_SMLATB, ARM_INS_SMLATT, ARM_INS_SMLAWB, ARM_INS_SMLAWT, ARM_INS_SMLSD, ARM_INS_SMLSDX, ARM_INS_SMLSLD, ARM_INS_SMLSLDX, ARM_INS_SMMLA, ARM_INS_SMMLAR, ARM_INS_SMMLS, ARM_INS_SMMLSR, ARM_INS_SMMUL, ARM_INS_SMMULR, ARM_INS_SMUAD, ARM_INS_SMUADX, ARM_INS_SMULBB, ARM_INS_SMULBT, ARM_INS_SMULL, ARM_INS_SMULTB, ARM_INS_SMULTT, ARM_INS_SMULWB, ARM_INS_SMULWT, ARM_INS_SMUSD, ARM_INS_SMUSDX, ARM_INS_SRSDA, ARM_INS_SRSDB, ARM_INS_SRSIA, ARM_INS_SRSIB, ARM_INS_SSAT, ARM_INS_SSAT16, ARM_INS_SSAX, ARM_INS_SSUB16, ARM_INS_SSUB8, ARM_INS_STC2L, ARM_INS_STC2, ARM_INS_STCL, ARM_INS_STC, ARM_INS_STL, ARM_INS_STLB, ARM_INS_STLEX, ARM_INS_STLEXB, ARM_INS_STLEXD, ARM_INS_STLEXH, ARM_INS_STLH, ARM_INS_STMDA, ARM_INS_STMDB, ARM_INS_STM, ARM_INS_STMIB, ARM_INS_STRBT, ARM_INS_STRB, ARM_INS_STRD, ARM_INS_STREX, ARM_INS_STREXB, ARM_INS_STREXD, ARM_INS_STREXH, ARM_INS_STRH, ARM_INS_STRHT, ARM_INS_STRT, ARM_INS_STR, ARM_INS_SUB, ARM_INS_SVC, ARM_INS_SWP, ARM_INS_SWPB, ARM_INS_SXTAB, ARM_INS_SXTAB16, ARM_INS_SXTAH, ARM_INS_SXTB, ARM_INS_SXTB16, ARM_INS_SXTH, ARM_INS_TEQ, ARM_INS_TRAP, ARM_INS_TST, ARM_INS_UADD16, ARM_INS_UADD8, ARM_INS_UASX, ARM_INS_UBFX, ARM_INS_UDF, ARM_INS_UDIV, ARM_INS_UHADD16, ARM_INS_UHADD8, ARM_INS_UHASX, ARM_INS_UHSAX, ARM_INS_UHSUB16, ARM_INS_UHSUB8, ARM_INS_UMAAL, ARM_INS_UMLAL, ARM_INS_UMULL, ARM_INS_UQADD16, ARM_INS_UQADD8, ARM_INS_UQASX, ARM_INS_UQSAX, ARM_INS_UQSUB16, ARM_INS_UQSUB8, ARM_INS_USAD8, ARM_INS_USADA8, ARM_INS_USAT, ARM_INS_USAT16, ARM_INS_USAX, ARM_INS_USUB16, ARM_INS_USUB8, ARM_INS_UXTAB, ARM_INS_UXTAB16, ARM_INS_UXTAH, ARM_INS_UXTB, ARM_INS_UXTB16, ARM_INS_UXTH, ARM_INS_VABAL, ARM_INS_VABA, ARM_INS_VABDL, ARM_INS_VABD, ARM_INS_VABS, ARM_INS_VACGE, ARM_INS_VACGT, ARM_INS_VADD, ARM_INS_VADDHN, ARM_INS_VADDL, ARM_INS_VADDW, ARM_INS_VAND, ARM_INS_VBIC, ARM_INS_VBIF, ARM_INS_VBIT, ARM_INS_VBSL, ARM_INS_VCEQ, ARM_INS_VCGE, ARM_INS_VCGT, ARM_INS_VCLE, ARM_INS_VCLS, ARM_INS_VCLT, ARM_INS_VCLZ, ARM_INS_VCMP, ARM_INS_VCMPE, ARM_INS_VCNT, ARM_INS_VCVTA, ARM_INS_VCVTB, ARM_INS_VCVT, ARM_INS_VCVTM, ARM_INS_VCVTN, ARM_INS_VCVTP, ARM_INS_VCVTT, ARM_INS_VDIV, ARM_INS_VDUP, ARM_INS_VEOR, ARM_INS_VEXT, ARM_INS_VFMA, ARM_INS_VFMS, ARM_INS_VFNMA, ARM_INS_VFNMS, ARM_INS_VHADD, ARM_INS_VHSUB, ARM_INS_VLD1, ARM_INS_VLD2, ARM_INS_VLD3, ARM_INS_VLD4, ARM_INS_VLDMDB, ARM_INS_VLDMIA, ARM_INS_VLDR, ARM_INS_VMAXNM, ARM_INS_VMAX, ARM_INS_VMINNM, ARM_INS_VMIN, ARM_INS_VMLA, ARM_INS_VMLAL, ARM_INS_VMLS, ARM_INS_VMLSL, ARM_INS_VMOVL, ARM_INS_VMOVN, ARM_INS_VMSR, ARM_INS_VMUL, ARM_INS_VMULL, ARM_INS_VMVN, ARM_INS_VNEG, ARM_INS_VNMLA, ARM_INS_VNMLS, ARM_INS_VNMUL, ARM_INS_VORN, ARM_INS_VORR, ARM_INS_VPADAL, ARM_INS_VPADDL, ARM_INS_VPADD, ARM_INS_VPMAX, ARM_INS_VPMIN, ARM_INS_VQABS, ARM_INS_VQADD, ARM_INS_VQDMLAL, ARM_INS_VQDMLSL, ARM_INS_VQDMULH, ARM_INS_VQDMULL, ARM_INS_VQMOVUN, ARM_INS_VQMOVN, ARM_INS_VQNEG, ARM_INS_VQRDMULH, ARM_INS_VQRSHL, ARM_INS_VQRSHRN, ARM_INS_VQRSHRUN, ARM_INS_VQSHL, ARM_INS_VQSHLU, ARM_INS_VQSHRN, ARM_INS_VQSHRUN, ARM_INS_VQSUB, ARM_INS_VRADDHN, ARM_INS_VRECPE, ARM_INS_VRECPS, ARM_INS_VREV16, ARM_INS_VREV32, ARM_INS_VREV64, ARM_INS_VRHADD, ARM_INS_VRINTA, ARM_INS_VRINTM, ARM_INS_VRINTN, ARM_INS_VRINTP, ARM_INS_VRINTR, ARM_INS_VRINTX, ARM_INS_VRINTZ, ARM_INS_VRSHL, ARM_INS_VRSHRN, ARM_INS_VRSHR, ARM_INS_VRSQRTE, ARM_INS_VRSQRTS, ARM_INS_VRSRA, ARM_INS_VRSUBHN, ARM_INS_VSELEQ, ARM_INS_VSELGE, ARM_INS_VSELGT, ARM_INS_VSELVS, ARM_INS_VSHLL, ARM_INS_VSHL, ARM_INS_VSHRN, ARM_INS_VSHR, ARM_INS_VSLI, ARM_INS_VSQRT, ARM_INS_VSRA, ARM_INS_VSRI, ARM_INS_VST1, ARM_INS_VST2, ARM_INS_VST3, ARM_INS_VST4, ARM_INS_VSTMDB, ARM_INS_VSTMIA, ARM_INS_VSTR, ARM_INS_VSUB, ARM_INS_VSUBHN, ARM_INS_VSUBL, ARM_INS_VSUBW, ARM_INS_VSWP, ARM_INS_VTBL, ARM_INS_VTBX, ARM_INS_VCVTR, ARM_INS_VTRN, ARM_INS_VTST, ARM_INS_VUZP, ARM_INS_VZIP, ARM_INS_ADDW, ARM_INS_ASR, ARM_INS_DCPS1, ARM_INS_DCPS2, ARM_INS_DCPS3, ARM_INS_IT, ARM_INS_LSL, ARM_INS_LSR, ARM_INS_ORN, ARM_INS_ROR, ARM_INS_RRX, ARM_INS_SUBW, ARM_INS_TBB, ARM_INS_TBH, ARM_INS_CBNZ, ARM_INS_CBZ, ARM_INS_POP, ARM_INS_PUSH, // special instructions ARM_INS_NOP, ARM_INS_YIELD, ARM_INS_WFE, ARM_INS_WFI, ARM_INS_SEV, ARM_INS_SEVL, ARM_INS_VPUSH, ARM_INS_VPOP, ARM_INS_ENDING, // <-- mark the end of the list of instructions } arm_insn; /// Group of ARM instructions typedef enum arm_insn_group { ARM_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) ARM_GRP_JUMP, ///< = CS_GRP_JUMP ARM_GRP_CALL, ///< = CS_GRP_CALL ARM_GRP_INT = 4, ///< = CS_GRP_INT ARM_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE ARM_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE // Architecture-specific groups ARM_GRP_CRYPTO = 128, ARM_GRP_DATABARRIER, ARM_GRP_DIVIDE, ARM_GRP_FPARMV8, ARM_GRP_MULTPRO, ARM_GRP_NEON, ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2DSP, ARM_GRP_TRUSTZONE, ARM_GRP_V4T, ARM_GRP_V5T, ARM_GRP_V5TE, ARM_GRP_V6, ARM_GRP_V6T2, ARM_GRP_V7, ARM_GRP_V8, ARM_GRP_VFP2, ARM_GRP_VFP3, ARM_GRP_VFP4, ARM_GRP_ARM, ARM_GRP_MCLASS, ARM_GRP_NOTMCLASS, ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_THUMB2, ARM_GRP_PREV8, ARM_GRP_FPVMLX, ARM_GRP_MULOPS, ARM_GRP_CRC, ARM_GRP_DPVFP, ARM_GRP_V6M, ARM_GRP_VIRTUALIZATION, ARM_GRP_ENDING, } arm_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/arm64.h010066400017500001750000000675761363402546700206600ustar0000000000000000#ifndef CAPSTONE_ARM64_H #define CAPSTONE_ARM64_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// ARM64 shift type typedef enum arm64_shifter { ARM64_SFT_INVALID = 0, ARM64_SFT_LSL = 1, ARM64_SFT_MSL = 2, ARM64_SFT_LSR = 3, ARM64_SFT_ASR = 4, ARM64_SFT_ROR = 5, } arm64_shifter; /// ARM64 extender type typedef enum arm64_extender { ARM64_EXT_INVALID = 0, ARM64_EXT_UXTB = 1, ARM64_EXT_UXTH = 2, ARM64_EXT_UXTW = 3, ARM64_EXT_UXTX = 4, ARM64_EXT_SXTB = 5, ARM64_EXT_SXTH = 6, ARM64_EXT_SXTW = 7, ARM64_EXT_SXTX = 8, } arm64_extender; /// ARM64 condition code typedef enum arm64_cc { ARM64_CC_INVALID = 0, ARM64_CC_EQ = 1, ///< Equal ARM64_CC_NE = 2, ///< Not equal: Not equal, or unordered ARM64_CC_HS = 3, ///< Unsigned higher or same: >, ==, or unordered ARM64_CC_LO = 4, ///< Unsigned lower or same: Less than ARM64_CC_MI = 5, ///< Minus, negative: Less than ARM64_CC_PL = 6, ///< Plus, positive or zero: >, ==, or unordered ARM64_CC_VS = 7, ///< Overflow: Unordered ARM64_CC_VC = 8, ///< No overflow: Ordered ARM64_CC_HI = 9, ///< Unsigned higher: Greater than, or unordered ARM64_CC_LS = 10, ///< Unsigned lower or same: Less than or equal ARM64_CC_GE = 11, ///< Greater than or equal: Greater than or equal ARM64_CC_LT = 12, ///< Less than: Less than, or unordered ARM64_CC_GT = 13, ///< Signed greater than: Greater than ARM64_CC_LE = 14, ///< Signed less than or equal: <, ==, or unordered ARM64_CC_AL = 15, ///< Always (unconditional): Always (unconditional) ARM64_CC_NV = 16, ///< Always (unconditional): Always (unconditional) //< Note the NV exists purely to disassemble 0b1111. Execution //< is "always". } arm64_cc; /// System registers typedef enum arm64_sysreg { // System registers for MRS ARM64_SYSREG_INVALID = 0, ARM64_SYSREG_MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000 ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828, // 10 011 0000 0101 000 ARM64_SYSREG_MDRAR_EL1 = 0x8080, // 10 000 0001 0000 000 ARM64_SYSREG_OSLSR_EL1 = 0x808c, // 10 000 0001 0001 100 ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83f6, // 10 000 0111 1110 110 ARM64_SYSREG_PMCEID0_EL0 = 0xdce6, // 11 011 1001 1100 110 ARM64_SYSREG_PMCEID1_EL0 = 0xdce7, // 11 011 1001 1100 111 ARM64_SYSREG_MIDR_EL1 = 0xc000, // 11 000 0000 0000 000 ARM64_SYSREG_CCSIDR_EL1 = 0xc800, // 11 001 0000 0000 000 ARM64_SYSREG_CLIDR_EL1 = 0xc801, // 11 001 0000 0000 001 ARM64_SYSREG_CTR_EL0 = 0xd801, // 11 011 0000 0000 001 ARM64_SYSREG_MPIDR_EL1 = 0xc005, // 11 000 0000 0000 101 ARM64_SYSREG_REVIDR_EL1 = 0xc006, // 11 000 0000 0000 110 ARM64_SYSREG_AIDR_EL1 = 0xc807, // 11 001 0000 0000 111 ARM64_SYSREG_DCZID_EL0 = 0xd807, // 11 011 0000 0000 111 ARM64_SYSREG_ID_PFR0_EL1 = 0xc008, // 11 000 0000 0001 000 ARM64_SYSREG_ID_PFR1_EL1 = 0xc009, // 11 000 0000 0001 001 ARM64_SYSREG_ID_DFR0_EL1 = 0xc00a, // 11 000 0000 0001 010 ARM64_SYSREG_ID_AFR0_EL1 = 0xc00b, // 11 000 0000 0001 011 ARM64_SYSREG_ID_MMFR0_EL1 = 0xc00c, // 11 000 0000 0001 100 ARM64_SYSREG_ID_MMFR1_EL1 = 0xc00d, // 11 000 0000 0001 101 ARM64_SYSREG_ID_MMFR2_EL1 = 0xc00e, // 11 000 0000 0001 110 ARM64_SYSREG_ID_MMFR3_EL1 = 0xc00f, // 11 000 0000 0001 111 ARM64_SYSREG_ID_ISAR0_EL1 = 0xc010, // 11 000 0000 0010 000 ARM64_SYSREG_ID_ISAR1_EL1 = 0xc011, // 11 000 0000 0010 001 ARM64_SYSREG_ID_ISAR2_EL1 = 0xc012, // 11 000 0000 0010 010 ARM64_SYSREG_ID_ISAR3_EL1 = 0xc013, // 11 000 0000 0010 011 ARM64_SYSREG_ID_ISAR4_EL1 = 0xc014, // 11 000 0000 0010 100 ARM64_SYSREG_ID_ISAR5_EL1 = 0xc015, // 11 000 0000 0010 101 ARM64_SYSREG_ID_A64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000 ARM64_SYSREG_ID_A64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001 ARM64_SYSREG_ID_A64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000 ARM64_SYSREG_ID_A64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001 ARM64_SYSREG_ID_A64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100 ARM64_SYSREG_ID_A64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101 ARM64_SYSREG_ID_A64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000 ARM64_SYSREG_ID_A64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001 ARM64_SYSREG_ID_A64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000 ARM64_SYSREG_ID_A64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001 ARM64_SYSREG_MVFR0_EL1 = 0xc018, // 11 000 0000 0011 000 ARM64_SYSREG_MVFR1_EL1 = 0xc019, // 11 000 0000 0011 001 ARM64_SYSREG_MVFR2_EL1 = 0xc01a, // 11 000 0000 0011 010 ARM64_SYSREG_RVBAR_EL1 = 0xc601, // 11 000 1100 0000 001 ARM64_SYSREG_RVBAR_EL2 = 0xe601, // 11 100 1100 0000 001 ARM64_SYSREG_RVBAR_EL3 = 0xf601, // 11 110 1100 0000 001 ARM64_SYSREG_ISR_EL1 = 0xc608, // 11 000 1100 0001 000 ARM64_SYSREG_CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 ARM64_SYSREG_CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 // Trace registers ARM64_SYSREG_TRCSTATR = 0x8818, // 10 001 0000 0011 000 ARM64_SYSREG_TRCIDR8 = 0x8806, // 10 001 0000 0000 110 ARM64_SYSREG_TRCIDR9 = 0x880e, // 10 001 0000 0001 110 ARM64_SYSREG_TRCIDR10 = 0x8816, // 10 001 0000 0010 110 ARM64_SYSREG_TRCIDR11 = 0x881e, // 10 001 0000 0011 110 ARM64_SYSREG_TRCIDR12 = 0x8826, // 10 001 0000 0100 110 ARM64_SYSREG_TRCIDR13 = 0x882e, // 10 001 0000 0101 110 ARM64_SYSREG_TRCIDR0 = 0x8847, // 10 001 0000 1000 111 ARM64_SYSREG_TRCIDR1 = 0x884f, // 10 001 0000 1001 111 ARM64_SYSREG_TRCIDR2 = 0x8857, // 10 001 0000 1010 111 ARM64_SYSREG_TRCIDR3 = 0x885f, // 10 001 0000 1011 111 ARM64_SYSREG_TRCIDR4 = 0x8867, // 10 001 0000 1100 111 ARM64_SYSREG_TRCIDR5 = 0x886f, // 10 001 0000 1101 111 ARM64_SYSREG_TRCIDR6 = 0x8877, // 10 001 0000 1110 111 ARM64_SYSREG_TRCIDR7 = 0x887f, // 10 001 0000 1111 111 ARM64_SYSREG_TRCOSLSR = 0x888c, // 10 001 0001 0001 100 ARM64_SYSREG_TRCPDSR = 0x88ac, // 10 001 0001 0101 100 ARM64_SYSREG_TRCDEVAFF0 = 0x8bd6, // 10 001 0111 1010 110 ARM64_SYSREG_TRCDEVAFF1 = 0x8bde, // 10 001 0111 1011 110 ARM64_SYSREG_TRCLSR = 0x8bee, // 10 001 0111 1101 110 ARM64_SYSREG_TRCAUTHSTATUS = 0x8bf6, // 10 001 0111 1110 110 ARM64_SYSREG_TRCDEVARCH = 0x8bfe, // 10 001 0111 1111 110 ARM64_SYSREG_TRCDEVID = 0x8b97, // 10 001 0111 0010 111 ARM64_SYSREG_TRCDEVTYPE = 0x8b9f, // 10 001 0111 0011 111 ARM64_SYSREG_TRCPIDR4 = 0x8ba7, // 10 001 0111 0100 111 ARM64_SYSREG_TRCPIDR5 = 0x8baf, // 10 001 0111 0101 111 ARM64_SYSREG_TRCPIDR6 = 0x8bb7, // 10 001 0111 0110 111 ARM64_SYSREG_TRCPIDR7 = 0x8bbf, // 10 001 0111 0111 111 ARM64_SYSREG_TRCPIDR0 = 0x8bc7, // 10 001 0111 1000 111 ARM64_SYSREG_TRCPIDR1 = 0x8bcf, // 10 001 0111 1001 111 ARM64_SYSREG_TRCPIDR2 = 0x8bd7, // 10 001 0111 1010 111 ARM64_SYSREG_TRCPIDR3 = 0x8bdf, // 10 001 0111 1011 111 ARM64_SYSREG_TRCCIDR0 = 0x8be7, // 10 001 0111 1100 111 ARM64_SYSREG_TRCCIDR1 = 0x8bef, // 10 001 0111 1101 111 ARM64_SYSREG_TRCCIDR2 = 0x8bf7, // 10 001 0111 1110 111 ARM64_SYSREG_TRCCIDR3 = 0x8bff, // 10 001 0111 1111 111 // GICv3 registers ARM64_SYSREG_ICC_IAR1_EL1 = 0xc660, // 11 000 1100 1100 000 ARM64_SYSREG_ICC_IAR0_EL1 = 0xc640, // 11 000 1100 1000 000 ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xc662, // 11 000 1100 1100 010 ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xc642, // 11 000 1100 1000 010 ARM64_SYSREG_ICC_RPR_EL1 = 0xc65b, // 11 000 1100 1011 011 ARM64_SYSREG_ICH_VTR_EL2 = 0xe659, // 11 100 1100 1011 001 ARM64_SYSREG_ICH_EISR_EL2 = 0xe65b, // 11 100 1100 1011 011 ARM64_SYSREG_ICH_ELSR_EL2 = 0xe65d, // 11 100 1100 1011 101 } arm64_sysreg; typedef enum arm64_msr_reg { // System registers for MSR ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828, // 10 011 0000 0101 000 ARM64_SYSREG_OSLAR_EL1 = 0x8084, // 10 000 0001 0000 100 ARM64_SYSREG_PMSWINC_EL0 = 0xdce4, // 11 011 1001 1100 100 // Trace Registers ARM64_SYSREG_TRCOSLAR = 0x8884, // 10 001 0001 0000 100 ARM64_SYSREG_TRCLAR = 0x8be6, // 10 001 0111 1100 110 // GICv3 registers ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661, // 11 000 1100 1100 001 ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641, // 11 000 1100 1000 001 ARM64_SYSREG_ICC_DIR_EL1 = 0xc659, // 11 000 1100 1011 001 ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d, // 11 000 1100 1011 101 ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e, // 11 000 1100 1011 110 ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f, // 11 000 1100 1011 111 } arm64_msr_reg; /// System PState Field (MSR instruction) typedef enum arm64_pstate { ARM64_PSTATE_INVALID = 0, ARM64_PSTATE_SPSEL = 0x05, ARM64_PSTATE_DAIFSET = 0x1e, ARM64_PSTATE_DAIFCLR = 0x1f } arm64_pstate; /// Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn) typedef enum arm64_vas { ARM64_VAS_INVALID = 0, ARM64_VAS_8B, ARM64_VAS_16B, ARM64_VAS_4H, ARM64_VAS_8H, ARM64_VAS_2S, ARM64_VAS_4S, ARM64_VAS_1D, ARM64_VAS_2D, ARM64_VAS_1Q, } arm64_vas; /// Vector element size specifier typedef enum arm64_vess { ARM64_VESS_INVALID = 0, ARM64_VESS_B, ARM64_VESS_H, ARM64_VESS_S, ARM64_VESS_D, } arm64_vess; /// Memory barrier operands typedef enum arm64_barrier_op { ARM64_BARRIER_INVALID = 0, ARM64_BARRIER_OSHLD = 0x1, ARM64_BARRIER_OSHST = 0x2, ARM64_BARRIER_OSH = 0x3, ARM64_BARRIER_NSHLD = 0x5, ARM64_BARRIER_NSHST = 0x6, ARM64_BARRIER_NSH = 0x7, ARM64_BARRIER_ISHLD = 0x9, ARM64_BARRIER_ISHST = 0xa, ARM64_BARRIER_ISH = 0xb, ARM64_BARRIER_LD = 0xd, ARM64_BARRIER_ST = 0xe, ARM64_BARRIER_SY = 0xf } arm64_barrier_op; /// Operand type for instruction's operands typedef enum arm64_op_type { ARM64_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). ARM64_OP_REG, ///< = CS_OP_REG (Register operand). ARM64_OP_IMM, ///< = CS_OP_IMM (Immediate operand). ARM64_OP_MEM, ///< = CS_OP_MEM (Memory operand). ARM64_OP_FP, ///< = CS_OP_FP (Floating-Point operand). ARM64_OP_CIMM = 64, ///< C-Immediate ARM64_OP_REG_MRS, ///< MRS register operand. ARM64_OP_REG_MSR, ///< MSR register operand. ARM64_OP_PSTATE, ///< PState operand. ARM64_OP_SYS, ///< SYS operand for IC/DC/AT/TLBI instructions. ARM64_OP_PREFETCH, ///< Prefetch operand (PRFM). ARM64_OP_BARRIER, ///< Memory barrier operand (ISB/DMB/DSB instructions). } arm64_op_type; /// TLBI operations typedef enum arm64_tlbi_op { ARM64_TLBI_INVALID = 0, ARM64_TLBI_VMALLE1IS, ARM64_TLBI_VAE1IS, ARM64_TLBI_ASIDE1IS, ARM64_TLBI_VAAE1IS, ARM64_TLBI_VALE1IS, ARM64_TLBI_VAALE1IS, ARM64_TLBI_ALLE2IS, ARM64_TLBI_VAE2IS, ARM64_TLBI_ALLE1IS, ARM64_TLBI_VALE2IS, ARM64_TLBI_VMALLS12E1IS, ARM64_TLBI_ALLE3IS, ARM64_TLBI_VAE3IS, ARM64_TLBI_VALE3IS, ARM64_TLBI_IPAS2E1IS, ARM64_TLBI_IPAS2LE1IS, ARM64_TLBI_IPAS2E1, ARM64_TLBI_IPAS2LE1, ARM64_TLBI_VMALLE1, ARM64_TLBI_VAE1, ARM64_TLBI_ASIDE1, ARM64_TLBI_VAAE1, ARM64_TLBI_VALE1, ARM64_TLBI_VAALE1, ARM64_TLBI_ALLE2, ARM64_TLBI_VAE2, ARM64_TLBI_ALLE1, ARM64_TLBI_VALE2, ARM64_TLBI_VMALLS12E1, ARM64_TLBI_ALLE3, ARM64_TLBI_VAE3, ARM64_TLBI_VALE3, } arm64_tlbi_op; /// AT operations typedef enum arm64_at_op { ARM64_AT_S1E1R, ARM64_AT_S1E1W, ARM64_AT_S1E0R, ARM64_AT_S1E0W, ARM64_AT_S1E2R, ARM64_AT_S1E2W, ARM64_AT_S12E1R, ARM64_AT_S12E1W, ARM64_AT_S12E0R, ARM64_AT_S12E0W, ARM64_AT_S1E3R, ARM64_AT_S1E3W, } arm64_at_op; /// DC operations typedef enum arm64_dc_op { ARM64_DC_INVALID = 0, ARM64_DC_ZVA, ARM64_DC_IVAC, ARM64_DC_ISW, ARM64_DC_CVAC, ARM64_DC_CSW, ARM64_DC_CVAU, ARM64_DC_CIVAC, ARM64_DC_CISW, } arm64_dc_op; /// IC operations typedef enum arm64_ic_op { ARM64_IC_INVALID = 0, ARM64_IC_IALLUIS, ARM64_IC_IALLU, ARM64_IC_IVAU, } arm64_ic_op; /// Prefetch operations (PRFM) typedef enum arm64_prefetch_op { ARM64_PRFM_INVALID = 0, ARM64_PRFM_PLDL1KEEP = 0x00 + 1, ARM64_PRFM_PLDL1STRM = 0x01 + 1, ARM64_PRFM_PLDL2KEEP = 0x02 + 1, ARM64_PRFM_PLDL2STRM = 0x03 + 1, ARM64_PRFM_PLDL3KEEP = 0x04 + 1, ARM64_PRFM_PLDL3STRM = 0x05 + 1, ARM64_PRFM_PLIL1KEEP = 0x08 + 1, ARM64_PRFM_PLIL1STRM = 0x09 + 1, ARM64_PRFM_PLIL2KEEP = 0x0a + 1, ARM64_PRFM_PLIL2STRM = 0x0b + 1, ARM64_PRFM_PLIL3KEEP = 0x0c + 1, ARM64_PRFM_PLIL3STRM = 0x0d + 1, ARM64_PRFM_PSTL1KEEP = 0x10 + 1, ARM64_PRFM_PSTL1STRM = 0x11 + 1, ARM64_PRFM_PSTL2KEEP = 0x12 + 1, ARM64_PRFM_PSTL2STRM = 0x13 + 1, ARM64_PRFM_PSTL3KEEP = 0x14 + 1, ARM64_PRFM_PSTL3STRM = 0x15 + 1, } arm64_prefetch_op; /// ARM64 registers typedef enum arm64_reg { ARM64_REG_INVALID = 0, ARM64_REG_X29, ARM64_REG_X30, ARM64_REG_NZCV, ARM64_REG_SP, ARM64_REG_WSP, ARM64_REG_WZR, ARM64_REG_XZR, ARM64_REG_B0, ARM64_REG_B1, ARM64_REG_B2, ARM64_REG_B3, ARM64_REG_B4, ARM64_REG_B5, ARM64_REG_B6, ARM64_REG_B7, ARM64_REG_B8, ARM64_REG_B9, ARM64_REG_B10, ARM64_REG_B11, ARM64_REG_B12, ARM64_REG_B13, ARM64_REG_B14, ARM64_REG_B15, ARM64_REG_B16, ARM64_REG_B17, ARM64_REG_B18, ARM64_REG_B19, ARM64_REG_B20, ARM64_REG_B21, ARM64_REG_B22, ARM64_REG_B23, ARM64_REG_B24, ARM64_REG_B25, ARM64_REG_B26, ARM64_REG_B27, ARM64_REG_B28, ARM64_REG_B29, ARM64_REG_B30, ARM64_REG_B31, ARM64_REG_D0, ARM64_REG_D1, ARM64_REG_D2, ARM64_REG_D3, ARM64_REG_D4, ARM64_REG_D5, ARM64_REG_D6, ARM64_REG_D7, ARM64_REG_D8, ARM64_REG_D9, ARM64_REG_D10, ARM64_REG_D11, ARM64_REG_D12, ARM64_REG_D13, ARM64_REG_D14, ARM64_REG_D15, ARM64_REG_D16, ARM64_REG_D17, ARM64_REG_D18, ARM64_REG_D19, ARM64_REG_D20, ARM64_REG_D21, ARM64_REG_D22, ARM64_REG_D23, ARM64_REG_D24, ARM64_REG_D25, ARM64_REG_D26, ARM64_REG_D27, ARM64_REG_D28, ARM64_REG_D29, ARM64_REG_D30, ARM64_REG_D31, ARM64_REG_H0, ARM64_REG_H1, ARM64_REG_H2, ARM64_REG_H3, ARM64_REG_H4, ARM64_REG_H5, ARM64_REG_H6, ARM64_REG_H7, ARM64_REG_H8, ARM64_REG_H9, ARM64_REG_H10, ARM64_REG_H11, ARM64_REG_H12, ARM64_REG_H13, ARM64_REG_H14, ARM64_REG_H15, ARM64_REG_H16, ARM64_REG_H17, ARM64_REG_H18, ARM64_REG_H19, ARM64_REG_H20, ARM64_REG_H21, ARM64_REG_H22, ARM64_REG_H23, ARM64_REG_H24, ARM64_REG_H25, ARM64_REG_H26, ARM64_REG_H27, ARM64_REG_H28, ARM64_REG_H29, ARM64_REG_H30, ARM64_REG_H31, ARM64_REG_Q0, ARM64_REG_Q1, ARM64_REG_Q2, ARM64_REG_Q3, ARM64_REG_Q4, ARM64_REG_Q5, ARM64_REG_Q6, ARM64_REG_Q7, ARM64_REG_Q8, ARM64_REG_Q9, ARM64_REG_Q10, ARM64_REG_Q11, ARM64_REG_Q12, ARM64_REG_Q13, ARM64_REG_Q14, ARM64_REG_Q15, ARM64_REG_Q16, ARM64_REG_Q17, ARM64_REG_Q18, ARM64_REG_Q19, ARM64_REG_Q20, ARM64_REG_Q21, ARM64_REG_Q22, ARM64_REG_Q23, ARM64_REG_Q24, ARM64_REG_Q25, ARM64_REG_Q26, ARM64_REG_Q27, ARM64_REG_Q28, ARM64_REG_Q29, ARM64_REG_Q30, ARM64_REG_Q31, ARM64_REG_S0, ARM64_REG_S1, ARM64_REG_S2, ARM64_REG_S3, ARM64_REG_S4, ARM64_REG_S5, ARM64_REG_S6, ARM64_REG_S7, ARM64_REG_S8, ARM64_REG_S9, ARM64_REG_S10, ARM64_REG_S11, ARM64_REG_S12, ARM64_REG_S13, ARM64_REG_S14, ARM64_REG_S15, ARM64_REG_S16, ARM64_REG_S17, ARM64_REG_S18, ARM64_REG_S19, ARM64_REG_S20, ARM64_REG_S21, ARM64_REG_S22, ARM64_REG_S23, ARM64_REG_S24, ARM64_REG_S25, ARM64_REG_S26, ARM64_REG_S27, ARM64_REG_S28, ARM64_REG_S29, ARM64_REG_S30, ARM64_REG_S31, ARM64_REG_W0, ARM64_REG_W1, ARM64_REG_W2, ARM64_REG_W3, ARM64_REG_W4, ARM64_REG_W5, ARM64_REG_W6, ARM64_REG_W7, ARM64_REG_W8, ARM64_REG_W9, ARM64_REG_W10, ARM64_REG_W11, ARM64_REG_W12, ARM64_REG_W13, ARM64_REG_W14, ARM64_REG_W15, ARM64_REG_W16, ARM64_REG_W17, ARM64_REG_W18, ARM64_REG_W19, ARM64_REG_W20, ARM64_REG_W21, ARM64_REG_W22, ARM64_REG_W23, ARM64_REG_W24, ARM64_REG_W25, ARM64_REG_W26, ARM64_REG_W27, ARM64_REG_W28, ARM64_REG_W29, ARM64_REG_W30, ARM64_REG_X0, ARM64_REG_X1, ARM64_REG_X2, ARM64_REG_X3, ARM64_REG_X4, ARM64_REG_X5, ARM64_REG_X6, ARM64_REG_X7, ARM64_REG_X8, ARM64_REG_X9, ARM64_REG_X10, ARM64_REG_X11, ARM64_REG_X12, ARM64_REG_X13, ARM64_REG_X14, ARM64_REG_X15, ARM64_REG_X16, ARM64_REG_X17, ARM64_REG_X18, ARM64_REG_X19, ARM64_REG_X20, ARM64_REG_X21, ARM64_REG_X22, ARM64_REG_X23, ARM64_REG_X24, ARM64_REG_X25, ARM64_REG_X26, ARM64_REG_X27, ARM64_REG_X28, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_ENDING, // <-- mark the end of the list of registers // alias registers ARM64_REG_IP0 = ARM64_REG_X16, ARM64_REG_IP1 = ARM64_REG_X17, ARM64_REG_FP = ARM64_REG_X29, ARM64_REG_LR = ARM64_REG_X30, } arm64_reg; /// Instruction's operand referring to memory /// This is associated with ARM64_OP_MEM operand type above typedef struct arm64_op_mem { arm64_reg base; ///< base register arm64_reg index; ///< index register int32_t disp; ///< displacement/offset value } arm64_op_mem; /// Instruction operand typedef struct cs_arm64_op { int vector_index; ///< Vector Index for some vector operands (or -1 if irrelevant) arm64_vas vas; ///< Vector Arrangement Specifier arm64_vess vess; ///< Vector Element Size Specifier struct { arm64_shifter type; ///< shifter type of this operand unsigned int value; ///< shifter value of this operand } shift; arm64_extender ext; ///< extender type of this operand arm64_op_type type; ///< operand type union { arm64_reg reg; ///< register value for REG operand int64_t imm; ///< immediate value, or index for C-IMM or IMM operand double fp; ///< floating point value for FP operand arm64_op_mem mem; ///< base/index/scale/disp value for MEM operand arm64_pstate pstate; ///< PState field of MSR instruction. unsigned int sys; ///< IC/DC/AT/TLBI operation (see arm64_ic_op, arm64_dc_op, arm64_at_op, arm64_tlbi_op) arm64_prefetch_op prefetch; ///< PRFM operation. arm64_barrier_op barrier; ///< Memory barrier operation (ISB/DMB/DSB instructions). }; /// How is this operand accessed? (READ, WRITE or READ|WRITE) /// This field is combined of cs_ac_type. /// NOTE: this field is irrelevant if engine is compiled in DIET mode. uint8_t access; } cs_arm64_op; /// Instruction structure typedef struct cs_arm64 { arm64_cc cc; ///< conditional code for this insn bool update_flags; ///< does this insn update flags? bool writeback; ///< does this insn request writeback? 'True' means 'yes' /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_arm64_op operands[8]; ///< operands for this instruction. } cs_arm64; /// ARM64 instruction typedef enum arm64_insn { ARM64_INS_INVALID = 0, ARM64_INS_ABS, ARM64_INS_ADC, ARM64_INS_ADDHN, ARM64_INS_ADDHN2, ARM64_INS_ADDP, ARM64_INS_ADD, ARM64_INS_ADDV, ARM64_INS_ADR, ARM64_INS_ADRP, ARM64_INS_AESD, ARM64_INS_AESE, ARM64_INS_AESIMC, ARM64_INS_AESMC, ARM64_INS_AND, ARM64_INS_ASR, ARM64_INS_B, ARM64_INS_BFM, ARM64_INS_BIC, ARM64_INS_BIF, ARM64_INS_BIT, ARM64_INS_BL, ARM64_INS_BLR, ARM64_INS_BR, ARM64_INS_BRK, ARM64_INS_BSL, ARM64_INS_CBNZ, ARM64_INS_CBZ, ARM64_INS_CCMN, ARM64_INS_CCMP, ARM64_INS_CLREX, ARM64_INS_CLS, ARM64_INS_CLZ, ARM64_INS_CMEQ, ARM64_INS_CMGE, ARM64_INS_CMGT, ARM64_INS_CMHI, ARM64_INS_CMHS, ARM64_INS_CMLE, ARM64_INS_CMLT, ARM64_INS_CMTST, ARM64_INS_CNT, ARM64_INS_MOV, ARM64_INS_CRC32B, ARM64_INS_CRC32CB, ARM64_INS_CRC32CH, ARM64_INS_CRC32CW, ARM64_INS_CRC32CX, ARM64_INS_CRC32H, ARM64_INS_CRC32W, ARM64_INS_CRC32X, ARM64_INS_CSEL, ARM64_INS_CSINC, ARM64_INS_CSINV, ARM64_INS_CSNEG, ARM64_INS_DCPS1, ARM64_INS_DCPS2, ARM64_INS_DCPS3, ARM64_INS_DMB, ARM64_INS_DRPS, ARM64_INS_DSB, ARM64_INS_DUP, ARM64_INS_EON, ARM64_INS_EOR, ARM64_INS_ERET, ARM64_INS_EXTR, ARM64_INS_EXT, ARM64_INS_FABD, ARM64_INS_FABS, ARM64_INS_FACGE, ARM64_INS_FACGT, ARM64_INS_FADD, ARM64_INS_FADDP, ARM64_INS_FCCMP, ARM64_INS_FCCMPE, ARM64_INS_FCMEQ, ARM64_INS_FCMGE, ARM64_INS_FCMGT, ARM64_INS_FCMLE, ARM64_INS_FCMLT, ARM64_INS_FCMP, ARM64_INS_FCMPE, ARM64_INS_FCSEL, ARM64_INS_FCVTAS, ARM64_INS_FCVTAU, ARM64_INS_FCVT, ARM64_INS_FCVTL, ARM64_INS_FCVTL2, ARM64_INS_FCVTMS, ARM64_INS_FCVTMU, ARM64_INS_FCVTNS, ARM64_INS_FCVTNU, ARM64_INS_FCVTN, ARM64_INS_FCVTN2, ARM64_INS_FCVTPS, ARM64_INS_FCVTPU, ARM64_INS_FCVTXN, ARM64_INS_FCVTXN2, ARM64_INS_FCVTZS, ARM64_INS_FCVTZU, ARM64_INS_FDIV, ARM64_INS_FMADD, ARM64_INS_FMAX, ARM64_INS_FMAXNM, ARM64_INS_FMAXNMP, ARM64_INS_FMAXNMV, ARM64_INS_FMAXP, ARM64_INS_FMAXV, ARM64_INS_FMIN, ARM64_INS_FMINNM, ARM64_INS_FMINNMP, ARM64_INS_FMINNMV, ARM64_INS_FMINP, ARM64_INS_FMINV, ARM64_INS_FMLA, ARM64_INS_FMLS, ARM64_INS_FMOV, ARM64_INS_FMSUB, ARM64_INS_FMUL, ARM64_INS_FMULX, ARM64_INS_FNEG, ARM64_INS_FNMADD, ARM64_INS_FNMSUB, ARM64_INS_FNMUL, ARM64_INS_FRECPE, ARM64_INS_FRECPS, ARM64_INS_FRECPX, ARM64_INS_FRINTA, ARM64_INS_FRINTI, ARM64_INS_FRINTM, ARM64_INS_FRINTN, ARM64_INS_FRINTP, ARM64_INS_FRINTX, ARM64_INS_FRINTZ, ARM64_INS_FRSQRTE, ARM64_INS_FRSQRTS, ARM64_INS_FSQRT, ARM64_INS_FSUB, ARM64_INS_HINT, ARM64_INS_HLT, ARM64_INS_HVC, ARM64_INS_INS, ARM64_INS_ISB, ARM64_INS_LD1, ARM64_INS_LD1R, ARM64_INS_LD2R, ARM64_INS_LD2, ARM64_INS_LD3R, ARM64_INS_LD3, ARM64_INS_LD4, ARM64_INS_LD4R, ARM64_INS_LDARB, ARM64_INS_LDARH, ARM64_INS_LDAR, ARM64_INS_LDAXP, ARM64_INS_LDAXRB, ARM64_INS_LDAXRH, ARM64_INS_LDAXR, ARM64_INS_LDNP, ARM64_INS_LDP, ARM64_INS_LDPSW, ARM64_INS_LDRB, ARM64_INS_LDR, ARM64_INS_LDRH, ARM64_INS_LDRSB, ARM64_INS_LDRSH, ARM64_INS_LDRSW, ARM64_INS_LDTRB, ARM64_INS_LDTRH, ARM64_INS_LDTRSB, ARM64_INS_LDTRSH, ARM64_INS_LDTRSW, ARM64_INS_LDTR, ARM64_INS_LDURB, ARM64_INS_LDUR, ARM64_INS_LDURH, ARM64_INS_LDURSB, ARM64_INS_LDURSH, ARM64_INS_LDURSW, ARM64_INS_LDXP, ARM64_INS_LDXRB, ARM64_INS_LDXRH, ARM64_INS_LDXR, ARM64_INS_LSL, ARM64_INS_LSR, ARM64_INS_MADD, ARM64_INS_MLA, ARM64_INS_MLS, ARM64_INS_MOVI, ARM64_INS_MOVK, ARM64_INS_MOVN, ARM64_INS_MOVZ, ARM64_INS_MRS, ARM64_INS_MSR, ARM64_INS_MSUB, ARM64_INS_MUL, ARM64_INS_MVNI, ARM64_INS_NEG, ARM64_INS_NOT, ARM64_INS_ORN, ARM64_INS_ORR, ARM64_INS_PMULL2, ARM64_INS_PMULL, ARM64_INS_PMUL, ARM64_INS_PRFM, ARM64_INS_PRFUM, ARM64_INS_RADDHN, ARM64_INS_RADDHN2, ARM64_INS_RBIT, ARM64_INS_RET, ARM64_INS_REV16, ARM64_INS_REV32, ARM64_INS_REV64, ARM64_INS_REV, ARM64_INS_ROR, ARM64_INS_RSHRN2, ARM64_INS_RSHRN, ARM64_INS_RSUBHN, ARM64_INS_RSUBHN2, ARM64_INS_SABAL2, ARM64_INS_SABAL, ARM64_INS_SABA, ARM64_INS_SABDL2, ARM64_INS_SABDL, ARM64_INS_SABD, ARM64_INS_SADALP, ARM64_INS_SADDLP, ARM64_INS_SADDLV, ARM64_INS_SADDL2, ARM64_INS_SADDL, ARM64_INS_SADDW2, ARM64_INS_SADDW, ARM64_INS_SBC, ARM64_INS_SBFM, ARM64_INS_SCVTF, ARM64_INS_SDIV, ARM64_INS_SHA1C, ARM64_INS_SHA1H, ARM64_INS_SHA1M, ARM64_INS_SHA1P, ARM64_INS_SHA1SU0, ARM64_INS_SHA1SU1, ARM64_INS_SHA256H2, ARM64_INS_SHA256H, ARM64_INS_SHA256SU0, ARM64_INS_SHA256SU1, ARM64_INS_SHADD, ARM64_INS_SHLL2, ARM64_INS_SHLL, ARM64_INS_SHL, ARM64_INS_SHRN2, ARM64_INS_SHRN, ARM64_INS_SHSUB, ARM64_INS_SLI, ARM64_INS_SMADDL, ARM64_INS_SMAXP, ARM64_INS_SMAXV, ARM64_INS_SMAX, ARM64_INS_SMC, ARM64_INS_SMINP, ARM64_INS_SMINV, ARM64_INS_SMIN, ARM64_INS_SMLAL2, ARM64_INS_SMLAL, ARM64_INS_SMLSL2, ARM64_INS_SMLSL, ARM64_INS_SMOV, ARM64_INS_SMSUBL, ARM64_INS_SMULH, ARM64_INS_SMULL2, ARM64_INS_SMULL, ARM64_INS_SQABS, ARM64_INS_SQADD, ARM64_INS_SQDMLAL, ARM64_INS_SQDMLAL2, ARM64_INS_SQDMLSL, ARM64_INS_SQDMLSL2, ARM64_INS_SQDMULH, ARM64_INS_SQDMULL, ARM64_INS_SQDMULL2, ARM64_INS_SQNEG, ARM64_INS_SQRDMULH, ARM64_INS_SQRSHL, ARM64_INS_SQRSHRN, ARM64_INS_SQRSHRN2, ARM64_INS_SQRSHRUN, ARM64_INS_SQRSHRUN2, ARM64_INS_SQSHLU, ARM64_INS_SQSHL, ARM64_INS_SQSHRN, ARM64_INS_SQSHRN2, ARM64_INS_SQSHRUN, ARM64_INS_SQSHRUN2, ARM64_INS_SQSUB, ARM64_INS_SQXTN2, ARM64_INS_SQXTN, ARM64_INS_SQXTUN2, ARM64_INS_SQXTUN, ARM64_INS_SRHADD, ARM64_INS_SRI, ARM64_INS_SRSHL, ARM64_INS_SRSHR, ARM64_INS_SRSRA, ARM64_INS_SSHLL2, ARM64_INS_SSHLL, ARM64_INS_SSHL, ARM64_INS_SSHR, ARM64_INS_SSRA, ARM64_INS_SSUBL2, ARM64_INS_SSUBL, ARM64_INS_SSUBW2, ARM64_INS_SSUBW, ARM64_INS_ST1, ARM64_INS_ST2, ARM64_INS_ST3, ARM64_INS_ST4, ARM64_INS_STLRB, ARM64_INS_STLRH, ARM64_INS_STLR, ARM64_INS_STLXP, ARM64_INS_STLXRB, ARM64_INS_STLXRH, ARM64_INS_STLXR, ARM64_INS_STNP, ARM64_INS_STP, ARM64_INS_STRB, ARM64_INS_STR, ARM64_INS_STRH, ARM64_INS_STTRB, ARM64_INS_STTRH, ARM64_INS_STTR, ARM64_INS_STURB, ARM64_INS_STUR, ARM64_INS_STURH, ARM64_INS_STXP, ARM64_INS_STXRB, ARM64_INS_STXRH, ARM64_INS_STXR, ARM64_INS_SUBHN, ARM64_INS_SUBHN2, ARM64_INS_SUB, ARM64_INS_SUQADD, ARM64_INS_SVC, ARM64_INS_SYSL, ARM64_INS_SYS, ARM64_INS_TBL, ARM64_INS_TBNZ, ARM64_INS_TBX, ARM64_INS_TBZ, ARM64_INS_TRN1, ARM64_INS_TRN2, ARM64_INS_UABAL2, ARM64_INS_UABAL, ARM64_INS_UABA, ARM64_INS_UABDL2, ARM64_INS_UABDL, ARM64_INS_UABD, ARM64_INS_UADALP, ARM64_INS_UADDLP, ARM64_INS_UADDLV, ARM64_INS_UADDL2, ARM64_INS_UADDL, ARM64_INS_UADDW2, ARM64_INS_UADDW, ARM64_INS_UBFM, ARM64_INS_UCVTF, ARM64_INS_UDIV, ARM64_INS_UHADD, ARM64_INS_UHSUB, ARM64_INS_UMADDL, ARM64_INS_UMAXP, ARM64_INS_UMAXV, ARM64_INS_UMAX, ARM64_INS_UMINP, ARM64_INS_UMINV, ARM64_INS_UMIN, ARM64_INS_UMLAL2, ARM64_INS_UMLAL, ARM64_INS_UMLSL2, ARM64_INS_UMLSL, ARM64_INS_UMOV, ARM64_INS_UMSUBL, ARM64_INS_UMULH, ARM64_INS_UMULL2, ARM64_INS_UMULL, ARM64_INS_UQADD, ARM64_INS_UQRSHL, ARM64_INS_UQRSHRN, ARM64_INS_UQRSHRN2, ARM64_INS_UQSHL, ARM64_INS_UQSHRN, ARM64_INS_UQSHRN2, ARM64_INS_UQSUB, ARM64_INS_UQXTN2, ARM64_INS_UQXTN, ARM64_INS_URECPE, ARM64_INS_URHADD, ARM64_INS_URSHL, ARM64_INS_URSHR, ARM64_INS_URSQRTE, ARM64_INS_URSRA, ARM64_INS_USHLL2, ARM64_INS_USHLL, ARM64_INS_USHL, ARM64_INS_USHR, ARM64_INS_USQADD, ARM64_INS_USRA, ARM64_INS_USUBL2, ARM64_INS_USUBL, ARM64_INS_USUBW2, ARM64_INS_USUBW, ARM64_INS_UZP1, ARM64_INS_UZP2, ARM64_INS_XTN2, ARM64_INS_XTN, ARM64_INS_ZIP1, ARM64_INS_ZIP2, // alias insn ARM64_INS_MNEG, ARM64_INS_UMNEGL, ARM64_INS_SMNEGL, ARM64_INS_NOP, ARM64_INS_YIELD, ARM64_INS_WFE, ARM64_INS_WFI, ARM64_INS_SEV, ARM64_INS_SEVL, ARM64_INS_NGC, ARM64_INS_SBFIZ, ARM64_INS_UBFIZ, ARM64_INS_SBFX, ARM64_INS_UBFX, ARM64_INS_BFI, ARM64_INS_BFXIL, ARM64_INS_CMN, ARM64_INS_MVN, ARM64_INS_TST, ARM64_INS_CSET, ARM64_INS_CINC, ARM64_INS_CSETM, ARM64_INS_CINV, ARM64_INS_CNEG, ARM64_INS_SXTB, ARM64_INS_SXTH, ARM64_INS_SXTW, ARM64_INS_CMP, ARM64_INS_UXTB, ARM64_INS_UXTH, ARM64_INS_UXTW, ARM64_INS_IC, ARM64_INS_DC, ARM64_INS_AT, ARM64_INS_TLBI, ARM64_INS_NEGS, ARM64_INS_NGCS, ARM64_INS_ENDING, // <-- mark the end of the list of insn } arm64_insn; /// Group of ARM64 instructions typedef enum arm64_insn_group { ARM64_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) ARM64_GRP_JUMP, ///< = CS_GRP_JUMP ARM64_GRP_CALL, ARM64_GRP_RET, ARM64_GRP_INT, ARM64_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE ARM64_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE // Architecture-specific groups ARM64_GRP_CRYPTO = 128, ARM64_GRP_FPARMV8, ARM64_GRP_NEON, ARM64_GRP_CRC, ARM64_GRP_ENDING, // <-- mark the end of the list of groups } arm64_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/capstone.h010066400017500001750000000715051363403403300215130ustar0000000000000000#ifndef CAPSTONE_ENGINE_H #define CAPSTONE_ENGINE_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2016 */ #ifdef __cplusplus extern "C" { #endif #include #if defined(CAPSTONE_HAS_OSXKERNEL) #include #else #include #include #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #pragma warning(disable:4100) #define CAPSTONE_API __cdecl #ifdef CAPSTONE_SHARED #define CAPSTONE_EXPORT __declspec(dllexport) #else // defined(CAPSTONE_STATIC) #define CAPSTONE_EXPORT #endif #else #define CAPSTONE_API #if defined(__GNUC__) && !defined(CAPSTONE_STATIC) #define CAPSTONE_EXPORT __attribute__((visibility("default"))) #else // defined(CAPSTONE_STATIC) #define CAPSTONE_EXPORT #endif #endif #ifdef __GNUC__ #define CAPSTONE_DEPRECATED __attribute__((deprecated)) #elif defined(_MSC_VER) #define CAPSTONE_DEPRECATED __declspec(deprecated) #else #pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler") #define CAPSTONE_DEPRECATED #endif // Capstone API version #define CS_API_MAJOR 4 #define CS_API_MINOR 0 // Version for bleeding edge code of the Github's "next" branch. // Use this if you want the absolutely latest development code. // This version number will be bumped up whenever we have a new major change. #define CS_NEXT_VERSION 5 // Capstone package version #define CS_VERSION_MAJOR CS_API_MAJOR #define CS_VERSION_MINOR CS_API_MINOR #define CS_VERSION_EXTRA 2 /// Macro to create combined version which can be compared to /// result of cs_version() API. #define CS_MAKE_VERSION(major, minor) ((major << 8) + minor) /// Maximum size of an instruction mnemonic string. #define CS_MNEMONIC_SIZE 32 // Handle using with all API typedef size_t csh; /// Architecture type typedef enum cs_arch { CS_ARCH_ARM = 0, ///< ARM architecture (including Thumb, Thumb-2) CS_ARCH_ARM64, ///< ARM-64, also called AArch64 CS_ARCH_MIPS, ///< Mips architecture CS_ARCH_X86, ///< X86 architecture (including x86 & x86-64) CS_ARCH_PPC, ///< PowerPC architecture CS_ARCH_SPARC, ///< Sparc architecture CS_ARCH_SYSZ, ///< SystemZ architecture CS_ARCH_XCORE, ///< XCore architecture CS_ARCH_M68K, ///< 68K architecture CS_ARCH_TMS320C64X, ///< TMS320C64x architecture CS_ARCH_M680X, ///< 680X architecture CS_ARCH_EVM, ///< Ethereum architecture CS_ARCH_MAX, CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support() } cs_arch; // Support value to verify diet mode of the engine. // If cs_support(CS_SUPPORT_DIET) return True, the engine was compiled // in diet mode. #define CS_SUPPORT_DIET (CS_ARCH_ALL + 1) // Support value to verify X86 reduce mode of the engine. // If cs_support(CS_SUPPORT_X86_REDUCE) return True, the engine was compiled // in X86 reduce mode. #define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2) /// Mode type typedef enum cs_mode { CS_MODE_LITTLE_ENDIAN = 0, ///< little-endian mode (default mode) CS_MODE_ARM = 0, ///< 32-bit ARM CS_MODE_16 = 1 << 1, ///< 16-bit mode (X86) CS_MODE_32 = 1 << 2, ///< 32-bit mode (X86) CS_MODE_64 = 1 << 3, ///< 64-bit mode (X86, PPC) CS_MODE_THUMB = 1 << 4, ///< ARM's Thumb mode, including Thumb-2 CS_MODE_MCLASS = 1 << 5, ///< ARM's Cortex-M series CS_MODE_V8 = 1 << 6, ///< ARMv8 A32 encodings for ARM CS_MODE_MICRO = 1 << 4, ///< MicroMips mode (MIPS) CS_MODE_MIPS3 = 1 << 5, ///< Mips III ISA CS_MODE_MIPS32R6 = 1 << 6, ///< Mips32r6 ISA CS_MODE_MIPS2 = 1 << 7, ///< Mips II ISA CS_MODE_V9 = 1 << 4, ///< SparcV9 mode (Sparc) CS_MODE_QPX = 1 << 4, ///< Quad Processing eXtensions mode (PPC) CS_MODE_M68K_000 = 1 << 1, ///< M68K 68000 mode CS_MODE_M68K_010 = 1 << 2, ///< M68K 68010 mode CS_MODE_M68K_020 = 1 << 3, ///< M68K 68020 mode CS_MODE_M68K_030 = 1 << 4, ///< M68K 68030 mode CS_MODE_M68K_040 = 1 << 5, ///< M68K 68040 mode CS_MODE_M68K_060 = 1 << 6, ///< M68K 68060 mode CS_MODE_BIG_ENDIAN = 1 << 31, ///< big-endian mode CS_MODE_MIPS32 = CS_MODE_32, ///< Mips32 ISA (Mips) CS_MODE_MIPS64 = CS_MODE_64, ///< Mips64 ISA (Mips) CS_MODE_M680X_6301 = 1 << 1, ///< M680X Hitachi 6301,6303 mode CS_MODE_M680X_6309 = 1 << 2, ///< M680X Hitachi 6309 mode CS_MODE_M680X_6800 = 1 << 3, ///< M680X Motorola 6800,6802 mode CS_MODE_M680X_6801 = 1 << 4, ///< M680X Motorola 6801,6803 mode CS_MODE_M680X_6805 = 1 << 5, ///< M680X Motorola/Freescale 6805 mode CS_MODE_M680X_6808 = 1 << 6, ///< M680X Motorola/Freescale/NXP 68HC08 mode CS_MODE_M680X_6809 = 1 << 7, ///< M680X Motorola 6809 mode CS_MODE_M680X_6811 = 1 << 8, ///< M680X Motorola/Freescale/NXP 68HC11 mode CS_MODE_M680X_CPU12 = 1 << 9, ///< M680X Motorola/Freescale/NXP CPU12 ///< used on M68HC12/HCS12 CS_MODE_M680X_HCS08 = 1 << 10, ///< M680X Freescale/NXP HCS08 mode } cs_mode; typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size); typedef void* (CAPSTONE_API *cs_calloc_t)(size_t nmemb, size_t size); typedef void* (CAPSTONE_API *cs_realloc_t)(void *ptr, size_t size); typedef void (CAPSTONE_API *cs_free_t)(void *ptr); typedef int (CAPSTONE_API *cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap); /// User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf() /// By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf(). typedef struct cs_opt_mem { cs_malloc_t malloc; cs_calloc_t calloc; cs_realloc_t realloc; cs_free_t free; cs_vsnprintf_t vsnprintf; } cs_opt_mem; /// Customize mnemonic for instructions with alternative name. /// To reset existing customized instruction to its default mnemonic, /// call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value /// for @mnemonic. typedef struct cs_opt_mnem { /// ID of instruction to be customized. unsigned int id; /// Customized instruction mnemonic. const char *mnemonic; } cs_opt_mnem; /// Runtime option for the disassembled engine typedef enum cs_opt_type { CS_OPT_INVALID = 0, ///< No option specified CS_OPT_SYNTAX, ///< Assembly output syntax CS_OPT_DETAIL, ///< Break down instruction structure into details CS_OPT_MODE, ///< Change engine's mode at run-time CS_OPT_MEM, ///< User-defined dynamic memory related functions CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode. CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option CS_OPT_MNEMONIC, ///< Customize instruction mnemonic CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form } cs_opt_type; /// Runtime option value (associated with option type above) typedef enum cs_opt_value { CS_OPT_OFF = 0, ///< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED. CS_OPT_ON = 3, ///< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). CS_OPT_SYNTAX_DEFAULT = 0, ///< Default asm syntax (CS_OPT_SYNTAX). CS_OPT_SYNTAX_INTEL, ///< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). CS_OPT_SYNTAX_ATT, ///< X86 ATT asm syntax (CS_OPT_SYNTAX). CS_OPT_SYNTAX_NOREGNAME, ///< Prints register name with only number (CS_OPT_SYNTAX) CS_OPT_SYNTAX_MASM, ///< X86 Intel Masm syntax (CS_OPT_SYNTAX). } cs_opt_value; /// Common instruction operand types - to be consistent across all architectures. typedef enum cs_op_type { CS_OP_INVALID = 0, ///< uninitialized/invalid operand. CS_OP_REG, ///< Register operand. CS_OP_IMM, ///< Immediate operand. CS_OP_MEM, ///< Memory operand. CS_OP_FP, ///< Floating-Point operand. } cs_op_type; /// Common instruction operand access types - to be consistent across all architectures. /// It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE typedef enum cs_ac_type { CS_AC_INVALID = 0, ///< Uninitialized/invalid access type. CS_AC_READ = 1 << 0, ///< Operand read from memory or register. CS_AC_WRITE = 1 << 1, ///< Operand write to memory or register. } cs_ac_type; /// Common instruction groups - to be consistent across all architectures. typedef enum cs_group_type { CS_GRP_INVALID = 0, ///< uninitialized/invalid group. CS_GRP_JUMP, ///< all jump instructions (conditional+direct+indirect jumps) CS_GRP_CALL, ///< all call instructions CS_GRP_RET, ///< all return instructions CS_GRP_INT, ///< all interrupt instructions (int+syscall) CS_GRP_IRET, ///< all interrupt return instructions CS_GRP_PRIVILEGE, ///< all privileged instructions CS_GRP_BRANCH_RELATIVE, ///< all relative branching instructions } cs_group_type; /** User-defined callback function for SKIPDATA option. See tests/test_skipdata.c for sample code demonstrating this API. @code: the input buffer containing code to be disassembled. This is the same buffer passed to cs_disasm(). @code_size: size (in bytes) of the above @code buffer. @offset: the position of the currently-examining byte in the input buffer @code mentioned above. @user_data: user-data passed to cs_option() via @user_data field in cs_opt_skipdata struct below. @return: return number of bytes to skip, or 0 to immediately stop disassembling. */ typedef size_t (CAPSTONE_API *cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void *user_data); /// User-customized setup for SKIPDATA option typedef struct cs_opt_skipdata { /// Capstone considers data to skip as special "instructions". /// User can specify the string for this instruction's "mnemonic" here. /// By default (if @mnemonic is NULL), Capstone use ".byte". const char *mnemonic; /// User-defined callback function to be called when Capstone hits data. /// If the returned value from this callback is positive (>0), Capstone /// will skip exactly that number of bytes & continue. Otherwise, if /// the callback returns 0, Capstone stops disassembling and returns /// immediately from cs_disasm() /// NOTE: if this callback pointer is NULL, Capstone would skip a number /// of bytes depending on architectures, as following: /// Arm: 2 bytes (Thumb mode) or 4 bytes. /// Arm64: 4 bytes. /// Mips: 4 bytes. /// M680x: 1 byte. /// PowerPC: 4 bytes. /// Sparc: 4 bytes. /// SystemZ: 2 bytes. /// X86: 1 bytes. /// XCore: 2 bytes. /// EVM: 1 bytes. cs_skipdata_cb_t callback; // default value is NULL /// User-defined data to be passed to @callback function pointer. void *user_data; } cs_opt_skipdata; #include "arm.h" #include "arm64.h" #include "m68k.h" #include "mips.h" #include "ppc.h" #include "sparc.h" #include "systemz.h" #include "x86.h" #include "xcore.h" #include "tms320c64x.h" #include "m680x.h" #include "evm.h" /// NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON /// Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH)) /// by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c /// if cs_detail changes, in particular if a field is added after the union, /// then update arch/ARCH/ARCHDisassembler.c accordingly typedef struct cs_detail { uint16_t regs_read[12]; ///< list of implicit registers read by this insn uint8_t regs_read_count; ///< number of implicit registers read by this insn uint16_t regs_write[20]; ///< list of implicit registers modified by this insn uint8_t regs_write_count; ///< number of implicit registers modified by this insn uint8_t groups[8]; ///< list of group this instruction belong to uint8_t groups_count; ///< number of groups this insn belongs to /// Architecture-specific instruction info union { cs_x86 x86; ///< X86 architecture, including 16-bit, 32-bit & 64-bit mode cs_arm64 arm64; ///< ARM64 architecture (aka AArch64) cs_arm arm; ///< ARM architecture (including Thumb/Thumb2) cs_m68k m68k; ///< M68K architecture cs_mips mips; ///< MIPS architecture cs_ppc ppc; ///< PowerPC architecture cs_sparc sparc; ///< Sparc architecture cs_sysz sysz; ///< SystemZ architecture cs_xcore xcore; ///< XCore architecture cs_tms320c64x tms320c64x; ///< TMS320C64x architecture cs_m680x m680x; ///< M680X architecture cs_evm evm; ///< Ethereum architecture }; } cs_detail; /// Detail information of disassembled instruction typedef struct cs_insn { /// Instruction ID (basically a numeric ID for the instruction mnemonic) /// Find the instruction id in the '[ARCH]_insn' enum in the header file /// of corresponding architecture, such as 'arm_insn' in arm.h for ARM, /// 'x86_insn' in x86.h for X86, etc... /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF /// NOTE: in Skipdata mode, "data" instruction has 0 for this id field. unsigned int id; /// Address (EIP) of this instruction /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF uint64_t address; /// Size of this instruction /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF uint16_t size; /// Machine bytes of this instruction, with number of bytes indicated by @size above /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF uint8_t bytes[16]; /// Ascii text of instruction mnemonic /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF char mnemonic[CS_MNEMONIC_SIZE]; /// Ascii text of instruction operands /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF char op_str[160]; /// Pointer to cs_detail. /// NOTE: detail pointer is only valid when both requirements below are met: /// (1) CS_OP_DETAIL = CS_OPT_ON /// (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON) /// /// NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer /// is not NULL, its content is still irrelevant. cs_detail *detail; } cs_insn; /// Calculate the offset of a disassembled instruction in its buffer, given its position /// in its array of disassembled insn /// NOTE: this macro works with position (>=1), not index #define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address) /// All type of errors encountered by Capstone API. /// These are values returned by cs_errno() typedef enum cs_err { CS_ERR_OK = 0, ///< No error: everything was fine CS_ERR_MEM, ///< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter() CS_ERR_ARCH, ///< Unsupported architecture: cs_open() CS_ERR_HANDLE, ///< Invalid handle: cs_op_count(), cs_op_index() CS_ERR_CSH, ///< Invalid csh argument: cs_close(), cs_errno(), cs_option() CS_ERR_MODE, ///< Invalid/unsupported mode: cs_open() CS_ERR_OPTION, ///< Invalid/unsupported option: cs_option() CS_ERR_DETAIL, ///< Information is unavailable because detail option is OFF CS_ERR_MEMSETUP, ///< Dynamic memory management uninitialized (see CS_OPT_MEM) CS_ERR_VERSION, ///< Unsupported version (bindings) CS_ERR_DIET, ///< Access irrelevant data in "diet" engine CS_ERR_SKIPDATA, ///< Access irrelevant data for "data" instruction in SKIPDATA mode CS_ERR_X86_ATT, ///< X86 AT&T syntax is unsupported (opt-out at compile time) CS_ERR_X86_INTEL, ///< X86 Intel syntax is unsupported (opt-out at compile time) CS_ERR_X86_MASM, ///< X86 Masm syntax is unsupported (opt-out at compile time) } cs_err; /** Return combined API version & major and minor version numbers. @major: major number of API version @minor: minor number of API version @return hexical number as (major << 8 | minor), which encodes both major & minor versions. NOTE: This returned value can be compared with version number made with macro CS_MAKE_VERSION For example, second API version would return 1 in @major, and 1 in @minor The return value would be 0x0101 NOTE: if you only care about returned value, but not major and minor values, set both @major & @minor arguments to NULL. */ CAPSTONE_EXPORT unsigned int CAPSTONE_API cs_version(int *major, int *minor); /** This API can be used to either ask for archs supported by this library, or check to see if the library was compile with 'diet' option (or called in 'diet' mode). To check if a particular arch is supported by this library, set @query to arch mode (CS_ARCH_* value). To verify if this library supports all the archs, use CS_ARCH_ALL. To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET. @return True if this library supports the given arch, or in 'diet' mode. */ CAPSTONE_EXPORT bool CAPSTONE_API cs_support(int query); /** Initialize CS handle: this must be done before any usage of CS. @arch: architecture type (CS_ARCH_*) @mode: hardware mode. This is combined of CS_MODE_* @handle: pointer to handle, which will be updated at return time @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum for detailed error). */ CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle); /** Close CS handle: MUST do to release the handle when it is not used anymore. NOTE: this must be only called when there is no longer usage of Capstone, not even access to cs_insn array. The reason is the this API releases some cached memory, thus access to any Capstone API after cs_close() might crash your application. In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0). @handle: pointer to a handle returned by cs_open() @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum for detailed error). */ CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle); /** Set option for disassembling engine at runtime @handle: handle returned by cs_open() @type: type of option to be set @value: option value corresponding with @type @return: CS_ERR_OK on success, or other value on failure. Refer to cs_err enum for detailed error. NOTE: in the case of CS_OPT_MEM, handle's value can be anything, so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called even before cs_open() */ CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh handle, cs_opt_type type, size_t value); /** Report the last error number when some API function fail. Like glibc's errno, cs_errno might not retain its old value once accessed. @handle: handle returned by cs_open() @return: error code of cs_err enum type (CS_ERR_*, see above) */ CAPSTONE_EXPORT cs_err CAPSTONE_API cs_errno(csh handle); /** Return a string describing given error code. @code: error code (see CS_ERR_* above) @return: returns a pointer to a string that describes the error code passed in the argument @code */ CAPSTONE_EXPORT const char * CAPSTONE_API cs_strerror(cs_err code); /** Disassemble binary code, given the code buffer, size, address and number of instructions to be decoded. This API dynamically allocate memory to contain disassembled instruction. Resulting instructions will be put into @*insn NOTE 1: this API will automatically determine memory needed to contain output disassembled instructions in @insn. NOTE 2: caller must free the allocated memory itself to avoid memory leaking. NOTE 3: for system with scarce memory to be dynamically allocated such as OS kernel or firmware, the API cs_disasm_iter() might be a better choice than cs_disasm(). The reason is that with cs_disasm(), based on limited available memory, we have to calculate in advance how many instructions to be disassembled, which complicates things. This is especially troublesome for the case @count=0, when cs_disasm() runs uncontrollably (until either end of input buffer, or when it encounters an invalid instruction). @handle: handle returned by cs_open() @code: buffer containing raw binary code to be disassembled. @code_size: size of the above code buffer. @address: address of the first instruction in given raw code buffer. @insn: array of instructions filled in by this API. NOTE: @insn will be allocated by this function, and should be freed with cs_free() API. @count: number of instructions to be disassembled, or 0 to get all of them @return: the number of successfully disassembled instructions, or 0 if this function failed to disassemble the given code On failure, call cs_errno() for error code. */ CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh handle, const uint8_t *code, size_t code_size, uint64_t address, size_t count, cs_insn **insn); /** Deprecated function - to be retired in the next version! Use cs_disasm() instead of cs_disasm_ex() */ CAPSTONE_EXPORT CAPSTONE_DEPRECATED size_t CAPSTONE_API cs_disasm_ex(csh handle, const uint8_t *code, size_t code_size, uint64_t address, size_t count, cs_insn **insn); /** Free memory allocated by cs_malloc() or cs_disasm() (argument @insn) @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc() @count: number of cs_insn structures returned by cs_disasm(), or 1 to free memory allocated by cs_malloc(). */ CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count); /** Allocate memory for 1 instruction to be used by cs_disasm_iter(). @handle: handle returned by cs_open() NOTE: when no longer in use, you can reclaim the memory allocated for this instruction with cs_free(insn, 1) */ CAPSTONE_EXPORT cs_insn * CAPSTONE_API cs_malloc(csh handle); /** Fast API to disassemble binary code, given the code buffer, size, address and number of instructions to be decoded. This API puts the resulting instruction into a given cache in @insn. See tests/test_iter.c for sample code demonstrating this API. NOTE 1: this API will update @code, @size & @address to point to the next instruction in the input buffer. Therefore, it is convenient to use cs_disasm_iter() inside a loop to quickly iterate all the instructions. While decoding one instruction at a time can also be achieved with cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30% faster on random input. NOTE 2: the cache in @insn can be created with cs_malloc() API. NOTE 3: for system with scarce memory to be dynamically allocated such as OS kernel or firmware, this API is recommended over cs_disasm(), which allocates memory based on the number of instructions to be disassembled. The reason is that with cs_disasm(), based on limited available memory, we have to calculate in advance how many instructions to be disassembled, which complicates things. This is especially troublesome for the case @count=0, when cs_disasm() runs uncontrollably (until either end of input buffer, or when it encounters an invalid instruction). @handle: handle returned by cs_open() @code: buffer containing raw binary code to be disassembled @size: size of above code @address: address of the first insn in given raw code buffer @insn: pointer to instruction to be filled in by this API. @return: true if this API successfully decode 1 instruction, or false otherwise. On failure, call cs_errno() for error code. */ CAPSTONE_EXPORT bool CAPSTONE_API cs_disasm_iter(csh handle, const uint8_t **code, size_t *size, uint64_t *address, cs_insn *insn); /** Return friendly name of register in a string. Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) WARN: when in 'diet' mode, this API is irrelevant because engine does not store register name. @handle: handle returned by cs_open() @reg_id: register id @return: string name of the register, or NULL if @reg_id is invalid. */ CAPSTONE_EXPORT const char * CAPSTONE_API cs_reg_name(csh handle, unsigned int reg_id); /** Return friendly name of an instruction in a string. Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) WARN: when in 'diet' mode, this API is irrelevant because the engine does not store instruction name. @handle: handle returned by cs_open() @insn_id: instruction id @return: string name of the instruction, or NULL if @insn_id is invalid. */ CAPSTONE_EXPORT const char * CAPSTONE_API cs_insn_name(csh handle, unsigned int insn_id); /** Return friendly name of a group id (that an instruction can belong to) Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) WARN: when in 'diet' mode, this API is irrelevant because the engine does not store group name. @handle: handle returned by cs_open() @group_id: group id @return: string name of the group, or NULL if @group_id is invalid. */ CAPSTONE_EXPORT const char * CAPSTONE_API cs_group_name(csh handle, unsigned int group_id); /** Check if a disassembled instruction belong to a particular group. Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) Internally, this simply verifies if @group_id matches any member of insn->groups array. NOTE: this API is only valid when detail option is ON (which is OFF by default). WARN: when in 'diet' mode, this API is irrelevant because the engine does not update @groups array. @handle: handle returned by cs_open() @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() @group_id: group that you want to check if this instruction belong to. @return: true if this instruction indeed belongs to the given group, or false otherwise. */ CAPSTONE_EXPORT bool CAPSTONE_API cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id); /** Check if a disassembled instruction IMPLICITLY used a particular register. Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) Internally, this simply verifies if @reg_id matches any member of insn->regs_read array. NOTE: this API is only valid when detail option is ON (which is OFF by default) WARN: when in 'diet' mode, this API is irrelevant because the engine does not update @regs_read array. @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() @reg_id: register that you want to check if this instruction used it. @return: true if this instruction indeed implicitly used the given register, or false otherwise. */ CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id); /** Check if a disassembled instruction IMPLICITLY modified a particular register. Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) Internally, this simply verifies if @reg_id matches any member of insn->regs_write array. NOTE: this API is only valid when detail option is ON (which is OFF by default) WARN: when in 'diet' mode, this API is irrelevant because the engine does not update @regs_write array. @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() @reg_id: register that you want to check if this instruction modified it. @return: true if this instruction indeed implicitly modified the given register, or false otherwise. */ CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id); /** Count the number of operands of a given type. Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) NOTE: this API is only valid when detail option is ON (which is OFF by default) @handle: handle returned by cs_open() @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() @op_type: Operand type to be found. @return: number of operands of given type @op_type in instruction @insn, or -1 on failure. */ CAPSTONE_EXPORT int CAPSTONE_API cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type); /** Retrieve the position of operand of given type in .operands[] array. Later, the operand can be accessed using the returned position. Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) NOTE: this API is only valid when detail option is ON (which is OFF by default) @handle: handle returned by cs_open() @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() @op_type: Operand type to be found. @position: position of the operand to be found. This must be in the range [1, cs_op_count(handle, insn, op_type)] @return: index of operand of given type @op_type in .operands[] array in instruction @insn, or -1 on failure. */ CAPSTONE_EXPORT int CAPSTONE_API cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type, unsigned int position); /// Type of array to keep the list of registers typedef uint16_t cs_regs[64]; /** Retrieve all the registers accessed by an instruction, either explicitly or implicitly. WARN: when in 'diet' mode, this API is irrelevant because engine does not store registers. @handle: handle returned by cs_open() @insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter() @regs_read: on return, this array contains all registers read by instruction. @regs_read_count: number of registers kept inside @regs_read array. @regs_write: on return, this array contains all registers written by instruction. @regs_write_count: number of registers kept inside @regs_write array. @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum for detailed error). */ CAPSTONE_EXPORT cs_err CAPSTONE_API cs_regs_access(csh handle, const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count); #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/evm.h010066400017500001750000000104421363402546700204720ustar0000000000000000#ifndef CAPSTONE_EVM_H #define CAPSTONE_EVM_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2018 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// Instruction structure typedef struct cs_evm { unsigned char pop; ///< number of items popped from the stack unsigned char push; ///< number of items pushed into the stack unsigned int fee; ///< gas fee for the instruction } cs_evm; /// EVM instruction typedef enum evm_insn { EVM_INS_STOP = 0, EVM_INS_ADD = 1, EVM_INS_MUL = 2, EVM_INS_SUB = 3, EVM_INS_DIV = 4, EVM_INS_SDIV = 5, EVM_INS_MOD = 6, EVM_INS_SMOD = 7, EVM_INS_ADDMOD = 8, EVM_INS_MULMOD = 9, EVM_INS_EXP = 10, EVM_INS_SIGNEXTEND = 11, EVM_INS_LT = 16, EVM_INS_GT = 17, EVM_INS_SLT = 18, EVM_INS_SGT = 19, EVM_INS_EQ = 20, EVM_INS_ISZERO = 21, EVM_INS_AND = 22, EVM_INS_OR = 23, EVM_INS_XOR = 24, EVM_INS_NOT = 25, EVM_INS_BYTE = 26, EVM_INS_SHA3 = 32, EVM_INS_ADDRESS = 48, EVM_INS_BALANCE = 49, EVM_INS_ORIGIN = 50, EVM_INS_CALLER = 51, EVM_INS_CALLVALUE = 52, EVM_INS_CALLDATALOAD = 53, EVM_INS_CALLDATASIZE = 54, EVM_INS_CALLDATACOPY = 55, EVM_INS_CODESIZE = 56, EVM_INS_CODECOPY = 57, EVM_INS_GASPRICE = 58, EVM_INS_EXTCODESIZE = 59, EVM_INS_EXTCODECOPY = 60, EVM_INS_RETURNDATASIZE = 61, EVM_INS_RETURNDATACOPY = 62, EVM_INS_BLOCKHASH = 64, EVM_INS_COINBASE = 65, EVM_INS_TIMESTAMP = 66, EVM_INS_NUMBER = 67, EVM_INS_DIFFICULTY = 68, EVM_INS_GASLIMIT = 69, EVM_INS_POP = 80, EVM_INS_MLOAD = 81, EVM_INS_MSTORE = 82, EVM_INS_MSTORE8 = 83, EVM_INS_SLOAD = 84, EVM_INS_SSTORE = 85, EVM_INS_JUMP = 86, EVM_INS_JUMPI = 87, EVM_INS_PC = 88, EVM_INS_MSIZE = 89, EVM_INS_GAS = 90, EVM_INS_JUMPDEST = 91, EVM_INS_PUSH1 = 96, EVM_INS_PUSH2 = 97, EVM_INS_PUSH3 = 98, EVM_INS_PUSH4 = 99, EVM_INS_PUSH5 = 100, EVM_INS_PUSH6 = 101, EVM_INS_PUSH7 = 102, EVM_INS_PUSH8 = 103, EVM_INS_PUSH9 = 104, EVM_INS_PUSH10 = 105, EVM_INS_PUSH11 = 106, EVM_INS_PUSH12 = 107, EVM_INS_PUSH13 = 108, EVM_INS_PUSH14 = 109, EVM_INS_PUSH15 = 110, EVM_INS_PUSH16 = 111, EVM_INS_PUSH17 = 112, EVM_INS_PUSH18 = 113, EVM_INS_PUSH19 = 114, EVM_INS_PUSH20 = 115, EVM_INS_PUSH21 = 116, EVM_INS_PUSH22 = 117, EVM_INS_PUSH23 = 118, EVM_INS_PUSH24 = 119, EVM_INS_PUSH25 = 120, EVM_INS_PUSH26 = 121, EVM_INS_PUSH27 = 122, EVM_INS_PUSH28 = 123, EVM_INS_PUSH29 = 124, EVM_INS_PUSH30 = 125, EVM_INS_PUSH31 = 126, EVM_INS_PUSH32 = 127, EVM_INS_DUP1 = 128, EVM_INS_DUP2 = 129, EVM_INS_DUP3 = 130, EVM_INS_DUP4 = 131, EVM_INS_DUP5 = 132, EVM_INS_DUP6 = 133, EVM_INS_DUP7 = 134, EVM_INS_DUP8 = 135, EVM_INS_DUP9 = 136, EVM_INS_DUP10 = 137, EVM_INS_DUP11 = 138, EVM_INS_DUP12 = 139, EVM_INS_DUP13 = 140, EVM_INS_DUP14 = 141, EVM_INS_DUP15 = 142, EVM_INS_DUP16 = 143, EVM_INS_SWAP1 = 144, EVM_INS_SWAP2 = 145, EVM_INS_SWAP3 = 146, EVM_INS_SWAP4 = 147, EVM_INS_SWAP5 = 148, EVM_INS_SWAP6 = 149, EVM_INS_SWAP7 = 150, EVM_INS_SWAP8 = 151, EVM_INS_SWAP9 = 152, EVM_INS_SWAP10 = 153, EVM_INS_SWAP11 = 154, EVM_INS_SWAP12 = 155, EVM_INS_SWAP13 = 156, EVM_INS_SWAP14 = 157, EVM_INS_SWAP15 = 158, EVM_INS_SWAP16 = 159, EVM_INS_LOG0 = 160, EVM_INS_LOG1 = 161, EVM_INS_LOG2 = 162, EVM_INS_LOG3 = 163, EVM_INS_LOG4 = 164, EVM_INS_CREATE = 240, EVM_INS_CALL = 241, EVM_INS_CALLCODE = 242, EVM_INS_RETURN = 243, EVM_INS_DELEGATECALL = 244, EVM_INS_CALLBLACKBOX = 245, EVM_INS_STATICCALL = 250, EVM_INS_REVERT = 253, EVM_INS_SUICIDE = 255, EVM_INS_INVALID = 512, EVM_INS_ENDING, // <-- mark the end of the list of instructions } evm_insn; /// Group of EVM instructions typedef enum evm_insn_group { EVM_GRP_INVALID = 0, ///< = CS_GRP_INVALID EVM_GRP_JUMP, ///< all jump instructions EVM_GRP_MATH = 8, ///< math instructions EVM_GRP_STACK_WRITE, ///< instructions write to stack EVM_GRP_STACK_READ, ///< instructions read from stack EVM_GRP_MEM_WRITE, ///< instructions write to memory EVM_GRP_MEM_READ, ///< instructions read from memory EVM_GRP_STORE_WRITE, ///< instructions write to storage EVM_GRP_STORE_READ, ///< instructions read from storage EVM_GRP_HALT, ///< instructions halt execution EVM_GRP_ENDING, ///< <-- mark the end of the list of groups } evm_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/m680x.h010066400017500001750000000300401363402546700205610ustar0000000000000000#ifndef CAPSTONE_M680X_H #define CAPSTONE_M680X_H /* Capstone Disassembly Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif #define M680X_OPERAND_COUNT 9 /// M680X registers and special registers typedef enum m680x_reg { M680X_REG_INVALID = 0, M680X_REG_A, ///< M6800/1/2/3/9, HD6301/9 M680X_REG_B, ///< M6800/1/2/3/9, HD6301/9 M680X_REG_E, ///< HD6309 M680X_REG_F, ///< HD6309 M680X_REG_0, ///< HD6309 M680X_REG_D, ///< M6801/3/9, HD6301/9 M680X_REG_W, ///< HD6309 M680X_REG_CC, ///< M6800/1/2/3/9, M6301/9 M680X_REG_DP, ///< M6809/M6309 M680X_REG_MD, ///< M6309 M680X_REG_HX, ///< M6808 M680X_REG_H, ///< M6808 M680X_REG_X, ///< M6800/1/2/3/9, M6301/9 M680X_REG_Y, ///< M6809/M6309 M680X_REG_S, ///< M6809/M6309 M680X_REG_U, ///< M6809/M6309 M680X_REG_V, ///< M6309 M680X_REG_Q, ///< M6309 M680X_REG_PC, ///< M6800/1/2/3/9, M6301/9 M680X_REG_TMP2, ///< CPU12 M680X_REG_TMP3, ///< CPU12 M680X_REG_ENDING, ///< <-- mark the end of the list of registers } m680x_reg; /// Operand type for instruction's operands typedef enum m680x_op_type { M680X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). M680X_OP_REGISTER, ///< = Register operand. M680X_OP_IMMEDIATE, ///< = Immediate operand. M680X_OP_INDEXED, ///< = Indexed addressing operand. M680X_OP_EXTENDED, ///< = Extended addressing operand. M680X_OP_DIRECT, ///< = Direct addressing operand. M680X_OP_RELATIVE, ///< = Relative addressing operand. M680X_OP_CONSTANT, ///< = constant operand (Displayed as number only). ///< Used e.g. for a bit index or page number. } m680x_op_type; // Supported bit values for mem.idx.offset_bits #define M680X_OFFSET_NONE 0 #define M680X_OFFSET_BITS_5 5 #define M680X_OFFSET_BITS_8 8 #define M680X_OFFSET_BITS_9 9 #define M680X_OFFSET_BITS_16 16 // Supported bit flags for mem.idx.flags // These flags can be combined #define M680X_IDX_INDIRECT 1 #define M680X_IDX_NO_COMMA 2 #define M680X_IDX_POST_INC_DEC 4 /// Instruction's operand referring to indexed addressing typedef struct m680x_op_idx { m680x_reg base_reg; ///< base register (or M680X_REG_INVALID if ///< irrelevant) m680x_reg offset_reg; ///< offset register (or M680X_REG_INVALID if ///< irrelevant) int16_t offset; ///< 5-,8- or 16-bit offset. See also offset_bits. uint16_t offset_addr; ///< = offset addr. if base_reg == M680X_REG_PC. ///< calculated as offset + PC uint8_t offset_bits; ///< offset width in bits for indexed addressing int8_t inc_dec; ///< inc. or dec. value: ///< 0: no inc-/decrement ///< 1 .. 8: increment by 1 .. 8 ///< -1 .. -8: decrement by 1 .. 8 ///< if flag M680X_IDX_POST_INC_DEC set it is post ///< inc-/decrement otherwise pre inc-/decrement uint8_t flags; ///< 8-bit flags (see above) } m680x_op_idx; /// Instruction's memory operand referring to relative addressing (Bcc/LBcc) typedef struct m680x_op_rel { uint16_t address; ///< The absolute address. ///< calculated as PC + offset. PC is the first ///< address after the instruction. int16_t offset; ///< the offset/displacement value } m680x_op_rel; /// Instruction's operand referring to extended addressing typedef struct m680x_op_ext { uint16_t address; ///< The absolute address bool indirect; ///< true if extended indirect addressing } m680x_op_ext; /// Instruction operand typedef struct cs_m680x_op { m680x_op_type type; union { int32_t imm; ///< immediate value for IMM operand m680x_reg reg; ///< register value for REG operand m680x_op_idx idx; ///< Indexed addressing operand m680x_op_rel rel; ///< Relative address. operand (Bcc/LBcc) m680x_op_ext ext; ///< Extended address uint8_t direct_addr; ///<, 2015-2016 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif #define M68K_OPERAND_COUNT 4 /// M68K registers and special registers typedef enum m68k_reg { M68K_REG_INVALID = 0, M68K_REG_D0, M68K_REG_D1, M68K_REG_D2, M68K_REG_D3, M68K_REG_D4, M68K_REG_D5, M68K_REG_D6, M68K_REG_D7, M68K_REG_A0, M68K_REG_A1, M68K_REG_A2, M68K_REG_A3, M68K_REG_A4, M68K_REG_A5, M68K_REG_A6, M68K_REG_A7, M68K_REG_FP0, M68K_REG_FP1, M68K_REG_FP2, M68K_REG_FP3, M68K_REG_FP4, M68K_REG_FP5, M68K_REG_FP6, M68K_REG_FP7, M68K_REG_PC, M68K_REG_SR, M68K_REG_CCR, M68K_REG_SFC, M68K_REG_DFC, M68K_REG_USP, M68K_REG_VBR, M68K_REG_CACR, M68K_REG_CAAR, M68K_REG_MSP, M68K_REG_ISP, M68K_REG_TC, M68K_REG_ITT0, M68K_REG_ITT1, M68K_REG_DTT0, M68K_REG_DTT1, M68K_REG_MMUSR, M68K_REG_URP, M68K_REG_SRP, M68K_REG_FPCR, M68K_REG_FPSR, M68K_REG_FPIAR, M68K_REG_ENDING, // <-- mark the end of the list of registers } m68k_reg; /// M68K Addressing Modes typedef enum m68k_address_mode { M68K_AM_NONE = 0, ///< No address mode. M68K_AM_REG_DIRECT_DATA, ///< Register Direct - Data M68K_AM_REG_DIRECT_ADDR, ///< Register Direct - Address M68K_AM_REGI_ADDR, ///< Register Indirect - Address M68K_AM_REGI_ADDR_POST_INC, ///< Register Indirect - Address with Postincrement M68K_AM_REGI_ADDR_PRE_DEC, ///< Register Indirect - Address with Predecrement M68K_AM_REGI_ADDR_DISP, ///< Register Indirect - Address with Displacement M68K_AM_AREGI_INDEX_8_BIT_DISP, ///< Address Register Indirect With Index- 8-bit displacement M68K_AM_AREGI_INDEX_BASE_DISP, ///< Address Register Indirect With Index- Base displacement M68K_AM_MEMI_POST_INDEX, ///< Memory indirect - Postindex M68K_AM_MEMI_PRE_INDEX, ///< Memory indirect - Preindex M68K_AM_PCI_DISP, ///< Program Counter Indirect - with Displacement M68K_AM_PCI_INDEX_8_BIT_DISP, ///< Program Counter Indirect with Index - with 8-Bit Displacement M68K_AM_PCI_INDEX_BASE_DISP, ///< Program Counter Indirect with Index - with Base Displacement M68K_AM_PC_MEMI_POST_INDEX, ///< Program Counter Memory Indirect - Postindexed M68K_AM_PC_MEMI_PRE_INDEX, ///< Program Counter Memory Indirect - Preindexed M68K_AM_ABSOLUTE_DATA_SHORT, ///< Absolute Data Addressing - Short M68K_AM_ABSOLUTE_DATA_LONG, ///< Absolute Data Addressing - Long M68K_AM_IMMEDIATE, ///< Immediate value M68K_AM_BRANCH_DISPLACEMENT, ///< Address as displacement from (PC+2) used by branches } m68k_address_mode; /// Operand type for instruction's operands typedef enum m68k_op_type { M68K_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). M68K_OP_REG, ///< = CS_OP_REG (Register operand). M68K_OP_IMM, ///< = CS_OP_IMM (Immediate operand). M68K_OP_MEM, ///< = CS_OP_MEM (Memory operand). M68K_OP_FP_SINGLE, ///< single precision Floating-Point operand M68K_OP_FP_DOUBLE, ///< double precision Floating-Point operand M68K_OP_REG_BITS, ///< Register bits move M68K_OP_REG_PAIR, ///< Register pair in the same op (upper 4 bits for first reg, lower for second) M68K_OP_BR_DISP, ///< Branch displacement } m68k_op_type; /// Instruction's operand referring to memory /// This is associated with M68K_OP_MEM operand type above typedef struct m68k_op_mem { m68k_reg base_reg; ///< base register (or M68K_REG_INVALID if irrelevant) m68k_reg index_reg; ///< index register (or M68K_REG_INVALID if irrelevant) m68k_reg in_base_reg; ///< indirect base register (or M68K_REG_INVALID if irrelevant) uint32_t in_disp; ///< indirect displacement uint32_t out_disp; ///< other displacement int16_t disp; ///< displacement value uint8_t scale; ///< scale for index register uint8_t bitfield; ///< set to true if the two values below should be used uint8_t width; ///< used for bf* instructions uint8_t offset; ///< used for bf* instructions uint8_t index_size; ///< 0 = w, 1 = l } m68k_op_mem; /// Operand type for instruction's operands typedef enum m68k_op_br_disp_size { M68K_OP_BR_DISP_SIZE_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). M68K_OP_BR_DISP_SIZE_BYTE = 1, ///< signed 8-bit displacement M68K_OP_BR_DISP_SIZE_WORD = 2, ///< signed 16-bit displacement M68K_OP_BR_DISP_SIZE_LONG = 4, ///< signed 32-bit displacement } m68k_op_br_disp_size; typedef struct m68k_op_br_disp { int32_t disp; ///< displacement value uint8_t disp_size; ///< Size from m68k_op_br_disp_size type above } m68k_op_br_disp; /// Instruction operand typedef struct cs_m68k_op { union { uint64_t imm; ///< immediate value for IMM operand double dimm; ///< double imm float simm; ///< float imm m68k_reg reg; ///< register value for REG operand struct { ///< register pair in one operand m68k_reg reg_0; m68k_reg reg_1; } reg_pair; }; m68k_op_mem mem; ///< data when operand is targeting memory m68k_op_br_disp br_disp; ///< data when operand is a branch displacement uint32_t register_bits; ///< register bits for movem etc. (always in d0-d7, a0-a7, fp0 - fp7 order) m68k_op_type type; m68k_address_mode address_mode; ///< M68K addressing mode for this op } cs_m68k_op; /// Operation size of the CPU instructions typedef enum m68k_cpu_size { M68K_CPU_SIZE_NONE = 0, ///< unsized or unspecified M68K_CPU_SIZE_BYTE = 1, ///< 1 byte in size M68K_CPU_SIZE_WORD = 2, ///< 2 bytes in size M68K_CPU_SIZE_LONG = 4, ///< 4 bytes in size } m68k_cpu_size; /// Operation size of the FPU instructions (Notice that FPU instruction can also use CPU sizes if needed) typedef enum m68k_fpu_size { M68K_FPU_SIZE_NONE = 0, ///< unsized like fsave/frestore M68K_FPU_SIZE_SINGLE = 4, ///< 4 byte in size (single float) M68K_FPU_SIZE_DOUBLE = 8, ///< 8 byte in size (double) M68K_FPU_SIZE_EXTENDED = 12, ///< 12 byte in size (extended real format) } m68k_fpu_size; /// Type of size that is being used for the current instruction typedef enum m68k_size_type { M68K_SIZE_TYPE_INVALID = 0, M68K_SIZE_TYPE_CPU, M68K_SIZE_TYPE_FPU, } m68k_size_type; /// Operation size of the current instruction (NOT the actually size of instruction) typedef struct m68k_op_size { m68k_size_type type; union { m68k_cpu_size cpu_size; m68k_fpu_size fpu_size; }; } m68k_op_size; /// The M68K instruction and it's operands typedef struct cs_m68k { // Number of operands of this instruction or 0 when instruction has no operand. cs_m68k_op operands[M68K_OPERAND_COUNT]; ///< operands for this instruction. m68k_op_size op_size; ///< size of data operand works on in bytes (.b, .w, .l, etc) uint8_t op_count; ///< number of operands for the instruction } cs_m68k; /// M68K instruction typedef enum m68k_insn { M68K_INS_INVALID = 0, M68K_INS_ABCD, M68K_INS_ADD, M68K_INS_ADDA, M68K_INS_ADDI, M68K_INS_ADDQ, M68K_INS_ADDX, M68K_INS_AND, M68K_INS_ANDI, M68K_INS_ASL, M68K_INS_ASR, M68K_INS_BHS, M68K_INS_BLO, M68K_INS_BHI, M68K_INS_BLS, M68K_INS_BCC, M68K_INS_BCS, M68K_INS_BNE, M68K_INS_BEQ, M68K_INS_BVC, M68K_INS_BVS, M68K_INS_BPL, M68K_INS_BMI, M68K_INS_BGE, M68K_INS_BLT, M68K_INS_BGT, M68K_INS_BLE, M68K_INS_BRA, M68K_INS_BSR, M68K_INS_BCHG, M68K_INS_BCLR, M68K_INS_BSET, M68K_INS_BTST, M68K_INS_BFCHG, M68K_INS_BFCLR, M68K_INS_BFEXTS, M68K_INS_BFEXTU, M68K_INS_BFFFO, M68K_INS_BFINS, M68K_INS_BFSET, M68K_INS_BFTST, M68K_INS_BKPT, M68K_INS_CALLM, M68K_INS_CAS, M68K_INS_CAS2, M68K_INS_CHK, M68K_INS_CHK2, M68K_INS_CLR, M68K_INS_CMP, M68K_INS_CMPA, M68K_INS_CMPI, M68K_INS_CMPM, M68K_INS_CMP2, M68K_INS_CINVL, M68K_INS_CINVP, M68K_INS_CINVA, M68K_INS_CPUSHL, M68K_INS_CPUSHP, M68K_INS_CPUSHA, M68K_INS_DBT, M68K_INS_DBF, M68K_INS_DBHI, M68K_INS_DBLS, M68K_INS_DBCC, M68K_INS_DBCS, M68K_INS_DBNE, M68K_INS_DBEQ, M68K_INS_DBVC, M68K_INS_DBVS, M68K_INS_DBPL, M68K_INS_DBMI, M68K_INS_DBGE, M68K_INS_DBLT, M68K_INS_DBGT, M68K_INS_DBLE, M68K_INS_DBRA, M68K_INS_DIVS, M68K_INS_DIVSL, M68K_INS_DIVU, M68K_INS_DIVUL, M68K_INS_EOR, M68K_INS_EORI, M68K_INS_EXG, M68K_INS_EXT, M68K_INS_EXTB, M68K_INS_FABS, M68K_INS_FSABS, M68K_INS_FDABS, M68K_INS_FACOS, M68K_INS_FADD, M68K_INS_FSADD, M68K_INS_FDADD, M68K_INS_FASIN, M68K_INS_FATAN, M68K_INS_FATANH, M68K_INS_FBF, M68K_INS_FBEQ, M68K_INS_FBOGT, M68K_INS_FBOGE, M68K_INS_FBOLT, M68K_INS_FBOLE, M68K_INS_FBOGL, M68K_INS_FBOR, M68K_INS_FBUN, M68K_INS_FBUEQ, M68K_INS_FBUGT, M68K_INS_FBUGE, M68K_INS_FBULT, M68K_INS_FBULE, M68K_INS_FBNE, M68K_INS_FBT, M68K_INS_FBSF, M68K_INS_FBSEQ, M68K_INS_FBGT, M68K_INS_FBGE, M68K_INS_FBLT, M68K_INS_FBLE, M68K_INS_FBGL, M68K_INS_FBGLE, M68K_INS_FBNGLE, M68K_INS_FBNGL, M68K_INS_FBNLE, M68K_INS_FBNLT, M68K_INS_FBNGE, M68K_INS_FBNGT, M68K_INS_FBSNE, M68K_INS_FBST, M68K_INS_FCMP, M68K_INS_FCOS, M68K_INS_FCOSH, M68K_INS_FDBF, M68K_INS_FDBEQ, M68K_INS_FDBOGT, M68K_INS_FDBOGE, M68K_INS_FDBOLT, M68K_INS_FDBOLE, M68K_INS_FDBOGL, M68K_INS_FDBOR, M68K_INS_FDBUN, M68K_INS_FDBUEQ, M68K_INS_FDBUGT, M68K_INS_FDBUGE, M68K_INS_FDBULT, M68K_INS_FDBULE, M68K_INS_FDBNE, M68K_INS_FDBT, M68K_INS_FDBSF, M68K_INS_FDBSEQ, M68K_INS_FDBGT, M68K_INS_FDBGE, M68K_INS_FDBLT, M68K_INS_FDBLE, M68K_INS_FDBGL, M68K_INS_FDBGLE, M68K_INS_FDBNGLE, M68K_INS_FDBNGL, M68K_INS_FDBNLE, M68K_INS_FDBNLT, M68K_INS_FDBNGE, M68K_INS_FDBNGT, M68K_INS_FDBSNE, M68K_INS_FDBST, M68K_INS_FDIV, M68K_INS_FSDIV, M68K_INS_FDDIV, M68K_INS_FETOX, M68K_INS_FETOXM1, M68K_INS_FGETEXP, M68K_INS_FGETMAN, M68K_INS_FINT, M68K_INS_FINTRZ, M68K_INS_FLOG10, M68K_INS_FLOG2, M68K_INS_FLOGN, M68K_INS_FLOGNP1, M68K_INS_FMOD, M68K_INS_FMOVE, M68K_INS_FSMOVE, M68K_INS_FDMOVE, M68K_INS_FMOVECR, M68K_INS_FMOVEM, M68K_INS_FMUL, M68K_INS_FSMUL, M68K_INS_FDMUL, M68K_INS_FNEG, M68K_INS_FSNEG, M68K_INS_FDNEG, M68K_INS_FNOP, M68K_INS_FREM, M68K_INS_FRESTORE, M68K_INS_FSAVE, M68K_INS_FSCALE, M68K_INS_FSGLDIV, M68K_INS_FSGLMUL, M68K_INS_FSIN, M68K_INS_FSINCOS, M68K_INS_FSINH, M68K_INS_FSQRT, M68K_INS_FSSQRT, M68K_INS_FDSQRT, M68K_INS_FSF, M68K_INS_FSBEQ, M68K_INS_FSOGT, M68K_INS_FSOGE, M68K_INS_FSOLT, M68K_INS_FSOLE, M68K_INS_FSOGL, M68K_INS_FSOR, M68K_INS_FSUN, M68K_INS_FSUEQ, M68K_INS_FSUGT, M68K_INS_FSUGE, M68K_INS_FSULT, M68K_INS_FSULE, M68K_INS_FSNE, M68K_INS_FST, M68K_INS_FSSF, M68K_INS_FSSEQ, M68K_INS_FSGT, M68K_INS_FSGE, M68K_INS_FSLT, M68K_INS_FSLE, M68K_INS_FSGL, M68K_INS_FSGLE, M68K_INS_FSNGLE, M68K_INS_FSNGL, M68K_INS_FSNLE, M68K_INS_FSNLT, M68K_INS_FSNGE, M68K_INS_FSNGT, M68K_INS_FSSNE, M68K_INS_FSST, M68K_INS_FSUB, M68K_INS_FSSUB, M68K_INS_FDSUB, M68K_INS_FTAN, M68K_INS_FTANH, M68K_INS_FTENTOX, M68K_INS_FTRAPF, M68K_INS_FTRAPEQ, M68K_INS_FTRAPOGT, M68K_INS_FTRAPOGE, M68K_INS_FTRAPOLT, M68K_INS_FTRAPOLE, M68K_INS_FTRAPOGL, M68K_INS_FTRAPOR, M68K_INS_FTRAPUN, M68K_INS_FTRAPUEQ, M68K_INS_FTRAPUGT, M68K_INS_FTRAPUGE, M68K_INS_FTRAPULT, M68K_INS_FTRAPULE, M68K_INS_FTRAPNE, M68K_INS_FTRAPT, M68K_INS_FTRAPSF, M68K_INS_FTRAPSEQ, M68K_INS_FTRAPGT, M68K_INS_FTRAPGE, M68K_INS_FTRAPLT, M68K_INS_FTRAPLE, M68K_INS_FTRAPGL, M68K_INS_FTRAPGLE, M68K_INS_FTRAPNGLE, M68K_INS_FTRAPNGL, M68K_INS_FTRAPNLE, M68K_INS_FTRAPNLT, M68K_INS_FTRAPNGE, M68K_INS_FTRAPNGT, M68K_INS_FTRAPSNE, M68K_INS_FTRAPST, M68K_INS_FTST, M68K_INS_FTWOTOX, M68K_INS_HALT, M68K_INS_ILLEGAL, M68K_INS_JMP, M68K_INS_JSR, M68K_INS_LEA, M68K_INS_LINK, M68K_INS_LPSTOP, M68K_INS_LSL, M68K_INS_LSR, M68K_INS_MOVE, M68K_INS_MOVEA, M68K_INS_MOVEC, M68K_INS_MOVEM, M68K_INS_MOVEP, M68K_INS_MOVEQ, M68K_INS_MOVES, M68K_INS_MOVE16, M68K_INS_MULS, M68K_INS_MULU, M68K_INS_NBCD, M68K_INS_NEG, M68K_INS_NEGX, M68K_INS_NOP, M68K_INS_NOT, M68K_INS_OR, M68K_INS_ORI, M68K_INS_PACK, M68K_INS_PEA, M68K_INS_PFLUSH, M68K_INS_PFLUSHA, M68K_INS_PFLUSHAN, M68K_INS_PFLUSHN, M68K_INS_PLOADR, M68K_INS_PLOADW, M68K_INS_PLPAR, M68K_INS_PLPAW, M68K_INS_PMOVE, M68K_INS_PMOVEFD, M68K_INS_PTESTR, M68K_INS_PTESTW, M68K_INS_PULSE, M68K_INS_REMS, M68K_INS_REMU, M68K_INS_RESET, M68K_INS_ROL, M68K_INS_ROR, M68K_INS_ROXL, M68K_INS_ROXR, M68K_INS_RTD, M68K_INS_RTE, M68K_INS_RTM, M68K_INS_RTR, M68K_INS_RTS, M68K_INS_SBCD, M68K_INS_ST, M68K_INS_SF, M68K_INS_SHI, M68K_INS_SLS, M68K_INS_SCC, M68K_INS_SHS, M68K_INS_SCS, M68K_INS_SLO, M68K_INS_SNE, M68K_INS_SEQ, M68K_INS_SVC, M68K_INS_SVS, M68K_INS_SPL, M68K_INS_SMI, M68K_INS_SGE, M68K_INS_SLT, M68K_INS_SGT, M68K_INS_SLE, M68K_INS_STOP, M68K_INS_SUB, M68K_INS_SUBA, M68K_INS_SUBI, M68K_INS_SUBQ, M68K_INS_SUBX, M68K_INS_SWAP, M68K_INS_TAS, M68K_INS_TRAP, M68K_INS_TRAPV, M68K_INS_TRAPT, M68K_INS_TRAPF, M68K_INS_TRAPHI, M68K_INS_TRAPLS, M68K_INS_TRAPCC, M68K_INS_TRAPHS, M68K_INS_TRAPCS, M68K_INS_TRAPLO, M68K_INS_TRAPNE, M68K_INS_TRAPEQ, M68K_INS_TRAPVC, M68K_INS_TRAPVS, M68K_INS_TRAPPL, M68K_INS_TRAPMI, M68K_INS_TRAPGE, M68K_INS_TRAPLT, M68K_INS_TRAPGT, M68K_INS_TRAPLE, M68K_INS_TST, M68K_INS_UNLK, M68K_INS_UNPK, M68K_INS_ENDING, // <-- mark the end of the list of instructions } m68k_insn; /// Group of M68K instructions typedef enum m68k_group_type { M68K_GRP_INVALID = 0, ///< CS_GRUP_INVALID M68K_GRP_JUMP, ///< = CS_GRP_JUMP M68K_GRP_RET = 3, ///< = CS_GRP_RET M68K_GRP_IRET = 5, ///< = CS_GRP_IRET M68K_GRP_BRANCH_RELATIVE = 7, ///< = CS_GRP_BRANCH_RELATIVE M68K_GRP_ENDING,// <-- mark the end of the list of groups } m68k_group_type; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/mips.h010066400017500001750000000412271363402546700206600ustar0000000000000000#ifndef CAPSTONE_MIPS_H #define CAPSTONE_MIPS_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" // GCC MIPS toolchain has a default macro called "mips" which breaks // compilation #undef mips #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// Operand type for instruction's operands typedef enum mips_op_type { MIPS_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). MIPS_OP_REG, ///< = CS_OP_REG (Register operand). MIPS_OP_IMM, ///< = CS_OP_IMM (Immediate operand). MIPS_OP_MEM, ///< = CS_OP_MEM (Memory operand). } mips_op_type; /// MIPS registers typedef enum mips_reg { MIPS_REG_INVALID = 0, // General purpose registers MIPS_REG_PC, MIPS_REG_0, MIPS_REG_1, MIPS_REG_2, MIPS_REG_3, MIPS_REG_4, MIPS_REG_5, MIPS_REG_6, MIPS_REG_7, MIPS_REG_8, MIPS_REG_9, MIPS_REG_10, MIPS_REG_11, MIPS_REG_12, MIPS_REG_13, MIPS_REG_14, MIPS_REG_15, MIPS_REG_16, MIPS_REG_17, MIPS_REG_18, MIPS_REG_19, MIPS_REG_20, MIPS_REG_21, MIPS_REG_22, MIPS_REG_23, MIPS_REG_24, MIPS_REG_25, MIPS_REG_26, MIPS_REG_27, MIPS_REG_28, MIPS_REG_29, MIPS_REG_30, MIPS_REG_31, // DSP registers MIPS_REG_DSPCCOND, MIPS_REG_DSPCARRY, MIPS_REG_DSPEFI, MIPS_REG_DSPOUTFLAG, MIPS_REG_DSPOUTFLAG16_19, MIPS_REG_DSPOUTFLAG20, MIPS_REG_DSPOUTFLAG21, MIPS_REG_DSPOUTFLAG22, MIPS_REG_DSPOUTFLAG23, MIPS_REG_DSPPOS, MIPS_REG_DSPSCOUNT, // ACC registers MIPS_REG_AC0, MIPS_REG_AC1, MIPS_REG_AC2, MIPS_REG_AC3, // COP registers MIPS_REG_CC0, MIPS_REG_CC1, MIPS_REG_CC2, MIPS_REG_CC3, MIPS_REG_CC4, MIPS_REG_CC5, MIPS_REG_CC6, MIPS_REG_CC7, // FPU registers MIPS_REG_F0, MIPS_REG_F1, MIPS_REG_F2, MIPS_REG_F3, MIPS_REG_F4, MIPS_REG_F5, MIPS_REG_F6, MIPS_REG_F7, MIPS_REG_F8, MIPS_REG_F9, MIPS_REG_F10, MIPS_REG_F11, MIPS_REG_F12, MIPS_REG_F13, MIPS_REG_F14, MIPS_REG_F15, MIPS_REG_F16, MIPS_REG_F17, MIPS_REG_F18, MIPS_REG_F19, MIPS_REG_F20, MIPS_REG_F21, MIPS_REG_F22, MIPS_REG_F23, MIPS_REG_F24, MIPS_REG_F25, MIPS_REG_F26, MIPS_REG_F27, MIPS_REG_F28, MIPS_REG_F29, MIPS_REG_F30, MIPS_REG_F31, MIPS_REG_FCC0, MIPS_REG_FCC1, MIPS_REG_FCC2, MIPS_REG_FCC3, MIPS_REG_FCC4, MIPS_REG_FCC5, MIPS_REG_FCC6, MIPS_REG_FCC7, // AFPR128 MIPS_REG_W0, MIPS_REG_W1, MIPS_REG_W2, MIPS_REG_W3, MIPS_REG_W4, MIPS_REG_W5, MIPS_REG_W6, MIPS_REG_W7, MIPS_REG_W8, MIPS_REG_W9, MIPS_REG_W10, MIPS_REG_W11, MIPS_REG_W12, MIPS_REG_W13, MIPS_REG_W14, MIPS_REG_W15, MIPS_REG_W16, MIPS_REG_W17, MIPS_REG_W18, MIPS_REG_W19, MIPS_REG_W20, MIPS_REG_W21, MIPS_REG_W22, MIPS_REG_W23, MIPS_REG_W24, MIPS_REG_W25, MIPS_REG_W26, MIPS_REG_W27, MIPS_REG_W28, MIPS_REG_W29, MIPS_REG_W30, MIPS_REG_W31, MIPS_REG_HI, MIPS_REG_LO, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, MIPS_REG_MPL0, MIPS_REG_MPL1, MIPS_REG_MPL2, MIPS_REG_ENDING, // <-- mark the end of the list or registers // alias registers MIPS_REG_ZERO = MIPS_REG_0, MIPS_REG_AT = MIPS_REG_1, MIPS_REG_V0 = MIPS_REG_2, MIPS_REG_V1 = MIPS_REG_3, MIPS_REG_A0 = MIPS_REG_4, MIPS_REG_A1 = MIPS_REG_5, MIPS_REG_A2 = MIPS_REG_6, MIPS_REG_A3 = MIPS_REG_7, MIPS_REG_T0 = MIPS_REG_8, MIPS_REG_T1 = MIPS_REG_9, MIPS_REG_T2 = MIPS_REG_10, MIPS_REG_T3 = MIPS_REG_11, MIPS_REG_T4 = MIPS_REG_12, MIPS_REG_T5 = MIPS_REG_13, MIPS_REG_T6 = MIPS_REG_14, MIPS_REG_T7 = MIPS_REG_15, MIPS_REG_S0 = MIPS_REG_16, MIPS_REG_S1 = MIPS_REG_17, MIPS_REG_S2 = MIPS_REG_18, MIPS_REG_S3 = MIPS_REG_19, MIPS_REG_S4 = MIPS_REG_20, MIPS_REG_S5 = MIPS_REG_21, MIPS_REG_S6 = MIPS_REG_22, MIPS_REG_S7 = MIPS_REG_23, MIPS_REG_T8 = MIPS_REG_24, MIPS_REG_T9 = MIPS_REG_25, MIPS_REG_K0 = MIPS_REG_26, MIPS_REG_K1 = MIPS_REG_27, MIPS_REG_GP = MIPS_REG_28, MIPS_REG_SP = MIPS_REG_29, MIPS_REG_FP = MIPS_REG_30, MIPS_REG_S8 = MIPS_REG_30, MIPS_REG_RA = MIPS_REG_31, MIPS_REG_HI0 = MIPS_REG_AC0, MIPS_REG_HI1 = MIPS_REG_AC1, MIPS_REG_HI2 = MIPS_REG_AC2, MIPS_REG_HI3 = MIPS_REG_AC3, MIPS_REG_LO0 = MIPS_REG_HI0, MIPS_REG_LO1 = MIPS_REG_HI1, MIPS_REG_LO2 = MIPS_REG_HI2, MIPS_REG_LO3 = MIPS_REG_HI3, } mips_reg; /// Instruction's operand referring to memory /// This is associated with MIPS_OP_MEM operand type above typedef struct mips_op_mem { mips_reg base; ///< base register int64_t disp; ///< displacement/offset value } mips_op_mem; /// Instruction operand typedef struct cs_mips_op { mips_op_type type; ///< operand type union { mips_reg reg; ///< register value for REG operand int64_t imm; ///< immediate value for IMM operand mips_op_mem mem; ///< base/index/scale/disp value for MEM operand }; } cs_mips_op; /// Instruction structure typedef struct cs_mips { /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_mips_op operands[10]; ///< operands for this instruction. } cs_mips; /// MIPS instruction typedef enum mips_insn { MIPS_INS_INVALID = 0, MIPS_INS_ABSQ_S, MIPS_INS_ADD, MIPS_INS_ADDIUPC, MIPS_INS_ADDIUR1SP, MIPS_INS_ADDIUR2, MIPS_INS_ADDIUS5, MIPS_INS_ADDIUSP, MIPS_INS_ADDQH, MIPS_INS_ADDQH_R, MIPS_INS_ADDQ, MIPS_INS_ADDQ_S, MIPS_INS_ADDSC, MIPS_INS_ADDS_A, MIPS_INS_ADDS_S, MIPS_INS_ADDS_U, MIPS_INS_ADDU16, MIPS_INS_ADDUH, MIPS_INS_ADDUH_R, MIPS_INS_ADDU, MIPS_INS_ADDU_S, MIPS_INS_ADDVI, MIPS_INS_ADDV, MIPS_INS_ADDWC, MIPS_INS_ADD_A, MIPS_INS_ADDI, MIPS_INS_ADDIU, MIPS_INS_ALIGN, MIPS_INS_ALUIPC, MIPS_INS_AND, MIPS_INS_AND16, MIPS_INS_ANDI16, MIPS_INS_ANDI, MIPS_INS_APPEND, MIPS_INS_ASUB_S, MIPS_INS_ASUB_U, MIPS_INS_AUI, MIPS_INS_AUIPC, MIPS_INS_AVER_S, MIPS_INS_AVER_U, MIPS_INS_AVE_S, MIPS_INS_AVE_U, MIPS_INS_B16, MIPS_INS_BADDU, MIPS_INS_BAL, MIPS_INS_BALC, MIPS_INS_BALIGN, MIPS_INS_BBIT0, MIPS_INS_BBIT032, MIPS_INS_BBIT1, MIPS_INS_BBIT132, MIPS_INS_BC, MIPS_INS_BC0F, MIPS_INS_BC0FL, MIPS_INS_BC0T, MIPS_INS_BC0TL, MIPS_INS_BC1EQZ, MIPS_INS_BC1F, MIPS_INS_BC1FL, MIPS_INS_BC1NEZ, MIPS_INS_BC1T, MIPS_INS_BC1TL, MIPS_INS_BC2EQZ, MIPS_INS_BC2F, MIPS_INS_BC2FL, MIPS_INS_BC2NEZ, MIPS_INS_BC2T, MIPS_INS_BC2TL, MIPS_INS_BC3F, MIPS_INS_BC3FL, MIPS_INS_BC3T, MIPS_INS_BC3TL, MIPS_INS_BCLRI, MIPS_INS_BCLR, MIPS_INS_BEQ, MIPS_INS_BEQC, MIPS_INS_BEQL, MIPS_INS_BEQZ16, MIPS_INS_BEQZALC, MIPS_INS_BEQZC, MIPS_INS_BGEC, MIPS_INS_BGEUC, MIPS_INS_BGEZ, MIPS_INS_BGEZAL, MIPS_INS_BGEZALC, MIPS_INS_BGEZALL, MIPS_INS_BGEZALS, MIPS_INS_BGEZC, MIPS_INS_BGEZL, MIPS_INS_BGTZ, MIPS_INS_BGTZALC, MIPS_INS_BGTZC, MIPS_INS_BGTZL, MIPS_INS_BINSLI, MIPS_INS_BINSL, MIPS_INS_BINSRI, MIPS_INS_BINSR, MIPS_INS_BITREV, MIPS_INS_BITSWAP, MIPS_INS_BLEZ, MIPS_INS_BLEZALC, MIPS_INS_BLEZC, MIPS_INS_BLEZL, MIPS_INS_BLTC, MIPS_INS_BLTUC, MIPS_INS_BLTZ, MIPS_INS_BLTZAL, MIPS_INS_BLTZALC, MIPS_INS_BLTZALL, MIPS_INS_BLTZALS, MIPS_INS_BLTZC, MIPS_INS_BLTZL, MIPS_INS_BMNZI, MIPS_INS_BMNZ, MIPS_INS_BMZI, MIPS_INS_BMZ, MIPS_INS_BNE, MIPS_INS_BNEC, MIPS_INS_BNEGI, MIPS_INS_BNEG, MIPS_INS_BNEL, MIPS_INS_BNEZ16, MIPS_INS_BNEZALC, MIPS_INS_BNEZC, MIPS_INS_BNVC, MIPS_INS_BNZ, MIPS_INS_BOVC, MIPS_INS_BPOSGE32, MIPS_INS_BREAK, MIPS_INS_BREAK16, MIPS_INS_BSELI, MIPS_INS_BSEL, MIPS_INS_BSETI, MIPS_INS_BSET, MIPS_INS_BZ, MIPS_INS_BEQZ, MIPS_INS_B, MIPS_INS_BNEZ, MIPS_INS_BTEQZ, MIPS_INS_BTNEZ, MIPS_INS_CACHE, MIPS_INS_CEIL, MIPS_INS_CEQI, MIPS_INS_CEQ, MIPS_INS_CFC1, MIPS_INS_CFCMSA, MIPS_INS_CINS, MIPS_INS_CINS32, MIPS_INS_CLASS, MIPS_INS_CLEI_S, MIPS_INS_CLEI_U, MIPS_INS_CLE_S, MIPS_INS_CLE_U, MIPS_INS_CLO, MIPS_INS_CLTI_S, MIPS_INS_CLTI_U, MIPS_INS_CLT_S, MIPS_INS_CLT_U, MIPS_INS_CLZ, MIPS_INS_CMPGDU, MIPS_INS_CMPGU, MIPS_INS_CMPU, MIPS_INS_CMP, MIPS_INS_COPY_S, MIPS_INS_COPY_U, MIPS_INS_CTC1, MIPS_INS_CTCMSA, MIPS_INS_CVT, MIPS_INS_C, MIPS_INS_CMPI, MIPS_INS_DADD, MIPS_INS_DADDI, MIPS_INS_DADDIU, MIPS_INS_DADDU, MIPS_INS_DAHI, MIPS_INS_DALIGN, MIPS_INS_DATI, MIPS_INS_DAUI, MIPS_INS_DBITSWAP, MIPS_INS_DCLO, MIPS_INS_DCLZ, MIPS_INS_DDIV, MIPS_INS_DDIVU, MIPS_INS_DERET, MIPS_INS_DEXT, MIPS_INS_DEXTM, MIPS_INS_DEXTU, MIPS_INS_DI, MIPS_INS_DINS, MIPS_INS_DINSM, MIPS_INS_DINSU, MIPS_INS_DIV, MIPS_INS_DIVU, MIPS_INS_DIV_S, MIPS_INS_DIV_U, MIPS_INS_DLSA, MIPS_INS_DMFC0, MIPS_INS_DMFC1, MIPS_INS_DMFC2, MIPS_INS_DMOD, MIPS_INS_DMODU, MIPS_INS_DMTC0, MIPS_INS_DMTC1, MIPS_INS_DMTC2, MIPS_INS_DMUH, MIPS_INS_DMUHU, MIPS_INS_DMUL, MIPS_INS_DMULT, MIPS_INS_DMULTU, MIPS_INS_DMULU, MIPS_INS_DOTP_S, MIPS_INS_DOTP_U, MIPS_INS_DPADD_S, MIPS_INS_DPADD_U, MIPS_INS_DPAQX_SA, MIPS_INS_DPAQX_S, MIPS_INS_DPAQ_SA, MIPS_INS_DPAQ_S, MIPS_INS_DPAU, MIPS_INS_DPAX, MIPS_INS_DPA, MIPS_INS_DPOP, MIPS_INS_DPSQX_SA, MIPS_INS_DPSQX_S, MIPS_INS_DPSQ_SA, MIPS_INS_DPSQ_S, MIPS_INS_DPSUB_S, MIPS_INS_DPSUB_U, MIPS_INS_DPSU, MIPS_INS_DPSX, MIPS_INS_DPS, MIPS_INS_DROTR, MIPS_INS_DROTR32, MIPS_INS_DROTRV, MIPS_INS_DSBH, MIPS_INS_DSHD, MIPS_INS_DSLL, MIPS_INS_DSLL32, MIPS_INS_DSLLV, MIPS_INS_DSRA, MIPS_INS_DSRA32, MIPS_INS_DSRAV, MIPS_INS_DSRL, MIPS_INS_DSRL32, MIPS_INS_DSRLV, MIPS_INS_DSUB, MIPS_INS_DSUBU, MIPS_INS_EHB, MIPS_INS_EI, MIPS_INS_ERET, MIPS_INS_EXT, MIPS_INS_EXTP, MIPS_INS_EXTPDP, MIPS_INS_EXTPDPV, MIPS_INS_EXTPV, MIPS_INS_EXTRV_RS, MIPS_INS_EXTRV_R, MIPS_INS_EXTRV_S, MIPS_INS_EXTRV, MIPS_INS_EXTR_RS, MIPS_INS_EXTR_R, MIPS_INS_EXTR_S, MIPS_INS_EXTR, MIPS_INS_EXTS, MIPS_INS_EXTS32, MIPS_INS_ABS, MIPS_INS_FADD, MIPS_INS_FCAF, MIPS_INS_FCEQ, MIPS_INS_FCLASS, MIPS_INS_FCLE, MIPS_INS_FCLT, MIPS_INS_FCNE, MIPS_INS_FCOR, MIPS_INS_FCUEQ, MIPS_INS_FCULE, MIPS_INS_FCULT, MIPS_INS_FCUNE, MIPS_INS_FCUN, MIPS_INS_FDIV, MIPS_INS_FEXDO, MIPS_INS_FEXP2, MIPS_INS_FEXUPL, MIPS_INS_FEXUPR, MIPS_INS_FFINT_S, MIPS_INS_FFINT_U, MIPS_INS_FFQL, MIPS_INS_FFQR, MIPS_INS_FILL, MIPS_INS_FLOG2, MIPS_INS_FLOOR, MIPS_INS_FMADD, MIPS_INS_FMAX_A, MIPS_INS_FMAX, MIPS_INS_FMIN_A, MIPS_INS_FMIN, MIPS_INS_MOV, MIPS_INS_FMSUB, MIPS_INS_FMUL, MIPS_INS_MUL, MIPS_INS_NEG, MIPS_INS_FRCP, MIPS_INS_FRINT, MIPS_INS_FRSQRT, MIPS_INS_FSAF, MIPS_INS_FSEQ, MIPS_INS_FSLE, MIPS_INS_FSLT, MIPS_INS_FSNE, MIPS_INS_FSOR, MIPS_INS_FSQRT, MIPS_INS_SQRT, MIPS_INS_FSUB, MIPS_INS_SUB, MIPS_INS_FSUEQ, MIPS_INS_FSULE, MIPS_INS_FSULT, MIPS_INS_FSUNE, MIPS_INS_FSUN, MIPS_INS_FTINT_S, MIPS_INS_FTINT_U, MIPS_INS_FTQ, MIPS_INS_FTRUNC_S, MIPS_INS_FTRUNC_U, MIPS_INS_HADD_S, MIPS_INS_HADD_U, MIPS_INS_HSUB_S, MIPS_INS_HSUB_U, MIPS_INS_ILVEV, MIPS_INS_ILVL, MIPS_INS_ILVOD, MIPS_INS_ILVR, MIPS_INS_INS, MIPS_INS_INSERT, MIPS_INS_INSV, MIPS_INS_INSVE, MIPS_INS_J, MIPS_INS_JAL, MIPS_INS_JALR, MIPS_INS_JALRS16, MIPS_INS_JALRS, MIPS_INS_JALS, MIPS_INS_JALX, MIPS_INS_JIALC, MIPS_INS_JIC, MIPS_INS_JR, MIPS_INS_JR16, MIPS_INS_JRADDIUSP, MIPS_INS_JRC, MIPS_INS_JALRC, MIPS_INS_LB, MIPS_INS_LBU16, MIPS_INS_LBUX, MIPS_INS_LBU, MIPS_INS_LD, MIPS_INS_LDC1, MIPS_INS_LDC2, MIPS_INS_LDC3, MIPS_INS_LDI, MIPS_INS_LDL, MIPS_INS_LDPC, MIPS_INS_LDR, MIPS_INS_LDXC1, MIPS_INS_LH, MIPS_INS_LHU16, MIPS_INS_LHX, MIPS_INS_LHU, MIPS_INS_LI16, MIPS_INS_LL, MIPS_INS_LLD, MIPS_INS_LSA, MIPS_INS_LUXC1, MIPS_INS_LUI, MIPS_INS_LW, MIPS_INS_LW16, MIPS_INS_LWC1, MIPS_INS_LWC2, MIPS_INS_LWC3, MIPS_INS_LWL, MIPS_INS_LWM16, MIPS_INS_LWM32, MIPS_INS_LWPC, MIPS_INS_LWP, MIPS_INS_LWR, MIPS_INS_LWUPC, MIPS_INS_LWU, MIPS_INS_LWX, MIPS_INS_LWXC1, MIPS_INS_LWXS, MIPS_INS_LI, MIPS_INS_MADD, MIPS_INS_MADDF, MIPS_INS_MADDR_Q, MIPS_INS_MADDU, MIPS_INS_MADDV, MIPS_INS_MADD_Q, MIPS_INS_MAQ_SA, MIPS_INS_MAQ_S, MIPS_INS_MAXA, MIPS_INS_MAXI_S, MIPS_INS_MAXI_U, MIPS_INS_MAX_A, MIPS_INS_MAX, MIPS_INS_MAX_S, MIPS_INS_MAX_U, MIPS_INS_MFC0, MIPS_INS_MFC1, MIPS_INS_MFC2, MIPS_INS_MFHC1, MIPS_INS_MFHI, MIPS_INS_MFLO, MIPS_INS_MINA, MIPS_INS_MINI_S, MIPS_INS_MINI_U, MIPS_INS_MIN_A, MIPS_INS_MIN, MIPS_INS_MIN_S, MIPS_INS_MIN_U, MIPS_INS_MOD, MIPS_INS_MODSUB, MIPS_INS_MODU, MIPS_INS_MOD_S, MIPS_INS_MOD_U, MIPS_INS_MOVE, MIPS_INS_MOVEP, MIPS_INS_MOVF, MIPS_INS_MOVN, MIPS_INS_MOVT, MIPS_INS_MOVZ, MIPS_INS_MSUB, MIPS_INS_MSUBF, MIPS_INS_MSUBR_Q, MIPS_INS_MSUBU, MIPS_INS_MSUBV, MIPS_INS_MSUB_Q, MIPS_INS_MTC0, MIPS_INS_MTC1, MIPS_INS_MTC2, MIPS_INS_MTHC1, MIPS_INS_MTHI, MIPS_INS_MTHLIP, MIPS_INS_MTLO, MIPS_INS_MTM0, MIPS_INS_MTM1, MIPS_INS_MTM2, MIPS_INS_MTP0, MIPS_INS_MTP1, MIPS_INS_MTP2, MIPS_INS_MUH, MIPS_INS_MUHU, MIPS_INS_MULEQ_S, MIPS_INS_MULEU_S, MIPS_INS_MULQ_RS, MIPS_INS_MULQ_S, MIPS_INS_MULR_Q, MIPS_INS_MULSAQ_S, MIPS_INS_MULSA, MIPS_INS_MULT, MIPS_INS_MULTU, MIPS_INS_MULU, MIPS_INS_MULV, MIPS_INS_MUL_Q, MIPS_INS_MUL_S, MIPS_INS_NLOC, MIPS_INS_NLZC, MIPS_INS_NMADD, MIPS_INS_NMSUB, MIPS_INS_NOR, MIPS_INS_NORI, MIPS_INS_NOT16, MIPS_INS_NOT, MIPS_INS_OR, MIPS_INS_OR16, MIPS_INS_ORI, MIPS_INS_PACKRL, MIPS_INS_PAUSE, MIPS_INS_PCKEV, MIPS_INS_PCKOD, MIPS_INS_PCNT, MIPS_INS_PICK, MIPS_INS_POP, MIPS_INS_PRECEQU, MIPS_INS_PRECEQ, MIPS_INS_PRECEU, MIPS_INS_PRECRQU_S, MIPS_INS_PRECRQ, MIPS_INS_PRECRQ_RS, MIPS_INS_PRECR, MIPS_INS_PRECR_SRA, MIPS_INS_PRECR_SRA_R, MIPS_INS_PREF, MIPS_INS_PREPEND, MIPS_INS_RADDU, MIPS_INS_RDDSP, MIPS_INS_RDHWR, MIPS_INS_REPLV, MIPS_INS_REPL, MIPS_INS_RINT, MIPS_INS_ROTR, MIPS_INS_ROTRV, MIPS_INS_ROUND, MIPS_INS_SAT_S, MIPS_INS_SAT_U, MIPS_INS_SB, MIPS_INS_SB16, MIPS_INS_SC, MIPS_INS_SCD, MIPS_INS_SD, MIPS_INS_SDBBP, MIPS_INS_SDBBP16, MIPS_INS_SDC1, MIPS_INS_SDC2, MIPS_INS_SDC3, MIPS_INS_SDL, MIPS_INS_SDR, MIPS_INS_SDXC1, MIPS_INS_SEB, MIPS_INS_SEH, MIPS_INS_SELEQZ, MIPS_INS_SELNEZ, MIPS_INS_SEL, MIPS_INS_SEQ, MIPS_INS_SEQI, MIPS_INS_SH, MIPS_INS_SH16, MIPS_INS_SHF, MIPS_INS_SHILO, MIPS_INS_SHILOV, MIPS_INS_SHLLV, MIPS_INS_SHLLV_S, MIPS_INS_SHLL, MIPS_INS_SHLL_S, MIPS_INS_SHRAV, MIPS_INS_SHRAV_R, MIPS_INS_SHRA, MIPS_INS_SHRA_R, MIPS_INS_SHRLV, MIPS_INS_SHRL, MIPS_INS_SLDI, MIPS_INS_SLD, MIPS_INS_SLL, MIPS_INS_SLL16, MIPS_INS_SLLI, MIPS_INS_SLLV, MIPS_INS_SLT, MIPS_INS_SLTI, MIPS_INS_SLTIU, MIPS_INS_SLTU, MIPS_INS_SNE, MIPS_INS_SNEI, MIPS_INS_SPLATI, MIPS_INS_SPLAT, MIPS_INS_SRA, MIPS_INS_SRAI, MIPS_INS_SRARI, MIPS_INS_SRAR, MIPS_INS_SRAV, MIPS_INS_SRL, MIPS_INS_SRL16, MIPS_INS_SRLI, MIPS_INS_SRLRI, MIPS_INS_SRLR, MIPS_INS_SRLV, MIPS_INS_SSNOP, MIPS_INS_ST, MIPS_INS_SUBQH, MIPS_INS_SUBQH_R, MIPS_INS_SUBQ, MIPS_INS_SUBQ_S, MIPS_INS_SUBSUS_U, MIPS_INS_SUBSUU_S, MIPS_INS_SUBS_S, MIPS_INS_SUBS_U, MIPS_INS_SUBU16, MIPS_INS_SUBUH, MIPS_INS_SUBUH_R, MIPS_INS_SUBU, MIPS_INS_SUBU_S, MIPS_INS_SUBVI, MIPS_INS_SUBV, MIPS_INS_SUXC1, MIPS_INS_SW, MIPS_INS_SW16, MIPS_INS_SWC1, MIPS_INS_SWC2, MIPS_INS_SWC3, MIPS_INS_SWL, MIPS_INS_SWM16, MIPS_INS_SWM32, MIPS_INS_SWP, MIPS_INS_SWR, MIPS_INS_SWXC1, MIPS_INS_SYNC, MIPS_INS_SYNCI, MIPS_INS_SYSCALL, MIPS_INS_TEQ, MIPS_INS_TEQI, MIPS_INS_TGE, MIPS_INS_TGEI, MIPS_INS_TGEIU, MIPS_INS_TGEU, MIPS_INS_TLBP, MIPS_INS_TLBR, MIPS_INS_TLBWI, MIPS_INS_TLBWR, MIPS_INS_TLT, MIPS_INS_TLTI, MIPS_INS_TLTIU, MIPS_INS_TLTU, MIPS_INS_TNE, MIPS_INS_TNEI, MIPS_INS_TRUNC, MIPS_INS_V3MULU, MIPS_INS_VMM0, MIPS_INS_VMULU, MIPS_INS_VSHF, MIPS_INS_WAIT, MIPS_INS_WRDSP, MIPS_INS_WSBH, MIPS_INS_XOR, MIPS_INS_XOR16, MIPS_INS_XORI, //> some alias instructions MIPS_INS_NOP, MIPS_INS_NEGU, //> special instructions MIPS_INS_JALR_HB, // jump and link with Hazard Barrier MIPS_INS_JR_HB, // jump register with Hazard Barrier MIPS_INS_ENDING, } mips_insn; /// Group of MIPS instructions typedef enum mips_insn_group { MIPS_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) MIPS_GRP_JUMP, ///< = CS_GRP_JUMP // all call instructions MIPS_GRP_CALL, ///< = CS_GRP_CALL // all return instructions MIPS_GRP_RET, ///< = CS_GRP_RET // all interrupt instructions (int+syscall) MIPS_GRP_INT, ///< = CS_GRP_INT // all interrupt return instructions MIPS_GRP_IRET, ///< = CS_GRP_IRET // all privileged instructions MIPS_GRP_PRIVILEGE, ///< = CS_GRP_PRIVILEGE // all relative branching instructions MIPS_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE // Architecture-specific groups MIPS_GRP_BITCOUNT = 128, MIPS_GRP_DSP, MIPS_GRP_DSPR2, MIPS_GRP_FPIDX, MIPS_GRP_MSA, MIPS_GRP_MIPS32R2, MIPS_GRP_MIPS64, MIPS_GRP_MIPS64R2, MIPS_GRP_SEINREG, MIPS_GRP_STDENC, MIPS_GRP_SWAP, MIPS_GRP_MICROMIPS, MIPS_GRP_MIPS16MODE, MIPS_GRP_FP64BIT, MIPS_GRP_NONANSFPMATH, MIPS_GRP_NOTFP64BIT, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_CNMIPS, MIPS_GRP_MIPS32, MIPS_GRP_MIPS32R6, MIPS_GRP_MIPS64R6, MIPS_GRP_MIPS2, MIPS_GRP_MIPS3, MIPS_GRP_MIPS3_32, MIPS_GRP_MIPS3_32R2, MIPS_GRP_MIPS4_32, MIPS_GRP_MIPS4_32R2, MIPS_GRP_MIPS5_32R2, MIPS_GRP_GP32BIT, MIPS_GRP_GP64BIT, MIPS_GRP_ENDING, } mips_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/platform.h010066400017500001750000000076521363402546700215400ustar0000000000000000/* Capstone Disassembly Engine */ /* By Axel Souchet & Nguyen Anh Quynh, 2014 */ #ifndef CAPSTONE_PLATFORM_H #define CAPSTONE_PLATFORM_H // handle C99 issue (for pre-2013 VisualStudio) #if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)) // MSVC // stdbool.h #if (_MSC_VER < 1800) || defined(_KERNEL_MODE) // this system does not have stdbool.h #ifndef __cplusplus typedef unsigned char bool; #define false 0 #define true 1 #endif // __cplusplus #else // VisualStudio 2013+ -> C99 is supported #include #endif // (_MSC_VER < 1800) || defined(_KERNEL_MODE) #else // not MSVC -> C99 is supported #include #endif // !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)) // handle inttypes.h / stdint.h compatibility #if defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) #include "windowsce/stdint.h" #endif // defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) #if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE))) // this system does not have inttypes.h #if defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE)) // this system does not have stdint.h typedef signed char int8_t; typedef signed short int16_t; typedef signed int int32_t; typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; typedef signed long long int64_t; typedef unsigned long long uint64_t; #endif // defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE)) #if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE)) #define INT8_MIN (-127i8 - 1) #define INT16_MIN (-32767i16 - 1) #define INT32_MIN (-2147483647i32 - 1) #define INT64_MIN (-9223372036854775807i64 - 1) #define INT8_MAX 127i8 #define INT16_MAX 32767i16 #define INT32_MAX 2147483647i32 #define INT64_MAX 9223372036854775807i64 #define UINT8_MAX 0xffui8 #define UINT16_MAX 0xffffui16 #define UINT32_MAX 0xffffffffui32 #define UINT64_MAX 0xffffffffffffffffui64 #endif // defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE)) #ifdef CAPSTONE_HAS_OSXKERNEL // this system has stdint.h #include #endif #define __PRI_8_LENGTH_MODIFIER__ "hh" #define __PRI_64_LENGTH_MODIFIER__ "ll" #define PRId8 __PRI_8_LENGTH_MODIFIER__ "d" #define PRIi8 __PRI_8_LENGTH_MODIFIER__ "i" #define PRIo8 __PRI_8_LENGTH_MODIFIER__ "o" #define PRIu8 __PRI_8_LENGTH_MODIFIER__ "u" #define PRIx8 __PRI_8_LENGTH_MODIFIER__ "x" #define PRIX8 __PRI_8_LENGTH_MODIFIER__ "X" #define PRId16 "hd" #define PRIi16 "hi" #define PRIo16 "ho" #define PRIu16 "hu" #define PRIx16 "hx" #define PRIX16 "hX" #if defined(_MSC_VER) && _MSC_VER <= 1700 #define PRId32 "ld" #define PRIi32 "li" #define PRIo32 "lo" #define PRIu32 "lu" #define PRIx32 "lx" #define PRIX32 "lX" #else // OSX #define PRId32 "d" #define PRIi32 "i" #define PRIo32 "o" #define PRIu32 "u" #define PRIx32 "x" #define PRIX32 "X" #endif // defined(_MSC_VER) && _MSC_VER <= 1700 #if defined(_MSC_VER) && _MSC_VER <= 1700 // redefine functions from inttypes.h used in cstool #define strtoull _strtoui64 #endif #define PRId64 __PRI_64_LENGTH_MODIFIER__ "d" #define PRIi64 __PRI_64_LENGTH_MODIFIER__ "i" #define PRIo64 __PRI_64_LENGTH_MODIFIER__ "o" #define PRIu64 __PRI_64_LENGTH_MODIFIER__ "u" #define PRIx64 __PRI_64_LENGTH_MODIFIER__ "x" #define PRIX64 __PRI_64_LENGTH_MODIFIER__ "X" #else // this system has inttypes.h by default #include #endif // defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE))) #endif capstone-sys-0.11.0/capstone/include/capstone/ppc.h010066400017500001750000000620461363402546700204740ustar0000000000000000#ifndef CAPSTONE_PPC_H #define CAPSTONE_PPC_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// PPC branch codes for some branch instructions typedef enum ppc_bc { PPC_BC_INVALID = 0, PPC_BC_LT = (0 << 5) | 12, PPC_BC_LE = (1 << 5) | 4, PPC_BC_EQ = (2 << 5) | 12, PPC_BC_GE = (0 << 5) | 4, PPC_BC_GT = (1 << 5) | 12, PPC_BC_NE = (2 << 5) | 4, PPC_BC_UN = (3 << 5) | 12, PPC_BC_NU = (3 << 5) | 4, // extra conditions PPC_BC_SO = (4 << 5) | 12, ///< summary overflow PPC_BC_NS = (4 << 5) | 4, ///< not summary overflow } ppc_bc; /// PPC branch hint for some branch instructions typedef enum ppc_bh { PPC_BH_INVALID = 0, ///< no hint PPC_BH_PLUS, ///< PLUS hint PPC_BH_MINUS, ///< MINUS hint } ppc_bh; /// Operand type for instruction's operands typedef enum ppc_op_type { PPC_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). PPC_OP_REG, ///< = CS_OP_REG (Register operand). PPC_OP_IMM, ///< = CS_OP_IMM (Immediate operand). PPC_OP_MEM, ///< = CS_OP_MEM (Memory operand). PPC_OP_CRX = 64, ///< Condition Register field } ppc_op_type; /// PPC registers typedef enum ppc_reg { PPC_REG_INVALID = 0, PPC_REG_CARRY, PPC_REG_CR0, PPC_REG_CR1, PPC_REG_CR2, PPC_REG_CR3, PPC_REG_CR4, PPC_REG_CR5, PPC_REG_CR6, PPC_REG_CR7, PPC_REG_CTR, PPC_REG_F0, PPC_REG_F1, PPC_REG_F2, PPC_REG_F3, PPC_REG_F4, PPC_REG_F5, PPC_REG_F6, PPC_REG_F7, PPC_REG_F8, PPC_REG_F9, PPC_REG_F10, PPC_REG_F11, PPC_REG_F12, PPC_REG_F13, PPC_REG_F14, PPC_REG_F15, PPC_REG_F16, PPC_REG_F17, PPC_REG_F18, PPC_REG_F19, PPC_REG_F20, PPC_REG_F21, PPC_REG_F22, PPC_REG_F23, PPC_REG_F24, PPC_REG_F25, PPC_REG_F26, PPC_REG_F27, PPC_REG_F28, PPC_REG_F29, PPC_REG_F30, PPC_REG_F31, PPC_REG_LR, PPC_REG_R0, PPC_REG_R1, PPC_REG_R2, PPC_REG_R3, PPC_REG_R4, PPC_REG_R5, PPC_REG_R6, PPC_REG_R7, PPC_REG_R8, PPC_REG_R9, PPC_REG_R10, PPC_REG_R11, PPC_REG_R12, PPC_REG_R13, PPC_REG_R14, PPC_REG_R15, PPC_REG_R16, PPC_REG_R17, PPC_REG_R18, PPC_REG_R19, PPC_REG_R20, PPC_REG_R21, PPC_REG_R22, PPC_REG_R23, PPC_REG_R24, PPC_REG_R25, PPC_REG_R26, PPC_REG_R27, PPC_REG_R28, PPC_REG_R29, PPC_REG_R30, PPC_REG_R31, PPC_REG_V0, PPC_REG_V1, PPC_REG_V2, PPC_REG_V3, PPC_REG_V4, PPC_REG_V5, PPC_REG_V6, PPC_REG_V7, PPC_REG_V8, PPC_REG_V9, PPC_REG_V10, PPC_REG_V11, PPC_REG_V12, PPC_REG_V13, PPC_REG_V14, PPC_REG_V15, PPC_REG_V16, PPC_REG_V17, PPC_REG_V18, PPC_REG_V19, PPC_REG_V20, PPC_REG_V21, PPC_REG_V22, PPC_REG_V23, PPC_REG_V24, PPC_REG_V25, PPC_REG_V26, PPC_REG_V27, PPC_REG_V28, PPC_REG_V29, PPC_REG_V30, PPC_REG_V31, PPC_REG_VRSAVE, PPC_REG_VS0, PPC_REG_VS1, PPC_REG_VS2, PPC_REG_VS3, PPC_REG_VS4, PPC_REG_VS5, PPC_REG_VS6, PPC_REG_VS7, PPC_REG_VS8, PPC_REG_VS9, PPC_REG_VS10, PPC_REG_VS11, PPC_REG_VS12, PPC_REG_VS13, PPC_REG_VS14, PPC_REG_VS15, PPC_REG_VS16, PPC_REG_VS17, PPC_REG_VS18, PPC_REG_VS19, PPC_REG_VS20, PPC_REG_VS21, PPC_REG_VS22, PPC_REG_VS23, PPC_REG_VS24, PPC_REG_VS25, PPC_REG_VS26, PPC_REG_VS27, PPC_REG_VS28, PPC_REG_VS29, PPC_REG_VS30, PPC_REG_VS31, PPC_REG_VS32, PPC_REG_VS33, PPC_REG_VS34, PPC_REG_VS35, PPC_REG_VS36, PPC_REG_VS37, PPC_REG_VS38, PPC_REG_VS39, PPC_REG_VS40, PPC_REG_VS41, PPC_REG_VS42, PPC_REG_VS43, PPC_REG_VS44, PPC_REG_VS45, PPC_REG_VS46, PPC_REG_VS47, PPC_REG_VS48, PPC_REG_VS49, PPC_REG_VS50, PPC_REG_VS51, PPC_REG_VS52, PPC_REG_VS53, PPC_REG_VS54, PPC_REG_VS55, PPC_REG_VS56, PPC_REG_VS57, PPC_REG_VS58, PPC_REG_VS59, PPC_REG_VS60, PPC_REG_VS61, PPC_REG_VS62, PPC_REG_VS63, PPC_REG_Q0, PPC_REG_Q1, PPC_REG_Q2, PPC_REG_Q3, PPC_REG_Q4, PPC_REG_Q5, PPC_REG_Q6, PPC_REG_Q7, PPC_REG_Q8, PPC_REG_Q9, PPC_REG_Q10, PPC_REG_Q11, PPC_REG_Q12, PPC_REG_Q13, PPC_REG_Q14, PPC_REG_Q15, PPC_REG_Q16, PPC_REG_Q17, PPC_REG_Q18, PPC_REG_Q19, PPC_REG_Q20, PPC_REG_Q21, PPC_REG_Q22, PPC_REG_Q23, PPC_REG_Q24, PPC_REG_Q25, PPC_REG_Q26, PPC_REG_Q27, PPC_REG_Q28, PPC_REG_Q29, PPC_REG_Q30, PPC_REG_Q31, // extra registers for PPCMapping.c PPC_REG_RM, PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_CR1EQ, PPC_REG_X2, PPC_REG_ENDING, // <-- mark the end of the list of registers } ppc_reg; /// Instruction's operand referring to memory /// This is associated with PPC_OP_MEM operand type above typedef struct ppc_op_mem { ppc_reg base; ///< base register int32_t disp; ///< displacement/offset value } ppc_op_mem; typedef struct ppc_op_crx { unsigned int scale; ppc_reg reg; ppc_bc cond; } ppc_op_crx; /// Instruction operand typedef struct cs_ppc_op { ppc_op_type type; ///< operand type union { ppc_reg reg; ///< register value for REG operand int64_t imm; ///< immediate value for IMM operand ppc_op_mem mem; ///< base/disp value for MEM operand ppc_op_crx crx; ///< operand with condition register }; } cs_ppc_op; /// Instruction structure typedef struct cs_ppc { /// branch code for branch instructions ppc_bc bc; /// branch hint for branch instructions ppc_bh bh; /// if update_cr0 = True, then this 'dot' insn updates CR0 bool update_cr0; /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_ppc_op operands[8]; ///< operands for this instruction. } cs_ppc; /// PPC instruction typedef enum ppc_insn { PPC_INS_INVALID = 0, PPC_INS_ADD, PPC_INS_ADDC, PPC_INS_ADDE, PPC_INS_ADDI, PPC_INS_ADDIC, PPC_INS_ADDIS, PPC_INS_ADDME, PPC_INS_ADDZE, PPC_INS_AND, PPC_INS_ANDC, PPC_INS_ANDIS, PPC_INS_ANDI, PPC_INS_ATTN, PPC_INS_B, PPC_INS_BA, PPC_INS_BC, PPC_INS_BCCTR, PPC_INS_BCCTRL, PPC_INS_BCL, PPC_INS_BCLR, PPC_INS_BCLRL, PPC_INS_BCTR, PPC_INS_BCTRL, PPC_INS_BCT, PPC_INS_BDNZ, PPC_INS_BDNZA, PPC_INS_BDNZL, PPC_INS_BDNZLA, PPC_INS_BDNZLR, PPC_INS_BDNZLRL, PPC_INS_BDZ, PPC_INS_BDZA, PPC_INS_BDZL, PPC_INS_BDZLA, PPC_INS_BDZLR, PPC_INS_BDZLRL, PPC_INS_BL, PPC_INS_BLA, PPC_INS_BLR, PPC_INS_BLRL, PPC_INS_BRINC, PPC_INS_CMPB, PPC_INS_CMPD, PPC_INS_CMPDI, PPC_INS_CMPLD, PPC_INS_CMPLDI, PPC_INS_CMPLW, PPC_INS_CMPLWI, PPC_INS_CMPW, PPC_INS_CMPWI, PPC_INS_CNTLZD, PPC_INS_CNTLZW, PPC_INS_CREQV, PPC_INS_CRXOR, PPC_INS_CRAND, PPC_INS_CRANDC, PPC_INS_CRNAND, PPC_INS_CRNOR, PPC_INS_CROR, PPC_INS_CRORC, PPC_INS_DCBA, PPC_INS_DCBF, PPC_INS_DCBI, PPC_INS_DCBST, PPC_INS_DCBT, PPC_INS_DCBTST, PPC_INS_DCBZ, PPC_INS_DCBZL, PPC_INS_DCCCI, PPC_INS_DIVD, PPC_INS_DIVDU, PPC_INS_DIVW, PPC_INS_DIVWU, PPC_INS_DSS, PPC_INS_DSSALL, PPC_INS_DST, PPC_INS_DSTST, PPC_INS_DSTSTT, PPC_INS_DSTT, PPC_INS_EQV, PPC_INS_EVABS, PPC_INS_EVADDIW, PPC_INS_EVADDSMIAAW, PPC_INS_EVADDSSIAAW, PPC_INS_EVADDUMIAAW, PPC_INS_EVADDUSIAAW, PPC_INS_EVADDW, PPC_INS_EVAND, PPC_INS_EVANDC, PPC_INS_EVCMPEQ, PPC_INS_EVCMPGTS, PPC_INS_EVCMPGTU, PPC_INS_EVCMPLTS, PPC_INS_EVCMPLTU, PPC_INS_EVCNTLSW, PPC_INS_EVCNTLZW, PPC_INS_EVDIVWS, PPC_INS_EVDIVWU, PPC_INS_EVEQV, PPC_INS_EVEXTSB, PPC_INS_EVEXTSH, PPC_INS_EVLDD, PPC_INS_EVLDDX, PPC_INS_EVLDH, PPC_INS_EVLDHX, PPC_INS_EVLDW, PPC_INS_EVLDWX, PPC_INS_EVLHHESPLAT, PPC_INS_EVLHHESPLATX, PPC_INS_EVLHHOSSPLAT, PPC_INS_EVLHHOSSPLATX, PPC_INS_EVLHHOUSPLAT, PPC_INS_EVLHHOUSPLATX, PPC_INS_EVLWHE, PPC_INS_EVLWHEX, PPC_INS_EVLWHOS, PPC_INS_EVLWHOSX, PPC_INS_EVLWHOU, PPC_INS_EVLWHOUX, PPC_INS_EVLWHSPLAT, PPC_INS_EVLWHSPLATX, PPC_INS_EVLWWSPLAT, PPC_INS_EVLWWSPLATX, PPC_INS_EVMERGEHI, PPC_INS_EVMERGEHILO, PPC_INS_EVMERGELO, PPC_INS_EVMERGELOHI, PPC_INS_EVMHEGSMFAA, PPC_INS_EVMHEGSMFAN, PPC_INS_EVMHEGSMIAA, PPC_INS_EVMHEGSMIAN, PPC_INS_EVMHEGUMIAA, PPC_INS_EVMHEGUMIAN, PPC_INS_EVMHESMF, PPC_INS_EVMHESMFA, PPC_INS_EVMHESMFAAW, PPC_INS_EVMHESMFANW, PPC_INS_EVMHESMI, PPC_INS_EVMHESMIA, PPC_INS_EVMHESMIAAW, PPC_INS_EVMHESMIANW, PPC_INS_EVMHESSF, PPC_INS_EVMHESSFA, PPC_INS_EVMHESSFAAW, PPC_INS_EVMHESSFANW, PPC_INS_EVMHESSIAAW, PPC_INS_EVMHESSIANW, PPC_INS_EVMHEUMI, PPC_INS_EVMHEUMIA, PPC_INS_EVMHEUMIAAW, PPC_INS_EVMHEUMIANW, PPC_INS_EVMHEUSIAAW, PPC_INS_EVMHEUSIANW, PPC_INS_EVMHOGSMFAA, PPC_INS_EVMHOGSMFAN, PPC_INS_EVMHOGSMIAA, PPC_INS_EVMHOGSMIAN, PPC_INS_EVMHOGUMIAA, PPC_INS_EVMHOGUMIAN, PPC_INS_EVMHOSMF, PPC_INS_EVMHOSMFA, PPC_INS_EVMHOSMFAAW, PPC_INS_EVMHOSMFANW, PPC_INS_EVMHOSMI, PPC_INS_EVMHOSMIA, PPC_INS_EVMHOSMIAAW, PPC_INS_EVMHOSMIANW, PPC_INS_EVMHOSSF, PPC_INS_EVMHOSSFA, PPC_INS_EVMHOSSFAAW, PPC_INS_EVMHOSSFANW, PPC_INS_EVMHOSSIAAW, PPC_INS_EVMHOSSIANW, PPC_INS_EVMHOUMI, PPC_INS_EVMHOUMIA, PPC_INS_EVMHOUMIAAW, PPC_INS_EVMHOUMIANW, PPC_INS_EVMHOUSIAAW, PPC_INS_EVMHOUSIANW, PPC_INS_EVMRA, PPC_INS_EVMWHSMF, PPC_INS_EVMWHSMFA, PPC_INS_EVMWHSMI, PPC_INS_EVMWHSMIA, PPC_INS_EVMWHSSF, PPC_INS_EVMWHSSFA, PPC_INS_EVMWHUMI, PPC_INS_EVMWHUMIA, PPC_INS_EVMWLSMIAAW, PPC_INS_EVMWLSMIANW, PPC_INS_EVMWLSSIAAW, PPC_INS_EVMWLSSIANW, PPC_INS_EVMWLUMI, PPC_INS_EVMWLUMIA, PPC_INS_EVMWLUMIAAW, PPC_INS_EVMWLUMIANW, PPC_INS_EVMWLUSIAAW, PPC_INS_EVMWLUSIANW, PPC_INS_EVMWSMF, PPC_INS_EVMWSMFA, PPC_INS_EVMWSMFAA, PPC_INS_EVMWSMFAN, PPC_INS_EVMWSMI, PPC_INS_EVMWSMIA, PPC_INS_EVMWSMIAA, PPC_INS_EVMWSMIAN, PPC_INS_EVMWSSF, PPC_INS_EVMWSSFA, PPC_INS_EVMWSSFAA, PPC_INS_EVMWSSFAN, PPC_INS_EVMWUMI, PPC_INS_EVMWUMIA, PPC_INS_EVMWUMIAA, PPC_INS_EVMWUMIAN, PPC_INS_EVNAND, PPC_INS_EVNEG, PPC_INS_EVNOR, PPC_INS_EVOR, PPC_INS_EVORC, PPC_INS_EVRLW, PPC_INS_EVRLWI, PPC_INS_EVRNDW, PPC_INS_EVSLW, PPC_INS_EVSLWI, PPC_INS_EVSPLATFI, PPC_INS_EVSPLATI, PPC_INS_EVSRWIS, PPC_INS_EVSRWIU, PPC_INS_EVSRWS, PPC_INS_EVSRWU, PPC_INS_EVSTDD, PPC_INS_EVSTDDX, PPC_INS_EVSTDH, PPC_INS_EVSTDHX, PPC_INS_EVSTDW, PPC_INS_EVSTDWX, PPC_INS_EVSTWHE, PPC_INS_EVSTWHEX, PPC_INS_EVSTWHO, PPC_INS_EVSTWHOX, PPC_INS_EVSTWWE, PPC_INS_EVSTWWEX, PPC_INS_EVSTWWO, PPC_INS_EVSTWWOX, PPC_INS_EVSUBFSMIAAW, PPC_INS_EVSUBFSSIAAW, PPC_INS_EVSUBFUMIAAW, PPC_INS_EVSUBFUSIAAW, PPC_INS_EVSUBFW, PPC_INS_EVSUBIFW, PPC_INS_EVXOR, PPC_INS_EXTSB, PPC_INS_EXTSH, PPC_INS_EXTSW, PPC_INS_EIEIO, PPC_INS_FABS, PPC_INS_FADD, PPC_INS_FADDS, PPC_INS_FCFID, PPC_INS_FCFIDS, PPC_INS_FCFIDU, PPC_INS_FCFIDUS, PPC_INS_FCMPU, PPC_INS_FCPSGN, PPC_INS_FCTID, PPC_INS_FCTIDUZ, PPC_INS_FCTIDZ, PPC_INS_FCTIW, PPC_INS_FCTIWUZ, PPC_INS_FCTIWZ, PPC_INS_FDIV, PPC_INS_FDIVS, PPC_INS_FMADD, PPC_INS_FMADDS, PPC_INS_FMR, PPC_INS_FMSUB, PPC_INS_FMSUBS, PPC_INS_FMUL, PPC_INS_FMULS, PPC_INS_FNABS, PPC_INS_FNEG, PPC_INS_FNMADD, PPC_INS_FNMADDS, PPC_INS_FNMSUB, PPC_INS_FNMSUBS, PPC_INS_FRE, PPC_INS_FRES, PPC_INS_FRIM, PPC_INS_FRIN, PPC_INS_FRIP, PPC_INS_FRIZ, PPC_INS_FRSP, PPC_INS_FRSQRTE, PPC_INS_FRSQRTES, PPC_INS_FSEL, PPC_INS_FSQRT, PPC_INS_FSQRTS, PPC_INS_FSUB, PPC_INS_FSUBS, PPC_INS_ICBI, PPC_INS_ICBT, PPC_INS_ICCCI, PPC_INS_ISEL, PPC_INS_ISYNC, PPC_INS_LA, PPC_INS_LBZ, PPC_INS_LBZCIX, PPC_INS_LBZU, PPC_INS_LBZUX, PPC_INS_LBZX, PPC_INS_LD, PPC_INS_LDARX, PPC_INS_LDBRX, PPC_INS_LDCIX, PPC_INS_LDU, PPC_INS_LDUX, PPC_INS_LDX, PPC_INS_LFD, PPC_INS_LFDU, PPC_INS_LFDUX, PPC_INS_LFDX, PPC_INS_LFIWAX, PPC_INS_LFIWZX, PPC_INS_LFS, PPC_INS_LFSU, PPC_INS_LFSUX, PPC_INS_LFSX, PPC_INS_LHA, PPC_INS_LHAU, PPC_INS_LHAUX, PPC_INS_LHAX, PPC_INS_LHBRX, PPC_INS_LHZ, PPC_INS_LHZCIX, PPC_INS_LHZU, PPC_INS_LHZUX, PPC_INS_LHZX, PPC_INS_LI, PPC_INS_LIS, PPC_INS_LMW, PPC_INS_LSWI, PPC_INS_LVEBX, PPC_INS_LVEHX, PPC_INS_LVEWX, PPC_INS_LVSL, PPC_INS_LVSR, PPC_INS_LVX, PPC_INS_LVXL, PPC_INS_LWA, PPC_INS_LWARX, PPC_INS_LWAUX, PPC_INS_LWAX, PPC_INS_LWBRX, PPC_INS_LWZ, PPC_INS_LWZCIX, PPC_INS_LWZU, PPC_INS_LWZUX, PPC_INS_LWZX, PPC_INS_LXSDX, PPC_INS_LXVD2X, PPC_INS_LXVDSX, PPC_INS_LXVW4X, PPC_INS_MBAR, PPC_INS_MCRF, PPC_INS_MCRFS, PPC_INS_MFCR, PPC_INS_MFCTR, PPC_INS_MFDCR, PPC_INS_MFFS, PPC_INS_MFLR, PPC_INS_MFMSR, PPC_INS_MFOCRF, PPC_INS_MFSPR, PPC_INS_MFSR, PPC_INS_MFSRIN, PPC_INS_MFTB, PPC_INS_MFVSCR, PPC_INS_MSYNC, PPC_INS_MTCRF, PPC_INS_MTCTR, PPC_INS_MTDCR, PPC_INS_MTFSB0, PPC_INS_MTFSB1, PPC_INS_MTFSF, PPC_INS_MTFSFI, PPC_INS_MTLR, PPC_INS_MTMSR, PPC_INS_MTMSRD, PPC_INS_MTOCRF, PPC_INS_MTSPR, PPC_INS_MTSR, PPC_INS_MTSRIN, PPC_INS_MTVSCR, PPC_INS_MULHD, PPC_INS_MULHDU, PPC_INS_MULHW, PPC_INS_MULHWU, PPC_INS_MULLD, PPC_INS_MULLI, PPC_INS_MULLW, PPC_INS_NAND, PPC_INS_NEG, PPC_INS_NOP, PPC_INS_ORI, PPC_INS_NOR, PPC_INS_OR, PPC_INS_ORC, PPC_INS_ORIS, PPC_INS_POPCNTD, PPC_INS_POPCNTW, PPC_INS_QVALIGNI, PPC_INS_QVESPLATI, PPC_INS_QVFABS, PPC_INS_QVFADD, PPC_INS_QVFADDS, PPC_INS_QVFCFID, PPC_INS_QVFCFIDS, PPC_INS_QVFCFIDU, PPC_INS_QVFCFIDUS, PPC_INS_QVFCMPEQ, PPC_INS_QVFCMPGT, PPC_INS_QVFCMPLT, PPC_INS_QVFCPSGN, PPC_INS_QVFCTID, PPC_INS_QVFCTIDU, PPC_INS_QVFCTIDUZ, PPC_INS_QVFCTIDZ, PPC_INS_QVFCTIW, PPC_INS_QVFCTIWU, PPC_INS_QVFCTIWUZ, PPC_INS_QVFCTIWZ, PPC_INS_QVFLOGICAL, PPC_INS_QVFMADD, PPC_INS_QVFMADDS, PPC_INS_QVFMR, PPC_INS_QVFMSUB, PPC_INS_QVFMSUBS, PPC_INS_QVFMUL, PPC_INS_QVFMULS, PPC_INS_QVFNABS, PPC_INS_QVFNEG, PPC_INS_QVFNMADD, PPC_INS_QVFNMADDS, PPC_INS_QVFNMSUB, PPC_INS_QVFNMSUBS, PPC_INS_QVFPERM, PPC_INS_QVFRE, PPC_INS_QVFRES, PPC_INS_QVFRIM, PPC_INS_QVFRIN, PPC_INS_QVFRIP, PPC_INS_QVFRIZ, PPC_INS_QVFRSP, PPC_INS_QVFRSQRTE, PPC_INS_QVFRSQRTES, PPC_INS_QVFSEL, PPC_INS_QVFSUB, PPC_INS_QVFSUBS, PPC_INS_QVFTSTNAN, PPC_INS_QVFXMADD, PPC_INS_QVFXMADDS, PPC_INS_QVFXMUL, PPC_INS_QVFXMULS, PPC_INS_QVFXXCPNMADD, PPC_INS_QVFXXCPNMADDS, PPC_INS_QVFXXMADD, PPC_INS_QVFXXMADDS, PPC_INS_QVFXXNPMADD, PPC_INS_QVFXXNPMADDS, PPC_INS_QVGPCI, PPC_INS_QVLFCDUX, PPC_INS_QVLFCDUXA, PPC_INS_QVLFCDX, PPC_INS_QVLFCDXA, PPC_INS_QVLFCSUX, PPC_INS_QVLFCSUXA, PPC_INS_QVLFCSX, PPC_INS_QVLFCSXA, PPC_INS_QVLFDUX, PPC_INS_QVLFDUXA, PPC_INS_QVLFDX, PPC_INS_QVLFDXA, PPC_INS_QVLFIWAX, PPC_INS_QVLFIWAXA, PPC_INS_QVLFIWZX, PPC_INS_QVLFIWZXA, PPC_INS_QVLFSUX, PPC_INS_QVLFSUXA, PPC_INS_QVLFSX, PPC_INS_QVLFSXA, PPC_INS_QVLPCLDX, PPC_INS_QVLPCLSX, PPC_INS_QVLPCRDX, PPC_INS_QVLPCRSX, PPC_INS_QVSTFCDUX, PPC_INS_QVSTFCDUXA, PPC_INS_QVSTFCDUXI, PPC_INS_QVSTFCDUXIA, PPC_INS_QVSTFCDX, PPC_INS_QVSTFCDXA, PPC_INS_QVSTFCDXI, PPC_INS_QVSTFCDXIA, PPC_INS_QVSTFCSUX, PPC_INS_QVSTFCSUXA, PPC_INS_QVSTFCSUXI, PPC_INS_QVSTFCSUXIA, PPC_INS_QVSTFCSX, PPC_INS_QVSTFCSXA, PPC_INS_QVSTFCSXI, PPC_INS_QVSTFCSXIA, PPC_INS_QVSTFDUX, PPC_INS_QVSTFDUXA, PPC_INS_QVSTFDUXI, PPC_INS_QVSTFDUXIA, PPC_INS_QVSTFDX, PPC_INS_QVSTFDXA, PPC_INS_QVSTFDXI, PPC_INS_QVSTFDXIA, PPC_INS_QVSTFIWX, PPC_INS_QVSTFIWXA, PPC_INS_QVSTFSUX, PPC_INS_QVSTFSUXA, PPC_INS_QVSTFSUXI, PPC_INS_QVSTFSUXIA, PPC_INS_QVSTFSX, PPC_INS_QVSTFSXA, PPC_INS_QVSTFSXI, PPC_INS_QVSTFSXIA, PPC_INS_RFCI, PPC_INS_RFDI, PPC_INS_RFI, PPC_INS_RFID, PPC_INS_RFMCI, PPC_INS_RLDCL, PPC_INS_RLDCR, PPC_INS_RLDIC, PPC_INS_RLDICL, PPC_INS_RLDICR, PPC_INS_RLDIMI, PPC_INS_RLWIMI, PPC_INS_RLWINM, PPC_INS_RLWNM, PPC_INS_SC, PPC_INS_SLBIA, PPC_INS_SLBIE, PPC_INS_SLBMFEE, PPC_INS_SLBMTE, PPC_INS_SLD, PPC_INS_SLW, PPC_INS_SRAD, PPC_INS_SRADI, PPC_INS_SRAW, PPC_INS_SRAWI, PPC_INS_SRD, PPC_INS_SRW, PPC_INS_STB, PPC_INS_STBCIX, PPC_INS_STBU, PPC_INS_STBUX, PPC_INS_STBX, PPC_INS_STD, PPC_INS_STDBRX, PPC_INS_STDCIX, PPC_INS_STDCX, PPC_INS_STDU, PPC_INS_STDUX, PPC_INS_STDX, PPC_INS_STFD, PPC_INS_STFDU, PPC_INS_STFDUX, PPC_INS_STFDX, PPC_INS_STFIWX, PPC_INS_STFS, PPC_INS_STFSU, PPC_INS_STFSUX, PPC_INS_STFSX, PPC_INS_STH, PPC_INS_STHBRX, PPC_INS_STHCIX, PPC_INS_STHU, PPC_INS_STHUX, PPC_INS_STHX, PPC_INS_STMW, PPC_INS_STSWI, PPC_INS_STVEBX, PPC_INS_STVEHX, PPC_INS_STVEWX, PPC_INS_STVX, PPC_INS_STVXL, PPC_INS_STW, PPC_INS_STWBRX, PPC_INS_STWCIX, PPC_INS_STWCX, PPC_INS_STWU, PPC_INS_STWUX, PPC_INS_STWX, PPC_INS_STXSDX, PPC_INS_STXVD2X, PPC_INS_STXVW4X, PPC_INS_SUBF, PPC_INS_SUBFC, PPC_INS_SUBFE, PPC_INS_SUBFIC, PPC_INS_SUBFME, PPC_INS_SUBFZE, PPC_INS_SYNC, PPC_INS_TD, PPC_INS_TDI, PPC_INS_TLBIA, PPC_INS_TLBIE, PPC_INS_TLBIEL, PPC_INS_TLBIVAX, PPC_INS_TLBLD, PPC_INS_TLBLI, PPC_INS_TLBRE, PPC_INS_TLBSX, PPC_INS_TLBSYNC, PPC_INS_TLBWE, PPC_INS_TRAP, PPC_INS_TW, PPC_INS_TWI, PPC_INS_VADDCUW, PPC_INS_VADDFP, PPC_INS_VADDSBS, PPC_INS_VADDSHS, PPC_INS_VADDSWS, PPC_INS_VADDUBM, PPC_INS_VADDUBS, PPC_INS_VADDUDM, PPC_INS_VADDUHM, PPC_INS_VADDUHS, PPC_INS_VADDUWM, PPC_INS_VADDUWS, PPC_INS_VAND, PPC_INS_VANDC, PPC_INS_VAVGSB, PPC_INS_VAVGSH, PPC_INS_VAVGSW, PPC_INS_VAVGUB, PPC_INS_VAVGUH, PPC_INS_VAVGUW, PPC_INS_VCFSX, PPC_INS_VCFUX, PPC_INS_VCLZB, PPC_INS_VCLZD, PPC_INS_VCLZH, PPC_INS_VCLZW, PPC_INS_VCMPBFP, PPC_INS_VCMPEQFP, PPC_INS_VCMPEQUB, PPC_INS_VCMPEQUD, PPC_INS_VCMPEQUH, PPC_INS_VCMPEQUW, PPC_INS_VCMPGEFP, PPC_INS_VCMPGTFP, PPC_INS_VCMPGTSB, PPC_INS_VCMPGTSD, PPC_INS_VCMPGTSH, PPC_INS_VCMPGTSW, PPC_INS_VCMPGTUB, PPC_INS_VCMPGTUD, PPC_INS_VCMPGTUH, PPC_INS_VCMPGTUW, PPC_INS_VCTSXS, PPC_INS_VCTUXS, PPC_INS_VEQV, PPC_INS_VEXPTEFP, PPC_INS_VLOGEFP, PPC_INS_VMADDFP, PPC_INS_VMAXFP, PPC_INS_VMAXSB, PPC_INS_VMAXSD, PPC_INS_VMAXSH, PPC_INS_VMAXSW, PPC_INS_VMAXUB, PPC_INS_VMAXUD, PPC_INS_VMAXUH, PPC_INS_VMAXUW, PPC_INS_VMHADDSHS, PPC_INS_VMHRADDSHS, PPC_INS_VMINUD, PPC_INS_VMINFP, PPC_INS_VMINSB, PPC_INS_VMINSD, PPC_INS_VMINSH, PPC_INS_VMINSW, PPC_INS_VMINUB, PPC_INS_VMINUH, PPC_INS_VMINUW, PPC_INS_VMLADDUHM, PPC_INS_VMRGHB, PPC_INS_VMRGHH, PPC_INS_VMRGHW, PPC_INS_VMRGLB, PPC_INS_VMRGLH, PPC_INS_VMRGLW, PPC_INS_VMSUMMBM, PPC_INS_VMSUMSHM, PPC_INS_VMSUMSHS, PPC_INS_VMSUMUBM, PPC_INS_VMSUMUHM, PPC_INS_VMSUMUHS, PPC_INS_VMULESB, PPC_INS_VMULESH, PPC_INS_VMULESW, PPC_INS_VMULEUB, PPC_INS_VMULEUH, PPC_INS_VMULEUW, PPC_INS_VMULOSB, PPC_INS_VMULOSH, PPC_INS_VMULOSW, PPC_INS_VMULOUB, PPC_INS_VMULOUH, PPC_INS_VMULOUW, PPC_INS_VMULUWM, PPC_INS_VNAND, PPC_INS_VNMSUBFP, PPC_INS_VNOR, PPC_INS_VOR, PPC_INS_VORC, PPC_INS_VPERM, PPC_INS_VPKPX, PPC_INS_VPKSHSS, PPC_INS_VPKSHUS, PPC_INS_VPKSWSS, PPC_INS_VPKSWUS, PPC_INS_VPKUHUM, PPC_INS_VPKUHUS, PPC_INS_VPKUWUM, PPC_INS_VPKUWUS, PPC_INS_VPOPCNTB, PPC_INS_VPOPCNTD, PPC_INS_VPOPCNTH, PPC_INS_VPOPCNTW, PPC_INS_VREFP, PPC_INS_VRFIM, PPC_INS_VRFIN, PPC_INS_VRFIP, PPC_INS_VRFIZ, PPC_INS_VRLB, PPC_INS_VRLD, PPC_INS_VRLH, PPC_INS_VRLW, PPC_INS_VRSQRTEFP, PPC_INS_VSEL, PPC_INS_VSL, PPC_INS_VSLB, PPC_INS_VSLD, PPC_INS_VSLDOI, PPC_INS_VSLH, PPC_INS_VSLO, PPC_INS_VSLW, PPC_INS_VSPLTB, PPC_INS_VSPLTH, PPC_INS_VSPLTISB, PPC_INS_VSPLTISH, PPC_INS_VSPLTISW, PPC_INS_VSPLTW, PPC_INS_VSR, PPC_INS_VSRAB, PPC_INS_VSRAD, PPC_INS_VSRAH, PPC_INS_VSRAW, PPC_INS_VSRB, PPC_INS_VSRD, PPC_INS_VSRH, PPC_INS_VSRO, PPC_INS_VSRW, PPC_INS_VSUBCUW, PPC_INS_VSUBFP, PPC_INS_VSUBSBS, PPC_INS_VSUBSHS, PPC_INS_VSUBSWS, PPC_INS_VSUBUBM, PPC_INS_VSUBUBS, PPC_INS_VSUBUDM, PPC_INS_VSUBUHM, PPC_INS_VSUBUHS, PPC_INS_VSUBUWM, PPC_INS_VSUBUWS, PPC_INS_VSUM2SWS, PPC_INS_VSUM4SBS, PPC_INS_VSUM4SHS, PPC_INS_VSUM4UBS, PPC_INS_VSUMSWS, PPC_INS_VUPKHPX, PPC_INS_VUPKHSB, PPC_INS_VUPKHSH, PPC_INS_VUPKLPX, PPC_INS_VUPKLSB, PPC_INS_VUPKLSH, PPC_INS_VXOR, PPC_INS_WAIT, PPC_INS_WRTEE, PPC_INS_WRTEEI, PPC_INS_XOR, PPC_INS_XORI, PPC_INS_XORIS, PPC_INS_XSABSDP, PPC_INS_XSADDDP, PPC_INS_XSCMPODP, PPC_INS_XSCMPUDP, PPC_INS_XSCPSGNDP, PPC_INS_XSCVDPSP, PPC_INS_XSCVDPSXDS, PPC_INS_XSCVDPSXWS, PPC_INS_XSCVDPUXDS, PPC_INS_XSCVDPUXWS, PPC_INS_XSCVSPDP, PPC_INS_XSCVSXDDP, PPC_INS_XSCVUXDDP, PPC_INS_XSDIVDP, PPC_INS_XSMADDADP, PPC_INS_XSMADDMDP, PPC_INS_XSMAXDP, PPC_INS_XSMINDP, PPC_INS_XSMSUBADP, PPC_INS_XSMSUBMDP, PPC_INS_XSMULDP, PPC_INS_XSNABSDP, PPC_INS_XSNEGDP, PPC_INS_XSNMADDADP, PPC_INS_XSNMADDMDP, PPC_INS_XSNMSUBADP, PPC_INS_XSNMSUBMDP, PPC_INS_XSRDPI, PPC_INS_XSRDPIC, PPC_INS_XSRDPIM, PPC_INS_XSRDPIP, PPC_INS_XSRDPIZ, PPC_INS_XSREDP, PPC_INS_XSRSQRTEDP, PPC_INS_XSSQRTDP, PPC_INS_XSSUBDP, PPC_INS_XSTDIVDP, PPC_INS_XSTSQRTDP, PPC_INS_XVABSDP, PPC_INS_XVABSSP, PPC_INS_XVADDDP, PPC_INS_XVADDSP, PPC_INS_XVCMPEQDP, PPC_INS_XVCMPEQSP, PPC_INS_XVCMPGEDP, PPC_INS_XVCMPGESP, PPC_INS_XVCMPGTDP, PPC_INS_XVCMPGTSP, PPC_INS_XVCPSGNDP, PPC_INS_XVCPSGNSP, PPC_INS_XVCVDPSP, PPC_INS_XVCVDPSXDS, PPC_INS_XVCVDPSXWS, PPC_INS_XVCVDPUXDS, PPC_INS_XVCVDPUXWS, PPC_INS_XVCVSPDP, PPC_INS_XVCVSPSXDS, PPC_INS_XVCVSPSXWS, PPC_INS_XVCVSPUXDS, PPC_INS_XVCVSPUXWS, PPC_INS_XVCVSXDDP, PPC_INS_XVCVSXDSP, PPC_INS_XVCVSXWDP, PPC_INS_XVCVSXWSP, PPC_INS_XVCVUXDDP, PPC_INS_XVCVUXDSP, PPC_INS_XVCVUXWDP, PPC_INS_XVCVUXWSP, PPC_INS_XVDIVDP, PPC_INS_XVDIVSP, PPC_INS_XVMADDADP, PPC_INS_XVMADDASP, PPC_INS_XVMADDMDP, PPC_INS_XVMADDMSP, PPC_INS_XVMAXDP, PPC_INS_XVMAXSP, PPC_INS_XVMINDP, PPC_INS_XVMINSP, PPC_INS_XVMSUBADP, PPC_INS_XVMSUBASP, PPC_INS_XVMSUBMDP, PPC_INS_XVMSUBMSP, PPC_INS_XVMULDP, PPC_INS_XVMULSP, PPC_INS_XVNABSDP, PPC_INS_XVNABSSP, PPC_INS_XVNEGDP, PPC_INS_XVNEGSP, PPC_INS_XVNMADDADP, PPC_INS_XVNMADDASP, PPC_INS_XVNMADDMDP, PPC_INS_XVNMADDMSP, PPC_INS_XVNMSUBADP, PPC_INS_XVNMSUBASP, PPC_INS_XVNMSUBMDP, PPC_INS_XVNMSUBMSP, PPC_INS_XVRDPI, PPC_INS_XVRDPIC, PPC_INS_XVRDPIM, PPC_INS_XVRDPIP, PPC_INS_XVRDPIZ, PPC_INS_XVREDP, PPC_INS_XVRESP, PPC_INS_XVRSPI, PPC_INS_XVRSPIC, PPC_INS_XVRSPIM, PPC_INS_XVRSPIP, PPC_INS_XVRSPIZ, PPC_INS_XVRSQRTEDP, PPC_INS_XVRSQRTESP, PPC_INS_XVSQRTDP, PPC_INS_XVSQRTSP, PPC_INS_XVSUBDP, PPC_INS_XVSUBSP, PPC_INS_XVTDIVDP, PPC_INS_XVTDIVSP, PPC_INS_XVTSQRTDP, PPC_INS_XVTSQRTSP, PPC_INS_XXLAND, PPC_INS_XXLANDC, PPC_INS_XXLEQV, PPC_INS_XXLNAND, PPC_INS_XXLNOR, PPC_INS_XXLOR, PPC_INS_XXLORC, PPC_INS_XXLXOR, PPC_INS_XXMRGHW, PPC_INS_XXMRGLW, PPC_INS_XXPERMDI, PPC_INS_XXSEL, PPC_INS_XXSLDWI, PPC_INS_XXSPLTW, PPC_INS_BCA, PPC_INS_BCLA, // extra & alias instructions PPC_INS_SLWI, PPC_INS_SRWI, PPC_INS_SLDI, PPC_INS_BTA, PPC_INS_CRSET, PPC_INS_CRNOT, PPC_INS_CRMOVE, PPC_INS_CRCLR, PPC_INS_MFBR0, PPC_INS_MFBR1, PPC_INS_MFBR2, PPC_INS_MFBR3, PPC_INS_MFBR4, PPC_INS_MFBR5, PPC_INS_MFBR6, PPC_INS_MFBR7, PPC_INS_MFXER, PPC_INS_MFRTCU, PPC_INS_MFRTCL, PPC_INS_MFDSCR, PPC_INS_MFDSISR, PPC_INS_MFDAR, PPC_INS_MFSRR2, PPC_INS_MFSRR3, PPC_INS_MFCFAR, PPC_INS_MFAMR, PPC_INS_MFPID, PPC_INS_MFTBLO, PPC_INS_MFTBHI, PPC_INS_MFDBATU, PPC_INS_MFDBATL, PPC_INS_MFIBATU, PPC_INS_MFIBATL, PPC_INS_MFDCCR, PPC_INS_MFICCR, PPC_INS_MFDEAR, PPC_INS_MFESR, PPC_INS_MFSPEFSCR, PPC_INS_MFTCR, PPC_INS_MFASR, PPC_INS_MFPVR, PPC_INS_MFTBU, PPC_INS_MTCR, PPC_INS_MTBR0, PPC_INS_MTBR1, PPC_INS_MTBR2, PPC_INS_MTBR3, PPC_INS_MTBR4, PPC_INS_MTBR5, PPC_INS_MTBR6, PPC_INS_MTBR7, PPC_INS_MTXER, PPC_INS_MTDSCR, PPC_INS_MTDSISR, PPC_INS_MTDAR, PPC_INS_MTSRR2, PPC_INS_MTSRR3, PPC_INS_MTCFAR, PPC_INS_MTAMR, PPC_INS_MTPID, PPC_INS_MTTBL, PPC_INS_MTTBU, PPC_INS_MTTBLO, PPC_INS_MTTBHI, PPC_INS_MTDBATU, PPC_INS_MTDBATL, PPC_INS_MTIBATU, PPC_INS_MTIBATL, PPC_INS_MTDCCR, PPC_INS_MTICCR, PPC_INS_MTDEAR, PPC_INS_MTESR, PPC_INS_MTSPEFSCR, PPC_INS_MTTCR, PPC_INS_NOT, PPC_INS_MR, PPC_INS_ROTLD, PPC_INS_ROTLDI, PPC_INS_CLRLDI, PPC_INS_ROTLWI, PPC_INS_CLRLWI, PPC_INS_ROTLW, PPC_INS_SUB, PPC_INS_SUBC, PPC_INS_LWSYNC, PPC_INS_PTESYNC, PPC_INS_TDLT, PPC_INS_TDEQ, PPC_INS_TDGT, PPC_INS_TDNE, PPC_INS_TDLLT, PPC_INS_TDLGT, PPC_INS_TDU, PPC_INS_TDLTI, PPC_INS_TDEQI, PPC_INS_TDGTI, PPC_INS_TDNEI, PPC_INS_TDLLTI, PPC_INS_TDLGTI, PPC_INS_TDUI, PPC_INS_TLBREHI, PPC_INS_TLBRELO, PPC_INS_TLBWEHI, PPC_INS_TLBWELO, PPC_INS_TWLT, PPC_INS_TWEQ, PPC_INS_TWGT, PPC_INS_TWNE, PPC_INS_TWLLT, PPC_INS_TWLGT, PPC_INS_TWU, PPC_INS_TWLTI, PPC_INS_TWEQI, PPC_INS_TWGTI, PPC_INS_TWNEI, PPC_INS_TWLLTI, PPC_INS_TWLGTI, PPC_INS_TWUI, PPC_INS_WAITRSV, PPC_INS_WAITIMPL, PPC_INS_XNOP, PPC_INS_XVMOVDP, PPC_INS_XVMOVSP, PPC_INS_XXSPLTD, PPC_INS_XXMRGHD, PPC_INS_XXMRGLD, PPC_INS_XXSWAPD, PPC_INS_BT, PPC_INS_BF, PPC_INS_BDNZT, PPC_INS_BDNZF, PPC_INS_BDZF, PPC_INS_BDZT, PPC_INS_BFA, PPC_INS_BDNZTA, PPC_INS_BDNZFA, PPC_INS_BDZTA, PPC_INS_BDZFA, PPC_INS_BTCTR, PPC_INS_BFCTR, PPC_INS_BTCTRL, PPC_INS_BFCTRL, PPC_INS_BTL, PPC_INS_BFL, PPC_INS_BDNZTL, PPC_INS_BDNZFL, PPC_INS_BDZTL, PPC_INS_BDZFL, PPC_INS_BTLA, PPC_INS_BFLA, PPC_INS_BDNZTLA, PPC_INS_BDNZFLA, PPC_INS_BDZTLA, PPC_INS_BDZFLA, PPC_INS_BTLR, PPC_INS_BFLR, PPC_INS_BDNZTLR, PPC_INS_BDZTLR, PPC_INS_BDZFLR, PPC_INS_BTLRL, PPC_INS_BFLRL, PPC_INS_BDNZTLRL, PPC_INS_BDNZFLRL, PPC_INS_BDZTLRL, PPC_INS_BDZFLRL, // QPX PPC_INS_QVFAND, PPC_INS_QVFCLR, PPC_INS_QVFANDC, PPC_INS_QVFCTFB, PPC_INS_QVFXOR, PPC_INS_QVFOR, PPC_INS_QVFNOR, PPC_INS_QVFEQU, PPC_INS_QVFNOT, PPC_INS_QVFORC, PPC_INS_QVFNAND, PPC_INS_QVFSET, PPC_INS_ENDING, // <-- mark the end of the list of instructions } ppc_insn; /// Group of PPC instructions typedef enum ppc_insn_group { PPC_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) PPC_GRP_JUMP, ///< = CS_GRP_JUMP // Architecture-specific groups PPC_GRP_ALTIVEC = 128, PPC_GRP_MODE32, PPC_GRP_MODE64, PPC_GRP_BOOKE, PPC_GRP_NOTBOOKE, PPC_GRP_SPE, PPC_GRP_VSX, PPC_GRP_E500, PPC_GRP_PPC4XX, PPC_GRP_PPC6XX, PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR, PPC_GRP_QPX, PPC_GRP_ENDING, // <-- mark the end of the list of groups } ppc_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/sparc.h010066400017500001750000000260411363402546700210150ustar0000000000000000#ifndef CAPSTONE_SPARC_H #define CAPSTONE_SPARC_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2014-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" // GCC SPARC toolchain has a default macro called "sparc" which breaks // compilation #undef sparc #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// Enums corresponding to Sparc condition codes, both icc's and fcc's. typedef enum sparc_cc { SPARC_CC_INVALID = 0, ///< invalid CC (default) // Integer condition codes SPARC_CC_ICC_A = 8+256, ///< Always SPARC_CC_ICC_N = 0+256, ///< Never SPARC_CC_ICC_NE = 9+256, ///< Not Equal SPARC_CC_ICC_E = 1+256, ///< Equal SPARC_CC_ICC_G = 10+256, ///< Greater SPARC_CC_ICC_LE = 2+256, ///< Less or Equal SPARC_CC_ICC_GE = 11+256, ///< Greater or Equal SPARC_CC_ICC_L = 3+256, ///< Less SPARC_CC_ICC_GU = 12+256, ///< Greater Unsigned SPARC_CC_ICC_LEU = 4+256, ///< Less or Equal Unsigned SPARC_CC_ICC_CC = 13+256, ///< Carry Clear/Great or Equal Unsigned SPARC_CC_ICC_CS = 5+256, ///< Carry Set/Less Unsigned SPARC_CC_ICC_POS = 14+256, ///< Positive SPARC_CC_ICC_NEG = 6+256, ///< Negative SPARC_CC_ICC_VC = 15+256, ///< Overflow Clear SPARC_CC_ICC_VS = 7+256, ///< Overflow Set // Floating condition codes SPARC_CC_FCC_A = 8+16+256, ///< Always SPARC_CC_FCC_N = 0+16+256, ///< Never SPARC_CC_FCC_U = 7+16+256, ///< Unordered SPARC_CC_FCC_G = 6+16+256, ///< Greater SPARC_CC_FCC_UG = 5+16+256, ///< Unordered or Greater SPARC_CC_FCC_L = 4+16+256, ///< Less SPARC_CC_FCC_UL = 3+16+256, ///< Unordered or Less SPARC_CC_FCC_LG = 2+16+256, ///< Less or Greater SPARC_CC_FCC_NE = 1+16+256, ///< Not Equal SPARC_CC_FCC_E = 9+16+256, ///< Equal SPARC_CC_FCC_UE = 10+16+256, ///< Unordered or Equal SPARC_CC_FCC_GE = 11+16+256, ///< Greater or Equal SPARC_CC_FCC_UGE = 12+16+256, ///< Unordered or Greater or Equal SPARC_CC_FCC_LE = 13+16+256, ///< Less or Equal SPARC_CC_FCC_ULE = 14+16+256, ///< Unordered or Less or Equal SPARC_CC_FCC_O = 15+16+256, ///< Ordered } sparc_cc; /// Branch hint typedef enum sparc_hint { SPARC_HINT_INVALID = 0, ///< no hint SPARC_HINT_A = 1 << 0, ///< annul delay slot instruction SPARC_HINT_PT = 1 << 1, ///< branch taken SPARC_HINT_PN = 1 << 2, ///< branch NOT taken } sparc_hint; /// Operand type for instruction's operands typedef enum sparc_op_type { SPARC_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). SPARC_OP_REG, ///< = CS_OP_REG (Register operand). SPARC_OP_IMM, ///< = CS_OP_IMM (Immediate operand). SPARC_OP_MEM, ///< = CS_OP_MEM (Memory operand). } sparc_op_type; /// SPARC registers typedef enum sparc_reg { SPARC_REG_INVALID = 0, SPARC_REG_F0, SPARC_REG_F1, SPARC_REG_F2, SPARC_REG_F3, SPARC_REG_F4, SPARC_REG_F5, SPARC_REG_F6, SPARC_REG_F7, SPARC_REG_F8, SPARC_REG_F9, SPARC_REG_F10, SPARC_REG_F11, SPARC_REG_F12, SPARC_REG_F13, SPARC_REG_F14, SPARC_REG_F15, SPARC_REG_F16, SPARC_REG_F17, SPARC_REG_F18, SPARC_REG_F19, SPARC_REG_F20, SPARC_REG_F21, SPARC_REG_F22, SPARC_REG_F23, SPARC_REG_F24, SPARC_REG_F25, SPARC_REG_F26, SPARC_REG_F27, SPARC_REG_F28, SPARC_REG_F29, SPARC_REG_F30, SPARC_REG_F31, SPARC_REG_F32, SPARC_REG_F34, SPARC_REG_F36, SPARC_REG_F38, SPARC_REG_F40, SPARC_REG_F42, SPARC_REG_F44, SPARC_REG_F46, SPARC_REG_F48, SPARC_REG_F50, SPARC_REG_F52, SPARC_REG_F54, SPARC_REG_F56, SPARC_REG_F58, SPARC_REG_F60, SPARC_REG_F62, SPARC_REG_FCC0, // Floating condition codes SPARC_REG_FCC1, SPARC_REG_FCC2, SPARC_REG_FCC3, SPARC_REG_FP, SPARC_REG_G0, SPARC_REG_G1, SPARC_REG_G2, SPARC_REG_G3, SPARC_REG_G4, SPARC_REG_G5, SPARC_REG_G6, SPARC_REG_G7, SPARC_REG_I0, SPARC_REG_I1, SPARC_REG_I2, SPARC_REG_I3, SPARC_REG_I4, SPARC_REG_I5, SPARC_REG_I7, SPARC_REG_ICC, // Integer condition codes SPARC_REG_L0, SPARC_REG_L1, SPARC_REG_L2, SPARC_REG_L3, SPARC_REG_L4, SPARC_REG_L5, SPARC_REG_L6, SPARC_REG_L7, SPARC_REG_O0, SPARC_REG_O1, SPARC_REG_O2, SPARC_REG_O3, SPARC_REG_O4, SPARC_REG_O5, SPARC_REG_O7, SPARC_REG_SP, SPARC_REG_Y, // special register SPARC_REG_XCC, SPARC_REG_ENDING, // <-- mark the end of the list of registers // extras SPARC_REG_O6 = SPARC_REG_SP, SPARC_REG_I6 = SPARC_REG_FP, } sparc_reg; /// Instruction's operand referring to memory /// This is associated with SPARC_OP_MEM operand type above typedef struct sparc_op_mem { uint8_t base; ///< base register, can be safely interpreted as ///< a value of type `sparc_reg`, but it is only ///< one byte wide uint8_t index; ///< index register, same conditions apply here int32_t disp; ///< displacement/offset value } sparc_op_mem; /// Instruction operand typedef struct cs_sparc_op { sparc_op_type type; ///< operand type union { sparc_reg reg; ///< register value for REG operand int64_t imm; ///< immediate value for IMM operand sparc_op_mem mem; ///< base/disp value for MEM operand }; } cs_sparc_op; /// Instruction structure typedef struct cs_sparc { sparc_cc cc; ///< code condition for this insn sparc_hint hint; ///< branch hint: encoding as bitwise OR of sparc_hint. /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_sparc_op operands[4]; ///< operands for this instruction. } cs_sparc; /// SPARC instruction typedef enum sparc_insn { SPARC_INS_INVALID = 0, SPARC_INS_ADDCC, SPARC_INS_ADDX, SPARC_INS_ADDXCC, SPARC_INS_ADDXC, SPARC_INS_ADDXCCC, SPARC_INS_ADD, SPARC_INS_ALIGNADDR, SPARC_INS_ALIGNADDRL, SPARC_INS_ANDCC, SPARC_INS_ANDNCC, SPARC_INS_ANDN, SPARC_INS_AND, SPARC_INS_ARRAY16, SPARC_INS_ARRAY32, SPARC_INS_ARRAY8, SPARC_INS_B, SPARC_INS_JMP, SPARC_INS_BMASK, SPARC_INS_FB, SPARC_INS_BRGEZ, SPARC_INS_BRGZ, SPARC_INS_BRLEZ, SPARC_INS_BRLZ, SPARC_INS_BRNZ, SPARC_INS_BRZ, SPARC_INS_BSHUFFLE, SPARC_INS_CALL, SPARC_INS_CASX, SPARC_INS_CAS, SPARC_INS_CMASK16, SPARC_INS_CMASK32, SPARC_INS_CMASK8, SPARC_INS_CMP, SPARC_INS_EDGE16, SPARC_INS_EDGE16L, SPARC_INS_EDGE16LN, SPARC_INS_EDGE16N, SPARC_INS_EDGE32, SPARC_INS_EDGE32L, SPARC_INS_EDGE32LN, SPARC_INS_EDGE32N, SPARC_INS_EDGE8, SPARC_INS_EDGE8L, SPARC_INS_EDGE8LN, SPARC_INS_EDGE8N, SPARC_INS_FABSD, SPARC_INS_FABSQ, SPARC_INS_FABSS, SPARC_INS_FADDD, SPARC_INS_FADDQ, SPARC_INS_FADDS, SPARC_INS_FALIGNDATA, SPARC_INS_FAND, SPARC_INS_FANDNOT1, SPARC_INS_FANDNOT1S, SPARC_INS_FANDNOT2, SPARC_INS_FANDNOT2S, SPARC_INS_FANDS, SPARC_INS_FCHKSM16, SPARC_INS_FCMPD, SPARC_INS_FCMPEQ16, SPARC_INS_FCMPEQ32, SPARC_INS_FCMPGT16, SPARC_INS_FCMPGT32, SPARC_INS_FCMPLE16, SPARC_INS_FCMPLE32, SPARC_INS_FCMPNE16, SPARC_INS_FCMPNE32, SPARC_INS_FCMPQ, SPARC_INS_FCMPS, SPARC_INS_FDIVD, SPARC_INS_FDIVQ, SPARC_INS_FDIVS, SPARC_INS_FDMULQ, SPARC_INS_FDTOI, SPARC_INS_FDTOQ, SPARC_INS_FDTOS, SPARC_INS_FDTOX, SPARC_INS_FEXPAND, SPARC_INS_FHADDD, SPARC_INS_FHADDS, SPARC_INS_FHSUBD, SPARC_INS_FHSUBS, SPARC_INS_FITOD, SPARC_INS_FITOQ, SPARC_INS_FITOS, SPARC_INS_FLCMPD, SPARC_INS_FLCMPS, SPARC_INS_FLUSHW, SPARC_INS_FMEAN16, SPARC_INS_FMOVD, SPARC_INS_FMOVQ, SPARC_INS_FMOVRDGEZ, SPARC_INS_FMOVRQGEZ, SPARC_INS_FMOVRSGEZ, SPARC_INS_FMOVRDGZ, SPARC_INS_FMOVRQGZ, SPARC_INS_FMOVRSGZ, SPARC_INS_FMOVRDLEZ, SPARC_INS_FMOVRQLEZ, SPARC_INS_FMOVRSLEZ, SPARC_INS_FMOVRDLZ, SPARC_INS_FMOVRQLZ, SPARC_INS_FMOVRSLZ, SPARC_INS_FMOVRDNZ, SPARC_INS_FMOVRQNZ, SPARC_INS_FMOVRSNZ, SPARC_INS_FMOVRDZ, SPARC_INS_FMOVRQZ, SPARC_INS_FMOVRSZ, SPARC_INS_FMOVS, SPARC_INS_FMUL8SUX16, SPARC_INS_FMUL8ULX16, SPARC_INS_FMUL8X16, SPARC_INS_FMUL8X16AL, SPARC_INS_FMUL8X16AU, SPARC_INS_FMULD, SPARC_INS_FMULD8SUX16, SPARC_INS_FMULD8ULX16, SPARC_INS_FMULQ, SPARC_INS_FMULS, SPARC_INS_FNADDD, SPARC_INS_FNADDS, SPARC_INS_FNAND, SPARC_INS_FNANDS, SPARC_INS_FNEGD, SPARC_INS_FNEGQ, SPARC_INS_FNEGS, SPARC_INS_FNHADDD, SPARC_INS_FNHADDS, SPARC_INS_FNOR, SPARC_INS_FNORS, SPARC_INS_FNOT1, SPARC_INS_FNOT1S, SPARC_INS_FNOT2, SPARC_INS_FNOT2S, SPARC_INS_FONE, SPARC_INS_FONES, SPARC_INS_FOR, SPARC_INS_FORNOT1, SPARC_INS_FORNOT1S, SPARC_INS_FORNOT2, SPARC_INS_FORNOT2S, SPARC_INS_FORS, SPARC_INS_FPACK16, SPARC_INS_FPACK32, SPARC_INS_FPACKFIX, SPARC_INS_FPADD16, SPARC_INS_FPADD16S, SPARC_INS_FPADD32, SPARC_INS_FPADD32S, SPARC_INS_FPADD64, SPARC_INS_FPMERGE, SPARC_INS_FPSUB16, SPARC_INS_FPSUB16S, SPARC_INS_FPSUB32, SPARC_INS_FPSUB32S, SPARC_INS_FQTOD, SPARC_INS_FQTOI, SPARC_INS_FQTOS, SPARC_INS_FQTOX, SPARC_INS_FSLAS16, SPARC_INS_FSLAS32, SPARC_INS_FSLL16, SPARC_INS_FSLL32, SPARC_INS_FSMULD, SPARC_INS_FSQRTD, SPARC_INS_FSQRTQ, SPARC_INS_FSQRTS, SPARC_INS_FSRA16, SPARC_INS_FSRA32, SPARC_INS_FSRC1, SPARC_INS_FSRC1S, SPARC_INS_FSRC2, SPARC_INS_FSRC2S, SPARC_INS_FSRL16, SPARC_INS_FSRL32, SPARC_INS_FSTOD, SPARC_INS_FSTOI, SPARC_INS_FSTOQ, SPARC_INS_FSTOX, SPARC_INS_FSUBD, SPARC_INS_FSUBQ, SPARC_INS_FSUBS, SPARC_INS_FXNOR, SPARC_INS_FXNORS, SPARC_INS_FXOR, SPARC_INS_FXORS, SPARC_INS_FXTOD, SPARC_INS_FXTOQ, SPARC_INS_FXTOS, SPARC_INS_FZERO, SPARC_INS_FZEROS, SPARC_INS_JMPL, SPARC_INS_LDD, SPARC_INS_LD, SPARC_INS_LDQ, SPARC_INS_LDSB, SPARC_INS_LDSH, SPARC_INS_LDSW, SPARC_INS_LDUB, SPARC_INS_LDUH, SPARC_INS_LDX, SPARC_INS_LZCNT, SPARC_INS_MEMBAR, SPARC_INS_MOVDTOX, SPARC_INS_MOV, SPARC_INS_MOVRGEZ, SPARC_INS_MOVRGZ, SPARC_INS_MOVRLEZ, SPARC_INS_MOVRLZ, SPARC_INS_MOVRNZ, SPARC_INS_MOVRZ, SPARC_INS_MOVSTOSW, SPARC_INS_MOVSTOUW, SPARC_INS_MULX, SPARC_INS_NOP, SPARC_INS_ORCC, SPARC_INS_ORNCC, SPARC_INS_ORN, SPARC_INS_OR, SPARC_INS_PDIST, SPARC_INS_PDISTN, SPARC_INS_POPC, SPARC_INS_RD, SPARC_INS_RESTORE, SPARC_INS_RETT, SPARC_INS_SAVE, SPARC_INS_SDIVCC, SPARC_INS_SDIVX, SPARC_INS_SDIV, SPARC_INS_SETHI, SPARC_INS_SHUTDOWN, SPARC_INS_SIAM, SPARC_INS_SLLX, SPARC_INS_SLL, SPARC_INS_SMULCC, SPARC_INS_SMUL, SPARC_INS_SRAX, SPARC_INS_SRA, SPARC_INS_SRLX, SPARC_INS_SRL, SPARC_INS_STBAR, SPARC_INS_STB, SPARC_INS_STD, SPARC_INS_ST, SPARC_INS_STH, SPARC_INS_STQ, SPARC_INS_STX, SPARC_INS_SUBCC, SPARC_INS_SUBX, SPARC_INS_SUBXCC, SPARC_INS_SUB, SPARC_INS_SWAP, SPARC_INS_TADDCCTV, SPARC_INS_TADDCC, SPARC_INS_T, SPARC_INS_TSUBCCTV, SPARC_INS_TSUBCC, SPARC_INS_UDIVCC, SPARC_INS_UDIVX, SPARC_INS_UDIV, SPARC_INS_UMULCC, SPARC_INS_UMULXHI, SPARC_INS_UMUL, SPARC_INS_UNIMP, SPARC_INS_FCMPED, SPARC_INS_FCMPEQ, SPARC_INS_FCMPES, SPARC_INS_WR, SPARC_INS_XMULX, SPARC_INS_XMULXHI, SPARC_INS_XNORCC, SPARC_INS_XNOR, SPARC_INS_XORCC, SPARC_INS_XOR, // alias instructions SPARC_INS_RET, SPARC_INS_RETL, SPARC_INS_ENDING, // <-- mark the end of the list of instructions } sparc_insn; /// Group of SPARC instructions typedef enum sparc_insn_group { SPARC_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) SPARC_GRP_JUMP, ///< = CS_GRP_JUMP // Architecture-specific groups SPARC_GRP_HARDQUAD = 128, SPARC_GRP_V9, SPARC_GRP_VIS, SPARC_GRP_VIS2, SPARC_GRP_VIS3, SPARC_GRP_32BIT, SPARC_GRP_64BIT, SPARC_GRP_ENDING, // <-- mark the end of the list of groups } sparc_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/systemz.h010066400017500001750000000337771363402546700214410ustar0000000000000000#ifndef CAPSTONE_SYSTEMZ_H #define CAPSTONE_SYSTEMZ_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2014-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// Enums corresponding to SystemZ condition codes typedef enum sysz_cc { SYSZ_CC_INVALID = 0, ///< invalid CC (default) SYSZ_CC_O, SYSZ_CC_H, SYSZ_CC_NLE, SYSZ_CC_L, SYSZ_CC_NHE, SYSZ_CC_LH, SYSZ_CC_NE, SYSZ_CC_E, SYSZ_CC_NLH, SYSZ_CC_HE, SYSZ_CC_NL, SYSZ_CC_LE, SYSZ_CC_NH, SYSZ_CC_NO, } sysz_cc; /// Operand type for instruction's operands typedef enum sysz_op_type { SYSZ_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). SYSZ_OP_REG, ///< = CS_OP_REG (Register operand). SYSZ_OP_IMM, ///< = CS_OP_IMM (Immediate operand). SYSZ_OP_MEM, ///< = CS_OP_MEM (Memory operand). SYSZ_OP_ACREG = 64, ///< Access register operand. } sysz_op_type; /// SystemZ registers typedef enum sysz_reg { SYSZ_REG_INVALID = 0, SYSZ_REG_0, SYSZ_REG_1, SYSZ_REG_2, SYSZ_REG_3, SYSZ_REG_4, SYSZ_REG_5, SYSZ_REG_6, SYSZ_REG_7, SYSZ_REG_8, SYSZ_REG_9, SYSZ_REG_10, SYSZ_REG_11, SYSZ_REG_12, SYSZ_REG_13, SYSZ_REG_14, SYSZ_REG_15, SYSZ_REG_CC, SYSZ_REG_F0, SYSZ_REG_F1, SYSZ_REG_F2, SYSZ_REG_F3, SYSZ_REG_F4, SYSZ_REG_F5, SYSZ_REG_F6, SYSZ_REG_F7, SYSZ_REG_F8, SYSZ_REG_F9, SYSZ_REG_F10, SYSZ_REG_F11, SYSZ_REG_F12, SYSZ_REG_F13, SYSZ_REG_F14, SYSZ_REG_F15, SYSZ_REG_R0L, SYSZ_REG_ENDING, } sysz_reg; /// Instruction's operand referring to memory /// This is associated with SYSZ_OP_MEM operand type above typedef struct sysz_op_mem { uint8_t base; ///< base register, can be safely interpreted as ///< a value of type `sysz_reg`, but it is only ///< one byte wide uint8_t index; ///< index register, same conditions apply here uint64_t length; ///< BDLAddr operand int64_t disp; ///< displacement/offset value } sysz_op_mem; /// Instruction operand typedef struct cs_sysz_op { sysz_op_type type; ///< operand type union { sysz_reg reg; ///< register value for REG operand int64_t imm; ///< immediate value for IMM operand sysz_op_mem mem; ///< base/disp value for MEM operand }; } cs_sysz_op; // Instruction structure typedef struct cs_sysz { sysz_cc cc; ///< Code condition /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_sysz_op operands[6]; ///< operands for this instruction. } cs_sysz; /// SystemZ instruction typedef enum sysz_insn { SYSZ_INS_INVALID = 0, SYSZ_INS_A, SYSZ_INS_ADB, SYSZ_INS_ADBR, SYSZ_INS_AEB, SYSZ_INS_AEBR, SYSZ_INS_AFI, SYSZ_INS_AG, SYSZ_INS_AGF, SYSZ_INS_AGFI, SYSZ_INS_AGFR, SYSZ_INS_AGHI, SYSZ_INS_AGHIK, SYSZ_INS_AGR, SYSZ_INS_AGRK, SYSZ_INS_AGSI, SYSZ_INS_AH, SYSZ_INS_AHI, SYSZ_INS_AHIK, SYSZ_INS_AHY, SYSZ_INS_AIH, SYSZ_INS_AL, SYSZ_INS_ALC, SYSZ_INS_ALCG, SYSZ_INS_ALCGR, SYSZ_INS_ALCR, SYSZ_INS_ALFI, SYSZ_INS_ALG, SYSZ_INS_ALGF, SYSZ_INS_ALGFI, SYSZ_INS_ALGFR, SYSZ_INS_ALGHSIK, SYSZ_INS_ALGR, SYSZ_INS_ALGRK, SYSZ_INS_ALHSIK, SYSZ_INS_ALR, SYSZ_INS_ALRK, SYSZ_INS_ALY, SYSZ_INS_AR, SYSZ_INS_ARK, SYSZ_INS_ASI, SYSZ_INS_AXBR, SYSZ_INS_AY, SYSZ_INS_BCR, SYSZ_INS_BRC, SYSZ_INS_BRCL, SYSZ_INS_CGIJ, SYSZ_INS_CGRJ, SYSZ_INS_CIJ, SYSZ_INS_CLGIJ, SYSZ_INS_CLGRJ, SYSZ_INS_CLIJ, SYSZ_INS_CLRJ, SYSZ_INS_CRJ, SYSZ_INS_BER, SYSZ_INS_JE, SYSZ_INS_JGE, SYSZ_INS_LOCE, SYSZ_INS_LOCGE, SYSZ_INS_LOCGRE, SYSZ_INS_LOCRE, SYSZ_INS_STOCE, SYSZ_INS_STOCGE, SYSZ_INS_BHR, SYSZ_INS_BHER, SYSZ_INS_JHE, SYSZ_INS_JGHE, SYSZ_INS_LOCHE, SYSZ_INS_LOCGHE, SYSZ_INS_LOCGRHE, SYSZ_INS_LOCRHE, SYSZ_INS_STOCHE, SYSZ_INS_STOCGHE, SYSZ_INS_JH, SYSZ_INS_JGH, SYSZ_INS_LOCH, SYSZ_INS_LOCGH, SYSZ_INS_LOCGRH, SYSZ_INS_LOCRH, SYSZ_INS_STOCH, SYSZ_INS_STOCGH, SYSZ_INS_CGIJNLH, SYSZ_INS_CGRJNLH, SYSZ_INS_CIJNLH, SYSZ_INS_CLGIJNLH, SYSZ_INS_CLGRJNLH, SYSZ_INS_CLIJNLH, SYSZ_INS_CLRJNLH, SYSZ_INS_CRJNLH, SYSZ_INS_CGIJE, SYSZ_INS_CGRJE, SYSZ_INS_CIJE, SYSZ_INS_CLGIJE, SYSZ_INS_CLGRJE, SYSZ_INS_CLIJE, SYSZ_INS_CLRJE, SYSZ_INS_CRJE, SYSZ_INS_CGIJNLE, SYSZ_INS_CGRJNLE, SYSZ_INS_CIJNLE, SYSZ_INS_CLGIJNLE, SYSZ_INS_CLGRJNLE, SYSZ_INS_CLIJNLE, SYSZ_INS_CLRJNLE, SYSZ_INS_CRJNLE, SYSZ_INS_CGIJH, SYSZ_INS_CGRJH, SYSZ_INS_CIJH, SYSZ_INS_CLGIJH, SYSZ_INS_CLGRJH, SYSZ_INS_CLIJH, SYSZ_INS_CLRJH, SYSZ_INS_CRJH, SYSZ_INS_CGIJNL, SYSZ_INS_CGRJNL, SYSZ_INS_CIJNL, SYSZ_INS_CLGIJNL, SYSZ_INS_CLGRJNL, SYSZ_INS_CLIJNL, SYSZ_INS_CLRJNL, SYSZ_INS_CRJNL, SYSZ_INS_CGIJHE, SYSZ_INS_CGRJHE, SYSZ_INS_CIJHE, SYSZ_INS_CLGIJHE, SYSZ_INS_CLGRJHE, SYSZ_INS_CLIJHE, SYSZ_INS_CLRJHE, SYSZ_INS_CRJHE, SYSZ_INS_CGIJNHE, SYSZ_INS_CGRJNHE, SYSZ_INS_CIJNHE, SYSZ_INS_CLGIJNHE, SYSZ_INS_CLGRJNHE, SYSZ_INS_CLIJNHE, SYSZ_INS_CLRJNHE, SYSZ_INS_CRJNHE, SYSZ_INS_CGIJL, SYSZ_INS_CGRJL, SYSZ_INS_CIJL, SYSZ_INS_CLGIJL, SYSZ_INS_CLGRJL, SYSZ_INS_CLIJL, SYSZ_INS_CLRJL, SYSZ_INS_CRJL, SYSZ_INS_CGIJNH, SYSZ_INS_CGRJNH, SYSZ_INS_CIJNH, SYSZ_INS_CLGIJNH, SYSZ_INS_CLGRJNH, SYSZ_INS_CLIJNH, SYSZ_INS_CLRJNH, SYSZ_INS_CRJNH, SYSZ_INS_CGIJLE, SYSZ_INS_CGRJLE, SYSZ_INS_CIJLE, SYSZ_INS_CLGIJLE, SYSZ_INS_CLGRJLE, SYSZ_INS_CLIJLE, SYSZ_INS_CLRJLE, SYSZ_INS_CRJLE, SYSZ_INS_CGIJNE, SYSZ_INS_CGRJNE, SYSZ_INS_CIJNE, SYSZ_INS_CLGIJNE, SYSZ_INS_CLGRJNE, SYSZ_INS_CLIJNE, SYSZ_INS_CLRJNE, SYSZ_INS_CRJNE, SYSZ_INS_CGIJLH, SYSZ_INS_CGRJLH, SYSZ_INS_CIJLH, SYSZ_INS_CLGIJLH, SYSZ_INS_CLGRJLH, SYSZ_INS_CLIJLH, SYSZ_INS_CLRJLH, SYSZ_INS_CRJLH, SYSZ_INS_BLR, SYSZ_INS_BLER, SYSZ_INS_JLE, SYSZ_INS_JGLE, SYSZ_INS_LOCLE, SYSZ_INS_LOCGLE, SYSZ_INS_LOCGRLE, SYSZ_INS_LOCRLE, SYSZ_INS_STOCLE, SYSZ_INS_STOCGLE, SYSZ_INS_BLHR, SYSZ_INS_JLH, SYSZ_INS_JGLH, SYSZ_INS_LOCLH, SYSZ_INS_LOCGLH, SYSZ_INS_LOCGRLH, SYSZ_INS_LOCRLH, SYSZ_INS_STOCLH, SYSZ_INS_STOCGLH, SYSZ_INS_JL, SYSZ_INS_JGL, SYSZ_INS_LOCL, SYSZ_INS_LOCGL, SYSZ_INS_LOCGRL, SYSZ_INS_LOCRL, SYSZ_INS_LOC, SYSZ_INS_LOCG, SYSZ_INS_LOCGR, SYSZ_INS_LOCR, SYSZ_INS_STOCL, SYSZ_INS_STOCGL, SYSZ_INS_BNER, SYSZ_INS_JNE, SYSZ_INS_JGNE, SYSZ_INS_LOCNE, SYSZ_INS_LOCGNE, SYSZ_INS_LOCGRNE, SYSZ_INS_LOCRNE, SYSZ_INS_STOCNE, SYSZ_INS_STOCGNE, SYSZ_INS_BNHR, SYSZ_INS_BNHER, SYSZ_INS_JNHE, SYSZ_INS_JGNHE, SYSZ_INS_LOCNHE, SYSZ_INS_LOCGNHE, SYSZ_INS_LOCGRNHE, SYSZ_INS_LOCRNHE, SYSZ_INS_STOCNHE, SYSZ_INS_STOCGNHE, SYSZ_INS_JNH, SYSZ_INS_JGNH, SYSZ_INS_LOCNH, SYSZ_INS_LOCGNH, SYSZ_INS_LOCGRNH, SYSZ_INS_LOCRNH, SYSZ_INS_STOCNH, SYSZ_INS_STOCGNH, SYSZ_INS_BNLR, SYSZ_INS_BNLER, SYSZ_INS_JNLE, SYSZ_INS_JGNLE, SYSZ_INS_LOCNLE, SYSZ_INS_LOCGNLE, SYSZ_INS_LOCGRNLE, SYSZ_INS_LOCRNLE, SYSZ_INS_STOCNLE, SYSZ_INS_STOCGNLE, SYSZ_INS_BNLHR, SYSZ_INS_JNLH, SYSZ_INS_JGNLH, SYSZ_INS_LOCNLH, SYSZ_INS_LOCGNLH, SYSZ_INS_LOCGRNLH, SYSZ_INS_LOCRNLH, SYSZ_INS_STOCNLH, SYSZ_INS_STOCGNLH, SYSZ_INS_JNL, SYSZ_INS_JGNL, SYSZ_INS_LOCNL, SYSZ_INS_LOCGNL, SYSZ_INS_LOCGRNL, SYSZ_INS_LOCRNL, SYSZ_INS_STOCNL, SYSZ_INS_STOCGNL, SYSZ_INS_BNOR, SYSZ_INS_JNO, SYSZ_INS_JGNO, SYSZ_INS_LOCNO, SYSZ_INS_LOCGNO, SYSZ_INS_LOCGRNO, SYSZ_INS_LOCRNO, SYSZ_INS_STOCNO, SYSZ_INS_STOCGNO, SYSZ_INS_BOR, SYSZ_INS_JO, SYSZ_INS_JGO, SYSZ_INS_LOCO, SYSZ_INS_LOCGO, SYSZ_INS_LOCGRO, SYSZ_INS_LOCRO, SYSZ_INS_STOCO, SYSZ_INS_STOCGO, SYSZ_INS_STOC, SYSZ_INS_STOCG, SYSZ_INS_BASR, SYSZ_INS_BR, SYSZ_INS_BRAS, SYSZ_INS_BRASL, SYSZ_INS_J, SYSZ_INS_JG, SYSZ_INS_BRCT, SYSZ_INS_BRCTG, SYSZ_INS_C, SYSZ_INS_CDB, SYSZ_INS_CDBR, SYSZ_INS_CDFBR, SYSZ_INS_CDGBR, SYSZ_INS_CDLFBR, SYSZ_INS_CDLGBR, SYSZ_INS_CEB, SYSZ_INS_CEBR, SYSZ_INS_CEFBR, SYSZ_INS_CEGBR, SYSZ_INS_CELFBR, SYSZ_INS_CELGBR, SYSZ_INS_CFDBR, SYSZ_INS_CFEBR, SYSZ_INS_CFI, SYSZ_INS_CFXBR, SYSZ_INS_CG, SYSZ_INS_CGDBR, SYSZ_INS_CGEBR, SYSZ_INS_CGF, SYSZ_INS_CGFI, SYSZ_INS_CGFR, SYSZ_INS_CGFRL, SYSZ_INS_CGH, SYSZ_INS_CGHI, SYSZ_INS_CGHRL, SYSZ_INS_CGHSI, SYSZ_INS_CGR, SYSZ_INS_CGRL, SYSZ_INS_CGXBR, SYSZ_INS_CH, SYSZ_INS_CHF, SYSZ_INS_CHHSI, SYSZ_INS_CHI, SYSZ_INS_CHRL, SYSZ_INS_CHSI, SYSZ_INS_CHY, SYSZ_INS_CIH, SYSZ_INS_CL, SYSZ_INS_CLC, SYSZ_INS_CLFDBR, SYSZ_INS_CLFEBR, SYSZ_INS_CLFHSI, SYSZ_INS_CLFI, SYSZ_INS_CLFXBR, SYSZ_INS_CLG, SYSZ_INS_CLGDBR, SYSZ_INS_CLGEBR, SYSZ_INS_CLGF, SYSZ_INS_CLGFI, SYSZ_INS_CLGFR, SYSZ_INS_CLGFRL, SYSZ_INS_CLGHRL, SYSZ_INS_CLGHSI, SYSZ_INS_CLGR, SYSZ_INS_CLGRL, SYSZ_INS_CLGXBR, SYSZ_INS_CLHF, SYSZ_INS_CLHHSI, SYSZ_INS_CLHRL, SYSZ_INS_CLI, SYSZ_INS_CLIH, SYSZ_INS_CLIY, SYSZ_INS_CLR, SYSZ_INS_CLRL, SYSZ_INS_CLST, SYSZ_INS_CLY, SYSZ_INS_CPSDR, SYSZ_INS_CR, SYSZ_INS_CRL, SYSZ_INS_CS, SYSZ_INS_CSG, SYSZ_INS_CSY, SYSZ_INS_CXBR, SYSZ_INS_CXFBR, SYSZ_INS_CXGBR, SYSZ_INS_CXLFBR, SYSZ_INS_CXLGBR, SYSZ_INS_CY, SYSZ_INS_DDB, SYSZ_INS_DDBR, SYSZ_INS_DEB, SYSZ_INS_DEBR, SYSZ_INS_DL, SYSZ_INS_DLG, SYSZ_INS_DLGR, SYSZ_INS_DLR, SYSZ_INS_DSG, SYSZ_INS_DSGF, SYSZ_INS_DSGFR, SYSZ_INS_DSGR, SYSZ_INS_DXBR, SYSZ_INS_EAR, SYSZ_INS_FIDBR, SYSZ_INS_FIDBRA, SYSZ_INS_FIEBR, SYSZ_INS_FIEBRA, SYSZ_INS_FIXBR, SYSZ_INS_FIXBRA, SYSZ_INS_FLOGR, SYSZ_INS_IC, SYSZ_INS_ICY, SYSZ_INS_IIHF, SYSZ_INS_IIHH, SYSZ_INS_IIHL, SYSZ_INS_IILF, SYSZ_INS_IILH, SYSZ_INS_IILL, SYSZ_INS_IPM, SYSZ_INS_L, SYSZ_INS_LA, SYSZ_INS_LAA, SYSZ_INS_LAAG, SYSZ_INS_LAAL, SYSZ_INS_LAALG, SYSZ_INS_LAN, SYSZ_INS_LANG, SYSZ_INS_LAO, SYSZ_INS_LAOG, SYSZ_INS_LARL, SYSZ_INS_LAX, SYSZ_INS_LAXG, SYSZ_INS_LAY, SYSZ_INS_LB, SYSZ_INS_LBH, SYSZ_INS_LBR, SYSZ_INS_LCDBR, SYSZ_INS_LCEBR, SYSZ_INS_LCGFR, SYSZ_INS_LCGR, SYSZ_INS_LCR, SYSZ_INS_LCXBR, SYSZ_INS_LD, SYSZ_INS_LDEB, SYSZ_INS_LDEBR, SYSZ_INS_LDGR, SYSZ_INS_LDR, SYSZ_INS_LDXBR, SYSZ_INS_LDXBRA, SYSZ_INS_LDY, SYSZ_INS_LE, SYSZ_INS_LEDBR, SYSZ_INS_LEDBRA, SYSZ_INS_LER, SYSZ_INS_LEXBR, SYSZ_INS_LEXBRA, SYSZ_INS_LEY, SYSZ_INS_LFH, SYSZ_INS_LG, SYSZ_INS_LGB, SYSZ_INS_LGBR, SYSZ_INS_LGDR, SYSZ_INS_LGF, SYSZ_INS_LGFI, SYSZ_INS_LGFR, SYSZ_INS_LGFRL, SYSZ_INS_LGH, SYSZ_INS_LGHI, SYSZ_INS_LGHR, SYSZ_INS_LGHRL, SYSZ_INS_LGR, SYSZ_INS_LGRL, SYSZ_INS_LH, SYSZ_INS_LHH, SYSZ_INS_LHI, SYSZ_INS_LHR, SYSZ_INS_LHRL, SYSZ_INS_LHY, SYSZ_INS_LLC, SYSZ_INS_LLCH, SYSZ_INS_LLCR, SYSZ_INS_LLGC, SYSZ_INS_LLGCR, SYSZ_INS_LLGF, SYSZ_INS_LLGFR, SYSZ_INS_LLGFRL, SYSZ_INS_LLGH, SYSZ_INS_LLGHR, SYSZ_INS_LLGHRL, SYSZ_INS_LLH, SYSZ_INS_LLHH, SYSZ_INS_LLHR, SYSZ_INS_LLHRL, SYSZ_INS_LLIHF, SYSZ_INS_LLIHH, SYSZ_INS_LLIHL, SYSZ_INS_LLILF, SYSZ_INS_LLILH, SYSZ_INS_LLILL, SYSZ_INS_LMG, SYSZ_INS_LNDBR, SYSZ_INS_LNEBR, SYSZ_INS_LNGFR, SYSZ_INS_LNGR, SYSZ_INS_LNR, SYSZ_INS_LNXBR, SYSZ_INS_LPDBR, SYSZ_INS_LPEBR, SYSZ_INS_LPGFR, SYSZ_INS_LPGR, SYSZ_INS_LPR, SYSZ_INS_LPXBR, SYSZ_INS_LR, SYSZ_INS_LRL, SYSZ_INS_LRV, SYSZ_INS_LRVG, SYSZ_INS_LRVGR, SYSZ_INS_LRVR, SYSZ_INS_LT, SYSZ_INS_LTDBR, SYSZ_INS_LTEBR, SYSZ_INS_LTG, SYSZ_INS_LTGF, SYSZ_INS_LTGFR, SYSZ_INS_LTGR, SYSZ_INS_LTR, SYSZ_INS_LTXBR, SYSZ_INS_LXDB, SYSZ_INS_LXDBR, SYSZ_INS_LXEB, SYSZ_INS_LXEBR, SYSZ_INS_LXR, SYSZ_INS_LY, SYSZ_INS_LZDR, SYSZ_INS_LZER, SYSZ_INS_LZXR, SYSZ_INS_MADB, SYSZ_INS_MADBR, SYSZ_INS_MAEB, SYSZ_INS_MAEBR, SYSZ_INS_MDB, SYSZ_INS_MDBR, SYSZ_INS_MDEB, SYSZ_INS_MDEBR, SYSZ_INS_MEEB, SYSZ_INS_MEEBR, SYSZ_INS_MGHI, SYSZ_INS_MH, SYSZ_INS_MHI, SYSZ_INS_MHY, SYSZ_INS_MLG, SYSZ_INS_MLGR, SYSZ_INS_MS, SYSZ_INS_MSDB, SYSZ_INS_MSDBR, SYSZ_INS_MSEB, SYSZ_INS_MSEBR, SYSZ_INS_MSFI, SYSZ_INS_MSG, SYSZ_INS_MSGF, SYSZ_INS_MSGFI, SYSZ_INS_MSGFR, SYSZ_INS_MSGR, SYSZ_INS_MSR, SYSZ_INS_MSY, SYSZ_INS_MVC, SYSZ_INS_MVGHI, SYSZ_INS_MVHHI, SYSZ_INS_MVHI, SYSZ_INS_MVI, SYSZ_INS_MVIY, SYSZ_INS_MVST, SYSZ_INS_MXBR, SYSZ_INS_MXDB, SYSZ_INS_MXDBR, SYSZ_INS_N, SYSZ_INS_NC, SYSZ_INS_NG, SYSZ_INS_NGR, SYSZ_INS_NGRK, SYSZ_INS_NI, SYSZ_INS_NIHF, SYSZ_INS_NIHH, SYSZ_INS_NIHL, SYSZ_INS_NILF, SYSZ_INS_NILH, SYSZ_INS_NILL, SYSZ_INS_NIY, SYSZ_INS_NR, SYSZ_INS_NRK, SYSZ_INS_NY, SYSZ_INS_O, SYSZ_INS_OC, SYSZ_INS_OG, SYSZ_INS_OGR, SYSZ_INS_OGRK, SYSZ_INS_OI, SYSZ_INS_OIHF, SYSZ_INS_OIHH, SYSZ_INS_OIHL, SYSZ_INS_OILF, SYSZ_INS_OILH, SYSZ_INS_OILL, SYSZ_INS_OIY, SYSZ_INS_OR, SYSZ_INS_ORK, SYSZ_INS_OY, SYSZ_INS_PFD, SYSZ_INS_PFDRL, SYSZ_INS_RISBG, SYSZ_INS_RISBHG, SYSZ_INS_RISBLG, SYSZ_INS_RLL, SYSZ_INS_RLLG, SYSZ_INS_RNSBG, SYSZ_INS_ROSBG, SYSZ_INS_RXSBG, SYSZ_INS_S, SYSZ_INS_SDB, SYSZ_INS_SDBR, SYSZ_INS_SEB, SYSZ_INS_SEBR, SYSZ_INS_SG, SYSZ_INS_SGF, SYSZ_INS_SGFR, SYSZ_INS_SGR, SYSZ_INS_SGRK, SYSZ_INS_SH, SYSZ_INS_SHY, SYSZ_INS_SL, SYSZ_INS_SLB, SYSZ_INS_SLBG, SYSZ_INS_SLBR, SYSZ_INS_SLFI, SYSZ_INS_SLG, SYSZ_INS_SLBGR, SYSZ_INS_SLGF, SYSZ_INS_SLGFI, SYSZ_INS_SLGFR, SYSZ_INS_SLGR, SYSZ_INS_SLGRK, SYSZ_INS_SLL, SYSZ_INS_SLLG, SYSZ_INS_SLLK, SYSZ_INS_SLR, SYSZ_INS_SLRK, SYSZ_INS_SLY, SYSZ_INS_SQDB, SYSZ_INS_SQDBR, SYSZ_INS_SQEB, SYSZ_INS_SQEBR, SYSZ_INS_SQXBR, SYSZ_INS_SR, SYSZ_INS_SRA, SYSZ_INS_SRAG, SYSZ_INS_SRAK, SYSZ_INS_SRK, SYSZ_INS_SRL, SYSZ_INS_SRLG, SYSZ_INS_SRLK, SYSZ_INS_SRST, SYSZ_INS_ST, SYSZ_INS_STC, SYSZ_INS_STCH, SYSZ_INS_STCY, SYSZ_INS_STD, SYSZ_INS_STDY, SYSZ_INS_STE, SYSZ_INS_STEY, SYSZ_INS_STFH, SYSZ_INS_STG, SYSZ_INS_STGRL, SYSZ_INS_STH, SYSZ_INS_STHH, SYSZ_INS_STHRL, SYSZ_INS_STHY, SYSZ_INS_STMG, SYSZ_INS_STRL, SYSZ_INS_STRV, SYSZ_INS_STRVG, SYSZ_INS_STY, SYSZ_INS_SXBR, SYSZ_INS_SY, SYSZ_INS_TM, SYSZ_INS_TMHH, SYSZ_INS_TMHL, SYSZ_INS_TMLH, SYSZ_INS_TMLL, SYSZ_INS_TMY, SYSZ_INS_X, SYSZ_INS_XC, SYSZ_INS_XG, SYSZ_INS_XGR, SYSZ_INS_XGRK, SYSZ_INS_XI, SYSZ_INS_XIHF, SYSZ_INS_XILF, SYSZ_INS_XIY, SYSZ_INS_XR, SYSZ_INS_XRK, SYSZ_INS_XY, SYSZ_INS_ENDING, // <-- mark the end of the list of instructions } sysz_insn; /// Group of SystemZ instructions typedef enum sysz_insn_group { SYSZ_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) SYSZ_GRP_JUMP, ///< = CS_GRP_JUMP // Architecture-specific groups SYSZ_GRP_DISTINCTOPS = 128, SYSZ_GRP_FPEXTENSION, SYSZ_GRP_HIGHWORD, SYSZ_GRP_INTERLOCKEDACCESS1, SYSZ_GRP_LOADSTOREONCOND, SYSZ_GRP_ENDING, // <-- mark the end of the list of groups } sysz_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/tms320c64x.h010066400017500001750000000201061363402546700214360ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #ifndef CAPSTONE_TMS320C64X_H #define CAPSTONE_TMS320C64X_H #ifdef __cplusplus extern "C" { #endif #include #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif typedef enum tms320c64x_op_type { TMS320C64X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). TMS320C64X_OP_REG, ///< = CS_OP_REG (Register operand). TMS320C64X_OP_IMM, ///< = CS_OP_IMM (Immediate operand). TMS320C64X_OP_MEM, ///< = CS_OP_MEM (Memory operand). TMS320C64X_OP_REGPAIR = 64, ///< Register pair for double word ops } tms320c64x_op_type; typedef enum tms320c64x_mem_disp { TMS320C64X_MEM_DISP_INVALID = 0, TMS320C64X_MEM_DISP_CONSTANT, TMS320C64X_MEM_DISP_REGISTER, } tms320c64x_mem_disp; typedef enum tms320c64x_mem_dir { TMS320C64X_MEM_DIR_INVALID = 0, TMS320C64X_MEM_DIR_FW, TMS320C64X_MEM_DIR_BW, } tms320c64x_mem_dir; typedef enum tms320c64x_mem_mod { TMS320C64X_MEM_MOD_INVALID = 0, TMS320C64X_MEM_MOD_NO, TMS320C64X_MEM_MOD_PRE, TMS320C64X_MEM_MOD_POST, } tms320c64x_mem_mod; typedef struct tms320c64x_op_mem { unsigned int base; ///< base register unsigned int disp; ///< displacement/offset value unsigned int unit; ///< unit of base and offset register unsigned int scaled; ///< offset scaled unsigned int disptype; ///< displacement type unsigned int direction; ///< direction unsigned int modify; ///< modification } tms320c64x_op_mem; typedef struct cs_tms320c64x_op { tms320c64x_op_type type; ///< operand type union { unsigned int reg; ///< register value for REG operand or first register for REGPAIR operand int32_t imm; ///< immediate value for IMM operand tms320c64x_op_mem mem; ///< base/disp value for MEM operand }; } cs_tms320c64x_op; typedef struct cs_tms320c64x { uint8_t op_count; cs_tms320c64x_op operands[8]; ///< operands for this instruction. struct { unsigned int reg; unsigned int zero; } condition; struct { unsigned int unit; unsigned int side; unsigned int crosspath; } funit; unsigned int parallel; } cs_tms320c64x; typedef enum tms320c64x_reg { TMS320C64X_REG_INVALID = 0, TMS320C64X_REG_AMR, TMS320C64X_REG_CSR, TMS320C64X_REG_DIER, TMS320C64X_REG_DNUM, TMS320C64X_REG_ECR, TMS320C64X_REG_GFPGFR, TMS320C64X_REG_GPLYA, TMS320C64X_REG_GPLYB, TMS320C64X_REG_ICR, TMS320C64X_REG_IER, TMS320C64X_REG_IERR, TMS320C64X_REG_ILC, TMS320C64X_REG_IRP, TMS320C64X_REG_ISR, TMS320C64X_REG_ISTP, TMS320C64X_REG_ITSR, TMS320C64X_REG_NRP, TMS320C64X_REG_NTSR, TMS320C64X_REG_REP, TMS320C64X_REG_RILC, TMS320C64X_REG_SSR, TMS320C64X_REG_TSCH, TMS320C64X_REG_TSCL, TMS320C64X_REG_TSR, TMS320C64X_REG_A0, TMS320C64X_REG_A1, TMS320C64X_REG_A2, TMS320C64X_REG_A3, TMS320C64X_REG_A4, TMS320C64X_REG_A5, TMS320C64X_REG_A6, TMS320C64X_REG_A7, TMS320C64X_REG_A8, TMS320C64X_REG_A9, TMS320C64X_REG_A10, TMS320C64X_REG_A11, TMS320C64X_REG_A12, TMS320C64X_REG_A13, TMS320C64X_REG_A14, TMS320C64X_REG_A15, TMS320C64X_REG_A16, TMS320C64X_REG_A17, TMS320C64X_REG_A18, TMS320C64X_REG_A19, TMS320C64X_REG_A20, TMS320C64X_REG_A21, TMS320C64X_REG_A22, TMS320C64X_REG_A23, TMS320C64X_REG_A24, TMS320C64X_REG_A25, TMS320C64X_REG_A26, TMS320C64X_REG_A27, TMS320C64X_REG_A28, TMS320C64X_REG_A29, TMS320C64X_REG_A30, TMS320C64X_REG_A31, TMS320C64X_REG_B0, TMS320C64X_REG_B1, TMS320C64X_REG_B2, TMS320C64X_REG_B3, TMS320C64X_REG_B4, TMS320C64X_REG_B5, TMS320C64X_REG_B6, TMS320C64X_REG_B7, TMS320C64X_REG_B8, TMS320C64X_REG_B9, TMS320C64X_REG_B10, TMS320C64X_REG_B11, TMS320C64X_REG_B12, TMS320C64X_REG_B13, TMS320C64X_REG_B14, TMS320C64X_REG_B15, TMS320C64X_REG_B16, TMS320C64X_REG_B17, TMS320C64X_REG_B18, TMS320C64X_REG_B19, TMS320C64X_REG_B20, TMS320C64X_REG_B21, TMS320C64X_REG_B22, TMS320C64X_REG_B23, TMS320C64X_REG_B24, TMS320C64X_REG_B25, TMS320C64X_REG_B26, TMS320C64X_REG_B27, TMS320C64X_REG_B28, TMS320C64X_REG_B29, TMS320C64X_REG_B30, TMS320C64X_REG_B31, TMS320C64X_REG_PCE1, TMS320C64X_REG_ENDING, // <-- mark the end of the list of registers // Alias registers TMS320C64X_REG_EFR = TMS320C64X_REG_ECR, TMS320C64X_REG_IFR = TMS320C64X_REG_ISR, } tms320c64x_reg; typedef enum tms320c64x_insn { TMS320C64X_INS_INVALID = 0, TMS320C64X_INS_ABS, TMS320C64X_INS_ABS2, TMS320C64X_INS_ADD, TMS320C64X_INS_ADD2, TMS320C64X_INS_ADD4, TMS320C64X_INS_ADDAB, TMS320C64X_INS_ADDAD, TMS320C64X_INS_ADDAH, TMS320C64X_INS_ADDAW, TMS320C64X_INS_ADDK, TMS320C64X_INS_ADDKPC, TMS320C64X_INS_ADDU, TMS320C64X_INS_AND, TMS320C64X_INS_ANDN, TMS320C64X_INS_AVG2, TMS320C64X_INS_AVGU4, TMS320C64X_INS_B, TMS320C64X_INS_BDEC, TMS320C64X_INS_BITC4, TMS320C64X_INS_BNOP, TMS320C64X_INS_BPOS, TMS320C64X_INS_CLR, TMS320C64X_INS_CMPEQ, TMS320C64X_INS_CMPEQ2, TMS320C64X_INS_CMPEQ4, TMS320C64X_INS_CMPGT, TMS320C64X_INS_CMPGT2, TMS320C64X_INS_CMPGTU4, TMS320C64X_INS_CMPLT, TMS320C64X_INS_CMPLTU, TMS320C64X_INS_DEAL, TMS320C64X_INS_DOTP2, TMS320C64X_INS_DOTPN2, TMS320C64X_INS_DOTPNRSU2, TMS320C64X_INS_DOTPRSU2, TMS320C64X_INS_DOTPSU4, TMS320C64X_INS_DOTPU4, TMS320C64X_INS_EXT, TMS320C64X_INS_EXTU, TMS320C64X_INS_GMPGTU, TMS320C64X_INS_GMPY4, TMS320C64X_INS_LDB, TMS320C64X_INS_LDBU, TMS320C64X_INS_LDDW, TMS320C64X_INS_LDH, TMS320C64X_INS_LDHU, TMS320C64X_INS_LDNDW, TMS320C64X_INS_LDNW, TMS320C64X_INS_LDW, TMS320C64X_INS_LMBD, TMS320C64X_INS_MAX2, TMS320C64X_INS_MAXU4, TMS320C64X_INS_MIN2, TMS320C64X_INS_MINU4, TMS320C64X_INS_MPY, TMS320C64X_INS_MPY2, TMS320C64X_INS_MPYH, TMS320C64X_INS_MPYHI, TMS320C64X_INS_MPYHIR, TMS320C64X_INS_MPYHL, TMS320C64X_INS_MPYHLU, TMS320C64X_INS_MPYHSLU, TMS320C64X_INS_MPYHSU, TMS320C64X_INS_MPYHU, TMS320C64X_INS_MPYHULS, TMS320C64X_INS_MPYHUS, TMS320C64X_INS_MPYLH, TMS320C64X_INS_MPYLHU, TMS320C64X_INS_MPYLI, TMS320C64X_INS_MPYLIR, TMS320C64X_INS_MPYLSHU, TMS320C64X_INS_MPYLUHS, TMS320C64X_INS_MPYSU, TMS320C64X_INS_MPYSU4, TMS320C64X_INS_MPYU, TMS320C64X_INS_MPYU4, TMS320C64X_INS_MPYUS, TMS320C64X_INS_MVC, TMS320C64X_INS_MVD, TMS320C64X_INS_MVK, TMS320C64X_INS_MVKL, TMS320C64X_INS_MVKLH, TMS320C64X_INS_NOP, TMS320C64X_INS_NORM, TMS320C64X_INS_OR, TMS320C64X_INS_PACK2, TMS320C64X_INS_PACKH2, TMS320C64X_INS_PACKH4, TMS320C64X_INS_PACKHL2, TMS320C64X_INS_PACKL4, TMS320C64X_INS_PACKLH2, TMS320C64X_INS_ROTL, TMS320C64X_INS_SADD, TMS320C64X_INS_SADD2, TMS320C64X_INS_SADDU4, TMS320C64X_INS_SADDUS2, TMS320C64X_INS_SAT, TMS320C64X_INS_SET, TMS320C64X_INS_SHFL, TMS320C64X_INS_SHL, TMS320C64X_INS_SHLMB, TMS320C64X_INS_SHR, TMS320C64X_INS_SHR2, TMS320C64X_INS_SHRMB, TMS320C64X_INS_SHRU, TMS320C64X_INS_SHRU2, TMS320C64X_INS_SMPY, TMS320C64X_INS_SMPY2, TMS320C64X_INS_SMPYH, TMS320C64X_INS_SMPYHL, TMS320C64X_INS_SMPYLH, TMS320C64X_INS_SPACK2, TMS320C64X_INS_SPACKU4, TMS320C64X_INS_SSHL, TMS320C64X_INS_SSHVL, TMS320C64X_INS_SSHVR, TMS320C64X_INS_SSUB, TMS320C64X_INS_STB, TMS320C64X_INS_STDW, TMS320C64X_INS_STH, TMS320C64X_INS_STNDW, TMS320C64X_INS_STNW, TMS320C64X_INS_STW, TMS320C64X_INS_SUB, TMS320C64X_INS_SUB2, TMS320C64X_INS_SUB4, TMS320C64X_INS_SUBAB, TMS320C64X_INS_SUBABS4, TMS320C64X_INS_SUBAH, TMS320C64X_INS_SUBAW, TMS320C64X_INS_SUBC, TMS320C64X_INS_SUBU, TMS320C64X_INS_SWAP4, TMS320C64X_INS_UNPKHU4, TMS320C64X_INS_UNPKLU4, TMS320C64X_INS_XOR, TMS320C64X_INS_XPND2, TMS320C64X_INS_XPND4, // Aliases TMS320C64X_INS_IDLE, TMS320C64X_INS_MV, TMS320C64X_INS_NEG, TMS320C64X_INS_NOT, TMS320C64X_INS_SWAP2, TMS320C64X_INS_ZERO, TMS320C64X_INS_ENDING, // <-- mark the end of the list of instructions } tms320c64x_insn; typedef enum tms320c64x_insn_group { TMS320C64X_GRP_INVALID = 0, ///< = CS_GRP_INVALID TMS320C64X_GRP_JUMP, ///< = CS_GRP_JUMP TMS320C64X_GRP_FUNIT_D = 128, TMS320C64X_GRP_FUNIT_L, TMS320C64X_GRP_FUNIT_M, TMS320C64X_GRP_FUNIT_S, TMS320C64X_GRP_FUNIT_NO, TMS320C64X_GRP_ENDING, // <-- mark the end of the list of groups } tms320c64x_insn_group; typedef enum tms320c64x_funit { TMS320C64X_FUNIT_INVALID = 0, TMS320C64X_FUNIT_D, TMS320C64X_FUNIT_L, TMS320C64X_FUNIT_M, TMS320C64X_FUNIT_S, TMS320C64X_FUNIT_NO } tms320c64x_funit; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/x86.h010066400017500001750000001235311363402546700203340ustar0000000000000000#ifndef CAPSTONE_X86_H #define CAPSTONE_X86_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" /// Calculate relative address for X86-64, given cs_insn structure #define X86_REL_ADDR(insn) (((insn).detail->x86.operands[0].type == X86_OP_IMM) \ ? (uint64_t)((insn).detail->x86.operands[0].imm) \ : (((insn).address + (insn).size) + (uint64_t)(insn).detail->x86.disp)) /// X86 registers typedef enum x86_reg { X86_REG_INVALID = 0, X86_REG_AH, X86_REG_AL, X86_REG_AX, X86_REG_BH, X86_REG_BL, X86_REG_BP, X86_REG_BPL, X86_REG_BX, X86_REG_CH, X86_REG_CL, X86_REG_CS, X86_REG_CX, X86_REG_DH, X86_REG_DI, X86_REG_DIL, X86_REG_DL, X86_REG_DS, X86_REG_DX, X86_REG_EAX, X86_REG_EBP, X86_REG_EBX, X86_REG_ECX, X86_REG_EDI, X86_REG_EDX, X86_REG_EFLAGS, X86_REG_EIP, X86_REG_EIZ, X86_REG_ES, X86_REG_ESI, X86_REG_ESP, X86_REG_FPSW, X86_REG_FS, X86_REG_GS, X86_REG_IP, X86_REG_RAX, X86_REG_RBP, X86_REG_RBX, X86_REG_RCX, X86_REG_RDI, X86_REG_RDX, X86_REG_RIP, X86_REG_RIZ, X86_REG_RSI, X86_REG_RSP, X86_REG_SI, X86_REG_SIL, X86_REG_SP, X86_REG_SPL, X86_REG_SS, X86_REG_CR0, X86_REG_CR1, X86_REG_CR2, X86_REG_CR3, X86_REG_CR4, X86_REG_CR5, X86_REG_CR6, X86_REG_CR7, X86_REG_CR8, X86_REG_CR9, X86_REG_CR10, X86_REG_CR11, X86_REG_CR12, X86_REG_CR13, X86_REG_CR14, X86_REG_CR15, X86_REG_DR0, X86_REG_DR1, X86_REG_DR2, X86_REG_DR3, X86_REG_DR4, X86_REG_DR5, X86_REG_DR6, X86_REG_DR7, X86_REG_DR8, X86_REG_DR9, X86_REG_DR10, X86_REG_DR11, X86_REG_DR12, X86_REG_DR13, X86_REG_DR14, X86_REG_DR15, X86_REG_FP0, X86_REG_FP1, X86_REG_FP2, X86_REG_FP3, X86_REG_FP4, X86_REG_FP5, X86_REG_FP6, X86_REG_FP7, X86_REG_K0, X86_REG_K1, X86_REG_K2, X86_REG_K3, X86_REG_K4, X86_REG_K5, X86_REG_K6, X86_REG_K7, X86_REG_MM0, X86_REG_MM1, X86_REG_MM2, X86_REG_MM3, X86_REG_MM4, X86_REG_MM5, X86_REG_MM6, X86_REG_MM7, X86_REG_R8, X86_REG_R9, X86_REG_R10, X86_REG_R11, X86_REG_R12, X86_REG_R13, X86_REG_R14, X86_REG_R15, X86_REG_ST0, X86_REG_ST1, X86_REG_ST2, X86_REG_ST3, X86_REG_ST4, X86_REG_ST5, X86_REG_ST6, X86_REG_ST7, X86_REG_XMM0, X86_REG_XMM1, X86_REG_XMM2, X86_REG_XMM3, X86_REG_XMM4, X86_REG_XMM5, X86_REG_XMM6, X86_REG_XMM7, X86_REG_XMM8, X86_REG_XMM9, X86_REG_XMM10, X86_REG_XMM11, X86_REG_XMM12, X86_REG_XMM13, X86_REG_XMM14, X86_REG_XMM15, X86_REG_XMM16, X86_REG_XMM17, X86_REG_XMM18, X86_REG_XMM19, X86_REG_XMM20, X86_REG_XMM21, X86_REG_XMM22, X86_REG_XMM23, X86_REG_XMM24, X86_REG_XMM25, X86_REG_XMM26, X86_REG_XMM27, X86_REG_XMM28, X86_REG_XMM29, X86_REG_XMM30, X86_REG_XMM31, X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, X86_REG_YMM16, X86_REG_YMM17, X86_REG_YMM18, X86_REG_YMM19, X86_REG_YMM20, X86_REG_YMM21, X86_REG_YMM22, X86_REG_YMM23, X86_REG_YMM24, X86_REG_YMM25, X86_REG_YMM26, X86_REG_YMM27, X86_REG_YMM28, X86_REG_YMM29, X86_REG_YMM30, X86_REG_YMM31, X86_REG_ZMM0, X86_REG_ZMM1, X86_REG_ZMM2, X86_REG_ZMM3, X86_REG_ZMM4, X86_REG_ZMM5, X86_REG_ZMM6, X86_REG_ZMM7, X86_REG_ZMM8, X86_REG_ZMM9, X86_REG_ZMM10, X86_REG_ZMM11, X86_REG_ZMM12, X86_REG_ZMM13, X86_REG_ZMM14, X86_REG_ZMM15, X86_REG_ZMM16, X86_REG_ZMM17, X86_REG_ZMM18, X86_REG_ZMM19, X86_REG_ZMM20, X86_REG_ZMM21, X86_REG_ZMM22, X86_REG_ZMM23, X86_REG_ZMM24, X86_REG_ZMM25, X86_REG_ZMM26, X86_REG_ZMM27, X86_REG_ZMM28, X86_REG_ZMM29, X86_REG_ZMM30, X86_REG_ZMM31, X86_REG_R8B, X86_REG_R9B, X86_REG_R10B, X86_REG_R11B, X86_REG_R12B, X86_REG_R13B, X86_REG_R14B, X86_REG_R15B, X86_REG_R8D, X86_REG_R9D, X86_REG_R10D, X86_REG_R11D, X86_REG_R12D, X86_REG_R13D, X86_REG_R14D, X86_REG_R15D, X86_REG_R8W, X86_REG_R9W, X86_REG_R10W, X86_REG_R11W, X86_REG_R12W, X86_REG_R13W, X86_REG_R14W, X86_REG_R15W, X86_REG_ENDING // <-- mark the end of the list of registers } x86_reg; // Sub-flags of EFLAGS #define X86_EFLAGS_MODIFY_AF (1ULL << 0) #define X86_EFLAGS_MODIFY_CF (1ULL << 1) #define X86_EFLAGS_MODIFY_SF (1ULL << 2) #define X86_EFLAGS_MODIFY_ZF (1ULL << 3) #define X86_EFLAGS_MODIFY_PF (1ULL << 4) #define X86_EFLAGS_MODIFY_OF (1ULL << 5) #define X86_EFLAGS_MODIFY_TF (1ULL << 6) #define X86_EFLAGS_MODIFY_IF (1ULL << 7) #define X86_EFLAGS_MODIFY_DF (1ULL << 8) #define X86_EFLAGS_MODIFY_NT (1ULL << 9) #define X86_EFLAGS_MODIFY_RF (1ULL << 10) #define X86_EFLAGS_PRIOR_OF (1ULL << 11) #define X86_EFLAGS_PRIOR_SF (1ULL << 12) #define X86_EFLAGS_PRIOR_ZF (1ULL << 13) #define X86_EFLAGS_PRIOR_AF (1ULL << 14) #define X86_EFLAGS_PRIOR_PF (1ULL << 15) #define X86_EFLAGS_PRIOR_CF (1ULL << 16) #define X86_EFLAGS_PRIOR_TF (1ULL << 17) #define X86_EFLAGS_PRIOR_IF (1ULL << 18) #define X86_EFLAGS_PRIOR_DF (1ULL << 19) #define X86_EFLAGS_PRIOR_NT (1ULL << 20) #define X86_EFLAGS_RESET_OF (1ULL << 21) #define X86_EFLAGS_RESET_CF (1ULL << 22) #define X86_EFLAGS_RESET_DF (1ULL << 23) #define X86_EFLAGS_RESET_IF (1ULL << 24) #define X86_EFLAGS_RESET_SF (1ULL << 25) #define X86_EFLAGS_RESET_AF (1ULL << 26) #define X86_EFLAGS_RESET_TF (1ULL << 27) #define X86_EFLAGS_RESET_NT (1ULL << 28) #define X86_EFLAGS_RESET_PF (1ULL << 29) #define X86_EFLAGS_SET_CF (1ULL << 30) #define X86_EFLAGS_SET_DF (1ULL << 31) #define X86_EFLAGS_SET_IF (1ULL << 32) #define X86_EFLAGS_TEST_OF (1ULL << 33) #define X86_EFLAGS_TEST_SF (1ULL << 34) #define X86_EFLAGS_TEST_ZF (1ULL << 35) #define X86_EFLAGS_TEST_PF (1ULL << 36) #define X86_EFLAGS_TEST_CF (1ULL << 37) #define X86_EFLAGS_TEST_NT (1ULL << 38) #define X86_EFLAGS_TEST_DF (1ULL << 39) #define X86_EFLAGS_UNDEFINED_OF (1ULL << 40) #define X86_EFLAGS_UNDEFINED_SF (1ULL << 41) #define X86_EFLAGS_UNDEFINED_ZF (1ULL << 42) #define X86_EFLAGS_UNDEFINED_PF (1ULL << 43) #define X86_EFLAGS_UNDEFINED_AF (1ULL << 44) #define X86_EFLAGS_UNDEFINED_CF (1ULL << 45) #define X86_EFLAGS_RESET_RF (1ULL << 46) #define X86_EFLAGS_TEST_RF (1ULL << 47) #define X86_EFLAGS_TEST_IF (1ULL << 48) #define X86_EFLAGS_TEST_TF (1ULL << 49) #define X86_EFLAGS_TEST_AF (1ULL << 50) #define X86_EFLAGS_RESET_ZF (1ULL << 51) #define X86_EFLAGS_SET_OF (1ULL << 52) #define X86_EFLAGS_SET_SF (1ULL << 53) #define X86_EFLAGS_SET_ZF (1ULL << 54) #define X86_EFLAGS_SET_AF (1ULL << 55) #define X86_EFLAGS_SET_PF (1ULL << 56) #define X86_EFLAGS_RESET_0F (1ULL << 57) #define X86_EFLAGS_RESET_AC (1ULL << 58) #define X86_FPU_FLAGS_MODIFY_C0 (1ULL << 0) #define X86_FPU_FLAGS_MODIFY_C1 (1ULL << 1) #define X86_FPU_FLAGS_MODIFY_C2 (1ULL << 2) #define X86_FPU_FLAGS_MODIFY_C3 (1ULL << 3) #define X86_FPU_FLAGS_RESET_C0 (1ULL << 4) #define X86_FPU_FLAGS_RESET_C1 (1ULL << 5) #define X86_FPU_FLAGS_RESET_C2 (1ULL << 6) #define X86_FPU_FLAGS_RESET_C3 (1ULL << 7) #define X86_FPU_FLAGS_SET_C0 (1ULL << 8) #define X86_FPU_FLAGS_SET_C1 (1ULL << 9) #define X86_FPU_FLAGS_SET_C2 (1ULL << 10) #define X86_FPU_FLAGS_SET_C3 (1ULL << 11) #define X86_FPU_FLAGS_UNDEFINED_C0 (1ULL << 12) #define X86_FPU_FLAGS_UNDEFINED_C1 (1ULL << 13) #define X86_FPU_FLAGS_UNDEFINED_C2 (1ULL << 14) #define X86_FPU_FLAGS_UNDEFINED_C3 (1ULL << 15) #define X86_FPU_FLAGS_TEST_C0 (1ULL << 16) #define X86_FPU_FLAGS_TEST_C1 (1ULL << 17) #define X86_FPU_FLAGS_TEST_C2 (1ULL << 18) #define X86_FPU_FLAGS_TEST_C3 (1ULL << 19) /// Operand type for instruction's operands typedef enum x86_op_type { X86_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). X86_OP_REG, ///< = CS_OP_REG (Register operand). X86_OP_IMM, ///< = CS_OP_IMM (Immediate operand). X86_OP_MEM, ///< = CS_OP_MEM (Memory operand). } x86_op_type; /// XOP Code Condition type typedef enum x86_xop_cc { X86_XOP_CC_INVALID = 0, ///< Uninitialized. X86_XOP_CC_LT, X86_XOP_CC_LE, X86_XOP_CC_GT, X86_XOP_CC_GE, X86_XOP_CC_EQ, X86_XOP_CC_NEQ, X86_XOP_CC_FALSE, X86_XOP_CC_TRUE, } x86_xop_cc; /// AVX broadcast type typedef enum x86_avx_bcast { X86_AVX_BCAST_INVALID = 0, ///< Uninitialized. X86_AVX_BCAST_2, ///< AVX512 broadcast type {1to2} X86_AVX_BCAST_4, ///< AVX512 broadcast type {1to4} X86_AVX_BCAST_8, ///< AVX512 broadcast type {1to8} X86_AVX_BCAST_16, ///< AVX512 broadcast type {1to16} } x86_avx_bcast; /// SSE Code Condition type typedef enum x86_sse_cc { X86_SSE_CC_INVALID = 0, ///< Uninitialized. X86_SSE_CC_EQ, X86_SSE_CC_LT, X86_SSE_CC_LE, X86_SSE_CC_UNORD, X86_SSE_CC_NEQ, X86_SSE_CC_NLT, X86_SSE_CC_NLE, X86_SSE_CC_ORD, } x86_sse_cc; /// AVX Code Condition type typedef enum x86_avx_cc { X86_AVX_CC_INVALID = 0, ///< Uninitialized. X86_AVX_CC_EQ, X86_AVX_CC_LT, X86_AVX_CC_LE, X86_AVX_CC_UNORD, X86_AVX_CC_NEQ, X86_AVX_CC_NLT, X86_AVX_CC_NLE, X86_AVX_CC_ORD, X86_AVX_CC_EQ_UQ, X86_AVX_CC_NGE, X86_AVX_CC_NGT, X86_AVX_CC_FALSE, X86_AVX_CC_NEQ_OQ, X86_AVX_CC_GE, X86_AVX_CC_GT, X86_AVX_CC_TRUE, X86_AVX_CC_EQ_OS, X86_AVX_CC_LT_OQ, X86_AVX_CC_LE_OQ, X86_AVX_CC_UNORD_S, X86_AVX_CC_NEQ_US, X86_AVX_CC_NLT_UQ, X86_AVX_CC_NLE_UQ, X86_AVX_CC_ORD_S, X86_AVX_CC_EQ_US, X86_AVX_CC_NGE_UQ, X86_AVX_CC_NGT_UQ, X86_AVX_CC_FALSE_OS, X86_AVX_CC_NEQ_OS, X86_AVX_CC_GE_OQ, X86_AVX_CC_GT_OQ, X86_AVX_CC_TRUE_US, } x86_avx_cc; /// AVX static rounding mode type typedef enum x86_avx_rm { X86_AVX_RM_INVALID = 0, ///< Uninitialized. X86_AVX_RM_RN, ///< Round to nearest X86_AVX_RM_RD, ///< Round down X86_AVX_RM_RU, ///< Round up X86_AVX_RM_RZ, ///< Round toward zero } x86_avx_rm; /// Instruction prefixes - to be used in cs_x86.prefix[] typedef enum x86_prefix { X86_PREFIX_LOCK = 0xf0, ///< lock (cs_x86.prefix[0] X86_PREFIX_REP = 0xf3, ///< rep (cs_x86.prefix[0] X86_PREFIX_REPE = 0xf3, ///< repe/repz (cs_x86.prefix[0] X86_PREFIX_REPNE = 0xf2, ///< repne/repnz (cs_x86.prefix[0] X86_PREFIX_CS = 0x2e, ///< segment override CS (cs_x86.prefix[1] X86_PREFIX_SS = 0x36, ///< segment override SS (cs_x86.prefix[1] X86_PREFIX_DS = 0x3e, ///< segment override DS (cs_x86.prefix[1] X86_PREFIX_ES = 0x26, ///< segment override ES (cs_x86.prefix[1] X86_PREFIX_FS = 0x64, ///< segment override FS (cs_x86.prefix[1] X86_PREFIX_GS = 0x65, ///< segment override GS (cs_x86.prefix[1] X86_PREFIX_OPSIZE = 0x66, ///< operand-size override (cs_x86.prefix[2] X86_PREFIX_ADDRSIZE = 0x67, ///< address-size override (cs_x86.prefix[3] } x86_prefix; /// Instruction's operand referring to memory /// This is associated with X86_OP_MEM operand type above typedef struct x86_op_mem { x86_reg segment; ///< segment register (or X86_REG_INVALID if irrelevant) x86_reg base; ///< base register (or X86_REG_INVALID if irrelevant) x86_reg index; ///< index register (or X86_REG_INVALID if irrelevant) int scale; ///< scale for index register int64_t disp; ///< displacement value } x86_op_mem; /// Instruction operand typedef struct cs_x86_op { x86_op_type type; ///< operand type union { x86_reg reg; ///< register value for REG operand int64_t imm; ///< immediate value for IMM operand x86_op_mem mem; ///< base/index/scale/disp value for MEM operand }; /// size of this operand (in bytes). uint8_t size; /// How is this operand accessed? (READ, WRITE or READ|WRITE) /// This field is combined of cs_ac_type. /// NOTE: this field is irrelevant if engine is compiled in DIET mode. uint8_t access; /// AVX broadcast type, or 0 if irrelevant x86_avx_bcast avx_bcast; /// AVX zero opmask {z} bool avx_zero_opmask; } cs_x86_op; typedef struct cs_x86_encoding { /// ModR/M offset, or 0 when irrelevant uint8_t modrm_offset; /// Displacement offset, or 0 when irrelevant. uint8_t disp_offset; uint8_t disp_size; /// Immediate offset, or 0 when irrelevant. uint8_t imm_offset; uint8_t imm_size; } cs_x86_encoding; /// Instruction structure typedef struct cs_x86 { /// Instruction prefix, which can be up to 4 bytes. /// A prefix byte gets value 0 when irrelevant. /// prefix[0] indicates REP/REPNE/LOCK prefix (See X86_PREFIX_REP/REPNE/LOCK above) /// prefix[1] indicates segment override (irrelevant for x86_64): /// See X86_PREFIX_CS/SS/DS/ES/FS/GS above. /// prefix[2] indicates operand-size override (X86_PREFIX_OPSIZE) /// prefix[3] indicates address-size override (X86_PREFIX_ADDRSIZE) uint8_t prefix[4]; /// Instruction opcode, which can be from 1 to 4 bytes in size. /// This contains VEX opcode as well. /// An trailing opcode byte gets value 0 when irrelevant. uint8_t opcode[4]; /// REX prefix: only a non-zero value is relevant for x86_64 uint8_t rex; /// Address size, which can be overridden with above prefix[5]. uint8_t addr_size; /// ModR/M byte uint8_t modrm; /// SIB value, or 0 when irrelevant. uint8_t sib; /// Displacement value, valid if encoding.disp_offset != 0 int64_t disp; /// SIB index register, or X86_REG_INVALID when irrelevant. x86_reg sib_index; /// SIB scale, only applicable if sib_index is valid. int8_t sib_scale; /// SIB base register, or X86_REG_INVALID when irrelevant. x86_reg sib_base; /// XOP Code Condition x86_xop_cc xop_cc; /// SSE Code Condition x86_sse_cc sse_cc; /// AVX Code Condition x86_avx_cc avx_cc; /// AVX Suppress all Exception bool avx_sae; /// AVX static rounding mode x86_avx_rm avx_rm; union { /// EFLAGS updated by this instruction. /// This can be formed from OR combination of X86_EFLAGS_* symbols in x86.h uint64_t eflags; /// FPU_FLAGS updated by this instruction. /// This can be formed from OR combination of X86_FPU_FLAGS_* symbols in x86.h uint64_t fpu_flags; }; /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_x86_op operands[8]; ///< operands for this instruction. cs_x86_encoding encoding; ///< encoding information } cs_x86; /// X86 instructions typedef enum x86_insn { X86_INS_INVALID = 0, X86_INS_AAA, X86_INS_AAD, X86_INS_AAM, X86_INS_AAS, X86_INS_FABS, X86_INS_ADC, X86_INS_ADCX, X86_INS_ADD, X86_INS_ADDPD, X86_INS_ADDPS, X86_INS_ADDSD, X86_INS_ADDSS, X86_INS_ADDSUBPD, X86_INS_ADDSUBPS, X86_INS_FADD, X86_INS_FIADD, X86_INS_FADDP, X86_INS_ADOX, X86_INS_AESDECLAST, X86_INS_AESDEC, X86_INS_AESENCLAST, X86_INS_AESENC, X86_INS_AESIMC, X86_INS_AESKEYGENASSIST, X86_INS_AND, X86_INS_ANDN, X86_INS_ANDNPD, X86_INS_ANDNPS, X86_INS_ANDPD, X86_INS_ANDPS, X86_INS_ARPL, X86_INS_BEXTR, X86_INS_BLCFILL, X86_INS_BLCI, X86_INS_BLCIC, X86_INS_BLCMSK, X86_INS_BLCS, X86_INS_BLENDPD, X86_INS_BLENDPS, X86_INS_BLENDVPD, X86_INS_BLENDVPS, X86_INS_BLSFILL, X86_INS_BLSI, X86_INS_BLSIC, X86_INS_BLSMSK, X86_INS_BLSR, X86_INS_BOUND, X86_INS_BSF, X86_INS_BSR, X86_INS_BSWAP, X86_INS_BT, X86_INS_BTC, X86_INS_BTR, X86_INS_BTS, X86_INS_BZHI, X86_INS_CALL, X86_INS_CBW, X86_INS_CDQ, X86_INS_CDQE, X86_INS_FCHS, X86_INS_CLAC, X86_INS_CLC, X86_INS_CLD, X86_INS_CLFLUSH, X86_INS_CLFLUSHOPT, X86_INS_CLGI, X86_INS_CLI, X86_INS_CLTS, X86_INS_CLWB, X86_INS_CMC, X86_INS_CMOVA, X86_INS_CMOVAE, X86_INS_CMOVB, X86_INS_CMOVBE, X86_INS_FCMOVBE, X86_INS_FCMOVB, X86_INS_CMOVE, X86_INS_FCMOVE, X86_INS_CMOVG, X86_INS_CMOVGE, X86_INS_CMOVL, X86_INS_CMOVLE, X86_INS_FCMOVNBE, X86_INS_FCMOVNB, X86_INS_CMOVNE, X86_INS_FCMOVNE, X86_INS_CMOVNO, X86_INS_CMOVNP, X86_INS_FCMOVNU, X86_INS_CMOVNS, X86_INS_CMOVO, X86_INS_CMOVP, X86_INS_FCMOVU, X86_INS_CMOVS, X86_INS_CMP, X86_INS_CMPSB, X86_INS_CMPSQ, X86_INS_CMPSW, X86_INS_CMPXCHG16B, X86_INS_CMPXCHG, X86_INS_CMPXCHG8B, X86_INS_COMISD, X86_INS_COMISS, X86_INS_FCOMP, X86_INS_FCOMIP, X86_INS_FCOMI, X86_INS_FCOM, X86_INS_FCOS, X86_INS_CPUID, X86_INS_CQO, X86_INS_CRC32, X86_INS_CVTDQ2PD, X86_INS_CVTDQ2PS, X86_INS_CVTPD2DQ, X86_INS_CVTPD2PS, X86_INS_CVTPS2DQ, X86_INS_CVTPS2PD, X86_INS_CVTSD2SI, X86_INS_CVTSD2SS, X86_INS_CVTSI2SD, X86_INS_CVTSI2SS, X86_INS_CVTSS2SD, X86_INS_CVTSS2SI, X86_INS_CVTTPD2DQ, X86_INS_CVTTPS2DQ, X86_INS_CVTTSD2SI, X86_INS_CVTTSS2SI, X86_INS_CWD, X86_INS_CWDE, X86_INS_DAA, X86_INS_DAS, X86_INS_DATA16, X86_INS_DEC, X86_INS_DIV, X86_INS_DIVPD, X86_INS_DIVPS, X86_INS_FDIVR, X86_INS_FIDIVR, X86_INS_FDIVRP, X86_INS_DIVSD, X86_INS_DIVSS, X86_INS_FDIV, X86_INS_FIDIV, X86_INS_FDIVP, X86_INS_DPPD, X86_INS_DPPS, X86_INS_RET, X86_INS_ENCLS, X86_INS_ENCLU, X86_INS_ENTER, X86_INS_EXTRACTPS, X86_INS_EXTRQ, X86_INS_F2XM1, X86_INS_LCALL, X86_INS_LJMP, X86_INS_FBLD, X86_INS_FBSTP, X86_INS_FCOMPP, X86_INS_FDECSTP, X86_INS_FEMMS, X86_INS_FFREE, X86_INS_FICOM, X86_INS_FICOMP, X86_INS_FINCSTP, X86_INS_FLDCW, X86_INS_FLDENV, X86_INS_FLDL2E, X86_INS_FLDL2T, X86_INS_FLDLG2, X86_INS_FLDLN2, X86_INS_FLDPI, X86_INS_FNCLEX, X86_INS_FNINIT, X86_INS_FNOP, X86_INS_FNSTCW, X86_INS_FNSTSW, X86_INS_FPATAN, X86_INS_FPREM, X86_INS_FPREM1, X86_INS_FPTAN, X86_INS_FFREEP, X86_INS_FRNDINT, X86_INS_FRSTOR, X86_INS_FNSAVE, X86_INS_FSCALE, X86_INS_FSETPM, X86_INS_FSINCOS, X86_INS_FNSTENV, X86_INS_FXAM, X86_INS_FXRSTOR, X86_INS_FXRSTOR64, X86_INS_FXSAVE, X86_INS_FXSAVE64, X86_INS_FXTRACT, X86_INS_FYL2X, X86_INS_FYL2XP1, X86_INS_MOVAPD, X86_INS_MOVAPS, X86_INS_ORPD, X86_INS_ORPS, X86_INS_VMOVAPD, X86_INS_VMOVAPS, X86_INS_XORPD, X86_INS_XORPS, X86_INS_GETSEC, X86_INS_HADDPD, X86_INS_HADDPS, X86_INS_HLT, X86_INS_HSUBPD, X86_INS_HSUBPS, X86_INS_IDIV, X86_INS_FILD, X86_INS_IMUL, X86_INS_IN, X86_INS_INC, X86_INS_INSB, X86_INS_INSERTPS, X86_INS_INSERTQ, X86_INS_INSD, X86_INS_INSW, X86_INS_INT, X86_INS_INT1, X86_INS_INT3, X86_INS_INTO, X86_INS_INVD, X86_INS_INVEPT, X86_INS_INVLPG, X86_INS_INVLPGA, X86_INS_INVPCID, X86_INS_INVVPID, X86_INS_IRET, X86_INS_IRETD, X86_INS_IRETQ, X86_INS_FISTTP, X86_INS_FIST, X86_INS_FISTP, X86_INS_UCOMISD, X86_INS_UCOMISS, X86_INS_VCOMISD, X86_INS_VCOMISS, X86_INS_VCVTSD2SS, X86_INS_VCVTSI2SD, X86_INS_VCVTSI2SS, X86_INS_VCVTSS2SD, X86_INS_VCVTTSD2SI, X86_INS_VCVTTSD2USI, X86_INS_VCVTTSS2SI, X86_INS_VCVTTSS2USI, X86_INS_VCVTUSI2SD, X86_INS_VCVTUSI2SS, X86_INS_VUCOMISD, X86_INS_VUCOMISS, X86_INS_JAE, X86_INS_JA, X86_INS_JBE, X86_INS_JB, X86_INS_JCXZ, X86_INS_JECXZ, X86_INS_JE, X86_INS_JGE, X86_INS_JG, X86_INS_JLE, X86_INS_JL, X86_INS_JMP, X86_INS_JNE, X86_INS_JNO, X86_INS_JNP, X86_INS_JNS, X86_INS_JO, X86_INS_JP, X86_INS_JRCXZ, X86_INS_JS, X86_INS_KANDB, X86_INS_KANDD, X86_INS_KANDNB, X86_INS_KANDND, X86_INS_KANDNQ, X86_INS_KANDNW, X86_INS_KANDQ, X86_INS_KANDW, X86_INS_KMOVB, X86_INS_KMOVD, X86_INS_KMOVQ, X86_INS_KMOVW, X86_INS_KNOTB, X86_INS_KNOTD, X86_INS_KNOTQ, X86_INS_KNOTW, X86_INS_KORB, X86_INS_KORD, X86_INS_KORQ, X86_INS_KORTESTB, X86_INS_KORTESTD, X86_INS_KORTESTQ, X86_INS_KORTESTW, X86_INS_KORW, X86_INS_KSHIFTLB, X86_INS_KSHIFTLD, X86_INS_KSHIFTLQ, X86_INS_KSHIFTLW, X86_INS_KSHIFTRB, X86_INS_KSHIFTRD, X86_INS_KSHIFTRQ, X86_INS_KSHIFTRW, X86_INS_KUNPCKBW, X86_INS_KXNORB, X86_INS_KXNORD, X86_INS_KXNORQ, X86_INS_KXNORW, X86_INS_KXORB, X86_INS_KXORD, X86_INS_KXORQ, X86_INS_KXORW, X86_INS_LAHF, X86_INS_LAR, X86_INS_LDDQU, X86_INS_LDMXCSR, X86_INS_LDS, X86_INS_FLDZ, X86_INS_FLD1, X86_INS_FLD, X86_INS_LEA, X86_INS_LEAVE, X86_INS_LES, X86_INS_LFENCE, X86_INS_LFS, X86_INS_LGDT, X86_INS_LGS, X86_INS_LIDT, X86_INS_LLDT, X86_INS_LMSW, X86_INS_OR, X86_INS_SUB, X86_INS_XOR, X86_INS_LODSB, X86_INS_LODSD, X86_INS_LODSQ, X86_INS_LODSW, X86_INS_LOOP, X86_INS_LOOPE, X86_INS_LOOPNE, X86_INS_RETF, X86_INS_RETFQ, X86_INS_LSL, X86_INS_LSS, X86_INS_LTR, X86_INS_XADD, X86_INS_LZCNT, X86_INS_MASKMOVDQU, X86_INS_MAXPD, X86_INS_MAXPS, X86_INS_MAXSD, X86_INS_MAXSS, X86_INS_MFENCE, X86_INS_MINPD, X86_INS_MINPS, X86_INS_MINSD, X86_INS_MINSS, X86_INS_CVTPD2PI, X86_INS_CVTPI2PD, X86_INS_CVTPI2PS, X86_INS_CVTPS2PI, X86_INS_CVTTPD2PI, X86_INS_CVTTPS2PI, X86_INS_EMMS, X86_INS_MASKMOVQ, X86_INS_MOVD, X86_INS_MOVDQ2Q, X86_INS_MOVNTQ, X86_INS_MOVQ2DQ, X86_INS_MOVQ, X86_INS_PABSB, X86_INS_PABSD, X86_INS_PABSW, X86_INS_PACKSSDW, X86_INS_PACKSSWB, X86_INS_PACKUSWB, X86_INS_PADDB, X86_INS_PADDD, X86_INS_PADDQ, X86_INS_PADDSB, X86_INS_PADDSW, X86_INS_PADDUSB, X86_INS_PADDUSW, X86_INS_PADDW, X86_INS_PALIGNR, X86_INS_PANDN, X86_INS_PAND, X86_INS_PAVGB, X86_INS_PAVGW, X86_INS_PCMPEQB, X86_INS_PCMPEQD, X86_INS_PCMPEQW, X86_INS_PCMPGTB, X86_INS_PCMPGTD, X86_INS_PCMPGTW, X86_INS_PEXTRW, X86_INS_PHADDSW, X86_INS_PHADDW, X86_INS_PHADDD, X86_INS_PHSUBD, X86_INS_PHSUBSW, X86_INS_PHSUBW, X86_INS_PINSRW, X86_INS_PMADDUBSW, X86_INS_PMADDWD, X86_INS_PMAXSW, X86_INS_PMAXUB, X86_INS_PMINSW, X86_INS_PMINUB, X86_INS_PMOVMSKB, X86_INS_PMULHRSW, X86_INS_PMULHUW, X86_INS_PMULHW, X86_INS_PMULLW, X86_INS_PMULUDQ, X86_INS_POR, X86_INS_PSADBW, X86_INS_PSHUFB, X86_INS_PSHUFW, X86_INS_PSIGNB, X86_INS_PSIGND, X86_INS_PSIGNW, X86_INS_PSLLD, X86_INS_PSLLQ, X86_INS_PSLLW, X86_INS_PSRAD, X86_INS_PSRAW, X86_INS_PSRLD, X86_INS_PSRLQ, X86_INS_PSRLW, X86_INS_PSUBB, X86_INS_PSUBD, X86_INS_PSUBQ, X86_INS_PSUBSB, X86_INS_PSUBSW, X86_INS_PSUBUSB, X86_INS_PSUBUSW, X86_INS_PSUBW, X86_INS_PUNPCKHBW, X86_INS_PUNPCKHDQ, X86_INS_PUNPCKHWD, X86_INS_PUNPCKLBW, X86_INS_PUNPCKLDQ, X86_INS_PUNPCKLWD, X86_INS_PXOR, X86_INS_MONITOR, X86_INS_MONTMUL, X86_INS_MOV, X86_INS_MOVABS, X86_INS_MOVBE, X86_INS_MOVDDUP, X86_INS_MOVDQA, X86_INS_MOVDQU, X86_INS_MOVHLPS, X86_INS_MOVHPD, X86_INS_MOVHPS, X86_INS_MOVLHPS, X86_INS_MOVLPD, X86_INS_MOVLPS, X86_INS_MOVMSKPD, X86_INS_MOVMSKPS, X86_INS_MOVNTDQA, X86_INS_MOVNTDQ, X86_INS_MOVNTI, X86_INS_MOVNTPD, X86_INS_MOVNTPS, X86_INS_MOVNTSD, X86_INS_MOVNTSS, X86_INS_MOVSB, X86_INS_MOVSD, X86_INS_MOVSHDUP, X86_INS_MOVSLDUP, X86_INS_MOVSQ, X86_INS_MOVSS, X86_INS_MOVSW, X86_INS_MOVSX, X86_INS_MOVSXD, X86_INS_MOVUPD, X86_INS_MOVUPS, X86_INS_MOVZX, X86_INS_MPSADBW, X86_INS_MUL, X86_INS_MULPD, X86_INS_MULPS, X86_INS_MULSD, X86_INS_MULSS, X86_INS_MULX, X86_INS_FMUL, X86_INS_FIMUL, X86_INS_FMULP, X86_INS_MWAIT, X86_INS_NEG, X86_INS_NOP, X86_INS_NOT, X86_INS_OUT, X86_INS_OUTSB, X86_INS_OUTSD, X86_INS_OUTSW, X86_INS_PACKUSDW, X86_INS_PAUSE, X86_INS_PAVGUSB, X86_INS_PBLENDVB, X86_INS_PBLENDW, X86_INS_PCLMULQDQ, X86_INS_PCMPEQQ, X86_INS_PCMPESTRI, X86_INS_PCMPESTRM, X86_INS_PCMPGTQ, X86_INS_PCMPISTRI, X86_INS_PCMPISTRM, X86_INS_PCOMMIT, X86_INS_PDEP, X86_INS_PEXT, X86_INS_PEXTRB, X86_INS_PEXTRD, X86_INS_PEXTRQ, X86_INS_PF2ID, X86_INS_PF2IW, X86_INS_PFACC, X86_INS_PFADD, X86_INS_PFCMPEQ, X86_INS_PFCMPGE, X86_INS_PFCMPGT, X86_INS_PFMAX, X86_INS_PFMIN, X86_INS_PFMUL, X86_INS_PFNACC, X86_INS_PFPNACC, X86_INS_PFRCPIT1, X86_INS_PFRCPIT2, X86_INS_PFRCP, X86_INS_PFRSQIT1, X86_INS_PFRSQRT, X86_INS_PFSUBR, X86_INS_PFSUB, X86_INS_PHMINPOSUW, X86_INS_PI2FD, X86_INS_PI2FW, X86_INS_PINSRB, X86_INS_PINSRD, X86_INS_PINSRQ, X86_INS_PMAXSB, X86_INS_PMAXSD, X86_INS_PMAXUD, X86_INS_PMAXUW, X86_INS_PMINSB, X86_INS_PMINSD, X86_INS_PMINUD, X86_INS_PMINUW, X86_INS_PMOVSXBD, X86_INS_PMOVSXBQ, X86_INS_PMOVSXBW, X86_INS_PMOVSXDQ, X86_INS_PMOVSXWD, X86_INS_PMOVSXWQ, X86_INS_PMOVZXBD, X86_INS_PMOVZXBQ, X86_INS_PMOVZXBW, X86_INS_PMOVZXDQ, X86_INS_PMOVZXWD, X86_INS_PMOVZXWQ, X86_INS_PMULDQ, X86_INS_PMULHRW, X86_INS_PMULLD, X86_INS_POP, X86_INS_POPAW, X86_INS_POPAL, X86_INS_POPCNT, X86_INS_POPF, X86_INS_POPFD, X86_INS_POPFQ, X86_INS_PREFETCH, X86_INS_PREFETCHNTA, X86_INS_PREFETCHT0, X86_INS_PREFETCHT1, X86_INS_PREFETCHT2, X86_INS_PREFETCHW, X86_INS_PSHUFD, X86_INS_PSHUFHW, X86_INS_PSHUFLW, X86_INS_PSLLDQ, X86_INS_PSRLDQ, X86_INS_PSWAPD, X86_INS_PTEST, X86_INS_PUNPCKHQDQ, X86_INS_PUNPCKLQDQ, X86_INS_PUSH, X86_INS_PUSHAW, X86_INS_PUSHAL, X86_INS_PUSHF, X86_INS_PUSHFD, X86_INS_PUSHFQ, X86_INS_RCL, X86_INS_RCPPS, X86_INS_RCPSS, X86_INS_RCR, X86_INS_RDFSBASE, X86_INS_RDGSBASE, X86_INS_RDMSR, X86_INS_RDPMC, X86_INS_RDRAND, X86_INS_RDSEED, X86_INS_RDTSC, X86_INS_RDTSCP, X86_INS_ROL, X86_INS_ROR, X86_INS_RORX, X86_INS_ROUNDPD, X86_INS_ROUNDPS, X86_INS_ROUNDSD, X86_INS_ROUNDSS, X86_INS_RSM, X86_INS_RSQRTPS, X86_INS_RSQRTSS, X86_INS_SAHF, X86_INS_SAL, X86_INS_SALC, X86_INS_SAR, X86_INS_SARX, X86_INS_SBB, X86_INS_SCASB, X86_INS_SCASD, X86_INS_SCASQ, X86_INS_SCASW, X86_INS_SETAE, X86_INS_SETA, X86_INS_SETBE, X86_INS_SETB, X86_INS_SETE, X86_INS_SETGE, X86_INS_SETG, X86_INS_SETLE, X86_INS_SETL, X86_INS_SETNE, X86_INS_SETNO, X86_INS_SETNP, X86_INS_SETNS, X86_INS_SETO, X86_INS_SETP, X86_INS_SETS, X86_INS_SFENCE, X86_INS_SGDT, X86_INS_SHA1MSG1, X86_INS_SHA1MSG2, X86_INS_SHA1NEXTE, X86_INS_SHA1RNDS4, X86_INS_SHA256MSG1, X86_INS_SHA256MSG2, X86_INS_SHA256RNDS2, X86_INS_SHL, X86_INS_SHLD, X86_INS_SHLX, X86_INS_SHR, X86_INS_SHRD, X86_INS_SHRX, X86_INS_SHUFPD, X86_INS_SHUFPS, X86_INS_SIDT, X86_INS_FSIN, X86_INS_SKINIT, X86_INS_SLDT, X86_INS_SMSW, X86_INS_SQRTPD, X86_INS_SQRTPS, X86_INS_SQRTSD, X86_INS_SQRTSS, X86_INS_FSQRT, X86_INS_STAC, X86_INS_STC, X86_INS_STD, X86_INS_STGI, X86_INS_STI, X86_INS_STMXCSR, X86_INS_STOSB, X86_INS_STOSD, X86_INS_STOSQ, X86_INS_STOSW, X86_INS_STR, X86_INS_FST, X86_INS_FSTP, X86_INS_FSTPNCE, X86_INS_FXCH, X86_INS_SUBPD, X86_INS_SUBPS, X86_INS_FSUBR, X86_INS_FISUBR, X86_INS_FSUBRP, X86_INS_SUBSD, X86_INS_SUBSS, X86_INS_FSUB, X86_INS_FISUB, X86_INS_FSUBP, X86_INS_SWAPGS, X86_INS_SYSCALL, X86_INS_SYSENTER, X86_INS_SYSEXIT, X86_INS_SYSRET, X86_INS_T1MSKC, X86_INS_TEST, X86_INS_UD2, X86_INS_FTST, X86_INS_TZCNT, X86_INS_TZMSK, X86_INS_FUCOMIP, X86_INS_FUCOMI, X86_INS_FUCOMPP, X86_INS_FUCOMP, X86_INS_FUCOM, X86_INS_UD2B, X86_INS_UNPCKHPD, X86_INS_UNPCKHPS, X86_INS_UNPCKLPD, X86_INS_UNPCKLPS, X86_INS_VADDPD, X86_INS_VADDPS, X86_INS_VADDSD, X86_INS_VADDSS, X86_INS_VADDSUBPD, X86_INS_VADDSUBPS, X86_INS_VAESDECLAST, X86_INS_VAESDEC, X86_INS_VAESENCLAST, X86_INS_VAESENC, X86_INS_VAESIMC, X86_INS_VAESKEYGENASSIST, X86_INS_VALIGND, X86_INS_VALIGNQ, X86_INS_VANDNPD, X86_INS_VANDNPS, X86_INS_VANDPD, X86_INS_VANDPS, X86_INS_VBLENDMPD, X86_INS_VBLENDMPS, X86_INS_VBLENDPD, X86_INS_VBLENDPS, X86_INS_VBLENDVPD, X86_INS_VBLENDVPS, X86_INS_VBROADCASTF128, X86_INS_VBROADCASTI32X4, X86_INS_VBROADCASTI64X4, X86_INS_VBROADCASTSD, X86_INS_VBROADCASTSS, X86_INS_VCOMPRESSPD, X86_INS_VCOMPRESSPS, X86_INS_VCVTDQ2PD, X86_INS_VCVTDQ2PS, X86_INS_VCVTPD2DQX, X86_INS_VCVTPD2DQ, X86_INS_VCVTPD2PSX, X86_INS_VCVTPD2PS, X86_INS_VCVTPD2UDQ, X86_INS_VCVTPH2PS, X86_INS_VCVTPS2DQ, X86_INS_VCVTPS2PD, X86_INS_VCVTPS2PH, X86_INS_VCVTPS2UDQ, X86_INS_VCVTSD2SI, X86_INS_VCVTSD2USI, X86_INS_VCVTSS2SI, X86_INS_VCVTSS2USI, X86_INS_VCVTTPD2DQX, X86_INS_VCVTTPD2DQ, X86_INS_VCVTTPD2UDQ, X86_INS_VCVTTPS2DQ, X86_INS_VCVTTPS2UDQ, X86_INS_VCVTUDQ2PD, X86_INS_VCVTUDQ2PS, X86_INS_VDIVPD, X86_INS_VDIVPS, X86_INS_VDIVSD, X86_INS_VDIVSS, X86_INS_VDPPD, X86_INS_VDPPS, X86_INS_VERR, X86_INS_VERW, X86_INS_VEXP2PD, X86_INS_VEXP2PS, X86_INS_VEXPANDPD, X86_INS_VEXPANDPS, X86_INS_VEXTRACTF128, X86_INS_VEXTRACTF32X4, X86_INS_VEXTRACTF64X4, X86_INS_VEXTRACTI128, X86_INS_VEXTRACTI32X4, X86_INS_VEXTRACTI64X4, X86_INS_VEXTRACTPS, X86_INS_VFMADD132PD, X86_INS_VFMADD132PS, X86_INS_VFMADDPD, X86_INS_VFMADD213PD, X86_INS_VFMADD231PD, X86_INS_VFMADDPS, X86_INS_VFMADD213PS, X86_INS_VFMADD231PS, X86_INS_VFMADDSD, X86_INS_VFMADD213SD, X86_INS_VFMADD132SD, X86_INS_VFMADD231SD, X86_INS_VFMADDSS, X86_INS_VFMADD213SS, X86_INS_VFMADD132SS, X86_INS_VFMADD231SS, X86_INS_VFMADDSUB132PD, X86_INS_VFMADDSUB132PS, X86_INS_VFMADDSUBPD, X86_INS_VFMADDSUB213PD, X86_INS_VFMADDSUB231PD, X86_INS_VFMADDSUBPS, X86_INS_VFMADDSUB213PS, X86_INS_VFMADDSUB231PS, X86_INS_VFMSUB132PD, X86_INS_VFMSUB132PS, X86_INS_VFMSUBADD132PD, X86_INS_VFMSUBADD132PS, X86_INS_VFMSUBADDPD, X86_INS_VFMSUBADD213PD, X86_INS_VFMSUBADD231PD, X86_INS_VFMSUBADDPS, X86_INS_VFMSUBADD213PS, X86_INS_VFMSUBADD231PS, X86_INS_VFMSUBPD, X86_INS_VFMSUB213PD, X86_INS_VFMSUB231PD, X86_INS_VFMSUBPS, X86_INS_VFMSUB213PS, X86_INS_VFMSUB231PS, X86_INS_VFMSUBSD, X86_INS_VFMSUB213SD, X86_INS_VFMSUB132SD, X86_INS_VFMSUB231SD, X86_INS_VFMSUBSS, X86_INS_VFMSUB213SS, X86_INS_VFMSUB132SS, X86_INS_VFMSUB231SS, X86_INS_VFNMADD132PD, X86_INS_VFNMADD132PS, X86_INS_VFNMADDPD, X86_INS_VFNMADD213PD, X86_INS_VFNMADD231PD, X86_INS_VFNMADDPS, X86_INS_VFNMADD213PS, X86_INS_VFNMADD231PS, X86_INS_VFNMADDSD, X86_INS_VFNMADD213SD, X86_INS_VFNMADD132SD, X86_INS_VFNMADD231SD, X86_INS_VFNMADDSS, X86_INS_VFNMADD213SS, X86_INS_VFNMADD132SS, X86_INS_VFNMADD231SS, X86_INS_VFNMSUB132PD, X86_INS_VFNMSUB132PS, X86_INS_VFNMSUBPD, X86_INS_VFNMSUB213PD, X86_INS_VFNMSUB231PD, X86_INS_VFNMSUBPS, X86_INS_VFNMSUB213PS, X86_INS_VFNMSUB231PS, X86_INS_VFNMSUBSD, X86_INS_VFNMSUB213SD, X86_INS_VFNMSUB132SD, X86_INS_VFNMSUB231SD, X86_INS_VFNMSUBSS, X86_INS_VFNMSUB213SS, X86_INS_VFNMSUB132SS, X86_INS_VFNMSUB231SS, X86_INS_VFRCZPD, X86_INS_VFRCZPS, X86_INS_VFRCZSD, X86_INS_VFRCZSS, X86_INS_VORPD, X86_INS_VORPS, X86_INS_VXORPD, X86_INS_VXORPS, X86_INS_VGATHERDPD, X86_INS_VGATHERDPS, X86_INS_VGATHERPF0DPD, X86_INS_VGATHERPF0DPS, X86_INS_VGATHERPF0QPD, X86_INS_VGATHERPF0QPS, X86_INS_VGATHERPF1DPD, X86_INS_VGATHERPF1DPS, X86_INS_VGATHERPF1QPD, X86_INS_VGATHERPF1QPS, X86_INS_VGATHERQPD, X86_INS_VGATHERQPS, X86_INS_VHADDPD, X86_INS_VHADDPS, X86_INS_VHSUBPD, X86_INS_VHSUBPS, X86_INS_VINSERTF128, X86_INS_VINSERTF32X4, X86_INS_VINSERTF32X8, X86_INS_VINSERTF64X2, X86_INS_VINSERTF64X4, X86_INS_VINSERTI128, X86_INS_VINSERTI32X4, X86_INS_VINSERTI32X8, X86_INS_VINSERTI64X2, X86_INS_VINSERTI64X4, X86_INS_VINSERTPS, X86_INS_VLDDQU, X86_INS_VLDMXCSR, X86_INS_VMASKMOVDQU, X86_INS_VMASKMOVPD, X86_INS_VMASKMOVPS, X86_INS_VMAXPD, X86_INS_VMAXPS, X86_INS_VMAXSD, X86_INS_VMAXSS, X86_INS_VMCALL, X86_INS_VMCLEAR, X86_INS_VMFUNC, X86_INS_VMINPD, X86_INS_VMINPS, X86_INS_VMINSD, X86_INS_VMINSS, X86_INS_VMLAUNCH, X86_INS_VMLOAD, X86_INS_VMMCALL, X86_INS_VMOVQ, X86_INS_VMOVDDUP, X86_INS_VMOVD, X86_INS_VMOVDQA32, X86_INS_VMOVDQA64, X86_INS_VMOVDQA, X86_INS_VMOVDQU16, X86_INS_VMOVDQU32, X86_INS_VMOVDQU64, X86_INS_VMOVDQU8, X86_INS_VMOVDQU, X86_INS_VMOVHLPS, X86_INS_VMOVHPD, X86_INS_VMOVHPS, X86_INS_VMOVLHPS, X86_INS_VMOVLPD, X86_INS_VMOVLPS, X86_INS_VMOVMSKPD, X86_INS_VMOVMSKPS, X86_INS_VMOVNTDQA, X86_INS_VMOVNTDQ, X86_INS_VMOVNTPD, X86_INS_VMOVNTPS, X86_INS_VMOVSD, X86_INS_VMOVSHDUP, X86_INS_VMOVSLDUP, X86_INS_VMOVSS, X86_INS_VMOVUPD, X86_INS_VMOVUPS, X86_INS_VMPSADBW, X86_INS_VMPTRLD, X86_INS_VMPTRST, X86_INS_VMREAD, X86_INS_VMRESUME, X86_INS_VMRUN, X86_INS_VMSAVE, X86_INS_VMULPD, X86_INS_VMULPS, X86_INS_VMULSD, X86_INS_VMULSS, X86_INS_VMWRITE, X86_INS_VMXOFF, X86_INS_VMXON, X86_INS_VPABSB, X86_INS_VPABSD, X86_INS_VPABSQ, X86_INS_VPABSW, X86_INS_VPACKSSDW, X86_INS_VPACKSSWB, X86_INS_VPACKUSDW, X86_INS_VPACKUSWB, X86_INS_VPADDB, X86_INS_VPADDD, X86_INS_VPADDQ, X86_INS_VPADDSB, X86_INS_VPADDSW, X86_INS_VPADDUSB, X86_INS_VPADDUSW, X86_INS_VPADDW, X86_INS_VPALIGNR, X86_INS_VPANDD, X86_INS_VPANDND, X86_INS_VPANDNQ, X86_INS_VPANDN, X86_INS_VPANDQ, X86_INS_VPAND, X86_INS_VPAVGB, X86_INS_VPAVGW, X86_INS_VPBLENDD, X86_INS_VPBLENDMB, X86_INS_VPBLENDMD, X86_INS_VPBLENDMQ, X86_INS_VPBLENDMW, X86_INS_VPBLENDVB, X86_INS_VPBLENDW, X86_INS_VPBROADCASTB, X86_INS_VPBROADCASTD, X86_INS_VPBROADCASTMB2Q, X86_INS_VPBROADCASTMW2D, X86_INS_VPBROADCASTQ, X86_INS_VPBROADCASTW, X86_INS_VPCLMULQDQ, X86_INS_VPCMOV, X86_INS_VPCMPB, X86_INS_VPCMPD, X86_INS_VPCMPEQB, X86_INS_VPCMPEQD, X86_INS_VPCMPEQQ, X86_INS_VPCMPEQW, X86_INS_VPCMPESTRI, X86_INS_VPCMPESTRM, X86_INS_VPCMPGTB, X86_INS_VPCMPGTD, X86_INS_VPCMPGTQ, X86_INS_VPCMPGTW, X86_INS_VPCMPISTRI, X86_INS_VPCMPISTRM, X86_INS_VPCMPQ, X86_INS_VPCMPUB, X86_INS_VPCMPUD, X86_INS_VPCMPUQ, X86_INS_VPCMPUW, X86_INS_VPCMPW, X86_INS_VPCOMB, X86_INS_VPCOMD, X86_INS_VPCOMPRESSD, X86_INS_VPCOMPRESSQ, X86_INS_VPCOMQ, X86_INS_VPCOMUB, X86_INS_VPCOMUD, X86_INS_VPCOMUQ, X86_INS_VPCOMUW, X86_INS_VPCOMW, X86_INS_VPCONFLICTD, X86_INS_VPCONFLICTQ, X86_INS_VPERM2F128, X86_INS_VPERM2I128, X86_INS_VPERMD, X86_INS_VPERMI2D, X86_INS_VPERMI2PD, X86_INS_VPERMI2PS, X86_INS_VPERMI2Q, X86_INS_VPERMIL2PD, X86_INS_VPERMIL2PS, X86_INS_VPERMILPD, X86_INS_VPERMILPS, X86_INS_VPERMPD, X86_INS_VPERMPS, X86_INS_VPERMQ, X86_INS_VPERMT2D, X86_INS_VPERMT2PD, X86_INS_VPERMT2PS, X86_INS_VPERMT2Q, X86_INS_VPEXPANDD, X86_INS_VPEXPANDQ, X86_INS_VPEXTRB, X86_INS_VPEXTRD, X86_INS_VPEXTRQ, X86_INS_VPEXTRW, X86_INS_VPGATHERDD, X86_INS_VPGATHERDQ, X86_INS_VPGATHERQD, X86_INS_VPGATHERQQ, X86_INS_VPHADDBD, X86_INS_VPHADDBQ, X86_INS_VPHADDBW, X86_INS_VPHADDDQ, X86_INS_VPHADDD, X86_INS_VPHADDSW, X86_INS_VPHADDUBD, X86_INS_VPHADDUBQ, X86_INS_VPHADDUBW, X86_INS_VPHADDUDQ, X86_INS_VPHADDUWD, X86_INS_VPHADDUWQ, X86_INS_VPHADDWD, X86_INS_VPHADDWQ, X86_INS_VPHADDW, X86_INS_VPHMINPOSUW, X86_INS_VPHSUBBW, X86_INS_VPHSUBDQ, X86_INS_VPHSUBD, X86_INS_VPHSUBSW, X86_INS_VPHSUBWD, X86_INS_VPHSUBW, X86_INS_VPINSRB, X86_INS_VPINSRD, X86_INS_VPINSRQ, X86_INS_VPINSRW, X86_INS_VPLZCNTD, X86_INS_VPLZCNTQ, X86_INS_VPMACSDD, X86_INS_VPMACSDQH, X86_INS_VPMACSDQL, X86_INS_VPMACSSDD, X86_INS_VPMACSSDQH, X86_INS_VPMACSSDQL, X86_INS_VPMACSSWD, X86_INS_VPMACSSWW, X86_INS_VPMACSWD, X86_INS_VPMACSWW, X86_INS_VPMADCSSWD, X86_INS_VPMADCSWD, X86_INS_VPMADDUBSW, X86_INS_VPMADDWD, X86_INS_VPMASKMOVD, X86_INS_VPMASKMOVQ, X86_INS_VPMAXSB, X86_INS_VPMAXSD, X86_INS_VPMAXSQ, X86_INS_VPMAXSW, X86_INS_VPMAXUB, X86_INS_VPMAXUD, X86_INS_VPMAXUQ, X86_INS_VPMAXUW, X86_INS_VPMINSB, X86_INS_VPMINSD, X86_INS_VPMINSQ, X86_INS_VPMINSW, X86_INS_VPMINUB, X86_INS_VPMINUD, X86_INS_VPMINUQ, X86_INS_VPMINUW, X86_INS_VPMOVDB, X86_INS_VPMOVDW, X86_INS_VPMOVM2B, X86_INS_VPMOVM2D, X86_INS_VPMOVM2Q, X86_INS_VPMOVM2W, X86_INS_VPMOVMSKB, X86_INS_VPMOVQB, X86_INS_VPMOVQD, X86_INS_VPMOVQW, X86_INS_VPMOVSDB, X86_INS_VPMOVSDW, X86_INS_VPMOVSQB, X86_INS_VPMOVSQD, X86_INS_VPMOVSQW, X86_INS_VPMOVSXBD, X86_INS_VPMOVSXBQ, X86_INS_VPMOVSXBW, X86_INS_VPMOVSXDQ, X86_INS_VPMOVSXWD, X86_INS_VPMOVSXWQ, X86_INS_VPMOVUSDB, X86_INS_VPMOVUSDW, X86_INS_VPMOVUSQB, X86_INS_VPMOVUSQD, X86_INS_VPMOVUSQW, X86_INS_VPMOVZXBD, X86_INS_VPMOVZXBQ, X86_INS_VPMOVZXBW, X86_INS_VPMOVZXDQ, X86_INS_VPMOVZXWD, X86_INS_VPMOVZXWQ, X86_INS_VPMULDQ, X86_INS_VPMULHRSW, X86_INS_VPMULHUW, X86_INS_VPMULHW, X86_INS_VPMULLD, X86_INS_VPMULLQ, X86_INS_VPMULLW, X86_INS_VPMULUDQ, X86_INS_VPORD, X86_INS_VPORQ, X86_INS_VPOR, X86_INS_VPPERM, X86_INS_VPROTB, X86_INS_VPROTD, X86_INS_VPROTQ, X86_INS_VPROTW, X86_INS_VPSADBW, X86_INS_VPSCATTERDD, X86_INS_VPSCATTERDQ, X86_INS_VPSCATTERQD, X86_INS_VPSCATTERQQ, X86_INS_VPSHAB, X86_INS_VPSHAD, X86_INS_VPSHAQ, X86_INS_VPSHAW, X86_INS_VPSHLB, X86_INS_VPSHLD, X86_INS_VPSHLQ, X86_INS_VPSHLW, X86_INS_VPSHUFB, X86_INS_VPSHUFD, X86_INS_VPSHUFHW, X86_INS_VPSHUFLW, X86_INS_VPSIGNB, X86_INS_VPSIGND, X86_INS_VPSIGNW, X86_INS_VPSLLDQ, X86_INS_VPSLLD, X86_INS_VPSLLQ, X86_INS_VPSLLVD, X86_INS_VPSLLVQ, X86_INS_VPSLLW, X86_INS_VPSRAD, X86_INS_VPSRAQ, X86_INS_VPSRAVD, X86_INS_VPSRAVQ, X86_INS_VPSRAW, X86_INS_VPSRLDQ, X86_INS_VPSRLD, X86_INS_VPSRLQ, X86_INS_VPSRLVD, X86_INS_VPSRLVQ, X86_INS_VPSRLW, X86_INS_VPSUBB, X86_INS_VPSUBD, X86_INS_VPSUBQ, X86_INS_VPSUBSB, X86_INS_VPSUBSW, X86_INS_VPSUBUSB, X86_INS_VPSUBUSW, X86_INS_VPSUBW, X86_INS_VPTESTMD, X86_INS_VPTESTMQ, X86_INS_VPTESTNMD, X86_INS_VPTESTNMQ, X86_INS_VPTEST, X86_INS_VPUNPCKHBW, X86_INS_VPUNPCKHDQ, X86_INS_VPUNPCKHQDQ, X86_INS_VPUNPCKHWD, X86_INS_VPUNPCKLBW, X86_INS_VPUNPCKLDQ, X86_INS_VPUNPCKLQDQ, X86_INS_VPUNPCKLWD, X86_INS_VPXORD, X86_INS_VPXORQ, X86_INS_VPXOR, X86_INS_VRCP14PD, X86_INS_VRCP14PS, X86_INS_VRCP14SD, X86_INS_VRCP14SS, X86_INS_VRCP28PD, X86_INS_VRCP28PS, X86_INS_VRCP28SD, X86_INS_VRCP28SS, X86_INS_VRCPPS, X86_INS_VRCPSS, X86_INS_VRNDSCALEPD, X86_INS_VRNDSCALEPS, X86_INS_VRNDSCALESD, X86_INS_VRNDSCALESS, X86_INS_VROUNDPD, X86_INS_VROUNDPS, X86_INS_VROUNDSD, X86_INS_VROUNDSS, X86_INS_VRSQRT14PD, X86_INS_VRSQRT14PS, X86_INS_VRSQRT14SD, X86_INS_VRSQRT14SS, X86_INS_VRSQRT28PD, X86_INS_VRSQRT28PS, X86_INS_VRSQRT28SD, X86_INS_VRSQRT28SS, X86_INS_VRSQRTPS, X86_INS_VRSQRTSS, X86_INS_VSCATTERDPD, X86_INS_VSCATTERDPS, X86_INS_VSCATTERPF0DPD, X86_INS_VSCATTERPF0DPS, X86_INS_VSCATTERPF0QPD, X86_INS_VSCATTERPF0QPS, X86_INS_VSCATTERPF1DPD, X86_INS_VSCATTERPF1DPS, X86_INS_VSCATTERPF1QPD, X86_INS_VSCATTERPF1QPS, X86_INS_VSCATTERQPD, X86_INS_VSCATTERQPS, X86_INS_VSHUFPD, X86_INS_VSHUFPS, X86_INS_VSQRTPD, X86_INS_VSQRTPS, X86_INS_VSQRTSD, X86_INS_VSQRTSS, X86_INS_VSTMXCSR, X86_INS_VSUBPD, X86_INS_VSUBPS, X86_INS_VSUBSD, X86_INS_VSUBSS, X86_INS_VTESTPD, X86_INS_VTESTPS, X86_INS_VUNPCKHPD, X86_INS_VUNPCKHPS, X86_INS_VUNPCKLPD, X86_INS_VUNPCKLPS, X86_INS_VZEROALL, X86_INS_VZEROUPPER, X86_INS_WAIT, X86_INS_WBINVD, X86_INS_WRFSBASE, X86_INS_WRGSBASE, X86_INS_WRMSR, X86_INS_XABORT, X86_INS_XACQUIRE, X86_INS_XBEGIN, X86_INS_XCHG, X86_INS_XCRYPTCBC, X86_INS_XCRYPTCFB, X86_INS_XCRYPTCTR, X86_INS_XCRYPTECB, X86_INS_XCRYPTOFB, X86_INS_XEND, X86_INS_XGETBV, X86_INS_XLATB, X86_INS_XRELEASE, X86_INS_XRSTOR, X86_INS_XRSTOR64, X86_INS_XRSTORS, X86_INS_XRSTORS64, X86_INS_XSAVE, X86_INS_XSAVE64, X86_INS_XSAVEC, X86_INS_XSAVEC64, X86_INS_XSAVEOPT, X86_INS_XSAVEOPT64, X86_INS_XSAVES, X86_INS_XSAVES64, X86_INS_XSETBV, X86_INS_XSHA1, X86_INS_XSHA256, X86_INS_XSTORE, X86_INS_XTEST, X86_INS_FDISI8087_NOP, X86_INS_FENI8087_NOP, // pseudo instructions X86_INS_CMPSS, X86_INS_CMPEQSS, X86_INS_CMPLTSS, X86_INS_CMPLESS, X86_INS_CMPUNORDSS, X86_INS_CMPNEQSS, X86_INS_CMPNLTSS, X86_INS_CMPNLESS, X86_INS_CMPORDSS, X86_INS_CMPSD, X86_INS_CMPEQSD, X86_INS_CMPLTSD, X86_INS_CMPLESD, X86_INS_CMPUNORDSD, X86_INS_CMPNEQSD, X86_INS_CMPNLTSD, X86_INS_CMPNLESD, X86_INS_CMPORDSD, X86_INS_CMPPS, X86_INS_CMPEQPS, X86_INS_CMPLTPS, X86_INS_CMPLEPS, X86_INS_CMPUNORDPS, X86_INS_CMPNEQPS, X86_INS_CMPNLTPS, X86_INS_CMPNLEPS, X86_INS_CMPORDPS, X86_INS_CMPPD, X86_INS_CMPEQPD, X86_INS_CMPLTPD, X86_INS_CMPLEPD, X86_INS_CMPUNORDPD, X86_INS_CMPNEQPD, X86_INS_CMPNLTPD, X86_INS_CMPNLEPD, X86_INS_CMPORDPD, X86_INS_VCMPSS, X86_INS_VCMPEQSS, X86_INS_VCMPLTSS, X86_INS_VCMPLESS, X86_INS_VCMPUNORDSS, X86_INS_VCMPNEQSS, X86_INS_VCMPNLTSS, X86_INS_VCMPNLESS, X86_INS_VCMPORDSS, X86_INS_VCMPEQ_UQSS, X86_INS_VCMPNGESS, X86_INS_VCMPNGTSS, X86_INS_VCMPFALSESS, X86_INS_VCMPNEQ_OQSS, X86_INS_VCMPGESS, X86_INS_VCMPGTSS, X86_INS_VCMPTRUESS, X86_INS_VCMPEQ_OSSS, X86_INS_VCMPLT_OQSS, X86_INS_VCMPLE_OQSS, X86_INS_VCMPUNORD_SSS, X86_INS_VCMPNEQ_USSS, X86_INS_VCMPNLT_UQSS, X86_INS_VCMPNLE_UQSS, X86_INS_VCMPORD_SSS, X86_INS_VCMPEQ_USSS, X86_INS_VCMPNGE_UQSS, X86_INS_VCMPNGT_UQSS, X86_INS_VCMPFALSE_OSSS, X86_INS_VCMPNEQ_OSSS, X86_INS_VCMPGE_OQSS, X86_INS_VCMPGT_OQSS, X86_INS_VCMPTRUE_USSS, X86_INS_VCMPSD, X86_INS_VCMPEQSD, X86_INS_VCMPLTSD, X86_INS_VCMPLESD, X86_INS_VCMPUNORDSD, X86_INS_VCMPNEQSD, X86_INS_VCMPNLTSD, X86_INS_VCMPNLESD, X86_INS_VCMPORDSD, X86_INS_VCMPEQ_UQSD, X86_INS_VCMPNGESD, X86_INS_VCMPNGTSD, X86_INS_VCMPFALSESD, X86_INS_VCMPNEQ_OQSD, X86_INS_VCMPGESD, X86_INS_VCMPGTSD, X86_INS_VCMPTRUESD, X86_INS_VCMPEQ_OSSD, X86_INS_VCMPLT_OQSD, X86_INS_VCMPLE_OQSD, X86_INS_VCMPUNORD_SSD, X86_INS_VCMPNEQ_USSD, X86_INS_VCMPNLT_UQSD, X86_INS_VCMPNLE_UQSD, X86_INS_VCMPORD_SSD, X86_INS_VCMPEQ_USSD, X86_INS_VCMPNGE_UQSD, X86_INS_VCMPNGT_UQSD, X86_INS_VCMPFALSE_OSSD, X86_INS_VCMPNEQ_OSSD, X86_INS_VCMPGE_OQSD, X86_INS_VCMPGT_OQSD, X86_INS_VCMPTRUE_USSD, X86_INS_VCMPPS, X86_INS_VCMPEQPS, X86_INS_VCMPLTPS, X86_INS_VCMPLEPS, X86_INS_VCMPUNORDPS, X86_INS_VCMPNEQPS, X86_INS_VCMPNLTPS, X86_INS_VCMPNLEPS, X86_INS_VCMPORDPS, X86_INS_VCMPEQ_UQPS, X86_INS_VCMPNGEPS, X86_INS_VCMPNGTPS, X86_INS_VCMPFALSEPS, X86_INS_VCMPNEQ_OQPS, X86_INS_VCMPGEPS, X86_INS_VCMPGTPS, X86_INS_VCMPTRUEPS, X86_INS_VCMPEQ_OSPS, X86_INS_VCMPLT_OQPS, X86_INS_VCMPLE_OQPS, X86_INS_VCMPUNORD_SPS, X86_INS_VCMPNEQ_USPS, X86_INS_VCMPNLT_UQPS, X86_INS_VCMPNLE_UQPS, X86_INS_VCMPORD_SPS, X86_INS_VCMPEQ_USPS, X86_INS_VCMPNGE_UQPS, X86_INS_VCMPNGT_UQPS, X86_INS_VCMPFALSE_OSPS, X86_INS_VCMPNEQ_OSPS, X86_INS_VCMPGE_OQPS, X86_INS_VCMPGT_OQPS, X86_INS_VCMPTRUE_USPS, X86_INS_VCMPPD, X86_INS_VCMPEQPD, X86_INS_VCMPLTPD, X86_INS_VCMPLEPD, X86_INS_VCMPUNORDPD, X86_INS_VCMPNEQPD, X86_INS_VCMPNLTPD, X86_INS_VCMPNLEPD, X86_INS_VCMPORDPD, X86_INS_VCMPEQ_UQPD, X86_INS_VCMPNGEPD, X86_INS_VCMPNGTPD, X86_INS_VCMPFALSEPD, X86_INS_VCMPNEQ_OQPD, X86_INS_VCMPGEPD, X86_INS_VCMPGTPD, X86_INS_VCMPTRUEPD, X86_INS_VCMPEQ_OSPD, X86_INS_VCMPLT_OQPD, X86_INS_VCMPLE_OQPD, X86_INS_VCMPUNORD_SPD, X86_INS_VCMPNEQ_USPD, X86_INS_VCMPNLT_UQPD, X86_INS_VCMPNLE_UQPD, X86_INS_VCMPORD_SPD, X86_INS_VCMPEQ_USPD, X86_INS_VCMPNGE_UQPD, X86_INS_VCMPNGT_UQPD, X86_INS_VCMPFALSE_OSPD, X86_INS_VCMPNEQ_OSPD, X86_INS_VCMPGE_OQPD, X86_INS_VCMPGT_OQPD, X86_INS_VCMPTRUE_USPD, X86_INS_UD0, X86_INS_ENDBR32, X86_INS_ENDBR64, X86_INS_ENDING, // mark the end of the list of insn } x86_insn; /// Group of X86 instructions typedef enum x86_insn_group { X86_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) X86_GRP_JUMP, ///< = CS_GRP_JUMP // all call instructions X86_GRP_CALL, ///< = CS_GRP_CALL // all return instructions X86_GRP_RET, ///< = CS_GRP_RET // all interrupt instructions (int+syscall) X86_GRP_INT, ///< = CS_GRP_INT // all interrupt return instructions X86_GRP_IRET, ///< = CS_GRP_IRET // all privileged instructions X86_GRP_PRIVILEGE, ///< = CS_GRP_PRIVILEGE // all relative branching instructions X86_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE // Architecture-specific groups X86_GRP_VM = 128, ///< all virtualization instructions (VT-x + AMD-V) X86_GRP_3DNOW, X86_GRP_AES, X86_GRP_ADX, X86_GRP_AVX, X86_GRP_AVX2, X86_GRP_AVX512, X86_GRP_BMI, X86_GRP_BMI2, X86_GRP_CMOV, X86_GRP_F16C, X86_GRP_FMA, X86_GRP_FMA4, X86_GRP_FSGSBASE, X86_GRP_HLE, X86_GRP_MMX, X86_GRP_MODE32, X86_GRP_MODE64, X86_GRP_RTM, X86_GRP_SHA, X86_GRP_SSE1, X86_GRP_SSE2, X86_GRP_SSE3, X86_GRP_SSE41, X86_GRP_SSE42, X86_GRP_SSE4A, X86_GRP_SSSE3, X86_GRP_PCLMUL, X86_GRP_XOP, X86_GRP_CDI, X86_GRP_ERI, X86_GRP_TBM, X86_GRP_16BITMODE, X86_GRP_NOT64BITMODE, X86_GRP_SGX, X86_GRP_DQI, X86_GRP_BWI, X86_GRP_PFI, X86_GRP_VLX, X86_GRP_SMAP, X86_GRP_NOVLX, X86_GRP_FPU, X86_GRP_ENDING } x86_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/capstone/xcore.h010066400017500001750000000114671363402546700210330ustar0000000000000000#ifndef CAPSTONE_XCORE_H #define CAPSTONE_XCORE_H /* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2014-2015 */ #ifdef __cplusplus extern "C" { #endif #include "platform.h" #ifdef _MSC_VER #pragma warning(disable:4201) #endif /// Operand type for instruction's operands typedef enum xcore_op_type { XCORE_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). XCORE_OP_REG, ///< = CS_OP_REG (Register operand). XCORE_OP_IMM, ///< = CS_OP_IMM (Immediate operand). XCORE_OP_MEM, ///< = CS_OP_MEM (Memory operand). } xcore_op_type; /// XCore registers typedef enum xcore_reg { XCORE_REG_INVALID = 0, XCORE_REG_CP, XCORE_REG_DP, XCORE_REG_LR, XCORE_REG_SP, XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R4, XCORE_REG_R5, XCORE_REG_R6, XCORE_REG_R7, XCORE_REG_R8, XCORE_REG_R9, XCORE_REG_R10, XCORE_REG_R11, // pseudo registers XCORE_REG_PC, ///< pc // internal thread registers // see The-XMOS-XS1-Architecture(X7879A).pdf XCORE_REG_SCP, ///< save pc XCORE_REG_SSR, //< save status XCORE_REG_ET, //< exception type XCORE_REG_ED, //< exception data XCORE_REG_SED, //< save exception data XCORE_REG_KEP, //< kernel entry pointer XCORE_REG_KSP, //< kernel stack pointer XCORE_REG_ID, //< thread ID XCORE_REG_ENDING, // <-- mark the end of the list of registers } xcore_reg; /// Instruction's operand referring to memory /// This is associated with XCORE_OP_MEM operand type above typedef struct xcore_op_mem { uint8_t base; ///< base register, can be safely interpreted as ///< a value of type `xcore_reg`, but it is only ///< one byte wide uint8_t index; ///< index register, same conditions apply here int32_t disp; ///< displacement/offset value int direct; ///< +1: forward, -1: backward } xcore_op_mem; /// Instruction operand typedef struct cs_xcore_op { xcore_op_type type; ///< operand type union { xcore_reg reg; ///< register value for REG operand int32_t imm; ///< immediate value for IMM operand xcore_op_mem mem; ///< base/disp value for MEM operand }; } cs_xcore_op; /// Instruction structure typedef struct cs_xcore { /// Number of operands of this instruction, /// or 0 when instruction has no operand. uint8_t op_count; cs_xcore_op operands[8]; ///< operands for this instruction. } cs_xcore; /// XCore instruction typedef enum xcore_insn { XCORE_INS_INVALID = 0, XCORE_INS_ADD, XCORE_INS_ANDNOT, XCORE_INS_AND, XCORE_INS_ASHR, XCORE_INS_BAU, XCORE_INS_BITREV, XCORE_INS_BLA, XCORE_INS_BLAT, XCORE_INS_BL, XCORE_INS_BF, XCORE_INS_BT, XCORE_INS_BU, XCORE_INS_BRU, XCORE_INS_BYTEREV, XCORE_INS_CHKCT, XCORE_INS_CLRE, XCORE_INS_CLRPT, XCORE_INS_CLRSR, XCORE_INS_CLZ, XCORE_INS_CRC8, XCORE_INS_CRC32, XCORE_INS_DCALL, XCORE_INS_DENTSP, XCORE_INS_DGETREG, XCORE_INS_DIVS, XCORE_INS_DIVU, XCORE_INS_DRESTSP, XCORE_INS_DRET, XCORE_INS_ECALLF, XCORE_INS_ECALLT, XCORE_INS_EDU, XCORE_INS_EEF, XCORE_INS_EET, XCORE_INS_EEU, XCORE_INS_ENDIN, XCORE_INS_ENTSP, XCORE_INS_EQ, XCORE_INS_EXTDP, XCORE_INS_EXTSP, XCORE_INS_FREER, XCORE_INS_FREET, XCORE_INS_GETD, XCORE_INS_GET, XCORE_INS_GETN, XCORE_INS_GETR, XCORE_INS_GETSR, XCORE_INS_GETST, XCORE_INS_GETTS, XCORE_INS_INCT, XCORE_INS_INIT, XCORE_INS_INPW, XCORE_INS_INSHR, XCORE_INS_INT, XCORE_INS_IN, XCORE_INS_KCALL, XCORE_INS_KENTSP, XCORE_INS_KRESTSP, XCORE_INS_KRET, XCORE_INS_LADD, XCORE_INS_LD16S, XCORE_INS_LD8U, XCORE_INS_LDA16, XCORE_INS_LDAP, XCORE_INS_LDAW, XCORE_INS_LDC, XCORE_INS_LDW, XCORE_INS_LDIVU, XCORE_INS_LMUL, XCORE_INS_LSS, XCORE_INS_LSUB, XCORE_INS_LSU, XCORE_INS_MACCS, XCORE_INS_MACCU, XCORE_INS_MJOIN, XCORE_INS_MKMSK, XCORE_INS_MSYNC, XCORE_INS_MUL, XCORE_INS_NEG, XCORE_INS_NOT, XCORE_INS_OR, XCORE_INS_OUTCT, XCORE_INS_OUTPW, XCORE_INS_OUTSHR, XCORE_INS_OUTT, XCORE_INS_OUT, XCORE_INS_PEEK, XCORE_INS_REMS, XCORE_INS_REMU, XCORE_INS_RETSP, XCORE_INS_SETCLK, XCORE_INS_SET, XCORE_INS_SETC, XCORE_INS_SETD, XCORE_INS_SETEV, XCORE_INS_SETN, XCORE_INS_SETPSC, XCORE_INS_SETPT, XCORE_INS_SETRDY, XCORE_INS_SETSR, XCORE_INS_SETTW, XCORE_INS_SETV, XCORE_INS_SEXT, XCORE_INS_SHL, XCORE_INS_SHR, XCORE_INS_SSYNC, XCORE_INS_ST16, XCORE_INS_ST8, XCORE_INS_STW, XCORE_INS_SUB, XCORE_INS_SYNCR, XCORE_INS_TESTCT, XCORE_INS_TESTLCL, XCORE_INS_TESTWCT, XCORE_INS_TSETMR, XCORE_INS_START, XCORE_INS_WAITEF, XCORE_INS_WAITET, XCORE_INS_WAITEU, XCORE_INS_XOR, XCORE_INS_ZEXT, XCORE_INS_ENDING, // <-- mark the end of the list of instructions } xcore_insn; /// Group of XCore instructions typedef enum xcore_insn_group { XCORE_GRP_INVALID = 0, ///< = CS_GRP_INVALID // Generic groups // all jump instructions (conditional+direct+indirect jumps) XCORE_GRP_JUMP, ///< = CS_GRP_JUMP XCORE_GRP_ENDING, // <-- mark the end of the list of groups } xcore_insn_group; #ifdef __cplusplus } #endif #endif capstone-sys-0.11.0/capstone/include/platform.h010066400017500001750000000062141363402546700177150ustar0000000000000000/* Capstone Disassembly Engine */ /* By Axel Souchet & Nguyen Anh Quynh, 2014 */ #ifndef CAPSTONE_PLATFORM_H #define CAPSTONE_PLATFORM_H // handle C99 issue (for pre-2013 VisualStudio) #if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)) // MSVC // stdbool.h #if (_MSC_VER < 1800) || defined(_KERNEL_MODE) // this system does not have stdbool.h #ifndef __cplusplus typedef unsigned char bool; #define false 0 #define true 1 #endif #else // VisualStudio 2013+ -> C99 is supported #include #endif #else // not MSVC -> C99 is supported #include #endif // handle C99 issue (for pre-2013 VisualStudio) #if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE))) // this system does not have inttypes.h #if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE)) // this system does not have stdint.h typedef signed char int8_t; typedef signed short int16_t; typedef signed int int32_t; typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; typedef signed long long int64_t; typedef unsigned long long uint64_t; #define INT8_MIN (-127i8 - 1) #define INT16_MIN (-32767i16 - 1) #define INT32_MIN (-2147483647i32 - 1) #define INT64_MIN (-9223372036854775807i64 - 1) #define INT8_MAX 127i8 #define INT16_MAX 32767i16 #define INT32_MAX 2147483647i32 #define INT64_MAX 9223372036854775807i64 #define UINT8_MAX 0xffui8 #define UINT16_MAX 0xffffui16 #define UINT32_MAX 0xffffffffui32 #define UINT64_MAX 0xffffffffffffffffui64 #endif #define __PRI_8_LENGTH_MODIFIER__ "hh" #define __PRI_64_LENGTH_MODIFIER__ "ll" #define PRId8 __PRI_8_LENGTH_MODIFIER__ "d" #define PRIi8 __PRI_8_LENGTH_MODIFIER__ "i" #define PRIo8 __PRI_8_LENGTH_MODIFIER__ "o" #define PRIu8 __PRI_8_LENGTH_MODIFIER__ "u" #define PRIx8 __PRI_8_LENGTH_MODIFIER__ "x" #define PRIX8 __PRI_8_LENGTH_MODIFIER__ "X" #define PRId16 "hd" #define PRIi16 "hi" #define PRIo16 "ho" #define PRIu16 "hu" #define PRIx16 "hx" #define PRIX16 "hX" #if defined(_MSC_VER) && _MSC_VER <= 1700 #define PRId32 "ld" #define PRIi32 "li" #define PRIo32 "lo" #define PRIu32 "lu" #define PRIx32 "lx" #define PRIX32 "lX" #else // OSX #define PRId32 "d" #define PRIi32 "i" #define PRIo32 "o" #define PRIu32 "u" #define PRIx32 "x" #define PRIX32 "X" #endif #if defined(_MSC_VER) && _MSC_VER <= 1700 // redefine functions from inttypes.h used in cstool #define strtoull _strtoui64 #endif #define PRId64 __PRI_64_LENGTH_MODIFIER__ "d" #define PRIi64 __PRI_64_LENGTH_MODIFIER__ "i" #define PRIo64 __PRI_64_LENGTH_MODIFIER__ "o" #define PRIu64 __PRI_64_LENGTH_MODIFIER__ "u" #define PRIx64 __PRI_64_LENGTH_MODIFIER__ "x" #define PRIX64 __PRI_64_LENGTH_MODIFIER__ "X" #else // this system has inttypes.h by default #include #endif #endif capstone-sys-0.11.0/capstone/include/windowsce/intrin.h010066400017500001750000000004731363402546700213770ustar0000000000000000 #if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(__INTRIN_H_) && !defined(_INTRIN) #define _STDINT #ifdef _M_ARM #include #if (_WIN32_WCE >= 0x700) && defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) #include #endif #endif // _M_ARM #endif capstone-sys-0.11.0/capstone/include/windowsce/stdint.h010066400017500001750000000057141363402546700214040ustar0000000000000000 #if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(_STDINT_H_) && !defined(_STDINT) #define _STDINT typedef __int8 int8_t, int_least8_t; typedef __int16 int16_t, int_least16_t; typedef __int32 int32_t, int_least32_t, int_fast8_t, int_fast16_t, int_fast32_t; typedef __int64 int64_t, intmax_t, int_least64_t, int_fast64_t; typedef unsigned __int8 uint8_t, uint_least8_t; typedef unsigned __int16 uint16_t, uint_least16_t; typedef unsigned __int32 uint32_t, uint_least32_t, uint_fast8_t, uint_fast16_t, uint_fast32_t; typedef unsigned __int64 uint64_t, uintmax_t, uint_least64_t, uint_fast64_t; #ifndef _INTPTR_T_DEFINED #define _INTPTR_T_DEFINED typedef __int32 intptr_t; #endif #ifndef _UINTPTR_T_DEFINED #define _UINTPTR_T_DEFINED typedef unsigned __int32 uintptr_t; #endif #define INT8_MIN (-127i8 - 1) #define INT16_MIN (-32767i16 - 1) #define INT32_MIN (-2147483647i32 - 1) #define INT64_MIN (-9223372036854775807i64 - 1) #define INT8_MAX 127i8 #define INT16_MAX 32767i16 #define INT32_MAX 2147483647i32 #define INT64_MAX 9223372036854775807i64 #define UINT8_MAX 0xffui8 #define UINT16_MAX 0xffffui16 #define UINT32_MAX 0xffffffffui32 #define UINT64_MAX 0xffffffffffffffffui64 #define INT_LEAST8_MIN INT8_MIN #define INT_LEAST16_MIN INT16_MIN #define INT_LEAST32_MIN INT32_MIN #define INT_LEAST64_MIN INT64_MIN #define INT_LEAST8_MAX INT8_MAX #define INT_LEAST16_MAX INT16_MAX #define INT_LEAST32_MAX INT32_MAX #define INT_LEAST64_MAX INT64_MAX #define UINT_LEAST8_MAX UINT8_MAX #define UINT_LEAST16_MAX UINT16_MAX #define UINT_LEAST32_MAX UINT32_MAX #define UINT_LEAST64_MAX UINT64_MAX #define INT_FAST8_MIN INT8_MIN #define INT_FAST16_MIN INT32_MIN #define INT_FAST32_MIN INT32_MIN #define INT_FAST64_MIN INT64_MIN #define INT_FAST8_MAX INT8_MAX #define INT_FAST16_MAX INT32_MAX #define INT_FAST32_MAX INT32_MAX #define INT_FAST64_MAX INT64_MAX #define UINT_FAST8_MAX UINT8_MAX #define UINT_FAST16_MAX UINT32_MAX #define UINT_FAST32_MAX UINT32_MAX #define UINT_FAST64_MAX UINT64_MAX #define INTPTR_MIN INT32_MIN #define INTPTR_MAX INT32_MAX #define UINTPTR_MAX UINT32_MAX #define INTMAX_MIN INT64_MIN #define INTMAX_MAX INT64_MAX #define UINTMAX_MAX UINT64_MAX #define PTRDIFF_MIN INTPTR_MIN #define PTRDIFF_MAX INTPTR_MAX #ifndef SIZE_MAX #define SIZE_MAX UINTPTR_MAX #endif #define SIG_ATOMIC_MIN INT32_MIN #define SIG_ATOMIC_MAX INT32_MAX #define WCHAR_MIN 0x0000 #define WCHAR_MAX 0xffff #define WINT_MIN 0x0000 #define WINT_MAX 0xffff #define INT8_C(x) (x) #define INT16_C(x) (x) #define INT32_C(x) (x) #define INT64_C(x) (x ## LL) #define UINT8_C(x) (x) #define UINT16_C(x) (x) #define UINT32_C(x) (x ## U) #define UINT64_C(x) (x ## ULL) #define INTMAX_C(x) INT64_C(x) #define UINTMAX_C(x) UINT64_C(x) #endif capstone-sys-0.11.0/capstone/make.sh010077500017500001750000000103311363403403300155310ustar0000000000000000#!/bin/sh # Capstone Disassembly Engine # By Nguyen Anh Quynh , 2013-2015 # Note: to cross-compile "nix32" on Linux, package gcc-multilib is required. MAKE_JOBS=$((${MAKE_JOBS}+0)) [ ${MAKE_JOBS} -lt 1 ] && \ MAKE_JOBS=4 # build Android lib for only one supported architecture build_android() { if [ -z "$NDK" ]; then echo "ERROR! Please set \$NDK to point at your Android NDK directory." exit 1 fi HOSTOS=$(uname -s | tr 'LD' 'ld') HOSTARCH=$(uname -m) TARGARCH="$1" shift case "$TARGARCH" in arm) [ -n "$APILEVEL" ] || APILEVEL="android-14" # default to ICS CROSS=arm-linux-androideabi ;; arm64) [ -n "$APILEVEL" ] || APILEVEL="android-21" # first with arm64 CROSS=aarch64-linux-android ;; *) echo "ERROR! Building for Android on $1 is not currently supported." exit 1 ;; esac STANDALONE=`realpath android-ndk-${TARGARCH}-${APILEVEL}` [ -d $STANDALONE ] || { python ${NDK}/build/tools/make_standalone_toolchain.py \ --arch ${TARGARCH} \ --api ${APILEVEL##*-} \ --install-dir ${STANDALONE} } ANDROID=1 CROSS="${STANDALONE}/${CROSS}/bin" CFLAGS="--sysroot=${STANDALONE}/sysroot" ${MAKE} $* } # build iOS lib for all iDevices, or only specific device build_iOS() { IOS_SDK=`xcrun --sdk iphoneos --show-sdk-path` IOS_CC=`xcrun --sdk iphoneos -f clang` IOS_CFLAGS="-Os -Wimplicit -isysroot $IOS_SDK" IOS_LDFLAGS="-isysroot $IOS_SDK" if [ -z "$1" ]; then # build for all iDevices IOS_ARCHS="armv7 armv7s arm64" else IOS_ARCHS="$1" fi export CC="$IOS_CC" export LIBARCHS="$IOS_ARCHS" CFLAGS="$IOS_CFLAGS" LDFLAGS="$IOS_LDFLAGS" MACOS_UNIVERSAL=yes ${MAKE} } install() { # Mac OSX needs to find the right directory for pkgconfig if [ "$UNAME" = Darwin ]; then # we are going to install into /usr/local, so remove old installs under /usr rm -rf /usr/lib/libcapstone.* rm -rf /usr/include/capstone if [ "${HOMEBREW_CAPSTONE}" != 1 ]; then # find the directory automatically, so we can support both Macport & Brew export PKGCFGDIR="$(pkg-config --variable pc_path pkg-config | cut -d ':' -f 1)" fi ${MAKE} install else # not OSX test -d /usr/lib64 && ${MAKE} LIBDIRARCH=lib64 ${MAKE} install fi } uninstall() { # Mac OSX needs to find the right directory for pkgconfig if [ "$UNAME" = "Darwin" ]; then # find the directory automatically, so we can support both Macport & Brew export PKGCFGDIR="$(pkg-config --variable pc_path pkg-config | cut -d ':' -f 1)" ${MAKE} uninstall else # not OSX test -d /usr/lib64 && LIBDIRARCH=lib64 ${MAKE} uninstall fi } if [ "$UNAME" = SunOS ]; then [ -z "${MAKE}" ] && MAKE=gmake export INSTALL_BIN=ginstall export CC=gcc fi if [ -n "`echo "$UNAME" | grep BSD`" ]; then MAKE=gmake export PREFIX=/usr/local fi [ -z "${UNAME}" ] && UNAME=$(uname) [ -z "${MAKE}" ] && MAKE=make [ -n "${MAKE_JOBS}" ] && MAKE="$MAKE -j${MAKE_JOBS}" TARGET="$1" [ -n "$TARGET" ] && shift case "$TARGET" in "" ) ${MAKE} $*;; "default" ) ${MAKE} $*;; "debug" ) CAPSTONE_USE_SYS_DYN_MEM=yes CAPSTONE_STATIC=yes CFLAGS='-O0 -g -fsanitize=address' LDFLAGS='-fsanitize=address' ${MAKE} $*;; "install" ) install;; "uninstall" ) uninstall;; "nix32" ) CFLAGS=-m32 LDFLAGS=-m32 ${MAKE} $*;; "cross-win32" ) CROSS=i686-w64-mingw32- ${MAKE} $*;; "cross-win64" ) CROSS=x86_64-w64-mingw32- ${MAKE} $*;; "cygwin-mingw32" ) CROSS=i686-pc-mingw32- ${MAKE} $*;; "cygwin-mingw64" ) CROSS=x86_64-w64-mingw32- ${MAKE} $*;; "cross-android" ) build_android $*;; "cross-android64" ) CROSS=aarch64-linux-gnu- ${MAKE} $*;; # Linux cross build "clang" ) CC=clang ${MAKE} $*;; "gcc" ) CC=gcc ${MAKE} $*;; "ios" ) build_iOS $*;; "ios_armv7" ) build_iOS armv7 $*;; "ios_armv7s" ) build_iOS armv7s $*;; "ios_arm64" ) build_iOS arm64 $*;; "osx-kernel" ) CAPSTONE_USE_SYS_DYN_MEM=yes CAPSTONE_HAS_OSXKERNEL=yes CAPSTONE_ARCHS=x86 CAPSTONE_SHARED=no CAPSTONE_BUILD_CORE_ONLY=yes ${MAKE} $*;; "mac-universal" ) MACOS_UNIVERSAL=yes ${MAKE} $*;; "mac-universal-no" ) MACOS_UNIVERSAL=no ${MAKE} $*;; * ) echo "Usage: $0 ["`grep '^ "' $0 | cut -d '"' -f 2 | tr "\\n" "|"`"]" exit 1;; esac capstone-sys-0.11.0/capstone/nmake.bat010066400017500001750000000015041363403403300160420ustar0000000000000000:: Capstone disassembler engine (www.capstone-engine.org) :: Build Capstone libs (capstone.dll & capstone.lib) on Windows with CMake & Nmake :: By Nguyen Anh Quynh, Jorn Vernee, 2017, 2019 @echo off set flags="-DCMAKE_BUILD_TYPE=Release -DCAPSTONE_BUILD_STATIC_RUNTIME=ON" if "%1"=="ARM" set %arch%=ARM if "%1"=="ARM64" set %arch%=ARM64 if "%1"=="M68K" set %arch%=M68K if "%1"=="MIPS" set %arch%=MIPS if "%1"=="PowerPC" set %arch%=PPC if "%1"=="Sparc" set %arch%=SPARC if "%1"=="SystemZ" set %arch%=SYSZ if "%1"=="XCore" set %arch%=XCORE if "%1"=="x86" set %arch%=X86 if "%1"=="TMS320C64x" set %arch%=TMS320C64X if "%1"=="M680x" set %arch%=M680X if "%1"=="EVM" set %arch%=EVM if not "%arch%"=="" set flags=%flags% and " -DCAPSTONE_ARCHITECTURE_DEFAULT=OFF -DCAPSTONE_%arch%_SUPPORT=ON" cmake %flags% -G "NMake Makefiles" .. nmake capstone-sys-0.11.0/capstone/packages/freebsd/ports/devel/capstone/Makefile010066400017500001750000000010671363402546700252100ustar0000000000000000# $FreeBSD$ PORTNAME= capstone PORTVERSION= 4.0.0 CATEGORIES= devel MASTER_SITES= http://capstone-engine.org/download/${PORTVERSION}/ MAINTAINER= oliver.pntr@gmail.com COMMENT= Multi-platform, multi-architecture disassembly framework LICENSE= BSD3CLAUSE USES= gmake USE_LDCONFIG= yes MAKE_ENV+= INSTALL_LIB="${INSTALL_LIB}" \ INSTALL_DATA="${INSTALL_DATA}" post-build: # The pkgconfig file is generated and points to stagedir ${REINPLACE_CMD} -e '/libdir/s|\(libdir=\)\(.*\)\(devel/capstone/work/stage\)|\1|g' ${WRKSRC}/capstone.pc .include capstone-sys-0.11.0/capstone/packages/freebsd/ports/devel/capstone/pkg-descr010066400017500001750000000013621363402546700253500ustar0000000000000000Capstone is a lightweight multi-platform, multi-architecture disassembly framework. Features: * Supported architectures: ARM, ARM64 (aka ARMv8), Mips, PowerPC, Sparc, SystemZ, X86, X86_64 & XCore. * Clean/simple/lightweight/intuitive architecture-neutral API * Provide details on disassembled instruction (called "decomposer") * Provide some semantics of the disassembled instruction, such as list of implicit registers read & written. * Implemented in pure C language, with bindings for Python, Ruby, C#, Java, Javascript, GO, OCaml & Vala available. * Native support for Windows & *nix (including MacOSX, Linux, *BSD & Solaris) * Thread-safe by design * Distributed under the open source BSD license WWW: http://capstone-engine.org/ capstone-sys-0.11.0/capstone/packages/freebsd/ports/devel/capstone/pkg-plist010066400017500001750000000005311363402546700254000ustar0000000000000000include/capstone/arm.h include/capstone/arm64.h include/capstone/capstone.h include/capstone/mips.h include/capstone/ppc.h include/capstone/sparc.h include/capstone/systemz.h include/capstone/x86.h include/capstone/xcore.h include/capstone/platform.h lib/libcapstone.a lib/libcapstone.so libdata/pkgconfig/capstone.pc @dirrmtry include/capstone capstone-sys-0.11.0/capstone/packages/macports/devel/capstone/Portfile010066400017500001750000000024731363402546700243300ustar0000000000000000# -*- coding: utf-8; mode: tcl; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- vim:fenc=utf-8:ft=tcl:et:sw=4:ts=4:sts=4 # $Id: Portfile 118429 2014-04-02 07:44:35Z and.damore@macports.org $ PortSystem 1.0 name capstone version 3.0.1 categories devel platforms darwin maintainers gmail.com:aquynh license BSD description Capstone disassembly engine long_description Capstone is a multi-arch, multi-platform disassembly framework with advanced features homepage http://www.capstone-engine.org/ master_sites ${homepage}download/${version}/ extract.suffix .tgz checksums sha256 38fc736830de83ae345d917a6c122e2a09119ec5724b553174ddf84062cf2551 \ rmd160 3da96a34fbdde07c2cbb57ed7a76a07c035bb920 patchfiles patch-Makefile.diff variant universal {} use_configure no build.env CC=${configure.cc} \ CFLAGS="${configure.cflags} [get_canonical_archflags cc]" \ LDFLAGS="${configure.ldflags} [get_canonical_archflags ld]" \ PREFIX=${prefix} eval destroot.env ${build.env} livecheck.type regex livecheck.url ${homepage}download.html livecheck.regex ${name}-(\[0-9.\]+)${extract.suffix} capstone-sys-0.11.0/capstone/packages/macports/devel/capstone/files/patch-Makefile.diff010066400017500001750000000012671363402546700273670ustar0000000000000000--- Makefile +++ Makefile @@ -246,14 +246,6 @@ EXT = dylib VERSION_EXT = $(API_MAJOR).$(EXT) $(LIBNAME)_LDFLAGS += -dynamiclib -install_name lib$(LIBNAME).$(VERSION_EXT) -current_version $(PKG_MAJOR).$(PKG_MINOR).$(PKG_EXTRA) -compatibility_version $(PKG_MAJOR).$(PKG_MINOR) AR_EXT = a -# Homebrew wants to make sure its formula does not disable FORTIFY_SOURCE -# However, this is not really necessary because 'CAPSTONE_USE_SYS_DYN_MEM=yes' by default -ifneq ($(HOMEBREW_CAPSTONE),1) -ifneq ($(CAPSTONE_USE_SYS_DYN_MEM),yes) -# remove string check because OSX kernel complains about missing symbols -CFLAGS += -D_FORTIFY_SOURCE=0 -endif -endif else $(LIBNAME)_LDFLAGS += -shared # Cygwin? capstone-sys-0.11.0/capstone/packages/rpm/capstone.spec010066400017500001750000000106621363402546700213430ustar0000000000000000Name: capstone Version: 3.0.4 Release: 2 Summary: A lightweight multi-platform, multi-architecture disassembly framework License: BSD URL: http://www.capstone-engine.org/ Source0: http://www.capstone-engine.org/download/%{version}/%{name}-%{version}.tar.gz %if 0%{?fedora} > 12 %global with_python3 1 %else %{!?__python2: %global __python2 /usr/bin/python2} %{!?python2_sitelib: %global python2_sitelib %(%{__python2} -c "from distutils.sysconfig import get_python_lib; print (get_python_lib())")} %endif %global srcname distribute BuildRequires: python2-devel BuildRequires: jna BuildRequires: java-devel %if 0%{?with_python3} BuildRequires: python3-devel %endif # if with_python3 %global _hardened_build 1 %description Capstone is a disassembly framework with the target of becoming the ultimate disasm engine for binary analysis and reversing in the security community. %package devel Summary: Development files for %{name} Requires: %{name}%{?_isa} = %{version}-%{release} %description devel The %{name}-devel package contains libraries and header files for developing applications that use %{name}. %package python Summary: Python bindings for %{name} Requires: %{name}%{?_isa} = %{version}-%{release} %description python The %{name}-python package contains python bindings for %{name}. %if 0%{?with_python3} %package python3 Summary: Python3 bindings for %{name} Requires: %{name}%{?_isa} = %{version}-%{release} %description python3 The %{name}-python3 package contains python3 bindings for %{name}. %endif # with_python3 %package java Summary: Java bindings for %{name} Requires: %{name} = %{version}-%{release} BuildArch: noarch %description java The %{name}-java package contains java bindings for %{name}. %prep %setup -q %build DESTDIR="%{buildroot}" V=1 CFLAGS="%{optflags}" \ LIBDIRARCH="%{_lib}" INCDIR="%{_includedir}" make %{?_smp_mflags} # Fix pkgconfig file sed -i 's;%{buildroot};;' capstone.pc grep -v archive capstone.pc > capstone.pc.tmp mv capstone.pc.tmp capstone.pc # build python bindings pushd bindings/python CFLAGS="%{optflags}" %{__python2} setup.py build %if 0%{?with_python3} CFLAGS="%{optflags}" %{__python3} setup.py build %endif # with_python3 popd # build java bindings pushd bindings/java make CFLAGS="%{optflags}" # %{?_smp_mflags} parallel seems broken popd %install DESTDIR=%{buildroot} LIBDIRARCH=%{_lib} \ INCDIR="%{_includedir}" make install find %{buildroot} -name '*.la' -exec rm -f {} ';' find %{buildroot} -name '*.a' -exec rm -f {} ';' # install python bindings pushd bindings/python %{__python2} setup.py install --skip-build --root %{buildroot} %if 0%{?with_python3} %{__python3} setup.py install --skip-build --root %{buildroot} %endif # with_python3 popd # install java bindings install -D -p -m 0644 bindings/java/%{name}.jar %{buildroot}/%{_javadir}/%{name}.jar %check ln -s libcapstone.so libcapstone.so.3 make check LD_LIBRARY_PATH="`pwd`" %post -p /sbin/ldconfig %postun -p /sbin/ldconfig %files # %license does not work for RHEL<7 %if 0%{?rhel} || 0%{?fedora} < 21 %doc LICENSE.TXT LICENSE_LLVM.TXT %else %license LICENSE.TXT LICENSE_LLVM.TXT %endif # %license workarond for RHEL<7 %doc README ChangeLog %{_libdir}/*.so.* %files devel %{_includedir}/* %{_libdir}/*.so %{_libdir}/pkgconfig/* %files python %{python2_sitelib}/*egg-info %{python2_sitelib}/%{name} %if 0%{?with_python3} %files python3 %{python3_sitelib}/*egg-info %{python3_sitelib}/%{name} %endif # _with_python3 %files java %{_javadir}/ %changelog * Thu Jul 16 2015 Stefan Cornelius - 3.0.4-2 - Fix EPEL6 build problems * Wed Jul 15 2015 Stefan Cornelius - 3.0.4-1 - new version 3.0.4. Includes security fixes. * Tue May 12 2015 Stefan Cornelius - 3.0.3-2 - Addressed issues found during package review. * Fri May 08 2015 Stefan Cornelius - 3.0.3-1 - Update to version 3.0.3 * Fri May 08 2015 Stefan Cornelius - 3.0.2-3 - Added python3 and hardened build support. Update java building. - Various cleanups. * Wed May 06 2015 Stefan Cornelius - 3.0.2-2 - Update to 3.0.2. Fix 64bit issues. add %check. * Sat Sep 27 2014 Adel Gadllah - 2.1.2-2 - Addressed issues found during package review. * Mon May 19 2014 Adel Gadllah - 2.1.2-1 - Initial package capstone-sys-0.11.0/capstone/pkgconfig.mk010066400017500001750000000004071363402546700165730ustar0000000000000000# Package version of Capstone for Makefile. # To be used to generate capstone.pc for pkg-config # version major & minor PKG_MAJOR = 4 PKG_MINOR = 0 # version bugfix level. Example: PKG_EXTRA = 1 PKG_EXTRA = 2 # version tag. Examples: rc1, b2, post1 PKG_TAG = capstone-sys-0.11.0/capstone/suite/MC/AArch64/basic-a64-instructions.s.cs010066400017500001750000002520331363402546700240620ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x82,0x00,0x25,0x8b = add x2, x4, w5, uxtb 0xf4,0x23,0x33,0x8b = add x20, sp, w19, uxth 0x2c,0x40,0x34,0x8b = add x12, x1, w20, uxtw 0x74,0x60,0x2d,0x8b = add x20, x3, x13, uxtx 0x31,0x83,0x34,0x8b = add x17, x25, w20, sxtb 0xb2,0xa1,0x33,0x8b = add x18, x13, w19, sxth 0x5f,0xc0,0x23,0x8b = add sp, x2, w3, sxtw 0xa3,0xe0,0x29,0x8b = add x3, x5, x9, sxtx 0xa2,0x00,0x27,0x0b = add w2, w5, w7, uxtb 0xf5,0x21,0x31,0x0b = add w21, w15, w17, uxth 0xbe,0x43,0x3f,0x0b = add w30, w29, wzr, uxtw 0x33,0x62,0x21,0x0b = add w19, w17, w1, uxtx 0xa2,0x80,0x21,0x0b = add w2, w5, w1, sxtb 0x3a,0xa2,0x33,0x0b = add w26, w17, w19, sxth 0x40,0xc0,0x23,0x0b = add w0, w2, w3, sxtw 0x62,0xe0,0x25,0x0b = add w2, w3, w5, sxtx 0x62,0x80,0x25,0x8b = add x2, x3, w5, sxtb 0x67,0x31,0x2d,0x8b = add x7, x11, w13, uxth #4 0x71,0x4a,0x37,0x0b = add w17, w19, w23, uxtw #2 0xfd,0x66,0x31,0x0b = add w29, w23, w17, uxtx #1 0x82,0x08,0x25,0xcb = sub x2, x4, w5, uxtb #2 0xf4,0x33,0x33,0xcb = sub x20, sp, w19, uxth #4 0x2c,0x40,0x34,0xcb = sub x12, x1, w20, uxtw 0x74,0x60,0x2d,0xcb = sub x20, x3, x13, uxtx 0x31,0x83,0x34,0xcb = sub x17, x25, w20, sxtb 0xb2,0xa1,0x33,0xcb = sub x18, x13, w19, sxth 0x5f,0xc0,0x23,0xcb = sub sp, x2, w3, sxtw 0xa3,0xe0,0x29,0xcb = sub x3, x5, x9, sxtx 0xa2,0x00,0x27,0x4b = sub w2, w5, w7, uxtb 0xf5,0x21,0x31,0x4b = sub w21, w15, w17, uxth 0xbe,0x43,0x3f,0x4b = sub w30, w29, wzr, uxtw 0x33,0x62,0x21,0x4b = sub w19, w17, w1, uxtx 0xa2,0x80,0x21,0x4b = sub w2, w5, w1, sxtb 0xfa,0xa3,0x33,0x4b = sub w26, wsp, w19, sxth 0x5f,0xc0,0x23,0x4b = sub wsp, w2, w3, sxtw 0x62,0xe0,0x25,0x4b = sub w2, w3, w5, sxtx 0x82,0x08,0x25,0xab = adds x2, x4, w5, uxtb #2 0xf4,0x33,0x33,0xab = adds x20, sp, w19, uxth #4 0x2c,0x40,0x34,0xab = adds x12, x1, w20, uxtw 0x74,0x60,0x2d,0xab = adds x20, x3, x13, uxtx 0x3f,0x8f,0x34,0xab = adds xzr, x25, w20, sxtb #3 0xf2,0xa3,0x33,0xab = adds x18, sp, w19, sxth 0x5f,0xc0,0x23,0xab = adds xzr, x2, w3, sxtw 0xa3,0xe8,0x29,0xab = adds x3, x5, x9, sxtx #2 0xa2,0x00,0x27,0x2b = adds w2, w5, w7, uxtb 0xf5,0x21,0x31,0x2b = adds w21, w15, w17, uxth 0xbe,0x43,0x3f,0x2b = adds w30, w29, wzr, uxtw 0x33,0x62,0x21,0x2b = adds w19, w17, w1, uxtx 0xa2,0x84,0x21,0x2b = adds w2, w5, w1, sxtb #1 0xfa,0xa3,0x33,0x2b = adds w26, wsp, w19, sxth 0x5f,0xc0,0x23,0x2b = adds wzr, w2, w3, sxtw 0x62,0xe0,0x25,0x2b = adds w2, w3, w5, sxtx 0x82,0x08,0x25,0xeb = subs x2, x4, w5, uxtb #2 0xf4,0x33,0x33,0xeb = subs x20, sp, w19, uxth #4 0x2c,0x40,0x34,0xeb = subs x12, x1, w20, uxtw 0x74,0x60,0x2d,0xeb = subs x20, x3, x13, uxtx 0x3f,0x8f,0x34,0xeb = subs xzr, x25, w20, sxtb #3 0xf2,0xa3,0x33,0xeb = subs x18, sp, w19, sxth 0x5f,0xc0,0x23,0xeb = subs xzr, x2, w3, sxtw 0xa3,0xe8,0x29,0xeb = subs x3, x5, x9, sxtx #2 0xa2,0x00,0x27,0x6b = subs w2, w5, w7, uxtb 0xf5,0x21,0x31,0x6b = subs w21, w15, w17, uxth 0xbe,0x43,0x3f,0x6b = subs w30, w29, wzr, uxtw 0x33,0x62,0x21,0x6b = subs w19, w17, w1, uxtx 0xa2,0x84,0x21,0x6b = subs w2, w5, w1, sxtb #1 0xfa,0xa3,0x33,0x6b = subs w26, wsp, w19, sxth 0x5f,0xc0,0x23,0x6b = subs wzr, w2, w3, sxtw 0x62,0xe0,0x25,0x6b = subs w2, w3, w5, sxtx 0x9f,0x08,0x25,0xeb = cmp x4, w5, uxtb #2 0xff,0x33,0x33,0xeb = cmp sp, w19, uxth #4 0x3f,0x40,0x34,0xeb = cmp x1, w20, uxtw 0x7f,0x60,0x2d,0xeb = cmp x3, x13, uxtx 0x3f,0x8f,0x34,0xeb = cmp x25, w20, sxtb #3 0xff,0xa3,0x33,0xeb = cmp sp, w19, sxth 0x5f,0xc0,0x23,0xeb = cmp x2, w3, sxtw 0xbf,0xe8,0x29,0xeb = cmp x5, x9, sxtx #2 0xbf,0x00,0x27,0x6b = cmp w5, w7, uxtb 0xff,0x21,0x31,0x6b = cmp w15, w17, uxth 0xbf,0x43,0x3f,0x6b = cmp w29, wzr, uxtw 0x3f,0x62,0x21,0x6b = cmp w17, w1, uxtx 0xbf,0x84,0x21,0x6b = cmp w5, w1, sxtb #1 0xff,0xa3,0x33,0x6b = cmp wsp, w19, sxth 0x5f,0xc0,0x23,0x6b = cmp w2, w3, sxtw 0x7f,0xe0,0x25,0x6b = cmp w3, w5, sxtx 0x9f,0x08,0x25,0xab = cmn x4, w5, uxtb #2 0xff,0x33,0x33,0xab = cmn sp, w19, uxth #4 0x3f,0x40,0x34,0xab = cmn x1, w20, uxtw 0x7f,0x60,0x2d,0xab = cmn x3, x13, uxtx 0x3f,0x8f,0x34,0xab = cmn x25, w20, sxtb #3 0xff,0xa3,0x33,0xab = cmn sp, w19, sxth 0x5f,0xc0,0x23,0xab = cmn x2, w3, sxtw 0xbf,0xe8,0x29,0xab = cmn x5, x9, sxtx #2 0xbf,0x00,0x27,0x2b = cmn w5, w7, uxtb 0xff,0x21,0x31,0x2b = cmn w15, w17, uxth 0xbf,0x43,0x3f,0x2b = cmn w29, wzr, uxtw 0x3f,0x62,0x21,0x2b = cmn w17, w1, uxtx 0xbf,0x84,0x21,0x2b = cmn w5, w1, sxtb #1 0xff,0xa3,0x33,0x2b = cmn wsp, w19, sxth 0x5f,0xc0,0x23,0x2b = cmn w2, w3, sxtw 0x7f,0xe0,0x25,0x2b = cmn w3, w5, sxtx 0x9f,0x0e,0x3d,0xeb = cmp x20, w29, uxtb #3 0x9f,0x71,0x2d,0xeb = cmp x12, x13, uxtx #4 0xff,0x03,0x21,0x6b = cmp wsp, w1, uxtb 0xff,0xc3,0x3f,0x2b = cmn wsp, wzr, sxtw 0x7f,0x70,0x27,0xcb = sub sp, x3, x7, lsl #4 0xe2,0x47,0x23,0x0b = add w2, wsp, w3, lsl #1 0xff,0x43,0x29,0x6b = cmp wsp, w9 0xff,0x53,0x23,0x2b = adds wzr, wsp, w3, lsl #4 0xe3,0x6b,0x29,0xeb = subs x3, sp, x9, lsl #2 0xa4,0x00,0x00,0x11 = add w4, w5, #0 0x62,0xfc,0x3f,0x11 = add w2, w3, #4095 0xbe,0x07,0x40,0x11 = add w30, w29, #1, lsl #12 0xad,0xfc,0x7f,0x11 = add w13, w5, #4095, lsl #12 0xe5,0x98,0x19,0x91 = add x5, x7, #1638 0xf4,0x87,0x0c,0x11 = add w20, wsp, #801 0xff,0x43,0x11,0x11 = add wsp, wsp, #1104 0xdf,0xd3,0x3f,0x11 = add wsp, w30, #4084 0x00,0x8f,0x04,0x91 = add x0, x24, #291 0x03,0xff,0x7f,0x91 = add x3, x24, #4095, lsl #12 0xe8,0xcb,0x10,0x91 = add x8, sp, #1074 0xbf,0xa3,0x3b,0x91 = add sp, x29, #3816 0xe0,0xb7,0x3f,0x51 = sub w0, wsp, #4077 0x84,0x8a,0x48,0x51 = sub w4, w20, #546, lsl #12 0xff,0x83,0x04,0xd1 = sub sp, sp, #288 0x7f,0x42,0x00,0x51 = sub wsp, w19, #16 0xed,0x8e,0x44,0x31 = adds w13, w23, #291, lsl #12 0x5f,0xfc,0x3f,0x31 = adds wzr, w2, #4095 0xf4,0x03,0x00,0x31 = adds w20, wsp, #0 0x7f,0x04,0x40,0xb1 = adds xzr, x3, #1, lsl #12 0xff,0x53,0x40,0xf1 = subs xzr, sp, #20, lsl #12 0xdf,0xff,0x3f,0xf1 = subs xzr, x30, #4095 0xe4,0xbb,0x3b,0xf1 = subs x4, sp, #3822 0x7f,0x8c,0x44,0x31 = cmn w3, #291, lsl #12 0xff,0x57,0x15,0x31 = cmn wsp, #1365 0xff,0x13,0x51,0xb1 = cmn sp, #1092, lsl #12 0x9f,0xb0,0x44,0xf1 = cmp x4, #300, lsl #12 0xff,0xd3,0x07,0x71 = cmp wsp, #500 0xff,0x23,0x03,0xf1 = cmp sp, #200 0xdf,0x03,0x00,0x91 = mov sp, x30 0x9f,0x02,0x00,0x11 = mov wsp, w20 0xeb,0x03,0x00,0x91 = mov x11, sp 0xf8,0x03,0x00,0x11 = mov w24, wsp 0xa3,0x00,0x07,0x0b = add w3, w5, w7 0x7f,0x00,0x05,0x0b = add wzr, w3, w5 0xf4,0x03,0x04,0x0b = add w20, wzr, w4 0xc4,0x00,0x1f,0x0b = add w4, w6, wzr 0xab,0x01,0x0f,0x0b = add w11, w13, w15 0x69,0x28,0x1f,0x0b = add w9, w3, wzr, lsl #10 0xb1,0x7f,0x14,0x0b = add w17, w29, w20, lsl #31 0xd5,0x02,0x57,0x0b = add w21, w22, w23, lsr #0 0x38,0x4b,0x5a,0x0b = add w24, w25, w26, lsr #18 0x9b,0x7f,0x5d,0x0b = add w27, w28, w29, lsr #31 0x62,0x00,0x84,0x0b = add w2, w3, w4, asr #0 0xc5,0x54,0x87,0x0b = add w5, w6, w7, asr #21 0x28,0x7d,0x8a,0x0b = add w8, w9, w10, asr #31 0xa3,0x00,0x07,0x8b = add x3, x5, x7 0x7f,0x00,0x05,0x8b = add xzr, x3, x5 0xf4,0x03,0x04,0x8b = add x20, xzr, x4 0xc4,0x00,0x1f,0x8b = add x4, x6, xzr 0xab,0x01,0x0f,0x8b = add x11, x13, x15 0x69,0x28,0x1f,0x8b = add x9, x3, xzr, lsl #10 0xb1,0xff,0x14,0x8b = add x17, x29, x20, lsl #63 0xd5,0x02,0x57,0x8b = add x21, x22, x23, lsr #0 0x38,0x4b,0x5a,0x8b = add x24, x25, x26, lsr #18 0x9b,0xff,0x5d,0x8b = add x27, x28, x29, lsr #63 0x62,0x00,0x84,0x8b = add x2, x3, x4, asr #0 0xc5,0x54,0x87,0x8b = add x5, x6, x7, asr #21 0x28,0xfd,0x8a,0x8b = add x8, x9, x10, asr #63 0xa3,0x00,0x07,0x2b = adds w3, w5, w7 0x7f,0x00,0x05,0x2b = adds wzr, w3, w5 0xf4,0x03,0x04,0x2b = adds w20, wzr, w4 0xc4,0x00,0x1f,0x2b = adds w4, w6, wzr 0xab,0x01,0x0f,0x2b = adds w11, w13, w15 0x69,0x28,0x1f,0x2b = adds w9, w3, wzr, lsl #10 0xb1,0x7f,0x14,0x2b = adds w17, w29, w20, lsl #31 0xd5,0x02,0x57,0x2b = adds w21, w22, w23, lsr #0 0x38,0x4b,0x5a,0x2b = adds w24, w25, w26, lsr #18 0x9b,0x7f,0x5d,0x2b = adds w27, w28, w29, lsr #31 0x62,0x00,0x84,0x2b = adds w2, w3, w4, asr #0 0xc5,0x54,0x87,0x2b = adds w5, w6, w7, asr #21 0x28,0x7d,0x8a,0x2b = adds w8, w9, w10, asr #31 0xa3,0x00,0x07,0xab = adds x3, x5, x7 0x7f,0x00,0x05,0xab = adds xzr, x3, x5 0xf4,0x03,0x04,0xab = adds x20, xzr, x4 0xc4,0x00,0x1f,0xab = adds x4, x6, xzr 0xab,0x01,0x0f,0xab = adds x11, x13, x15 0x69,0x28,0x1f,0xab = adds x9, x3, xzr, lsl #10 0xb1,0xff,0x14,0xab = adds x17, x29, x20, lsl #63 0xd5,0x02,0x57,0xab = adds x21, x22, x23, lsr #0 0x38,0x4b,0x5a,0xab = adds x24, x25, x26, lsr #18 0x9b,0xff,0x5d,0xab = adds x27, x28, x29, lsr #63 0x62,0x00,0x84,0xab = adds x2, x3, x4, asr #0 0xc5,0x54,0x87,0xab = adds x5, x6, x7, asr #21 0x28,0xfd,0x8a,0xab = adds x8, x9, x10, asr #63 0xa3,0x00,0x07,0x4b = sub w3, w5, w7 0x7f,0x00,0x05,0x4b = sub wzr, w3, w5 0xf4,0x03,0x04,0x4b = sub w20, wzr, w4 0xc4,0x00,0x1f,0x4b = sub w4, w6, wzr 0xab,0x01,0x0f,0x4b = sub w11, w13, w15 0x69,0x28,0x1f,0x4b = sub w9, w3, wzr, lsl #10 0xb1,0x7f,0x14,0x4b = sub w17, w29, w20, lsl #31 0xd5,0x02,0x57,0x4b = sub w21, w22, w23, lsr #0 0x38,0x4b,0x5a,0x4b = sub w24, w25, w26, lsr #18 0x9b,0x7f,0x5d,0x4b = sub w27, w28, w29, lsr #31 0x62,0x00,0x84,0x4b = sub w2, w3, w4, asr #0 0xc5,0x54,0x87,0x4b = sub w5, w6, w7, asr #21 0x28,0x7d,0x8a,0x4b = sub w8, w9, w10, asr #31 0xa3,0x00,0x07,0xcb = sub x3, x5, x7 0x7f,0x00,0x05,0xcb = sub xzr, x3, x5 0xf4,0x03,0x04,0xcb = sub x20, xzr, x4 0xc4,0x00,0x1f,0xcb = sub x4, x6, xzr 0xab,0x01,0x0f,0xcb = sub x11, x13, x15 0x69,0x28,0x1f,0xcb = sub x9, x3, xzr, lsl #10 0xb1,0xff,0x14,0xcb = sub x17, x29, x20, lsl #63 0xd5,0x02,0x57,0xcb = sub x21, x22, x23, lsr #0 0x38,0x4b,0x5a,0xcb = sub x24, x25, x26, lsr #18 0x9b,0xff,0x5d,0xcb = sub x27, x28, x29, lsr #63 0x62,0x00,0x84,0xcb = sub x2, x3, x4, asr #0 0xc5,0x54,0x87,0xcb = sub x5, x6, x7, asr #21 0x28,0xfd,0x8a,0xcb = sub x8, x9, x10, asr #63 0xa3,0x00,0x07,0x6b = subs w3, w5, w7 0x7f,0x00,0x05,0x6b = subs wzr, w3, w5 0xf4,0x03,0x04,0x6b = subs w20, wzr, w4 0xc4,0x00,0x1f,0x6b = subs w4, w6, wzr 0xab,0x01,0x0f,0x6b = subs w11, w13, w15 0x69,0x28,0x1f,0x6b = subs w9, w3, wzr, lsl #10 0xb1,0x7f,0x14,0x6b = subs w17, w29, w20, lsl #31 0xd5,0x02,0x57,0x6b = subs w21, w22, w23, lsr #0 0x38,0x4b,0x5a,0x6b = subs w24, w25, w26, lsr #18 0x9b,0x7f,0x5d,0x6b = subs w27, w28, w29, lsr #31 0x62,0x00,0x84,0x6b = subs w2, w3, w4, asr #0 0xc5,0x54,0x87,0x6b = subs w5, w6, w7, asr #21 0x28,0x7d,0x8a,0x6b = subs w8, w9, w10, asr #31 0xa3,0x00,0x07,0xeb = subs x3, x5, x7 0x7f,0x00,0x05,0xeb = subs xzr, x3, x5 0xf4,0x03,0x04,0xeb = subs x20, xzr, x4 0xc4,0x00,0x1f,0xeb = subs x4, x6, xzr 0xab,0x01,0x0f,0xeb = subs x11, x13, x15 0x69,0x28,0x1f,0xeb = subs x9, x3, xzr, lsl #10 0xb1,0xff,0x14,0xeb = subs x17, x29, x20, lsl #63 0xd5,0x02,0x57,0xeb = subs x21, x22, x23, lsr #0 0x38,0x4b,0x5a,0xeb = subs x24, x25, x26, lsr #18 0x9b,0xff,0x5d,0xeb = subs x27, x28, x29, lsr #63 0x62,0x00,0x84,0xeb = subs x2, x3, x4, asr #0 0xc5,0x54,0x87,0xeb = subs x5, x6, x7, asr #21 0x28,0xfd,0x8a,0xeb = subs x8, x9, x10, asr #63 0x1f,0x00,0x03,0x2b = cmn w0, w3 0xff,0x03,0x04,0x2b = cmn wzr, w4 0xbf,0x00,0x1f,0x2b = cmn w5, wzr 0xdf,0x00,0x07,0x2b = cmn w6, w7 0x1f,0x3d,0x09,0x2b = cmn w8, w9, lsl #15 0x5f,0x7d,0x0b,0x2b = cmn w10, w11, lsl #31 0x9f,0x01,0x4d,0x2b = cmn w12, w13, lsr #0 0xdf,0x55,0x4f,0x2b = cmn w14, w15, lsr #21 0x1f,0x7e,0x51,0x2b = cmn w16, w17, lsr #31 0x5f,0x02,0x93,0x2b = cmn w18, w19, asr #0 0x9f,0x5a,0x95,0x2b = cmn w20, w21, asr #22 0xdf,0x7e,0x97,0x2b = cmn w22, w23, asr #31 0x1f,0x00,0x03,0xab = cmn x0, x3 0xff,0x03,0x04,0xab = cmn xzr, x4 0xbf,0x00,0x1f,0xab = cmn x5, xzr 0xdf,0x00,0x07,0xab = cmn x6, x7 0x1f,0x3d,0x09,0xab = cmn x8, x9, lsl #15 0x5f,0xfd,0x0b,0xab = cmn x10, x11, lsl #63 0x9f,0x01,0x4d,0xab = cmn x12, x13, lsr #0 0xdf,0xa5,0x4f,0xab = cmn x14, x15, lsr #41 0x1f,0xfe,0x51,0xab = cmn x16, x17, lsr #63 0x5f,0x02,0x93,0xab = cmn x18, x19, asr #0 0x9f,0xde,0x95,0xab = cmn x20, x21, asr #55 0xdf,0xfe,0x97,0xab = cmn x22, x23, asr #63 0x1f,0x00,0x03,0x6b = cmp w0, w3 0xff,0x03,0x04,0x6b = cmp wzr, w4 0xbf,0x00,0x1f,0x6b = cmp w5, wzr 0xdf,0x00,0x07,0x6b = cmp w6, w7 0x1f,0x3d,0x09,0x6b = cmp w8, w9, lsl #15 0x5f,0x7d,0x0b,0x6b = cmp w10, w11, lsl #31 0x9f,0x01,0x4d,0x6b = cmp w12, w13, lsr #0 0xdf,0x55,0x4f,0x6b = cmp w14, w15, lsr #21 0x1f,0x7e,0x51,0x6b = cmp w16, w17, lsr #31 0x5f,0x02,0x93,0x6b = cmp w18, w19, asr #0 0x9f,0x5a,0x95,0x6b = cmp w20, w21, asr #22 0xdf,0x7e,0x97,0x6b = cmp w22, w23, asr #31 0x1f,0x00,0x03,0xeb = cmp x0, x3 0xff,0x03,0x04,0xeb = cmp xzr, x4 0xbf,0x00,0x1f,0xeb = cmp x5, xzr 0xdf,0x00,0x07,0xeb = cmp x6, x7 0x1f,0x3d,0x09,0xeb = cmp x8, x9, lsl #15 0x5f,0xfd,0x0b,0xeb = cmp x10, x11, lsl #63 0x9f,0x01,0x4d,0xeb = cmp x12, x13, lsr #0 0xdf,0xa5,0x4f,0xeb = cmp x14, x15, lsr #41 0x1f,0xfe,0x51,0xeb = cmp x16, x17, lsr #63 0x5f,0x02,0x93,0xeb = cmp x18, x19, asr #0 0x9f,0xde,0x95,0xeb = cmp x20, x21, asr #55 0xdf,0xfe,0x97,0xeb = cmp x22, x23, asr #63 0xfd,0x03,0x1e,0x4b = sub w29, wzr, w30 0xfe,0x03,0x1f,0x4b = sub w30, wzr, wzr 0xff,0x03,0x00,0x4b = sub wzr, wzr, w0 0xfc,0x03,0x1b,0x4b = sub w28, wzr, w27 0xfa,0x77,0x19,0x4b = sub w26, wzr, w25, lsl #29 0xf8,0x7f,0x17,0x4b = sub w24, wzr, w23, lsl #31 0xf6,0x03,0x55,0x4b = sub w22, wzr, w21, lsr #0 0xf4,0x07,0x53,0x4b = sub w20, wzr, w19, lsr #1 0xf2,0x7f,0x51,0x4b = sub w18, wzr, w17, lsr #31 0xf0,0x03,0x8f,0x4b = sub w16, wzr, w15, asr #0 0xee,0x33,0x8d,0x4b = sub w14, wzr, w13, asr #12 0xec,0x7f,0x8b,0x4b = sub w12, wzr, w11, asr #31 0xfd,0x03,0x1e,0xcb = sub x29, xzr, x30 0xfe,0x03,0x1f,0xcb = sub x30, xzr, xzr 0xff,0x03,0x00,0xcb = sub xzr, xzr, x0 0xfc,0x03,0x1b,0xcb = sub x28, xzr, x27 0xfa,0x77,0x19,0xcb = sub x26, xzr, x25, lsl #29 0xf8,0x7f,0x17,0xcb = sub x24, xzr, x23, lsl #31 0xf6,0x03,0x55,0xcb = sub x22, xzr, x21, lsr #0 0xf4,0x07,0x53,0xcb = sub x20, xzr, x19, lsr #1 0xf2,0x7f,0x51,0xcb = sub x18, xzr, x17, lsr #31 0xf0,0x03,0x8f,0xcb = sub x16, xzr, x15, asr #0 0xee,0x33,0x8d,0xcb = sub x14, xzr, x13, asr #12 0xec,0x7f,0x8b,0xcb = sub x12, xzr, x11, asr #31 0xfd,0x03,0x1e,0x6b = subs w29, wzr, w30 0xfe,0x03,0x1f,0x6b = subs w30, wzr, wzr 0xff,0x03,0x00,0x6b = subs wzr, wzr, w0 0xfc,0x03,0x1b,0x6b = subs w28, wzr, w27 0xfa,0x77,0x19,0x6b = subs w26, wzr, w25, lsl #29 0xf8,0x7f,0x17,0x6b = subs w24, wzr, w23, lsl #31 0xf6,0x03,0x55,0x6b = subs w22, wzr, w21, lsr #0 0xf4,0x07,0x53,0x6b = subs w20, wzr, w19, lsr #1 0xf2,0x7f,0x51,0x6b = subs w18, wzr, w17, lsr #31 0xf0,0x03,0x8f,0x6b = subs w16, wzr, w15, asr #0 0xee,0x33,0x8d,0x6b = subs w14, wzr, w13, asr #12 0xec,0x7f,0x8b,0x6b = subs w12, wzr, w11, asr #31 0xfd,0x03,0x1e,0xeb = subs x29, xzr, x30 0xfe,0x03,0x1f,0xeb = subs x30, xzr, xzr 0xff,0x03,0x00,0xeb = subs xzr, xzr, x0 0xfc,0x03,0x1b,0xeb = subs x28, xzr, x27 0xfa,0x77,0x19,0xeb = subs x26, xzr, x25, lsl #29 0xf8,0x7f,0x17,0xeb = subs x24, xzr, x23, lsl #31 0xf6,0x03,0x55,0xeb = subs x22, xzr, x21, lsr #0 0xf4,0x07,0x53,0xeb = subs x20, xzr, x19, lsr #1 0xf2,0x7f,0x51,0xeb = subs x18, xzr, x17, lsr #31 0xf0,0x03,0x8f,0xeb = subs x16, xzr, x15, asr #0 0xee,0x33,0x8d,0xeb = subs x14, xzr, x13, asr #12 0xec,0x7f,0x8b,0xeb = subs x12, xzr, x11, asr #31 0x7d,0x03,0x19,0x1a = adc w29, w27, w25 0x7f,0x00,0x04,0x1a = adc wzr, w3, w4 0xe9,0x03,0x0a,0x1a = adc w9, wzr, w10 0x14,0x00,0x1f,0x1a = adc w20, w0, wzr 0x7d,0x03,0x19,0x9a = adc x29, x27, x25 0x7f,0x00,0x04,0x9a = adc xzr, x3, x4 0xe9,0x03,0x0a,0x9a = adc x9, xzr, x10 0x14,0x00,0x1f,0x9a = adc x20, x0, xzr 0x7d,0x03,0x19,0x3a = adcs w29, w27, w25 0x7f,0x00,0x04,0x3a = adcs wzr, w3, w4 0xe9,0x03,0x0a,0x3a = adcs w9, wzr, w10 0x14,0x00,0x1f,0x3a = adcs w20, w0, wzr 0x7d,0x03,0x19,0xba = adcs x29, x27, x25 0x7f,0x00,0x04,0xba = adcs xzr, x3, x4 0xe9,0x03,0x0a,0xba = adcs x9, xzr, x10 0x14,0x00,0x1f,0xba = adcs x20, x0, xzr 0x7d,0x03,0x19,0x5a = sbc w29, w27, w25 0x7f,0x00,0x04,0x5a = sbc wzr, w3, w4 0xe9,0x03,0x0a,0x5a = ngc w9, w10 0x14,0x00,0x1f,0x5a = sbc w20, w0, wzr 0x7d,0x03,0x19,0xda = sbc x29, x27, x25 0x7f,0x00,0x04,0xda = sbc xzr, x3, x4 0xe9,0x03,0x0a,0xda = ngc x9, x10 0x14,0x00,0x1f,0xda = sbc x20, x0, xzr 0x7d,0x03,0x19,0x7a = sbcs w29, w27, w25 0x7f,0x00,0x04,0x7a = sbcs wzr, w3, w4 0xe9,0x03,0x0a,0x7a = ngcs w9, w10 0x14,0x00,0x1f,0x7a = sbcs w20, w0, wzr 0x7d,0x03,0x19,0xfa = sbcs x29, x27, x25 0x7f,0x00,0x04,0xfa = sbcs xzr, x3, x4 0xe9,0x03,0x0a,0xfa = ngcs x9, x10 0x14,0x00,0x1f,0xfa = sbcs x20, x0, xzr 0xe3,0x03,0x0c,0x5a = ngc w3, w12 0xff,0x03,0x09,0x5a = ngc wzr, w9 0xf7,0x03,0x1f,0x5a = ngc w23, wzr 0xfd,0x03,0x1e,0xda = ngc x29, x30 0xff,0x03,0x00,0xda = ngc xzr, x0 0xe0,0x03,0x1f,0xda = ngc x0, xzr 0xe3,0x03,0x0c,0x7a = ngcs w3, w12 0xff,0x03,0x09,0x7a = ngcs wzr, w9 0xf7,0x03,0x1f,0x7a = ngcs w23, wzr 0xfd,0x03,0x1e,0xfa = ngcs x29, x30 0xff,0x03,0x00,0xfa = ngcs xzr, x0 0xe0,0x03,0x1f,0xfa = ngcs x0, xzr 0x41,0x10,0x43,0x93 = sbfm x1, x2, #3, #4 0x83,0xfc,0x7f,0x93 = sbfm x3, x4, #63, #63 0xff,0x7f,0x1f,0x13 = sbfm wzr, wzr, #31, #31 0x2c,0x01,0x00,0x13 = sbfm w12, w9, #0, #0 0xa4,0x28,0x4c,0xd3 = ubfm x4, x5, #12, #10 0x9f,0x00,0x40,0xd3 = ubfm xzr, x4, #0, #0 0xe4,0x17,0x7f,0xd3 = ubfm x4, xzr, #63, #5 0xc5,0xfc,0x4c,0xd3 = ubfm x5, x6, #12, #63 0xa4,0x28,0x4c,0xb3 = bfm x4, x5, #12, #10 0x9f,0x00,0x40,0xb3 = bfm xzr, x4, #0, #0 0xe4,0x17,0x7f,0xb3 = bfm x4, xzr, #63, #5 0xc5,0xfc,0x4c,0xb3 = bfm x5, x6, #12, #63 0x41,0x1c,0x00,0x13 = sxtb w1, w2 0x7f,0x1c,0x40,0x93 = sxtb xzr, w3 0x49,0x3d,0x00,0x13 = sxth w9, w10 0x20,0x3c,0x40,0x93 = sxth x0, w1 0xc3,0x7f,0x40,0x93 = sxtw x3, w30 0x41,0x1c,0x00,0x53 = uxtb w1, w2 0x7f,0x1c,0x00,0x53 = uxtb xzr, w3 0x49,0x3d,0x00,0x53 = uxth w9, w10 0x20,0x3c,0x00,0x53 = uxth x0, w1 0x43,0x7c,0x00,0x13 = asr w3, w2, #0 0x49,0x7d,0x1f,0x13 = asr w9, w10, #31 0xb4,0xfe,0x7f,0x93 = asr x20, x21, #63 0xe1,0x7f,0x03,0x13 = asr w1, wzr, #3 0x43,0x7c,0x00,0x53 = lsr w3, w2, #0 0x49,0x7d,0x1f,0x53 = lsr w9, w10, #31 0xb4,0xfe,0x7f,0xd3 = lsr x20, x21, #63 0xff,0x7f,0x03,0x53 = lsr wzr, wzr, #3 0x43,0x7c,0x00,0x53 = lsl w3, w2, #0 0x49,0x01,0x01,0x53 = lsl w9, w10, #31 0xb4,0x02,0x41,0xd3 = lsl x20, x21, #63 0xe1,0x73,0x1d,0x53 = lsl w1, wzr, #3 0x49,0x01,0x00,0x13 = sbfiz w9, w10, #0, #1 0x62,0x00,0x41,0x93 = sbfiz x2, x3, #63, #1 0x93,0xfe,0x40,0x93 = sbfiz x19, x20, #0, #64 0x49,0xe9,0x7b,0x93 = sbfiz x9, x10, #5, #59 0x49,0x7d,0x00,0x13 = sbfiz w9, w10, #0, #32 0x8b,0x01,0x01,0x13 = sbfiz w11, w12, #31, #1 0xcd,0x09,0x03,0x13 = sbfiz w13, w14, #29, #3 0xff,0x2b,0x76,0x93 = sbfiz xzr, xzr, #10, #11 0x49,0x01,0x00,0x13 = sbfx w9, w10, #0, #1 0x62,0xfc,0x7f,0x93 = sbfx x2, x3, #63, #1 0x93,0xfe,0x40,0x93 = sbfx x19, x20, #0, #64 0x49,0xfd,0x45,0x93 = sbfx x9, x10, #5, #59 0x49,0x7d,0x00,0x13 = sbfx w9, w10, #0, #32 0x8b,0x7d,0x1f,0x13 = sbfx w11, w12, #31, #1 0xcd,0x7d,0x1d,0x13 = sbfx w13, w14, #29, #3 0xff,0x53,0x4a,0x93 = sbfx xzr, xzr, #10, #11 0x49,0x01,0x00,0x33 = bfi w9, w10, #0, #1 0x62,0x00,0x41,0xb3 = bfi x2, x3, #63, #1 0x93,0xfe,0x40,0xb3 = bfi x19, x20, #0, #64 0x49,0xe9,0x7b,0xb3 = bfi x9, x10, #5, #59 0x49,0x7d,0x00,0x33 = bfi w9, w10, #0, #32 0x8b,0x01,0x01,0x33 = bfi w11, w12, #31, #1 0xcd,0x09,0x03,0x33 = bfi w13, w14, #29, #3 0xff,0x2b,0x76,0xb3 = bfi xzr, xzr, #10, #11 0x49,0x01,0x00,0x33 = bfxil w9, w10, #0, #1 0x62,0xfc,0x7f,0xb3 = bfxil x2, x3, #63, #1 0x93,0xfe,0x40,0xb3 = bfxil x19, x20, #0, #64 0x49,0xfd,0x45,0xb3 = bfxil x9, x10, #5, #59 0x49,0x7d,0x00,0x33 = bfxil w9, w10, #0, #32 0x8b,0x7d,0x1f,0x33 = bfxil w11, w12, #31, #1 0xcd,0x7d,0x1d,0x33 = bfxil w13, w14, #29, #3 0xff,0x53,0x4a,0xb3 = bfxil xzr, xzr, #10, #11 0x49,0x01,0x00,0x53 = ubfiz w9, w10, #0, #1 0x62,0x00,0x41,0xd3 = ubfiz x2, x3, #63, #1 0x93,0xfe,0x40,0xd3 = ubfiz x19, x20, #0, #64 0x49,0xe9,0x7b,0xd3 = ubfiz x9, x10, #5, #59 0x49,0x7d,0x00,0x53 = ubfiz w9, w10, #0, #32 0x8b,0x01,0x01,0x53 = ubfiz w11, w12, #31, #1 0xcd,0x09,0x03,0x53 = ubfiz w13, w14, #29, #3 0xff,0x2b,0x76,0xd3 = ubfiz xzr, xzr, #10, #11 0x49,0x01,0x00,0x53 = ubfx w9, w10, #0, #1 0x62,0xfc,0x7f,0xd3 = ubfx x2, x3, #63, #1 0x93,0xfe,0x40,0xd3 = ubfx x19, x20, #0, #64 0x49,0xfd,0x45,0xd3 = ubfx x9, x10, #5, #59 0x49,0x7d,0x00,0x53 = ubfx w9, w10, #0, #32 0x8b,0x7d,0x1f,0x53 = ubfx w11, w12, #31, #1 0xcd,0x7d,0x1d,0x53 = ubfx w13, w14, #29, #3 0xff,0x53,0x4a,0xd3 = ubfx xzr, xzr, #10, #11 0x05,0x00,0x00,0x34 = cbz w5, #0 0xe3,0xff,0xff,0xb5 = cbnz x3, #-4 0xf4,0xff,0x7f,0x34 = cbz w20, #1048572 0x1f,0x00,0x80,0xb5 = cbnz xzr, #-1048576 0x00,0x00,0x00,0x54 = b.eq #0 0xeb,0xff,0xff,0x54 = b.lt #-4 0xe3,0xff,0x7f,0x54 = b.lo #1048572 0x20,0x08,0x5f,0x7a = ccmp w1, #31, #0, eq 0x6f,0x28,0x40,0x7a = ccmp w3, #0, #15, hs 0xed,0x2b,0x4f,0x7a = ccmp wzr, #15, #13, hs 0x20,0xd9,0x5f,0xfa = ccmp x9, #31, #0, le 0x6f,0xc8,0x40,0xfa = ccmp x3, #0, #15, gt 0xe7,0x1b,0x45,0xfa = ccmp xzr, #5, #7, ne 0x20,0x08,0x5f,0x3a = ccmn w1, #31, #0, eq 0x6f,0x28,0x40,0x3a = ccmn w3, #0, #15, hs 0xed,0x2b,0x4f,0x3a = ccmn wzr, #15, #13, hs 0x20,0xd9,0x5f,0xba = ccmn x9, #31, #0, le 0x6f,0xc8,0x40,0xba = ccmn x3, #0, #15, gt 0xe7,0x1b,0x45,0xba = ccmn xzr, #5, #7, ne 0x20,0x00,0x5f,0x7a = ccmp w1, wzr, #0, eq 0x6f,0x20,0x40,0x7a = ccmp w3, w0, #15, hs 0xed,0x23,0x4f,0x7a = ccmp wzr, w15, #13, hs 0x20,0xd1,0x5f,0xfa = ccmp x9, xzr, #0, le 0x6f,0xc0,0x40,0xfa = ccmp x3, x0, #15, gt 0xe7,0x13,0x45,0xfa = ccmp xzr, x5, #7, ne 0x20,0x00,0x5f,0x3a = ccmn w1, wzr, #0, eq 0x6f,0x20,0x40,0x3a = ccmn w3, w0, #15, hs 0xed,0x23,0x4f,0x3a = ccmn wzr, w15, #13, hs 0x20,0xd1,0x5f,0xba = ccmn x9, xzr, #0, le 0x6f,0xc0,0x40,0xba = ccmn x3, x0, #15, gt 0xe7,0x13,0x45,0xba = ccmn xzr, x5, #7, ne 0x01,0x10,0x93,0x1a = csel w1, w0, w19, ne 0xbf,0x00,0x89,0x1a = csel wzr, w5, w9, eq 0xe9,0xc3,0x9e,0x1a = csel w9, wzr, w30, gt 0x81,0x43,0x9f,0x1a = csel w1, w28, wzr, mi 0xf3,0xb2,0x9d,0x9a = csel x19, x23, x29, lt 0x7f,0xa0,0x84,0x9a = csel xzr, x3, x4, ge 0xe5,0x23,0x86,0x9a = csel x5, xzr, x6, hs 0x07,0x31,0x9f,0x9a = csel x7, x8, xzr, lo 0x01,0x14,0x93,0x1a = csinc w1, w0, w19, ne 0xbf,0x04,0x89,0x1a = csinc wzr, w5, w9, eq 0xe9,0xc7,0x9e,0x1a = csinc w9, wzr, w30, gt 0x81,0x47,0x9f,0x1a = csinc w1, w28, wzr, mi 0xf3,0xb6,0x9d,0x9a = csinc x19, x23, x29, lt 0x7f,0xa4,0x84,0x9a = csinc xzr, x3, x4, ge 0xe5,0x27,0x86,0x9a = csinc x5, xzr, x6, hs 0x07,0x35,0x9f,0x9a = csinc x7, x8, xzr, lo 0x01,0x10,0x93,0x5a = csinv w1, w0, w19, ne 0xbf,0x00,0x89,0x5a = csinv wzr, w5, w9, eq 0xe9,0xc3,0x9e,0x5a = csinv w9, wzr, w30, gt 0x81,0x43,0x9f,0x5a = csinv w1, w28, wzr, mi 0xf3,0xb2,0x9d,0xda = csinv x19, x23, x29, lt 0x7f,0xa0,0x84,0xda = csinv xzr, x3, x4, ge 0xe5,0x23,0x86,0xda = csinv x5, xzr, x6, hs 0x07,0x31,0x9f,0xda = csinv x7, x8, xzr, lo 0x01,0x14,0x93,0x5a = csneg w1, w0, w19, ne 0xbf,0x04,0x89,0x5a = csneg wzr, w5, w9, eq 0xe9,0xc7,0x9e,0x5a = csneg w9, wzr, w30, gt 0x81,0x47,0x9f,0x5a = csneg w1, w28, wzr, mi 0xf3,0xb6,0x9d,0xda = csneg x19, x23, x29, lt 0x7f,0xa4,0x84,0xda = csneg xzr, x3, x4, ge 0xe5,0x27,0x86,0xda = csneg x5, xzr, x6, hs 0x07,0x35,0x9f,0xda = csneg x7, x8, xzr, lo 0xe3,0x17,0x9f,0x1a = csinc w3, wzr, wzr, ne 0xe9,0x47,0x9f,0x9a = csinc x9, xzr, xzr, mi 0xf4,0x03,0x9f,0x5a = csinv w20, wzr, wzr, eq 0xfe,0xb3,0x9f,0xda = csinv x30, xzr, xzr, lt 0xa3,0xd4,0x85,0x1a = csinc w3, w5, w5, le 0x9f,0xc4,0x84,0x1a = csinc wzr, w4, w4, gt 0xe9,0xa7,0x9f,0x1a = csinc w9, wzr, wzr, ge 0xa3,0xd4,0x85,0x9a = csinc x3, x5, x5, le 0x9f,0xc4,0x84,0x9a = csinc xzr, x4, x4, gt 0xe9,0xa7,0x9f,0x9a = csinc x9, xzr, xzr, ge 0xa3,0xd0,0x85,0x5a = csinv w3, w5, w5, le 0x9f,0xc0,0x84,0x5a = csinv wzr, w4, w4, gt 0xe9,0xa3,0x9f,0x5a = csinv w9, wzr, wzr, ge 0xa3,0xd0,0x85,0xda = csinv x3, x5, x5, le 0x9f,0xc0,0x84,0xda = csinv xzr, x4, x4, gt 0xe9,0xa3,0x9f,0xda = csinv x9, xzr, xzr, ge 0xa3,0xd4,0x85,0x5a = csneg w3, w5, w5, le 0x9f,0xc4,0x84,0x5a = csneg wzr, w4, w4, gt 0xe9,0xa7,0x9f,0x5a = csneg w9, wzr, wzr, ge 0xa3,0xd4,0x85,0xda = csneg x3, x5, x5, le 0x9f,0xc4,0x84,0xda = csneg xzr, x4, x4, gt 0xe9,0xa7,0x9f,0xda = csneg x9, xzr, xzr, ge 0xe0,0x00,0xc0,0x5a = rbit w0, w7 0x72,0x00,0xc0,0xda = rbit x18, x3 0x31,0x04,0xc0,0x5a = rev16 w17, w1 0x45,0x04,0xc0,0xda = rev16 x5, x2 0x12,0x08,0xc0,0x5a = rev w18, w0 0x34,0x08,0xc0,0xda = rev32 x20, x1 0xf4,0x0b,0xc0,0xda = rev32 x20, xzr 0x56,0x0c,0xc0,0xda = rev x22, x2 0xf2,0x0f,0xc0,0xda = rev x18, xzr 0xe7,0x0b,0xc0,0x5a = rev w7, wzr 0x78,0x10,0xc0,0x5a = clz w24, w3 0x9a,0x10,0xc0,0xda = clz x26, x4 0xa3,0x14,0xc0,0x5a = cls w3, w5 0xb4,0x14,0xc0,0xda = cls x20, x5 0xf8,0x13,0xc0,0x5a = clz w24, wzr 0xf6,0x0f,0xc0,0xda = rev x22, xzr 0xe5,0x40,0xd4,0x1a = crc32b w5, w7, w20 0xfc,0x47,0xde,0x1a = crc32h w28, wzr, w30 0x20,0x48,0xc2,0x1a = crc32w w0, w1, w2 0x27,0x4d,0xd4,0x9a = crc32x w7, w9, x20 0xa9,0x50,0xc4,0x1a = crc32cb w9, w5, w4 0x2d,0x56,0xd9,0x1a = crc32ch w13, w17, w25 0x7f,0x58,0xc5,0x1a = crc32cw wzr, w3, w5 0x12,0x5e,0xdf,0x9a = crc32cx w18, w16, xzr 0xe0,0x08,0xca,0x1a = udiv w0, w7, w10 0xc9,0x0a,0xc4,0x9a = udiv x9, x22, x4 0xac,0x0e,0xc0,0x1a = sdiv w12, w21, w0 0x4d,0x0c,0xc1,0x9a = sdiv x13, x2, x1 0x8b,0x21,0xcd,0x1a = lsl w11, w12, w13 0xee,0x21,0xd0,0x9a = lsl x14, x15, x16 0x51,0x26,0xd3,0x1a = lsr w17, w18, w19 0xb4,0x26,0xd6,0x9a = lsr x20, x21, x22 0x17,0x2b,0xd9,0x1a = asr w23, w24, w25 0x7a,0x2b,0xdc,0x9a = asr x26, x27, x28 0x20,0x2c,0xc2,0x1a = ror w0, w1, w2 0x83,0x2c,0xc5,0x9a = ror x3, x4, x5 0xe6,0x20,0xc8,0x1a = lsl w6, w7, w8 0x49,0x21,0xcb,0x9a = lsl x9, x10, x11 0xac,0x25,0xce,0x1a = lsr w12, w13, w14 0x0f,0x26,0xd1,0x9a = lsr x15, x16, x17 0x72,0x2a,0xd4,0x1a = asr w18, w19, w20 0xd5,0x2a,0xd7,0x9a = asr x21, x22, x23 0x38,0x2f,0xda,0x1a = ror w24, w25, w26 0x9b,0x2f,0xdd,0x9a = ror x27, x28, x29 0x61,0x10,0x07,0x1b = madd w1, w3, w7, w4 0x1f,0x2c,0x09,0x1b = madd wzr, w0, w9, w11 0xed,0x13,0x04,0x1b = madd w13, wzr, w4, w4 0xd3,0x77,0x1f,0x1b = madd w19, w30, wzr, w29 0xa4,0x7c,0x06,0x1b = mul w4, w5, w6 0x61,0x10,0x07,0x9b = madd x1, x3, x7, x4 0x1f,0x2c,0x09,0x9b = madd xzr, x0, x9, x11 0xed,0x13,0x04,0x9b = madd x13, xzr, x4, x4 0xd3,0x77,0x1f,0x9b = madd x19, x30, xzr, x29 0xa4,0x7c,0x06,0x9b = mul x4, x5, x6 0x61,0x90,0x07,0x1b = msub w1, w3, w7, w4 0x1f,0xac,0x09,0x1b = msub wzr, w0, w9, w11 0xed,0x93,0x04,0x1b = msub w13, wzr, w4, w4 0xd3,0xf7,0x1f,0x1b = msub w19, w30, wzr, w29 0xa4,0xfc,0x06,0x1b = mneg w4, w5, w6 0x61,0x90,0x07,0x9b = msub x1, x3, x7, x4 0x1f,0xac,0x09,0x9b = msub xzr, x0, x9, x11 0xed,0x93,0x04,0x9b = msub x13, xzr, x4, x4 0xd3,0xf7,0x1f,0x9b = msub x19, x30, xzr, x29 0xa4,0xfc,0x06,0x9b = mneg x4, x5, x6 0xa3,0x24,0x22,0x9b = smaddl x3, w5, w2, x9 0x5f,0x31,0x2b,0x9b = smaddl xzr, w10, w11, x12 0xed,0x3f,0x2e,0x9b = smaddl x13, wzr, w14, x15 0x30,0x4a,0x3f,0x9b = smaddl x16, w17, wzr, x18 0x93,0x7e,0x35,0x9b = smull x19, w20, w21 0xa3,0xa4,0x22,0x9b = smsubl x3, w5, w2, x9 0x5f,0xb1,0x2b,0x9b = smsubl xzr, w10, w11, x12 0xed,0xbf,0x2e,0x9b = smsubl x13, wzr, w14, x15 0x30,0xca,0x3f,0x9b = smsubl x16, w17, wzr, x18 0x93,0xfe,0x35,0x9b = smnegl x19, w20, w21 0xa3,0x24,0xa2,0x9b = umaddl x3, w5, w2, x9 0x5f,0x31,0xab,0x9b = umaddl xzr, w10, w11, x12 0xed,0x3f,0xae,0x9b = umaddl x13, wzr, w14, x15 0x30,0x4a,0xbf,0x9b = umaddl x16, w17, wzr, x18 0x93,0x7e,0xb5,0x9b = umull x19, w20, w21 0xa3,0xa4,0xa2,0x9b = umsubl x3, w5, w2, x9 0x5f,0xb1,0xab,0x9b = umsubl xzr, w10, w11, x12 0xed,0xbf,0xae,0x9b = umsubl x13, wzr, w14, x15 0x30,0xca,0xbf,0x9b = umsubl x16, w17, wzr, x18 0x93,0xfe,0xb5,0x9b = umnegl x19, w20, w21 0xbe,0x7f,0x5c,0x9b = smulh x30, x29, x28 0x7f,0x7f,0x5a,0x9b = smulh xzr, x27, x26 0xf9,0x7f,0x58,0x9b = smulh x25, xzr, x24 0xd7,0x7e,0x5f,0x9b = smulh x23, x22, xzr 0xbe,0x7f,0xdc,0x9b = umulh x30, x29, x28 0x7f,0x7f,0xda,0x9b = umulh xzr, x27, x26 0xf9,0x7f,0xd8,0x9b = umulh x25, xzr, x24 0xd7,0x7e,0xdf,0x9b = umulh x23, x22, xzr 0x83,0x7c,0x05,0x1b = mul w3, w4, w5 0xdf,0x7c,0x07,0x1b = mul wzr, w6, w7 0xe8,0x7f,0x09,0x1b = mul w8, wzr, w9 0x6a,0x7d,0x1f,0x1b = mul w10, w11, wzr 0xac,0x7d,0x0e,0x9b = mul x12, x13, x14 0xff,0x7d,0x10,0x9b = mul xzr, x15, x16 0xf1,0x7f,0x12,0x9b = mul x17, xzr, x18 0x93,0x7e,0x1f,0x9b = mul x19, x20, xzr 0xd5,0xfe,0x17,0x1b = mneg w21, w22, w23 0x1f,0xff,0x19,0x1b = mneg wzr, w24, w25 0xfa,0xff,0x1b,0x1b = mneg w26, wzr, w27 0xbc,0xff,0x1f,0x1b = mneg w28, w29, wzr 0xab,0x7d,0x31,0x9b = smull x11, w13, w17 0xab,0x7d,0xb1,0x9b = umull x11, w13, w17 0xab,0xfd,0x31,0x9b = smnegl x11, w13, w17 0xab,0xfd,0xb1,0x9b = umnegl x11, w13, w17 0x01,0x00,0x00,0xd4 = svc #0 0xe1,0xff,0x1f,0xd4 = svc #65535 0x22,0x00,0x00,0xd4 = hvc #1 0x03,0xdc,0x05,0xd4 = smc #12000 0x80,0x01,0x20,0xd4 = brk #12 0x60,0x0f,0x40,0xd4 = hlt #123 0x41,0x05,0xa0,0xd4 = dcps1 #42 0x22,0x01,0xa0,0xd4 = dcps2 #9 0x03,0x7d,0xa0,0xd4 = dcps3 #1000 0x01,0x00,0xa0,0xd4 = dcps1 0x02,0x00,0xa0,0xd4 = dcps2 0x03,0x00,0xa0,0xd4 = dcps3 0xa3,0x00,0x87,0x13 = extr w3, w5, w7, #0 0xab,0x7d,0x91,0x13 = extr w11, w13, w17, #31 0xa3,0x3c,0xc7,0x93 = extr x3, x5, x7, #15 0xab,0xfd,0xd1,0x93 = extr x11, x13, x17, #63 0xf3,0x62,0xd7,0x93 = extr x19, x23, x23, #24 0xfd,0xff,0xdf,0x93 = extr x29, xzr, xzr, #63 0xa9,0x7d,0x8d,0x13 = extr w9, w13, w13, #31 0x60,0x20,0x25,0x1e = fcmp s3, s5 0xe8,0x23,0x20,0x1e = fcmp s31, #0.0 0xb0,0x23,0x3e,0x1e = fcmpe s29, s30 0xf8,0x21,0x20,0x1e = fcmpe s15, #0.0 0x80,0x20,0x6c,0x1e = fcmp d4, d12 0xe8,0x22,0x60,0x1e = fcmp d23, #0.0 0x50,0x23,0x76,0x1e = fcmpe d26, d22 0xb8,0x23,0x60,0x1e = fcmpe d29, #0.0 0x20,0x04,0x3f,0x1e = fccmp s1, s31, #0, eq 0x6f,0x24,0x20,0x1e = fccmp s3, s0, #15, hs 0xed,0x27,0x2f,0x1e = fccmp s31, s15, #13, hs 0x20,0xd5,0x7f,0x1e = fccmp d9, d31, #0, le 0x6f,0xc4,0x60,0x1e = fccmp d3, d0, #15, gt 0xe7,0x17,0x65,0x1e = fccmp d31, d5, #7, ne 0x30,0x04,0x3f,0x1e = fccmpe s1, s31, #0, eq 0x7f,0x24,0x20,0x1e = fccmpe s3, s0, #15, hs 0xfd,0x27,0x2f,0x1e = fccmpe s31, s15, #13, hs 0x30,0xd5,0x7f,0x1e = fccmpe d9, d31, #0, le 0x7f,0xc4,0x60,0x1e = fccmpe d3, d0, #15, gt 0xf7,0x17,0x65,0x1e = fccmpe d31, d5, #7, ne 0x83,0x5e,0x29,0x1e = fcsel s3, s20, s9, pl 0x49,0x4d,0x6b,0x1e = fcsel d9, d10, d11, mi 0x20,0x40,0x20,0x1e = fmov s0, s1 0x62,0xc0,0x20,0x1e = fabs s2, s3 0xa4,0x40,0x21,0x1e = fneg s4, s5 0xe6,0xc0,0x21,0x1e = fsqrt s6, s7 0x28,0xc1,0x22,0x1e = fcvt d8, s9 0x6a,0xc1,0x23,0x1e = fcvt h10, s11 0xac,0x41,0x24,0x1e = frintn s12, s13 0xee,0xc1,0x24,0x1e = frintp s14, s15 0x30,0x42,0x25,0x1e = frintm s16, s17 0x72,0xc2,0x25,0x1e = frintz s18, s19 0xb4,0x42,0x26,0x1e = frinta s20, s21 0xf6,0x42,0x27,0x1e = frintx s22, s23 0x38,0xc3,0x27,0x1e = frinti s24, s25 0x20,0x40,0x60,0x1e = fmov d0, d1 0x62,0xc0,0x60,0x1e = fabs d2, d3 0xa4,0x40,0x61,0x1e = fneg d4, d5 0xe6,0xc0,0x61,0x1e = fsqrt d6, d7 0x28,0x41,0x62,0x1e = fcvt s8, d9 0x6a,0xc1,0x63,0x1e = fcvt h10, d11 0xac,0x41,0x64,0x1e = frintn d12, d13 0xee,0xc1,0x64,0x1e = frintp d14, d15 0x30,0x42,0x65,0x1e = frintm d16, d17 0x72,0xc2,0x65,0x1e = frintz d18, d19 0xb4,0x42,0x66,0x1e = frinta d20, d21 0xf6,0x42,0x67,0x1e = frintx d22, d23 0x38,0xc3,0x67,0x1e = frinti d24, d25 0x7a,0x43,0xe2,0x1e = fcvt s26, h27 0xbc,0xc3,0xe2,0x1e = fcvt d28, h29 0x74,0x0a,0x31,0x1e = fmul s20, s19, s17 0x41,0x18,0x23,0x1e = fdiv s1, s2, s3 0xa4,0x28,0x26,0x1e = fadd s4, s5, s6 0x07,0x39,0x29,0x1e = fsub s7, s8, s9 0x6a,0x49,0x2c,0x1e = fmax s10, s11, s12 0xcd,0x59,0x2f,0x1e = fmin s13, s14, s15 0x30,0x6a,0x32,0x1e = fmaxnm s16, s17, s18 0x93,0x7a,0x35,0x1e = fminnm s19, s20, s21 0xf6,0x8a,0x38,0x1e = fnmul s22, s23, s24 0x74,0x0a,0x71,0x1e = fmul d20, d19, d17 0x41,0x18,0x63,0x1e = fdiv d1, d2, d3 0xa4,0x28,0x66,0x1e = fadd d4, d5, d6 0x07,0x39,0x69,0x1e = fsub d7, d8, d9 0x6a,0x49,0x6c,0x1e = fmax d10, d11, d12 0xcd,0x59,0x6f,0x1e = fmin d13, d14, d15 0x30,0x6a,0x72,0x1e = fmaxnm d16, d17, d18 0x93,0x7a,0x75,0x1e = fminnm d19, d20, d21 0xf6,0x8a,0x78,0x1e = fnmul d22, d23, d24 0xa3,0x7c,0x06,0x1f = fmadd s3, s5, s6, s31 0xa3,0x5d,0x40,0x1f = fmadd d3, d13, d0, d23 0xa3,0xfc,0x06,0x1f = fmsub s3, s5, s6, s31 0xa3,0xdd,0x40,0x1f = fmsub d3, d13, d0, d23 0xa3,0x7c,0x26,0x1f = fnmadd s3, s5, s6, s31 0xa3,0x5d,0x60,0x1f = fnmadd d3, d13, d0, d23 0xa3,0xfc,0x26,0x1f = fnmsub s3, s5, s6, s31 0xa3,0xdd,0x60,0x1f = fnmsub d3, d13, d0, d23 0xa3,0xfc,0x18,0x1e = fcvtzs w3, s5, #1 0x9f,0xce,0x18,0x1e = fcvtzs wzr, s20, #13 0x13,0x80,0x18,0x1e = fcvtzs w19, s0, #32 0xa3,0xfc,0x18,0x9e = fcvtzs x3, s5, #1 0xcc,0x4f,0x18,0x9e = fcvtzs x12, s30, #45 0x13,0x00,0x18,0x9e = fcvtzs x19, s0, #64 0xa3,0xfc,0x58,0x1e = fcvtzs w3, d5, #1 0x9f,0xce,0x58,0x1e = fcvtzs wzr, d20, #13 0x13,0x80,0x58,0x1e = fcvtzs w19, d0, #32 0xa3,0xfc,0x58,0x9e = fcvtzs x3, d5, #1 0xcc,0x4f,0x58,0x9e = fcvtzs x12, d30, #45 0x13,0x00,0x58,0x9e = fcvtzs x19, d0, #64 0xa3,0xfc,0x19,0x1e = fcvtzu w3, s5, #1 0x9f,0xce,0x19,0x1e = fcvtzu wzr, s20, #13 0x13,0x80,0x19,0x1e = fcvtzu w19, s0, #32 0xa3,0xfc,0x19,0x9e = fcvtzu x3, s5, #1 0xcc,0x4f,0x19,0x9e = fcvtzu x12, s30, #45 0x13,0x00,0x19,0x9e = fcvtzu x19, s0, #64 0xa3,0xfc,0x59,0x1e = fcvtzu w3, d5, #1 0x9f,0xce,0x59,0x1e = fcvtzu wzr, d20, #13 0x13,0x80,0x59,0x1e = fcvtzu w19, d0, #32 0xa3,0xfc,0x59,0x9e = fcvtzu x3, d5, #1 0xcc,0x4f,0x59,0x9e = fcvtzu x12, d30, #45 0x13,0x00,0x59,0x9e = fcvtzu x19, d0, #64 0x77,0xfe,0x02,0x1e = scvtf s23, w19, #1 0xff,0xb3,0x02,0x1e = scvtf s31, wzr, #20 0x0e,0x80,0x02,0x1e = scvtf s14, w0, #32 0x77,0xfe,0x02,0x9e = scvtf s23, x19, #1 0xff,0xb3,0x02,0x9e = scvtf s31, xzr, #20 0x0e,0x00,0x02,0x9e = scvtf s14, x0, #64 0x77,0xfe,0x42,0x1e = scvtf d23, w19, #1 0xff,0xb3,0x42,0x1e = scvtf d31, wzr, #20 0x0e,0x80,0x42,0x1e = scvtf d14, w0, #32 0x77,0xfe,0x42,0x9e = scvtf d23, x19, #1 0xff,0xb3,0x42,0x9e = scvtf d31, xzr, #20 0x0e,0x00,0x42,0x9e = scvtf d14, x0, #64 0x77,0xfe,0x03,0x1e = ucvtf s23, w19, #1 0xff,0xb3,0x03,0x1e = ucvtf s31, wzr, #20 0x0e,0x80,0x03,0x1e = ucvtf s14, w0, #32 0x77,0xfe,0x03,0x9e = ucvtf s23, x19, #1 0xff,0xb3,0x03,0x9e = ucvtf s31, xzr, #20 0x0e,0x00,0x03,0x9e = ucvtf s14, x0, #64 0x77,0xfe,0x43,0x1e = ucvtf d23, w19, #1 0xff,0xb3,0x43,0x1e = ucvtf d31, wzr, #20 0x0e,0x80,0x43,0x1e = ucvtf d14, w0, #32 0x77,0xfe,0x43,0x9e = ucvtf d23, x19, #1 0xff,0xb3,0x43,0x9e = ucvtf d31, xzr, #20 0x0e,0x00,0x43,0x9e = ucvtf d14, x0, #64 0xe3,0x03,0x20,0x1e = fcvtns w3, s31 0x9f,0x01,0x20,0x9e = fcvtns xzr, s12 0x9f,0x01,0x21,0x1e = fcvtnu wzr, s12 0x00,0x00,0x21,0x9e = fcvtnu x0, s0 0x3f,0x01,0x28,0x1e = fcvtps wzr, s9 0x8c,0x02,0x28,0x9e = fcvtps x12, s20 0xfe,0x02,0x29,0x1e = fcvtpu w30, s23 0x7d,0x00,0x29,0x9e = fcvtpu x29, s3 0x62,0x00,0x30,0x1e = fcvtms w2, s3 0xa4,0x00,0x30,0x9e = fcvtms x4, s5 0xe6,0x00,0x31,0x1e = fcvtmu w6, s7 0x28,0x01,0x31,0x9e = fcvtmu x8, s9 0x6a,0x01,0x38,0x1e = fcvtzs w10, s11 0xac,0x01,0x38,0x9e = fcvtzs x12, s13 0xee,0x01,0x39,0x1e = fcvtzu w14, s15 0x0f,0x02,0x39,0x9e = fcvtzu x15, s16 0x51,0x02,0x22,0x1e = scvtf s17, w18 0x93,0x02,0x22,0x9e = scvtf s19, x20 0xd5,0x02,0x23,0x1e = ucvtf s21, w22 0x17,0x03,0x22,0x9e = scvtf s23, x24 0x59,0x03,0x24,0x1e = fcvtas w25, s26 0x9b,0x03,0x24,0x9e = fcvtas x27, s28 0xdd,0x03,0x25,0x1e = fcvtau w29, s30 0x1f,0x00,0x25,0x9e = fcvtau xzr, s0 0xe3,0x03,0x60,0x1e = fcvtns w3, d31 0x9f,0x01,0x60,0x9e = fcvtns xzr, d12 0x9f,0x01,0x61,0x1e = fcvtnu wzr, d12 0x00,0x00,0x61,0x9e = fcvtnu x0, d0 0x3f,0x01,0x68,0x1e = fcvtps wzr, d9 0x8c,0x02,0x68,0x9e = fcvtps x12, d20 0xfe,0x02,0x69,0x1e = fcvtpu w30, d23 0x7d,0x00,0x69,0x9e = fcvtpu x29, d3 0x62,0x00,0x70,0x1e = fcvtms w2, d3 0xa4,0x00,0x70,0x9e = fcvtms x4, d5 0xe6,0x00,0x71,0x1e = fcvtmu w6, d7 0x28,0x01,0x71,0x9e = fcvtmu x8, d9 0x6a,0x01,0x78,0x1e = fcvtzs w10, d11 0xac,0x01,0x78,0x9e = fcvtzs x12, d13 0xee,0x01,0x79,0x1e = fcvtzu w14, d15 0x0f,0x02,0x79,0x9e = fcvtzu x15, d16 0x51,0x02,0x62,0x1e = scvtf d17, w18 0x93,0x02,0x62,0x9e = scvtf d19, x20 0xd5,0x02,0x63,0x1e = ucvtf d21, w22 0x17,0x03,0x63,0x9e = ucvtf d23, x24 0x59,0x03,0x64,0x1e = fcvtas w25, d26 0x9b,0x03,0x64,0x9e = fcvtas x27, d28 0xdd,0x03,0x65,0x1e = fcvtau w29, d30 0x1f,0x00,0x65,0x9e = fcvtau xzr, d0 0x23,0x01,0x26,0x1e = fmov w3, s9 0x69,0x00,0x27,0x1e = fmov s9, w3 0xf4,0x03,0x66,0x9e = fmov x20, d31 0xe1,0x01,0x67,0x9e = fmov d1, x15 0x83,0x01,0xae,0x9e = fmov x3, v12.d[1] 0x61,0x02,0xaf,0x9e = fmov v1.d[1], x19 0xe3,0x03,0xaf,0x9e = fmov v3.d[1], xzr 0x02,0x10,0x28,0x1e = fmov s2, #0.12500000 0x03,0x10,0x2e,0x1e = fmov s3, #1.00000000 0x1e,0x10,0x66,0x1e = fmov d30, #16.00000000 0x04,0x30,0x2e,0x1e = fmov s4, #1.06250000 0x0a,0xf0,0x6f,0x1e = fmov d10, #1.93750000 0x0c,0x10,0x3e,0x1e = fmov s12, #-1.00000000 0x10,0x30,0x64,0x1e = fmov d16, #8.50000000 0xe0,0xff,0x7f,0x18 = ldr w0, #1048572 0x0a,0x00,0x80,0x58 = ldr x10, #-1048576 0x02,0x10,0x28,0x1e = fmov s2, #0.12500000 0x03,0x10,0x2e,0x1e = fmov s3, #1.00000000 0x1e,0x10,0x66,0x1e = fmov d30, #16.00000000 0x04,0x30,0x2e,0x1e = fmov s4, #1.06250000 0x0a,0xf0,0x6f,0x1e = fmov d10, #1.93750000 0x0c,0x10,0x3e,0x1e = fmov s12, #-1.00000000 0x10,0x30,0x64,0x1e = fmov d16, #8.50000000 0x62,0x7c,0x01,0x08 = stxrb w1, w2, [x3] 0x83,0x7c,0x02,0x48 = stxrh w2, w3, [x4] 0xe4,0x7f,0x1f,0x88 = stxr wzr, w4, [sp] 0xe6,0x7c,0x05,0xc8 = stxr w5, x6, [x7] 0x27,0x7d,0x5f,0x08 = ldxrb w7, [x9] 0x5f,0x7d,0x5f,0x48 = ldxrh wzr, [x10] 0xe9,0x7f,0x5f,0x88 = ldxr w9, [sp] 0x6a,0x7d,0x5f,0xc8 = ldxr x10, [x11] 0xcc,0x35,0x2b,0x88 = stxp w11, w12, w13, [x14] 0xf7,0x39,0x3f,0xc8 = stxp wzr, x23, x14, [x15] 0xec,0x7f,0x7f,0x88 = ldxp w12, wzr, [sp] 0xed,0x39,0x7f,0xc8 = ldxp x13, x14, [x15] 0x0f,0xfe,0x0e,0x08 = stlxrb w14, w15, [x16] 0x30,0xfe,0x0f,0x48 = stlxrh w15, w16, [x17] 0xf1,0xff,0x1f,0x88 = stlxr wzr, w17, [sp] 0x93,0xfe,0x12,0xc8 = stlxr w18, x19, [x20] 0xb3,0xfe,0x5f,0x08 = ldaxrb w19, [x21] 0xf4,0xff,0x5f,0x48 = ldaxrh w20, [sp] 0xdf,0xfe,0x5f,0x88 = ldaxr wzr, [x22] 0xf5,0xfe,0x5f,0xc8 = ldaxr x21, [x23] 0x16,0xdf,0x3f,0x88 = stlxp wzr, w22, w23, [x24] 0xfa,0xef,0x39,0xc8 = stlxp w25, x26, x27, [sp] 0xfa,0xff,0x7f,0x88 = ldaxp w26, wzr, [sp] 0xdb,0xf3,0x7f,0xc8 = ldaxp x27, x28, [x30] 0xfb,0xff,0x9f,0x08 = stlrb w27, [sp] 0x1c,0xfc,0x9f,0x48 = stlrh w28, [x0] 0x3f,0xfc,0x9f,0x88 = stlr wzr, [x1] 0x5e,0xfc,0x9f,0xc8 = stlr x30, [x2] 0xfd,0xff,0xdf,0x08 = ldarb w29, [sp] 0x1e,0xfc,0xdf,0x48 = ldarh w30, [x0] 0x3f,0xfc,0xdf,0x88 = ldar wzr, [x1] 0x41,0xfc,0xdf,0xc8 = ldar x1, [x2] 0x16,0xdf,0x3f,0x88 = stlxp wzr, w22, w23, [x24] 0xe9,0x03,0x00,0x38 = sturb w9, [sp] 0x9f,0xf1,0x0f,0x78 = sturh wzr, [x12, #255] 0x10,0x00,0x10,0xb8 = stur w16, [x0, #-256] 0xdc,0x11,0x00,0xf8 = stur x28, [x14, #1] 0x81,0xf2,0x4f,0x38 = ldurb w1, [x20, #255] 0x34,0xf0,0x4f,0x78 = ldurh w20, [x1, #255] 0xec,0xf3,0x4f,0xb8 = ldur w12, [sp, #255] 0x9f,0xf1,0x4f,0xf8 = ldur xzr, [x12, #255] 0xe9,0x00,0x90,0x38 = ldursb x9, [x7, #-256] 0x71,0x02,0x90,0x78 = ldursh x17, [x19, #-256] 0xf4,0x01,0x90,0xb8 = ldursw x20, [x15, #-256] 0x4d,0x00,0x80,0xb8 = ldursw x13, [x2] 0xe2,0x03,0x90,0xf8 = prfum pldl2keep, [sp, #-256] 0x33,0x00,0xd0,0x38 = ldursb w19, [x1, #-256] 0xaf,0x02,0xd0,0x78 = ldursh w15, [x21, #-256] 0xe0,0x13,0x00,0x3c = stur b0, [sp, #1] 0x8c,0xf1,0x1f,0x7c = stur h12, [x12, #-1] 0x0f,0xf0,0x0f,0xbc = stur s15, [x0, #255] 0xbf,0x90,0x01,0xfc = stur d31, [x5, #25] 0xa9,0x00,0x80,0x3c = stur q9, [x5] 0xe3,0x03,0x40,0x3c = ldur b3, [sp] 0x85,0x00,0x50,0x7c = ldur h5, [x4, #-256] 0x87,0xf1,0x5f,0xbc = ldur s7, [x12, #-1] 0x6b,0x42,0x40,0xfc = ldur d11, [x19, #4] 0x2d,0x20,0xc0,0x3c = ldur q13, [x1, #2] 0x00,0x00,0x40,0xf9 = ldr x0, [x0] 0xa4,0x03,0x40,0xf9 = ldr x4, [x29] 0x9e,0xfd,0x7f,0xf9 = ldr x30, [x12, #32760] 0xf4,0x07,0x40,0xf9 = ldr x20, [sp, #8] 0xff,0x03,0x40,0xf9 = ldr xzr, [sp] 0xe2,0x03,0x40,0xb9 = ldr w2, [sp] 0xf1,0xff,0x7f,0xb9 = ldr w17, [sp, #16380] 0x4d,0x04,0x40,0xb9 = ldr w13, [x2, #4] 0xa2,0x04,0x80,0xb9 = ldrsw x2, [x5, #4] 0xf7,0xff,0xbf,0xb9 = ldrsw x23, [sp, #16380] 0x82,0x00,0x40,0x79 = ldrh w2, [x4] 0xd7,0xfc,0xff,0x79 = ldrsh w23, [x6, #8190] 0xff,0x07,0xc0,0x79 = ldrsh wzr, [sp, #2] 0x5d,0x04,0x80,0x79 = ldrsh x29, [x2, #2] 0x7a,0xe4,0x41,0x39 = ldrb w26, [x3, #121] 0x4c,0x00,0x40,0x39 = ldrb w12, [x2] 0xfb,0xff,0xff,0x39 = ldrsb w27, [sp, #4095] 0xff,0x01,0x80,0x39 = ldrsb xzr, [x15] 0xfe,0x03,0x00,0xf9 = str x30, [sp] 0x94,0xfc,0x3f,0xb9 = str w20, [x4, #16380] 0x54,0x1d,0x00,0x79 = strh w20, [x10, #14] 0xf1,0xff,0x3f,0x79 = strh w17, [sp, #8190] 0x77,0xfc,0x3f,0x39 = strb w23, [x3, #4095] 0x5f,0x00,0x00,0x39 = strb wzr, [x2] 0xe0,0x07,0x80,0xf9 = prfm pldl1keep, [sp, #8] 0x61,0x00,0x80,0xf9 = prfm pldl1strm, [x3, #0] 0xa2,0x08,0x80,0xf9 = prfm pldl2keep, [x5, #16] 0x43,0x00,0x80,0xf9 = prfm pldl2strm, [x2, #0] 0xa4,0x00,0x80,0xf9 = prfm pldl3keep, [x5, #0] 0xc5,0x00,0x80,0xf9 = prfm pldl3strm, [x6, #0] 0xe8,0x07,0x80,0xf9 = prfm plil1keep, [sp, #8] 0x69,0x00,0x80,0xf9 = prfm plil1strm, [x3, #0] 0xaa,0x08,0x80,0xf9 = prfm plil2keep, [x5, #16] 0x4b,0x00,0x80,0xf9 = prfm plil2strm, [x2, #0] 0xac,0x00,0x80,0xf9 = prfm plil3keep, [x5, #0] 0xcd,0x00,0x80,0xf9 = prfm plil3strm, [x6, #0] 0xf0,0x07,0x80,0xf9 = prfm pstl1keep, [sp, #8] 0x71,0x00,0x80,0xf9 = prfm pstl1strm, [x3, #0] 0xb2,0x08,0x80,0xf9 = prfm pstl2keep, [x5, #16] 0x53,0x00,0x80,0xf9 = prfm pstl2strm, [x2, #0] 0xb4,0x00,0x80,0xf9 = prfm pstl3keep, [x5, #0] 0xd5,0x00,0x80,0xf9 = prfm pstl3strm, [x6, #0] 0xef,0x03,0x80,0xf9 = prfm #15, [sp, #0] 0xff,0xff,0x7f,0x3d = ldr b31, [sp, #4095] 0x54,0xfc,0x7f,0x7d = ldr h20, [x2, #8190] 0x6a,0xfe,0x7f,0xbd = ldr s10, [x19, #16380] 0x43,0xfd,0x7f,0xfd = ldr d3, [x10, #32760] 0xec,0xff,0xbf,0x3d = str q12, [sp, #65520] 0xe3,0x6b,0x65,0x38 = ldrb w3, [sp, x5] 0x69,0x7b,0x66,0x38 = ldrb w9, [x27, x6, lsl #0] 0xca,0x6b,0xe7,0x38 = ldrsb w10, [x30, x7] 0xab,0xeb,0x63,0x38 = ldrb w11, [x29, x3, sxtx] 0x8c,0xfb,0x3f,0x38 = strb w12, [x28, xzr, sxtx #0] 0x4e,0x4b,0x66,0x38 = ldrb w14, [x26, w6, uxtw] 0x2f,0x5b,0xe7,0x38 = ldrsb w15, [x25, w7, uxtw #0] 0xf1,0xca,0x69,0x38 = ldrb w17, [x23, w9, sxtw] 0xd2,0xda,0xaa,0x38 = ldrsb x18, [x22, w10, sxtw #0] 0xe3,0x6b,0xe5,0x78 = ldrsh w3, [sp, x5] 0x69,0x6b,0xe6,0x78 = ldrsh w9, [x27, x6] 0xca,0x7b,0x67,0x78 = ldrh w10, [x30, x7, lsl #1] 0xab,0xeb,0x23,0x78 = strh w11, [x29, x3, sxtx] 0x8c,0xeb,0x7f,0x78 = ldrh w12, [x28, xzr, sxtx] 0x6d,0xfb,0xa5,0x78 = ldrsh x13, [x27, x5, sxtx #1] 0x4e,0x4b,0x66,0x78 = ldrh w14, [x26, w6, uxtw] 0x2f,0x4b,0x67,0x78 = ldrh w15, [x25, w7, uxtw] 0x10,0x5b,0xe8,0x78 = ldrsh w16, [x24, w8, uxtw #1] 0xf1,0xca,0x69,0x78 = ldrh w17, [x23, w9, sxtw] 0xd2,0xca,0x6a,0x78 = ldrh w18, [x22, w10, sxtw] 0xb3,0xda,0x3f,0x78 = strh w19, [x21, wzr, sxtw #1] 0xe3,0x6b,0x65,0xb8 = ldr w3, [sp, x5] 0x69,0x6b,0x66,0xbc = ldr s9, [x27, x6] 0xca,0x7b,0x67,0xb8 = ldr w10, [x30, x7, lsl #2] 0xab,0xeb,0x63,0xb8 = ldr w11, [x29, x3, sxtx] 0x8c,0xeb,0x3f,0xbc = str s12, [x28, xzr, sxtx] 0x6d,0xfb,0x25,0xb8 = str w13, [x27, x5, sxtx #2] 0x4e,0x4b,0x26,0xb8 = str w14, [x26, w6, uxtw] 0x2f,0x4b,0x67,0xb8 = ldr w15, [x25, w7, uxtw] 0x10,0x5b,0x68,0xb8 = ldr w16, [x24, w8, uxtw #2] 0xf1,0xca,0xa9,0xb8 = ldrsw x17, [x23, w9, sxtw] 0xd2,0xca,0x6a,0xb8 = ldr w18, [x22, w10, sxtw] 0xb3,0xda,0xbf,0xb8 = ldrsw x19, [x21, wzr, sxtw #2] 0xe3,0x6b,0x65,0xf8 = ldr x3, [sp, x5] 0x69,0x6b,0x26,0xf8 = str x9, [x27, x6] 0xca,0x7b,0x67,0xfc = ldr d10, [x30, x7, lsl #3] 0xab,0xeb,0x23,0xf8 = str x11, [x29, x3, sxtx] 0x8c,0xeb,0x7f,0xf8 = ldr x12, [x28, xzr, sxtx] 0x6d,0xfb,0x65,0xf8 = ldr x13, [x27, x5, sxtx #3] 0x40,0x4b,0xa6,0xf8 = prfm pldl1keep, [x26, w6, uxtw] 0x2f,0x4b,0x67,0xf8 = ldr x15, [x25, w7, uxtw] 0x10,0x5b,0x68,0xf8 = ldr x16, [x24, w8, uxtw #3] 0xf1,0xca,0x69,0xf8 = ldr x17, [x23, w9, sxtw] 0xd2,0xca,0x6a,0xf8 = ldr x18, [x22, w10, sxtw] 0xb3,0xda,0x3f,0xfc = str d19, [x21, wzr, sxtw #3] 0x06,0x68,0xa5,0xf8 = prfm #6, [x0, x5, lsl #0] 0xe3,0x6b,0xe5,0x3c = ldr q3, [sp, x5] 0x69,0x6b,0xe6,0x3c = ldr q9, [x27, x6] 0xca,0x7b,0xe7,0x3c = ldr q10, [x30, x7, lsl #4] 0xab,0xeb,0xa3,0x3c = str q11, [x29, x3, sxtx] 0x8c,0xeb,0xbf,0x3c = str q12, [x28, xzr, sxtx] 0x6d,0xfb,0xa5,0x3c = str q13, [x27, x5, sxtx #4] 0x4e,0x4b,0xe6,0x3c = ldr q14, [x26, w6, uxtw] 0x2f,0x4b,0xe7,0x3c = ldr q15, [x25, w7, uxtw] 0x10,0x5b,0xe8,0x3c = ldr q16, [x24, w8, uxtw #4] 0xf1,0xca,0xe9,0x3c = ldr q17, [x23, w9, sxtw] 0xd2,0xca,0xaa,0x3c = str q18, [x22, w10, sxtw] 0xb3,0xda,0xff,0x3c = ldr q19, [x21, wzr, sxtw #4] 0x49,0xf4,0x0f,0x38 = strb w9, [x2], #255 0x6a,0x14,0x00,0x38 = strb w10, [x3], #1 0x6a,0x04,0x10,0x38 = strb w10, [x3], #-256 0x49,0xf4,0x0f,0x78 = strh w9, [x2], #255 0x49,0x14,0x00,0x78 = strh w9, [x2], #1 0x6a,0x04,0x10,0x78 = strh w10, [x3], #-256 0xf3,0xf7,0x0f,0xb8 = str w19, [sp], #255 0xd4,0x17,0x00,0xb8 = str w20, [x30], #1 0x95,0x05,0x10,0xb8 = str w21, [x12], #-256 0x3f,0xf5,0x0f,0xf8 = str xzr, [x9], #255 0x62,0x14,0x00,0xf8 = str x2, [x3], #1 0x93,0x05,0x10,0xf8 = str x19, [x12], #-256 0x49,0xf4,0x4f,0x38 = ldrb w9, [x2], #255 0x6a,0x14,0x40,0x38 = ldrb w10, [x3], #1 0x6a,0x04,0x50,0x38 = ldrb w10, [x3], #-256 0x49,0xf4,0x4f,0x78 = ldrh w9, [x2], #255 0x49,0x14,0x40,0x78 = ldrh w9, [x2], #1 0x6a,0x04,0x50,0x78 = ldrh w10, [x3], #-256 0xf3,0xf7,0x4f,0xb8 = ldr w19, [sp], #255 0xd4,0x17,0x40,0xb8 = ldr w20, [x30], #1 0x95,0x05,0x50,0xb8 = ldr w21, [x12], #-256 0x3f,0xf5,0x4f,0xf8 = ldr xzr, [x9], #255 0x62,0x14,0x40,0xf8 = ldr x2, [x3], #1 0x93,0x05,0x50,0xf8 = ldr x19, [x12], #-256 0x3f,0xf5,0x8f,0x38 = ldrsb xzr, [x9], #255 0x62,0x14,0x80,0x38 = ldrsb x2, [x3], #1 0x93,0x05,0x90,0x38 = ldrsb x19, [x12], #-256 0x3f,0xf5,0x8f,0x78 = ldrsh xzr, [x9], #255 0x62,0x14,0x80,0x78 = ldrsh x2, [x3], #1 0x93,0x05,0x90,0x78 = ldrsh x19, [x12], #-256 0x3f,0xf5,0x8f,0xb8 = ldrsw xzr, [x9], #255 0x62,0x14,0x80,0xb8 = ldrsw x2, [x3], #1 0x93,0x05,0x90,0xb8 = ldrsw x19, [x12], #-256 0x3f,0xf5,0xcf,0x38 = ldrsb wzr, [x9], #255 0x62,0x14,0xc0,0x38 = ldrsb w2, [x3], #1 0x93,0x05,0xd0,0x38 = ldrsb w19, [x12], #-256 0x3f,0xf5,0xcf,0x78 = ldrsh wzr, [x9], #255 0x62,0x14,0xc0,0x78 = ldrsh w2, [x3], #1 0x93,0x05,0xd0,0x78 = ldrsh w19, [x12], #-256 0x00,0xf4,0x0f,0x3c = str b0, [x0], #255 0x63,0x14,0x00,0x3c = str b3, [x3], #1 0xe5,0x07,0x10,0x3c = str b5, [sp], #-256 0x4a,0xf5,0x0f,0x7c = str h10, [x10], #255 0xed,0x16,0x00,0x7c = str h13, [x23], #1 0xef,0x07,0x10,0x7c = str h15, [sp], #-256 0x94,0xf6,0x0f,0xbc = str s20, [x20], #255 0xf7,0x16,0x00,0xbc = str s23, [x23], #1 0x19,0x04,0x10,0xbc = str s25, [x0], #-256 0x94,0xf6,0x0f,0xfc = str d20, [x20], #255 0xf7,0x16,0x00,0xfc = str d23, [x23], #1 0x19,0x04,0x10,0xfc = str d25, [x0], #-256 0x00,0xf4,0x4f,0x3c = ldr b0, [x0], #255 0x63,0x14,0x40,0x3c = ldr b3, [x3], #1 0xe5,0x07,0x50,0x3c = ldr b5, [sp], #-256 0x4a,0xf5,0x4f,0x7c = ldr h10, [x10], #255 0xed,0x16,0x40,0x7c = ldr h13, [x23], #1 0xef,0x07,0x50,0x7c = ldr h15, [sp], #-256 0x94,0xf6,0x4f,0xbc = ldr s20, [x20], #255 0xf7,0x16,0x40,0xbc = ldr s23, [x23], #1 0x19,0x04,0x50,0xbc = ldr s25, [x0], #-256 0x94,0xf6,0x4f,0xfc = ldr d20, [x20], #255 0xf7,0x16,0x40,0xfc = ldr d23, [x23], #1 0x19,0x04,0x50,0xfc = ldr d25, [x0], #-256 0x34,0xf4,0xcf,0x3c = ldr q20, [x1], #255 0x37,0x15,0xc0,0x3c = ldr q23, [x9], #1 0x99,0x06,0xd0,0x3c = ldr q25, [x20], #-256 0x2a,0xf4,0x8f,0x3c = str q10, [x1], #255 0xf6,0x17,0x80,0x3c = str q22, [sp], #1 0x95,0x06,0x90,0x3c = str q21, [x20], #-256 0x83,0x0c,0x40,0xf8 = ldr x3, [x4, #0]! 0xff,0x0f,0x40,0xf8 = ldr xzr, [sp, #0]! 0x49,0xfc,0x0f,0x38 = strb w9, [x2, #255]! 0x6a,0x1c,0x00,0x38 = strb w10, [x3, #1]! 0x6a,0x0c,0x10,0x38 = strb w10, [x3, #-256]! 0x49,0xfc,0x0f,0x78 = strh w9, [x2, #255]! 0x49,0x1c,0x00,0x78 = strh w9, [x2, #1]! 0x6a,0x0c,0x10,0x78 = strh w10, [x3, #-256]! 0xf3,0xff,0x0f,0xb8 = str w19, [sp, #255]! 0xd4,0x1f,0x00,0xb8 = str w20, [x30, #1]! 0x95,0x0d,0x10,0xb8 = str w21, [x12, #-256]! 0x3f,0xfd,0x0f,0xf8 = str xzr, [x9, #255]! 0x62,0x1c,0x00,0xf8 = str x2, [x3, #1]! 0x93,0x0d,0x10,0xf8 = str x19, [x12, #-256]! 0x49,0xfc,0x4f,0x38 = ldrb w9, [x2, #255]! 0x6a,0x1c,0x40,0x38 = ldrb w10, [x3, #1]! 0x6a,0x0c,0x50,0x38 = ldrb w10, [x3, #-256]! 0x49,0xfc,0x4f,0x78 = ldrh w9, [x2, #255]! 0x49,0x1c,0x40,0x78 = ldrh w9, [x2, #1]! 0x6a,0x0c,0x50,0x78 = ldrh w10, [x3, #-256]! 0xf3,0xff,0x4f,0xb8 = ldr w19, [sp, #255]! 0xd4,0x1f,0x40,0xb8 = ldr w20, [x30, #1]! 0x95,0x0d,0x50,0xb8 = ldr w21, [x12, #-256]! 0x3f,0xfd,0x4f,0xf8 = ldr xzr, [x9, #255]! 0x62,0x1c,0x40,0xf8 = ldr x2, [x3, #1]! 0x93,0x0d,0x50,0xf8 = ldr x19, [x12, #-256]! 0x3f,0xfd,0x8f,0x38 = ldrsb xzr, [x9, #255]! 0x62,0x1c,0x80,0x38 = ldrsb x2, [x3, #1]! 0x93,0x0d,0x90,0x38 = ldrsb x19, [x12, #-256]! 0x3f,0xfd,0x8f,0x78 = ldrsh xzr, [x9, #255]! 0x62,0x1c,0x80,0x78 = ldrsh x2, [x3, #1]! 0x93,0x0d,0x90,0x78 = ldrsh x19, [x12, #-256]! 0x3f,0xfd,0x8f,0xb8 = ldrsw xzr, [x9, #255]! 0x62,0x1c,0x80,0xb8 = ldrsw x2, [x3, #1]! 0x93,0x0d,0x90,0xb8 = ldrsw x19, [x12, #-256]! 0x3f,0xfd,0xcf,0x38 = ldrsb wzr, [x9, #255]! 0x62,0x1c,0xc0,0x38 = ldrsb w2, [x3, #1]! 0x93,0x0d,0xd0,0x38 = ldrsb w19, [x12, #-256]! 0x3f,0xfd,0xcf,0x78 = ldrsh wzr, [x9, #255]! 0x62,0x1c,0xc0,0x78 = ldrsh w2, [x3, #1]! 0x93,0x0d,0xd0,0x78 = ldrsh w19, [x12, #-256]! 0x00,0xfc,0x0f,0x3c = str b0, [x0, #255]! 0x63,0x1c,0x00,0x3c = str b3, [x3, #1]! 0xe5,0x0f,0x10,0x3c = str b5, [sp, #-256]! 0x4a,0xfd,0x0f,0x7c = str h10, [x10, #255]! 0xed,0x1e,0x00,0x7c = str h13, [x23, #1]! 0xef,0x0f,0x10,0x7c = str h15, [sp, #-256]! 0x94,0xfe,0x0f,0xbc = str s20, [x20, #255]! 0xf7,0x1e,0x00,0xbc = str s23, [x23, #1]! 0x19,0x0c,0x10,0xbc = str s25, [x0, #-256]! 0x94,0xfe,0x0f,0xfc = str d20, [x20, #255]! 0xf7,0x1e,0x00,0xfc = str d23, [x23, #1]! 0x19,0x0c,0x10,0xfc = str d25, [x0, #-256]! 0x00,0xfc,0x4f,0x3c = ldr b0, [x0, #255]! 0x63,0x1c,0x40,0x3c = ldr b3, [x3, #1]! 0xe5,0x0f,0x50,0x3c = ldr b5, [sp, #-256]! 0x4a,0xfd,0x4f,0x7c = ldr h10, [x10, #255]! 0xed,0x1e,0x40,0x7c = ldr h13, [x23, #1]! 0xef,0x0f,0x50,0x7c = ldr h15, [sp, #-256]! 0x94,0xfe,0x4f,0xbc = ldr s20, [x20, #255]! 0xf7,0x1e,0x40,0xbc = ldr s23, [x23, #1]! 0x19,0x0c,0x50,0xbc = ldr s25, [x0, #-256]! 0x94,0xfe,0x4f,0xfc = ldr d20, [x20, #255]! 0xf7,0x1e,0x40,0xfc = ldr d23, [x23, #1]! 0x19,0x0c,0x50,0xfc = ldr d25, [x0, #-256]! 0x34,0xfc,0xcf,0x3c = ldr q20, [x1, #255]! 0x37,0x1d,0xc0,0x3c = ldr q23, [x9, #1]! 0x99,0x0e,0xd0,0x3c = ldr q25, [x20, #-256]! 0x2a,0xfc,0x8f,0x3c = str q10, [x1, #255]! 0xf6,0x1f,0x80,0x3c = str q22, [sp, #1]! 0x95,0x0e,0x90,0x3c = str q21, [x20, #-256]! 0xe9,0x0b,0x00,0x38 = sttrb w9, [sp] 0x9f,0xf9,0x0f,0x78 = sttrh wzr, [x12, #255] 0x10,0x08,0x10,0xb8 = sttr w16, [x0, #-256] 0xdc,0x19,0x00,0xf8 = sttr x28, [x14, #1] 0x81,0xfa,0x4f,0x38 = ldtrb w1, [x20, #255] 0x34,0xf8,0x4f,0x78 = ldtrh w20, [x1, #255] 0xec,0xfb,0x4f,0xb8 = ldtr w12, [sp, #255] 0x9f,0xf9,0x4f,0xf8 = ldtr xzr, [x12, #255] 0xe9,0x08,0x90,0x38 = ldtrsb x9, [x7, #-256] 0x71,0x0a,0x90,0x78 = ldtrsh x17, [x19, #-256] 0xf4,0x09,0x90,0xb8 = ldtrsw x20, [x15, #-256] 0x33,0x08,0xd0,0x38 = ldtrsb w19, [x1, #-256] 0xaf,0x0a,0xd0,0x78 = ldtrsh w15, [x21, #-256] 0xe3,0x17,0x40,0x29 = ldp w3, w5, [sp] 0xff,0xa7,0x1f,0x29 = stp wzr, w9, [sp, #252] 0xe2,0x7f,0x60,0x29 = ldp w2, wzr, [sp, #-256] 0xe9,0xab,0x40,0x29 = ldp w9, w10, [sp, #4] 0xe9,0xab,0x40,0x69 = ldpsw x9, x10, [sp, #4] 0x49,0x28,0x60,0x69 = ldpsw x9, x10, [x2, #-256] 0xf4,0xfb,0x5f,0x69 = ldpsw x20, x30, [sp, #252] 0x55,0xf4,0x5f,0xa9 = ldp x21, x29, [x2, #504] 0x76,0x5c,0x60,0xa9 = ldp x22, x23, [x3, #-512] 0x98,0xe4,0x40,0xa9 = ldp x24, x25, [x4, #8] 0xfd,0xf3,0x5f,0x2d = ldp s29, s28, [sp, #252] 0xfb,0x6b,0x20,0x2d = stp s27, s26, [sp, #-256] 0x61,0x88,0x45,0x2d = ldp s1, s2, [x3, #44] 0x23,0x95,0x1f,0x6d = stp d3, d5, [x9, #504] 0x47,0x2d,0x20,0x6d = stp d7, d11, [x10, #-512] 0xc2,0x8f,0x7f,0x6d = ldp d2, d3, [x30, #-8] 0xe3,0x17,0x00,0xad = stp q3, q5, [sp] 0xf1,0xcf,0x1f,0xad = stp q17, q19, [sp, #1008] 0x37,0x74,0x60,0xad = ldp q23, q29, [x1, #-1024] 0xe3,0x17,0xc0,0x28 = ldp w3, w5, [sp], #0 0xff,0xa7,0x9f,0x28 = stp wzr, w9, [sp], #252 0xe2,0x7f,0xe0,0x28 = ldp w2, wzr, [sp], #-256 0xe9,0xab,0xc0,0x28 = ldp w9, w10, [sp], #4 0xe9,0xab,0xc0,0x68 = ldpsw x9, x10, [sp], #4 0x49,0x28,0xe0,0x68 = ldpsw x9, x10, [x2], #-256 0xf4,0xfb,0xdf,0x68 = ldpsw x20, x30, [sp], #252 0x55,0xf4,0xdf,0xa8 = ldp x21, x29, [x2], #504 0x76,0x5c,0xe0,0xa8 = ldp x22, x23, [x3], #-512 0x98,0xe4,0xc0,0xa8 = ldp x24, x25, [x4], #8 0xfd,0xf3,0xdf,0x2c = ldp s29, s28, [sp], #252 0xfb,0x6b,0xa0,0x2c = stp s27, s26, [sp], #-256 0x61,0x88,0xc5,0x2c = ldp s1, s2, [x3], #44 0x23,0x95,0x9f,0x6c = stp d3, d5, [x9], #504 0x47,0x2d,0xa0,0x6c = stp d7, d11, [x10], #-512 0xc2,0x8f,0xff,0x6c = ldp d2, d3, [x30], #-8 0xe3,0x17,0x80,0xac = stp q3, q5, [sp], #0 0xf1,0xcf,0x9f,0xac = stp q17, q19, [sp], #1008 0x37,0x74,0xe0,0xac = ldp q23, q29, [x1], #-1024 0xe3,0x17,0xc0,0x29 = ldp w3, w5, [sp, #0]! 0xff,0xa7,0x9f,0x29 = stp wzr, w9, [sp, #252]! 0xe2,0x7f,0xe0,0x29 = ldp w2, wzr, [sp, #-256]! 0xe9,0xab,0xc0,0x29 = ldp w9, w10, [sp, #4]! 0xe9,0xab,0xc0,0x69 = ldpsw x9, x10, [sp, #4]! 0x49,0x28,0xe0,0x69 = ldpsw x9, x10, [x2, #-256]! 0xf4,0xfb,0xdf,0x69 = ldpsw x20, x30, [sp, #252]! 0x55,0xf4,0xdf,0xa9 = ldp x21, x29, [x2, #504]! 0x76,0x5c,0xe0,0xa9 = ldp x22, x23, [x3, #-512]! 0x98,0xe4,0xc0,0xa9 = ldp x24, x25, [x4, #8]! 0xfd,0xf3,0xdf,0x2d = ldp s29, s28, [sp, #252]! 0xfb,0x6b,0xa0,0x2d = stp s27, s26, [sp, #-256]! 0x61,0x88,0xc5,0x2d = ldp s1, s2, [x3, #44]! 0x23,0x95,0x9f,0x6d = stp d3, d5, [x9, #504]! 0x47,0x2d,0xa0,0x6d = stp d7, d11, [x10, #-512]! 0xc2,0x8f,0xff,0x6d = ldp d2, d3, [x30, #-8]! 0xe3,0x17,0x80,0xad = stp q3, q5, [sp, #0]! 0xf1,0xcf,0x9f,0xad = stp q17, q19, [sp, #1008]! 0x37,0x74,0xe0,0xad = ldp q23, q29, [x1, #-1024]! 0xe3,0x17,0x40,0x28 = ldnp w3, w5, [sp] 0xff,0xa7,0x1f,0x28 = stnp wzr, w9, [sp, #252] 0xe2,0x7f,0x60,0x28 = ldnp w2, wzr, [sp, #-256] 0xe9,0xab,0x40,0x28 = ldnp w9, w10, [sp, #4] 0x55,0xf4,0x5f,0xa8 = ldnp x21, x29, [x2, #504] 0x76,0x5c,0x60,0xa8 = ldnp x22, x23, [x3, #-512] 0x98,0xe4,0x40,0xa8 = ldnp x24, x25, [x4, #8] 0xfd,0xf3,0x5f,0x2c = ldnp s29, s28, [sp, #252] 0xfb,0x6b,0x20,0x2c = stnp s27, s26, [sp, #-256] 0x61,0x88,0x45,0x2c = ldnp s1, s2, [x3, #44] 0x23,0x95,0x1f,0x6c = stnp d3, d5, [x9, #504] 0x47,0x2d,0x20,0x6c = stnp d7, d11, [x10, #-512] 0xc2,0x8f,0x7f,0x6c = ldnp d2, d3, [x30, #-8] 0xe3,0x17,0x00,0xac = stnp q3, q5, [sp] 0xf1,0xcf,0x1f,0xac = stnp q17, q19, [sp, #1008] 0x37,0x74,0x60,0xac = ldnp q23, q29, [x1, #-1024] 0x23,0x3d,0x10,0x32 = orr w3, w9, #0xffff0000 0x5f,0x29,0x03,0x32 = orr wsp, w10, #0xe00000ff 0x49,0x25,0x00,0x32 = orr w9, w10, #0x3ff 0xee,0x81,0x01,0x12 = and w14, w15, #0x80008000 0xac,0xad,0x0a,0x12 = and w12, w13, #0xffc3ffc3 0xeb,0x87,0x00,0x12 = and w11, wzr, #0x30003 0xc3,0xc8,0x03,0x52 = eor w3, w6, #0xe0e0e0e0 0xff,0xc7,0x00,0x52 = eor wsp, wzr, #0x3030303 0x30,0xc6,0x01,0x52 = eor w16, w17, #0x81818181 0x5f,0xe6,0x02,0x72 = ands wzr, w18, #0xcccccccc 0x93,0xe6,0x00,0x72 = ands w19, w20, #0x33333333 0xd5,0xe6,0x01,0x72 = ands w21, w22, #0x99999999 0x7f,0xf0,0x01,0x72 = ands wzr, w3, #0xaaaaaaaa 0xff,0xf3,0x00,0x72 = ands wzr, wzr, #0x55555555 0xa3,0x84,0x66,0xd2 = eor x3, x5, #0xffffffffc000000 0x49,0xb9,0x40,0x92 = and x9, x10, #0x7fffffffffff 0x8b,0x31,0x41,0xb2 = orr x11, x12, #0x8000000000000fff 0x23,0x3d,0x10,0xb2 = orr x3, x9, #0xffff0000ffff0000 0x5f,0x29,0x03,0xb2 = orr sp, x10, #0xe00000ffe00000ff 0x49,0x25,0x00,0xb2 = orr x9, x10, #0x3ff000003ff 0xee,0x81,0x01,0x92 = and x14, x15, #0x8000800080008000 0xac,0xad,0x0a,0x92 = and x12, x13, #0xffc3ffc3ffc3ffc3 0xeb,0x87,0x00,0x92 = and x11, xzr, #0x3000300030003 0xc3,0xc8,0x03,0xd2 = eor x3, x6, #0xe0e0e0e0e0e0e0e0 0xff,0xc7,0x00,0xd2 = eor sp, xzr, #0x303030303030303 0x30,0xc6,0x01,0xd2 = eor x16, x17, #0x8181818181818181 0x5f,0xe6,0x02,0xf2 = ands xzr, x18, #0xcccccccccccccccc 0x93,0xe6,0x00,0xf2 = ands x19, x20, #0x3333333333333333 0xd5,0xe6,0x01,0xf2 = ands x21, x22, #0x9999999999999999 0x7f,0xf0,0x01,0xf2 = ands xzr, x3, #0xaaaaaaaaaaaaaaaa 0xff,0xf3,0x00,0xf2 = ands xzr, xzr, #0x5555555555555555 0xe3,0x8f,0x00,0x32 = orr w3, wzr, #0xf000f 0xea,0xf3,0x01,0xb2 = orr x10, xzr, #0xaaaaaaaaaaaaaaaa 0xec,0x02,0x15,0x0a = and w12, w23, w21 0xf0,0x05,0x01,0x0a = and w16, w15, w1, lsl #1 0x89,0x7c,0x0a,0x0a = and w9, w4, w10, lsl #31 0xc3,0x03,0x0b,0x0a = and w3, w30, w11 0xa3,0xfc,0x07,0x8a = and x3, x5, x7, lsl #63 0xc5,0x11,0x93,0x8a = and x5, x14, x19, asr #4 0x23,0x7e,0xd3,0x0a = and w3, w17, w19, ror #31 0x40,0x44,0x5f,0x0a = and w0, w2, wzr, lsr #17 0xc3,0x03,0x8b,0x0a = and w3, w30, w11, asr #0 0x9f,0x00,0x1a,0x8a = and xzr, x4, x26 0xe3,0x03,0xd4,0x0a = and w3, wzr, w20, ror #0 0x87,0xfe,0x9f,0x8a = and x7, x20, xzr, asr #63 0x8d,0xbe,0x2e,0x8a = bic x13, x20, x14, lsl #47 0xe2,0x00,0x29,0x0a = bic w2, w7, w9 0xe2,0x7c,0x80,0x2a = orr w2, w7, w0, asr #31 0x28,0x31,0x0a,0xaa = orr x8, x9, x10, lsl #12 0xa3,0x00,0xa7,0xaa = orn x3, x5, x7, asr #0 0xa2,0x00,0x3d,0x2a = orn w2, w5, w29 0xe7,0x07,0x09,0x6a = ands w7, wzr, w9, lsl #1 0xa3,0xfc,0xd4,0xea = ands x3, x5, x20, ror #63 0xa3,0x00,0x27,0x6a = bics w3, w5, w7 0xe3,0x07,0x23,0xea = bics x3, xzr, x3, lsl #1 0x7f,0x7c,0x07,0x6a = tst w3, w7, lsl #31 0x5f,0x00,0x94,0xea = tst x2, x20, asr #0 0xe3,0x03,0x06,0xaa = mov x3, x6 0xe3,0x03,0x1f,0xaa = mov x3, xzr 0xff,0x03,0x02,0x2a = mov wzr, w2 0xe3,0x03,0x05,0x2a = mov w3, w5 0xe1,0xff,0x9f,0x52 = movz w1, #65535 0x02,0x00,0xa0,0x52 = movz w2, #0, lsl #16 0x42,0x9a,0x80,0x12 = movn w2, #1234 0x42,0x9a,0xc0,0xd2 = movz x2, #1234, lsl #32 0x3f,0x1c,0xe2,0xf2 = movk xzr, #4321, lsl #48 0x1e,0x00,0x00,0xb0 = adrp x30, #4096 0x14,0x00,0x00,0x10 = adr x20, #0 0xe9,0xff,0xff,0x70 = adr x9, #-1 0xe5,0xff,0x7f,0x70 = adr x5, #1048575 0xe9,0xff,0x7f,0x70 = adr x9, #1048575 0x02,0x00,0x80,0x10 = adr x2, #-1048576 0xe9,0xff,0x7f,0xf0 = adrp x9, #4294963200 0x14,0x00,0x80,0x90 = adrp x20, #-4294967296 0x1f,0x20,0x03,0xd5 = nop 0xff,0x2f,0x03,0xd5 = hint #127 0x1f,0x20,0x03,0xd5 = nop 0x3f,0x20,0x03,0xd5 = yield 0x5f,0x20,0x03,0xd5 = wfe 0x7f,0x20,0x03,0xd5 = wfi 0x9f,0x20,0x03,0xd5 = sev 0xbf,0x20,0x03,0xd5 = sevl 0x5f,0x3f,0x03,0xd5 = clrex 0x5f,0x30,0x03,0xd5 = clrex #0 0x5f,0x37,0x03,0xd5 = clrex #7 0x5f,0x3f,0x03,0xd5 = clrex 0x9f,0x30,0x03,0xd5 = dsb #0 0x9f,0x3c,0x03,0xd5 = dsb #12 0x9f,0x3f,0x03,0xd5 = dsb sy 0x9f,0x31,0x03,0xd5 = dsb oshld 0x9f,0x32,0x03,0xd5 = dsb oshst 0x9f,0x33,0x03,0xd5 = dsb osh 0x9f,0x35,0x03,0xd5 = dsb nshld 0x9f,0x36,0x03,0xd5 = dsb nshst 0x9f,0x37,0x03,0xd5 = dsb nsh 0x9f,0x39,0x03,0xd5 = dsb ishld 0x9f,0x3a,0x03,0xd5 = dsb ishst 0x9f,0x3b,0x03,0xd5 = dsb ish 0x9f,0x3d,0x03,0xd5 = dsb ld 0x9f,0x3e,0x03,0xd5 = dsb st 0x9f,0x3f,0x03,0xd5 = dsb sy 0xbf,0x30,0x03,0xd5 = dmb #0 0xbf,0x3c,0x03,0xd5 = dmb #12 0xbf,0x3f,0x03,0xd5 = dmb sy 0xbf,0x31,0x03,0xd5 = dmb oshld 0xbf,0x32,0x03,0xd5 = dmb oshst 0xbf,0x33,0x03,0xd5 = dmb osh 0xbf,0x35,0x03,0xd5 = dmb nshld 0xbf,0x36,0x03,0xd5 = dmb nshst 0xbf,0x37,0x03,0xd5 = dmb nsh 0xbf,0x39,0x03,0xd5 = dmb ishld 0xbf,0x3a,0x03,0xd5 = dmb ishst 0xbf,0x3b,0x03,0xd5 = dmb ish 0xbf,0x3d,0x03,0xd5 = dmb ld 0xbf,0x3e,0x03,0xd5 = dmb st 0xbf,0x3f,0x03,0xd5 = dmb sy 0xdf,0x3f,0x03,0xd5 = isb 0xdf,0x3f,0x03,0xd5 = isb 0xdf,0x3c,0x03,0xd5 = isb #12 0xbf,0x40,0x00,0xd5 = msr spsel, #0 0xdf,0x4f,0x03,0xd5 = msr daifset, #15 0xff,0x4c,0x03,0xd5 = msr daifclr, #12 0x9f,0x40,0x00,0xd5 = msr pan, #0 0x7f,0x40,0x00,0xd5 = msr uao, #0 0xe5,0x59,0x0f,0xd5 = sys #7, c5, c9, #7, x5 0x5f,0xff,0x08,0xd5 = sys #0, c15, c15, #2, xzr 0xe9,0x59,0x2f,0xd5 = sysl x9, #7, c5, c9, #7 0x41,0xff,0x28,0xd5 = sysl x1, #0, c15, c15, #2 0x1f,0x71,0x08,0xd5 = ic ialluis 0x1f,0x75,0x08,0xd5 = ic iallu 0x29,0x75,0x0b,0xd5 = ic ivau, x9 0x2c,0x74,0x0b,0xd5 = dc zva, x12 0x3f,0x76,0x08,0xd5 = dc ivac, xzr 0x42,0x76,0x08,0xd5 = dc isw, x2 0x29,0x7a,0x0b,0xd5 = dc cvac, x9 0x4a,0x7a,0x08,0xd5 = dc csw, x10 0x20,0x7b,0x0b,0xd5 = dc cvau, x0 0x23,0x7e,0x0b,0xd5 = dc civac, x3 0x5e,0x7e,0x08,0xd5 = dc cisw, x30 0x13,0x78,0x08,0xd5 = at s1e1r, x19 0x13,0x78,0x0c,0xd5 = at s1e2r, x19 0x13,0x78,0x0e,0xd5 = at s1e3r, x19 0x33,0x78,0x08,0xd5 = at s1e1w, x19 0x33,0x78,0x0c,0xd5 = at s1e2w, x19 0x33,0x78,0x0e,0xd5 = at s1e3w, x19 0x53,0x78,0x08,0xd5 = at s1e0r, x19 0x73,0x78,0x08,0xd5 = at s1e0w, x19 0x94,0x78,0x0c,0xd5 = at s12e1r, x20 0xb4,0x78,0x0c,0xd5 = at s12e1w, x20 0xd4,0x78,0x0c,0xd5 = at s12e0r, x20 0xf4,0x78,0x0c,0xd5 = at s12e0w, x20 0x24,0x80,0x0c,0xd5 = tlbi ipas2e1is, x4 0xa9,0x80,0x0c,0xd5 = tlbi ipas2le1is, x9 0x1f,0x83,0x08,0xd5 = tlbi vmalle1is 0x1f,0x83,0x0c,0xd5 = tlbi alle2is 0x1f,0x83,0x0e,0xd5 = tlbi alle3is 0x21,0x83,0x08,0xd5 = tlbi vae1is, x1 0x22,0x83,0x0c,0xd5 = tlbi vae2is, x2 0x23,0x83,0x0e,0xd5 = tlbi vae3is, x3 0x45,0x83,0x08,0xd5 = tlbi aside1is, x5 0x69,0x83,0x08,0xd5 = tlbi vaae1is, x9 0x9f,0x83,0x0c,0xd5 = tlbi alle1is 0xaa,0x83,0x08,0xd5 = tlbi vale1is, x10 0xab,0x83,0x0c,0xd5 = tlbi vale2is, x11 0xad,0x83,0x0e,0xd5 = tlbi vale3is, x13 0xdf,0x83,0x0c,0xd5 = tlbi vmalls12e1is 0xee,0x83,0x08,0xd5 = tlbi vaale1is, x14 0x2f,0x84,0x0c,0xd5 = tlbi ipas2e1, x15 0xb0,0x84,0x0c,0xd5 = tlbi ipas2le1, x16 0x1f,0x87,0x08,0xd5 = tlbi vmalle1 0x1f,0x87,0x0c,0xd5 = tlbi alle2 0x1f,0x87,0x0e,0xd5 = tlbi alle3 0x31,0x87,0x08,0xd5 = tlbi vae1, x17 0x32,0x87,0x0c,0xd5 = tlbi vae2, x18 0x33,0x87,0x0e,0xd5 = tlbi vae3, x19 0x54,0x87,0x08,0xd5 = tlbi aside1, x20 0x75,0x87,0x08,0xd5 = tlbi vaae1, x21 0x9f,0x87,0x0c,0xd5 = tlbi alle1 0xb6,0x87,0x08,0xd5 = tlbi vale1, x22 0xb7,0x87,0x0c,0xd5 = tlbi vale2, x23 0xb8,0x87,0x0e,0xd5 = tlbi vale3, x24 0xdf,0x87,0x0c,0xd5 = tlbi vmalls12e1 0xf9,0x87,0x08,0xd5 = tlbi vaale1, x25 0x0c,0x00,0x12,0xd5 = msr teecr32_el1, x12 0x4c,0x00,0x10,0xd5 = msr osdtrrx_el1, x12 0x0c,0x02,0x10,0xd5 = msr mdccint_el1, x12 0x4c,0x02,0x10,0xd5 = msr mdscr_el1, x12 0x4c,0x03,0x10,0xd5 = msr osdtrtx_el1, x12 0x0c,0x04,0x13,0xd5 = msr dbgdtr_el0, x12 0x0c,0x05,0x13,0xd5 = msr dbgdtrtx_el0, x12 0x4c,0x06,0x10,0xd5 = msr oseccr_el1, x12 0x0c,0x07,0x14,0xd5 = msr dbgvcr32_el2, x12 0x8c,0x00,0x10,0xd5 = msr dbgbvr0_el1, x12 0x8c,0x01,0x10,0xd5 = msr dbgbvr1_el1, x12 0x8c,0x02,0x10,0xd5 = msr dbgbvr2_el1, x12 0x8c,0x03,0x10,0xd5 = msr dbgbvr3_el1, x12 0x8c,0x04,0x10,0xd5 = msr dbgbvr4_el1, x12 0x8c,0x05,0x10,0xd5 = msr dbgbvr5_el1, x12 0x8c,0x06,0x10,0xd5 = msr dbgbvr6_el1, x12 0x8c,0x07,0x10,0xd5 = msr dbgbvr7_el1, x12 0x8c,0x08,0x10,0xd5 = msr dbgbvr8_el1, x12 0x8c,0x09,0x10,0xd5 = msr dbgbvr9_el1, x12 0x8c,0x0a,0x10,0xd5 = msr dbgbvr10_el1, x12 0x8c,0x0b,0x10,0xd5 = msr dbgbvr11_el1, x12 0x8c,0x0c,0x10,0xd5 = msr dbgbvr12_el1, x12 0x8c,0x0d,0x10,0xd5 = msr dbgbvr13_el1, x12 0x8c,0x0e,0x10,0xd5 = msr dbgbvr14_el1, x12 0x8c,0x0f,0x10,0xd5 = msr dbgbvr15_el1, x12 0xac,0x00,0x10,0xd5 = msr dbgbcr0_el1, x12 0xac,0x01,0x10,0xd5 = msr dbgbcr1_el1, x12 0xac,0x02,0x10,0xd5 = msr dbgbcr2_el1, x12 0xac,0x03,0x10,0xd5 = msr dbgbcr3_el1, x12 0xac,0x04,0x10,0xd5 = msr dbgbcr4_el1, x12 0xac,0x05,0x10,0xd5 = msr dbgbcr5_el1, x12 0xac,0x06,0x10,0xd5 = msr dbgbcr6_el1, x12 0xac,0x07,0x10,0xd5 = msr dbgbcr7_el1, x12 0xac,0x08,0x10,0xd5 = msr dbgbcr8_el1, x12 0xac,0x09,0x10,0xd5 = msr dbgbcr9_el1, x12 0xac,0x0a,0x10,0xd5 = msr dbgbcr10_el1, x12 0xac,0x0b,0x10,0xd5 = msr dbgbcr11_el1, x12 0xac,0x0c,0x10,0xd5 = msr dbgbcr12_el1, x12 0xac,0x0d,0x10,0xd5 = msr dbgbcr13_el1, x12 0xac,0x0e,0x10,0xd5 = msr dbgbcr14_el1, x12 0xac,0x0f,0x10,0xd5 = msr dbgbcr15_el1, x12 0xcc,0x00,0x10,0xd5 = msr dbgwvr0_el1, x12 0xcc,0x01,0x10,0xd5 = msr dbgwvr1_el1, x12 0xcc,0x02,0x10,0xd5 = msr dbgwvr2_el1, x12 0xcc,0x03,0x10,0xd5 = msr dbgwvr3_el1, x12 0xcc,0x04,0x10,0xd5 = msr dbgwvr4_el1, x12 0xcc,0x05,0x10,0xd5 = msr dbgwvr5_el1, x12 0xcc,0x06,0x10,0xd5 = msr dbgwvr6_el1, x12 0xcc,0x07,0x10,0xd5 = msr dbgwvr7_el1, x12 0xcc,0x08,0x10,0xd5 = msr dbgwvr8_el1, x12 0xcc,0x09,0x10,0xd5 = msr dbgwvr9_el1, x12 0xcc,0x0a,0x10,0xd5 = msr dbgwvr10_el1, x12 0xcc,0x0b,0x10,0xd5 = msr dbgwvr11_el1, x12 0xcc,0x0c,0x10,0xd5 = msr dbgwvr12_el1, x12 0xcc,0x0d,0x10,0xd5 = msr dbgwvr13_el1, x12 0xcc,0x0e,0x10,0xd5 = msr dbgwvr14_el1, x12 0xcc,0x0f,0x10,0xd5 = msr dbgwvr15_el1, x12 0xec,0x00,0x10,0xd5 = msr dbgwcr0_el1, x12 0xec,0x01,0x10,0xd5 = msr dbgwcr1_el1, x12 0xec,0x02,0x10,0xd5 = msr dbgwcr2_el1, x12 0xec,0x03,0x10,0xd5 = msr dbgwcr3_el1, x12 0xec,0x04,0x10,0xd5 = msr dbgwcr4_el1, x12 0xec,0x05,0x10,0xd5 = msr dbgwcr5_el1, x12 0xec,0x06,0x10,0xd5 = msr dbgwcr6_el1, x12 0xec,0x07,0x10,0xd5 = msr dbgwcr7_el1, x12 0xec,0x08,0x10,0xd5 = msr dbgwcr8_el1, x12 0xec,0x09,0x10,0xd5 = msr dbgwcr9_el1, x12 0xec,0x0a,0x10,0xd5 = msr dbgwcr10_el1, x12 0xec,0x0b,0x10,0xd5 = msr dbgwcr11_el1, x12 0xec,0x0c,0x10,0xd5 = msr dbgwcr12_el1, x12 0xec,0x0d,0x10,0xd5 = msr dbgwcr13_el1, x12 0xec,0x0e,0x10,0xd5 = msr dbgwcr14_el1, x12 0xec,0x0f,0x10,0xd5 = msr dbgwcr15_el1, x12 0x0c,0x10,0x12,0xd5 = msr teehbr32_el1, x12 0x8c,0x10,0x10,0xd5 = msr oslar_el1, x12 0x8c,0x13,0x10,0xd5 = msr osdlr_el1, x12 0x8c,0x14,0x10,0xd5 = msr dbgprcr_el1, x12 0xcc,0x78,0x10,0xd5 = msr dbgclaimset_el1, x12 0xcc,0x79,0x10,0xd5 = msr dbgclaimclr_el1, x12 0x0c,0x00,0x1a,0xd5 = msr csselr_el1, x12 0x0c,0x00,0x1c,0xd5 = msr vpidr_el2, x12 0xac,0x00,0x1c,0xd5 = msr vmpidr_el2, x12 0x0c,0x10,0x18,0xd5 = msr sctlr_el1, x12 0x0c,0x10,0x1c,0xd5 = msr sctlr_el2, x12 0x0c,0x10,0x1e,0xd5 = msr sctlr_el3, x12 0x2c,0x10,0x18,0xd5 = msr actlr_el1, x12 0x2c,0x10,0x1c,0xd5 = msr actlr_el2, x12 0x2c,0x10,0x1e,0xd5 = msr actlr_el3, x12 0x4c,0x10,0x18,0xd5 = msr cpacr_el1, x12 0x0c,0x11,0x1c,0xd5 = msr hcr_el2, x12 0x0c,0x11,0x1e,0xd5 = msr scr_el3, x12 0x2c,0x11,0x1c,0xd5 = msr mdcr_el2, x12 0x2c,0x11,0x1e,0xd5 = msr sder32_el3, x12 0x4c,0x11,0x1c,0xd5 = msr cptr_el2, x12 0x4c,0x11,0x1e,0xd5 = msr cptr_el3, x12 0x6c,0x11,0x1c,0xd5 = msr hstr_el2, x12 0xec,0x11,0x1c,0xd5 = msr hacr_el2, x12 0x2c,0x13,0x1e,0xd5 = msr mdcr_el3, x12 0x0c,0x20,0x18,0xd5 = msr ttbr0_el1, x12 0x0c,0x20,0x1c,0xd5 = msr ttbr0_el2, x12 0x0c,0x20,0x1e,0xd5 = msr ttbr0_el3, x12 0x2c,0x20,0x18,0xd5 = msr ttbr1_el1, x12 0x4c,0x20,0x18,0xd5 = msr tcr_el1, x12 0x4c,0x20,0x1c,0xd5 = msr tcr_el2, x12 0x4c,0x20,0x1e,0xd5 = msr tcr_el3, x12 0x0c,0x21,0x1c,0xd5 = msr vttbr_el2, x12 0x4c,0x21,0x1c,0xd5 = msr vtcr_el2, x12 0x0c,0x30,0x1c,0xd5 = msr dacr32_el2, x12 0x0c,0x40,0x18,0xd5 = msr spsr_el1, x12 0x0c,0x40,0x1c,0xd5 = msr spsr_el2, x12 0x0c,0x40,0x1e,0xd5 = msr spsr_el3, x12 0x2c,0x40,0x18,0xd5 = msr elr_el1, x12 0x2c,0x40,0x1c,0xd5 = msr elr_el2, x12 0x2c,0x40,0x1e,0xd5 = msr elr_el3, x12 0x0c,0x41,0x18,0xd5 = msr sp_el0, x12 0x0c,0x41,0x1c,0xd5 = msr sp_el1, x12 0x0c,0x41,0x1e,0xd5 = msr sp_el2, x12 0x0c,0x42,0x18,0xd5 = msr spsel, x12 0x0c,0x42,0x1b,0xd5 = msr nzcv, x12 0x2c,0x42,0x1b,0xd5 = msr daif, x12 0x4c,0x42,0x18,0xd5 = msr currentel, x12 0x0c,0x43,0x1c,0xd5 = msr spsr_irq, x12 0x2c,0x43,0x1c,0xd5 = msr spsr_abt, x12 0x4c,0x43,0x1c,0xd5 = msr spsr_und, x12 0x6c,0x43,0x1c,0xd5 = msr spsr_fiq, x12 0x0c,0x44,0x1b,0xd5 = msr fpcr, x12 0x2c,0x44,0x1b,0xd5 = msr fpsr, x12 0x0c,0x45,0x1b,0xd5 = msr dspsr_el0, x12 0x2c,0x45,0x1b,0xd5 = msr dlr_el0, x12 0x2c,0x50,0x1c,0xd5 = msr ifsr32_el2, x12 0x0c,0x51,0x18,0xd5 = msr afsr0_el1, x12 0x0c,0x51,0x1c,0xd5 = msr afsr0_el2, x12 0x0c,0x51,0x1e,0xd5 = msr afsr0_el3, x12 0x2c,0x51,0x18,0xd5 = msr afsr1_el1, x12 0x2c,0x51,0x1d,0xd5 = msr afsr1_el12, x12 0x2c,0x51,0x1c,0xd5 = msr afsr1_el2, x12 0x2c,0x51,0x1e,0xd5 = msr afsr1_el3, x12 0x0c,0x52,0x18,0xd5 = msr esr_el1, x12 0x0c,0x52,0x1c,0xd5 = msr esr_el2, x12 0x0c,0x52,0x1e,0xd5 = msr esr_el3, x12 0x0c,0x53,0x1c,0xd5 = msr fpexc32_el2, x12 0x0c,0x60,0x18,0xd5 = msr far_el1, x12 0x0c,0x60,0x1c,0xd5 = msr far_el2, x12 0x0c,0x60,0x1e,0xd5 = msr far_el3, x12 0x8c,0x60,0x1c,0xd5 = msr hpfar_el2, x12 0x0c,0x74,0x18,0xd5 = msr par_el1, x12 0x0c,0x9c,0x1b,0xd5 = msr pmcr_el0, x12 0x2c,0x9c,0x1b,0xd5 = msr pmcntenset_el0, x12 0x4c,0x9c,0x1b,0xd5 = msr pmcntenclr_el0, x12 0x6c,0x9c,0x1b,0xd5 = msr pmovsclr_el0, x12 0xac,0x9c,0x1b,0xd5 = msr pmselr_el0, x12 0x0c,0x9d,0x1b,0xd5 = msr pmccntr_el0, x12 0x2c,0x9d,0x1b,0xd5 = msr pmxevtyper_el0, x12 0x4c,0x9d,0x1b,0xd5 = msr pmxevcntr_el0, x12 0x0c,0x9e,0x1b,0xd5 = msr pmuserenr_el0, x12 0x2c,0x9e,0x18,0xd5 = msr pmintenset_el1, x12 0x4c,0x9e,0x18,0xd5 = msr pmintenclr_el1, x12 0x6c,0x9e,0x1b,0xd5 = msr pmovsset_el0, x12 0x0c,0xa2,0x18,0xd5 = msr mair_el1, x12 0x0c,0xa2,0x1c,0xd5 = msr mair_el2, x12 0x0c,0xa2,0x1e,0xd5 = msr mair_el3, x12 0x0c,0xa3,0x18,0xd5 = msr amair_el1, x12 0x0c,0xa3,0x1c,0xd5 = msr amair_el2, x12 0x0c,0xa3,0x1e,0xd5 = msr amair_el3, x12 0x0c,0xc0,0x18,0xd5 = msr vbar_el1, x12 0x0c,0xc0,0x1c,0xd5 = msr vbar_el2, x12 0x0c,0xc0,0x1e,0xd5 = msr vbar_el3, x12 0x4c,0xc0,0x18,0xd5 = msr rmr_el1, x12 0x4c,0xc0,0x1c,0xd5 = msr rmr_el2, x12 0x4c,0xc0,0x1e,0xd5 = msr rmr_el3, x12 0x2c,0xd0,0x18,0xd5 = msr contextidr_el1, x12 0x4c,0xd0,0x1b,0xd5 = msr tpidr_el0, x12 0x4c,0xd0,0x1c,0xd5 = msr tpidr_el2, x12 0x4c,0xd0,0x1e,0xd5 = msr tpidr_el3, x12 0x6c,0xd0,0x1b,0xd5 = msr tpidrro_el0, x12 0x8c,0xd0,0x18,0xd5 = msr tpidr_el1, x12 0x0c,0xe0,0x1b,0xd5 = msr cntfrq_el0, x12 0x6c,0xe0,0x1c,0xd5 = msr cntvoff_el2, x12 0x0c,0xe1,0x18,0xd5 = msr cntkctl_el1, x12 0x0c,0xe1,0x1c,0xd5 = msr cnthctl_el2, x12 0x0c,0xe2,0x1b,0xd5 = msr cntp_tval_el0, x12 0x0c,0xe2,0x1c,0xd5 = msr cnthp_tval_el2, x12 0x0c,0xe2,0x1f,0xd5 = msr cntps_tval_el1, x12 0x2c,0xe2,0x1b,0xd5 = msr cntp_ctl_el0, x12 0x2c,0xe2,0x1c,0xd5 = msr cnthp_ctl_el2, x12 0x2c,0xe2,0x1f,0xd5 = msr cntps_ctl_el1, x12 0x4c,0xe2,0x1b,0xd5 = msr cntp_cval_el0, x12 0x4c,0xe2,0x1c,0xd5 = msr cnthp_cval_el2, x12 0x4c,0xe2,0x1f,0xd5 = msr cntps_cval_el1, x12 0x0c,0xe3,0x1b,0xd5 = msr cntv_tval_el0, x12 0x0c,0xe3,0x1d,0xd5 = msr cntv_tval_el02, x12 0x2c,0xe3,0x1b,0xd5 = msr cntv_ctl_el0, x12 0x4c,0xe3,0x1b,0xd5 = msr cntv_cval_el0, x12 0x0c,0xe8,0x1b,0xd5 = msr pmevcntr0_el0, x12 0x2c,0xe8,0x1b,0xd5 = msr pmevcntr1_el0, x12 0x4c,0xe8,0x1b,0xd5 = msr pmevcntr2_el0, x12 0x6c,0xe8,0x1b,0xd5 = msr pmevcntr3_el0, x12 0x8c,0xe8,0x1b,0xd5 = msr pmevcntr4_el0, x12 0xac,0xe8,0x1b,0xd5 = msr pmevcntr5_el0, x12 0xcc,0xe8,0x1b,0xd5 = msr pmevcntr6_el0, x12 0xec,0xe8,0x1b,0xd5 = msr pmevcntr7_el0, x12 0x0c,0xe9,0x1b,0xd5 = msr pmevcntr8_el0, x12 0x2c,0xe9,0x1b,0xd5 = msr pmevcntr9_el0, x12 0x4c,0xe9,0x1b,0xd5 = msr pmevcntr10_el0, x12 0x6c,0xe9,0x1b,0xd5 = msr pmevcntr11_el0, x12 0x8c,0xe9,0x1b,0xd5 = msr pmevcntr12_el0, x12 0xac,0xe9,0x1b,0xd5 = msr pmevcntr13_el0, x12 0xcc,0xe9,0x1b,0xd5 = msr pmevcntr14_el0, x12 0xec,0xe9,0x1b,0xd5 = msr pmevcntr15_el0, x12 0x0c,0xea,0x1b,0xd5 = msr pmevcntr16_el0, x12 0x2c,0xea,0x1b,0xd5 = msr pmevcntr17_el0, x12 0x4c,0xea,0x1b,0xd5 = msr pmevcntr18_el0, x12 0x6c,0xea,0x1b,0xd5 = msr pmevcntr19_el0, x12 0x8c,0xea,0x1b,0xd5 = msr pmevcntr20_el0, x12 0xac,0xea,0x1b,0xd5 = msr pmevcntr21_el0, x12 0xcc,0xea,0x1b,0xd5 = msr pmevcntr22_el0, x12 0xec,0xea,0x1b,0xd5 = msr pmevcntr23_el0, x12 0x0c,0xeb,0x1b,0xd5 = msr pmevcntr24_el0, x12 0x2c,0xeb,0x1b,0xd5 = msr pmevcntr25_el0, x12 0x4c,0xeb,0x1b,0xd5 = msr pmevcntr26_el0, x12 0x6c,0xeb,0x1b,0xd5 = msr pmevcntr27_el0, x12 0x8c,0xeb,0x1b,0xd5 = msr pmevcntr28_el0, x12 0xac,0xeb,0x1b,0xd5 = msr pmevcntr29_el0, x12 0xcc,0xeb,0x1b,0xd5 = msr pmevcntr30_el0, x12 0xec,0xef,0x1b,0xd5 = msr pmccfiltr_el0, x12 0x0c,0xec,0x1b,0xd5 = msr pmevtyper0_el0, x12 0x2c,0xec,0x1b,0xd5 = msr pmevtyper1_el0, x12 0x4c,0xec,0x1b,0xd5 = msr pmevtyper2_el0, x12 0x6c,0xec,0x1b,0xd5 = msr pmevtyper3_el0, x12 0x8c,0xec,0x1b,0xd5 = msr pmevtyper4_el0, x12 0xac,0xec,0x1b,0xd5 = msr pmevtyper5_el0, x12 0xcc,0xec,0x1b,0xd5 = msr pmevtyper6_el0, x12 0xec,0xec,0x1b,0xd5 = msr pmevtyper7_el0, x12 0x0c,0xed,0x1b,0xd5 = msr pmevtyper8_el0, x12 0x2c,0xed,0x1b,0xd5 = msr pmevtyper9_el0, x12 0x4c,0xed,0x1b,0xd5 = msr pmevtyper10_el0, x12 0x6c,0xed,0x1b,0xd5 = msr pmevtyper11_el0, x12 0x8c,0xed,0x1b,0xd5 = msr pmevtyper12_el0, x12 0xac,0xed,0x1b,0xd5 = msr pmevtyper13_el0, x12 0xcc,0xed,0x1b,0xd5 = msr pmevtyper14_el0, x12 0xec,0xed,0x1b,0xd5 = msr pmevtyper15_el0, x12 0x0c,0xee,0x1b,0xd5 = msr pmevtyper16_el0, x12 0x2c,0xee,0x1b,0xd5 = msr pmevtyper17_el0, x12 0x4c,0xee,0x1b,0xd5 = msr pmevtyper18_el0, x12 0x6c,0xee,0x1b,0xd5 = msr pmevtyper19_el0, x12 0x8c,0xee,0x1b,0xd5 = msr pmevtyper20_el0, x12 0xac,0xee,0x1b,0xd5 = msr pmevtyper21_el0, x12 0xcc,0xee,0x1b,0xd5 = msr pmevtyper22_el0, x12 0xec,0xee,0x1b,0xd5 = msr pmevtyper23_el0, x12 0x0c,0xef,0x1b,0xd5 = msr pmevtyper24_el0, x12 0x2c,0xef,0x1b,0xd5 = msr pmevtyper25_el0, x12 0x4c,0xef,0x1b,0xd5 = msr pmevtyper26_el0, x12 0x6c,0xef,0x1b,0xd5 = msr pmevtyper27_el0, x12 0x8c,0xef,0x1b,0xd5 = msr pmevtyper28_el0, x12 0xac,0xef,0x1b,0xd5 = msr pmevtyper29_el0, x12 0xcc,0xef,0x1b,0xd5 = msr pmevtyper30_el0, x12 0x69,0x42,0x38,0xd5 = mrs x9, pan 0x89,0x42,0x38,0xd5 = mrs x9, uao 0x09,0x00,0x32,0xd5 = mrs x9, teecr32_el1 0x49,0x00,0x30,0xd5 = mrs x9, osdtrrx_el1 0x09,0x01,0x33,0xd5 = mrs x9, mdccsr_el0 0x09,0x02,0x30,0xd5 = mrs x9, mdccint_el1 0x49,0x02,0x30,0xd5 = mrs x9, mdscr_el1 0x49,0x03,0x30,0xd5 = mrs x9, osdtrtx_el1 0x09,0x04,0x33,0xd5 = mrs x9, dbgdtr_el0 0x09,0x05,0x33,0xd5 = mrs x9, dbgdtrrx_el0 0x49,0x06,0x30,0xd5 = mrs x9, oseccr_el1 0x09,0x07,0x34,0xd5 = mrs x9, dbgvcr32_el2 0x89,0x00,0x30,0xd5 = mrs x9, dbgbvr0_el1 0x89,0x01,0x30,0xd5 = mrs x9, dbgbvr1_el1 0x89,0x02,0x30,0xd5 = mrs x9, dbgbvr2_el1 0x89,0x03,0x30,0xd5 = mrs x9, dbgbvr3_el1 0x89,0x04,0x30,0xd5 = mrs x9, dbgbvr4_el1 0x89,0x05,0x30,0xd5 = mrs x9, dbgbvr5_el1 0x89,0x06,0x30,0xd5 = mrs x9, dbgbvr6_el1 0x89,0x07,0x30,0xd5 = mrs x9, dbgbvr7_el1 0x89,0x08,0x30,0xd5 = mrs x9, dbgbvr8_el1 0x89,0x09,0x30,0xd5 = mrs x9, dbgbvr9_el1 0x89,0x0a,0x30,0xd5 = mrs x9, dbgbvr10_el1 0x89,0x0b,0x30,0xd5 = mrs x9, dbgbvr11_el1 0x89,0x0c,0x30,0xd5 = mrs x9, dbgbvr12_el1 0x89,0x0d,0x30,0xd5 = mrs x9, dbgbvr13_el1 0x89,0x0e,0x30,0xd5 = mrs x9, dbgbvr14_el1 0x89,0x0f,0x30,0xd5 = mrs x9, dbgbvr15_el1 0xa9,0x00,0x30,0xd5 = mrs x9, dbgbcr0_el1 0xa9,0x01,0x30,0xd5 = mrs x9, dbgbcr1_el1 0xa9,0x02,0x30,0xd5 = mrs x9, dbgbcr2_el1 0xa9,0x03,0x30,0xd5 = mrs x9, dbgbcr3_el1 0xa9,0x04,0x30,0xd5 = mrs x9, dbgbcr4_el1 0xa9,0x05,0x30,0xd5 = mrs x9, dbgbcr5_el1 0xa9,0x06,0x30,0xd5 = mrs x9, dbgbcr6_el1 0xa9,0x07,0x30,0xd5 = mrs x9, dbgbcr7_el1 0xa9,0x08,0x30,0xd5 = mrs x9, dbgbcr8_el1 0xa9,0x09,0x30,0xd5 = mrs x9, dbgbcr9_el1 0xa9,0x0a,0x30,0xd5 = mrs x9, dbgbcr10_el1 0xa9,0x0b,0x30,0xd5 = mrs x9, dbgbcr11_el1 0xa9,0x0c,0x30,0xd5 = mrs x9, dbgbcr12_el1 0xa9,0x0d,0x30,0xd5 = mrs x9, dbgbcr13_el1 0xa9,0x0e,0x30,0xd5 = mrs x9, dbgbcr14_el1 0xa9,0x0f,0x30,0xd5 = mrs x9, dbgbcr15_el1 0xc9,0x00,0x30,0xd5 = mrs x9, dbgwvr0_el1 0xc9,0x01,0x30,0xd5 = mrs x9, dbgwvr1_el1 0xc9,0x02,0x30,0xd5 = mrs x9, dbgwvr2_el1 0xc9,0x03,0x30,0xd5 = mrs x9, dbgwvr3_el1 0xc9,0x04,0x30,0xd5 = mrs x9, dbgwvr4_el1 0xc9,0x05,0x30,0xd5 = mrs x9, dbgwvr5_el1 0xc9,0x06,0x30,0xd5 = mrs x9, dbgwvr6_el1 0xc9,0x07,0x30,0xd5 = mrs x9, dbgwvr7_el1 0xc9,0x08,0x30,0xd5 = mrs x9, dbgwvr8_el1 0xc9,0x09,0x30,0xd5 = mrs x9, dbgwvr9_el1 0xc9,0x0a,0x30,0xd5 = mrs x9, dbgwvr10_el1 0xc9,0x0b,0x30,0xd5 = mrs x9, dbgwvr11_el1 0xc9,0x0c,0x30,0xd5 = mrs x9, dbgwvr12_el1 0xc9,0x0d,0x30,0xd5 = mrs x9, dbgwvr13_el1 0xc9,0x0e,0x30,0xd5 = mrs x9, dbgwvr14_el1 0xc9,0x0f,0x30,0xd5 = mrs x9, dbgwvr15_el1 0xe9,0x00,0x30,0xd5 = mrs x9, dbgwcr0_el1 0xe9,0x01,0x30,0xd5 = mrs x9, dbgwcr1_el1 0xe9,0x02,0x30,0xd5 = mrs x9, dbgwcr2_el1 0xe9,0x03,0x30,0xd5 = mrs x9, dbgwcr3_el1 0xe9,0x04,0x30,0xd5 = mrs x9, dbgwcr4_el1 0xe9,0x05,0x30,0xd5 = mrs x9, dbgwcr5_el1 0xe9,0x06,0x30,0xd5 = mrs x9, dbgwcr6_el1 0xe9,0x07,0x30,0xd5 = mrs x9, dbgwcr7_el1 0xe9,0x08,0x30,0xd5 = mrs x9, dbgwcr8_el1 0xe9,0x09,0x30,0xd5 = mrs x9, dbgwcr9_el1 0xe9,0x0a,0x30,0xd5 = mrs x9, dbgwcr10_el1 0xe9,0x0b,0x30,0xd5 = mrs x9, dbgwcr11_el1 0xe9,0x0c,0x30,0xd5 = mrs x9, dbgwcr12_el1 0xe9,0x0d,0x30,0xd5 = mrs x9, dbgwcr13_el1 0xe9,0x0e,0x30,0xd5 = mrs x9, dbgwcr14_el1 0xe9,0x0f,0x30,0xd5 = mrs x9, dbgwcr15_el1 0x09,0x10,0x30,0xd5 = mrs x9, mdrar_el1 0x09,0x10,0x32,0xd5 = mrs x9, teehbr32_el1 0x89,0x11,0x30,0xd5 = mrs x9, oslsr_el1 0x89,0x13,0x30,0xd5 = mrs x9, osdlr_el1 0x89,0x14,0x30,0xd5 = mrs x9, dbgprcr_el1 0xc9,0x78,0x30,0xd5 = mrs x9, dbgclaimset_el1 0xc9,0x79,0x30,0xd5 = mrs x9, dbgclaimclr_el1 0xc9,0x7e,0x30,0xd5 = mrs x9, dbgauthstatus_el1 0x09,0x00,0x38,0xd5 = mrs x9, midr_el1 0x09,0x00,0x39,0xd5 = mrs x9, ccsidr_el1 0x09,0x00,0x3a,0xd5 = mrs x9, csselr_el1 0x09,0x00,0x3c,0xd5 = mrs x9, vpidr_el2 0x29,0x00,0x39,0xd5 = mrs x9, clidr_el1 0x29,0x00,0x3b,0xd5 = mrs x9, ctr_el0 0xa9,0x00,0x38,0xd5 = mrs x9, mpidr_el1 0xa9,0x00,0x3c,0xd5 = mrs x9, vmpidr_el2 0xc9,0x00,0x38,0xd5 = mrs x9, revidr_el1 0xe9,0x00,0x39,0xd5 = mrs x9, aidr_el1 0xe9,0x00,0x3b,0xd5 = mrs x9, dczid_el0 0x09,0x01,0x38,0xd5 = mrs x9, id_pfr0_el1 0x29,0x01,0x38,0xd5 = mrs x9, id_pfr1_el1 0x49,0x01,0x38,0xd5 = mrs x9, id_dfr0_el1 0x69,0x01,0x38,0xd5 = mrs x9, id_afr0_el1 0x89,0x01,0x38,0xd5 = mrs x9, id_mmfr0_el1 0xa9,0x01,0x38,0xd5 = mrs x9, id_mmfr1_el1 0xc9,0x01,0x38,0xd5 = mrs x9, id_mmfr2_el1 0xe9,0x01,0x38,0xd5 = mrs x9, id_mmfr3_el1 0xc9,0x02,0x38,0xd5 = mrs x9, id_mmfr4_el1 0x09,0x02,0x38,0xd5 = mrs x9, id_isar0_el1 0x29,0x02,0x38,0xd5 = mrs x9, id_isar1_el1 0x49,0x02,0x38,0xd5 = mrs x9, id_isar2_el1 0x69,0x02,0x38,0xd5 = mrs x9, id_isar3_el1 0x89,0x02,0x38,0xd5 = mrs x9, id_isar4_el1 0xa9,0x02,0x38,0xd5 = mrs x9, id_isar5_el1 0x09,0x03,0x38,0xd5 = mrs x9, mvfr0_el1 0x29,0x03,0x38,0xd5 = mrs x9, mvfr1_el1 0x49,0x03,0x38,0xd5 = mrs x9, mvfr2_el1 0x09,0x04,0x38,0xd5 = mrs x9, id_aa64pfr0_el1 0x29,0x04,0x38,0xd5 = mrs x9, id_aa64pfr1_el1 0x09,0x05,0x38,0xd5 = mrs x9, id_aa64dfr0_el1 0x29,0x05,0x38,0xd5 = mrs x9, id_aa64dfr1_el1 0x89,0x05,0x38,0xd5 = mrs x9, id_aa64afr0_el1 0xa9,0x05,0x38,0xd5 = mrs x9, id_aa64afr1_el1 0x09,0x06,0x38,0xd5 = mrs x9, id_aa64isar0_el1 0x29,0x06,0x38,0xd5 = mrs x9, id_aa64isar1_el1 0x09,0x07,0x38,0xd5 = mrs x9, id_aa64mmfr0_el1 0x29,0x07,0x38,0xd5 = mrs x9, id_aa64mmfr1_el1 0x49,0x07,0x38,0xd5 = mrs x9, id_aa64mmfr2_el1 0x69,0xa4,0x38,0xd5 = mrs x9, lorc_el1 0x29,0xa4,0x38,0xd5 = mrs x9, lorea_el1 0xe9,0xa4,0x38,0xd5 = mrs x9, lorid_el1 0x49,0xa4,0x38,0xd5 = mrs x9, lorn_el1 0x09,0xa4,0x38,0xd5 = mrs x9, lorsa_el1 0x09,0x10,0x38,0xd5 = mrs x9, sctlr_el1 0x09,0x10,0x3d,0xd5 = mrs x9, sctlr_el12 0x09,0x10,0x3c,0xd5 = mrs x9, sctlr_el2 0x09,0x10,0x3e,0xd5 = mrs x9, sctlr_el3 0x29,0x10,0x38,0xd5 = mrs x9, actlr_el1 0x29,0x10,0x3c,0xd5 = mrs x9, actlr_el2 0x29,0x10,0x3e,0xd5 = mrs x9, actlr_el3 0x49,0x10,0x38,0xd5 = mrs x9, cpacr_el1 0x49,0x10,0x3d,0xd5 = mrs x9, cpacr_el12 0x09,0x11,0x3c,0xd5 = mrs x9, hcr_el2 0x09,0x11,0x3e,0xd5 = mrs x9, scr_el3 0x29,0x11,0x3c,0xd5 = mrs x9, mdcr_el2 0x29,0x11,0x3e,0xd5 = mrs x9, sder32_el3 0x49,0x11,0x3c,0xd5 = mrs x9, cptr_el2 0x49,0x11,0x3e,0xd5 = mrs x9, cptr_el3 0x69,0x11,0x3c,0xd5 = mrs x9, hstr_el2 0xe9,0x11,0x3c,0xd5 = mrs x9, hacr_el2 0x29,0x13,0x3e,0xd5 = mrs x9, mdcr_el3 0x09,0x20,0x38,0xd5 = mrs x9, ttbr0_el1 0x09,0x20,0x3d,0xd5 = mrs x9, ttbr0_el12 0x09,0x20,0x3c,0xd5 = mrs x9, ttbr0_el2 0x09,0x20,0x3e,0xd5 = mrs x9, ttbr0_el3 0x29,0x20,0x38,0xd5 = mrs x9, ttbr1_el1 0x29,0x20,0x3d,0xd5 = mrs x9, ttbr1_el12 0x29,0x20,0x3c,0xd5 = mrs x9, ttbr1_el2 0x49,0x20,0x38,0xd5 = mrs x9, tcr_el1 0x49,0x20,0x3d,0xd5 = mrs x9, tcr_el12 0x49,0x20,0x3c,0xd5 = mrs x9, tcr_el2 0x49,0x20,0x3e,0xd5 = mrs x9, tcr_el3 0x09,0x21,0x3c,0xd5 = mrs x9, vttbr_el2 0x49,0x21,0x3c,0xd5 = mrs x9, vtcr_el2 0x09,0x30,0x3c,0xd5 = mrs x9, dacr32_el2 0x09,0x40,0x38,0xd5 = mrs x9, spsr_el1 0x09,0x40,0x3d,0xd5 = mrs x9, spsr_el12 0x09,0x40,0x3c,0xd5 = mrs x9, spsr_el2 0x09,0x40,0x3e,0xd5 = mrs x9, spsr_el3 0x29,0x40,0x38,0xd5 = mrs x9, elr_el1 0x29,0x40,0x3d,0xd5 = mrs x9, elr_el12 0x29,0x40,0x3c,0xd5 = mrs x9, elr_el2 0x29,0x40,0x3e,0xd5 = mrs x9, elr_el3 0x09,0x41,0x38,0xd5 = mrs x9, sp_el0 0x09,0x41,0x3c,0xd5 = mrs x9, sp_el1 0x09,0x41,0x3e,0xd5 = mrs x9, sp_el2 0x09,0x42,0x38,0xd5 = mrs x9, spsel 0x09,0x42,0x3b,0xd5 = mrs x9, nzcv 0x29,0x42,0x3b,0xd5 = mrs x9, daif 0x49,0x42,0x38,0xd5 = mrs x9, currentel 0x09,0x43,0x3c,0xd5 = mrs x9, spsr_irq 0x29,0x43,0x3c,0xd5 = mrs x9, spsr_abt 0x49,0x43,0x3c,0xd5 = mrs x9, spsr_und 0x69,0x43,0x3c,0xd5 = mrs x9, spsr_fiq 0x09,0x44,0x3b,0xd5 = mrs x9, fpcr 0x29,0x44,0x3b,0xd5 = mrs x9, fpsr 0x09,0x45,0x3b,0xd5 = mrs x9, dspsr_el0 0x29,0x45,0x3b,0xd5 = mrs x9, dlr_el0 0x29,0x50,0x3c,0xd5 = mrs x9, ifsr32_el2 0x09,0x51,0x38,0xd5 = mrs x9, afsr0_el1 0x09,0x51,0x3d,0xd5 = mrs x9, afsr0_el12 0x09,0x51,0x3c,0xd5 = mrs x9, afsr0_el2 0x09,0x51,0x3e,0xd5 = mrs x9, afsr0_el3 0x29,0x51,0x38,0xd5 = mrs x9, afsr1_el1 0x29,0x51,0x3c,0xd5 = mrs x9, afsr1_el2 0x29,0x51,0x3e,0xd5 = mrs x9, afsr1_el3 0x09,0x52,0x38,0xd5 = mrs x9, esr_el1 0x09,0x52,0x3d,0xd5 = mrs x9, esr_el12 0x09,0x52,0x3c,0xd5 = mrs x9, esr_el2 0x09,0x52,0x3e,0xd5 = mrs x9, esr_el3 0x09,0x53,0x3c,0xd5 = mrs x9, fpexc32_el2 0x09,0x60,0x38,0xd5 = mrs x9, far_el1 0x09,0x60,0x3d,0xd5 = mrs x9, far_el12 0x09,0x60,0x3c,0xd5 = mrs x9, far_el2 0x09,0x60,0x3e,0xd5 = mrs x9, far_el3 0x89,0x60,0x3c,0xd5 = mrs x9, hpfar_el2 0x09,0x74,0x38,0xd5 = mrs x9, par_el1 0x09,0x9c,0x3b,0xd5 = mrs x9, pmcr_el0 0x29,0x9c,0x3b,0xd5 = mrs x9, pmcntenset_el0 0x49,0x9c,0x3b,0xd5 = mrs x9, pmcntenclr_el0 0x69,0x9c,0x3b,0xd5 = mrs x9, pmovsclr_el0 0xa9,0x9c,0x3b,0xd5 = mrs x9, pmselr_el0 0xc9,0x9c,0x3b,0xd5 = mrs x9, pmceid0_el0 0xe9,0x9c,0x3b,0xd5 = mrs x9, pmceid1_el0 0x09,0x9d,0x3b,0xd5 = mrs x9, pmccntr_el0 0x29,0x9d,0x3b,0xd5 = mrs x9, pmxevtyper_el0 0x49,0x9d,0x3b,0xd5 = mrs x9, pmxevcntr_el0 0x09,0x9e,0x3b,0xd5 = mrs x9, pmuserenr_el0 0x29,0x9e,0x38,0xd5 = mrs x9, pmintenset_el1 0x49,0x9e,0x38,0xd5 = mrs x9, pmintenclr_el1 0x69,0x9e,0x3b,0xd5 = mrs x9, pmovsset_el0 0x09,0xa2,0x38,0xd5 = mrs x9, mair_el1 0x09,0xa2,0x3d,0xd5 = mrs x9, mair_el12 0x09,0xa2,0x3c,0xd5 = mrs x9, mair_el2 0x09,0xa2,0x3e,0xd5 = mrs x9, mair_el3 0x09,0xa3,0x38,0xd5 = mrs x9, amair_el1 0x09,0xa3,0x3d,0xd5 = mrs x9, amair_el12 0x09,0xa3,0x3c,0xd5 = mrs x9, amair_el2 0x09,0xa3,0x3e,0xd5 = mrs x9, amair_el3 0x09,0xc0,0x38,0xd5 = mrs x9, vbar_el1 0x09,0xc0,0x3d,0xd5 = mrs x9, vbar_el12 0x09,0xc0,0x3c,0xd5 = mrs x9, vbar_el2 0x09,0xc0,0x3e,0xd5 = mrs x9, vbar_el3 0x29,0xc0,0x38,0xd5 = mrs x9, rvbar_el1 0x29,0xc0,0x3c,0xd5 = mrs x9, rvbar_el2 0x29,0xc0,0x3e,0xd5 = mrs x9, rvbar_el3 0x49,0xc0,0x38,0xd5 = mrs x9, rmr_el1 0x49,0xc0,0x3c,0xd5 = mrs x9, rmr_el2 0x49,0xc0,0x3e,0xd5 = mrs x9, rmr_el3 0x09,0xc1,0x38,0xd5 = mrs x9, isr_el1 0x29,0xd0,0x38,0xd5 = mrs x9, contextidr_el1 0x29,0xd0,0x3d,0xd5 = mrs x9, contextidr_el12 0x29,0xd0,0x3c,0xd5 = mrs x9, contextdir_el2 0x49,0xd0,0x3b,0xd5 = mrs x9, tpidr_el0 0x49,0xd0,0x3c,0xd5 = mrs x9, tpidr_el2 0x49,0xd0,0x3e,0xd5 = mrs x9, tpidr_el3 0x69,0xd0,0x3b,0xd5 = mrs x9, tpidrro_el0 0x89,0xd0,0x38,0xd5 = mrs x9, tpidr_el1 0x09,0xe0,0x3b,0xd5 = mrs x9, cntfrq_el0 0x29,0xe0,0x3b,0xd5 = mrs x9, cntpct_el0 0x49,0xe0,0x3b,0xd5 = mrs x9, cntvct_el0 0x69,0xe0,0x3c,0xd5 = mrs x9, cntvoff_el2 0x09,0xe1,0x38,0xd5 = mrs x9, cntkctl_el1 0x09,0xe1,0x3d,0xd5 = mrs x9, cntkctl_el12 0x09,0xe1,0x3c,0xd5 = mrs x9, cnthctl_el2 0x09,0xe2,0x3b,0xd5 = mrs x9, cntp_tval_el0 0x09,0xe2,0x3d,0xd5 = mrs x9, cntp_tval_el02 0x09,0xe2,0x3c,0xd5 = mrs x9, cnthp_tval_el2 0x09,0xe2,0x3f,0xd5 = mrs x9, cntps_tval_el1 0x29,0xe2,0x3b,0xd5 = mrs x9, cntp_ctl_el0 0x29,0xe2,0x3c,0xd5 = mrs x9, cnthp_ctl_el2 0x29,0xe2,0x3f,0xd5 = mrs x9, cntps_ctl_el1 0x49,0xe2,0x3b,0xd5 = mrs x9, cntp_cval_el0 0x49,0xe2,0x3d,0xd5 = mrs x9, cntp_cval_el02 0x49,0xe2,0x3c,0xd5 = mrs x9, cnthp_cval_el2 0x20,0xe3,0x3c,0xd5 = mrs x9, cnthv_ctl_el2 0x49,0xe3,0x3c,0xd5 = mrs x9, cnthv_cval_el2 0x09,0xe3,0x3c,0xd5 = mrs x9, cnthv_tval_el2 0x49,0xe2,0x3f,0xd5 = mrs x9, cntps_cval_el1 0x09,0xe3,0x3b,0xd5 = mrs x9, cntv_tval_el0 0x29,0xe3,0x3b,0xd5 = mrs x9, cntv_ctl_el0 0x29,0xe3,0x3d,0xd5 = mrs x9, cntv_ctl_el02 0x49,0xe3,0x3b,0xd5 = mrs x9, cntv_cval_el0 0x49,0xe3,0x3d,0xd5 = mrs x9, cntv_cval_el02 0x09,0xe8,0x3b,0xd5 = mrs x9, pmevcntr0_el0 0x29,0xe8,0x3b,0xd5 = mrs x9, pmevcntr1_el0 0x49,0xe8,0x3b,0xd5 = mrs x9, pmevcntr2_el0 0x69,0xe8,0x3b,0xd5 = mrs x9, pmevcntr3_el0 0x89,0xe8,0x3b,0xd5 = mrs x9, pmevcntr4_el0 0xa9,0xe8,0x3b,0xd5 = mrs x9, pmevcntr5_el0 0xc9,0xe8,0x3b,0xd5 = mrs x9, pmevcntr6_el0 0xe9,0xe8,0x3b,0xd5 = mrs x9, pmevcntr7_el0 0x09,0xe9,0x3b,0xd5 = mrs x9, pmevcntr8_el0 0x29,0xe9,0x3b,0xd5 = mrs x9, pmevcntr9_el0 0x49,0xe9,0x3b,0xd5 = mrs x9, pmevcntr10_el0 0x69,0xe9,0x3b,0xd5 = mrs x9, pmevcntr11_el0 0x89,0xe9,0x3b,0xd5 = mrs x9, pmevcntr12_el0 0xa9,0xe9,0x3b,0xd5 = mrs x9, pmevcntr13_el0 0xc9,0xe9,0x3b,0xd5 = mrs x9, pmevcntr14_el0 0xe9,0xe9,0x3b,0xd5 = mrs x9, pmevcntr15_el0 0x09,0xea,0x3b,0xd5 = mrs x9, pmevcntr16_el0 0x29,0xea,0x3b,0xd5 = mrs x9, pmevcntr17_el0 0x49,0xea,0x3b,0xd5 = mrs x9, pmevcntr18_el0 0x69,0xea,0x3b,0xd5 = mrs x9, pmevcntr19_el0 0x89,0xea,0x3b,0xd5 = mrs x9, pmevcntr20_el0 0xa9,0xea,0x3b,0xd5 = mrs x9, pmevcntr21_el0 0xc9,0xea,0x3b,0xd5 = mrs x9, pmevcntr22_el0 0xe9,0xea,0x3b,0xd5 = mrs x9, pmevcntr23_el0 0x09,0xeb,0x3b,0xd5 = mrs x9, pmevcntr24_el0 0x29,0xeb,0x3b,0xd5 = mrs x9, pmevcntr25_el0 0x49,0xeb,0x3b,0xd5 = mrs x9, pmevcntr26_el0 0x69,0xeb,0x3b,0xd5 = mrs x9, pmevcntr27_el0 0x89,0xeb,0x3b,0xd5 = mrs x9, pmevcntr28_el0 0xa9,0xeb,0x3b,0xd5 = mrs x9, pmevcntr29_el0 0xc9,0xeb,0x3b,0xd5 = mrs x9, pmevcntr30_el0 0xe9,0xef,0x3b,0xd5 = mrs x9, pmccfiltr_el0 0x09,0xec,0x3b,0xd5 = mrs x9, pmevtyper0_el0 0x29,0xec,0x3b,0xd5 = mrs x9, pmevtyper1_el0 0x49,0xec,0x3b,0xd5 = mrs x9, pmevtyper2_el0 0x69,0xec,0x3b,0xd5 = mrs x9, pmevtyper3_el0 0x89,0xec,0x3b,0xd5 = mrs x9, pmevtyper4_el0 0xa9,0xec,0x3b,0xd5 = mrs x9, pmevtyper5_el0 0xc9,0xec,0x3b,0xd5 = mrs x9, pmevtyper6_el0 0xe9,0xec,0x3b,0xd5 = mrs x9, pmevtyper7_el0 0x09,0xed,0x3b,0xd5 = mrs x9, pmevtyper8_el0 0x29,0xed,0x3b,0xd5 = mrs x9, pmevtyper9_el0 0x49,0xed,0x3b,0xd5 = mrs x9, pmevtyper10_el0 0x69,0xed,0x3b,0xd5 = mrs x9, pmevtyper11_el0 0x89,0xed,0x3b,0xd5 = mrs x9, pmevtyper12_el0 0xa9,0xed,0x3b,0xd5 = mrs x9, pmevtyper13_el0 0xc9,0xed,0x3b,0xd5 = mrs x9, pmevtyper14_el0 0xe9,0xed,0x3b,0xd5 = mrs x9, pmevtyper15_el0 0x09,0xee,0x3b,0xd5 = mrs x9, pmevtyper16_el0 0x29,0xee,0x3b,0xd5 = mrs x9, pmevtyper17_el0 0x49,0xee,0x3b,0xd5 = mrs x9, pmevtyper18_el0 0x69,0xee,0x3b,0xd5 = mrs x9, pmevtyper19_el0 0x89,0xee,0x3b,0xd5 = mrs x9, pmevtyper20_el0 0xa9,0xee,0x3b,0xd5 = mrs x9, pmevtyper21_el0 0xc9,0xee,0x3b,0xd5 = mrs x9, pmevtyper22_el0 0xe9,0xee,0x3b,0xd5 = mrs x9, pmevtyper23_el0 0x09,0xef,0x3b,0xd5 = mrs x9, pmevtyper24_el0 0x29,0xef,0x3b,0xd5 = mrs x9, pmevtyper25_el0 0x49,0xef,0x3b,0xd5 = mrs x9, pmevtyper26_el0 0x69,0xef,0x3b,0xd5 = mrs x9, pmevtyper27_el0 0x89,0xef,0x3b,0xd5 = mrs x9, pmevtyper28_el0 0xa9,0xef,0x3b,0xd5 = mrs x9, pmevtyper29_el0 0xc9,0xef,0x3b,0xd5 = mrs x9, pmevtyper30_el0 0xe9,0x99,0x38,0xd5 = mrs x9, pmsidr_el1 0xe9,0x9a,0x38,0xd5 = mrs x9, pmbidr_el1 0x09,0x9a,0x38,0xd5 = mrs x9, pmblimitr_el1 0x29,0x9a,0x38,0xd5 = mrs x9, pmbptr_el1 0x69,0x9a,0x38,0xd5 = mrs x9, pmbsr_el1 0x09,0x99,0x38,0xd5 = mrs x9, pmscr_el1 0x09,0x99,0x3d,0xd5 = mrs x9, pmscr_el12 0x09,0x99,0x3c,0xd5 = mrs x9, pmscr_el2 0x49,0x99,0x38,0xd5 = mrs x9, pmsicr_el1 0x69,0x99,0x38,0xd5 = mrs x9, pmsirr_el1 0x89,0x99,0x38,0xd5 = mrs x9, pmsfcr_el1 0xa9,0x99,0x38,0xd5 = mrs x9, pmsevfr_el1 0xc9,0x99,0x38,0xd5 = mrs x9, pmslatfr_el1 0xac,0xf1,0x3f,0xd5 = mrs x12, s3_7_c15_c1_5 0xed,0xbf,0x3a,0xd5 = mrs x13, s3_2_c11_c15_7 0x0c,0xf0,0x18,0xd5 = msr s3_0_c15_c0_0, x12 0xe5,0xbd,0x1f,0xd5 = msr s3_7_c11_c13_7, x5 0x01,0x00,0x00,0x14 = b #4 0x00,0x00,0x00,0x94 = bl #0 0xff,0xff,0xff,0x15 = b #134217724 0x00,0x00,0x00,0x96 = bl #-134217728 0x80,0x02,0x1f,0xd6 = br x20 0xe0,0x03,0x3f,0xd6 = blr xzr 0x40,0x01,0x5f,0xd6 = ret x10 0xc0,0x03,0x5f,0xd6 = ret 0xe0,0x03,0x9f,0xd6 = eret 0xe0,0x03,0xbf,0xd6 = drps capstone-sys-0.11.0/capstone/suite/MC/AArch64/gicv3-regs.s.cs010066400017500001750000000113701363402546700216150ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x08,0xcc,0x38,0xd5 = mrs x8, icc_iar1_el1 0x1a,0xc8,0x38,0xd5 = mrs x26, icc_iar0_el1 0x42,0xcc,0x38,0xd5 = mrs x2, icc_hppir1_el1 0x51,0xc8,0x38,0xd5 = mrs x17, icc_hppir0_el1 0x7d,0xcb,0x38,0xd5 = mrs x29, icc_rpr_el1 0x24,0xcb,0x3c,0xd5 = mrs x4, ich_vtr_el2 0x78,0xcb,0x3c,0xd5 = mrs x24, ich_eisr_el2 0xa9,0xcb,0x3c,0xd5 = mrs x9, ich_elsr_el2 0x78,0xcc,0x38,0xd5 = mrs x24, icc_bpr1_el1 0x6e,0xc8,0x38,0xd5 = mrs x14, icc_bpr0_el1 0x13,0x46,0x38,0xd5 = mrs x19, icc_pmr_el1 0x97,0xcc,0x38,0xd5 = mrs x23, icc_ctlr_el1 0x94,0xcc,0x3e,0xd5 = mrs x20, icc_ctlr_el3 0xbc,0xcc,0x38,0xd5 = mrs x28, icc_sre_el1 0xb9,0xc9,0x3c,0xd5 = mrs x25, icc_sre_el2 0xa8,0xcc,0x3e,0xd5 = mrs x8, icc_sre_el3 0xd6,0xcc,0x38,0xd5 = mrs x22, icc_igrpen0_el1 0xe5,0xcc,0x38,0xd5 = mrs x5, icc_igrpen1_el1 0xe7,0xcc,0x3e,0xd5 = mrs x7, icc_igrpen1_el3 0x16,0xcd,0x38,0xd5 = mrs x22, icc_seien_el1 0x84,0xc8,0x38,0xd5 = mrs x4, icc_ap0r0_el1 0xab,0xc8,0x38,0xd5 = mrs x11, icc_ap0r1_el1 0xdb,0xc8,0x38,0xd5 = mrs x27, icc_ap0r2_el1 0xf5,0xc8,0x38,0xd5 = mrs x21, icc_ap0r3_el1 0x02,0xc9,0x38,0xd5 = mrs x2, icc_ap1r0_el1 0x35,0xc9,0x38,0xd5 = mrs x21, icc_ap1r1_el1 0x4a,0xc9,0x38,0xd5 = mrs x10, icc_ap1r2_el1 0x7b,0xc9,0x38,0xd5 = mrs x27, icc_ap1r3_el1 0x14,0xc8,0x3c,0xd5 = mrs x20, ich_ap0r0_el2 0x35,0xc8,0x3c,0xd5 = mrs x21, ich_ap0r1_el2 0x45,0xc8,0x3c,0xd5 = mrs x5, ich_ap0r2_el2 0x64,0xc8,0x3c,0xd5 = mrs x4, ich_ap0r3_el2 0x0f,0xc9,0x3c,0xd5 = mrs x15, ich_ap1r0_el2 0x2c,0xc9,0x3c,0xd5 = mrs x12, ich_ap1r1_el2 0x5b,0xc9,0x3c,0xd5 = mrs x27, ich_ap1r2_el2 0x74,0xc9,0x3c,0xd5 = mrs x20, ich_ap1r3_el2 0x0a,0xcb,0x3c,0xd5 = mrs x10, ich_hcr_el2 0x5b,0xcb,0x3c,0xd5 = mrs x27, ich_misr_el2 0xe6,0xcb,0x3c,0xd5 = mrs x6, ich_vmcr_el2 0x93,0xc9,0x3c,0xd5 = mrs x19, ich_vseir_el2 0x03,0xcc,0x3c,0xd5 = mrs x3, ich_lr0_el2 0x21,0xcc,0x3c,0xd5 = mrs x1, ich_lr1_el2 0x56,0xcc,0x3c,0xd5 = mrs x22, ich_lr2_el2 0x75,0xcc,0x3c,0xd5 = mrs x21, ich_lr3_el2 0x86,0xcc,0x3c,0xd5 = mrs x6, ich_lr4_el2 0xaa,0xcc,0x3c,0xd5 = mrs x10, ich_lr5_el2 0xcb,0xcc,0x3c,0xd5 = mrs x11, ich_lr6_el2 0xec,0xcc,0x3c,0xd5 = mrs x12, ich_lr7_el2 0x00,0xcd,0x3c,0xd5 = mrs x0, ich_lr8_el2 0x35,0xcd,0x3c,0xd5 = mrs x21, ich_lr9_el2 0x4d,0xcd,0x3c,0xd5 = mrs x13, ich_lr10_el2 0x7a,0xcd,0x3c,0xd5 = mrs x26, ich_lr11_el2 0x81,0xcd,0x3c,0xd5 = mrs x1, ich_lr12_el2 0xa8,0xcd,0x3c,0xd5 = mrs x8, ich_lr13_el2 0xc2,0xcd,0x3c,0xd5 = mrs x2, ich_lr14_el2 0xe8,0xcd,0x3c,0xd5 = mrs x8, ich_lr15_el2 0x3b,0xcc,0x18,0xd5 = msr icc_eoir1_el1, x27 0x25,0xc8,0x18,0xd5 = msr icc_eoir0_el1, x5 0x2d,0xcb,0x18,0xd5 = msr icc_dir_el1, x13 0xb5,0xcb,0x18,0xd5 = msr icc_sgi1r_el1, x21 0xd9,0xcb,0x18,0xd5 = msr icc_asgi1r_el1, x25 0xfc,0xcb,0x18,0xd5 = msr icc_sgi0r_el1, x28 0x67,0xcc,0x18,0xd5 = msr icc_bpr1_el1, x7 0x69,0xc8,0x18,0xd5 = msr icc_bpr0_el1, x9 0x1d,0x46,0x18,0xd5 = msr icc_pmr_el1, x29 0x98,0xcc,0x18,0xd5 = msr icc_ctlr_el1, x24 0x80,0xcc,0x1e,0xd5 = msr icc_ctlr_el3, x0 0xa2,0xcc,0x18,0xd5 = msr icc_sre_el1, x2 0xa5,0xc9,0x1c,0xd5 = msr icc_sre_el2, x5 0xaa,0xcc,0x1e,0xd5 = msr icc_sre_el3, x10 0xd6,0xcc,0x18,0xd5 = msr icc_igrpen0_el1, x22 0xeb,0xcc,0x18,0xd5 = msr icc_igrpen1_el1, x11 0xe8,0xcc,0x1e,0xd5 = msr icc_igrpen1_el3, x8 0x04,0xcd,0x18,0xd5 = msr icc_seien_el1, x4 0x9b,0xc8,0x18,0xd5 = msr icc_ap0r0_el1, x27 0xa5,0xc8,0x18,0xd5 = msr icc_ap0r1_el1, x5 0xd4,0xc8,0x18,0xd5 = msr icc_ap0r2_el1, x20 0xe0,0xc8,0x18,0xd5 = msr icc_ap0r3_el1, x0 0x02,0xc9,0x18,0xd5 = msr icc_ap1r0_el1, x2 0x3d,0xc9,0x18,0xd5 = msr icc_ap1r1_el1, x29 0x57,0xc9,0x18,0xd5 = msr icc_ap1r2_el1, x23 0x6b,0xc9,0x18,0xd5 = msr icc_ap1r3_el1, x11 0x02,0xc8,0x1c,0xd5 = msr ich_ap0r0_el2, x2 0x3b,0xc8,0x1c,0xd5 = msr ich_ap0r1_el2, x27 0x47,0xc8,0x1c,0xd5 = msr ich_ap0r2_el2, x7 0x61,0xc8,0x1c,0xd5 = msr ich_ap0r3_el2, x1 0x07,0xc9,0x1c,0xd5 = msr ich_ap1r0_el2, x7 0x2c,0xc9,0x1c,0xd5 = msr ich_ap1r1_el2, x12 0x4e,0xc9,0x1c,0xd5 = msr ich_ap1r2_el2, x14 0x6d,0xc9,0x1c,0xd5 = msr ich_ap1r3_el2, x13 0x01,0xcb,0x1c,0xd5 = msr ich_hcr_el2, x1 0x4a,0xcb,0x1c,0xd5 = msr ich_misr_el2, x10 0xf8,0xcb,0x1c,0xd5 = msr ich_vmcr_el2, x24 0x9d,0xc9,0x1c,0xd5 = msr ich_vseir_el2, x29 0x1a,0xcc,0x1c,0xd5 = msr ich_lr0_el2, x26 0x29,0xcc,0x1c,0xd5 = msr ich_lr1_el2, x9 0x52,0xcc,0x1c,0xd5 = msr ich_lr2_el2, x18 0x7a,0xcc,0x1c,0xd5 = msr ich_lr3_el2, x26 0x96,0xcc,0x1c,0xd5 = msr ich_lr4_el2, x22 0xba,0xcc,0x1c,0xd5 = msr ich_lr5_el2, x26 0xdb,0xcc,0x1c,0xd5 = msr ich_lr6_el2, x27 0xe8,0xcc,0x1c,0xd5 = msr ich_lr7_el2, x8 0x11,0xcd,0x1c,0xd5 = msr ich_lr8_el2, x17 0x33,0xcd,0x1c,0xd5 = msr ich_lr9_el2, x19 0x51,0xcd,0x1c,0xd5 = msr ich_lr10_el2, x17 0x65,0xcd,0x1c,0xd5 = msr ich_lr11_el2, x5 0x9d,0xcd,0x1c,0xd5 = msr ich_lr12_el2, x29 0xa2,0xcd,0x1c,0xd5 = msr ich_lr13_el2, x2 0xcd,0xcd,0x1c,0xd5 = msr ich_lr14_el2, x13 0xfb,0xcd,0x1c,0xd5 = msr ich_lr15_el2, x27 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-2velem.s.cs010066400017500001750000000131041363402546700217700ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x08,0x82,0x2f = mla v0.2s, v1.2s, v2.s[2] 0x20,0x08,0x96,0x2f = mla v0.2s, v1.2s, v22.s[2] 0x03,0x01,0xa2,0x6f = mla v3.4s, v8.4s, v2.s[1] 0x03,0x09,0xb6,0x6f = mla v3.4s, v8.4s, v22.s[3] 0x20,0x00,0x62,0x2f = mla v0.4h, v1.4h, v2.h[2] 0x20,0x00,0x6f,0x2f = mla v0.4h, v1.4h, v15.h[2] 0x20,0x08,0x72,0x6f = mla v0.8h, v1.8h, v2.h[7] 0x20,0x08,0x6e,0x6f = mla v0.8h, v1.8h, v14.h[6] 0x20,0x48,0x82,0x2f = mls v0.2s, v1.2s, v2.s[2] 0x20,0x48,0x96,0x2f = mls v0.2s, v1.2s, v22.s[2] 0x03,0x41,0xa2,0x6f = mls v3.4s, v8.4s, v2.s[1] 0x03,0x49,0xb6,0x6f = mls v3.4s, v8.4s, v22.s[3] 0x20,0x40,0x62,0x2f = mls v0.4h, v1.4h, v2.h[2] 0x20,0x40,0x6f,0x2f = mls v0.4h, v1.4h, v15.h[2] 0x20,0x48,0x72,0x6f = mls v0.8h, v1.8h, v2.h[7] 0x20,0x48,0x6e,0x6f = mls v0.8h, v1.8h, v14.h[6] 0x20,0x18,0x82,0x0f = fmla v0.2s, v1.2s, v2.s[2] 0x20,0x18,0x96,0x0f = fmla v0.2s, v1.2s, v22.s[2] 0x03,0x11,0xa2,0x4f = fmla v3.4s, v8.4s, v2.s[1] 0x03,0x19,0xb6,0x4f = fmla v3.4s, v8.4s, v22.s[3] 0x20,0x18,0xc2,0x4f = fmla v0.2d, v1.2d, v2.d[1] 0x20,0x18,0xd6,0x4f = fmla v0.2d, v1.2d, v22.d[1] 0x20,0x58,0x82,0x0f = fmls v0.2s, v1.2s, v2.s[2] 0x20,0x58,0x96,0x0f = fmls v0.2s, v1.2s, v22.s[2] 0x03,0x51,0xa2,0x4f = fmls v3.4s, v8.4s, v2.s[1] 0x03,0x59,0xb6,0x4f = fmls v3.4s, v8.4s, v22.s[3] 0x20,0x58,0xc2,0x4f = fmls v0.2d, v1.2d, v2.d[1] 0x20,0x58,0xd6,0x4f = fmls v0.2d, v1.2d, v22.d[1] 0x20,0x20,0x62,0x0f = smlal v0.4s, v1.4h, v2.h[2] 0x20,0x28,0x82,0x0f = smlal v0.2d, v1.2s, v2.s[2] 0x20,0x28,0x96,0x0f = smlal v0.2d, v1.2s, v22.s[2] 0x20,0x20,0x61,0x4f = smlal2 v0.4s, v1.8h, v1.h[2] 0x20,0x28,0x81,0x4f = smlal2 v0.2d, v1.4s, v1.s[2] 0x20,0x28,0x96,0x4f = smlal2 v0.2d, v1.4s, v22.s[2] 0x20,0x60,0x62,0x0f = smlsl v0.4s, v1.4h, v2.h[2] 0x20,0x68,0x82,0x0f = smlsl v0.2d, v1.2s, v2.s[2] 0x20,0x68,0x96,0x0f = smlsl v0.2d, v1.2s, v22.s[2] 0x20,0x60,0x61,0x4f = smlsl2 v0.4s, v1.8h, v1.h[2] 0x20,0x68,0x81,0x4f = smlsl2 v0.2d, v1.4s, v1.s[2] 0x20,0x68,0x96,0x4f = smlsl2 v0.2d, v1.4s, v22.s[2] 0x20,0x30,0x62,0x0f = sqdmlal v0.4s, v1.4h, v2.h[2] 0x20,0x38,0x82,0x0f = sqdmlal v0.2d, v1.2s, v2.s[2] 0x20,0x38,0x96,0x0f = sqdmlal v0.2d, v1.2s, v22.s[2] 0x20,0x30,0x61,0x4f = sqdmlal2 v0.4s, v1.8h, v1.h[2] 0x20,0x38,0x81,0x4f = sqdmlal2 v0.2d, v1.4s, v1.s[2] 0x20,0x38,0x96,0x4f = sqdmlal2 v0.2d, v1.4s, v22.s[2] 0x20,0x20,0x62,0x2f = umlal v0.4s, v1.4h, v2.h[2] 0x20,0x28,0x82,0x2f = umlal v0.2d, v1.2s, v2.s[2] 0x20,0x28,0x96,0x2f = umlal v0.2d, v1.2s, v22.s[2] 0x20,0x20,0x61,0x6f = umlal2 v0.4s, v1.8h, v1.h[2] 0x20,0x28,0x81,0x6f = umlal2 v0.2d, v1.4s, v1.s[2] 0x20,0x28,0x96,0x6f = umlal2 v0.2d, v1.4s, v22.s[2] 0x20,0x60,0x62,0x2f = umlsl v0.4s, v1.4h, v2.h[2] 0x20,0x68,0x82,0x2f = umlsl v0.2d, v1.2s, v2.s[2] 0x20,0x68,0x96,0x2f = umlsl v0.2d, v1.2s, v22.s[2] 0x20,0x60,0x61,0x6f = umlsl2 v0.4s, v1.8h, v1.h[2] 0x20,0x68,0x81,0x6f = umlsl2 v0.2d, v1.4s, v1.s[2] 0x20,0x68,0x96,0x6f = umlsl2 v0.2d, v1.4s, v22.s[2] 0x20,0x70,0x62,0x0f = sqdmlsl v0.4s, v1.4h, v2.h[2] 0x20,0x78,0x82,0x0f = sqdmlsl v0.2d, v1.2s, v2.s[2] 0x20,0x78,0x96,0x0f = sqdmlsl v0.2d, v1.2s, v22.s[2] 0x20,0x70,0x61,0x4f = sqdmlsl2 v0.4s, v1.8h, v1.h[2] 0x20,0x78,0x81,0x4f = sqdmlsl2 v0.2d, v1.4s, v1.s[2] 0x20,0x78,0x96,0x4f = sqdmlsl2 v0.2d, v1.4s, v22.s[2] 0x20,0x80,0x62,0x0f = mul v0.4h, v1.4h, v2.h[2] 0x20,0x80,0x62,0x4f = mul v0.8h, v1.8h, v2.h[2] 0x20,0x88,0x82,0x0f = mul v0.2s, v1.2s, v2.s[2] 0x20,0x88,0x96,0x0f = mul v0.2s, v1.2s, v22.s[2] 0x20,0x88,0x82,0x4f = mul v0.4s, v1.4s, v2.s[2] 0x20,0x88,0x96,0x4f = mul v0.4s, v1.4s, v22.s[2] 0x20,0x98,0x82,0x0f = fmul v0.2s, v1.2s, v2.s[2] 0x20,0x98,0x96,0x0f = fmul v0.2s, v1.2s, v22.s[2] 0x20,0x98,0x82,0x4f = fmul v0.4s, v1.4s, v2.s[2] 0x20,0x98,0x96,0x4f = fmul v0.4s, v1.4s, v22.s[2] 0x20,0x98,0xc2,0x4f = fmul v0.2d, v1.2d, v2.d[1] 0x20,0x98,0xd6,0x4f = fmul v0.2d, v1.2d, v22.d[1] 0x20,0x98,0x82,0x2f = fmulx v0.2s, v1.2s, v2.s[2] 0x20,0x98,0x96,0x2f = fmulx v0.2s, v1.2s, v22.s[2] 0x20,0x98,0x82,0x6f = fmulx v0.4s, v1.4s, v2.s[2] 0x20,0x98,0x96,0x6f = fmulx v0.4s, v1.4s, v22.s[2] 0x20,0x98,0xc2,0x6f = fmulx v0.2d, v1.2d, v2.d[1] 0x20,0x98,0xd6,0x6f = fmulx v0.2d, v1.2d, v22.d[1] 0x20,0xa0,0x62,0x0f = smull v0.4s, v1.4h, v2.h[2] 0x20,0xa8,0x82,0x0f = smull v0.2d, v1.2s, v2.s[2] 0x20,0xa8,0x96,0x0f = smull v0.2d, v1.2s, v22.s[2] 0x20,0xa0,0x62,0x4f = smull2 v0.4s, v1.8h, v2.h[2] 0x20,0xa8,0x82,0x4f = smull2 v0.2d, v1.4s, v2.s[2] 0x20,0xa8,0x96,0x4f = smull2 v0.2d, v1.4s, v22.s[2] 0x20,0xa0,0x62,0x2f = umull v0.4s, v1.4h, v2.h[2] 0x20,0xa8,0x82,0x2f = umull v0.2d, v1.2s, v2.s[2] 0x20,0xa8,0x96,0x2f = umull v0.2d, v1.2s, v22.s[2] 0x20,0xa0,0x62,0x6f = umull2 v0.4s, v1.8h, v2.h[2] 0x20,0xa8,0x82,0x6f = umull2 v0.2d, v1.4s, v2.s[2] 0x20,0xa8,0x96,0x6f = umull2 v0.2d, v1.4s, v22.s[2] 0x20,0xb0,0x62,0x0f = sqdmull v0.4s, v1.4h, v2.h[2] 0x20,0xb8,0x82,0x0f = sqdmull v0.2d, v1.2s, v2.s[2] 0x20,0xb8,0x96,0x0f = sqdmull v0.2d, v1.2s, v22.s[2] 0x20,0xb0,0x62,0x4f = sqdmull2 v0.4s, v1.8h, v2.h[2] 0x20,0xb8,0x82,0x4f = sqdmull2 v0.2d, v1.4s, v2.s[2] 0x20,0xb8,0x96,0x4f = sqdmull2 v0.2d, v1.4s, v22.s[2] 0x20,0xc0,0x62,0x0f = sqdmulh v0.4h, v1.4h, v2.h[2] 0x20,0xc0,0x62,0x4f = sqdmulh v0.8h, v1.8h, v2.h[2] 0x20,0xc8,0x82,0x0f = sqdmulh v0.2s, v1.2s, v2.s[2] 0x20,0xc8,0x96,0x0f = sqdmulh v0.2s, v1.2s, v22.s[2] 0x20,0xc8,0x82,0x4f = sqdmulh v0.4s, v1.4s, v2.s[2] 0x20,0xc8,0x96,0x4f = sqdmulh v0.4s, v1.4s, v22.s[2] 0x20,0xd0,0x62,0x0f = sqrdmulh v0.4h, v1.4h, v2.h[2] 0x20,0xd0,0x62,0x4f = sqrdmulh v0.8h, v1.8h, v2.h[2] 0x20,0xd8,0x82,0x0f = sqrdmulh v0.2s, v1.2s, v2.s[2] 0x20,0xd8,0x96,0x0f = sqrdmulh v0.2s, v1.2s, v22.s[2] 0x20,0xd8,0x82,0x4f = sqrdmulh v0.4s, v1.4s, v2.s[2] 0x20,0xd8,0x96,0x4f = sqrdmulh v0.4s, v1.4s, v22.s[2] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-3vdiff.s.cs010066400017500001750000000155111363402546700217630ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x00,0x22,0x0e = saddl v0.8h, v1.8b, v2.8b 0x20,0x00,0x62,0x0e = saddl v0.4s, v1.4h, v2.4h 0x20,0x00,0xa2,0x0e = saddl v0.2d, v1.2s, v2.2s 0x20,0x00,0x62,0x4e = saddl2 v0.4s, v1.8h, v2.8h 0x20,0x00,0x22,0x4e = saddl2 v0.8h, v1.16b, v2.16b 0x20,0x00,0xa2,0x4e = saddl2 v0.2d, v1.4s, v2.4s 0x20,0x00,0x22,0x2e = uaddl v0.8h, v1.8b, v2.8b 0x20,0x00,0x62,0x2e = uaddl v0.4s, v1.4h, v2.4h 0x20,0x00,0xa2,0x2e = uaddl v0.2d, v1.2s, v2.2s 0x20,0x00,0x22,0x6e = uaddl2 v0.8h, v1.16b, v2.16b 0x20,0x00,0x62,0x6e = uaddl2 v0.4s, v1.8h, v2.8h 0x20,0x00,0xa2,0x6e = uaddl2 v0.2d, v1.4s, v2.4s 0x20,0x20,0x22,0x0e = ssubl v0.8h, v1.8b, v2.8b 0x20,0x20,0x62,0x0e = ssubl v0.4s, v1.4h, v2.4h 0x20,0x20,0xa2,0x0e = ssubl v0.2d, v1.2s, v2.2s 0x20,0x20,0x22,0x4e = ssubl2 v0.8h, v1.16b, v2.16b 0x20,0x20,0x62,0x4e = ssubl2 v0.4s, v1.8h, v2.8h 0x20,0x20,0xa2,0x4e = ssubl2 v0.2d, v1.4s, v2.4s 0x20,0x20,0x22,0x2e = usubl v0.8h, v1.8b, v2.8b 0x20,0x20,0x62,0x2e = usubl v0.4s, v1.4h, v2.4h 0x20,0x20,0xa2,0x2e = usubl v0.2d, v1.2s, v2.2s 0x20,0x20,0x22,0x6e = usubl2 v0.8h, v1.16b, v2.16b 0x20,0x20,0x62,0x6e = usubl2 v0.4s, v1.8h, v2.8h 0x20,0x20,0xa2,0x6e = usubl2 v0.2d, v1.4s, v2.4s 0x20,0x50,0x22,0x0e = sabal v0.8h, v1.8b, v2.8b 0x20,0x50,0x62,0x0e = sabal v0.4s, v1.4h, v2.4h 0x20,0x50,0xa2,0x0e = sabal v0.2d, v1.2s, v2.2s 0x20,0x50,0x22,0x4e = sabal2 v0.8h, v1.16b, v2.16b 0x20,0x50,0x62,0x4e = sabal2 v0.4s, v1.8h, v2.8h 0x20,0x50,0xa2,0x4e = sabal2 v0.2d, v1.4s, v2.4s 0x20,0x50,0x22,0x2e = uabal v0.8h, v1.8b, v2.8b 0x20,0x50,0x62,0x2e = uabal v0.4s, v1.4h, v2.4h 0x20,0x50,0xa2,0x2e = uabal v0.2d, v1.2s, v2.2s 0x20,0x50,0x22,0x6e = uabal2 v0.8h, v1.16b, v2.16b 0x20,0x50,0x62,0x6e = uabal2 v0.4s, v1.8h, v2.8h 0x20,0x50,0xa2,0x6e = uabal2 v0.2d, v1.4s, v2.4s 0x20,0x70,0x22,0x0e = sabdl v0.8h, v1.8b, v2.8b 0x20,0x70,0x62,0x0e = sabdl v0.4s, v1.4h, v2.4h 0x20,0x70,0xa2,0x0e = sabdl v0.2d, v1.2s, v2.2s 0x20,0x70,0x22,0x4e = sabdl2 v0.8h, v1.16b, v2.16b 0x20,0x70,0x62,0x4e = sabdl2 v0.4s, v1.8h, v2.8h 0x20,0x70,0xa2,0x4e = sabdl2 v0.2d, v1.4s, v2.4s 0x20,0x70,0x22,0x2e = uabdl v0.8h, v1.8b, v2.8b 0x20,0x70,0x62,0x2e = uabdl v0.4s, v1.4h, v2.4h 0x20,0x70,0xa2,0x2e = uabdl v0.2d, v1.2s, v2.2s 0x20,0x70,0x22,0x6e = uabdl2 v0.8h, v1.16b, v2.16b 0x20,0x70,0x62,0x6e = uabdl2 v0.4s, v1.8h, v2.8h 0x20,0x70,0xa2,0x6e = uabdl2 v0.2d, v1.4s, v2.4s 0x20,0x80,0x22,0x0e = smlal v0.8h, v1.8b, v2.8b 0x20,0x80,0x62,0x0e = smlal v0.4s, v1.4h, v2.4h 0x20,0x80,0xa2,0x0e = smlal v0.2d, v1.2s, v2.2s 0x20,0x80,0x22,0x4e = smlal2 v0.8h, v1.16b, v2.16b 0x20,0x80,0x62,0x4e = smlal2 v0.4s, v1.8h, v2.8h 0x20,0x80,0xa2,0x4e = smlal2 v0.2d, v1.4s, v2.4s 0x20,0x80,0x22,0x2e = umlal v0.8h, v1.8b, v2.8b 0x20,0x80,0x62,0x2e = umlal v0.4s, v1.4h, v2.4h 0x20,0x80,0xa2,0x2e = umlal v0.2d, v1.2s, v2.2s 0x20,0x80,0x22,0x6e = umlal2 v0.8h, v1.16b, v2.16b 0x20,0x80,0x62,0x6e = umlal2 v0.4s, v1.8h, v2.8h 0x20,0x80,0xa2,0x6e = umlal2 v0.2d, v1.4s, v2.4s 0x20,0xa0,0x22,0x0e = smlsl v0.8h, v1.8b, v2.8b 0x20,0xa0,0x62,0x0e = smlsl v0.4s, v1.4h, v2.4h 0x20,0xa0,0xa2,0x0e = smlsl v0.2d, v1.2s, v2.2s 0x20,0xa0,0x22,0x4e = smlsl2 v0.8h, v1.16b, v2.16b 0x20,0xa0,0x62,0x4e = smlsl2 v0.4s, v1.8h, v2.8h 0x20,0xa0,0xa2,0x4e = smlsl2 v0.2d, v1.4s, v2.4s 0x20,0xa0,0x22,0x2e = umlsl v0.8h, v1.8b, v2.8b 0x20,0xa0,0x62,0x2e = umlsl v0.4s, v1.4h, v2.4h 0x20,0xa0,0xa2,0x2e = umlsl v0.2d, v1.2s, v2.2s 0x20,0xa0,0x22,0x6e = umlsl2 v0.8h, v1.16b, v2.16b 0x20,0xa0,0x62,0x6e = umlsl2 v0.4s, v1.8h, v2.8h 0x20,0xa0,0xa2,0x6e = umlsl2 v0.2d, v1.4s, v2.4s 0x20,0xc0,0x22,0x0e = smull v0.8h, v1.8b, v2.8b 0x20,0xc0,0x62,0x0e = smull v0.4s, v1.4h, v2.4h 0x20,0xc0,0xa2,0x0e = smull v0.2d, v1.2s, v2.2s 0x20,0xc0,0x22,0x4e = smull2 v0.8h, v1.16b, v2.16b 0x20,0xc0,0x62,0x4e = smull2 v0.4s, v1.8h, v2.8h 0x20,0xc0,0xa2,0x4e = smull2 v0.2d, v1.4s, v2.4s 0x20,0xc0,0x22,0x2e = umull v0.8h, v1.8b, v2.8b 0x20,0xc0,0x62,0x2e = umull v0.4s, v1.4h, v2.4h 0x20,0xc0,0xa2,0x2e = umull v0.2d, v1.2s, v2.2s 0x20,0xc0,0x22,0x6e = umull2 v0.8h, v1.16b, v2.16b 0x20,0xc0,0x62,0x6e = umull2 v0.4s, v1.8h, v2.8h 0x20,0xc0,0xa2,0x6e = umull2 v0.2d, v1.4s, v2.4s 0x20,0x90,0x62,0x0e = sqdmlal v0.4s, v1.4h, v2.4h 0x20,0x90,0xa2,0x0e = sqdmlal v0.2d, v1.2s, v2.2s 0x20,0x90,0x62,0x4e = sqdmlal2 v0.4s, v1.8h, v2.8h 0x20,0x90,0xa2,0x4e = sqdmlal2 v0.2d, v1.4s, v2.4s 0x20,0xb0,0x62,0x0e = sqdmlsl v0.4s, v1.4h, v2.4h 0x20,0xb0,0xa2,0x0e = sqdmlsl v0.2d, v1.2s, v2.2s 0x20,0xb0,0x62,0x4e = sqdmlsl2 v0.4s, v1.8h, v2.8h 0x20,0xb0,0xa2,0x4e = sqdmlsl2 v0.2d, v1.4s, v2.4s 0x20,0xd0,0x62,0x0e = sqdmull v0.4s, v1.4h, v2.4h 0x20,0xd0,0xa2,0x0e = sqdmull v0.2d, v1.2s, v2.2s 0x20,0xd0,0x62,0x4e = sqdmull2 v0.4s, v1.8h, v2.8h 0x20,0xd0,0xa2,0x4e = sqdmull2 v0.2d, v1.4s, v2.4s 0x20,0xe0,0x22,0x0e = pmull v0.8h, v1.8b, v2.8b 0x20,0xe0,0xe2,0x0e = pmull v0.1q, v1.1d, v2.1d 0x20,0xe0,0x22,0x4e = pmull2 v0.8h, v1.16b, v2.16b 0x20,0xe0,0xe2,0x4e = pmull2 v0.1q, v1.2d, v2.2d 0x20,0x10,0x22,0x0e = saddw v0.8h, v1.8h, v2.8b 0x20,0x10,0x62,0x0e = saddw v0.4s, v1.4s, v2.4h 0x20,0x10,0xa2,0x0e = saddw v0.2d, v1.2d, v2.2s 0x20,0x10,0x22,0x4e = saddw2 v0.8h, v1.8h, v2.16b 0x20,0x10,0x62,0x4e = saddw2 v0.4s, v1.4s, v2.8h 0x20,0x10,0xa2,0x4e = saddw2 v0.2d, v1.2d, v2.4s 0x20,0x10,0x22,0x2e = uaddw v0.8h, v1.8h, v2.8b 0x20,0x10,0x62,0x2e = uaddw v0.4s, v1.4s, v2.4h 0x20,0x10,0xa2,0x2e = uaddw v0.2d, v1.2d, v2.2s 0x20,0x10,0x22,0x6e = uaddw2 v0.8h, v1.8h, v2.16b 0x20,0x10,0x62,0x6e = uaddw2 v0.4s, v1.4s, v2.8h 0x20,0x10,0xa2,0x6e = uaddw2 v0.2d, v1.2d, v2.4s 0x20,0x30,0x22,0x0e = ssubw v0.8h, v1.8h, v2.8b 0x20,0x30,0x62,0x0e = ssubw v0.4s, v1.4s, v2.4h 0x20,0x30,0xa2,0x0e = ssubw v0.2d, v1.2d, v2.2s 0x20,0x30,0x22,0x4e = ssubw2 v0.8h, v1.8h, v2.16b 0x20,0x30,0x62,0x4e = ssubw2 v0.4s, v1.4s, v2.8h 0x20,0x30,0xa2,0x4e = ssubw2 v0.2d, v1.2d, v2.4s 0x20,0x30,0x22,0x2e = usubw v0.8h, v1.8h, v2.8b 0x20,0x30,0x62,0x2e = usubw v0.4s, v1.4s, v2.4h 0x20,0x30,0xa2,0x2e = usubw v0.2d, v1.2d, v2.2s 0x20,0x30,0x22,0x6e = usubw2 v0.8h, v1.8h, v2.16b 0x20,0x30,0x62,0x6e = usubw2 v0.4s, v1.4s, v2.8h 0x20,0x30,0xa2,0x6e = usubw2 v0.2d, v1.2d, v2.4s 0x20,0x40,0x22,0x0e = addhn v0.8b, v1.8h, v2.8h 0x20,0x40,0x62,0x0e = addhn v0.4h, v1.4s, v2.4s 0x20,0x40,0xa2,0x0e = addhn v0.2s, v1.2d, v2.2d 0x20,0x40,0x22,0x4e = addhn2 v0.16b, v1.8h, v2.8h 0x20,0x40,0x62,0x4e = addhn2 v0.8h, v1.4s, v2.4s 0x20,0x40,0xa2,0x4e = addhn2 v0.4s, v1.2d, v2.2d 0x20,0x40,0x22,0x2e = raddhn v0.8b, v1.8h, v2.8h 0x20,0x40,0x62,0x2e = raddhn v0.4h, v1.4s, v2.4s 0x20,0x40,0xa2,0x2e = raddhn v0.2s, v1.2d, v2.2d 0x20,0x40,0x22,0x6e = raddhn2 v0.16b, v1.8h, v2.8h 0x20,0x40,0x62,0x6e = raddhn2 v0.8h, v1.4s, v2.4s 0x20,0x40,0xa2,0x6e = raddhn2 v0.4s, v1.2d, v2.2d 0x20,0x60,0x22,0x2e = rsubhn v0.8b, v1.8h, v2.8h 0x20,0x60,0x62,0x2e = rsubhn v0.4h, v1.4s, v2.4s 0x20,0x60,0xa2,0x2e = rsubhn v0.2s, v1.2d, v2.2d 0x20,0x60,0x22,0x6e = rsubhn2 v0.16b, v1.8h, v2.8h 0x20,0x60,0x62,0x6e = rsubhn2 v0.8h, v1.4s, v2.4s 0x20,0x60,0xa2,0x6e = rsubhn2 v0.4s, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-aba-abd.s.cs010066400017500001750000000024361363402546700220530ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x7c,0x22,0x2e = uaba v0.8b, v1.8b, v2.8b 0x20,0x7c,0x22,0x6e = uaba v0.16b, v1.16b, v2.16b 0x20,0x7c,0x62,0x2e = uaba v0.4h, v1.4h, v2.4h 0x20,0x7c,0x62,0x6e = uaba v0.8h, v1.8h, v2.8h 0x20,0x7c,0xa2,0x2e = uaba v0.2s, v1.2s, v2.2s 0x20,0x7c,0xa2,0x6e = uaba v0.4s, v1.4s, v2.4s 0x20,0x7c,0x22,0x0e = saba v0.8b, v1.8b, v2.8b 0x20,0x7c,0x22,0x4e = saba v0.16b, v1.16b, v2.16b 0x20,0x7c,0x62,0x0e = saba v0.4h, v1.4h, v2.4h 0x20,0x7c,0x62,0x4e = saba v0.8h, v1.8h, v2.8h 0x20,0x7c,0xa2,0x0e = saba v0.2s, v1.2s, v2.2s 0x20,0x7c,0xa2,0x4e = saba v0.4s, v1.4s, v2.4s 0x20,0x74,0x22,0x2e = uabd v0.8b, v1.8b, v2.8b 0x20,0x74,0x22,0x6e = uabd v0.16b, v1.16b, v2.16b 0x20,0x74,0x62,0x2e = uabd v0.4h, v1.4h, v2.4h 0x20,0x74,0x62,0x6e = uabd v0.8h, v1.8h, v2.8h 0x20,0x74,0xa2,0x2e = uabd v0.2s, v1.2s, v2.2s 0x20,0x74,0xa2,0x6e = uabd v0.4s, v1.4s, v2.4s 0x20,0x74,0x22,0x0e = sabd v0.8b, v1.8b, v2.8b 0x20,0x74,0x22,0x4e = sabd v0.16b, v1.16b, v2.16b 0x20,0x74,0x62,0x0e = sabd v0.4h, v1.4h, v2.4h 0x20,0x74,0x62,0x4e = sabd v0.8h, v1.8h, v2.8h 0x20,0x74,0xa2,0x0e = sabd v0.2s, v1.2s, v2.2s 0x20,0x74,0xa2,0x4e = sabd v0.4s, v1.4s, v2.4s 0x20,0xd4,0xa2,0x2e = fabd v0.2s, v1.2s, v2.2s 0xff,0xd5,0xb0,0x6e = fabd v31.4s, v15.4s, v16.4s 0x07,0xd5,0xf9,0x6e = fabd v7.2d, v8.2d, v25.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-across.s.cs010066400017500001750000000027631363402546700221010ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s 0x20,0x38,0x30,0x2e = uaddlv h0, v1.8b 0x20,0x38,0x30,0x6e = uaddlv h0, v1.16b 0x20,0x38,0x70,0x2e = uaddlv s0, v1.4h 0x20,0x38,0x70,0x6e = uaddlv s0, v1.8h 0x20,0x38,0xb0,0x6e = uaddlv d0, v1.4s 0x20,0xa8,0x30,0x0e = smaxv b0, v1.8b 0x20,0xa8,0x30,0x4e = smaxv b0, v1.16b 0x20,0xa8,0x70,0x0e = smaxv h0, v1.4h 0x20,0xa8,0x70,0x4e = smaxv h0, v1.8h 0x20,0xa8,0xb0,0x4e = smaxv s0, v1.4s 0x20,0xa8,0x31,0x0e = sminv b0, v1.8b 0x20,0xa8,0x31,0x4e = sminv b0, v1.16b 0x20,0xa8,0x71,0x0e = sminv h0, v1.4h 0x20,0xa8,0x71,0x4e = sminv h0, v1.8h 0x20,0xa8,0xb1,0x4e = sminv s0, v1.4s 0x20,0xa8,0x30,0x2e = umaxv b0, v1.8b 0x20,0xa8,0x30,0x6e = umaxv b0, v1.16b 0x20,0xa8,0x70,0x2e = umaxv h0, v1.4h 0x20,0xa8,0x70,0x6e = umaxv h0, v1.8h 0x20,0xa8,0xb0,0x6e = umaxv s0, v1.4s 0x20,0xa8,0x31,0x2e = uminv b0, v1.8b 0x20,0xa8,0x31,0x6e = uminv b0, v1.16b 0x20,0xa8,0x71,0x2e = uminv h0, v1.4h 0x20,0xa8,0x71,0x6e = uminv h0, v1.8h 0x20,0xa8,0xb1,0x6e = uminv s0, v1.4s 0x20,0xb8,0x31,0x0e = addv b0, v1.8b 0x20,0xb8,0x31,0x4e = addv b0, v1.16b 0x20,0xb8,0x71,0x0e = addv h0, v1.4h 0x20,0xb8,0x71,0x4e = addv h0, v1.8h 0x20,0xb8,0xb1,0x4e = addv s0, v1.4s 0x20,0xc8,0x30,0x6e = fmaxnmv s0, v1.4s 0x20,0xc8,0xb0,0x6e = fminnmv s0, v1.4s 0x20,0xf8,0x30,0x6e = fmaxv s0, v1.4s 0x20,0xf8,0xb0,0x6e = fminv s0, v1.4s capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-add-pairwise.s.cs010066400017500001750000000007651363402546700231600ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d 0x20,0xd4,0x22,0x2e = faddp v0.2s, v1.2s, v2.2s 0x20,0xd4,0x22,0x6e = faddp v0.4s, v1.4s, v2.4s 0x20,0xd4,0x62,0x6e = faddp v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-add-sub-instructions.s.cs010066400017500001750000000016751363402546700246710ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x84,0x22,0x0e = add v0.8b, v1.8b, v2.8b 0x20,0x84,0x22,0x4e = add v0.16b, v1.16b, v2.16b 0x20,0x84,0x62,0x0e = add v0.4h, v1.4h, v2.4h 0x20,0x84,0x62,0x4e = add v0.8h, v1.8h, v2.8h 0x20,0x84,0xa2,0x0e = add v0.2s, v1.2s, v2.2s 0x20,0x84,0xa2,0x4e = add v0.4s, v1.4s, v2.4s 0x20,0x84,0xe2,0x4e = add v0.2d, v1.2d, v2.2d 0x20,0x84,0x22,0x2e = sub v0.8b, v1.8b, v2.8b 0x20,0x84,0x22,0x6e = sub v0.16b, v1.16b, v2.16b 0x20,0x84,0x62,0x2e = sub v0.4h, v1.4h, v2.4h 0x20,0x84,0x62,0x6e = sub v0.8h, v1.8h, v2.8h 0x20,0x84,0xa2,0x2e = sub v0.2s, v1.2s, v2.2s 0x20,0x84,0xa2,0x6e = sub v0.4s, v1.4s, v2.4s 0x20,0x84,0xe2,0x6e = sub v0.2d, v1.2d, v2.2d 0x20,0xd4,0x22,0x0e = fadd v0.2s, v1.2s, v2.2s 0x20,0xd4,0x22,0x4e = fadd v0.4s, v1.4s, v2.4s 0x20,0xd4,0x62,0x4e = fadd v0.2d, v1.2d, v2.2d 0x20,0xd4,0xa2,0x0e = fsub v0.2s, v1.2s, v2.2s 0x20,0xd4,0xa2,0x4e = fsub v0.4s, v1.4s, v2.4s 0x20,0xd4,0xe2,0x4e = fsub v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-bitwise-instructions.s.cs010066400017500001750000000014211363402546700250050ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x1c,0x22,0x0e = and v0.8b, v1.8b, v2.8b 0x20,0x1c,0x22,0x4e = and v0.16b, v1.16b, v2.16b 0x20,0x1c,0xa2,0x0e = orr v0.8b, v1.8b, v2.8b 0x20,0x1c,0xa2,0x4e = orr v0.16b, v1.16b, v2.16b 0x20,0x1c,0x22,0x2e = eor v0.8b, v1.8b, v2.8b 0x20,0x1c,0x22,0x6e = eor v0.16b, v1.16b, v2.16b 0x20,0x1c,0xa2,0x2e = bit v0.8b, v1.8b, v2.8b 0x20,0x1c,0xa2,0x6e = bit v0.16b, v1.16b, v2.16b 0x20,0x1c,0xe2,0x2e = bif v0.8b, v1.8b, v2.8b 0x20,0x1c,0xe2,0x6e = bif v0.16b, v1.16b, v2.16b 0x20,0x1c,0x62,0x2e = bsl v0.8b, v1.8b, v2.8b 0x20,0x1c,0x62,0x6e = bsl v0.16b, v1.16b, v2.16b 0x20,0x1c,0xe2,0x0e = orn v0.8b, v1.8b, v2.8b 0x20,0x1c,0xe2,0x4e = orn v0.16b, v1.16b, v2.16b 0x20,0x1c,0x62,0x0e = bic v0.8b, v1.8b, v2.8b 0x20,0x1c,0x62,0x4e = bic v0.16b, v1.16b, v2.16b capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-compare-instructions.s.cs010066400017500001750000000146701363402546700247770ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xe0,0x8d,0x31,0x2e = cmeq v0.8b, v15.8b, v17.8b 0xe1,0x8f,0x28,0x6e = cmeq v1.16b, v31.16b, v8.16b 0x0f,0x8e,0x71,0x2e = cmeq v15.4h, v16.4h, v17.4h 0xc5,0x8c,0x67,0x6e = cmeq v5.8h, v6.8h, v7.8h 0x7d,0x8f,0xbc,0x2e = cmeq v29.2s, v27.2s, v28.2s 0xe9,0x8c,0xa8,0x6e = cmeq v9.4s, v7.4s, v8.4s 0xe3,0x8f,0xf5,0x6e = cmeq v3.2d, v31.2d, v21.2d 0xe0,0x3d,0x31,0x2e = cmhs v0.8b, v15.8b, v17.8b 0xe1,0x3f,0x28,0x6e = cmhs v1.16b, v31.16b, v8.16b 0x0f,0x3e,0x71,0x2e = cmhs v15.4h, v16.4h, v17.4h 0xc5,0x3c,0x67,0x6e = cmhs v5.8h, v6.8h, v7.8h 0x7d,0x3f,0xbc,0x2e = cmhs v29.2s, v27.2s, v28.2s 0xe9,0x3c,0xa8,0x6e = cmhs v9.4s, v7.4s, v8.4s 0xe3,0x3f,0xf5,0x6e = cmhs v3.2d, v31.2d, v21.2d 0xe0,0x3d,0x31,0x2e = cmhs v0.8b, v15.8b, v17.8b 0xe1,0x3f,0x28,0x6e = cmhs v1.16b, v31.16b, v8.16b 0x0f,0x3e,0x71,0x2e = cmhs v15.4h, v16.4h, v17.4h 0xc5,0x3c,0x67,0x6e = cmhs v5.8h, v6.8h, v7.8h 0x7d,0x3f,0xbc,0x2e = cmhs v29.2s, v27.2s, v28.2s 0xe9,0x3c,0xa8,0x6e = cmhs v9.4s, v7.4s, v8.4s 0xe3,0x3f,0xf5,0x6e = cmhs v3.2d, v31.2d, v21.2d 0xe0,0x3d,0x31,0x0e = cmge v0.8b, v15.8b, v17.8b 0xe1,0x3f,0x28,0x4e = cmge v1.16b, v31.16b, v8.16b 0x0f,0x3e,0x71,0x0e = cmge v15.4h, v16.4h, v17.4h 0xc5,0x3c,0x67,0x4e = cmge v5.8h, v6.8h, v7.8h 0x7d,0x3f,0xbc,0x0e = cmge v29.2s, v27.2s, v28.2s 0xe9,0x3c,0xa8,0x4e = cmge v9.4s, v7.4s, v8.4s 0xe3,0x3f,0xf5,0x4e = cmge v3.2d, v31.2d, v21.2d 0xe0,0x3d,0x31,0x0e = cmge v0.8b, v15.8b, v17.8b 0xe1,0x3f,0x28,0x4e = cmge v1.16b, v31.16b, v8.16b 0x0f,0x3e,0x71,0x0e = cmge v15.4h, v16.4h, v17.4h 0xc5,0x3c,0x67,0x4e = cmge v5.8h, v6.8h, v7.8h 0x7d,0x3f,0xbc,0x0e = cmge v29.2s, v27.2s, v28.2s 0xe9,0x3c,0xa8,0x4e = cmge v9.4s, v7.4s, v8.4s 0xe3,0x3f,0xf5,0x4e = cmge v3.2d, v31.2d, v21.2d 0xe0,0x35,0x31,0x2e = cmhi v0.8b, v15.8b, v17.8b 0xe1,0x37,0x28,0x6e = cmhi v1.16b, v31.16b, v8.16b 0x0f,0x36,0x71,0x2e = cmhi v15.4h, v16.4h, v17.4h 0xc5,0x34,0x67,0x6e = cmhi v5.8h, v6.8h, v7.8h 0x7d,0x37,0xbc,0x2e = cmhi v29.2s, v27.2s, v28.2s 0xe9,0x34,0xa8,0x6e = cmhi v9.4s, v7.4s, v8.4s 0xe3,0x37,0xf5,0x6e = cmhi v3.2d, v31.2d, v21.2d 0xe0,0x35,0x31,0x2e = cmhi v0.8b, v15.8b, v17.8b 0xe1,0x37,0x28,0x6e = cmhi v1.16b, v31.16b, v8.16b 0x0f,0x36,0x71,0x2e = cmhi v15.4h, v16.4h, v17.4h 0xc5,0x34,0x67,0x6e = cmhi v5.8h, v6.8h, v7.8h 0x7d,0x37,0xbc,0x2e = cmhi v29.2s, v27.2s, v28.2s 0xe9,0x34,0xa8,0x6e = cmhi v9.4s, v7.4s, v8.4s 0xe3,0x37,0xf5,0x6e = cmhi v3.2d, v31.2d, v21.2d 0xe0,0x35,0x31,0x0e = cmgt v0.8b, v15.8b, v17.8b 0xe1,0x37,0x28,0x4e = cmgt v1.16b, v31.16b, v8.16b 0x0f,0x36,0x71,0x0e = cmgt v15.4h, v16.4h, v17.4h 0xc5,0x34,0x67,0x4e = cmgt v5.8h, v6.8h, v7.8h 0x7d,0x37,0xbc,0x0e = cmgt v29.2s, v27.2s, v28.2s 0xe9,0x34,0xa8,0x4e = cmgt v9.4s, v7.4s, v8.4s 0xe3,0x37,0xf5,0x4e = cmgt v3.2d, v31.2d, v21.2d 0xe0,0x35,0x31,0x0e = cmgt v0.8b, v15.8b, v17.8b 0xe1,0x37,0x28,0x4e = cmgt v1.16b, v31.16b, v8.16b 0x0f,0x36,0x71,0x0e = cmgt v15.4h, v16.4h, v17.4h 0xc5,0x34,0x67,0x4e = cmgt v5.8h, v6.8h, v7.8h 0x7d,0x37,0xbc,0x0e = cmgt v29.2s, v27.2s, v28.2s 0xe9,0x34,0xa8,0x4e = cmgt v9.4s, v7.4s, v8.4s 0xe3,0x37,0xf5,0x4e = cmgt v3.2d, v31.2d, v21.2d 0xe0,0x8d,0x31,0x0e = cmtst v0.8b, v15.8b, v17.8b 0xe1,0x8f,0x28,0x4e = cmtst v1.16b, v31.16b, v8.16b 0x0f,0x8e,0x71,0x0e = cmtst v15.4h, v16.4h, v17.4h 0xc5,0x8c,0x67,0x4e = cmtst v5.8h, v6.8h, v7.8h 0x7d,0x8f,0xbc,0x0e = cmtst v29.2s, v27.2s, v28.2s 0xe9,0x8c,0xa8,0x4e = cmtst v9.4s, v7.4s, v8.4s 0xe3,0x8f,0xf5,0x4e = cmtst v3.2d, v31.2d, v21.2d 0xe0,0xe7,0x30,0x0e = fcmeq v0.2s, v31.2s, v16.2s 0xe4,0xe4,0x2f,0x4e = fcmeq v4.4s, v7.4s, v15.4s 0x5d,0xe4,0x65,0x4e = fcmeq v29.2d, v2.2d, v5.2d 0xbf,0xe7,0x3c,0x6e = fcmge v31.4s, v29.4s, v28.4s 0x03,0xe5,0x2c,0x2e = fcmge v3.2s, v8.2s, v12.2s 0xf1,0xe5,0x6d,0x6e = fcmge v17.2d, v15.2d, v13.2d 0xbf,0xe7,0x3c,0x6e = fcmge v31.4s, v29.4s, v28.4s 0x03,0xe5,0x2c,0x2e = fcmge v3.2s, v8.2s, v12.2s 0xf1,0xe5,0x6d,0x6e = fcmge v17.2d, v15.2d, v13.2d 0xe0,0xe7,0xb0,0x2e = fcmgt v0.2s, v31.2s, v16.2s 0xe4,0xe4,0xaf,0x6e = fcmgt v4.4s, v7.4s, v15.4s 0x5d,0xe4,0xe5,0x6e = fcmgt v29.2d, v2.2d, v5.2d 0xe0,0xe7,0xb0,0x2e = fcmgt v0.2s, v31.2s, v16.2s 0xe4,0xe4,0xaf,0x6e = fcmgt v4.4s, v7.4s, v15.4s 0x5d,0xe4,0xe5,0x6e = fcmgt v29.2d, v2.2d, v5.2d 0xe0,0x99,0x20,0x0e = cmeq v0.8b, v15.8b, #0x0 0xe1,0x9b,0x20,0x4e = cmeq v1.16b, v31.16b, #0x0 0x0f,0x9a,0x60,0x0e = cmeq v15.4h, v16.4h, #0x0 0xc5,0x98,0x60,0x4e = cmeq v5.8h, v6.8h, #0x0 0x7d,0x9b,0xa0,0x0e = cmeq v29.2s, v27.2s, #0x0 0xe9,0x98,0xa0,0x4e = cmeq v9.4s, v7.4s, #0x0 0xe3,0x9b,0xe0,0x4e = cmeq v3.2d, v31.2d, #0x0 0xe0,0x89,0x20,0x2e = cmge v0.8b, v15.8b, #0x0 0xe1,0x8b,0x20,0x6e = cmge v1.16b, v31.16b, #0x0 0x0f,0x8a,0x60,0x2e = cmge v15.4h, v16.4h, #0x0 0xc5,0x88,0x60,0x6e = cmge v5.8h, v6.8h, #0x0 0x7d,0x8b,0xa0,0x2e = cmge v29.2s, v27.2s, #0x0 0x91,0x8a,0xa0,0x6e = cmge v17.4s, v20.4s, #0x0 0xe3,0x8b,0xe0,0x6e = cmge v3.2d, v31.2d, #0x0 0xe0,0x89,0x20,0x0e = cmgt v0.8b, v15.8b, #0x0 0xe1,0x8b,0x20,0x4e = cmgt v1.16b, v31.16b, #0x0 0x0f,0x8a,0x60,0x0e = cmgt v15.4h, v16.4h, #0x0 0xc5,0x88,0x60,0x4e = cmgt v5.8h, v6.8h, #0x0 0x7d,0x8b,0xa0,0x0e = cmgt v29.2s, v27.2s, #0x0 0xe9,0x88,0xa0,0x4e = cmgt v9.4s, v7.4s, #0x0 0xe3,0x8b,0xe0,0x4e = cmgt v3.2d, v31.2d, #0x0 0xe0,0x99,0x20,0x2e = cmle v0.8b, v15.8b, #0x0 0xe1,0x9b,0x20,0x6e = cmle v1.16b, v31.16b, #0x0 0x0f,0x9a,0x60,0x2e = cmle v15.4h, v16.4h, #0x0 0xc5,0x98,0x60,0x6e = cmle v5.8h, v6.8h, #0x0 0x7d,0x9b,0xa0,0x2e = cmle v29.2s, v27.2s, #0x0 0xe9,0x98,0xa0,0x6e = cmle v9.4s, v7.4s, #0x0 0xe3,0x9b,0xe0,0x6e = cmle v3.2d, v31.2d, #0x0 0xe0,0xa9,0x20,0x0e = cmlt v0.8b, v15.8b, #0x0 0xe1,0xab,0x20,0x4e = cmlt v1.16b, v31.16b, #0x0 0x0f,0xaa,0x60,0x0e = cmlt v15.4h, v16.4h, #0x0 0xc5,0xa8,0x60,0x4e = cmlt v5.8h, v6.8h, #0x0 0x7d,0xab,0xa0,0x0e = cmlt v29.2s, v27.2s, #0x0 0xe9,0xa8,0xa0,0x4e = cmlt v9.4s, v7.4s, #0x0 0xe3,0xab,0xe0,0x4e = cmlt v3.2d, v31.2d, #0x0 0xe0,0xdb,0xa0,0x0e = fcmeq v0.2s, v31.2s, #0.0 0xe4,0xd8,0xa0,0x4e = fcmeq v4.4s, v7.4s, #0.0 0x5d,0xd8,0xe0,0x4e = fcmeq v29.2d, v2.2d, #0.0 0xbf,0xcb,0xa0,0x6e = fcmge v31.4s, v29.4s, #0.0 0x03,0xc9,0xa0,0x2e = fcmge v3.2s, v8.2s, #0.0 0xf1,0xc9,0xe0,0x6e = fcmge v17.2d, v15.2d, #0.0 0xe0,0xcb,0xa0,0x0e = fcmgt v0.2s, v31.2s, #0.0 0xe4,0xc8,0xa0,0x4e = fcmgt v4.4s, v7.4s, #0.0 0x5d,0xc8,0xe0,0x4e = fcmgt v29.2d, v2.2d, #0.0 0x01,0xd9,0xa0,0x6e = fcmle v1.4s, v8.4s, #0.0 0x83,0xda,0xa0,0x2e = fcmle v3.2s, v20.2s, #0.0 0xa7,0xd9,0xe0,0x6e = fcmle v7.2d, v13.2d, #0.0 0x50,0xe8,0xa0,0x0e = fcmlt v16.2s, v2.2s, #0.0 0x8f,0xe8,0xa0,0x4e = fcmlt v15.4s, v4.4s, #0.0 0xa5,0xeb,0xe0,0x4e = fcmlt v5.2d, v29.2d, #0.0 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-crypto.s.cs010066400017500001750000000011741363402546700221220ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x48,0x28,0x4e = aese v0.16b, v1.16b 0x20,0x58,0x28,0x4e = aesd v0.16b, v1.16b 0x20,0x68,0x28,0x4e = aesmc v0.16b, v1.16b 0x20,0x78,0x28,0x4e = aesimc v0.16b, v1.16b 0x20,0x08,0x28,0x5e = sha1h s0, s1 0x20,0x18,0x28,0x5e = sha1su1 v0.4s, v1.4s 0x20,0x28,0x28,0x5e = sha256su0 v0.4s, v1.4s 0x20,0x00,0x02,0x5e = sha1c q0, s1, v2.4s 0x20,0x10,0x02,0x5e = sha1p q0, s1, v2.4s 0x20,0x20,0x02,0x5e = sha1m q0, s1, v2.4s 0x20,0x30,0x02,0x5e = sha1su0 v0.4s, v1.4s, v2.4s 0x20,0x40,0x02,0x5e = sha256h q0, q1, v2.4s 0x20,0x50,0x02,0x5e = sha256h2 q0, q1, v2.4s 0x20,0x60,0x02,0x5e = sha256su1 v0.4s, v1.4s, v2.4s capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-extract.s.cs010066400017500001750000000002041363402546700222450ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x18,0x02,0x2e = ext v0.8b, v1.8b, v2.8b, #0x3 0x20,0x18,0x02,0x6e = ext v0.16b, v1.16b, v2.16b, #0x3 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-facge-facgt.s.cs010066400017500001750000000011571363402546700227320ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xe0,0xef,0x30,0x2e = facge v0.2s, v31.2s, v16.2s 0xe4,0xec,0x2f,0x6e = facge v4.4s, v7.4s, v15.4s 0x5d,0xec,0x65,0x6e = facge v29.2d, v2.2d, v5.2d 0xe0,0xef,0x30,0x2e = facge v0.2s, v31.2s, v16.2s 0xe4,0xec,0x2f,0x6e = facge v4.4s, v7.4s, v15.4s 0x5d,0xec,0x65,0x6e = facge v29.2d, v2.2d, v5.2d 0xbf,0xef,0xbc,0x6e = facgt v31.4s, v29.4s, v28.4s 0x03,0xed,0xac,0x2e = facgt v3.2s, v8.2s, v12.2s 0xf1,0xed,0xed,0x6e = facgt v17.2d, v15.2d, v13.2d 0xbf,0xef,0xbc,0x6e = facgt v31.4s, v29.4s, v28.4s 0x03,0xed,0xac,0x2e = facgt v3.2s, v8.2s, v12.2s 0xf1,0xed,0xed,0x6e = facgt v17.2d, v15.2d, v13.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-frsqrt-frecp.s.cs010066400017500001750000000005151363402546700232160ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xe0,0xff,0xb0,0x0e = frsqrts v0.2s, v31.2s, v16.2s 0xe4,0xfc,0xaf,0x4e = frsqrts v4.4s, v7.4s, v15.4s 0x5d,0xfc,0xe5,0x4e = frsqrts v29.2d, v2.2d, v5.2d 0xbf,0xff,0x3c,0x4e = frecps v31.4s, v29.4s, v28.4s 0x03,0xfd,0x2c,0x0e = frecps v3.2s, v8.2s, v12.2s 0xf1,0xfd,0x6d,0x4e = frecps v17.2d, v15.2d, v13.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-halving-add-sub.s.cs010066400017500001750000000022451363402546700235470ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x04,0x22,0x0e = shadd v0.8b, v1.8b, v2.8b 0x20,0x04,0x22,0x4e = shadd v0.16b, v1.16b, v2.16b 0x20,0x04,0x62,0x0e = shadd v0.4h, v1.4h, v2.4h 0x20,0x04,0x62,0x4e = shadd v0.8h, v1.8h, v2.8h 0x20,0x04,0xa2,0x0e = shadd v0.2s, v1.2s, v2.2s 0x20,0x04,0xa2,0x4e = shadd v0.4s, v1.4s, v2.4s 0x20,0x04,0x22,0x2e = uhadd v0.8b, v1.8b, v2.8b 0x20,0x04,0x22,0x6e = uhadd v0.16b, v1.16b, v2.16b 0x20,0x04,0x62,0x2e = uhadd v0.4h, v1.4h, v2.4h 0x20,0x04,0x62,0x6e = uhadd v0.8h, v1.8h, v2.8h 0x20,0x04,0xa2,0x2e = uhadd v0.2s, v1.2s, v2.2s 0x20,0x04,0xa2,0x6e = uhadd v0.4s, v1.4s, v2.4s 0x20,0x24,0x22,0x0e = shsub v0.8b, v1.8b, v2.8b 0x20,0x24,0x22,0x4e = shsub v0.16b, v1.16b, v2.16b 0x20,0x24,0x62,0x0e = shsub v0.4h, v1.4h, v2.4h 0x20,0x24,0x62,0x4e = shsub v0.8h, v1.8h, v2.8h 0x20,0x24,0xa2,0x0e = shsub v0.2s, v1.2s, v2.2s 0x20,0x24,0xa2,0x4e = shsub v0.4s, v1.4s, v2.4s 0x20,0x24,0x22,0x2e = uhsub v0.8b, v1.8b, v2.8b 0x20,0x24,0x22,0x6e = uhsub v0.16b, v1.16b, v2.16b 0x20,0x24,0x62,0x2e = uhsub v0.4h, v1.4h, v2.4h 0x20,0x24,0x62,0x6e = uhsub v0.8h, v1.8h, v2.8h 0x20,0x24,0xa2,0x2e = uhsub v0.2s, v1.2s, v2.2s 0x20,0x24,0xa2,0x6e = uhsub v0.4s, v1.4s, v2.4s capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-max-min-pairwise.s.cs010066400017500001750000000034031363402546700237660ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0xa4,0x22,0x0e = smaxp v0.8b, v1.8b, v2.8b 0x20,0xa4,0x22,0x4e = smaxp v0.16b, v1.16b, v2.16b 0x20,0xa4,0x62,0x0e = smaxp v0.4h, v1.4h, v2.4h 0x20,0xa4,0x62,0x4e = smaxp v0.8h, v1.8h, v2.8h 0x20,0xa4,0xa2,0x0e = smaxp v0.2s, v1.2s, v2.2s 0x20,0xa4,0xa2,0x4e = smaxp v0.4s, v1.4s, v2.4s 0x20,0xa4,0x22,0x2e = umaxp v0.8b, v1.8b, v2.8b 0x20,0xa4,0x22,0x6e = umaxp v0.16b, v1.16b, v2.16b 0x20,0xa4,0x62,0x2e = umaxp v0.4h, v1.4h, v2.4h 0x20,0xa4,0x62,0x6e = umaxp v0.8h, v1.8h, v2.8h 0x20,0xa4,0xa2,0x2e = umaxp v0.2s, v1.2s, v2.2s 0x20,0xa4,0xa2,0x6e = umaxp v0.4s, v1.4s, v2.4s 0x20,0xac,0x22,0x0e = sminp v0.8b, v1.8b, v2.8b 0x20,0xac,0x22,0x4e = sminp v0.16b, v1.16b, v2.16b 0x20,0xac,0x62,0x0e = sminp v0.4h, v1.4h, v2.4h 0x20,0xac,0x62,0x4e = sminp v0.8h, v1.8h, v2.8h 0x20,0xac,0xa2,0x0e = sminp v0.2s, v1.2s, v2.2s 0x20,0xac,0xa2,0x4e = sminp v0.4s, v1.4s, v2.4s 0x20,0xac,0x22,0x2e = uminp v0.8b, v1.8b, v2.8b 0x20,0xac,0x22,0x6e = uminp v0.16b, v1.16b, v2.16b 0x20,0xac,0x62,0x2e = uminp v0.4h, v1.4h, v2.4h 0x20,0xac,0x62,0x6e = uminp v0.8h, v1.8h, v2.8h 0x20,0xac,0xa2,0x2e = uminp v0.2s, v1.2s, v2.2s 0x20,0xac,0xa2,0x6e = uminp v0.4s, v1.4s, v2.4s 0x20,0xf4,0x22,0x2e = fmaxp v0.2s, v1.2s, v2.2s 0xff,0xf5,0x30,0x6e = fmaxp v31.4s, v15.4s, v16.4s 0x07,0xf5,0x79,0x6e = fmaxp v7.2d, v8.2d, v25.2d 0xea,0xf5,0xb6,0x2e = fminp v10.2s, v15.2s, v22.2s 0xa3,0xf4,0xa6,0x6e = fminp v3.4s, v5.4s, v6.4s 0xb1,0xf5,0xe2,0x6e = fminp v17.2d, v13.2d, v2.2d 0x20,0xc4,0x22,0x2e = fmaxnmp v0.2s, v1.2s, v2.2s 0xff,0xc5,0x30,0x6e = fmaxnmp v31.4s, v15.4s, v16.4s 0x07,0xc5,0x79,0x6e = fmaxnmp v7.2d, v8.2d, v25.2d 0xea,0xc5,0xb6,0x2e = fminnmp v10.2s, v15.2s, v22.2s 0xa3,0xc4,0xa6,0x6e = fminnmp v3.4s, v5.4s, v6.4s 0xb1,0xc5,0xe2,0x6e = fminnmp v17.2d, v13.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-max-min.s.cs010066400017500001750000000033371363402546700221530ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x64,0x22,0x0e = smax v0.8b, v1.8b, v2.8b 0x20,0x64,0x22,0x4e = smax v0.16b, v1.16b, v2.16b 0x20,0x64,0x62,0x0e = smax v0.4h, v1.4h, v2.4h 0x20,0x64,0x62,0x4e = smax v0.8h, v1.8h, v2.8h 0x20,0x64,0xa2,0x0e = smax v0.2s, v1.2s, v2.2s 0x20,0x64,0xa2,0x4e = smax v0.4s, v1.4s, v2.4s 0x20,0x64,0x22,0x2e = umax v0.8b, v1.8b, v2.8b 0x20,0x64,0x22,0x6e = umax v0.16b, v1.16b, v2.16b 0x20,0x64,0x62,0x2e = umax v0.4h, v1.4h, v2.4h 0x20,0x64,0x62,0x6e = umax v0.8h, v1.8h, v2.8h 0x20,0x64,0xa2,0x2e = umax v0.2s, v1.2s, v2.2s 0x20,0x64,0xa2,0x6e = umax v0.4s, v1.4s, v2.4s 0x20,0x6c,0x22,0x0e = smin v0.8b, v1.8b, v2.8b 0x20,0x6c,0x22,0x4e = smin v0.16b, v1.16b, v2.16b 0x20,0x6c,0x62,0x0e = smin v0.4h, v1.4h, v2.4h 0x20,0x6c,0x62,0x4e = smin v0.8h, v1.8h, v2.8h 0x20,0x6c,0xa2,0x0e = smin v0.2s, v1.2s, v2.2s 0x20,0x6c,0xa2,0x4e = smin v0.4s, v1.4s, v2.4s 0x20,0x6c,0x22,0x2e = umin v0.8b, v1.8b, v2.8b 0x20,0x6c,0x22,0x6e = umin v0.16b, v1.16b, v2.16b 0x20,0x6c,0x62,0x2e = umin v0.4h, v1.4h, v2.4h 0x20,0x6c,0x62,0x6e = umin v0.8h, v1.8h, v2.8h 0x20,0x6c,0xa2,0x2e = umin v0.2s, v1.2s, v2.2s 0x20,0x6c,0xa2,0x6e = umin v0.4s, v1.4s, v2.4s 0x20,0xf4,0x22,0x0e = fmax v0.2s, v1.2s, v2.2s 0xff,0xf5,0x30,0x4e = fmax v31.4s, v15.4s, v16.4s 0x07,0xf5,0x79,0x4e = fmax v7.2d, v8.2d, v25.2d 0xea,0xf5,0xb6,0x0e = fmin v10.2s, v15.2s, v22.2s 0xa3,0xf4,0xa6,0x4e = fmin v3.4s, v5.4s, v6.4s 0xb1,0xf5,0xe2,0x4e = fmin v17.2d, v13.2d, v2.2d 0x20,0xc4,0x22,0x0e = fmaxnm v0.2s, v1.2s, v2.2s 0xff,0xc5,0x30,0x4e = fmaxnm v31.4s, v15.4s, v16.4s 0x07,0xc5,0x79,0x4e = fmaxnm v7.2d, v8.2d, v25.2d 0xea,0xc5,0xb6,0x0e = fminnm v10.2s, v15.2s, v22.2s 0xa3,0xc4,0xa6,0x4e = fminnm v3.4s, v5.4s, v6.4s 0xb1,0xc5,0xe2,0x4e = fminnm v17.2d, v13.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-mla-mls-instructions.s.cs010066400017500001750000000015411363402546700247040ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x94,0x22,0x0e = mla v0.8b, v1.8b, v2.8b 0x20,0x94,0x22,0x4e = mla v0.16b, v1.16b, v2.16b 0x20,0x94,0x62,0x0e = mla v0.4h, v1.4h, v2.4h 0x20,0x94,0x62,0x4e = mla v0.8h, v1.8h, v2.8h 0x20,0x94,0xa2,0x0e = mla v0.2s, v1.2s, v2.2s 0x20,0x94,0xa2,0x4e = mla v0.4s, v1.4s, v2.4s 0x20,0x94,0x22,0x2e = mls v0.8b, v1.8b, v2.8b 0x20,0x94,0x22,0x6e = mls v0.16b, v1.16b, v2.16b 0x20,0x94,0x62,0x2e = mls v0.4h, v1.4h, v2.4h 0x20,0x94,0x62,0x6e = mls v0.8h, v1.8h, v2.8h 0x20,0x94,0xa2,0x2e = mls v0.2s, v1.2s, v2.2s 0x20,0x94,0xa2,0x6e = mls v0.4s, v1.4s, v2.4s 0x20,0xcc,0x22,0x0e = fmla v0.2s, v1.2s, v2.2s 0x20,0xcc,0x22,0x4e = fmla v0.4s, v1.4s, v2.4s 0x20,0xcc,0x62,0x4e = fmla v0.2d, v1.2d, v2.2d 0x20,0xcc,0xa2,0x0e = fmls v0.2s, v1.2s, v2.2s 0x20,0xcc,0xa2,0x4e = fmls v0.4s, v1.4s, v2.4s 0x20,0xcc,0xe2,0x4e = fmls v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-mov.s.cs010066400017500001750000000063461363402546700214110ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x04,0x00,0x0f = movi v0.2s, #0x1 0x01,0x04,0x00,0x0f = movi v1.2s, #0x0 0x2f,0x24,0x00,0x0f = movi v15.2s, #0x1, lsl #8 0x30,0x44,0x00,0x0f = movi v16.2s, #0x1, lsl #16 0x3f,0x64,0x00,0x0f = movi v31.2s, #0x1, lsl #24 0x20,0x04,0x00,0x4f = movi v0.4s, #0x1 0x20,0x24,0x00,0x4f = movi v0.4s, #0x1, lsl #8 0x20,0x44,0x00,0x4f = movi v0.4s, #0x1, lsl #16 0x20,0x64,0x00,0x4f = movi v0.4s, #0x1, lsl #24 0x20,0x84,0x00,0x0f = movi v0.4h, #0x1 0x20,0xa4,0x00,0x0f = movi v0.4h, #0x1, lsl #8 0x20,0x84,0x00,0x4f = movi v0.8h, #0x1 0x20,0xa4,0x00,0x4f = movi v0.8h, #0x1, lsl #8 0x20,0x04,0x00,0x2f = mvni v0.2s, #0x1 0x01,0x04,0x00,0x2f = mvni v1.2s, #0x0 0x20,0x24,0x00,0x2f = mvni v0.2s, #0x1, lsl #8 0x20,0x44,0x00,0x2f = mvni v0.2s, #0x1, lsl #16 0x20,0x64,0x00,0x2f = mvni v0.2s, #0x1, lsl #24 0x20,0x04,0x00,0x6f = mvni v0.4s, #0x1 0x2f,0x24,0x00,0x6f = mvni v15.4s, #0x1, lsl #8 0x30,0x44,0x00,0x6f = mvni v16.4s, #0x1, lsl #16 0x3f,0x64,0x00,0x6f = mvni v31.4s, #0x1, lsl #24 0x20,0x84,0x00,0x2f = mvni v0.4h, #0x1 0x20,0xa4,0x00,0x2f = mvni v0.4h, #0x1, lsl #8 0x20,0x84,0x00,0x6f = mvni v0.8h, #0x1 0x20,0xa4,0x00,0x6f = mvni v0.8h, #0x1, lsl #8 0x20,0x14,0x00,0x2f = bic v0.2s, #0x1 0x01,0x14,0x00,0x2f = bic v1.2s, #0x0 0x20,0x34,0x00,0x2f = bic v0.2s, #0x1, lsl #8 0x20,0x54,0x00,0x2f = bic v0.2s, #0x1, lsl #16 0x20,0x74,0x00,0x2f = bic v0.2s, #0x1, lsl #24 0x20,0x14,0x00,0x6f = bic v0.4s, #0x1 0x20,0x34,0x00,0x6f = bic v0.4s, #0x1, lsl #8 0x20,0x54,0x00,0x6f = bic v0.4s, #0x1, lsl #16 0x20,0x74,0x00,0x6f = bic v0.4s, #0x1, lsl #24 0x2f,0x94,0x00,0x2f = bic v15.4h, #0x1 0x30,0xb4,0x00,0x2f = bic v16.4h, #0x1, lsl #8 0x20,0x94,0x00,0x6f = bic v0.8h, #0x1 0x3f,0xb4,0x00,0x6f = bic v31.8h, #0x1, lsl #8 0x20,0x14,0x00,0x0f = orr v0.2s, #0x1 0x01,0x14,0x00,0x0f = orr v1.2s, #0x0 0x20,0x34,0x00,0x0f = orr v0.2s, #0x1, lsl #8 0x20,0x54,0x00,0x0f = orr v0.2s, #0x1, lsl #16 0x20,0x74,0x00,0x0f = orr v0.2s, #0x1, lsl #24 0x20,0x14,0x00,0x4f = orr v0.4s, #0x1 0x20,0x34,0x00,0x4f = orr v0.4s, #0x1, lsl #8 0x20,0x54,0x00,0x4f = orr v0.4s, #0x1, lsl #16 0x20,0x74,0x00,0x4f = orr v0.4s, #0x1, lsl #24 0x3f,0x94,0x00,0x0f = orr v31.4h, #0x1 0x2f,0xb4,0x00,0x0f = orr v15.4h, #0x1, lsl #8 0x20,0x94,0x00,0x4f = orr v0.8h, #0x1 0x30,0xb4,0x00,0x4f = orr v16.8h, #0x1, lsl #8 0x20,0xc4,0x00,0x0f = movi v0.2s, #0x1, msl #8 0x21,0xd4,0x00,0x0f = movi v1.2s, #0x1, msl #16 0x20,0xc4,0x00,0x4f = movi v0.4s, #0x1, msl #8 0x3f,0xd4,0x00,0x4f = movi v31.4s, #0x1, msl #16 0x21,0xc4,0x00,0x2f = mvni v1.2s, #0x1, msl #8 0x20,0xd4,0x00,0x2f = mvni v0.2s, #0x1, msl #16 0x3f,0xc4,0x00,0x6f = mvni v31.4s, #0x1, msl #8 0x20,0xd4,0x00,0x6f = mvni v0.4s, #0x1, msl #16 0x00,0xe4,0x00,0x0f = movi v0.8b, #0x0 0xff,0xe7,0x07,0x0f = movi v31.8b, #0xff 0xef,0xe5,0x00,0x4f = movi v15.16b, #0xf 0xff,0xe7,0x00,0x4f = movi v31.16b, #0x1f 0x40,0xe5,0x05,0x6f = movi v0.2d, #0xff00ff00ff00ff00 0x40,0xe5,0x05,0x2f = movi d0, #0xff00ff00ff00ff00 0x01,0xf6,0x03,0x0f = fmov v1.2s, #1.00000000 0x0f,0xf6,0x03,0x4f = fmov v15.4s, #1.00000000 0x1f,0xf6,0x03,0x6f = fmov v31.2d, #1.00000000 0xe0,0x1f,0xbf,0x0e = orr v0.8b, v31.8b, v31.8b 0x0f,0x1e,0xb0,0x4e = orr v15.16b, v16.16b, v16.16b 0xe0,0x1f,0xbf,0x0e = orr v0.8b, v31.8b, v31.8b 0x0f,0x1e,0xb0,0x4e = orr v15.16b, v16.16b, v16.16b capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-mul-div-instructions.s.cs010066400017500001750000000021721363402546700247200ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x9c,0x22,0x0e = mul v0.8b, v1.8b, v2.8b 0x20,0x9c,0x22,0x4e = mul v0.16b, v1.16b, v2.16b 0x20,0x9c,0x62,0x0e = mul v0.4h, v1.4h, v2.4h 0x20,0x9c,0x62,0x4e = mul v0.8h, v1.8h, v2.8h 0x20,0x9c,0xa2,0x0e = mul v0.2s, v1.2s, v2.2s 0x20,0x9c,0xa2,0x4e = mul v0.4s, v1.4s, v2.4s 0x20,0xdc,0x22,0x2e = fmul v0.2s, v1.2s, v2.2s 0x20,0xdc,0x22,0x6e = fmul v0.4s, v1.4s, v2.4s 0x20,0xdc,0x62,0x6e = fmul v0.2d, v1.2d, v2.2d 0x20,0xfc,0x22,0x2e = fdiv v0.2s, v1.2s, v2.2s 0x20,0xfc,0x22,0x6e = fdiv v0.4s, v1.4s, v2.4s 0x20,0xfc,0x62,0x6e = fdiv v0.2d, v1.2d, v2.2d 0xf1,0x9f,0x30,0x2e = pmul v17.8b, v31.8b, v16.8b 0x20,0x9c,0x22,0x6e = pmul v0.16b, v1.16b, v2.16b 0x22,0xb7,0x63,0x0e = sqdmulh v2.4h, v25.4h, v3.4h 0xac,0xb4,0x6d,0x4e = sqdmulh v12.8h, v5.8h, v13.8h 0x23,0xb4,0xbe,0x0e = sqdmulh v3.2s, v1.2s, v30.2s 0x22,0xb7,0x63,0x2e = sqrdmulh v2.4h, v25.4h, v3.4h 0xac,0xb4,0x6d,0x6e = sqrdmulh v12.8h, v5.8h, v13.8h 0x23,0xb4,0xbe,0x2e = sqrdmulh v3.2s, v1.2s, v30.2s 0xb5,0xdc,0x2d,0x0e = fmulx v21.2s, v5.2s, v13.2s 0x21,0xdf,0x23,0x4e = fmulx v1.4s, v25.4s, v3.4s 0xdf,0xde,0x62,0x4e = fmulx v31.2d, v22.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-perm.s.cs010066400017500001750000000037411363402546700215470ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x18,0x02,0x0e = uzp1 v0.8b, v1.8b, v2.8b 0x20,0x18,0x02,0x4e = uzp1 v0.16b, v1.16b, v2.16b 0x20,0x18,0x42,0x0e = uzp1 v0.4h, v1.4h, v2.4h 0x20,0x18,0x42,0x4e = uzp1 v0.8h, v1.8h, v2.8h 0x20,0x18,0x82,0x0e = uzp1 v0.2s, v1.2s, v2.2s 0x20,0x18,0x82,0x4e = uzp1 v0.4s, v1.4s, v2.4s 0x20,0x18,0xc2,0x4e = uzp1 v0.2d, v1.2d, v2.2d 0x20,0x28,0x02,0x0e = trn1 v0.8b, v1.8b, v2.8b 0x20,0x28,0x02,0x4e = trn1 v0.16b, v1.16b, v2.16b 0x20,0x28,0x42,0x0e = trn1 v0.4h, v1.4h, v2.4h 0x20,0x28,0x42,0x4e = trn1 v0.8h, v1.8h, v2.8h 0x20,0x28,0x82,0x0e = trn1 v0.2s, v1.2s, v2.2s 0x20,0x28,0x82,0x4e = trn1 v0.4s, v1.4s, v2.4s 0x20,0x28,0xc2,0x4e = trn1 v0.2d, v1.2d, v2.2d 0x20,0x38,0x02,0x0e = zip1 v0.8b, v1.8b, v2.8b 0x20,0x38,0x02,0x4e = zip1 v0.16b, v1.16b, v2.16b 0x20,0x38,0x42,0x0e = zip1 v0.4h, v1.4h, v2.4h 0x20,0x38,0x42,0x4e = zip1 v0.8h, v1.8h, v2.8h 0x20,0x38,0x82,0x0e = zip1 v0.2s, v1.2s, v2.2s 0x20,0x38,0x82,0x4e = zip1 v0.4s, v1.4s, v2.4s 0x20,0x38,0xc2,0x4e = zip1 v0.2d, v1.2d, v2.2d 0x20,0x58,0x02,0x0e = uzp2 v0.8b, v1.8b, v2.8b 0x20,0x58,0x02,0x4e = uzp2 v0.16b, v1.16b, v2.16b 0x20,0x58,0x42,0x0e = uzp2 v0.4h, v1.4h, v2.4h 0x20,0x58,0x42,0x4e = uzp2 v0.8h, v1.8h, v2.8h 0x20,0x58,0x82,0x0e = uzp2 v0.2s, v1.2s, v2.2s 0x20,0x58,0x82,0x4e = uzp2 v0.4s, v1.4s, v2.4s 0x20,0x58,0xc2,0x4e = uzp2 v0.2d, v1.2d, v2.2d 0x20,0x68,0x02,0x0e = trn2 v0.8b, v1.8b, v2.8b 0x20,0x68,0x02,0x4e = trn2 v0.16b, v1.16b, v2.16b 0x20,0x68,0x42,0x0e = trn2 v0.4h, v1.4h, v2.4h 0x20,0x68,0x42,0x4e = trn2 v0.8h, v1.8h, v2.8h 0x20,0x68,0x82,0x0e = trn2 v0.2s, v1.2s, v2.2s 0x20,0x68,0x82,0x4e = trn2 v0.4s, v1.4s, v2.4s 0x20,0x68,0xc2,0x4e = trn2 v0.2d, v1.2d, v2.2d 0x20,0x78,0x02,0x0e = zip2 v0.8b, v1.8b, v2.8b 0x20,0x78,0x02,0x4e = zip2 v0.16b, v1.16b, v2.16b 0x20,0x78,0x42,0x0e = zip2 v0.4h, v1.4h, v2.4h 0x20,0x78,0x42,0x4e = zip2 v0.8h, v1.8h, v2.8h 0x20,0x78,0x82,0x0e = zip2 v0.2s, v1.2s, v2.2s 0x20,0x78,0x82,0x4e = zip2 v0.4s, v1.4s, v2.4s 0x20,0x78,0xc2,0x4e = zip2 v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-rounding-halving-add.s.cs010066400017500001750000000011531363402546700246000ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x14,0x22,0x0e = srhadd v0.8b, v1.8b, v2.8b 0x20,0x14,0x22,0x4e = srhadd v0.16b, v1.16b, v2.16b 0x20,0x14,0x62,0x0e = srhadd v0.4h, v1.4h, v2.4h 0x20,0x14,0x62,0x4e = srhadd v0.8h, v1.8h, v2.8h 0x20,0x14,0xa2,0x0e = srhadd v0.2s, v1.2s, v2.2s 0x20,0x14,0xa2,0x4e = srhadd v0.4s, v1.4s, v2.4s 0x20,0x14,0x22,0x2e = urhadd v0.8b, v1.8b, v2.8b 0x20,0x14,0x22,0x6e = urhadd v0.16b, v1.16b, v2.16b 0x20,0x14,0x62,0x2e = urhadd v0.4h, v1.4h, v2.4h 0x20,0x14,0x62,0x6e = urhadd v0.8h, v1.8h, v2.8h 0x20,0x14,0xa2,0x2e = urhadd v0.2s, v1.2s, v2.2s 0x20,0x14,0xa2,0x6e = urhadd v0.4s, v1.4s, v2.4s capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-rounding-shift.s.cs010066400017500001750000000012771363402546700235460ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x54,0x22,0x0e = srshl v0.8b, v1.8b, v2.8b 0x20,0x54,0x22,0x4e = srshl v0.16b, v1.16b, v2.16b 0x20,0x54,0x62,0x0e = srshl v0.4h, v1.4h, v2.4h 0x20,0x54,0x62,0x4e = srshl v0.8h, v1.8h, v2.8h 0x20,0x54,0xa2,0x0e = srshl v0.2s, v1.2s, v2.2s 0x20,0x54,0xa2,0x4e = srshl v0.4s, v1.4s, v2.4s 0x20,0x54,0xe2,0x4e = srshl v0.2d, v1.2d, v2.2d 0x20,0x54,0x22,0x2e = urshl v0.8b, v1.8b, v2.8b 0x20,0x54,0x22,0x6e = urshl v0.16b, v1.16b, v2.16b 0x20,0x54,0x62,0x2e = urshl v0.4h, v1.4h, v2.4h 0x20,0x54,0x62,0x6e = urshl v0.8h, v1.8h, v2.8h 0x20,0x54,0xa2,0x2e = urshl v0.2s, v1.2s, v2.2s 0x20,0x54,0xa2,0x6e = urshl v0.4s, v1.4s, v2.4s 0x20,0x54,0xe2,0x6e = urshl v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-saturating-add-sub.s.cs010066400017500001750000000025451363402546700243030ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x0c,0x22,0x0e = sqadd v0.8b, v1.8b, v2.8b 0x20,0x0c,0x22,0x4e = sqadd v0.16b, v1.16b, v2.16b 0x20,0x0c,0x62,0x0e = sqadd v0.4h, v1.4h, v2.4h 0x20,0x0c,0x62,0x4e = sqadd v0.8h, v1.8h, v2.8h 0x20,0x0c,0xa2,0x0e = sqadd v0.2s, v1.2s, v2.2s 0x20,0x0c,0xa2,0x4e = sqadd v0.4s, v1.4s, v2.4s 0x20,0x0c,0xe2,0x4e = sqadd v0.2d, v1.2d, v2.2d 0x20,0x0c,0x22,0x2e = uqadd v0.8b, v1.8b, v2.8b 0x20,0x0c,0x22,0x6e = uqadd v0.16b, v1.16b, v2.16b 0x20,0x0c,0x62,0x2e = uqadd v0.4h, v1.4h, v2.4h 0x20,0x0c,0x62,0x6e = uqadd v0.8h, v1.8h, v2.8h 0x20,0x0c,0xa2,0x2e = uqadd v0.2s, v1.2s, v2.2s 0x20,0x0c,0xa2,0x6e = uqadd v0.4s, v1.4s, v2.4s 0x20,0x0c,0xe2,0x6e = uqadd v0.2d, v1.2d, v2.2d 0x20,0x2c,0x22,0x0e = sqsub v0.8b, v1.8b, v2.8b 0x20,0x2c,0x22,0x4e = sqsub v0.16b, v1.16b, v2.16b 0x20,0x2c,0x62,0x0e = sqsub v0.4h, v1.4h, v2.4h 0x20,0x2c,0x62,0x4e = sqsub v0.8h, v1.8h, v2.8h 0x20,0x2c,0xa2,0x0e = sqsub v0.2s, v1.2s, v2.2s 0x20,0x2c,0xa2,0x4e = sqsub v0.4s, v1.4s, v2.4s 0x20,0x2c,0xe2,0x4e = sqsub v0.2d, v1.2d, v2.2d 0x20,0x2c,0x22,0x2e = uqsub v0.8b, v1.8b, v2.8b 0x20,0x2c,0x22,0x6e = uqsub v0.16b, v1.16b, v2.16b 0x20,0x2c,0x62,0x2e = uqsub v0.4h, v1.4h, v2.4h 0x20,0x2c,0x62,0x6e = uqsub v0.8h, v1.8h, v2.8h 0x20,0x2c,0xa2,0x2e = uqsub v0.2s, v1.2s, v2.2s 0x20,0x2c,0xa2,0x6e = uqsub v0.4s, v1.4s, v2.4s 0x20,0x2c,0xe2,0x6e = uqsub v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-saturating-rounding-shift.s.cs010066400017500001750000000013151363402546700257160ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x5c,0x22,0x0e = sqrshl v0.8b, v1.8b, v2.8b 0x20,0x5c,0x22,0x4e = sqrshl v0.16b, v1.16b, v2.16b 0x20,0x5c,0x62,0x0e = sqrshl v0.4h, v1.4h, v2.4h 0x20,0x5c,0x62,0x4e = sqrshl v0.8h, v1.8h, v2.8h 0x20,0x5c,0xa2,0x0e = sqrshl v0.2s, v1.2s, v2.2s 0x20,0x5c,0xa2,0x4e = sqrshl v0.4s, v1.4s, v2.4s 0x20,0x5c,0xe2,0x4e = sqrshl v0.2d, v1.2d, v2.2d 0x20,0x5c,0x22,0x2e = uqrshl v0.8b, v1.8b, v2.8b 0x20,0x5c,0x22,0x6e = uqrshl v0.16b, v1.16b, v2.16b 0x20,0x5c,0x62,0x2e = uqrshl v0.4h, v1.4h, v2.4h 0x20,0x5c,0x62,0x6e = uqrshl v0.8h, v1.8h, v2.8h 0x20,0x5c,0xa2,0x2e = uqrshl v0.2s, v1.2s, v2.2s 0x20,0x5c,0xa2,0x6e = uqrshl v0.4s, v1.4s, v2.4s 0x20,0x5c,0xe2,0x6e = uqrshl v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-saturating-shift.s.cs010066400017500001750000000012771363402546700241020ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x4c,0x22,0x0e = sqshl v0.8b, v1.8b, v2.8b 0x20,0x4c,0x22,0x4e = sqshl v0.16b, v1.16b, v2.16b 0x20,0x4c,0x62,0x0e = sqshl v0.4h, v1.4h, v2.4h 0x20,0x4c,0x62,0x4e = sqshl v0.8h, v1.8h, v2.8h 0x20,0x4c,0xa2,0x0e = sqshl v0.2s, v1.2s, v2.2s 0x20,0x4c,0xa2,0x4e = sqshl v0.4s, v1.4s, v2.4s 0x20,0x4c,0xe2,0x4e = sqshl v0.2d, v1.2d, v2.2d 0x20,0x4c,0x22,0x2e = uqshl v0.8b, v1.8b, v2.8b 0x20,0x4c,0x22,0x6e = uqshl v0.16b, v1.16b, v2.16b 0x20,0x4c,0x62,0x2e = uqshl v0.4h, v1.4h, v2.4h 0x20,0x4c,0x62,0x6e = uqshl v0.8h, v1.8h, v2.8h 0x20,0x4c,0xa2,0x2e = uqshl v0.2s, v1.2s, v2.2s 0x20,0x4c,0xa2,0x6e = uqshl v0.4s, v1.4s, v2.4s 0x20,0x4c,0xe2,0x6e = uqshl v0.2d, v1.2d, v2.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-abs.s.cs010066400017500001750000000004421363402546700226070ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x1d,0xbb,0xe0,0x5e = abs d29, d24 0x1d,0xd7,0xb4,0x7e = fabd s29, s24, s20 0x1d,0xd7,0xf4,0x7e = fabd d29, d24, d20 0xd3,0x79,0x20,0x5e = sqabs b19, b14 0xf5,0x79,0x60,0x5e = sqabs h21, h15 0x94,0x79,0xa0,0x5e = sqabs s20, s12 0x92,0x79,0xe0,0x5e = sqabs d18, d12 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-add-sub.s.cs010066400017500001750000000001451363402546700233610ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x1f,0x84,0xf0,0x5e = add d31, d0, d16 0xe1,0x84,0xe8,0x7e = sub d1, d7, d8 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-by-elem-mla.s.cs010066400017500001750000000010551363402546700241440ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x10,0x81,0x5f = fmla s0, s1, v1.s[0] 0x7e,0x11,0xa1,0x5f = fmla s30, s11, v1.s[1] 0xa4,0x18,0x87,0x5f = fmla s4, s5, v7.s[2] 0xd0,0x1a,0xb0,0x5f = fmla s16, s22, v16.s[3] 0x20,0x10,0xc1,0x5f = fmla d0, d1, v1.d[0] 0x7e,0x19,0xc1,0x5f = fmla d30, d11, v1.d[1] 0x62,0x50,0x84,0x5f = fmls s2, s3, v4.s[0] 0x5d,0x51,0xbc,0x5f = fmls s29, s10, v28.s[1] 0x85,0x59,0x97,0x5f = fmls s5, s12, v23.s[2] 0x27,0x5a,0xba,0x5f = fmls s7, s17, v26.s[3] 0x20,0x50,0xc1,0x5f = fmls d0, d1, v1.d[0] 0x7e,0x59,0xc1,0x5f = fmls d30, d11, v1.d[1] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-by-elem-mul.s.cs010066400017500001750000000010621363402546700241660ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x90,0x81,0x5f = fmul s0, s1, v1.s[0] 0x7e,0x91,0xa1,0x5f = fmul s30, s11, v1.s[1] 0xa4,0x98,0x87,0x5f = fmul s4, s5, v7.s[2] 0xd0,0x9a,0xb0,0x5f = fmul s16, s22, v16.s[3] 0x20,0x90,0xc1,0x5f = fmul d0, d1, v1.d[0] 0x7e,0x99,0xc1,0x5f = fmul d30, d11, v1.d[1] 0x46,0x90,0x88,0x7f = fmulx s6, s2, v8.s[0] 0x67,0x90,0xad,0x7f = fmulx s7, s3, v13.s[1] 0xe9,0x98,0x89,0x7f = fmulx s9, s7, v9.s[2] 0xad,0x9a,0xaa,0x7f = fmulx s13, s21, v10.s[3] 0x2f,0x91,0xc7,0x7f = fmulx d15, d9, v7.d[0] 0x8d,0x99,0xcb,0x7f = fmulx d13, d12, v11.d[1] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs010066400017500001750000000012631363402546700263240ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x00,0x30,0x40,0x5f = sqdmlal s0, h0, v0.h[0] 0x27,0x30,0x74,0x5f = sqdmlal s7, h1, v4.h[3] 0x0b,0x3a,0x48,0x5f = sqdmlal s11, h16, v8.h[4] 0xde,0x3b,0x7f,0x5f = sqdmlal s30, h30, v15.h[7] 0x00,0x30,0x83,0x5f = sqdmlal d0, s0, v3.s[0] 0xde,0x3b,0xbe,0x5f = sqdmlal d30, s30, v30.s[3] 0x28,0x31,0xae,0x5f = sqdmlal d8, s9, v14.s[1] 0x21,0x70,0x41,0x5f = sqdmlsl s1, h1, v1.h[0] 0x48,0x70,0x55,0x5f = sqdmlsl s8, h2, v5.h[1] 0xac,0x71,0x6e,0x5f = sqdmlsl s12, h13, v14.h[2] 0x9d,0x7b,0x7b,0x5f = sqdmlsl s29, h28, v11.h[7] 0x21,0x70,0x8d,0x5f = sqdmlsl d1, s1, v13.s[0] 0xff,0x7b,0x9f,0x5f = sqdmlsl d31, s31, v31.s[2] 0x50,0x7a,0xbc,0x5f = sqdmlsl d16, s18, v28.s[3] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs010066400017500001750000000015101363402546700263430ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x21,0xb0,0x51,0x5f = sqdmull s1, h1, v1.h[1] 0x48,0xb0,0x65,0x5f = sqdmull s8, h2, v5.h[2] 0x2c,0xb2,0x79,0x5f = sqdmull s12, h17, v9.h[3] 0xff,0xbb,0x7f,0x5f = sqdmull s31, h31, v15.h[7] 0x21,0xb0,0x84,0x5f = sqdmull d1, s1, v4.s[0] 0xff,0xbb,0xbf,0x5f = sqdmull d31, s31, v31.s[3] 0x49,0xb1,0x8f,0x5f = sqdmull d9, s10, v15.s[0] 0x20,0xc0,0x40,0x5f = sqdmulh h0, h1, v0.h[0] 0x6a,0xc9,0x4a,0x5f = sqdmulh h10, h11, v10.h[4] 0xb4,0xca,0x7f,0x5f = sqdmulh h20, h21, v15.h[7] 0x59,0xcb,0xbb,0x5f = sqdmulh s25, s26, v27.s[3] 0xc2,0xc0,0x87,0x5f = sqdmulh s2, s6, v7.s[0] 0xdf,0xd3,0x6e,0x5f = sqrdmulh h31, h30, v14.h[2] 0x21,0xd8,0x41,0x5f = sqrdmulh h1, h1, v1.h[4] 0xd5,0xda,0x7f,0x5f = sqrdmulh h21, h22, v15.h[7] 0xc5,0xd8,0x87,0x5f = sqrdmulh s5, s6, v7.s[2] 0x54,0xd3,0xbb,0x5f = sqrdmulh s20, s26, v27.s[1] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-compare.s.cs010066400017500001750000000007421363402546700234730ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xb4,0x8e,0xf6,0x7e = cmeq d20, d21, d22 0xb4,0x9a,0xe0,0x5e = cmeq d20, d21, #0x0 0xb4,0x3e,0xf6,0x7e = cmhs d20, d21, d22 0xb4,0x3e,0xf6,0x5e = cmge d20, d21, d22 0xb4,0x8a,0xe0,0x7e = cmge d20, d21, #0x0 0xb4,0x36,0xf6,0x7e = cmhi d20, d21, d22 0xb4,0x36,0xf6,0x5e = cmgt d20, d21, d22 0xb4,0x8a,0xe0,0x5e = cmgt d20, d21, #0x0 0xb4,0x9a,0xe0,0x7e = cmle d20, d21, #0x0 0xb4,0xaa,0xe0,0x5e = cmlt d20, d21, #0x0 0xb4,0x8e,0xf6,0x5e = cmtst d20, d21, d22 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-cvt.s.cs010066400017500001750000000024331363402546700226400ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xb6,0xd9,0x21,0x5e = scvtf s22, s13 0x95,0xd9,0x61,0x5e = scvtf d21, d12 0xb6,0xd9,0x21,0x7e = ucvtf s22, s13 0xd5,0xd9,0x61,0x7e = ucvtf d21, d14 0xb6,0xe5,0x20,0x5f = scvtf s22, s13, #32 0x95,0xe5,0x40,0x5f = scvtf d21, d12, #64 0xb6,0xe5,0x20,0x7f = ucvtf s22, s13, #32 0xd5,0xe5,0x40,0x7f = ucvtf d21, d14, #64 0x95,0xfd,0x3f,0x5f = fcvtzs s21, s12, #1 0x95,0xfd,0x7f,0x5f = fcvtzs d21, d12, #1 0x95,0xfd,0x3f,0x7f = fcvtzu s21, s12, #1 0x95,0xfd,0x7f,0x7f = fcvtzu d21, d12, #1 0xb6,0x69,0x61,0x7e = fcvtxn s22, d13 0xac,0xc9,0x21,0x5e = fcvtas s12, s13 0xd5,0xc9,0x61,0x5e = fcvtas d21, d14 0xac,0xc9,0x21,0x7e = fcvtau s12, s13 0xd5,0xc9,0x61,0x7e = fcvtau d21, d14 0xb6,0xb9,0x21,0x5e = fcvtms s22, s13 0xd5,0xb9,0x61,0x5e = fcvtms d21, d14 0xac,0xb9,0x21,0x7e = fcvtmu s12, s13 0xd5,0xb9,0x61,0x7e = fcvtmu d21, d14 0xb6,0xa9,0x21,0x5e = fcvtns s22, s13 0xd5,0xa9,0x61,0x5e = fcvtns d21, d14 0xac,0xa9,0x21,0x7e = fcvtnu s12, s13 0xd5,0xa9,0x61,0x7e = fcvtnu d21, d14 0xb6,0xa9,0xa1,0x5e = fcvtps s22, s13 0xd5,0xa9,0xe1,0x5e = fcvtps d21, d14 0xac,0xa9,0xa1,0x7e = fcvtpu s12, s13 0xd5,0xa9,0xe1,0x7e = fcvtpu d21, d14 0xac,0xb9,0xa1,0x5e = fcvtzs s12, s13 0xd5,0xb9,0xe1,0x5e = fcvtzs d21, d14 0xac,0xb9,0xa1,0x7e = fcvtzu s12, s13 0xd5,0xb9,0xe1,0x7e = fcvtzu d21, d14 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-dup.s.cs010066400017500001750000000015551363402546700226400ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x00,0x04,0x1f,0x5e = dup b0, v0.b[15] 0x01,0x04,0x0f,0x5e = dup b1, v0.b[7] 0x11,0x04,0x01,0x5e = dup b17, v0.b[0] 0xe5,0x07,0x1e,0x5e = dup h5, v31.h[7] 0x29,0x04,0x12,0x5e = dup h9, v1.h[4] 0x2b,0x06,0x02,0x5e = dup h11, v17.h[0] 0x42,0x04,0x1c,0x5e = dup s2, v2.s[3] 0xa4,0x06,0x04,0x5e = dup s4, v21.s[0] 0xbf,0x06,0x14,0x5e = dup s31, v21.s[2] 0xa3,0x04,0x08,0x5e = dup d3, v5.d[0] 0xa6,0x04,0x18,0x5e = dup d6, v5.d[1] 0x00,0x04,0x1f,0x5e = dup b0, v0.b[15] 0x01,0x04,0x0f,0x5e = dup b1, v0.b[7] 0x11,0x04,0x01,0x5e = dup b17, v0.b[0] 0xe5,0x07,0x1e,0x5e = dup h5, v31.h[7] 0x29,0x04,0x12,0x5e = dup h9, v1.h[4] 0x2b,0x06,0x02,0x5e = dup h11, v17.h[0] 0x42,0x04,0x1c,0x5e = dup s2, v2.s[3] 0xa4,0x06,0x04,0x5e = dup s4, v21.s[0] 0xbf,0x06,0x14,0x5e = dup s31, v21.s[2] 0xa3,0x04,0x08,0x5e = dup d3, v5.d[0] 0xa6,0x04,0x18,0x5e = dup d6, v5.d[1] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-extract-narrow.s.cs010066400017500001750000000005511363402546700250230ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xd3,0x29,0x21,0x7e = sqxtun b19, h14 0xf5,0x29,0x61,0x7e = sqxtun h21, s15 0x94,0x29,0xa1,0x7e = sqxtun s20, d12 0x52,0x4a,0x21,0x5e = sqxtn b18, h18 0x34,0x4a,0x61,0x5e = sqxtn h20, s17 0xd3,0x49,0xa1,0x5e = sqxtn s19, d14 0x52,0x4a,0x21,0x7e = uqxtn b18, h18 0x34,0x4a,0x61,0x7e = uqxtn h20, s17 0xd3,0x49,0xa1,0x7e = uqxtn s19, d14 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-fp-compare.s.cs010066400017500001750000000015531363402546700240770ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x6a,0xe5,0x2c,0x5e = fcmeq s10, s11, s12 0xb4,0xe6,0x76,0x5e = fcmeq d20, d21, d22 0x6a,0xd9,0xa0,0x5e = fcmeq s10, s11, #0.0 0xb4,0xda,0xe0,0x5e = fcmeq d20, d21, #0.0 0x6a,0xe5,0x2c,0x7e = fcmge s10, s11, s12 0xb4,0xe6,0x76,0x7e = fcmge d20, d21, d22 0x6a,0xc9,0xa0,0x7e = fcmge s10, s11, #0.0 0xb4,0xca,0xe0,0x7e = fcmge d20, d21, #0.0 0x6a,0xe5,0xac,0x7e = fcmgt s10, s11, s12 0xb4,0xe6,0xf6,0x7e = fcmgt d20, d21, d22 0x6a,0xc9,0xa0,0x5e = fcmgt s10, s11, #0.0 0xb4,0xca,0xe0,0x5e = fcmgt d20, d21, #0.0 0x6a,0xd9,0xa0,0x7e = fcmle s10, s11, #0.0 0xb4,0xda,0xe0,0x7e = fcmle d20, d21, #0.0 0x6a,0xe9,0xa0,0x5e = fcmlt s10, s11, #0.0 0xb4,0xea,0xe0,0x5e = fcmlt d20, d21, #0.0 0x6a,0xed,0x2c,0x7e = facge s10, s11, s12 0xb4,0xee,0x76,0x7e = facge d20, d21, d22 0x6a,0xed,0xac,0x7e = facgt s10, s11, s12 0xb4,0xee,0xf6,0x7e = facgt d20, d21, d22 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-mul.s.cs010066400017500001750000000010441363402546700226360ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x6a,0xb5,0x6c,0x5e = sqdmulh h10, h11, h12 0xb4,0xb6,0xa2,0x5e = sqdmulh s20, s21, s2 0x6a,0xb5,0x6c,0x7e = sqrdmulh h10, h11, h12 0xb4,0xb6,0xa2,0x7e = sqrdmulh s20, s21, s2 0xd4,0xde,0x2f,0x5e = fmulx s20, s22, s15 0x77,0xdd,0x61,0x5e = fmulx d23, d11, d1 0x71,0x93,0x6c,0x5e = sqdmlal s17, h27, h12 0x13,0x93,0xac,0x5e = sqdmlal d19, s24, s12 0x8e,0xb1,0x79,0x5e = sqdmlsl s14, h12, h25 0xec,0xb2,0xad,0x5e = sqdmlsl d12, s23, s13 0xcc,0xd2,0x6c,0x5e = sqdmull s12, h22, h12 0xcf,0xd2,0xac,0x5e = sqdmull d15, s22, s12 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-neg.s.cs010066400017500001750000000003201363402546700226060ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x1d,0xbb,0xe0,0x7e = neg d29, d24 0xd3,0x79,0x20,0x7e = sqneg b19, b14 0xf5,0x79,0x60,0x7e = sqneg h21, h15 0x94,0x79,0xa0,0x7e = sqneg s20, s12 0x92,0x79,0xe0,0x7e = sqneg d18, d12 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-recip.s.cs010066400017500001750000000006531363402546700231500ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x15,0xfe,0x2d,0x5e = frecps s21, s16, s13 0xd6,0xff,0x75,0x5e = frecps d22, d30, d21 0xb5,0xfc,0xac,0x5e = frsqrts s21, s5, s12 0xc8,0xfe,0xf2,0x5e = frsqrts d8, d22, d18 0xd3,0xd9,0xa1,0x5e = frecpe s19, s14 0xad,0xd9,0xe1,0x5e = frecpe d13, d13 0x52,0xf9,0xa1,0x5e = frecpx s18, s10 0x70,0xfa,0xe1,0x5e = frecpx d16, d19 0xb6,0xd9,0xa1,0x7e = frsqrte s22, s13 0x95,0xd9,0xe1,0x7e = frsqrte d21, d12 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-reduce-pairwise.s.cs010066400017500001750000000001451363402546700251320ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0xb8,0xf1,0x5e = addp d0, v1.2d 0x34,0xd8,0x70,0x7e = faddp d20, v1.2d capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-rounding-shift.s.cs010066400017500001750000000001531363402546700250010ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xf1,0x57,0xe8,0x5e = srshl d17, d31, d8 0xf1,0x57,0xe8,0x7e = urshl d17, d31, d8 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-saturating-add-sub.s.cs010066400017500001750000000017251363402546700255450ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x0c,0x22,0x5e = sqadd b0, b1, b2 0x6a,0x0d,0x6c,0x5e = sqadd h10, h11, h12 0xb4,0x0e,0xa2,0x5e = sqadd s20, s21, s2 0xf1,0x0f,0xe8,0x5e = sqadd d17, d31, d8 0x20,0x0c,0x22,0x7e = uqadd b0, b1, b2 0x6a,0x0d,0x6c,0x7e = uqadd h10, h11, h12 0xb4,0x0e,0xa2,0x7e = uqadd s20, s21, s2 0xf1,0x0f,0xe8,0x7e = uqadd d17, d31, d8 0x20,0x2c,0x22,0x5e = sqsub b0, b1, b2 0x6a,0x2d,0x6c,0x5e = sqsub h10, h11, h12 0xb4,0x2e,0xa2,0x5e = sqsub s20, s21, s2 0xf1,0x2f,0xe8,0x5e = sqsub d17, d31, d8 0x20,0x2c,0x22,0x7e = uqsub b0, b1, b2 0x6a,0x2d,0x6c,0x7e = uqsub h10, h11, h12 0xb4,0x2e,0xa2,0x7e = uqsub s20, s21, s2 0xf1,0x2f,0xe8,0x7e = uqsub d17, d31, d8 0xd3,0x39,0x20,0x5e = suqadd b19, b14 0xf4,0x39,0x60,0x5e = suqadd h20, h15 0x95,0x39,0xa0,0x5e = suqadd s21, s12 0xd2,0x3a,0xe0,0x5e = suqadd d18, d22 0xd3,0x39,0x20,0x7e = usqadd b19, b14 0xf4,0x39,0x60,0x7e = usqadd h20, h15 0x95,0x39,0xa0,0x7e = usqadd s21, s12 0xd2,0x3a,0xe0,0x7e = usqadd d18, d22 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs010066400017500001750000000005471363402546700271670ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x5c,0x22,0x5e = sqrshl b0, b1, b2 0x6a,0x5d,0x6c,0x5e = sqrshl h10, h11, h12 0xb4,0x5e,0xa2,0x5e = sqrshl s20, s21, s2 0xf1,0x5f,0xe8,0x5e = sqrshl d17, d31, d8 0x20,0x5c,0x22,0x7e = uqrshl b0, b1, b2 0x6a,0x5d,0x6c,0x7e = uqrshl h10, h11, h12 0xb4,0x5e,0xa2,0x7e = uqrshl s20, s21, s2 0xf1,0x5f,0xe8,0x7e = uqrshl d17, d31, d8 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-saturating-shift.s.cs010066400017500001750000000005371363402546700253430ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x4c,0x22,0x5e = sqshl b0, b1, b2 0x6a,0x4d,0x6c,0x5e = sqshl h10, h11, h12 0xb4,0x4e,0xa2,0x5e = sqshl s20, s21, s2 0xf1,0x4f,0xe8,0x5e = sqshl d17, d31, d8 0x20,0x4c,0x22,0x7e = uqshl b0, b1, b2 0x6a,0x4d,0x6c,0x7e = uqshl h10, h11, h12 0xb4,0x4e,0xa2,0x7e = uqshl s20, s21, s2 0xf1,0x4f,0xe8,0x7e = uqshl d17, d31, d8 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-shift-imm.s.cs010066400017500001750000000033341363402546700237420ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x0f,0x06,0x74,0x5f = sshr d15, d16, #12 0x2a,0x06,0x6e,0x7f = ushr d10, d17, #18 0x53,0x26,0x79,0x5f = srshr d19, d18, #7 0xf4,0x26,0x61,0x7f = urshr d20, d23, #31 0x92,0x15,0x6b,0x5f = ssra d18, d12, #21 0xb4,0x15,0x43,0x7f = usra d20, d13, #61 0x6f,0x35,0x6d,0x5f = srsra d15, d11, #19 0x52,0x35,0x73,0x7f = ursra d18, d10, #13 0x47,0x55,0x4c,0x5f = shl d7, d10, #12 0x6b,0x76,0x0f,0x5f = sqshl b11, b19, #7 0x4d,0x76,0x1b,0x5f = sqshl h13, h18, #11 0x2e,0x76,0x36,0x5f = sqshl s14, s17, #22 0x0f,0x76,0x73,0x5f = sqshl d15, d16, #51 0xf2,0x75,0x0e,0x7f = uqshl b18, b15, #6 0x4b,0x76,0x17,0x7f = uqshl h11, h18, #7 0x6e,0x76,0x32,0x7f = uqshl s14, s19, #18 0x8f,0x75,0x53,0x7f = uqshl d15, d12, #19 0x4f,0x66,0x0e,0x7f = sqshlu b15, b18, #6 0x33,0x66,0x16,0x7f = sqshlu h19, h17, #6 0xd0,0x65,0x39,0x7f = sqshlu s16, s14, #25 0xab,0x65,0x60,0x7f = sqshlu d11, d13, #32 0x8a,0x45,0x72,0x7f = sri d10, d12, #14 0xca,0x55,0x4c,0x7f = sli d10, d14, #12 0xea,0x95,0x0b,0x5f = sqshrn b10, h15, #5 0x51,0x95,0x1c,0x5f = sqshrn h17, s10, #4 0x52,0x95,0x21,0x5f = sqshrn s18, d10, #31 0x4c,0x95,0x09,0x7f = uqshrn b12, h10, #7 0xca,0x95,0x1b,0x7f = uqshrn h10, s14, #5 0x8a,0x95,0x33,0x7f = uqshrn s10, d12, #13 0xaa,0x9d,0x0e,0x5f = sqrshrn b10, h13, #2 0x4f,0x9d,0x1a,0x5f = sqrshrn h15, s10, #6 0x8f,0x9d,0x37,0x5f = sqrshrn s15, d12, #9 0x8a,0x9d,0x0b,0x7f = uqrshrn b10, h12, #5 0x4c,0x9d,0x12,0x7f = uqrshrn h12, s10, #14 0x4a,0x9d,0x27,0x7f = uqrshrn s10, d10, #25 0x4f,0x85,0x09,0x7f = sqshrun b15, h10, #7 0xd4,0x85,0x1d,0x7f = sqshrun h20, s14, #3 0xea,0x85,0x31,0x7f = sqshrun s10, d15, #15 0x51,0x8d,0x0a,0x7f = sqrshrun b17, h10, #6 0xaa,0x8d,0x11,0x7f = sqrshrun h10, s13, #15 0x16,0x8e,0x21,0x7f = sqrshrun s22, d16, #31 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-scalar-shift.s.cs010066400017500001750000000001511363402546700231540ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xf1,0x47,0xe8,0x5e = sshl d17, d31, d8 0xf1,0x47,0xe8,0x7e = ushl d17, d31, d8 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-shift-left-long.s.cs010066400017500001750000000010751363402546700236040ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0xa4,0x0b,0x0f = sshll v0.8h, v1.8b, #3 0x20,0xa4,0x13,0x0f = sshll v0.4s, v1.4h, #3 0x20,0xa4,0x23,0x0f = sshll v0.2d, v1.2s, #3 0x20,0xa4,0x0b,0x4f = sshll2 v0.8h, v1.16b, #3 0x20,0xa4,0x13,0x4f = sshll2 v0.4s, v1.8h, #3 0x20,0xa4,0x23,0x4f = sshll2 v0.2d, v1.4s, #3 0x20,0xa4,0x0b,0x2f = ushll v0.8h, v1.8b, #3 0x20,0xa4,0x13,0x2f = ushll v0.4s, v1.4h, #3 0x20,0xa4,0x23,0x2f = ushll v0.2d, v1.2s, #3 0x20,0xa4,0x0b,0x6f = ushll2 v0.8h, v1.16b, #3 0x20,0xa4,0x13,0x6f = ushll2 v0.4s, v1.8h, #3 0x20,0xa4,0x23,0x6f = ushll2 v0.2d, v1.4s, #3 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-shift.s.cs010066400017500001750000000017401363402546700217160ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x44,0x22,0x0e = sshl v0.8b, v1.8b, v2.8b 0x20,0x44,0x22,0x4e = sshl v0.16b, v1.16b, v2.16b 0x20,0x44,0x62,0x0e = sshl v0.4h, v1.4h, v2.4h 0x20,0x44,0x62,0x4e = sshl v0.8h, v1.8h, v2.8h 0x20,0x44,0xa2,0x0e = sshl v0.2s, v1.2s, v2.2s 0x20,0x44,0xa2,0x4e = sshl v0.4s, v1.4s, v2.4s 0x20,0x44,0xe2,0x4e = sshl v0.2d, v1.2d, v2.2d 0x20,0x44,0x22,0x2e = ushl v0.8b, v1.8b, v2.8b 0x20,0x44,0x22,0x6e = ushl v0.16b, v1.16b, v2.16b 0x20,0x44,0x62,0x2e = ushl v0.4h, v1.4h, v2.4h 0x20,0x44,0x62,0x6e = ushl v0.8h, v1.8h, v2.8h 0x20,0x44,0xa2,0x2e = ushl v0.2s, v1.2s, v2.2s 0x20,0x44,0xa2,0x6e = ushl v0.4s, v1.4s, v2.4s 0x20,0x44,0xe2,0x6e = ushl v0.2d, v1.2d, v2.2d 0x20,0x54,0x0b,0x0f = shl v0.8b, v1.8b, #3 0x20,0x54,0x13,0x0f = shl v0.4h, v1.4h, #3 0x20,0x54,0x23,0x0f = shl v0.2s, v1.2s, #3 0x20,0x54,0x0b,0x4f = shl v0.16b, v1.16b, #3 0x20,0x54,0x13,0x4f = shl v0.8h, v1.8h, #3 0x20,0x54,0x23,0x4f = shl v0.4s, v1.4s, #3 0x20,0x54,0x43,0x4f = shl v0.2d, v1.2d, #3 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-simd-copy.s.cs010066400017500001750000000032201363402546700225000ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x22,0x1c,0x05,0x4e = ins v2.b[2], w1 0xc7,0x1d,0x1e,0x4e = ins v7.h[7], w14 0xd4,0x1f,0x04,0x4e = ins v20.s[0], w30 0xe1,0x1c,0x18,0x4e = ins v1.d[1], x7 0x22,0x1c,0x05,0x4e = ins v2.b[2], w1 0xc7,0x1d,0x1e,0x4e = ins v7.h[7], w14 0xd4,0x1f,0x04,0x4e = ins v20.s[0], w30 0xe1,0x1c,0x18,0x4e = ins v1.d[1], x7 0x01,0x2c,0x1f,0x0e = smov w1, v0.b[15] 0xce,0x2c,0x12,0x0e = smov w14, v6.h[4] 0x01,0x2c,0x1f,0x4e = smov x1, v0.b[15] 0xce,0x2c,0x12,0x4e = smov x14, v6.h[4] 0x34,0x2d,0x14,0x4e = smov x20, v9.s[2] 0x01,0x3c,0x1f,0x0e = umov w1, v0.b[15] 0xce,0x3c,0x12,0x0e = umov w14, v6.h[4] 0x34,0x3d,0x14,0x0e = umov w20, v9.s[2] 0x47,0x3e,0x18,0x4e = umov x7, v18.d[1] 0x34,0x3d,0x14,0x0e = umov w20, v9.s[2] 0x47,0x3e,0x18,0x4e = umov x7, v18.d[1] 0x61,0x34,0x1d,0x6e = ins v1.b[14], v3.b[6] 0xe6,0x54,0x1e,0x6e = ins v6.h[7], v7.h[5] 0xcf,0x46,0x1c,0x6e = ins v15.s[3], v22.s[2] 0x80,0x44,0x08,0x6e = ins v0.d[0], v4.d[1] 0x61,0x34,0x1d,0x6e = ins v1.b[14], v3.b[6] 0xe6,0x54,0x1e,0x6e = ins v6.h[7], v7.h[5] 0xcf,0x46,0x1c,0x6e = ins v15.s[3], v22.s[2] 0x80,0x44,0x08,0x6e = ins v0.d[0], v4.d[1] 0x41,0x04,0x05,0x0e = dup v1.8b, v2.b[2] 0xeb,0x04,0x1e,0x0e = dup v11.4h, v7.h[7] 0x91,0x06,0x04,0x0e = dup v17.2s, v20.s[0] 0x41,0x04,0x05,0x4e = dup v1.16b, v2.b[2] 0xeb,0x04,0x1e,0x4e = dup v11.8h, v7.h[7] 0x91,0x06,0x04,0x4e = dup v17.4s, v20.s[0] 0x25,0x04,0x18,0x4e = dup v5.2d, v1.d[1] 0x21,0x0c,0x01,0x0e = dup v1.8b, w1 0xcb,0x0d,0x02,0x0e = dup v11.4h, w14 0xd1,0x0f,0x04,0x0e = dup v17.2s, w30 0x41,0x0c,0x01,0x4e = dup v1.16b, w2 0x0b,0x0e,0x02,0x4e = dup v11.8h, w16 0x91,0x0f,0x04,0x4e = dup v17.4s, w28 0x05,0x0c,0x08,0x4e = dup v5.2d, x0 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-simd-ldst-multi-elem.s.cs010066400017500001750000000247271363402546700245630ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x00,0x70,0x00,0x4c = st1 {v0.16b}, [x0] 0xef,0x75,0x00,0x4c = st1 {v15.8h}, [x15] 0xff,0x7b,0x00,0x4c = st1 {v31.4s}, [sp] 0x00,0x7c,0x00,0x4c = st1 {v0.2d}, [x0] 0x00,0x70,0x00,0x0c = st1 {v0.8b}, [x0] 0xef,0x75,0x00,0x0c = st1 {v15.4h}, [x15] 0xff,0x7b,0x00,0x0c = st1 {v31.2s}, [sp] 0x00,0x7c,0x00,0x0c = st1 {v0.1d}, [x0] 0x00,0xa0,0x00,0x4c = st1 {v0.16b, v1.16b}, [x0] 0xef,0xa5,0x00,0x4c = st1 {v15.8h, v16.8h}, [x15] 0xff,0xab,0x00,0x4c = st1 {v31.4s, v0.4s}, [sp] 0x00,0xac,0x00,0x4c = st1 {v0.2d, v1.2d}, [x0] 0x00,0xa0,0x00,0x0c = st1 {v0.8b, v1.8b}, [x0] 0xef,0xa5,0x00,0x0c = st1 {v15.4h, v16.4h}, [x15] 0xff,0xab,0x00,0x0c = st1 {v31.2s, v0.2s}, [sp] 0x00,0xac,0x00,0x0c = st1 {v0.1d, v1.1d}, [x0] 0x00,0xa0,0x00,0x4c = st1 {v0.16b, v1.16b}, [x0] 0xef,0xa5,0x00,0x4c = st1 {v15.8h, v16.8h}, [x15] 0xff,0xab,0x00,0x4c = st1 {v31.4s, v0.4s}, [sp] 0x00,0xac,0x00,0x4c = st1 {v0.2d, v1.2d}, [x0] 0x00,0xa0,0x00,0x0c = st1 {v0.8b, v1.8b}, [x0] 0xef,0xa5,0x00,0x0c = st1 {v15.4h, v16.4h}, [x15] 0xff,0xab,0x00,0x0c = st1 {v31.2s, v0.2s}, [sp] 0x00,0xac,0x00,0x0c = st1 {v0.1d, v1.1d}, [x0] 0x00,0x60,0x00,0x4c = st1 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x65,0x00,0x4c = st1 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x6b,0x00,0x4c = st1 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x6c,0x00,0x4c = st1 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x60,0x00,0x0c = st1 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x65,0x00,0x0c = st1 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x6b,0x00,0x0c = st1 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x6c,0x00,0x0c = st1 {v0.1d, v1.1d, v2.1d}, [x0] 0x00,0x60,0x00,0x4c = st1 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x65,0x00,0x4c = st1 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x6b,0x00,0x4c = st1 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x6c,0x00,0x4c = st1 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x60,0x00,0x0c = st1 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x65,0x00,0x0c = st1 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x6b,0x00,0x0c = st1 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x6c,0x00,0x0c = st1 {v0.1d, v1.1d, v2.1d}, [x0] 0x00,0x20,0x00,0x4c = st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x25,0x00,0x4c = st1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x2b,0x00,0x4c = st1 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x2c,0x00,0x4c = st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x20,0x00,0x0c = st1 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x25,0x00,0x0c = st1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x2b,0x00,0x0c = st1 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x2c,0x00,0x0c = st1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x0] 0x00,0x20,0x00,0x4c = st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x25,0x00,0x4c = st1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x2b,0x00,0x4c = st1 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x2c,0x00,0x4c = st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x20,0x00,0x0c = st1 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x25,0x00,0x0c = st1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x2b,0x00,0x0c = st1 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x2c,0x00,0x0c = st1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x0] 0x00,0x80,0x00,0x4c = st2 {v0.16b, v1.16b}, [x0] 0xef,0x85,0x00,0x4c = st2 {v15.8h, v16.8h}, [x15] 0xff,0x8b,0x00,0x4c = st2 {v31.4s, v0.4s}, [sp] 0x00,0x8c,0x00,0x4c = st2 {v0.2d, v1.2d}, [x0] 0x00,0x80,0x00,0x0c = st2 {v0.8b, v1.8b}, [x0] 0xef,0x85,0x00,0x0c = st2 {v15.4h, v16.4h}, [x15] 0xff,0x8b,0x00,0x0c = st2 {v31.2s, v0.2s}, [sp] 0x00,0x80,0x00,0x4c = st2 {v0.16b, v1.16b}, [x0] 0xef,0x85,0x00,0x4c = st2 {v15.8h, v16.8h}, [x15] 0xff,0x8b,0x00,0x4c = st2 {v31.4s, v0.4s}, [sp] 0x00,0x8c,0x00,0x4c = st2 {v0.2d, v1.2d}, [x0] 0x00,0x80,0x00,0x0c = st2 {v0.8b, v1.8b}, [x0] 0xef,0x85,0x00,0x0c = st2 {v15.4h, v16.4h}, [x15] 0xff,0x8b,0x00,0x0c = st2 {v31.2s, v0.2s}, [sp] 0x00,0x40,0x00,0x4c = st3 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x45,0x00,0x4c = st3 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x4b,0x00,0x4c = st3 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x4c,0x00,0x4c = st3 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x40,0x00,0x0c = st3 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x45,0x00,0x0c = st3 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x4b,0x00,0x0c = st3 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x40,0x00,0x4c = st3 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x45,0x00,0x4c = st3 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x4b,0x00,0x4c = st3 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x4c,0x00,0x4c = st3 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x40,0x00,0x0c = st3 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x45,0x00,0x0c = st3 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x4b,0x00,0x0c = st3 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x00,0x00,0x4c = st4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x05,0x00,0x4c = st4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x0b,0x00,0x4c = st4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x0c,0x00,0x4c = st4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x00,0x00,0x0c = st4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x05,0x00,0x0c = st4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x0b,0x00,0x0c = st4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x00,0x00,0x4c = st4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x05,0x00,0x4c = st4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x0b,0x00,0x4c = st4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x0c,0x00,0x4c = st4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x00,0x00,0x0c = st4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x05,0x00,0x0c = st4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x0b,0x00,0x0c = st4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x70,0x40,0x4c = ld1 {v0.16b}, [x0] 0xef,0x75,0x40,0x4c = ld1 {v15.8h}, [x15] 0xff,0x7b,0x40,0x4c = ld1 {v31.4s}, [sp] 0x00,0x7c,0x40,0x4c = ld1 {v0.2d}, [x0] 0x00,0x70,0x40,0x0c = ld1 {v0.8b}, [x0] 0xef,0x75,0x40,0x0c = ld1 {v15.4h}, [x15] 0xff,0x7b,0x40,0x0c = ld1 {v31.2s}, [sp] 0x00,0x7c,0x40,0x0c = ld1 {v0.1d}, [x0] 0x00,0xa0,0x40,0x4c = ld1 {v0.16b, v1.16b}, [x0] 0xef,0xa5,0x40,0x4c = ld1 {v15.8h, v16.8h}, [x15] 0xff,0xab,0x40,0x4c = ld1 {v31.4s, v0.4s}, [sp] 0x00,0xac,0x40,0x4c = ld1 {v0.2d, v1.2d}, [x0] 0x00,0xa0,0x40,0x0c = ld1 {v0.8b, v1.8b}, [x0] 0xef,0xa5,0x40,0x0c = ld1 {v15.4h, v16.4h}, [x15] 0xff,0xab,0x40,0x0c = ld1 {v31.2s, v0.2s}, [sp] 0x00,0xac,0x40,0x0c = ld1 {v0.1d, v1.1d}, [x0] 0x00,0xa0,0x40,0x4c = ld1 {v0.16b, v1.16b}, [x0] 0xef,0xa5,0x40,0x4c = ld1 {v15.8h, v16.8h}, [x15] 0xff,0xab,0x40,0x4c = ld1 {v31.4s, v0.4s}, [sp] 0x00,0xac,0x40,0x4c = ld1 {v0.2d, v1.2d}, [x0] 0x00,0xa0,0x40,0x0c = ld1 {v0.8b, v1.8b}, [x0] 0xef,0xa5,0x40,0x0c = ld1 {v15.4h, v16.4h}, [x15] 0xff,0xab,0x40,0x0c = ld1 {v31.2s, v0.2s}, [sp] 0x00,0xac,0x40,0x0c = ld1 {v0.1d, v1.1d}, [x0] 0x00,0x60,0x40,0x4c = ld1 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x65,0x40,0x4c = ld1 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x6b,0x40,0x4c = ld1 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x6c,0x40,0x4c = ld1 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x60,0x40,0x0c = ld1 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x65,0x40,0x0c = ld1 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x6b,0x40,0x0c = ld1 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x6c,0x40,0x0c = ld1 {v0.1d, v1.1d, v2.1d}, [x0] 0x00,0x60,0x40,0x4c = ld1 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x65,0x40,0x4c = ld1 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x6b,0x40,0x4c = ld1 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x6c,0x40,0x4c = ld1 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x60,0x40,0x0c = ld1 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x65,0x40,0x0c = ld1 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x6b,0x40,0x0c = ld1 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x6c,0x40,0x0c = ld1 {v0.1d, v1.1d, v2.1d}, [x0] 0x00,0x20,0x40,0x4c = ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x25,0x40,0x4c = ld1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x2b,0x40,0x4c = ld1 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x2c,0x40,0x4c = ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x20,0x40,0x0c = ld1 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x25,0x40,0x0c = ld1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x2b,0x40,0x0c = ld1 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x2c,0x40,0x0c = ld1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x0] 0x00,0x20,0x40,0x4c = ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x25,0x40,0x4c = ld1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x2b,0x40,0x4c = ld1 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x2c,0x40,0x4c = ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x20,0x40,0x0c = ld1 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x25,0x40,0x0c = ld1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x2b,0x40,0x0c = ld1 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x2c,0x40,0x0c = ld1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x0] 0x00,0x80,0x40,0x4c = ld2 {v0.16b, v1.16b}, [x0] 0xef,0x85,0x40,0x4c = ld2 {v15.8h, v16.8h}, [x15] 0xff,0x8b,0x40,0x4c = ld2 {v31.4s, v0.4s}, [sp] 0x00,0x8c,0x40,0x4c = ld2 {v0.2d, v1.2d}, [x0] 0x00,0x80,0x40,0x0c = ld2 {v0.8b, v1.8b}, [x0] 0xef,0x85,0x40,0x0c = ld2 {v15.4h, v16.4h}, [x15] 0xff,0x8b,0x40,0x0c = ld2 {v31.2s, v0.2s}, [sp] 0x00,0x80,0x40,0x4c = ld2 {v0.16b, v1.16b}, [x0] 0xef,0x85,0x40,0x4c = ld2 {v15.8h, v16.8h}, [x15] 0xff,0x8b,0x40,0x4c = ld2 {v31.4s, v0.4s}, [sp] 0x00,0x8c,0x40,0x4c = ld2 {v0.2d, v1.2d}, [x0] 0x00,0x80,0x40,0x0c = ld2 {v0.8b, v1.8b}, [x0] 0xef,0x85,0x40,0x0c = ld2 {v15.4h, v16.4h}, [x15] 0xff,0x8b,0x40,0x0c = ld2 {v31.2s, v0.2s}, [sp] 0x00,0x40,0x40,0x4c = ld3 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x45,0x40,0x4c = ld3 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x4b,0x40,0x4c = ld3 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x4c,0x40,0x4c = ld3 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x40,0x40,0x0c = ld3 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x45,0x40,0x0c = ld3 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x4b,0x40,0x0c = ld3 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x40,0x40,0x4c = ld3 {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0x45,0x40,0x4c = ld3 {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0x4b,0x40,0x4c = ld3 {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0x4c,0x40,0x4c = ld3 {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0x40,0x40,0x0c = ld3 {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0x45,0x40,0x0c = ld3 {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0x4b,0x40,0x0c = ld3 {v31.2s, v0.2s, v1.2s}, [sp] 0x00,0x00,0x40,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x05,0x40,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x0b,0x40,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x0c,0x40,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x00,0x40,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x05,0x40,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x0b,0x40,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0x00,0x00,0x40,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0x05,0x40,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0x0b,0x40,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0x0c,0x40,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0x00,0x40,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0x05,0x40,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0x0b,0x40,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-simd-ldst-one-elem.s.cs010066400017500001750000000155551363402546700242110ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x00,0xc0,0x40,0x4d = ld1r {v0.16b}, [x0] 0xef,0xc5,0x40,0x4d = ld1r {v15.8h}, [x15] 0xff,0xcb,0x40,0x4d = ld1r {v31.4s}, [sp] 0x00,0xcc,0x40,0x4d = ld1r {v0.2d}, [x0] 0x00,0xc0,0x40,0x0d = ld1r {v0.8b}, [x0] 0xef,0xc5,0x40,0x0d = ld1r {v15.4h}, [x15] 0xff,0xcb,0x40,0x0d = ld1r {v31.2s}, [sp] 0x00,0xcc,0x40,0x0d = ld1r {v0.1d}, [x0] 0x00,0xc0,0x60,0x4d = ld2r {v0.16b, v1.16b}, [x0] 0xef,0xc5,0x60,0x4d = ld2r {v15.8h, v16.8h}, [x15] 0xff,0xcb,0x60,0x4d = ld2r {v31.4s, v0.4s}, [sp] 0x00,0xcc,0x60,0x4d = ld2r {v0.2d, v1.2d}, [x0] 0x00,0xc0,0x60,0x0d = ld2r {v0.8b, v1.8b}, [x0] 0xef,0xc5,0x60,0x0d = ld2r {v15.4h, v16.4h}, [x15] 0xff,0xcb,0x60,0x0d = ld2r {v31.2s, v0.2s}, [sp] 0xff,0xcf,0x60,0x0d = ld2r {v31.1d, v0.1d}, [sp] 0x00,0xe0,0x40,0x4d = ld3r {v0.16b, v1.16b, v2.16b}, [x0] 0xef,0xe5,0x40,0x4d = ld3r {v15.8h, v16.8h, v17.8h}, [x15] 0xff,0xeb,0x40,0x4d = ld3r {v31.4s, v0.4s, v1.4s}, [sp] 0x00,0xec,0x40,0x4d = ld3r {v0.2d, v1.2d, v2.2d}, [x0] 0x00,0xe0,0x40,0x0d = ld3r {v0.8b, v1.8b, v2.8b}, [x0] 0xef,0xe5,0x40,0x0d = ld3r {v15.4h, v16.4h, v17.4h}, [x15] 0xff,0xeb,0x40,0x0d = ld3r {v31.2s, v0.2s, v1.2s}, [sp] 0xff,0xef,0x40,0x0d = ld3r {v31.1d, v0.1d, v1.1d}, [sp] 0x00,0xe0,0x60,0x4d = ld4r {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 0xef,0xe5,0x60,0x4d = ld4r {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 0xff,0xeb,0x60,0x4d = ld4r {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 0x00,0xec,0x60,0x4d = ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 0x00,0xe0,0x60,0x0d = ld4r {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 0xef,0xe5,0x60,0x0d = ld4r {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 0xff,0xeb,0x60,0x0d = ld4r {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 0xff,0xef,0x60,0x0d = ld4r {v31.1d, v0.1d, v1.1d, v2.1d}, [sp] 0x00,0x04,0x40,0x4d = ld1 {v0.b}[9], [x0] 0xef,0x59,0x40,0x4d = ld1 {v15.h}[7], [x15] 0xff,0x93,0x40,0x4d = ld1 {v31.s}[3], [sp] 0x00,0x84,0x40,0x4d = ld1 {v0.d}[1], [x0] 0x00,0x04,0x60,0x4d = ld2 {v0.b, v1.b}[9], [x0] 0xef,0x59,0x60,0x4d = ld2 {v15.h, v16.h}[7], [x15] 0xff,0x93,0x60,0x4d = ld2 {v31.s, v0.s}[3], [sp] 0x00,0x84,0x60,0x4d = ld2 {v0.d, v1.d}[1], [x0] 0x00,0x24,0x40,0x4d = ld3 {v0.b, v1.b, v2.b}[9], [x0] 0xef,0x79,0x40,0x4d = ld3 {v15.h, v16.h, v17.h}[7], [x15] 0xff,0xb3,0x40,0x4d = ld3 {v31.s, v0.s, v1.s}[3], [sp] 0x00,0xa4,0x40,0x4d = ld3 {v0.d, v1.d, v2.d}[1], [x0] 0x00,0x24,0x60,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0] 0xef,0x79,0x60,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15] 0xff,0xb3,0x60,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp] 0x00,0xa4,0x60,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0] 0x00,0x04,0x00,0x4d = st1 {v0.b}[9], [x0] 0xef,0x59,0x00,0x4d = st1 {v15.h}[7], [x15] 0xff,0x93,0x00,0x4d = st1 {v31.s}[3], [sp] 0x00,0x84,0x00,0x4d = st1 {v0.d}[1], [x0] 0x00,0x04,0x20,0x4d = st2 {v0.b, v1.b}[9], [x0] 0xef,0x59,0x20,0x4d = st2 {v15.h, v16.h}[7], [x15] 0xff,0x93,0x20,0x4d = st2 {v31.s, v0.s}[3], [sp] 0x00,0x84,0x20,0x4d = st2 {v0.d, v1.d}[1], [x0] 0x00,0x24,0x00,0x4d = st3 {v0.b, v1.b, v2.b}[9], [x0] 0xef,0x79,0x00,0x4d = st3 {v15.h, v16.h, v17.h}[7], [x15] 0xff,0xb3,0x00,0x4d = st3 {v31.s, v0.s, v1.s}[3], [sp] 0x00,0xa4,0x00,0x4d = st3 {v0.d, v1.d, v2.d}[1], [x0] 0x00,0x24,0x20,0x4d = st4 {v0.b, v1.b, v2.b, v3.b}[9], [x0] 0xef,0x79,0x20,0x4d = st4 {v15.h, v16.h, v17.h, v18.h}[7], [x15] 0xff,0xb3,0x20,0x4d = st4 {v31.s, v0.s, v1.s, v2.s}[3], [sp] 0x00,0xa4,0x20,0x4d = st4 {v0.d, v1.d, v2.d, v3.d}[1], [x0] 0x00,0xc0,0xdf,0x4d = ld1r {v0.16b}, [x0], #1 0xef,0xc5,0xdf,0x4d = ld1r {v15.8h}, [x15], #2 0xff,0xcb,0xdf,0x4d = ld1r {v31.4s}, [sp], #4 0x00,0xcc,0xdf,0x4d = ld1r {v0.2d}, [x0], #8 0x00,0xc0,0xc0,0x0d = ld1r {v0.8b}, [x0], x0 0xef,0xc5,0xc1,0x0d = ld1r {v15.4h}, [x15], x1 0xff,0xcb,0xc2,0x0d = ld1r {v31.2s}, [sp], x2 0x00,0xcc,0xc3,0x0d = ld1r {v0.1d}, [x0], x3 0x00,0xc0,0xff,0x4d = ld2r {v0.16b, v1.16b}, [x0], #2 0xef,0xc5,0xff,0x4d = ld2r {v15.8h, v16.8h}, [x15], #4 0xff,0xcb,0xff,0x4d = ld2r {v31.4s, v0.4s}, [sp], #8 0x00,0xcc,0xff,0x4d = ld2r {v0.2d, v1.2d}, [x0], #16 0x00,0xc0,0xe6,0x0d = ld2r {v0.8b, v1.8b}, [x0], x6 0xef,0xc5,0xe7,0x0d = ld2r {v15.4h, v16.4h}, [x15], x7 0xff,0xcb,0xe9,0x0d = ld2r {v31.2s, v0.2s}, [sp], x9 0x1f,0xcc,0xe5,0x0d = ld2r {v31.1d, v0.1d}, [x0], x5 0x00,0xe0,0xc9,0x4d = ld3r {v0.16b, v1.16b, v2.16b}, [x0], x9 0xef,0xe5,0xc6,0x4d = ld3r {v15.8h, v16.8h, v17.8h}, [x15], x6 0xff,0xeb,0xc7,0x4d = ld3r {v31.4s, v0.4s, v1.4s}, [sp], x7 0x00,0xec,0xc5,0x4d = ld3r {v0.2d, v1.2d, v2.2d}, [x0], x5 0x00,0xe0,0xdf,0x0d = ld3r {v0.8b, v1.8b, v2.8b}, [x0], #3 0xef,0xe5,0xdf,0x0d = ld3r {v15.4h, v16.4h, v17.4h}, [x15], #6 0xff,0xeb,0xdf,0x0d = ld3r {v31.2s, v0.2s, v1.2s}, [sp], #12 0xff,0xef,0xdf,0x0d = ld3r {v31.1d, v0.1d, v1.1d}, [sp], #24 0x00,0xe0,0xff,0x4d = ld4r {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #4 0xef,0xe5,0xff,0x4d = ld4r {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], #8 0xff,0xeb,0xff,0x4d = ld4r {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #16 0x00,0xec,0xff,0x4d = ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #32 0x00,0xe0,0xe5,0x0d = ld4r {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x5 0xef,0xe5,0xe9,0x0d = ld4r {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x9 0xff,0xeb,0xfe,0x0d = ld4r {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], x30 0xff,0xef,0xe7,0x0d = ld4r {v31.1d, v0.1d, v1.1d, v2.1d}, [sp], x7 0x00,0x04,0xdf,0x4d = ld1 {v0.b}[9], [x0], #1 0xef,0x59,0xc9,0x4d = ld1 {v15.h}[7], [x15], x9 0xff,0x93,0xc6,0x4d = ld1 {v31.s}[3], [sp], x6 0x00,0x84,0xdf,0x4d = ld1 {v0.d}[1], [x0], #8 0x00,0x04,0xe3,0x4d = ld2 {v0.b, v1.b}[9], [x0], x3 0xef,0x59,0xff,0x4d = ld2 {v15.h, v16.h}[7], [x15], #4 0xff,0x93,0xff,0x4d = ld2 {v31.s, v0.s}[3], [sp], #8 0x00,0x84,0xe0,0x4d = ld2 {v0.d, v1.d}[1], [x0], x0 0x00,0x24,0xdf,0x4d = ld3 {v0.b, v1.b, v2.b}[9], [x0], #3 0xef,0x79,0xdf,0x4d = ld3 {v15.h, v16.h, v17.h}[7], [x15], #6 0xff,0xb3,0xc3,0x4d = ld3 {v31.s, v0.s, v1.s}[3], [sp], x3 0x00,0xa4,0xc6,0x4d = ld3 {v0.d, v1.d, v2.d}[1], [x0], x6 0x00,0x24,0xe5,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5 0xef,0x79,0xe7,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15], x7 0xff,0xb3,0xff,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp], #16 0x00,0xa4,0xff,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32 0x00,0x04,0x9f,0x4d = st1 {v0.b}[9], [x0], #1 0xef,0x59,0x89,0x4d = st1 {v15.h}[7], [x15], x9 0xff,0x93,0x86,0x4d = st1 {v31.s}[3], [sp], x6 0x00,0x84,0x9f,0x4d = st1 {v0.d}[1], [x0], #8 0x00,0x04,0xa3,0x4d = st2 {v0.b, v1.b}[9], [x0], x3 0xef,0x59,0xbf,0x4d = st2 {v15.h, v16.h}[7], [x15], #4 0xff,0x93,0xbf,0x4d = st2 {v31.s, v0.s}[3], [sp], #8 0x00,0x84,0xa0,0x4d = st2 {v0.d, v1.d}[1], [x0], x0 0x00,0x24,0x9f,0x4d = st3 {v0.b, v1.b, v2.b}[9], [x0], #3 0xef,0x79,0x9f,0x4d = st3 {v15.h, v16.h, v17.h}[7], [x15], #6 0xff,0xb3,0x83,0x4d = st3 {v31.s, v0.s, v1.s}[3], [sp], x3 0x00,0xa4,0x86,0x4d = st3 {v0.d, v1.d, v2.d}[1], [x0], x6 0x00,0x24,0xa5,0x4d = st4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5 0xef,0x79,0xa7,0x4d = st4 {v15.h, v16.h, v17.h, v18.h}[7], [x15], x7 0xff,0xb3,0xbf,0x4d = st4 {v31.s, v0.s, v1.s, v2.s}[3], [sp], #16 0x00,0xa4,0xbf,0x4d = st4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-simd-misc.s.cs010066400017500001750000000213011363402546700224610ustar0000000000000000# CS_ARCH_ARM64, 0, None 0xe0,0x0b,0x20,0x4e = rev64 v0.16b, v31.16b 0x82,0x08,0x60,0x4e = rev64 v2.8h, v4.8h 0x06,0x09,0xa0,0x4e = rev64 v6.4s, v8.4s 0x21,0x09,0x20,0x0e = rev64 v1.8b, v9.8b 0xad,0x0a,0x60,0x0e = rev64 v13.4h, v21.4h 0x04,0x08,0xa0,0x0e = rev64 v4.2s, v0.2s 0xfe,0x0b,0x20,0x6e = rev32 v30.16b, v31.16b 0xe4,0x08,0x60,0x6e = rev32 v4.8h, v7.8h 0x35,0x08,0x20,0x2e = rev32 v21.8b, v1.8b 0x20,0x09,0x60,0x2e = rev32 v0.4h, v9.4h 0xfe,0x1b,0x20,0x4e = rev16 v30.16b, v31.16b 0x35,0x18,0x20,0x0e = rev16 v21.8b, v1.8b 0xa3,0x2a,0x20,0x4e = saddlp v3.8h, v21.16b 0xa8,0x28,0x20,0x0e = saddlp v8.4h, v5.8b 0x29,0x28,0x60,0x4e = saddlp v9.4s, v1.8h 0x20,0x28,0x60,0x0e = saddlp v0.2s, v1.4h 0x8c,0x28,0xa0,0x4e = saddlp v12.2d, v4.4s 0x91,0x2b,0xa0,0x0e = saddlp v17.1d, v28.2s 0xa3,0x2a,0x20,0x6e = uaddlp v3.8h, v21.16b 0xa8,0x28,0x20,0x2e = uaddlp v8.4h, v5.8b 0x29,0x28,0x60,0x6e = uaddlp v9.4s, v1.8h 0x20,0x28,0x60,0x2e = uaddlp v0.2s, v1.4h 0x8c,0x28,0xa0,0x6e = uaddlp v12.2d, v4.4s 0x91,0x2b,0xa0,0x2e = uaddlp v17.1d, v28.2s 0xa3,0x6a,0x20,0x4e = sadalp v3.8h, v21.16b 0xa8,0x68,0x20,0x0e = sadalp v8.4h, v5.8b 0x29,0x68,0x60,0x4e = sadalp v9.4s, v1.8h 0x20,0x68,0x60,0x0e = sadalp v0.2s, v1.4h 0x8c,0x68,0xa0,0x4e = sadalp v12.2d, v4.4s 0x91,0x6b,0xa0,0x0e = sadalp v17.1d, v28.2s 0xa3,0x6a,0x20,0x6e = uadalp v3.8h, v21.16b 0xa8,0x68,0x20,0x2e = uadalp v8.4h, v5.8b 0x29,0x68,0x60,0x6e = uadalp v9.4s, v1.8h 0x20,0x68,0x60,0x2e = uadalp v0.2s, v1.4h 0x8c,0x68,0xa0,0x6e = uadalp v12.2d, v4.4s 0x91,0x6b,0xa0,0x2e = uadalp v17.1d, v28.2s 0xe0,0x3b,0x20,0x4e = suqadd v0.16b, v31.16b 0x82,0x38,0x60,0x4e = suqadd v2.8h, v4.8h 0x06,0x39,0xa0,0x4e = suqadd v6.4s, v8.4s 0x06,0x39,0xe0,0x4e = suqadd v6.2d, v8.2d 0x21,0x39,0x20,0x0e = suqadd v1.8b, v9.8b 0xad,0x3a,0x60,0x0e = suqadd v13.4h, v21.4h 0x04,0x38,0xa0,0x0e = suqadd v4.2s, v0.2s 0xe0,0x3b,0x20,0x6e = usqadd v0.16b, v31.16b 0x82,0x38,0x60,0x6e = usqadd v2.8h, v4.8h 0x06,0x39,0xa0,0x6e = usqadd v6.4s, v8.4s 0x06,0x39,0xe0,0x6e = usqadd v6.2d, v8.2d 0x21,0x39,0x20,0x2e = usqadd v1.8b, v9.8b 0xad,0x3a,0x60,0x2e = usqadd v13.4h, v21.4h 0x04,0x38,0xa0,0x2e = usqadd v4.2s, v0.2s 0xe0,0x7b,0x20,0x4e = sqabs v0.16b, v31.16b 0x82,0x78,0x60,0x4e = sqabs v2.8h, v4.8h 0x06,0x79,0xa0,0x4e = sqabs v6.4s, v8.4s 0x06,0x79,0xe0,0x4e = sqabs v6.2d, v8.2d 0x21,0x79,0x20,0x0e = sqabs v1.8b, v9.8b 0xad,0x7a,0x60,0x0e = sqabs v13.4h, v21.4h 0x04,0x78,0xa0,0x0e = sqabs v4.2s, v0.2s 0xe0,0x7b,0x20,0x6e = sqneg v0.16b, v31.16b 0x82,0x78,0x60,0x6e = sqneg v2.8h, v4.8h 0x06,0x79,0xa0,0x6e = sqneg v6.4s, v8.4s 0x06,0x79,0xe0,0x6e = sqneg v6.2d, v8.2d 0x21,0x79,0x20,0x2e = sqneg v1.8b, v9.8b 0xad,0x7a,0x60,0x2e = sqneg v13.4h, v21.4h 0x04,0x78,0xa0,0x2e = sqneg v4.2s, v0.2s 0xe0,0xbb,0x20,0x4e = abs v0.16b, v31.16b 0x82,0xb8,0x60,0x4e = abs v2.8h, v4.8h 0x06,0xb9,0xa0,0x4e = abs v6.4s, v8.4s 0x06,0xb9,0xe0,0x4e = abs v6.2d, v8.2d 0x21,0xb9,0x20,0x0e = abs v1.8b, v9.8b 0xad,0xba,0x60,0x0e = abs v13.4h, v21.4h 0x04,0xb8,0xa0,0x0e = abs v4.2s, v0.2s 0xe0,0xbb,0x20,0x6e = neg v0.16b, v31.16b 0x82,0xb8,0x60,0x6e = neg v2.8h, v4.8h 0x06,0xb9,0xa0,0x6e = neg v6.4s, v8.4s 0x06,0xb9,0xe0,0x6e = neg v6.2d, v8.2d 0x21,0xb9,0x20,0x2e = neg v1.8b, v9.8b 0xad,0xba,0x60,0x2e = neg v13.4h, v21.4h 0x04,0xb8,0xa0,0x2e = neg v4.2s, v0.2s 0xe0,0x4b,0x20,0x4e = cls v0.16b, v31.16b 0x82,0x48,0x60,0x4e = cls v2.8h, v4.8h 0x06,0x49,0xa0,0x4e = cls v6.4s, v8.4s 0x21,0x49,0x20,0x0e = cls v1.8b, v9.8b 0xad,0x4a,0x60,0x0e = cls v13.4h, v21.4h 0x04,0x48,0xa0,0x0e = cls v4.2s, v0.2s 0xe0,0x4b,0x20,0x6e = clz v0.16b, v31.16b 0x82,0x48,0x60,0x6e = clz v2.8h, v4.8h 0x06,0x49,0xa0,0x6e = clz v6.4s, v8.4s 0x21,0x49,0x20,0x2e = clz v1.8b, v9.8b 0xad,0x4a,0x60,0x2e = clz v13.4h, v21.4h 0x04,0x48,0xa0,0x2e = clz v4.2s, v0.2s 0xe0,0x5b,0x20,0x4e = cnt v0.16b, v31.16b 0x21,0x59,0x20,0x0e = cnt v1.8b, v9.8b 0xe0,0x5b,0x20,0x6e = not v0.16b, v31.16b 0x21,0x59,0x20,0x2e = not v1.8b, v9.8b 0xe0,0x5b,0x60,0x6e = rbit v0.16b, v31.16b 0x21,0x59,0x60,0x2e = rbit v1.8b, v9.8b 0x06,0xf9,0xa0,0x4e = fabs v6.4s, v8.4s 0x06,0xf9,0xe0,0x4e = fabs v6.2d, v8.2d 0x04,0xf8,0xa0,0x0e = fabs v4.2s, v0.2s 0x06,0xf9,0xa0,0x6e = fneg v6.4s, v8.4s 0x06,0xf9,0xe0,0x6e = fneg v6.2d, v8.2d 0x04,0xf8,0xa0,0x2e = fneg v4.2s, v0.2s 0xe0,0x2b,0x21,0x4e = xtn2 v0.16b, v31.8h 0x82,0x28,0x61,0x4e = xtn2 v2.8h, v4.4s 0x06,0x29,0xa1,0x4e = xtn2 v6.4s, v8.2d 0x21,0x29,0x21,0x0e = xtn v1.8b, v9.8h 0xad,0x2a,0x61,0x0e = xtn v13.4h, v21.4s 0x04,0x28,0xa1,0x0e = xtn v4.2s, v0.2d 0xe0,0x2b,0x21,0x6e = sqxtun2 v0.16b, v31.8h 0x82,0x28,0x61,0x6e = sqxtun2 v2.8h, v4.4s 0x06,0x29,0xa1,0x6e = sqxtun2 v6.4s, v8.2d 0x21,0x29,0x21,0x2e = sqxtun v1.8b, v9.8h 0xad,0x2a,0x61,0x2e = sqxtun v13.4h, v21.4s 0x04,0x28,0xa1,0x2e = sqxtun v4.2s, v0.2d 0xe0,0x4b,0x21,0x4e = sqxtn2 v0.16b, v31.8h 0x82,0x48,0x61,0x4e = sqxtn2 v2.8h, v4.4s 0x06,0x49,0xa1,0x4e = sqxtn2 v6.4s, v8.2d 0x21,0x49,0x21,0x0e = sqxtn v1.8b, v9.8h 0xad,0x4a,0x61,0x0e = sqxtn v13.4h, v21.4s 0x04,0x48,0xa1,0x0e = sqxtn v4.2s, v0.2d 0xe0,0x4b,0x21,0x6e = uqxtn2 v0.16b, v31.8h 0x82,0x48,0x61,0x6e = uqxtn2 v2.8h, v4.4s 0x06,0x49,0xa1,0x6e = uqxtn2 v6.4s, v8.2d 0x21,0x49,0x21,0x2e = uqxtn v1.8b, v9.8h 0xad,0x4a,0x61,0x2e = uqxtn v13.4h, v21.4s 0x04,0x48,0xa1,0x2e = uqxtn v4.2s, v0.2d 0x82,0x38,0x21,0x6e = shll2 v2.8h, v4.16b, #8 0x06,0x39,0x61,0x6e = shll2 v6.4s, v8.8h, #16 0x06,0x39,0xa1,0x6e = shll2 v6.2d, v8.4s, #32 0x82,0x38,0x21,0x2e = shll v2.8h, v4.8b, #8 0x06,0x39,0x61,0x2e = shll v6.4s, v8.4h, #16 0x06,0x39,0xa1,0x2e = shll v6.2d, v8.2s, #32 0x82,0x68,0x21,0x4e = fcvtn2 v2.8h, v4.4s 0x06,0x69,0x61,0x4e = fcvtn2 v6.4s, v8.2d 0xad,0x6a,0x21,0x0e = fcvtn v13.4h, v21.4s 0x04,0x68,0x61,0x0e = fcvtn v4.2s, v0.2d 0x06,0x69,0x61,0x6e = fcvtxn2 v6.4s, v8.2d 0x04,0x68,0x61,0x2e = fcvtxn v4.2s, v0.2d 0x29,0x78,0x21,0x0e = fcvtl v9.4s, v1.4h 0x20,0x78,0x61,0x0e = fcvtl v0.2d, v1.2s 0x8c,0x78,0x21,0x4e = fcvtl2 v12.4s, v4.8h 0x91,0x7b,0x61,0x4e = fcvtl2 v17.2d, v28.4s 0x06,0x89,0x21,0x4e = frintn v6.4s, v8.4s 0x06,0x89,0x61,0x4e = frintn v6.2d, v8.2d 0x04,0x88,0x21,0x0e = frintn v4.2s, v0.2s 0x06,0x89,0x21,0x6e = frinta v6.4s, v8.4s 0x06,0x89,0x61,0x6e = frinta v6.2d, v8.2d 0x04,0x88,0x21,0x2e = frinta v4.2s, v0.2s 0x06,0x89,0xa1,0x4e = frintp v6.4s, v8.4s 0x06,0x89,0xe1,0x4e = frintp v6.2d, v8.2d 0x04,0x88,0xa1,0x0e = frintp v4.2s, v0.2s 0x06,0x99,0x21,0x4e = frintm v6.4s, v8.4s 0x06,0x99,0x61,0x4e = frintm v6.2d, v8.2d 0x04,0x98,0x21,0x0e = frintm v4.2s, v0.2s 0x06,0x99,0x21,0x6e = frintx v6.4s, v8.4s 0x06,0x99,0x61,0x6e = frintx v6.2d, v8.2d 0x04,0x98,0x21,0x2e = frintx v4.2s, v0.2s 0x06,0x99,0xa1,0x4e = frintz v6.4s, v8.4s 0x06,0x99,0xe1,0x4e = frintz v6.2d, v8.2d 0x04,0x98,0xa1,0x0e = frintz v4.2s, v0.2s 0x06,0x99,0xa1,0x6e = frinti v6.4s, v8.4s 0x06,0x99,0xe1,0x6e = frinti v6.2d, v8.2d 0x04,0x98,0xa1,0x2e = frinti v4.2s, v0.2s 0x06,0xa9,0x21,0x4e = fcvtns v6.4s, v8.4s 0x06,0xa9,0x61,0x4e = fcvtns v6.2d, v8.2d 0x04,0xa8,0x21,0x0e = fcvtns v4.2s, v0.2s 0x06,0xa9,0x21,0x6e = fcvtnu v6.4s, v8.4s 0x06,0xa9,0x61,0x6e = fcvtnu v6.2d, v8.2d 0x04,0xa8,0x21,0x2e = fcvtnu v4.2s, v0.2s 0x06,0xa9,0xa1,0x4e = fcvtps v6.4s, v8.4s 0x06,0xa9,0xe1,0x4e = fcvtps v6.2d, v8.2d 0x04,0xa8,0xa1,0x0e = fcvtps v4.2s, v0.2s 0x06,0xa9,0xa1,0x6e = fcvtpu v6.4s, v8.4s 0x06,0xa9,0xe1,0x6e = fcvtpu v6.2d, v8.2d 0x04,0xa8,0xa1,0x2e = fcvtpu v4.2s, v0.2s 0x06,0xb9,0x21,0x4e = fcvtms v6.4s, v8.4s 0x06,0xb9,0x61,0x4e = fcvtms v6.2d, v8.2d 0x04,0xb8,0x21,0x0e = fcvtms v4.2s, v0.2s 0x06,0xb9,0x21,0x6e = fcvtmu v6.4s, v8.4s 0x06,0xb9,0x61,0x6e = fcvtmu v6.2d, v8.2d 0x04,0xb8,0x21,0x2e = fcvtmu v4.2s, v0.2s 0x06,0xb9,0xa1,0x4e = fcvtzs v6.4s, v8.4s 0x06,0xb9,0xe1,0x4e = fcvtzs v6.2d, v8.2d 0x04,0xb8,0xa1,0x0e = fcvtzs v4.2s, v0.2s 0x06,0xb9,0xa1,0x6e = fcvtzu v6.4s, v8.4s 0x06,0xb9,0xe1,0x6e = fcvtzu v6.2d, v8.2d 0x04,0xb8,0xa1,0x2e = fcvtzu v4.2s, v0.2s 0x06,0xc9,0x21,0x4e = fcvtas v6.4s, v8.4s 0x06,0xc9,0x61,0x4e = fcvtas v6.2d, v8.2d 0x04,0xc8,0x21,0x0e = fcvtas v4.2s, v0.2s 0x06,0xc9,0x21,0x6e = fcvtau v6.4s, v8.4s 0x06,0xc9,0x61,0x6e = fcvtau v6.2d, v8.2d 0x04,0xc8,0x21,0x2e = fcvtau v4.2s, v0.2s 0x06,0xc9,0xa1,0x4e = urecpe v6.4s, v8.4s 0x04,0xc8,0xa1,0x0e = urecpe v4.2s, v0.2s 0x06,0xc9,0xa1,0x6e = ursqrte v6.4s, v8.4s 0x04,0xc8,0xa1,0x2e = ursqrte v4.2s, v0.2s 0x06,0xd9,0x21,0x4e = scvtf v6.4s, v8.4s 0x06,0xd9,0x61,0x4e = scvtf v6.2d, v8.2d 0x04,0xd8,0x21,0x0e = scvtf v4.2s, v0.2s 0x06,0xd9,0x21,0x6e = ucvtf v6.4s, v8.4s 0x06,0xd9,0x61,0x6e = ucvtf v6.2d, v8.2d 0x04,0xd8,0x21,0x2e = ucvtf v4.2s, v0.2s 0x06,0xd9,0xa1,0x4e = frecpe v6.4s, v8.4s 0x06,0xd9,0xe1,0x4e = frecpe v6.2d, v8.2d 0x04,0xd8,0xa1,0x0e = frecpe v4.2s, v0.2s 0x06,0xd9,0xa1,0x6e = frsqrte v6.4s, v8.4s 0x06,0xd9,0xe1,0x6e = frsqrte v6.2d, v8.2d 0x04,0xd8,0xa1,0x2e = frsqrte v4.2s, v0.2s 0x06,0xf9,0xa1,0x6e = fsqrt v6.4s, v8.4s 0x06,0xf9,0xe1,0x6e = fsqrt v6.2d, v8.2d 0x04,0xf8,0xa1,0x2e = fsqrt v4.2s, v0.2s capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs010066400017500001750000000140251363402546700255340ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x00,0x70,0xc1,0x4c = ld1 {v0.16b}, [x0], x1 0xef,0x75,0xc2,0x4c = ld1 {v15.8h}, [x15], x2 0xff,0x7b,0xdf,0x4c = ld1 {v31.4s}, [sp], #16 0x00,0x7c,0xdf,0x4c = ld1 {v0.2d}, [x0], #16 0x00,0x70,0xc2,0x0c = ld1 {v0.8b}, [x0], x2 0xef,0x75,0xc3,0x0c = ld1 {v15.4h}, [x15], x3 0xff,0x7b,0xdf,0x0c = ld1 {v31.2s}, [sp], #8 0x00,0x7c,0xdf,0x0c = ld1 {v0.1d}, [x0], #8 0x00,0xa0,0xc1,0x4c = ld1 {v0.16b, v1.16b}, [x0], x1 0xef,0xa5,0xc2,0x4c = ld1 {v15.8h, v16.8h}, [x15], x2 0xff,0xab,0xdf,0x4c = ld1 {v31.4s, v0.4s}, [sp], #32 0x00,0xac,0xdf,0x4c = ld1 {v0.2d, v1.2d}, [x0], #32 0x00,0xa0,0xc2,0x0c = ld1 {v0.8b, v1.8b}, [x0], x2 0xef,0xa5,0xc3,0x0c = ld1 {v15.4h, v16.4h}, [x15], x3 0xff,0xab,0xdf,0x0c = ld1 {v31.2s, v0.2s}, [sp], #16 0x00,0xac,0xdf,0x0c = ld1 {v0.1d, v1.1d}, [x0], #16 0x00,0x60,0xc1,0x4c = ld1 {v0.16b, v1.16b, v2.16b}, [x0], x1 0xef,0x65,0xc2,0x4c = ld1 {v15.8h, v16.8h, v17.8h}, [x15], x2 0xff,0x6b,0xdf,0x4c = ld1 {v31.4s, v0.4s, v1.4s}, [sp], #48 0x00,0x6c,0xdf,0x4c = ld1 {v0.2d, v1.2d, v2.2d}, [x0], #48 0x00,0x60,0xc2,0x0c = ld1 {v0.8b, v1.8b, v2.8b}, [x0], x2 0xef,0x65,0xc3,0x0c = ld1 {v15.4h, v16.4h, v17.4h}, [x15], x3 0xff,0x6b,0xdf,0x0c = ld1 {v31.2s, v0.2s, v1.2s}, [sp], #24 0x00,0x6c,0xdf,0x0c = ld1 {v0.1d, v1.1d, v2.1d}, [x0], #24 0x00,0x20,0xc1,0x4c = ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1 0xef,0x25,0xc2,0x4c = ld1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2 0xff,0x2b,0xdf,0x4c = ld1 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #64 0x00,0x2c,0xdf,0x4c = ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64 0x00,0x20,0xc3,0x0c = ld1 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x3 0xef,0x25,0xc4,0x0c = ld1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4 0xff,0x2b,0xdf,0x0c = ld1 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], #32 0x00,0x2c,0xdf,0x0c = ld1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x0], #32 0x00,0x80,0xc1,0x4c = ld2 {v0.16b, v1.16b}, [x0], x1 0xef,0x85,0xc2,0x4c = ld2 {v15.8h, v16.8h}, [x15], x2 0xff,0x8b,0xdf,0x4c = ld2 {v31.4s, v0.4s}, [sp], #32 0x00,0x8c,0xdf,0x4c = ld2 {v0.2d, v1.2d}, [x0], #32 0x00,0x80,0xc2,0x0c = ld2 {v0.8b, v1.8b}, [x0], x2 0xef,0x85,0xc3,0x0c = ld2 {v15.4h, v16.4h}, [x15], x3 0xff,0x8b,0xdf,0x0c = ld2 {v31.2s, v0.2s}, [sp], #16 0x00,0x40,0xc1,0x4c = ld3 {v0.16b, v1.16b, v2.16b}, [x0], x1 0xef,0x45,0xc2,0x4c = ld3 {v15.8h, v16.8h, v17.8h}, [x15], x2 0xff,0x4b,0xdf,0x4c = ld3 {v31.4s, v0.4s, v1.4s}, [sp], #48 0x00,0x4c,0xdf,0x4c = ld3 {v0.2d, v1.2d, v2.2d}, [x0], #48 0x00,0x40,0xc2,0x0c = ld3 {v0.8b, v1.8b, v2.8b}, [x0], x2 0xef,0x45,0xc3,0x0c = ld3 {v15.4h, v16.4h, v17.4h}, [x15], x3 0xff,0x4b,0xdf,0x0c = ld3 {v31.2s, v0.2s, v1.2s}, [sp], #24 0x00,0x00,0xc1,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1 0xef,0x05,0xc2,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2 0xff,0x0b,0xdf,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #64 0x00,0x0c,0xdf,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64 0x00,0x00,0xc3,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x3 0xef,0x05,0xc4,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4 0xff,0x0b,0xdf,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], #32 0x00,0x70,0x81,0x4c = st1 {v0.16b}, [x0], x1 0xef,0x75,0x82,0x4c = st1 {v15.8h}, [x15], x2 0xff,0x7b,0x9f,0x4c = st1 {v31.4s}, [sp], #16 0x00,0x7c,0x9f,0x4c = st1 {v0.2d}, [x0], #16 0x00,0x70,0x82,0x0c = st1 {v0.8b}, [x0], x2 0xef,0x75,0x83,0x0c = st1 {v15.4h}, [x15], x3 0xff,0x7b,0x9f,0x0c = st1 {v31.2s}, [sp], #8 0x00,0x7c,0x9f,0x0c = st1 {v0.1d}, [x0], #8 0x00,0xa0,0x81,0x4c = st1 {v0.16b, v1.16b}, [x0], x1 0xef,0xa5,0x82,0x4c = st1 {v15.8h, v16.8h}, [x15], x2 0xff,0xab,0x9f,0x4c = st1 {v31.4s, v0.4s}, [sp], #32 0x00,0xac,0x9f,0x4c = st1 {v0.2d, v1.2d}, [x0], #32 0x00,0xa0,0x82,0x0c = st1 {v0.8b, v1.8b}, [x0], x2 0xef,0xa5,0x83,0x0c = st1 {v15.4h, v16.4h}, [x15], x3 0xff,0xab,0x9f,0x0c = st1 {v31.2s, v0.2s}, [sp], #16 0x00,0xac,0x9f,0x0c = st1 {v0.1d, v1.1d}, [x0], #16 0x00,0x60,0x81,0x4c = st1 {v0.16b, v1.16b, v2.16b}, [x0], x1 0xef,0x65,0x82,0x4c = st1 {v15.8h, v16.8h, v17.8h}, [x15], x2 0xff,0x6b,0x9f,0x4c = st1 {v31.4s, v0.4s, v1.4s}, [sp], #48 0x00,0x6c,0x9f,0x4c = st1 {v0.2d, v1.2d, v2.2d}, [x0], #48 0x00,0x60,0x82,0x0c = st1 {v0.8b, v1.8b, v2.8b}, [x0], x2 0xef,0x65,0x83,0x0c = st1 {v15.4h, v16.4h, v17.4h}, [x15], x3 0xff,0x6b,0x9f,0x0c = st1 {v31.2s, v0.2s, v1.2s}, [sp], #24 0x00,0x6c,0x9f,0x0c = st1 {v0.1d, v1.1d, v2.1d}, [x0], #24 0x00,0x20,0x81,0x4c = st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1 0xef,0x25,0x82,0x4c = st1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2 0xff,0x2b,0x9f,0x4c = st1 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #64 0x00,0x2c,0x9f,0x4c = st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64 0x00,0x20,0x83,0x0c = st1 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x3 0xef,0x25,0x84,0x0c = st1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4 0xff,0x2b,0x9f,0x0c = st1 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], #32 0x00,0x2c,0x9f,0x0c = st1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x0], #32 0x00,0x80,0x81,0x4c = st2 {v0.16b, v1.16b}, [x0], x1 0xef,0x85,0x82,0x4c = st2 {v15.8h, v16.8h}, [x15], x2 0xff,0x8b,0x9f,0x4c = st2 {v31.4s, v0.4s}, [sp], #32 0x00,0x8c,0x9f,0x4c = st2 {v0.2d, v1.2d}, [x0], #32 0x00,0x80,0x82,0x0c = st2 {v0.8b, v1.8b}, [x0], x2 0xef,0x85,0x83,0x0c = st2 {v15.4h, v16.4h}, [x15], x3 0xff,0x8b,0x9f,0x0c = st2 {v31.2s, v0.2s}, [sp], #16 0x00,0x40,0x81,0x4c = st3 {v0.16b, v1.16b, v2.16b}, [x0], x1 0xef,0x45,0x82,0x4c = st3 {v15.8h, v16.8h, v17.8h}, [x15], x2 0xff,0x4b,0x9f,0x4c = st3 {v31.4s, v0.4s, v1.4s}, [sp], #48 0x00,0x4c,0x9f,0x4c = st3 {v0.2d, v1.2d, v2.2d}, [x0], #48 0x00,0x40,0x82,0x0c = st3 {v0.8b, v1.8b, v2.8b}, [x0], x2 0xef,0x45,0x83,0x0c = st3 {v15.4h, v16.4h, v17.4h}, [x15], x3 0xff,0x4b,0x9f,0x0c = st3 {v31.2s, v0.2s, v1.2s}, [sp], #24 0x00,0x00,0x81,0x4c = st4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1 0xef,0x05,0x82,0x4c = st4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2 0xff,0x0b,0x9f,0x4c = st4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #64 0x00,0x0c,0x9f,0x4c = st4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64 0x00,0x00,0x83,0x0c = st4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x3 0xef,0x05,0x84,0x0c = st4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4 0xff,0x0b,0x9f,0x0c = st4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], #32 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-simd-shift.s.cs010066400017500001750000000153041363402546700226510ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x04,0x0d,0x0f = sshr v0.8b, v1.8b, #3 0x20,0x04,0x1d,0x0f = sshr v0.4h, v1.4h, #3 0x20,0x04,0x3d,0x0f = sshr v0.2s, v1.2s, #3 0x20,0x04,0x0d,0x4f = sshr v0.16b, v1.16b, #3 0x20,0x04,0x1d,0x4f = sshr v0.8h, v1.8h, #3 0x20,0x04,0x3d,0x4f = sshr v0.4s, v1.4s, #3 0x20,0x04,0x7d,0x4f = sshr v0.2d, v1.2d, #3 0x20,0x04,0x0d,0x2f = ushr v0.8b, v1.8b, #3 0x20,0x04,0x1d,0x2f = ushr v0.4h, v1.4h, #3 0x20,0x04,0x3d,0x2f = ushr v0.2s, v1.2s, #3 0x20,0x04,0x0d,0x6f = ushr v0.16b, v1.16b, #3 0x20,0x04,0x1d,0x6f = ushr v0.8h, v1.8h, #3 0x20,0x04,0x3d,0x6f = ushr v0.4s, v1.4s, #3 0x20,0x04,0x7d,0x6f = ushr v0.2d, v1.2d, #3 0x20,0x14,0x0d,0x0f = ssra v0.8b, v1.8b, #3 0x20,0x14,0x1d,0x0f = ssra v0.4h, v1.4h, #3 0x20,0x14,0x3d,0x0f = ssra v0.2s, v1.2s, #3 0x20,0x14,0x0d,0x4f = ssra v0.16b, v1.16b, #3 0x20,0x14,0x1d,0x4f = ssra v0.8h, v1.8h, #3 0x20,0x14,0x3d,0x4f = ssra v0.4s, v1.4s, #3 0x20,0x14,0x7d,0x4f = ssra v0.2d, v1.2d, #3 0x20,0x14,0x0d,0x2f = usra v0.8b, v1.8b, #3 0x20,0x14,0x1d,0x2f = usra v0.4h, v1.4h, #3 0x20,0x14,0x3d,0x2f = usra v0.2s, v1.2s, #3 0x20,0x14,0x0d,0x6f = usra v0.16b, v1.16b, #3 0x20,0x14,0x1d,0x6f = usra v0.8h, v1.8h, #3 0x20,0x14,0x3d,0x6f = usra v0.4s, v1.4s, #3 0x20,0x14,0x7d,0x6f = usra v0.2d, v1.2d, #3 0x20,0x24,0x0d,0x0f = srshr v0.8b, v1.8b, #3 0x20,0x24,0x1d,0x0f = srshr v0.4h, v1.4h, #3 0x20,0x24,0x3d,0x0f = srshr v0.2s, v1.2s, #3 0x20,0x24,0x0d,0x4f = srshr v0.16b, v1.16b, #3 0x20,0x24,0x1d,0x4f = srshr v0.8h, v1.8h, #3 0x20,0x24,0x3d,0x4f = srshr v0.4s, v1.4s, #3 0x20,0x24,0x7d,0x4f = srshr v0.2d, v1.2d, #3 0x20,0x24,0x0d,0x2f = urshr v0.8b, v1.8b, #3 0x20,0x24,0x1d,0x2f = urshr v0.4h, v1.4h, #3 0x20,0x24,0x3d,0x2f = urshr v0.2s, v1.2s, #3 0x20,0x24,0x0d,0x6f = urshr v0.16b, v1.16b, #3 0x20,0x24,0x1d,0x6f = urshr v0.8h, v1.8h, #3 0x20,0x24,0x3d,0x6f = urshr v0.4s, v1.4s, #3 0x20,0x24,0x7d,0x6f = urshr v0.2d, v1.2d, #3 0x20,0x34,0x0d,0x0f = srsra v0.8b, v1.8b, #3 0x20,0x34,0x1d,0x0f = srsra v0.4h, v1.4h, #3 0x20,0x34,0x3d,0x0f = srsra v0.2s, v1.2s, #3 0x20,0x34,0x0d,0x4f = srsra v0.16b, v1.16b, #3 0x20,0x34,0x1d,0x4f = srsra v0.8h, v1.8h, #3 0x20,0x34,0x3d,0x4f = srsra v0.4s, v1.4s, #3 0x20,0x34,0x7d,0x4f = srsra v0.2d, v1.2d, #3 0x20,0x34,0x0d,0x2f = ursra v0.8b, v1.8b, #3 0x20,0x34,0x1d,0x2f = ursra v0.4h, v1.4h, #3 0x20,0x34,0x3d,0x2f = ursra v0.2s, v1.2s, #3 0x20,0x34,0x0d,0x6f = ursra v0.16b, v1.16b, #3 0x20,0x34,0x1d,0x6f = ursra v0.8h, v1.8h, #3 0x20,0x34,0x3d,0x6f = ursra v0.4s, v1.4s, #3 0x20,0x34,0x7d,0x6f = ursra v0.2d, v1.2d, #3 0x20,0x44,0x0d,0x2f = sri v0.8b, v1.8b, #3 0x20,0x44,0x1d,0x2f = sri v0.4h, v1.4h, #3 0x20,0x44,0x3d,0x2f = sri v0.2s, v1.2s, #3 0x20,0x44,0x0d,0x6f = sri v0.16b, v1.16b, #3 0x20,0x44,0x1d,0x6f = sri v0.8h, v1.8h, #3 0x20,0x44,0x3d,0x6f = sri v0.4s, v1.4s, #3 0x20,0x54,0x0b,0x2f = sli v0.8b, v1.8b, #3 0x20,0x54,0x13,0x2f = sli v0.4h, v1.4h, #3 0x20,0x54,0x23,0x2f = sli v0.2s, v1.2s, #3 0x20,0x54,0x0b,0x6f = sli v0.16b, v1.16b, #3 0x20,0x54,0x13,0x6f = sli v0.8h, v1.8h, #3 0x20,0x54,0x23,0x6f = sli v0.4s, v1.4s, #3 0x20,0x54,0x43,0x6f = sli v0.2d, v1.2d, #3 0x20,0x64,0x0b,0x2f = sqshlu v0.8b, v1.8b, #3 0x20,0x64,0x13,0x2f = sqshlu v0.4h, v1.4h, #3 0x20,0x64,0x23,0x2f = sqshlu v0.2s, v1.2s, #3 0x20,0x64,0x0b,0x6f = sqshlu v0.16b, v1.16b, #3 0x20,0x64,0x13,0x6f = sqshlu v0.8h, v1.8h, #3 0x20,0x64,0x23,0x6f = sqshlu v0.4s, v1.4s, #3 0x20,0x64,0x43,0x6f = sqshlu v0.2d, v1.2d, #3 0x20,0x74,0x0b,0x0f = sqshl v0.8b, v1.8b, #3 0x20,0x74,0x13,0x0f = sqshl v0.4h, v1.4h, #3 0x20,0x74,0x23,0x0f = sqshl v0.2s, v1.2s, #3 0x20,0x74,0x0b,0x4f = sqshl v0.16b, v1.16b, #3 0x20,0x74,0x13,0x4f = sqshl v0.8h, v1.8h, #3 0x20,0x74,0x23,0x4f = sqshl v0.4s, v1.4s, #3 0x20,0x74,0x43,0x4f = sqshl v0.2d, v1.2d, #3 0x20,0x74,0x0b,0x2f = uqshl v0.8b, v1.8b, #3 0x20,0x74,0x13,0x2f = uqshl v0.4h, v1.4h, #3 0x20,0x74,0x23,0x2f = uqshl v0.2s, v1.2s, #3 0x20,0x74,0x0b,0x6f = uqshl v0.16b, v1.16b, #3 0x20,0x74,0x13,0x6f = uqshl v0.8h, v1.8h, #3 0x20,0x74,0x23,0x6f = uqshl v0.4s, v1.4s, #3 0x20,0x74,0x43,0x6f = uqshl v0.2d, v1.2d, #3 0x20,0x84,0x0d,0x0f = shrn v0.8b, v1.8h, #3 0x20,0x84,0x1d,0x0f = shrn v0.4h, v1.4s, #3 0x20,0x84,0x3d,0x0f = shrn v0.2s, v1.2d, #3 0x20,0x84,0x0d,0x4f = shrn2 v0.16b, v1.8h, #3 0x20,0x84,0x1d,0x4f = shrn2 v0.8h, v1.4s, #3 0x20,0x84,0x3d,0x4f = shrn2 v0.4s, v1.2d, #3 0x20,0x84,0x0d,0x2f = sqshrun v0.8b, v1.8h, #3 0x20,0x84,0x1d,0x2f = sqshrun v0.4h, v1.4s, #3 0x20,0x84,0x3d,0x2f = sqshrun v0.2s, v1.2d, #3 0x20,0x84,0x0d,0x6f = sqshrun2 v0.16b, v1.8h, #3 0x20,0x84,0x1d,0x6f = sqshrun2 v0.8h, v1.4s, #3 0x20,0x84,0x3d,0x6f = sqshrun2 v0.4s, v1.2d, #3 0x20,0x8c,0x0d,0x0f = rshrn v0.8b, v1.8h, #3 0x20,0x8c,0x1d,0x0f = rshrn v0.4h, v1.4s, #3 0x20,0x8c,0x3d,0x0f = rshrn v0.2s, v1.2d, #3 0x20,0x8c,0x0d,0x4f = rshrn2 v0.16b, v1.8h, #3 0x20,0x8c,0x1d,0x4f = rshrn2 v0.8h, v1.4s, #3 0x20,0x8c,0x3d,0x4f = rshrn2 v0.4s, v1.2d, #3 0x20,0x8c,0x0d,0x2f = sqrshrun v0.8b, v1.8h, #3 0x20,0x8c,0x1d,0x2f = sqrshrun v0.4h, v1.4s, #3 0x20,0x8c,0x3d,0x2f = sqrshrun v0.2s, v1.2d, #3 0x20,0x8c,0x0d,0x6f = sqrshrun2 v0.16b, v1.8h, #3 0x20,0x8c,0x1d,0x6f = sqrshrun2 v0.8h, v1.4s, #3 0x20,0x8c,0x3d,0x6f = sqrshrun2 v0.4s, v1.2d, #3 0x20,0x94,0x0d,0x0f = sqshrn v0.8b, v1.8h, #3 0x20,0x94,0x1d,0x0f = sqshrn v0.4h, v1.4s, #3 0x20,0x94,0x3d,0x0f = sqshrn v0.2s, v1.2d, #3 0x20,0x94,0x0d,0x4f = sqshrn2 v0.16b, v1.8h, #3 0x20,0x94,0x1d,0x4f = sqshrn2 v0.8h, v1.4s, #3 0x20,0x94,0x3d,0x4f = sqshrn2 v0.4s, v1.2d, #3 0x20,0x94,0x0d,0x2f = uqshrn v0.8b, v1.8h, #3 0x20,0x94,0x1d,0x2f = uqshrn v0.4h, v1.4s, #3 0x20,0x94,0x3d,0x2f = uqshrn v0.2s, v1.2d, #3 0x20,0x94,0x0d,0x6f = uqshrn2 v0.16b, v1.8h, #3 0x20,0x94,0x1d,0x6f = uqshrn2 v0.8h, v1.4s, #3 0x20,0x94,0x3d,0x6f = uqshrn2 v0.4s, v1.2d, #3 0x20,0x9c,0x0d,0x0f = sqrshrn v0.8b, v1.8h, #3 0x20,0x9c,0x1d,0x0f = sqrshrn v0.4h, v1.4s, #3 0x20,0x9c,0x3d,0x0f = sqrshrn v0.2s, v1.2d, #3 0x20,0x9c,0x0d,0x4f = sqrshrn2 v0.16b, v1.8h, #3 0x20,0x9c,0x1d,0x4f = sqrshrn2 v0.8h, v1.4s, #3 0x20,0x9c,0x3d,0x4f = sqrshrn2 v0.4s, v1.2d, #3 0x20,0x9c,0x0d,0x2f = uqrshrn v0.8b, v1.8h, #3 0x20,0x9c,0x1d,0x2f = uqrshrn v0.4h, v1.4s, #3 0x20,0x9c,0x3d,0x2f = uqrshrn v0.2s, v1.2d, #3 0x20,0x9c,0x0d,0x6f = uqrshrn2 v0.16b, v1.8h, #3 0x20,0x9c,0x1d,0x6f = uqrshrn2 v0.8h, v1.4s, #3 0x20,0x9c,0x3d,0x6f = uqrshrn2 v0.4s, v1.2d, #3 0x20,0xe4,0x3d,0x0f = scvtf v0.2s, v1.2s, #3 0x20,0xe4,0x3d,0x4f = scvtf v0.4s, v1.4s, #3 0x20,0xe4,0x7d,0x4f = scvtf v0.2d, v1.2d, #3 0x20,0xe4,0x3d,0x2f = ucvtf v0.2s, v1.2s, #3 0x20,0xe4,0x3d,0x6f = ucvtf v0.4s, v1.4s, #3 0x20,0xe4,0x7d,0x6f = ucvtf v0.2d, v1.2d, #3 0x20,0xfc,0x3d,0x0f = fcvtzs v0.2s, v1.2s, #3 0x20,0xfc,0x3d,0x4f = fcvtzs v0.4s, v1.4s, #3 0x20,0xfc,0x7d,0x4f = fcvtzs v0.2d, v1.2d, #3 0x20,0xfc,0x3d,0x2f = fcvtzu v0.2s, v1.2s, #3 0x20,0xfc,0x3d,0x6f = fcvtzu v0.4s, v1.4s, #3 0x20,0xfc,0x7d,0x6f = fcvtzu v0.2d, v1.2d, #3 capstone-sys-0.11.0/capstone/suite/MC/AArch64/neon-tbl.s.cs010066400017500001750000000024471363402546700213670ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x20,0x00,0x02,0x0e = tbl v0.8b, {v1.16b}, v2.8b 0x20,0x20,0x02,0x0e = tbl v0.8b, {v1.16b, v2.16b}, v2.8b 0x20,0x40,0x02,0x0e = tbl v0.8b, {v1.16b, v2.16b, v3.16b}, v2.8b 0x20,0x60,0x02,0x0e = tbl v0.8b, {v1.16b, v2.16b, v3.16b, v4.16b}, v2.8b 0xe0,0x63,0x02,0x0e = tbl v0.8b, {v31.16b, v0.16b, v1.16b, v2.16b}, v2.8b 0x20,0x00,0x02,0x4e = tbl v0.16b, {v1.16b}, v2.16b 0x20,0x20,0x02,0x4e = tbl v0.16b, {v1.16b, v2.16b}, v2.16b 0x20,0x40,0x02,0x4e = tbl v0.16b, {v1.16b, v2.16b, v3.16b}, v2.16b 0x20,0x60,0x02,0x4e = tbl v0.16b, {v1.16b, v2.16b, v3.16b, v4.16b}, v2.16b 0xc0,0x63,0x02,0x4e = tbl v0.16b, {v30.16b, v31.16b, v0.16b, v1.16b}, v2.16b 0x20,0x10,0x02,0x0e = tbx v0.8b, {v1.16b}, v2.8b 0x20,0x30,0x02,0x0e = tbx v0.8b, {v1.16b, v2.16b}, v2.8b 0x20,0x50,0x02,0x0e = tbx v0.8b, {v1.16b, v2.16b, v3.16b}, v2.8b 0x20,0x70,0x02,0x0e = tbx v0.8b, {v1.16b, v2.16b, v3.16b, v4.16b}, v2.8b 0xe0,0x73,0x02,0x0e = tbx v0.8b, {v31.16b, v0.16b, v1.16b, v2.16b}, v2.8b 0x20,0x10,0x02,0x4e = tbx v0.16b, {v1.16b}, v2.16b 0x20,0x30,0x02,0x4e = tbx v0.16b, {v1.16b, v2.16b}, v2.16b 0x20,0x50,0x02,0x4e = tbx v0.16b, {v1.16b, v2.16b, v3.16b}, v2.16b 0x20,0x70,0x02,0x4e = tbx v0.16b, {v1.16b, v2.16b, v3.16b, v4.16b}, v2.16b 0xc0,0x73,0x02,0x4e = tbx v0.16b, {v30.16b, v31.16b, v0.16b, v1.16b}, v2.16b capstone-sys-0.11.0/capstone/suite/MC/AArch64/trace-regs.s.cs010066400017500001750000000367461363402546700217160ustar0000000000000000# CS_ARCH_ARM64, 0, None 0x08,0x03,0x31,0xd5 = mrs x8, trcstatr 0xc9,0x00,0x31,0xd5 = mrs x9, trcidr8 0xcb,0x01,0x31,0xd5 = mrs x11, trcidr9 0xd9,0x02,0x31,0xd5 = mrs x25, trcidr10 0xc7,0x03,0x31,0xd5 = mrs x7, trcidr11 0xc7,0x04,0x31,0xd5 = mrs x7, trcidr12 0xc6,0x05,0x31,0xd5 = mrs x6, trcidr13 0xfb,0x08,0x31,0xd5 = mrs x27, trcidr0 0xfd,0x09,0x31,0xd5 = mrs x29, trcidr1 0xe4,0x0a,0x31,0xd5 = mrs x4, trcidr2 0xe8,0x0b,0x31,0xd5 = mrs x8, trcidr3 0xef,0x0c,0x31,0xd5 = mrs x15, trcidr4 0xf4,0x0d,0x31,0xd5 = mrs x20, trcidr5 0xe6,0x0e,0x31,0xd5 = mrs x6, trcidr6 0xe6,0x0f,0x31,0xd5 = mrs x6, trcidr7 0x98,0x11,0x31,0xd5 = mrs x24, trcoslsr 0x92,0x15,0x31,0xd5 = mrs x18, trcpdsr 0xdc,0x7a,0x31,0xd5 = mrs x28, trcdevaff0 0xc5,0x7b,0x31,0xd5 = mrs x5, trcdevaff1 0xc5,0x7d,0x31,0xd5 = mrs x5, trclsr 0xcb,0x7e,0x31,0xd5 = mrs x11, trcauthstatus 0xcd,0x7f,0x31,0xd5 = mrs x13, trcdevarch 0xf2,0x72,0x31,0xd5 = mrs x18, trcdevid 0xf6,0x73,0x31,0xd5 = mrs x22, trcdevtype 0xee,0x74,0x31,0xd5 = mrs x14, trcpidr4 0xe5,0x75,0x31,0xd5 = mrs x5, trcpidr5 0xe5,0x76,0x31,0xd5 = mrs x5, trcpidr6 0xe9,0x77,0x31,0xd5 = mrs x9, trcpidr7 0xef,0x78,0x31,0xd5 = mrs x15, trcpidr0 0xe6,0x79,0x31,0xd5 = mrs x6, trcpidr1 0xeb,0x7a,0x31,0xd5 = mrs x11, trcpidr2 0xf4,0x7b,0x31,0xd5 = mrs x20, trcpidr3 0xf1,0x7c,0x31,0xd5 = mrs x17, trccidr0 0xe2,0x7d,0x31,0xd5 = mrs x2, trccidr1 0xf4,0x7e,0x31,0xd5 = mrs x20, trccidr2 0xe4,0x7f,0x31,0xd5 = mrs x4, trccidr3 0x0b,0x01,0x31,0xd5 = mrs x11, trcprgctlr 0x17,0x02,0x31,0xd5 = mrs x23, trcprocselr 0x0d,0x04,0x31,0xd5 = mrs x13, trcconfigr 0x17,0x06,0x31,0xd5 = mrs x23, trcauxctlr 0x09,0x08,0x31,0xd5 = mrs x9, trceventctl0r 0x10,0x09,0x31,0xd5 = mrs x16, trceventctl1r 0x04,0x0b,0x31,0xd5 = mrs x4, trcstallctlr 0x0e,0x0c,0x31,0xd5 = mrs x14, trctsctlr 0x18,0x0d,0x31,0xd5 = mrs x24, trcsyncpr 0x1c,0x0e,0x31,0xd5 = mrs x28, trcccctlr 0x0f,0x0f,0x31,0xd5 = mrs x15, trcbbctlr 0x21,0x00,0x31,0xd5 = mrs x1, trctraceidr 0x34,0x01,0x31,0xd5 = mrs x20, trcqctlr 0x42,0x00,0x31,0xd5 = mrs x2, trcvictlr 0x4c,0x01,0x31,0xd5 = mrs x12, trcviiectlr 0x50,0x02,0x31,0xd5 = mrs x16, trcvissctlr 0x48,0x03,0x31,0xd5 = mrs x8, trcvipcssctlr 0x5b,0x08,0x31,0xd5 = mrs x27, trcvdctlr 0x49,0x09,0x31,0xd5 = mrs x9, trcvdsacctlr 0x40,0x0a,0x31,0xd5 = mrs x0, trcvdarcctlr 0x8d,0x00,0x31,0xd5 = mrs x13, trcseqevr0 0x8b,0x01,0x31,0xd5 = mrs x11, trcseqevr1 0x9a,0x02,0x31,0xd5 = mrs x26, trcseqevr2 0x8e,0x06,0x31,0xd5 = mrs x14, trcseqrstevr 0x84,0x07,0x31,0xd5 = mrs x4, trcseqstr 0x91,0x08,0x31,0xd5 = mrs x17, trcextinselr 0xb5,0x00,0x31,0xd5 = mrs x21, trccntrldvr0 0xaa,0x01,0x31,0xd5 = mrs x10, trccntrldvr1 0xb4,0x02,0x31,0xd5 = mrs x20, trccntrldvr2 0xa5,0x03,0x31,0xd5 = mrs x5, trccntrldvr3 0xb1,0x04,0x31,0xd5 = mrs x17, trccntctlr0 0xa1,0x05,0x31,0xd5 = mrs x1, trccntctlr1 0xb1,0x06,0x31,0xd5 = mrs x17, trccntctlr2 0xa6,0x07,0x31,0xd5 = mrs x6, trccntctlr3 0xbc,0x08,0x31,0xd5 = mrs x28, trccntvr0 0xb7,0x09,0x31,0xd5 = mrs x23, trccntvr1 0xa9,0x0a,0x31,0xd5 = mrs x9, trccntvr2 0xa6,0x0b,0x31,0xd5 = mrs x6, trccntvr3 0xf8,0x00,0x31,0xd5 = mrs x24, trcimspec0 0xf8,0x01,0x31,0xd5 = mrs x24, trcimspec1 0xef,0x02,0x31,0xd5 = mrs x15, trcimspec2 0xea,0x03,0x31,0xd5 = mrs x10, trcimspec3 0xfd,0x04,0x31,0xd5 = mrs x29, trcimspec4 0xf2,0x05,0x31,0xd5 = mrs x18, trcimspec5 0xfd,0x06,0x31,0xd5 = mrs x29, trcimspec6 0xe2,0x07,0x31,0xd5 = mrs x2, trcimspec7 0x08,0x12,0x31,0xd5 = mrs x8, trcrsctlr2 0x00,0x13,0x31,0xd5 = mrs x0, trcrsctlr3 0x0c,0x14,0x31,0xd5 = mrs x12, trcrsctlr4 0x1a,0x15,0x31,0xd5 = mrs x26, trcrsctlr5 0x1d,0x16,0x31,0xd5 = mrs x29, trcrsctlr6 0x11,0x17,0x31,0xd5 = mrs x17, trcrsctlr7 0x00,0x18,0x31,0xd5 = mrs x0, trcrsctlr8 0x01,0x19,0x31,0xd5 = mrs x1, trcrsctlr9 0x11,0x1a,0x31,0xd5 = mrs x17, trcrsctlr10 0x15,0x1b,0x31,0xd5 = mrs x21, trcrsctlr11 0x01,0x1c,0x31,0xd5 = mrs x1, trcrsctlr12 0x08,0x1d,0x31,0xd5 = mrs x8, trcrsctlr13 0x18,0x1e,0x31,0xd5 = mrs x24, trcrsctlr14 0x00,0x1f,0x31,0xd5 = mrs x0, trcrsctlr15 0x22,0x10,0x31,0xd5 = mrs x2, trcrsctlr16 0x3d,0x11,0x31,0xd5 = mrs x29, trcrsctlr17 0x36,0x12,0x31,0xd5 = mrs x22, trcrsctlr18 0x26,0x13,0x31,0xd5 = mrs x6, trcrsctlr19 0x3a,0x14,0x31,0xd5 = mrs x26, trcrsctlr20 0x3a,0x15,0x31,0xd5 = mrs x26, trcrsctlr21 0x24,0x16,0x31,0xd5 = mrs x4, trcrsctlr22 0x2c,0x17,0x31,0xd5 = mrs x12, trcrsctlr23 0x21,0x18,0x31,0xd5 = mrs x1, trcrsctlr24 0x20,0x19,0x31,0xd5 = mrs x0, trcrsctlr25 0x31,0x1a,0x31,0xd5 = mrs x17, trcrsctlr26 0x28,0x1b,0x31,0xd5 = mrs x8, trcrsctlr27 0x2a,0x1c,0x31,0xd5 = mrs x10, trcrsctlr28 0x39,0x1d,0x31,0xd5 = mrs x25, trcrsctlr29 0x2c,0x1e,0x31,0xd5 = mrs x12, trcrsctlr30 0x2b,0x1f,0x31,0xd5 = mrs x11, trcrsctlr31 0x52,0x10,0x31,0xd5 = mrs x18, trcssccr0 0x4c,0x11,0x31,0xd5 = mrs x12, trcssccr1 0x43,0x12,0x31,0xd5 = mrs x3, trcssccr2 0x42,0x13,0x31,0xd5 = mrs x2, trcssccr3 0x55,0x14,0x31,0xd5 = mrs x21, trcssccr4 0x4a,0x15,0x31,0xd5 = mrs x10, trcssccr5 0x56,0x16,0x31,0xd5 = mrs x22, trcssccr6 0x57,0x17,0x31,0xd5 = mrs x23, trcssccr7 0x57,0x18,0x31,0xd5 = mrs x23, trcsscsr0 0x53,0x19,0x31,0xd5 = mrs x19, trcsscsr1 0x59,0x1a,0x31,0xd5 = mrs x25, trcsscsr2 0x51,0x1b,0x31,0xd5 = mrs x17, trcsscsr3 0x53,0x1c,0x31,0xd5 = mrs x19, trcsscsr4 0x4b,0x1d,0x31,0xd5 = mrs x11, trcsscsr5 0x45,0x1e,0x31,0xd5 = mrs x5, trcsscsr6 0x49,0x1f,0x31,0xd5 = mrs x9, trcsscsr7 0x61,0x10,0x31,0xd5 = mrs x1, trcsspcicr0 0x6c,0x11,0x31,0xd5 = mrs x12, trcsspcicr1 0x75,0x12,0x31,0xd5 = mrs x21, trcsspcicr2 0x6b,0x13,0x31,0xd5 = mrs x11, trcsspcicr3 0x63,0x14,0x31,0xd5 = mrs x3, trcsspcicr4 0x69,0x15,0x31,0xd5 = mrs x9, trcsspcicr5 0x65,0x16,0x31,0xd5 = mrs x5, trcsspcicr6 0x62,0x17,0x31,0xd5 = mrs x2, trcsspcicr7 0x9a,0x14,0x31,0xd5 = mrs x26, trcpdcr 0x08,0x20,0x31,0xd5 = mrs x8, trcacvr0 0x0f,0x22,0x31,0xd5 = mrs x15, trcacvr1 0x13,0x24,0x31,0xd5 = mrs x19, trcacvr2 0x08,0x26,0x31,0xd5 = mrs x8, trcacvr3 0x1c,0x28,0x31,0xd5 = mrs x28, trcacvr4 0x03,0x2a,0x31,0xd5 = mrs x3, trcacvr5 0x19,0x2c,0x31,0xd5 = mrs x25, trcacvr6 0x18,0x2e,0x31,0xd5 = mrs x24, trcacvr7 0x26,0x20,0x31,0xd5 = mrs x6, trcacvr8 0x23,0x22,0x31,0xd5 = mrs x3, trcacvr9 0x38,0x24,0x31,0xd5 = mrs x24, trcacvr10 0x23,0x26,0x31,0xd5 = mrs x3, trcacvr11 0x2c,0x28,0x31,0xd5 = mrs x12, trcacvr12 0x29,0x2a,0x31,0xd5 = mrs x9, trcacvr13 0x2e,0x2c,0x31,0xd5 = mrs x14, trcacvr14 0x23,0x2e,0x31,0xd5 = mrs x3, trcacvr15 0x55,0x20,0x31,0xd5 = mrs x21, trcacatr0 0x5a,0x22,0x31,0xd5 = mrs x26, trcacatr1 0x48,0x24,0x31,0xd5 = mrs x8, trcacatr2 0x56,0x26,0x31,0xd5 = mrs x22, trcacatr3 0x46,0x28,0x31,0xd5 = mrs x6, trcacatr4 0x5d,0x2a,0x31,0xd5 = mrs x29, trcacatr5 0x45,0x2c,0x31,0xd5 = mrs x5, trcacatr6 0x52,0x2e,0x31,0xd5 = mrs x18, trcacatr7 0x62,0x20,0x31,0xd5 = mrs x2, trcacatr8 0x73,0x22,0x31,0xd5 = mrs x19, trcacatr9 0x6d,0x24,0x31,0xd5 = mrs x13, trcacatr10 0x79,0x26,0x31,0xd5 = mrs x25, trcacatr11 0x72,0x28,0x31,0xd5 = mrs x18, trcacatr12 0x7d,0x2a,0x31,0xd5 = mrs x29, trcacatr13 0x69,0x2c,0x31,0xd5 = mrs x9, trcacatr14 0x72,0x2e,0x31,0xd5 = mrs x18, trcacatr15 0x9d,0x20,0x31,0xd5 = mrs x29, trcdvcvr0 0x8f,0x24,0x31,0xd5 = mrs x15, trcdvcvr1 0x8f,0x28,0x31,0xd5 = mrs x15, trcdvcvr2 0x8f,0x2c,0x31,0xd5 = mrs x15, trcdvcvr3 0xb3,0x20,0x31,0xd5 = mrs x19, trcdvcvr4 0xb6,0x24,0x31,0xd5 = mrs x22, trcdvcvr5 0xbb,0x28,0x31,0xd5 = mrs x27, trcdvcvr6 0xa1,0x2c,0x31,0xd5 = mrs x1, trcdvcvr7 0xdd,0x20,0x31,0xd5 = mrs x29, trcdvcmr0 0xc9,0x24,0x31,0xd5 = mrs x9, trcdvcmr1 0xc1,0x28,0x31,0xd5 = mrs x1, trcdvcmr2 0xc2,0x2c,0x31,0xd5 = mrs x2, trcdvcmr3 0xe5,0x20,0x31,0xd5 = mrs x5, trcdvcmr4 0xf5,0x24,0x31,0xd5 = mrs x21, trcdvcmr5 0xe5,0x28,0x31,0xd5 = mrs x5, trcdvcmr6 0xe1,0x2c,0x31,0xd5 = mrs x1, trcdvcmr7 0x15,0x30,0x31,0xd5 = mrs x21, trccidcvr0 0x18,0x32,0x31,0xd5 = mrs x24, trccidcvr1 0x18,0x34,0x31,0xd5 = mrs x24, trccidcvr2 0x0c,0x36,0x31,0xd5 = mrs x12, trccidcvr3 0x0a,0x38,0x31,0xd5 = mrs x10, trccidcvr4 0x09,0x3a,0x31,0xd5 = mrs x9, trccidcvr5 0x06,0x3c,0x31,0xd5 = mrs x6, trccidcvr6 0x14,0x3e,0x31,0xd5 = mrs x20, trccidcvr7 0x34,0x30,0x31,0xd5 = mrs x20, trcvmidcvr0 0x34,0x32,0x31,0xd5 = mrs x20, trcvmidcvr1 0x3a,0x34,0x31,0xd5 = mrs x26, trcvmidcvr2 0x21,0x36,0x31,0xd5 = mrs x1, trcvmidcvr3 0x2e,0x38,0x31,0xd5 = mrs x14, trcvmidcvr4 0x3b,0x3a,0x31,0xd5 = mrs x27, trcvmidcvr5 0x3d,0x3c,0x31,0xd5 = mrs x29, trcvmidcvr6 0x31,0x3e,0x31,0xd5 = mrs x17, trcvmidcvr7 0x4a,0x30,0x31,0xd5 = mrs x10, trccidcctlr0 0x44,0x31,0x31,0xd5 = mrs x4, trccidcctlr1 0x49,0x32,0x31,0xd5 = mrs x9, trcvmidcctlr0 0x4b,0x33,0x31,0xd5 = mrs x11, trcvmidcctlr1 0x96,0x70,0x31,0xd5 = mrs x22, trcitctrl 0xd7,0x78,0x31,0xd5 = mrs x23, trcclaimset 0xce,0x79,0x31,0xd5 = mrs x14, trcclaimclr 0x9c,0x10,0x11,0xd5 = msr trcoslar, x28 0xce,0x7c,0x11,0xd5 = msr trclar, x14 0x0a,0x01,0x11,0xd5 = msr trcprgctlr, x10 0x1b,0x02,0x11,0xd5 = msr trcprocselr, x27 0x18,0x04,0x11,0xd5 = msr trcconfigr, x24 0x08,0x06,0x11,0xd5 = msr trcauxctlr, x8 0x10,0x08,0x11,0xd5 = msr trceventctl0r, x16 0x1b,0x09,0x11,0xd5 = msr trceventctl1r, x27 0x1a,0x0b,0x11,0xd5 = msr trcstallctlr, x26 0x00,0x0c,0x11,0xd5 = msr trctsctlr, x0 0x0e,0x0d,0x11,0xd5 = msr trcsyncpr, x14 0x08,0x0e,0x11,0xd5 = msr trcccctlr, x8 0x06,0x0f,0x11,0xd5 = msr trcbbctlr, x6 0x37,0x00,0x11,0xd5 = msr trctraceidr, x23 0x25,0x01,0x11,0xd5 = msr trcqctlr, x5 0x40,0x00,0x11,0xd5 = msr trcvictlr, x0 0x40,0x01,0x11,0xd5 = msr trcviiectlr, x0 0x41,0x02,0x11,0xd5 = msr trcvissctlr, x1 0x40,0x03,0x11,0xd5 = msr trcvipcssctlr, x0 0x47,0x08,0x11,0xd5 = msr trcvdctlr, x7 0x52,0x09,0x11,0xd5 = msr trcvdsacctlr, x18 0x58,0x0a,0x11,0xd5 = msr trcvdarcctlr, x24 0x9c,0x00,0x11,0xd5 = msr trcseqevr0, x28 0x95,0x01,0x11,0xd5 = msr trcseqevr1, x21 0x90,0x02,0x11,0xd5 = msr trcseqevr2, x16 0x90,0x06,0x11,0xd5 = msr trcseqrstevr, x16 0x99,0x07,0x11,0xd5 = msr trcseqstr, x25 0x9d,0x08,0x11,0xd5 = msr trcextinselr, x29 0xb4,0x00,0x11,0xd5 = msr trccntrldvr0, x20 0xb4,0x01,0x11,0xd5 = msr trccntrldvr1, x20 0xb6,0x02,0x11,0xd5 = msr trccntrldvr2, x22 0xac,0x03,0x11,0xd5 = msr trccntrldvr3, x12 0xb4,0x04,0x11,0xd5 = msr trccntctlr0, x20 0xa4,0x05,0x11,0xd5 = msr trccntctlr1, x4 0xa8,0x06,0x11,0xd5 = msr trccntctlr2, x8 0xb0,0x07,0x11,0xd5 = msr trccntctlr3, x16 0xa5,0x08,0x11,0xd5 = msr trccntvr0, x5 0xbb,0x09,0x11,0xd5 = msr trccntvr1, x27 0xb5,0x0a,0x11,0xd5 = msr trccntvr2, x21 0xa8,0x0b,0x11,0xd5 = msr trccntvr3, x8 0xe6,0x00,0x11,0xd5 = msr trcimspec0, x6 0xfb,0x01,0x11,0xd5 = msr trcimspec1, x27 0xf7,0x02,0x11,0xd5 = msr trcimspec2, x23 0xef,0x03,0x11,0xd5 = msr trcimspec3, x15 0xed,0x04,0x11,0xd5 = msr trcimspec4, x13 0xf9,0x05,0x11,0xd5 = msr trcimspec5, x25 0xf3,0x06,0x11,0xd5 = msr trcimspec6, x19 0xfb,0x07,0x11,0xd5 = msr trcimspec7, x27 0x04,0x12,0x11,0xd5 = msr trcrsctlr2, x4 0x00,0x13,0x11,0xd5 = msr trcrsctlr3, x0 0x15,0x14,0x11,0xd5 = msr trcrsctlr4, x21 0x08,0x15,0x11,0xd5 = msr trcrsctlr5, x8 0x14,0x16,0x11,0xd5 = msr trcrsctlr6, x20 0x0b,0x17,0x11,0xd5 = msr trcrsctlr7, x11 0x12,0x18,0x11,0xd5 = msr trcrsctlr8, x18 0x18,0x19,0x11,0xd5 = msr trcrsctlr9, x24 0x0f,0x1a,0x11,0xd5 = msr trcrsctlr10, x15 0x15,0x1b,0x11,0xd5 = msr trcrsctlr11, x21 0x04,0x1c,0x11,0xd5 = msr trcrsctlr12, x4 0x1c,0x1d,0x11,0xd5 = msr trcrsctlr13, x28 0x03,0x1e,0x11,0xd5 = msr trcrsctlr14, x3 0x14,0x1f,0x11,0xd5 = msr trcrsctlr15, x20 0x2c,0x10,0x11,0xd5 = msr trcrsctlr16, x12 0x31,0x11,0x11,0xd5 = msr trcrsctlr17, x17 0x2a,0x12,0x11,0xd5 = msr trcrsctlr18, x10 0x2b,0x13,0x11,0xd5 = msr trcrsctlr19, x11 0x23,0x14,0x11,0xd5 = msr trcrsctlr20, x3 0x32,0x15,0x11,0xd5 = msr trcrsctlr21, x18 0x3a,0x16,0x11,0xd5 = msr trcrsctlr22, x26 0x25,0x17,0x11,0xd5 = msr trcrsctlr23, x5 0x39,0x18,0x11,0xd5 = msr trcrsctlr24, x25 0x25,0x19,0x11,0xd5 = msr trcrsctlr25, x5 0x24,0x1a,0x11,0xd5 = msr trcrsctlr26, x4 0x34,0x1b,0x11,0xd5 = msr trcrsctlr27, x20 0x25,0x1c,0x11,0xd5 = msr trcrsctlr28, x5 0x2a,0x1d,0x11,0xd5 = msr trcrsctlr29, x10 0x38,0x1e,0x11,0xd5 = msr trcrsctlr30, x24 0x34,0x1f,0x11,0xd5 = msr trcrsctlr31, x20 0x57,0x10,0x11,0xd5 = msr trcssccr0, x23 0x5b,0x11,0x11,0xd5 = msr trcssccr1, x27 0x5b,0x12,0x11,0xd5 = msr trcssccr2, x27 0x46,0x13,0x11,0xd5 = msr trcssccr3, x6 0x43,0x14,0x11,0xd5 = msr trcssccr4, x3 0x4c,0x15,0x11,0xd5 = msr trcssccr5, x12 0x47,0x16,0x11,0xd5 = msr trcssccr6, x7 0x46,0x17,0x11,0xd5 = msr trcssccr7, x6 0x54,0x18,0x11,0xd5 = msr trcsscsr0, x20 0x51,0x19,0x11,0xd5 = msr trcsscsr1, x17 0x4b,0x1a,0x11,0xd5 = msr trcsscsr2, x11 0x44,0x1b,0x11,0xd5 = msr trcsscsr3, x4 0x4e,0x1c,0x11,0xd5 = msr trcsscsr4, x14 0x56,0x1d,0x11,0xd5 = msr trcsscsr5, x22 0x43,0x1e,0x11,0xd5 = msr trcsscsr6, x3 0x4b,0x1f,0x11,0xd5 = msr trcsscsr7, x11 0x62,0x10,0x11,0xd5 = msr trcsspcicr0, x2 0x63,0x11,0x11,0xd5 = msr trcsspcicr1, x3 0x65,0x12,0x11,0xd5 = msr trcsspcicr2, x5 0x67,0x13,0x11,0xd5 = msr trcsspcicr3, x7 0x6b,0x14,0x11,0xd5 = msr trcsspcicr4, x11 0x6d,0x15,0x11,0xd5 = msr trcsspcicr5, x13 0x71,0x16,0x11,0xd5 = msr trcsspcicr6, x17 0x77,0x17,0x11,0xd5 = msr trcsspcicr7, x23 0x83,0x14,0x11,0xd5 = msr trcpdcr, x3 0x06,0x20,0x11,0xd5 = msr trcacvr0, x6 0x14,0x22,0x11,0xd5 = msr trcacvr1, x20 0x19,0x24,0x11,0xd5 = msr trcacvr2, x25 0x01,0x26,0x11,0xd5 = msr trcacvr3, x1 0x1c,0x28,0x11,0xd5 = msr trcacvr4, x28 0x0f,0x2a,0x11,0xd5 = msr trcacvr5, x15 0x19,0x2c,0x11,0xd5 = msr trcacvr6, x25 0x0c,0x2e,0x11,0xd5 = msr trcacvr7, x12 0x25,0x20,0x11,0xd5 = msr trcacvr8, x5 0x39,0x22,0x11,0xd5 = msr trcacvr9, x25 0x2d,0x24,0x11,0xd5 = msr trcacvr10, x13 0x2a,0x26,0x11,0xd5 = msr trcacvr11, x10 0x33,0x28,0x11,0xd5 = msr trcacvr12, x19 0x2a,0x2a,0x11,0xd5 = msr trcacvr13, x10 0x33,0x2c,0x11,0xd5 = msr trcacvr14, x19 0x22,0x2e,0x11,0xd5 = msr trcacvr15, x2 0x4f,0x20,0x11,0xd5 = msr trcacatr0, x15 0x4d,0x22,0x11,0xd5 = msr trcacatr1, x13 0x48,0x24,0x11,0xd5 = msr trcacatr2, x8 0x41,0x26,0x11,0xd5 = msr trcacatr3, x1 0x4b,0x28,0x11,0xd5 = msr trcacatr4, x11 0x48,0x2a,0x11,0xd5 = msr trcacatr5, x8 0x58,0x2c,0x11,0xd5 = msr trcacatr6, x24 0x46,0x2e,0x11,0xd5 = msr trcacatr7, x6 0x77,0x20,0x11,0xd5 = msr trcacatr8, x23 0x65,0x22,0x11,0xd5 = msr trcacatr9, x5 0x6b,0x24,0x11,0xd5 = msr trcacatr10, x11 0x6b,0x26,0x11,0xd5 = msr trcacatr11, x11 0x63,0x28,0x11,0xd5 = msr trcacatr12, x3 0x7c,0x2a,0x11,0xd5 = msr trcacatr13, x28 0x79,0x2c,0x11,0xd5 = msr trcacatr14, x25 0x64,0x2e,0x11,0xd5 = msr trcacatr15, x4 0x86,0x20,0x11,0xd5 = msr trcdvcvr0, x6 0x83,0x24,0x11,0xd5 = msr trcdvcvr1, x3 0x85,0x28,0x11,0xd5 = msr trcdvcvr2, x5 0x8b,0x2c,0x11,0xd5 = msr trcdvcvr3, x11 0xa9,0x20,0x11,0xd5 = msr trcdvcvr4, x9 0xae,0x24,0x11,0xd5 = msr trcdvcvr5, x14 0xaa,0x28,0x11,0xd5 = msr trcdvcvr6, x10 0xac,0x2c,0x11,0xd5 = msr trcdvcvr7, x12 0xc8,0x20,0x11,0xd5 = msr trcdvcmr0, x8 0xc8,0x24,0x11,0xd5 = msr trcdvcmr1, x8 0xd6,0x28,0x11,0xd5 = msr trcdvcmr2, x22 0xd6,0x2c,0x11,0xd5 = msr trcdvcmr3, x22 0xe5,0x20,0x11,0xd5 = msr trcdvcmr4, x5 0xf0,0x24,0x11,0xd5 = msr trcdvcmr5, x16 0xfb,0x28,0x11,0xd5 = msr trcdvcmr6, x27 0xf5,0x2c,0x11,0xd5 = msr trcdvcmr7, x21 0x08,0x30,0x11,0xd5 = msr trccidcvr0, x8 0x06,0x32,0x11,0xd5 = msr trccidcvr1, x6 0x09,0x34,0x11,0xd5 = msr trccidcvr2, x9 0x08,0x36,0x11,0xd5 = msr trccidcvr3, x8 0x03,0x38,0x11,0xd5 = msr trccidcvr4, x3 0x15,0x3a,0x11,0xd5 = msr trccidcvr5, x21 0x0c,0x3c,0x11,0xd5 = msr trccidcvr6, x12 0x07,0x3e,0x11,0xd5 = msr trccidcvr7, x7 0x24,0x30,0x11,0xd5 = msr trcvmidcvr0, x4 0x23,0x32,0x11,0xd5 = msr trcvmidcvr1, x3 0x29,0x34,0x11,0xd5 = msr trcvmidcvr2, x9 0x31,0x36,0x11,0xd5 = msr trcvmidcvr3, x17 0x2e,0x38,0x11,0xd5 = msr trcvmidcvr4, x14 0x2c,0x3a,0x11,0xd5 = msr trcvmidcvr5, x12 0x2a,0x3c,0x11,0xd5 = msr trcvmidcvr6, x10 0x23,0x3e,0x11,0xd5 = msr trcvmidcvr7, x3 0x4e,0x30,0x11,0xd5 = msr trccidcctlr0, x14 0x56,0x31,0x11,0xd5 = msr trccidcctlr1, x22 0x48,0x32,0x11,0xd5 = msr trcvmidcctlr0, x8 0x4f,0x33,0x11,0xd5 = msr trcvmidcctlr1, x15 0x81,0x70,0x11,0xd5 = msr trcitctrl, x1 0xc7,0x78,0x11,0xd5 = msr trcclaimset, x7 0xdd,0x79,0x11,0xd5 = msr trcclaimclr, x29 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-aliases.s.cs010066400017500001750000000003771363402546700213360ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x03,0x10,0x82,0xe0 = add r1, r2, r3 0x03,0x10,0x42,0xe0 = sub r1, r2, r3 0x03,0x10,0x22,0xe0 = eor r1, r2, r3 0x03,0x10,0x82,0xe1 = orr r1, r2, r3 0x03,0x10,0x02,0xe0 = and r1, r2, r3 0x03,0x10,0xc2,0xe1 = bic r1, r2, r3 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-arithmetic-aliases.s.cs010066400017500001750000000036001363402546700234550ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x06,0x20,0x42,0xe2 = sub r2, r2, #6 0x06,0x20,0x42,0xe2 = sub r2, r2, #6 0x03,0x20,0x42,0xe0 = sub r2, r2, r3 0x03,0x20,0x42,0xe0 = sub r2, r2, r3 0x06,0x20,0x82,0xe2 = add r2, r2, #6 0x06,0x20,0x82,0xe2 = add r2, r2, #6 0x03,0x20,0x82,0xe0 = add r2, r2, r3 0x03,0x20,0x82,0xe0 = add r2, r2, r3 0x06,0x20,0x02,0xe2 = and r2, r2, #6 0x06,0x20,0x02,0xe2 = and r2, r2, #6 0x03,0x20,0x02,0xe0 = and r2, r2, r3 0x03,0x20,0x02,0xe0 = and r2, r2, r3 0x06,0x20,0x82,0xe3 = orr r2, r2, #6 0x06,0x20,0x82,0xe3 = orr r2, r2, #6 0x03,0x20,0x82,0xe1 = orr r2, r2, r3 0x03,0x20,0x82,0xe1 = orr r2, r2, r3 0x06,0x20,0x22,0xe2 = eor r2, r2, #6 0x06,0x20,0x22,0xe2 = eor r2, r2, #6 0x03,0x20,0x22,0xe0 = eor r2, r2, r3 0x03,0x20,0x22,0xe0 = eor r2, r2, r3 0x06,0x20,0xc2,0xe3 = bic r2, r2, #6 0x06,0x20,0xc2,0xe3 = bic r2, r2, #6 0x03,0x20,0xc2,0xe1 = bic r2, r2, r3 0x03,0x20,0xc2,0xe1 = bic r2, r2, r3 0x06,0x20,0x52,0x02 = subseq r2, r2, #6 0x06,0x20,0x52,0x02 = subseq r2, r2, #6 0x03,0x20,0x52,0x00 = subseq r2, r2, r3 0x03,0x20,0x52,0x00 = subseq r2, r2, r3 0x06,0x20,0x92,0x02 = addseq r2, r2, #6 0x06,0x20,0x92,0x02 = addseq r2, r2, #6 0x03,0x20,0x92,0x00 = addseq r2, r2, r3 0x03,0x20,0x92,0x00 = addseq r2, r2, r3 0x06,0x20,0x12,0x02 = andseq r2, r2, #6 0x06,0x20,0x12,0x02 = andseq r2, r2, #6 0x03,0x20,0x12,0x00 = andseq r2, r2, r3 0x03,0x20,0x12,0x00 = andseq r2, r2, r3 0x06,0x20,0x92,0x03 = orrseq r2, r2, #6 0x06,0x20,0x92,0x03 = orrseq r2, r2, #6 0x03,0x20,0x92,0x01 = orrseq r2, r2, r3 0x03,0x20,0x92,0x01 = orrseq r2, r2, r3 0x06,0x20,0x32,0x02 = eorseq r2, r2, #6 0x06,0x20,0x32,0x02 = eorseq r2, r2, #6 0x03,0x20,0x32,0x00 = eorseq r2, r2, r3 0x03,0x20,0x32,0x00 = eorseq r2, r2, r3 0x06,0x20,0xd2,0x03 = bicseq r2, r2, #6 0x06,0x20,0xd2,0x03 = bicseq r2, r2, #6 0x03,0x20,0xd2,0x01 = bicseq r2, r2, r3 0x03,0x20,0xd2,0x01 = bicseq r2, r2, r3 0x7b,0x00,0x8f,0xe2 = add r0, pc, #123 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-it-block.s.cs010066400017500001750000000001041363402546700214050ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x03,0x20,0xa0,0x01 = moveq r2, r3 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-memory-instructions.s.cs010066400017500001750000000132561363402546700237670ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x00,0x50,0x97,0xe5 = ldr r5, [r7] 0x3f,0x60,0x93,0xe5 = ldr r6, [r3, #63] 0xff,0x2f,0xb4,0xe5 = ldr r2, [r4, #4095]! 0x1e,0x10,0x92,0xe4 = ldr r1, [r2], #30 0x1e,0x30,0x11,0xe4 = ldr r3, [r1], #-30 0x00,0x90,0x12,0xe4 = ldr r9, [r2], #-0 0x01,0x30,0x98,0xe7 = ldr r3, [r8, r1] 0x03,0x20,0x15,0xe7 = ldr r2, [r5, -r3] 0x09,0x10,0xb5,0xe7 = ldr r1, [r5, r9]! 0x08,0x60,0x37,0xe7 = ldr r6, [r7, -r8]! 0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]! 0x02,0x50,0x99,0xe6 = ldr r5, [r9], r2 0x06,0x40,0x13,0xe6 = ldr r4, [r3], -r6 0x82,0x37,0x18,0xe7 = ldr r3, [r8, -r2, lsl #15] 0xc3,0x17,0x95,0xe6 = ldr r1, [r5], r3, asr #15 0x00,0x30,0xd8,0xe5 = ldrb r3, [r8] 0x3f,0x10,0xdd,0xe5 = ldrb r1, [sp, #63] 0xff,0x9f,0xf3,0xe5 = ldrb r9, [r3, #4095]! 0x16,0x80,0xd1,0xe4 = ldrb r8, [r1], #22 0x13,0x20,0x57,0xe4 = ldrb r2, [r7], #-19 0x05,0x90,0xd8,0xe7 = ldrb r9, [r8, r5] 0x01,0x10,0x55,0xe7 = ldrb r1, [r5, -r1] 0x02,0x30,0xf5,0xe7 = ldrb r3, [r5, r2]! 0x03,0x60,0x79,0xe7 = ldrb r6, [r9, -r3]! 0x04,0x20,0xd1,0xe6 = ldrb r2, [r1], r4 0x05,0x80,0x54,0xe6 = ldrb r8, [r4], -r5 0x81,0x77,0x5c,0xe7 = ldrb r7, [r12, -r1, lsl #15] 0xc9,0x57,0xd2,0xe6 = ldrb r5, [r2], r9, asr #15 0x04,0x30,0xf1,0xe4 = ldrbt r3, [r1], #4 0x08,0x20,0x78,0xe4 = ldrbt r2, [r8], #-8 0x06,0x80,0xf7,0xe6 = ldrbt r8, [r7], r6 0x06,0x16,0x72,0xe6 = ldrbt r1, [r2], -r6, lsl #12 0xd0,0x20,0xc5,0xe1 = ldrd r2, r3, [r5] 0xdf,0x60,0xc2,0xe1 = ldrd r6, r7, [r2, #15] 0xd0,0x02,0xe9,0xe1 = ldrd r0, r1, [r9, #32]! 0xd8,0x60,0xc1,0xe0 = ldrd r6, r7, [r1], #8 0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0 0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0 0xd0,0x00,0x48,0xe0 = ldrd r0, r1, [r8], #-0 0xd3,0x40,0x81,0xe1 = ldrd r4, r5, [r1, r3] 0xd2,0x40,0xa7,0xe1 = ldrd r4, r5, [r7, r2]! 0xdc,0x00,0x88,0xe0 = ldrd r0, r1, [r8], r12 0xdc,0x00,0x08,0xe0 = ldrd r0, r1, [r8], -r12 0xb0,0x30,0xd4,0xe1 = ldrh r3, [r4] 0xb4,0x20,0xd7,0xe1 = ldrh r2, [r7, #4] 0xb0,0x14,0xf8,0xe1 = ldrh r1, [r8, #64]! 0xb4,0xc0,0xdd,0xe0 = ldrh r12, [sp], #4 0xb4,0x60,0x95,0xe1 = ldrh r6, [r5, r4] 0xbb,0x30,0xb8,0xe1 = ldrh r3, [r8, r11]! 0xb1,0x10,0x32,0xe1 = ldrh r1, [r2, -r1]! 0xb2,0x90,0x97,0xe0 = ldrh r9, [r7], r2 0xb2,0x40,0x13,0xe0 = ldrh r4, [r3], -r2 0xb0,0x98,0xf7,0xe0 = ldrht r9, [r7], #128 0xbb,0x44,0x73,0xe0 = ldrht r4, [r3], #-75 0xb2,0x90,0xb7,0xe0 = ldrht r9, [r7], r2 0xb2,0x40,0x33,0xe0 = ldrht r4, [r3], -r2 0xd0,0x30,0xd4,0xe1 = ldrsb r3, [r4] 0xd1,0x21,0xd7,0xe1 = ldrsb r2, [r7, #17] 0xdf,0x1f,0xf8,0xe1 = ldrsb r1, [r8, #255]! 0xd9,0xc0,0xdd,0xe0 = ldrsb r12, [sp], #9 0xd4,0x60,0x95,0xe1 = ldrsb r6, [r5, r4] 0xdb,0x30,0xb8,0xe1 = ldrsb r3, [r8, r11]! 0xd1,0x10,0x32,0xe1 = ldrsb r1, [r2, -r1]! 0xd2,0x90,0x97,0xe0 = ldrsb r9, [r7], r2 0xd2,0x40,0x13,0xe0 = ldrsb r4, [r3], -r2 0xd1,0x50,0xf6,0xe0 = ldrsbt r5, [r6], #1 0xdc,0x30,0x78,0xe0 = ldrsbt r3, [r8], #-12 0xd5,0x80,0xb9,0xe0 = ldrsbt r8, [r9], r5 0xd4,0x20,0x31,0xe0 = ldrsbt r2, [r1], -r4 0xf0,0x50,0xd9,0xe1 = ldrsh r5, [r9] 0xf7,0x40,0xd5,0xe1 = ldrsh r4, [r5, #7] 0xf7,0x33,0xf6,0xe1 = ldrsh r3, [r6, #55]! 0xf9,0x20,0x57,0xe0 = ldrsh r2, [r7], #-9 0xf5,0x30,0x91,0xe1 = ldrsh r3, [r1, r5] 0xf1,0x40,0xb6,0xe1 = ldrsh r4, [r6, r1]! 0xf6,0x50,0x33,0xe1 = ldrsh r5, [r3, -r6]! 0xf8,0x60,0x99,0xe0 = ldrsh r6, [r9], r8 0xf3,0x70,0x18,0xe0 = ldrsh r7, [r8], -r3 0xf1,0x50,0xf6,0xe0 = ldrsht r5, [r6], #1 0xfc,0x30,0x78,0xe0 = ldrsht r3, [r8], #-12 0xf5,0x80,0xb9,0xe0 = ldrsht r8, [r9], r5 0xf4,0x20,0x31,0xe0 = ldrsht r2, [r1], -r4 0x00,0x80,0x8c,0xe5 = str r8, [r12] 0x0c,0x70,0x81,0xe5 = str r7, [r1, #12] 0x28,0x30,0xa5,0xe5 = str r3, [r5, #40]! 0xff,0x9f,0x8d,0xe4 = str r9, [sp], #4095 0x80,0x10,0x07,0xe4 = str r1, [r7], #-128 0x00,0x10,0x00,0xe4 = str r1, [r0], #-0 0x03,0x90,0x86,0xe7 = str r9, [r6, r3] 0x02,0x80,0x00,0xe7 = str r8, [r0, -r2] 0x06,0x70,0xa1,0xe7 = str r7, [r1, r6]! 0x01,0x60,0x2d,0xe7 = str r6, [sp, -r1]! 0x09,0x50,0x83,0xe6 = str r5, [r3], r9 0x05,0x40,0x02,0xe6 = str r4, [r2], -r5 0x02,0x31,0x04,0xe7 = str r3, [r4, -r2, lsl #2] 0x43,0x2c,0x87,0xe6 = str r2, [r7], r3, asr #24 0x00,0x90,0xc2,0xe5 = strb r9, [r2] 0x03,0x70,0xc1,0xe5 = strb r7, [r1, #3] 0x95,0x61,0xe4,0xe5 = strb r6, [r4, #405]! 0x48,0x50,0xc7,0xe4 = strb r5, [r7], #72 0x01,0x10,0x4d,0xe4 = strb r1, [sp], #-1 0x09,0x10,0xc2,0xe7 = strb r1, [r2, r9] 0x08,0x20,0x43,0xe7 = strb r2, [r3, -r8] 0x07,0x30,0xe4,0xe7 = strb r3, [r4, r7]! 0x06,0x40,0x65,0xe7 = strb r4, [r5, -r6]! 0x05,0x50,0xc6,0xe6 = strb r5, [r6], r5 0x04,0x60,0x42,0xe6 = strb r6, [r2], -r4 0x83,0x72,0x4c,0xe7 = strb r7, [r12, -r3, lsl #5] 0x42,0xd6,0xc7,0xe6 = strb sp, [r7], r2, asr #12 0x0c,0x60,0xe2,0xe4 = strbt r6, [r2], #12 0x0d,0x50,0x66,0xe4 = strbt r5, [r6], #-13 0x05,0x40,0xe9,0xe6 = strbt r4, [r9], r5 0x82,0x31,0x68,0xe6 = strbt r3, [r8], -r2, lsl #3 0xf0,0x10,0xc4,0xe1 = strd r1, r2, [r4] 0xf1,0x20,0xc6,0xe1 = strd r2, r3, [r6, #1] 0xf6,0x31,0xe7,0xe1 = strd r3, r4, [r7, #22]! 0xf7,0x40,0xc8,0xe0 = strd r4, r5, [r8], #7 0xf0,0x50,0xcd,0xe0 = strd r5, r6, [sp], #0 0xf0,0x60,0xce,0xe0 = strd r6, r7, [lr], #0 0xf0,0x70,0x49,0xe0 = strd r7, r8, [r9], #-0 0xf1,0x80,0x84,0xe1 = strd r8, r9, [r4, r1] 0xf9,0x70,0xa3,0xe1 = strd r7, r8, [r3, r9]! 0xf8,0x60,0x85,0xe0 = strd r6, r7, [r5], r8 0xfa,0x50,0x0c,0xe0 = strd r5, r6, [r12], -r10 0xb0,0x30,0xc4,0xe1 = strh r3, [r4] 0xb4,0x20,0xc7,0xe1 = strh r2, [r7, #4] 0xb0,0x14,0xe8,0xe1 = strh r1, [r8, #64]! 0xb4,0xc0,0xcd,0xe0 = strh r12, [sp], #4 0xb4,0x60,0x85,0xe1 = strh r6, [r5, r4] 0xbb,0x30,0xa8,0xe1 = strh r3, [r8, r11]! 0xb1,0x10,0x22,0xe1 = strh r1, [r2, -r1]! 0xb2,0x90,0x87,0xe0 = strh r9, [r7], r2 0xb2,0x40,0x03,0xe0 = strh r4, [r3], -r2 0xbc,0x24,0xe5,0xe0 = strht r2, [r5], #76 0xb9,0x81,0x61,0xe0 = strht r8, [r1], #-25 0xb4,0x50,0xa3,0xe0 = strht r5, [r3], r4 0xb0,0x60,0x28,0xe0 = strht r6, [r8], -r0 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-shift-encoding.s.cs010066400017500001750000000041351363402546700226120ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0] 0x20,0x00,0x90,0xe7 = ldr r0, [r0, r0, lsr #32] 0x20,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsr #16] 0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0] 0x00,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsl #16] 0x40,0x00,0x90,0xe7 = ldr r0, [r0, r0, asr #32] 0x40,0x08,0x90,0xe7 = ldr r0, [r0, r0, asr #16] 0x60,0x00,0x90,0xe7 = ldr r0, [r0, r0, rrx] 0x60,0x08,0x90,0xe7 = ldr r0, [r0, r0, ror #16] 0x00,0xf0,0xd0,0xf7 = pld [r0, r0] 0x20,0xf0,0xd0,0xf7 = pld [r0, r0, lsr #32] 0x20,0xf8,0xd0,0xf7 = pld [r0, r0, lsr #16] 0x00,0xf0,0xd0,0xf7 = pld [r0, r0] 0x00,0xf8,0xd0,0xf7 = pld [r0, r0, lsl #16] 0x40,0xf0,0xd0,0xf7 = pld [r0, r0, asr #32] 0x40,0xf8,0xd0,0xf7 = pld [r0, r0, asr #16] 0x60,0xf0,0xd0,0xf7 = pld [r0, r0, rrx] 0x60,0xf8,0xd0,0xf7 = pld [r0, r0, ror #16] 0x00,0x00,0x80,0xe7 = str r0, [r0, r0] 0x20,0x00,0x80,0xe7 = str r0, [r0, r0, lsr #32] 0x20,0x08,0x80,0xe7 = str r0, [r0, r0, lsr #16] 0x00,0x00,0x80,0xe7 = str r0, [r0, r0] 0x00,0x08,0x80,0xe7 = str r0, [r0, r0, lsl #16] 0x40,0x00,0x80,0xe7 = str r0, [r0, r0, asr #32] 0x40,0x08,0x80,0xe7 = str r0, [r0, r0, asr #16] 0x60,0x00,0x80,0xe7 = str r0, [r0, r0, rrx] 0x60,0x08,0x80,0xe7 = str r0, [r0, r0, ror #16] 0x62,0x00,0x91,0xe6 = ldr r0, [r1], r2, rrx 0x05,0x30,0x94,0xe6 = ldr r3, [r4], r5 0x08,0x60,0x87,0xe6 = str r6, [r7], r8 0x0b,0x90,0x8a,0xe6 = str r9, [r10], r11 0x0f,0xd0,0xae,0xe0 = adc sp, lr, pc 0x29,0x10,0xa8,0xe0 = adc r1, r8, r9, lsr #32 0x2f,0x28,0xa7,0xe0 = adc r2, r7, pc, lsr #16 0x0a,0x30,0xa6,0xe0 = adc r3, r6, r10 0x0e,0x48,0xa5,0xe0 = adc r4, r5, lr, lsl #16 0x4b,0x50,0xa4,0xe0 = adc r5, r4, r11, asr #32 0x4d,0x68,0xa3,0xe0 = adc r6, r3, sp, asr #16 0x6c,0x70,0xa2,0xe0 = adc r7, r2, r12, rrx 0x60,0x88,0xa1,0xe0 = adc r8, r1, r0, ror #16 0x0e,0x00,0x5d,0xe1 = cmp sp, lr 0x28,0x00,0x51,0xe1 = cmp r1, r8, lsr #32 0x27,0x08,0x52,0xe1 = cmp r2, r7, lsr #16 0x06,0x00,0x53,0xe1 = cmp r3, r6 0x05,0x08,0x54,0xe1 = cmp r4, r5, lsl #16 0x44,0x00,0x55,0xe1 = cmp r5, r4, asr #32 0x43,0x08,0x56,0xe1 = cmp r6, r3, asr #16 0x62,0x00,0x57,0xe1 = cmp r7, r2, rrx 0x61,0x08,0x58,0xe1 = cmp r8, r1, ror #16 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-thumb-trustzone.s.cs010066400017500001750000000001241363402546700230750ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xff,0xf7,0x00,0x80 = smc #15 0x0c,0xbf = ite eq capstone-sys-0.11.0/capstone/suite/MC/ARM/arm-trustzone.s.cs010066400017500001750000000001361363402546700217630ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x7f,0x00,0x60,0xe1 = smc #15 0x70,0x00,0x60,0x01 = smceq #0 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm_addrmode2.s.cs010066400017500001750000000012101363402546700216230ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x02,0x10,0xb0,0xe6 = ldrt r1, [r0], r2 0xa2,0x11,0xb0,0xe6 = ldrt r1, [r0], r2, lsr #3 0x04,0x10,0xb0,0xe4 = ldrt r1, [r0], #4 0x02,0x10,0xf0,0xe6 = ldrbt r1, [r0], r2 0xa2,0x11,0xf0,0xe6 = ldrbt r1, [r0], r2, lsr #3 0x04,0x10,0xf0,0xe4 = ldrbt r1, [r0], #4 0x02,0x10,0xa0,0xe6 = strt r1, [r0], r2 0xa2,0x11,0xa0,0xe6 = strt r1, [r0], r2, lsr #3 0x04,0x10,0xa0,0xe4 = strt r1, [r0], #4 0x02,0x10,0xe0,0xe6 = strbt r1, [r0], r2 0xa2,0x11,0xe0,0xe6 = strbt r1, [r0], r2, lsr #3 0x04,0x10,0xe0,0xe4 = strbt r1, [r0], #4 0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]! 0xa2,0x11,0xf0,0xe7 = ldrb r1, [r0, r2, lsr #3]! capstone-sys-0.11.0/capstone/suite/MC/ARM/arm_addrmode3.s.cs010066400017500001750000000005551363402546700216370ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xd2,0x10,0xb0,0xe0 = ldrsbt r1, [r0], r2 0xd4,0x10,0xf0,0xe0 = ldrsbt r1, [r0], #4 0xf2,0x10,0xb0,0xe0 = ldrsht r1, [r0], r2 0xf4,0x10,0xf0,0xe0 = ldrsht r1, [r0], #4 0xb2,0x10,0xb0,0xe0 = ldrht r1, [r0], r2 0xb4,0x10,0xf0,0xe0 = ldrht r1, [r0], #4 0xb2,0x10,0xa0,0xe0 = strht r1, [r0], r2 0xb4,0x10,0xe0,0xe0 = strht r1, [r0], #4 capstone-sys-0.11.0/capstone/suite/MC/ARM/arm_instructions.s.cs010066400017500001750000000016721363402546700225420ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x1e,0xff,0x2f,0xe1 = bx lr 0xa0,0x0d,0xe1,0xf2 = vqdmull.s32 q8, d17, d16 0x03,0x10,0x02,0xe0 = and r1, r2, r3 0x03,0x10,0x12,0xe0 = ands r1, r2, r3 0x03,0x10,0x22,0xe0 = eor r1, r2, r3 0x03,0x10,0x32,0xe0 = eors r1, r2, r3 0x03,0x10,0x42,0xe0 = sub r1, r2, r3 0x03,0x10,0x52,0xe0 = subs r1, r2, r3 0x03,0x10,0x82,0xe0 = add r1, r2, r3 0x03,0x10,0x92,0xe0 = adds r1, r2, r3 0x03,0x10,0xa2,0xe0 = adc r1, r2, r3 0x03,0x10,0xc2,0xe1 = bic r1, r2, r3 0x03,0x10,0xd2,0xe1 = bics r1, r2, r3 0x02,0x10,0xa0,0xe1 = mov r1, r2 0x02,0x10,0xe0,0xe1 = mvn r1, r2 0x02,0x10,0xf0,0xe1 = mvns r1, r2 0x90,0x02,0xcb,0xe7 = bfi r0, r0, #5, #7 0x7a,0x00,0x20,0xe1 = bkpt #10 0x81,0x17,0x11,0xee = cdp p7, #1, c1, c1, c1, #4 0x81,0x17,0x11,0xfe = cdp2 p7, #1, c1, c1, c1, #4 0x13,0x14,0x82,0xe0 = add r1, r2, r3, lsl r4 0x30,0x0f,0xa6,0xe6 = ssat16 r0, #7, r0 0x00,0x00,0x0a,0xf1 = cpsie none, #0 0xb0,0x30,0x42,0xe1 = strh r3, [r2, #-0] capstone-sys-0.11.0/capstone/suite/MC/ARM/basic-arm-instructions-v8.s.cs010066400017500001750000000005021363402546700240610ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None 0x59,0xf0,0x7f,0xf5 = dmb ishld 0x51,0xf0,0x7f,0xf5 = dmb oshld 0x55,0xf0,0x7f,0xf5 = dmb nshld 0x5d,0xf0,0x7f,0xf5 = dmb ld 0x49,0xf0,0x7f,0xf5 = dsb ishld 0x41,0xf0,0x7f,0xf5 = dsb oshld 0x45,0xf0,0x7f,0xf5 = dsb nshld 0x4d,0xf0,0x7f,0xf5 = dsb ld 0x05,0xf0,0x20,0xe3 = sevl capstone-sys-0.11.0/capstone/suite/MC/ARM/basic-arm-instructions.s.cs010066400017500001750000001201111363402546700235250ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x0f,0x10,0xa2,0xe2 = adc r1, r2, #15 0xf0,0x10,0xa2,0xe2 = adc r1, r2, #240 0x0f,0x1c,0xa2,0xe2 = adc r1, r2, #3840 0x0f,0x1a,0xa2,0xe2 = adc r1, r2, #61440 0x0f,0x18,0xa2,0xe2 = adc r1, r2, #983040 0x0f,0x16,0xa2,0xe2 = adc r1, r2, #15728640 0x0f,0x14,0xa2,0xe2 = adc r1, r2, #251658240 0x0f,0x12,0xa2,0xe2 = adc r1, r2, #4026531840 0xff,0x12,0xa2,0xe2 = adc r1, r2, #4026531855 0x0f,0x1c,0xb2,0xe2 = adcs r1, r2, #3840 0x0f,0x1c,0xb2,0x02 = adcseq r1, r2, #3840 0x0f,0x1c,0xa2,0x02 = adceq r1, r2, #3840 0x06,0x40,0xa5,0xe0 = adc r4, r5, r6 0x86,0x40,0xa5,0xe0 = adc r4, r5, r6, lsl #1 0x86,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsl #31 0xa6,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #1 0xa6,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsr #31 0x26,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #32 0xc6,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #1 0xc6,0x4f,0xa5,0xe0 = adc r4, r5, r6, asr #31 0x46,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #32 0xe6,0x40,0xa5,0xe0 = adc r4, r5, r6, ror #1 0xe6,0x4f,0xa5,0xe0 = adc r4, r5, r6, ror #31 0x18,0x69,0xa7,0xe0 = adc r6, r7, r8, lsl r9 0x38,0x69,0xa7,0xe0 = adc r6, r7, r8, lsr r9 0x58,0x69,0xa7,0xe0 = adc r6, r7, r8, asr r9 0x78,0x69,0xa7,0xe0 = adc r6, r7, r8, ror r9 0x66,0x40,0xa5,0xe0 = adc r4, r5, r6, rrx 0x06,0x50,0xa5,0xe0 = adc r5, r5, r6 0x85,0x40,0xa4,0xe0 = adc r4, r4, r5, lsl #1 0x85,0x4f,0xa4,0xe0 = adc r4, r4, r5, lsl #31 0xa5,0x40,0xa4,0xe0 = adc r4, r4, r5, lsr #1 0xa5,0x4f,0xa4,0xe0 = adc r4, r4, r5, lsr #31 0x25,0x40,0xa4,0xe0 = adc r4, r4, r5, lsr #32 0xc5,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #1 0xc5,0x4f,0xa4,0xe0 = adc r4, r4, r5, asr #31 0x45,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #32 0xe5,0x40,0xa4,0xe0 = adc r4, r4, r5, ror #1 0xe5,0x4f,0xa4,0xe0 = adc r4, r4, r5, ror #31 0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx 0x17,0x69,0xa6,0xe0 = adc r6, r6, r7, lsl r9 0x37,0x69,0xa6,0xe0 = adc r6, r6, r7, lsr r9 0x57,0x69,0xa6,0xe0 = adc r6, r6, r7, asr r9 0x77,0x69,0xa6,0xe0 = adc r6, r6, r7, ror r9 0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx 0x0f,0x4a,0x85,0xe2 = add r4, r5, #61440 0x06,0x40,0x85,0xe0 = add r4, r5, r6 0x86,0x42,0x85,0xe0 = add r4, r5, r6, lsl #5 0xa6,0x42,0x85,0xe0 = add r4, r5, r6, lsr #5 0xa6,0x42,0x85,0xe0 = add r4, r5, r6, lsr #5 0xc6,0x42,0x85,0xe0 = add r4, r5, r6, asr #5 0xe6,0x42,0x85,0xe0 = add r4, r5, r6, ror #5 0x18,0x69,0x87,0xe0 = add r6, r7, r8, lsl r9 0x13,0x49,0x84,0xe0 = add r4, r4, r3, lsl r9 0x38,0x69,0x87,0xe0 = add r6, r7, r8, lsr r9 0x58,0x69,0x87,0xe0 = add r6, r7, r8, asr r9 0x78,0x69,0x87,0xe0 = add r6, r7, r8, ror r9 0x66,0x40,0x85,0xe0 = add r4, r5, r6, rrx 0x0f,0x5a,0x85,0xe2 = add r5, r5, #61440 0x05,0x40,0x84,0xe0 = add r4, r4, r5 0x85,0x42,0x84,0xe0 = add r4, r4, r5, lsl #5 0xa5,0x42,0x84,0xe0 = add r4, r4, r5, lsr #5 0xa5,0x42,0x84,0xe0 = add r4, r4, r5, lsr #5 0xc5,0x42,0x84,0xe0 = add r4, r4, r5, asr #5 0xe5,0x42,0x84,0xe0 = add r4, r4, r5, ror #5 0x17,0x69,0x86,0xe0 = add r6, r6, r7, lsl r9 0x37,0x69,0x86,0xe0 = add r6, r6, r7, lsr r9 0x57,0x69,0x86,0xe0 = add r6, r6, r7, asr r9 0x77,0x69,0x86,0xe0 = add r6, r6, r7, ror r9 0x65,0x40,0x84,0xe0 = add r4, r4, r5, rrx 0x04,0x00,0x40,0xe2 = sub r0, r0, #4 0x15,0x40,0x45,0xe2 = sub r4, r5, #21 0x22,0x30,0x81,0xe0 = add r3, r1, r2, lsr #32 0x42,0x30,0x81,0xe0 = add r3, r1, r2, asr #32 0x0f,0xa0,0x01,0xe2 = and r10, r1, #15 0x06,0xa0,0x01,0xe0 = and r10, r1, r6 0x06,0xa5,0x01,0xe0 = and r10, r1, r6, lsl #10 0x26,0xa5,0x01,0xe0 = and r10, r1, r6, lsr #10 0x26,0xa5,0x01,0xe0 = and r10, r1, r6, lsr #10 0x46,0xa5,0x01,0xe0 = and r10, r1, r6, asr #10 0x66,0xa5,0x01,0xe0 = and r10, r1, r6, ror #10 0x18,0x62,0x07,0xe0 = and r6, r7, r8, lsl r2 0x38,0x62,0x07,0xe0 = and r6, r7, r8, lsr r2 0x58,0x62,0x07,0xe0 = and r6, r7, r8, asr r2 0x78,0x62,0x07,0xe0 = and r6, r7, r8, ror r2 0x66,0xa0,0x01,0xe0 = and r10, r1, r6, rrx 0x02,0x21,0xc3,0xe3 = bic r2, r3, #-2147483648 0x0f,0x10,0x01,0xe2 = and r1, r1, #15 0x01,0xa0,0x0a,0xe0 = and r10, r10, r1 0x01,0xa5,0x0a,0xe0 = and r10, r10, r1, lsl #10 0x21,0xa5,0x0a,0xe0 = and r10, r10, r1, lsr #10 0x21,0xa5,0x0a,0xe0 = and r10, r10, r1, lsr #10 0x41,0xa5,0x0a,0xe0 = and r10, r10, r1, asr #10 0x61,0xa5,0x0a,0xe0 = and r10, r10, r1, ror #10 0x17,0x62,0x06,0xe0 = and r6, r6, r7, lsl r2 0x37,0x62,0x06,0xe0 = and r6, r6, r7, lsr r2 0x57,0x62,0x06,0xe0 = and r6, r6, r7, asr r2 0x77,0x62,0x06,0xe0 = and r6, r6, r7, ror r2 0x61,0xa0,0x0a,0xe0 = and r10, r10, r1, rrx 0x22,0x30,0x01,0xe0 = and r3, r1, r2, lsr #32 0x42,0x30,0x01,0xe0 = and r3, r1, r2, asr #32 0x44,0x20,0xa0,0xe1 = asr r2, r4, #32 0x44,0x21,0xa0,0xe1 = asr r2, r4, #2 0x04,0x20,0xa0,0xe1 = mov r2, r4 0x44,0x41,0xa0,0xe1 = asr r4, r4, #2 0x9f,0x51,0xd3,0xe7 = bfc r5, #3, #17 0x9f,0x51,0xd3,0x37 = bfclo r5, #3, #17 0x92,0x51,0xd3,0xe7 = bfi r5, r2, #3, #17 0x92,0x51,0xd3,0x17 = bfine r5, r2, #3, #17 0x0f,0xa0,0xc1,0xe3 = bic r10, r1, #15 0x06,0xa0,0xc1,0xe1 = bic r10, r1, r6 0x06,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsl #10 0x26,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsr #10 0x26,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsr #10 0x46,0xa5,0xc1,0xe1 = bic r10, r1, r6, asr #10 0x66,0xa5,0xc1,0xe1 = bic r10, r1, r6, ror #10 0x18,0x62,0xc7,0xe1 = bic r6, r7, r8, lsl r2 0x38,0x62,0xc7,0xe1 = bic r6, r7, r8, lsr r2 0x58,0x62,0xc7,0xe1 = bic r6, r7, r8, asr r2 0x78,0x62,0xc7,0xe1 = bic r6, r7, r8, ror r2 0x66,0xa0,0xc1,0xe1 = bic r10, r1, r6, rrx 0x0f,0x10,0xc1,0xe3 = bic r1, r1, #15 0x01,0xa0,0xca,0xe1 = bic r10, r10, r1 0x01,0xa5,0xca,0xe1 = bic r10, r10, r1, lsl #10 0x21,0xa5,0xca,0xe1 = bic r10, r10, r1, lsr #10 0x21,0xa5,0xca,0xe1 = bic r10, r10, r1, lsr #10 0x41,0xa5,0xca,0xe1 = bic r10, r10, r1, asr #10 0x61,0xa5,0xca,0xe1 = bic r10, r10, r1, ror #10 0x17,0x62,0xc6,0xe1 = bic r6, r6, r7, lsl r2 0x37,0x62,0xc6,0xe1 = bic r6, r6, r7, lsr r2 0x57,0x62,0xc6,0xe1 = bic r6, r6, r7, asr r2 0x77,0x62,0xc6,0xe1 = bic r6, r6, r7, ror r2 0x61,0xa0,0xca,0xe1 = bic r10, r10, r1, rrx 0x22,0x30,0xc1,0xe1 = bic r3, r1, r2, lsr #32 0x42,0x30,0xc1,0xe1 = bic r3, r1, r2, asr #32 0x7a,0x00,0x20,0xe1 = bkpt #10 0x7f,0xff,0x2f,0xe1 = bkpt #65535 0x27,0x3b,0x6d,0x9b = blls #28634268 0xa0,0xb0,0x7b,0xfa = blx #32424576 0x50,0xd8,0x3d,0xfa = blx #16212288 0x32,0xff,0x2f,0xe1 = blx r2 0x32,0xff,0x2f,0x11 = blxne r2 0x12,0xff,0x2f,0xe1 = bx r2 0x12,0xff,0x2f,0x11 = bxne r2 0x22,0xff,0x2f,0xe1 = bxj r2 0x22,0xff,0x2f,0x11 = bxjne r2 0x81,0x17,0x11,0xee = cdp p7, #1, c1, c1, c1, #4 0x81,0x17,0x11,0xfe = cdp2 p7, #1, c1, c1, c1, #4 0xe0,0x6c,0x0c,0xfe = cdp2 p12, #0, c6, c12, c0, #7 0x81,0x17,0x11,0x1e = cdpne p7, #1, c1, c1, c1, #4 0x1f,0xf0,0x7f,0xf5 = clrex 0x12,0x1f,0x6f,0xe1 = clz r1, r2 0x12,0x1f,0x6f,0x01 = clzeq r1, r2 0x0f,0x00,0x71,0xe3 = cmn r1, #15 0x06,0x00,0x71,0xe1 = cmn r1, r6 0x06,0x05,0x71,0xe1 = cmn r1, r6, lsl #10 0x26,0x05,0x71,0xe1 = cmn r1, r6, lsr #10 0x26,0x05,0x7d,0xe1 = cmn sp, r6, lsr #10 0x46,0x05,0x71,0xe1 = cmn r1, r6, asr #10 0x66,0x05,0x71,0xe1 = cmn r1, r6, ror #10 0x18,0x02,0x77,0xe1 = cmn r7, r8, lsl r2 0x38,0x02,0x7d,0xe1 = cmn sp, r8, lsr r2 0x58,0x02,0x77,0xe1 = cmn r7, r8, asr r2 0x78,0x02,0x77,0xe1 = cmn r7, r8, ror r2 0x66,0x00,0x71,0xe1 = cmn r1, r6, rrx 0x0f,0x00,0x51,0xe3 = cmp r1, #15 0x06,0x00,0x51,0xe1 = cmp r1, r6 0x06,0x05,0x51,0xe1 = cmp r1, r6, lsl #10 0x26,0x05,0x51,0xe1 = cmp r1, r6, lsr #10 0x26,0x05,0x5d,0xe1 = cmp sp, r6, lsr #10 0x46,0x05,0x51,0xe1 = cmp r1, r6, asr #10 0x66,0x05,0x51,0xe1 = cmp r1, r6, ror #10 0x18,0x02,0x57,0xe1 = cmp r7, r8, lsl r2 0x38,0x02,0x5d,0xe1 = cmp sp, r8, lsr r2 0x58,0x02,0x57,0xe1 = cmp r7, r8, asr r2 0x78,0x02,0x57,0xe1 = cmp r7, r8, ror r2 0x66,0x00,0x51,0xe1 = cmp r1, r6, rrx 0x02,0x00,0x70,0xe3 = cmn r0, #2 0x00,0x00,0x5e,0xe3 = cmp lr, #0 0xc0,0x01,0x08,0xf1 = cpsie aif 0x0f,0x00,0x02,0xf1 = cps #15 0xca,0x00,0x0e,0xf1 = cpsid if, #10 0xf0,0xf0,0x20,0xe3 = dbg #0 0xf5,0xf0,0x20,0xe3 = dbg #5 0xff,0xf0,0x20,0xe3 = dbg #15 0x5f,0xf0,0x7f,0xf5 = dmb sy 0x5e,0xf0,0x7f,0xf5 = dmb st 0x5d,0xf0,0x7f,0xf5 = dmb #0xd 0x5c,0xf0,0x7f,0xf5 = dmb #0xc 0x5b,0xf0,0x7f,0xf5 = dmb ish 0x5a,0xf0,0x7f,0xf5 = dmb ishst 0x59,0xf0,0x7f,0xf5 = dmb #0x9 0x58,0xf0,0x7f,0xf5 = dmb #0x8 0x57,0xf0,0x7f,0xf5 = dmb nsh 0x56,0xf0,0x7f,0xf5 = dmb nshst 0x55,0xf0,0x7f,0xf5 = dmb #0x5 0x54,0xf0,0x7f,0xf5 = dmb #0x4 0x53,0xf0,0x7f,0xf5 = dmb osh 0x52,0xf0,0x7f,0xf5 = dmb oshst 0x51,0xf0,0x7f,0xf5 = dmb #0x1 0x50,0xf0,0x7f,0xf5 = dmb #0x0 0x5f,0xf0,0x7f,0xf5 = dmb sy 0x5e,0xf0,0x7f,0xf5 = dmb st 0x5b,0xf0,0x7f,0xf5 = dmb ish 0x5b,0xf0,0x7f,0xf5 = dmb ish 0x5a,0xf0,0x7f,0xf5 = dmb ishst 0x5a,0xf0,0x7f,0xf5 = dmb ishst 0x57,0xf0,0x7f,0xf5 = dmb nsh 0x57,0xf0,0x7f,0xf5 = dmb nsh 0x56,0xf0,0x7f,0xf5 = dmb nshst 0x56,0xf0,0x7f,0xf5 = dmb nshst 0x53,0xf0,0x7f,0xf5 = dmb osh 0x52,0xf0,0x7f,0xf5 = dmb oshst 0x5f,0xf0,0x7f,0xf5 = dmb sy 0x4f,0xf0,0x7f,0xf5 = dsb sy 0x4e,0xf0,0x7f,0xf5 = dsb st 0x4d,0xf0,0x7f,0xf5 = dsb #0xd 0x4c,0xf0,0x7f,0xf5 = dsb #0xc 0x4b,0xf0,0x7f,0xf5 = dsb ish 0x4a,0xf0,0x7f,0xf5 = dsb ishst 0x49,0xf0,0x7f,0xf5 = dsb #0x9 0x48,0xf0,0x7f,0xf5 = dsb #0x8 0x47,0xf0,0x7f,0xf5 = dsb nsh 0x46,0xf0,0x7f,0xf5 = dsb nshst 0x45,0xf0,0x7f,0xf5 = dsb #0x5 0x44,0xf0,0x7f,0xf5 = dsb #0x4 0x43,0xf0,0x7f,0xf5 = dsb osh 0x42,0xf0,0x7f,0xf5 = dsb oshst 0x41,0xf0,0x7f,0xf5 = dsb #0x1 0x40,0xf0,0x7f,0xf5 = dsb #0x0 0x48,0xf0,0x7f,0xf5 = dsb #0x8 0x47,0xf0,0x7f,0xf5 = dsb nsh 0x4f,0xf0,0x7f,0xf5 = dsb sy 0x4e,0xf0,0x7f,0xf5 = dsb st 0x4b,0xf0,0x7f,0xf5 = dsb ish 0x4b,0xf0,0x7f,0xf5 = dsb ish 0x4a,0xf0,0x7f,0xf5 = dsb ishst 0x4a,0xf0,0x7f,0xf5 = dsb ishst 0x47,0xf0,0x7f,0xf5 = dsb nsh 0x47,0xf0,0x7f,0xf5 = dsb nsh 0x46,0xf0,0x7f,0xf5 = dsb nshst 0x46,0xf0,0x7f,0xf5 = dsb nshst 0x43,0xf0,0x7f,0xf5 = dsb osh 0x42,0xf0,0x7f,0xf5 = dsb oshst 0x4f,0xf0,0x7f,0xf5 = dsb sy 0x4f,0xf0,0x7f,0xf5 = dsb sy 0x42,0xf0,0x7f,0xf5 = dsb oshst 0x0f,0x4a,0x25,0xe2 = eor r4, r5, #61440 0x06,0x40,0x25,0xe0 = eor r4, r5, r6 0x86,0x42,0x25,0xe0 = eor r4, r5, r6, lsl #5 0xa6,0x42,0x25,0xe0 = eor r4, r5, r6, lsr #5 0xa6,0x42,0x25,0xe0 = eor r4, r5, r6, lsr #5 0xc6,0x42,0x25,0xe0 = eor r4, r5, r6, asr #5 0xe6,0x42,0x25,0xe0 = eor r4, r5, r6, ror #5 0x18,0x69,0x27,0xe0 = eor r6, r7, r8, lsl r9 0x38,0x69,0x27,0xe0 = eor r6, r7, r8, lsr r9 0x58,0x69,0x27,0xe0 = eor r6, r7, r8, asr r9 0x78,0x69,0x27,0xe0 = eor r6, r7, r8, ror r9 0x66,0x40,0x25,0xe0 = eor r4, r5, r6, rrx 0x0f,0x5a,0x25,0xe2 = eor r5, r5, #61440 0x05,0x40,0x24,0xe0 = eor r4, r4, r5 0x85,0x42,0x24,0xe0 = eor r4, r4, r5, lsl #5 0xa5,0x42,0x24,0xe0 = eor r4, r4, r5, lsr #5 0xa5,0x42,0x24,0xe0 = eor r4, r4, r5, lsr #5 0xc5,0x42,0x24,0xe0 = eor r4, r4, r5, asr #5 0xe5,0x42,0x24,0xe0 = eor r4, r4, r5, ror #5 0x17,0x69,0x26,0xe0 = eor r6, r6, r7, lsl r9 0x37,0x69,0x26,0xe0 = eor r6, r6, r7, lsr r9 0x57,0x69,0x26,0xe0 = eor r6, r6, r7, asr r9 0x77,0x69,0x26,0xe0 = eor r6, r6, r7, ror r9 0x65,0x40,0x24,0xe0 = eor r4, r4, r5, rrx 0x22,0x30,0x21,0xe0 = eor r3, r1, r2, lsr #32 0x42,0x30,0x21,0xe0 = eor r3, r1, r2, asr #32 0x6f,0xf0,0x7f,0xf5 = isb sy 0x6f,0xf0,0x7f,0xf5 = isb sy 0x6f,0xf0,0x7f,0xf5 = isb sy 0x61,0xf0,0x7f,0xf5 = isb #0x1 0x01,0x80,0x91,0xfd = ldc2 p0, c8, [r1, #4] 0x00,0x71,0x92,0xfd = ldc2 p1, c7, [r2] 0x38,0x62,0x13,0xfd = ldc2 p2, c6, [r3, #-224] 0x1e,0x53,0x34,0xfd = ldc2 p3, c5, [r4, #-120]! 0x04,0x44,0xb5,0xfc = ldc2 p4, c4, [r5], #16 0x12,0x35,0x36,0xfc = ldc2 p5, c3, [r6], #-72 0x01,0x26,0xd7,0xfd = ldc2l p6, c2, [r7, #4] 0x00,0x17,0xd8,0xfd = ldc2l p7, c1, [r8] 0x38,0x08,0x59,0xfd = ldc2l p8, c0, [r9, #-224] 0x1e,0x19,0x7a,0xfd = ldc2l p9, c1, [r10, #-120]! 0x04,0x20,0xfb,0xfc = ldc2l p0, c2, [r11], #16 0x12,0x31,0x7c,0xfc = ldc2l p1, c3, [r12], #-72 0x01,0x4c,0x90,0xed = ldc p12, c4, [r0, #4] 0x00,0x5d,0x91,0xed = ldc p13, c5, [r1] 0x38,0x6e,0x12,0xed = ldc p14, c6, [r2, #-224] 0x1e,0x7f,0x33,0xed = ldc p15, c7, [r3, #-120]! 0x04,0x85,0xb4,0xec = ldc p5, c8, [r4], #16 0x12,0x94,0x35,0xec = ldc p4, c9, [r5], #-72 0x01,0xa3,0xd6,0xed = ldcl p3, c10, [r6, #4] 0x00,0xb2,0xd7,0xed = ldcl p2, c11, [r7] 0x38,0xc1,0x58,0xed = ldcl p1, c12, [r8, #-224] 0x1e,0xd0,0x79,0xed = ldcl p0, c13, [r9, #-120]! 0x04,0xe6,0xfa,0xec = ldcl p6, c14, [r10], #16 0x12,0xf7,0x7b,0xec = ldcl p7, c15, [r11], #-72 0x01,0x4c,0x90,0x3d = ldclo p12, c4, [r0, #4] 0x00,0x5d,0x91,0x8d = ldchi p13, c5, [r1] 0x38,0x6e,0x12,0x2d = ldchs p14, c6, [r2, #-224] 0x1e,0x7f,0x33,0x3d = ldclo p15, c7, [r3, #-120]! 0x04,0x85,0xb4,0x0c = ldceq p5, c8, [r4], #16 0x12,0x94,0x35,0xcc = ldcgt p4, c9, [r5], #-72 0x01,0xa3,0xd6,0xbd = ldcllt p3, c10, [r6, #4] 0x00,0xb2,0xd7,0xad = ldclge p2, c11, [r7] 0x38,0xc1,0x58,0xdd = ldclle p1, c12, [r8, #-224] 0x1e,0xd0,0x79,0x1d = ldclne p0, c13, [r9, #-120]! 0x04,0xe6,0xfa,0x0c = ldcleq p6, c14, [r10], #16 0x12,0xf7,0x7b,0x8c = ldclhi p7, c15, [r11], #-72 0x19,0x82,0x91,0xfc = ldc2 p2, c8, [r1], {25} 0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x92,0xe9 = ldmib r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x12,0xe8 = ldmda r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x12,0xe9 = ldmdb r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0xb2,0xe8 = ldm r2!, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0xb2,0xe9 = ldmib r2!, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x32,0xe8 = ldmda r2!, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x32,0xe9 = ldmdb r2!, {r1, r3, r4, r5, r6, sp} 0x05,0x40,0xd0,0xe8 = ldm r0, {r0, r2, lr} ^ 0x0f,0x80,0xfd,0xe8 = ldm sp!, {r0, r1, r2, r3, pc} ^ 0x9f,0x3f,0xd4,0xe1 = ldrexb r3, [r4] 0x9f,0x2f,0xf5,0xe1 = ldrexh r2, [r5] 0x9f,0x1f,0x97,0xe1 = ldrex r1, [r7] 0x9f,0x6f,0xb8,0xe1 = ldrexd r6, r7, [r8] 0xb0,0x80,0x7b,0x80 = ldrhthi r8, [r11], #-0 0xb0,0x80,0xfb,0x80 = ldrhthi r8, [r11], #0 0x84,0x2f,0xa0,0xe1 = lsl r2, r4, #31 0x84,0x20,0xa0,0xe1 = lsl r2, r4, #1 0x04,0x20,0xa0,0xe1 = mov r2, r4 0x84,0x40,0xa0,0xe1 = lsl r4, r4, #1 0x24,0x20,0xa0,0xe1 = lsr r2, r4, #32 0x24,0x21,0xa0,0xe1 = lsr r2, r4, #2 0x04,0x20,0xa0,0xe1 = mov r2, r4 0x24,0x41,0xa0,0xe1 = lsr r4, r4, #2 0x91,0x57,0x21,0xee = mcr p7, #1, r5, c1, c1, #4 0x91,0x57,0x21,0xfe = mcr2 p7, #1, r5, c1, c1, #4 0x91,0x57,0x21,0x9e = mcrls p7, #1, r5, c1, c1, #4 0xf1,0x57,0x44,0xec = mcrr p7, #15, r5, r4, c1 0xf1,0x57,0x44,0xfc = mcrr2 p7, #15, r5, r4, c1 0xf1,0x57,0x44,0xcc = mcrrgt p7, #15, r5, r4, c1 0x92,0x43,0x21,0xe0 = mla r1, r2, r3, r4 0x92,0x43,0x31,0xe0 = mlas r1, r2, r3, r4 0x92,0x43,0x21,0x10 = mlane r1, r2, r3, r4 0x92,0x43,0x31,0x10 = mlasne r1, r2, r3, r4 0x95,0x36,0x62,0xe0 = mls r2, r5, r6, r3 0x95,0x36,0x62,0x10 = mlsne r2, r5, r6, r3 0x07,0x30,0xa0,0xe3 = mov r3, #7 0xff,0x4e,0xa0,0xe3 = mov r4, #4080 0xff,0x58,0xa0,0xe3 = mov r5, #16711680 0xff,0x6f,0x0f,0xe3 = movw r6, #65535 0xff,0x9f,0x0f,0xe3 = movw r9, #65535 0x07,0x30,0xb0,0xe3 = movs r3, #7 0xff,0x4e,0xa0,0x03 = moveq r4, #4080 0xff,0x58,0xb0,0x03 = movseq r5, #16711680 0x03,0x20,0xa0,0xe1 = mov r2, r3 0x03,0x20,0xb0,0xe1 = movs r2, r3 0x03,0x20,0xa0,0x01 = moveq r2, r3 0x03,0x20,0xb0,0x01 = movseq r2, r3 0x08,0xc0,0xa0,0xe1 = mov r12, r8 0x03,0x20,0xa0,0xe1 = mov r2, r3 0x08,0xc0,0xa0,0xe1 = mov r12, r8 0x03,0x20,0xa0,0xe1 = mov r2, r3 0x08,0xc0,0xa0,0xe1 = mov r12, r8 0x03,0x20,0xa0,0xe1 = mov r2, r3 0x08,0xc0,0xa0,0xe1 = mov r12, r8 0x03,0x20,0xa0,0xe1 = mov r2, r3 0x07,0x30,0x40,0xe3 = movt r3, #7 0xff,0x6f,0x4f,0xe3 = movt r6, #65535 0xf0,0x4f,0x40,0x03 = movteq r4, #4080 0x92,0x1e,0x11,0xee = mrc p14, #0, r1, c1, c2, #4 0xd6,0xff,0xff,0xee = mrc p15, #7, apsr_nzcv, c15, c6, #6 0x92,0x1e,0x11,0xfe = mrc2 p14, #0, r1, c1, c2, #4 0x30,0xf9,0xff,0xfe = mrc2 p9, #7, apsr_nzcv, c15, c0, #1 0xd6,0xff,0xff,0x0e = mrceq p15, #7, apsr_nzcv, c15, c6, #6 0x11,0x57,0x54,0xec = mrrc p7, #1, r5, r4, c1 0x11,0x57,0x54,0xfc = mrrc2 p7, #1, r5, r4, c1 0x11,0x57,0x54,0x3c = mrrclo p7, #1, r5, r4, c1 0x00,0x80,0x0f,0xe1 = mrs r8, apsr 0x00,0x80,0x0f,0xe1 = mrs r8, apsr 0x00,0x80,0x4f,0xe1 = mrs r8, spsr 0x05,0xf0,0x28,0xe3 = msr APSR_nzcvq, #5 0x05,0xf0,0x24,0xe3 = msr APSR_g, #5 0x05,0xf0,0x28,0xe3 = msr APSR_nzcvq, #5 0x05,0xf0,0x28,0xe3 = msr APSR_nzcvq, #5 0x05,0xf0,0x2c,0xe3 = msr APSR_nzcvqg, #5 0x05,0xf0,0x29,0xe3 = msr CPSR_fc, #5 0x05,0xf0,0x21,0xe3 = msr CPSR_c, #5 0x05,0xf0,0x22,0xe3 = msr CPSR_x, #5 0x05,0xf0,0x29,0xe3 = msr CPSR_fc, #5 0x05,0xf0,0x29,0xe3 = msr CPSR_fc, #5 0x05,0xf0,0x2e,0xe3 = msr CPSR_fsx, #5 0x05,0xf0,0x69,0xe3 = msr SPSR_fc, #5 0x05,0xf0,0x6f,0xe3 = msr SPSR_fsxc, #5 0x05,0xf0,0x2f,0xe3 = msr CPSR_fsxc, #5 0x00,0xf0,0x28,0xe1 = msr APSR_nzcvq, r0 0x00,0xf0,0x24,0xe1 = msr APSR_g, r0 0x00,0xf0,0x28,0xe1 = msr APSR_nzcvq, r0 0x00,0xf0,0x28,0xe1 = msr APSR_nzcvq, r0 0x00,0xf0,0x2c,0xe1 = msr APSR_nzcvqg, r0 0x00,0xf0,0x29,0xe1 = msr CPSR_fc, r0 0x00,0xf0,0x21,0xe1 = msr CPSR_c, r0 0x00,0xf0,0x22,0xe1 = msr CPSR_x, r0 0x00,0xf0,0x29,0xe1 = msr CPSR_fc, r0 0x00,0xf0,0x29,0xe1 = msr CPSR_fc, r0 0x00,0xf0,0x2e,0xe1 = msr CPSR_fsx, r0 0x00,0xf0,0x69,0xe1 = msr SPSR_fc, r0 0x00,0xf0,0x6f,0xe1 = msr SPSR_fsxc, r0 0x00,0xf0,0x2f,0xe1 = msr CPSR_fsxc, r0 0x96,0x07,0x05,0xe0 = mul r5, r6, r7 0x96,0x07,0x15,0xe0 = muls r5, r6, r7 0x96,0x07,0x05,0xc0 = mulgt r5, r6, r7 0x96,0x07,0x15,0xd0 = mulsle r5, r6, r7 0x07,0x30,0xe0,0xe3 = mvn r3, #7 0xff,0x4e,0xe0,0xe3 = mvn r4, #4080 0xff,0x58,0xe0,0xe3 = mvn r5, #16711680 0x07,0x30,0xf0,0xe3 = mvns r3, #7 0xff,0x4e,0xe0,0x03 = mvneq r4, #4080 0xff,0x58,0xf0,0x03 = mvnseq r5, #16711680 0x03,0x20,0xe0,0xe1 = mvn r2, r3 0x03,0x20,0xf0,0xe1 = mvns r2, r3 0x86,0x59,0xe0,0xe1 = mvn r5, r6, lsl #19 0xa6,0x54,0xe0,0xe1 = mvn r5, r6, lsr #9 0x46,0x52,0xe0,0xe1 = mvn r5, r6, asr #4 0x66,0x53,0xe0,0xe1 = mvn r5, r6, ror #6 0x66,0x50,0xe0,0xe1 = mvn r5, r6, rrx 0x03,0x20,0xe0,0x01 = mvneq r2, r3 0x03,0x25,0xf0,0x01 = mvnseq r2, r3, lsl #10 0x16,0x57,0xe0,0xe1 = mvn r5, r6, lsl r7 0x36,0x57,0xf0,0xe1 = mvns r5, r6, lsr r7 0x56,0x57,0xe0,0xc1 = mvngt r5, r6, asr r7 0x76,0x57,0xf0,0xb1 = mvnslt r5, r6, ror r7 0x00,0x50,0x68,0xe2 = rsb r5, r8, #0 0x00,0xf0,0x20,0xe3 = nop 0x00,0xf0,0x20,0xe3 = nop 0x00,0xf0,0x20,0xc3 = nopgt 0x0f,0x4a,0x85,0xe3 = orr r4, r5, #61440 0x06,0x40,0x85,0xe1 = orr r4, r5, r6 0x86,0x42,0x85,0xe1 = orr r4, r5, r6, lsl #5 0xa6,0x42,0x85,0xe1 = orr r4, r5, r6, lsr #5 0xa6,0x42,0x85,0xe1 = orr r4, r5, r6, lsr #5 0xc6,0x42,0x85,0xe1 = orr r4, r5, r6, asr #5 0xe6,0x42,0x85,0xe1 = orr r4, r5, r6, ror #5 0x18,0x69,0x87,0xe1 = orr r6, r7, r8, lsl r9 0x38,0x69,0x87,0xe1 = orr r6, r7, r8, lsr r9 0x58,0x69,0x87,0xe1 = orr r6, r7, r8, asr r9 0x78,0x69,0x87,0xe1 = orr r6, r7, r8, ror r9 0x66,0x40,0x85,0xe1 = orr r4, r5, r6, rrx 0x0f,0x5a,0x85,0xe3 = orr r5, r5, #61440 0x05,0x40,0x84,0xe1 = orr r4, r4, r5 0x85,0x42,0x84,0xe1 = orr r4, r4, r5, lsl #5 0xa5,0x42,0x84,0xe1 = orr r4, r4, r5, lsr #5 0xa5,0x42,0x84,0xe1 = orr r4, r4, r5, lsr #5 0xc5,0x42,0x84,0xe1 = orr r4, r4, r5, asr #5 0xe5,0x42,0x84,0xe1 = orr r4, r4, r5, ror #5 0x17,0x69,0x86,0xe1 = orr r6, r6, r7, lsl r9 0x37,0x69,0x86,0xe1 = orr r6, r6, r7, lsr r9 0x57,0x69,0x86,0xe1 = orr r6, r6, r7, asr r9 0x77,0x69,0x86,0xe1 = orr r6, r6, r7, ror r9 0x65,0x40,0x84,0xe1 = orr r4, r4, r5, rrx 0x0f,0x4a,0x95,0x03 = orrseq r4, r5, #61440 0x06,0x40,0x85,0x11 = orrne r4, r5, r6 0x86,0x42,0x95,0x01 = orrseq r4, r5, r6, lsl #5 0x78,0x69,0x87,0x31 = orrlo r6, r7, r8, ror r9 0x66,0x40,0x95,0x81 = orrshi r4, r5, r6, rrx 0x0f,0x5a,0x85,0x23 = orrhs r5, r5, #61440 0x05,0x40,0x94,0x01 = orrseq r4, r4, r5 0x57,0x69,0x86,0x11 = orrne r6, r6, r7, asr r9 0x77,0x69,0x96,0xb1 = orrslt r6, r6, r7, ror r9 0x65,0x40,0x94,0xc1 = orrsgt r4, r4, r5, rrx 0x22,0x30,0x81,0xe1 = orr r3, r1, r2, lsr #32 0x42,0x30,0x81,0xe1 = orr r3, r1, r2, asr #32 0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3 0x93,0x2f,0x82,0xe6 = pkhbt r2, r2, r3, lsl #31 0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3 0x93,0x27,0x82,0xe6 = pkhbt r2, r2, r3, lsl #15 0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3 0xd3,0x2f,0x82,0xe6 = pkhtb r2, r2, r3, asr #31 0xd3,0x27,0x82,0xe6 = pkhtb r2, r2, r3, asr #15 0x04,0x70,0x9d,0xe4 = pop {r7} 0x80,0x07,0xbd,0xe8 = pop {r7, r8, r9, r10} 0x04,0x70,0x2d,0xe5 = push {r7} 0x80,0x07,0x2d,0xe9 = push {r7, r8, r9, r10} 0x52,0x10,0x03,0xe1 = qadd r1, r2, r3 0x52,0x10,0x03,0x11 = qaddne r1, r2, r3 0x13,0x1f,0x22,0xe6 = qadd16 r1, r2, r3 0x13,0x1f,0x22,0xc6 = qadd16gt r1, r2, r3 0x93,0x1f,0x22,0xe6 = qadd8 r1, r2, r3 0x93,0x1f,0x22,0xd6 = qadd8le r1, r2, r3 0x57,0x60,0x48,0xe1 = qdadd r6, r7, r8 0x57,0x60,0x48,0x81 = qdaddhi r6, r7, r8 0x57,0x60,0x68,0xe1 = qdsub r6, r7, r8 0x57,0x60,0x68,0x81 = qdsubhi r6, r7, r8 0x50,0x9f,0x2c,0xe6 = qsax r9, r12, r0 0x50,0x9f,0x2c,0x06 = qsaxeq r9, r12, r0 0x52,0x10,0x23,0xe1 = qsub r1, r2, r3 0x52,0x10,0x23,0x11 = qsubne r1, r2, r3 0x73,0x1f,0x22,0xe6 = qsub16 r1, r2, r3 0x73,0x1f,0x22,0xc6 = qsub16gt r1, r2, r3 0xf3,0x1f,0x22,0xe6 = qsub8 r1, r2, r3 0xf3,0x1f,0x22,0xd6 = qsub8le r1, r2, r3 0x32,0x1f,0xff,0xe6 = rbit r1, r2 0x32,0x1f,0xff,0x16 = rbitne r1, r2 0x39,0x1f,0xbf,0xe6 = rev r1, r9 0x35,0x1f,0xbf,0x16 = revne r1, r5 0xb3,0x8f,0xbf,0xe6 = rev16 r8, r3 0xb4,0xcf,0xbf,0x16 = rev16ne r12, r4 0xb9,0x4f,0xff,0xe6 = revsh r4, r9 0xb1,0x9f,0xff,0x16 = revshne r9, r1 0x00,0x0a,0x12,0xf8 = rfeda r2 0x00,0x0a,0x13,0xf9 = rfedb r3 0x00,0x0a,0x95,0xf8 = rfeia r5 0x00,0x0a,0x96,0xf9 = rfeib r6 0x00,0x0a,0x34,0xf8 = rfeda r4! 0x00,0x0a,0x37,0xf9 = rfedb r7! 0x00,0x0a,0xb9,0xf8 = rfeia r9! 0x00,0x0a,0xb8,0xf9 = rfeib r8! 0x00,0x0a,0x12,0xf8 = rfeda r2 0x00,0x0a,0x13,0xf9 = rfedb r3 0x00,0x0a,0x95,0xf8 = rfeia r5 0x00,0x0a,0x96,0xf9 = rfeib r6 0x00,0x0a,0x34,0xf8 = rfeda r4! 0x00,0x0a,0x37,0xf9 = rfedb r7! 0x00,0x0a,0xb9,0xf8 = rfeia r9! 0x00,0x0a,0xb8,0xf9 = rfeib r8! 0x00,0x0a,0x91,0xf8 = rfeia r1 0x00,0x0a,0xb1,0xf8 = rfeia r1! 0xe4,0x2f,0xa0,0xe1 = ror r2, r4, #31 0xe4,0x20,0xa0,0xe1 = ror r2, r4, #1 0x04,0x20,0xa0,0xe1 = mov r2, r4 0xe4,0x40,0xa0,0xe1 = ror r4, r4, #1 0x0f,0x4a,0x65,0xe2 = rsb r4, r5, #61440 0x06,0x40,0x65,0xe0 = rsb r4, r5, r6 0x86,0x42,0x65,0xe0 = rsb r4, r5, r6, lsl #5 0xa6,0x42,0x65,0x30 = rsblo r4, r5, r6, lsr #5 0xa6,0x42,0x65,0xe0 = rsb r4, r5, r6, lsr #5 0xc6,0x42,0x65,0xe0 = rsb r4, r5, r6, asr #5 0xe6,0x42,0x65,0xe0 = rsb r4, r5, r6, ror #5 0x18,0x69,0x67,0xe0 = rsb r6, r7, r8, lsl r9 0x38,0x69,0x67,0xe0 = rsb r6, r7, r8, lsr r9 0x58,0x69,0x67,0xe0 = rsb r6, r7, r8, asr r9 0x78,0x69,0x67,0xd0 = rsble r6, r7, r8, ror r9 0x66,0x40,0x65,0xe0 = rsb r4, r5, r6, rrx 0x0f,0x5a,0x65,0xe2 = rsb r5, r5, #61440 0x05,0x40,0x64,0xe0 = rsb r4, r4, r5 0x85,0x42,0x64,0xe0 = rsb r4, r4, r5, lsl #5 0xa5,0x42,0x64,0xe0 = rsb r4, r4, r5, lsr #5 0xa5,0x42,0x64,0x10 = rsbne r4, r4, r5, lsr #5 0xc5,0x42,0x64,0xe0 = rsb r4, r4, r5, asr #5 0xe5,0x42,0x64,0xe0 = rsb r4, r4, r5, ror #5 0x17,0x69,0x66,0xc0 = rsbgt r6, r6, r7, lsl r9 0x37,0x69,0x66,0xe0 = rsb r6, r6, r7, lsr r9 0x57,0x69,0x66,0xe0 = rsb r6, r6, r7, asr r9 0x77,0x69,0x66,0xe0 = rsb r6, r6, r7, ror r9 0x65,0x40,0x64,0xe0 = rsb r4, r4, r5, rrx 0x0f,0x4a,0xe5,0xe2 = rsc r4, r5, #61440 0x06,0x40,0xe5,0xe0 = rsc r4, r5, r6 0x86,0x42,0xe5,0xe0 = rsc r4, r5, r6, lsl #5 0xa6,0x42,0xe5,0x30 = rsclo r4, r5, r6, lsr #5 0xa6,0x42,0xe5,0xe0 = rsc r4, r5, r6, lsr #5 0xc6,0x42,0xe5,0xe0 = rsc r4, r5, r6, asr #5 0xe6,0x42,0xe5,0xe0 = rsc r4, r5, r6, ror #5 0x18,0x69,0xe7,0xe0 = rsc r6, r7, r8, lsl r9 0x38,0x69,0xe7,0xe0 = rsc r6, r7, r8, lsr r9 0x58,0x69,0xe7,0xe0 = rsc r6, r7, r8, asr r9 0x78,0x69,0xe7,0xd0 = rscle r6, r7, r8, ror r9 0xfe,0x1e,0xf8,0xe2 = rscs r1, r8, #4064 0x0f,0x5a,0xe5,0xe2 = rsc r5, r5, #61440 0x05,0x40,0xe4,0xe0 = rsc r4, r4, r5 0x85,0x42,0xe4,0xe0 = rsc r4, r4, r5, lsl #5 0xa5,0x42,0xe4,0xe0 = rsc r4, r4, r5, lsr #5 0xa5,0x42,0xe4,0x10 = rscne r4, r4, r5, lsr #5 0xc5,0x42,0xe4,0xe0 = rsc r4, r4, r5, asr #5 0xe5,0x42,0xe4,0xe0 = rsc r4, r4, r5, ror #5 0x17,0x69,0xe6,0xc0 = rscgt r6, r6, r7, lsl r9 0x37,0x69,0xe6,0xe0 = rsc r6, r6, r7, lsr r9 0x57,0x69,0xe6,0xe0 = rsc r6, r6, r7, asr r9 0x77,0x69,0xe6,0xe0 = rsc r6, r6, r7, ror r9 0x61,0x00,0xa0,0xe1 = rrx r0, r1 0x6f,0xd0,0xa0,0xe1 = rrx sp, pc 0x6e,0xf0,0xa0,0xe1 = rrx pc, lr 0x6d,0xe0,0xa0,0xe1 = rrx lr, sp 0x61,0x00,0xb0,0xe1 = rrxs r0, r1 0x6f,0xd0,0xb0,0xe1 = rrxs sp, pc 0x6e,0xf0,0xb0,0xe1 = rrxs pc, lr 0x6d,0xe0,0xb0,0xe1 = rrxs lr, sp 0x13,0x1f,0x12,0xe6 = sadd16 r1, r2, r3 0x13,0x1f,0x12,0xc6 = sadd16gt r1, r2, r3 0x93,0x1f,0x12,0xe6 = sadd8 r1, r2, r3 0x93,0x1f,0x12,0xd6 = sadd8le r1, r2, r3 0x30,0x9f,0x1c,0xe6 = sasx r9, r12, r0 0x30,0x9f,0x1c,0x06 = sasxeq r9, r12, r0 0x0f,0x4a,0xc5,0xe2 = sbc r4, r5, #61440 0x06,0x40,0xc5,0xe0 = sbc r4, r5, r6 0x86,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsl #5 0xa6,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsr #5 0xa6,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsr #5 0xc6,0x42,0xc5,0xe0 = sbc r4, r5, r6, asr #5 0xe6,0x42,0xc5,0xe0 = sbc r4, r5, r6, ror #5 0x18,0x69,0xc7,0xe0 = sbc r6, r7, r8, lsl r9 0x38,0x69,0xc7,0xe0 = sbc r6, r7, r8, lsr r9 0x58,0x69,0xc7,0xe0 = sbc r6, r7, r8, asr r9 0x78,0x69,0xc7,0xe0 = sbc r6, r7, r8, ror r9 0x0f,0x5a,0xc5,0xe2 = sbc r5, r5, #61440 0x05,0x40,0xc4,0xe0 = sbc r4, r4, r5 0x85,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsl #5 0xa5,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsr #5 0xa5,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsr #5 0xc5,0x42,0xc4,0xe0 = sbc r4, r4, r5, asr #5 0xe5,0x42,0xc4,0xe0 = sbc r4, r4, r5, ror #5 0x17,0x69,0xc6,0xe0 = sbc r6, r6, r7, lsl r9 0x37,0x69,0xc6,0xe0 = sbc r6, r6, r7, lsr r9 0x57,0x69,0xc6,0xe0 = sbc r6, r6, r7, asr r9 0x77,0x69,0xc6,0xe0 = sbc r6, r6, r7, ror r9 0x55,0x48,0xa0,0xe7 = sbfx r4, r5, #16, #1 0x55,0x48,0xaf,0xc7 = sbfxgt r4, r5, #16, #16 0xb1,0x9f,0x82,0xe6 = sel r9, r2, r1 0xb1,0x9f,0x82,0x16 = selne r9, r2, r1 0x00,0x02,0x01,0xf1 = setend be 0x00,0x02,0x01,0xf1 = setend be 0x00,0x00,0x01,0xf1 = setend le 0x00,0x00,0x01,0xf1 = setend le 0x04,0xf0,0x20,0xe3 = sev 0x04,0xf0,0x20,0x03 = seveq 0x12,0x4f,0x38,0xe6 = shadd16 r4, r8, r2 0x12,0x4f,0x38,0xc6 = shadd16gt r4, r8, r2 0x92,0x4f,0x38,0xe6 = shadd8 r4, r8, r2 0x92,0x4f,0x38,0xc6 = shadd8gt r4, r8, r2 0x32,0x4f,0x38,0xe6 = shasx r4, r8, r2 0x32,0x4f,0x38,0xc6 = shasxgt r4, r8, r2 0x72,0x4f,0x38,0xe6 = shsub16 r4, r8, r2 0x72,0x4f,0x38,0xc6 = shsub16gt r4, r8, r2 0xf2,0x4f,0x38,0xe6 = shsub8 r4, r8, r2 0xf2,0x4f,0x38,0xc6 = shsub8gt r4, r8, r2 0x81,0x09,0x03,0xe1 = smlabb r3, r1, r9, r0 0xc6,0x14,0x05,0xe1 = smlabt r5, r6, r4, r1 0xa2,0x23,0x04,0xe1 = smlatb r4, r2, r3, r2 0xe3,0x48,0x08,0xe1 = smlatt r8, r3, r8, r4 0x81,0x09,0x03,0xa1 = smlabbge r3, r1, r9, r0 0xc6,0x14,0x05,0xd1 = smlabtle r5, r6, r4, r1 0xa2,0x23,0x04,0x11 = smlatbne r4, r2, r3, r2 0xe3,0x48,0x08,0x01 = smlatteq r8, r3, r8, r4 0x13,0x85,0x02,0xe7 = smlad r2, r3, r5, r8 0x33,0x85,0x02,0xe7 = smladx r2, r3, r5, r8 0x13,0x85,0x02,0x07 = smladeq r2, r3, r5, r8 0x33,0x85,0x02,0x87 = smladxhi r2, r3, r5, r8 0x95,0x28,0xe3,0xe0 = smlal r2, r3, r5, r8 0x95,0x28,0xf3,0xe0 = smlals r2, r3, r5, r8 0x95,0x28,0xe3,0x00 = smlaleq r2, r3, r5, r8 0x95,0x28,0xf3,0x80 = smlalshi r2, r3, r5, r8 0x89,0x30,0x41,0xe1 = smlalbb r3, r1, r9, r0 0xc4,0x51,0x46,0xe1 = smlalbt r5, r6, r4, r1 0xa3,0x42,0x42,0xe1 = smlaltb r4, r2, r3, r2 0xe8,0x84,0x43,0xe1 = smlaltt r8, r3, r8, r4 0x89,0x30,0x41,0xa1 = smlalbbge r3, r1, r9, r0 0xc4,0x51,0x46,0xd1 = smlalbtle r5, r6, r4, r1 0xa3,0x42,0x42,0x11 = smlaltbne r4, r2, r3, r2 0xe8,0x84,0x43,0x01 = smlaltteq r8, r3, r8, r4 0x15,0x28,0x43,0xe7 = smlald r2, r3, r5, r8 0x35,0x28,0x43,0xe7 = smlaldx r2, r3, r5, r8 0x15,0x28,0x43,0x07 = smlaldeq r2, r3, r5, r8 0x35,0x28,0x43,0x87 = smlaldxhi r2, r3, r5, r8 0x83,0x8a,0x22,0xe1 = smlawb r2, r3, r10, r8 0xc3,0x95,0x28,0xe1 = smlawt r8, r3, r5, r9 0x87,0x85,0x22,0x01 = smlawbeq r2, r7, r5, r8 0xc3,0x80,0x21,0x81 = smlawthi r1, r3, r0, r8 0x53,0x85,0x02,0xe7 = smlsd r2, r3, r5, r8 0x73,0x85,0x02,0xe7 = smlsdx r2, r3, r5, r8 0x53,0x85,0x02,0x07 = smlsdeq r2, r3, r5, r8 0x73,0x85,0x02,0x87 = smlsdxhi r2, r3, r5, r8 0x55,0x21,0x49,0xe7 = smlsld r2, r9, r5, r1 0x72,0x48,0x4b,0xe7 = smlsldx r4, r11, r2, r8 0x55,0x86,0x42,0x07 = smlsldeq r8, r2, r5, r6 0x73,0x18,0x40,0x87 = smlsldxhi r1, r0, r3, r8 0x12,0x43,0x51,0xe7 = smmla r1, r2, r3, r4 0x33,0x12,0x54,0xe7 = smmlar r4, r3, r2, r1 0x12,0x43,0x51,0x37 = smmlalo r1, r2, r3, r4 0x33,0x12,0x54,0x27 = smmlarhs r4, r3, r2, r1 0xd2,0x43,0x51,0xe7 = smmls r1, r2, r3, r4 0xf3,0x12,0x54,0xe7 = smmlsr r4, r3, r2, r1 0xd2,0x43,0x51,0x37 = smmlslo r1, r2, r3, r4 0xf3,0x12,0x54,0x27 = smmlsrhs r4, r3, r2, r1 0x13,0xf4,0x52,0xe7 = smmul r2, r3, r4 0x32,0xf1,0x53,0xe7 = smmulr r3, r2, r1 0x13,0xf4,0x52,0x37 = smmullo r2, r3, r4 0x32,0xf1,0x53,0x27 = smmulrhs r3, r2, r1 0x13,0xf4,0x02,0xe7 = smuad r2, r3, r4 0x32,0xf1,0x03,0xe7 = smuadx r3, r2, r1 0x13,0xf4,0x02,0xb7 = smuadlt r2, r3, r4 0x32,0xf1,0x03,0xa7 = smuadxge r3, r2, r1 0x89,0x00,0x63,0xe1 = smulbb r3, r9, r0 0xc4,0x01,0x65,0xe1 = smulbt r5, r4, r1 0xa2,0x02,0x64,0xe1 = smultb r4, r2, r2 0xe3,0x04,0x68,0xe1 = smultt r8, r3, r4 0x89,0x00,0x61,0xa1 = smulbbge r1, r9, r0 0xc6,0x04,0x65,0xd1 = smulbtle r5, r6, r4 0xa3,0x02,0x62,0x11 = smultbne r2, r3, r2 0xe3,0x04,0x68,0x01 = smultteq r8, r3, r4 0x90,0x31,0xc9,0xe0 = smull r3, r9, r0, r1 0x90,0x32,0xd9,0xe0 = smulls r3, r9, r0, r2 0x94,0x85,0xc3,0x00 = smulleq r8, r3, r4, r5 0x94,0x83,0xd3,0x00 = smullseq r8, r3, r4, r3 0xa9,0x00,0x23,0xe1 = smulwb r3, r9, r0 0xe9,0x02,0x23,0xe1 = smulwt r3, r9, r2 0x50,0xf1,0x03,0xe7 = smusd r3, r0, r1 0x79,0xf2,0x03,0xe7 = smusdx r3, r9, r2 0x53,0xf2,0x08,0x07 = smusdeq r8, r3, r2 0x74,0xf3,0x07,0x17 = smusdxne r7, r4, r3 0x05,0x05,0x4d,0xf8 = srsda sp, #5 0x01,0x05,0x4d,0xf9 = srsdb sp, #1 0x00,0x05,0xcd,0xf8 = srsia sp, #0 0x0f,0x05,0xcd,0xf9 = srsib sp, #15 0x1f,0x05,0x6d,0xf8 = srsda sp!, #31 0x13,0x05,0x6d,0xf9 = srsdb sp!, #19 0x02,0x05,0xed,0xf8 = srsia sp!, #2 0x0e,0x05,0xed,0xf9 = srsib sp!, #14 0x0b,0x05,0xcd,0xf9 = srsib sp, #11 0x0a,0x05,0xcd,0xf8 = srsia sp, #10 0x09,0x05,0x4d,0xf9 = srsdb sp, #9 0x05,0x05,0x4d,0xf8 = srsda sp, #5 0x05,0x05,0xed,0xf9 = srsib sp!, #5 0x05,0x05,0xed,0xf8 = srsia sp!, #5 0x05,0x05,0x6d,0xf9 = srsdb sp!, #5 0x05,0x05,0x6d,0xf8 = srsda sp!, #5 0x05,0x05,0xcd,0xf8 = srsia sp, #5 0x05,0x05,0xed,0xf8 = srsia sp!, #5 0x05,0x05,0x4d,0xf8 = srsda sp, #5 0x01,0x05,0x4d,0xf9 = srsdb sp, #1 0x00,0x05,0xcd,0xf8 = srsia sp, #0 0x0f,0x05,0xcd,0xf9 = srsib sp, #15 0x1f,0x05,0x6d,0xf8 = srsda sp!, #31 0x13,0x05,0x6d,0xf9 = srsdb sp!, #19 0x02,0x05,0xed,0xf8 = srsia sp!, #2 0x0e,0x05,0xed,0xf9 = srsib sp!, #14 0x0b,0x05,0xcd,0xf9 = srsib sp, #11 0x0a,0x05,0xcd,0xf8 = srsia sp, #10 0x09,0x05,0x4d,0xf9 = srsdb sp, #9 0x05,0x05,0x4d,0xf8 = srsda sp, #5 0x05,0x05,0xed,0xf9 = srsib sp!, #5 0x05,0x05,0xed,0xf8 = srsia sp!, #5 0x05,0x05,0x6d,0xf9 = srsdb sp!, #5 0x05,0x05,0x6d,0xf8 = srsda sp!, #5 0x05,0x05,0xcd,0xf8 = srsia sp, #5 0x05,0x05,0xed,0xf8 = srsia sp!, #5 0x1a,0x80,0xa0,0xe6 = ssat r8, #1, r10 0x1a,0x80,0xa0,0xe6 = ssat r8, #1, r10 0x9a,0x8f,0xa0,0xe6 = ssat r8, #1, r10, lsl #31 0x5a,0x80,0xa0,0xe6 = ssat r8, #1, r10, asr #32 0xda,0x80,0xa0,0xe6 = ssat r8, #1, r10, asr #1 0x37,0x2f,0xa0,0xe6 = ssat16 r2, #1, r7 0x35,0x3f,0xaf,0xe6 = ssat16 r3, #16, r5 0x54,0x2f,0x13,0xe6 = ssax r2, r3, r4 0x54,0x2f,0x13,0xb6 = ssaxlt r2, r3, r4 0x76,0x1f,0x10,0xe6 = ssub16 r1, r0, r6 0x72,0x5f,0x13,0x16 = ssub16ne r5, r3, r2 0xf4,0x9f,0x12,0xe6 = ssub8 r9, r2, r4 0xf2,0x5f,0x11,0x06 = ssub8eq r5, r1, r2 0x01,0x80,0x81,0xfd = stc2 p0, c8, [r1, #4] 0x00,0x71,0x82,0xfd = stc2 p1, c7, [r2] 0x38,0x62,0x03,0xfd = stc2 p2, c6, [r3, #-224] 0x1e,0x53,0x24,0xfd = stc2 p3, c5, [r4, #-120]! 0x04,0x44,0xa5,0xfc = stc2 p4, c4, [r5], #16 0x12,0x35,0x26,0xfc = stc2 p5, c3, [r6], #-72 0x01,0x26,0xc7,0xfd = stc2l p6, c2, [r7, #4] 0x00,0x17,0xc8,0xfd = stc2l p7, c1, [r8] 0x38,0x08,0x49,0xfd = stc2l p8, c0, [r9, #-224] 0x1e,0x19,0x6a,0xfd = stc2l p9, c1, [r10, #-120]! 0x04,0x20,0xeb,0xfc = stc2l p0, c2, [r11], #16 0x12,0x31,0x6c,0xfc = stc2l p1, c3, [r12], #-72 0x01,0x4c,0x80,0xed = stc p12, c4, [r0, #4] 0x00,0x5d,0x81,0xed = stc p13, c5, [r1] 0x38,0x6e,0x02,0xed = stc p14, c6, [r2, #-224] 0x1e,0x7f,0x23,0xed = stc p15, c7, [r3, #-120]! 0x04,0x85,0xa4,0xec = stc p5, c8, [r4], #16 0x12,0x94,0x25,0xec = stc p4, c9, [r5], #-72 0x01,0xa3,0xc6,0xed = stcl p3, c10, [r6, #4] 0x00,0xb2,0xc7,0xed = stcl p2, c11, [r7] 0x38,0xc1,0x48,0xed = stcl p1, c12, [r8, #-224] 0x1e,0xd0,0x69,0xed = stcl p0, c13, [r9, #-120]! 0x04,0xe6,0xea,0xec = stcl p6, c14, [r10], #16 0x12,0xf7,0x6b,0xec = stcl p7, c15, [r11], #-72 0x01,0x4c,0x80,0x3d = stclo p12, c4, [r0, #4] 0x00,0x5d,0x81,0x8d = stchi p13, c5, [r1] 0x38,0x6e,0x02,0x2d = stchs p14, c6, [r2, #-224] 0x1e,0x7f,0x23,0x3d = stclo p15, c7, [r3, #-120]! 0x04,0x85,0xa4,0x0c = stceq p5, c8, [r4], #16 0x12,0x94,0x25,0xcc = stcgt p4, c9, [r5], #-72 0x01,0xa3,0xc6,0xbd = stcllt p3, c10, [r6, #4] 0x00,0xb2,0xc7,0xad = stclge p2, c11, [r7] 0x38,0xc1,0x48,0xdd = stclle p1, c12, [r8, #-224] 0x1e,0xd0,0x69,0x1d = stclne p0, c13, [r9, #-120]! 0x04,0xe6,0xea,0x0c = stcleq p6, c14, [r10], #16 0x12,0xf7,0x6b,0x8c = stclhi p7, c15, [r11], #-72 0x19,0x82,0x81,0xfc = stc2 p2, c8, [r1], {25} 0x7a,0x20,0x82,0xe8 = stm r2, {r1, r3, r4, r5, r6, sp} 0x7a,0x40,0x83,0xe8 = stm r3, {r1, r3, r4, r5, r6, lr} 0x7a,0x20,0x84,0xe9 = stmib r4, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0x05,0xe8 = stmda r5, {r1, r3, r4, r5, r6, sp} 0x7a,0x01,0x06,0xe9 = stmdb r6, {r1, r3, r4, r5, r6, r8} 0x7a,0x20,0x0d,0xe9 = stmdb sp, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0xa8,0xe8 = stm r8!, {r1, r3, r4, r5, r6, sp} 0x7a,0x20,0xa9,0xe9 = stmib r9!, {r1, r3, r4, r5, r6, sp} 0x7a,0x00,0x2d,0xe8 = stmda sp!, {r1, r3, r4, r5, r6} 0xa2,0x20,0x20,0xe9 = stmdb r0!, {r1, r5, r7, sp} 0x93,0x1f,0xc4,0xe1 = strexb r1, r3, [r4] 0x92,0x4f,0xe5,0xe1 = strexh r4, r2, [r5] 0x91,0x2f,0x87,0xe1 = strex r2, r1, [r7] 0x92,0x6f,0xa8,0xe1 = strexd r6, r2, r3, [r8] 0x00,0x30,0x2a,0x55 = strpl r3, [r10, #-0]! 0x00,0x30,0xaa,0x55 = strpl r3, [r10, #0]! 0x0f,0x4a,0x45,0xe2 = sub r4, r5, #61440 0x06,0x40,0x45,0xe0 = sub r4, r5, r6 0x86,0x42,0x45,0xe0 = sub r4, r5, r6, lsl #5 0xa6,0x42,0x45,0xe0 = sub r4, r5, r6, lsr #5 0xa6,0x42,0x45,0xe0 = sub r4, r5, r6, lsr #5 0xc6,0x42,0x45,0xe0 = sub r4, r5, r6, asr #5 0xe6,0x42,0x45,0xe0 = sub r4, r5, r6, ror #5 0x18,0x69,0x47,0xe0 = sub r6, r7, r8, lsl r9 0x38,0x69,0x47,0xe0 = sub r6, r7, r8, lsr r9 0x58,0x69,0x47,0xe0 = sub r6, r7, r8, asr r9 0x78,0x69,0x47,0xe0 = sub r6, r7, r8, ror r9 0x0f,0x5a,0x45,0xe2 = sub r5, r5, #61440 0x05,0x40,0x44,0xe0 = sub r4, r4, r5 0x85,0x42,0x44,0xe0 = sub r4, r4, r5, lsl #5 0xa5,0x42,0x44,0xe0 = sub r4, r4, r5, lsr #5 0xa5,0x42,0x44,0xe0 = sub r4, r4, r5, lsr #5 0xc5,0x42,0x44,0xe0 = sub r4, r4, r5, asr #5 0xe5,0x42,0x44,0xe0 = sub r4, r4, r5, ror #5 0x17,0x69,0x46,0xe0 = sub r6, r6, r7, lsl r9 0x37,0x69,0x46,0xe0 = sub r6, r6, r7, lsr r9 0x57,0x69,0x46,0xe0 = sub r6, r6, r7, asr r9 0x77,0x69,0x46,0xe0 = sub r6, r6, r7, ror r9 0x22,0x30,0x41,0xe0 = sub r3, r1, r2, lsr #32 0x42,0x30,0x41,0xe0 = sub r3, r1, r2, asr #32 0x10,0x00,0x00,0xef = svc #16 0x00,0x00,0x00,0xef = svc #0 0xff,0xff,0xff,0xef = svc #16777215 0x92,0x10,0x03,0xe1 = swp r1, r2, [r3] 0x94,0x40,0x06,0xe1 = swp r4, r4, [r6] 0x91,0x50,0x49,0xe1 = swpb r5, r1, [r9] 0x74,0x20,0xa3,0xe6 = sxtab r2, r3, r4 0x76,0x40,0xa5,0xe6 = sxtab r4, r5, r6 0x79,0x64,0xa2,0xb6 = sxtablt r6, r2, r9, ror #8 0x74,0x58,0xa1,0xe6 = sxtab r5, r1, r4, ror #16 0x73,0x7c,0xa8,0xe6 = sxtab r7, r8, r3, ror #24 0x74,0x00,0x81,0xa6 = sxtab16ge r0, r1, r4 0x77,0x60,0x82,0xe6 = sxtab16 r6, r2, r7 0x78,0x34,0x85,0xe6 = sxtab16 r3, r5, r8, ror #8 0x71,0x38,0x82,0xe6 = sxtab16 r3, r2, r1, ror #16 0x73,0x1c,0x82,0x06 = sxtab16eq r1, r2, r3, ror #24 0x79,0x10,0xb3,0xe6 = sxtah r1, r3, r9 0x76,0x60,0xb1,0x86 = sxtahhi r6, r1, r6 0x73,0x34,0xb8,0xe6 = sxtah r3, r8, r3, ror #8 0x74,0x28,0xb2,0x36 = sxtahlo r2, r2, r4, ror #16 0x73,0x9c,0xb3,0xe6 = sxtah r9, r3, r3, ror #24 0x74,0x20,0xaf,0xa6 = sxtbge r2, r4 0x76,0x50,0xaf,0xe6 = sxtb r5, r6 0x79,0x64,0xaf,0xe6 = sxtb r6, r9, ror #8 0x71,0x58,0xaf,0x36 = sxtblo r5, r1, ror #16 0x73,0x8c,0xaf,0xe6 = sxtb r8, r3, ror #24 0x74,0x10,0x8f,0xe6 = sxtb16 r1, r4 0x77,0x60,0x8f,0xe6 = sxtb16 r6, r7 0x75,0x34,0x8f,0x26 = sxtb16hs r3, r5, ror #8 0x71,0x38,0x8f,0xe6 = sxtb16 r3, r1, ror #16 0x73,0x2c,0x8f,0xa6 = sxtb16ge r2, r3, ror #24 0x79,0x30,0xbf,0x16 = sxthne r3, r9 0x76,0x10,0xbf,0xe6 = sxth r1, r6 0x78,0x34,0xbf,0xe6 = sxth r3, r8, ror #8 0x72,0x28,0xbf,0xd6 = sxthle r2, r2, ror #16 0x73,0x9c,0xbf,0xe6 = sxth r9, r3, ror #24 0x0f,0x0a,0x35,0xe3 = teq r5, #61440 0x05,0x00,0x34,0xe1 = teq r4, r5 0x85,0x02,0x34,0xe1 = teq r4, r5, lsl #5 0xa5,0x02,0x34,0xe1 = teq r4, r5, lsr #5 0xa5,0x02,0x34,0xe1 = teq r4, r5, lsr #5 0xc5,0x02,0x34,0xe1 = teq r4, r5, asr #5 0xe5,0x02,0x34,0xe1 = teq r4, r5, ror #5 0x17,0x09,0x36,0xe1 = teq r6, r7, lsl r9 0x37,0x09,0x36,0xe1 = teq r6, r7, lsr r9 0x57,0x09,0x36,0xe1 = teq r6, r7, asr r9 0x77,0x09,0x36,0xe1 = teq r6, r7, ror r9 0x0f,0x0a,0x15,0xe3 = tst r5, #61440 0x05,0x00,0x14,0xe1 = tst r4, r5 0x85,0x02,0x14,0xe1 = tst r4, r5, lsl #5 0xa5,0x02,0x14,0xe1 = tst r4, r5, lsr #5 0xa5,0x02,0x14,0xe1 = tst r4, r5, lsr #5 0xc5,0x02,0x14,0xe1 = tst r4, r5, asr #5 0xe5,0x02,0x14,0xe1 = tst r4, r5, ror #5 0x17,0x09,0x16,0xe1 = tst r6, r7, lsl r9 0x37,0x09,0x16,0xe1 = tst r6, r7, lsr r9 0x57,0x09,0x16,0xe1 = tst r6, r7, asr r9 0x77,0x09,0x16,0xe1 = tst r6, r7, ror r9 0x13,0x1f,0x52,0xe6 = uadd16 r1, r2, r3 0x13,0x1f,0x52,0xc6 = uadd16gt r1, r2, r3 0x93,0x1f,0x52,0xe6 = uadd8 r1, r2, r3 0x93,0x1f,0x52,0xd6 = uadd8le r1, r2, r3 0x30,0x9f,0x5c,0xe6 = uasx r9, r12, r0 0x30,0x9f,0x5c,0x06 = uasxeq r9, r12, r0 0x55,0x48,0xe0,0xe7 = ubfx r4, r5, #16, #1 0x55,0x48,0xef,0xc7 = ubfxgt r4, r5, #16, #16 0x12,0x4f,0x78,0xe6 = uhadd16 r4, r8, r2 0x12,0x4f,0x78,0xc6 = uhadd16gt r4, r8, r2 0x92,0x4f,0x78,0xe6 = uhadd8 r4, r8, r2 0x92,0x4f,0x78,0xc6 = uhadd8gt r4, r8, r2 0x32,0x4f,0x78,0xe6 = uhasx r4, r8, r2 0x32,0x4f,0x78,0xc6 = uhasxgt r4, r8, r2 0x72,0x4f,0x78,0xe6 = uhsub16 r4, r8, r2 0x72,0x4f,0x78,0xc6 = uhsub16gt r4, r8, r2 0xf2,0x4f,0x78,0xe6 = uhsub8 r4, r8, r2 0xf2,0x4f,0x78,0xc6 = uhsub8gt r4, r8, r2 0x95,0x36,0x44,0xe0 = umaal r3, r4, r5, r6 0x95,0x36,0x44,0xb0 = umaallt r3, r4, r5, r6 0x96,0x28,0xa4,0xe0 = umlal r2, r4, r6, r8 0x92,0x66,0xa1,0xc0 = umlalgt r6, r1, r2, r6 0x92,0x23,0xb9,0xe0 = umlals r2, r9, r2, r3 0x91,0x32,0xb5,0x00 = umlalseq r3, r5, r1, r2 0x96,0x28,0x84,0xe0 = umull r2, r4, r6, r8 0x92,0x66,0x81,0xc0 = umullgt r6, r1, r2, r6 0x92,0x23,0x99,0xe0 = umulls r2, r9, r2, r3 0x91,0x32,0x95,0x00 = umullseq r3, r5, r1, r2 0x13,0x1f,0x62,0xe6 = uqadd16 r1, r2, r3 0x19,0x4f,0x67,0xc6 = uqadd16gt r4, r7, r9 0x98,0x3f,0x64,0xe6 = uqadd8 r3, r4, r8 0x92,0x8f,0x61,0xd6 = uqadd8le r8, r1, r2 0x31,0x2f,0x64,0xe6 = uqasx r2, r4, r1 0x39,0x5f,0x62,0x86 = uqasxhi r5, r2, r9 0x57,0x1f,0x63,0xe6 = uqsax r1, r3, r7 0x52,0x3f,0x66,0xe6 = uqsax r3, r6, r2 0x73,0x1f,0x65,0xe6 = uqsub16 r1, r5, r3 0x75,0x3f,0x62,0xc6 = uqsub16gt r3, r2, r5 0xf4,0x2f,0x61,0xe6 = uqsub8 r2, r1, r4 0xf9,0x4f,0x66,0xd6 = uqsub8le r4, r6, r9 0x11,0xf4,0x82,0xe7 = usad8 r2, r1, r4 0x16,0xf9,0x84,0xd7 = usad8le r4, r6, r9 0x15,0x73,0x81,0xe7 = usada8 r1, r5, r3, r7 0x12,0x15,0x83,0xc7 = usada8gt r3, r2, r5, r1 0x1a,0x80,0xe1,0xe6 = usat r8, #1, r10 0x1a,0x80,0xe4,0xe6 = usat r8, #4, r10 0x9a,0x8f,0xe5,0xe6 = usat r8, #5, r10, lsl #31 0x5a,0x80,0xff,0xe6 = usat r8, #31, r10, asr #32 0xda,0x80,0xf0,0xe6 = usat r8, #16, r10, asr #1 0x37,0x2f,0xe2,0xe6 = usat16 r2, #2, r7 0x35,0x3f,0xef,0xe6 = usat16 r3, #15, r5 0x54,0x2f,0x53,0xe6 = usax r2, r3, r4 0x54,0x2f,0x53,0x16 = usaxne r2, r3, r4 0x77,0x4f,0x52,0xe6 = usub16 r4, r2, r7 0x73,0x1f,0x51,0x86 = usub16hi r1, r1, r3 0xf5,0x1f,0x58,0xe6 = usub8 r1, r8, r5 0xf3,0x9f,0x52,0xd6 = usub8le r9, r2, r3 0x74,0x20,0xe3,0xe6 = uxtab r2, r3, r4 0x76,0x40,0xe5,0xe6 = uxtab r4, r5, r6 0x79,0x64,0xe2,0xb6 = uxtablt r6, r2, r9, ror #8 0x74,0x58,0xe1,0xe6 = uxtab r5, r1, r4, ror #16 0x73,0x7c,0xe8,0xe6 = uxtab r7, r8, r3, ror #24 0x74,0x00,0xc1,0xa6 = uxtab16ge r0, r1, r4 0x77,0x60,0xc2,0xe6 = uxtab16 r6, r2, r7 0x78,0x34,0xc5,0xe6 = uxtab16 r3, r5, r8, ror #8 0x71,0x38,0xc2,0xe6 = uxtab16 r3, r2, r1, ror #16 0x73,0x1c,0xc2,0x06 = uxtab16eq r1, r2, r3, ror #24 0x79,0x10,0xf3,0xe6 = uxtah r1, r3, r9 0x76,0x60,0xf1,0x86 = uxtahhi r6, r1, r6 0x73,0x34,0xf8,0xe6 = uxtah r3, r8, r3, ror #8 0x74,0x28,0xf2,0x36 = uxtahlo r2, r2, r4, ror #16 0x73,0x9c,0xf3,0xe6 = uxtah r9, r3, r3, ror #24 0x74,0x20,0xef,0xa6 = uxtbge r2, r4 0x76,0x50,0xef,0xe6 = uxtb r5, r6 0x79,0x64,0xef,0xe6 = uxtb r6, r9, ror #8 0x71,0x58,0xef,0x36 = uxtblo r5, r1, ror #16 0x73,0x8c,0xef,0xe6 = uxtb r8, r3, ror #24 0x74,0x10,0xcf,0xe6 = uxtb16 r1, r4 0x77,0x60,0xcf,0xe6 = uxtb16 r6, r7 0x75,0x34,0xcf,0x26 = uxtb16hs r3, r5, ror #8 0x71,0x38,0xcf,0xe6 = uxtb16 r3, r1, ror #16 0x73,0x2c,0xcf,0xa6 = uxtb16ge r2, r3, ror #24 0x79,0x30,0xff,0x16 = uxthne r3, r9 0x76,0x10,0xff,0xe6 = uxth r1, r6 0x78,0x34,0xff,0xe6 = uxth r3, r8, ror #8 0x72,0x28,0xff,0xd6 = uxthle r2, r2, ror #16 0x73,0x9c,0xff,0xe6 = uxth r9, r3, ror #24 0x02,0xf0,0x20,0xe3 = wfe 0x02,0xf0,0x20,0x83 = wfehi 0x03,0xf0,0x20,0xe3 = wfi 0x03,0xf0,0x20,0xb3 = wfilt 0x01,0xf0,0x20,0xe3 = yield 0x01,0xf0,0x20,0x13 = yieldne 0x04,0xf0,0x20,0xe3 = sev 0x03,0xf0,0x20,0xe3 = wfi 0x02,0xf0,0x20,0xe3 = wfe 0x01,0xf0,0x20,0xe3 = yield 0x00,0xf0,0x20,0xe3 = nop 0xef,0xf0,0x20,0xc3 = hintgt #239 capstone-sys-0.11.0/capstone/suite/MC/ARM/basic-thumb-instructions.s.cs010066400017500001750000000066201363402546700240750ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x74,0x41 = adcs r4, r6 0xd1,0x1c = adds r1, r2, #3 0x03,0x32 = adds r2, #3 0x08,0x32 = adds r2, #8 0xd1,0x18 = adds r1, r2, r3 0x42,0x44 = add r2, r8 0x01,0xb0 = add sp, #4 0x7f,0xb0 = add sp, #508 0x01,0xb0 = add sp, #4 0x02,0xaa = add r2, sp, #8 0xff,0xaa = add r2, sp, #1020 0x82,0xb0 = sub sp, #8 0x82,0xb0 = sub sp, #8 0x9d,0x44 = add sp, r3 0x6a,0x44 = add r2, sp, r2 0x00,0xa5 = adr r5, #0 0x01,0xa2 = adr r2, #4 0xff,0xa3 = adr r3, #1020 0x1a,0x10 = asrs r2, r3, #32 0x5a,0x11 = asrs r2, r3, #5 0x5a,0x10 = asrs r2, r3, #1 0x6d,0x15 = asrs r5, r5, #21 0x6d,0x15 = asrs r5, r5, #21 0x6b,0x15 = asrs r3, r5, #21 0x15,0x41 = asrs r5, r2 0x97,0xe3 = b #1838 0x2e,0xe7 = b #-420 0x80,0xd0 = beq #-256 0x50,0xd0 = beq #160 0xd8,0xf0,0x20,0xe8 = blx #884800 0xb0,0xf1,0x40,0xe8 = blx #1769600 0xb1,0x43 = bics r1, r6 0x00,0xbe = bkpt #0 0xff,0xbe = bkpt #255 0xa0,0x47 = blx r4 0x10,0x47 = bx r2 0xcd,0x42 = cmn r5, r1 0x20,0x2e = cmp r6, #32 0xa3,0x42 = cmp r3, r4 0x88,0x45 = cmp r8, r1 0x61,0xb6 = cpsie f 0x74,0xb6 = cpsid a 0x6c,0x40 = eors r4, r5 0xff,0xcb = ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7} 0xba,0xca = ldm r2!, {r1, r3, r4, r5, r7} 0x02,0xc9 = ldm r1, {r1} 0x29,0x68 = ldr r1, [r5] 0x32,0x6a = ldr r2, [r6, #32] 0xfb,0x6f = ldr r3, [r7, #124] 0x00,0x99 = ldr r1, [sp] 0x06,0x9a = ldr r2, [sp, #24] 0xff,0x9b = ldr r3, [sp, #1020] 0x97,0x4b = ldr r3, [pc, #604] 0x5c,0x4b = ldr r3, [pc, #368] 0xd1,0x58 = ldr r1, [r2, r3] 0x1c,0x78 = ldrb r4, [r3] 0x35,0x78 = ldrb r5, [r6] 0xfe,0x7f = ldrb r6, [r7, #31] 0x66,0x5d = ldrb r6, [r4, r5] 0x1b,0x88 = ldrh r3, [r3] 0x74,0x88 = ldrh r4, [r6, #2] 0xfd,0x8f = ldrh r5, [r7, #62] 0x96,0x5b = ldrh r6, [r2, r6] 0x96,0x57 = ldrsb r6, [r2, r6] 0x7b,0x5e = ldrsh r3, [r7, r1] 0x2c,0x00 = lsls r4, r5, #0 0x2c,0x01 = lsls r4, r5, #4 0x1b,0x03 = lsls r3, r3, #12 0x1b,0x03 = lsls r3, r3, #12 0x19,0x03 = lsls r1, r3, #12 0xb2,0x40 = lsls r2, r6 0x59,0x08 = lsrs r1, r3, #1 0x19,0x08 = lsrs r1, r3, #32 0x24,0x0d = lsrs r4, r4, #20 0x24,0x0d = lsrs r4, r4, #20 0x22,0x0d = lsrs r2, r4, #20 0xf2,0x40 = lsrs r2, r6 0x00,0x22 = movs r2, #0 0xff,0x22 = movs r2, #255 0x17,0x22 = movs r2, #23 0x23,0x46 = mov r3, r4 0x19,0x00 = movs r1, r3 0x51,0x43 = muls r1, r2, r1 0x5a,0x43 = muls r2, r3, r2 0x63,0x43 = muls r3, r4, r3 0xde,0x43 = mvns r6, r3 0x63,0x42 = rsbs r3, r4, #0 0x4c,0xbc = pop {r2, r3, r6} 0x86,0xb4 = push {r1, r2, r7} 0x1e,0xba = rev r6, r3 0x57,0xba = rev16 r7, r2 0xcd,0xba = revsh r5, r1 0xfa,0x41 = rors r2, r7 0x59,0x42 = rsbs r1, r3, #0 0x9c,0x41 = sbcs r4, r3 0x58,0xb6 = setend be 0x50,0xb6 = setend le 0x44,0xc1 = stm r1!, {r2, r6} 0x8e,0xc1 = stm r1!, {r1, r2, r3, r7} 0x3a,0x60 = str r2, [r7] 0x3a,0x60 = str r2, [r7] 0x4d,0x60 = str r5, [r1, #4] 0xfb,0x67 = str r3, [r7, #124] 0x00,0x92 = str r2, [sp] 0x00,0x93 = str r3, [sp] 0x05,0x94 = str r4, [sp, #20] 0xff,0x95 = str r5, [sp, #1020] 0xfa,0x50 = str r2, [r7, r3] 0x1c,0x70 = strb r4, [r3] 0x35,0x70 = strb r5, [r6] 0xfe,0x77 = strb r6, [r7, #31] 0x66,0x55 = strb r6, [r4, r5] 0x1b,0x80 = strh r3, [r3] 0x74,0x80 = strh r4, [r6, #2] 0xfd,0x87 = strh r5, [r7, #62] 0x96,0x53 = strh r6, [r2, r6] 0xd1,0x1e = subs r1, r2, #3 0x03,0x3a = subs r2, #3 0x08,0x3a = subs r2, #8 0x83,0xb0 = sub sp, #12 0xff,0xb0 = sub sp, #508 0xd1,0x1a = subs r1, r2, r3 0x00,0xdf = svc #0 0xff,0xdf = svc #255 0x6b,0xb2 = sxtb r3, r5 0x2b,0xb2 = sxth r3, r5 0x0e,0x42 = tst r6, r1 0xd7,0xb2 = uxtb r7, r2 0xa1,0xb2 = uxth r1, r4 capstone-sys-0.11.0/capstone/suite/MC/ARM/basic-thumb2-instructions-v8.s.cs010066400017500001750000000000561363402546700245070ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None capstone-sys-0.11.0/capstone/suite/MC/ARM/basic-thumb2-instructions.s.cs010066400017500001750000001350031363402546700241550ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x41,0xf1,0x04,0x00 = adc r0, r1, #4 0x51,0xf1,0x00,0x00 = adcs r0, r1, #0 0x42,0xf1,0xff,0x01 = adc r1, r2, #255 0x47,0xf1,0x55,0x13 = adc r3, r7, #5570645 0x4c,0xf1,0xaa,0x28 = adc r8, r12, #2852170240 0x47,0xf1,0xa5,0x39 = adc r9, r7, #2779096485 0x43,0xf1,0x07,0x45 = adc r5, r3, #2264924160 0x42,0xf1,0xff,0x44 = adc r4, r2, #2139095040 0x42,0xf5,0xd0,0x64 = adc r4, r2, #1664 0x45,0xeb,0x06,0x04 = adc.w r4, r5, r6 0x55,0xeb,0x06,0x04 = adcs.w r4, r5, r6 0x41,0xeb,0x03,0x09 = adc.w r9, r1, r3 0x51,0xeb,0x03,0x09 = adcs.w r9, r1, r3 0x41,0xeb,0x33,0x10 = adc.w r0, r1, r3, ror #4 0x51,0xeb,0xc3,0x10 = adcs.w r0, r1, r3, lsl #7 0x41,0xeb,0xd3,0x70 = adc.w r0, r1, r3, lsr #31 0x51,0xeb,0x23,0x00 = adcs.w r0, r1, r3, asr #32 0x0d,0xeb,0x0c,0x02 = add.w r2, sp, r12 0x0a,0xbf = itet eq 0x03,0xf2,0xff,0x35 = addwne r5, r3, #1023 0x05,0xf2,0x25,0x14 = addweq r4, r5, #293 0x0d,0xf5,0x80,0x62 = add.w r2, sp, #1024 0x08,0xf5,0x7f,0x42 = add.w r2, r8, #65280 0x03,0xf2,0x01,0x12 = addw r2, r3, #257 0x03,0xf2,0x01,0x12 = addw r2, r3, #257 0x06,0xf5,0x80,0x7c = add.w r12, r6, #256 0x06,0xf2,0x00,0x1c = addw r12, r6, #256 0x12,0xf5,0xf8,0x71 = adds.w r1, r2, #496 0x02,0xf1,0x01,0x02 = add.w r2, r2, #1 0x00,0xf1,0x20,0x00 = add.w r0, r0, #32 0x38,0x32 = adds r2, #56 0x38,0x32 = adds r2, #56 0x07,0xf1,0xcb,0x31 = add.w r1, r7, #3419130827 0x0d,0xf1,0xff,0x7d = add.w sp, sp, #33423360 0xb2,0xf1,0x10,0x02 = subs.w r2, r2, #16 0xb2,0xf1,0x10,0x02 = subs.w r2, r2, #16 0xa2,0xf2,0x10,0x02 = subw r2, r2, #16 0xa2,0xf2,0x10,0x02 = subw r2, r2, #16 0xa2,0xf2,0x10,0x02 = subw r2, r2, #16 0x02,0xeb,0x08,0x01 = add.w r1, r2, r8 0x09,0xeb,0x22,0x05 = add.w r5, r9, r2, asr #32 0x13,0xeb,0xc1,0x77 = adds.w r7, r3, r1, lsl #31 0x13,0xeb,0x56,0x60 = adds.w r0, r3, r6, lsr #25 0x08,0xeb,0x31,0x34 = add.w r4, r8, r1, ror #12 0xc2,0x44 = add r10, r8 0xc2,0x44 = add r10, r8 0xaf,0xf6,0xc6,0x4b = subw r11, pc, #3270 0x0f,0xf2,0x03,0x02 = adr.w r2, #3 0xaf,0xf2,0x3a,0x3b = adr.w r11, #-826 0xaf,0xf2,0x00,0x01 = adr.w r1, #-0 0x05,0xf4,0x7f,0x22 = and r2, r5, #1044480 0x1c,0xf0,0x0f,0x03 = ands r3, r12, #15 0x01,0xf0,0xff,0x01 = and r1, r1, #255 0x01,0xf0,0xff,0x01 = and r1, r1, #255 0x04,0xf0,0xff,0x35 = and r5, r4, #4294967295 0x19,0xf0,0xff,0x31 = ands r1, r9, #4294967295 0x09,0xea,0x08,0x04 = and.w r4, r9, r8 0x04,0xea,0xe8,0x01 = and.w r1, r4, r8, asr #3 0x11,0xea,0x47,0x02 = ands.w r2, r1, r7, lsl #1 0x15,0xea,0x12,0x54 = ands.w r4, r5, r2, lsr #20 0x0c,0xea,0x71,0x49 = and.w r9, r12, r1, ror #17 0x4f,0xea,0x23,0x32 = asr.w r2, r3, #12 0x5f,0xea,0x23,0x08 = asrs.w r8, r3, #32 0x5f,0xea,0x63,0x02 = asrs.w r2, r3, #1 0x4f,0xea,0x23,0x12 = asr.w r2, r3, #4 0x5f,0xea,0xec,0x32 = asrs.w r2, r12, #15 0x4f,0xea,0xe3,0x43 = asr.w r3, r3, #19 0x5f,0xea,0xa8,0x08 = asrs.w r8, r8, #2 0x5f,0xea,0x67,0x17 = asrs.w r7, r7, #5 0x4f,0xea,0x6c,0x5c = asr.w r12, r12, #21 0x44,0xfa,0x02,0xf3 = asr.w r3, r4, r2 0x41,0xfa,0x02,0xf1 = asr.w r1, r1, r2 0x54,0xfa,0x08,0xf3 = asrs.w r3, r4, r8 0x08,0xbf = it eq 0x13,0xf5,0xce,0xa9 = bmi.w #-183396 0x6f,0xf3,0xd3,0x05 = bfc r5, #3, #17 0x38,0xbf = it lo 0x6f,0xf3,0xd3,0x05 = bfclo r5, #3, #17 0x62,0xf3,0xd3,0x05 = bfi r5, r2, #3, #17 0x18,0xbf = it ne 0x62,0xf3,0xd3,0x05 = bfine r5, r2, #3, #17 0x21,0xf0,0x0f,0x0a = bic r10, r1, #15 0x22,0xf0,0xff,0x35 = bic r5, r2, #4294967295 0x3a,0xf0,0xff,0x3b = bics r11, r10, #4294967295 0x23,0xea,0x06,0x0c = bic.w r12, r3, r6 0x22,0xea,0x06,0x3b = bic.w r11, r2, r6, lsl #12 0x24,0xea,0xd1,0x28 = bic.w r8, r4, r1, lsr #11 0x25,0xea,0xd7,0x37 = bic.w r7, r5, r7, lsr #15 0x27,0xea,0x29,0x06 = bic.w r6, r7, r9, asr #32 0x26,0xea,0x78,0x05 = bic.w r5, r6, r8, ror #1 0x21,0xf0,0x0f,0x01 = bic r1, r1, #15 0x21,0xea,0x01,0x01 = bic.w r1, r1, r1 0x24,0xea,0xc2,0x74 = bic.w r4, r4, r2, lsl #31 0x26,0xea,0x13,0x36 = bic.w r6, r6, r3, lsr #12 0x27,0xea,0xd4,0x17 = bic.w r7, r7, r4, lsr #7 0x28,0xea,0xe5,0x38 = bic.w r8, r8, r5, asr #15 0x2c,0xea,0x76,0x7c = bic.w r12, r12, r6, ror #29 0x58,0xbf = it pl 0xea,0xbe = bkpt #234 0xc5,0xf3,0x00,0x8f = bxj r5 0x18,0xbf = it ne 0xc7,0xf3,0x00,0x8f = bxjne r7 0x1f,0xb9 = cbnz r7, #6 0x37,0xb9 = cbnz r7, #12 0x11,0xee,0x81,0x17 = cdp p7, #1, c1, c1, c1, #4 0x11,0xfe,0x81,0x17 = cdp2 p7, #1, c1, c1, c1, #4 0xbf,0xf3,0x2f,0x8f = clrex 0x18,0xbf = it ne 0xb2,0xfa,0x82,0xf1 = clz r1, r2 0x08,0xbf = it eq 0xb2,0xfa,0x82,0xf1 = clzeq r1, r2 0x11,0xf1,0x0f,0x0f = cmn.w r1, #15 0x18,0xeb,0x06,0x0f = cmn.w r8, r6 0x11,0xeb,0x86,0x2f = cmn.w r1, r6, lsl #10 0x11,0xeb,0x96,0x2f = cmn.w r1, r6, lsr #10 0x1d,0xeb,0x96,0x2f = cmn.w sp, r6, lsr #10 0x11,0xeb,0xa6,0x2f = cmn.w r1, r6, asr #10 0x11,0xeb,0xb6,0x2f = cmn.w r1, r6, ror #10 0xb5,0xf5,0x7f,0x4f = cmp.w r5, #65280 0xb4,0xeb,0x0c,0x0f = cmp.w r4, r12 0xb9,0xeb,0x06,0x3f = cmp.w r9, r6, lsl #12 0xb3,0xeb,0xd7,0x7f = cmp.w r3, r7, lsr #31 0xbd,0xeb,0x56,0x0f = cmp.w sp, r6, lsr #1 0xb2,0xeb,0x25,0x6f = cmp.w r2, r5, asr #24 0xb1,0xeb,0xf4,0x3f = cmp.w r1, r4, ror #15 0x12,0xf1,0x02,0x0f = cmn.w r2, #2 0xb9,0xf1,0x01,0x0f = cmp.w r9, #1 0x61,0xb6 = cpsie f 0x74,0xb6 = cpsid a 0xaf,0xf3,0x20,0x84 = cpsie.w f 0xaf,0xf3,0x80,0x86 = cpsid.w a 0xaf,0xf3,0x43,0x85 = cpsie i, #3 0xaf,0xf3,0x43,0x85 = cpsie i, #3 0xaf,0xf3,0x29,0x87 = cpsid f, #9 0xaf,0xf3,0x29,0x87 = cpsid f, #9 0xaf,0xf3,0x00,0x81 = cps #0 0xaf,0xf3,0x00,0x81 = cps #0 0xaf,0xf3,0xf5,0x80 = dbg #5 0xaf,0xf3,0xf0,0x80 = dbg #0 0xaf,0xf3,0xff,0x80 = dbg #15 0xbf,0xf3,0x5f,0x8f = dmb sy 0xbf,0xf3,0x5e,0x8f = dmb st 0xbf,0xf3,0x5d,0x8f = dmb #0xd 0xbf,0xf3,0x5c,0x8f = dmb #0xc 0xbf,0xf3,0x5b,0x8f = dmb ish 0xbf,0xf3,0x5a,0x8f = dmb ishst 0xbf,0xf3,0x59,0x8f = dmb #0x9 0xbf,0xf3,0x58,0x8f = dmb #0x8 0xbf,0xf3,0x57,0x8f = dmb nsh 0xbf,0xf3,0x56,0x8f = dmb nshst 0xbf,0xf3,0x55,0x8f = dmb #0x5 0xbf,0xf3,0x54,0x8f = dmb #0x4 0xbf,0xf3,0x53,0x8f = dmb osh 0xbf,0xf3,0x52,0x8f = dmb oshst 0xbf,0xf3,0x51,0x8f = dmb #0x1 0xbf,0xf3,0x50,0x8f = dmb #0x0 0xbf,0xf3,0x5f,0x8f = dmb sy 0xbf,0xf3,0x5e,0x8f = dmb st 0xbf,0xf3,0x5b,0x8f = dmb ish 0xbf,0xf3,0x5b,0x8f = dmb ish 0xbf,0xf3,0x5a,0x8f = dmb ishst 0xbf,0xf3,0x5a,0x8f = dmb ishst 0xbf,0xf3,0x57,0x8f = dmb nsh 0xbf,0xf3,0x57,0x8f = dmb nsh 0xbf,0xf3,0x56,0x8f = dmb nshst 0xbf,0xf3,0x56,0x8f = dmb nshst 0xbf,0xf3,0x53,0x8f = dmb osh 0xbf,0xf3,0x52,0x8f = dmb oshst 0xbf,0xf3,0x5f,0x8f = dmb sy 0xbf,0xf3,0x4f,0x8f = dsb sy 0xbf,0xf3,0x4e,0x8f = dsb st 0xbf,0xf3,0x4d,0x8f = dsb #0xd 0xbf,0xf3,0x4c,0x8f = dsb #0xc 0xbf,0xf3,0x4b,0x8f = dsb ish 0xbf,0xf3,0x4a,0x8f = dsb ishst 0xbf,0xf3,0x49,0x8f = dsb #0x9 0xbf,0xf3,0x48,0x8f = dsb #0x8 0xbf,0xf3,0x47,0x8f = dsb nsh 0xbf,0xf3,0x46,0x8f = dsb nshst 0xbf,0xf3,0x45,0x8f = dsb #0x5 0xbf,0xf3,0x44,0x8f = dsb #0x4 0xbf,0xf3,0x43,0x8f = dsb osh 0xbf,0xf3,0x42,0x8f = dsb oshst 0xbf,0xf3,0x41,0x8f = dsb #0x1 0xbf,0xf3,0x40,0x8f = dsb #0x0 0xbf,0xf3,0x4f,0x8f = dsb sy 0xbf,0xf3,0x4e,0x8f = dsb st 0xbf,0xf3,0x4b,0x8f = dsb ish 0xbf,0xf3,0x4b,0x8f = dsb ish 0xbf,0xf3,0x4a,0x8f = dsb ishst 0xbf,0xf3,0x4a,0x8f = dsb ishst 0xbf,0xf3,0x47,0x8f = dsb nsh 0xbf,0xf3,0x47,0x8f = dsb nsh 0xbf,0xf3,0x46,0x8f = dsb nshst 0xbf,0xf3,0x46,0x8f = dsb nshst 0xbf,0xf3,0x43,0x8f = dsb osh 0xbf,0xf3,0x42,0x8f = dsb oshst 0xbf,0xf3,0x4f,0x8f = dsb sy 0x85,0xf4,0x70,0x44 = eor r4, r5, #61440 0x85,0xea,0x06,0x04 = eor.w r4, r5, r6 0x85,0xea,0x46,0x14 = eor.w r4, r5, r6, lsl #5 0x85,0xea,0x56,0x14 = eor.w r4, r5, r6, lsr #5 0x85,0xea,0x56,0x14 = eor.w r4, r5, r6, lsr #5 0x85,0xea,0x66,0x14 = eor.w r4, r5, r6, asr #5 0x85,0xea,0x76,0x14 = eor.w r4, r5, r6, ror #5 0xbf,0xf3,0x6f,0x8f = isb sy 0xbf,0xf3,0x6f,0x8f = isb sy 0xbf,0xf3,0x6f,0x8f = isb sy 0xbf,0xf3,0x61,0x8f = isb #0x1 0x0d,0xbf = iteet eq 0x88,0x18 = addeq r0, r1, r2 0x00,0xbf = nopne 0xf5,0x1b = subne r5, r6, r7 0x0d,0xbf = iteet eq 0x88,0x18 = addeq r0, r1, r2 0x00,0xbf = nopne 0xf5,0x1b = subne r5, r6, r7 0x91,0xfd,0x01,0x80 = ldc2 p0, c8, [r1, #4] 0x92,0xfd,0x00,0x71 = ldc2 p1, c7, [r2] 0x13,0xfd,0x38,0x62 = ldc2 p2, c6, [r3, #-224] 0x34,0xfd,0x1e,0x53 = ldc2 p3, c5, [r4, #-120]! 0xb5,0xfc,0x04,0x44 = ldc2 p4, c4, [r5], #16 0x36,0xfc,0x12,0x35 = ldc2 p5, c3, [r6], #-72 0xd7,0xfd,0x01,0x26 = ldc2l p6, c2, [r7, #4] 0xd8,0xfd,0x00,0x17 = ldc2l p7, c1, [r8] 0x59,0xfd,0x38,0x08 = ldc2l p8, c0, [r9, #-224] 0x7a,0xfd,0x1e,0x19 = ldc2l p9, c1, [r10, #-120]! 0xfb,0xfc,0x04,0x20 = ldc2l p0, c2, [r11], #16 0x7c,0xfc,0x12,0x31 = ldc2l p1, c3, [r12], #-72 0x90,0xed,0x01,0x4c = ldc p12, c4, [r0, #4] 0x91,0xed,0x00,0x5d = ldc p13, c5, [r1] 0x12,0xed,0x38,0x6e = ldc p14, c6, [r2, #-224] 0x33,0xed,0x1e,0x7f = ldc p15, c7, [r3, #-120]! 0xb4,0xec,0x04,0x85 = ldc p5, c8, [r4], #16 0x35,0xec,0x12,0x94 = ldc p4, c9, [r5], #-72 0xd6,0xed,0x01,0xa3 = ldcl p3, c10, [r6, #4] 0xd7,0xed,0x00,0xb2 = ldcl p2, c11, [r7] 0x58,0xed,0x38,0xc1 = ldcl p1, c12, [r8, #-224] 0x79,0xed,0x1e,0xd0 = ldcl p0, c13, [r9, #-120]! 0xfa,0xec,0x04,0xe6 = ldcl p6, c14, [r10], #16 0x7b,0xec,0x12,0xf7 = ldcl p7, c15, [r11], #-72 0x91,0xfc,0x19,0x82 = ldc2 p2, c8, [r1], {25} 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} 0xb5,0xe8,0x06,0x00 = ldm.w r5!, {r1, r2} 0x92,0xe8,0x06,0x00 = ldm.w r2, {r1, r2} 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} 0xbd,0xe8,0xf0,0x8f = pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc} 0x14,0xe9,0x30,0x03 = ldmdb r4, {r4, r5, r8, r9} 0x14,0xe9,0x60,0x00 = ldmdb r4, {r5, r6} 0x35,0xe9,0x08,0x01 = ldmdb r5!, {r3, r8} 0x35,0xe9,0x08,0x01 = ldmdb r5!, {r3, r8} 0x14,0xe9,0x60,0x00 = ldmdb r4, {r5, r6} 0x35,0xe9,0x08,0x01 = ldmdb r5!, {r3, r8} 0x55,0xf8,0x04,0x5c = ldr r5, [r5, #-4] 0x35,0x6a = ldr r5, [r6, #32] 0xd6,0xf8,0x21,0x50 = ldr.w r5, [r6, #33] 0xd6,0xf8,0x01,0x51 = ldr.w r5, [r6, #257] 0xd7,0xf8,0x01,0xf1 = ldr.w pc, [r7, #257] 0x54,0xf8,0xff,0x2f = ldr r2, [r4, #255]! 0x5d,0xf8,0x04,0x8f = ldr r8, [sp, #4]! 0x5d,0xf8,0x04,0xed = ldr lr, [sp, #-4]! 0x54,0xf8,0xff,0x2b = ldr r2, [r4], #255 0x5d,0xf8,0x04,0x8b = ldr r8, [sp], #4 0x5d,0xf8,0x04,0xe9 = ldr lr, [sp], #-4 0x02,0x4f = ldr r7, [pc, #8] 0x02,0x4f = ldr r7, [pc, #8] 0xdf,0xf8,0x08,0x70 = ldr.w r7, [pc, #8] 0xff,0x4c = ldr r4, [pc, #1020] 0x5f,0xf8,0xfc,0x33 = ldr.w r3, [pc, #-1020] 0xdf,0xf8,0x00,0x64 = ldr.w r6, [pc, #1024] 0x5f,0xf8,0x00,0x04 = ldr.w r0, [pc, #-1024] 0xdf,0xf8,0xff,0x2f = ldr.w r2, [pc, #4095] 0x5f,0xf8,0xff,0x1f = ldr.w r1, [pc, #-4095] 0xdf,0xf8,0x84,0x80 = ldr.w r8, [pc, #132] 0xdf,0xf8,0x00,0xf1 = ldr.w pc, [pc, #256] 0x5f,0xf8,0x90,0xf1 = ldr.w pc, [pc, #-400] 0x1f,0xf8,0x00,0x90 = ldrb.w r9, [pc, #-0] 0x1f,0xf9,0x00,0xb0 = ldrsb.w r11, [pc, #-0] 0x3f,0xf8,0x00,0xa0 = ldrh.w r10, [pc, #-0] 0x3f,0xf9,0x00,0x10 = ldrsh.w r1, [pc, #-0] 0x5f,0xf8,0x00,0x50 = ldr.w r5, [pc, #-0] 0x58,0xf8,0x01,0x10 = ldr.w r1, [r8, r1] 0x55,0xf8,0x02,0x40 = ldr.w r4, [r5, r2] 0x50,0xf8,0x32,0x60 = ldr.w r6, [r0, r2, lsl #3] 0x58,0xf8,0x22,0x80 = ldr.w r8, [r8, r2, lsl #2] 0x5d,0xf8,0x12,0x70 = ldr.w r7, [sp, r2, lsl #1] 0x5d,0xf8,0x02,0x70 = ldr.w r7, [sp, r2] 0x15,0xf8,0x04,0x5c = ldrb r5, [r5, #-4] 0x96,0xf8,0x20,0x50 = ldrb.w r5, [r6, #32] 0x96,0xf8,0x21,0x50 = ldrb.w r5, [r6, #33] 0x96,0xf8,0x01,0x51 = ldrb.w r5, [r6, #257] 0x97,0xf8,0x01,0xe1 = ldrb.w lr, [r7, #257] 0x18,0xf8,0xff,0x5f = ldrb r5, [r8, #255]! 0x15,0xf8,0x04,0x2f = ldrb r2, [r5, #4]! 0x14,0xf8,0x04,0x1d = ldrb r1, [r4, #-4]! 0x13,0xf8,0xff,0xeb = ldrb lr, [r3], #255 0x12,0xf8,0x04,0x9b = ldrb r9, [r2], #4 0x1d,0xf8,0x04,0x39 = ldrb r3, [sp], #-4 0x18,0xf8,0x01,0x10 = ldrb.w r1, [r8, r1] 0x15,0xf8,0x02,0x40 = ldrb.w r4, [r5, r2] 0x10,0xf8,0x32,0x60 = ldrb.w r6, [r0, r2, lsl #3] 0x18,0xf8,0x22,0x80 = ldrb.w r8, [r8, r2, lsl #2] 0x1d,0xf8,0x12,0x70 = ldrb.w r7, [sp, r2, lsl #1] 0x1d,0xf8,0x02,0x70 = ldrb.w r7, [sp, r2] 0x12,0xf8,0x00,0x1e = ldrbt r1, [r2] 0x18,0xf8,0x00,0x1e = ldrbt r1, [r8] 0x18,0xf8,0x03,0x1e = ldrbt r1, [r8, #3] 0x18,0xf8,0xff,0x1e = ldrbt r1, [r8, #255] 0xd6,0xe9,0x06,0x35 = ldrd r3, r5, [r6, #24] 0xf6,0xe9,0x06,0x35 = ldrd r3, r5, [r6, #24]! 0xf6,0xe8,0x01,0x35 = ldrd r3, r5, [r6], #4 0x76,0xe8,0x02,0x35 = ldrd r3, r5, [r6], #-8 0xd6,0xe9,0x00,0x35 = ldrd r3, r5, [r6] 0xd3,0xe9,0x00,0x81 = ldrd r8, r1, [r3] 0x52,0xe9,0x00,0x01 = ldrd r0, r1, [r2, #-0] 0x72,0xe9,0x00,0x01 = ldrd r0, r1, [r2, #-0]! 0x72,0xe8,0x00,0x01 = ldrd r0, r1, [r2], #-0 0x54,0xe8,0x00,0x1f = ldrex r1, [r4] 0x54,0xe8,0x00,0x8f = ldrex r8, [r4] 0x5d,0xe8,0x20,0x2f = ldrex r2, [sp, #128] 0xd7,0xe8,0x4f,0x5f = ldrexb r5, [r7] 0xdc,0xe8,0x5f,0x9f = ldrexh r9, [r12] 0xd4,0xe8,0x7f,0x93 = ldrexd r9, r3, [r4] 0x35,0xf8,0x04,0x5c = ldrh r5, [r5, #-4] 0x35,0x8c = ldrh r5, [r6, #32] 0xb6,0xf8,0x21,0x50 = ldrh.w r5, [r6, #33] 0xb6,0xf8,0x01,0x51 = ldrh.w r5, [r6, #257] 0xb7,0xf8,0x01,0xe1 = ldrh.w lr, [r7, #257] 0x38,0xf8,0xff,0x5f = ldrh r5, [r8, #255]! 0x35,0xf8,0x04,0x2f = ldrh r2, [r5, #4]! 0x34,0xf8,0x04,0x1d = ldrh r1, [r4, #-4]! 0x33,0xf8,0xff,0xeb = ldrh lr, [r3], #255 0x32,0xf8,0x04,0x9b = ldrh r9, [r2], #4 0x3d,0xf8,0x04,0x39 = ldrh r3, [sp], #-4 0x38,0xf8,0x01,0x10 = ldrh.w r1, [r8, r1] 0x35,0xf8,0x02,0x40 = ldrh.w r4, [r5, r2] 0x30,0xf8,0x32,0x60 = ldrh.w r6, [r0, r2, lsl #3] 0x38,0xf8,0x22,0x80 = ldrh.w r8, [r8, r2, lsl #2] 0x3d,0xf8,0x12,0x70 = ldrh.w r7, [sp, r2, lsl #1] 0x3d,0xf8,0x02,0x70 = ldrh.w r7, [sp, r2] 0x32,0xf8,0x00,0x1e = ldrht r1, [r2] 0x38,0xf8,0x00,0x1e = ldrht r1, [r8] 0x38,0xf8,0x03,0x1e = ldrht r1, [r8, #3] 0x38,0xf8,0xff,0x1e = ldrht r1, [r8, #255] 0x15,0xf9,0x04,0x5c = ldrsb r5, [r5, #-4] 0x96,0xf9,0x20,0x50 = ldrsb.w r5, [r6, #32] 0x96,0xf9,0x21,0x50 = ldrsb.w r5, [r6, #33] 0x96,0xf9,0x01,0x51 = ldrsb.w r5, [r6, #257] 0x97,0xf9,0x01,0xe1 = ldrsb.w lr, [r7, #257] 0x18,0xf9,0x01,0x10 = ldrsb.w r1, [r8, r1] 0x15,0xf9,0x02,0x40 = ldrsb.w r4, [r5, r2] 0x10,0xf9,0x32,0x60 = ldrsb.w r6, [r0, r2, lsl #3] 0x18,0xf9,0x22,0x80 = ldrsb.w r8, [r8, r2, lsl #2] 0x1d,0xf9,0x12,0x70 = ldrsb.w r7, [sp, r2, lsl #1] 0x1d,0xf9,0x02,0x70 = ldrsb.w r7, [sp, r2] 0x18,0xf9,0xff,0x5f = ldrsb r5, [r8, #255]! 0x15,0xf9,0x04,0x2f = ldrsb r2, [r5, #4]! 0x14,0xf9,0x04,0x1d = ldrsb r1, [r4, #-4]! 0x13,0xf9,0xff,0xeb = ldrsb lr, [r3], #255 0x12,0xf9,0x04,0x9b = ldrsb r9, [r2], #4 0x1d,0xf9,0x04,0x39 = ldrsb r3, [sp], #-4 0x12,0xf9,0x00,0x1e = ldrsbt r1, [r2] 0x18,0xf9,0x00,0x1e = ldrsbt r1, [r8] 0x18,0xf9,0x03,0x1e = ldrsbt r1, [r8, #3] 0x18,0xf9,0xff,0x1e = ldrsbt r1, [r8, #255] 0x35,0xf9,0x04,0x5c = ldrsh r5, [r5, #-4] 0xb6,0xf9,0x20,0x50 = ldrsh.w r5, [r6, #32] 0xb6,0xf9,0x21,0x50 = ldrsh.w r5, [r6, #33] 0xb6,0xf9,0x01,0x51 = ldrsh.w r5, [r6, #257] 0xb7,0xf9,0x01,0xe1 = ldrsh.w lr, [r7, #257] 0x38,0xf9,0x01,0x10 = ldrsh.w r1, [r8, r1] 0x35,0xf9,0x02,0x40 = ldrsh.w r4, [r5, r2] 0x30,0xf9,0x32,0x60 = ldrsh.w r6, [r0, r2, lsl #3] 0x38,0xf9,0x22,0x80 = ldrsh.w r8, [r8, r2, lsl #2] 0x3d,0xf9,0x12,0x70 = ldrsh.w r7, [sp, r2, lsl #1] 0x3d,0xf9,0x02,0x70 = ldrsh.w r7, [sp, r2] 0x38,0xf9,0xff,0x5f = ldrsh r5, [r8, #255]! 0x35,0xf9,0x04,0x2f = ldrsh r2, [r5, #4]! 0x34,0xf9,0x04,0x1d = ldrsh r1, [r4, #-4]! 0x33,0xf9,0xff,0xeb = ldrsh lr, [r3], #255 0x32,0xf9,0x04,0x9b = ldrsh r9, [r2], #4 0x3d,0xf9,0x04,0x39 = ldrsh r3, [sp], #-4 0x32,0xf9,0x00,0x1e = ldrsht r1, [r2] 0x38,0xf9,0x00,0x1e = ldrsht r1, [r8] 0x38,0xf9,0x03,0x1e = ldrsht r1, [r8, #3] 0x38,0xf9,0xff,0x1e = ldrsht r1, [r8, #255] 0x52,0xf8,0x00,0x1e = ldrt r1, [r2] 0x56,0xf8,0x00,0x2e = ldrt r2, [r6] 0x57,0xf8,0x03,0x3e = ldrt r3, [r7, #3] 0x59,0xf8,0xff,0x4e = ldrt r4, [r9, #255] 0x4f,0xea,0x03,0x32 = lsl.w r2, r3, #12 0x5f,0xea,0xc3,0x78 = lsls.w r8, r3, #31 0x5f,0xea,0x43,0x02 = lsls.w r2, r3, #1 0x4f,0xea,0x03,0x12 = lsl.w r2, r3, #4 0x5f,0xea,0xcc,0x32 = lsls.w r2, r12, #15 0x4f,0xea,0xc3,0x43 = lsl.w r3, r3, #19 0x5f,0xea,0x88,0x08 = lsls.w r8, r8, #2 0x5f,0xea,0x47,0x17 = lsls.w r7, r7, #5 0x4f,0xea,0x4c,0x5c = lsl.w r12, r12, #21 0x04,0xfa,0x02,0xf3 = lsl.w r3, r4, r2 0x01,0xfa,0x02,0xf1 = lsl.w r1, r1, r2 0x14,0xfa,0x08,0xf3 = lsls.w r3, r4, r8 0x4f,0xea,0x13,0x32 = lsr.w r2, r3, #12 0x5f,0xea,0x13,0x08 = lsrs.w r8, r3, #32 0x5f,0xea,0x53,0x02 = lsrs.w r2, r3, #1 0x4f,0xea,0x13,0x12 = lsr.w r2, r3, #4 0x5f,0xea,0xdc,0x32 = lsrs.w r2, r12, #15 0x4f,0xea,0xd3,0x43 = lsr.w r3, r3, #19 0x5f,0xea,0x98,0x08 = lsrs.w r8, r8, #2 0x5f,0xea,0x57,0x17 = lsrs.w r7, r7, #5 0x4f,0xea,0x5c,0x5c = lsr.w r12, r12, #21 0x24,0xfa,0x02,0xf3 = lsr.w r3, r4, r2 0x21,0xfa,0x02,0xf1 = lsr.w r1, r1, r2 0x34,0xfa,0x08,0xf3 = lsrs.w r3, r4, r8 0x21,0xee,0x91,0x57 = mcr p7, #1, r5, c1, c1, #4 0x21,0xfe,0x91,0x57 = mcr2 p7, #1, r5, c1, c1, #4 0x00,0xee,0x15,0x4e = mcr p14, #0, r4, c0, c5, #0 0x41,0xfe,0x13,0x24 = mcr2 p4, #2, r2, c1, c3, #0 0x44,0xec,0xf1,0x57 = mcrr p7, #15, r5, r4, c1 0x44,0xfc,0xf1,0x57 = mcrr2 p7, #15, r5, r4, c1 0x02,0xfb,0x03,0x41 = mla r1, r2, r3, r4 0x02,0xfb,0x13,0x41 = mls r1, r2, r3, r4 0x15,0x21 = movs r1, #21 0x5f,0xf0,0x15,0x01 = movs.w r1, #21 0x5f,0xf0,0x15,0x08 = movs.w r8, #21 0x4f,0xf6,0xff,0x70 = movw r0, #65535 0x4a,0xf6,0x01,0x31 = movw r1, #43777 0x4a,0xf6,0x10,0x31 = movw r1, #43792 0x4f,0xf0,0x7f,0x70 = mov.w r0, #66846720 0x4f,0xf0,0x7f,0x70 = mov.w r0, #66846720 0x5f,0xf0,0x7f,0x70 = movs.w r0, #66846720 0x06,0xbf = itte eq 0x5f,0xf0,0x0c,0x01 = movseq.w r1, #12 0x0c,0x21 = moveq r1, #12 0x4f,0xf0,0x0c,0x01 = movne.w r1, #12 0x4f,0xf4,0xe1,0x76 = mov.w r6, #450 0x38,0xbf = it lo 0x4f,0xf0,0xff,0x31 = movlo.w r1, #-1 0x6f,0xf0,0x02,0x03 = mvn r3, #2 0x4a,0xf6,0xcd,0x3b = movw r11, #43981 0x01,0x20 = movs r0, #1 0x18,0xbf = it ne 0x0f,0x23 = movne r3, #15 0x04,0xbf = itt eq 0xff,0x20 = moveq r0, #255 0x40,0xf2,0x00,0x11 = movweq r1, #256 0x4f,0xea,0x02,0x46 = lsl.w r6, r2, #16 0x4f,0xea,0x12,0x46 = lsr.w r6, r2, #16 0x16,0x10 = asrs r6, r2, #32 0x5f,0xea,0x72,0x16 = rors.w r6, r2, #5 0xac,0x40 = lsls r4, r5 0xec,0x40 = lsrs r4, r5 0x2c,0x41 = asrs r4, r5 0xec,0x41 = rors r4, r5 0x04,0xfa,0x05,0xf4 = lsl.w r4, r4, r5 0x74,0xfa,0x08,0xf4 = rors.w r4, r4, r8 0x35,0xfa,0x06,0xf4 = lsrs.w r4, r5, r6 0x01,0xbf = itttt eq 0xac,0x40 = lsleq r4, r5 0xec,0x40 = lsreq r4, r5 0x2c,0x41 = asreq r4, r5 0xec,0x41 = roreq r4, r5 0x4f,0xea,0x34,0x04 = rrx r4, r4 0xc0,0xf2,0x07,0x03 = movt r3, #7 0xcf,0xf6,0xff,0x76 = movt r6, #65535 0x08,0xbf = it eq 0xc0,0xf6,0xf0,0x74 = movteq r4, #4080 0x11,0xee,0x92,0x1e = mrc p14, #0, r1, c1, c2, #4 0xff,0xee,0xd6,0xff = mrc p15, #7, apsr_nzcv, c15, c6, #6 0x32,0xee,0x12,0x19 = mrc p9, #1, r1, c2, c2, #0 0x73,0xfe,0x14,0x3c = mrc2 p12, #3, r3, c3, c4, #0 0x11,0xfe,0x92,0x1e = mrc2 p14, #0, r1, c1, c2, #4 0xff,0xfe,0x30,0xf8 = mrc2 p8, #7, apsr_nzcv, c15, c0, #1 0x54,0xec,0x11,0x57 = mrrc p7, #1, r5, r4, c1 0x54,0xfc,0x11,0x57 = mrrc2 p7, #1, r5, r4, c1 0xef,0xf3,0x00,0x88 = mrs r8, apsr 0xef,0xf3,0x00,0x88 = mrs r8, apsr 0xff,0xf3,0x00,0x88 = mrs r8, spsr 0x81,0xf3,0x00,0x88 = msr APSR_nzcvq, r1 0x82,0xf3,0x00,0x84 = msr APSR_g, r2 0x83,0xf3,0x00,0x88 = msr APSR_nzcvq, r3 0x84,0xf3,0x00,0x88 = msr APSR_nzcvq, r4 0x85,0xf3,0x00,0x8c = msr APSR_nzcvqg, r5 0x86,0xf3,0x00,0x89 = msr CPSR_fc, r6 0x87,0xf3,0x00,0x81 = msr CPSR_c, r7 0x88,0xf3,0x00,0x82 = msr CPSR_x, r8 0x89,0xf3,0x00,0x89 = msr CPSR_fc, r9 0x8b,0xf3,0x00,0x89 = msr CPSR_fc, r11 0x8c,0xf3,0x00,0x8e = msr CPSR_fsx, r12 0x90,0xf3,0x00,0x89 = msr SPSR_fc, r0 0x95,0xf3,0x00,0x8f = msr SPSR_fsxc, r5 0x88,0xf3,0x00,0x8f = msr CPSR_fsxc, r8 0x83,0xf3,0x00,0x89 = msr CPSR_fc, r3 0x63,0x43 = muls r3, r4, r3 0x04,0xfb,0x03,0xf3 = mul r3, r4, r3 0x04,0xfb,0x06,0xf3 = mul r3, r4, r6 0x08,0xbf = it eq 0x04,0xfb,0x05,0xf3 = muleq r3, r4, r5 0xd8,0xbf = it le 0x04,0xfb,0x08,0xf4 = mulle r4, r4, r8 0x06,0xfb,0x05,0xf5 = mul r5, r6, r5 0x7f,0xf0,0x15,0x08 = mvns r8, #21 0x6f,0xf0,0x7f,0x70 = mvn r0, #66846720 0x7f,0xf0,0x7f,0x70 = mvns r0, #66846720 0x06,0xbf = itte eq 0x7f,0xf0,0x0c,0x01 = mvnseq r1, #12 0x6f,0xf0,0x0c,0x01 = mvneq r1, #12 0x6f,0xf0,0x0c,0x01 = mvnne r1, #12 0x6f,0xea,0x03,0x02 = mvn.w r2, r3 0xda,0x43 = mvns r2, r3 0x6f,0xea,0xc6,0x45 = mvn.w r5, r6, lsl #19 0x6f,0xea,0x56,0x25 = mvn.w r5, r6, lsr #9 0x6f,0xea,0x26,0x15 = mvn.w r5, r6, asr #4 0x6f,0xea,0xb6,0x15 = mvn.w r5, r6, ror #6 0x6f,0xea,0x36,0x05 = mvn.w r5, r6, rrx 0x08,0xbf = it eq 0xda,0x43 = mvneq r2, r3 0xc2,0xf1,0x00,0x05 = rsb.w r5, r2, #0 0xc8,0xf1,0x00,0x05 = rsb.w r5, r8, #0 0xaf,0xf3,0x00,0x80 = nop.w 0x65,0xf4,0x70,0x44 = orn r4, r5, #61440 0x65,0xea,0x06,0x04 = orn r4, r5, r6 0x75,0xea,0x06,0x04 = orns r4, r5, r6 0x65,0xea,0x46,0x14 = orn r4, r5, r6, lsl #5 0x75,0xea,0x56,0x14 = orns r4, r5, r6, lsr #5 0x65,0xea,0x56,0x14 = orn r4, r5, r6, lsr #5 0x75,0xea,0x66,0x14 = orns r4, r5, r6, asr #5 0x65,0xea,0x76,0x14 = orn r4, r5, r6, ror #5 0x45,0xf4,0x70,0x44 = orr r4, r5, #61440 0x45,0xea,0x06,0x04 = orr.w r4, r5, r6 0x45,0xea,0x46,0x14 = orr.w r4, r5, r6, lsl #5 0x55,0xea,0x56,0x14 = orrs.w r4, r5, r6, lsr #5 0x45,0xea,0x56,0x14 = orr.w r4, r5, r6, lsr #5 0x55,0xea,0x66,0x14 = orrs.w r4, r5, r6, asr #5 0x45,0xea,0x76,0x14 = orr.w r4, r5, r6, ror #5 0xc2,0xea,0x03,0x02 = pkhbt r2, r2, r3 0xc2,0xea,0xc3,0x72 = pkhbt r2, r2, r3, lsl #31 0xc2,0xea,0x03,0x02 = pkhbt r2, r2, r3 0xc2,0xea,0xc3,0x32 = pkhbt r2, r2, r3, lsl #15 0xc2,0xea,0x03,0x02 = pkhbt r2, r2, r3 0xc2,0xea,0xe3,0x72 = pkhtb r2, r2, r3, asr #31 0xc2,0xea,0xe3,0x32 = pkhtb r2, r2, r3, asr #15 0x15,0xf8,0x04,0xfc = pld [r5, #-4] 0x96,0xf8,0x20,0xf0 = pld [r6, #32] 0x96,0xf8,0x21,0xf0 = pld [r6, #33] 0x96,0xf8,0x01,0xf1 = pld [r6, #257] 0x97,0xf8,0x01,0xf1 = pld [r7, #257] 0x91,0xf8,0x00,0xf0 = pld [r1] 0x11,0xf8,0x00,0xfc = pld [r1, #-0] 0x1f,0xf8,0xff,0xff = pld [pc, #-4095] 0x18,0xf8,0x01,0xf0 = pld [r8, r1] 0x15,0xf8,0x02,0xf0 = pld [r5, r2] 0x10,0xf8,0x32,0xf0 = pld [r0, r2, lsl #3] 0x18,0xf8,0x22,0xf0 = pld [r8, r2, lsl #2] 0x1d,0xf8,0x12,0xf0 = pld [sp, r2, lsl #1] 0x1d,0xf8,0x02,0xf0 = pld [sp, r2] 0x15,0xf9,0x04,0xfc = pli [r5, #-4] 0x96,0xf9,0x20,0xf0 = pli [r6, #32] 0x96,0xf9,0x21,0xf0 = pli [r6, #33] 0x96,0xf9,0x01,0xf1 = pli [r6, #257] 0x97,0xf9,0x01,0xf1 = pli [r7, #257] 0x9f,0xf9,0xff,0xff = pli [pc, #4095] 0x1f,0xf9,0xff,0xff = pli [pc, #-4095] 0x18,0xf9,0x01,0xf0 = pli [r8, r1] 0x15,0xf9,0x02,0xf0 = pli [r5, r2] 0x10,0xf9,0x32,0xf0 = pli [r0, r2, lsl #3] 0x18,0xf9,0x22,0xf0 = pli [r8, r2, lsl #2] 0x1d,0xf9,0x12,0xf0 = pli [sp, r2, lsl #1] 0x1d,0xf9,0x02,0xf0 = pli [sp, r2] 0xbd,0xe8,0x04,0x02 = pop.w {r2, r9} 0x2d,0xe9,0x04,0x02 = push.w {r2, r9} 0x83,0xfa,0x82,0xf1 = qadd r1, r2, r3 0x92,0xfa,0x13,0xf1 = qadd16 r1, r2, r3 0x82,0xfa,0x13,0xf1 = qadd8 r1, r2, r3 0xc6,0xbf = itte gt 0x83,0xfa,0x82,0xf1 = qaddgt r1, r2, r3 0x92,0xfa,0x13,0xf1 = qadd16gt r1, r2, r3 0x82,0xfa,0x13,0xf1 = qadd8le r1, r2, r3 0x88,0xfa,0x97,0xf6 = qdadd r6, r7, r8 0x88,0xfa,0xb7,0xf6 = qdsub r6, r7, r8 0x84,0xbf = itt hi 0x88,0xfa,0x97,0xf6 = qdaddhi r6, r7, r8 0x88,0xfa,0xb7,0xf6 = qdsubhi r6, r7, r8 0xec,0xfa,0x10,0xf9 = qsax r9, r12, r0 0x08,0xbf = it eq 0xec,0xfa,0x10,0xf9 = qsaxeq r9, r12, r0 0x83,0xfa,0xa2,0xf1 = qsub r1, r2, r3 0xd2,0xfa,0x13,0xf1 = qsub16 r1, r2, r3 0xc2,0xfa,0x13,0xf1 = qsub8 r1, r2, r3 0xd6,0xbf = itet le 0x83,0xfa,0xa2,0xf1 = qsuble r1, r2, r3 0xd2,0xfa,0x13,0xf1 = qsub16gt r1, r2, r3 0xc2,0xfa,0x13,0xf1 = qsub8le r1, r2, r3 0x92,0xfa,0xa2,0xf1 = rbit r1, r2 0x18,0xbf = it ne 0x92,0xfa,0xa2,0xf1 = rbitne r1, r2 0x92,0xfa,0x82,0xf1 = rev.w r1, r2 0x98,0xfa,0x88,0xf2 = rev.w r2, r8 0x1c,0xbf = itt ne 0x11,0xba = revne r1, r2 0x98,0xfa,0x88,0xf1 = revne.w r1, r8 0x92,0xfa,0x92,0xf1 = rev16.w r1, r2 0x98,0xfa,0x98,0xf2 = rev16.w r2, r8 0x1c,0xbf = itt ne 0x51,0xba = rev16ne r1, r2 0x98,0xfa,0x98,0xf1 = rev16ne.w r1, r8 0x92,0xfa,0xb2,0xf1 = revsh.w r1, r2 0x98,0xfa,0xb8,0xf2 = revsh.w r2, r8 0x1c,0xbf = itt ne 0xd1,0xba = revshne r1, r2 0x98,0xfa,0xb8,0xf1 = revshne.w r1, r8 0x4f,0xea,0x33,0x32 = ror.w r2, r3, #12 0x5f,0xea,0xf3,0x78 = rors.w r8, r3, #31 0x5f,0xea,0x73,0x02 = rors.w r2, r3, #1 0x4f,0xea,0x33,0x12 = ror.w r2, r3, #4 0x5f,0xea,0xfc,0x32 = rors.w r2, r12, #15 0x4f,0xea,0xf3,0x43 = ror.w r3, r3, #19 0x5f,0xea,0xb8,0x08 = rors.w r8, r8, #2 0x5f,0xea,0x77,0x17 = rors.w r7, r7, #5 0x4f,0xea,0x7c,0x5c = ror.w r12, r12, #21 0x64,0xfa,0x02,0xf3 = ror.w r3, r4, r2 0x61,0xfa,0x02,0xf1 = ror.w r1, r1, r2 0x74,0xfa,0x08,0xf3 = rors.w r3, r4, r8 0x4f,0xea,0x32,0x01 = rrx r1, r2 0x5f,0xea,0x32,0x01 = rrxs r1, r2 0xb4,0xbf = ite lt 0x4f,0xea,0x3c,0x09 = rrxlt r9, r12 0x5f,0xea,0x33,0x08 = rrxsge r8, r3 0xc5,0xf5,0x7f,0x22 = rsb.w r2, r5, #1044480 0xdc,0xf1,0x0f,0x03 = rsbs.w r3, r12, #15 0xc1,0xf1,0xff,0x01 = rsb.w r1, r1, #255 0xc1,0xf1,0xff,0x01 = rsb.w r1, r1, #255 0xcb,0xf1,0x00,0x0b = rsb.w r11, r11, #0 0xc9,0xf1,0x00,0x09 = rsb.w r9, r9, #0 0x4b,0x42 = rsbs r3, r1, #0 0xc1,0xf1,0x00,0x03 = rsb.w r3, r1, #0 0xc4,0xeb,0x08,0x04 = rsb r4, r4, r8 0xc9,0xeb,0x08,0x04 = rsb r4, r9, r8 0xc4,0xeb,0xe8,0x01 = rsb r1, r4, r8, asr #3 0xd1,0xeb,0x47,0x02 = rsbs r2, r1, r7, lsl #1 0x94,0xfa,0x08,0xf3 = sadd16 r3, r4, r8 0x18,0xbf = it ne 0x94,0xfa,0x08,0xf3 = sadd16ne r3, r4, r8 0x84,0xfa,0x08,0xf3 = sadd8 r3, r4, r8 0x18,0xbf = it ne 0x84,0xfa,0x08,0xf3 = sadd8ne r3, r4, r8 0xa2,0xfa,0x07,0xf9 = sasx r9, r2, r7 0x18,0xbf = it ne 0xa5,0xfa,0x06,0xf2 = sasxne r2, r5, r6 0xa2,0xfa,0x07,0xf9 = sasx r9, r2, r7 0x18,0xbf = it ne 0xa5,0xfa,0x06,0xf2 = sasxne r2, r5, r6 0x61,0xf1,0x04,0x00 = sbc r0, r1, #4 0x71,0xf1,0x00,0x00 = sbcs r0, r1, #0 0x62,0xf1,0xff,0x01 = sbc r1, r2, #255 0x67,0xf1,0x55,0x13 = sbc r3, r7, #5570645 0x6c,0xf1,0xaa,0x28 = sbc r8, r12, #2852170240 0x67,0xf1,0xa5,0x39 = sbc r9, r7, #2779096485 0x63,0xf1,0x07,0x45 = sbc r5, r3, #2264924160 0x62,0xf1,0xff,0x44 = sbc r4, r2, #2139095040 0x62,0xf5,0xd0,0x64 = sbc r4, r2, #1664 0x65,0xeb,0x06,0x04 = sbc.w r4, r5, r6 0x75,0xeb,0x06,0x04 = sbcs.w r4, r5, r6 0x61,0xeb,0x03,0x09 = sbc.w r9, r1, r3 0x71,0xeb,0x03,0x09 = sbcs.w r9, r1, r3 0x61,0xeb,0x33,0x10 = sbc.w r0, r1, r3, ror #4 0x71,0xeb,0xc3,0x10 = sbcs.w r0, r1, r3, lsl #7 0x61,0xeb,0xd3,0x70 = sbc.w r0, r1, r3, lsr #31 0x71,0xeb,0x23,0x00 = sbcs.w r0, r1, r3, asr #32 0x45,0xf3,0x00,0x44 = sbfx r4, r5, #16, #1 0xc8,0xbf = it gt 0x45,0xf3,0x0f,0x44 = sbfxgt r4, r5, #16, #16 0xa9,0xfa,0x82,0xf5 = sel r5, r9, r2 0xd8,0xbf = it le 0xa9,0xfa,0x82,0xf5 = selle r5, r9, r2 0xaf,0xf3,0x04,0x80 = sev.w 0x08,0xbf = it eq 0xaf,0xf3,0x04,0x80 = seveq.w 0x92,0xfa,0x03,0xf1 = sadd16 r1, r2, r3 0x82,0xfa,0x03,0xf1 = sadd8 r1, r2, r3 0xcc,0xbf = ite gt 0x92,0xfa,0x03,0xf1 = sadd16gt r1, r2, r3 0x82,0xfa,0x03,0xf1 = sadd8le r1, r2, r3 0xa8,0xfa,0x22,0xf4 = shasx r4, r8, r2 0xc8,0xbf = it gt 0xa8,0xfa,0x22,0xf4 = shasxgt r4, r8, r2 0xa8,0xfa,0x22,0xf4 = shasx r4, r8, r2 0xc8,0xbf = it gt 0xa8,0xfa,0x22,0xf4 = shasxgt r4, r8, r2 0xe8,0xfa,0x22,0xf4 = shsax r4, r8, r2 0xc8,0xbf = it gt 0xe8,0xfa,0x22,0xf4 = shsaxgt r4, r8, r2 0xe8,0xfa,0x22,0xf4 = shsax r4, r8, r2 0xc8,0xbf = it gt 0xe8,0xfa,0x22,0xf4 = shsaxgt r4, r8, r2 0xd8,0xfa,0x22,0xf4 = shsub16 r4, r8, r2 0xc8,0xfa,0x22,0xf4 = shsub8 r4, r8, r2 0xc4,0xbf = itt gt 0xd8,0xfa,0x22,0xf4 = shsub16gt r4, r8, r2 0xc8,0xfa,0x22,0xf4 = shsub8gt r4, r8, r2 0x11,0xfb,0x09,0x03 = smlabb r3, r1, r9, r0 0x16,0xfb,0x14,0x15 = smlabt r5, r6, r4, r1 0x12,0xfb,0x23,0x24 = smlatb r4, r2, r3, r2 0x13,0xfb,0x38,0x48 = smlatt r8, r3, r8, r4 0xcb,0xbf = itete gt 0x11,0xfb,0x09,0x03 = smlabbgt r3, r1, r9, r0 0x16,0xfb,0x14,0x15 = smlabtle r5, r6, r4, r1 0x12,0xfb,0x23,0x24 = smlatbgt r4, r2, r3, r2 0x13,0xfb,0x38,0x48 = smlattle r8, r3, r8, r4 0x23,0xfb,0x05,0x82 = smlad r2, r3, r5, r8 0x23,0xfb,0x15,0x82 = smladx r2, r3, r5, r8 0x84,0xbf = itt hi 0x23,0xfb,0x05,0x82 = smladhi r2, r3, r5, r8 0x23,0xfb,0x15,0x82 = smladxhi r2, r3, r5, r8 0xc5,0xfb,0x08,0x23 = smlal r2, r3, r5, r8 0x08,0xbf = it eq 0xc5,0xfb,0x08,0x23 = smlaleq r2, r3, r5, r8 0xc9,0xfb,0x80,0x31 = smlalbb r3, r1, r9, r0 0xc4,0xfb,0x91,0x56 = smlalbt r5, r6, r4, r1 0xc3,0xfb,0xa2,0x42 = smlaltb r4, r2, r3, r2 0xc8,0xfb,0xb4,0x83 = smlaltt r8, r3, r8, r4 0xad,0xbf = iteet ge 0xc9,0xfb,0x80,0x31 = smlalbbge r3, r1, r9, r0 0xc4,0xfb,0x91,0x56 = smlalbtlt r5, r6, r4, r1 0xc3,0xfb,0xa2,0x42 = smlaltblt r4, r2, r3, r2 0xc8,0xfb,0xb4,0x83 = smlalttge r8, r3, r8, r4 0xc5,0xfb,0xc8,0x23 = smlald r2, r3, r5, r8 0xc5,0xfb,0xd8,0x23 = smlaldx r2, r3, r5, r8 0x0c,0xbf = ite eq 0xc5,0xfb,0xc8,0x23 = smlaldeq r2, r3, r5, r8 0xc5,0xfb,0xd8,0x23 = smlaldxne r2, r3, r5, r8 0x33,0xfb,0x0a,0x82 = smlawb r2, r3, r10, r8 0x33,0xfb,0x15,0x98 = smlawt r8, r3, r5, r9 0x0c,0xbf = ite eq 0x37,0xfb,0x05,0x82 = smlawbeq r2, r7, r5, r8 0x33,0xfb,0x10,0x81 = smlawtne r1, r3, r0, r8 0x43,0xfb,0x05,0x82 = smlsd r2, r3, r5, r8 0x43,0xfb,0x15,0x82 = smlsdx r2, r3, r5, r8 0xd4,0xbf = ite le 0x43,0xfb,0x05,0x82 = smlsdle r2, r3, r5, r8 0x43,0xfb,0x15,0x82 = smlsdxgt r2, r3, r5, r8 0xd5,0xfb,0xc1,0x29 = smlsld r2, r9, r5, r1 0xd2,0xfb,0xd8,0x4b = smlsldx r4, r11, r2, r8 0xac,0xbf = ite ge 0xd5,0xfb,0xc6,0x82 = smlsldge r8, r2, r5, r6 0xd3,0xfb,0xd8,0x10 = smlsldxlt r1, r0, r3, r8 0x52,0xfb,0x03,0x41 = smmla r1, r2, r3, r4 0x53,0xfb,0x12,0x14 = smmlar r4, r3, r2, r1 0x34,0xbf = ite lo 0x52,0xfb,0x03,0x41 = smmlalo r1, r2, r3, r4 0x53,0xfb,0x12,0x14 = smmlarhs r4, r3, r2, r1 0x62,0xfb,0x03,0x41 = smmls r1, r2, r3, r4 0x63,0xfb,0x12,0x14 = smmlsr r4, r3, r2, r1 0x34,0xbf = ite lo 0x62,0xfb,0x03,0x41 = smmlslo r1, r2, r3, r4 0x63,0xfb,0x12,0x14 = smmlsrhs r4, r3, r2, r1 0x53,0xfb,0x04,0xf2 = smmul r2, r3, r4 0x52,0xfb,0x11,0xf3 = smmulr r3, r2, r1 0x34,0xbf = ite lo 0x53,0xfb,0x04,0xf2 = smmullo r2, r3, r4 0x52,0xfb,0x11,0xf3 = smmulrhs r3, r2, r1 0x23,0xfb,0x04,0xf2 = smuad r2, r3, r4 0x22,0xfb,0x11,0xf3 = smuadx r3, r2, r1 0xb4,0xbf = ite lt 0x23,0xfb,0x04,0xf2 = smuadlt r2, r3, r4 0x22,0xfb,0x11,0xf3 = smuadxge r3, r2, r1 0x19,0xfb,0x00,0xf3 = smulbb r3, r9, r0 0x14,0xfb,0x11,0xf5 = smulbt r5, r4, r1 0x12,0xfb,0x22,0xf4 = smultb r4, r2, r2 0x13,0xfb,0x34,0xf8 = smultt r8, r3, r4 0xab,0xbf = itete ge 0x19,0xfb,0x00,0xf1 = smulbbge r1, r9, r0 0x16,0xfb,0x14,0xf5 = smulbtlt r5, r6, r4 0x13,0xfb,0x22,0xf2 = smultbge r2, r3, r2 0x13,0xfb,0x34,0xf8 = smulttlt r8, r3, r4 0x80,0xfb,0x01,0x39 = smull r3, r9, r0, r1 0x08,0xbf = it eq 0x84,0xfb,0x05,0x83 = smulleq r8, r3, r4, r5 0x39,0xfb,0x00,0xf3 = smulwb r3, r9, r0 0x39,0xfb,0x12,0xf3 = smulwt r3, r9, r2 0xcc,0xbf = ite gt 0x39,0xfb,0x00,0xf3 = smulwbgt r3, r9, r0 0x39,0xfb,0x12,0xf3 = smulwtle r3, r9, r2 0x40,0xfb,0x01,0xf3 = smusd r3, r0, r1 0x49,0xfb,0x12,0xf3 = smusdx r3, r9, r2 0x0c,0xbf = ite eq 0x43,0xfb,0x02,0xf8 = smusdeq r8, r3, r2 0x44,0xfb,0x13,0xf7 = smusdxne r7, r4, r3 0x0d,0xe8,0x01,0xc0 = srsdb sp, #1 0x8d,0xe9,0x00,0xc0 = srsia sp, #0 0x2d,0xe8,0x13,0xc0 = srsdb sp!, #19 0xad,0xe9,0x02,0xc0 = srsia sp!, #2 0x8d,0xe9,0x0a,0xc0 = srsia sp, #10 0x0d,0xe8,0x09,0xc0 = srsdb sp, #9 0xad,0xe9,0x05,0xc0 = srsia sp!, #5 0x2d,0xe8,0x05,0xc0 = srsdb sp!, #5 0x8d,0xe9,0x05,0xc0 = srsia sp, #5 0xad,0xe9,0x05,0xc0 = srsia sp!, #5 0x0d,0xe8,0x01,0xc0 = srsdb sp, #1 0x8d,0xe9,0x00,0xc0 = srsia sp, #0 0x2d,0xe8,0x13,0xc0 = srsdb sp!, #19 0xad,0xe9,0x02,0xc0 = srsia sp!, #2 0x8d,0xe9,0x0a,0xc0 = srsia sp, #10 0x0d,0xe8,0x09,0xc0 = srsdb sp, #9 0xad,0xe9,0x05,0xc0 = srsia sp!, #5 0x2d,0xe8,0x05,0xc0 = srsdb sp!, #5 0x8d,0xe9,0x05,0xc0 = srsia sp, #5 0xad,0xe9,0x05,0xc0 = srsia sp!, #5 0x0a,0xf3,0x00,0x08 = ssat r8, #1, r10 0x0a,0xf3,0x00,0x08 = ssat r8, #1, r10 0x0a,0xf3,0xc0,0x78 = ssat r8, #1, r10, lsl #31 0x2a,0xf3,0x40,0x08 = ssat r8, #1, r10, asr #1 0x27,0xf3,0x00,0x02 = ssat16 r2, #1, r7 0x25,0xf3,0x0f,0x03 = ssat16 r3, #16, r5 0xe3,0xfa,0x04,0xf2 = ssax r2, r3, r4 0xb8,0xbf = it lt 0xe3,0xfa,0x04,0xf2 = ssaxlt r2, r3, r4 0xe3,0xfa,0x04,0xf2 = ssax r2, r3, r4 0xb8,0xbf = it lt 0xe3,0xfa,0x04,0xf2 = ssaxlt r2, r3, r4 0xd0,0xfa,0x06,0xf1 = ssub16 r1, r0, r6 0xc2,0xfa,0x04,0xf9 = ssub8 r9, r2, r4 0x14,0xbf = ite ne 0xd3,0xfa,0x02,0xf5 = ssub16ne r5, r3, r2 0xc1,0xfa,0x02,0xf5 = ssub8eq r5, r1, r2 0x81,0xfd,0x01,0x80 = stc2 p0, c8, [r1, #4] 0x82,0xfd,0x00,0x71 = stc2 p1, c7, [r2] 0x03,0xfd,0x38,0x62 = stc2 p2, c6, [r3, #-224] 0x24,0xfd,0x1e,0x53 = stc2 p3, c5, [r4, #-120]! 0xa5,0xfc,0x04,0x44 = stc2 p4, c4, [r5], #16 0x26,0xfc,0x12,0x35 = stc2 p5, c3, [r6], #-72 0xc7,0xfd,0x01,0x26 = stc2l p6, c2, [r7, #4] 0xc8,0xfd,0x00,0x17 = stc2l p7, c1, [r8] 0x49,0xfd,0x38,0x08 = stc2l p8, c0, [r9, #-224] 0x6a,0xfd,0x1e,0x19 = stc2l p9, c1, [r10, #-120]! 0xeb,0xfc,0x04,0x20 = stc2l p0, c2, [r11], #16 0x6c,0xfc,0x12,0x31 = stc2l p1, c3, [r12], #-72 0x80,0xed,0x01,0x4c = stc p12, c4, [r0, #4] 0x81,0xed,0x00,0x5d = stc p13, c5, [r1] 0x02,0xed,0x38,0x6e = stc p14, c6, [r2, #-224] 0x23,0xed,0x1e,0x7f = stc p15, c7, [r3, #-120]! 0xa4,0xec,0x04,0x85 = stc p5, c8, [r4], #16 0x25,0xec,0x12,0x94 = stc p4, c9, [r5], #-72 0xc6,0xed,0x01,0xa3 = stcl p3, c10, [r6, #4] 0xc7,0xed,0x00,0xb2 = stcl p2, c11, [r7] 0x48,0xed,0x38,0xc1 = stcl p1, c12, [r8, #-224] 0x69,0xed,0x1e,0xd0 = stcl p0, c13, [r9, #-120]! 0xea,0xec,0x04,0xe6 = stcl p6, c14, [r10], #16 0x6b,0xec,0x12,0xf7 = stcl p7, c15, [r11], #-72 0x81,0xfc,0x19,0x82 = stc2 p2, c8, [r1], {25} 0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} 0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} 0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} 0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} 0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} 0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} 0xa5,0xe8,0x06,0x00 = stm.w r5!, {r1, r2} 0x82,0xe8,0x06,0x00 = stm.w r2, {r1, r2} 0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} 0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} 0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} 0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} 0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} 0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} 0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} 0x04,0xe9,0x30,0x03 = stmdb r4, {r4, r5, r8, r9} 0x04,0xe9,0x60,0x00 = stmdb r4, {r5, r6} 0x25,0xe9,0x08,0x01 = stmdb r5!, {r3, r8} 0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} 0x05,0xe9,0x03,0x00 = stmdb r5, {r0, r1} 0x45,0xf8,0x04,0x5c = str r5, [r5, #-4] 0x35,0x62 = str r5, [r6, #32] 0xc6,0xf8,0x21,0x50 = str.w r5, [r6, #33] 0xc6,0xf8,0x01,0x51 = str.w r5, [r6, #257] 0xc7,0xf8,0x01,0xf1 = str.w pc, [r7, #257] 0x44,0xf8,0xff,0x2f = str r2, [r4, #255]! 0x4d,0xf8,0x04,0x8f = str r8, [sp, #4]! 0x4d,0xf8,0x04,0xed = str lr, [sp, #-4]! 0x44,0xf8,0xff,0x2b = str r2, [r4], #255 0x4d,0xf8,0x04,0x8b = str r8, [sp], #4 0x4d,0xf8,0x04,0xe9 = str lr, [sp], #-4 0x48,0xf8,0x01,0x10 = str.w r1, [r8, r1] 0x45,0xf8,0x02,0x40 = str.w r4, [r5, r2] 0x40,0xf8,0x32,0x60 = str.w r6, [r0, r2, lsl #3] 0x48,0xf8,0x22,0x80 = str.w r8, [r8, r2, lsl #2] 0x4d,0xf8,0x12,0x70 = str.w r7, [sp, r2, lsl #1] 0x4d,0xf8,0x02,0x70 = str.w r7, [sp, r2] 0x05,0xf8,0x04,0x5c = strb r5, [r5, #-4] 0x86,0xf8,0x20,0x50 = strb.w r5, [r6, #32] 0x86,0xf8,0x21,0x50 = strb.w r5, [r6, #33] 0x86,0xf8,0x01,0x51 = strb.w r5, [r6, #257] 0x87,0xf8,0x01,0xe1 = strb.w lr, [r7, #257] 0x08,0xf8,0xff,0x5f = strb r5, [r8, #255]! 0x05,0xf8,0x04,0x2f = strb r2, [r5, #4]! 0x04,0xf8,0x04,0x1d = strb r1, [r4, #-4]! 0x03,0xf8,0xff,0xeb = strb lr, [r3], #255 0x02,0xf8,0x04,0x9b = strb r9, [r2], #4 0x0d,0xf8,0x04,0x39 = strb r3, [sp], #-4 0x08,0xf8,0x00,0x4d = strb r4, [r8, #-0]! 0x00,0xf8,0x00,0x19 = strb r1, [r0], #-0 0x08,0xf8,0x01,0x10 = strb.w r1, [r8, r1] 0x05,0xf8,0x02,0x40 = strb.w r4, [r5, r2] 0x00,0xf8,0x32,0x60 = strb.w r6, [r0, r2, lsl #3] 0x08,0xf8,0x22,0x80 = strb.w r8, [r8, r2, lsl #2] 0x0d,0xf8,0x12,0x70 = strb.w r7, [sp, r2, lsl #1] 0x0d,0xf8,0x02,0x70 = strb.w r7, [sp, r2] 0x02,0xf8,0x00,0x1e = strbt r1, [r2] 0x08,0xf8,0x00,0x1e = strbt r1, [r8] 0x08,0xf8,0x03,0x1e = strbt r1, [r8, #3] 0x08,0xf8,0xff,0x1e = strbt r1, [r8, #255] 0xc6,0xe9,0x06,0x35 = strd r3, r5, [r6, #24] 0xe6,0xe9,0x06,0x35 = strd r3, r5, [r6, #24]! 0xe6,0xe8,0x01,0x35 = strd r3, r5, [r6], #4 0x66,0xe8,0x02,0x35 = strd r3, r5, [r6], #-8 0xc6,0xe9,0x00,0x35 = strd r3, r5, [r6] 0xc3,0xe9,0x00,0x81 = strd r8, r1, [r3] 0x42,0xe9,0x00,0x01 = strd r0, r1, [r2, #-0] 0x62,0xe9,0x00,0x01 = strd r0, r1, [r2, #-0]! 0x62,0xe8,0x00,0x01 = strd r0, r1, [r2], #-0 0x44,0xe8,0x00,0x81 = strex r1, r8, [r4] 0x44,0xe8,0x00,0x28 = strex r8, r2, [r4] 0x4d,0xe8,0x20,0xc2 = strex r2, r12, [sp, #128] 0xc7,0xe8,0x45,0x1f = strexb r5, r1, [r7] 0xcc,0xe8,0x59,0x7f = strexh r9, r7, [r12] 0xc4,0xe8,0x79,0x36 = strexd r9, r3, r6, [r4] 0x25,0xf8,0x04,0x5c = strh r5, [r5, #-4] 0x35,0x84 = strh r5, [r6, #32] 0xa6,0xf8,0x21,0x50 = strh.w r5, [r6, #33] 0xa6,0xf8,0x01,0x51 = strh.w r5, [r6, #257] 0xa7,0xf8,0x01,0xe1 = strh.w lr, [r7, #257] 0x28,0xf8,0xff,0x5f = strh r5, [r8, #255]! 0x25,0xf8,0x04,0x2f = strh r2, [r5, #4]! 0x24,0xf8,0x04,0x1d = strh r1, [r4, #-4]! 0x23,0xf8,0xff,0xeb = strh lr, [r3], #255 0x22,0xf8,0x04,0x9b = strh r9, [r2], #4 0x2d,0xf8,0x04,0x39 = strh r3, [sp], #-4 0x28,0xf8,0x01,0x10 = strh.w r1, [r8, r1] 0x25,0xf8,0x02,0x40 = strh.w r4, [r5, r2] 0x20,0xf8,0x32,0x60 = strh.w r6, [r0, r2, lsl #3] 0x28,0xf8,0x22,0x80 = strh.w r8, [r8, r2, lsl #2] 0x2d,0xf8,0x12,0x70 = strh.w r7, [sp, r2, lsl #1] 0x2d,0xf8,0x02,0x70 = strh.w r7, [sp, r2] 0x22,0xf8,0x00,0x1e = strht r1, [r2] 0x28,0xf8,0x00,0x1e = strht r1, [r8] 0x28,0xf8,0x03,0x1e = strht r1, [r8, #3] 0x28,0xf8,0xff,0x1e = strht r1, [r8, #255] 0x42,0xf8,0x00,0x1e = strt r1, [r2] 0x48,0xf8,0x00,0x1e = strt r1, [r8] 0x48,0xf8,0x03,0x1e = strt r1, [r8, #3] 0x48,0xf8,0xff,0x1e = strt r1, [r8, #255] 0x0a,0xbf = itet eq 0x11,0x1f = subeq r1, r2, #4 0xa3,0xf2,0xff,0x35 = subwne r5, r3, #1023 0xa5,0xf2,0x25,0x14 = subweq r4, r5, #293 0xad,0xf5,0x80,0x62 = sub.w r2, sp, #1024 0xa8,0xf5,0x7f,0x42 = sub.w r2, r8, #65280 0xa3,0xf2,0x01,0x12 = subw r2, r3, #257 0xa3,0xf2,0x01,0x12 = subw r2, r3, #257 0xa6,0xf5,0x80,0x7c = sub.w r12, r6, #256 0xa6,0xf2,0x00,0x1c = subw r12, r6, #256 0xb2,0xf5,0xf8,0x71 = subs.w r1, r2, #496 0xa2,0xf1,0x01,0x02 = sub.w r2, r2, #1 0xa0,0xf1,0x20,0x00 = sub.w r0, r0, #32 0x38,0x3a = subs r2, #56 0x38,0x3a = subs r2, #56 0xa5,0xeb,0x06,0x04 = sub.w r4, r5, r6 0xa5,0xeb,0x46,0x14 = sub.w r4, r5, r6, lsl #5 0xa5,0xeb,0x56,0x14 = sub.w r4, r5, r6, lsr #5 0xa5,0xeb,0x56,0x14 = sub.w r4, r5, r6, lsr #5 0xa5,0xeb,0x66,0x14 = sub.w r4, r5, r6, asr #5 0xa5,0xeb,0x76,0x14 = sub.w r4, r5, r6, ror #5 0xa2,0xeb,0x3c,0x05 = sub.w r5, r2, r12, rrx 0xad,0xeb,0x0c,0x02 = sub.w r2, sp, r12 0xad,0xeb,0x0c,0x0d = sub.w sp, sp, r12 0xad,0xeb,0x0c,0x0d = sub.w sp, sp, r12 0xad,0xeb,0x0c,0x02 = sub.w r2, sp, r12 0xad,0xeb,0x0c,0x0d = sub.w sp, sp, r12 0xad,0xeb,0x0c,0x0d = sub.w sp, sp, r12 0x00,0xdf = svc #0 0x0c,0xbf = ite eq 0xff,0xdf = svceq #255 0x21,0xdf = svcne #33 0x43,0xfa,0x84,0xf2 = sxtab r2, r3, r4 0x45,0xfa,0x86,0xf4 = sxtab r4, r5, r6 0xb8,0xbf = it lt 0x42,0xfa,0x99,0xf6 = sxtablt r6, r2, r9, ror #8 0x41,0xfa,0xa4,0xf5 = sxtab r5, r1, r4, ror #16 0x48,0xfa,0xb3,0xf7 = sxtab r7, r8, r3, ror #24 0x22,0xfa,0x87,0xf6 = sxtab16 r6, r2, r7 0x25,0xfa,0x98,0xf3 = sxtab16 r3, r5, r8, ror #8 0x22,0xfa,0xa1,0xf3 = sxtab16 r3, r2, r1, ror #16 0x14,0xbf = ite ne 0x21,0xfa,0x84,0xf0 = sxtab16ne r0, r1, r4 0x22,0xfa,0xb3,0xf1 = sxtab16eq r1, r2, r3, ror #24 0x03,0xfa,0x89,0xf1 = sxtah r1, r3, r9 0x08,0xfa,0x93,0xf3 = sxtah r3, r8, r3, ror #8 0x03,0xfa,0xb3,0xf9 = sxtah r9, r3, r3, ror #24 0x8c,0xbf = ite hi 0x01,0xfa,0x86,0xf6 = sxtahhi r6, r1, r6 0x02,0xfa,0xa4,0xf2 = sxtahls r2, r2, r4, ror #16 0x75,0xb2 = sxtb r5, r6 0x4f,0xfa,0x99,0xf6 = sxtb.w r6, r9, ror #8 0x4f,0xfa,0xb3,0xf8 = sxtb.w r8, r3, ror #24 0xac,0xbf = ite ge 0x62,0xb2 = sxtbge r2, r4 0x4f,0xfa,0xa1,0xf5 = sxtblt.w r5, r1, ror #16 0x4f,0xfa,0x88,0xf7 = sxtb.w r7, r8 0x2f,0xfa,0x84,0xf1 = sxtb16 r1, r4 0x2f,0xfa,0x87,0xf6 = sxtb16 r6, r7 0x2f,0xfa,0xa1,0xf3 = sxtb16 r3, r1, ror #16 0x2c,0xbf = ite hs 0x2f,0xfa,0x95,0xf3 = sxtb16hs r3, r5, ror #8 0x2f,0xfa,0xb3,0xf2 = sxtb16lo r2, r3, ror #24 0x31,0xb2 = sxth r1, r6 0x0f,0xfa,0x98,0xf3 = sxth.w r3, r8, ror #8 0x0f,0xfa,0xb3,0xf9 = sxth.w r9, r3, ror #24 0x1c,0xbf = itt ne 0x0f,0xfa,0x89,0xf3 = sxthne.w r3, r9 0x0f,0xfa,0xa2,0xf2 = sxthne.w r2, r2, ror #16 0x0f,0xfa,0x88,0xf7 = sxth.w r7, r8 0x75,0xb2 = sxtb r5, r6 0x4f,0xfa,0x99,0xf6 = sxtb.w r6, r9, ror #8 0x4f,0xfa,0xb3,0xf8 = sxtb.w r8, r3, ror #24 0xac,0xbf = ite ge 0x62,0xb2 = sxtbge r2, r4 0x4f,0xfa,0xa1,0xf5 = sxtblt.w r5, r1, ror #16 0x2f,0xfa,0x84,0xf1 = sxtb16 r1, r4 0x2f,0xfa,0x87,0xf6 = sxtb16 r6, r7 0x2f,0xfa,0xa1,0xf3 = sxtb16 r3, r1, ror #16 0x2c,0xbf = ite hs 0x2f,0xfa,0x95,0xf3 = sxtb16hs r3, r5, ror #8 0x2f,0xfa,0xb3,0xf2 = sxtb16lo r2, r3, ror #24 0x31,0xb2 = sxth r1, r6 0x0f,0xfa,0x98,0xf3 = sxth.w r3, r8, ror #8 0x0f,0xfa,0xb3,0xf9 = sxth.w r9, r3, ror #24 0x1c,0xbf = itt ne 0x0f,0xfa,0x89,0xf3 = sxthne.w r3, r9 0x0f,0xfa,0xa2,0xf2 = sxthne.w r2, r2, ror #16 0xd3,0xe8,0x08,0xf0 = tbb [r3, r8] 0xd3,0xe8,0x18,0xf0 = tbh [r3, r8, lsl #1] 0x08,0xbf = it eq 0xd3,0xe8,0x08,0xf0 = tbbeq [r3, r8] 0x28,0xbf = it hs 0xd3,0xe8,0x18,0xf0 = tbhhs [r3, r8, lsl #1] 0x95,0xf4,0x70,0x4f = teq.w r5, #61440 0x94,0xea,0x05,0x0f = teq.w r4, r5 0x94,0xea,0x45,0x1f = teq.w r4, r5, lsl #5 0x94,0xea,0x55,0x1f = teq.w r4, r5, lsr #5 0x94,0xea,0x55,0x1f = teq.w r4, r5, lsr #5 0x94,0xea,0x65,0x1f = teq.w r4, r5, asr #5 0x94,0xea,0x75,0x1f = teq.w r4, r5, ror #5 0x15,0xf4,0x70,0x4f = tst.w r5, #61440 0x2a,0x42 = tst r2, r5 0x13,0xea,0x4c,0x1f = tst.w r3, r12, lsl #5 0x14,0xea,0x1b,0x1f = tst.w r4, r11, lsr #4 0x15,0xea,0x1a,0x3f = tst.w r5, r10, lsr #12 0x16,0xea,0xa9,0x7f = tst.w r6, r9, asr #30 0x17,0xea,0xb8,0x0f = tst.w r7, r8, ror #2 0x92,0xfa,0x43,0xf1 = uadd16 r1, r2, r3 0x82,0xfa,0x43,0xf1 = uadd8 r1, r2, r3 0xcc,0xbf = ite gt 0x92,0xfa,0x43,0xf1 = uadd16gt r1, r2, r3 0x82,0xfa,0x43,0xf1 = uadd8le r1, r2, r3 0xac,0xfa,0x40,0xf9 = uasx r9, r12, r0 0x08,0xbf = it eq 0xac,0xfa,0x40,0xf9 = uasxeq r9, r12, r0 0xac,0xfa,0x40,0xf9 = uasx r9, r12, r0 0x08,0xbf = it eq 0xac,0xfa,0x40,0xf9 = uasxeq r9, r12, r0 0xc5,0xf3,0x00,0x44 = ubfx r4, r5, #16, #1 0xc8,0xbf = it gt 0xc5,0xf3,0x0f,0x44 = ubfxgt r4, r5, #16, #16 0x98,0xfa,0x62,0xf4 = uhadd16 r4, r8, r2 0x88,0xfa,0x62,0xf4 = uhadd8 r4, r8, r2 0xc4,0xbf = itt gt 0x98,0xfa,0x62,0xf4 = uhadd16gt r4, r8, r2 0x88,0xfa,0x62,0xf4 = uhadd8gt r4, r8, r2 0xa1,0xfa,0x65,0xf4 = uhasx r4, r1, r5 0xe6,0xfa,0x66,0xf5 = uhsax r5, r6, r6 0xc4,0xbf = itt gt 0xa9,0xfa,0x68,0xf6 = uhasxgt r6, r9, r8 0xe8,0xfa,0x6c,0xf7 = uhsaxgt r7, r8, r12 0xa1,0xfa,0x65,0xf4 = uhasx r4, r1, r5 0xe6,0xfa,0x66,0xf5 = uhsax r5, r6, r6 0xc4,0xbf = itt gt 0xa9,0xfa,0x68,0xf6 = uhasxgt r6, r9, r8 0xe8,0xfa,0x6c,0xf7 = uhsaxgt r7, r8, r12 0xd8,0xfa,0x63,0xf5 = uhsub16 r5, r8, r3 0xc7,0xfa,0x66,0xf1 = uhsub8 r1, r7, r6 0xbc,0xbf = itt lt 0xd9,0xfa,0x6c,0xf4 = uhsub16lt r4, r9, r12 0xc1,0xfa,0x65,0xf3 = uhsub8lt r3, r1, r5 0xe5,0xfb,0x66,0x34 = umaal r3, r4, r5, r6 0xb8,0xbf = it lt 0xe5,0xfb,0x66,0x34 = umaallt r3, r4, r5, r6 0xe6,0xfb,0x08,0x24 = umlal r2, r4, r6, r8 0xc8,0xbf = it gt 0xe2,0xfb,0x06,0x61 = umlalgt r6, r1, r2, r6 0xa6,0xfb,0x08,0x24 = umull r2, r4, r6, r8 0xc8,0xbf = it gt 0xa2,0xfb,0x06,0x61 = umullgt r6, r1, r2, r6 0x92,0xfa,0x53,0xf1 = uqadd16 r1, r2, r3 0x84,0xfa,0x58,0xf3 = uqadd8 r3, r4, r8 0xcc,0xbf = ite gt 0x97,0xfa,0x59,0xf4 = uqadd16gt r4, r7, r9 0x81,0xfa,0x52,0xf8 = uqadd8le r8, r1, r2 0xa2,0xfa,0x53,0xf1 = uqasx r1, r2, r3 0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8 0xcc,0xbf = ite gt 0xa7,0xfa,0x59,0xf4 = uqasxgt r4, r7, r9 0xe1,0xfa,0x52,0xf8 = uqsaxle r8, r1, r2 0xa2,0xfa,0x53,0xf1 = uqasx r1, r2, r3 0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8 0xcc,0xbf = ite gt 0xa7,0xfa,0x59,0xf4 = uqasxgt r4, r7, r9 0xe1,0xfa,0x52,0xf8 = uqsaxle r8, r1, r2 0xc2,0xfa,0x59,0xf8 = uqsub8 r8, r2, r9 0xd9,0xfa,0x57,0xf1 = uqsub16 r1, r9, r7 0xcc,0xbf = ite gt 0xc1,0xfa,0x56,0xf3 = uqsub8gt r3, r1, r6 0xd6,0xfa,0x54,0xf4 = uqsub16le r4, r6, r4 0x79,0xfb,0x07,0xf1 = usad8 r1, r9, r7 0x72,0xfb,0x09,0xc8 = usada8 r8, r2, r9, r12 0xcc,0xbf = ite gt 0x71,0xfb,0x06,0x93 = usada8gt r3, r1, r6, r9 0x76,0xfb,0x04,0xf4 = usad8le r4, r6, r4 0x8a,0xf3,0x01,0x08 = usat r8, #1, r10 0x8a,0xf3,0x04,0x08 = usat r8, #4, r10 0x8a,0xf3,0xc5,0x78 = usat r8, #5, r10, lsl #31 0xaa,0xf3,0x50,0x08 = usat r8, #16, r10, asr #1 0xa7,0xf3,0x02,0x02 = usat16 r2, #2, r7 0xa5,0xf3,0x0f,0x03 = usat16 r3, #15, r5 0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4 0x18,0xbf = it ne 0xe1,0xfa,0x49,0xf6 = usaxne r6, r1, r9 0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4 0x18,0xbf = it ne 0xe1,0xfa,0x49,0xf6 = usaxne r6, r1, r9 0xd2,0xfa,0x47,0xf4 = usub16 r4, r2, r7 0xc8,0xfa,0x45,0xf1 = usub8 r1, r8, r5 0x8c,0xbf = ite hi 0xd1,0xfa,0x43,0xf1 = usub16hi r1, r1, r3 0xc2,0xfa,0x43,0xf9 = usub8ls r9, r2, r3 0x53,0xfa,0x84,0xf2 = uxtab r2, r3, r4 0x55,0xfa,0x86,0xf4 = uxtab r4, r5, r6 0xb8,0xbf = it lt 0x52,0xfa,0x99,0xf6 = uxtablt r6, r2, r9, ror #8 0x51,0xfa,0xa4,0xf5 = uxtab r5, r1, r4, ror #16 0x58,0xfa,0xb3,0xf7 = uxtab r7, r8, r3, ror #24 0xa8,0xbf = it ge 0x31,0xfa,0x84,0xf0 = uxtab16ge r0, r1, r4 0x32,0xfa,0x87,0xf6 = uxtab16 r6, r2, r7 0x35,0xfa,0x98,0xf3 = uxtab16 r3, r5, r8, ror #8 0x32,0xfa,0xa1,0xf3 = uxtab16 r3, r2, r1, ror #16 0x08,0xbf = it eq 0x32,0xfa,0xb3,0xf1 = uxtab16eq r1, r2, r3, ror #24 0x13,0xfa,0x89,0xf1 = uxtah r1, r3, r9 0x88,0xbf = it hi 0x11,0xfa,0x86,0xf6 = uxtahhi r6, r1, r6 0x18,0xfa,0x93,0xf3 = uxtah r3, r8, r3, ror #8 0x38,0xbf = it lo 0x12,0xfa,0xa4,0xf2 = uxtahlo r2, r2, r4, ror #16 0x13,0xfa,0xb3,0xf9 = uxtah r9, r3, r3, ror #24 0xa8,0xbf = it ge 0xe2,0xb2 = uxtbge r2, r4 0xf5,0xb2 = uxtb r5, r6 0x5f,0xfa,0x99,0xf6 = uxtb.w r6, r9, ror #8 0x38,0xbf = it lo 0x5f,0xfa,0xa1,0xf5 = uxtblo.w r5, r1, ror #16 0x5f,0xfa,0xb3,0xf8 = uxtb.w r8, r3, ror #24 0x5f,0xfa,0x88,0xf7 = uxtb.w r7, r8 0x3f,0xfa,0x84,0xf1 = uxtb16 r1, r4 0x3f,0xfa,0x87,0xf6 = uxtb16 r6, r7 0x28,0xbf = it hs 0x3f,0xfa,0x95,0xf3 = uxtb16hs r3, r5, ror #8 0x3f,0xfa,0xa1,0xf3 = uxtb16 r3, r1, ror #16 0xa8,0xbf = it ge 0x3f,0xfa,0xb3,0xf2 = uxtb16ge r2, r3, ror #24 0x18,0xbf = it ne 0x1f,0xfa,0x89,0xf3 = uxthne.w r3, r9 0xb1,0xb2 = uxth r1, r6 0x1f,0xfa,0x98,0xf3 = uxth.w r3, r8, ror #8 0xd8,0xbf = it le 0x1f,0xfa,0xa2,0xf2 = uxthle.w r2, r2, ror #16 0x1f,0xfa,0xb3,0xf9 = uxth.w r9, r3, ror #24 0x1f,0xfa,0x88,0xf7 = uxth.w r7, r8 0x20,0xbf = wfe 0x30,0xbf = wfi 0x10,0xbf = yield 0xb6,0xbf = itet lt 0x20,0xbf = wfelt 0x30,0xbf = wfige 0x10,0xbf = yieldlt 0xaf,0xf3,0x04,0x80 = sev.w 0xaf,0xf3,0x03,0x80 = wfi.w 0xaf,0xf3,0x02,0x80 = wfe.w 0xaf,0xf3,0x01,0x80 = yield.w 0xaf,0xf3,0x00,0x80 = nop.w 0x40,0xbf = sev 0x30,0xbf = wfi 0x20,0xbf = wfe 0x10,0xbf = yield 0x00,0xbf = nop 0xb6,0xbf = itet lt 0xf0,0xbf = hintlt #15 0xaf,0xf3,0x10,0x80 = hintge.w #16 0xaf,0xf3,0xef,0x80 = hintlt.w #239 0x70,0xbf = hint #7 0xaf,0xf3,0x07,0x80 = hint.w #7 0x9f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #22] 0xbf,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #22] 0x9f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #22] 0xbf,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #22] 0xdf,0xf8,0x16,0xb0 = ldr.w r11, [pc, #22] 0x9f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #22] 0xbf,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #22] 0x9f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #22] 0xbf,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #22] 0x5f,0xf8,0x16,0xb0 = ldr.w r11, [pc, #-22] 0x1f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #-22] 0x3f,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #-22] 0x1f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #-22] 0x3f,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #-22] 0x5f,0xf8,0x16,0xb0 = ldr.w r11, [pc, #-22] 0x1f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #-22] 0x3f,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #-22] 0x1f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #-22] 0x3f,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #-22] 0x03,0x49 = ldr r1, [pc, #12] 0xde,0xf3,0x04,0x8f = subs pc, lr, #4 capstone-sys-0.11.0/capstone/suite/MC/ARM/crc32-thumb.s.cs010066400017500001750000000004411363402546700211610ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None 0xc1,0xfa,0x82,0xf0 = crc32b r0, r1, r2 0xc1,0xfa,0x92,0xf0 = crc32h r0, r1, r2 0xc1,0xfa,0xa2,0xf0 = crc32w r0, r1, r2 0xd1,0xfa,0x82,0xf0 = crc32cb r0, r1, r2 0xd1,0xfa,0x92,0xf0 = crc32ch r0, r1, r2 0xd1,0xfa,0xa2,0xf0 = crc32cw r0, r1, r2 capstone-sys-0.11.0/capstone/suite/MC/ARM/crc32.s.cs010066400017500001750000000004371363402546700200510ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None 0x42,0x00,0x01,0xe1 = crc32b r0, r1, r2 0x42,0x00,0x21,0xe1 = crc32h r0, r1, r2 0x42,0x00,0x41,0xe1 = crc32w r0, r1, r2 0x42,0x02,0x01,0xe1 = crc32cb r0, r1, r2 0x42,0x02,0x21,0xe1 = crc32ch r0, r1, r2 0x42,0x02,0x41,0xe1 = crc32cw r0, r1, r2 capstone-sys-0.11.0/capstone/suite/MC/ARM/dot-req.s.cs010066400017500001750000000001441363402546700205030ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x05,0xb0,0xa0,0xe1 = mov r11, r5 0x06,0x10,0xa0,0xe1 = mov r1, r6 capstone-sys-0.11.0/capstone/suite/MC/ARM/fp-armv8.s.cs010066400017500001750000000043161363402546700205750ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None 0xe0,0x3b,0xb2,0xee = vcvtt.f64.f16 d3, s1 0xcc,0x2b,0xf3,0xee = vcvtt.f16.f64 s5, d12 0x60,0x3b,0xb2,0xee = vcvtb.f64.f16 d3, s1 0x41,0x2b,0xb3,0xee = vcvtb.f16.f64 s4, d1 0xe0,0x3b,0xb2,0xae = vcvttge.f64.f16 d3, s1 0xcc,0x2b,0xf3,0xce = vcvttgt.f16.f64 s5, d12 0x60,0x3b,0xb2,0x0e = vcvtbeq.f64.f16 d3, s1 0x41,0x2b,0xb3,0xbe = vcvtblt.f16.f64 s4, d1 0xe1,0x1a,0xbc,0xfe = vcvta.s32.f32 s2, s3 0xc3,0x1b,0xbc,0xfe = vcvta.s32.f64 s2, d3 0xeb,0x3a,0xbd,0xfe = vcvtn.s32.f32 s6, s23 0xe7,0x3b,0xbd,0xfe = vcvtn.s32.f64 s6, d23 0xc2,0x0a,0xbe,0xfe = vcvtp.s32.f32 s0, s4 0xc4,0x0b,0xbe,0xfe = vcvtp.s32.f64 s0, d4 0xc4,0x8a,0xff,0xfe = vcvtm.s32.f32 s17, s8 0xc8,0x8b,0xff,0xfe = vcvtm.s32.f64 s17, d8 0x61,0x1a,0xbc,0xfe = vcvta.u32.f32 s2, s3 0x43,0x1b,0xbc,0xfe = vcvta.u32.f64 s2, d3 0x6b,0x3a,0xbd,0xfe = vcvtn.u32.f32 s6, s23 0x67,0x3b,0xbd,0xfe = vcvtn.u32.f64 s6, d23 0x42,0x0a,0xbe,0xfe = vcvtp.u32.f32 s0, s4 0x44,0x0b,0xbe,0xfe = vcvtp.u32.f64 s0, d4 0x44,0x8a,0xff,0xfe = vcvtm.u32.f32 s17, s8 0x48,0x8b,0xff,0xfe = vcvtm.u32.f64 s17, d8 0xab,0x2a,0x20,0xfe = vselge.f32 s4, s1, s23 0xa7,0xeb,0x6f,0xfe = vselge.f64 d30, d31, d23 0x80,0x0a,0x30,0xfe = vselgt.f32 s0, s1, s0 0x24,0x5b,0x3a,0xfe = vselgt.f64 d5, d10, d20 0x2b,0xfa,0x0e,0xfe = vseleq.f32 s30, s28, s23 0x08,0x2b,0x04,0xfe = vseleq.f64 d2, d4, d8 0x07,0xaa,0x58,0xfe = vselvs.f32 s21, s16, s14 0x2f,0x0b,0x11,0xfe = vselvs.f64 d0, d1, d31 0x00,0x2a,0xc6,0xfe = vmaxnm.f32 s5, s12, s0 0xae,0x5b,0x86,0xfe = vmaxnm.f64 d5, d22, d30 0x46,0x0a,0x80,0xfe = vminnm.f32 s0, s0, s12 0x49,0x4b,0x86,0xfe = vminnm.f64 d4, d6, d9 0xcc,0x3b,0xb6,0xae = vrintzge.f64 d3, d12 0xcc,0x1a,0xf6,0xee = vrintz.f32 s3, s24 0x40,0x5b,0xb6,0xbe = vrintrlt.f64 d5, d0 0x64,0x0a,0xb6,0xee = vrintr.f32 s0, s9 0x6e,0xcb,0xf7,0x0e = vrintxeq.f64 d28, d30 0x47,0x5a,0xb7,0x6e = vrintxvs.f32 s10, s14 0x44,0x3b,0xb8,0xfe = vrinta.f64 d3, d4 0x60,0x6a,0xb8,0xfe = vrinta.f32 s12, s1 0x44,0x3b,0xb9,0xfe = vrintn.f64 d3, d4 0x60,0x6a,0xb9,0xfe = vrintn.f32 s12, s1 0x44,0x3b,0xba,0xfe = vrintp.f64 d3, d4 0x60,0x6a,0xba,0xfe = vrintp.f32 s12, s1 0x44,0x3b,0xbb,0xfe = vrintm.f64 d3, d4 0x60,0x6a,0xbb,0xfe = vrintm.f32 s12, s1 0x10,0xda,0xf5,0xee = vmrs sp, mvfr2 capstone-sys-0.11.0/capstone/suite/MC/ARM/idiv-thumb.s.cs010066400017500001750000000001571363402546700212040ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x92,0xfb,0xf3,0xf1 = sdiv r1, r2, r3 0xb4,0xfb,0xf5,0xf3 = udiv r3, r4, r5 capstone-sys-0.11.0/capstone/suite/MC/ARM/idiv.s.cs010066400017500001750000000001551363402546700200650ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x12,0xf3,0x11,0xe7 = sdiv r1, r2, r3 0x14,0xf5,0x33,0xe7 = udiv r3, r4, r5 capstone-sys-0.11.0/capstone/suite/MC/ARM/load-store-acquire-release-v8-thumb.s.cs010066400017500001750000000011131363402546700257130ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None 0xd4,0xe8,0xcf,0x3f = ldaexb r3, [r4] 0xd5,0xe8,0xdf,0x2f = ldaexh r2, [r5] 0xd7,0xe8,0xef,0x1f = ldaex r1, [r7] 0xd8,0xe8,0xff,0x67 = ldaexd r6, r7, [r8] 0xc4,0xe8,0xc1,0x3f = stlexb r1, r3, [r4] 0xc5,0xe8,0xd4,0x2f = stlexh r4, r2, [r5] 0xc7,0xe8,0xe2,0x1f = stlex r2, r1, [r7] 0xc8,0xe8,0xf6,0x23 = stlexd r6, r2, r3, [r8] 0xd6,0xe8,0xaf,0x5f = lda r5, [r6] 0xd6,0xe8,0x8f,0x5f = ldab r5, [r6] 0xd9,0xe8,0x9f,0xcf = ldah r12, [r9] 0xc0,0xe8,0xaf,0x3f = stl r3, [r0] 0xc1,0xe8,0x8f,0x2f = stlb r2, [r1] 0xc3,0xe8,0x9f,0x2f = stlh r2, [r3] capstone-sys-0.11.0/capstone/suite/MC/ARM/load-store-acquire-release-v8.s.cs010066400017500001750000000011111363402546700245740ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None 0x9f,0x3e,0xd4,0xe1 = ldaexb r3, [r4] 0x9f,0x2e,0xf5,0xe1 = ldaexh r2, [r5] 0x9f,0x1e,0x97,0xe1 = ldaex r1, [r7] 0x9f,0x6e,0xb8,0xe1 = ldaexd r6, r7, [r8] 0x93,0x1e,0xc4,0xe1 = stlexb r1, r3, [r4] 0x92,0x4e,0xe5,0xe1 = stlexh r4, r2, [r5] 0x91,0x2e,0x87,0xe1 = stlex r2, r1, [r7] 0x92,0x6e,0xa8,0xe1 = stlexd r6, r2, r3, [r8] 0x9f,0x5c,0x96,0xe1 = lda r5, [r6] 0x9f,0x5c,0xd6,0xe1 = ldab r5, [r6] 0x9f,0xcc,0xf9,0xe1 = ldah r12, [r9] 0x93,0xfc,0x80,0xe1 = stl r3, [r0] 0x92,0xfc,0xc1,0xe1 = stlb r2, [r1] 0x92,0xfc,0xe3,0xe1 = stlh r2, [r3] capstone-sys-0.11.0/capstone/suite/MC/ARM/mode-switch.s.cs010066400017500001750000000003631363402546700213560ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x00,0xeb,0x01,0x00 = add.w r0, r0, r1 0x01,0x00,0x80,0xe0 = add r0, r0, r1 0x40,0x18 = adds r0, r0, r1 0x01,0x00,0x80,0xe0 = add r0, r0, r1 0x00,0xeb,0x01,0x00 = add.w r0, r0, r1 0x40,0x18 = adds r0, r0, r1 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-abs-encoding.s.cs010066400017500001750000000011051363402546700224140ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x20,0x03,0xf1,0xf3 = vabs.s8 d16, d16 0x20,0x03,0xf5,0xf3 = vabs.s16 d16, d16 0x20,0x03,0xf9,0xf3 = vabs.s32 d16, d16 0x20,0x07,0xf9,0xf3 = vabs.f32 d16, d16 0x60,0x03,0xf1,0xf3 = vabs.s8 q8, q8 0x60,0x03,0xf5,0xf3 = vabs.s16 q8, q8 0x60,0x03,0xf9,0xf3 = vabs.s32 q8, q8 0x60,0x07,0xf9,0xf3 = vabs.f32 q8, q8 0x20,0x07,0xf0,0xf3 = vqabs.s8 d16, d16 0x20,0x07,0xf4,0xf3 = vqabs.s16 d16, d16 0x20,0x07,0xf8,0xf3 = vqabs.s32 d16, d16 0x60,0x07,0xf0,0xf3 = vqabs.s8 q8, q8 0x60,0x07,0xf4,0xf3 = vqabs.s16 q8, q8 0x60,0x07,0xf8,0xf3 = vqabs.s32 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-absdiff-encoding.s.cs010066400017500001750000000032421363402546700232510ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa1,0x07,0x40,0xf2 = vabd.s8 d16, d16, d17 0xa1,0x07,0x50,0xf2 = vabd.s16 d16, d16, d17 0xa1,0x07,0x60,0xf2 = vabd.s32 d16, d16, d17 0xa1,0x07,0x40,0xf3 = vabd.u8 d16, d16, d17 0xa1,0x07,0x50,0xf3 = vabd.u16 d16, d16, d17 0xa1,0x07,0x60,0xf3 = vabd.u32 d16, d16, d17 0xa1,0x0d,0x60,0xf3 = vabd.f32 d16, d16, d17 0xe2,0x07,0x40,0xf2 = vabd.s8 q8, q8, q9 0xe2,0x07,0x50,0xf2 = vabd.s16 q8, q8, q9 0xe2,0x07,0x60,0xf2 = vabd.s32 q8, q8, q9 0xe2,0x07,0x40,0xf3 = vabd.u8 q8, q8, q9 0xe2,0x07,0x50,0xf3 = vabd.u16 q8, q8, q9 0xe2,0x07,0x60,0xf3 = vabd.u32 q8, q8, q9 0xe2,0x0d,0x60,0xf3 = vabd.f32 q8, q8, q9 0xa1,0x07,0xc0,0xf2 = vabdl.s8 q8, d16, d17 0xa1,0x07,0xd0,0xf2 = vabdl.s16 q8, d16, d17 0xa1,0x07,0xe0,0xf2 = vabdl.s32 q8, d16, d17 0xa1,0x07,0xc0,0xf3 = vabdl.u8 q8, d16, d17 0xa1,0x07,0xd0,0xf3 = vabdl.u16 q8, d16, d17 0xa1,0x07,0xe0,0xf3 = vabdl.u32 q8, d16, d17 0xb1,0x07,0x42,0xf2 = vaba.s8 d16, d18, d17 0xb1,0x07,0x52,0xf2 = vaba.s16 d16, d18, d17 0xb1,0x07,0x62,0xf2 = vaba.s32 d16, d18, d17 0xb1,0x07,0x42,0xf3 = vaba.u8 d16, d18, d17 0xb1,0x07,0x52,0xf3 = vaba.u16 d16, d18, d17 0xb1,0x07,0x62,0xf3 = vaba.u32 d16, d18, d17 0xf4,0x27,0x40,0xf2 = vaba.s8 q9, q8, q10 0xf4,0x27,0x50,0xf2 = vaba.s16 q9, q8, q10 0xf4,0x27,0x60,0xf2 = vaba.s32 q9, q8, q10 0xf4,0x27,0x40,0xf3 = vaba.u8 q9, q8, q10 0xf4,0x27,0x50,0xf3 = vaba.u16 q9, q8, q10 0xf4,0x27,0x60,0xf3 = vaba.u32 q9, q8, q10 0xa2,0x05,0xc3,0xf2 = vabal.s8 q8, d19, d18 0xa2,0x05,0xd3,0xf2 = vabal.s16 q8, d19, d18 0xa2,0x05,0xe3,0xf2 = vabal.s32 q8, d19, d18 0xa2,0x05,0xc3,0xf3 = vabal.u8 q8, d19, d18 0xa2,0x05,0xd3,0xf3 = vabal.u16 q8, d19, d18 0xa2,0x05,0xe3,0xf3 = vabal.u32 q8, d19, d18 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-add-encoding.s.cs010066400017500001750000000122071363402546700224040ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa0,0x08,0x41,0xf2 = vadd.i8 d16, d17, d16 0xa0,0x08,0x51,0xf2 = vadd.i16 d16, d17, d16 0xa0,0x08,0x71,0xf2 = vadd.i64 d16, d17, d16 0xa0,0x08,0x61,0xf2 = vadd.i32 d16, d17, d16 0xa1,0x0d,0x40,0xf2 = vadd.f32 d16, d16, d17 0xe2,0x0d,0x40,0xf2 = vadd.f32 q8, q8, q9 0xa0,0x00,0xc1,0xf2 = vaddl.s8 q8, d17, d16 0xa0,0x00,0xd1,0xf2 = vaddl.s16 q8, d17, d16 0xa0,0x00,0xe1,0xf2 = vaddl.s32 q8, d17, d16 0xa0,0x00,0xc1,0xf3 = vaddl.u8 q8, d17, d16 0xa0,0x00,0xd1,0xf3 = vaddl.u16 q8, d17, d16 0xa0,0x00,0xe1,0xf3 = vaddl.u32 q8, d17, d16 0xa2,0x01,0xc0,0xf2 = vaddw.s8 q8, q8, d18 0xa2,0x01,0xd0,0xf2 = vaddw.s16 q8, q8, d18 0xa2,0x01,0xe0,0xf2 = vaddw.s32 q8, q8, d18 0xa2,0x01,0xc0,0xf3 = vaddw.u8 q8, q8, d18 0xa2,0x01,0xd0,0xf3 = vaddw.u16 q8, q8, d18 0xa2,0x01,0xe0,0xf3 = vaddw.u32 q8, q8, d18 0xa1,0x00,0x40,0xf2 = vhadd.s8 d16, d16, d17 0xa1,0x00,0x50,0xf2 = vhadd.s16 d16, d16, d17 0xa1,0x00,0x60,0xf2 = vhadd.s32 d16, d16, d17 0xa1,0x00,0x40,0xf3 = vhadd.u8 d16, d16, d17 0xa1,0x00,0x50,0xf3 = vhadd.u16 d16, d16, d17 0xa1,0x00,0x60,0xf3 = vhadd.u32 d16, d16, d17 0xe2,0x00,0x40,0xf2 = vhadd.s8 q8, q8, q9 0xe2,0x00,0x50,0xf2 = vhadd.s16 q8, q8, q9 0xe2,0x00,0x60,0xf2 = vhadd.s32 q8, q8, q9 0xe2,0x00,0x40,0xf3 = vhadd.u8 q8, q8, q9 0xe2,0x00,0x50,0xf3 = vhadd.u16 q8, q8, q9 0xe2,0x00,0x60,0xf3 = vhadd.u32 q8, q8, q9 0x28,0xb0,0x0b,0xf2 = vhadd.s8 d11, d11, d24 0x27,0xc0,0x1c,0xf2 = vhadd.s16 d12, d12, d23 0x26,0xd0,0x2d,0xf2 = vhadd.s32 d13, d13, d22 0x25,0xe0,0x0e,0xf3 = vhadd.u8 d14, d14, d21 0x24,0xf0,0x1f,0xf3 = vhadd.u16 d15, d15, d20 0xa3,0x00,0x60,0xf3 = vhadd.u32 d16, d16, d19 0x68,0x20,0x02,0xf2 = vhadd.s8 q1, q1, q12 0x66,0x40,0x14,0xf2 = vhadd.s16 q2, q2, q11 0x64,0x60,0x26,0xf2 = vhadd.s32 q3, q3, q10 0x62,0x80,0x08,0xf3 = vhadd.u8 q4, q4, q9 0x60,0xa0,0x1a,0xf3 = vhadd.u16 q5, q5, q8 0x4e,0xc0,0x2c,0xf3 = vhadd.u32 q6, q6, q7 0xa1,0x01,0x40,0xf2 = vrhadd.s8 d16, d16, d17 0xa1,0x01,0x50,0xf2 = vrhadd.s16 d16, d16, d17 0xa1,0x01,0x60,0xf2 = vrhadd.s32 d16, d16, d17 0xa1,0x01,0x40,0xf3 = vrhadd.u8 d16, d16, d17 0xa1,0x01,0x50,0xf3 = vrhadd.u16 d16, d16, d17 0xa1,0x01,0x60,0xf3 = vrhadd.u32 d16, d16, d17 0xe2,0x01,0x40,0xf2 = vrhadd.s8 q8, q8, q9 0xe2,0x01,0x50,0xf2 = vrhadd.s16 q8, q8, q9 0xe2,0x01,0x60,0xf2 = vrhadd.s32 q8, q8, q9 0xe2,0x01,0x40,0xf3 = vrhadd.u8 q8, q8, q9 0xe2,0x01,0x50,0xf3 = vrhadd.u16 q8, q8, q9 0xe2,0x01,0x60,0xf3 = vrhadd.u32 q8, q8, q9 0xa1,0x01,0x40,0xf2 = vrhadd.s8 d16, d16, d17 0xa1,0x01,0x50,0xf2 = vrhadd.s16 d16, d16, d17 0xa1,0x01,0x60,0xf2 = vrhadd.s32 d16, d16, d17 0xa1,0x01,0x40,0xf3 = vrhadd.u8 d16, d16, d17 0xa1,0x01,0x50,0xf3 = vrhadd.u16 d16, d16, d17 0xa1,0x01,0x60,0xf3 = vrhadd.u32 d16, d16, d17 0xe2,0x01,0x40,0xf2 = vrhadd.s8 q8, q8, q9 0xe2,0x01,0x50,0xf2 = vrhadd.s16 q8, q8, q9 0xe2,0x01,0x60,0xf2 = vrhadd.s32 q8, q8, q9 0xe2,0x01,0x40,0xf3 = vrhadd.u8 q8, q8, q9 0xe2,0x01,0x50,0xf3 = vrhadd.u16 q8, q8, q9 0xe2,0x01,0x60,0xf3 = vrhadd.u32 q8, q8, q9 0xb1,0x00,0x40,0xf2 = vqadd.s8 d16, d16, d17 0xb1,0x00,0x50,0xf2 = vqadd.s16 d16, d16, d17 0xb1,0x00,0x60,0xf2 = vqadd.s32 d16, d16, d17 0xb1,0x00,0x70,0xf2 = vqadd.s64 d16, d16, d17 0xb1,0x00,0x40,0xf3 = vqadd.u8 d16, d16, d17 0xb1,0x00,0x50,0xf3 = vqadd.u16 d16, d16, d17 0xb1,0x00,0x60,0xf3 = vqadd.u32 d16, d16, d17 0xb1,0x00,0x70,0xf3 = vqadd.u64 d16, d16, d17 0xf2,0x00,0x40,0xf2 = vqadd.s8 q8, q8, q9 0xf2,0x00,0x50,0xf2 = vqadd.s16 q8, q8, q9 0xf2,0x00,0x60,0xf2 = vqadd.s32 q8, q8, q9 0xf2,0x00,0x70,0xf2 = vqadd.s64 q8, q8, q9 0xf2,0x00,0x40,0xf3 = vqadd.u8 q8, q8, q9 0xf2,0x00,0x50,0xf3 = vqadd.u16 q8, q8, q9 0xf2,0x00,0x60,0xf3 = vqadd.u32 q8, q8, q9 0xf2,0x00,0x70,0xf3 = vqadd.u64 q8, q8, q9 0xb1,0x00,0x40,0xf2 = vqadd.s8 d16, d16, d17 0xb1,0x00,0x50,0xf2 = vqadd.s16 d16, d16, d17 0xb1,0x00,0x60,0xf2 = vqadd.s32 d16, d16, d17 0xb1,0x00,0x70,0xf2 = vqadd.s64 d16, d16, d17 0xb1,0x00,0x40,0xf3 = vqadd.u8 d16, d16, d17 0xb1,0x00,0x50,0xf3 = vqadd.u16 d16, d16, d17 0xb1,0x00,0x60,0xf3 = vqadd.u32 d16, d16, d17 0xb1,0x00,0x70,0xf3 = vqadd.u64 d16, d16, d17 0xf2,0x00,0x40,0xf2 = vqadd.s8 q8, q8, q9 0xf2,0x00,0x50,0xf2 = vqadd.s16 q8, q8, q9 0xf2,0x00,0x60,0xf2 = vqadd.s32 q8, q8, q9 0xf2,0x00,0x70,0xf2 = vqadd.s64 q8, q8, q9 0xf2,0x00,0x40,0xf3 = vqadd.u8 q8, q8, q9 0xf2,0x00,0x50,0xf3 = vqadd.u16 q8, q8, q9 0xf2,0x00,0x60,0xf3 = vqadd.u32 q8, q8, q9 0xf2,0x00,0x70,0xf3 = vqadd.u64 q8, q8, q9 0xa2,0x04,0xc0,0xf2 = vaddhn.i16 d16, q8, q9 0xa2,0x04,0xd0,0xf2 = vaddhn.i32 d16, q8, q9 0xa2,0x04,0xe0,0xf2 = vaddhn.i64 d16, q8, q9 0xa2,0x04,0xc0,0xf3 = vraddhn.i16 d16, q8, q9 0xa2,0x04,0xd0,0xf3 = vraddhn.i32 d16, q8, q9 0xa2,0x04,0xe0,0xf3 = vraddhn.i64 d16, q8, q9 0x05,0x68,0x06,0xf2 = vadd.i8 d6, d6, d5 0x01,0x78,0x17,0xf2 = vadd.i16 d7, d7, d1 0x02,0x88,0x28,0xf2 = vadd.i32 d8, d8, d2 0x03,0x98,0x39,0xf2 = vadd.i64 d9, d9, d3 0x4a,0xc8,0x0c,0xf2 = vadd.i8 q6, q6, q5 0x42,0xe8,0x1e,0xf2 = vadd.i16 q7, q7, q1 0xc4,0x08,0x60,0xf2 = vadd.i32 q8, q8, q2 0xc6,0x28,0x72,0xf2 = vadd.i64 q9, q9, q3 0x05,0xc1,0x8c,0xf2 = vaddw.s8 q6, q6, d5 0x01,0xe1,0x9e,0xf2 = vaddw.s16 q7, q7, d1 0x82,0x01,0xe0,0xf2 = vaddw.s32 q8, q8, d2 0x05,0xc1,0x8c,0xf3 = vaddw.u8 q6, q6, d5 0x01,0xe1,0x9e,0xf3 = vaddw.u16 q7, q7, d1 0x82,0x01,0xe0,0xf3 = vaddw.u32 q8, q8, d2 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-bitcount-encoding.s.cs010066400017500001750000000010731363402546700235020ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x20,0x05,0xf0,0xf3 = vcnt.8 d16, d16 0x60,0x05,0xf0,0xf3 = vcnt.8 q8, q8 0xa0,0x04,0xf0,0xf3 = vclz.i8 d16, d16 0xa0,0x04,0xf4,0xf3 = vclz.i16 d16, d16 0xa0,0x04,0xf8,0xf3 = vclz.i32 d16, d16 0xe0,0x04,0xf0,0xf3 = vclz.i8 q8, q8 0xe0,0x04,0xf4,0xf3 = vclz.i16 q8, q8 0xe0,0x04,0xf8,0xf3 = vclz.i32 q8, q8 0x20,0x04,0xf0,0xf3 = vcls.s8 d16, d16 0x20,0x04,0xf4,0xf3 = vcls.s16 d16, d16 0x20,0x04,0xf8,0xf3 = vcls.s32 d16, d16 0x60,0x04,0xf0,0xf3 = vcls.s8 q8, q8 0x60,0x04,0xf4,0xf3 = vcls.s16 q8, q8 0x60,0x04,0xf8,0xf3 = vcls.s32 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-bitwise-encoding.s.cs010066400017500001750000000114711363402546700233240ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xb0,0x01,0x41,0xf2 = vand d16, d17, d16 0xf2,0x01,0x40,0xf2 = vand q8, q8, q9 0xb0,0x01,0x41,0xf3 = veor d16, d17, d16 0xf2,0x01,0x40,0xf3 = veor q8, q8, q9 0xb0,0x01,0x61,0xf2 = vorr d16, d17, d16 0xf2,0x01,0x60,0xf2 = vorr q8, q8, q9 0x11,0x07,0xc0,0xf2 = vorr.i32 d16, #0x1000000 0x51,0x07,0xc0,0xf2 = vorr.i32 q8, #0x1000000 0x50,0x01,0xc0,0xf2 = vorr.i32 q8, #0 0xb0,0x01,0x51,0xf2 = vbic d16, d17, d16 0xf2,0x01,0x50,0xf2 = vbic q8, q8, q9 0x3f,0x07,0xc7,0xf3 = vbic.i32 d16, #0xff000000 0x7f,0x07,0xc7,0xf3 = vbic.i32 q8, #0xff000000 0xf6,0x41,0x54,0xf2 = vbic q10, q10, q11 0x11,0x91,0x19,0xf2 = vbic d9, d9, d1 0xb0,0x01,0x71,0xf2 = vorn d16, d17, d16 0xf2,0x01,0x70,0xf2 = vorn q8, q8, q9 0xa0,0x05,0xf0,0xf3 = vmvn d16, d16 0xe0,0x05,0xf0,0xf3 = vmvn q8, q8 0xb0,0x21,0x51,0xf3 = vbsl d18, d17, d16 0xf2,0x01,0x54,0xf3 = vbsl q8, q10, q9 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x07,0xf2 = vand d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 0x5a,0xc1,0x0c,0xf2 = vand q6, q6, q5 0x5a,0xc1,0x0c,0xf2 = vand q6, q6, q5 0x52,0xe1,0x0e,0xf2 = vand q7, q7, q1 0xd4,0x01,0x40,0xf2 = vand q8, q8, q2 0xd4,0x01,0x40,0xf2 = vand q8, q8, q2 0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 0x52,0xe1,0x0e,0xf3 = veor q7, q7, q1 0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 0x52,0xe1,0x0e,0xf3 = veor q7, q7, q1 0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 0x4a,0xa2,0xb5,0xf3 = vclt.s16 q5, q5, #0 0x05,0x52,0xb5,0xf3 = vclt.s16 d5, d5, #0 0x56,0xa8,0x1a,0xf3 = vceq.i16 q5, q5, q3 0x13,0x58,0x15,0xf3 = vceq.i16 d5, d5, d3 0x46,0xa3,0x1a,0xf2 = vcgt.s16 q5, q5, q3 0x03,0x53,0x15,0xf2 = vcgt.s16 d5, d5, d3 0x56,0xa3,0x1a,0xf2 = vcge.s16 q5, q5, q3 0x13,0x53,0x15,0xf2 = vcge.s16 d5, d5, d3 0x4a,0xa0,0xb5,0xf3 = vcgt.s16 q5, q5, #0 0x05,0x50,0xb5,0xf3 = vcgt.s16 d5, d5, #0 0xca,0xa0,0xb5,0xf3 = vcge.s16 q5, q5, #0 0x85,0x50,0xb5,0xf3 = vcge.s16 d5, d5, #0 0x4a,0xa1,0xb5,0xf3 = vceq.i16 q5, q5, #0 0x05,0x51,0xb5,0xf3 = vceq.i16 d5, d5, #0 0xca,0xa1,0xb5,0xf3 = vcle.s16 q5, q5, #0 0x85,0x51,0xb5,0xf3 = vcle.s16 d5, d5, #0 0x3e,0x5e,0x05,0xf3 = vacge.f32 d5, d5, d30 0x56,0xae,0x0a,0xf3 = vacge.f32 q5, q5, q3 0x3e,0x5e,0x25,0xf3 = vacgt.f32 d5, d5, d30 0x56,0xae,0x2a,0xf3 = vacgt.f32 q5, q5, q3 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-cmp-encoding.s.cs010066400017500001750000000073501363402546700224360ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xb1,0x08,0x40,0xf3 = vceq.i8 d16, d16, d17 0xb1,0x08,0x50,0xf3 = vceq.i16 d16, d16, d17 0xb1,0x08,0x60,0xf3 = vceq.i32 d16, d16, d17 0xa1,0x0e,0x40,0xf2 = vceq.f32 d16, d16, d17 0xf2,0x08,0x40,0xf3 = vceq.i8 q8, q8, q9 0xf2,0x08,0x50,0xf3 = vceq.i16 q8, q8, q9 0xf2,0x08,0x60,0xf3 = vceq.i32 q8, q8, q9 0xe2,0x0e,0x40,0xf2 = vceq.f32 q8, q8, q9 0xb1,0x03,0x40,0xf2 = vcge.s8 d16, d16, d17 0xb1,0x03,0x50,0xf2 = vcge.s16 d16, d16, d17 0xb1,0x03,0x60,0xf2 = vcge.s32 d16, d16, d17 0xb1,0x03,0x40,0xf3 = vcge.u8 d16, d16, d17 0xb1,0x03,0x50,0xf3 = vcge.u16 d16, d16, d17 0xb1,0x03,0x60,0xf3 = vcge.u32 d16, d16, d17 0xa1,0x0e,0x40,0xf3 = vcge.f32 d16, d16, d17 0xf2,0x03,0x40,0xf2 = vcge.s8 q8, q8, q9 0xf2,0x03,0x50,0xf2 = vcge.s16 q8, q8, q9 0xf2,0x03,0x60,0xf2 = vcge.s32 q8, q8, q9 0xf2,0x03,0x40,0xf3 = vcge.u8 q8, q8, q9 0xf2,0x03,0x50,0xf3 = vcge.u16 q8, q8, q9 0xf2,0x03,0x60,0xf3 = vcge.u32 q8, q8, q9 0xe2,0x0e,0x40,0xf3 = vcge.f32 q8, q8, q9 0xb1,0x0e,0x40,0xf3 = vacge.f32 d16, d16, d17 0xf2,0x0e,0x40,0xf3 = vacge.f32 q8, q8, q9 0xa1,0x03,0x40,0xf2 = vcgt.s8 d16, d16, d17 0xa1,0x03,0x50,0xf2 = vcgt.s16 d16, d16, d17 0xa1,0x03,0x60,0xf2 = vcgt.s32 d16, d16, d17 0xa1,0x03,0x40,0xf3 = vcgt.u8 d16, d16, d17 0xa1,0x03,0x50,0xf3 = vcgt.u16 d16, d16, d17 0xa1,0x03,0x60,0xf3 = vcgt.u32 d16, d16, d17 0xa1,0x0e,0x60,0xf3 = vcgt.f32 d16, d16, d17 0xe2,0x03,0x40,0xf2 = vcgt.s8 q8, q8, q9 0xe2,0x03,0x50,0xf2 = vcgt.s16 q8, q8, q9 0xe2,0x03,0x60,0xf2 = vcgt.s32 q8, q8, q9 0xe2,0x03,0x40,0xf3 = vcgt.u8 q8, q8, q9 0xe2,0x03,0x50,0xf3 = vcgt.u16 q8, q8, q9 0xe2,0x03,0x60,0xf3 = vcgt.u32 q8, q8, q9 0xe2,0x0e,0x60,0xf3 = vcgt.f32 q8, q8, q9 0xb1,0x0e,0x60,0xf3 = vacgt.f32 d16, d16, d17 0xf2,0x0e,0x60,0xf3 = vacgt.f32 q8, q8, q9 0xb1,0x08,0x40,0xf2 = vtst.8 d16, d16, d17 0xb1,0x08,0x50,0xf2 = vtst.16 d16, d16, d17 0xb1,0x08,0x60,0xf2 = vtst.32 d16, d16, d17 0xf2,0x08,0x40,0xf2 = vtst.8 q8, q8, q9 0xf2,0x08,0x50,0xf2 = vtst.16 q8, q8, q9 0xf2,0x08,0x60,0xf2 = vtst.32 q8, q8, q9 0x20,0x01,0xf1,0xf3 = vceq.i8 d16, d16, #0 0xa0,0x00,0xf1,0xf3 = vcge.s8 d16, d16, #0 0xa0,0x01,0xf1,0xf3 = vcle.s8 d16, d16, #0 0x20,0x00,0xf1,0xf3 = vcgt.s8 d16, d16, #0 0x20,0x02,0xf1,0xf3 = vclt.s8 d16, d16, #0 0x6a,0x83,0x46,0xf2 = vcgt.s8 q12, q3, q13 0x6a,0x83,0x56,0xf2 = vcgt.s16 q12, q3, q13 0x6a,0x83,0x66,0xf2 = vcgt.s32 q12, q3, q13 0x6a,0x83,0x46,0xf3 = vcgt.u8 q12, q3, q13 0x6a,0x83,0x56,0xf3 = vcgt.u16 q12, q3, q13 0x6a,0x83,0x66,0xf3 = vcgt.u32 q12, q3, q13 0x6a,0x8e,0x66,0xf3 = vcgt.f32 q12, q3, q13 0x0d,0xc3,0x03,0xf2 = vcgt.s8 d12, d3, d13 0x0d,0xc3,0x13,0xf2 = vcgt.s16 d12, d3, d13 0x0d,0xc3,0x23,0xf2 = vcgt.s32 d12, d3, d13 0x0d,0xc3,0x03,0xf3 = vcgt.u8 d12, d3, d13 0x0d,0xc3,0x13,0xf3 = vcgt.u16 d12, d3, d13 0x0d,0xc3,0x23,0xf3 = vcgt.u32 d12, d3, d13 0x0d,0xce,0x23,0xf3 = vcgt.f32 d12, d3, d13 0xb0,0x03,0x41,0xf2 = vcge.s8 d16, d17, d16 0xb0,0x03,0x51,0xf2 = vcge.s16 d16, d17, d16 0xb0,0x03,0x61,0xf2 = vcge.s32 d16, d17, d16 0xb0,0x03,0x41,0xf3 = vcge.u8 d16, d17, d16 0xb0,0x03,0x51,0xf3 = vcge.u16 d16, d17, d16 0xb0,0x03,0x61,0xf3 = vcge.u32 d16, d17, d16 0xa0,0x0e,0x41,0xf3 = vcge.f32 d16, d17, d16 0xf0,0x03,0x42,0xf2 = vcge.s8 q8, q9, q8 0xf0,0x03,0x52,0xf2 = vcge.s16 q8, q9, q8 0xf0,0x03,0x62,0xf2 = vcge.s32 q8, q9, q8 0xf0,0x03,0x42,0xf3 = vcge.u8 q8, q9, q8 0xf0,0x03,0x52,0xf3 = vcge.u16 q8, q9, q8 0xf0,0x03,0x62,0xf3 = vcge.u32 q8, q9, q8 0xe0,0x0e,0x42,0xf3 = vcge.f32 q8, q9, q8 0xf6,0x2e,0x68,0xf3 = vacgt.f32 q9, q12, q11 0x1b,0x9e,0x2c,0xf3 = vacgt.f32 d9, d12, d11 0xf6,0x6e,0x68,0xf3 = vacgt.f32 q11, q12, q11 0x1b,0xbe,0x2c,0xf3 = vacgt.f32 d11, d12, d11 0xf6,0x2e,0x48,0xf3 = vacge.f32 q9, q12, q11 0x1b,0x9e,0x0c,0xf3 = vacge.f32 d9, d12, d11 0xf6,0x6e,0x48,0xf3 = vacge.f32 q11, q12, q11 0x1b,0xbe,0x0c,0xf3 = vacge.f32 d11, d12, d11 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-convert-encoding.s.cs010066400017500001750000000022371363402546700233360ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x20,0x07,0xfb,0xf3 = vcvt.s32.f32 d16, d16 0xa0,0x07,0xfb,0xf3 = vcvt.u32.f32 d16, d16 0x20,0x06,0xfb,0xf3 = vcvt.f32.s32 d16, d16 0xa0,0x06,0xfb,0xf3 = vcvt.f32.u32 d16, d16 0x60,0x07,0xfb,0xf3 = vcvt.s32.f32 q8, q8 0xe0,0x07,0xfb,0xf3 = vcvt.u32.f32 q8, q8 0x60,0x06,0xfb,0xf3 = vcvt.f32.s32 q8, q8 0xe0,0x06,0xfb,0xf3 = vcvt.f32.u32 q8, q8 0x30,0x0f,0xff,0xf2 = vcvt.s32.f32 d16, d16, #1 0x20,0x07,0xfb,0xf3 = vcvt.s32.f32 d16, d16 0x30,0x0f,0xff,0xf3 = vcvt.u32.f32 d16, d16, #1 0xa0,0x07,0xfb,0xf3 = vcvt.u32.f32 d16, d16 0x30,0x0e,0xff,0xf2 = vcvt.f32.s32 d16, d16, #1 0x20,0x06,0xfb,0xf3 = vcvt.f32.s32 d16, d16 0x30,0x0e,0xff,0xf3 = vcvt.f32.u32 d16, d16, #1 0xa0,0x06,0xfb,0xf3 = vcvt.f32.u32 d16, d16 0x70,0x0f,0xff,0xf2 = vcvt.s32.f32 q8, q8, #1 0x60,0x07,0xfb,0xf3 = vcvt.s32.f32 q8, q8 0x70,0x0f,0xff,0xf3 = vcvt.u32.f32 q8, q8, #1 0xe0,0x07,0xfb,0xf3 = vcvt.u32.f32 q8, q8 0x70,0x0e,0xff,0xf2 = vcvt.f32.s32 q8, q8, #1 0x60,0x06,0xfb,0xf3 = vcvt.f32.s32 q8, q8 0x70,0x0e,0xff,0xf3 = vcvt.f32.u32 q8, q8, #1 0xe0,0x06,0xfb,0xf3 = vcvt.f32.u32 q8, q8 0x20,0x07,0xf6,0xf3 = vcvt.f32.f16 q8, d16 0x20,0x06,0xf6,0xf3 = vcvt.f16.f32 d16, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-crypto.s.cs010066400017500001750000000012251363402546700214060ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None 0x42,0x03,0xb0,0xf3 = aesd.8 q0, q1 0x02,0x03,0xb0,0xf3 = aese.8 q0, q1 0xc2,0x03,0xb0,0xf3 = aesimc.8 q0, q1 0x82,0x03,0xb0,0xf3 = aesmc.8 q0, q1 0xc2,0x02,0xb9,0xf3 = sha1h.32 q0, q1 0x82,0x03,0xba,0xf3 = sha1su1.32 q0, q1 0xc2,0x03,0xba,0xf3 = sha256su0.32 q0, q1 0x44,0x0c,0x02,0xf2 = sha1c.32 q0, q1, q2 0x44,0x0c,0x22,0xf2 = sha1m.32 q0, q1, q2 0x44,0x0c,0x12,0xf2 = sha1p.32 q0, q1, q2 0x44,0x0c,0x32,0xf2 = sha1su0.32 q0, q1, q2 0x44,0x0c,0x02,0xf3 = sha256h.32 q0, q1, q2 0x44,0x0c,0x12,0xf3 = sha256h2.32 q0, q1, q2 0x44,0x0c,0x22,0xf3 = sha256su1.32 q0, q1, q2 0xa1,0x0e,0xe0,0xf2 = vmull.p64 q8, d16, d17 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-dup-encoding.s.cs010066400017500001750000000007671363402546700224540ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x90,0x0b,0xc0,0xee = vdup.8 d16, r0 0xb0,0x0b,0x80,0xee = vdup.16 d16, r0 0x90,0x0b,0x80,0xee = vdup.32 d16, r0 0x90,0x0b,0xe0,0xee = vdup.8 q8, r0 0xb0,0x0b,0xa0,0xee = vdup.16 q8, r0 0x90,0x0b,0xa0,0xee = vdup.32 q8, r0 0x20,0x0c,0xf3,0xf3 = vdup.8 d16, d16[1] 0x20,0x0c,0xf6,0xf3 = vdup.16 d16, d16[1] 0x20,0x0c,0xfc,0xf3 = vdup.32 d16, d16[1] 0x60,0x0c,0xf3,0xf3 = vdup.8 q8, d16[1] 0x60,0x0c,0xf6,0xf3 = vdup.16 q8, d16[1] 0x60,0x0c,0xfc,0xf3 = vdup.32 q8, d16[1] capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-minmax-encoding.s.cs010066400017500001750000000046011363402546700231440ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x03,0x16,0x02,0xf2 = vmax.s8 d1, d2, d3 0x06,0x46,0x15,0xf2 = vmax.s16 d4, d5, d6 0x09,0x76,0x28,0xf2 = vmax.s32 d7, d8, d9 0x0c,0xa6,0x0b,0xf3 = vmax.u8 d10, d11, d12 0x0f,0xd6,0x1e,0xf3 = vmax.u16 d13, d14, d15 0xa2,0x06,0x61,0xf3 = vmax.u32 d16, d17, d18 0xa5,0x3f,0x44,0xf2 = vmax.f32 d19, d20, d21 0x03,0x26,0x02,0xf2 = vmax.s8 d2, d2, d3 0x06,0x56,0x15,0xf2 = vmax.s16 d5, d5, d6 0x09,0x86,0x28,0xf2 = vmax.s32 d8, d8, d9 0x0c,0xb6,0x0b,0xf3 = vmax.u8 d11, d11, d12 0x0f,0xe6,0x1e,0xf3 = vmax.u16 d14, d14, d15 0xa2,0x16,0x61,0xf3 = vmax.u32 d17, d17, d18 0xa5,0x4f,0x44,0xf2 = vmax.f32 d20, d20, d21 0x46,0x26,0x04,0xf2 = vmax.s8 q1, q2, q3 0x4c,0x86,0x1a,0xf2 = vmax.s16 q4, q5, q6 0xe2,0xe6,0x20,0xf2 = vmax.s32 q7, q8, q9 0xe8,0x46,0x46,0xf3 = vmax.u8 q10, q11, q12 0xee,0xa6,0x5c,0xf3 = vmax.u16 q13, q14, q15 0x60,0xc6,0x2e,0xf3 = vmax.u32 q6, q7, q8 0x42,0x2f,0x4a,0xf2 = vmax.f32 q9, q5, q1 0x46,0x46,0x04,0xf2 = vmax.s8 q2, q2, q3 0x4c,0xa6,0x1a,0xf2 = vmax.s16 q5, q5, q6 0xe2,0x06,0x60,0xf2 = vmax.s32 q8, q8, q9 0xc4,0x66,0x46,0xf3 = vmax.u8 q11, q11, q2 0x4a,0x86,0x18,0xf3 = vmax.u16 q4, q4, q5 0x60,0xe6,0x2e,0xf3 = vmax.u32 q7, q7, q8 0x42,0x4f,0x04,0xf2 = vmax.f32 q2, q2, q1 0x13,0x16,0x02,0xf2 = vmin.s8 d1, d2, d3 0x16,0x46,0x15,0xf2 = vmin.s16 d4, d5, d6 0x19,0x76,0x28,0xf2 = vmin.s32 d7, d8, d9 0x1c,0xa6,0x0b,0xf3 = vmin.u8 d10, d11, d12 0x1f,0xd6,0x1e,0xf3 = vmin.u16 d13, d14, d15 0xb2,0x06,0x61,0xf3 = vmin.u32 d16, d17, d18 0xa5,0x3f,0x64,0xf2 = vmin.f32 d19, d20, d21 0x13,0x26,0x02,0xf2 = vmin.s8 d2, d2, d3 0x16,0x56,0x15,0xf2 = vmin.s16 d5, d5, d6 0x19,0x86,0x28,0xf2 = vmin.s32 d8, d8, d9 0x1c,0xb6,0x0b,0xf3 = vmin.u8 d11, d11, d12 0x1f,0xe6,0x1e,0xf3 = vmin.u16 d14, d14, d15 0xb2,0x16,0x61,0xf3 = vmin.u32 d17, d17, d18 0xa5,0x4f,0x64,0xf2 = vmin.f32 d20, d20, d21 0x56,0x26,0x04,0xf2 = vmin.s8 q1, q2, q3 0x5c,0x86,0x1a,0xf2 = vmin.s16 q4, q5, q6 0xf2,0xe6,0x20,0xf2 = vmin.s32 q7, q8, q9 0xf8,0x46,0x46,0xf3 = vmin.u8 q10, q11, q12 0xfe,0xa6,0x5c,0xf3 = vmin.u16 q13, q14, q15 0x70,0xc6,0x2e,0xf3 = vmin.u32 q6, q7, q8 0x42,0x2f,0x6a,0xf2 = vmin.f32 q9, q5, q1 0x56,0x46,0x04,0xf2 = vmin.s8 q2, q2, q3 0x5c,0xa6,0x1a,0xf2 = vmin.s16 q5, q5, q6 0xf2,0x06,0x60,0xf2 = vmin.s32 q8, q8, q9 0xd4,0x66,0x46,0xf3 = vmin.u8 q11, q11, q2 0x5a,0x86,0x18,0xf3 = vmin.u16 q4, q4, q5 0x70,0xe6,0x2e,0xf3 = vmin.u32 q7, q7, q8 0x42,0x4f,0x24,0xf2 = vmin.f32 q2, q2, q1 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-mov-encoding.s.cs010066400017500001750000000060041363402546700224530ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x18,0x0e,0xc0,0xf2 = vmov.i8 d16, #0x8 0x10,0x08,0xc1,0xf2 = vmov.i16 d16, #0x10 0x10,0x0a,0xc1,0xf2 = vmov.i16 d16, #0x1000 0x10,0x00,0xc2,0xf2 = vmov.i32 d16, #0x20 0x10,0x02,0xc2,0xf2 = vmov.i32 d16, #0x2000 0x10,0x04,0xc2,0xf2 = vmov.i32 d16, #0x200000 0x10,0x06,0xc2,0xf2 = vmov.i32 d16, #0x20000000 0x10,0x0c,0xc2,0xf2 = vmov.i32 d16, #0x20ff 0x10,0x0d,0xc2,0xf2 = vmov.i32 d16, #0x20ffff 0x33,0x0e,0xc1,0xf3 = vmov.i64 d16, #0xff0000ff0000ffff 0x58,0x0e,0xc0,0xf2 = vmov.i8 q8, #0x8 0x50,0x08,0xc1,0xf2 = vmov.i16 q8, #0x10 0x50,0x0a,0xc1,0xf2 = vmov.i16 q8, #0x1000 0x50,0x00,0xc2,0xf2 = vmov.i32 q8, #0x20 0x50,0x02,0xc2,0xf2 = vmov.i32 q8, #0x2000 0x50,0x04,0xc2,0xf2 = vmov.i32 q8, #0x200000 0x50,0x06,0xc2,0xf2 = vmov.i32 q8, #0x20000000 0x50,0x0c,0xc2,0xf2 = vmov.i32 q8, #0x20ff 0x50,0x0d,0xc2,0xf2 = vmov.i32 q8, #0x20ffff 0x73,0x0e,0xc1,0xf3 = vmov.i64 q8, #0xff0000ff0000ffff 0x30,0x08,0xc1,0xf2 = vmvn.i16 d16, #0x10 0x30,0x0a,0xc1,0xf2 = vmvn.i16 d16, #0x1000 0x30,0x00,0xc2,0xf2 = vmvn.i32 d16, #0x20 0x30,0x02,0xc2,0xf2 = vmvn.i32 d16, #0x2000 0x30,0x04,0xc2,0xf2 = vmvn.i32 d16, #0x200000 0x30,0x06,0xc2,0xf2 = vmvn.i32 d16, #0x20000000 0x30,0x0c,0xc2,0xf2 = vmvn.i32 d16, #0x20ff 0x30,0x0d,0xc2,0xf2 = vmvn.i32 d16, #0x20ffff 0x30,0x0a,0xc8,0xf2 = vmovl.s8 q8, d16 0x30,0x0a,0xd0,0xf2 = vmovl.s16 q8, d16 0x30,0x0a,0xe0,0xf2 = vmovl.s32 q8, d16 0x30,0x0a,0xc8,0xf3 = vmovl.u8 q8, d16 0x30,0x0a,0xd0,0xf3 = vmovl.u16 q8, d16 0x30,0x0a,0xe0,0xf3 = vmovl.u32 q8, d16 0x20,0x02,0xf2,0xf3 = vmovn.i16 d16, q8 0x20,0x02,0xf6,0xf3 = vmovn.i32 d16, q8 0x20,0x02,0xfa,0xf3 = vmovn.i64 d16, q8 0xa0,0x02,0xf2,0xf3 = vqmovn.s16 d16, q8 0xa0,0x02,0xf6,0xf3 = vqmovn.s32 d16, q8 0xa0,0x02,0xfa,0xf3 = vqmovn.s64 d16, q8 0xe0,0x02,0xf2,0xf3 = vqmovn.u16 d16, q8 0xe0,0x02,0xf6,0xf3 = vqmovn.u32 d16, q8 0xe0,0x02,0xfa,0xf3 = vqmovn.u64 d16, q8 0x60,0x02,0xf2,0xf3 = vqmovun.s16 d16, q8 0x60,0x02,0xf6,0xf3 = vqmovun.s32 d16, q8 0x60,0x02,0xfa,0xf3 = vqmovun.s64 d16, q8 0xb0,0x0b,0x50,0xee = vmov.s8 r0, d16[1] 0xf0,0x0b,0x10,0xee = vmov.s16 r0, d16[1] 0xb0,0x0b,0xd0,0xee = vmov.u8 r0, d16[1] 0xf0,0x0b,0x90,0xee = vmov.u16 r0, d16[1] 0x90,0x0b,0x30,0xee = vmov.32 r0, d16[1] 0xb0,0x1b,0x40,0xee = vmov.8 d16[1], r1 0xf0,0x1b,0x00,0xee = vmov.16 d16[1], r1 0x90,0x1b,0x20,0xee = vmov.32 d16[1], r1 0xb0,0x1b,0x42,0xee = vmov.8 d18[1], r1 0xf0,0x1b,0x02,0xee = vmov.16 d18[1], r1 0x90,0x1b,0x22,0xee = vmov.32 d18[1], r1 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 0x82,0x15,0xb0,0xf3 = vmvn d1, d2 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-mul-accum-encoding.s.cs010066400017500001750000000033251363402546700235400ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa1,0x09,0x42,0xf2 = vmla.i8 d16, d18, d17 0xa1,0x09,0x52,0xf2 = vmla.i16 d16, d18, d17 0xa1,0x09,0x62,0xf2 = vmla.i32 d16, d18, d17 0xb1,0x0d,0x42,0xf2 = vmla.f32 d16, d18, d17 0xe4,0x29,0x40,0xf2 = vmla.i8 q9, q8, q10 0xe4,0x29,0x50,0xf2 = vmla.i16 q9, q8, q10 0xe4,0x29,0x60,0xf2 = vmla.i32 q9, q8, q10 0xf4,0x2d,0x40,0xf2 = vmla.f32 q9, q8, q10 0xc3,0x80,0xe0,0xf3 = vmla.i32 q12, q8, d3[0] 0xa2,0x08,0xc3,0xf2 = vmlal.s8 q8, d19, d18 0xa2,0x08,0xd3,0xf2 = vmlal.s16 q8, d19, d18 0xa2,0x08,0xe3,0xf2 = vmlal.s32 q8, d19, d18 0xa2,0x08,0xc3,0xf3 = vmlal.u8 q8, d19, d18 0xa2,0x08,0xd3,0xf3 = vmlal.u16 q8, d19, d18 0xa2,0x08,0xe3,0xf3 = vmlal.u32 q8, d19, d18 0xa2,0x09,0xd3,0xf2 = vqdmlal.s16 q8, d19, d18 0xa2,0x09,0xe3,0xf2 = vqdmlal.s32 q8, d19, d18 0x47,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[0] 0x4f,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[1] 0x67,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[2] 0x6f,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[3] 0xa1,0x09,0x42,0xf3 = vmls.i8 d16, d18, d17 0xa1,0x09,0x52,0xf3 = vmls.i16 d16, d18, d17 0xa1,0x09,0x62,0xf3 = vmls.i32 d16, d18, d17 0xb1,0x0d,0x62,0xf2 = vmls.f32 d16, d18, d17 0xe4,0x29,0x40,0xf3 = vmls.i8 q9, q8, q10 0xe4,0x29,0x50,0xf3 = vmls.i16 q9, q8, q10 0xe4,0x29,0x60,0xf3 = vmls.i32 q9, q8, q10 0xf4,0x2d,0x60,0xf2 = vmls.f32 q9, q8, q10 0xe6,0x84,0x98,0xf3 = vmls.i16 q4, q12, d6[2] 0xa2,0x0a,0xc3,0xf2 = vmlsl.s8 q8, d19, d18 0xa2,0x0a,0xd3,0xf2 = vmlsl.s16 q8, d19, d18 0xa2,0x0a,0xe3,0xf2 = vmlsl.s32 q8, d19, d18 0xa2,0x0a,0xc3,0xf3 = vmlsl.u8 q8, d19, d18 0xa2,0x0a,0xd3,0xf3 = vmlsl.u16 q8, d19, d18 0xa2,0x0a,0xe3,0xf3 = vmlsl.u32 q8, d19, d18 0xa2,0x0b,0xd3,0xf2 = vqdmlsl.s16 q8, d19, d18 0xa2,0x0b,0xe3,0xf2 = vqdmlsl.s32 q8, d19, d18 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-mul-encoding.s.cs010066400017500001750000000062221363402546700224510ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xb1,0x09,0x40,0xf2 = vmul.i8 d16, d16, d17 0xb1,0x09,0x50,0xf2 = vmul.i16 d16, d16, d17 0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17 0xb1,0x0d,0x40,0xf3 = vmul.f32 d16, d16, d17 0xf2,0x09,0x40,0xf2 = vmul.i8 q8, q8, q9 0xf2,0x09,0x50,0xf2 = vmul.i16 q8, q8, q9 0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9 0xf2,0x0d,0x40,0xf3 = vmul.f32 q8, q8, q9 0xb1,0x09,0x40,0xf3 = vmul.p8 d16, d16, d17 0xf2,0x09,0x40,0xf3 = vmul.p8 q8, q8, q9 0x68,0x28,0xd8,0xf2 = vmul.i16 d18, d8, d0[3] 0xb1,0x09,0x40,0xf2 = vmul.i8 d16, d16, d17 0xb1,0x09,0x50,0xf2 = vmul.i16 d16, d16, d17 0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17 0xb1,0x0d,0x40,0xf3 = vmul.f32 d16, d16, d17 0xf2,0x09,0x40,0xf2 = vmul.i8 q8, q8, q9 0xf2,0x09,0x50,0xf2 = vmul.i16 q8, q8, q9 0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9 0xf2,0x0d,0x40,0xf3 = vmul.f32 q8, q8, q9 0xb1,0x09,0x40,0xf3 = vmul.p8 d16, d16, d17 0xf2,0x09,0x40,0xf3 = vmul.p8 q8, q8, q9 0xa1,0x0b,0x50,0xf2 = vqdmulh.s16 d16, d16, d17 0xa1,0x0b,0x60,0xf2 = vqdmulh.s32 d16, d16, d17 0xe2,0x0b,0x50,0xf2 = vqdmulh.s16 q8, q8, q9 0xe2,0x0b,0x60,0xf2 = vqdmulh.s32 q8, q8, q9 0xa1,0x0b,0x50,0xf2 = vqdmulh.s16 d16, d16, d17 0xa1,0x0b,0x60,0xf2 = vqdmulh.s32 d16, d16, d17 0xe2,0x0b,0x50,0xf2 = vqdmulh.s16 q8, q8, q9 0xe2,0x0b,0x60,0xf2 = vqdmulh.s32 q8, q8, q9 0x43,0xbc,0x92,0xf2 = vqdmulh.s16 d11, d2, d3[0] 0xa1,0x0b,0x50,0xf3 = vqrdmulh.s16 d16, d16, d17 0xa1,0x0b,0x60,0xf3 = vqrdmulh.s32 d16, d16, d17 0xe2,0x0b,0x50,0xf3 = vqrdmulh.s16 q8, q8, q9 0xe2,0x0b,0x60,0xf3 = vqrdmulh.s32 q8, q8, q9 0xa1,0x0c,0xc0,0xf2 = vmull.s8 q8, d16, d17 0xa1,0x0c,0xd0,0xf2 = vmull.s16 q8, d16, d17 0xa1,0x0c,0xe0,0xf2 = vmull.s32 q8, d16, d17 0xa1,0x0c,0xc0,0xf3 = vmull.u8 q8, d16, d17 0xa1,0x0c,0xd0,0xf3 = vmull.u16 q8, d16, d17 0xa1,0x0c,0xe0,0xf3 = vmull.u32 q8, d16, d17 0xa1,0x0e,0xc0,0xf2 = vmull.p8 q8, d16, d17 0xa1,0x0d,0xd0,0xf2 = vqdmull.s16 q8, d16, d17 0xa1,0x0d,0xe0,0xf2 = vqdmull.s32 q8, d16, d17 0x64,0x08,0x90,0xf2 = vmul.i16 d0, d0, d4[2] 0x6f,0x18,0x91,0xf2 = vmul.i16 d1, d1, d7[3] 0x49,0x28,0x92,0xf2 = vmul.i16 d2, d2, d1[1] 0x42,0x38,0xa3,0xf2 = vmul.i32 d3, d3, d2[0] 0x63,0x48,0xa4,0xf2 = vmul.i32 d4, d4, d3[1] 0x44,0x58,0xa5,0xf2 = vmul.i32 d5, d5, d4[0] 0x65,0x69,0xa6,0xf2 = vmul.f32 d6, d6, d5[1] 0x64,0x08,0x90,0xf3 = vmul.i16 q0, q0, d4[2] 0x6f,0x28,0x92,0xf3 = vmul.i16 q1, q1, d7[3] 0x49,0x48,0x94,0xf3 = vmul.i16 q2, q2, d1[1] 0x42,0x68,0xa6,0xf3 = vmul.i32 q3, q3, d2[0] 0x63,0x88,0xa8,0xf3 = vmul.i32 q4, q4, d3[1] 0x44,0xa8,0xaa,0xf3 = vmul.i32 q5, q5, d4[0] 0x65,0xc9,0xac,0xf3 = vmul.f32 q6, q6, d5[1] 0x64,0x98,0x90,0xf2 = vmul.i16 d9, d0, d4[2] 0x6f,0x88,0x91,0xf2 = vmul.i16 d8, d1, d7[3] 0x49,0x78,0x92,0xf2 = vmul.i16 d7, d2, d1[1] 0x42,0x68,0xa3,0xf2 = vmul.i32 d6, d3, d2[0] 0x63,0x58,0xa4,0xf2 = vmul.i32 d5, d4, d3[1] 0x44,0x48,0xa5,0xf2 = vmul.i32 d4, d5, d4[0] 0x65,0x39,0xa6,0xf2 = vmul.f32 d3, d6, d5[1] 0x64,0x28,0xd0,0xf3 = vmul.i16 q9, q0, d4[2] 0x6f,0x08,0xd2,0xf3 = vmul.i16 q8, q1, d7[3] 0x49,0xe8,0x94,0xf3 = vmul.i16 q7, q2, d1[1] 0x42,0xc8,0xa6,0xf3 = vmul.i32 q6, q3, d2[0] 0x63,0xa8,0xa8,0xf3 = vmul.i32 q5, q4, d3[1] 0x44,0x88,0xaa,0xf3 = vmul.i32 q4, q5, d4[0] 0x65,0x69,0xac,0xf3 = vmul.f32 q3, q6, d5[1] capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-neg-encoding.s.cs010066400017500001750000000011051363402546700224200ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa0,0x03,0xf1,0xf3 = vneg.s8 d16, d16 0xa0,0x03,0xf5,0xf3 = vneg.s16 d16, d16 0xa0,0x03,0xf9,0xf3 = vneg.s32 d16, d16 0xa0,0x07,0xf9,0xf3 = vneg.f32 d16, d16 0xe0,0x03,0xf1,0xf3 = vneg.s8 q8, q8 0xe0,0x03,0xf5,0xf3 = vneg.s16 q8, q8 0xe0,0x03,0xf9,0xf3 = vneg.s32 q8, q8 0xe0,0x07,0xf9,0xf3 = vneg.f32 q8, q8 0xa0,0x07,0xf0,0xf3 = vqneg.s8 d16, d16 0xa0,0x07,0xf4,0xf3 = vqneg.s16 d16, d16 0xa0,0x07,0xf8,0xf3 = vqneg.s32 d16, d16 0xe0,0x07,0xf0,0xf3 = vqneg.s8 q8, q8 0xe0,0x07,0xf4,0xf3 = vqneg.s16 q8, q8 0xe0,0x07,0xf8,0xf3 = vqneg.s32 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-pairwise-encoding.s.cs010066400017500001750000000037371363402546700235070ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xb0,0x0b,0x41,0xf2 = vpadd.i8 d16, d17, d16 0xb0,0x0b,0x51,0xf2 = vpadd.i16 d16, d17, d16 0xb0,0x0b,0x61,0xf2 = vpadd.i32 d16, d17, d16 0xa1,0x0d,0x40,0xf3 = vpadd.f32 d16, d16, d17 0xb0,0x1b,0x41,0xf2 = vpadd.i8 d17, d17, d16 0xb0,0x1b,0x51,0xf2 = vpadd.i16 d17, d17, d16 0xb0,0x1b,0x61,0xf2 = vpadd.i32 d17, d17, d16 0xa1,0x0d,0x40,0xf3 = vpadd.f32 d16, d16, d17 0x20,0x02,0xf0,0xf3 = vpaddl.s8 d16, d16 0x20,0x02,0xf4,0xf3 = vpaddl.s16 d16, d16 0x20,0x02,0xf8,0xf3 = vpaddl.s32 d16, d16 0xa0,0x02,0xf0,0xf3 = vpaddl.u8 d16, d16 0xa0,0x02,0xf4,0xf3 = vpaddl.u16 d16, d16 0xa0,0x02,0xf8,0xf3 = vpaddl.u32 d16, d16 0x60,0x02,0xf0,0xf3 = vpaddl.s8 q8, q8 0x60,0x02,0xf4,0xf3 = vpaddl.s16 q8, q8 0x60,0x02,0xf8,0xf3 = vpaddl.s32 q8, q8 0xe0,0x02,0xf0,0xf3 = vpaddl.u8 q8, q8 0xe0,0x02,0xf4,0xf3 = vpaddl.u16 q8, q8 0xe0,0x02,0xf8,0xf3 = vpaddl.u32 q8, q8 0x21,0x06,0xf0,0xf3 = vpadal.s8 d16, d17 0x21,0x06,0xf4,0xf3 = vpadal.s16 d16, d17 0x21,0x06,0xf8,0xf3 = vpadal.s32 d16, d17 0xa1,0x06,0xf0,0xf3 = vpadal.u8 d16, d17 0xa1,0x06,0xf4,0xf3 = vpadal.u16 d16, d17 0xa1,0x06,0xf8,0xf3 = vpadal.u32 d16, d17 0x60,0x26,0xf0,0xf3 = vpadal.s8 q9, q8 0x60,0x26,0xf4,0xf3 = vpadal.s16 q9, q8 0x60,0x26,0xf8,0xf3 = vpadal.s32 q9, q8 0xe0,0x26,0xf0,0xf3 = vpadal.u8 q9, q8 0xe0,0x26,0xf4,0xf3 = vpadal.u16 q9, q8 0xe0,0x26,0xf8,0xf3 = vpadal.u32 q9, q8 0xb1,0x0a,0x40,0xf2 = vpmin.s8 d16, d16, d17 0xb1,0x0a,0x50,0xf2 = vpmin.s16 d16, d16, d17 0xb1,0x0a,0x60,0xf2 = vpmin.s32 d16, d16, d17 0xb1,0x0a,0x40,0xf3 = vpmin.u8 d16, d16, d17 0xb1,0x0a,0x50,0xf3 = vpmin.u16 d16, d16, d17 0xb1,0x0a,0x60,0xf3 = vpmin.u32 d16, d16, d17 0xa1,0x0f,0x60,0xf3 = vpmin.f32 d16, d16, d17 0xa1,0x0a,0x40,0xf2 = vpmax.s8 d16, d16, d17 0xa1,0x0a,0x50,0xf2 = vpmax.s16 d16, d16, d17 0xa1,0x0a,0x60,0xf2 = vpmax.s32 d16, d16, d17 0xa1,0x0a,0x40,0xf3 = vpmax.u8 d16, d16, d17 0xa1,0x0a,0x50,0xf3 = vpmax.u16 d16, d16, d17 0xa1,0x0a,0x60,0xf3 = vpmax.u32 d16, d16, d17 0xa1,0x0f,0x40,0xf3 = vpmax.f32 d16, d16, d17 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-reciprocal-encoding.s.cs010066400017500001750000000010451363402546700237750ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x20,0x04,0xfb,0xf3 = vrecpe.u32 d16, d16 0x60,0x04,0xfb,0xf3 = vrecpe.u32 q8, q8 0x20,0x05,0xfb,0xf3 = vrecpe.f32 d16, d16 0x60,0x05,0xfb,0xf3 = vrecpe.f32 q8, q8 0xb1,0x0f,0x40,0xf2 = vrecps.f32 d16, d16, d17 0xf2,0x0f,0x40,0xf2 = vrecps.f32 q8, q8, q9 0xa0,0x04,0xfb,0xf3 = vrsqrte.u32 d16, d16 0xe0,0x04,0xfb,0xf3 = vrsqrte.u32 q8, q8 0xa0,0x05,0xfb,0xf3 = vrsqrte.f32 d16, d16 0xe0,0x05,0xfb,0xf3 = vrsqrte.f32 q8, q8 0xb1,0x0f,0x60,0xf2 = vrsqrts.f32 d16, d16, d17 0xf2,0x0f,0x60,0xf2 = vrsqrts.f32 q8, q8, q9 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-reverse-encoding.s.cs010066400017500001750000000007731363402546700233340ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x20,0x00,0xf0,0xf3 = vrev64.8 d16, d16 0x20,0x00,0xf4,0xf3 = vrev64.16 d16, d16 0x20,0x00,0xf8,0xf3 = vrev64.32 d16, d16 0x60,0x00,0xf0,0xf3 = vrev64.8 q8, q8 0x60,0x00,0xf4,0xf3 = vrev64.16 q8, q8 0x60,0x00,0xf8,0xf3 = vrev64.32 q8, q8 0xa0,0x00,0xf0,0xf3 = vrev32.8 d16, d16 0xa0,0x00,0xf4,0xf3 = vrev32.16 d16, d16 0xe0,0x00,0xf0,0xf3 = vrev32.8 q8, q8 0xe0,0x00,0xf4,0xf3 = vrev32.16 q8, q8 0x20,0x01,0xf0,0xf3 = vrev16.8 d16, d16 0x60,0x01,0xf0,0xf3 = vrev16.8 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-satshift-encoding.s.cs010066400017500001750000000064621363402546700235070ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xb0,0x04,0x41,0xf2 = vqshl.s8 d16, d16, d17 0xb0,0x04,0x51,0xf2 = vqshl.s16 d16, d16, d17 0xb0,0x04,0x61,0xf2 = vqshl.s32 d16, d16, d17 0xb0,0x04,0x71,0xf2 = vqshl.s64 d16, d16, d17 0xb0,0x04,0x41,0xf3 = vqshl.u8 d16, d16, d17 0xb0,0x04,0x51,0xf3 = vqshl.u16 d16, d16, d17 0xb0,0x04,0x61,0xf3 = vqshl.u32 d16, d16, d17 0xb0,0x04,0x71,0xf3 = vqshl.u64 d16, d16, d17 0xf0,0x04,0x42,0xf2 = vqshl.s8 q8, q8, q9 0xf0,0x04,0x52,0xf2 = vqshl.s16 q8, q8, q9 0xf0,0x04,0x62,0xf2 = vqshl.s32 q8, q8, q9 0xf0,0x04,0x72,0xf2 = vqshl.s64 q8, q8, q9 0xf0,0x04,0x42,0xf3 = vqshl.u8 q8, q8, q9 0xf0,0x04,0x52,0xf3 = vqshl.u16 q8, q8, q9 0xf0,0x04,0x62,0xf3 = vqshl.u32 q8, q8, q9 0xf0,0x04,0x72,0xf3 = vqshl.u64 q8, q8, q9 0x30,0x07,0xcf,0xf2 = vqshl.s8 d16, d16, #7 0x30,0x07,0xdf,0xf2 = vqshl.s16 d16, d16, #15 0x30,0x07,0xff,0xf2 = vqshl.s32 d16, d16, #31 0xb0,0x07,0xff,0xf2 = vqshl.s64 d16, d16, #63 0x30,0x07,0xcf,0xf3 = vqshl.u8 d16, d16, #7 0x30,0x07,0xdf,0xf3 = vqshl.u16 d16, d16, #15 0x30,0x07,0xff,0xf3 = vqshl.u32 d16, d16, #31 0xb0,0x07,0xff,0xf3 = vqshl.u64 d16, d16, #63 0x30,0x06,0xcf,0xf3 = vqshlu.s8 d16, d16, #7 0x30,0x06,0xdf,0xf3 = vqshlu.s16 d16, d16, #15 0x30,0x06,0xff,0xf3 = vqshlu.s32 d16, d16, #31 0xb0,0x06,0xff,0xf3 = vqshlu.s64 d16, d16, #63 0x70,0x07,0xcf,0xf2 = vqshl.s8 q8, q8, #7 0x70,0x07,0xdf,0xf2 = vqshl.s16 q8, q8, #15 0x70,0x07,0xff,0xf2 = vqshl.s32 q8, q8, #31 0xf0,0x07,0xff,0xf2 = vqshl.s64 q8, q8, #63 0x70,0x07,0xcf,0xf3 = vqshl.u8 q8, q8, #7 0x70,0x07,0xdf,0xf3 = vqshl.u16 q8, q8, #15 0x70,0x07,0xff,0xf3 = vqshl.u32 q8, q8, #31 0xf0,0x07,0xff,0xf3 = vqshl.u64 q8, q8, #63 0x70,0x06,0xcf,0xf3 = vqshlu.s8 q8, q8, #7 0x70,0x06,0xdf,0xf3 = vqshlu.s16 q8, q8, #15 0x70,0x06,0xff,0xf3 = vqshlu.s32 q8, q8, #31 0xf0,0x06,0xff,0xf3 = vqshlu.s64 q8, q8, #63 0xb0,0x05,0x41,0xf2 = vqrshl.s8 d16, d16, d17 0xb0,0x05,0x51,0xf2 = vqrshl.s16 d16, d16, d17 0xb0,0x05,0x61,0xf2 = vqrshl.s32 d16, d16, d17 0xb0,0x05,0x71,0xf2 = vqrshl.s64 d16, d16, d17 0xb0,0x05,0x41,0xf3 = vqrshl.u8 d16, d16, d17 0xb0,0x05,0x51,0xf3 = vqrshl.u16 d16, d16, d17 0xb0,0x05,0x61,0xf3 = vqrshl.u32 d16, d16, d17 0xb0,0x05,0x71,0xf3 = vqrshl.u64 d16, d16, d17 0xf0,0x05,0x42,0xf2 = vqrshl.s8 q8, q8, q9 0xf0,0x05,0x52,0xf2 = vqrshl.s16 q8, q8, q9 0xf0,0x05,0x62,0xf2 = vqrshl.s32 q8, q8, q9 0xf0,0x05,0x72,0xf2 = vqrshl.s64 q8, q8, q9 0xf0,0x05,0x42,0xf3 = vqrshl.u8 q8, q8, q9 0xf0,0x05,0x52,0xf3 = vqrshl.u16 q8, q8, q9 0xf0,0x05,0x62,0xf3 = vqrshl.u32 q8, q8, q9 0xf0,0x05,0x72,0xf3 = vqrshl.u64 q8, q8, q9 0x30,0x09,0xc8,0xf2 = vqshrn.s16 d16, q8, #8 0x30,0x09,0xd0,0xf2 = vqshrn.s32 d16, q8, #16 0x30,0x09,0xe0,0xf2 = vqshrn.s64 d16, q8, #32 0x30,0x09,0xc8,0xf3 = vqshrn.u16 d16, q8, #8 0x30,0x09,0xd0,0xf3 = vqshrn.u32 d16, q8, #16 0x30,0x09,0xe0,0xf3 = vqshrn.u64 d16, q8, #32 0x30,0x08,0xc8,0xf3 = vqshrun.s16 d16, q8, #8 0x30,0x08,0xd0,0xf3 = vqshrun.s32 d16, q8, #16 0x30,0x08,0xe0,0xf3 = vqshrun.s64 d16, q8, #32 0x70,0x09,0xc8,0xf2 = vqrshrn.s16 d16, q8, #8 0x70,0x09,0xd0,0xf2 = vqrshrn.s32 d16, q8, #16 0x70,0x09,0xe0,0xf2 = vqrshrn.s64 d16, q8, #32 0x70,0x09,0xc8,0xf3 = vqrshrn.u16 d16, q8, #8 0x70,0x09,0xd0,0xf3 = vqrshrn.u32 d16, q8, #16 0x70,0x09,0xe0,0xf3 = vqrshrn.u64 d16, q8, #32 0x70,0x08,0xc8,0xf3 = vqrshrun.s16 d16, q8, #8 0x70,0x08,0xd0,0xf3 = vqrshrun.s32 d16, q8, #16 0x70,0x08,0xe0,0xf3 = vqrshrun.s64 d16, q8, #32 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-shift-encoding.s.cs010066400017500001750000000241651363402546700227770ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa1,0x04,0x40,0xf3 = vshl.u8 d16, d17, d16 0xa1,0x04,0x50,0xf3 = vshl.u16 d16, d17, d16 0xa1,0x04,0x60,0xf3 = vshl.u32 d16, d17, d16 0xa1,0x04,0x70,0xf3 = vshl.u64 d16, d17, d16 0x30,0x05,0xcf,0xf2 = vshl.i8 d16, d16, #7 0x30,0x05,0xdf,0xf2 = vshl.i16 d16, d16, #15 0x30,0x05,0xff,0xf2 = vshl.i32 d16, d16, #31 0xb0,0x05,0xff,0xf2 = vshl.i64 d16, d16, #63 0xe2,0x04,0x40,0xf3 = vshl.u8 q8, q9, q8 0xe2,0x04,0x50,0xf3 = vshl.u16 q8, q9, q8 0xe2,0x04,0x60,0xf3 = vshl.u32 q8, q9, q8 0xe2,0x04,0x70,0xf3 = vshl.u64 q8, q9, q8 0x70,0x05,0xcf,0xf2 = vshl.i8 q8, q8, #7 0x70,0x05,0xdf,0xf2 = vshl.i16 q8, q8, #15 0x70,0x05,0xff,0xf2 = vshl.i32 q8, q8, #31 0xf0,0x05,0xff,0xf2 = vshl.i64 q8, q8, #63 0x30,0x00,0xc9,0xf3 = vshr.u8 d16, d16, #7 0x30,0x00,0xd1,0xf3 = vshr.u16 d16, d16, #15 0x30,0x00,0xe1,0xf3 = vshr.u32 d16, d16, #31 0xb0,0x00,0xc1,0xf3 = vshr.u64 d16, d16, #63 0x70,0x00,0xc9,0xf3 = vshr.u8 q8, q8, #7 0x70,0x00,0xd1,0xf3 = vshr.u16 q8, q8, #15 0x70,0x00,0xe1,0xf3 = vshr.u32 q8, q8, #31 0xf0,0x00,0xc1,0xf3 = vshr.u64 q8, q8, #63 0x30,0x00,0xc9,0xf2 = vshr.s8 d16, d16, #7 0x30,0x00,0xd1,0xf2 = vshr.s16 d16, d16, #15 0x30,0x00,0xe1,0xf2 = vshr.s32 d16, d16, #31 0xb0,0x00,0xc1,0xf2 = vshr.s64 d16, d16, #63 0x70,0x00,0xc9,0xf2 = vshr.s8 q8, q8, #7 0x70,0x00,0xd1,0xf2 = vshr.s16 q8, q8, #15 0x70,0x00,0xe1,0xf2 = vshr.s32 q8, q8, #31 0xf0,0x00,0xc1,0xf2 = vshr.s64 q8, q8, #63 0x30,0x00,0xc9,0xf3 = vshr.u8 d16, d16, #7 0x30,0x00,0xd1,0xf3 = vshr.u16 d16, d16, #15 0x30,0x00,0xe1,0xf3 = vshr.u32 d16, d16, #31 0xb0,0x00,0xc1,0xf3 = vshr.u64 d16, d16, #63 0x70,0x00,0xc9,0xf3 = vshr.u8 q8, q8, #7 0x70,0x00,0xd1,0xf3 = vshr.u16 q8, q8, #15 0x70,0x00,0xe1,0xf3 = vshr.u32 q8, q8, #31 0xf0,0x00,0xc1,0xf3 = vshr.u64 q8, q8, #63 0x30,0x00,0xc9,0xf2 = vshr.s8 d16, d16, #7 0x30,0x00,0xd1,0xf2 = vshr.s16 d16, d16, #15 0x30,0x00,0xe1,0xf2 = vshr.s32 d16, d16, #31 0xb0,0x00,0xc1,0xf2 = vshr.s64 d16, d16, #63 0x70,0x00,0xc9,0xf2 = vshr.s8 q8, q8, #7 0x70,0x00,0xd1,0xf2 = vshr.s16 q8, q8, #15 0x70,0x00,0xe1,0xf2 = vshr.s32 q8, q8, #31 0xf0,0x00,0xc1,0xf2 = vshr.s64 q8, q8, #63 0x16,0x01,0xc9,0xf2 = vsra.s8 d16, d6, #7 0x32,0xa1,0xd1,0xf2 = vsra.s16 d26, d18, #15 0x1a,0xb1,0xa1,0xf2 = vsra.s32 d11, d10, #31 0xb3,0xc1,0x81,0xf2 = vsra.s64 d12, d19, #63 0x70,0x21,0x89,0xf2 = vsra.s8 q1, q8, #7 0x5e,0x41,0x91,0xf2 = vsra.s16 q2, q7, #15 0x5c,0x61,0xa1,0xf2 = vsra.s32 q3, q6, #31 0xda,0x81,0x81,0xf2 = vsra.s64 q4, q5, #63 0x30,0x01,0xc9,0xf2 = vsra.s8 d16, d16, #7 0x1f,0xf1,0x91,0xf2 = vsra.s16 d15, d15, #15 0x1e,0xe1,0xa1,0xf2 = vsra.s32 d14, d14, #31 0x9d,0xd1,0x81,0xf2 = vsra.s64 d13, d13, #63 0x58,0x81,0x89,0xf2 = vsra.s8 q4, q4, #7 0x5a,0xa1,0x91,0xf2 = vsra.s16 q5, q5, #15 0x5c,0xc1,0xa1,0xf2 = vsra.s32 q6, q6, #31 0xde,0xe1,0x81,0xf2 = vsra.s64 q7, q7, #63 0x16,0x01,0xc9,0xf3 = vsra.u8 d16, d6, #7 0x32,0xa1,0xd1,0xf3 = vsra.u16 d26, d18, #15 0x1a,0xb1,0xa1,0xf3 = vsra.u32 d11, d10, #31 0xb3,0xc1,0x81,0xf3 = vsra.u64 d12, d19, #63 0x70,0x21,0x89,0xf3 = vsra.u8 q1, q8, #7 0x5e,0x41,0x91,0xf3 = vsra.u16 q2, q7, #15 0x5c,0x61,0xa1,0xf3 = vsra.u32 q3, q6, #31 0xda,0x81,0x81,0xf3 = vsra.u64 q4, q5, #63 0x30,0x01,0xc9,0xf3 = vsra.u8 d16, d16, #7 0x1f,0xf1,0x91,0xf3 = vsra.u16 d15, d15, #15 0x1e,0xe1,0xa1,0xf3 = vsra.u32 d14, d14, #31 0x9d,0xd1,0x81,0xf3 = vsra.u64 d13, d13, #63 0x58,0x81,0x89,0xf3 = vsra.u8 q4, q4, #7 0x5a,0xa1,0x91,0xf3 = vsra.u16 q5, q5, #15 0x5c,0xc1,0xa1,0xf3 = vsra.u32 q6, q6, #31 0xde,0xe1,0x81,0xf3 = vsra.u64 q7, q7, #63 0x16,0x04,0xc9,0xf3 = vsri.8 d16, d6, #7 0x32,0xa4,0xd1,0xf3 = vsri.16 d26, d18, #15 0x1a,0xb4,0xa1,0xf3 = vsri.32 d11, d10, #31 0xb3,0xc4,0x81,0xf3 = vsri.64 d12, d19, #63 0x70,0x24,0x89,0xf3 = vsri.8 q1, q8, #7 0x5e,0x44,0x91,0xf3 = vsri.16 q2, q7, #15 0x5c,0x64,0xa1,0xf3 = vsri.32 q3, q6, #31 0xda,0x84,0x81,0xf3 = vsri.64 q4, q5, #63 0x30,0x04,0xc9,0xf3 = vsri.8 d16, d16, #7 0x1f,0xf4,0x91,0xf3 = vsri.16 d15, d15, #15 0x1e,0xe4,0xa1,0xf3 = vsri.32 d14, d14, #31 0x9d,0xd4,0x81,0xf3 = vsri.64 d13, d13, #63 0x58,0x84,0x89,0xf3 = vsri.8 q4, q4, #7 0x5a,0xa4,0x91,0xf3 = vsri.16 q5, q5, #15 0x5c,0xc4,0xa1,0xf3 = vsri.32 q6, q6, #31 0xde,0xe4,0x81,0xf3 = vsri.64 q7, q7, #63 0x16,0x05,0xcf,0xf3 = vsli.8 d16, d6, #7 0x32,0xa5,0xdf,0xf3 = vsli.16 d26, d18, #15 0x1a,0xb5,0xbf,0xf3 = vsli.32 d11, d10, #31 0xb3,0xc5,0xbf,0xf3 = vsli.64 d12, d19, #63 0x70,0x25,0x8f,0xf3 = vsli.8 q1, q8, #7 0x5e,0x45,0x9f,0xf3 = vsli.16 q2, q7, #15 0x5c,0x65,0xbf,0xf3 = vsli.32 q3, q6, #31 0xda,0x85,0xbf,0xf3 = vsli.64 q4, q5, #63 0x30,0x05,0xcf,0xf3 = vsli.8 d16, d16, #7 0x1f,0xf5,0x9f,0xf3 = vsli.16 d15, d15, #15 0x1e,0xe5,0xbf,0xf3 = vsli.32 d14, d14, #31 0x9d,0xd5,0xbf,0xf3 = vsli.64 d13, d13, #63 0x58,0x85,0x8f,0xf3 = vsli.8 q4, q4, #7 0x5a,0xa5,0x9f,0xf3 = vsli.16 q5, q5, #15 0x5c,0xc5,0xbf,0xf3 = vsli.32 q6, q6, #31 0xde,0xe5,0xbf,0xf3 = vsli.64 q7, q7, #63 0x30,0x0a,0xcf,0xf2 = vshll.s8 q8, d16, #7 0x30,0x0a,0xdf,0xf2 = vshll.s16 q8, d16, #15 0x30,0x0a,0xff,0xf2 = vshll.s32 q8, d16, #31 0x30,0x0a,0xcf,0xf3 = vshll.u8 q8, d16, #7 0x30,0x0a,0xdf,0xf3 = vshll.u16 q8, d16, #15 0x30,0x0a,0xff,0xf3 = vshll.u32 q8, d16, #31 0x20,0x03,0xf2,0xf3 = vshll.i8 q8, d16, #8 0x20,0x03,0xf6,0xf3 = vshll.i16 q8, d16, #16 0x20,0x03,0xfa,0xf3 = vshll.i32 q8, d16, #32 0x30,0x08,0xc8,0xf2 = vshrn.i16 d16, q8, #8 0x30,0x08,0xd0,0xf2 = vshrn.i32 d16, q8, #16 0x30,0x08,0xe0,0xf2 = vshrn.i64 d16, q8, #32 0xa1,0x05,0x40,0xf2 = vrshl.s8 d16, d17, d16 0xa1,0x05,0x50,0xf2 = vrshl.s16 d16, d17, d16 0xa1,0x05,0x60,0xf2 = vrshl.s32 d16, d17, d16 0xa1,0x05,0x70,0xf2 = vrshl.s64 d16, d17, d16 0xa1,0x05,0x40,0xf3 = vrshl.u8 d16, d17, d16 0xa1,0x05,0x50,0xf3 = vrshl.u16 d16, d17, d16 0xa1,0x05,0x60,0xf3 = vrshl.u32 d16, d17, d16 0xa1,0x05,0x70,0xf3 = vrshl.u64 d16, d17, d16 0xe2,0x05,0x40,0xf2 = vrshl.s8 q8, q9, q8 0xe2,0x05,0x50,0xf2 = vrshl.s16 q8, q9, q8 0xe2,0x05,0x60,0xf2 = vrshl.s32 q8, q9, q8 0xe2,0x05,0x70,0xf2 = vrshl.s64 q8, q9, q8 0xe2,0x05,0x40,0xf3 = vrshl.u8 q8, q9, q8 0xe2,0x05,0x50,0xf3 = vrshl.u16 q8, q9, q8 0xe2,0x05,0x60,0xf3 = vrshl.u32 q8, q9, q8 0xe2,0x05,0x70,0xf3 = vrshl.u64 q8, q9, q8 0x30,0x02,0xc8,0xf2 = vrshr.s8 d16, d16, #8 0x30,0x02,0xd0,0xf2 = vrshr.s16 d16, d16, #16 0x30,0x02,0xe0,0xf2 = vrshr.s32 d16, d16, #32 0xb0,0x02,0xc0,0xf2 = vrshr.s64 d16, d16, #64 0x30,0x02,0xc8,0xf3 = vrshr.u8 d16, d16, #8 0x30,0x02,0xd0,0xf3 = vrshr.u16 d16, d16, #16 0x30,0x02,0xe0,0xf3 = vrshr.u32 d16, d16, #32 0xb0,0x02,0xc0,0xf3 = vrshr.u64 d16, d16, #64 0x70,0x02,0xc8,0xf2 = vrshr.s8 q8, q8, #8 0x70,0x02,0xd0,0xf2 = vrshr.s16 q8, q8, #16 0x70,0x02,0xe0,0xf2 = vrshr.s32 q8, q8, #32 0xf0,0x02,0xc0,0xf2 = vrshr.s64 q8, q8, #64 0x70,0x02,0xc8,0xf3 = vrshr.u8 q8, q8, #8 0x70,0x02,0xd0,0xf3 = vrshr.u16 q8, q8, #16 0x70,0x02,0xe0,0xf3 = vrshr.u32 q8, q8, #32 0xf0,0x02,0xc0,0xf3 = vrshr.u64 q8, q8, #64 0x70,0x08,0xc8,0xf2 = vrshrn.i16 d16, q8, #8 0x70,0x08,0xd0,0xf2 = vrshrn.i32 d16, q8, #16 0x70,0x08,0xe0,0xf2 = vrshrn.i64 d16, q8, #32 0x70,0x09,0xcc,0xf2 = vqrshrn.s16 d16, q8, #4 0x70,0x09,0xd3,0xf2 = vqrshrn.s32 d16, q8, #13 0x70,0x09,0xf3,0xf2 = vqrshrn.s64 d16, q8, #13 0x70,0x09,0xcc,0xf3 = vqrshrn.u16 d16, q8, #4 0x70,0x09,0xd3,0xf3 = vqrshrn.u32 d16, q8, #13 0x70,0x09,0xf3,0xf3 = vqrshrn.u64 d16, q8, #13 0x48,0x84,0x0a,0xf2 = vshl.s8 q4, q4, q5 0x48,0x84,0x1a,0xf2 = vshl.s16 q4, q4, q5 0x48,0x84,0x2a,0xf2 = vshl.s32 q4, q4, q5 0x48,0x84,0x3a,0xf2 = vshl.s64 q4, q4, q5 0x48,0x84,0x0a,0xf3 = vshl.u8 q4, q4, q5 0x48,0x84,0x1a,0xf3 = vshl.u16 q4, q4, q5 0x48,0x84,0x2a,0xf3 = vshl.u32 q4, q4, q5 0x48,0x84,0x3a,0xf3 = vshl.u64 q4, q4, q5 0x04,0x44,0x05,0xf2 = vshl.s8 d4, d4, d5 0x04,0x44,0x15,0xf2 = vshl.s16 d4, d4, d5 0x04,0x44,0x25,0xf2 = vshl.s32 d4, d4, d5 0x04,0x44,0x35,0xf2 = vshl.s64 d4, d4, d5 0x04,0x44,0x05,0xf3 = vshl.u8 d4, d4, d5 0x04,0x44,0x15,0xf3 = vshl.u16 d4, d4, d5 0x04,0x44,0x25,0xf3 = vshl.u32 d4, d4, d5 0x04,0x44,0x35,0xf3 = vshl.u64 d4, d4, d5 0x58,0x85,0x8a,0xf2 = vshl.i8 q4, q4, #2 0x58,0x85,0x9e,0xf2 = vshl.i16 q4, q4, #14 0x58,0x85,0xbb,0xf2 = vshl.i32 q4, q4, #27 0xd8,0x85,0xa3,0xf2 = vshl.i64 q4, q4, #35 0x14,0x45,0x8e,0xf2 = vshl.i8 d4, d4, #6 0x14,0x45,0x9a,0xf2 = vshl.i16 d4, d4, #10 0x14,0x45,0xb1,0xf2 = vshl.i32 d4, d4, #17 0x94,0x45,0xab,0xf2 = vshl.i64 d4, d4, #43 0x0b,0xb5,0x04,0xf2 = vrshl.s8 d11, d11, d4 0x0c,0xc5,0x15,0xf2 = vrshl.s16 d12, d12, d5 0x0d,0xd5,0x26,0xf2 = vrshl.s32 d13, d13, d6 0x0e,0xe5,0x37,0xf2 = vrshl.s64 d14, d14, d7 0x0f,0xf5,0x08,0xf3 = vrshl.u8 d15, d15, d8 0x20,0x05,0x59,0xf3 = vrshl.u16 d16, d16, d9 0x21,0x15,0x6a,0xf3 = vrshl.u32 d17, d17, d10 0x22,0x25,0x7b,0xf3 = vrshl.u64 d18, d18, d11 0xc2,0x25,0x00,0xf2 = vrshl.s8 q1, q1, q8 0xc4,0x45,0x1e,0xf2 = vrshl.s16 q2, q2, q15 0xc6,0x65,0x2c,0xf2 = vrshl.s32 q3, q3, q14 0xc8,0x85,0x3a,0xf2 = vrshl.s64 q4, q4, q13 0xca,0xa5,0x08,0xf3 = vrshl.u8 q5, q5, q12 0xcc,0xc5,0x16,0xf3 = vrshl.u16 q6, q6, q11 0xce,0xe5,0x24,0xf3 = vrshl.u32 q7, q7, q10 0xe0,0x05,0x72,0xf3 = vrshl.u64 q8, q8, q9 0x1f,0xf0,0x88,0xf2 = vshr.s8 d15, d15, #8 0x1c,0xc0,0x90,0xf2 = vshr.s16 d12, d12, #16 0x1d,0xd0,0xa0,0xf2 = vshr.s32 d13, d13, #32 0x9e,0xe0,0x80,0xf2 = vshr.s64 d14, d14, #64 0x30,0x00,0xc8,0xf3 = vshr.u8 d16, d16, #8 0x31,0x10,0xd0,0xf3 = vshr.u16 d17, d17, #16 0x16,0x60,0xa0,0xf3 = vshr.u32 d6, d6, #32 0x9a,0xa0,0x80,0xf3 = vshr.u64 d10, d10, #64 0x52,0x20,0x88,0xf2 = vshr.s8 q1, q1, #8 0x54,0x40,0x90,0xf2 = vshr.s16 q2, q2, #16 0x56,0x60,0xa0,0xf2 = vshr.s32 q3, q3, #32 0xd8,0x80,0x80,0xf2 = vshr.s64 q4, q4, #64 0x5a,0xa0,0x88,0xf3 = vshr.u8 q5, q5, #8 0x5c,0xc0,0x90,0xf3 = vshr.u16 q6, q6, #16 0x5e,0xe0,0xa0,0xf3 = vshr.u32 q7, q7, #32 0xf0,0x00,0xc0,0xf3 = vshr.u64 q8, q8, #64 0x1f,0xf2,0x88,0xf2 = vrshr.s8 d15, d15, #8 0x1c,0xc2,0x90,0xf2 = vrshr.s16 d12, d12, #16 0x1d,0xd2,0xa0,0xf2 = vrshr.s32 d13, d13, #32 0x9e,0xe2,0x80,0xf2 = vrshr.s64 d14, d14, #64 0x30,0x02,0xc8,0xf3 = vrshr.u8 d16, d16, #8 0x31,0x12,0xd0,0xf3 = vrshr.u16 d17, d17, #16 0x16,0x62,0xa0,0xf3 = vrshr.u32 d6, d6, #32 0x9a,0xa2,0x80,0xf3 = vrshr.u64 d10, d10, #64 0x52,0x22,0x88,0xf2 = vrshr.s8 q1, q1, #8 0x54,0x42,0x90,0xf2 = vrshr.s16 q2, q2, #16 0x56,0x62,0xa0,0xf2 = vrshr.s32 q3, q3, #32 0xd8,0x82,0x80,0xf2 = vrshr.s64 q4, q4, #64 0x5a,0xa2,0x88,0xf3 = vrshr.u8 q5, q5, #8 0x5c,0xc2,0x90,0xf3 = vrshr.u16 q6, q6, #16 0x5e,0xe2,0xa0,0xf3 = vrshr.u32 q7, q7, #32 0xf0,0x02,0xc0,0xf3 = vrshr.u64 q8, q8, #64 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-shiftaccum-encoding.s.cs010066400017500001750000000101541363402546700240010ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x30,0x11,0xc8,0xf2 = vsra.s8 d17, d16, #8 0x1e,0xf1,0x90,0xf2 = vsra.s16 d15, d14, #16 0x1c,0xd1,0xa0,0xf2 = vsra.s32 d13, d12, #32 0x9a,0xb1,0x80,0xf2 = vsra.s64 d11, d10, #64 0x54,0xe1,0x88,0xf2 = vsra.s8 q7, q2, #8 0x5c,0x61,0x90,0xf2 = vsra.s16 q3, q6, #16 0x5a,0x21,0xe0,0xf2 = vsra.s32 q9, q5, #32 0xd8,0x01,0xc0,0xf2 = vsra.s64 q8, q4, #64 0x30,0x11,0xc8,0xf3 = vsra.u8 d17, d16, #8 0x1e,0xb1,0x95,0xf3 = vsra.u16 d11, d14, #11 0x1f,0xc1,0xaa,0xf3 = vsra.u32 d12, d15, #22 0xb0,0xd1,0x8a,0xf3 = vsra.u64 d13, d16, #54 0x5e,0x21,0x88,0xf3 = vsra.u8 q1, q7, #8 0x5e,0x41,0x9a,0xf3 = vsra.u16 q2, q7, #6 0x5c,0x61,0xab,0xf3 = vsra.u32 q3, q6, #21 0xda,0x81,0xa7,0xf3 = vsra.u64 q4, q5, #25 0x30,0x01,0xc8,0xf2 = vsra.s8 d16, d16, #8 0x1e,0xe1,0x90,0xf2 = vsra.s16 d14, d14, #16 0x1c,0xc1,0xa0,0xf2 = vsra.s32 d12, d12, #32 0x9a,0xa1,0x80,0xf2 = vsra.s64 d10, d10, #64 0x54,0x41,0x88,0xf2 = vsra.s8 q2, q2, #8 0x5c,0xc1,0x90,0xf2 = vsra.s16 q6, q6, #16 0x5a,0xa1,0xa0,0xf2 = vsra.s32 q5, q5, #32 0xd8,0x81,0x80,0xf2 = vsra.s64 q4, q4, #64 0x30,0x01,0xc8,0xf3 = vsra.u8 d16, d16, #8 0x1e,0xe1,0x95,0xf3 = vsra.u16 d14, d14, #11 0x1f,0xf1,0xaa,0xf3 = vsra.u32 d15, d15, #22 0xb0,0x01,0xca,0xf3 = vsra.u64 d16, d16, #54 0x5e,0xe1,0x88,0xf3 = vsra.u8 q7, q7, #8 0x5e,0xe1,0x9a,0xf3 = vsra.u16 q7, q7, #6 0x5c,0xc1,0xab,0xf3 = vsra.u32 q6, q6, #21 0xda,0xa1,0xa7,0xf3 = vsra.u64 q5, q5, #25 0x3a,0x53,0x88,0xf2 = vrsra.s8 d5, d26, #8 0x39,0x63,0x90,0xf2 = vrsra.s16 d6, d25, #16 0x38,0x73,0xa0,0xf2 = vrsra.s32 d7, d24, #32 0xb7,0xe3,0x80,0xf2 = vrsra.s64 d14, d23, #64 0x36,0xf3,0x88,0xf3 = vrsra.u8 d15, d22, #8 0x35,0x03,0xd0,0xf3 = vrsra.u16 d16, d21, #16 0x34,0x13,0xe0,0xf3 = vrsra.u32 d17, d20, #32 0xb3,0x23,0xc0,0xf3 = vrsra.u64 d18, d19, #64 0x54,0x23,0x88,0xf2 = vrsra.s8 q1, q2, #8 0x56,0x43,0x90,0xf2 = vrsra.s16 q2, q3, #16 0x58,0x63,0xa0,0xf2 = vrsra.s32 q3, q4, #32 0xda,0x83,0x80,0xf2 = vrsra.s64 q4, q5, #64 0x5c,0xa3,0x88,0xf3 = vrsra.u8 q5, q6, #8 0x5e,0xc3,0x90,0xf3 = vrsra.u16 q6, q7, #16 0x70,0xe3,0xa0,0xf3 = vrsra.u32 q7, q8, #32 0xf2,0x03,0xc0,0xf3 = vrsra.u64 q8, q9, #64 0x3a,0xa3,0xc8,0xf2 = vrsra.s8 d26, d26, #8 0x39,0x93,0xd0,0xf2 = vrsra.s16 d25, d25, #16 0x38,0x83,0xe0,0xf2 = vrsra.s32 d24, d24, #32 0xb7,0x73,0xc0,0xf2 = vrsra.s64 d23, d23, #64 0x36,0x63,0xc8,0xf3 = vrsra.u8 d22, d22, #8 0x35,0x53,0xd0,0xf3 = vrsra.u16 d21, d21, #16 0x34,0x43,0xe0,0xf3 = vrsra.u32 d20, d20, #32 0xb3,0x33,0xc0,0xf3 = vrsra.u64 d19, d19, #64 0x54,0x43,0x88,0xf2 = vrsra.s8 q2, q2, #8 0x56,0x63,0x90,0xf2 = vrsra.s16 q3, q3, #16 0x58,0x83,0xa0,0xf2 = vrsra.s32 q4, q4, #32 0xda,0xa3,0x80,0xf2 = vrsra.s64 q5, q5, #64 0x5c,0xc3,0x88,0xf3 = vrsra.u8 q6, q6, #8 0x5e,0xe3,0x90,0xf3 = vrsra.u16 q7, q7, #16 0x70,0x03,0xe0,0xf3 = vrsra.u32 q8, q8, #32 0xf2,0x23,0xc0,0xf3 = vrsra.u64 q9, q9, #64 0x1c,0xb5,0x8f,0xf3 = vsli.8 d11, d12, #7 0x1d,0xc5,0x9f,0xf3 = vsli.16 d12, d13, #15 0x1e,0xd5,0xbf,0xf3 = vsli.32 d13, d14, #31 0x9f,0xe5,0xbf,0xf3 = vsli.64 d14, d15, #63 0x70,0x25,0x8f,0xf3 = vsli.8 q1, q8, #7 0x5e,0x45,0x9f,0xf3 = vsli.16 q2, q7, #15 0x58,0x65,0xbf,0xf3 = vsli.32 q3, q4, #31 0xda,0x85,0xbf,0xf3 = vsli.64 q4, q5, #63 0x1b,0xc4,0xc8,0xf3 = vsri.8 d28, d11, #8 0x1c,0xa4,0xd0,0xf3 = vsri.16 d26, d12, #16 0x1d,0x84,0xe0,0xf3 = vsri.32 d24, d13, #32 0x9e,0x54,0xc0,0xf3 = vsri.64 d21, d14, #64 0x70,0x24,0x88,0xf3 = vsri.8 q1, q8, #8 0x54,0xa4,0x90,0xf3 = vsri.16 q5, q2, #16 0x58,0xe4,0xa0,0xf3 = vsri.32 q7, q4, #32 0xdc,0x24,0xc0,0xf3 = vsri.64 q9, q6, #64 0x1c,0xc5,0x8f,0xf3 = vsli.8 d12, d12, #7 0x1d,0xd5,0x9f,0xf3 = vsli.16 d13, d13, #15 0x1e,0xe5,0xbf,0xf3 = vsli.32 d14, d14, #31 0x9f,0xf5,0xbf,0xf3 = vsli.64 d15, d15, #63 0x70,0x05,0xcf,0xf3 = vsli.8 q8, q8, #7 0x5e,0xe5,0x9f,0xf3 = vsli.16 q7, q7, #15 0x58,0x85,0xbf,0xf3 = vsli.32 q4, q4, #31 0xda,0xa5,0xbf,0xf3 = vsli.64 q5, q5, #63 0x1b,0xb4,0x88,0xf3 = vsri.8 d11, d11, #8 0x1c,0xc4,0x90,0xf3 = vsri.16 d12, d12, #16 0x1d,0xd4,0xa0,0xf3 = vsri.32 d13, d13, #32 0x9e,0xe4,0x80,0xf3 = vsri.64 d14, d14, #64 0x70,0x04,0xc8,0xf3 = vsri.8 q8, q8, #8 0x54,0x44,0x90,0xf3 = vsri.16 q2, q2, #16 0x58,0x84,0xa0,0xf3 = vsri.32 q4, q4, #32 0xdc,0xc4,0x80,0xf3 = vsri.64 q6, q6, #64 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-shuffle-encoding.s.cs010066400017500001750000000044061363402546700233120ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa0,0x03,0xf1,0xf2 = vext.8 d16, d17, d16, #3 0xa0,0x05,0xf1,0xf2 = vext.8 d16, d17, d16, #5 0xe0,0x03,0xf2,0xf2 = vext.8 q8, q9, q8, #3 0xe0,0x07,0xf2,0xf2 = vext.8 q8, q9, q8, #7 0xa0,0x06,0xf1,0xf2 = vext.16 d16, d17, d16, #3 0xe0,0x0c,0xf2,0xf2 = vext.32 q8, q9, q8, #3 0xe0,0x08,0xf2,0xf2 = vext.64 q8, q9, q8, #1 0xa0,0x13,0xf1,0xf2 = vext.8 d17, d17, d16, #3 0x0b,0x75,0xb7,0xf2 = vext.8 d7, d7, d11, #5 0x60,0x63,0xb6,0xf2 = vext.8 q3, q3, q8, #3 0xc8,0x27,0xf2,0xf2 = vext.8 q9, q9, q4, #7 0x2a,0x16,0xb1,0xf2 = vext.16 d1, d1, d26, #3 0x60,0xac,0xba,0xf2 = vext.32 q5, q5, q8, #3 0x60,0xa8,0xba,0xf2 = vext.64 q5, q5, q8, #1 0xa0,0x10,0xf2,0xf3 = vtrn.8 d17, d16 0xa0,0x10,0xf6,0xf3 = vtrn.16 d17, d16 0xa0,0x10,0xfa,0xf3 = vtrn.32 d17, d16 0xe0,0x20,0xf2,0xf3 = vtrn.8 q9, q8 0xe0,0x20,0xf6,0xf3 = vtrn.16 q9, q8 0xe0,0x20,0xfa,0xf3 = vtrn.32 q9, q8 0x20,0x11,0xf2,0xf3 = vuzp.8 d17, d16 0x20,0x11,0xf6,0xf3 = vuzp.16 d17, d16 0x60,0x21,0xf2,0xf3 = vuzp.8 q9, q8 0x60,0x21,0xf6,0xf3 = vuzp.16 q9, q8 0x60,0x21,0xfa,0xf3 = vuzp.32 q9, q8 0xa0,0x11,0xf2,0xf3 = vzip.8 d17, d16 0xa0,0x11,0xf6,0xf3 = vzip.16 d17, d16 0xe0,0x21,0xf2,0xf3 = vzip.8 q9, q8 0xe0,0x21,0xf6,0xf3 = vzip.16 q9, q8 0xe0,0x21,0xfa,0xf3 = vzip.32 q9, q8 0x83,0x20,0xba,0xf3 = vtrn.32 d2, d3 0x83,0x20,0xba,0xf3 = vtrn.32 d2, d3 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-sub-encoding.s.cs010066400017500001750000000070221363402546700224440ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa0,0x08,0x41,0xf3 = vsub.i8 d16, d17, d16 0xa0,0x08,0x51,0xf3 = vsub.i16 d16, d17, d16 0xa0,0x08,0x61,0xf3 = vsub.i32 d16, d17, d16 0xa0,0x08,0x71,0xf3 = vsub.i64 d16, d17, d16 0xa1,0x0d,0x60,0xf2 = vsub.f32 d16, d16, d17 0xe2,0x08,0x40,0xf3 = vsub.i8 q8, q8, q9 0xe2,0x08,0x50,0xf3 = vsub.i16 q8, q8, q9 0xe2,0x08,0x60,0xf3 = vsub.i32 q8, q8, q9 0xe2,0x08,0x70,0xf3 = vsub.i64 q8, q8, q9 0xe2,0x0d,0x60,0xf2 = vsub.f32 q8, q8, q9 0x25,0xd8,0x0d,0xf3 = vsub.i8 d13, d13, d21 0x26,0xe8,0x1e,0xf3 = vsub.i16 d14, d14, d22 0x27,0xf8,0x2f,0xf3 = vsub.i32 d15, d15, d23 0xa8,0x08,0x70,0xf3 = vsub.i64 d16, d16, d24 0xa9,0x1d,0x61,0xf2 = vsub.f32 d17, d17, d25 0x64,0x28,0x02,0xf3 = vsub.i8 q1, q1, q10 0x62,0x48,0x14,0xf3 = vsub.i16 q2, q2, q9 0x60,0x68,0x26,0xf3 = vsub.i32 q3, q3, q8 0x4e,0x88,0x38,0xf3 = vsub.i64 q4, q4, q7 0x4c,0xad,0x2a,0xf2 = vsub.f32 q5, q5, q6 0xa0,0x02,0xc1,0xf2 = vsubl.s8 q8, d17, d16 0xa0,0x02,0xd1,0xf2 = vsubl.s16 q8, d17, d16 0xa0,0x02,0xe1,0xf2 = vsubl.s32 q8, d17, d16 0xa0,0x02,0xc1,0xf3 = vsubl.u8 q8, d17, d16 0xa0,0x02,0xd1,0xf3 = vsubl.u16 q8, d17, d16 0xa0,0x02,0xe1,0xf3 = vsubl.u32 q8, d17, d16 0xa2,0x03,0xc0,0xf2 = vsubw.s8 q8, q8, d18 0xa2,0x03,0xd0,0xf2 = vsubw.s16 q8, q8, d18 0xa2,0x03,0xe0,0xf2 = vsubw.s32 q8, q8, d18 0xa2,0x03,0xc0,0xf3 = vsubw.u8 q8, q8, d18 0xa2,0x03,0xd0,0xf3 = vsubw.u16 q8, q8, d18 0xa2,0x03,0xe0,0xf3 = vsubw.u32 q8, q8, d18 0xa1,0x02,0x40,0xf2 = vhsub.s8 d16, d16, d17 0xa1,0x02,0x50,0xf2 = vhsub.s16 d16, d16, d17 0xa1,0x02,0x60,0xf2 = vhsub.s32 d16, d16, d17 0xa1,0x02,0x40,0xf3 = vhsub.u8 d16, d16, d17 0xa1,0x02,0x50,0xf3 = vhsub.u16 d16, d16, d17 0xa1,0x02,0x60,0xf3 = vhsub.u32 d16, d16, d17 0xe2,0x02,0x40,0xf2 = vhsub.s8 q8, q8, q9 0xe2,0x02,0x50,0xf2 = vhsub.s16 q8, q8, q9 0xe2,0x02,0x60,0xf2 = vhsub.s32 q8, q8, q9 0xb1,0x02,0x40,0xf2 = vqsub.s8 d16, d16, d17 0xb1,0x02,0x50,0xf2 = vqsub.s16 d16, d16, d17 0xb1,0x02,0x60,0xf2 = vqsub.s32 d16, d16, d17 0xb1,0x02,0x70,0xf2 = vqsub.s64 d16, d16, d17 0xb1,0x02,0x40,0xf3 = vqsub.u8 d16, d16, d17 0xb1,0x02,0x50,0xf3 = vqsub.u16 d16, d16, d17 0xb1,0x02,0x60,0xf3 = vqsub.u32 d16, d16, d17 0xb1,0x02,0x70,0xf3 = vqsub.u64 d16, d16, d17 0xf2,0x02,0x40,0xf2 = vqsub.s8 q8, q8, q9 0xf2,0x02,0x50,0xf2 = vqsub.s16 q8, q8, q9 0xf2,0x02,0x60,0xf2 = vqsub.s32 q8, q8, q9 0xf2,0x02,0x70,0xf2 = vqsub.s64 q8, q8, q9 0xf2,0x02,0x40,0xf3 = vqsub.u8 q8, q8, q9 0xf2,0x02,0x50,0xf3 = vqsub.u16 q8, q8, q9 0xf2,0x02,0x60,0xf3 = vqsub.u32 q8, q8, q9 0xf2,0x02,0x70,0xf3 = vqsub.u64 q8, q8, q9 0xa2,0x06,0xc0,0xf2 = vsubhn.i16 d16, q8, q9 0xa2,0x06,0xd0,0xf2 = vsubhn.i32 d16, q8, q9 0xa2,0x06,0xe0,0xf2 = vsubhn.i64 d16, q8, q9 0xa2,0x06,0xc0,0xf3 = vrsubhn.i16 d16, q8, q9 0xa2,0x06,0xd0,0xf3 = vrsubhn.i32 d16, q8, q9 0xa2,0x06,0xe0,0xf3 = vrsubhn.i64 d16, q8, q9 0x28,0xb2,0x0b,0xf2 = vhsub.s8 d11, d11, d24 0x27,0xc2,0x1c,0xf2 = vhsub.s16 d12, d12, d23 0x26,0xd2,0x2d,0xf2 = vhsub.s32 d13, d13, d22 0x25,0xe2,0x0e,0xf3 = vhsub.u8 d14, d14, d21 0x24,0xf2,0x1f,0xf3 = vhsub.u16 d15, d15, d20 0xa3,0x02,0x60,0xf3 = vhsub.u32 d16, d16, d19 0x68,0x22,0x02,0xf2 = vhsub.s8 q1, q1, q12 0x66,0x42,0x14,0xf2 = vhsub.s16 q2, q2, q11 0x64,0x62,0x26,0xf2 = vhsub.s32 q3, q3, q10 0x62,0x82,0x08,0xf3 = vhsub.u8 q4, q4, q9 0x60,0xa2,0x1a,0xf3 = vhsub.u16 q5, q5, q8 0x4e,0xc2,0x2c,0xf3 = vhsub.u32 q6, q6, q7 0x05,0xc3,0x8c,0xf2 = vsubw.s8 q6, q6, d5 0x01,0xe3,0x9e,0xf2 = vsubw.s16 q7, q7, d1 0x82,0x03,0xe0,0xf2 = vsubw.s32 q8, q8, d2 0x05,0xc3,0x8c,0xf3 = vsubw.u8 q6, q6, d5 0x01,0xe3,0x9e,0xf3 = vsubw.u16 q7, q7, d1 0x82,0x03,0xe0,0xf3 = vsubw.u32 q8, q8, d2 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-table-encoding.s.cs010066400017500001750000000007051363402546700227430ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa0,0x08,0xf1,0xf3 = vtbl.8 d16, {d17}, d16 0xa2,0x09,0xf0,0xf3 = vtbl.8 d16, {d16, d17}, d18 0xa4,0x0a,0xf0,0xf3 = vtbl.8 d16, {d16, d17, d18}, d20 0xa4,0x0b,0xf0,0xf3 = vtbl.8 d16, {d16, d17, d18, d19}, d20 0xe1,0x28,0xf0,0xf3 = vtbx.8 d18, {d16}, d17 0xe2,0x39,0xf0,0xf3 = vtbx.8 d19, {d16, d17}, d18 0xe5,0x4a,0xf0,0xf3 = vtbx.8 d20, {d16, d17, d18}, d21 0xe5,0x4b,0xf0,0xf3 = vtbx.8 d20, {d16, d17, d18, d19}, d21 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-v8.s.cs010066400017500001750000000031101363402546700204160ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None 0x11,0x4f,0x05,0xf3 = vmaxnm.f32 d4, d5, d1 0x5c,0x4f,0x08,0xf3 = vmaxnm.f32 q2, q4, q6 0x3e,0x5f,0x24,0xf3 = vminnm.f32 d5, d4, d30 0xd4,0x0f,0x2a,0xf3 = vminnm.f32 q0, q13, q2 0x06,0x40,0xbb,0xf3 = vcvta.s32.f32 d4, d6 0x8a,0xc0,0xbb,0xf3 = vcvta.u32.f32 d12, d10 0x4c,0x80,0xbb,0xf3 = vcvta.s32.f32 q4, q6 0xe4,0x80,0xbb,0xf3 = vcvta.u32.f32 q4, q10 0x2e,0x13,0xbb,0xf3 = vcvtm.s32.f32 d1, d30 0x8a,0xc3,0xbb,0xf3 = vcvtm.u32.f32 d12, d10 0x64,0x23,0xbb,0xf3 = vcvtm.s32.f32 q1, q10 0xc2,0xa3,0xfb,0xf3 = vcvtm.u32.f32 q13, q1 0x21,0xf1,0xbb,0xf3 = vcvtn.s32.f32 d15, d17 0x83,0x51,0xbb,0xf3 = vcvtn.u32.f32 d5, d3 0x60,0x61,0xbb,0xf3 = vcvtn.s32.f32 q3, q8 0xc6,0xa1,0xbb,0xf3 = vcvtn.u32.f32 q5, q3 0x25,0xb2,0xbb,0xf3 = vcvtp.s32.f32 d11, d21 0xa7,0xe2,0xbb,0xf3 = vcvtp.u32.f32 d14, d23 0x6e,0x82,0xbb,0xf3 = vcvtp.s32.f32 q4, q15 0xe0,0x22,0xfb,0xf3 = vcvtp.u32.f32 q9, q8 0x00,0x34,0xba,0xf3 = vrintn.f32 d3, d0 0x48,0x24,0xba,0xf3 = vrintn.f32 q1, q4 0x8c,0x54,0xba,0xf3 = vrintx.f32 d5, d12 0xc6,0x04,0xba,0xf3 = vrintx.f32 q0, q3 0x00,0x35,0xba,0xf3 = vrinta.f32 d3, d0 0x44,0x05,0xfa,0xf3 = vrinta.f32 q8, q2 0xa2,0xc5,0xba,0xf3 = vrintz.f32 d12, d18 0xc8,0x25,0xfa,0xf3 = vrintz.f32 q9, q4 0x80,0x36,0xba,0xf3 = vrintm.f32 d3, d0 0xc8,0x26,0xba,0xf3 = vrintm.f32 q1, q4 0x80,0x37,0xba,0xf3 = vrintp.f32 d3, d0 0xc8,0x27,0xba,0xf3 = vrintp.f32 q1, q4 0x00,0x34,0xba,0xf3 = vrintn.f32 d3, d0 0xc6,0x04,0xba,0xf3 = vrintx.f32 q0, q3 0x00,0x35,0xba,0xf3 = vrinta.f32 d3, d0 0xc8,0x25,0xfa,0xf3 = vrintz.f32 q9, q4 0xc8,0x27,0xba,0xf3 = vrintp.f32 q1, q4 capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-vld-encoding.s.cs010066400017500001750000000272021363402546700224420ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x1f,0x07,0x60,0xf4 = vld1.8 {d16}, [r0:64] 0x4f,0x07,0x60,0xf4 = vld1.16 {d16}, [r0] 0x8f,0x07,0x60,0xf4 = vld1.32 {d16}, [r0] 0xcf,0x07,0x60,0xf4 = vld1.64 {d16}, [r0] 0x1f,0x0a,0x60,0xf4 = vld1.8 {d16, d17}, [r0:64] 0x6f,0x0a,0x60,0xf4 = vld1.16 {d16, d17}, [r0:128] 0x8f,0x0a,0x60,0xf4 = vld1.32 {d16, d17}, [r0] 0xcf,0x0a,0x60,0xf4 = vld1.64 {d16, d17}, [r0] 0x0f,0x16,0x23,0xf4 = vld1.8 {d1, d2, d3}, [r3] 0x5f,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64] 0x8f,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3] 0xdf,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64] 0x0f,0x12,0x23,0xf4 = vld1.8 {d1, d2, d3, d4}, [r3] 0x5f,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64] 0x8f,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3] 0xdf,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64] 0x1d,0x07,0x60,0xf4 = vld1.8 {d16}, [r0:64]! 0x4d,0x07,0x60,0xf4 = vld1.16 {d16}, [r0]! 0x8d,0x07,0x60,0xf4 = vld1.32 {d16}, [r0]! 0xcd,0x07,0x60,0xf4 = vld1.64 {d16}, [r0]! 0x1d,0x0a,0x60,0xf4 = vld1.8 {d16, d17}, [r0:64]! 0x6d,0x0a,0x60,0xf4 = vld1.16 {d16, d17}, [r0:128]! 0x8d,0x0a,0x60,0xf4 = vld1.32 {d16, d17}, [r0]! 0xcd,0x0a,0x60,0xf4 = vld1.64 {d16, d17}, [r0]! 0x15,0x07,0x60,0xf4 = vld1.8 {d16}, [r0:64], r5 0x45,0x07,0x60,0xf4 = vld1.16 {d16}, [r0], r5 0x85,0x07,0x60,0xf4 = vld1.32 {d16}, [r0], r5 0xc5,0x07,0x60,0xf4 = vld1.64 {d16}, [r0], r5 0x15,0x0a,0x60,0xf4 = vld1.8 {d16, d17}, [r0:64], r5 0x65,0x0a,0x60,0xf4 = vld1.16 {d16, d17}, [r0:128], r5 0x85,0x0a,0x60,0xf4 = vld1.32 {d16, d17}, [r0], r5 0xc5,0x0a,0x60,0xf4 = vld1.64 {d16, d17}, [r0], r5 0x0d,0x16,0x23,0xf4 = vld1.8 {d1, d2, d3}, [r3]! 0x5d,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64]! 0x8d,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3]! 0xdd,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64]! 0x06,0x16,0x23,0xf4 = vld1.8 {d1, d2, d3}, [r3], r6 0x56,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64], r6 0x86,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3], r6 0xd6,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64], r6 0x0d,0x12,0x23,0xf4 = vld1.8 {d1, d2, d3, d4}, [r3]! 0x5d,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64]! 0x8d,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3]! 0xdd,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64]! 0x08,0x12,0x23,0xf4 = vld1.8 {d1, d2, d3, d4}, [r3], r8 0x58,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64], r8 0x88,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3], r8 0xd8,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64], r8 0x1f,0x08,0x60,0xf4 = vld2.8 {d16, d17}, [r0:64] 0x6f,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128] 0x8f,0x08,0x60,0xf4 = vld2.32 {d16, d17}, [r0] 0x1f,0x03,0x60,0xf4 = vld2.8 {d16, d17, d18, d19}, [r0:64] 0x6f,0x03,0x60,0xf4 = vld2.16 {d16, d17, d18, d19}, [r0:128] 0xbf,0x03,0x60,0xf4 = vld2.32 {d16, d17, d18, d19}, [r0:256] 0x1d,0x38,0x60,0xf4 = vld2.8 {d19, d20}, [r0:64]! 0x6d,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128]! 0x8d,0x48,0x60,0xf4 = vld2.32 {d20, d21}, [r0]! 0x1d,0x43,0x20,0xf4 = vld2.8 {d4, d5, d6, d7}, [r0:64]! 0x6d,0x13,0x20,0xf4 = vld2.16 {d1, d2, d3, d4}, [r0:128]! 0xbd,0xe3,0x20,0xf4 = vld2.32 {d14, d15, d16, d17}, [r0:256]! 0x16,0x38,0x60,0xf4 = vld2.8 {d19, d20}, [r0:64], r6 0x66,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128], r6 0x86,0x48,0x60,0xf4 = vld2.32 {d20, d21}, [r0], r6 0x16,0x43,0x20,0xf4 = vld2.8 {d4, d5, d6, d7}, [r0:64], r6 0x66,0x13,0x20,0xf4 = vld2.16 {d1, d2, d3, d4}, [r0:128], r6 0xb6,0xe3,0x20,0xf4 = vld2.32 {d14, d15, d16, d17}, [r0:256], r6 0x0f,0x04,0x61,0xf4 = vld3.8 {d16, d17, d18}, [r1] 0x4f,0x64,0x22,0xf4 = vld3.16 {d6, d7, d8}, [r2] 0x8f,0x14,0x23,0xf4 = vld3.32 {d1, d2, d3}, [r3] 0x1f,0x05,0x60,0xf4 = vld3.8 {d16, d18, d20}, [r0:64] 0x4f,0xb5,0x64,0xf4 = vld3.16 {d27, d29, d31}, [r4] 0x8f,0x65,0x25,0xf4 = vld3.32 {d6, d8, d10}, [r5] 0x01,0xc4,0x26,0xf4 = vld3.8 {d12, d13, d14}, [r6], r1 0x42,0xb4,0x27,0xf4 = vld3.16 {d11, d12, d13}, [r7], r2 0x83,0x24,0x28,0xf4 = vld3.32 {d2, d3, d4}, [r8], r3 0x04,0x45,0x29,0xf4 = vld3.8 {d4, d6, d8}, [r9], r4 0x44,0xe5,0x29,0xf4 = vld3.16 {d14, d16, d18}, [r9], r4 0x85,0x05,0x6a,0xf4 = vld3.32 {d16, d18, d20}, [r10], r5 0x0d,0x64,0x28,0xf4 = vld3.8 {d6, d7, d8}, [r8]! 0x4d,0x94,0x27,0xf4 = vld3.16 {d9, d10, d11}, [r7]! 0x8d,0x14,0x26,0xf4 = vld3.32 {d1, d2, d3}, [r6]! 0x1d,0x05,0x60,0xf4 = vld3.8 {d16, d18, d20}, [r0:64]! 0x4d,0x45,0x65,0xf4 = vld3.16 {d20, d22, d24}, [r5]! 0x8d,0x55,0x24,0xf4 = vld3.32 {d5, d7, d9}, [r4]! 0x1f,0x00,0x61,0xf4 = vld4.8 {d16, d17, d18, d19}, [r1:64] 0x6f,0x00,0x62,0xf4 = vld4.16 {d16, d17, d18, d19}, [r2:128] 0xbf,0x00,0x63,0xf4 = vld4.32 {d16, d17, d18, d19}, [r3:256] 0x3f,0x11,0x65,0xf4 = vld4.8 {d17, d19, d21, d23}, [r5:256] 0x4f,0x11,0x67,0xf4 = vld4.16 {d17, d19, d21, d23}, [r7] 0x8f,0x01,0x68,0xf4 = vld4.32 {d16, d18, d20, d22}, [r8] 0x1d,0x00,0x61,0xf4 = vld4.8 {d16, d17, d18, d19}, [r1:64]! 0x6d,0x00,0x62,0xf4 = vld4.16 {d16, d17, d18, d19}, [r2:128]! 0xbd,0x00,0x63,0xf4 = vld4.32 {d16, d17, d18, d19}, [r3:256]! 0x3d,0x11,0x65,0xf4 = vld4.8 {d17, d19, d21, d23}, [r5:256]! 0x4d,0x11,0x67,0xf4 = vld4.16 {d17, d19, d21, d23}, [r7]! 0x8d,0x01,0x68,0xf4 = vld4.32 {d16, d18, d20, d22}, [r8]! 0x18,0x00,0x61,0xf4 = vld4.8 {d16, d17, d18, d19}, [r1:64], r8 0x47,0x00,0x62,0xf4 = vld4.16 {d16, d17, d18, d19}, [r2], r7 0x95,0x00,0x63,0xf4 = vld4.32 {d16, d17, d18, d19}, [r3:64], r5 0x32,0x01,0x64,0xf4 = vld4.8 {d16, d18, d20, d22}, [r4:256], r2 0x43,0x01,0x66,0xf4 = vld4.16 {d16, d18, d20, d22}, [r6], r3 0x84,0x11,0x69,0xf4 = vld4.32 {d17, d19, d21, d23}, [r9], r4 0x0f,0x4c,0xa1,0xf4 = vld1.8 {d4[]}, [r1] 0x0d,0x4c,0xa1,0xf4 = vld1.8 {d4[]}, [r1]! 0x03,0x4c,0xa1,0xf4 = vld1.8 {d4[]}, [r1], r3 0x2f,0x4c,0xa1,0xf4 = vld1.8 {d4[], d5[]}, [r1] 0x2d,0x4c,0xa1,0xf4 = vld1.8 {d4[], d5[]}, [r1]! 0x23,0x4c,0xa1,0xf4 = vld1.8 {d4[], d5[]}, [r1], r3 0x6f,0x00,0xe0,0xf4 = vld1.8 {d16[3]}, [r0] 0x9f,0x04,0xe0,0xf4 = vld1.16 {d16[2]}, [r0:16] 0xbf,0x08,0xe0,0xf4 = vld1.32 {d16[1]}, [r0:32] 0xcd,0xc0,0xa2,0xf4 = vld1.8 {d12[6]}, [r2]! 0xc2,0xc0,0xa2,0xf4 = vld1.8 {d12[6]}, [r2], r2 0xcd,0xc4,0xa2,0xf4 = vld1.16 {d12[3]}, [r2]! 0x82,0xc4,0xa2,0xf4 = vld1.16 {d12[2]}, [r2], r2 0x3f,0x01,0xe0,0xf4 = vld2.8 {d16[1], d17[1]}, [r0:16] 0x5f,0x05,0xe0,0xf4 = vld2.16 {d16[1], d17[1]}, [r0:32] 0x8f,0x09,0xe0,0xf4 = vld2.32 {d16[1], d17[1]}, [r0] 0x6f,0x15,0xe0,0xf4 = vld2.16 {d17[1], d19[1]}, [r0] 0x5f,0x19,0xe0,0xf4 = vld2.32 {d17[0], d19[0]}, [r0:64] 0x5d,0x19,0xe0,0xf4 = vld2.32 {d17[0], d19[0]}, [r0:64]! 0x83,0x21,0xa2,0xf4 = vld2.8 {d2[4], d3[4]}, [r2], r3 0x8d,0x21,0xa2,0xf4 = vld2.8 {d2[4], d3[4]}, [r2]! 0x8f,0x21,0xa2,0xf4 = vld2.8 {d2[4], d3[4]}, [r2] 0x8f,0x6d,0xe1,0xf4 = vld2.32 {d22[], d23[]}, [r1] 0xaf,0x6d,0xe1,0xf4 = vld2.32 {d22[], d24[]}, [r1] 0x8d,0xad,0xa3,0xf4 = vld2.32 {d10[], d11[]}, [r3]! 0xad,0xed,0xa4,0xf4 = vld2.32 {d14[], d16[]}, [r4]! 0x84,0x6d,0xe5,0xf4 = vld2.32 {d22[], d23[]}, [r5], r4 0xa4,0x6d,0xe6,0xf4 = vld2.32 {d22[], d24[]}, [r6], r4 0x2f,0x02,0xe1,0xf4 = vld3.8 {d16[1], d17[1], d18[1]}, [r1] 0x4f,0x66,0xa2,0xf4 = vld3.16 {d6[1], d7[1], d8[1]}, [r2] 0x8f,0x1a,0xa3,0xf4 = vld3.32 {d1[1], d2[1], d3[1]}, [r3] 0xaf,0xb6,0xe4,0xf4 = vld3.16 {d27[2], d29[2], d31[2]}, [r4] 0x4f,0x6a,0xa5,0xf4 = vld3.32 {d6[0], d8[0], d10[0]}, [r5] 0x61,0xc2,0xa6,0xf4 = vld3.8 {d12[3], d13[3], d14[3]}, [r6], r1 0x82,0xb6,0xa7,0xf4 = vld3.16 {d11[2], d12[2], d13[2]}, [r7], r2 0x83,0x2a,0xa8,0xf4 = vld3.32 {d2[1], d3[1], d4[1]}, [r8], r3 0xa4,0xe6,0xa9,0xf4 = vld3.16 {d14[2], d16[2], d18[2]}, [r9], r4 0x45,0x0a,0xea,0xf4 = vld3.32 {d16[0], d18[0], d20[0]}, [r10], r5 0xcd,0x62,0xa8,0xf4 = vld3.8 {d6[6], d7[6], d8[6]}, [r8]! 0x8d,0x96,0xa7,0xf4 = vld3.16 {d9[2], d10[2], d11[2]}, [r7]! 0x8d,0x1a,0xa6,0xf4 = vld3.32 {d1[1], d2[1], d3[1]}, [r6]! 0xad,0x46,0xe5,0xf4 = vld3.16 {d20[2], d21[2], d22[2]}, [r5]! 0x4d,0x5a,0xa4,0xf4 = vld3.32 {d5[0], d7[0], d9[0]}, [r4]! 0x0f,0x0e,0xe1,0xf4 = vld3.8 {d16[], d17[], d18[]}, [r1] 0x4f,0x0e,0xe2,0xf4 = vld3.16 {d16[], d17[], d18[]}, [r2] 0x8f,0x0e,0xe3,0xf4 = vld3.32 {d16[], d17[], d18[]}, [r3] 0x2f,0x1e,0xe7,0xf4 = vld3.8 {d17[], d19[], d21[]}, [r7] 0x6f,0x1e,0xe7,0xf4 = vld3.16 {d17[], d19[], d21[]}, [r7] 0xaf,0x0e,0xe8,0xf4 = vld3.32 {d16[], d18[], d20[]}, [r8] 0x0d,0x0e,0xe1,0xf4 = vld3.8 {d16[], d17[], d18[]}, [r1]! 0x4d,0x0e,0xe2,0xf4 = vld3.16 {d16[], d17[], d18[]}, [r2]! 0x8d,0x0e,0xe3,0xf4 = vld3.32 {d16[], d17[], d18[]}, [r3]! 0x2d,0x1e,0xe7,0xf4 = vld3.8 {d17[], d18[], d19[]}, [r7]! 0x6d,0x1e,0xe7,0xf4 = vld3.16 {d17[], d18[], d19[]}, [r7]! 0xad,0x0e,0xe8,0xf4 = vld3.32 {d16[], d18[], d20[]}, [r8]! 0x08,0x0e,0xe1,0xf4 = vld3.8 {d16[], d17[], d18[]}, [r1], r8 0x47,0x0e,0xe2,0xf4 = vld3.16 {d16[], d17[], d18[]}, [r2], r7 0x85,0x0e,0xe3,0xf4 = vld3.32 {d16[], d17[], d18[]}, [r3], r5 0x23,0x0e,0xe6,0xf4 = vld3.8 {d16[], d18[], d20[]}, [r6], r3 0x63,0x0e,0xe6,0xf4 = vld3.16 {d16[], d18[], d20[]}, [r6], r3 0xa4,0x1e,0xe9,0xf4 = vld3.32 {d17[], d19[], d21[]}, [r9], r4 0x2f,0x03,0xe1,0xf4 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] 0x4f,0x07,0xe2,0xf4 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] 0x8f,0x0b,0xe3,0xf4 = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] 0x6f,0x17,0xe7,0xf4 = vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] 0xcf,0x0b,0xe8,0xf4 = vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] 0x3d,0x03,0xe1,0xf4 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32]! 0x5d,0x07,0xe2,0xf4 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2:64]! 0xad,0x0b,0xe3,0xf4 = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:128]! 0x6d,0x17,0xe7,0xf4 = vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! 0xcd,0x0b,0xe8,0xf4 = vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! 0x38,0x03,0xe1,0xf4 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32], r8 0x47,0x07,0xe2,0xf4 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 0x95,0x0b,0xe3,0xf4 = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:64], r5 0x63,0x07,0xe6,0xf4 = vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 0xc4,0x1b,0xe9,0xf4 = vld4.32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 0x0f,0x0f,0xe1,0xf4 = vld4.8 {d16[], d17[], d18[], d19[]}, [r1] 0x4f,0x0f,0xe2,0xf4 = vld4.16 {d16[], d17[], d18[], d19[]}, [r2] 0x8f,0x0f,0xe3,0xf4 = vld4.32 {d16[], d17[], d18[], d19[]}, [r3] 0x2f,0x1f,0xe7,0xf4 = vld4.8 {d17[], d19[], d21[], d23[]}, [r7] 0x6f,0x1f,0xe7,0xf4 = vld4.16 {d17[], d19[], d21[], d23[]}, [r7] 0xaf,0x0f,0xe8,0xf4 = vld4.32 {d16[], d18[], d20[], d22[]}, [r8] 0x0d,0x0f,0xe1,0xf4 = vld4.8 {d16[], d17[], d18[], d19[]}, [r1]! 0x4d,0x0f,0xe2,0xf4 = vld4.16 {d16[], d17[], d18[], d19[]}, [r2]! 0x8d,0x0f,0xe3,0xf4 = vld4.32 {d16[], d17[], d18[], d19[]}, [r3]! 0x2d,0x1f,0xe7,0xf4 = vld4.8 {d17[], d18[], d19[], d20[]}, [r7]! 0x6d,0x1f,0xe7,0xf4 = vld4.16 {d17[], d18[], d19[], d20[]}, [r7]! 0xad,0x0f,0xe8,0xf4 = vld4.32 {d16[], d18[], d20[], d22[]}, [r8]! 0x08,0x0f,0xe1,0xf4 = vld4.8 {d16[], d17[], d18[], d19[]}, [r1], r8 0x47,0x0f,0xe2,0xf4 = vld4.16 {d16[], d17[], d18[], d19[]}, [r2], r7 0x85,0x0f,0xe3,0xf4 = vld4.32 {d16[], d17[], d18[], d19[]}, [r3], r5 0x23,0x0f,0xe6,0xf4 = vld4.8 {d16[], d18[], d20[], d22[]}, [r6], r3 0x63,0x0f,0xe6,0xf4 = vld4.16 {d16[], d18[], d20[], d22[]}, [r6], r3 0xa4,0x1f,0xe9,0xf4 = vld4.32 {d17[], d19[], d21[], d23[]}, [r9], r4 0x0f,0x6a,0x29,0xf4 = vld1.8 {d6, d7}, [r9] 0x0f,0x62,0x29,0xf4 = vld1.8 {d6, d7, d8, d9}, [r9] 0x0f,0x27,0x22,0xf4 = vld1.8 {d2}, [r2] 0x0f,0x27,0x22,0xf4 = vld1.8 {d2}, [r2] 0x0f,0x27,0x22,0xf4 = vld1.8 {d2}, [r2] 0x0f,0x4a,0x22,0xf4 = vld1.8 {d4, d5}, [r2] 0x0f,0x4a,0x22,0xf4 = vld1.8 {d4, d5}, [r2] 0x0f,0x4a,0x22,0xf4 = vld1.8 {d4, d5}, [r2] 0x8f,0x4a,0x22,0xf4 = vld1.32 {d4, d5}, [r2] 0x0f,0x26,0x22,0xf4 = vld1.8 {d2, d3, d4}, [r2] 0x8f,0x26,0x22,0xf4 = vld1.32 {d2, d3, d4}, [r2] 0xcf,0x26,0x22,0xf4 = vld1.64 {d2, d3, d4}, [r2] 0xed,0x22,0x22,0xf4 = vld1.64 {d2, d3, d4, d5}, [r2:128]! 0xed,0x22,0x22,0xf4 = vld1.64 {d2, d3, d4, d5}, [r2:128]! 0x1f,0x08,0x60,0xf4 = vld2.8 {d16, d17}, [r0:64] 0x6f,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128] capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-vst-encoding.s.cs010066400017500001750000000151641363402546700224750ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x1f,0x07,0x40,0xf4 = vst1.8 {d16}, [r0:64] 0x4f,0x07,0x40,0xf4 = vst1.16 {d16}, [r0] 0x8f,0x07,0x40,0xf4 = vst1.32 {d16}, [r0] 0xcf,0x07,0x40,0xf4 = vst1.64 {d16}, [r0] 0x1f,0x0a,0x40,0xf4 = vst1.8 {d16, d17}, [r0:64] 0x6f,0x0a,0x40,0xf4 = vst1.16 {d16, d17}, [r0:128] 0x8f,0x0a,0x40,0xf4 = vst1.32 {d16, d17}, [r0] 0xcf,0x0a,0x40,0xf4 = vst1.64 {d16, d17}, [r0] 0x1f,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0:64] 0x1d,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0:64]! 0x03,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0], r3 0x1f,0x02,0x40,0xf4 = vst1.8 {d16, d17, d18, d19}, [r0:64] 0x5d,0x02,0x41,0xf4 = vst1.16 {d16, d17, d18, d19}, [r1:64]! 0xc2,0x02,0x43,0xf4 = vst1.64 {d16, d17, d18, d19}, [r3], r2 0x1f,0x08,0x40,0xf4 = vst2.8 {d16, d17}, [r0:64] 0x6f,0x08,0x40,0xf4 = vst2.16 {d16, d17}, [r0:128] 0x8f,0x08,0x40,0xf4 = vst2.32 {d16, d17}, [r0] 0x1f,0x03,0x40,0xf4 = vst2.8 {d16, d17, d18, d19}, [r0:64] 0x6f,0x03,0x40,0xf4 = vst2.16 {d16, d17, d18, d19}, [r0:128] 0xbf,0x03,0x40,0xf4 = vst2.32 {d16, d17, d18, d19}, [r0:256] 0x1d,0x08,0x40,0xf4 = vst2.8 {d16, d17}, [r0:64]! 0x6d,0xe8,0x40,0xf4 = vst2.16 {d30, d31}, [r0:128]! 0x8d,0xe8,0x00,0xf4 = vst2.32 {d14, d15}, [r0]! 0x1d,0x03,0x40,0xf4 = vst2.8 {d16, d17, d18, d19}, [r0:64]! 0x6d,0x23,0x40,0xf4 = vst2.16 {d18, d19, d20, d21}, [r0:128]! 0xbd,0x83,0x00,0xf4 = vst2.32 {d8, d9, d10, d11}, [r0:256]! 0x0f,0x04,0x41,0xf4 = vst3.8 {d16, d17, d18}, [r1] 0x4f,0x64,0x02,0xf4 = vst3.16 {d6, d7, d8}, [r2] 0x8f,0x14,0x03,0xf4 = vst3.32 {d1, d2, d3}, [r3] 0x1f,0x05,0x40,0xf4 = vst3.8 {d16, d18, d20}, [r0:64] 0x4f,0xb5,0x44,0xf4 = vst3.16 {d27, d29, d31}, [r4] 0x8f,0x65,0x05,0xf4 = vst3.32 {d6, d8, d10}, [r5] 0x01,0xc4,0x06,0xf4 = vst3.8 {d12, d13, d14}, [r6], r1 0x42,0xb4,0x07,0xf4 = vst3.16 {d11, d12, d13}, [r7], r2 0x83,0x24,0x08,0xf4 = vst3.32 {d2, d3, d4}, [r8], r3 0x04,0x45,0x09,0xf4 = vst3.8 {d4, d6, d8}, [r9], r4 0x44,0xe5,0x09,0xf4 = vst3.16 {d14, d16, d18}, [r9], r4 0x85,0x05,0x4a,0xf4 = vst3.32 {d16, d18, d20}, [r10], r5 0x0d,0x64,0x08,0xf4 = vst3.8 {d6, d7, d8}, [r8]! 0x4d,0x94,0x07,0xf4 = vst3.16 {d9, d10, d11}, [r7]! 0x8d,0x14,0x06,0xf4 = vst3.32 {d1, d2, d3}, [r6]! 0x1d,0x05,0x40,0xf4 = vst3.8 {d16, d18, d20}, [r0:64]! 0x4d,0x45,0x45,0xf4 = vst3.16 {d20, d22, d24}, [r5]! 0x8d,0x55,0x04,0xf4 = vst3.32 {d5, d7, d9}, [r4]! 0x1f,0x00,0x41,0xf4 = vst4.8 {d16, d17, d18, d19}, [r1:64] 0x6f,0x00,0x42,0xf4 = vst4.16 {d16, d17, d18, d19}, [r2:128] 0xbf,0x00,0x43,0xf4 = vst4.32 {d16, d17, d18, d19}, [r3:256] 0x3f,0x11,0x45,0xf4 = vst4.8 {d17, d19, d21, d23}, [r5:256] 0x4f,0x11,0x47,0xf4 = vst4.16 {d17, d19, d21, d23}, [r7] 0x8f,0x01,0x48,0xf4 = vst4.32 {d16, d18, d20, d22}, [r8] 0x1d,0x00,0x41,0xf4 = vst4.8 {d16, d17, d18, d19}, [r1:64]! 0x6d,0x00,0x42,0xf4 = vst4.16 {d16, d17, d18, d19}, [r2:128]! 0xbd,0x00,0x43,0xf4 = vst4.32 {d16, d17, d18, d19}, [r3:256]! 0x3d,0x11,0x45,0xf4 = vst4.8 {d17, d19, d21, d23}, [r5:256]! 0x4d,0x11,0x47,0xf4 = vst4.16 {d17, d19, d21, d23}, [r7]! 0x8d,0x01,0x48,0xf4 = vst4.32 {d16, d18, d20, d22}, [r8]! 0x18,0x00,0x41,0xf4 = vst4.8 {d16, d17, d18, d19}, [r1:64], r8 0x47,0x00,0x42,0xf4 = vst4.16 {d16, d17, d18, d19}, [r2], r7 0x95,0x00,0x43,0xf4 = vst4.32 {d16, d17, d18, d19}, [r3:64], r5 0x32,0x01,0x44,0xf4 = vst4.8 {d16, d18, d20, d22}, [r4:256], r2 0x43,0x01,0x46,0xf4 = vst4.16 {d16, d18, d20, d22}, [r6], r3 0x84,0x11,0x49,0xf4 = vst4.32 {d17, d19, d21, d23}, [r9], r4 0x3f,0x01,0xc0,0xf4 = vst2.8 {d16[1], d17[1]}, [r0:16] 0x5f,0x05,0xc0,0xf4 = vst2.16 {d16[1], d17[1]}, [r0:32] 0x8f,0x09,0xc0,0xf4 = vst2.32 {d16[1], d17[1]}, [r0] 0x6f,0x15,0xc0,0xf4 = vst2.16 {d17[1], d19[1]}, [r0] 0x5f,0x19,0xc0,0xf4 = vst2.32 {d17[0], d19[0]}, [r0:64] 0x83,0x21,0x82,0xf4 = vst2.8 {d2[4], d3[4]}, [r2], r3 0x8d,0x21,0x82,0xf4 = vst2.8 {d2[4], d3[4]}, [r2]! 0x8f,0x21,0x82,0xf4 = vst2.8 {d2[4], d3[4]}, [r2] 0x6f,0x15,0xc0,0xf4 = vst2.16 {d17[1], d19[1]}, [r0] 0x5f,0x19,0xc0,0xf4 = vst2.32 {d17[0], d19[0]}, [r0:64] 0x6d,0x75,0x81,0xf4 = vst2.16 {d7[1], d9[1]}, [r1]! 0x5d,0x69,0x82,0xf4 = vst2.32 {d6[0], d8[0]}, [r2:64]! 0x65,0x25,0x83,0xf4 = vst2.16 {d2[1], d4[1]}, [r3], r5 0x57,0x59,0x84,0xf4 = vst2.32 {d5[0], d7[0]}, [r4:64], r7 0x2f,0x02,0xc1,0xf4 = vst3.8 {d16[1], d17[1], d18[1]}, [r1] 0x4f,0x66,0x82,0xf4 = vst3.16 {d6[1], d7[1], d8[1]}, [r2] 0x8f,0x1a,0x83,0xf4 = vst3.32 {d1[1], d2[1], d3[1]}, [r3] 0x6f,0xb6,0xc4,0xf4 = vst3.16 {d27[1], d29[1], d31[1]}, [r4] 0xcf,0x6a,0x85,0xf4 = vst3.32 {d6[1], d8[1], d10[1]}, [r5] 0x21,0xc2,0x86,0xf4 = vst3.8 {d12[1], d13[1], d14[1]}, [r6], r1 0x42,0xb6,0x87,0xf4 = vst3.16 {d11[1], d12[1], d13[1]}, [r7], r2 0x83,0x2a,0x88,0xf4 = vst3.32 {d2[1], d3[1], d4[1]}, [r8], r3 0x64,0xe6,0x89,0xf4 = vst3.16 {d14[1], d16[1], d18[1]}, [r9], r4 0xc5,0x0a,0xca,0xf4 = vst3.32 {d16[1], d18[1], d20[1]}, [r10], r5 0x2d,0x62,0x88,0xf4 = vst3.8 {d6[1], d7[1], d8[1]}, [r8]! 0x4d,0x96,0x87,0xf4 = vst3.16 {d9[1], d10[1], d11[1]}, [r7]! 0x8d,0x1a,0x86,0xf4 = vst3.32 {d1[1], d2[1], d3[1]}, [r6]! 0x6d,0x46,0xc5,0xf4 = vst3.16 {d20[1], d21[1], d22[1]}, [r5]! 0xcd,0x5a,0x84,0xf4 = vst3.32 {d5[1], d7[1], d9[1]}, [r4]! 0x2f,0x03,0xc1,0xf4 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] 0x4f,0x07,0xc2,0xf4 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] 0x8f,0x0b,0xc3,0xf4 = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] 0x6f,0x17,0xc7,0xf4 = vst4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] 0xcf,0x0b,0xc8,0xf4 = vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] 0x3d,0x03,0xc1,0xf4 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32]! 0x5d,0x07,0xc2,0xf4 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2:64]! 0xad,0x0b,0xc3,0xf4 = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:128]! 0x6d,0x17,0xc7,0xf4 = vst4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! 0xcd,0x0b,0xc8,0xf4 = vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! 0x38,0x03,0xc1,0xf4 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32], r8 0x47,0x07,0xc2,0xf4 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 0x95,0x0b,0xc3,0xf4 = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:64], r5 0x63,0x07,0xc6,0xf4 = vst4.16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 0xc4,0x1b,0xc9,0xf4 = vst4.32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 0x0f,0x27,0x02,0xf4 = vst1.8 {d2}, [r2] 0x0f,0x27,0x02,0xf4 = vst1.8 {d2}, [r2] 0x0f,0x27,0x02,0xf4 = vst1.8 {d2}, [r2] 0x0f,0x4a,0x02,0xf4 = vst1.8 {d4, d5}, [r2] 0x0f,0x4a,0x02,0xf4 = vst1.8 {d4, d5}, [r2] 0x0f,0x4a,0x02,0xf4 = vst1.8 {d4, d5}, [r2] 0x8f,0x4a,0x02,0xf4 = vst1.32 {d4, d5}, [r2] 0x0f,0x89,0x04,0xf4 = vst2.8 {d8, d10}, [r4] 0xbf,0x98,0x83,0xf4 = vst1.32 {d9[1]}, [r3:32] 0xbd,0xb8,0xc9,0xf4 = vst1.32 {d27[1]}, [r9:32]! 0xb5,0xb8,0xc3,0xf4 = vst1.32 {d27[1]}, [r3:32], r5 0x1f,0x08,0x40,0xf4 = vst2.8 {d16, d17}, [r0:64] 0x6f,0x08,0x40,0xf4 = vst2.16 {d16, d17}, [r0:128] capstone-sys-0.11.0/capstone/suite/MC/ARM/neon-vswp.s.cs010066400017500001750000000001451363402546700210650ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x02,0x10,0xb2,0xf3 = vswp d1, d2 0x44,0x20,0xb2,0xf3 = vswp q1, q2 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-abs-encoding.s.cs010066400017500001750000000011071363402546700226640ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf1,0xff,0x20,0x03 = vabs.s8 d16, d16 0xf5,0xff,0x20,0x03 = vabs.s16 d16, d16 0xf9,0xff,0x20,0x03 = vabs.s32 d16, d16 0xf9,0xff,0x20,0x07 = vabs.f32 d16, d16 0xf1,0xff,0x60,0x03 = vabs.s8 q8, q8 0xf5,0xff,0x60,0x03 = vabs.s16 q8, q8 0xf9,0xff,0x60,0x03 = vabs.s32 q8, q8 0xf9,0xff,0x60,0x07 = vabs.f32 q8, q8 0xf0,0xff,0x20,0x07 = vqabs.s8 d16, d16 0xf4,0xff,0x20,0x07 = vqabs.s16 d16, d16 0xf8,0xff,0x20,0x07 = vqabs.s32 d16, d16 0xf0,0xff,0x60,0x07 = vqabs.s8 q8, q8 0xf4,0xff,0x60,0x07 = vqabs.s16 q8, q8 0xf8,0xff,0x60,0x07 = vqabs.s32 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-absdiff-encoding.s.cs010066400017500001750000000032441363402546700235210ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x40,0xef,0xa1,0x07 = vabd.s8 d16, d16, d17 0x50,0xef,0xa1,0x07 = vabd.s16 d16, d16, d17 0x60,0xef,0xa1,0x07 = vabd.s32 d16, d16, d17 0x40,0xff,0xa1,0x07 = vabd.u8 d16, d16, d17 0x50,0xff,0xa1,0x07 = vabd.u16 d16, d16, d17 0x60,0xff,0xa1,0x07 = vabd.u32 d16, d16, d17 0x60,0xff,0xa1,0x0d = vabd.f32 d16, d16, d17 0x40,0xef,0xe2,0x07 = vabd.s8 q8, q8, q9 0x50,0xef,0xe2,0x07 = vabd.s16 q8, q8, q9 0x60,0xef,0xe2,0x07 = vabd.s32 q8, q8, q9 0x40,0xff,0xe2,0x07 = vabd.u8 q8, q8, q9 0x50,0xff,0xe2,0x07 = vabd.u16 q8, q8, q9 0x60,0xff,0xe2,0x07 = vabd.u32 q8, q8, q9 0x60,0xff,0xe2,0x0d = vabd.f32 q8, q8, q9 0xc0,0xef,0xa1,0x07 = vabdl.s8 q8, d16, d17 0xd0,0xef,0xa1,0x07 = vabdl.s16 q8, d16, d17 0xe0,0xef,0xa1,0x07 = vabdl.s32 q8, d16, d17 0xc0,0xff,0xa1,0x07 = vabdl.u8 q8, d16, d17 0xd0,0xff,0xa1,0x07 = vabdl.u16 q8, d16, d17 0xe0,0xff,0xa1,0x07 = vabdl.u32 q8, d16, d17 0x42,0xef,0xb1,0x07 = vaba.s8 d16, d18, d17 0x52,0xef,0xb1,0x07 = vaba.s16 d16, d18, d17 0x62,0xef,0xb1,0x07 = vaba.s32 d16, d18, d17 0x42,0xff,0xb1,0x07 = vaba.u8 d16, d18, d17 0x52,0xff,0xb1,0x07 = vaba.u16 d16, d18, d17 0x62,0xff,0xb1,0x07 = vaba.u32 d16, d18, d17 0x40,0xef,0xf4,0x27 = vaba.s8 q9, q8, q10 0x50,0xef,0xf4,0x27 = vaba.s16 q9, q8, q10 0x60,0xef,0xf4,0x27 = vaba.s32 q9, q8, q10 0x40,0xff,0xf4,0x27 = vaba.u8 q9, q8, q10 0x50,0xff,0xf4,0x27 = vaba.u16 q9, q8, q10 0x60,0xff,0xf4,0x27 = vaba.u32 q9, q8, q10 0xc3,0xef,0xa2,0x05 = vabal.s8 q8, d19, d18 0xd3,0xef,0xa2,0x05 = vabal.s16 q8, d19, d18 0xe3,0xef,0xa2,0x05 = vabal.s32 q8, d19, d18 0xc3,0xff,0xa2,0x05 = vabal.u8 q8, d19, d18 0xd3,0xff,0xa2,0x05 = vabal.u16 q8, d19, d18 0xe3,0xff,0xa2,0x05 = vabal.u32 q8, d19, d18 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-add-encoding.s.cs010066400017500001750000000055041363402546700226540ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x41,0xef,0xa0,0x08 = vadd.i8 d16, d17, d16 0x51,0xef,0xa0,0x08 = vadd.i16 d16, d17, d16 0x71,0xef,0xa0,0x08 = vadd.i64 d16, d17, d16 0x61,0xef,0xa0,0x08 = vadd.i32 d16, d17, d16 0x40,0xef,0xa1,0x0d = vadd.f32 d16, d16, d17 0x40,0xef,0xe2,0x0d = vadd.f32 q8, q8, q9 0xc1,0xef,0xa0,0x00 = vaddl.s8 q8, d17, d16 0xd1,0xef,0xa0,0x00 = vaddl.s16 q8, d17, d16 0xe1,0xef,0xa0,0x00 = vaddl.s32 q8, d17, d16 0xc1,0xff,0xa0,0x00 = vaddl.u8 q8, d17, d16 0xd1,0xff,0xa0,0x00 = vaddl.u16 q8, d17, d16 0xe1,0xff,0xa0,0x00 = vaddl.u32 q8, d17, d16 0xc0,0xef,0xa2,0x01 = vaddw.s8 q8, q8, d18 0xd0,0xef,0xa2,0x01 = vaddw.s16 q8, q8, d18 0xe0,0xef,0xa2,0x01 = vaddw.s32 q8, q8, d18 0xc0,0xff,0xa2,0x01 = vaddw.u8 q8, q8, d18 0xd0,0xff,0xa2,0x01 = vaddw.u16 q8, q8, d18 0xe0,0xff,0xa2,0x01 = vaddw.u32 q8, q8, d18 0x40,0xef,0xa1,0x00 = vhadd.s8 d16, d16, d17 0x50,0xef,0xa1,0x00 = vhadd.s16 d16, d16, d17 0x60,0xef,0xa1,0x00 = vhadd.s32 d16, d16, d17 0x40,0xff,0xa1,0x00 = vhadd.u8 d16, d16, d17 0x50,0xff,0xa1,0x00 = vhadd.u16 d16, d16, d17 0x60,0xff,0xa1,0x00 = vhadd.u32 d16, d16, d17 0x40,0xef,0xe2,0x00 = vhadd.s8 q8, q8, q9 0x50,0xef,0xe2,0x00 = vhadd.s16 q8, q8, q9 0x60,0xef,0xe2,0x00 = vhadd.s32 q8, q8, q9 0x40,0xff,0xe2,0x00 = vhadd.u8 q8, q8, q9 0x50,0xff,0xe2,0x00 = vhadd.u16 q8, q8, q9 0x60,0xff,0xe2,0x00 = vhadd.u32 q8, q8, q9 0x40,0xef,0xa1,0x01 = vrhadd.s8 d16, d16, d17 0x50,0xef,0xa1,0x01 = vrhadd.s16 d16, d16, d17 0x60,0xef,0xa1,0x01 = vrhadd.s32 d16, d16, d17 0x40,0xff,0xa1,0x01 = vrhadd.u8 d16, d16, d17 0x50,0xff,0xa1,0x01 = vrhadd.u16 d16, d16, d17 0x60,0xff,0xa1,0x01 = vrhadd.u32 d16, d16, d17 0x40,0xef,0xe2,0x01 = vrhadd.s8 q8, q8, q9 0x50,0xef,0xe2,0x01 = vrhadd.s16 q8, q8, q9 0x60,0xef,0xe2,0x01 = vrhadd.s32 q8, q8, q9 0x40,0xff,0xe2,0x01 = vrhadd.u8 q8, q8, q9 0x50,0xff,0xe2,0x01 = vrhadd.u16 q8, q8, q9 0x60,0xff,0xe2,0x01 = vrhadd.u32 q8, q8, q9 0x40,0xef,0xb1,0x00 = vqadd.s8 d16, d16, d17 0x50,0xef,0xb1,0x00 = vqadd.s16 d16, d16, d17 0x60,0xef,0xb1,0x00 = vqadd.s32 d16, d16, d17 0x70,0xef,0xb1,0x00 = vqadd.s64 d16, d16, d17 0x40,0xff,0xb1,0x00 = vqadd.u8 d16, d16, d17 0x50,0xff,0xb1,0x00 = vqadd.u16 d16, d16, d17 0x60,0xff,0xb1,0x00 = vqadd.u32 d16, d16, d17 0x70,0xff,0xb1,0x00 = vqadd.u64 d16, d16, d17 0x40,0xef,0xf2,0x00 = vqadd.s8 q8, q8, q9 0x50,0xef,0xf2,0x00 = vqadd.s16 q8, q8, q9 0x60,0xef,0xf2,0x00 = vqadd.s32 q8, q8, q9 0x70,0xef,0xf2,0x00 = vqadd.s64 q8, q8, q9 0x40,0xff,0xf2,0x00 = vqadd.u8 q8, q8, q9 0x50,0xff,0xf2,0x00 = vqadd.u16 q8, q8, q9 0x60,0xff,0xf2,0x00 = vqadd.u32 q8, q8, q9 0x70,0xff,0xf2,0x00 = vqadd.u64 q8, q8, q9 0xc0,0xef,0xa2,0x04 = vaddhn.i16 d16, q8, q9 0xd0,0xef,0xa2,0x04 = vaddhn.i32 d16, q8, q9 0xe0,0xef,0xa2,0x04 = vaddhn.i64 d16, q8, q9 0xc0,0xff,0xa2,0x04 = vraddhn.i16 d16, q8, q9 0xd0,0xff,0xa2,0x04 = vraddhn.i32 d16, q8, q9 0xe0,0xff,0xa2,0x04 = vraddhn.i64 d16, q8, q9 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-bitcount-encoding.s.cs010066400017500001750000000010751363402546700237520ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf0,0xff,0x20,0x05 = vcnt.8 d16, d16 0xf0,0xff,0x60,0x05 = vcnt.8 q8, q8 0xf0,0xff,0xa0,0x04 = vclz.i8 d16, d16 0xf4,0xff,0xa0,0x04 = vclz.i16 d16, d16 0xf8,0xff,0xa0,0x04 = vclz.i32 d16, d16 0xf0,0xff,0xe0,0x04 = vclz.i8 q8, q8 0xf4,0xff,0xe0,0x04 = vclz.i16 q8, q8 0xf8,0xff,0xe0,0x04 = vclz.i32 q8, q8 0xf0,0xff,0x20,0x04 = vcls.s8 d16, d16 0xf4,0xff,0x20,0x04 = vcls.s16 d16, d16 0xf8,0xff,0x20,0x04 = vcls.s32 d16, d16 0xf0,0xff,0x60,0x04 = vcls.s8 q8, q8 0xf4,0xff,0x60,0x04 = vcls.s16 q8, q8 0xf8,0xff,0x60,0x04 = vcls.s32 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-bitwise-encoding.s.cs010066400017500001750000000011041363402546700235620ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x41,0xef,0xb0,0x01 = vand d16, d17, d16 0x40,0xef,0xf2,0x01 = vand q8, q8, q9 0x41,0xff,0xb0,0x01 = veor d16, d17, d16 0x40,0xff,0xf2,0x01 = veor q8, q8, q9 0x61,0xef,0xb0,0x01 = vorr d16, d17, d16 0x60,0xef,0xf2,0x01 = vorr q8, q8, q9 0x51,0xef,0xb0,0x01 = vbic d16, d17, d16 0x50,0xef,0xf2,0x01 = vbic q8, q8, q9 0x71,0xef,0xb0,0x01 = vorn d16, d17, d16 0x70,0xef,0xf2,0x01 = vorn q8, q8, q9 0xf0,0xff,0xa0,0x05 = vmvn d16, d16 0xf0,0xff,0xe0,0x05 = vmvn q8, q8 0x51,0xff,0xb0,0x21 = vbsl d18, d17, d16 0x54,0xff,0xf2,0x01 = vbsl q8, q10, q9 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-cmp-encoding.s.cs010066400017500001750000000013631363402546700227020ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xfb,0xff,0x20,0x07 = vcvt.s32.f32 d16, d16 0xfb,0xff,0xa0,0x07 = vcvt.u32.f32 d16, d16 0xfb,0xff,0x20,0x06 = vcvt.f32.s32 d16, d16 0xfb,0xff,0xa0,0x06 = vcvt.f32.u32 d16, d16 0xfb,0xff,0x60,0x07 = vcvt.s32.f32 q8, q8 0xfb,0xff,0xe0,0x07 = vcvt.u32.f32 q8, q8 0xfb,0xff,0x60,0x06 = vcvt.f32.s32 q8, q8 0xfb,0xff,0xe0,0x06 = vcvt.f32.u32 q8, q8 0xff,0xef,0x30,0x0f = vcvt.s32.f32 d16, d16, #1 0xff,0xff,0x30,0x0f = vcvt.u32.f32 d16, d16, #1 0xff,0xef,0x30,0x0e = vcvt.f32.s32 d16, d16, #1 0xff,0xff,0x30,0x0e = vcvt.f32.u32 d16, d16, #1 0xff,0xef,0x70,0x0f = vcvt.s32.f32 q8, q8, #1 0xff,0xff,0x70,0x0f = vcvt.u32.f32 q8, q8, #1 0xff,0xef,0x70,0x0e = vcvt.f32.s32 q8, q8, #1 0xff,0xff,0x70,0x0e = vcvt.f32.u32 q8, q8, #1 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-convert-encoding.s.cs010066400017500001750000000015111363402546700235760ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xfb,0xff,0x20,0x07 = vcvt.s32.f32 d16, d16 0xfb,0xff,0xa0,0x07 = vcvt.u32.f32 d16, d16 0xfb,0xff,0x20,0x06 = vcvt.f32.s32 d16, d16 0xfb,0xff,0xa0,0x06 = vcvt.f32.u32 d16, d16 0xfb,0xff,0x60,0x07 = vcvt.s32.f32 q8, q8 0xfb,0xff,0xe0,0x07 = vcvt.u32.f32 q8, q8 0xfb,0xff,0x60,0x06 = vcvt.f32.s32 q8, q8 0xfb,0xff,0xe0,0x06 = vcvt.f32.u32 q8, q8 0xff,0xef,0x30,0x0f = vcvt.s32.f32 d16, d16, #1 0xff,0xff,0x30,0x0f = vcvt.u32.f32 d16, d16, #1 0xff,0xef,0x30,0x0e = vcvt.f32.s32 d16, d16, #1 0xff,0xff,0x30,0x0e = vcvt.f32.u32 d16, d16, #1 0xff,0xef,0x70,0x0f = vcvt.s32.f32 q8, q8, #1 0xff,0xff,0x70,0x0f = vcvt.u32.f32 q8, q8, #1 0xff,0xef,0x70,0x0e = vcvt.f32.s32 q8, q8, #1 0xff,0xff,0x70,0x0e = vcvt.f32.u32 q8, q8, #1 0xf6,0xff,0x20,0x07 = vcvt.f32.f16 q8, d16 0xf6,0xff,0x20,0x06 = vcvt.f16.f32 d16, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-dup-encoding.s.cs010066400017500001750000000013541363402546700227130ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xc0,0xee,0x90,0x1b = vdup.8 d16, r1 0x8f,0xee,0x30,0x2b = vdup.16 d15, r2 0x8e,0xee,0x10,0x3b = vdup.32 d14, r3 0xe2,0xee,0x90,0x4b = vdup.8 q9, r4 0xa0,0xee,0xb0,0x5b = vdup.16 q8, r5 0xae,0xee,0x10,0x6b = vdup.32 q7, r6 0xf1,0xff,0x0b,0x0c = vdup.8 d16, d11[0] 0xf2,0xff,0x0c,0x1c = vdup.16 d17, d12[0] 0xf4,0xff,0x0d,0x2c = vdup.32 d18, d13[0] 0xb1,0xff,0x4a,0x6c = vdup.8 q3, d10[0] 0xf2,0xff,0x49,0x2c = vdup.16 q9, d9[0] 0xf4,0xff,0x48,0x0c = vdup.32 q8, d8[0] 0xf3,0xff,0x0b,0x0c = vdup.8 d16, d11[1] 0xf6,0xff,0x0c,0x1c = vdup.16 d17, d12[1] 0xfc,0xff,0x0d,0x2c = vdup.32 d18, d13[1] 0xb3,0xff,0x4a,0x6c = vdup.8 q3, d10[1] 0xf6,0xff,0x49,0x2c = vdup.16 q9, d9[1] 0xfc,0xff,0x48,0x0c = vdup.32 q8, d8[1] capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-minmax-encoding.s.cs010066400017500001750000000046031363402546700234140ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x02,0xef,0x03,0x16 = vmax.s8 d1, d2, d3 0x15,0xef,0x06,0x46 = vmax.s16 d4, d5, d6 0x28,0xef,0x09,0x76 = vmax.s32 d7, d8, d9 0x0b,0xff,0x0c,0xa6 = vmax.u8 d10, d11, d12 0x1e,0xff,0x0f,0xd6 = vmax.u16 d13, d14, d15 0x61,0xff,0xa2,0x06 = vmax.u32 d16, d17, d18 0x44,0xef,0xa5,0x3f = vmax.f32 d19, d20, d21 0x02,0xef,0x03,0x26 = vmax.s8 d2, d2, d3 0x15,0xef,0x06,0x56 = vmax.s16 d5, d5, d6 0x28,0xef,0x09,0x86 = vmax.s32 d8, d8, d9 0x0b,0xff,0x0c,0xb6 = vmax.u8 d11, d11, d12 0x1e,0xff,0x0f,0xe6 = vmax.u16 d14, d14, d15 0x61,0xff,0xa2,0x16 = vmax.u32 d17, d17, d18 0x44,0xef,0xa5,0x4f = vmax.f32 d20, d20, d21 0x04,0xef,0x46,0x26 = vmax.s8 q1, q2, q3 0x1a,0xef,0x4c,0x86 = vmax.s16 q4, q5, q6 0x20,0xef,0xe2,0xe6 = vmax.s32 q7, q8, q9 0x46,0xff,0xe8,0x46 = vmax.u8 q10, q11, q12 0x5c,0xff,0xee,0xa6 = vmax.u16 q13, q14, q15 0x2e,0xff,0x60,0xc6 = vmax.u32 q6, q7, q8 0x4a,0xef,0x42,0x2f = vmax.f32 q9, q5, q1 0x04,0xef,0x46,0x46 = vmax.s8 q2, q2, q3 0x1a,0xef,0x4c,0xa6 = vmax.s16 q5, q5, q6 0x60,0xef,0xe2,0x06 = vmax.s32 q8, q8, q9 0x46,0xff,0xc4,0x66 = vmax.u8 q11, q11, q2 0x18,0xff,0x4a,0x86 = vmax.u16 q4, q4, q5 0x2e,0xff,0x60,0xe6 = vmax.u32 q7, q7, q8 0x04,0xef,0x42,0x4f = vmax.f32 q2, q2, q1 0x02,0xef,0x13,0x16 = vmin.s8 d1, d2, d3 0x15,0xef,0x16,0x46 = vmin.s16 d4, d5, d6 0x28,0xef,0x19,0x76 = vmin.s32 d7, d8, d9 0x0b,0xff,0x1c,0xa6 = vmin.u8 d10, d11, d12 0x1e,0xff,0x1f,0xd6 = vmin.u16 d13, d14, d15 0x61,0xff,0xb2,0x06 = vmin.u32 d16, d17, d18 0x64,0xef,0xa5,0x3f = vmin.f32 d19, d20, d21 0x02,0xef,0x13,0x26 = vmin.s8 d2, d2, d3 0x15,0xef,0x16,0x56 = vmin.s16 d5, d5, d6 0x28,0xef,0x19,0x86 = vmin.s32 d8, d8, d9 0x0b,0xff,0x1c,0xb6 = vmin.u8 d11, d11, d12 0x1e,0xff,0x1f,0xe6 = vmin.u16 d14, d14, d15 0x61,0xff,0xb2,0x16 = vmin.u32 d17, d17, d18 0x64,0xef,0xa5,0x4f = vmin.f32 d20, d20, d21 0x04,0xef,0x56,0x26 = vmin.s8 q1, q2, q3 0x1a,0xef,0x5c,0x86 = vmin.s16 q4, q5, q6 0x20,0xef,0xf2,0xe6 = vmin.s32 q7, q8, q9 0x46,0xff,0xf8,0x46 = vmin.u8 q10, q11, q12 0x5c,0xff,0xfe,0xa6 = vmin.u16 q13, q14, q15 0x2e,0xff,0x70,0xc6 = vmin.u32 q6, q7, q8 0x6a,0xef,0x42,0x2f = vmin.f32 q9, q5, q1 0x04,0xef,0x56,0x46 = vmin.s8 q2, q2, q3 0x1a,0xef,0x5c,0xa6 = vmin.s16 q5, q5, q6 0x60,0xef,0xf2,0x06 = vmin.s32 q8, q8, q9 0x46,0xff,0xd4,0x66 = vmin.u8 q11, q11, q2 0x18,0xff,0x5a,0x86 = vmin.u16 q4, q4, q5 0x2e,0xff,0x70,0xe6 = vmin.u32 q7, q7, q8 0x24,0xef,0x42,0x4f = vmin.f32 q2, q2, q1 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-mov-encoding.s.cs010066400017500001750000000046421363402546700227270ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xc0,0xef,0x18,0x0e = vmov.i8 d16, #0x8 0xc1,0xef,0x10,0x08 = vmov.i16 d16, #0x10 0xc1,0xef,0x10,0x0a = vmov.i16 d16, #0x1000 0xc2,0xef,0x10,0x00 = vmov.i32 d16, #0x20 0xc2,0xef,0x10,0x02 = vmov.i32 d16, #0x2000 0xc2,0xef,0x10,0x04 = vmov.i32 d16, #0x200000 0xc2,0xef,0x10,0x06 = vmov.i32 d16, #0x20000000 0xc2,0xef,0x10,0x0c = vmov.i32 d16, #0x20ff 0xc2,0xef,0x10,0x0d = vmov.i32 d16, #0x20ffff 0xc1,0xff,0x33,0x0e = vmov.i64 d16, #0xff0000ff0000ffff 0xc0,0xef,0x58,0x0e = vmov.i8 q8, #0x8 0xc1,0xef,0x50,0x08 = vmov.i16 q8, #0x10 0xc1,0xef,0x50,0x0a = vmov.i16 q8, #0x1000 0xc2,0xef,0x50,0x00 = vmov.i32 q8, #0x20 0xc2,0xef,0x50,0x02 = vmov.i32 q8, #0x2000 0xc2,0xef,0x50,0x04 = vmov.i32 q8, #0x200000 0xc2,0xef,0x50,0x06 = vmov.i32 q8, #0x20000000 0xc2,0xef,0x50,0x0c = vmov.i32 q8, #0x20ff 0xc2,0xef,0x50,0x0d = vmov.i32 q8, #0x20ffff 0xc1,0xff,0x73,0x0e = vmov.i64 q8, #0xff0000ff0000ffff 0xc1,0xef,0x30,0x08 = vmvn.i16 d16, #0x10 0xc1,0xef,0x30,0x0a = vmvn.i16 d16, #0x1000 0xc2,0xef,0x30,0x00 = vmvn.i32 d16, #0x20 0xc2,0xef,0x30,0x02 = vmvn.i32 d16, #0x2000 0xc2,0xef,0x30,0x04 = vmvn.i32 d16, #0x200000 0xc2,0xef,0x30,0x06 = vmvn.i32 d16, #0x20000000 0xc2,0xef,0x30,0x0c = vmvn.i32 d16, #0x20ff 0xc2,0xef,0x30,0x0d = vmvn.i32 d16, #0x20ffff 0xc8,0xef,0x30,0x0a = vmovl.s8 q8, d16 0xd0,0xef,0x30,0x0a = vmovl.s16 q8, d16 0xe0,0xef,0x30,0x0a = vmovl.s32 q8, d16 0xc8,0xff,0x30,0x0a = vmovl.u8 q8, d16 0xd0,0xff,0x30,0x0a = vmovl.u16 q8, d16 0xe0,0xff,0x30,0x0a = vmovl.u32 q8, d16 0xf2,0xff,0x20,0x02 = vmovn.i16 d16, q8 0xf6,0xff,0x20,0x02 = vmovn.i32 d16, q8 0xfa,0xff,0x20,0x02 = vmovn.i64 d16, q8 0xf2,0xff,0xa0,0x02 = vqmovn.s16 d16, q8 0xf6,0xff,0xa0,0x02 = vqmovn.s32 d16, q8 0xfa,0xff,0xa0,0x02 = vqmovn.s64 d16, q8 0xf2,0xff,0xe0,0x02 = vqmovn.u16 d16, q8 0xf6,0xff,0xe0,0x02 = vqmovn.u32 d16, q8 0xfa,0xff,0xe0,0x02 = vqmovn.u64 d16, q8 0xf2,0xff,0x60,0x02 = vqmovun.s16 d16, q8 0xf6,0xff,0x60,0x02 = vqmovun.s32 d16, q8 0xfa,0xff,0x60,0x02 = vqmovun.s64 d16, q8 0x50,0xee,0xb0,0x0b = vmov.s8 r0, d16[1] 0x10,0xee,0xf0,0x0b = vmov.s16 r0, d16[1] 0xd0,0xee,0xb0,0x0b = vmov.u8 r0, d16[1] 0x90,0xee,0xf0,0x0b = vmov.u16 r0, d16[1] 0x30,0xee,0x90,0x0b = vmov.32 r0, d16[1] 0x40,0xee,0xb0,0x1b = vmov.8 d16[1], r1 0x00,0xee,0xf0,0x1b = vmov.16 d16[1], r1 0x20,0xee,0x90,0x1b = vmov.32 d16[1], r1 0x42,0xee,0xb0,0x1b = vmov.8 d18[1], r1 0x02,0xee,0xf0,0x1b = vmov.16 d18[1], r1 0x22,0xee,0x90,0x1b = vmov.32 d18[1], r1 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-mul-accum-encoding.s.cs010066400017500001750000000034661363402546700240140ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x42,0xef,0xa1,0x09 = vmla.i8 d16, d18, d17 0x52,0xef,0xa1,0x09 = vmla.i16 d16, d18, d17 0x62,0xef,0xa1,0x09 = vmla.i32 d16, d18, d17 0x42,0xef,0xb1,0x0d = vmla.f32 d16, d18, d17 0x40,0xef,0xe4,0x29 = vmla.i8 q9, q8, q10 0x50,0xef,0xe4,0x29 = vmla.i16 q9, q8, q10 0x60,0xef,0xe4,0x29 = vmla.i32 q9, q8, q10 0x40,0xef,0xf4,0x2d = vmla.f32 q9, q8, q10 0xe0,0xff,0xc3,0x80 = vmla.i32 q12, q8, d3[0] 0xc3,0xef,0xa2,0x08 = vmlal.s8 q8, d19, d18 0xd3,0xef,0xa2,0x08 = vmlal.s16 q8, d19, d18 0xe3,0xef,0xa2,0x08 = vmlal.s32 q8, d19, d18 0xc3,0xff,0xa2,0x08 = vmlal.u8 q8, d19, d18 0xd3,0xff,0xa2,0x08 = vmlal.u16 q8, d19, d18 0xe3,0xff,0xa2,0x08 = vmlal.u32 q8, d19, d18 0xa5,0xef,0x4a,0x02 = vmlal.s32 q0, d5, d10[0] 0xd3,0xef,0xa2,0x09 = vqdmlal.s16 q8, d19, d18 0xe3,0xef,0xa2,0x09 = vqdmlal.s32 q8, d19, d18 0xdb,0xef,0x47,0x63 = vqdmlal.s16 q11, d11, d7[0] 0xdb,0xef,0x4f,0x63 = vqdmlal.s16 q11, d11, d7[1] 0xdb,0xef,0x67,0x63 = vqdmlal.s16 q11, d11, d7[2] 0xdb,0xef,0x6f,0x63 = vqdmlal.s16 q11, d11, d7[3] 0x42,0xff,0xa1,0x09 = vmls.i8 d16, d18, d17 0x52,0xff,0xa1,0x09 = vmls.i16 d16, d18, d17 0x62,0xff,0xa1,0x09 = vmls.i32 d16, d18, d17 0x62,0xef,0xb1,0x0d = vmls.f32 d16, d18, d17 0x40,0xff,0xe4,0x29 = vmls.i8 q9, q8, q10 0x50,0xff,0xe4,0x29 = vmls.i16 q9, q8, q10 0x60,0xff,0xe4,0x29 = vmls.i32 q9, q8, q10 0x60,0xef,0xf4,0x2d = vmls.f32 q9, q8, q10 0x98,0xff,0xe6,0x84 = vmls.i16 q4, q12, d6[2] 0xc3,0xef,0xa2,0x0a = vmlsl.s8 q8, d19, d18 0xd3,0xef,0xa2,0x0a = vmlsl.s16 q8, d19, d18 0xe3,0xef,0xa2,0x0a = vmlsl.s32 q8, d19, d18 0xc3,0xff,0xa2,0x0a = vmlsl.u8 q8, d19, d18 0xd3,0xff,0xa2,0x0a = vmlsl.u16 q8, d19, d18 0xe3,0xff,0xa2,0x0a = vmlsl.u32 q8, d19, d18 0xd9,0xff,0xe9,0x66 = vmlsl.u16 q11, d25, d1[3] 0xd3,0xef,0xa2,0x0b = vqdmlsl.s16 q8, d19, d18 0xe3,0xef,0xa2,0x0b = vqdmlsl.s32 q8, d19, d18 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-mul-encoding.s.cs010066400017500001750000000025571363402546700227260ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x40,0xef,0xb1,0x09 = vmul.i8 d16, d16, d17 0x50,0xef,0xb1,0x09 = vmul.i16 d16, d16, d17 0x60,0xef,0xb1,0x09 = vmul.i32 d16, d16, d17 0x40,0xff,0xb1,0x0d = vmul.f32 d16, d16, d17 0x40,0xef,0xf2,0x09 = vmul.i8 q8, q8, q9 0x50,0xef,0xf2,0x09 = vmul.i16 q8, q8, q9 0x60,0xef,0xf2,0x09 = vmul.i32 q8, q8, q9 0x40,0xff,0xf2,0x0d = vmul.f32 q8, q8, q9 0x40,0xff,0xb1,0x09 = vmul.p8 d16, d16, d17 0x40,0xff,0xf2,0x09 = vmul.p8 q8, q8, q9 0xd8,0xef,0x68,0x28 = vmul.i16 d18, d8, d0[3] 0x50,0xef,0xa1,0x0b = vqdmulh.s16 d16, d16, d17 0x60,0xef,0xa1,0x0b = vqdmulh.s32 d16, d16, d17 0x50,0xef,0xe2,0x0b = vqdmulh.s16 q8, q8, q9 0x60,0xef,0xe2,0x0b = vqdmulh.s32 q8, q8, q9 0x92,0xef,0x43,0xbc = vqdmulh.s16 d11, d2, d3[0] 0x50,0xff,0xa1,0x0b = vqrdmulh.s16 d16, d16, d17 0x60,0xff,0xa1,0x0b = vqrdmulh.s32 d16, d16, d17 0x50,0xff,0xe2,0x0b = vqrdmulh.s16 q8, q8, q9 0x60,0xff,0xe2,0x0b = vqrdmulh.s32 q8, q8, q9 0xc0,0xef,0xa1,0x0c = vmull.s8 q8, d16, d17 0xd0,0xef,0xa1,0x0c = vmull.s16 q8, d16, d17 0xe0,0xef,0xa1,0x0c = vmull.s32 q8, d16, d17 0xc0,0xff,0xa1,0x0c = vmull.u8 q8, d16, d17 0xd0,0xff,0xa1,0x0c = vmull.u16 q8, d16, d17 0xe0,0xff,0xa1,0x0c = vmull.u32 q8, d16, d17 0xc0,0xef,0xa1,0x0e = vmull.p8 q8, d16, d17 0xd0,0xef,0xa1,0x0d = vqdmull.s16 q8, d16, d17 0xe0,0xef,0xa1,0x0d = vqdmull.s32 q8, d16, d17 0x97,0xef,0x49,0x2b = vqdmull.s16 q1, d7, d1[1] capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-neg-encoding.s.cs010066400017500001750000000011071363402546700226700ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf1,0xff,0xa0,0x03 = vneg.s8 d16, d16 0xf5,0xff,0xa0,0x03 = vneg.s16 d16, d16 0xf9,0xff,0xa0,0x03 = vneg.s32 d16, d16 0xf9,0xff,0xa0,0x07 = vneg.f32 d16, d16 0xf1,0xff,0xe0,0x03 = vneg.s8 q8, q8 0xf5,0xff,0xe0,0x03 = vneg.s16 q8, q8 0xf9,0xff,0xe0,0x03 = vneg.s32 q8, q8 0xf9,0xff,0xe0,0x07 = vneg.f32 q8, q8 0xf0,0xff,0xa0,0x07 = vqneg.s8 d16, d16 0xf4,0xff,0xa0,0x07 = vqneg.s16 d16, d16 0xf8,0xff,0xa0,0x07 = vqneg.s32 d16, d16 0xf0,0xff,0xe0,0x07 = vqneg.s8 q8, q8 0xf4,0xff,0xe0,0x07 = vqneg.s16 q8, q8 0xf8,0xff,0xe0,0x07 = vqneg.s32 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-pairwise-encoding.s.cs010066400017500001750000000034321363402546700237450ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x05,0xef,0x1b,0x1b = vpadd.i8 d1, d5, d11 0x12,0xef,0x1c,0xdb = vpadd.i16 d13, d2, d12 0x21,0xef,0x1d,0xeb = vpadd.i32 d14, d1, d13 0x40,0xff,0x8e,0x3d = vpadd.f32 d19, d16, d14 0xb0,0xff,0x0a,0x72 = vpaddl.s8 d7, d10 0xb4,0xff,0x0b,0x82 = vpaddl.s16 d8, d11 0xb8,0xff,0x0c,0x92 = vpaddl.s32 d9, d12 0xb0,0xff,0x8d,0x02 = vpaddl.u8 d0, d13 0xb4,0xff,0x8e,0x52 = vpaddl.u16 d5, d14 0xb8,0xff,0x8f,0x62 = vpaddl.u32 d6, d15 0xb0,0xff,0x4e,0x82 = vpaddl.s8 q4, q7 0xb4,0xff,0x4c,0xa2 = vpaddl.s16 q5, q6 0xb8,0xff,0x4a,0xc2 = vpaddl.s32 q6, q5 0xb0,0xff,0xc8,0xe2 = vpaddl.u8 q7, q4 0xf4,0xff,0xc6,0x02 = vpaddl.u16 q8, q3 0xf8,0xff,0xc4,0x22 = vpaddl.u32 q9, q2 0xf0,0xff,0x04,0x06 = vpadal.s8 d16, d4 0xf4,0xff,0x09,0x46 = vpadal.s16 d20, d9 0xf8,0xff,0x01,0x26 = vpadal.s32 d18, d1 0xb0,0xff,0xa9,0xe6 = vpadal.u8 d14, d25 0xb4,0xff,0x86,0xc6 = vpadal.u16 d12, d6 0xb8,0xff,0x87,0xb6 = vpadal.u32 d11, d7 0xb0,0xff,0x64,0x86 = vpadal.s8 q4, q10 0xb4,0xff,0x66,0xa6 = vpadal.s16 q5, q11 0xb8,0xff,0x68,0xc6 = vpadal.s32 q6, q12 0xb0,0xff,0xea,0xe6 = vpadal.u8 q7, q13 0xf4,0xff,0xec,0x06 = vpadal.u16 q8, q14 0xf8,0xff,0xee,0x26 = vpadal.u32 q9, q15 0x4d,0xef,0x9a,0x0a = vpmin.s8 d16, d29, d10 0x5c,0xef,0x9b,0x1a = vpmin.s16 d17, d28, d11 0x6b,0xef,0x9c,0x2a = vpmin.s32 d18, d27, d12 0x4a,0xff,0x9d,0x3a = vpmin.u8 d19, d26, d13 0x59,0xff,0x9e,0x4a = vpmin.u16 d20, d25, d14 0x68,0xff,0x9f,0x5a = vpmin.u32 d21, d24, d15 0x67,0xff,0xa0,0x6f = vpmin.f32 d22, d23, d16 0x04,0xef,0xa1,0x3a = vpmax.s8 d3, d20, d17 0x15,0xef,0xa0,0x4a = vpmax.s16 d4, d21, d16 0x26,0xef,0x8f,0x5a = vpmax.s32 d5, d22, d15 0x07,0xff,0x8e,0x6a = vpmax.u8 d6, d23, d14 0x18,0xff,0x8d,0x7a = vpmax.u16 d7, d24, d13 0x29,0xff,0x8c,0x8a = vpmax.u32 d8, d25, d12 0x0a,0xff,0x8b,0x9f = vpmax.f32 d9, d26, d11 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-reciprocal-encoding.s.cs010066400017500001750000000010471363402546700242450ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xfb,0xff,0x20,0x04 = vrecpe.u32 d16, d16 0xfb,0xff,0x60,0x04 = vrecpe.u32 q8, q8 0xfb,0xff,0x20,0x05 = vrecpe.f32 d16, d16 0xfb,0xff,0x60,0x05 = vrecpe.f32 q8, q8 0x40,0xef,0xb1,0x0f = vrecps.f32 d16, d16, d17 0x40,0xef,0xf2,0x0f = vrecps.f32 q8, q8, q9 0xfb,0xff,0xa0,0x04 = vrsqrte.u32 d16, d16 0xfb,0xff,0xe0,0x04 = vrsqrte.u32 q8, q8 0xfb,0xff,0xa0,0x05 = vrsqrte.f32 d16, d16 0xfb,0xff,0xe0,0x05 = vrsqrte.f32 q8, q8 0x60,0xef,0xb1,0x0f = vrsqrts.f32 d16, d16, d17 0x60,0xef,0xf2,0x0f = vrsqrts.f32 q8, q8, q9 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-reverse-encoding.s.cs010066400017500001750000000007751363402546700236040ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf0,0xff,0x20,0x00 = vrev64.8 d16, d16 0xf4,0xff,0x20,0x00 = vrev64.16 d16, d16 0xf8,0xff,0x20,0x00 = vrev64.32 d16, d16 0xf0,0xff,0x60,0x00 = vrev64.8 q8, q8 0xf4,0xff,0x60,0x00 = vrev64.16 q8, q8 0xf8,0xff,0x60,0x00 = vrev64.32 q8, q8 0xf0,0xff,0xa0,0x00 = vrev32.8 d16, d16 0xf4,0xff,0xa0,0x00 = vrev32.16 d16, d16 0xf0,0xff,0xe0,0x00 = vrev32.8 q8, q8 0xf4,0xff,0xe0,0x00 = vrev32.16 q8, q8 0xf0,0xff,0x20,0x01 = vrev16.8 d16, d16 0xf0,0xff,0x60,0x01 = vrev16.8 q8, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-satshift-encoding.s.cs010066400017500001750000000064641363402546700237570ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x41,0xef,0xb0,0x04 = vqshl.s8 d16, d16, d17 0x51,0xef,0xb0,0x04 = vqshl.s16 d16, d16, d17 0x61,0xef,0xb0,0x04 = vqshl.s32 d16, d16, d17 0x71,0xef,0xb0,0x04 = vqshl.s64 d16, d16, d17 0x41,0xff,0xb0,0x04 = vqshl.u8 d16, d16, d17 0x51,0xff,0xb0,0x04 = vqshl.u16 d16, d16, d17 0x61,0xff,0xb0,0x04 = vqshl.u32 d16, d16, d17 0x71,0xff,0xb0,0x04 = vqshl.u64 d16, d16, d17 0x42,0xef,0xf0,0x04 = vqshl.s8 q8, q8, q9 0x52,0xef,0xf0,0x04 = vqshl.s16 q8, q8, q9 0x62,0xef,0xf0,0x04 = vqshl.s32 q8, q8, q9 0x72,0xef,0xf0,0x04 = vqshl.s64 q8, q8, q9 0x42,0xff,0xf0,0x04 = vqshl.u8 q8, q8, q9 0x52,0xff,0xf0,0x04 = vqshl.u16 q8, q8, q9 0x62,0xff,0xf0,0x04 = vqshl.u32 q8, q8, q9 0x72,0xff,0xf0,0x04 = vqshl.u64 q8, q8, q9 0xcf,0xef,0x30,0x07 = vqshl.s8 d16, d16, #7 0xdf,0xef,0x30,0x07 = vqshl.s16 d16, d16, #15 0xff,0xef,0x30,0x07 = vqshl.s32 d16, d16, #31 0xff,0xef,0xb0,0x07 = vqshl.s64 d16, d16, #63 0xcf,0xff,0x30,0x07 = vqshl.u8 d16, d16, #7 0xdf,0xff,0x30,0x07 = vqshl.u16 d16, d16, #15 0xff,0xff,0x30,0x07 = vqshl.u32 d16, d16, #31 0xff,0xff,0xb0,0x07 = vqshl.u64 d16, d16, #63 0xcf,0xff,0x30,0x06 = vqshlu.s8 d16, d16, #7 0xdf,0xff,0x30,0x06 = vqshlu.s16 d16, d16, #15 0xff,0xff,0x30,0x06 = vqshlu.s32 d16, d16, #31 0xff,0xff,0xb0,0x06 = vqshlu.s64 d16, d16, #63 0xcf,0xef,0x70,0x07 = vqshl.s8 q8, q8, #7 0xdf,0xef,0x70,0x07 = vqshl.s16 q8, q8, #15 0xff,0xef,0x70,0x07 = vqshl.s32 q8, q8, #31 0xff,0xef,0xf0,0x07 = vqshl.s64 q8, q8, #63 0xcf,0xff,0x70,0x07 = vqshl.u8 q8, q8, #7 0xdf,0xff,0x70,0x07 = vqshl.u16 q8, q8, #15 0xff,0xff,0x70,0x07 = vqshl.u32 q8, q8, #31 0xff,0xff,0xf0,0x07 = vqshl.u64 q8, q8, #63 0xcf,0xff,0x70,0x06 = vqshlu.s8 q8, q8, #7 0xdf,0xff,0x70,0x06 = vqshlu.s16 q8, q8, #15 0xff,0xff,0x70,0x06 = vqshlu.s32 q8, q8, #31 0xff,0xff,0xf0,0x06 = vqshlu.s64 q8, q8, #63 0x41,0xef,0xb0,0x05 = vqrshl.s8 d16, d16, d17 0x51,0xef,0xb0,0x05 = vqrshl.s16 d16, d16, d17 0x61,0xef,0xb0,0x05 = vqrshl.s32 d16, d16, d17 0x71,0xef,0xb0,0x05 = vqrshl.s64 d16, d16, d17 0x41,0xff,0xb0,0x05 = vqrshl.u8 d16, d16, d17 0x51,0xff,0xb0,0x05 = vqrshl.u16 d16, d16, d17 0x61,0xff,0xb0,0x05 = vqrshl.u32 d16, d16, d17 0x71,0xff,0xb0,0x05 = vqrshl.u64 d16, d16, d17 0x42,0xef,0xf0,0x05 = vqrshl.s8 q8, q8, q9 0x52,0xef,0xf0,0x05 = vqrshl.s16 q8, q8, q9 0x62,0xef,0xf0,0x05 = vqrshl.s32 q8, q8, q9 0x72,0xef,0xf0,0x05 = vqrshl.s64 q8, q8, q9 0x42,0xff,0xf0,0x05 = vqrshl.u8 q8, q8, q9 0x52,0xff,0xf0,0x05 = vqrshl.u16 q8, q8, q9 0x62,0xff,0xf0,0x05 = vqrshl.u32 q8, q8, q9 0x72,0xff,0xf0,0x05 = vqrshl.u64 q8, q8, q9 0xc8,0xef,0x30,0x09 = vqshrn.s16 d16, q8, #8 0xd0,0xef,0x30,0x09 = vqshrn.s32 d16, q8, #16 0xe0,0xef,0x30,0x09 = vqshrn.s64 d16, q8, #32 0xc8,0xff,0x30,0x09 = vqshrn.u16 d16, q8, #8 0xd0,0xff,0x30,0x09 = vqshrn.u32 d16, q8, #16 0xe0,0xff,0x30,0x09 = vqshrn.u64 d16, q8, #32 0xc8,0xff,0x30,0x08 = vqshrun.s16 d16, q8, #8 0xd0,0xff,0x30,0x08 = vqshrun.s32 d16, q8, #16 0xe0,0xff,0x30,0x08 = vqshrun.s64 d16, q8, #32 0xc8,0xef,0x70,0x09 = vqrshrn.s16 d16, q8, #8 0xd0,0xef,0x70,0x09 = vqrshrn.s32 d16, q8, #16 0xe0,0xef,0x70,0x09 = vqrshrn.s64 d16, q8, #32 0xc8,0xff,0x70,0x09 = vqrshrn.u16 d16, q8, #8 0xd0,0xff,0x70,0x09 = vqrshrn.u32 d16, q8, #16 0xe0,0xff,0x70,0x09 = vqrshrn.u64 d16, q8, #32 0xc8,0xff,0x70,0x08 = vqrshrun.s16 d16, q8, #8 0xd0,0xff,0x70,0x08 = vqrshrun.s32 d16, q8, #16 0xe0,0xff,0x70,0x08 = vqrshrun.s64 d16, q8, #32 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-shift-encoding.s.cs010066400017500001750000000066731363402546700232510ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x40,0xff,0xa1,0x04 = vshl.u8 d16, d17, d16 0x50,0xff,0xa1,0x04 = vshl.u16 d16, d17, d16 0x60,0xff,0xa1,0x04 = vshl.u32 d16, d17, d16 0x70,0xff,0xa1,0x04 = vshl.u64 d16, d17, d16 0xcf,0xef,0x30,0x05 = vshl.i8 d16, d16, #7 0xdf,0xef,0x30,0x05 = vshl.i16 d16, d16, #15 0xff,0xef,0x30,0x05 = vshl.i32 d16, d16, #31 0xff,0xef,0xb0,0x05 = vshl.i64 d16, d16, #63 0x40,0xff,0xe2,0x04 = vshl.u8 q8, q9, q8 0x50,0xff,0xe2,0x04 = vshl.u16 q8, q9, q8 0x60,0xff,0xe2,0x04 = vshl.u32 q8, q9, q8 0x70,0xff,0xe2,0x04 = vshl.u64 q8, q9, q8 0xcf,0xef,0x70,0x05 = vshl.i8 q8, q8, #7 0xdf,0xef,0x70,0x05 = vshl.i16 q8, q8, #15 0xff,0xef,0x70,0x05 = vshl.i32 q8, q8, #31 0xff,0xef,0xf0,0x05 = vshl.i64 q8, q8, #63 0xc8,0xff,0x30,0x00 = vshr.u8 d16, d16, #8 0xd0,0xff,0x30,0x00 = vshr.u16 d16, d16, #16 0xe0,0xff,0x30,0x00 = vshr.u32 d16, d16, #32 0xc0,0xff,0xb0,0x00 = vshr.u64 d16, d16, #64 0xc8,0xff,0x70,0x00 = vshr.u8 q8, q8, #8 0xd0,0xff,0x70,0x00 = vshr.u16 q8, q8, #16 0xe0,0xff,0x70,0x00 = vshr.u32 q8, q8, #32 0xc0,0xff,0xf0,0x00 = vshr.u64 q8, q8, #64 0xc8,0xef,0x30,0x00 = vshr.s8 d16, d16, #8 0xd0,0xef,0x30,0x00 = vshr.s16 d16, d16, #16 0xe0,0xef,0x30,0x00 = vshr.s32 d16, d16, #32 0xc0,0xef,0xb0,0x00 = vshr.s64 d16, d16, #64 0xc8,0xef,0x70,0x00 = vshr.s8 q8, q8, #8 0xd0,0xef,0x70,0x00 = vshr.s16 q8, q8, #16 0xe0,0xef,0x70,0x00 = vshr.s32 q8, q8, #32 0xc0,0xef,0xf0,0x00 = vshr.s64 q8, q8, #64 0xcf,0xef,0x30,0x0a = vshll.s8 q8, d16, #7 0xdf,0xef,0x30,0x0a = vshll.s16 q8, d16, #15 0xff,0xef,0x30,0x0a = vshll.s32 q8, d16, #31 0xcf,0xff,0x30,0x0a = vshll.u8 q8, d16, #7 0xdf,0xff,0x30,0x0a = vshll.u16 q8, d16, #15 0xff,0xff,0x30,0x0a = vshll.u32 q8, d16, #31 0xf2,0xff,0x20,0x03 = vshll.i8 q8, d16, #8 0xf6,0xff,0x20,0x03 = vshll.i16 q8, d16, #16 0xfa,0xff,0x20,0x03 = vshll.i32 q8, d16, #32 0xc8,0xef,0x30,0x08 = vshrn.i16 d16, q8, #8 0xd0,0xef,0x30,0x08 = vshrn.i32 d16, q8, #16 0xe0,0xef,0x30,0x08 = vshrn.i64 d16, q8, #32 0x40,0xef,0xa1,0x05 = vrshl.s8 d16, d17, d16 0x50,0xef,0xa1,0x05 = vrshl.s16 d16, d17, d16 0x60,0xef,0xa1,0x05 = vrshl.s32 d16, d17, d16 0x70,0xef,0xa1,0x05 = vrshl.s64 d16, d17, d16 0x40,0xff,0xa1,0x05 = vrshl.u8 d16, d17, d16 0x50,0xff,0xa1,0x05 = vrshl.u16 d16, d17, d16 0x60,0xff,0xa1,0x05 = vrshl.u32 d16, d17, d16 0x70,0xff,0xa1,0x05 = vrshl.u64 d16, d17, d16 0x40,0xef,0xe2,0x05 = vrshl.s8 q8, q9, q8 0x50,0xef,0xe2,0x05 = vrshl.s16 q8, q9, q8 0x60,0xef,0xe2,0x05 = vrshl.s32 q8, q9, q8 0x70,0xef,0xe2,0x05 = vrshl.s64 q8, q9, q8 0x40,0xff,0xe2,0x05 = vrshl.u8 q8, q9, q8 0x50,0xff,0xe2,0x05 = vrshl.u16 q8, q9, q8 0x60,0xff,0xe2,0x05 = vrshl.u32 q8, q9, q8 0x70,0xff,0xe2,0x05 = vrshl.u64 q8, q9, q8 0xc8,0xef,0x30,0x02 = vrshr.s8 d16, d16, #8 0xd0,0xef,0x30,0x02 = vrshr.s16 d16, d16, #16 0xe0,0xef,0x30,0x02 = vrshr.s32 d16, d16, #32 0xc0,0xef,0xb0,0x02 = vrshr.s64 d16, d16, #64 0xc8,0xff,0x30,0x02 = vrshr.u8 d16, d16, #8 0xd0,0xff,0x30,0x02 = vrshr.u16 d16, d16, #16 0xe0,0xff,0x30,0x02 = vrshr.u32 d16, d16, #32 0xc0,0xff,0xb0,0x02 = vrshr.u64 d16, d16, #64 0xc8,0xef,0x70,0x02 = vrshr.s8 q8, q8, #8 0xd0,0xef,0x70,0x02 = vrshr.s16 q8, q8, #16 0xe0,0xef,0x70,0x02 = vrshr.s32 q8, q8, #32 0xc0,0xef,0xf0,0x02 = vrshr.s64 q8, q8, #64 0xc8,0xff,0x70,0x02 = vrshr.u8 q8, q8, #8 0xd0,0xff,0x70,0x02 = vrshr.u16 q8, q8, #16 0xe0,0xff,0x70,0x02 = vrshr.u32 q8, q8, #32 0xc0,0xff,0xf0,0x02 = vrshr.u64 q8, q8, #64 0xc8,0xef,0x70,0x08 = vrshrn.i16 d16, q8, #8 0xd0,0xef,0x70,0x08 = vrshrn.i32 d16, q8, #16 0xe0,0xef,0x70,0x08 = vrshrn.i64 d16, q8, #32 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-shiftaccum-encoding.s.cs010066400017500001750000000101561363402546700242510ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xc8,0xef,0x30,0x11 = vsra.s8 d17, d16, #8 0x90,0xef,0x1e,0xf1 = vsra.s16 d15, d14, #16 0xa0,0xef,0x1c,0xd1 = vsra.s32 d13, d12, #32 0x80,0xef,0x9a,0xb1 = vsra.s64 d11, d10, #64 0x88,0xef,0x54,0xe1 = vsra.s8 q7, q2, #8 0x90,0xef,0x5c,0x61 = vsra.s16 q3, q6, #16 0xe0,0xef,0x5a,0x21 = vsra.s32 q9, q5, #32 0xc0,0xef,0xd8,0x01 = vsra.s64 q8, q4, #64 0xc8,0xff,0x30,0x11 = vsra.u8 d17, d16, #8 0x95,0xff,0x1e,0xb1 = vsra.u16 d11, d14, #11 0xaa,0xff,0x1f,0xc1 = vsra.u32 d12, d15, #22 0x8a,0xff,0xb0,0xd1 = vsra.u64 d13, d16, #54 0x88,0xff,0x5e,0x21 = vsra.u8 q1, q7, #8 0x9a,0xff,0x5e,0x41 = vsra.u16 q2, q7, #6 0xab,0xff,0x5c,0x61 = vsra.u32 q3, q6, #21 0xa7,0xff,0xda,0x81 = vsra.u64 q4, q5, #25 0xc8,0xef,0x30,0x01 = vsra.s8 d16, d16, #8 0x90,0xef,0x1e,0xe1 = vsra.s16 d14, d14, #16 0xa0,0xef,0x1c,0xc1 = vsra.s32 d12, d12, #32 0x80,0xef,0x9a,0xa1 = vsra.s64 d10, d10, #64 0x88,0xef,0x54,0x41 = vsra.s8 q2, q2, #8 0x90,0xef,0x5c,0xc1 = vsra.s16 q6, q6, #16 0xa0,0xef,0x5a,0xa1 = vsra.s32 q5, q5, #32 0x80,0xef,0xd8,0x81 = vsra.s64 q4, q4, #64 0xc8,0xff,0x30,0x01 = vsra.u8 d16, d16, #8 0x95,0xff,0x1e,0xe1 = vsra.u16 d14, d14, #11 0xaa,0xff,0x1f,0xf1 = vsra.u32 d15, d15, #22 0xca,0xff,0xb0,0x01 = vsra.u64 d16, d16, #54 0x88,0xff,0x5e,0xe1 = vsra.u8 q7, q7, #8 0x9a,0xff,0x5e,0xe1 = vsra.u16 q7, q7, #6 0xab,0xff,0x5c,0xc1 = vsra.u32 q6, q6, #21 0xa7,0xff,0xda,0xa1 = vsra.u64 q5, q5, #25 0x88,0xef,0x3a,0x53 = vrsra.s8 d5, d26, #8 0x90,0xef,0x39,0x63 = vrsra.s16 d6, d25, #16 0xa0,0xef,0x38,0x73 = vrsra.s32 d7, d24, #32 0x80,0xef,0xb7,0xe3 = vrsra.s64 d14, d23, #64 0x88,0xff,0x36,0xf3 = vrsra.u8 d15, d22, #8 0xd0,0xff,0x35,0x03 = vrsra.u16 d16, d21, #16 0xe0,0xff,0x34,0x13 = vrsra.u32 d17, d20, #32 0xc0,0xff,0xb3,0x23 = vrsra.u64 d18, d19, #64 0x88,0xef,0x54,0x23 = vrsra.s8 q1, q2, #8 0x90,0xef,0x56,0x43 = vrsra.s16 q2, q3, #16 0xa0,0xef,0x58,0x63 = vrsra.s32 q3, q4, #32 0x80,0xef,0xda,0x83 = vrsra.s64 q4, q5, #64 0x88,0xff,0x5c,0xa3 = vrsra.u8 q5, q6, #8 0x90,0xff,0x5e,0xc3 = vrsra.u16 q6, q7, #16 0xa0,0xff,0x70,0xe3 = vrsra.u32 q7, q8, #32 0xc0,0xff,0xf2,0x03 = vrsra.u64 q8, q9, #64 0xc8,0xef,0x3a,0xa3 = vrsra.s8 d26, d26, #8 0xd0,0xef,0x39,0x93 = vrsra.s16 d25, d25, #16 0xe0,0xef,0x38,0x83 = vrsra.s32 d24, d24, #32 0xc0,0xef,0xb7,0x73 = vrsra.s64 d23, d23, #64 0xc8,0xff,0x36,0x63 = vrsra.u8 d22, d22, #8 0xd0,0xff,0x35,0x53 = vrsra.u16 d21, d21, #16 0xe0,0xff,0x34,0x43 = vrsra.u32 d20, d20, #32 0xc0,0xff,0xb3,0x33 = vrsra.u64 d19, d19, #64 0x88,0xef,0x54,0x43 = vrsra.s8 q2, q2, #8 0x90,0xef,0x56,0x63 = vrsra.s16 q3, q3, #16 0xa0,0xef,0x58,0x83 = vrsra.s32 q4, q4, #32 0x80,0xef,0xda,0xa3 = vrsra.s64 q5, q5, #64 0x88,0xff,0x5c,0xc3 = vrsra.u8 q6, q6, #8 0x90,0xff,0x5e,0xe3 = vrsra.u16 q7, q7, #16 0xe0,0xff,0x70,0x03 = vrsra.u32 q8, q8, #32 0xc0,0xff,0xf2,0x23 = vrsra.u64 q9, q9, #64 0x8f,0xff,0x1c,0xb5 = vsli.8 d11, d12, #7 0x9f,0xff,0x1d,0xc5 = vsli.16 d12, d13, #15 0xbf,0xff,0x1e,0xd5 = vsli.32 d13, d14, #31 0xbf,0xff,0x9f,0xe5 = vsli.64 d14, d15, #63 0x8f,0xff,0x70,0x25 = vsli.8 q1, q8, #7 0x9f,0xff,0x5e,0x45 = vsli.16 q2, q7, #15 0xbf,0xff,0x58,0x65 = vsli.32 q3, q4, #31 0xbf,0xff,0xda,0x85 = vsli.64 q4, q5, #63 0xc8,0xff,0x1b,0xc4 = vsri.8 d28, d11, #8 0xd0,0xff,0x1c,0xa4 = vsri.16 d26, d12, #16 0xe0,0xff,0x1d,0x84 = vsri.32 d24, d13, #32 0xc0,0xff,0x9e,0x54 = vsri.64 d21, d14, #64 0x88,0xff,0x70,0x24 = vsri.8 q1, q8, #8 0x90,0xff,0x54,0xa4 = vsri.16 q5, q2, #16 0xa0,0xff,0x58,0xe4 = vsri.32 q7, q4, #32 0xc0,0xff,0xdc,0x24 = vsri.64 q9, q6, #64 0x8f,0xff,0x1c,0xc5 = vsli.8 d12, d12, #7 0x9f,0xff,0x1d,0xd5 = vsli.16 d13, d13, #15 0xbf,0xff,0x1e,0xe5 = vsli.32 d14, d14, #31 0xbf,0xff,0x9f,0xf5 = vsli.64 d15, d15, #63 0xcf,0xff,0x70,0x05 = vsli.8 q8, q8, #7 0x9f,0xff,0x5e,0xe5 = vsli.16 q7, q7, #15 0xbf,0xff,0x58,0x85 = vsli.32 q4, q4, #31 0xbf,0xff,0xda,0xa5 = vsli.64 q5, q5, #63 0x88,0xff,0x1b,0xb4 = vsri.8 d11, d11, #8 0x90,0xff,0x1c,0xc4 = vsri.16 d12, d12, #16 0xa0,0xff,0x1d,0xd4 = vsri.32 d13, d13, #32 0x80,0xff,0x9e,0xe4 = vsri.64 d14, d14, #64 0xc8,0xff,0x70,0x04 = vsri.8 q8, q8, #8 0x90,0xff,0x54,0x44 = vsri.16 q2, q2, #16 0xa0,0xff,0x58,0x84 = vsri.32 q4, q4, #32 0x80,0xff,0xdc,0xc4 = vsri.64 q6, q6, #64 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-shuffle-encoding.s.cs010066400017500001750000000016161363402546700235600ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf1,0xef,0xa0,0x03 = vext.8 d16, d17, d16, #3 0xf1,0xef,0xa0,0x05 = vext.8 d16, d17, d16, #5 0xf2,0xef,0xe0,0x03 = vext.8 q8, q9, q8, #3 0xf2,0xef,0xe0,0x07 = vext.8 q8, q9, q8, #7 0xf1,0xef,0xa0,0x06 = vext.16 d16, d17, d16, #3 0xf2,0xef,0xe0,0x0c = vext.32 q8, q9, q8, #3 0xf2,0xff,0xa0,0x10 = vtrn.8 d17, d16 0xf6,0xff,0xa0,0x10 = vtrn.16 d17, d16 0xfa,0xff,0xa0,0x10 = vtrn.32 d17, d16 0xf2,0xff,0xe0,0x20 = vtrn.8 q9, q8 0xf6,0xff,0xe0,0x20 = vtrn.16 q9, q8 0xfa,0xff,0xe0,0x20 = vtrn.32 q9, q8 0xf2,0xff,0x20,0x11 = vuzp.8 d17, d16 0xf6,0xff,0x20,0x11 = vuzp.16 d17, d16 0xf2,0xff,0x60,0x21 = vuzp.8 q9, q8 0xf6,0xff,0x60,0x21 = vuzp.16 q9, q8 0xfa,0xff,0x60,0x21 = vuzp.32 q9, q8 0xf2,0xff,0xa0,0x11 = vzip.8 d17, d16 0xf6,0xff,0xa0,0x11 = vzip.16 d17, d16 0xf2,0xff,0xe0,0x21 = vzip.8 q9, q8 0xf6,0xff,0xe0,0x21 = vzip.16 q9, q8 0xfa,0xff,0xe0,0x21 = vzip.32 q9, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-sub-encoding.s.cs010066400017500001750000000016161363402546700227150ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf1,0xef,0xa0,0x03 = vext.8 d16, d17, d16, #3 0xf1,0xef,0xa0,0x05 = vext.8 d16, d17, d16, #5 0xf2,0xef,0xe0,0x03 = vext.8 q8, q9, q8, #3 0xf2,0xef,0xe0,0x07 = vext.8 q8, q9, q8, #7 0xf1,0xef,0xa0,0x06 = vext.16 d16, d17, d16, #3 0xf2,0xef,0xe0,0x0c = vext.32 q8, q9, q8, #3 0xf2,0xff,0xa0,0x10 = vtrn.8 d17, d16 0xf6,0xff,0xa0,0x10 = vtrn.16 d17, d16 0xfa,0xff,0xa0,0x10 = vtrn.32 d17, d16 0xf2,0xff,0xe0,0x20 = vtrn.8 q9, q8 0xf6,0xff,0xe0,0x20 = vtrn.16 q9, q8 0xfa,0xff,0xe0,0x20 = vtrn.32 q9, q8 0xf2,0xff,0x20,0x11 = vuzp.8 d17, d16 0xf6,0xff,0x20,0x11 = vuzp.16 d17, d16 0xf2,0xff,0x60,0x21 = vuzp.8 q9, q8 0xf6,0xff,0x60,0x21 = vuzp.16 q9, q8 0xfa,0xff,0x60,0x21 = vuzp.32 q9, q8 0xf2,0xff,0xa0,0x11 = vzip.8 d17, d16 0xf6,0xff,0xa0,0x11 = vzip.16 d17, d16 0xf2,0xff,0xe0,0x21 = vzip.8 q9, q8 0xf6,0xff,0xe0,0x21 = vzip.16 q9, q8 0xfa,0xff,0xe0,0x21 = vzip.32 q9, q8 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-table-encoding.s.cs010066400017500001750000000007071363402546700232130ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0xf1,0xff,0xa0,0x08 = vtbl.8 d16, {d17}, d16 0xf0,0xff,0xa2,0x09 = vtbl.8 d16, {d16, d17}, d18 0xf0,0xff,0xa4,0x0a = vtbl.8 d16, {d16, d17, d18}, d20 0xf0,0xff,0xa4,0x0b = vtbl.8 d16, {d16, d17, d18, d19}, d20 0xf0,0xff,0xe1,0x28 = vtbx.8 d18, {d16}, d17 0xf0,0xff,0xe2,0x39 = vtbx.8 d19, {d16, d17}, d18 0xf0,0xff,0xe5,0x4a = vtbx.8 d20, {d16, d17, d18}, d21 0xf0,0xff,0xe5,0x4b = vtbx.8 d20, {d16, d17, d18, d19}, d21 capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-vld-encoding.s.cs010066400017500001750000000053751363402546700227170ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x60,0xf9,0x1f,0x07 = vld1.8 {d16}, [r0:64] 0x60,0xf9,0x4f,0x07 = vld1.16 {d16}, [r0] 0x60,0xf9,0x8f,0x07 = vld1.32 {d16}, [r0] 0x60,0xf9,0xcf,0x07 = vld1.64 {d16}, [r0] 0x60,0xf9,0x1f,0x0a = vld1.8 {d16, d17}, [r0:64] 0x60,0xf9,0x6f,0x0a = vld1.16 {d16, d17}, [r0:128] 0x60,0xf9,0x8f,0x0a = vld1.32 {d16, d17}, [r0] 0x60,0xf9,0xcf,0x0a = vld1.64 {d16, d17}, [r0] 0x60,0xf9,0x1f,0x08 = vld2.8 {d16, d17}, [r0:64] 0x60,0xf9,0x6f,0x08 = vld2.16 {d16, d17}, [r0:128] 0x60,0xf9,0x8f,0x08 = vld2.32 {d16, d17}, [r0] 0x60,0xf9,0x1f,0x03 = vld2.8 {d16, d17, d18, d19}, [r0:64] 0x60,0xf9,0x6f,0x03 = vld2.16 {d16, d17, d18, d19}, [r0:128] 0x60,0xf9,0xbf,0x03 = vld2.32 {d16, d17, d18, d19}, [r0:256] 0x60,0xf9,0x1f,0x04 = vld3.8 {d16, d17, d18}, [r0:64] 0x60,0xf9,0x4f,0x04 = vld3.16 {d16, d17, d18}, [r0] 0x60,0xf9,0x8f,0x04 = vld3.32 {d16, d17, d18}, [r0] 0x60,0xf9,0x1d,0x05 = vld3.8 {d16, d18, d20}, [r0:64]! 0x60,0xf9,0x1d,0x15 = vld3.8 {d17, d19, d21}, [r0:64]! 0x60,0xf9,0x4d,0x05 = vld3.16 {d16, d18, d20}, [r0]! 0x60,0xf9,0x4d,0x15 = vld3.16 {d17, d19, d21}, [r0]! 0x60,0xf9,0x8d,0x05 = vld3.32 {d16, d18, d20}, [r0]! 0x60,0xf9,0x8d,0x15 = vld3.32 {d17, d19, d21}, [r0]! 0x60,0xf9,0x1f,0x00 = vld4.8 {d16, d17, d18, d19}, [r0:64] 0x60,0xf9,0x6f,0x00 = vld4.16 {d16, d17, d18, d19}, [r0:128] 0x60,0xf9,0xbf,0x00 = vld4.32 {d16, d17, d18, d19}, [r0:256] 0x60,0xf9,0x3d,0x01 = vld4.8 {d16, d18, d20, d22}, [r0:256]! 0x60,0xf9,0x3d,0x11 = vld4.8 {d17, d19, d21, d23}, [r0:256]! 0x60,0xf9,0x4d,0x01 = vld4.16 {d16, d18, d20, d22}, [r0]! 0x60,0xf9,0x4d,0x11 = vld4.16 {d17, d19, d21, d23}, [r0]! 0x60,0xf9,0x8d,0x01 = vld4.32 {d16, d18, d20, d22}, [r0]! 0x60,0xf9,0x8d,0x11 = vld4.32 {d17, d19, d21, d23}, [r0]! 0xe0,0xf9,0x6f,0x00 = vld1.8 {d16[3]}, [r0] 0xe0,0xf9,0x9f,0x04 = vld1.16 {d16[2]}, [r0:16] 0xe0,0xf9,0xbf,0x08 = vld1.32 {d16[1]}, [r0:32] 0xe0,0xf9,0x3f,0x01 = vld2.8 {d16[1], d17[1]}, [r0:16] 0xe0,0xf9,0x5f,0x05 = vld2.16 {d16[1], d17[1]}, [r0:32] 0xe0,0xf9,0x8f,0x09 = vld2.32 {d16[1], d17[1]}, [r0] 0xe0,0xf9,0x6f,0x15 = vld2.16 {d17[1], d19[1]}, [r0] 0xe0,0xf9,0x5f,0x19 = vld2.32 {d17[0], d19[0]}, [r0:64] 0xe0,0xf9,0x2f,0x02 = vld3.8 {d16[1], d17[1], d18[1]}, [r0] 0xe0,0xf9,0x4f,0x06 = vld3.16 {d16[1], d17[1], d18[1]}, [r0] 0xe0,0xf9,0x8f,0x0a = vld3.32 {d16[1], d17[1], d18[1]}, [r0] 0xe0,0xf9,0x6f,0x06 = vld3.16 {d16[1], d18[1], d20[1]}, [r0] 0xe0,0xf9,0xcf,0x1a = vld3.32 {d17[1], d19[1], d21[1]}, [r0] 0xe0,0xf9,0x3f,0x03 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 0xe0,0xf9,0x4f,0x07 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 0xe0,0xf9,0xaf,0x0b = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 0xe0,0xf9,0x7f,0x07 = vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64] 0xe0,0xf9,0x4f,0x1b = vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] capstone-sys-0.11.0/capstone/suite/MC/ARM/neont2-vst-encoding.s.cs010066400017500001750000000051411363402546700227350ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, None 0x40,0xf9,0x1f,0x07 = vst1.8 {d16}, [r0:64] 0x40,0xf9,0x4f,0x07 = vst1.16 {d16}, [r0] 0x40,0xf9,0x8f,0x07 = vst1.32 {d16}, [r0] 0x40,0xf9,0xcf,0x07 = vst1.64 {d16}, [r0] 0x40,0xf9,0x1f,0x0a = vst1.8 {d16, d17}, [r0:64] 0x40,0xf9,0x6f,0x0a = vst1.16 {d16, d17}, [r0:128] 0x40,0xf9,0x8f,0x0a = vst1.32 {d16, d17}, [r0] 0x40,0xf9,0xcf,0x0a = vst1.64 {d16, d17}, [r0] 0x40,0xf9,0x1f,0x08 = vst2.8 {d16, d17}, [r0:64] 0x40,0xf9,0x6f,0x08 = vst2.16 {d16, d17}, [r0:128] 0x40,0xf9,0x8f,0x08 = vst2.32 {d16, d17}, [r0] 0x40,0xf9,0x1f,0x03 = vst2.8 {d16, d17, d18, d19}, [r0:64] 0x40,0xf9,0x6f,0x03 = vst2.16 {d16, d17, d18, d19}, [r0:128] 0x40,0xf9,0xbf,0x03 = vst2.32 {d16, d17, d18, d19}, [r0:256] 0x40,0xf9,0x1f,0x04 = vst3.8 {d16, d17, d18}, [r0:64] 0x40,0xf9,0x4f,0x04 = vst3.16 {d16, d17, d18}, [r0] 0x40,0xf9,0x8f,0x04 = vst3.32 {d16, d17, d18}, [r0] 0x40,0xf9,0x1d,0x05 = vst3.8 {d16, d18, d20}, [r0:64]! 0x40,0xf9,0x1d,0x15 = vst3.8 {d17, d19, d21}, [r0:64]! 0x40,0xf9,0x4d,0x05 = vst3.16 {d16, d18, d20}, [r0]! 0x40,0xf9,0x4d,0x15 = vst3.16 {d17, d19, d21}, [r0]! 0x40,0xf9,0x8d,0x05 = vst3.32 {d16, d18, d20}, [r0]! 0x40,0xf9,0x8d,0x15 = vst3.32 {d17, d19, d21}, [r0]! 0x40,0xf9,0x1f,0x00 = vst4.8 {d16, d17, d18, d19}, [r0:64] 0x40,0xf9,0x6f,0x00 = vst4.16 {d16, d17, d18, d19}, [r0:128] 0x40,0xf9,0x3d,0x01 = vst4.8 {d16, d18, d20, d22}, [r0:256]! 0x40,0xf9,0x3d,0x11 = vst4.8 {d17, d19, d21, d23}, [r0:256]! 0x40,0xf9,0x4d,0x01 = vst4.16 {d16, d18, d20, d22}, [r0]! 0x40,0xf9,0x4d,0x11 = vst4.16 {d17, d19, d21, d23}, [r0]! 0x40,0xf9,0x8d,0x01 = vst4.32 {d16, d18, d20, d22}, [r0]! 0x40,0xf9,0x8d,0x11 = vst4.32 {d17, d19, d21, d23}, [r0]! 0xc0,0xf9,0x3f,0x01 = vst2.8 {d16[1], d17[1]}, [r0:16] 0xc0,0xf9,0x5f,0x05 = vst2.16 {d16[1], d17[1]}, [r0:32] 0xc0,0xf9,0x8f,0x09 = vst2.32 {d16[1], d17[1]}, [r0] 0xc0,0xf9,0x6f,0x15 = vst2.16 {d17[1], d19[1]}, [r0] 0xc0,0xf9,0x5f,0x19 = vst2.32 {d17[0], d19[0]}, [r0:64] 0xc0,0xf9,0x2f,0x02 = vst3.8 {d16[1], d17[1], d18[1]}, [r0] 0xc0,0xf9,0x4f,0x06 = vst3.16 {d16[1], d17[1], d18[1]}, [r0] 0xc0,0xf9,0x8f,0x0a = vst3.32 {d16[1], d17[1], d18[1]}, [r0] 0xc0,0xf9,0xaf,0x16 = vst3.16 {d17[2], d19[2], d21[2]}, [r0] 0xc0,0xf9,0x4f,0x0a = vst3.32 {d16[0], d18[0], d20[0]}, [r0] 0xc0,0xf9,0x3f,0x03 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 0xc0,0xf9,0x4f,0x07 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 0xc0,0xf9,0xaf,0x0b = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 0xc0,0xf9,0xff,0x17 = vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0:64] 0xc0,0xf9,0x4f,0x1b = vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 0x04,0xf9,0x0f,0x89 = vst2.8 {d8, d10}, [r4] capstone-sys-0.11.0/capstone/suite/MC/ARM/simple-fp-encoding.s.cs010066400017500001750000000145741363402546700226240ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa0,0x0b,0x71,0xee = vadd.f64 d16, d17, d16 0x80,0x0a,0x30,0xee = vadd.f32 s0, s1, s0 0xe0,0x0b,0x71,0xee = vsub.f64 d16, d17, d16 0xc0,0x0a,0x30,0xee = vsub.f32 s0, s1, s0 0xa0,0x0b,0xc1,0xee = vdiv.f64 d16, d17, d16 0x80,0x0a,0x80,0xee = vdiv.f32 s0, s1, s0 0xa3,0x2a,0xc2,0xee = vdiv.f32 s5, s5, s7 0x07,0x5b,0x85,0xee = vdiv.f64 d5, d5, d7 0xa0,0x0b,0x61,0xee = vmul.f64 d16, d17, d16 0xa1,0x4b,0x64,0xee = vmul.f64 d20, d20, d17 0x80,0x0a,0x20,0xee = vmul.f32 s0, s1, s0 0xaa,0x5a,0x65,0xee = vmul.f32 s11, s11, s21 0xe0,0x0b,0x61,0xee = vnmul.f64 d16, d17, d16 0xc0,0x0a,0x20,0xee = vnmul.f32 s0, s1, s0 0xe0,0x1b,0xf4,0xee = vcmpe.f64 d17, d16 0xc0,0x0a,0xf4,0xee = vcmpe.f32 s1, s0 0xc0,0x0b,0xf5,0xee = vcmpe.f64 d16, #0 0xc0,0x0a,0xb5,0xee = vcmpe.f32 s0, #0 0xe0,0x0b,0xf0,0xee = vabs.f64 d16, d16 0xc0,0x0a,0xb0,0xee = vabs.f32 s0, s0 0xe0,0x0b,0xb7,0xee = vcvt.f32.f64 s0, d16 0xc0,0x0a,0xf7,0xee = vcvt.f64.f32 d16, s0 0x60,0x0b,0xf1,0xee = vneg.f64 d16, d16 0x40,0x0a,0xb1,0xee = vneg.f32 s0, s0 0xe0,0x0b,0xf1,0xee = vsqrt.f64 d16, d16 0xc0,0x0a,0xb1,0xee = vsqrt.f32 s0, s0 0xc0,0x0b,0xf8,0xee = vcvt.f64.s32 d16, s0 0xc0,0x0a,0xb8,0xee = vcvt.f32.s32 s0, s0 0x40,0x0b,0xf8,0xee = vcvt.f64.u32 d16, s0 0x40,0x0a,0xb8,0xee = vcvt.f32.u32 s0, s0 0xe0,0x0b,0xbd,0xee = vcvt.s32.f64 s0, d16 0xc0,0x0a,0xbd,0xee = vcvt.s32.f32 s0, s0 0xe0,0x0b,0xbc,0xee = vcvt.u32.f64 s0, d16 0xc0,0x0a,0xbc,0xee = vcvt.u32.f32 s0, s0 0xa1,0x0b,0x42,0xee = vmla.f64 d16, d18, d17 0x00,0x0a,0x41,0xee = vmla.f32 s1, s2, s0 0xe1,0x0b,0x42,0xee = vmls.f64 d16, d18, d17 0x40,0x0a,0x41,0xee = vmls.f32 s1, s2, s0 0xe1,0x0b,0x52,0xee = vnmla.f64 d16, d18, d17 0x40,0x0a,0x51,0xee = vnmla.f32 s1, s2, s0 0xa1,0x0b,0x52,0xee = vnmls.f64 d16, d18, d17 0x00,0x0a,0x51,0xee = vnmls.f32 s1, s2, s0 0x10,0xfa,0xf1,0xee = vmrs APSR_nzcv, fpscr 0x10,0xfa,0xf1,0xee = vmrs APSR_nzcv, fpscr 0x10,0xfa,0xf1,0xee = vmrs APSR_nzcv, fpscr 0x10,0x2a,0xf0,0xee = vmrs r2, fpsid 0x10,0x3a,0xf0,0xee = vmrs r3, fpsid 0x10,0x4a,0xf7,0xee = vmrs r4, mvfr0 0x10,0x5a,0xf6,0xee = vmrs r5, mvfr1 0x60,0x0b,0xf1,0x1e = vnegne.f64 d16, d16 0x10,0x0a,0x00,0x1e = vmovne s0, r0 0x10,0x1a,0x00,0x0e = vmoveq s0, r1 0x10,0x1a,0x11,0xee = vmov r1, s2 0x10,0x3a,0x02,0xee = vmov s4, r3 0x12,0x1b,0x55,0xec = vmov r1, r5, d2 0x14,0x3b,0x49,0xec = vmov d4, r3, r9 0x10,0x0a,0xf1,0xee = vmrs r0, fpscr 0x10,0x0a,0xf8,0xee = vmrs r0, fpexc 0x10,0x0a,0xf0,0xee = vmrs r0, fpsid 0x10,0x1a,0xf9,0xee = vmrs r1, fpinst 0x10,0x8a,0xfa,0xee = vmrs r8, fpinst2 0x10,0x0a,0xe1,0xee = vmsr fpscr, r0 0x10,0x0a,0xe8,0xee = vmsr fpexc, r0 0x10,0x0a,0xe0,0xee = vmsr fpsid, r0 0x10,0x3a,0xe9,0xee = vmsr fpinst, r3 0x10,0x4a,0xea,0xee = vmsr fpinst2, r4 0x08,0x0b,0xf0,0xee = vmov.f64 d16, #3.000000e+00 0x08,0x0a,0xb0,0xee = vmov.f32 s0, #3.000000e+00 0x08,0x0b,0xf8,0xee = vmov.f64 d16, #-3.000000e+00 0x08,0x0a,0xb8,0xee = vmov.f32 s0, #-3.000000e+00 0x10,0x0a,0x00,0xee = vmov s0, r0 0x90,0x1a,0x00,0xee = vmov s1, r1 0x10,0x2a,0x01,0xee = vmov s2, r2 0x90,0x3a,0x01,0xee = vmov s3, r3 0x10,0x0a,0x10,0xee = vmov r0, s0 0x90,0x1a,0x10,0xee = vmov r1, s1 0x10,0x2a,0x11,0xee = vmov r2, s2 0x90,0x3a,0x11,0xee = vmov r3, s3 0x30,0x0b,0x51,0xec = vmov r0, r1, d16 0x31,0x1a,0x42,0xec = vmov s3, s4, r1, r2 0x11,0x1a,0x42,0xec = vmov s2, s3, r1, r2 0x31,0x1a,0x52,0xec = vmov r1, r2, s3, s4 0x11,0x1a,0x52,0xec = vmov r1, r2, s2, s3 0x1f,0x1b,0x42,0xec = vmov d15, r1, r2 0x30,0x1b,0x42,0xec = vmov d16, r1, r2 0x1f,0x1b,0x52,0xec = vmov r1, r2, d15 0x30,0x1b,0x52,0xec = vmov r1, r2, d16 0x00,0x1b,0xd0,0xed = vldr d17, [r0] 0x00,0x0a,0x9e,0xed = vldr s0, [lr] 0x00,0x0b,0x9e,0xed = vldr d0, [lr] 0x08,0x1b,0x92,0xed = vldr d1, [r2, #32] 0x08,0x1b,0x12,0xed = vldr d1, [r2, #-32] 0x00,0x2b,0x93,0xed = vldr d2, [r3] 0x00,0x3b,0x9f,0xed = vldr d3, [pc] 0x00,0x3b,0x9f,0xed = vldr d3, [pc] 0x00,0x3b,0x1f,0xed = vldr d3, [pc, #-0] 0x00,0x6a,0xd0,0xed = vldr s13, [r0] 0x08,0x0a,0xd2,0xed = vldr s1, [r2, #32] 0x08,0x0a,0x52,0xed = vldr s1, [r2, #-32] 0x00,0x1a,0x93,0xed = vldr s2, [r3] 0x00,0x2a,0xdf,0xed = vldr s5, [pc] 0x00,0x2a,0xdf,0xed = vldr s5, [pc] 0x00,0x2a,0x5f,0xed = vldr s5, [pc, #-0] 0x00,0x4b,0x81,0xed = vstr d4, [r1] 0x06,0x4b,0x81,0xed = vstr d4, [r1, #24] 0x06,0x4b,0x01,0xed = vstr d4, [r1, #-24] 0x00,0x0a,0x8e,0xed = vstr s0, [lr] 0x00,0x0b,0x8e,0xed = vstr d0, [lr] 0x00,0x2a,0x81,0xed = vstr s4, [r1] 0x06,0x2a,0x81,0xed = vstr s4, [r1, #24] 0x06,0x2a,0x01,0xed = vstr s4, [r1, #-24] 0x0c,0x2b,0x91,0xec = vldmia r1, {d2, d3, d4, d5, d6, d7} 0x06,0x1a,0x91,0xec = vldmia r1, {s2, s3, s4, s5, s6, s7} 0x0c,0x2b,0x81,0xec = vstmia r1, {d2, d3, d4, d5, d6, d7} 0x06,0x1a,0x81,0xec = vstmia r1, {s2, s3, s4, s5, s6, s7} 0x10,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12, d13, d14, d15} 0x07,0x0b,0xb5,0xec = fldmiax r5!, {d0, d1, d2} 0x05,0x4b,0x90,0x0c = fldmiaxeq r0, {d4, d5} 0x07,0x4b,0x35,0x1d = fldmdbxne r5!, {d4, d5, d6} 0x11,0x0b,0xa5,0xec = fstmiax r5!, {d0, d1, d2, d3, d4, d5, d6, d7} 0x05,0x8b,0x84,0x0c = fstmiaxeq r4, {d8, d9} 0x07,0x2b,0x27,0x1d = fstmdbxne r7!, {d2, d3, d4} 0x40,0x0b,0xbd,0xee = vcvtr.s32.f64 s0, d0 0x60,0x0a,0xbd,0xee = vcvtr.s32.f32 s0, s1 0x40,0x0b,0xbc,0xee = vcvtr.u32.f64 s0, d0 0x60,0x0a,0xbc,0xee = vcvtr.u32.f32 s0, s1 0x90,0x8a,0x00,0xee = vmov s1, r8 0x10,0x4a,0x01,0xee = vmov s2, r4 0x90,0x6a,0x01,0xee = vmov s3, r6 0x10,0x1a,0x02,0xee = vmov s4, r1 0x90,0x2a,0x02,0xee = vmov s5, r2 0x10,0x3a,0x03,0xee = vmov s6, r3 0x10,0x1a,0x14,0xee = vmov r1, s8 0x10,0x2a,0x12,0xee = vmov r2, s4 0x10,0x3a,0x13,0xee = vmov r3, s6 0x90,0x4a,0x10,0xee = vmov r4, s1 0x10,0x5a,0x11,0xee = vmov r5, s2 0x90,0x6a,0x11,0xee = vmov r6, s3 0xc6,0x0a,0xbb,0xee = vcvt.f32.u32 s0, s0, #20 0xc0,0x0b,0xba,0xee = vcvt.f64.s32 d0, d0, #32 0x67,0x0a,0xbb,0xee = vcvt.f32.u16 s0, s0, #1 0x40,0x0b,0xba,0xee = vcvt.f64.s16 d0, d0, #16 0xc6,0x0a,0xfa,0xee = vcvt.f32.s32 s1, s1, #20 0xc0,0x4b,0xfb,0xee = vcvt.f64.u32 d20, d20, #32 0x67,0x8a,0xfa,0xee = vcvt.f32.s16 s17, s17, #1 0x40,0x7b,0xfb,0xee = vcvt.f64.u16 d23, d23, #16 0xc6,0x6a,0xbf,0xee = vcvt.u32.f32 s12, s12, #20 0xc0,0x2b,0xbe,0xee = vcvt.s32.f64 d2, d2, #32 0x67,0xea,0xbf,0xee = vcvt.u16.f32 s28, s28, #1 0x40,0xfb,0xbe,0xee = vcvt.s16.f64 d15, d15, #16 0xc6,0x0a,0xfe,0xee = vcvt.s32.f32 s1, s1, #20 0xc0,0x4b,0xff,0xee = vcvt.u32.f64 d20, d20, #32 0x67,0x8a,0xfe,0xee = vcvt.s16.f32 s17, s17, #1 0x40,0x7b,0xff,0xee = vcvt.u16.f64 d23, d23, #16 0x10,0x40,0x80,0xf2 = vmov.i32 d4, #0x0 0x12,0x46,0x84,0xf2 = vmov.i32 d4, #0x42000000 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb-fp-armv8.s.cs010066400017500001750000000042531363402546700217120ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None 0xb2,0xee,0xe0,0x3b = vcvtt.f64.f16 d3, s1 0xf3,0xee,0xcc,0x2b = vcvtt.f16.f64 s5, d12 0xb2,0xee,0x60,0x3b = vcvtb.f64.f16 d3, s1 0xb3,0xee,0x41,0x2b = vcvtb.f16.f64 s4, d1 0xb2,0xee,0xe0,0x3b = vcvttge.f64.f16 d3, s1 0xf3,0xee,0xcc,0x2b = vcvttgt.f16.f64 s5, d12 0xb2,0xee,0x60,0x3b = vcvtbeq.f64.f16 d3, s1 0xb3,0xee,0x41,0x2b = vcvtblt.f16.f64 s4, d1 0xbc,0xfe,0xe1,0x1a = vcvta.s32.f32 s2, s3 0xbc,0xfe,0xc3,0x1b = vcvta.s32.f64 s2, d3 0xbd,0xfe,0xeb,0x3a = vcvtn.s32.f32 s6, s23 0xbd,0xfe,0xe7,0x3b = vcvtn.s32.f64 s6, d23 0xbe,0xfe,0xc2,0x0a = vcvtp.s32.f32 s0, s4 0xbe,0xfe,0xc4,0x0b = vcvtp.s32.f64 s0, d4 0xff,0xfe,0xc4,0x8a = vcvtm.s32.f32 s17, s8 0xff,0xfe,0xc8,0x8b = vcvtm.s32.f64 s17, d8 0xbc,0xfe,0x61,0x1a = vcvta.u32.f32 s2, s3 0xbc,0xfe,0x43,0x1b = vcvta.u32.f64 s2, d3 0xbd,0xfe,0x6b,0x3a = vcvtn.u32.f32 s6, s23 0xbd,0xfe,0x67,0x3b = vcvtn.u32.f64 s6, d23 0xbe,0xfe,0x42,0x0a = vcvtp.u32.f32 s0, s4 0xbe,0xfe,0x44,0x0b = vcvtp.u32.f64 s0, d4 0xff,0xfe,0x44,0x8a = vcvtm.u32.f32 s17, s8 0xff,0xfe,0x48,0x8b = vcvtm.u32.f64 s17, d8 0x20,0xfe,0xab,0x2a = vselge.f32 s4, s1, s23 0x6f,0xfe,0xa7,0xeb = vselge.f64 d30, d31, d23 0x30,0xfe,0x80,0x0a = vselgt.f32 s0, s1, s0 0x3a,0xfe,0x24,0x5b = vselgt.f64 d5, d10, d20 0x0e,0xfe,0x2b,0xfa = vseleq.f32 s30, s28, s23 0x04,0xfe,0x08,0x2b = vseleq.f64 d2, d4, d8 0x58,0xfe,0x07,0xaa = vselvs.f32 s21, s16, s14 0x11,0xfe,0x2f,0x0b = vselvs.f64 d0, d1, d31 0xc6,0xfe,0x00,0x2a = vmaxnm.f32 s5, s12, s0 0x86,0xfe,0xae,0x5b = vmaxnm.f64 d5, d22, d30 0x80,0xfe,0x46,0x0a = vminnm.f32 s0, s0, s12 0x86,0xfe,0x49,0x4b = vminnm.f64 d4, d6, d9 0xb6,0xee,0xcc,0x3b = vrintzge.f64 d3, d12 0xf6,0xee,0xcc,0x1a = vrintz.f32 s3, s24 0xb6,0xee,0x40,0x5b = vrintrlt.f64 d5, d0 0xb6,0xee,0x64,0x0a = vrintr.f32 s0, s9 0xf7,0xee,0x6e,0xcb = vrintxeq.f64 d28, d30 0xb7,0xee,0x47,0x5a = vrintxvs.f32 s10, s14 0xb8,0xfe,0x44,0x3b = vrinta.f64 d3, d4 0xb8,0xfe,0x60,0x6a = vrinta.f32 s12, s1 0xb9,0xfe,0x44,0x3b = vrintn.f64 d3, d4 0xb9,0xfe,0x60,0x6a = vrintn.f32 s12, s1 0xba,0xfe,0x44,0x3b = vrintp.f64 d3, d4 0xba,0xfe,0x60,0x6a = vrintp.f32 s12, s1 0xbb,0xfe,0x44,0x3b = vrintm.f64 d3, d4 0xbb,0xfe,0x60,0x6a = vrintm.f32 s12, s1 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb-hints.s.cs010066400017500001750000000004441363402546700213750ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x00,0xbf = nop 0x10,0xbf = yield 0x20,0xbf = wfe 0x30,0xbf = wfi 0x40,0xbf = sev 0xbf,0xf3,0x5f,0x8f = dmb sy 0xbf,0xf3,0x5f,0x8f = dmb sy 0xbf,0xf3,0x4f,0x8f = dsb sy 0xbf,0xf3,0x4f,0x8f = dsb sy 0xbf,0xf3,0x6f,0x8f = isb sy 0xbf,0xf3,0x6f,0x8f = isb sy capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb-neon-crypto.s.cs010066400017500001750000000012271363402546700225250ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None 0xb0,0xff,0x42,0x03 = aesd.8 q0, q1 0xb0,0xff,0x02,0x03 = aese.8 q0, q1 0xb0,0xff,0xc2,0x03 = aesimc.8 q0, q1 0xb0,0xff,0x82,0x03 = aesmc.8 q0, q1 0xb9,0xff,0xc2,0x02 = sha1h.32 q0, q1 0xba,0xff,0x82,0x03 = sha1su1.32 q0, q1 0xba,0xff,0xc2,0x03 = sha256su0.32 q0, q1 0x02,0xef,0x44,0x0c = sha1c.32 q0, q1, q2 0x22,0xef,0x44,0x0c = sha1m.32 q0, q1, q2 0x12,0xef,0x44,0x0c = sha1p.32 q0, q1, q2 0x32,0xef,0x44,0x0c = sha1su0.32 q0, q1, q2 0x02,0xff,0x44,0x0c = sha256h.32 q0, q1, q2 0x12,0xff,0x44,0x0c = sha256h2.32 q0, q1, q2 0x22,0xff,0x44,0x0c = sha256su1.32 q0, q1, q2 0xe0,0xef,0xa1,0x0e = vmull.p64 q8, d16, d17 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb-neon-v8.s.cs010066400017500001750000000031121363402546700215350ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None 0x05,0xff,0x11,0x4f = vmaxnm.f32 d4, d5, d1 0x08,0xff,0x5c,0x4f = vmaxnm.f32 q2, q4, q6 0x24,0xff,0x3e,0x5f = vminnm.f32 d5, d4, d30 0x2a,0xff,0xd4,0x0f = vminnm.f32 q0, q13, q2 0xbb,0xff,0x06,0x40 = vcvta.s32.f32 d4, d6 0xbb,0xff,0x8a,0xc0 = vcvta.u32.f32 d12, d10 0xbb,0xff,0x4c,0x80 = vcvta.s32.f32 q4, q6 0xbb,0xff,0xe4,0x80 = vcvta.u32.f32 q4, q10 0xbb,0xff,0x2e,0x13 = vcvtm.s32.f32 d1, d30 0xbb,0xff,0x8a,0xc3 = vcvtm.u32.f32 d12, d10 0xbb,0xff,0x64,0x23 = vcvtm.s32.f32 q1, q10 0xfb,0xff,0xc2,0xa3 = vcvtm.u32.f32 q13, q1 0xbb,0xff,0x21,0xf1 = vcvtn.s32.f32 d15, d17 0xbb,0xff,0x83,0x51 = vcvtn.u32.f32 d5, d3 0xbb,0xff,0x60,0x61 = vcvtn.s32.f32 q3, q8 0xbb,0xff,0xc6,0xa1 = vcvtn.u32.f32 q5, q3 0xbb,0xff,0x25,0xb2 = vcvtp.s32.f32 d11, d21 0xbb,0xff,0xa7,0xe2 = vcvtp.u32.f32 d14, d23 0xbb,0xff,0x6e,0x82 = vcvtp.s32.f32 q4, q15 0xfb,0xff,0xe0,0x22 = vcvtp.u32.f32 q9, q8 0xba,0xff,0x00,0x34 = vrintn.f32 d3, d0 0xba,0xff,0x48,0x24 = vrintn.f32 q1, q4 0xba,0xff,0x8c,0x54 = vrintx.f32 d5, d12 0xba,0xff,0xc6,0x04 = vrintx.f32 q0, q3 0xba,0xff,0x00,0x35 = vrinta.f32 d3, d0 0xfa,0xff,0x44,0x05 = vrinta.f32 q8, q2 0xba,0xff,0xa2,0xc5 = vrintz.f32 d12, d18 0xfa,0xff,0xc8,0x25 = vrintz.f32 q9, q4 0xba,0xff,0x80,0x36 = vrintm.f32 d3, d0 0xba,0xff,0xc8,0x26 = vrintm.f32 q1, q4 0xba,0xff,0x80,0x37 = vrintp.f32 d3, d0 0xba,0xff,0xc8,0x27 = vrintp.f32 q1, q4 0xba,0xff,0x00,0x34 = vrintn.f32 d3, d0 0xba,0xff,0xc6,0x04 = vrintx.f32 q0, q3 0xba,0xff,0x00,0x35 = vrinta.f32 d3, d0 0xfa,0xff,0xc8,0x25 = vrintz.f32 q9, q4 0xba,0xff,0xc8,0x27 = vrintp.f32 q1, q4 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb-shift-encoding.s.cs010066400017500001750000000015331363402546700231510ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x6e,0xeb,0x00,0x0c = sbc.w r12, lr, r0 0x68,0xeb,0x19,0x01 = sbc.w r1, r8, r9, lsr #32 0x67,0xeb,0x1f,0x42 = sbc.w r2, r7, pc, lsr #16 0x66,0xeb,0x0a,0x03 = sbc.w r3, r6, r10 0x65,0xeb,0x0e,0x44 = sbc.w r4, r5, lr, lsl #16 0x64,0xeb,0x2b,0x05 = sbc.w r5, r4, r11, asr #32 0x63,0xeb,0x2d,0x46 = sbc.w r6, r3, sp, asr #16 0x62,0xeb,0x3c,0x07 = sbc.w r7, r2, r12, rrx 0x61,0xeb,0x30,0x48 = sbc.w r8, r1, r0, ror #16 0x0e,0xea,0x00,0x0c = and.w r12, lr, r0 0x08,0xea,0x19,0x01 = and.w r1, r8, r9, lsr #32 0x07,0xea,0x1f,0x42 = and.w r2, r7, pc, lsr #16 0x06,0xea,0x0a,0x03 = and.w r3, r6, r10 0x05,0xea,0x0e,0x44 = and.w r4, r5, lr, lsl #16 0x04,0xea,0x2b,0x05 = and.w r5, r4, r11, asr #32 0x03,0xea,0x2d,0x46 = and.w r6, r3, sp, asr #16 0x02,0xea,0x3c,0x07 = and.w r7, r2, r12, rrx 0x01,0xea,0x30,0x48 = and.w r8, r1, r0, ror #16 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb.s.cs010066400017500001750000000007011363402546700202460ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x91,0x42 = cmp r1, r2 0x16,0xbc = pop {r1, r2, r4} 0xfe,0xde = trap 0xc8,0x47 = blx r9 0xd0,0x47 = blx r10 0x1a,0xba = rev r2, r3 0x63,0xba = rev16 r3, r4 0xf5,0xba = revsh r5, r6 0x5a,0xb2 = sxtb r2, r3 0x1a,0xb2 = sxth r2, r3 0x2c,0x42 = tst r4, r5 0xf3,0xb2 = uxtb r3, r6 0xb3,0xb2 = uxth r3, r6 0x8b,0x58 = ldr r3, [r1, r2] 0x02,0xbe = bkpt #2 0xc0,0x46 = mov r8, r8 0x67,0xb6 = cpsie aif 0x78,0x46 = mov r0, pc capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb2-b.w-encodingT4.s.cs010066400017500001750000000001011363402546700230020ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x36,0xf0,0x06,0xbc = b.w #223244 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb2-branches.s.cs010066400017500001750000000044351363402546700221230ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x00,0xe4 = b #-2048 0xff,0xe3 = b #2046 0xff,0xf7,0x00,0xbc = b.w #-2048 0x00,0xf0,0xff,0xbb = b.w #2046 0x66,0xf6,0x30,0xbc = b.w #-1677216 0x99,0xf1,0xcf,0xbb = b.w #1677214 0x00,0xe4 = b #-2048 0xff,0xe3 = b #2046 0xff,0xf7,0xff,0xbb = b.w #-2050 0x00,0xf0,0x00,0xbc = b.w #2048 0x66,0xf6,0x30,0xbc = b.w #-1677216 0x99,0xf1,0xcf,0xbb = b.w #1677214 0x08,0xbf = it eq 0x00,0xe4 = beq #-2048 0x18,0xbf = it ne 0x01,0xe4 = bne #-2046 0xc8,0xbf = it gt 0xff,0xf7,0x00,0xbc = bgt.w #-2048 0xd8,0xbf = it le 0x00,0xf0,0xff,0xbb = ble.w #2046 0xa8,0xbf = it ge 0x66,0xf6,0x30,0xbc = bge.w #-1677216 0xb8,0xbf = it lt 0x99,0xf1,0xcf,0xbb = blt.w #1677214 0x80,0xd0 = beq #-256 0x7f,0xd1 = bne #254 0x3f,0xf5,0x80,0xaf = bmi.w #-256 0x40,0xf0,0x7f,0x80 = bne.w #254 0xc0,0xf6,0x00,0x80 = blt.w #-1048576 0xbf,0xf2,0xff,0xaf = bge.w #1048574 0x80,0xd1 = bne #-256 0x7f,0xdc = bgt #254 0x7f,0xf4,0x7f,0xaf = bne.w #-258 0x00,0xf3,0x80,0x80 = bgt.w #256 0x40,0xf4,0x00,0x80 = bne.w #-1048576 0x3f,0xf3,0xff,0xaf = bgt.w #1048574 0x08,0xbf = it eq 0x08,0x44 = addeq r0, r1 0x40,0xd1 = bne #128 0x0c,0xbf = ite eq 0x08,0x44 = addeq r0, r1 0x40,0xe0 = bne #128 0x00,0xe4 = b #-2048 0xff,0xe3 = b #2046 0xff,0xf7,0x00,0xbc = b.w #-2048 0x00,0xf0,0xff,0xbb = b.w #2046 0x66,0xf6,0x30,0xbc = b.w #-1677216 0x99,0xf1,0xcf,0xbb = b.w #1677214 0x00,0xe4 = b #-2048 0xff,0xe3 = b #2046 0xff,0xf7,0xff,0xbb = b.w #-2050 0x00,0xf0,0x00,0xbc = b.w #2048 0x66,0xf6,0x30,0xbc = b.w #-1677216 0x99,0xf1,0xcf,0xbb = b.w #1677214 0x08,0xbf = it eq 0x00,0xe4 = beq #-2048 0x18,0xbf = it ne 0x01,0xe4 = bne #-2046 0xc8,0xbf = it gt 0xff,0xf7,0x00,0xbc = bgt.w #-2048 0xd8,0xbf = it le 0x00,0xf0,0xff,0xbb = ble.w #2046 0xa8,0xbf = it ge 0x66,0xf6,0x30,0xbc = bge.w #-1677216 0xb8,0xbf = it lt 0x99,0xf1,0xcf,0xbb = blt.w #1677214 0x80,0xd0 = beq #-256 0x7f,0xd1 = bne #254 0x3f,0xf5,0x80,0xaf = bmi.w #-256 0x40,0xf0,0x7f,0x80 = bne.w #254 0xc0,0xf6,0x00,0x80 = blt.w #-1048576 0xbf,0xf2,0xff,0xaf = bge.w #1048574 0x80,0xd1 = bne #-256 0x7f,0xdc = bgt #254 0x7f,0xf4,0x7f,0xaf = bne.w #-258 0x00,0xf3,0x80,0x80 = bgt.w #256 0x40,0xf4,0x00,0x80 = bne.w #-1048576 0x3f,0xf3,0xff,0xaf = bgt.w #1048574 0x08,0xbf = it eq 0x08,0x44 = addeq r0, r1 0x40,0xd1 = bne #128 0x0c,0xbf = ite eq 0x08,0x44 = addeq r0, r1 0x40,0xe0 = bne #128 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb2-mclass.s.cs010066400017500001750000000030001363402546700216030ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_MCLASS, None 0xef,0xf3,0x00,0x80 = mrs r0, apsr 0xef,0xf3,0x01,0x80 = mrs r0, iapsr 0xef,0xf3,0x02,0x80 = mrs r0, eapsr 0xef,0xf3,0x03,0x80 = mrs r0, xpsr 0xef,0xf3,0x05,0x80 = mrs r0, ipsr 0xef,0xf3,0x06,0x80 = mrs r0, epsr 0xef,0xf3,0x07,0x80 = mrs r0, iepsr 0xef,0xf3,0x08,0x80 = mrs r0, msp 0xef,0xf3,0x09,0x80 = mrs r0, psp 0xef,0xf3,0x10,0x80 = mrs r0, primask 0xef,0xf3,0x11,0x80 = mrs r0, basepri 0xef,0xf3,0x12,0x80 = mrs r0, basepri_max 0xef,0xf3,0x13,0x80 = mrs r0, faultmask 0xef,0xf3,0x14,0x80 = mrs r0, control 0x80,0xf3,0x00,0x88 = msr apsr, r0 0x80,0xf3,0x00,0x88 = msr apsr, r0 0x80,0xf3,0x00,0x84 = msr apsr_g, r0 0x80,0xf3,0x00,0x8c = msr apsr_nzcvqg, r0 0x80,0xf3,0x01,0x88 = msr iapsr, r0 0x80,0xf3,0x01,0x88 = msr iapsr, r0 0x80,0xf3,0x01,0x84 = msr iapsr_g, r0 0x80,0xf3,0x01,0x8c = msr iapsr_nzcvqg, r0 0x80,0xf3,0x02,0x88 = msr eapsr, r0 0x80,0xf3,0x02,0x88 = msr eapsr, r0 0x80,0xf3,0x02,0x84 = msr eapsr_g, r0 0x80,0xf3,0x02,0x8c = msr eapsr_nzcvqg, r0 0x80,0xf3,0x03,0x88 = msr xpsr, r0 0x80,0xf3,0x03,0x88 = msr xpsr, r0 0x80,0xf3,0x03,0x84 = msr xpsr_g, r0 0x80,0xf3,0x03,0x8c = msr xpsr_nzcvqg, r0 0x80,0xf3,0x05,0x88 = msr ipsr, r0 0x80,0xf3,0x06,0x88 = msr epsr, r0 0x80,0xf3,0x07,0x88 = msr iepsr, r0 0x80,0xf3,0x08,0x88 = msr msp, r0 0x80,0xf3,0x09,0x88 = msr psp, r0 0x80,0xf3,0x10,0x88 = msr primask, r0 0x80,0xf3,0x11,0x88 = msr basepri, r0 0x80,0xf3,0x12,0x88 = msr basepri_max, r0 0x80,0xf3,0x13,0x88 = msr faultmask, r0 0x80,0xf3,0x14,0x88 = msr control, r0 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb2-narrow-dp.ll.cs010066400017500001750000000270311363402546700224110ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x12,0xea,0x01,0x00 = ands.w r0, r2, r1 0x0a,0x40 = ands r2, r1 0x0a,0x40 = ands r2, r1 0x10,0xea,0x01,0x00 = ands.w r0, r0, r1 0x11,0xea,0x03,0x03 = ands.w r3, r1, r3 0x01,0xea,0x00,0x00 = and.w r0, r1, r0 0x0f,0x40 = ands r7, r1 0x0f,0x40 = ands r7, r1 0x11,0xea,0x08,0x08 = ands.w r8, r1, r8 0x18,0xea,0x01,0x08 = ands.w r8, r8, r1 0x18,0xea,0x00,0x00 = ands.w r0, r8, r0 0x11,0xea,0x08,0x01 = ands.w r1, r1, r8 0x12,0xea,0x41,0x02 = ands.w r2, r2, r1, lsl #1 0x11,0xea,0x50,0x00 = ands.w r0, r1, r0, lsr #1 0x08,0xbf = it eq 0x02,0xea,0x01,0x00 = andeq.w r0, r2, r1 0x08,0xbf = it eq 0x0b,0x40 = andeq r3, r1 0x08,0xbf = it eq 0x0b,0x40 = andeq r3, r1 0x08,0xbf = it eq 0x00,0xea,0x01,0x00 = andeq.w r0, r0, r1 0x08,0xbf = it eq 0x01,0xea,0x02,0x02 = andeq.w r2, r1, r2 0x08,0xbf = it eq 0x11,0xea,0x00,0x00 = andseq.w r0, r1, r0 0x08,0xbf = it eq 0x0f,0x40 = andeq r7, r1 0x08,0xbf = it eq 0x0f,0x40 = andeq r7, r1 0x08,0xbf = it eq 0x01,0xea,0x08,0x08 = andeq.w r8, r1, r8 0x08,0xbf = it eq 0x08,0xea,0x01,0x08 = andeq.w r8, r8, r1 0x08,0xbf = it eq 0x08,0xea,0x04,0x04 = andeq.w r4, r8, r4 0x08,0xbf = it eq 0x04,0xea,0x08,0x04 = andeq.w r4, r4, r8 0x08,0xbf = it eq 0x00,0xea,0x41,0x00 = andeq.w r0, r0, r1, lsl #1 0x08,0xbf = it eq 0x01,0xea,0x55,0x05 = andeq.w r5, r1, r5, lsr #1 0x92,0xea,0x01,0x00 = eors.w r0, r2, r1 0x4d,0x40 = eors r5, r1 0x4d,0x40 = eors r5, r1 0x90,0xea,0x01,0x00 = eors.w r0, r0, r1 0x91,0xea,0x02,0x02 = eors.w r2, r1, r2 0x81,0xea,0x01,0x01 = eor.w r1, r1, r1 0x4f,0x40 = eors r7, r1 0x4f,0x40 = eors r7, r1 0x91,0xea,0x08,0x08 = eors.w r8, r1, r8 0x98,0xea,0x01,0x08 = eors.w r8, r8, r1 0x98,0xea,0x06,0x06 = eors.w r6, r8, r6 0x90,0xea,0x08,0x00 = eors.w r0, r0, r8 0x92,0xea,0x41,0x02 = eors.w r2, r2, r1, lsl #1 0x91,0xea,0x50,0x00 = eors.w r0, r1, r0, lsr #1 0x08,0xbf = it eq 0x82,0xea,0x01,0x03 = eoreq.w r3, r2, r1 0x08,0xbf = it eq 0x48,0x40 = eoreq r0, r1 0x08,0xbf = it eq 0x4a,0x40 = eoreq r2, r1 0x08,0xbf = it eq 0x83,0xea,0x01,0x03 = eoreq.w r3, r3, r1 0x08,0xbf = it eq 0x81,0xea,0x00,0x00 = eoreq.w r0, r1, r0 0x08,0xbf = it eq 0x91,0xea,0x01,0x01 = eorseq.w r1, r1, r1 0x08,0xbf = it eq 0x4f,0x40 = eoreq r7, r1 0x08,0xbf = it eq 0x4f,0x40 = eoreq r7, r1 0x08,0xbf = it eq 0x81,0xea,0x08,0x08 = eoreq.w r8, r1, r8 0x08,0xbf = it eq 0x88,0xea,0x01,0x08 = eoreq.w r8, r8, r1 0x08,0xbf = it eq 0x88,0xea,0x00,0x00 = eoreq.w r0, r8, r0 0x08,0xbf = it eq 0x83,0xea,0x08,0x03 = eoreq.w r3, r3, r8 0x08,0xbf = it eq 0x84,0xea,0x41,0x04 = eoreq.w r4, r4, r1, lsl #1 0x08,0xbf = it eq 0x81,0xea,0x50,0x00 = eoreq.w r0, r1, r0, lsr #1 0x12,0xfa,0x01,0xf0 = lsls.w r0, r2, r1 0x8a,0x40 = lsls r2, r1 0x11,0xfa,0x02,0xf2 = lsls.w r2, r1, r2 0x10,0xfa,0x01,0xf0 = lsls.w r0, r0, r1 0x11,0xfa,0x04,0xf4 = lsls.w r4, r1, r4 0x01,0xfa,0x04,0xf4 = lsl.w r4, r1, r4 0x8f,0x40 = lsls r7, r1 0x11,0xfa,0x08,0xf8 = lsls.w r8, r1, r8 0x18,0xfa,0x01,0xf8 = lsls.w r8, r8, r1 0x18,0xfa,0x03,0xf3 = lsls.w r3, r8, r3 0x15,0xfa,0x08,0xf5 = lsls.w r5, r5, r8 0x08,0xbf = it eq 0x02,0xfa,0x01,0xf0 = lsleq.w r0, r2, r1 0x08,0xbf = it eq 0x8a,0x40 = lsleq r2, r1 0x08,0xbf = it eq 0x01,0xfa,0x02,0xf2 = lsleq.w r2, r1, r2 0x08,0xbf = it eq 0x00,0xfa,0x01,0xf0 = lsleq.w r0, r0, r1 0x08,0xbf = it eq 0x01,0xfa,0x03,0xf3 = lsleq.w r3, r1, r3 0x08,0xbf = it eq 0x11,0xfa,0x04,0xf4 = lslseq.w r4, r1, r4 0x08,0xbf = it eq 0x8f,0x40 = lsleq r7, r1 0x08,0xbf = it eq 0x01,0xfa,0x08,0xf8 = lsleq.w r8, r1, r8 0x08,0xbf = it eq 0x08,0xfa,0x01,0xf8 = lsleq.w r8, r8, r1 0x08,0xbf = it eq 0x08,0xfa,0x00,0xf0 = lsleq.w r0, r8, r0 0x08,0xbf = it eq 0x03,0xfa,0x08,0xf3 = lsleq.w r3, r3, r8 0x32,0xfa,0x01,0xf6 = lsrs.w r6, r2, r1 0xca,0x40 = lsrs r2, r1 0x31,0xfa,0x02,0xf2 = lsrs.w r2, r1, r2 0x32,0xfa,0x01,0xf2 = lsrs.w r2, r2, r1 0x31,0xfa,0x03,0xf3 = lsrs.w r3, r1, r3 0x21,0xfa,0x04,0xf4 = lsr.w r4, r1, r4 0xcf,0x40 = lsrs r7, r1 0x31,0xfa,0x08,0xf8 = lsrs.w r8, r1, r8 0x38,0xfa,0x01,0xf8 = lsrs.w r8, r8, r1 0x38,0xfa,0x02,0xf2 = lsrs.w r2, r8, r2 0x35,0xfa,0x08,0xf5 = lsrs.w r5, r5, r8 0x08,0xbf = it eq 0x22,0xfa,0x01,0xf6 = lsreq.w r6, r2, r1 0x08,0xbf = it eq 0xcf,0x40 = lsreq r7, r1 0x08,0xbf = it eq 0x21,0xfa,0x07,0xf7 = lsreq.w r7, r1, r7 0x08,0xbf = it eq 0x27,0xfa,0x01,0xf7 = lsreq.w r7, r7, r1 0x08,0xbf = it eq 0x21,0xfa,0x02,0xf2 = lsreq.w r2, r1, r2 0x08,0xbf = it eq 0x31,0xfa,0x00,0xf0 = lsrseq.w r0, r1, r0 0x08,0xbf = it eq 0xcf,0x40 = lsreq r7, r1 0x08,0xbf = it eq 0x21,0xfa,0x08,0xf8 = lsreq.w r8, r1, r8 0x08,0xbf = it eq 0x28,0xfa,0x01,0xf8 = lsreq.w r8, r8, r1 0x08,0xbf = it eq 0x28,0xfa,0x01,0xf1 = lsreq.w r1, r8, r1 0x08,0xbf = it eq 0x24,0xfa,0x08,0xf4 = lsreq.w r4, r4, r8 0x56,0xfa,0x05,0xf7 = asrs.w r7, r6, r5 0x08,0x41 = asrs r0, r1 0x51,0xfa,0x00,0xf0 = asrs.w r0, r1, r0 0x53,0xfa,0x01,0xf3 = asrs.w r3, r3, r1 0x51,0xfa,0x01,0xf1 = asrs.w r1, r1, r1 0x41,0xfa,0x00,0xf0 = asr.w r0, r1, r0 0x0f,0x41 = asrs r7, r1 0x51,0xfa,0x08,0xf8 = asrs.w r8, r1, r8 0x58,0xfa,0x01,0xf8 = asrs.w r8, r8, r1 0x58,0xfa,0x05,0xf5 = asrs.w r5, r8, r5 0x55,0xfa,0x08,0xf5 = asrs.w r5, r5, r8 0x08,0xbf = it eq 0x42,0xfa,0x01,0xf0 = asreq.w r0, r2, r1 0x08,0xbf = it eq 0x0a,0x41 = asreq r2, r1 0x08,0xbf = it eq 0x42,0xfa,0x01,0xf1 = asreq.w r1, r2, r1 0x08,0xbf = it eq 0x44,0xfa,0x01,0xf4 = asreq.w r4, r4, r1 0x08,0xbf = it eq 0x41,0xfa,0x06,0xf6 = asreq.w r6, r1, r6 0x08,0xbf = it eq 0x51,0xfa,0x03,0xf3 = asrseq.w r3, r1, r3 0x08,0xbf = it eq 0x0f,0x41 = asreq r7, r1 0x08,0xbf = it eq 0x41,0xfa,0x08,0xf8 = asreq.w r8, r1, r8 0x08,0xbf = it eq 0x48,0xfa,0x01,0xf8 = asreq.w r8, r8, r1 0x08,0xbf = it eq 0x48,0xfa,0x01,0xf1 = asreq.w r1, r8, r1 0x08,0xbf = it eq 0x43,0xfa,0x08,0xf3 = asreq.w r3, r3, r8 0x52,0xeb,0x01,0x05 = adcs.w r5, r2, r1 0x4d,0x41 = adcs r5, r1 0x4b,0x41 = adcs r3, r1 0x52,0xeb,0x01,0x02 = adcs.w r2, r2, r1 0x51,0xeb,0x03,0x03 = adcs.w r3, r1, r3 0x41,0xeb,0x00,0x00 = adc.w r0, r1, r0 0x4f,0x41 = adcs r7, r1 0x4f,0x41 = adcs r7, r1 0x51,0xeb,0x08,0x08 = adcs.w r8, r1, r8 0x58,0xeb,0x01,0x08 = adcs.w r8, r8, r1 0x58,0xeb,0x05,0x05 = adcs.w r5, r8, r5 0x52,0xeb,0x08,0x02 = adcs.w r2, r2, r8 0x53,0xeb,0x41,0x03 = adcs.w r3, r3, r1, lsl #1 0x51,0xeb,0x54,0x04 = adcs.w r4, r1, r4, lsr #1 0x08,0xbf = it eq 0x42,0xeb,0x03,0x01 = adceq.w r1, r2, r3 0x08,0xbf = it eq 0x49,0x41 = adceq r1, r1 0x08,0xbf = it eq 0x4b,0x41 = adceq r3, r1 0x08,0xbf = it eq 0x43,0xeb,0x01,0x03 = adceq.w r3, r3, r1 0x08,0xbf = it eq 0x41,0xeb,0x00,0x00 = adceq.w r0, r1, r0 0x08,0xbf = it eq 0x51,0xeb,0x03,0x03 = adcseq.w r3, r1, r3 0x08,0xbf = it eq 0x4f,0x41 = adceq r7, r1 0x08,0xbf = it eq 0x4f,0x41 = adceq r7, r1 0x08,0xbf = it eq 0x41,0xeb,0x08,0x08 = adceq.w r8, r1, r8 0x08,0xbf = it eq 0x48,0xeb,0x01,0x08 = adceq.w r8, r8, r1 0x08,0xbf = it eq 0x48,0xeb,0x03,0x03 = adceq.w r3, r8, r3 0x08,0xbf = it eq 0x41,0xeb,0x08,0x01 = adceq.w r1, r1, r8 0x08,0xbf = it eq 0x42,0xeb,0x41,0x02 = adceq.w r2, r2, r1, lsl #1 0x08,0xbf = it eq 0x41,0xeb,0x51,0x01 = adceq.w r1, r1, r1, lsr #1 0x72,0xeb,0x01,0x03 = sbcs.w r3, r2, r1 0x8c,0x41 = sbcs r4, r1 0x74,0xeb,0x01,0x01 = sbcs.w r1, r4, r1 0x74,0xeb,0x01,0x04 = sbcs.w r4, r4, r1 0x71,0xeb,0x02,0x02 = sbcs.w r2, r1, r2 0x61,0xeb,0x00,0x00 = sbc.w r0, r1, r0 0x8f,0x41 = sbcs r7, r1 0x71,0xeb,0x08,0x08 = sbcs.w r8, r1, r8 0x78,0xeb,0x01,0x08 = sbcs.w r8, r8, r1 0x78,0xeb,0x04,0x04 = sbcs.w r4, r8, r4 0x73,0xeb,0x08,0x03 = sbcs.w r3, r3, r8 0x72,0xeb,0x41,0x02 = sbcs.w r2, r2, r1, lsl #1 0x71,0xeb,0x55,0x05 = sbcs.w r5, r1, r5, lsr #1 0x08,0xbf = it eq 0x62,0xeb,0x01,0x05 = sbceq.w r5, r2, r1 0x08,0xbf = it eq 0x8d,0x41 = sbceq r5, r1 0x08,0xbf = it eq 0x65,0xeb,0x01,0x01 = sbceq.w r1, r5, r1 0x08,0xbf = it eq 0x65,0xeb,0x01,0x05 = sbceq.w r5, r5, r1 0x08,0xbf = it eq 0x61,0xeb,0x00,0x00 = sbceq.w r0, r1, r0 0x08,0xbf = it eq 0x71,0xeb,0x02,0x02 = sbcseq.w r2, r1, r2 0x08,0xbf = it eq 0x8f,0x41 = sbceq r7, r1 0x08,0xbf = it eq 0x61,0xeb,0x08,0x08 = sbceq.w r8, r1, r8 0x08,0xbf = it eq 0x68,0xeb,0x01,0x08 = sbceq.w r8, r8, r1 0x08,0xbf = it eq 0x68,0xeb,0x07,0x07 = sbceq.w r7, r8, r7 0x08,0xbf = it eq 0x67,0xeb,0x08,0x07 = sbceq.w r7, r7, r8 0x08,0xbf = it eq 0x62,0xeb,0x41,0x02 = sbceq.w r2, r2, r1, lsl #1 0x08,0xbf = it eq 0x61,0xeb,0x55,0x05 = sbceq.w r5, r1, r5, lsr #1 0x72,0xfa,0x01,0xf3 = rors.w r3, r2, r1 0xc8,0x41 = rors r0, r1 0x70,0xfa,0x01,0xf1 = rors.w r1, r0, r1 0x72,0xfa,0x01,0xf2 = rors.w r2, r2, r1 0x71,0xfa,0x02,0xf2 = rors.w r2, r1, r2 0x61,0xfa,0x05,0xf5 = ror.w r5, r1, r5 0xcf,0x41 = rors r7, r1 0x71,0xfa,0x08,0xf8 = rors.w r8, r1, r8 0x78,0xfa,0x01,0xf8 = rors.w r8, r8, r1 0x78,0xfa,0x06,0xf6 = rors.w r6, r8, r6 0x76,0xfa,0x08,0xf6 = rors.w r6, r6, r8 0x08,0xbf = it eq 0x62,0xfa,0x01,0xf4 = roreq.w r4, r2, r1 0x08,0xbf = it eq 0xcc,0x41 = roreq r4, r1 0x08,0xbf = it eq 0x64,0xfa,0x01,0xf1 = roreq.w r1, r4, r1 0x08,0xbf = it eq 0x64,0xfa,0x01,0xf4 = roreq.w r4, r4, r1 0x08,0xbf = it eq 0x61,0xfa,0x00,0xf0 = roreq.w r0, r1, r0 0x08,0xbf = it eq 0x71,0xfa,0x00,0xf0 = rorseq.w r0, r1, r0 0x08,0xbf = it eq 0xcf,0x41 = roreq r7, r1 0x08,0xbf = it eq 0x61,0xfa,0x08,0xf8 = roreq.w r8, r1, r8 0x08,0xbf = it eq 0x68,0xfa,0x01,0xf8 = roreq.w r8, r8, r1 0x08,0xbf = it eq 0x68,0xfa,0x03,0xf3 = roreq.w r3, r8, r3 0x08,0xbf = it eq 0x61,0xfa,0x08,0xf1 = roreq.w r1, r1, r8 0x52,0xea,0x01,0x07 = orrs.w r7, r2, r1 0x0a,0x43 = orrs r2, r1 0x0b,0x43 = orrs r3, r1 0x54,0xea,0x01,0x04 = orrs.w r4, r4, r1 0x51,0xea,0x05,0x05 = orrs.w r5, r1, r5 0x41,0xea,0x02,0x02 = orr.w r2, r1, r2 0x0f,0x43 = orrs r7, r1 0x0f,0x43 = orrs r7, r1 0x51,0xea,0x08,0x08 = orrs.w r8, r1, r8 0x58,0xea,0x01,0x08 = orrs.w r8, r8, r1 0x58,0xea,0x01,0x01 = orrs.w r1, r8, r1 0x50,0xea,0x08,0x00 = orrs.w r0, r0, r8 0x51,0xea,0x41,0x01 = orrs.w r1, r1, r1, lsl #1 0x51,0xea,0x50,0x00 = orrs.w r0, r1, r0, lsr #1 0x08,0xbf = it eq 0x42,0xea,0x01,0x00 = orreq.w r0, r2, r1 0x08,0xbf = it eq 0x0d,0x43 = orreq r5, r1 0x08,0xbf = it eq 0x0d,0x43 = orreq r5, r1 0x08,0xbf = it eq 0x42,0xea,0x01,0x02 = orreq.w r2, r2, r1 0x08,0xbf = it eq 0x41,0xea,0x03,0x03 = orreq.w r3, r1, r3 0x08,0xbf = it eq 0x51,0xea,0x04,0x04 = orrseq.w r4, r1, r4 0x08,0xbf = it eq 0x0f,0x43 = orreq r7, r1 0x08,0xbf = it eq 0x0f,0x43 = orreq r7, r1 0x08,0xbf = it eq 0x41,0xea,0x08,0x08 = orreq.w r8, r1, r8 0x08,0xbf = it eq 0x48,0xea,0x01,0x08 = orreq.w r8, r8, r1 0x08,0xbf = it eq 0x48,0xea,0x00,0x00 = orreq.w r0, r8, r0 0x08,0xbf = it eq 0x40,0xea,0x08,0x00 = orreq.w r0, r0, r8 0x08,0xbf = it eq 0x42,0xea,0x41,0x02 = orreq.w r2, r2, r1, lsl #1 0x08,0xbf = it eq 0x41,0xea,0x52,0x02 = orreq.w r2, r1, r2, lsr #1 0x32,0xea,0x01,0x03 = bics.w r3, r2, r1 0x8a,0x43 = bics r2, r1 0x32,0xea,0x01,0x01 = bics.w r1, r2, r1 0x32,0xea,0x01,0x02 = bics.w r2, r2, r1 0x31,0xea,0x00,0x00 = bics.w r0, r1, r0 0x21,0xea,0x00,0x00 = bic.w r0, r1, r0 0x8f,0x43 = bics r7, r1 0x31,0xea,0x08,0x08 = bics.w r8, r1, r8 0x38,0xea,0x01,0x08 = bics.w r8, r8, r1 0x38,0xea,0x07,0x07 = bics.w r7, r8, r7 0x35,0xea,0x08,0x05 = bics.w r5, r5, r8 0x33,0xea,0x41,0x03 = bics.w r3, r3, r1, lsl #1 0x31,0xea,0x54,0x04 = bics.w r4, r1, r4, lsr #1 0x08,0xbf = it eq 0x22,0xea,0x01,0x00 = biceq.w r0, r2, r1 0x08,0xbf = it eq 0x8d,0x43 = biceq r5, r1 0x08,0xbf = it eq 0x25,0xea,0x01,0x01 = biceq.w r1, r5, r1 0x08,0xbf = it eq 0x24,0xea,0x01,0x04 = biceq.w r4, r4, r1 0x08,0xbf = it eq 0x21,0xea,0x02,0x02 = biceq.w r2, r1, r2 0x08,0xbf = it eq 0x31,0xea,0x05,0x05 = bicseq.w r5, r1, r5 0x08,0xbf = it eq 0x8f,0x43 = biceq r7, r1 0x08,0xbf = it eq 0x21,0xea,0x08,0x08 = biceq.w r8, r1, r8 0x08,0xbf = it eq 0x28,0xea,0x01,0x08 = biceq.w r8, r8, r1 0x08,0xbf = it eq 0x28,0xea,0x00,0x00 = biceq.w r0, r8, r0 0x08,0xbf = it eq 0x22,0xea,0x08,0x02 = biceq.w r2, r2, r8 0x08,0xbf = it eq 0x24,0xea,0x41,0x04 = biceq.w r4, r4, r1, lsl #1 0x08,0xbf = it eq 0x21,0xea,0x55,0x05 = biceq.w r5, r1, r5, lsr #1 capstone-sys-0.11.0/capstone/suite/MC/ARM/thumb2-pldw.s.cs010066400017500001750000000001051363402546700212720ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0xb0,0xf8,0x01,0xf1 = pldw [r0, #257] capstone-sys-0.11.0/capstone/suite/MC/ARM/vfp4-thumb.s.cs010066400017500001750000000010551363402546700211260ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0xe2,0xee,0xa1,0x0b = vfma.f64 d16, d18, d17 0xa2,0xee,0x00,0x1a = vfma.f32 s2, s4, s0 0x42,0xef,0xb1,0x0c = vfma.f32 d16, d18, d17 0x08,0xef,0x50,0x4c = vfma.f32 q2, q4, q0 0xd2,0xee,0xe1,0x0b = vfnma.f64 d16, d18, d17 0x92,0xee,0x40,0x1a = vfnma.f32 s2, s4, s0 0xe2,0xee,0xe1,0x0b = vfms.f64 d16, d18, d17 0xa2,0xee,0x40,0x1a = vfms.f32 s2, s4, s0 0x62,0xef,0xb1,0x0c = vfms.f32 d16, d18, d17 0x28,0xef,0x50,0x4c = vfms.f32 q2, q4, q0 0xd2,0xee,0xa1,0x0b = vfnms.f64 d16, d18, d17 0x92,0xee,0x00,0x1a = vfnms.f32 s2, s4, s0 capstone-sys-0.11.0/capstone/suite/MC/ARM/vfp4.s.cs010066400017500001750000000010571363402546700200130ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0xa1,0x0b,0xe2,0xee = vfma.f64 d16, d18, d17 0x00,0x1a,0xa2,0xee = vfma.f32 s2, s4, s0 0xb1,0x0c,0x42,0xf2 = vfma.f32 d16, d18, d17 0x50,0x4c,0x08,0xf2 = vfma.f32 q2, q4, q0 0xe1,0x0b,0xd2,0xee = vfnma.f64 d16, d18, d17 0x40,0x1a,0x92,0xee = vfnma.f32 s2, s4, s0 0xe1,0x0b,0xe2,0xee = vfms.f64 d16, d18, d17 0x40,0x1a,0xa2,0xee = vfms.f32 s2, s4, s0 0xb1,0x0c,0x62,0xf2 = vfms.f32 d16, d18, d17 0x50,0x4c,0x28,0xf2 = vfms.f32 q2, q4, q0 0xa1,0x0b,0xd2,0xee = vfnms.f64 d16, d18, d17 0x00,0x1a,0x92,0xee = vfnms.f32 s2, s4, s0 capstone-sys-0.11.0/capstone/suite/MC/ARM/vpush-vpop-thumb.s.cs010066400017500001750000000006731363402546700224030ustar0000000000000000# CS_ARCH_ARM, CS_MODE_THUMB, 0x2d,0xed,0x0a,0x8b = vpush {d8, d9, d10, d11, d12} 0x2d,0xed,0x05,0x4a = vpush {s8, s9, s10, s11, s12} 0xbd,0xec,0x0a,0x8b = vpop {d8, d9, d10, d11, d12} 0xbd,0xec,0x05,0x4a = vpop {s8, s9, s10, s11, s12} 0x2d,0xed,0x0a,0x8b = vpush {d8, d9, d10, d11, d12} 0x2d,0xed,0x05,0x4a = vpush {s8, s9, s10, s11, s12} 0xbd,0xec,0x0a,0x8b = vpop {d8, d9, d10, d11, d12} 0xbd,0xec,0x05,0x4a = vpop {s8, s9, s10, s11, s12} capstone-sys-0.11.0/capstone/suite/MC/ARM/vpush-vpop.s.cs010066400017500001750000000006751363402546700212700ustar0000000000000000# CS_ARCH_ARM, CS_MODE_ARM, None 0x0a,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12} 0x05,0x4a,0x2d,0xed = vpush {s8, s9, s10, s11, s12} 0x0a,0x8b,0xbd,0xec = vpop {d8, d9, d10, d11, d12} 0x05,0x4a,0xbd,0xec = vpop {s8, s9, s10, s11, s12} 0x0a,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12} 0x05,0x4a,0x2d,0xed = vpush {s8, s9, s10, s11, s12} 0x0a,0x8b,0xbd,0xec = vpop {d8, d9, d10, d11, d12} 0x05,0x4a,0xbd,0xec = vpop {s8, s9, s10, s11, s12} capstone-sys-0.11.0/capstone/suite/MC/Mips/hilo-addressing.s.cs010066400017500001750000000002501363402546700224730ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x3c,0x04,0xde,0xae = lui $4, %hi(addr) 0x03,0xe0,0x00,0x08 = jr $31 0x80,0x82,0xbe,0xef = lb $2, %lo(addr)($4) capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-alu-instructions-EB.s.cs010066400017500001750000000024111363402546700252270ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO, None 0x00,0xe6,0x49,0x10 = add $9, $6, $7 0x11,0x26,0x45,0x67 = addi $9, $6, 17767 0x31,0x26,0xc5,0x67 = addiu $9, $6, -15001 0x11,0x26,0x45,0x67 = addi $9, $6, 17767 0x31,0x26,0xc5,0x67 = addiu $9, $6, -15001 0x00,0xe6,0x49,0x50 = addu $9, $6, $7 0x00,0xe6,0x49,0x90 = sub $9, $6, $7 0x00,0xa3,0x21,0xd0 = subu $4, $3, $5 0x00,0xe0,0x31,0x90 = neg $6, $7 0x00,0xe0,0x31,0xd0 = negu $6, $7 0x00,0x08,0x39,0x50 = move $7, $8 0x00,0xa3,0x1b,0x50 = slt $3, $3, $5 0x90,0x63,0x00,0x67 = slti $3, $3, 103 0x90,0x63,0x00,0x67 = slti $3, $3, 103 0xb0,0x63,0x00,0x67 = sltiu $3, $3, 103 0x00,0xa3,0x1b,0x90 = sltu $3, $3, $5 0x41,0xa9,0x45,0x67 = lui $9, 17767 0x00,0xe6,0x4a,0x50 = and $9, $6, $7 0xd1,0x26,0x45,0x67 = andi $9, $6, 17767 0xd1,0x26,0x45,0x67 = andi $9, $6, 17767 0x00,0xa4,0x1a,0x90 = or $3, $4, $5 0x51,0x26,0x45,0x67 = ori $9, $6, 17767 0x00,0xa3,0x1b,0x10 = xor $3, $3, $5 0x71,0x26,0x45,0x67 = xori $9, $6, 17767 0x71,0x26,0x45,0x67 = xori $9, $6, 17767 0x00,0xe6,0x4a,0xd0 = nor $9, $6, $7 0x00,0x08,0x3a,0xd0 = not $7, $8 0x00,0xe6,0x4a,0x10 = mul $9, $6, $7 0x00,0xe9,0x8b,0x3c = mult $9, $7 0x00,0xe9,0x9b,0x3c = multu $9, $7 0x00,0xe9,0xab,0x3c = div $zero, $9, $7 0x00,0xe9,0xbb,0x3c = divu $zero, $9, $7 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-alu-instructions.s.cs010066400017500001750000000023661363402546700247540ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0xe6,0x00,0x10,0x49 = add $9, $6, $7 0x26,0x11,0x67,0x45 = addi $9, $6, 17767 0x26,0x31,0x67,0xc5 = addiu $9, $6, -15001 0x26,0x11,0x67,0x45 = addi $9, $6, 17767 0x26,0x31,0x67,0xc5 = addiu $9, $6, -15001 0xe6,0x00,0x50,0x49 = addu $9, $6, $7 0xe6,0x00,0x90,0x49 = sub $9, $6, $7 0xa3,0x00,0xd0,0x21 = subu $4, $3, $5 0xe0,0x00,0x90,0x31 = neg $6, $7 0xe0,0x00,0xd0,0x31 = negu $6, $7 0x08,0x00,0x50,0x39 = move $7, $8 0xa3,0x00,0x50,0x1b = slt $3, $3, $5 0x63,0x90,0x67,0x00 = slti $3, $3, 103 0x63,0x90,0x67,0x00 = slti $3, $3, 103 0x63,0xb0,0x67,0x00 = sltiu $3, $3, 103 0xa3,0x00,0x90,0x1b = sltu $3, $3, $5 0xa9,0x41,0x67,0x45 = lui $9, 17767 0xe6,0x00,0x50,0x4a = and $9, $6, $7 0x26,0xd1,0x67,0x45 = andi $9, $6, 17767 0x26,0xd1,0x67,0x45 = andi $9, $6, 17767 0xa4,0x00,0x90,0x1a = or $3, $4, $5 0x26,0x51,0x67,0x45 = ori $9, $6, 17767 0xa3,0x00,0x10,0x1b = xor $3, $3, $5 0x26,0x71,0x67,0x45 = xori $9, $6, 17767 0x26,0x71,0x67,0x45 = xori $9, $6, 17767 0xe6,0x00,0xd0,0x4a = nor $9, $6, $7 0x08,0x00,0xd0,0x3a = not $7, $8 0xe6,0x00,0x10,0x4a = mul $9, $6, $7 0xe9,0x00,0x3c,0x8b = mult $9, $7 0xe9,0x00,0x3c,0x9b = multu $9, $7 0xe9,0x00,0x3c,0xab = div $zero, $9, $7 0xe9,0x00,0x3c,0xbb = divu $zero, $9, $7 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-branch-instructions-EB.s.cs010066400017500001750000000006541363402546700257120ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x94,0x00,0x02,0x9a = b 1332 0x94,0xc9,0x02,0x9a = beq $9, $6, 1332 0x40,0x46,0x02,0x9a = bgez $6, 1332 0x40,0x66,0x02,0x9a = bgezal $6, 1332 0x40,0x26,0x02,0x9a = bltzal $6, 1332 0x40,0xc6,0x02,0x9a = bgtz $6, 1332 0x40,0x86,0x02,0x9a = blez $6, 1332 0xb4,0xc9,0x02,0x9a = bne $9, $6, 1332 0x40,0x60,0x02,0x9a = bal 1332 0x40,0x06,0x02,0x9a = bltz $6, 1332 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-branch-instructions.s.cs010066400017500001750000000006311363402546700254210ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0x00,0x94,0x9a,0x02 = b 1332 0xc9,0x94,0x9a,0x02 = beq $9, $6, 1332 0x46,0x40,0x9a,0x02 = bgez $6, 1332 0x66,0x40,0x9a,0x02 = bgezal $6, 1332 0x26,0x40,0x9a,0x02 = bltzal $6, 1332 0xc6,0x40,0x9a,0x02 = bgtz $6, 1332 0x86,0x40,0x9a,0x02 = blez $6, 1332 0xc9,0xb4,0x9a,0x02 = bne $9, $6, 1332 0x60,0x40,0x9a,0x02 = bal 1332 0x06,0x40,0x9a,0x02 = bltz $6, 1332 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-expansions.s.cs010066400017500001750000000013711363402546700236130ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0xa0,0x50,0x7b,0x00 = ori $5, $zero, 123 0xc0,0x30,0xd7,0xf6 = addiu $6, $zero, -2345 0xa7,0x41,0x01,0x00 = lui $7, 1 0xe7,0x50,0x02,0x00 = ori $7, $7, 2 0x80,0x30,0x14,0x00 = addiu $4, $zero, 20 0xa7,0x41,0x01,0x00 = lui $7, 1 0xe7,0x50,0x02,0x00 = ori $7, $7, 2 0x85,0x30,0x14,0x00 = addiu $4, $5, 20 0xa7,0x41,0x01,0x00 = lui $7, 1 0xe7,0x50,0x02,0x00 = ori $7, $7, 2 0x07,0x01,0x50,0x39 = addu $7, $7, $8 0x8a,0x00,0x50,0x51 = addu $10, $10, $4 0x21,0x01,0x50,0x09 = addu $1, $1, $9 0xaa,0x41,0x0a,0x00 = lui $10, 10 0x8a,0x00,0x50,0x51 = addu $10, $10, $4 0x4a,0xfd,0x7b,0x00 = lw $10, 123($10) 0xa1,0x41,0x02,0x00 = lui $1, 2 0x21,0x01,0x50,0x09 = addu $1, $1, $9 0x41,0xf9,0x40,0xe2 = sw $10, 57920($1) capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-jump-instructions-EB.s.cs010066400017500001750000000002741363402546700254260ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0xd4,0x00,0x02,0x98 = j 1328 0xf4,0x00,0x02,0x98 = jal 1328 0x03,0xe6,0x0f,0x3c = jalr $6 0x00,0x07,0x0f,0x3c = jr $7 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-jump-instructions.s.cs010066400017500001750000000003051363402546700251350ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0x00,0xd4,0x98,0x02 = j 1328 0x00,0xf4,0x98,0x02 = jal 1328 0xe6,0x03,0x3c,0x0f = jalr $6 0x07,0x00,0x3c,0x0f = jr $7 0x07,0x00,0x3c,0x0f = jr $7 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-loadstore-instructions-EB.s.cs010066400017500001750000000005401363402546700264430ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x1c,0xa4,0x00,0x08 = lb $5, 8($4) 0x14,0xc4,0x00,0x08 = lbu $6, 8($4) 0x3c,0x44,0x00,0x08 = lh $2, 8($4) 0x34,0x82,0x00,0x08 = lhu $4, 8($2) 0xfc,0xc5,0x00,0x04 = lw $6, 4($5) 0x18,0xa4,0x00,0x08 = sb $5, 8($4) 0x38,0x44,0x00,0x08 = sh $2, 8($4) 0xf8,0xa6,0x00,0x04 = sw $5, 4($6) capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-loadstore-instructions.s.cs010066400017500001750000000005151363402546700261610ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0xa4,0x1c,0x08,0x00 = lb $5, 8($4) 0xc4,0x14,0x08,0x00 = lbu $6, 8($4) 0x44,0x3c,0x08,0x00 = lh $2, 8($4) 0x82,0x34,0x08,0x00 = lhu $4, 8($2) 0xc5,0xfc,0x04,0x00 = lw $6, 4($5) 0xa4,0x18,0x08,0x00 = sb $5, 8($4) 0x44,0x38,0x08,0x00 = sh $2, 8($4) 0xa6,0xf8,0x04,0x00 = sw $5, 4($6) capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-loadstore-unaligned-EB.s.cs010066400017500001750000000003321363402546700256440ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x60,0x85,0x00,0x10 = lwl $4, 16($5) 0x60,0x85,0x10,0x10 = lwr $4, 16($5) 0x60,0x85,0x80,0x10 = swl $4, 16($5) 0x60,0x85,0x90,0x10 = swr $4, 16($5) capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-loadstore-unaligned.s.cs010066400017500001750000000003071363402546700253620ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0x85,0x60,0x10,0x00 = lwl $4, 16($5) 0x85,0x60,0x10,0x10 = lwr $4, 16($5) 0x85,0x60,0x10,0x80 = swl $4, 16($5) 0x85,0x60,0x10,0x90 = swr $4, 16($5) capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-movcond-instructions-EB.s.cs010066400017500001750000000003441363402546700261160ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x00,0xe6,0x48,0x58 = movz $9, $6, $7 0x00,0xe6,0x48,0x18 = movn $9, $6, $7 0x55,0x26,0x09,0x7b = movt $9, $6, $fcc0 0x55,0x26,0x01,0x7b = movf $9, $6, $fcc0 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-movcond-instructions.s.cs010066400017500001750000000003211363402546700256250ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0xe6,0x00,0x58,0x48 = movz $9, $6, $7 0xe6,0x00,0x18,0x48 = movn $9, $6, $7 0x26,0x55,0x7b,0x09 = movt $9, $6, $fcc0 0x26,0x55,0x7b,0x01 = movf $9, $6, $fcc0 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-multiply-instructions-EB.s.cs010066400017500001750000000003201363402546700263220ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x00,0xa4,0xcb,0x3c = madd $4, $5 0x00,0xa4,0xdb,0x3c = maddu $4, $5 0x00,0xa4,0xeb,0x3c = msub $4, $5 0x00,0xa4,0xfb,0x3c = msubu $4, $5 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-multiply-instructions.s.cs010066400017500001750000000002751363402546700260470ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0xa4,0x00,0x3c,0xcb = madd $4, $5 0xa4,0x00,0x3c,0xdb = maddu $4, $5 0xa4,0x00,0x3c,0xeb = msub $4, $5 0xa4,0x00,0x3c,0xfb = msubu $4, $5 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-shift-instructions-EB.s.cs010066400017500001750000000005601363402546700255660ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x00,0x83,0x38,0x00 = sll $4, $3, 7 0x00,0x65,0x10,0x10 = sllv $2, $3, $5 0x00,0x83,0x38,0x80 = sra $4, $3, 7 0x00,0x65,0x10,0x90 = srav $2, $3, $5 0x00,0x83,0x38,0x40 = srl $4, $3, 7 0x00,0x65,0x10,0x50 = srlv $2, $3, $5 0x01,0x26,0x38,0xc0 = rotr $9, $6, 7 0x00,0xc7,0x48,0xd0 = rotrv $9, $6, $7 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-shift-instructions.s.cs010066400017500001750000000005351363402546700253040ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0x83,0x00,0x00,0x38 = sll $4, $3, 7 0x65,0x00,0x10,0x10 = sllv $2, $3, $5 0x83,0x00,0x80,0x38 = sra $4, $3, 7 0x65,0x00,0x90,0x10 = srav $2, $3, $5 0x83,0x00,0x40,0x38 = srl $4, $3, 7 0x65,0x00,0x50,0x10 = srlv $2, $3, $5 0x26,0x01,0xc0,0x38 = rotr $9, $6, 7 0xc7,0x00,0xd0,0x48 = rotrv $9, $6, $7 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-trap-instructions-EB.s.cs010066400017500001750000000007561363402546700254260ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, None 0x01,0x28,0x00,0x3c = teq $8, $9 0x01,0x28,0x02,0x3c = tge $8, $9 0x01,0x28,0x04,0x3c = tgeu $8, $9 0x01,0x28,0x08,0x3c = tlt $8, $9 0x01,0x28,0x0a,0x3c = tltu $8, $9 0x01,0x28,0x0c,0x3c = tne $8, $9 0x41,0xc9,0x45,0x67 = teqi $9, 17767 0x41,0x29,0x45,0x67 = tgei $9, 17767 0x41,0x69,0x45,0x67 = tgeiu $9, 17767 0x41,0x09,0x45,0x67 = tlti $9, 17767 0x41,0x49,0x45,0x67 = tltiu $9, 17767 0x41,0x89,0x45,0x67 = tnei $9, 17767 capstone-sys-0.11.0/capstone/suite/MC/Mips/micromips-trap-instructions.s.cs010066400017500001750000000007331363402546700251350ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_MICRO, None 0x28,0x01,0x3c,0x00 = teq $8, $9 0x28,0x01,0x3c,0x02 = tge $8, $9 0x28,0x01,0x3c,0x04 = tgeu $8, $9 0x28,0x01,0x3c,0x08 = tlt $8, $9 0x28,0x01,0x3c,0x0a = tltu $8, $9 0x28,0x01,0x3c,0x0c = tne $8, $9 0xc9,0x41,0x67,0x45 = teqi $9, 17767 0x29,0x41,0x67,0x45 = tgei $9, 17767 0x69,0x41,0x67,0x45 = tgeiu $9, 17767 0x09,0x41,0x67,0x45 = tlti $9, 17767 0x49,0x41,0x67,0x45 = tltiu $9, 17767 0x89,0x41,0x67,0x45 = tnei $9, 17767 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-alu-instructions.s.cs010066400017500001750000000037241363402546700237210ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32, None 0x24,0x48,0xc7,0x00 = and $9, $6, $7 0x67,0x45,0xc9,0x30 = andi $9, $6, 17767 0x67,0x45,0xc9,0x30 = andi $9, $6, 17767 0x67,0x45,0x29,0x31 = andi $9, $9, 17767 0x21,0x30,0xe6,0x70 = clo $6, $7 0x20,0x30,0xe6,0x70 = clz $6, $7 0x84,0x61,0x33,0x7d = ins $19, $9, 6, 7 0x27,0x48,0xc7,0x00 = nor $9, $6, $7 0x25,0x18,0x65,0x00 = or $3, $3, $5 0x67,0x45,0xa4,0x34 = ori $4, $5, 17767 0x67,0x45,0xc9,0x34 = ori $9, $6, 17767 0x80,0x00,0x6b,0x35 = ori $11, $11, 128 0xc2,0x49,0x26,0x00 = rotr $9, $6, 7 0x46,0x48,0xe6,0x00 = rotrv $9, $6, $7 0xc0,0x21,0x03,0x00 = sll $4, $3, 7 0x04,0x10,0xa3,0x00 = sllv $2, $3, $5 0x2a,0x18,0x65,0x00 = slt $3, $3, $5 0x67,0x00,0x63,0x28 = slti $3, $3, 103 0x67,0x00,0x63,0x28 = slti $3, $3, 103 0x67,0x00,0x63,0x2c = sltiu $3, $3, 103 0x2b,0x18,0x65,0x00 = sltu $3, $3, $5 0xc3,0x21,0x03,0x00 = sra $4, $3, 7 0x07,0x10,0xa3,0x00 = srav $2, $3, $5 0xc2,0x21,0x03,0x00 = srl $4, $3, 7 0x06,0x10,0xa3,0x00 = srlv $2, $3, $5 0x26,0x18,0x65,0x00 = xor $3, $3, $5 0x67,0x45,0xc9,0x38 = xori $9, $6, 17767 0x67,0x45,0xc9,0x38 = xori $9, $6, 17767 0x0c,0x00,0x6b,0x39 = xori $11, $11, 12 0xa0,0x30,0x07,0x7c = wsbh $6, $7 0x27,0x38,0x00,0x01 = not $7, $8 0x20,0x48,0xc7,0x00 = add $9, $6, $7 0x67,0x45,0xc9,0x20 = addi $9, $6, 17767 0x67,0xc5,0xc9,0x24 = addiu $9, $6, -15001 0x67,0x45,0xc9,0x20 = addi $9, $6, 17767 0x67,0x45,0x29,0x21 = addi $9, $9, 17767 0x67,0xc5,0xc9,0x24 = addiu $9, $6, -15001 0x28,0x00,0x6b,0x25 = addiu $11, $11, 40 0x21,0x48,0xc7,0x00 = addu $9, $6, $7 0x00,0x00,0xc7,0x70 = madd $6, $7 0x01,0x00,0xc7,0x70 = maddu $6, $7 0x04,0x00,0xc7,0x70 = msub $6, $7 0x05,0x00,0xc7,0x70 = msubu $6, $7 0x18,0x00,0x65,0x00 = mult $3, $5 0x19,0x00,0x65,0x00 = multu $3, $5 0x22,0x48,0xc7,0x00 = sub $9, $6, $7 0xc8,0xff,0xbd,0x23 = addi $sp, $sp, -56 0x23,0x20,0x65,0x00 = subu $4, $3, $5 0xd8,0xff,0xbd,0x27 = addiu $sp, $sp, -40 0x22,0x30,0x07,0x00 = neg $6, $7 0x23,0x30,0x07,0x00 = negu $6, $7 0x21,0x38,0x00,0x01 = move $7, $8 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-control-instructions-64.s.cs010066400017500001750000000021531363402546700250420ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None 0x00,0x00,0x00,0x0d = break 0x00,0x07,0x00,0x0d = break 7, 0 0x00,0x07,0x01,0x4d = break 7, 5 0x00,0x00,0x00,0x0c = syscall 0x00,0x0d,0x15,0x0c = syscall 13396 0x42,0x00,0x00,0x18 = eret 0x42,0x00,0x00,0x1f = deret 0x41,0x60,0x60,0x00 = di 0x41,0x60,0x60,0x00 = di 0x41,0x6a,0x60,0x00 = di $10 0x41,0x60,0x60,0x20 = ei 0x41,0x60,0x60,0x20 = ei 0x41,0x6a,0x60,0x20 = ei $10 0x42,0x00,0x00,0x20 = wait 0x00,0x03,0x00,0x34 = teq $zero, $3 0x00,0x03,0x00,0x74 = teq $zero, $3, 1 0x04,0x6c,0x00,0x01 = teqi $3, 1 0x00,0x03,0x00,0x30 = tge $zero, $3 0x00,0x03,0x00,0xf0 = tge $zero, $3, 3 0x04,0x68,0x00,0x03 = tgei $3, 3 0x00,0x03,0x00,0x31 = tgeu $zero, $3 0x00,0x03,0x01,0xf1 = tgeu $zero, $3, 7 0x04,0x69,0x00,0x07 = tgeiu $3, 7 0x00,0x03,0x00,0x32 = tlt $zero, $3 0x00,0x03,0x07,0xf2 = tlt $zero, $3, 31 0x04,0x6a,0x00,0x1f = tlti $3, 31 0x00,0x03,0x00,0x33 = tltu $zero, $3 0x00,0x03,0x3f,0xf3 = tltu $zero, $3, 255 0x04,0x6b,0x00,0xff = tltiu $3, 255 0x00,0x03,0x00,0x36 = tne $zero, $3 0x00,0x03,0xff,0xf6 = tne $zero, $3, 1023 0x04,0x6e,0x03,0xff = tnei $3, 1023 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-control-instructions.s.cs010066400017500001750000000021531363402546700246130ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x00,0x00,0x00,0x0d = break 0x00,0x07,0x00,0x0d = break 7, 0 0x00,0x07,0x01,0x4d = break 7, 5 0x00,0x00,0x00,0x0c = syscall 0x00,0x0d,0x15,0x0c = syscall 13396 0x42,0x00,0x00,0x18 = eret 0x42,0x00,0x00,0x1f = deret 0x41,0x60,0x60,0x00 = di 0x41,0x60,0x60,0x00 = di 0x41,0x6a,0x60,0x00 = di $10 0x41,0x60,0x60,0x20 = ei 0x41,0x60,0x60,0x20 = ei 0x41,0x6a,0x60,0x20 = ei $10 0x42,0x00,0x00,0x20 = wait 0x00,0x03,0x00,0x34 = teq $zero, $3 0x00,0x03,0x00,0x74 = teq $zero, $3, 1 0x04,0x6c,0x00,0x01 = teqi $3, 1 0x00,0x03,0x00,0x30 = tge $zero, $3 0x00,0x03,0x00,0xf0 = tge $zero, $3, 3 0x04,0x68,0x00,0x03 = tgei $3, 3 0x00,0x03,0x00,0x31 = tgeu $zero, $3 0x00,0x03,0x01,0xf1 = tgeu $zero, $3, 7 0x04,0x69,0x00,0x07 = tgeiu $3, 7 0x00,0x03,0x00,0x32 = tlt $zero, $3 0x00,0x03,0x07,0xf2 = tlt $zero, $3, 31 0x04,0x6a,0x00,0x1f = tlti $3, 31 0x00,0x03,0x00,0x33 = tltu $zero, $3 0x00,0x03,0x3f,0xf3 = tltu $zero, $3, 255 0x04,0x6b,0x00,0xff = tltiu $3, 255 0x00,0x03,0x00,0x36 = tne $zero, $3 0x00,0x03,0xff,0xf6 = tne $zero, $3, 1023 0x04,0x6e,0x03,0xff = tnei $3, 1023 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-coprocessor-encodings.s.cs010066400017500001750000000012601363402546700246770ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None 0x40,0xac,0x80,0x02 = dmtc0 $12, $16, 2 0x40,0xac,0x80,0x00 = dmtc0 $12, $16, 0 0x40,0x8c,0x80,0x02 = mtc0 $12, $16, 2 0x40,0x8c,0x80,0x00 = mtc0 $12, $16, 0 0x40,0x2c,0x80,0x02 = dmfc0 $12, $16, 2 0x40,0x2c,0x80,0x00 = dmfc0 $12, $16, 0 0x40,0x0c,0x80,0x02 = mfc0 $12, $16, 2 0x40,0x0c,0x80,0x00 = mfc0 $12, $16, 0 0x48,0xac,0x80,0x02 = dmtc2 $12, $16, 2 0x48,0xac,0x80,0x00 = dmtc2 $12, $16, 0 0x48,0x8c,0x80,0x02 = mtc2 $12, $16, 2 0x48,0x8c,0x80,0x00 = mtc2 $12, $16, 0 0x48,0x2c,0x80,0x02 = dmfc2 $12, $16, 2 0x48,0x2c,0x80,0x00 = dmfc2 $12, $16, 0 0x48,0x0c,0x80,0x02 = mfc2 $12, $16, 2 0x48,0x0c,0x80,0x00 = mfc2 $12, $16, 0 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-dsp-instructions.s.cs010066400017500001750000000034251363402546700237240ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x7e,0x32,0x83,0x11 = precrq.qb.ph $16, $17, $18 0x7e,0x53,0x8d,0x11 = precrq.ph.w $17, $18, $19 0x7e,0x74,0x95,0x51 = precrq_rs.ph.w $18, $19, $20 0x7e,0x95,0x9b,0xd1 = precrqu_s.qb.ph $19, $20, $21 0x7c,0x15,0xa3,0x12 = preceq.w.phl $20, $21 0x7c,0x16,0xab,0x52 = preceq.w.phr $21, $22 0x7c,0x17,0xb1,0x12 = precequ.ph.qbl $22, $23 0x7c,0x18,0xb9,0x52 = precequ.ph.qbr $23, $24 0x7c,0x19,0xc1,0x92 = precequ.ph.qbla $24, $25 0x7c,0x1a,0xc9,0xd2 = precequ.ph.qbra $25, $26 0x7c,0x1b,0xd7,0x12 = preceu.ph.qbl $26, $27 0x7c,0x1c,0xdf,0x52 = preceu.ph.qbr $27, $gp 0x7c,0x1d,0xe7,0x92 = preceu.ph.qbla $gp, $sp 0x7c,0x1e,0xef,0xd2 = preceu.ph.qbra $sp, $fp 0x7f,0x19,0xbb,0x51 = precr.qb.ph $23, $24, $25 0x7f,0x38,0x07,0x91 = precr_sra.ph.w $24, $25, 0 0x7f,0x38,0xff,0x91 = precr_sra.ph.w $24, $25, 31 0x7f,0x59,0x07,0xd1 = precr_sra_r.ph.w $25, $26, 0 0x7f,0x59,0xff,0xd1 = precr_sra_r.ph.w $25, $26, 31 0x7f,0x54,0x51,0x8a = lbux $10, $20($26) 0x7f,0x75,0x59,0x0a = lhx $11, $21($27) 0x7f,0x96,0x60,0x0a = lwx $12, $22($gp) 0x00,0x43,0x18,0x18 = mult $ac3, $2, $3 0x00,0x85,0x10,0x19 = multu $ac2, $4, $5 0x70,0xc7,0x08,0x00 = madd $ac1, $6, $7 0x71,0x09,0x00,0x01 = maddu $ac0, $8, $9 0x71,0x4b,0x18,0x04 = msub $ac3, $10, $11 0x71,0x8d,0x10,0x05 = msubu $ac2, $12, $13 0x00,0x20,0x70,0x10 = mfhi $14, $ac1 0x00,0x00,0x78,0x12 = mflo $15, $ac0 0x02,0x00,0x18,0x11 = mthi $16, $ac3 0x02,0x20,0x10,0x13 = mtlo $17, $ac2 0x00,0x43,0x00,0x18 = mult $2, $3 0x00,0x85,0x00,0x19 = multu $4, $5 0x70,0xc7,0x00,0x00 = madd $6, $7 0x71,0x09,0x00,0x01 = maddu $8, $9 0x71,0x4b,0x00,0x04 = msub $10, $11 0x71,0x8d,0x00,0x05 = msubu $12, $13 0x00,0x00,0x70,0x10 = mfhi $14 0x00,0x00,0x78,0x12 = mflo $15 0x02,0x00,0x00,0x11 = mthi $16 0x02,0x20,0x00,0x13 = mtlo $17 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-expansions.s.cs010066400017500001750000000013531363402546700225610ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32, None 0x7b,0x00,0x05,0x34 = ori $5, $zero, 123 0xd7,0xf6,0x06,0x24 = addiu $6, $zero, -2345 0x01,0x00,0x07,0x3c = lui $7, 1 0x02,0x00,0xe7,0x34 = ori $7, $7, 2 0x14,0x00,0x04,0x24 = addiu $4, $zero, 20 0x01,0x00,0x07,0x3c = lui $7, 1 0x02,0x00,0xe7,0x34 = ori $7, $7, 2 0x14,0x00,0xa4,0x24 = addiu $4, $5, 20 0x01,0x00,0x07,0x3c = lui $7, 1 0x02,0x00,0xe7,0x34 = ori $7, $7, 2 0x21,0x38,0xe8,0x00 = addu $7, $7, $8 0x21,0x50,0x44,0x01 = addu $10, $10, $4 0x21,0x08,0x29,0x00 = addu $1, $1, $9 0x0a,0x00,0x0a,0x3c = lui $10, 10 0x21,0x50,0x44,0x01 = addu $10, $10, $4 0x7b,0x00,0x4a,0x8d = lw $10, 123($10) 0x02,0x00,0x01,0x3c = lui $1, 2 0x21,0x08,0x29,0x00 = addu $1, $1, $9 0x40,0xe2,0x2a,0xac = sw $10, 57920($1) capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-fpu-instructions.s.cs010066400017500001750000000071041363402546700237260ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32, None 0x05,0x73,0x20,0x46 = abs.d $f12, $f14 0x85,0x39,0x00,0x46 = abs.s $f6, $f7 0x00,0x62,0x2e,0x46 = add.d $f8, $f12, $f14 0x40,0x32,0x07,0x46 = add.s $f9, $f6, $f7 0x0f,0x73,0x20,0x46 = floor.w.d $f12, $f14 0x8f,0x39,0x00,0x46 = floor.w.s $f6, $f7 0x0e,0x73,0x20,0x46 = ceil.w.d $f12, $f14 0x8e,0x39,0x00,0x46 = ceil.w.s $f6, $f7 0x02,0x62,0x2e,0x46 = mul.d $f8, $f12, $f14 0x42,0x32,0x07,0x46 = mul.s $f9, $f6, $f7 0x07,0x73,0x20,0x46 = neg.d $f12, $f14 0x87,0x39,0x00,0x46 = neg.s $f6, $f7 0x0c,0x73,0x20,0x46 = round.w.d $f12, $f14 0x8c,0x39,0x00,0x46 = round.w.s $f6, $f7 0x04,0x73,0x20,0x46 = sqrt.d $f12, $f14 0x84,0x39,0x00,0x46 = sqrt.s $f6, $f7 0x01,0x62,0x2e,0x46 = sub.d $f8, $f12, $f14 0x41,0x32,0x07,0x46 = sub.s $f9, $f6, $f7 0x0d,0x73,0x20,0x46 = trunc.w.d $f12, $f14 0x8d,0x39,0x00,0x46 = trunc.w.s $f6, $f7 0x32,0x60,0x2e,0x46 = c.eq.d $f12, $f14 0x32,0x30,0x07,0x46 = c.eq.s $f6, $f7 0x30,0x60,0x2e,0x46 = c.f.d $f12, $f14 0x30,0x30,0x07,0x46 = c.f.s $f6, $f7 0x3e,0x60,0x2e,0x46 = c.le.d $f12, $f14 0x3e,0x30,0x07,0x46 = c.le.s $f6, $f7 0x3c,0x60,0x2e,0x46 = c.lt.d $f12, $f14 0x3c,0x30,0x07,0x46 = c.lt.s $f6, $f7 0x3d,0x60,0x2e,0x46 = c.nge.d $f12, $f14 0x3d,0x30,0x07,0x46 = c.nge.s $f6, $f7 0x3b,0x60,0x2e,0x46 = c.ngl.d $f12, $f14 0x3b,0x30,0x07,0x46 = c.ngl.s $f6, $f7 0x39,0x60,0x2e,0x46 = c.ngle.d $f12, $f14 0x39,0x30,0x07,0x46 = c.ngle.s $f6, $f7 0x3f,0x60,0x2e,0x46 = c.ngt.d $f12, $f14 0x3f,0x30,0x07,0x46 = c.ngt.s $f6, $f7 0x36,0x60,0x2e,0x46 = c.ole.d $f12, $f14 0x36,0x30,0x07,0x46 = c.ole.s $f6, $f7 0x34,0x60,0x2e,0x46 = c.olt.d $f12, $f14 0x34,0x30,0x07,0x46 = c.olt.s $f6, $f7 0x3a,0x60,0x2e,0x46 = c.seq.d $f12, $f14 0x3a,0x30,0x07,0x46 = c.seq.s $f6, $f7 0x38,0x60,0x2e,0x46 = c.sf.d $f12, $f14 0x38,0x30,0x07,0x46 = c.sf.s $f6, $f7 0x33,0x60,0x2e,0x46 = c.ueq.d $f12, $f14 0x33,0xe0,0x12,0x46 = c.ueq.s $f28, $f18 0x37,0x60,0x2e,0x46 = c.ule.d $f12, $f14 0x37,0x30,0x07,0x46 = c.ule.s $f6, $f7 0x35,0x60,0x2e,0x46 = c.ult.d $f12, $f14 0x35,0x30,0x07,0x46 = c.ult.s $f6, $f7 0x31,0x60,0x2e,0x46 = c.un.d $f12, $f14 0x31,0x30,0x07,0x46 = c.un.s $f6, $f7 0xa1,0x39,0x00,0x46 = cvt.d.s $f6, $f7 0x21,0x73,0x80,0x46 = cvt.d.w $f12, $f14 0x20,0x73,0x20,0x46 = cvt.s.d $f12, $f14 0xa0,0x39,0x80,0x46 = cvt.s.w $f6, $f7 0x24,0x73,0x20,0x46 = cvt.w.d $f12, $f14 0xa4,0x39,0x00,0x46 = cvt.w.s $f6, $f7 0x00,0x00,0x46,0x44 = cfc1 $6, $0 0x00,0xf8,0xca,0x44 = ctc1 $10, $31 0x00,0x38,0x06,0x44 = mfc1 $6, $f7 0x10,0x28,0x00,0x00 = mfhi $5 0x12,0x28,0x00,0x00 = mflo $5 0x86,0x41,0x20,0x46 = mov.d $f6, $f8 0x86,0x39,0x00,0x46 = mov.s $f6, $f7 0x00,0x38,0x86,0x44 = mtc1 $6, $f7 0x11,0x00,0xe0,0x00 = mthi $7 0x13,0x00,0xe0,0x00 = mtlo $7 0xc6,0x23,0xe9,0xe4 = swc1 $f9, 9158($7) 0x00,0x38,0x06,0x40 = mfc0 $6, $7, 0 0x00,0x40,0x89,0x40 = mtc0 $9, $8, 0 0x00,0x38,0x05,0x48 = mfc2 $5, $7, 0 0x00,0x20,0x89,0x48 = mtc2 $9, $4, 0 0x02,0x38,0x06,0x40 = mfc0 $6, $7, 2 0x03,0x40,0x89,0x40 = mtc0 $9, $8, 3 0x04,0x38,0x05,0x48 = mfc2 $5, $7, 4 0x05,0x20,0x89,0x48 = mtc2 $9, $4, 5 0x01,0x10,0x20,0x00 = movf $2, $1, $fcc0 0x01,0x10,0x21,0x00 = movt $2, $1, $fcc0 0x01,0x20,0xb1,0x00 = movt $4, $5, $fcc4 0x11,0x31,0x28,0x46 = movf.d $f4, $f6, $fcc2 0x11,0x31,0x14,0x46 = movf.s $f4, $f6, $fcc5 0x05,0x00,0xa6,0x4c = luxc1 $f0, $6($5) 0x0d,0x20,0xb8,0x4c = suxc1 $f4, $24($5) 0x00,0x05,0xcc,0x4d = lwxc1 $f20, $12($14) 0x08,0xd0,0xd2,0x4e = swxc1 $f26, $18($22) 0x00,0x20,0x71,0x44 = mfhc1 $17, $f4 0x00,0x30,0xf1,0x44 = mthc1 $17, $f6 0x10,0x00,0xa4,0xeb = swc2 $4, 16($sp) 0x10,0x00,0xa4,0xfb = sdc2 $4, 16($sp) 0x0c,0x00,0xeb,0xcb = lwc2 $11, 12($ra) 0x0c,0x00,0xeb,0xdb = ldc2 $11, 12($ra) capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-jump-instructions.s.cs010066400017500001750000000000451363402546700241040ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32, None capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-memory-instructions.s.cs010066400017500001750000000011441363402546700244420ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32, None 0x10,0x00,0xa4,0xa0 = sb $4, 16($5) 0x10,0x00,0xa4,0xe0 = sc $4, 16($5) 0x10,0x00,0xa4,0xa4 = sh $4, 16($5) 0x10,0x00,0xa4,0xac = sw $4, 16($5) 0x00,0x00,0xa7,0xac = sw $7, 0($5) 0x10,0x00,0xa2,0xe4 = swc1 $f2, 16($5) 0x10,0x00,0xa4,0xa8 = swl $4, 16($5) 0x04,0x00,0xa4,0x80 = lb $4, 4($5) 0x04,0x00,0xa4,0x8c = lw $4, 4($5) 0x04,0x00,0xa4,0x90 = lbu $4, 4($5) 0x04,0x00,0xa4,0x84 = lh $4, 4($5) 0x04,0x00,0xa4,0x94 = lhu $4, 4($5) 0x04,0x00,0xa4,0xc0 = ll $4, 4($5) 0x04,0x00,0xa4,0x8c = lw $4, 4($5) 0x00,0x00,0xe7,0x8c = lw $7, 0($7) 0x10,0x00,0xa2,0x8f = lw $2, 16($sp) capstone-sys-0.11.0/capstone/suite/MC/Mips/mips-register-names.s.cs010066400017500001750000000025721363402546700233230ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x24,0x00,0x00,0x00 = addiu $zero, $zero, 0 0x24,0x01,0x00,0x00 = addiu $at, $zero, 0 0x24,0x02,0x00,0x00 = addiu $v0, $zero, 0 0x24,0x03,0x00,0x00 = addiu $v1, $zero, 0 0x24,0x04,0x00,0x00 = addiu $a0, $zero, 0 0x24,0x05,0x00,0x00 = addiu $a1, $zero, 0 0x24,0x06,0x00,0x00 = addiu $a2, $zero, 0 0x24,0x07,0x00,0x00 = addiu $a3, $zero, 0 0x24,0x08,0x00,0x00 = addiu $t0, $zero, 0 0x24,0x09,0x00,0x00 = addiu $t1, $zero, 0 0x24,0x0a,0x00,0x00 = addiu $t2, $zero, 0 0x24,0x0b,0x00,0x00 = addiu $t3, $zero, 0 0x24,0x0c,0x00,0x00 = addiu $t4, $zero, 0 0x24,0x0d,0x00,0x00 = addiu $t5, $zero, 0 0x24,0x0e,0x00,0x00 = addiu $t6, $zero, 0 0x24,0x0f,0x00,0x00 = addiu $t7, $zero, 0 0x24,0x10,0x00,0x00 = addiu $s0, $zero, 0 0x24,0x11,0x00,0x00 = addiu $s1, $zero, 0 0x24,0x12,0x00,0x00 = addiu $s2, $zero, 0 0x24,0x13,0x00,0x00 = addiu $s3, $zero, 0 0x24,0x14,0x00,0x00 = addiu $s4, $zero, 0 0x24,0x15,0x00,0x00 = addiu $s5, $zero, 0 0x24,0x16,0x00,0x00 = addiu $s6, $zero, 0 0x24,0x17,0x00,0x00 = addiu $s7, $zero, 0 0x24,0x18,0x00,0x00 = addiu $t8, $zero, 0 0x24,0x19,0x00,0x00 = addiu $t9, $zero, 0 0x24,0x1a,0x00,0x00 = addiu $k0, $zero, 0 0x24,0x1b,0x00,0x00 = addiu $k1, $zero, 0 0x24,0x1c,0x00,0x00 = addiu $gp, $zero, 0 0x24,0x1d,0x00,0x00 = addiu $sp, $zero, 0 0x24,0x1e,0x00,0x00 = addiu $fp, $zero, 0 0x24,0x1f,0x00,0x00 = addiu $sp, $zero, 0 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips64-alu-instructions.s.cs010066400017500001750000000033731363402546700240730ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS64, None 0x24,0x48,0xc7,0x00 = and $9, $6, $7 0x67,0x45,0xc9,0x30 = andi $9, $6, 17767 0x67,0x45,0xc9,0x30 = andi $9, $6, 17767 0x21,0x30,0xe6,0x70 = clo $6, $7 0x20,0x30,0xe6,0x70 = clz $6, $7 0x84,0x61,0x33,0x7d = ins $19, $9, 6, 7 0x27,0x48,0xc7,0x00 = nor $9, $6, $7 0x25,0x18,0x65,0x00 = or $3, $3, $5 0x67,0x45,0xa4,0x34 = ori $4, $5, 17767 0x67,0x45,0xc9,0x34 = ori $9, $6, 17767 0xc2,0x49,0x26,0x00 = rotr $9, $6, 7 0x46,0x48,0xe6,0x00 = rotrv $9, $6, $7 0xc0,0x21,0x03,0x00 = sll $4, $3, 7 0x04,0x10,0xa3,0x00 = sllv $2, $3, $5 0x2a,0x18,0x65,0x00 = slt $3, $3, $5 0x67,0x00,0x63,0x28 = slti $3, $3, 103 0x67,0x00,0x63,0x28 = slti $3, $3, 103 0x67,0x00,0x63,0x2c = sltiu $3, $3, 103 0x2b,0x18,0x65,0x00 = sltu $3, $3, $5 0xc3,0x21,0x03,0x00 = sra $4, $3, 7 0x07,0x10,0xa3,0x00 = srav $2, $3, $5 0xc2,0x21,0x03,0x00 = srl $4, $3, 7 0x06,0x10,0xa3,0x00 = srlv $2, $3, $5 0x26,0x18,0x65,0x00 = xor $3, $3, $5 0x67,0x45,0xc9,0x38 = xori $9, $6, 17767 0x67,0x45,0xc9,0x38 = xori $9, $6, 17767 0xa0,0x30,0x07,0x7c = wsbh $6, $7 0x27,0x38,0x00,0x01 = not $7, $8 0x2c,0x48,0xc7,0x00 = dadd $9, $6, $7 0x67,0x45,0xc9,0x60 = daddi $9, $6, 17767 0x67,0xc5,0xc9,0x64 = daddiu $9, $6, -15001 0x67,0x45,0xc9,0x60 = daddi $9, $6, 17767 0x67,0x45,0x29,0x61 = daddi $9, $9, 17767 0x67,0xc5,0xc9,0x64 = daddiu $9, $6, -15001 0x67,0xc5,0x29,0x65 = daddiu $9, $9, -15001 0x2d,0x48,0xc7,0x00 = daddu $9, $6, $7 0x3a,0x4d,0x26,0x00 = drotr $9, $6, 20 0x3e,0x4d,0x26,0x00 = drotr32 $9, $6, 52 0x00,0x00,0xc7,0x70 = madd $6, $7 0x01,0x00,0xc7,0x70 = maddu $6, $7 0x04,0x00,0xc7,0x70 = msub $6, $7 0x05,0x00,0xc7,0x70 = msubu $6, $7 0x18,0x00,0x65,0x00 = mult $3, $5 0x19,0x00,0x65,0x00 = multu $3, $5 0x2f,0x20,0x65,0x00 = dsubu $4, $3, $5 0x2d,0x38,0x00,0x01 = move $7, $8 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips64-instructions.s.cs010066400017500001750000000001671363402546700233120ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS64, None 0x81,0x00,0x42,0x4d = ldxc1 $f2, $2($10) 0x09,0x40,0x24,0x4f = sdxc1 $f8, $4($25) capstone-sys-0.11.0/capstone/suite/MC/Mips/mips64-register-names.s.cs010066400017500001750000000026341363402546700234740ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None 0x64,0x00,0x00,0x00 = daddiu $zero, $zero, 0 0x64,0x01,0x00,0x00 = daddiu $at, $zero, 0 0x64,0x02,0x00,0x00 = daddiu $v0, $zero, 0 0x64,0x03,0x00,0x00 = daddiu $v1, $zero, 0 0x64,0x04,0x00,0x00 = daddiu $a0, $zero, 0 0x64,0x05,0x00,0x00 = daddiu $a1, $zero, 0 0x64,0x06,0x00,0x00 = daddiu $a2, $zero, 0 0x64,0x07,0x00,0x00 = daddiu $a2, $zero, 0 0x64,0x08,0x00,0x00 = daddiu $a4, $zero, 0 0x64,0x09,0x00,0x00 = daddiu $a5, $zero, 0 0x64,0x0a,0x00,0x00 = daddiu $a6, $zero, 0 0x64,0x0b,0x00,0x00 = daddiu $a7, $zero, 0 0x64,0x0c,0x00,0x00 = daddiu $t4, $zero, 0 0x64,0x0d,0x00,0x00 = daddiu $t5, $zero, 0 0x64,0x0e,0x00,0x00 = daddiu $t6, $zero, 0 0x64,0x0f,0x00,0x00 = daddiu $t7, $zero, 0 0x64,0x10,0x00,0x00 = daddiu $s0, $zero, 0 0x64,0x11,0x00,0x00 = daddiu $s1, $zero, 0 0x64,0x12,0x00,0x00 = daddiu $s2, $zero, 0 0x64,0x13,0x00,0x00 = daddiu $s3, $zero, 0 0x64,0x14,0x00,0x00 = daddiu $s4, $zero, 0 0x64,0x15,0x00,0x00 = daddiu $s5, $zero, 0 0x64,0x16,0x00,0x00 = daddiu $s6, $zero, 0 0x64,0x17,0x00,0x00 = daddiu $s7, $zero, 0 0x64,0x18,0x00,0x00 = daddiu $t8, $zero, 0 0x64,0x19,0x00,0x00 = daddiu $t9, $zero, 0 0x64,0x1a,0x00,0x00 = daddiu $kt0, $zero, 0 0x64,0x1b,0x00,0x00 = daddiu $kt1, $zero, 0 0x64,0x1c,0x00,0x00 = daddiu $gp, $zero, 0 0x64,0x1d,0x00,0x00 = daddiu $sp, $zero, 0 0x64,0x1e,0x00,0x00 = daddiu $s8, $zero, 0 0x64,0x1f,0x00,0x00 = daddiu $ra, $zero, 0 capstone-sys-0.11.0/capstone/suite/MC/Mips/mips_directives.s.cs010066400017500001750000000006071363402546700226160ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x10,0x00,0x01,0x4d = b 1332 0x08,0x00,0x01,0x4c = j 1328 0x0c,0x00,0x01,0x4c = jal 1328 0x10,0x00,0x01,0x4d = b 1332 0x00,0x00,0x00,0x00 = nop 0x08,0x00,0x01,0x4c = j 1328 0x00,0x00,0x00,0x00 = nop 0x0c,0x00,0x01,0x4c = jal 1328 0x00,0x00,0x00,0x00 = nop 0x46,0x00,0x39,0x85 = abs.s $f6, $f7 0x01,0xef,0x18,0x24 = and $3, $15, $15 capstone-sys-0.11.0/capstone/suite/MC/Mips/nabi-regs.s.cs010066400017500001750000000007531363402546700212760ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None 0x02,0x04,0x80,0x20 = add $16, $16, $4 0x02,0x06,0x80,0x20 = add $16, $16, $6 0x02,0x07,0x80,0x20 = add $16, $16, $7 0x02,0x08,0x80,0x20 = add $16, $16, $8 0x02,0x09,0x80,0x20 = add $16, $16, $9 0x02,0x0a,0x80,0x20 = add $16, $16, $10 0x02,0x0b,0x80,0x20 = add $16, $16, $11 0x02,0x0c,0x80,0x20 = add $16, $16, $12 0x02,0x0d,0x80,0x20 = add $16, $16, $13 0x02,0x0e,0x80,0x20 = add $16, $16, $14 0x02,0x0f,0x80,0x20 = add $16, $16, $15 capstone-sys-0.11.0/capstone/suite/MC/Mips/set-at-directive.s.cs010066400017500001750000000002651363402546700225760ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32, None 0x08,0x00,0x60,0x00 = jr $3 0x08,0x00,0x80,0x03 = jr $gp 0x08,0x00,0xc0,0x03 = jr $fp 0x08,0x00,0xa0,0x03 = jr $sp 0x08,0x00,0xe0,0x03 = jr $ra capstone-sys-0.11.0/capstone/suite/MC/Mips/test_2r.s.cs010066400017500001750000000012041363402546700210010ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x7b,0x00,0x4f,0x9e = fill.b $w30, $9 0x7b,0x01,0xbf,0xde = fill.h $w31, $23 0x7b,0x02,0xc4,0x1e = fill.w $w16, $24 0x7b,0x08,0x05,0x5e = nloc.b $w21, $w0 0x7b,0x09,0xfc,0x9e = nloc.h $w18, $w31 0x7b,0x0a,0xb8,0x9e = nloc.w $w2, $w23 0x7b,0x0b,0x51,0x1e = nloc.d $w4, $w10 0x7b,0x0c,0x17,0xde = nlzc.b $w31, $w2 0x7b,0x0d,0xb6,0xde = nlzc.h $w27, $w22 0x7b,0x0e,0xea,0x9e = nlzc.w $w10, $w29 0x7b,0x0f,0x4e,0x5e = nlzc.d $w25, $w9 0x7b,0x04,0x95,0x1e = pcnt.b $w20, $w18 0x7b,0x05,0x40,0x1e = pcnt.h $w0, $w8 0x7b,0x06,0x4d,0xde = pcnt.w $w23, $w9 0x7b,0x07,0xc5,0x5e = pcnt.d $w21, $w24 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_2rf.s.cs010066400017500001750000000025511363402546700211550ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x7b,0x20,0x66,0x9e = fclass.w $w26, $w12 0x7b,0x21,0x8e,0x1e = fclass.d $w24, $w17 0x7b,0x30,0x02,0x1e = fexupl.w $w8, $w0 0x7b,0x31,0xec,0x5e = fexupl.d $w17, $w29 0x7b,0x32,0x23,0x5e = fexupr.w $w13, $w4 0x7b,0x33,0x11,0x5e = fexupr.d $w5, $w2 0x7b,0x3c,0xed,0x1e = ffint_s.w $w20, $w29 0x7b,0x3d,0x7b,0x1e = ffint_s.d $w12, $w15 0x7b,0x3e,0xd9,0xde = ffint_u.w $w7, $w27 0x7b,0x3f,0x84,0xde = ffint_u.d $w19, $w16 0x7b,0x34,0x6f,0xde = ffql.w $w31, $w13 0x7b,0x35,0x6b,0x1e = ffql.d $w12, $w13 0x7b,0x36,0xf6,0xde = ffqr.w $w27, $w30 0x7b,0x37,0x7f,0x9e = ffqr.d $w30, $w15 0x7b,0x2e,0xfe,0x5e = flog2.w $w25, $w31 0x7b,0x2f,0x54,0x9e = flog2.d $w18, $w10 0x7b,0x2c,0x79,0xde = frint.w $w7, $w15 0x7b,0x2d,0xb5,0x5e = frint.d $w21, $w22 0x7b,0x2a,0x04,0xde = frcp.w $w19, $w0 0x7b,0x2b,0x71,0x1e = frcp.d $w4, $w14 0x7b,0x28,0x8b,0x1e = frsqrt.w $w12, $w17 0x7b,0x29,0x5d,0xde = frsqrt.d $w23, $w11 0x7b,0x26,0x58,0x1e = fsqrt.w $w0, $w11 0x7b,0x27,0x63,0xde = fsqrt.d $w15, $w12 0x7b,0x38,0x2f,0x9e = ftint_s.w $w30, $w5 0x7b,0x39,0xb9,0x5e = ftint_s.d $w5, $w23 0x7b,0x3a,0x75,0x1e = ftint_u.w $w20, $w14 0x7b,0x3b,0xad,0xde = ftint_u.d $w23, $w21 0x7b,0x22,0x8f,0x5e = ftrunc_s.w $w29, $w17 0x7b,0x23,0xdb,0x1e = ftrunc_s.d $w12, $w27 0x7b,0x24,0x7c,0x5e = ftrunc_u.w $w17, $w15 0x7b,0x25,0xd9,0x5e = ftrunc_u.d $w5, $w27 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_3r.s.cs010066400017500001750000000257151363402546700210170ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x04,0x4e,0x90 = add_a.b $w26, $w9, $w4 0x78,0x3f,0xdd,0xd0 = add_a.h $w23, $w27, $w31 0x78,0x56,0x32,0xd0 = add_a.w $w11, $w6, $w22 0x78,0x60,0x51,0x90 = add_a.d $w6, $w10, $w0 0x78,0x93,0xc4,0xd0 = adds_a.b $w19, $w24, $w19 0x78,0xa4,0x36,0x50 = adds_a.h $w25, $w6, $w4 0x78,0xdb,0x8e,0x50 = adds_a.w $w25, $w17, $w27 0x78,0xfa,0x93,0xd0 = adds_a.d $w15, $w18, $w26 0x79,0x13,0x5f,0x50 = adds_s.b $w29, $w11, $w19 0x79,0x3a,0xb9,0x50 = adds_s.h $w5, $w23, $w26 0x79,0x4d,0x74,0x10 = adds_s.w $w16, $w14, $w13 0x79,0x7c,0x70,0x90 = adds_s.d $w2, $w14, $w28 0x79,0x8e,0x88,0xd0 = adds_u.b $w3, $w17, $w14 0x79,0xa4,0xf2,0x90 = adds_u.h $w10, $w30, $w4 0x79,0xd4,0x93,0xd0 = adds_u.w $w15, $w18, $w20 0x79,0xe9,0x57,0x90 = adds_u.d $w30, $w10, $w9 0x78,0x15,0xa6,0x0e = addv.b $w24, $w20, $w21 0x78,0x3b,0x69,0x0e = addv.h $w4, $w13, $w27 0x78,0x4e,0x5c,0xce = addv.w $w19, $w11, $w14 0x78,0x7f,0xa8,0x8e = addv.d $w2, $w21, $w31 0x7a,0x03,0x85,0xd1 = asub_s.b $w23, $w16, $w3 0x7a,0x39,0x8d,0x91 = asub_s.h $w22, $w17, $w25 0x7a,0x49,0x0e,0x11 = asub_s.w $w24, $w1, $w9 0x7a,0x6c,0x63,0x51 = asub_s.d $w13, $w12, $w12 0x7a,0x8b,0xea,0x91 = asub_u.b $w10, $w29, $w11 0x7a,0xaf,0x4c,0x91 = asub_u.h $w18, $w9, $w15 0x7a,0xdf,0x9a,0x91 = asub_u.w $w10, $w19, $w31 0x7a,0xe0,0x54,0x51 = asub_u.d $w17, $w10, $w0 0x7a,0x01,0x28,0x90 = ave_s.b $w2, $w5, $w1 0x7a,0x29,0x9c,0x10 = ave_s.h $w16, $w19, $w9 0x7a,0x45,0xfc,0x50 = ave_s.w $w17, $w31, $w5 0x7a,0x6a,0xce,0xd0 = ave_s.d $w27, $w25, $w10 0x7a,0x89,0x9c,0x10 = ave_u.b $w16, $w19, $w9 0x7a,0xab,0xe7,0x10 = ave_u.h $w28, $w28, $w11 0x7a,0xcb,0x62,0xd0 = ave_u.w $w11, $w12, $w11 0x7a,0xfc,0x9f,0x90 = ave_u.d $w30, $w19, $w28 0x7b,0x02,0x86,0x90 = aver_s.b $w26, $w16, $w2 0x7b,0x3b,0xdf,0xd0 = aver_s.h $w31, $w27, $w27 0x7b,0x59,0x97,0x10 = aver_s.w $w28, $w18, $w25 0x7b,0x7b,0xaf,0x50 = aver_s.d $w29, $w21, $w27 0x7b,0x83,0xd7,0x50 = aver_u.b $w29, $w26, $w3 0x7b,0xa9,0x94,0x90 = aver_u.h $w18, $w18, $w9 0x7b,0xdd,0xcc,0x50 = aver_u.w $w17, $w25, $w29 0x7b,0xf3,0xb5,0x90 = aver_u.d $w22, $w22, $w19 0x79,0x9d,0x78,0x8d = bclr.b $w2, $w15, $w29 0x79,0xbc,0xac,0x0d = bclr.h $w16, $w21, $w28 0x79,0xc9,0x14,0xcd = bclr.w $w19, $w2, $w9 0x79,0xe4,0xfe,0xcd = bclr.d $w27, $w31, $w4 0x7b,0x18,0x81,0x4d = binsl.b $w5, $w16, $w24 0x7b,0x2a,0x2f,0x8d = binsl.h $w30, $w5, $w10 0x7b,0x4d,0x7b,0x8d = binsl.w $w14, $w15, $w13 0x7b,0x6c,0xa5,0xcd = binsl.d $w23, $w20, $w12 0x7b,0x82,0x5d,0x8d = binsr.b $w22, $w11, $w2 0x7b,0xa6,0xd0,0x0d = binsr.h $w0, $w26, $w6 0x7b,0xdc,0x1e,0x8d = binsr.w $w26, $w3, $w28 0x7b,0xf5,0x00,0x0d = binsr.d $w0, $w0, $w21 0x7a,0x98,0x58,0x0d = bneg.b $w0, $w11, $w24 0x7a,0xa4,0x87,0x0d = bneg.h $w28, $w16, $w4 0x7a,0xd3,0xd0,0xcd = bneg.w $w3, $w26, $w19 0x7a,0xef,0xeb,0x4d = bneg.d $w13, $w29, $w15 0x7a,0x1f,0x2f,0xcd = bset.b $w31, $w5, $w31 0x7a,0x26,0x63,0x8d = bset.h $w14, $w12, $w6 0x7a,0x4c,0x4f,0xcd = bset.w $w31, $w9, $w12 0x7a,0x65,0xb1,0x4d = bset.d $w5, $w22, $w5 0x78,0x12,0xff,0xcf = ceq.b $w31, $w31, $w18 0x78,0x29,0xda,0x8f = ceq.h $w10, $w27, $w9 0x78,0x4e,0x2a,0x4f = ceq.w $w9, $w5, $w14 0x78,0x60,0x89,0x4f = ceq.d $w5, $w17, $w0 0x7a,0x09,0x25,0xcf = cle_s.b $w23, $w4, $w9 0x7a,0x33,0xdd,0x8f = cle_s.h $w22, $w27, $w19 0x7a,0x4a,0xd7,0x8f = cle_s.w $w30, $w26, $w10 0x7a,0x6a,0x2c,0x8f = cle_s.d $w18, $w5, $w10 0x7a,0x80,0xc8,0x4f = cle_u.b $w1, $w25, $w0 0x7a,0xbd,0x01,0xcf = cle_u.h $w7, $w0, $w29 0x7a,0xc1,0x96,0x4f = cle_u.w $w25, $w18, $w1 0x7a,0xfe,0x01,0x8f = cle_u.d $w6, $w0, $w30 0x79,0x15,0x16,0x4f = clt_s.b $w25, $w2, $w21 0x79,0x29,0x98,0x8f = clt_s.h $w2, $w19, $w9 0x79,0x50,0x45,0xcf = clt_s.w $w23, $w8, $w16 0x79,0x6c,0xf1,0xcf = clt_s.d $w7, $w30, $w12 0x79,0x8d,0xf8,0x8f = clt_u.b $w2, $w31, $w13 0x79,0xb7,0xfc,0x0f = clt_u.h $w16, $w31, $w23 0x79,0xc9,0xc0,0xcf = clt_u.w $w3, $w24, $w9 0x79,0xe1,0x01,0xcf = clt_u.d $w7, $w0, $w1 0x7a,0x12,0x1f,0x52 = div_s.b $w29, $w3, $w18 0x7a,0x2d,0x84,0x52 = div_s.h $w17, $w16, $w13 0x7a,0x5e,0xc9,0x12 = div_s.w $w4, $w25, $w30 0x7a,0x74,0x4f,0xd2 = div_s.d $w31, $w9, $w20 0x7a,0x8a,0xe9,0x92 = div_u.b $w6, $w29, $w10 0x7a,0xae,0xae,0x12 = div_u.h $w24, $w21, $w14 0x7a,0xd9,0x77,0x52 = div_u.w $w29, $w14, $w25 0x7a,0xf5,0x0f,0xd2 = div_u.d $w31, $w1, $w21 0x78,0x39,0xb5,0xd3 = dotp_s.h $w23, $w22, $w25 0x78,0x45,0x75,0x13 = dotp_s.w $w20, $w14, $w5 0x78,0x76,0x14,0x53 = dotp_s.d $w17, $w2, $w22 0x78,0xa6,0x13,0x53 = dotp_u.h $w13, $w2, $w6 0x78,0xd5,0xb3,0xd3 = dotp_u.w $w15, $w22, $w21 0x78,0xfa,0x81,0x13 = dotp_u.d $w4, $w16, $w26 0x79,0x36,0xe0,0x53 = dpadd_s.h $w1, $w28, $w22 0x79,0x4c,0x0a,0x93 = dpadd_s.w $w10, $w1, $w12 0x79,0x7b,0xa8,0xd3 = dpadd_s.d $w3, $w21, $w27 0x79,0xb4,0x2c,0x53 = dpadd_u.h $w17, $w5, $w20 0x79,0xd0,0x46,0x13 = dpadd_u.w $w24, $w8, $w16 0x79,0xf0,0xeb,0xd3 = dpadd_u.d $w15, $w29, $w16 0x7a,0x2c,0x59,0x13 = dpsub_s.h $w4, $w11, $w12 0x7a,0x46,0x39,0x13 = dpsub_s.w $w4, $w7, $w6 0x7a,0x7c,0x67,0xd3 = dpsub_s.d $w31, $w12, $w28 0x7a,0xb1,0xc9,0x13 = dpsub_u.h $w4, $w25, $w17 0x7a,0xd0,0xcc,0xd3 = dpsub_u.w $w19, $w25, $w16 0x7a,0xfa,0x51,0xd3 = dpsub_u.d $w7, $w10, $w26 0x7a,0x22,0xc7,0x15 = hadd_s.h $w28, $w24, $w2 0x7a,0x4b,0x8e,0x15 = hadd_s.w $w24, $w17, $w11 0x7a,0x74,0x7c,0x55 = hadd_s.d $w17, $w15, $w20 0x7a,0xb1,0xeb,0x15 = hadd_u.h $w12, $w29, $w17 0x7a,0xc6,0x2a,0x55 = hadd_u.w $w9, $w5, $w6 0x7a,0xe6,0xa0,0x55 = hadd_u.d $w1, $w20, $w6 0x7b,0x3d,0x74,0x15 = hsub_s.h $w16, $w14, $w29 0x7b,0x4b,0x6a,0x55 = hsub_s.w $w9, $w13, $w11 0x7b,0x6e,0x97,0x95 = hsub_s.d $w30, $w18, $w14 0x7b,0xae,0x61,0xd5 = hsub_u.h $w7, $w12, $w14 0x7b,0xc5,0x2d,0x55 = hsub_u.w $w21, $w5, $w5 0x7b,0xff,0x62,0xd5 = hsub_u.d $w11, $w12, $w31 0x7b,0x1e,0x84,0x94 = ilvev.b $w18, $w16, $w30 0x7b,0x2d,0x03,0x94 = ilvev.h $w14, $w0, $w13 0x7b,0x56,0xcb,0x14 = ilvev.w $w12, $w25, $w22 0x7b,0x63,0xdf,0x94 = ilvev.d $w30, $w27, $w3 0x7a,0x15,0x1f,0x54 = ilvl.b $w29, $w3, $w21 0x7a,0x31,0x56,0xd4 = ilvl.h $w27, $w10, $w17 0x7a,0x40,0x09,0x94 = ilvl.w $w6, $w1, $w0 0x7a,0x78,0x80,0xd4 = ilvl.d $w3, $w16, $w24 0x7b,0x94,0x2a,0xd4 = ilvod.b $w11, $w5, $w20 0x7b,0xbf,0x6c,0x94 = ilvod.h $w18, $w13, $w31 0x7b,0xd8,0x87,0x54 = ilvod.w $w29, $w16, $w24 0x7b,0xfd,0x65,0x94 = ilvod.d $w22, $w12, $w29 0x7a,0x86,0xf1,0x14 = ilvr.b $w4, $w30, $w6 0x7a,0xbd,0x9f,0x14 = ilvr.h $w28, $w19, $w29 0x7a,0xd5,0xa4,0x94 = ilvr.w $w18, $w20, $w21 0x7a,0xec,0xf5,0xd4 = ilvr.d $w23, $w30, $w12 0x78,0x9d,0xfc,0x52 = maddv.b $w17, $w31, $w29 0x78,0xa9,0xc1,0xd2 = maddv.h $w7, $w24, $w9 0x78,0xd4,0xb5,0x92 = maddv.w $w22, $w22, $w20 0x78,0xf4,0xd7,0x92 = maddv.d $w30, $w26, $w20 0x7b,0x17,0x5d,0xce = max_a.b $w23, $w11, $w23 0x7b,0x3e,0x2d,0x0e = max_a.h $w20, $w5, $w30 0x7b,0x5e,0x91,0xce = max_a.w $w7, $w18, $w30 0x7b,0x7f,0x42,0x0e = max_a.d $w8, $w8, $w31 0x79,0x13,0x0a,0x8e = max_s.b $w10, $w1, $w19 0x79,0x31,0xeb,0xce = max_s.h $w15, $w29, $w17 0x79,0x4e,0xeb,0xce = max_s.w $w15, $w29, $w14 0x79,0x63,0xc6,0x4e = max_s.d $w25, $w24, $w3 0x79,0x85,0xc3,0x0e = max_u.b $w12, $w24, $w5 0x79,0xa7,0x31,0x4e = max_u.h $w5, $w6, $w7 0x79,0xc7,0x24,0x0e = max_u.w $w16, $w4, $w7 0x79,0xf8,0x66,0x8e = max_u.d $w26, $w12, $w24 0x7b,0x81,0xd1,0x0e = min_a.b $w4, $w26, $w1 0x7b,0xbf,0x6b,0x0e = min_a.h $w12, $w13, $w31 0x7b,0xc0,0xa7,0x0e = min_a.w $w28, $w20, $w0 0x7b,0xf3,0xa3,0x0e = min_a.d $w12, $w20, $w19 0x7a,0x0e,0x1c,0xce = min_s.b $w19, $w3, $w14 0x7a,0x28,0xae,0xce = min_s.h $w27, $w21, $w8 0x7a,0x5e,0x70,0x0e = min_s.w $w0, $w14, $w30 0x7a,0x75,0x41,0x8e = min_s.d $w6, $w8, $w21 0x7a,0x88,0xd5,0x8e = min_u.b $w22, $w26, $w8 0x7a,0xac,0xd9,0xce = min_u.h $w7, $w27, $w12 0x7a,0xce,0xa2,0x0e = min_u.w $w8, $w20, $w14 0x7a,0xef,0x76,0x8e = min_u.d $w26, $w14, $w15 0x7b,0x1a,0x0c,0x92 = mod_s.b $w18, $w1, $w26 0x7b,0x3c,0xf7,0xd2 = mod_s.h $w31, $w30, $w28 0x7b,0x4d,0x30,0x92 = mod_s.w $w2, $w6, $w13 0x7b,0x76,0xdd,0x52 = mod_s.d $w21, $w27, $w22 0x7b,0x8d,0x3c,0x12 = mod_u.b $w16, $w7, $w13 0x7b,0xa7,0x46,0x12 = mod_u.h $w24, $w8, $w7 0x7b,0xd1,0x17,0x92 = mod_u.w $w30, $w2, $w17 0x7b,0xf9,0x17,0xd2 = mod_u.d $w31, $w2, $w25 0x79,0x0c,0x2b,0x92 = msubv.b $w14, $w5, $w12 0x79,0x3e,0x39,0x92 = msubv.h $w6, $w7, $w30 0x79,0x55,0x13,0x52 = msubv.w $w13, $w2, $w21 0x79,0x7b,0x74,0x12 = msubv.d $w16, $w14, $w27 0x78,0x0d,0x1d,0x12 = mulv.b $w20, $w3, $w13 0x78,0x2e,0xd6,0xd2 = mulv.h $w27, $w26, $w14 0x78,0x43,0xea,0x92 = mulv.w $w10, $w29, $w3 0x78,0x7d,0x99,0xd2 = mulv.d $w7, $w19, $w29 0x79,0x07,0xd9,0x54 = pckev.b $w5, $w27, $w7 0x79,0x3b,0x20,0x54 = pckev.h $w1, $w4, $w27 0x79,0x40,0xa7,0x94 = pckev.w $w30, $w20, $w0 0x79,0x6f,0x09,0x94 = pckev.d $w6, $w1, $w15 0x79,0x9e,0xe4,0x94 = pckod.b $w18, $w28, $w30 0x79,0xa8,0x2e,0x94 = pckod.h $w26, $w5, $w8 0x79,0xc2,0x22,0x54 = pckod.w $w9, $w4, $w2 0x79,0xf4,0xb7,0x94 = pckod.d $w30, $w22, $w20 0x78,0x0c,0xb9,0x54 = sld.b $w5, $w23[$12] 0x78,0x23,0xb8,0x54 = sld.h $w1, $w23[$3] 0x78,0x49,0x45,0x14 = sld.w $w20, $w8[$9] 0x78,0x7e,0xb9,0xd4 = sld.d $w7, $w23[$fp] 0x78,0x11,0x00,0xcd = sll.b $w3, $w0, $w17 0x78,0x23,0xdc,0x4d = sll.h $w17, $w27, $w3 0x78,0x46,0x3c,0x0d = sll.w $w16, $w7, $w6 0x78,0x7a,0x02,0x4d = sll.d $w9, $w0, $w26 0x78,0x81,0x0f,0x14 = splat.b $w28, $w1[$1] 0x78,0xab,0x58,0x94 = splat.h $w2, $w11[$11] 0x78,0xcb,0x05,0x94 = splat.w $w22, $w0[$11] 0x78,0xe2,0x00,0x14 = splat.d $w0, $w0[$2] 0x78,0x91,0x27,0x0d = sra.b $w28, $w4, $w17 0x78,0xa3,0x4b,0x4d = sra.h $w13, $w9, $w3 0x78,0xd3,0xae,0xcd = sra.w $w27, $w21, $w19 0x78,0xf7,0x47,0x8d = sra.d $w30, $w8, $w23 0x78,0x92,0x94,0xd5 = srar.b $w19, $w18, $w18 0x78,0xa8,0xb9,0xd5 = srar.h $w7, $w23, $w8 0x78,0xc2,0x60,0x55 = srar.w $w1, $w12, $w2 0x78,0xee,0x3d,0x55 = srar.d $w21, $w7, $w14 0x79,0x13,0x1b,0x0d = srl.b $w12, $w3, $w19 0x79,0x34,0xfd,0xcd = srl.h $w23, $w31, $w20 0x79,0x4b,0xdc,0x8d = srl.w $w18, $w27, $w11 0x79,0x7a,0x60,0xcd = srl.d $w3, $w12, $w26 0x79,0x0b,0xab,0xd5 = srlr.b $w15, $w21, $w11 0x79,0x33,0x6d,0x55 = srlr.h $w21, $w13, $w19 0x79,0x43,0xf1,0x95 = srlr.w $w6, $w30, $w3 0x79,0x6e,0x10,0x55 = srlr.d $w1, $w2, $w14 0x78,0x01,0x7e,0x51 = subs_s.b $w25, $w15, $w1 0x78,0x36,0xcf,0x11 = subs_s.h $w28, $w25, $w22 0x78,0x55,0x62,0x91 = subs_s.w $w10, $w12, $w21 0x78,0x72,0xa1,0x11 = subs_s.d $w4, $w20, $w18 0x78,0x99,0x35,0x51 = subs_u.b $w21, $w6, $w25 0x78,0xa7,0x50,0xd1 = subs_u.h $w3, $w10, $w7 0x78,0xca,0x7a,0x51 = subs_u.w $w9, $w15, $w10 0x78,0xea,0x99,0xd1 = subs_u.d $w7, $w19, $w10 0x79,0x0c,0x39,0x91 = subsus_u.b $w6, $w7, $w12 0x79,0x33,0xe9,0x91 = subsus_u.h $w6, $w29, $w19 0x79,0x47,0x79,0xd1 = subsus_u.w $w7, $w15, $w7 0x79,0x6f,0x1a,0x51 = subsus_u.d $w9, $w3, $w15 0x79,0x9f,0x1d,0x91 = subsuu_s.b $w22, $w3, $w31 0x79,0xb6,0xbc,0xd1 = subsuu_s.h $w19, $w23, $w22 0x79,0xcd,0x52,0x51 = subsuu_s.w $w9, $w10, $w13 0x79,0xe0,0x31,0x51 = subsuu_s.d $w5, $w6, $w0 0x78,0x93,0x69,0x8e = subv.b $w6, $w13, $w19 0x78,0xac,0xc9,0x0e = subv.h $w4, $w25, $w12 0x78,0xcb,0xde,0xce = subv.w $w27, $w27, $w11 0x78,0xea,0xc2,0x4e = subv.d $w9, $w24, $w10 0x78,0x05,0x80,0xd5 = vshf.b $w3, $w16, $w5 0x78,0x28,0x9d,0x15 = vshf.h $w20, $w19, $w8 0x78,0x59,0xf4,0x15 = vshf.w $w16, $w30, $w25 0x78,0x6f,0x5c,0xd5 = vshf.d $w19, $w11, $w15 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_3rf.s.cs010066400017500001750000000073531363402546700211630ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x1c,0x9f,0x1b = fadd.w $w28, $w19, $w28 0x78,0x3d,0x13,0x5b = fadd.d $w13, $w2, $w29 0x78,0x19,0x5b,0x9a = fcaf.w $w14, $w11, $w25 0x78,0x33,0x08,0x5a = fcaf.d $w1, $w1, $w19 0x78,0x90,0xb8,0x5a = fceq.w $w1, $w23, $w16 0x78,0xb0,0x40,0x1a = fceq.d $w0, $w8, $w16 0x79,0x98,0x4c,0x1a = fcle.w $w16, $w9, $w24 0x79,0xa1,0x76,0xda = fcle.d $w27, $w14, $w1 0x79,0x08,0x47,0x1a = fclt.w $w28, $w8, $w8 0x79,0x2b,0xcf,0x9a = fclt.d $w30, $w25, $w11 0x78,0xd7,0x90,0x9c = fcne.w $w2, $w18, $w23 0x78,0xef,0xa3,0x9c = fcne.d $w14, $w20, $w15 0x78,0x59,0x92,0x9c = fcor.w $w10, $w18, $w25 0x78,0x6b,0xcc,0x5c = fcor.d $w17, $w25, $w11 0x78,0xd5,0x13,0x9a = fcueq.w $w14, $w2, $w21 0x78,0xe7,0x1f,0x5a = fcueq.d $w29, $w3, $w7 0x79,0xc3,0x2c,0x5a = fcule.w $w17, $w5, $w3 0x79,0xfe,0x0f,0xda = fcule.d $w31, $w1, $w30 0x79,0x49,0xc9,0x9a = fcult.w $w6, $w25, $w9 0x79,0x71,0x46,0xda = fcult.d $w27, $w8, $w17 0x78,0x48,0xa1,0x1a = fcun.w $w4, $w20, $w8 0x78,0x63,0x5f,0x5a = fcun.d $w29, $w11, $w3 0x78,0x93,0x93,0x5c = fcune.w $w13, $w18, $w19 0x78,0xb5,0xd4,0x1c = fcune.d $w16, $w26, $w21 0x78,0xc2,0xc3,0x5b = fdiv.w $w13, $w24, $w2 0x78,0xf9,0x24,0xdb = fdiv.d $w19, $w4, $w25 0x7a,0x10,0x02,0x1b = fexdo.h $w8, $w0, $w16 0x7a,0x3b,0x68,0x1b = fexdo.w $w0, $w13, $w27 0x79,0xc3,0x04,0x5b = fexp2.w $w17, $w0, $w3 0x79,0xea,0x05,0x9b = fexp2.d $w22, $w0, $w10 0x79,0x17,0x37,0x5b = fmadd.w $w29, $w6, $w23 0x79,0x35,0xe2,0xdb = fmadd.d $w11, $w28, $w21 0x7b,0x8d,0xb8,0x1b = fmax.w $w0, $w23, $w13 0x7b,0xa8,0x96,0x9b = fmax.d $w26, $w18, $w8 0x7b,0xca,0x82,0x9b = fmax_a.w $w10, $w16, $w10 0x7b,0xf6,0x4f,0x9b = fmax_a.d $w30, $w9, $w22 0x7b,0x1e,0x0e,0x1b = fmin.w $w24, $w1, $w30 0x7b,0x2a,0xde,0xdb = fmin.d $w27, $w27, $w10 0x7b,0x54,0xea,0x9b = fmin_a.w $w10, $w29, $w20 0x7b,0x78,0xf3,0x5b = fmin_a.d $w13, $w30, $w24 0x79,0x40,0xcc,0x5b = fmsub.w $w17, $w25, $w0 0x79,0x70,0x92,0x1b = fmsub.d $w8, $w18, $w16 0x78,0x8f,0x78,0xdb = fmul.w $w3, $w15, $w15 0x78,0xaa,0xf2,0x5b = fmul.d $w9, $w30, $w10 0x7a,0x0a,0x2e,0x5a = fsaf.w $w25, $w5, $w10 0x7a,0x3d,0x1e,0x5a = fsaf.d $w25, $w3, $w29 0x7a,0x8d,0x8a,0xda = fseq.w $w11, $w17, $w13 0x7a,0xbf,0x07,0x5a = fseq.d $w29, $w0, $w31 0x7b,0x9f,0xff,0x9a = fsle.w $w30, $w31, $w31 0x7b,0xb8,0xbc,0x9a = fsle.d $w18, $w23, $w24 0x7b,0x06,0x2b,0x1a = fslt.w $w12, $w5, $w6 0x7b,0x35,0xd4,0x1a = fslt.d $w16, $w26, $w21 0x7a,0xcc,0x0f,0x9c = fsne.w $w30, $w1, $w12 0x7a,0xf7,0x6b,0x9c = fsne.d $w14, $w13, $w23 0x7a,0x5b,0x6e,0xdc = fsor.w $w27, $w13, $w27 0x7a,0x6b,0xc3,0x1c = fsor.d $w12, $w24, $w11 0x78,0x41,0xd7,0xdb = fsub.w $w31, $w26, $w1 0x78,0x7b,0x8c,0xdb = fsub.d $w19, $w17, $w27 0x7a,0xd9,0xc4,0x1a = fsueq.w $w16, $w24, $w25 0x7a,0xee,0x74,0x9a = fsueq.d $w18, $w14, $w14 0x7b,0xcd,0xf5,0xda = fsule.w $w23, $w30, $w13 0x7b,0xfa,0x58,0x9a = fsule.d $w2, $w11, $w26 0x7b,0x56,0xd2,0xda = fsult.w $w11, $w26, $w22 0x7b,0x7e,0xb9,0x9a = fsult.d $w6, $w23, $w30 0x7a,0x5c,0x90,0xda = fsun.w $w3, $w18, $w28 0x7a,0x73,0x5c,0x9a = fsun.d $w18, $w11, $w19 0x7a,0x82,0xfc,0x1c = fsune.w $w16, $w31, $w2 0x7a,0xb1,0xd0,0xdc = fsune.d $w3, $w26, $w17 0x7a,0x98,0x24,0x1b = ftq.h $w16, $w4, $w24 0x7a,0xb9,0x29,0x5b = ftq.w $w5, $w5, $w25 0x79,0x4a,0xa4,0x1c = madd_q.h $w16, $w20, $w10 0x79,0x69,0x17,0x1c = madd_q.w $w28, $w2, $w9 0x7b,0x49,0x92,0x1c = maddr_q.h $w8, $w18, $w9 0x7b,0x70,0x67,0x5c = maddr_q.w $w29, $w12, $w16 0x79,0x8a,0xd6,0x1c = msub_q.h $w24, $w26, $w10 0x79,0xbc,0xf3,0x5c = msub_q.w $w13, $w30, $w28 0x7b,0x8b,0xab,0x1c = msubr_q.h $w12, $w21, $w11 0x7b,0xb4,0x70,0x5c = msubr_q.w $w1, $w14, $w20 0x79,0x1e,0x81,0x9c = mul_q.h $w6, $w16, $w30 0x79,0x24,0x0c,0x1c = mul_q.w $w16, $w1, $w4 0x7b,0x13,0xa1,0x9c = mulr_q.h $w6, $w20, $w19 0x7b,0x34,0x0e,0xdc = mulr_q.w $w27, $w1, $w20 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_bit.s.cs010066400017500001750000000041321363402546700212370ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x79,0xf2,0xf5,0x49 = bclri.b $w21, $w30, 2 0x79,0xe0,0xae,0x09 = bclri.h $w24, $w21, 0 0x79,0xc3,0xf5,0xc9 = bclri.w $w23, $w30, 3 0x79,0x80,0x5a,0x49 = bclri.d $w9, $w11, 0 0x7b,0x71,0x66,0x49 = binsli.b $w25, $w12, 1 0x7b,0x60,0xb5,0x49 = binsli.h $w21, $w22, 0 0x7b,0x40,0x25,0x89 = binsli.w $w22, $w4, 0 0x7b,0x06,0x11,0x89 = binsli.d $w6, $w2, 6 0x7b,0xf0,0x9b,0xc9 = binsri.b $w15, $w19, 0 0x7b,0xe1,0xf2,0x09 = binsri.h $w8, $w30, 1 0x7b,0xc5,0x98,0x89 = binsri.w $w2, $w19, 5 0x7b,0x81,0xa4,0x89 = binsri.d $w18, $w20, 1 0x7a,0xf0,0x9e,0x09 = bnegi.b $w24, $w19, 0 0x7a,0xe3,0x5f,0x09 = bnegi.h $w28, $w11, 3 0x7a,0xc5,0xd8,0x49 = bnegi.w $w1, $w27, 5 0x7a,0x81,0xa9,0x09 = bnegi.d $w4, $w21, 1 0x7a,0x70,0x44,0x89 = bseti.b $w18, $w8, 0 0x7a,0x62,0x76,0x09 = bseti.h $w24, $w14, 2 0x7a,0x44,0x92,0x49 = bseti.w $w9, $w18, 4 0x7a,0x01,0x79,0xc9 = bseti.d $w7, $w15, 1 0x78,0x72,0xff,0xca = sat_s.b $w31, $w31, 2 0x78,0x60,0x9c,0xca = sat_s.h $w19, $w19, 0 0x78,0x40,0xec,0xca = sat_s.w $w19, $w29, 0 0x78,0x00,0xb2,0xca = sat_s.d $w11, $w22, 0 0x78,0xf3,0x68,0x4a = sat_u.b $w1, $w13, 3 0x78,0xe4,0xc7,0x8a = sat_u.h $w30, $w24, 4 0x78,0xc0,0x6f,0xca = sat_u.w $w31, $w13, 0 0x78,0x85,0x87,0x4a = sat_u.d $w29, $w16, 5 0x78,0x71,0x55,0xc9 = slli.b $w23, $w10, 1 0x78,0x61,0x92,0x49 = slli.h $w9, $w18, 1 0x78,0x44,0xea,0xc9 = slli.w $w11, $w29, 4 0x78,0x01,0xa6,0x49 = slli.d $w25, $w20, 1 0x78,0xf1,0xee,0x09 = srai.b $w24, $w29, 1 0x78,0xe0,0x30,0x49 = srai.h $w1, $w6, 0 0x78,0xc1,0xd1,0xc9 = srai.w $w7, $w26, 1 0x78,0x83,0xcd,0x09 = srai.d $w20, $w25, 3 0x79,0x70,0xc9,0x4a = srari.b $w5, $w25, 0 0x79,0x64,0x31,0xca = srari.h $w7, $w6, 4 0x79,0x45,0x5c,0x4a = srari.w $w17, $w11, 5 0x79,0x05,0xcd,0x4a = srari.d $w21, $w25, 5 0x79,0x72,0x00,0x89 = srli.b $w2, $w0, 2 0x79,0x62,0xff,0xc9 = srli.h $w31, $w31, 2 0x79,0x44,0x49,0x49 = srli.w $w5, $w9, 4 0x79,0x05,0xd6,0xc9 = srli.d $w27, $w26, 5 0x79,0xf0,0x1c,0x8a = srlri.b $w18, $w3, 0 0x79,0xe3,0x10,0x4a = srlri.h $w1, $w2, 3 0x79,0xc2,0xb2,0xca = srlri.w $w11, $w22, 2 0x79,0x86,0x56,0x0a = srlri.d $w24, $w10, 6 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_cbranch.s.cs010066400017500001750000000006411363402546700220620ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x47,0x80,0x00,0x01 = bnz.b $w0, 4 0x47,0xa1,0x00,0x04 = bnz.h $w1, 16 0x47,0xc2,0x00,0x20 = bnz.w $w2, 128 0x47,0xe3,0xff,0xe0 = bnz.d $w3, -128 0x45,0xe0,0x00,0x01 = bnz.v $w0, 4 0x47,0x00,0x00,0x20 = bz.b $w0, 128 0x47,0x21,0x00,0x40 = bz.h $w1, 256 0x47,0x42,0x00,0x80 = bz.w $w2, 512 0x47,0x63,0xff,0x00 = bz.d $w3, -1024 0x45,0x60,0x00,0x01 = bz.v $w0, 4 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_ctrlregs.s.cs010066400017500001750000000022701363402546700223070ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x7e,0x00,0x59 = cfcmsa $1, $0 0x78,0x7e,0x00,0x59 = cfcmsa $1, $0 0x78,0x7e,0x08,0x99 = cfcmsa $2, $1 0x78,0x7e,0x08,0x99 = cfcmsa $2, $1 0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2 0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2 0x78,0x7e,0x19,0x19 = cfcmsa $4, $3 0x78,0x7e,0x19,0x19 = cfcmsa $4, $3 0x78,0x7e,0x21,0x59 = cfcmsa $5, $4 0x78,0x7e,0x21,0x59 = cfcmsa $5, $4 0x78,0x7e,0x29,0x99 = cfcmsa $6, $5 0x78,0x7e,0x29,0x99 = cfcmsa $6, $5 0x78,0x7e,0x31,0xd9 = cfcmsa $7, $6 0x78,0x7e,0x31,0xd9 = cfcmsa $7, $6 0x78,0x7e,0x3a,0x19 = cfcmsa $8, $7 0x78,0x7e,0x3a,0x19 = cfcmsa $8, $7 0x78,0x3e,0x08,0x19 = ctcmsa $0, $1 0x78,0x3e,0x08,0x19 = ctcmsa $0, $1 0x78,0x3e,0x10,0x59 = ctcmsa $1, $2 0x78,0x3e,0x10,0x59 = ctcmsa $1, $2 0x78,0x3e,0x18,0x99 = ctcmsa $2, $3 0x78,0x3e,0x18,0x99 = ctcmsa $2, $3 0x78,0x3e,0x20,0xd9 = ctcmsa $3, $4 0x78,0x3e,0x20,0xd9 = ctcmsa $3, $4 0x78,0x3e,0x29,0x19 = ctcmsa $4, $5 0x78,0x3e,0x29,0x19 = ctcmsa $4, $5 0x78,0x3e,0x31,0x59 = ctcmsa $5, $6 0x78,0x3e,0x31,0x59 = ctcmsa $5, $6 0x78,0x3e,0x39,0x99 = ctcmsa $6, $7 0x78,0x3e,0x39,0x99 = ctcmsa $6, $7 0x78,0x3e,0x41,0xd9 = ctcmsa $7, $8 0x78,0x3e,0x41,0xd9 = ctcmsa $7, $8 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_elm.s.cs010066400017500001750000000012771363402546700212450ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x82,0x43,0x59 = copy_s.b $13, $w8[2] 0x78,0xa0,0xc8,0x59 = copy_s.h $1, $w25[0] 0x78,0xb1,0x2d,0x99 = copy_s.w $22, $w5[1] 0x78,0xc4,0xa5,0x99 = copy_u.b $22, $w20[4] 0x78,0xe0,0x25,0x19 = copy_u.h $20, $w4[0] 0x78,0xf2,0x6f,0x99 = copy_u.w $fp, $w13[2] 0x78,0x04,0xe8,0x19 = sldi.b $w0, $w29[4] 0x78,0x20,0x8a,0x19 = sldi.h $w8, $w17[0] 0x78,0x32,0xdd,0x19 = sldi.w $w20, $w27[2] 0x78,0x38,0x61,0x19 = sldi.d $w4, $w12[0] 0x78,0x42,0x1e,0x59 = splati.b $w25, $w3[2] 0x78,0x61,0xe6,0x19 = splati.h $w24, $w28[1] 0x78,0x70,0x93,0x59 = splati.w $w13, $w18[0] 0x78,0x78,0x0f,0x19 = splati.d $w28, $w1[0] 0x78,0xbe,0xc5,0xd9 = move.v $w23, $w24 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_elm_insert.s.cs010066400017500001750000000002721363402546700226230ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x79,0x03,0xed,0xd9 = insert.b $w23[3], $sp 0x79,0x22,0x2d,0x19 = insert.h $w20[2], $5 0x79,0x32,0x7a,0x19 = insert.w $w8[2], $15 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_elm_insve.s.cs010066400017500001750000000003601363402546700224410ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x79,0x43,0x4e,0x59 = insve.b $w25[3], $w9[0] 0x79,0x62,0x16,0x19 = insve.h $w24[2], $w2[0] 0x79,0x72,0x68,0x19 = insve.w $w0[2], $w13[0] 0x79,0x78,0x90,0xd9 = insve.d $w3[0], $w18[0] capstone-sys-0.11.0/capstone/suite/MC/Mips/test_i10.s.cs010066400017500001750000000003201363402546700210450ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x7b,0x06,0x32,0x07 = ldi.b $w8, 198 0x7b,0x29,0xcd,0x07 = ldi.h $w20, 313 0x7b,0x4f,0x66,0x07 = ldi.w $w24, 492 0x7b,0x7a,0x66,0xc7 = ldi.d $w27, -180 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_i5.s.cs010066400017500001750000000037641363402546700210100ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x1e,0xf8,0xc6 = addvi.b $w3, $w31, 30 0x78,0x3a,0x6e,0x06 = addvi.h $w24, $w13, 26 0x78,0x5a,0xa6,0x86 = addvi.w $w26, $w20, 26 0x78,0x75,0x0c,0x06 = addvi.d $w16, $w1, 21 0x78,0x18,0xae,0x07 = ceqi.b $w24, $w21, -8 0x78,0x22,0x7f,0xc7 = ceqi.h $w31, $w15, 2 0x78,0x5f,0x0b,0x07 = ceqi.w $w12, $w1, -1 0x78,0x67,0xb6,0x07 = ceqi.d $w24, $w22, 7 0x7a,0x01,0x83,0x07 = clei_s.b $w12, $w16, 1 0x7a,0x37,0x50,0x87 = clei_s.h $w2, $w10, -9 0x7a,0x56,0x59,0x07 = clei_s.w $w4, $w11, -10 0x7a,0x76,0xe8,0x07 = clei_s.d $w0, $w29, -10 0x7a,0x83,0x8d,0x47 = clei_u.b $w21, $w17, 3 0x7a,0xb1,0x3f,0x47 = clei_u.h $w29, $w7, 17 0x7a,0xc2,0x08,0x47 = clei_u.w $w1, $w1, 2 0x7a,0xfd,0xde,0xc7 = clei_u.d $w27, $w27, 29 0x79,0x19,0x6c,0xc7 = clti_s.b $w19, $w13, -7 0x79,0x34,0x53,0xc7 = clti_s.h $w15, $w10, -12 0x79,0x4b,0x63,0x07 = clti_s.w $w12, $w12, 11 0x79,0x71,0xa7,0x47 = clti_s.d $w29, $w20, -15 0x79,0x9d,0x4b,0x87 = clti_u.b $w14, $w9, 29 0x79,0xb9,0xce,0x07 = clti_u.h $w24, $w25, 25 0x79,0xd6,0x08,0x47 = clti_u.w $w1, $w1, 22 0x79,0xe1,0xcd,0x47 = clti_u.d $w21, $w25, 1 0x79,0x01,0xad,0x86 = maxi_s.b $w22, $w21, 1 0x79,0x38,0x2f,0x46 = maxi_s.h $w29, $w5, -8 0x79,0x54,0x50,0x46 = maxi_s.w $w1, $w10, -12 0x79,0x70,0xeb,0x46 = maxi_s.d $w13, $w29, -16 0x79,0x8c,0x05,0x06 = maxi_u.b $w20, $w0, 12 0x79,0xa3,0x70,0x46 = maxi_u.h $w1, $w14, 3 0x79,0xcb,0xb6,0xc6 = maxi_u.w $w27, $w22, 11 0x79,0xe4,0x36,0x86 = maxi_u.d $w26, $w6, 4 0x7a,0x01,0x09,0x06 = mini_s.b $w4, $w1, 1 0x7a,0x37,0xde,0xc6 = mini_s.h $w27, $w27, -9 0x7a,0x49,0x5f,0x06 = mini_s.w $w28, $w11, 9 0x7a,0x6a,0x52,0xc6 = mini_s.d $w11, $w10, 10 0x7a,0x9b,0xbc,0x86 = mini_u.b $w18, $w23, 27 0x7a,0xb2,0xd1,0xc6 = mini_u.h $w7, $w26, 18 0x7a,0xda,0x62,0xc6 = mini_u.w $w11, $w12, 26 0x7a,0xe2,0x7a,0xc6 = mini_u.d $w11, $w15, 2 0x78,0x93,0xa6,0x06 = subvi.b $w24, $w20, 19 0x78,0xa4,0x9a,0xc6 = subvi.h $w11, $w19, 4 0x78,0xcb,0x53,0x06 = subvi.w $w12, $w10, 11 0x78,0xe7,0x84,0xc6 = subvi.d $w19, $w16, 7 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_i8.s.cs010066400017500001750000000007531363402546700210060ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x30,0xe8,0x80 = andi.b $w2, $w29, 48 0x78,0x7e,0xb1,0x81 = bmnzi.b $w6, $w22, 126 0x79,0x58,0x0e,0xc1 = bmzi.b $w27, $w1, 88 0x7a,0xbd,0x1f,0x41 = bseli.b $w29, $w3, 189 0x7a,0x38,0x88,0x40 = nori.b $w1, $w17, 56 0x79,0x87,0xa6,0x80 = ori.b $w26, $w20, 135 0x78,0x69,0xf4,0xc2 = shf.b $w19, $w30, 105 0x79,0x4c,0x44,0x42 = shf.h $w17, $w8, 76 0x7a,0x5d,0x1b,0x82 = shf.w $w14, $w3, 93 0x7b,0x14,0x54,0x00 = xori.b $w16, $w10, 20 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_lsa.s.cs010066400017500001750000000003341363402546700212400ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x01,0x2a,0x40,0x05 = lsa $8, $9, $10, 1 0x01,0x2a,0x40,0x45 = lsa $8, $9, $10, 2 0x01,0x2a,0x40,0x85 = lsa $8, $9, $10, 3 0x01,0x2a,0x40,0xc5 = lsa $8, $9, $10, 4 capstone-sys-0.11.0/capstone/suite/MC/Mips/test_mi10.s.cs010066400017500001750000000017731363402546700212370ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x7a,0x00,0x08,0x20 = ld.b $w0, -512($1) 0x78,0x00,0x10,0x60 = ld.b $w1, 0($2) 0x79,0xff,0x18,0xa0 = ld.b $w2, 511($3) 0x7a,0x00,0x20,0xe1 = ld.h $w3, -1024($4) 0x7b,0x00,0x29,0x21 = ld.h $w4, -512($5) 0x78,0x00,0x31,0x61 = ld.h $w5, 0($6) 0x79,0x00,0x39,0xa1 = ld.h $w6, 512($7) 0x79,0xff,0x41,0xe1 = ld.h $w7, 1022($8) 0x7a,0x00,0x4a,0x22 = ld.w $w8, -2048($9) 0x7b,0x00,0x52,0x62 = ld.w $w9, -1024($10) 0x7b,0x80,0x5a,0xa2 = ld.w $w10, -512($11) 0x78,0x80,0x62,0xe2 = ld.w $w11, 512($12) 0x79,0x00,0x6b,0x22 = ld.w $w12, 1024($13) 0x79,0xff,0x73,0x62 = ld.w $w13, 2044($14) 0x7a,0x00,0x7b,0xa3 = ld.d $w14, -4096($15) 0x7b,0x00,0x83,0xe3 = ld.d $w15, -2048($16) 0x7b,0x80,0x8c,0x23 = ld.d $w16, -1024($17) 0x7b,0xc0,0x94,0x63 = ld.d $w17, -512($18) 0x78,0x00,0x9c,0xa3 = ld.d $w18, 0($19) 0x78,0x40,0xa4,0xe3 = ld.d $w19, 512($20) 0x78,0x80,0xad,0x23 = ld.d $w20, 1024($21) 0x79,0x00,0xb5,0x63 = ld.d $w21, 2048($22) 0x79,0xff,0xbd,0xa3 = ld.d $w22, 4088($23) capstone-sys-0.11.0/capstone/suite/MC/Mips/test_vec.s.cs010066400017500001750000000005531363402546700212410ustar0000000000000000# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None 0x78,0x1b,0xa6,0x5e = and.v $w25, $w20, $w27 0x78,0x87,0x34,0x5e = bmnz.v $w17, $w6, $w7 0x78,0xa9,0x88,0xde = bmz.v $w3, $w17, $w9 0x78,0xce,0x02,0x1e = bsel.v $w8, $w0, $w14 0x78,0x40,0xf9,0xde = nor.v $w7, $w31, $w0 0x78,0x3e,0xd6,0x1e = or.v $w24, $w26, $w30 0x78,0x6f,0xd9,0xde = xor.v $w7, $w27, $w15 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-encoding-bookII.s.cs010066400017500001750000000014651363402546700237310ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0x7c,0x02,0x1f,0xac = icbi 2, 3 0x7c,0x02,0x1a,0x2c = dcbt 2, 3 0x7c,0x02,0x19,0xec = dcbtst 2, 3 0x7c,0x02,0x1f,0xec = dcbz 2, 3 0x7c,0x02,0x18,0x6c = dcbst 2, 3 0x4c,0x00,0x01,0x2c = isync 0x7c,0x43,0x21,0x2d = stwcx. 2, 3, 4 0x7c,0x43,0x21,0xad = stdcx. 2, 3, 4 0x7c,0x40,0x04,0xac = sync 2 0x7c,0x00,0x06,0xac = eieio 0x7c,0x40,0x00,0x7c = wait 2 0x7c,0x02,0x18,0xac = dcbf 2, 3 0x7c,0x43,0x20,0x28 = lwarx 2, 3, 4 0x7c,0x43,0x20,0xa8 = ldarx 2, 3, 4 0x7c,0x00,0x04,0xac = sync 0 0x7c,0x00,0x04,0xac = sync 0 0x7c,0x20,0x04,0xac = sync 1 0x7c,0x40,0x04,0xac = sync 2 0x7c,0x00,0x00,0x7c = wait 0 0x7c,0x20,0x00,0x7c = wait 1 0x7c,0x40,0x00,0x7c = wait 2 0x7c,0x5b,0x1a,0xe6 = mftb 2, 123 0x7c,0x4c,0x42,0xe6 = mftb 2, 268 0x7c,0x4d,0x42,0xe6 = mftb 2, 269 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-encoding-bookIII.s.cs010066400017500001750000000022671363402546700240430ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0x7c,0x80,0x01,0x24 = mtmsr 4, 0 0x7c,0x81,0x01,0x24 = mtmsr 4, 1 0x7c,0x80,0x00,0xa6 = mfmsr 4 0x7c,0x80,0x01,0x64 = mtmsrd 4, 0 0x7c,0x81,0x01,0x64 = mtmsrd 4, 1 0x7c,0x90,0x42,0xa6 = mfspr 4, 272 0x7c,0x91,0x42,0xa6 = mfspr 4, 273 0x7c,0x92,0x42,0xa6 = mfspr 4, 274 0x7c,0x93,0x42,0xa6 = mfspr 4, 275 0x7c,0x90,0x43,0xa6 = mtspr 272, 4 0x7c,0x91,0x43,0xa6 = mtspr 273, 4 0x7c,0x92,0x43,0xa6 = mtspr 274, 4 0x7c,0x93,0x43,0xa6 = mtspr 275, 4 0x7c,0x90,0x43,0xa6 = mtspr 272, 4 0x7c,0x91,0x43,0xa6 = mtspr 273, 4 0x7c,0x92,0x43,0xa6 = mtspr 274, 4 0x7c,0x93,0x43,0xa6 = mtspr 275, 4 0x7c,0x98,0x43,0xa6 = mtspr 280, 4 0x7c,0x96,0x02,0xa6 = mfspr 4, 22 0x7c,0x96,0x03,0xa6 = mtspr 22, 4 0x7c,0x9f,0x42,0xa6 = mfspr 4, 287 0x7c,0x99,0x02,0xa6 = mfspr 4, 25 0x7c,0x99,0x03,0xa6 = mtspr 25, 4 0x7c,0x9a,0x02,0xa6 = mfspr 4, 26 0x7c,0x9a,0x03,0xa6 = mtspr 26, 4 0x7c,0x9b,0x02,0xa6 = mfspr 4, 27 0x7c,0x9b,0x03,0xa6 = mtspr 27, 4 0x7c,0x00,0x23,0x64 = slbie 4 0x7c,0x80,0x2b,0x24 = slbmte 4, 5 0x7c,0x80,0x2f,0x26 = slbmfee 4, 5 0x7c,0x00,0x03,0xe4 = slbia 0x7c,0x00,0x04,0x6c = tlbsync 0x7c,0x00,0x22,0x24 = tlbiel 4 0x7c,0x00,0x22,0x64 = tlbie 4,0 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-encoding-ext.s.cs010066400017500001750000000432051363402546700233530ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0x4d,0x82,0x00,0x20 = beqlr 0 0x4d,0x86,0x00,0x20 = beqlr 1 0x4d,0x8a,0x00,0x20 = beqlr 2 0x4d,0x8e,0x00,0x20 = beqlr 3 0x4d,0x92,0x00,0x20 = beqlr 4 0x4d,0x96,0x00,0x20 = beqlr 5 0x4d,0x9a,0x00,0x20 = beqlr 6 0x4d,0x9e,0x00,0x20 = beqlr 7 0x4d,0x80,0x00,0x20 = bclr 12, 0, 0 0x4d,0x81,0x00,0x20 = bclr 12, 1, 0 0x4d,0x82,0x00,0x20 = bclr 12, 2, 0 0x4d,0x83,0x00,0x20 = bclr 12, 3, 0 0x4d,0x83,0x00,0x20 = bclr 12, 3, 0 0x4d,0x84,0x00,0x20 = bclr 12, 4, 0 0x4d,0x85,0x00,0x20 = bclr 12, 5, 0 0x4d,0x86,0x00,0x20 = bclr 12, 6, 0 0x4d,0x87,0x00,0x20 = bclr 12, 7, 0 0x4d,0x87,0x00,0x20 = bclr 12, 7, 0 0x4d,0x88,0x00,0x20 = bclr 12, 8, 0 0x4d,0x89,0x00,0x20 = bclr 12, 9, 0 0x4d,0x8a,0x00,0x20 = bclr 12, 10, 0 0x4d,0x8b,0x00,0x20 = bclr 12, 11, 0 0x4d,0x8b,0x00,0x20 = bclr 12, 11, 0 0x4d,0x8c,0x00,0x20 = bclr 12, 12, 0 0x4d,0x8d,0x00,0x20 = bclr 12, 13, 0 0x4d,0x8e,0x00,0x20 = bclr 12, 14, 0 0x4d,0x8f,0x00,0x20 = bclr 12, 15, 0 0x4d,0x8f,0x00,0x20 = bclr 12, 15, 0 0x4d,0x90,0x00,0x20 = bclr 12, 16, 0 0x4d,0x91,0x00,0x20 = bclr 12, 17, 0 0x4d,0x92,0x00,0x20 = bclr 12, 18, 0 0x4d,0x93,0x00,0x20 = bclr 12, 19, 0 0x4d,0x93,0x00,0x20 = bclr 12, 19, 0 0x4d,0x94,0x00,0x20 = bclr 12, 20, 0 0x4d,0x95,0x00,0x20 = bclr 12, 21, 0 0x4d,0x96,0x00,0x20 = bclr 12, 22, 0 0x4d,0x97,0x00,0x20 = bclr 12, 23, 0 0x4d,0x97,0x00,0x20 = bclr 12, 23, 0 0x4d,0x98,0x00,0x20 = bclr 12, 24, 0 0x4d,0x99,0x00,0x20 = bclr 12, 25, 0 0x4d,0x9a,0x00,0x20 = bclr 12, 26, 0 0x4d,0x9b,0x00,0x20 = bclr 12, 27, 0 0x4d,0x9b,0x00,0x20 = bclr 12, 27, 0 0x4d,0x9c,0x00,0x20 = bclr 12, 28, 0 0x4d,0x9d,0x00,0x20 = bclr 12, 29, 0 0x4d,0x9e,0x00,0x20 = bclr 12, 30, 0 0x4d,0x9f,0x00,0x20 = bclr 12, 31, 0 0x4d,0x9f,0x00,0x20 = bclr 12, 31, 0 0x4e,0x80,0x00,0x20 = blr 0x4e,0x80,0x04,0x20 = bctr 0x4e,0x80,0x00,0x21 = blrl 0x4e,0x80,0x04,0x21 = bctrl 0x4d,0x82,0x00,0x20 = bclr 12, 2, 0 0x4d,0x82,0x04,0x20 = bcctr 12, 2, 0 0x4d,0x82,0x00,0x21 = bclrl 12, 2, 0 0x4d,0x82,0x04,0x21 = bcctrl 12, 2, 0 0x4d,0xe2,0x00,0x20 = bclr 15, 2, 0 0x4d,0xe2,0x04,0x20 = bcctr 15, 2, 0 0x4d,0xe2,0x00,0x21 = bclrl 15, 2, 0 0x4d,0xe2,0x04,0x21 = bcctrl 15, 2, 0 0x4d,0xc2,0x00,0x20 = bclr 14, 2, 0 0x4d,0xc2,0x04,0x20 = bcctr 14, 2, 0 0x4d,0xc2,0x00,0x21 = bclrl 14, 2, 0 0x4d,0xc2,0x04,0x21 = bcctrl 14, 2, 0 0x4c,0x82,0x00,0x20 = bclr 4, 2, 0 0x4c,0x82,0x04,0x20 = bcctr 4, 2, 0 0x4c,0x82,0x00,0x21 = bclrl 4, 2, 0 0x4c,0x82,0x04,0x21 = bcctrl 4, 2, 0 0x4c,0xe2,0x00,0x20 = bclr 7, 2, 0 0x4c,0xe2,0x04,0x20 = bcctr 7, 2, 0 0x4c,0xe2,0x00,0x21 = bclrl 7, 2, 0 0x4c,0xe2,0x04,0x21 = bcctrl 7, 2, 0 0x4c,0xc2,0x00,0x20 = bclr 6, 2, 0 0x4c,0xc2,0x04,0x20 = bcctr 6, 2, 0 0x4c,0xc2,0x00,0x21 = bclrl 6, 2, 0 0x4c,0xc2,0x04,0x21 = bcctrl 6, 2, 0 0x4e,0x00,0x00,0x20 = bdnzlr 0x4e,0x00,0x00,0x21 = bdnzlrl 0x4f,0x20,0x00,0x20 = bdnzlr+ 0x4f,0x20,0x00,0x21 = bdnzlrl+ 0x4f,0x00,0x00,0x20 = bdnzlr- 0x4f,0x00,0x00,0x21 = bdnzlrl- 0x4d,0x02,0x00,0x20 = bclr 8, 2, 0 0x4d,0x02,0x00,0x21 = bclrl 8, 2, 0 0x4c,0x02,0x00,0x20 = bclr 0, 2, 0 0x4c,0x02,0x00,0x21 = bclrl 0, 2, 0 0x4e,0x40,0x00,0x20 = bdzlr 0x4e,0x40,0x00,0x21 = bdzlrl 0x4f,0x60,0x00,0x20 = bdzlr+ 0x4f,0x60,0x00,0x21 = bdzlrl+ 0x4f,0x40,0x00,0x20 = bdzlr- 0x4f,0x40,0x00,0x21 = bdzlrl- 0x4d,0x42,0x00,0x20 = bclr 10, 2, 0 0x4d,0x42,0x00,0x21 = bclrl 10, 2, 0 0x4c,0x42,0x00,0x20 = bclr 2, 2, 0 0x4c,0x42,0x00,0x21 = bclrl 2, 2, 0 0x4d,0x88,0x00,0x20 = bltlr 2 0x4d,0x80,0x00,0x20 = bltlr 0 0x4d,0x88,0x04,0x20 = bltctr 2 0x4d,0x80,0x04,0x20 = bltctr 0 0x4d,0x88,0x00,0x21 = bltlrl 2 0x4d,0x80,0x00,0x21 = bltlrl 0 0x4d,0x88,0x04,0x21 = bltctrl 2 0x4d,0x80,0x04,0x21 = bltctrl 0 0x4d,0xe8,0x00,0x20 = bltlr+ 2 0x4d,0xe0,0x00,0x20 = bltlr+ 0 0x4d,0xe8,0x04,0x20 = bltctr+ 2 0x4d,0xe0,0x04,0x20 = bltctr+ 0 0x4d,0xe8,0x00,0x21 = bltlrl+ 2 0x4d,0xe0,0x00,0x21 = bltlrl+ 0 0x4d,0xe8,0x04,0x21 = bltctrl+ 2 0x4d,0xe0,0x04,0x21 = bltctrl+ 0 0x4d,0xc8,0x00,0x20 = bltlr- 2 0x4d,0xc0,0x00,0x20 = bltlr- 0 0x4d,0xc8,0x04,0x20 = bltctr- 2 0x4d,0xc0,0x04,0x20 = bltctr- 0 0x4d,0xc8,0x00,0x21 = bltlrl- 2 0x4d,0xc0,0x00,0x21 = bltlrl- 0 0x4d,0xc8,0x04,0x21 = bltctrl- 2 0x4d,0xc0,0x04,0x21 = bltctrl- 0 0x4c,0x89,0x00,0x20 = blelr 2 0x4c,0x81,0x00,0x20 = blelr 0 0x4c,0x89,0x04,0x20 = blectr 2 0x4c,0x81,0x04,0x20 = blectr 0 0x4c,0x89,0x00,0x21 = blelrl 2 0x4c,0x81,0x00,0x21 = blelrl 0 0x4c,0x89,0x04,0x21 = blectrl 2 0x4c,0x81,0x04,0x21 = blectrl 0 0x4c,0xe9,0x00,0x20 = blelr+ 2 0x4c,0xe1,0x00,0x20 = blelr+ 0 0x4c,0xe9,0x04,0x20 = blectr+ 2 0x4c,0xe1,0x04,0x20 = blectr+ 0 0x4c,0xe9,0x00,0x21 = blelrl+ 2 0x4c,0xe1,0x00,0x21 = blelrl+ 0 0x4c,0xe9,0x04,0x21 = blectrl+ 2 0x4c,0xe1,0x04,0x21 = blectrl+ 0 0x4c,0xc9,0x00,0x20 = blelr- 2 0x4c,0xc1,0x00,0x20 = blelr- 0 0x4c,0xc9,0x04,0x20 = blectr- 2 0x4c,0xc1,0x04,0x20 = blectr- 0 0x4c,0xc9,0x00,0x21 = blelrl- 2 0x4c,0xc1,0x00,0x21 = blelrl- 0 0x4c,0xc9,0x04,0x21 = blectrl- 2 0x4c,0xc1,0x04,0x21 = blectrl- 0 0x4d,0x8a,0x00,0x20 = beqlr 2 0x4d,0x82,0x00,0x20 = beqlr 0 0x4d,0x8a,0x04,0x20 = beqctr 2 0x4d,0x82,0x04,0x20 = beqctr 0 0x4d,0x8a,0x00,0x21 = beqlrl 2 0x4d,0x82,0x00,0x21 = beqlrl 0 0x4d,0x8a,0x04,0x21 = beqctrl 2 0x4d,0x82,0x04,0x21 = beqctrl 0 0x4d,0xea,0x00,0x20 = beqlr+ 2 0x4d,0xe2,0x00,0x20 = beqlr+ 0 0x4d,0xea,0x04,0x20 = beqctr+ 2 0x4d,0xe2,0x04,0x20 = beqctr+ 0 0x4d,0xea,0x00,0x21 = beqlrl+ 2 0x4d,0xe2,0x00,0x21 = beqlrl+ 0 0x4d,0xea,0x04,0x21 = beqctrl+ 2 0x4d,0xe2,0x04,0x21 = beqctrl+ 0 0x4d,0xca,0x00,0x20 = beqlr- 2 0x4d,0xc2,0x00,0x20 = beqlr- 0 0x4d,0xca,0x04,0x20 = beqctr- 2 0x4d,0xc2,0x04,0x20 = beqctr- 0 0x4d,0xca,0x00,0x21 = beqlrl- 2 0x4d,0xc2,0x00,0x21 = beqlrl- 0 0x4d,0xca,0x04,0x21 = beqctrl- 2 0x4d,0xc2,0x04,0x21 = beqctrl- 0 0x4c,0x88,0x00,0x20 = bgelr 2 0x4c,0x80,0x00,0x20 = bgelr 0 0x4c,0x88,0x04,0x20 = bgectr 2 0x4c,0x80,0x04,0x20 = bgectr 0 0x4c,0x88,0x00,0x21 = bgelrl 2 0x4c,0x80,0x00,0x21 = bgelrl 0 0x4c,0x88,0x04,0x21 = bgectrl 2 0x4c,0x80,0x04,0x21 = bgectrl 0 0x4c,0xe8,0x00,0x20 = bgelr+ 2 0x4c,0xe0,0x00,0x20 = bgelr+ 0 0x4c,0xe8,0x04,0x20 = bgectr+ 2 0x4c,0xe0,0x04,0x20 = bgectr+ 0 0x4c,0xe8,0x00,0x21 = bgelrl+ 2 0x4c,0xe0,0x00,0x21 = bgelrl+ 0 0x4c,0xe8,0x04,0x21 = bgectrl+ 2 0x4c,0xe0,0x04,0x21 = bgectrl+ 0 0x4c,0xc8,0x00,0x20 = bgelr- 2 0x4c,0xc0,0x00,0x20 = bgelr- 0 0x4c,0xc8,0x04,0x20 = bgectr- 2 0x4c,0xc0,0x04,0x20 = bgectr- 0 0x4c,0xc8,0x00,0x21 = bgelrl- 2 0x4c,0xc0,0x00,0x21 = bgelrl- 0 0x4c,0xc8,0x04,0x21 = bgectrl- 2 0x4c,0xc0,0x04,0x21 = bgectrl- 0 0x4d,0x89,0x00,0x20 = bgtlr 2 0x4d,0x81,0x00,0x20 = bgtlr 0 0x4d,0x89,0x04,0x20 = bgtctr 2 0x4d,0x81,0x04,0x20 = bgtctr 0 0x4d,0x89,0x00,0x21 = bgtlrl 2 0x4d,0x81,0x00,0x21 = bgtlrl 0 0x4d,0x89,0x04,0x21 = bgtctrl 2 0x4d,0x81,0x04,0x21 = bgtctrl 0 0x4d,0xe9,0x00,0x20 = bgtlr+ 2 0x4d,0xe1,0x00,0x20 = bgtlr+ 0 0x4d,0xe9,0x04,0x20 = bgtctr+ 2 0x4d,0xe1,0x04,0x20 = bgtctr+ 0 0x4d,0xe9,0x00,0x21 = bgtlrl+ 2 0x4d,0xe1,0x00,0x21 = bgtlrl+ 0 0x4d,0xe9,0x04,0x21 = bgtctrl+ 2 0x4d,0xe1,0x04,0x21 = bgtctrl+ 0 0x4d,0xc9,0x00,0x20 = bgtlr- 2 0x4d,0xc1,0x00,0x20 = bgtlr- 0 0x4d,0xc9,0x04,0x20 = bgtctr- 2 0x4d,0xc1,0x04,0x20 = bgtctr- 0 0x4d,0xc9,0x00,0x21 = bgtlrl- 2 0x4d,0xc1,0x00,0x21 = bgtlrl- 0 0x4d,0xc9,0x04,0x21 = bgtctrl- 2 0x4d,0xc1,0x04,0x21 = bgtctrl- 0 0x4c,0x88,0x00,0x20 = bgelr 2 0x4c,0x80,0x00,0x20 = bgelr 0 0x4c,0x88,0x04,0x20 = bgectr 2 0x4c,0x80,0x04,0x20 = bgectr 0 0x4c,0x88,0x00,0x21 = bgelrl 2 0x4c,0x80,0x00,0x21 = bgelrl 0 0x4c,0x88,0x04,0x21 = bgectrl 2 0x4c,0x80,0x04,0x21 = bgectrl 0 0x4c,0xe8,0x00,0x20 = bgelr+ 2 0x4c,0xe0,0x00,0x20 = bgelr+ 0 0x4c,0xe8,0x04,0x20 = bgectr+ 2 0x4c,0xe0,0x04,0x20 = bgectr+ 0 0x4c,0xe8,0x00,0x21 = bgelrl+ 2 0x4c,0xe0,0x00,0x21 = bgelrl+ 0 0x4c,0xe8,0x04,0x21 = bgectrl+ 2 0x4c,0xe0,0x04,0x21 = bgectrl+ 0 0x4c,0xc8,0x00,0x20 = bgelr- 2 0x4c,0xc0,0x00,0x20 = bgelr- 0 0x4c,0xc8,0x04,0x20 = bgectr- 2 0x4c,0xc0,0x04,0x20 = bgectr- 0 0x4c,0xc8,0x00,0x21 = bgelrl- 2 0x4c,0xc0,0x00,0x21 = bgelrl- 0 0x4c,0xc8,0x04,0x21 = bgectrl- 2 0x4c,0xc0,0x04,0x21 = bgectrl- 0 0x4c,0x8a,0x00,0x20 = bnelr 2 0x4c,0x82,0x00,0x20 = bnelr 0 0x4c,0x8a,0x04,0x20 = bnectr 2 0x4c,0x82,0x04,0x20 = bnectr 0 0x4c,0x8a,0x00,0x21 = bnelrl 2 0x4c,0x82,0x00,0x21 = bnelrl 0 0x4c,0x8a,0x04,0x21 = bnectrl 2 0x4c,0x82,0x04,0x21 = bnectrl 0 0x4c,0xea,0x00,0x20 = bnelr+ 2 0x4c,0xe2,0x00,0x20 = bnelr+ 0 0x4c,0xea,0x04,0x20 = bnectr+ 2 0x4c,0xe2,0x04,0x20 = bnectr+ 0 0x4c,0xea,0x00,0x21 = bnelrl+ 2 0x4c,0xe2,0x00,0x21 = bnelrl+ 0 0x4c,0xea,0x04,0x21 = bnectrl+ 2 0x4c,0xe2,0x04,0x21 = bnectrl+ 0 0x4c,0xca,0x00,0x20 = bnelr- 2 0x4c,0xc2,0x00,0x20 = bnelr- 0 0x4c,0xca,0x04,0x20 = bnectr- 2 0x4c,0xc2,0x04,0x20 = bnectr- 0 0x4c,0xca,0x00,0x21 = bnelrl- 2 0x4c,0xc2,0x00,0x21 = bnelrl- 0 0x4c,0xca,0x04,0x21 = bnectrl- 2 0x4c,0xc2,0x04,0x21 = bnectrl- 0 0x4c,0x89,0x00,0x20 = blelr 2 0x4c,0x81,0x00,0x20 = blelr 0 0x4c,0x89,0x04,0x20 = blectr 2 0x4c,0x81,0x04,0x20 = blectr 0 0x4c,0x89,0x00,0x21 = blelrl 2 0x4c,0x81,0x00,0x21 = blelrl 0 0x4c,0x89,0x04,0x21 = blectrl 2 0x4c,0x81,0x04,0x21 = blectrl 0 0x4c,0xe9,0x00,0x20 = blelr+ 2 0x4c,0xe1,0x00,0x20 = blelr+ 0 0x4c,0xe9,0x04,0x20 = blectr+ 2 0x4c,0xe1,0x04,0x20 = blectr+ 0 0x4c,0xe9,0x00,0x21 = blelrl+ 2 0x4c,0xe1,0x00,0x21 = blelrl+ 0 0x4c,0xe9,0x04,0x21 = blectrl+ 2 0x4c,0xe1,0x04,0x21 = blectrl+ 0 0x4c,0xc9,0x00,0x20 = blelr- 2 0x4c,0xc1,0x00,0x20 = blelr- 0 0x4c,0xc9,0x04,0x20 = blectr- 2 0x4c,0xc1,0x04,0x20 = blectr- 0 0x4c,0xc9,0x00,0x21 = blelrl- 2 0x4c,0xc1,0x00,0x21 = blelrl- 0 0x4c,0xc9,0x04,0x21 = blectrl- 2 0x4c,0xc1,0x04,0x21 = blectrl- 0 0x4d,0x8b,0x00,0x20 = bunlr 2 0x4d,0x83,0x00,0x20 = bunlr 0 0x4d,0x8b,0x04,0x20 = bunctr 2 0x4d,0x83,0x04,0x20 = bunctr 0 0x4d,0x8b,0x00,0x21 = bunlrl 2 0x4d,0x83,0x00,0x21 = bunlrl 0 0x4d,0x8b,0x04,0x21 = bunctrl 2 0x4d,0x83,0x04,0x21 = bunctrl 0 0x4d,0xeb,0x00,0x20 = bunlr+ 2 0x4d,0xe3,0x00,0x20 = bunlr+ 0 0x4d,0xeb,0x04,0x20 = bunctr+ 2 0x4d,0xe3,0x04,0x20 = bunctr+ 0 0x4d,0xeb,0x00,0x21 = bunlrl+ 2 0x4d,0xe3,0x00,0x21 = bunlrl+ 0 0x4d,0xeb,0x04,0x21 = bunctrl+ 2 0x4d,0xe3,0x04,0x21 = bunctrl+ 0 0x4d,0xcb,0x00,0x20 = bunlr- 2 0x4d,0xc3,0x00,0x20 = bunlr- 0 0x4d,0xcb,0x04,0x20 = bunctr- 2 0x4d,0xc3,0x04,0x20 = bunctr- 0 0x4d,0xcb,0x00,0x21 = bunlrl- 2 0x4d,0xc3,0x00,0x21 = bunlrl- 0 0x4d,0xcb,0x04,0x21 = bunctrl- 2 0x4d,0xc3,0x04,0x21 = bunctrl- 0 0x4c,0x8b,0x00,0x20 = bnulr 2 0x4c,0x83,0x00,0x20 = bnulr 0 0x4c,0x8b,0x04,0x20 = bnuctr 2 0x4c,0x83,0x04,0x20 = bnuctr 0 0x4c,0x8b,0x00,0x21 = bnulrl 2 0x4c,0x83,0x00,0x21 = bnulrl 0 0x4c,0x8b,0x04,0x21 = bnuctrl 2 0x4c,0x83,0x04,0x21 = bnuctrl 0 0x4c,0xeb,0x00,0x20 = bnulr+ 2 0x4c,0xe3,0x00,0x20 = bnulr+ 0 0x4c,0xeb,0x04,0x20 = bnuctr+ 2 0x4c,0xe3,0x04,0x20 = bnuctr+ 0 0x4c,0xeb,0x00,0x21 = bnulrl+ 2 0x4c,0xe3,0x00,0x21 = bnulrl+ 0 0x4c,0xeb,0x04,0x21 = bnuctrl+ 2 0x4c,0xe3,0x04,0x21 = bnuctrl+ 0 0x4c,0xcb,0x00,0x20 = bnulr- 2 0x4c,0xc3,0x00,0x20 = bnulr- 0 0x4c,0xcb,0x04,0x20 = bnuctr- 2 0x4c,0xc3,0x04,0x20 = bnuctr- 0 0x4c,0xcb,0x00,0x21 = bnulrl- 2 0x4c,0xc3,0x00,0x21 = bnulrl- 0 0x4c,0xcb,0x04,0x21 = bnuctrl- 2 0x4c,0xc3,0x04,0x21 = bnuctrl- 0 0x4d,0x8b,0x00,0x20 = bunlr 2 0x4d,0x83,0x00,0x20 = bunlr 0 0x4d,0x8b,0x04,0x20 = bunctr 2 0x4d,0x83,0x04,0x20 = bunctr 0 0x4d,0x8b,0x00,0x21 = bunlrl 2 0x4d,0x83,0x00,0x21 = bunlrl 0 0x4d,0x8b,0x04,0x21 = bunctrl 2 0x4d,0x83,0x04,0x21 = bunctrl 0 0x4d,0xeb,0x00,0x20 = bunlr+ 2 0x4d,0xe3,0x00,0x20 = bunlr+ 0 0x4d,0xeb,0x04,0x20 = bunctr+ 2 0x4d,0xe3,0x04,0x20 = bunctr+ 0 0x4d,0xeb,0x00,0x21 = bunlrl+ 2 0x4d,0xe3,0x00,0x21 = bunlrl+ 0 0x4d,0xeb,0x04,0x21 = bunctrl+ 2 0x4d,0xe3,0x04,0x21 = bunctrl+ 0 0x4d,0xcb,0x00,0x20 = bunlr- 2 0x4d,0xc3,0x00,0x20 = bunlr- 0 0x4d,0xcb,0x04,0x20 = bunctr- 2 0x4d,0xc3,0x04,0x20 = bunctr- 0 0x4d,0xcb,0x00,0x21 = bunlrl- 2 0x4d,0xc3,0x00,0x21 = bunlrl- 0 0x4d,0xcb,0x04,0x21 = bunctrl- 2 0x4d,0xc3,0x04,0x21 = bunctrl- 0 0x4c,0x8b,0x00,0x20 = bnulr 2 0x4c,0x83,0x00,0x20 = bnulr 0 0x4c,0x8b,0x04,0x20 = bnuctr 2 0x4c,0x83,0x04,0x20 = bnuctr 0 0x4c,0x8b,0x00,0x21 = bnulrl 2 0x4c,0x83,0x00,0x21 = bnulrl 0 0x4c,0x8b,0x04,0x21 = bnuctrl 2 0x4c,0x83,0x04,0x21 = bnuctrl 0 0x4c,0xeb,0x00,0x20 = bnulr+ 2 0x4c,0xe3,0x00,0x20 = bnulr+ 0 0x4c,0xeb,0x04,0x20 = bnuctr+ 2 0x4c,0xe3,0x04,0x20 = bnuctr+ 0 0x4c,0xeb,0x00,0x21 = bnulrl+ 2 0x4c,0xe3,0x00,0x21 = bnulrl+ 0 0x4c,0xeb,0x04,0x21 = bnuctrl+ 2 0x4c,0xe3,0x04,0x21 = bnuctrl+ 0 0x4c,0xcb,0x00,0x20 = bnulr- 2 0x4c,0xc3,0x00,0x20 = bnulr- 0 0x4c,0xcb,0x04,0x20 = bnuctr- 2 0x4c,0xc3,0x04,0x20 = bnuctr- 0 0x4c,0xcb,0x00,0x21 = bnulrl- 2 0x4c,0xc3,0x00,0x21 = bnulrl- 0 0x4c,0xcb,0x04,0x21 = bnuctrl- 2 0x4c,0xc3,0x04,0x21 = bnuctrl- 0 0x4c,0x42,0x12,0x42 = creqv 2, 2, 2 0x4c,0x42,0x11,0x82 = crxor 2, 2, 2 0x4c,0x43,0x1b,0x82 = cror 2, 3, 3 0x4c,0x43,0x18,0x42 = crnor 2, 3, 3 0x38,0x43,0xff,0x80 = addi 2, 3, -128 0x3c,0x43,0xff,0x80 = addis 2, 3, -128 0x30,0x43,0xff,0x80 = addic 2, 3, -128 0x34,0x43,0xff,0x80 = addic. 2, 3, -128 0x7c,0x44,0x18,0x50 = subf 2, 4, 3 0x7c,0x44,0x18,0x51 = subf. 2, 4, 3 0x7c,0x44,0x18,0x10 = subfc 2, 4, 3 0x7c,0x44,0x18,0x11 = subfc. 2, 4, 3 0x2d,0x23,0x00,0x80 = cmpdi 2, 3, 128 0x2c,0x23,0x00,0x80 = cmpdi 0, 3, 128 0x7d,0x23,0x20,0x00 = cmpd 2, 3, 4 0x7c,0x23,0x20,0x00 = cmpd 0, 3, 4 0x29,0x23,0x00,0x80 = cmpldi 2, 3, 128 0x28,0x23,0x00,0x80 = cmpldi 0, 3, 128 0x7d,0x23,0x20,0x40 = cmpld 2, 3, 4 0x7c,0x23,0x20,0x40 = cmpld 0, 3, 4 0x2d,0x03,0x00,0x80 = cmpwi 2, 3, 128 0x2c,0x03,0x00,0x80 = cmpwi 0, 3, 128 0x7d,0x03,0x20,0x00 = cmpw 2, 3, 4 0x7c,0x03,0x20,0x00 = cmpw 0, 3, 4 0x29,0x03,0x00,0x80 = cmplwi 2, 3, 128 0x28,0x03,0x00,0x80 = cmplwi 0, 3, 128 0x7d,0x03,0x20,0x40 = cmplw 2, 3, 4 0x7c,0x03,0x20,0x40 = cmplw 0, 3, 4 0x0e,0x03,0x00,0x04 = twi 16, 3, 4 0x7e,0x03,0x20,0x08 = tw 16, 3, 4 0x0a,0x03,0x00,0x04 = tdi 16, 3, 4 0x7e,0x03,0x20,0x88 = td 16, 3, 4 0x0e,0x83,0x00,0x04 = twi 20, 3, 4 0x7e,0x83,0x20,0x08 = tw 20, 3, 4 0x0a,0x83,0x00,0x04 = tdi 20, 3, 4 0x7e,0x83,0x20,0x88 = td 20, 3, 4 0x0c,0x83,0x00,0x04 = twi 4, 3, 4 0x7c,0x83,0x20,0x08 = tw 4, 3, 4 0x08,0x83,0x00,0x04 = tdi 4, 3, 4 0x7c,0x83,0x20,0x88 = td 4, 3, 4 0x0d,0x83,0x00,0x04 = twi 12, 3, 4 0x7d,0x83,0x20,0x08 = tw 12, 3, 4 0x09,0x83,0x00,0x04 = tdi 12, 3, 4 0x7d,0x83,0x20,0x88 = td 12, 3, 4 0x0d,0x03,0x00,0x04 = twi 8, 3, 4 0x7d,0x03,0x20,0x08 = tw 8, 3, 4 0x09,0x03,0x00,0x04 = tdi 8, 3, 4 0x7d,0x03,0x20,0x88 = td 8, 3, 4 0x0d,0x83,0x00,0x04 = twi 12, 3, 4 0x7d,0x83,0x20,0x08 = tw 12, 3, 4 0x09,0x83,0x00,0x04 = tdi 12, 3, 4 0x7d,0x83,0x20,0x88 = td 12, 3, 4 0x0f,0x03,0x00,0x04 = twi 24, 3, 4 0x7f,0x03,0x20,0x08 = tw 24, 3, 4 0x0b,0x03,0x00,0x04 = tdi 24, 3, 4 0x7f,0x03,0x20,0x88 = td 24, 3, 4 0x0e,0x83,0x00,0x04 = twi 20, 3, 4 0x7e,0x83,0x20,0x08 = tw 20, 3, 4 0x0a,0x83,0x00,0x04 = tdi 20, 3, 4 0x7e,0x83,0x20,0x88 = td 20, 3, 4 0x0c,0x43,0x00,0x04 = twi 2, 3, 4 0x7c,0x43,0x20,0x08 = tw 2, 3, 4 0x08,0x43,0x00,0x04 = tdi 2, 3, 4 0x7c,0x43,0x20,0x88 = td 2, 3, 4 0x0c,0xc3,0x00,0x04 = twi 6, 3, 4 0x7c,0xc3,0x20,0x08 = tw 6, 3, 4 0x08,0xc3,0x00,0x04 = tdi 6, 3, 4 0x7c,0xc3,0x20,0x88 = td 6, 3, 4 0x0c,0xa3,0x00,0x04 = twi 5, 3, 4 0x7c,0xa3,0x20,0x08 = tw 5, 3, 4 0x08,0xa3,0x00,0x04 = tdi 5, 3, 4 0x7c,0xa3,0x20,0x88 = td 5, 3, 4 0x0c,0x23,0x00,0x04 = twi 1, 3, 4 0x7c,0x23,0x20,0x08 = tw 1, 3, 4 0x08,0x23,0x00,0x04 = tdi 1, 3, 4 0x7c,0x23,0x20,0x88 = td 1, 3, 4 0x0c,0xa3,0x00,0x04 = twi 5, 3, 4 0x7c,0xa3,0x20,0x08 = tw 5, 3, 4 0x08,0xa3,0x00,0x04 = tdi 5, 3, 4 0x7c,0xa3,0x20,0x88 = td 5, 3, 4 0x0c,0xc3,0x00,0x04 = twi 6, 3, 4 0x7c,0xc3,0x20,0x08 = tw 6, 3, 4 0x08,0xc3,0x00,0x04 = tdi 6, 3, 4 0x7c,0xc3,0x20,0x88 = td 6, 3, 4 0x0f,0xe3,0x00,0x04 = twi 31, 3, 4 0x7f,0xe3,0x20,0x08 = tw 31, 3, 4 0x0b,0xe3,0x00,0x04 = tdi 31, 3, 4 0x7f,0xe3,0x20,0x88 = td 31, 3, 4 0x7f,0xe0,0x00,0x08 = trap 0x78,0x62,0x28,0xc4 = rldicr 2, 3, 5, 3 0x78,0x62,0x28,0xc5 = rldicr. 2, 3, 5, 3 0x78,0x62,0x4f,0x20 = rldicl 2, 3, 9, 60 0x78,0x62,0x4f,0x21 = rldicl. 2, 3, 9, 60 0x78,0x62,0xb9,0x4e = rldimi 2, 3, 55, 5 0x78,0x62,0xb9,0x4f = rldimi. 2, 3, 55, 5 0x78,0x62,0x20,0x00 = rldicl 2, 3, 4, 0 0x78,0x62,0x20,0x01 = rldicl. 2, 3, 4, 0 0x78,0x62,0xe0,0x02 = rldicl 2, 3, 60, 0 0x78,0x62,0xe0,0x03 = rldicl. 2, 3, 60, 0 0x78,0x62,0x20,0x10 = rldcl 2, 3, 4, 0 0x78,0x62,0x20,0x11 = rldcl. 2, 3, 4, 0 0x78,0x62,0x26,0xe4 = sldi 2, 3, 4 0x78,0x62,0x26,0xe5 = rldicr. 2, 3, 4, 59 0x78,0x62,0xe1,0x02 = rldicl 2, 3, 60, 4 0x78,0x62,0xe1,0x03 = rldicl. 2, 3, 60, 4 0x78,0x62,0x01,0x00 = rldicl 2, 3, 0, 4 0x78,0x62,0x01,0x01 = rldicl. 2, 3, 0, 4 0x78,0x62,0x06,0xe4 = rldicr 2, 3, 0, 59 0x78,0x62,0x06,0xe5 = rldicr. 2, 3, 0, 59 0x78,0x62,0x20,0x48 = rldic 2, 3, 4, 1 0x78,0x62,0x20,0x49 = rldic. 2, 3, 4, 1 0x54,0x62,0x28,0x06 = rlwinm 2, 3, 5, 0, 3 0x54,0x62,0x28,0x07 = rlwinm. 2, 3, 5, 0, 3 0x54,0x62,0x4f,0x3e = rlwinm 2, 3, 9, 28, 31 0x54,0x62,0x4f,0x3f = rlwinm. 2, 3, 9, 28, 31 0x50,0x62,0xd9,0x50 = rlwimi 2, 3, 27, 5, 8 0x50,0x62,0xd9,0x51 = rlwimi. 2, 3, 27, 5, 8 0x50,0x62,0xb9,0x50 = rlwimi 2, 3, 23, 5, 8 0x50,0x62,0xb9,0x51 = rlwimi. 2, 3, 23, 5, 8 0x54,0x62,0x20,0x3e = rlwinm 2, 3, 4, 0, 31 0x54,0x62,0x20,0x3f = rlwinm. 2, 3, 4, 0, 31 0x54,0x62,0xe0,0x3e = rlwinm 2, 3, 28, 0, 31 0x54,0x62,0xe0,0x3f = rlwinm. 2, 3, 28, 0, 31 0x5c,0x62,0x20,0x3e = rlwnm 2, 3, 4, 0, 31 0x5c,0x62,0x20,0x3f = rlwnm. 2, 3, 4, 0, 31 0x54,0x62,0x20,0x36 = slwi 2, 3, 4 0x54,0x62,0x20,0x37 = rlwinm. 2, 3, 4, 0, 27 0x54,0x62,0xe1,0x3e = srwi 2, 3, 4 0x54,0x62,0xe1,0x3f = rlwinm. 2, 3, 28, 4, 31 0x54,0x62,0x01,0x3e = rlwinm 2, 3, 0, 4, 31 0x54,0x62,0x01,0x3f = rlwinm. 2, 3, 0, 4, 31 0x54,0x62,0x00,0x36 = rlwinm 2, 3, 0, 0, 27 0x54,0x62,0x00,0x37 = rlwinm. 2, 3, 0, 0, 27 0x54,0x62,0x20,0x76 = rlwinm 2, 3, 4, 1, 27 0x54,0x62,0x20,0x77 = rlwinm. 2, 3, 4, 1, 27 0x7c,0x41,0x03,0xa6 = mtspr 1, 2 0x7c,0x41,0x02,0xa6 = mfspr 2, 1 0x7c,0x48,0x03,0xa6 = mtlr 2 0x7c,0x48,0x02,0xa6 = mflr 2 0x7c,0x49,0x03,0xa6 = mtctr 2 0x7c,0x49,0x02,0xa6 = mfctr 2 0x60,0x00,0x00,0x00 = nop 0x68,0x00,0x00,0x00 = xori 0, 0, 0 0x38,0x40,0x00,0x80 = li 2, 128 0x3c,0x40,0x00,0x80 = lis 2, 128 0x7c,0x62,0x1b,0x78 = mr 2, 3 0x7c,0x62,0x1b,0x79 = or. 2, 3, 3 0x7c,0x62,0x18,0xf8 = nor 2, 3, 3 0x7c,0x62,0x18,0xf9 = nor. 2, 3, 3 0x7c,0x4f,0xf1,0x20 = mtcrf 255, 2 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-encoding-fp.s.cs010066400017500001750000000075461363402546700231700ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0xc0,0x44,0x00,0x80 = lfs 2, 128(4) 0x7c,0x43,0x24,0x2e = lfsx 2, 3, 4 0xc4,0x44,0x00,0x80 = lfsu 2, 128(4) 0x7c,0x43,0x24,0x6e = lfsux 2, 3, 4 0xc8,0x44,0x00,0x80 = lfd 2, 128(4) 0x7c,0x43,0x24,0xae = lfdx 2, 3, 4 0xcc,0x44,0x00,0x80 = lfdu 2, 128(4) 0x7c,0x43,0x24,0xee = lfdux 2, 3, 4 0x7c,0x43,0x26,0xae = lfiwax 2, 3, 4 0x7c,0x43,0x26,0xee = lfiwzx 2, 3, 4 0xd0,0x44,0x00,0x80 = stfs 2, 128(4) 0x7c,0x43,0x25,0x2e = stfsx 2, 3, 4 0xd4,0x44,0x00,0x80 = stfsu 2, 128(4) 0x7c,0x43,0x25,0x6e = stfsux 2, 3, 4 0xd8,0x44,0x00,0x80 = stfd 2, 128(4) 0x7c,0x43,0x25,0xae = stfdx 2, 3, 4 0xdc,0x44,0x00,0x80 = stfdu 2, 128(4) 0x7c,0x43,0x25,0xee = stfdux 2, 3, 4 0x7c,0x43,0x27,0xae = stfiwx 2, 3, 4 0xfc,0x40,0x18,0x90 = fmr 2, 3 0xfc,0x40,0x18,0x91 = fmr. 2, 3 0xfc,0x40,0x18,0x50 = fneg 2, 3 0xfc,0x40,0x18,0x51 = fneg. 2, 3 0xfc,0x40,0x1a,0x10 = fabs 2, 3 0xfc,0x40,0x1a,0x11 = fabs. 2, 3 0xfc,0x40,0x19,0x10 = fnabs 2, 3 0xfc,0x40,0x19,0x11 = fnabs. 2, 3 0xfc,0x43,0x20,0x10 = fcpsgn 2, 3, 4 0xfc,0x43,0x20,0x11 = fcpsgn. 2, 3, 4 0xfc,0x43,0x20,0x2a = fadd 2, 3, 4 0xfc,0x43,0x20,0x2b = fadd. 2, 3, 4 0xec,0x43,0x20,0x2a = fadds 2, 3, 4 0xec,0x43,0x20,0x2b = fadds. 2, 3, 4 0xfc,0x43,0x20,0x28 = fsub 2, 3, 4 0xfc,0x43,0x20,0x29 = fsub. 2, 3, 4 0xec,0x43,0x20,0x28 = fsubs 2, 3, 4 0xec,0x43,0x20,0x29 = fsubs. 2, 3, 4 0xfc,0x43,0x01,0x32 = fmul 2, 3, 4 0xfc,0x43,0x01,0x33 = fmul. 2, 3, 4 0xec,0x43,0x01,0x32 = fmuls 2, 3, 4 0xec,0x43,0x01,0x33 = fmuls. 2, 3, 4 0xfc,0x43,0x20,0x24 = fdiv 2, 3, 4 0xfc,0x43,0x20,0x25 = fdiv. 2, 3, 4 0xec,0x43,0x20,0x24 = fdivs 2, 3, 4 0xec,0x43,0x20,0x25 = fdivs. 2, 3, 4 0xfc,0x40,0x18,0x2c = fsqrt 2, 3 0xfc,0x40,0x18,0x2d = fsqrt. 2, 3 0xec,0x40,0x18,0x2c = fsqrts 2, 3 0xec,0x40,0x18,0x2d = fsqrts. 2, 3 0xfc,0x40,0x18,0x30 = fre 2, 3 0xfc,0x40,0x18,0x31 = fre. 2, 3 0xec,0x40,0x18,0x30 = fres 2, 3 0xec,0x40,0x18,0x31 = fres. 2, 3 0xfc,0x40,0x18,0x34 = frsqrte 2, 3 0xfc,0x40,0x18,0x35 = frsqrte. 2, 3 0xec,0x40,0x18,0x34 = frsqrtes 2, 3 0xec,0x40,0x18,0x35 = frsqrtes. 2, 3 0xfc,0x43,0x29,0x3a = fmadd 2, 3, 4, 5 0xfc,0x43,0x29,0x3b = fmadd. 2, 3, 4, 5 0xec,0x43,0x29,0x3a = fmadds 2, 3, 4, 5 0xec,0x43,0x29,0x3b = fmadds. 2, 3, 4, 5 0xfc,0x43,0x29,0x38 = fmsub 2, 3, 4, 5 0xfc,0x43,0x29,0x39 = fmsub. 2, 3, 4, 5 0xec,0x43,0x29,0x38 = fmsubs 2, 3, 4, 5 0xec,0x43,0x29,0x39 = fmsubs. 2, 3, 4, 5 0xfc,0x43,0x29,0x3e = fnmadd 2, 3, 4, 5 0xfc,0x43,0x29,0x3f = fnmadd. 2, 3, 4, 5 0xec,0x43,0x29,0x3e = fnmadds 2, 3, 4, 5 0xec,0x43,0x29,0x3f = fnmadds. 2, 3, 4, 5 0xfc,0x43,0x29,0x3c = fnmsub 2, 3, 4, 5 0xfc,0x43,0x29,0x3d = fnmsub. 2, 3, 4, 5 0xec,0x43,0x29,0x3c = fnmsubs 2, 3, 4, 5 0xec,0x43,0x29,0x3d = fnmsubs. 2, 3, 4, 5 0xfc,0x40,0x18,0x18 = frsp 2, 3 0xfc,0x40,0x18,0x19 = frsp. 2, 3 0xfc,0x40,0x1e,0x5c = fctid 2, 3 0xfc,0x40,0x1e,0x5d = fctid. 2, 3 0xfc,0x40,0x1e,0x5e = fctidz 2, 3 0xfc,0x40,0x1e,0x5f = fctidz. 2, 3 0xfc,0x40,0x1f,0x5e = fctiduz 2, 3 0xfc,0x40,0x1f,0x5f = fctiduz. 2, 3 0xfc,0x40,0x18,0x1c = fctiw 2, 3 0xfc,0x40,0x18,0x1d = fctiw. 2, 3 0xfc,0x40,0x18,0x1e = fctiwz 2, 3 0xfc,0x40,0x18,0x1f = fctiwz. 2, 3 0xfc,0x40,0x19,0x1e = fctiwuz 2, 3 0xfc,0x40,0x19,0x1f = fctiwuz. 2, 3 0xfc,0x40,0x1e,0x9c = fcfid 2, 3 0xfc,0x40,0x1e,0x9d = fcfid. 2, 3 0xfc,0x40,0x1f,0x9c = fcfidu 2, 3 0xfc,0x40,0x1f,0x9d = fcfidu. 2, 3 0xec,0x40,0x1e,0x9c = fcfids 2, 3 0xec,0x40,0x1e,0x9d = fcfids. 2, 3 0xec,0x40,0x1f,0x9c = fcfidus 2, 3 0xec,0x40,0x1f,0x9d = fcfidus. 2, 3 0xfc,0x40,0x1b,0x10 = frin 2, 3 0xfc,0x40,0x1b,0x11 = frin. 2, 3 0xfc,0x40,0x1b,0x90 = frip 2, 3 0xfc,0x40,0x1b,0x91 = frip. 2, 3 0xfc,0x40,0x1b,0x50 = friz 2, 3 0xfc,0x40,0x1b,0x51 = friz. 2, 3 0xfc,0x40,0x1b,0xd0 = frim 2, 3 0xfc,0x40,0x1b,0xd1 = frim. 2, 3 0xfd,0x03,0x20,0x00 = fcmpu 2, 3, 4 0xfc,0x43,0x29,0x2e = fsel 2, 3, 4, 5 0xfc,0x43,0x29,0x2f = fsel. 2, 3, 4, 5 0xfc,0x40,0x04,0x8e = mffs 2 0xff,0xe0,0x00,0x8c = mtfsb0 31 0xff,0xe0,0x00,0x4c = mtfsb1 31 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-encoding-vmx.s.cs010066400017500001750000000143471363402546700233720ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0x7c,0x43,0x20,0x0e = lvebx 2, 3, 4 0x7c,0x43,0x20,0x4e = lvehx 2, 3, 4 0x7c,0x43,0x20,0x8e = lvewx 2, 3, 4 0x7c,0x43,0x20,0xce = lvx 2, 3, 4 0x7c,0x43,0x22,0xce = lvxl 2, 3, 4 0x7c,0x43,0x21,0x0e = stvebx 2, 3, 4 0x7c,0x43,0x21,0x4e = stvehx 2, 3, 4 0x7c,0x43,0x21,0x8e = stvewx 2, 3, 4 0x7c,0x43,0x21,0xce = stvx 2, 3, 4 0x7c,0x43,0x23,0xce = stvxl 2, 3, 4 0x7c,0x43,0x20,0x0c = lvsl 2, 3, 4 0x7c,0x43,0x20,0x4c = lvsr 2, 3, 4 0x10,0x43,0x23,0x0e = vpkpx 2, 3, 4 0x10,0x43,0x21,0x8e = vpkshss 2, 3, 4 0x10,0x43,0x21,0x0e = vpkshus 2, 3, 4 0x10,0x43,0x21,0xce = vpkswss 2, 3, 4 0x10,0x43,0x21,0x4e = vpkswus 2, 3, 4 0x10,0x43,0x20,0x0e = vpkuhum 2, 3, 4 0x10,0x43,0x20,0x8e = vpkuhus 2, 3, 4 0x10,0x43,0x20,0x4e = vpkuwum 2, 3, 4 0x10,0x43,0x20,0xce = vpkuwus 2, 3, 4 0x10,0x40,0x1b,0x4e = vupkhpx 2, 3 0x10,0x40,0x1a,0x0e = vupkhsb 2, 3 0x10,0x40,0x1a,0x4e = vupkhsh 2, 3 0x10,0x40,0x1b,0xce = vupklpx 2, 3 0x10,0x40,0x1a,0x8e = vupklsb 2, 3 0x10,0x40,0x1a,0xce = vupklsh 2, 3 0x10,0x43,0x20,0x0c = vmrghb 2, 3, 4 0x10,0x43,0x20,0x4c = vmrghh 2, 3, 4 0x10,0x43,0x20,0x8c = vmrghw 2, 3, 4 0x10,0x43,0x21,0x0c = vmrglb 2, 3, 4 0x10,0x43,0x21,0x4c = vmrglh 2, 3, 4 0x10,0x43,0x21,0x8c = vmrglw 2, 3, 4 0x10,0x41,0x1a,0x0c = vspltb 2, 3, 1 0x10,0x41,0x1a,0x4c = vsplth 2, 3, 1 0x10,0x41,0x1a,0x8c = vspltw 2, 3, 1 0x10,0x43,0x03,0x0c = vspltisb 2, 3 0x10,0x43,0x03,0x4c = vspltish 2, 3 0x10,0x43,0x03,0x8c = vspltisw 2, 3 0x10,0x43,0x21,0x6b = vperm 2, 3, 4, 5 0x10,0x43,0x21,0x6a = vsel 2, 3, 4, 5 0x10,0x43,0x21,0xc4 = vsl 2, 3, 4 0x10,0x43,0x21,0x6c = vsldoi 2, 3, 4, 5 0x10,0x43,0x24,0x0c = vslo 2, 3, 4 0x10,0x43,0x22,0xc4 = vsr 2, 3, 4 0x10,0x43,0x24,0x4c = vsro 2, 3, 4 0x10,0x43,0x21,0x80 = vaddcuw 2, 3, 4 0x10,0x43,0x23,0x00 = vaddsbs 2, 3, 4 0x10,0x43,0x23,0x40 = vaddshs 2, 3, 4 0x10,0x43,0x23,0x80 = vaddsws 2, 3, 4 0x10,0x43,0x20,0x00 = vaddubm 2, 3, 4 0x10,0x43,0x20,0x40 = vadduhm 2, 3, 4 0x10,0x43,0x20,0x80 = vadduwm 2, 3, 4 0x10,0x43,0x22,0x00 = vaddubs 2, 3, 4 0x10,0x43,0x22,0x40 = vadduhs 2, 3, 4 0x10,0x43,0x22,0x80 = vadduws 2, 3, 4 0x10,0x43,0x25,0x80 = vsubcuw 2, 3, 4 0x10,0x43,0x27,0x00 = vsubsbs 2, 3, 4 0x10,0x43,0x27,0x40 = vsubshs 2, 3, 4 0x10,0x43,0x27,0x80 = vsubsws 2, 3, 4 0x10,0x43,0x24,0x00 = vsububm 2, 3, 4 0x10,0x43,0x24,0x40 = vsubuhm 2, 3, 4 0x10,0x43,0x24,0x80 = vsubuwm 2, 3, 4 0x10,0x43,0x26,0x00 = vsububs 2, 3, 4 0x10,0x43,0x26,0x40 = vsubuhs 2, 3, 4 0x10,0x43,0x26,0x80 = vsubuws 2, 3, 4 0x10,0x43,0x23,0x08 = vmulesb 2, 3, 4 0x10,0x43,0x23,0x48 = vmulesh 2, 3, 4 0x10,0x43,0x22,0x08 = vmuleub 2, 3, 4 0x10,0x43,0x22,0x48 = vmuleuh 2, 3, 4 0x10,0x43,0x21,0x08 = vmulosb 2, 3, 4 0x10,0x43,0x21,0x48 = vmulosh 2, 3, 4 0x10,0x43,0x20,0x08 = vmuloub 2, 3, 4 0x10,0x43,0x20,0x48 = vmulouh 2, 3, 4 0x10,0x43,0x21,0x60 = vmhaddshs 2, 3, 4, 5 0x10,0x43,0x21,0x61 = vmhraddshs 2, 3, 4, 5 0x10,0x43,0x21,0x62 = vmladduhm 2, 3, 4, 5 0x10,0x43,0x21,0x64 = vmsumubm 2, 3, 4, 5 0x10,0x43,0x21,0x65 = vmsummbm 2, 3, 4, 5 0x10,0x43,0x21,0x68 = vmsumshm 2, 3, 4, 5 0x10,0x43,0x21,0x69 = vmsumshs 2, 3, 4, 5 0x10,0x43,0x21,0x66 = vmsumuhm 2, 3, 4, 5 0x10,0x43,0x21,0x67 = vmsumuhs 2, 3, 4, 5 0x10,0x43,0x27,0x88 = vsumsws 2, 3, 4 0x10,0x43,0x26,0x88 = vsum2sws 2, 3, 4 0x10,0x43,0x27,0x08 = vsum4sbs 2, 3, 4 0x10,0x43,0x26,0x48 = vsum4shs 2, 3, 4 0x10,0x43,0x26,0x08 = vsum4ubs 2, 3, 4 0x10,0x43,0x25,0x02 = vavgsb 2, 3, 4 0x10,0x43,0x25,0x42 = vavgsh 2, 3, 4 0x10,0x43,0x25,0x82 = vavgsw 2, 3, 4 0x10,0x43,0x24,0x02 = vavgub 2, 3, 4 0x10,0x43,0x24,0x42 = vavguh 2, 3, 4 0x10,0x43,0x24,0x82 = vavguw 2, 3, 4 0x10,0x43,0x21,0x02 = vmaxsb 2, 3, 4 0x10,0x43,0x21,0x42 = vmaxsh 2, 3, 4 0x10,0x43,0x21,0x82 = vmaxsw 2, 3, 4 0x10,0x43,0x20,0x02 = vmaxub 2, 3, 4 0x10,0x43,0x20,0x42 = vmaxuh 2, 3, 4 0x10,0x43,0x20,0x82 = vmaxuw 2, 3, 4 0x10,0x43,0x23,0x02 = vminsb 2, 3, 4 0x10,0x43,0x23,0x42 = vminsh 2, 3, 4 0x10,0x43,0x23,0x82 = vminsw 2, 3, 4 0x10,0x43,0x22,0x02 = vminub 2, 3, 4 0x10,0x43,0x22,0x42 = vminuh 2, 3, 4 0x10,0x43,0x22,0x82 = vminuw 2, 3, 4 0x10,0x43,0x20,0x06 = vcmpequb 2, 3, 4 0x10,0x43,0x24,0x06 = vcmpequb. 2, 3, 4 0x10,0x43,0x20,0x46 = vcmpequh 2, 3, 4 0x10,0x43,0x24,0x46 = vcmpequh. 2, 3, 4 0x10,0x43,0x20,0x86 = vcmpequw 2, 3, 4 0x10,0x43,0x24,0x86 = vcmpequw. 2, 3, 4 0x10,0x43,0x23,0x06 = vcmpgtsb 2, 3, 4 0x10,0x43,0x27,0x06 = vcmpgtsb. 2, 3, 4 0x10,0x43,0x23,0x46 = vcmpgtsh 2, 3, 4 0x10,0x43,0x27,0x46 = vcmpgtsh. 2, 3, 4 0x10,0x43,0x23,0x86 = vcmpgtsw 2, 3, 4 0x10,0x43,0x27,0x86 = vcmpgtsw. 2, 3, 4 0x10,0x43,0x22,0x06 = vcmpgtub 2, 3, 4 0x10,0x43,0x26,0x06 = vcmpgtub. 2, 3, 4 0x10,0x43,0x22,0x46 = vcmpgtuh 2, 3, 4 0x10,0x43,0x26,0x46 = vcmpgtuh. 2, 3, 4 0x10,0x43,0x22,0x86 = vcmpgtuw 2, 3, 4 0x10,0x43,0x26,0x86 = vcmpgtuw. 2, 3, 4 0x10,0x43,0x24,0x04 = vand 2, 3, 4 0x10,0x43,0x24,0x44 = vandc 2, 3, 4 0x10,0x43,0x25,0x04 = vnor 2, 3, 4 0x10,0x43,0x24,0x84 = vor 2, 3, 4 0x10,0x43,0x24,0xc4 = vxor 2, 3, 4 0x10,0x43,0x20,0x04 = vrlb 2, 3, 4 0x10,0x43,0x20,0x44 = vrlh 2, 3, 4 0x10,0x43,0x20,0x84 = vrlw 2, 3, 4 0x10,0x43,0x21,0x04 = vslb 2, 3, 4 0x10,0x43,0x21,0x44 = vslh 2, 3, 4 0x10,0x43,0x21,0x84 = vslw 2, 3, 4 0x10,0x43,0x22,0x04 = vsrb 2, 3, 4 0x10,0x43,0x22,0x44 = vsrh 2, 3, 4 0x10,0x43,0x22,0x84 = vsrw 2, 3, 4 0x10,0x43,0x23,0x04 = vsrab 2, 3, 4 0x10,0x43,0x23,0x44 = vsrah 2, 3, 4 0x10,0x43,0x23,0x84 = vsraw 2, 3, 4 0x10,0x43,0x20,0x0a = vaddfp 2, 3, 4 0x10,0x43,0x20,0x4a = vsubfp 2, 3, 4 0x10,0x43,0x29,0x2e = vmaddfp 2, 3, 4, 5 0x10,0x43,0x29,0x2f = vnmsubfp 2, 3, 4, 5 0x10,0x43,0x24,0x0a = vmaxfp 2, 3, 4 0x10,0x43,0x24,0x4a = vminfp 2, 3, 4 0x10,0x44,0x1b,0xca = vctsxs 2, 3, 4 0x10,0x44,0x1b,0x8a = vctuxs 2, 3, 4 0x10,0x44,0x1b,0x4a = vcfsx 2, 3, 4 0x10,0x44,0x1b,0x0a = vcfux 2, 3, 4 0x10,0x40,0x1a,0xca = vrfim 2, 3 0x10,0x40,0x1a,0x0a = vrfin 2, 3 0x10,0x40,0x1a,0x8a = vrfip 2, 3 0x10,0x40,0x1a,0x4a = vrfiz 2, 3 0x10,0x43,0x23,0xc6 = vcmpbfp 2, 3, 4 0x10,0x43,0x27,0xc6 = vcmpbfp. 2, 3, 4 0x10,0x43,0x20,0xc6 = vcmpeqfp 2, 3, 4 0x10,0x43,0x24,0xc6 = vcmpeqfp. 2, 3, 4 0x10,0x43,0x21,0xc6 = vcmpgefp 2, 3, 4 0x10,0x43,0x25,0xc6 = vcmpgefp. 2, 3, 4 0x10,0x43,0x22,0xc6 = vcmpgtfp 2, 3, 4 0x10,0x43,0x26,0xc6 = vcmpgtfp. 2, 3, 4 0x10,0x40,0x19,0x8a = vexptefp 2, 3 0x10,0x40,0x19,0xca = vlogefp 2, 3 0x10,0x40,0x19,0x0a = vrefp 2, 3 0x10,0x40,0x19,0x4a = vrsqrtefp 2, 3 0x10,0x00,0x16,0x44 = mtvscr 2 0x10,0x40,0x06,0x04 = mfvscr 2 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-encoding.s.cs010066400017500001750000000162071363402546700225570ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0x4c,0x8a,0x18,0x20 = bclr 4, 10, 3 0x4c,0x8a,0x00,0x20 = bclr 4, 10, 0 0x4c,0x8a,0x18,0x21 = bclrl 4, 10, 3 0x4c,0x8a,0x00,0x21 = bclrl 4, 10, 0 0x4c,0x8a,0x1c,0x20 = bcctr 4, 10, 3 0x4c,0x8a,0x04,0x20 = bcctr 4, 10, 0 0x4c,0x8a,0x1c,0x21 = bcctrl 4, 10, 3 0x4c,0x8a,0x04,0x21 = bcctrl 4, 10, 0 0x4c,0x43,0x22,0x02 = crand 2, 3, 4 0x4c,0x43,0x21,0xc2 = crnand 2, 3, 4 0x4c,0x43,0x23,0x82 = cror 2, 3, 4 0x4c,0x43,0x21,0x82 = crxor 2, 3, 4 0x4c,0x43,0x20,0x42 = crnor 2, 3, 4 0x4c,0x43,0x22,0x42 = creqv 2, 3, 4 0x4c,0x43,0x21,0x02 = crandc 2, 3, 4 0x4c,0x43,0x23,0x42 = crorc 2, 3, 4 0x4d,0x0c,0x00,0x00 = mcrf 2, 3 0x44,0x00,0x00,0x22 = sc 1 0x44,0x00,0x00,0x02 = sc 0 0x88,0x44,0x00,0x80 = lbz 2, 128(4) 0x7c,0x43,0x20,0xae = lbzx 2, 3, 4 0x8c,0x44,0x00,0x80 = lbzu 2, 128(4) 0x7c,0x43,0x20,0xee = lbzux 2, 3, 4 0xa0,0x44,0x00,0x80 = lhz 2, 128(4) 0x7c,0x43,0x22,0x2e = lhzx 2, 3, 4 0xa4,0x44,0x00,0x80 = lhzu 2, 128(4) 0x7c,0x43,0x22,0x6e = lhzux 2, 3, 4 0xa8,0x44,0x00,0x80 = lha 2, 128(4) 0x7c,0x43,0x22,0xae = lhax 2, 3, 4 0xac,0x44,0x00,0x80 = lhau 2, 128(4) 0x7c,0x43,0x22,0xee = lhaux 2, 3, 4 0x80,0x44,0x00,0x80 = lwz 2, 128(4) 0x7c,0x43,0x20,0x2e = lwzx 2, 3, 4 0x84,0x44,0x00,0x80 = lwzu 2, 128(4) 0x7c,0x43,0x20,0x6e = lwzux 2, 3, 4 0xe8,0x44,0x00,0x82 = lwa 2, 128(4) 0x7c,0x43,0x22,0xaa = lwax 2, 3, 4 0x7c,0x43,0x22,0xea = lwaux 2, 3, 4 0xe8,0x44,0x00,0x80 = ld 2, 128(4) 0x7c,0x43,0x20,0x2a = ldx 2, 3, 4 0xe8,0x44,0x00,0x81 = ldu 2, 128(4) 0x7c,0x43,0x20,0x6a = ldux 2, 3, 4 0x98,0x44,0x00,0x80 = stb 2, 128(4) 0x7c,0x43,0x21,0xae = stbx 2, 3, 4 0x9c,0x44,0x00,0x80 = stbu 2, 128(4) 0x7c,0x43,0x21,0xee = stbux 2, 3, 4 0xb0,0x44,0x00,0x80 = sth 2, 128(4) 0x7c,0x43,0x23,0x2e = sthx 2, 3, 4 0xb4,0x44,0x00,0x80 = sthu 2, 128(4) 0x7c,0x43,0x23,0x6e = sthux 2, 3, 4 0x90,0x44,0x00,0x80 = stw 2, 128(4) 0x7c,0x43,0x21,0x2e = stwx 2, 3, 4 0x94,0x44,0x00,0x80 = stwu 2, 128(4) 0x7c,0x43,0x21,0x6e = stwux 2, 3, 4 0xf8,0x44,0x00,0x80 = std 2, 128(4) 0x7c,0x43,0x21,0x2a = stdx 2, 3, 4 0xf8,0x44,0x00,0x81 = stdu 2, 128(4) 0x7c,0x43,0x21,0x6a = stdux 2, 3, 4 0x7c,0x43,0x26,0x2c = lhbrx 2, 3, 4 0x7c,0x43,0x27,0x2c = sthbrx 2, 3, 4 0x7c,0x43,0x24,0x2c = lwbrx 2, 3, 4 0x7c,0x43,0x25,0x2c = stwbrx 2, 3, 4 0x7c,0x43,0x24,0x28 = ldbrx 2, 3, 4 0x7c,0x43,0x25,0x28 = stdbrx 2, 3, 4 0xb8,0x41,0x00,0x80 = lmw 2, 128(1) 0xbc,0x41,0x00,0x80 = stmw 2, 128(1) 0x38,0x43,0x00,0x80 = addi 2, 3, 128 0x3c,0x43,0x00,0x80 = addis 2, 3, 128 0x7c,0x43,0x22,0x14 = add 2, 3, 4 0x7c,0x43,0x22,0x15 = add. 2, 3, 4 0x7c,0x43,0x20,0x50 = subf 2, 3, 4 0x7c,0x43,0x20,0x51 = subf. 2, 3, 4 0x30,0x43,0x00,0x80 = addic 2, 3, 128 0x34,0x43,0x00,0x80 = addic. 2, 3, 128 0x20,0x43,0x00,0x04 = subfic 2, 3, 4 0x7c,0x43,0x20,0x14 = addc 2, 3, 4 0x7c,0x43,0x20,0x15 = addc. 2, 3, 4 0x7c,0x43,0x20,0x10 = subfc 2, 3, 4 0x7c,0x43,0x20,0x10 = subfc 2, 3, 4 0x7c,0x43,0x21,0x14 = adde 2, 3, 4 0x7c,0x43,0x21,0x15 = adde. 2, 3, 4 0x7c,0x43,0x21,0x10 = subfe 2, 3, 4 0x7c,0x43,0x21,0x11 = subfe. 2, 3, 4 0x7c,0x43,0x01,0xd4 = addme 2, 3 0x7c,0x43,0x01,0xd5 = addme. 2, 3 0x7c,0x43,0x01,0xd0 = subfme 2, 3 0x7c,0x43,0x01,0xd1 = subfme. 2, 3 0x7c,0x43,0x01,0x94 = addze 2, 3 0x7c,0x43,0x01,0x95 = addze. 2, 3 0x7c,0x43,0x01,0x90 = subfze 2, 3 0x7c,0x43,0x01,0x91 = subfze. 2, 3 0x7c,0x43,0x00,0xd0 = neg 2, 3 0x7c,0x43,0x00,0xd1 = neg. 2, 3 0x1c,0x43,0x00,0x80 = mulli 2, 3, 128 0x7c,0x43,0x20,0x96 = mulhw 2, 3, 4 0x7c,0x43,0x20,0x97 = mulhw. 2, 3, 4 0x7c,0x43,0x21,0xd6 = mullw 2, 3, 4 0x7c,0x43,0x21,0xd7 = mullw. 2, 3, 4 0x7c,0x43,0x20,0x16 = mulhwu 2, 3, 4 0x7c,0x43,0x20,0x17 = mulhwu. 2, 3, 4 0x7c,0x43,0x23,0xd6 = divw 2, 3, 4 0x7c,0x43,0x23,0xd7 = divw. 2, 3, 4 0x7c,0x43,0x23,0x96 = divwu 2, 3, 4 0x7c,0x43,0x23,0x97 = divwu. 2, 3, 4 0x7c,0x43,0x21,0xd2 = mulld 2, 3, 4 0x7c,0x43,0x21,0xd3 = mulld. 2, 3, 4 0x7c,0x43,0x20,0x92 = mulhd 2, 3, 4 0x7c,0x43,0x20,0x93 = mulhd. 2, 3, 4 0x7c,0x43,0x20,0x12 = mulhdu 2, 3, 4 0x7c,0x43,0x20,0x13 = mulhdu. 2, 3, 4 0x7c,0x43,0x23,0xd2 = divd 2, 3, 4 0x7c,0x43,0x23,0xd3 = divd. 2, 3, 4 0x7c,0x43,0x23,0x92 = divdu 2, 3, 4 0x7c,0x43,0x23,0x93 = divdu. 2, 3, 4 0x2d,0x23,0x00,0x80 = cmpdi 2, 3, 128 0x7d,0x23,0x20,0x00 = cmpd 2, 3, 4 0x29,0x23,0x00,0x80 = cmpldi 2, 3, 128 0x7d,0x23,0x20,0x40 = cmpld 2, 3, 4 0x2d,0x03,0x00,0x80 = cmpwi 2, 3, 128 0x7d,0x03,0x20,0x00 = cmpw 2, 3, 4 0x29,0x03,0x00,0x80 = cmplwi 2, 3, 128 0x7d,0x03,0x20,0x40 = cmplw 2, 3, 4 0x0c,0x43,0x00,0x04 = twi 2, 3, 4 0x7c,0x43,0x20,0x08 = tw 2, 3, 4 0x08,0x43,0x00,0x04 = tdi 2, 3, 4 0x7c,0x43,0x20,0x88 = td 2, 3, 4 0x7c,0x43,0x21,0x5e = isel 2, 3, 4, 5 0x70,0x62,0x00,0x80 = andi. 2, 3, 128 0x74,0x62,0x00,0x80 = andis. 2, 3, 128 0x60,0x62,0x00,0x80 = ori 2, 3, 128 0x64,0x62,0x00,0x80 = oris 2, 3, 128 0x68,0x62,0x00,0x80 = xori 2, 3, 128 0x6c,0x62,0x00,0x80 = xoris 2, 3, 128 0x7c,0x62,0x20,0x38 = and 2, 3, 4 0x7c,0x62,0x20,0x39 = and. 2, 3, 4 0x7c,0x62,0x22,0x78 = xor 2, 3, 4 0x7c,0x62,0x22,0x79 = xor. 2, 3, 4 0x7c,0x62,0x23,0xb8 = nand 2, 3, 4 0x7c,0x62,0x23,0xb9 = nand. 2, 3, 4 0x7c,0x62,0x23,0x78 = or 2, 3, 4 0x7c,0x62,0x23,0x79 = or. 2, 3, 4 0x7c,0x62,0x20,0xf8 = nor 2, 3, 4 0x7c,0x62,0x20,0xf9 = nor. 2, 3, 4 0x7c,0x62,0x22,0x38 = eqv 2, 3, 4 0x7c,0x62,0x22,0x39 = eqv. 2, 3, 4 0x7c,0x62,0x20,0x78 = andc 2, 3, 4 0x7c,0x62,0x20,0x79 = andc. 2, 3, 4 0x7c,0x62,0x23,0x38 = orc 2, 3, 4 0x7c,0x62,0x23,0x39 = orc. 2, 3, 4 0x7c,0x62,0x07,0x74 = extsb 2, 3 0x7c,0x62,0x07,0x75 = extsb. 2, 3 0x7c,0x62,0x07,0x34 = extsh 2, 3 0x7c,0x62,0x07,0x35 = extsh. 2, 3 0x7c,0x62,0x00,0x34 = cntlzw 2, 3 0x7c,0x62,0x00,0x35 = cntlzw. 2, 3 0x7c,0x62,0x02,0xf4 = popcntw 2, 3 0x7c,0x62,0x07,0xb4 = extsw 2, 3 0x7c,0x62,0x07,0xb5 = extsw. 2, 3 0x7c,0x62,0x00,0x74 = cntlzd 2, 3 0x7c,0x62,0x00,0x75 = cntlzd. 2, 3 0x7c,0x62,0x03,0xf4 = popcntd 2, 3 0x54,0x62,0x21,0x4c = rlwinm 2, 3, 4, 5, 6 0x54,0x62,0x21,0x4d = rlwinm. 2, 3, 4, 5, 6 0x5c,0x62,0x21,0x4c = rlwnm 2, 3, 4, 5, 6 0x5c,0x62,0x21,0x4d = rlwnm. 2, 3, 4, 5, 6 0x50,0x62,0x21,0x4c = rlwimi 2, 3, 4, 5, 6 0x50,0x62,0x21,0x4d = rlwimi. 2, 3, 4, 5, 6 0x78,0x62,0x21,0x40 = rldicl 2, 3, 4, 5 0x78,0x62,0x21,0x41 = rldicl. 2, 3, 4, 5 0x78,0x62,0x21,0x44 = rldicr 2, 3, 4, 5 0x78,0x62,0x21,0x45 = rldicr. 2, 3, 4, 5 0x78,0x62,0x21,0x48 = rldic 2, 3, 4, 5 0x78,0x62,0x21,0x49 = rldic. 2, 3, 4, 5 0x78,0x62,0x21,0x50 = rldcl 2, 3, 4, 5 0x78,0x62,0x21,0x51 = rldcl. 2, 3, 4, 5 0x78,0x62,0x21,0x52 = rldcr 2, 3, 4, 5 0x78,0x62,0x21,0x53 = rldcr. 2, 3, 4, 5 0x78,0x62,0x21,0x4c = rldimi 2, 3, 4, 5 0x78,0x62,0x21,0x4d = rldimi. 2, 3, 4, 5 0x7c,0x62,0x20,0x30 = slw 2, 3, 4 0x7c,0x62,0x20,0x31 = slw. 2, 3, 4 0x7c,0x62,0x24,0x30 = srw 2, 3, 4 0x7c,0x62,0x24,0x31 = srw. 2, 3, 4 0x7c,0x62,0x26,0x70 = srawi 2, 3, 4 0x7c,0x62,0x26,0x71 = srawi. 2, 3, 4 0x7c,0x62,0x26,0x30 = sraw 2, 3, 4 0x7c,0x62,0x26,0x31 = sraw. 2, 3, 4 0x7c,0x62,0x20,0x36 = sld 2, 3, 4 0x7c,0x62,0x20,0x37 = sld. 2, 3, 4 0x7c,0x62,0x24,0x36 = srd 2, 3, 4 0x7c,0x62,0x24,0x37 = srd. 2, 3, 4 0x7c,0x62,0x26,0x74 = sradi 2, 3, 4 0x7c,0x62,0x26,0x75 = sradi. 2, 3, 4 0x7c,0x62,0x26,0x34 = srad 2, 3, 4 0x7c,0x62,0x26,0x35 = srad. 2, 3, 4 0x7c,0x58,0x93,0xa6 = mtspr 600, 2 0x7c,0x58,0x92,0xa6 = mfspr 2, 600 0x7c,0x47,0xb1,0x20 = mtcrf 123, 2 0x7c,0x40,0x00,0x26 = mfcr 2 0x7c,0x51,0x01,0x20 = mtocrf 16, 2 0x7e,0x10,0x80,0x26 = mfocrf 16, 8 capstone-sys-0.11.0/capstone/suite/MC/PowerPC/ppc64-operands.s.cs010066400017500001750000000021761363402546700226040ustar0000000000000000# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME 0x7c,0x22,0x1a,0x14 = add 1, 2, 3 0x7c,0x22,0x1a,0x14 = add 1, 2, 3 0x7c,0x00,0x02,0x14 = add 0, 0, 0 0x7f,0xff,0xfa,0x14 = add 31, 31, 31 0x38,0x20,0x00,0x00 = addi 1, 0, 0 0x38,0x20,0x00,0x00 = addi 1, 0, 0 0x38,0x22,0x00,0x00 = addi 1, 2, 0 0x38,0x20,0x80,0x00 = addi 1, 0, -32768 0x38,0x20,0x7f,0xff = addi 1, 0, 32767 0x60,0x41,0x00,0x00 = ori 1, 2, 0 0x60,0x41,0xff,0xff = ori 1, 2, 65535 0x3c,0x20,0x00,0x00 = addis 1, 0, 0 0x3c,0x20,0xff,0xff = addis 1, 0, -1 0x80,0x20,0x00,0x00 = lwz 1, 0(0) 0x80,0x20,0x00,0x00 = lwz 1, 0(0) 0x80,0x3f,0x00,0x00 = lwz 1, 0(31) 0x80,0x3f,0x00,0x00 = lwz 1, 0(31) 0x80,0x22,0x80,0x00 = lwz 1, -32768(2) 0x80,0x22,0x7f,0xff = lwz 1, 32767(2) 0xe8,0x20,0x00,0x00 = ld 1, 0(0) 0xe8,0x20,0x00,0x00 = ld 1, 0(0) 0xe8,0x3f,0x00,0x00 = ld 1, 0(31) 0xe8,0x3f,0x00,0x00 = ld 1, 0(31) 0xe8,0x22,0x80,0x00 = ld 1, -32768(2) 0xe8,0x22,0x7f,0xfc = ld 1, 32764(2) 0xe8,0x22,0x00,0x04 = ld 1, 4(2) 0xe8,0x22,0xff,0xfc = ld 1, -4(2) 0x48,0x00,0x04,0x00 = b .+1024 0x48,0x00,0x04,0x02 = ba 1024 0x41,0x82,0x04,0x00 = beq 0, .+1024 0x41,0x82,0x04,0x02 = beqa 0, 1024 capstone-sys-0.11.0/capstone/suite/MC/README010066400017500001750000000001521363402546700166000ustar0000000000000000Input files for testing Capstone engine. Format of input files: # ARCH, MODE, OPTION hexcode = assembly capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc-alu-instructions.s.cs010066400017500001750000000035651363402546700242240ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0x80,0x00,0x00,0x00 = add %g0, %g0, %g0 0x86,0x00,0x40,0x02 = add %g1, %g2, %g3 0xa0,0x02,0x00,0x09 = add %o0, %o1, %l0 0xa0,0x02,0x20,0x0a = add %o0, 10, %l0 0x86,0x80,0x40,0x02 = addcc %g1, %g2, %g3 0x86,0xc0,0x40,0x02 = addxcc %g1, %g2, %g3 0x86,0x70,0x40,0x02 = udiv %g1, %g2, %g3 0x86,0x78,0x40,0x02 = sdiv %g1, %g2, %g3 0x86,0x08,0x40,0x02 = and %g1, %g2, %g3 0x86,0x28,0x40,0x02 = andn %g1, %g2, %g3 0x86,0x10,0x40,0x02 = or %g1, %g2, %g3 0x86,0x30,0x40,0x02 = orn %g1, %g2, %g3 0x86,0x18,0x40,0x02 = xor %g1, %g2, %g3 0x86,0x38,0x40,0x02 = xnor %g1, %g2, %g3 0x86,0x50,0x40,0x02 = umul %g1, %g2, %g3 0x86,0x58,0x40,0x02 = smul %g1, %g2, %g3 0x01,0x00,0x00,0x00 = nop 0x21,0x00,0x00,0x0a = sethi 10, %l0 0x87,0x28,0x40,0x02 = sll %g1, %g2, %g3 0x87,0x28,0x60,0x1f = sll %g1, 31, %g3 0x87,0x30,0x40,0x02 = srl %g1, %g2, %g3 0x87,0x30,0x60,0x1f = srl %g1, 31, %g3 0x87,0x38,0x40,0x02 = sra %g1, %g2, %g3 0x87,0x38,0x60,0x1f = sra %g1, 31, %g3 0x86,0x20,0x40,0x02 = sub %g1, %g2, %g3 0x86,0xa0,0x40,0x02 = subcc %g1, %g2, %g3 0x86,0xe0,0x40,0x02 = subxcc %g1, %g2, %g3 0x86,0x10,0x00,0x01 = or %g0, %g1, %g3 0x86,0x10,0x20,0xff = or %g0, 255, %g3 0x81,0xe8,0x00,0x00 = restore 0x86,0x40,0x80,0x01 = addx %g2, %g1, %g3 0x86,0x60,0x80,0x01 = subx %g2, %g1, %g3 0x86,0xd0,0x80,0x01 = umulcc %g2, %g1, %g3 0x86,0xd8,0x80,0x01 = smulcc %g2, %g1, %g3 0x86,0xf0,0x80,0x01 = udivcc %g2, %g1, %g3 0x86,0xf8,0x80,0x01 = sdivcc %g2, %g1, %g3 0x86,0x88,0x80,0x01 = andcc %g2, %g1, %g3 0x86,0xa8,0x80,0x01 = andncc %g2, %g1, %g3 0x86,0x90,0x80,0x01 = orcc %g2, %g1, %g3 0x86,0xb0,0x80,0x01 = orncc %g2, %g1, %g3 0x86,0x98,0x80,0x01 = xorcc %g2, %g1, %g3 0x86,0xb8,0x80,0x01 = xnorcc %g2, %g1, %g3 0x87,0x00,0x80,0x01 = taddcc %g2, %g1, %g3 0x87,0x08,0x80,0x01 = tsubcc %g2, %g1, %g3 0x87,0x10,0x80,0x01 = taddcctv %g2, %g1, %g3 0x87,0x18,0x80,0x01 = tsubcctv %g2, %g1, %g3 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc-atomic-instructions.s.cs010066400017500001750000000004171363402546700247100ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0x81,0x43,0xe0,0x0f = membar 15 0x81,0x43,0xc0,0x00 = stbar 0xd4,0x7e,0x00,0x16 = swap [%i0+%l6], %o2 0xd4,0x7e,0x20,0x20 = swap [%i0+32], %o2 0xd5,0xe6,0x10,0x16 = cas [%i0], %l6, %o2 0xd5,0xf6,0x10,0x16 = casx [%i0], %l6, %o2 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc-ctrl-instructions.s.cs010066400017500001750000000006001363402546700243720ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0x9f,0xc0,0x40,0x1a = call %g1+%i2 0x9f,0xc2,0x60,0x08 = call %o1+8 0x9f,0xc0,0x60,0x00 = call %g1 0x81,0xc0,0x40,0x1a = jmp %g1+%i2 0x81,0xc2,0x60,0x08 = jmp %o1+8 0x81,0xc0,0x60,0x00 = jmp %g1 0x85,0xc0,0x40,0x1a = jmpl %g1+%i2, %g2 0x85,0xc2,0x60,0x08 = jmpl %o1+8, %g2 0x85,0xc0,0x60,0x00 = jmpl %g1, %g2 0x81,0xcf,0xe0,0x08 = rett %i7+8 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc-fp-instructions.s.cs010066400017500001750000000045161363402546700240450ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN + CS_MODE_V9, None 0x89,0xa0,0x18,0x80 = fitos %f0, %f4 0x89,0xa0,0x19,0x00 = fitod %f0, %f4 0x89,0xa0,0x19,0x80 = fitoq %f0, %f4 0x89,0xa0,0x1a,0x20 = fstoi %f0, %f4 0x89,0xa0,0x1a,0x40 = fdtoi %f0, %f4 0x89,0xa0,0x1a,0x60 = fqtoi %f0, %f4 0x89,0xa0,0x19,0x20 = fstod %f0, %f4 0x89,0xa0,0x19,0xa0 = fstoq %f0, %f4 0x89,0xa0,0x18,0xc0 = fdtos %f0, %f4 0x89,0xa0,0x19,0xc0 = fdtoq %f0, %f4 0x89,0xa0,0x18,0xe0 = fqtos %f0, %f4 0x89,0xa0,0x19,0x60 = fqtod %f0, %f4 0x89,0xa0,0x00,0x20 = fmovs %f0, %f4 0x89,0xa0,0x00,0x40 = fmovd %f0, %f4 0x89,0xa0,0x00,0x60 = fmovq %f0, %f4 0x89,0xa0,0x00,0xa0 = fnegs %f0, %f4 0x89,0xa0,0x00,0xc0 = fnegd %f0, %f4 0x89,0xa0,0x00,0xe0 = fnegq %f0, %f4 0x89,0xa0,0x01,0x20 = fabss %f0, %f4 0x89,0xa0,0x01,0x40 = fabsd %f0, %f4 0x89,0xa0,0x01,0x60 = fabsq %f0, %f4 0x89,0xa0,0x05,0x20 = fsqrts %f0, %f4 0x89,0xa0,0x05,0x40 = fsqrtd %f0, %f4 0x89,0xa0,0x05,0x60 = fsqrtq %f0, %f4 0x91,0xa0,0x08,0x24 = fadds %f0, %f4, %f8 0x91,0xa0,0x08,0x44 = faddd %f0, %f4, %f8 0x91,0xa0,0x08,0x64 = faddq %f0, %f4, %f8 0xbf,0xa0,0x48,0x43 = faddd %f32, %f34, %f62 0xbb,0xa0,0x48,0x65 = faddq %f32, %f36, %f60 0x91,0xa0,0x08,0xa4 = fsubs %f0, %f4, %f8 0x91,0xa0,0x08,0xc4 = fsubd %f0, %f4, %f8 0x91,0xa0,0x08,0xe4 = fsubq %f0, %f4, %f8 0x91,0xa0,0x09,0x24 = fmuls %f0, %f4, %f8 0x91,0xa0,0x09,0x44 = fmuld %f0, %f4, %f8 0x91,0xa0,0x09,0x64 = fmulq %f0, %f4, %f8 0x91,0xa0,0x0d,0x24 = fsmuld %f0, %f4, %f8 0x91,0xa0,0x0d,0xc4 = fdmulq %f0, %f4, %f8 0x91,0xa0,0x09,0xa4 = fdivs %f0, %f4, %f8 0x91,0xa0,0x09,0xc4 = fdivd %f0, %f4, %f8 0x91,0xa0,0x09,0xe4 = fdivq %f0, %f4, %f8 0x81,0xa8,0x0a,0x24 = fcmps %fcc0, %f0, %f4 0x81,0xa8,0x0a,0x44 = fcmpd %fcc0, %f0, %f4 0x81,0xa8,0x0a,0x64 = fcmpq %fcc0, %f0, %f4 0x81,0xa8,0x0a,0xa4 = fcmpes %fcc0, %f0, %f4 0x81,0xa8,0x0a,0xc4 = fcmped %fcc0, %f0, %f4 0x81,0xa8,0x0a,0xe4 = fcmpeq %fcc0, %f0, %f4 0x85,0xa8,0x0a,0x24 = fcmps %fcc2, %f0, %f4 0x85,0xa8,0x0a,0x44 = fcmpd %fcc2, %f0, %f4 0x85,0xa8,0x0a,0x64 = fcmpq %fcc2, %f0, %f4 0x85,0xa8,0x0a,0xa4 = fcmpes %fcc2, %f0, %f4 0x85,0xa8,0x0a,0xc4 = fcmped %fcc2, %f0, %f4 0x85,0xa8,0x0a,0xe4 = fcmpeq %fcc2, %f0, %f4 0x89,0xa0,0x10,0x80 = fxtos %f0, %f4 0x89,0xa0,0x11,0x00 = fxtod %f0, %f4 0x89,0xa0,0x11,0x80 = fxtoq %f0, %f4 0x89,0xa0,0x10,0x20 = fstox %f0, %f4 0x89,0xa0,0x10,0x40 = fdtox %f0, %f4 0x89,0xa0,0x10,0x60 = fqtox %f0, %f4 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc-mem-instructions.s.cs010066400017500001750000000017401363402546700242120ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0xd4,0x4e,0x00,0x16 = ldsb [%i0+%l6], %o2 0xd4,0x4e,0x20,0x20 = ldsb [%i0+32], %o2 0xd8,0x48,0x60,0x00 = ldsb [%g1], %o4 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2 0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2 0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4 0xd4,0x0e,0x00,0x16 = ldub [%i0+%l6], %o2 0xd4,0x0e,0x20,0x20 = ldub [%i0+32], %o2 0xd4,0x08,0x60,0x00 = ldub [%g1], %o2 0xd4,0x16,0x00,0x16 = lduh [%i0+%l6], %o2 0xd4,0x16,0x20,0x20 = lduh [%i0+32], %o2 0xd4,0x10,0x60,0x00 = lduh [%g1], %o2 0xd4,0x06,0x00,0x16 = ld [%i0+%l6], %o2 0xd4,0x06,0x20,0x20 = ld [%i0+32], %o2 0xd4,0x00,0x60,0x00 = ld [%g1], %o2 0xd4,0x2e,0x00,0x16 = stb %o2, [%i0+%l6] 0xd4,0x2e,0x20,0x20 = stb %o2, [%i0+32] 0xd4,0x28,0x60,0x00 = stb %o2, [%g1] 0xd4,0x36,0x00,0x16 = sth %o2, [%i0+%l6] 0xd4,0x36,0x20,0x20 = sth %o2, [%i0+32] 0xd4,0x30,0x60,0x00 = sth %o2, [%g1] 0xd4,0x26,0x00,0x16 = st %o2, [%i0+%l6] 0xd4,0x26,0x20,0x20 = st %o2, [%i0+32] 0xd4,0x20,0x60,0x00 = st %o2, [%g1] capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc-vis.s.cs010066400017500001750000000001141363402546700214650ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0xbf,0xb0,0x0c,0x20 = fzeros %f31 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc64-alu-instructions.s.cs010066400017500001750000000010241363402546700243620ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0xb1,0x28,0x50,0x1a = sllx %g1, %i2, %i0 0xb1,0x28,0x70,0x3f = sllx %g1, 63, %i0 0xb1,0x30,0x50,0x1a = srlx %g1, %i2, %i0 0xb1,0x30,0x70,0x3f = srlx %g1, 63, %i0 0xb1,0x38,0x50,0x1a = srax %g1, %i2, %i0 0xb1,0x38,0x70,0x3f = srax %g1, 63, %i0 0xb0,0x48,0x40,0x1a = mulx %g1, %i2, %i0 0xb0,0x48,0x60,0x3f = mulx %g1, 63, %i0 0xb1,0x68,0x40,0x1a = sdivx %g1, %i2, %i0 0xb1,0x68,0x60,0x3f = sdivx %g1, 63, %i0 0xb0,0x68,0x40,0x1a = udivx %g1, %i2, %i0 0xb0,0x68,0x60,0x3f = udivx %g1, 63, %i0 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparc64-ctrl-instructions.s.cs010066400017500001750000000106111363402546700245470ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0x85,0x66,0x40,0x01 = movne %icc, %g1, %g2 0x85,0x64,0x40,0x01 = move %icc, %g1, %g2 0x85,0x66,0x80,0x01 = movg %icc, %g1, %g2 0x85,0x64,0x80,0x01 = movle %icc, %g1, %g2 0x85,0x66,0xc0,0x01 = movge %icc, %g1, %g2 0x85,0x64,0xc0,0x01 = movl %icc, %g1, %g2 0x85,0x67,0x00,0x01 = movgu %icc, %g1, %g2 0x85,0x65,0x00,0x01 = movleu %icc, %g1, %g2 0x85,0x67,0x40,0x01 = movcc %icc, %g1, %g2 0x85,0x65,0x40,0x01 = movcs %icc, %g1, %g2 0x85,0x67,0x80,0x01 = movpos %icc, %g1, %g2 0x85,0x65,0x80,0x01 = movneg %icc, %g1, %g2 0x85,0x67,0xc0,0x01 = movvc %icc, %g1, %g2 0x85,0x65,0xc0,0x01 = movvs %icc, %g1, %g2 0x85,0x66,0x50,0x01 = movne %xcc, %g1, %g2 0x85,0x64,0x50,0x01 = move %xcc, %g1, %g2 0x85,0x66,0x90,0x01 = movg %xcc, %g1, %g2 0x85,0x64,0x90,0x01 = movle %xcc, %g1, %g2 0x85,0x66,0xd0,0x01 = movge %xcc, %g1, %g2 0x85,0x64,0xd0,0x01 = movl %xcc, %g1, %g2 0x85,0x67,0x10,0x01 = movgu %xcc, %g1, %g2 0x85,0x65,0x10,0x01 = movleu %xcc, %g1, %g2 0x85,0x67,0x50,0x01 = movcc %xcc, %g1, %g2 0x85,0x65,0x50,0x01 = movcs %xcc, %g1, %g2 0x85,0x67,0x90,0x01 = movpos %xcc, %g1, %g2 0x85,0x65,0x90,0x01 = movneg %xcc, %g1, %g2 0x85,0x67,0xd0,0x01 = movvc %xcc, %g1, %g2 0x85,0x65,0xd0,0x01 = movvs %xcc, %g1, %g2 0x85,0x61,0xc0,0x01 = movu %fcc0, %g1, %g2 0x85,0x61,0x80,0x01 = movg %fcc0, %g1, %g2 0x85,0x61,0x40,0x01 = movug %fcc0, %g1, %g2 0x85,0x61,0x00,0x01 = movl %fcc0, %g1, %g2 0x85,0x60,0xc0,0x01 = movul %fcc0, %g1, %g2 0x85,0x60,0x80,0x01 = movlg %fcc0, %g1, %g2 0x85,0x60,0x40,0x01 = movne %fcc0, %g1, %g2 0x85,0x62,0x40,0x01 = move %fcc0, %g1, %g2 0x85,0x62,0x80,0x01 = movue %fcc0, %g1, %g2 0x85,0x62,0xc0,0x01 = movge %fcc0, %g1, %g2 0x85,0x63,0x00,0x01 = movuge %fcc0, %g1, %g2 0x85,0x63,0x40,0x01 = movle %fcc0, %g1, %g2 0x85,0x63,0x80,0x01 = movule %fcc0, %g1, %g2 0x85,0x63,0xc0,0x01 = movo %fcc0, %g1, %g2 0x85,0xaa,0x60,0x21 = fmovsne %icc, %f1, %f2 0x85,0xa8,0x60,0x21 = fmovse %icc, %f1, %f2 0x85,0xaa,0xa0,0x21 = fmovsg %icc, %f1, %f2 0x85,0xa8,0xa0,0x21 = fmovsle %icc, %f1, %f2 0x85,0xaa,0xe0,0x21 = fmovsge %icc, %f1, %f2 0x85,0xa8,0xe0,0x21 = fmovsl %icc, %f1, %f2 0x85,0xab,0x20,0x21 = fmovsgu %icc, %f1, %f2 0x85,0xa9,0x20,0x21 = fmovsleu %icc, %f1, %f2 0x85,0xab,0x60,0x21 = fmovscc %icc, %f1, %f2 0x85,0xa9,0x60,0x21 = fmovscs %icc, %f1, %f2 0x85,0xab,0xa0,0x21 = fmovspos %icc, %f1, %f2 0x85,0xa9,0xa0,0x21 = fmovsneg %icc, %f1, %f2 0x85,0xab,0xe0,0x21 = fmovsvc %icc, %f1, %f2 0x85,0xa9,0xe0,0x21 = fmovsvs %icc, %f1, %f2 0x85,0xaa,0x70,0x21 = fmovsne %xcc, %f1, %f2 0x85,0xa8,0x70,0x21 = fmovse %xcc, %f1, %f2 0x85,0xaa,0xb0,0x21 = fmovsg %xcc, %f1, %f2 0x85,0xa8,0xb0,0x21 = fmovsle %xcc, %f1, %f2 0x85,0xaa,0xf0,0x21 = fmovsge %xcc, %f1, %f2 0x85,0xa8,0xf0,0x21 = fmovsl %xcc, %f1, %f2 0x85,0xab,0x30,0x21 = fmovsgu %xcc, %f1, %f2 0x85,0xa9,0x30,0x21 = fmovsleu %xcc, %f1, %f2 0x85,0xab,0x70,0x21 = fmovscc %xcc, %f1, %f2 0x85,0xa9,0x70,0x21 = fmovscs %xcc, %f1, %f2 0x85,0xab,0xb0,0x21 = fmovspos %xcc, %f1, %f2 0x85,0xa9,0xb0,0x21 = fmovsneg %xcc, %f1, %f2 0x85,0xab,0xf0,0x21 = fmovsvc %xcc, %f1, %f2 0x85,0xa9,0xf0,0x21 = fmovsvs %xcc, %f1, %f2 0x85,0xa9,0xc0,0x21 = fmovsu %fcc0, %f1, %f2 0x85,0xa9,0x80,0x21 = fmovsg %fcc0, %f1, %f2 0x85,0xa9,0x40,0x21 = fmovsug %fcc0, %f1, %f2 0x85,0xa9,0x00,0x21 = fmovsl %fcc0, %f1, %f2 0x85,0xa8,0xc0,0x21 = fmovsul %fcc0, %f1, %f2 0x85,0xa8,0x80,0x21 = fmovslg %fcc0, %f1, %f2 0x85,0xa8,0x40,0x21 = fmovsne %fcc0, %f1, %f2 0x85,0xaa,0x40,0x21 = fmovse %fcc0, %f1, %f2 0x85,0xaa,0x80,0x21 = fmovsue %fcc0, %f1, %f2 0x85,0xaa,0xc0,0x21 = fmovsge %fcc0, %f1, %f2 0x85,0xab,0x00,0x21 = fmovsuge %fcc0, %f1, %f2 0x85,0xab,0x40,0x21 = fmovsle %fcc0, %f1, %f2 0x85,0xab,0x80,0x21 = fmovsule %fcc0, %f1, %f2 0x85,0xab,0xc0,0x21 = fmovso %fcc0, %f1, %f2 0x85,0x61,0xc8,0x01 = movu %fcc1, %g1, %g2 0x85,0xa9,0x90,0x21 = fmovsg %fcc2, %f1, %f2 0x87,0x78,0x44,0x02 = movrz %g1, %g2, %g3 0x87,0x78,0x48,0x02 = movrlez %g1, %g2, %g3 0x87,0x78,0x4c,0x02 = movrlz %g1, %g2, %g3 0x87,0x78,0x54,0x02 = movrnz %g1, %g2, %g3 0x87,0x78,0x58,0x02 = movrgz %g1, %g2, %g3 0x87,0x78,0x5c,0x02 = movrgez %g1, %g2, %g3 0x87,0xa8,0x44,0xa2 = fmovrsz %g1, %f2, %f3 0x87,0xa8,0x48,0xa2 = fmovrslez %g1, %f2, %f3 0x87,0xa8,0x4c,0xa2 = fmovrslz %g1, %f2, %f3 0x87,0xa8,0x54,0xa2 = fmovrsnz %g1, %f2, %f3 0x87,0xa8,0x58,0xa2 = fmovrsgz %g1, %f2, %f3 0x87,0xa8,0x5c,0xa2 = fmovrsgez %g1, %f2, %f3 0x81,0xcf,0xe0,0x08 = rett %i7+8 0x91,0xd0,0x20,0x05 = ta %icc, %g0 + 5 0x83,0xd0,0x30,0x03 = te %xcc, %g0 + 3 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparcv8-instructions.s.cs010066400017500001750000000004131363402546700237100ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None 0x81,0xa8,0x0a,0x24 = fcmps %f0, %f4 0x81,0xa8,0x0a,0x44 = fcmpd %f0, %f4 0x81,0xa8,0x0a,0x64 = fcmpq %f0, %f4 0x81,0xa8,0x0a,0xa4 = fcmpes %f0, %f4 0x81,0xa8,0x0a,0xc4 = fcmped %f0, %f4 0x81,0xa8,0x0a,0xe4 = fcmpeq %f0, %f4 capstone-sys-0.11.0/capstone/suite/MC/Sparc/sparcv9-instructions.s.cs010066400017500001750000000000521363402546700237100ustar0000000000000000# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None capstone-sys-0.11.0/capstone/suite/MC/SystemZ/insn-good-z196.s.cs010066400017500001750000000675441363402546700225540ustar0000000000000000# CS_ARCH_SYSZ, 0, None 0xec,0x00,0x80,0x00,0x00,0xd9 = aghik %r0, %r0, -32768 0xec,0x00,0xff,0xff,0x00,0xd9 = aghik %r0, %r0, -1 0xec,0x00,0x00,0x00,0x00,0xd9 = aghik %r0, %r0, 0 0xec,0x00,0x00,0x01,0x00,0xd9 = aghik %r0, %r0, 1 0xec,0x00,0x7f,0xff,0x00,0xd9 = aghik %r0, %r0, 32767 0xec,0x0f,0x00,0x00,0x00,0xd9 = aghik %r0, %r15, 0 0xec,0xf0,0x00,0x00,0x00,0xd9 = aghik %r15, %r0, 0 0xec,0x78,0xff,0xf0,0x00,0xd9 = aghik %r7, %r8, -16 0xb9,0xe8,0x00,0x00 = agrk %r0, %r0, %r0 0xb9,0xe8,0xf0,0x00 = agrk %r0, %r0, %r15 0xb9,0xe8,0x00,0x0f = agrk %r0, %r15, %r0 0xb9,0xe8,0x00,0xf0 = agrk %r15, %r0, %r0 0xb9,0xe8,0x90,0x78 = agrk %r7, %r8, %r9 0xec,0x00,0x80,0x00,0x00,0xd8 = ahik %r0, %r0, -32768 0xec,0x00,0xff,0xff,0x00,0xd8 = ahik %r0, %r0, -1 0xec,0x00,0x00,0x00,0x00,0xd8 = ahik %r0, %r0, 0 0xec,0x00,0x00,0x01,0x00,0xd8 = ahik %r0, %r0, 1 0xec,0x00,0x7f,0xff,0x00,0xd8 = ahik %r0, %r0, 32767 0xec,0x0f,0x00,0x00,0x00,0xd8 = ahik %r0, %r15, 0 0xec,0xf0,0x00,0x00,0x00,0xd8 = ahik %r15, %r0, 0 0xec,0x78,0xff,0xf0,0x00,0xd8 = ahik %r7, %r8, -16 0xcc,0x08,0x80,0x00,0x00,0x00 = aih %r0, -2147483648 0xcc,0x08,0xff,0xff,0xff,0xff = aih %r0, -1 0xcc,0x08,0x00,0x00,0x00,0x00 = aih %r0, 0 0xcc,0x08,0x00,0x00,0x00,0x01 = aih %r0, 1 0xcc,0x08,0x7f,0xff,0xff,0xff = aih %r0, 2147483647 0xcc,0xf8,0x00,0x00,0x00,0x00 = aih %r15, 0 0xec,0x00,0x80,0x00,0x00,0xdb = alghsik %r0, %r0, -32768 0xec,0x00,0xff,0xff,0x00,0xdb = alghsik %r0, %r0, -1 0xec,0x00,0x00,0x00,0x00,0xdb = alghsik %r0, %r0, 0 0xec,0x00,0x00,0x01,0x00,0xdb = alghsik %r0, %r0, 1 0xec,0x00,0x7f,0xff,0x00,0xdb = alghsik %r0, %r0, 32767 0xec,0x0f,0x00,0x00,0x00,0xdb = alghsik %r0, %r15, 0 0xec,0xf0,0x00,0x00,0x00,0xdb = alghsik %r15, %r0, 0 0xec,0x78,0xff,0xf0,0x00,0xdb = alghsik %r7, %r8, -16 0xb9,0xea,0x00,0x00 = algrk %r0, %r0, %r0 0xb9,0xea,0xf0,0x00 = algrk %r0, %r0, %r15 0xb9,0xea,0x00,0x0f = algrk %r0, %r15, %r0 0xb9,0xea,0x00,0xf0 = algrk %r15, %r0, %r0 0xb9,0xea,0x90,0x78 = algrk %r7, %r8, %r9 0xec,0x00,0x80,0x00,0x00,0xda = alhsik %r0, %r0, -32768 0xec,0x00,0xff,0xff,0x00,0xda = alhsik %r0, %r0, -1 0xec,0x00,0x00,0x00,0x00,0xda = alhsik %r0, %r0, 0 0xec,0x00,0x00,0x01,0x00,0xda = alhsik %r0, %r0, 1 0xec,0x00,0x7f,0xff,0x00,0xda = alhsik %r0, %r0, 32767 0xec,0x0f,0x00,0x00,0x00,0xda = alhsik %r0, %r15, 0 0xec,0xf0,0x00,0x00,0x00,0xda = alhsik %r15, %r0, 0 0xec,0x78,0xff,0xf0,0x00,0xda = alhsik %r7, %r8, -16 0xb9,0xfa,0x00,0x00 = alrk %r0, %r0, %r0 0xb9,0xfa,0xf0,0x00 = alrk %r0, %r0, %r15 0xb9,0xfa,0x00,0x0f = alrk %r0, %r15, %r0 0xb9,0xfa,0x00,0xf0 = alrk %r15, %r0, %r0 0xb9,0xfa,0x90,0x78 = alrk %r7, %r8, %r9 0xb9,0xf8,0x00,0x00 = ark %r0, %r0, %r0 0xb9,0xf8,0xf0,0x00 = ark %r0, %r0, %r15 0xb9,0xf8,0x00,0x0f = ark %r0, %r15, %r0 0xb9,0xf8,0x00,0xf0 = ark %r15, %r0, %r0 0xb9,0xf8,0x90,0x78 = ark %r7, %r8, %r9 0xb3,0x91,0x00,0x00 = cdlfbr %f0, 0, %r0, 0 0xb3,0x91,0x0f,0x00 = cdlfbr %f0, 0, %r0, 15 0xb3,0x91,0x00,0x0f = cdlfbr %f0, 0, %r15, 0 0xb3,0x91,0xf0,0x00 = cdlfbr %f0, 15, %r0, 0 0xb3,0x91,0x57,0x46 = cdlfbr %f4, 5, %r6, 7 0xb3,0x91,0x00,0xf0 = cdlfbr %f15, 0, %r0, 0 0xb3,0xa1,0x00,0x00 = cdlgbr %f0, 0, %r0, 0 0xb3,0xa1,0x0f,0x00 = cdlgbr %f0, 0, %r0, 15 0xb3,0xa1,0x00,0x0f = cdlgbr %f0, 0, %r15, 0 0xb3,0xa1,0xf0,0x00 = cdlgbr %f0, 15, %r0, 0 0xb3,0xa1,0x57,0x46 = cdlgbr %f4, 5, %r6, 7 0xb3,0xa1,0x00,0xf0 = cdlgbr %f15, 0, %r0, 0 0xb3,0x90,0x00,0x00 = celfbr %f0, 0, %r0, 0 0xb3,0x90,0x0f,0x00 = celfbr %f0, 0, %r0, 15 0xb3,0x90,0x00,0x0f = celfbr %f0, 0, %r15, 0 0xb3,0x90,0xf0,0x00 = celfbr %f0, 15, %r0, 0 0xb3,0x90,0x57,0x46 = celfbr %f4, 5, %r6, 7 0xb3,0x90,0x00,0xf0 = celfbr %f15, 0, %r0, 0 0xb3,0xa0,0x00,0x00 = celgbr %f0, 0, %r0, 0 0xb3,0xa0,0x0f,0x00 = celgbr %f0, 0, %r0, 15 0xb3,0xa0,0x00,0x0f = celgbr %f0, 0, %r15, 0 0xb3,0xa0,0xf0,0x00 = celgbr %f0, 15, %r0, 0 0xb3,0xa0,0x57,0x46 = celgbr %f4, 5, %r6, 7 0xb3,0xa0,0x00,0xf0 = celgbr %f15, 0, %r0, 0 0xe3,0x00,0x00,0x00,0x80,0xcd = chf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xcd = chf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xcd = chf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xcd = chf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xcd = chf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xcd = chf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xcd = chf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xcd = chf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xcd = chf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xcd = chf %r15, 0 0xcc,0x0d,0x80,0x00,0x00,0x00 = cih %r0, -2147483648 0xcc,0x0d,0xff,0xff,0xff,0xff = cih %r0, -1 0xcc,0x0d,0x00,0x00,0x00,0x00 = cih %r0, 0 0xcc,0x0d,0x00,0x00,0x00,0x01 = cih %r0, 1 0xcc,0x0d,0x7f,0xff,0xff,0xff = cih %r0, 2147483647 0xcc,0xfd,0x00,0x00,0x00,0x00 = cih %r15, 0 0xb3,0x9d,0x00,0x00 = clfdbr %r0, 0, %f0, 0 0xb3,0x9d,0x0f,0x00 = clfdbr %r0, 0, %f0, 15 0xb3,0x9d,0x00,0x0f = clfdbr %r0, 0, %f15, 0 0xb3,0x9d,0xf0,0x00 = clfdbr %r0, 15, %f0, 0 0xb3,0x9d,0x57,0x46 = clfdbr %r4, 5, %f6, 7 0xb3,0x9d,0x00,0xf0 = clfdbr %r15, 0, %f0, 0 0xb3,0x9c,0x00,0x00 = clfebr %r0, 0, %f0, 0 0xb3,0x9c,0x0f,0x00 = clfebr %r0, 0, %f0, 15 0xb3,0x9c,0x00,0x0f = clfebr %r0, 0, %f15, 0 0xb3,0x9c,0xf0,0x00 = clfebr %r0, 15, %f0, 0 0xb3,0x9c,0x57,0x46 = clfebr %r4, 5, %f6, 7 0xb3,0x9c,0x00,0xf0 = clfebr %r15, 0, %f0, 0 0xb3,0x9e,0x00,0x00 = clfxbr %r0, 0, %f0, 0 0xb3,0x9e,0x0f,0x00 = clfxbr %r0, 0, %f0, 15 0xb3,0x9e,0x00,0x0d = clfxbr %r0, 0, %f13, 0 0xb3,0x9e,0xf0,0x00 = clfxbr %r0, 15, %f0, 0 0xb3,0x9e,0x59,0x78 = clfxbr %r7, 5, %f8, 9 0xb3,0x9e,0x00,0xf0 = clfxbr %r15, 0, %f0, 0 0xb3,0xad,0x00,0x00 = clgdbr %r0, 0, %f0, 0 0xb3,0xad,0x0f,0x00 = clgdbr %r0, 0, %f0, 15 0xb3,0xad,0x00,0x0f = clgdbr %r0, 0, %f15, 0 0xb3,0xad,0xf0,0x00 = clgdbr %r0, 15, %f0, 0 0xb3,0xad,0x57,0x46 = clgdbr %r4, 5, %f6, 7 0xb3,0xad,0x00,0xf0 = clgdbr %r15, 0, %f0, 0 0xb3,0xac,0x00,0x00 = clgebr %r0, 0, %f0, 0 0xb3,0xac,0x0f,0x00 = clgebr %r0, 0, %f0, 15 0xb3,0xac,0x00,0x0f = clgebr %r0, 0, %f15, 0 0xb3,0xac,0xf0,0x00 = clgebr %r0, 15, %f0, 0 0xb3,0xac,0x57,0x46 = clgebr %r4, 5, %f6, 7 0xb3,0xac,0x00,0xf0 = clgebr %r15, 0, %f0, 0 0xb3,0xae,0x00,0x00 = clgxbr %r0, 0, %f0, 0 0xb3,0xae,0x0f,0x00 = clgxbr %r0, 0, %f0, 15 0xb3,0xae,0x00,0x0d = clgxbr %r0, 0, %f13, 0 0xb3,0xae,0xf0,0x00 = clgxbr %r0, 15, %f0, 0 0xb3,0xae,0x59,0x78 = clgxbr %r7, 5, %f8, 9 0xb3,0xae,0x00,0xf0 = clgxbr %r15, 0, %f0, 0 0xe3,0x00,0x00,0x00,0x80,0xcf = clhf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xcf = clhf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xcf = clhf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xcf = clhf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xcf = clhf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xcf = clhf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xcf = clhf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xcf = clhf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xcf = clhf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xcf = clhf %r15, 0 0xcc,0x0f,0x00,0x00,0x00,0x00 = clih %r0, 0 0xcc,0x0f,0x00,0x00,0x00,0x01 = clih %r0, 1 0xcc,0x0f,0xff,0xff,0xff,0xff = clih %r0, 4294967295 0xcc,0xff,0x00,0x00,0x00,0x00 = clih %r15, 0 0xb3,0x92,0x00,0x00 = cxlfbr %f0, 0, %r0, 0 0xb3,0x92,0x0f,0x00 = cxlfbr %f0, 0, %r0, 15 0xb3,0x92,0x00,0x0f = cxlfbr %f0, 0, %r15, 0 0xb3,0x92,0xf0,0x00 = cxlfbr %f0, 15, %r0, 0 0xb3,0x92,0x5a,0x49 = cxlfbr %f4, 5, %r9, 10 0xb3,0x92,0x00,0xd0 = cxlfbr %f13, 0, %r0, 0 0xb3,0xa2,0x00,0x00 = cxlgbr %f0, 0, %r0, 0 0xb3,0xa2,0x0f,0x00 = cxlgbr %f0, 0, %r0, 15 0xb3,0xa2,0x00,0x0f = cxlgbr %f0, 0, %r15, 0 0xb3,0xa2,0xf0,0x00 = cxlgbr %f0, 15, %r0, 0 0xb3,0xa2,0x5a,0x49 = cxlgbr %f4, 5, %r9, 10 0xb3,0xa2,0x00,0xd0 = cxlgbr %f13, 0, %r0, 0 0xb3,0x5f,0x00,0x00 = fidbra %f0, 0, %f0, 0 0xb3,0x5f,0x0f,0x00 = fidbra %f0, 0, %f0, 15 0xb3,0x5f,0x00,0x0f = fidbra %f0, 0, %f15, 0 0xb3,0x5f,0xf0,0x00 = fidbra %f0, 15, %f0, 0 0xb3,0x5f,0x57,0x46 = fidbra %f4, 5, %f6, 7 0xb3,0x5f,0x00,0xf0 = fidbra %f15, 0, %f0, 0 0xb3,0x57,0x00,0x00 = fiebra %f0, 0, %f0, 0 0xb3,0x57,0x0f,0x00 = fiebra %f0, 0, %f0, 15 0xb3,0x57,0x00,0x0f = fiebra %f0, 0, %f15, 0 0xb3,0x57,0xf0,0x00 = fiebra %f0, 15, %f0, 0 0xb3,0x57,0x57,0x46 = fiebra %f4, 5, %f6, 7 0xb3,0x57,0x00,0xf0 = fiebra %f15, 0, %f0, 0 0xb3,0x47,0x00,0x00 = fixbra %f0, 0, %f0, 0 0xb3,0x47,0x0f,0x00 = fixbra %f0, 0, %f0, 15 0xb3,0x47,0x00,0x0d = fixbra %f0, 0, %f13, 0 0xb3,0x47,0xf0,0x00 = fixbra %f0, 15, %f0, 0 0xb3,0x47,0x59,0x48 = fixbra %f4, 5, %f8, 9 0xb3,0x47,0x00,0xd0 = fixbra %f13, 0, %f0, 0 0xeb,0x00,0x00,0x00,0x80,0xf8 = laa %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xf8 = laa %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xf8 = laa %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xf8 = laa %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xf8 = laa %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xf8 = laa %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xf8 = laa %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xf8 = laa %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xf8 = laa %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xf8 = laa %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xf8 = laa %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xe8 = laag %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xe8 = laag %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xe8 = laag %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xe8 = laag %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xe8 = laag %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xe8 = laag %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xe8 = laag %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xe8 = laag %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xe8 = laag %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xe8 = laag %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xe8 = laag %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xfa = laal %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xfa = laal %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xfa = laal %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xfa = laal %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xfa = laal %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xfa = laal %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xfa = laal %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xfa = laal %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xfa = laal %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xfa = laal %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xfa = laal %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xea = laalg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xea = laalg %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xea = laalg %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xea = laalg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xea = laalg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xea = laalg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xea = laalg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xea = laalg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xea = laalg %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xea = laalg %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xea = laalg %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xf4 = lan %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xf4 = lan %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xf4 = lan %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xf4 = lan %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xf4 = lan %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xf4 = lan %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xf4 = lan %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xf4 = lan %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xf4 = lan %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xf4 = lan %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xf4 = lan %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xe4 = lang %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xe4 = lang %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xe4 = lang %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xe4 = lang %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xe4 = lang %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xe4 = lang %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xe4 = lang %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xe4 = lang %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xe4 = lang %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xe4 = lang %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xe4 = lang %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xf6 = lao %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xf6 = lao %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xf6 = lao %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xf6 = lao %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xf6 = lao %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xf6 = lao %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xf6 = lao %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xf6 = lao %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xf6 = lao %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xf6 = lao %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xf6 = lao %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xe6 = laog %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xe6 = laog %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xe6 = laog %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xe6 = laog %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xe6 = laog %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xe6 = laog %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xe6 = laog %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xe6 = laog %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xe6 = laog %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xe6 = laog %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xe6 = laog %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xf7 = lax %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xf7 = lax %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xf7 = lax %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xf7 = lax %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xf7 = lax %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xf7 = lax %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xf7 = lax %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xf7 = lax %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xf7 = lax %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xf7 = lax %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xf7 = lax %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0xe7 = laxg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xe7 = laxg %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0xe7 = laxg %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0xe7 = laxg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xe7 = laxg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xe7 = laxg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xe7 = laxg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xe7 = laxg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xe7 = laxg %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0xe7 = laxg %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0xe7 = laxg %r15, %r0, 0 0xe3,0x00,0x00,0x00,0x80,0xc0 = lbh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xc0 = lbh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xc0 = lbh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xc0 = lbh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xc0 = lbh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xc0 = lbh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xc0 = lbh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xc0 = lbh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xc0 = lbh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xc0 = lbh %r15, 0 0xe3,0x00,0x00,0x00,0x80,0xca = lfh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xca = lfh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xca = lfh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xca = lfh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xca = lfh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xca = lfh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xca = lfh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xca = lfh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xca = lfh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xca = lfh %r15, 0 0xe3,0x00,0x00,0x00,0x80,0xc4 = lhh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xc4 = lhh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xc4 = lhh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xc4 = lhh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xc4 = lhh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xc4 = lhh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xc4 = lhh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xc4 = lhh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xc4 = lhh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xc4 = lhh %r15, 0 0xe3,0x00,0x00,0x00,0x80,0xc2 = llch %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xc2 = llch %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xc2 = llch %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xc2 = llch %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xc2 = llch %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xc2 = llch %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xc2 = llch %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xc2 = llch %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xc2 = llch %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xc2 = llch %r15, 0 0xe3,0x00,0x00,0x00,0x80,0xc6 = llhh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xc6 = llhh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xc6 = llhh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xc6 = llhh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xc6 = llhh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xc6 = llhh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xc6 = llhh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xc6 = llhh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xc6 = llhh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xc6 = llhh %r15, 0 0xeb,0x00,0x00,0x00,0x00,0xf2 = loc %r0, 0, 0 0xeb,0x0f,0x00,0x00,0x00,0xf2 = loc %r0, 0, 15 0xeb,0x00,0x00,0x00,0x80,0xf2 = loc %r0, -524288, 0 0xeb,0x00,0x0f,0xff,0x7f,0xf2 = loc %r0, 524287, 0 0xeb,0x00,0x10,0x00,0x00,0xf2 = loc %r0, 0(%r1), 0 0xeb,0x00,0xf0,0x00,0x00,0xf2 = loc %r0, 0(%r15), 0 0xeb,0xf0,0x00,0x00,0x00,0xf2 = loc %r15, 0, 0 0xeb,0x13,0x2f,0xff,0x00,0xf2 = loc %r1, 4095(%r2), 3 0xeb,0x11,0x30,0x02,0x00,0xf2 = loco %r1, 2(%r3) 0xeb,0x12,0x30,0x02,0x00,0xf2 = loch %r1, 2(%r3) 0xeb,0x13,0x30,0x02,0x00,0xf2 = locnle %r1, 2(%r3) 0xeb,0x14,0x30,0x02,0x00,0xf2 = locl %r1, 2(%r3) 0xeb,0x15,0x30,0x02,0x00,0xf2 = locnhe %r1, 2(%r3) 0xeb,0x16,0x30,0x02,0x00,0xf2 = loclh %r1, 2(%r3) 0xeb,0x17,0x30,0x02,0x00,0xf2 = locne %r1, 2(%r3) 0xeb,0x18,0x30,0x02,0x00,0xf2 = loce %r1, 2(%r3) 0xeb,0x19,0x30,0x02,0x00,0xf2 = locnlh %r1, 2(%r3) 0xeb,0x1a,0x30,0x02,0x00,0xf2 = loche %r1, 2(%r3) 0xeb,0x1b,0x30,0x02,0x00,0xf2 = locnl %r1, 2(%r3) 0xeb,0x1c,0x30,0x02,0x00,0xf2 = locle %r1, 2(%r3) 0xeb,0x1d,0x30,0x02,0x00,0xf2 = locnh %r1, 2(%r3) 0xeb,0x1e,0x30,0x02,0x00,0xf2 = locno %r1, 2(%r3) 0xeb,0x00,0x00,0x00,0x00,0xe2 = locg %r0, 0, 0 0xeb,0x0f,0x00,0x00,0x00,0xe2 = locg %r0, 0, 15 0xeb,0x00,0x00,0x00,0x80,0xe2 = locg %r0, -524288, 0 0xeb,0x00,0x0f,0xff,0x7f,0xe2 = locg %r0, 524287, 0 0xeb,0x00,0x10,0x00,0x00,0xe2 = locg %r0, 0(%r1), 0 0xeb,0x00,0xf0,0x00,0x00,0xe2 = locg %r0, 0(%r15), 0 0xeb,0xf0,0x00,0x00,0x00,0xe2 = locg %r15, 0, 0 0xeb,0x13,0x2f,0xff,0x00,0xe2 = locg %r1, 4095(%r2), 3 0xeb,0x11,0x30,0x02,0x00,0xe2 = locgo %r1, 2(%r3) 0xeb,0x12,0x30,0x02,0x00,0xe2 = locgh %r1, 2(%r3) 0xeb,0x13,0x30,0x02,0x00,0xe2 = locgnle %r1, 2(%r3) 0xeb,0x14,0x30,0x02,0x00,0xe2 = locgl %r1, 2(%r3) 0xeb,0x15,0x30,0x02,0x00,0xe2 = locgnhe %r1, 2(%r3) 0xeb,0x16,0x30,0x02,0x00,0xe2 = locglh %r1, 2(%r3) 0xeb,0x17,0x30,0x02,0x00,0xe2 = locgne %r1, 2(%r3) 0xeb,0x18,0x30,0x02,0x00,0xe2 = locge %r1, 2(%r3) 0xeb,0x19,0x30,0x02,0x00,0xe2 = locgnlh %r1, 2(%r3) 0xeb,0x1a,0x30,0x02,0x00,0xe2 = locghe %r1, 2(%r3) 0xeb,0x1b,0x30,0x02,0x00,0xe2 = locgnl %r1, 2(%r3) 0xeb,0x1c,0x30,0x02,0x00,0xe2 = locgle %r1, 2(%r3) 0xeb,0x1d,0x30,0x02,0x00,0xe2 = locgnh %r1, 2(%r3) 0xeb,0x1e,0x30,0x02,0x00,0xe2 = locgno %r1, 2(%r3) 0xb9,0xe2,0x00,0x12 = locgr %r1, %r2, 0 0xb9,0xe2,0xf0,0x12 = locgr %r1, %r2, 15 0xb9,0xe2,0x10,0x13 = locgro %r1, %r3 0xb9,0xe2,0x20,0x13 = locgrh %r1, %r3 0xb9,0xe2,0x30,0x13 = locgrnle %r1, %r3 0xb9,0xe2,0x40,0x13 = locgrl %r1, %r3 0xb9,0xe2,0x50,0x13 = locgrnhe %r1, %r3 0xb9,0xe2,0x60,0x13 = locgrlh %r1, %r3 0xb9,0xe2,0x70,0x13 = locgrne %r1, %r3 0xb9,0xe2,0x80,0x13 = locgre %r1, %r3 0xb9,0xe2,0x90,0x13 = locgrnlh %r1, %r3 0xb9,0xe2,0xa0,0x13 = locgrhe %r1, %r3 0xb9,0xe2,0xb0,0x13 = locgrnl %r1, %r3 0xb9,0xe2,0xc0,0x13 = locgrle %r1, %r3 0xb9,0xe2,0xd0,0x13 = locgrnh %r1, %r3 0xb9,0xe2,0xe0,0x13 = locgrno %r1, %r3 0xb9,0xf2,0x00,0x12 = locr %r1, %r2, 0 0xb9,0xf2,0xf0,0x12 = locr %r1, %r2, 15 0xb9,0xf2,0x10,0x13 = locro %r1, %r3 0xb9,0xf2,0x20,0x13 = locrh %r1, %r3 0xb9,0xf2,0x30,0x13 = locrnle %r1, %r3 0xb9,0xf2,0x40,0x13 = locrl %r1, %r3 0xb9,0xf2,0x50,0x13 = locrnhe %r1, %r3 0xb9,0xf2,0x60,0x13 = locrlh %r1, %r3 0xb9,0xf2,0x70,0x13 = locrne %r1, %r3 0xb9,0xf2,0x80,0x13 = locre %r1, %r3 0xb9,0xf2,0x90,0x13 = locrnlh %r1, %r3 0xb9,0xf2,0xa0,0x13 = locrhe %r1, %r3 0xb9,0xf2,0xb0,0x13 = locrnl %r1, %r3 0xb9,0xf2,0xc0,0x13 = locrle %r1, %r3 0xb9,0xf2,0xd0,0x13 = locrnh %r1, %r3 0xb9,0xf2,0xe0,0x13 = locrno %r1, %r3 0xb9,0xe4,0x00,0x00 = ngrk %r0, %r0, %r0 0xb9,0xe4,0xf0,0x00 = ngrk %r0, %r0, %r15 0xb9,0xe4,0x00,0x0f = ngrk %r0, %r15, %r0 0xb9,0xe4,0x00,0xf0 = ngrk %r15, %r0, %r0 0xb9,0xe4,0x90,0x78 = ngrk %r7, %r8, %r9 0xb9,0xf4,0x00,0x00 = nrk %r0, %r0, %r0 0xb9,0xf4,0xf0,0x00 = nrk %r0, %r0, %r15 0xb9,0xf4,0x00,0x0f = nrk %r0, %r15, %r0 0xb9,0xf4,0x00,0xf0 = nrk %r15, %r0, %r0 0xb9,0xf4,0x90,0x78 = nrk %r7, %r8, %r9 0xb9,0xe6,0x00,0x00 = ogrk %r0, %r0, %r0 0xb9,0xe6,0xf0,0x00 = ogrk %r0, %r0, %r15 0xb9,0xe6,0x00,0x0f = ogrk %r0, %r15, %r0 0xb9,0xe6,0x00,0xf0 = ogrk %r15, %r0, %r0 0xb9,0xe6,0x90,0x78 = ogrk %r7, %r8, %r9 0xb9,0xf6,0x00,0x00 = ork %r0, %r0, %r0 0xb9,0xf6,0xf0,0x00 = ork %r0, %r0, %r15 0xb9,0xf6,0x00,0x0f = ork %r0, %r15, %r0 0xb9,0xf6,0x00,0xf0 = ork %r15, %r0, %r0 0xb9,0xf6,0x90,0x78 = ork %r7, %r8, %r9 0xec,0x00,0x00,0x00,0x00,0x5d = risbhg %r0, %r0, 0, 0, 0 0xec,0x00,0x00,0x00,0x3f,0x5d = risbhg %r0, %r0, 0, 0, 63 0xec,0x00,0x00,0xff,0x00,0x5d = risbhg %r0, %r0, 0, 255, 0 0xec,0x00,0xff,0x00,0x00,0x5d = risbhg %r0, %r0, 255, 0, 0 0xec,0x0f,0x00,0x00,0x00,0x5d = risbhg %r0, %r15, 0, 0, 0 0xec,0xf0,0x00,0x00,0x00,0x5d = risbhg %r15, %r0, 0, 0, 0 0xec,0x45,0x06,0x07,0x08,0x5d = risbhg %r4, %r5, 6, 7, 8 0xec,0x00,0x00,0x00,0x00,0x51 = risblg %r0, %r0, 0, 0, 0 0xec,0x00,0x00,0x00,0x3f,0x51 = risblg %r0, %r0, 0, 0, 63 0xec,0x00,0x00,0xff,0x00,0x51 = risblg %r0, %r0, 0, 255, 0 0xec,0x00,0xff,0x00,0x00,0x51 = risblg %r0, %r0, 255, 0, 0 0xec,0x0f,0x00,0x00,0x00,0x51 = risblg %r0, %r15, 0, 0, 0 0xec,0xf0,0x00,0x00,0x00,0x51 = risblg %r15, %r0, 0, 0, 0 0xec,0x45,0x06,0x07,0x08,0x51 = risblg %r4, %r5, 6, 7, 8 0xb9,0xe9,0x00,0x00 = sgrk %r0, %r0, %r0 0xb9,0xe9,0xf0,0x00 = sgrk %r0, %r0, %r15 0xb9,0xe9,0x00,0x0f = sgrk %r0, %r15, %r0 0xb9,0xe9,0x00,0xf0 = sgrk %r15, %r0, %r0 0xb9,0xe9,0x90,0x78 = sgrk %r7, %r8, %r9 0xb9,0xeb,0x00,0x00 = slgrk %r0, %r0, %r0 0xb9,0xeb,0xf0,0x00 = slgrk %r0, %r0, %r15 0xb9,0xeb,0x00,0x0f = slgrk %r0, %r15, %r0 0xb9,0xeb,0x00,0xf0 = slgrk %r15, %r0, %r0 0xb9,0xeb,0x90,0x78 = slgrk %r7, %r8, %r9 0xb9,0xfb,0x00,0x00 = slrk %r0, %r0, %r0 0xb9,0xfb,0xf0,0x00 = slrk %r0, %r0, %r15 0xb9,0xfb,0x00,0x0f = slrk %r0, %r15, %r0 0xb9,0xfb,0x00,0xf0 = slrk %r15, %r0, %r0 0xb9,0xfb,0x90,0x78 = slrk %r7, %r8, %r9 0xeb,0x00,0x00,0x00,0x00,0xdf = sllk %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0xdf = sllk %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0xdf = sllk %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0xdf = sllk %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0xdf = sllk %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xdf = sllk %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0xdf = sllk %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xdf = sllk %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xdf = sllk %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xdf = sllk %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xdf = sllk %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xdf = sllk %r0, %r0, 524287(%r15) 0xeb,0x00,0x00,0x00,0x00,0xdc = srak %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0xdc = srak %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0xdc = srak %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0xdc = srak %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0xdc = srak %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xdc = srak %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0xdc = srak %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xdc = srak %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xdc = srak %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xdc = srak %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xdc = srak %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xdc = srak %r0, %r0, 524287(%r15) 0xb9,0xf9,0x00,0x00 = srk %r0, %r0, %r0 0xb9,0xf9,0xf0,0x00 = srk %r0, %r0, %r15 0xb9,0xf9,0x00,0x0f = srk %r0, %r15, %r0 0xb9,0xf9,0x00,0xf0 = srk %r15, %r0, %r0 0xb9,0xf9,0x90,0x78 = srk %r7, %r8, %r9 0xeb,0x00,0x00,0x00,0x00,0xde = srlk %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0xde = srlk %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0xde = srlk %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0xde = srlk %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0xde = srlk %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0xde = srlk %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0xde = srlk %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0xde = srlk %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0xde = srlk %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0xde = srlk %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0xde = srlk %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0xde = srlk %r0, %r0, 524287(%r15) 0xe3,0x00,0x00,0x00,0x80,0xc3 = stch %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xc3 = stch %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xc3 = stch %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xc3 = stch %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xc3 = stch %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xc3 = stch %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xc3 = stch %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xc3 = stch %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xc3 = stch %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xc3 = stch %r15, 0 0xe3,0x00,0x00,0x00,0x80,0xc7 = sthh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xc7 = sthh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xc7 = sthh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xc7 = sthh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xc7 = sthh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xc7 = sthh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xc7 = sthh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xc7 = sthh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xc7 = sthh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xc7 = sthh %r15, 0 0xe3,0x00,0x00,0x00,0x80,0xcb = stfh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0xcb = stfh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0xcb = stfh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0xcb = stfh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0xcb = stfh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0xcb = stfh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0xcb = stfh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0xcb = stfh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0xcb = stfh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0xcb = stfh %r15, 0 0xeb,0x00,0x00,0x00,0x00,0xf3 = stoc %r0, 0, 0 0xeb,0x0f,0x00,0x00,0x00,0xf3 = stoc %r0, 0, 15 0xeb,0x00,0x00,0x00,0x80,0xf3 = stoc %r0, -524288, 0 0xeb,0x00,0x0f,0xff,0x7f,0xf3 = stoc %r0, 524287, 0 0xeb,0x00,0x10,0x00,0x00,0xf3 = stoc %r0, 0(%r1), 0 0xeb,0x00,0xf0,0x00,0x00,0xf3 = stoc %r0, 0(%r15), 0 0xeb,0xf0,0x00,0x00,0x00,0xf3 = stoc %r15, 0, 0 0xeb,0x13,0x2f,0xff,0x00,0xf3 = stoc %r1, 4095(%r2), 3 0xeb,0x11,0x30,0x02,0x00,0xf3 = stoco %r1, 2(%r3) 0xeb,0x12,0x30,0x02,0x00,0xf3 = stoch %r1, 2(%r3) 0xeb,0x13,0x30,0x02,0x00,0xf3 = stocnle %r1, 2(%r3) 0xeb,0x14,0x30,0x02,0x00,0xf3 = stocl %r1, 2(%r3) 0xeb,0x15,0x30,0x02,0x00,0xf3 = stocnhe %r1, 2(%r3) 0xeb,0x16,0x30,0x02,0x00,0xf3 = stoclh %r1, 2(%r3) 0xeb,0x17,0x30,0x02,0x00,0xf3 = stocne %r1, 2(%r3) 0xeb,0x18,0x30,0x02,0x00,0xf3 = stoce %r1, 2(%r3) 0xeb,0x19,0x30,0x02,0x00,0xf3 = stocnlh %r1, 2(%r3) 0xeb,0x1a,0x30,0x02,0x00,0xf3 = stoche %r1, 2(%r3) 0xeb,0x1b,0x30,0x02,0x00,0xf3 = stocnl %r1, 2(%r3) 0xeb,0x1c,0x30,0x02,0x00,0xf3 = stocle %r1, 2(%r3) 0xeb,0x1d,0x30,0x02,0x00,0xf3 = stocnh %r1, 2(%r3) 0xeb,0x1e,0x30,0x02,0x00,0xf3 = stocno %r1, 2(%r3) 0xeb,0x00,0x00,0x00,0x00,0xe3 = stocg %r0, 0, 0 0xeb,0x0f,0x00,0x00,0x00,0xe3 = stocg %r0, 0, 15 0xeb,0x00,0x00,0x00,0x80,0xe3 = stocg %r0, -524288, 0 0xeb,0x00,0x0f,0xff,0x7f,0xe3 = stocg %r0, 524287, 0 0xeb,0x00,0x10,0x00,0x00,0xe3 = stocg %r0, 0(%r1), 0 0xeb,0x00,0xf0,0x00,0x00,0xe3 = stocg %r0, 0(%r15), 0 0xeb,0xf0,0x00,0x00,0x00,0xe3 = stocg %r15, 0, 0 0xeb,0x13,0x2f,0xff,0x00,0xe3 = stocg %r1, 4095(%r2), 3 0xeb,0x11,0x30,0x02,0x00,0xe3 = stocgo %r1, 2(%r3) 0xeb,0x12,0x30,0x02,0x00,0xe3 = stocgh %r1, 2(%r3) 0xeb,0x13,0x30,0x02,0x00,0xe3 = stocgnle %r1, 2(%r3) 0xeb,0x14,0x30,0x02,0x00,0xe3 = stocgl %r1, 2(%r3) 0xeb,0x15,0x30,0x02,0x00,0xe3 = stocgnhe %r1, 2(%r3) 0xeb,0x16,0x30,0x02,0x00,0xe3 = stocglh %r1, 2(%r3) 0xeb,0x17,0x30,0x02,0x00,0xe3 = stocgne %r1, 2(%r3) 0xeb,0x18,0x30,0x02,0x00,0xe3 = stocge %r1, 2(%r3) 0xeb,0x19,0x30,0x02,0x00,0xe3 = stocgnlh %r1, 2(%r3) 0xeb,0x1a,0x30,0x02,0x00,0xe3 = stocghe %r1, 2(%r3) 0xeb,0x1b,0x30,0x02,0x00,0xe3 = stocgnl %r1, 2(%r3) 0xeb,0x1c,0x30,0x02,0x00,0xe3 = stocgle %r1, 2(%r3) 0xeb,0x1d,0x30,0x02,0x00,0xe3 = stocgnh %r1, 2(%r3) 0xeb,0x1e,0x30,0x02,0x00,0xe3 = stocgno %r1, 2(%r3) 0xb9,0xe7,0x00,0x00 = xgrk %r0, %r0, %r0 0xb9,0xe7,0xf0,0x00 = xgrk %r0, %r0, %r15 0xb9,0xe7,0x00,0x0f = xgrk %r0, %r15, %r0 0xb9,0xe7,0x00,0xf0 = xgrk %r15, %r0, %r0 0xb9,0xe7,0x90,0x78 = xgrk %r7, %r8, %r9 0xb9,0xf7,0x00,0x00 = xrk %r0, %r0, %r0 0xb9,0xf7,0xf0,0x00 = xrk %r0, %r0, %r15 0xb9,0xf7,0x00,0x0f = xrk %r0, %r15, %r0 0xb9,0xf7,0x00,0xf0 = xrk %r15, %r0, %r0 0xb9,0xf7,0x90,0x78 = xrk %r7, %r8, %r9 capstone-sys-0.11.0/capstone/suite/MC/SystemZ/insn-good.s.cs010066400017500001750000002776671363402546700220560ustar0000000000000000# CS_ARCH_SYSZ, 0, None 0x5a,0x00,0x00,0x00 = a %r0, 0 0x5a,0x00,0x0f,0xff = a %r0, 4095 0x5a,0x00,0x10,0x00 = a %r0, 0(%r1) 0x5a,0x00,0xf0,0x00 = a %r0, 0(%r15) 0x5a,0x01,0xff,0xff = a %r0, 4095(%r1,%r15) 0x5a,0x0f,0x1f,0xff = a %r0, 4095(%r15,%r1) 0x5a,0xf0,0x00,0x00 = a %r15, 0 0xed,0x00,0x00,0x00,0x00,0x1a = adb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x1a = adb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x1a = adb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x1a = adb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x1a = adb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x1a = adb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x1a = adb %f15, 0 0xb3,0x1a,0x00,0x00 = adbr %f0, %f0 0xb3,0x1a,0x00,0x0f = adbr %f0, %f15 0xb3,0x1a,0x00,0x78 = adbr %f7, %f8 0xb3,0x1a,0x00,0xf0 = adbr %f15, %f0 0xed,0x00,0x00,0x00,0x00,0x0a = aeb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x0a = aeb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x0a = aeb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x0a = aeb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x0a = aeb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x0a = aeb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x0a = aeb %f15, 0 0xb3,0x0a,0x00,0x00 = aebr %f0, %f0 0xb3,0x0a,0x00,0x0f = aebr %f0, %f15 0xb3,0x0a,0x00,0x78 = aebr %f7, %f8 0xb3,0x0a,0x00,0xf0 = aebr %f15, %f0 0xc2,0x09,0x80,0x00,0x00,0x00 = afi %r0, -2147483648 0xc2,0x09,0xff,0xff,0xff,0xff = afi %r0, -1 0xc2,0x09,0x00,0x00,0x00,0x00 = afi %r0, 0 0xc2,0x09,0x00,0x00,0x00,0x01 = afi %r0, 1 0xc2,0x09,0x7f,0xff,0xff,0xff = afi %r0, 2147483647 0xc2,0xf9,0x00,0x00,0x00,0x00 = afi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x08 = ag %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x08 = ag %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x08 = ag %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x08 = ag %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x08 = ag %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x08 = ag %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x08 = ag %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x08 = ag %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x08 = ag %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x08 = ag %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x18 = agf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x18 = agf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x18 = agf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x18 = agf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x18 = agf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x18 = agf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x18 = agf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x18 = agf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x18 = agf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x18 = agf %r15, 0 0xc2,0x08,0x80,0x00,0x00,0x00 = agfi %r0, -2147483648 0xc2,0x08,0xff,0xff,0xff,0xff = agfi %r0, -1 0xc2,0x08,0x00,0x00,0x00,0x00 = agfi %r0, 0 0xc2,0x08,0x00,0x00,0x00,0x01 = agfi %r0, 1 0xc2,0x08,0x7f,0xff,0xff,0xff = agfi %r0, 2147483647 0xc2,0xf8,0x00,0x00,0x00,0x00 = agfi %r15, 0 0xb9,0x18,0x00,0x00 = agfr %r0, %r0 0xb9,0x18,0x00,0x0f = agfr %r0, %r15 0xb9,0x18,0x00,0xf0 = agfr %r15, %r0 0xb9,0x18,0x00,0x78 = agfr %r7, %r8 0xa7,0x0b,0x80,0x00 = aghi %r0, -32768 0xa7,0x0b,0xff,0xff = aghi %r0, -1 0xa7,0x0b,0x00,0x00 = aghi %r0, 0 0xa7,0x0b,0x00,0x01 = aghi %r0, 1 0xa7,0x0b,0x7f,0xff = aghi %r0, 32767 0xa7,0xfb,0x00,0x00 = aghi %r15, 0 0xb9,0x08,0x00,0x00 = agr %r0, %r0 0xb9,0x08,0x00,0x0f = agr %r0, %r15 0xb9,0x08,0x00,0xf0 = agr %r15, %r0 0xb9,0x08,0x00,0x78 = agr %r7, %r8 0xeb,0x00,0x00,0x00,0x80,0x7a = agsi -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x7a = agsi -1, 0 0xeb,0x00,0x00,0x00,0x00,0x7a = agsi 0, 0 0xeb,0x00,0x00,0x01,0x00,0x7a = agsi 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x7a = agsi 524287, 0 0xeb,0x80,0x00,0x00,0x00,0x7a = agsi 0, -128 0xeb,0xff,0x00,0x00,0x00,0x7a = agsi 0, -1 0xeb,0x01,0x00,0x00,0x00,0x7a = agsi 0, 1 0xeb,0x7f,0x00,0x00,0x00,0x7a = agsi 0, 127 0xeb,0x2a,0x10,0x00,0x00,0x7a = agsi 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x7a = agsi 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x7a = agsi 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x7a = agsi 524287(%r15), 42 0x4a,0x00,0x00,0x00 = ah %r0, 0 0x4a,0x00,0x0f,0xff = ah %r0, 4095 0x4a,0x00,0x10,0x00 = ah %r0, 0(%r1) 0x4a,0x00,0xf0,0x00 = ah %r0, 0(%r15) 0x4a,0x01,0xff,0xff = ah %r0, 4095(%r1,%r15) 0x4a,0x0f,0x1f,0xff = ah %r0, 4095(%r15,%r1) 0x4a,0xf0,0x00,0x00 = ah %r15, 0 0xa7,0x0a,0x80,0x00 = ahi %r0, -32768 0xa7,0x0a,0xff,0xff = ahi %r0, -1 0xa7,0x0a,0x00,0x00 = ahi %r0, 0 0xa7,0x0a,0x00,0x01 = ahi %r0, 1 0xa7,0x0a,0x7f,0xff = ahi %r0, 32767 0xa7,0xfa,0x00,0x00 = ahi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x7a = ahy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x7a = ahy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x7a = ahy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x7a = ahy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x7a = ahy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x7a = ahy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x7a = ahy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x7a = ahy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x7a = ahy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x7a = ahy %r15, 0 0x5e,0x00,0x00,0x00 = al %r0, 0 0x5e,0x00,0x0f,0xff = al %r0, 4095 0x5e,0x00,0x10,0x00 = al %r0, 0(%r1) 0x5e,0x00,0xf0,0x00 = al %r0, 0(%r15) 0x5e,0x01,0xff,0xff = al %r0, 4095(%r1,%r15) 0x5e,0x0f,0x1f,0xff = al %r0, 4095(%r15,%r1) 0x5e,0xf0,0x00,0x00 = al %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x98 = alc %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x98 = alc %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x98 = alc %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x98 = alc %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x98 = alc %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x98 = alc %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x98 = alc %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x98 = alc %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x98 = alc %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x98 = alc %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x88 = alcg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x88 = alcg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x88 = alcg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x88 = alcg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x88 = alcg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x88 = alcg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x88 = alcg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x88 = alcg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x88 = alcg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x88 = alcg %r15, 0 0xb9,0x88,0x00,0x00 = alcgr %r0, %r0 0xb9,0x88,0x00,0x0f = alcgr %r0, %r15 0xb9,0x88,0x00,0xf0 = alcgr %r15, %r0 0xb9,0x88,0x00,0x78 = alcgr %r7, %r8 0xb9,0x98,0x00,0x00 = alcr %r0, %r0 0xb9,0x98,0x00,0x0f = alcr %r0, %r15 0xb9,0x98,0x00,0xf0 = alcr %r15, %r0 0xb9,0x98,0x00,0x78 = alcr %r7, %r8 0xc2,0x0b,0x00,0x00,0x00,0x00 = alfi %r0, 0 0xc2,0x0b,0xff,0xff,0xff,0xff = alfi %r0, 4294967295 0xc2,0xfb,0x00,0x00,0x00,0x00 = alfi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x0a = alg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x0a = alg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x0a = alg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x0a = alg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x0a = alg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x0a = alg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x0a = alg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x0a = alg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x0a = alg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x0a = alg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x1a = algf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x1a = algf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x1a = algf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x1a = algf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x1a = algf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x1a = algf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x1a = algf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x1a = algf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x1a = algf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x1a = algf %r15, 0 0xc2,0x0a,0x00,0x00,0x00,0x00 = algfi %r0, 0 0xc2,0x0a,0xff,0xff,0xff,0xff = algfi %r0, 4294967295 0xc2,0xfa,0x00,0x00,0x00,0x00 = algfi %r15, 0 0xb9,0x1a,0x00,0x00 = algfr %r0, %r0 0xb9,0x1a,0x00,0x0f = algfr %r0, %r15 0xb9,0x1a,0x00,0xf0 = algfr %r15, %r0 0xb9,0x1a,0x00,0x78 = algfr %r7, %r8 0xb9,0x0a,0x00,0x00 = algr %r0, %r0 0xb9,0x0a,0x00,0x0f = algr %r0, %r15 0xb9,0x0a,0x00,0xf0 = algr %r15, %r0 0xb9,0x0a,0x00,0x78 = algr %r7, %r8 0x1e,0x00 = alr %r0, %r0 0x1e,0x0f = alr %r0, %r15 0x1e,0xf0 = alr %r15, %r0 0x1e,0x78 = alr %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x5e = aly %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x5e = aly %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x5e = aly %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x5e = aly %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x5e = aly %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x5e = aly %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x5e = aly %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x5e = aly %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x5e = aly %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x5e = aly %r15, 0 0x1a,0x00 = ar %r0, %r0 0x1a,0x0f = ar %r0, %r15 0x1a,0xf0 = ar %r15, %r0 0x1a,0x78 = ar %r7, %r8 0xeb,0x00,0x00,0x00,0x80,0x6a = asi -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x6a = asi -1, 0 0xeb,0x00,0x00,0x00,0x00,0x6a = asi 0, 0 0xeb,0x00,0x00,0x01,0x00,0x6a = asi 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x6a = asi 524287, 0 0xeb,0x80,0x00,0x00,0x00,0x6a = asi 0, -128 0xeb,0xff,0x00,0x00,0x00,0x6a = asi 0, -1 0xeb,0x01,0x00,0x00,0x00,0x6a = asi 0, 1 0xeb,0x7f,0x00,0x00,0x00,0x6a = asi 0, 127 0xeb,0x2a,0x10,0x00,0x00,0x6a = asi 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x6a = asi 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x6a = asi 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x6a = asi 524287(%r15), 42 0xb3,0x4a,0x00,0x00 = axbr %f0, %f0 0xb3,0x4a,0x00,0x0d = axbr %f0, %f13 0xb3,0x4a,0x00,0x88 = axbr %f8, %f8 0xb3,0x4a,0x00,0xd0 = axbr %f13, %f0 0xe3,0x00,0x00,0x00,0x80,0x5a = ay %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x5a = ay %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x5a = ay %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x5a = ay %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x5a = ay %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x5a = ay %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x5a = ay %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x5a = ay %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x5a = ay %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x5a = ay %r15, 0 0x0d,0x01 = basr %r0, %r1 0x0d,0x0f = basr %r0, %r15 0x0d,0xe9 = basr %r14, %r9 0x0d,0xf1 = basr %r15, %r1 0x07,0x00 = bcr 0, %r0 0x07,0x0f = bcr 0, %r15 0x07,0x17 = bcr 1, %r7 0x07,0x1f = bor %r15 0x07,0x27 = bcr 2, %r7 0x07,0x2f = bhr %r15 0x07,0x37 = bcr 3, %r7 0x07,0x3f = bnler %r15 0x07,0x47 = bcr 4, %r7 0x07,0x4f = blr %r15 0x07,0x57 = bcr 5, %r7 0x07,0x5f = bnher %r15 0x07,0x67 = bcr 6, %r7 0x07,0x6f = blhr %r15 0x07,0x77 = bcr 7, %r7 0x07,0x7f = bner %r15 0x07,0x87 = bcr 8, %r7 0x07,0x8f = ber %r15 0x07,0x97 = bcr 9, %r7 0x07,0x9f = bnlhr %r15 0x07,0xa7 = bcr 10, %r7 0x07,0xaf = bher %r15 0x07,0xb7 = bcr 11, %r7 0x07,0xbf = bnlr %r15 0x07,0xc7 = bcr 12, %r7 0x07,0xcf = bler %r15 0x07,0xd7 = bcr 13, %r7 0x07,0xdf = bnhr %r15 0x07,0xe7 = bcr 14, %r7 0x07,0xef = bnor %r15 0x07,0xf7 = bcr 15, %r7 0x07,0xf1 = br %r1 0x07,0xfe = br %r14 0x07,0xff = br %r15 0x59,0x00,0x00,0x00 = c %r0, 0 0x59,0x00,0x0f,0xff = c %r0, 4095 0x59,0x00,0x10,0x00 = c %r0, 0(%r1) 0x59,0x00,0xf0,0x00 = c %r0, 0(%r15) 0x59,0x01,0xff,0xff = c %r0, 4095(%r1,%r15) 0x59,0x0f,0x1f,0xff = c %r0, 4095(%r15,%r1) 0x59,0xf0,0x00,0x00 = c %r15, 0 0xed,0x00,0x00,0x00,0x00,0x19 = cdb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x19 = cdb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x19 = cdb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x19 = cdb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x19 = cdb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x19 = cdb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x19 = cdb %f15, 0 0xb3,0x19,0x00,0x00 = cdbr %f0, %f0 0xb3,0x19,0x00,0x0f = cdbr %f0, %f15 0xb3,0x19,0x00,0x78 = cdbr %f7, %f8 0xb3,0x19,0x00,0xf0 = cdbr %f15, %f0 0xb3,0x95,0x00,0x00 = cdfbr %f0, %r0 0xb3,0x95,0x00,0x0f = cdfbr %f0, %r15 0xb3,0x95,0x00,0xf0 = cdfbr %f15, %r0 0xb3,0x95,0x00,0x78 = cdfbr %f7, %r8 0xb3,0x95,0x00,0xff = cdfbr %f15, %r15 0xb3,0xa5,0x00,0x00 = cdgbr %f0, %r0 0xb3,0xa5,0x00,0x0f = cdgbr %f0, %r15 0xb3,0xa5,0x00,0xf0 = cdgbr %f15, %r0 0xb3,0xa5,0x00,0x78 = cdgbr %f7, %r8 0xb3,0xa5,0x00,0xff = cdgbr %f15, %r15 0xed,0x00,0x00,0x00,0x00,0x09 = ceb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x09 = ceb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x09 = ceb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x09 = ceb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x09 = ceb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x09 = ceb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x09 = ceb %f15, 0 0xb3,0x09,0x00,0x00 = cebr %f0, %f0 0xb3,0x09,0x00,0x0f = cebr %f0, %f15 0xb3,0x09,0x00,0x78 = cebr %f7, %f8 0xb3,0x09,0x00,0xf0 = cebr %f15, %f0 0xb3,0x94,0x00,0x00 = cefbr %f0, %r0 0xb3,0x94,0x00,0x0f = cefbr %f0, %r15 0xb3,0x94,0x00,0xf0 = cefbr %f15, %r0 0xb3,0x94,0x00,0x78 = cefbr %f7, %r8 0xb3,0x94,0x00,0xff = cefbr %f15, %r15 0xb3,0xa4,0x00,0x00 = cegbr %f0, %r0 0xb3,0xa4,0x00,0x0f = cegbr %f0, %r15 0xb3,0xa4,0x00,0xf0 = cegbr %f15, %r0 0xb3,0xa4,0x00,0x78 = cegbr %f7, %r8 0xb3,0xa4,0x00,0xff = cegbr %f15, %r15 0xb3,0x99,0x00,0x00 = cfdbr %r0, 0, %f0 0xb3,0x99,0x00,0x0f = cfdbr %r0, 0, %f15 0xb3,0x99,0xf0,0x00 = cfdbr %r0, 15, %f0 0xb3,0x99,0x50,0x46 = cfdbr %r4, 5, %f6 0xb3,0x99,0x00,0xf0 = cfdbr %r15, 0, %f0 0xb3,0x98,0x00,0x00 = cfebr %r0, 0, %f0 0xb3,0x98,0x00,0x0f = cfebr %r0, 0, %f15 0xb3,0x98,0xf0,0x00 = cfebr %r0, 15, %f0 0xb3,0x98,0x50,0x46 = cfebr %r4, 5, %f6 0xb3,0x98,0x00,0xf0 = cfebr %r15, 0, %f0 0xc2,0x0d,0x80,0x00,0x00,0x00 = cfi %r0, -2147483648 0xc2,0x0d,0xff,0xff,0xff,0xff = cfi %r0, -1 0xc2,0x0d,0x00,0x00,0x00,0x00 = cfi %r0, 0 0xc2,0x0d,0x00,0x00,0x00,0x01 = cfi %r0, 1 0xc2,0x0d,0x7f,0xff,0xff,0xff = cfi %r0, 2147483647 0xc2,0xfd,0x00,0x00,0x00,0x00 = cfi %r15, 0 0xb3,0x9a,0x00,0x00 = cfxbr %r0, 0, %f0 0xb3,0x9a,0x00,0x0d = cfxbr %r0, 0, %f13 0xb3,0x9a,0xf0,0x00 = cfxbr %r0, 15, %f0 0xb3,0x9a,0x50,0x48 = cfxbr %r4, 5, %f8 0xb3,0x9a,0x00,0xf0 = cfxbr %r15, 0, %f0 0xe3,0x00,0x00,0x00,0x80,0x20 = cg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x20 = cg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x20 = cg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x20 = cg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x20 = cg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x20 = cg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x20 = cg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x20 = cg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x20 = cg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x20 = cg %r15, 0 0xb3,0xa9,0x00,0x00 = cgdbr %r0, 0, %f0 0xb3,0xa9,0x00,0x0f = cgdbr %r0, 0, %f15 0xb3,0xa9,0xf0,0x00 = cgdbr %r0, 15, %f0 0xb3,0xa9,0x50,0x46 = cgdbr %r4, 5, %f6 0xb3,0xa9,0x00,0xf0 = cgdbr %r15, 0, %f0 0xb3,0xa8,0x00,0x00 = cgebr %r0, 0, %f0 0xb3,0xa8,0x00,0x0f = cgebr %r0, 0, %f15 0xb3,0xa8,0xf0,0x00 = cgebr %r0, 15, %f0 0xb3,0xa8,0x50,0x46 = cgebr %r4, 5, %f6 0xb3,0xa8,0x00,0xf0 = cgebr %r15, 0, %f0 0xe3,0x00,0x00,0x00,0x80,0x30 = cgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x30 = cgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x30 = cgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x30 = cgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x30 = cgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x30 = cgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x30 = cgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x30 = cgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x30 = cgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x30 = cgf %r15, 0 0xc2,0x0c,0x80,0x00,0x00,0x00 = cgfi %r0, -2147483648 0xc2,0x0c,0xff,0xff,0xff,0xff = cgfi %r0, -1 0xc2,0x0c,0x00,0x00,0x00,0x00 = cgfi %r0, 0 0xc2,0x0c,0x00,0x00,0x00,0x01 = cgfi %r0, 1 0xc2,0x0c,0x7f,0xff,0xff,0xff = cgfi %r0, 2147483647 0xc2,0xfc,0x00,0x00,0x00,0x00 = cgfi %r15, 0 0xb9,0x30,0x00,0x00 = cgfr %r0, %r0 0xb9,0x30,0x00,0x0f = cgfr %r0, %r15 0xb9,0x30,0x00,0xf0 = cgfr %r15, %r0 0xb9,0x30,0x00,0x78 = cgfr %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x34 = cgh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x34 = cgh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x34 = cgh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x34 = cgh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x34 = cgh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x34 = cgh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x34 = cgh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x34 = cgh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x34 = cgh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x34 = cgh %r15, 0 0xa7,0x0f,0x80,0x00 = cghi %r0, -32768 0xa7,0x0f,0xff,0xff = cghi %r0, -1 0xa7,0x0f,0x00,0x00 = cghi %r0, 0 0xa7,0x0f,0x00,0x01 = cghi %r0, 1 0xa7,0x0f,0x7f,0xff = cghi %r0, 32767 0xa7,0xff,0x00,0x00 = cghi %r15, 0 0xe5,0x58,0x00,0x00,0x00,0x00 = cghsi 0, 0 0xe5,0x58,0x0f,0xff,0x00,0x00 = cghsi 4095, 0 0xe5,0x58,0x00,0x00,0x80,0x00 = cghsi 0, -32768 0xe5,0x58,0x00,0x00,0xff,0xff = cghsi 0, -1 0xe5,0x58,0x00,0x00,0x00,0x00 = cghsi 0, 0 0xe5,0x58,0x00,0x00,0x00,0x01 = cghsi 0, 1 0xe5,0x58,0x00,0x00,0x7f,0xff = cghsi 0, 32767 0xe5,0x58,0x10,0x00,0x00,0x2a = cghsi 0(%r1), 42 0xe5,0x58,0xf0,0x00,0x00,0x2a = cghsi 0(%r15), 42 0xe5,0x58,0x1f,0xff,0x00,0x2a = cghsi 4095(%r1), 42 0xe5,0x58,0xff,0xff,0x00,0x2a = cghsi 4095(%r15), 42 0xb9,0x20,0x00,0x00 = cgr %r0, %r0 0xb9,0x20,0x00,0x0f = cgr %r0, %r15 0xb9,0x20,0x00,0xf0 = cgr %r15, %r0 0xb9,0x20,0x00,0x78 = cgr %r7, %r8 0xb3,0xaa,0x00,0x00 = cgxbr %r0, 0, %f0 0xb3,0xaa,0x00,0x0d = cgxbr %r0, 0, %f13 0xb3,0xaa,0xf0,0x00 = cgxbr %r0, 15, %f0 0xb3,0xaa,0x50,0x48 = cgxbr %r4, 5, %f8 0xb3,0xaa,0x00,0xf0 = cgxbr %r15, 0, %f0 0x49,0x00,0x00,0x00 = ch %r0, 0 0x49,0x00,0x0f,0xff = ch %r0, 4095 0x49,0x00,0x10,0x00 = ch %r0, 0(%r1) 0x49,0x00,0xf0,0x00 = ch %r0, 0(%r15) 0x49,0x01,0xff,0xff = ch %r0, 4095(%r1,%r15) 0x49,0x0f,0x1f,0xff = ch %r0, 4095(%r15,%r1) 0x49,0xf0,0x00,0x00 = ch %r15, 0 0xe5,0x54,0x00,0x00,0x00,0x00 = chhsi 0, 0 0xe5,0x54,0x0f,0xff,0x00,0x00 = chhsi 4095, 0 0xe5,0x54,0x00,0x00,0x80,0x00 = chhsi 0, -32768 0xe5,0x54,0x00,0x00,0xff,0xff = chhsi 0, -1 0xe5,0x54,0x00,0x00,0x00,0x00 = chhsi 0, 0 0xe5,0x54,0x00,0x00,0x00,0x01 = chhsi 0, 1 0xe5,0x54,0x00,0x00,0x7f,0xff = chhsi 0, 32767 0xe5,0x54,0x10,0x00,0x00,0x2a = chhsi 0(%r1), 42 0xe5,0x54,0xf0,0x00,0x00,0x2a = chhsi 0(%r15), 42 0xe5,0x54,0x1f,0xff,0x00,0x2a = chhsi 4095(%r1), 42 0xe5,0x54,0xff,0xff,0x00,0x2a = chhsi 4095(%r15), 42 0xa7,0x0e,0x80,0x00 = chi %r0, -32768 0xa7,0x0e,0xff,0xff = chi %r0, -1 0xa7,0x0e,0x00,0x00 = chi %r0, 0 0xa7,0x0e,0x00,0x01 = chi %r0, 1 0xa7,0x0e,0x7f,0xff = chi %r0, 32767 0xa7,0xfe,0x00,0x00 = chi %r15, 0 0xe5,0x5c,0x00,0x00,0x00,0x00 = chsi 0, 0 0xe5,0x5c,0x0f,0xff,0x00,0x00 = chsi 4095, 0 0xe5,0x5c,0x00,0x00,0x80,0x00 = chsi 0, -32768 0xe5,0x5c,0x00,0x00,0xff,0xff = chsi 0, -1 0xe5,0x5c,0x00,0x00,0x00,0x00 = chsi 0, 0 0xe5,0x5c,0x00,0x00,0x00,0x01 = chsi 0, 1 0xe5,0x5c,0x00,0x00,0x7f,0xff = chsi 0, 32767 0xe5,0x5c,0x10,0x00,0x00,0x2a = chsi 0(%r1), 42 0xe5,0x5c,0xf0,0x00,0x00,0x2a = chsi 0(%r15), 42 0xe5,0x5c,0x1f,0xff,0x00,0x2a = chsi 4095(%r1), 42 0xe5,0x5c,0xff,0xff,0x00,0x2a = chsi 4095(%r15), 42 0xe3,0x00,0x00,0x00,0x80,0x79 = chy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x79 = chy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x79 = chy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x79 = chy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x79 = chy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x79 = chy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x79 = chy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x79 = chy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x79 = chy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x79 = chy %r15, 0 0x55,0x00,0x00,0x00 = cl %r0, 0 0x55,0x00,0x0f,0xff = cl %r0, 4095 0x55,0x00,0x10,0x00 = cl %r0, 0(%r1) 0x55,0x00,0xf0,0x00 = cl %r0, 0(%r15) 0x55,0x01,0xff,0xff = cl %r0, 4095(%r1,%r15) 0x55,0x0f,0x1f,0xff = cl %r0, 4095(%r15,%r1) 0x55,0xf0,0x00,0x00 = cl %r15, 0 0xd5,0x00,0x00,0x00,0x00,0x00 = clc 0(1), 0 0xd5,0x00,0x00,0x00,0x10,0x00 = clc 0(1), 0(%r1) 0xd5,0x00,0x00,0x00,0xf0,0x00 = clc 0(1), 0(%r15) 0xd5,0x00,0x00,0x00,0x0f,0xff = clc 0(1), 4095 0xd5,0x00,0x00,0x00,0x1f,0xff = clc 0(1), 4095(%r1) 0xd5,0x00,0x00,0x00,0xff,0xff = clc 0(1), 4095(%r15) 0xd5,0x00,0x10,0x00,0x00,0x00 = clc 0(1,%r1), 0 0xd5,0x00,0xf0,0x00,0x00,0x00 = clc 0(1,%r15), 0 0xd5,0x00,0x1f,0xff,0x00,0x00 = clc 4095(1,%r1), 0 0xd5,0x00,0xff,0xff,0x00,0x00 = clc 4095(1,%r15), 0 0xd5,0xff,0x10,0x00,0x00,0x00 = clc 0(256,%r1), 0 0xd5,0xff,0xf0,0x00,0x00,0x00 = clc 0(256,%r15), 0 0xe5,0x5d,0x00,0x00,0x00,0x00 = clfhsi 0, 0 0xe5,0x5d,0x0f,0xff,0x00,0x00 = clfhsi 4095, 0 0xe5,0x5d,0x00,0x00,0xff,0xff = clfhsi 0, 65535 0xe5,0x5d,0x10,0x00,0x00,0x2a = clfhsi 0(%r1), 42 0xe5,0x5d,0xf0,0x00,0x00,0x2a = clfhsi 0(%r15), 42 0xe5,0x5d,0x1f,0xff,0x00,0x2a = clfhsi 4095(%r1), 42 0xe5,0x5d,0xff,0xff,0x00,0x2a = clfhsi 4095(%r15), 42 0xc2,0x0f,0x00,0x00,0x00,0x00 = clfi %r0, 0 0xc2,0x0f,0xff,0xff,0xff,0xff = clfi %r0, 4294967295 0xc2,0xff,0x00,0x00,0x00,0x00 = clfi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x21 = clg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x21 = clg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x21 = clg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x21 = clg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x21 = clg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x21 = clg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x21 = clg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x21 = clg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x21 = clg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x21 = clg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x31 = clgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x31 = clgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x31 = clgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x31 = clgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x31 = clgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x31 = clgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x31 = clgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x31 = clgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x31 = clgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x31 = clgf %r15, 0 0xc2,0x0e,0x00,0x00,0x00,0x00 = clgfi %r0, 0 0xc2,0x0e,0xff,0xff,0xff,0xff = clgfi %r0, 4294967295 0xc2,0xfe,0x00,0x00,0x00,0x00 = clgfi %r15, 0 0xb9,0x31,0x00,0x00 = clgfr %r0, %r0 0xb9,0x31,0x00,0x0f = clgfr %r0, %r15 0xb9,0x31,0x00,0xf0 = clgfr %r15, %r0 0xb9,0x31,0x00,0x78 = clgfr %r7, %r8 0xb9,0x21,0x00,0x00 = clgr %r0, %r0 0xb9,0x21,0x00,0x0f = clgr %r0, %r15 0xb9,0x21,0x00,0xf0 = clgr %r15, %r0 0xb9,0x21,0x00,0x78 = clgr %r7, %r8 0xe5,0x55,0x00,0x00,0x00,0x00 = clhhsi 0, 0 0xe5,0x55,0x0f,0xff,0x00,0x00 = clhhsi 4095, 0 0xe5,0x55,0x00,0x00,0xff,0xff = clhhsi 0, 65535 0xe5,0x55,0x10,0x00,0x00,0x2a = clhhsi 0(%r1), 42 0xe5,0x55,0xf0,0x00,0x00,0x2a = clhhsi 0(%r15), 42 0xe5,0x55,0x1f,0xff,0x00,0x2a = clhhsi 4095(%r1), 42 0xe5,0x55,0xff,0xff,0x00,0x2a = clhhsi 4095(%r15), 42 0x95,0x00,0x00,0x00 = cli 0, 0 0x95,0x00,0x0f,0xff = cli 4095, 0 0x95,0xff,0x00,0x00 = cli 0, 255 0x95,0x2a,0x10,0x00 = cli 0(%r1), 42 0x95,0x2a,0xf0,0x00 = cli 0(%r15), 42 0x95,0x2a,0x1f,0xff = cli 4095(%r1), 42 0x95,0x2a,0xff,0xff = cli 4095(%r15), 42 0xeb,0x00,0x00,0x00,0x80,0x55 = cliy -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x55 = cliy -1, 0 0xeb,0x00,0x00,0x00,0x00,0x55 = cliy 0, 0 0xeb,0x00,0x00,0x01,0x00,0x55 = cliy 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x55 = cliy 524287, 0 0xeb,0xff,0x00,0x00,0x00,0x55 = cliy 0, 255 0xeb,0x2a,0x10,0x00,0x00,0x55 = cliy 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x55 = cliy 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x55 = cliy 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x55 = cliy 524287(%r15), 42 0x15,0x00 = clr %r0, %r0 0x15,0x0f = clr %r0, %r15 0x15,0xf0 = clr %r15, %r0 0x15,0x78 = clr %r7, %r8 0xb2,0x5d,0x00,0x00 = clst %r0, %r0 0xb2,0x5d,0x00,0x0f = clst %r0, %r15 0xb2,0x5d,0x00,0xf0 = clst %r15, %r0 0xb2,0x5d,0x00,0x78 = clst %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x55 = cly %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x55 = cly %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x55 = cly %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x55 = cly %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x55 = cly %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x55 = cly %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x55 = cly %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x55 = cly %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x55 = cly %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x55 = cly %r15, 0 0xb3,0x72,0x00,0x00 = cpsdr %f0, %f0, %f0 0xb3,0x72,0x00,0x0f = cpsdr %f0, %f0, %f15 0xb3,0x72,0xf0,0x00 = cpsdr %f0, %f15, %f0 0xb3,0x72,0x00,0xf0 = cpsdr %f15, %f0, %f0 0xb3,0x72,0x20,0x13 = cpsdr %f1, %f2, %f3 0xb3,0x72,0xf0,0xff = cpsdr %f15, %f15, %f15 0x19,0x00 = cr %r0, %r0 0x19,0x0f = cr %r0, %r15 0x19,0xf0 = cr %r15, %r0 0x19,0x78 = cr %r7, %r8 0xba,0x00,0x00,0x00 = cs %r0, %r0, 0 0xba,0x00,0x0f,0xff = cs %r0, %r0, 4095 0xba,0x00,0x10,0x00 = cs %r0, %r0, 0(%r1) 0xba,0x00,0xf0,0x00 = cs %r0, %r0, 0(%r15) 0xba,0x00,0x1f,0xff = cs %r0, %r0, 4095(%r1) 0xba,0x00,0xff,0xff = cs %r0, %r0, 4095(%r15) 0xba,0x0f,0x00,0x00 = cs %r0, %r15, 0 0xba,0xf0,0x00,0x00 = cs %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0x30 = csg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x30 = csg %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0x30 = csg %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0x30 = csg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x30 = csg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x30 = csg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x30 = csg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x30 = csg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x30 = csg %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0x30 = csg %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0x30 = csg %r15, %r0, 0 0xeb,0x00,0x00,0x00,0x80,0x14 = csy %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x14 = csy %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0x14 = csy %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0x14 = csy %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x14 = csy %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x14 = csy %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x14 = csy %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x14 = csy %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x14 = csy %r0, %r0, 524287(%r15) 0xeb,0x0f,0x00,0x00,0x00,0x14 = csy %r0, %r15, 0 0xeb,0xf0,0x00,0x00,0x00,0x14 = csy %r15, %r0, 0 0xb3,0x49,0x00,0x00 = cxbr %f0, %f0 0xb3,0x49,0x00,0x0d = cxbr %f0, %f13 0xb3,0x49,0x00,0x88 = cxbr %f8, %f8 0xb3,0x49,0x00,0xd0 = cxbr %f13, %f0 0xb3,0x96,0x00,0x00 = cxfbr %f0, %r0 0xb3,0x96,0x00,0x0f = cxfbr %f0, %r15 0xb3,0x96,0x00,0xd0 = cxfbr %f13, %r0 0xb3,0x96,0x00,0x87 = cxfbr %f8, %r7 0xb3,0x96,0x00,0xdf = cxfbr %f13, %r15 0xb3,0xa6,0x00,0x00 = cxgbr %f0, %r0 0xb3,0xa6,0x00,0x0f = cxgbr %f0, %r15 0xb3,0xa6,0x00,0xd0 = cxgbr %f13, %r0 0xb3,0xa6,0x00,0x87 = cxgbr %f8, %r7 0xb3,0xa6,0x00,0xdf = cxgbr %f13, %r15 0xe3,0x00,0x00,0x00,0x80,0x59 = cy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x59 = cy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x59 = cy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x59 = cy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x59 = cy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x59 = cy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x59 = cy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x59 = cy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x59 = cy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x59 = cy %r15, 0 0xed,0x00,0x00,0x00,0x00,0x1d = ddb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x1d = ddb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x1d = ddb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x1d = ddb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x1d = ddb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x1d = ddb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x1d = ddb %f15, 0 0xb3,0x1d,0x00,0x00 = ddbr %f0, %f0 0xb3,0x1d,0x00,0x0f = ddbr %f0, %f15 0xb3,0x1d,0x00,0x78 = ddbr %f7, %f8 0xb3,0x1d,0x00,0xf0 = ddbr %f15, %f0 0xed,0x00,0x00,0x00,0x00,0x0d = deb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x0d = deb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x0d = deb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x0d = deb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x0d = deb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x0d = deb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x0d = deb %f15, 0 0xb3,0x0d,0x00,0x00 = debr %f0, %f0 0xb3,0x0d,0x00,0x0f = debr %f0, %f15 0xb3,0x0d,0x00,0x78 = debr %f7, %f8 0xb3,0x0d,0x00,0xf0 = debr %f15, %f0 0xe3,0x00,0x00,0x00,0x80,0x97 = dl %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x97 = dl %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x97 = dl %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x97 = dl %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x97 = dl %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x97 = dl %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x97 = dl %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x97 = dl %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x97 = dl %r0, 524287(%r15,%r1) 0xe3,0xe0,0x00,0x00,0x00,0x97 = dl %r14, 0 0xe3,0x00,0x00,0x00,0x80,0x87 = dlg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x87 = dlg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x87 = dlg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x87 = dlg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x87 = dlg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x87 = dlg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x87 = dlg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x87 = dlg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x87 = dlg %r0, 524287(%r15,%r1) 0xe3,0xe0,0x00,0x00,0x00,0x87 = dlg %r14, 0 0xb9,0x87,0x00,0x00 = dlgr %r0, %r0 0xb9,0x87,0x00,0x0f = dlgr %r0, %r15 0xb9,0x87,0x00,0xe0 = dlgr %r14, %r0 0xb9,0x87,0x00,0x69 = dlgr %r6, %r9 0xb9,0x97,0x00,0x00 = dlr %r0, %r0 0xb9,0x97,0x00,0x0f = dlr %r0, %r15 0xb9,0x97,0x00,0xe0 = dlr %r14, %r0 0xb9,0x97,0x00,0x69 = dlr %r6, %r9 0xe3,0x00,0x00,0x00,0x80,0x0d = dsg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x0d = dsg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x0d = dsg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x0d = dsg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x0d = dsg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x0d = dsg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x0d = dsg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x0d = dsg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x0d = dsg %r0, 524287(%r15,%r1) 0xe3,0xe0,0x00,0x00,0x00,0x0d = dsg %r14, 0 0xe3,0x00,0x00,0x00,0x80,0x1d = dsgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x1d = dsgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x1d = dsgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x1d = dsgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x1d = dsgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x1d = dsgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x1d = dsgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x1d = dsgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x1d = dsgf %r0, 524287(%r15,%r1) 0xe3,0xe0,0x00,0x00,0x00,0x1d = dsgf %r14, 0 0xb9,0x1d,0x00,0x00 = dsgfr %r0, %r0 0xb9,0x1d,0x00,0x0f = dsgfr %r0, %r15 0xb9,0x1d,0x00,0xe0 = dsgfr %r14, %r0 0xb9,0x1d,0x00,0x69 = dsgfr %r6, %r9 0xb9,0x0d,0x00,0x00 = dsgr %r0, %r0 0xb9,0x0d,0x00,0x0f = dsgr %r0, %r15 0xb9,0x0d,0x00,0xe0 = dsgr %r14, %r0 0xb9,0x0d,0x00,0x69 = dsgr %r6, %r9 0xb3,0x4d,0x00,0x00 = dxbr %f0, %f0 0xb3,0x4d,0x00,0x0d = dxbr %f0, %f13 0xb3,0x4d,0x00,0x88 = dxbr %f8, %f8 0xb3,0x4d,0x00,0xd0 = dxbr %f13, %f0 0xb2,0x4f,0x00,0x00 = ear %r0, %a0 0xb2,0x4f,0x00,0x0f = ear %r0, %a15 0xb2,0x4f,0x00,0xf0 = ear %r15, %a0 0xb2,0x4f,0x00,0x78 = ear %r7, %a8 0xb2,0x4f,0x00,0xff = ear %r15, %a15 0xb3,0x5f,0x00,0x00 = fidbr %f0, 0, %f0 0xb3,0x5f,0x00,0x0f = fidbr %f0, 0, %f15 0xb3,0x5f,0xf0,0x00 = fidbr %f0, 15, %f0 0xb3,0x5f,0x50,0x46 = fidbr %f4, 5, %f6 0xb3,0x5f,0x00,0xf0 = fidbr %f15, 0, %f0 0xb3,0x57,0x00,0x00 = fiebr %f0, 0, %f0 0xb3,0x57,0x00,0x0f = fiebr %f0, 0, %f15 0xb3,0x57,0xf0,0x00 = fiebr %f0, 15, %f0 0xb3,0x57,0x50,0x46 = fiebr %f4, 5, %f6 0xb3,0x57,0x00,0xf0 = fiebr %f15, 0, %f0 0xb3,0x47,0x00,0x00 = fixbr %f0, 0, %f0 0xb3,0x47,0x00,0x0d = fixbr %f0, 0, %f13 0xb3,0x47,0xf0,0x00 = fixbr %f0, 15, %f0 0xb3,0x47,0x50,0x48 = fixbr %f4, 5, %f8 0xb3,0x47,0x00,0xd0 = fixbr %f13, 0, %f0 0xb9,0x83,0x00,0x00 = flogr %r0, %r0 0xb9,0x83,0x00,0x0f = flogr %r0, %r15 0xb9,0x83,0x00,0xa9 = flogr %r10, %r9 0xb9,0x83,0x00,0xe0 = flogr %r14, %r0 0x43,0x00,0x00,0x00 = ic %r0, 0 0x43,0x00,0x0f,0xff = ic %r0, 4095 0x43,0x00,0x10,0x00 = ic %r0, 0(%r1) 0x43,0x00,0xf0,0x00 = ic %r0, 0(%r15) 0x43,0x01,0xff,0xff = ic %r0, 4095(%r1,%r15) 0x43,0x0f,0x1f,0xff = ic %r0, 4095(%r15,%r1) 0x43,0xf0,0x00,0x00 = ic %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x73 = icy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x73 = icy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x73 = icy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x73 = icy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x73 = icy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x73 = icy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x73 = icy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x73 = icy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x73 = icy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x73 = icy %r15, 0 0xc0,0x08,0x00,0x00,0x00,0x00 = iihf %r0, 0 0xc0,0x08,0xff,0xff,0xff,0xff = iihf %r0, 4294967295 0xc0,0xf8,0x00,0x00,0x00,0x00 = iihf %r15, 0 0xa5,0x00,0x00,0x00 = iihh %r0, 0 0xa5,0x00,0x80,0x00 = iihh %r0, 32768 0xa5,0x00,0xff,0xff = iihh %r0, 65535 0xa5,0xf0,0x00,0x00 = iihh %r15, 0 0xa5,0x01,0x00,0x00 = iihl %r0, 0 0xa5,0x01,0x80,0x00 = iihl %r0, 32768 0xa5,0x01,0xff,0xff = iihl %r0, 65535 0xa5,0xf1,0x00,0x00 = iihl %r15, 0 0xc0,0x09,0x00,0x00,0x00,0x00 = iilf %r0, 0 0xc0,0x09,0xff,0xff,0xff,0xff = iilf %r0, 4294967295 0xc0,0xf9,0x00,0x00,0x00,0x00 = iilf %r15, 0 0xa5,0x02,0x00,0x00 = iilh %r0, 0 0xa5,0x02,0x80,0x00 = iilh %r0, 32768 0xa5,0x02,0xff,0xff = iilh %r0, 65535 0xa5,0xf2,0x00,0x00 = iilh %r15, 0 0xa5,0x03,0x00,0x00 = iill %r0, 0 0xa5,0x03,0x80,0x00 = iill %r0, 32768 0xa5,0x03,0xff,0xff = iill %r0, 65535 0xa5,0xf3,0x00,0x00 = iill %r15, 0 0xb2,0x22,0x00,0x00 = ipm %r0 0xb2,0x22,0x00,0x10 = ipm %r1 0xb2,0x22,0x00,0xf0 = ipm %r15 0x58,0x00,0x00,0x00 = l %r0, 0 0x58,0x00,0x0f,0xff = l %r0, 4095 0x58,0x00,0x10,0x00 = l %r0, 0(%r1) 0x58,0x00,0xf0,0x00 = l %r0, 0(%r15) 0x58,0x01,0xff,0xff = l %r0, 4095(%r1,%r15) 0x58,0x0f,0x1f,0xff = l %r0, 4095(%r15,%r1) 0x58,0xf0,0x00,0x00 = l %r15, 0 0x41,0x00,0x00,0x00 = la %r0, 0 0x41,0x00,0x0f,0xff = la %r0, 4095 0x41,0x00,0x10,0x00 = la %r0, 0(%r1) 0x41,0x00,0xf0,0x00 = la %r0, 0(%r15) 0x41,0x01,0xff,0xff = la %r0, 4095(%r1,%r15) 0x41,0x0f,0x1f,0xff = la %r0, 4095(%r15,%r1) 0x41,0xf0,0x00,0x00 = la %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x71 = lay %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x71 = lay %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x71 = lay %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x71 = lay %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x71 = lay %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x71 = lay %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x71 = lay %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x71 = lay %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x71 = lay %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x71 = lay %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x76 = lb %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x76 = lb %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x76 = lb %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x76 = lb %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x76 = lb %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x76 = lb %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x76 = lb %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x76 = lb %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x76 = lb %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x76 = lb %r15, 0 0xb9,0x26,0x00,0x0f = lbr %r0, %r15 0xb9,0x26,0x00,0x78 = lbr %r7, %r8 0xb9,0x26,0x00,0xf0 = lbr %r15, %r0 0xb3,0x13,0x00,0x09 = lcdbr %f0, %f9 0xb3,0x13,0x00,0x0f = lcdbr %f0, %f15 0xb3,0x13,0x00,0xf0 = lcdbr %f15, %f0 0xb3,0x13,0x00,0xf9 = lcdbr %f15, %f9 0xb3,0x03,0x00,0x09 = lcebr %f0, %f9 0xb3,0x03,0x00,0x0f = lcebr %f0, %f15 0xb3,0x03,0x00,0xf0 = lcebr %f15, %f0 0xb3,0x03,0x00,0xf9 = lcebr %f15, %f9 0xb9,0x13,0x00,0x00 = lcgfr %r0, %r0 0xb9,0x13,0x00,0x0f = lcgfr %r0, %r15 0xb9,0x13,0x00,0xf0 = lcgfr %r15, %r0 0xb9,0x13,0x00,0x78 = lcgfr %r7, %r8 0xb9,0x03,0x00,0x00 = lcgr %r0, %r0 0xb9,0x03,0x00,0x0f = lcgr %r0, %r15 0xb9,0x03,0x00,0xf0 = lcgr %r15, %r0 0xb9,0x03,0x00,0x78 = lcgr %r7, %r8 0x13,0x00 = lcr %r0, %r0 0x13,0x0f = lcr %r0, %r15 0x13,0xf0 = lcr %r15, %r0 0x13,0x78 = lcr %r7, %r8 0xb3,0x43,0x00,0x08 = lcxbr %f0, %f8 0xb3,0x43,0x00,0x0d = lcxbr %f0, %f13 0xb3,0x43,0x00,0xd0 = lcxbr %f13, %f0 0xb3,0x43,0x00,0xd9 = lcxbr %f13, %f9 0x68,0x00,0x00,0x00 = ld %f0, 0 0x68,0x00,0x0f,0xff = ld %f0, 4095 0x68,0x00,0x10,0x00 = ld %f0, 0(%r1) 0x68,0x00,0xf0,0x00 = ld %f0, 0(%r15) 0x68,0x01,0xff,0xff = ld %f0, 4095(%r1,%r15) 0x68,0x0f,0x1f,0xff = ld %f0, 4095(%r15,%r1) 0x68,0xf0,0x00,0x00 = ld %f15, 0 0xed,0x00,0x00,0x00,0x00,0x04 = ldeb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x04 = ldeb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x04 = ldeb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x04 = ldeb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x04 = ldeb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x04 = ldeb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x04 = ldeb %f15, 0 0xb3,0x04,0x00,0x0f = ldebr %f0, %f15 0xb3,0x04,0x00,0x78 = ldebr %f7, %f8 0xb3,0x04,0x00,0xf0 = ldebr %f15, %f0 0xb3,0xc1,0x00,0x00 = ldgr %f0, %r0 0xb3,0xc1,0x00,0x0f = ldgr %f0, %r15 0xb3,0xc1,0x00,0xf0 = ldgr %f15, %r0 0xb3,0xc1,0x00,0x79 = ldgr %f7, %r9 0xb3,0xc1,0x00,0xff = ldgr %f15, %r15 0x28,0x09 = ldr %f0, %f9 0x28,0x0f = ldr %f0, %f15 0x28,0xf0 = ldr %f15, %f0 0x28,0xf9 = ldr %f15, %f9 0xb3,0x45,0x00,0x00 = ldxbr %f0, %f0 0xb3,0x45,0x00,0x0d = ldxbr %f0, %f13 0xb3,0x45,0x00,0x8c = ldxbr %f8, %f12 0xb3,0x45,0x00,0xd0 = ldxbr %f13, %f0 0xb3,0x45,0x00,0xdd = ldxbr %f13, %f13 0xed,0x00,0x00,0x00,0x80,0x65 = ldy %f0, -524288 0xed,0x00,0x0f,0xff,0xff,0x65 = ldy %f0, -1 0xed,0x00,0x00,0x00,0x00,0x65 = ldy %f0, 0 0xed,0x00,0x00,0x01,0x00,0x65 = ldy %f0, 1 0xed,0x00,0x0f,0xff,0x7f,0x65 = ldy %f0, 524287 0xed,0x00,0x10,0x00,0x00,0x65 = ldy %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x65 = ldy %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x7f,0x65 = ldy %f0, 524287(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x7f,0x65 = ldy %f0, 524287(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x65 = ldy %f15, 0 0x78,0x00,0x00,0x00 = le %f0, 0 0x78,0x00,0x0f,0xff = le %f0, 4095 0x78,0x00,0x10,0x00 = le %f0, 0(%r1) 0x78,0x00,0xf0,0x00 = le %f0, 0(%r15) 0x78,0x01,0xff,0xff = le %f0, 4095(%r1,%r15) 0x78,0x0f,0x1f,0xff = le %f0, 4095(%r15,%r1) 0x78,0xf0,0x00,0x00 = le %f15, 0 0xb3,0x44,0x00,0x00 = ledbr %f0, %f0 0xb3,0x44,0x00,0x0f = ledbr %f0, %f15 0xb3,0x44,0x00,0x78 = ledbr %f7, %f8 0xb3,0x44,0x00,0xf0 = ledbr %f15, %f0 0xb3,0x44,0x00,0xff = ledbr %f15, %f15 0x38,0x09 = ler %f0, %f9 0x38,0x0f = ler %f0, %f15 0x38,0xf0 = ler %f15, %f0 0x38,0xf9 = ler %f15, %f9 0xb3,0x46,0x00,0x00 = lexbr %f0, %f0 0xb3,0x46,0x00,0x0d = lexbr %f0, %f13 0xb3,0x46,0x00,0x8c = lexbr %f8, %f12 0xb3,0x46,0x00,0xd0 = lexbr %f13, %f0 0xb3,0x46,0x00,0xdd = lexbr %f13, %f13 0xed,0x00,0x00,0x00,0x80,0x64 = ley %f0, -524288 0xed,0x00,0x0f,0xff,0xff,0x64 = ley %f0, -1 0xed,0x00,0x00,0x00,0x00,0x64 = ley %f0, 0 0xed,0x00,0x00,0x01,0x00,0x64 = ley %f0, 1 0xed,0x00,0x0f,0xff,0x7f,0x64 = ley %f0, 524287 0xed,0x00,0x10,0x00,0x00,0x64 = ley %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x64 = ley %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x7f,0x64 = ley %f0, 524287(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x7f,0x64 = ley %f0, 524287(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x64 = ley %f15, 0 0xe3,0x00,0x00,0x00,0x80,0x04 = lg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x04 = lg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x04 = lg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x04 = lg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x04 = lg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x04 = lg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x04 = lg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x04 = lg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x04 = lg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x04 = lg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x77 = lgb %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x77 = lgb %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x77 = lgb %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x77 = lgb %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x77 = lgb %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x77 = lgb %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x77 = lgb %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x77 = lgb %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x77 = lgb %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x77 = lgb %r15, 0 0xb9,0x06,0x00,0x0f = lgbr %r0, %r15 0xb9,0x06,0x00,0x78 = lgbr %r7, %r8 0xb9,0x06,0x00,0xf0 = lgbr %r15, %r0 0xb3,0xcd,0x00,0x00 = lgdr %r0, %f0 0xb3,0xcd,0x00,0x0f = lgdr %r0, %f15 0xb3,0xcd,0x00,0xf0 = lgdr %r15, %f0 0xb3,0xcd,0x00,0x88 = lgdr %r8, %f8 0xb3,0xcd,0x00,0xff = lgdr %r15, %f15 0xe3,0x00,0x00,0x00,0x80,0x14 = lgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x14 = lgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x14 = lgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x14 = lgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x14 = lgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x14 = lgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x14 = lgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x14 = lgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x14 = lgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x14 = lgf %r15, 0 0xc0,0x01,0x80,0x00,0x00,0x00 = lgfi %r0, -2147483648 0xc0,0x01,0xff,0xff,0xff,0xff = lgfi %r0, -1 0xc0,0x01,0x00,0x00,0x00,0x00 = lgfi %r0, 0 0xc0,0x01,0x00,0x00,0x00,0x01 = lgfi %r0, 1 0xc0,0x01,0x7f,0xff,0xff,0xff = lgfi %r0, 2147483647 0xc0,0xf1,0x00,0x00,0x00,0x00 = lgfi %r15, 0 0xb9,0x14,0x00,0x0f = lgfr %r0, %r15 0xb9,0x14,0x00,0x78 = lgfr %r7, %r8 0xb9,0x14,0x00,0xf0 = lgfr %r15, %r0 0xe3,0x00,0x00,0x00,0x80,0x15 = lgh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x15 = lgh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x15 = lgh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x15 = lgh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x15 = lgh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x15 = lgh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x15 = lgh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x15 = lgh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x15 = lgh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x15 = lgh %r15, 0 0xa7,0x09,0x80,0x00 = lghi %r0, -32768 0xa7,0x09,0xff,0xff = lghi %r0, -1 0xa7,0x09,0x00,0x00 = lghi %r0, 0 0xa7,0x09,0x00,0x01 = lghi %r0, 1 0xa7,0x09,0x7f,0xff = lghi %r0, 32767 0xa7,0xf9,0x00,0x00 = lghi %r15, 0 0xb9,0x07,0x00,0x0f = lghr %r0, %r15 0xb9,0x07,0x00,0x78 = lghr %r7, %r8 0xb9,0x07,0x00,0xf0 = lghr %r15, %r0 0xb9,0x04,0x00,0x09 = lgr %r0, %r9 0xb9,0x04,0x00,0x0f = lgr %r0, %r15 0xb9,0x04,0x00,0xf0 = lgr %r15, %r0 0xb9,0x04,0x00,0xf9 = lgr %r15, %r9 0x48,0x00,0x00,0x00 = lh %r0, 0 0x48,0x00,0x0f,0xff = lh %r0, 4095 0x48,0x00,0x10,0x00 = lh %r0, 0(%r1) 0x48,0x00,0xf0,0x00 = lh %r0, 0(%r15) 0x48,0x01,0xff,0xff = lh %r0, 4095(%r1,%r15) 0x48,0x0f,0x1f,0xff = lh %r0, 4095(%r15,%r1) 0x48,0xf0,0x00,0x00 = lh %r15, 0 0xa7,0x08,0x80,0x00 = lhi %r0, -32768 0xa7,0x08,0xff,0xff = lhi %r0, -1 0xa7,0x08,0x00,0x00 = lhi %r0, 0 0xa7,0x08,0x00,0x01 = lhi %r0, 1 0xa7,0x08,0x7f,0xff = lhi %r0, 32767 0xa7,0xf8,0x00,0x00 = lhi %r15, 0 0xb9,0x27,0x00,0x0f = lhr %r0, %r15 0xb9,0x27,0x00,0x78 = lhr %r7, %r8 0xb9,0x27,0x00,0xf0 = lhr %r15, %r0 0xe3,0x00,0x00,0x00,0x80,0x78 = lhy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x78 = lhy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x78 = lhy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x78 = lhy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x78 = lhy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x78 = lhy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x78 = lhy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x78 = lhy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x78 = lhy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x78 = lhy %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x94 = llc %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x94 = llc %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x94 = llc %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x94 = llc %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x94 = llc %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x94 = llc %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x94 = llc %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x94 = llc %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x94 = llc %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x94 = llc %r15, 0 0xb9,0x94,0x00,0x0f = llcr %r0, %r15 0xb9,0x94,0x00,0x78 = llcr %r7, %r8 0xb9,0x94,0x00,0xf0 = llcr %r15, %r0 0xe3,0x00,0x00,0x00,0x80,0x90 = llgc %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x90 = llgc %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x90 = llgc %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x90 = llgc %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x90 = llgc %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x90 = llgc %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x90 = llgc %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x90 = llgc %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x90 = llgc %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x90 = llgc %r15, 0 0xb9,0x84,0x00,0x0f = llgcr %r0, %r15 0xb9,0x84,0x00,0x78 = llgcr %r7, %r8 0xb9,0x84,0x00,0xf0 = llgcr %r15, %r0 0xe3,0x00,0x00,0x00,0x80,0x16 = llgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x16 = llgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x16 = llgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x16 = llgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x16 = llgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x16 = llgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x16 = llgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x16 = llgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x16 = llgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x16 = llgf %r15, 0 0xb9,0x16,0x00,0x0f = llgfr %r0, %r15 0xb9,0x16,0x00,0x78 = llgfr %r7, %r8 0xb9,0x16,0x00,0xf0 = llgfr %r15, %r0 0xe3,0x00,0x00,0x00,0x80,0x91 = llgh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x91 = llgh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x91 = llgh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x91 = llgh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x91 = llgh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x91 = llgh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x91 = llgh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x91 = llgh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x91 = llgh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x91 = llgh %r15, 0 0xb9,0x85,0x00,0x0f = llghr %r0, %r15 0xb9,0x85,0x00,0x78 = llghr %r7, %r8 0xb9,0x85,0x00,0xf0 = llghr %r15, %r0 0xe3,0x00,0x00,0x00,0x80,0x95 = llh %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x95 = llh %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x95 = llh %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x95 = llh %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x95 = llh %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x95 = llh %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x95 = llh %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x95 = llh %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x95 = llh %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x95 = llh %r15, 0 0xb9,0x95,0x00,0x0f = llhr %r0, %r15 0xb9,0x95,0x00,0x78 = llhr %r7, %r8 0xb9,0x95,0x00,0xf0 = llhr %r15, %r0 0xc0,0x0e,0x00,0x00,0x00,0x00 = llihf %r0, 0 0xc0,0x0e,0xff,0xff,0xff,0xff = llihf %r0, 4294967295 0xc0,0xfe,0x00,0x00,0x00,0x00 = llihf %r15, 0 0xa5,0x0c,0x00,0x00 = llihh %r0, 0 0xa5,0x0c,0x80,0x00 = llihh %r0, 32768 0xa5,0x0c,0xff,0xff = llihh %r0, 65535 0xa5,0xfc,0x00,0x00 = llihh %r15, 0 0xa5,0x0d,0x00,0x00 = llihl %r0, 0 0xa5,0x0d,0x80,0x00 = llihl %r0, 32768 0xa5,0x0d,0xff,0xff = llihl %r0, 65535 0xa5,0xfd,0x00,0x00 = llihl %r15, 0 0xc0,0x0f,0x00,0x00,0x00,0x00 = llilf %r0, 0 0xc0,0x0f,0xff,0xff,0xff,0xff = llilf %r0, 4294967295 0xc0,0xff,0x00,0x00,0x00,0x00 = llilf %r15, 0 0xa5,0x0e,0x00,0x00 = llilh %r0, 0 0xa5,0x0e,0x80,0x00 = llilh %r0, 32768 0xa5,0x0e,0xff,0xff = llilh %r0, 65535 0xa5,0xfe,0x00,0x00 = llilh %r15, 0 0xa5,0x0f,0x00,0x00 = llill %r0, 0 0xa5,0x0f,0x80,0x00 = llill %r0, 32768 0xa5,0x0f,0xff,0xff = llill %r0, 65535 0xa5,0xff,0x00,0x00 = llill %r15, 0 0xeb,0x00,0x00,0x00,0x00,0x04 = lmg %r0, %r0, 0 0xeb,0x0f,0x00,0x00,0x00,0x04 = lmg %r0, %r15, 0 0xeb,0xef,0x00,0x00,0x00,0x04 = lmg %r14, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x04 = lmg %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x04 = lmg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x04 = lmg %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0x04 = lmg %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0x04 = lmg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x04 = lmg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x04 = lmg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x04 = lmg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x04 = lmg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x04 = lmg %r0, %r0, 524287(%r15) 0xb3,0x11,0x00,0x09 = lndbr %f0, %f9 0xb3,0x11,0x00,0x0f = lndbr %f0, %f15 0xb3,0x11,0x00,0xf0 = lndbr %f15, %f0 0xb3,0x11,0x00,0xf9 = lndbr %f15, %f9 0xb3,0x01,0x00,0x09 = lnebr %f0, %f9 0xb3,0x01,0x00,0x0f = lnebr %f0, %f15 0xb3,0x01,0x00,0xf0 = lnebr %f15, %f0 0xb3,0x01,0x00,0xf9 = lnebr %f15, %f9 0xb9,0x11,0x00,0x00 = lngfr %r0, %r0 0xb9,0x11,0x00,0x0f = lngfr %r0, %r15 0xb9,0x11,0x00,0xf0 = lngfr %r15, %r0 0xb9,0x11,0x00,0x78 = lngfr %r7, %r8 0xb9,0x01,0x00,0x00 = lngr %r0, %r0 0xb9,0x01,0x00,0x0f = lngr %r0, %r15 0xb9,0x01,0x00,0xf0 = lngr %r15, %r0 0xb9,0x01,0x00,0x78 = lngr %r7, %r8 0x11,0x00 = lnr %r0, %r0 0x11,0x0f = lnr %r0, %r15 0x11,0xf0 = lnr %r15, %r0 0x11,0x78 = lnr %r7, %r8 0xb3,0x41,0x00,0x08 = lnxbr %f0, %f8 0xb3,0x41,0x00,0x0d = lnxbr %f0, %f13 0xb3,0x41,0x00,0xd0 = lnxbr %f13, %f0 0xb3,0x41,0x00,0xd9 = lnxbr %f13, %f9 0xb3,0x10,0x00,0x09 = lpdbr %f0, %f9 0xb3,0x10,0x00,0x0f = lpdbr %f0, %f15 0xb3,0x10,0x00,0xf0 = lpdbr %f15, %f0 0xb3,0x10,0x00,0xf9 = lpdbr %f15, %f9 0xb3,0x00,0x00,0x09 = lpebr %f0, %f9 0xb3,0x00,0x00,0x0f = lpebr %f0, %f15 0xb3,0x00,0x00,0xf0 = lpebr %f15, %f0 0xb3,0x00,0x00,0xf9 = lpebr %f15, %f9 0xb9,0x10,0x00,0x00 = lpgfr %r0, %r0 0xb9,0x10,0x00,0x0f = lpgfr %r0, %r15 0xb9,0x10,0x00,0xf0 = lpgfr %r15, %r0 0xb9,0x10,0x00,0x78 = lpgfr %r7, %r8 0xb9,0x00,0x00,0x00 = lpgr %r0, %r0 0xb9,0x00,0x00,0x0f = lpgr %r0, %r15 0xb9,0x00,0x00,0xf0 = lpgr %r15, %r0 0xb9,0x00,0x00,0x78 = lpgr %r7, %r8 0x10,0x00 = lpr %r0, %r0 0x10,0x0f = lpr %r0, %r15 0x10,0xf0 = lpr %r15, %r0 0x10,0x78 = lpr %r7, %r8 0xb3,0x40,0x00,0x08 = lpxbr %f0, %f8 0xb3,0x40,0x00,0x0d = lpxbr %f0, %f13 0xb3,0x40,0x00,0xd0 = lpxbr %f13, %f0 0xb3,0x40,0x00,0xd9 = lpxbr %f13, %f9 0x18,0x09 = lr %r0, %r9 0x18,0x0f = lr %r0, %r15 0x18,0xf0 = lr %r15, %r0 0x18,0xf9 = lr %r15, %r9 0xe3,0x00,0x00,0x00,0x80,0x1e = lrv %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x1e = lrv %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x1e = lrv %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x1e = lrv %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x1e = lrv %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x1e = lrv %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x1e = lrv %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x1e = lrv %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x1e = lrv %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x1e = lrv %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x0f = lrvg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x0f = lrvg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x0f = lrvg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x0f = lrvg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x0f = lrvg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x0f = lrvg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x0f = lrvg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x0f = lrvg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x0f = lrvg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x0f = lrvg %r15, 0 0xb9,0x0f,0x00,0x00 = lrvgr %r0, %r0 0xb9,0x0f,0x00,0x0f = lrvgr %r0, %r15 0xb9,0x0f,0x00,0xf0 = lrvgr %r15, %r0 0xb9,0x0f,0x00,0x78 = lrvgr %r7, %r8 0xb9,0x0f,0x00,0xff = lrvgr %r15, %r15 0xb9,0x1f,0x00,0x00 = lrvr %r0, %r0 0xb9,0x1f,0x00,0x0f = lrvr %r0, %r15 0xb9,0x1f,0x00,0xf0 = lrvr %r15, %r0 0xb9,0x1f,0x00,0x78 = lrvr %r7, %r8 0xb9,0x1f,0x00,0xff = lrvr %r15, %r15 0xe3,0x00,0x00,0x00,0x80,0x12 = lt %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x12 = lt %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x12 = lt %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x12 = lt %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x12 = lt %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x12 = lt %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x12 = lt %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x12 = lt %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x12 = lt %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x12 = lt %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x02 = ltg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x02 = ltg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x02 = ltg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x02 = ltg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x02 = ltg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x02 = ltg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x02 = ltg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x02 = ltg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x02 = ltg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x02 = ltg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x32 = ltgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x32 = ltgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x32 = ltgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x32 = ltgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x32 = ltgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x32 = ltgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x32 = ltgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x32 = ltgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x32 = ltgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x32 = ltgf %r15, 0 0xb3,0x12,0x00,0x09 = ltdbr %f0, %f9 0xb3,0x12,0x00,0x0f = ltdbr %f0, %f15 0xb3,0x12,0x00,0xf0 = ltdbr %f15, %f0 0xb3,0x12,0x00,0xf9 = ltdbr %f15, %f9 0xb3,0x02,0x00,0x09 = ltebr %f0, %f9 0xb3,0x02,0x00,0x0f = ltebr %f0, %f15 0xb3,0x02,0x00,0xf0 = ltebr %f15, %f0 0xb3,0x02,0x00,0xf9 = ltebr %f15, %f9 0xb9,0x12,0x00,0x09 = ltgfr %r0, %r9 0xb9,0x12,0x00,0x0f = ltgfr %r0, %r15 0xb9,0x12,0x00,0xf0 = ltgfr %r15, %r0 0xb9,0x12,0x00,0xf9 = ltgfr %r15, %r9 0xb9,0x02,0x00,0x09 = ltgr %r0, %r9 0xb9,0x02,0x00,0x0f = ltgr %r0, %r15 0xb9,0x02,0x00,0xf0 = ltgr %r15, %r0 0xb9,0x02,0x00,0xf9 = ltgr %r15, %r9 0x12,0x09 = ltr %r0, %r9 0x12,0x0f = ltr %r0, %r15 0x12,0xf0 = ltr %r15, %r0 0x12,0xf9 = ltr %r15, %r9 0xb3,0x42,0x00,0x09 = ltxbr %f0, %f9 0xb3,0x42,0x00,0x0d = ltxbr %f0, %f13 0xb3,0x42,0x00,0xd0 = ltxbr %f13, %f0 0xb3,0x42,0x00,0xd9 = ltxbr %f13, %f9 0xb3,0x65,0x00,0x08 = lxr %f0, %f8 0xb3,0x65,0x00,0x0d = lxr %f0, %f13 0xb3,0x65,0x00,0xd0 = lxr %f13, %f0 0xb3,0x65,0x00,0xd9 = lxr %f13, %f9 0xe3,0x00,0x00,0x00,0x80,0x58 = ly %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x58 = ly %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x58 = ly %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x58 = ly %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x58 = ly %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x58 = ly %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x58 = ly %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x58 = ly %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x58 = ly %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x58 = ly %r15, 0 0xb3,0x75,0x00,0x00 = lzdr %f0 0xb3,0x75,0x00,0x70 = lzdr %f7 0xb3,0x75,0x00,0xf0 = lzdr %f15 0xb3,0x74,0x00,0x00 = lzer %f0 0xb3,0x74,0x00,0x70 = lzer %f7 0xb3,0x74,0x00,0xf0 = lzer %f15 0xb3,0x76,0x00,0x00 = lzxr %f0 0xb3,0x76,0x00,0x80 = lzxr %f8 0xb3,0x76,0x00,0xd0 = lzxr %f13 0xed,0x00,0x00,0x00,0x00,0x1e = madb %f0, %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x1e = madb %f0, %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x1e = madb %f0, %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x1e = madb %f0, %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x1e = madb %f0, %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x1e = madb %f0, %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x1e = madb %f0, %f15, 0 0xed,0x00,0x00,0x00,0xf0,0x1e = madb %f15, %f0, 0 0xed,0xf0,0x00,0x00,0xf0,0x1e = madb %f15, %f15, 0 0xb3,0x1e,0x00,0x00 = madbr %f0, %f0, %f0 0xb3,0x1e,0x00,0x0f = madbr %f0, %f0, %f15 0xb3,0x1e,0x00,0xf0 = madbr %f0, %f15, %f0 0xb3,0x1e,0xf0,0x00 = madbr %f15, %f0, %f0 0xb3,0x1e,0x70,0x89 = madbr %f7, %f8, %f9 0xb3,0x1e,0xf0,0xff = madbr %f15, %f15, %f15 0xed,0x00,0x00,0x00,0x00,0x0e = maeb %f0, %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x0e = maeb %f0, %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x0e = maeb %f0, %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x0e = maeb %f0, %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x0e = maeb %f0, %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x0e = maeb %f0, %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x0e = maeb %f0, %f15, 0 0xed,0x00,0x00,0x00,0xf0,0x0e = maeb %f15, %f0, 0 0xed,0xf0,0x00,0x00,0xf0,0x0e = maeb %f15, %f15, 0 0xb3,0x0e,0x00,0x00 = maebr %f0, %f0, %f0 0xb3,0x0e,0x00,0x0f = maebr %f0, %f0, %f15 0xb3,0x0e,0x00,0xf0 = maebr %f0, %f15, %f0 0xb3,0x0e,0xf0,0x00 = maebr %f15, %f0, %f0 0xb3,0x0e,0x70,0x89 = maebr %f7, %f8, %f9 0xb3,0x0e,0xf0,0xff = maebr %f15, %f15, %f15 0xed,0x00,0x00,0x00,0x00,0x1c = mdb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x1c = mdb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x1c = mdb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x1c = mdb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x1c = mdb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x1c = mdb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x1c = mdb %f15, 0 0xb3,0x1c,0x00,0x00 = mdbr %f0, %f0 0xb3,0x1c,0x00,0x0f = mdbr %f0, %f15 0xb3,0x1c,0x00,0x78 = mdbr %f7, %f8 0xb3,0x1c,0x00,0xf0 = mdbr %f15, %f0 0xed,0x00,0x00,0x00,0x00,0x0c = mdeb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x0c = mdeb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x0c = mdeb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x0c = mdeb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x0c = mdeb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x0c = mdeb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x0c = mdeb %f15, 0 0xb3,0x0c,0x00,0x00 = mdebr %f0, %f0 0xb3,0x0c,0x00,0x0f = mdebr %f0, %f15 0xb3,0x0c,0x00,0x78 = mdebr %f7, %f8 0xb3,0x0c,0x00,0xf0 = mdebr %f15, %f0 0xed,0x00,0x00,0x00,0x00,0x17 = meeb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x17 = meeb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x17 = meeb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x17 = meeb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x17 = meeb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x17 = meeb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x17 = meeb %f15, 0 0xb3,0x17,0x00,0x00 = meebr %f0, %f0 0xb3,0x17,0x00,0x0f = meebr %f0, %f15 0xb3,0x17,0x00,0x78 = meebr %f7, %f8 0xb3,0x17,0x00,0xf0 = meebr %f15, %f0 0xa7,0x0d,0x80,0x00 = mghi %r0, -32768 0xa7,0x0d,0xff,0xff = mghi %r0, -1 0xa7,0x0d,0x00,0x00 = mghi %r0, 0 0xa7,0x0d,0x00,0x01 = mghi %r0, 1 0xa7,0x0d,0x7f,0xff = mghi %r0, 32767 0xa7,0xfd,0x00,0x00 = mghi %r15, 0 0x4c,0x00,0x00,0x00 = mh %r0, 0 0x4c,0x00,0x0f,0xff = mh %r0, 4095 0x4c,0x00,0x10,0x00 = mh %r0, 0(%r1) 0x4c,0x00,0xf0,0x00 = mh %r0, 0(%r15) 0x4c,0x01,0xff,0xff = mh %r0, 4095(%r1,%r15) 0x4c,0x0f,0x1f,0xff = mh %r0, 4095(%r15,%r1) 0x4c,0xf0,0x00,0x00 = mh %r15, 0 0xa7,0x0c,0x80,0x00 = mhi %r0, -32768 0xa7,0x0c,0xff,0xff = mhi %r0, -1 0xa7,0x0c,0x00,0x00 = mhi %r0, 0 0xa7,0x0c,0x00,0x01 = mhi %r0, 1 0xa7,0x0c,0x7f,0xff = mhi %r0, 32767 0xa7,0xfc,0x00,0x00 = mhi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x7c = mhy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x7c = mhy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x7c = mhy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x7c = mhy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x7c = mhy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x7c = mhy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x7c = mhy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x7c = mhy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x7c = mhy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x7c = mhy %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x86 = mlg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x86 = mlg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x86 = mlg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x86 = mlg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x86 = mlg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x86 = mlg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x86 = mlg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x86 = mlg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x86 = mlg %r0, 524287(%r15,%r1) 0xe3,0xe0,0x00,0x00,0x00,0x86 = mlg %r14, 0 0xb9,0x86,0x00,0x00 = mlgr %r0, %r0 0xb9,0x86,0x00,0x0f = mlgr %r0, %r15 0xb9,0x86,0x00,0xe0 = mlgr %r14, %r0 0xb9,0x86,0x00,0x69 = mlgr %r6, %r9 0x71,0x00,0x00,0x00 = ms %r0, 0 0x71,0x00,0x0f,0xff = ms %r0, 4095 0x71,0x00,0x10,0x00 = ms %r0, 0(%r1) 0x71,0x00,0xf0,0x00 = ms %r0, 0(%r15) 0x71,0x01,0xff,0xff = ms %r0, 4095(%r1,%r15) 0x71,0x0f,0x1f,0xff = ms %r0, 4095(%r15,%r1) 0x71,0xf0,0x00,0x00 = ms %r15, 0 0xed,0x00,0x00,0x00,0x00,0x1f = msdb %f0, %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x1f = msdb %f0, %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x1f = msdb %f0, %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x1f = msdb %f0, %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x1f = msdb %f0, %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x1f = msdb %f0, %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x1f = msdb %f0, %f15, 0 0xed,0x00,0x00,0x00,0xf0,0x1f = msdb %f15, %f0, 0 0xed,0xf0,0x00,0x00,0xf0,0x1f = msdb %f15, %f15, 0 0xb3,0x1f,0x00,0x00 = msdbr %f0, %f0, %f0 0xb3,0x1f,0x00,0x0f = msdbr %f0, %f0, %f15 0xb3,0x1f,0x00,0xf0 = msdbr %f0, %f15, %f0 0xb3,0x1f,0xf0,0x00 = msdbr %f15, %f0, %f0 0xb3,0x1f,0x70,0x89 = msdbr %f7, %f8, %f9 0xb3,0x1f,0xf0,0xff = msdbr %f15, %f15, %f15 0xed,0x00,0x00,0x00,0x00,0x0f = mseb %f0, %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x0f = mseb %f0, %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x0f = mseb %f0, %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x0f = mseb %f0, %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x0f = mseb %f0, %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x0f = mseb %f0, %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x0f = mseb %f0, %f15, 0 0xed,0x00,0x00,0x00,0xf0,0x0f = mseb %f15, %f0, 0 0xed,0xf0,0x00,0x00,0xf0,0x0f = mseb %f15, %f15, 0 0xb3,0x0f,0x00,0x00 = msebr %f0, %f0, %f0 0xb3,0x0f,0x00,0x0f = msebr %f0, %f0, %f15 0xb3,0x0f,0x00,0xf0 = msebr %f0, %f15, %f0 0xb3,0x0f,0xf0,0x00 = msebr %f15, %f0, %f0 0xb3,0x0f,0x70,0x89 = msebr %f7, %f8, %f9 0xb3,0x0f,0xf0,0xff = msebr %f15, %f15, %f15 0xc2,0x01,0x80,0x00,0x00,0x00 = msfi %r0, -2147483648 0xc2,0x01,0xff,0xff,0xff,0xff = msfi %r0, -1 0xc2,0x01,0x00,0x00,0x00,0x00 = msfi %r0, 0 0xc2,0x01,0x00,0x00,0x00,0x01 = msfi %r0, 1 0xc2,0x01,0x7f,0xff,0xff,0xff = msfi %r0, 2147483647 0xc2,0xf1,0x00,0x00,0x00,0x00 = msfi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x0c = msg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x0c = msg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x0c = msg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x0c = msg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x0c = msg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x0c = msg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x0c = msg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x0c = msg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x0c = msg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x0c = msg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x1c = msgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x1c = msgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x1c = msgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x1c = msgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x1c = msgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x1c = msgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x1c = msgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x1c = msgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x1c = msgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x1c = msgf %r15, 0 0xc2,0x00,0x80,0x00,0x00,0x00 = msgfi %r0, -2147483648 0xc2,0x00,0xff,0xff,0xff,0xff = msgfi %r0, -1 0xc2,0x00,0x00,0x00,0x00,0x00 = msgfi %r0, 0 0xc2,0x00,0x00,0x00,0x00,0x01 = msgfi %r0, 1 0xc2,0x00,0x7f,0xff,0xff,0xff = msgfi %r0, 2147483647 0xc2,0xf0,0x00,0x00,0x00,0x00 = msgfi %r15, 0 0xb9,0x1c,0x00,0x00 = msgfr %r0, %r0 0xb9,0x1c,0x00,0x0f = msgfr %r0, %r15 0xb9,0x1c,0x00,0xf0 = msgfr %r15, %r0 0xb9,0x1c,0x00,0x78 = msgfr %r7, %r8 0xb9,0x0c,0x00,0x00 = msgr %r0, %r0 0xb9,0x0c,0x00,0x0f = msgr %r0, %r15 0xb9,0x0c,0x00,0xf0 = msgr %r15, %r0 0xb9,0x0c,0x00,0x78 = msgr %r7, %r8 0xb2,0x52,0x00,0x00 = msr %r0, %r0 0xb2,0x52,0x00,0x0f = msr %r0, %r15 0xb2,0x52,0x00,0xf0 = msr %r15, %r0 0xb2,0x52,0x00,0x78 = msr %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x51 = msy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x51 = msy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x51 = msy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x51 = msy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x51 = msy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x51 = msy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x51 = msy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x51 = msy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x51 = msy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x51 = msy %r15, 0 0xd2,0x00,0x00,0x00,0x00,0x00 = mvc 0(1), 0 0xd2,0x00,0x00,0x00,0x10,0x00 = mvc 0(1), 0(%r1) 0xd2,0x00,0x00,0x00,0xf0,0x00 = mvc 0(1), 0(%r15) 0xd2,0x00,0x00,0x00,0x0f,0xff = mvc 0(1), 4095 0xd2,0x00,0x00,0x00,0x1f,0xff = mvc 0(1), 4095(%r1) 0xd2,0x00,0x00,0x00,0xff,0xff = mvc 0(1), 4095(%r15) 0xd2,0x00,0x10,0x00,0x00,0x00 = mvc 0(1,%r1), 0 0xd2,0x00,0xf0,0x00,0x00,0x00 = mvc 0(1,%r15), 0 0xd2,0x00,0x1f,0xff,0x00,0x00 = mvc 4095(1,%r1), 0 0xd2,0x00,0xff,0xff,0x00,0x00 = mvc 4095(1,%r15), 0 0xd2,0xff,0x10,0x00,0x00,0x00 = mvc 0(256,%r1), 0 0xd2,0xff,0xf0,0x00,0x00,0x00 = mvc 0(256,%r15), 0 0xe5,0x48,0x00,0x00,0x00,0x00 = mvghi 0, 0 0xe5,0x48,0x0f,0xff,0x00,0x00 = mvghi 4095, 0 0xe5,0x48,0x00,0x00,0x80,0x00 = mvghi 0, -32768 0xe5,0x48,0x00,0x00,0xff,0xff = mvghi 0, -1 0xe5,0x48,0x00,0x00,0x00,0x00 = mvghi 0, 0 0xe5,0x48,0x00,0x00,0x00,0x01 = mvghi 0, 1 0xe5,0x48,0x00,0x00,0x7f,0xff = mvghi 0, 32767 0xe5,0x48,0x10,0x00,0x00,0x2a = mvghi 0(%r1), 42 0xe5,0x48,0xf0,0x00,0x00,0x2a = mvghi 0(%r15), 42 0xe5,0x48,0x1f,0xff,0x00,0x2a = mvghi 4095(%r1), 42 0xe5,0x48,0xff,0xff,0x00,0x2a = mvghi 4095(%r15), 42 0xe5,0x44,0x00,0x00,0x00,0x00 = mvhhi 0, 0 0xe5,0x44,0x0f,0xff,0x00,0x00 = mvhhi 4095, 0 0xe5,0x44,0x00,0x00,0x80,0x00 = mvhhi 0, -32768 0xe5,0x44,0x00,0x00,0xff,0xff = mvhhi 0, -1 0xe5,0x44,0x00,0x00,0x00,0x00 = mvhhi 0, 0 0xe5,0x44,0x00,0x00,0x00,0x01 = mvhhi 0, 1 0xe5,0x44,0x00,0x00,0x7f,0xff = mvhhi 0, 32767 0xe5,0x44,0x10,0x00,0x00,0x2a = mvhhi 0(%r1), 42 0xe5,0x44,0xf0,0x00,0x00,0x2a = mvhhi 0(%r15), 42 0xe5,0x44,0x1f,0xff,0x00,0x2a = mvhhi 4095(%r1), 42 0xe5,0x44,0xff,0xff,0x00,0x2a = mvhhi 4095(%r15), 42 0xe5,0x4c,0x00,0x00,0x00,0x00 = mvhi 0, 0 0xe5,0x4c,0x0f,0xff,0x00,0x00 = mvhi 4095, 0 0xe5,0x4c,0x00,0x00,0x80,0x00 = mvhi 0, -32768 0xe5,0x4c,0x00,0x00,0xff,0xff = mvhi 0, -1 0xe5,0x4c,0x00,0x00,0x00,0x00 = mvhi 0, 0 0xe5,0x4c,0x00,0x00,0x00,0x01 = mvhi 0, 1 0xe5,0x4c,0x00,0x00,0x7f,0xff = mvhi 0, 32767 0xe5,0x4c,0x10,0x00,0x00,0x2a = mvhi 0(%r1), 42 0xe5,0x4c,0xf0,0x00,0x00,0x2a = mvhi 0(%r15), 42 0xe5,0x4c,0x1f,0xff,0x00,0x2a = mvhi 4095(%r1), 42 0xe5,0x4c,0xff,0xff,0x00,0x2a = mvhi 4095(%r15), 42 0x92,0x00,0x00,0x00 = mvi 0, 0 0x92,0x00,0x0f,0xff = mvi 4095, 0 0x92,0xff,0x00,0x00 = mvi 0, 255 0x92,0x2a,0x10,0x00 = mvi 0(%r1), 42 0x92,0x2a,0xf0,0x00 = mvi 0(%r15), 42 0x92,0x2a,0x1f,0xff = mvi 4095(%r1), 42 0x92,0x2a,0xff,0xff = mvi 4095(%r15), 42 0xeb,0x00,0x00,0x00,0x80,0x52 = mviy -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x52 = mviy -1, 0 0xeb,0x00,0x00,0x00,0x00,0x52 = mviy 0, 0 0xeb,0x00,0x00,0x01,0x00,0x52 = mviy 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x52 = mviy 524287, 0 0xeb,0xff,0x00,0x00,0x00,0x52 = mviy 0, 255 0xeb,0x2a,0x10,0x00,0x00,0x52 = mviy 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x52 = mviy 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x52 = mviy 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x52 = mviy 524287(%r15), 42 0xb2,0x55,0x00,0x00 = mvst %r0, %r0 0xb2,0x55,0x00,0x0f = mvst %r0, %r15 0xb2,0x55,0x00,0xf0 = mvst %r15, %r0 0xb2,0x55,0x00,0x78 = mvst %r7, %r8 0xb3,0x4c,0x00,0x00 = mxbr %f0, %f0 0xb3,0x4c,0x00,0x0d = mxbr %f0, %f13 0xb3,0x4c,0x00,0x85 = mxbr %f8, %f5 0xb3,0x4c,0x00,0xdd = mxbr %f13, %f13 0xed,0x00,0x00,0x00,0x00,0x07 = mxdb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x07 = mxdb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x07 = mxdb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x07 = mxdb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x07 = mxdb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x07 = mxdb %f0, 4095(%r15,%r1) 0xed,0xd0,0x00,0x00,0x00,0x07 = mxdb %f13, 0 0xb3,0x07,0x00,0x00 = mxdbr %f0, %f0 0xb3,0x07,0x00,0x0f = mxdbr %f0, %f15 0xb3,0x07,0x00,0x88 = mxdbr %f8, %f8 0xb3,0x07,0x00,0xd0 = mxdbr %f13, %f0 0x54,0x00,0x00,0x00 = n %r0, 0 0x54,0x00,0x0f,0xff = n %r0, 4095 0x54,0x00,0x10,0x00 = n %r0, 0(%r1) 0x54,0x00,0xf0,0x00 = n %r0, 0(%r15) 0x54,0x01,0xff,0xff = n %r0, 4095(%r1,%r15) 0x54,0x0f,0x1f,0xff = n %r0, 4095(%r15,%r1) 0x54,0xf0,0x00,0x00 = n %r15, 0 0xd4,0x00,0x00,0x00,0x00,0x00 = nc 0(1), 0 0xd4,0x00,0x00,0x00,0x10,0x00 = nc 0(1), 0(%r1) 0xd4,0x00,0x00,0x00,0xf0,0x00 = nc 0(1), 0(%r15) 0xd4,0x00,0x00,0x00,0x0f,0xff = nc 0(1), 4095 0xd4,0x00,0x00,0x00,0x1f,0xff = nc 0(1), 4095(%r1) 0xd4,0x00,0x00,0x00,0xff,0xff = nc 0(1), 4095(%r15) 0xd4,0x00,0x10,0x00,0x00,0x00 = nc 0(1,%r1), 0 0xd4,0x00,0xf0,0x00,0x00,0x00 = nc 0(1,%r15), 0 0xd4,0x00,0x1f,0xff,0x00,0x00 = nc 4095(1,%r1), 0 0xd4,0x00,0xff,0xff,0x00,0x00 = nc 4095(1,%r15), 0 0xd4,0xff,0x10,0x00,0x00,0x00 = nc 0(256,%r1), 0 0xd4,0xff,0xf0,0x00,0x00,0x00 = nc 0(256,%r15), 0 0xe3,0x00,0x00,0x00,0x80,0x80 = ng %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x80 = ng %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x80 = ng %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x80 = ng %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x80 = ng %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x80 = ng %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x80 = ng %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x80 = ng %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x80 = ng %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x80 = ng %r15, 0 0xb9,0x80,0x00,0x00 = ngr %r0, %r0 0xb9,0x80,0x00,0x0f = ngr %r0, %r15 0xb9,0x80,0x00,0xf0 = ngr %r15, %r0 0xb9,0x80,0x00,0x78 = ngr %r7, %r8 0x94,0x00,0x00,0x00 = ni 0, 0 0x94,0x00,0x0f,0xff = ni 4095, 0 0x94,0xff,0x00,0x00 = ni 0, 255 0x94,0x2a,0x10,0x00 = ni 0(%r1), 42 0x94,0x2a,0xf0,0x00 = ni 0(%r15), 42 0x94,0x2a,0x1f,0xff = ni 4095(%r1), 42 0x94,0x2a,0xff,0xff = ni 4095(%r15), 42 0xc0,0x0a,0x00,0x00,0x00,0x00 = nihf %r0, 0 0xc0,0x0a,0xff,0xff,0xff,0xff = nihf %r0, 4294967295 0xc0,0xfa,0x00,0x00,0x00,0x00 = nihf %r15, 0 0xa5,0x04,0x00,0x00 = nihh %r0, 0 0xa5,0x04,0x80,0x00 = nihh %r0, 32768 0xa5,0x04,0xff,0xff = nihh %r0, 65535 0xa5,0xf4,0x00,0x00 = nihh %r15, 0 0xa5,0x05,0x00,0x00 = nihl %r0, 0 0xa5,0x05,0x80,0x00 = nihl %r0, 32768 0xa5,0x05,0xff,0xff = nihl %r0, 65535 0xa5,0xf5,0x00,0x00 = nihl %r15, 0 0xc0,0x0b,0x00,0x00,0x00,0x00 = nilf %r0, 0 0xc0,0x0b,0xff,0xff,0xff,0xff = nilf %r0, 4294967295 0xc0,0xfb,0x00,0x00,0x00,0x00 = nilf %r15, 0 0xa5,0x06,0x00,0x00 = nilh %r0, 0 0xa5,0x06,0x80,0x00 = nilh %r0, 32768 0xa5,0x06,0xff,0xff = nilh %r0, 65535 0xa5,0xf6,0x00,0x00 = nilh %r15, 0 0xa5,0x07,0x00,0x00 = nill %r0, 0 0xa5,0x07,0x80,0x00 = nill %r0, 32768 0xa5,0x07,0xff,0xff = nill %r0, 65535 0xa5,0xf7,0x00,0x00 = nill %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x54 = niy -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x54 = niy -1, 0 0xeb,0x00,0x00,0x00,0x00,0x54 = niy 0, 0 0xeb,0x00,0x00,0x01,0x00,0x54 = niy 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x54 = niy 524287, 0 0xeb,0xff,0x00,0x00,0x00,0x54 = niy 0, 255 0xeb,0x2a,0x10,0x00,0x00,0x54 = niy 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x54 = niy 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x54 = niy 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x54 = niy 524287(%r15), 42 0x14,0x00 = nr %r0, %r0 0x14,0x0f = nr %r0, %r15 0x14,0xf0 = nr %r15, %r0 0x14,0x78 = nr %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x54 = ny %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x54 = ny %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x54 = ny %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x54 = ny %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x54 = ny %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x54 = ny %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x54 = ny %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x54 = ny %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x54 = ny %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x54 = ny %r15, 0 0x56,0x00,0x00,0x00 = o %r0, 0 0x56,0x00,0x0f,0xff = o %r0, 4095 0x56,0x00,0x10,0x00 = o %r0, 0(%r1) 0x56,0x00,0xf0,0x00 = o %r0, 0(%r15) 0x56,0x01,0xff,0xff = o %r0, 4095(%r1,%r15) 0x56,0x0f,0x1f,0xff = o %r0, 4095(%r15,%r1) 0x56,0xf0,0x00,0x00 = o %r15, 0 0xd6,0x00,0x00,0x00,0x00,0x00 = oc 0(1), 0 0xd6,0x00,0x00,0x00,0x10,0x00 = oc 0(1), 0(%r1) 0xd6,0x00,0x00,0x00,0xf0,0x00 = oc 0(1), 0(%r15) 0xd6,0x00,0x00,0x00,0x0f,0xff = oc 0(1), 4095 0xd6,0x00,0x00,0x00,0x1f,0xff = oc 0(1), 4095(%r1) 0xd6,0x00,0x00,0x00,0xff,0xff = oc 0(1), 4095(%r15) 0xd6,0x00,0x10,0x00,0x00,0x00 = oc 0(1,%r1), 0 0xd6,0x00,0xf0,0x00,0x00,0x00 = oc 0(1,%r15), 0 0xd6,0x00,0x1f,0xff,0x00,0x00 = oc 4095(1,%r1), 0 0xd6,0x00,0xff,0xff,0x00,0x00 = oc 4095(1,%r15), 0 0xd6,0xff,0x10,0x00,0x00,0x00 = oc 0(256,%r1), 0 0xd6,0xff,0xf0,0x00,0x00,0x00 = oc 0(256,%r15), 0 0xe3,0x00,0x00,0x00,0x80,0x81 = og %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x81 = og %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x81 = og %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x81 = og %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x81 = og %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x81 = og %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x81 = og %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x81 = og %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x81 = og %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x81 = og %r15, 0 0xb9,0x81,0x00,0x00 = ogr %r0, %r0 0xb9,0x81,0x00,0x0f = ogr %r0, %r15 0xb9,0x81,0x00,0xf0 = ogr %r15, %r0 0xb9,0x81,0x00,0x78 = ogr %r7, %r8 0x96,0x00,0x00,0x00 = oi 0, 0 0x96,0x00,0x0f,0xff = oi 4095, 0 0x96,0xff,0x00,0x00 = oi 0, 255 0x96,0x2a,0x10,0x00 = oi 0(%r1), 42 0x96,0x2a,0xf0,0x00 = oi 0(%r15), 42 0x96,0x2a,0x1f,0xff = oi 4095(%r1), 42 0x96,0x2a,0xff,0xff = oi 4095(%r15), 42 0xc0,0x0c,0x00,0x00,0x00,0x00 = oihf %r0, 0 0xc0,0x0c,0xff,0xff,0xff,0xff = oihf %r0, 4294967295 0xc0,0xfc,0x00,0x00,0x00,0x00 = oihf %r15, 0 0xa5,0x08,0x00,0x00 = oihh %r0, 0 0xa5,0x08,0x80,0x00 = oihh %r0, 32768 0xa5,0x08,0xff,0xff = oihh %r0, 65535 0xa5,0xf8,0x00,0x00 = oihh %r15, 0 0xa5,0x09,0x00,0x00 = oihl %r0, 0 0xa5,0x09,0x80,0x00 = oihl %r0, 32768 0xa5,0x09,0xff,0xff = oihl %r0, 65535 0xa5,0xf9,0x00,0x00 = oihl %r15, 0 0xc0,0x0d,0x00,0x00,0x00,0x00 = oilf %r0, 0 0xc0,0x0d,0xff,0xff,0xff,0xff = oilf %r0, 4294967295 0xc0,0xfd,0x00,0x00,0x00,0x00 = oilf %r15, 0 0xa5,0x0a,0x00,0x00 = oilh %r0, 0 0xa5,0x0a,0x80,0x00 = oilh %r0, 32768 0xa5,0x0a,0xff,0xff = oilh %r0, 65535 0xa5,0xfa,0x00,0x00 = oilh %r15, 0 0xa5,0x0b,0x00,0x00 = oill %r0, 0 0xa5,0x0b,0x80,0x00 = oill %r0, 32768 0xa5,0x0b,0xff,0xff = oill %r0, 65535 0xa5,0xfb,0x00,0x00 = oill %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x56 = oiy -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x56 = oiy -1, 0 0xeb,0x00,0x00,0x00,0x00,0x56 = oiy 0, 0 0xeb,0x00,0x00,0x01,0x00,0x56 = oiy 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x56 = oiy 524287, 0 0xeb,0xff,0x00,0x00,0x00,0x56 = oiy 0, 255 0xeb,0x2a,0x10,0x00,0x00,0x56 = oiy 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x56 = oiy 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x56 = oiy 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x56 = oiy 524287(%r15), 42 0x16,0x00 = or %r0, %r0 0x16,0x0f = or %r0, %r15 0x16,0xf0 = or %r15, %r0 0x16,0x78 = or %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x56 = oy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x56 = oy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x56 = oy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x56 = oy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x56 = oy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x56 = oy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x56 = oy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x56 = oy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x56 = oy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x56 = oy %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x36 = pfd 0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x36 = pfd 0, -1 0xe3,0x00,0x00,0x00,0x00,0x36 = pfd 0, 0 0xe3,0x00,0x00,0x01,0x00,0x36 = pfd 0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x36 = pfd 0, 524287 0xe3,0x00,0x10,0x00,0x00,0x36 = pfd 0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x36 = pfd 0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x36 = pfd 0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x36 = pfd 0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x36 = pfd 15, 0 0xec,0x00,0x00,0x00,0x00,0x55 = risbg %r0, %r0, 0, 0, 0 0xec,0x00,0x00,0x00,0x3f,0x55 = risbg %r0, %r0, 0, 0, 63 0xec,0x00,0x00,0xff,0x00,0x55 = risbg %r0, %r0, 0, 255, 0 0xec,0x00,0xff,0x00,0x00,0x55 = risbg %r0, %r0, 255, 0, 0 0xec,0x0f,0x00,0x00,0x00,0x55 = risbg %r0, %r15, 0, 0, 0 0xec,0xf0,0x00,0x00,0x00,0x55 = risbg %r15, %r0, 0, 0, 0 0xec,0x45,0x06,0x07,0x08,0x55 = risbg %r4, %r5, 6, 7, 8 0xec,0x00,0x00,0x00,0x00,0x54 = rnsbg %r0, %r0, 0, 0, 0 0xec,0x00,0x00,0x00,0x3f,0x54 = rnsbg %r0, %r0, 0, 0, 63 0xec,0x00,0x00,0xff,0x00,0x54 = rnsbg %r0, %r0, 0, 255, 0 0xec,0x00,0xff,0x00,0x00,0x54 = rnsbg %r0, %r0, 255, 0, 0 0xec,0x0f,0x00,0x00,0x00,0x54 = rnsbg %r0, %r15, 0, 0, 0 0xec,0xf0,0x00,0x00,0x00,0x54 = rnsbg %r15, %r0, 0, 0, 0 0xec,0x45,0x06,0x07,0x08,0x54 = rnsbg %r4, %r5, 6, 7, 8 0xec,0x00,0x00,0x00,0x00,0x56 = rosbg %r0, %r0, 0, 0, 0 0xec,0x00,0x00,0x00,0x3f,0x56 = rosbg %r0, %r0, 0, 0, 63 0xec,0x00,0x00,0xff,0x00,0x56 = rosbg %r0, %r0, 0, 255, 0 0xec,0x00,0xff,0x00,0x00,0x56 = rosbg %r0, %r0, 255, 0, 0 0xec,0x0f,0x00,0x00,0x00,0x56 = rosbg %r0, %r15, 0, 0, 0 0xec,0xf0,0x00,0x00,0x00,0x56 = rosbg %r15, %r0, 0, 0, 0 0xec,0x45,0x06,0x07,0x08,0x56 = rosbg %r4, %r5, 6, 7, 8 0xec,0x00,0x00,0x00,0x00,0x57 = rxsbg %r0, %r0, 0, 0, 0 0xec,0x00,0x00,0x00,0x3f,0x57 = rxsbg %r0, %r0, 0, 0, 63 0xec,0x00,0x00,0xff,0x00,0x57 = rxsbg %r0, %r0, 0, 255, 0 0xec,0x00,0xff,0x00,0x00,0x57 = rxsbg %r0, %r0, 255, 0, 0 0xec,0x0f,0x00,0x00,0x00,0x57 = rxsbg %r0, %r15, 0, 0, 0 0xec,0xf0,0x00,0x00,0x00,0x57 = rxsbg %r15, %r0, 0, 0, 0 0xec,0x45,0x06,0x07,0x08,0x57 = rxsbg %r4, %r5, 6, 7, 8 0xeb,0x00,0x00,0x00,0x00,0x1d = rll %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0x1d = rll %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0x1d = rll %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x1d = rll %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x1d = rll %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x1d = rll %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0x1d = rll %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x1d = rll %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x1d = rll %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x1d = rll %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x1d = rll %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x1d = rll %r0, %r0, 524287(%r15) 0xeb,0x00,0x00,0x00,0x00,0x1c = rllg %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0x1c = rllg %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0x1c = rllg %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x1c = rllg %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x1c = rllg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x1c = rllg %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0x1c = rllg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x1c = rllg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x1c = rllg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x1c = rllg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x1c = rllg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x1c = rllg %r0, %r0, 524287(%r15) 0x5b,0x00,0x00,0x00 = s %r0, 0 0x5b,0x00,0x0f,0xff = s %r0, 4095 0x5b,0x00,0x10,0x00 = s %r0, 0(%r1) 0x5b,0x00,0xf0,0x00 = s %r0, 0(%r15) 0x5b,0x01,0xff,0xff = s %r0, 4095(%r1,%r15) 0x5b,0x0f,0x1f,0xff = s %r0, 4095(%r15,%r1) 0x5b,0xf0,0x00,0x00 = s %r15, 0 0xed,0x00,0x00,0x00,0x00,0x1b = sdb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x1b = sdb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x1b = sdb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x1b = sdb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x1b = sdb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x1b = sdb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x1b = sdb %f15, 0 0xb3,0x1b,0x00,0x00 = sdbr %f0, %f0 0xb3,0x1b,0x00,0x0f = sdbr %f0, %f15 0xb3,0x1b,0x00,0x78 = sdbr %f7, %f8 0xb3,0x1b,0x00,0xf0 = sdbr %f15, %f0 0xed,0x00,0x00,0x00,0x00,0x0b = seb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x0b = seb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x0b = seb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x0b = seb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x0b = seb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x0b = seb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x0b = seb %f15, 0 0xb3,0x0b,0x00,0x00 = sebr %f0, %f0 0xb3,0x0b,0x00,0x0f = sebr %f0, %f15 0xb3,0x0b,0x00,0x78 = sebr %f7, %f8 0xb3,0x0b,0x00,0xf0 = sebr %f15, %f0 0xe3,0x00,0x00,0x00,0x80,0x09 = sg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x09 = sg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x09 = sg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x09 = sg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x09 = sg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x09 = sg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x09 = sg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x09 = sg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x09 = sg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x09 = sg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x19 = sgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x19 = sgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x19 = sgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x19 = sgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x19 = sgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x19 = sgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x19 = sgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x19 = sgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x19 = sgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x19 = sgf %r15, 0 0xb9,0x19,0x00,0x00 = sgfr %r0, %r0 0xb9,0x19,0x00,0x0f = sgfr %r0, %r15 0xb9,0x19,0x00,0xf0 = sgfr %r15, %r0 0xb9,0x19,0x00,0x78 = sgfr %r7, %r8 0xb9,0x09,0x00,0x00 = sgr %r0, %r0 0xb9,0x09,0x00,0x0f = sgr %r0, %r15 0xb9,0x09,0x00,0xf0 = sgr %r15, %r0 0xb9,0x09,0x00,0x78 = sgr %r7, %r8 0x4b,0x00,0x00,0x00 = sh %r0, 0 0x4b,0x00,0x0f,0xff = sh %r0, 4095 0x4b,0x00,0x10,0x00 = sh %r0, 0(%r1) 0x4b,0x00,0xf0,0x00 = sh %r0, 0(%r15) 0x4b,0x01,0xff,0xff = sh %r0, 4095(%r1,%r15) 0x4b,0x0f,0x1f,0xff = sh %r0, 4095(%r15,%r1) 0x4b,0xf0,0x00,0x00 = sh %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x7b = shy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x7b = shy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x7b = shy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x7b = shy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x7b = shy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x7b = shy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x7b = shy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x7b = shy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x7b = shy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x7b = shy %r15, 0 0x5f,0x00,0x00,0x00 = sl %r0, 0 0x5f,0x00,0x0f,0xff = sl %r0, 4095 0x5f,0x00,0x10,0x00 = sl %r0, 0(%r1) 0x5f,0x00,0xf0,0x00 = sl %r0, 0(%r15) 0x5f,0x01,0xff,0xff = sl %r0, 4095(%r1,%r15) 0x5f,0x0f,0x1f,0xff = sl %r0, 4095(%r15,%r1) 0x5f,0xf0,0x00,0x00 = sl %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x99 = slb %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x99 = slb %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x99 = slb %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x99 = slb %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x99 = slb %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x99 = slb %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x99 = slb %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x99 = slb %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x99 = slb %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x99 = slb %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x89 = slbg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x89 = slbg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x89 = slbg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x89 = slbg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x89 = slbg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x89 = slbg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x89 = slbg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x89 = slbg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x89 = slbg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x89 = slbg %r15, 0 0xb9,0x89,0x00,0x00 = slbgr %r0, %r0 0xb9,0x89,0x00,0x0f = slbgr %r0, %r15 0xb9,0x89,0x00,0xf0 = slbgr %r15, %r0 0xb9,0x89,0x00,0x78 = slbgr %r7, %r8 0xb9,0x99,0x00,0x00 = slbr %r0, %r0 0xb9,0x99,0x00,0x0f = slbr %r0, %r15 0xb9,0x99,0x00,0xf0 = slbr %r15, %r0 0xb9,0x99,0x00,0x78 = slbr %r7, %r8 0xc2,0x05,0x00,0x00,0x00,0x00 = slfi %r0, 0 0xc2,0x05,0xff,0xff,0xff,0xff = slfi %r0, 4294967295 0xc2,0xf5,0x00,0x00,0x00,0x00 = slfi %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x0b = slg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x0b = slg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x0b = slg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x0b = slg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x0b = slg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x0b = slg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x0b = slg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x0b = slg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x0b = slg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x0b = slg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x1b = slgf %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x1b = slgf %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x1b = slgf %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x1b = slgf %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x1b = slgf %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x1b = slgf %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x1b = slgf %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x1b = slgf %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x1b = slgf %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x1b = slgf %r15, 0 0xc2,0x04,0x00,0x00,0x00,0x00 = slgfi %r0, 0 0xc2,0x04,0xff,0xff,0xff,0xff = slgfi %r0, 4294967295 0xc2,0xf4,0x00,0x00,0x00,0x00 = slgfi %r15, 0 0xb9,0x1b,0x00,0x00 = slgfr %r0, %r0 0xb9,0x1b,0x00,0x0f = slgfr %r0, %r15 0xb9,0x1b,0x00,0xf0 = slgfr %r15, %r0 0xb9,0x1b,0x00,0x78 = slgfr %r7, %r8 0xb9,0x0b,0x00,0x00 = slgr %r0, %r0 0xb9,0x0b,0x00,0x0f = slgr %r0, %r15 0xb9,0x0b,0x00,0xf0 = slgr %r15, %r0 0xb9,0x0b,0x00,0x78 = slgr %r7, %r8 0x89,0x00,0x00,0x00 = sll %r0, 0 0x89,0x70,0x00,0x00 = sll %r7, 0 0x89,0xf0,0x00,0x00 = sll %r15, 0 0x89,0x00,0x0f,0xff = sll %r0, 4095 0x89,0x00,0x10,0x00 = sll %r0, 0(%r1) 0x89,0x00,0xf0,0x00 = sll %r0, 0(%r15) 0x89,0x00,0x1f,0xff = sll %r0, 4095(%r1) 0x89,0x00,0xff,0xff = sll %r0, 4095(%r15) 0xeb,0x00,0x00,0x00,0x00,0x0d = sllg %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0x0d = sllg %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0x0d = sllg %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x0d = sllg %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x0d = sllg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x0d = sllg %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0x0d = sllg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x0d = sllg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x0d = sllg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x0d = sllg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x0d = sllg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x0d = sllg %r0, %r0, 524287(%r15) 0x1f,0x00 = slr %r0, %r0 0x1f,0x0f = slr %r0, %r15 0x1f,0xf0 = slr %r15, %r0 0x1f,0x78 = slr %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x5f = sly %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x5f = sly %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x5f = sly %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x5f = sly %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x5f = sly %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x5f = sly %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x5f = sly %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x5f = sly %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x5f = sly %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x5f = sly %r15, 0 0xed,0x00,0x00,0x00,0x00,0x15 = sqdb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x15 = sqdb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x15 = sqdb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x15 = sqdb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x15 = sqdb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x15 = sqdb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x15 = sqdb %f15, 0 0xb3,0x15,0x00,0x00 = sqdbr %f0, %f0 0xb3,0x15,0x00,0x0f = sqdbr %f0, %f15 0xb3,0x15,0x00,0x78 = sqdbr %f7, %f8 0xb3,0x15,0x00,0xf0 = sqdbr %f15, %f0 0xed,0x00,0x00,0x00,0x00,0x14 = sqeb %f0, 0 0xed,0x00,0x0f,0xff,0x00,0x14 = sqeb %f0, 4095 0xed,0x00,0x10,0x00,0x00,0x14 = sqeb %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x14 = sqeb %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x00,0x14 = sqeb %f0, 4095(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x00,0x14 = sqeb %f0, 4095(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x14 = sqeb %f15, 0 0xb3,0x14,0x00,0x00 = sqebr %f0, %f0 0xb3,0x14,0x00,0x0f = sqebr %f0, %f15 0xb3,0x14,0x00,0x78 = sqebr %f7, %f8 0xb3,0x14,0x00,0xf0 = sqebr %f15, %f0 0xb3,0x16,0x00,0x00 = sqxbr %f0, %f0 0xb3,0x16,0x00,0x0d = sqxbr %f0, %f13 0xb3,0x16,0x00,0x88 = sqxbr %f8, %f8 0xb3,0x16,0x00,0xd0 = sqxbr %f13, %f0 0x1b,0x00 = sr %r0, %r0 0x1b,0x0f = sr %r0, %r15 0x1b,0xf0 = sr %r15, %r0 0x1b,0x78 = sr %r7, %r8 0x8a,0x00,0x00,0x00 = sra %r0, 0 0x8a,0x70,0x00,0x00 = sra %r7, 0 0x8a,0xf0,0x00,0x00 = sra %r15, 0 0x8a,0x00,0x0f,0xff = sra %r0, 4095 0x8a,0x00,0x10,0x00 = sra %r0, 0(%r1) 0x8a,0x00,0xf0,0x00 = sra %r0, 0(%r15) 0x8a,0x00,0x1f,0xff = sra %r0, 4095(%r1) 0x8a,0x00,0xff,0xff = sra %r0, 4095(%r15) 0xeb,0x00,0x00,0x00,0x00,0x0a = srag %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0x0a = srag %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0x0a = srag %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x0a = srag %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x0a = srag %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x0a = srag %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0x0a = srag %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x0a = srag %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x0a = srag %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x0a = srag %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x0a = srag %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x0a = srag %r0, %r0, 524287(%r15) 0x88,0x00,0x00,0x00 = srl %r0, 0 0x88,0x70,0x00,0x00 = srl %r7, 0 0x88,0xf0,0x00,0x00 = srl %r15, 0 0x88,0x00,0x0f,0xff = srl %r0, 4095 0x88,0x00,0x10,0x00 = srl %r0, 0(%r1) 0x88,0x00,0xf0,0x00 = srl %r0, 0(%r15) 0x88,0x00,0x1f,0xff = srl %r0, 4095(%r1) 0x88,0x00,0xff,0xff = srl %r0, 4095(%r15) 0xeb,0x00,0x00,0x00,0x00,0x0c = srlg %r0, %r0, 0 0xeb,0xf1,0x00,0x00,0x00,0x0c = srlg %r15, %r1, 0 0xeb,0x1f,0x00,0x00,0x00,0x0c = srlg %r1, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x0c = srlg %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x0c = srlg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x0c = srlg %r0, %r0, -1 0xeb,0x00,0x00,0x01,0x00,0x0c = srlg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x0c = srlg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x0c = srlg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x0c = srlg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x0c = srlg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x0c = srlg %r0, %r0, 524287(%r15) 0xb2,0x5e,0x00,0x00 = srst %r0, %r0 0xb2,0x5e,0x00,0x0f = srst %r0, %r15 0xb2,0x5e,0x00,0xf0 = srst %r15, %r0 0xb2,0x5e,0x00,0x78 = srst %r7, %r8 0x50,0x00,0x00,0x00 = st %r0, 0 0x50,0x00,0x0f,0xff = st %r0, 4095 0x50,0x00,0x10,0x00 = st %r0, 0(%r1) 0x50,0x00,0xf0,0x00 = st %r0, 0(%r15) 0x50,0x01,0xff,0xff = st %r0, 4095(%r1,%r15) 0x50,0x0f,0x1f,0xff = st %r0, 4095(%r15,%r1) 0x50,0xf0,0x00,0x00 = st %r15, 0 0x42,0x00,0x00,0x00 = stc %r0, 0 0x42,0x00,0x0f,0xff = stc %r0, 4095 0x42,0x00,0x10,0x00 = stc %r0, 0(%r1) 0x42,0x00,0xf0,0x00 = stc %r0, 0(%r15) 0x42,0x01,0xff,0xff = stc %r0, 4095(%r1,%r15) 0x42,0x0f,0x1f,0xff = stc %r0, 4095(%r15,%r1) 0x42,0xf0,0x00,0x00 = stc %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x72 = stcy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x72 = stcy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x72 = stcy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x72 = stcy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x72 = stcy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x72 = stcy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x72 = stcy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x72 = stcy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x72 = stcy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x72 = stcy %r15, 0 0x60,0x00,0x00,0x00 = std %f0, 0 0x60,0x00,0x0f,0xff = std %f0, 4095 0x60,0x00,0x10,0x00 = std %f0, 0(%r1) 0x60,0x00,0xf0,0x00 = std %f0, 0(%r15) 0x60,0x01,0xff,0xff = std %f0, 4095(%r1,%r15) 0x60,0x0f,0x1f,0xff = std %f0, 4095(%r15,%r1) 0x60,0xf0,0x00,0x00 = std %f15, 0 0xed,0x00,0x00,0x00,0x80,0x67 = stdy %f0, -524288 0xed,0x00,0x0f,0xff,0xff,0x67 = stdy %f0, -1 0xed,0x00,0x00,0x00,0x00,0x67 = stdy %f0, 0 0xed,0x00,0x00,0x01,0x00,0x67 = stdy %f0, 1 0xed,0x00,0x0f,0xff,0x7f,0x67 = stdy %f0, 524287 0xed,0x00,0x10,0x00,0x00,0x67 = stdy %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x67 = stdy %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x7f,0x67 = stdy %f0, 524287(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x7f,0x67 = stdy %f0, 524287(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x67 = stdy %f15, 0 0x70,0x00,0x00,0x00 = ste %f0, 0 0x70,0x00,0x0f,0xff = ste %f0, 4095 0x70,0x00,0x10,0x00 = ste %f0, 0(%r1) 0x70,0x00,0xf0,0x00 = ste %f0, 0(%r15) 0x70,0x01,0xff,0xff = ste %f0, 4095(%r1,%r15) 0x70,0x0f,0x1f,0xff = ste %f0, 4095(%r15,%r1) 0x70,0xf0,0x00,0x00 = ste %f15, 0 0xed,0x00,0x00,0x00,0x80,0x66 = stey %f0, -524288 0xed,0x00,0x0f,0xff,0xff,0x66 = stey %f0, -1 0xed,0x00,0x00,0x00,0x00,0x66 = stey %f0, 0 0xed,0x00,0x00,0x01,0x00,0x66 = stey %f0, 1 0xed,0x00,0x0f,0xff,0x7f,0x66 = stey %f0, 524287 0xed,0x00,0x10,0x00,0x00,0x66 = stey %f0, 0(%r1) 0xed,0x00,0xf0,0x00,0x00,0x66 = stey %f0, 0(%r15) 0xed,0x01,0xff,0xff,0x7f,0x66 = stey %f0, 524287(%r1,%r15) 0xed,0x0f,0x1f,0xff,0x7f,0x66 = stey %f0, 524287(%r15,%r1) 0xed,0xf0,0x00,0x00,0x00,0x66 = stey %f15, 0 0xe3,0x00,0x00,0x00,0x80,0x24 = stg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x24 = stg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x24 = stg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x24 = stg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x24 = stg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x24 = stg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x24 = stg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x24 = stg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x24 = stg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x24 = stg %r15, 0 0x40,0x00,0x00,0x00 = sth %r0, 0 0x40,0x00,0x0f,0xff = sth %r0, 4095 0x40,0x00,0x10,0x00 = sth %r0, 0(%r1) 0x40,0x00,0xf0,0x00 = sth %r0, 0(%r15) 0x40,0x01,0xff,0xff = sth %r0, 4095(%r1,%r15) 0x40,0x0f,0x1f,0xff = sth %r0, 4095(%r15,%r1) 0x40,0xf0,0x00,0x00 = sth %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x70 = sthy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x70 = sthy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x70 = sthy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x70 = sthy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x70 = sthy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x70 = sthy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x70 = sthy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x70 = sthy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x70 = sthy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x70 = sthy %r15, 0 0xeb,0x00,0x00,0x00,0x00,0x24 = stmg %r0, %r0, 0 0xeb,0x0f,0x00,0x00,0x00,0x24 = stmg %r0, %r15, 0 0xeb,0xef,0x00,0x00,0x00,0x24 = stmg %r14, %r15, 0 0xeb,0xff,0x00,0x00,0x00,0x24 = stmg %r15, %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x24 = stmg %r0, %r0, -524288 0xeb,0x00,0x0f,0xff,0xff,0x24 = stmg %r0, %r0, -1 0xeb,0x00,0x00,0x00,0x00,0x24 = stmg %r0, %r0, 0 0xeb,0x00,0x00,0x01,0x00,0x24 = stmg %r0, %r0, 1 0xeb,0x00,0x0f,0xff,0x7f,0x24 = stmg %r0, %r0, 524287 0xeb,0x00,0x10,0x00,0x00,0x24 = stmg %r0, %r0, 0(%r1) 0xeb,0x00,0xf0,0x00,0x00,0x24 = stmg %r0, %r0, 0(%r15) 0xeb,0x00,0x1f,0xff,0x7f,0x24 = stmg %r0, %r0, 524287(%r1) 0xeb,0x00,0xff,0xff,0x7f,0x24 = stmg %r0, %r0, 524287(%r15) 0xe3,0x00,0x00,0x00,0x80,0x3e = strv %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x3e = strv %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x3e = strv %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x3e = strv %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x3e = strv %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x3e = strv %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x3e = strv %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x3e = strv %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x3e = strv %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x3e = strv %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x2f = strvg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x2f = strvg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x2f = strvg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x2f = strvg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x2f = strvg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x2f = strvg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x2f = strvg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x2f = strvg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x2f = strvg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x2f = strvg %r15, 0 0xe3,0x00,0x00,0x00,0x80,0x50 = sty %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x50 = sty %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x50 = sty %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x50 = sty %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x50 = sty %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x50 = sty %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x50 = sty %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x50 = sty %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x50 = sty %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x50 = sty %r15, 0 0xb3,0x4b,0x00,0x00 = sxbr %f0, %f0 0xb3,0x4b,0x00,0x0d = sxbr %f0, %f13 0xb3,0x4b,0x00,0x88 = sxbr %f8, %f8 0xb3,0x4b,0x00,0xd0 = sxbr %f13, %f0 0xe3,0x00,0x00,0x00,0x80,0x5b = sy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x5b = sy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x5b = sy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x5b = sy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x5b = sy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x5b = sy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x5b = sy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x5b = sy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x5b = sy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x5b = sy %r15, 0 0x91,0x00,0x00,0x00 = tm 0, 0 0x91,0x00,0x0f,0xff = tm 4095, 0 0x91,0xff,0x00,0x00 = tm 0, 255 0x91,0x2a,0x10,0x00 = tm 0(%r1), 42 0x91,0x2a,0xf0,0x00 = tm 0(%r15), 42 0x91,0x2a,0x1f,0xff = tm 4095(%r1), 42 0x91,0x2a,0xff,0xff = tm 4095(%r15), 42 0xa7,0x02,0x00,0x00 = tmhh %r0, 0 0xa7,0x02,0x80,0x00 = tmhh %r0, 32768 0xa7,0x02,0xff,0xff = tmhh %r0, 65535 0xa7,0xf2,0x00,0x00 = tmhh %r15, 0 0xa7,0x03,0x00,0x00 = tmhl %r0, 0 0xa7,0x03,0x80,0x00 = tmhl %r0, 32768 0xa7,0x03,0xff,0xff = tmhl %r0, 65535 0xa7,0xf3,0x00,0x00 = tmhl %r15, 0 0xa7,0x00,0x00,0x00 = tmlh %r0, 0 0xa7,0x00,0x80,0x00 = tmlh %r0, 32768 0xa7,0x00,0xff,0xff = tmlh %r0, 65535 0xa7,0xf0,0x00,0x00 = tmlh %r15, 0 0xa7,0x01,0x00,0x00 = tmll %r0, 0 0xa7,0x01,0x80,0x00 = tmll %r0, 32768 0xa7,0x01,0xff,0xff = tmll %r0, 65535 0xa7,0xf1,0x00,0x00 = tmll %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x51 = tmy -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x51 = tmy -1, 0 0xeb,0x00,0x00,0x00,0x00,0x51 = tmy 0, 0 0xeb,0x00,0x00,0x01,0x00,0x51 = tmy 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x51 = tmy 524287, 0 0xeb,0xff,0x00,0x00,0x00,0x51 = tmy 0, 255 0xeb,0x2a,0x10,0x00,0x00,0x51 = tmy 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x51 = tmy 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x51 = tmy 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x51 = tmy 524287(%r15), 42 0x57,0x00,0x00,0x00 = x %r0, 0 0x57,0x00,0x0f,0xff = x %r0, 4095 0x57,0x00,0x10,0x00 = x %r0, 0(%r1) 0x57,0x00,0xf0,0x00 = x %r0, 0(%r15) 0x57,0x01,0xff,0xff = x %r0, 4095(%r1,%r15) 0x57,0x0f,0x1f,0xff = x %r0, 4095(%r15,%r1) 0x57,0xf0,0x00,0x00 = x %r15, 0 0xd7,0x00,0x00,0x00,0x00,0x00 = xc 0(1), 0 0xd7,0x00,0x00,0x00,0x10,0x00 = xc 0(1), 0(%r1) 0xd7,0x00,0x00,0x00,0xf0,0x00 = xc 0(1), 0(%r15) 0xd7,0x00,0x00,0x00,0x0f,0xff = xc 0(1), 4095 0xd7,0x00,0x00,0x00,0x1f,0xff = xc 0(1), 4095(%r1) 0xd7,0x00,0x00,0x00,0xff,0xff = xc 0(1), 4095(%r15) 0xd7,0x00,0x10,0x00,0x00,0x00 = xc 0(1,%r1), 0 0xd7,0x00,0xf0,0x00,0x00,0x00 = xc 0(1,%r15), 0 0xd7,0x00,0x1f,0xff,0x00,0x00 = xc 4095(1,%r1), 0 0xd7,0x00,0xff,0xff,0x00,0x00 = xc 4095(1,%r15), 0 0xd7,0xff,0x10,0x00,0x00,0x00 = xc 0(256,%r1), 0 0xd7,0xff,0xf0,0x00,0x00,0x00 = xc 0(256,%r15), 0 0xe3,0x00,0x00,0x00,0x80,0x82 = xg %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x82 = xg %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x82 = xg %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x82 = xg %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x82 = xg %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x82 = xg %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x82 = xg %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x82 = xg %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x82 = xg %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x82 = xg %r15, 0 0xb9,0x82,0x00,0x00 = xgr %r0, %r0 0xb9,0x82,0x00,0x0f = xgr %r0, %r15 0xb9,0x82,0x00,0xf0 = xgr %r15, %r0 0xb9,0x82,0x00,0x78 = xgr %r7, %r8 0x97,0x00,0x00,0x00 = xi 0, 0 0x97,0x00,0x0f,0xff = xi 4095, 0 0x97,0xff,0x00,0x00 = xi 0, 255 0x97,0x2a,0x10,0x00 = xi 0(%r1), 42 0x97,0x2a,0xf0,0x00 = xi 0(%r15), 42 0x97,0x2a,0x1f,0xff = xi 4095(%r1), 42 0x97,0x2a,0xff,0xff = xi 4095(%r15), 42 0xc0,0x06,0x00,0x00,0x00,0x00 = xihf %r0, 0 0xc0,0x06,0xff,0xff,0xff,0xff = xihf %r0, 4294967295 0xc0,0xf6,0x00,0x00,0x00,0x00 = xihf %r15, 0 0xc0,0x07,0x00,0x00,0x00,0x00 = xilf %r0, 0 0xc0,0x07,0xff,0xff,0xff,0xff = xilf %r0, 4294967295 0xc0,0xf7,0x00,0x00,0x00,0x00 = xilf %r15, 0 0xeb,0x00,0x00,0x00,0x80,0x57 = xiy -524288, 0 0xeb,0x00,0x0f,0xff,0xff,0x57 = xiy -1, 0 0xeb,0x00,0x00,0x00,0x00,0x57 = xiy 0, 0 0xeb,0x00,0x00,0x01,0x00,0x57 = xiy 1, 0 0xeb,0x00,0x0f,0xff,0x7f,0x57 = xiy 524287, 0 0xeb,0xff,0x00,0x00,0x00,0x57 = xiy 0, 255 0xeb,0x2a,0x10,0x00,0x00,0x57 = xiy 0(%r1), 42 0xeb,0x2a,0xf0,0x00,0x00,0x57 = xiy 0(%r15), 42 0xeb,0x2a,0x1f,0xff,0x7f,0x57 = xiy 524287(%r1), 42 0xeb,0x2a,0xff,0xff,0x7f,0x57 = xiy 524287(%r15), 42 0x17,0x00 = xr %r0, %r0 0x17,0x0f = xr %r0, %r15 0x17,0xf0 = xr %r15, %r0 0x17,0x78 = xr %r7, %r8 0xe3,0x00,0x00,0x00,0x80,0x57 = xy %r0, -524288 0xe3,0x00,0x0f,0xff,0xff,0x57 = xy %r0, -1 0xe3,0x00,0x00,0x00,0x00,0x57 = xy %r0, 0 0xe3,0x00,0x00,0x01,0x00,0x57 = xy %r0, 1 0xe3,0x00,0x0f,0xff,0x7f,0x57 = xy %r0, 524287 0xe3,0x00,0x10,0x00,0x00,0x57 = xy %r0, 0(%r1) 0xe3,0x00,0xf0,0x00,0x00,0x57 = xy %r0, 0(%r15) 0xe3,0x01,0xff,0xff,0x7f,0x57 = xy %r0, 524287(%r1,%r15) 0xe3,0x0f,0x1f,0xff,0x7f,0x57 = xy %r0, 524287(%r15,%r1) 0xe3,0xf0,0x00,0x00,0x00,0x57 = xy %r15, 0 capstone-sys-0.11.0/capstone/suite/MC/SystemZ/regs-good.s.cs010066400017500001750000000025011363402546700220140ustar0000000000000000# CS_ARCH_SYSZ, 0, None 0x18,0x01 = lr %r0, %r1 0x18,0x23 = lr %r2, %r3 0x18,0x45 = lr %r4, %r5 0x18,0x67 = lr %r6, %r7 0x18,0x89 = lr %r8, %r9 0x18,0xab = lr %r10, %r11 0x18,0xcd = lr %r12, %r13 0x18,0xef = lr %r14, %r15 0xb9,0x04,0x00,0x01 = lgr %r0, %r1 0xb9,0x04,0x00,0x23 = lgr %r2, %r3 0xb9,0x04,0x00,0x45 = lgr %r4, %r5 0xb9,0x04,0x00,0x67 = lgr %r6, %r7 0xb9,0x04,0x00,0x89 = lgr %r8, %r9 0xb9,0x04,0x00,0xab = lgr %r10, %r11 0xb9,0x04,0x00,0xcd = lgr %r12, %r13 0xb9,0x04,0x00,0xef = lgr %r14, %r15 0xb9,0x97,0x00,0x00 = dlr %r0, %r0 0xb9,0x97,0x00,0x20 = dlr %r2, %r0 0xb9,0x97,0x00,0x40 = dlr %r4, %r0 0xb9,0x97,0x00,0x60 = dlr %r6, %r0 0xb9,0x97,0x00,0x80 = dlr %r8, %r0 0xb9,0x97,0x00,0xa0 = dlr %r10, %r0 0xb9,0x97,0x00,0xc0 = dlr %r12, %r0 0xb9,0x97,0x00,0xe0 = dlr %r14, %r0 0x38,0x01 = ler %f0, %f1 0x38,0x23 = ler %f2, %f3 0x38,0x45 = ler %f4, %f5 0x38,0x67 = ler %f6, %f7 0x38,0x89 = ler %f8, %f9 0x38,0xab = ler %f10, %f11 0x38,0xcd = ler %f12, %f13 0x38,0xef = ler %f14, %f15 0x28,0x01 = ldr %f0, %f1 0x28,0x23 = ldr %f2, %f3 0x28,0x45 = ldr %f4, %f5 0x28,0x67 = ldr %f6, %f7 0x28,0x89 = ldr %f8, %f9 0x28,0xab = ldr %f10, %f11 0x28,0xcd = ldr %f12, %f13 0x28,0xef = ldr %f14, %f15 0xb3,0x65,0x00,0x01 = lxr %f0, %f1 0xb3,0x65,0x00,0x45 = lxr %f4, %f5 0xb3,0x65,0x00,0x89 = lxr %f8, %f9 0xb3,0x65,0x00,0xcd = lxr %f12, %f13 capstone-sys-0.11.0/capstone/suite/MC/X86/3DNow.s.cs010066400017500001750000000022411363402546700200300ustar0000000000000000# CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_ATT 0x0f,0x0f,0xca,0xbf = pavgusb %mm2, %mm1 0x67,0x0f,0x0f,0x5c,0x16,0x09,0xbf = pavgusb 9(%esi,%edx), %mm3 0x0f,0x0f,0xca,0x1d = pf2id %mm2, %mm1 0x67,0x0f,0x0f,0x5c,0x16,0x09,0x1d = pf2id 9(%esi,%edx), %mm3 0x0f,0x0f,0xca,0xae = pfacc %mm2, %mm1 0x0f,0x0f,0xca,0x9e = pfadd %mm2, %mm1 0x0f,0x0f,0xca,0xb0 = pfcmpeq %mm2, %mm1 0x0f,0x0f,0xca,0x90 = pfcmpge %mm2, %mm1 0x0f,0x0f,0xca,0xa0 = pfcmpgt %mm2, %mm1 0x0f,0x0f,0xca,0xa4 = pfmax %mm2, %mm1 0x0f,0x0f,0xca,0x94 = pfmin %mm2, %mm1 0x0f,0x0f,0xca,0xb4 = pfmul %mm2, %mm1 0x0f,0x0f,0xca,0x96 = pfrcp %mm2, %mm1 0x0f,0x0f,0xca,0xa6 = pfrcpit1 %mm2, %mm1 0x0f,0x0f,0xca,0xb6 = pfrcpit2 %mm2, %mm1 0x0f,0x0f,0xca,0xa7 = pfrsqit1 %mm2, %mm1 0x0f,0x0f,0xca,0x97 = pfrsqrt %mm2, %mm1 0x0f,0x0f,0xca,0x9a = pfsub %mm2, %mm1 0x0f,0x0f,0xca,0xaa = pfsubr %mm2, %mm1 0x0f,0x0f,0xca,0x0d = pi2fd %mm2, %mm1 0x0f,0x0f,0xca,0xb7 = pmulhrw %mm2, %mm1 0x0f,0x0e = femms 0x0f,0x0d,0x00 = prefetch (%eax) 0x0f,0x0f,0xca,0x1c = pf2iw %mm2, %mm1 0x0f,0x0f,0xca,0x0c = pi2fw %mm2, %mm1 0x0f,0x0f,0xca,0x8a = pfnacc %mm2, %mm1 0x0f,0x0f,0xca,0x8e = pfpnacc %mm2, %mm1 0x0f,0x0f,0xca,0xbb = pswapd %mm2, %mm1 capstone-sys-0.11.0/capstone/suite/MC/X86/address-size.s.cs010066400017500001750000000003021363402546700214670ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x67,0xc6,0x06,0x00 = movb $0x0, (%esi) 0xc6,0x06,0x00 = movb $0x0, (%rsi) 0x67,0xc6,0x06,0x00 = movb $0x0, (%si) 0xc6,0x06,0x00 = movb $0x0, (%esi) capstone-sys-0.11.0/capstone/suite/MC/X86/avx512-encodings.s.cs010066400017500001750000000015141363402546700220750ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x62,0xa3,0x55,0x48,0x38,0xcd,0x01 = vinserti32x4 $1, %xmm21, %zmm5, %zmm17 0x62,0xe3,0x1d,0x40,0x38,0x4f,0x10,0x01 = vinserti32x4 $1, 256(%rdi), %zmm28, %zmm17 0x62,0x33,0x7d,0x48,0x39,0xc9,0x01 = vextracti32x4 $1, %zmm9, %xmm17 0x62,0x33,0xfd,0x48,0x3b,0xc9,0x01 = vextracti64x4 $1, %zmm9, %ymm17 0x62,0x73,0xfd,0x48,0x3b,0x4f,0x10,0x01 = vextracti64x4 $1, %zmm9, 512(%rdi) 0x62,0xb1,0x35,0x40,0x72,0xe1,0x02 = vpsrad $2, %zmm17, %zmm25 0x62,0xf1,0x35,0x40,0x72,0x64,0xb7,0x08,0x02 = vpsrad $2, 512(%rdi, %rsi, 4), %zmm25 0x62,0x21,0x1d,0x48,0xe2,0xc9 = vpsrad %xmm17, %zmm12, %zmm25 0x62,0x61,0x1d,0x48,0xe2,0x4c,0xb7,0x20 = vpsrad 512(%rdi, %rsi, 4), %zmm12, %zmm25 0x62,0xf2,0x7d,0xc9,0x58,0xc8 = vpbroadcastd %xmm0, %zmm1 {%k1} {z} 0x62,0xf1,0xfe,0x4b,0x6f,0xc8 = vmovdqu64 %zmm0, %zmm1 {%k3} capstone-sys-0.11.0/capstone/suite/MC/X86/intel-syntax-encoding.s.cs010066400017500001750000000017241363402546700233260ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, None 0x66,0x83,0xf0,0x0c = xor ax, 12 0x83,0xf0,0x0c = xor eax, 12 0x48,0x83,0xf0,0x0c = xor rax, 12 0x66,0x83,0xc8,0x0c = or ax, 12 0x83,0xc8,0x0c = or eax, 12 0x48,0x83,0xc8,0x0c = or rax, 12 0x66,0x83,0xf8,0x0c = cmp ax, 12 0x83,0xf8,0x0c = cmp eax, 12 0x48,0x83,0xf8,0x0c = cmp rax, 12 0x48,0x89,0x44,0x24,0xf0 = mov QWORD PTR [RSP - 16], RAX 0x66,0x83,0xc0,0xf4 = add ax, -12 0x83,0xc0,0xf4 = add eax, -12 0x48,0x83,0xc0,0xf4 = add rax, -12 0x66,0x83,0xd0,0xf4 = adc ax, -12 0x83,0xd0,0xf4 = adc eax, -12 0x48,0x83,0xd0,0xf4 = adc rax, -12 0x66,0x83,0xd8,0xf4 = sbb ax, -12 0x83,0xd8,0xf4 = sbb eax, -12 0x48,0x83,0xd8,0xf4 = sbb rax, -12 0x66,0x83,0xf8,0xf4 = cmp ax, -12 0x83,0xf8,0xf4 = cmp eax, -12 0x48,0x83,0xf8,0xf4 = cmp rax, -12 0xf2,0x0f,0x10,0x2c,0x25,0xf8,0xff,0xff,0xff = movsd XMM5, QWORD PTR [-8] 0xd1,0xe7 = shl EDI, 1 0x0f,0xc2,0xd1,0x01 = cmpltps XMM2, XMM1 0xc3 = ret 0xcb = retf 0xc2,0x08,0x00 = ret 8 0xca,0x08,0x00 = retf 8 capstone-sys-0.11.0/capstone/suite/MC/X86/x86-32-avx.s.cs010066400017500001750000001323261363402546700205510ustar0000000000000000# CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_ATT 0xc5,0xca,0x58,0xd4 = vaddss %xmm4, %xmm6, %xmm2 0xc5,0xca,0x59,0xd4 = vmulss %xmm4, %xmm6, %xmm2 0xc5,0xca,0x5c,0xd4 = vsubss %xmm4, %xmm6, %xmm2 0xc5,0xca,0x5e,0xd4 = vdivss %xmm4, %xmm6, %xmm2 0xc5,0xcb,0x58,0xd4 = vaddsd %xmm4, %xmm6, %xmm2 0xc5,0xcb,0x59,0xd4 = vmulsd %xmm4, %xmm6, %xmm2 0xc5,0xcb,0x5c,0xd4 = vsubsd %xmm4, %xmm6, %xmm2 0xc5,0xcb,0x5e,0xd4 = vdivsd %xmm4, %xmm6, %xmm2 0xc5,0xea,0x58,0xac,0xcb,0xef,0xbe,0xad,0xde = vaddss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xea,0x5c,0xac,0xcb,0xef,0xbe,0xad,0xde = vsubss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xea,0x59,0xac,0xcb,0xef,0xbe,0xad,0xde = vmulss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xea,0x5e,0xac,0xcb,0xef,0xbe,0xad,0xde = vdivss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xeb,0x58,0xac,0xcb,0xef,0xbe,0xad,0xde = vaddsd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xeb,0x5c,0xac,0xcb,0xef,0xbe,0xad,0xde = vsubsd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xeb,0x59,0xac,0xcb,0xef,0xbe,0xad,0xde = vmulsd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xeb,0x5e,0xac,0xcb,0xef,0xbe,0xad,0xde = vdivsd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xc8,0x58,0xd4 = vaddps %xmm4, %xmm6, %xmm2 0xc5,0xc8,0x5c,0xd4 = vsubps %xmm4, %xmm6, %xmm2 0xc5,0xc8,0x59,0xd4 = vmulps %xmm4, %xmm6, %xmm2 0xc5,0xc8,0x5e,0xd4 = vdivps %xmm4, %xmm6, %xmm2 0xc5,0xc9,0x58,0xd4 = vaddpd %xmm4, %xmm6, %xmm2 0xc5,0xc9,0x5c,0xd4 = vsubpd %xmm4, %xmm6, %xmm2 0xc5,0xc9,0x59,0xd4 = vmulpd %xmm4, %xmm6, %xmm2 0xc5,0xc9,0x5e,0xd4 = vdivpd %xmm4, %xmm6, %xmm2 0xc5,0xe8,0x58,0xac,0xcb,0xef,0xbe,0xad,0xde = vaddps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe8,0x5c,0xac,0xcb,0xef,0xbe,0xad,0xde = vsubps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe8,0x59,0xac,0xcb,0xef,0xbe,0xad,0xde = vmulps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe8,0x5e,0xac,0xcb,0xef,0xbe,0xad,0xde = vdivps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x58,0xac,0xcb,0xef,0xbe,0xad,0xde = vaddpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x5c,0xac,0xcb,0xef,0xbe,0xad,0xde = vsubpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x59,0xac,0xcb,0xef,0xbe,0xad,0xde = vmulpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x5e,0xac,0xcb,0xef,0xbe,0xad,0xde = vdivpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xda,0x5f,0xf2 = vmaxss %xmm2, %xmm4, %xmm6 0xc5,0xdb,0x5f,0xf2 = vmaxsd %xmm2, %xmm4, %xmm6 0xc5,0xda,0x5d,0xf2 = vminss %xmm2, %xmm4, %xmm6 0xc5,0xdb,0x5d,0xf2 = vminsd %xmm2, %xmm4, %xmm6 0xc5,0xea,0x5f,0x6c,0xcb,0xfc = vmaxss -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xeb,0x5f,0x6c,0xcb,0xfc = vmaxsd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xea,0x5d,0x6c,0xcb,0xfc = vminss -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xeb,0x5d,0x6c,0xcb,0xfc = vminsd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xd8,0x5f,0xf2 = vmaxps %xmm2, %xmm4, %xmm6 0xc5,0xd9,0x5f,0xf2 = vmaxpd %xmm2, %xmm4, %xmm6 0xc5,0xd8,0x5d,0xf2 = vminps %xmm2, %xmm4, %xmm6 0xc5,0xd9,0x5d,0xf2 = vminpd %xmm2, %xmm4, %xmm6 0xc5,0xe8,0x5f,0x6c,0xcb,0xfc = vmaxps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x5f,0x6c,0xcb,0xfc = vmaxpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe8,0x5d,0x6c,0xcb,0xfc = vminps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x5d,0x6c,0xcb,0xfc = vminpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xd8,0x54,0xf2 = vandps %xmm2, %xmm4, %xmm6 0xc5,0xd9,0x54,0xf2 = vandpd %xmm2, %xmm4, %xmm6 0xc5,0xe8,0x54,0x6c,0xcb,0xfc = vandps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x54,0x6c,0xcb,0xfc = vandpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xd8,0x56,0xf2 = vorps %xmm2, %xmm4, %xmm6 0xc5,0xd9,0x56,0xf2 = vorpd %xmm2, %xmm4, %xmm6 0xc5,0xe8,0x56,0x6c,0xcb,0xfc = vorps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x56,0x6c,0xcb,0xfc = vorpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xd8,0x57,0xf2 = vxorps %xmm2, %xmm4, %xmm6 0xc5,0xd9,0x57,0xf2 = vxorpd %xmm2, %xmm4, %xmm6 0xc5,0xe8,0x57,0x6c,0xcb,0xfc = vxorps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x57,0x6c,0xcb,0xfc = vxorpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xd8,0x55,0xf2 = vandnps %xmm2, %xmm4, %xmm6 0xc5,0xd9,0x55,0xf2 = vandnpd %xmm2, %xmm4, %xmm6 0xc5,0xe8,0x55,0x6c,0xcb,0xfc = vandnps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x55,0x6c,0xcb,0xfc = vandnpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xfa,0x10,0x6c,0xcb,0xfc = vmovss -4(%ebx,%ecx,8), %xmm5 0xc5,0xea,0x10,0xec = vmovss %xmm4, %xmm2, %xmm5 0xc5,0xfb,0x10,0x6c,0xcb,0xfc = vmovsd -4(%ebx,%ecx,8), %xmm5 0xc5,0xeb,0x10,0xec = vmovsd %xmm4, %xmm2, %xmm5 0xc5,0xe8,0x15,0xe1 = vunpckhps %xmm1, %xmm2, %xmm4 0xc5,0xe9,0x15,0xe1 = vunpckhpd %xmm1, %xmm2, %xmm4 0xc5,0xe8,0x14,0xe1 = vunpcklps %xmm1, %xmm2, %xmm4 0xc5,0xe9,0x14,0xe1 = vunpcklpd %xmm1, %xmm2, %xmm4 0xc5,0xe8,0x15,0x6c,0xcb,0xfc = vunpckhps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x15,0x6c,0xcb,0xfc = vunpckhpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe8,0x14,0x6c,0xcb,0xfc = vunpcklps -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xe9,0x14,0x6c,0xcb,0xfc = vunpcklpd -4(%ebx,%ecx,8), %xmm2, %xmm5 0xc5,0xc8,0xc2,0xc8,0x00 = vcmpps $0, %xmm0, %xmm6, %xmm1 0xc5,0xc8,0xc2,0x08,0x00 = vcmpps $0, (%eax), %xmm6, %xmm1 0xc5,0xc8,0xc2,0xc8,0x07 = vcmpps $7, %xmm0, %xmm6, %xmm1 0xc5,0xc9,0xc2,0xc8,0x00 = vcmppd $0, %xmm0, %xmm6, %xmm1 0xc5,0xc9,0xc2,0x08,0x00 = vcmppd $0, (%eax), %xmm6, %xmm1 0xc5,0xc9,0xc2,0xc8,0x07 = vcmppd $7, %xmm0, %xmm6, %xmm1 0xc5,0xe8,0xc6,0xd9,0x08 = vshufps $8, %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc6,0x5c,0xcb,0xfc,0x08 = vshufps $8, -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc6,0xd9,0x08 = vshufpd $8, %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc6,0x5c,0xcb,0xfc,0x08 = vshufpd $8, -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x00 = vcmpeqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x02 = vcmpleps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x01 = vcmpltps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x04 = vcmpneqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x06 = vcmpnleps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x05 = vcmpnltps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x07 = vcmpordps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x03 = vcmpunordps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x00 = vcmpeqps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x02 = vcmpleps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x01 = vcmpltps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x04 = vcmpneqps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x06 = vcmpnleps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x05 = vcmpnltps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordps -4(%ebx,%ecx,8), %xmm6, %xmm2 0xc5,0xe8,0xc2,0x5c,0xcb,0xfc,0x03 = vcmpunordps -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x00 = vcmpeqpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x02 = vcmplepd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x01 = vcmpltpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x04 = vcmpneqpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x06 = vcmpnlepd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x05 = vcmpnltpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x07 = vcmpordpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0xd9,0x03 = vcmpunordpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x00 = vcmpeqpd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x02 = vcmplepd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x01 = vcmpltpd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x04 = vcmpneqpd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x06 = vcmpnlepd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x05 = vcmpnltpd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordpd -4(%ebx,%ecx,8), %xmm6, %xmm2 0xc5,0xe9,0xc2,0x5c,0xcb,0xfc,0x03 = vcmpunordpd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xf8,0x50,0xc2 = vmovmskps %xmm2, %eax 0xc5,0xf9,0x50,0xc2 = vmovmskpd %xmm2, %eax 0xc5,0xfc,0x50,0xc2 = vmovmskps %ymm2, %eax 0xc5,0xfd,0x50,0xc2 = vmovmskpd %ymm2, %eax 0xc5,0xea,0xc2,0xd9,0x00 = vcmpeqss %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x02 = vcmpless %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x01 = vcmpltss %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x04 = vcmpneqss %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x06 = vcmpnless %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x05 = vcmpnltss %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x07 = vcmpordss %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0xd9,0x03 = vcmpunordss %xmm1, %xmm2, %xmm3 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x00 = vcmpeqss -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x02 = vcmpless -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x01 = vcmpltss -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x04 = vcmpneqss -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x06 = vcmpnless -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x05 = vcmpnltss -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordss -4(%ebx,%ecx,8), %xmm6, %xmm2 0xc5,0xea,0xc2,0x5c,0xcb,0xfc,0x03 = vcmpunordss -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x00 = vcmpeqsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x02 = vcmplesd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x01 = vcmpltsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x04 = vcmpneqsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x06 = vcmpnlesd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x05 = vcmpnltsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x07 = vcmpordsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0xd9,0x03 = vcmpunordsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x00 = vcmpeqsd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x02 = vcmplesd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x01 = vcmpltsd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x04 = vcmpneqsd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x06 = vcmpnlesd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x05 = vcmpnltsd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordsd -4(%ebx,%ecx,8), %xmm6, %xmm2 0xc5,0xeb,0xc2,0x5c,0xcb,0xfc,0x03 = vcmpunordsd -4(%ebx,%ecx,8), %xmm2, %xmm3 0xc5,0xf8,0x2e,0xd1 = vucomiss %xmm1, %xmm2 0xc5,0xf8,0x2e,0x10 = vucomiss (%eax), %xmm2 0xc5,0xf8,0x2f,0xd1 = vcomiss %xmm1, %xmm2 0xc5,0xf8,0x2f,0x10 = vcomiss (%eax), %xmm2 0xc5,0xf9,0x2e,0xd1 = vucomisd %xmm1, %xmm2 0xc5,0xf9,0x2e,0x10 = vucomisd (%eax), %xmm2 0xc5,0xf9,0x2f,0xd1 = vcomisd %xmm1, %xmm2 0xc5,0xf9,0x2f,0x10 = vcomisd (%eax), %xmm2 0xc5,0xfa,0x2c,0xc1 = vcvttss2si %xmm1, %eax 0xc5,0xfa,0x2c,0x01 = vcvttss2si (%ecx), %eax 0xc5,0xf2,0x2a,0x10 = vcvtsi2ss (%eax), %xmm1, %xmm2 0xc5,0xf2,0x2a,0x10 = vcvtsi2ss (%eax), %xmm1, %xmm2 0xc5,0xf2,0x2a,0x10 = vcvtsi2ssl (%eax), %xmm1, %xmm2 0xc5,0xf2,0x2a,0x10 = vcvtsi2ssl (%eax), %xmm1, %xmm2 0xc5,0xfb,0x2c,0xc1 = vcvttsd2si %xmm1, %eax 0xc5,0xfb,0x2c,0x01 = vcvttsd2si (%ecx), %eax 0xc5,0xf3,0x2a,0x10 = vcvtsi2sd (%eax), %xmm1, %xmm2 0xc5,0xf3,0x2a,0x10 = vcvtsi2sd (%eax), %xmm1, %xmm2 0xc5,0xf3,0x2a,0x10 = vcvtsi2sdl (%eax), %xmm1, %xmm2 0xc5,0xf3,0x2a,0x10 = vcvtsi2sdl (%eax), %xmm1, %xmm2 0xc5,0xf8,0x28,0x10 = vmovaps (%eax), %xmm2 0xc5,0xf8,0x28,0xd1 = vmovaps %xmm1, %xmm2 0xc5,0xf8,0x29,0x08 = vmovaps %xmm1, (%eax) 0xc5,0xf9,0x28,0x10 = vmovapd (%eax), %xmm2 0xc5,0xf9,0x28,0xd1 = vmovapd %xmm1, %xmm2 0xc5,0xf9,0x29,0x08 = vmovapd %xmm1, (%eax) 0xc5,0xf8,0x10,0x10 = vmovups (%eax), %xmm2 0xc5,0xf8,0x10,0xd1 = vmovups %xmm1, %xmm2 0xc5,0xf8,0x11,0x08 = vmovups %xmm1, (%eax) 0xc5,0xf9,0x10,0x10 = vmovupd (%eax), %xmm2 0xc5,0xf9,0x10,0xd1 = vmovupd %xmm1, %xmm2 0xc5,0xf9,0x11,0x08 = vmovupd %xmm1, (%eax) 0xc5,0xf8,0x13,0x08 = vmovlps %xmm1, (%eax) 0xc5,0xe8,0x12,0x18 = vmovlps (%eax), %xmm2, %xmm3 0xc5,0xf9,0x13,0x08 = vmovlpd %xmm1, (%eax) 0xc5,0xe9,0x12,0x18 = vmovlpd (%eax), %xmm2, %xmm3 0xc5,0xf8,0x17,0x08 = vmovhps %xmm1, (%eax) 0xc5,0xe8,0x16,0x18 = vmovhps (%eax), %xmm2, %xmm3 0xc5,0xf9,0x17,0x08 = vmovhpd %xmm1, (%eax) 0xc5,0xe9,0x16,0x18 = vmovhpd (%eax), %xmm2, %xmm3 0xc5,0xe8,0x16,0xd9 = vmovlhps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0x12,0xd9 = vmovhlps %xmm1, %xmm2, %xmm3 0xc5,0xfa,0x2d,0xc1 = vcvtss2si %xmm1, %eax 0xc5,0xfa,0x2d,0x18 = vcvtss2si (%eax), %ebx 0xc5,0xfa,0x2d,0xc1 = vcvtss2sil %xmm1, %eax 0xc5,0xfa,0x2d,0x18 = vcvtss2sil (%eax), %ebx 0xc5,0xf8,0x5b,0xf5 = vcvtdq2ps %xmm5, %xmm6 0xc5,0xf8,0x5b,0x30 = vcvtdq2ps (%eax), %xmm6 0xc5,0xdb,0x5a,0xf2 = vcvtsd2ss %xmm2, %xmm4, %xmm6 0xc5,0xdb,0x5a,0x30 = vcvtsd2ss (%eax), %xmm4, %xmm6 0xc5,0xf9,0x5b,0xda = vcvtps2dq %xmm2, %xmm3 0xc5,0xf9,0x5b,0x18 = vcvtps2dq (%eax), %xmm3 0xc5,0xda,0x5a,0xf2 = vcvtss2sd %xmm2, %xmm4, %xmm6 0xc5,0xda,0x5a,0x30 = vcvtss2sd (%eax), %xmm4, %xmm6 0xc5,0xf8,0x5b,0xf4 = vcvtdq2ps %xmm4, %xmm6 0xc5,0xf8,0x5b,0x21 = vcvtdq2ps (%ecx), %xmm4 0xc5,0xfa,0x5b,0xda = vcvttps2dq %xmm2, %xmm3 0xc5,0xfa,0x5b,0x18 = vcvttps2dq (%eax), %xmm3 0xc5,0xf8,0x5a,0xda = vcvtps2pd %xmm2, %xmm3 0xc5,0xf8,0x5a,0x18 = vcvtps2pd (%eax), %xmm3 0xc5,0xf9,0x5a,0xda = vcvtpd2ps %xmm2, %xmm3 0xc5,0xf9,0x51,0xd1 = vsqrtpd %xmm1, %xmm2 0xc5,0xf9,0x51,0x10 = vsqrtpd (%eax), %xmm2 0xc5,0xf8,0x51,0xd1 = vsqrtps %xmm1, %xmm2 0xc5,0xf8,0x51,0x10 = vsqrtps (%eax), %xmm2 0xc5,0xeb,0x51,0xd9 = vsqrtsd %xmm1, %xmm2, %xmm3 0xc5,0xeb,0x51,0x18 = vsqrtsd (%eax), %xmm2, %xmm3 0xc5,0xea,0x51,0xd9 = vsqrtss %xmm1, %xmm2, %xmm3 0xc5,0xea,0x51,0x18 = vsqrtss (%eax), %xmm2, %xmm3 0xc5,0xf8,0x52,0xd1 = vrsqrtps %xmm1, %xmm2 0xc5,0xf8,0x52,0x10 = vrsqrtps (%eax), %xmm2 0xc5,0xea,0x52,0xd9 = vrsqrtss %xmm1, %xmm2, %xmm3 0xc5,0xea,0x52,0x18 = vrsqrtss (%eax), %xmm2, %xmm3 0xc5,0xf8,0x53,0xd1 = vrcpps %xmm1, %xmm2 0xc5,0xf8,0x53,0x10 = vrcpps (%eax), %xmm2 0xc5,0xea,0x53,0xd9 = vrcpss %xmm1, %xmm2, %xmm3 0xc5,0xea,0x53,0x18 = vrcpss (%eax), %xmm2, %xmm3 0xc5,0xf9,0xe7,0x08 = vmovntdq %xmm1, (%eax) 0xc5,0xf9,0x2b,0x08 = vmovntpd %xmm1, (%eax) 0xc5,0xf8,0x2b,0x08 = vmovntps %xmm1, (%eax) 0xc5,0xf8,0xae,0x10 = vldmxcsr (%eax) 0xc5,0xf8,0xae,0x18 = vstmxcsr (%eax) 0xc5,0xf8,0xae,0x15,0xef,0xbe,0xad,0xde = vldmxcsr 0xdeadbeef 0xc5,0xf8,0xae,0x1d,0xef,0xbe,0xad,0xde = vstmxcsr 0xdeadbeef 0xc5,0xe9,0xf8,0xd9 = vpsubb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf8,0x18 = vpsubb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xf9,0xd9 = vpsubw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf9,0x18 = vpsubw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xfa,0xd9 = vpsubd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xfa,0x18 = vpsubd (%eax), %xmm2, %xmm3 0xc5,0xe9,0xfb,0xd9 = vpsubq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xfb,0x18 = vpsubq (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe8,0xd9 = vpsubsb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe8,0x18 = vpsubsb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe9,0xd9 = vpsubsw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe9,0x18 = vpsubsw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd8,0xd9 = vpsubusb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd8,0x18 = vpsubusb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd9,0xd9 = vpsubusw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd9,0x18 = vpsubusw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xfc,0xd9 = vpaddb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xfc,0x18 = vpaddb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xfd,0xd9 = vpaddw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xfd,0x18 = vpaddw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xfe,0xd9 = vpaddd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xfe,0x18 = vpaddd (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd4,0xd9 = vpaddq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd4,0x18 = vpaddq (%eax), %xmm2, %xmm3 0xc5,0xe9,0xec,0xd9 = vpaddsb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xec,0x18 = vpaddsb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xed,0xd9 = vpaddsw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xed,0x18 = vpaddsw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xdc,0xd9 = vpaddusb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xdc,0x18 = vpaddusb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xdd,0xd9 = vpaddusw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xdd,0x18 = vpaddusw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe4,0xd9 = vpmulhuw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe4,0x18 = vpmulhuw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe5,0xd9 = vpmulhw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe5,0x18 = vpmulhw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd5,0xd9 = vpmullw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd5,0x18 = vpmullw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xf4,0xd9 = vpmuludq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf4,0x18 = vpmuludq (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe0,0xd9 = vpavgb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe0,0x18 = vpavgb (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe3,0xd9 = vpavgw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe3,0x18 = vpavgw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xea,0xd9 = vpminsw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xea,0x18 = vpminsw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xda,0xd9 = vpminub %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xda,0x18 = vpminub (%eax), %xmm2, %xmm3 0xc5,0xe9,0xee,0xd9 = vpmaxsw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xee,0x18 = vpmaxsw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xde,0xd9 = vpmaxub %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xde,0x18 = vpmaxub (%eax), %xmm2, %xmm3 0xc5,0xe9,0xf6,0xd9 = vpsadbw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf6,0x18 = vpsadbw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xf1,0xd9 = vpsllw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf1,0x18 = vpsllw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xf2,0xd9 = vpslld %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf2,0x18 = vpslld (%eax), %xmm2, %xmm3 0xc5,0xe9,0xf3,0xd9 = vpsllq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xf3,0x18 = vpsllq (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe1,0xd9 = vpsraw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe1,0x18 = vpsraw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xe2,0xd9 = vpsrad %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xe2,0x18 = vpsrad (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd1,0xd9 = vpsrlw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd1,0x18 = vpsrlw (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd2,0xd9 = vpsrld %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd2,0x18 = vpsrld (%eax), %xmm2, %xmm3 0xc5,0xe9,0xd3,0xd9 = vpsrlq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xd3,0x18 = vpsrlq (%eax), %xmm2, %xmm3 0xc5,0xe1,0x72,0xf2,0x0a = vpslld $10, %xmm2, %xmm3 0xc5,0xe1,0x73,0xfa,0x0a = vpslldq $10, %xmm2, %xmm3 0xc5,0xe1,0x73,0xf2,0x0a = vpsllq $10, %xmm2, %xmm3 0xc5,0xe1,0x71,0xf2,0x0a = vpsllw $10, %xmm2, %xmm3 0xc5,0xe1,0x72,0xe2,0x0a = vpsrad $10, %xmm2, %xmm3 0xc5,0xe1,0x71,0xe2,0x0a = vpsraw $10, %xmm2, %xmm3 0xc5,0xe1,0x72,0xd2,0x0a = vpsrld $10, %xmm2, %xmm3 0xc5,0xe1,0x73,0xda,0x0a = vpsrldq $10, %xmm2, %xmm3 0xc5,0xe1,0x73,0xd2,0x0a = vpsrlq $10, %xmm2, %xmm3 0xc5,0xe1,0x71,0xd2,0x0a = vpsrlw $10, %xmm2, %xmm3 0xc5,0xe1,0x72,0xf2,0x0a = vpslld $10, %xmm2, %xmm3 0xc5,0xe9,0xdb,0xd9 = vpand %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xdb,0x18 = vpand (%eax), %xmm2, %xmm3 0xc5,0xe9,0xeb,0xd9 = vpor %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xeb,0x18 = vpor (%eax), %xmm2, %xmm3 0xc5,0xe9,0xef,0xd9 = vpxor %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xef,0x18 = vpxor (%eax), %xmm2, %xmm3 0xc5,0xe9,0xdf,0xd9 = vpandn %xmm1, %xmm2, %xmm3 0xc5,0xe9,0xdf,0x18 = vpandn (%eax), %xmm2, %xmm3 0xc5,0xe9,0x74,0xd9 = vpcmpeqb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x74,0x18 = vpcmpeqb (%eax), %xmm2, %xmm3 0xc5,0xe9,0x75,0xd9 = vpcmpeqw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x75,0x18 = vpcmpeqw (%eax), %xmm2, %xmm3 0xc5,0xe9,0x76,0xd9 = vpcmpeqd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x76,0x18 = vpcmpeqd (%eax), %xmm2, %xmm3 0xc5,0xe9,0x64,0xd9 = vpcmpgtb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x64,0x18 = vpcmpgtb (%eax), %xmm2, %xmm3 0xc5,0xe9,0x65,0xd9 = vpcmpgtw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x65,0x18 = vpcmpgtw (%eax), %xmm2, %xmm3 0xc5,0xe9,0x66,0xd9 = vpcmpgtd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x66,0x18 = vpcmpgtd (%eax), %xmm2, %xmm3 0xc5,0xe9,0x63,0xd9 = vpacksswb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x63,0x18 = vpacksswb (%eax), %xmm2, %xmm3 0xc5,0xe9,0x6b,0xd9 = vpackssdw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x6b,0x18 = vpackssdw (%eax), %xmm2, %xmm3 0xc5,0xe9,0x67,0xd9 = vpackuswb %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x67,0x18 = vpackuswb (%eax), %xmm2, %xmm3 0xc5,0xf9,0x70,0xda,0x04 = vpshufd $4, %xmm2, %xmm3 0xc5,0xf9,0x70,0x18,0x04 = vpshufd $4, (%eax), %xmm3 0xc5,0xfa,0x70,0xda,0x04 = vpshufhw $4, %xmm2, %xmm3 0xc5,0xfa,0x70,0x18,0x04 = vpshufhw $4, (%eax), %xmm3 0xc5,0xfb,0x70,0xda,0x04 = vpshuflw $4, %xmm2, %xmm3 0xc5,0xfb,0x70,0x18,0x04 = vpshuflw $4, (%eax), %xmm3 0xc5,0xe9,0x60,0xd9 = vpunpcklbw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x60,0x18 = vpunpcklbw (%eax), %xmm2, %xmm3 0xc5,0xe9,0x61,0xd9 = vpunpcklwd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x61,0x18 = vpunpcklwd (%eax), %xmm2, %xmm3 0xc5,0xe9,0x62,0xd9 = vpunpckldq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x62,0x18 = vpunpckldq (%eax), %xmm2, %xmm3 0xc5,0xe9,0x6c,0xd9 = vpunpcklqdq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x6c,0x18 = vpunpcklqdq (%eax), %xmm2, %xmm3 0xc5,0xe9,0x68,0xd9 = vpunpckhbw %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x68,0x18 = vpunpckhbw (%eax), %xmm2, %xmm3 0xc5,0xe9,0x69,0xd9 = vpunpckhwd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x69,0x18 = vpunpckhwd (%eax), %xmm2, %xmm3 0xc5,0xe9,0x6a,0xd9 = vpunpckhdq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x6a,0x18 = vpunpckhdq (%eax), %xmm2, %xmm3 0xc5,0xe9,0x6d,0xd9 = vpunpckhqdq %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x6d,0x18 = vpunpckhqdq (%eax), %xmm2, %xmm3 0xc5,0xe9,0xc4,0xd8,0x07 = vpinsrw $7, %eax, %xmm2, %xmm3 0xc5,0xe9,0xc4,0x18,0x07 = vpinsrw $7, (%eax), %xmm2, %xmm3 0xc5,0xf9,0xc5,0xc2,0x07 = vpextrw $7, %xmm2, %eax 0xc5,0xf9,0xd7,0xc1 = vpmovmskb %xmm1, %eax 0xc5,0xf9,0xf7,0xd1 = vmaskmovdqu %xmm1, %xmm2 0xc5,0xf9,0x7e,0xc8 = vmovd %xmm1, %eax 0xc5,0xf9,0x7e,0x08 = vmovd %xmm1, (%eax) 0xc5,0xf9,0x6e,0xc8 = vmovd %eax, %xmm1 0xc5,0xf9,0x6e,0x08 = vmovd (%eax), %xmm1 0xc5,0xf9,0xd6,0x08 = vmovq %xmm1, (%eax) 0xc5,0xfa,0x7e,0xd1 = vmovq %xmm1, %xmm2 0xc5,0xfa,0x7e,0x08 = vmovq (%eax), %xmm1 0xc5,0xfb,0xe6,0xd1 = vcvtpd2dq %xmm1, %xmm2 0xc5,0xfa,0xe6,0xd1 = vcvtdq2pd %xmm1, %xmm2 0xc5,0xfa,0xe6,0x10 = vcvtdq2pd (%eax), %xmm2 0xc5,0xfa,0x16,0xd1 = vmovshdup %xmm1, %xmm2 0xc5,0xfa,0x16,0x10 = vmovshdup (%eax), %xmm2 0xc5,0xfa,0x12,0xd1 = vmovsldup %xmm1, %xmm2 0xc5,0xfa,0x12,0x10 = vmovsldup (%eax), %xmm2 0xc5,0xfb,0x12,0xd1 = vmovddup %xmm1, %xmm2 0xc5,0xfb,0x12,0x10 = vmovddup (%eax), %xmm2 0xc5,0xeb,0xd0,0xd9 = vaddsubps %xmm1, %xmm2, %xmm3 0xc5,0xf3,0xd0,0x10 = vaddsubps (%eax), %xmm1, %xmm2 0xc5,0xe9,0xd0,0xd9 = vaddsubpd %xmm1, %xmm2, %xmm3 0xc5,0xf1,0xd0,0x10 = vaddsubpd (%eax), %xmm1, %xmm2 0xc5,0xeb,0x7c,0xd9 = vhaddps %xmm1, %xmm2, %xmm3 0xc5,0xeb,0x7c,0x18 = vhaddps (%eax), %xmm2, %xmm3 0xc5,0xe9,0x7c,0xd9 = vhaddpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x7c,0x18 = vhaddpd (%eax), %xmm2, %xmm3 0xc5,0xeb,0x7d,0xd9 = vhsubps %xmm1, %xmm2, %xmm3 0xc5,0xeb,0x7d,0x18 = vhsubps (%eax), %xmm2, %xmm3 0xc5,0xe9,0x7d,0xd9 = vhsubpd %xmm1, %xmm2, %xmm3 0xc5,0xe9,0x7d,0x18 = vhsubpd (%eax), %xmm2, %xmm3 0xc4,0xe2,0x79,0x1c,0xd1 = vpabsb %xmm1, %xmm2 0xc4,0xe2,0x79,0x1c,0x10 = vpabsb (%eax), %xmm2 0xc4,0xe2,0x79,0x1d,0xd1 = vpabsw %xmm1, %xmm2 0xc4,0xe2,0x79,0x1d,0x10 = vpabsw (%eax), %xmm2 0xc4,0xe2,0x79,0x1e,0xd1 = vpabsd %xmm1, %xmm2 0xc4,0xe2,0x79,0x1e,0x10 = vpabsd (%eax), %xmm2 0xc4,0xe2,0x69,0x01,0xd9 = vphaddw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x01,0x18 = vphaddw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x02,0xd9 = vphaddd %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x02,0x18 = vphaddd (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x03,0xd9 = vphaddsw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x03,0x18 = vphaddsw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x05,0xd9 = vphsubw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x05,0x18 = vphsubw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x06,0xd9 = vphsubd %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x06,0x18 = vphsubd (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x07,0xd9 = vphsubsw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x07,0x18 = vphsubsw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x04,0xd9 = vpmaddubsw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x04,0x18 = vpmaddubsw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x00,0xd9 = vpshufb %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x00,0x18 = vpshufb (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x08,0xd9 = vpsignb %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x08,0x18 = vpsignb (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x09,0xd9 = vpsignw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x09,0x18 = vpsignw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x0a,0xd9 = vpsignd %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x0a,0x18 = vpsignd (%eax), %xmm2, %xmm3 0xc4,0xe2,0x69,0x0b,0xd9 = vpmulhrsw %xmm1, %xmm2, %xmm3 0xc4,0xe2,0x69,0x0b,0x18 = vpmulhrsw (%eax), %xmm2, %xmm3 0xc4,0xe3,0x69,0x0f,0xd9,0x07 = vpalignr $7, %xmm1, %xmm2, %xmm3 0xc4,0xe3,0x69,0x0f,0x18,0x07 = vpalignr $7, (%eax), %xmm2, %xmm3 0xc4,0xe3,0x69,0x0b,0xd9,0x07 = vroundsd $7, %xmm1, %xmm2, %xmm3 0xc4,0xe3,0x69,0x0b,0x18,0x07 = vroundsd $7, (%eax), %xmm2, %xmm3 0xc4,0xe3,0x69,0x0a,0xd9,0x07 = vroundss $7, %xmm1, %xmm2, %xmm3 0xc4,0xe3,0x69,0x0a,0x18,0x07 = vroundss $7, (%eax), %xmm2, %xmm3 0xc4,0xe3,0x79,0x09,0xda,0x07 = vroundpd $7, %xmm2, %xmm3 0xc4,0xe3,0x79,0x09,0x18,0x07 = vroundpd $7, (%eax), %xmm3 0xc4,0xe3,0x79,0x08,0xda,0x07 = vroundps $7, %xmm2, %xmm3 0xc4,0xe3,0x79,0x08,0x18,0x07 = vroundps $7, (%eax), %xmm3 0xc4,0xe2,0x79,0x41,0xda = vphminposuw %xmm2, %xmm3 0xc4,0xe2,0x79,0x41,0x10 = vphminposuw (%eax), %xmm2 0xc4,0xe2,0x61,0x2b,0xca = vpackusdw %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x2b,0x18 = vpackusdw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x29,0xca = vpcmpeqq %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x29,0x18 = vpcmpeqq (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x38,0xca = vpminsb %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x38,0x18 = vpminsb (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x39,0xca = vpminsd %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x39,0x18 = vpminsd (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x3b,0xca = vpminud %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x3b,0x18 = vpminud (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x3a,0xca = vpminuw %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x3a,0x18 = vpminuw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x3c,0xca = vpmaxsb %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x3c,0x18 = vpmaxsb (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x3d,0xca = vpmaxsd %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x3d,0x18 = vpmaxsd (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x3f,0xca = vpmaxud %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x3f,0x18 = vpmaxud (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x3e,0xca = vpmaxuw %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x3e,0x18 = vpmaxuw (%eax), %xmm2, %xmm3 0xc4,0xe2,0x61,0x28,0xca = vpmuldq %xmm2, %xmm3, %xmm1 0xc4,0xe2,0x69,0x28,0x18 = vpmuldq (%eax), %xmm2, %xmm3 0xc4,0xe2,0x51,0x40,0xca = vpmulld %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x40,0x18 = vpmulld (%eax), %xmm5, %xmm3 0xc4,0xe3,0x51,0x0c,0xca,0x03 = vblendps $3, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x0c,0x08,0x03 = vblendps $3, (%eax), %xmm5, %xmm1 0xc4,0xe3,0x51,0x0d,0xca,0x03 = vblendpd $3, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x0d,0x08,0x03 = vblendpd $3, (%eax), %xmm5, %xmm1 0xc4,0xe3,0x51,0x0e,0xca,0x03 = vpblendw $3, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x0e,0x08,0x03 = vpblendw $3, (%eax), %xmm5, %xmm1 0xc4,0xe3,0x51,0x42,0xca,0x03 = vmpsadbw $3, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x42,0x08,0x03 = vmpsadbw $3, (%eax), %xmm5, %xmm1 0xc4,0xe3,0x51,0x40,0xca,0x03 = vdpps $3, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x40,0x08,0x03 = vdpps $3, (%eax), %xmm5, %xmm1 0xc4,0xe3,0x51,0x41,0xca,0x03 = vdppd $3, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x41,0x08,0x03 = vdppd $3, (%eax), %xmm5, %xmm1 0xc4,0xe3,0x71,0x4b,0xdd,0x20 = vblendvpd %xmm2, %xmm5, %xmm1, %xmm3 0xc4,0xe3,0x71,0x4b,0x18,0x20 = vblendvpd %xmm2, (%eax), %xmm1, %xmm3 0xc4,0xe3,0x71,0x4a,0xdd,0x20 = vblendvps %xmm2, %xmm5, %xmm1, %xmm3 0xc4,0xe3,0x71,0x4a,0x18,0x20 = vblendvps %xmm2, (%eax), %xmm1, %xmm3 0xc4,0xe3,0x71,0x4c,0xdd,0x20 = vpblendvb %xmm2, %xmm5, %xmm1, %xmm3 0xc4,0xe3,0x71,0x4c,0x18,0x20 = vpblendvb %xmm2, (%eax), %xmm1, %xmm3 0xc4,0xe2,0x79,0x20,0xea = vpmovsxbw %xmm2, %xmm5 0xc4,0xe2,0x79,0x20,0x10 = vpmovsxbw (%eax), %xmm2 0xc4,0xe2,0x79,0x23,0xea = vpmovsxwd %xmm2, %xmm5 0xc4,0xe2,0x79,0x23,0x10 = vpmovsxwd (%eax), %xmm2 0xc4,0xe2,0x79,0x25,0xea = vpmovsxdq %xmm2, %xmm5 0xc4,0xe2,0x79,0x25,0x10 = vpmovsxdq (%eax), %xmm2 0xc4,0xe2,0x79,0x30,0xea = vpmovzxbw %xmm2, %xmm5 0xc4,0xe2,0x79,0x30,0x10 = vpmovzxbw (%eax), %xmm2 0xc4,0xe2,0x79,0x33,0xea = vpmovzxwd %xmm2, %xmm5 0xc4,0xe2,0x79,0x33,0x10 = vpmovzxwd (%eax), %xmm2 0xc4,0xe2,0x79,0x35,0xea = vpmovzxdq %xmm2, %xmm5 0xc4,0xe2,0x79,0x35,0x10 = vpmovzxdq (%eax), %xmm2 0xc4,0xe2,0x79,0x22,0xea = vpmovsxbq %xmm2, %xmm5 0xc4,0xe2,0x79,0x22,0x10 = vpmovsxbq (%eax), %xmm2 0xc4,0xe2,0x79,0x32,0xea = vpmovzxbq %xmm2, %xmm5 0xc4,0xe2,0x79,0x32,0x10 = vpmovzxbq (%eax), %xmm2 0xc4,0xe2,0x79,0x21,0xea = vpmovsxbd %xmm2, %xmm5 0xc4,0xe2,0x79,0x21,0x10 = vpmovsxbd (%eax), %xmm2 0xc4,0xe2,0x79,0x24,0xea = vpmovsxwq %xmm2, %xmm5 0xc4,0xe2,0x79,0x24,0x10 = vpmovsxwq (%eax), %xmm2 0xc4,0xe2,0x79,0x31,0xea = vpmovzxbd %xmm2, %xmm5 0xc4,0xe2,0x79,0x31,0x10 = vpmovzxbd (%eax), %xmm2 0xc4,0xe2,0x79,0x34,0xea = vpmovzxwq %xmm2, %xmm5 0xc4,0xe2,0x79,0x34,0x10 = vpmovzxwq (%eax), %xmm2 0xc5,0xf9,0xc5,0xc2,0x07 = vpextrw $7, %xmm2, %eax 0xc4,0xe3,0x79,0x15,0x10,0x07 = vpextrw $7, %xmm2, (%eax) 0xc4,0xe3,0x79,0x16,0xd0,0x07 = vpextrd $7, %xmm2, %eax 0xc4,0xe3,0x79,0x16,0x10,0x07 = vpextrd $7, %xmm2, (%eax) 0xc4,0xe3,0x79,0x14,0xd0,0x07 = vpextrb $7, %xmm2, %eax 0xc4,0xe3,0x79,0x14,0x10,0x07 = vpextrb $7, %xmm2, (%eax) 0xc4,0xe3,0x79,0x17,0x10,0x07 = vextractps $7, %xmm2, (%eax) 0xc4,0xe3,0x79,0x17,0xd0,0x07 = vextractps $7, %xmm2, %eax 0xc5,0xe9,0xc4,0xe8,0x07 = vpinsrw $7, %eax, %xmm2, %xmm5 0xc5,0xe9,0xc4,0x28,0x07 = vpinsrw $7, (%eax), %xmm2, %xmm5 0xc4,0xe3,0x69,0x20,0xe8,0x07 = vpinsrb $7, %eax, %xmm2, %xmm5 0xc4,0xe3,0x69,0x20,0x28,0x07 = vpinsrb $7, (%eax), %xmm2, %xmm5 0xc4,0xe3,0x69,0x22,0xe8,0x07 = vpinsrd $7, %eax, %xmm2, %xmm5 0xc4,0xe3,0x69,0x22,0x28,0x07 = vpinsrd $7, (%eax), %xmm2, %xmm5 0xc4,0xe3,0x51,0x21,0xca,0x07 = vinsertps $7, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x21,0x08,0x07 = vinsertps $7, (%eax), %xmm5, %xmm1 0xc4,0xe2,0x79,0x17,0xea = vptest %xmm2, %xmm5 0xc4,0xe2,0x79,0x17,0x10 = vptest (%eax), %xmm2 0xc4,0xe2,0x79,0x2a,0x10 = vmovntdqa (%eax), %xmm2 0xc4,0xe2,0x51,0x37,0xca = vpcmpgtq %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x37,0x18 = vpcmpgtq (%eax), %xmm5, %xmm3 0xc4,0xe3,0x79,0x62,0xea,0x07 = vpcmpistrm $7, %xmm2, %xmm5 0xc4,0xe3,0x79,0x62,0x28,0x07 = vpcmpistrm $7, (%eax), %xmm5 0xc4,0xe3,0x79,0x60,0xea,0x07 = vpcmpestrm $7, %xmm2, %xmm5 0xc4,0xe3,0x79,0x60,0x28,0x07 = vpcmpestrm $7, (%eax), %xmm5 0xc4,0xe3,0x79,0x63,0xea,0x07 = vpcmpistri $7, %xmm2, %xmm5 0xc4,0xe3,0x79,0x63,0x28,0x07 = vpcmpistri $7, (%eax), %xmm5 0xc4,0xe3,0x79,0x61,0xea,0x07 = vpcmpestri $7, %xmm2, %xmm5 0xc4,0xe3,0x79,0x61,0x28,0x07 = vpcmpestri $7, (%eax), %xmm5 0xc4,0xe2,0x79,0xdb,0xea = vaesimc %xmm2, %xmm5 0xc4,0xe2,0x79,0xdb,0x10 = vaesimc (%eax), %xmm2 0xc4,0xe2,0x51,0xdc,0xca = vaesenc %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xdc,0x18 = vaesenc (%eax), %xmm5, %xmm3 0xc4,0xe2,0x51,0xdd,0xca = vaesenclast %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xdd,0x18 = vaesenclast (%eax), %xmm5, %xmm3 0xc4,0xe2,0x51,0xde,0xca = vaesdec %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xde,0x18 = vaesdec (%eax), %xmm5, %xmm3 0xc4,0xe2,0x51,0xdf,0xca = vaesdeclast %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xdf,0x18 = vaesdeclast (%eax), %xmm5, %xmm3 0xc4,0xe3,0x79,0xdf,0xea,0x07 = vaeskeygenassist $7, %xmm2, %xmm5 0xc4,0xe3,0x79,0xdf,0x28,0x07 = vaeskeygenassist $7, (%eax), %xmm5 0xc5,0xe8,0xc2,0xd9,0x08 = vcmpeq_uqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x09 = vcmpngeps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x0a = vcmpngtps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x0b = vcmpfalseps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x0c = vcmpneq_oqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x0d = vcmpgeps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x0e = vcmpgtps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x0f = vcmptrueps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x10 = vcmpeq_osps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x11 = vcmplt_oqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x12 = vcmple_oqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x13 = vcmpunord_sps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x14 = vcmpneq_usps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x15 = vcmpnlt_uqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x16 = vcmpnle_uqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x17 = vcmpord_sps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x18 = vcmpeq_usps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x19 = vcmpnge_uqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x1a = vcmpngt_uqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x1b = vcmpfalse_osps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x1c = vcmpneq_osps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x1d = vcmpge_oqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x1e = vcmpgt_oqps %xmm1, %xmm2, %xmm3 0xc5,0xe8,0xc2,0xd9,0x1f = vcmptrue_usps %xmm1, %xmm2, %xmm3 0xc5,0xfc,0x28,0x10 = vmovaps (%eax), %ymm2 0xc5,0xfc,0x28,0xd1 = vmovaps %ymm1, %ymm2 0xc5,0xfc,0x29,0x08 = vmovaps %ymm1, (%eax) 0xc5,0xfd,0x28,0x10 = vmovapd (%eax), %ymm2 0xc5,0xfd,0x28,0xd1 = vmovapd %ymm1, %ymm2 0xc5,0xfd,0x29,0x08 = vmovapd %ymm1, (%eax) 0xc5,0xfc,0x10,0x10 = vmovups (%eax), %ymm2 0xc5,0xfc,0x10,0xd1 = vmovups %ymm1, %ymm2 0xc5,0xfc,0x11,0x08 = vmovups %ymm1, (%eax) 0xc5,0xfd,0x10,0x10 = vmovupd (%eax), %ymm2 0xc5,0xfd,0x10,0xd1 = vmovupd %ymm1, %ymm2 0xc5,0xfd,0x11,0x08 = vmovupd %ymm1, (%eax) 0xc5,0xec,0x15,0xe1 = vunpckhps %ymm1, %ymm2, %ymm4 0xc5,0xed,0x15,0xe1 = vunpckhpd %ymm1, %ymm2, %ymm4 0xc5,0xec,0x14,0xe1 = vunpcklps %ymm1, %ymm2, %ymm4 0xc5,0xed,0x14,0xe1 = vunpcklpd %ymm1, %ymm2, %ymm4 0xc5,0xec,0x15,0x6c,0xcb,0xfc = vunpckhps -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xed,0x15,0x6c,0xcb,0xfc = vunpckhpd -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xec,0x14,0x6c,0xcb,0xfc = vunpcklps -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xed,0x14,0x6c,0xcb,0xfc = vunpcklpd -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xfd,0xe7,0x08 = vmovntdq %ymm1, (%eax) 0xc5,0xfd,0x2b,0x08 = vmovntpd %ymm1, (%eax) 0xc5,0xfc,0x2b,0x08 = vmovntps %ymm1, (%eax) 0xc5,0xf8,0x50,0xc2 = vmovmskps %xmm2, %eax 0xc5,0xf9,0x50,0xc2 = vmovmskpd %xmm2, %eax 0xc5,0xdc,0x5f,0xf2 = vmaxps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x5f,0xf2 = vmaxpd %ymm2, %ymm4, %ymm6 0xc5,0xdc,0x5d,0xf2 = vminps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x5d,0xf2 = vminpd %ymm2, %ymm4, %ymm6 0xc5,0xdc,0x5c,0xf2 = vsubps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x5c,0xf2 = vsubpd %ymm2, %ymm4, %ymm6 0xc5,0xdc,0x5e,0xf2 = vdivps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x5e,0xf2 = vdivpd %ymm2, %ymm4, %ymm6 0xc5,0xdc,0x58,0xf2 = vaddps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x58,0xf2 = vaddpd %ymm2, %ymm4, %ymm6 0xc5,0xdc,0x59,0xf2 = vmulps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x59,0xf2 = vmulpd %ymm2, %ymm4, %ymm6 0xc5,0xdc,0x5f,0x30 = vmaxps (%eax), %ymm4, %ymm6 0xc5,0xdd,0x5f,0x30 = vmaxpd (%eax), %ymm4, %ymm6 0xc5,0xdc,0x5d,0x30 = vminps (%eax), %ymm4, %ymm6 0xc5,0xdd,0x5d,0x30 = vminpd (%eax), %ymm4, %ymm6 0xc5,0xdc,0x5c,0x30 = vsubps (%eax), %ymm4, %ymm6 0xc5,0xdd,0x5c,0x30 = vsubpd (%eax), %ymm4, %ymm6 0xc5,0xdc,0x5e,0x30 = vdivps (%eax), %ymm4, %ymm6 0xc5,0xdd,0x5e,0x30 = vdivpd (%eax), %ymm4, %ymm6 0xc5,0xdc,0x58,0x30 = vaddps (%eax), %ymm4, %ymm6 0xc5,0xdd,0x58,0x30 = vaddpd (%eax), %ymm4, %ymm6 0xc5,0xdc,0x59,0x30 = vmulps (%eax), %ymm4, %ymm6 0xc5,0xdd,0x59,0x30 = vmulpd (%eax), %ymm4, %ymm6 0xc5,0xfd,0x51,0xd1 = vsqrtpd %ymm1, %ymm2 0xc5,0xfd,0x51,0x10 = vsqrtpd (%eax), %ymm2 0xc5,0xfc,0x51,0xd1 = vsqrtps %ymm1, %ymm2 0xc5,0xfc,0x51,0x10 = vsqrtps (%eax), %ymm2 0xc5,0xfc,0x52,0xd1 = vrsqrtps %ymm1, %ymm2 0xc5,0xfc,0x52,0x10 = vrsqrtps (%eax), %ymm2 0xc5,0xfc,0x53,0xd1 = vrcpps %ymm1, %ymm2 0xc5,0xfc,0x53,0x10 = vrcpps (%eax), %ymm2 0xc5,0xdc,0x54,0xf2 = vandps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x54,0xf2 = vandpd %ymm2, %ymm4, %ymm6 0xc5,0xec,0x54,0x6c,0xcb,0xfc = vandps -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xed,0x54,0x6c,0xcb,0xfc = vandpd -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xdc,0x56,0xf2 = vorps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x56,0xf2 = vorpd %ymm2, %ymm4, %ymm6 0xc5,0xec,0x56,0x6c,0xcb,0xfc = vorps -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xed,0x56,0x6c,0xcb,0xfc = vorpd -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xdc,0x57,0xf2 = vxorps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x57,0xf2 = vxorpd %ymm2, %ymm4, %ymm6 0xc5,0xec,0x57,0x6c,0xcb,0xfc = vxorps -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xed,0x57,0x6c,0xcb,0xfc = vxorpd -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xdc,0x55,0xf2 = vandnps %ymm2, %ymm4, %ymm6 0xc5,0xdd,0x55,0xf2 = vandnpd %ymm2, %ymm4, %ymm6 0xc5,0xec,0x55,0x6c,0xcb,0xfc = vandnps -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xed,0x55,0x6c,0xcb,0xfc = vandnpd -4(%ebx,%ecx,8), %ymm2, %ymm5 0xc5,0xfc,0x5a,0xd3 = vcvtps2pd %xmm3, %ymm2 0xc5,0xfc,0x5a,0x10 = vcvtps2pd (%eax), %ymm2 0xc5,0xfe,0xe6,0xd3 = vcvtdq2pd %xmm3, %ymm2 0xc5,0xfe,0xe6,0x10 = vcvtdq2pd (%eax), %ymm2 0xc5,0xfc,0x5b,0xea = vcvtdq2ps %ymm2, %ymm5 0xc5,0xfc,0x5b,0x10 = vcvtdq2ps (%eax), %ymm2 0xc5,0xfd,0x5b,0xea = vcvtps2dq %ymm2, %ymm5 0xc5,0xfd,0x5b,0x28 = vcvtps2dq (%eax), %ymm5 0xc5,0xfe,0x5b,0xea = vcvttps2dq %ymm2, %ymm5 0xc5,0xfe,0x5b,0x28 = vcvttps2dq (%eax), %ymm5 0xc5,0xf9,0xe6,0xe9 = vcvttpd2dq %xmm1, %xmm5 0xc5,0xfd,0xe6,0xea = vcvttpd2dq %ymm2, %xmm5 0xc5,0xf9,0xe6,0xe9 = vcvttpd2dqx %xmm1, %xmm5 0xc5,0xf9,0xe6,0x08 = vcvttpd2dqx (%eax), %xmm1 0xc5,0xfd,0xe6,0xca = vcvttpd2dqy %ymm2, %xmm1 0xc5,0xfd,0xe6,0x08 = vcvttpd2dqy (%eax), %xmm1 0xc5,0xfd,0x5a,0xea = vcvtpd2ps %ymm2, %xmm5 0xc5,0xf9,0x5a,0xe9 = vcvtpd2psx %xmm1, %xmm5 0xc5,0xf9,0x5a,0x08 = vcvtpd2psx (%eax), %xmm1 0xc5,0xfd,0x5a,0xca = vcvtpd2psy %ymm2, %xmm1 0xc5,0xfd,0x5a,0x08 = vcvtpd2psy (%eax), %xmm1 0xc5,0xff,0xe6,0xea = vcvtpd2dq %ymm2, %xmm5 0xc5,0xff,0xe6,0xca = vcvtpd2dqy %ymm2, %xmm1 0xc5,0xff,0xe6,0x08 = vcvtpd2dqy (%eax), %xmm1 0xc5,0xfb,0xe6,0xe9 = vcvtpd2dqx %xmm1, %xmm5 0xc5,0xfb,0xe6,0x08 = vcvtpd2dqx (%eax), %xmm1 0xc5,0xec,0xc2,0xd9,0x00 = vcmpeqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x02 = vcmpleps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x01 = vcmpltps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x04 = vcmpneqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x06 = vcmpnleps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x05 = vcmpnltps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x07 = vcmpordps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x03 = vcmpunordps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x00 = vcmpeqps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x02 = vcmpleps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x01 = vcmpltps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x04 = vcmpneqps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x06 = vcmpnleps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x05 = vcmpnltps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xcc,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordps -4(%ebx,%ecx,8), %ymm6, %ymm2 0xc5,0xec,0xc2,0x5c,0xcb,0xfc,0x03 = vcmpunordps -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x00 = vcmpeqpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x02 = vcmplepd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x01 = vcmpltpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x04 = vcmpneqpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x06 = vcmpnlepd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x05 = vcmpnltpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x07 = vcmpordpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0xd9,0x03 = vcmpunordpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x00 = vcmpeqpd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x02 = vcmplepd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x01 = vcmpltpd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x04 = vcmpneqpd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x06 = vcmpnlepd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x05 = vcmpnltpd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xcd,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordpd -4(%ebx,%ecx,8), %ymm6, %ymm2 0xc5,0xed,0xc2,0x5c,0xcb,0xfc,0x03 = vcmpunordpd -4(%ebx,%ecx,8), %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x08 = vcmpeq_uqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x09 = vcmpngeps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x0a = vcmpngtps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x0b = vcmpfalseps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x0c = vcmpneq_oqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x0d = vcmpgeps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x0e = vcmpgtps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x0f = vcmptrueps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x10 = vcmpeq_osps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x11 = vcmplt_oqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x12 = vcmple_oqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x13 = vcmpunord_sps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x14 = vcmpneq_usps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x15 = vcmpnlt_uqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x16 = vcmpnle_uqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x17 = vcmpord_sps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x18 = vcmpeq_usps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x19 = vcmpnge_uqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x1a = vcmpngt_uqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x1b = vcmpfalse_osps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x1c = vcmpneq_osps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x1d = vcmpge_oqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x1e = vcmpgt_oqps %ymm1, %ymm2, %ymm3 0xc5,0xec,0xc2,0xd9,0x1f = vcmptrue_usps %ymm1, %ymm2, %ymm3 0xc5,0xef,0xd0,0xd9 = vaddsubps %ymm1, %ymm2, %ymm3 0xc5,0xf7,0xd0,0x10 = vaddsubps (%eax), %ymm1, %ymm2 0xc5,0xed,0xd0,0xd9 = vaddsubpd %ymm1, %ymm2, %ymm3 0xc5,0xf5,0xd0,0x10 = vaddsubpd (%eax), %ymm1, %ymm2 0xc5,0xef,0x7c,0xd9 = vhaddps %ymm1, %ymm2, %ymm3 0xc5,0xef,0x7c,0x18 = vhaddps (%eax), %ymm2, %ymm3 0xc5,0xed,0x7c,0xd9 = vhaddpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0x7c,0x18 = vhaddpd (%eax), %ymm2, %ymm3 0xc5,0xef,0x7d,0xd9 = vhsubps %ymm1, %ymm2, %ymm3 0xc5,0xef,0x7d,0x18 = vhsubps (%eax), %ymm2, %ymm3 0xc5,0xed,0x7d,0xd9 = vhsubpd %ymm1, %ymm2, %ymm3 0xc5,0xed,0x7d,0x18 = vhsubpd (%eax), %ymm2, %ymm3 0xc4,0xe3,0x55,0x0c,0xca,0x03 = vblendps $3, %ymm2, %ymm5, %ymm1 0xc4,0xe3,0x55,0x0c,0x08,0x03 = vblendps $3, (%eax), %ymm5, %ymm1 0xc4,0xe3,0x55,0x0d,0xca,0x03 = vblendpd $3, %ymm2, %ymm5, %ymm1 0xc4,0xe3,0x55,0x0d,0x08,0x03 = vblendpd $3, (%eax), %ymm5, %ymm1 0xc4,0xe3,0x55,0x40,0xca,0x03 = vdpps $3, %ymm2, %ymm5, %ymm1 0xc4,0xe3,0x55,0x40,0x08,0x03 = vdpps $3, (%eax), %ymm5, %ymm1 0xc4,0xe2,0x7d,0x1a,0x10 = vbroadcastf128 (%eax), %ymm2 0xc4,0xe2,0x7d,0x19,0x10 = vbroadcastsd (%eax), %ymm2 0xc4,0xe2,0x79,0x18,0x10 = vbroadcastss (%eax), %xmm2 0xc4,0xe2,0x7d,0x18,0x10 = vbroadcastss (%eax), %ymm2 0xc4,0xe3,0x6d,0x18,0xea,0x07 = vinsertf128 $7, %xmm2, %ymm2, %ymm5 0xc4,0xe3,0x6d,0x18,0x28,0x07 = vinsertf128 $7, (%eax), %ymm2, %ymm5 0xc4,0xe3,0x7d,0x19,0xd2,0x07 = vextractf128 $7, %ymm2, %xmm2 0xc4,0xe3,0x7d,0x19,0x10,0x07 = vextractf128 $7, %ymm2, (%eax) 0xc4,0xe2,0x51,0x2f,0x10 = vmaskmovpd %xmm2, %xmm5, (%eax) 0xc4,0xe2,0x55,0x2f,0x10 = vmaskmovpd %ymm2, %ymm5, (%eax) 0xc4,0xe2,0x69,0x2d,0x28 = vmaskmovpd (%eax), %xmm2, %xmm5 0xc4,0xe2,0x6d,0x2d,0x28 = vmaskmovpd (%eax), %ymm2, %ymm5 0xc4,0xe2,0x51,0x2e,0x10 = vmaskmovps %xmm2, %xmm5, (%eax) 0xc4,0xe2,0x55,0x2e,0x10 = vmaskmovps %ymm2, %ymm5, (%eax) 0xc4,0xe2,0x69,0x2c,0x28 = vmaskmovps (%eax), %xmm2, %xmm5 0xc4,0xe2,0x6d,0x2c,0x28 = vmaskmovps (%eax), %ymm2, %ymm5 0xc4,0xe3,0x79,0x04,0xe9,0x07 = vpermilps $7, %xmm1, %xmm5 0xc4,0xe3,0x7d,0x04,0xcd,0x07 = vpermilps $7, %ymm5, %ymm1 0xc4,0xe3,0x79,0x04,0x28,0x07 = vpermilps $7, (%eax), %xmm5 0xc4,0xe3,0x7d,0x04,0x28,0x07 = vpermilps $7, (%eax), %ymm5 0xc4,0xe2,0x51,0x0c,0xc9 = vpermilps %xmm1, %xmm5, %xmm1 0xc4,0xe2,0x55,0x0c,0xc9 = vpermilps %ymm1, %ymm5, %ymm1 0xc4,0xe2,0x51,0x0c,0x18 = vpermilps (%eax), %xmm5, %xmm3 0xc4,0xe2,0x55,0x0c,0x08 = vpermilps (%eax), %ymm5, %ymm1 0xc4,0xe3,0x79,0x05,0xe9,0x07 = vpermilpd $7, %xmm1, %xmm5 0xc4,0xe3,0x7d,0x05,0xcd,0x07 = vpermilpd $7, %ymm5, %ymm1 0xc4,0xe3,0x79,0x05,0x28,0x07 = vpermilpd $7, (%eax), %xmm5 0xc4,0xe3,0x7d,0x05,0x28,0x07 = vpermilpd $7, (%eax), %ymm5 0xc4,0xe2,0x51,0x0d,0xc9 = vpermilpd %xmm1, %xmm5, %xmm1 0xc4,0xe2,0x55,0x0d,0xc9 = vpermilpd %ymm1, %ymm5, %ymm1 0xc4,0xe2,0x51,0x0d,0x18 = vpermilpd (%eax), %xmm5, %xmm3 0xc4,0xe2,0x55,0x0d,0x08 = vpermilpd (%eax), %ymm5, %ymm1 0xc4,0xe3,0x55,0x06,0xca,0x07 = vperm2f128 $7, %ymm2, %ymm5, %ymm1 0xc4,0xe3,0x55,0x06,0x08,0x07 = vperm2f128 $7, (%eax), %ymm5, %ymm1 0xc5,0xfc,0x77 = vzeroall 0xc5,0xf8,0x77 = vzeroupper 0xc5,0xfb,0x2d,0xcc = vcvtsd2sil %xmm4, %ecx 0xc5,0xfb,0x2d,0x09 = vcvtsd2sil (%ecx), %ecx 0xc5,0xfb,0x2d,0xcc = vcvtsd2si %xmm4, %ecx 0xc5,0xfb,0x2d,0x09 = vcvtsd2si (%ecx), %ecx 0xc5,0xfb,0x2a,0x7d,0x00 = vcvtsi2sdl (%ebp), %xmm0, %xmm7 0xc5,0xfb,0x2a,0x3c,0x24 = vcvtsi2sdl (%esp), %xmm0, %xmm7 0xc5,0xfb,0x2a,0x7d,0x00 = vcvtsi2sd (%ebp), %xmm0, %xmm7 0xc5,0xfb,0x2a,0x3c,0x24 = vcvtsi2sd (%esp), %xmm0, %xmm7 0xc5,0xff,0xf0,0x10 = vlddqu (%eax), %ymm2 0xc5,0xff,0x12,0xea = vmovddup %ymm2, %ymm5 0xc5,0xff,0x12,0x10 = vmovddup (%eax), %ymm2 0xc5,0xfd,0x6f,0xea = vmovdqa %ymm2, %ymm5 0xc5,0xfd,0x7f,0x10 = vmovdqa %ymm2, (%eax) 0xc5,0xfd,0x6f,0x10 = vmovdqa (%eax), %ymm2 0xc5,0xfe,0x6f,0xea = vmovdqu %ymm2, %ymm5 0xc5,0xfe,0x7f,0x10 = vmovdqu %ymm2, (%eax) 0xc5,0xfe,0x6f,0x10 = vmovdqu (%eax), %ymm2 0xc5,0xfe,0x16,0xea = vmovshdup %ymm2, %ymm5 0xc5,0xfe,0x16,0x10 = vmovshdup (%eax), %ymm2 0xc5,0xfe,0x12,0xea = vmovsldup %ymm2, %ymm5 0xc5,0xfe,0x12,0x10 = vmovsldup (%eax), %ymm2 0xc4,0xe2,0x7d,0x17,0xea = vptest %ymm2, %ymm5 0xc4,0xe2,0x7d,0x17,0x10 = vptest (%eax), %ymm2 0xc4,0xe3,0x7d,0x09,0xcd,0x07 = vroundpd $7, %ymm5, %ymm1 0xc4,0xe3,0x7d,0x09,0x28,0x07 = vroundpd $7, (%eax), %ymm5 0xc4,0xe3,0x7d,0x08,0xcd,0x07 = vroundps $7, %ymm5, %ymm1 0xc4,0xe3,0x7d,0x08,0x28,0x07 = vroundps $7, (%eax), %ymm5 0xc5,0xd5,0xc6,0xca,0x07 = vshufpd $7, %ymm2, %ymm5, %ymm1 0xc5,0xd5,0xc6,0x08,0x07 = vshufpd $7, (%eax), %ymm5, %ymm1 0xc5,0xd4,0xc6,0xca,0x07 = vshufps $7, %ymm2, %ymm5, %ymm1 0xc5,0xd4,0xc6,0x08,0x07 = vshufps $7, (%eax), %ymm5, %ymm1 0xc4,0xe2,0x79,0x0f,0xea = vtestpd %xmm2, %xmm5 0xc4,0xe2,0x7d,0x0f,0xea = vtestpd %ymm2, %ymm5 0xc4,0xe2,0x79,0x0f,0x10 = vtestpd (%eax), %xmm2 0xc4,0xe2,0x7d,0x0f,0x10 = vtestpd (%eax), %ymm2 0xc4,0xe2,0x79,0x0e,0xea = vtestps %xmm2, %xmm5 0xc4,0xe2,0x7d,0x0e,0xea = vtestps %ymm2, %ymm5 0xc4,0xe2,0x79,0x0e,0x10 = vtestps (%eax), %xmm2 0xc4,0xe2,0x7d,0x0e,0x10 = vtestps (%eax), %ymm2 0xc4,0xe3,0x75,0x4b,0x94,0x20,0xad,0xde,0x00,0x00,0x00 = vblendvpd %ymm0, 0xdead(%eax,%eiz), %ymm1, %ymm2 0xc4,0xe3,0x51,0x44,0xca,0x11 = vpclmulhqhqdq %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x44,0x18,0x11 = vpclmulhqhqdq (%eax), %xmm5, %xmm3 0xc4,0xe3,0x51,0x44,0xca,0x01 = vpclmulhqlqdq %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x44,0x18,0x01 = vpclmulhqlqdq (%eax), %xmm5, %xmm3 0xc4,0xe3,0x51,0x44,0xca,0x10 = vpclmullqhqdq %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x44,0x18,0x10 = vpclmullqhqdq (%eax), %xmm5, %xmm3 0xc4,0xe3,0x51,0x44,0xca,0x00 = vpclmullqlqdq %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x44,0x18,0x00 = vpclmullqlqdq (%eax), %xmm5, %xmm3 0xc4,0xe3,0x51,0x44,0xca,0x11 = vpclmulqdq $17, %xmm2, %xmm5, %xmm1 0xc4,0xe3,0x51,0x44,0x18,0x11 = vpclmulqdq $17, (%eax), %xmm5, %xmm3 capstone-sys-0.11.0/capstone/suite/MC/X86/x86-32-fma3.s.cs010066400017500001750000000237711363402546700206040ustar0000000000000000# CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_ATT 0xc4,0xe2,0xd1,0x98,0xca = vfmadd132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x98,0x08 = vfmadd132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x98,0xca = vfmadd132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x98,0x08 = vfmadd132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa8,0xca = vfmadd213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa8,0x08 = vfmadd213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xa8,0xca = vfmadd213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xa8,0x08 = vfmadd213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb8,0xca = vfmadd231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb8,0x08 = vfmadd231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xb8,0xca = vfmadd231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xb8,0x08 = vfmadd231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd5,0x98,0xca = vfmadd132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x98,0x08 = vfmadd132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x98,0xca = vfmadd132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x98,0x08 = vfmadd132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa8,0xca = vfmadd213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa8,0x08 = vfmadd213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xa8,0xca = vfmadd213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xa8,0x08 = vfmadd213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb8,0xca = vfmadd231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb8,0x08 = vfmadd231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xb8,0xca = vfmadd231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xb8,0x08 = vfmadd231ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd1,0x98,0xca = vfmadd132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x98,0x08 = vfmadd132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x98,0xca = vfmadd132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x98,0x08 = vfmadd132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa8,0xca = vfmadd213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa8,0x08 = vfmadd213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xa8,0xca = vfmadd213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xa8,0x08 = vfmadd213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb8,0xca = vfmadd231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb8,0x08 = vfmadd231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xb8,0xca = vfmadd231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xb8,0x08 = vfmadd231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0x96,0xca = vfmaddsub132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x96,0x08 = vfmaddsub132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x96,0xca = vfmaddsub132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x96,0x08 = vfmaddsub132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa6,0xca = vfmaddsub213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa6,0x08 = vfmaddsub213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xa6,0xca = vfmaddsub213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xa6,0x08 = vfmaddsub213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb6,0xca = vfmaddsub231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb6,0x08 = vfmaddsub231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xb6,0xca = vfmaddsub231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xb6,0x08 = vfmaddsub231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0x97,0xca = vfmsubadd132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x97,0x08 = vfmsubadd132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x97,0xca = vfmsubadd132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x97,0x08 = vfmsubadd132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa7,0xca = vfmsubadd213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xa7,0x08 = vfmsubadd213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xa7,0xca = vfmsubadd213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xa7,0x08 = vfmsubadd213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb7,0xca = vfmsubadd231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xb7,0x08 = vfmsubadd231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xb7,0xca = vfmsubadd231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xb7,0x08 = vfmsubadd231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0x9a,0xca = vfmsub132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x9a,0x08 = vfmsub132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x9a,0xca = vfmsub132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x9a,0x08 = vfmsub132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xaa,0xca = vfmsub213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xaa,0x08 = vfmsub213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xaa,0xca = vfmsub213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xaa,0x08 = vfmsub213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xba,0xca = vfmsub231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xba,0x08 = vfmsub231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xba,0xca = vfmsub231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xba,0x08 = vfmsub231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0x9c,0xca = vfnmadd132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x9c,0x08 = vfnmadd132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x9c,0xca = vfnmadd132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x9c,0x08 = vfnmadd132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xac,0xca = vfnmadd213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xac,0x08 = vfnmadd213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xac,0xca = vfnmadd213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xac,0x08 = vfnmadd213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xbc,0xca = vfnmadd231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xbc,0x08 = vfnmadd231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xbc,0xca = vfnmadd231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xbc,0x08 = vfnmadd231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0x9e,0xca = vfnmsub132pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0x9e,0x08 = vfnmsub132pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0x9e,0xca = vfnmsub132ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0x9e,0x08 = vfnmsub132ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xae,0xca = vfnmsub213pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xae,0x08 = vfnmsub213pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xae,0xca = vfnmsub213ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xae,0x08 = vfnmsub213ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd1,0xbe,0xca = vfnmsub231pd %xmm2, %xmm5, %xmm1 0xc4,0xe2,0xd1,0xbe,0x08 = vfnmsub231pd (%eax), %xmm5, %xmm1 0xc4,0xe2,0x51,0xbe,0xca = vfnmsub231ps %xmm2, %xmm5, %xmm1 0xc4,0xe2,0x51,0xbe,0x08 = vfnmsub231ps (%eax), %xmm5, %xmm1 0xc4,0xe2,0xd5,0x98,0xca = vfmadd132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x98,0x08 = vfmadd132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x98,0xca = vfmadd132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x98,0x08 = vfmadd132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa8,0xca = vfmadd213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa8,0x08 = vfmadd213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xa8,0xca = vfmadd213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xa8,0x08 = vfmadd213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb8,0xca = vfmadd231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb8,0x08 = vfmadd231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xb8,0xca = vfmadd231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xb8,0x08 = vfmadd231ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0x96,0xca = vfmaddsub132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x96,0x08 = vfmaddsub132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x96,0xca = vfmaddsub132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x96,0x08 = vfmaddsub132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa6,0xca = vfmaddsub213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa6,0x08 = vfmaddsub213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xa6,0xca = vfmaddsub213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xa6,0x08 = vfmaddsub213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb6,0xca = vfmaddsub231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb6,0x08 = vfmaddsub231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xb6,0xca = vfmaddsub231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xb6,0x08 = vfmaddsub231ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0x97,0xca = vfmsubadd132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x97,0x08 = vfmsubadd132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x97,0xca = vfmsubadd132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x97,0x08 = vfmsubadd132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa7,0xca = vfmsubadd213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xa7,0x08 = vfmsubadd213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xa7,0xca = vfmsubadd213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xa7,0x08 = vfmsubadd213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb7,0xca = vfmsubadd231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xb7,0x08 = vfmsubadd231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xb7,0xca = vfmsubadd231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xb7,0x08 = vfmsubadd231ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0x9a,0xca = vfmsub132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x9a,0x08 = vfmsub132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x9a,0xca = vfmsub132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x9a,0x08 = vfmsub132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xaa,0xca = vfmsub213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xaa,0x08 = vfmsub213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xaa,0xca = vfmsub213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xaa,0x08 = vfmsub213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xba,0xca = vfmsub231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xba,0x08 = vfmsub231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xba,0xca = vfmsub231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xba,0x08 = vfmsub231ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0x9c,0xca = vfnmadd132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x9c,0x08 = vfnmadd132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x9c,0xca = vfnmadd132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x9c,0x08 = vfnmadd132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xac,0xca = vfnmadd213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xac,0x08 = vfnmadd213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xac,0xca = vfnmadd213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xac,0x08 = vfnmadd213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xbc,0xca = vfnmadd231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xbc,0x08 = vfnmadd231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xbc,0xca = vfnmadd231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xbc,0x08 = vfnmadd231ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0x9e,0xca = vfnmsub132pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0x9e,0x08 = vfnmsub132pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0x9e,0xca = vfnmsub132ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0x9e,0x08 = vfnmsub132ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xae,0xca = vfnmsub213pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xae,0x08 = vfnmsub213pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xae,0xca = vfnmsub213ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xae,0x08 = vfnmsub213ps (%eax), %ymm5, %ymm1 0xc4,0xe2,0xd5,0xbe,0xca = vfnmsub231pd %ymm2, %ymm5, %ymm1 0xc4,0xe2,0xd5,0xbe,0x08 = vfnmsub231pd (%eax), %ymm5, %ymm1 0xc4,0xe2,0x55,0xbe,0xca = vfnmsub231ps %ymm2, %ymm5, %ymm1 0xc4,0xe2,0x55,0xbe,0x08 = vfnmsub231ps (%eax), %ymm5, %ymm1 capstone-sys-0.11.0/capstone/suite/MC/X86/x86-32-ms-inline-asm.s.cs010066400017500001750000000021671363402546700224230ustar0000000000000000# CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_ATT 0x8b,0x03 = movl (%ebx), %eax 0x89,0x4b,0x04 = movl %ecx, 4(%ebx) 0x8b,0x04,0x85,0x04,0x00,0x00,0x00 = movl 4(, %eax, 4), %eax 0x8b,0x04,0x85,0x04,0x00,0x00,0x00 = movl 4(, %eax, 4), %eax 0x8b,0x04,0x06 = movl (%esi, %eax), %eax 0x8b,0x04,0x06 = movl (%esi, %eax), %eax 0x8b,0x04,0x86 = movl (%esi, %eax, 4), %eax 0x8b,0x04,0x86 = movl (%esi, %eax, 4), %eax 0x8b,0x44,0x06,0x04 = movl 4(%esi, %eax), %eax 0x8b,0x44,0x06,0x04 = movl 4(%esi, %eax), %eax 0x8b,0x44,0x06,0x04 = movl 4(%esi, %eax), %eax 0x8b,0x44,0x06,0x04 = movl 4(%esi, %eax), %eax 0x8b,0x44,0x46,0x04 = movl 4(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x04 = movl 4(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x04 = movl 4(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x04 = movl 4(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x08 = movl 8(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x08 = movl 8(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x08 = movl 8(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x08 = movl 8(%esi, %eax, 2), %eax 0x8b,0x44,0x46,0x10 = movl 16(%esi, %eax, 2), %eax 0x0f,0x18,0x40,0x40 = prefetchnta 64(%eax) 0x60 = pushal 0x61 = popal 0x60 = pushal 0x61 = popal capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-avx-clmul-encoding.s.cs010066400017500001750000000013431363402546700235300ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0xc4,0x43,0x29,0x44,0xdc,0x11 = vpclmulhqhqdq %xmm12, %xmm10, %xmm11 0xc4,0x63,0x29,0x44,0x28,0x11 = vpclmulhqhqdq (%rax), %xmm10, %xmm13 0xc4,0x43,0x29,0x44,0xdc,0x01 = vpclmulhqlqdq %xmm12, %xmm10, %xmm11 0xc4,0x63,0x29,0x44,0x28,0x01 = vpclmulhqlqdq (%rax), %xmm10, %xmm13 0xc4,0x43,0x29,0x44,0xdc,0x10 = vpclmullqhqdq %xmm12, %xmm10, %xmm11 0xc4,0x63,0x29,0x44,0x28,0x10 = vpclmullqhqdq (%rax), %xmm10, %xmm13 0xc4,0x43,0x29,0x44,0xdc,0x00 = vpclmullqlqdq %xmm12, %xmm10, %xmm11 0xc4,0x63,0x29,0x44,0x28,0x00 = vpclmullqlqdq (%rax), %xmm10, %xmm13 0xc4,0x43,0x29,0x44,0xdc,0x11 = vpclmulqdq $17, %xmm12, %xmm10, %xmm11 0xc4,0x63,0x29,0x44,0x28,0x11 = vpclmulqdq $17, (%rax), %xmm10, %xmm13 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-avx-encoding.s.cs010066400017500001750000002003741363402546700224230ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0xc4,0x41,0x32,0x58,0xd0 = vaddss %xmm8, %xmm9, %xmm10 0xc4,0x41,0x32,0x59,0xd0 = vmulss %xmm8, %xmm9, %xmm10 0xc4,0x41,0x32,0x5c,0xd0 = vsubss %xmm8, %xmm9, %xmm10 0xc4,0x41,0x32,0x5e,0xd0 = vdivss %xmm8, %xmm9, %xmm10 0xc4,0x41,0x33,0x58,0xd0 = vaddsd %xmm8, %xmm9, %xmm10 0xc4,0x41,0x33,0x59,0xd0 = vmulsd %xmm8, %xmm9, %xmm10 0xc4,0x41,0x33,0x5c,0xd0 = vsubsd %xmm8, %xmm9, %xmm10 0xc4,0x41,0x33,0x5e,0xd0 = vdivsd %xmm8, %xmm9, %xmm10 0xc5,0x2a,0x58,0x5c,0xd9,0xfc = vaddss -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2a,0x5c,0x5c,0xd9,0xfc = vsubss -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2a,0x59,0x5c,0xd9,0xfc = vmulss -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2a,0x5e,0x5c,0xd9,0xfc = vdivss -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2b,0x58,0x5c,0xd9,0xfc = vaddsd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2b,0x5c,0x5c,0xd9,0xfc = vsubsd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2b,0x59,0x5c,0xd9,0xfc = vmulsd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x2b,0x5e,0x5c,0xd9,0xfc = vdivsd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc4,0x41,0x20,0x58,0xfa = vaddps %xmm10, %xmm11, %xmm15 0xc4,0x41,0x20,0x5c,0xfa = vsubps %xmm10, %xmm11, %xmm15 0xc4,0x41,0x20,0x59,0xfa = vmulps %xmm10, %xmm11, %xmm15 0xc4,0x41,0x20,0x5e,0xfa = vdivps %xmm10, %xmm11, %xmm15 0xc4,0x41,0x21,0x58,0xfa = vaddpd %xmm10, %xmm11, %xmm15 0xc4,0x41,0x21,0x5c,0xfa = vsubpd %xmm10, %xmm11, %xmm15 0xc4,0x41,0x21,0x59,0xfa = vmulpd %xmm10, %xmm11, %xmm15 0xc4,0x41,0x21,0x5e,0xfa = vdivpd %xmm10, %xmm11, %xmm15 0xc5,0x28,0x58,0x5c,0xd9,0xfc = vaddps -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x28,0x5c,0x5c,0xd9,0xfc = vsubps -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x28,0x59,0x5c,0xd9,0xfc = vmulps -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x28,0x5e,0x5c,0xd9,0xfc = vdivps -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x29,0x58,0x5c,0xd9,0xfc = vaddpd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x29,0x5c,0x5c,0xd9,0xfc = vsubpd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x29,0x59,0x5c,0xd9,0xfc = vmulpd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc5,0x29,0x5e,0x5c,0xd9,0xfc = vdivpd -4(%rcx, %rbx, 8), %xmm10, %xmm11 0xc4,0x41,0x0a,0x5f,0xe2 = vmaxss %xmm10, %xmm14, %xmm12 0xc4,0x41,0x0b,0x5f,0xe2 = vmaxsd %xmm10, %xmm14, %xmm12 0xc4,0x41,0x0a,0x5d,0xe2 = vminss %xmm10, %xmm14, %xmm12 0xc4,0x41,0x0b,0x5d,0xe2 = vminsd %xmm10, %xmm14, %xmm12 0xc5,0x1a,0x5f,0x54,0xcb,0xfc = vmaxss -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x1b,0x5f,0x54,0xcb,0xfc = vmaxsd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x1a,0x5d,0x54,0xcb,0xfc = vminss -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x1b,0x5d,0x54,0xcb,0xfc = vminsd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc4,0x41,0x08,0x5f,0xe2 = vmaxps %xmm10, %xmm14, %xmm12 0xc4,0x41,0x09,0x5f,0xe2 = vmaxpd %xmm10, %xmm14, %xmm12 0xc4,0x41,0x08,0x5d,0xe2 = vminps %xmm10, %xmm14, %xmm12 0xc4,0x41,0x09,0x5d,0xe2 = vminpd %xmm10, %xmm14, %xmm12 0xc5,0x18,0x5f,0x54,0xcb,0xfc = vmaxps -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x19,0x5f,0x54,0xcb,0xfc = vmaxpd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x18,0x5d,0x54,0xcb,0xfc = vminps -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x19,0x5d,0x54,0xcb,0xfc = vminpd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc4,0x41,0x08,0x54,0xe2 = vandps %xmm10, %xmm14, %xmm12 0xc4,0x41,0x09,0x54,0xe2 = vandpd %xmm10, %xmm14, %xmm12 0xc5,0x18,0x54,0x54,0xcb,0xfc = vandps -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x19,0x54,0x54,0xcb,0xfc = vandpd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc4,0x41,0x08,0x56,0xe2 = vorps %xmm10, %xmm14, %xmm12 0xc4,0x41,0x09,0x56,0xe2 = vorpd %xmm10, %xmm14, %xmm12 0xc5,0x18,0x56,0x54,0xcb,0xfc = vorps -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x19,0x56,0x54,0xcb,0xfc = vorpd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc4,0x41,0x08,0x57,0xe2 = vxorps %xmm10, %xmm14, %xmm12 0xc4,0x41,0x09,0x57,0xe2 = vxorpd %xmm10, %xmm14, %xmm12 0xc5,0x18,0x57,0x54,0xcb,0xfc = vxorps -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x19,0x57,0x54,0xcb,0xfc = vxorpd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc4,0x41,0x08,0x55,0xe2 = vandnps %xmm10, %xmm14, %xmm12 0xc4,0x41,0x09,0x55,0xe2 = vandnpd %xmm10, %xmm14, %xmm12 0xc5,0x18,0x55,0x54,0xcb,0xfc = vandnps -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x19,0x55,0x54,0xcb,0xfc = vandnpd -4(%rbx, %rcx, 8), %xmm12, %xmm10 0xc5,0x7a,0x10,0x54,0xcb,0xfc = vmovss -4(%rbx, %rcx, 8), %xmm10 0xc4,0x41,0x2a,0x10,0xfe = vmovss %xmm14, %xmm10, %xmm15 0xc5,0x7b,0x10,0x54,0xcb,0xfc = vmovsd -4(%rbx, %rcx, 8), %xmm10 0xc4,0x41,0x2b,0x10,0xfe = vmovsd %xmm14, %xmm10, %xmm15 0xc4,0x41,0x18,0x15,0xef = vunpckhps %xmm15, %xmm12, %xmm13 0xc4,0x41,0x19,0x15,0xef = vunpckhpd %xmm15, %xmm12, %xmm13 0xc4,0x41,0x18,0x14,0xef = vunpcklps %xmm15, %xmm12, %xmm13 0xc4,0x41,0x19,0x14,0xef = vunpcklpd %xmm15, %xmm12, %xmm13 0xc5,0x18,0x15,0x7c,0xcb,0xfc = vunpckhps -4(%rbx, %rcx, 8), %xmm12, %xmm15 0xc5,0x19,0x15,0x7c,0xcb,0xfc = vunpckhpd -4(%rbx, %rcx, 8), %xmm12, %xmm15 0xc5,0x18,0x14,0x7c,0xcb,0xfc = vunpcklps -4(%rbx, %rcx, 8), %xmm12, %xmm15 0xc5,0x19,0x14,0x7c,0xcb,0xfc = vunpcklpd -4(%rbx, %rcx, 8), %xmm12, %xmm15 0xc4,0x41,0x18,0xc2,0xfa,0x00 = vcmpps $0, %xmm10, %xmm12, %xmm15 0xc5,0x18,0xc2,0x38,0x00 = vcmpps $0, (%rax), %xmm12, %xmm15 0xc4,0x41,0x18,0xc2,0xfa,0x07 = vcmpps $7, %xmm10, %xmm12, %xmm15 0xc4,0x41,0x19,0xc2,0xfa,0x00 = vcmppd $0, %xmm10, %xmm12, %xmm15 0xc5,0x19,0xc2,0x38,0x00 = vcmppd $0, (%rax), %xmm12, %xmm15 0xc4,0x41,0x19,0xc2,0xfa,0x07 = vcmppd $7, %xmm10, %xmm12, %xmm15 0xc4,0x41,0x18,0xc6,0xeb,0x08 = vshufps $8, %xmm11, %xmm12, %xmm13 0xc5,0x18,0xc6,0x6c,0xcb,0xfc,0x08 = vshufps $8, -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x19,0xc6,0xeb,0x08 = vshufpd $8, %xmm11, %xmm12, %xmm13 0xc5,0x19,0xc6,0x6c,0xcb,0xfc,0x08 = vshufpd $8, -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x00 = vcmpeqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x02 = vcmpleps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x01 = vcmpltps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x04 = vcmpneqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x06 = vcmpnleps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x05 = vcmpnltps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x07 = vcmpordps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x03 = vcmpunordps %xmm11, %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x00 = vcmpeqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x02 = vcmpleps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x01 = vcmpltps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x04 = vcmpneqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x06 = vcmpnleps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x05 = vcmpnltps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordps -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x03 = vcmpunordps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x00 = vcmpeqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x02 = vcmplepd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x01 = vcmpltpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x04 = vcmpneqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x06 = vcmpnlepd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x05 = vcmpnltpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x07 = vcmpordpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x03 = vcmpunordpd %xmm11, %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x00 = vcmpeqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x02 = vcmplepd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x01 = vcmpltpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x04 = vcmpneqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x06 = vcmpnlepd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x05 = vcmpnltpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordpd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x03 = vcmpunordpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x00 = vcmpeqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x02 = vcmpless %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x01 = vcmpltss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x04 = vcmpneqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x06 = vcmpnless %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x05 = vcmpnltss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x07 = vcmpordss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x03 = vcmpunordss %xmm11, %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x00 = vcmpeqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x02 = vcmpless -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x01 = vcmpltss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x04 = vcmpneqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x06 = vcmpnless -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x05 = vcmpnltss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordss -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x03 = vcmpunordss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x00 = vcmpeqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x02 = vcmplesd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x01 = vcmpltsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x04 = vcmpneqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x06 = vcmpnlesd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x05 = vcmpnltsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x07 = vcmpordsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x03 = vcmpunordsd %xmm11, %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x00 = vcmpeqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x02 = vcmplesd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x01 = vcmpltsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x04 = vcmpneqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x06 = vcmpnlesd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x05 = vcmpnltsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x07 = vcmpordsd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x03 = vcmpunordsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x08 = vcmpeq_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x09 = vcmpngeps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0a = vcmpngtps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0b = vcmpfalseps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0c = vcmpneq_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0d = vcmpgeps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0e = vcmpgtps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0f = vcmptrueps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x10 = vcmpeq_osps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x11 = vcmplt_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x12 = vcmple_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x13 = vcmpunord_sps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x14 = vcmpneq_usps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x15 = vcmpnlt_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x16 = vcmpnle_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x17 = vcmpord_sps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x18 = vcmpeq_usps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x19 = vcmpnge_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1a = vcmpngt_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1b = vcmpfalse_osps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1c = vcmpneq_osps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1d = vcmpge_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1e = vcmpgt_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1f = vcmptrue_usps %xmm11, %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x08 = vcmpeq_uqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x09 = vcmpngeps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0a = vcmpngtps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0b = vcmpfalseps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0c = vcmpneq_oqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0d = vcmpgeps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x0e = vcmpgtps -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0f = vcmptrueps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x10 = vcmpeq_osps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x11 = vcmplt_oqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x12 = vcmple_oqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x13 = vcmpunord_sps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x14 = vcmpneq_usps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x15 = vcmpnlt_uqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x16 = vcmpnle_uqps -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x17 = vcmpord_sps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x18 = vcmpeq_usps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x19 = vcmpnge_uqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1a = vcmpngt_uqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1b = vcmpfalse_osps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1c = vcmpneq_osps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1d = vcmpge_oqps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x1e = vcmpgt_oqps -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1f = vcmptrue_usps -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x08 = vcmpeq_uqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x09 = vcmpngepd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x0a = vcmpngtpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x0b = vcmpfalsepd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x0c = vcmpneq_oqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x0d = vcmpgepd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x0e = vcmpgtpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x0f = vcmptruepd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x10 = vcmpeq_ospd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x11 = vcmplt_oqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x12 = vcmple_oqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x13 = vcmpunord_spd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x14 = vcmpneq_uspd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x15 = vcmpnlt_uqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x16 = vcmpnle_uqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x17 = vcmpord_spd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x18 = vcmpeq_uspd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x19 = vcmpnge_uqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x1a = vcmpngt_uqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x1b = vcmpfalse_ospd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x1c = vcmpneq_ospd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x1d = vcmpge_oqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x1e = vcmpgt_oqpd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x19,0xc2,0xeb,0x1f = vcmptrue_uspd %xmm11, %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x08 = vcmpeq_uqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x09 = vcmpngepd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0a = vcmpngtpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0b = vcmpfalsepd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0c = vcmpneq_oqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0d = vcmpgepd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x0e = vcmpgtpd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0f = vcmptruepd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x10 = vcmpeq_ospd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x11 = vcmplt_oqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x12 = vcmple_oqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x13 = vcmpunord_spd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x14 = vcmpneq_uspd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x15 = vcmpnlt_uqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x16 = vcmpnle_uqpd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x17 = vcmpord_spd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x18 = vcmpeq_uspd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x19 = vcmpnge_uqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1a = vcmpngt_uqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1b = vcmpfalse_ospd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1c = vcmpneq_ospd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1d = vcmpge_oqpd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x1e = vcmpgt_oqpd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1f = vcmptrue_uspd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x08 = vcmpeq_uqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x09 = vcmpngess %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x0a = vcmpngtss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x0b = vcmpfalsess %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x0c = vcmpneq_oqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x0d = vcmpgess %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x0e = vcmpgtss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x0f = vcmptruess %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x10 = vcmpeq_osss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x11 = vcmplt_oqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x12 = vcmple_oqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x13 = vcmpunord_sss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x14 = vcmpneq_usss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x15 = vcmpnlt_uqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x16 = vcmpnle_uqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x17 = vcmpord_sss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x18 = vcmpeq_usss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x19 = vcmpnge_uqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x1a = vcmpngt_uqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x1b = vcmpfalse_osss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x1c = vcmpneq_osss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x1d = vcmpge_oqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x1e = vcmpgt_oqss %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1a,0xc2,0xeb,0x1f = vcmptrue_usss %xmm11, %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x08 = vcmpeq_uqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x09 = vcmpngess -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0a = vcmpngtss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0b = vcmpfalsess -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0c = vcmpneq_oqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0d = vcmpgess -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x0e = vcmpgtss -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0f = vcmptruess -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x10 = vcmpeq_osss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x11 = vcmplt_oqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x12 = vcmple_oqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x13 = vcmpunord_sss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x14 = vcmpneq_usss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x15 = vcmpnlt_uqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x16 = vcmpnle_uqss -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x17 = vcmpord_sss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x18 = vcmpeq_usss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x19 = vcmpnge_uqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1a = vcmpngt_uqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1b = vcmpfalse_osss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1c = vcmpneq_osss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1d = vcmpge_oqss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x1e = vcmpgt_oqss -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1f = vcmptrue_usss -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x08 = vcmpeq_uqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x09 = vcmpngesd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x0a = vcmpngtsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x0b = vcmpfalsesd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x0c = vcmpneq_oqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x0d = vcmpgesd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x0e = vcmpgtsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x0f = vcmptruesd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x10 = vcmpeq_ossd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x11 = vcmplt_oqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x12 = vcmple_oqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x13 = vcmpunord_ssd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x14 = vcmpneq_ussd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x15 = vcmpnlt_uqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x16 = vcmpnle_uqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x17 = vcmpord_ssd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x18 = vcmpeq_ussd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x19 = vcmpnge_uqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x1a = vcmpngt_uqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x1b = vcmpfalse_ossd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x1c = vcmpneq_ossd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x1d = vcmpge_oqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x1e = vcmpgt_oqsd %xmm11, %xmm12, %xmm13 0xc4,0x41,0x1b,0xc2,0xeb,0x1f = vcmptrue_ussd %xmm11, %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x08 = vcmpeq_uqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x09 = vcmpngesd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0a = vcmpngtsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0b = vcmpfalsesd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0c = vcmpneq_oqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0d = vcmpgesd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x0e = vcmpgtsd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0f = vcmptruesd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x10 = vcmpeq_ossd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x11 = vcmplt_oqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x12 = vcmple_oqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x13 = vcmpunord_ssd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x14 = vcmpneq_ussd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x15 = vcmpnlt_uqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x16 = vcmpnle_uqsd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x17 = vcmpord_ssd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x18 = vcmpeq_ussd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x19 = vcmpnge_uqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1a = vcmpngt_uqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1b = vcmpfalse_ossd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1c = vcmpneq_ossd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1d = vcmpge_oqsd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x1e = vcmpgt_oqsd -4(%rbx, %rcx, 8), %xmm6, %xmm2 0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1f = vcmptrue_ussd -4(%rbx, %rcx, 8), %xmm12, %xmm13 0xc4,0x41,0x78,0x2e,0xe3 = vucomiss %xmm11, %xmm12 0xc5,0x78,0x2e,0x20 = vucomiss (%rax), %xmm12 0xc4,0x41,0x78,0x2f,0xe3 = vcomiss %xmm11, %xmm12 0xc5,0x78,0x2f,0x20 = vcomiss (%rax), %xmm12 0xc4,0x41,0x79,0x2e,0xe3 = vucomisd %xmm11, %xmm12 0xc5,0x79,0x2e,0x20 = vucomisd (%rax), %xmm12 0xc4,0x41,0x79,0x2f,0xe3 = vcomisd %xmm11, %xmm12 0xc5,0x79,0x2f,0x20 = vcomisd (%rax), %xmm12 0xc5,0xfa,0x2c,0x01 = vcvttss2si (%rcx), %eax 0xc5,0x22,0x2a,0x20 = vcvtsi2ssl (%rax), %xmm11, %xmm12 0xc5,0x22,0x2a,0x20 = vcvtsi2ssl (%rax), %xmm11, %xmm12 0xc5,0xfb,0x2c,0x01 = vcvttsd2si (%rcx), %eax 0xc5,0x23,0x2a,0x20 = vcvtsi2sdl (%rax), %xmm11, %xmm12 0xc5,0x23,0x2a,0x20 = vcvtsi2sdl (%rax), %xmm11, %xmm12 0xc5,0x78,0x28,0x20 = vmovaps (%rax), %xmm12 0xc4,0x41,0x78,0x28,0xe3 = vmovaps %xmm11, %xmm12 0xc5,0x78,0x29,0x18 = vmovaps %xmm11, (%rax) 0xc5,0x79,0x28,0x20 = vmovapd (%rax), %xmm12 0xc4,0x41,0x79,0x28,0xe3 = vmovapd %xmm11, %xmm12 0xc5,0x79,0x29,0x18 = vmovapd %xmm11, (%rax) 0xc5,0x78,0x10,0x20 = vmovups (%rax), %xmm12 0xc4,0x41,0x78,0x10,0xe3 = vmovups %xmm11, %xmm12 0xc5,0x78,0x11,0x18 = vmovups %xmm11, (%rax) 0xc5,0x79,0x10,0x20 = vmovupd (%rax), %xmm12 0xc4,0x41,0x79,0x10,0xe3 = vmovupd %xmm11, %xmm12 0xc5,0x79,0x11,0x18 = vmovupd %xmm11, (%rax) 0xc5,0x78,0x13,0x18 = vmovlps %xmm11, (%rax) 0xc5,0x18,0x12,0x28 = vmovlps (%rax), %xmm12, %xmm13 0xc5,0x79,0x13,0x18 = vmovlpd %xmm11, (%rax) 0xc5,0x19,0x12,0x28 = vmovlpd (%rax), %xmm12, %xmm13 0xc5,0x78,0x17,0x18 = vmovhps %xmm11, (%rax) 0xc5,0x18,0x16,0x28 = vmovhps (%rax), %xmm12, %xmm13 0xc5,0x79,0x17,0x18 = vmovhpd %xmm11, (%rax) 0xc5,0x19,0x16,0x28 = vmovhpd (%rax), %xmm12, %xmm13 0xc4,0x41,0x18,0x16,0xeb = vmovlhps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0x12,0xeb = vmovhlps %xmm11, %xmm12, %xmm13 0xc4,0xc1,0x7a,0x2d,0xc3 = vcvtss2si %xmm11, %eax 0xc5,0xfa,0x2d,0x18 = vcvtss2si (%rax), %ebx 0xc4,0x41,0x78,0x5b,0xe2 = vcvtdq2ps %xmm10, %xmm12 0xc5,0x78,0x5b,0x20 = vcvtdq2ps (%rax), %xmm12 0xc4,0x41,0x13,0x5a,0xd4 = vcvtsd2ss %xmm12, %xmm13, %xmm10 0xc5,0x13,0x5a,0x10 = vcvtsd2ss (%rax), %xmm13, %xmm10 0xc4,0x41,0x79,0x5b,0xdc = vcvtps2dq %xmm12, %xmm11 0xc5,0x79,0x5b,0x18 = vcvtps2dq (%rax), %xmm11 0xc4,0x41,0x12,0x5a,0xd4 = vcvtss2sd %xmm12, %xmm13, %xmm10 0xc5,0x12,0x5a,0x10 = vcvtss2sd (%rax), %xmm13, %xmm10 0xc4,0x41,0x78,0x5b,0xd5 = vcvtdq2ps %xmm13, %xmm10 0xc5,0x78,0x5b,0x29 = vcvtdq2ps (%ecx), %xmm13 0xc4,0x41,0x7a,0x5b,0xdc = vcvttps2dq %xmm12, %xmm11 0xc5,0x7a,0x5b,0x18 = vcvttps2dq (%rax), %xmm11 0xc4,0x41,0x78,0x5a,0xdc = vcvtps2pd %xmm12, %xmm11 0xc5,0x78,0x5a,0x18 = vcvtps2pd (%rax), %xmm11 0xc4,0x41,0x79,0x5a,0xdc = vcvtpd2ps %xmm12, %xmm11 0xc4,0x41,0x79,0x51,0xe3 = vsqrtpd %xmm11, %xmm12 0xc5,0x79,0x51,0x20 = vsqrtpd (%rax), %xmm12 0xc4,0x41,0x78,0x51,0xe3 = vsqrtps %xmm11, %xmm12 0xc5,0x78,0x51,0x20 = vsqrtps (%rax), %xmm12 0xc4,0x41,0x1b,0x51,0xd3 = vsqrtsd %xmm11, %xmm12, %xmm10 0xc5,0x1b,0x51,0x10 = vsqrtsd (%rax), %xmm12, %xmm10 0xc4,0x41,0x1a,0x51,0xd3 = vsqrtss %xmm11, %xmm12, %xmm10 0xc5,0x1a,0x51,0x10 = vsqrtss (%rax), %xmm12, %xmm10 0xc4,0x41,0x78,0x52,0xe3 = vrsqrtps %xmm11, %xmm12 0xc5,0x78,0x52,0x20 = vrsqrtps (%rax), %xmm12 0xc4,0x41,0x1a,0x52,0xd3 = vrsqrtss %xmm11, %xmm12, %xmm10 0xc5,0x1a,0x52,0x10 = vrsqrtss (%rax), %xmm12, %xmm10 0xc4,0x41,0x78,0x53,0xe3 = vrcpps %xmm11, %xmm12 0xc5,0x78,0x53,0x20 = vrcpps (%rax), %xmm12 0xc4,0x41,0x1a,0x53,0xd3 = vrcpss %xmm11, %xmm12, %xmm10 0xc5,0x1a,0x53,0x10 = vrcpss (%rax), %xmm12, %xmm10 0xc5,0x79,0xe7,0x18 = vmovntdq %xmm11, (%rax) 0xc5,0x79,0x2b,0x18 = vmovntpd %xmm11, (%rax) 0xc5,0x78,0x2b,0x18 = vmovntps %xmm11, (%rax) 0xc5,0xf8,0xae,0x15,0xfc,0xff,0xff,0xff = vldmxcsr -4(%rip) 0xc5,0xf8,0xae,0x5c,0x24,0xfc = vstmxcsr -4(%rsp) 0xc4,0x41,0x19,0xf8,0xeb = vpsubb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf8,0x28 = vpsubb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xf9,0xeb = vpsubw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf9,0x28 = vpsubw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xfa,0xeb = vpsubd %xmm11, %xmm12, %xmm13 0xc5,0x19,0xfa,0x28 = vpsubd (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xfb,0xeb = vpsubq %xmm11, %xmm12, %xmm13 0xc5,0x19,0xfb,0x28 = vpsubq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe8,0xeb = vpsubsb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe8,0x28 = vpsubsb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe9,0xeb = vpsubsw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe9,0x28 = vpsubsw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd8,0xeb = vpsubusb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd8,0x28 = vpsubusb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd9,0xeb = vpsubusw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd9,0x28 = vpsubusw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xfc,0xeb = vpaddb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xfc,0x28 = vpaddb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xfd,0xeb = vpaddw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xfd,0x28 = vpaddw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xfe,0xeb = vpaddd %xmm11, %xmm12, %xmm13 0xc5,0x19,0xfe,0x28 = vpaddd (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd4,0xeb = vpaddq %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd4,0x28 = vpaddq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xec,0xeb = vpaddsb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xec,0x28 = vpaddsb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xed,0xeb = vpaddsw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xed,0x28 = vpaddsw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xdc,0xeb = vpaddusb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xdc,0x28 = vpaddusb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xdd,0xeb = vpaddusw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xdd,0x28 = vpaddusw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe4,0xeb = vpmulhuw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe4,0x28 = vpmulhuw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe5,0xeb = vpmulhw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe5,0x28 = vpmulhw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd5,0xeb = vpmullw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd5,0x28 = vpmullw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xf4,0xeb = vpmuludq %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf4,0x28 = vpmuludq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe0,0xeb = vpavgb %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe0,0x28 = vpavgb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe3,0xeb = vpavgw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe3,0x28 = vpavgw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xea,0xeb = vpminsw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xea,0x28 = vpminsw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xda,0xeb = vpminub %xmm11, %xmm12, %xmm13 0xc5,0x19,0xda,0x28 = vpminub (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xee,0xeb = vpmaxsw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xee,0x28 = vpmaxsw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xde,0xeb = vpmaxub %xmm11, %xmm12, %xmm13 0xc5,0x19,0xde,0x28 = vpmaxub (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xf6,0xeb = vpsadbw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf6,0x28 = vpsadbw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xf1,0xeb = vpsllw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf1,0x28 = vpsllw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xf2,0xeb = vpslld %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf2,0x28 = vpslld (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xf3,0xeb = vpsllq %xmm11, %xmm12, %xmm13 0xc5,0x19,0xf3,0x28 = vpsllq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe1,0xeb = vpsraw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe1,0x28 = vpsraw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xe2,0xeb = vpsrad %xmm11, %xmm12, %xmm13 0xc5,0x19,0xe2,0x28 = vpsrad (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd1,0xeb = vpsrlw %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd1,0x28 = vpsrlw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd2,0xeb = vpsrld %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd2,0x28 = vpsrld (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xd3,0xeb = vpsrlq %xmm11, %xmm12, %xmm13 0xc5,0x19,0xd3,0x28 = vpsrlq (%rax), %xmm12, %xmm13 0xc4,0xc1,0x11,0x72,0xf4,0x0a = vpslld $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x73,0xfc,0x0a = vpslldq $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x73,0xf4,0x0a = vpsllq $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x71,0xf4,0x0a = vpsllw $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x72,0xe4,0x0a = vpsrad $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x71,0xe4,0x0a = vpsraw $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x72,0xd4,0x0a = vpsrld $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x73,0xdc,0x0a = vpsrldq $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x73,0xd4,0x0a = vpsrlq $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x71,0xd4,0x0a = vpsrlw $10, %xmm12, %xmm13 0xc4,0xc1,0x11,0x72,0xf4,0x0a = vpslld $10, %xmm12, %xmm13 0xc4,0x41,0x19,0xdb,0xeb = vpand %xmm11, %xmm12, %xmm13 0xc5,0x19,0xdb,0x28 = vpand (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xeb,0xeb = vpor %xmm11, %xmm12, %xmm13 0xc5,0x19,0xeb,0x28 = vpor (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xef,0xeb = vpxor %xmm11, %xmm12, %xmm13 0xc5,0x19,0xef,0x28 = vpxor (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0xdf,0xeb = vpandn %xmm11, %xmm12, %xmm13 0xc5,0x19,0xdf,0x28 = vpandn (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x74,0xeb = vpcmpeqb %xmm11, %xmm12, %xmm13 0xc5,0x19,0x74,0x28 = vpcmpeqb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x75,0xeb = vpcmpeqw %xmm11, %xmm12, %xmm13 0xc5,0x19,0x75,0x28 = vpcmpeqw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x76,0xeb = vpcmpeqd %xmm11, %xmm12, %xmm13 0xc5,0x19,0x76,0x28 = vpcmpeqd (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x64,0xeb = vpcmpgtb %xmm11, %xmm12, %xmm13 0xc5,0x19,0x64,0x28 = vpcmpgtb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x65,0xeb = vpcmpgtw %xmm11, %xmm12, %xmm13 0xc5,0x19,0x65,0x28 = vpcmpgtw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x66,0xeb = vpcmpgtd %xmm11, %xmm12, %xmm13 0xc5,0x19,0x66,0x28 = vpcmpgtd (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x63,0xeb = vpacksswb %xmm11, %xmm12, %xmm13 0xc5,0x19,0x63,0x28 = vpacksswb (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x6b,0xeb = vpackssdw %xmm11, %xmm12, %xmm13 0xc5,0x19,0x6b,0x28 = vpackssdw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x67,0xeb = vpackuswb %xmm11, %xmm12, %xmm13 0xc5,0x19,0x67,0x28 = vpackuswb (%rax), %xmm12, %xmm13 0xc4,0x41,0x79,0x70,0xec,0x04 = vpshufd $4, %xmm12, %xmm13 0xc5,0x79,0x70,0x28,0x04 = vpshufd $4, (%rax), %xmm13 0xc4,0x41,0x7a,0x70,0xec,0x04 = vpshufhw $4, %xmm12, %xmm13 0xc5,0x7a,0x70,0x28,0x04 = vpshufhw $4, (%rax), %xmm13 0xc4,0x41,0x7b,0x70,0xec,0x04 = vpshuflw $4, %xmm12, %xmm13 0xc5,0x7b,0x70,0x28,0x04 = vpshuflw $4, (%rax), %xmm13 0xc4,0x41,0x19,0x60,0xeb = vpunpcklbw %xmm11, %xmm12, %xmm13 0xc5,0x19,0x60,0x28 = vpunpcklbw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x61,0xeb = vpunpcklwd %xmm11, %xmm12, %xmm13 0xc5,0x19,0x61,0x28 = vpunpcklwd (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x62,0xeb = vpunpckldq %xmm11, %xmm12, %xmm13 0xc5,0x19,0x62,0x28 = vpunpckldq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x6c,0xeb = vpunpcklqdq %xmm11, %xmm12, %xmm13 0xc5,0x19,0x6c,0x28 = vpunpcklqdq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x68,0xeb = vpunpckhbw %xmm11, %xmm12, %xmm13 0xc5,0x19,0x68,0x28 = vpunpckhbw (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x69,0xeb = vpunpckhwd %xmm11, %xmm12, %xmm13 0xc5,0x19,0x69,0x28 = vpunpckhwd (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x6a,0xeb = vpunpckhdq %xmm11, %xmm12, %xmm13 0xc5,0x19,0x6a,0x28 = vpunpckhdq (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x6d,0xeb = vpunpckhqdq %xmm11, %xmm12, %xmm13 0xc5,0x19,0x6d,0x28 = vpunpckhqdq (%rax), %xmm12, %xmm13 0xc5,0x19,0xc4,0xe8,0x07 = vpinsrw $7, %eax, %xmm12, %xmm13 0xc5,0x19,0xc4,0x28,0x07 = vpinsrw $7, (%rax), %xmm12, %xmm13 0xc4,0xc1,0x79,0xc5,0xc4,0x07 = vpextrw $7, %xmm12, %eax 0xc4,0xc1,0x79,0xd7,0xc4 = vpmovmskb %xmm12, %eax 0xc4,0x41,0x79,0xf7,0xfe = vmaskmovdqu %xmm14, %xmm15 0xc5,0x79,0x6e,0xf0 = vmovd %eax, %xmm14 0xc5,0x79,0x6e,0x30 = vmovd (%rax), %xmm14 0xc5,0x79,0x7e,0x30 = vmovd %xmm14, (%rax) 0xc4,0x61,0xf9,0x6e,0xf0 = vmovd %rax, %xmm14 0xc4,0xe1,0xf9,0x7e,0xc0 = vmovd %xmm0, %rax 0xc5,0x79,0xd6,0x30 = vmovq %xmm14, (%rax) 0xc4,0x41,0x7a,0x7e,0xe6 = vmovq %xmm14, %xmm12 0xc5,0x7a,0x7e,0x30 = vmovq (%rax), %xmm14 0xc4,0x61,0xf9,0x6e,0xf0 = vmovq %rax, %xmm14 0xc4,0x61,0xf9,0x7e,0xf0 = vmovq %xmm14, %rax 0xc4,0x41,0x7b,0xe6,0xe3 = vcvtpd2dq %xmm11, %xmm12 0xc4,0x41,0x7a,0xe6,0xe3 = vcvtdq2pd %xmm11, %xmm12 0xc5,0x7a,0xe6,0x20 = vcvtdq2pd (%rax), %xmm12 0xc4,0x41,0x7a,0x16,0xe3 = vmovshdup %xmm11, %xmm12 0xc5,0x7a,0x16,0x20 = vmovshdup (%rax), %xmm12 0xc4,0x41,0x7a,0x12,0xe3 = vmovsldup %xmm11, %xmm12 0xc5,0x7a,0x12,0x20 = vmovsldup (%rax), %xmm12 0xc4,0x41,0x7b,0x12,0xe3 = vmovddup %xmm11, %xmm12 0xc5,0x7b,0x12,0x20 = vmovddup (%rax), %xmm12 0xc4,0x41,0x1b,0xd0,0xeb = vaddsubps %xmm11, %xmm12, %xmm13 0xc5,0x23,0xd0,0x20 = vaddsubps (%rax), %xmm11, %xmm12 0xc4,0x41,0x19,0xd0,0xeb = vaddsubpd %xmm11, %xmm12, %xmm13 0xc5,0x21,0xd0,0x20 = vaddsubpd (%rax), %xmm11, %xmm12 0xc4,0x41,0x1b,0x7c,0xeb = vhaddps %xmm11, %xmm12, %xmm13 0xc5,0x1b,0x7c,0x28 = vhaddps (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x7c,0xeb = vhaddpd %xmm11, %xmm12, %xmm13 0xc5,0x19,0x7c,0x28 = vhaddpd (%rax), %xmm12, %xmm13 0xc4,0x41,0x1b,0x7d,0xeb = vhsubps %xmm11, %xmm12, %xmm13 0xc5,0x1b,0x7d,0x28 = vhsubps (%rax), %xmm12, %xmm13 0xc4,0x41,0x19,0x7d,0xeb = vhsubpd %xmm11, %xmm12, %xmm13 0xc5,0x19,0x7d,0x28 = vhsubpd (%rax), %xmm12, %xmm13 0xc4,0x42,0x79,0x1c,0xe3 = vpabsb %xmm11, %xmm12 0xc4,0x62,0x79,0x1c,0x20 = vpabsb (%rax), %xmm12 0xc4,0x42,0x79,0x1d,0xe3 = vpabsw %xmm11, %xmm12 0xc4,0x62,0x79,0x1d,0x20 = vpabsw (%rax), %xmm12 0xc4,0x42,0x79,0x1e,0xe3 = vpabsd %xmm11, %xmm12 0xc4,0x62,0x79,0x1e,0x20 = vpabsd (%rax), %xmm12 0xc4,0x42,0x19,0x01,0xeb = vphaddw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x01,0x28 = vphaddw (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x02,0xeb = vphaddd %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x02,0x28 = vphaddd (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x03,0xeb = vphaddsw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x03,0x28 = vphaddsw (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x05,0xeb = vphsubw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x05,0x28 = vphsubw (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x06,0xeb = vphsubd %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x06,0x28 = vphsubd (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x07,0xeb = vphsubsw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x07,0x28 = vphsubsw (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x04,0xeb = vpmaddubsw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x04,0x28 = vpmaddubsw (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x00,0xeb = vpshufb %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x00,0x28 = vpshufb (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x08,0xeb = vpsignb %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x08,0x28 = vpsignb (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x09,0xeb = vpsignw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x09,0x28 = vpsignw (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x0a,0xeb = vpsignd %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x0a,0x28 = vpsignd (%rax), %xmm12, %xmm13 0xc4,0x42,0x19,0x0b,0xeb = vpmulhrsw %xmm11, %xmm12, %xmm13 0xc4,0x62,0x19,0x0b,0x28 = vpmulhrsw (%rax), %xmm12, %xmm13 0xc4,0x43,0x19,0x0f,0xeb,0x07 = vpalignr $7, %xmm11, %xmm12, %xmm13 0xc4,0x63,0x19,0x0f,0x28,0x07 = vpalignr $7, (%rax), %xmm12, %xmm13 0xc4,0x43,0x19,0x0b,0xeb,0x07 = vroundsd $7, %xmm11, %xmm12, %xmm13 0xc4,0x63,0x19,0x0b,0x28,0x07 = vroundsd $7, (%rax), %xmm12, %xmm13 0xc4,0x43,0x19,0x0a,0xeb,0x07 = vroundss $7, %xmm11, %xmm12, %xmm13 0xc4,0x63,0x19,0x0a,0x28,0x07 = vroundss $7, (%rax), %xmm12, %xmm13 0xc4,0x43,0x79,0x09,0xec,0x07 = vroundpd $7, %xmm12, %xmm13 0xc4,0x63,0x79,0x09,0x28,0x07 = vroundpd $7, (%rax), %xmm13 0xc4,0x43,0x79,0x08,0xec,0x07 = vroundps $7, %xmm12, %xmm13 0xc4,0x63,0x79,0x08,0x28,0x07 = vroundps $7, (%rax), %xmm13 0xc4,0x42,0x79,0x41,0xec = vphminposuw %xmm12, %xmm13 0xc4,0x62,0x79,0x41,0x20 = vphminposuw (%rax), %xmm12 0xc4,0x42,0x11,0x2b,0xdc = vpackusdw %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x2b,0x28 = vpackusdw (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x29,0xdc = vpcmpeqq %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x29,0x28 = vpcmpeqq (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x38,0xdc = vpminsb %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x38,0x28 = vpminsb (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x39,0xdc = vpminsd %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x39,0x28 = vpminsd (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x3b,0xdc = vpminud %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x3b,0x28 = vpminud (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x3a,0xdc = vpminuw %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x3a,0x28 = vpminuw (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x3c,0xdc = vpmaxsb %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x3c,0x28 = vpmaxsb (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x3d,0xdc = vpmaxsd %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x3d,0x28 = vpmaxsd (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x3f,0xdc = vpmaxud %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x3f,0x28 = vpmaxud (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x3e,0xdc = vpmaxuw %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x3e,0x28 = vpmaxuw (%rax), %xmm12, %xmm13 0xc4,0x42,0x11,0x28,0xdc = vpmuldq %xmm12, %xmm13, %xmm11 0xc4,0x62,0x19,0x28,0x28 = vpmuldq (%rax), %xmm12, %xmm13 0xc4,0x42,0x51,0x40,0xdc = vpmulld %xmm12, %xmm5, %xmm11 0xc4,0x62,0x51,0x40,0x28 = vpmulld (%rax), %xmm5, %xmm13 0xc4,0x43,0x51,0x0c,0xdc,0x03 = vblendps $3, %xmm12, %xmm5, %xmm11 0xc4,0x63,0x51,0x0c,0x18,0x03 = vblendps $3, (%rax), %xmm5, %xmm11 0xc4,0x43,0x51,0x0d,0xdc,0x03 = vblendpd $3, %xmm12, %xmm5, %xmm11 0xc4,0x63,0x51,0x0d,0x18,0x03 = vblendpd $3, (%rax), %xmm5, %xmm11 0xc4,0x43,0x51,0x0e,0xdc,0x03 = vpblendw $3, %xmm12, %xmm5, %xmm11 0xc4,0x63,0x51,0x0e,0x18,0x03 = vpblendw $3, (%rax), %xmm5, %xmm11 0xc4,0x43,0x51,0x42,0xdc,0x03 = vmpsadbw $3, %xmm12, %xmm5, %xmm11 0xc4,0x63,0x51,0x42,0x18,0x03 = vmpsadbw $3, (%rax), %xmm5, %xmm11 0xc4,0x43,0x51,0x40,0xdc,0x03 = vdpps $3, %xmm12, %xmm5, %xmm11 0xc4,0x63,0x51,0x40,0x18,0x03 = vdpps $3, (%rax), %xmm5, %xmm11 0xc4,0x43,0x51,0x41,0xdc,0x03 = vdppd $3, %xmm12, %xmm5, %xmm11 0xc4,0x63,0x51,0x41,0x18,0x03 = vdppd $3, (%rax), %xmm5, %xmm11 0xc4,0x63,0x21,0x4b,0xed,0xc0 = vblendvpd %xmm12, %xmm5, %xmm11, %xmm13 0xc4,0x63,0x21,0x4b,0x28,0xc0 = vblendvpd %xmm12, (%rax), %xmm11, %xmm13 0xc4,0x63,0x21,0x4a,0xed,0xc0 = vblendvps %xmm12, %xmm5, %xmm11, %xmm13 0xc4,0x63,0x21,0x4a,0x28,0xc0 = vblendvps %xmm12, (%rax), %xmm11, %xmm13 0xc4,0x63,0x21,0x4c,0xed,0xc0 = vpblendvb %xmm12, %xmm5, %xmm11, %xmm13 0xc4,0x63,0x21,0x4c,0x28,0xc0 = vpblendvb %xmm12, (%rax), %xmm11, %xmm13 0xc4,0x42,0x79,0x20,0xd4 = vpmovsxbw %xmm12, %xmm10 0xc4,0x62,0x79,0x20,0x20 = vpmovsxbw (%rax), %xmm12 0xc4,0x42,0x79,0x23,0xd4 = vpmovsxwd %xmm12, %xmm10 0xc4,0x62,0x79,0x23,0x20 = vpmovsxwd (%rax), %xmm12 0xc4,0x42,0x79,0x25,0xd4 = vpmovsxdq %xmm12, %xmm10 0xc4,0x62,0x79,0x25,0x20 = vpmovsxdq (%rax), %xmm12 0xc4,0x42,0x79,0x30,0xd4 = vpmovzxbw %xmm12, %xmm10 0xc4,0x62,0x79,0x30,0x20 = vpmovzxbw (%rax), %xmm12 0xc4,0x42,0x79,0x33,0xd4 = vpmovzxwd %xmm12, %xmm10 0xc4,0x62,0x79,0x33,0x20 = vpmovzxwd (%rax), %xmm12 0xc4,0x42,0x79,0x35,0xd4 = vpmovzxdq %xmm12, %xmm10 0xc4,0x62,0x79,0x35,0x20 = vpmovzxdq (%rax), %xmm12 0xc4,0x42,0x79,0x22,0xd4 = vpmovsxbq %xmm12, %xmm10 0xc4,0x62,0x79,0x22,0x20 = vpmovsxbq (%rax), %xmm12 0xc4,0x42,0x79,0x32,0xd4 = vpmovzxbq %xmm12, %xmm10 0xc4,0x62,0x79,0x32,0x20 = vpmovzxbq (%rax), %xmm12 0xc4,0x42,0x79,0x21,0xd4 = vpmovsxbd %xmm12, %xmm10 0xc4,0x62,0x79,0x21,0x20 = vpmovsxbd (%rax), %xmm12 0xc4,0x42,0x79,0x24,0xd4 = vpmovsxwq %xmm12, %xmm10 0xc4,0x62,0x79,0x24,0x20 = vpmovsxwq (%rax), %xmm12 0xc4,0x42,0x79,0x31,0xd4 = vpmovzxbd %xmm12, %xmm10 0xc4,0x62,0x79,0x31,0x20 = vpmovzxbd (%rax), %xmm12 0xc4,0x42,0x79,0x34,0xd4 = vpmovzxwq %xmm12, %xmm10 0xc4,0x62,0x79,0x34,0x20 = vpmovzxwq (%rax), %xmm12 0xc4,0xc1,0x79,0xc5,0xc4,0x07 = vpextrw $7, %xmm12, %eax 0xc4,0x63,0x79,0x15,0x20,0x07 = vpextrw $7, %xmm12, (%rax) 0xc4,0x63,0x79,0x16,0xe0,0x07 = vpextrd $7, %xmm12, %eax 0xc4,0x63,0x79,0x16,0x20,0x07 = vpextrd $7, %xmm12, (%rax) 0xc4,0x63,0x79,0x14,0xe0,0x07 = vpextrb $7, %xmm12, %eax 0xc4,0x63,0x79,0x14,0x20,0x07 = vpextrb $7, %xmm12, (%rax) 0xc4,0x63,0xf9,0x16,0xe1,0x07 = vpextrq $7, %xmm12, %rcx 0xc4,0x63,0xf9,0x16,0x21,0x07 = vpextrq $7, %xmm12, (%rcx) 0xc4,0x63,0x79,0x17,0x20,0x07 = vextractps $7, %xmm12, (%rax) 0xc4,0x63,0x79,0x17,0xe0,0x07 = vextractps $7, %xmm12, %eax 0xc5,0x19,0xc4,0xd0,0x07 = vpinsrw $7, %eax, %xmm12, %xmm10 0xc5,0x19,0xc4,0x10,0x07 = vpinsrw $7, (%rax), %xmm12, %xmm10 0xc4,0x63,0x19,0x20,0xd0,0x07 = vpinsrb $7, %eax, %xmm12, %xmm10 0xc4,0x63,0x19,0x20,0x10,0x07 = vpinsrb $7, (%rax), %xmm12, %xmm10 0xc4,0x63,0x19,0x22,0xd0,0x07 = vpinsrd $7, %eax, %xmm12, %xmm10 0xc4,0x63,0x19,0x22,0x10,0x07 = vpinsrd $7, (%rax), %xmm12, %xmm10 0xc4,0x63,0x99,0x22,0xd0,0x07 = vpinsrq $7, %rax, %xmm12, %xmm10 0xc4,0x63,0x99,0x22,0x10,0x07 = vpinsrq $7, (%rax), %xmm12, %xmm10 0xc4,0x43,0x29,0x21,0xdc,0x07 = vinsertps $7, %xmm12, %xmm10, %xmm11 0xc4,0x63,0x29,0x21,0x18,0x07 = vinsertps $7, (%rax), %xmm10, %xmm11 0xc4,0x42,0x79,0x17,0xd4 = vptest %xmm12, %xmm10 0xc4,0x62,0x79,0x17,0x20 = vptest (%rax), %xmm12 0xc4,0x62,0x79,0x2a,0x20 = vmovntdqa (%rax), %xmm12 0xc4,0x42,0x29,0x37,0xdc = vpcmpgtq %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x37,0x28 = vpcmpgtq (%rax), %xmm10, %xmm13 0xc4,0x43,0x79,0x62,0xd4,0x07 = vpcmpistrm $7, %xmm12, %xmm10 0xc4,0x63,0x79,0x62,0x10,0x07 = vpcmpistrm $7, (%rax), %xmm10 0xc4,0x43,0x79,0x60,0xd4,0x07 = vpcmpestrm $7, %xmm12, %xmm10 0xc4,0x63,0x79,0x60,0x10,0x07 = vpcmpestrm $7, (%rax), %xmm10 0xc4,0x43,0x79,0x63,0xd4,0x07 = vpcmpistri $7, %xmm12, %xmm10 0xc4,0x63,0x79,0x63,0x10,0x07 = vpcmpistri $7, (%rax), %xmm10 0xc4,0x43,0x79,0x61,0xd4,0x07 = vpcmpestri $7, %xmm12, %xmm10 0xc4,0x63,0x79,0x61,0x10,0x07 = vpcmpestri $7, (%rax), %xmm10 0xc4,0x42,0x79,0xdb,0xd4 = vaesimc %xmm12, %xmm10 0xc4,0x62,0x79,0xdb,0x20 = vaesimc (%rax), %xmm12 0xc4,0x42,0x29,0xdc,0xdc = vaesenc %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xdc,0x28 = vaesenc (%rax), %xmm10, %xmm13 0xc4,0x42,0x29,0xdd,0xdc = vaesenclast %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xdd,0x28 = vaesenclast (%rax), %xmm10, %xmm13 0xc4,0x42,0x29,0xde,0xdc = vaesdec %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xde,0x28 = vaesdec (%rax), %xmm10, %xmm13 0xc4,0x42,0x29,0xdf,0xdc = vaesdeclast %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xdf,0x28 = vaesdeclast (%rax), %xmm10, %xmm13 0xc4,0x43,0x79,0xdf,0xd4,0x07 = vaeskeygenassist $7, %xmm12, %xmm10 0xc4,0x63,0x79,0xdf,0x10,0x07 = vaeskeygenassist $7, (%rax), %xmm10 0xc4,0x41,0x18,0xc2,0xeb,0x08 = vcmpeq_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x09 = vcmpngeps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0a = vcmpngtps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0b = vcmpfalseps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0c = vcmpneq_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0d = vcmpgeps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0e = vcmpgtps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x0f = vcmptrueps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x10 = vcmpeq_osps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x11 = vcmplt_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x12 = vcmple_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x13 = vcmpunord_sps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x14 = vcmpneq_usps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x15 = vcmpnlt_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x16 = vcmpnle_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x17 = vcmpord_sps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x18 = vcmpeq_usps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x19 = vcmpnge_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1a = vcmpngt_uqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1b = vcmpfalse_osps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1c = vcmpneq_osps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1d = vcmpge_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1e = vcmpgt_oqps %xmm11, %xmm12, %xmm13 0xc4,0x41,0x18,0xc2,0xeb,0x1f = vcmptrue_usps %xmm11, %xmm12, %xmm13 0xc5,0x7c,0x28,0x20 = vmovaps (%rax), %ymm12 0xc4,0x41,0x7c,0x28,0xe3 = vmovaps %ymm11, %ymm12 0xc5,0x7c,0x29,0x18 = vmovaps %ymm11, (%rax) 0xc5,0x7d,0x28,0x20 = vmovapd (%rax), %ymm12 0xc4,0x41,0x7d,0x28,0xe3 = vmovapd %ymm11, %ymm12 0xc5,0x7d,0x29,0x18 = vmovapd %ymm11, (%rax) 0xc5,0x7c,0x10,0x20 = vmovups (%rax), %ymm12 0xc4,0x41,0x7c,0x10,0xe3 = vmovups %ymm11, %ymm12 0xc5,0x7c,0x11,0x18 = vmovups %ymm11, (%rax) 0xc5,0x7d,0x10,0x20 = vmovupd (%rax), %ymm12 0xc4,0x41,0x7d,0x10,0xe3 = vmovupd %ymm11, %ymm12 0xc5,0x7d,0x11,0x18 = vmovupd %ymm11, (%rax) 0xc4,0xc1,0x1c,0x15,0xe3 = vunpckhps %ymm11, %ymm12, %ymm4 0xc4,0xc1,0x1d,0x15,0xe3 = vunpckhpd %ymm11, %ymm12, %ymm4 0xc4,0xc1,0x1c,0x14,0xe3 = vunpcklps %ymm11, %ymm12, %ymm4 0xc4,0xc1,0x1d,0x14,0xe3 = vunpcklpd %ymm11, %ymm12, %ymm4 0xc5,0x1c,0x15,0x54,0xcb,0xfc = vunpckhps -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1d,0x15,0x54,0xcb,0xfc = vunpckhpd -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1c,0x14,0x54,0xcb,0xfc = vunpcklps -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1d,0x14,0x54,0xcb,0xfc = vunpcklpd -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x7d,0xe7,0x18 = vmovntdq %ymm11, (%rax) 0xc5,0x7d,0x2b,0x18 = vmovntpd %ymm11, (%rax) 0xc5,0x7c,0x2b,0x18 = vmovntps %ymm11, (%rax) 0xc4,0xc1,0x78,0x50,0xc4 = vmovmskps %xmm12, %eax 0xc4,0xc1,0x79,0x50,0xc4 = vmovmskpd %xmm12, %eax 0xc4,0xc1,0x5c,0x5f,0xf4 = vmaxps %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5d,0x5f,0xf4 = vmaxpd %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5c,0x5d,0xf4 = vminps %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5d,0x5d,0xf4 = vminpd %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5c,0x5c,0xf4 = vsubps %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5d,0x5c,0xf4 = vsubpd %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5c,0x5e,0xf4 = vdivps %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5d,0x5e,0xf4 = vdivpd %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5c,0x58,0xf4 = vaddps %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5d,0x58,0xf4 = vaddpd %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5c,0x59,0xf4 = vmulps %ymm12, %ymm4, %ymm6 0xc4,0xc1,0x5d,0x59,0xf4 = vmulpd %ymm12, %ymm4, %ymm6 0xc5,0xdc,0x5f,0x30 = vmaxps (%rax), %ymm4, %ymm6 0xc5,0xdd,0x5f,0x30 = vmaxpd (%rax), %ymm4, %ymm6 0xc5,0xdc,0x5d,0x30 = vminps (%rax), %ymm4, %ymm6 0xc5,0xdd,0x5d,0x30 = vminpd (%rax), %ymm4, %ymm6 0xc5,0xdc,0x5c,0x30 = vsubps (%rax), %ymm4, %ymm6 0xc5,0xdd,0x5c,0x30 = vsubpd (%rax), %ymm4, %ymm6 0xc5,0xdc,0x5e,0x30 = vdivps (%rax), %ymm4, %ymm6 0xc5,0xdd,0x5e,0x30 = vdivpd (%rax), %ymm4, %ymm6 0xc5,0xdc,0x58,0x30 = vaddps (%rax), %ymm4, %ymm6 0xc5,0xdd,0x58,0x30 = vaddpd (%rax), %ymm4, %ymm6 0xc5,0xdc,0x59,0x30 = vmulps (%rax), %ymm4, %ymm6 0xc5,0xdd,0x59,0x30 = vmulpd (%rax), %ymm4, %ymm6 0xc4,0x41,0x7d,0x51,0xe3 = vsqrtpd %ymm11, %ymm12 0xc5,0x7d,0x51,0x20 = vsqrtpd (%rax), %ymm12 0xc4,0x41,0x7c,0x51,0xe3 = vsqrtps %ymm11, %ymm12 0xc5,0x7c,0x51,0x20 = vsqrtps (%rax), %ymm12 0xc4,0x41,0x7c,0x52,0xe3 = vrsqrtps %ymm11, %ymm12 0xc5,0x7c,0x52,0x20 = vrsqrtps (%rax), %ymm12 0xc4,0x41,0x7c,0x53,0xe3 = vrcpps %ymm11, %ymm12 0xc5,0x7c,0x53,0x20 = vrcpps (%rax), %ymm12 0xc4,0x41,0x0c,0x54,0xdc = vandps %ymm12, %ymm14, %ymm11 0xc4,0x41,0x0d,0x54,0xdc = vandpd %ymm12, %ymm14, %ymm11 0xc5,0x1c,0x54,0x54,0xcb,0xfc = vandps -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1d,0x54,0x54,0xcb,0xfc = vandpd -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc4,0x41,0x0c,0x56,0xdc = vorps %ymm12, %ymm14, %ymm11 0xc4,0x41,0x0d,0x56,0xdc = vorpd %ymm12, %ymm14, %ymm11 0xc5,0x1c,0x56,0x54,0xcb,0xfc = vorps -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1d,0x56,0x54,0xcb,0xfc = vorpd -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc4,0x41,0x0c,0x57,0xdc = vxorps %ymm12, %ymm14, %ymm11 0xc4,0x41,0x0d,0x57,0xdc = vxorpd %ymm12, %ymm14, %ymm11 0xc5,0x1c,0x57,0x54,0xcb,0xfc = vxorps -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1d,0x57,0x54,0xcb,0xfc = vxorpd -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc4,0x41,0x0c,0x55,0xdc = vandnps %ymm12, %ymm14, %ymm11 0xc4,0x41,0x0d,0x55,0xdc = vandnpd %ymm12, %ymm14, %ymm11 0xc5,0x1c,0x55,0x54,0xcb,0xfc = vandnps -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc5,0x1d,0x55,0x54,0xcb,0xfc = vandnpd -4(%rbx, %rcx, 8), %ymm12, %ymm10 0xc4,0x41,0x7c,0x5a,0xe5 = vcvtps2pd %xmm13, %ymm12 0xc5,0x7c,0x5a,0x20 = vcvtps2pd (%rax), %ymm12 0xc4,0x41,0x7e,0xe6,0xe5 = vcvtdq2pd %xmm13, %ymm12 0xc5,0x7e,0xe6,0x20 = vcvtdq2pd (%rax), %ymm12 0xc4,0x41,0x7c,0x5b,0xd4 = vcvtdq2ps %ymm12, %ymm10 0xc5,0x7c,0x5b,0x20 = vcvtdq2ps (%rax), %ymm12 0xc4,0x41,0x7d,0x5b,0xd4 = vcvtps2dq %ymm12, %ymm10 0xc5,0x7d,0x5b,0x10 = vcvtps2dq (%rax), %ymm10 0xc4,0x41,0x7e,0x5b,0xd4 = vcvttps2dq %ymm12, %ymm10 0xc5,0x7e,0x5b,0x10 = vcvttps2dq (%rax), %ymm10 0xc4,0x41,0x79,0xe6,0xd3 = vcvttpd2dq %xmm11, %xmm10 0xc4,0x41,0x7d,0xe6,0xd4 = vcvttpd2dq %ymm12, %xmm10 0xc4,0x41,0x79,0xe6,0xd3 = vcvttpd2dqx %xmm11, %xmm10 0xc5,0x79,0xe6,0x18 = vcvttpd2dqx (%rax), %xmm11 0xc4,0x41,0x7d,0xe6,0xdc = vcvttpd2dqy %ymm12, %xmm11 0xc5,0x7d,0xe6,0x18 = vcvttpd2dqy (%rax), %xmm11 0xc4,0x41,0x7d,0x5a,0xd4 = vcvtpd2ps %ymm12, %xmm10 0xc4,0x41,0x79,0x5a,0xd3 = vcvtpd2psx %xmm11, %xmm10 0xc5,0x79,0x5a,0x18 = vcvtpd2psx (%rax), %xmm11 0xc4,0x41,0x7d,0x5a,0xdc = vcvtpd2psy %ymm12, %xmm11 0xc5,0x7d,0x5a,0x18 = vcvtpd2psy (%rax), %xmm11 0xc4,0x41,0x7f,0xe6,0xd4 = vcvtpd2dq %ymm12, %xmm10 0xc4,0x41,0x7f,0xe6,0xdc = vcvtpd2dqy %ymm12, %xmm11 0xc5,0x7f,0xe6,0x18 = vcvtpd2dqy (%rax), %xmm11 0xc4,0x41,0x7b,0xe6,0xd3 = vcvtpd2dqx %xmm11, %xmm10 0xc5,0x7b,0xe6,0x18 = vcvtpd2dqx (%rax), %xmm11 0xc4,0x41,0x1c,0xc2,0xeb,0x00 = vcmpeqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x02 = vcmpleps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x01 = vcmpltps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x04 = vcmpneqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x06 = vcmpnleps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x05 = vcmpnltps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x07 = vcmpordps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x03 = vcmpunordps %ymm11, %ymm12, %ymm13 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x00 = vcmpeqps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x02 = vcmpleps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x01 = vcmpltps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x04 = vcmpneqps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x06 = vcmpnleps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x05 = vcmpnltps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x4c,0xc2,0x64,0xcb,0xfc,0x07 = vcmpordps -4(%rbx, %rcx, 8), %ymm6, %ymm12 0xc5,0x1c,0xc2,0x6c,0xcb,0xfc,0x03 = vcmpunordps -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x00 = vcmpeqpd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x02 = vcmplepd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x01 = vcmpltpd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x04 = vcmpneqpd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x06 = vcmpnlepd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x05 = vcmpnltpd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x07 = vcmpordpd %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1d,0xc2,0xeb,0x03 = vcmpunordpd %ymm11, %ymm12, %ymm13 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x00 = vcmpeqpd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x02 = vcmplepd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x01 = vcmpltpd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x04 = vcmpneqpd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x06 = vcmpnlepd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x05 = vcmpnltpd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc5,0x4d,0xc2,0x64,0xcb,0xfc,0x07 = vcmpordpd -4(%rbx, %rcx, 8), %ymm6, %ymm12 0xc5,0x1d,0xc2,0x6c,0xcb,0xfc,0x03 = vcmpunordpd -4(%rbx, %rcx, 8), %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x08 = vcmpeq_uqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x09 = vcmpngeps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x0a = vcmpngtps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x0b = vcmpfalseps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x0c = vcmpneq_oqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x0d = vcmpgeps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x0e = vcmpgtps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x0f = vcmptrueps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x10 = vcmpeq_osps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x11 = vcmplt_oqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x12 = vcmple_oqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x13 = vcmpunord_sps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x14 = vcmpneq_usps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x15 = vcmpnlt_uqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x16 = vcmpnle_uqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x17 = vcmpord_sps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x18 = vcmpeq_usps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x19 = vcmpnge_uqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x1a = vcmpngt_uqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x1b = vcmpfalse_osps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x1c = vcmpneq_osps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x1d = vcmpge_oqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x1e = vcmpgt_oqps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1c,0xc2,0xeb,0x1f = vcmptrue_usps %ymm11, %ymm12, %ymm13 0xc4,0x41,0x1f,0xd0,0xeb = vaddsubps %ymm11, %ymm12, %ymm13 0xc5,0x27,0xd0,0x20 = vaddsubps (%rax), %ymm11, %ymm12 0xc4,0x41,0x1d,0xd0,0xeb = vaddsubpd %ymm11, %ymm12, %ymm13 0xc5,0x25,0xd0,0x20 = vaddsubpd (%rax), %ymm11, %ymm12 0xc4,0x41,0x1f,0x7c,0xeb = vhaddps %ymm11, %ymm12, %ymm13 0xc5,0x1f,0x7c,0x28 = vhaddps (%rax), %ymm12, %ymm13 0xc4,0x41,0x1d,0x7c,0xeb = vhaddpd %ymm11, %ymm12, %ymm13 0xc5,0x1d,0x7c,0x28 = vhaddpd (%rax), %ymm12, %ymm13 0xc4,0x41,0x1f,0x7d,0xeb = vhsubps %ymm11, %ymm12, %ymm13 0xc5,0x1f,0x7d,0x28 = vhsubps (%rax), %ymm12, %ymm13 0xc4,0x41,0x1d,0x7d,0xeb = vhsubpd %ymm11, %ymm12, %ymm13 0xc5,0x1d,0x7d,0x28 = vhsubpd (%rax), %ymm12, %ymm13 0xc4,0x43,0x2d,0x0c,0xdc,0x03 = vblendps $3, %ymm12, %ymm10, %ymm11 0xc4,0x63,0x2d,0x0c,0x18,0x03 = vblendps $3, (%rax), %ymm10, %ymm11 0xc4,0x43,0x2d,0x0d,0xdc,0x03 = vblendpd $3, %ymm12, %ymm10, %ymm11 0xc4,0x63,0x2d,0x0d,0x18,0x03 = vblendpd $3, (%rax), %ymm10, %ymm11 0xc4,0x43,0x2d,0x40,0xdc,0x03 = vdpps $3, %ymm12, %ymm10, %ymm11 0xc4,0x63,0x2d,0x40,0x18,0x03 = vdpps $3, (%rax), %ymm10, %ymm11 0xc4,0x62,0x7d,0x1a,0x20 = vbroadcastf128 (%rax), %ymm12 0xc4,0x62,0x7d,0x19,0x20 = vbroadcastsd (%rax), %ymm12 0xc4,0x62,0x79,0x18,0x20 = vbroadcastss (%rax), %xmm12 0xc4,0x62,0x7d,0x18,0x20 = vbroadcastss (%rax), %ymm12 0xc4,0x43,0x1d,0x18,0xd4,0x07 = vinsertf128 $7, %xmm12, %ymm12, %ymm10 0xc4,0x63,0x1d,0x18,0x10,0x07 = vinsertf128 $7, (%rax), %ymm12, %ymm10 0xc4,0x43,0x7d,0x19,0xe4,0x07 = vextractf128 $7, %ymm12, %xmm12 0xc4,0x63,0x7d,0x19,0x20,0x07 = vextractf128 $7, %ymm12, (%rax) 0xc4,0x62,0x29,0x2f,0x20 = vmaskmovpd %xmm12, %xmm10, (%rax) 0xc4,0x62,0x2d,0x2f,0x20 = vmaskmovpd %ymm12, %ymm10, (%rax) 0xc4,0x62,0x19,0x2d,0x10 = vmaskmovpd (%rax), %xmm12, %xmm10 0xc4,0x62,0x1d,0x2d,0x10 = vmaskmovpd (%rax), %ymm12, %ymm10 0xc4,0x62,0x29,0x2e,0x20 = vmaskmovps %xmm12, %xmm10, (%rax) 0xc4,0x62,0x2d,0x2e,0x20 = vmaskmovps %ymm12, %ymm10, (%rax) 0xc4,0x62,0x19,0x2c,0x10 = vmaskmovps (%rax), %xmm12, %xmm10 0xc4,0x62,0x1d,0x2c,0x10 = vmaskmovps (%rax), %ymm12, %ymm10 0xc4,0x43,0x79,0x04,0xd3,0x07 = vpermilps $7, %xmm11, %xmm10 0xc4,0x43,0x7d,0x04,0xda,0x07 = vpermilps $7, %ymm10, %ymm11 0xc4,0x63,0x79,0x04,0x10,0x07 = vpermilps $7, (%rax), %xmm10 0xc4,0x63,0x7d,0x04,0x10,0x07 = vpermilps $7, (%rax), %ymm10 0xc4,0x42,0x29,0x0c,0xdb = vpermilps %xmm11, %xmm10, %xmm11 0xc4,0x42,0x2d,0x0c,0xdb = vpermilps %ymm11, %ymm10, %ymm11 0xc4,0x62,0x29,0x0c,0x28 = vpermilps (%rax), %xmm10, %xmm13 0xc4,0x62,0x2d,0x0c,0x18 = vpermilps (%rax), %ymm10, %ymm11 0xc4,0x43,0x79,0x05,0xd3,0x07 = vpermilpd $7, %xmm11, %xmm10 0xc4,0x43,0x7d,0x05,0xda,0x07 = vpermilpd $7, %ymm10, %ymm11 0xc4,0x63,0x79,0x05,0x10,0x07 = vpermilpd $7, (%rax), %xmm10 0xc4,0x63,0x7d,0x05,0x10,0x07 = vpermilpd $7, (%rax), %ymm10 0xc4,0x42,0x29,0x0d,0xdb = vpermilpd %xmm11, %xmm10, %xmm11 0xc4,0x42,0x2d,0x0d,0xdb = vpermilpd %ymm11, %ymm10, %ymm11 0xc4,0x62,0x29,0x0d,0x28 = vpermilpd (%rax), %xmm10, %xmm13 0xc4,0x62,0x2d,0x0d,0x18 = vpermilpd (%rax), %ymm10, %ymm11 0xc4,0x43,0x2d,0x06,0xdc,0x07 = vperm2f128 $7, %ymm12, %ymm10, %ymm11 0xc4,0x63,0x2d,0x06,0x18,0x07 = vperm2f128 $7, (%rax), %ymm10, %ymm11 0xc4,0x41,0x7b,0x2d,0xc0 = vcvtsd2si %xmm8, %r8d 0xc5,0xfb,0x2d,0x09 = vcvtsd2si (%rcx), %ecx 0xc4,0xe1,0xfa,0x2d,0xcc = vcvtss2si %xmm4, %rcx 0xc4,0x61,0xfa,0x2d,0x01 = vcvtss2si (%rcx), %r8 0xc4,0x41,0x3b,0x2a,0xf8 = vcvtsi2sdl %r8d, %xmm8, %xmm15 0xc5,0x3b,0x2a,0x7d,0x00 = vcvtsi2sdl (%rbp), %xmm8, %xmm15 0xc4,0xe1,0xdb,0x2a,0xf1 = vcvtsi2sdq %rcx, %xmm4, %xmm6 0xc4,0xe1,0xdb,0x2a,0x31 = vcvtsi2sdq (%rcx), %xmm4, %xmm6 0xc4,0xe1,0xda,0x2a,0xf1 = vcvtsi2ssq %rcx, %xmm4, %xmm6 0xc4,0xe1,0xda,0x2a,0x31 = vcvtsi2ssq (%rcx), %xmm4, %xmm6 0xc4,0xe1,0xfb,0x2c,0xcc = vcvttsd2si %xmm4, %rcx 0xc4,0xe1,0xfb,0x2c,0x09 = vcvttsd2si (%rcx), %rcx 0xc4,0xe1,0xfa,0x2c,0xcc = vcvttss2si %xmm4, %rcx 0xc4,0xe1,0xfa,0x2c,0x09 = vcvttss2si (%rcx), %rcx 0xc5,0x7f,0xf0,0x20 = vlddqu (%rax), %ymm12 0xc4,0x41,0x7f,0x12,0xd4 = vmovddup %ymm12, %ymm10 0xc5,0x7f,0x12,0x20 = vmovddup (%rax), %ymm12 0xc4,0x41,0x7d,0x6f,0xd4 = vmovdqa %ymm12, %ymm10 0xc5,0x7d,0x7f,0x20 = vmovdqa %ymm12, (%rax) 0xc5,0x7d,0x6f,0x20 = vmovdqa (%rax), %ymm12 0xc4,0x41,0x7e,0x6f,0xd4 = vmovdqu %ymm12, %ymm10 0xc5,0x7e,0x7f,0x20 = vmovdqu %ymm12, (%rax) 0xc5,0x7e,0x6f,0x20 = vmovdqu (%rax), %ymm12 0xc4,0x41,0x7e,0x16,0xd4 = vmovshdup %ymm12, %ymm10 0xc5,0x7e,0x16,0x20 = vmovshdup (%rax), %ymm12 0xc4,0x41,0x7e,0x12,0xd4 = vmovsldup %ymm12, %ymm10 0xc5,0x7e,0x12,0x20 = vmovsldup (%rax), %ymm12 0xc4,0x42,0x7d,0x17,0xd4 = vptest %ymm12, %ymm10 0xc4,0x62,0x7d,0x17,0x20 = vptest (%rax), %ymm12 0xc4,0x43,0x7d,0x09,0xda,0x07 = vroundpd $7, %ymm10, %ymm11 0xc4,0x63,0x7d,0x09,0x10,0x07 = vroundpd $7, (%rax), %ymm10 0xc4,0x43,0x7d,0x08,0xda,0x07 = vroundps $7, %ymm10, %ymm11 0xc4,0x63,0x7d,0x08,0x10,0x07 = vroundps $7, (%rax), %ymm10 0xc4,0x41,0x2d,0xc6,0xdc,0x07 = vshufpd $7, %ymm12, %ymm10, %ymm11 0xc5,0x2d,0xc6,0x18,0x07 = vshufpd $7, (%rax), %ymm10, %ymm11 0xc4,0x41,0x2c,0xc6,0xdc,0x07 = vshufps $7, %ymm12, %ymm10, %ymm11 0xc5,0x2c,0xc6,0x18,0x07 = vshufps $7, (%rax), %ymm10, %ymm11 0xc4,0x42,0x79,0x0f,0xd4 = vtestpd %xmm12, %xmm10 0xc4,0x42,0x7d,0x0f,0xd4 = vtestpd %ymm12, %ymm10 0xc4,0x62,0x79,0x0f,0x20 = vtestpd (%rax), %xmm12 0xc4,0x62,0x7d,0x0f,0x20 = vtestpd (%rax), %ymm12 0xc4,0x42,0x79,0x0e,0xd4 = vtestps %xmm12, %xmm10 0xc4,0x42,0x7d,0x0e,0xd4 = vtestps %ymm12, %ymm10 0xc4,0x62,0x79,0x0e,0x20 = vtestps (%rax), %xmm12 0xc4,0x62,0x7d,0x0e,0x20 = vtestps (%rax), %ymm12 0xc4,0x43,0x79,0x17,0xc0,0x0a = vextractps $10, %xmm8, %r8 0xc4,0xe3,0x79,0x17,0xe1,0x07 = vextractps $7, %xmm4, %ecx 0xc4,0xe1,0xf9,0x7e,0xe1 = vmovd %xmm4, %rcx 0xc5,0xf9,0x50,0xcc = vmovmskpd %xmm4, %ecx 0xc5,0xfd,0x50,0xcc = vmovmskpd %ymm4, %ecx 0xc5,0xf8,0x50,0xcc = vmovmskps %xmm4, %ecx 0xc5,0xfc,0x50,0xcc = vmovmskps %ymm4, %ecx 0xc4,0xe3,0x79,0x14,0xe1,0x07 = vpextrb $7, %xmm4, %ecx 0xc4,0x41,0x01,0xc4,0xc0,0x07 = vpinsrw $7, %r8d, %xmm15, %xmm8 0xc5,0xd9,0xc4,0xf1,0x07 = vpinsrw $7, %ecx, %xmm4, %xmm6 0xc5,0xf9,0xd7,0xcc = vpmovmskb %xmm4, %ecx 0xc4,0x63,0x1d,0x4b,0xac,0x20,0xad,0xde,0x00,0x00,0xb0 = vblendvpd %ymm11, 0xdead(%rax, %riz), %ymm12, %ymm13 0xc4,0x81,0x78,0x29,0x1c,0x1e = vmovaps %xmm3, (%r14, %r11) 0xc4,0x81,0x78,0x28,0x1c,0x1e = vmovaps (%r14, %r11), %xmm3 0xc4,0xc1,0x78,0x29,0x1c,0x1e = vmovaps %xmm3, (%r14, %rbx) 0xc4,0xc1,0x78,0x28,0x1c,0x1e = vmovaps (%r14, %rbx), %xmm3 0xc4,0xa1,0x78,0x29,0x1c,0x18 = vmovaps %xmm3, (%rax, %r11) 0xc4,0xe2,0xf9,0x92,0x14,0x4f = vgatherdpd %xmm0, (%rdi, %xmm1, 2), %xmm2 0xc4,0xe2,0xf9,0x93,0x14,0x4f = vgatherqpd %xmm0, (%rdi, %xmm1, 2), %xmm2 0xc4,0xe2,0xfd,0x92,0x14,0x4f = vgatherdpd %ymm0, (%rdi, %xmm1, 2), %ymm2 0xc4,0xe2,0xfd,0x93,0x14,0x4f = vgatherqpd %ymm0, (%rdi, %ymm1, 2), %ymm2 0xc4,0x02,0x39,0x92,0x14,0x4f = vgatherdps %xmm8, (%r15, %xmm9, 2), %xmm10 0xc4,0x02,0x39,0x93,0x14,0x4f = vgatherqps %xmm8, (%r15, %xmm9, 2), %xmm10 0xc4,0x02,0x3d,0x92,0x14,0x4f = vgatherdps %ymm8, (%r15, %ymm9, 2), %ymm10 0xc4,0x02,0x3d,0x93,0x14,0x4f = vgatherqps %xmm8, (%r15, %ymm9, 2), %xmm10 0xc4,0xe2,0xf9,0x90,0x14,0x4f = vpgatherdq %xmm0, (%rdi, %xmm1, 2), %xmm2 0xc4,0xe2,0xf9,0x91,0x14,0x4f = vpgatherqq %xmm0, (%rdi, %xmm1, 2), %xmm2 0xc4,0xe2,0xfd,0x90,0x14,0x4f = vpgatherdq %ymm0, (%rdi, %xmm1, 2), %ymm2 0xc4,0xe2,0xfd,0x91,0x14,0x4f = vpgatherqq %ymm0, (%rdi, %ymm1, 2), %ymm2 0xc4,0x02,0x39,0x90,0x14,0x4f = vpgatherdd %xmm8, (%r15, %xmm9, 2), %xmm10 0xc4,0x02,0x39,0x91,0x14,0x4f = vpgatherqd %xmm8, (%r15, %xmm9, 2), %xmm10 0xc4,0x02,0x3d,0x90,0x14,0x4f = vpgatherdd %ymm8, (%r15, %ymm9, 2), %ymm10 0xc4,0x02,0x3d,0x91,0x14,0x4f = vpgatherqd %xmm8, (%r15, %ymm9, 2), %xmm10 0xc5,0x78,0x28,0xc0 = vmovaps %xmm0, %xmm8 0xc5,0x78,0x29,0xc0 = vmovaps %xmm8, %xmm0 0xc5,0x7c,0x28,0xc0 = vmovaps %ymm0, %ymm8 0xc5,0x7c,0x29,0xc0 = vmovaps %ymm8, %ymm0 0xc5,0x78,0x10,0xc0 = vmovups %xmm0, %xmm8 0xc5,0x78,0x11,0xc0 = vmovups %xmm8, %xmm0 0xc5,0x7c,0x10,0xc0 = vmovups %ymm0, %ymm8 0xc5,0x7c,0x11,0xc0 = vmovups %ymm8, %ymm0 0xc5,0x7a,0x10,0xc0 = vmovss %xmm0, %xmm0, %xmm8 0xc5,0xba,0x10,0xc0 = vmovss %xmm0, %xmm8, %xmm0 0xc5,0x7a,0x11,0xc0 = vmovss %xmm8, %xmm0, %xmm0 0xc5,0x7b,0x10,0xc0 = vmovsd %xmm0, %xmm0, %xmm8 0xc5,0xbb,0x10,0xc0 = vmovsd %xmm0, %xmm8, %xmm0 0xc5,0x7b,0x11,0xc0 = vmovsd %xmm8, %xmm0, %xmm0 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-bmi-encoding.s.cs010066400017500001750000000050561363402546700223740ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0xc4,0xc2,0x28,0xf3,0xd3 = blsmskl %r11d, %r10d 0xc4,0xc2,0xa8,0xf3,0xd3 = blsmskq %r11, %r10 0xc4,0xe2,0x28,0xf3,0x10 = blsmskl (%rax), %r10d 0xc4,0xe2,0xa8,0xf3,0x10 = blsmskq (%rax), %r10 0xc4,0xc2,0x28,0xf3,0xdb = blsil %r11d, %r10d 0xc4,0xc2,0xa8,0xf3,0xdb = blsiq %r11, %r10 0xc4,0xe2,0x28,0xf3,0x18 = blsil (%rax), %r10d 0xc4,0xe2,0xa8,0xf3,0x18 = blsiq (%rax), %r10 0xc4,0xc2,0x28,0xf3,0xcb = blsrl %r11d, %r10d 0xc4,0xc2,0xa8,0xf3,0xcb = blsrq %r11, %r10 0xc4,0xe2,0x28,0xf3,0x08 = blsrl (%rax), %r10d 0xc4,0xe2,0xa8,0xf3,0x08 = blsrq (%rax), %r10 0xc4,0x62,0x20,0xf2,0x10 = andnl (%rax), %r11d, %r10d 0xc4,0x62,0xa0,0xf2,0x10 = andnq (%rax), %r11, %r10 0xc4,0x62,0x18,0xf7,0x10 = bextrl %r12d, (%rax), %r10d 0xc4,0x42,0x18,0xf7,0xd3 = bextrl %r12d, %r11d, %r10d 0xc4,0x62,0x98,0xf7,0x10 = bextrq %r12, (%rax), %r10 0xc4,0x42,0x98,0xf7,0xd3 = bextrq %r12, %r11, %r10 0xc4,0x62,0x18,0xf5,0x10 = bzhil %r12d, (%rax), %r10d 0xc4,0x42,0x18,0xf5,0xd3 = bzhil %r12d, %r11d, %r10d 0xc4,0x62,0x98,0xf5,0x10 = bzhiq %r12, (%rax), %r10 0xc4,0x42,0x98,0xf5,0xd3 = bzhiq %r12, %r11, %r10 0xc4,0x42,0x22,0xf5,0xd4 = pextl %r12d, %r11d, %r10d 0xc4,0x62,0x22,0xf5,0x10 = pextl (%rax), %r11d, %r10d 0xc4,0x42,0xa2,0xf5,0xd4 = pextq %r12, %r11, %r10 0xc4,0x62,0xa2,0xf5,0x10 = pextq (%rax), %r11, %r10 0xc4,0x42,0x23,0xf5,0xd4 = pdepl %r12d, %r11d, %r10d 0xc4,0x62,0x23,0xf5,0x10 = pdepl (%rax), %r11d, %r10d 0xc4,0x42,0xa3,0xf5,0xd4 = pdepq %r12, %r11, %r10 0xc4,0x62,0xa3,0xf5,0x10 = pdepq (%rax), %r11, %r10 0xc4,0x42,0x23,0xf6,0xd4 = mulxl %r12d, %r11d, %r10d 0xc4,0x62,0x23,0xf6,0x10 = mulxl (%rax), %r11d, %r10d 0xc4,0x42,0xa3,0xf6,0xd4 = mulxq %r12, %r11, %r10 0xc4,0x62,0xa3,0xf6,0x10 = mulxq (%rax), %r11, %r10 0xc4,0x43,0x7b,0xf0,0xd4,0x0a = rorxl $10, %r12d, %r10d 0xc4,0x63,0x7b,0xf0,0x10,0x1f = rorxl $31, (%rax), %r10d 0xc4,0x43,0xfb,0xf0,0xd4,0x01 = rorxq $1, %r12, %r10 0xc4,0x63,0xfb,0xf0,0x10,0x3f = rorxq $63, (%rax), %r10 0xc4,0x62,0x19,0xf7,0x10 = shlxl %r12d, (%rax), %r10d 0xc4,0x42,0x19,0xf7,0xd3 = shlxl %r12d, %r11d, %r10d 0xc4,0x62,0x99,0xf7,0x10 = shlxq %r12, (%rax), %r10 0xc4,0x42,0x99,0xf7,0xd3 = shlxq %r12, %r11, %r10 0xc4,0x62,0x1a,0xf7,0x10 = sarxl %r12d, (%rax), %r10d 0xc4,0x42,0x1a,0xf7,0xd3 = sarxl %r12d, %r11d, %r10d 0xc4,0x62,0x9a,0xf7,0x10 = sarxq %r12, (%rax), %r10 0xc4,0x42,0x9a,0xf7,0xd3 = sarxq %r12, %r11, %r10 0xc4,0x62,0x1b,0xf7,0x10 = shrxl %r12d, (%rax), %r10d 0xc4,0x42,0x1b,0xf7,0xd3 = shrxl %r12d, %r11d, %r10d 0xc4,0x62,0x9b,0xf7,0x10 = shrxq %r12, (%rax), %r10 0xc4,0x42,0x9b,0xf7,0xd3 = shrxq %r12, %r11, %r10 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-encoding.s.cs010066400017500001750000000053331363402546700216250ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x65,0x48,0x8b,0x07 = movq %gs:(%rdi), %rax 0xf2,0x0f,0x38,0xf0,0xc3 = crc32b %bl, %eax 0xf2,0x0f,0x38,0xf0,0x43,0x04 = crc32b 4(%rbx), %eax 0x66,0xf2,0x0f,0x38,0xf1,0xc3 = crc32w %bx, %eax 0x66,0xf2,0x0f,0x38,0xf1,0x43,0x04 = crc32w 4(%rbx), %eax 0xf2,0x0f,0x38,0xf1,0xc3 = crc32l %ebx, %eax 0xf2,0x0f,0x38,0xf1,0x43,0x04 = crc32l 4(%rbx), %eax 0xf2,0x0f,0x38,0xf1,0x8c,0xcb,0xef,0xbe,0xad,0xde = crc32l 0xdeadbeef(%rbx, %rcx, 8),%ecx 0xf2,0x0f,0x38,0xf1,0x0c,0x25,0x45,0x00,0x00,0x00 = crc32l 0x45, %ecx 0xf2,0x0f,0x38,0xf1,0x0c,0x25,0xed,0x7e,0x00,0x00 = crc32l 0x7eed, %ecx 0xf2,0x0f,0x38,0xf1,0x0c,0x25,0xfe,0xca,0xbe,0xba = crc32l 0xbabecafe, %ecx 0xf2,0x0f,0x38,0xf1,0xc9 = crc32l %ecx, %ecx 0xf2,0x41,0x0f,0x38,0xf0,0xc3 = crc32b %r11b, %eax 0xf2,0x0f,0x38,0xf0,0x43,0x04 = crc32b 4(%rbx), %eax 0xf2,0x48,0x0f,0x38,0xf0,0xc7 = crc32b %dil, %rax 0xf2,0x49,0x0f,0x38,0xf0,0xc3 = crc32b %r11b, %rax 0xf2,0x48,0x0f,0x38,0xf0,0x43,0x04 = crc32b 4(%rbx), %rax 0xf2,0x48,0x0f,0x38,0xf1,0xc3 = crc32q %rbx, %rax 0xf2,0x48,0x0f,0x38,0xf1,0x43,0x04 = crc32q 4(%rbx), %rax 0x49,0x0f,0x6e,0xc8 = movd %r8, %mm1 0x41,0x0f,0x6e,0xc8 = movd %r8d, %mm1 0x48,0x0f,0x6e,0xca = movd %rdx, %mm1 0x0f,0x6e,0xca = movd %edx, %mm1 0x49,0x0f,0x7e,0xc8 = movd %mm1, %r8 0x41,0x0f,0x7e,0xc8 = movd %mm1, %r8d 0x48,0x0f,0x7e,0xca = movd %mm1, %rdx 0x0f,0x7e,0xca = movd %mm1, %edx 0x0f,0x3a,0xcc,0xd1,0x01 = sha1rnds4 $1, %xmm1, %xmm2 0x0f,0x3a,0xcc,0x10,0x01 = sha1rnds4 $1, (%rax), %xmm2 0x0f,0x38,0xc8,0xd1 = sha1nexte %xmm1, %xmm2 0x0f,0x38,0xc9,0xd1 = sha1msg1 %xmm1, %xmm2 0x0f,0x38,0xc9,0x10 = sha1msg1 (%rax), %xmm2 0x0f,0x38,0xca,0xd1 = sha1msg2 %xmm1, %xmm2 0x0f,0x38,0xca,0x10 = sha1msg2 (%rax), %xmm2 0x0f,0x38,0xcb,0x10 = sha256rnds2 (%rax), %xmm2 0x0f,0x38,0xcb,0xd1 = sha256rnds2 %xmm1, %xmm2 0x0f,0x38,0xcb,0x10 = sha256rnds2 %xmm0, (%rax), %xmm2 0x0f,0x38,0xcb,0xd1 = sha256rnds2 %xmm0, %xmm1, %xmm2 0x0f,0x38,0xcc,0xd1 = sha256msg1 %xmm1, %xmm2 0x0f,0x38,0xcc,0x10 = sha256msg1 (%rax), %xmm2 0x0f,0x38,0xcd,0xd1 = sha256msg2 %xmm1, %xmm2 0x0f,0x38,0xcd,0x10 = sha256msg2 (%rax), %xmm2 0x48,0x8b,0x1c,0x25,0xad,0xde,0x00,0x00 = movq 57005(, %riz), %rbx 0x48,0x8b,0x04,0x25,0xef,0xbe,0x00,0x00 = movq 48879(, %riz), %rax 0x48,0x8b,0x04,0xe5,0xfc,0xff,0xff,0xff = movq -4(, %riz, 8), %rax 0x48,0x8b,0x04,0x21 = movq (%rcx, %riz), %rax 0x48,0x8b,0x04,0xe1 = movq (%rcx, %riz, 8), %rax 0x48,0x0f,0xae,0x00 = fxsaveq (%rax) 0x48,0x0f,0xae,0x08 = fxrstorq (%rax) 0xc9 = leave 0xc9 = leave 0x67,0xd9,0x07 = flds (%edi) 0x67,0xdf,0x07 = filds (%edi) 0xd9,0x07 = flds (%rdi) 0xdf,0x07 = filds (%rdi) 0x66,0x0f,0xd7,0xcd = pmovmskb %xmm5, %ecx 0x66,0x0f,0xc4,0xe9,0x03 = pinsrw $3, %ecx, %xmm5 0x66,0x0f,0xc4,0xe9,0x03 = pinsrw $3, %ecx, %xmm5 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-fma3-encoding.s.cs010066400017500001750000000246351363402546700224570ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0xc4,0x42,0xa9,0x98,0xdc = vfmadd132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x98,0x18 = vfmadd132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x98,0xdc = vfmadd132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x98,0x18 = vfmadd132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xa8,0xdc = vfmadd213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xa8,0x18 = vfmadd213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xa8,0xdc = vfmadd213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xa8,0x18 = vfmadd213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xb8,0xdc = vfmadd231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xb8,0x18 = vfmadd231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xb8,0xdc = vfmadd231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xb8,0x18 = vfmadd231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xad,0x98,0xdc = vfmadd132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x98,0x18 = vfmadd132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x98,0xdc = vfmadd132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x98,0x18 = vfmadd132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xa8,0xdc = vfmadd213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xa8,0x18 = vfmadd213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xa8,0xdc = vfmadd213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xa8,0x18 = vfmadd213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xb8,0xdc = vfmadd231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xb8,0x18 = vfmadd231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xb8,0xdc = vfmadd231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xb8,0x18 = vfmadd231ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xa9,0x98,0xdc = vfmadd132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x98,0x18 = vfmadd132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x98,0xdc = vfmadd132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x98,0x18 = vfmadd132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xa8,0xdc = vfmadd213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xa8,0x18 = vfmadd213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xa8,0xdc = vfmadd213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xa8,0x18 = vfmadd213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xb8,0xdc = vfmadd231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xb8,0x18 = vfmadd231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xb8,0xdc = vfmadd231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xb8,0x18 = vfmadd231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0x96,0xdc = vfmaddsub132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x96,0x18 = vfmaddsub132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x96,0xdc = vfmaddsub132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x96,0x18 = vfmaddsub132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xa6,0xdc = vfmaddsub213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xa6,0x18 = vfmaddsub213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xa6,0xdc = vfmaddsub213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xa6,0x18 = vfmaddsub213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xb6,0xdc = vfmaddsub231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xb6,0x18 = vfmaddsub231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xb6,0xdc = vfmaddsub231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xb6,0x18 = vfmaddsub231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0x97,0xdc = vfmsubadd132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x97,0x18 = vfmsubadd132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x97,0xdc = vfmsubadd132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x97,0x18 = vfmsubadd132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xa7,0xdc = vfmsubadd213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xa7,0x18 = vfmsubadd213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xa7,0xdc = vfmsubadd213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xa7,0x18 = vfmsubadd213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xb7,0xdc = vfmsubadd231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xb7,0x18 = vfmsubadd231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xb7,0xdc = vfmsubadd231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xb7,0x18 = vfmsubadd231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0x9a,0xdc = vfmsub132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x9a,0x18 = vfmsub132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x9a,0xdc = vfmsub132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x9a,0x18 = vfmsub132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xaa,0xdc = vfmsub213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xaa,0x18 = vfmsub213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xaa,0xdc = vfmsub213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xaa,0x18 = vfmsub213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xba,0xdc = vfmsub231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xba,0x18 = vfmsub231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xba,0xdc = vfmsub231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xba,0x18 = vfmsub231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0x9c,0xdc = vfnmadd132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x9c,0x18 = vfnmadd132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x9c,0xdc = vfnmadd132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x9c,0x18 = vfnmadd132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xac,0xdc = vfnmadd213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xac,0x18 = vfnmadd213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xac,0xdc = vfnmadd213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xac,0x18 = vfnmadd213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xbc,0xdc = vfnmadd231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xbc,0x18 = vfnmadd231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xbc,0xdc = vfnmadd231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xbc,0x18 = vfnmadd231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0x9e,0xdc = vfnmsub132pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0x9e,0x18 = vfnmsub132pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0x9e,0xdc = vfnmsub132ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0x9e,0x18 = vfnmsub132ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xae,0xdc = vfnmsub213pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xae,0x18 = vfnmsub213pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xae,0xdc = vfnmsub213ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xae,0x18 = vfnmsub213ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xa9,0xbe,0xdc = vfnmsub231pd %xmm12, %xmm10, %xmm11 0xc4,0x62,0xa9,0xbe,0x18 = vfnmsub231pd (%rax), %xmm10, %xmm11 0xc4,0x42,0x29,0xbe,0xdc = vfnmsub231ps %xmm12, %xmm10, %xmm11 0xc4,0x62,0x29,0xbe,0x18 = vfnmsub231ps (%rax), %xmm10, %xmm11 0xc4,0x42,0xad,0x98,0xdc = vfmadd132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x98,0x18 = vfmadd132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x98,0xdc = vfmadd132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x98,0x18 = vfmadd132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xa8,0xdc = vfmadd213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xa8,0x18 = vfmadd213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xa8,0xdc = vfmadd213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xa8,0x18 = vfmadd213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xb8,0xdc = vfmadd231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xb8,0x18 = vfmadd231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xb8,0xdc = vfmadd231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xb8,0x18 = vfmadd231ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0x96,0xdc = vfmaddsub132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x96,0x18 = vfmaddsub132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x96,0xdc = vfmaddsub132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x96,0x18 = vfmaddsub132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xa6,0xdc = vfmaddsub213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xa6,0x18 = vfmaddsub213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xa6,0xdc = vfmaddsub213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xa6,0x18 = vfmaddsub213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xb6,0xdc = vfmaddsub231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xb6,0x18 = vfmaddsub231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xb6,0xdc = vfmaddsub231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xb6,0x18 = vfmaddsub231ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0x97,0xdc = vfmsubadd132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x97,0x18 = vfmsubadd132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x97,0xdc = vfmsubadd132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x97,0x18 = vfmsubadd132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xa7,0xdc = vfmsubadd213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xa7,0x18 = vfmsubadd213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xa7,0xdc = vfmsubadd213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xa7,0x18 = vfmsubadd213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xb7,0xdc = vfmsubadd231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xb7,0x18 = vfmsubadd231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xb7,0xdc = vfmsubadd231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xb7,0x18 = vfmsubadd231ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0x9a,0xdc = vfmsub132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x9a,0x18 = vfmsub132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x9a,0xdc = vfmsub132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x9a,0x18 = vfmsub132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xaa,0xdc = vfmsub213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xaa,0x18 = vfmsub213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xaa,0xdc = vfmsub213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xaa,0x18 = vfmsub213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xba,0xdc = vfmsub231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xba,0x18 = vfmsub231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xba,0xdc = vfmsub231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xba,0x18 = vfmsub231ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0x9c,0xdc = vfnmadd132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x9c,0x18 = vfnmadd132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x9c,0xdc = vfnmadd132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x9c,0x18 = vfnmadd132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xac,0xdc = vfnmadd213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xac,0x18 = vfnmadd213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xac,0xdc = vfnmadd213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xac,0x18 = vfnmadd213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xbc,0xdc = vfnmadd231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xbc,0x18 = vfnmadd231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xbc,0xdc = vfnmadd231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xbc,0x18 = vfnmadd231ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0x9e,0xdc = vfnmsub132pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0x9e,0x18 = vfnmsub132pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0x9e,0xdc = vfnmsub132ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0x9e,0x18 = vfnmsub132ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xae,0xdc = vfnmsub213pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xae,0x18 = vfnmsub213pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xae,0xdc = vfnmsub213ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xae,0x18 = vfnmsub213ps (%rax), %ymm10, %ymm11 0xc4,0x42,0xad,0xbe,0xdc = vfnmsub231pd %ymm12, %ymm10, %ymm11 0xc4,0x62,0xad,0xbe,0x18 = vfnmsub231pd (%rax), %ymm10, %ymm11 0xc4,0x42,0x2d,0xbe,0xdc = vfnmsub231ps %ymm12, %ymm10, %ymm11 0xc4,0x62,0x2d,0xbe,0x18 = vfnmsub231ps (%rax), %ymm10, %ymm11 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-fma4-encoding.s.cs010066400017500001750000000152361363402546700224550ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0xc4,0xe3,0xf9,0x6a,0x01,0x10 = vfmaddss (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x6a,0x01,0x10 = vfmaddss %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6a,0xc2,0x10 = vfmaddss %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6b,0x01,0x10 = vfmaddsd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x6b,0x01,0x10 = vfmaddsd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6b,0xc2,0x10 = vfmaddsd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xc3,0xf9,0x6b,0xc2,0x10 = vfmaddsd %xmm10, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x68,0x01,0x10 = vfmaddps (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x68,0x01,0x10 = vfmaddps %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x68,0xc2,0x10 = vfmaddps %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x69,0x01,0x10 = vfmaddpd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x69,0x01,0x10 = vfmaddpd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x69,0xc2,0x10 = vfmaddpd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xfd,0x68,0x01,0x10 = vfmaddps (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x68,0x01,0x10 = vfmaddps %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x68,0xc2,0x10 = vfmaddps %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xfd,0x69,0x01,0x10 = vfmaddpd (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x69,0x01,0x10 = vfmaddpd %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x69,0xc2,0x10 = vfmaddpd %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xf9,0x6e,0x01,0x10 = vfmsubss (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x6e,0x01,0x10 = vfmsubss %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6e,0xc2,0x10 = vfmsubss %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6f,0x01,0x10 = vfmsubsd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x6f,0x01,0x10 = vfmsubsd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6f,0xc2,0x10 = vfmsubsd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6c,0x01,0x10 = vfmsubps (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x6c,0x01,0x10 = vfmsubps %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6c,0xc2,0x10 = vfmsubps %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6d,0x01,0x10 = vfmsubpd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x6d,0x01,0x10 = vfmsubpd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x6d,0xc2,0x10 = vfmsubpd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xfd,0x6c,0x01,0x10 = vfmsubps (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x6c,0x01,0x10 = vfmsubps %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x6c,0xc2,0x10 = vfmsubps %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xfd,0x6d,0x01,0x10 = vfmsubpd (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x6d,0x01,0x10 = vfmsubpd %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x6d,0xc2,0x10 = vfmsubpd %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xf9,0x7a,0x01,0x10 = vfnmaddss (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x7a,0x01,0x10 = vfnmaddss %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7a,0xc2,0x10 = vfnmaddss %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7b,0x01,0x10 = vfnmaddsd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x7b,0x01,0x10 = vfnmaddsd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7b,0xc2,0x10 = vfnmaddsd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x78,0x01,0x10 = vfnmaddps (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x78,0x01,0x10 = vfnmaddps %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x78,0xc2,0x10 = vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x79,0x01,0x10 = vfnmaddpd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x79,0x01,0x10 = vfnmaddpd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x79,0xc2,0x10 = vfnmaddpd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xfd,0x78,0x01,0x10 = vfnmaddps (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x78,0x01,0x10 = vfnmaddps %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x78,0xc2,0x10 = vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xfd,0x79,0x01,0x10 = vfnmaddpd (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x79,0x01,0x10 = vfnmaddpd %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x79,0xc2,0x10 = vfnmaddpd %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xf9,0x7e,0x01,0x10 = vfnmsubss (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x7e,0x01,0x10 = vfnmsubss %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7e,0xc2,0x10 = vfnmsubss %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7f,0x01,0x10 = vfnmsubsd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x7f,0x01,0x10 = vfnmsubsd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7f,0xc2,0x10 = vfnmsubsd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7c,0x01,0x10 = vfnmsubps (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x7c,0x01,0x10 = vfnmsubps %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7c,0xc2,0x10 = vfnmsubps %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7d,0x01,0x10 = vfnmsubpd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x7d,0x01,0x10 = vfnmsubpd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x7d,0xc2,0x10 = vfnmsubpd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xfd,0x7c,0x01,0x10 = vfnmsubps (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x7c,0x01,0x10 = vfnmsubps %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x7c,0xc2,0x10 = vfnmsubps %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xfd,0x7d,0x01,0x10 = vfnmsubpd (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x7d,0x01,0x10 = vfnmsubpd %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x7d,0xc2,0x10 = vfnmsubpd %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xf9,0x5c,0x01,0x10 = vfmaddsubps (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x5c,0x01,0x10 = vfmaddsubps %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x5c,0xc2,0x10 = vfmaddsubps %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x5d,0x01,0x10 = vfmaddsubpd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x5d,0x01,0x10 = vfmaddsubpd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x5d,0xc2,0x10 = vfmaddsubpd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xfd,0x5c,0x01,0x10 = vfmaddsubps (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x5c,0x01,0x10 = vfmaddsubps %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x5c,0xc2,0x10 = vfmaddsubps %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xfd,0x5d,0x01,0x10 = vfmaddsubpd (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x5d,0x01,0x10 = vfmaddsubpd %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x5d,0xc2,0x10 = vfmaddsubpd %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xf9,0x5e,0x01,0x10 = vfmsubaddps (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x5e,0x01,0x10 = vfmsubaddps %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x5e,0xc2,0x10 = vfmsubaddps %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xf9,0x5f,0x01,0x10 = vfmsubaddpd (%rcx), %xmm1, %xmm0, %xmm0 0xc4,0xe3,0x79,0x5f,0x01,0x10 = vfmsubaddpd %xmm1, (%rcx), %xmm0, %xmm0 0xc4,0xe3,0xf9,0x5f,0xc2,0x10 = vfmsubaddpd %xmm2, %xmm1, %xmm0, %xmm0 0xc4,0xe3,0xfd,0x5e,0x01,0x10 = vfmsubaddps (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x5e,0x01,0x10 = vfmsubaddps %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x5e,0xc2,0x10 = vfmsubaddps %ymm2, %ymm1, %ymm0, %ymm0 0xc4,0xe3,0xfd,0x5f,0x01,0x10 = vfmsubaddpd (%rcx), %ymm1, %ymm0, %ymm0 0xc4,0xe3,0x7d,0x5f,0x01,0x10 = vfmsubaddpd %ymm1, (%rcx), %ymm0, %ymm0 0xc4,0xe3,0xfd,0x5f,0xc2,0x10 = vfmsubaddpd %ymm2, %ymm1, %ymm0, %ymm0 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-hle-encoding.s.cs010066400017500001750000000000721363402546700223660ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, None 0xf2 = repne 0xf3 = rep capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-imm-widths.s.cs010066400017500001750000000023771363402546700221260ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x04,0x00 = addb $0x00, %al 0x04,0x7f = addb $0x7F, %al 0x04,0x80 = addb $0x80, %al 0x04,0xff = addb $0xFF, %al 0x66,0x83,0xc0,0x00 = addw $0x0000, %ax 0x66,0x83,0xc0,0x7f = addw $0x007F, %ax 0x66,0x83,0xc0,0x80 = addw $0x80, %ax 0x66,0x83,0xc0,0xff = addw $0xFFFF, %ax 0x83,0xc0,0x00 = addl $0x00000000, %eax 0x83,0xc0,0x7f = addl $0x0000007F, %eax 0x05,0x80,0xff,0x00,0x00 = addl $0xFF80, %eax 0x05,0xff,0xff,0x00,0x00 = addl $0xFFFF, %eax 0x83,0xc0,0x80 = addl $0xFFFFFF80, %eax 0x83,0xc0,0xff = addl $0xFFFFFFFF, %eax 0x48,0x83,0xc0,0x00 = addq $0x0000000000000000, %rax 0x48,0x83,0xc0,0x7f = addq $0x000000000000007F, %rax 0x48,0x83,0xc0,0x80 = addq $0xFFFFFFFFFFFFFF80, %rax 0x48,0x83,0xc0,0xff = addq $0xFFFFFFFFFFFFFFFF, %rax 0x48,0x83,0xc0,0x00 = addq $0x0000000000000000, %rax 0x48,0x05,0x80,0xff,0x00,0x00 = addq $0xFF80, %rax 0x48,0x05,0xff,0xff,0x00,0x00 = addq $0xFFFF, %rax 0x48,0xb8,0x80,0xff,0xff,0xff,0x00,0x00,0x00,0x00 = movabsq $0xFFFFFF80, %rax 0x48,0xb8,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00 = movabsq $0xFFFFFFFF, %rax 0x48,0x05,0xff,0xff,0xff,0x7f = addq $0x000000007FFFFFFF, %rax 0x48,0x05,0x00,0x00,0x00,0x80 = addq $0xFFFFFFFF80000000, %rax 0x48,0x05,0x00,0xff,0xff,0xff = addq $0xFFFFFFFFFFFFFF00, %rax capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-rand-encoding.s.cs010066400017500001750000000007231363402546700225450ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x66,0x0f,0xc7,0xf0 = rdrandw %ax 0x0f,0xc7,0xf0 = rdrandl %eax 0x48,0x0f,0xc7,0xf0 = rdrandq %rax 0x66,0x41,0x0f,0xc7,0xf3 = rdrandw %r11w 0x41,0x0f,0xc7,0xf3 = rdrandl %r11d 0x49,0x0f,0xc7,0xf3 = rdrandq %r11 0x66,0x0f,0xc7,0xf8 = rdseedw %ax 0x0f,0xc7,0xf8 = rdseedl %eax 0x48,0x0f,0xc7,0xf8 = rdseedq %rax 0x66,0x41,0x0f,0xc7,0xfb = rdseedw %r11w 0x41,0x0f,0xc7,0xfb = rdseedl %r11d 0x49,0x0f,0xc7,0xfb = rdseedq %r11 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-rtm-encoding.s.cs010066400017500001750000000001701363402546700224170ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x0f,0x01,0xd5 = xend 0x0f,0x01,0xd6 = xtest 0xc6,0xf8,0x0d = xabort $13 capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-sse4a.s.cs010066400017500001750000000000551363402546700210520ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-tbm-encoding.s.cs010066400017500001750000000036031363402546700224030ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x8f,0xea,0x78,0x10,0xc7,0xfe,0x0a,0x00,0x00 = bextr $2814, %edi, %eax 0x8f,0xea,0x78,0x10,0x07,0xfe,0x0a,0x00,0x00 = bextr $2814, (%rdi), %eax 0x8f,0xea,0xf8,0x10,0xc7,0xfe,0x0a,0x00,0x00 = bextr $2814, %rdi, %rax 0x8f,0xea,0xf8,0x10,0x07,0xfe,0x0a,0x00,0x00 = bextr $2814, (%rdi), %rax 0x8f,0xe9,0x78,0x01,0xcf = blcfill %edi, %eax 0x8f,0xe9,0x78,0x01,0x0f = blcfill (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xcf = blcfill %rdi, %rax 0x8f,0xe9,0xf8,0x01,0x0f = blcfill (%rdi), %rax 0x8f,0xe9,0x78,0x02,0xf7 = blci %edi, %eax 0x8f,0xe9,0x78,0x02,0x37 = blci (%rdi), %eax 0x8f,0xe9,0xf8,0x02,0xf7 = blci %rdi, %rax 0x8f,0xe9,0xf8,0x02,0x37 = blci (%rdi), %rax 0x8f,0xe9,0x78,0x01,0xef = blcic %edi, %eax 0x8f,0xe9,0x78,0x01,0x2f = blcic (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xef = blcic %rdi, %rax 0x8f,0xe9,0xf8,0x01,0x2f = blcic (%rdi), %rax 0x8f,0xe9,0x78,0x02,0xcf = blcmsk %edi, %eax 0x8f,0xe9,0x78,0x02,0x0f = blcmsk (%rdi), %eax 0x8f,0xe9,0xf8,0x02,0xcf = blcmsk %rdi, %rax 0x8f,0xe9,0xf8,0x02,0x0f = blcmsk (%rdi), %rax 0x8f,0xe9,0x78,0x01,0xdf = blcs %edi, %eax 0x8f,0xe9,0x78,0x01,0x1f = blcs (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xdf = blcs %rdi, %rax 0x8f,0xe9,0xf8,0x01,0x1f = blcs (%rdi), %rax 0x8f,0xe9,0x78,0x01,0xd7 = blsfill %edi, %eax 0x8f,0xe9,0x78,0x01,0x17 = blsfill (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xd7 = blsfill %rdi, %rax 0x8f,0xe9,0xf8,0x01,0x17 = blsfill (%rdi), %rax 0x8f,0xe9,0x78,0x01,0xf7 = blsic %edi, %eax 0x8f,0xe9,0x78,0x01,0x37 = blsic (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xf7 = blsic %rdi, %rax 0x8f,0xe9,0x78,0x01,0xff = t1mskc %edi, %eax 0x8f,0xe9,0x78,0x01,0x3f = t1mskc (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xff = t1mskc %rdi, %rax 0x8f,0xe9,0xf8,0x01,0x3f = t1mskc (%rdi), %rax 0x8f,0xe9,0x78,0x01,0xe7 = tzmsk %edi, %eax 0x8f,0xe9,0x78,0x01,0x27 = tzmsk (%rdi), %eax 0x8f,0xe9,0xf8,0x01,0xe7 = tzmsk %rdi, %rax 0x8f,0xe9,0xf8,0x01,0x27 = tzmsk (%rdi), %rax capstone-sys-0.11.0/capstone/suite/MC/X86/x86_64-xop-encoding.s.cs010066400017500001750000000222711363402546700224310ustar0000000000000000# CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT 0x8f,0xe9,0x78,0xe2,0x0c,0x01 = vphsubwd (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0xe2,0xc8 = vphsubwd %xmm0, %xmm1 0x8f,0xe9,0x78,0xe3,0x0c,0x01 = vphsubdq (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0xe3,0xc8 = vphsubdq %xmm0, %xmm1 0x8f,0xe9,0x78,0xe1,0x08 = vphsubbw (%rax), %xmm1 0x8f,0xe9,0x78,0xe1,0xca = vphsubbw %xmm2, %xmm1 0x8f,0xe9,0x78,0xc7,0x21 = vphaddwq (%rcx), %xmm4 0x8f,0xe9,0x78,0xc7,0xd6 = vphaddwq %xmm6, %xmm2 0x8f,0xe9,0x78,0xc6,0x3c,0x02 = vphaddwd (%rdx, %rax), %xmm7 0x8f,0xe9,0x78,0xc6,0xe3 = vphaddwd %xmm3, %xmm4 0x8f,0xe9,0x78,0xd7,0x34,0x01 = vphadduwq (%rcx, %rax), %xmm6 0x8f,0xe9,0x78,0xd7,0xc7 = vphadduwq %xmm7, %xmm0 0x8f,0xe9,0x78,0xd6,0x28 = vphadduwd (%rax), %xmm5 0x8f,0xe9,0x78,0xd6,0xca = vphadduwd %xmm2, %xmm1 0x8f,0xe9,0x78,0xdb,0x64,0x01,0x08 = vphaddudq 8(%rcx, %rax), %xmm4 0x8f,0xe9,0x78,0xdb,0xd6 = vphaddudq %xmm6, %xmm2 0x8f,0xe9,0x78,0xd1,0x19 = vphaddubw (%rcx), %xmm3 0x8f,0xe9,0x78,0xd1,0xc5 = vphaddubw %xmm5, %xmm0 0x8f,0xe9,0x78,0xd3,0x21 = vphaddubq (%rcx), %xmm4 0x8f,0xe9,0x78,0xd3,0xd2 = vphaddubq %xmm2, %xmm2 0x8f,0xe9,0x78,0xd2,0x28 = vphaddubd (%rax), %xmm5 0x8f,0xe9,0x78,0xd2,0xfd = vphaddubd %xmm5, %xmm7 0x8f,0xe9,0x78,0xcb,0x22 = vphadddq (%rdx), %xmm4 0x8f,0xe9,0x78,0xcb,0xec = vphadddq %xmm4, %xmm5 0x8f,0xe9,0x78,0xc1,0x0c,0x01 = vphaddbw (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0xc1,0xf5 = vphaddbw %xmm5, %xmm6 0x8f,0xe9,0x78,0xc3,0x0c,0x01 = vphaddbq (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0xc3,0xc2 = vphaddbq %xmm2, %xmm0 0x8f,0xe9,0x78,0xc2,0x0c,0x01 = vphaddbd (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0xc2,0xd9 = vphaddbd %xmm1, %xmm3 0x8f,0xe9,0x78,0x82,0x0c,0x01 = vfrczss (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0x82,0xfd = vfrczss %xmm5, %xmm7 0x8f,0xe9,0x78,0x83,0x0c,0x01 = vfrczsd (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0x83,0xc7 = vfrczsd %xmm7, %xmm0 0x8f,0xe9,0x78,0x80,0x58,0x04 = vfrczps 4(%rax), %xmm3 0x8f,0xe9,0x78,0x80,0xee = vfrczps %xmm6, %xmm5 0x8f,0xe9,0x78,0x80,0x09 = vfrczps (%rcx), %xmm1 0x8f,0xe9,0x7c,0x80,0xe2 = vfrczps %ymm2, %ymm4 0x8f,0xe9,0x78,0x81,0x0c,0x01 = vfrczpd (%rcx, %rax), %xmm1 0x8f,0xe9,0x78,0x81,0xc7 = vfrczpd %xmm7, %xmm0 0x8f,0xe9,0x7c,0x81,0x14,0x01 = vfrczpd (%rcx, %rax), %ymm2 0x8f,0xe9,0x7c,0x81,0xdd = vfrczpd %ymm5, %ymm3 0x8f,0xe9,0x78,0x95,0xd1 = vpshlw %xmm0, %xmm1, %xmm2 0x8f,0xe9,0xf0,0x95,0x10 = vpshlw (%rax), %xmm1, %xmm2 0x8f,0xe9,0x78,0x95,0x14,0x08 = vpshlw %xmm0, (%rax, %rcx), %xmm2 0x8f,0xe9,0x68,0x97,0xf4 = vpshlq %xmm2, %xmm4, %xmm6 0x8f,0xe9,0xe8,0x97,0x09 = vpshlq (%rcx), %xmm2, %xmm1 0x8f,0xe9,0x50,0x97,0x34,0x0a = vpshlq %xmm5, (%rdx, %rcx), %xmm6 0x8f,0xe9,0x40,0x96,0xdd = vpshld %xmm7, %xmm5, %xmm3 0x8f,0xe9,0xe0,0x96,0x58,0x04 = vpshld 4(%rax), %xmm3, %xmm3 0x8f,0xe9,0x70,0x96,0x2c,0x08 = vpshld %xmm1, (%rax, %rcx), %xmm5 0x8f,0xe9,0x70,0x94,0xda = vpshlb %xmm1, %xmm2, %xmm3 0x8f,0xe9,0xf8,0x94,0x39 = vpshlb (%rcx), %xmm0, %xmm7 0x8f,0xe9,0x68,0x94,0x1c,0x10 = vpshlb %xmm2, (%rax, %rdx), %xmm3 0x8f,0xe9,0x40,0x99,0xdd = vpshaw %xmm7, %xmm5, %xmm3 0x8f,0xe9,0xe8,0x99,0x08 = vpshaw (%rax), %xmm2, %xmm1 0x8f,0xe9,0x78,0x99,0x5c,0x08,0x08 = vpshaw %xmm0, 8(%rax, %rcx), %xmm3 0x8f,0xe9,0x58,0x9b,0xe4 = vpshaq %xmm4, %xmm4, %xmm4 0x8f,0xe9,0xe8,0x9b,0x01 = vpshaq (%rcx), %xmm2, %xmm0 0x8f,0xe9,0x48,0x9b,0x2c,0x08 = vpshaq %xmm6, (%rax, %rcx), %xmm5 0x8f,0xe9,0x50,0x9a,0xc4 = vpshad %xmm5, %xmm4, %xmm0 0x8f,0xe9,0xe8,0x9a,0x28 = vpshad (%rax), %xmm2, %xmm5 0x8f,0xe9,0x68,0x9a,0x28 = vpshad %xmm2, (%rax), %xmm5 0x8f,0xe9,0x70,0x98,0xc1 = vpshab %xmm1, %xmm1, %xmm0 0x8f,0xe9,0xd8,0x98,0x01 = vpshab (%rcx), %xmm4, %xmm0 0x8f,0xe9,0x50,0x98,0x19 = vpshab %xmm5, (%rcx), %xmm3 0x8f,0xe9,0xe0,0x91,0x30 = vprotw (%rax), %xmm3, %xmm6 0x8f,0xe9,0x50,0x91,0x0c,0x08 = vprotw %xmm5, (%rax, %rcx), %xmm1 0x8f,0xe9,0x78,0x91,0xd1 = vprotw %xmm0, %xmm1, %xmm2 0x8f,0xe8,0x78,0xc1,0x09,0x2a = vprotw $42, (%rcx), %xmm1 0x8f,0xe8,0x78,0xc1,0x20,0x29 = vprotw $41, (%rax), %xmm4 0x8f,0xe8,0x78,0xc1,0xd9,0x28 = vprotw $40, %xmm1, %xmm3 0x8f,0xe9,0xf0,0x93,0x10 = vprotq (%rax), %xmm1, %xmm2 0x8f,0xe9,0xf0,0x93,0x14,0x08 = vprotq (%rax, %rcx), %xmm1, %xmm2 0x8f,0xe9,0x78,0x93,0xd1 = vprotq %xmm0, %xmm1, %xmm2 0x8f,0xe8,0x78,0xc3,0x10,0x2a = vprotq $42, (%rax), %xmm2 0x8f,0xe8,0x78,0xc3,0x14,0x08,0x2a = vprotq $42, (%rax, %rcx), %xmm2 0x8f,0xe8,0x78,0xc3,0xd1,0x2a = vprotq $42, %xmm1, %xmm2 0x8f,0xe9,0xf8,0x92,0x18 = vprotd (%rax), %xmm0, %xmm3 0x8f,0xe9,0x68,0x92,0x24,0x08 = vprotd %xmm2, (%rax, %rcx), %xmm4 0x8f,0xe9,0x50,0x92,0xd3 = vprotd %xmm5, %xmm3, %xmm2 0x8f,0xe8,0x78,0xc2,0x31,0x2b = vprotd $43, (%rcx), %xmm6 0x8f,0xe8,0x78,0xc2,0x3c,0x08,0x2c = vprotd $44, (%rax, %rcx), %xmm7 0x8f,0xe8,0x78,0xc2,0xe4,0x2d = vprotd $45, %xmm4, %xmm4 0x8f,0xe9,0xe8,0x90,0x29 = vprotb (%rcx), %xmm2, %xmm5 0x8f,0xe9,0x50,0x90,0x24,0x08 = vprotb %xmm5, (%rax, %rcx), %xmm4 0x8f,0xe9,0x58,0x90,0xd3 = vprotb %xmm4, %xmm3, %xmm2 0x8f,0xe8,0x78,0xc0,0x18,0x2e = vprotb $46, (%rax), %xmm3 0x8f,0xe8,0x78,0xc0,0x3c,0x08,0x2f = vprotb $47, (%rax, %rcx), %xmm7 0x8f,0xe8,0x78,0xc0,0xed,0x30 = vprotb $48, %xmm5, %xmm5 0x8f,0xe8,0x60,0xb6,0xe2,0x10 = vpmadcswd %xmm1, %xmm2, %xmm3, %xmm4 0x8f,0xe8,0x60,0xb6,0x20,0x10 = vpmadcswd %xmm1, (%rax), %xmm3, %xmm4 0x8f,0xe8,0x48,0xa6,0xe4,0x10 = vpmadcsswd %xmm1, %xmm4, %xmm6, %xmm4 0x8f,0xe8,0x60,0xa6,0x24,0x08,0x10 = vpmadcsswd %xmm1, (%rax, %rcx), %xmm3, %xmm4 0x8f,0xe8,0x50,0x95,0xe2,0x00 = vpmacsww %xmm0, %xmm2, %xmm5, %xmm4 0x8f,0xe8,0x48,0x95,0x20,0x10 = vpmacsww %xmm1, (%rax), %xmm6, %xmm4 0x8f,0xe8,0x48,0x96,0xfd,0x40 = vpmacswd %xmm4, %xmm5, %xmm6, %xmm7 0x8f,0xe8,0x70,0x96,0x10,0x00 = vpmacswd %xmm0, (%rax), %xmm1, %xmm2 0x8f,0xe8,0x68,0x85,0xcb,0x40 = vpmacssww %xmm4, %xmm3, %xmm2, %xmm1 0x8f,0xe8,0x40,0x85,0x39,0x60 = vpmacssww %xmm6, (%rcx), %xmm7, %xmm7 0x8f,0xe8,0x58,0x86,0xd2,0x40 = vpmacsswd %xmm4, %xmm2, %xmm4, %xmm2 0x8f,0xe8,0x70,0x86,0x44,0x08,0x08,0x00 = vpmacsswd %xmm0, 8(%rax, %rcx), %xmm1, %xmm0 0x8f,0xe8,0x68,0x87,0xe1,0x10 = vpmacssdql %xmm1, %xmm1, %xmm2, %xmm4 0x8f,0xe8,0x48,0x87,0x29,0x70 = vpmacssdql %xmm7, (%rcx), %xmm6, %xmm5 0x8f,0xe8,0x78,0x8f,0xca,0x30 = vpmacssdqh %xmm3, %xmm2, %xmm0, %xmm1 0x8f,0xe8,0x68,0x8f,0x1c,0x08,0x70 = vpmacssdqh %xmm7, (%rax, %rcx), %xmm2, %xmm3 0x8f,0xe8,0x60,0x8e,0xea,0x20 = vpmacssdd %xmm2, %xmm2, %xmm3, %xmm5 0x8f,0xe8,0x70,0x8e,0x10,0x40 = vpmacssdd %xmm4, (%rax), %xmm1, %xmm2 0x8f,0xe8,0x48,0x97,0xf8,0x30 = vpmacsdql %xmm3, %xmm0, %xmm6, %xmm7 0x8f,0xe8,0x60,0x97,0x69,0x08,0x50 = vpmacsdql %xmm5, 8(%rcx), %xmm3, %xmm5 0x8f,0xe8,0x60,0x9f,0xd5,0x70 = vpmacsdqh %xmm7, %xmm5, %xmm3, %xmm2 0x8f,0xe8,0x68,0x9f,0x40,0x04,0x50 = vpmacsdqh %xmm5, 4(%rax), %xmm2, %xmm0 0x8f,0xe8,0x58,0x9e,0xd6,0x40 = vpmacsdd %xmm4, %xmm6, %xmm4, %xmm2 0x8f,0xe8,0x58,0x9e,0x1c,0x08,0x40 = vpmacsdd %xmm4, (%rax, %rcx), %xmm4, %xmm3 0x8f,0xe8,0x60,0xcd,0xe2,0x2a = vpcomw $42, %xmm2, %xmm3, %xmm4 0x8f,0xe8,0x60,0xcd,0x20,0x2a = vpcomw $42, (%rax), %xmm3, %xmm4 0x8f,0xe8,0x60,0xed,0xe9,0x2b = vpcomuw $43, %xmm1, %xmm3, %xmm5 0x8f,0xe8,0x78,0xed,0x34,0x08,0x2c = vpcomuw $44, (%rax, %rcx), %xmm0, %xmm6 0x8f,0xe8,0x60,0xef,0xfb,0x2d = vpcomuq $45, %xmm3, %xmm3, %xmm7 0x8f,0xe8,0x60,0xef,0x08,0x2e = vpcomuq $46, (%rax), %xmm3, %xmm1 0x8f,0xe8,0x70,0xee,0xd0,0x2f = vpcomud $47, %xmm0, %xmm1, %xmm2 0x8f,0xe8,0x48,0xee,0x58,0x04,0x30 = vpcomud $48, 4(%rax), %xmm6, %xmm3 0x8f,0xe8,0x58,0xec,0xeb,0x31 = vpcomub $49, %xmm3, %xmm4, %xmm5 0x8f,0xe8,0x48,0xec,0x11,0x32 = vpcomub $50, (%rcx), %xmm6, %xmm2 0x8f,0xe8,0x78,0xcf,0xeb,0x33 = vpcomq $51, %xmm3, %xmm0, %xmm5 0x8f,0xe8,0x70,0xcf,0x38,0x34 = vpcomq $52, (%rax), %xmm1, %xmm7 0x8f,0xe8,0x60,0xce,0xc3,0x35 = vpcomd $53, %xmm3, %xmm3, %xmm0 0x8f,0xe8,0x68,0xce,0x11,0x36 = vpcomd $54, (%rcx), %xmm2, %xmm2 0x8f,0xe8,0x58,0xcc,0xd6,0x37 = vpcomb $55, %xmm6, %xmm4, %xmm2 0x8f,0xe8,0x60,0xcc,0x50,0x08,0x38 = vpcomb $56, 8(%rax), %xmm3, %xmm2 0x8f,0xe8,0x60,0xa3,0xe2,0x10 = vpperm %xmm1, %xmm2, %xmm3, %xmm4 0x8f,0xe8,0xe0,0xa3,0x20,0x20 = vpperm (%rax), %xmm2, %xmm3, %xmm4 0x8f,0xe8,0x60,0xa3,0x20,0x10 = vpperm %xmm1, (%rax), %xmm3, %xmm4 0x8f,0xe8,0x60,0xa2,0xe2,0x10 = vpcmov %xmm1, %xmm2, %xmm3, %xmm4 0x8f,0xe8,0xe0,0xa2,0x20,0x20 = vpcmov (%rax), %xmm2, %xmm3, %xmm4 0x8f,0xe8,0x60,0xa2,0x20,0x10 = vpcmov %xmm1, (%rax), %xmm3, %xmm4 0x8f,0xe8,0x64,0xa2,0xe2,0x10 = vpcmov %ymm1, %ymm2, %ymm3, %ymm4 0x8f,0xe8,0xe4,0xa2,0x20,0x20 = vpcmov (%rax), %ymm2, %ymm3, %ymm4 0x8f,0xe8,0x64,0xa2,0x20,0x10 = vpcmov %ymm1, (%rax), %ymm3, %ymm4 0xc4,0xe3,0x71,0x49,0xfa,0x51 = vpermil2pd $1, %xmm5, %xmm2, %xmm1, %xmm7 0xc4,0xe3,0xe1,0x49,0x20,0x32 = vpermil2pd $2, (%rax), %xmm3, %xmm3, %xmm4 0xc4,0xe3,0xdd,0x49,0x70,0x08,0x03 = vpermil2pd $3, 8(%rax), %ymm0, %ymm4, %ymm6 0xc4,0xe3,0x71,0x49,0x04,0x08,0x30 = vpermil2pd $0, %xmm3, (%rax, %rcx), %xmm1, %xmm0 0xc4,0xe3,0x65,0x49,0xe2,0x11 = vpermil2pd $1, %ymm1, %ymm2, %ymm3, %ymm4 0xc4,0xe3,0x65,0x49,0x20,0x12 = vpermil2pd $2, %ymm1, (%rax), %ymm3, %ymm4 0xc4,0xe3,0x69,0x48,0xcb,0x40 = vpermil2ps $0, %xmm4, %xmm3, %xmm2, %xmm1 0xc4,0xe3,0xe1,0x48,0x40,0x04,0x21 = vpermil2ps $1, 4(%rax), %xmm2, %xmm3, %xmm0 0xc4,0xe3,0xd5,0x48,0x30,0x12 = vpermil2ps $2, (%rax), %ymm1, %ymm5, %ymm6 0xc4,0xe3,0x61,0x48,0x20,0x13 = vpermil2ps $3, %xmm1, (%rax), %xmm3, %xmm4 0xc4,0xe3,0x6d,0x48,0xd4,0x40 = vpermil2ps $0, %ymm4, %ymm4, %ymm2, %ymm2 0xc4,0xe3,0x75,0x49,0x40,0x04,0x11 = vpermil2pd $1, %ymm1, 4(%rax), %ymm1, %ymm0 capstone-sys-0.11.0/capstone/suite/README010066400017500001750000000020001363402546700162730ustar0000000000000000This directory contains some tools used by developers of Capstone project. Average users should ignore all the contents here. - arm/ Test some ARM's special input. - MC/ Input used to test various architectures & modes. - benchmark.py This script benchmarks Python binding by disassembling some random code. - test_*.sh Run all the tests and send the output to external file to be compared later. This is useful when we want to verify if a commit (wrongly) changes the disassemble result. - compile_all.sh Compile Capstone for all platforms (*nix32, clang, cygwin, cross-compile) & report the result as pass or fail. - fuzz.py This simple script disassembles random code for all archs (or selected arch) in order to find segfaults. - test_mc.sh This script compares the output of Capstone with LLVM's llvm-mc with the input coming from MC/. This relies on test_mc.py to do all the hard works. - x86odd.py Test some tricky X86 instructions. - ppcbranch.py Test some tricky branch PPC instructions. capstone-sys-0.11.0/capstone/suite/arm/Makefile010066400017500001750000000003561363402546700176460ustar0000000000000000# Sample Makefile for Capstone Disassembly Engine LIBNAME = capstone test_arm_regression: test_arm_regression.o ${CC} $< -O3 -Wall -l$(LIBNAME) -o $@ %.o: %.c ${CC} -c -I../../include $< -o $@ clean: rm -rf *.o test_arm_regression capstone-sys-0.11.0/capstone/suite/arm/test_arm_regression.c010066400017500001750000000214321363402546700224260ustar0000000000000000/* Capstone Disassembler Engine */ /* By David Hogarty, 2014 */ // the following must precede stdio (woo, thanks msft) #if defined(_MSC_VER) && _MSC_VER < 1900 #define _CRT_SECURE_NO_WARNINGS #define snprintf _snprintf #endif #include #include #include #include #include static csh handle; struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; char *comment; int syntax; }; static char *hex_string(unsigned char *str, size_t len) { // returns a malloced string that has the hex version of the string in it // null if failed to malloc char *hex_out; size_t i; hex_out = (char *) malloc(len*2 + 1); // two ascii characters per input character, plus trailing null if (!hex_out) { goto Exit; } for (i = 0; i < len; ++i) { snprintf(hex_out + (i*2), 2, "%02x", str[i]); } hex_out[len*2] = 0; // trailing null Exit: return hex_out; } static void snprint_insn_detail(char * buf, size_t * cur, size_t * left, cs_insn *ins) { size_t used = 0; #define _this_printf(...) \ { \ size_t used = 0; \ used = snprintf(buf + *cur, *left, __VA_ARGS__); \ *left -= used; \ *cur += used; \ } cs_arm *arm; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; arm = &(ins->detail->arm); if (arm->op_count) _this_printf("\top_count: %u\n", arm->op_count); for (i = 0; i < arm->op_count; i++) { cs_arm_op *op = &(arm->operands[i]); switch((int)op->type) { default: break; case ARM_OP_REG: _this_printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case ARM_OP_IMM: _this_printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case ARM_OP_FP: _this_printf("\t\toperands[%u].type: FP = %f\n", i, op->fp); break; case ARM_OP_MEM: _this_printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != X86_REG_INVALID) _this_printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != X86_REG_INVALID) _this_printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.scale != 1) _this_printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale); if (op->mem.disp != 0) _this_printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; case ARM_OP_PIMM: _this_printf("\t\toperands[%u].type: P-IMM = %u\n", i, op->imm); break; case ARM_OP_CIMM: _this_printf("\t\toperands[%u].type: C-IMM = %u\n", i, op->imm); break; } if (op->shift.type != ARM_SFT_INVALID && op->shift.value) { if (op->shift.type < ARM_SFT_ASR_REG) { // shift with constant value _this_printf("\t\t\tShift: %u = %u\n", op->shift.type, op->shift.value); } else { // shift with register _this_printf("\t\t\tShift: %u = %s\n", op->shift.type, cs_reg_name(handle, op->shift.value)); } } } if (arm->cc != ARM_CC_AL && arm->cc != ARM_CC_INVALID) { _this_printf("\tCode condition: %u\n", arm->cc); } if (arm->update_flags) { _this_printf("\tUpdate-flags: True\n"); } if (arm->writeback) { _this_printf("\tWrite-back: True\n"); } #undef _this_printf } static void print_insn_detail(cs_insn *ins) { char a_buf[2048]; size_t cur=0, left=2048; snprint_insn_detail(a_buf, &cur, &left, ins); printf("%s\n", a_buf); } struct invalid_code { unsigned char *code; size_t size; char *comment; }; #define MAX_INVALID_CODES 16 struct invalid_instructions { cs_arch arch; cs_mode mode; char *platform_comment; int num_invalid_codes; struct invalid_code invalid_codes[MAX_INVALID_CODES]; }; static void test_invalids() { struct invalid_instructions invalids[] = {{ CS_ARCH_ARM, CS_MODE_THUMB, "Thumb", 1, {{ (unsigned char *)"\xbd\xe8\x1e\xff", 4, "invalid thumb2 pop because sp used and because both pc and lr are " "present at the same time" }}, }}; struct invalid_instructions * invalid = NULL; uint64_t address = 0x1000; cs_insn *insn; int i; int j; size_t count; printf("\nShould be invalid\n" "-----------------\n"); for (i = 0; i < sizeof(invalids)/sizeof(invalids[0]); i++) { cs_err err; invalid = invalids + i; err = cs_open(invalid->arch, invalid->mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); continue; } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); cs_option(handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_NOREGNAME); for (j = 0; j < invalid->num_invalid_codes; ++j) { struct invalid_code *invalid_code = NULL; char *hex_str = NULL; invalid_code = invalid->invalid_codes + j; hex_str = hex_string(invalid_code->code, invalid_code->size); printf("%s %s: %s\n", invalid->platform_comment, hex_str, invalid_code->comment); free(hex_str); count = cs_disasm(handle, invalid_code->code, invalid_code->size, address, 0, &insn ); if (count) { size_t k; printf(" ERROR:\n"); for (k = 0; k < count; k++) { printf(" 0x%"PRIx64":\t%s\t%s\n", insn[k].address, insn[k].mnemonic, insn[k].op_str); print_insn_detail(&insn[k]); } cs_free(insn, count); } else { printf(" SUCCESS: invalid\n"); } } cs_close(&handle); } } struct valid_code { unsigned char *code; size_t size; uint32_t start_addr; char *expected_out; char *comment; }; #define MAX_VALID_CODES 16 struct valid_instructions { cs_arch arch; cs_mode mode; char *platform_comment; int num_valid_codes; struct valid_code valid_codes[MAX_VALID_CODES]; }; static void test_valids() { struct valid_instructions valids[] = {{ CS_ARCH_ARM, CS_MODE_THUMB, "Thumb", 3, {{ (unsigned char *)"\x00\xf0\x26\xe8", 4, 0x352, "0x352:\tblx\t#0x3a0\n" "\top_count: 1\n" "\t\toperands[0].type: IMM = 0x3a0\n", "thumb2 blx with misaligned immediate" }, { (unsigned char *)"\x05\xdd", 2, 0x1f0, "0x1f0:\tble\t#0x1fe\n" "\top_count: 1\n" "\t\toperands[0].type: IMM = 0x1fe\n" "\tCode condition: 14\n", "thumb b cc with thumb-aligned target" }, { (unsigned char *)"\xbd\xe8\xf0\x8f", 4, 0, "0x0:\tpop.w\t{r4, r5, r6, r7, r8, r9, r10, r11, pc}\n" "\top_count: 9\n" "\t\toperands[0].type: REG = r4\n" "\t\toperands[1].type: REG = r5\n" "\t\toperands[2].type: REG = r6\n" "\t\toperands[3].type: REG = r7\n" "\t\toperands[4].type: REG = r8\n" "\t\toperands[5].type: REG = r9\n" "\t\toperands[6].type: REG = r10\n" "\t\toperands[7].type: REG = r11\n" "\t\toperands[8].type: REG = pc\n", "thumb2 pop that should be valid" }, } }}; struct valid_instructions * valid = NULL; uint64_t address = 0x1000; cs_insn *insn; int i; int j; size_t count; for (i = 0; i < sizeof(valids)/sizeof(valids[0]); i++) { cs_err err; valid = valids + i; err = cs_open(valid->arch, valid->mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); continue; } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); cs_option(handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_NOREGNAME); #define _this_printf(...) \ { \ size_t used = 0; \ used = snprintf(tmp_buf + cur, left, __VA_ARGS__); \ left -= used; \ cur += used; \ } printf("\nShould be valid\n" "---------------\n"); for (j = 0; j < valid->num_valid_codes; ++j) { char tmp_buf[2048]; size_t left = 2048; size_t cur = 0; size_t used = 0; int success = 0; char * hex_str = NULL; struct valid_code * valid_code = NULL; valid_code = valid->valid_codes + j; hex_str = hex_string(valid_code->code, valid_code->size); printf("%s %s @ 0x%04x: %s\n %s", valid->platform_comment, hex_str, valid_code->start_addr, valid_code->comment, valid_code->expected_out); count = cs_disasm(handle, valid_code->code, valid_code->size, valid_code->start_addr, 0, &insn ); if (count) { size_t k; size_t max_len = 0; size_t tmp_len = 0; for (k = 0; k < count; k++) { _this_printf( "0x%"PRIx64":\t%s\t%s\n", insn[k].address, insn[k].mnemonic, insn[k].op_str ); snprint_insn_detail(tmp_buf, &cur, &left, &insn[k]); } max_len = strlen(tmp_buf); tmp_len = strlen(valid_code->expected_out); if (tmp_len > max_len) { max_len = tmp_len; } if (memcmp(tmp_buf, valid_code->expected_out, max_len)) { printf( " ERROR: '''\n%s''' does not match" " expected '''\n%s'''\n", tmp_buf, valid_code->expected_out ); } else { printf(" SUCCESS: valid\n"); } cs_free(insn, count); } else { printf("ERROR: invalid\n"); } } cs_close(&handle); } #undef _this_prinf } int main() { test_invalids(); test_valids(); return 0; } capstone-sys-0.11.0/capstone/suite/autogen_x86imm.py010075500017500001750000000066641363402546700206640ustar0000000000000000#!/usr/bin/python # By Nguyen Anh Quynh, 2015 # This tool extract sizes of immediadte operands from X86 instruction names. # Syntax: ./autogen_x86imm.py # Gather immediate sizes to put into X86ImmSize.inc OUTPUT = "../arch/X86/X86ImmSize.inc" f = open("../arch/X86/X86GenInstrInfo.inc") f2 = open(OUTPUT, "w") for line in f.readlines(): tmp = line.strip().split("=") if len(tmp) == 2: # X86_xxx = nnn, name = tmp[0].strip() if name == "X86_INSTRUCTION_LIST_END": # no more instructions break if name.endswith("_DB"): # pseudo instruction continue if "_LOCK_" in name or "BEXTR" in name: # exception continue if name.startswith("X86_"): # instruction if name.endswith("16mi8"): f2.write("{2, %s},\n" %name) elif name.endswith("16ri8"): f2.write("{2, %s},\n" %name) elif name.endswith("32ri8"): f2.write("{4, %s},\n" %name) elif name.endswith("32mi8"): f2.write("{4, %s},\n" %name) elif name.endswith("64i32"): f2.write("{8, %s},\n" %name) elif name.endswith("64mi32"): f2.write("{8, %s},\n" %name) elif name.endswith("64ri32"): f2.write("{8, %s},\n" %name) elif name.endswith("64ri8"): f2.write("{8, %s},\n" %name) elif name.endswith("64mi8"): f2.write("{8, %s},\n" %name) elif name.endswith("16rmi8"): f2.write("{2, %s},\n" %name) elif name.endswith("32rmi8"): f2.write("{4, %s},\n" %name) elif name.endswith("16rri8"): f2.write("{2, %s},\n" %name) elif name.endswith("32rri8"): f2.write("{4, %s},\n" %name) elif name.endswith("64rmi8"): f2.write("{8, %s},\n" %name) elif name.endswith("64rmi32"): f2.write("{8, %s},\n" %name) elif name.endswith("64rri32"): f2.write("{8, %s},\n" %name) elif name.endswith("64rri8"): f2.write("{8, %s},\n" %name) elif name.endswith("32ri64"): # special case f2.write("{8, %s},\n" %name) elif name.endswith("16i8"): # special case f2.write("{2, %s},\n" %name) elif name.endswith("32i8"): # special case f2.write("{4, %s},\n" %name) elif name.endswith("64i16"): # special case f2.write("{8, %s},\n" %name) elif name.endswith("64i8"): # special case f2.write("{8, %s},\n" %name) elif name.endswith("i8") or "i8_" in name: f2.write("{1, %s},\n" %name) elif "8ri" in name or "8mi" in name: f2.write("{1, %s},\n" %name) elif name.endswith("i16") or "i16_" in name: f2.write("{2, %s},\n" %name) elif "16ri" in name or "16mi" in name: f2.write("{2, %s},\n" %name) elif name.endswith("i32") or "i32_" in name: f2.write("{4, %s},\n" %name) elif "32ri" in name or "32mi" in name: f2.write("{4, %s},\n" %name) elif name.endswith("i64") or "i64_" in name: f2.write("{8, %s},\n" %name) elif "64ri" in name or "64mi" in name: f2.write("{8, %s},\n" %name) f.close() f2.close() print("Generated %s" %OUTPUT) capstone-sys-0.11.0/capstone/suite/benchmark.py010075500017500001750000000070341363402546700177340ustar0000000000000000#!/usr/bin/python # Simple benchmark for Capstone by disassembling random code. By Nguyen Anh Quynh, 2014 # Syntax: # ./suite/benchmark.py --> Benchmark all archs # ./suite/benchmark.py x86 --> Benchmark all X86 (all 16bit, 32bit, 64bit) # ./suite/benchmark.py x86-32 --> Benchmark X86-32 arch only # ./suite/benchmark.py arm --> Benchmark all ARM (arm, thumb) # ./suite/benchmark.py aarch64 --> Benchmark ARM-64 # ./suite/benchmark.py mips --> Benchmark all Mips (32bit, 64bit) # ./suite/benchmark.py ppc --> Benchmark PPC from capstone import * from time import time from random import randint import sys # file providing code to disassemble FILE = '/usr/bin/python' all_tests = ( (CS_ARCH_X86, CS_MODE_16, "X86-16 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, "X86-32 (ATT syntax)", CS_OPT_SYNTAX_ATT), (CS_ARCH_X86, CS_MODE_32, "X86-32 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_64, "X86-64 (Intel syntax)", 0), (CS_ARCH_ARM, CS_MODE_ARM, "ARM", 0), (CS_ARCH_ARM, CS_MODE_THUMB, "THUMB (ARM)", 0), (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, "MIPS-32 (Big-endian)", 0), (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, "MIPS-64-EL (Little-endian)", 0), (CS_ARCH_ARM64, CS_MODE_ARM, "ARM-64 (AArch64)", 0), (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC", 0), (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC, print register with number only", CS_OPT_SYNTAX_NOREGNAME), (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc", 0), (CS_ARCH_SYSZ, 0, "SystemZ", 0), (CS_ARCH_XCORE, 0, "XCore", 0), (CS_ARCH_M68K, 0, "M68K", 0), ) # for debugging def to_hex(s): return " ".join("0x" + "{0:x}".format(ord(c)).zfill(2) for c in s) # <-- Python 3 is OK def get_code(f, size): code = f.read(size) if len(code) != size: # reached end-of-file? # then reset file position to begin-of-file f.seek(0) code = f.read(size) return code def cs(md, code): insns = md.disasm(code, 0) # uncomment below line to speed up this function 200 times! # return for i in insns: if i.address == 0x100000: print i def cs_lite(md, code): insns = md.disasm_lite(code, 0) for (addr, size, mnem, ops) in insns: if addr == 0x100000: print i cfile = open(FILE) for (arch, mode, comment, syntax) in all_tests: try: request = sys.argv[1] if not request in comment.lower(): continue except: pass print("Platform: %s" %comment) try: md = Cs(arch, mode) #md.detail = True if syntax != 0: md.syntax = syntax # warm up few times cfile.seek(0) for i in xrange(3): code = get_code(cfile, 128) #print to_hex(code) #print cs(md, code) # start real benchmark c_t = 0 for i in xrange(50000): code = get_code(cfile, 128) #print to_hex(code) #print t1 = time() cs(md, code) c_t += time() - t1 print "Benchmark - full obj:", c_t, "seconds" print cfile.seek(0) c_t = 0 for i in xrange(50000): code = get_code(cfile, 128) #print to_hex(code) #print t1 = time() cs_lite(md, code) c_t += time() - t1 print "Benchmark - lite:", c_t, "seconds" print except CsError as e: print("ERROR: %s" %e) capstone-sys-0.11.0/capstone/suite/benchmark/Makefile010066400017500001750000000003561363402546700210210ustar0000000000000000# Sample Makefile for Capstone Disassembly Engine LIBNAME = capstone test_iter_benchmark: test_iter_benchmark.o ${CC} $< -O3 -Wall -l$(LIBNAME) -o $@ %.o: %.c ${CC} -c -I../../include $< -o $@ clean: rm -rf *.o test_iter_benchmark capstone-sys-0.11.0/capstone/suite/benchmark/test_iter_benchmark.c010066400017500001750000000102271363402546700235370ustar0000000000000000/* Capstone Disassembler Engine */ /* By bughoho , 2015> */ #include #include #include #include #include static void test() { #define X86_CODE32 "\x53\x8B\xDC\x83\xEC\x08\x83\xE4\xF0\x83\xC4\x04\x55\x8B\x6B\x04\x89\x6C\x24\x04\x8B\xEC\x83\xEC\x78\xA1\x90\xA3\x4B\x01\x33\xC5 \ \x89\x45\xFC\x8B\x41\x04\x0F\x28\x05\x80\x30\x20\x01\x0F\x29\x45\xD0\x0F\x28\x05\x50\xAB\x1E\x01\x89\x4D\x90\x89\x45\xB8\x0F\x29 \ \x45\xE0\x56\x8B\x73\x08\x57\xC7\x06\x00\x00\x00\x00\xC7\x46\x04\x00\x00\x00\x00\xC7\x46\x08\x00\x00\x00\x00\xC7\x46\x0C\x00\x00 \ \x00\x00\x85\xC0\x0F\x84\xCB\x01\x00\x00\x33\xFF\x8D\x64\x24\x00\x8B\x01\x8B\x0C\x07\x89\x4D\xBC\x85\xC9\x0F\x84\xA6\x01\x00\x00 \ \x8B\x43\x0C\x0F\x10\x00\x0F\x29\x45\xD0\x0F\x10\x40\x10\x0F\x29\x45\xE0\x8B\x01\x8B\x40\x08\xFF\xD0\xF3\x0F\x10\x65\xD0\x8D\x55 \ \xD0\xF3\x0F\x10\x55\xD4\xF3\x0F\x10\x6D\xE0\xF3\x0F\x10\x48\x10\xF3\x0F\x10\x00\xF3\x0F\x10\x5D\xE4\xF3\x0F\x59\xCA\x8B\x4D\xBC \ \xF3\x0F\x59\xC4\x52\x8D\x55\xC0\x52\xF3\x0F\x58\xC8\xF3\x0F\x11\x4D\xD0\xF3\x0F\x10\x48\x10\xF3\x0F\x10\x00\xF3\x0F\x59\xCB\xF3 \ \x0F\x59\xC5\xF3\x0F\x58\xC8\xF3\x0F\x11\x4D\xE0\x0F\x28\xCC\xF3\x0F\x59\x48\x04\xF3\x0F\x10\x40\x14\xF3\x0F\x59\xC2\xF3\x0F\x58 \ \xC8\xF3\x0F\x11\x4D\xD4\x0F\x28\xCD\xF3\x0F\x10\x40\x14\xF3\x0F\x59\x48\x04\xC7\x45\xE8\x00\x00\x00\x00\xF3\x0F\x59\xC3\xC7\x45 \ \xD8\x00\x00\x00\x00\xF3\x0F\x58\xC8\xF3\x0F\x11\x4D\xE4\xF3\x0F\x59\x60\x0C\xF3\x0F\x59\x50\x1C\xF3\x0F\x58\xE2\xF3\x0F\x58\x65 \ \xDC\xF3\x0F\x11\x65\xDC\xF3\x0F\x59\x68\x0C\xF3\x0F\x59\x58\x1C\xF3\x0F\x58\xEB\xF3\x0F\x58\x6D\xEC\xF3\x0F\x11\x6D\xEC\x8B\x01 \ \x8B\x80\xF8\x00\x00\x00\xFF\xD0\xF3\x0F\x10\x10\xF3\x0F\x10\x58\x08\x0F\x2F\xD3\xF3\x0F\x10\x40\x04\xF3\x0F\x10\x48\x0C\xF3\x0F \ \x11\x55\xA0\xF3\x0F\x11\x45\x94\xF3\x0F\x11\x5D\x98\xF3\x0F\x11\x4D\xBC\x0F\x83\x8E\x00\x00\x00\x0F\x2F\xC1\x0F\x83\x85\x00\x00 \ \x00\x8B\xCE\xE8\xE8\xAC\x86\xFF\xF3\x0F\x10\x65\xA0\x84\xC0\x75\x53\xF3\x0F\x10\x06\x0F\x2F\xC4\x77\x03\x0F\x28\xE0\xF3\x0F\x10 \ \x5E\x08\xF3\x0F\x10\x45\x98\x0F\x2F\xD8\x77\x03\x0F\x28\xD8\xF3\x0F\x10\x4E\x04\xF3\x0F\x10\x45\x94\x0F\x2F\xC8\x77\x03\x0F\x28 \ \xC1\xF3\x0F\x10\x4E\x0C\xF3\x0F\x10\x55\xBC\x0F\x2F\xCA\x77\x03\x0F\x28\xCA\xF3\x0F\x11\x46\x04\xF3\x0F\x11\x5E\x08\xF3\x0F\x11" /* i'm test on the ubuntu 15.04 vmware, * Sorry I haven't linux under the physical environment, * so the results may not be accurate. * * original version output: * bug@ubuntu:~/capstone/suite/benchmark$ make * cc -c -I../../include test_iter_benchmark.c -o test_iter_benchmark.o * cc test_iter_benchmark.o -O3 -Wall -lcapstone -o test_iter_benchmark * bug@ubuntu:~/capstone/suite/benchmark$ ./test_iter_benchmark * time used:6.017613 * * rebuild: * * bug@ubuntu:~/capstone$ make clean * bug@ubuntu:~/capstone$ sudo make install * bug@ubuntu:~/capstone$ cd suite/benchmark/ * bug@ubuntu:~/capstone/suite/benchmark$ make clean * bug@ubuntu:~/capstone/suite/benchmark$ make * * modified version output: * bug@ubuntu:~/capstone/suite/benchmark$ ./test_iter_benchmark * time used:5.003864 * * if we don't output format text string,like this: * //handle->printer(&mci, &ss, handle->printer_info); <-----cs.c line 700 * bug@ubuntu:~/capstone/suite/benchmark$ ./test_iter_benchmark * time used:2.059570 */ csh handle; uint64_t address; cs_insn *insn; int i; cs_err err; const uint8_t *code; size_t size; err = cs_open(CS_ARCH_X86, CS_MODE_32, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); return; } cs_option(handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_INTEL); cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); clock_t start, end; double timeUsed; start = clock(); int maxcount = 10000000; insn = cs_malloc(handle); for (i = 0; i < maxcount;) { code = (const uint8_t *)X86_CODE32; address = 0x1000; size = sizeof(X86_CODE32) - 1; while(cs_disasm_iter(handle, &code, &size, &address, insn)) { i++; } } cs_free(insn, 1); cs_close(&handle); end = clock(); timeUsed = (double)(end - start) / CLOCKS_PER_SEC; printf("time used:%f\n", timeUsed); } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/suite/capstone_get_setup.c010066400017500001750000000024041363402546700214620ustar0000000000000000/* Retrieve architectures compiled in Capstone. By Nguyen Anh Quynh, 2019. Compile this code with: $ cc -o capstone_get_setup capstone_get_setup.c -lcapstone On default Capstone build, this code prints out the below output: $ capstone_get_setup x86=1 arm=1 arm64=1 mips=1 ppc=1 sparc=1 sysz=1 xcore=1 m68k=1 tms320c64x=1 m680x=1 evm=1 */ #include #include int main() { if (cs_support(CS_ARCH_X86)) { printf("x86=1 "); } if (cs_support(CS_ARCH_ARM)) { printf("arm=1 "); } if (cs_support(CS_ARCH_ARM64)) { printf("arm64=1 "); } if (cs_support(CS_ARCH_MIPS)) { printf("mips=1 "); } if (cs_support(CS_ARCH_PPC)) { printf("ppc=1 "); } if (cs_support(CS_ARCH_SPARC)) { printf("sparc=1 "); } if (cs_support(CS_ARCH_SYSZ)) { printf("sysz=1 "); } if (cs_support(CS_ARCH_XCORE)) { printf("xcore=1 "); } if (cs_support(CS_ARCH_M68K)) { printf("m68k=1 "); } if (cs_support(CS_ARCH_TMS320C64X)) { printf("tms320c64x=1 "); } if (cs_support(CS_ARCH_M680X)) { printf("m680x=1 "); } if (cs_support(CS_ARCH_EVM)) { printf("evm=1 "); } if (cs_support(CS_SUPPORT_DIET)) { printf("diet=1 "); } if (cs_support(CS_SUPPORT_X86_REDUCE)) { printf("x86_reduce=1 "); } printf("\n"); return 0; } capstone-sys-0.11.0/capstone/suite/compile_all.sh010075500017500001750000000010411363402546700202340ustar0000000000000000#! /bin/bash # By Daniel Godas-Lopez. export LD_LIBRARY_PATH=. for x in default nix32 cross-win32 cross-win64 cygwin-mingw32 cygwin-mingw64 bsd clang gcc; do echo -n "Compiling: $x ... " ./compile.sh $x &> /dev/null if [ $? == 0 ]; then echo "-> PASS" else echo -e "-> FAILED\n" continue fi for t in test test_arm test_arm64 test_detail test_mips test_x86 test_ppc; do ./tests/$t &> /dev/null if [ $? -eq 0 ]; then echo " Run $t -> PASS" else echo " Run $t -> FAIL" fi done echo done make clean &> /dev/null capstone-sys-0.11.0/capstone/suite/disasm_mc.py010075500017500001750000000166111363402546700177420ustar0000000000000000#!/usr/bin/python # Test tool to disassemble MC files. By Nguyen Anh Quynh, 2017 import array, os.path, sys from capstone import * # convert all hex numbers to decimal numbers in a text def normalize_hex(a): while(True): i = a.find('0x') if i == -1: # no more hex number break hexnum = '0x' for c in a[i + 2:]: if c in '0123456789abcdefABCDEF': hexnum += c else: break num = int(hexnum, 16) a = a.replace(hexnum, str(num)) return a def test_file(fname): print("Test %s" %fname); f = open(fname) lines = f.readlines() f.close() if not lines[0].startswith('# '): print("ERROR: decoding information is missing") return # skip '# ' at the front, then split line to get out hexcode # Note: option can be '', or 'None' #print lines[0] #print lines[0][2:].split(', ') (arch, mode, option) = lines[0][2:].split(', ') mode = mode.replace(' ', '') option = option.strip() archs = { "CS_ARCH_ARM": CS_ARCH_ARM, "CS_ARCH_ARM64": CS_ARCH_ARM64, "CS_ARCH_MIPS": CS_ARCH_MIPS, "CS_ARCH_PPC": CS_ARCH_PPC, "CS_ARCH_SPARC": CS_ARCH_SPARC, "CS_ARCH_SYSZ": CS_ARCH_SYSZ, "CS_ARCH_X86": CS_ARCH_X86, "CS_ARCH_XCORE": CS_ARCH_XCORE, "CS_ARCH_M68K": CS_ARCH_M68K, } modes = { "CS_MODE_16": CS_MODE_16, "CS_MODE_32": CS_MODE_32, "CS_MODE_64": CS_MODE_64, "CS_MODE_MIPS32": CS_MODE_MIPS32, "CS_MODE_MIPS64": CS_MODE_MIPS64, "0": CS_MODE_ARM, "CS_MODE_ARM": CS_MODE_ARM, "CS_MODE_THUMB": CS_MODE_THUMB, "CS_MODE_ARM+CS_MODE_V8": CS_MODE_ARM+CS_MODE_V8, "CS_MODE_THUMB+CS_MODE_V8": CS_MODE_THUMB+CS_MODE_V8, "CS_MODE_THUMB+CS_MODE_MCLASS": CS_MODE_THUMB+CS_MODE_MCLASS, "CS_MODE_LITTLE_ENDIAN": CS_MODE_LITTLE_ENDIAN, "CS_MODE_BIG_ENDIAN": CS_MODE_BIG_ENDIAN, "CS_MODE_64+CS_MODE_LITTLE_ENDIAN": CS_MODE_64+CS_MODE_LITTLE_ENDIAN, "CS_MODE_64+CS_MODE_BIG_ENDIAN": CS_MODE_64+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_MICRO": CS_MODE_MIPS32+CS_MODE_MICRO, "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO": CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, "CS_MODE_BIG_ENDIAN+CS_MODE_V9": CS_MODE_BIG_ENDIAN + CS_MODE_V9, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_LITTLE_ENDIAN": CS_MODE_MIPS32+CS_MODE_LITTLE_ENDIAN, "CS_MODE_MIPS64+CS_MODE_LITTLE_ENDIAN": CS_MODE_MIPS64+CS_MODE_LITTLE_ENDIAN, "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, } options = { "CS_OPT_SYNTAX_ATT": CS_OPT_SYNTAX_ATT, "CS_OPT_SYNTAX_NOREGNAME": CS_OPT_SYNTAX_NOREGNAME, } mc_modes = { ("CS_ARCH_X86", "CS_MODE_32"): ['-triple=i386'], ("CS_ARCH_X86", "CS_MODE_64"): ['-triple=x86_64'], ("CS_ARCH_ARM", "CS_MODE_ARM"): ['-triple=armv7'], ("CS_ARCH_ARM", "CS_MODE_THUMB"): ['-triple=thumbv7'], ("CS_ARCH_ARM", "CS_MODE_ARM+CS_MODE_V8"): ['-triple=armv8'], ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): ['-triple=thumbv8'], ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): ['-triple=thumbv7m'], ("CS_ARCH_ARM64", "0"): ['-triple=aarch64'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): ['-triple=mips'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): ['-triple=mipsel', '-mattr=+micromips'], ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): ['-triple=mips64el'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32"): ['-triple=mipsel'], ("CS_ARCH_MIPS", "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN"): ['-triple=mips64'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN"): ['-triple=mips', '-mattr=+micromips'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO"): ['-triple=mips', '-mattr=+micromips'], ("CS_ARCH_PPC", "CS_MODE_BIG_ENDIAN"): ['-triple=powerpc64'], ('CS_ARCH_SPARC', 'CS_MODE_BIG_ENDIAN'): ['-triple=sparc'], ('CS_ARCH_SPARC', 'CS_MODE_BIG_ENDIAN+CS_MODE_V9'): ['-triple=sparcv9'], ('CS_ARCH_SYSZ', '0'): ['-triple=s390x', '-mcpu=z196'], } #if not option in ('', 'None'): # print archs[arch], modes[mode], options[option] #print(arch, mode, option) md = Cs(archs[arch], modes[mode]) if arch == 'CS_ARCH_ARM' or arch == 'CS_ARCH_PPC' : md.syntax = CS_OPT_SYNTAX_NOREGNAME if fname.endswith('3DNow.s.cs'): md.syntax = CS_OPT_SYNTAX_ATT for line in lines[1:]: # ignore all the input lines having # in front. if line.startswith('#'): continue #print("Check %s" %line) code = line.split(' = ')[0] asm = ''.join(line.split(' = ')[1:]) hex_code = code.replace('0x', '') hex_code = hex_code.replace(',', '') hex_data = hex_code.decode('hex') #hex_bytes = array.array('B', hex_data) x = list(md.disasm(hex_data, 0)) if len(x) > 0: if x[0].op_str != '': cs_output = "%s %s" %(x[0].mnemonic, x[0].op_str) else: cs_output = x[0].mnemonic else: cs_output = 'FAILED to disassemble' cs_output2 = normalize_hex(cs_output) cs_output2 = cs_output2.replace(' ', '') if arch == 'CS_ARCH_MIPS': # normalize register alias names cs_output2 = cs_output2.replace('$at', '$1') cs_output2 = cs_output2.replace('$v0', '$2') cs_output2 = cs_output2.replace('$v1', '$3') cs_output2 = cs_output2.replace('$a0', '$4') cs_output2 = cs_output2.replace('$a1', '$5') cs_output2 = cs_output2.replace('$a2', '$6') cs_output2 = cs_output2.replace('$a3', '$7') cs_output2 = cs_output2.replace('$t0', '$8') cs_output2 = cs_output2.replace('$t1', '$9') cs_output2 = cs_output2.replace('$t2', '$10') cs_output2 = cs_output2.replace('$t3', '$11') cs_output2 = cs_output2.replace('$t4', '$12') cs_output2 = cs_output2.replace('$t5', '$13') cs_output2 = cs_output2.replace('$t6', '$14') cs_output2 = cs_output2.replace('$t7', '$15') cs_output2 = cs_output2.replace('$t8', '$24') cs_output2 = cs_output2.replace('$t9', '$25') cs_output2 = cs_output2.replace('$s0', '$16') cs_output2 = cs_output2.replace('$s1', '$17') cs_output2 = cs_output2.replace('$s2', '$18') cs_output2 = cs_output2.replace('$s3', '$19') cs_output2 = cs_output2.replace('$s4', '$20') cs_output2 = cs_output2.replace('$s5', '$21') cs_output2 = cs_output2.replace('$s6', '$22') cs_output2 = cs_output2.replace('$s7', '$23') cs_output2 = cs_output2.replace('$k0', '$26') cs_output2 = cs_output2.replace('$k1', '$27') print("\t%s = %s" %(hex_code, cs_output)) if __name__ == '__main__': if len(sys.argv) == 1: fnames = sys.stdin.readlines() for fname in fnames: test_file(fname.strip()) else: #print("Usage: ./test_mc.py ") test_file(sys.argv[1]) capstone-sys-0.11.0/capstone/suite/disasm_mc.sh010075500017500001750000000004731363402546700177230ustar0000000000000000#!/bin/sh # This script test all architectures by default. find MC/ -name *.cs | ./disasm_mc.py # To test just one architecture, specify the corresponsing dir: # $ find MC/X86 -name *.cs | ./disasm_mc.py # To test just one input file, run disasm_mc.py with that file: # $ ./disasm_mc.py MC/X86/x86-32-fma3.s.cs capstone-sys-0.11.0/capstone/suite/fuzz.py010075500017500001750000000074601363402546700170030ustar0000000000000000#!/usr/bin/python # Simple fuzzing tool by disassembling random code. By Nguyen Anh Quynh, 2014 # Syntax: # ./suite/fuzz.py --> Fuzz all archs # ./suite/fuzz.py x86 --> Fuzz all X86 (all 16bit, 32bit, 64bit) # ./suite/fuzz.py x86-16 --> Fuzz X86-32 arch only # ./suite/fuzz.py x86-32 --> Fuzz X86-32 arch only # ./suite/fuzz.py x86-64 --> Fuzz X86-64 arch only # ./suite/fuzz.py arm --> Fuzz all ARM (arm, thumb) # ./suite/fuzz.py aarch64 --> Fuzz ARM-64 # ./suite/fuzz.py mips --> Fuzz all Mips (32bit, 64bit) # ./suite/fuzz.py ppc --> Fuzz PPC from capstone import * from time import time from random import randint import sys # file providing code to disassemble FILE = '/usr/bin/python' TIMES = 64 INTERVALS = (4, 5, 7, 9, 11, 13) all_tests = ( (CS_ARCH_X86, CS_MODE_16, "X86-16bit (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_16, "X86-16bit (ATT syntax)", CS_OPT_SYNTAX_ATT), (CS_ARCH_X86, CS_MODE_32, "X86-32 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, "X86-32 (ATT syntax)", CS_OPT_SYNTAX_ATT), (CS_ARCH_X86, CS_MODE_64, "X86-64 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_64, "X86-64 (ATT syntax)", CS_OPT_SYNTAX_ATT), (CS_ARCH_ARM, CS_MODE_ARM, "ARM", 0), (CS_ARCH_ARM, CS_MODE_THUMB, "THUMB (ARM)", 0), (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, "MIPS-32 (Big-endian)", 0), (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, "MIPS-64-EL (Little-endian)", 0), (CS_ARCH_ARM64, CS_MODE_ARM, "ARM-64 (AArch64)", 0), (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC", 0), (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC, print register with number only", CS_OPT_SYNTAX_NOREGNAME), (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc", 0), (CS_ARCH_SYSZ, 0, "SystemZ", 0), (CS_ARCH_XCORE, 0, "XCore", 0), (CS_ARCH_M68K, 0, "M68K", 0), ) # for debugging def to_hex(s): return " ".join("0x" + "{0:x}".format(ord(c)).zfill(2) for c in s) # <-- Python 3 is OK # read @size bytes from @f & return data. # return None when there is not enough data def get_code(f, size): code = f.read(size) if len(code) != size: # reached end-of-file? # then reset file position to begin-of-file f.seek(0) return None return code def cs(md, code): insns = md.disasm(code, 0) for i in insns: if i.address == 0x100000: print i def cs_lite(md, code): insns = md.disasm_lite(code, 0) for (addr, size, mnem, ops) in insns: if addr == 0x100000: print i cfile = open(FILE) for (arch, mode, comment, syntax) in all_tests: try: request = sys.argv[1] if not request in comment.lower(): continue except: pass try: md = Cs(arch, mode) md.detail = True if syntax != 0: md.syntax = syntax # test disasm() print("\nFuzzing disasm() @platform: %s" %comment) for ii in INTERVALS: print("Interval: %u" %ii) for j in xrange(1, TIMES): while (True): code = get_code(cfile, j * ii) if code is None: # EOF? break break #print to_hex(code) cs(md, code) # test disasm_lite() print("Fuzzing disasm_lite() @platform: %s" %comment) for ii in INTERVALS: print("Interval: %u" %ii) for j in xrange(1, TIMES): while (True): code = get_code(cfile, j * ii) if code is None: # EOF? break break #print to_hex(code) cs_lite(md, code) except CsError as e: print("ERROR: %s" %e) capstone-sys-0.11.0/capstone/suite/fuzz/Makefile010066400017500001750000000030541363402546700200630ustar0000000000000000# Capstone Disassembler Engine # By Philippe Antoine , 2018 include ../../config.mk include ../../functions.mk ifneq ($(CAPSTONE_STATIC),yes) $(error Needs static capstone.) endif # Verbose output? V ?= 0 INCDIR = ../../include ifndef BUILDDIR TESTDIR = . OBJDIR = . LIBDIR = ../.. else TESTDIR = $(BUILDDIR)/tests OBJDIR = $(BUILDDIR)/obj/tests LIBDIR = $(BUILDDIR) endif CFLAGS += -Wall -I$(INCDIR) LDFLAGS += -L$(LIBDIR) CFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) LDFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) LIBNAME = capstone BIN_EXT = AR_EXT = a ARCHIVE = $(LIBDIR)/lib$(LIBNAME).$(AR_EXT) .PHONY: all clean SOURCES = fuzz_disasm.c drivermc.c fuzz_harness.c driverbin.c OBJS = $(addprefix $(OBJDIR)/,$(SOURCES:.c=.o)) BINARY = $(addprefix $(TESTDIR)/,fuzz_disasm$(BIN_EXT)) BINARYBIN = $(addprefix $(TESTDIR)/,fuzz_bindisasm$(BIN_EXT)) all: $(BINARY) $(BINARYBIN) clean: rm -rf fuzz_harness $(OBJS) $(BINARY) $(BINARYBIN) $(OBJDIR)/lib$(LIBNAME).* $(OBJDIR)/$(LIBNAME).* $(BINARY): fuzz_disasm.o drivermc.o @mkdir -p $(@D) ifeq ($(V),0) $(call log,LINK,$(notdir $@)) @$(link-static) else $(link-static) endif $(BINARYBIN): fuzz_disasm.o driverbin.o @mkdir -p $(@D) ifeq ($(V),0) $(call log,LINK,$(notdir $@)) @$(link-static) else $(link-static) endif $(OBJDIR)/%.o: %.c @mkdir -p $(@D) ifeq ($(V),0) $(call log,CC,$(@:$(OBJDIR)/%=%)) @$(compile) else $(compile) endif define link-static $(CC) $(LDFLAGS) $^ $(ARCHIVE) -o $@ endef fuzz_harness: fuzz_harness.o ${CC} $< -O3 -Wall -l$(LIBNAME) -o $@ capstone-sys-0.11.0/capstone/suite/fuzz/README010066400017500001750000000001361363402546700173010ustar0000000000000000This directory contains a fuzz testing harness for Capstone. Run "make" to compile this code. capstone-sys-0.11.0/capstone/suite/fuzz/driverbin.c010066400017500001750000000036141363402546700205550ustar0000000000000000#include #include #include #include #include int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size); const char * cs_fuzz_arch(uint8_t arch); int main(int argc, char** argv) { FILE * fp; uint8_t Data[0x1000]; size_t Size; DIR *d; struct dirent *dir; int r = 0; int i; if (argc != 2) { return 1; } d = opendir(argv[1]); if (d == NULL) { printf("Invalid directory\n"); return 2; } if (chdir(argv[1]) != 0) { closedir(d); printf("Invalid directory\n"); return 2; } while((dir = readdir(d)) != NULL) { //opens the file, get its size, and reads it into a buffer if (dir->d_type != DT_REG) { continue; } printf("Running %s\n", dir->d_name); fflush(stdout); fp = fopen(dir->d_name, "rb"); if (fp == NULL) { r = 3; break; } if (fseek(fp, 0L, SEEK_END) != 0) { fclose(fp); r = 4; break; } Size = ftell(fp); if (Size == (size_t) -1) { fclose(fp); r = 5; break; } else if (Size > 0x1000) { fclose(fp); continue; } if (fseek(fp, 0L, SEEK_SET) != 0) { fclose(fp); r = 7; break; } if (fread(Data, Size, 1, fp) != 1) { fclose(fp); r = 8; break; } if (Size > 0) { printf("command cstool %s\n", cs_fuzz_arch(Data[0])); } for (i=0; i #include #include #include int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size); #define MAX_INSTR_SIZE 64 #define MAX_LINE_SIZE 128 int main(int argc, char** argv) { FILE * fp; uint8_t Data[MAX_INSTR_SIZE]; char line[MAX_LINE_SIZE]; size_t Size; char arch[MAX_LINE_SIZE]; char mode[MAX_LINE_SIZE]; unsigned int value; int i; if (argc < 2) { return 1; } for (i = 1; i < argc; i++) { //opens the file, get its size, and reads it into a buffer fp = fopen(argv[i], "rb"); if (fp == NULL) { return 2; } printf("Trying %s\n", argv[i]); if (fgets(line, MAX_LINE_SIZE, fp) == NULL) { break; } if (line[0] == '#') { if (sscanf(line, "# %[^,], %[^,]", arch, mode) != 2) { printf("Wrong mode %s\n", line); return 1; } if (strcmp(arch, "CS_ARCH_X86") == 0 && strcmp(mode, "CS_MODE_32") == 0) { Data[0] = 0; } else if (strcmp(arch, "CS_ARCH_X86") == 0 && strcmp(mode, "CS_MODE_64") == 0) { Data[0] = 1; } else if (strcmp(arch, "CS_ARCH_ARM") == 0 && strcmp(mode, "CS_MODE_ARM") == 0) { Data[0] = 2; } else if (strcmp(arch, "CS_ARCH_ARM") == 0 && strcmp(mode, "CS_MODE_THUMB") == 0) { Data[0] = 3; } else if (strcmp(arch, "CS_ARCH_ARM") == 0 && strcmp(mode, "CS_MODE_ARM+CS_MODE_V8") == 0) { Data[0] = 4; } else if (strcmp(arch, "CS_ARCH_ARM") == 0 && strcmp(mode, "CS_MODE_THUMB+CS_MODE_V8") == 0) { Data[0] = 5; } else if (strcmp(arch, "CS_ARCH_ARM") == 0 && strcmp(mode, "CS_MODE_THUMB+CS_MODE_MCLASS") == 0) { Data[0] = 6; } else if (strcmp(arch, "CS_ARCH_ARM64") == 0 && strcmp(mode, "0") == 0) { Data[0] = 7; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 8; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32+CS_MODE_MICRO") == 0) { Data[0] = 9; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS64") == 0) { Data[0] = 10; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32") == 0) { Data[0] = 11; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 12; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 13; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO") == 0) { Data[0] = 13; } else if (strcmp(arch, "CS_ARCH_PPC") == 0 && strcmp(mode, "CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 14; } else if (strcmp(arch, "CS_ARCH_SPARC") == 0 && strcmp(mode, "CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 15; } else if (strcmp(arch, "CS_ARCH_SPARC") == 0 && strcmp(mode, "CS_MODE_BIG_ENDIAN + CS_MODE_V9") == 0) { Data[0] = 16; } else if (strcmp(arch, "CS_ARCH_SYSZ") == 0 && strcmp(mode, "0") == 0) { Data[0] = 17; } else if (strcmp(arch, "CS_ARCH_XCORE") == 0 && strcmp(mode, "0") == 0) { Data[0] = 18; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32R6+CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 19; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32R6+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN") == 0) { Data[0] = 20; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32R6") == 0) { Data[0] = 21; } else if (strcmp(arch, "CS_ARCH_MIPS") == 0 && strcmp(mode, "CS_MODE_MIPS32R6+CS_MODE_MICRO") == 0) { Data[0] = 22; } else if (strcmp(arch, "CS_ARCH_M68K") == 0 && strcmp(mode, "0") == 0) { Data[0] = 23; } else if (strcmp(arch, "CS_ARCH_M680X") == 0 && strcmp(mode, "CS_MODE_M680X_6809") == 0) { Data[0] = 24; } else if (strcmp(arch, "CS_ARCH_EVM") == 0 && strcmp(mode, "0") == 0) { Data[0] = 25; } else { printf("Unknown mode\n"); //fail instead of continue return 1; } } else { printf("No mode\n"); //fail instead of continue return 1; } while(1) { if (fgets(line, MAX_LINE_SIZE, fp) == NULL) { break; } Size = 1; // we start line at offset 0 and Data buffer at offset 1 // since Data[0] is option : arch + mode while (sscanf(line+(Size-1)*5, "0x%02x", &value) == 1) { Data[Size] = value; Size++; if (line[(Size-1)*5-1] != ',') { //end of pattern break; } else if (MAX_LINE_SIZE < (Size-1)*5) { printf("Line overflow\n"); return 1; } } //lauch fuzzer LLVMFuzzerTestOneInput(Data, Size); } fclose(fp); } return 0; } capstone-sys-0.11.0/capstone/suite/fuzz/fuzz_diff.c010066400017500001750000000114471363402546700205620ustar0000000000000000 #include #include #include #include #include struct platform { cs_arch arch; cs_mode mode; char *comment; }; FILE * outfile = NULL; struct platform platforms[] = { { // item 0 CS_ARCH_X86, CS_MODE_32, "X86 32 (Intel syntax)" }, { // item 1 CS_ARCH_X86, CS_MODE_64, "X86 64 (Intel syntax)" }, { // item 2 CS_ARCH_ARM, CS_MODE_ARM, "ARM" }, { // item 3 CS_ARCH_ARM, CS_MODE_THUMB, "THUMB" }, { // item 4 CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), "Arm-V8" }, { // item 5 CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB+CS_MODE_V8), "THUMB+V8" }, { // item 6 CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS), "Thumb-MClass" }, { // item 7 CS_ARCH_ARM64, (cs_mode)0, "ARM-64" }, { // item 8 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN), "MIPS-32 (Big-endian)" }, { // item 9 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO), "MIPS-32 (micro)" }, { //item 10 CS_ARCH_MIPS, CS_MODE_MIPS64, "MIPS-64-EL (Little-endian)" }, { //item 11 CS_ARCH_MIPS, CS_MODE_MIPS32, "MIPS-32-EL (Little-endian)" }, { //item 12 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_BIG_ENDIAN), "MIPS-64 (Big-endian)" }, { //item 13 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), "MIPS-32 | Micro (Big-endian)" }, { //item 14 CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC-64" }, { //item 15 CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc" }, { //item 16 CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), "SparcV9" }, { //item 17 CS_ARCH_SYSZ, (cs_mode)0, "SystemZ" }, { //item 18 CS_ARCH_XCORE, (cs_mode)0, "XCore" }, { //item 19 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN), "MIPS-32R6 (Big-endian)" }, { //item 20 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), "MIPS-32R6 (Micro+Big-endian)" }, { //item 21 CS_ARCH_MIPS, CS_MODE_MIPS32R6, "MIPS-32R6 (Little-endian)" }, { //item 22 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO), "MIPS-32R6 (Micro+Little-endian)" }, { //item 23 CS_ARCH_M68K, (cs_mode)0, "M68K" }, { //item 24 CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6809, "M680X_M6809" }, { //item 25 CS_ARCH_EVM, (cs_mode)0, "EVM" }, }; void LLVMFuzzerInit(); int LLVMFuzzerReturnOneInput(const uint8_t *Data, size_t Size, char * AssemblyText); int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) { csh handle; cs_insn *insn; cs_err err; const uint8_t **Datap = &Data; size_t * Sizep = &Size; uint64_t address = 0x1000; char LLVMAssemblyText[80]; char CapstoneAssemblyText[80]; if (Size < 1) { // 1 byte for arch choice return 0; } else if (Size > 0x1000) { //limit input to 4kb Size = 0x1000; } if (outfile == NULL) { // we compute the output outfile = fopen("/dev/null", "w"); if (outfile == NULL) { return 0; } LLVMFuzzerInit(); } if (Data[0] >= sizeof(platforms)/sizeof(platforms[0])) { return 0; } if (LLVMFuzzerReturnOneInput(Data, Size, LLVMAssemblyText) == 1) { return 0; } err = cs_open(platforms[Data[0]].arch, platforms[Data[0]].mode, &handle); if (err) { return 0; } insn = cs_malloc(handle); Data++; Size--; assert(insn); if (cs_disasm_iter(handle, Datap, Sizep, &address, insn)) { snprintf(CapstoneAssemblyText, 80, "\t%s\t%s", insn->mnemonic, insn->op_str); if (strcmp(CapstoneAssemblyText, LLVMAssemblyText) != 0) { printf("capstone %s != llvm %s", CapstoneAssemblyText, LLVMAssemblyText); abort(); } } else { printf("capstone failed with llvm %s", LLVMAssemblyText); abort(); } cs_free(insn, 1); cs_close(&handle); return 0; } capstone-sys-0.11.0/capstone/suite/fuzz/fuzz_disasm.c010066400017500001750000000146041363402546700211300ustar0000000000000000// the following must precede stdio (woo, thanks msft) #if defined(_MSC_VER) && _MSC_VER < 1900 #define _CRT_SECURE_NO_WARNINGS #endif #include #include #include #include const char *cs_fuzz_arch(uint8_t arch); int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size); struct platform { cs_arch arch; cs_mode mode; const char *comment; const char *cstoolname; }; static FILE *outfile = NULL; struct platform platforms[] = { { // item 0 CS_ARCH_X86, CS_MODE_32, "X86 32 (Intel syntax)", "x32" }, { // item 1 CS_ARCH_X86, CS_MODE_64, "X86 64 (Intel syntax)", "x64" }, { // item 2 CS_ARCH_ARM, CS_MODE_ARM, "ARM", "arm" }, { // item 3 CS_ARCH_ARM, CS_MODE_THUMB, "THUMB", "thumb" }, { // item 4 CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), "Arm-V8", "armv8" }, { // item 5 CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB+CS_MODE_V8), "THUMB+V8", "thumbv8" }, { // item 6 CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS), "Thumb-MClass", "cortexm" }, { // item 7 CS_ARCH_ARM64, (cs_mode)0, "ARM-64", "arm64" }, { // item 8 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN), "MIPS-32 (Big-endian)", "mipsbe" }, { // item 9 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO), "MIPS-32 (micro)", "mipsmicro" }, { //item 10 CS_ARCH_MIPS, CS_MODE_MIPS64, "MIPS-64-EL (Little-endian)", "mips64" }, { //item 11 CS_ARCH_MIPS, CS_MODE_MIPS32, "MIPS-32-EL (Little-endian)", "mips" }, { //item 12 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_BIG_ENDIAN), "MIPS-64 (Big-endian)", "mips64be" }, { //item 13 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), "MIPS-32 | Micro (Big-endian)", "mipsbemicro" }, { //item 14 CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC-64", "ppc64" }, { //item 15 CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc", "sparc" }, { //item 16 CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), "SparcV9", "sparcv9" }, { //item 17 CS_ARCH_SYSZ, (cs_mode)0, "SystemZ", "systemz" }, { //item 18 CS_ARCH_XCORE, (cs_mode)0, "XCore", "xcore" }, { //item 19 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN), "MIPS-32R6 (Big-endian)", "mipsbe32r6" }, { //item 20 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), "MIPS-32R6 (Micro+Big-endian)", "mipsbe32r6micro" }, { //item 21 CS_ARCH_MIPS, CS_MODE_MIPS32R6, "MIPS-32R6 (Little-endian)", "mips32r6" }, { //item 22 CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO), "MIPS-32R6 (Micro+Little-endian)", "mips32r6micro" }, { //item 23 CS_ARCH_M68K, (cs_mode)0, "M68K", "m68k" }, { //item 24 CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6809, "M680X_M6809", "m6809" }, { //item 25 CS_ARCH_EVM, (cs_mode)0, "EVM", "evm" }, { //item 26 CS_ARCH_TMS320C64X, CS_MODE_BIG_ENDIAN, "tms320c64x", "tms320c64x" }, }; const char * cs_fuzz_arch(uint8_t arch) { return platforms[arch % sizeof(platforms)/sizeof(platforms[0])].cstoolname; } int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) { csh handle; cs_insn *all_insn; cs_detail *detail; cs_err err; if (Size < 1) { // 1 byte for arch choice return 0; } else if (Size > 0x1000) { //limit input to 4kb Size = 0x1000; } if (outfile == NULL) { // we compute the output outfile = fopen("/dev/null", "w"); if (outfile == NULL) { return 0; } } int platforms_len = sizeof(platforms)/sizeof(platforms[0]); int i = (int)Data[0] % platforms_len; err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { return 0; } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); uint64_t address = 0x1000; size_t count = cs_disasm(handle, Data+1, Size-1, address, 0, &all_insn); if (count) { size_t j; int n; for (j = 0; j < count; j++) { cs_insn *i = &(all_insn[j]); fprintf(outfile, "0x%"PRIx64":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n", i->address, i->mnemonic, i->op_str, i->id, cs_insn_name(handle, i->id)); detail = i->detail; if (detail->regs_read_count > 0) { fprintf(outfile, "\tImplicit registers read: "); for (n = 0; n < detail->regs_read_count; n++) { fprintf(outfile, "%s ", cs_reg_name(handle, detail->regs_read[n])); } } if (detail->regs_write_count > 0) { fprintf(outfile, "\tImplicit registers modified: "); for (n = 0; n < detail->regs_write_count; n++) { fprintf(outfile, "%s ", cs_reg_name(handle, detail->regs_write[n])); } } if (detail->groups_count > 0) { fprintf(outfile, "\tThis instruction belongs to groups: "); for (n = 0; n < detail->groups_count; n++) { fprintf(outfile, "%s ", cs_group_name(handle, detail->groups[n])); } } } fprintf(outfile, "0x%"PRIx64":\n", all_insn[j-1].address + all_insn[j-1].size); cs_free(all_insn, count); } cs_close(&handle); return 0; } capstone-sys-0.11.0/capstone/suite/fuzz/fuzz_disasm.options010066400017500001750000000000331363402546700223700ustar0000000000000000[libfuzzer] max_len = 4096 capstone-sys-0.11.0/capstone/suite/fuzz/fuzz_harness.c010066400017500001750000000106741363402546700213160ustar0000000000000000#include #include #include #include struct platform { cs_arch arch; cs_mode mode; char *comment; }; int main(int argc, char **argv) { if (argc != 2) { printf("Usage: %s \n", argv[0]); return 1; } struct platform platforms[] = { { CS_ARCH_X86, CS_MODE_32, "X86 32 (Intel syntax)" }, { CS_ARCH_X86, CS_MODE_64, "X86 64 (Intel syntax)" }, { CS_ARCH_ARM, CS_MODE_ARM, "ARM" }, { CS_ARCH_ARM, CS_MODE_THUMB, "THUMB-2" }, { CS_ARCH_ARM, CS_MODE_ARM, "ARM: Cortex-A15 + NEON" }, { CS_ARCH_ARM, CS_MODE_THUMB, "THUMB" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS), "Thumb-MClass" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), "Arm-V8" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN), "MIPS-32 (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN), "MIPS-64-EL (Little-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), "MIPS-32R6 | Micro (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN), "MIPS-32R6 (Big-endian)" }, { CS_ARCH_ARM64, CS_MODE_ARM, "ARM-64" }, { CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC-64" }, { CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc" }, { CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), "SparcV9" }, { CS_ARCH_SYSZ, (cs_mode)0, "SystemZ" }, { CS_ARCH_XCORE, (cs_mode)0, "XCore" }, { CS_ARCH_M68K, (cs_mode)0, "M68K" }, { CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6809, "M680X_M6809" }, }; // Read input long bufsize = 0; unsigned char *buf = NULL; FILE *fp = fopen(argv[1], "r"); if (fp == NULL) return 1; if (fseek(fp, 0L, SEEK_END) == 0) { bufsize = ftell(fp); if (bufsize == -1) return 1; buf = malloc(bufsize + 1); if (buf == NULL) return 1; if (fseek(fp, 0L, SEEK_SET) != 0) return 1; size_t len = fread(buf, sizeof(char), bufsize, fp); if (len == 0) return 2; } fclose(fp); // Disassemble csh handle; cs_insn *all_insn; cs_detail *detail; cs_err err; if (bufsize < 3) return 0; int platforms_len = sizeof(platforms)/sizeof(platforms[0]); int i = (int)buf[0] % platforms_len; unsigned char *buf_ptr = buf + 1; long buf_ptr_size = bufsize - 1; printf("Platform: %s (0x%.2x of 0x%.2x)\n", platforms[i].comment, i, platforms_len); err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); return 1; } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); uint64_t address = 0x1000; size_t count = cs_disasm(handle, buf_ptr, buf_ptr_size, address, 0, &all_insn); if (count) { size_t j; int n; printf("Disasm:\n"); for (j = 0; j < count; j++) { cs_insn *i = &(all_insn[j]); printf("0x%"PRIx64":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n", i->address, i->mnemonic, i->op_str, i->id, cs_insn_name(handle, i->id)); detail = i->detail; if (detail->regs_read_count > 0) { printf("\tImplicit registers read: "); for (n = 0; n < detail->regs_read_count; n++) { printf("%s ", cs_reg_name(handle, detail->regs_read[n])); } printf("\n"); } if (detail->regs_write_count > 0) { printf("\tImplicit registers modified: "); for (n = 0; n < detail->regs_write_count; n++) { printf("%s ", cs_reg_name(handle, detail->regs_write[n])); } printf("\n"); } if (detail->groups_count > 0) { printf("\tThis instruction belongs to groups: "); for (n = 0; n < detail->groups_count; n++) { printf("%s ", cs_group_name(handle, detail->groups[n])); } printf("\n"); } } printf("0x%"PRIx64":\n", all_insn[j-1].address + all_insn[j-1].size); cs_free(all_insn, count); } else { printf("ERROR: Failed to disasm given code!\n"); } printf("\n"); free(buf); cs_close(&handle); return 0; } capstone-sys-0.11.0/capstone/suite/fuzz/fuzz_llvm.cpp010066400017500001750000000021061363402546700211540ustar0000000000000000#include "llvm-c/Disassembler.h" #include "llvm-c/Target.h" #include "llvm/MC/SubtargetFeature.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; extern "C" void LLVMFuzzerInit() { LLVMInitializeAllTargetInfos(); LLVMInitializeAllTargetMCs(); LLVMInitializeAllDisassemblers(); } extern "C" int LLVMFuzzerReturnOneInput(const uint8_t *Data, size_t Size, char * AssemblyText) { LLVMDisasmContextRef Ctx; std::vector DataCopy(Data, Data + Size); uint8_t *p = DataCopy.data(); int r = 1; switch(Data[0]) { case 0: Ctx = LLVMCreateDisasmCPUFeatures("i386", "", "", nullptr, 0, nullptr, nullptr); if (LLVMSetDisasmOptions(Ctx, LLVMDisassembler_Option_AsmPrinterVariant) == 0) { abort(); } break; //TODO other cases default: return 1; } assert(Ctx); if (LLVMDisasmInstruction(Ctx, p+1, Size-1, 0, AssemblyText, 80) > 0) { r = 0; } LLVMDisasmDispose(Ctx); return r; } capstone-sys-0.11.0/capstone/suite/fuzz/onefile.c010066400017500001750000000017061363402546700202120ustar0000000000000000#include #include #include int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size); int main(int argc, char** argv) { FILE * fp; uint8_t *Data; size_t Size; if (argc != 2) { return 1; } //opens the file, get its size, and reads it into a buffer fp = fopen(argv[1], "rb"); if (fp == NULL) { return 2; } if (fseek(fp, 0L, SEEK_END) != 0) { fclose(fp); return 2; } Size = ftell(fp); if (Size == (size_t) -1) { fclose(fp); return 2; } if (fseek(fp, 0L, SEEK_SET) != 0) { fclose(fp); return 2; } Data = malloc(Size); if (Data == NULL) { fclose(fp); return 2; } if (fread(Data, Size, 1, fp) != 1) { fclose(fp); free(Data); return 2; } //lauch fuzzer LLVMFuzzerTestOneInput(Data, Size); free(Data); fclose(fp); return 0; } capstone-sys-0.11.0/capstone/suite/patch_major_os_version.py010075500017500001750000000014261363402546700225360ustar0000000000000000#!/usr/bin/env python # By Daniel Pistelli & Nguyen Tan Cong # This script is to patch DLL/EXE MajorVersion to 5, # so they can be loaded by Windows XP. # This is the problem introduced by compiling on Windows 7, using VS2013. import sys, struct if len(sys.argv) < 2: print("Usage: %s " % sys.argv[0]) sys.exit(0) pe_file_path = sys.argv[1] with open(pe_file_path, "rb") as f: b = f.read() if not b.startswith("MZ"): print("Not a PE file") sys.exit(0) e_lfanew = struct.unpack_from(" # PPC Branch testing suite by kratolp from __future__ import print_function import sys from capstone import * CODE32 = b"\x48\x01\x05\x15" # bl .+0x10514 CODE32 += b"\x4B\xff\xff\xfd" # bl .-0x4 CODE32 += b"\x48\x00\x00\x0c" # b .+0xc CODE32 += b"\x41\x80\xff\xd8" # blt .-0x28 CODE32 += b"\x40\x80\xff\xec" # bge .-0x14 CODE32 += b"\x41\x84\x01\x6c" # blt cr1, .+0x16c CODE32 += b"\x41\x82\x00\x10" # beq .+0x10 CODE32 += b"\x40\x82\x00\x08" # bne .+0x8 CODE32 += b"\x40\x95\x00\x94" # ble cr5,.+0x94 CODE32 += b"\x40\x9f\x10\x30" # bns cr5,.+0x94 CODE32 += b"\x42\x00\xff\xd8" # bdnz .-0x28 CODE32 += b"\x4d\x82\x00\x20" # beqlr CODE32 += b"\x4e\x80\x00\x20" # blr CODE32 += b"\x4a\x00\x00\x02" # ba .0xfe000000 CODE32 += b"\x41\x80\xff\xda" # blta .0xffffffd8 CODE32 += b"\x41\x4f\xff\x17" # bdztla 4*cr3+so, .0xffffff14 CODE32 += b"\x43\x20\x0c\x07" # bdnzla+ .0xc04 CODE32 += b"\x4c\x00\x04\x20" # bdnzfctr lt _python3 = sys.version_info.major == 3 all_tests = ( (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CODE32, "PPC branch instruction decoding", 0), ) def to_hex(s): if _python3: return " ".join("0x{0:02x}".format(c) for c in s) # <-- Python 3 is OK else: return " ".join("0x{0:02x}".format(ord(c)) for c in s) # ## Test cs_disasm_quick() def test_cs_disasm_quick(): for (arch, mode, code, comment, syntax) in all_tests: print("Platform: %s" % comment) print("Code: %s" %(to_hex(code))), print("Disasm:") for (addr, size, mnemonic, op_str) in cs_disasm_lite(arch, mode, code, 0x1000): print("0x%x:\t%s\t%s" % (addr, mnemonic, op_str)) print() if __name__ == '__main__': test_cs_disasm_quick() capstone-sys-0.11.0/capstone/suite/python_capstone_setup.py010075500017500001750000000001771363402546700224400ustar0000000000000000#!/bin/sh # this prints out Capstone setup & core+Python-binding versions python -c "import capstone; print capstone.debug()" capstone-sys-0.11.0/capstone/suite/regress.py010075500017500001750000002410671363402546700174620ustar0000000000000000#!/usr/bin/env python # Capstone Python bindings, by Nguyen Anh Quynnh from __future__ import print_function import sys from capstone import * all_tests = ( # arch, mode, syntax, address, hexcode, expected output # issue 456 https://github.com/aquynh/capstone/issues/456 (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xfc16, b"\xE8\x35\x64", "call 0x604e"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123fc1b, b"\x66\xE8\x35\x64", "call 0x6054"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x9123fc1b, b"\x66\xE8\x35\x64", "call 0x6054"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xfc26, b"\xE9\x35\x64", "jmp 0x605e"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xfff6, b"\x66\xE9\x35\x64\x93\x53", "jmp 0x53946431"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123fff1, b"\xE9\x35\x64\x93\x53", "jmp 0xe4b7642b"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123fff1, b"\xE9\x35\x64\x93\x53", "jmp 0x64e4b7642b"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xe8\x35\x64\x93\x53", "call 0x5394641c"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xe8\x35\x64", "call 0x641a"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xe9\x35\x64", "jmp 0x641a"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xe9\x35\x64\x93\x53", "jmp 0x5394641c"), # AT&T syntax (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_ATT, 0xfc16, b"\xE8\x35\x64", "callw 0x604e"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_ATT, 0x9123fc1b, b"\x66\xE8\x35\x64", "callw 0x6054"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT, 0x9123fc1b, b"\x66\xE8\x35\x64", "callw 0x6054"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_ATT, 0xfc26, b"\xE9\x35\x64", "jmp 0x605e"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_ATT, 0xfff6, b"\x66\xE9\x35\x64\x93\x53", "jmp 0x53946431"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_ATT, 0x9123fff1, b"\xE9\x35\x64\x93\x53", "jmp 0xe4b7642b"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT, 0x649123fff1, b"\xE9\x35\x64\x93\x53", "jmp 0x64e4b7642b"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_ATT, 0xffe1, b"\x66\xe8\x35\x64\x93\x53", "calll 0x5394641c"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT, 0x649123ffe1, b"\x66\xe8\x35\x64", "callw 0x641a"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT, 0x649123ffe1, b"\x66\xe9\x35\x64", "jmp 0x641a"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_ATT, 0xffe1, b"\x66\xe9\x35\x64\x93\x53", "jmp 0x5394641c"), # issue 452 https://github.com/aquynh/capstone/issues/452 (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x6C", "insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x6D", "insw word ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x6E", "outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x6F", "outsw dx, word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xA4", "movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xA5", "movsw word ptr es:[di], word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xA6", "cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xA7", "cmpsw word ptr [si], word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xAA", "stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xAB", "stosw word ptr es:[di], ax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xAC", "lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xAD", "lodsw ax, word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xAE", "scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xAF", "scasw ax, word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x6C", "insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x6D", "insd dword ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x6E", "outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x6F", "outsd dx, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xA4", "movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xA5", "movsd dword ptr es:[di], dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xA6", "cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xA7", "cmpsd dword ptr [si], dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xAA", "stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xAB", "stosd dword ptr es:[di], eax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xAC", "lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xAD", "lodsd eax, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xAE", "scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xAF", "scasd eax, dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\x6C", "insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\x6D", "insw word ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\x6E", "outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\x6F", "outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xA4", "movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xA5", "movsw word ptr es:[edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xA6", "cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xA7", "cmpsw word ptr [esi], word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xAA", "stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xAB", "stosw word ptr es:[edi], ax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xAD", "lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xAE", "scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xAF", "scasw ax, word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\x6C", "repne insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\x6D", "repne insw word ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\x6E", "repne outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\x6F", "repne outsw dx, word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xA4", "repne movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xA5", "repne movsw word ptr es:[di], word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xA6", "repne cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xA7", "repne cmpsw word ptr [si], word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xAA", "repne stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xAB", "repne stosw word ptr es:[di], ax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xAC", "repne lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xAD", "repne lodsw ax, word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xAE", "repne scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF2\xAF", "repne scasw ax, word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\x6C", "rep insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\x6D", "rep insw word ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\x6E", "rep outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\x6F", "rep outsw dx, word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xA4", "rep movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xA5", "rep movsw word ptr es:[di], word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xA6", "repe cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xA7", "repe cmpsw word ptr [si], word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xAA", "rep stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xAB", "rep stosw word ptr es:[di], ax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xAC", "rep lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xAD", "rep lodsw ax, word ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xAE", "repe scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\xF3\xAF", "repe scasw ax, word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\x6C", "insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\x6D", "insd dword ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\x6E", "outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\x6F", "outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xA4", "movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xA5", "movsd dword ptr es:[edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xA6", "cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xA7", "cmpsd dword ptr [esi], dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xAA", "stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xAB", "stosd dword ptr es:[edi], eax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xAD", "lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xAE", "scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xAF", "scasd eax, dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\x6C", "repne insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\x6D", "repne insd dword ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\x6E", "repne outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\x6F", "repne outsd dx, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xA4", "repne movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xA5", "repne movsd dword ptr es:[di], dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xA6", "repne cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xA7", "repne cmpsd dword ptr [si], dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xAA", "repne stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xAB", "repne stosd dword ptr es:[di], eax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xAC", "repne lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xAD", "repne lodsd eax, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xAE", "repne scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF2\xAF", "repne scasd eax, dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\x6C", "rep insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\x6D", "rep insd dword ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\x6E", "rep outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\x6F", "rep outsd dx, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xA4", "rep movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xA5", "rep movsd dword ptr es:[di], dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xA6", "repe cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xA7", "repe cmpsd dword ptr [si], dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xAA", "rep stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xAB", "rep stosd dword ptr es:[di], eax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xAC", "rep lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xAD", "rep lodsd eax, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xAE", "repe scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\xF3\xAF", "repe scasd eax, dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\x6C", "repne insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\x6D", "repne insw word ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\x6E", "repne outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\x6F", "repne outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xA4", "repne movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xA5", "repne movsw word ptr es:[edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xA6", "repne cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xA7", "repne cmpsw word ptr [esi], word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xAA", "repne stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xAB", "repne stosw word ptr es:[edi], ax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xAD", "repne lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xAE", "repne scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF2\xAF", "repne scasw ax, word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\x6C", "rep insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\x6D", "rep insw word ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\x6E", "rep outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\x6F", "rep outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xA4", "rep movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xA5", "rep movsw word ptr es:[edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xA6", "repe cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xA7", "repe cmpsw word ptr [esi], word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xAA", "rep stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xAB", "rep stosw word ptr es:[edi], ax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xAD", "rep lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xAE", "repe scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x67\xF3\xAF", "repe scasw ax, word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\x6C", "repne insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\x6D", "repne insd dword ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\x6E", "repne outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\x6F", "repne outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xA4", "repne movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xA5", "repne movsd dword ptr es:[edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xA6", "repne cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xA7", "repne cmpsd dword ptr [esi], dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xAA", "repne stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xAB", "repne stosd dword ptr es:[edi], eax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xAD", "repne lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xAE", "repne scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF2\xAF", "repne scasd eax, dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\x6C", "rep insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\x6D", "rep insd dword ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\x6E", "rep outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\x6F", "rep outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xA4", "rep movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xA5", "rep movsd dword ptr es:[edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xA6", "repe cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xA7", "repe cmpsd dword ptr [esi], dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xAA", "rep stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xAB", "rep stosd dword ptr es:[edi], eax"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xAD", "rep lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xAE", "repe scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x67\xF3\xAF", "repe scasd eax, dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x6C", "insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x6D", "insd dword ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x6E", "outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x6F", "outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xA4", "movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xA5", "movsd dword ptr es:[edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xA6", "cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xA7", "cmpsd dword ptr [esi], dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xAA", "stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xAB", "stosd dword ptr es:[edi], eax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xAD", "lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xAE", "scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xAF", "scasd eax, dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x6C", "insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x6D", "insw word ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x6E", "outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x6F", "outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xA4", "movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xA5", "movsw word ptr es:[edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xA6", "cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xA7", "cmpsw word ptr [esi], word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xAA", "stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xAB", "stosw word ptr es:[edi], ax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xAD", "lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xAE", "scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xAF", "scasw ax, word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\x6C", "insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\x6D", "insd dword ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\x6E", "outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\x6F", "outsd dx, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xA4", "movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xA5", "movsd dword ptr es:[di], dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xA6", "cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xA7", "cmpsd dword ptr [si], dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xAA", "stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xAB", "stosd dword ptr es:[di], eax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xAC", "lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xAD", "lodsd eax, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xAE", "scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xAF", "scasd eax, dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\x6C", "repne insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\x6D", "repne insd dword ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\x6E", "repne outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\x6F", "repne outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xA4", "repne movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xA5", "repne movsd dword ptr es:[edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xA6", "repne cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xA7", "repne cmpsd dword ptr [esi], dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xAA", "repne stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xAB", "repne stosd dword ptr es:[edi], eax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xAD", "repne lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xAE", "repne scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF2\xAF", "repne scasd eax, dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\x6C", "rep insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\x6D", "rep insd dword ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\x6E", "rep outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\x6F", "rep outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xA4", "rep movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xA5", "rep movsd dword ptr es:[edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xA6", "repe cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xA7", "repe cmpsd dword ptr [esi], dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xAA", "rep stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xAB", "rep stosd dword ptr es:[edi], eax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xAD", "rep lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xAE", "repe scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\xF3\xAF", "repe scasd eax, dword ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\x6C", "insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\x6D", "insw word ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\x6E", "outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\x6F", "outsw dx, word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xA4", "movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xA5", "movsw word ptr es:[di], word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xA6", "cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xA7", "cmpsw word ptr [si], word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xAA", "stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xAB", "stosw word ptr es:[di], ax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xAC", "lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xAD", "lodsw ax, word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xAE", "scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xAF", "scasw ax, word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\x6C", "repne insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\x6D", "repne insw word ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\x6E", "repne outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\x6F", "repne outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xA4", "repne movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xA5", "repne movsw word ptr es:[edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xA6", "repne cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xA7", "repne cmpsw word ptr [esi], word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xAA", "repne stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xAB", "repne stosw word ptr es:[edi], ax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xAD", "repne lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xAE", "repne scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF2\xAF", "repne scasw ax, word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\x6C", "rep insb byte ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\x6D", "rep insw word ptr es:[edi], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\x6E", "rep outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\x6F", "rep outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xA4", "rep movsb byte ptr es:[edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xA5", "rep movsw word ptr es:[edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xA6", "repe cmpsb byte ptr [esi], byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xA7", "repe cmpsw word ptr [esi], word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xAA", "rep stosb byte ptr es:[edi], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xAB", "rep stosw word ptr es:[edi], ax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xAD", "rep lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xAE", "repe scasb al, byte ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\xF3\xAF", "repe scasw ax, word ptr es:[edi]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\x6C", "repne insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\x6D", "repne insd dword ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\x6E", "repne outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\x6F", "repne outsd dx, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xA4", "repne movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xA5", "repne movsd dword ptr es:[di], dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xA6", "repne cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xA7", "repne cmpsd dword ptr [si], dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xAA", "repne stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xAB", "repne stosd dword ptr es:[di], eax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xAC", "repne lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xAD", "repne lodsd eax, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xAE", "repne scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF2\xAF", "repne scasd eax, dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\x6C", "rep insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\x6D", "rep insd dword ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\x6E", "rep outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\x6F", "rep outsd dx, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xA4", "rep movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xA5", "rep movsd dword ptr es:[di], dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xA6", "repe cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xA7", "repe cmpsd dword ptr [si], dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xAA", "rep stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xAB", "rep stosd dword ptr es:[di], eax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xAC", "rep lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xAD", "rep lodsd eax, dword ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xAE", "repe scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x67\xF3\xAF", "repe scasd eax, dword ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\x6C", "repne insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\x6D", "repne insw word ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\x6E", "repne outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\x6F", "repne outsw dx, word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xA4", "repne movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xA5", "repne movsw word ptr es:[di], word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xA6", "repne cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xA7", "repne cmpsw word ptr [si], word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xAA", "repne stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xAB", "repne stosw word ptr es:[di], ax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xAC", "repne lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xAD", "repne lodsw ax, word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xAE", "repne scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF2\xAF", "repne scasw ax, word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\x6C", "rep insb byte ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\x6D", "rep insw word ptr es:[di], dx"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\x6E", "rep outsb dx, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\x6F", "rep outsw dx, word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xA4", "rep movsb byte ptr es:[di], byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xA5", "rep movsw word ptr es:[di], word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xA6", "repe cmpsb byte ptr [si], byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xA7", "repe cmpsw word ptr [si], word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xAA", "rep stosb byte ptr es:[di], al"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xAB", "rep stosw word ptr es:[di], ax"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xAC", "rep lodsb al, byte ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xAD", "rep lodsw ax, word ptr [si]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xAE", "repe scasb al, byte ptr es:[di]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x67\xF3\xAF", "repe scasw ax, word ptr es:[di]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x6C", "insb byte ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x6D", "insd dword ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x6E", "outsb dx, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x6F", "outsd dx, dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xA4", "movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xA5", "movsd dword ptr [rdi], dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xA6", "cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xA7", "cmpsd dword ptr [rsi], dword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xAA", "stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xAB", "stosd dword ptr [rdi], eax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xAC", "lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xAD", "lodsd eax, dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xAE", "scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xAF", "scasd eax, dword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x6C", "insb byte ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x6D", "insw word ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x6E", "outsb dx, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x6F", "outsw dx, word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xA4", "movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xA5", "movsw word ptr [rdi], word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xA6", "cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xA7", "cmpsw word ptr [rsi], word ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xAA", "stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xAB", "stosw word ptr [rdi], ax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xAC", "lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xAD", "lodsw ax, word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xAE", "scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xAF", "scasw ax, word ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x6C", "insb byte ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x6D", "insd dword ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x6E", "outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x6F", "outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xA4", "movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xA5", "movsd dword ptr [edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xA6", "cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xA7", "cmpsd dword ptr [esi], dword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xAA", "stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xAB", "stosd dword ptr [edi], eax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xAD", "lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xAE", "scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xAF", "scasd eax, dword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x6C", "repne insb byte ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x6D", "repne insd dword ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x6E", "repne outsb dx, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x6F", "repne outsd dx, dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xA4", "repne movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xA5", "repne movsd dword ptr [rdi], dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xA6", "repne cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xA7", "repne cmpsd dword ptr [rsi], dword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xAA", "repne stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xAB", "repne stosd dword ptr [rdi], eax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xAC", "repne lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xAD", "repne lodsd eax, dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xAE", "repne scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\xAF", "repne scasd eax, dword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x6C", "rep insb byte ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x6D", "rep insd dword ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x6E", "rep outsb dx, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x6F", "rep outsd dx, dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xA4", "rep movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xA5", "rep movsd dword ptr [rdi], dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xA6", "repe cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xA7", "repe cmpsd dword ptr [rsi], dword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xAA", "rep stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xAB", "rep stosd dword ptr [rdi], eax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xAC", "rep lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xAD", "rep lodsd eax, dword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xAE", "repe scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\xAF", "repe scasd eax, dword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x6C", "insb byte ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x6D", "insw word ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x6E", "outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x6F", "outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xA4", "movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xA5", "movsw word ptr [edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xA6", "cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xA7", "cmpsw word ptr [esi], word ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xAA", "stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xAB", "stosw word ptr [edi], ax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xAD", "lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xAE", "scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xAF", "scasw ax, word ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x6C", "repne insb byte ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x6D", "repne insw word ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x6E", "repne outsb dx, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x6F", "repne outsw dx, word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xA4", "repne movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xA5", "repne movsw word ptr [rdi], word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xA6", "repne cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xA7", "repne cmpsw word ptr [rsi], word ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xAA", "repne stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xAB", "repne stosw word ptr [rdi], ax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xAC", "repne lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xAD", "repne lodsw ax, word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xAE", "repne scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\xAF", "repne scasw ax, word ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x6C", "rep insb byte ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x6D", "rep insw word ptr [rdi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x6E", "rep outsb dx, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x6F", "rep outsw dx, word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xA4", "rep movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xA5", "rep movsw word ptr [rdi], word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xA6", "repe cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xA7", "repe cmpsw word ptr [rsi], word ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xAA", "rep stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xAB", "rep stosw word ptr [rdi], ax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xAC", "rep lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xAD", "rep lodsw ax, word ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xAE", "repe scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\xAF", "repe scasw ax, word ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x6C", "repne insb byte ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x6D", "repne insd dword ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x6E", "repne outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x6F", "repne outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xA4", "repne movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xA5", "repne movsd dword ptr [edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xA6", "repne cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xA7", "repne cmpsd dword ptr [esi], dword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xAA", "repne stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xAB", "repne stosd dword ptr [edi], eax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xAD", "repne lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xAE", "repne scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\xAF", "repne scasd eax, dword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x6C", "rep insb byte ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x6D", "rep insd dword ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x6E", "rep outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x6F", "rep outsd dx, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xA4", "rep movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xA5", "rep movsd dword ptr [edi], dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xA6", "repe cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xA7", "repe cmpsd dword ptr [esi], dword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xAA", "rep stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xAB", "rep stosd dword ptr [edi], eax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xAD", "rep lodsd eax, dword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xAE", "repe scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\xAF", "repe scasd eax, dword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x6C", "repne insb byte ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x6D", "repne insw word ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x6E", "repne outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x6F", "repne outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xA4", "repne movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xA5", "repne movsw word ptr [edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xA6", "repne cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xA7", "repne cmpsw word ptr [esi], word ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xAA", "repne stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xAB", "repne stosw word ptr [edi], ax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xAD", "repne lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xAE", "repne scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\xAF", "repne scasw ax, word ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x6C", "rep insb byte ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x6D", "rep insw word ptr [edi], dx"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x6E", "rep outsb dx, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x6F", "rep outsw dx, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xA4", "rep movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xA5", "rep movsw word ptr [edi], word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xA6", "repe cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xA7", "repe cmpsw word ptr [esi], word ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xAA", "rep stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xAB", "rep stosw word ptr [edi], ax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xAD", "rep lodsw ax, word ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xAE", "repe scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\xAF", "repe scasw ax, word ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xA4", "movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xA5", "movsq qword ptr [rdi], qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xA6", "cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xA7", "cmpsq qword ptr [rsi], qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xAA", "stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xAB", "stosq qword ptr [rdi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xAC", "lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xAD", "lodsq rax, qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xAE", "scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x48\xAF", "scasq rax, qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xA4", "movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xA5", "movsq qword ptr [rdi], qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xA6", "cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xA7", "cmpsq qword ptr [rsi], qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xAA", "stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xAB", "stosq qword ptr [rdi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xAC", "lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xAD", "lodsq rax, qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xAE", "scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x48\xAF", "scasq rax, qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xA4", "movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xA5", "movsq qword ptr [edi], qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xA6", "cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xA7", "cmpsq qword ptr [esi], qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xAA", "stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xAB", "stosq qword ptr [edi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xAD", "lodsq rax, qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xAE", "scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\x48\xAF", "scasq rax, qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xA4", "repne movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xA5", "repne movsq qword ptr [rdi], qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xA6", "repne cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xA7", "repne cmpsq qword ptr [rsi], qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xAA", "repne stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xAB", "repne stosq qword ptr [rdi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xAC", "repne lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xAD", "repne lodsq rax, qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xAE", "repne scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF2\x48\xAF", "repne scasq rax, qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xA4", "rep movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xA5", "rep movsq qword ptr [rdi], qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xA6", "repe cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xA7", "repe cmpsq qword ptr [rsi], qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xAA", "rep stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xAB", "rep stosq qword ptr [rdi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xAC", "rep lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xAD", "rep lodsq rax, qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xAE", "repe scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\xF3\x48\xAF", "repe scasq rax, qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xA4", "movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xA5", "movsq qword ptr [edi], qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xA6", "cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xA7", "cmpsq qword ptr [esi], qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xAA", "stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xAB", "stosq qword ptr [edi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xAC", "lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xAD", "lodsq rax, qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xAE", "scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\x48\xAF", "scasq rax, qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xA4", "repne movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xA5", "repne movsq qword ptr [rdi], qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xA6", "repne cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xA7", "repne cmpsq qword ptr [rsi], qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xAA", "repne stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xAB", "repne stosq qword ptr [rdi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xAC", "repne lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xAD", "repne lodsq rax, qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xAE", "repne scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF2\x48\xAF", "repne scasq rax, qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xA4", "rep movsb byte ptr [rdi], byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xA5", "rep movsq qword ptr [rdi], qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xA6", "repe cmpsb byte ptr [rsi], byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xA7", "repe cmpsq qword ptr [rsi], qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xAA", "rep stosb byte ptr [rdi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xAB", "rep stosq qword ptr [rdi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xAC", "rep lodsb al, byte ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xAD", "rep lodsq rax, qword ptr [rsi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xAE", "repe scasb al, byte ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\xF3\x48\xAF", "repe scasq rax, qword ptr [rdi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xA4", "repne movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xA5", "repne movsq qword ptr [edi], qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xA6", "repne cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xA7", "repne cmpsq qword ptr [esi], qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xAA", "repne stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xAB", "repne stosq qword ptr [edi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xAD", "repne lodsq rax, qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xAE", "repne scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF2\x48\xAF", "repne scasq rax, qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xA4", "rep movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xA5", "rep movsq qword ptr [edi], qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xA6", "repe cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xA7", "repe cmpsq qword ptr [esi], qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xAA", "rep stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xAB", "rep stosq qword ptr [edi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xAD", "rep lodsq rax, qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xAE", "repe scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x67\xF3\x48\xAF", "repe scasq rax, qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xA4", "repne movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xA5", "repne movsq qword ptr [edi], qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xA6", "repne cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xA7", "repne cmpsq qword ptr [esi], qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xAA", "repne stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xAB", "repne stosq qword ptr [edi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xAC", "repne lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xAD", "repne lodsq rax, qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xAE", "repne scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF2\x48\xAF", "repne scasq rax, qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xA4", "rep movsb byte ptr [edi], byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xA5", "rep movsq qword ptr [edi], qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xA6", "repe cmpsb byte ptr [esi], byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xA7", "repe cmpsq qword ptr [esi], qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xAA", "rep stosb byte ptr [edi], al"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xAB", "rep stosq qword ptr [edi], rax"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xAC", "rep lodsb al, byte ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xAD", "rep lodsq rax, qword ptr [esi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xAE", "repe scasb al, byte ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x67\xF3\x48\xAF", "repe scasq rax, qword ptr [edi]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x0f\x01\x05\xa0\x90\x04\x08", "sgdt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x0f\x01\x05\xa0\x90\x04\x08", "sgdt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x0f\x01\x05\xa0\x90\x04\x08", "sgdt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x0f\x01\x05\xa0\x90\x04\x08", "sgdt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x0f\x01\x05", "sgdt [di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x0f\x01\x05", "sgdt [di]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x0f\x01\x0d\xa0\x90\x04\x08", "sidt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x0f\x01\x0d\xa0\x90\x04\x08", "sidt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x0f\x01\x0d\xa0\x90\x04\x08", "sidt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x0f\x01\x0d\xa0\x90\x04\x08", "sidt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x0f\x01\x0d", "sidt [di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x0f\x01\x0d", "sidt [di]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x0f\x01\x15\xa0\x90\x04\x08", "lgdt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x0f\x01\x15\xa0\x90\x04\x08", "lgdt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x0f\x01\x15\xa0\x90\x04\x08", "lgdt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x0f\x01\x15\xa0\x90\x04\x08", "lgdt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x0f\x01\x15", "lgdt [di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x0f\x01\x15", "lgdt [di]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x0f\x01\x1d\xa0\x90\x04\x08", "lidt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_INTEL, 0x649123ffe1, b"\x66\x0f\x01\x1d\xa0\x90\x04\x08", "lidt [rip + 0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x0f\x01\x1d\xa0\x90\x04\x08", "lidt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0x9123ffe1, b"\x66\x0f\x01\x1d\xa0\x90\x04\x08", "lidt [0x80490a0]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x0f\x01\x1d", "lidt [di]"), (CS_ARCH_X86, CS_MODE_16, CS_OPT_SYNTAX_INTEL, 0xffe1, b"\x66\x0f\x01\x1d", "lidt [di]"), # issues 702 https://github.com/aquynh/capstone/issues/702 (CS_ARCH_X86, CS_MODE_32, CS_OPT_SYNTAX_INTEL, 0, b"\x85\xC8", "test eax, ecx") ) _python3 = sys.version_info.major == 3 def to_hex(s): if _python3: return " ".join("0x{0:02x}".format(c) for c in s) # <-- Python 3 is OK else: return " ".join("0x{0:02x}".format(ord(c)) for c in s) def str_syntax(syntax): slist = { 0: "", CS_OPT_SYNTAX_INTEL: "intel", CS_OPT_SYNTAX_ATT: "att", } return slist[syntax] def str_arch_mode(a, m): amlist = { (CS_ARCH_X86, CS_MODE_16): "X86-16bit", (CS_ARCH_X86, CS_MODE_32): "X86-32bit", (CS_ARCH_X86, CS_MODE_64): "X86-64bit", } return amlist[(a, m)] # ## Test cs_disasm_quick() def test_regression(verbose): for (arch, mode, syntax, address, code, expected_output) in all_tests: #print("%s %s: %s = " %(str_arch_mode(arch, mode), str_syntax(syntax), to_hex(code)), end=""), output = "%s %s: %s = " %(str_arch_mode(arch, mode), str_syntax(syntax), to_hex(code)) md = Cs(arch, mode) if syntax != 0: md.syntax = syntax insn = list(md.disasm(code, address))[0] output2 = "%s %s" % (insn.mnemonic, insn.op_str) if output2 != expected_output: print(output, output2) print("\t --> ERROR: expected output = %s" %(expected_output)) elif verbose: print(output, output2) if __name__ == '__main__': import sys if len(sys.argv) == 2 and sys.argv[1] == "-v": test_regression(True) # quiet else: test_regression(False) # verbose capstone-sys-0.11.0/capstone/suite/test_all.sh010075500017500001750000000003121363402546700175630ustar0000000000000000#!/bin/sh # dump test output to /tmp/ for diffing # this is useful to detect if a change modifies any disasm output # syntax: test_all.sh ./test_archs.py > /tmp/$1_arch ./test_c.sh $1_c capstone-sys-0.11.0/capstone/suite/test_c.sh010075500017500001750000000010531363402546700172400ustar0000000000000000#!/bin/bash # Run all the Python tests, and send the output that to a file to be compared later # This is useful when we want to verify if a commit (wrongly) changes the disassemble result. ../tests/test > /tmp/$1 ../tests/test_detail >> /tmp/$1 ../tests/test_skipdata >> /tmp/$1 ../tests/test_iter >> /tmp/$1 ../tests/test_arm >> /tmp/$1 ../tests/test_arm64 >> /tmp/$1 ../tests/test_mips >> /tmp/$1 ../tests/test_ppc >> /tmp/$1 ../tests/test_sparc >> /tmp/$1 ../tests/test_x86 >> /tmp/$1 ../tests/test_systemz >> /tmp/$1 ../tests/test_xcore >> /tmp/$1 capstone-sys-0.11.0/capstone/suite/test_corpus.py010075500017500001750000000116201363402546700203500ustar0000000000000000#!/usr/bin/python # Test tool to compare Capstone output with llvm-mc. By Nguyen Anh Quynh, 2014 import sys import os from capstone import * def test_file(fname): print("Test %s" %fname); f = open(fname) lines = f.readlines() f.close() if not lines[0].startswith('# '): print("ERROR: decoding information is missing") return # skip '# ' at the front, then split line to get out hexcode # Note: option can be '', or 'None' #print lines[0] #print lines[0][2:].split(', ') (arch, mode, option) = lines[0][2:].split(', ') mode = mode.replace(' ', '') option = option.strip() archs = { "CS_ARCH_ARM": CS_ARCH_ARM, "CS_ARCH_ARM64": CS_ARCH_ARM64, "CS_ARCH_MIPS": CS_ARCH_MIPS, "CS_ARCH_PPC": CS_ARCH_PPC, "CS_ARCH_SPARC": CS_ARCH_SPARC, "CS_ARCH_SYSZ": CS_ARCH_SYSZ, "CS_ARCH_X86": CS_ARCH_X86, "CS_ARCH_XCORE": CS_ARCH_XCORE, } modes = { "CS_MODE_16": CS_MODE_16, "CS_MODE_32": CS_MODE_32, "CS_MODE_64": CS_MODE_64, "CS_MODE_MIPS32": CS_MODE_MIPS32, "CS_MODE_MIPS64": CS_MODE_MIPS64, "0": CS_MODE_ARM, "CS_MODE_ARM": CS_MODE_ARM, "CS_MODE_THUMB": CS_MODE_THUMB, "CS_MODE_ARM+CS_MODE_V8": CS_MODE_ARM+CS_MODE_V8, "CS_MODE_THUMB+CS_MODE_V8": CS_MODE_THUMB+CS_MODE_V8, "CS_MODE_THUMB+CS_MODE_MCLASS": CS_MODE_THUMB+CS_MODE_MCLASS, "CS_MODE_LITTLE_ENDIAN": CS_MODE_LITTLE_ENDIAN, "CS_MODE_BIG_ENDIAN": CS_MODE_BIG_ENDIAN, "CS_MODE_64+CS_MODE_LITTLE_ENDIAN": CS_MODE_64+CS_MODE_LITTLE_ENDIAN, "CS_MODE_64+CS_MODE_BIG_ENDIAN": CS_MODE_64+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_MICRO": CS_MODE_MIPS32+CS_MODE_MICRO, "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO": CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, "CS_MODE_BIG_ENDIAN+CS_MODE_V9": CS_MODE_BIG_ENDIAN + CS_MODE_V9, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_LITTLE_ENDIAN": CS_MODE_MIPS32+CS_MODE_LITTLE_ENDIAN, "CS_MODE_MIPS64+CS_MODE_LITTLE_ENDIAN": CS_MODE_MIPS64+CS_MODE_LITTLE_ENDIAN, "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, } mc_modes = { ("CS_ARCH_X86", "CS_MODE_32"): 0, ("CS_ARCH_X86", "CS_MODE_64"): 1, ("CS_ARCH_ARM", "CS_MODE_ARM"): 2, ("CS_ARCH_ARM", "CS_MODE_THUMB"): 3, ("CS_ARCH_ARM", "CS_MODE_ARM+CS_MODE_V8"): 4, ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): 5, ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): 6, ("CS_ARCH_ARM64", "0"): 7, ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): 8, ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): 9, ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): 10, ("CS_ARCH_MIPS", "CS_MODE_MIPS32"): 11, ("CS_ARCH_MIPS", "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN"): 12, ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN"): 13, ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO"): 13, ("CS_ARCH_PPC", "CS_MODE_BIG_ENDIAN"): 14, ("CS_ARCH_SPARC", "CS_MODE_BIG_ENDIAN"): 15, ("CS_ARCH_SPARC", "CS_MODE_BIG_ENDIAN+CS_MODE_V9"): 16, ("CS_ARCH_SYSZ", "0"): 17, ("CS_ARCH_XCORE", "0"): 18, ("CS_ARCH_MIPS", "CS_MODE_MIPS32R6+CS_MODE_BIG_ENDIAN"): 19, ("CS_ARCH_MIPS", "CS_MODE_MIPS32R6+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN"): 20, ("CS_ARCH_MIPS", "CS_MODE_MIPS32R6"): 21, ("CS_ARCH_MIPS", "CS_MODE_MIPS32R6+CS_MODE_MICRO"): 22, ("CS_ARCH_M68K", "0"): 23, ("CS_ARCH_M680X", "CS_MODE_M680X_6809"): 24, ("CS_ARCH_EVM", "0"): 25, } #if not option in ('', 'None'): # print archs[arch], modes[mode], options[option] for line in lines[1:]: # ignore all the input lines having # in front. if line.startswith('#'): continue if line.startswith('// '): line=line[3:] #print("Check %s" %line) code = line.split(' = ')[0] if len(code) < 2: continue if code.find('//') >= 0: continue hex_code = code.replace('0x', '') hex_code = hex_code.replace(',', '') hex_data = hex_code.decode('hex') fout = open("fuzz/corpus/%s_%s" % (os.path.basename(fname), hex_code), 'w') if (arch, mode) not in mc_modes: print "fail", arch, mode fout.write(unichr(mc_modes[(arch, mode)])) fout.write(hex_data) fout.close() if __name__ == '__main__': if len(sys.argv) == 1: fnames = sys.stdin.readlines() for fname in fnames: test_file(fname.strip()) else: #print("Usage: ./test_mc.py ") test_file(sys.argv[1]) capstone-sys-0.11.0/capstone/suite/test_group_name.py010075500017500001750000000147271363402546700212040ustar0000000000000000#!/usr/bin/python from capstone import * from capstone.arm import * from capstone.arm64 import * from capstone.mips import * from capstone.ppc import * from capstone.sparc import * from capstone.systemz import * from capstone.x86 import * from capstone.xcore import * import sys class GroupTest: def __init__(self, name, arch, mode, data): self.name = name self.arch = arch self.mode = mode self.data = data def run(self): print('Testing %s' %self.name) cap = Cs(self.arch, self.mode) for group_id in xrange(0,255): name = self.data.get(group_id) res = cap.group_name(group_id) if res != name: print("ERROR: id = %u expected '%s', but got '%s'" %(group_id, name, res)) print("") arm_dict = { ARM_GRP_JUMP: "jump", ARM_GRP_CALL: "call", ARM_GRP_INT: "int", ARM_GRP_PRIVILEGE: "privilege", ARM_GRP_CRYPTO: "crypto", ARM_GRP_DATABARRIER: "databarrier", ARM_GRP_DIVIDE: "divide", ARM_GRP_FPARMV8: "fparmv8", ARM_GRP_MULTPRO: "multpro", ARM_GRP_NEON: "neon", ARM_GRP_T2EXTRACTPACK: "T2EXTRACTPACK", ARM_GRP_THUMB2DSP: "THUMB2DSP", ARM_GRP_TRUSTZONE: "TRUSTZONE", ARM_GRP_V4T: "v4t", ARM_GRP_V5T: "v5t", ARM_GRP_V5TE: "v5te", ARM_GRP_V6: "v6", ARM_GRP_V6T2: "v6t2", ARM_GRP_V7: "v7", ARM_GRP_V8: "v8", ARM_GRP_VFP2: "vfp2", ARM_GRP_VFP3: "vfp3", ARM_GRP_VFP4: "vfp4", ARM_GRP_ARM: "arm", ARM_GRP_MCLASS: "mclass", ARM_GRP_NOTMCLASS: "notmclass", ARM_GRP_THUMB: "thumb", ARM_GRP_THUMB1ONLY: "thumb1only", ARM_GRP_THUMB2: "thumb2", ARM_GRP_PREV8: "prev8", ARM_GRP_FPVMLX: "fpvmlx", ARM_GRP_MULOPS: "mulops", ARM_GRP_CRC: "crc", ARM_GRP_DPVFP: "dpvfp", ARM_GRP_V6M: "v6m", ARM_GRP_VIRTUALIZATION: "virtualization", } arm64_dict = { ARM64_GRP_JUMP: "jump", ARM64_GRP_CALL: "call", ARM64_GRP_RET: "return", ARM64_GRP_INT: "int", ARM64_GRP_PRIVILEGE: "privilege", ARM64_GRP_CRYPTO: "crypto", ARM64_GRP_FPARMV8: "fparmv8", ARM64_GRP_NEON: "neon", ARM64_GRP_CRC: "crc" } mips_dict = { MIPS_GRP_JUMP: "jump", MIPS_GRP_CALL: "call", MIPS_GRP_RET: "ret", MIPS_GRP_INT: "int", MIPS_GRP_IRET: "iret", MIPS_GRP_PRIVILEGE: "privilege", MIPS_GRP_BITCOUNT: "bitcount", MIPS_GRP_DSP: "dsp", MIPS_GRP_DSPR2: "dspr2", MIPS_GRP_FPIDX: "fpidx", MIPS_GRP_MSA: "msa", MIPS_GRP_MIPS32R2: "mips32r2", MIPS_GRP_MIPS64: "mips64", MIPS_GRP_MIPS64R2: "mips64r2", MIPS_GRP_SEINREG: "seinreg", MIPS_GRP_STDENC: "stdenc", MIPS_GRP_SWAP: "swap", MIPS_GRP_MICROMIPS: "micromips", MIPS_GRP_MIPS16MODE: "mips16mode", MIPS_GRP_FP64BIT: "fp64bit", MIPS_GRP_NONANSFPMATH: "nonansfpmath", MIPS_GRP_NOTFP64BIT: "notfp64bit", MIPS_GRP_NOTINMICROMIPS: "notinmicromips", MIPS_GRP_NOTNACL: "notnacl", MIPS_GRP_NOTMIPS32R6: "notmips32r6", MIPS_GRP_NOTMIPS64R6: "notmips64r6", MIPS_GRP_CNMIPS: "cnmips", MIPS_GRP_MIPS32: "mips32", MIPS_GRP_MIPS32R6: "mips32r6", MIPS_GRP_MIPS64R6: "mips64r6", MIPS_GRP_MIPS2: "mips2", MIPS_GRP_MIPS3: "mips3", MIPS_GRP_MIPS3_32: "mips3_32", MIPS_GRP_MIPS3_32R2: "mips3_32r2", MIPS_GRP_MIPS4_32: "mips4_32", MIPS_GRP_MIPS4_32R2: "mips4_32r2", MIPS_GRP_MIPS5_32R2: "mips5_32r2", MIPS_GRP_GP32BIT: "gp32bit", MIPS_GRP_GP64BIT: "gp64bit", } ppc_dict = { PPC_GRP_JUMP: "jump", PPC_GRP_ALTIVEC: "altivec", PPC_GRP_MODE32: "mode32", PPC_GRP_MODE64: "mode64", PPC_GRP_BOOKE: "booke", PPC_GRP_NOTBOOKE: "notbooke", PPC_GRP_SPE: "spe", PPC_GRP_VSX: "vsx", PPC_GRP_E500: "e500", PPC_GRP_PPC4XX: "ppc4xx", PPC_GRP_PPC6XX: "ppc6xx", PPC_GRP_ICBT: "icbt", PPC_GRP_P8ALTIVEC: "p8altivec", PPC_GRP_P8VECTOR: "p8vector", PPC_GRP_QPX: "qpx", } sparc_dict = { SPARC_GRP_JUMP: "jump", SPARC_GRP_HARDQUAD: "hardquad", SPARC_GRP_V9: "v9", SPARC_GRP_VIS: "vis", SPARC_GRP_VIS2: "vis2", SPARC_GRP_VIS3: "vis3", SPARC_GRP_32BIT: "32bit", SPARC_GRP_64BIT: "64bit", } sysz_dict = { SYSZ_GRP_JUMP: "jump", SYSZ_GRP_DISTINCTOPS: "distinctops", SYSZ_GRP_FPEXTENSION: "fpextension", SYSZ_GRP_HIGHWORD: "highword", SYSZ_GRP_INTERLOCKEDACCESS1: "interlockedaccess1", SYSZ_GRP_LOADSTOREONCOND: "loadstoreoncond", } x86_dict = { X86_GRP_JUMP: "jump", X86_GRP_CALL: "call", X86_GRP_RET: "ret", X86_GRP_INT: "int", X86_GRP_IRET: "iret", X86_GRP_PRIVILEGE: "privilege", X86_GRP_VM: "vm", X86_GRP_3DNOW: "3dnow", X86_GRP_AES: "aes", X86_GRP_ADX: "adx", X86_GRP_AVX: "avx", X86_GRP_AVX2: "avx2", X86_GRP_AVX512: "avx512", X86_GRP_BMI: "bmi", X86_GRP_BMI2: "bmi2", X86_GRP_CMOV: "cmov", X86_GRP_F16C: "fc16", X86_GRP_FMA: "fma", X86_GRP_FMA4: "fma4", X86_GRP_FSGSBASE: "fsgsbase", X86_GRP_HLE: "hle", X86_GRP_MMX: "mmx", X86_GRP_MODE32: "mode32", X86_GRP_MODE64: "mode64", X86_GRP_RTM: "rtm", X86_GRP_SHA: "sha", X86_GRP_SSE1: "sse1", X86_GRP_SSE2: "sse2", X86_GRP_SSE3: "sse3", X86_GRP_SSE41: "sse41", X86_GRP_SSE42: "sse42", X86_GRP_SSE4A: "sse4a", X86_GRP_SSSE3: "ssse3", X86_GRP_PCLMUL: "pclmul", X86_GRP_XOP: "xop", X86_GRP_CDI: "cdi", X86_GRP_ERI: "eri", X86_GRP_TBM: "tbm", X86_GRP_16BITMODE: "16bitmode", X86_GRP_NOT64BITMODE: "not64bitmode", X86_GRP_SGX: "sgx", X86_GRP_DQI: "dqi", X86_GRP_BWI: "bwi", X86_GRP_PFI: "pfi", X86_GRP_VLX: "vlx", X86_GRP_SMAP: "smap", X86_GRP_NOVLX: "novlx", } xcore_dict = { XCORE_GRP_JUMP: "jump", } tests = [ GroupTest('arm', CS_ARCH_ARM, CS_MODE_THUMB, arm_dict), GroupTest('arm64', CS_ARCH_ARM64, CS_MODE_ARM, arm64_dict), GroupTest('mips', CS_ARCH_MIPS, CS_MODE_MIPS32 | CS_MODE_BIG_ENDIAN, mips_dict), GroupTest('ppc', CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, ppc_dict), GroupTest('sparc', CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, sparc_dict), GroupTest('sysz', CS_ARCH_SYSZ, CS_MODE_BIG_ENDIAN, sysz_dict), GroupTest('x86', CS_ARCH_X86, CS_MODE_32, x86_dict), GroupTest('xcore', CS_ARCH_XCORE, CS_MODE_BIG_ENDIAN, xcore_dict), GroupTest('m68k', CS_ARCH_M68K, CS_MODE_BIG_ENDIAN, xcore_dict), ] if __name__ == '__main__': args = sys.argv[1:] all = len(args) == 0 or 'all' in args for t in tests: if all or t.name in args: t.run() else: print('Skipping %s' %t.name) capstone-sys-0.11.0/capstone/suite/test_mc.py010075500017500001750000000243521363402546700174420ustar0000000000000000#!/usr/bin/python # Test tool to compare Capstone output with llvm-mc. By Nguyen Anh Quynh, 2014 import array, os.path, sys from subprocess import Popen, PIPE, STDOUT from capstone import * # convert all hex numbers to decimal numbers in a text def normalize_hex(a): while(True): i = a.find('0x') if i == -1: # no more hex number break hexnum = '0x' for c in a[i + 2:]: if c in '0123456789abcdefABCDEF': hexnum += c else: break num = int(hexnum, 16) a = a.replace(hexnum, str(num)) return a def run_mc(arch, hexcode, option, syntax=None): def normalize(text): # remove tabs text = text.lower() items = text.split() text = ' '.join(items) if arch == CS_ARCH_X86: # remove comment after # i = text.find('# ') if i != -1: return text[:i].strip() if arch == CS_ARCH_ARM64: # remove comment after # i = text.find('// ') if i != -1: return text[:i].strip() # remove some redundant spaces text = text.replace('{ ', '{') text = text.replace(' }', '}') return text.strip() #print("Trying to decode: %s" %hexcode) if syntax: if arch == CS_ARCH_MIPS: p = Popen(['llvm-mc', '-disassemble', '-print-imm-hex', '-mattr=+msa', syntax] + option, stdout=PIPE, stdin=PIPE, stderr=STDOUT) else: p = Popen(['llvm-mc', '-disassemble', '-print-imm-hex', syntax] + option, stdout=PIPE, stdin=PIPE, stderr=STDOUT) else: if arch == CS_ARCH_MIPS: p = Popen(['llvm-mc', '-disassemble', '-print-imm-hex', '-mattr=+msa'] + option, stdout=PIPE, stdin=PIPE, stderr=STDOUT) else: p = Popen(['llvm-mc', '-disassemble', '-print-imm-hex'] + option, stdout=PIPE, stdin=PIPE, stderr=STDOUT) output = p.communicate(input=hexcode)[0] lines = output.split('\n') #print lines if 'invalid' in lines[0]: #print 'invalid ----' return 'FAILED to disassemble (MC)' else: #print 'OK:', lines[1] return normalize(lines[1].strip()) def test_file(fname): print("Test %s" %fname); f = open(fname) lines = f.readlines() f.close() if not lines[0].startswith('# '): print("ERROR: decoding information is missing") return # skip '# ' at the front, then split line to get out hexcode # Note: option can be '', or 'None' #print lines[0] #print lines[0][2:].split(', ') (arch, mode, option) = lines[0][2:].split(', ') mode = mode.replace(' ', '') option = option.strip() archs = { "CS_ARCH_ARM": CS_ARCH_ARM, "CS_ARCH_ARM64": CS_ARCH_ARM64, "CS_ARCH_MIPS": CS_ARCH_MIPS, "CS_ARCH_PPC": CS_ARCH_PPC, "CS_ARCH_SPARC": CS_ARCH_SPARC, "CS_ARCH_SYSZ": CS_ARCH_SYSZ, "CS_ARCH_X86": CS_ARCH_X86, "CS_ARCH_XCORE": CS_ARCH_XCORE, "CS_ARCH_M68K": CS_ARCH_M68K, } modes = { "CS_MODE_16": CS_MODE_16, "CS_MODE_32": CS_MODE_32, "CS_MODE_64": CS_MODE_64, "CS_MODE_MIPS32": CS_MODE_MIPS32, "CS_MODE_MIPS64": CS_MODE_MIPS64, "0": CS_MODE_ARM, "CS_MODE_ARM": CS_MODE_ARM, "CS_MODE_THUMB": CS_MODE_THUMB, "CS_MODE_ARM+CS_MODE_V8": CS_MODE_ARM+CS_MODE_V8, "CS_MODE_THUMB+CS_MODE_V8": CS_MODE_THUMB+CS_MODE_V8, "CS_MODE_THUMB+CS_MODE_MCLASS": CS_MODE_THUMB+CS_MODE_MCLASS, "CS_MODE_LITTLE_ENDIAN": CS_MODE_LITTLE_ENDIAN, "CS_MODE_BIG_ENDIAN": CS_MODE_BIG_ENDIAN, "CS_MODE_64+CS_MODE_LITTLE_ENDIAN": CS_MODE_64+CS_MODE_LITTLE_ENDIAN, "CS_MODE_64+CS_MODE_BIG_ENDIAN": CS_MODE_64+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_MICRO": CS_MODE_MIPS32+CS_MODE_MICRO, "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO": CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN, "CS_MODE_BIG_ENDIAN+CS_MODE_V9": CS_MODE_BIG_ENDIAN + CS_MODE_V9, "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, "CS_MODE_MIPS32+CS_MODE_LITTLE_ENDIAN": CS_MODE_MIPS32+CS_MODE_LITTLE_ENDIAN, "CS_MODE_MIPS64+CS_MODE_LITTLE_ENDIAN": CS_MODE_MIPS64+CS_MODE_LITTLE_ENDIAN, "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, } options = { "CS_OPT_SYNTAX_ATT": CS_OPT_SYNTAX_ATT, "CS_OPT_SYNTAX_NOREGNAME": CS_OPT_SYNTAX_NOREGNAME, } mc_modes = { ("CS_ARCH_X86", "CS_MODE_32"): ['-triple=i386'], ("CS_ARCH_X86", "CS_MODE_64"): ['-triple=x86_64'], ("CS_ARCH_ARM", "CS_MODE_ARM"): ['-triple=armv7'], ("CS_ARCH_ARM", "CS_MODE_THUMB"): ['-triple=thumbv7'], ("CS_ARCH_ARM", "CS_MODE_ARM+CS_MODE_V8"): ['-triple=armv8'], ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): ['-triple=thumbv8'], ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): ['-triple=thumbv7m'], ("CS_ARCH_ARM64", "0"): ['-triple=aarch64'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): ['-triple=mips'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): ['-triple=mipsel', '-mattr=+micromips'], ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): ['-triple=mips64el'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32"): ['-triple=mipsel'], ("CS_ARCH_MIPS", "CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN"): ['-triple=mips64'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO+CS_MODE_BIG_ENDIAN"): ['-triple=mips', '-mattr=+micromips'], ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN+CS_MODE_MICRO"): ['-triple=mips', '-mattr=+micromips'], ("CS_ARCH_PPC", "CS_MODE_BIG_ENDIAN"): ['-triple=powerpc64'], ('CS_ARCH_SPARC', 'CS_MODE_BIG_ENDIAN'): ['-triple=sparc'], ('CS_ARCH_SPARC', 'CS_MODE_BIG_ENDIAN+CS_MODE_V9'): ['-triple=sparcv9'], ('CS_ARCH_SYSZ', '0'): ['-triple=s390x', '-mcpu=z196'], } #if not option in ('', 'None'): # print archs[arch], modes[mode], options[option] #print(arch, mode, option) md = Cs(archs[arch], modes[mode]) mc_option = None if arch == 'CS_ARCH_X86': # tell llvm-mc to use Intel syntax mc_option = '-output-asm-variant=1' if arch == 'CS_ARCH_ARM' or arch == 'CS_ARCH_PPC' : md.syntax = CS_OPT_SYNTAX_NOREGNAME if fname.endswith('3DNow.s.cs'): md.syntax = CS_OPT_SYNTAX_ATT for line in lines[1:]: # ignore all the input lines having # in front. if line.startswith('#'): continue #print("Check %s" %line) code = line.split(' = ')[0] asm = ''.join(line.split(' = ')[1:]) hex_code = code.replace('0x', '') hex_code = hex_code.replace(',', '') hex_data = hex_code.decode('hex') #hex_bytes = array.array('B', hex_data) x = list(md.disasm(hex_data, 0)) if len(x) > 0: if x[0].op_str != '': cs_output = "%s %s" %(x[0].mnemonic, x[0].op_str) else: cs_output = x[0].mnemonic else: cs_output = 'FAILED to disassemble' cs_output2 = normalize_hex(cs_output) cs_output2 = cs_output2.replace(' ', '') if arch == 'CS_ARCH_MIPS': # normalize register alias names cs_output2 = cs_output2.replace('$at', '$1') cs_output2 = cs_output2.replace('$v0', '$2') cs_output2 = cs_output2.replace('$v1', '$3') cs_output2 = cs_output2.replace('$a0', '$4') cs_output2 = cs_output2.replace('$a1', '$5') cs_output2 = cs_output2.replace('$a2', '$6') cs_output2 = cs_output2.replace('$a3', '$7') cs_output2 = cs_output2.replace('$t0', '$8') cs_output2 = cs_output2.replace('$t1', '$9') cs_output2 = cs_output2.replace('$t2', '$10') cs_output2 = cs_output2.replace('$t3', '$11') cs_output2 = cs_output2.replace('$t4', '$12') cs_output2 = cs_output2.replace('$t5', '$13') cs_output2 = cs_output2.replace('$t6', '$14') cs_output2 = cs_output2.replace('$t7', '$15') cs_output2 = cs_output2.replace('$t8', '$24') cs_output2 = cs_output2.replace('$t9', '$25') cs_output2 = cs_output2.replace('$s0', '$16') cs_output2 = cs_output2.replace('$s1', '$17') cs_output2 = cs_output2.replace('$s2', '$18') cs_output2 = cs_output2.replace('$s3', '$19') cs_output2 = cs_output2.replace('$s4', '$20') cs_output2 = cs_output2.replace('$s5', '$21') cs_output2 = cs_output2.replace('$s6', '$22') cs_output2 = cs_output2.replace('$s7', '$23') cs_output2 = cs_output2.replace('$k0', '$26') cs_output2 = cs_output2.replace('$k1', '$27') #print("Running MC ...") if fname.endswith('thumb-fp-armv8.s.cs'): mc_output = run_mc(archs[arch], code, ['-triple=thumbv8'], mc_option) elif fname.endswith('mips64-alu-instructions.s.cs'): mc_output = run_mc(archs[arch], code, ['-triple=mips64el', '-mcpu=mips64r2'], mc_option) else: mc_output = run_mc(archs[arch], code, mc_modes[(arch, mode)], mc_option) mc_output2 = normalize_hex(mc_output) if arch == 'CS_ARCH_MIPS': mc_output2 = mc_output2.replace(' 0(', '(') if arch == 'CS_ARCH_PPC': mc_output2 = mc_output2.replace('.+', '') mc_output2 = mc_output2.replace('.', '') mc_output2 = mc_output2.replace(' 0(', '(') mc_output2 = mc_output2.replace(' ', '') mc_output2 = mc_output2.replace('opaque', '') if (cs_output2 != mc_output2): asm = asm.replace(' ', '').strip().lower() if asm != cs_output2: print("Mismatch: %s" %line.strip()) print("\tMC = %s" %mc_output) print("\tCS = %s" %cs_output) if __name__ == '__main__': if len(sys.argv) == 1: fnames = sys.stdin.readlines() for fname in fnames: test_file(fname.strip()) else: #print("Usage: ./test_mc.py ") test_file(sys.argv[1]) capstone-sys-0.11.0/capstone/suite/test_mc.sh010075500017500001750000000011271363402546700174170ustar0000000000000000#!/bin/sh # This script test all architectures by default. # At the output are all the mismatches between Capstone (CS) & LLVM (MC). # While most differences coming from the fact that Capstone uses more friendly # number format, some mismatches might be because Capstone is based on older # version of LLVM (which should be fixed in the next release) find MC/ -name *.cs | ./test_mc.py # To test just one architecture, specify the corresponsing dir: # $ find MC/X86 -name *.cs | ./test_mc.py # To test just one input file, run test_mc.py with that file: # $ ./test_mc.py MC/X86/x86-32-fma3.s.cs capstone-sys-0.11.0/capstone/suite/test_python.sh010075500017500001750000000010231363402546700203340ustar0000000000000000#!/bin/bash # Run all the Python tests, and send the output that to a file to be compared later # This is useful when we want to verify if a commit (wrongly) changes the disassemble result. ../bindings/python/test.py > /tmp/$1 ../bindings/python/test_detail.py >> /tmp/$1 ../bindings/python/test_arm.py >> /tmp/$1 ../bindings/python/test_arm64.py >> /tmp/$1 ../bindings/python/test_mips.py >> /tmp/$1 ../bindings/python/test_ppc.py >> /tmp/$1 ../bindings/python/test_sparc.py >> /tmp/$1 ../bindings/python/test_x86.py >> /tmp/$1 capstone-sys-0.11.0/capstone/suite/x86/README010066400017500001750000000000671363402546700167330ustar0000000000000000This directory contains some tools to test X86 engine. capstone-sys-0.11.0/capstone/suite/x86/verify/README010066400017500001750000000001501363402546700202300ustar0000000000000000This directory contains some tools to verify Capstone output, as well as semantics of X86 machine code. capstone-sys-0.11.0/capstone/suite/x86odd.py010075500017500001750000000073601363402546700171200ustar0000000000000000#!/usr/bin/env python # Capstone Python bindings, by Nguyen Anh Quynnh from __future__ import print_function import sys from capstone import * CODE32 = b"\xc0\xe0\x02" CODE32 += b"\xc0\xf6\x02" # sal dh, 0 CODE32 += b"\xc1\xf6\x00" # sal esi, 0 CODE32 += b"\x82\xc0\x00" CODE32 += b"\x0f\x1a\x00" # nop dword ptr [eax] CODE32 += b"\xf7\xc0\x11\x22\x33\x44" # test eax, 0x44332211 CODE32 += b"\xf7\xc8\x11\x22\x33\x44" # test eax, 0x44332211 CODE32 += b"\xf7\x88\x00\x00\x00\x00\x00\x00\x00\x00" # test dword ptr [eax], 0 CODE32 += b"\xf6\x88\x00\x00\x00\x00\x00" # test byte ptr [eax], 0 CODE32 += b"\xd9\xd8" # fstpnce st(0), st(0) CODE32 += b"\xdf\xdf" # fstp st(7), st(0) CODE32 += b"\x0f\x20\x00" # mov eax, cr0 CODE32 += b"\x0f\x20\x40" # mov eax, cr0 CODE32 += b"\x0f\x20\x80" # mov eax, cr0 CODE32 += b"\x0f\x22\x00" # mov cr0, eax CODE32 += b"\x0f\x22\x40" # mov cr0, eax CODE32 += b"\x0f\x22\x80" # mov cr0, eax CODE32 += b"\x0f\x21\x00" # mov eax, dr0 CODE32 += b"\x0f\x21\x40" # mov eax, dr0 CODE32 += b"\x0f\x21\x80" # mov eax, dr0 CODE32 += b"\x0f\x23\x00" # mov dr0, eax CODE32 += b"\x0f\x23\x40" # mov dr0, eax CODE32 += b"\x0f\x23\x80" # mov dr0, eax CODE32 += b"\x66\x2e\x0f\x58\xc0" # addpd xmm0, xmm0 CODE32 += b"\x2e\x66\x0f\x58\xc0" # addpd xmm0, xmm0 CODE32 += b"\x66\xf2\x0f\x38\xf1\xc3" # crc32w %bx, %eax CODE32 += b"\xf2\x0f\x38\xf1\x8c\xcb\xef\xbe\xad\xde" # crc32l -0x21524111(%ebx, %ecx, 8), %ecx CODE32_MEMREF = b"\x8b\x84\x91\x23\x01\x00\x00" CODE32_MEMREF += b"\x8b\x04\x95\x23\x01\x00\x00" CODE32_MEMREF += b"\x8b\x04\x95\xdd\xfe\xff\xff" CODE32_MEMREF += b"\xa1\x23\x01\x00\x00" CODE32_MEMREF += b"\xa1\x00\x00\x00\x00" CODE32_MEMREF += b"\xa1\xdd\xfe\xff\xff" CODE32_MEMREF += b"\x8b\x04\x91" CODE64_MEMREF = b"\xa3\x0b\x00\x00\x0f\xbe\xc0\x48\x83" CODE64_MEMREF += b"\xa0\x71\xfa\xff\x48\x85\xc0\x48\x89" CODE32_ARITH = b"\x83\xe0\xf7" CODE32_ARITH += b"\x83\xe0\x10" CODE32_ARITH += b"\x83\xe0\x00" CODE32_ARITH += b"\x80\x23\x10" CODE64_ARITH = b"\x41\x83\xe0\xfa" CODE64_ARITH += b"\x48\x83\xe4\xf0" CODE32_IMM = b"\xc2\xb8\xc0" CODE32_IMM += b"\xc2\x0f\x92" CODE32_IMM += b"\x02\x2d\x00\x00\x00\x83" _python3 = sys.version_info.major == 3 all_tests = ( (CS_ARCH_X86, CS_MODE_32, CODE32, "X86 32 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, CODE32, "X86 32 (ATT syntax)", CS_OPT_SYNTAX_ATT), (CS_ARCH_X86, CS_MODE_32, CODE32_MEMREF, "X86 32 MemRef (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, CODE32_MEMREF, "X86 32 MemRef (ATT syntax)", CS_OPT_SYNTAX_ATT), (CS_ARCH_X86, CS_MODE_64, CODE64_MEMREF, "X86 64 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, CODE32_ARITH, "X86 32 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_64, CODE64_ARITH, "X86 64 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, CODE32_IMM, "X86 32 (Intel syntax)", 0), (CS_ARCH_X86, CS_MODE_32, CODE32_IMM, "X86 32 (Intel syntax)", CS_OPT_SYNTAX_ATT), ) def to_hex(s): if _python3: return " ".join("0x{0:02x}".format(c) for c in s) # <-- Python 3 is OK else: return " ".join("0x{0:02x}".format(ord(c)) for c in s) # ## Test cs_disasm_quick() def test_cs_disasm_quick(): for (arch, mode, code, comment, syntax) in all_tests: print("Platform: %s" % comment) print("Code: %s" %(to_hex(code))), print("Disasm:") md = Cs(arch, mode) if syntax != 0: md.syntax = syntax for insn in md.disasm(code, 0x1000): print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str)) print("--------") if __name__ == '__main__': test_cs_disasm_quick() capstone-sys-0.11.0/capstone/tests/Makefile010066400017500001750000000071151363402546700171000ustar0000000000000000# Capstone Disassembler Engine # By Nguyen Anh Quynh , 2013-2014 include ../config.mk include ../functions.mk # Verbose output? V ?= 0 INCDIR = ../include ifndef BUILDDIR TESTDIR = . OBJDIR = . LIBDIR = .. else TESTDIR = $(BUILDDIR)/tests OBJDIR = $(BUILDDIR)/obj/tests LIBDIR = $(BUILDDIR) endif ifeq ($(CROSS),) CC ?= cc else CC = $(CROSS)gcc endif CFLAGS += -Wall -I$(INCDIR) LDFLAGS += -L$(LIBDIR) CFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) LDFLAGS += $(foreach arch,$(LIBARCHS),-arch $(arch)) LIBNAME = capstone BIN_EXT = AR_EXT = a # Cygwin? IS_CYGWIN := $(shell $(CC) -dumpmachine | grep -i cygwin | wc -l) ifeq ($(IS_CYGWIN),1) CFLAGS := $(CFLAGS:-fPIC=) BIN_EXT = .exe AR_EXT = lib else # mingw? IS_MINGW := $(shell $(CC) --version 2>/dev/null | grep -i "\(mingw\|MSYS\)" | wc -l) ifeq ($(IS_MINGW),1) CFLAGS := $(CFLAGS:-fPIC=) BIN_EXT = .exe AR_EXT = lib endif endif ifeq ($(CAPSTONE_STATIC),yes) ifeq ($(IS_MINGW),1) ARCHIVE = $(LIBDIR)/$(LIBNAME).$(AR_EXT) else ifeq ($(IS_CYGWIN),1) ARCHIVE = $(LIBDIR)/$(LIBNAME).$(AR_EXT) else ARCHIVE = $(LIBDIR)/lib$(LIBNAME).$(AR_EXT) endif endif .PHONY: all clean SOURCES = test_basic.c test_detail.c test_skipdata.c test_iter.c test_customized_mnem.c ifneq (,$(findstring arm,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_ARM SOURCES += test_arm.c endif ifneq (,$(findstring aarch64,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_ARM64 SOURCES += test_arm64.c endif ifneq (,$(findstring m68k,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_M68K SOURCES += test_m68k.c endif ifneq (,$(findstring mips,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_MIPS SOURCES += test_mips.c endif ifneq (,$(findstring powerpc,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_POWERPC SOURCES += test_ppc.c endif ifneq (,$(findstring sparc,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_SPARC SOURCES += test_sparc.c endif ifneq (,$(findstring systemz,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_SYSZ SOURCES += test_systemz.c endif ifneq (,$(findstring x86,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_X86 SOURCES += test_x86.c endif ifneq (,$(findstring xcore,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_XCORE SOURCES += test_xcore.c endif ifneq (,$(findstring tms320c64x,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_TMS320C64X SOURCES += test_tms320c64x.c endif ifneq (,$(findstring m680x,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_M680X SOURCES += test_m680x.c endif ifneq (,$(findstring evm,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_EVM SOURCES += test_evm.c endif OBJS = $(addprefix $(OBJDIR)/,$(SOURCES:.c=.o)) BINARY = $(addprefix $(TESTDIR)/,$(SOURCES:.c=$(BIN_EXT))) all: $(BINARY) clean: rm -rf $(OBJS) $(BINARY) $(TESTDIR)/*.exe $(TESTDIR)/*.static $(OBJDIR)/lib$(LIBNAME).* $(OBJDIR)/$(LIBNAME).* # remove orphan files due to renaming from test.c to test_basic.c rm -rf $(TESTDIR)/test.o $(TESTDIR)/test.exe $(TESTDIR)/test.static $(TESTDIR)/test $(BINARY): $(OBJS) $(TESTDIR)/%$(BIN_EXT): $(OBJDIR)/%.o @mkdir -p $(@D) ifeq ($(V),0) ifeq ($(CAPSTONE_SHARED),yes) $(call log,LINK,$(notdir $@)) @$(link-dynamic) endif ifeq ($(CAPSTONE_STATIC),yes) $(call log,LINK,$(notdir $(call staticname,$@))) @$(link-static) endif else ifeq ($(CAPSTONE_SHARED),yes) $(link-dynamic) endif ifeq ($(CAPSTONE_STATIC),yes) $(link-static) endif endif $(OBJDIR)/%.o: %.c @mkdir -p $(@D) ifeq ($(V),0) $(call log,CC,$(@:$(OBJDIR)/%=%)) @$(compile) else $(compile) endif define link-dynamic $(CC) $(LDFLAGS) $< -l$(LIBNAME) -o $@ endef define link-static $(CC) $(LDFLAGS) $< $(ARCHIVE) -o $(call staticname,$@) endef staticname = $(subst $(BIN_EXT),,$(1)).static$(BIN_EXT) capstone-sys-0.11.0/capstone/tests/README010066400017500001750000000022371363402546700163200ustar0000000000000000This directory contains some test code to show how to use Capstone API. - test_basic.c This code shows the most simple form of API where we only want to get basic information out of disassembled instruction, such as address, mnemonic and operand string. - test_detail.c: This code shows how to access to architecture-neutral information in disassembled instructions, such as implicit registers read/written, or groups of instructions that this instruction belong to. - test_skipdata.c: This code shows how to use SKIPDATA option to skip broken instructions (most likely some data mixed with instructions) and continue to decode at the next legitimate instructions. - test_iter.c: This code shows how to use the API cs_disasm_iter() to decode one instruction at a time inside a loop. - test_customized_mnem.c: This code shows how to use MNEMONIC option to customize instruction mnemonic at run-time, and then how to reset the engine to use the default mnemonic. - test_.c These code show how to access architecture-specific information for each architecture. - test_winkernel.cpp This code shows how to use Capstone from a Windows driver. capstone-sys-0.11.0/capstone/tests/test_arm.c010066400017500001750000000170671363403403300174160ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include static csh handle; struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; int syntax; }; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(csh cs_handle, cs_insn *ins) { cs_arm *arm; int i; cs_regs regs_read, regs_write; uint8_t regs_read_count, regs_write_count; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; arm = &(ins->detail->arm); if (arm->op_count) printf("\top_count: %u\n", arm->op_count); for (i = 0; i < arm->op_count; i++) { cs_arm_op *op = &(arm->operands[i]); switch((int)op->type) { default: break; case ARM_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(cs_handle, op->reg)); break; case ARM_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case ARM_OP_FP: #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point printf("\t\toperands[%u].type: FP = \n", i); #else printf("\t\toperands[%u].type: FP = %f\n", i, op->fp); #endif break; case ARM_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != ARM_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(cs_handle, op->mem.base)); if (op->mem.index != ARM_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(cs_handle, op->mem.index)); if (op->mem.scale != 1) printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); if (op->mem.lshift != 0) printf("\t\t\toperands[%u].mem.lshift: 0x%x\n", i, op->mem.lshift); break; case ARM_OP_PIMM: printf("\t\toperands[%u].type: P-IMM = %u\n", i, op->imm); break; case ARM_OP_CIMM: printf("\t\toperands[%u].type: C-IMM = %u\n", i, op->imm); break; case ARM_OP_SETEND: printf("\t\toperands[%u].type: SETEND = %s\n", i, op->setend == ARM_SETEND_BE? "be" : "le"); break; case ARM_OP_SYSREG: printf("\t\toperands[%u].type: SYSREG = %u\n", i, op->reg); break; } if (op->neon_lane != -1) { printf("\t\toperands[%u].neon_lane = %u\n", i, op->neon_lane); } switch(op->access) { default: break; case CS_AC_READ: printf("\t\toperands[%u].access: READ\n", i); break; case CS_AC_WRITE: printf("\t\toperands[%u].access: WRITE\n", i); break; case CS_AC_READ | CS_AC_WRITE: printf("\t\toperands[%u].access: READ | WRITE\n", i); break; } if (op->shift.type != ARM_SFT_INVALID && op->shift.value) { if (op->shift.type < ARM_SFT_ASR_REG) // shift with constant value printf("\t\t\tShift: %u = %u\n", op->shift.type, op->shift.value); else // shift with register printf("\t\t\tShift: %u = %s\n", op->shift.type, cs_reg_name(cs_handle, op->shift.value)); } if (op->vector_index != -1) { printf("\t\toperands[%u].vector_index = %u\n", i, op->vector_index); } if (op->subtracted) printf("\t\tSubtracted: True\n"); } if (arm->cc != ARM_CC_AL && arm->cc != ARM_CC_INVALID) printf("\tCode condition: %u\n", arm->cc); if (arm->update_flags) printf("\tUpdate-flags: True\n"); if (arm->writeback) printf("\tWrite-back: True\n"); if (arm->cps_mode) printf("\tCPSI-mode: %u\n", arm->cps_mode); if (arm->cps_flag) printf("\tCPSI-flag: %u\n", arm->cps_flag); if (arm->vector_data) printf("\tVector-data: %u\n", arm->vector_data); if (arm->vector_size) printf("\tVector-size: %u\n", arm->vector_size); if (arm->usermode) printf("\tUser-mode: True\n"); if (arm->mem_barrier) printf("\tMemory-barrier: %u\n", arm->mem_barrier); // Print out all registers accessed by this instruction (either implicit or explicit) if (!cs_regs_access(cs_handle, ins, regs_read, ®s_read_count, regs_write, ®s_write_count)) { if (regs_read_count) { printf("\tRegisters read:"); for(i = 0; i < regs_read_count; i++) { printf(" %s", cs_reg_name(cs_handle, regs_read[i])); } printf("\n"); } if (regs_write_count) { printf("\tRegisters modified:"); for(i = 0; i < regs_write_count; i++) { printf(" %s", cs_reg_name(cs_handle, regs_write[i])); } printf("\n"); } } printf("\n"); } static void test() { #define ARM_CODE "\x86\x48\x60\xf4\x4d\x0f\xe2\xf4\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3\x00\x02\x01\xf1\x05\x40\xd0\xe8\xf4\x80\x00\x00" #define ARM_CODE2 "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c" #define THUMB_CODE "\x60\xf9\x1f\x04\xe0\xf9\x4f\x07\x70\x47\x00\xf0\x10\xe8\xeb\x46\x83\xb0\xc9\x68\x1f\xb1\x30\xbf\xaf\xf3\x20\x84\x52\xf8\x23\xf0" #define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0\x18\xbf\xad\xbf\xf3\xff\x0b\x0c\x86\xf3\x00\x89\x80\xf3\x00\x8c\x4f\xfa\x99\xf6\xd0\xff\xa2\x01" #define THUMB_MCLASS "\xef\xf3\x02\x80" #define ARMV8 "\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5" struct platform platforms[] = { { CS_ARCH_ARM, CS_MODE_ARM, (unsigned char *)ARM_CODE, sizeof(ARM_CODE) - 1, "ARM" }, { CS_ARCH_ARM, CS_MODE_THUMB, (unsigned char *)THUMB_CODE, sizeof(THUMB_CODE) - 1, "Thumb" }, { CS_ARCH_ARM, CS_MODE_THUMB, (unsigned char *)ARM_CODE2, sizeof(ARM_CODE2) - 1, "Thumb-mixed" }, { CS_ARCH_ARM, CS_MODE_THUMB, (unsigned char *)THUMB_CODE2, sizeof(THUMB_CODE2) - 1, "Thumb-2 & register named with numbers", CS_OPT_SYNTAX_NOREGNAME }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS), (unsigned char*)THUMB_MCLASS, sizeof(THUMB_MCLASS) - 1, "Thumb-MClass" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), (unsigned char*)ARMV8, sizeof(ARMV8) - 1, "Arm-V8" }, }; uint64_t address = 0x80001000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); if (platforms[i].syntax) cs_option(handle, CS_OPT_SYNTAX, platforms[i].syntax); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(handle, &insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_arm64.c010066400017500001750000000137011363403403300175570ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include static csh handle; struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(cs_insn *ins) { cs_arm64 *arm64; int i; cs_regs regs_read, regs_write; unsigned char regs_read_count, regs_write_count; unsigned char access; // detail can be NULL if SKIPDATA option is turned ON if (ins->detail == NULL) return; arm64 = &(ins->detail->arm64); if (arm64->op_count) printf("\top_count: %u\n", arm64->op_count); for (i = 0; i < arm64->op_count; i++) { cs_arm64_op *op = &(arm64->operands[i]); switch(op->type) { default: break; case ARM64_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case ARM64_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case ARM64_OP_FP: #if defined(_KERNEL_MODE) // Issue #681: Windows kernel does not support formatting float point printf("\t\toperands[%u].type: FP = \n", i); #else printf("\t\toperands[%u].type: FP = %f\n", i, op->fp); #endif break; case ARM64_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != ARM64_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != ARM64_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; case ARM64_OP_CIMM: printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm); break; case ARM64_OP_REG_MRS: printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg); break; case ARM64_OP_REG_MSR: printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg); break; case ARM64_OP_PSTATE: printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate); break; case ARM64_OP_SYS: printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys); break; case ARM64_OP_PREFETCH: printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch); break; case ARM64_OP_BARRIER: printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier); break; } access = op->access; switch(access) { default: break; case CS_AC_READ: printf("\t\toperands[%u].access: READ\n", i); break; case CS_AC_WRITE: printf("\t\toperands[%u].access: WRITE\n", i); break; case CS_AC_READ | CS_AC_WRITE: printf("\t\toperands[%u].access: READ | WRITE\n", i); break; } if (op->shift.type != ARM64_SFT_INVALID && op->shift.value) printf("\t\t\tShift: type = %u, value = %u\n", op->shift.type, op->shift.value); if (op->ext != ARM64_EXT_INVALID) printf("\t\t\tExt: %u\n", op->ext); if (op->vas != ARM64_VAS_INVALID) printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas); if (op->vess != ARM64_VESS_INVALID) printf("\t\t\tVector Element Size Specifier: %u\n", op->vess); if (op->vector_index != -1) printf("\t\t\tVector Index: %u\n", op->vector_index); } if (arm64->update_flags) printf("\tUpdate-flags: True\n"); if (arm64->writeback) printf("\tWrite-back: True\n"); if (arm64->cc) printf("\tCode-condition: %u\n", arm64->cc); // Print out all registers accessed by this instruction (either implicit or explicit) if (!cs_regs_access(handle, ins, regs_read, ®s_read_count, regs_write, ®s_write_count)) { if (regs_read_count) { printf("\tRegisters read:"); for(i = 0; i < regs_read_count; i++) { printf(" %s", cs_reg_name(handle, regs_read[i])); } printf("\n"); } if (regs_write_count) { printf("\tRegisters modified:"); for(i = 0; i < regs_write_count; i++) { printf(" %s", cs_reg_name(handle, regs_write[i])); } printf("\n"); } } printf("\n"); } static void test() { #define ARM64_CODE "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c" struct platform platforms[] = { { CS_ARCH_ARM64, CS_MODE_ARM, (unsigned char *)ARM64_CODE, sizeof(ARM64_CODE) - 1, "ARM-64" }, }; uint64_t address = 0x2c; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code: ", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code: ", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_basic.c010066400017500001750000000217671363403403300177220ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; cs_opt_type opt_type; cs_opt_value opt_value; }; static void print_string_hex(unsigned char *str, size_t len) { unsigned char *c; printf("Code: "); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void test() { #ifdef CAPSTONE_HAS_X86 #define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" #define X86_CODE32 "\xba\xcd\xab\x00\x00\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" #define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00" #endif #ifdef CAPSTONE_HAS_ARM #define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3" #define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3" #define ARMV8 "\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5" #define THUMB_MCLASS "\xef\xf3\x02\x80" #define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68" #define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0" #endif #ifdef CAPSTONE_HAS_MIPS #define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56" #define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00" #define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0" #define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0" #endif #ifdef CAPSTONE_HAS_ARM64 #define ARM64_CODE "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9" #endif #ifdef CAPSTONE_HAS_POWERPC #define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21" #define PPC_CODE2 "\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f" #endif #ifdef CAPSTONE_HAS_SPARC #define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03" #define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0" #endif #ifdef CAPSTONE_HAS_SYSZ #define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78" #endif #ifdef CAPSTONE_HAS_XCORE #define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10" #endif #ifdef CAPSTONE_HAS_M68K #define M68K_CODE "\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28" #endif #ifdef CAPSTONE_HAS_TMS320C64X #define TMS320C64X_CODE "\x01\xac\x88\x40\x81\xac\x88\x43\x00\x00\x00\x00\x02\x90\x32\x96\x02\x80\x46\x9e\x05\x3c\x83\xe6\x0b\x0c\x8b\x24" #endif #ifdef CAPSTONE_HAS_M680X #define M680X_CODE "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39" #endif #ifdef CAPSTONE_HAS_EVM #define EVM_CODE "\x60\x61" #endif struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; cs_opt_type opt_type; cs_opt_value opt_value; }; struct platform platforms[] = { #ifdef CAPSTONE_HAS_X86 { CS_ARCH_X86, (cs_mode)CS_MODE_16, (unsigned char*)X86_CODE16, sizeof(X86_CODE16) - 1, "X86 16bit (Intel syntax)" }, { CS_ARCH_X86, (cs_mode)CS_MODE_32, (unsigned char*)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT, }, { CS_ARCH_X86, (cs_mode)CS_MODE_32, (unsigned char*)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (Intel syntax)" }, { CS_ARCH_X86, (cs_mode)CS_MODE_32, (unsigned char*)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (MASM syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_MASM, }, { CS_ARCH_X86, (cs_mode)CS_MODE_64, (unsigned char*)X86_CODE64, sizeof(X86_CODE64) - 1, "X86 64 (Intel syntax)" }, #endif #ifdef CAPSTONE_HAS_ARM { CS_ARCH_ARM, (cs_mode)CS_MODE_ARM, (unsigned char*)ARM_CODE, sizeof(ARM_CODE) - 1, "ARM" }, { CS_ARCH_ARM, (cs_mode)CS_MODE_THUMB, (unsigned char*)THUMB_CODE2, sizeof(THUMB_CODE2) - 1, "THUMB-2" }, { CS_ARCH_ARM, (cs_mode)CS_MODE_ARM, (unsigned char*)ARM_CODE2, sizeof(ARM_CODE2) - 1, "ARM: Cortex-A15 + NEON" }, { CS_ARCH_ARM, (cs_mode)CS_MODE_THUMB, (unsigned char*)THUMB_CODE, sizeof(THUMB_CODE) - 1, "THUMB" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS), (unsigned char*)THUMB_MCLASS, sizeof(THUMB_MCLASS) - 1, "Thumb-MClass" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), (unsigned char*)ARMV8, sizeof(ARMV8) - 1, "Arm-V8" }, #endif #ifdef CAPSTONE_HAS_MIPS { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_CODE, sizeof(MIPS_CODE) - 1, "MIPS-32 (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN), (unsigned char*)MIPS_CODE2, sizeof(MIPS_CODE2) - 1, "MIPS-64-EL (Little-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_32R6M, sizeof(MIPS_32R6M) - 1, "MIPS-32R6 | Micro (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_32R6, sizeof(MIPS_32R6) - 1, "MIPS-32R6 (Big-endian)" }, #endif #ifdef CAPSTONE_HAS_ARM64 { CS_ARCH_ARM64, (cs_mode)CS_MODE_ARM, (unsigned char*)ARM64_CODE, sizeof(ARM64_CODE) - 1, "ARM-64" }, #endif #ifdef CAPSTONE_HAS_POWERPC { CS_ARCH_PPC, (cs_mode)CS_MODE_BIG_ENDIAN, (unsigned char*)PPC_CODE, sizeof(PPC_CODE) - 1, "PPC-64" }, { CS_ARCH_PPC, (cs_mode)CS_MODE_BIG_ENDIAN, (unsigned char*)PPC_CODE, sizeof(PPC_CODE) - 1, "PPC-64, print register with number only", CS_OPT_SYNTAX, CS_OPT_SYNTAX_NOREGNAME }, { CS_ARCH_PPC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_QPX), (unsigned char*)PPC_CODE2, sizeof(PPC_CODE2) - 1, "PPC-64 + QPX", }, #endif #ifdef CAPSTONE_HAS_SPARC { CS_ARCH_SPARC, (cs_mode)CS_MODE_BIG_ENDIAN, (unsigned char*)SPARC_CODE, sizeof(SPARC_CODE) - 1, "Sparc" }, { CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), (unsigned char*)SPARCV9_CODE, sizeof(SPARCV9_CODE) - 1, "SparcV9" }, #endif #ifdef CAPSTONE_HAS_SYSZ { CS_ARCH_SYSZ, (cs_mode)0, (unsigned char*)SYSZ_CODE, sizeof(SYSZ_CODE) - 1, "SystemZ" }, #endif #ifdef CAPSTONE_HAS_XCORE { CS_ARCH_XCORE, (cs_mode)0, (unsigned char*)XCORE_CODE, sizeof(XCORE_CODE) - 1, "XCore" }, #endif #ifdef CAPSTONE_HAS_M68K { CS_ARCH_M68K, (cs_mode)(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040), (unsigned char*)M68K_CODE, sizeof(M68K_CODE) - 1, "M68K", }, #endif #ifdef CAPSTONE_HAS_TMS320C64X { CS_ARCH_TMS320C64X, (cs_mode)0, (unsigned char*)TMS320C64X_CODE, sizeof(TMS320C64X_CODE) - 1, "TMS320C64x", }, #endif #ifdef CAPSTONE_HAS_M680X { CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6809, (unsigned char*)M680X_CODE, sizeof(M680X_CODE) - 1, "M680X_M6809", }, #endif #ifdef CAPSTONE_HAS_EVM { CS_ARCH_EVM, (cs_mode)0, (unsigned char*)EVM_CODE, sizeof(EVM_CODE) - 1, "EVM", }, #endif }; csh handle; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; cs_err err; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } if (platforms[i].opt_type) cs_option(handle, platforms[i].opt_type, platforms[i].opt_value); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; print_string_hex(platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); } // print out the next offset, after the last insn printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex(platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_customized_mnem.c010066400017500001750000000041421363403403300220270ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2015-2019 */ // This sample code demonstrates the option CS_OPT_MNEMONIC // to customize instruction mnemonic. #include #include #include #include #define X86_CODE32 "\x75\x01" // Print out the input code in hexadecimal format static void print_string_hex(unsigned char *str, size_t len) { unsigned char *c; for (c = str; c < str + len; c++) { printf("%02x ", *c & 0xff); } printf("\t"); } // Print one instruction static void print_insn(csh handle) { cs_insn *insn; size_t count; count = cs_disasm(handle, (const uint8_t *)X86_CODE32, sizeof(X86_CODE32) - 1, 0x1000, 1, &insn); if (count) { print_string_hex((unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1); printf("\t%s\t%s\n", insn[0].mnemonic, insn[0].op_str); // Free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("ERROR: Failed to disasm given code!\n"); abort(); } } static void test() { csh handle; cs_err err; // Customize mnemonic JNE to "jnz" cs_opt_mnem my_mnem = { X86_INS_JNE, "jnz" }; // Set .mnemonic to NULL to reset to default mnemonic cs_opt_mnem default_mnem = { X86_INS_JNE, NULL }; err = cs_open(CS_ARCH_X86, CS_MODE_32, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } // 1. Print out the instruction in default setup. printf("Disassemble X86 code with default instruction mnemonic\n"); print_insn(handle); // Customized mnemonic JNE to JNZ using CS_OPT_MNEMONIC option printf("\nNow customize engine to change mnemonic from 'JNE' to 'JNZ'\n"); cs_option(handle, CS_OPT_MNEMONIC, (size_t)&my_mnem); // 2. Now print out the instruction in newly customized setup. print_insn(handle); // Reset engine to use the default mnemonic of JNE printf("\nReset engine to use the default mnemonic\n"); cs_option(handle, CS_OPT_MNEMONIC, (size_t)&default_mnem); // 3. Now print out the instruction in default setup. print_insn(handle); // Done cs_close(&handle); } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_detail.c010066400017500001750000000223571363403403300200770ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; cs_opt_type opt_type; cs_opt_value opt_value; }; static void print_string_hex(unsigned char *str, size_t len) { unsigned char *c; printf("Code: "); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void test() { #ifdef CAPSTONE_HAS_X86 #define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" #define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" #define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00" #endif #ifdef CAPSTONE_HAS_ARM #define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3" #define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3" #define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68" #define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0" #define THUMB_MCLASS "\xef\xf3\x02\x80" #define ARMV8 "\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5" #endif #ifdef CAPSTONE_HAS_MIPS #define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56\x00\x80\x04\x08" #define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00" #define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0" #define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0" #endif #ifdef CAPSTONE_HAS_ARM64 #define ARM64_CODE "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c" #endif #ifdef CAPSTONE_HAS_POWERPC #define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14" #define PPC_CODE2 "\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f" #endif #ifdef CAPSTONE_HAS_SPARC #define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03" #define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0" #endif #ifdef CAPSTONE_HAS_SYSZ #define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78" #endif #ifdef CAPSTONE_HAS_XCORE #define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10" #endif #ifdef CAPSTONE_HAS_M68K #define M68K_CODE "\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28" #endif #ifdef CAPSTONE_HAS_M680X #define M680X_CODE "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39" #endif struct platform platforms[] = { #ifdef CAPSTONE_HAS_X86 { CS_ARCH_X86, (cs_mode)CS_MODE_16, (unsigned char *)X86_CODE16, sizeof(X86_CODE16) - 1, "X86 16bit (Intel syntax)" }, { CS_ARCH_X86, (cs_mode)CS_MODE_32, (unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT, }, { CS_ARCH_X86, (cs_mode)CS_MODE_32, (unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (Intel syntax)" }, { CS_ARCH_X86, (cs_mode)CS_MODE_64, (unsigned char *)X86_CODE64, sizeof(X86_CODE64) - 1, "X86 64 (Intel syntax)" }, #endif #ifdef CAPSTONE_HAS_ARM { CS_ARCH_ARM, (cs_mode)CS_MODE_ARM, (unsigned char *)ARM_CODE, sizeof(ARM_CODE) - 1, "ARM" }, { CS_ARCH_ARM, (cs_mode)CS_MODE_THUMB, (unsigned char *)THUMB_CODE2, sizeof(THUMB_CODE2) - 1, "THUMB-2" }, { CS_ARCH_ARM, (cs_mode)CS_MODE_ARM, (unsigned char *)ARM_CODE2, sizeof(ARM_CODE2) - 1, "ARM: Cortex-A15 + NEON" }, { CS_ARCH_ARM, (cs_mode)CS_MODE_THUMB, (unsigned char *)THUMB_CODE, sizeof(THUMB_CODE) - 1, "THUMB" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS), (unsigned char*)THUMB_MCLASS, sizeof(THUMB_MCLASS) - 1, "Thumb-MClass" }, { CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), (unsigned char*)ARMV8, sizeof(ARMV8) - 1, "Arm-V8" }, #endif #ifdef CAPSTONE_HAS_MIPS { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN), (unsigned char *)MIPS_CODE, sizeof(MIPS_CODE) - 1, "MIPS-32 (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN), (unsigned char *)MIPS_CODE2, sizeof(MIPS_CODE2) - 1, "MIPS-64-EL (Little-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_32R6M, sizeof(MIPS_32R6M) - 1, "MIPS-32R6 | Micro (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_32R6, sizeof(MIPS_32R6) - 1, "MIPS-32R6 (Big-endian)" }, #endif #ifdef CAPSTONE_HAS_ARM64 { CS_ARCH_ARM64, (cs_mode)CS_MODE_ARM, (unsigned char *)ARM64_CODE, sizeof(ARM64_CODE) - 1, "ARM-64" }, #endif #ifdef CAPSTONE_HAS_POWERPC { CS_ARCH_PPC, (cs_mode)CS_MODE_BIG_ENDIAN, (unsigned char*)PPC_CODE, sizeof(PPC_CODE) - 1, "PPC-64" }, { CS_ARCH_PPC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_QPX), (unsigned char*)PPC_CODE2, sizeof(PPC_CODE2) - 1, "PPC-64 + QPX", }, #endif #ifdef CAPSTONE_HAS_SPARC { CS_ARCH_SPARC, (cs_mode)CS_MODE_BIG_ENDIAN, (unsigned char*)SPARC_CODE, sizeof(SPARC_CODE) - 1, "Sparc" }, { CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), (unsigned char*)SPARCV9_CODE, sizeof(SPARCV9_CODE) - 1, "SparcV9" }, #endif #ifdef CAPSTONE_HAS_SYSZ { CS_ARCH_SYSZ, (cs_mode)0, (unsigned char*)SYSZ_CODE, sizeof(SYSZ_CODE) - 1, "SystemZ" }, #endif #ifdef CAPSTONE_HAS_XCORE { CS_ARCH_XCORE, (cs_mode)0, (unsigned char*)XCORE_CODE, sizeof(XCORE_CODE) - 1, "XCore" }, #endif #ifdef CAPSTONE_HAS_M68K { CS_ARCH_M68K, (cs_mode)(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040), (unsigned char*)M68K_CODE, sizeof(M68K_CODE) - 1, "M68K", }, #endif #ifdef CAPSTONE_HAS_M680X { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6809), (unsigned char*)M680X_CODE, sizeof(M680X_CODE) - 1, "M680X_M6809", }, #endif }; csh handle; uint64_t address = 0x1000; cs_insn *all_insn; cs_detail *detail; int i; size_t count; cs_err err; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } if (platforms[i].opt_type) cs_option(handle, platforms[i].opt_type, platforms[i].opt_value); cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &all_insn); if (count) { size_t j; int n; print_string_hex(platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { cs_insn *in = &(all_insn[j]); printf("0x%" PRIx64 ":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n", in->address, in->mnemonic, in->op_str, in->id, cs_insn_name(handle, in->id)); // print implicit registers used by this instruction detail = in->detail; if (detail->regs_read_count > 0) { printf("\tImplicit registers read: "); for (n = 0; n < detail->regs_read_count; n++) { printf("%s ", cs_reg_name(handle, detail->regs_read[n])); } printf("\n"); } // print implicit registers modified by this instruction if (detail->regs_write_count > 0) { printf("\tImplicit registers modified: "); for (n = 0; n < detail->regs_write_count; n++) { printf("%s ", cs_reg_name(handle, detail->regs_write[n])); } printf("\n"); } // print the groups this instruction belong to if (detail->groups_count > 0) { printf("\tThis instruction belongs to groups: "); for (n = 0; n < detail->groups_count; n++) { printf("%s ", cs_group_name(handle, detail->groups[n])); } printf("\n"); } } // print out the next offset, after the last insn printf("0x%" PRIx64 ":\n", all_insn[j-1].address + all_insn[j-1].size); // free memory allocated by cs_disasm() cs_free(all_insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex(platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_evm.c010066400017500001750000000050331363403403300174140ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2018-2019 */ #include #include #include #include static csh handle; struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(csh cs_handle, cs_insn *ins) { cs_evm *evm; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; evm = &(ins->detail->evm); if (evm->pop) printf("\tPop: %u\n", evm->pop); if (evm->push) printf("\tPush: %u\n", evm->push); if (evm->fee) printf("\tGas fee: %u\n", evm->fee); if (ins->detail->groups_count) { int j; printf("\tGroups: "); for(j = 0; j < ins->detail->groups_count; j++) { printf("%s ", cs_group_name(handle, ins->detail->groups[j])); } printf("\n"); } } static void test() { #define EVM_CODE "\x60\x61\x50" struct platform platforms[] = { { CS_ARCH_EVM, 0, (unsigned char *)EVM_CODE, sizeof(EVM_CODE) - 1, "EVM" }, }; uint64_t address = 0x80001000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(handle, &insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_iter.c010066400017500001750000000167001363403403300175730ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ // This sample code demonstrates the APIs cs_malloc() & cs_disasm_iter(). #include #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; cs_opt_type opt_type; cs_opt_value opt_value; }; static void print_string_hex(unsigned char *str, size_t len) { unsigned char *c; printf("Code: "); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void test() { #ifdef CAPSTONE_HAS_X86 #define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" #define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" #define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00" #endif #ifdef CAPSTONE_HAS_ARM #define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3" #define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3" #define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68" #define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0" #endif #ifdef CAPSTONE_HAS_MIPS #define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56\x00\x80\x04\x08" #define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00" #endif #ifdef CAPSTONE_HAS_ARM64 #define ARM64_CODE "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c" #endif #ifdef CAPSTONE_HAS_POWERPC #define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14" #endif #ifdef CAPSTONE_HAS_SPARC #define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03" #define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0" #endif #ifdef CAPSTONE_HAS_SYSZ #define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78" #endif #ifdef CAPSTONE_HAS_XCORE #define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10" #endif #ifdef CAPSTONE_HAS_M680X #define M680X_CODE "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39" #endif struct platform platforms[] = { #ifdef CAPSTONE_HAS_X86 { CS_ARCH_X86, CS_MODE_16, (unsigned char *)X86_CODE16, sizeof(X86_CODE32) - 1, "X86 16bit (Intel syntax)" }, { CS_ARCH_X86, CS_MODE_32, (unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT, }, { CS_ARCH_X86, CS_MODE_32, (unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (Intel syntax)" }, { CS_ARCH_X86, CS_MODE_64, (unsigned char *)X86_CODE64, sizeof(X86_CODE64) - 1, "X86 64 (Intel syntax)" }, #endif #ifdef CAPSTONE_HAS_ARM { CS_ARCH_ARM, CS_MODE_ARM, (unsigned char *)ARM_CODE, sizeof(ARM_CODE) - 1, "ARM" }, { CS_ARCH_ARM, CS_MODE_THUMB, (unsigned char *)THUMB_CODE2, sizeof(THUMB_CODE2) - 1, "THUMB-2" }, { CS_ARCH_ARM, CS_MODE_ARM, (unsigned char *)ARM_CODE2, sizeof(ARM_CODE2) - 1, "ARM: Cortex-A15 + NEON" }, { CS_ARCH_ARM, CS_MODE_THUMB, (unsigned char *)THUMB_CODE, sizeof(THUMB_CODE) - 1, "THUMB" }, #endif #ifdef CAPSTONE_HAS_MIPS { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN), (unsigned char *)MIPS_CODE, sizeof(MIPS_CODE) - 1, "MIPS-32 (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN), (unsigned char *)MIPS_CODE2, sizeof(MIPS_CODE2) - 1, "MIPS-64-EL (Little-endian)" }, #endif #ifdef CAPSTONE_HAS_ARM64 { CS_ARCH_ARM64, CS_MODE_ARM, (unsigned char *)ARM64_CODE, sizeof(ARM64_CODE) - 1, "ARM-64" }, #endif #ifdef CAPSTONE_HAS_POWERPC { CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, (unsigned char*)PPC_CODE, sizeof(PPC_CODE) - 1, "PPC-64" }, #endif #ifdef CAPSTONE_HAS_SPARC { CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, (unsigned char*)SPARC_CODE, sizeof(SPARC_CODE) - 1, "Sparc" }, { CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), (unsigned char*)SPARCV9_CODE, sizeof(SPARCV9_CODE) - 1, "SparcV9" }, #endif #ifdef CAPSTONE_HAS_SYSZ { CS_ARCH_SYSZ, (cs_mode)0, (unsigned char*)SYSZ_CODE, sizeof(SYSZ_CODE) - 1, "SystemZ" }, #endif #ifdef CAPSTONE_HAS_XCORE { CS_ARCH_XCORE, (cs_mode)0, (unsigned char*)XCORE_CODE, sizeof(XCORE_CODE) - 1, "XCore" }, #endif #ifdef CAPSTONE_HAS_M680X { CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6809, (unsigned char*)M680X_CODE, sizeof(M680X_CODE) - 1, "M680X_6809" }, #endif }; csh handle; uint64_t address; cs_insn *insn; cs_detail *detail; int i; cs_err err; const uint8_t *code; size_t size; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } if (platforms[i].opt_type) cs_option(handle, platforms[i].opt_type, platforms[i].opt_value); cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); // allocate memory for the cache to be used by cs_disasm_iter() insn = cs_malloc(handle); print_string_hex(platforms[i].code, platforms[i].size); printf("Disasm:\n"); address = 0x1000; code = platforms[i].code; size = platforms[i].size; while(cs_disasm_iter(handle, &code, &size, &address, insn)) { int n; printf("0x%" PRIx64 ":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n", insn->address, insn->mnemonic, insn->op_str, insn->id, cs_insn_name(handle, insn->id)); // print implicit registers used by this instruction detail = insn->detail; if (detail->regs_read_count > 0) { printf("\tImplicit registers read: "); for (n = 0; n < detail->regs_read_count; n++) { printf("%s ", cs_reg_name(handle, detail->regs_read[n])); } printf("\n"); } // print implicit registers modified by this instruction if (detail->regs_write_count > 0) { printf("\tImplicit registers modified: "); for (n = 0; n < detail->regs_write_count; n++) { printf("%s ", cs_reg_name(handle, detail->regs_write[n])); } printf("\n"); } // print the groups this instruction belong to if (detail->groups_count > 0) { printf("\tThis instruction belongs to groups: "); for (n = 0; n < detail->groups_count; n++) { printf("%s ", cs_group_name(handle, detail->groups[n])); } printf("\n"); } } printf("\n"); // free memory allocated by cs_malloc() cs_free(insn, 1); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_m680x.c010066400017500001750000000224451363402546700175300ustar0000000000000000/* Capstone Disassembler Engine */ /* M680X Backend by Wolfgang Schwotzer 2017 */ #include #include #include #include #define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) #define WITH_DETAILS struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) printf("0x%02x ", *c & 0xff); printf("\n"); } static void print_string_hex_short(unsigned char *str, size_t len) { unsigned char *c; for (c = str; c < str + len; c++) printf("%02x", *c & 0xff); } static const char *s_access[] = { "UNCHANGED", "READ", "WRITE", "READ | WRITE", }; static void print_read_write_regs(csh handle, cs_detail *detail) { int i; if (detail->regs_read_count > 0) { printf("\tRegisters read:"); for (i = 0; i < detail->regs_read_count; ++i) printf(" %s", cs_reg_name(handle, detail->regs_read[i])); printf("\n"); } if (detail->regs_write_count > 0) { printf("\tRegisters modified:"); for (i = 0; i < detail->regs_write_count; ++i) printf(" %s", cs_reg_name(handle, detail->regs_write[i])); printf("\n"); } } static void print_insn_detail(csh handle, cs_insn *insn) { cs_detail *detail = insn->detail; cs_m680x *m680x = NULL; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (detail == NULL) return; m680x = &detail->m680x; if (m680x->op_count) printf("\top_count: %u\n", m680x->op_count); for (i = 0; i < m680x->op_count; i++) { cs_m680x_op *op = &(m680x->operands[i]); const char *comment; switch ((int)op->type) { default: break; case M680X_OP_REGISTER: comment = ""; if ((i == 0 && (m680x->flags & M680X_FIRST_OP_IN_MNEM)) || ((i == 1 && (m680x->flags & M680X_SECOND_OP_IN_MNEM)))) comment = " (in mnemonic)"; printf("\t\toperands[%u].type: REGISTER = %s%s\n", i, cs_reg_name(handle, op->reg), comment); break; case M680X_OP_CONSTANT: printf("\t\toperands[%u].type: CONSTANT = %u\n", i, op->const_val); break; case M680X_OP_IMMEDIATE: printf("\t\toperands[%u].type: IMMEDIATE = #%d\n", i, op->imm); break; case M680X_OP_DIRECT: printf("\t\toperands[%u].type: DIRECT = 0x%02x\n", i, op->direct_addr); break; case M680X_OP_EXTENDED: printf("\t\toperands[%u].type: EXTENDED %s = 0x%04x\n", i, op->ext.indirect ? "INDIRECT" : "", op->ext.address); break; case M680X_OP_RELATIVE: printf("\t\toperands[%u].type: RELATIVE = 0x%04x\n", i, op->rel.address); break; case M680X_OP_INDEXED: printf("\t\toperands[%u].type: INDEXED%s\n", i, (op->idx.flags & M680X_IDX_INDIRECT) ? " INDIRECT" : ""); if (op->idx.base_reg != M680X_REG_INVALID) printf("\t\t\tbase register: %s\n", cs_reg_name(handle, op->idx.base_reg)); if (op->idx.offset_reg != M680X_REG_INVALID) printf("\t\t\toffset register: %s\n", cs_reg_name(handle, op->idx.offset_reg)); if ((op->idx.offset_bits != 0) && (op->idx.offset_reg == M680X_REG_INVALID) && !op->idx.inc_dec) { printf("\t\t\toffset: %d\n", op->idx.offset); if (op->idx.base_reg == M680X_REG_PC) printf("\t\t\toffset address: 0x%x\n", op->idx.offset_addr); printf("\t\t\toffset bits: %u\n", op->idx.offset_bits); } if (op->idx.inc_dec) { const char *post_pre = op->idx.flags & M680X_IDX_POST_INC_DEC ? "post" : "pre"; const char *inc_dec = (op->idx.inc_dec > 0) ? "increment" : "decrement"; printf("\t\t\t%s %s: %d\n", post_pre, inc_dec, abs(op->idx.inc_dec)); } break; } if (op->size != 0) printf("\t\t\tsize: %u\n", op->size); if (op->access != CS_AC_INVALID) printf("\t\t\taccess: %s\n", s_access[op->access]); } print_read_write_regs(handle, detail); if (detail->groups_count) { printf("\tgroups_count: %u\n", detail->groups_count); } printf("\n"); } static bool consistency_checks() { return true; } static void test() { #define M6800_CODE \ "\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39" #define M6801_CODE \ "\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39" #define M6805_CODE \ "\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c" \ "\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe" #define M6808_CODE \ "\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62" \ "\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10" \ "\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f" #define HCS08_CODE \ "\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f" \ "\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82" #define M6811_CODE \ "\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01" \ "\x1e\x7f\x20\x00\x8f\xcf" \ "\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f" \ "\x18\xce\x10\x00\x18\xff\x10\x00" \ "\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f" #define CPU12_CODE \ "\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00" \ "\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52" \ "\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00" \ "\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00" \ "\x18\x3e\x18\x3f\x00" #define HD6301_CODE \ "\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39" #define M6809_CODE \ "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81" \ "\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00" \ "\x11\xac\x99\x10\x00\x39" \ \ "\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10" \ "\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86" \ "\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00" \ "\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00" \ \ "\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96" \ "\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00" \ "\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00" #define HD6309_CODE \ "\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2" \ "\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d" \ "\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34" \ "\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00" struct platform platforms[] = { { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6301), (unsigned char *)HD6301_CODE, sizeof(HD6301_CODE) - 1, "M680X_HD6301", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6309), (unsigned char *)HD6309_CODE, sizeof(HD6309_CODE) - 1, "M680X_HD6309", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6800), (unsigned char *)M6800_CODE, sizeof(M6800_CODE) - 1, "M680X_M6800", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6801), (unsigned char *)M6801_CODE, sizeof(M6801_CODE) - 1, "M680X_M6801", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6805), (unsigned char *)M6805_CODE, sizeof(M6805_CODE) - 1, "M680X_M68HC05", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6808), (unsigned char *)M6808_CODE, sizeof(M6808_CODE) - 1, "M680X_M68HC08", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6809), (unsigned char *)M6809_CODE, sizeof(M6809_CODE) - 1, "M680X_M6809", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_6811), (unsigned char *)M6811_CODE, sizeof(M6811_CODE) - 1, "M680X_M68HC11", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_CPU12), (unsigned char *)CPU12_CODE, sizeof(CPU12_CODE) - 1, "M680X_CPU12", }, { CS_ARCH_M680X, (cs_mode)(CS_MODE_M680X_HCS08), (unsigned char *)HCS08_CODE, sizeof(HCS08_CODE) - 1, "M680X_HCS08", }, }; uint64_t address = 0x1000; csh handle; cs_insn *insn; int i; size_t count; const char *nine_spaces = " "; if (!consistency_checks()) abort(); for (i = 0; i < sizeof(platforms) / sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } #ifdef WITH_DETAILS cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); #endif count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("********************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code: ", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { int slen; printf("0x%04x: ", (uint16_t)insn[j].address); print_string_hex_short(insn[j].bytes, insn[j].size); printf("%.*s", 1 + ((5 - insn[j].size) * 2), nine_spaces); printf("%s", insn[j].mnemonic); slen = (int)strlen(insn[j].mnemonic); printf("%.*s", 1 + (5 - slen), nine_spaces); printf("%s\n", insn[j].op_str); #ifdef WITH_DETAILS print_insn_detail(handle, &insn[j]); #endif } // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("********************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_m68k.c010066400017500001750000000131361363403403300174150ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char* code; size_t size; const char* comment; }; static csh handle; static void print_string_hex(const char* comment, unsigned char* str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } const char* s_addressing_modes[] = { "", "Register Direct - Data", "Register Direct - Address", "Register Indirect - Address", "Register Indirect - Address with Postincrement", "Register Indirect - Address with Predecrement", "Register Indirect - Address with Displacement", "Address Register Indirect With Index - 8-bit displacement", "Address Register Indirect With Index - Base displacement", "Memory indirect - Postindex", "Memory indirect - Preindex", "Program Counter Indirect - with Displacement", "Program Counter Indirect with Index - with 8-Bit Displacement", "Program Counter Indirect with Index - with Base Displacement", "Program Counter Memory Indirect - Postindexed", "Program Counter Memory Indirect - Preindexed", "Absolute Data Addressing - Short", "Absolute Data Addressing - Long", "Immediate value", }; static void print_read_write_regs(cs_detail* detail) { int i; for (i = 0; i < detail->regs_read_count; ++i) { uint16_t reg_id = detail->regs_read[i]; const char* reg_name = cs_reg_name(handle, reg_id); printf("\treading from reg: %s\n", reg_name); } for (i = 0; i < detail->regs_write_count; ++i) { uint16_t reg_id = detail->regs_write[i]; const char* reg_name = cs_reg_name(handle, reg_id); printf("\twriting to reg: %s\n", reg_name); } } static void print_insn_detail(cs_insn *ins) { cs_m68k* m68k; cs_detail* detail; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; detail = ins->detail; m68k = &detail->m68k; if (m68k->op_count) printf("\top_count: %u\n", m68k->op_count); print_read_write_regs(detail); printf("\tgroups_count: %u\n", detail->groups_count); for (i = 0; i < m68k->op_count; i++) { cs_m68k_op* op = &(m68k->operands[i]); switch((int)op->type) { default: break; case M68K_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case M68K_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, (int)op->imm); break; case M68K_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base_reg != M68K_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base_reg)); if (op->mem.index_reg != M68K_REG_INVALID) { printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index_reg)); printf("\t\t\toperands[%u].mem.index: size = %c\n", i, op->mem.index_size ? 'l' : 'w'); } if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); if (op->mem.scale != 0) printf("\t\t\toperands[%u].mem.scale: %d\n", i, op->mem.scale); printf("\t\taddress mode: %s\n", s_addressing_modes[op->address_mode]); break; case M68K_OP_FP_SINGLE: printf("\t\toperands[%u].type: FP_SINGLE\n", i); printf("\t\t\toperands[%u].simm: %f\n", i, op->simm); break; case M68K_OP_FP_DOUBLE: printf("\t\toperands[%u].type: FP_DOUBLE\n", i); printf("\t\t\toperands[%u].dimm: %lf\n", i, op->dimm); break; case M68K_OP_REG_BITS: printf("\t\toperands[%u].type: REG_BITS = $%x\n", i, op->register_bits); break; case M68K_OP_REG_PAIR: printf("\t\toperands[%u].type: REG_PAIR = (%s, %s)\n", i, cs_reg_name(handle, op->reg_pair.reg_0), cs_reg_name(handle, op->reg_pair.reg_1)); break; } } printf("\n"); } static void test() { #define M68K_CODE "\x4C\x00\x54\x04\x48\xe7\xe0\x30\x4C\xDF\x0C\x07\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4E\xB9\x00\x00\x00\x12\x4E\x75" struct platform platforms[] = { { CS_ARCH_M68K, (cs_mode)(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040), (unsigned char*)M68K_CODE, sizeof(M68K_CODE) - 1, "M68K", }, }; uint64_t address = 0x01000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code: ", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_mips.c010066400017500001750000000101701363403403300175730ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static csh handle; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(cs_insn *ins) { int i; cs_mips *mips; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; mips = &(ins->detail->mips); if (mips->op_count) printf("\top_count: %u\n", mips->op_count); for (i = 0; i < mips->op_count; i++) { cs_mips_op *op = &(mips->operands[i]); switch((int)op->type) { default: break; case MIPS_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case MIPS_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case MIPS_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != MIPS_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); break; } } printf("\n"); } static void test() { #define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56" #define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00" #define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0" #define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0" #define MIPS_64SD "\x70\x00\xb2\xff" struct platform platforms[] = { { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 | CS_MODE_BIG_ENDIAN), (unsigned char *)MIPS_CODE, sizeof(MIPS_CODE) - 1, "MIPS-32 (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 | CS_MODE_LITTLE_ENDIAN), (unsigned char *)MIPS_CODE2, sizeof(MIPS_CODE2) - 1, "MIPS-64-EL (Little-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 | CS_MODE_MICRO | CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_32R6M, sizeof(MIPS_32R6M) - 1, "MIPS-32R6 | Micro (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 | CS_MODE_BIG_ENDIAN), (unsigned char*)MIPS_32R6, sizeof(MIPS_32R6) - 1, "MIPS-32R6 (Big-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 | CS_MODE_MIPS2 | CS_MODE_LITTLE_ENDIAN), (unsigned char *)MIPS_64SD, sizeof(MIPS_64SD) - 1, "MIPS-64-EL + Mips II (Little-endian)" }, { CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 | CS_MODE_LITTLE_ENDIAN), (unsigned char *)MIPS_64SD, sizeof(MIPS_64SD) - 1, "MIPS-64-EL (Little-endian)" }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_ppc.c010066400017500001750000000103441363403403300174100ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static csh handle; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static const char* get_bc_name(int bc) { switch(bc) { default: case PPC_BC_INVALID: return ("invalid"); case PPC_BC_LT: return ("lt"); case PPC_BC_LE: return ("le"); case PPC_BC_EQ: return ("eq"); case PPC_BC_GE: return ("ge"); case PPC_BC_GT: return ("gt"); case PPC_BC_NE: return ("ne"); case PPC_BC_UN: return ("un"); case PPC_BC_NU: return ("nu"); case PPC_BC_SO: return ("so"); case PPC_BC_NS: return ("ns"); } } static void print_insn_detail(cs_insn *ins) { cs_ppc *ppc; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; ppc = &(ins->detail->ppc); if (ppc->op_count) printf("\top_count: %u\n", ppc->op_count); for (i = 0; i < ppc->op_count; i++) { cs_ppc_op *op = &(ppc->operands[i]); switch((int)op->type) { default: break; case PPC_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case PPC_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case PPC_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != PPC_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; case PPC_OP_CRX: printf("\t\toperands[%u].type: CRX\n", i); printf("\t\t\toperands[%u].crx.scale: %d\n", i, op->crx.scale); printf("\t\t\toperands[%u].crx.reg: %s\n", i, cs_reg_name(handle, op->crx.reg)); printf("\t\t\toperands[%u].crx.cond: %s\n", i, get_bc_name(op->crx.cond)); break; } } if (ppc->bc != 0) printf("\tBranch code: %u\n", ppc->bc); if (ppc->bh != 0) printf("\tBranch hint: %u\n", ppc->bh); if (ppc->update_cr0) printf("\tUpdate-CR0: True\n"); printf("\n"); } static void test() { #define PPC_CODE "\x43\x20\x0c\x07\x41\x56\xff\x17\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14" #define PPC_CODE2 "\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f" struct platform platforms[] = { { CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, (unsigned char*)PPC_CODE, sizeof(PPC_CODE) - 1, "PPC-64", }, { CS_ARCH_PPC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_QPX), (unsigned char*)PPC_CODE2, sizeof(PPC_CODE2) - 1, "PPC-64 + QPX", }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_skipdata.c010066400017500001750000000106541363403403300204320ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; cs_opt_type opt_type; cs_opt_value opt_value; cs_opt_type opt_skipdata; size_t skipdata; }; static void print_string_hex(unsigned char *str, size_t len) { unsigned char *c; printf("Code: "); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } #ifdef CAPSTONE_HAS_ARM static size_t CAPSTONE_API mycallback(const uint8_t *buffer, size_t buffer_size, size_t offset, void *p) { // always skip 2 bytes when encountering data return 2; } #endif static void test() { #ifdef CAPSTONE_HAS_X86 #define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x00\x91\x92" #endif #define RANDOM_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78" #if defined(CAPSTONE_HAS_X86) cs_opt_skipdata skipdata = { // rename default "data" instruction from ".byte" to "db" "db", }; #endif #ifdef CAPSTONE_HAS_ARM cs_opt_skipdata skipdata_callback = { "db", &mycallback, }; #endif struct platform platforms[] = { #ifdef CAPSTONE_HAS_X86 { CS_ARCH_X86, CS_MODE_32, (unsigned char*)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (Intel syntax) - Skip data", }, { CS_ARCH_X86, CS_MODE_32, (unsigned char*)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (Intel syntax) - Skip data with custom mnemonic", CS_OPT_INVALID, CS_OPT_OFF, CS_OPT_SKIPDATA_SETUP, (size_t) &skipdata, }, #endif #ifdef CAPSTONE_HAS_ARM { CS_ARCH_ARM, CS_MODE_ARM, (unsigned char*)RANDOM_CODE, sizeof(RANDOM_CODE) - 1, "Arm - Skip data", }, { CS_ARCH_ARM, CS_MODE_ARM, (unsigned char*)RANDOM_CODE, sizeof(RANDOM_CODE) - 1, "Arm - Skip data with callback", CS_OPT_INVALID, CS_OPT_OFF, CS_OPT_SKIPDATA_SETUP, (size_t) &skipdata_callback, }, #endif }; csh handle; uint64_t address = 0x1000; cs_insn *insn; cs_err err; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } if (platforms[i].opt_type) cs_option(handle, platforms[i].opt_type, platforms[i].opt_value); // turn on SKIPDATA mode cs_option(handle, CS_OPT_SKIPDATA, CS_OPT_ON); cs_option(handle, platforms[i].opt_skipdata, platforms[i].skipdata); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; print_string_hex(platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); } // print out the next offset, after the last insn printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex(platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); #if 0 #define offsetof(st, m) __builtin_offsetof(st, m) cs_insn insn; printf("size: %lu\n", sizeof(insn)); printf("@id: %lu\n", offsetof(cs_insn, id)); printf("@address: %lu\n", offsetof(cs_insn, address)); printf("@size: %lu\n", offsetof(cs_insn, size)); printf("@bytes: %lu\n", offsetof(cs_insn, bytes)); printf("@mnemonic: %lu\n", offsetof(cs_insn, mnemonic)); printf("@op_str: %lu\n", offsetof(cs_insn, op_str)); printf("@regs_read: %lu\n", offsetof(cs_insn, regs_read)); printf("@regs_read_count: %lu\n", offsetof(cs_insn, regs_read_count)); printf("@regs_write: %lu\n", offsetof(cs_insn, regs_write)); printf("@regs_write_count: %lu\n", offsetof(cs_insn, regs_write_count)); printf("@groups: %lu\n", offsetof(cs_insn, groups)); printf("@groups_count: %lu\n", offsetof(cs_insn, groups_count)); printf("@arch: %lu\n", offsetof(cs_insn, x86)); #endif return 0; } capstone-sys-0.11.0/capstone/tests/test_sparc.c010066400017500001750000000072311363403403300177370ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static csh handle; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(cs_insn *ins) { cs_sparc *sparc; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; sparc = &(ins->detail->sparc); if (sparc->op_count) printf("\top_count: %u\n", sparc->op_count); for (i = 0; i < sparc->op_count; i++) { cs_sparc_op *op = &(sparc->operands[i]); switch((int)op->type) { default: break; case SPARC_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case SPARC_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case SPARC_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; } } if (sparc->cc != 0) printf("\tCode condition: %u\n", sparc->cc); if (sparc->hint != 0) printf("\tHint code: %u\n", sparc->hint); printf("\n"); } static void test() { #define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03" #define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0" struct platform platforms[] = { { CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, (unsigned char*)SPARC_CODE, sizeof(SPARC_CODE) - 1, "Sparc", }, { CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), (unsigned char*)SPARCV9_CODE, sizeof(SPARCV9_CODE) - 1, "SparcV9" }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_systemz.c010066400017500001750000000067521363403403300203540ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static csh handle; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(cs_insn *ins) { cs_sysz *sysz; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; sysz = &(ins->detail->sysz); if (sysz->op_count) printf("\top_count: %u\n", sysz->op_count); for (i = 0; i < sysz->op_count; i++) { cs_sysz_op *op = &(sysz->operands[i]); switch((int)op->type) { default: break; case SYSZ_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case SYSZ_OP_ACREG: printf("\t\toperands[%u].type: ACREG = %u\n", i, op->reg); break; case SYSZ_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case SYSZ_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != SYSZ_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != SYSZ_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.length != 0) printf("\t\t\toperands[%u].mem.length: 0x%" PRIx64 "\n", i, op->mem.length); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); break; } } if (sysz->cc != 0) printf("\tCode condition: %u\n", sysz->cc); printf("\n"); } static void test() { #define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78\xec\x18\x00\x00\xc1\x7f" struct platform platforms[] = { { CS_ARCH_SYSZ, CS_MODE_BIG_ENDIAN, (unsigned char*)SYSZ_CODE, sizeof(SYSZ_CODE) - 1, "SystemZ", }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_tms320c64x.c010066400017500001750000000124451363402546700204020ustar0000000000000000/* Capstone Disassembly Engine */ /* TMS320C64x Backend by Fotis Loukos 2016 */ #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static csh handle; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(cs_insn *ins) { cs_tms320c64x *tms320c64x; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; tms320c64x = &(ins->detail->tms320c64x); if (tms320c64x->op_count) printf("\top_count: %u\n", tms320c64x->op_count); for (i = 0; i < tms320c64x->op_count; i++) { cs_tms320c64x_op *op = &(tms320c64x->operands[i]); switch((int)op->type) { default: break; case TMS320C64X_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case TMS320C64X_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case TMS320C64X_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != TMS320C64X_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); printf("\t\t\toperands[%u].mem.disptype: ", i); if(op->mem.disptype == TMS320C64X_MEM_DISP_INVALID) { printf("Invalid\n"); printf("\t\t\toperands[%u].mem.disp: %u\n", i, op->mem.disp); } if(op->mem.disptype == TMS320C64X_MEM_DISP_CONSTANT) { printf("Constant\n"); printf("\t\t\toperands[%u].mem.disp: %u\n", i, op->mem.disp); } if(op->mem.disptype == TMS320C64X_MEM_DISP_REGISTER) { printf("Register\n"); printf("\t\t\toperands[%u].mem.disp: %s\n", i, cs_reg_name(handle, op->mem.disp)); } printf("\t\t\toperands[%u].mem.unit: %u\n", i, op->mem.unit); printf("\t\t\toperands[%u].mem.direction: ", i); if(op->mem.direction == TMS320C64X_MEM_DIR_INVALID) printf("Invalid\n"); if(op->mem.direction == TMS320C64X_MEM_DIR_FW) printf("Forward\n"); if(op->mem.direction == TMS320C64X_MEM_DIR_BW) printf("Backward\n"); printf("\t\t\toperands[%u].mem.modify: ", i); if(op->mem.modify == TMS320C64X_MEM_MOD_INVALID) printf("Invalid\n"); if(op->mem.modify == TMS320C64X_MEM_MOD_NO) printf("No\n"); if(op->mem.modify == TMS320C64X_MEM_MOD_PRE) printf("Pre\n"); if(op->mem.modify == TMS320C64X_MEM_MOD_POST) printf("Post\n"); printf("\t\t\toperands[%u].mem.scaled: %u\n", i, op->mem.scaled); break; case TMS320C64X_OP_REGPAIR: printf("\t\toperands[%u].type: REGPAIR = %s:%s\n", i, cs_reg_name(handle, op->reg + 1), cs_reg_name(handle, op->reg)); break; } } printf("\tFunctional unit: "); switch(tms320c64x->funit.unit) { case TMS320C64X_FUNIT_D: printf("D%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_L: printf("L%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_M: printf("M%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_S: printf("S%u\n", tms320c64x->funit.side); break; case TMS320C64X_FUNIT_NO: printf("No Functional Unit\n"); break; default: printf("Unknown (Unit %u, Side %u)\n", tms320c64x->funit.unit, tms320c64x->funit.side); break; } if(tms320c64x->funit.crosspath == 1) printf("\tCrosspath: 1\n"); if(tms320c64x->condition.reg != TMS320C64X_REG_INVALID) printf("\tCondition: [%c%s]\n", (tms320c64x->condition.zero == 1) ? '!' : ' ', cs_reg_name(handle, tms320c64x->condition.reg)); printf("\tParallel: %s\n", (tms320c64x->parallel == 1) ? "true" : "false"); printf("\n"); } static void test() { #define TMS320C64X_CODE "\x01\xac\x88\x40\x81\xac\x88\x43\x00\x00\x00\x00\x02\x90\x32\x96\x02\x80\x46\x9e\x05\x3c\x83\xe6\x0b\x0c\x8b\x24" struct platform platforms[] = { { CS_ARCH_TMS320C64X, CS_MODE_BIG_ENDIAN, (unsigned char*)TMS320C64X_CODE, sizeof(TMS320C64X_CODE) - 1, "TMS320C64x", }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); continue; } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%"PRIx64":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_winkernel.cpp010066400017500001750000000111511363403403300211610ustar0000000000000000/* Capstone Disassembly Engine */ /* By Satoshi Tanda , 2016-2019 */ #include #include #include #ifdef __cplusplus extern "C" { #endif #include "../utils.h" // for cs_snprintf #ifdef __cplusplus } #endif EXTERN_C DRIVER_INITIALIZE DriverEntry; #pragma warning(push) #pragma warning(disable : 4005) // 'identifier' : macro redefinition #pragma warning(disable : 4007) // 'main': must be '__cdecl' // Drivers must protect floating point hardware state. See use of float. // Use KeSaveFloatingPointState/KeRestoreFloatingPointState around floating // point operations. Display Drivers should use the corresponding Eng... routines. #pragma warning(disable : 28110) // Suppress this, as it is false positive. // "Import" existing tests into this file. All code is encaptured into unique // namespace so that the same name does not conflict. Beware that those code // is going to be compiled as C++ source file and not C files because this file // is C++. namespace basic { #include "test_basic.c" } // namespace basic namespace detail { #include "test_detail.c" } // namespace detail namespace skipdata { #include "test_skipdata.c" } // namespace skipdata namespace iter { #include "test_iter.c" } // namespace iter namespace customized_mnem_ { #include "test_customized_mnem.c" } // namespace customized_mnem_ namespace arm { #include "test_arm.c" } // namespace arm namespace arm64 { #include "test_arm64.c" } // namespace arm64 namespace mips { #include "test_mips.c" } // namespace mips namespace m68k { #include "test_m68k.c" } // namespace m68k namespace ppc { #include "test_ppc.c" } // namespace ppc namespace sparc { #include "test_sparc.c" } // namespace sparc namespace systemz { #include "test_systemz.c" } // namespace systemz namespace x86 { #include "test_x86.c" } // namespace x86 namespace xcore { #include "test_xcore.c" } // namespace xcore #pragma warning(pop) // Exercises all existing regression tests static void test() { KFLOATING_SAVE float_save; NTSTATUS status; // Any of Capstone APIs cannot be called at IRQL higher than DISPATCH_LEVEL // since our malloc implementation using ExAllocatePoolWithTag() is able to // allocate memory only up to the DISPATCH_LEVEL level. NT_ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL); // On a 32bit driver, KeSaveFloatingPointState() is required before using any // Capstone function because Capstone can access to the MMX/x87 registers and // 32bit Windows requires drivers to use KeSaveFloatingPointState() before and // KeRestoreFloatingPointState() after accessing them. See "Using Floating // Point or MMX in a WDM Driver" on MSDN for more details. status = KeSaveFloatingPointState(&float_save); if (!NT_SUCCESS(status)) { printf("ERROR: Failed to save floating point state!\n"); return; } basic::test(); detail::test(); skipdata::test(); iter::test(); customized_mnem_::test(); arm::test(); arm64::test(); mips::test(); m68k::test(); ppc::test(); sparc::test(); systemz::test(); x86::test(); xcore::test(); // Restores the nonvolatile floating-point context. KeRestoreFloatingPointState(&float_save); } // Functional test for cs_winkernel_vsnprintf() static void cs_winkernel_vsnprintf_test() { char buf[10]; bool ok = true; ok = (ok && cs_snprintf(buf, sizeof(buf), "%s", "") == 0 && strcmp(buf, "") == 0); ok = (ok && cs_snprintf(buf, sizeof(buf), "%s", "0") == 1 && strcmp(buf, "0") == 0); ok = (ok && cs_snprintf(buf, sizeof(buf), "%s", "012345678") == 9 && strcmp(buf, "012345678") == 0); ok = (ok && cs_snprintf(buf, sizeof(buf), "%s", "0123456789") == 10 && strcmp(buf, "012345678") == 0); ok = (ok && cs_snprintf(buf, sizeof(buf), "%s", "01234567890") == 11 && strcmp(buf, "012345678") == 0); ok = (ok && cs_snprintf(buf, sizeof(buf), "%s", "0123456789001234567890") == 22 && strcmp(buf, "012345678") == 0); if (!ok) { printf("ERROR: cs_winkernel_vsnprintf_test() did not produce expected results!\n"); } } // Driver entry point EXTERN_C NTSTATUS DriverEntry(PDRIVER_OBJECT DriverObject, PUNICODE_STRING RegistryPath) { UNREFERENCED_PARAMETER(DriverObject); UNREFERENCED_PARAMETER(RegistryPath); cs_winkernel_vsnprintf_test(); test(); return STATUS_CANCELLED; } // This functions mimics printf() but does not return the same value as printf() // would do. printf() is required to exercise regression tests. _Use_decl_annotations_ int __cdecl printf(const char * const format, ...) { NTSTATUS status; va_list args; va_start(args, format); status = vDbgPrintEx(DPFLTR_DEFAULT_ID, DPFLTR_ERROR_LEVEL, format, args); va_end(args); return NT_SUCCESS(status); } capstone-sys-0.11.0/capstone/tests/test_x86.c010066400017500001750000000274131363403403300172600ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include #include static csh handle; struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; cs_opt_type opt_type; cs_opt_value opt_value; }; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static const char *get_eflag_name(uint64_t flag) { switch(flag) { default: return NULL; case X86_EFLAGS_UNDEFINED_OF: return "UNDEF_OF"; case X86_EFLAGS_UNDEFINED_SF: return "UNDEF_SF"; case X86_EFLAGS_UNDEFINED_ZF: return "UNDEF_ZF"; case X86_EFLAGS_MODIFY_AF: return "MOD_AF"; case X86_EFLAGS_UNDEFINED_PF: return "UNDEF_PF"; case X86_EFLAGS_MODIFY_CF: return "MOD_CF"; case X86_EFLAGS_MODIFY_SF: return "MOD_SF"; case X86_EFLAGS_MODIFY_ZF: return "MOD_ZF"; case X86_EFLAGS_UNDEFINED_AF: return "UNDEF_AF"; case X86_EFLAGS_MODIFY_PF: return "MOD_PF"; case X86_EFLAGS_UNDEFINED_CF: return "UNDEF_CF"; case X86_EFLAGS_MODIFY_OF: return "MOD_OF"; case X86_EFLAGS_RESET_OF: return "RESET_OF"; case X86_EFLAGS_RESET_CF: return "RESET_CF"; case X86_EFLAGS_RESET_DF: return "RESET_DF"; case X86_EFLAGS_RESET_IF: return "RESET_IF"; case X86_EFLAGS_TEST_OF: return "TEST_OF"; case X86_EFLAGS_TEST_SF: return "TEST_SF"; case X86_EFLAGS_TEST_ZF: return "TEST_ZF"; case X86_EFLAGS_TEST_PF: return "TEST_PF"; case X86_EFLAGS_TEST_CF: return "TEST_CF"; case X86_EFLAGS_RESET_SF: return "RESET_SF"; case X86_EFLAGS_RESET_AF: return "RESET_AF"; case X86_EFLAGS_RESET_TF: return "RESET_TF"; case X86_EFLAGS_RESET_NT: return "RESET_NT"; case X86_EFLAGS_PRIOR_OF: return "PRIOR_OF"; case X86_EFLAGS_PRIOR_SF: return "PRIOR_SF"; case X86_EFLAGS_PRIOR_ZF: return "PRIOR_ZF"; case X86_EFLAGS_PRIOR_AF: return "PRIOR_AF"; case X86_EFLAGS_PRIOR_PF: return "PRIOR_PF"; case X86_EFLAGS_PRIOR_CF: return "PRIOR_CF"; case X86_EFLAGS_PRIOR_TF: return "PRIOR_TF"; case X86_EFLAGS_PRIOR_IF: return "PRIOR_IF"; case X86_EFLAGS_PRIOR_DF: return "PRIOR_DF"; case X86_EFLAGS_TEST_NT: return "TEST_NT"; case X86_EFLAGS_TEST_DF: return "TEST_DF"; case X86_EFLAGS_RESET_PF: return "RESET_PF"; case X86_EFLAGS_PRIOR_NT: return "PRIOR_NT"; case X86_EFLAGS_MODIFY_TF: return "MOD_TF"; case X86_EFLAGS_MODIFY_IF: return "MOD_IF"; case X86_EFLAGS_MODIFY_DF: return "MOD_DF"; case X86_EFLAGS_MODIFY_NT: return "MOD_NT"; case X86_EFLAGS_MODIFY_RF: return "MOD_RF"; case X86_EFLAGS_SET_CF: return "SET_CF"; case X86_EFLAGS_SET_DF: return "SET_DF"; case X86_EFLAGS_SET_IF: return "SET_IF"; } } static const char *get_fpu_flag_name(uint64_t flag) { switch (flag) { default: return NULL; case X86_FPU_FLAGS_MODIFY_C0: return "MOD_C0"; case X86_FPU_FLAGS_MODIFY_C1: return "MOD_C1"; case X86_FPU_FLAGS_MODIFY_C2: return "MOD_C2"; case X86_FPU_FLAGS_MODIFY_C3: return "MOD_C3"; case X86_FPU_FLAGS_RESET_C0: return "RESET_C0"; case X86_FPU_FLAGS_RESET_C1: return "RESET_C1"; case X86_FPU_FLAGS_RESET_C2: return "RESET_C2"; case X86_FPU_FLAGS_RESET_C3: return "RESET_C3"; case X86_FPU_FLAGS_SET_C0: return "SET_C0"; case X86_FPU_FLAGS_SET_C1: return "SET_C1"; case X86_FPU_FLAGS_SET_C2: return "SET_C2"; case X86_FPU_FLAGS_SET_C3: return "SET_C3"; case X86_FPU_FLAGS_UNDEFINED_C0: return "UNDEF_C0"; case X86_FPU_FLAGS_UNDEFINED_C1: return "UNDEF_C1"; case X86_FPU_FLAGS_UNDEFINED_C2: return "UNDEF_C2"; case X86_FPU_FLAGS_UNDEFINED_C3: return "UNDEF_C3"; case X86_FPU_FLAGS_TEST_C0: return "TEST_C0"; case X86_FPU_FLAGS_TEST_C1: return "TEST_C1"; case X86_FPU_FLAGS_TEST_C2: return "TEST_C2"; case X86_FPU_FLAGS_TEST_C3: return "TEST_C3"; } } static void print_insn_detail(csh ud, cs_mode mode, cs_insn *ins) { int count, i; cs_x86 *x86; cs_regs regs_read, regs_write; uint8_t regs_read_count, regs_write_count; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; x86 = &(ins->detail->x86); print_string_hex("\tPrefix:", x86->prefix, 4); print_string_hex("\tOpcode:", x86->opcode, 4); printf("\trex: 0x%x\n", x86->rex); printf("\taddr_size: %u\n", x86->addr_size); printf("\tmodrm: 0x%x\n", x86->modrm); if (x86->encoding.modrm_offset != 0) { printf("\tmodrm_offset: 0x%x\n", x86->encoding.modrm_offset); } printf("\tdisp: 0x%" PRIx64 "\n", x86->disp); if (x86->encoding.disp_offset != 0) { printf("\tdisp_offset: 0x%x\n", x86->encoding.disp_offset); } if (x86->encoding.disp_size != 0) { printf("\tdisp_size: 0x%x\n", x86->encoding.disp_size); } // SIB is not available in 16-bit mode if ((mode & CS_MODE_16) == 0) { printf("\tsib: 0x%x\n", x86->sib); if (x86->sib_base != X86_REG_INVALID) printf("\t\tsib_base: %s\n", cs_reg_name(handle, x86->sib_base)); if (x86->sib_index != X86_REG_INVALID) printf("\t\tsib_index: %s\n", cs_reg_name(handle, x86->sib_index)); if (x86->sib_scale != 0) printf("\t\tsib_scale: %d\n", x86->sib_scale); } // XOP code condition if (x86->xop_cc != X86_XOP_CC_INVALID) { printf("\txop_cc: %u\n", x86->xop_cc); } // SSE code condition if (x86->sse_cc != X86_SSE_CC_INVALID) { printf("\tsse_cc: %u\n", x86->sse_cc); } // AVX code condition if (x86->avx_cc != X86_AVX_CC_INVALID) { printf("\tavx_cc: %u\n", x86->avx_cc); } // AVX Suppress All Exception if (x86->avx_sae) { printf("\tavx_sae: %u\n", x86->avx_sae); } // AVX Rounding Mode if (x86->avx_rm != X86_AVX_RM_INVALID) { printf("\tavx_rm: %u\n", x86->avx_rm); } // Print out all immediate operands count = cs_op_count(ud, ins, X86_OP_IMM); if (count) { printf("\timm_count: %u\n", count); for (i = 1; i < count + 1; i++) { int index = cs_op_index(ud, ins, X86_OP_IMM, i); printf("\t\timms[%u]: 0x%" PRIx64 "\n", i, x86->operands[index].imm); if (x86->encoding.imm_offset != 0) { printf("\timm_offset: 0x%x\n", x86->encoding.imm_offset); } if (x86->encoding.imm_size != 0) { printf("\timm_size: 0x%x\n", x86->encoding.imm_size); } } } if (x86->op_count) printf("\top_count: %u\n", x86->op_count); // Print out all operands for (i = 0; i < x86->op_count; i++) { cs_x86_op *op = &(x86->operands[i]); switch((int)op->type) { case X86_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case X86_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm); break; case X86_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.segment != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.segment: REG = %s\n", i, cs_reg_name(handle, op->mem.segment)); if (op->mem.base != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != X86_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.scale != 1) printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); break; default: break; } // AVX broadcast type if (op->avx_bcast != X86_AVX_BCAST_INVALID) printf("\t\toperands[%u].avx_bcast: %u\n", i, op->avx_bcast); // AVX zero opmask {z} if (op->avx_zero_opmask != false) printf("\t\toperands[%u].avx_zero_opmask: TRUE\n", i); printf("\t\toperands[%u].size: %u\n", i, op->size); switch(op->access) { default: break; case CS_AC_READ: printf("\t\toperands[%u].access: READ\n", i); break; case CS_AC_WRITE: printf("\t\toperands[%u].access: WRITE\n", i); break; case CS_AC_READ | CS_AC_WRITE: printf("\t\toperands[%u].access: READ | WRITE\n", i); break; } } // Print out all registers accessed by this instruction (either implicit or explicit) if (!cs_regs_access(ud, ins, regs_read, ®s_read_count, regs_write, ®s_write_count)) { if (regs_read_count) { printf("\tRegisters read:"); for(i = 0; i < regs_read_count; i++) { printf(" %s", cs_reg_name(handle, regs_read[i])); } printf("\n"); } if (regs_write_count) { printf("\tRegisters modified:"); for(i = 0; i < regs_write_count; i++) { printf(" %s", cs_reg_name(handle, regs_write[i])); } printf("\n"); } } if (x86->eflags || x86->fpu_flags) { for(i = 0; i < ins->detail->groups_count; i++) { if (ins->detail->groups[i] == X86_GRP_FPU) { printf("\tFPU_FLAGS:"); for(i = 0; i <= 63; i++) if (x86->fpu_flags & ((uint64_t)1 << i)) { printf(" %s", get_fpu_flag_name((uint64_t)1 << i)); } printf("\n"); break; } } if (i == ins->detail->groups_count) { printf("\tEFLAGS:"); for(i = 0; i <= 63; i++) if (x86->eflags & ((uint64_t)1 << i)) { printf(" %s", get_eflag_name((uint64_t)1 << i)); } printf("\n"); } } printf("\n"); } static void test() { #define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00\xe9\xea\xbe\xad\xde\xff\x25\x23\x01\x00\x00\xe8\xdf\xbe\xad\xde\x74\xff" #define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6\x66\xe9\xb8\x00\x00\x00\x67\xff\xa0\x23\x01\x00\x00\x66\xe8\xcb\x00\x00\x00\x74\xfc" #define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6\xe9\xea\xbe\xad\xde\xff\xa0\x23\x01\x00\x00\xe8\xdf\xbe\xad\xde\x74\xff" struct platform platforms[] = { { CS_ARCH_X86, CS_MODE_16, (unsigned char *)X86_CODE16, sizeof(X86_CODE16) - 1, "X86 16bit (Intel syntax)" }, { CS_ARCH_X86, CS_MODE_32, (unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (AT&T syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT, }, { CS_ARCH_X86, CS_MODE_32, (unsigned char *)X86_CODE32, sizeof(X86_CODE32) - 1, "X86 32 (Intel syntax)" }, { CS_ARCH_X86, CS_MODE_64, (unsigned char *)X86_CODE64, sizeof(X86_CODE64) - 1, "X86 64 (Intel syntax)" }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } if (platforms[i].opt_type) cs_option(handle, platforms[i].opt_type, platforms[i].opt_value); cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(handle, platforms[i].mode, &insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/tests/test_xcore.c010066400017500001750000000063621363403403300177530ustar0000000000000000/* Capstone Disassembler Engine */ /* By Nguyen Anh Quynh , 2013-2019 */ #include #include #include struct platform { cs_arch arch; cs_mode mode; unsigned char *code; size_t size; const char *comment; }; static csh handle; static void print_string_hex(const char *comment, unsigned char *str, size_t len) { unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { printf("0x%02x ", *c & 0xff); } printf("\n"); } static void print_insn_detail(cs_insn *ins) { cs_xcore *xcore; int i; // detail can be NULL on "data" instruction if SKIPDATA option is turned ON if (ins->detail == NULL) return; xcore = &(ins->detail->xcore); if (xcore->op_count) printf("\top_count: %u\n", xcore->op_count); for (i = 0; i < xcore->op_count; i++) { cs_xcore_op *op = &(xcore->operands[i]); switch((int)op->type) { default: break; case XCORE_OP_REG: printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case XCORE_OP_IMM: printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case XCORE_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); if (op->mem.base != XCORE_REG_INVALID) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.index != XCORE_REG_INVALID) printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index)); if (op->mem.disp != 0) printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); if (op->mem.direct != 1) printf("\t\t\toperands[%u].mem.direct: -1\n", i); break; } } printf("\n"); } static void test() { #define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10\x09\xfd\xec\xa7" struct platform platforms[] = { { CS_ARCH_XCORE, CS_MODE_BIG_ENDIAN, (unsigned char*)XCORE_CODE, sizeof(XCORE_CODE) - 1, "XCore", }, }; uint64_t address = 0x1000; cs_insn *insn; int i; size_t count; for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) { cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle); if (err) { printf("Failed on cs_open() with error returned: %u\n", err); abort(); } cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { size_t j; printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); for (j = 0; j < count; j++) { printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(&insn[j]); } printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm() cs_free(insn, count); } else { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("ERROR: Failed to disasm given code!\n"); abort(); } printf("\n"); cs_close(&handle); } } int main() { test(); return 0; } capstone-sys-0.11.0/capstone/utils.c010066400017500001750000000050411363402546700155760ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #if defined(CAPSTONE_HAS_OSXKERNEL) #include #include #else #include #endif #include #include "utils.h" // create a cache for fast id lookup static unsigned short *make_id2insn(const insn_map *insns, unsigned int size) { // NOTE: assume that the max id is always put at the end of insns array unsigned short max_id = insns[size - 1].id; unsigned short i; unsigned short *cache = (unsigned short *)cs_mem_calloc(max_id + 1, sizeof(*cache)); for (i = 1; i < size; i++) cache[insns[i].id] = i; return cache; } // look for @id in @insns, given its size in @max. first time call will update @cache. // return 0 if not found unsigned short insn_find(const insn_map *insns, unsigned int max, unsigned int id, unsigned short **cache) { if (id > insns[max - 1].id) return 0; if (*cache == NULL) *cache = make_id2insn(insns, max); return (*cache)[id]; } int name2id(const name_map* map, int max, const char *name) { int i; for (i = 0; i < max; i++) { if (!strcmp(map[i].name, name)) { return map[i].id; } } // nothing match return -1; } const char *id2name(const name_map* map, int max, const unsigned int id) { int i; for (i = 0; i < max; i++) { if (map[i].id == id) { return map[i].name; } } // nothing match return NULL; } // count number of positive members in a list. // NOTE: list must be guaranteed to end in 0 unsigned int count_positive(const uint16_t *list) { unsigned int c; for (c = 0; list[c] > 0; c++); return c; } // count number of positive members in a list. // NOTE: list must be guaranteed to end in 0 unsigned int count_positive8(const unsigned char *list) { unsigned int c; for (c = 0; list[c] > 0; c++); return c; } char *cs_strdup(const char *str) { size_t len = strlen(str)+ 1; void *new = cs_mem_malloc(len); if (new == NULL) return NULL; return (char *)memmove(new, str, len); } // we need this since Windows doesn't have snprintf() int cs_snprintf(char *buffer, size_t size, const char *fmt, ...) { int ret; va_list ap; va_start(ap, fmt); ret = cs_vsnprintf(buffer, size, fmt, ap); va_end(ap); return ret; } bool arr_exist8(unsigned char *arr, unsigned char max, unsigned int id) { int i; for (i = 0; i < max; i++) { if (arr[i] == id) return true; } return false; } bool arr_exist(uint16_t *arr, unsigned char max, unsigned int id) { int i; for (i = 0; i < max; i++) { if (arr[i] == id) return true; } return false; } capstone-sys-0.11.0/capstone/utils.h010066400017500001750000000041201363402546700156000ustar0000000000000000/* Capstone Disassembly Engine */ /* By Nguyen Anh Quynh , 2013-2015 */ #ifndef CS_UTILS_H #define CS_UTILS_H #if defined(CAPSTONE_HAS_OSXKERNEL) #include #else #include #include "include/capstone/capstone.h" #endif #include "cs_priv.h" // threshold number, so above this number will be printed in hexa mode #define HEX_THRESHOLD 9 // map instruction to its characteristics typedef struct insn_map { unsigned short id; unsigned short mapid; #ifndef CAPSTONE_DIET uint16_t regs_use[12]; // list of implicit registers used by this instruction uint16_t regs_mod[20]; // list of implicit registers modified by this instruction unsigned char groups[8]; // list of group this instruction belong to bool branch; // branch instruction? bool indirect_branch; // indirect branch instruction? #endif } insn_map; // look for @id in @m, given its size in @max. first time call will update @cache. // return 0 if not found unsigned short insn_find(const insn_map *m, unsigned int max, unsigned int id, unsigned short **cache); // map id to string typedef struct name_map { unsigned int id; const char *name; } name_map; // map a name to its ID // return 0 if not found int name2id(const name_map* map, int max, const char *name); // map ID to a name // return NULL if not found const char *id2name(const name_map* map, int max, const unsigned int id); // count number of positive members in a list. // NOTE: list must be guaranteed to end in 0 unsigned int count_positive(const uint16_t *list); unsigned int count_positive8(const unsigned char *list); #define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) #define MATRIX_SIZE(a) (sizeof(a[0])/sizeof(a[0][0])) char *cs_strdup(const char *str); #define MIN(x, y) ((x) < (y) ? (x) : (y)) // we need this since Windows doesn't have snprintf() int cs_snprintf(char *buffer, size_t size, const char *fmt, ...); #define CS_AC_IGNORE (1 << 7) // check if an id is existent in an array bool arr_exist8(unsigned char *arr, unsigned char max, unsigned int id); bool arr_exist(uint16_t *arr, unsigned char max, unsigned int id); #endif capstone-sys-0.11.0/capstone/windows/README010066400017500001750000000000751363402546700166460ustar0000000000000000This directory contains code specific to Windows platforms. capstone-sys-0.11.0/capstone/windows/winkernel_mm.c010066400017500001750000000072451363403403300206140ustar0000000000000000/* Capstone Disassembly Engine */ /* By Satoshi Tanda , 2016-2019 */ #include "winkernel_mm.h" #include #include // A pool tag for memory allocation static const ULONG CS_WINKERNEL_POOL_TAG = 'kwsC'; // A structure to implement realloc() typedef struct _CS_WINKERNEL_MEMBLOCK { size_t size; // A number of bytes allocated __declspec(align(MEMORY_ALLOCATION_ALIGNMENT)) char data[ANYSIZE_ARRAY]; // An address returned to a caller } CS_WINKERNEL_MEMBLOCK; // free() void CAPSTONE_API cs_winkernel_free(void *ptr) { if (ptr) { ExFreePoolWithTag(CONTAINING_RECORD(ptr, CS_WINKERNEL_MEMBLOCK, data), CS_WINKERNEL_POOL_TAG); } } // malloc() void * CAPSTONE_API cs_winkernel_malloc(size_t size) { // Disallow zero length allocation because they waste pool header space and, // in many cases, indicate a potential validation issue in the calling code. NT_ASSERT(size); // FP; a use of NonPagedPool is required for Windows 7 support size_t number_of_bytes = 0; CS_WINKERNEL_MEMBLOCK *block = NULL; // A specially crafted size value can trigger the overflow. // If the sum in a value that overflows or underflows the capacity of the type, // the function returns NULL. if (!NT_SUCCESS(RtlSizeTAdd(size, FIELD_OFFSET(CS_WINKERNEL_MEMBLOCK, data), &number_of_bytes))) { return NULL; } #pragma prefast(suppress : 30030) // Allocating executable POOL_TYPE memory block = (CS_WINKERNEL_MEMBLOCK *)ExAllocatePoolWithTag( NonPagedPool, number_of_bytes, CS_WINKERNEL_POOL_TAG); if (!block) { return NULL; } block->size = size; return block->data; } // calloc() void * CAPSTONE_API cs_winkernel_calloc(size_t n, size_t size) { size_t total = n * size; void *new_ptr = cs_winkernel_malloc(total); if (!new_ptr) { return NULL; } return RtlFillMemory(new_ptr, total, 0); } // realloc() void * CAPSTONE_API cs_winkernel_realloc(void *ptr, size_t size) { void *new_ptr = NULL; size_t current_size = 0; size_t smaller_size = 0; if (!ptr) { return cs_winkernel_malloc(size); } new_ptr = cs_winkernel_malloc(size); if (!new_ptr) { return NULL; } current_size = CONTAINING_RECORD(ptr, CS_WINKERNEL_MEMBLOCK, data)->size; smaller_size = (current_size < size) ? current_size : size; RtlCopyMemory(new_ptr, ptr, smaller_size); cs_winkernel_free(ptr); return new_ptr; } // vsnprintf(). _vsnprintf() is available for drivers, but it differs from // vsnprintf() in a return value and when a null-terminator is set. // cs_winkernel_vsnprintf() takes care of those differences. #pragma warning(push) // Banned API Usage : _vsnprintf is a Banned API as listed in dontuse.h for // security purposes. #pragma warning(disable : 28719) int CAPSTONE_API cs_winkernel_vsnprintf(char *buffer, size_t count, const char *format, va_list argptr) { int result = _vsnprintf(buffer, count, format, argptr); // _vsnprintf() returns -1 when a string is truncated, and returns "count" // when an entire string is stored but without '\0' at the end of "buffer". // In both cases, null-terminator needs to be added manually. if (result == -1 || (size_t)result == count) { buffer[count - 1] = '\0'; } if (result == -1) { // In case when -1 is returned, the function has to get and return a number // of characters that would have been written. This attempts so by retrying // the same conversion with temp buffer that is most likely big enough to // complete formatting and get a number of characters that would have been // written. char* tmp = cs_winkernel_malloc(0x1000); if (!tmp) { return result; } result = _vsnprintf(tmp, 0x1000, format, argptr); NT_ASSERT(result != -1); cs_winkernel_free(tmp); } return result; } #pragma warning(pop) capstone-sys-0.11.0/capstone/windows/winkernel_mm.h010066400017500001750000000011671363402546700206310ustar0000000000000000/* Capstone Disassembly Engine */ /* By Satoshi Tanda , 2016 */ #ifndef CS_WINDOWS_WINKERNEL_MM_H #define CS_WINDOWS_WINKERNEL_MM_H #ifdef __cplusplus extern "C" { #endif #include void CAPSTONE_API cs_winkernel_free(void *ptr); void * CAPSTONE_API cs_winkernel_malloc(size_t size); void * CAPSTONE_API cs_winkernel_calloc(size_t n, size_t size); void * CAPSTONE_API cs_winkernel_realloc(void *ptr, size_t size); int CAPSTONE_API cs_winkernel_vsnprintf(char *buffer, size_t count, const char *format, va_list argptr); #ifdef __cplusplus } #endif #endif // CS_WINDOWS_WINKERNEL_MM_H capstone-sys-0.11.0/capstone/windowsce/.gitignore010066400017500001750000000001661363402546700202670ustar0000000000000000# Object files *.obj # Libraries *.lib # Shared objects (inc. Windows DLLs) *.dll # VisualStudio *.exp *.map *.pdb capstone-sys-0.11.0/capstone/windowsce/COMPILE.md010066400017500001750000000137051363402546700177140ustar0000000000000000This documentation explains how to compile Capstone for: - Windows CE 7, a.k.a, [Windows Embedded Compact 7](https://www.microsoft.com/windowsembedded/en-us/windows-embedded-compact-7.aspx), on [ARMv7](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html). - Windows CE 8, a.k.a, [Windows Embedded Compact 2013](https://www.microsoft.com/windowsembedded/en-us/windows-embedded-compact-2013.aspx), on [ARMv7](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html). To build Capstone for a different platform, please refer to `COMPILE.TXT`. # Prerequisites We support the following scenario regarding the build machine: - Build running on Microsoft Windows. - The C Software Develepment Kit of the target Windows CE **device** installed. - Only for Windows CE 7: - C compiler toolchain installed, targetting **Windows Embedded Compact 7** on **ARMv7**. We recommend the toolchain provided with [Windows Embedded Compact 7 toolkit](https://msdn.microsoft.com/en-us/library/jj200349%28v=winembedded.70%29.aspx), as the toolchain originally provided with **Visual Studio 2008** is relatively old. Before building Capstone for Windows CE 7 (respectively, Windows CE 8), the build script `windowsce/make_windowsce7-armv7.bat` (respectively, `windowsce/make_windowsce8-armv7.bat`) needs to be modified. The variables specified in the rest of this section are set in this script file. # Toolchain specification The following information need to be specified in the build script in order to perform the build: - `set WINCE_TOOLCHAIN_ROOT=` is the path of the root directory of the Windows CE toolchain. To build for Windows CE 7, this should be set to the Windows Embedded Compact 7 toolchain. To build for Windows CE 8, this should be set to the device toolchain. Examples: - For Windows CE 7: ```bat set WINCE_TOOLCHAIN_ROOT=C:\WINCE700\sdk ``` - For Windows CE 8: ```bat set WINCE_TOOLCHAIN_ROOT=C:\Windows_CE_Tools\SDKs\SDK_HW90270\Sdk ``` - `set TOOLCHAIN=` is a semicolon-separated list of the paths of the directories containing the binaries of the Windows CE toolchain. For example: ```bat set TOOLCHAIN=%WINCE_TOOLCHAIN_ROOT%\Bin\i386\Arm;%WINCE_TOOLCHAIN_ROOT%\Bin\i386 ``` - `set INCLUDE=` is a semicolon-separated list of the paths of the directories containing the C header files of the Windows CE device SDK. To build for Windows CE 7, this should also include the directories containing the C header files of the Windows Embedded Compact 7 toolchain. Examples: - For Windows CE 7: ```bat set INCLUDE=C:\Program Files (x86)\Windows CE Tools\SDKs\Symbol MC3200c70 Windows CE 7.0 PSDK\Include\Armv4i;C:\WINCE700\public\common\sdk\inc ``` - For Windows CE 8: ```bat set INCLUDE=%WINCE_TOOLCHAIN_ROOT%\Inc;%WINCE_TOOLCHAIN_ROOT%\crt\Include ``` - `set LIBPATH=` is a semicolon-separated list of the paths of the directories containing the library (i.e., `.LIB`) files of the Windows CE 7 device SDK. Examples: - For Windows CE 7: ```bat set LIBPATH=C:\Program Files (x86)\Windows CE Tools\SDKs\Symbol MC3200c70 Windows CE 7.0 PSDK\Lib\ARMv4I ``` - For Windows CE 8: ```bat set LIBPATH=%WINCE_TOOLCHAIN_ROOT%\Lib\ARMV7\retail;%WINCE_TOOLCHAIN_ROOT%\Crt\Lib\ARM ``` - `set LIBS=` is a space-separated list of linker directives controlling library search. Examples: - For Windows CE 7: ```bat set LIBS=-nodefaultlib:oldnames.lib -nodefaultlib:libcmtd.lib -nodefaultlib:libcmt.lib coredll.lib corelibc.lib ``` - For Windows CE 8: ```bat set LIBS=coredll.lib ``` # Capstone binary format By default, the build script produces a **dynamic link library** (i.e., `.DLL`). In order to produce a **static library** (i.e., `.LIB`) instead, the `SHARED` variable needs to be set to `0`, i.e.: ```bat set SHARED=0 ``` # Architectures supported at runtime Capstone supports the following architectures: ARM, ARM64 (AArch64), M68K, MIPS, PowerPC, Sparc, SystemZ, x86 and XCore. However, Capstone can be configured in order to select which architectures need to be supported **at runtime**. This is controlled via the variable `DISASM_ARCH_LIST`, which is a space-separated list that is a combination of the following names: - `ARM` - `ARM64` - `M68K` - `MIPS` - `POWERPC` - `SPARC` - `SYSZ` - `X86` - `XCORE`. By default, `DISASM_ARCH_LIST` includes support for **all** architectures supported by Capstone. For example: ```bat set DISASM_ARCH_LIST=ARM ARM64 X86 ``` will produce a Capstone binary that supports the following architectures: ARM, ARM64 and x86. ## Features customization Capstone has a list of features that can be controlled when needed. Each feature is controlled through setting a variable from the following list: - In order to produce a smaller binary that provides a **subset** of the features of Capstone, but still supports all the selected architectures, please specify the following: ```bat set DIET_MODE=1 ``` By default, this variable is set to `0`. - By default, Capstone uses the default system-provided **dynamic memory management** functions (e.g., `malloc()`, `realloc()`, `free()`) for its internal memory management. However, Capstone can instead be configured to call **custom** memory management functions provided by client applications. In order to enable this behavior, set the following: ```bat set USE_SYS_DYN_MEM=0 ``` - In order to produce a **smaller** Capstone binary, support for the `x86` architecture can be more **limited**. In order to do so, set the following: ```bat set X86_REDUCE=1 ``` By default, this is set to `0`. - If the **AT&T** disassembly style of the `x86` architecture is never needed at runtime, then disabling support for it can produce a **smaller** Capstone binary. To do this, please set the following: ```bat set X86_ATT_DISABLE=1 ``` By default, this is set to `0`. Please refer to `docs/README` for more details on these features. capstone-sys-0.11.0/capstone/windowsce/make_windowsce7-armv7.bat010066400017500001750000000154771363402546700231220ustar0000000000000000@echo off rem *************************************************************************** rem * VARIABLES TO SET FOR BUILDING * rem *************************************************************************** set WINCE_TOOLCHAIN_ROOT=C:\WINCE700\sdk set TOOLCHAIN=%WINCE_TOOLCHAIN_ROOT%\Bin\i386\Arm;%WINCE_TOOLCHAIN_ROOT%\Bin\i386 set INCLUDE=C:\Program Files (x86)\Windows CE Tools\SDKs\Symbol MC3200c70 Windows CE 7.0 PSDK\Include\Armv4i;C:\WINCE700\public\common\sdk\inc set LIBPATH=C:\Program Files (x86)\Windows CE Tools\SDKs\Symbol MC3200c70 Windows CE 7.0 PSDK\Lib\ARMv4I set LIBS=-nodefaultlib:oldnames.lib -nodefaultlib:libcmtd.lib -nodefaultlib:libcmt.lib coredll.lib corelibc.lib rem *************************************************************************** rem * CAPSTONE CONFIGURATION * rem *************************************************************************** set SHARED=1 set DIET_MODE=0 set USE_SYS_DYN_MEM=1 set X86_REDUCE=0 set X86_ATT_DISABLE=0 set DISASM_ARCH_LIST=ARM ARM64 M68K MIPS POWERPC SPARC SYSZ X86 XCORE rem *************************************************************************** rem * SANITY CHECKS * rem *************************************************************************** setlocal ENABLEDELAYEDEXPANSION if "%WINCE_TOOLCHAIN_ROOT%"=="" goto check_dir_exist_WINCE_TOOLCHAIN_ROOT if not exist "%WINCE_TOOLCHAIN_ROOT%" goto check_dir_exist_WINCE_TOOLCHAIN_ROOT if "%TOOLCHAIN%"=="" goto check_dir_exist_TOOLCHAIN set CC= set LD= set AR= for /f "tokens=1-8 delims=;" %%a in ("%TOOLCHAIN%") do ( for %%i in (%%a %%b %%c %%d %%e %%f %%g %%h) do ( if not "%%i"=="" ( if not exist "%%i" goto check_dir_exist_TOOLCHAIN if "%CC%"=="" if exist "%%i\cl.exe" set CC=%%i\cl.exe if "%LD%"=="" if exist "%%i\link.exe" set LD=%%i\link.exe if "%AR%"=="" if exist "%%i\lib.exe" set AR=%%i\lib.exe ) ) ) if "%CC%"=="" goto check_dir_exist_CC_LD_AR if "%LD%"=="" goto check_dir_exist_CC_LD_AR if "%AR%"=="" goto check_dir_exist_CC_LD_AR if "%INCLUDE%"=="" goto check_dir_exist_INCLUDE set WINDOWS_H= set INCLUDE_SC=%INCLUDE% set INCLUDE= for /f "tokens=1-8 delims=;" %%a in ("%INCLUDE_SC%") do ( for %%i in ("%%a" "%%b" "%%c" "%%d" "%%e" "%%f" "%%g" "%%h") do ( if not %%i=="" ( set INCLUDE=!INCLUDE! -I %%i ) ) ) if "%LIBPATH%"=="" goto check_dir_exist_LIBPATH set LIBPATH_SC=%LIBPATH% set LIBPATH= for /f "tokens=1-8 delims=;" %%a in ("%LIBPATH_SC%") do ( for %%i in ("%%a" "%%b" "%%c" "%%d" "%%e" "%%f" "%%g" "%%h") do ( if not %%i=="" ( set LIBPATH=!LIBPATH! -libpath:%%i ) ) ) rem *************************************************************************** rem * COMPILATION OPTIONS * rem *************************************************************************** set OS=windowsce set OS_VERSION=7.0 set OS_VERSION_NUMBER=0x700 set LIBARCH=arm set MACH=THUMB for /f "delims=" %%i in ('cd') do set THIS_DIR=%%i set SOURCES_ROOT=%THIS_DIR%\.. set TARGET_DIR=%THIS_DIR%\bin\%OS%_%OS_VERSION%_%LIBARCH% for /f "tokens=3" %%i in ('findstr /c:"#define CS_API_MAJOR" "%SOURCES_ROOT%\include\capstone\capstone.h"') do set CS_API_MAJOR=%%i for /f "tokens=3" %%i in ('findstr /c:"#define CS_API_MINOR" "%SOURCES_ROOT%\include\capstone\capstone.h"') do set CS_API_MINOR=%%i set TARGET_VERSION=%CS_API_MAJOR%.%CS_API_MINOR% set TAREGET_NAME=capstone-%TARGET_VERSION% set CPPFLAGS=-D LIBARCH_%LIBARCH% -D LIBARCH=L\"%LIBARCH%\" set CPPFLAGS=%CPPFLAGS% -D _CRT_SECURE_NO_DEPRECATE -D _WINDOWS -D WINVER=%OS_VERSION_NUMBER% -D UNDER_CE=%OS_VERSION_NUMBER% -D _WIN32_WCE=%OS_VERSION_NUMBER% -D WINCE -D _UNICODE -D UNICODE -D STANDARDSHELL_UI_MODEL -D _USE_MATH_DEFINES -D ARM -D _ARM -D _ARM_ -D __ARM_ARCH_7__ -D __ARM_ARCH_7A__ -D __VFP_FP__=1 for %%a in (%DISASM_ARCH_LIST%) do set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_HAS_%%a if %SHARED%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_STATIC -D LIB_EXT=L\".lib\" ) else ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_SHARED -D LIB_EXT=L\".dll\" ) if not %USE_SYS_DYN_MEM%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_USE_SYS_DYN_MEM ) if not %DIET_MODE%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_DIET ) if not %X86_REDUCE%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_X86_REDUCE ) if not %X86_ATT_DISABLE%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_X86_ATT_DISABLE ) set INCLUDE=-I %SOURCES_ROOT%\include -I %SOURCES_ROOT% %INCLUDE% set CFLAGS=%CPPFLAGS% %INCLUDE% -nologo -Zi -MT -Oi -GS -GF -QRarch7 -arch:VFPv3-D32 -QRfpe- -fp:fast -Oy- -W3 -WX set LDFLAGS=-nologo -debug -incremental:no -manifest:no -version:%TARGET_VERSION% -machine:%MACH% -subsystem:WINDOWSCE,%OS_VERSION% %LIBPATH% %LIBS% set ARFLAGS=-nologo -machine:%MACH% -subsystem:WINDOWSCE,%OS_VERSION% %LIBPATH% %LIBS% set SOURCES= for %%f in (%SOURCES_ROOT%\*.c) do set SOURCES=!SOURCES! %%f for /d %%a in (%SOURCES_ROOT%\arch\*) do for %%f in (%%a\*.c) do set SOURCES=!SOURCES! %%f rem *************************************************************************** rem * COMPILATION COMMANDS * rem *************************************************************************** rd /q /s "%TARGET_DIR%" md "%TARGET_DIR%" set PATH=%TOOLCHAIN%;%PATH% rem %CC% -c %CFLAGS% -D DEBUG -D _DEBUG -Od -Fo"%TARGET_DIR%\\" -Fd"%TARGET_DIR%\%TAREGET_NAME%.pdb" %SOURCES% %CC% -c %CFLAGS% -D NDEBUG -Ox -Fo"%TARGET_DIR%\\" -Fd"%TARGET_DIR%\%TAREGET_NAME%.pdb" %SOURCES% if errorlevel 1 goto compilation_failed if %SHARED%==0 ( %AR% -out:%TARGET_DIR%\%TAREGET_NAME%.lib %ARFLAGS% %TARGET_DIR%\*.obj ) else ( %LD% -dll -out:%TARGET_DIR%\%TAREGET_NAME%.dll -map:"%TARGET_DIR%\%TAREGET_NAME%.map" -pdb:"%TARGET_DIR%\%TAREGET_NAME%.pdb" %LDFLAGS% -opt:REF -opt:ICF %TARGET_DIR%\*.obj ) endlocal goto done rem *************************************************************************** rem * ERROR REPORTING * rem *************************************************************************** :check_dir_exist_WINCE_TOOLCHAIN_ROOT echo ERROR: WINCE_TOOLCHAIN_ROOT does not specify an existing directory. goto done :check_dir_exist_TOOLCHAIN echo ERROR: TOOLCHAIN does not specify an existing directory. goto done :check_dir_exist_CC_LD_AR echo ERROR: TOOLCHAIN does not specify a valid toolchain directory. goto done :check_dir_exist_INCLUDE echo ERROR: INCLUDE does not specify an existing directory. goto done :check_dir_exist_LIBPATH echo ERROR: LIBPATH does not specify an existing directory. goto done :compilation_failed echo ERROR: Compilation failed. goto done :done pause capstone-sys-0.11.0/capstone/windowsce/make_windowsce8-armv7.bat010066400017500001750000000152031363402546700231060ustar0000000000000000@echo off rem *************************************************************************** rem * VARIABLES TO SET FOR BUILDING * rem *************************************************************************** set WINCE_TOOLCHAIN_ROOT=C:\Windows_CE_Tools\SDKs\SDK_HW90270\Sdk set TOOLCHAIN=%WINCE_TOOLCHAIN_ROOT%\Bin\i386\Arm;%WINCE_TOOLCHAIN_ROOT%\Bin\i386 set INCLUDE=%WINCE_TOOLCHAIN_ROOT%\Inc;%WINCE_TOOLCHAIN_ROOT%\crt\Include set LIBPATH=%WINCE_TOOLCHAIN_ROOT%\Lib\ARMV7\retail;%WINCE_TOOLCHAIN_ROOT%\Crt\Lib\ARM set LIBS=coredll.lib rem *************************************************************************** rem * CAPSTONE CONFIGURATION * rem *************************************************************************** set SHARED=1 set DIET_MODE=0 set USE_SYS_DYN_MEM=1 set X86_REDUCE=0 set X86_ATT_DISABLE=0 set DISASM_ARCH_LIST=ARM ARM64 M68K MIPS POWERPC SPARC SYSZ X86 XCORE rem *************************************************************************** rem * SANITY CHECKS * rem *************************************************************************** setlocal ENABLEDELAYEDEXPANSION if "%WINCE_TOOLCHAIN_ROOT%"=="" goto check_dir_exist_WINCE_TOOLCHAIN_ROOT if not exist "%WINCE_TOOLCHAIN_ROOT%" goto check_dir_exist_WINCE_TOOLCHAIN_ROOT if "%TOOLCHAIN%"=="" goto check_dir_exist_TOOLCHAIN set CC= set LD= set AR= for /f "tokens=1-8 delims=;" %%a in ("%TOOLCHAIN%") do ( for %%i in (%%a %%b %%c %%d %%e %%f %%g %%h) do ( if not "%%i"=="" ( if not exist "%%i" goto check_dir_exist_TOOLCHAIN if "%CC%"=="" if exist "%%i\cl.exe" set CC=%%i\cl.exe if "%LD%"=="" if exist "%%i\link.exe" set LD=%%i\link.exe if "%AR%"=="" if exist "%%i\lib.exe" set AR=%%i\lib.exe ) ) ) if "%CC%"=="" goto check_dir_exist_CC_LD_AR if "%LD%"=="" goto check_dir_exist_CC_LD_AR if "%AR%"=="" goto check_dir_exist_CC_LD_AR if "%INCLUDE%"=="" goto check_dir_exist_INCLUDE set WINDOWS_H= set INCLUDE_SC=%INCLUDE% set INCLUDE= for /f "tokens=1-8 delims=;" %%a in ("%INCLUDE_SC%") do ( for %%i in ("%%a" "%%b" "%%c" "%%d" "%%e" "%%f" "%%g" "%%h") do ( if not %%i=="" ( set INCLUDE=!INCLUDE! -I %%i ) ) ) if "%LIBPATH%"=="" goto check_dir_exist_LIBPATH set LIBPATH_SC=%LIBPATH% set LIBPATH= for /f "tokens=1-8 delims=;" %%a in ("%LIBPATH_SC%") do ( for %%i in ("%%a" "%%b" "%%c" "%%d" "%%e" "%%f" "%%g" "%%h") do ( if not %%i=="" ( set LIBPATH=!LIBPATH! -libpath:%%i ) ) ) rem *************************************************************************** rem * COMPILATION OPTIONS * rem *************************************************************************** set OS=windowsce set OS_VERSION=8.0 set OS_VERSION_NUMBER=0x800 set LIBARCH=arm set MACH=ARM for /f "delims=" %%i in ('cd') do set THIS_DIR=%%i set SOURCES_ROOT=%THIS_DIR%\.. set TARGET_DIR=%THIS_DIR%\bin\%OS%_%OS_VERSION%_%LIBARCH% for /f "tokens=3" %%i in ('findstr /c:"#define CS_API_MAJOR" "%SOURCES_ROOT%\include\capstone\capstone.h"') do set CS_API_MAJOR=%%i for /f "tokens=3" %%i in ('findstr /c:"#define CS_API_MINOR" "%SOURCES_ROOT%\include\capstone\capstone.h"') do set CS_API_MINOR=%%i set TARGET_VERSION=%CS_API_MAJOR%.%CS_API_MINOR% set TAREGET_NAME=capstone-%TARGET_VERSION% set CPPFLAGS=-D LIBARCH_%LIBARCH% -D LIBARCH=L\"%LIBARCH%\" set CPPFLAGS=%CPPFLAGS% -D _CRT_SECURE_NO_DEPRECATE -D _WINDOWS -D WINVER=%OS_VERSION_NUMBER% -D UNDER_CE=%OS_VERSION_NUMBER% -D _WIN32_WCE=%OS_VERSION_NUMBER% -D WINCE -D _UNICODE -D UNICODE -D STANDARDSHELL_UI_MODEL -D _USE_MATH_DEFINES -D ARM -D _ARM -D _ARM_ -D __ARM_ARCH_7__ -D __ARM_ARCH_7A__ -D __VFP_FP__=1 for %%a in (%DISASM_ARCH_LIST%) do set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_HAS_%%a if %SHARED%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_STATIC -D LIB_EXT=L\".lib\" ) else ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_SHARED -D LIB_EXT=L\".dll\" ) if not %USE_SYS_DYN_MEM%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_USE_SYS_DYN_MEM ) if not %DIET_MODE%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_DIET ) if not %X86_REDUCE%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_X86_REDUCE ) if not %X86_ATT_DISABLE%==0 ( set CPPFLAGS=!CPPFLAGS! -D CAPSTONE_X86_ATT_DISABLE ) set INCLUDE=-I %SOURCES_ROOT%\include -I %SOURCES_ROOT% %INCLUDE% set CFLAGS=%CPPFLAGS% %INCLUDE% -nologo -MP -Zi -MT -Oi -GS -fp:fast -Oy- -W3 -WX set LDFLAGS=-nologo -debug -incremental:no -manifest:no -version:%TARGET_VERSION% -machine:%MACH% -subsystem:WINDOWSCE,%OS_VERSION% %LIBPATH% %LIBS% set ARFLAGS=-nologo -machine:%MACH% -subsystem:WINDOWSCE,%OS_VERSION% %LIBPATH% %LIBS% set SOURCES= for %%f in (%SOURCES_ROOT%\*.c) do set SOURCES=!SOURCES! %%f for /d %%a in (%SOURCES_ROOT%\arch\*) do for %%f in (%%a\*.c) do set SOURCES=!SOURCES! %%f rem *************************************************************************** rem * COMPILATION COMMANDS * rem *************************************************************************** rd /q /s "%TARGET_DIR%" md "%TARGET_DIR%" set PATH=%TOOLCHAIN%;%PATH% rem %CC% -c %CFLAGS% -D DEBUG -D _DEBUG -Od -Fo"%TARGET_DIR%\\" -Fd"%TARGET_DIR%\%TAREGET_NAME%.pdb" %SOURCES% %CC% -c %CFLAGS% -D NDEBUG -Ox -Fo"%TARGET_DIR%\\" -Fd"%TARGET_DIR%\%TAREGET_NAME%.pdb" %SOURCES% if errorlevel 1 goto compilation_failed if %SHARED%==0 ( %AR% -out:%TARGET_DIR%\%TAREGET_NAME%.lib %ARFLAGS% %TARGET_DIR%\*.obj ) else ( %LD% -dll -out:%TARGET_DIR%\%TAREGET_NAME%.dll -map:"%TARGET_DIR%\%TAREGET_NAME%.map" -pdb:"%TARGET_DIR%\%TAREGET_NAME%.pdb" %LDFLAGS% -opt:REF -opt:ICF %TARGET_DIR%\*.obj ) endlocal goto done rem *************************************************************************** rem * ERROR REPORTING * rem *************************************************************************** :check_dir_exist_WINCE_TOOLCHAIN_ROOT echo ERROR: WINCE_TOOLCHAIN_ROOT does not specify an existing directory. goto done :check_dir_exist_TOOLCHAIN echo ERROR: TOOLCHAIN does not specify an existing directory. goto done :check_dir_exist_CC_LD_AR echo ERROR: TOOLCHAIN does not specify a valid toolchain directory. goto done :check_dir_exist_INCLUDE echo ERROR: INCLUDE does not specify an existing directory. goto done :check_dir_exist_LIBPATH echo ERROR: LIBPATH does not specify an existing directory. goto done :compilation_failed echo ERROR: Compilation failed. goto done :done pause capstone-sys-0.11.0/common.rs010066400017500001750000000035011363402464200143050ustar0000000000000000// Contains code common to the build script and main crate // // Needs to be included with include! macro #[derive(Clone, Copy, PartialEq, Eq, Debug, Hash)] /// Information specific to architecture pub struct CapstoneArchInfo<'a> { /// name of C header header_name: &'a str, /// name used within capstone C library cs_name: &'a str, } impl<'a> CapstoneArchInfo<'a> { /// Get the name of the C header pub fn header_name(&self) -> &str { self.header_name } /// Get the arch name used in Capstone types pub fn cs_name(&self) -> &str { self.cs_name } } pub static ARCH_INCLUDES: &'static [CapstoneArchInfo<'static>] = &[ CapstoneArchInfo { header_name: "arm.h", cs_name: "arm", }, CapstoneArchInfo { header_name: "arm64.h", cs_name: "arm64", }, CapstoneArchInfo { header_name: "evm.h", cs_name: "evm", }, CapstoneArchInfo { header_name: "m680x.h", cs_name: "m680x", }, CapstoneArchInfo { header_name: "m68k.h", cs_name: "m68k", }, CapstoneArchInfo { header_name: "mips.h", cs_name: "mips", }, CapstoneArchInfo { header_name: "ppc.h", cs_name: "ppc", }, CapstoneArchInfo { header_name: "sparc.h", cs_name: "sparc", }, CapstoneArchInfo { header_name: "systemz.h", cs_name: "sysz", }, CapstoneArchInfo { header_name: "tms320c64x.h", cs_name: "tms320c64x", }, CapstoneArchInfo { header_name: "x86.h", cs_name: "x86", }, CapstoneArchInfo { header_name: "xcore.h", cs_name: "xcore", }, ]; pub static BINDINGS_FILE: &'static str = "capstone.rs"; pub static BINDINGS_IMPL_FILE: &'static str = "capstone_archs_impl.rs"; capstone-sys-0.11.0/pre_generated/capstone.rs010066400017500001750000012573241363403424600174550ustar0000000000000000/* automatically generated by rust-bindgen */ pub type va_list = __builtin_va_list; pub type __int8_t = libc::c_schar; pub type __uint8_t = libc::c_uchar; pub type __int16_t = libc::c_short; pub type __uint16_t = libc::c_ushort; pub type __int32_t = libc::c_int; pub type __uint32_t = libc::c_uint; pub type __int64_t = libc::c_long; pub type __uint64_t = libc::c_ulong; pub type csh = usize; #[repr(u32)] #[doc = " Architecture type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum cs_arch { #[doc = "< ARM architecture (including Thumb, Thumb-2)"] CS_ARCH_ARM = 0, #[doc = "< ARM-64, also called AArch64"] CS_ARCH_ARM64 = 1, #[doc = "< Mips architecture"] CS_ARCH_MIPS = 2, #[doc = "< X86 architecture (including x86 & x86-64)"] CS_ARCH_X86 = 3, #[doc = "< PowerPC architecture"] CS_ARCH_PPC = 4, #[doc = "< Sparc architecture"] CS_ARCH_SPARC = 5, #[doc = "< SystemZ architecture"] CS_ARCH_SYSZ = 6, #[doc = "< XCore architecture"] CS_ARCH_XCORE = 7, #[doc = "< 68K architecture"] CS_ARCH_M68K = 8, #[doc = "< TMS320C64x architecture"] CS_ARCH_TMS320C64X = 9, #[doc = "< 680X architecture"] CS_ARCH_M680X = 10, #[doc = "< Ethereum architecture"] CS_ARCH_EVM = 11, CS_ARCH_MAX = 12, CS_ARCH_ALL = 65535, } #[doc = "< little-endian mode (default mode)"] pub const CS_MODE_LITTLE_ENDIAN: cs_mode = cs_mode(0); #[doc = "< 32-bit ARM"] pub const CS_MODE_ARM: cs_mode = cs_mode(0); #[doc = "< 16-bit mode (X86)"] pub const CS_MODE_16: cs_mode = cs_mode(2); #[doc = "< 32-bit mode (X86)"] pub const CS_MODE_32: cs_mode = cs_mode(4); #[doc = "< 64-bit mode (X86, PPC)"] pub const CS_MODE_64: cs_mode = cs_mode(8); #[doc = "< ARM's Thumb mode, including Thumb-2"] pub const CS_MODE_THUMB: cs_mode = cs_mode(16); #[doc = "< ARM's Cortex-M series"] pub const CS_MODE_MCLASS: cs_mode = cs_mode(32); #[doc = "< ARMv8 A32 encodings for ARM"] pub const CS_MODE_V8: cs_mode = cs_mode(64); #[doc = "< MicroMips mode (MIPS)"] pub const CS_MODE_MICRO: cs_mode = cs_mode(16); #[doc = "< Mips III ISA"] pub const CS_MODE_MIPS3: cs_mode = cs_mode(32); #[doc = "< Mips32r6 ISA"] pub const CS_MODE_MIPS32R6: cs_mode = cs_mode(64); #[doc = "< Mips II ISA"] pub const CS_MODE_MIPS2: cs_mode = cs_mode(128); #[doc = "< SparcV9 mode (Sparc)"] pub const CS_MODE_V9: cs_mode = cs_mode(16); #[doc = "< Quad Processing eXtensions mode (PPC)"] pub const CS_MODE_QPX: cs_mode = cs_mode(16); #[doc = "< M68K 68000 mode"] pub const CS_MODE_M68K_000: cs_mode = cs_mode(2); #[doc = "< M68K 68010 mode"] pub const CS_MODE_M68K_010: cs_mode = cs_mode(4); #[doc = "< M68K 68020 mode"] pub const CS_MODE_M68K_020: cs_mode = cs_mode(8); #[doc = "< M68K 68030 mode"] pub const CS_MODE_M68K_030: cs_mode = cs_mode(16); #[doc = "< M68K 68040 mode"] pub const CS_MODE_M68K_040: cs_mode = cs_mode(32); #[doc = "< M68K 68060 mode"] pub const CS_MODE_M68K_060: cs_mode = cs_mode(64); #[doc = "< big-endian mode"] pub const CS_MODE_BIG_ENDIAN: cs_mode = cs_mode(-2147483648); #[doc = "< Mips32 ISA (Mips)"] pub const CS_MODE_MIPS32: cs_mode = cs_mode(4); #[doc = "< Mips64 ISA (Mips)"] pub const CS_MODE_MIPS64: cs_mode = cs_mode(8); #[doc = "< M680X Hitachi 6301,6303 mode"] pub const CS_MODE_M680X_6301: cs_mode = cs_mode(2); #[doc = "< M680X Hitachi 6309 mode"] pub const CS_MODE_M680X_6309: cs_mode = cs_mode(4); #[doc = "< M680X Motorola 6800,6802 mode"] pub const CS_MODE_M680X_6800: cs_mode = cs_mode(8); #[doc = "< M680X Motorola 6801,6803 mode"] pub const CS_MODE_M680X_6801: cs_mode = cs_mode(16); #[doc = "< M680X Motorola/Freescale 6805 mode"] pub const CS_MODE_M680X_6805: cs_mode = cs_mode(32); #[doc = "< M680X Motorola/Freescale/NXP 68HC08 mode"] pub const CS_MODE_M680X_6808: cs_mode = cs_mode(64); #[doc = "< M680X Motorola 6809 mode"] pub const CS_MODE_M680X_6809: cs_mode = cs_mode(128); #[doc = "< M680X Motorola/Freescale/NXP 68HC11 mode"] pub const CS_MODE_M680X_6811: cs_mode = cs_mode(256); #[doc = "< M680X Motorola/Freescale/NXP CPU12"] #[doc = "< used on M68HC12/HCS12"] pub const CS_MODE_M680X_CPU12: cs_mode = cs_mode(512); #[doc = "< M680X Freescale/NXP HCS08 mode"] pub const CS_MODE_M680X_HCS08: cs_mode = cs_mode(1024); impl ::core::ops::BitOr for cs_mode { type Output = Self; #[inline] fn bitor(self, other: Self) -> Self { cs_mode(self.0 | other.0) } } impl ::core::ops::BitOrAssign for cs_mode { #[inline] fn bitor_assign(&mut self, rhs: cs_mode) { self.0 |= rhs.0; } } impl ::core::ops::BitAnd for cs_mode { type Output = Self; #[inline] fn bitand(self, other: Self) -> Self { cs_mode(self.0 & other.0) } } impl ::core::ops::BitAndAssign for cs_mode { #[inline] fn bitand_assign(&mut self, rhs: cs_mode) { self.0 &= rhs.0; } } #[repr(C)] #[doc = " Mode type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub struct cs_mode(pub i32); pub type cs_malloc_t = ::core::option::Option *mut libc::c_void>; pub type cs_calloc_t = ::core::option::Option *mut libc::c_void>; pub type cs_realloc_t = ::core::option::Option< unsafe extern "C" fn(ptr: *mut libc::c_void, size: usize) -> *mut libc::c_void, >; pub type cs_free_t = ::core::option::Option; pub type cs_vsnprintf_t = ::core::option::Option< unsafe extern "C" fn( str: *mut libc::c_char, size: usize, format: *const libc::c_char, ap: *mut __va_list_tag, ) -> libc::c_int, >; #[doc = " User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf()"] #[doc = " By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf()."] #[repr(C)] #[derive(Debug, Copy)] pub struct cs_opt_mem { pub malloc: cs_malloc_t, pub calloc: cs_calloc_t, pub realloc: cs_realloc_t, pub free: cs_free_t, pub vsnprintf: cs_vsnprintf_t, } impl Clone for cs_opt_mem { fn clone(&self) -> Self { *self } } #[doc = " Customize mnemonic for instructions with alternative name."] #[doc = " To reset existing customized instruction to its default mnemonic,"] #[doc = " call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value"] #[doc = " for @mnemonic."] #[repr(C)] #[derive(Debug, Copy)] pub struct cs_opt_mnem { #[doc = " ID of instruction to be customized."] pub id: libc::c_uint, #[doc = " Customized instruction mnemonic."] pub mnemonic: *const libc::c_char, } impl Clone for cs_opt_mnem { fn clone(&self) -> Self { *self } } #[repr(u32)] #[doc = " Runtime option for the disassembled engine"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum cs_opt_type { #[doc = "< No option specified"] CS_OPT_INVALID = 0, #[doc = "< Assembly output syntax"] CS_OPT_SYNTAX = 1, #[doc = "< Break down instruction structure into details"] CS_OPT_DETAIL = 2, #[doc = "< Change engine's mode at run-time"] CS_OPT_MODE = 3, #[doc = "< User-defined dynamic memory related functions"] CS_OPT_MEM = 4, #[doc = "< Skip data when disassembling. Then engine is in SKIPDATA mode."] CS_OPT_SKIPDATA = 5, #[doc = "< Setup user-defined function for SKIPDATA option"] CS_OPT_SKIPDATA_SETUP = 6, #[doc = "< Customize instruction mnemonic"] CS_OPT_MNEMONIC = 7, #[doc = "< print immediate operands in unsigned form"] CS_OPT_UNSIGNED = 8, } pub mod cs_opt_value { #[doc = " Runtime option value (associated with option type above)"] pub type Type = u32; #[doc = "< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED."] pub const CS_OPT_OFF: Type = 0; #[doc = "< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA)."] pub const CS_OPT_ON: Type = 3; #[doc = "< Default asm syntax (CS_OPT_SYNTAX)."] pub const CS_OPT_SYNTAX_DEFAULT: Type = 0; #[doc = "< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX)."] pub const CS_OPT_SYNTAX_INTEL: Type = 1; #[doc = "< X86 ATT asm syntax (CS_OPT_SYNTAX)."] pub const CS_OPT_SYNTAX_ATT: Type = 2; #[doc = "< Prints register name with only number (CS_OPT_SYNTAX)"] pub const CS_OPT_SYNTAX_NOREGNAME: Type = 3; #[doc = "< X86 Intel Masm syntax (CS_OPT_SYNTAX)."] pub const CS_OPT_SYNTAX_MASM: Type = 4; } #[repr(u32)] #[doc = " Common instruction operand types - to be consistent across all architectures."] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum cs_op_type { #[doc = "< uninitialized/invalid operand."] CS_OP_INVALID = 0, #[doc = "< Register operand."] CS_OP_REG = 1, #[doc = "< Immediate operand."] CS_OP_IMM = 2, #[doc = "< Memory operand."] CS_OP_MEM = 3, #[doc = "< Floating-Point operand."] CS_OP_FP = 4, } #[doc = "< Uninitialized/invalid access type."] pub const CS_AC_INVALID: cs_ac_type = cs_ac_type(0); #[doc = "< Operand read from memory or register."] pub const CS_AC_READ: cs_ac_type = cs_ac_type(1); #[doc = "< Operand write to memory or register."] pub const CS_AC_WRITE: cs_ac_type = cs_ac_type(2); impl ::core::ops::BitOr for cs_ac_type { type Output = Self; #[inline] fn bitor(self, other: Self) -> Self { cs_ac_type(self.0 | other.0) } } impl ::core::ops::BitOrAssign for cs_ac_type { #[inline] fn bitor_assign(&mut self, rhs: cs_ac_type) { self.0 |= rhs.0; } } impl ::core::ops::BitAnd for cs_ac_type { type Output = Self; #[inline] fn bitand(self, other: Self) -> Self { cs_ac_type(self.0 & other.0) } } impl ::core::ops::BitAndAssign for cs_ac_type { #[inline] fn bitand_assign(&mut self, rhs: cs_ac_type) { self.0 &= rhs.0; } } #[repr(C)] #[doc = " Common instruction operand access types - to be consistent across all architectures."] #[doc = " It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub struct cs_ac_type(pub u32); pub mod cs_group_type { #[doc = " Common instruction groups - to be consistent across all architectures."] pub type Type = u32; #[doc = "< uninitialized/invalid group."] pub const CS_GRP_INVALID: Type = 0; #[doc = "< all jump instructions (conditional+direct+indirect jumps)"] pub const CS_GRP_JUMP: Type = 1; #[doc = "< all call instructions"] pub const CS_GRP_CALL: Type = 2; #[doc = "< all return instructions"] pub const CS_GRP_RET: Type = 3; #[doc = "< all interrupt instructions (int+syscall)"] pub const CS_GRP_INT: Type = 4; #[doc = "< all interrupt return instructions"] pub const CS_GRP_IRET: Type = 5; #[doc = "< all privileged instructions"] pub const CS_GRP_PRIVILEGE: Type = 6; #[doc = "< all relative branching instructions"] pub const CS_GRP_BRANCH_RELATIVE: Type = 7; } #[doc = "User-defined callback function for SKIPDATA option."] #[doc = "See tests/test_skipdata.c for sample code demonstrating this API."] #[doc = ""] #[doc = "@code: the input buffer containing code to be disassembled."] #[doc = "This is the same buffer passed to cs_disasm()."] #[doc = "@code_size: size (in bytes) of the above @code buffer."] #[doc = "@offset: the position of the currently-examining byte in the input"] #[doc = "buffer @code mentioned above."] #[doc = "@user_data: user-data passed to cs_option() via @user_data field in"] #[doc = "cs_opt_skipdata struct below."] #[doc = ""] #[doc = "@return: return number of bytes to skip, or 0 to immediately stop disassembling."] pub type cs_skipdata_cb_t = ::core::option::Option< unsafe extern "C" fn( code: *const u8, code_size: usize, offset: usize, user_data: *mut libc::c_void, ) -> usize, >; #[doc = " User-customized setup for SKIPDATA option"] #[repr(C)] #[derive(Debug, Copy)] pub struct cs_opt_skipdata { #[doc = " Capstone considers data to skip as special \"instructions\"."] #[doc = " User can specify the string for this instruction's \"mnemonic\" here."] #[doc = " By default (if @mnemonic is NULL), Capstone use \".byte\"."] pub mnemonic: *const libc::c_char, #[doc = " User-defined callback function to be called when Capstone hits data."] #[doc = " If the returned value from this callback is positive (>0), Capstone"] #[doc = " will skip exactly that number of bytes & continue. Otherwise, if"] #[doc = " the callback returns 0, Capstone stops disassembling and returns"] #[doc = " immediately from cs_disasm()"] #[doc = " NOTE: if this callback pointer is NULL, Capstone would skip a number"] #[doc = " of bytes depending on architectures, as following:"] #[doc = " Arm: 2 bytes (Thumb mode) or 4 bytes."] #[doc = " Arm64: 4 bytes."] #[doc = " Mips: 4 bytes."] #[doc = " M680x: 1 byte."] #[doc = " PowerPC: 4 bytes."] #[doc = " Sparc: 4 bytes."] #[doc = " SystemZ: 2 bytes."] #[doc = " X86: 1 bytes."] #[doc = " XCore: 2 bytes."] #[doc = " EVM: 1 bytes."] pub callback: cs_skipdata_cb_t, #[doc = " User-defined data to be passed to @callback function pointer."] pub user_data: *mut libc::c_void, } impl Clone for cs_opt_skipdata { fn clone(&self) -> Self { *self } } #[repr(u32)] #[doc = " ARM shift type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_shifter { ARM_SFT_INVALID = 0, #[doc = "< shift with immediate const"] ARM_SFT_ASR = 1, #[doc = "< shift with immediate const"] ARM_SFT_LSL = 2, #[doc = "< shift with immediate const"] ARM_SFT_LSR = 3, #[doc = "< shift with immediate const"] ARM_SFT_ROR = 4, #[doc = "< shift with immediate const"] ARM_SFT_RRX = 5, #[doc = "< shift with register"] ARM_SFT_ASR_REG = 6, #[doc = "< shift with register"] ARM_SFT_LSL_REG = 7, #[doc = "< shift with register"] ARM_SFT_LSR_REG = 8, #[doc = "< shift with register"] ARM_SFT_ROR_REG = 9, #[doc = "< shift with register"] ARM_SFT_RRX_REG = 10, } #[repr(u32)] #[doc = " ARM condition code"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_cc { ARM_CC_INVALID = 0, #[doc = "< Equal Equal"] ARM_CC_EQ = 1, #[doc = "< Not equal Not equal, or unordered"] ARM_CC_NE = 2, #[doc = "< Carry set >, ==, or unordered"] ARM_CC_HS = 3, #[doc = "< Carry clear Less than"] ARM_CC_LO = 4, #[doc = "< Minus, negative Less than"] ARM_CC_MI = 5, #[doc = "< Plus, positive or zero >, ==, or unordered"] ARM_CC_PL = 6, #[doc = "< Overflow Unordered"] ARM_CC_VS = 7, #[doc = "< No overflow Not unordered"] ARM_CC_VC = 8, #[doc = "< Unsigned higher Greater than, or unordered"] ARM_CC_HI = 9, #[doc = "< Unsigned lower or same Less than or equal"] ARM_CC_LS = 10, #[doc = "< Greater than or equal Greater than or equal"] ARM_CC_GE = 11, #[doc = "< Less than Less than, or unordered"] ARM_CC_LT = 12, #[doc = "< Greater than Greater than"] ARM_CC_GT = 13, #[doc = "< Less than or equal <, ==, or unordered"] ARM_CC_LE = 14, #[doc = "< Always (unconditional) Always (unconditional)"] ARM_CC_AL = 15, } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_sysreg { #[doc = " Special registers for MSR"] ARM_SYSREG_INVALID = 0, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_C = 1, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_X = 2, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_S = 4, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_F = 8, #[doc = " Special registers for MSR"] ARM_SYSREG_CPSR_C = 16, #[doc = " Special registers for MSR"] ARM_SYSREG_CPSR_X = 32, #[doc = " Special registers for MSR"] ARM_SYSREG_CPSR_S = 64, #[doc = " Special registers for MSR"] ARM_SYSREG_CPSR_F = 128, #[doc = " Special registers for MSR"] ARM_SYSREG_APSR = 256, #[doc = " Special registers for MSR"] ARM_SYSREG_APSR_G = 257, #[doc = " Special registers for MSR"] ARM_SYSREG_APSR_NZCVQ = 258, #[doc = " Special registers for MSR"] ARM_SYSREG_APSR_NZCVQG = 259, #[doc = " Special registers for MSR"] ARM_SYSREG_IAPSR = 260, #[doc = " Special registers for MSR"] ARM_SYSREG_IAPSR_G = 261, #[doc = " Special registers for MSR"] ARM_SYSREG_IAPSR_NZCVQG = 262, #[doc = " Special registers for MSR"] ARM_SYSREG_IAPSR_NZCVQ = 263, #[doc = " Special registers for MSR"] ARM_SYSREG_EAPSR = 264, #[doc = " Special registers for MSR"] ARM_SYSREG_EAPSR_G = 265, #[doc = " Special registers for MSR"] ARM_SYSREG_EAPSR_NZCVQG = 266, #[doc = " Special registers for MSR"] ARM_SYSREG_EAPSR_NZCVQ = 267, #[doc = " Special registers for MSR"] ARM_SYSREG_XPSR = 268, #[doc = " Special registers for MSR"] ARM_SYSREG_XPSR_G = 269, #[doc = " Special registers for MSR"] ARM_SYSREG_XPSR_NZCVQG = 270, #[doc = " Special registers for MSR"] ARM_SYSREG_XPSR_NZCVQ = 271, #[doc = " Special registers for MSR"] ARM_SYSREG_IPSR = 272, #[doc = " Special registers for MSR"] ARM_SYSREG_EPSR = 273, #[doc = " Special registers for MSR"] ARM_SYSREG_IEPSR = 274, #[doc = " Special registers for MSR"] ARM_SYSREG_MSP = 275, #[doc = " Special registers for MSR"] ARM_SYSREG_PSP = 276, #[doc = " Special registers for MSR"] ARM_SYSREG_PRIMASK = 277, #[doc = " Special registers for MSR"] ARM_SYSREG_BASEPRI = 278, #[doc = " Special registers for MSR"] ARM_SYSREG_BASEPRI_MAX = 279, #[doc = " Special registers for MSR"] ARM_SYSREG_FAULTMASK = 280, #[doc = " Special registers for MSR"] ARM_SYSREG_CONTROL = 281, #[doc = " Special registers for MSR"] ARM_SYSREG_R8_USR = 282, #[doc = " Special registers for MSR"] ARM_SYSREG_R9_USR = 283, #[doc = " Special registers for MSR"] ARM_SYSREG_R10_USR = 284, #[doc = " Special registers for MSR"] ARM_SYSREG_R11_USR = 285, #[doc = " Special registers for MSR"] ARM_SYSREG_R12_USR = 286, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_USR = 287, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_USR = 288, #[doc = " Special registers for MSR"] ARM_SYSREG_R8_FIQ = 289, #[doc = " Special registers for MSR"] ARM_SYSREG_R9_FIQ = 290, #[doc = " Special registers for MSR"] ARM_SYSREG_R10_FIQ = 291, #[doc = " Special registers for MSR"] ARM_SYSREG_R11_FIQ = 292, #[doc = " Special registers for MSR"] ARM_SYSREG_R12_FIQ = 293, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_FIQ = 294, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_FIQ = 295, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_IRQ = 296, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_IRQ = 297, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_SVC = 298, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_SVC = 299, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_ABT = 300, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_ABT = 301, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_UND = 302, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_UND = 303, #[doc = " Special registers for MSR"] ARM_SYSREG_LR_MON = 304, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_MON = 305, #[doc = " Special registers for MSR"] ARM_SYSREG_ELR_HYP = 306, #[doc = " Special registers for MSR"] ARM_SYSREG_SP_HYP = 307, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_FIQ = 308, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_IRQ = 309, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_SVC = 310, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_ABT = 311, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_UND = 312, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_MON = 313, #[doc = " Special registers for MSR"] ARM_SYSREG_SPSR_HYP = 314, } #[repr(u32)] #[doc = " The memory barrier constants map directly to the 4-bit encoding of"] #[doc = " the option field for Memory Barrier operations."] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_mem_barrier { ARM_MB_INVALID = 0, ARM_MB_RESERVED_0 = 1, ARM_MB_OSHLD = 2, ARM_MB_OSHST = 3, ARM_MB_OSH = 4, ARM_MB_RESERVED_4 = 5, ARM_MB_NSHLD = 6, ARM_MB_NSHST = 7, ARM_MB_NSH = 8, ARM_MB_RESERVED_8 = 9, ARM_MB_ISHLD = 10, ARM_MB_ISHST = 11, ARM_MB_ISH = 12, ARM_MB_RESERVED_12 = 13, ARM_MB_LD = 14, ARM_MB_ST = 15, ARM_MB_SY = 16, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] ARM_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] ARM_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] ARM_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] ARM_OP_MEM = 3, #[doc = "< = CS_OP_FP (Floating-Point operand)."] ARM_OP_FP = 4, #[doc = "< C-Immediate (coprocessor registers)"] ARM_OP_CIMM = 64, #[doc = "< P-Immediate (coprocessor registers)"] ARM_OP_PIMM = 65, #[doc = "< operand for SETEND instruction"] ARM_OP_SETEND = 66, #[doc = "< MSR/MRS special register operand"] ARM_OP_SYSREG = 67, } #[repr(u32)] #[doc = " Operand type for SETEND instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_setend_type { #[doc = "< Uninitialized."] ARM_SETEND_INVALID = 0, #[doc = "< BE operand."] ARM_SETEND_BE = 1, #[doc = "< LE operand"] ARM_SETEND_LE = 2, } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_cpsmode_type { ARM_CPSMODE_INVALID = 0, ARM_CPSMODE_IE = 2, ARM_CPSMODE_ID = 3, } #[repr(u32)] #[doc = " Operand type for SETEND instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_cpsflag_type { ARM_CPSFLAG_INVALID = 0, ARM_CPSFLAG_F = 1, ARM_CPSFLAG_I = 2, ARM_CPSFLAG_A = 4, #[doc = "< no flag"] ARM_CPSFLAG_NONE = 16, } #[repr(u32)] #[doc = " Data type for elements of vector instructions."] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_vectordata_type { ARM_VECTORDATA_INVALID = 0, ARM_VECTORDATA_I8 = 1, ARM_VECTORDATA_I16 = 2, ARM_VECTORDATA_I32 = 3, ARM_VECTORDATA_I64 = 4, ARM_VECTORDATA_S8 = 5, ARM_VECTORDATA_S16 = 6, ARM_VECTORDATA_S32 = 7, ARM_VECTORDATA_S64 = 8, ARM_VECTORDATA_U8 = 9, ARM_VECTORDATA_U16 = 10, ARM_VECTORDATA_U32 = 11, ARM_VECTORDATA_U64 = 12, ARM_VECTORDATA_P8 = 13, ARM_VECTORDATA_F32 = 14, ARM_VECTORDATA_F64 = 15, ARM_VECTORDATA_F16F64 = 16, ARM_VECTORDATA_F64F16 = 17, ARM_VECTORDATA_F32F16 = 18, ARM_VECTORDATA_F16F32 = 19, ARM_VECTORDATA_F64F32 = 20, ARM_VECTORDATA_F32F64 = 21, ARM_VECTORDATA_S32F32 = 22, ARM_VECTORDATA_U32F32 = 23, ARM_VECTORDATA_F32S32 = 24, ARM_VECTORDATA_F32U32 = 25, ARM_VECTORDATA_F64S16 = 26, ARM_VECTORDATA_F32S16 = 27, ARM_VECTORDATA_F64S32 = 28, ARM_VECTORDATA_S16F64 = 29, ARM_VECTORDATA_S16F32 = 30, ARM_VECTORDATA_S32F64 = 31, ARM_VECTORDATA_U16F64 = 32, ARM_VECTORDATA_U16F32 = 33, ARM_VECTORDATA_U32F64 = 34, ARM_VECTORDATA_F64U16 = 35, ARM_VECTORDATA_F32U16 = 36, ARM_VECTORDATA_F64U32 = 37, } pub mod arm_reg { #[doc = " ARM registers"] pub type Type = u32; pub const ARM_REG_INVALID: Type = 0; pub const ARM_REG_APSR: Type = 1; pub const ARM_REG_APSR_NZCV: Type = 2; pub const ARM_REG_CPSR: Type = 3; pub const ARM_REG_FPEXC: Type = 4; pub const ARM_REG_FPINST: Type = 5; pub const ARM_REG_FPSCR: Type = 6; pub const ARM_REG_FPSCR_NZCV: Type = 7; pub const ARM_REG_FPSID: Type = 8; pub const ARM_REG_ITSTATE: Type = 9; pub const ARM_REG_LR: Type = 10; pub const ARM_REG_PC: Type = 11; pub const ARM_REG_SP: Type = 12; pub const ARM_REG_SPSR: Type = 13; pub const ARM_REG_D0: Type = 14; pub const ARM_REG_D1: Type = 15; pub const ARM_REG_D2: Type = 16; pub const ARM_REG_D3: Type = 17; pub const ARM_REG_D4: Type = 18; pub const ARM_REG_D5: Type = 19; pub const ARM_REG_D6: Type = 20; pub const ARM_REG_D7: Type = 21; pub const ARM_REG_D8: Type = 22; pub const ARM_REG_D9: Type = 23; pub const ARM_REG_D10: Type = 24; pub const ARM_REG_D11: Type = 25; pub const ARM_REG_D12: Type = 26; pub const ARM_REG_D13: Type = 27; pub const ARM_REG_D14: Type = 28; pub const ARM_REG_D15: Type = 29; pub const ARM_REG_D16: Type = 30; pub const ARM_REG_D17: Type = 31; pub const ARM_REG_D18: Type = 32; pub const ARM_REG_D19: Type = 33; pub const ARM_REG_D20: Type = 34; pub const ARM_REG_D21: Type = 35; pub const ARM_REG_D22: Type = 36; pub const ARM_REG_D23: Type = 37; pub const ARM_REG_D24: Type = 38; pub const ARM_REG_D25: Type = 39; pub const ARM_REG_D26: Type = 40; pub const ARM_REG_D27: Type = 41; pub const ARM_REG_D28: Type = 42; pub const ARM_REG_D29: Type = 43; pub const ARM_REG_D30: Type = 44; pub const ARM_REG_D31: Type = 45; pub const ARM_REG_FPINST2: Type = 46; pub const ARM_REG_MVFR0: Type = 47; pub const ARM_REG_MVFR1: Type = 48; pub const ARM_REG_MVFR2: Type = 49; pub const ARM_REG_Q0: Type = 50; pub const ARM_REG_Q1: Type = 51; pub const ARM_REG_Q2: Type = 52; pub const ARM_REG_Q3: Type = 53; pub const ARM_REG_Q4: Type = 54; pub const ARM_REG_Q5: Type = 55; pub const ARM_REG_Q6: Type = 56; pub const ARM_REG_Q7: Type = 57; pub const ARM_REG_Q8: Type = 58; pub const ARM_REG_Q9: Type = 59; pub const ARM_REG_Q10: Type = 60; pub const ARM_REG_Q11: Type = 61; pub const ARM_REG_Q12: Type = 62; pub const ARM_REG_Q13: Type = 63; pub const ARM_REG_Q14: Type = 64; pub const ARM_REG_Q15: Type = 65; pub const ARM_REG_R0: Type = 66; pub const ARM_REG_R1: Type = 67; pub const ARM_REG_R2: Type = 68; pub const ARM_REG_R3: Type = 69; pub const ARM_REG_R4: Type = 70; pub const ARM_REG_R5: Type = 71; pub const ARM_REG_R6: Type = 72; pub const ARM_REG_R7: Type = 73; pub const ARM_REG_R8: Type = 74; pub const ARM_REG_R9: Type = 75; pub const ARM_REG_R10: Type = 76; pub const ARM_REG_R11: Type = 77; pub const ARM_REG_R12: Type = 78; pub const ARM_REG_S0: Type = 79; pub const ARM_REG_S1: Type = 80; pub const ARM_REG_S2: Type = 81; pub const ARM_REG_S3: Type = 82; pub const ARM_REG_S4: Type = 83; pub const ARM_REG_S5: Type = 84; pub const ARM_REG_S6: Type = 85; pub const ARM_REG_S7: Type = 86; pub const ARM_REG_S8: Type = 87; pub const ARM_REG_S9: Type = 88; pub const ARM_REG_S10: Type = 89; pub const ARM_REG_S11: Type = 90; pub const ARM_REG_S12: Type = 91; pub const ARM_REG_S13: Type = 92; pub const ARM_REG_S14: Type = 93; pub const ARM_REG_S15: Type = 94; pub const ARM_REG_S16: Type = 95; pub const ARM_REG_S17: Type = 96; pub const ARM_REG_S18: Type = 97; pub const ARM_REG_S19: Type = 98; pub const ARM_REG_S20: Type = 99; pub const ARM_REG_S21: Type = 100; pub const ARM_REG_S22: Type = 101; pub const ARM_REG_S23: Type = 102; pub const ARM_REG_S24: Type = 103; pub const ARM_REG_S25: Type = 104; pub const ARM_REG_S26: Type = 105; pub const ARM_REG_S27: Type = 106; pub const ARM_REG_S28: Type = 107; pub const ARM_REG_S29: Type = 108; pub const ARM_REG_S30: Type = 109; pub const ARM_REG_S31: Type = 110; pub const ARM_REG_ENDING: Type = 111; pub const ARM_REG_R13: Type = 12; pub const ARM_REG_R14: Type = 10; pub const ARM_REG_R15: Type = 11; pub const ARM_REG_SB: Type = 75; pub const ARM_REG_SL: Type = 76; pub const ARM_REG_FP: Type = 77; pub const ARM_REG_IP: Type = 78; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with ARM_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct arm_op_mem { #[doc = "< base register"] pub base: arm_reg::Type, #[doc = "< index register"] pub index: arm_reg::Type, #[doc = "< scale for index register (can be 1, or -1)"] pub scale: libc::c_int, #[doc = "< displacement/offset value"] pub disp: libc::c_int, #[doc = " left-shift on index register, or 0 if irrelevant"] #[doc = " NOTE: this value can also be fetched via operand.shift.value"] pub lshift: libc::c_int, } impl Clone for arm_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_arm_op { #[doc = "< Vector Index for some vector operands (or -1 if irrelevant)"] pub vector_index: libc::c_int, pub shift: cs_arm_op__bindgen_ty_1, #[doc = "< operand type"] pub type_: arm_op_type, pub __bindgen_anon_1: cs_arm_op__bindgen_ty_2, #[doc = " in some instructions, an operand can be subtracted or added to"] #[doc = " the base register,"] #[doc = " if TRUE, this operand is subtracted. otherwise, it is added."] pub subtracted: bool, #[doc = " How is this operand accessed? (READ, WRITE or READ|WRITE)"] #[doc = " This field is combined of cs_ac_type."] #[doc = " NOTE: this field is irrelevant if engine is compiled in DIET mode."] pub access: u8, #[doc = " Neon lane index for NEON instructions (or -1 if irrelevant)"] pub neon_lane: i8, } #[repr(C)] #[derive(Debug, Copy)] pub struct cs_arm_op__bindgen_ty_1 { pub type_: arm_shifter, pub value: libc::c_uint, } impl Clone for cs_arm_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } #[repr(C)] #[derive(Copy)] pub union cs_arm_op__bindgen_ty_2 { #[doc = "< register value for REG/SYSREG operand"] pub reg: libc::c_int, #[doc = "< immediate value for C-IMM, P-IMM or IMM operand"] pub imm: i32, #[doc = "< floating point value for FP operand"] pub fp: f64, #[doc = "< base/index/scale/disp value for MEM operand"] pub mem: arm_op_mem, #[doc = "< SETEND instruction's operand type"] pub setend: arm_setend_type, _bindgen_union_align: [u64; 3usize], } impl Clone for cs_arm_op__bindgen_ty_2 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_arm_op__bindgen_ty_2 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_arm_op__bindgen_ty_2 {{ union }}") } } impl Clone for cs_arm_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_arm_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_arm_op {{ vector_index: {:?}, shift: {:?}, type: {:?}, __bindgen_anon_1: {:?}, subtracted: {:?}, access: {:?}, neon_lane: {:?} }}" , self . vector_index , self . shift , self . type_ , self . __bindgen_anon_1 , self . subtracted , self . access , self . neon_lane ) } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_arm { #[doc = "< User-mode registers to be loaded (for LDM/STM instructions)"] pub usermode: bool, #[doc = "< Scalar size for vector instructions"] pub vector_size: libc::c_int, #[doc = "< Data type for elements of vector instructions"] pub vector_data: arm_vectordata_type, #[doc = "< CPS mode for CPS instruction"] pub cps_mode: arm_cpsmode_type, #[doc = "< CPS mode for CPS instruction"] pub cps_flag: arm_cpsflag_type, #[doc = "< conditional code for this insn"] pub cc: arm_cc, #[doc = "< does this insn update flags?"] pub update_flags: bool, #[doc = "< does this insn write-back?"] pub writeback: bool, #[doc = "< Option for some memory barrier instructions"] pub mem_barrier: arm_mem_barrier, #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_arm_op; 36usize], } impl Clone for cs_arm { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_arm { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_arm {{ usermode: {:?}, vector_size: {:?}, vector_data: {:?}, cps_mode: {:?}, cps_flag: {:?}, cc: {:?}, update_flags: {:?}, writeback: {:?}, mem_barrier: {:?}, op_count: {:?}, operands: [...] }}" , self . usermode , self . vector_size , self . vector_data , self . cps_mode , self . cps_flag , self . cc , self . update_flags , self . writeback , self . mem_barrier , self . op_count ) } } #[repr(u32)] #[doc = " ARM instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm_insn { ARM_INS_INVALID = 0, ARM_INS_ADC = 1, ARM_INS_ADD = 2, ARM_INS_ADR = 3, ARM_INS_AESD = 4, ARM_INS_AESE = 5, ARM_INS_AESIMC = 6, ARM_INS_AESMC = 7, ARM_INS_AND = 8, ARM_INS_BFC = 9, ARM_INS_BFI = 10, ARM_INS_BIC = 11, ARM_INS_BKPT = 12, ARM_INS_BL = 13, ARM_INS_BLX = 14, ARM_INS_BX = 15, ARM_INS_BXJ = 16, ARM_INS_B = 17, ARM_INS_CDP = 18, ARM_INS_CDP2 = 19, ARM_INS_CLREX = 20, ARM_INS_CLZ = 21, ARM_INS_CMN = 22, ARM_INS_CMP = 23, ARM_INS_CPS = 24, ARM_INS_CRC32B = 25, ARM_INS_CRC32CB = 26, ARM_INS_CRC32CH = 27, ARM_INS_CRC32CW = 28, ARM_INS_CRC32H = 29, ARM_INS_CRC32W = 30, ARM_INS_DBG = 31, ARM_INS_DMB = 32, ARM_INS_DSB = 33, ARM_INS_EOR = 34, ARM_INS_ERET = 35, ARM_INS_VMOV = 36, ARM_INS_FLDMDBX = 37, ARM_INS_FLDMIAX = 38, ARM_INS_VMRS = 39, ARM_INS_FSTMDBX = 40, ARM_INS_FSTMIAX = 41, ARM_INS_HINT = 42, ARM_INS_HLT = 43, ARM_INS_HVC = 44, ARM_INS_ISB = 45, ARM_INS_LDA = 46, ARM_INS_LDAB = 47, ARM_INS_LDAEX = 48, ARM_INS_LDAEXB = 49, ARM_INS_LDAEXD = 50, ARM_INS_LDAEXH = 51, ARM_INS_LDAH = 52, ARM_INS_LDC2L = 53, ARM_INS_LDC2 = 54, ARM_INS_LDCL = 55, ARM_INS_LDC = 56, ARM_INS_LDMDA = 57, ARM_INS_LDMDB = 58, ARM_INS_LDM = 59, ARM_INS_LDMIB = 60, ARM_INS_LDRBT = 61, ARM_INS_LDRB = 62, ARM_INS_LDRD = 63, ARM_INS_LDREX = 64, ARM_INS_LDREXB = 65, ARM_INS_LDREXD = 66, ARM_INS_LDREXH = 67, ARM_INS_LDRH = 68, ARM_INS_LDRHT = 69, ARM_INS_LDRSB = 70, ARM_INS_LDRSBT = 71, ARM_INS_LDRSH = 72, ARM_INS_LDRSHT = 73, ARM_INS_LDRT = 74, ARM_INS_LDR = 75, ARM_INS_MCR = 76, ARM_INS_MCR2 = 77, ARM_INS_MCRR = 78, ARM_INS_MCRR2 = 79, ARM_INS_MLA = 80, ARM_INS_MLS = 81, ARM_INS_MOV = 82, ARM_INS_MOVT = 83, ARM_INS_MOVW = 84, ARM_INS_MRC = 85, ARM_INS_MRC2 = 86, ARM_INS_MRRC = 87, ARM_INS_MRRC2 = 88, ARM_INS_MRS = 89, ARM_INS_MSR = 90, ARM_INS_MUL = 91, ARM_INS_MVN = 92, ARM_INS_ORR = 93, ARM_INS_PKHBT = 94, ARM_INS_PKHTB = 95, ARM_INS_PLDW = 96, ARM_INS_PLD = 97, ARM_INS_PLI = 98, ARM_INS_QADD = 99, ARM_INS_QADD16 = 100, ARM_INS_QADD8 = 101, ARM_INS_QASX = 102, ARM_INS_QDADD = 103, ARM_INS_QDSUB = 104, ARM_INS_QSAX = 105, ARM_INS_QSUB = 106, ARM_INS_QSUB16 = 107, ARM_INS_QSUB8 = 108, ARM_INS_RBIT = 109, ARM_INS_REV = 110, ARM_INS_REV16 = 111, ARM_INS_REVSH = 112, ARM_INS_RFEDA = 113, ARM_INS_RFEDB = 114, ARM_INS_RFEIA = 115, ARM_INS_RFEIB = 116, ARM_INS_RSB = 117, ARM_INS_RSC = 118, ARM_INS_SADD16 = 119, ARM_INS_SADD8 = 120, ARM_INS_SASX = 121, ARM_INS_SBC = 122, ARM_INS_SBFX = 123, ARM_INS_SDIV = 124, ARM_INS_SEL = 125, ARM_INS_SETEND = 126, ARM_INS_SHA1C = 127, ARM_INS_SHA1H = 128, ARM_INS_SHA1M = 129, ARM_INS_SHA1P = 130, ARM_INS_SHA1SU0 = 131, ARM_INS_SHA1SU1 = 132, ARM_INS_SHA256H = 133, ARM_INS_SHA256H2 = 134, ARM_INS_SHA256SU0 = 135, ARM_INS_SHA256SU1 = 136, ARM_INS_SHADD16 = 137, ARM_INS_SHADD8 = 138, ARM_INS_SHASX = 139, ARM_INS_SHSAX = 140, ARM_INS_SHSUB16 = 141, ARM_INS_SHSUB8 = 142, ARM_INS_SMC = 143, ARM_INS_SMLABB = 144, ARM_INS_SMLABT = 145, ARM_INS_SMLAD = 146, ARM_INS_SMLADX = 147, ARM_INS_SMLAL = 148, ARM_INS_SMLALBB = 149, ARM_INS_SMLALBT = 150, ARM_INS_SMLALD = 151, ARM_INS_SMLALDX = 152, ARM_INS_SMLALTB = 153, ARM_INS_SMLALTT = 154, ARM_INS_SMLATB = 155, ARM_INS_SMLATT = 156, ARM_INS_SMLAWB = 157, ARM_INS_SMLAWT = 158, ARM_INS_SMLSD = 159, ARM_INS_SMLSDX = 160, ARM_INS_SMLSLD = 161, ARM_INS_SMLSLDX = 162, ARM_INS_SMMLA = 163, ARM_INS_SMMLAR = 164, ARM_INS_SMMLS = 165, ARM_INS_SMMLSR = 166, ARM_INS_SMMUL = 167, ARM_INS_SMMULR = 168, ARM_INS_SMUAD = 169, ARM_INS_SMUADX = 170, ARM_INS_SMULBB = 171, ARM_INS_SMULBT = 172, ARM_INS_SMULL = 173, ARM_INS_SMULTB = 174, ARM_INS_SMULTT = 175, ARM_INS_SMULWB = 176, ARM_INS_SMULWT = 177, ARM_INS_SMUSD = 178, ARM_INS_SMUSDX = 179, ARM_INS_SRSDA = 180, ARM_INS_SRSDB = 181, ARM_INS_SRSIA = 182, ARM_INS_SRSIB = 183, ARM_INS_SSAT = 184, ARM_INS_SSAT16 = 185, ARM_INS_SSAX = 186, ARM_INS_SSUB16 = 187, ARM_INS_SSUB8 = 188, ARM_INS_STC2L = 189, ARM_INS_STC2 = 190, ARM_INS_STCL = 191, ARM_INS_STC = 192, ARM_INS_STL = 193, ARM_INS_STLB = 194, ARM_INS_STLEX = 195, ARM_INS_STLEXB = 196, ARM_INS_STLEXD = 197, ARM_INS_STLEXH = 198, ARM_INS_STLH = 199, ARM_INS_STMDA = 200, ARM_INS_STMDB = 201, ARM_INS_STM = 202, ARM_INS_STMIB = 203, ARM_INS_STRBT = 204, ARM_INS_STRB = 205, ARM_INS_STRD = 206, ARM_INS_STREX = 207, ARM_INS_STREXB = 208, ARM_INS_STREXD = 209, ARM_INS_STREXH = 210, ARM_INS_STRH = 211, ARM_INS_STRHT = 212, ARM_INS_STRT = 213, ARM_INS_STR = 214, ARM_INS_SUB = 215, ARM_INS_SVC = 216, ARM_INS_SWP = 217, ARM_INS_SWPB = 218, ARM_INS_SXTAB = 219, ARM_INS_SXTAB16 = 220, ARM_INS_SXTAH = 221, ARM_INS_SXTB = 222, ARM_INS_SXTB16 = 223, ARM_INS_SXTH = 224, ARM_INS_TEQ = 225, ARM_INS_TRAP = 226, ARM_INS_TST = 227, ARM_INS_UADD16 = 228, ARM_INS_UADD8 = 229, ARM_INS_UASX = 230, ARM_INS_UBFX = 231, ARM_INS_UDF = 232, ARM_INS_UDIV = 233, ARM_INS_UHADD16 = 234, ARM_INS_UHADD8 = 235, ARM_INS_UHASX = 236, ARM_INS_UHSAX = 237, ARM_INS_UHSUB16 = 238, ARM_INS_UHSUB8 = 239, ARM_INS_UMAAL = 240, ARM_INS_UMLAL = 241, ARM_INS_UMULL = 242, ARM_INS_UQADD16 = 243, ARM_INS_UQADD8 = 244, ARM_INS_UQASX = 245, ARM_INS_UQSAX = 246, ARM_INS_UQSUB16 = 247, ARM_INS_UQSUB8 = 248, ARM_INS_USAD8 = 249, ARM_INS_USADA8 = 250, ARM_INS_USAT = 251, ARM_INS_USAT16 = 252, ARM_INS_USAX = 253, ARM_INS_USUB16 = 254, ARM_INS_USUB8 = 255, ARM_INS_UXTAB = 256, ARM_INS_UXTAB16 = 257, ARM_INS_UXTAH = 258, ARM_INS_UXTB = 259, ARM_INS_UXTB16 = 260, ARM_INS_UXTH = 261, ARM_INS_VABAL = 262, ARM_INS_VABA = 263, ARM_INS_VABDL = 264, ARM_INS_VABD = 265, ARM_INS_VABS = 266, ARM_INS_VACGE = 267, ARM_INS_VACGT = 268, ARM_INS_VADD = 269, ARM_INS_VADDHN = 270, ARM_INS_VADDL = 271, ARM_INS_VADDW = 272, ARM_INS_VAND = 273, ARM_INS_VBIC = 274, ARM_INS_VBIF = 275, ARM_INS_VBIT = 276, ARM_INS_VBSL = 277, ARM_INS_VCEQ = 278, ARM_INS_VCGE = 279, ARM_INS_VCGT = 280, ARM_INS_VCLE = 281, ARM_INS_VCLS = 282, ARM_INS_VCLT = 283, ARM_INS_VCLZ = 284, ARM_INS_VCMP = 285, ARM_INS_VCMPE = 286, ARM_INS_VCNT = 287, ARM_INS_VCVTA = 288, ARM_INS_VCVTB = 289, ARM_INS_VCVT = 290, ARM_INS_VCVTM = 291, ARM_INS_VCVTN = 292, ARM_INS_VCVTP = 293, ARM_INS_VCVTT = 294, ARM_INS_VDIV = 295, ARM_INS_VDUP = 296, ARM_INS_VEOR = 297, ARM_INS_VEXT = 298, ARM_INS_VFMA = 299, ARM_INS_VFMS = 300, ARM_INS_VFNMA = 301, ARM_INS_VFNMS = 302, ARM_INS_VHADD = 303, ARM_INS_VHSUB = 304, ARM_INS_VLD1 = 305, ARM_INS_VLD2 = 306, ARM_INS_VLD3 = 307, ARM_INS_VLD4 = 308, ARM_INS_VLDMDB = 309, ARM_INS_VLDMIA = 310, ARM_INS_VLDR = 311, ARM_INS_VMAXNM = 312, ARM_INS_VMAX = 313, ARM_INS_VMINNM = 314, ARM_INS_VMIN = 315, ARM_INS_VMLA = 316, ARM_INS_VMLAL = 317, ARM_INS_VMLS = 318, ARM_INS_VMLSL = 319, ARM_INS_VMOVL = 320, ARM_INS_VMOVN = 321, ARM_INS_VMSR = 322, ARM_INS_VMUL = 323, ARM_INS_VMULL = 324, ARM_INS_VMVN = 325, ARM_INS_VNEG = 326, ARM_INS_VNMLA = 327, ARM_INS_VNMLS = 328, ARM_INS_VNMUL = 329, ARM_INS_VORN = 330, ARM_INS_VORR = 331, ARM_INS_VPADAL = 332, ARM_INS_VPADDL = 333, ARM_INS_VPADD = 334, ARM_INS_VPMAX = 335, ARM_INS_VPMIN = 336, ARM_INS_VQABS = 337, ARM_INS_VQADD = 338, ARM_INS_VQDMLAL = 339, ARM_INS_VQDMLSL = 340, ARM_INS_VQDMULH = 341, ARM_INS_VQDMULL = 342, ARM_INS_VQMOVUN = 343, ARM_INS_VQMOVN = 344, ARM_INS_VQNEG = 345, ARM_INS_VQRDMULH = 346, ARM_INS_VQRSHL = 347, ARM_INS_VQRSHRN = 348, ARM_INS_VQRSHRUN = 349, ARM_INS_VQSHL = 350, ARM_INS_VQSHLU = 351, ARM_INS_VQSHRN = 352, ARM_INS_VQSHRUN = 353, ARM_INS_VQSUB = 354, ARM_INS_VRADDHN = 355, ARM_INS_VRECPE = 356, ARM_INS_VRECPS = 357, ARM_INS_VREV16 = 358, ARM_INS_VREV32 = 359, ARM_INS_VREV64 = 360, ARM_INS_VRHADD = 361, ARM_INS_VRINTA = 362, ARM_INS_VRINTM = 363, ARM_INS_VRINTN = 364, ARM_INS_VRINTP = 365, ARM_INS_VRINTR = 366, ARM_INS_VRINTX = 367, ARM_INS_VRINTZ = 368, ARM_INS_VRSHL = 369, ARM_INS_VRSHRN = 370, ARM_INS_VRSHR = 371, ARM_INS_VRSQRTE = 372, ARM_INS_VRSQRTS = 373, ARM_INS_VRSRA = 374, ARM_INS_VRSUBHN = 375, ARM_INS_VSELEQ = 376, ARM_INS_VSELGE = 377, ARM_INS_VSELGT = 378, ARM_INS_VSELVS = 379, ARM_INS_VSHLL = 380, ARM_INS_VSHL = 381, ARM_INS_VSHRN = 382, ARM_INS_VSHR = 383, ARM_INS_VSLI = 384, ARM_INS_VSQRT = 385, ARM_INS_VSRA = 386, ARM_INS_VSRI = 387, ARM_INS_VST1 = 388, ARM_INS_VST2 = 389, ARM_INS_VST3 = 390, ARM_INS_VST4 = 391, ARM_INS_VSTMDB = 392, ARM_INS_VSTMIA = 393, ARM_INS_VSTR = 394, ARM_INS_VSUB = 395, ARM_INS_VSUBHN = 396, ARM_INS_VSUBL = 397, ARM_INS_VSUBW = 398, ARM_INS_VSWP = 399, ARM_INS_VTBL = 400, ARM_INS_VTBX = 401, ARM_INS_VCVTR = 402, ARM_INS_VTRN = 403, ARM_INS_VTST = 404, ARM_INS_VUZP = 405, ARM_INS_VZIP = 406, ARM_INS_ADDW = 407, ARM_INS_ASR = 408, ARM_INS_DCPS1 = 409, ARM_INS_DCPS2 = 410, ARM_INS_DCPS3 = 411, ARM_INS_IT = 412, ARM_INS_LSL = 413, ARM_INS_LSR = 414, ARM_INS_ORN = 415, ARM_INS_ROR = 416, ARM_INS_RRX = 417, ARM_INS_SUBW = 418, ARM_INS_TBB = 419, ARM_INS_TBH = 420, ARM_INS_CBNZ = 421, ARM_INS_CBZ = 422, ARM_INS_POP = 423, ARM_INS_PUSH = 424, ARM_INS_NOP = 425, ARM_INS_YIELD = 426, ARM_INS_WFE = 427, ARM_INS_WFI = 428, ARM_INS_SEV = 429, ARM_INS_SEVL = 430, ARM_INS_VPUSH = 431, ARM_INS_VPOP = 432, ARM_INS_ENDING = 433, } pub mod arm_insn_group { #[doc = " Group of ARM instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const ARM_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const ARM_GRP_JUMP: Type = 1; #[doc = "< = CS_GRP_CALL"] pub const ARM_GRP_CALL: Type = 2; #[doc = "< = CS_GRP_INT"] pub const ARM_GRP_INT: Type = 4; #[doc = "< = CS_GRP_PRIVILEGE"] pub const ARM_GRP_PRIVILEGE: Type = 6; #[doc = "< = CS_GRP_BRANCH_RELATIVE"] pub const ARM_GRP_BRANCH_RELATIVE: Type = 7; pub const ARM_GRP_CRYPTO: Type = 128; pub const ARM_GRP_DATABARRIER: Type = 129; pub const ARM_GRP_DIVIDE: Type = 130; pub const ARM_GRP_FPARMV8: Type = 131; pub const ARM_GRP_MULTPRO: Type = 132; pub const ARM_GRP_NEON: Type = 133; pub const ARM_GRP_T2EXTRACTPACK: Type = 134; pub const ARM_GRP_THUMB2DSP: Type = 135; pub const ARM_GRP_TRUSTZONE: Type = 136; pub const ARM_GRP_V4T: Type = 137; pub const ARM_GRP_V5T: Type = 138; pub const ARM_GRP_V5TE: Type = 139; pub const ARM_GRP_V6: Type = 140; pub const ARM_GRP_V6T2: Type = 141; pub const ARM_GRP_V7: Type = 142; pub const ARM_GRP_V8: Type = 143; pub const ARM_GRP_VFP2: Type = 144; pub const ARM_GRP_VFP3: Type = 145; pub const ARM_GRP_VFP4: Type = 146; pub const ARM_GRP_ARM: Type = 147; pub const ARM_GRP_MCLASS: Type = 148; pub const ARM_GRP_NOTMCLASS: Type = 149; pub const ARM_GRP_THUMB: Type = 150; pub const ARM_GRP_THUMB1ONLY: Type = 151; pub const ARM_GRP_THUMB2: Type = 152; pub const ARM_GRP_PREV8: Type = 153; pub const ARM_GRP_FPVMLX: Type = 154; pub const ARM_GRP_MULOPS: Type = 155; pub const ARM_GRP_CRC: Type = 156; pub const ARM_GRP_DPVFP: Type = 157; pub const ARM_GRP_V6M: Type = 158; pub const ARM_GRP_VIRTUALIZATION: Type = 159; pub const ARM_GRP_ENDING: Type = 160; } #[repr(u32)] #[doc = " ARM64 shift type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_shifter { ARM64_SFT_INVALID = 0, ARM64_SFT_LSL = 1, ARM64_SFT_MSL = 2, ARM64_SFT_LSR = 3, ARM64_SFT_ASR = 4, ARM64_SFT_ROR = 5, } #[repr(u32)] #[doc = " ARM64 extender type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_extender { ARM64_EXT_INVALID = 0, ARM64_EXT_UXTB = 1, ARM64_EXT_UXTH = 2, ARM64_EXT_UXTW = 3, ARM64_EXT_UXTX = 4, ARM64_EXT_SXTB = 5, ARM64_EXT_SXTH = 6, ARM64_EXT_SXTW = 7, ARM64_EXT_SXTX = 8, } #[repr(u32)] #[doc = " ARM64 condition code"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_cc { ARM64_CC_INVALID = 0, #[doc = "< Equal"] ARM64_CC_EQ = 1, #[doc = "< Not equal: Not equal, or unordered"] ARM64_CC_NE = 2, #[doc = "< Unsigned higher or same: >, ==, or unordered"] ARM64_CC_HS = 3, #[doc = "< Unsigned lower or same: Less than"] ARM64_CC_LO = 4, #[doc = "< Minus, negative: Less than"] ARM64_CC_MI = 5, #[doc = "< Plus, positive or zero: >, ==, or unordered"] ARM64_CC_PL = 6, #[doc = "< Overflow: Unordered"] ARM64_CC_VS = 7, #[doc = "< No overflow: Ordered"] ARM64_CC_VC = 8, #[doc = "< Unsigned higher: Greater than, or unordered"] ARM64_CC_HI = 9, #[doc = "< Unsigned lower or same: Less than or equal"] ARM64_CC_LS = 10, #[doc = "< Greater than or equal: Greater than or equal"] ARM64_CC_GE = 11, #[doc = "< Less than: Less than, or unordered"] ARM64_CC_LT = 12, #[doc = "< Signed greater than: Greater than"] ARM64_CC_GT = 13, #[doc = "< Signed less than or equal: <, ==, or unordered"] ARM64_CC_LE = 14, #[doc = "< Always (unconditional): Always (unconditional)"] ARM64_CC_AL = 15, #[doc = "< Always (unconditional): Always (unconditional)"] ARM64_CC_NV = 16, } #[repr(u32)] #[doc = " System registers"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_sysreg { ARM64_SYSREG_INVALID = 0, ARM64_SYSREG_MDCCSR_EL0 = 38920, ARM64_SYSREG_DBGDTRRX_EL0 = 38952, ARM64_SYSREG_MDRAR_EL1 = 32896, ARM64_SYSREG_OSLSR_EL1 = 32908, ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 33782, ARM64_SYSREG_PMCEID0_EL0 = 56550, ARM64_SYSREG_PMCEID1_EL0 = 56551, ARM64_SYSREG_MIDR_EL1 = 49152, ARM64_SYSREG_CCSIDR_EL1 = 51200, ARM64_SYSREG_CLIDR_EL1 = 51201, ARM64_SYSREG_CTR_EL0 = 55297, ARM64_SYSREG_MPIDR_EL1 = 49157, ARM64_SYSREG_REVIDR_EL1 = 49158, ARM64_SYSREG_AIDR_EL1 = 51207, ARM64_SYSREG_DCZID_EL0 = 55303, ARM64_SYSREG_ID_PFR0_EL1 = 49160, ARM64_SYSREG_ID_PFR1_EL1 = 49161, ARM64_SYSREG_ID_DFR0_EL1 = 49162, ARM64_SYSREG_ID_AFR0_EL1 = 49163, ARM64_SYSREG_ID_MMFR0_EL1 = 49164, ARM64_SYSREG_ID_MMFR1_EL1 = 49165, ARM64_SYSREG_ID_MMFR2_EL1 = 49166, ARM64_SYSREG_ID_MMFR3_EL1 = 49167, ARM64_SYSREG_ID_ISAR0_EL1 = 49168, ARM64_SYSREG_ID_ISAR1_EL1 = 49169, ARM64_SYSREG_ID_ISAR2_EL1 = 49170, ARM64_SYSREG_ID_ISAR3_EL1 = 49171, ARM64_SYSREG_ID_ISAR4_EL1 = 49172, ARM64_SYSREG_ID_ISAR5_EL1 = 49173, ARM64_SYSREG_ID_A64PFR0_EL1 = 49184, ARM64_SYSREG_ID_A64PFR1_EL1 = 49185, ARM64_SYSREG_ID_A64DFR0_EL1 = 49192, ARM64_SYSREG_ID_A64DFR1_EL1 = 49193, ARM64_SYSREG_ID_A64AFR0_EL1 = 49196, ARM64_SYSREG_ID_A64AFR1_EL1 = 49197, ARM64_SYSREG_ID_A64ISAR0_EL1 = 49200, ARM64_SYSREG_ID_A64ISAR1_EL1 = 49201, ARM64_SYSREG_ID_A64MMFR0_EL1 = 49208, ARM64_SYSREG_ID_A64MMFR1_EL1 = 49209, ARM64_SYSREG_MVFR0_EL1 = 49176, ARM64_SYSREG_MVFR1_EL1 = 49177, ARM64_SYSREG_MVFR2_EL1 = 49178, ARM64_SYSREG_RVBAR_EL1 = 50689, ARM64_SYSREG_RVBAR_EL2 = 58881, ARM64_SYSREG_RVBAR_EL3 = 62977, ARM64_SYSREG_ISR_EL1 = 50696, ARM64_SYSREG_CNTPCT_EL0 = 57089, ARM64_SYSREG_CNTVCT_EL0 = 57090, ARM64_SYSREG_TRCSTATR = 34840, ARM64_SYSREG_TRCIDR8 = 34822, ARM64_SYSREG_TRCIDR9 = 34830, ARM64_SYSREG_TRCIDR10 = 34838, ARM64_SYSREG_TRCIDR11 = 34846, ARM64_SYSREG_TRCIDR12 = 34854, ARM64_SYSREG_TRCIDR13 = 34862, ARM64_SYSREG_TRCIDR0 = 34887, ARM64_SYSREG_TRCIDR1 = 34895, ARM64_SYSREG_TRCIDR2 = 34903, ARM64_SYSREG_TRCIDR3 = 34911, ARM64_SYSREG_TRCIDR4 = 34919, ARM64_SYSREG_TRCIDR5 = 34927, ARM64_SYSREG_TRCIDR6 = 34935, ARM64_SYSREG_TRCIDR7 = 34943, ARM64_SYSREG_TRCOSLSR = 34956, ARM64_SYSREG_TRCPDSR = 34988, ARM64_SYSREG_TRCDEVAFF0 = 35798, ARM64_SYSREG_TRCDEVAFF1 = 35806, ARM64_SYSREG_TRCLSR = 35822, ARM64_SYSREG_TRCAUTHSTATUS = 35830, ARM64_SYSREG_TRCDEVARCH = 35838, ARM64_SYSREG_TRCDEVID = 35735, ARM64_SYSREG_TRCDEVTYPE = 35743, ARM64_SYSREG_TRCPIDR4 = 35751, ARM64_SYSREG_TRCPIDR5 = 35759, ARM64_SYSREG_TRCPIDR6 = 35767, ARM64_SYSREG_TRCPIDR7 = 35775, ARM64_SYSREG_TRCPIDR0 = 35783, ARM64_SYSREG_TRCPIDR1 = 35791, ARM64_SYSREG_TRCPIDR2 = 35799, ARM64_SYSREG_TRCPIDR3 = 35807, ARM64_SYSREG_TRCCIDR0 = 35815, ARM64_SYSREG_TRCCIDR1 = 35823, ARM64_SYSREG_TRCCIDR2 = 35831, ARM64_SYSREG_TRCCIDR3 = 35839, ARM64_SYSREG_ICC_IAR1_EL1 = 50784, ARM64_SYSREG_ICC_IAR0_EL1 = 50752, ARM64_SYSREG_ICC_HPPIR1_EL1 = 50786, ARM64_SYSREG_ICC_HPPIR0_EL1 = 50754, ARM64_SYSREG_ICC_RPR_EL1 = 50779, ARM64_SYSREG_ICH_VTR_EL2 = 58969, ARM64_SYSREG_ICH_EISR_EL2 = 58971, ARM64_SYSREG_ICH_ELSR_EL2 = 58973, } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_msr_reg { ARM64_SYSREG_DBGDTRTX_EL0 = 38952, ARM64_SYSREG_OSLAR_EL1 = 32900, ARM64_SYSREG_PMSWINC_EL0 = 56548, ARM64_SYSREG_TRCOSLAR = 34948, ARM64_SYSREG_TRCLAR = 35814, ARM64_SYSREG_ICC_EOIR1_EL1 = 50785, ARM64_SYSREG_ICC_EOIR0_EL1 = 50753, ARM64_SYSREG_ICC_DIR_EL1 = 50777, ARM64_SYSREG_ICC_SGI1R_EL1 = 50781, ARM64_SYSREG_ICC_ASGI1R_EL1 = 50782, ARM64_SYSREG_ICC_SGI0R_EL1 = 50783, } #[repr(u32)] #[doc = " System PState Field (MSR instruction)"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_pstate { ARM64_PSTATE_INVALID = 0, ARM64_PSTATE_SPSEL = 5, ARM64_PSTATE_DAIFSET = 30, ARM64_PSTATE_DAIFCLR = 31, } #[repr(u32)] #[doc = " Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn)"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_vas { ARM64_VAS_INVALID = 0, ARM64_VAS_8B = 1, ARM64_VAS_16B = 2, ARM64_VAS_4H = 3, ARM64_VAS_8H = 4, ARM64_VAS_2S = 5, ARM64_VAS_4S = 6, ARM64_VAS_1D = 7, ARM64_VAS_2D = 8, ARM64_VAS_1Q = 9, } #[repr(u32)] #[doc = " Vector element size specifier"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_vess { ARM64_VESS_INVALID = 0, ARM64_VESS_B = 1, ARM64_VESS_H = 2, ARM64_VESS_S = 3, ARM64_VESS_D = 4, } #[repr(u32)] #[doc = " Memory barrier operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_barrier_op { ARM64_BARRIER_INVALID = 0, ARM64_BARRIER_OSHLD = 1, ARM64_BARRIER_OSHST = 2, ARM64_BARRIER_OSH = 3, ARM64_BARRIER_NSHLD = 5, ARM64_BARRIER_NSHST = 6, ARM64_BARRIER_NSH = 7, ARM64_BARRIER_ISHLD = 9, ARM64_BARRIER_ISHST = 10, ARM64_BARRIER_ISH = 11, ARM64_BARRIER_LD = 13, ARM64_BARRIER_ST = 14, ARM64_BARRIER_SY = 15, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] ARM64_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] ARM64_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] ARM64_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] ARM64_OP_MEM = 3, #[doc = "< = CS_OP_FP (Floating-Point operand)."] ARM64_OP_FP = 4, #[doc = "< C-Immediate"] ARM64_OP_CIMM = 64, #[doc = "< MRS register operand."] ARM64_OP_REG_MRS = 65, #[doc = "< MSR register operand."] ARM64_OP_REG_MSR = 66, #[doc = "< PState operand."] ARM64_OP_PSTATE = 67, #[doc = "< SYS operand for IC/DC/AT/TLBI instructions."] ARM64_OP_SYS = 68, #[doc = "< Prefetch operand (PRFM)."] ARM64_OP_PREFETCH = 69, #[doc = "< Memory barrier operand (ISB/DMB/DSB instructions)."] ARM64_OP_BARRIER = 70, } #[repr(u32)] #[doc = " TLBI operations"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_tlbi_op { ARM64_TLBI_INVALID = 0, ARM64_TLBI_VMALLE1IS = 1, ARM64_TLBI_VAE1IS = 2, ARM64_TLBI_ASIDE1IS = 3, ARM64_TLBI_VAAE1IS = 4, ARM64_TLBI_VALE1IS = 5, ARM64_TLBI_VAALE1IS = 6, ARM64_TLBI_ALLE2IS = 7, ARM64_TLBI_VAE2IS = 8, ARM64_TLBI_ALLE1IS = 9, ARM64_TLBI_VALE2IS = 10, ARM64_TLBI_VMALLS12E1IS = 11, ARM64_TLBI_ALLE3IS = 12, ARM64_TLBI_VAE3IS = 13, ARM64_TLBI_VALE3IS = 14, ARM64_TLBI_IPAS2E1IS = 15, ARM64_TLBI_IPAS2LE1IS = 16, ARM64_TLBI_IPAS2E1 = 17, ARM64_TLBI_IPAS2LE1 = 18, ARM64_TLBI_VMALLE1 = 19, ARM64_TLBI_VAE1 = 20, ARM64_TLBI_ASIDE1 = 21, ARM64_TLBI_VAAE1 = 22, ARM64_TLBI_VALE1 = 23, ARM64_TLBI_VAALE1 = 24, ARM64_TLBI_ALLE2 = 25, ARM64_TLBI_VAE2 = 26, ARM64_TLBI_ALLE1 = 27, ARM64_TLBI_VALE2 = 28, ARM64_TLBI_VMALLS12E1 = 29, ARM64_TLBI_ALLE3 = 30, ARM64_TLBI_VAE3 = 31, ARM64_TLBI_VALE3 = 32, } #[repr(u32)] #[doc = " AT operations"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_at_op { ARM64_AT_S1E1R = 0, ARM64_AT_S1E1W = 1, ARM64_AT_S1E0R = 2, ARM64_AT_S1E0W = 3, ARM64_AT_S1E2R = 4, ARM64_AT_S1E2W = 5, ARM64_AT_S12E1R = 6, ARM64_AT_S12E1W = 7, ARM64_AT_S12E0R = 8, ARM64_AT_S12E0W = 9, ARM64_AT_S1E3R = 10, ARM64_AT_S1E3W = 11, } #[repr(u32)] #[doc = " DC operations"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_dc_op { ARM64_DC_INVALID = 0, ARM64_DC_ZVA = 1, ARM64_DC_IVAC = 2, ARM64_DC_ISW = 3, ARM64_DC_CVAC = 4, ARM64_DC_CSW = 5, ARM64_DC_CVAU = 6, ARM64_DC_CIVAC = 7, ARM64_DC_CISW = 8, } #[repr(u32)] #[doc = " IC operations"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_ic_op { ARM64_IC_INVALID = 0, ARM64_IC_IALLUIS = 1, ARM64_IC_IALLU = 2, ARM64_IC_IVAU = 3, } #[repr(u32)] #[doc = " Prefetch operations (PRFM)"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_prefetch_op { ARM64_PRFM_INVALID = 0, ARM64_PRFM_PLDL1KEEP = 1, ARM64_PRFM_PLDL1STRM = 2, ARM64_PRFM_PLDL2KEEP = 3, ARM64_PRFM_PLDL2STRM = 4, ARM64_PRFM_PLDL3KEEP = 5, ARM64_PRFM_PLDL3STRM = 6, ARM64_PRFM_PLIL1KEEP = 9, ARM64_PRFM_PLIL1STRM = 10, ARM64_PRFM_PLIL2KEEP = 11, ARM64_PRFM_PLIL2STRM = 12, ARM64_PRFM_PLIL3KEEP = 13, ARM64_PRFM_PLIL3STRM = 14, ARM64_PRFM_PSTL1KEEP = 17, ARM64_PRFM_PSTL1STRM = 18, ARM64_PRFM_PSTL2KEEP = 19, ARM64_PRFM_PSTL2STRM = 20, ARM64_PRFM_PSTL3KEEP = 21, ARM64_PRFM_PSTL3STRM = 22, } pub mod arm64_reg { #[doc = " ARM64 registers"] pub type Type = u32; pub const ARM64_REG_INVALID: Type = 0; pub const ARM64_REG_X29: Type = 1; pub const ARM64_REG_X30: Type = 2; pub const ARM64_REG_NZCV: Type = 3; pub const ARM64_REG_SP: Type = 4; pub const ARM64_REG_WSP: Type = 5; pub const ARM64_REG_WZR: Type = 6; pub const ARM64_REG_XZR: Type = 7; pub const ARM64_REG_B0: Type = 8; pub const ARM64_REG_B1: Type = 9; pub const ARM64_REG_B2: Type = 10; pub const ARM64_REG_B3: Type = 11; pub const ARM64_REG_B4: Type = 12; pub const ARM64_REG_B5: Type = 13; pub const ARM64_REG_B6: Type = 14; pub const ARM64_REG_B7: Type = 15; pub const ARM64_REG_B8: Type = 16; pub const ARM64_REG_B9: Type = 17; pub const ARM64_REG_B10: Type = 18; pub const ARM64_REG_B11: Type = 19; pub const ARM64_REG_B12: Type = 20; pub const ARM64_REG_B13: Type = 21; pub const ARM64_REG_B14: Type = 22; pub const ARM64_REG_B15: Type = 23; pub const ARM64_REG_B16: Type = 24; pub const ARM64_REG_B17: Type = 25; pub const ARM64_REG_B18: Type = 26; pub const ARM64_REG_B19: Type = 27; pub const ARM64_REG_B20: Type = 28; pub const ARM64_REG_B21: Type = 29; pub const ARM64_REG_B22: Type = 30; pub const ARM64_REG_B23: Type = 31; pub const ARM64_REG_B24: Type = 32; pub const ARM64_REG_B25: Type = 33; pub const ARM64_REG_B26: Type = 34; pub const ARM64_REG_B27: Type = 35; pub const ARM64_REG_B28: Type = 36; pub const ARM64_REG_B29: Type = 37; pub const ARM64_REG_B30: Type = 38; pub const ARM64_REG_B31: Type = 39; pub const ARM64_REG_D0: Type = 40; pub const ARM64_REG_D1: Type = 41; pub const ARM64_REG_D2: Type = 42; pub const ARM64_REG_D3: Type = 43; pub const ARM64_REG_D4: Type = 44; pub const ARM64_REG_D5: Type = 45; pub const ARM64_REG_D6: Type = 46; pub const ARM64_REG_D7: Type = 47; pub const ARM64_REG_D8: Type = 48; pub const ARM64_REG_D9: Type = 49; pub const ARM64_REG_D10: Type = 50; pub const ARM64_REG_D11: Type = 51; pub const ARM64_REG_D12: Type = 52; pub const ARM64_REG_D13: Type = 53; pub const ARM64_REG_D14: Type = 54; pub const ARM64_REG_D15: Type = 55; pub const ARM64_REG_D16: Type = 56; pub const ARM64_REG_D17: Type = 57; pub const ARM64_REG_D18: Type = 58; pub const ARM64_REG_D19: Type = 59; pub const ARM64_REG_D20: Type = 60; pub const ARM64_REG_D21: Type = 61; pub const ARM64_REG_D22: Type = 62; pub const ARM64_REG_D23: Type = 63; pub const ARM64_REG_D24: Type = 64; pub const ARM64_REG_D25: Type = 65; pub const ARM64_REG_D26: Type = 66; pub const ARM64_REG_D27: Type = 67; pub const ARM64_REG_D28: Type = 68; pub const ARM64_REG_D29: Type = 69; pub const ARM64_REG_D30: Type = 70; pub const ARM64_REG_D31: Type = 71; pub const ARM64_REG_H0: Type = 72; pub const ARM64_REG_H1: Type = 73; pub const ARM64_REG_H2: Type = 74; pub const ARM64_REG_H3: Type = 75; pub const ARM64_REG_H4: Type = 76; pub const ARM64_REG_H5: Type = 77; pub const ARM64_REG_H6: Type = 78; pub const ARM64_REG_H7: Type = 79; pub const ARM64_REG_H8: Type = 80; pub const ARM64_REG_H9: Type = 81; pub const ARM64_REG_H10: Type = 82; pub const ARM64_REG_H11: Type = 83; pub const ARM64_REG_H12: Type = 84; pub const ARM64_REG_H13: Type = 85; pub const ARM64_REG_H14: Type = 86; pub const ARM64_REG_H15: Type = 87; pub const ARM64_REG_H16: Type = 88; pub const ARM64_REG_H17: Type = 89; pub const ARM64_REG_H18: Type = 90; pub const ARM64_REG_H19: Type = 91; pub const ARM64_REG_H20: Type = 92; pub const ARM64_REG_H21: Type = 93; pub const ARM64_REG_H22: Type = 94; pub const ARM64_REG_H23: Type = 95; pub const ARM64_REG_H24: Type = 96; pub const ARM64_REG_H25: Type = 97; pub const ARM64_REG_H26: Type = 98; pub const ARM64_REG_H27: Type = 99; pub const ARM64_REG_H28: Type = 100; pub const ARM64_REG_H29: Type = 101; pub const ARM64_REG_H30: Type = 102; pub const ARM64_REG_H31: Type = 103; pub const ARM64_REG_Q0: Type = 104; pub const ARM64_REG_Q1: Type = 105; pub const ARM64_REG_Q2: Type = 106; pub const ARM64_REG_Q3: Type = 107; pub const ARM64_REG_Q4: Type = 108; pub const ARM64_REG_Q5: Type = 109; pub const ARM64_REG_Q6: Type = 110; pub const ARM64_REG_Q7: Type = 111; pub const ARM64_REG_Q8: Type = 112; pub const ARM64_REG_Q9: Type = 113; pub const ARM64_REG_Q10: Type = 114; pub const ARM64_REG_Q11: Type = 115; pub const ARM64_REG_Q12: Type = 116; pub const ARM64_REG_Q13: Type = 117; pub const ARM64_REG_Q14: Type = 118; pub const ARM64_REG_Q15: Type = 119; pub const ARM64_REG_Q16: Type = 120; pub const ARM64_REG_Q17: Type = 121; pub const ARM64_REG_Q18: Type = 122; pub const ARM64_REG_Q19: Type = 123; pub const ARM64_REG_Q20: Type = 124; pub const ARM64_REG_Q21: Type = 125; pub const ARM64_REG_Q22: Type = 126; pub const ARM64_REG_Q23: Type = 127; pub const ARM64_REG_Q24: Type = 128; pub const ARM64_REG_Q25: Type = 129; pub const ARM64_REG_Q26: Type = 130; pub const ARM64_REG_Q27: Type = 131; pub const ARM64_REG_Q28: Type = 132; pub const ARM64_REG_Q29: Type = 133; pub const ARM64_REG_Q30: Type = 134; pub const ARM64_REG_Q31: Type = 135; pub const ARM64_REG_S0: Type = 136; pub const ARM64_REG_S1: Type = 137; pub const ARM64_REG_S2: Type = 138; pub const ARM64_REG_S3: Type = 139; pub const ARM64_REG_S4: Type = 140; pub const ARM64_REG_S5: Type = 141; pub const ARM64_REG_S6: Type = 142; pub const ARM64_REG_S7: Type = 143; pub const ARM64_REG_S8: Type = 144; pub const ARM64_REG_S9: Type = 145; pub const ARM64_REG_S10: Type = 146; pub const ARM64_REG_S11: Type = 147; pub const ARM64_REG_S12: Type = 148; pub const ARM64_REG_S13: Type = 149; pub const ARM64_REG_S14: Type = 150; pub const ARM64_REG_S15: Type = 151; pub const ARM64_REG_S16: Type = 152; pub const ARM64_REG_S17: Type = 153; pub const ARM64_REG_S18: Type = 154; pub const ARM64_REG_S19: Type = 155; pub const ARM64_REG_S20: Type = 156; pub const ARM64_REG_S21: Type = 157; pub const ARM64_REG_S22: Type = 158; pub const ARM64_REG_S23: Type = 159; pub const ARM64_REG_S24: Type = 160; pub const ARM64_REG_S25: Type = 161; pub const ARM64_REG_S26: Type = 162; pub const ARM64_REG_S27: Type = 163; pub const ARM64_REG_S28: Type = 164; pub const ARM64_REG_S29: Type = 165; pub const ARM64_REG_S30: Type = 166; pub const ARM64_REG_S31: Type = 167; pub const ARM64_REG_W0: Type = 168; pub const ARM64_REG_W1: Type = 169; pub const ARM64_REG_W2: Type = 170; pub const ARM64_REG_W3: Type = 171; pub const ARM64_REG_W4: Type = 172; pub const ARM64_REG_W5: Type = 173; pub const ARM64_REG_W6: Type = 174; pub const ARM64_REG_W7: Type = 175; pub const ARM64_REG_W8: Type = 176; pub const ARM64_REG_W9: Type = 177; pub const ARM64_REG_W10: Type = 178; pub const ARM64_REG_W11: Type = 179; pub const ARM64_REG_W12: Type = 180; pub const ARM64_REG_W13: Type = 181; pub const ARM64_REG_W14: Type = 182; pub const ARM64_REG_W15: Type = 183; pub const ARM64_REG_W16: Type = 184; pub const ARM64_REG_W17: Type = 185; pub const ARM64_REG_W18: Type = 186; pub const ARM64_REG_W19: Type = 187; pub const ARM64_REG_W20: Type = 188; pub const ARM64_REG_W21: Type = 189; pub const ARM64_REG_W22: Type = 190; pub const ARM64_REG_W23: Type = 191; pub const ARM64_REG_W24: Type = 192; pub const ARM64_REG_W25: Type = 193; pub const ARM64_REG_W26: Type = 194; pub const ARM64_REG_W27: Type = 195; pub const ARM64_REG_W28: Type = 196; pub const ARM64_REG_W29: Type = 197; pub const ARM64_REG_W30: Type = 198; pub const ARM64_REG_X0: Type = 199; pub const ARM64_REG_X1: Type = 200; pub const ARM64_REG_X2: Type = 201; pub const ARM64_REG_X3: Type = 202; pub const ARM64_REG_X4: Type = 203; pub const ARM64_REG_X5: Type = 204; pub const ARM64_REG_X6: Type = 205; pub const ARM64_REG_X7: Type = 206; pub const ARM64_REG_X8: Type = 207; pub const ARM64_REG_X9: Type = 208; pub const ARM64_REG_X10: Type = 209; pub const ARM64_REG_X11: Type = 210; pub const ARM64_REG_X12: Type = 211; pub const ARM64_REG_X13: Type = 212; pub const ARM64_REG_X14: Type = 213; pub const ARM64_REG_X15: Type = 214; pub const ARM64_REG_X16: Type = 215; pub const ARM64_REG_X17: Type = 216; pub const ARM64_REG_X18: Type = 217; pub const ARM64_REG_X19: Type = 218; pub const ARM64_REG_X20: Type = 219; pub const ARM64_REG_X21: Type = 220; pub const ARM64_REG_X22: Type = 221; pub const ARM64_REG_X23: Type = 222; pub const ARM64_REG_X24: Type = 223; pub const ARM64_REG_X25: Type = 224; pub const ARM64_REG_X26: Type = 225; pub const ARM64_REG_X27: Type = 226; pub const ARM64_REG_X28: Type = 227; pub const ARM64_REG_V0: Type = 228; pub const ARM64_REG_V1: Type = 229; pub const ARM64_REG_V2: Type = 230; pub const ARM64_REG_V3: Type = 231; pub const ARM64_REG_V4: Type = 232; pub const ARM64_REG_V5: Type = 233; pub const ARM64_REG_V6: Type = 234; pub const ARM64_REG_V7: Type = 235; pub const ARM64_REG_V8: Type = 236; pub const ARM64_REG_V9: Type = 237; pub const ARM64_REG_V10: Type = 238; pub const ARM64_REG_V11: Type = 239; pub const ARM64_REG_V12: Type = 240; pub const ARM64_REG_V13: Type = 241; pub const ARM64_REG_V14: Type = 242; pub const ARM64_REG_V15: Type = 243; pub const ARM64_REG_V16: Type = 244; pub const ARM64_REG_V17: Type = 245; pub const ARM64_REG_V18: Type = 246; pub const ARM64_REG_V19: Type = 247; pub const ARM64_REG_V20: Type = 248; pub const ARM64_REG_V21: Type = 249; pub const ARM64_REG_V22: Type = 250; pub const ARM64_REG_V23: Type = 251; pub const ARM64_REG_V24: Type = 252; pub const ARM64_REG_V25: Type = 253; pub const ARM64_REG_V26: Type = 254; pub const ARM64_REG_V27: Type = 255; pub const ARM64_REG_V28: Type = 256; pub const ARM64_REG_V29: Type = 257; pub const ARM64_REG_V30: Type = 258; pub const ARM64_REG_V31: Type = 259; pub const ARM64_REG_ENDING: Type = 260; pub const ARM64_REG_IP0: Type = 215; pub const ARM64_REG_IP1: Type = 216; pub const ARM64_REG_FP: Type = 1; pub const ARM64_REG_LR: Type = 2; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with ARM64_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct arm64_op_mem { #[doc = "< base register"] pub base: arm64_reg::Type, #[doc = "< index register"] pub index: arm64_reg::Type, #[doc = "< displacement/offset value"] pub disp: i32, } impl Clone for arm64_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_arm64_op { #[doc = "< Vector Index for some vector operands (or -1 if irrelevant)"] pub vector_index: libc::c_int, #[doc = "< Vector Arrangement Specifier"] pub vas: arm64_vas, #[doc = "< Vector Element Size Specifier"] pub vess: arm64_vess, pub shift: cs_arm64_op__bindgen_ty_1, #[doc = "< extender type of this operand"] pub ext: arm64_extender, #[doc = "< operand type"] pub type_: arm64_op_type, pub __bindgen_anon_1: cs_arm64_op__bindgen_ty_2, #[doc = " How is this operand accessed? (READ, WRITE or READ|WRITE)"] #[doc = " This field is combined of cs_ac_type."] #[doc = " NOTE: this field is irrelevant if engine is compiled in DIET mode."] pub access: u8, } #[repr(C)] #[derive(Debug, Copy)] pub struct cs_arm64_op__bindgen_ty_1 { #[doc = "< shifter type of this operand"] pub type_: arm64_shifter, #[doc = "< shifter value of this operand"] pub value: libc::c_uint, } impl Clone for cs_arm64_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } #[repr(C)] #[derive(Copy)] pub union cs_arm64_op__bindgen_ty_2 { #[doc = "< register value for REG operand"] pub reg: arm64_reg::Type, #[doc = "< immediate value, or index for C-IMM or IMM operand"] pub imm: i64, #[doc = "< floating point value for FP operand"] pub fp: f64, #[doc = "< base/index/scale/disp value for MEM operand"] pub mem: arm64_op_mem, #[doc = "< PState field of MSR instruction."] pub pstate: arm64_pstate, #[doc = "< IC/DC/AT/TLBI operation (see arm64_ic_op, arm64_dc_op, arm64_at_op, arm64_tlbi_op)"] pub sys: libc::c_uint, #[doc = "< PRFM operation."] pub prefetch: arm64_prefetch_op, #[doc = "< Memory barrier operation (ISB/DMB/DSB instructions)."] pub barrier: arm64_barrier_op, _bindgen_union_align: [u64; 2usize], } impl Clone for cs_arm64_op__bindgen_ty_2 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_arm64_op__bindgen_ty_2 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_arm64_op__bindgen_ty_2 {{ union }}") } } impl Clone for cs_arm64_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_arm64_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_arm64_op {{ vector_index: {:?}, vas: {:?}, vess: {:?}, shift: {:?}, ext: {:?}, type: {:?}, __bindgen_anon_1: {:?}, access: {:?} }}" , self . vector_index , self . vas , self . vess , self . shift , self . ext , self . type_ , self . __bindgen_anon_1 , self . access ) } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_arm64 { #[doc = "< conditional code for this insn"] pub cc: arm64_cc, #[doc = "< does this insn update flags?"] pub update_flags: bool, #[doc = "< does this insn request writeback? 'True' means 'yes'"] pub writeback: bool, #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_arm64_op; 8usize], } impl Clone for cs_arm64 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_arm64 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_arm64 {{ cc: {:?}, update_flags: {:?}, writeback: {:?}, op_count: {:?}, operands: {:?} }}" , self . cc , self . update_flags , self . writeback , self . op_count , self . operands ) } } #[repr(u32)] #[doc = " ARM64 instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum arm64_insn { ARM64_INS_INVALID = 0, ARM64_INS_ABS = 1, ARM64_INS_ADC = 2, ARM64_INS_ADDHN = 3, ARM64_INS_ADDHN2 = 4, ARM64_INS_ADDP = 5, ARM64_INS_ADD = 6, ARM64_INS_ADDV = 7, ARM64_INS_ADR = 8, ARM64_INS_ADRP = 9, ARM64_INS_AESD = 10, ARM64_INS_AESE = 11, ARM64_INS_AESIMC = 12, ARM64_INS_AESMC = 13, ARM64_INS_AND = 14, ARM64_INS_ASR = 15, ARM64_INS_B = 16, ARM64_INS_BFM = 17, ARM64_INS_BIC = 18, ARM64_INS_BIF = 19, ARM64_INS_BIT = 20, ARM64_INS_BL = 21, ARM64_INS_BLR = 22, ARM64_INS_BR = 23, ARM64_INS_BRK = 24, ARM64_INS_BSL = 25, ARM64_INS_CBNZ = 26, ARM64_INS_CBZ = 27, ARM64_INS_CCMN = 28, ARM64_INS_CCMP = 29, ARM64_INS_CLREX = 30, ARM64_INS_CLS = 31, ARM64_INS_CLZ = 32, ARM64_INS_CMEQ = 33, ARM64_INS_CMGE = 34, ARM64_INS_CMGT = 35, ARM64_INS_CMHI = 36, ARM64_INS_CMHS = 37, ARM64_INS_CMLE = 38, ARM64_INS_CMLT = 39, ARM64_INS_CMTST = 40, ARM64_INS_CNT = 41, ARM64_INS_MOV = 42, ARM64_INS_CRC32B = 43, ARM64_INS_CRC32CB = 44, ARM64_INS_CRC32CH = 45, ARM64_INS_CRC32CW = 46, ARM64_INS_CRC32CX = 47, ARM64_INS_CRC32H = 48, ARM64_INS_CRC32W = 49, ARM64_INS_CRC32X = 50, ARM64_INS_CSEL = 51, ARM64_INS_CSINC = 52, ARM64_INS_CSINV = 53, ARM64_INS_CSNEG = 54, ARM64_INS_DCPS1 = 55, ARM64_INS_DCPS2 = 56, ARM64_INS_DCPS3 = 57, ARM64_INS_DMB = 58, ARM64_INS_DRPS = 59, ARM64_INS_DSB = 60, ARM64_INS_DUP = 61, ARM64_INS_EON = 62, ARM64_INS_EOR = 63, ARM64_INS_ERET = 64, ARM64_INS_EXTR = 65, ARM64_INS_EXT = 66, ARM64_INS_FABD = 67, ARM64_INS_FABS = 68, ARM64_INS_FACGE = 69, ARM64_INS_FACGT = 70, ARM64_INS_FADD = 71, ARM64_INS_FADDP = 72, ARM64_INS_FCCMP = 73, ARM64_INS_FCCMPE = 74, ARM64_INS_FCMEQ = 75, ARM64_INS_FCMGE = 76, ARM64_INS_FCMGT = 77, ARM64_INS_FCMLE = 78, ARM64_INS_FCMLT = 79, ARM64_INS_FCMP = 80, ARM64_INS_FCMPE = 81, ARM64_INS_FCSEL = 82, ARM64_INS_FCVTAS = 83, ARM64_INS_FCVTAU = 84, ARM64_INS_FCVT = 85, ARM64_INS_FCVTL = 86, ARM64_INS_FCVTL2 = 87, ARM64_INS_FCVTMS = 88, ARM64_INS_FCVTMU = 89, ARM64_INS_FCVTNS = 90, ARM64_INS_FCVTNU = 91, ARM64_INS_FCVTN = 92, ARM64_INS_FCVTN2 = 93, ARM64_INS_FCVTPS = 94, ARM64_INS_FCVTPU = 95, ARM64_INS_FCVTXN = 96, ARM64_INS_FCVTXN2 = 97, ARM64_INS_FCVTZS = 98, ARM64_INS_FCVTZU = 99, ARM64_INS_FDIV = 100, ARM64_INS_FMADD = 101, ARM64_INS_FMAX = 102, ARM64_INS_FMAXNM = 103, ARM64_INS_FMAXNMP = 104, ARM64_INS_FMAXNMV = 105, ARM64_INS_FMAXP = 106, ARM64_INS_FMAXV = 107, ARM64_INS_FMIN = 108, ARM64_INS_FMINNM = 109, ARM64_INS_FMINNMP = 110, ARM64_INS_FMINNMV = 111, ARM64_INS_FMINP = 112, ARM64_INS_FMINV = 113, ARM64_INS_FMLA = 114, ARM64_INS_FMLS = 115, ARM64_INS_FMOV = 116, ARM64_INS_FMSUB = 117, ARM64_INS_FMUL = 118, ARM64_INS_FMULX = 119, ARM64_INS_FNEG = 120, ARM64_INS_FNMADD = 121, ARM64_INS_FNMSUB = 122, ARM64_INS_FNMUL = 123, ARM64_INS_FRECPE = 124, ARM64_INS_FRECPS = 125, ARM64_INS_FRECPX = 126, ARM64_INS_FRINTA = 127, ARM64_INS_FRINTI = 128, ARM64_INS_FRINTM = 129, ARM64_INS_FRINTN = 130, ARM64_INS_FRINTP = 131, ARM64_INS_FRINTX = 132, ARM64_INS_FRINTZ = 133, ARM64_INS_FRSQRTE = 134, ARM64_INS_FRSQRTS = 135, ARM64_INS_FSQRT = 136, ARM64_INS_FSUB = 137, ARM64_INS_HINT = 138, ARM64_INS_HLT = 139, ARM64_INS_HVC = 140, ARM64_INS_INS = 141, ARM64_INS_ISB = 142, ARM64_INS_LD1 = 143, ARM64_INS_LD1R = 144, ARM64_INS_LD2R = 145, ARM64_INS_LD2 = 146, ARM64_INS_LD3R = 147, ARM64_INS_LD3 = 148, ARM64_INS_LD4 = 149, ARM64_INS_LD4R = 150, ARM64_INS_LDARB = 151, ARM64_INS_LDARH = 152, ARM64_INS_LDAR = 153, ARM64_INS_LDAXP = 154, ARM64_INS_LDAXRB = 155, ARM64_INS_LDAXRH = 156, ARM64_INS_LDAXR = 157, ARM64_INS_LDNP = 158, ARM64_INS_LDP = 159, ARM64_INS_LDPSW = 160, ARM64_INS_LDRB = 161, ARM64_INS_LDR = 162, ARM64_INS_LDRH = 163, ARM64_INS_LDRSB = 164, ARM64_INS_LDRSH = 165, ARM64_INS_LDRSW = 166, ARM64_INS_LDTRB = 167, ARM64_INS_LDTRH = 168, ARM64_INS_LDTRSB = 169, ARM64_INS_LDTRSH = 170, ARM64_INS_LDTRSW = 171, ARM64_INS_LDTR = 172, ARM64_INS_LDURB = 173, ARM64_INS_LDUR = 174, ARM64_INS_LDURH = 175, ARM64_INS_LDURSB = 176, ARM64_INS_LDURSH = 177, ARM64_INS_LDURSW = 178, ARM64_INS_LDXP = 179, ARM64_INS_LDXRB = 180, ARM64_INS_LDXRH = 181, ARM64_INS_LDXR = 182, ARM64_INS_LSL = 183, ARM64_INS_LSR = 184, ARM64_INS_MADD = 185, ARM64_INS_MLA = 186, ARM64_INS_MLS = 187, ARM64_INS_MOVI = 188, ARM64_INS_MOVK = 189, ARM64_INS_MOVN = 190, ARM64_INS_MOVZ = 191, ARM64_INS_MRS = 192, ARM64_INS_MSR = 193, ARM64_INS_MSUB = 194, ARM64_INS_MUL = 195, ARM64_INS_MVNI = 196, ARM64_INS_NEG = 197, ARM64_INS_NOT = 198, ARM64_INS_ORN = 199, ARM64_INS_ORR = 200, ARM64_INS_PMULL2 = 201, ARM64_INS_PMULL = 202, ARM64_INS_PMUL = 203, ARM64_INS_PRFM = 204, ARM64_INS_PRFUM = 205, ARM64_INS_RADDHN = 206, ARM64_INS_RADDHN2 = 207, ARM64_INS_RBIT = 208, ARM64_INS_RET = 209, ARM64_INS_REV16 = 210, ARM64_INS_REV32 = 211, ARM64_INS_REV64 = 212, ARM64_INS_REV = 213, ARM64_INS_ROR = 214, ARM64_INS_RSHRN2 = 215, ARM64_INS_RSHRN = 216, ARM64_INS_RSUBHN = 217, ARM64_INS_RSUBHN2 = 218, ARM64_INS_SABAL2 = 219, ARM64_INS_SABAL = 220, ARM64_INS_SABA = 221, ARM64_INS_SABDL2 = 222, ARM64_INS_SABDL = 223, ARM64_INS_SABD = 224, ARM64_INS_SADALP = 225, ARM64_INS_SADDLP = 226, ARM64_INS_SADDLV = 227, ARM64_INS_SADDL2 = 228, ARM64_INS_SADDL = 229, ARM64_INS_SADDW2 = 230, ARM64_INS_SADDW = 231, ARM64_INS_SBC = 232, ARM64_INS_SBFM = 233, ARM64_INS_SCVTF = 234, ARM64_INS_SDIV = 235, ARM64_INS_SHA1C = 236, ARM64_INS_SHA1H = 237, ARM64_INS_SHA1M = 238, ARM64_INS_SHA1P = 239, ARM64_INS_SHA1SU0 = 240, ARM64_INS_SHA1SU1 = 241, ARM64_INS_SHA256H2 = 242, ARM64_INS_SHA256H = 243, ARM64_INS_SHA256SU0 = 244, ARM64_INS_SHA256SU1 = 245, ARM64_INS_SHADD = 246, ARM64_INS_SHLL2 = 247, ARM64_INS_SHLL = 248, ARM64_INS_SHL = 249, ARM64_INS_SHRN2 = 250, ARM64_INS_SHRN = 251, ARM64_INS_SHSUB = 252, ARM64_INS_SLI = 253, ARM64_INS_SMADDL = 254, ARM64_INS_SMAXP = 255, ARM64_INS_SMAXV = 256, ARM64_INS_SMAX = 257, ARM64_INS_SMC = 258, ARM64_INS_SMINP = 259, ARM64_INS_SMINV = 260, ARM64_INS_SMIN = 261, ARM64_INS_SMLAL2 = 262, ARM64_INS_SMLAL = 263, ARM64_INS_SMLSL2 = 264, ARM64_INS_SMLSL = 265, ARM64_INS_SMOV = 266, ARM64_INS_SMSUBL = 267, ARM64_INS_SMULH = 268, ARM64_INS_SMULL2 = 269, ARM64_INS_SMULL = 270, ARM64_INS_SQABS = 271, ARM64_INS_SQADD = 272, ARM64_INS_SQDMLAL = 273, ARM64_INS_SQDMLAL2 = 274, ARM64_INS_SQDMLSL = 275, ARM64_INS_SQDMLSL2 = 276, ARM64_INS_SQDMULH = 277, ARM64_INS_SQDMULL = 278, ARM64_INS_SQDMULL2 = 279, ARM64_INS_SQNEG = 280, ARM64_INS_SQRDMULH = 281, ARM64_INS_SQRSHL = 282, ARM64_INS_SQRSHRN = 283, ARM64_INS_SQRSHRN2 = 284, ARM64_INS_SQRSHRUN = 285, ARM64_INS_SQRSHRUN2 = 286, ARM64_INS_SQSHLU = 287, ARM64_INS_SQSHL = 288, ARM64_INS_SQSHRN = 289, ARM64_INS_SQSHRN2 = 290, ARM64_INS_SQSHRUN = 291, ARM64_INS_SQSHRUN2 = 292, ARM64_INS_SQSUB = 293, ARM64_INS_SQXTN2 = 294, ARM64_INS_SQXTN = 295, ARM64_INS_SQXTUN2 = 296, ARM64_INS_SQXTUN = 297, ARM64_INS_SRHADD = 298, ARM64_INS_SRI = 299, ARM64_INS_SRSHL = 300, ARM64_INS_SRSHR = 301, ARM64_INS_SRSRA = 302, ARM64_INS_SSHLL2 = 303, ARM64_INS_SSHLL = 304, ARM64_INS_SSHL = 305, ARM64_INS_SSHR = 306, ARM64_INS_SSRA = 307, ARM64_INS_SSUBL2 = 308, ARM64_INS_SSUBL = 309, ARM64_INS_SSUBW2 = 310, ARM64_INS_SSUBW = 311, ARM64_INS_ST1 = 312, ARM64_INS_ST2 = 313, ARM64_INS_ST3 = 314, ARM64_INS_ST4 = 315, ARM64_INS_STLRB = 316, ARM64_INS_STLRH = 317, ARM64_INS_STLR = 318, ARM64_INS_STLXP = 319, ARM64_INS_STLXRB = 320, ARM64_INS_STLXRH = 321, ARM64_INS_STLXR = 322, ARM64_INS_STNP = 323, ARM64_INS_STP = 324, ARM64_INS_STRB = 325, ARM64_INS_STR = 326, ARM64_INS_STRH = 327, ARM64_INS_STTRB = 328, ARM64_INS_STTRH = 329, ARM64_INS_STTR = 330, ARM64_INS_STURB = 331, ARM64_INS_STUR = 332, ARM64_INS_STURH = 333, ARM64_INS_STXP = 334, ARM64_INS_STXRB = 335, ARM64_INS_STXRH = 336, ARM64_INS_STXR = 337, ARM64_INS_SUBHN = 338, ARM64_INS_SUBHN2 = 339, ARM64_INS_SUB = 340, ARM64_INS_SUQADD = 341, ARM64_INS_SVC = 342, ARM64_INS_SYSL = 343, ARM64_INS_SYS = 344, ARM64_INS_TBL = 345, ARM64_INS_TBNZ = 346, ARM64_INS_TBX = 347, ARM64_INS_TBZ = 348, ARM64_INS_TRN1 = 349, ARM64_INS_TRN2 = 350, ARM64_INS_UABAL2 = 351, ARM64_INS_UABAL = 352, ARM64_INS_UABA = 353, ARM64_INS_UABDL2 = 354, ARM64_INS_UABDL = 355, ARM64_INS_UABD = 356, ARM64_INS_UADALP = 357, ARM64_INS_UADDLP = 358, ARM64_INS_UADDLV = 359, ARM64_INS_UADDL2 = 360, ARM64_INS_UADDL = 361, ARM64_INS_UADDW2 = 362, ARM64_INS_UADDW = 363, ARM64_INS_UBFM = 364, ARM64_INS_UCVTF = 365, ARM64_INS_UDIV = 366, ARM64_INS_UHADD = 367, ARM64_INS_UHSUB = 368, ARM64_INS_UMADDL = 369, ARM64_INS_UMAXP = 370, ARM64_INS_UMAXV = 371, ARM64_INS_UMAX = 372, ARM64_INS_UMINP = 373, ARM64_INS_UMINV = 374, ARM64_INS_UMIN = 375, ARM64_INS_UMLAL2 = 376, ARM64_INS_UMLAL = 377, ARM64_INS_UMLSL2 = 378, ARM64_INS_UMLSL = 379, ARM64_INS_UMOV = 380, ARM64_INS_UMSUBL = 381, ARM64_INS_UMULH = 382, ARM64_INS_UMULL2 = 383, ARM64_INS_UMULL = 384, ARM64_INS_UQADD = 385, ARM64_INS_UQRSHL = 386, ARM64_INS_UQRSHRN = 387, ARM64_INS_UQRSHRN2 = 388, ARM64_INS_UQSHL = 389, ARM64_INS_UQSHRN = 390, ARM64_INS_UQSHRN2 = 391, ARM64_INS_UQSUB = 392, ARM64_INS_UQXTN2 = 393, ARM64_INS_UQXTN = 394, ARM64_INS_URECPE = 395, ARM64_INS_URHADD = 396, ARM64_INS_URSHL = 397, ARM64_INS_URSHR = 398, ARM64_INS_URSQRTE = 399, ARM64_INS_URSRA = 400, ARM64_INS_USHLL2 = 401, ARM64_INS_USHLL = 402, ARM64_INS_USHL = 403, ARM64_INS_USHR = 404, ARM64_INS_USQADD = 405, ARM64_INS_USRA = 406, ARM64_INS_USUBL2 = 407, ARM64_INS_USUBL = 408, ARM64_INS_USUBW2 = 409, ARM64_INS_USUBW = 410, ARM64_INS_UZP1 = 411, ARM64_INS_UZP2 = 412, ARM64_INS_XTN2 = 413, ARM64_INS_XTN = 414, ARM64_INS_ZIP1 = 415, ARM64_INS_ZIP2 = 416, ARM64_INS_MNEG = 417, ARM64_INS_UMNEGL = 418, ARM64_INS_SMNEGL = 419, ARM64_INS_NOP = 420, ARM64_INS_YIELD = 421, ARM64_INS_WFE = 422, ARM64_INS_WFI = 423, ARM64_INS_SEV = 424, ARM64_INS_SEVL = 425, ARM64_INS_NGC = 426, ARM64_INS_SBFIZ = 427, ARM64_INS_UBFIZ = 428, ARM64_INS_SBFX = 429, ARM64_INS_UBFX = 430, ARM64_INS_BFI = 431, ARM64_INS_BFXIL = 432, ARM64_INS_CMN = 433, ARM64_INS_MVN = 434, ARM64_INS_TST = 435, ARM64_INS_CSET = 436, ARM64_INS_CINC = 437, ARM64_INS_CSETM = 438, ARM64_INS_CINV = 439, ARM64_INS_CNEG = 440, ARM64_INS_SXTB = 441, ARM64_INS_SXTH = 442, ARM64_INS_SXTW = 443, ARM64_INS_CMP = 444, ARM64_INS_UXTB = 445, ARM64_INS_UXTH = 446, ARM64_INS_UXTW = 447, ARM64_INS_IC = 448, ARM64_INS_DC = 449, ARM64_INS_AT = 450, ARM64_INS_TLBI = 451, ARM64_INS_NEGS = 452, ARM64_INS_NGCS = 453, ARM64_INS_ENDING = 454, } pub mod arm64_insn_group { #[doc = " Group of ARM64 instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const ARM64_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const ARM64_GRP_JUMP: Type = 1; pub const ARM64_GRP_CALL: Type = 2; pub const ARM64_GRP_RET: Type = 3; pub const ARM64_GRP_INT: Type = 4; #[doc = "< = CS_GRP_PRIVILEGE"] pub const ARM64_GRP_PRIVILEGE: Type = 6; #[doc = "< = CS_GRP_BRANCH_RELATIVE"] pub const ARM64_GRP_BRANCH_RELATIVE: Type = 7; pub const ARM64_GRP_CRYPTO: Type = 128; pub const ARM64_GRP_FPARMV8: Type = 129; pub const ARM64_GRP_NEON: Type = 130; pub const ARM64_GRP_CRC: Type = 131; pub const ARM64_GRP_ENDING: Type = 132; } pub mod m68k_reg { #[doc = " M68K registers and special registers"] pub type Type = u32; pub const M68K_REG_INVALID: Type = 0; pub const M68K_REG_D0: Type = 1; pub const M68K_REG_D1: Type = 2; pub const M68K_REG_D2: Type = 3; pub const M68K_REG_D3: Type = 4; pub const M68K_REG_D4: Type = 5; pub const M68K_REG_D5: Type = 6; pub const M68K_REG_D6: Type = 7; pub const M68K_REG_D7: Type = 8; pub const M68K_REG_A0: Type = 9; pub const M68K_REG_A1: Type = 10; pub const M68K_REG_A2: Type = 11; pub const M68K_REG_A3: Type = 12; pub const M68K_REG_A4: Type = 13; pub const M68K_REG_A5: Type = 14; pub const M68K_REG_A6: Type = 15; pub const M68K_REG_A7: Type = 16; pub const M68K_REG_FP0: Type = 17; pub const M68K_REG_FP1: Type = 18; pub const M68K_REG_FP2: Type = 19; pub const M68K_REG_FP3: Type = 20; pub const M68K_REG_FP4: Type = 21; pub const M68K_REG_FP5: Type = 22; pub const M68K_REG_FP6: Type = 23; pub const M68K_REG_FP7: Type = 24; pub const M68K_REG_PC: Type = 25; pub const M68K_REG_SR: Type = 26; pub const M68K_REG_CCR: Type = 27; pub const M68K_REG_SFC: Type = 28; pub const M68K_REG_DFC: Type = 29; pub const M68K_REG_USP: Type = 30; pub const M68K_REG_VBR: Type = 31; pub const M68K_REG_CACR: Type = 32; pub const M68K_REG_CAAR: Type = 33; pub const M68K_REG_MSP: Type = 34; pub const M68K_REG_ISP: Type = 35; pub const M68K_REG_TC: Type = 36; pub const M68K_REG_ITT0: Type = 37; pub const M68K_REG_ITT1: Type = 38; pub const M68K_REG_DTT0: Type = 39; pub const M68K_REG_DTT1: Type = 40; pub const M68K_REG_MMUSR: Type = 41; pub const M68K_REG_URP: Type = 42; pub const M68K_REG_SRP: Type = 43; pub const M68K_REG_FPCR: Type = 44; pub const M68K_REG_FPSR: Type = 45; pub const M68K_REG_FPIAR: Type = 46; pub const M68K_REG_ENDING: Type = 47; } #[repr(u32)] #[doc = " M68K Addressing Modes"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_address_mode { #[doc = "< No address mode."] M68K_AM_NONE = 0, #[doc = "< Register Direct - Data"] M68K_AM_REG_DIRECT_DATA = 1, #[doc = "< Register Direct - Address"] M68K_AM_REG_DIRECT_ADDR = 2, #[doc = "< Register Indirect - Address"] M68K_AM_REGI_ADDR = 3, #[doc = "< Register Indirect - Address with Postincrement"] M68K_AM_REGI_ADDR_POST_INC = 4, #[doc = "< Register Indirect - Address with Predecrement"] M68K_AM_REGI_ADDR_PRE_DEC = 5, #[doc = "< Register Indirect - Address with Displacement"] M68K_AM_REGI_ADDR_DISP = 6, #[doc = "< Address Register Indirect With Index- 8-bit displacement"] M68K_AM_AREGI_INDEX_8_BIT_DISP = 7, #[doc = "< Address Register Indirect With Index- Base displacement"] M68K_AM_AREGI_INDEX_BASE_DISP = 8, #[doc = "< Memory indirect - Postindex"] M68K_AM_MEMI_POST_INDEX = 9, #[doc = "< Memory indirect - Preindex"] M68K_AM_MEMI_PRE_INDEX = 10, #[doc = "< Program Counter Indirect - with Displacement"] M68K_AM_PCI_DISP = 11, #[doc = "< Program Counter Indirect with Index - with 8-Bit Displacement"] M68K_AM_PCI_INDEX_8_BIT_DISP = 12, #[doc = "< Program Counter Indirect with Index - with Base Displacement"] M68K_AM_PCI_INDEX_BASE_DISP = 13, #[doc = "< Program Counter Memory Indirect - Postindexed"] M68K_AM_PC_MEMI_POST_INDEX = 14, #[doc = "< Program Counter Memory Indirect - Preindexed"] M68K_AM_PC_MEMI_PRE_INDEX = 15, #[doc = "< Absolute Data Addressing - Short"] M68K_AM_ABSOLUTE_DATA_SHORT = 16, #[doc = "< Absolute Data Addressing - Long"] M68K_AM_ABSOLUTE_DATA_LONG = 17, #[doc = "< Immediate value"] M68K_AM_IMMEDIATE = 18, #[doc = "< Address as displacement from (PC+2) used by branches"] M68K_AM_BRANCH_DISPLACEMENT = 19, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] M68K_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] M68K_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] M68K_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] M68K_OP_MEM = 3, #[doc = "< single precision Floating-Point operand"] M68K_OP_FP_SINGLE = 4, #[doc = "< double precision Floating-Point operand"] M68K_OP_FP_DOUBLE = 5, #[doc = "< Register bits move"] M68K_OP_REG_BITS = 6, #[doc = "< Register pair in the same op (upper 4 bits for first reg, lower for second)"] M68K_OP_REG_PAIR = 7, #[doc = "< Branch displacement"] M68K_OP_BR_DISP = 8, } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with M68K_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct m68k_op_mem { #[doc = "< base register (or M68K_REG_INVALID if irrelevant)"] pub base_reg: m68k_reg::Type, #[doc = "< index register (or M68K_REG_INVALID if irrelevant)"] pub index_reg: m68k_reg::Type, #[doc = "< indirect base register (or M68K_REG_INVALID if irrelevant)"] pub in_base_reg: m68k_reg::Type, #[doc = "< indirect displacement"] pub in_disp: u32, #[doc = "< other displacement"] pub out_disp: u32, #[doc = "< displacement value"] pub disp: i16, #[doc = "< scale for index register"] pub scale: u8, #[doc = "< set to true if the two values below should be used"] pub bitfield: u8, #[doc = "< used for bf* instructions"] pub width: u8, #[doc = "< used for bf* instructions"] pub offset: u8, #[doc = "< 0 = w, 1 = l"] pub index_size: u8, } impl Clone for m68k_op_mem { fn clone(&self) -> Self { *self } } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_op_br_disp_size { #[doc = "< = CS_OP_INVALID (Uninitialized)."] M68K_OP_BR_DISP_SIZE_INVALID = 0, #[doc = "< signed 8-bit displacement"] M68K_OP_BR_DISP_SIZE_BYTE = 1, #[doc = "< signed 16-bit displacement"] M68K_OP_BR_DISP_SIZE_WORD = 2, #[doc = "< signed 32-bit displacement"] M68K_OP_BR_DISP_SIZE_LONG = 4, } #[repr(C)] #[derive(Debug, Copy)] pub struct m68k_op_br_disp { #[doc = "< displacement value"] pub disp: i32, #[doc = "< Size from m68k_op_br_disp_size type above"] pub disp_size: u8, } impl Clone for m68k_op_br_disp { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_m68k_op { pub __bindgen_anon_1: cs_m68k_op__bindgen_ty_1, #[doc = "< data when operand is targeting memory"] pub mem: m68k_op_mem, #[doc = "< data when operand is a branch displacement"] pub br_disp: m68k_op_br_disp, #[doc = "< register bits for movem etc. (always in d0-d7, a0-a7, fp0 - fp7 order)"] pub register_bits: u32, pub type_: m68k_op_type, #[doc = "< M68K addressing mode for this op"] pub address_mode: m68k_address_mode, } #[repr(C)] #[derive(Copy)] pub union cs_m68k_op__bindgen_ty_1 { #[doc = "< immediate value for IMM operand"] pub imm: u64, #[doc = "< double imm"] pub dimm: f64, #[doc = "< float imm"] pub simm: f32, #[doc = "< register value for REG operand"] pub reg: m68k_reg::Type, pub reg_pair: cs_m68k_op__bindgen_ty_1__bindgen_ty_1, _bindgen_union_align: u64, } #[repr(C)] #[derive(Debug, Copy)] pub struct cs_m68k_op__bindgen_ty_1__bindgen_ty_1 { pub reg_0: m68k_reg::Type, pub reg_1: m68k_reg::Type, } impl Clone for cs_m68k_op__bindgen_ty_1__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl Clone for cs_m68k_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_m68k_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_m68k_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_m68k_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_m68k_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_m68k_op {{ __bindgen_anon_1: {:?}, mem: {:?}, br_disp: {:?}, register_bits: {:?}, type: {:?}, address_mode: {:?} }}" , self . __bindgen_anon_1 , self . mem , self . br_disp , self . register_bits , self . type_ , self . address_mode ) } } #[repr(u32)] #[doc = " Operation size of the CPU instructions"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_cpu_size { #[doc = "< unsized or unspecified"] M68K_CPU_SIZE_NONE = 0, #[doc = "< 1 byte in size"] M68K_CPU_SIZE_BYTE = 1, #[doc = "< 2 bytes in size"] M68K_CPU_SIZE_WORD = 2, #[doc = "< 4 bytes in size"] M68K_CPU_SIZE_LONG = 4, } #[repr(u32)] #[doc = " Operation size of the FPU instructions (Notice that FPU instruction can also use CPU sizes if needed)"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_fpu_size { #[doc = "< unsized like fsave/frestore"] M68K_FPU_SIZE_NONE = 0, #[doc = "< 4 byte in size (single float)"] M68K_FPU_SIZE_SINGLE = 4, #[doc = "< 8 byte in size (double)"] M68K_FPU_SIZE_DOUBLE = 8, #[doc = "< 12 byte in size (extended real format)"] M68K_FPU_SIZE_EXTENDED = 12, } #[repr(u32)] #[doc = " Type of size that is being used for the current instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_size_type { M68K_SIZE_TYPE_INVALID = 0, M68K_SIZE_TYPE_CPU = 1, M68K_SIZE_TYPE_FPU = 2, } #[doc = " Operation size of the current instruction (NOT the actually size of instruction)"] #[repr(C)] #[derive(Copy)] pub struct m68k_op_size { pub type_: m68k_size_type, pub __bindgen_anon_1: m68k_op_size__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union m68k_op_size__bindgen_ty_1 { pub cpu_size: m68k_cpu_size, pub fpu_size: m68k_fpu_size, _bindgen_union_align: u32, } impl Clone for m68k_op_size__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for m68k_op_size__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "m68k_op_size__bindgen_ty_1 {{ union }}") } } impl Clone for m68k_op_size { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for m68k_op_size { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "m68k_op_size {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[doc = " The M68K instruction and it's operands"] #[repr(C)] #[derive(Copy)] pub struct cs_m68k { #[doc = "< operands for this instruction."] pub operands: [cs_m68k_op; 4usize], #[doc = "< size of data operand works on in bytes (.b, .w, .l, etc)"] pub op_size: m68k_op_size, #[doc = "< number of operands for the instruction"] pub op_count: u8, } impl Clone for cs_m68k { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_m68k { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_m68k {{ operands: {:?}, op_size: {:?}, op_count: {:?} }}", self.operands, self.op_size, self.op_count ) } } #[repr(u32)] #[doc = " M68K instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_insn { M68K_INS_INVALID = 0, M68K_INS_ABCD = 1, M68K_INS_ADD = 2, M68K_INS_ADDA = 3, M68K_INS_ADDI = 4, M68K_INS_ADDQ = 5, M68K_INS_ADDX = 6, M68K_INS_AND = 7, M68K_INS_ANDI = 8, M68K_INS_ASL = 9, M68K_INS_ASR = 10, M68K_INS_BHS = 11, M68K_INS_BLO = 12, M68K_INS_BHI = 13, M68K_INS_BLS = 14, M68K_INS_BCC = 15, M68K_INS_BCS = 16, M68K_INS_BNE = 17, M68K_INS_BEQ = 18, M68K_INS_BVC = 19, M68K_INS_BVS = 20, M68K_INS_BPL = 21, M68K_INS_BMI = 22, M68K_INS_BGE = 23, M68K_INS_BLT = 24, M68K_INS_BGT = 25, M68K_INS_BLE = 26, M68K_INS_BRA = 27, M68K_INS_BSR = 28, M68K_INS_BCHG = 29, M68K_INS_BCLR = 30, M68K_INS_BSET = 31, M68K_INS_BTST = 32, M68K_INS_BFCHG = 33, M68K_INS_BFCLR = 34, M68K_INS_BFEXTS = 35, M68K_INS_BFEXTU = 36, M68K_INS_BFFFO = 37, M68K_INS_BFINS = 38, M68K_INS_BFSET = 39, M68K_INS_BFTST = 40, M68K_INS_BKPT = 41, M68K_INS_CALLM = 42, M68K_INS_CAS = 43, M68K_INS_CAS2 = 44, M68K_INS_CHK = 45, M68K_INS_CHK2 = 46, M68K_INS_CLR = 47, M68K_INS_CMP = 48, M68K_INS_CMPA = 49, M68K_INS_CMPI = 50, M68K_INS_CMPM = 51, M68K_INS_CMP2 = 52, M68K_INS_CINVL = 53, M68K_INS_CINVP = 54, M68K_INS_CINVA = 55, M68K_INS_CPUSHL = 56, M68K_INS_CPUSHP = 57, M68K_INS_CPUSHA = 58, M68K_INS_DBT = 59, M68K_INS_DBF = 60, M68K_INS_DBHI = 61, M68K_INS_DBLS = 62, M68K_INS_DBCC = 63, M68K_INS_DBCS = 64, M68K_INS_DBNE = 65, M68K_INS_DBEQ = 66, M68K_INS_DBVC = 67, M68K_INS_DBVS = 68, M68K_INS_DBPL = 69, M68K_INS_DBMI = 70, M68K_INS_DBGE = 71, M68K_INS_DBLT = 72, M68K_INS_DBGT = 73, M68K_INS_DBLE = 74, M68K_INS_DBRA = 75, M68K_INS_DIVS = 76, M68K_INS_DIVSL = 77, M68K_INS_DIVU = 78, M68K_INS_DIVUL = 79, M68K_INS_EOR = 80, M68K_INS_EORI = 81, M68K_INS_EXG = 82, M68K_INS_EXT = 83, M68K_INS_EXTB = 84, M68K_INS_FABS = 85, M68K_INS_FSABS = 86, M68K_INS_FDABS = 87, M68K_INS_FACOS = 88, M68K_INS_FADD = 89, M68K_INS_FSADD = 90, M68K_INS_FDADD = 91, M68K_INS_FASIN = 92, M68K_INS_FATAN = 93, M68K_INS_FATANH = 94, M68K_INS_FBF = 95, M68K_INS_FBEQ = 96, M68K_INS_FBOGT = 97, M68K_INS_FBOGE = 98, M68K_INS_FBOLT = 99, M68K_INS_FBOLE = 100, M68K_INS_FBOGL = 101, M68K_INS_FBOR = 102, M68K_INS_FBUN = 103, M68K_INS_FBUEQ = 104, M68K_INS_FBUGT = 105, M68K_INS_FBUGE = 106, M68K_INS_FBULT = 107, M68K_INS_FBULE = 108, M68K_INS_FBNE = 109, M68K_INS_FBT = 110, M68K_INS_FBSF = 111, M68K_INS_FBSEQ = 112, M68K_INS_FBGT = 113, M68K_INS_FBGE = 114, M68K_INS_FBLT = 115, M68K_INS_FBLE = 116, M68K_INS_FBGL = 117, M68K_INS_FBGLE = 118, M68K_INS_FBNGLE = 119, M68K_INS_FBNGL = 120, M68K_INS_FBNLE = 121, M68K_INS_FBNLT = 122, M68K_INS_FBNGE = 123, M68K_INS_FBNGT = 124, M68K_INS_FBSNE = 125, M68K_INS_FBST = 126, M68K_INS_FCMP = 127, M68K_INS_FCOS = 128, M68K_INS_FCOSH = 129, M68K_INS_FDBF = 130, M68K_INS_FDBEQ = 131, M68K_INS_FDBOGT = 132, M68K_INS_FDBOGE = 133, M68K_INS_FDBOLT = 134, M68K_INS_FDBOLE = 135, M68K_INS_FDBOGL = 136, M68K_INS_FDBOR = 137, M68K_INS_FDBUN = 138, M68K_INS_FDBUEQ = 139, M68K_INS_FDBUGT = 140, M68K_INS_FDBUGE = 141, M68K_INS_FDBULT = 142, M68K_INS_FDBULE = 143, M68K_INS_FDBNE = 144, M68K_INS_FDBT = 145, M68K_INS_FDBSF = 146, M68K_INS_FDBSEQ = 147, M68K_INS_FDBGT = 148, M68K_INS_FDBGE = 149, M68K_INS_FDBLT = 150, M68K_INS_FDBLE = 151, M68K_INS_FDBGL = 152, M68K_INS_FDBGLE = 153, M68K_INS_FDBNGLE = 154, M68K_INS_FDBNGL = 155, M68K_INS_FDBNLE = 156, M68K_INS_FDBNLT = 157, M68K_INS_FDBNGE = 158, M68K_INS_FDBNGT = 159, M68K_INS_FDBSNE = 160, M68K_INS_FDBST = 161, M68K_INS_FDIV = 162, M68K_INS_FSDIV = 163, M68K_INS_FDDIV = 164, M68K_INS_FETOX = 165, M68K_INS_FETOXM1 = 166, M68K_INS_FGETEXP = 167, M68K_INS_FGETMAN = 168, M68K_INS_FINT = 169, M68K_INS_FINTRZ = 170, M68K_INS_FLOG10 = 171, M68K_INS_FLOG2 = 172, M68K_INS_FLOGN = 173, M68K_INS_FLOGNP1 = 174, M68K_INS_FMOD = 175, M68K_INS_FMOVE = 176, M68K_INS_FSMOVE = 177, M68K_INS_FDMOVE = 178, M68K_INS_FMOVECR = 179, M68K_INS_FMOVEM = 180, M68K_INS_FMUL = 181, M68K_INS_FSMUL = 182, M68K_INS_FDMUL = 183, M68K_INS_FNEG = 184, M68K_INS_FSNEG = 185, M68K_INS_FDNEG = 186, M68K_INS_FNOP = 187, M68K_INS_FREM = 188, M68K_INS_FRESTORE = 189, M68K_INS_FSAVE = 190, M68K_INS_FSCALE = 191, M68K_INS_FSGLDIV = 192, M68K_INS_FSGLMUL = 193, M68K_INS_FSIN = 194, M68K_INS_FSINCOS = 195, M68K_INS_FSINH = 196, M68K_INS_FSQRT = 197, M68K_INS_FSSQRT = 198, M68K_INS_FDSQRT = 199, M68K_INS_FSF = 200, M68K_INS_FSBEQ = 201, M68K_INS_FSOGT = 202, M68K_INS_FSOGE = 203, M68K_INS_FSOLT = 204, M68K_INS_FSOLE = 205, M68K_INS_FSOGL = 206, M68K_INS_FSOR = 207, M68K_INS_FSUN = 208, M68K_INS_FSUEQ = 209, M68K_INS_FSUGT = 210, M68K_INS_FSUGE = 211, M68K_INS_FSULT = 212, M68K_INS_FSULE = 213, M68K_INS_FSNE = 214, M68K_INS_FST = 215, M68K_INS_FSSF = 216, M68K_INS_FSSEQ = 217, M68K_INS_FSGT = 218, M68K_INS_FSGE = 219, M68K_INS_FSLT = 220, M68K_INS_FSLE = 221, M68K_INS_FSGL = 222, M68K_INS_FSGLE = 223, M68K_INS_FSNGLE = 224, M68K_INS_FSNGL = 225, M68K_INS_FSNLE = 226, M68K_INS_FSNLT = 227, M68K_INS_FSNGE = 228, M68K_INS_FSNGT = 229, M68K_INS_FSSNE = 230, M68K_INS_FSST = 231, M68K_INS_FSUB = 232, M68K_INS_FSSUB = 233, M68K_INS_FDSUB = 234, M68K_INS_FTAN = 235, M68K_INS_FTANH = 236, M68K_INS_FTENTOX = 237, M68K_INS_FTRAPF = 238, M68K_INS_FTRAPEQ = 239, M68K_INS_FTRAPOGT = 240, M68K_INS_FTRAPOGE = 241, M68K_INS_FTRAPOLT = 242, M68K_INS_FTRAPOLE = 243, M68K_INS_FTRAPOGL = 244, M68K_INS_FTRAPOR = 245, M68K_INS_FTRAPUN = 246, M68K_INS_FTRAPUEQ = 247, M68K_INS_FTRAPUGT = 248, M68K_INS_FTRAPUGE = 249, M68K_INS_FTRAPULT = 250, M68K_INS_FTRAPULE = 251, M68K_INS_FTRAPNE = 252, M68K_INS_FTRAPT = 253, M68K_INS_FTRAPSF = 254, M68K_INS_FTRAPSEQ = 255, M68K_INS_FTRAPGT = 256, M68K_INS_FTRAPGE = 257, M68K_INS_FTRAPLT = 258, M68K_INS_FTRAPLE = 259, M68K_INS_FTRAPGL = 260, M68K_INS_FTRAPGLE = 261, M68K_INS_FTRAPNGLE = 262, M68K_INS_FTRAPNGL = 263, M68K_INS_FTRAPNLE = 264, M68K_INS_FTRAPNLT = 265, M68K_INS_FTRAPNGE = 266, M68K_INS_FTRAPNGT = 267, M68K_INS_FTRAPSNE = 268, M68K_INS_FTRAPST = 269, M68K_INS_FTST = 270, M68K_INS_FTWOTOX = 271, M68K_INS_HALT = 272, M68K_INS_ILLEGAL = 273, M68K_INS_JMP = 274, M68K_INS_JSR = 275, M68K_INS_LEA = 276, M68K_INS_LINK = 277, M68K_INS_LPSTOP = 278, M68K_INS_LSL = 279, M68K_INS_LSR = 280, M68K_INS_MOVE = 281, M68K_INS_MOVEA = 282, M68K_INS_MOVEC = 283, M68K_INS_MOVEM = 284, M68K_INS_MOVEP = 285, M68K_INS_MOVEQ = 286, M68K_INS_MOVES = 287, M68K_INS_MOVE16 = 288, M68K_INS_MULS = 289, M68K_INS_MULU = 290, M68K_INS_NBCD = 291, M68K_INS_NEG = 292, M68K_INS_NEGX = 293, M68K_INS_NOP = 294, M68K_INS_NOT = 295, M68K_INS_OR = 296, M68K_INS_ORI = 297, M68K_INS_PACK = 298, M68K_INS_PEA = 299, M68K_INS_PFLUSH = 300, M68K_INS_PFLUSHA = 301, M68K_INS_PFLUSHAN = 302, M68K_INS_PFLUSHN = 303, M68K_INS_PLOADR = 304, M68K_INS_PLOADW = 305, M68K_INS_PLPAR = 306, M68K_INS_PLPAW = 307, M68K_INS_PMOVE = 308, M68K_INS_PMOVEFD = 309, M68K_INS_PTESTR = 310, M68K_INS_PTESTW = 311, M68K_INS_PULSE = 312, M68K_INS_REMS = 313, M68K_INS_REMU = 314, M68K_INS_RESET = 315, M68K_INS_ROL = 316, M68K_INS_ROR = 317, M68K_INS_ROXL = 318, M68K_INS_ROXR = 319, M68K_INS_RTD = 320, M68K_INS_RTE = 321, M68K_INS_RTM = 322, M68K_INS_RTR = 323, M68K_INS_RTS = 324, M68K_INS_SBCD = 325, M68K_INS_ST = 326, M68K_INS_SF = 327, M68K_INS_SHI = 328, M68K_INS_SLS = 329, M68K_INS_SCC = 330, M68K_INS_SHS = 331, M68K_INS_SCS = 332, M68K_INS_SLO = 333, M68K_INS_SNE = 334, M68K_INS_SEQ = 335, M68K_INS_SVC = 336, M68K_INS_SVS = 337, M68K_INS_SPL = 338, M68K_INS_SMI = 339, M68K_INS_SGE = 340, M68K_INS_SLT = 341, M68K_INS_SGT = 342, M68K_INS_SLE = 343, M68K_INS_STOP = 344, M68K_INS_SUB = 345, M68K_INS_SUBA = 346, M68K_INS_SUBI = 347, M68K_INS_SUBQ = 348, M68K_INS_SUBX = 349, M68K_INS_SWAP = 350, M68K_INS_TAS = 351, M68K_INS_TRAP = 352, M68K_INS_TRAPV = 353, M68K_INS_TRAPT = 354, M68K_INS_TRAPF = 355, M68K_INS_TRAPHI = 356, M68K_INS_TRAPLS = 357, M68K_INS_TRAPCC = 358, M68K_INS_TRAPHS = 359, M68K_INS_TRAPCS = 360, M68K_INS_TRAPLO = 361, M68K_INS_TRAPNE = 362, M68K_INS_TRAPEQ = 363, M68K_INS_TRAPVC = 364, M68K_INS_TRAPVS = 365, M68K_INS_TRAPPL = 366, M68K_INS_TRAPMI = 367, M68K_INS_TRAPGE = 368, M68K_INS_TRAPLT = 369, M68K_INS_TRAPGT = 370, M68K_INS_TRAPLE = 371, M68K_INS_TST = 372, M68K_INS_UNLK = 373, M68K_INS_UNPK = 374, M68K_INS_ENDING = 375, } #[repr(u32)] #[doc = " Group of M68K instructions"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m68k_group_type { #[doc = "< CS_GRUP_INVALID"] M68K_GRP_INVALID = 0, #[doc = "< = CS_GRP_JUMP"] M68K_GRP_JUMP = 1, #[doc = "< = CS_GRP_RET"] M68K_GRP_RET = 3, #[doc = "< = CS_GRP_IRET"] M68K_GRP_IRET = 5, #[doc = "< = CS_GRP_BRANCH_RELATIVE"] M68K_GRP_BRANCH_RELATIVE = 7, M68K_GRP_ENDING = 8, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum mips_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] MIPS_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] MIPS_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] MIPS_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] MIPS_OP_MEM = 3, } pub mod mips_reg { #[doc = " MIPS registers"] pub type Type = u32; pub const MIPS_REG_INVALID: Type = 0; pub const MIPS_REG_PC: Type = 1; pub const MIPS_REG_0: Type = 2; pub const MIPS_REG_1: Type = 3; pub const MIPS_REG_2: Type = 4; pub const MIPS_REG_3: Type = 5; pub const MIPS_REG_4: Type = 6; pub const MIPS_REG_5: Type = 7; pub const MIPS_REG_6: Type = 8; pub const MIPS_REG_7: Type = 9; pub const MIPS_REG_8: Type = 10; pub const MIPS_REG_9: Type = 11; pub const MIPS_REG_10: Type = 12; pub const MIPS_REG_11: Type = 13; pub const MIPS_REG_12: Type = 14; pub const MIPS_REG_13: Type = 15; pub const MIPS_REG_14: Type = 16; pub const MIPS_REG_15: Type = 17; pub const MIPS_REG_16: Type = 18; pub const MIPS_REG_17: Type = 19; pub const MIPS_REG_18: Type = 20; pub const MIPS_REG_19: Type = 21; pub const MIPS_REG_20: Type = 22; pub const MIPS_REG_21: Type = 23; pub const MIPS_REG_22: Type = 24; pub const MIPS_REG_23: Type = 25; pub const MIPS_REG_24: Type = 26; pub const MIPS_REG_25: Type = 27; pub const MIPS_REG_26: Type = 28; pub const MIPS_REG_27: Type = 29; pub const MIPS_REG_28: Type = 30; pub const MIPS_REG_29: Type = 31; pub const MIPS_REG_30: Type = 32; pub const MIPS_REG_31: Type = 33; pub const MIPS_REG_DSPCCOND: Type = 34; pub const MIPS_REG_DSPCARRY: Type = 35; pub const MIPS_REG_DSPEFI: Type = 36; pub const MIPS_REG_DSPOUTFLAG: Type = 37; pub const MIPS_REG_DSPOUTFLAG16_19: Type = 38; pub const MIPS_REG_DSPOUTFLAG20: Type = 39; pub const MIPS_REG_DSPOUTFLAG21: Type = 40; pub const MIPS_REG_DSPOUTFLAG22: Type = 41; pub const MIPS_REG_DSPOUTFLAG23: Type = 42; pub const MIPS_REG_DSPPOS: Type = 43; pub const MIPS_REG_DSPSCOUNT: Type = 44; pub const MIPS_REG_AC0: Type = 45; pub const MIPS_REG_AC1: Type = 46; pub const MIPS_REG_AC2: Type = 47; pub const MIPS_REG_AC3: Type = 48; pub const MIPS_REG_CC0: Type = 49; pub const MIPS_REG_CC1: Type = 50; pub const MIPS_REG_CC2: Type = 51; pub const MIPS_REG_CC3: Type = 52; pub const MIPS_REG_CC4: Type = 53; pub const MIPS_REG_CC5: Type = 54; pub const MIPS_REG_CC6: Type = 55; pub const MIPS_REG_CC7: Type = 56; pub const MIPS_REG_F0: Type = 57; pub const MIPS_REG_F1: Type = 58; pub const MIPS_REG_F2: Type = 59; pub const MIPS_REG_F3: Type = 60; pub const MIPS_REG_F4: Type = 61; pub const MIPS_REG_F5: Type = 62; pub const MIPS_REG_F6: Type = 63; pub const MIPS_REG_F7: Type = 64; pub const MIPS_REG_F8: Type = 65; pub const MIPS_REG_F9: Type = 66; pub const MIPS_REG_F10: Type = 67; pub const MIPS_REG_F11: Type = 68; pub const MIPS_REG_F12: Type = 69; pub const MIPS_REG_F13: Type = 70; pub const MIPS_REG_F14: Type = 71; pub const MIPS_REG_F15: Type = 72; pub const MIPS_REG_F16: Type = 73; pub const MIPS_REG_F17: Type = 74; pub const MIPS_REG_F18: Type = 75; pub const MIPS_REG_F19: Type = 76; pub const MIPS_REG_F20: Type = 77; pub const MIPS_REG_F21: Type = 78; pub const MIPS_REG_F22: Type = 79; pub const MIPS_REG_F23: Type = 80; pub const MIPS_REG_F24: Type = 81; pub const MIPS_REG_F25: Type = 82; pub const MIPS_REG_F26: Type = 83; pub const MIPS_REG_F27: Type = 84; pub const MIPS_REG_F28: Type = 85; pub const MIPS_REG_F29: Type = 86; pub const MIPS_REG_F30: Type = 87; pub const MIPS_REG_F31: Type = 88; pub const MIPS_REG_FCC0: Type = 89; pub const MIPS_REG_FCC1: Type = 90; pub const MIPS_REG_FCC2: Type = 91; pub const MIPS_REG_FCC3: Type = 92; pub const MIPS_REG_FCC4: Type = 93; pub const MIPS_REG_FCC5: Type = 94; pub const MIPS_REG_FCC6: Type = 95; pub const MIPS_REG_FCC7: Type = 96; pub const MIPS_REG_W0: Type = 97; pub const MIPS_REG_W1: Type = 98; pub const MIPS_REG_W2: Type = 99; pub const MIPS_REG_W3: Type = 100; pub const MIPS_REG_W4: Type = 101; pub const MIPS_REG_W5: Type = 102; pub const MIPS_REG_W6: Type = 103; pub const MIPS_REG_W7: Type = 104; pub const MIPS_REG_W8: Type = 105; pub const MIPS_REG_W9: Type = 106; pub const MIPS_REG_W10: Type = 107; pub const MIPS_REG_W11: Type = 108; pub const MIPS_REG_W12: Type = 109; pub const MIPS_REG_W13: Type = 110; pub const MIPS_REG_W14: Type = 111; pub const MIPS_REG_W15: Type = 112; pub const MIPS_REG_W16: Type = 113; pub const MIPS_REG_W17: Type = 114; pub const MIPS_REG_W18: Type = 115; pub const MIPS_REG_W19: Type = 116; pub const MIPS_REG_W20: Type = 117; pub const MIPS_REG_W21: Type = 118; pub const MIPS_REG_W22: Type = 119; pub const MIPS_REG_W23: Type = 120; pub const MIPS_REG_W24: Type = 121; pub const MIPS_REG_W25: Type = 122; pub const MIPS_REG_W26: Type = 123; pub const MIPS_REG_W27: Type = 124; pub const MIPS_REG_W28: Type = 125; pub const MIPS_REG_W29: Type = 126; pub const MIPS_REG_W30: Type = 127; pub const MIPS_REG_W31: Type = 128; pub const MIPS_REG_HI: Type = 129; pub const MIPS_REG_LO: Type = 130; pub const MIPS_REG_P0: Type = 131; pub const MIPS_REG_P1: Type = 132; pub const MIPS_REG_P2: Type = 133; pub const MIPS_REG_MPL0: Type = 134; pub const MIPS_REG_MPL1: Type = 135; pub const MIPS_REG_MPL2: Type = 136; pub const MIPS_REG_ENDING: Type = 137; pub const MIPS_REG_ZERO: Type = 2; pub const MIPS_REG_AT: Type = 3; pub const MIPS_REG_V0: Type = 4; pub const MIPS_REG_V1: Type = 5; pub const MIPS_REG_A0: Type = 6; pub const MIPS_REG_A1: Type = 7; pub const MIPS_REG_A2: Type = 8; pub const MIPS_REG_A3: Type = 9; pub const MIPS_REG_T0: Type = 10; pub const MIPS_REG_T1: Type = 11; pub const MIPS_REG_T2: Type = 12; pub const MIPS_REG_T3: Type = 13; pub const MIPS_REG_T4: Type = 14; pub const MIPS_REG_T5: Type = 15; pub const MIPS_REG_T6: Type = 16; pub const MIPS_REG_T7: Type = 17; pub const MIPS_REG_S0: Type = 18; pub const MIPS_REG_S1: Type = 19; pub const MIPS_REG_S2: Type = 20; pub const MIPS_REG_S3: Type = 21; pub const MIPS_REG_S4: Type = 22; pub const MIPS_REG_S5: Type = 23; pub const MIPS_REG_S6: Type = 24; pub const MIPS_REG_S7: Type = 25; pub const MIPS_REG_T8: Type = 26; pub const MIPS_REG_T9: Type = 27; pub const MIPS_REG_K0: Type = 28; pub const MIPS_REG_K1: Type = 29; pub const MIPS_REG_GP: Type = 30; pub const MIPS_REG_SP: Type = 31; pub const MIPS_REG_FP: Type = 32; pub const MIPS_REG_S8: Type = 32; pub const MIPS_REG_RA: Type = 33; pub const MIPS_REG_HI0: Type = 45; pub const MIPS_REG_HI1: Type = 46; pub const MIPS_REG_HI2: Type = 47; pub const MIPS_REG_HI3: Type = 48; pub const MIPS_REG_LO0: Type = 45; pub const MIPS_REG_LO1: Type = 46; pub const MIPS_REG_LO2: Type = 47; pub const MIPS_REG_LO3: Type = 48; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with MIPS_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct mips_op_mem { #[doc = "< base register"] pub base: mips_reg::Type, #[doc = "< displacement/offset value"] pub disp: i64, } impl Clone for mips_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_mips_op { #[doc = "< operand type"] pub type_: mips_op_type, pub __bindgen_anon_1: cs_mips_op__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union cs_mips_op__bindgen_ty_1 { #[doc = "< register value for REG operand"] pub reg: mips_reg::Type, #[doc = "< immediate value for IMM operand"] pub imm: i64, #[doc = "< base/index/scale/disp value for MEM operand"] pub mem: mips_op_mem, _bindgen_union_align: [u64; 2usize], } impl Clone for cs_mips_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_mips_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_mips_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_mips_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_mips_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_mips_op {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_mips { #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_mips_op; 10usize], } impl Clone for cs_mips { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_mips { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_mips {{ op_count: {:?}, operands: {:?} }}", self.op_count, self.operands ) } } #[repr(u32)] #[doc = " MIPS instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum mips_insn { MIPS_INS_INVALID = 0, MIPS_INS_ABSQ_S = 1, MIPS_INS_ADD = 2, MIPS_INS_ADDIUPC = 3, MIPS_INS_ADDIUR1SP = 4, MIPS_INS_ADDIUR2 = 5, MIPS_INS_ADDIUS5 = 6, MIPS_INS_ADDIUSP = 7, MIPS_INS_ADDQH = 8, MIPS_INS_ADDQH_R = 9, MIPS_INS_ADDQ = 10, MIPS_INS_ADDQ_S = 11, MIPS_INS_ADDSC = 12, MIPS_INS_ADDS_A = 13, MIPS_INS_ADDS_S = 14, MIPS_INS_ADDS_U = 15, MIPS_INS_ADDU16 = 16, MIPS_INS_ADDUH = 17, MIPS_INS_ADDUH_R = 18, MIPS_INS_ADDU = 19, MIPS_INS_ADDU_S = 20, MIPS_INS_ADDVI = 21, MIPS_INS_ADDV = 22, MIPS_INS_ADDWC = 23, MIPS_INS_ADD_A = 24, MIPS_INS_ADDI = 25, MIPS_INS_ADDIU = 26, MIPS_INS_ALIGN = 27, MIPS_INS_ALUIPC = 28, MIPS_INS_AND = 29, MIPS_INS_AND16 = 30, MIPS_INS_ANDI16 = 31, MIPS_INS_ANDI = 32, MIPS_INS_APPEND = 33, MIPS_INS_ASUB_S = 34, MIPS_INS_ASUB_U = 35, MIPS_INS_AUI = 36, MIPS_INS_AUIPC = 37, MIPS_INS_AVER_S = 38, MIPS_INS_AVER_U = 39, MIPS_INS_AVE_S = 40, MIPS_INS_AVE_U = 41, MIPS_INS_B16 = 42, MIPS_INS_BADDU = 43, MIPS_INS_BAL = 44, MIPS_INS_BALC = 45, MIPS_INS_BALIGN = 46, MIPS_INS_BBIT0 = 47, MIPS_INS_BBIT032 = 48, MIPS_INS_BBIT1 = 49, MIPS_INS_BBIT132 = 50, MIPS_INS_BC = 51, MIPS_INS_BC0F = 52, MIPS_INS_BC0FL = 53, MIPS_INS_BC0T = 54, MIPS_INS_BC0TL = 55, MIPS_INS_BC1EQZ = 56, MIPS_INS_BC1F = 57, MIPS_INS_BC1FL = 58, MIPS_INS_BC1NEZ = 59, MIPS_INS_BC1T = 60, MIPS_INS_BC1TL = 61, MIPS_INS_BC2EQZ = 62, MIPS_INS_BC2F = 63, MIPS_INS_BC2FL = 64, MIPS_INS_BC2NEZ = 65, MIPS_INS_BC2T = 66, MIPS_INS_BC2TL = 67, MIPS_INS_BC3F = 68, MIPS_INS_BC3FL = 69, MIPS_INS_BC3T = 70, MIPS_INS_BC3TL = 71, MIPS_INS_BCLRI = 72, MIPS_INS_BCLR = 73, MIPS_INS_BEQ = 74, MIPS_INS_BEQC = 75, MIPS_INS_BEQL = 76, MIPS_INS_BEQZ16 = 77, MIPS_INS_BEQZALC = 78, MIPS_INS_BEQZC = 79, MIPS_INS_BGEC = 80, MIPS_INS_BGEUC = 81, MIPS_INS_BGEZ = 82, MIPS_INS_BGEZAL = 83, MIPS_INS_BGEZALC = 84, MIPS_INS_BGEZALL = 85, MIPS_INS_BGEZALS = 86, MIPS_INS_BGEZC = 87, MIPS_INS_BGEZL = 88, MIPS_INS_BGTZ = 89, MIPS_INS_BGTZALC = 90, MIPS_INS_BGTZC = 91, MIPS_INS_BGTZL = 92, MIPS_INS_BINSLI = 93, MIPS_INS_BINSL = 94, MIPS_INS_BINSRI = 95, MIPS_INS_BINSR = 96, MIPS_INS_BITREV = 97, MIPS_INS_BITSWAP = 98, MIPS_INS_BLEZ = 99, MIPS_INS_BLEZALC = 100, MIPS_INS_BLEZC = 101, MIPS_INS_BLEZL = 102, MIPS_INS_BLTC = 103, MIPS_INS_BLTUC = 104, MIPS_INS_BLTZ = 105, MIPS_INS_BLTZAL = 106, MIPS_INS_BLTZALC = 107, MIPS_INS_BLTZALL = 108, MIPS_INS_BLTZALS = 109, MIPS_INS_BLTZC = 110, MIPS_INS_BLTZL = 111, MIPS_INS_BMNZI = 112, MIPS_INS_BMNZ = 113, MIPS_INS_BMZI = 114, MIPS_INS_BMZ = 115, MIPS_INS_BNE = 116, MIPS_INS_BNEC = 117, MIPS_INS_BNEGI = 118, MIPS_INS_BNEG = 119, MIPS_INS_BNEL = 120, MIPS_INS_BNEZ16 = 121, MIPS_INS_BNEZALC = 122, MIPS_INS_BNEZC = 123, MIPS_INS_BNVC = 124, MIPS_INS_BNZ = 125, MIPS_INS_BOVC = 126, MIPS_INS_BPOSGE32 = 127, MIPS_INS_BREAK = 128, MIPS_INS_BREAK16 = 129, MIPS_INS_BSELI = 130, MIPS_INS_BSEL = 131, MIPS_INS_BSETI = 132, MIPS_INS_BSET = 133, MIPS_INS_BZ = 134, MIPS_INS_BEQZ = 135, MIPS_INS_B = 136, MIPS_INS_BNEZ = 137, MIPS_INS_BTEQZ = 138, MIPS_INS_BTNEZ = 139, MIPS_INS_CACHE = 140, MIPS_INS_CEIL = 141, MIPS_INS_CEQI = 142, MIPS_INS_CEQ = 143, MIPS_INS_CFC1 = 144, MIPS_INS_CFCMSA = 145, MIPS_INS_CINS = 146, MIPS_INS_CINS32 = 147, MIPS_INS_CLASS = 148, MIPS_INS_CLEI_S = 149, MIPS_INS_CLEI_U = 150, MIPS_INS_CLE_S = 151, MIPS_INS_CLE_U = 152, MIPS_INS_CLO = 153, MIPS_INS_CLTI_S = 154, MIPS_INS_CLTI_U = 155, MIPS_INS_CLT_S = 156, MIPS_INS_CLT_U = 157, MIPS_INS_CLZ = 158, MIPS_INS_CMPGDU = 159, MIPS_INS_CMPGU = 160, MIPS_INS_CMPU = 161, MIPS_INS_CMP = 162, MIPS_INS_COPY_S = 163, MIPS_INS_COPY_U = 164, MIPS_INS_CTC1 = 165, MIPS_INS_CTCMSA = 166, MIPS_INS_CVT = 167, MIPS_INS_C = 168, MIPS_INS_CMPI = 169, MIPS_INS_DADD = 170, MIPS_INS_DADDI = 171, MIPS_INS_DADDIU = 172, MIPS_INS_DADDU = 173, MIPS_INS_DAHI = 174, MIPS_INS_DALIGN = 175, MIPS_INS_DATI = 176, MIPS_INS_DAUI = 177, MIPS_INS_DBITSWAP = 178, MIPS_INS_DCLO = 179, MIPS_INS_DCLZ = 180, MIPS_INS_DDIV = 181, MIPS_INS_DDIVU = 182, MIPS_INS_DERET = 183, MIPS_INS_DEXT = 184, MIPS_INS_DEXTM = 185, MIPS_INS_DEXTU = 186, MIPS_INS_DI = 187, MIPS_INS_DINS = 188, MIPS_INS_DINSM = 189, MIPS_INS_DINSU = 190, MIPS_INS_DIV = 191, MIPS_INS_DIVU = 192, MIPS_INS_DIV_S = 193, MIPS_INS_DIV_U = 194, MIPS_INS_DLSA = 195, MIPS_INS_DMFC0 = 196, MIPS_INS_DMFC1 = 197, MIPS_INS_DMFC2 = 198, MIPS_INS_DMOD = 199, MIPS_INS_DMODU = 200, MIPS_INS_DMTC0 = 201, MIPS_INS_DMTC1 = 202, MIPS_INS_DMTC2 = 203, MIPS_INS_DMUH = 204, MIPS_INS_DMUHU = 205, MIPS_INS_DMUL = 206, MIPS_INS_DMULT = 207, MIPS_INS_DMULTU = 208, MIPS_INS_DMULU = 209, MIPS_INS_DOTP_S = 210, MIPS_INS_DOTP_U = 211, MIPS_INS_DPADD_S = 212, MIPS_INS_DPADD_U = 213, MIPS_INS_DPAQX_SA = 214, MIPS_INS_DPAQX_S = 215, MIPS_INS_DPAQ_SA = 216, MIPS_INS_DPAQ_S = 217, MIPS_INS_DPAU = 218, MIPS_INS_DPAX = 219, MIPS_INS_DPA = 220, MIPS_INS_DPOP = 221, MIPS_INS_DPSQX_SA = 222, MIPS_INS_DPSQX_S = 223, MIPS_INS_DPSQ_SA = 224, MIPS_INS_DPSQ_S = 225, MIPS_INS_DPSUB_S = 226, MIPS_INS_DPSUB_U = 227, MIPS_INS_DPSU = 228, MIPS_INS_DPSX = 229, MIPS_INS_DPS = 230, MIPS_INS_DROTR = 231, MIPS_INS_DROTR32 = 232, MIPS_INS_DROTRV = 233, MIPS_INS_DSBH = 234, MIPS_INS_DSHD = 235, MIPS_INS_DSLL = 236, MIPS_INS_DSLL32 = 237, MIPS_INS_DSLLV = 238, MIPS_INS_DSRA = 239, MIPS_INS_DSRA32 = 240, MIPS_INS_DSRAV = 241, MIPS_INS_DSRL = 242, MIPS_INS_DSRL32 = 243, MIPS_INS_DSRLV = 244, MIPS_INS_DSUB = 245, MIPS_INS_DSUBU = 246, MIPS_INS_EHB = 247, MIPS_INS_EI = 248, MIPS_INS_ERET = 249, MIPS_INS_EXT = 250, MIPS_INS_EXTP = 251, MIPS_INS_EXTPDP = 252, MIPS_INS_EXTPDPV = 253, MIPS_INS_EXTPV = 254, MIPS_INS_EXTRV_RS = 255, MIPS_INS_EXTRV_R = 256, MIPS_INS_EXTRV_S = 257, MIPS_INS_EXTRV = 258, MIPS_INS_EXTR_RS = 259, MIPS_INS_EXTR_R = 260, MIPS_INS_EXTR_S = 261, MIPS_INS_EXTR = 262, MIPS_INS_EXTS = 263, MIPS_INS_EXTS32 = 264, MIPS_INS_ABS = 265, MIPS_INS_FADD = 266, MIPS_INS_FCAF = 267, MIPS_INS_FCEQ = 268, MIPS_INS_FCLASS = 269, MIPS_INS_FCLE = 270, MIPS_INS_FCLT = 271, MIPS_INS_FCNE = 272, MIPS_INS_FCOR = 273, MIPS_INS_FCUEQ = 274, MIPS_INS_FCULE = 275, MIPS_INS_FCULT = 276, MIPS_INS_FCUNE = 277, MIPS_INS_FCUN = 278, MIPS_INS_FDIV = 279, MIPS_INS_FEXDO = 280, MIPS_INS_FEXP2 = 281, MIPS_INS_FEXUPL = 282, MIPS_INS_FEXUPR = 283, MIPS_INS_FFINT_S = 284, MIPS_INS_FFINT_U = 285, MIPS_INS_FFQL = 286, MIPS_INS_FFQR = 287, MIPS_INS_FILL = 288, MIPS_INS_FLOG2 = 289, MIPS_INS_FLOOR = 290, MIPS_INS_FMADD = 291, MIPS_INS_FMAX_A = 292, MIPS_INS_FMAX = 293, MIPS_INS_FMIN_A = 294, MIPS_INS_FMIN = 295, MIPS_INS_MOV = 296, MIPS_INS_FMSUB = 297, MIPS_INS_FMUL = 298, MIPS_INS_MUL = 299, MIPS_INS_NEG = 300, MIPS_INS_FRCP = 301, MIPS_INS_FRINT = 302, MIPS_INS_FRSQRT = 303, MIPS_INS_FSAF = 304, MIPS_INS_FSEQ = 305, MIPS_INS_FSLE = 306, MIPS_INS_FSLT = 307, MIPS_INS_FSNE = 308, MIPS_INS_FSOR = 309, MIPS_INS_FSQRT = 310, MIPS_INS_SQRT = 311, MIPS_INS_FSUB = 312, MIPS_INS_SUB = 313, MIPS_INS_FSUEQ = 314, MIPS_INS_FSULE = 315, MIPS_INS_FSULT = 316, MIPS_INS_FSUNE = 317, MIPS_INS_FSUN = 318, MIPS_INS_FTINT_S = 319, MIPS_INS_FTINT_U = 320, MIPS_INS_FTQ = 321, MIPS_INS_FTRUNC_S = 322, MIPS_INS_FTRUNC_U = 323, MIPS_INS_HADD_S = 324, MIPS_INS_HADD_U = 325, MIPS_INS_HSUB_S = 326, MIPS_INS_HSUB_U = 327, MIPS_INS_ILVEV = 328, MIPS_INS_ILVL = 329, MIPS_INS_ILVOD = 330, MIPS_INS_ILVR = 331, MIPS_INS_INS = 332, MIPS_INS_INSERT = 333, MIPS_INS_INSV = 334, MIPS_INS_INSVE = 335, MIPS_INS_J = 336, MIPS_INS_JAL = 337, MIPS_INS_JALR = 338, MIPS_INS_JALRS16 = 339, MIPS_INS_JALRS = 340, MIPS_INS_JALS = 341, MIPS_INS_JALX = 342, MIPS_INS_JIALC = 343, MIPS_INS_JIC = 344, MIPS_INS_JR = 345, MIPS_INS_JR16 = 346, MIPS_INS_JRADDIUSP = 347, MIPS_INS_JRC = 348, MIPS_INS_JALRC = 349, MIPS_INS_LB = 350, MIPS_INS_LBU16 = 351, MIPS_INS_LBUX = 352, MIPS_INS_LBU = 353, MIPS_INS_LD = 354, MIPS_INS_LDC1 = 355, MIPS_INS_LDC2 = 356, MIPS_INS_LDC3 = 357, MIPS_INS_LDI = 358, MIPS_INS_LDL = 359, MIPS_INS_LDPC = 360, MIPS_INS_LDR = 361, MIPS_INS_LDXC1 = 362, MIPS_INS_LH = 363, MIPS_INS_LHU16 = 364, MIPS_INS_LHX = 365, MIPS_INS_LHU = 366, MIPS_INS_LI16 = 367, MIPS_INS_LL = 368, MIPS_INS_LLD = 369, MIPS_INS_LSA = 370, MIPS_INS_LUXC1 = 371, MIPS_INS_LUI = 372, MIPS_INS_LW = 373, MIPS_INS_LW16 = 374, MIPS_INS_LWC1 = 375, MIPS_INS_LWC2 = 376, MIPS_INS_LWC3 = 377, MIPS_INS_LWL = 378, MIPS_INS_LWM16 = 379, MIPS_INS_LWM32 = 380, MIPS_INS_LWPC = 381, MIPS_INS_LWP = 382, MIPS_INS_LWR = 383, MIPS_INS_LWUPC = 384, MIPS_INS_LWU = 385, MIPS_INS_LWX = 386, MIPS_INS_LWXC1 = 387, MIPS_INS_LWXS = 388, MIPS_INS_LI = 389, MIPS_INS_MADD = 390, MIPS_INS_MADDF = 391, MIPS_INS_MADDR_Q = 392, MIPS_INS_MADDU = 393, MIPS_INS_MADDV = 394, MIPS_INS_MADD_Q = 395, MIPS_INS_MAQ_SA = 396, MIPS_INS_MAQ_S = 397, MIPS_INS_MAXA = 398, MIPS_INS_MAXI_S = 399, MIPS_INS_MAXI_U = 400, MIPS_INS_MAX_A = 401, MIPS_INS_MAX = 402, MIPS_INS_MAX_S = 403, MIPS_INS_MAX_U = 404, MIPS_INS_MFC0 = 405, MIPS_INS_MFC1 = 406, MIPS_INS_MFC2 = 407, MIPS_INS_MFHC1 = 408, MIPS_INS_MFHI = 409, MIPS_INS_MFLO = 410, MIPS_INS_MINA = 411, MIPS_INS_MINI_S = 412, MIPS_INS_MINI_U = 413, MIPS_INS_MIN_A = 414, MIPS_INS_MIN = 415, MIPS_INS_MIN_S = 416, MIPS_INS_MIN_U = 417, MIPS_INS_MOD = 418, MIPS_INS_MODSUB = 419, MIPS_INS_MODU = 420, MIPS_INS_MOD_S = 421, MIPS_INS_MOD_U = 422, MIPS_INS_MOVE = 423, MIPS_INS_MOVEP = 424, MIPS_INS_MOVF = 425, MIPS_INS_MOVN = 426, MIPS_INS_MOVT = 427, MIPS_INS_MOVZ = 428, MIPS_INS_MSUB = 429, MIPS_INS_MSUBF = 430, MIPS_INS_MSUBR_Q = 431, MIPS_INS_MSUBU = 432, MIPS_INS_MSUBV = 433, MIPS_INS_MSUB_Q = 434, MIPS_INS_MTC0 = 435, MIPS_INS_MTC1 = 436, MIPS_INS_MTC2 = 437, MIPS_INS_MTHC1 = 438, MIPS_INS_MTHI = 439, MIPS_INS_MTHLIP = 440, MIPS_INS_MTLO = 441, MIPS_INS_MTM0 = 442, MIPS_INS_MTM1 = 443, MIPS_INS_MTM2 = 444, MIPS_INS_MTP0 = 445, MIPS_INS_MTP1 = 446, MIPS_INS_MTP2 = 447, MIPS_INS_MUH = 448, MIPS_INS_MUHU = 449, MIPS_INS_MULEQ_S = 450, MIPS_INS_MULEU_S = 451, MIPS_INS_MULQ_RS = 452, MIPS_INS_MULQ_S = 453, MIPS_INS_MULR_Q = 454, MIPS_INS_MULSAQ_S = 455, MIPS_INS_MULSA = 456, MIPS_INS_MULT = 457, MIPS_INS_MULTU = 458, MIPS_INS_MULU = 459, MIPS_INS_MULV = 460, MIPS_INS_MUL_Q = 461, MIPS_INS_MUL_S = 462, MIPS_INS_NLOC = 463, MIPS_INS_NLZC = 464, MIPS_INS_NMADD = 465, MIPS_INS_NMSUB = 466, MIPS_INS_NOR = 467, MIPS_INS_NORI = 468, MIPS_INS_NOT16 = 469, MIPS_INS_NOT = 470, MIPS_INS_OR = 471, MIPS_INS_OR16 = 472, MIPS_INS_ORI = 473, MIPS_INS_PACKRL = 474, MIPS_INS_PAUSE = 475, MIPS_INS_PCKEV = 476, MIPS_INS_PCKOD = 477, MIPS_INS_PCNT = 478, MIPS_INS_PICK = 479, MIPS_INS_POP = 480, MIPS_INS_PRECEQU = 481, MIPS_INS_PRECEQ = 482, MIPS_INS_PRECEU = 483, MIPS_INS_PRECRQU_S = 484, MIPS_INS_PRECRQ = 485, MIPS_INS_PRECRQ_RS = 486, MIPS_INS_PRECR = 487, MIPS_INS_PRECR_SRA = 488, MIPS_INS_PRECR_SRA_R = 489, MIPS_INS_PREF = 490, MIPS_INS_PREPEND = 491, MIPS_INS_RADDU = 492, MIPS_INS_RDDSP = 493, MIPS_INS_RDHWR = 494, MIPS_INS_REPLV = 495, MIPS_INS_REPL = 496, MIPS_INS_RINT = 497, MIPS_INS_ROTR = 498, MIPS_INS_ROTRV = 499, MIPS_INS_ROUND = 500, MIPS_INS_SAT_S = 501, MIPS_INS_SAT_U = 502, MIPS_INS_SB = 503, MIPS_INS_SB16 = 504, MIPS_INS_SC = 505, MIPS_INS_SCD = 506, MIPS_INS_SD = 507, MIPS_INS_SDBBP = 508, MIPS_INS_SDBBP16 = 509, MIPS_INS_SDC1 = 510, MIPS_INS_SDC2 = 511, MIPS_INS_SDC3 = 512, MIPS_INS_SDL = 513, MIPS_INS_SDR = 514, MIPS_INS_SDXC1 = 515, MIPS_INS_SEB = 516, MIPS_INS_SEH = 517, MIPS_INS_SELEQZ = 518, MIPS_INS_SELNEZ = 519, MIPS_INS_SEL = 520, MIPS_INS_SEQ = 521, MIPS_INS_SEQI = 522, MIPS_INS_SH = 523, MIPS_INS_SH16 = 524, MIPS_INS_SHF = 525, MIPS_INS_SHILO = 526, MIPS_INS_SHILOV = 527, MIPS_INS_SHLLV = 528, MIPS_INS_SHLLV_S = 529, MIPS_INS_SHLL = 530, MIPS_INS_SHLL_S = 531, MIPS_INS_SHRAV = 532, MIPS_INS_SHRAV_R = 533, MIPS_INS_SHRA = 534, MIPS_INS_SHRA_R = 535, MIPS_INS_SHRLV = 536, MIPS_INS_SHRL = 537, MIPS_INS_SLDI = 538, MIPS_INS_SLD = 539, MIPS_INS_SLL = 540, MIPS_INS_SLL16 = 541, MIPS_INS_SLLI = 542, MIPS_INS_SLLV = 543, MIPS_INS_SLT = 544, MIPS_INS_SLTI = 545, MIPS_INS_SLTIU = 546, MIPS_INS_SLTU = 547, MIPS_INS_SNE = 548, MIPS_INS_SNEI = 549, MIPS_INS_SPLATI = 550, MIPS_INS_SPLAT = 551, MIPS_INS_SRA = 552, MIPS_INS_SRAI = 553, MIPS_INS_SRARI = 554, MIPS_INS_SRAR = 555, MIPS_INS_SRAV = 556, MIPS_INS_SRL = 557, MIPS_INS_SRL16 = 558, MIPS_INS_SRLI = 559, MIPS_INS_SRLRI = 560, MIPS_INS_SRLR = 561, MIPS_INS_SRLV = 562, MIPS_INS_SSNOP = 563, MIPS_INS_ST = 564, MIPS_INS_SUBQH = 565, MIPS_INS_SUBQH_R = 566, MIPS_INS_SUBQ = 567, MIPS_INS_SUBQ_S = 568, MIPS_INS_SUBSUS_U = 569, MIPS_INS_SUBSUU_S = 570, MIPS_INS_SUBS_S = 571, MIPS_INS_SUBS_U = 572, MIPS_INS_SUBU16 = 573, MIPS_INS_SUBUH = 574, MIPS_INS_SUBUH_R = 575, MIPS_INS_SUBU = 576, MIPS_INS_SUBU_S = 577, MIPS_INS_SUBVI = 578, MIPS_INS_SUBV = 579, MIPS_INS_SUXC1 = 580, MIPS_INS_SW = 581, MIPS_INS_SW16 = 582, MIPS_INS_SWC1 = 583, MIPS_INS_SWC2 = 584, MIPS_INS_SWC3 = 585, MIPS_INS_SWL = 586, MIPS_INS_SWM16 = 587, MIPS_INS_SWM32 = 588, MIPS_INS_SWP = 589, MIPS_INS_SWR = 590, MIPS_INS_SWXC1 = 591, MIPS_INS_SYNC = 592, MIPS_INS_SYNCI = 593, MIPS_INS_SYSCALL = 594, MIPS_INS_TEQ = 595, MIPS_INS_TEQI = 596, MIPS_INS_TGE = 597, MIPS_INS_TGEI = 598, MIPS_INS_TGEIU = 599, MIPS_INS_TGEU = 600, MIPS_INS_TLBP = 601, MIPS_INS_TLBR = 602, MIPS_INS_TLBWI = 603, MIPS_INS_TLBWR = 604, MIPS_INS_TLT = 605, MIPS_INS_TLTI = 606, MIPS_INS_TLTIU = 607, MIPS_INS_TLTU = 608, MIPS_INS_TNE = 609, MIPS_INS_TNEI = 610, MIPS_INS_TRUNC = 611, MIPS_INS_V3MULU = 612, MIPS_INS_VMM0 = 613, MIPS_INS_VMULU = 614, MIPS_INS_VSHF = 615, MIPS_INS_WAIT = 616, MIPS_INS_WRDSP = 617, MIPS_INS_WSBH = 618, MIPS_INS_XOR = 619, MIPS_INS_XOR16 = 620, MIPS_INS_XORI = 621, MIPS_INS_NOP = 622, MIPS_INS_NEGU = 623, MIPS_INS_JALR_HB = 624, MIPS_INS_JR_HB = 625, MIPS_INS_ENDING = 626, } pub mod mips_insn_group { #[doc = " Group of MIPS instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const MIPS_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const MIPS_GRP_JUMP: Type = 1; #[doc = "< = CS_GRP_CALL"] pub const MIPS_GRP_CALL: Type = 2; #[doc = "< = CS_GRP_RET"] pub const MIPS_GRP_RET: Type = 3; #[doc = "< = CS_GRP_INT"] pub const MIPS_GRP_INT: Type = 4; #[doc = "< = CS_GRP_IRET"] pub const MIPS_GRP_IRET: Type = 5; #[doc = "< = CS_GRP_PRIVILEGE"] pub const MIPS_GRP_PRIVILEGE: Type = 6; #[doc = "< = CS_GRP_BRANCH_RELATIVE"] pub const MIPS_GRP_BRANCH_RELATIVE: Type = 7; pub const MIPS_GRP_BITCOUNT: Type = 128; pub const MIPS_GRP_DSP: Type = 129; pub const MIPS_GRP_DSPR2: Type = 130; pub const MIPS_GRP_FPIDX: Type = 131; pub const MIPS_GRP_MSA: Type = 132; pub const MIPS_GRP_MIPS32R2: Type = 133; pub const MIPS_GRP_MIPS64: Type = 134; pub const MIPS_GRP_MIPS64R2: Type = 135; pub const MIPS_GRP_SEINREG: Type = 136; pub const MIPS_GRP_STDENC: Type = 137; pub const MIPS_GRP_SWAP: Type = 138; pub const MIPS_GRP_MICROMIPS: Type = 139; pub const MIPS_GRP_MIPS16MODE: Type = 140; pub const MIPS_GRP_FP64BIT: Type = 141; pub const MIPS_GRP_NONANSFPMATH: Type = 142; pub const MIPS_GRP_NOTFP64BIT: Type = 143; pub const MIPS_GRP_NOTINMICROMIPS: Type = 144; pub const MIPS_GRP_NOTNACL: Type = 145; pub const MIPS_GRP_NOTMIPS32R6: Type = 146; pub const MIPS_GRP_NOTMIPS64R6: Type = 147; pub const MIPS_GRP_CNMIPS: Type = 148; pub const MIPS_GRP_MIPS32: Type = 149; pub const MIPS_GRP_MIPS32R6: Type = 150; pub const MIPS_GRP_MIPS64R6: Type = 151; pub const MIPS_GRP_MIPS2: Type = 152; pub const MIPS_GRP_MIPS3: Type = 153; pub const MIPS_GRP_MIPS3_32: Type = 154; pub const MIPS_GRP_MIPS3_32R2: Type = 155; pub const MIPS_GRP_MIPS4_32: Type = 156; pub const MIPS_GRP_MIPS4_32R2: Type = 157; pub const MIPS_GRP_MIPS5_32R2: Type = 158; pub const MIPS_GRP_GP32BIT: Type = 159; pub const MIPS_GRP_GP64BIT: Type = 160; pub const MIPS_GRP_ENDING: Type = 161; } #[repr(u32)] #[doc = " PPC branch codes for some branch instructions"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum ppc_bc { PPC_BC_INVALID = 0, PPC_BC_LT = 12, PPC_BC_LE = 36, PPC_BC_EQ = 76, PPC_BC_GE = 4, PPC_BC_GT = 44, PPC_BC_NE = 68, PPC_BC_UN = 108, PPC_BC_NU = 100, #[doc = "< summary overflow"] PPC_BC_SO = 140, #[doc = "< not summary overflow"] PPC_BC_NS = 132, } #[repr(u32)] #[doc = " PPC branch hint for some branch instructions"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum ppc_bh { #[doc = "< no hint"] PPC_BH_INVALID = 0, #[doc = "< PLUS hint"] PPC_BH_PLUS = 1, #[doc = "< MINUS hint"] PPC_BH_MINUS = 2, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum ppc_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] PPC_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] PPC_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] PPC_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] PPC_OP_MEM = 3, #[doc = "< Condition Register field"] PPC_OP_CRX = 64, } pub mod ppc_reg { #[doc = " PPC registers"] pub type Type = u32; pub const PPC_REG_INVALID: Type = 0; pub const PPC_REG_CARRY: Type = 1; pub const PPC_REG_CR0: Type = 2; pub const PPC_REG_CR1: Type = 3; pub const PPC_REG_CR2: Type = 4; pub const PPC_REG_CR3: Type = 5; pub const PPC_REG_CR4: Type = 6; pub const PPC_REG_CR5: Type = 7; pub const PPC_REG_CR6: Type = 8; pub const PPC_REG_CR7: Type = 9; pub const PPC_REG_CTR: Type = 10; pub const PPC_REG_F0: Type = 11; pub const PPC_REG_F1: Type = 12; pub const PPC_REG_F2: Type = 13; pub const PPC_REG_F3: Type = 14; pub const PPC_REG_F4: Type = 15; pub const PPC_REG_F5: Type = 16; pub const PPC_REG_F6: Type = 17; pub const PPC_REG_F7: Type = 18; pub const PPC_REG_F8: Type = 19; pub const PPC_REG_F9: Type = 20; pub const PPC_REG_F10: Type = 21; pub const PPC_REG_F11: Type = 22; pub const PPC_REG_F12: Type = 23; pub const PPC_REG_F13: Type = 24; pub const PPC_REG_F14: Type = 25; pub const PPC_REG_F15: Type = 26; pub const PPC_REG_F16: Type = 27; pub const PPC_REG_F17: Type = 28; pub const PPC_REG_F18: Type = 29; pub const PPC_REG_F19: Type = 30; pub const PPC_REG_F20: Type = 31; pub const PPC_REG_F21: Type = 32; pub const PPC_REG_F22: Type = 33; pub const PPC_REG_F23: Type = 34; pub const PPC_REG_F24: Type = 35; pub const PPC_REG_F25: Type = 36; pub const PPC_REG_F26: Type = 37; pub const PPC_REG_F27: Type = 38; pub const PPC_REG_F28: Type = 39; pub const PPC_REG_F29: Type = 40; pub const PPC_REG_F30: Type = 41; pub const PPC_REG_F31: Type = 42; pub const PPC_REG_LR: Type = 43; pub const PPC_REG_R0: Type = 44; pub const PPC_REG_R1: Type = 45; pub const PPC_REG_R2: Type = 46; pub const PPC_REG_R3: Type = 47; pub const PPC_REG_R4: Type = 48; pub const PPC_REG_R5: Type = 49; pub const PPC_REG_R6: Type = 50; pub const PPC_REG_R7: Type = 51; pub const PPC_REG_R8: Type = 52; pub const PPC_REG_R9: Type = 53; pub const PPC_REG_R10: Type = 54; pub const PPC_REG_R11: Type = 55; pub const PPC_REG_R12: Type = 56; pub const PPC_REG_R13: Type = 57; pub const PPC_REG_R14: Type = 58; pub const PPC_REG_R15: Type = 59; pub const PPC_REG_R16: Type = 60; pub const PPC_REG_R17: Type = 61; pub const PPC_REG_R18: Type = 62; pub const PPC_REG_R19: Type = 63; pub const PPC_REG_R20: Type = 64; pub const PPC_REG_R21: Type = 65; pub const PPC_REG_R22: Type = 66; pub const PPC_REG_R23: Type = 67; pub const PPC_REG_R24: Type = 68; pub const PPC_REG_R25: Type = 69; pub const PPC_REG_R26: Type = 70; pub const PPC_REG_R27: Type = 71; pub const PPC_REG_R28: Type = 72; pub const PPC_REG_R29: Type = 73; pub const PPC_REG_R30: Type = 74; pub const PPC_REG_R31: Type = 75; pub const PPC_REG_V0: Type = 76; pub const PPC_REG_V1: Type = 77; pub const PPC_REG_V2: Type = 78; pub const PPC_REG_V3: Type = 79; pub const PPC_REG_V4: Type = 80; pub const PPC_REG_V5: Type = 81; pub const PPC_REG_V6: Type = 82; pub const PPC_REG_V7: Type = 83; pub const PPC_REG_V8: Type = 84; pub const PPC_REG_V9: Type = 85; pub const PPC_REG_V10: Type = 86; pub const PPC_REG_V11: Type = 87; pub const PPC_REG_V12: Type = 88; pub const PPC_REG_V13: Type = 89; pub const PPC_REG_V14: Type = 90; pub const PPC_REG_V15: Type = 91; pub const PPC_REG_V16: Type = 92; pub const PPC_REG_V17: Type = 93; pub const PPC_REG_V18: Type = 94; pub const PPC_REG_V19: Type = 95; pub const PPC_REG_V20: Type = 96; pub const PPC_REG_V21: Type = 97; pub const PPC_REG_V22: Type = 98; pub const PPC_REG_V23: Type = 99; pub const PPC_REG_V24: Type = 100; pub const PPC_REG_V25: Type = 101; pub const PPC_REG_V26: Type = 102; pub const PPC_REG_V27: Type = 103; pub const PPC_REG_V28: Type = 104; pub const PPC_REG_V29: Type = 105; pub const PPC_REG_V30: Type = 106; pub const PPC_REG_V31: Type = 107; pub const PPC_REG_VRSAVE: Type = 108; pub const PPC_REG_VS0: Type = 109; pub const PPC_REG_VS1: Type = 110; pub const PPC_REG_VS2: Type = 111; pub const PPC_REG_VS3: Type = 112; pub const PPC_REG_VS4: Type = 113; pub const PPC_REG_VS5: Type = 114; pub const PPC_REG_VS6: Type = 115; pub const PPC_REG_VS7: Type = 116; pub const PPC_REG_VS8: Type = 117; pub const PPC_REG_VS9: Type = 118; pub const PPC_REG_VS10: Type = 119; pub const PPC_REG_VS11: Type = 120; pub const PPC_REG_VS12: Type = 121; pub const PPC_REG_VS13: Type = 122; pub const PPC_REG_VS14: Type = 123; pub const PPC_REG_VS15: Type = 124; pub const PPC_REG_VS16: Type = 125; pub const PPC_REG_VS17: Type = 126; pub const PPC_REG_VS18: Type = 127; pub const PPC_REG_VS19: Type = 128; pub const PPC_REG_VS20: Type = 129; pub const PPC_REG_VS21: Type = 130; pub const PPC_REG_VS22: Type = 131; pub const PPC_REG_VS23: Type = 132; pub const PPC_REG_VS24: Type = 133; pub const PPC_REG_VS25: Type = 134; pub const PPC_REG_VS26: Type = 135; pub const PPC_REG_VS27: Type = 136; pub const PPC_REG_VS28: Type = 137; pub const PPC_REG_VS29: Type = 138; pub const PPC_REG_VS30: Type = 139; pub const PPC_REG_VS31: Type = 140; pub const PPC_REG_VS32: Type = 141; pub const PPC_REG_VS33: Type = 142; pub const PPC_REG_VS34: Type = 143; pub const PPC_REG_VS35: Type = 144; pub const PPC_REG_VS36: Type = 145; pub const PPC_REG_VS37: Type = 146; pub const PPC_REG_VS38: Type = 147; pub const PPC_REG_VS39: Type = 148; pub const PPC_REG_VS40: Type = 149; pub const PPC_REG_VS41: Type = 150; pub const PPC_REG_VS42: Type = 151; pub const PPC_REG_VS43: Type = 152; pub const PPC_REG_VS44: Type = 153; pub const PPC_REG_VS45: Type = 154; pub const PPC_REG_VS46: Type = 155; pub const PPC_REG_VS47: Type = 156; pub const PPC_REG_VS48: Type = 157; pub const PPC_REG_VS49: Type = 158; pub const PPC_REG_VS50: Type = 159; pub const PPC_REG_VS51: Type = 160; pub const PPC_REG_VS52: Type = 161; pub const PPC_REG_VS53: Type = 162; pub const PPC_REG_VS54: Type = 163; pub const PPC_REG_VS55: Type = 164; pub const PPC_REG_VS56: Type = 165; pub const PPC_REG_VS57: Type = 166; pub const PPC_REG_VS58: Type = 167; pub const PPC_REG_VS59: Type = 168; pub const PPC_REG_VS60: Type = 169; pub const PPC_REG_VS61: Type = 170; pub const PPC_REG_VS62: Type = 171; pub const PPC_REG_VS63: Type = 172; pub const PPC_REG_Q0: Type = 173; pub const PPC_REG_Q1: Type = 174; pub const PPC_REG_Q2: Type = 175; pub const PPC_REG_Q3: Type = 176; pub const PPC_REG_Q4: Type = 177; pub const PPC_REG_Q5: Type = 178; pub const PPC_REG_Q6: Type = 179; pub const PPC_REG_Q7: Type = 180; pub const PPC_REG_Q8: Type = 181; pub const PPC_REG_Q9: Type = 182; pub const PPC_REG_Q10: Type = 183; pub const PPC_REG_Q11: Type = 184; pub const PPC_REG_Q12: Type = 185; pub const PPC_REG_Q13: Type = 186; pub const PPC_REG_Q14: Type = 187; pub const PPC_REG_Q15: Type = 188; pub const PPC_REG_Q16: Type = 189; pub const PPC_REG_Q17: Type = 190; pub const PPC_REG_Q18: Type = 191; pub const PPC_REG_Q19: Type = 192; pub const PPC_REG_Q20: Type = 193; pub const PPC_REG_Q21: Type = 194; pub const PPC_REG_Q22: Type = 195; pub const PPC_REG_Q23: Type = 196; pub const PPC_REG_Q24: Type = 197; pub const PPC_REG_Q25: Type = 198; pub const PPC_REG_Q26: Type = 199; pub const PPC_REG_Q27: Type = 200; pub const PPC_REG_Q28: Type = 201; pub const PPC_REG_Q29: Type = 202; pub const PPC_REG_Q30: Type = 203; pub const PPC_REG_Q31: Type = 204; pub const PPC_REG_RM: Type = 205; pub const PPC_REG_CTR8: Type = 206; pub const PPC_REG_LR8: Type = 207; pub const PPC_REG_CR1EQ: Type = 208; pub const PPC_REG_X2: Type = 209; pub const PPC_REG_ENDING: Type = 210; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with PPC_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct ppc_op_mem { #[doc = "< base register"] pub base: ppc_reg::Type, #[doc = "< displacement/offset value"] pub disp: i32, } impl Clone for ppc_op_mem { fn clone(&self) -> Self { *self } } #[repr(C)] #[derive(Debug, Copy)] pub struct ppc_op_crx { pub scale: libc::c_uint, pub reg: ppc_reg::Type, pub cond: ppc_bc, } impl Clone for ppc_op_crx { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_ppc_op { #[doc = "< operand type"] pub type_: ppc_op_type, pub __bindgen_anon_1: cs_ppc_op__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union cs_ppc_op__bindgen_ty_1 { #[doc = "< register value for REG operand"] pub reg: ppc_reg::Type, #[doc = "< immediate value for IMM operand"] pub imm: i64, #[doc = "< base/disp value for MEM operand"] pub mem: ppc_op_mem, #[doc = "< operand with condition register"] pub crx: ppc_op_crx, _bindgen_union_align: [u64; 2usize], } impl Clone for cs_ppc_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_ppc_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_ppc_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_ppc_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_ppc_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_ppc_op {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_ppc { #[doc = " branch code for branch instructions"] pub bc: ppc_bc, #[doc = " branch hint for branch instructions"] pub bh: ppc_bh, #[doc = " if update_cr0 = True, then this 'dot' insn updates CR0"] pub update_cr0: bool, #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_ppc_op; 8usize], } impl Clone for cs_ppc { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_ppc { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_ppc {{ bc: {:?}, bh: {:?}, update_cr0: {:?}, op_count: {:?}, operands: {:?} }}", self.bc, self.bh, self.update_cr0, self.op_count, self.operands ) } } #[repr(u32)] #[doc = " PPC instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum ppc_insn { PPC_INS_INVALID = 0, PPC_INS_ADD = 1, PPC_INS_ADDC = 2, PPC_INS_ADDE = 3, PPC_INS_ADDI = 4, PPC_INS_ADDIC = 5, PPC_INS_ADDIS = 6, PPC_INS_ADDME = 7, PPC_INS_ADDZE = 8, PPC_INS_AND = 9, PPC_INS_ANDC = 10, PPC_INS_ANDIS = 11, PPC_INS_ANDI = 12, PPC_INS_ATTN = 13, PPC_INS_B = 14, PPC_INS_BA = 15, PPC_INS_BC = 16, PPC_INS_BCCTR = 17, PPC_INS_BCCTRL = 18, PPC_INS_BCL = 19, PPC_INS_BCLR = 20, PPC_INS_BCLRL = 21, PPC_INS_BCTR = 22, PPC_INS_BCTRL = 23, PPC_INS_BCT = 24, PPC_INS_BDNZ = 25, PPC_INS_BDNZA = 26, PPC_INS_BDNZL = 27, PPC_INS_BDNZLA = 28, PPC_INS_BDNZLR = 29, PPC_INS_BDNZLRL = 30, PPC_INS_BDZ = 31, PPC_INS_BDZA = 32, PPC_INS_BDZL = 33, PPC_INS_BDZLA = 34, PPC_INS_BDZLR = 35, PPC_INS_BDZLRL = 36, PPC_INS_BL = 37, PPC_INS_BLA = 38, PPC_INS_BLR = 39, PPC_INS_BLRL = 40, PPC_INS_BRINC = 41, PPC_INS_CMPB = 42, PPC_INS_CMPD = 43, PPC_INS_CMPDI = 44, PPC_INS_CMPLD = 45, PPC_INS_CMPLDI = 46, PPC_INS_CMPLW = 47, PPC_INS_CMPLWI = 48, PPC_INS_CMPW = 49, PPC_INS_CMPWI = 50, PPC_INS_CNTLZD = 51, PPC_INS_CNTLZW = 52, PPC_INS_CREQV = 53, PPC_INS_CRXOR = 54, PPC_INS_CRAND = 55, PPC_INS_CRANDC = 56, PPC_INS_CRNAND = 57, PPC_INS_CRNOR = 58, PPC_INS_CROR = 59, PPC_INS_CRORC = 60, PPC_INS_DCBA = 61, PPC_INS_DCBF = 62, PPC_INS_DCBI = 63, PPC_INS_DCBST = 64, PPC_INS_DCBT = 65, PPC_INS_DCBTST = 66, PPC_INS_DCBZ = 67, PPC_INS_DCBZL = 68, PPC_INS_DCCCI = 69, PPC_INS_DIVD = 70, PPC_INS_DIVDU = 71, PPC_INS_DIVW = 72, PPC_INS_DIVWU = 73, PPC_INS_DSS = 74, PPC_INS_DSSALL = 75, PPC_INS_DST = 76, PPC_INS_DSTST = 77, PPC_INS_DSTSTT = 78, PPC_INS_DSTT = 79, PPC_INS_EQV = 80, PPC_INS_EVABS = 81, PPC_INS_EVADDIW = 82, PPC_INS_EVADDSMIAAW = 83, PPC_INS_EVADDSSIAAW = 84, PPC_INS_EVADDUMIAAW = 85, PPC_INS_EVADDUSIAAW = 86, PPC_INS_EVADDW = 87, PPC_INS_EVAND = 88, PPC_INS_EVANDC = 89, PPC_INS_EVCMPEQ = 90, PPC_INS_EVCMPGTS = 91, PPC_INS_EVCMPGTU = 92, PPC_INS_EVCMPLTS = 93, PPC_INS_EVCMPLTU = 94, PPC_INS_EVCNTLSW = 95, PPC_INS_EVCNTLZW = 96, PPC_INS_EVDIVWS = 97, PPC_INS_EVDIVWU = 98, PPC_INS_EVEQV = 99, PPC_INS_EVEXTSB = 100, PPC_INS_EVEXTSH = 101, PPC_INS_EVLDD = 102, PPC_INS_EVLDDX = 103, PPC_INS_EVLDH = 104, PPC_INS_EVLDHX = 105, PPC_INS_EVLDW = 106, PPC_INS_EVLDWX = 107, PPC_INS_EVLHHESPLAT = 108, PPC_INS_EVLHHESPLATX = 109, PPC_INS_EVLHHOSSPLAT = 110, PPC_INS_EVLHHOSSPLATX = 111, PPC_INS_EVLHHOUSPLAT = 112, PPC_INS_EVLHHOUSPLATX = 113, PPC_INS_EVLWHE = 114, PPC_INS_EVLWHEX = 115, PPC_INS_EVLWHOS = 116, PPC_INS_EVLWHOSX = 117, PPC_INS_EVLWHOU = 118, PPC_INS_EVLWHOUX = 119, PPC_INS_EVLWHSPLAT = 120, PPC_INS_EVLWHSPLATX = 121, PPC_INS_EVLWWSPLAT = 122, PPC_INS_EVLWWSPLATX = 123, PPC_INS_EVMERGEHI = 124, PPC_INS_EVMERGEHILO = 125, PPC_INS_EVMERGELO = 126, PPC_INS_EVMERGELOHI = 127, PPC_INS_EVMHEGSMFAA = 128, PPC_INS_EVMHEGSMFAN = 129, PPC_INS_EVMHEGSMIAA = 130, PPC_INS_EVMHEGSMIAN = 131, PPC_INS_EVMHEGUMIAA = 132, PPC_INS_EVMHEGUMIAN = 133, PPC_INS_EVMHESMF = 134, PPC_INS_EVMHESMFA = 135, PPC_INS_EVMHESMFAAW = 136, PPC_INS_EVMHESMFANW = 137, PPC_INS_EVMHESMI = 138, PPC_INS_EVMHESMIA = 139, PPC_INS_EVMHESMIAAW = 140, PPC_INS_EVMHESMIANW = 141, PPC_INS_EVMHESSF = 142, PPC_INS_EVMHESSFA = 143, PPC_INS_EVMHESSFAAW = 144, PPC_INS_EVMHESSFANW = 145, PPC_INS_EVMHESSIAAW = 146, PPC_INS_EVMHESSIANW = 147, PPC_INS_EVMHEUMI = 148, PPC_INS_EVMHEUMIA = 149, PPC_INS_EVMHEUMIAAW = 150, PPC_INS_EVMHEUMIANW = 151, PPC_INS_EVMHEUSIAAW = 152, PPC_INS_EVMHEUSIANW = 153, PPC_INS_EVMHOGSMFAA = 154, PPC_INS_EVMHOGSMFAN = 155, PPC_INS_EVMHOGSMIAA = 156, PPC_INS_EVMHOGSMIAN = 157, PPC_INS_EVMHOGUMIAA = 158, PPC_INS_EVMHOGUMIAN = 159, PPC_INS_EVMHOSMF = 160, PPC_INS_EVMHOSMFA = 161, PPC_INS_EVMHOSMFAAW = 162, PPC_INS_EVMHOSMFANW = 163, PPC_INS_EVMHOSMI = 164, PPC_INS_EVMHOSMIA = 165, PPC_INS_EVMHOSMIAAW = 166, PPC_INS_EVMHOSMIANW = 167, PPC_INS_EVMHOSSF = 168, PPC_INS_EVMHOSSFA = 169, PPC_INS_EVMHOSSFAAW = 170, PPC_INS_EVMHOSSFANW = 171, PPC_INS_EVMHOSSIAAW = 172, PPC_INS_EVMHOSSIANW = 173, PPC_INS_EVMHOUMI = 174, PPC_INS_EVMHOUMIA = 175, PPC_INS_EVMHOUMIAAW = 176, PPC_INS_EVMHOUMIANW = 177, PPC_INS_EVMHOUSIAAW = 178, PPC_INS_EVMHOUSIANW = 179, PPC_INS_EVMRA = 180, PPC_INS_EVMWHSMF = 181, PPC_INS_EVMWHSMFA = 182, PPC_INS_EVMWHSMI = 183, PPC_INS_EVMWHSMIA = 184, PPC_INS_EVMWHSSF = 185, PPC_INS_EVMWHSSFA = 186, PPC_INS_EVMWHUMI = 187, PPC_INS_EVMWHUMIA = 188, PPC_INS_EVMWLSMIAAW = 189, PPC_INS_EVMWLSMIANW = 190, PPC_INS_EVMWLSSIAAW = 191, PPC_INS_EVMWLSSIANW = 192, PPC_INS_EVMWLUMI = 193, PPC_INS_EVMWLUMIA = 194, PPC_INS_EVMWLUMIAAW = 195, PPC_INS_EVMWLUMIANW = 196, PPC_INS_EVMWLUSIAAW = 197, PPC_INS_EVMWLUSIANW = 198, PPC_INS_EVMWSMF = 199, PPC_INS_EVMWSMFA = 200, PPC_INS_EVMWSMFAA = 201, PPC_INS_EVMWSMFAN = 202, PPC_INS_EVMWSMI = 203, PPC_INS_EVMWSMIA = 204, PPC_INS_EVMWSMIAA = 205, PPC_INS_EVMWSMIAN = 206, PPC_INS_EVMWSSF = 207, PPC_INS_EVMWSSFA = 208, PPC_INS_EVMWSSFAA = 209, PPC_INS_EVMWSSFAN = 210, PPC_INS_EVMWUMI = 211, PPC_INS_EVMWUMIA = 212, PPC_INS_EVMWUMIAA = 213, PPC_INS_EVMWUMIAN = 214, PPC_INS_EVNAND = 215, PPC_INS_EVNEG = 216, PPC_INS_EVNOR = 217, PPC_INS_EVOR = 218, PPC_INS_EVORC = 219, PPC_INS_EVRLW = 220, PPC_INS_EVRLWI = 221, PPC_INS_EVRNDW = 222, PPC_INS_EVSLW = 223, PPC_INS_EVSLWI = 224, PPC_INS_EVSPLATFI = 225, PPC_INS_EVSPLATI = 226, PPC_INS_EVSRWIS = 227, PPC_INS_EVSRWIU = 228, PPC_INS_EVSRWS = 229, PPC_INS_EVSRWU = 230, PPC_INS_EVSTDD = 231, PPC_INS_EVSTDDX = 232, PPC_INS_EVSTDH = 233, PPC_INS_EVSTDHX = 234, PPC_INS_EVSTDW = 235, PPC_INS_EVSTDWX = 236, PPC_INS_EVSTWHE = 237, PPC_INS_EVSTWHEX = 238, PPC_INS_EVSTWHO = 239, PPC_INS_EVSTWHOX = 240, PPC_INS_EVSTWWE = 241, PPC_INS_EVSTWWEX = 242, PPC_INS_EVSTWWO = 243, PPC_INS_EVSTWWOX = 244, PPC_INS_EVSUBFSMIAAW = 245, PPC_INS_EVSUBFSSIAAW = 246, PPC_INS_EVSUBFUMIAAW = 247, PPC_INS_EVSUBFUSIAAW = 248, PPC_INS_EVSUBFW = 249, PPC_INS_EVSUBIFW = 250, PPC_INS_EVXOR = 251, PPC_INS_EXTSB = 252, PPC_INS_EXTSH = 253, PPC_INS_EXTSW = 254, PPC_INS_EIEIO = 255, PPC_INS_FABS = 256, PPC_INS_FADD = 257, PPC_INS_FADDS = 258, PPC_INS_FCFID = 259, PPC_INS_FCFIDS = 260, PPC_INS_FCFIDU = 261, PPC_INS_FCFIDUS = 262, PPC_INS_FCMPU = 263, PPC_INS_FCPSGN = 264, PPC_INS_FCTID = 265, PPC_INS_FCTIDUZ = 266, PPC_INS_FCTIDZ = 267, PPC_INS_FCTIW = 268, PPC_INS_FCTIWUZ = 269, PPC_INS_FCTIWZ = 270, PPC_INS_FDIV = 271, PPC_INS_FDIVS = 272, PPC_INS_FMADD = 273, PPC_INS_FMADDS = 274, PPC_INS_FMR = 275, PPC_INS_FMSUB = 276, PPC_INS_FMSUBS = 277, PPC_INS_FMUL = 278, PPC_INS_FMULS = 279, PPC_INS_FNABS = 280, PPC_INS_FNEG = 281, PPC_INS_FNMADD = 282, PPC_INS_FNMADDS = 283, PPC_INS_FNMSUB = 284, PPC_INS_FNMSUBS = 285, PPC_INS_FRE = 286, PPC_INS_FRES = 287, PPC_INS_FRIM = 288, PPC_INS_FRIN = 289, PPC_INS_FRIP = 290, PPC_INS_FRIZ = 291, PPC_INS_FRSP = 292, PPC_INS_FRSQRTE = 293, PPC_INS_FRSQRTES = 294, PPC_INS_FSEL = 295, PPC_INS_FSQRT = 296, PPC_INS_FSQRTS = 297, PPC_INS_FSUB = 298, PPC_INS_FSUBS = 299, PPC_INS_ICBI = 300, PPC_INS_ICBT = 301, PPC_INS_ICCCI = 302, PPC_INS_ISEL = 303, PPC_INS_ISYNC = 304, PPC_INS_LA = 305, PPC_INS_LBZ = 306, PPC_INS_LBZCIX = 307, PPC_INS_LBZU = 308, PPC_INS_LBZUX = 309, PPC_INS_LBZX = 310, PPC_INS_LD = 311, PPC_INS_LDARX = 312, PPC_INS_LDBRX = 313, PPC_INS_LDCIX = 314, PPC_INS_LDU = 315, PPC_INS_LDUX = 316, PPC_INS_LDX = 317, PPC_INS_LFD = 318, PPC_INS_LFDU = 319, PPC_INS_LFDUX = 320, PPC_INS_LFDX = 321, PPC_INS_LFIWAX = 322, PPC_INS_LFIWZX = 323, PPC_INS_LFS = 324, PPC_INS_LFSU = 325, PPC_INS_LFSUX = 326, PPC_INS_LFSX = 327, PPC_INS_LHA = 328, PPC_INS_LHAU = 329, PPC_INS_LHAUX = 330, PPC_INS_LHAX = 331, PPC_INS_LHBRX = 332, PPC_INS_LHZ = 333, PPC_INS_LHZCIX = 334, PPC_INS_LHZU = 335, PPC_INS_LHZUX = 336, PPC_INS_LHZX = 337, PPC_INS_LI = 338, PPC_INS_LIS = 339, PPC_INS_LMW = 340, PPC_INS_LSWI = 341, PPC_INS_LVEBX = 342, PPC_INS_LVEHX = 343, PPC_INS_LVEWX = 344, PPC_INS_LVSL = 345, PPC_INS_LVSR = 346, PPC_INS_LVX = 347, PPC_INS_LVXL = 348, PPC_INS_LWA = 349, PPC_INS_LWARX = 350, PPC_INS_LWAUX = 351, PPC_INS_LWAX = 352, PPC_INS_LWBRX = 353, PPC_INS_LWZ = 354, PPC_INS_LWZCIX = 355, PPC_INS_LWZU = 356, PPC_INS_LWZUX = 357, PPC_INS_LWZX = 358, PPC_INS_LXSDX = 359, PPC_INS_LXVD2X = 360, PPC_INS_LXVDSX = 361, PPC_INS_LXVW4X = 362, PPC_INS_MBAR = 363, PPC_INS_MCRF = 364, PPC_INS_MCRFS = 365, PPC_INS_MFCR = 366, PPC_INS_MFCTR = 367, PPC_INS_MFDCR = 368, PPC_INS_MFFS = 369, PPC_INS_MFLR = 370, PPC_INS_MFMSR = 371, PPC_INS_MFOCRF = 372, PPC_INS_MFSPR = 373, PPC_INS_MFSR = 374, PPC_INS_MFSRIN = 375, PPC_INS_MFTB = 376, PPC_INS_MFVSCR = 377, PPC_INS_MSYNC = 378, PPC_INS_MTCRF = 379, PPC_INS_MTCTR = 380, PPC_INS_MTDCR = 381, PPC_INS_MTFSB0 = 382, PPC_INS_MTFSB1 = 383, PPC_INS_MTFSF = 384, PPC_INS_MTFSFI = 385, PPC_INS_MTLR = 386, PPC_INS_MTMSR = 387, PPC_INS_MTMSRD = 388, PPC_INS_MTOCRF = 389, PPC_INS_MTSPR = 390, PPC_INS_MTSR = 391, PPC_INS_MTSRIN = 392, PPC_INS_MTVSCR = 393, PPC_INS_MULHD = 394, PPC_INS_MULHDU = 395, PPC_INS_MULHW = 396, PPC_INS_MULHWU = 397, PPC_INS_MULLD = 398, PPC_INS_MULLI = 399, PPC_INS_MULLW = 400, PPC_INS_NAND = 401, PPC_INS_NEG = 402, PPC_INS_NOP = 403, PPC_INS_ORI = 404, PPC_INS_NOR = 405, PPC_INS_OR = 406, PPC_INS_ORC = 407, PPC_INS_ORIS = 408, PPC_INS_POPCNTD = 409, PPC_INS_POPCNTW = 410, PPC_INS_QVALIGNI = 411, PPC_INS_QVESPLATI = 412, PPC_INS_QVFABS = 413, PPC_INS_QVFADD = 414, PPC_INS_QVFADDS = 415, PPC_INS_QVFCFID = 416, PPC_INS_QVFCFIDS = 417, PPC_INS_QVFCFIDU = 418, PPC_INS_QVFCFIDUS = 419, PPC_INS_QVFCMPEQ = 420, PPC_INS_QVFCMPGT = 421, PPC_INS_QVFCMPLT = 422, PPC_INS_QVFCPSGN = 423, PPC_INS_QVFCTID = 424, PPC_INS_QVFCTIDU = 425, PPC_INS_QVFCTIDUZ = 426, PPC_INS_QVFCTIDZ = 427, PPC_INS_QVFCTIW = 428, PPC_INS_QVFCTIWU = 429, PPC_INS_QVFCTIWUZ = 430, PPC_INS_QVFCTIWZ = 431, PPC_INS_QVFLOGICAL = 432, PPC_INS_QVFMADD = 433, PPC_INS_QVFMADDS = 434, PPC_INS_QVFMR = 435, PPC_INS_QVFMSUB = 436, PPC_INS_QVFMSUBS = 437, PPC_INS_QVFMUL = 438, PPC_INS_QVFMULS = 439, PPC_INS_QVFNABS = 440, PPC_INS_QVFNEG = 441, PPC_INS_QVFNMADD = 442, PPC_INS_QVFNMADDS = 443, PPC_INS_QVFNMSUB = 444, PPC_INS_QVFNMSUBS = 445, PPC_INS_QVFPERM = 446, PPC_INS_QVFRE = 447, PPC_INS_QVFRES = 448, PPC_INS_QVFRIM = 449, PPC_INS_QVFRIN = 450, PPC_INS_QVFRIP = 451, PPC_INS_QVFRIZ = 452, PPC_INS_QVFRSP = 453, PPC_INS_QVFRSQRTE = 454, PPC_INS_QVFRSQRTES = 455, PPC_INS_QVFSEL = 456, PPC_INS_QVFSUB = 457, PPC_INS_QVFSUBS = 458, PPC_INS_QVFTSTNAN = 459, PPC_INS_QVFXMADD = 460, PPC_INS_QVFXMADDS = 461, PPC_INS_QVFXMUL = 462, PPC_INS_QVFXMULS = 463, PPC_INS_QVFXXCPNMADD = 464, PPC_INS_QVFXXCPNMADDS = 465, PPC_INS_QVFXXMADD = 466, PPC_INS_QVFXXMADDS = 467, PPC_INS_QVFXXNPMADD = 468, PPC_INS_QVFXXNPMADDS = 469, PPC_INS_QVGPCI = 470, PPC_INS_QVLFCDUX = 471, PPC_INS_QVLFCDUXA = 472, PPC_INS_QVLFCDX = 473, PPC_INS_QVLFCDXA = 474, PPC_INS_QVLFCSUX = 475, PPC_INS_QVLFCSUXA = 476, PPC_INS_QVLFCSX = 477, PPC_INS_QVLFCSXA = 478, PPC_INS_QVLFDUX = 479, PPC_INS_QVLFDUXA = 480, PPC_INS_QVLFDX = 481, PPC_INS_QVLFDXA = 482, PPC_INS_QVLFIWAX = 483, PPC_INS_QVLFIWAXA = 484, PPC_INS_QVLFIWZX = 485, PPC_INS_QVLFIWZXA = 486, PPC_INS_QVLFSUX = 487, PPC_INS_QVLFSUXA = 488, PPC_INS_QVLFSX = 489, PPC_INS_QVLFSXA = 490, PPC_INS_QVLPCLDX = 491, PPC_INS_QVLPCLSX = 492, PPC_INS_QVLPCRDX = 493, PPC_INS_QVLPCRSX = 494, PPC_INS_QVSTFCDUX = 495, PPC_INS_QVSTFCDUXA = 496, PPC_INS_QVSTFCDUXI = 497, PPC_INS_QVSTFCDUXIA = 498, PPC_INS_QVSTFCDX = 499, PPC_INS_QVSTFCDXA = 500, PPC_INS_QVSTFCDXI = 501, PPC_INS_QVSTFCDXIA = 502, PPC_INS_QVSTFCSUX = 503, PPC_INS_QVSTFCSUXA = 504, PPC_INS_QVSTFCSUXI = 505, PPC_INS_QVSTFCSUXIA = 506, PPC_INS_QVSTFCSX = 507, PPC_INS_QVSTFCSXA = 508, PPC_INS_QVSTFCSXI = 509, PPC_INS_QVSTFCSXIA = 510, PPC_INS_QVSTFDUX = 511, PPC_INS_QVSTFDUXA = 512, PPC_INS_QVSTFDUXI = 513, PPC_INS_QVSTFDUXIA = 514, PPC_INS_QVSTFDX = 515, PPC_INS_QVSTFDXA = 516, PPC_INS_QVSTFDXI = 517, PPC_INS_QVSTFDXIA = 518, PPC_INS_QVSTFIWX = 519, PPC_INS_QVSTFIWXA = 520, PPC_INS_QVSTFSUX = 521, PPC_INS_QVSTFSUXA = 522, PPC_INS_QVSTFSUXI = 523, PPC_INS_QVSTFSUXIA = 524, PPC_INS_QVSTFSX = 525, PPC_INS_QVSTFSXA = 526, PPC_INS_QVSTFSXI = 527, PPC_INS_QVSTFSXIA = 528, PPC_INS_RFCI = 529, PPC_INS_RFDI = 530, PPC_INS_RFI = 531, PPC_INS_RFID = 532, PPC_INS_RFMCI = 533, PPC_INS_RLDCL = 534, PPC_INS_RLDCR = 535, PPC_INS_RLDIC = 536, PPC_INS_RLDICL = 537, PPC_INS_RLDICR = 538, PPC_INS_RLDIMI = 539, PPC_INS_RLWIMI = 540, PPC_INS_RLWINM = 541, PPC_INS_RLWNM = 542, PPC_INS_SC = 543, PPC_INS_SLBIA = 544, PPC_INS_SLBIE = 545, PPC_INS_SLBMFEE = 546, PPC_INS_SLBMTE = 547, PPC_INS_SLD = 548, PPC_INS_SLW = 549, PPC_INS_SRAD = 550, PPC_INS_SRADI = 551, PPC_INS_SRAW = 552, PPC_INS_SRAWI = 553, PPC_INS_SRD = 554, PPC_INS_SRW = 555, PPC_INS_STB = 556, PPC_INS_STBCIX = 557, PPC_INS_STBU = 558, PPC_INS_STBUX = 559, PPC_INS_STBX = 560, PPC_INS_STD = 561, PPC_INS_STDBRX = 562, PPC_INS_STDCIX = 563, PPC_INS_STDCX = 564, PPC_INS_STDU = 565, PPC_INS_STDUX = 566, PPC_INS_STDX = 567, PPC_INS_STFD = 568, PPC_INS_STFDU = 569, PPC_INS_STFDUX = 570, PPC_INS_STFDX = 571, PPC_INS_STFIWX = 572, PPC_INS_STFS = 573, PPC_INS_STFSU = 574, PPC_INS_STFSUX = 575, PPC_INS_STFSX = 576, PPC_INS_STH = 577, PPC_INS_STHBRX = 578, PPC_INS_STHCIX = 579, PPC_INS_STHU = 580, PPC_INS_STHUX = 581, PPC_INS_STHX = 582, PPC_INS_STMW = 583, PPC_INS_STSWI = 584, PPC_INS_STVEBX = 585, PPC_INS_STVEHX = 586, PPC_INS_STVEWX = 587, PPC_INS_STVX = 588, PPC_INS_STVXL = 589, PPC_INS_STW = 590, PPC_INS_STWBRX = 591, PPC_INS_STWCIX = 592, PPC_INS_STWCX = 593, PPC_INS_STWU = 594, PPC_INS_STWUX = 595, PPC_INS_STWX = 596, PPC_INS_STXSDX = 597, PPC_INS_STXVD2X = 598, PPC_INS_STXVW4X = 599, PPC_INS_SUBF = 600, PPC_INS_SUBFC = 601, PPC_INS_SUBFE = 602, PPC_INS_SUBFIC = 603, PPC_INS_SUBFME = 604, PPC_INS_SUBFZE = 605, PPC_INS_SYNC = 606, PPC_INS_TD = 607, PPC_INS_TDI = 608, PPC_INS_TLBIA = 609, PPC_INS_TLBIE = 610, PPC_INS_TLBIEL = 611, PPC_INS_TLBIVAX = 612, PPC_INS_TLBLD = 613, PPC_INS_TLBLI = 614, PPC_INS_TLBRE = 615, PPC_INS_TLBSX = 616, PPC_INS_TLBSYNC = 617, PPC_INS_TLBWE = 618, PPC_INS_TRAP = 619, PPC_INS_TW = 620, PPC_INS_TWI = 621, PPC_INS_VADDCUW = 622, PPC_INS_VADDFP = 623, PPC_INS_VADDSBS = 624, PPC_INS_VADDSHS = 625, PPC_INS_VADDSWS = 626, PPC_INS_VADDUBM = 627, PPC_INS_VADDUBS = 628, PPC_INS_VADDUDM = 629, PPC_INS_VADDUHM = 630, PPC_INS_VADDUHS = 631, PPC_INS_VADDUWM = 632, PPC_INS_VADDUWS = 633, PPC_INS_VAND = 634, PPC_INS_VANDC = 635, PPC_INS_VAVGSB = 636, PPC_INS_VAVGSH = 637, PPC_INS_VAVGSW = 638, PPC_INS_VAVGUB = 639, PPC_INS_VAVGUH = 640, PPC_INS_VAVGUW = 641, PPC_INS_VCFSX = 642, PPC_INS_VCFUX = 643, PPC_INS_VCLZB = 644, PPC_INS_VCLZD = 645, PPC_INS_VCLZH = 646, PPC_INS_VCLZW = 647, PPC_INS_VCMPBFP = 648, PPC_INS_VCMPEQFP = 649, PPC_INS_VCMPEQUB = 650, PPC_INS_VCMPEQUD = 651, PPC_INS_VCMPEQUH = 652, PPC_INS_VCMPEQUW = 653, PPC_INS_VCMPGEFP = 654, PPC_INS_VCMPGTFP = 655, PPC_INS_VCMPGTSB = 656, PPC_INS_VCMPGTSD = 657, PPC_INS_VCMPGTSH = 658, PPC_INS_VCMPGTSW = 659, PPC_INS_VCMPGTUB = 660, PPC_INS_VCMPGTUD = 661, PPC_INS_VCMPGTUH = 662, PPC_INS_VCMPGTUW = 663, PPC_INS_VCTSXS = 664, PPC_INS_VCTUXS = 665, PPC_INS_VEQV = 666, PPC_INS_VEXPTEFP = 667, PPC_INS_VLOGEFP = 668, PPC_INS_VMADDFP = 669, PPC_INS_VMAXFP = 670, PPC_INS_VMAXSB = 671, PPC_INS_VMAXSD = 672, PPC_INS_VMAXSH = 673, PPC_INS_VMAXSW = 674, PPC_INS_VMAXUB = 675, PPC_INS_VMAXUD = 676, PPC_INS_VMAXUH = 677, PPC_INS_VMAXUW = 678, PPC_INS_VMHADDSHS = 679, PPC_INS_VMHRADDSHS = 680, PPC_INS_VMINUD = 681, PPC_INS_VMINFP = 682, PPC_INS_VMINSB = 683, PPC_INS_VMINSD = 684, PPC_INS_VMINSH = 685, PPC_INS_VMINSW = 686, PPC_INS_VMINUB = 687, PPC_INS_VMINUH = 688, PPC_INS_VMINUW = 689, PPC_INS_VMLADDUHM = 690, PPC_INS_VMRGHB = 691, PPC_INS_VMRGHH = 692, PPC_INS_VMRGHW = 693, PPC_INS_VMRGLB = 694, PPC_INS_VMRGLH = 695, PPC_INS_VMRGLW = 696, PPC_INS_VMSUMMBM = 697, PPC_INS_VMSUMSHM = 698, PPC_INS_VMSUMSHS = 699, PPC_INS_VMSUMUBM = 700, PPC_INS_VMSUMUHM = 701, PPC_INS_VMSUMUHS = 702, PPC_INS_VMULESB = 703, PPC_INS_VMULESH = 704, PPC_INS_VMULESW = 705, PPC_INS_VMULEUB = 706, PPC_INS_VMULEUH = 707, PPC_INS_VMULEUW = 708, PPC_INS_VMULOSB = 709, PPC_INS_VMULOSH = 710, PPC_INS_VMULOSW = 711, PPC_INS_VMULOUB = 712, PPC_INS_VMULOUH = 713, PPC_INS_VMULOUW = 714, PPC_INS_VMULUWM = 715, PPC_INS_VNAND = 716, PPC_INS_VNMSUBFP = 717, PPC_INS_VNOR = 718, PPC_INS_VOR = 719, PPC_INS_VORC = 720, PPC_INS_VPERM = 721, PPC_INS_VPKPX = 722, PPC_INS_VPKSHSS = 723, PPC_INS_VPKSHUS = 724, PPC_INS_VPKSWSS = 725, PPC_INS_VPKSWUS = 726, PPC_INS_VPKUHUM = 727, PPC_INS_VPKUHUS = 728, PPC_INS_VPKUWUM = 729, PPC_INS_VPKUWUS = 730, PPC_INS_VPOPCNTB = 731, PPC_INS_VPOPCNTD = 732, PPC_INS_VPOPCNTH = 733, PPC_INS_VPOPCNTW = 734, PPC_INS_VREFP = 735, PPC_INS_VRFIM = 736, PPC_INS_VRFIN = 737, PPC_INS_VRFIP = 738, PPC_INS_VRFIZ = 739, PPC_INS_VRLB = 740, PPC_INS_VRLD = 741, PPC_INS_VRLH = 742, PPC_INS_VRLW = 743, PPC_INS_VRSQRTEFP = 744, PPC_INS_VSEL = 745, PPC_INS_VSL = 746, PPC_INS_VSLB = 747, PPC_INS_VSLD = 748, PPC_INS_VSLDOI = 749, PPC_INS_VSLH = 750, PPC_INS_VSLO = 751, PPC_INS_VSLW = 752, PPC_INS_VSPLTB = 753, PPC_INS_VSPLTH = 754, PPC_INS_VSPLTISB = 755, PPC_INS_VSPLTISH = 756, PPC_INS_VSPLTISW = 757, PPC_INS_VSPLTW = 758, PPC_INS_VSR = 759, PPC_INS_VSRAB = 760, PPC_INS_VSRAD = 761, PPC_INS_VSRAH = 762, PPC_INS_VSRAW = 763, PPC_INS_VSRB = 764, PPC_INS_VSRD = 765, PPC_INS_VSRH = 766, PPC_INS_VSRO = 767, PPC_INS_VSRW = 768, PPC_INS_VSUBCUW = 769, PPC_INS_VSUBFP = 770, PPC_INS_VSUBSBS = 771, PPC_INS_VSUBSHS = 772, PPC_INS_VSUBSWS = 773, PPC_INS_VSUBUBM = 774, PPC_INS_VSUBUBS = 775, PPC_INS_VSUBUDM = 776, PPC_INS_VSUBUHM = 777, PPC_INS_VSUBUHS = 778, PPC_INS_VSUBUWM = 779, PPC_INS_VSUBUWS = 780, PPC_INS_VSUM2SWS = 781, PPC_INS_VSUM4SBS = 782, PPC_INS_VSUM4SHS = 783, PPC_INS_VSUM4UBS = 784, PPC_INS_VSUMSWS = 785, PPC_INS_VUPKHPX = 786, PPC_INS_VUPKHSB = 787, PPC_INS_VUPKHSH = 788, PPC_INS_VUPKLPX = 789, PPC_INS_VUPKLSB = 790, PPC_INS_VUPKLSH = 791, PPC_INS_VXOR = 792, PPC_INS_WAIT = 793, PPC_INS_WRTEE = 794, PPC_INS_WRTEEI = 795, PPC_INS_XOR = 796, PPC_INS_XORI = 797, PPC_INS_XORIS = 798, PPC_INS_XSABSDP = 799, PPC_INS_XSADDDP = 800, PPC_INS_XSCMPODP = 801, PPC_INS_XSCMPUDP = 802, PPC_INS_XSCPSGNDP = 803, PPC_INS_XSCVDPSP = 804, PPC_INS_XSCVDPSXDS = 805, PPC_INS_XSCVDPSXWS = 806, PPC_INS_XSCVDPUXDS = 807, PPC_INS_XSCVDPUXWS = 808, PPC_INS_XSCVSPDP = 809, PPC_INS_XSCVSXDDP = 810, PPC_INS_XSCVUXDDP = 811, PPC_INS_XSDIVDP = 812, PPC_INS_XSMADDADP = 813, PPC_INS_XSMADDMDP = 814, PPC_INS_XSMAXDP = 815, PPC_INS_XSMINDP = 816, PPC_INS_XSMSUBADP = 817, PPC_INS_XSMSUBMDP = 818, PPC_INS_XSMULDP = 819, PPC_INS_XSNABSDP = 820, PPC_INS_XSNEGDP = 821, PPC_INS_XSNMADDADP = 822, PPC_INS_XSNMADDMDP = 823, PPC_INS_XSNMSUBADP = 824, PPC_INS_XSNMSUBMDP = 825, PPC_INS_XSRDPI = 826, PPC_INS_XSRDPIC = 827, PPC_INS_XSRDPIM = 828, PPC_INS_XSRDPIP = 829, PPC_INS_XSRDPIZ = 830, PPC_INS_XSREDP = 831, PPC_INS_XSRSQRTEDP = 832, PPC_INS_XSSQRTDP = 833, PPC_INS_XSSUBDP = 834, PPC_INS_XSTDIVDP = 835, PPC_INS_XSTSQRTDP = 836, PPC_INS_XVABSDP = 837, PPC_INS_XVABSSP = 838, PPC_INS_XVADDDP = 839, PPC_INS_XVADDSP = 840, PPC_INS_XVCMPEQDP = 841, PPC_INS_XVCMPEQSP = 842, PPC_INS_XVCMPGEDP = 843, PPC_INS_XVCMPGESP = 844, PPC_INS_XVCMPGTDP = 845, PPC_INS_XVCMPGTSP = 846, PPC_INS_XVCPSGNDP = 847, PPC_INS_XVCPSGNSP = 848, PPC_INS_XVCVDPSP = 849, PPC_INS_XVCVDPSXDS = 850, PPC_INS_XVCVDPSXWS = 851, PPC_INS_XVCVDPUXDS = 852, PPC_INS_XVCVDPUXWS = 853, PPC_INS_XVCVSPDP = 854, PPC_INS_XVCVSPSXDS = 855, PPC_INS_XVCVSPSXWS = 856, PPC_INS_XVCVSPUXDS = 857, PPC_INS_XVCVSPUXWS = 858, PPC_INS_XVCVSXDDP = 859, PPC_INS_XVCVSXDSP = 860, PPC_INS_XVCVSXWDP = 861, PPC_INS_XVCVSXWSP = 862, PPC_INS_XVCVUXDDP = 863, PPC_INS_XVCVUXDSP = 864, PPC_INS_XVCVUXWDP = 865, PPC_INS_XVCVUXWSP = 866, PPC_INS_XVDIVDP = 867, PPC_INS_XVDIVSP = 868, PPC_INS_XVMADDADP = 869, PPC_INS_XVMADDASP = 870, PPC_INS_XVMADDMDP = 871, PPC_INS_XVMADDMSP = 872, PPC_INS_XVMAXDP = 873, PPC_INS_XVMAXSP = 874, PPC_INS_XVMINDP = 875, PPC_INS_XVMINSP = 876, PPC_INS_XVMSUBADP = 877, PPC_INS_XVMSUBASP = 878, PPC_INS_XVMSUBMDP = 879, PPC_INS_XVMSUBMSP = 880, PPC_INS_XVMULDP = 881, PPC_INS_XVMULSP = 882, PPC_INS_XVNABSDP = 883, PPC_INS_XVNABSSP = 884, PPC_INS_XVNEGDP = 885, PPC_INS_XVNEGSP = 886, PPC_INS_XVNMADDADP = 887, PPC_INS_XVNMADDASP = 888, PPC_INS_XVNMADDMDP = 889, PPC_INS_XVNMADDMSP = 890, PPC_INS_XVNMSUBADP = 891, PPC_INS_XVNMSUBASP = 892, PPC_INS_XVNMSUBMDP = 893, PPC_INS_XVNMSUBMSP = 894, PPC_INS_XVRDPI = 895, PPC_INS_XVRDPIC = 896, PPC_INS_XVRDPIM = 897, PPC_INS_XVRDPIP = 898, PPC_INS_XVRDPIZ = 899, PPC_INS_XVREDP = 900, PPC_INS_XVRESP = 901, PPC_INS_XVRSPI = 902, PPC_INS_XVRSPIC = 903, PPC_INS_XVRSPIM = 904, PPC_INS_XVRSPIP = 905, PPC_INS_XVRSPIZ = 906, PPC_INS_XVRSQRTEDP = 907, PPC_INS_XVRSQRTESP = 908, PPC_INS_XVSQRTDP = 909, PPC_INS_XVSQRTSP = 910, PPC_INS_XVSUBDP = 911, PPC_INS_XVSUBSP = 912, PPC_INS_XVTDIVDP = 913, PPC_INS_XVTDIVSP = 914, PPC_INS_XVTSQRTDP = 915, PPC_INS_XVTSQRTSP = 916, PPC_INS_XXLAND = 917, PPC_INS_XXLANDC = 918, PPC_INS_XXLEQV = 919, PPC_INS_XXLNAND = 920, PPC_INS_XXLNOR = 921, PPC_INS_XXLOR = 922, PPC_INS_XXLORC = 923, PPC_INS_XXLXOR = 924, PPC_INS_XXMRGHW = 925, PPC_INS_XXMRGLW = 926, PPC_INS_XXPERMDI = 927, PPC_INS_XXSEL = 928, PPC_INS_XXSLDWI = 929, PPC_INS_XXSPLTW = 930, PPC_INS_BCA = 931, PPC_INS_BCLA = 932, PPC_INS_SLWI = 933, PPC_INS_SRWI = 934, PPC_INS_SLDI = 935, PPC_INS_BTA = 936, PPC_INS_CRSET = 937, PPC_INS_CRNOT = 938, PPC_INS_CRMOVE = 939, PPC_INS_CRCLR = 940, PPC_INS_MFBR0 = 941, PPC_INS_MFBR1 = 942, PPC_INS_MFBR2 = 943, PPC_INS_MFBR3 = 944, PPC_INS_MFBR4 = 945, PPC_INS_MFBR5 = 946, PPC_INS_MFBR6 = 947, PPC_INS_MFBR7 = 948, PPC_INS_MFXER = 949, PPC_INS_MFRTCU = 950, PPC_INS_MFRTCL = 951, PPC_INS_MFDSCR = 952, PPC_INS_MFDSISR = 953, PPC_INS_MFDAR = 954, PPC_INS_MFSRR2 = 955, PPC_INS_MFSRR3 = 956, PPC_INS_MFCFAR = 957, PPC_INS_MFAMR = 958, PPC_INS_MFPID = 959, PPC_INS_MFTBLO = 960, PPC_INS_MFTBHI = 961, PPC_INS_MFDBATU = 962, PPC_INS_MFDBATL = 963, PPC_INS_MFIBATU = 964, PPC_INS_MFIBATL = 965, PPC_INS_MFDCCR = 966, PPC_INS_MFICCR = 967, PPC_INS_MFDEAR = 968, PPC_INS_MFESR = 969, PPC_INS_MFSPEFSCR = 970, PPC_INS_MFTCR = 971, PPC_INS_MFASR = 972, PPC_INS_MFPVR = 973, PPC_INS_MFTBU = 974, PPC_INS_MTCR = 975, PPC_INS_MTBR0 = 976, PPC_INS_MTBR1 = 977, PPC_INS_MTBR2 = 978, PPC_INS_MTBR3 = 979, PPC_INS_MTBR4 = 980, PPC_INS_MTBR5 = 981, PPC_INS_MTBR6 = 982, PPC_INS_MTBR7 = 983, PPC_INS_MTXER = 984, PPC_INS_MTDSCR = 985, PPC_INS_MTDSISR = 986, PPC_INS_MTDAR = 987, PPC_INS_MTSRR2 = 988, PPC_INS_MTSRR3 = 989, PPC_INS_MTCFAR = 990, PPC_INS_MTAMR = 991, PPC_INS_MTPID = 992, PPC_INS_MTTBL = 993, PPC_INS_MTTBU = 994, PPC_INS_MTTBLO = 995, PPC_INS_MTTBHI = 996, PPC_INS_MTDBATU = 997, PPC_INS_MTDBATL = 998, PPC_INS_MTIBATU = 999, PPC_INS_MTIBATL = 1000, PPC_INS_MTDCCR = 1001, PPC_INS_MTICCR = 1002, PPC_INS_MTDEAR = 1003, PPC_INS_MTESR = 1004, PPC_INS_MTSPEFSCR = 1005, PPC_INS_MTTCR = 1006, PPC_INS_NOT = 1007, PPC_INS_MR = 1008, PPC_INS_ROTLD = 1009, PPC_INS_ROTLDI = 1010, PPC_INS_CLRLDI = 1011, PPC_INS_ROTLWI = 1012, PPC_INS_CLRLWI = 1013, PPC_INS_ROTLW = 1014, PPC_INS_SUB = 1015, PPC_INS_SUBC = 1016, PPC_INS_LWSYNC = 1017, PPC_INS_PTESYNC = 1018, PPC_INS_TDLT = 1019, PPC_INS_TDEQ = 1020, PPC_INS_TDGT = 1021, PPC_INS_TDNE = 1022, PPC_INS_TDLLT = 1023, PPC_INS_TDLGT = 1024, PPC_INS_TDU = 1025, PPC_INS_TDLTI = 1026, PPC_INS_TDEQI = 1027, PPC_INS_TDGTI = 1028, PPC_INS_TDNEI = 1029, PPC_INS_TDLLTI = 1030, PPC_INS_TDLGTI = 1031, PPC_INS_TDUI = 1032, PPC_INS_TLBREHI = 1033, PPC_INS_TLBRELO = 1034, PPC_INS_TLBWEHI = 1035, PPC_INS_TLBWELO = 1036, PPC_INS_TWLT = 1037, PPC_INS_TWEQ = 1038, PPC_INS_TWGT = 1039, PPC_INS_TWNE = 1040, PPC_INS_TWLLT = 1041, PPC_INS_TWLGT = 1042, PPC_INS_TWU = 1043, PPC_INS_TWLTI = 1044, PPC_INS_TWEQI = 1045, PPC_INS_TWGTI = 1046, PPC_INS_TWNEI = 1047, PPC_INS_TWLLTI = 1048, PPC_INS_TWLGTI = 1049, PPC_INS_TWUI = 1050, PPC_INS_WAITRSV = 1051, PPC_INS_WAITIMPL = 1052, PPC_INS_XNOP = 1053, PPC_INS_XVMOVDP = 1054, PPC_INS_XVMOVSP = 1055, PPC_INS_XXSPLTD = 1056, PPC_INS_XXMRGHD = 1057, PPC_INS_XXMRGLD = 1058, PPC_INS_XXSWAPD = 1059, PPC_INS_BT = 1060, PPC_INS_BF = 1061, PPC_INS_BDNZT = 1062, PPC_INS_BDNZF = 1063, PPC_INS_BDZF = 1064, PPC_INS_BDZT = 1065, PPC_INS_BFA = 1066, PPC_INS_BDNZTA = 1067, PPC_INS_BDNZFA = 1068, PPC_INS_BDZTA = 1069, PPC_INS_BDZFA = 1070, PPC_INS_BTCTR = 1071, PPC_INS_BFCTR = 1072, PPC_INS_BTCTRL = 1073, PPC_INS_BFCTRL = 1074, PPC_INS_BTL = 1075, PPC_INS_BFL = 1076, PPC_INS_BDNZTL = 1077, PPC_INS_BDNZFL = 1078, PPC_INS_BDZTL = 1079, PPC_INS_BDZFL = 1080, PPC_INS_BTLA = 1081, PPC_INS_BFLA = 1082, PPC_INS_BDNZTLA = 1083, PPC_INS_BDNZFLA = 1084, PPC_INS_BDZTLA = 1085, PPC_INS_BDZFLA = 1086, PPC_INS_BTLR = 1087, PPC_INS_BFLR = 1088, PPC_INS_BDNZTLR = 1089, PPC_INS_BDZTLR = 1090, PPC_INS_BDZFLR = 1091, PPC_INS_BTLRL = 1092, PPC_INS_BFLRL = 1093, PPC_INS_BDNZTLRL = 1094, PPC_INS_BDNZFLRL = 1095, PPC_INS_BDZTLRL = 1096, PPC_INS_BDZFLRL = 1097, PPC_INS_QVFAND = 1098, PPC_INS_QVFCLR = 1099, PPC_INS_QVFANDC = 1100, PPC_INS_QVFCTFB = 1101, PPC_INS_QVFXOR = 1102, PPC_INS_QVFOR = 1103, PPC_INS_QVFNOR = 1104, PPC_INS_QVFEQU = 1105, PPC_INS_QVFNOT = 1106, PPC_INS_QVFORC = 1107, PPC_INS_QVFNAND = 1108, PPC_INS_QVFSET = 1109, PPC_INS_ENDING = 1110, } pub mod ppc_insn_group { #[doc = " Group of PPC instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const PPC_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const PPC_GRP_JUMP: Type = 1; pub const PPC_GRP_ALTIVEC: Type = 128; pub const PPC_GRP_MODE32: Type = 129; pub const PPC_GRP_MODE64: Type = 130; pub const PPC_GRP_BOOKE: Type = 131; pub const PPC_GRP_NOTBOOKE: Type = 132; pub const PPC_GRP_SPE: Type = 133; pub const PPC_GRP_VSX: Type = 134; pub const PPC_GRP_E500: Type = 135; pub const PPC_GRP_PPC4XX: Type = 136; pub const PPC_GRP_PPC6XX: Type = 137; pub const PPC_GRP_ICBT: Type = 138; pub const PPC_GRP_P8ALTIVEC: Type = 139; pub const PPC_GRP_P8VECTOR: Type = 140; pub const PPC_GRP_QPX: Type = 141; pub const PPC_GRP_ENDING: Type = 142; } #[repr(u32)] #[doc = " Enums corresponding to Sparc condition codes, both icc's and fcc's."] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sparc_cc { #[doc = "< invalid CC (default)"] SPARC_CC_INVALID = 0, #[doc = "< Always"] SPARC_CC_ICC_A = 264, #[doc = "< Never"] SPARC_CC_ICC_N = 256, #[doc = "< Not Equal"] SPARC_CC_ICC_NE = 265, #[doc = "< Equal"] SPARC_CC_ICC_E = 257, #[doc = "< Greater"] SPARC_CC_ICC_G = 266, #[doc = "< Less or Equal"] SPARC_CC_ICC_LE = 258, #[doc = "< Greater or Equal"] SPARC_CC_ICC_GE = 267, #[doc = "< Less"] SPARC_CC_ICC_L = 259, #[doc = "< Greater Unsigned"] SPARC_CC_ICC_GU = 268, #[doc = "< Less or Equal Unsigned"] SPARC_CC_ICC_LEU = 260, #[doc = "< Carry Clear/Great or Equal Unsigned"] SPARC_CC_ICC_CC = 269, #[doc = "< Carry Set/Less Unsigned"] SPARC_CC_ICC_CS = 261, #[doc = "< Positive"] SPARC_CC_ICC_POS = 270, #[doc = "< Negative"] SPARC_CC_ICC_NEG = 262, #[doc = "< Overflow Clear"] SPARC_CC_ICC_VC = 271, #[doc = "< Overflow Set"] SPARC_CC_ICC_VS = 263, #[doc = "< Always"] SPARC_CC_FCC_A = 280, #[doc = "< Never"] SPARC_CC_FCC_N = 272, #[doc = "< Unordered"] SPARC_CC_FCC_U = 279, #[doc = "< Greater"] SPARC_CC_FCC_G = 278, #[doc = "< Unordered or Greater"] SPARC_CC_FCC_UG = 277, #[doc = "< Less"] SPARC_CC_FCC_L = 276, #[doc = "< Unordered or Less"] SPARC_CC_FCC_UL = 275, #[doc = "< Less or Greater"] SPARC_CC_FCC_LG = 274, #[doc = "< Not Equal"] SPARC_CC_FCC_NE = 273, #[doc = "< Equal"] SPARC_CC_FCC_E = 281, #[doc = "< Unordered or Equal"] SPARC_CC_FCC_UE = 282, #[doc = "< Greater or Equal"] SPARC_CC_FCC_GE = 283, #[doc = "< Unordered or Greater or Equal"] SPARC_CC_FCC_UGE = 284, #[doc = "< Less or Equal"] SPARC_CC_FCC_LE = 285, #[doc = "< Unordered or Less or Equal"] SPARC_CC_FCC_ULE = 286, #[doc = "< Ordered"] SPARC_CC_FCC_O = 287, } #[repr(u32)] #[doc = " Branch hint"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sparc_hint { #[doc = "< no hint"] SPARC_HINT_INVALID = 0, #[doc = "< annul delay slot instruction"] SPARC_HINT_A = 1, #[doc = "< branch taken"] SPARC_HINT_PT = 2, #[doc = "< branch NOT taken"] SPARC_HINT_PN = 4, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sparc_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] SPARC_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] SPARC_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] SPARC_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] SPARC_OP_MEM = 3, } pub mod sparc_reg { #[doc = " SPARC registers"] pub type Type = u32; pub const SPARC_REG_INVALID: Type = 0; pub const SPARC_REG_F0: Type = 1; pub const SPARC_REG_F1: Type = 2; pub const SPARC_REG_F2: Type = 3; pub const SPARC_REG_F3: Type = 4; pub const SPARC_REG_F4: Type = 5; pub const SPARC_REG_F5: Type = 6; pub const SPARC_REG_F6: Type = 7; pub const SPARC_REG_F7: Type = 8; pub const SPARC_REG_F8: Type = 9; pub const SPARC_REG_F9: Type = 10; pub const SPARC_REG_F10: Type = 11; pub const SPARC_REG_F11: Type = 12; pub const SPARC_REG_F12: Type = 13; pub const SPARC_REG_F13: Type = 14; pub const SPARC_REG_F14: Type = 15; pub const SPARC_REG_F15: Type = 16; pub const SPARC_REG_F16: Type = 17; pub const SPARC_REG_F17: Type = 18; pub const SPARC_REG_F18: Type = 19; pub const SPARC_REG_F19: Type = 20; pub const SPARC_REG_F20: Type = 21; pub const SPARC_REG_F21: Type = 22; pub const SPARC_REG_F22: Type = 23; pub const SPARC_REG_F23: Type = 24; pub const SPARC_REG_F24: Type = 25; pub const SPARC_REG_F25: Type = 26; pub const SPARC_REG_F26: Type = 27; pub const SPARC_REG_F27: Type = 28; pub const SPARC_REG_F28: Type = 29; pub const SPARC_REG_F29: Type = 30; pub const SPARC_REG_F30: Type = 31; pub const SPARC_REG_F31: Type = 32; pub const SPARC_REG_F32: Type = 33; pub const SPARC_REG_F34: Type = 34; pub const SPARC_REG_F36: Type = 35; pub const SPARC_REG_F38: Type = 36; pub const SPARC_REG_F40: Type = 37; pub const SPARC_REG_F42: Type = 38; pub const SPARC_REG_F44: Type = 39; pub const SPARC_REG_F46: Type = 40; pub const SPARC_REG_F48: Type = 41; pub const SPARC_REG_F50: Type = 42; pub const SPARC_REG_F52: Type = 43; pub const SPARC_REG_F54: Type = 44; pub const SPARC_REG_F56: Type = 45; pub const SPARC_REG_F58: Type = 46; pub const SPARC_REG_F60: Type = 47; pub const SPARC_REG_F62: Type = 48; pub const SPARC_REG_FCC0: Type = 49; pub const SPARC_REG_FCC1: Type = 50; pub const SPARC_REG_FCC2: Type = 51; pub const SPARC_REG_FCC3: Type = 52; pub const SPARC_REG_FP: Type = 53; pub const SPARC_REG_G0: Type = 54; pub const SPARC_REG_G1: Type = 55; pub const SPARC_REG_G2: Type = 56; pub const SPARC_REG_G3: Type = 57; pub const SPARC_REG_G4: Type = 58; pub const SPARC_REG_G5: Type = 59; pub const SPARC_REG_G6: Type = 60; pub const SPARC_REG_G7: Type = 61; pub const SPARC_REG_I0: Type = 62; pub const SPARC_REG_I1: Type = 63; pub const SPARC_REG_I2: Type = 64; pub const SPARC_REG_I3: Type = 65; pub const SPARC_REG_I4: Type = 66; pub const SPARC_REG_I5: Type = 67; pub const SPARC_REG_I7: Type = 68; pub const SPARC_REG_ICC: Type = 69; pub const SPARC_REG_L0: Type = 70; pub const SPARC_REG_L1: Type = 71; pub const SPARC_REG_L2: Type = 72; pub const SPARC_REG_L3: Type = 73; pub const SPARC_REG_L4: Type = 74; pub const SPARC_REG_L5: Type = 75; pub const SPARC_REG_L6: Type = 76; pub const SPARC_REG_L7: Type = 77; pub const SPARC_REG_O0: Type = 78; pub const SPARC_REG_O1: Type = 79; pub const SPARC_REG_O2: Type = 80; pub const SPARC_REG_O3: Type = 81; pub const SPARC_REG_O4: Type = 82; pub const SPARC_REG_O5: Type = 83; pub const SPARC_REG_O7: Type = 84; pub const SPARC_REG_SP: Type = 85; pub const SPARC_REG_Y: Type = 86; pub const SPARC_REG_XCC: Type = 87; pub const SPARC_REG_ENDING: Type = 88; pub const SPARC_REG_O6: Type = 85; pub const SPARC_REG_I6: Type = 53; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with SPARC_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct sparc_op_mem { #[doc = "< base register, can be safely interpreted as"] #[doc = "< a value of type `sparc_reg`, but it is only"] #[doc = "< one byte wide"] pub base: u8, #[doc = "< index register, same conditions apply here"] pub index: u8, #[doc = "< displacement/offset value"] pub disp: i32, } impl Clone for sparc_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_sparc_op { #[doc = "< operand type"] pub type_: sparc_op_type, pub __bindgen_anon_1: cs_sparc_op__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union cs_sparc_op__bindgen_ty_1 { #[doc = "< register value for REG operand"] pub reg: sparc_reg::Type, #[doc = "< immediate value for IMM operand"] pub imm: i64, #[doc = "< base/disp value for MEM operand"] pub mem: sparc_op_mem, _bindgen_union_align: u64, } impl Clone for cs_sparc_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_sparc_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_sparc_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_sparc_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_sparc_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_sparc_op {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_sparc { #[doc = "< code condition for this insn"] pub cc: sparc_cc, #[doc = "< branch hint: encoding as bitwise OR of sparc_hint."] pub hint: sparc_hint, #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_sparc_op; 4usize], } impl Clone for cs_sparc { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_sparc { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_sparc {{ cc: {:?}, hint: {:?}, op_count: {:?}, operands: {:?} }}", self.cc, self.hint, self.op_count, self.operands ) } } #[repr(u32)] #[doc = " SPARC instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sparc_insn { SPARC_INS_INVALID = 0, SPARC_INS_ADDCC = 1, SPARC_INS_ADDX = 2, SPARC_INS_ADDXCC = 3, SPARC_INS_ADDXC = 4, SPARC_INS_ADDXCCC = 5, SPARC_INS_ADD = 6, SPARC_INS_ALIGNADDR = 7, SPARC_INS_ALIGNADDRL = 8, SPARC_INS_ANDCC = 9, SPARC_INS_ANDNCC = 10, SPARC_INS_ANDN = 11, SPARC_INS_AND = 12, SPARC_INS_ARRAY16 = 13, SPARC_INS_ARRAY32 = 14, SPARC_INS_ARRAY8 = 15, SPARC_INS_B = 16, SPARC_INS_JMP = 17, SPARC_INS_BMASK = 18, SPARC_INS_FB = 19, SPARC_INS_BRGEZ = 20, SPARC_INS_BRGZ = 21, SPARC_INS_BRLEZ = 22, SPARC_INS_BRLZ = 23, SPARC_INS_BRNZ = 24, SPARC_INS_BRZ = 25, SPARC_INS_BSHUFFLE = 26, SPARC_INS_CALL = 27, SPARC_INS_CASX = 28, SPARC_INS_CAS = 29, SPARC_INS_CMASK16 = 30, SPARC_INS_CMASK32 = 31, SPARC_INS_CMASK8 = 32, SPARC_INS_CMP = 33, SPARC_INS_EDGE16 = 34, SPARC_INS_EDGE16L = 35, SPARC_INS_EDGE16LN = 36, SPARC_INS_EDGE16N = 37, SPARC_INS_EDGE32 = 38, SPARC_INS_EDGE32L = 39, SPARC_INS_EDGE32LN = 40, SPARC_INS_EDGE32N = 41, SPARC_INS_EDGE8 = 42, SPARC_INS_EDGE8L = 43, SPARC_INS_EDGE8LN = 44, SPARC_INS_EDGE8N = 45, SPARC_INS_FABSD = 46, SPARC_INS_FABSQ = 47, SPARC_INS_FABSS = 48, SPARC_INS_FADDD = 49, SPARC_INS_FADDQ = 50, SPARC_INS_FADDS = 51, SPARC_INS_FALIGNDATA = 52, SPARC_INS_FAND = 53, SPARC_INS_FANDNOT1 = 54, SPARC_INS_FANDNOT1S = 55, SPARC_INS_FANDNOT2 = 56, SPARC_INS_FANDNOT2S = 57, SPARC_INS_FANDS = 58, SPARC_INS_FCHKSM16 = 59, SPARC_INS_FCMPD = 60, SPARC_INS_FCMPEQ16 = 61, SPARC_INS_FCMPEQ32 = 62, SPARC_INS_FCMPGT16 = 63, SPARC_INS_FCMPGT32 = 64, SPARC_INS_FCMPLE16 = 65, SPARC_INS_FCMPLE32 = 66, SPARC_INS_FCMPNE16 = 67, SPARC_INS_FCMPNE32 = 68, SPARC_INS_FCMPQ = 69, SPARC_INS_FCMPS = 70, SPARC_INS_FDIVD = 71, SPARC_INS_FDIVQ = 72, SPARC_INS_FDIVS = 73, SPARC_INS_FDMULQ = 74, SPARC_INS_FDTOI = 75, SPARC_INS_FDTOQ = 76, SPARC_INS_FDTOS = 77, SPARC_INS_FDTOX = 78, SPARC_INS_FEXPAND = 79, SPARC_INS_FHADDD = 80, SPARC_INS_FHADDS = 81, SPARC_INS_FHSUBD = 82, SPARC_INS_FHSUBS = 83, SPARC_INS_FITOD = 84, SPARC_INS_FITOQ = 85, SPARC_INS_FITOS = 86, SPARC_INS_FLCMPD = 87, SPARC_INS_FLCMPS = 88, SPARC_INS_FLUSHW = 89, SPARC_INS_FMEAN16 = 90, SPARC_INS_FMOVD = 91, SPARC_INS_FMOVQ = 92, SPARC_INS_FMOVRDGEZ = 93, SPARC_INS_FMOVRQGEZ = 94, SPARC_INS_FMOVRSGEZ = 95, SPARC_INS_FMOVRDGZ = 96, SPARC_INS_FMOVRQGZ = 97, SPARC_INS_FMOVRSGZ = 98, SPARC_INS_FMOVRDLEZ = 99, SPARC_INS_FMOVRQLEZ = 100, SPARC_INS_FMOVRSLEZ = 101, SPARC_INS_FMOVRDLZ = 102, SPARC_INS_FMOVRQLZ = 103, SPARC_INS_FMOVRSLZ = 104, SPARC_INS_FMOVRDNZ = 105, SPARC_INS_FMOVRQNZ = 106, SPARC_INS_FMOVRSNZ = 107, SPARC_INS_FMOVRDZ = 108, SPARC_INS_FMOVRQZ = 109, SPARC_INS_FMOVRSZ = 110, SPARC_INS_FMOVS = 111, SPARC_INS_FMUL8SUX16 = 112, SPARC_INS_FMUL8ULX16 = 113, SPARC_INS_FMUL8X16 = 114, SPARC_INS_FMUL8X16AL = 115, SPARC_INS_FMUL8X16AU = 116, SPARC_INS_FMULD = 117, SPARC_INS_FMULD8SUX16 = 118, SPARC_INS_FMULD8ULX16 = 119, SPARC_INS_FMULQ = 120, SPARC_INS_FMULS = 121, SPARC_INS_FNADDD = 122, SPARC_INS_FNADDS = 123, SPARC_INS_FNAND = 124, SPARC_INS_FNANDS = 125, SPARC_INS_FNEGD = 126, SPARC_INS_FNEGQ = 127, SPARC_INS_FNEGS = 128, SPARC_INS_FNHADDD = 129, SPARC_INS_FNHADDS = 130, SPARC_INS_FNOR = 131, SPARC_INS_FNORS = 132, SPARC_INS_FNOT1 = 133, SPARC_INS_FNOT1S = 134, SPARC_INS_FNOT2 = 135, SPARC_INS_FNOT2S = 136, SPARC_INS_FONE = 137, SPARC_INS_FONES = 138, SPARC_INS_FOR = 139, SPARC_INS_FORNOT1 = 140, SPARC_INS_FORNOT1S = 141, SPARC_INS_FORNOT2 = 142, SPARC_INS_FORNOT2S = 143, SPARC_INS_FORS = 144, SPARC_INS_FPACK16 = 145, SPARC_INS_FPACK32 = 146, SPARC_INS_FPACKFIX = 147, SPARC_INS_FPADD16 = 148, SPARC_INS_FPADD16S = 149, SPARC_INS_FPADD32 = 150, SPARC_INS_FPADD32S = 151, SPARC_INS_FPADD64 = 152, SPARC_INS_FPMERGE = 153, SPARC_INS_FPSUB16 = 154, SPARC_INS_FPSUB16S = 155, SPARC_INS_FPSUB32 = 156, SPARC_INS_FPSUB32S = 157, SPARC_INS_FQTOD = 158, SPARC_INS_FQTOI = 159, SPARC_INS_FQTOS = 160, SPARC_INS_FQTOX = 161, SPARC_INS_FSLAS16 = 162, SPARC_INS_FSLAS32 = 163, SPARC_INS_FSLL16 = 164, SPARC_INS_FSLL32 = 165, SPARC_INS_FSMULD = 166, SPARC_INS_FSQRTD = 167, SPARC_INS_FSQRTQ = 168, SPARC_INS_FSQRTS = 169, SPARC_INS_FSRA16 = 170, SPARC_INS_FSRA32 = 171, SPARC_INS_FSRC1 = 172, SPARC_INS_FSRC1S = 173, SPARC_INS_FSRC2 = 174, SPARC_INS_FSRC2S = 175, SPARC_INS_FSRL16 = 176, SPARC_INS_FSRL32 = 177, SPARC_INS_FSTOD = 178, SPARC_INS_FSTOI = 179, SPARC_INS_FSTOQ = 180, SPARC_INS_FSTOX = 181, SPARC_INS_FSUBD = 182, SPARC_INS_FSUBQ = 183, SPARC_INS_FSUBS = 184, SPARC_INS_FXNOR = 185, SPARC_INS_FXNORS = 186, SPARC_INS_FXOR = 187, SPARC_INS_FXORS = 188, SPARC_INS_FXTOD = 189, SPARC_INS_FXTOQ = 190, SPARC_INS_FXTOS = 191, SPARC_INS_FZERO = 192, SPARC_INS_FZEROS = 193, SPARC_INS_JMPL = 194, SPARC_INS_LDD = 195, SPARC_INS_LD = 196, SPARC_INS_LDQ = 197, SPARC_INS_LDSB = 198, SPARC_INS_LDSH = 199, SPARC_INS_LDSW = 200, SPARC_INS_LDUB = 201, SPARC_INS_LDUH = 202, SPARC_INS_LDX = 203, SPARC_INS_LZCNT = 204, SPARC_INS_MEMBAR = 205, SPARC_INS_MOVDTOX = 206, SPARC_INS_MOV = 207, SPARC_INS_MOVRGEZ = 208, SPARC_INS_MOVRGZ = 209, SPARC_INS_MOVRLEZ = 210, SPARC_INS_MOVRLZ = 211, SPARC_INS_MOVRNZ = 212, SPARC_INS_MOVRZ = 213, SPARC_INS_MOVSTOSW = 214, SPARC_INS_MOVSTOUW = 215, SPARC_INS_MULX = 216, SPARC_INS_NOP = 217, SPARC_INS_ORCC = 218, SPARC_INS_ORNCC = 219, SPARC_INS_ORN = 220, SPARC_INS_OR = 221, SPARC_INS_PDIST = 222, SPARC_INS_PDISTN = 223, SPARC_INS_POPC = 224, SPARC_INS_RD = 225, SPARC_INS_RESTORE = 226, SPARC_INS_RETT = 227, SPARC_INS_SAVE = 228, SPARC_INS_SDIVCC = 229, SPARC_INS_SDIVX = 230, SPARC_INS_SDIV = 231, SPARC_INS_SETHI = 232, SPARC_INS_SHUTDOWN = 233, SPARC_INS_SIAM = 234, SPARC_INS_SLLX = 235, SPARC_INS_SLL = 236, SPARC_INS_SMULCC = 237, SPARC_INS_SMUL = 238, SPARC_INS_SRAX = 239, SPARC_INS_SRA = 240, SPARC_INS_SRLX = 241, SPARC_INS_SRL = 242, SPARC_INS_STBAR = 243, SPARC_INS_STB = 244, SPARC_INS_STD = 245, SPARC_INS_ST = 246, SPARC_INS_STH = 247, SPARC_INS_STQ = 248, SPARC_INS_STX = 249, SPARC_INS_SUBCC = 250, SPARC_INS_SUBX = 251, SPARC_INS_SUBXCC = 252, SPARC_INS_SUB = 253, SPARC_INS_SWAP = 254, SPARC_INS_TADDCCTV = 255, SPARC_INS_TADDCC = 256, SPARC_INS_T = 257, SPARC_INS_TSUBCCTV = 258, SPARC_INS_TSUBCC = 259, SPARC_INS_UDIVCC = 260, SPARC_INS_UDIVX = 261, SPARC_INS_UDIV = 262, SPARC_INS_UMULCC = 263, SPARC_INS_UMULXHI = 264, SPARC_INS_UMUL = 265, SPARC_INS_UNIMP = 266, SPARC_INS_FCMPED = 267, SPARC_INS_FCMPEQ = 268, SPARC_INS_FCMPES = 269, SPARC_INS_WR = 270, SPARC_INS_XMULX = 271, SPARC_INS_XMULXHI = 272, SPARC_INS_XNORCC = 273, SPARC_INS_XNOR = 274, SPARC_INS_XORCC = 275, SPARC_INS_XOR = 276, SPARC_INS_RET = 277, SPARC_INS_RETL = 278, SPARC_INS_ENDING = 279, } pub mod sparc_insn_group { #[doc = " Group of SPARC instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const SPARC_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const SPARC_GRP_JUMP: Type = 1; pub const SPARC_GRP_HARDQUAD: Type = 128; pub const SPARC_GRP_V9: Type = 129; pub const SPARC_GRP_VIS: Type = 130; pub const SPARC_GRP_VIS2: Type = 131; pub const SPARC_GRP_VIS3: Type = 132; pub const SPARC_GRP_32BIT: Type = 133; pub const SPARC_GRP_64BIT: Type = 134; pub const SPARC_GRP_ENDING: Type = 135; } #[repr(u32)] #[doc = " Enums corresponding to SystemZ condition codes"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sysz_cc { #[doc = "< invalid CC (default)"] SYSZ_CC_INVALID = 0, SYSZ_CC_O = 1, SYSZ_CC_H = 2, SYSZ_CC_NLE = 3, SYSZ_CC_L = 4, SYSZ_CC_NHE = 5, SYSZ_CC_LH = 6, SYSZ_CC_NE = 7, SYSZ_CC_E = 8, SYSZ_CC_NLH = 9, SYSZ_CC_HE = 10, SYSZ_CC_NL = 11, SYSZ_CC_LE = 12, SYSZ_CC_NH = 13, SYSZ_CC_NO = 14, } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sysz_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] SYSZ_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] SYSZ_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] SYSZ_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] SYSZ_OP_MEM = 3, #[doc = "< Access register operand."] SYSZ_OP_ACREG = 64, } pub mod sysz_reg { #[doc = " SystemZ registers"] pub type Type = u32; pub const SYSZ_REG_INVALID: Type = 0; pub const SYSZ_REG_0: Type = 1; pub const SYSZ_REG_1: Type = 2; pub const SYSZ_REG_2: Type = 3; pub const SYSZ_REG_3: Type = 4; pub const SYSZ_REG_4: Type = 5; pub const SYSZ_REG_5: Type = 6; pub const SYSZ_REG_6: Type = 7; pub const SYSZ_REG_7: Type = 8; pub const SYSZ_REG_8: Type = 9; pub const SYSZ_REG_9: Type = 10; pub const SYSZ_REG_10: Type = 11; pub const SYSZ_REG_11: Type = 12; pub const SYSZ_REG_12: Type = 13; pub const SYSZ_REG_13: Type = 14; pub const SYSZ_REG_14: Type = 15; pub const SYSZ_REG_15: Type = 16; pub const SYSZ_REG_CC: Type = 17; pub const SYSZ_REG_F0: Type = 18; pub const SYSZ_REG_F1: Type = 19; pub const SYSZ_REG_F2: Type = 20; pub const SYSZ_REG_F3: Type = 21; pub const SYSZ_REG_F4: Type = 22; pub const SYSZ_REG_F5: Type = 23; pub const SYSZ_REG_F6: Type = 24; pub const SYSZ_REG_F7: Type = 25; pub const SYSZ_REG_F8: Type = 26; pub const SYSZ_REG_F9: Type = 27; pub const SYSZ_REG_F10: Type = 28; pub const SYSZ_REG_F11: Type = 29; pub const SYSZ_REG_F12: Type = 30; pub const SYSZ_REG_F13: Type = 31; pub const SYSZ_REG_F14: Type = 32; pub const SYSZ_REG_F15: Type = 33; pub const SYSZ_REG_R0L: Type = 34; pub const SYSZ_REG_ENDING: Type = 35; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with SYSZ_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct sysz_op_mem { #[doc = "< base register, can be safely interpreted as"] #[doc = "< a value of type `sysz_reg`, but it is only"] #[doc = "< one byte wide"] pub base: u8, #[doc = "< index register, same conditions apply here"] pub index: u8, #[doc = "< BDLAddr operand"] pub length: u64, #[doc = "< displacement/offset value"] pub disp: i64, } impl Clone for sysz_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_sysz_op { #[doc = "< operand type"] pub type_: sysz_op_type, pub __bindgen_anon_1: cs_sysz_op__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union cs_sysz_op__bindgen_ty_1 { #[doc = "< register value for REG operand"] pub reg: sysz_reg::Type, #[doc = "< immediate value for IMM operand"] pub imm: i64, #[doc = "< base/disp value for MEM operand"] pub mem: sysz_op_mem, _bindgen_union_align: [u64; 3usize], } impl Clone for cs_sysz_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_sysz_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_sysz_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_sysz_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_sysz_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_sysz_op {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[repr(C)] #[derive(Copy)] pub struct cs_sysz { #[doc = "< Code condition"] pub cc: sysz_cc, #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_sysz_op; 6usize], } impl Clone for cs_sysz { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_sysz { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_sysz {{ cc: {:?}, op_count: {:?}, operands: {:?} }}", self.cc, self.op_count, self.operands ) } } #[repr(u32)] #[doc = " SystemZ instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum sysz_insn { SYSZ_INS_INVALID = 0, SYSZ_INS_A = 1, SYSZ_INS_ADB = 2, SYSZ_INS_ADBR = 3, SYSZ_INS_AEB = 4, SYSZ_INS_AEBR = 5, SYSZ_INS_AFI = 6, SYSZ_INS_AG = 7, SYSZ_INS_AGF = 8, SYSZ_INS_AGFI = 9, SYSZ_INS_AGFR = 10, SYSZ_INS_AGHI = 11, SYSZ_INS_AGHIK = 12, SYSZ_INS_AGR = 13, SYSZ_INS_AGRK = 14, SYSZ_INS_AGSI = 15, SYSZ_INS_AH = 16, SYSZ_INS_AHI = 17, SYSZ_INS_AHIK = 18, SYSZ_INS_AHY = 19, SYSZ_INS_AIH = 20, SYSZ_INS_AL = 21, SYSZ_INS_ALC = 22, SYSZ_INS_ALCG = 23, SYSZ_INS_ALCGR = 24, SYSZ_INS_ALCR = 25, SYSZ_INS_ALFI = 26, SYSZ_INS_ALG = 27, SYSZ_INS_ALGF = 28, SYSZ_INS_ALGFI = 29, SYSZ_INS_ALGFR = 30, SYSZ_INS_ALGHSIK = 31, SYSZ_INS_ALGR = 32, SYSZ_INS_ALGRK = 33, SYSZ_INS_ALHSIK = 34, SYSZ_INS_ALR = 35, SYSZ_INS_ALRK = 36, SYSZ_INS_ALY = 37, SYSZ_INS_AR = 38, SYSZ_INS_ARK = 39, SYSZ_INS_ASI = 40, SYSZ_INS_AXBR = 41, SYSZ_INS_AY = 42, SYSZ_INS_BCR = 43, SYSZ_INS_BRC = 44, SYSZ_INS_BRCL = 45, SYSZ_INS_CGIJ = 46, SYSZ_INS_CGRJ = 47, SYSZ_INS_CIJ = 48, SYSZ_INS_CLGIJ = 49, SYSZ_INS_CLGRJ = 50, SYSZ_INS_CLIJ = 51, SYSZ_INS_CLRJ = 52, SYSZ_INS_CRJ = 53, SYSZ_INS_BER = 54, SYSZ_INS_JE = 55, SYSZ_INS_JGE = 56, SYSZ_INS_LOCE = 57, SYSZ_INS_LOCGE = 58, SYSZ_INS_LOCGRE = 59, SYSZ_INS_LOCRE = 60, SYSZ_INS_STOCE = 61, SYSZ_INS_STOCGE = 62, SYSZ_INS_BHR = 63, SYSZ_INS_BHER = 64, SYSZ_INS_JHE = 65, SYSZ_INS_JGHE = 66, SYSZ_INS_LOCHE = 67, SYSZ_INS_LOCGHE = 68, SYSZ_INS_LOCGRHE = 69, SYSZ_INS_LOCRHE = 70, SYSZ_INS_STOCHE = 71, SYSZ_INS_STOCGHE = 72, SYSZ_INS_JH = 73, SYSZ_INS_JGH = 74, SYSZ_INS_LOCH = 75, SYSZ_INS_LOCGH = 76, SYSZ_INS_LOCGRH = 77, SYSZ_INS_LOCRH = 78, SYSZ_INS_STOCH = 79, SYSZ_INS_STOCGH = 80, SYSZ_INS_CGIJNLH = 81, SYSZ_INS_CGRJNLH = 82, SYSZ_INS_CIJNLH = 83, SYSZ_INS_CLGIJNLH = 84, SYSZ_INS_CLGRJNLH = 85, SYSZ_INS_CLIJNLH = 86, SYSZ_INS_CLRJNLH = 87, SYSZ_INS_CRJNLH = 88, SYSZ_INS_CGIJE = 89, SYSZ_INS_CGRJE = 90, SYSZ_INS_CIJE = 91, SYSZ_INS_CLGIJE = 92, SYSZ_INS_CLGRJE = 93, SYSZ_INS_CLIJE = 94, SYSZ_INS_CLRJE = 95, SYSZ_INS_CRJE = 96, SYSZ_INS_CGIJNLE = 97, SYSZ_INS_CGRJNLE = 98, SYSZ_INS_CIJNLE = 99, SYSZ_INS_CLGIJNLE = 100, SYSZ_INS_CLGRJNLE = 101, SYSZ_INS_CLIJNLE = 102, SYSZ_INS_CLRJNLE = 103, SYSZ_INS_CRJNLE = 104, SYSZ_INS_CGIJH = 105, SYSZ_INS_CGRJH = 106, SYSZ_INS_CIJH = 107, SYSZ_INS_CLGIJH = 108, SYSZ_INS_CLGRJH = 109, SYSZ_INS_CLIJH = 110, SYSZ_INS_CLRJH = 111, SYSZ_INS_CRJH = 112, SYSZ_INS_CGIJNL = 113, SYSZ_INS_CGRJNL = 114, SYSZ_INS_CIJNL = 115, SYSZ_INS_CLGIJNL = 116, SYSZ_INS_CLGRJNL = 117, SYSZ_INS_CLIJNL = 118, SYSZ_INS_CLRJNL = 119, SYSZ_INS_CRJNL = 120, SYSZ_INS_CGIJHE = 121, SYSZ_INS_CGRJHE = 122, SYSZ_INS_CIJHE = 123, SYSZ_INS_CLGIJHE = 124, SYSZ_INS_CLGRJHE = 125, SYSZ_INS_CLIJHE = 126, SYSZ_INS_CLRJHE = 127, SYSZ_INS_CRJHE = 128, SYSZ_INS_CGIJNHE = 129, SYSZ_INS_CGRJNHE = 130, SYSZ_INS_CIJNHE = 131, SYSZ_INS_CLGIJNHE = 132, SYSZ_INS_CLGRJNHE = 133, SYSZ_INS_CLIJNHE = 134, SYSZ_INS_CLRJNHE = 135, SYSZ_INS_CRJNHE = 136, SYSZ_INS_CGIJL = 137, SYSZ_INS_CGRJL = 138, SYSZ_INS_CIJL = 139, SYSZ_INS_CLGIJL = 140, SYSZ_INS_CLGRJL = 141, SYSZ_INS_CLIJL = 142, SYSZ_INS_CLRJL = 143, SYSZ_INS_CRJL = 144, SYSZ_INS_CGIJNH = 145, SYSZ_INS_CGRJNH = 146, SYSZ_INS_CIJNH = 147, SYSZ_INS_CLGIJNH = 148, SYSZ_INS_CLGRJNH = 149, SYSZ_INS_CLIJNH = 150, SYSZ_INS_CLRJNH = 151, SYSZ_INS_CRJNH = 152, SYSZ_INS_CGIJLE = 153, SYSZ_INS_CGRJLE = 154, SYSZ_INS_CIJLE = 155, SYSZ_INS_CLGIJLE = 156, SYSZ_INS_CLGRJLE = 157, SYSZ_INS_CLIJLE = 158, SYSZ_INS_CLRJLE = 159, SYSZ_INS_CRJLE = 160, SYSZ_INS_CGIJNE = 161, SYSZ_INS_CGRJNE = 162, SYSZ_INS_CIJNE = 163, SYSZ_INS_CLGIJNE = 164, SYSZ_INS_CLGRJNE = 165, SYSZ_INS_CLIJNE = 166, SYSZ_INS_CLRJNE = 167, SYSZ_INS_CRJNE = 168, SYSZ_INS_CGIJLH = 169, SYSZ_INS_CGRJLH = 170, SYSZ_INS_CIJLH = 171, SYSZ_INS_CLGIJLH = 172, SYSZ_INS_CLGRJLH = 173, SYSZ_INS_CLIJLH = 174, SYSZ_INS_CLRJLH = 175, SYSZ_INS_CRJLH = 176, SYSZ_INS_BLR = 177, SYSZ_INS_BLER = 178, SYSZ_INS_JLE = 179, SYSZ_INS_JGLE = 180, SYSZ_INS_LOCLE = 181, SYSZ_INS_LOCGLE = 182, SYSZ_INS_LOCGRLE = 183, SYSZ_INS_LOCRLE = 184, SYSZ_INS_STOCLE = 185, SYSZ_INS_STOCGLE = 186, SYSZ_INS_BLHR = 187, SYSZ_INS_JLH = 188, SYSZ_INS_JGLH = 189, SYSZ_INS_LOCLH = 190, SYSZ_INS_LOCGLH = 191, SYSZ_INS_LOCGRLH = 192, SYSZ_INS_LOCRLH = 193, SYSZ_INS_STOCLH = 194, SYSZ_INS_STOCGLH = 195, SYSZ_INS_JL = 196, SYSZ_INS_JGL = 197, SYSZ_INS_LOCL = 198, SYSZ_INS_LOCGL = 199, SYSZ_INS_LOCGRL = 200, SYSZ_INS_LOCRL = 201, SYSZ_INS_LOC = 202, SYSZ_INS_LOCG = 203, SYSZ_INS_LOCGR = 204, SYSZ_INS_LOCR = 205, SYSZ_INS_STOCL = 206, SYSZ_INS_STOCGL = 207, SYSZ_INS_BNER = 208, SYSZ_INS_JNE = 209, SYSZ_INS_JGNE = 210, SYSZ_INS_LOCNE = 211, SYSZ_INS_LOCGNE = 212, SYSZ_INS_LOCGRNE = 213, SYSZ_INS_LOCRNE = 214, SYSZ_INS_STOCNE = 215, SYSZ_INS_STOCGNE = 216, SYSZ_INS_BNHR = 217, SYSZ_INS_BNHER = 218, SYSZ_INS_JNHE = 219, SYSZ_INS_JGNHE = 220, SYSZ_INS_LOCNHE = 221, SYSZ_INS_LOCGNHE = 222, SYSZ_INS_LOCGRNHE = 223, SYSZ_INS_LOCRNHE = 224, SYSZ_INS_STOCNHE = 225, SYSZ_INS_STOCGNHE = 226, SYSZ_INS_JNH = 227, SYSZ_INS_JGNH = 228, SYSZ_INS_LOCNH = 229, SYSZ_INS_LOCGNH = 230, SYSZ_INS_LOCGRNH = 231, SYSZ_INS_LOCRNH = 232, SYSZ_INS_STOCNH = 233, SYSZ_INS_STOCGNH = 234, SYSZ_INS_BNLR = 235, SYSZ_INS_BNLER = 236, SYSZ_INS_JNLE = 237, SYSZ_INS_JGNLE = 238, SYSZ_INS_LOCNLE = 239, SYSZ_INS_LOCGNLE = 240, SYSZ_INS_LOCGRNLE = 241, SYSZ_INS_LOCRNLE = 242, SYSZ_INS_STOCNLE = 243, SYSZ_INS_STOCGNLE = 244, SYSZ_INS_BNLHR = 245, SYSZ_INS_JNLH = 246, SYSZ_INS_JGNLH = 247, SYSZ_INS_LOCNLH = 248, SYSZ_INS_LOCGNLH = 249, SYSZ_INS_LOCGRNLH = 250, SYSZ_INS_LOCRNLH = 251, SYSZ_INS_STOCNLH = 252, SYSZ_INS_STOCGNLH = 253, SYSZ_INS_JNL = 254, SYSZ_INS_JGNL = 255, SYSZ_INS_LOCNL = 256, SYSZ_INS_LOCGNL = 257, SYSZ_INS_LOCGRNL = 258, SYSZ_INS_LOCRNL = 259, SYSZ_INS_STOCNL = 260, SYSZ_INS_STOCGNL = 261, SYSZ_INS_BNOR = 262, SYSZ_INS_JNO = 263, SYSZ_INS_JGNO = 264, SYSZ_INS_LOCNO = 265, SYSZ_INS_LOCGNO = 266, SYSZ_INS_LOCGRNO = 267, SYSZ_INS_LOCRNO = 268, SYSZ_INS_STOCNO = 269, SYSZ_INS_STOCGNO = 270, SYSZ_INS_BOR = 271, SYSZ_INS_JO = 272, SYSZ_INS_JGO = 273, SYSZ_INS_LOCO = 274, SYSZ_INS_LOCGO = 275, SYSZ_INS_LOCGRO = 276, SYSZ_INS_LOCRO = 277, SYSZ_INS_STOCO = 278, SYSZ_INS_STOCGO = 279, SYSZ_INS_STOC = 280, SYSZ_INS_STOCG = 281, SYSZ_INS_BASR = 282, SYSZ_INS_BR = 283, SYSZ_INS_BRAS = 284, SYSZ_INS_BRASL = 285, SYSZ_INS_J = 286, SYSZ_INS_JG = 287, SYSZ_INS_BRCT = 288, SYSZ_INS_BRCTG = 289, SYSZ_INS_C = 290, SYSZ_INS_CDB = 291, SYSZ_INS_CDBR = 292, SYSZ_INS_CDFBR = 293, SYSZ_INS_CDGBR = 294, SYSZ_INS_CDLFBR = 295, SYSZ_INS_CDLGBR = 296, SYSZ_INS_CEB = 297, SYSZ_INS_CEBR = 298, SYSZ_INS_CEFBR = 299, SYSZ_INS_CEGBR = 300, SYSZ_INS_CELFBR = 301, SYSZ_INS_CELGBR = 302, SYSZ_INS_CFDBR = 303, SYSZ_INS_CFEBR = 304, SYSZ_INS_CFI = 305, SYSZ_INS_CFXBR = 306, SYSZ_INS_CG = 307, SYSZ_INS_CGDBR = 308, SYSZ_INS_CGEBR = 309, SYSZ_INS_CGF = 310, SYSZ_INS_CGFI = 311, SYSZ_INS_CGFR = 312, SYSZ_INS_CGFRL = 313, SYSZ_INS_CGH = 314, SYSZ_INS_CGHI = 315, SYSZ_INS_CGHRL = 316, SYSZ_INS_CGHSI = 317, SYSZ_INS_CGR = 318, SYSZ_INS_CGRL = 319, SYSZ_INS_CGXBR = 320, SYSZ_INS_CH = 321, SYSZ_INS_CHF = 322, SYSZ_INS_CHHSI = 323, SYSZ_INS_CHI = 324, SYSZ_INS_CHRL = 325, SYSZ_INS_CHSI = 326, SYSZ_INS_CHY = 327, SYSZ_INS_CIH = 328, SYSZ_INS_CL = 329, SYSZ_INS_CLC = 330, SYSZ_INS_CLFDBR = 331, SYSZ_INS_CLFEBR = 332, SYSZ_INS_CLFHSI = 333, SYSZ_INS_CLFI = 334, SYSZ_INS_CLFXBR = 335, SYSZ_INS_CLG = 336, SYSZ_INS_CLGDBR = 337, SYSZ_INS_CLGEBR = 338, SYSZ_INS_CLGF = 339, SYSZ_INS_CLGFI = 340, SYSZ_INS_CLGFR = 341, SYSZ_INS_CLGFRL = 342, SYSZ_INS_CLGHRL = 343, SYSZ_INS_CLGHSI = 344, SYSZ_INS_CLGR = 345, SYSZ_INS_CLGRL = 346, SYSZ_INS_CLGXBR = 347, SYSZ_INS_CLHF = 348, SYSZ_INS_CLHHSI = 349, SYSZ_INS_CLHRL = 350, SYSZ_INS_CLI = 351, SYSZ_INS_CLIH = 352, SYSZ_INS_CLIY = 353, SYSZ_INS_CLR = 354, SYSZ_INS_CLRL = 355, SYSZ_INS_CLST = 356, SYSZ_INS_CLY = 357, SYSZ_INS_CPSDR = 358, SYSZ_INS_CR = 359, SYSZ_INS_CRL = 360, SYSZ_INS_CS = 361, SYSZ_INS_CSG = 362, SYSZ_INS_CSY = 363, SYSZ_INS_CXBR = 364, SYSZ_INS_CXFBR = 365, SYSZ_INS_CXGBR = 366, SYSZ_INS_CXLFBR = 367, SYSZ_INS_CXLGBR = 368, SYSZ_INS_CY = 369, SYSZ_INS_DDB = 370, SYSZ_INS_DDBR = 371, SYSZ_INS_DEB = 372, SYSZ_INS_DEBR = 373, SYSZ_INS_DL = 374, SYSZ_INS_DLG = 375, SYSZ_INS_DLGR = 376, SYSZ_INS_DLR = 377, SYSZ_INS_DSG = 378, SYSZ_INS_DSGF = 379, SYSZ_INS_DSGFR = 380, SYSZ_INS_DSGR = 381, SYSZ_INS_DXBR = 382, SYSZ_INS_EAR = 383, SYSZ_INS_FIDBR = 384, SYSZ_INS_FIDBRA = 385, SYSZ_INS_FIEBR = 386, SYSZ_INS_FIEBRA = 387, SYSZ_INS_FIXBR = 388, SYSZ_INS_FIXBRA = 389, SYSZ_INS_FLOGR = 390, SYSZ_INS_IC = 391, SYSZ_INS_ICY = 392, SYSZ_INS_IIHF = 393, SYSZ_INS_IIHH = 394, SYSZ_INS_IIHL = 395, SYSZ_INS_IILF = 396, SYSZ_INS_IILH = 397, SYSZ_INS_IILL = 398, SYSZ_INS_IPM = 399, SYSZ_INS_L = 400, SYSZ_INS_LA = 401, SYSZ_INS_LAA = 402, SYSZ_INS_LAAG = 403, SYSZ_INS_LAAL = 404, SYSZ_INS_LAALG = 405, SYSZ_INS_LAN = 406, SYSZ_INS_LANG = 407, SYSZ_INS_LAO = 408, SYSZ_INS_LAOG = 409, SYSZ_INS_LARL = 410, SYSZ_INS_LAX = 411, SYSZ_INS_LAXG = 412, SYSZ_INS_LAY = 413, SYSZ_INS_LB = 414, SYSZ_INS_LBH = 415, SYSZ_INS_LBR = 416, SYSZ_INS_LCDBR = 417, SYSZ_INS_LCEBR = 418, SYSZ_INS_LCGFR = 419, SYSZ_INS_LCGR = 420, SYSZ_INS_LCR = 421, SYSZ_INS_LCXBR = 422, SYSZ_INS_LD = 423, SYSZ_INS_LDEB = 424, SYSZ_INS_LDEBR = 425, SYSZ_INS_LDGR = 426, SYSZ_INS_LDR = 427, SYSZ_INS_LDXBR = 428, SYSZ_INS_LDXBRA = 429, SYSZ_INS_LDY = 430, SYSZ_INS_LE = 431, SYSZ_INS_LEDBR = 432, SYSZ_INS_LEDBRA = 433, SYSZ_INS_LER = 434, SYSZ_INS_LEXBR = 435, SYSZ_INS_LEXBRA = 436, SYSZ_INS_LEY = 437, SYSZ_INS_LFH = 438, SYSZ_INS_LG = 439, SYSZ_INS_LGB = 440, SYSZ_INS_LGBR = 441, SYSZ_INS_LGDR = 442, SYSZ_INS_LGF = 443, SYSZ_INS_LGFI = 444, SYSZ_INS_LGFR = 445, SYSZ_INS_LGFRL = 446, SYSZ_INS_LGH = 447, SYSZ_INS_LGHI = 448, SYSZ_INS_LGHR = 449, SYSZ_INS_LGHRL = 450, SYSZ_INS_LGR = 451, SYSZ_INS_LGRL = 452, SYSZ_INS_LH = 453, SYSZ_INS_LHH = 454, SYSZ_INS_LHI = 455, SYSZ_INS_LHR = 456, SYSZ_INS_LHRL = 457, SYSZ_INS_LHY = 458, SYSZ_INS_LLC = 459, SYSZ_INS_LLCH = 460, SYSZ_INS_LLCR = 461, SYSZ_INS_LLGC = 462, SYSZ_INS_LLGCR = 463, SYSZ_INS_LLGF = 464, SYSZ_INS_LLGFR = 465, SYSZ_INS_LLGFRL = 466, SYSZ_INS_LLGH = 467, SYSZ_INS_LLGHR = 468, SYSZ_INS_LLGHRL = 469, SYSZ_INS_LLH = 470, SYSZ_INS_LLHH = 471, SYSZ_INS_LLHR = 472, SYSZ_INS_LLHRL = 473, SYSZ_INS_LLIHF = 474, SYSZ_INS_LLIHH = 475, SYSZ_INS_LLIHL = 476, SYSZ_INS_LLILF = 477, SYSZ_INS_LLILH = 478, SYSZ_INS_LLILL = 479, SYSZ_INS_LMG = 480, SYSZ_INS_LNDBR = 481, SYSZ_INS_LNEBR = 482, SYSZ_INS_LNGFR = 483, SYSZ_INS_LNGR = 484, SYSZ_INS_LNR = 485, SYSZ_INS_LNXBR = 486, SYSZ_INS_LPDBR = 487, SYSZ_INS_LPEBR = 488, SYSZ_INS_LPGFR = 489, SYSZ_INS_LPGR = 490, SYSZ_INS_LPR = 491, SYSZ_INS_LPXBR = 492, SYSZ_INS_LR = 493, SYSZ_INS_LRL = 494, SYSZ_INS_LRV = 495, SYSZ_INS_LRVG = 496, SYSZ_INS_LRVGR = 497, SYSZ_INS_LRVR = 498, SYSZ_INS_LT = 499, SYSZ_INS_LTDBR = 500, SYSZ_INS_LTEBR = 501, SYSZ_INS_LTG = 502, SYSZ_INS_LTGF = 503, SYSZ_INS_LTGFR = 504, SYSZ_INS_LTGR = 505, SYSZ_INS_LTR = 506, SYSZ_INS_LTXBR = 507, SYSZ_INS_LXDB = 508, SYSZ_INS_LXDBR = 509, SYSZ_INS_LXEB = 510, SYSZ_INS_LXEBR = 511, SYSZ_INS_LXR = 512, SYSZ_INS_LY = 513, SYSZ_INS_LZDR = 514, SYSZ_INS_LZER = 515, SYSZ_INS_LZXR = 516, SYSZ_INS_MADB = 517, SYSZ_INS_MADBR = 518, SYSZ_INS_MAEB = 519, SYSZ_INS_MAEBR = 520, SYSZ_INS_MDB = 521, SYSZ_INS_MDBR = 522, SYSZ_INS_MDEB = 523, SYSZ_INS_MDEBR = 524, SYSZ_INS_MEEB = 525, SYSZ_INS_MEEBR = 526, SYSZ_INS_MGHI = 527, SYSZ_INS_MH = 528, SYSZ_INS_MHI = 529, SYSZ_INS_MHY = 530, SYSZ_INS_MLG = 531, SYSZ_INS_MLGR = 532, SYSZ_INS_MS = 533, SYSZ_INS_MSDB = 534, SYSZ_INS_MSDBR = 535, SYSZ_INS_MSEB = 536, SYSZ_INS_MSEBR = 537, SYSZ_INS_MSFI = 538, SYSZ_INS_MSG = 539, SYSZ_INS_MSGF = 540, SYSZ_INS_MSGFI = 541, SYSZ_INS_MSGFR = 542, SYSZ_INS_MSGR = 543, SYSZ_INS_MSR = 544, SYSZ_INS_MSY = 545, SYSZ_INS_MVC = 546, SYSZ_INS_MVGHI = 547, SYSZ_INS_MVHHI = 548, SYSZ_INS_MVHI = 549, SYSZ_INS_MVI = 550, SYSZ_INS_MVIY = 551, SYSZ_INS_MVST = 552, SYSZ_INS_MXBR = 553, SYSZ_INS_MXDB = 554, SYSZ_INS_MXDBR = 555, SYSZ_INS_N = 556, SYSZ_INS_NC = 557, SYSZ_INS_NG = 558, SYSZ_INS_NGR = 559, SYSZ_INS_NGRK = 560, SYSZ_INS_NI = 561, SYSZ_INS_NIHF = 562, SYSZ_INS_NIHH = 563, SYSZ_INS_NIHL = 564, SYSZ_INS_NILF = 565, SYSZ_INS_NILH = 566, SYSZ_INS_NILL = 567, SYSZ_INS_NIY = 568, SYSZ_INS_NR = 569, SYSZ_INS_NRK = 570, SYSZ_INS_NY = 571, SYSZ_INS_O = 572, SYSZ_INS_OC = 573, SYSZ_INS_OG = 574, SYSZ_INS_OGR = 575, SYSZ_INS_OGRK = 576, SYSZ_INS_OI = 577, SYSZ_INS_OIHF = 578, SYSZ_INS_OIHH = 579, SYSZ_INS_OIHL = 580, SYSZ_INS_OILF = 581, SYSZ_INS_OILH = 582, SYSZ_INS_OILL = 583, SYSZ_INS_OIY = 584, SYSZ_INS_OR = 585, SYSZ_INS_ORK = 586, SYSZ_INS_OY = 587, SYSZ_INS_PFD = 588, SYSZ_INS_PFDRL = 589, SYSZ_INS_RISBG = 590, SYSZ_INS_RISBHG = 591, SYSZ_INS_RISBLG = 592, SYSZ_INS_RLL = 593, SYSZ_INS_RLLG = 594, SYSZ_INS_RNSBG = 595, SYSZ_INS_ROSBG = 596, SYSZ_INS_RXSBG = 597, SYSZ_INS_S = 598, SYSZ_INS_SDB = 599, SYSZ_INS_SDBR = 600, SYSZ_INS_SEB = 601, SYSZ_INS_SEBR = 602, SYSZ_INS_SG = 603, SYSZ_INS_SGF = 604, SYSZ_INS_SGFR = 605, SYSZ_INS_SGR = 606, SYSZ_INS_SGRK = 607, SYSZ_INS_SH = 608, SYSZ_INS_SHY = 609, SYSZ_INS_SL = 610, SYSZ_INS_SLB = 611, SYSZ_INS_SLBG = 612, SYSZ_INS_SLBR = 613, SYSZ_INS_SLFI = 614, SYSZ_INS_SLG = 615, SYSZ_INS_SLBGR = 616, SYSZ_INS_SLGF = 617, SYSZ_INS_SLGFI = 618, SYSZ_INS_SLGFR = 619, SYSZ_INS_SLGR = 620, SYSZ_INS_SLGRK = 621, SYSZ_INS_SLL = 622, SYSZ_INS_SLLG = 623, SYSZ_INS_SLLK = 624, SYSZ_INS_SLR = 625, SYSZ_INS_SLRK = 626, SYSZ_INS_SLY = 627, SYSZ_INS_SQDB = 628, SYSZ_INS_SQDBR = 629, SYSZ_INS_SQEB = 630, SYSZ_INS_SQEBR = 631, SYSZ_INS_SQXBR = 632, SYSZ_INS_SR = 633, SYSZ_INS_SRA = 634, SYSZ_INS_SRAG = 635, SYSZ_INS_SRAK = 636, SYSZ_INS_SRK = 637, SYSZ_INS_SRL = 638, SYSZ_INS_SRLG = 639, SYSZ_INS_SRLK = 640, SYSZ_INS_SRST = 641, SYSZ_INS_ST = 642, SYSZ_INS_STC = 643, SYSZ_INS_STCH = 644, SYSZ_INS_STCY = 645, SYSZ_INS_STD = 646, SYSZ_INS_STDY = 647, SYSZ_INS_STE = 648, SYSZ_INS_STEY = 649, SYSZ_INS_STFH = 650, SYSZ_INS_STG = 651, SYSZ_INS_STGRL = 652, SYSZ_INS_STH = 653, SYSZ_INS_STHH = 654, SYSZ_INS_STHRL = 655, SYSZ_INS_STHY = 656, SYSZ_INS_STMG = 657, SYSZ_INS_STRL = 658, SYSZ_INS_STRV = 659, SYSZ_INS_STRVG = 660, SYSZ_INS_STY = 661, SYSZ_INS_SXBR = 662, SYSZ_INS_SY = 663, SYSZ_INS_TM = 664, SYSZ_INS_TMHH = 665, SYSZ_INS_TMHL = 666, SYSZ_INS_TMLH = 667, SYSZ_INS_TMLL = 668, SYSZ_INS_TMY = 669, SYSZ_INS_X = 670, SYSZ_INS_XC = 671, SYSZ_INS_XG = 672, SYSZ_INS_XGR = 673, SYSZ_INS_XGRK = 674, SYSZ_INS_XI = 675, SYSZ_INS_XIHF = 676, SYSZ_INS_XILF = 677, SYSZ_INS_XIY = 678, SYSZ_INS_XR = 679, SYSZ_INS_XRK = 680, SYSZ_INS_XY = 681, SYSZ_INS_ENDING = 682, } pub mod sysz_insn_group { #[doc = " Group of SystemZ instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const SYSZ_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const SYSZ_GRP_JUMP: Type = 1; pub const SYSZ_GRP_DISTINCTOPS: Type = 128; pub const SYSZ_GRP_FPEXTENSION: Type = 129; pub const SYSZ_GRP_HIGHWORD: Type = 130; pub const SYSZ_GRP_INTERLOCKEDACCESS1: Type = 131; pub const SYSZ_GRP_LOADSTOREONCOND: Type = 132; pub const SYSZ_GRP_ENDING: Type = 133; } pub mod x86_reg { #[doc = " X86 registers"] pub type Type = u32; pub const X86_REG_INVALID: Type = 0; pub const X86_REG_AH: Type = 1; pub const X86_REG_AL: Type = 2; pub const X86_REG_AX: Type = 3; pub const X86_REG_BH: Type = 4; pub const X86_REG_BL: Type = 5; pub const X86_REG_BP: Type = 6; pub const X86_REG_BPL: Type = 7; pub const X86_REG_BX: Type = 8; pub const X86_REG_CH: Type = 9; pub const X86_REG_CL: Type = 10; pub const X86_REG_CS: Type = 11; pub const X86_REG_CX: Type = 12; pub const X86_REG_DH: Type = 13; pub const X86_REG_DI: Type = 14; pub const X86_REG_DIL: Type = 15; pub const X86_REG_DL: Type = 16; pub const X86_REG_DS: Type = 17; pub const X86_REG_DX: Type = 18; pub const X86_REG_EAX: Type = 19; pub const X86_REG_EBP: Type = 20; pub const X86_REG_EBX: Type = 21; pub const X86_REG_ECX: Type = 22; pub const X86_REG_EDI: Type = 23; pub const X86_REG_EDX: Type = 24; pub const X86_REG_EFLAGS: Type = 25; pub const X86_REG_EIP: Type = 26; pub const X86_REG_EIZ: Type = 27; pub const X86_REG_ES: Type = 28; pub const X86_REG_ESI: Type = 29; pub const X86_REG_ESP: Type = 30; pub const X86_REG_FPSW: Type = 31; pub const X86_REG_FS: Type = 32; pub const X86_REG_GS: Type = 33; pub const X86_REG_IP: Type = 34; pub const X86_REG_RAX: Type = 35; pub const X86_REG_RBP: Type = 36; pub const X86_REG_RBX: Type = 37; pub const X86_REG_RCX: Type = 38; pub const X86_REG_RDI: Type = 39; pub const X86_REG_RDX: Type = 40; pub const X86_REG_RIP: Type = 41; pub const X86_REG_RIZ: Type = 42; pub const X86_REG_RSI: Type = 43; pub const X86_REG_RSP: Type = 44; pub const X86_REG_SI: Type = 45; pub const X86_REG_SIL: Type = 46; pub const X86_REG_SP: Type = 47; pub const X86_REG_SPL: Type = 48; pub const X86_REG_SS: Type = 49; pub const X86_REG_CR0: Type = 50; pub const X86_REG_CR1: Type = 51; pub const X86_REG_CR2: Type = 52; pub const X86_REG_CR3: Type = 53; pub const X86_REG_CR4: Type = 54; pub const X86_REG_CR5: Type = 55; pub const X86_REG_CR6: Type = 56; pub const X86_REG_CR7: Type = 57; pub const X86_REG_CR8: Type = 58; pub const X86_REG_CR9: Type = 59; pub const X86_REG_CR10: Type = 60; pub const X86_REG_CR11: Type = 61; pub const X86_REG_CR12: Type = 62; pub const X86_REG_CR13: Type = 63; pub const X86_REG_CR14: Type = 64; pub const X86_REG_CR15: Type = 65; pub const X86_REG_DR0: Type = 66; pub const X86_REG_DR1: Type = 67; pub const X86_REG_DR2: Type = 68; pub const X86_REG_DR3: Type = 69; pub const X86_REG_DR4: Type = 70; pub const X86_REG_DR5: Type = 71; pub const X86_REG_DR6: Type = 72; pub const X86_REG_DR7: Type = 73; pub const X86_REG_DR8: Type = 74; pub const X86_REG_DR9: Type = 75; pub const X86_REG_DR10: Type = 76; pub const X86_REG_DR11: Type = 77; pub const X86_REG_DR12: Type = 78; pub const X86_REG_DR13: Type = 79; pub const X86_REG_DR14: Type = 80; pub const X86_REG_DR15: Type = 81; pub const X86_REG_FP0: Type = 82; pub const X86_REG_FP1: Type = 83; pub const X86_REG_FP2: Type = 84; pub const X86_REG_FP3: Type = 85; pub const X86_REG_FP4: Type = 86; pub const X86_REG_FP5: Type = 87; pub const X86_REG_FP6: Type = 88; pub const X86_REG_FP7: Type = 89; pub const X86_REG_K0: Type = 90; pub const X86_REG_K1: Type = 91; pub const X86_REG_K2: Type = 92; pub const X86_REG_K3: Type = 93; pub const X86_REG_K4: Type = 94; pub const X86_REG_K5: Type = 95; pub const X86_REG_K6: Type = 96; pub const X86_REG_K7: Type = 97; pub const X86_REG_MM0: Type = 98; pub const X86_REG_MM1: Type = 99; pub const X86_REG_MM2: Type = 100; pub const X86_REG_MM3: Type = 101; pub const X86_REG_MM4: Type = 102; pub const X86_REG_MM5: Type = 103; pub const X86_REG_MM6: Type = 104; pub const X86_REG_MM7: Type = 105; pub const X86_REG_R8: Type = 106; pub const X86_REG_R9: Type = 107; pub const X86_REG_R10: Type = 108; pub const X86_REG_R11: Type = 109; pub const X86_REG_R12: Type = 110; pub const X86_REG_R13: Type = 111; pub const X86_REG_R14: Type = 112; pub const X86_REG_R15: Type = 113; pub const X86_REG_ST0: Type = 114; pub const X86_REG_ST1: Type = 115; pub const X86_REG_ST2: Type = 116; pub const X86_REG_ST3: Type = 117; pub const X86_REG_ST4: Type = 118; pub const X86_REG_ST5: Type = 119; pub const X86_REG_ST6: Type = 120; pub const X86_REG_ST7: Type = 121; pub const X86_REG_XMM0: Type = 122; pub const X86_REG_XMM1: Type = 123; pub const X86_REG_XMM2: Type = 124; pub const X86_REG_XMM3: Type = 125; pub const X86_REG_XMM4: Type = 126; pub const X86_REG_XMM5: Type = 127; pub const X86_REG_XMM6: Type = 128; pub const X86_REG_XMM7: Type = 129; pub const X86_REG_XMM8: Type = 130; pub const X86_REG_XMM9: Type = 131; pub const X86_REG_XMM10: Type = 132; pub const X86_REG_XMM11: Type = 133; pub const X86_REG_XMM12: Type = 134; pub const X86_REG_XMM13: Type = 135; pub const X86_REG_XMM14: Type = 136; pub const X86_REG_XMM15: Type = 137; pub const X86_REG_XMM16: Type = 138; pub const X86_REG_XMM17: Type = 139; pub const X86_REG_XMM18: Type = 140; pub const X86_REG_XMM19: Type = 141; pub const X86_REG_XMM20: Type = 142; pub const X86_REG_XMM21: Type = 143; pub const X86_REG_XMM22: Type = 144; pub const X86_REG_XMM23: Type = 145; pub const X86_REG_XMM24: Type = 146; pub const X86_REG_XMM25: Type = 147; pub const X86_REG_XMM26: Type = 148; pub const X86_REG_XMM27: Type = 149; pub const X86_REG_XMM28: Type = 150; pub const X86_REG_XMM29: Type = 151; pub const X86_REG_XMM30: Type = 152; pub const X86_REG_XMM31: Type = 153; pub const X86_REG_YMM0: Type = 154; pub const X86_REG_YMM1: Type = 155; pub const X86_REG_YMM2: Type = 156; pub const X86_REG_YMM3: Type = 157; pub const X86_REG_YMM4: Type = 158; pub const X86_REG_YMM5: Type = 159; pub const X86_REG_YMM6: Type = 160; pub const X86_REG_YMM7: Type = 161; pub const X86_REG_YMM8: Type = 162; pub const X86_REG_YMM9: Type = 163; pub const X86_REG_YMM10: Type = 164; pub const X86_REG_YMM11: Type = 165; pub const X86_REG_YMM12: Type = 166; pub const X86_REG_YMM13: Type = 167; pub const X86_REG_YMM14: Type = 168; pub const X86_REG_YMM15: Type = 169; pub const X86_REG_YMM16: Type = 170; pub const X86_REG_YMM17: Type = 171; pub const X86_REG_YMM18: Type = 172; pub const X86_REG_YMM19: Type = 173; pub const X86_REG_YMM20: Type = 174; pub const X86_REG_YMM21: Type = 175; pub const X86_REG_YMM22: Type = 176; pub const X86_REG_YMM23: Type = 177; pub const X86_REG_YMM24: Type = 178; pub const X86_REG_YMM25: Type = 179; pub const X86_REG_YMM26: Type = 180; pub const X86_REG_YMM27: Type = 181; pub const X86_REG_YMM28: Type = 182; pub const X86_REG_YMM29: Type = 183; pub const X86_REG_YMM30: Type = 184; pub const X86_REG_YMM31: Type = 185; pub const X86_REG_ZMM0: Type = 186; pub const X86_REG_ZMM1: Type = 187; pub const X86_REG_ZMM2: Type = 188; pub const X86_REG_ZMM3: Type = 189; pub const X86_REG_ZMM4: Type = 190; pub const X86_REG_ZMM5: Type = 191; pub const X86_REG_ZMM6: Type = 192; pub const X86_REG_ZMM7: Type = 193; pub const X86_REG_ZMM8: Type = 194; pub const X86_REG_ZMM9: Type = 195; pub const X86_REG_ZMM10: Type = 196; pub const X86_REG_ZMM11: Type = 197; pub const X86_REG_ZMM12: Type = 198; pub const X86_REG_ZMM13: Type = 199; pub const X86_REG_ZMM14: Type = 200; pub const X86_REG_ZMM15: Type = 201; pub const X86_REG_ZMM16: Type = 202; pub const X86_REG_ZMM17: Type = 203; pub const X86_REG_ZMM18: Type = 204; pub const X86_REG_ZMM19: Type = 205; pub const X86_REG_ZMM20: Type = 206; pub const X86_REG_ZMM21: Type = 207; pub const X86_REG_ZMM22: Type = 208; pub const X86_REG_ZMM23: Type = 209; pub const X86_REG_ZMM24: Type = 210; pub const X86_REG_ZMM25: Type = 211; pub const X86_REG_ZMM26: Type = 212; pub const X86_REG_ZMM27: Type = 213; pub const X86_REG_ZMM28: Type = 214; pub const X86_REG_ZMM29: Type = 215; pub const X86_REG_ZMM30: Type = 216; pub const X86_REG_ZMM31: Type = 217; pub const X86_REG_R8B: Type = 218; pub const X86_REG_R9B: Type = 219; pub const X86_REG_R10B: Type = 220; pub const X86_REG_R11B: Type = 221; pub const X86_REG_R12B: Type = 222; pub const X86_REG_R13B: Type = 223; pub const X86_REG_R14B: Type = 224; pub const X86_REG_R15B: Type = 225; pub const X86_REG_R8D: Type = 226; pub const X86_REG_R9D: Type = 227; pub const X86_REG_R10D: Type = 228; pub const X86_REG_R11D: Type = 229; pub const X86_REG_R12D: Type = 230; pub const X86_REG_R13D: Type = 231; pub const X86_REG_R14D: Type = 232; pub const X86_REG_R15D: Type = 233; pub const X86_REG_R8W: Type = 234; pub const X86_REG_R9W: Type = 235; pub const X86_REG_R10W: Type = 236; pub const X86_REG_R11W: Type = 237; pub const X86_REG_R12W: Type = 238; pub const X86_REG_R13W: Type = 239; pub const X86_REG_R14W: Type = 240; pub const X86_REG_R15W: Type = 241; pub const X86_REG_ENDING: Type = 242; } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] X86_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] X86_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] X86_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] X86_OP_MEM = 3, } #[repr(u32)] #[doc = " XOP Code Condition type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_xop_cc { #[doc = "< Uninitialized."] X86_XOP_CC_INVALID = 0, X86_XOP_CC_LT = 1, X86_XOP_CC_LE = 2, X86_XOP_CC_GT = 3, X86_XOP_CC_GE = 4, X86_XOP_CC_EQ = 5, X86_XOP_CC_NEQ = 6, X86_XOP_CC_FALSE = 7, X86_XOP_CC_TRUE = 8, } #[repr(u32)] #[doc = " AVX broadcast type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_avx_bcast { #[doc = "< Uninitialized."] X86_AVX_BCAST_INVALID = 0, #[doc = "< AVX512 broadcast type {1to2}"] X86_AVX_BCAST_2 = 1, #[doc = "< AVX512 broadcast type {1to4}"] X86_AVX_BCAST_4 = 2, #[doc = "< AVX512 broadcast type {1to8}"] X86_AVX_BCAST_8 = 3, #[doc = "< AVX512 broadcast type {1to16}"] X86_AVX_BCAST_16 = 4, } #[repr(u32)] #[doc = " SSE Code Condition type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_sse_cc { #[doc = "< Uninitialized."] X86_SSE_CC_INVALID = 0, X86_SSE_CC_EQ = 1, X86_SSE_CC_LT = 2, X86_SSE_CC_LE = 3, X86_SSE_CC_UNORD = 4, X86_SSE_CC_NEQ = 5, X86_SSE_CC_NLT = 6, X86_SSE_CC_NLE = 7, X86_SSE_CC_ORD = 8, } #[repr(u32)] #[doc = " AVX Code Condition type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_avx_cc { #[doc = "< Uninitialized."] X86_AVX_CC_INVALID = 0, X86_AVX_CC_EQ = 1, X86_AVX_CC_LT = 2, X86_AVX_CC_LE = 3, X86_AVX_CC_UNORD = 4, X86_AVX_CC_NEQ = 5, X86_AVX_CC_NLT = 6, X86_AVX_CC_NLE = 7, X86_AVX_CC_ORD = 8, X86_AVX_CC_EQ_UQ = 9, X86_AVX_CC_NGE = 10, X86_AVX_CC_NGT = 11, X86_AVX_CC_FALSE = 12, X86_AVX_CC_NEQ_OQ = 13, X86_AVX_CC_GE = 14, X86_AVX_CC_GT = 15, X86_AVX_CC_TRUE = 16, X86_AVX_CC_EQ_OS = 17, X86_AVX_CC_LT_OQ = 18, X86_AVX_CC_LE_OQ = 19, X86_AVX_CC_UNORD_S = 20, X86_AVX_CC_NEQ_US = 21, X86_AVX_CC_NLT_UQ = 22, X86_AVX_CC_NLE_UQ = 23, X86_AVX_CC_ORD_S = 24, X86_AVX_CC_EQ_US = 25, X86_AVX_CC_NGE_UQ = 26, X86_AVX_CC_NGT_UQ = 27, X86_AVX_CC_FALSE_OS = 28, X86_AVX_CC_NEQ_OS = 29, X86_AVX_CC_GE_OQ = 30, X86_AVX_CC_GT_OQ = 31, X86_AVX_CC_TRUE_US = 32, } #[repr(u32)] #[doc = " AVX static rounding mode type"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_avx_rm { #[doc = "< Uninitialized."] X86_AVX_RM_INVALID = 0, #[doc = "< Round to nearest"] X86_AVX_RM_RN = 1, #[doc = "< Round down"] X86_AVX_RM_RD = 2, #[doc = "< Round up"] X86_AVX_RM_RU = 3, #[doc = "< Round toward zero"] X86_AVX_RM_RZ = 4, } pub const X86_PREFIX_REPE: x86_prefix = x86_prefix::X86_PREFIX_REP; #[repr(u32)] #[doc = " Instruction prefixes - to be used in cs_x86.prefix[]"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_prefix { #[doc = "< lock (cs_x86.prefix[0]"] X86_PREFIX_LOCK = 240, #[doc = "< rep (cs_x86.prefix[0]"] X86_PREFIX_REP = 243, #[doc = "< repne/repnz (cs_x86.prefix[0]"] X86_PREFIX_REPNE = 242, #[doc = "< segment override CS (cs_x86.prefix[1]"] X86_PREFIX_CS = 46, #[doc = "< segment override SS (cs_x86.prefix[1]"] X86_PREFIX_SS = 54, #[doc = "< segment override DS (cs_x86.prefix[1]"] X86_PREFIX_DS = 62, #[doc = "< segment override ES (cs_x86.prefix[1]"] X86_PREFIX_ES = 38, #[doc = "< segment override FS (cs_x86.prefix[1]"] X86_PREFIX_FS = 100, #[doc = "< segment override GS (cs_x86.prefix[1]"] X86_PREFIX_GS = 101, #[doc = "< operand-size override (cs_x86.prefix[2]"] X86_PREFIX_OPSIZE = 102, #[doc = "< address-size override (cs_x86.prefix[3]"] X86_PREFIX_ADDRSIZE = 103, } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with X86_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct x86_op_mem { #[doc = "< segment register (or X86_REG_INVALID if irrelevant)"] pub segment: x86_reg::Type, #[doc = "< base register (or X86_REG_INVALID if irrelevant)"] pub base: x86_reg::Type, #[doc = "< index register (or X86_REG_INVALID if irrelevant)"] pub index: x86_reg::Type, #[doc = "< scale for index register"] pub scale: libc::c_int, #[doc = "< displacement value"] pub disp: i64, } impl Clone for x86_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_x86_op { #[doc = "< operand type"] pub type_: x86_op_type, pub __bindgen_anon_1: cs_x86_op__bindgen_ty_1, #[doc = " size of this operand (in bytes)."] pub size: u8, #[doc = " How is this operand accessed? (READ, WRITE or READ|WRITE)"] #[doc = " This field is combined of cs_ac_type."] #[doc = " NOTE: this field is irrelevant if engine is compiled in DIET mode."] pub access: u8, #[doc = " AVX broadcast type, or 0 if irrelevant"] pub avx_bcast: x86_avx_bcast, #[doc = " AVX zero opmask {z}"] pub avx_zero_opmask: bool, } #[repr(C)] #[derive(Copy)] pub union cs_x86_op__bindgen_ty_1 { #[doc = "< register value for REG operand"] pub reg: x86_reg::Type, #[doc = "< immediate value for IMM operand"] pub imm: i64, #[doc = "< base/index/scale/disp value for MEM operand"] pub mem: x86_op_mem, _bindgen_union_align: [u64; 3usize], } impl Clone for cs_x86_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_x86_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_x86_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_x86_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_x86_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_x86_op {{ type: {:?}, __bindgen_anon_1: {:?}, size: {:?}, access: {:?}, avx_bcast: {:?}, avx_zero_opmask: {:?} }}" , self . type_ , self . __bindgen_anon_1 , self . size , self . access , self . avx_bcast , self . avx_zero_opmask ) } } #[repr(C)] #[derive(Debug, Copy)] pub struct cs_x86_encoding { #[doc = " ModR/M offset, or 0 when irrelevant"] pub modrm_offset: u8, #[doc = " Displacement offset, or 0 when irrelevant."] pub disp_offset: u8, pub disp_size: u8, #[doc = " Immediate offset, or 0 when irrelevant."] pub imm_offset: u8, pub imm_size: u8, } impl Clone for cs_x86_encoding { fn clone(&self) -> Self { *self } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_x86 { #[doc = " Instruction prefix, which can be up to 4 bytes."] #[doc = " A prefix byte gets value 0 when irrelevant."] #[doc = " prefix[0] indicates REP/REPNE/LOCK prefix (See X86_PREFIX_REP/REPNE/LOCK above)"] #[doc = " prefix[1] indicates segment override (irrelevant for x86_64):"] #[doc = " See X86_PREFIX_CS/SS/DS/ES/FS/GS above."] #[doc = " prefix[2] indicates operand-size override (X86_PREFIX_OPSIZE)"] #[doc = " prefix[3] indicates address-size override (X86_PREFIX_ADDRSIZE)"] pub prefix: [u8; 4usize], #[doc = " Instruction opcode, which can be from 1 to 4 bytes in size."] #[doc = " This contains VEX opcode as well."] #[doc = " An trailing opcode byte gets value 0 when irrelevant."] pub opcode: [u8; 4usize], #[doc = " REX prefix: only a non-zero value is relevant for x86_64"] pub rex: u8, #[doc = " Address size, which can be overridden with above prefix[5]."] pub addr_size: u8, #[doc = " ModR/M byte"] pub modrm: u8, #[doc = " SIB value, or 0 when irrelevant."] pub sib: u8, #[doc = " Displacement value, valid if encoding.disp_offset != 0"] pub disp: i64, #[doc = " SIB index register, or X86_REG_INVALID when irrelevant."] pub sib_index: x86_reg::Type, #[doc = " SIB scale, only applicable if sib_index is valid."] pub sib_scale: i8, #[doc = " SIB base register, or X86_REG_INVALID when irrelevant."] pub sib_base: x86_reg::Type, #[doc = " XOP Code Condition"] pub xop_cc: x86_xop_cc, #[doc = " SSE Code Condition"] pub sse_cc: x86_sse_cc, #[doc = " AVX Code Condition"] pub avx_cc: x86_avx_cc, #[doc = " AVX Suppress all Exception"] pub avx_sae: bool, #[doc = " AVX static rounding mode"] pub avx_rm: x86_avx_rm, pub __bindgen_anon_1: cs_x86__bindgen_ty_1, #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_x86_op; 8usize], #[doc = "< encoding information"] pub encoding: cs_x86_encoding, } #[repr(C)] #[derive(Copy)] pub union cs_x86__bindgen_ty_1 { #[doc = " EFLAGS updated by this instruction."] #[doc = " This can be formed from OR combination of X86_EFLAGS_* symbols in x86.h"] pub eflags: u64, #[doc = " FPU_FLAGS updated by this instruction."] #[doc = " This can be formed from OR combination of X86_FPU_FLAGS_* symbols in x86.h"] pub fpu_flags: u64, _bindgen_union_align: u64, } impl Clone for cs_x86__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_x86__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_x86__bindgen_ty_1 {{ union }}") } } impl Clone for cs_x86 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_x86 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_x86 {{ prefix: {:?}, opcode: {:?}, rex: {:?}, addr_size: {:?}, modrm: {:?}, sib: {:?}, disp: {:?}, sib_index: {:?}, sib_scale: {:?}, sib_base: {:?}, xop_cc: {:?}, sse_cc: {:?}, avx_cc: {:?}, avx_sae: {:?}, avx_rm: {:?}, __bindgen_anon_1: {:?}, op_count: {:?}, operands: {:?}, encoding: {:?} }}" , self . prefix , self . opcode , self . rex , self . addr_size , self . modrm , self . sib , self . disp , self . sib_index , self . sib_scale , self . sib_base , self . xop_cc , self . sse_cc , self . avx_cc , self . avx_sae , self . avx_rm , self . __bindgen_anon_1 , self . op_count , self . operands , self . encoding ) } } #[repr(u32)] #[doc = " X86 instructions"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum x86_insn { X86_INS_INVALID = 0, X86_INS_AAA = 1, X86_INS_AAD = 2, X86_INS_AAM = 3, X86_INS_AAS = 4, X86_INS_FABS = 5, X86_INS_ADC = 6, X86_INS_ADCX = 7, X86_INS_ADD = 8, X86_INS_ADDPD = 9, X86_INS_ADDPS = 10, X86_INS_ADDSD = 11, X86_INS_ADDSS = 12, X86_INS_ADDSUBPD = 13, X86_INS_ADDSUBPS = 14, X86_INS_FADD = 15, X86_INS_FIADD = 16, X86_INS_FADDP = 17, X86_INS_ADOX = 18, X86_INS_AESDECLAST = 19, X86_INS_AESDEC = 20, X86_INS_AESENCLAST = 21, X86_INS_AESENC = 22, X86_INS_AESIMC = 23, X86_INS_AESKEYGENASSIST = 24, X86_INS_AND = 25, X86_INS_ANDN = 26, X86_INS_ANDNPD = 27, X86_INS_ANDNPS = 28, X86_INS_ANDPD = 29, X86_INS_ANDPS = 30, X86_INS_ARPL = 31, X86_INS_BEXTR = 32, X86_INS_BLCFILL = 33, X86_INS_BLCI = 34, X86_INS_BLCIC = 35, X86_INS_BLCMSK = 36, X86_INS_BLCS = 37, X86_INS_BLENDPD = 38, X86_INS_BLENDPS = 39, X86_INS_BLENDVPD = 40, X86_INS_BLENDVPS = 41, X86_INS_BLSFILL = 42, X86_INS_BLSI = 43, X86_INS_BLSIC = 44, X86_INS_BLSMSK = 45, X86_INS_BLSR = 46, X86_INS_BOUND = 47, X86_INS_BSF = 48, X86_INS_BSR = 49, X86_INS_BSWAP = 50, X86_INS_BT = 51, X86_INS_BTC = 52, X86_INS_BTR = 53, X86_INS_BTS = 54, X86_INS_BZHI = 55, X86_INS_CALL = 56, X86_INS_CBW = 57, X86_INS_CDQ = 58, X86_INS_CDQE = 59, X86_INS_FCHS = 60, X86_INS_CLAC = 61, X86_INS_CLC = 62, X86_INS_CLD = 63, X86_INS_CLFLUSH = 64, X86_INS_CLFLUSHOPT = 65, X86_INS_CLGI = 66, X86_INS_CLI = 67, X86_INS_CLTS = 68, X86_INS_CLWB = 69, X86_INS_CMC = 70, X86_INS_CMOVA = 71, X86_INS_CMOVAE = 72, X86_INS_CMOVB = 73, X86_INS_CMOVBE = 74, X86_INS_FCMOVBE = 75, X86_INS_FCMOVB = 76, X86_INS_CMOVE = 77, X86_INS_FCMOVE = 78, X86_INS_CMOVG = 79, X86_INS_CMOVGE = 80, X86_INS_CMOVL = 81, X86_INS_CMOVLE = 82, X86_INS_FCMOVNBE = 83, X86_INS_FCMOVNB = 84, X86_INS_CMOVNE = 85, X86_INS_FCMOVNE = 86, X86_INS_CMOVNO = 87, X86_INS_CMOVNP = 88, X86_INS_FCMOVNU = 89, X86_INS_CMOVNS = 90, X86_INS_CMOVO = 91, X86_INS_CMOVP = 92, X86_INS_FCMOVU = 93, X86_INS_CMOVS = 94, X86_INS_CMP = 95, X86_INS_CMPSB = 96, X86_INS_CMPSQ = 97, X86_INS_CMPSW = 98, X86_INS_CMPXCHG16B = 99, X86_INS_CMPXCHG = 100, X86_INS_CMPXCHG8B = 101, X86_INS_COMISD = 102, X86_INS_COMISS = 103, X86_INS_FCOMP = 104, X86_INS_FCOMIP = 105, X86_INS_FCOMI = 106, X86_INS_FCOM = 107, X86_INS_FCOS = 108, X86_INS_CPUID = 109, X86_INS_CQO = 110, X86_INS_CRC32 = 111, X86_INS_CVTDQ2PD = 112, X86_INS_CVTDQ2PS = 113, X86_INS_CVTPD2DQ = 114, X86_INS_CVTPD2PS = 115, X86_INS_CVTPS2DQ = 116, X86_INS_CVTPS2PD = 117, X86_INS_CVTSD2SI = 118, X86_INS_CVTSD2SS = 119, X86_INS_CVTSI2SD = 120, X86_INS_CVTSI2SS = 121, X86_INS_CVTSS2SD = 122, X86_INS_CVTSS2SI = 123, X86_INS_CVTTPD2DQ = 124, X86_INS_CVTTPS2DQ = 125, X86_INS_CVTTSD2SI = 126, X86_INS_CVTTSS2SI = 127, X86_INS_CWD = 128, X86_INS_CWDE = 129, X86_INS_DAA = 130, X86_INS_DAS = 131, X86_INS_DATA16 = 132, X86_INS_DEC = 133, X86_INS_DIV = 134, X86_INS_DIVPD = 135, X86_INS_DIVPS = 136, X86_INS_FDIVR = 137, X86_INS_FIDIVR = 138, X86_INS_FDIVRP = 139, X86_INS_DIVSD = 140, X86_INS_DIVSS = 141, X86_INS_FDIV = 142, X86_INS_FIDIV = 143, X86_INS_FDIVP = 144, X86_INS_DPPD = 145, X86_INS_DPPS = 146, X86_INS_RET = 147, X86_INS_ENCLS = 148, X86_INS_ENCLU = 149, X86_INS_ENTER = 150, X86_INS_EXTRACTPS = 151, X86_INS_EXTRQ = 152, X86_INS_F2XM1 = 153, X86_INS_LCALL = 154, X86_INS_LJMP = 155, X86_INS_FBLD = 156, X86_INS_FBSTP = 157, X86_INS_FCOMPP = 158, X86_INS_FDECSTP = 159, X86_INS_FEMMS = 160, X86_INS_FFREE = 161, X86_INS_FICOM = 162, X86_INS_FICOMP = 163, X86_INS_FINCSTP = 164, X86_INS_FLDCW = 165, X86_INS_FLDENV = 166, X86_INS_FLDL2E = 167, X86_INS_FLDL2T = 168, X86_INS_FLDLG2 = 169, X86_INS_FLDLN2 = 170, X86_INS_FLDPI = 171, X86_INS_FNCLEX = 172, X86_INS_FNINIT = 173, X86_INS_FNOP = 174, X86_INS_FNSTCW = 175, X86_INS_FNSTSW = 176, X86_INS_FPATAN = 177, X86_INS_FPREM = 178, X86_INS_FPREM1 = 179, X86_INS_FPTAN = 180, X86_INS_FFREEP = 181, X86_INS_FRNDINT = 182, X86_INS_FRSTOR = 183, X86_INS_FNSAVE = 184, X86_INS_FSCALE = 185, X86_INS_FSETPM = 186, X86_INS_FSINCOS = 187, X86_INS_FNSTENV = 188, X86_INS_FXAM = 189, X86_INS_FXRSTOR = 190, X86_INS_FXRSTOR64 = 191, X86_INS_FXSAVE = 192, X86_INS_FXSAVE64 = 193, X86_INS_FXTRACT = 194, X86_INS_FYL2X = 195, X86_INS_FYL2XP1 = 196, X86_INS_MOVAPD = 197, X86_INS_MOVAPS = 198, X86_INS_ORPD = 199, X86_INS_ORPS = 200, X86_INS_VMOVAPD = 201, X86_INS_VMOVAPS = 202, X86_INS_XORPD = 203, X86_INS_XORPS = 204, X86_INS_GETSEC = 205, X86_INS_HADDPD = 206, X86_INS_HADDPS = 207, X86_INS_HLT = 208, X86_INS_HSUBPD = 209, X86_INS_HSUBPS = 210, X86_INS_IDIV = 211, X86_INS_FILD = 212, X86_INS_IMUL = 213, X86_INS_IN = 214, X86_INS_INC = 215, X86_INS_INSB = 216, X86_INS_INSERTPS = 217, X86_INS_INSERTQ = 218, X86_INS_INSD = 219, X86_INS_INSW = 220, X86_INS_INT = 221, X86_INS_INT1 = 222, X86_INS_INT3 = 223, X86_INS_INTO = 224, X86_INS_INVD = 225, X86_INS_INVEPT = 226, X86_INS_INVLPG = 227, X86_INS_INVLPGA = 228, X86_INS_INVPCID = 229, X86_INS_INVVPID = 230, X86_INS_IRET = 231, X86_INS_IRETD = 232, X86_INS_IRETQ = 233, X86_INS_FISTTP = 234, X86_INS_FIST = 235, X86_INS_FISTP = 236, X86_INS_UCOMISD = 237, X86_INS_UCOMISS = 238, X86_INS_VCOMISD = 239, X86_INS_VCOMISS = 240, X86_INS_VCVTSD2SS = 241, X86_INS_VCVTSI2SD = 242, X86_INS_VCVTSI2SS = 243, X86_INS_VCVTSS2SD = 244, X86_INS_VCVTTSD2SI = 245, X86_INS_VCVTTSD2USI = 246, X86_INS_VCVTTSS2SI = 247, X86_INS_VCVTTSS2USI = 248, X86_INS_VCVTUSI2SD = 249, X86_INS_VCVTUSI2SS = 250, X86_INS_VUCOMISD = 251, X86_INS_VUCOMISS = 252, X86_INS_JAE = 253, X86_INS_JA = 254, X86_INS_JBE = 255, X86_INS_JB = 256, X86_INS_JCXZ = 257, X86_INS_JECXZ = 258, X86_INS_JE = 259, X86_INS_JGE = 260, X86_INS_JG = 261, X86_INS_JLE = 262, X86_INS_JL = 263, X86_INS_JMP = 264, X86_INS_JNE = 265, X86_INS_JNO = 266, X86_INS_JNP = 267, X86_INS_JNS = 268, X86_INS_JO = 269, X86_INS_JP = 270, X86_INS_JRCXZ = 271, X86_INS_JS = 272, X86_INS_KANDB = 273, X86_INS_KANDD = 274, X86_INS_KANDNB = 275, X86_INS_KANDND = 276, X86_INS_KANDNQ = 277, X86_INS_KANDNW = 278, X86_INS_KANDQ = 279, X86_INS_KANDW = 280, X86_INS_KMOVB = 281, X86_INS_KMOVD = 282, X86_INS_KMOVQ = 283, X86_INS_KMOVW = 284, X86_INS_KNOTB = 285, X86_INS_KNOTD = 286, X86_INS_KNOTQ = 287, X86_INS_KNOTW = 288, X86_INS_KORB = 289, X86_INS_KORD = 290, X86_INS_KORQ = 291, X86_INS_KORTESTB = 292, X86_INS_KORTESTD = 293, X86_INS_KORTESTQ = 294, X86_INS_KORTESTW = 295, X86_INS_KORW = 296, X86_INS_KSHIFTLB = 297, X86_INS_KSHIFTLD = 298, X86_INS_KSHIFTLQ = 299, X86_INS_KSHIFTLW = 300, X86_INS_KSHIFTRB = 301, X86_INS_KSHIFTRD = 302, X86_INS_KSHIFTRQ = 303, X86_INS_KSHIFTRW = 304, X86_INS_KUNPCKBW = 305, X86_INS_KXNORB = 306, X86_INS_KXNORD = 307, X86_INS_KXNORQ = 308, X86_INS_KXNORW = 309, X86_INS_KXORB = 310, X86_INS_KXORD = 311, X86_INS_KXORQ = 312, X86_INS_KXORW = 313, X86_INS_LAHF = 314, X86_INS_LAR = 315, X86_INS_LDDQU = 316, X86_INS_LDMXCSR = 317, X86_INS_LDS = 318, X86_INS_FLDZ = 319, X86_INS_FLD1 = 320, X86_INS_FLD = 321, X86_INS_LEA = 322, X86_INS_LEAVE = 323, X86_INS_LES = 324, X86_INS_LFENCE = 325, X86_INS_LFS = 326, X86_INS_LGDT = 327, X86_INS_LGS = 328, X86_INS_LIDT = 329, X86_INS_LLDT = 330, X86_INS_LMSW = 331, X86_INS_OR = 332, X86_INS_SUB = 333, X86_INS_XOR = 334, X86_INS_LODSB = 335, X86_INS_LODSD = 336, X86_INS_LODSQ = 337, X86_INS_LODSW = 338, X86_INS_LOOP = 339, X86_INS_LOOPE = 340, X86_INS_LOOPNE = 341, X86_INS_RETF = 342, X86_INS_RETFQ = 343, X86_INS_LSL = 344, X86_INS_LSS = 345, X86_INS_LTR = 346, X86_INS_XADD = 347, X86_INS_LZCNT = 348, X86_INS_MASKMOVDQU = 349, X86_INS_MAXPD = 350, X86_INS_MAXPS = 351, X86_INS_MAXSD = 352, X86_INS_MAXSS = 353, X86_INS_MFENCE = 354, X86_INS_MINPD = 355, X86_INS_MINPS = 356, X86_INS_MINSD = 357, X86_INS_MINSS = 358, X86_INS_CVTPD2PI = 359, X86_INS_CVTPI2PD = 360, X86_INS_CVTPI2PS = 361, X86_INS_CVTPS2PI = 362, X86_INS_CVTTPD2PI = 363, X86_INS_CVTTPS2PI = 364, X86_INS_EMMS = 365, X86_INS_MASKMOVQ = 366, X86_INS_MOVD = 367, X86_INS_MOVDQ2Q = 368, X86_INS_MOVNTQ = 369, X86_INS_MOVQ2DQ = 370, X86_INS_MOVQ = 371, X86_INS_PABSB = 372, X86_INS_PABSD = 373, X86_INS_PABSW = 374, X86_INS_PACKSSDW = 375, X86_INS_PACKSSWB = 376, X86_INS_PACKUSWB = 377, X86_INS_PADDB = 378, X86_INS_PADDD = 379, X86_INS_PADDQ = 380, X86_INS_PADDSB = 381, X86_INS_PADDSW = 382, X86_INS_PADDUSB = 383, X86_INS_PADDUSW = 384, X86_INS_PADDW = 385, X86_INS_PALIGNR = 386, X86_INS_PANDN = 387, X86_INS_PAND = 388, X86_INS_PAVGB = 389, X86_INS_PAVGW = 390, X86_INS_PCMPEQB = 391, X86_INS_PCMPEQD = 392, X86_INS_PCMPEQW = 393, X86_INS_PCMPGTB = 394, X86_INS_PCMPGTD = 395, X86_INS_PCMPGTW = 396, X86_INS_PEXTRW = 397, X86_INS_PHADDSW = 398, X86_INS_PHADDW = 399, X86_INS_PHADDD = 400, X86_INS_PHSUBD = 401, X86_INS_PHSUBSW = 402, X86_INS_PHSUBW = 403, X86_INS_PINSRW = 404, X86_INS_PMADDUBSW = 405, X86_INS_PMADDWD = 406, X86_INS_PMAXSW = 407, X86_INS_PMAXUB = 408, X86_INS_PMINSW = 409, X86_INS_PMINUB = 410, X86_INS_PMOVMSKB = 411, X86_INS_PMULHRSW = 412, X86_INS_PMULHUW = 413, X86_INS_PMULHW = 414, X86_INS_PMULLW = 415, X86_INS_PMULUDQ = 416, X86_INS_POR = 417, X86_INS_PSADBW = 418, X86_INS_PSHUFB = 419, X86_INS_PSHUFW = 420, X86_INS_PSIGNB = 421, X86_INS_PSIGND = 422, X86_INS_PSIGNW = 423, X86_INS_PSLLD = 424, X86_INS_PSLLQ = 425, X86_INS_PSLLW = 426, X86_INS_PSRAD = 427, X86_INS_PSRAW = 428, X86_INS_PSRLD = 429, X86_INS_PSRLQ = 430, X86_INS_PSRLW = 431, X86_INS_PSUBB = 432, X86_INS_PSUBD = 433, X86_INS_PSUBQ = 434, X86_INS_PSUBSB = 435, X86_INS_PSUBSW = 436, X86_INS_PSUBUSB = 437, X86_INS_PSUBUSW = 438, X86_INS_PSUBW = 439, X86_INS_PUNPCKHBW = 440, X86_INS_PUNPCKHDQ = 441, X86_INS_PUNPCKHWD = 442, X86_INS_PUNPCKLBW = 443, X86_INS_PUNPCKLDQ = 444, X86_INS_PUNPCKLWD = 445, X86_INS_PXOR = 446, X86_INS_MONITOR = 447, X86_INS_MONTMUL = 448, X86_INS_MOV = 449, X86_INS_MOVABS = 450, X86_INS_MOVBE = 451, X86_INS_MOVDDUP = 452, X86_INS_MOVDQA = 453, X86_INS_MOVDQU = 454, X86_INS_MOVHLPS = 455, X86_INS_MOVHPD = 456, X86_INS_MOVHPS = 457, X86_INS_MOVLHPS = 458, X86_INS_MOVLPD = 459, X86_INS_MOVLPS = 460, X86_INS_MOVMSKPD = 461, X86_INS_MOVMSKPS = 462, X86_INS_MOVNTDQA = 463, X86_INS_MOVNTDQ = 464, X86_INS_MOVNTI = 465, X86_INS_MOVNTPD = 466, X86_INS_MOVNTPS = 467, X86_INS_MOVNTSD = 468, X86_INS_MOVNTSS = 469, X86_INS_MOVSB = 470, X86_INS_MOVSD = 471, X86_INS_MOVSHDUP = 472, X86_INS_MOVSLDUP = 473, X86_INS_MOVSQ = 474, X86_INS_MOVSS = 475, X86_INS_MOVSW = 476, X86_INS_MOVSX = 477, X86_INS_MOVSXD = 478, X86_INS_MOVUPD = 479, X86_INS_MOVUPS = 480, X86_INS_MOVZX = 481, X86_INS_MPSADBW = 482, X86_INS_MUL = 483, X86_INS_MULPD = 484, X86_INS_MULPS = 485, X86_INS_MULSD = 486, X86_INS_MULSS = 487, X86_INS_MULX = 488, X86_INS_FMUL = 489, X86_INS_FIMUL = 490, X86_INS_FMULP = 491, X86_INS_MWAIT = 492, X86_INS_NEG = 493, X86_INS_NOP = 494, X86_INS_NOT = 495, X86_INS_OUT = 496, X86_INS_OUTSB = 497, X86_INS_OUTSD = 498, X86_INS_OUTSW = 499, X86_INS_PACKUSDW = 500, X86_INS_PAUSE = 501, X86_INS_PAVGUSB = 502, X86_INS_PBLENDVB = 503, X86_INS_PBLENDW = 504, X86_INS_PCLMULQDQ = 505, X86_INS_PCMPEQQ = 506, X86_INS_PCMPESTRI = 507, X86_INS_PCMPESTRM = 508, X86_INS_PCMPGTQ = 509, X86_INS_PCMPISTRI = 510, X86_INS_PCMPISTRM = 511, X86_INS_PCOMMIT = 512, X86_INS_PDEP = 513, X86_INS_PEXT = 514, X86_INS_PEXTRB = 515, X86_INS_PEXTRD = 516, X86_INS_PEXTRQ = 517, X86_INS_PF2ID = 518, X86_INS_PF2IW = 519, X86_INS_PFACC = 520, X86_INS_PFADD = 521, X86_INS_PFCMPEQ = 522, X86_INS_PFCMPGE = 523, X86_INS_PFCMPGT = 524, X86_INS_PFMAX = 525, X86_INS_PFMIN = 526, X86_INS_PFMUL = 527, X86_INS_PFNACC = 528, X86_INS_PFPNACC = 529, X86_INS_PFRCPIT1 = 530, X86_INS_PFRCPIT2 = 531, X86_INS_PFRCP = 532, X86_INS_PFRSQIT1 = 533, X86_INS_PFRSQRT = 534, X86_INS_PFSUBR = 535, X86_INS_PFSUB = 536, X86_INS_PHMINPOSUW = 537, X86_INS_PI2FD = 538, X86_INS_PI2FW = 539, X86_INS_PINSRB = 540, X86_INS_PINSRD = 541, X86_INS_PINSRQ = 542, X86_INS_PMAXSB = 543, X86_INS_PMAXSD = 544, X86_INS_PMAXUD = 545, X86_INS_PMAXUW = 546, X86_INS_PMINSB = 547, X86_INS_PMINSD = 548, X86_INS_PMINUD = 549, X86_INS_PMINUW = 550, X86_INS_PMOVSXBD = 551, X86_INS_PMOVSXBQ = 552, X86_INS_PMOVSXBW = 553, X86_INS_PMOVSXDQ = 554, X86_INS_PMOVSXWD = 555, X86_INS_PMOVSXWQ = 556, X86_INS_PMOVZXBD = 557, X86_INS_PMOVZXBQ = 558, X86_INS_PMOVZXBW = 559, X86_INS_PMOVZXDQ = 560, X86_INS_PMOVZXWD = 561, X86_INS_PMOVZXWQ = 562, X86_INS_PMULDQ = 563, X86_INS_PMULHRW = 564, X86_INS_PMULLD = 565, X86_INS_POP = 566, X86_INS_POPAW = 567, X86_INS_POPAL = 568, X86_INS_POPCNT = 569, X86_INS_POPF = 570, X86_INS_POPFD = 571, X86_INS_POPFQ = 572, X86_INS_PREFETCH = 573, X86_INS_PREFETCHNTA = 574, X86_INS_PREFETCHT0 = 575, X86_INS_PREFETCHT1 = 576, X86_INS_PREFETCHT2 = 577, X86_INS_PREFETCHW = 578, X86_INS_PSHUFD = 579, X86_INS_PSHUFHW = 580, X86_INS_PSHUFLW = 581, X86_INS_PSLLDQ = 582, X86_INS_PSRLDQ = 583, X86_INS_PSWAPD = 584, X86_INS_PTEST = 585, X86_INS_PUNPCKHQDQ = 586, X86_INS_PUNPCKLQDQ = 587, X86_INS_PUSH = 588, X86_INS_PUSHAW = 589, X86_INS_PUSHAL = 590, X86_INS_PUSHF = 591, X86_INS_PUSHFD = 592, X86_INS_PUSHFQ = 593, X86_INS_RCL = 594, X86_INS_RCPPS = 595, X86_INS_RCPSS = 596, X86_INS_RCR = 597, X86_INS_RDFSBASE = 598, X86_INS_RDGSBASE = 599, X86_INS_RDMSR = 600, X86_INS_RDPMC = 601, X86_INS_RDRAND = 602, X86_INS_RDSEED = 603, X86_INS_RDTSC = 604, X86_INS_RDTSCP = 605, X86_INS_ROL = 606, X86_INS_ROR = 607, X86_INS_RORX = 608, X86_INS_ROUNDPD = 609, X86_INS_ROUNDPS = 610, X86_INS_ROUNDSD = 611, X86_INS_ROUNDSS = 612, X86_INS_RSM = 613, X86_INS_RSQRTPS = 614, X86_INS_RSQRTSS = 615, X86_INS_SAHF = 616, X86_INS_SAL = 617, X86_INS_SALC = 618, X86_INS_SAR = 619, X86_INS_SARX = 620, X86_INS_SBB = 621, X86_INS_SCASB = 622, X86_INS_SCASD = 623, X86_INS_SCASQ = 624, X86_INS_SCASW = 625, X86_INS_SETAE = 626, X86_INS_SETA = 627, X86_INS_SETBE = 628, X86_INS_SETB = 629, X86_INS_SETE = 630, X86_INS_SETGE = 631, X86_INS_SETG = 632, X86_INS_SETLE = 633, X86_INS_SETL = 634, X86_INS_SETNE = 635, X86_INS_SETNO = 636, X86_INS_SETNP = 637, X86_INS_SETNS = 638, X86_INS_SETO = 639, X86_INS_SETP = 640, X86_INS_SETS = 641, X86_INS_SFENCE = 642, X86_INS_SGDT = 643, X86_INS_SHA1MSG1 = 644, X86_INS_SHA1MSG2 = 645, X86_INS_SHA1NEXTE = 646, X86_INS_SHA1RNDS4 = 647, X86_INS_SHA256MSG1 = 648, X86_INS_SHA256MSG2 = 649, X86_INS_SHA256RNDS2 = 650, X86_INS_SHL = 651, X86_INS_SHLD = 652, X86_INS_SHLX = 653, X86_INS_SHR = 654, X86_INS_SHRD = 655, X86_INS_SHRX = 656, X86_INS_SHUFPD = 657, X86_INS_SHUFPS = 658, X86_INS_SIDT = 659, X86_INS_FSIN = 660, X86_INS_SKINIT = 661, X86_INS_SLDT = 662, X86_INS_SMSW = 663, X86_INS_SQRTPD = 664, X86_INS_SQRTPS = 665, X86_INS_SQRTSD = 666, X86_INS_SQRTSS = 667, X86_INS_FSQRT = 668, X86_INS_STAC = 669, X86_INS_STC = 670, X86_INS_STD = 671, X86_INS_STGI = 672, X86_INS_STI = 673, X86_INS_STMXCSR = 674, X86_INS_STOSB = 675, X86_INS_STOSD = 676, X86_INS_STOSQ = 677, X86_INS_STOSW = 678, X86_INS_STR = 679, X86_INS_FST = 680, X86_INS_FSTP = 681, X86_INS_FSTPNCE = 682, X86_INS_FXCH = 683, X86_INS_SUBPD = 684, X86_INS_SUBPS = 685, X86_INS_FSUBR = 686, X86_INS_FISUBR = 687, X86_INS_FSUBRP = 688, X86_INS_SUBSD = 689, X86_INS_SUBSS = 690, X86_INS_FSUB = 691, X86_INS_FISUB = 692, X86_INS_FSUBP = 693, X86_INS_SWAPGS = 694, X86_INS_SYSCALL = 695, X86_INS_SYSENTER = 696, X86_INS_SYSEXIT = 697, X86_INS_SYSRET = 698, X86_INS_T1MSKC = 699, X86_INS_TEST = 700, X86_INS_UD2 = 701, X86_INS_FTST = 702, X86_INS_TZCNT = 703, X86_INS_TZMSK = 704, X86_INS_FUCOMIP = 705, X86_INS_FUCOMI = 706, X86_INS_FUCOMPP = 707, X86_INS_FUCOMP = 708, X86_INS_FUCOM = 709, X86_INS_UD2B = 710, X86_INS_UNPCKHPD = 711, X86_INS_UNPCKHPS = 712, X86_INS_UNPCKLPD = 713, X86_INS_UNPCKLPS = 714, X86_INS_VADDPD = 715, X86_INS_VADDPS = 716, X86_INS_VADDSD = 717, X86_INS_VADDSS = 718, X86_INS_VADDSUBPD = 719, X86_INS_VADDSUBPS = 720, X86_INS_VAESDECLAST = 721, X86_INS_VAESDEC = 722, X86_INS_VAESENCLAST = 723, X86_INS_VAESENC = 724, X86_INS_VAESIMC = 725, X86_INS_VAESKEYGENASSIST = 726, X86_INS_VALIGND = 727, X86_INS_VALIGNQ = 728, X86_INS_VANDNPD = 729, X86_INS_VANDNPS = 730, X86_INS_VANDPD = 731, X86_INS_VANDPS = 732, X86_INS_VBLENDMPD = 733, X86_INS_VBLENDMPS = 734, X86_INS_VBLENDPD = 735, X86_INS_VBLENDPS = 736, X86_INS_VBLENDVPD = 737, X86_INS_VBLENDVPS = 738, X86_INS_VBROADCASTF128 = 739, X86_INS_VBROADCASTI32X4 = 740, X86_INS_VBROADCASTI64X4 = 741, X86_INS_VBROADCASTSD = 742, X86_INS_VBROADCASTSS = 743, X86_INS_VCOMPRESSPD = 744, X86_INS_VCOMPRESSPS = 745, X86_INS_VCVTDQ2PD = 746, X86_INS_VCVTDQ2PS = 747, X86_INS_VCVTPD2DQX = 748, X86_INS_VCVTPD2DQ = 749, X86_INS_VCVTPD2PSX = 750, X86_INS_VCVTPD2PS = 751, X86_INS_VCVTPD2UDQ = 752, X86_INS_VCVTPH2PS = 753, X86_INS_VCVTPS2DQ = 754, X86_INS_VCVTPS2PD = 755, X86_INS_VCVTPS2PH = 756, X86_INS_VCVTPS2UDQ = 757, X86_INS_VCVTSD2SI = 758, X86_INS_VCVTSD2USI = 759, X86_INS_VCVTSS2SI = 760, X86_INS_VCVTSS2USI = 761, X86_INS_VCVTTPD2DQX = 762, X86_INS_VCVTTPD2DQ = 763, X86_INS_VCVTTPD2UDQ = 764, X86_INS_VCVTTPS2DQ = 765, X86_INS_VCVTTPS2UDQ = 766, X86_INS_VCVTUDQ2PD = 767, X86_INS_VCVTUDQ2PS = 768, X86_INS_VDIVPD = 769, X86_INS_VDIVPS = 770, X86_INS_VDIVSD = 771, X86_INS_VDIVSS = 772, X86_INS_VDPPD = 773, X86_INS_VDPPS = 774, X86_INS_VERR = 775, X86_INS_VERW = 776, X86_INS_VEXP2PD = 777, X86_INS_VEXP2PS = 778, X86_INS_VEXPANDPD = 779, X86_INS_VEXPANDPS = 780, X86_INS_VEXTRACTF128 = 781, X86_INS_VEXTRACTF32X4 = 782, X86_INS_VEXTRACTF64X4 = 783, X86_INS_VEXTRACTI128 = 784, X86_INS_VEXTRACTI32X4 = 785, X86_INS_VEXTRACTI64X4 = 786, X86_INS_VEXTRACTPS = 787, X86_INS_VFMADD132PD = 788, X86_INS_VFMADD132PS = 789, X86_INS_VFMADDPD = 790, X86_INS_VFMADD213PD = 791, X86_INS_VFMADD231PD = 792, X86_INS_VFMADDPS = 793, X86_INS_VFMADD213PS = 794, X86_INS_VFMADD231PS = 795, X86_INS_VFMADDSD = 796, X86_INS_VFMADD213SD = 797, X86_INS_VFMADD132SD = 798, X86_INS_VFMADD231SD = 799, X86_INS_VFMADDSS = 800, X86_INS_VFMADD213SS = 801, X86_INS_VFMADD132SS = 802, X86_INS_VFMADD231SS = 803, X86_INS_VFMADDSUB132PD = 804, X86_INS_VFMADDSUB132PS = 805, X86_INS_VFMADDSUBPD = 806, X86_INS_VFMADDSUB213PD = 807, X86_INS_VFMADDSUB231PD = 808, X86_INS_VFMADDSUBPS = 809, X86_INS_VFMADDSUB213PS = 810, X86_INS_VFMADDSUB231PS = 811, X86_INS_VFMSUB132PD = 812, X86_INS_VFMSUB132PS = 813, X86_INS_VFMSUBADD132PD = 814, X86_INS_VFMSUBADD132PS = 815, X86_INS_VFMSUBADDPD = 816, X86_INS_VFMSUBADD213PD = 817, X86_INS_VFMSUBADD231PD = 818, X86_INS_VFMSUBADDPS = 819, X86_INS_VFMSUBADD213PS = 820, X86_INS_VFMSUBADD231PS = 821, X86_INS_VFMSUBPD = 822, X86_INS_VFMSUB213PD = 823, X86_INS_VFMSUB231PD = 824, X86_INS_VFMSUBPS = 825, X86_INS_VFMSUB213PS = 826, X86_INS_VFMSUB231PS = 827, X86_INS_VFMSUBSD = 828, X86_INS_VFMSUB213SD = 829, X86_INS_VFMSUB132SD = 830, X86_INS_VFMSUB231SD = 831, X86_INS_VFMSUBSS = 832, X86_INS_VFMSUB213SS = 833, X86_INS_VFMSUB132SS = 834, X86_INS_VFMSUB231SS = 835, X86_INS_VFNMADD132PD = 836, X86_INS_VFNMADD132PS = 837, X86_INS_VFNMADDPD = 838, X86_INS_VFNMADD213PD = 839, X86_INS_VFNMADD231PD = 840, X86_INS_VFNMADDPS = 841, X86_INS_VFNMADD213PS = 842, X86_INS_VFNMADD231PS = 843, X86_INS_VFNMADDSD = 844, X86_INS_VFNMADD213SD = 845, X86_INS_VFNMADD132SD = 846, X86_INS_VFNMADD231SD = 847, X86_INS_VFNMADDSS = 848, X86_INS_VFNMADD213SS = 849, X86_INS_VFNMADD132SS = 850, X86_INS_VFNMADD231SS = 851, X86_INS_VFNMSUB132PD = 852, X86_INS_VFNMSUB132PS = 853, X86_INS_VFNMSUBPD = 854, X86_INS_VFNMSUB213PD = 855, X86_INS_VFNMSUB231PD = 856, X86_INS_VFNMSUBPS = 857, X86_INS_VFNMSUB213PS = 858, X86_INS_VFNMSUB231PS = 859, X86_INS_VFNMSUBSD = 860, X86_INS_VFNMSUB213SD = 861, X86_INS_VFNMSUB132SD = 862, X86_INS_VFNMSUB231SD = 863, X86_INS_VFNMSUBSS = 864, X86_INS_VFNMSUB213SS = 865, X86_INS_VFNMSUB132SS = 866, X86_INS_VFNMSUB231SS = 867, X86_INS_VFRCZPD = 868, X86_INS_VFRCZPS = 869, X86_INS_VFRCZSD = 870, X86_INS_VFRCZSS = 871, X86_INS_VORPD = 872, X86_INS_VORPS = 873, X86_INS_VXORPD = 874, X86_INS_VXORPS = 875, X86_INS_VGATHERDPD = 876, X86_INS_VGATHERDPS = 877, X86_INS_VGATHERPF0DPD = 878, X86_INS_VGATHERPF0DPS = 879, X86_INS_VGATHERPF0QPD = 880, X86_INS_VGATHERPF0QPS = 881, X86_INS_VGATHERPF1DPD = 882, X86_INS_VGATHERPF1DPS = 883, X86_INS_VGATHERPF1QPD = 884, X86_INS_VGATHERPF1QPS = 885, X86_INS_VGATHERQPD = 886, X86_INS_VGATHERQPS = 887, X86_INS_VHADDPD = 888, X86_INS_VHADDPS = 889, X86_INS_VHSUBPD = 890, X86_INS_VHSUBPS = 891, X86_INS_VINSERTF128 = 892, X86_INS_VINSERTF32X4 = 893, X86_INS_VINSERTF32X8 = 894, X86_INS_VINSERTF64X2 = 895, X86_INS_VINSERTF64X4 = 896, X86_INS_VINSERTI128 = 897, X86_INS_VINSERTI32X4 = 898, X86_INS_VINSERTI32X8 = 899, X86_INS_VINSERTI64X2 = 900, X86_INS_VINSERTI64X4 = 901, X86_INS_VINSERTPS = 902, X86_INS_VLDDQU = 903, X86_INS_VLDMXCSR = 904, X86_INS_VMASKMOVDQU = 905, X86_INS_VMASKMOVPD = 906, X86_INS_VMASKMOVPS = 907, X86_INS_VMAXPD = 908, X86_INS_VMAXPS = 909, X86_INS_VMAXSD = 910, X86_INS_VMAXSS = 911, X86_INS_VMCALL = 912, X86_INS_VMCLEAR = 913, X86_INS_VMFUNC = 914, X86_INS_VMINPD = 915, X86_INS_VMINPS = 916, X86_INS_VMINSD = 917, X86_INS_VMINSS = 918, X86_INS_VMLAUNCH = 919, X86_INS_VMLOAD = 920, X86_INS_VMMCALL = 921, X86_INS_VMOVQ = 922, X86_INS_VMOVDDUP = 923, X86_INS_VMOVD = 924, X86_INS_VMOVDQA32 = 925, X86_INS_VMOVDQA64 = 926, X86_INS_VMOVDQA = 927, X86_INS_VMOVDQU16 = 928, X86_INS_VMOVDQU32 = 929, X86_INS_VMOVDQU64 = 930, X86_INS_VMOVDQU8 = 931, X86_INS_VMOVDQU = 932, X86_INS_VMOVHLPS = 933, X86_INS_VMOVHPD = 934, X86_INS_VMOVHPS = 935, X86_INS_VMOVLHPS = 936, X86_INS_VMOVLPD = 937, X86_INS_VMOVLPS = 938, X86_INS_VMOVMSKPD = 939, X86_INS_VMOVMSKPS = 940, X86_INS_VMOVNTDQA = 941, X86_INS_VMOVNTDQ = 942, X86_INS_VMOVNTPD = 943, X86_INS_VMOVNTPS = 944, X86_INS_VMOVSD = 945, X86_INS_VMOVSHDUP = 946, X86_INS_VMOVSLDUP = 947, X86_INS_VMOVSS = 948, X86_INS_VMOVUPD = 949, X86_INS_VMOVUPS = 950, X86_INS_VMPSADBW = 951, X86_INS_VMPTRLD = 952, X86_INS_VMPTRST = 953, X86_INS_VMREAD = 954, X86_INS_VMRESUME = 955, X86_INS_VMRUN = 956, X86_INS_VMSAVE = 957, X86_INS_VMULPD = 958, X86_INS_VMULPS = 959, X86_INS_VMULSD = 960, X86_INS_VMULSS = 961, X86_INS_VMWRITE = 962, X86_INS_VMXOFF = 963, X86_INS_VMXON = 964, X86_INS_VPABSB = 965, X86_INS_VPABSD = 966, X86_INS_VPABSQ = 967, X86_INS_VPABSW = 968, X86_INS_VPACKSSDW = 969, X86_INS_VPACKSSWB = 970, X86_INS_VPACKUSDW = 971, X86_INS_VPACKUSWB = 972, X86_INS_VPADDB = 973, X86_INS_VPADDD = 974, X86_INS_VPADDQ = 975, X86_INS_VPADDSB = 976, X86_INS_VPADDSW = 977, X86_INS_VPADDUSB = 978, X86_INS_VPADDUSW = 979, X86_INS_VPADDW = 980, X86_INS_VPALIGNR = 981, X86_INS_VPANDD = 982, X86_INS_VPANDND = 983, X86_INS_VPANDNQ = 984, X86_INS_VPANDN = 985, X86_INS_VPANDQ = 986, X86_INS_VPAND = 987, X86_INS_VPAVGB = 988, X86_INS_VPAVGW = 989, X86_INS_VPBLENDD = 990, X86_INS_VPBLENDMB = 991, X86_INS_VPBLENDMD = 992, X86_INS_VPBLENDMQ = 993, X86_INS_VPBLENDMW = 994, X86_INS_VPBLENDVB = 995, X86_INS_VPBLENDW = 996, X86_INS_VPBROADCASTB = 997, X86_INS_VPBROADCASTD = 998, X86_INS_VPBROADCASTMB2Q = 999, X86_INS_VPBROADCASTMW2D = 1000, X86_INS_VPBROADCASTQ = 1001, X86_INS_VPBROADCASTW = 1002, X86_INS_VPCLMULQDQ = 1003, X86_INS_VPCMOV = 1004, X86_INS_VPCMPB = 1005, X86_INS_VPCMPD = 1006, X86_INS_VPCMPEQB = 1007, X86_INS_VPCMPEQD = 1008, X86_INS_VPCMPEQQ = 1009, X86_INS_VPCMPEQW = 1010, X86_INS_VPCMPESTRI = 1011, X86_INS_VPCMPESTRM = 1012, X86_INS_VPCMPGTB = 1013, X86_INS_VPCMPGTD = 1014, X86_INS_VPCMPGTQ = 1015, X86_INS_VPCMPGTW = 1016, X86_INS_VPCMPISTRI = 1017, X86_INS_VPCMPISTRM = 1018, X86_INS_VPCMPQ = 1019, X86_INS_VPCMPUB = 1020, X86_INS_VPCMPUD = 1021, X86_INS_VPCMPUQ = 1022, X86_INS_VPCMPUW = 1023, X86_INS_VPCMPW = 1024, X86_INS_VPCOMB = 1025, X86_INS_VPCOMD = 1026, X86_INS_VPCOMPRESSD = 1027, X86_INS_VPCOMPRESSQ = 1028, X86_INS_VPCOMQ = 1029, X86_INS_VPCOMUB = 1030, X86_INS_VPCOMUD = 1031, X86_INS_VPCOMUQ = 1032, X86_INS_VPCOMUW = 1033, X86_INS_VPCOMW = 1034, X86_INS_VPCONFLICTD = 1035, X86_INS_VPCONFLICTQ = 1036, X86_INS_VPERM2F128 = 1037, X86_INS_VPERM2I128 = 1038, X86_INS_VPERMD = 1039, X86_INS_VPERMI2D = 1040, X86_INS_VPERMI2PD = 1041, X86_INS_VPERMI2PS = 1042, X86_INS_VPERMI2Q = 1043, X86_INS_VPERMIL2PD = 1044, X86_INS_VPERMIL2PS = 1045, X86_INS_VPERMILPD = 1046, X86_INS_VPERMILPS = 1047, X86_INS_VPERMPD = 1048, X86_INS_VPERMPS = 1049, X86_INS_VPERMQ = 1050, X86_INS_VPERMT2D = 1051, X86_INS_VPERMT2PD = 1052, X86_INS_VPERMT2PS = 1053, X86_INS_VPERMT2Q = 1054, X86_INS_VPEXPANDD = 1055, X86_INS_VPEXPANDQ = 1056, X86_INS_VPEXTRB = 1057, X86_INS_VPEXTRD = 1058, X86_INS_VPEXTRQ = 1059, X86_INS_VPEXTRW = 1060, X86_INS_VPGATHERDD = 1061, X86_INS_VPGATHERDQ = 1062, X86_INS_VPGATHERQD = 1063, X86_INS_VPGATHERQQ = 1064, X86_INS_VPHADDBD = 1065, X86_INS_VPHADDBQ = 1066, X86_INS_VPHADDBW = 1067, X86_INS_VPHADDDQ = 1068, X86_INS_VPHADDD = 1069, X86_INS_VPHADDSW = 1070, X86_INS_VPHADDUBD = 1071, X86_INS_VPHADDUBQ = 1072, X86_INS_VPHADDUBW = 1073, X86_INS_VPHADDUDQ = 1074, X86_INS_VPHADDUWD = 1075, X86_INS_VPHADDUWQ = 1076, X86_INS_VPHADDWD = 1077, X86_INS_VPHADDWQ = 1078, X86_INS_VPHADDW = 1079, X86_INS_VPHMINPOSUW = 1080, X86_INS_VPHSUBBW = 1081, X86_INS_VPHSUBDQ = 1082, X86_INS_VPHSUBD = 1083, X86_INS_VPHSUBSW = 1084, X86_INS_VPHSUBWD = 1085, X86_INS_VPHSUBW = 1086, X86_INS_VPINSRB = 1087, X86_INS_VPINSRD = 1088, X86_INS_VPINSRQ = 1089, X86_INS_VPINSRW = 1090, X86_INS_VPLZCNTD = 1091, X86_INS_VPLZCNTQ = 1092, X86_INS_VPMACSDD = 1093, X86_INS_VPMACSDQH = 1094, X86_INS_VPMACSDQL = 1095, X86_INS_VPMACSSDD = 1096, X86_INS_VPMACSSDQH = 1097, X86_INS_VPMACSSDQL = 1098, X86_INS_VPMACSSWD = 1099, X86_INS_VPMACSSWW = 1100, X86_INS_VPMACSWD = 1101, X86_INS_VPMACSWW = 1102, X86_INS_VPMADCSSWD = 1103, X86_INS_VPMADCSWD = 1104, X86_INS_VPMADDUBSW = 1105, X86_INS_VPMADDWD = 1106, X86_INS_VPMASKMOVD = 1107, X86_INS_VPMASKMOVQ = 1108, X86_INS_VPMAXSB = 1109, X86_INS_VPMAXSD = 1110, X86_INS_VPMAXSQ = 1111, X86_INS_VPMAXSW = 1112, X86_INS_VPMAXUB = 1113, X86_INS_VPMAXUD = 1114, X86_INS_VPMAXUQ = 1115, X86_INS_VPMAXUW = 1116, X86_INS_VPMINSB = 1117, X86_INS_VPMINSD = 1118, X86_INS_VPMINSQ = 1119, X86_INS_VPMINSW = 1120, X86_INS_VPMINUB = 1121, X86_INS_VPMINUD = 1122, X86_INS_VPMINUQ = 1123, X86_INS_VPMINUW = 1124, X86_INS_VPMOVDB = 1125, X86_INS_VPMOVDW = 1126, X86_INS_VPMOVM2B = 1127, X86_INS_VPMOVM2D = 1128, X86_INS_VPMOVM2Q = 1129, X86_INS_VPMOVM2W = 1130, X86_INS_VPMOVMSKB = 1131, X86_INS_VPMOVQB = 1132, X86_INS_VPMOVQD = 1133, X86_INS_VPMOVQW = 1134, X86_INS_VPMOVSDB = 1135, X86_INS_VPMOVSDW = 1136, X86_INS_VPMOVSQB = 1137, X86_INS_VPMOVSQD = 1138, X86_INS_VPMOVSQW = 1139, X86_INS_VPMOVSXBD = 1140, X86_INS_VPMOVSXBQ = 1141, X86_INS_VPMOVSXBW = 1142, X86_INS_VPMOVSXDQ = 1143, X86_INS_VPMOVSXWD = 1144, X86_INS_VPMOVSXWQ = 1145, X86_INS_VPMOVUSDB = 1146, X86_INS_VPMOVUSDW = 1147, X86_INS_VPMOVUSQB = 1148, X86_INS_VPMOVUSQD = 1149, X86_INS_VPMOVUSQW = 1150, X86_INS_VPMOVZXBD = 1151, X86_INS_VPMOVZXBQ = 1152, X86_INS_VPMOVZXBW = 1153, X86_INS_VPMOVZXDQ = 1154, X86_INS_VPMOVZXWD = 1155, X86_INS_VPMOVZXWQ = 1156, X86_INS_VPMULDQ = 1157, X86_INS_VPMULHRSW = 1158, X86_INS_VPMULHUW = 1159, X86_INS_VPMULHW = 1160, X86_INS_VPMULLD = 1161, X86_INS_VPMULLQ = 1162, X86_INS_VPMULLW = 1163, X86_INS_VPMULUDQ = 1164, X86_INS_VPORD = 1165, X86_INS_VPORQ = 1166, X86_INS_VPOR = 1167, X86_INS_VPPERM = 1168, X86_INS_VPROTB = 1169, X86_INS_VPROTD = 1170, X86_INS_VPROTQ = 1171, X86_INS_VPROTW = 1172, X86_INS_VPSADBW = 1173, X86_INS_VPSCATTERDD = 1174, X86_INS_VPSCATTERDQ = 1175, X86_INS_VPSCATTERQD = 1176, X86_INS_VPSCATTERQQ = 1177, X86_INS_VPSHAB = 1178, X86_INS_VPSHAD = 1179, X86_INS_VPSHAQ = 1180, X86_INS_VPSHAW = 1181, X86_INS_VPSHLB = 1182, X86_INS_VPSHLD = 1183, X86_INS_VPSHLQ = 1184, X86_INS_VPSHLW = 1185, X86_INS_VPSHUFB = 1186, X86_INS_VPSHUFD = 1187, X86_INS_VPSHUFHW = 1188, X86_INS_VPSHUFLW = 1189, X86_INS_VPSIGNB = 1190, X86_INS_VPSIGND = 1191, X86_INS_VPSIGNW = 1192, X86_INS_VPSLLDQ = 1193, X86_INS_VPSLLD = 1194, X86_INS_VPSLLQ = 1195, X86_INS_VPSLLVD = 1196, X86_INS_VPSLLVQ = 1197, X86_INS_VPSLLW = 1198, X86_INS_VPSRAD = 1199, X86_INS_VPSRAQ = 1200, X86_INS_VPSRAVD = 1201, X86_INS_VPSRAVQ = 1202, X86_INS_VPSRAW = 1203, X86_INS_VPSRLDQ = 1204, X86_INS_VPSRLD = 1205, X86_INS_VPSRLQ = 1206, X86_INS_VPSRLVD = 1207, X86_INS_VPSRLVQ = 1208, X86_INS_VPSRLW = 1209, X86_INS_VPSUBB = 1210, X86_INS_VPSUBD = 1211, X86_INS_VPSUBQ = 1212, X86_INS_VPSUBSB = 1213, X86_INS_VPSUBSW = 1214, X86_INS_VPSUBUSB = 1215, X86_INS_VPSUBUSW = 1216, X86_INS_VPSUBW = 1217, X86_INS_VPTESTMD = 1218, X86_INS_VPTESTMQ = 1219, X86_INS_VPTESTNMD = 1220, X86_INS_VPTESTNMQ = 1221, X86_INS_VPTEST = 1222, X86_INS_VPUNPCKHBW = 1223, X86_INS_VPUNPCKHDQ = 1224, X86_INS_VPUNPCKHQDQ = 1225, X86_INS_VPUNPCKHWD = 1226, X86_INS_VPUNPCKLBW = 1227, X86_INS_VPUNPCKLDQ = 1228, X86_INS_VPUNPCKLQDQ = 1229, X86_INS_VPUNPCKLWD = 1230, X86_INS_VPXORD = 1231, X86_INS_VPXORQ = 1232, X86_INS_VPXOR = 1233, X86_INS_VRCP14PD = 1234, X86_INS_VRCP14PS = 1235, X86_INS_VRCP14SD = 1236, X86_INS_VRCP14SS = 1237, X86_INS_VRCP28PD = 1238, X86_INS_VRCP28PS = 1239, X86_INS_VRCP28SD = 1240, X86_INS_VRCP28SS = 1241, X86_INS_VRCPPS = 1242, X86_INS_VRCPSS = 1243, X86_INS_VRNDSCALEPD = 1244, X86_INS_VRNDSCALEPS = 1245, X86_INS_VRNDSCALESD = 1246, X86_INS_VRNDSCALESS = 1247, X86_INS_VROUNDPD = 1248, X86_INS_VROUNDPS = 1249, X86_INS_VROUNDSD = 1250, X86_INS_VROUNDSS = 1251, X86_INS_VRSQRT14PD = 1252, X86_INS_VRSQRT14PS = 1253, X86_INS_VRSQRT14SD = 1254, X86_INS_VRSQRT14SS = 1255, X86_INS_VRSQRT28PD = 1256, X86_INS_VRSQRT28PS = 1257, X86_INS_VRSQRT28SD = 1258, X86_INS_VRSQRT28SS = 1259, X86_INS_VRSQRTPS = 1260, X86_INS_VRSQRTSS = 1261, X86_INS_VSCATTERDPD = 1262, X86_INS_VSCATTERDPS = 1263, X86_INS_VSCATTERPF0DPD = 1264, X86_INS_VSCATTERPF0DPS = 1265, X86_INS_VSCATTERPF0QPD = 1266, X86_INS_VSCATTERPF0QPS = 1267, X86_INS_VSCATTERPF1DPD = 1268, X86_INS_VSCATTERPF1DPS = 1269, X86_INS_VSCATTERPF1QPD = 1270, X86_INS_VSCATTERPF1QPS = 1271, X86_INS_VSCATTERQPD = 1272, X86_INS_VSCATTERQPS = 1273, X86_INS_VSHUFPD = 1274, X86_INS_VSHUFPS = 1275, X86_INS_VSQRTPD = 1276, X86_INS_VSQRTPS = 1277, X86_INS_VSQRTSD = 1278, X86_INS_VSQRTSS = 1279, X86_INS_VSTMXCSR = 1280, X86_INS_VSUBPD = 1281, X86_INS_VSUBPS = 1282, X86_INS_VSUBSD = 1283, X86_INS_VSUBSS = 1284, X86_INS_VTESTPD = 1285, X86_INS_VTESTPS = 1286, X86_INS_VUNPCKHPD = 1287, X86_INS_VUNPCKHPS = 1288, X86_INS_VUNPCKLPD = 1289, X86_INS_VUNPCKLPS = 1290, X86_INS_VZEROALL = 1291, X86_INS_VZEROUPPER = 1292, X86_INS_WAIT = 1293, X86_INS_WBINVD = 1294, X86_INS_WRFSBASE = 1295, X86_INS_WRGSBASE = 1296, X86_INS_WRMSR = 1297, X86_INS_XABORT = 1298, X86_INS_XACQUIRE = 1299, X86_INS_XBEGIN = 1300, X86_INS_XCHG = 1301, X86_INS_XCRYPTCBC = 1302, X86_INS_XCRYPTCFB = 1303, X86_INS_XCRYPTCTR = 1304, X86_INS_XCRYPTECB = 1305, X86_INS_XCRYPTOFB = 1306, X86_INS_XEND = 1307, X86_INS_XGETBV = 1308, X86_INS_XLATB = 1309, X86_INS_XRELEASE = 1310, X86_INS_XRSTOR = 1311, X86_INS_XRSTOR64 = 1312, X86_INS_XRSTORS = 1313, X86_INS_XRSTORS64 = 1314, X86_INS_XSAVE = 1315, X86_INS_XSAVE64 = 1316, X86_INS_XSAVEC = 1317, X86_INS_XSAVEC64 = 1318, X86_INS_XSAVEOPT = 1319, X86_INS_XSAVEOPT64 = 1320, X86_INS_XSAVES = 1321, X86_INS_XSAVES64 = 1322, X86_INS_XSETBV = 1323, X86_INS_XSHA1 = 1324, X86_INS_XSHA256 = 1325, X86_INS_XSTORE = 1326, X86_INS_XTEST = 1327, X86_INS_FDISI8087_NOP = 1328, X86_INS_FENI8087_NOP = 1329, X86_INS_CMPSS = 1330, X86_INS_CMPEQSS = 1331, X86_INS_CMPLTSS = 1332, X86_INS_CMPLESS = 1333, X86_INS_CMPUNORDSS = 1334, X86_INS_CMPNEQSS = 1335, X86_INS_CMPNLTSS = 1336, X86_INS_CMPNLESS = 1337, X86_INS_CMPORDSS = 1338, X86_INS_CMPSD = 1339, X86_INS_CMPEQSD = 1340, X86_INS_CMPLTSD = 1341, X86_INS_CMPLESD = 1342, X86_INS_CMPUNORDSD = 1343, X86_INS_CMPNEQSD = 1344, X86_INS_CMPNLTSD = 1345, X86_INS_CMPNLESD = 1346, X86_INS_CMPORDSD = 1347, X86_INS_CMPPS = 1348, X86_INS_CMPEQPS = 1349, X86_INS_CMPLTPS = 1350, X86_INS_CMPLEPS = 1351, X86_INS_CMPUNORDPS = 1352, X86_INS_CMPNEQPS = 1353, X86_INS_CMPNLTPS = 1354, X86_INS_CMPNLEPS = 1355, X86_INS_CMPORDPS = 1356, X86_INS_CMPPD = 1357, X86_INS_CMPEQPD = 1358, X86_INS_CMPLTPD = 1359, X86_INS_CMPLEPD = 1360, X86_INS_CMPUNORDPD = 1361, X86_INS_CMPNEQPD = 1362, X86_INS_CMPNLTPD = 1363, X86_INS_CMPNLEPD = 1364, X86_INS_CMPORDPD = 1365, X86_INS_VCMPSS = 1366, X86_INS_VCMPEQSS = 1367, X86_INS_VCMPLTSS = 1368, X86_INS_VCMPLESS = 1369, X86_INS_VCMPUNORDSS = 1370, X86_INS_VCMPNEQSS = 1371, X86_INS_VCMPNLTSS = 1372, X86_INS_VCMPNLESS = 1373, X86_INS_VCMPORDSS = 1374, X86_INS_VCMPEQ_UQSS = 1375, X86_INS_VCMPNGESS = 1376, X86_INS_VCMPNGTSS = 1377, X86_INS_VCMPFALSESS = 1378, X86_INS_VCMPNEQ_OQSS = 1379, X86_INS_VCMPGESS = 1380, X86_INS_VCMPGTSS = 1381, X86_INS_VCMPTRUESS = 1382, X86_INS_VCMPEQ_OSSS = 1383, X86_INS_VCMPLT_OQSS = 1384, X86_INS_VCMPLE_OQSS = 1385, X86_INS_VCMPUNORD_SSS = 1386, X86_INS_VCMPNEQ_USSS = 1387, X86_INS_VCMPNLT_UQSS = 1388, X86_INS_VCMPNLE_UQSS = 1389, X86_INS_VCMPORD_SSS = 1390, X86_INS_VCMPEQ_USSS = 1391, X86_INS_VCMPNGE_UQSS = 1392, X86_INS_VCMPNGT_UQSS = 1393, X86_INS_VCMPFALSE_OSSS = 1394, X86_INS_VCMPNEQ_OSSS = 1395, X86_INS_VCMPGE_OQSS = 1396, X86_INS_VCMPGT_OQSS = 1397, X86_INS_VCMPTRUE_USSS = 1398, X86_INS_VCMPSD = 1399, X86_INS_VCMPEQSD = 1400, X86_INS_VCMPLTSD = 1401, X86_INS_VCMPLESD = 1402, X86_INS_VCMPUNORDSD = 1403, X86_INS_VCMPNEQSD = 1404, X86_INS_VCMPNLTSD = 1405, X86_INS_VCMPNLESD = 1406, X86_INS_VCMPORDSD = 1407, X86_INS_VCMPEQ_UQSD = 1408, X86_INS_VCMPNGESD = 1409, X86_INS_VCMPNGTSD = 1410, X86_INS_VCMPFALSESD = 1411, X86_INS_VCMPNEQ_OQSD = 1412, X86_INS_VCMPGESD = 1413, X86_INS_VCMPGTSD = 1414, X86_INS_VCMPTRUESD = 1415, X86_INS_VCMPEQ_OSSD = 1416, X86_INS_VCMPLT_OQSD = 1417, X86_INS_VCMPLE_OQSD = 1418, X86_INS_VCMPUNORD_SSD = 1419, X86_INS_VCMPNEQ_USSD = 1420, X86_INS_VCMPNLT_UQSD = 1421, X86_INS_VCMPNLE_UQSD = 1422, X86_INS_VCMPORD_SSD = 1423, X86_INS_VCMPEQ_USSD = 1424, X86_INS_VCMPNGE_UQSD = 1425, X86_INS_VCMPNGT_UQSD = 1426, X86_INS_VCMPFALSE_OSSD = 1427, X86_INS_VCMPNEQ_OSSD = 1428, X86_INS_VCMPGE_OQSD = 1429, X86_INS_VCMPGT_OQSD = 1430, X86_INS_VCMPTRUE_USSD = 1431, X86_INS_VCMPPS = 1432, X86_INS_VCMPEQPS = 1433, X86_INS_VCMPLTPS = 1434, X86_INS_VCMPLEPS = 1435, X86_INS_VCMPUNORDPS = 1436, X86_INS_VCMPNEQPS = 1437, X86_INS_VCMPNLTPS = 1438, X86_INS_VCMPNLEPS = 1439, X86_INS_VCMPORDPS = 1440, X86_INS_VCMPEQ_UQPS = 1441, X86_INS_VCMPNGEPS = 1442, X86_INS_VCMPNGTPS = 1443, X86_INS_VCMPFALSEPS = 1444, X86_INS_VCMPNEQ_OQPS = 1445, X86_INS_VCMPGEPS = 1446, X86_INS_VCMPGTPS = 1447, X86_INS_VCMPTRUEPS = 1448, X86_INS_VCMPEQ_OSPS = 1449, X86_INS_VCMPLT_OQPS = 1450, X86_INS_VCMPLE_OQPS = 1451, X86_INS_VCMPUNORD_SPS = 1452, X86_INS_VCMPNEQ_USPS = 1453, X86_INS_VCMPNLT_UQPS = 1454, X86_INS_VCMPNLE_UQPS = 1455, X86_INS_VCMPORD_SPS = 1456, X86_INS_VCMPEQ_USPS = 1457, X86_INS_VCMPNGE_UQPS = 1458, X86_INS_VCMPNGT_UQPS = 1459, X86_INS_VCMPFALSE_OSPS = 1460, X86_INS_VCMPNEQ_OSPS = 1461, X86_INS_VCMPGE_OQPS = 1462, X86_INS_VCMPGT_OQPS = 1463, X86_INS_VCMPTRUE_USPS = 1464, X86_INS_VCMPPD = 1465, X86_INS_VCMPEQPD = 1466, X86_INS_VCMPLTPD = 1467, X86_INS_VCMPLEPD = 1468, X86_INS_VCMPUNORDPD = 1469, X86_INS_VCMPNEQPD = 1470, X86_INS_VCMPNLTPD = 1471, X86_INS_VCMPNLEPD = 1472, X86_INS_VCMPORDPD = 1473, X86_INS_VCMPEQ_UQPD = 1474, X86_INS_VCMPNGEPD = 1475, X86_INS_VCMPNGTPD = 1476, X86_INS_VCMPFALSEPD = 1477, X86_INS_VCMPNEQ_OQPD = 1478, X86_INS_VCMPGEPD = 1479, X86_INS_VCMPGTPD = 1480, X86_INS_VCMPTRUEPD = 1481, X86_INS_VCMPEQ_OSPD = 1482, X86_INS_VCMPLT_OQPD = 1483, X86_INS_VCMPLE_OQPD = 1484, X86_INS_VCMPUNORD_SPD = 1485, X86_INS_VCMPNEQ_USPD = 1486, X86_INS_VCMPNLT_UQPD = 1487, X86_INS_VCMPNLE_UQPD = 1488, X86_INS_VCMPORD_SPD = 1489, X86_INS_VCMPEQ_USPD = 1490, X86_INS_VCMPNGE_UQPD = 1491, X86_INS_VCMPNGT_UQPD = 1492, X86_INS_VCMPFALSE_OSPD = 1493, X86_INS_VCMPNEQ_OSPD = 1494, X86_INS_VCMPGE_OQPD = 1495, X86_INS_VCMPGT_OQPD = 1496, X86_INS_VCMPTRUE_USPD = 1497, X86_INS_UD0 = 1498, X86_INS_ENDBR32 = 1499, X86_INS_ENDBR64 = 1500, X86_INS_ENDING = 1501, } pub mod x86_insn_group { #[doc = " Group of X86 instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const X86_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const X86_GRP_JUMP: Type = 1; #[doc = "< = CS_GRP_CALL"] pub const X86_GRP_CALL: Type = 2; #[doc = "< = CS_GRP_RET"] pub const X86_GRP_RET: Type = 3; #[doc = "< = CS_GRP_INT"] pub const X86_GRP_INT: Type = 4; #[doc = "< = CS_GRP_IRET"] pub const X86_GRP_IRET: Type = 5; #[doc = "< = CS_GRP_PRIVILEGE"] pub const X86_GRP_PRIVILEGE: Type = 6; #[doc = "< = CS_GRP_BRANCH_RELATIVE"] pub const X86_GRP_BRANCH_RELATIVE: Type = 7; #[doc = "< all virtualization instructions (VT-x + AMD-V)"] pub const X86_GRP_VM: Type = 128; pub const X86_GRP_3DNOW: Type = 129; pub const X86_GRP_AES: Type = 130; pub const X86_GRP_ADX: Type = 131; pub const X86_GRP_AVX: Type = 132; pub const X86_GRP_AVX2: Type = 133; pub const X86_GRP_AVX512: Type = 134; pub const X86_GRP_BMI: Type = 135; pub const X86_GRP_BMI2: Type = 136; pub const X86_GRP_CMOV: Type = 137; pub const X86_GRP_F16C: Type = 138; pub const X86_GRP_FMA: Type = 139; pub const X86_GRP_FMA4: Type = 140; pub const X86_GRP_FSGSBASE: Type = 141; pub const X86_GRP_HLE: Type = 142; pub const X86_GRP_MMX: Type = 143; pub const X86_GRP_MODE32: Type = 144; pub const X86_GRP_MODE64: Type = 145; pub const X86_GRP_RTM: Type = 146; pub const X86_GRP_SHA: Type = 147; pub const X86_GRP_SSE1: Type = 148; pub const X86_GRP_SSE2: Type = 149; pub const X86_GRP_SSE3: Type = 150; pub const X86_GRP_SSE41: Type = 151; pub const X86_GRP_SSE42: Type = 152; pub const X86_GRP_SSE4A: Type = 153; pub const X86_GRP_SSSE3: Type = 154; pub const X86_GRP_PCLMUL: Type = 155; pub const X86_GRP_XOP: Type = 156; pub const X86_GRP_CDI: Type = 157; pub const X86_GRP_ERI: Type = 158; pub const X86_GRP_TBM: Type = 159; pub const X86_GRP_16BITMODE: Type = 160; pub const X86_GRP_NOT64BITMODE: Type = 161; pub const X86_GRP_SGX: Type = 162; pub const X86_GRP_DQI: Type = 163; pub const X86_GRP_BWI: Type = 164; pub const X86_GRP_PFI: Type = 165; pub const X86_GRP_VLX: Type = 166; pub const X86_GRP_SMAP: Type = 167; pub const X86_GRP_NOVLX: Type = 168; pub const X86_GRP_FPU: Type = 169; pub const X86_GRP_ENDING: Type = 170; } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum xcore_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] XCORE_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] XCORE_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] XCORE_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] XCORE_OP_MEM = 3, } pub mod xcore_reg { #[doc = " XCore registers"] pub type Type = u32; pub const XCORE_REG_INVALID: Type = 0; pub const XCORE_REG_CP: Type = 1; pub const XCORE_REG_DP: Type = 2; pub const XCORE_REG_LR: Type = 3; pub const XCORE_REG_SP: Type = 4; pub const XCORE_REG_R0: Type = 5; pub const XCORE_REG_R1: Type = 6; pub const XCORE_REG_R2: Type = 7; pub const XCORE_REG_R3: Type = 8; pub const XCORE_REG_R4: Type = 9; pub const XCORE_REG_R5: Type = 10; pub const XCORE_REG_R6: Type = 11; pub const XCORE_REG_R7: Type = 12; pub const XCORE_REG_R8: Type = 13; pub const XCORE_REG_R9: Type = 14; pub const XCORE_REG_R10: Type = 15; pub const XCORE_REG_R11: Type = 16; #[doc = "< pc"] pub const XCORE_REG_PC: Type = 17; #[doc = "< save pc"] pub const XCORE_REG_SCP: Type = 18; pub const XCORE_REG_SSR: Type = 19; pub const XCORE_REG_ET: Type = 20; pub const XCORE_REG_ED: Type = 21; pub const XCORE_REG_SED: Type = 22; pub const XCORE_REG_KEP: Type = 23; pub const XCORE_REG_KSP: Type = 24; pub const XCORE_REG_ID: Type = 25; pub const XCORE_REG_ENDING: Type = 26; } #[doc = " Instruction's operand referring to memory"] #[doc = " This is associated with XCORE_OP_MEM operand type above"] #[repr(C)] #[derive(Debug, Copy)] pub struct xcore_op_mem { #[doc = "< base register, can be safely interpreted as"] #[doc = "< a value of type `xcore_reg`, but it is only"] #[doc = "< one byte wide"] pub base: u8, #[doc = "< index register, same conditions apply here"] pub index: u8, #[doc = "< displacement/offset value"] pub disp: i32, #[doc = "< +1: forward, -1: backward"] pub direct: libc::c_int, } impl Clone for xcore_op_mem { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_xcore_op { #[doc = "< operand type"] pub type_: xcore_op_type, pub __bindgen_anon_1: cs_xcore_op__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union cs_xcore_op__bindgen_ty_1 { #[doc = "< register value for REG operand"] pub reg: xcore_reg::Type, #[doc = "< immediate value for IMM operand"] pub imm: i32, #[doc = "< base/disp value for MEM operand"] pub mem: xcore_op_mem, _bindgen_union_align: [u32; 3usize], } impl Clone for cs_xcore_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_xcore_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_xcore_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_xcore_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_xcore_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_xcore_op {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[doc = " Instruction structure"] #[repr(C)] #[derive(Copy)] pub struct cs_xcore { #[doc = " Number of operands of this instruction,"] #[doc = " or 0 when instruction has no operand."] pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_xcore_op; 8usize], } impl Clone for cs_xcore { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_xcore { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_xcore {{ op_count: {:?}, operands: {:?} }}", self.op_count, self.operands ) } } #[repr(u32)] #[doc = " XCore instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum xcore_insn { XCORE_INS_INVALID = 0, XCORE_INS_ADD = 1, XCORE_INS_ANDNOT = 2, XCORE_INS_AND = 3, XCORE_INS_ASHR = 4, XCORE_INS_BAU = 5, XCORE_INS_BITREV = 6, XCORE_INS_BLA = 7, XCORE_INS_BLAT = 8, XCORE_INS_BL = 9, XCORE_INS_BF = 10, XCORE_INS_BT = 11, XCORE_INS_BU = 12, XCORE_INS_BRU = 13, XCORE_INS_BYTEREV = 14, XCORE_INS_CHKCT = 15, XCORE_INS_CLRE = 16, XCORE_INS_CLRPT = 17, XCORE_INS_CLRSR = 18, XCORE_INS_CLZ = 19, XCORE_INS_CRC8 = 20, XCORE_INS_CRC32 = 21, XCORE_INS_DCALL = 22, XCORE_INS_DENTSP = 23, XCORE_INS_DGETREG = 24, XCORE_INS_DIVS = 25, XCORE_INS_DIVU = 26, XCORE_INS_DRESTSP = 27, XCORE_INS_DRET = 28, XCORE_INS_ECALLF = 29, XCORE_INS_ECALLT = 30, XCORE_INS_EDU = 31, XCORE_INS_EEF = 32, XCORE_INS_EET = 33, XCORE_INS_EEU = 34, XCORE_INS_ENDIN = 35, XCORE_INS_ENTSP = 36, XCORE_INS_EQ = 37, XCORE_INS_EXTDP = 38, XCORE_INS_EXTSP = 39, XCORE_INS_FREER = 40, XCORE_INS_FREET = 41, XCORE_INS_GETD = 42, XCORE_INS_GET = 43, XCORE_INS_GETN = 44, XCORE_INS_GETR = 45, XCORE_INS_GETSR = 46, XCORE_INS_GETST = 47, XCORE_INS_GETTS = 48, XCORE_INS_INCT = 49, XCORE_INS_INIT = 50, XCORE_INS_INPW = 51, XCORE_INS_INSHR = 52, XCORE_INS_INT = 53, XCORE_INS_IN = 54, XCORE_INS_KCALL = 55, XCORE_INS_KENTSP = 56, XCORE_INS_KRESTSP = 57, XCORE_INS_KRET = 58, XCORE_INS_LADD = 59, XCORE_INS_LD16S = 60, XCORE_INS_LD8U = 61, XCORE_INS_LDA16 = 62, XCORE_INS_LDAP = 63, XCORE_INS_LDAW = 64, XCORE_INS_LDC = 65, XCORE_INS_LDW = 66, XCORE_INS_LDIVU = 67, XCORE_INS_LMUL = 68, XCORE_INS_LSS = 69, XCORE_INS_LSUB = 70, XCORE_INS_LSU = 71, XCORE_INS_MACCS = 72, XCORE_INS_MACCU = 73, XCORE_INS_MJOIN = 74, XCORE_INS_MKMSK = 75, XCORE_INS_MSYNC = 76, XCORE_INS_MUL = 77, XCORE_INS_NEG = 78, XCORE_INS_NOT = 79, XCORE_INS_OR = 80, XCORE_INS_OUTCT = 81, XCORE_INS_OUTPW = 82, XCORE_INS_OUTSHR = 83, XCORE_INS_OUTT = 84, XCORE_INS_OUT = 85, XCORE_INS_PEEK = 86, XCORE_INS_REMS = 87, XCORE_INS_REMU = 88, XCORE_INS_RETSP = 89, XCORE_INS_SETCLK = 90, XCORE_INS_SET = 91, XCORE_INS_SETC = 92, XCORE_INS_SETD = 93, XCORE_INS_SETEV = 94, XCORE_INS_SETN = 95, XCORE_INS_SETPSC = 96, XCORE_INS_SETPT = 97, XCORE_INS_SETRDY = 98, XCORE_INS_SETSR = 99, XCORE_INS_SETTW = 100, XCORE_INS_SETV = 101, XCORE_INS_SEXT = 102, XCORE_INS_SHL = 103, XCORE_INS_SHR = 104, XCORE_INS_SSYNC = 105, XCORE_INS_ST16 = 106, XCORE_INS_ST8 = 107, XCORE_INS_STW = 108, XCORE_INS_SUB = 109, XCORE_INS_SYNCR = 110, XCORE_INS_TESTCT = 111, XCORE_INS_TESTLCL = 112, XCORE_INS_TESTWCT = 113, XCORE_INS_TSETMR = 114, XCORE_INS_START = 115, XCORE_INS_WAITEF = 116, XCORE_INS_WAITET = 117, XCORE_INS_WAITEU = 118, XCORE_INS_XOR = 119, XCORE_INS_ZEXT = 120, XCORE_INS_ENDING = 121, } pub mod xcore_insn_group { #[doc = " Group of XCore instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const XCORE_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const XCORE_GRP_JUMP: Type = 1; pub const XCORE_GRP_ENDING: Type = 2; } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum tms320c64x_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] TMS320C64X_OP_INVALID = 0, #[doc = "< = CS_OP_REG (Register operand)."] TMS320C64X_OP_REG = 1, #[doc = "< = CS_OP_IMM (Immediate operand)."] TMS320C64X_OP_IMM = 2, #[doc = "< = CS_OP_MEM (Memory operand)."] TMS320C64X_OP_MEM = 3, #[doc = "< Register pair for double word ops"] TMS320C64X_OP_REGPAIR = 64, } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum tms320c64x_mem_disp { TMS320C64X_MEM_DISP_INVALID = 0, TMS320C64X_MEM_DISP_CONSTANT = 1, TMS320C64X_MEM_DISP_REGISTER = 2, } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum tms320c64x_mem_dir { TMS320C64X_MEM_DIR_INVALID = 0, TMS320C64X_MEM_DIR_FW = 1, TMS320C64X_MEM_DIR_BW = 2, } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum tms320c64x_mem_mod { TMS320C64X_MEM_MOD_INVALID = 0, TMS320C64X_MEM_MOD_NO = 1, TMS320C64X_MEM_MOD_PRE = 2, TMS320C64X_MEM_MOD_POST = 3, } #[repr(C)] #[derive(Debug, Copy)] pub struct tms320c64x_op_mem { #[doc = "< base register"] pub base: libc::c_uint, #[doc = "< displacement/offset value"] pub disp: libc::c_uint, #[doc = "< unit of base and offset register"] pub unit: libc::c_uint, #[doc = "< offset scaled"] pub scaled: libc::c_uint, #[doc = "< displacement type"] pub disptype: libc::c_uint, #[doc = "< direction"] pub direction: libc::c_uint, #[doc = "< modification"] pub modify: libc::c_uint, } impl Clone for tms320c64x_op_mem { fn clone(&self) -> Self { *self } } #[repr(C)] #[derive(Copy)] pub struct cs_tms320c64x_op { #[doc = "< operand type"] pub type_: tms320c64x_op_type, pub __bindgen_anon_1: cs_tms320c64x_op__bindgen_ty_1, } #[repr(C)] #[derive(Copy)] pub union cs_tms320c64x_op__bindgen_ty_1 { #[doc = "< register value for REG operand or first register for REGPAIR operand"] pub reg: libc::c_uint, #[doc = "< immediate value for IMM operand"] pub imm: i32, #[doc = "< base/disp value for MEM operand"] pub mem: tms320c64x_op_mem, _bindgen_union_align: [u32; 7usize], } impl Clone for cs_tms320c64x_op__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_tms320c64x_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_tms320c64x_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_tms320c64x_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_tms320c64x_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_tms320c64x_op {{ type: {:?}, __bindgen_anon_1: {:?} }}", self.type_, self.__bindgen_anon_1 ) } } #[repr(C)] #[derive(Copy)] pub struct cs_tms320c64x { pub op_count: u8, #[doc = "< operands for this instruction."] pub operands: [cs_tms320c64x_op; 8usize], pub condition: cs_tms320c64x__bindgen_ty_1, pub funit: cs_tms320c64x__bindgen_ty_2, pub parallel: libc::c_uint, } #[repr(C)] #[derive(Debug, Copy)] pub struct cs_tms320c64x__bindgen_ty_1 { pub reg: libc::c_uint, pub zero: libc::c_uint, } impl Clone for cs_tms320c64x__bindgen_ty_1 { fn clone(&self) -> Self { *self } } #[repr(C)] #[derive(Debug, Copy)] pub struct cs_tms320c64x__bindgen_ty_2 { pub unit: libc::c_uint, pub side: libc::c_uint, pub crosspath: libc::c_uint, } impl Clone for cs_tms320c64x__bindgen_ty_2 { fn clone(&self) -> Self { *self } } impl Clone for cs_tms320c64x { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_tms320c64x { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_tms320c64x {{ op_count: {:?}, operands: {:?}, condition: {:?}, funit: {:?}, parallel: {:?} }}" , self . op_count , self . operands , self . condition , self . funit , self . parallel ) } } pub mod tms320c64x_reg { pub type Type = u32; pub const TMS320C64X_REG_INVALID: Type = 0; pub const TMS320C64X_REG_AMR: Type = 1; pub const TMS320C64X_REG_CSR: Type = 2; pub const TMS320C64X_REG_DIER: Type = 3; pub const TMS320C64X_REG_DNUM: Type = 4; pub const TMS320C64X_REG_ECR: Type = 5; pub const TMS320C64X_REG_GFPGFR: Type = 6; pub const TMS320C64X_REG_GPLYA: Type = 7; pub const TMS320C64X_REG_GPLYB: Type = 8; pub const TMS320C64X_REG_ICR: Type = 9; pub const TMS320C64X_REG_IER: Type = 10; pub const TMS320C64X_REG_IERR: Type = 11; pub const TMS320C64X_REG_ILC: Type = 12; pub const TMS320C64X_REG_IRP: Type = 13; pub const TMS320C64X_REG_ISR: Type = 14; pub const TMS320C64X_REG_ISTP: Type = 15; pub const TMS320C64X_REG_ITSR: Type = 16; pub const TMS320C64X_REG_NRP: Type = 17; pub const TMS320C64X_REG_NTSR: Type = 18; pub const TMS320C64X_REG_REP: Type = 19; pub const TMS320C64X_REG_RILC: Type = 20; pub const TMS320C64X_REG_SSR: Type = 21; pub const TMS320C64X_REG_TSCH: Type = 22; pub const TMS320C64X_REG_TSCL: Type = 23; pub const TMS320C64X_REG_TSR: Type = 24; pub const TMS320C64X_REG_A0: Type = 25; pub const TMS320C64X_REG_A1: Type = 26; pub const TMS320C64X_REG_A2: Type = 27; pub const TMS320C64X_REG_A3: Type = 28; pub const TMS320C64X_REG_A4: Type = 29; pub const TMS320C64X_REG_A5: Type = 30; pub const TMS320C64X_REG_A6: Type = 31; pub const TMS320C64X_REG_A7: Type = 32; pub const TMS320C64X_REG_A8: Type = 33; pub const TMS320C64X_REG_A9: Type = 34; pub const TMS320C64X_REG_A10: Type = 35; pub const TMS320C64X_REG_A11: Type = 36; pub const TMS320C64X_REG_A12: Type = 37; pub const TMS320C64X_REG_A13: Type = 38; pub const TMS320C64X_REG_A14: Type = 39; pub const TMS320C64X_REG_A15: Type = 40; pub const TMS320C64X_REG_A16: Type = 41; pub const TMS320C64X_REG_A17: Type = 42; pub const TMS320C64X_REG_A18: Type = 43; pub const TMS320C64X_REG_A19: Type = 44; pub const TMS320C64X_REG_A20: Type = 45; pub const TMS320C64X_REG_A21: Type = 46; pub const TMS320C64X_REG_A22: Type = 47; pub const TMS320C64X_REG_A23: Type = 48; pub const TMS320C64X_REG_A24: Type = 49; pub const TMS320C64X_REG_A25: Type = 50; pub const TMS320C64X_REG_A26: Type = 51; pub const TMS320C64X_REG_A27: Type = 52; pub const TMS320C64X_REG_A28: Type = 53; pub const TMS320C64X_REG_A29: Type = 54; pub const TMS320C64X_REG_A30: Type = 55; pub const TMS320C64X_REG_A31: Type = 56; pub const TMS320C64X_REG_B0: Type = 57; pub const TMS320C64X_REG_B1: Type = 58; pub const TMS320C64X_REG_B2: Type = 59; pub const TMS320C64X_REG_B3: Type = 60; pub const TMS320C64X_REG_B4: Type = 61; pub const TMS320C64X_REG_B5: Type = 62; pub const TMS320C64X_REG_B6: Type = 63; pub const TMS320C64X_REG_B7: Type = 64; pub const TMS320C64X_REG_B8: Type = 65; pub const TMS320C64X_REG_B9: Type = 66; pub const TMS320C64X_REG_B10: Type = 67; pub const TMS320C64X_REG_B11: Type = 68; pub const TMS320C64X_REG_B12: Type = 69; pub const TMS320C64X_REG_B13: Type = 70; pub const TMS320C64X_REG_B14: Type = 71; pub const TMS320C64X_REG_B15: Type = 72; pub const TMS320C64X_REG_B16: Type = 73; pub const TMS320C64X_REG_B17: Type = 74; pub const TMS320C64X_REG_B18: Type = 75; pub const TMS320C64X_REG_B19: Type = 76; pub const TMS320C64X_REG_B20: Type = 77; pub const TMS320C64X_REG_B21: Type = 78; pub const TMS320C64X_REG_B22: Type = 79; pub const TMS320C64X_REG_B23: Type = 80; pub const TMS320C64X_REG_B24: Type = 81; pub const TMS320C64X_REG_B25: Type = 82; pub const TMS320C64X_REG_B26: Type = 83; pub const TMS320C64X_REG_B27: Type = 84; pub const TMS320C64X_REG_B28: Type = 85; pub const TMS320C64X_REG_B29: Type = 86; pub const TMS320C64X_REG_B30: Type = 87; pub const TMS320C64X_REG_B31: Type = 88; pub const TMS320C64X_REG_PCE1: Type = 89; pub const TMS320C64X_REG_ENDING: Type = 90; pub const TMS320C64X_REG_EFR: Type = 5; pub const TMS320C64X_REG_IFR: Type = 14; } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum tms320c64x_insn { TMS320C64X_INS_INVALID = 0, TMS320C64X_INS_ABS = 1, TMS320C64X_INS_ABS2 = 2, TMS320C64X_INS_ADD = 3, TMS320C64X_INS_ADD2 = 4, TMS320C64X_INS_ADD4 = 5, TMS320C64X_INS_ADDAB = 6, TMS320C64X_INS_ADDAD = 7, TMS320C64X_INS_ADDAH = 8, TMS320C64X_INS_ADDAW = 9, TMS320C64X_INS_ADDK = 10, TMS320C64X_INS_ADDKPC = 11, TMS320C64X_INS_ADDU = 12, TMS320C64X_INS_AND = 13, TMS320C64X_INS_ANDN = 14, TMS320C64X_INS_AVG2 = 15, TMS320C64X_INS_AVGU4 = 16, TMS320C64X_INS_B = 17, TMS320C64X_INS_BDEC = 18, TMS320C64X_INS_BITC4 = 19, TMS320C64X_INS_BNOP = 20, TMS320C64X_INS_BPOS = 21, TMS320C64X_INS_CLR = 22, TMS320C64X_INS_CMPEQ = 23, TMS320C64X_INS_CMPEQ2 = 24, TMS320C64X_INS_CMPEQ4 = 25, TMS320C64X_INS_CMPGT = 26, TMS320C64X_INS_CMPGT2 = 27, TMS320C64X_INS_CMPGTU4 = 28, TMS320C64X_INS_CMPLT = 29, TMS320C64X_INS_CMPLTU = 30, TMS320C64X_INS_DEAL = 31, TMS320C64X_INS_DOTP2 = 32, TMS320C64X_INS_DOTPN2 = 33, TMS320C64X_INS_DOTPNRSU2 = 34, TMS320C64X_INS_DOTPRSU2 = 35, TMS320C64X_INS_DOTPSU4 = 36, TMS320C64X_INS_DOTPU4 = 37, TMS320C64X_INS_EXT = 38, TMS320C64X_INS_EXTU = 39, TMS320C64X_INS_GMPGTU = 40, TMS320C64X_INS_GMPY4 = 41, TMS320C64X_INS_LDB = 42, TMS320C64X_INS_LDBU = 43, TMS320C64X_INS_LDDW = 44, TMS320C64X_INS_LDH = 45, TMS320C64X_INS_LDHU = 46, TMS320C64X_INS_LDNDW = 47, TMS320C64X_INS_LDNW = 48, TMS320C64X_INS_LDW = 49, TMS320C64X_INS_LMBD = 50, TMS320C64X_INS_MAX2 = 51, TMS320C64X_INS_MAXU4 = 52, TMS320C64X_INS_MIN2 = 53, TMS320C64X_INS_MINU4 = 54, TMS320C64X_INS_MPY = 55, TMS320C64X_INS_MPY2 = 56, TMS320C64X_INS_MPYH = 57, TMS320C64X_INS_MPYHI = 58, TMS320C64X_INS_MPYHIR = 59, TMS320C64X_INS_MPYHL = 60, TMS320C64X_INS_MPYHLU = 61, TMS320C64X_INS_MPYHSLU = 62, TMS320C64X_INS_MPYHSU = 63, TMS320C64X_INS_MPYHU = 64, TMS320C64X_INS_MPYHULS = 65, TMS320C64X_INS_MPYHUS = 66, TMS320C64X_INS_MPYLH = 67, TMS320C64X_INS_MPYLHU = 68, TMS320C64X_INS_MPYLI = 69, TMS320C64X_INS_MPYLIR = 70, TMS320C64X_INS_MPYLSHU = 71, TMS320C64X_INS_MPYLUHS = 72, TMS320C64X_INS_MPYSU = 73, TMS320C64X_INS_MPYSU4 = 74, TMS320C64X_INS_MPYU = 75, TMS320C64X_INS_MPYU4 = 76, TMS320C64X_INS_MPYUS = 77, TMS320C64X_INS_MVC = 78, TMS320C64X_INS_MVD = 79, TMS320C64X_INS_MVK = 80, TMS320C64X_INS_MVKL = 81, TMS320C64X_INS_MVKLH = 82, TMS320C64X_INS_NOP = 83, TMS320C64X_INS_NORM = 84, TMS320C64X_INS_OR = 85, TMS320C64X_INS_PACK2 = 86, TMS320C64X_INS_PACKH2 = 87, TMS320C64X_INS_PACKH4 = 88, TMS320C64X_INS_PACKHL2 = 89, TMS320C64X_INS_PACKL4 = 90, TMS320C64X_INS_PACKLH2 = 91, TMS320C64X_INS_ROTL = 92, TMS320C64X_INS_SADD = 93, TMS320C64X_INS_SADD2 = 94, TMS320C64X_INS_SADDU4 = 95, TMS320C64X_INS_SADDUS2 = 96, TMS320C64X_INS_SAT = 97, TMS320C64X_INS_SET = 98, TMS320C64X_INS_SHFL = 99, TMS320C64X_INS_SHL = 100, TMS320C64X_INS_SHLMB = 101, TMS320C64X_INS_SHR = 102, TMS320C64X_INS_SHR2 = 103, TMS320C64X_INS_SHRMB = 104, TMS320C64X_INS_SHRU = 105, TMS320C64X_INS_SHRU2 = 106, TMS320C64X_INS_SMPY = 107, TMS320C64X_INS_SMPY2 = 108, TMS320C64X_INS_SMPYH = 109, TMS320C64X_INS_SMPYHL = 110, TMS320C64X_INS_SMPYLH = 111, TMS320C64X_INS_SPACK2 = 112, TMS320C64X_INS_SPACKU4 = 113, TMS320C64X_INS_SSHL = 114, TMS320C64X_INS_SSHVL = 115, TMS320C64X_INS_SSHVR = 116, TMS320C64X_INS_SSUB = 117, TMS320C64X_INS_STB = 118, TMS320C64X_INS_STDW = 119, TMS320C64X_INS_STH = 120, TMS320C64X_INS_STNDW = 121, TMS320C64X_INS_STNW = 122, TMS320C64X_INS_STW = 123, TMS320C64X_INS_SUB = 124, TMS320C64X_INS_SUB2 = 125, TMS320C64X_INS_SUB4 = 126, TMS320C64X_INS_SUBAB = 127, TMS320C64X_INS_SUBABS4 = 128, TMS320C64X_INS_SUBAH = 129, TMS320C64X_INS_SUBAW = 130, TMS320C64X_INS_SUBC = 131, TMS320C64X_INS_SUBU = 132, TMS320C64X_INS_SWAP4 = 133, TMS320C64X_INS_UNPKHU4 = 134, TMS320C64X_INS_UNPKLU4 = 135, TMS320C64X_INS_XOR = 136, TMS320C64X_INS_XPND2 = 137, TMS320C64X_INS_XPND4 = 138, TMS320C64X_INS_IDLE = 139, TMS320C64X_INS_MV = 140, TMS320C64X_INS_NEG = 141, TMS320C64X_INS_NOT = 142, TMS320C64X_INS_SWAP2 = 143, TMS320C64X_INS_ZERO = 144, TMS320C64X_INS_ENDING = 145, } pub mod tms320c64x_insn_group { pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const TMS320C64X_GRP_INVALID: Type = 0; #[doc = "< = CS_GRP_JUMP"] pub const TMS320C64X_GRP_JUMP: Type = 1; pub const TMS320C64X_GRP_FUNIT_D: Type = 128; pub const TMS320C64X_GRP_FUNIT_L: Type = 129; pub const TMS320C64X_GRP_FUNIT_M: Type = 130; pub const TMS320C64X_GRP_FUNIT_S: Type = 131; pub const TMS320C64X_GRP_FUNIT_NO: Type = 132; pub const TMS320C64X_GRP_ENDING: Type = 133; } #[repr(u32)] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum tms320c64x_funit { TMS320C64X_FUNIT_INVALID = 0, TMS320C64X_FUNIT_D = 1, TMS320C64X_FUNIT_L = 2, TMS320C64X_FUNIT_M = 3, TMS320C64X_FUNIT_S = 4, TMS320C64X_FUNIT_NO = 5, } pub mod m680x_reg { #[doc = " M680X registers and special registers"] pub type Type = u32; pub const M680X_REG_INVALID: Type = 0; #[doc = "< M6800/1/2/3/9, HD6301/9"] pub const M680X_REG_A: Type = 1; #[doc = "< M6800/1/2/3/9, HD6301/9"] pub const M680X_REG_B: Type = 2; #[doc = "< HD6309"] pub const M680X_REG_E: Type = 3; #[doc = "< HD6309"] pub const M680X_REG_F: Type = 4; #[doc = "< HD6309"] pub const M680X_REG_0: Type = 5; #[doc = "< M6801/3/9, HD6301/9"] pub const M680X_REG_D: Type = 6; #[doc = "< HD6309"] pub const M680X_REG_W: Type = 7; #[doc = "< M6800/1/2/3/9, M6301/9"] pub const M680X_REG_CC: Type = 8; #[doc = "< M6809/M6309"] pub const M680X_REG_DP: Type = 9; #[doc = "< M6309"] pub const M680X_REG_MD: Type = 10; #[doc = "< M6808"] pub const M680X_REG_HX: Type = 11; #[doc = "< M6808"] pub const M680X_REG_H: Type = 12; #[doc = "< M6800/1/2/3/9, M6301/9"] pub const M680X_REG_X: Type = 13; #[doc = "< M6809/M6309"] pub const M680X_REG_Y: Type = 14; #[doc = "< M6809/M6309"] pub const M680X_REG_S: Type = 15; #[doc = "< M6809/M6309"] pub const M680X_REG_U: Type = 16; #[doc = "< M6309"] pub const M680X_REG_V: Type = 17; #[doc = "< M6309"] pub const M680X_REG_Q: Type = 18; #[doc = "< M6800/1/2/3/9, M6301/9"] pub const M680X_REG_PC: Type = 19; #[doc = "< CPU12"] pub const M680X_REG_TMP2: Type = 20; #[doc = "< CPU12"] pub const M680X_REG_TMP3: Type = 21; #[doc = "< <-- mark the end of the list of registers"] pub const M680X_REG_ENDING: Type = 22; } #[repr(u32)] #[doc = " Operand type for instruction's operands"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m680x_op_type { #[doc = "< = CS_OP_INVALID (Uninitialized)."] M680X_OP_INVALID = 0, #[doc = "< = Register operand."] M680X_OP_REGISTER = 1, #[doc = "< = Immediate operand."] M680X_OP_IMMEDIATE = 2, #[doc = "< = Indexed addressing operand."] M680X_OP_INDEXED = 3, #[doc = "< = Extended addressing operand."] M680X_OP_EXTENDED = 4, #[doc = "< = Direct addressing operand."] M680X_OP_DIRECT = 5, #[doc = "< = Relative addressing operand."] M680X_OP_RELATIVE = 6, #[doc = "< = constant operand (Displayed as number only)."] #[doc = "< Used e.g. for a bit index or page number."] M680X_OP_CONSTANT = 7, } #[doc = " Instruction's operand referring to indexed addressing"] #[repr(C)] #[derive(Debug, Copy)] pub struct m680x_op_idx { #[doc = "< base register (or M680X_REG_INVALID if"] #[doc = "< irrelevant)"] pub base_reg: m680x_reg::Type, #[doc = "< offset register (or M680X_REG_INVALID if"] #[doc = "< irrelevant)"] pub offset_reg: m680x_reg::Type, #[doc = "< 5-,8- or 16-bit offset. See also offset_bits."] pub offset: i16, #[doc = "< = offset addr. if base_reg == M680X_REG_PC."] #[doc = "< calculated as offset + PC"] pub offset_addr: u16, #[doc = "< offset width in bits for indexed addressing"] pub offset_bits: u8, #[doc = "< inc. or dec. value:"] #[doc = "< 0: no inc-/decrement"] #[doc = "< 1 .. 8: increment by 1 .. 8"] #[doc = "< -1 .. -8: decrement by 1 .. 8"] #[doc = "< if flag M680X_IDX_POST_INC_DEC set it is post"] #[doc = "< inc-/decrement otherwise pre inc-/decrement"] pub inc_dec: i8, #[doc = "< 8-bit flags (see above)"] pub flags: u8, } impl Clone for m680x_op_idx { fn clone(&self) -> Self { *self } } #[doc = " Instruction's memory operand referring to relative addressing (Bcc/LBcc)"] #[repr(C)] #[derive(Debug, Copy)] pub struct m680x_op_rel { #[doc = "< The absolute address."] #[doc = "< calculated as PC + offset. PC is the first"] #[doc = "< address after the instruction."] pub address: u16, #[doc = "< the offset/displacement value"] pub offset: i16, } impl Clone for m680x_op_rel { fn clone(&self) -> Self { *self } } #[doc = " Instruction's operand referring to extended addressing"] #[repr(C)] #[derive(Debug, Copy)] pub struct m680x_op_ext { #[doc = "< The absolute address"] pub address: u16, #[doc = "< true if extended indirect addressing"] pub indirect: bool, } impl Clone for m680x_op_ext { fn clone(&self) -> Self { *self } } #[doc = " Instruction operand"] #[repr(C)] #[derive(Copy)] pub struct cs_m680x_op { pub type_: m680x_op_type, pub __bindgen_anon_1: cs_m680x_op__bindgen_ty_1, #[doc = "< size of this operand (in bytes)"] pub size: u8, #[doc = " How is this operand accessed? (READ, WRITE or READ|WRITE)"] #[doc = " This field is combined of cs_ac_type."] #[doc = " NOTE: this field is irrelevant if engine is compiled in DIET"] pub access: u8, } #[repr(C)] #[derive(Copy)] pub union cs_m680x_op__bindgen_ty_1 { #[doc = "< immediate value for IMM operand"] pub imm: i32, #[doc = "< register value for REG operand"] pub reg: m680x_reg::Type, #[doc = "< Indexed addressing operand"] pub idx: m680x_op_idx, #[doc = "< Relative address. operand (Bcc/LBcc)"] pub rel: m680x_op_rel, #[doc = "< Extended address"] pub ext: m680x_op_ext, #[doc = "< Self { *self } } impl ::core::fmt::Debug for cs_m680x_op__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_m680x_op__bindgen_ty_1 {{ union }}") } } impl Clone for cs_m680x_op { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_m680x_op { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_m680x_op {{ type: {:?}, __bindgen_anon_1: {:?}, size: {:?}, access: {:?} }}", self.type_, self.__bindgen_anon_1, self.size, self.access ) } } #[repr(u32)] #[doc = " Group of M680X instructions"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m680x_group_type { M680X_GRP_INVALID = 0, #[doc = "< = CS_GRP_JUMP"] M680X_GRP_JUMP = 1, #[doc = "< = CS_GRP_CALL"] M680X_GRP_CALL = 2, #[doc = "< = CS_GRP_RET"] M680X_GRP_RET = 3, #[doc = "< = CS_GRP_INT"] M680X_GRP_INT = 4, #[doc = "< = CS_GRP_IRET"] M680X_GRP_IRET = 5, #[doc = "< = CS_GRP_PRIVILEDGE; not used"] M680X_GRP_PRIV = 6, #[doc = "< = CS_GRP_BRANCH_RELATIVE"] M680X_GRP_BRAREL = 7, M680X_GRP_ENDING = 8, } #[doc = " The M680X instruction and it's operands"] #[repr(C)] #[derive(Copy)] pub struct cs_m680x { #[doc = "< See: M680X instruction flags"] pub flags: u8, #[doc = "< number of operands for the instruction or 0"] pub op_count: u8, #[doc = "< operands for this insn."] pub operands: [cs_m680x_op; 9usize], } impl Clone for cs_m680x { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_m680x { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!( f, "cs_m680x {{ flags: {:?}, op_count: {:?}, operands: {:?} }}", self.flags, self.op_count, self.operands ) } } #[repr(u32)] #[doc = " M680X instruction IDs"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum m680x_insn { M680X_INS_INVLD = 0, #[doc = "< M6800/1/2/3"] M680X_INS_ABA = 1, M680X_INS_ABX = 2, M680X_INS_ABY = 3, M680X_INS_ADC = 4, M680X_INS_ADCA = 5, M680X_INS_ADCB = 6, M680X_INS_ADCD = 7, M680X_INS_ADCR = 8, M680X_INS_ADD = 9, M680X_INS_ADDA = 10, M680X_INS_ADDB = 11, M680X_INS_ADDD = 12, M680X_INS_ADDE = 13, M680X_INS_ADDF = 14, M680X_INS_ADDR = 15, M680X_INS_ADDW = 16, M680X_INS_AIM = 17, M680X_INS_AIS = 18, M680X_INS_AIX = 19, M680X_INS_AND = 20, M680X_INS_ANDA = 21, M680X_INS_ANDB = 22, M680X_INS_ANDCC = 23, M680X_INS_ANDD = 24, M680X_INS_ANDR = 25, M680X_INS_ASL = 26, M680X_INS_ASLA = 27, M680X_INS_ASLB = 28, #[doc = "< or LSLD"] M680X_INS_ASLD = 29, M680X_INS_ASR = 30, M680X_INS_ASRA = 31, M680X_INS_ASRB = 32, M680X_INS_ASRD = 33, M680X_INS_ASRX = 34, M680X_INS_BAND = 35, #[doc = "< or BHS"] M680X_INS_BCC = 36, M680X_INS_BCLR = 37, #[doc = "< or BLO"] M680X_INS_BCS = 38, M680X_INS_BEOR = 39, M680X_INS_BEQ = 40, M680X_INS_BGE = 41, M680X_INS_BGND = 42, M680X_INS_BGT = 43, M680X_INS_BHCC = 44, M680X_INS_BHCS = 45, M680X_INS_BHI = 46, M680X_INS_BIAND = 47, M680X_INS_BIEOR = 48, M680X_INS_BIH = 49, M680X_INS_BIL = 50, M680X_INS_BIOR = 51, M680X_INS_BIT = 52, M680X_INS_BITA = 53, M680X_INS_BITB = 54, M680X_INS_BITD = 55, M680X_INS_BITMD = 56, M680X_INS_BLE = 57, M680X_INS_BLS = 58, M680X_INS_BLT = 59, M680X_INS_BMC = 60, M680X_INS_BMI = 61, M680X_INS_BMS = 62, M680X_INS_BNE = 63, M680X_INS_BOR = 64, M680X_INS_BPL = 65, M680X_INS_BRCLR = 66, M680X_INS_BRSET = 67, M680X_INS_BRA = 68, M680X_INS_BRN = 69, M680X_INS_BSET = 70, M680X_INS_BSR = 71, M680X_INS_BVC = 72, M680X_INS_BVS = 73, M680X_INS_CALL = 74, #[doc = "< M6800/1/2/3"] M680X_INS_CBA = 75, M680X_INS_CBEQ = 76, M680X_INS_CBEQA = 77, M680X_INS_CBEQX = 78, #[doc = "< M6800/1/2/3"] M680X_INS_CLC = 79, #[doc = "< M6800/1/2/3"] M680X_INS_CLI = 80, M680X_INS_CLR = 81, M680X_INS_CLRA = 82, M680X_INS_CLRB = 83, M680X_INS_CLRD = 84, M680X_INS_CLRE = 85, M680X_INS_CLRF = 86, M680X_INS_CLRH = 87, M680X_INS_CLRW = 88, M680X_INS_CLRX = 89, #[doc = "< M6800/1/2/3"] M680X_INS_CLV = 90, M680X_INS_CMP = 91, M680X_INS_CMPA = 92, M680X_INS_CMPB = 93, M680X_INS_CMPD = 94, M680X_INS_CMPE = 95, M680X_INS_CMPF = 96, M680X_INS_CMPR = 97, M680X_INS_CMPS = 98, M680X_INS_CMPU = 99, M680X_INS_CMPW = 100, M680X_INS_CMPX = 101, M680X_INS_CMPY = 102, M680X_INS_COM = 103, M680X_INS_COMA = 104, M680X_INS_COMB = 105, M680X_INS_COMD = 106, M680X_INS_COME = 107, M680X_INS_COMF = 108, M680X_INS_COMW = 109, M680X_INS_COMX = 110, M680X_INS_CPD = 111, M680X_INS_CPHX = 112, M680X_INS_CPS = 113, #[doc = "< M6800/1/2/3"] M680X_INS_CPX = 114, M680X_INS_CPY = 115, M680X_INS_CWAI = 116, M680X_INS_DAA = 117, M680X_INS_DBEQ = 118, M680X_INS_DBNE = 119, M680X_INS_DBNZ = 120, M680X_INS_DBNZA = 121, M680X_INS_DBNZX = 122, M680X_INS_DEC = 123, M680X_INS_DECA = 124, M680X_INS_DECB = 125, M680X_INS_DECD = 126, M680X_INS_DECE = 127, M680X_INS_DECF = 128, M680X_INS_DECW = 129, M680X_INS_DECX = 130, #[doc = "< M6800/1/2/3"] M680X_INS_DES = 131, #[doc = "< M6800/1/2/3"] M680X_INS_DEX = 132, M680X_INS_DEY = 133, M680X_INS_DIV = 134, M680X_INS_DIVD = 135, M680X_INS_DIVQ = 136, M680X_INS_EDIV = 137, M680X_INS_EDIVS = 138, M680X_INS_EIM = 139, M680X_INS_EMACS = 140, M680X_INS_EMAXD = 141, M680X_INS_EMAXM = 142, M680X_INS_EMIND = 143, M680X_INS_EMINM = 144, M680X_INS_EMUL = 145, M680X_INS_EMULS = 146, M680X_INS_EOR = 147, M680X_INS_EORA = 148, M680X_INS_EORB = 149, M680X_INS_EORD = 150, M680X_INS_EORR = 151, M680X_INS_ETBL = 152, M680X_INS_EXG = 153, M680X_INS_FDIV = 154, M680X_INS_IBEQ = 155, M680X_INS_IBNE = 156, M680X_INS_IDIV = 157, M680X_INS_IDIVS = 158, M680X_INS_ILLGL = 159, M680X_INS_INC = 160, M680X_INS_INCA = 161, M680X_INS_INCB = 162, M680X_INS_INCD = 163, M680X_INS_INCE = 164, M680X_INS_INCF = 165, M680X_INS_INCW = 166, M680X_INS_INCX = 167, #[doc = "< M6800/1/2/3"] M680X_INS_INS = 168, #[doc = "< M6800/1/2/3"] M680X_INS_INX = 169, M680X_INS_INY = 170, M680X_INS_JMP = 171, M680X_INS_JSR = 172, #[doc = "< or LBHS"] M680X_INS_LBCC = 173, #[doc = "< or LBLO"] M680X_INS_LBCS = 174, M680X_INS_LBEQ = 175, M680X_INS_LBGE = 176, M680X_INS_LBGT = 177, M680X_INS_LBHI = 178, M680X_INS_LBLE = 179, M680X_INS_LBLS = 180, M680X_INS_LBLT = 181, M680X_INS_LBMI = 182, M680X_INS_LBNE = 183, M680X_INS_LBPL = 184, M680X_INS_LBRA = 185, M680X_INS_LBRN = 186, M680X_INS_LBSR = 187, M680X_INS_LBVC = 188, M680X_INS_LBVS = 189, M680X_INS_LDA = 190, #[doc = "< M6800/1/2/3"] M680X_INS_LDAA = 191, #[doc = "< M6800/1/2/3"] M680X_INS_LDAB = 192, M680X_INS_LDB = 193, M680X_INS_LDBT = 194, M680X_INS_LDD = 195, M680X_INS_LDE = 196, M680X_INS_LDF = 197, M680X_INS_LDHX = 198, M680X_INS_LDMD = 199, M680X_INS_LDQ = 200, M680X_INS_LDS = 201, M680X_INS_LDU = 202, M680X_INS_LDW = 203, M680X_INS_LDX = 204, M680X_INS_LDY = 205, M680X_INS_LEAS = 206, M680X_INS_LEAU = 207, M680X_INS_LEAX = 208, M680X_INS_LEAY = 209, M680X_INS_LSL = 210, M680X_INS_LSLA = 211, M680X_INS_LSLB = 212, M680X_INS_LSLD = 213, M680X_INS_LSLX = 214, M680X_INS_LSR = 215, M680X_INS_LSRA = 216, M680X_INS_LSRB = 217, #[doc = "< or ASRD"] M680X_INS_LSRD = 218, M680X_INS_LSRW = 219, M680X_INS_LSRX = 220, M680X_INS_MAXA = 221, M680X_INS_MAXM = 222, M680X_INS_MEM = 223, M680X_INS_MINA = 224, M680X_INS_MINM = 225, M680X_INS_MOV = 226, M680X_INS_MOVB = 227, M680X_INS_MOVW = 228, M680X_INS_MUL = 229, M680X_INS_MULD = 230, M680X_INS_NEG = 231, M680X_INS_NEGA = 232, M680X_INS_NEGB = 233, M680X_INS_NEGD = 234, M680X_INS_NEGX = 235, M680X_INS_NOP = 236, M680X_INS_NSA = 237, M680X_INS_OIM = 238, M680X_INS_ORA = 239, #[doc = "< M6800/1/2/3"] M680X_INS_ORAA = 240, #[doc = "< M6800/1/2/3"] M680X_INS_ORAB = 241, M680X_INS_ORB = 242, M680X_INS_ORCC = 243, M680X_INS_ORD = 244, M680X_INS_ORR = 245, #[doc = "< M6800/1/2/3"] M680X_INS_PSHA = 246, #[doc = "< M6800/1/2/3"] M680X_INS_PSHB = 247, M680X_INS_PSHC = 248, M680X_INS_PSHD = 249, M680X_INS_PSHH = 250, M680X_INS_PSHS = 251, M680X_INS_PSHSW = 252, M680X_INS_PSHU = 253, M680X_INS_PSHUW = 254, #[doc = "< M6800/1/2/3"] M680X_INS_PSHX = 255, M680X_INS_PSHY = 256, #[doc = "< M6800/1/2/3"] M680X_INS_PULA = 257, #[doc = "< M6800/1/2/3"] M680X_INS_PULB = 258, M680X_INS_PULC = 259, M680X_INS_PULD = 260, M680X_INS_PULH = 261, M680X_INS_PULS = 262, M680X_INS_PULSW = 263, M680X_INS_PULU = 264, M680X_INS_PULUW = 265, #[doc = "< M6800/1/2/3"] M680X_INS_PULX = 266, M680X_INS_PULY = 267, M680X_INS_REV = 268, M680X_INS_REVW = 269, M680X_INS_ROL = 270, M680X_INS_ROLA = 271, M680X_INS_ROLB = 272, M680X_INS_ROLD = 273, M680X_INS_ROLW = 274, M680X_INS_ROLX = 275, M680X_INS_ROR = 276, M680X_INS_RORA = 277, M680X_INS_RORB = 278, M680X_INS_RORD = 279, M680X_INS_RORW = 280, M680X_INS_RORX = 281, M680X_INS_RSP = 282, M680X_INS_RTC = 283, M680X_INS_RTI = 284, M680X_INS_RTS = 285, #[doc = "< M6800/1/2/3"] M680X_INS_SBA = 286, M680X_INS_SBC = 287, M680X_INS_SBCA = 288, M680X_INS_SBCB = 289, M680X_INS_SBCD = 290, M680X_INS_SBCR = 291, M680X_INS_SEC = 292, M680X_INS_SEI = 293, M680X_INS_SEV = 294, M680X_INS_SEX = 295, M680X_INS_SEXW = 296, M680X_INS_SLP = 297, M680X_INS_STA = 298, #[doc = "< M6800/1/2/3"] M680X_INS_STAA = 299, #[doc = "< M6800/1/2/3"] M680X_INS_STAB = 300, M680X_INS_STB = 301, M680X_INS_STBT = 302, M680X_INS_STD = 303, M680X_INS_STE = 304, M680X_INS_STF = 305, M680X_INS_STOP = 306, M680X_INS_STHX = 307, M680X_INS_STQ = 308, M680X_INS_STS = 309, M680X_INS_STU = 310, M680X_INS_STW = 311, M680X_INS_STX = 312, M680X_INS_STY = 313, M680X_INS_SUB = 314, M680X_INS_SUBA = 315, M680X_INS_SUBB = 316, M680X_INS_SUBD = 317, M680X_INS_SUBE = 318, M680X_INS_SUBF = 319, M680X_INS_SUBR = 320, M680X_INS_SUBW = 321, M680X_INS_SWI = 322, M680X_INS_SWI2 = 323, M680X_INS_SWI3 = 324, M680X_INS_SYNC = 325, #[doc = "< M6800/1/2/3"] M680X_INS_TAB = 326, #[doc = "< M6800/1/2/3"] M680X_INS_TAP = 327, M680X_INS_TAX = 328, #[doc = "< M6800/1/2/3"] M680X_INS_TBA = 329, M680X_INS_TBEQ = 330, M680X_INS_TBL = 331, M680X_INS_TBNE = 332, M680X_INS_TEST = 333, M680X_INS_TFM = 334, M680X_INS_TFR = 335, M680X_INS_TIM = 336, #[doc = "< M6800/1/2/3"] M680X_INS_TPA = 337, M680X_INS_TST = 338, M680X_INS_TSTA = 339, M680X_INS_TSTB = 340, M680X_INS_TSTD = 341, M680X_INS_TSTE = 342, M680X_INS_TSTF = 343, M680X_INS_TSTW = 344, M680X_INS_TSTX = 345, #[doc = "< M6800/1/2/3"] M680X_INS_TSX = 346, M680X_INS_TSY = 347, M680X_INS_TXA = 348, #[doc = "< M6800/1/2/3"] M680X_INS_TXS = 349, M680X_INS_TYS = 350, #[doc = "< M6800/1/2/3"] M680X_INS_WAI = 351, M680X_INS_WAIT = 352, M680X_INS_WAV = 353, M680X_INS_WAVR = 354, #[doc = "< HD6301"] M680X_INS_XGDX = 355, M680X_INS_XGDY = 356, M680X_INS_ENDING = 357, } #[doc = " Instruction structure"] #[repr(C)] #[derive(Debug, Copy)] pub struct cs_evm { #[doc = "< number of items popped from the stack"] pub pop: libc::c_uchar, #[doc = "< number of items pushed into the stack"] pub push: libc::c_uchar, #[doc = "< gas fee for the instruction"] pub fee: libc::c_uint, } impl Clone for cs_evm { fn clone(&self) -> Self { *self } } #[repr(u32)] #[doc = " EVM instruction"] #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)] pub enum evm_insn { EVM_INS_STOP = 0, EVM_INS_ADD = 1, EVM_INS_MUL = 2, EVM_INS_SUB = 3, EVM_INS_DIV = 4, EVM_INS_SDIV = 5, EVM_INS_MOD = 6, EVM_INS_SMOD = 7, EVM_INS_ADDMOD = 8, EVM_INS_MULMOD = 9, EVM_INS_EXP = 10, EVM_INS_SIGNEXTEND = 11, EVM_INS_LT = 16, EVM_INS_GT = 17, EVM_INS_SLT = 18, EVM_INS_SGT = 19, EVM_INS_EQ = 20, EVM_INS_ISZERO = 21, EVM_INS_AND = 22, EVM_INS_OR = 23, EVM_INS_XOR = 24, EVM_INS_NOT = 25, EVM_INS_BYTE = 26, EVM_INS_SHA3 = 32, EVM_INS_ADDRESS = 48, EVM_INS_BALANCE = 49, EVM_INS_ORIGIN = 50, EVM_INS_CALLER = 51, EVM_INS_CALLVALUE = 52, EVM_INS_CALLDATALOAD = 53, EVM_INS_CALLDATASIZE = 54, EVM_INS_CALLDATACOPY = 55, EVM_INS_CODESIZE = 56, EVM_INS_CODECOPY = 57, EVM_INS_GASPRICE = 58, EVM_INS_EXTCODESIZE = 59, EVM_INS_EXTCODECOPY = 60, EVM_INS_RETURNDATASIZE = 61, EVM_INS_RETURNDATACOPY = 62, EVM_INS_BLOCKHASH = 64, EVM_INS_COINBASE = 65, EVM_INS_TIMESTAMP = 66, EVM_INS_NUMBER = 67, EVM_INS_DIFFICULTY = 68, EVM_INS_GASLIMIT = 69, EVM_INS_POP = 80, EVM_INS_MLOAD = 81, EVM_INS_MSTORE = 82, EVM_INS_MSTORE8 = 83, EVM_INS_SLOAD = 84, EVM_INS_SSTORE = 85, EVM_INS_JUMP = 86, EVM_INS_JUMPI = 87, EVM_INS_PC = 88, EVM_INS_MSIZE = 89, EVM_INS_GAS = 90, EVM_INS_JUMPDEST = 91, EVM_INS_PUSH1 = 96, EVM_INS_PUSH2 = 97, EVM_INS_PUSH3 = 98, EVM_INS_PUSH4 = 99, EVM_INS_PUSH5 = 100, EVM_INS_PUSH6 = 101, EVM_INS_PUSH7 = 102, EVM_INS_PUSH8 = 103, EVM_INS_PUSH9 = 104, EVM_INS_PUSH10 = 105, EVM_INS_PUSH11 = 106, EVM_INS_PUSH12 = 107, EVM_INS_PUSH13 = 108, EVM_INS_PUSH14 = 109, EVM_INS_PUSH15 = 110, EVM_INS_PUSH16 = 111, EVM_INS_PUSH17 = 112, EVM_INS_PUSH18 = 113, EVM_INS_PUSH19 = 114, EVM_INS_PUSH20 = 115, EVM_INS_PUSH21 = 116, EVM_INS_PUSH22 = 117, EVM_INS_PUSH23 = 118, EVM_INS_PUSH24 = 119, EVM_INS_PUSH25 = 120, EVM_INS_PUSH26 = 121, EVM_INS_PUSH27 = 122, EVM_INS_PUSH28 = 123, EVM_INS_PUSH29 = 124, EVM_INS_PUSH30 = 125, EVM_INS_PUSH31 = 126, EVM_INS_PUSH32 = 127, EVM_INS_DUP1 = 128, EVM_INS_DUP2 = 129, EVM_INS_DUP3 = 130, EVM_INS_DUP4 = 131, EVM_INS_DUP5 = 132, EVM_INS_DUP6 = 133, EVM_INS_DUP7 = 134, EVM_INS_DUP8 = 135, EVM_INS_DUP9 = 136, EVM_INS_DUP10 = 137, EVM_INS_DUP11 = 138, EVM_INS_DUP12 = 139, EVM_INS_DUP13 = 140, EVM_INS_DUP14 = 141, EVM_INS_DUP15 = 142, EVM_INS_DUP16 = 143, EVM_INS_SWAP1 = 144, EVM_INS_SWAP2 = 145, EVM_INS_SWAP3 = 146, EVM_INS_SWAP4 = 147, EVM_INS_SWAP5 = 148, EVM_INS_SWAP6 = 149, EVM_INS_SWAP7 = 150, EVM_INS_SWAP8 = 151, EVM_INS_SWAP9 = 152, EVM_INS_SWAP10 = 153, EVM_INS_SWAP11 = 154, EVM_INS_SWAP12 = 155, EVM_INS_SWAP13 = 156, EVM_INS_SWAP14 = 157, EVM_INS_SWAP15 = 158, EVM_INS_SWAP16 = 159, EVM_INS_LOG0 = 160, EVM_INS_LOG1 = 161, EVM_INS_LOG2 = 162, EVM_INS_LOG3 = 163, EVM_INS_LOG4 = 164, EVM_INS_CREATE = 240, EVM_INS_CALL = 241, EVM_INS_CALLCODE = 242, EVM_INS_RETURN = 243, EVM_INS_DELEGATECALL = 244, EVM_INS_CALLBLACKBOX = 245, EVM_INS_STATICCALL = 250, EVM_INS_REVERT = 253, EVM_INS_SUICIDE = 255, EVM_INS_INVALID = 512, EVM_INS_ENDING = 513, } pub mod evm_insn_group { #[doc = " Group of EVM instructions"] pub type Type = u32; #[doc = "< = CS_GRP_INVALID"] pub const EVM_GRP_INVALID: Type = 0; #[doc = "< all jump instructions"] pub const EVM_GRP_JUMP: Type = 1; #[doc = "< math instructions"] pub const EVM_GRP_MATH: Type = 8; #[doc = "< instructions write to stack"] pub const EVM_GRP_STACK_WRITE: Type = 9; #[doc = "< instructions read from stack"] pub const EVM_GRP_STACK_READ: Type = 10; #[doc = "< instructions write to memory"] pub const EVM_GRP_MEM_WRITE: Type = 11; #[doc = "< instructions read from memory"] pub const EVM_GRP_MEM_READ: Type = 12; #[doc = "< instructions write to storage"] pub const EVM_GRP_STORE_WRITE: Type = 13; #[doc = "< instructions read from storage"] pub const EVM_GRP_STORE_READ: Type = 14; #[doc = "< instructions halt execution"] pub const EVM_GRP_HALT: Type = 15; #[doc = "< <-- mark the end of the list of groups"] pub const EVM_GRP_ENDING: Type = 16; } #[doc = " NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON"] #[doc = " Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH))"] #[doc = " by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c"] #[doc = " if cs_detail changes, in particular if a field is added after the union,"] #[doc = " then update arch/ARCH/ARCHDisassembler.c accordingly"] #[repr(C)] #[derive(Copy)] pub struct cs_detail { #[doc = "< list of implicit registers read by this insn"] pub regs_read: [u16; 12usize], #[doc = "< number of implicit registers read by this insn"] pub regs_read_count: u8, #[doc = "< list of implicit registers modified by this insn"] pub regs_write: [u16; 20usize], #[doc = "< number of implicit registers modified by this insn"] pub regs_write_count: u8, #[doc = "< list of group this instruction belong to"] pub groups: [u8; 8usize], #[doc = "< number of groups this insn belongs to"] pub groups_count: u8, pub __bindgen_anon_1: cs_detail__bindgen_ty_1, } #[doc = " Architecture-specific instruction info"] #[repr(C)] #[derive(Copy)] pub union cs_detail__bindgen_ty_1 { #[doc = "< X86 architecture, including 16-bit, 32-bit & 64-bit mode"] pub x86: cs_x86, #[doc = "< ARM64 architecture (aka AArch64)"] pub arm64: cs_arm64, #[doc = "< ARM architecture (including Thumb/Thumb2)"] pub arm: cs_arm, #[doc = "< M68K architecture"] pub m68k: cs_m68k, #[doc = "< MIPS architecture"] pub mips: cs_mips, #[doc = "< PowerPC architecture"] pub ppc: cs_ppc, #[doc = "< Sparc architecture"] pub sparc: cs_sparc, #[doc = "< SystemZ architecture"] pub sysz: cs_sysz, #[doc = "< XCore architecture"] pub xcore: cs_xcore, #[doc = "< TMS320C64x architecture"] pub tms320c64x: cs_tms320c64x, #[doc = "< M680X architecture"] pub m680x: cs_m680x, #[doc = "< Ethereum architecture"] pub evm: cs_evm, _bindgen_union_align: [u64; 221usize], } impl Clone for cs_detail__bindgen_ty_1 { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_detail__bindgen_ty_1 { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write!(f, "cs_detail__bindgen_ty_1 {{ union }}") } } impl Clone for cs_detail { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_detail { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_detail {{ regs_read: {:?}, regs_read_count: {:?}, regs_write: {:?}, regs_write_count: {:?}, groups: {:?}, groups_count: {:?}, __bindgen_anon_1: {:?} }}" , self . regs_read , self . regs_read_count , self . regs_write , self . regs_write_count , self . groups , self . groups_count , self . __bindgen_anon_1 ) } } #[doc = " Detail information of disassembled instruction"] #[repr(C)] #[derive(Copy)] pub struct cs_insn { #[doc = " Instruction ID (basically a numeric ID for the instruction mnemonic)"] #[doc = " Find the instruction id in the '[ARCH]_insn' enum in the header file"] #[doc = " of corresponding architecture, such as 'arm_insn' in arm.h for ARM,"] #[doc = " 'x86_insn' in x86.h for X86, etc..."] #[doc = " This information is available even when CS_OPT_DETAIL = CS_OPT_OFF"] #[doc = " NOTE: in Skipdata mode, \"data\" instruction has 0 for this id field."] pub id: libc::c_uint, #[doc = " Address (EIP) of this instruction"] #[doc = " This information is available even when CS_OPT_DETAIL = CS_OPT_OFF"] pub address: u64, #[doc = " Size of this instruction"] #[doc = " This information is available even when CS_OPT_DETAIL = CS_OPT_OFF"] pub size: u16, #[doc = " Machine bytes of this instruction, with number of bytes indicated by @size above"] #[doc = " This information is available even when CS_OPT_DETAIL = CS_OPT_OFF"] pub bytes: [u8; 16usize], #[doc = " Ascii text of instruction mnemonic"] #[doc = " This information is available even when CS_OPT_DETAIL = CS_OPT_OFF"] pub mnemonic: [libc::c_char; 32usize], #[doc = " Ascii text of instruction operands"] #[doc = " This information is available even when CS_OPT_DETAIL = CS_OPT_OFF"] pub op_str: [libc::c_char; 160usize], #[doc = " Pointer to cs_detail."] #[doc = " NOTE: detail pointer is only valid when both requirements below are met:"] #[doc = " (1) CS_OP_DETAIL = CS_OPT_ON"] #[doc = " (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)"] #[doc = ""] #[doc = " NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer"] #[doc = " is not NULL, its content is still irrelevant."] pub detail: *mut cs_detail, } impl Clone for cs_insn { fn clone(&self) -> Self { *self } } impl ::core::fmt::Debug for cs_insn { fn fmt(&self, f: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { write ! ( f , "cs_insn {{ id: {:?}, address: {:?}, size: {:?}, bytes: {:?}, mnemonic: [...], op_str: [...], detail: {:?} }}" , self . id , self . address , self . size , self . bytes , self . detail ) } } pub mod cs_err { #[doc = " All type of errors encountered by Capstone API."] #[doc = " These are values returned by cs_errno()"] pub type Type = u32; #[doc = "< No error: everything was fine"] pub const CS_ERR_OK: Type = 0; #[doc = "< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()"] pub const CS_ERR_MEM: Type = 1; #[doc = "< Unsupported architecture: cs_open()"] pub const CS_ERR_ARCH: Type = 2; #[doc = "< Invalid handle: cs_op_count(), cs_op_index()"] pub const CS_ERR_HANDLE: Type = 3; #[doc = "< Invalid csh argument: cs_close(), cs_errno(), cs_option()"] pub const CS_ERR_CSH: Type = 4; #[doc = "< Invalid/unsupported mode: cs_open()"] pub const CS_ERR_MODE: Type = 5; #[doc = "< Invalid/unsupported option: cs_option()"] pub const CS_ERR_OPTION: Type = 6; #[doc = "< Information is unavailable because detail option is OFF"] pub const CS_ERR_DETAIL: Type = 7; #[doc = "< Dynamic memory management uninitialized (see CS_OPT_MEM)"] pub const CS_ERR_MEMSETUP: Type = 8; #[doc = "< Unsupported version (bindings)"] pub const CS_ERR_VERSION: Type = 9; #[doc = "< Access irrelevant data in \"diet\" engine"] pub const CS_ERR_DIET: Type = 10; #[doc = "< Access irrelevant data for \"data\" instruction in SKIPDATA mode"] pub const CS_ERR_SKIPDATA: Type = 11; #[doc = "< X86 AT&T syntax is unsupported (opt-out at compile time)"] pub const CS_ERR_X86_ATT: Type = 12; #[doc = "< X86 Intel syntax is unsupported (opt-out at compile time)"] pub const CS_ERR_X86_INTEL: Type = 13; #[doc = "< X86 Masm syntax is unsupported (opt-out at compile time)"] pub const CS_ERR_X86_MASM: Type = 14; } extern "C" { #[doc = "Return combined API version & major and minor version numbers."] #[doc = ""] #[doc = "@major: major number of API version"] #[doc = "@minor: minor number of API version"] #[doc = ""] #[doc = "@return hexical number as (major << 8 | minor), which encodes both"] #[doc = "major & minor versions."] #[doc = "NOTE: This returned value can be compared with version number made"] #[doc = "with macro CS_MAKE_VERSION"] #[doc = ""] #[doc = "For example, second API version would return 1 in @major, and 1 in @minor"] #[doc = "The return value would be 0x0101"] #[doc = ""] #[doc = "NOTE: if you only care about returned value, but not major and minor values,"] #[doc = "set both @major & @minor arguments to NULL."] pub fn cs_version(major: *mut libc::c_int, minor: *mut libc::c_int) -> libc::c_uint; } extern "C" { #[doc = "This API can be used to either ask for archs supported by this library,"] #[doc = "or check to see if the library was compile with 'diet' option (or called"] #[doc = "in 'diet' mode)."] #[doc = ""] #[doc = "To check if a particular arch is supported by this library, set @query to"] #[doc = "arch mode (CS_ARCH_* value)."] #[doc = "To verify if this library supports all the archs, use CS_ARCH_ALL."] #[doc = ""] #[doc = "To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET."] #[doc = ""] #[doc = "@return True if this library supports the given arch, or in 'diet' mode."] pub fn cs_support(query: libc::c_int) -> bool; } extern "C" { #[doc = "Initialize CS handle: this must be done before any usage of CS."] #[doc = ""] #[doc = "@arch: architecture type (CS_ARCH_*)"] #[doc = "@mode: hardware mode. This is combined of CS_MODE_*"] #[doc = "@handle: pointer to handle, which will be updated at return time"] #[doc = ""] #[doc = "@return CS_ERR_OK on success, or other value on failure (refer to cs_err enum"] #[doc = "for detailed error)."] pub fn cs_open(arch: cs_arch, mode: cs_mode, handle: *mut csh) -> cs_err::Type; } extern "C" { #[doc = "Close CS handle: MUST do to release the handle when it is not used anymore."] #[doc = "NOTE: this must be only called when there is no longer usage of Capstone,"] #[doc = "not even access to cs_insn array. The reason is the this API releases some"] #[doc = "cached memory, thus access to any Capstone API after cs_close() might crash"] #[doc = "your application."] #[doc = ""] #[doc = "In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0)."] #[doc = ""] #[doc = "@handle: pointer to a handle returned by cs_open()"] #[doc = ""] #[doc = "@return CS_ERR_OK on success, or other value on failure (refer to cs_err enum"] #[doc = "for detailed error)."] pub fn cs_close(handle: *mut csh) -> cs_err::Type; } extern "C" { #[doc = "Set option for disassembling engine at runtime"] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@type: type of option to be set"] #[doc = "@value: option value corresponding with @type"] #[doc = ""] #[doc = "@return: CS_ERR_OK on success, or other value on failure."] #[doc = "Refer to cs_err enum for detailed error."] #[doc = ""] #[doc = "NOTE: in the case of CS_OPT_MEM, handle's value can be anything,"] #[doc = "so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called"] #[doc = "even before cs_open()"] pub fn cs_option(handle: csh, type_: cs_opt_type, value: usize) -> cs_err::Type; } extern "C" { #[doc = "Report the last error number when some API function fail."] #[doc = "Like glibc's errno, cs_errno might not retain its old value once accessed."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = ""] #[doc = "@return: error code of cs_err enum type (CS_ERR_*, see above)"] pub fn cs_errno(handle: csh) -> cs_err::Type; } extern "C" { #[doc = "Return a string describing given error code."] #[doc = ""] #[doc = "@code: error code (see CS_ERR_* above)"] #[doc = ""] #[doc = "@return: returns a pointer to a string that describes the error code"] #[doc = "passed in the argument @code"] pub fn cs_strerror(code: cs_err::Type) -> *const libc::c_char; } extern "C" { #[doc = "Disassemble binary code, given the code buffer, size, address and number"] #[doc = "of instructions to be decoded."] #[doc = "This API dynamically allocate memory to contain disassembled instruction."] #[doc = "Resulting instructions will be put into @*insn"] #[doc = ""] #[doc = "NOTE 1: this API will automatically determine memory needed to contain"] #[doc = "output disassembled instructions in @insn."] #[doc = ""] #[doc = "NOTE 2: caller must free the allocated memory itself to avoid memory leaking."] #[doc = ""] #[doc = "NOTE 3: for system with scarce memory to be dynamically allocated such as"] #[doc = "OS kernel or firmware, the API cs_disasm_iter() might be a better choice than"] #[doc = "cs_disasm(). The reason is that with cs_disasm(), based on limited available"] #[doc = "memory, we have to calculate in advance how many instructions to be disassembled,"] #[doc = "which complicates things. This is especially troublesome for the case @count=0,"] #[doc = "when cs_disasm() runs uncontrollably (until either end of input buffer, or"] #[doc = "when it encounters an invalid instruction)."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@code: buffer containing raw binary code to be disassembled."] #[doc = "@code_size: size of the above code buffer."] #[doc = "@address: address of the first instruction in given raw code buffer."] #[doc = "@insn: array of instructions filled in by this API."] #[doc = "NOTE: @insn will be allocated by this function, and should be freed"] #[doc = "with cs_free() API."] #[doc = "@count: number of instructions to be disassembled, or 0 to get all of them"] #[doc = ""] #[doc = "@return: the number of successfully disassembled instructions,"] #[doc = "or 0 if this function failed to disassemble the given code"] #[doc = ""] #[doc = "On failure, call cs_errno() for error code."] pub fn cs_disasm( handle: csh, code: *const u8, code_size: usize, address: u64, count: usize, insn: *mut *mut cs_insn, ) -> usize; } extern "C" { #[doc = "Deprecated function - to be retired in the next version!"] #[doc = "Use cs_disasm() instead of cs_disasm_ex()"] pub fn cs_disasm_ex( handle: csh, code: *const u8, code_size: usize, address: u64, count: usize, insn: *mut *mut cs_insn, ) -> usize; } extern "C" { #[doc = "Free memory allocated by cs_malloc() or cs_disasm() (argument @insn)"] #[doc = ""] #[doc = "@insn: pointer returned by @insn argument in cs_disasm() or cs_malloc()"] #[doc = "@count: number of cs_insn structures returned by cs_disasm(), or 1"] #[doc = "to free memory allocated by cs_malloc()."] pub fn cs_free(insn: *mut cs_insn, count: usize); } extern "C" { #[doc = "Allocate memory for 1 instruction to be used by cs_disasm_iter()."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = ""] #[doc = "NOTE: when no longer in use, you can reclaim the memory allocated for"] #[doc = "this instruction with cs_free(insn, 1)"] pub fn cs_malloc(handle: csh) -> *mut cs_insn; } extern "C" { #[doc = "Fast API to disassemble binary code, given the code buffer, size, address"] #[doc = "and number of instructions to be decoded."] #[doc = "This API puts the resulting instruction into a given cache in @insn."] #[doc = "See tests/test_iter.c for sample code demonstrating this API."] #[doc = ""] #[doc = "NOTE 1: this API will update @code, @size & @address to point to the next"] #[doc = "instruction in the input buffer. Therefore, it is convenient to use"] #[doc = "cs_disasm_iter() inside a loop to quickly iterate all the instructions."] #[doc = "While decoding one instruction at a time can also be achieved with"] #[doc = "cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30%"] #[doc = "faster on random input."] #[doc = ""] #[doc = "NOTE 2: the cache in @insn can be created with cs_malloc() API."] #[doc = ""] #[doc = "NOTE 3: for system with scarce memory to be dynamically allocated such as"] #[doc = "OS kernel or firmware, this API is recommended over cs_disasm(), which"] #[doc = "allocates memory based on the number of instructions to be disassembled."] #[doc = "The reason is that with cs_disasm(), based on limited available memory,"] #[doc = "we have to calculate in advance how many instructions to be disassembled,"] #[doc = "which complicates things. This is especially troublesome for the case"] #[doc = "@count=0, when cs_disasm() runs uncontrollably (until either end of input"] #[doc = "buffer, or when it encounters an invalid instruction)."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@code: buffer containing raw binary code to be disassembled"] #[doc = "@size: size of above code"] #[doc = "@address: address of the first insn in given raw code buffer"] #[doc = "@insn: pointer to instruction to be filled in by this API."] #[doc = ""] #[doc = "@return: true if this API successfully decode 1 instruction,"] #[doc = "or false otherwise."] #[doc = ""] #[doc = "On failure, call cs_errno() for error code."] pub fn cs_disasm_iter( handle: csh, code: *mut *const u8, size: *mut usize, address: *mut u64, insn: *mut cs_insn, ) -> bool; } extern "C" { #[doc = "Return friendly name of register in a string."] #[doc = "Find the instruction id from header file of corresponding architecture (arm.h for ARM,"] #[doc = "x86.h for X86, ...)"] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because engine does not"] #[doc = "store register name."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@reg_id: register id"] #[doc = ""] #[doc = "@return: string name of the register, or NULL if @reg_id is invalid."] pub fn cs_reg_name(handle: csh, reg_id: libc::c_uint) -> *const libc::c_char; } extern "C" { #[doc = "Return friendly name of an instruction in a string."] #[doc = "Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because the engine does not"] #[doc = "store instruction name."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@insn_id: instruction id"] #[doc = ""] #[doc = "@return: string name of the instruction, or NULL if @insn_id is invalid."] pub fn cs_insn_name(handle: csh, insn_id: libc::c_uint) -> *const libc::c_char; } extern "C" { #[doc = "Return friendly name of a group id (that an instruction can belong to)"] #[doc = "Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because the engine does not"] #[doc = "store group name."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@group_id: group id"] #[doc = ""] #[doc = "@return: string name of the group, or NULL if @group_id is invalid."] pub fn cs_group_name(handle: csh, group_id: libc::c_uint) -> *const libc::c_char; } extern "C" { #[doc = "Check if a disassembled instruction belong to a particular group."] #[doc = "Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = "Internally, this simply verifies if @group_id matches any member of insn->groups array."] #[doc = ""] #[doc = "NOTE: this API is only valid when detail option is ON (which is OFF by default)."] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because the engine does not"] #[doc = "update @groups array."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()"] #[doc = "@group_id: group that you want to check if this instruction belong to."] #[doc = ""] #[doc = "@return: true if this instruction indeed belongs to the given group, or false otherwise."] pub fn cs_insn_group(handle: csh, insn: *const cs_insn, group_id: libc::c_uint) -> bool; } extern "C" { #[doc = "Check if a disassembled instruction IMPLICITLY used a particular register."] #[doc = "Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = "Internally, this simply verifies if @reg_id matches any member of insn->regs_read array."] #[doc = ""] #[doc = "NOTE: this API is only valid when detail option is ON (which is OFF by default)"] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because the engine does not"] #[doc = "update @regs_read array."] #[doc = ""] #[doc = "@insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()"] #[doc = "@reg_id: register that you want to check if this instruction used it."] #[doc = ""] #[doc = "@return: true if this instruction indeed implicitly used the given register, or false otherwise."] pub fn cs_reg_read(handle: csh, insn: *const cs_insn, reg_id: libc::c_uint) -> bool; } extern "C" { #[doc = "Check if a disassembled instruction IMPLICITLY modified a particular register."] #[doc = "Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = "Internally, this simply verifies if @reg_id matches any member of insn->regs_write array."] #[doc = ""] #[doc = "NOTE: this API is only valid when detail option is ON (which is OFF by default)"] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because the engine does not"] #[doc = "update @regs_write array."] #[doc = ""] #[doc = "@insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()"] #[doc = "@reg_id: register that you want to check if this instruction modified it."] #[doc = ""] #[doc = "@return: true if this instruction indeed implicitly modified the given register, or false otherwise."] pub fn cs_reg_write(handle: csh, insn: *const cs_insn, reg_id: libc::c_uint) -> bool; } extern "C" { #[doc = "Count the number of operands of a given type."] #[doc = "Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = ""] #[doc = "NOTE: this API is only valid when detail option is ON (which is OFF by default)"] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()"] #[doc = "@op_type: Operand type to be found."] #[doc = ""] #[doc = "@return: number of operands of given type @op_type in instruction @insn,"] #[doc = "or -1 on failure."] pub fn cs_op_count(handle: csh, insn: *const cs_insn, op_type: libc::c_uint) -> libc::c_int; } extern "C" { #[doc = "Retrieve the position of operand of given type in .operands[] array."] #[doc = "Later, the operand can be accessed using the returned position."] #[doc = "Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)"] #[doc = ""] #[doc = "NOTE: this API is only valid when detail option is ON (which is OFF by default)"] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()"] #[doc = "@op_type: Operand type to be found."] #[doc = "@position: position of the operand to be found. This must be in the range"] #[doc = "[1, cs_op_count(handle, insn, op_type)]"] #[doc = ""] #[doc = "@return: index of operand of given type @op_type in .operands[] array"] #[doc = "in instruction @insn, or -1 on failure."] pub fn cs_op_index( handle: csh, insn: *const cs_insn, op_type: libc::c_uint, position: libc::c_uint, ) -> libc::c_int; } #[doc = " Type of array to keep the list of registers"] pub type cs_regs = [u16; 64usize]; extern "C" { #[doc = "Retrieve all the registers accessed by an instruction, either explicitly or"] #[doc = "implicitly."] #[doc = ""] #[doc = "WARN: when in 'diet' mode, this API is irrelevant because engine does not"] #[doc = "store registers."] #[doc = ""] #[doc = "@handle: handle returned by cs_open()"] #[doc = "@insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter()"] #[doc = "@regs_read: on return, this array contains all registers read by instruction."] #[doc = "@regs_read_count: number of registers kept inside @regs_read array."] #[doc = "@regs_write: on return, this array contains all registers written by instruction."] #[doc = "@regs_write_count: number of registers kept inside @regs_write array."] #[doc = ""] #[doc = "@return CS_ERR_OK on success, or other value on failure (refer to cs_err enum"] #[doc = "for detailed error)."] pub fn cs_regs_access( handle: csh, insn: *const cs_insn, regs_read: *mut u16, regs_read_count: *mut u8, regs_write: *mut u16, regs_write_count: *mut u8, ) -> cs_err::Type; } pub type __builtin_va_list = [__va_list_tag; 1usize]; #[repr(C)] #[derive(Debug, Copy)] pub struct __va_list_tag { pub gp_offset: libc::c_uint, pub fp_offset: libc::c_uint, pub overflow_arg_area: *mut libc::c_void, pub reg_save_area: *mut libc::c_void, } impl Clone for __va_list_tag { fn clone(&self) -> Self { *self } } capstone-sys-0.11.0/pre_generated/capstone_archs_impl.rs010066400017500001750000010655351363403360200216520ustar0000000000000000use core::convert::From; impl From for arm_insn { fn from(id: u32) -> Self { match id { 0 => arm_insn::ARM_INS_INVALID, 1 => arm_insn::ARM_INS_ADC, 2 => arm_insn::ARM_INS_ADD, 3 => arm_insn::ARM_INS_ADR, 4 => arm_insn::ARM_INS_AESD, 5 => arm_insn::ARM_INS_AESE, 6 => arm_insn::ARM_INS_AESIMC, 7 => arm_insn::ARM_INS_AESMC, 8 => arm_insn::ARM_INS_AND, 9 => arm_insn::ARM_INS_BFC, 10 => arm_insn::ARM_INS_BFI, 11 => arm_insn::ARM_INS_BIC, 12 => arm_insn::ARM_INS_BKPT, 13 => arm_insn::ARM_INS_BL, 14 => arm_insn::ARM_INS_BLX, 15 => arm_insn::ARM_INS_BX, 16 => arm_insn::ARM_INS_BXJ, 17 => arm_insn::ARM_INS_B, 18 => arm_insn::ARM_INS_CDP, 19 => arm_insn::ARM_INS_CDP2, 20 => arm_insn::ARM_INS_CLREX, 21 => arm_insn::ARM_INS_CLZ, 22 => arm_insn::ARM_INS_CMN, 23 => arm_insn::ARM_INS_CMP, 24 => arm_insn::ARM_INS_CPS, 25 => arm_insn::ARM_INS_CRC32B, 26 => arm_insn::ARM_INS_CRC32CB, 27 => arm_insn::ARM_INS_CRC32CH, 28 => arm_insn::ARM_INS_CRC32CW, 29 => arm_insn::ARM_INS_CRC32H, 30 => arm_insn::ARM_INS_CRC32W, 31 => arm_insn::ARM_INS_DBG, 32 => arm_insn::ARM_INS_DMB, 33 => arm_insn::ARM_INS_DSB, 34 => arm_insn::ARM_INS_EOR, 35 => arm_insn::ARM_INS_ERET, 36 => arm_insn::ARM_INS_VMOV, 37 => arm_insn::ARM_INS_FLDMDBX, 38 => arm_insn::ARM_INS_FLDMIAX, 39 => arm_insn::ARM_INS_VMRS, 40 => arm_insn::ARM_INS_FSTMDBX, 41 => arm_insn::ARM_INS_FSTMIAX, 42 => arm_insn::ARM_INS_HINT, 43 => arm_insn::ARM_INS_HLT, 44 => arm_insn::ARM_INS_HVC, 45 => arm_insn::ARM_INS_ISB, 46 => arm_insn::ARM_INS_LDA, 47 => arm_insn::ARM_INS_LDAB, 48 => arm_insn::ARM_INS_LDAEX, 49 => arm_insn::ARM_INS_LDAEXB, 50 => arm_insn::ARM_INS_LDAEXD, 51 => arm_insn::ARM_INS_LDAEXH, 52 => arm_insn::ARM_INS_LDAH, 53 => arm_insn::ARM_INS_LDC2L, 54 => arm_insn::ARM_INS_LDC2, 55 => arm_insn::ARM_INS_LDCL, 56 => arm_insn::ARM_INS_LDC, 57 => arm_insn::ARM_INS_LDMDA, 58 => arm_insn::ARM_INS_LDMDB, 59 => arm_insn::ARM_INS_LDM, 60 => arm_insn::ARM_INS_LDMIB, 61 => arm_insn::ARM_INS_LDRBT, 62 => arm_insn::ARM_INS_LDRB, 63 => arm_insn::ARM_INS_LDRD, 64 => arm_insn::ARM_INS_LDREX, 65 => arm_insn::ARM_INS_LDREXB, 66 => arm_insn::ARM_INS_LDREXD, 67 => arm_insn::ARM_INS_LDREXH, 68 => arm_insn::ARM_INS_LDRH, 69 => arm_insn::ARM_INS_LDRHT, 70 => arm_insn::ARM_INS_LDRSB, 71 => arm_insn::ARM_INS_LDRSBT, 72 => arm_insn::ARM_INS_LDRSH, 73 => arm_insn::ARM_INS_LDRSHT, 74 => arm_insn::ARM_INS_LDRT, 75 => arm_insn::ARM_INS_LDR, 76 => arm_insn::ARM_INS_MCR, 77 => arm_insn::ARM_INS_MCR2, 78 => arm_insn::ARM_INS_MCRR, 79 => arm_insn::ARM_INS_MCRR2, 80 => arm_insn::ARM_INS_MLA, 81 => arm_insn::ARM_INS_MLS, 82 => arm_insn::ARM_INS_MOV, 83 => arm_insn::ARM_INS_MOVT, 84 => arm_insn::ARM_INS_MOVW, 85 => arm_insn::ARM_INS_MRC, 86 => arm_insn::ARM_INS_MRC2, 87 => arm_insn::ARM_INS_MRRC, 88 => arm_insn::ARM_INS_MRRC2, 89 => arm_insn::ARM_INS_MRS, 90 => arm_insn::ARM_INS_MSR, 91 => arm_insn::ARM_INS_MUL, 92 => arm_insn::ARM_INS_MVN, 93 => arm_insn::ARM_INS_ORR, 94 => arm_insn::ARM_INS_PKHBT, 95 => arm_insn::ARM_INS_PKHTB, 96 => arm_insn::ARM_INS_PLDW, 97 => arm_insn::ARM_INS_PLD, 98 => arm_insn::ARM_INS_PLI, 99 => arm_insn::ARM_INS_QADD, 100 => arm_insn::ARM_INS_QADD16, 101 => arm_insn::ARM_INS_QADD8, 102 => arm_insn::ARM_INS_QASX, 103 => arm_insn::ARM_INS_QDADD, 104 => arm_insn::ARM_INS_QDSUB, 105 => arm_insn::ARM_INS_QSAX, 106 => arm_insn::ARM_INS_QSUB, 107 => arm_insn::ARM_INS_QSUB16, 108 => arm_insn::ARM_INS_QSUB8, 109 => arm_insn::ARM_INS_RBIT, 110 => arm_insn::ARM_INS_REV, 111 => arm_insn::ARM_INS_REV16, 112 => arm_insn::ARM_INS_REVSH, 113 => arm_insn::ARM_INS_RFEDA, 114 => arm_insn::ARM_INS_RFEDB, 115 => arm_insn::ARM_INS_RFEIA, 116 => arm_insn::ARM_INS_RFEIB, 117 => arm_insn::ARM_INS_RSB, 118 => arm_insn::ARM_INS_RSC, 119 => arm_insn::ARM_INS_SADD16, 120 => arm_insn::ARM_INS_SADD8, 121 => arm_insn::ARM_INS_SASX, 122 => arm_insn::ARM_INS_SBC, 123 => arm_insn::ARM_INS_SBFX, 124 => arm_insn::ARM_INS_SDIV, 125 => arm_insn::ARM_INS_SEL, 126 => arm_insn::ARM_INS_SETEND, 127 => arm_insn::ARM_INS_SHA1C, 128 => arm_insn::ARM_INS_SHA1H, 129 => arm_insn::ARM_INS_SHA1M, 130 => arm_insn::ARM_INS_SHA1P, 131 => arm_insn::ARM_INS_SHA1SU0, 132 => arm_insn::ARM_INS_SHA1SU1, 133 => arm_insn::ARM_INS_SHA256H, 134 => arm_insn::ARM_INS_SHA256H2, 135 => arm_insn::ARM_INS_SHA256SU0, 136 => arm_insn::ARM_INS_SHA256SU1, 137 => arm_insn::ARM_INS_SHADD16, 138 => arm_insn::ARM_INS_SHADD8, 139 => arm_insn::ARM_INS_SHASX, 140 => arm_insn::ARM_INS_SHSAX, 141 => arm_insn::ARM_INS_SHSUB16, 142 => arm_insn::ARM_INS_SHSUB8, 143 => arm_insn::ARM_INS_SMC, 144 => arm_insn::ARM_INS_SMLABB, 145 => arm_insn::ARM_INS_SMLABT, 146 => arm_insn::ARM_INS_SMLAD, 147 => arm_insn::ARM_INS_SMLADX, 148 => arm_insn::ARM_INS_SMLAL, 149 => arm_insn::ARM_INS_SMLALBB, 150 => arm_insn::ARM_INS_SMLALBT, 151 => arm_insn::ARM_INS_SMLALD, 152 => arm_insn::ARM_INS_SMLALDX, 153 => arm_insn::ARM_INS_SMLALTB, 154 => arm_insn::ARM_INS_SMLALTT, 155 => arm_insn::ARM_INS_SMLATB, 156 => arm_insn::ARM_INS_SMLATT, 157 => arm_insn::ARM_INS_SMLAWB, 158 => arm_insn::ARM_INS_SMLAWT, 159 => arm_insn::ARM_INS_SMLSD, 160 => arm_insn::ARM_INS_SMLSDX, 161 => arm_insn::ARM_INS_SMLSLD, 162 => arm_insn::ARM_INS_SMLSLDX, 163 => arm_insn::ARM_INS_SMMLA, 164 => arm_insn::ARM_INS_SMMLAR, 165 => arm_insn::ARM_INS_SMMLS, 166 => arm_insn::ARM_INS_SMMLSR, 167 => arm_insn::ARM_INS_SMMUL, 168 => arm_insn::ARM_INS_SMMULR, 169 => arm_insn::ARM_INS_SMUAD, 170 => arm_insn::ARM_INS_SMUADX, 171 => arm_insn::ARM_INS_SMULBB, 172 => arm_insn::ARM_INS_SMULBT, 173 => arm_insn::ARM_INS_SMULL, 174 => arm_insn::ARM_INS_SMULTB, 175 => arm_insn::ARM_INS_SMULTT, 176 => arm_insn::ARM_INS_SMULWB, 177 => arm_insn::ARM_INS_SMULWT, 178 => arm_insn::ARM_INS_SMUSD, 179 => arm_insn::ARM_INS_SMUSDX, 180 => arm_insn::ARM_INS_SRSDA, 181 => arm_insn::ARM_INS_SRSDB, 182 => arm_insn::ARM_INS_SRSIA, 183 => arm_insn::ARM_INS_SRSIB, 184 => arm_insn::ARM_INS_SSAT, 185 => arm_insn::ARM_INS_SSAT16, 186 => arm_insn::ARM_INS_SSAX, 187 => arm_insn::ARM_INS_SSUB16, 188 => arm_insn::ARM_INS_SSUB8, 189 => arm_insn::ARM_INS_STC2L, 190 => arm_insn::ARM_INS_STC2, 191 => arm_insn::ARM_INS_STCL, 192 => arm_insn::ARM_INS_STC, 193 => arm_insn::ARM_INS_STL, 194 => arm_insn::ARM_INS_STLB, 195 => arm_insn::ARM_INS_STLEX, 196 => arm_insn::ARM_INS_STLEXB, 197 => arm_insn::ARM_INS_STLEXD, 198 => arm_insn::ARM_INS_STLEXH, 199 => arm_insn::ARM_INS_STLH, 200 => arm_insn::ARM_INS_STMDA, 201 => arm_insn::ARM_INS_STMDB, 202 => arm_insn::ARM_INS_STM, 203 => arm_insn::ARM_INS_STMIB, 204 => arm_insn::ARM_INS_STRBT, 205 => arm_insn::ARM_INS_STRB, 206 => arm_insn::ARM_INS_STRD, 207 => arm_insn::ARM_INS_STREX, 208 => arm_insn::ARM_INS_STREXB, 209 => arm_insn::ARM_INS_STREXD, 210 => arm_insn::ARM_INS_STREXH, 211 => arm_insn::ARM_INS_STRH, 212 => arm_insn::ARM_INS_STRHT, 213 => arm_insn::ARM_INS_STRT, 214 => arm_insn::ARM_INS_STR, 215 => arm_insn::ARM_INS_SUB, 216 => arm_insn::ARM_INS_SVC, 217 => arm_insn::ARM_INS_SWP, 218 => arm_insn::ARM_INS_SWPB, 219 => arm_insn::ARM_INS_SXTAB, 220 => arm_insn::ARM_INS_SXTAB16, 221 => arm_insn::ARM_INS_SXTAH, 222 => arm_insn::ARM_INS_SXTB, 223 => arm_insn::ARM_INS_SXTB16, 224 => arm_insn::ARM_INS_SXTH, 225 => arm_insn::ARM_INS_TEQ, 226 => arm_insn::ARM_INS_TRAP, 227 => arm_insn::ARM_INS_TST, 228 => arm_insn::ARM_INS_UADD16, 229 => arm_insn::ARM_INS_UADD8, 230 => arm_insn::ARM_INS_UASX, 231 => arm_insn::ARM_INS_UBFX, 232 => arm_insn::ARM_INS_UDF, 233 => arm_insn::ARM_INS_UDIV, 234 => arm_insn::ARM_INS_UHADD16, 235 => arm_insn::ARM_INS_UHADD8, 236 => arm_insn::ARM_INS_UHASX, 237 => arm_insn::ARM_INS_UHSAX, 238 => arm_insn::ARM_INS_UHSUB16, 239 => arm_insn::ARM_INS_UHSUB8, 240 => arm_insn::ARM_INS_UMAAL, 241 => arm_insn::ARM_INS_UMLAL, 242 => arm_insn::ARM_INS_UMULL, 243 => arm_insn::ARM_INS_UQADD16, 244 => arm_insn::ARM_INS_UQADD8, 245 => arm_insn::ARM_INS_UQASX, 246 => arm_insn::ARM_INS_UQSAX, 247 => arm_insn::ARM_INS_UQSUB16, 248 => arm_insn::ARM_INS_UQSUB8, 249 => arm_insn::ARM_INS_USAD8, 250 => arm_insn::ARM_INS_USADA8, 251 => arm_insn::ARM_INS_USAT, 252 => arm_insn::ARM_INS_USAT16, 253 => arm_insn::ARM_INS_USAX, 254 => arm_insn::ARM_INS_USUB16, 255 => arm_insn::ARM_INS_USUB8, 256 => arm_insn::ARM_INS_UXTAB, 257 => arm_insn::ARM_INS_UXTAB16, 258 => arm_insn::ARM_INS_UXTAH, 259 => arm_insn::ARM_INS_UXTB, 260 => arm_insn::ARM_INS_UXTB16, 261 => arm_insn::ARM_INS_UXTH, 262 => arm_insn::ARM_INS_VABAL, 263 => arm_insn::ARM_INS_VABA, 264 => arm_insn::ARM_INS_VABDL, 265 => arm_insn::ARM_INS_VABD, 266 => arm_insn::ARM_INS_VABS, 267 => arm_insn::ARM_INS_VACGE, 268 => arm_insn::ARM_INS_VACGT, 269 => arm_insn::ARM_INS_VADD, 270 => arm_insn::ARM_INS_VADDHN, 271 => arm_insn::ARM_INS_VADDL, 272 => arm_insn::ARM_INS_VADDW, 273 => arm_insn::ARM_INS_VAND, 274 => arm_insn::ARM_INS_VBIC, 275 => arm_insn::ARM_INS_VBIF, 276 => arm_insn::ARM_INS_VBIT, 277 => arm_insn::ARM_INS_VBSL, 278 => arm_insn::ARM_INS_VCEQ, 279 => arm_insn::ARM_INS_VCGE, 280 => arm_insn::ARM_INS_VCGT, 281 => arm_insn::ARM_INS_VCLE, 282 => arm_insn::ARM_INS_VCLS, 283 => arm_insn::ARM_INS_VCLT, 284 => arm_insn::ARM_INS_VCLZ, 285 => arm_insn::ARM_INS_VCMP, 286 => arm_insn::ARM_INS_VCMPE, 287 => arm_insn::ARM_INS_VCNT, 288 => arm_insn::ARM_INS_VCVTA, 289 => arm_insn::ARM_INS_VCVTB, 290 => arm_insn::ARM_INS_VCVT, 291 => arm_insn::ARM_INS_VCVTM, 292 => arm_insn::ARM_INS_VCVTN, 293 => arm_insn::ARM_INS_VCVTP, 294 => arm_insn::ARM_INS_VCVTT, 295 => arm_insn::ARM_INS_VDIV, 296 => arm_insn::ARM_INS_VDUP, 297 => arm_insn::ARM_INS_VEOR, 298 => arm_insn::ARM_INS_VEXT, 299 => arm_insn::ARM_INS_VFMA, 300 => arm_insn::ARM_INS_VFMS, 301 => arm_insn::ARM_INS_VFNMA, 302 => arm_insn::ARM_INS_VFNMS, 303 => arm_insn::ARM_INS_VHADD, 304 => arm_insn::ARM_INS_VHSUB, 305 => arm_insn::ARM_INS_VLD1, 306 => arm_insn::ARM_INS_VLD2, 307 => arm_insn::ARM_INS_VLD3, 308 => arm_insn::ARM_INS_VLD4, 309 => arm_insn::ARM_INS_VLDMDB, 310 => arm_insn::ARM_INS_VLDMIA, 311 => arm_insn::ARM_INS_VLDR, 312 => arm_insn::ARM_INS_VMAXNM, 313 => arm_insn::ARM_INS_VMAX, 314 => arm_insn::ARM_INS_VMINNM, 315 => arm_insn::ARM_INS_VMIN, 316 => arm_insn::ARM_INS_VMLA, 317 => arm_insn::ARM_INS_VMLAL, 318 => arm_insn::ARM_INS_VMLS, 319 => arm_insn::ARM_INS_VMLSL, 320 => arm_insn::ARM_INS_VMOVL, 321 => arm_insn::ARM_INS_VMOVN, 322 => arm_insn::ARM_INS_VMSR, 323 => arm_insn::ARM_INS_VMUL, 324 => arm_insn::ARM_INS_VMULL, 325 => arm_insn::ARM_INS_VMVN, 326 => arm_insn::ARM_INS_VNEG, 327 => arm_insn::ARM_INS_VNMLA, 328 => arm_insn::ARM_INS_VNMLS, 329 => arm_insn::ARM_INS_VNMUL, 330 => arm_insn::ARM_INS_VORN, 331 => arm_insn::ARM_INS_VORR, 332 => arm_insn::ARM_INS_VPADAL, 333 => arm_insn::ARM_INS_VPADDL, 334 => arm_insn::ARM_INS_VPADD, 335 => arm_insn::ARM_INS_VPMAX, 336 => arm_insn::ARM_INS_VPMIN, 337 => arm_insn::ARM_INS_VQABS, 338 => arm_insn::ARM_INS_VQADD, 339 => arm_insn::ARM_INS_VQDMLAL, 340 => arm_insn::ARM_INS_VQDMLSL, 341 => arm_insn::ARM_INS_VQDMULH, 342 => arm_insn::ARM_INS_VQDMULL, 343 => arm_insn::ARM_INS_VQMOVUN, 344 => arm_insn::ARM_INS_VQMOVN, 345 => arm_insn::ARM_INS_VQNEG, 346 => arm_insn::ARM_INS_VQRDMULH, 347 => arm_insn::ARM_INS_VQRSHL, 348 => arm_insn::ARM_INS_VQRSHRN, 349 => arm_insn::ARM_INS_VQRSHRUN, 350 => arm_insn::ARM_INS_VQSHL, 351 => arm_insn::ARM_INS_VQSHLU, 352 => arm_insn::ARM_INS_VQSHRN, 353 => arm_insn::ARM_INS_VQSHRUN, 354 => arm_insn::ARM_INS_VQSUB, 355 => arm_insn::ARM_INS_VRADDHN, 356 => arm_insn::ARM_INS_VRECPE, 357 => arm_insn::ARM_INS_VRECPS, 358 => arm_insn::ARM_INS_VREV16, 359 => arm_insn::ARM_INS_VREV32, 360 => arm_insn::ARM_INS_VREV64, 361 => arm_insn::ARM_INS_VRHADD, 362 => arm_insn::ARM_INS_VRINTA, 363 => arm_insn::ARM_INS_VRINTM, 364 => arm_insn::ARM_INS_VRINTN, 365 => arm_insn::ARM_INS_VRINTP, 366 => arm_insn::ARM_INS_VRINTR, 367 => arm_insn::ARM_INS_VRINTX, 368 => arm_insn::ARM_INS_VRINTZ, 369 => arm_insn::ARM_INS_VRSHL, 370 => arm_insn::ARM_INS_VRSHRN, 371 => arm_insn::ARM_INS_VRSHR, 372 => arm_insn::ARM_INS_VRSQRTE, 373 => arm_insn::ARM_INS_VRSQRTS, 374 => arm_insn::ARM_INS_VRSRA, 375 => arm_insn::ARM_INS_VRSUBHN, 376 => arm_insn::ARM_INS_VSELEQ, 377 => arm_insn::ARM_INS_VSELGE, 378 => arm_insn::ARM_INS_VSELGT, 379 => arm_insn::ARM_INS_VSELVS, 380 => arm_insn::ARM_INS_VSHLL, 381 => arm_insn::ARM_INS_VSHL, 382 => arm_insn::ARM_INS_VSHRN, 383 => arm_insn::ARM_INS_VSHR, 384 => arm_insn::ARM_INS_VSLI, 385 => arm_insn::ARM_INS_VSQRT, 386 => arm_insn::ARM_INS_VSRA, 387 => arm_insn::ARM_INS_VSRI, 388 => arm_insn::ARM_INS_VST1, 389 => arm_insn::ARM_INS_VST2, 390 => arm_insn::ARM_INS_VST3, 391 => arm_insn::ARM_INS_VST4, 392 => arm_insn::ARM_INS_VSTMDB, 393 => arm_insn::ARM_INS_VSTMIA, 394 => arm_insn::ARM_INS_VSTR, 395 => arm_insn::ARM_INS_VSUB, 396 => arm_insn::ARM_INS_VSUBHN, 397 => arm_insn::ARM_INS_VSUBL, 398 => arm_insn::ARM_INS_VSUBW, 399 => arm_insn::ARM_INS_VSWP, 400 => arm_insn::ARM_INS_VTBL, 401 => arm_insn::ARM_INS_VTBX, 402 => arm_insn::ARM_INS_VCVTR, 403 => arm_insn::ARM_INS_VTRN, 404 => arm_insn::ARM_INS_VTST, 405 => arm_insn::ARM_INS_VUZP, 406 => arm_insn::ARM_INS_VZIP, 407 => arm_insn::ARM_INS_ADDW, 408 => arm_insn::ARM_INS_ASR, 409 => arm_insn::ARM_INS_DCPS1, 410 => arm_insn::ARM_INS_DCPS2, 411 => arm_insn::ARM_INS_DCPS3, 412 => arm_insn::ARM_INS_IT, 413 => arm_insn::ARM_INS_LSL, 414 => arm_insn::ARM_INS_LSR, 415 => arm_insn::ARM_INS_ORN, 416 => arm_insn::ARM_INS_ROR, 417 => arm_insn::ARM_INS_RRX, 418 => arm_insn::ARM_INS_SUBW, 419 => arm_insn::ARM_INS_TBB, 420 => arm_insn::ARM_INS_TBH, 421 => arm_insn::ARM_INS_CBNZ, 422 => arm_insn::ARM_INS_CBZ, 423 => arm_insn::ARM_INS_POP, 424 => arm_insn::ARM_INS_PUSH, 425 => arm_insn::ARM_INS_NOP, 426 => arm_insn::ARM_INS_YIELD, 427 => arm_insn::ARM_INS_WFE, 428 => arm_insn::ARM_INS_WFI, 429 => arm_insn::ARM_INS_SEV, 430 => arm_insn::ARM_INS_SEVL, 431 => arm_insn::ARM_INS_VPUSH, 432 => arm_insn::ARM_INS_VPOP, 433 => arm_insn::ARM_INS_ENDING, _ => arm_insn::ARM_INS_INVALID, } } } impl From for arm64_insn { fn from(id: u32) -> Self { match id { 0 => arm64_insn::ARM64_INS_INVALID, 1 => arm64_insn::ARM64_INS_ABS, 2 => arm64_insn::ARM64_INS_ADC, 3 => arm64_insn::ARM64_INS_ADDHN, 4 => arm64_insn::ARM64_INS_ADDHN2, 5 => arm64_insn::ARM64_INS_ADDP, 6 => arm64_insn::ARM64_INS_ADD, 7 => arm64_insn::ARM64_INS_ADDV, 8 => arm64_insn::ARM64_INS_ADR, 9 => arm64_insn::ARM64_INS_ADRP, 10 => arm64_insn::ARM64_INS_AESD, 11 => arm64_insn::ARM64_INS_AESE, 12 => arm64_insn::ARM64_INS_AESIMC, 13 => arm64_insn::ARM64_INS_AESMC, 14 => arm64_insn::ARM64_INS_AND, 15 => arm64_insn::ARM64_INS_ASR, 16 => arm64_insn::ARM64_INS_B, 17 => arm64_insn::ARM64_INS_BFM, 18 => arm64_insn::ARM64_INS_BIC, 19 => arm64_insn::ARM64_INS_BIF, 20 => arm64_insn::ARM64_INS_BIT, 21 => arm64_insn::ARM64_INS_BL, 22 => arm64_insn::ARM64_INS_BLR, 23 => arm64_insn::ARM64_INS_BR, 24 => arm64_insn::ARM64_INS_BRK, 25 => arm64_insn::ARM64_INS_BSL, 26 => arm64_insn::ARM64_INS_CBNZ, 27 => arm64_insn::ARM64_INS_CBZ, 28 => arm64_insn::ARM64_INS_CCMN, 29 => arm64_insn::ARM64_INS_CCMP, 30 => arm64_insn::ARM64_INS_CLREX, 31 => arm64_insn::ARM64_INS_CLS, 32 => arm64_insn::ARM64_INS_CLZ, 33 => arm64_insn::ARM64_INS_CMEQ, 34 => arm64_insn::ARM64_INS_CMGE, 35 => arm64_insn::ARM64_INS_CMGT, 36 => arm64_insn::ARM64_INS_CMHI, 37 => arm64_insn::ARM64_INS_CMHS, 38 => arm64_insn::ARM64_INS_CMLE, 39 => arm64_insn::ARM64_INS_CMLT, 40 => arm64_insn::ARM64_INS_CMTST, 41 => arm64_insn::ARM64_INS_CNT, 42 => arm64_insn::ARM64_INS_MOV, 43 => arm64_insn::ARM64_INS_CRC32B, 44 => arm64_insn::ARM64_INS_CRC32CB, 45 => arm64_insn::ARM64_INS_CRC32CH, 46 => arm64_insn::ARM64_INS_CRC32CW, 47 => arm64_insn::ARM64_INS_CRC32CX, 48 => arm64_insn::ARM64_INS_CRC32H, 49 => arm64_insn::ARM64_INS_CRC32W, 50 => arm64_insn::ARM64_INS_CRC32X, 51 => arm64_insn::ARM64_INS_CSEL, 52 => arm64_insn::ARM64_INS_CSINC, 53 => arm64_insn::ARM64_INS_CSINV, 54 => arm64_insn::ARM64_INS_CSNEG, 55 => arm64_insn::ARM64_INS_DCPS1, 56 => arm64_insn::ARM64_INS_DCPS2, 57 => arm64_insn::ARM64_INS_DCPS3, 58 => arm64_insn::ARM64_INS_DMB, 59 => arm64_insn::ARM64_INS_DRPS, 60 => arm64_insn::ARM64_INS_DSB, 61 => arm64_insn::ARM64_INS_DUP, 62 => arm64_insn::ARM64_INS_EON, 63 => arm64_insn::ARM64_INS_EOR, 64 => arm64_insn::ARM64_INS_ERET, 65 => arm64_insn::ARM64_INS_EXTR, 66 => arm64_insn::ARM64_INS_EXT, 67 => arm64_insn::ARM64_INS_FABD, 68 => arm64_insn::ARM64_INS_FABS, 69 => arm64_insn::ARM64_INS_FACGE, 70 => arm64_insn::ARM64_INS_FACGT, 71 => arm64_insn::ARM64_INS_FADD, 72 => arm64_insn::ARM64_INS_FADDP, 73 => arm64_insn::ARM64_INS_FCCMP, 74 => arm64_insn::ARM64_INS_FCCMPE, 75 => arm64_insn::ARM64_INS_FCMEQ, 76 => arm64_insn::ARM64_INS_FCMGE, 77 => arm64_insn::ARM64_INS_FCMGT, 78 => arm64_insn::ARM64_INS_FCMLE, 79 => arm64_insn::ARM64_INS_FCMLT, 80 => arm64_insn::ARM64_INS_FCMP, 81 => arm64_insn::ARM64_INS_FCMPE, 82 => arm64_insn::ARM64_INS_FCSEL, 83 => arm64_insn::ARM64_INS_FCVTAS, 84 => arm64_insn::ARM64_INS_FCVTAU, 85 => arm64_insn::ARM64_INS_FCVT, 86 => arm64_insn::ARM64_INS_FCVTL, 87 => arm64_insn::ARM64_INS_FCVTL2, 88 => arm64_insn::ARM64_INS_FCVTMS, 89 => arm64_insn::ARM64_INS_FCVTMU, 90 => arm64_insn::ARM64_INS_FCVTNS, 91 => arm64_insn::ARM64_INS_FCVTNU, 92 => arm64_insn::ARM64_INS_FCVTN, 93 => arm64_insn::ARM64_INS_FCVTN2, 94 => arm64_insn::ARM64_INS_FCVTPS, 95 => arm64_insn::ARM64_INS_FCVTPU, 96 => arm64_insn::ARM64_INS_FCVTXN, 97 => arm64_insn::ARM64_INS_FCVTXN2, 98 => arm64_insn::ARM64_INS_FCVTZS, 99 => arm64_insn::ARM64_INS_FCVTZU, 100 => arm64_insn::ARM64_INS_FDIV, 101 => arm64_insn::ARM64_INS_FMADD, 102 => arm64_insn::ARM64_INS_FMAX, 103 => arm64_insn::ARM64_INS_FMAXNM, 104 => arm64_insn::ARM64_INS_FMAXNMP, 105 => arm64_insn::ARM64_INS_FMAXNMV, 106 => arm64_insn::ARM64_INS_FMAXP, 107 => arm64_insn::ARM64_INS_FMAXV, 108 => arm64_insn::ARM64_INS_FMIN, 109 => arm64_insn::ARM64_INS_FMINNM, 110 => arm64_insn::ARM64_INS_FMINNMP, 111 => arm64_insn::ARM64_INS_FMINNMV, 112 => arm64_insn::ARM64_INS_FMINP, 113 => arm64_insn::ARM64_INS_FMINV, 114 => arm64_insn::ARM64_INS_FMLA, 115 => arm64_insn::ARM64_INS_FMLS, 116 => arm64_insn::ARM64_INS_FMOV, 117 => arm64_insn::ARM64_INS_FMSUB, 118 => arm64_insn::ARM64_INS_FMUL, 119 => arm64_insn::ARM64_INS_FMULX, 120 => arm64_insn::ARM64_INS_FNEG, 121 => arm64_insn::ARM64_INS_FNMADD, 122 => arm64_insn::ARM64_INS_FNMSUB, 123 => arm64_insn::ARM64_INS_FNMUL, 124 => arm64_insn::ARM64_INS_FRECPE, 125 => arm64_insn::ARM64_INS_FRECPS, 126 => arm64_insn::ARM64_INS_FRECPX, 127 => arm64_insn::ARM64_INS_FRINTA, 128 => arm64_insn::ARM64_INS_FRINTI, 129 => arm64_insn::ARM64_INS_FRINTM, 130 => arm64_insn::ARM64_INS_FRINTN, 131 => arm64_insn::ARM64_INS_FRINTP, 132 => arm64_insn::ARM64_INS_FRINTX, 133 => arm64_insn::ARM64_INS_FRINTZ, 134 => arm64_insn::ARM64_INS_FRSQRTE, 135 => arm64_insn::ARM64_INS_FRSQRTS, 136 => arm64_insn::ARM64_INS_FSQRT, 137 => arm64_insn::ARM64_INS_FSUB, 138 => arm64_insn::ARM64_INS_HINT, 139 => arm64_insn::ARM64_INS_HLT, 140 => arm64_insn::ARM64_INS_HVC, 141 => arm64_insn::ARM64_INS_INS, 142 => arm64_insn::ARM64_INS_ISB, 143 => arm64_insn::ARM64_INS_LD1, 144 => arm64_insn::ARM64_INS_LD1R, 145 => arm64_insn::ARM64_INS_LD2R, 146 => arm64_insn::ARM64_INS_LD2, 147 => arm64_insn::ARM64_INS_LD3R, 148 => arm64_insn::ARM64_INS_LD3, 149 => arm64_insn::ARM64_INS_LD4, 150 => arm64_insn::ARM64_INS_LD4R, 151 => arm64_insn::ARM64_INS_LDARB, 152 => arm64_insn::ARM64_INS_LDARH, 153 => arm64_insn::ARM64_INS_LDAR, 154 => arm64_insn::ARM64_INS_LDAXP, 155 => arm64_insn::ARM64_INS_LDAXRB, 156 => arm64_insn::ARM64_INS_LDAXRH, 157 => arm64_insn::ARM64_INS_LDAXR, 158 => arm64_insn::ARM64_INS_LDNP, 159 => arm64_insn::ARM64_INS_LDP, 160 => arm64_insn::ARM64_INS_LDPSW, 161 => arm64_insn::ARM64_INS_LDRB, 162 => arm64_insn::ARM64_INS_LDR, 163 => arm64_insn::ARM64_INS_LDRH, 164 => arm64_insn::ARM64_INS_LDRSB, 165 => arm64_insn::ARM64_INS_LDRSH, 166 => arm64_insn::ARM64_INS_LDRSW, 167 => arm64_insn::ARM64_INS_LDTRB, 168 => arm64_insn::ARM64_INS_LDTRH, 169 => arm64_insn::ARM64_INS_LDTRSB, 170 => arm64_insn::ARM64_INS_LDTRSH, 171 => arm64_insn::ARM64_INS_LDTRSW, 172 => arm64_insn::ARM64_INS_LDTR, 173 => arm64_insn::ARM64_INS_LDURB, 174 => arm64_insn::ARM64_INS_LDUR, 175 => arm64_insn::ARM64_INS_LDURH, 176 => arm64_insn::ARM64_INS_LDURSB, 177 => arm64_insn::ARM64_INS_LDURSH, 178 => arm64_insn::ARM64_INS_LDURSW, 179 => arm64_insn::ARM64_INS_LDXP, 180 => arm64_insn::ARM64_INS_LDXRB, 181 => arm64_insn::ARM64_INS_LDXRH, 182 => arm64_insn::ARM64_INS_LDXR, 183 => arm64_insn::ARM64_INS_LSL, 184 => arm64_insn::ARM64_INS_LSR, 185 => arm64_insn::ARM64_INS_MADD, 186 => arm64_insn::ARM64_INS_MLA, 187 => arm64_insn::ARM64_INS_MLS, 188 => arm64_insn::ARM64_INS_MOVI, 189 => arm64_insn::ARM64_INS_MOVK, 190 => arm64_insn::ARM64_INS_MOVN, 191 => arm64_insn::ARM64_INS_MOVZ, 192 => arm64_insn::ARM64_INS_MRS, 193 => arm64_insn::ARM64_INS_MSR, 194 => arm64_insn::ARM64_INS_MSUB, 195 => arm64_insn::ARM64_INS_MUL, 196 => arm64_insn::ARM64_INS_MVNI, 197 => arm64_insn::ARM64_INS_NEG, 198 => arm64_insn::ARM64_INS_NOT, 199 => arm64_insn::ARM64_INS_ORN, 200 => arm64_insn::ARM64_INS_ORR, 201 => arm64_insn::ARM64_INS_PMULL2, 202 => arm64_insn::ARM64_INS_PMULL, 203 => arm64_insn::ARM64_INS_PMUL, 204 => arm64_insn::ARM64_INS_PRFM, 205 => arm64_insn::ARM64_INS_PRFUM, 206 => arm64_insn::ARM64_INS_RADDHN, 207 => arm64_insn::ARM64_INS_RADDHN2, 208 => arm64_insn::ARM64_INS_RBIT, 209 => arm64_insn::ARM64_INS_RET, 210 => arm64_insn::ARM64_INS_REV16, 211 => arm64_insn::ARM64_INS_REV32, 212 => arm64_insn::ARM64_INS_REV64, 213 => arm64_insn::ARM64_INS_REV, 214 => arm64_insn::ARM64_INS_ROR, 215 => arm64_insn::ARM64_INS_RSHRN2, 216 => arm64_insn::ARM64_INS_RSHRN, 217 => arm64_insn::ARM64_INS_RSUBHN, 218 => arm64_insn::ARM64_INS_RSUBHN2, 219 => arm64_insn::ARM64_INS_SABAL2, 220 => arm64_insn::ARM64_INS_SABAL, 221 => arm64_insn::ARM64_INS_SABA, 222 => arm64_insn::ARM64_INS_SABDL2, 223 => arm64_insn::ARM64_INS_SABDL, 224 => arm64_insn::ARM64_INS_SABD, 225 => arm64_insn::ARM64_INS_SADALP, 226 => arm64_insn::ARM64_INS_SADDLP, 227 => arm64_insn::ARM64_INS_SADDLV, 228 => arm64_insn::ARM64_INS_SADDL2, 229 => arm64_insn::ARM64_INS_SADDL, 230 => arm64_insn::ARM64_INS_SADDW2, 231 => arm64_insn::ARM64_INS_SADDW, 232 => arm64_insn::ARM64_INS_SBC, 233 => arm64_insn::ARM64_INS_SBFM, 234 => arm64_insn::ARM64_INS_SCVTF, 235 => arm64_insn::ARM64_INS_SDIV, 236 => arm64_insn::ARM64_INS_SHA1C, 237 => arm64_insn::ARM64_INS_SHA1H, 238 => arm64_insn::ARM64_INS_SHA1M, 239 => arm64_insn::ARM64_INS_SHA1P, 240 => arm64_insn::ARM64_INS_SHA1SU0, 241 => arm64_insn::ARM64_INS_SHA1SU1, 242 => arm64_insn::ARM64_INS_SHA256H2, 243 => arm64_insn::ARM64_INS_SHA256H, 244 => arm64_insn::ARM64_INS_SHA256SU0, 245 => arm64_insn::ARM64_INS_SHA256SU1, 246 => arm64_insn::ARM64_INS_SHADD, 247 => arm64_insn::ARM64_INS_SHLL2, 248 => arm64_insn::ARM64_INS_SHLL, 249 => arm64_insn::ARM64_INS_SHL, 250 => arm64_insn::ARM64_INS_SHRN2, 251 => arm64_insn::ARM64_INS_SHRN, 252 => arm64_insn::ARM64_INS_SHSUB, 253 => arm64_insn::ARM64_INS_SLI, 254 => arm64_insn::ARM64_INS_SMADDL, 255 => arm64_insn::ARM64_INS_SMAXP, 256 => arm64_insn::ARM64_INS_SMAXV, 257 => arm64_insn::ARM64_INS_SMAX, 258 => arm64_insn::ARM64_INS_SMC, 259 => arm64_insn::ARM64_INS_SMINP, 260 => arm64_insn::ARM64_INS_SMINV, 261 => arm64_insn::ARM64_INS_SMIN, 262 => arm64_insn::ARM64_INS_SMLAL2, 263 => arm64_insn::ARM64_INS_SMLAL, 264 => arm64_insn::ARM64_INS_SMLSL2, 265 => arm64_insn::ARM64_INS_SMLSL, 266 => arm64_insn::ARM64_INS_SMOV, 267 => arm64_insn::ARM64_INS_SMSUBL, 268 => arm64_insn::ARM64_INS_SMULH, 269 => arm64_insn::ARM64_INS_SMULL2, 270 => arm64_insn::ARM64_INS_SMULL, 271 => arm64_insn::ARM64_INS_SQABS, 272 => arm64_insn::ARM64_INS_SQADD, 273 => arm64_insn::ARM64_INS_SQDMLAL, 274 => arm64_insn::ARM64_INS_SQDMLAL2, 275 => arm64_insn::ARM64_INS_SQDMLSL, 276 => arm64_insn::ARM64_INS_SQDMLSL2, 277 => arm64_insn::ARM64_INS_SQDMULH, 278 => arm64_insn::ARM64_INS_SQDMULL, 279 => arm64_insn::ARM64_INS_SQDMULL2, 280 => arm64_insn::ARM64_INS_SQNEG, 281 => arm64_insn::ARM64_INS_SQRDMULH, 282 => arm64_insn::ARM64_INS_SQRSHL, 283 => arm64_insn::ARM64_INS_SQRSHRN, 284 => arm64_insn::ARM64_INS_SQRSHRN2, 285 => arm64_insn::ARM64_INS_SQRSHRUN, 286 => arm64_insn::ARM64_INS_SQRSHRUN2, 287 => arm64_insn::ARM64_INS_SQSHLU, 288 => arm64_insn::ARM64_INS_SQSHL, 289 => arm64_insn::ARM64_INS_SQSHRN, 290 => arm64_insn::ARM64_INS_SQSHRN2, 291 => arm64_insn::ARM64_INS_SQSHRUN, 292 => arm64_insn::ARM64_INS_SQSHRUN2, 293 => arm64_insn::ARM64_INS_SQSUB, 294 => arm64_insn::ARM64_INS_SQXTN2, 295 => arm64_insn::ARM64_INS_SQXTN, 296 => arm64_insn::ARM64_INS_SQXTUN2, 297 => arm64_insn::ARM64_INS_SQXTUN, 298 => arm64_insn::ARM64_INS_SRHADD, 299 => arm64_insn::ARM64_INS_SRI, 300 => arm64_insn::ARM64_INS_SRSHL, 301 => arm64_insn::ARM64_INS_SRSHR, 302 => arm64_insn::ARM64_INS_SRSRA, 303 => arm64_insn::ARM64_INS_SSHLL2, 304 => arm64_insn::ARM64_INS_SSHLL, 305 => arm64_insn::ARM64_INS_SSHL, 306 => arm64_insn::ARM64_INS_SSHR, 307 => arm64_insn::ARM64_INS_SSRA, 308 => arm64_insn::ARM64_INS_SSUBL2, 309 => arm64_insn::ARM64_INS_SSUBL, 310 => arm64_insn::ARM64_INS_SSUBW2, 311 => arm64_insn::ARM64_INS_SSUBW, 312 => arm64_insn::ARM64_INS_ST1, 313 => arm64_insn::ARM64_INS_ST2, 314 => arm64_insn::ARM64_INS_ST3, 315 => arm64_insn::ARM64_INS_ST4, 316 => arm64_insn::ARM64_INS_STLRB, 317 => arm64_insn::ARM64_INS_STLRH, 318 => arm64_insn::ARM64_INS_STLR, 319 => arm64_insn::ARM64_INS_STLXP, 320 => arm64_insn::ARM64_INS_STLXRB, 321 => arm64_insn::ARM64_INS_STLXRH, 322 => arm64_insn::ARM64_INS_STLXR, 323 => arm64_insn::ARM64_INS_STNP, 324 => arm64_insn::ARM64_INS_STP, 325 => arm64_insn::ARM64_INS_STRB, 326 => arm64_insn::ARM64_INS_STR, 327 => arm64_insn::ARM64_INS_STRH, 328 => arm64_insn::ARM64_INS_STTRB, 329 => arm64_insn::ARM64_INS_STTRH, 330 => arm64_insn::ARM64_INS_STTR, 331 => arm64_insn::ARM64_INS_STURB, 332 => arm64_insn::ARM64_INS_STUR, 333 => arm64_insn::ARM64_INS_STURH, 334 => arm64_insn::ARM64_INS_STXP, 335 => arm64_insn::ARM64_INS_STXRB, 336 => arm64_insn::ARM64_INS_STXRH, 337 => arm64_insn::ARM64_INS_STXR, 338 => arm64_insn::ARM64_INS_SUBHN, 339 => arm64_insn::ARM64_INS_SUBHN2, 340 => arm64_insn::ARM64_INS_SUB, 341 => arm64_insn::ARM64_INS_SUQADD, 342 => arm64_insn::ARM64_INS_SVC, 343 => arm64_insn::ARM64_INS_SYSL, 344 => arm64_insn::ARM64_INS_SYS, 345 => arm64_insn::ARM64_INS_TBL, 346 => arm64_insn::ARM64_INS_TBNZ, 347 => arm64_insn::ARM64_INS_TBX, 348 => arm64_insn::ARM64_INS_TBZ, 349 => arm64_insn::ARM64_INS_TRN1, 350 => arm64_insn::ARM64_INS_TRN2, 351 => arm64_insn::ARM64_INS_UABAL2, 352 => arm64_insn::ARM64_INS_UABAL, 353 => arm64_insn::ARM64_INS_UABA, 354 => arm64_insn::ARM64_INS_UABDL2, 355 => arm64_insn::ARM64_INS_UABDL, 356 => arm64_insn::ARM64_INS_UABD, 357 => arm64_insn::ARM64_INS_UADALP, 358 => arm64_insn::ARM64_INS_UADDLP, 359 => arm64_insn::ARM64_INS_UADDLV, 360 => arm64_insn::ARM64_INS_UADDL2, 361 => arm64_insn::ARM64_INS_UADDL, 362 => arm64_insn::ARM64_INS_UADDW2, 363 => arm64_insn::ARM64_INS_UADDW, 364 => arm64_insn::ARM64_INS_UBFM, 365 => arm64_insn::ARM64_INS_UCVTF, 366 => arm64_insn::ARM64_INS_UDIV, 367 => arm64_insn::ARM64_INS_UHADD, 368 => arm64_insn::ARM64_INS_UHSUB, 369 => arm64_insn::ARM64_INS_UMADDL, 370 => arm64_insn::ARM64_INS_UMAXP, 371 => arm64_insn::ARM64_INS_UMAXV, 372 => arm64_insn::ARM64_INS_UMAX, 373 => arm64_insn::ARM64_INS_UMINP, 374 => arm64_insn::ARM64_INS_UMINV, 375 => arm64_insn::ARM64_INS_UMIN, 376 => arm64_insn::ARM64_INS_UMLAL2, 377 => arm64_insn::ARM64_INS_UMLAL, 378 => arm64_insn::ARM64_INS_UMLSL2, 379 => arm64_insn::ARM64_INS_UMLSL, 380 => arm64_insn::ARM64_INS_UMOV, 381 => arm64_insn::ARM64_INS_UMSUBL, 382 => arm64_insn::ARM64_INS_UMULH, 383 => arm64_insn::ARM64_INS_UMULL2, 384 => arm64_insn::ARM64_INS_UMULL, 385 => arm64_insn::ARM64_INS_UQADD, 386 => arm64_insn::ARM64_INS_UQRSHL, 387 => arm64_insn::ARM64_INS_UQRSHRN, 388 => arm64_insn::ARM64_INS_UQRSHRN2, 389 => arm64_insn::ARM64_INS_UQSHL, 390 => arm64_insn::ARM64_INS_UQSHRN, 391 => arm64_insn::ARM64_INS_UQSHRN2, 392 => arm64_insn::ARM64_INS_UQSUB, 393 => arm64_insn::ARM64_INS_UQXTN2, 394 => arm64_insn::ARM64_INS_UQXTN, 395 => arm64_insn::ARM64_INS_URECPE, 396 => arm64_insn::ARM64_INS_URHADD, 397 => arm64_insn::ARM64_INS_URSHL, 398 => arm64_insn::ARM64_INS_URSHR, 399 => arm64_insn::ARM64_INS_URSQRTE, 400 => arm64_insn::ARM64_INS_URSRA, 401 => arm64_insn::ARM64_INS_USHLL2, 402 => arm64_insn::ARM64_INS_USHLL, 403 => arm64_insn::ARM64_INS_USHL, 404 => arm64_insn::ARM64_INS_USHR, 405 => arm64_insn::ARM64_INS_USQADD, 406 => arm64_insn::ARM64_INS_USRA, 407 => arm64_insn::ARM64_INS_USUBL2, 408 => arm64_insn::ARM64_INS_USUBL, 409 => arm64_insn::ARM64_INS_USUBW2, 410 => arm64_insn::ARM64_INS_USUBW, 411 => arm64_insn::ARM64_INS_UZP1, 412 => arm64_insn::ARM64_INS_UZP2, 413 => arm64_insn::ARM64_INS_XTN2, 414 => arm64_insn::ARM64_INS_XTN, 415 => arm64_insn::ARM64_INS_ZIP1, 416 => arm64_insn::ARM64_INS_ZIP2, 417 => arm64_insn::ARM64_INS_MNEG, 418 => arm64_insn::ARM64_INS_UMNEGL, 419 => arm64_insn::ARM64_INS_SMNEGL, 420 => arm64_insn::ARM64_INS_NOP, 421 => arm64_insn::ARM64_INS_YIELD, 422 => arm64_insn::ARM64_INS_WFE, 423 => arm64_insn::ARM64_INS_WFI, 424 => arm64_insn::ARM64_INS_SEV, 425 => arm64_insn::ARM64_INS_SEVL, 426 => arm64_insn::ARM64_INS_NGC, 427 => arm64_insn::ARM64_INS_SBFIZ, 428 => arm64_insn::ARM64_INS_UBFIZ, 429 => arm64_insn::ARM64_INS_SBFX, 430 => arm64_insn::ARM64_INS_UBFX, 431 => arm64_insn::ARM64_INS_BFI, 432 => arm64_insn::ARM64_INS_BFXIL, 433 => arm64_insn::ARM64_INS_CMN, 434 => arm64_insn::ARM64_INS_MVN, 435 => arm64_insn::ARM64_INS_TST, 436 => arm64_insn::ARM64_INS_CSET, 437 => arm64_insn::ARM64_INS_CINC, 438 => arm64_insn::ARM64_INS_CSETM, 439 => arm64_insn::ARM64_INS_CINV, 440 => arm64_insn::ARM64_INS_CNEG, 441 => arm64_insn::ARM64_INS_SXTB, 442 => arm64_insn::ARM64_INS_SXTH, 443 => arm64_insn::ARM64_INS_SXTW, 444 => arm64_insn::ARM64_INS_CMP, 445 => arm64_insn::ARM64_INS_UXTB, 446 => arm64_insn::ARM64_INS_UXTH, 447 => arm64_insn::ARM64_INS_UXTW, 448 => arm64_insn::ARM64_INS_IC, 449 => arm64_insn::ARM64_INS_DC, 450 => arm64_insn::ARM64_INS_AT, 451 => arm64_insn::ARM64_INS_TLBI, 452 => arm64_insn::ARM64_INS_NEGS, 453 => arm64_insn::ARM64_INS_NGCS, 454 => arm64_insn::ARM64_INS_ENDING, _ => arm64_insn::ARM64_INS_INVALID, } } } impl From for evm_insn { fn from(id: u32) -> Self { match id { 0 => evm_insn::EVM_INS_STOP, 1 => evm_insn::EVM_INS_ADD, 2 => evm_insn::EVM_INS_MUL, 3 => evm_insn::EVM_INS_SUB, 4 => evm_insn::EVM_INS_DIV, 5 => evm_insn::EVM_INS_SDIV, 6 => evm_insn::EVM_INS_MOD, 7 => evm_insn::EVM_INS_SMOD, 8 => evm_insn::EVM_INS_ADDMOD, 9 => evm_insn::EVM_INS_MULMOD, 10 => evm_insn::EVM_INS_EXP, 11 => evm_insn::EVM_INS_SIGNEXTEND, 16 => evm_insn::EVM_INS_LT, 17 => evm_insn::EVM_INS_GT, 18 => evm_insn::EVM_INS_SLT, 19 => evm_insn::EVM_INS_SGT, 20 => evm_insn::EVM_INS_EQ, 21 => evm_insn::EVM_INS_ISZERO, 22 => evm_insn::EVM_INS_AND, 23 => evm_insn::EVM_INS_OR, 24 => evm_insn::EVM_INS_XOR, 25 => evm_insn::EVM_INS_NOT, 26 => evm_insn::EVM_INS_BYTE, 32 => evm_insn::EVM_INS_SHA3, 48 => evm_insn::EVM_INS_ADDRESS, 49 => evm_insn::EVM_INS_BALANCE, 50 => evm_insn::EVM_INS_ORIGIN, 51 => evm_insn::EVM_INS_CALLER, 52 => evm_insn::EVM_INS_CALLVALUE, 53 => evm_insn::EVM_INS_CALLDATALOAD, 54 => evm_insn::EVM_INS_CALLDATASIZE, 55 => evm_insn::EVM_INS_CALLDATACOPY, 56 => evm_insn::EVM_INS_CODESIZE, 57 => evm_insn::EVM_INS_CODECOPY, 58 => evm_insn::EVM_INS_GASPRICE, 59 => evm_insn::EVM_INS_EXTCODESIZE, 60 => evm_insn::EVM_INS_EXTCODECOPY, 61 => evm_insn::EVM_INS_RETURNDATASIZE, 62 => evm_insn::EVM_INS_RETURNDATACOPY, 64 => evm_insn::EVM_INS_BLOCKHASH, 65 => evm_insn::EVM_INS_COINBASE, 66 => evm_insn::EVM_INS_TIMESTAMP, 67 => evm_insn::EVM_INS_NUMBER, 68 => evm_insn::EVM_INS_DIFFICULTY, 69 => evm_insn::EVM_INS_GASLIMIT, 80 => evm_insn::EVM_INS_POP, 81 => evm_insn::EVM_INS_MLOAD, 82 => evm_insn::EVM_INS_MSTORE, 83 => evm_insn::EVM_INS_MSTORE8, 84 => evm_insn::EVM_INS_SLOAD, 85 => evm_insn::EVM_INS_SSTORE, 86 => evm_insn::EVM_INS_JUMP, 87 => evm_insn::EVM_INS_JUMPI, 88 => evm_insn::EVM_INS_PC, 89 => evm_insn::EVM_INS_MSIZE, 90 => evm_insn::EVM_INS_GAS, 91 => evm_insn::EVM_INS_JUMPDEST, 96 => evm_insn::EVM_INS_PUSH1, 97 => evm_insn::EVM_INS_PUSH2, 98 => evm_insn::EVM_INS_PUSH3, 99 => evm_insn::EVM_INS_PUSH4, 100 => evm_insn::EVM_INS_PUSH5, 101 => evm_insn::EVM_INS_PUSH6, 102 => evm_insn::EVM_INS_PUSH7, 103 => evm_insn::EVM_INS_PUSH8, 104 => evm_insn::EVM_INS_PUSH9, 105 => evm_insn::EVM_INS_PUSH10, 106 => evm_insn::EVM_INS_PUSH11, 107 => evm_insn::EVM_INS_PUSH12, 108 => evm_insn::EVM_INS_PUSH13, 109 => evm_insn::EVM_INS_PUSH14, 110 => evm_insn::EVM_INS_PUSH15, 111 => evm_insn::EVM_INS_PUSH16, 112 => evm_insn::EVM_INS_PUSH17, 113 => evm_insn::EVM_INS_PUSH18, 114 => evm_insn::EVM_INS_PUSH19, 115 => evm_insn::EVM_INS_PUSH20, 116 => evm_insn::EVM_INS_PUSH21, 117 => evm_insn::EVM_INS_PUSH22, 118 => evm_insn::EVM_INS_PUSH23, 119 => evm_insn::EVM_INS_PUSH24, 120 => evm_insn::EVM_INS_PUSH25, 121 => evm_insn::EVM_INS_PUSH26, 122 => evm_insn::EVM_INS_PUSH27, 123 => evm_insn::EVM_INS_PUSH28, 124 => evm_insn::EVM_INS_PUSH29, 125 => evm_insn::EVM_INS_PUSH30, 126 => evm_insn::EVM_INS_PUSH31, 127 => evm_insn::EVM_INS_PUSH32, 128 => evm_insn::EVM_INS_DUP1, 129 => evm_insn::EVM_INS_DUP2, 130 => evm_insn::EVM_INS_DUP3, 131 => evm_insn::EVM_INS_DUP4, 132 => evm_insn::EVM_INS_DUP5, 133 => evm_insn::EVM_INS_DUP6, 134 => evm_insn::EVM_INS_DUP7, 135 => evm_insn::EVM_INS_DUP8, 136 => evm_insn::EVM_INS_DUP9, 137 => evm_insn::EVM_INS_DUP10, 138 => evm_insn::EVM_INS_DUP11, 139 => evm_insn::EVM_INS_DUP12, 140 => evm_insn::EVM_INS_DUP13, 141 => evm_insn::EVM_INS_DUP14, 142 => evm_insn::EVM_INS_DUP15, 143 => evm_insn::EVM_INS_DUP16, 144 => evm_insn::EVM_INS_SWAP1, 145 => evm_insn::EVM_INS_SWAP2, 146 => evm_insn::EVM_INS_SWAP3, 147 => evm_insn::EVM_INS_SWAP4, 148 => evm_insn::EVM_INS_SWAP5, 149 => evm_insn::EVM_INS_SWAP6, 150 => evm_insn::EVM_INS_SWAP7, 151 => evm_insn::EVM_INS_SWAP8, 152 => evm_insn::EVM_INS_SWAP9, 153 => evm_insn::EVM_INS_SWAP10, 154 => evm_insn::EVM_INS_SWAP11, 155 => evm_insn::EVM_INS_SWAP12, 156 => evm_insn::EVM_INS_SWAP13, 157 => evm_insn::EVM_INS_SWAP14, 158 => evm_insn::EVM_INS_SWAP15, 159 => evm_insn::EVM_INS_SWAP16, 160 => evm_insn::EVM_INS_LOG0, 161 => evm_insn::EVM_INS_LOG1, 162 => evm_insn::EVM_INS_LOG2, 163 => evm_insn::EVM_INS_LOG3, 164 => evm_insn::EVM_INS_LOG4, 240 => evm_insn::EVM_INS_CREATE, 241 => evm_insn::EVM_INS_CALL, 242 => evm_insn::EVM_INS_CALLCODE, 243 => evm_insn::EVM_INS_RETURN, 244 => evm_insn::EVM_INS_DELEGATECALL, 245 => evm_insn::EVM_INS_CALLBLACKBOX, 250 => evm_insn::EVM_INS_STATICCALL, 253 => evm_insn::EVM_INS_REVERT, 255 => evm_insn::EVM_INS_SUICIDE, 512 => evm_insn::EVM_INS_INVALID, 513 => evm_insn::EVM_INS_ENDING, _ => evm_insn::EVM_INS_INVALID, } } } impl From for m680x_insn { fn from(id: u32) -> Self { match id { 0 => m680x_insn::M680X_INS_INVLD, 1 => m680x_insn::M680X_INS_ABA, 2 => m680x_insn::M680X_INS_ABX, 3 => m680x_insn::M680X_INS_ABY, 4 => m680x_insn::M680X_INS_ADC, 5 => m680x_insn::M680X_INS_ADCA, 6 => m680x_insn::M680X_INS_ADCB, 7 => m680x_insn::M680X_INS_ADCD, 8 => m680x_insn::M680X_INS_ADCR, 9 => m680x_insn::M680X_INS_ADD, 10 => m680x_insn::M680X_INS_ADDA, 11 => m680x_insn::M680X_INS_ADDB, 12 => m680x_insn::M680X_INS_ADDD, 13 => m680x_insn::M680X_INS_ADDE, 14 => m680x_insn::M680X_INS_ADDF, 15 => m680x_insn::M680X_INS_ADDR, 16 => m680x_insn::M680X_INS_ADDW, 17 => m680x_insn::M680X_INS_AIM, 18 => m680x_insn::M680X_INS_AIS, 19 => m680x_insn::M680X_INS_AIX, 20 => m680x_insn::M680X_INS_AND, 21 => m680x_insn::M680X_INS_ANDA, 22 => m680x_insn::M680X_INS_ANDB, 23 => m680x_insn::M680X_INS_ANDCC, 24 => m680x_insn::M680X_INS_ANDD, 25 => m680x_insn::M680X_INS_ANDR, 26 => m680x_insn::M680X_INS_ASL, 27 => m680x_insn::M680X_INS_ASLA, 28 => m680x_insn::M680X_INS_ASLB, 29 => m680x_insn::M680X_INS_ASLD, 30 => m680x_insn::M680X_INS_ASR, 31 => m680x_insn::M680X_INS_ASRA, 32 => m680x_insn::M680X_INS_ASRB, 33 => m680x_insn::M680X_INS_ASRD, 34 => m680x_insn::M680X_INS_ASRX, 35 => m680x_insn::M680X_INS_BAND, 36 => m680x_insn::M680X_INS_BCC, 37 => m680x_insn::M680X_INS_BCLR, 38 => m680x_insn::M680X_INS_BCS, 39 => m680x_insn::M680X_INS_BEOR, 40 => m680x_insn::M680X_INS_BEQ, 41 => m680x_insn::M680X_INS_BGE, 42 => m680x_insn::M680X_INS_BGND, 43 => m680x_insn::M680X_INS_BGT, 44 => m680x_insn::M680X_INS_BHCC, 45 => m680x_insn::M680X_INS_BHCS, 46 => m680x_insn::M680X_INS_BHI, 47 => m680x_insn::M680X_INS_BIAND, 48 => m680x_insn::M680X_INS_BIEOR, 49 => m680x_insn::M680X_INS_BIH, 50 => m680x_insn::M680X_INS_BIL, 51 => m680x_insn::M680X_INS_BIOR, 52 => m680x_insn::M680X_INS_BIT, 53 => m680x_insn::M680X_INS_BITA, 54 => m680x_insn::M680X_INS_BITB, 55 => m680x_insn::M680X_INS_BITD, 56 => m680x_insn::M680X_INS_BITMD, 57 => m680x_insn::M680X_INS_BLE, 58 => m680x_insn::M680X_INS_BLS, 59 => m680x_insn::M680X_INS_BLT, 60 => m680x_insn::M680X_INS_BMC, 61 => m680x_insn::M680X_INS_BMI, 62 => m680x_insn::M680X_INS_BMS, 63 => m680x_insn::M680X_INS_BNE, 64 => m680x_insn::M680X_INS_BOR, 65 => m680x_insn::M680X_INS_BPL, 66 => m680x_insn::M680X_INS_BRCLR, 67 => m680x_insn::M680X_INS_BRSET, 68 => m680x_insn::M680X_INS_BRA, 69 => m680x_insn::M680X_INS_BRN, 70 => m680x_insn::M680X_INS_BSET, 71 => m680x_insn::M680X_INS_BSR, 72 => m680x_insn::M680X_INS_BVC, 73 => m680x_insn::M680X_INS_BVS, 74 => m680x_insn::M680X_INS_CALL, 75 => m680x_insn::M680X_INS_CBA, 76 => m680x_insn::M680X_INS_CBEQ, 77 => m680x_insn::M680X_INS_CBEQA, 78 => m680x_insn::M680X_INS_CBEQX, 79 => m680x_insn::M680X_INS_CLC, 80 => m680x_insn::M680X_INS_CLI, 81 => m680x_insn::M680X_INS_CLR, 82 => m680x_insn::M680X_INS_CLRA, 83 => m680x_insn::M680X_INS_CLRB, 84 => m680x_insn::M680X_INS_CLRD, 85 => m680x_insn::M680X_INS_CLRE, 86 => m680x_insn::M680X_INS_CLRF, 87 => m680x_insn::M680X_INS_CLRH, 88 => m680x_insn::M680X_INS_CLRW, 89 => m680x_insn::M680X_INS_CLRX, 90 => m680x_insn::M680X_INS_CLV, 91 => m680x_insn::M680X_INS_CMP, 92 => m680x_insn::M680X_INS_CMPA, 93 => m680x_insn::M680X_INS_CMPB, 94 => m680x_insn::M680X_INS_CMPD, 95 => m680x_insn::M680X_INS_CMPE, 96 => m680x_insn::M680X_INS_CMPF, 97 => m680x_insn::M680X_INS_CMPR, 98 => m680x_insn::M680X_INS_CMPS, 99 => m680x_insn::M680X_INS_CMPU, 100 => m680x_insn::M680X_INS_CMPW, 101 => m680x_insn::M680X_INS_CMPX, 102 => m680x_insn::M680X_INS_CMPY, 103 => m680x_insn::M680X_INS_COM, 104 => m680x_insn::M680X_INS_COMA, 105 => m680x_insn::M680X_INS_COMB, 106 => m680x_insn::M680X_INS_COMD, 107 => m680x_insn::M680X_INS_COME, 108 => m680x_insn::M680X_INS_COMF, 109 => m680x_insn::M680X_INS_COMW, 110 => m680x_insn::M680X_INS_COMX, 111 => m680x_insn::M680X_INS_CPD, 112 => m680x_insn::M680X_INS_CPHX, 113 => m680x_insn::M680X_INS_CPS, 114 => m680x_insn::M680X_INS_CPX, 115 => m680x_insn::M680X_INS_CPY, 116 => m680x_insn::M680X_INS_CWAI, 117 => m680x_insn::M680X_INS_DAA, 118 => m680x_insn::M680X_INS_DBEQ, 119 => m680x_insn::M680X_INS_DBNE, 120 => m680x_insn::M680X_INS_DBNZ, 121 => m680x_insn::M680X_INS_DBNZA, 122 => m680x_insn::M680X_INS_DBNZX, 123 => m680x_insn::M680X_INS_DEC, 124 => m680x_insn::M680X_INS_DECA, 125 => m680x_insn::M680X_INS_DECB, 126 => m680x_insn::M680X_INS_DECD, 127 => m680x_insn::M680X_INS_DECE, 128 => m680x_insn::M680X_INS_DECF, 129 => m680x_insn::M680X_INS_DECW, 130 => m680x_insn::M680X_INS_DECX, 131 => m680x_insn::M680X_INS_DES, 132 => m680x_insn::M680X_INS_DEX, 133 => m680x_insn::M680X_INS_DEY, 134 => m680x_insn::M680X_INS_DIV, 135 => m680x_insn::M680X_INS_DIVD, 136 => m680x_insn::M680X_INS_DIVQ, 137 => m680x_insn::M680X_INS_EDIV, 138 => m680x_insn::M680X_INS_EDIVS, 139 => m680x_insn::M680X_INS_EIM, 140 => m680x_insn::M680X_INS_EMACS, 141 => m680x_insn::M680X_INS_EMAXD, 142 => m680x_insn::M680X_INS_EMAXM, 143 => m680x_insn::M680X_INS_EMIND, 144 => m680x_insn::M680X_INS_EMINM, 145 => m680x_insn::M680X_INS_EMUL, 146 => m680x_insn::M680X_INS_EMULS, 147 => m680x_insn::M680X_INS_EOR, 148 => m680x_insn::M680X_INS_EORA, 149 => m680x_insn::M680X_INS_EORB, 150 => m680x_insn::M680X_INS_EORD, 151 => m680x_insn::M680X_INS_EORR, 152 => m680x_insn::M680X_INS_ETBL, 153 => m680x_insn::M680X_INS_EXG, 154 => m680x_insn::M680X_INS_FDIV, 155 => m680x_insn::M680X_INS_IBEQ, 156 => m680x_insn::M680X_INS_IBNE, 157 => m680x_insn::M680X_INS_IDIV, 158 => m680x_insn::M680X_INS_IDIVS, 159 => m680x_insn::M680X_INS_ILLGL, 160 => m680x_insn::M680X_INS_INC, 161 => m680x_insn::M680X_INS_INCA, 162 => m680x_insn::M680X_INS_INCB, 163 => m680x_insn::M680X_INS_INCD, 164 => m680x_insn::M680X_INS_INCE, 165 => m680x_insn::M680X_INS_INCF, 166 => m680x_insn::M680X_INS_INCW, 167 => m680x_insn::M680X_INS_INCX, 168 => m680x_insn::M680X_INS_INS, 169 => m680x_insn::M680X_INS_INX, 170 => m680x_insn::M680X_INS_INY, 171 => m680x_insn::M680X_INS_JMP, 172 => m680x_insn::M680X_INS_JSR, 173 => m680x_insn::M680X_INS_LBCC, 174 => m680x_insn::M680X_INS_LBCS, 175 => m680x_insn::M680X_INS_LBEQ, 176 => m680x_insn::M680X_INS_LBGE, 177 => m680x_insn::M680X_INS_LBGT, 178 => m680x_insn::M680X_INS_LBHI, 179 => m680x_insn::M680X_INS_LBLE, 180 => m680x_insn::M680X_INS_LBLS, 181 => m680x_insn::M680X_INS_LBLT, 182 => m680x_insn::M680X_INS_LBMI, 183 => m680x_insn::M680X_INS_LBNE, 184 => m680x_insn::M680X_INS_LBPL, 185 => m680x_insn::M680X_INS_LBRA, 186 => m680x_insn::M680X_INS_LBRN, 187 => m680x_insn::M680X_INS_LBSR, 188 => m680x_insn::M680X_INS_LBVC, 189 => m680x_insn::M680X_INS_LBVS, 190 => m680x_insn::M680X_INS_LDA, 191 => m680x_insn::M680X_INS_LDAA, 192 => m680x_insn::M680X_INS_LDAB, 193 => m680x_insn::M680X_INS_LDB, 194 => m680x_insn::M680X_INS_LDBT, 195 => m680x_insn::M680X_INS_LDD, 196 => m680x_insn::M680X_INS_LDE, 197 => m680x_insn::M680X_INS_LDF, 198 => m680x_insn::M680X_INS_LDHX, 199 => m680x_insn::M680X_INS_LDMD, 200 => m680x_insn::M680X_INS_LDQ, 201 => m680x_insn::M680X_INS_LDS, 202 => m680x_insn::M680X_INS_LDU, 203 => m680x_insn::M680X_INS_LDW, 204 => m680x_insn::M680X_INS_LDX, 205 => m680x_insn::M680X_INS_LDY, 206 => m680x_insn::M680X_INS_LEAS, 207 => m680x_insn::M680X_INS_LEAU, 208 => m680x_insn::M680X_INS_LEAX, 209 => m680x_insn::M680X_INS_LEAY, 210 => m680x_insn::M680X_INS_LSL, 211 => m680x_insn::M680X_INS_LSLA, 212 => m680x_insn::M680X_INS_LSLB, 213 => m680x_insn::M680X_INS_LSLD, 214 => m680x_insn::M680X_INS_LSLX, 215 => m680x_insn::M680X_INS_LSR, 216 => m680x_insn::M680X_INS_LSRA, 217 => m680x_insn::M680X_INS_LSRB, 218 => m680x_insn::M680X_INS_LSRD, 219 => m680x_insn::M680X_INS_LSRW, 220 => m680x_insn::M680X_INS_LSRX, 221 => m680x_insn::M680X_INS_MAXA, 222 => m680x_insn::M680X_INS_MAXM, 223 => m680x_insn::M680X_INS_MEM, 224 => m680x_insn::M680X_INS_MINA, 225 => m680x_insn::M680X_INS_MINM, 226 => m680x_insn::M680X_INS_MOV, 227 => m680x_insn::M680X_INS_MOVB, 228 => m680x_insn::M680X_INS_MOVW, 229 => m680x_insn::M680X_INS_MUL, 230 => m680x_insn::M680X_INS_MULD, 231 => m680x_insn::M680X_INS_NEG, 232 => m680x_insn::M680X_INS_NEGA, 233 => m680x_insn::M680X_INS_NEGB, 234 => m680x_insn::M680X_INS_NEGD, 235 => m680x_insn::M680X_INS_NEGX, 236 => m680x_insn::M680X_INS_NOP, 237 => m680x_insn::M680X_INS_NSA, 238 => m680x_insn::M680X_INS_OIM, 239 => m680x_insn::M680X_INS_ORA, 240 => m680x_insn::M680X_INS_ORAA, 241 => m680x_insn::M680X_INS_ORAB, 242 => m680x_insn::M680X_INS_ORB, 243 => m680x_insn::M680X_INS_ORCC, 244 => m680x_insn::M680X_INS_ORD, 245 => m680x_insn::M680X_INS_ORR, 246 => m680x_insn::M680X_INS_PSHA, 247 => m680x_insn::M680X_INS_PSHB, 248 => m680x_insn::M680X_INS_PSHC, 249 => m680x_insn::M680X_INS_PSHD, 250 => m680x_insn::M680X_INS_PSHH, 251 => m680x_insn::M680X_INS_PSHS, 252 => m680x_insn::M680X_INS_PSHSW, 253 => m680x_insn::M680X_INS_PSHU, 254 => m680x_insn::M680X_INS_PSHUW, 255 => m680x_insn::M680X_INS_PSHX, 256 => m680x_insn::M680X_INS_PSHY, 257 => m680x_insn::M680X_INS_PULA, 258 => m680x_insn::M680X_INS_PULB, 259 => m680x_insn::M680X_INS_PULC, 260 => m680x_insn::M680X_INS_PULD, 261 => m680x_insn::M680X_INS_PULH, 262 => m680x_insn::M680X_INS_PULS, 263 => m680x_insn::M680X_INS_PULSW, 264 => m680x_insn::M680X_INS_PULU, 265 => m680x_insn::M680X_INS_PULUW, 266 => m680x_insn::M680X_INS_PULX, 267 => m680x_insn::M680X_INS_PULY, 268 => m680x_insn::M680X_INS_REV, 269 => m680x_insn::M680X_INS_REVW, 270 => m680x_insn::M680X_INS_ROL, 271 => m680x_insn::M680X_INS_ROLA, 272 => m680x_insn::M680X_INS_ROLB, 273 => m680x_insn::M680X_INS_ROLD, 274 => m680x_insn::M680X_INS_ROLW, 275 => m680x_insn::M680X_INS_ROLX, 276 => m680x_insn::M680X_INS_ROR, 277 => m680x_insn::M680X_INS_RORA, 278 => m680x_insn::M680X_INS_RORB, 279 => m680x_insn::M680X_INS_RORD, 280 => m680x_insn::M680X_INS_RORW, 281 => m680x_insn::M680X_INS_RORX, 282 => m680x_insn::M680X_INS_RSP, 283 => m680x_insn::M680X_INS_RTC, 284 => m680x_insn::M680X_INS_RTI, 285 => m680x_insn::M680X_INS_RTS, 286 => m680x_insn::M680X_INS_SBA, 287 => m680x_insn::M680X_INS_SBC, 288 => m680x_insn::M680X_INS_SBCA, 289 => m680x_insn::M680X_INS_SBCB, 290 => m680x_insn::M680X_INS_SBCD, 291 => m680x_insn::M680X_INS_SBCR, 292 => m680x_insn::M680X_INS_SEC, 293 => m680x_insn::M680X_INS_SEI, 294 => m680x_insn::M680X_INS_SEV, 295 => m680x_insn::M680X_INS_SEX, 296 => m680x_insn::M680X_INS_SEXW, 297 => m680x_insn::M680X_INS_SLP, 298 => m680x_insn::M680X_INS_STA, 299 => m680x_insn::M680X_INS_STAA, 300 => m680x_insn::M680X_INS_STAB, 301 => m680x_insn::M680X_INS_STB, 302 => m680x_insn::M680X_INS_STBT, 303 => m680x_insn::M680X_INS_STD, 304 => m680x_insn::M680X_INS_STE, 305 => m680x_insn::M680X_INS_STF, 306 => m680x_insn::M680X_INS_STOP, 307 => m680x_insn::M680X_INS_STHX, 308 => m680x_insn::M680X_INS_STQ, 309 => m680x_insn::M680X_INS_STS, 310 => m680x_insn::M680X_INS_STU, 311 => m680x_insn::M680X_INS_STW, 312 => m680x_insn::M680X_INS_STX, 313 => m680x_insn::M680X_INS_STY, 314 => m680x_insn::M680X_INS_SUB, 315 => m680x_insn::M680X_INS_SUBA, 316 => m680x_insn::M680X_INS_SUBB, 317 => m680x_insn::M680X_INS_SUBD, 318 => m680x_insn::M680X_INS_SUBE, 319 => m680x_insn::M680X_INS_SUBF, 320 => m680x_insn::M680X_INS_SUBR, 321 => m680x_insn::M680X_INS_SUBW, 322 => m680x_insn::M680X_INS_SWI, 323 => m680x_insn::M680X_INS_SWI2, 324 => m680x_insn::M680X_INS_SWI3, 325 => m680x_insn::M680X_INS_SYNC, 326 => m680x_insn::M680X_INS_TAB, 327 => m680x_insn::M680X_INS_TAP, 328 => m680x_insn::M680X_INS_TAX, 329 => m680x_insn::M680X_INS_TBA, 330 => m680x_insn::M680X_INS_TBEQ, 331 => m680x_insn::M680X_INS_TBL, 332 => m680x_insn::M680X_INS_TBNE, 333 => m680x_insn::M680X_INS_TEST, 334 => m680x_insn::M680X_INS_TFM, 335 => m680x_insn::M680X_INS_TFR, 336 => m680x_insn::M680X_INS_TIM, 337 => m680x_insn::M680X_INS_TPA, 338 => m680x_insn::M680X_INS_TST, 339 => m680x_insn::M680X_INS_TSTA, 340 => m680x_insn::M680X_INS_TSTB, 341 => m680x_insn::M680X_INS_TSTD, 342 => m680x_insn::M680X_INS_TSTE, 343 => m680x_insn::M680X_INS_TSTF, 344 => m680x_insn::M680X_INS_TSTW, 345 => m680x_insn::M680X_INS_TSTX, 346 => m680x_insn::M680X_INS_TSX, 347 => m680x_insn::M680X_INS_TSY, 348 => m680x_insn::M680X_INS_TXA, 349 => m680x_insn::M680X_INS_TXS, 350 => m680x_insn::M680X_INS_TYS, 351 => m680x_insn::M680X_INS_WAI, 352 => m680x_insn::M680X_INS_WAIT, 353 => m680x_insn::M680X_INS_WAV, 354 => m680x_insn::M680X_INS_WAVR, 355 => m680x_insn::M680X_INS_XGDX, 356 => m680x_insn::M680X_INS_XGDY, 357 => m680x_insn::M680X_INS_ENDING, _ => m680x_insn::M680X_INS_INVLD, } } } impl From for m68k_insn { fn from(id: u32) -> Self { match id { 0 => m68k_insn::M68K_INS_INVALID, 1 => m68k_insn::M68K_INS_ABCD, 2 => m68k_insn::M68K_INS_ADD, 3 => m68k_insn::M68K_INS_ADDA, 4 => m68k_insn::M68K_INS_ADDI, 5 => m68k_insn::M68K_INS_ADDQ, 6 => m68k_insn::M68K_INS_ADDX, 7 => m68k_insn::M68K_INS_AND, 8 => m68k_insn::M68K_INS_ANDI, 9 => m68k_insn::M68K_INS_ASL, 10 => m68k_insn::M68K_INS_ASR, 11 => m68k_insn::M68K_INS_BHS, 12 => m68k_insn::M68K_INS_BLO, 13 => m68k_insn::M68K_INS_BHI, 14 => m68k_insn::M68K_INS_BLS, 15 => m68k_insn::M68K_INS_BCC, 16 => m68k_insn::M68K_INS_BCS, 17 => m68k_insn::M68K_INS_BNE, 18 => m68k_insn::M68K_INS_BEQ, 19 => m68k_insn::M68K_INS_BVC, 20 => m68k_insn::M68K_INS_BVS, 21 => m68k_insn::M68K_INS_BPL, 22 => m68k_insn::M68K_INS_BMI, 23 => m68k_insn::M68K_INS_BGE, 24 => m68k_insn::M68K_INS_BLT, 25 => m68k_insn::M68K_INS_BGT, 26 => m68k_insn::M68K_INS_BLE, 27 => m68k_insn::M68K_INS_BRA, 28 => m68k_insn::M68K_INS_BSR, 29 => m68k_insn::M68K_INS_BCHG, 30 => m68k_insn::M68K_INS_BCLR, 31 => m68k_insn::M68K_INS_BSET, 32 => m68k_insn::M68K_INS_BTST, 33 => m68k_insn::M68K_INS_BFCHG, 34 => m68k_insn::M68K_INS_BFCLR, 35 => m68k_insn::M68K_INS_BFEXTS, 36 => m68k_insn::M68K_INS_BFEXTU, 37 => m68k_insn::M68K_INS_BFFFO, 38 => m68k_insn::M68K_INS_BFINS, 39 => m68k_insn::M68K_INS_BFSET, 40 => m68k_insn::M68K_INS_BFTST, 41 => m68k_insn::M68K_INS_BKPT, 42 => m68k_insn::M68K_INS_CALLM, 43 => m68k_insn::M68K_INS_CAS, 44 => m68k_insn::M68K_INS_CAS2, 45 => m68k_insn::M68K_INS_CHK, 46 => m68k_insn::M68K_INS_CHK2, 47 => m68k_insn::M68K_INS_CLR, 48 => m68k_insn::M68K_INS_CMP, 49 => m68k_insn::M68K_INS_CMPA, 50 => m68k_insn::M68K_INS_CMPI, 51 => m68k_insn::M68K_INS_CMPM, 52 => m68k_insn::M68K_INS_CMP2, 53 => m68k_insn::M68K_INS_CINVL, 54 => m68k_insn::M68K_INS_CINVP, 55 => m68k_insn::M68K_INS_CINVA, 56 => m68k_insn::M68K_INS_CPUSHL, 57 => m68k_insn::M68K_INS_CPUSHP, 58 => m68k_insn::M68K_INS_CPUSHA, 59 => m68k_insn::M68K_INS_DBT, 60 => m68k_insn::M68K_INS_DBF, 61 => m68k_insn::M68K_INS_DBHI, 62 => m68k_insn::M68K_INS_DBLS, 63 => m68k_insn::M68K_INS_DBCC, 64 => m68k_insn::M68K_INS_DBCS, 65 => m68k_insn::M68K_INS_DBNE, 66 => m68k_insn::M68K_INS_DBEQ, 67 => m68k_insn::M68K_INS_DBVC, 68 => m68k_insn::M68K_INS_DBVS, 69 => m68k_insn::M68K_INS_DBPL, 70 => m68k_insn::M68K_INS_DBMI, 71 => m68k_insn::M68K_INS_DBGE, 72 => m68k_insn::M68K_INS_DBLT, 73 => m68k_insn::M68K_INS_DBGT, 74 => m68k_insn::M68K_INS_DBLE, 75 => m68k_insn::M68K_INS_DBRA, 76 => m68k_insn::M68K_INS_DIVS, 77 => m68k_insn::M68K_INS_DIVSL, 78 => m68k_insn::M68K_INS_DIVU, 79 => m68k_insn::M68K_INS_DIVUL, 80 => m68k_insn::M68K_INS_EOR, 81 => m68k_insn::M68K_INS_EORI, 82 => m68k_insn::M68K_INS_EXG, 83 => m68k_insn::M68K_INS_EXT, 84 => m68k_insn::M68K_INS_EXTB, 85 => m68k_insn::M68K_INS_FABS, 86 => m68k_insn::M68K_INS_FSABS, 87 => m68k_insn::M68K_INS_FDABS, 88 => m68k_insn::M68K_INS_FACOS, 89 => m68k_insn::M68K_INS_FADD, 90 => m68k_insn::M68K_INS_FSADD, 91 => m68k_insn::M68K_INS_FDADD, 92 => m68k_insn::M68K_INS_FASIN, 93 => m68k_insn::M68K_INS_FATAN, 94 => m68k_insn::M68K_INS_FATANH, 95 => m68k_insn::M68K_INS_FBF, 96 => m68k_insn::M68K_INS_FBEQ, 97 => m68k_insn::M68K_INS_FBOGT, 98 => m68k_insn::M68K_INS_FBOGE, 99 => m68k_insn::M68K_INS_FBOLT, 100 => m68k_insn::M68K_INS_FBOLE, 101 => m68k_insn::M68K_INS_FBOGL, 102 => m68k_insn::M68K_INS_FBOR, 103 => m68k_insn::M68K_INS_FBUN, 104 => m68k_insn::M68K_INS_FBUEQ, 105 => m68k_insn::M68K_INS_FBUGT, 106 => m68k_insn::M68K_INS_FBUGE, 107 => m68k_insn::M68K_INS_FBULT, 108 => m68k_insn::M68K_INS_FBULE, 109 => m68k_insn::M68K_INS_FBNE, 110 => m68k_insn::M68K_INS_FBT, 111 => m68k_insn::M68K_INS_FBSF, 112 => m68k_insn::M68K_INS_FBSEQ, 113 => m68k_insn::M68K_INS_FBGT, 114 => m68k_insn::M68K_INS_FBGE, 115 => m68k_insn::M68K_INS_FBLT, 116 => m68k_insn::M68K_INS_FBLE, 117 => m68k_insn::M68K_INS_FBGL, 118 => m68k_insn::M68K_INS_FBGLE, 119 => m68k_insn::M68K_INS_FBNGLE, 120 => m68k_insn::M68K_INS_FBNGL, 121 => m68k_insn::M68K_INS_FBNLE, 122 => m68k_insn::M68K_INS_FBNLT, 123 => m68k_insn::M68K_INS_FBNGE, 124 => m68k_insn::M68K_INS_FBNGT, 125 => m68k_insn::M68K_INS_FBSNE, 126 => m68k_insn::M68K_INS_FBST, 127 => m68k_insn::M68K_INS_FCMP, 128 => m68k_insn::M68K_INS_FCOS, 129 => m68k_insn::M68K_INS_FCOSH, 130 => m68k_insn::M68K_INS_FDBF, 131 => m68k_insn::M68K_INS_FDBEQ, 132 => m68k_insn::M68K_INS_FDBOGT, 133 => m68k_insn::M68K_INS_FDBOGE, 134 => m68k_insn::M68K_INS_FDBOLT, 135 => m68k_insn::M68K_INS_FDBOLE, 136 => m68k_insn::M68K_INS_FDBOGL, 137 => m68k_insn::M68K_INS_FDBOR, 138 => m68k_insn::M68K_INS_FDBUN, 139 => m68k_insn::M68K_INS_FDBUEQ, 140 => m68k_insn::M68K_INS_FDBUGT, 141 => m68k_insn::M68K_INS_FDBUGE, 142 => m68k_insn::M68K_INS_FDBULT, 143 => m68k_insn::M68K_INS_FDBULE, 144 => m68k_insn::M68K_INS_FDBNE, 145 => m68k_insn::M68K_INS_FDBT, 146 => m68k_insn::M68K_INS_FDBSF, 147 => m68k_insn::M68K_INS_FDBSEQ, 148 => m68k_insn::M68K_INS_FDBGT, 149 => m68k_insn::M68K_INS_FDBGE, 150 => m68k_insn::M68K_INS_FDBLT, 151 => m68k_insn::M68K_INS_FDBLE, 152 => m68k_insn::M68K_INS_FDBGL, 153 => m68k_insn::M68K_INS_FDBGLE, 154 => m68k_insn::M68K_INS_FDBNGLE, 155 => m68k_insn::M68K_INS_FDBNGL, 156 => m68k_insn::M68K_INS_FDBNLE, 157 => m68k_insn::M68K_INS_FDBNLT, 158 => m68k_insn::M68K_INS_FDBNGE, 159 => m68k_insn::M68K_INS_FDBNGT, 160 => m68k_insn::M68K_INS_FDBSNE, 161 => m68k_insn::M68K_INS_FDBST, 162 => m68k_insn::M68K_INS_FDIV, 163 => m68k_insn::M68K_INS_FSDIV, 164 => m68k_insn::M68K_INS_FDDIV, 165 => m68k_insn::M68K_INS_FETOX, 166 => m68k_insn::M68K_INS_FETOXM1, 167 => m68k_insn::M68K_INS_FGETEXP, 168 => m68k_insn::M68K_INS_FGETMAN, 169 => m68k_insn::M68K_INS_FINT, 170 => m68k_insn::M68K_INS_FINTRZ, 171 => m68k_insn::M68K_INS_FLOG10, 172 => m68k_insn::M68K_INS_FLOG2, 173 => m68k_insn::M68K_INS_FLOGN, 174 => m68k_insn::M68K_INS_FLOGNP1, 175 => m68k_insn::M68K_INS_FMOD, 176 => m68k_insn::M68K_INS_FMOVE, 177 => m68k_insn::M68K_INS_FSMOVE, 178 => m68k_insn::M68K_INS_FDMOVE, 179 => m68k_insn::M68K_INS_FMOVECR, 180 => m68k_insn::M68K_INS_FMOVEM, 181 => m68k_insn::M68K_INS_FMUL, 182 => m68k_insn::M68K_INS_FSMUL, 183 => m68k_insn::M68K_INS_FDMUL, 184 => m68k_insn::M68K_INS_FNEG, 185 => m68k_insn::M68K_INS_FSNEG, 186 => m68k_insn::M68K_INS_FDNEG, 187 => m68k_insn::M68K_INS_FNOP, 188 => m68k_insn::M68K_INS_FREM, 189 => m68k_insn::M68K_INS_FRESTORE, 190 => m68k_insn::M68K_INS_FSAVE, 191 => m68k_insn::M68K_INS_FSCALE, 192 => m68k_insn::M68K_INS_FSGLDIV, 193 => m68k_insn::M68K_INS_FSGLMUL, 194 => m68k_insn::M68K_INS_FSIN, 195 => m68k_insn::M68K_INS_FSINCOS, 196 => m68k_insn::M68K_INS_FSINH, 197 => m68k_insn::M68K_INS_FSQRT, 198 => m68k_insn::M68K_INS_FSSQRT, 199 => m68k_insn::M68K_INS_FDSQRT, 200 => m68k_insn::M68K_INS_FSF, 201 => m68k_insn::M68K_INS_FSBEQ, 202 => m68k_insn::M68K_INS_FSOGT, 203 => m68k_insn::M68K_INS_FSOGE, 204 => m68k_insn::M68K_INS_FSOLT, 205 => m68k_insn::M68K_INS_FSOLE, 206 => m68k_insn::M68K_INS_FSOGL, 207 => m68k_insn::M68K_INS_FSOR, 208 => m68k_insn::M68K_INS_FSUN, 209 => m68k_insn::M68K_INS_FSUEQ, 210 => m68k_insn::M68K_INS_FSUGT, 211 => m68k_insn::M68K_INS_FSUGE, 212 => m68k_insn::M68K_INS_FSULT, 213 => m68k_insn::M68K_INS_FSULE, 214 => m68k_insn::M68K_INS_FSNE, 215 => m68k_insn::M68K_INS_FST, 216 => m68k_insn::M68K_INS_FSSF, 217 => m68k_insn::M68K_INS_FSSEQ, 218 => m68k_insn::M68K_INS_FSGT, 219 => m68k_insn::M68K_INS_FSGE, 220 => m68k_insn::M68K_INS_FSLT, 221 => m68k_insn::M68K_INS_FSLE, 222 => m68k_insn::M68K_INS_FSGL, 223 => m68k_insn::M68K_INS_FSGLE, 224 => m68k_insn::M68K_INS_FSNGLE, 225 => m68k_insn::M68K_INS_FSNGL, 226 => m68k_insn::M68K_INS_FSNLE, 227 => m68k_insn::M68K_INS_FSNLT, 228 => m68k_insn::M68K_INS_FSNGE, 229 => m68k_insn::M68K_INS_FSNGT, 230 => m68k_insn::M68K_INS_FSSNE, 231 => m68k_insn::M68K_INS_FSST, 232 => m68k_insn::M68K_INS_FSUB, 233 => m68k_insn::M68K_INS_FSSUB, 234 => m68k_insn::M68K_INS_FDSUB, 235 => m68k_insn::M68K_INS_FTAN, 236 => m68k_insn::M68K_INS_FTANH, 237 => m68k_insn::M68K_INS_FTENTOX, 238 => m68k_insn::M68K_INS_FTRAPF, 239 => m68k_insn::M68K_INS_FTRAPEQ, 240 => m68k_insn::M68K_INS_FTRAPOGT, 241 => m68k_insn::M68K_INS_FTRAPOGE, 242 => m68k_insn::M68K_INS_FTRAPOLT, 243 => m68k_insn::M68K_INS_FTRAPOLE, 244 => m68k_insn::M68K_INS_FTRAPOGL, 245 => m68k_insn::M68K_INS_FTRAPOR, 246 => m68k_insn::M68K_INS_FTRAPUN, 247 => m68k_insn::M68K_INS_FTRAPUEQ, 248 => m68k_insn::M68K_INS_FTRAPUGT, 249 => m68k_insn::M68K_INS_FTRAPUGE, 250 => m68k_insn::M68K_INS_FTRAPULT, 251 => m68k_insn::M68K_INS_FTRAPULE, 252 => m68k_insn::M68K_INS_FTRAPNE, 253 => m68k_insn::M68K_INS_FTRAPT, 254 => m68k_insn::M68K_INS_FTRAPSF, 255 => m68k_insn::M68K_INS_FTRAPSEQ, 256 => m68k_insn::M68K_INS_FTRAPGT, 257 => m68k_insn::M68K_INS_FTRAPGE, 258 => m68k_insn::M68K_INS_FTRAPLT, 259 => m68k_insn::M68K_INS_FTRAPLE, 260 => m68k_insn::M68K_INS_FTRAPGL, 261 => m68k_insn::M68K_INS_FTRAPGLE, 262 => m68k_insn::M68K_INS_FTRAPNGLE, 263 => m68k_insn::M68K_INS_FTRAPNGL, 264 => m68k_insn::M68K_INS_FTRAPNLE, 265 => m68k_insn::M68K_INS_FTRAPNLT, 266 => m68k_insn::M68K_INS_FTRAPNGE, 267 => m68k_insn::M68K_INS_FTRAPNGT, 268 => m68k_insn::M68K_INS_FTRAPSNE, 269 => m68k_insn::M68K_INS_FTRAPST, 270 => m68k_insn::M68K_INS_FTST, 271 => m68k_insn::M68K_INS_FTWOTOX, 272 => m68k_insn::M68K_INS_HALT, 273 => m68k_insn::M68K_INS_ILLEGAL, 274 => m68k_insn::M68K_INS_JMP, 275 => m68k_insn::M68K_INS_JSR, 276 => m68k_insn::M68K_INS_LEA, 277 => m68k_insn::M68K_INS_LINK, 278 => m68k_insn::M68K_INS_LPSTOP, 279 => m68k_insn::M68K_INS_LSL, 280 => m68k_insn::M68K_INS_LSR, 281 => m68k_insn::M68K_INS_MOVE, 282 => m68k_insn::M68K_INS_MOVEA, 283 => m68k_insn::M68K_INS_MOVEC, 284 => m68k_insn::M68K_INS_MOVEM, 285 => m68k_insn::M68K_INS_MOVEP, 286 => m68k_insn::M68K_INS_MOVEQ, 287 => m68k_insn::M68K_INS_MOVES, 288 => m68k_insn::M68K_INS_MOVE16, 289 => m68k_insn::M68K_INS_MULS, 290 => m68k_insn::M68K_INS_MULU, 291 => m68k_insn::M68K_INS_NBCD, 292 => m68k_insn::M68K_INS_NEG, 293 => m68k_insn::M68K_INS_NEGX, 294 => m68k_insn::M68K_INS_NOP, 295 => m68k_insn::M68K_INS_NOT, 296 => m68k_insn::M68K_INS_OR, 297 => m68k_insn::M68K_INS_ORI, 298 => m68k_insn::M68K_INS_PACK, 299 => m68k_insn::M68K_INS_PEA, 300 => m68k_insn::M68K_INS_PFLUSH, 301 => m68k_insn::M68K_INS_PFLUSHA, 302 => m68k_insn::M68K_INS_PFLUSHAN, 303 => m68k_insn::M68K_INS_PFLUSHN, 304 => m68k_insn::M68K_INS_PLOADR, 305 => m68k_insn::M68K_INS_PLOADW, 306 => m68k_insn::M68K_INS_PLPAR, 307 => m68k_insn::M68K_INS_PLPAW, 308 => m68k_insn::M68K_INS_PMOVE, 309 => m68k_insn::M68K_INS_PMOVEFD, 310 => m68k_insn::M68K_INS_PTESTR, 311 => m68k_insn::M68K_INS_PTESTW, 312 => m68k_insn::M68K_INS_PULSE, 313 => m68k_insn::M68K_INS_REMS, 314 => m68k_insn::M68K_INS_REMU, 315 => m68k_insn::M68K_INS_RESET, 316 => m68k_insn::M68K_INS_ROL, 317 => m68k_insn::M68K_INS_ROR, 318 => m68k_insn::M68K_INS_ROXL, 319 => m68k_insn::M68K_INS_ROXR, 320 => m68k_insn::M68K_INS_RTD, 321 => m68k_insn::M68K_INS_RTE, 322 => m68k_insn::M68K_INS_RTM, 323 => m68k_insn::M68K_INS_RTR, 324 => m68k_insn::M68K_INS_RTS, 325 => m68k_insn::M68K_INS_SBCD, 326 => m68k_insn::M68K_INS_ST, 327 => m68k_insn::M68K_INS_SF, 328 => m68k_insn::M68K_INS_SHI, 329 => m68k_insn::M68K_INS_SLS, 330 => m68k_insn::M68K_INS_SCC, 331 => m68k_insn::M68K_INS_SHS, 332 => m68k_insn::M68K_INS_SCS, 333 => m68k_insn::M68K_INS_SLO, 334 => m68k_insn::M68K_INS_SNE, 335 => m68k_insn::M68K_INS_SEQ, 336 => m68k_insn::M68K_INS_SVC, 337 => m68k_insn::M68K_INS_SVS, 338 => m68k_insn::M68K_INS_SPL, 339 => m68k_insn::M68K_INS_SMI, 340 => m68k_insn::M68K_INS_SGE, 341 => m68k_insn::M68K_INS_SLT, 342 => m68k_insn::M68K_INS_SGT, 343 => m68k_insn::M68K_INS_SLE, 344 => m68k_insn::M68K_INS_STOP, 345 => m68k_insn::M68K_INS_SUB, 346 => m68k_insn::M68K_INS_SUBA, 347 => m68k_insn::M68K_INS_SUBI, 348 => m68k_insn::M68K_INS_SUBQ, 349 => m68k_insn::M68K_INS_SUBX, 350 => m68k_insn::M68K_INS_SWAP, 351 => m68k_insn::M68K_INS_TAS, 352 => m68k_insn::M68K_INS_TRAP, 353 => m68k_insn::M68K_INS_TRAPV, 354 => m68k_insn::M68K_INS_TRAPT, 355 => m68k_insn::M68K_INS_TRAPF, 356 => m68k_insn::M68K_INS_TRAPHI, 357 => m68k_insn::M68K_INS_TRAPLS, 358 => m68k_insn::M68K_INS_TRAPCC, 359 => m68k_insn::M68K_INS_TRAPHS, 360 => m68k_insn::M68K_INS_TRAPCS, 361 => m68k_insn::M68K_INS_TRAPLO, 362 => m68k_insn::M68K_INS_TRAPNE, 363 => m68k_insn::M68K_INS_TRAPEQ, 364 => m68k_insn::M68K_INS_TRAPVC, 365 => m68k_insn::M68K_INS_TRAPVS, 366 => m68k_insn::M68K_INS_TRAPPL, 367 => m68k_insn::M68K_INS_TRAPMI, 368 => m68k_insn::M68K_INS_TRAPGE, 369 => m68k_insn::M68K_INS_TRAPLT, 370 => m68k_insn::M68K_INS_TRAPGT, 371 => m68k_insn::M68K_INS_TRAPLE, 372 => m68k_insn::M68K_INS_TST, 373 => m68k_insn::M68K_INS_UNLK, 374 => m68k_insn::M68K_INS_UNPK, 375 => m68k_insn::M68K_INS_ENDING, _ => m68k_insn::M68K_INS_INVALID, } } } impl From for mips_insn { fn from(id: u32) -> Self { match id { 0 => mips_insn::MIPS_INS_INVALID, 1 => mips_insn::MIPS_INS_ABSQ_S, 2 => mips_insn::MIPS_INS_ADD, 3 => mips_insn::MIPS_INS_ADDIUPC, 4 => mips_insn::MIPS_INS_ADDIUR1SP, 5 => mips_insn::MIPS_INS_ADDIUR2, 6 => mips_insn::MIPS_INS_ADDIUS5, 7 => mips_insn::MIPS_INS_ADDIUSP, 8 => mips_insn::MIPS_INS_ADDQH, 9 => mips_insn::MIPS_INS_ADDQH_R, 10 => mips_insn::MIPS_INS_ADDQ, 11 => mips_insn::MIPS_INS_ADDQ_S, 12 => mips_insn::MIPS_INS_ADDSC, 13 => mips_insn::MIPS_INS_ADDS_A, 14 => mips_insn::MIPS_INS_ADDS_S, 15 => mips_insn::MIPS_INS_ADDS_U, 16 => mips_insn::MIPS_INS_ADDU16, 17 => mips_insn::MIPS_INS_ADDUH, 18 => mips_insn::MIPS_INS_ADDUH_R, 19 => mips_insn::MIPS_INS_ADDU, 20 => mips_insn::MIPS_INS_ADDU_S, 21 => mips_insn::MIPS_INS_ADDVI, 22 => mips_insn::MIPS_INS_ADDV, 23 => mips_insn::MIPS_INS_ADDWC, 24 => mips_insn::MIPS_INS_ADD_A, 25 => mips_insn::MIPS_INS_ADDI, 26 => mips_insn::MIPS_INS_ADDIU, 27 => mips_insn::MIPS_INS_ALIGN, 28 => mips_insn::MIPS_INS_ALUIPC, 29 => mips_insn::MIPS_INS_AND, 30 => mips_insn::MIPS_INS_AND16, 31 => mips_insn::MIPS_INS_ANDI16, 32 => mips_insn::MIPS_INS_ANDI, 33 => mips_insn::MIPS_INS_APPEND, 34 => mips_insn::MIPS_INS_ASUB_S, 35 => mips_insn::MIPS_INS_ASUB_U, 36 => mips_insn::MIPS_INS_AUI, 37 => mips_insn::MIPS_INS_AUIPC, 38 => mips_insn::MIPS_INS_AVER_S, 39 => mips_insn::MIPS_INS_AVER_U, 40 => mips_insn::MIPS_INS_AVE_S, 41 => mips_insn::MIPS_INS_AVE_U, 42 => mips_insn::MIPS_INS_B16, 43 => mips_insn::MIPS_INS_BADDU, 44 => mips_insn::MIPS_INS_BAL, 45 => mips_insn::MIPS_INS_BALC, 46 => mips_insn::MIPS_INS_BALIGN, 47 => mips_insn::MIPS_INS_BBIT0, 48 => mips_insn::MIPS_INS_BBIT032, 49 => mips_insn::MIPS_INS_BBIT1, 50 => mips_insn::MIPS_INS_BBIT132, 51 => mips_insn::MIPS_INS_BC, 52 => mips_insn::MIPS_INS_BC0F, 53 => mips_insn::MIPS_INS_BC0FL, 54 => mips_insn::MIPS_INS_BC0T, 55 => mips_insn::MIPS_INS_BC0TL, 56 => mips_insn::MIPS_INS_BC1EQZ, 57 => mips_insn::MIPS_INS_BC1F, 58 => mips_insn::MIPS_INS_BC1FL, 59 => mips_insn::MIPS_INS_BC1NEZ, 60 => mips_insn::MIPS_INS_BC1T, 61 => mips_insn::MIPS_INS_BC1TL, 62 => mips_insn::MIPS_INS_BC2EQZ, 63 => mips_insn::MIPS_INS_BC2F, 64 => mips_insn::MIPS_INS_BC2FL, 65 => mips_insn::MIPS_INS_BC2NEZ, 66 => mips_insn::MIPS_INS_BC2T, 67 => mips_insn::MIPS_INS_BC2TL, 68 => mips_insn::MIPS_INS_BC3F, 69 => mips_insn::MIPS_INS_BC3FL, 70 => mips_insn::MIPS_INS_BC3T, 71 => mips_insn::MIPS_INS_BC3TL, 72 => mips_insn::MIPS_INS_BCLRI, 73 => mips_insn::MIPS_INS_BCLR, 74 => mips_insn::MIPS_INS_BEQ, 75 => mips_insn::MIPS_INS_BEQC, 76 => mips_insn::MIPS_INS_BEQL, 77 => mips_insn::MIPS_INS_BEQZ16, 78 => mips_insn::MIPS_INS_BEQZALC, 79 => mips_insn::MIPS_INS_BEQZC, 80 => mips_insn::MIPS_INS_BGEC, 81 => mips_insn::MIPS_INS_BGEUC, 82 => mips_insn::MIPS_INS_BGEZ, 83 => mips_insn::MIPS_INS_BGEZAL, 84 => mips_insn::MIPS_INS_BGEZALC, 85 => mips_insn::MIPS_INS_BGEZALL, 86 => mips_insn::MIPS_INS_BGEZALS, 87 => mips_insn::MIPS_INS_BGEZC, 88 => mips_insn::MIPS_INS_BGEZL, 89 => mips_insn::MIPS_INS_BGTZ, 90 => mips_insn::MIPS_INS_BGTZALC, 91 => mips_insn::MIPS_INS_BGTZC, 92 => mips_insn::MIPS_INS_BGTZL, 93 => mips_insn::MIPS_INS_BINSLI, 94 => mips_insn::MIPS_INS_BINSL, 95 => mips_insn::MIPS_INS_BINSRI, 96 => mips_insn::MIPS_INS_BINSR, 97 => mips_insn::MIPS_INS_BITREV, 98 => mips_insn::MIPS_INS_BITSWAP, 99 => mips_insn::MIPS_INS_BLEZ, 100 => mips_insn::MIPS_INS_BLEZALC, 101 => mips_insn::MIPS_INS_BLEZC, 102 => mips_insn::MIPS_INS_BLEZL, 103 => mips_insn::MIPS_INS_BLTC, 104 => mips_insn::MIPS_INS_BLTUC, 105 => mips_insn::MIPS_INS_BLTZ, 106 => mips_insn::MIPS_INS_BLTZAL, 107 => mips_insn::MIPS_INS_BLTZALC, 108 => mips_insn::MIPS_INS_BLTZALL, 109 => mips_insn::MIPS_INS_BLTZALS, 110 => mips_insn::MIPS_INS_BLTZC, 111 => mips_insn::MIPS_INS_BLTZL, 112 => mips_insn::MIPS_INS_BMNZI, 113 => mips_insn::MIPS_INS_BMNZ, 114 => mips_insn::MIPS_INS_BMZI, 115 => mips_insn::MIPS_INS_BMZ, 116 => mips_insn::MIPS_INS_BNE, 117 => mips_insn::MIPS_INS_BNEC, 118 => mips_insn::MIPS_INS_BNEGI, 119 => mips_insn::MIPS_INS_BNEG, 120 => mips_insn::MIPS_INS_BNEL, 121 => mips_insn::MIPS_INS_BNEZ16, 122 => mips_insn::MIPS_INS_BNEZALC, 123 => mips_insn::MIPS_INS_BNEZC, 124 => mips_insn::MIPS_INS_BNVC, 125 => mips_insn::MIPS_INS_BNZ, 126 => mips_insn::MIPS_INS_BOVC, 127 => mips_insn::MIPS_INS_BPOSGE32, 128 => mips_insn::MIPS_INS_BREAK, 129 => mips_insn::MIPS_INS_BREAK16, 130 => mips_insn::MIPS_INS_BSELI, 131 => mips_insn::MIPS_INS_BSEL, 132 => mips_insn::MIPS_INS_BSETI, 133 => mips_insn::MIPS_INS_BSET, 134 => mips_insn::MIPS_INS_BZ, 135 => mips_insn::MIPS_INS_BEQZ, 136 => mips_insn::MIPS_INS_B, 137 => mips_insn::MIPS_INS_BNEZ, 138 => mips_insn::MIPS_INS_BTEQZ, 139 => mips_insn::MIPS_INS_BTNEZ, 140 => mips_insn::MIPS_INS_CACHE, 141 => mips_insn::MIPS_INS_CEIL, 142 => mips_insn::MIPS_INS_CEQI, 143 => mips_insn::MIPS_INS_CEQ, 144 => mips_insn::MIPS_INS_CFC1, 145 => mips_insn::MIPS_INS_CFCMSA, 146 => mips_insn::MIPS_INS_CINS, 147 => mips_insn::MIPS_INS_CINS32, 148 => mips_insn::MIPS_INS_CLASS, 149 => mips_insn::MIPS_INS_CLEI_S, 150 => mips_insn::MIPS_INS_CLEI_U, 151 => mips_insn::MIPS_INS_CLE_S, 152 => mips_insn::MIPS_INS_CLE_U, 153 => mips_insn::MIPS_INS_CLO, 154 => mips_insn::MIPS_INS_CLTI_S, 155 => mips_insn::MIPS_INS_CLTI_U, 156 => mips_insn::MIPS_INS_CLT_S, 157 => mips_insn::MIPS_INS_CLT_U, 158 => mips_insn::MIPS_INS_CLZ, 159 => mips_insn::MIPS_INS_CMPGDU, 160 => mips_insn::MIPS_INS_CMPGU, 161 => mips_insn::MIPS_INS_CMPU, 162 => mips_insn::MIPS_INS_CMP, 163 => mips_insn::MIPS_INS_COPY_S, 164 => mips_insn::MIPS_INS_COPY_U, 165 => mips_insn::MIPS_INS_CTC1, 166 => mips_insn::MIPS_INS_CTCMSA, 167 => mips_insn::MIPS_INS_CVT, 168 => mips_insn::MIPS_INS_C, 169 => mips_insn::MIPS_INS_CMPI, 170 => mips_insn::MIPS_INS_DADD, 171 => mips_insn::MIPS_INS_DADDI, 172 => mips_insn::MIPS_INS_DADDIU, 173 => mips_insn::MIPS_INS_DADDU, 174 => mips_insn::MIPS_INS_DAHI, 175 => mips_insn::MIPS_INS_DALIGN, 176 => mips_insn::MIPS_INS_DATI, 177 => mips_insn::MIPS_INS_DAUI, 178 => mips_insn::MIPS_INS_DBITSWAP, 179 => mips_insn::MIPS_INS_DCLO, 180 => mips_insn::MIPS_INS_DCLZ, 181 => mips_insn::MIPS_INS_DDIV, 182 => mips_insn::MIPS_INS_DDIVU, 183 => mips_insn::MIPS_INS_DERET, 184 => mips_insn::MIPS_INS_DEXT, 185 => mips_insn::MIPS_INS_DEXTM, 186 => mips_insn::MIPS_INS_DEXTU, 187 => mips_insn::MIPS_INS_DI, 188 => mips_insn::MIPS_INS_DINS, 189 => mips_insn::MIPS_INS_DINSM, 190 => mips_insn::MIPS_INS_DINSU, 191 => mips_insn::MIPS_INS_DIV, 192 => mips_insn::MIPS_INS_DIVU, 193 => mips_insn::MIPS_INS_DIV_S, 194 => mips_insn::MIPS_INS_DIV_U, 195 => mips_insn::MIPS_INS_DLSA, 196 => mips_insn::MIPS_INS_DMFC0, 197 => mips_insn::MIPS_INS_DMFC1, 198 => mips_insn::MIPS_INS_DMFC2, 199 => mips_insn::MIPS_INS_DMOD, 200 => mips_insn::MIPS_INS_DMODU, 201 => mips_insn::MIPS_INS_DMTC0, 202 => mips_insn::MIPS_INS_DMTC1, 203 => mips_insn::MIPS_INS_DMTC2, 204 => mips_insn::MIPS_INS_DMUH, 205 => mips_insn::MIPS_INS_DMUHU, 206 => mips_insn::MIPS_INS_DMUL, 207 => mips_insn::MIPS_INS_DMULT, 208 => mips_insn::MIPS_INS_DMULTU, 209 => mips_insn::MIPS_INS_DMULU, 210 => mips_insn::MIPS_INS_DOTP_S, 211 => mips_insn::MIPS_INS_DOTP_U, 212 => mips_insn::MIPS_INS_DPADD_S, 213 => mips_insn::MIPS_INS_DPADD_U, 214 => mips_insn::MIPS_INS_DPAQX_SA, 215 => mips_insn::MIPS_INS_DPAQX_S, 216 => mips_insn::MIPS_INS_DPAQ_SA, 217 => mips_insn::MIPS_INS_DPAQ_S, 218 => mips_insn::MIPS_INS_DPAU, 219 => mips_insn::MIPS_INS_DPAX, 220 => mips_insn::MIPS_INS_DPA, 221 => mips_insn::MIPS_INS_DPOP, 222 => mips_insn::MIPS_INS_DPSQX_SA, 223 => mips_insn::MIPS_INS_DPSQX_S, 224 => mips_insn::MIPS_INS_DPSQ_SA, 225 => mips_insn::MIPS_INS_DPSQ_S, 226 => mips_insn::MIPS_INS_DPSUB_S, 227 => mips_insn::MIPS_INS_DPSUB_U, 228 => mips_insn::MIPS_INS_DPSU, 229 => mips_insn::MIPS_INS_DPSX, 230 => mips_insn::MIPS_INS_DPS, 231 => mips_insn::MIPS_INS_DROTR, 232 => mips_insn::MIPS_INS_DROTR32, 233 => mips_insn::MIPS_INS_DROTRV, 234 => mips_insn::MIPS_INS_DSBH, 235 => mips_insn::MIPS_INS_DSHD, 236 => mips_insn::MIPS_INS_DSLL, 237 => mips_insn::MIPS_INS_DSLL32, 238 => mips_insn::MIPS_INS_DSLLV, 239 => mips_insn::MIPS_INS_DSRA, 240 => mips_insn::MIPS_INS_DSRA32, 241 => mips_insn::MIPS_INS_DSRAV, 242 => mips_insn::MIPS_INS_DSRL, 243 => mips_insn::MIPS_INS_DSRL32, 244 => mips_insn::MIPS_INS_DSRLV, 245 => mips_insn::MIPS_INS_DSUB, 246 => mips_insn::MIPS_INS_DSUBU, 247 => mips_insn::MIPS_INS_EHB, 248 => mips_insn::MIPS_INS_EI, 249 => mips_insn::MIPS_INS_ERET, 250 => mips_insn::MIPS_INS_EXT, 251 => mips_insn::MIPS_INS_EXTP, 252 => mips_insn::MIPS_INS_EXTPDP, 253 => mips_insn::MIPS_INS_EXTPDPV, 254 => mips_insn::MIPS_INS_EXTPV, 255 => mips_insn::MIPS_INS_EXTRV_RS, 256 => mips_insn::MIPS_INS_EXTRV_R, 257 => mips_insn::MIPS_INS_EXTRV_S, 258 => mips_insn::MIPS_INS_EXTRV, 259 => mips_insn::MIPS_INS_EXTR_RS, 260 => mips_insn::MIPS_INS_EXTR_R, 261 => mips_insn::MIPS_INS_EXTR_S, 262 => mips_insn::MIPS_INS_EXTR, 263 => mips_insn::MIPS_INS_EXTS, 264 => mips_insn::MIPS_INS_EXTS32, 265 => mips_insn::MIPS_INS_ABS, 266 => mips_insn::MIPS_INS_FADD, 267 => mips_insn::MIPS_INS_FCAF, 268 => mips_insn::MIPS_INS_FCEQ, 269 => mips_insn::MIPS_INS_FCLASS, 270 => mips_insn::MIPS_INS_FCLE, 271 => mips_insn::MIPS_INS_FCLT, 272 => mips_insn::MIPS_INS_FCNE, 273 => mips_insn::MIPS_INS_FCOR, 274 => mips_insn::MIPS_INS_FCUEQ, 275 => mips_insn::MIPS_INS_FCULE, 276 => mips_insn::MIPS_INS_FCULT, 277 => mips_insn::MIPS_INS_FCUNE, 278 => mips_insn::MIPS_INS_FCUN, 279 => mips_insn::MIPS_INS_FDIV, 280 => mips_insn::MIPS_INS_FEXDO, 281 => mips_insn::MIPS_INS_FEXP2, 282 => mips_insn::MIPS_INS_FEXUPL, 283 => mips_insn::MIPS_INS_FEXUPR, 284 => mips_insn::MIPS_INS_FFINT_S, 285 => mips_insn::MIPS_INS_FFINT_U, 286 => mips_insn::MIPS_INS_FFQL, 287 => mips_insn::MIPS_INS_FFQR, 288 => mips_insn::MIPS_INS_FILL, 289 => mips_insn::MIPS_INS_FLOG2, 290 => mips_insn::MIPS_INS_FLOOR, 291 => mips_insn::MIPS_INS_FMADD, 292 => mips_insn::MIPS_INS_FMAX_A, 293 => mips_insn::MIPS_INS_FMAX, 294 => mips_insn::MIPS_INS_FMIN_A, 295 => mips_insn::MIPS_INS_FMIN, 296 => mips_insn::MIPS_INS_MOV, 297 => mips_insn::MIPS_INS_FMSUB, 298 => mips_insn::MIPS_INS_FMUL, 299 => mips_insn::MIPS_INS_MUL, 300 => mips_insn::MIPS_INS_NEG, 301 => mips_insn::MIPS_INS_FRCP, 302 => mips_insn::MIPS_INS_FRINT, 303 => mips_insn::MIPS_INS_FRSQRT, 304 => mips_insn::MIPS_INS_FSAF, 305 => mips_insn::MIPS_INS_FSEQ, 306 => mips_insn::MIPS_INS_FSLE, 307 => mips_insn::MIPS_INS_FSLT, 308 => mips_insn::MIPS_INS_FSNE, 309 => mips_insn::MIPS_INS_FSOR, 310 => mips_insn::MIPS_INS_FSQRT, 311 => mips_insn::MIPS_INS_SQRT, 312 => mips_insn::MIPS_INS_FSUB, 313 => mips_insn::MIPS_INS_SUB, 314 => mips_insn::MIPS_INS_FSUEQ, 315 => mips_insn::MIPS_INS_FSULE, 316 => mips_insn::MIPS_INS_FSULT, 317 => mips_insn::MIPS_INS_FSUNE, 318 => mips_insn::MIPS_INS_FSUN, 319 => mips_insn::MIPS_INS_FTINT_S, 320 => mips_insn::MIPS_INS_FTINT_U, 321 => mips_insn::MIPS_INS_FTQ, 322 => mips_insn::MIPS_INS_FTRUNC_S, 323 => mips_insn::MIPS_INS_FTRUNC_U, 324 => mips_insn::MIPS_INS_HADD_S, 325 => mips_insn::MIPS_INS_HADD_U, 326 => mips_insn::MIPS_INS_HSUB_S, 327 => mips_insn::MIPS_INS_HSUB_U, 328 => mips_insn::MIPS_INS_ILVEV, 329 => mips_insn::MIPS_INS_ILVL, 330 => mips_insn::MIPS_INS_ILVOD, 331 => mips_insn::MIPS_INS_ILVR, 332 => mips_insn::MIPS_INS_INS, 333 => mips_insn::MIPS_INS_INSERT, 334 => mips_insn::MIPS_INS_INSV, 335 => mips_insn::MIPS_INS_INSVE, 336 => mips_insn::MIPS_INS_J, 337 => mips_insn::MIPS_INS_JAL, 338 => mips_insn::MIPS_INS_JALR, 339 => mips_insn::MIPS_INS_JALRS16, 340 => mips_insn::MIPS_INS_JALRS, 341 => mips_insn::MIPS_INS_JALS, 342 => mips_insn::MIPS_INS_JALX, 343 => mips_insn::MIPS_INS_JIALC, 344 => mips_insn::MIPS_INS_JIC, 345 => mips_insn::MIPS_INS_JR, 346 => mips_insn::MIPS_INS_JR16, 347 => mips_insn::MIPS_INS_JRADDIUSP, 348 => mips_insn::MIPS_INS_JRC, 349 => mips_insn::MIPS_INS_JALRC, 350 => mips_insn::MIPS_INS_LB, 351 => mips_insn::MIPS_INS_LBU16, 352 => mips_insn::MIPS_INS_LBUX, 353 => mips_insn::MIPS_INS_LBU, 354 => mips_insn::MIPS_INS_LD, 355 => mips_insn::MIPS_INS_LDC1, 356 => mips_insn::MIPS_INS_LDC2, 357 => mips_insn::MIPS_INS_LDC3, 358 => mips_insn::MIPS_INS_LDI, 359 => mips_insn::MIPS_INS_LDL, 360 => mips_insn::MIPS_INS_LDPC, 361 => mips_insn::MIPS_INS_LDR, 362 => mips_insn::MIPS_INS_LDXC1, 363 => mips_insn::MIPS_INS_LH, 364 => mips_insn::MIPS_INS_LHU16, 365 => mips_insn::MIPS_INS_LHX, 366 => mips_insn::MIPS_INS_LHU, 367 => mips_insn::MIPS_INS_LI16, 368 => mips_insn::MIPS_INS_LL, 369 => mips_insn::MIPS_INS_LLD, 370 => mips_insn::MIPS_INS_LSA, 371 => mips_insn::MIPS_INS_LUXC1, 372 => mips_insn::MIPS_INS_LUI, 373 => mips_insn::MIPS_INS_LW, 374 => mips_insn::MIPS_INS_LW16, 375 => mips_insn::MIPS_INS_LWC1, 376 => mips_insn::MIPS_INS_LWC2, 377 => mips_insn::MIPS_INS_LWC3, 378 => mips_insn::MIPS_INS_LWL, 379 => mips_insn::MIPS_INS_LWM16, 380 => mips_insn::MIPS_INS_LWM32, 381 => mips_insn::MIPS_INS_LWPC, 382 => mips_insn::MIPS_INS_LWP, 383 => mips_insn::MIPS_INS_LWR, 384 => mips_insn::MIPS_INS_LWUPC, 385 => mips_insn::MIPS_INS_LWU, 386 => mips_insn::MIPS_INS_LWX, 387 => mips_insn::MIPS_INS_LWXC1, 388 => mips_insn::MIPS_INS_LWXS, 389 => mips_insn::MIPS_INS_LI, 390 => mips_insn::MIPS_INS_MADD, 391 => mips_insn::MIPS_INS_MADDF, 392 => mips_insn::MIPS_INS_MADDR_Q, 393 => mips_insn::MIPS_INS_MADDU, 394 => mips_insn::MIPS_INS_MADDV, 395 => mips_insn::MIPS_INS_MADD_Q, 396 => mips_insn::MIPS_INS_MAQ_SA, 397 => mips_insn::MIPS_INS_MAQ_S, 398 => mips_insn::MIPS_INS_MAXA, 399 => mips_insn::MIPS_INS_MAXI_S, 400 => mips_insn::MIPS_INS_MAXI_U, 401 => mips_insn::MIPS_INS_MAX_A, 402 => mips_insn::MIPS_INS_MAX, 403 => mips_insn::MIPS_INS_MAX_S, 404 => mips_insn::MIPS_INS_MAX_U, 405 => mips_insn::MIPS_INS_MFC0, 406 => mips_insn::MIPS_INS_MFC1, 407 => mips_insn::MIPS_INS_MFC2, 408 => mips_insn::MIPS_INS_MFHC1, 409 => mips_insn::MIPS_INS_MFHI, 410 => mips_insn::MIPS_INS_MFLO, 411 => mips_insn::MIPS_INS_MINA, 412 => mips_insn::MIPS_INS_MINI_S, 413 => mips_insn::MIPS_INS_MINI_U, 414 => mips_insn::MIPS_INS_MIN_A, 415 => mips_insn::MIPS_INS_MIN, 416 => mips_insn::MIPS_INS_MIN_S, 417 => mips_insn::MIPS_INS_MIN_U, 418 => mips_insn::MIPS_INS_MOD, 419 => mips_insn::MIPS_INS_MODSUB, 420 => mips_insn::MIPS_INS_MODU, 421 => mips_insn::MIPS_INS_MOD_S, 422 => mips_insn::MIPS_INS_MOD_U, 423 => mips_insn::MIPS_INS_MOVE, 424 => mips_insn::MIPS_INS_MOVEP, 425 => mips_insn::MIPS_INS_MOVF, 426 => mips_insn::MIPS_INS_MOVN, 427 => mips_insn::MIPS_INS_MOVT, 428 => mips_insn::MIPS_INS_MOVZ, 429 => mips_insn::MIPS_INS_MSUB, 430 => mips_insn::MIPS_INS_MSUBF, 431 => mips_insn::MIPS_INS_MSUBR_Q, 432 => mips_insn::MIPS_INS_MSUBU, 433 => mips_insn::MIPS_INS_MSUBV, 434 => mips_insn::MIPS_INS_MSUB_Q, 435 => mips_insn::MIPS_INS_MTC0, 436 => mips_insn::MIPS_INS_MTC1, 437 => mips_insn::MIPS_INS_MTC2, 438 => mips_insn::MIPS_INS_MTHC1, 439 => mips_insn::MIPS_INS_MTHI, 440 => mips_insn::MIPS_INS_MTHLIP, 441 => mips_insn::MIPS_INS_MTLO, 442 => mips_insn::MIPS_INS_MTM0, 443 => mips_insn::MIPS_INS_MTM1, 444 => mips_insn::MIPS_INS_MTM2, 445 => mips_insn::MIPS_INS_MTP0, 446 => mips_insn::MIPS_INS_MTP1, 447 => mips_insn::MIPS_INS_MTP2, 448 => mips_insn::MIPS_INS_MUH, 449 => mips_insn::MIPS_INS_MUHU, 450 => mips_insn::MIPS_INS_MULEQ_S, 451 => mips_insn::MIPS_INS_MULEU_S, 452 => mips_insn::MIPS_INS_MULQ_RS, 453 => mips_insn::MIPS_INS_MULQ_S, 454 => mips_insn::MIPS_INS_MULR_Q, 455 => mips_insn::MIPS_INS_MULSAQ_S, 456 => mips_insn::MIPS_INS_MULSA, 457 => mips_insn::MIPS_INS_MULT, 458 => mips_insn::MIPS_INS_MULTU, 459 => mips_insn::MIPS_INS_MULU, 460 => mips_insn::MIPS_INS_MULV, 461 => mips_insn::MIPS_INS_MUL_Q, 462 => mips_insn::MIPS_INS_MUL_S, 463 => mips_insn::MIPS_INS_NLOC, 464 => mips_insn::MIPS_INS_NLZC, 465 => mips_insn::MIPS_INS_NMADD, 466 => mips_insn::MIPS_INS_NMSUB, 467 => mips_insn::MIPS_INS_NOR, 468 => mips_insn::MIPS_INS_NORI, 469 => mips_insn::MIPS_INS_NOT16, 470 => mips_insn::MIPS_INS_NOT, 471 => mips_insn::MIPS_INS_OR, 472 => mips_insn::MIPS_INS_OR16, 473 => mips_insn::MIPS_INS_ORI, 474 => mips_insn::MIPS_INS_PACKRL, 475 => mips_insn::MIPS_INS_PAUSE, 476 => mips_insn::MIPS_INS_PCKEV, 477 => mips_insn::MIPS_INS_PCKOD, 478 => mips_insn::MIPS_INS_PCNT, 479 => mips_insn::MIPS_INS_PICK, 480 => mips_insn::MIPS_INS_POP, 481 => mips_insn::MIPS_INS_PRECEQU, 482 => mips_insn::MIPS_INS_PRECEQ, 483 => mips_insn::MIPS_INS_PRECEU, 484 => mips_insn::MIPS_INS_PRECRQU_S, 485 => mips_insn::MIPS_INS_PRECRQ, 486 => mips_insn::MIPS_INS_PRECRQ_RS, 487 => mips_insn::MIPS_INS_PRECR, 488 => mips_insn::MIPS_INS_PRECR_SRA, 489 => mips_insn::MIPS_INS_PRECR_SRA_R, 490 => mips_insn::MIPS_INS_PREF, 491 => mips_insn::MIPS_INS_PREPEND, 492 => mips_insn::MIPS_INS_RADDU, 493 => mips_insn::MIPS_INS_RDDSP, 494 => mips_insn::MIPS_INS_RDHWR, 495 => mips_insn::MIPS_INS_REPLV, 496 => mips_insn::MIPS_INS_REPL, 497 => mips_insn::MIPS_INS_RINT, 498 => mips_insn::MIPS_INS_ROTR, 499 => mips_insn::MIPS_INS_ROTRV, 500 => mips_insn::MIPS_INS_ROUND, 501 => mips_insn::MIPS_INS_SAT_S, 502 => mips_insn::MIPS_INS_SAT_U, 503 => mips_insn::MIPS_INS_SB, 504 => mips_insn::MIPS_INS_SB16, 505 => mips_insn::MIPS_INS_SC, 506 => mips_insn::MIPS_INS_SCD, 507 => mips_insn::MIPS_INS_SD, 508 => mips_insn::MIPS_INS_SDBBP, 509 => mips_insn::MIPS_INS_SDBBP16, 510 => mips_insn::MIPS_INS_SDC1, 511 => mips_insn::MIPS_INS_SDC2, 512 => mips_insn::MIPS_INS_SDC3, 513 => mips_insn::MIPS_INS_SDL, 514 => mips_insn::MIPS_INS_SDR, 515 => mips_insn::MIPS_INS_SDXC1, 516 => mips_insn::MIPS_INS_SEB, 517 => mips_insn::MIPS_INS_SEH, 518 => mips_insn::MIPS_INS_SELEQZ, 519 => mips_insn::MIPS_INS_SELNEZ, 520 => mips_insn::MIPS_INS_SEL, 521 => mips_insn::MIPS_INS_SEQ, 522 => mips_insn::MIPS_INS_SEQI, 523 => mips_insn::MIPS_INS_SH, 524 => mips_insn::MIPS_INS_SH16, 525 => mips_insn::MIPS_INS_SHF, 526 => mips_insn::MIPS_INS_SHILO, 527 => mips_insn::MIPS_INS_SHILOV, 528 => mips_insn::MIPS_INS_SHLLV, 529 => mips_insn::MIPS_INS_SHLLV_S, 530 => mips_insn::MIPS_INS_SHLL, 531 => mips_insn::MIPS_INS_SHLL_S, 532 => mips_insn::MIPS_INS_SHRAV, 533 => mips_insn::MIPS_INS_SHRAV_R, 534 => mips_insn::MIPS_INS_SHRA, 535 => mips_insn::MIPS_INS_SHRA_R, 536 => mips_insn::MIPS_INS_SHRLV, 537 => mips_insn::MIPS_INS_SHRL, 538 => mips_insn::MIPS_INS_SLDI, 539 => mips_insn::MIPS_INS_SLD, 540 => mips_insn::MIPS_INS_SLL, 541 => mips_insn::MIPS_INS_SLL16, 542 => mips_insn::MIPS_INS_SLLI, 543 => mips_insn::MIPS_INS_SLLV, 544 => mips_insn::MIPS_INS_SLT, 545 => mips_insn::MIPS_INS_SLTI, 546 => mips_insn::MIPS_INS_SLTIU, 547 => mips_insn::MIPS_INS_SLTU, 548 => mips_insn::MIPS_INS_SNE, 549 => mips_insn::MIPS_INS_SNEI, 550 => mips_insn::MIPS_INS_SPLATI, 551 => mips_insn::MIPS_INS_SPLAT, 552 => mips_insn::MIPS_INS_SRA, 553 => mips_insn::MIPS_INS_SRAI, 554 => mips_insn::MIPS_INS_SRARI, 555 => mips_insn::MIPS_INS_SRAR, 556 => mips_insn::MIPS_INS_SRAV, 557 => mips_insn::MIPS_INS_SRL, 558 => mips_insn::MIPS_INS_SRL16, 559 => mips_insn::MIPS_INS_SRLI, 560 => mips_insn::MIPS_INS_SRLRI, 561 => mips_insn::MIPS_INS_SRLR, 562 => mips_insn::MIPS_INS_SRLV, 563 => mips_insn::MIPS_INS_SSNOP, 564 => mips_insn::MIPS_INS_ST, 565 => mips_insn::MIPS_INS_SUBQH, 566 => mips_insn::MIPS_INS_SUBQH_R, 567 => mips_insn::MIPS_INS_SUBQ, 568 => mips_insn::MIPS_INS_SUBQ_S, 569 => mips_insn::MIPS_INS_SUBSUS_U, 570 => mips_insn::MIPS_INS_SUBSUU_S, 571 => mips_insn::MIPS_INS_SUBS_S, 572 => mips_insn::MIPS_INS_SUBS_U, 573 => mips_insn::MIPS_INS_SUBU16, 574 => mips_insn::MIPS_INS_SUBUH, 575 => mips_insn::MIPS_INS_SUBUH_R, 576 => mips_insn::MIPS_INS_SUBU, 577 => mips_insn::MIPS_INS_SUBU_S, 578 => mips_insn::MIPS_INS_SUBVI, 579 => mips_insn::MIPS_INS_SUBV, 580 => mips_insn::MIPS_INS_SUXC1, 581 => mips_insn::MIPS_INS_SW, 582 => mips_insn::MIPS_INS_SW16, 583 => mips_insn::MIPS_INS_SWC1, 584 => mips_insn::MIPS_INS_SWC2, 585 => mips_insn::MIPS_INS_SWC3, 586 => mips_insn::MIPS_INS_SWL, 587 => mips_insn::MIPS_INS_SWM16, 588 => mips_insn::MIPS_INS_SWM32, 589 => mips_insn::MIPS_INS_SWP, 590 => mips_insn::MIPS_INS_SWR, 591 => mips_insn::MIPS_INS_SWXC1, 592 => mips_insn::MIPS_INS_SYNC, 593 => mips_insn::MIPS_INS_SYNCI, 594 => mips_insn::MIPS_INS_SYSCALL, 595 => mips_insn::MIPS_INS_TEQ, 596 => mips_insn::MIPS_INS_TEQI, 597 => mips_insn::MIPS_INS_TGE, 598 => mips_insn::MIPS_INS_TGEI, 599 => mips_insn::MIPS_INS_TGEIU, 600 => mips_insn::MIPS_INS_TGEU, 601 => mips_insn::MIPS_INS_TLBP, 602 => mips_insn::MIPS_INS_TLBR, 603 => mips_insn::MIPS_INS_TLBWI, 604 => mips_insn::MIPS_INS_TLBWR, 605 => mips_insn::MIPS_INS_TLT, 606 => mips_insn::MIPS_INS_TLTI, 607 => mips_insn::MIPS_INS_TLTIU, 608 => mips_insn::MIPS_INS_TLTU, 609 => mips_insn::MIPS_INS_TNE, 610 => mips_insn::MIPS_INS_TNEI, 611 => mips_insn::MIPS_INS_TRUNC, 612 => mips_insn::MIPS_INS_V3MULU, 613 => mips_insn::MIPS_INS_VMM0, 614 => mips_insn::MIPS_INS_VMULU, 615 => mips_insn::MIPS_INS_VSHF, 616 => mips_insn::MIPS_INS_WAIT, 617 => mips_insn::MIPS_INS_WRDSP, 618 => mips_insn::MIPS_INS_WSBH, 619 => mips_insn::MIPS_INS_XOR, 620 => mips_insn::MIPS_INS_XOR16, 621 => mips_insn::MIPS_INS_XORI, 622 => mips_insn::MIPS_INS_NOP, 623 => mips_insn::MIPS_INS_NEGU, 624 => mips_insn::MIPS_INS_JALR_HB, 625 => mips_insn::MIPS_INS_JR_HB, 626 => mips_insn::MIPS_INS_ENDING, _ => mips_insn::MIPS_INS_INVALID, } } } impl From for ppc_insn { fn from(id: u32) -> Self { match id { 0 => ppc_insn::PPC_INS_INVALID, 1 => ppc_insn::PPC_INS_ADD, 2 => ppc_insn::PPC_INS_ADDC, 3 => ppc_insn::PPC_INS_ADDE, 4 => ppc_insn::PPC_INS_ADDI, 5 => ppc_insn::PPC_INS_ADDIC, 6 => ppc_insn::PPC_INS_ADDIS, 7 => ppc_insn::PPC_INS_ADDME, 8 => ppc_insn::PPC_INS_ADDZE, 9 => ppc_insn::PPC_INS_AND, 10 => ppc_insn::PPC_INS_ANDC, 11 => ppc_insn::PPC_INS_ANDIS, 12 => ppc_insn::PPC_INS_ANDI, 13 => ppc_insn::PPC_INS_ATTN, 14 => ppc_insn::PPC_INS_B, 15 => ppc_insn::PPC_INS_BA, 16 => ppc_insn::PPC_INS_BC, 17 => ppc_insn::PPC_INS_BCCTR, 18 => ppc_insn::PPC_INS_BCCTRL, 19 => ppc_insn::PPC_INS_BCL, 20 => ppc_insn::PPC_INS_BCLR, 21 => ppc_insn::PPC_INS_BCLRL, 22 => ppc_insn::PPC_INS_BCTR, 23 => ppc_insn::PPC_INS_BCTRL, 24 => ppc_insn::PPC_INS_BCT, 25 => ppc_insn::PPC_INS_BDNZ, 26 => ppc_insn::PPC_INS_BDNZA, 27 => ppc_insn::PPC_INS_BDNZL, 28 => ppc_insn::PPC_INS_BDNZLA, 29 => ppc_insn::PPC_INS_BDNZLR, 30 => ppc_insn::PPC_INS_BDNZLRL, 31 => ppc_insn::PPC_INS_BDZ, 32 => ppc_insn::PPC_INS_BDZA, 33 => ppc_insn::PPC_INS_BDZL, 34 => ppc_insn::PPC_INS_BDZLA, 35 => ppc_insn::PPC_INS_BDZLR, 36 => ppc_insn::PPC_INS_BDZLRL, 37 => ppc_insn::PPC_INS_BL, 38 => ppc_insn::PPC_INS_BLA, 39 => ppc_insn::PPC_INS_BLR, 40 => ppc_insn::PPC_INS_BLRL, 41 => ppc_insn::PPC_INS_BRINC, 42 => ppc_insn::PPC_INS_CMPB, 43 => ppc_insn::PPC_INS_CMPD, 44 => ppc_insn::PPC_INS_CMPDI, 45 => ppc_insn::PPC_INS_CMPLD, 46 => ppc_insn::PPC_INS_CMPLDI, 47 => ppc_insn::PPC_INS_CMPLW, 48 => ppc_insn::PPC_INS_CMPLWI, 49 => ppc_insn::PPC_INS_CMPW, 50 => ppc_insn::PPC_INS_CMPWI, 51 => ppc_insn::PPC_INS_CNTLZD, 52 => ppc_insn::PPC_INS_CNTLZW, 53 => ppc_insn::PPC_INS_CREQV, 54 => ppc_insn::PPC_INS_CRXOR, 55 => ppc_insn::PPC_INS_CRAND, 56 => ppc_insn::PPC_INS_CRANDC, 57 => ppc_insn::PPC_INS_CRNAND, 58 => ppc_insn::PPC_INS_CRNOR, 59 => ppc_insn::PPC_INS_CROR, 60 => ppc_insn::PPC_INS_CRORC, 61 => ppc_insn::PPC_INS_DCBA, 62 => ppc_insn::PPC_INS_DCBF, 63 => ppc_insn::PPC_INS_DCBI, 64 => ppc_insn::PPC_INS_DCBST, 65 => ppc_insn::PPC_INS_DCBT, 66 => ppc_insn::PPC_INS_DCBTST, 67 => ppc_insn::PPC_INS_DCBZ, 68 => ppc_insn::PPC_INS_DCBZL, 69 => ppc_insn::PPC_INS_DCCCI, 70 => ppc_insn::PPC_INS_DIVD, 71 => ppc_insn::PPC_INS_DIVDU, 72 => ppc_insn::PPC_INS_DIVW, 73 => ppc_insn::PPC_INS_DIVWU, 74 => ppc_insn::PPC_INS_DSS, 75 => ppc_insn::PPC_INS_DSSALL, 76 => ppc_insn::PPC_INS_DST, 77 => ppc_insn::PPC_INS_DSTST, 78 => ppc_insn::PPC_INS_DSTSTT, 79 => ppc_insn::PPC_INS_DSTT, 80 => ppc_insn::PPC_INS_EQV, 81 => ppc_insn::PPC_INS_EVABS, 82 => ppc_insn::PPC_INS_EVADDIW, 83 => ppc_insn::PPC_INS_EVADDSMIAAW, 84 => ppc_insn::PPC_INS_EVADDSSIAAW, 85 => ppc_insn::PPC_INS_EVADDUMIAAW, 86 => ppc_insn::PPC_INS_EVADDUSIAAW, 87 => ppc_insn::PPC_INS_EVADDW, 88 => ppc_insn::PPC_INS_EVAND, 89 => ppc_insn::PPC_INS_EVANDC, 90 => ppc_insn::PPC_INS_EVCMPEQ, 91 => ppc_insn::PPC_INS_EVCMPGTS, 92 => ppc_insn::PPC_INS_EVCMPGTU, 93 => ppc_insn::PPC_INS_EVCMPLTS, 94 => ppc_insn::PPC_INS_EVCMPLTU, 95 => ppc_insn::PPC_INS_EVCNTLSW, 96 => ppc_insn::PPC_INS_EVCNTLZW, 97 => ppc_insn::PPC_INS_EVDIVWS, 98 => ppc_insn::PPC_INS_EVDIVWU, 99 => ppc_insn::PPC_INS_EVEQV, 100 => ppc_insn::PPC_INS_EVEXTSB, 101 => ppc_insn::PPC_INS_EVEXTSH, 102 => ppc_insn::PPC_INS_EVLDD, 103 => ppc_insn::PPC_INS_EVLDDX, 104 => ppc_insn::PPC_INS_EVLDH, 105 => ppc_insn::PPC_INS_EVLDHX, 106 => ppc_insn::PPC_INS_EVLDW, 107 => ppc_insn::PPC_INS_EVLDWX, 108 => ppc_insn::PPC_INS_EVLHHESPLAT, 109 => ppc_insn::PPC_INS_EVLHHESPLATX, 110 => ppc_insn::PPC_INS_EVLHHOSSPLAT, 111 => ppc_insn::PPC_INS_EVLHHOSSPLATX, 112 => ppc_insn::PPC_INS_EVLHHOUSPLAT, 113 => ppc_insn::PPC_INS_EVLHHOUSPLATX, 114 => ppc_insn::PPC_INS_EVLWHE, 115 => ppc_insn::PPC_INS_EVLWHEX, 116 => ppc_insn::PPC_INS_EVLWHOS, 117 => ppc_insn::PPC_INS_EVLWHOSX, 118 => ppc_insn::PPC_INS_EVLWHOU, 119 => ppc_insn::PPC_INS_EVLWHOUX, 120 => ppc_insn::PPC_INS_EVLWHSPLAT, 121 => ppc_insn::PPC_INS_EVLWHSPLATX, 122 => ppc_insn::PPC_INS_EVLWWSPLAT, 123 => ppc_insn::PPC_INS_EVLWWSPLATX, 124 => ppc_insn::PPC_INS_EVMERGEHI, 125 => ppc_insn::PPC_INS_EVMERGEHILO, 126 => ppc_insn::PPC_INS_EVMERGELO, 127 => ppc_insn::PPC_INS_EVMERGELOHI, 128 => ppc_insn::PPC_INS_EVMHEGSMFAA, 129 => ppc_insn::PPC_INS_EVMHEGSMFAN, 130 => ppc_insn::PPC_INS_EVMHEGSMIAA, 131 => ppc_insn::PPC_INS_EVMHEGSMIAN, 132 => ppc_insn::PPC_INS_EVMHEGUMIAA, 133 => ppc_insn::PPC_INS_EVMHEGUMIAN, 134 => ppc_insn::PPC_INS_EVMHESMF, 135 => ppc_insn::PPC_INS_EVMHESMFA, 136 => ppc_insn::PPC_INS_EVMHESMFAAW, 137 => ppc_insn::PPC_INS_EVMHESMFANW, 138 => ppc_insn::PPC_INS_EVMHESMI, 139 => ppc_insn::PPC_INS_EVMHESMIA, 140 => ppc_insn::PPC_INS_EVMHESMIAAW, 141 => ppc_insn::PPC_INS_EVMHESMIANW, 142 => ppc_insn::PPC_INS_EVMHESSF, 143 => ppc_insn::PPC_INS_EVMHESSFA, 144 => ppc_insn::PPC_INS_EVMHESSFAAW, 145 => ppc_insn::PPC_INS_EVMHESSFANW, 146 => ppc_insn::PPC_INS_EVMHESSIAAW, 147 => ppc_insn::PPC_INS_EVMHESSIANW, 148 => ppc_insn::PPC_INS_EVMHEUMI, 149 => ppc_insn::PPC_INS_EVMHEUMIA, 150 => ppc_insn::PPC_INS_EVMHEUMIAAW, 151 => ppc_insn::PPC_INS_EVMHEUMIANW, 152 => ppc_insn::PPC_INS_EVMHEUSIAAW, 153 => ppc_insn::PPC_INS_EVMHEUSIANW, 154 => ppc_insn::PPC_INS_EVMHOGSMFAA, 155 => ppc_insn::PPC_INS_EVMHOGSMFAN, 156 => ppc_insn::PPC_INS_EVMHOGSMIAA, 157 => ppc_insn::PPC_INS_EVMHOGSMIAN, 158 => ppc_insn::PPC_INS_EVMHOGUMIAA, 159 => ppc_insn::PPC_INS_EVMHOGUMIAN, 160 => ppc_insn::PPC_INS_EVMHOSMF, 161 => ppc_insn::PPC_INS_EVMHOSMFA, 162 => ppc_insn::PPC_INS_EVMHOSMFAAW, 163 => ppc_insn::PPC_INS_EVMHOSMFANW, 164 => ppc_insn::PPC_INS_EVMHOSMI, 165 => ppc_insn::PPC_INS_EVMHOSMIA, 166 => ppc_insn::PPC_INS_EVMHOSMIAAW, 167 => ppc_insn::PPC_INS_EVMHOSMIANW, 168 => ppc_insn::PPC_INS_EVMHOSSF, 169 => ppc_insn::PPC_INS_EVMHOSSFA, 170 => ppc_insn::PPC_INS_EVMHOSSFAAW, 171 => ppc_insn::PPC_INS_EVMHOSSFANW, 172 => ppc_insn::PPC_INS_EVMHOSSIAAW, 173 => ppc_insn::PPC_INS_EVMHOSSIANW, 174 => ppc_insn::PPC_INS_EVMHOUMI, 175 => ppc_insn::PPC_INS_EVMHOUMIA, 176 => ppc_insn::PPC_INS_EVMHOUMIAAW, 177 => ppc_insn::PPC_INS_EVMHOUMIANW, 178 => ppc_insn::PPC_INS_EVMHOUSIAAW, 179 => ppc_insn::PPC_INS_EVMHOUSIANW, 180 => ppc_insn::PPC_INS_EVMRA, 181 => ppc_insn::PPC_INS_EVMWHSMF, 182 => ppc_insn::PPC_INS_EVMWHSMFA, 183 => ppc_insn::PPC_INS_EVMWHSMI, 184 => ppc_insn::PPC_INS_EVMWHSMIA, 185 => ppc_insn::PPC_INS_EVMWHSSF, 186 => ppc_insn::PPC_INS_EVMWHSSFA, 187 => ppc_insn::PPC_INS_EVMWHUMI, 188 => ppc_insn::PPC_INS_EVMWHUMIA, 189 => ppc_insn::PPC_INS_EVMWLSMIAAW, 190 => ppc_insn::PPC_INS_EVMWLSMIANW, 191 => ppc_insn::PPC_INS_EVMWLSSIAAW, 192 => ppc_insn::PPC_INS_EVMWLSSIANW, 193 => ppc_insn::PPC_INS_EVMWLUMI, 194 => ppc_insn::PPC_INS_EVMWLUMIA, 195 => ppc_insn::PPC_INS_EVMWLUMIAAW, 196 => ppc_insn::PPC_INS_EVMWLUMIANW, 197 => ppc_insn::PPC_INS_EVMWLUSIAAW, 198 => ppc_insn::PPC_INS_EVMWLUSIANW, 199 => ppc_insn::PPC_INS_EVMWSMF, 200 => ppc_insn::PPC_INS_EVMWSMFA, 201 => ppc_insn::PPC_INS_EVMWSMFAA, 202 => ppc_insn::PPC_INS_EVMWSMFAN, 203 => ppc_insn::PPC_INS_EVMWSMI, 204 => ppc_insn::PPC_INS_EVMWSMIA, 205 => ppc_insn::PPC_INS_EVMWSMIAA, 206 => ppc_insn::PPC_INS_EVMWSMIAN, 207 => ppc_insn::PPC_INS_EVMWSSF, 208 => ppc_insn::PPC_INS_EVMWSSFA, 209 => ppc_insn::PPC_INS_EVMWSSFAA, 210 => ppc_insn::PPC_INS_EVMWSSFAN, 211 => ppc_insn::PPC_INS_EVMWUMI, 212 => ppc_insn::PPC_INS_EVMWUMIA, 213 => ppc_insn::PPC_INS_EVMWUMIAA, 214 => ppc_insn::PPC_INS_EVMWUMIAN, 215 => ppc_insn::PPC_INS_EVNAND, 216 => ppc_insn::PPC_INS_EVNEG, 217 => ppc_insn::PPC_INS_EVNOR, 218 => ppc_insn::PPC_INS_EVOR, 219 => ppc_insn::PPC_INS_EVORC, 220 => ppc_insn::PPC_INS_EVRLW, 221 => ppc_insn::PPC_INS_EVRLWI, 222 => ppc_insn::PPC_INS_EVRNDW, 223 => ppc_insn::PPC_INS_EVSLW, 224 => ppc_insn::PPC_INS_EVSLWI, 225 => ppc_insn::PPC_INS_EVSPLATFI, 226 => ppc_insn::PPC_INS_EVSPLATI, 227 => ppc_insn::PPC_INS_EVSRWIS, 228 => ppc_insn::PPC_INS_EVSRWIU, 229 => ppc_insn::PPC_INS_EVSRWS, 230 => ppc_insn::PPC_INS_EVSRWU, 231 => ppc_insn::PPC_INS_EVSTDD, 232 => ppc_insn::PPC_INS_EVSTDDX, 233 => ppc_insn::PPC_INS_EVSTDH, 234 => ppc_insn::PPC_INS_EVSTDHX, 235 => ppc_insn::PPC_INS_EVSTDW, 236 => ppc_insn::PPC_INS_EVSTDWX, 237 => ppc_insn::PPC_INS_EVSTWHE, 238 => ppc_insn::PPC_INS_EVSTWHEX, 239 => ppc_insn::PPC_INS_EVSTWHO, 240 => ppc_insn::PPC_INS_EVSTWHOX, 241 => ppc_insn::PPC_INS_EVSTWWE, 242 => ppc_insn::PPC_INS_EVSTWWEX, 243 => ppc_insn::PPC_INS_EVSTWWO, 244 => ppc_insn::PPC_INS_EVSTWWOX, 245 => ppc_insn::PPC_INS_EVSUBFSMIAAW, 246 => ppc_insn::PPC_INS_EVSUBFSSIAAW, 247 => ppc_insn::PPC_INS_EVSUBFUMIAAW, 248 => ppc_insn::PPC_INS_EVSUBFUSIAAW, 249 => ppc_insn::PPC_INS_EVSUBFW, 250 => ppc_insn::PPC_INS_EVSUBIFW, 251 => ppc_insn::PPC_INS_EVXOR, 252 => ppc_insn::PPC_INS_EXTSB, 253 => ppc_insn::PPC_INS_EXTSH, 254 => ppc_insn::PPC_INS_EXTSW, 255 => ppc_insn::PPC_INS_EIEIO, 256 => ppc_insn::PPC_INS_FABS, 257 => ppc_insn::PPC_INS_FADD, 258 => ppc_insn::PPC_INS_FADDS, 259 => ppc_insn::PPC_INS_FCFID, 260 => ppc_insn::PPC_INS_FCFIDS, 261 => ppc_insn::PPC_INS_FCFIDU, 262 => ppc_insn::PPC_INS_FCFIDUS, 263 => ppc_insn::PPC_INS_FCMPU, 264 => ppc_insn::PPC_INS_FCPSGN, 265 => ppc_insn::PPC_INS_FCTID, 266 => ppc_insn::PPC_INS_FCTIDUZ, 267 => ppc_insn::PPC_INS_FCTIDZ, 268 => ppc_insn::PPC_INS_FCTIW, 269 => ppc_insn::PPC_INS_FCTIWUZ, 270 => ppc_insn::PPC_INS_FCTIWZ, 271 => ppc_insn::PPC_INS_FDIV, 272 => ppc_insn::PPC_INS_FDIVS, 273 => ppc_insn::PPC_INS_FMADD, 274 => ppc_insn::PPC_INS_FMADDS, 275 => ppc_insn::PPC_INS_FMR, 276 => ppc_insn::PPC_INS_FMSUB, 277 => ppc_insn::PPC_INS_FMSUBS, 278 => ppc_insn::PPC_INS_FMUL, 279 => ppc_insn::PPC_INS_FMULS, 280 => ppc_insn::PPC_INS_FNABS, 281 => ppc_insn::PPC_INS_FNEG, 282 => ppc_insn::PPC_INS_FNMADD, 283 => ppc_insn::PPC_INS_FNMADDS, 284 => ppc_insn::PPC_INS_FNMSUB, 285 => ppc_insn::PPC_INS_FNMSUBS, 286 => ppc_insn::PPC_INS_FRE, 287 => ppc_insn::PPC_INS_FRES, 288 => ppc_insn::PPC_INS_FRIM, 289 => ppc_insn::PPC_INS_FRIN, 290 => ppc_insn::PPC_INS_FRIP, 291 => ppc_insn::PPC_INS_FRIZ, 292 => ppc_insn::PPC_INS_FRSP, 293 => ppc_insn::PPC_INS_FRSQRTE, 294 => ppc_insn::PPC_INS_FRSQRTES, 295 => ppc_insn::PPC_INS_FSEL, 296 => ppc_insn::PPC_INS_FSQRT, 297 => ppc_insn::PPC_INS_FSQRTS, 298 => ppc_insn::PPC_INS_FSUB, 299 => ppc_insn::PPC_INS_FSUBS, 300 => ppc_insn::PPC_INS_ICBI, 301 => ppc_insn::PPC_INS_ICBT, 302 => ppc_insn::PPC_INS_ICCCI, 303 => ppc_insn::PPC_INS_ISEL, 304 => ppc_insn::PPC_INS_ISYNC, 305 => ppc_insn::PPC_INS_LA, 306 => ppc_insn::PPC_INS_LBZ, 307 => ppc_insn::PPC_INS_LBZCIX, 308 => ppc_insn::PPC_INS_LBZU, 309 => ppc_insn::PPC_INS_LBZUX, 310 => ppc_insn::PPC_INS_LBZX, 311 => ppc_insn::PPC_INS_LD, 312 => ppc_insn::PPC_INS_LDARX, 313 => ppc_insn::PPC_INS_LDBRX, 314 => ppc_insn::PPC_INS_LDCIX, 315 => ppc_insn::PPC_INS_LDU, 316 => ppc_insn::PPC_INS_LDUX, 317 => ppc_insn::PPC_INS_LDX, 318 => ppc_insn::PPC_INS_LFD, 319 => ppc_insn::PPC_INS_LFDU, 320 => ppc_insn::PPC_INS_LFDUX, 321 => ppc_insn::PPC_INS_LFDX, 322 => ppc_insn::PPC_INS_LFIWAX, 323 => ppc_insn::PPC_INS_LFIWZX, 324 => ppc_insn::PPC_INS_LFS, 325 => ppc_insn::PPC_INS_LFSU, 326 => ppc_insn::PPC_INS_LFSUX, 327 => ppc_insn::PPC_INS_LFSX, 328 => ppc_insn::PPC_INS_LHA, 329 => ppc_insn::PPC_INS_LHAU, 330 => ppc_insn::PPC_INS_LHAUX, 331 => ppc_insn::PPC_INS_LHAX, 332 => ppc_insn::PPC_INS_LHBRX, 333 => ppc_insn::PPC_INS_LHZ, 334 => ppc_insn::PPC_INS_LHZCIX, 335 => ppc_insn::PPC_INS_LHZU, 336 => ppc_insn::PPC_INS_LHZUX, 337 => ppc_insn::PPC_INS_LHZX, 338 => ppc_insn::PPC_INS_LI, 339 => ppc_insn::PPC_INS_LIS, 340 => ppc_insn::PPC_INS_LMW, 341 => ppc_insn::PPC_INS_LSWI, 342 => ppc_insn::PPC_INS_LVEBX, 343 => ppc_insn::PPC_INS_LVEHX, 344 => ppc_insn::PPC_INS_LVEWX, 345 => ppc_insn::PPC_INS_LVSL, 346 => ppc_insn::PPC_INS_LVSR, 347 => ppc_insn::PPC_INS_LVX, 348 => ppc_insn::PPC_INS_LVXL, 349 => ppc_insn::PPC_INS_LWA, 350 => ppc_insn::PPC_INS_LWARX, 351 => ppc_insn::PPC_INS_LWAUX, 352 => ppc_insn::PPC_INS_LWAX, 353 => ppc_insn::PPC_INS_LWBRX, 354 => ppc_insn::PPC_INS_LWZ, 355 => ppc_insn::PPC_INS_LWZCIX, 356 => ppc_insn::PPC_INS_LWZU, 357 => ppc_insn::PPC_INS_LWZUX, 358 => ppc_insn::PPC_INS_LWZX, 359 => ppc_insn::PPC_INS_LXSDX, 360 => ppc_insn::PPC_INS_LXVD2X, 361 => ppc_insn::PPC_INS_LXVDSX, 362 => ppc_insn::PPC_INS_LXVW4X, 363 => ppc_insn::PPC_INS_MBAR, 364 => ppc_insn::PPC_INS_MCRF, 365 => ppc_insn::PPC_INS_MCRFS, 366 => ppc_insn::PPC_INS_MFCR, 367 => ppc_insn::PPC_INS_MFCTR, 368 => ppc_insn::PPC_INS_MFDCR, 369 => ppc_insn::PPC_INS_MFFS, 370 => ppc_insn::PPC_INS_MFLR, 371 => ppc_insn::PPC_INS_MFMSR, 372 => ppc_insn::PPC_INS_MFOCRF, 373 => ppc_insn::PPC_INS_MFSPR, 374 => ppc_insn::PPC_INS_MFSR, 375 => ppc_insn::PPC_INS_MFSRIN, 376 => ppc_insn::PPC_INS_MFTB, 377 => ppc_insn::PPC_INS_MFVSCR, 378 => ppc_insn::PPC_INS_MSYNC, 379 => ppc_insn::PPC_INS_MTCRF, 380 => ppc_insn::PPC_INS_MTCTR, 381 => ppc_insn::PPC_INS_MTDCR, 382 => ppc_insn::PPC_INS_MTFSB0, 383 => ppc_insn::PPC_INS_MTFSB1, 384 => ppc_insn::PPC_INS_MTFSF, 385 => ppc_insn::PPC_INS_MTFSFI, 386 => ppc_insn::PPC_INS_MTLR, 387 => ppc_insn::PPC_INS_MTMSR, 388 => ppc_insn::PPC_INS_MTMSRD, 389 => ppc_insn::PPC_INS_MTOCRF, 390 => ppc_insn::PPC_INS_MTSPR, 391 => ppc_insn::PPC_INS_MTSR, 392 => ppc_insn::PPC_INS_MTSRIN, 393 => ppc_insn::PPC_INS_MTVSCR, 394 => ppc_insn::PPC_INS_MULHD, 395 => ppc_insn::PPC_INS_MULHDU, 396 => ppc_insn::PPC_INS_MULHW, 397 => ppc_insn::PPC_INS_MULHWU, 398 => ppc_insn::PPC_INS_MULLD, 399 => ppc_insn::PPC_INS_MULLI, 400 => ppc_insn::PPC_INS_MULLW, 401 => ppc_insn::PPC_INS_NAND, 402 => ppc_insn::PPC_INS_NEG, 403 => ppc_insn::PPC_INS_NOP, 404 => ppc_insn::PPC_INS_ORI, 405 => ppc_insn::PPC_INS_NOR, 406 => ppc_insn::PPC_INS_OR, 407 => ppc_insn::PPC_INS_ORC, 408 => ppc_insn::PPC_INS_ORIS, 409 => ppc_insn::PPC_INS_POPCNTD, 410 => ppc_insn::PPC_INS_POPCNTW, 411 => ppc_insn::PPC_INS_QVALIGNI, 412 => ppc_insn::PPC_INS_QVESPLATI, 413 => ppc_insn::PPC_INS_QVFABS, 414 => ppc_insn::PPC_INS_QVFADD, 415 => ppc_insn::PPC_INS_QVFADDS, 416 => ppc_insn::PPC_INS_QVFCFID, 417 => ppc_insn::PPC_INS_QVFCFIDS, 418 => ppc_insn::PPC_INS_QVFCFIDU, 419 => ppc_insn::PPC_INS_QVFCFIDUS, 420 => ppc_insn::PPC_INS_QVFCMPEQ, 421 => ppc_insn::PPC_INS_QVFCMPGT, 422 => ppc_insn::PPC_INS_QVFCMPLT, 423 => ppc_insn::PPC_INS_QVFCPSGN, 424 => ppc_insn::PPC_INS_QVFCTID, 425 => ppc_insn::PPC_INS_QVFCTIDU, 426 => ppc_insn::PPC_INS_QVFCTIDUZ, 427 => ppc_insn::PPC_INS_QVFCTIDZ, 428 => ppc_insn::PPC_INS_QVFCTIW, 429 => ppc_insn::PPC_INS_QVFCTIWU, 430 => ppc_insn::PPC_INS_QVFCTIWUZ, 431 => ppc_insn::PPC_INS_QVFCTIWZ, 432 => ppc_insn::PPC_INS_QVFLOGICAL, 433 => ppc_insn::PPC_INS_QVFMADD, 434 => ppc_insn::PPC_INS_QVFMADDS, 435 => ppc_insn::PPC_INS_QVFMR, 436 => ppc_insn::PPC_INS_QVFMSUB, 437 => ppc_insn::PPC_INS_QVFMSUBS, 438 => ppc_insn::PPC_INS_QVFMUL, 439 => ppc_insn::PPC_INS_QVFMULS, 440 => ppc_insn::PPC_INS_QVFNABS, 441 => ppc_insn::PPC_INS_QVFNEG, 442 => ppc_insn::PPC_INS_QVFNMADD, 443 => ppc_insn::PPC_INS_QVFNMADDS, 444 => ppc_insn::PPC_INS_QVFNMSUB, 445 => ppc_insn::PPC_INS_QVFNMSUBS, 446 => ppc_insn::PPC_INS_QVFPERM, 447 => ppc_insn::PPC_INS_QVFRE, 448 => ppc_insn::PPC_INS_QVFRES, 449 => ppc_insn::PPC_INS_QVFRIM, 450 => ppc_insn::PPC_INS_QVFRIN, 451 => ppc_insn::PPC_INS_QVFRIP, 452 => ppc_insn::PPC_INS_QVFRIZ, 453 => ppc_insn::PPC_INS_QVFRSP, 454 => ppc_insn::PPC_INS_QVFRSQRTE, 455 => ppc_insn::PPC_INS_QVFRSQRTES, 456 => ppc_insn::PPC_INS_QVFSEL, 457 => ppc_insn::PPC_INS_QVFSUB, 458 => ppc_insn::PPC_INS_QVFSUBS, 459 => ppc_insn::PPC_INS_QVFTSTNAN, 460 => ppc_insn::PPC_INS_QVFXMADD, 461 => ppc_insn::PPC_INS_QVFXMADDS, 462 => ppc_insn::PPC_INS_QVFXMUL, 463 => ppc_insn::PPC_INS_QVFXMULS, 464 => ppc_insn::PPC_INS_QVFXXCPNMADD, 465 => ppc_insn::PPC_INS_QVFXXCPNMADDS, 466 => ppc_insn::PPC_INS_QVFXXMADD, 467 => ppc_insn::PPC_INS_QVFXXMADDS, 468 => ppc_insn::PPC_INS_QVFXXNPMADD, 469 => ppc_insn::PPC_INS_QVFXXNPMADDS, 470 => ppc_insn::PPC_INS_QVGPCI, 471 => ppc_insn::PPC_INS_QVLFCDUX, 472 => ppc_insn::PPC_INS_QVLFCDUXA, 473 => ppc_insn::PPC_INS_QVLFCDX, 474 => ppc_insn::PPC_INS_QVLFCDXA, 475 => ppc_insn::PPC_INS_QVLFCSUX, 476 => ppc_insn::PPC_INS_QVLFCSUXA, 477 => ppc_insn::PPC_INS_QVLFCSX, 478 => ppc_insn::PPC_INS_QVLFCSXA, 479 => ppc_insn::PPC_INS_QVLFDUX, 480 => ppc_insn::PPC_INS_QVLFDUXA, 481 => ppc_insn::PPC_INS_QVLFDX, 482 => ppc_insn::PPC_INS_QVLFDXA, 483 => ppc_insn::PPC_INS_QVLFIWAX, 484 => ppc_insn::PPC_INS_QVLFIWAXA, 485 => ppc_insn::PPC_INS_QVLFIWZX, 486 => ppc_insn::PPC_INS_QVLFIWZXA, 487 => ppc_insn::PPC_INS_QVLFSUX, 488 => ppc_insn::PPC_INS_QVLFSUXA, 489 => ppc_insn::PPC_INS_QVLFSX, 490 => ppc_insn::PPC_INS_QVLFSXA, 491 => ppc_insn::PPC_INS_QVLPCLDX, 492 => ppc_insn::PPC_INS_QVLPCLSX, 493 => ppc_insn::PPC_INS_QVLPCRDX, 494 => ppc_insn::PPC_INS_QVLPCRSX, 495 => ppc_insn::PPC_INS_QVSTFCDUX, 496 => ppc_insn::PPC_INS_QVSTFCDUXA, 497 => ppc_insn::PPC_INS_QVSTFCDUXI, 498 => ppc_insn::PPC_INS_QVSTFCDUXIA, 499 => ppc_insn::PPC_INS_QVSTFCDX, 500 => ppc_insn::PPC_INS_QVSTFCDXA, 501 => ppc_insn::PPC_INS_QVSTFCDXI, 502 => ppc_insn::PPC_INS_QVSTFCDXIA, 503 => ppc_insn::PPC_INS_QVSTFCSUX, 504 => ppc_insn::PPC_INS_QVSTFCSUXA, 505 => ppc_insn::PPC_INS_QVSTFCSUXI, 506 => ppc_insn::PPC_INS_QVSTFCSUXIA, 507 => ppc_insn::PPC_INS_QVSTFCSX, 508 => ppc_insn::PPC_INS_QVSTFCSXA, 509 => ppc_insn::PPC_INS_QVSTFCSXI, 510 => ppc_insn::PPC_INS_QVSTFCSXIA, 511 => ppc_insn::PPC_INS_QVSTFDUX, 512 => ppc_insn::PPC_INS_QVSTFDUXA, 513 => ppc_insn::PPC_INS_QVSTFDUXI, 514 => ppc_insn::PPC_INS_QVSTFDUXIA, 515 => ppc_insn::PPC_INS_QVSTFDX, 516 => ppc_insn::PPC_INS_QVSTFDXA, 517 => ppc_insn::PPC_INS_QVSTFDXI, 518 => ppc_insn::PPC_INS_QVSTFDXIA, 519 => ppc_insn::PPC_INS_QVSTFIWX, 520 => ppc_insn::PPC_INS_QVSTFIWXA, 521 => ppc_insn::PPC_INS_QVSTFSUX, 522 => ppc_insn::PPC_INS_QVSTFSUXA, 523 => ppc_insn::PPC_INS_QVSTFSUXI, 524 => ppc_insn::PPC_INS_QVSTFSUXIA, 525 => ppc_insn::PPC_INS_QVSTFSX, 526 => ppc_insn::PPC_INS_QVSTFSXA, 527 => ppc_insn::PPC_INS_QVSTFSXI, 528 => ppc_insn::PPC_INS_QVSTFSXIA, 529 => ppc_insn::PPC_INS_RFCI, 530 => ppc_insn::PPC_INS_RFDI, 531 => ppc_insn::PPC_INS_RFI, 532 => ppc_insn::PPC_INS_RFID, 533 => ppc_insn::PPC_INS_RFMCI, 534 => ppc_insn::PPC_INS_RLDCL, 535 => ppc_insn::PPC_INS_RLDCR, 536 => ppc_insn::PPC_INS_RLDIC, 537 => ppc_insn::PPC_INS_RLDICL, 538 => ppc_insn::PPC_INS_RLDICR, 539 => ppc_insn::PPC_INS_RLDIMI, 540 => ppc_insn::PPC_INS_RLWIMI, 541 => ppc_insn::PPC_INS_RLWINM, 542 => ppc_insn::PPC_INS_RLWNM, 543 => ppc_insn::PPC_INS_SC, 544 => ppc_insn::PPC_INS_SLBIA, 545 => ppc_insn::PPC_INS_SLBIE, 546 => ppc_insn::PPC_INS_SLBMFEE, 547 => ppc_insn::PPC_INS_SLBMTE, 548 => ppc_insn::PPC_INS_SLD, 549 => ppc_insn::PPC_INS_SLW, 550 => ppc_insn::PPC_INS_SRAD, 551 => ppc_insn::PPC_INS_SRADI, 552 => ppc_insn::PPC_INS_SRAW, 553 => ppc_insn::PPC_INS_SRAWI, 554 => ppc_insn::PPC_INS_SRD, 555 => ppc_insn::PPC_INS_SRW, 556 => ppc_insn::PPC_INS_STB, 557 => ppc_insn::PPC_INS_STBCIX, 558 => ppc_insn::PPC_INS_STBU, 559 => ppc_insn::PPC_INS_STBUX, 560 => ppc_insn::PPC_INS_STBX, 561 => ppc_insn::PPC_INS_STD, 562 => ppc_insn::PPC_INS_STDBRX, 563 => ppc_insn::PPC_INS_STDCIX, 564 => ppc_insn::PPC_INS_STDCX, 565 => ppc_insn::PPC_INS_STDU, 566 => ppc_insn::PPC_INS_STDUX, 567 => ppc_insn::PPC_INS_STDX, 568 => ppc_insn::PPC_INS_STFD, 569 => ppc_insn::PPC_INS_STFDU, 570 => ppc_insn::PPC_INS_STFDUX, 571 => ppc_insn::PPC_INS_STFDX, 572 => ppc_insn::PPC_INS_STFIWX, 573 => ppc_insn::PPC_INS_STFS, 574 => ppc_insn::PPC_INS_STFSU, 575 => ppc_insn::PPC_INS_STFSUX, 576 => ppc_insn::PPC_INS_STFSX, 577 => ppc_insn::PPC_INS_STH, 578 => ppc_insn::PPC_INS_STHBRX, 579 => ppc_insn::PPC_INS_STHCIX, 580 => ppc_insn::PPC_INS_STHU, 581 => ppc_insn::PPC_INS_STHUX, 582 => ppc_insn::PPC_INS_STHX, 583 => ppc_insn::PPC_INS_STMW, 584 => ppc_insn::PPC_INS_STSWI, 585 => ppc_insn::PPC_INS_STVEBX, 586 => ppc_insn::PPC_INS_STVEHX, 587 => ppc_insn::PPC_INS_STVEWX, 588 => ppc_insn::PPC_INS_STVX, 589 => ppc_insn::PPC_INS_STVXL, 590 => ppc_insn::PPC_INS_STW, 591 => ppc_insn::PPC_INS_STWBRX, 592 => ppc_insn::PPC_INS_STWCIX, 593 => ppc_insn::PPC_INS_STWCX, 594 => ppc_insn::PPC_INS_STWU, 595 => ppc_insn::PPC_INS_STWUX, 596 => ppc_insn::PPC_INS_STWX, 597 => ppc_insn::PPC_INS_STXSDX, 598 => ppc_insn::PPC_INS_STXVD2X, 599 => ppc_insn::PPC_INS_STXVW4X, 600 => ppc_insn::PPC_INS_SUBF, 601 => ppc_insn::PPC_INS_SUBFC, 602 => ppc_insn::PPC_INS_SUBFE, 603 => ppc_insn::PPC_INS_SUBFIC, 604 => ppc_insn::PPC_INS_SUBFME, 605 => ppc_insn::PPC_INS_SUBFZE, 606 => ppc_insn::PPC_INS_SYNC, 607 => ppc_insn::PPC_INS_TD, 608 => ppc_insn::PPC_INS_TDI, 609 => ppc_insn::PPC_INS_TLBIA, 610 => ppc_insn::PPC_INS_TLBIE, 611 => ppc_insn::PPC_INS_TLBIEL, 612 => ppc_insn::PPC_INS_TLBIVAX, 613 => ppc_insn::PPC_INS_TLBLD, 614 => ppc_insn::PPC_INS_TLBLI, 615 => ppc_insn::PPC_INS_TLBRE, 616 => ppc_insn::PPC_INS_TLBSX, 617 => ppc_insn::PPC_INS_TLBSYNC, 618 => ppc_insn::PPC_INS_TLBWE, 619 => ppc_insn::PPC_INS_TRAP, 620 => ppc_insn::PPC_INS_TW, 621 => ppc_insn::PPC_INS_TWI, 622 => ppc_insn::PPC_INS_VADDCUW, 623 => ppc_insn::PPC_INS_VADDFP, 624 => ppc_insn::PPC_INS_VADDSBS, 625 => ppc_insn::PPC_INS_VADDSHS, 626 => ppc_insn::PPC_INS_VADDSWS, 627 => ppc_insn::PPC_INS_VADDUBM, 628 => ppc_insn::PPC_INS_VADDUBS, 629 => ppc_insn::PPC_INS_VADDUDM, 630 => ppc_insn::PPC_INS_VADDUHM, 631 => ppc_insn::PPC_INS_VADDUHS, 632 => ppc_insn::PPC_INS_VADDUWM, 633 => ppc_insn::PPC_INS_VADDUWS, 634 => ppc_insn::PPC_INS_VAND, 635 => ppc_insn::PPC_INS_VANDC, 636 => ppc_insn::PPC_INS_VAVGSB, 637 => ppc_insn::PPC_INS_VAVGSH, 638 => ppc_insn::PPC_INS_VAVGSW, 639 => ppc_insn::PPC_INS_VAVGUB, 640 => ppc_insn::PPC_INS_VAVGUH, 641 => ppc_insn::PPC_INS_VAVGUW, 642 => ppc_insn::PPC_INS_VCFSX, 643 => ppc_insn::PPC_INS_VCFUX, 644 => ppc_insn::PPC_INS_VCLZB, 645 => ppc_insn::PPC_INS_VCLZD, 646 => ppc_insn::PPC_INS_VCLZH, 647 => ppc_insn::PPC_INS_VCLZW, 648 => ppc_insn::PPC_INS_VCMPBFP, 649 => ppc_insn::PPC_INS_VCMPEQFP, 650 => ppc_insn::PPC_INS_VCMPEQUB, 651 => ppc_insn::PPC_INS_VCMPEQUD, 652 => ppc_insn::PPC_INS_VCMPEQUH, 653 => ppc_insn::PPC_INS_VCMPEQUW, 654 => ppc_insn::PPC_INS_VCMPGEFP, 655 => ppc_insn::PPC_INS_VCMPGTFP, 656 => ppc_insn::PPC_INS_VCMPGTSB, 657 => ppc_insn::PPC_INS_VCMPGTSD, 658 => ppc_insn::PPC_INS_VCMPGTSH, 659 => ppc_insn::PPC_INS_VCMPGTSW, 660 => ppc_insn::PPC_INS_VCMPGTUB, 661 => ppc_insn::PPC_INS_VCMPGTUD, 662 => ppc_insn::PPC_INS_VCMPGTUH, 663 => ppc_insn::PPC_INS_VCMPGTUW, 664 => ppc_insn::PPC_INS_VCTSXS, 665 => ppc_insn::PPC_INS_VCTUXS, 666 => ppc_insn::PPC_INS_VEQV, 667 => ppc_insn::PPC_INS_VEXPTEFP, 668 => ppc_insn::PPC_INS_VLOGEFP, 669 => ppc_insn::PPC_INS_VMADDFP, 670 => ppc_insn::PPC_INS_VMAXFP, 671 => ppc_insn::PPC_INS_VMAXSB, 672 => ppc_insn::PPC_INS_VMAXSD, 673 => ppc_insn::PPC_INS_VMAXSH, 674 => ppc_insn::PPC_INS_VMAXSW, 675 => ppc_insn::PPC_INS_VMAXUB, 676 => ppc_insn::PPC_INS_VMAXUD, 677 => ppc_insn::PPC_INS_VMAXUH, 678 => ppc_insn::PPC_INS_VMAXUW, 679 => ppc_insn::PPC_INS_VMHADDSHS, 680 => ppc_insn::PPC_INS_VMHRADDSHS, 681 => ppc_insn::PPC_INS_VMINUD, 682 => ppc_insn::PPC_INS_VMINFP, 683 => ppc_insn::PPC_INS_VMINSB, 684 => ppc_insn::PPC_INS_VMINSD, 685 => ppc_insn::PPC_INS_VMINSH, 686 => ppc_insn::PPC_INS_VMINSW, 687 => ppc_insn::PPC_INS_VMINUB, 688 => ppc_insn::PPC_INS_VMINUH, 689 => ppc_insn::PPC_INS_VMINUW, 690 => ppc_insn::PPC_INS_VMLADDUHM, 691 => ppc_insn::PPC_INS_VMRGHB, 692 => ppc_insn::PPC_INS_VMRGHH, 693 => ppc_insn::PPC_INS_VMRGHW, 694 => ppc_insn::PPC_INS_VMRGLB, 695 => ppc_insn::PPC_INS_VMRGLH, 696 => ppc_insn::PPC_INS_VMRGLW, 697 => ppc_insn::PPC_INS_VMSUMMBM, 698 => ppc_insn::PPC_INS_VMSUMSHM, 699 => ppc_insn::PPC_INS_VMSUMSHS, 700 => ppc_insn::PPC_INS_VMSUMUBM, 701 => ppc_insn::PPC_INS_VMSUMUHM, 702 => ppc_insn::PPC_INS_VMSUMUHS, 703 => ppc_insn::PPC_INS_VMULESB, 704 => ppc_insn::PPC_INS_VMULESH, 705 => ppc_insn::PPC_INS_VMULESW, 706 => ppc_insn::PPC_INS_VMULEUB, 707 => ppc_insn::PPC_INS_VMULEUH, 708 => ppc_insn::PPC_INS_VMULEUW, 709 => ppc_insn::PPC_INS_VMULOSB, 710 => ppc_insn::PPC_INS_VMULOSH, 711 => ppc_insn::PPC_INS_VMULOSW, 712 => ppc_insn::PPC_INS_VMULOUB, 713 => ppc_insn::PPC_INS_VMULOUH, 714 => ppc_insn::PPC_INS_VMULOUW, 715 => ppc_insn::PPC_INS_VMULUWM, 716 => ppc_insn::PPC_INS_VNAND, 717 => ppc_insn::PPC_INS_VNMSUBFP, 718 => ppc_insn::PPC_INS_VNOR, 719 => ppc_insn::PPC_INS_VOR, 720 => ppc_insn::PPC_INS_VORC, 721 => ppc_insn::PPC_INS_VPERM, 722 => ppc_insn::PPC_INS_VPKPX, 723 => ppc_insn::PPC_INS_VPKSHSS, 724 => ppc_insn::PPC_INS_VPKSHUS, 725 => ppc_insn::PPC_INS_VPKSWSS, 726 => ppc_insn::PPC_INS_VPKSWUS, 727 => ppc_insn::PPC_INS_VPKUHUM, 728 => ppc_insn::PPC_INS_VPKUHUS, 729 => ppc_insn::PPC_INS_VPKUWUM, 730 => ppc_insn::PPC_INS_VPKUWUS, 731 => ppc_insn::PPC_INS_VPOPCNTB, 732 => ppc_insn::PPC_INS_VPOPCNTD, 733 => ppc_insn::PPC_INS_VPOPCNTH, 734 => ppc_insn::PPC_INS_VPOPCNTW, 735 => ppc_insn::PPC_INS_VREFP, 736 => ppc_insn::PPC_INS_VRFIM, 737 => ppc_insn::PPC_INS_VRFIN, 738 => ppc_insn::PPC_INS_VRFIP, 739 => ppc_insn::PPC_INS_VRFIZ, 740 => ppc_insn::PPC_INS_VRLB, 741 => ppc_insn::PPC_INS_VRLD, 742 => ppc_insn::PPC_INS_VRLH, 743 => ppc_insn::PPC_INS_VRLW, 744 => ppc_insn::PPC_INS_VRSQRTEFP, 745 => ppc_insn::PPC_INS_VSEL, 746 => ppc_insn::PPC_INS_VSL, 747 => ppc_insn::PPC_INS_VSLB, 748 => ppc_insn::PPC_INS_VSLD, 749 => ppc_insn::PPC_INS_VSLDOI, 750 => ppc_insn::PPC_INS_VSLH, 751 => ppc_insn::PPC_INS_VSLO, 752 => ppc_insn::PPC_INS_VSLW, 753 => ppc_insn::PPC_INS_VSPLTB, 754 => ppc_insn::PPC_INS_VSPLTH, 755 => ppc_insn::PPC_INS_VSPLTISB, 756 => ppc_insn::PPC_INS_VSPLTISH, 757 => ppc_insn::PPC_INS_VSPLTISW, 758 => ppc_insn::PPC_INS_VSPLTW, 759 => ppc_insn::PPC_INS_VSR, 760 => ppc_insn::PPC_INS_VSRAB, 761 => ppc_insn::PPC_INS_VSRAD, 762 => ppc_insn::PPC_INS_VSRAH, 763 => ppc_insn::PPC_INS_VSRAW, 764 => ppc_insn::PPC_INS_VSRB, 765 => ppc_insn::PPC_INS_VSRD, 766 => ppc_insn::PPC_INS_VSRH, 767 => ppc_insn::PPC_INS_VSRO, 768 => ppc_insn::PPC_INS_VSRW, 769 => ppc_insn::PPC_INS_VSUBCUW, 770 => ppc_insn::PPC_INS_VSUBFP, 771 => ppc_insn::PPC_INS_VSUBSBS, 772 => ppc_insn::PPC_INS_VSUBSHS, 773 => ppc_insn::PPC_INS_VSUBSWS, 774 => ppc_insn::PPC_INS_VSUBUBM, 775 => ppc_insn::PPC_INS_VSUBUBS, 776 => ppc_insn::PPC_INS_VSUBUDM, 777 => ppc_insn::PPC_INS_VSUBUHM, 778 => ppc_insn::PPC_INS_VSUBUHS, 779 => ppc_insn::PPC_INS_VSUBUWM, 780 => ppc_insn::PPC_INS_VSUBUWS, 781 => ppc_insn::PPC_INS_VSUM2SWS, 782 => ppc_insn::PPC_INS_VSUM4SBS, 783 => ppc_insn::PPC_INS_VSUM4SHS, 784 => ppc_insn::PPC_INS_VSUM4UBS, 785 => ppc_insn::PPC_INS_VSUMSWS, 786 => ppc_insn::PPC_INS_VUPKHPX, 787 => ppc_insn::PPC_INS_VUPKHSB, 788 => ppc_insn::PPC_INS_VUPKHSH, 789 => ppc_insn::PPC_INS_VUPKLPX, 790 => ppc_insn::PPC_INS_VUPKLSB, 791 => ppc_insn::PPC_INS_VUPKLSH, 792 => ppc_insn::PPC_INS_VXOR, 793 => ppc_insn::PPC_INS_WAIT, 794 => ppc_insn::PPC_INS_WRTEE, 795 => ppc_insn::PPC_INS_WRTEEI, 796 => ppc_insn::PPC_INS_XOR, 797 => ppc_insn::PPC_INS_XORI, 798 => ppc_insn::PPC_INS_XORIS, 799 => ppc_insn::PPC_INS_XSABSDP, 800 => ppc_insn::PPC_INS_XSADDDP, 801 => ppc_insn::PPC_INS_XSCMPODP, 802 => ppc_insn::PPC_INS_XSCMPUDP, 803 => ppc_insn::PPC_INS_XSCPSGNDP, 804 => ppc_insn::PPC_INS_XSCVDPSP, 805 => ppc_insn::PPC_INS_XSCVDPSXDS, 806 => ppc_insn::PPC_INS_XSCVDPSXWS, 807 => ppc_insn::PPC_INS_XSCVDPUXDS, 808 => ppc_insn::PPC_INS_XSCVDPUXWS, 809 => ppc_insn::PPC_INS_XSCVSPDP, 810 => ppc_insn::PPC_INS_XSCVSXDDP, 811 => ppc_insn::PPC_INS_XSCVUXDDP, 812 => ppc_insn::PPC_INS_XSDIVDP, 813 => ppc_insn::PPC_INS_XSMADDADP, 814 => ppc_insn::PPC_INS_XSMADDMDP, 815 => ppc_insn::PPC_INS_XSMAXDP, 816 => ppc_insn::PPC_INS_XSMINDP, 817 => ppc_insn::PPC_INS_XSMSUBADP, 818 => ppc_insn::PPC_INS_XSMSUBMDP, 819 => ppc_insn::PPC_INS_XSMULDP, 820 => ppc_insn::PPC_INS_XSNABSDP, 821 => ppc_insn::PPC_INS_XSNEGDP, 822 => ppc_insn::PPC_INS_XSNMADDADP, 823 => ppc_insn::PPC_INS_XSNMADDMDP, 824 => ppc_insn::PPC_INS_XSNMSUBADP, 825 => ppc_insn::PPC_INS_XSNMSUBMDP, 826 => ppc_insn::PPC_INS_XSRDPI, 827 => ppc_insn::PPC_INS_XSRDPIC, 828 => ppc_insn::PPC_INS_XSRDPIM, 829 => ppc_insn::PPC_INS_XSRDPIP, 830 => ppc_insn::PPC_INS_XSRDPIZ, 831 => ppc_insn::PPC_INS_XSREDP, 832 => ppc_insn::PPC_INS_XSRSQRTEDP, 833 => ppc_insn::PPC_INS_XSSQRTDP, 834 => ppc_insn::PPC_INS_XSSUBDP, 835 => ppc_insn::PPC_INS_XSTDIVDP, 836 => ppc_insn::PPC_INS_XSTSQRTDP, 837 => ppc_insn::PPC_INS_XVABSDP, 838 => ppc_insn::PPC_INS_XVABSSP, 839 => ppc_insn::PPC_INS_XVADDDP, 840 => ppc_insn::PPC_INS_XVADDSP, 841 => ppc_insn::PPC_INS_XVCMPEQDP, 842 => ppc_insn::PPC_INS_XVCMPEQSP, 843 => ppc_insn::PPC_INS_XVCMPGEDP, 844 => ppc_insn::PPC_INS_XVCMPGESP, 845 => ppc_insn::PPC_INS_XVCMPGTDP, 846 => ppc_insn::PPC_INS_XVCMPGTSP, 847 => ppc_insn::PPC_INS_XVCPSGNDP, 848 => ppc_insn::PPC_INS_XVCPSGNSP, 849 => ppc_insn::PPC_INS_XVCVDPSP, 850 => ppc_insn::PPC_INS_XVCVDPSXDS, 851 => ppc_insn::PPC_INS_XVCVDPSXWS, 852 => ppc_insn::PPC_INS_XVCVDPUXDS, 853 => ppc_insn::PPC_INS_XVCVDPUXWS, 854 => ppc_insn::PPC_INS_XVCVSPDP, 855 => ppc_insn::PPC_INS_XVCVSPSXDS, 856 => ppc_insn::PPC_INS_XVCVSPSXWS, 857 => ppc_insn::PPC_INS_XVCVSPUXDS, 858 => ppc_insn::PPC_INS_XVCVSPUXWS, 859 => ppc_insn::PPC_INS_XVCVSXDDP, 860 => ppc_insn::PPC_INS_XVCVSXDSP, 861 => ppc_insn::PPC_INS_XVCVSXWDP, 862 => ppc_insn::PPC_INS_XVCVSXWSP, 863 => ppc_insn::PPC_INS_XVCVUXDDP, 864 => ppc_insn::PPC_INS_XVCVUXDSP, 865 => ppc_insn::PPC_INS_XVCVUXWDP, 866 => ppc_insn::PPC_INS_XVCVUXWSP, 867 => ppc_insn::PPC_INS_XVDIVDP, 868 => ppc_insn::PPC_INS_XVDIVSP, 869 => ppc_insn::PPC_INS_XVMADDADP, 870 => ppc_insn::PPC_INS_XVMADDASP, 871 => ppc_insn::PPC_INS_XVMADDMDP, 872 => ppc_insn::PPC_INS_XVMADDMSP, 873 => ppc_insn::PPC_INS_XVMAXDP, 874 => ppc_insn::PPC_INS_XVMAXSP, 875 => ppc_insn::PPC_INS_XVMINDP, 876 => ppc_insn::PPC_INS_XVMINSP, 877 => ppc_insn::PPC_INS_XVMSUBADP, 878 => ppc_insn::PPC_INS_XVMSUBASP, 879 => ppc_insn::PPC_INS_XVMSUBMDP, 880 => ppc_insn::PPC_INS_XVMSUBMSP, 881 => ppc_insn::PPC_INS_XVMULDP, 882 => ppc_insn::PPC_INS_XVMULSP, 883 => ppc_insn::PPC_INS_XVNABSDP, 884 => ppc_insn::PPC_INS_XVNABSSP, 885 => ppc_insn::PPC_INS_XVNEGDP, 886 => ppc_insn::PPC_INS_XVNEGSP, 887 => ppc_insn::PPC_INS_XVNMADDADP, 888 => ppc_insn::PPC_INS_XVNMADDASP, 889 => ppc_insn::PPC_INS_XVNMADDMDP, 890 => ppc_insn::PPC_INS_XVNMADDMSP, 891 => ppc_insn::PPC_INS_XVNMSUBADP, 892 => ppc_insn::PPC_INS_XVNMSUBASP, 893 => ppc_insn::PPC_INS_XVNMSUBMDP, 894 => ppc_insn::PPC_INS_XVNMSUBMSP, 895 => ppc_insn::PPC_INS_XVRDPI, 896 => ppc_insn::PPC_INS_XVRDPIC, 897 => ppc_insn::PPC_INS_XVRDPIM, 898 => ppc_insn::PPC_INS_XVRDPIP, 899 => ppc_insn::PPC_INS_XVRDPIZ, 900 => ppc_insn::PPC_INS_XVREDP, 901 => ppc_insn::PPC_INS_XVRESP, 902 => ppc_insn::PPC_INS_XVRSPI, 903 => ppc_insn::PPC_INS_XVRSPIC, 904 => ppc_insn::PPC_INS_XVRSPIM, 905 => ppc_insn::PPC_INS_XVRSPIP, 906 => ppc_insn::PPC_INS_XVRSPIZ, 907 => ppc_insn::PPC_INS_XVRSQRTEDP, 908 => ppc_insn::PPC_INS_XVRSQRTESP, 909 => ppc_insn::PPC_INS_XVSQRTDP, 910 => ppc_insn::PPC_INS_XVSQRTSP, 911 => ppc_insn::PPC_INS_XVSUBDP, 912 => ppc_insn::PPC_INS_XVSUBSP, 913 => ppc_insn::PPC_INS_XVTDIVDP, 914 => ppc_insn::PPC_INS_XVTDIVSP, 915 => ppc_insn::PPC_INS_XVTSQRTDP, 916 => ppc_insn::PPC_INS_XVTSQRTSP, 917 => ppc_insn::PPC_INS_XXLAND, 918 => ppc_insn::PPC_INS_XXLANDC, 919 => ppc_insn::PPC_INS_XXLEQV, 920 => ppc_insn::PPC_INS_XXLNAND, 921 => ppc_insn::PPC_INS_XXLNOR, 922 => ppc_insn::PPC_INS_XXLOR, 923 => ppc_insn::PPC_INS_XXLORC, 924 => ppc_insn::PPC_INS_XXLXOR, 925 => ppc_insn::PPC_INS_XXMRGHW, 926 => ppc_insn::PPC_INS_XXMRGLW, 927 => ppc_insn::PPC_INS_XXPERMDI, 928 => ppc_insn::PPC_INS_XXSEL, 929 => ppc_insn::PPC_INS_XXSLDWI, 930 => ppc_insn::PPC_INS_XXSPLTW, 931 => ppc_insn::PPC_INS_BCA, 932 => ppc_insn::PPC_INS_BCLA, 933 => ppc_insn::PPC_INS_SLWI, 934 => ppc_insn::PPC_INS_SRWI, 935 => ppc_insn::PPC_INS_SLDI, 936 => ppc_insn::PPC_INS_BTA, 937 => ppc_insn::PPC_INS_CRSET, 938 => ppc_insn::PPC_INS_CRNOT, 939 => ppc_insn::PPC_INS_CRMOVE, 940 => ppc_insn::PPC_INS_CRCLR, 941 => ppc_insn::PPC_INS_MFBR0, 942 => ppc_insn::PPC_INS_MFBR1, 943 => ppc_insn::PPC_INS_MFBR2, 944 => ppc_insn::PPC_INS_MFBR3, 945 => ppc_insn::PPC_INS_MFBR4, 946 => ppc_insn::PPC_INS_MFBR5, 947 => ppc_insn::PPC_INS_MFBR6, 948 => ppc_insn::PPC_INS_MFBR7, 949 => ppc_insn::PPC_INS_MFXER, 950 => ppc_insn::PPC_INS_MFRTCU, 951 => ppc_insn::PPC_INS_MFRTCL, 952 => ppc_insn::PPC_INS_MFDSCR, 953 => ppc_insn::PPC_INS_MFDSISR, 954 => ppc_insn::PPC_INS_MFDAR, 955 => ppc_insn::PPC_INS_MFSRR2, 956 => ppc_insn::PPC_INS_MFSRR3, 957 => ppc_insn::PPC_INS_MFCFAR, 958 => ppc_insn::PPC_INS_MFAMR, 959 => ppc_insn::PPC_INS_MFPID, 960 => ppc_insn::PPC_INS_MFTBLO, 961 => ppc_insn::PPC_INS_MFTBHI, 962 => ppc_insn::PPC_INS_MFDBATU, 963 => ppc_insn::PPC_INS_MFDBATL, 964 => ppc_insn::PPC_INS_MFIBATU, 965 => ppc_insn::PPC_INS_MFIBATL, 966 => ppc_insn::PPC_INS_MFDCCR, 967 => ppc_insn::PPC_INS_MFICCR, 968 => ppc_insn::PPC_INS_MFDEAR, 969 => ppc_insn::PPC_INS_MFESR, 970 => ppc_insn::PPC_INS_MFSPEFSCR, 971 => ppc_insn::PPC_INS_MFTCR, 972 => ppc_insn::PPC_INS_MFASR, 973 => ppc_insn::PPC_INS_MFPVR, 974 => ppc_insn::PPC_INS_MFTBU, 975 => ppc_insn::PPC_INS_MTCR, 976 => ppc_insn::PPC_INS_MTBR0, 977 => ppc_insn::PPC_INS_MTBR1, 978 => ppc_insn::PPC_INS_MTBR2, 979 => ppc_insn::PPC_INS_MTBR3, 980 => ppc_insn::PPC_INS_MTBR4, 981 => ppc_insn::PPC_INS_MTBR5, 982 => ppc_insn::PPC_INS_MTBR6, 983 => ppc_insn::PPC_INS_MTBR7, 984 => ppc_insn::PPC_INS_MTXER, 985 => ppc_insn::PPC_INS_MTDSCR, 986 => ppc_insn::PPC_INS_MTDSISR, 987 => ppc_insn::PPC_INS_MTDAR, 988 => ppc_insn::PPC_INS_MTSRR2, 989 => ppc_insn::PPC_INS_MTSRR3, 990 => ppc_insn::PPC_INS_MTCFAR, 991 => ppc_insn::PPC_INS_MTAMR, 992 => ppc_insn::PPC_INS_MTPID, 993 => ppc_insn::PPC_INS_MTTBL, 994 => ppc_insn::PPC_INS_MTTBU, 995 => ppc_insn::PPC_INS_MTTBLO, 996 => ppc_insn::PPC_INS_MTTBHI, 997 => ppc_insn::PPC_INS_MTDBATU, 998 => ppc_insn::PPC_INS_MTDBATL, 999 => ppc_insn::PPC_INS_MTIBATU, 1000 => ppc_insn::PPC_INS_MTIBATL, 1001 => ppc_insn::PPC_INS_MTDCCR, 1002 => ppc_insn::PPC_INS_MTICCR, 1003 => ppc_insn::PPC_INS_MTDEAR, 1004 => ppc_insn::PPC_INS_MTESR, 1005 => ppc_insn::PPC_INS_MTSPEFSCR, 1006 => ppc_insn::PPC_INS_MTTCR, 1007 => ppc_insn::PPC_INS_NOT, 1008 => ppc_insn::PPC_INS_MR, 1009 => ppc_insn::PPC_INS_ROTLD, 1010 => ppc_insn::PPC_INS_ROTLDI, 1011 => ppc_insn::PPC_INS_CLRLDI, 1012 => ppc_insn::PPC_INS_ROTLWI, 1013 => ppc_insn::PPC_INS_CLRLWI, 1014 => ppc_insn::PPC_INS_ROTLW, 1015 => ppc_insn::PPC_INS_SUB, 1016 => ppc_insn::PPC_INS_SUBC, 1017 => ppc_insn::PPC_INS_LWSYNC, 1018 => ppc_insn::PPC_INS_PTESYNC, 1019 => ppc_insn::PPC_INS_TDLT, 1020 => ppc_insn::PPC_INS_TDEQ, 1021 => ppc_insn::PPC_INS_TDGT, 1022 => ppc_insn::PPC_INS_TDNE, 1023 => ppc_insn::PPC_INS_TDLLT, 1024 => ppc_insn::PPC_INS_TDLGT, 1025 => ppc_insn::PPC_INS_TDU, 1026 => ppc_insn::PPC_INS_TDLTI, 1027 => ppc_insn::PPC_INS_TDEQI, 1028 => ppc_insn::PPC_INS_TDGTI, 1029 => ppc_insn::PPC_INS_TDNEI, 1030 => ppc_insn::PPC_INS_TDLLTI, 1031 => ppc_insn::PPC_INS_TDLGTI, 1032 => ppc_insn::PPC_INS_TDUI, 1033 => ppc_insn::PPC_INS_TLBREHI, 1034 => ppc_insn::PPC_INS_TLBRELO, 1035 => ppc_insn::PPC_INS_TLBWEHI, 1036 => ppc_insn::PPC_INS_TLBWELO, 1037 => ppc_insn::PPC_INS_TWLT, 1038 => ppc_insn::PPC_INS_TWEQ, 1039 => ppc_insn::PPC_INS_TWGT, 1040 => ppc_insn::PPC_INS_TWNE, 1041 => ppc_insn::PPC_INS_TWLLT, 1042 => ppc_insn::PPC_INS_TWLGT, 1043 => ppc_insn::PPC_INS_TWU, 1044 => ppc_insn::PPC_INS_TWLTI, 1045 => ppc_insn::PPC_INS_TWEQI, 1046 => ppc_insn::PPC_INS_TWGTI, 1047 => ppc_insn::PPC_INS_TWNEI, 1048 => ppc_insn::PPC_INS_TWLLTI, 1049 => ppc_insn::PPC_INS_TWLGTI, 1050 => ppc_insn::PPC_INS_TWUI, 1051 => ppc_insn::PPC_INS_WAITRSV, 1052 => ppc_insn::PPC_INS_WAITIMPL, 1053 => ppc_insn::PPC_INS_XNOP, 1054 => ppc_insn::PPC_INS_XVMOVDP, 1055 => ppc_insn::PPC_INS_XVMOVSP, 1056 => ppc_insn::PPC_INS_XXSPLTD, 1057 => ppc_insn::PPC_INS_XXMRGHD, 1058 => ppc_insn::PPC_INS_XXMRGLD, 1059 => ppc_insn::PPC_INS_XXSWAPD, 1060 => ppc_insn::PPC_INS_BT, 1061 => ppc_insn::PPC_INS_BF, 1062 => ppc_insn::PPC_INS_BDNZT, 1063 => ppc_insn::PPC_INS_BDNZF, 1064 => ppc_insn::PPC_INS_BDZF, 1065 => ppc_insn::PPC_INS_BDZT, 1066 => ppc_insn::PPC_INS_BFA, 1067 => ppc_insn::PPC_INS_BDNZTA, 1068 => ppc_insn::PPC_INS_BDNZFA, 1069 => ppc_insn::PPC_INS_BDZTA, 1070 => ppc_insn::PPC_INS_BDZFA, 1071 => ppc_insn::PPC_INS_BTCTR, 1072 => ppc_insn::PPC_INS_BFCTR, 1073 => ppc_insn::PPC_INS_BTCTRL, 1074 => ppc_insn::PPC_INS_BFCTRL, 1075 => ppc_insn::PPC_INS_BTL, 1076 => ppc_insn::PPC_INS_BFL, 1077 => ppc_insn::PPC_INS_BDNZTL, 1078 => ppc_insn::PPC_INS_BDNZFL, 1079 => ppc_insn::PPC_INS_BDZTL, 1080 => ppc_insn::PPC_INS_BDZFL, 1081 => ppc_insn::PPC_INS_BTLA, 1082 => ppc_insn::PPC_INS_BFLA, 1083 => ppc_insn::PPC_INS_BDNZTLA, 1084 => ppc_insn::PPC_INS_BDNZFLA, 1085 => ppc_insn::PPC_INS_BDZTLA, 1086 => ppc_insn::PPC_INS_BDZFLA, 1087 => ppc_insn::PPC_INS_BTLR, 1088 => ppc_insn::PPC_INS_BFLR, 1089 => ppc_insn::PPC_INS_BDNZTLR, 1090 => ppc_insn::PPC_INS_BDZTLR, 1091 => ppc_insn::PPC_INS_BDZFLR, 1092 => ppc_insn::PPC_INS_BTLRL, 1093 => ppc_insn::PPC_INS_BFLRL, 1094 => ppc_insn::PPC_INS_BDNZTLRL, 1095 => ppc_insn::PPC_INS_BDNZFLRL, 1096 => ppc_insn::PPC_INS_BDZTLRL, 1097 => ppc_insn::PPC_INS_BDZFLRL, 1098 => ppc_insn::PPC_INS_QVFAND, 1099 => ppc_insn::PPC_INS_QVFCLR, 1100 => ppc_insn::PPC_INS_QVFANDC, 1101 => ppc_insn::PPC_INS_QVFCTFB, 1102 => ppc_insn::PPC_INS_QVFXOR, 1103 => ppc_insn::PPC_INS_QVFOR, 1104 => ppc_insn::PPC_INS_QVFNOR, 1105 => ppc_insn::PPC_INS_QVFEQU, 1106 => ppc_insn::PPC_INS_QVFNOT, 1107 => ppc_insn::PPC_INS_QVFORC, 1108 => ppc_insn::PPC_INS_QVFNAND, 1109 => ppc_insn::PPC_INS_QVFSET, 1110 => ppc_insn::PPC_INS_ENDING, _ => ppc_insn::PPC_INS_INVALID, } } } impl From for sparc_insn { fn from(id: u32) -> Self { match id { 0 => sparc_insn::SPARC_INS_INVALID, 1 => sparc_insn::SPARC_INS_ADDCC, 2 => sparc_insn::SPARC_INS_ADDX, 3 => sparc_insn::SPARC_INS_ADDXCC, 4 => sparc_insn::SPARC_INS_ADDXC, 5 => sparc_insn::SPARC_INS_ADDXCCC, 6 => sparc_insn::SPARC_INS_ADD, 7 => sparc_insn::SPARC_INS_ALIGNADDR, 8 => sparc_insn::SPARC_INS_ALIGNADDRL, 9 => sparc_insn::SPARC_INS_ANDCC, 10 => sparc_insn::SPARC_INS_ANDNCC, 11 => sparc_insn::SPARC_INS_ANDN, 12 => sparc_insn::SPARC_INS_AND, 13 => sparc_insn::SPARC_INS_ARRAY16, 14 => sparc_insn::SPARC_INS_ARRAY32, 15 => sparc_insn::SPARC_INS_ARRAY8, 16 => sparc_insn::SPARC_INS_B, 17 => sparc_insn::SPARC_INS_JMP, 18 => sparc_insn::SPARC_INS_BMASK, 19 => sparc_insn::SPARC_INS_FB, 20 => sparc_insn::SPARC_INS_BRGEZ, 21 => sparc_insn::SPARC_INS_BRGZ, 22 => sparc_insn::SPARC_INS_BRLEZ, 23 => sparc_insn::SPARC_INS_BRLZ, 24 => sparc_insn::SPARC_INS_BRNZ, 25 => sparc_insn::SPARC_INS_BRZ, 26 => sparc_insn::SPARC_INS_BSHUFFLE, 27 => sparc_insn::SPARC_INS_CALL, 28 => sparc_insn::SPARC_INS_CASX, 29 => sparc_insn::SPARC_INS_CAS, 30 => sparc_insn::SPARC_INS_CMASK16, 31 => sparc_insn::SPARC_INS_CMASK32, 32 => sparc_insn::SPARC_INS_CMASK8, 33 => sparc_insn::SPARC_INS_CMP, 34 => sparc_insn::SPARC_INS_EDGE16, 35 => sparc_insn::SPARC_INS_EDGE16L, 36 => sparc_insn::SPARC_INS_EDGE16LN, 37 => sparc_insn::SPARC_INS_EDGE16N, 38 => sparc_insn::SPARC_INS_EDGE32, 39 => sparc_insn::SPARC_INS_EDGE32L, 40 => sparc_insn::SPARC_INS_EDGE32LN, 41 => sparc_insn::SPARC_INS_EDGE32N, 42 => sparc_insn::SPARC_INS_EDGE8, 43 => sparc_insn::SPARC_INS_EDGE8L, 44 => sparc_insn::SPARC_INS_EDGE8LN, 45 => sparc_insn::SPARC_INS_EDGE8N, 46 => sparc_insn::SPARC_INS_FABSD, 47 => sparc_insn::SPARC_INS_FABSQ, 48 => sparc_insn::SPARC_INS_FABSS, 49 => sparc_insn::SPARC_INS_FADDD, 50 => sparc_insn::SPARC_INS_FADDQ, 51 => sparc_insn::SPARC_INS_FADDS, 52 => sparc_insn::SPARC_INS_FALIGNDATA, 53 => sparc_insn::SPARC_INS_FAND, 54 => sparc_insn::SPARC_INS_FANDNOT1, 55 => sparc_insn::SPARC_INS_FANDNOT1S, 56 => sparc_insn::SPARC_INS_FANDNOT2, 57 => sparc_insn::SPARC_INS_FANDNOT2S, 58 => sparc_insn::SPARC_INS_FANDS, 59 => sparc_insn::SPARC_INS_FCHKSM16, 60 => sparc_insn::SPARC_INS_FCMPD, 61 => sparc_insn::SPARC_INS_FCMPEQ16, 62 => sparc_insn::SPARC_INS_FCMPEQ32, 63 => sparc_insn::SPARC_INS_FCMPGT16, 64 => sparc_insn::SPARC_INS_FCMPGT32, 65 => sparc_insn::SPARC_INS_FCMPLE16, 66 => sparc_insn::SPARC_INS_FCMPLE32, 67 => sparc_insn::SPARC_INS_FCMPNE16, 68 => sparc_insn::SPARC_INS_FCMPNE32, 69 => sparc_insn::SPARC_INS_FCMPQ, 70 => sparc_insn::SPARC_INS_FCMPS, 71 => sparc_insn::SPARC_INS_FDIVD, 72 => sparc_insn::SPARC_INS_FDIVQ, 73 => sparc_insn::SPARC_INS_FDIVS, 74 => sparc_insn::SPARC_INS_FDMULQ, 75 => sparc_insn::SPARC_INS_FDTOI, 76 => sparc_insn::SPARC_INS_FDTOQ, 77 => sparc_insn::SPARC_INS_FDTOS, 78 => sparc_insn::SPARC_INS_FDTOX, 79 => sparc_insn::SPARC_INS_FEXPAND, 80 => sparc_insn::SPARC_INS_FHADDD, 81 => sparc_insn::SPARC_INS_FHADDS, 82 => sparc_insn::SPARC_INS_FHSUBD, 83 => sparc_insn::SPARC_INS_FHSUBS, 84 => sparc_insn::SPARC_INS_FITOD, 85 => sparc_insn::SPARC_INS_FITOQ, 86 => sparc_insn::SPARC_INS_FITOS, 87 => sparc_insn::SPARC_INS_FLCMPD, 88 => sparc_insn::SPARC_INS_FLCMPS, 89 => sparc_insn::SPARC_INS_FLUSHW, 90 => sparc_insn::SPARC_INS_FMEAN16, 91 => sparc_insn::SPARC_INS_FMOVD, 92 => sparc_insn::SPARC_INS_FMOVQ, 93 => sparc_insn::SPARC_INS_FMOVRDGEZ, 94 => sparc_insn::SPARC_INS_FMOVRQGEZ, 95 => sparc_insn::SPARC_INS_FMOVRSGEZ, 96 => sparc_insn::SPARC_INS_FMOVRDGZ, 97 => sparc_insn::SPARC_INS_FMOVRQGZ, 98 => sparc_insn::SPARC_INS_FMOVRSGZ, 99 => sparc_insn::SPARC_INS_FMOVRDLEZ, 100 => sparc_insn::SPARC_INS_FMOVRQLEZ, 101 => sparc_insn::SPARC_INS_FMOVRSLEZ, 102 => sparc_insn::SPARC_INS_FMOVRDLZ, 103 => sparc_insn::SPARC_INS_FMOVRQLZ, 104 => sparc_insn::SPARC_INS_FMOVRSLZ, 105 => sparc_insn::SPARC_INS_FMOVRDNZ, 106 => sparc_insn::SPARC_INS_FMOVRQNZ, 107 => sparc_insn::SPARC_INS_FMOVRSNZ, 108 => sparc_insn::SPARC_INS_FMOVRDZ, 109 => sparc_insn::SPARC_INS_FMOVRQZ, 110 => sparc_insn::SPARC_INS_FMOVRSZ, 111 => sparc_insn::SPARC_INS_FMOVS, 112 => sparc_insn::SPARC_INS_FMUL8SUX16, 113 => sparc_insn::SPARC_INS_FMUL8ULX16, 114 => sparc_insn::SPARC_INS_FMUL8X16, 115 => sparc_insn::SPARC_INS_FMUL8X16AL, 116 => sparc_insn::SPARC_INS_FMUL8X16AU, 117 => sparc_insn::SPARC_INS_FMULD, 118 => sparc_insn::SPARC_INS_FMULD8SUX16, 119 => sparc_insn::SPARC_INS_FMULD8ULX16, 120 => sparc_insn::SPARC_INS_FMULQ, 121 => sparc_insn::SPARC_INS_FMULS, 122 => sparc_insn::SPARC_INS_FNADDD, 123 => sparc_insn::SPARC_INS_FNADDS, 124 => sparc_insn::SPARC_INS_FNAND, 125 => sparc_insn::SPARC_INS_FNANDS, 126 => sparc_insn::SPARC_INS_FNEGD, 127 => sparc_insn::SPARC_INS_FNEGQ, 128 => sparc_insn::SPARC_INS_FNEGS, 129 => sparc_insn::SPARC_INS_FNHADDD, 130 => sparc_insn::SPARC_INS_FNHADDS, 131 => sparc_insn::SPARC_INS_FNOR, 132 => sparc_insn::SPARC_INS_FNORS, 133 => sparc_insn::SPARC_INS_FNOT1, 134 => sparc_insn::SPARC_INS_FNOT1S, 135 => sparc_insn::SPARC_INS_FNOT2, 136 => sparc_insn::SPARC_INS_FNOT2S, 137 => sparc_insn::SPARC_INS_FONE, 138 => sparc_insn::SPARC_INS_FONES, 139 => sparc_insn::SPARC_INS_FOR, 140 => sparc_insn::SPARC_INS_FORNOT1, 141 => sparc_insn::SPARC_INS_FORNOT1S, 142 => sparc_insn::SPARC_INS_FORNOT2, 143 => sparc_insn::SPARC_INS_FORNOT2S, 144 => sparc_insn::SPARC_INS_FORS, 145 => sparc_insn::SPARC_INS_FPACK16, 146 => sparc_insn::SPARC_INS_FPACK32, 147 => sparc_insn::SPARC_INS_FPACKFIX, 148 => sparc_insn::SPARC_INS_FPADD16, 149 => sparc_insn::SPARC_INS_FPADD16S, 150 => sparc_insn::SPARC_INS_FPADD32, 151 => sparc_insn::SPARC_INS_FPADD32S, 152 => sparc_insn::SPARC_INS_FPADD64, 153 => sparc_insn::SPARC_INS_FPMERGE, 154 => sparc_insn::SPARC_INS_FPSUB16, 155 => sparc_insn::SPARC_INS_FPSUB16S, 156 => sparc_insn::SPARC_INS_FPSUB32, 157 => sparc_insn::SPARC_INS_FPSUB32S, 158 => sparc_insn::SPARC_INS_FQTOD, 159 => sparc_insn::SPARC_INS_FQTOI, 160 => sparc_insn::SPARC_INS_FQTOS, 161 => sparc_insn::SPARC_INS_FQTOX, 162 => sparc_insn::SPARC_INS_FSLAS16, 163 => sparc_insn::SPARC_INS_FSLAS32, 164 => sparc_insn::SPARC_INS_FSLL16, 165 => sparc_insn::SPARC_INS_FSLL32, 166 => sparc_insn::SPARC_INS_FSMULD, 167 => sparc_insn::SPARC_INS_FSQRTD, 168 => sparc_insn::SPARC_INS_FSQRTQ, 169 => sparc_insn::SPARC_INS_FSQRTS, 170 => sparc_insn::SPARC_INS_FSRA16, 171 => sparc_insn::SPARC_INS_FSRA32, 172 => sparc_insn::SPARC_INS_FSRC1, 173 => sparc_insn::SPARC_INS_FSRC1S, 174 => sparc_insn::SPARC_INS_FSRC2, 175 => sparc_insn::SPARC_INS_FSRC2S, 176 => sparc_insn::SPARC_INS_FSRL16, 177 => sparc_insn::SPARC_INS_FSRL32, 178 => sparc_insn::SPARC_INS_FSTOD, 179 => sparc_insn::SPARC_INS_FSTOI, 180 => sparc_insn::SPARC_INS_FSTOQ, 181 => sparc_insn::SPARC_INS_FSTOX, 182 => sparc_insn::SPARC_INS_FSUBD, 183 => sparc_insn::SPARC_INS_FSUBQ, 184 => sparc_insn::SPARC_INS_FSUBS, 185 => sparc_insn::SPARC_INS_FXNOR, 186 => sparc_insn::SPARC_INS_FXNORS, 187 => sparc_insn::SPARC_INS_FXOR, 188 => sparc_insn::SPARC_INS_FXORS, 189 => sparc_insn::SPARC_INS_FXTOD, 190 => sparc_insn::SPARC_INS_FXTOQ, 191 => sparc_insn::SPARC_INS_FXTOS, 192 => sparc_insn::SPARC_INS_FZERO, 193 => sparc_insn::SPARC_INS_FZEROS, 194 => sparc_insn::SPARC_INS_JMPL, 195 => sparc_insn::SPARC_INS_LDD, 196 => sparc_insn::SPARC_INS_LD, 197 => sparc_insn::SPARC_INS_LDQ, 198 => sparc_insn::SPARC_INS_LDSB, 199 => sparc_insn::SPARC_INS_LDSH, 200 => sparc_insn::SPARC_INS_LDSW, 201 => sparc_insn::SPARC_INS_LDUB, 202 => sparc_insn::SPARC_INS_LDUH, 203 => sparc_insn::SPARC_INS_LDX, 204 => sparc_insn::SPARC_INS_LZCNT, 205 => sparc_insn::SPARC_INS_MEMBAR, 206 => sparc_insn::SPARC_INS_MOVDTOX, 207 => sparc_insn::SPARC_INS_MOV, 208 => sparc_insn::SPARC_INS_MOVRGEZ, 209 => sparc_insn::SPARC_INS_MOVRGZ, 210 => sparc_insn::SPARC_INS_MOVRLEZ, 211 => sparc_insn::SPARC_INS_MOVRLZ, 212 => sparc_insn::SPARC_INS_MOVRNZ, 213 => sparc_insn::SPARC_INS_MOVRZ, 214 => sparc_insn::SPARC_INS_MOVSTOSW, 215 => sparc_insn::SPARC_INS_MOVSTOUW, 216 => sparc_insn::SPARC_INS_MULX, 217 => sparc_insn::SPARC_INS_NOP, 218 => sparc_insn::SPARC_INS_ORCC, 219 => sparc_insn::SPARC_INS_ORNCC, 220 => sparc_insn::SPARC_INS_ORN, 221 => sparc_insn::SPARC_INS_OR, 222 => sparc_insn::SPARC_INS_PDIST, 223 => sparc_insn::SPARC_INS_PDISTN, 224 => sparc_insn::SPARC_INS_POPC, 225 => sparc_insn::SPARC_INS_RD, 226 => sparc_insn::SPARC_INS_RESTORE, 227 => sparc_insn::SPARC_INS_RETT, 228 => sparc_insn::SPARC_INS_SAVE, 229 => sparc_insn::SPARC_INS_SDIVCC, 230 => sparc_insn::SPARC_INS_SDIVX, 231 => sparc_insn::SPARC_INS_SDIV, 232 => sparc_insn::SPARC_INS_SETHI, 233 => sparc_insn::SPARC_INS_SHUTDOWN, 234 => sparc_insn::SPARC_INS_SIAM, 235 => sparc_insn::SPARC_INS_SLLX, 236 => sparc_insn::SPARC_INS_SLL, 237 => sparc_insn::SPARC_INS_SMULCC, 238 => sparc_insn::SPARC_INS_SMUL, 239 => sparc_insn::SPARC_INS_SRAX, 240 => sparc_insn::SPARC_INS_SRA, 241 => sparc_insn::SPARC_INS_SRLX, 242 => sparc_insn::SPARC_INS_SRL, 243 => sparc_insn::SPARC_INS_STBAR, 244 => sparc_insn::SPARC_INS_STB, 245 => sparc_insn::SPARC_INS_STD, 246 => sparc_insn::SPARC_INS_ST, 247 => sparc_insn::SPARC_INS_STH, 248 => sparc_insn::SPARC_INS_STQ, 249 => sparc_insn::SPARC_INS_STX, 250 => sparc_insn::SPARC_INS_SUBCC, 251 => sparc_insn::SPARC_INS_SUBX, 252 => sparc_insn::SPARC_INS_SUBXCC, 253 => sparc_insn::SPARC_INS_SUB, 254 => sparc_insn::SPARC_INS_SWAP, 255 => sparc_insn::SPARC_INS_TADDCCTV, 256 => sparc_insn::SPARC_INS_TADDCC, 257 => sparc_insn::SPARC_INS_T, 258 => sparc_insn::SPARC_INS_TSUBCCTV, 259 => sparc_insn::SPARC_INS_TSUBCC, 260 => sparc_insn::SPARC_INS_UDIVCC, 261 => sparc_insn::SPARC_INS_UDIVX, 262 => sparc_insn::SPARC_INS_UDIV, 263 => sparc_insn::SPARC_INS_UMULCC, 264 => sparc_insn::SPARC_INS_UMULXHI, 265 => sparc_insn::SPARC_INS_UMUL, 266 => sparc_insn::SPARC_INS_UNIMP, 267 => sparc_insn::SPARC_INS_FCMPED, 268 => sparc_insn::SPARC_INS_FCMPEQ, 269 => sparc_insn::SPARC_INS_FCMPES, 270 => sparc_insn::SPARC_INS_WR, 271 => sparc_insn::SPARC_INS_XMULX, 272 => sparc_insn::SPARC_INS_XMULXHI, 273 => sparc_insn::SPARC_INS_XNORCC, 274 => sparc_insn::SPARC_INS_XNOR, 275 => sparc_insn::SPARC_INS_XORCC, 276 => sparc_insn::SPARC_INS_XOR, 277 => sparc_insn::SPARC_INS_RET, 278 => sparc_insn::SPARC_INS_RETL, 279 => sparc_insn::SPARC_INS_ENDING, _ => sparc_insn::SPARC_INS_INVALID, } } } impl From for sysz_insn { fn from(id: u32) -> Self { match id { 0 => sysz_insn::SYSZ_INS_INVALID, 1 => sysz_insn::SYSZ_INS_A, 2 => sysz_insn::SYSZ_INS_ADB, 3 => sysz_insn::SYSZ_INS_ADBR, 4 => sysz_insn::SYSZ_INS_AEB, 5 => sysz_insn::SYSZ_INS_AEBR, 6 => sysz_insn::SYSZ_INS_AFI, 7 => sysz_insn::SYSZ_INS_AG, 8 => sysz_insn::SYSZ_INS_AGF, 9 => sysz_insn::SYSZ_INS_AGFI, 10 => sysz_insn::SYSZ_INS_AGFR, 11 => sysz_insn::SYSZ_INS_AGHI, 12 => sysz_insn::SYSZ_INS_AGHIK, 13 => sysz_insn::SYSZ_INS_AGR, 14 => sysz_insn::SYSZ_INS_AGRK, 15 => sysz_insn::SYSZ_INS_AGSI, 16 => sysz_insn::SYSZ_INS_AH, 17 => sysz_insn::SYSZ_INS_AHI, 18 => sysz_insn::SYSZ_INS_AHIK, 19 => sysz_insn::SYSZ_INS_AHY, 20 => sysz_insn::SYSZ_INS_AIH, 21 => sysz_insn::SYSZ_INS_AL, 22 => sysz_insn::SYSZ_INS_ALC, 23 => sysz_insn::SYSZ_INS_ALCG, 24 => sysz_insn::SYSZ_INS_ALCGR, 25 => sysz_insn::SYSZ_INS_ALCR, 26 => sysz_insn::SYSZ_INS_ALFI, 27 => sysz_insn::SYSZ_INS_ALG, 28 => sysz_insn::SYSZ_INS_ALGF, 29 => sysz_insn::SYSZ_INS_ALGFI, 30 => sysz_insn::SYSZ_INS_ALGFR, 31 => sysz_insn::SYSZ_INS_ALGHSIK, 32 => sysz_insn::SYSZ_INS_ALGR, 33 => sysz_insn::SYSZ_INS_ALGRK, 34 => sysz_insn::SYSZ_INS_ALHSIK, 35 => sysz_insn::SYSZ_INS_ALR, 36 => sysz_insn::SYSZ_INS_ALRK, 37 => sysz_insn::SYSZ_INS_ALY, 38 => sysz_insn::SYSZ_INS_AR, 39 => sysz_insn::SYSZ_INS_ARK, 40 => sysz_insn::SYSZ_INS_ASI, 41 => sysz_insn::SYSZ_INS_AXBR, 42 => sysz_insn::SYSZ_INS_AY, 43 => sysz_insn::SYSZ_INS_BCR, 44 => sysz_insn::SYSZ_INS_BRC, 45 => sysz_insn::SYSZ_INS_BRCL, 46 => sysz_insn::SYSZ_INS_CGIJ, 47 => sysz_insn::SYSZ_INS_CGRJ, 48 => sysz_insn::SYSZ_INS_CIJ, 49 => sysz_insn::SYSZ_INS_CLGIJ, 50 => sysz_insn::SYSZ_INS_CLGRJ, 51 => sysz_insn::SYSZ_INS_CLIJ, 52 => sysz_insn::SYSZ_INS_CLRJ, 53 => sysz_insn::SYSZ_INS_CRJ, 54 => sysz_insn::SYSZ_INS_BER, 55 => sysz_insn::SYSZ_INS_JE, 56 => sysz_insn::SYSZ_INS_JGE, 57 => sysz_insn::SYSZ_INS_LOCE, 58 => sysz_insn::SYSZ_INS_LOCGE, 59 => sysz_insn::SYSZ_INS_LOCGRE, 60 => sysz_insn::SYSZ_INS_LOCRE, 61 => sysz_insn::SYSZ_INS_STOCE, 62 => sysz_insn::SYSZ_INS_STOCGE, 63 => sysz_insn::SYSZ_INS_BHR, 64 => sysz_insn::SYSZ_INS_BHER, 65 => sysz_insn::SYSZ_INS_JHE, 66 => sysz_insn::SYSZ_INS_JGHE, 67 => sysz_insn::SYSZ_INS_LOCHE, 68 => sysz_insn::SYSZ_INS_LOCGHE, 69 => sysz_insn::SYSZ_INS_LOCGRHE, 70 => sysz_insn::SYSZ_INS_LOCRHE, 71 => sysz_insn::SYSZ_INS_STOCHE, 72 => sysz_insn::SYSZ_INS_STOCGHE, 73 => sysz_insn::SYSZ_INS_JH, 74 => sysz_insn::SYSZ_INS_JGH, 75 => sysz_insn::SYSZ_INS_LOCH, 76 => sysz_insn::SYSZ_INS_LOCGH, 77 => sysz_insn::SYSZ_INS_LOCGRH, 78 => sysz_insn::SYSZ_INS_LOCRH, 79 => sysz_insn::SYSZ_INS_STOCH, 80 => sysz_insn::SYSZ_INS_STOCGH, 81 => sysz_insn::SYSZ_INS_CGIJNLH, 82 => sysz_insn::SYSZ_INS_CGRJNLH, 83 => sysz_insn::SYSZ_INS_CIJNLH, 84 => sysz_insn::SYSZ_INS_CLGIJNLH, 85 => sysz_insn::SYSZ_INS_CLGRJNLH, 86 => sysz_insn::SYSZ_INS_CLIJNLH, 87 => sysz_insn::SYSZ_INS_CLRJNLH, 88 => sysz_insn::SYSZ_INS_CRJNLH, 89 => sysz_insn::SYSZ_INS_CGIJE, 90 => sysz_insn::SYSZ_INS_CGRJE, 91 => sysz_insn::SYSZ_INS_CIJE, 92 => sysz_insn::SYSZ_INS_CLGIJE, 93 => sysz_insn::SYSZ_INS_CLGRJE, 94 => sysz_insn::SYSZ_INS_CLIJE, 95 => sysz_insn::SYSZ_INS_CLRJE, 96 => sysz_insn::SYSZ_INS_CRJE, 97 => sysz_insn::SYSZ_INS_CGIJNLE, 98 => sysz_insn::SYSZ_INS_CGRJNLE, 99 => sysz_insn::SYSZ_INS_CIJNLE, 100 => sysz_insn::SYSZ_INS_CLGIJNLE, 101 => sysz_insn::SYSZ_INS_CLGRJNLE, 102 => sysz_insn::SYSZ_INS_CLIJNLE, 103 => sysz_insn::SYSZ_INS_CLRJNLE, 104 => sysz_insn::SYSZ_INS_CRJNLE, 105 => sysz_insn::SYSZ_INS_CGIJH, 106 => sysz_insn::SYSZ_INS_CGRJH, 107 => sysz_insn::SYSZ_INS_CIJH, 108 => sysz_insn::SYSZ_INS_CLGIJH, 109 => sysz_insn::SYSZ_INS_CLGRJH, 110 => sysz_insn::SYSZ_INS_CLIJH, 111 => sysz_insn::SYSZ_INS_CLRJH, 112 => sysz_insn::SYSZ_INS_CRJH, 113 => sysz_insn::SYSZ_INS_CGIJNL, 114 => sysz_insn::SYSZ_INS_CGRJNL, 115 => sysz_insn::SYSZ_INS_CIJNL, 116 => sysz_insn::SYSZ_INS_CLGIJNL, 117 => sysz_insn::SYSZ_INS_CLGRJNL, 118 => sysz_insn::SYSZ_INS_CLIJNL, 119 => sysz_insn::SYSZ_INS_CLRJNL, 120 => sysz_insn::SYSZ_INS_CRJNL, 121 => sysz_insn::SYSZ_INS_CGIJHE, 122 => sysz_insn::SYSZ_INS_CGRJHE, 123 => sysz_insn::SYSZ_INS_CIJHE, 124 => sysz_insn::SYSZ_INS_CLGIJHE, 125 => sysz_insn::SYSZ_INS_CLGRJHE, 126 => sysz_insn::SYSZ_INS_CLIJHE, 127 => sysz_insn::SYSZ_INS_CLRJHE, 128 => sysz_insn::SYSZ_INS_CRJHE, 129 => sysz_insn::SYSZ_INS_CGIJNHE, 130 => sysz_insn::SYSZ_INS_CGRJNHE, 131 => sysz_insn::SYSZ_INS_CIJNHE, 132 => sysz_insn::SYSZ_INS_CLGIJNHE, 133 => sysz_insn::SYSZ_INS_CLGRJNHE, 134 => sysz_insn::SYSZ_INS_CLIJNHE, 135 => sysz_insn::SYSZ_INS_CLRJNHE, 136 => sysz_insn::SYSZ_INS_CRJNHE, 137 => sysz_insn::SYSZ_INS_CGIJL, 138 => sysz_insn::SYSZ_INS_CGRJL, 139 => sysz_insn::SYSZ_INS_CIJL, 140 => sysz_insn::SYSZ_INS_CLGIJL, 141 => sysz_insn::SYSZ_INS_CLGRJL, 142 => sysz_insn::SYSZ_INS_CLIJL, 143 => sysz_insn::SYSZ_INS_CLRJL, 144 => sysz_insn::SYSZ_INS_CRJL, 145 => sysz_insn::SYSZ_INS_CGIJNH, 146 => sysz_insn::SYSZ_INS_CGRJNH, 147 => sysz_insn::SYSZ_INS_CIJNH, 148 => sysz_insn::SYSZ_INS_CLGIJNH, 149 => sysz_insn::SYSZ_INS_CLGRJNH, 150 => sysz_insn::SYSZ_INS_CLIJNH, 151 => sysz_insn::SYSZ_INS_CLRJNH, 152 => sysz_insn::SYSZ_INS_CRJNH, 153 => sysz_insn::SYSZ_INS_CGIJLE, 154 => sysz_insn::SYSZ_INS_CGRJLE, 155 => sysz_insn::SYSZ_INS_CIJLE, 156 => sysz_insn::SYSZ_INS_CLGIJLE, 157 => sysz_insn::SYSZ_INS_CLGRJLE, 158 => sysz_insn::SYSZ_INS_CLIJLE, 159 => sysz_insn::SYSZ_INS_CLRJLE, 160 => sysz_insn::SYSZ_INS_CRJLE, 161 => sysz_insn::SYSZ_INS_CGIJNE, 162 => sysz_insn::SYSZ_INS_CGRJNE, 163 => sysz_insn::SYSZ_INS_CIJNE, 164 => sysz_insn::SYSZ_INS_CLGIJNE, 165 => sysz_insn::SYSZ_INS_CLGRJNE, 166 => sysz_insn::SYSZ_INS_CLIJNE, 167 => sysz_insn::SYSZ_INS_CLRJNE, 168 => sysz_insn::SYSZ_INS_CRJNE, 169 => sysz_insn::SYSZ_INS_CGIJLH, 170 => sysz_insn::SYSZ_INS_CGRJLH, 171 => sysz_insn::SYSZ_INS_CIJLH, 172 => sysz_insn::SYSZ_INS_CLGIJLH, 173 => sysz_insn::SYSZ_INS_CLGRJLH, 174 => sysz_insn::SYSZ_INS_CLIJLH, 175 => sysz_insn::SYSZ_INS_CLRJLH, 176 => sysz_insn::SYSZ_INS_CRJLH, 177 => sysz_insn::SYSZ_INS_BLR, 178 => sysz_insn::SYSZ_INS_BLER, 179 => sysz_insn::SYSZ_INS_JLE, 180 => sysz_insn::SYSZ_INS_JGLE, 181 => sysz_insn::SYSZ_INS_LOCLE, 182 => sysz_insn::SYSZ_INS_LOCGLE, 183 => sysz_insn::SYSZ_INS_LOCGRLE, 184 => sysz_insn::SYSZ_INS_LOCRLE, 185 => sysz_insn::SYSZ_INS_STOCLE, 186 => sysz_insn::SYSZ_INS_STOCGLE, 187 => sysz_insn::SYSZ_INS_BLHR, 188 => sysz_insn::SYSZ_INS_JLH, 189 => sysz_insn::SYSZ_INS_JGLH, 190 => sysz_insn::SYSZ_INS_LOCLH, 191 => sysz_insn::SYSZ_INS_LOCGLH, 192 => sysz_insn::SYSZ_INS_LOCGRLH, 193 => sysz_insn::SYSZ_INS_LOCRLH, 194 => sysz_insn::SYSZ_INS_STOCLH, 195 => sysz_insn::SYSZ_INS_STOCGLH, 196 => sysz_insn::SYSZ_INS_JL, 197 => sysz_insn::SYSZ_INS_JGL, 198 => sysz_insn::SYSZ_INS_LOCL, 199 => sysz_insn::SYSZ_INS_LOCGL, 200 => sysz_insn::SYSZ_INS_LOCGRL, 201 => sysz_insn::SYSZ_INS_LOCRL, 202 => sysz_insn::SYSZ_INS_LOC, 203 => sysz_insn::SYSZ_INS_LOCG, 204 => sysz_insn::SYSZ_INS_LOCGR, 205 => sysz_insn::SYSZ_INS_LOCR, 206 => sysz_insn::SYSZ_INS_STOCL, 207 => sysz_insn::SYSZ_INS_STOCGL, 208 => sysz_insn::SYSZ_INS_BNER, 209 => sysz_insn::SYSZ_INS_JNE, 210 => sysz_insn::SYSZ_INS_JGNE, 211 => sysz_insn::SYSZ_INS_LOCNE, 212 => sysz_insn::SYSZ_INS_LOCGNE, 213 => sysz_insn::SYSZ_INS_LOCGRNE, 214 => sysz_insn::SYSZ_INS_LOCRNE, 215 => sysz_insn::SYSZ_INS_STOCNE, 216 => sysz_insn::SYSZ_INS_STOCGNE, 217 => sysz_insn::SYSZ_INS_BNHR, 218 => sysz_insn::SYSZ_INS_BNHER, 219 => sysz_insn::SYSZ_INS_JNHE, 220 => sysz_insn::SYSZ_INS_JGNHE, 221 => sysz_insn::SYSZ_INS_LOCNHE, 222 => sysz_insn::SYSZ_INS_LOCGNHE, 223 => sysz_insn::SYSZ_INS_LOCGRNHE, 224 => sysz_insn::SYSZ_INS_LOCRNHE, 225 => sysz_insn::SYSZ_INS_STOCNHE, 226 => sysz_insn::SYSZ_INS_STOCGNHE, 227 => sysz_insn::SYSZ_INS_JNH, 228 => sysz_insn::SYSZ_INS_JGNH, 229 => sysz_insn::SYSZ_INS_LOCNH, 230 => sysz_insn::SYSZ_INS_LOCGNH, 231 => sysz_insn::SYSZ_INS_LOCGRNH, 232 => sysz_insn::SYSZ_INS_LOCRNH, 233 => sysz_insn::SYSZ_INS_STOCNH, 234 => sysz_insn::SYSZ_INS_STOCGNH, 235 => sysz_insn::SYSZ_INS_BNLR, 236 => sysz_insn::SYSZ_INS_BNLER, 237 => sysz_insn::SYSZ_INS_JNLE, 238 => sysz_insn::SYSZ_INS_JGNLE, 239 => sysz_insn::SYSZ_INS_LOCNLE, 240 => sysz_insn::SYSZ_INS_LOCGNLE, 241 => sysz_insn::SYSZ_INS_LOCGRNLE, 242 => sysz_insn::SYSZ_INS_LOCRNLE, 243 => sysz_insn::SYSZ_INS_STOCNLE, 244 => sysz_insn::SYSZ_INS_STOCGNLE, 245 => sysz_insn::SYSZ_INS_BNLHR, 246 => sysz_insn::SYSZ_INS_JNLH, 247 => sysz_insn::SYSZ_INS_JGNLH, 248 => sysz_insn::SYSZ_INS_LOCNLH, 249 => sysz_insn::SYSZ_INS_LOCGNLH, 250 => sysz_insn::SYSZ_INS_LOCGRNLH, 251 => sysz_insn::SYSZ_INS_LOCRNLH, 252 => sysz_insn::SYSZ_INS_STOCNLH, 253 => sysz_insn::SYSZ_INS_STOCGNLH, 254 => sysz_insn::SYSZ_INS_JNL, 255 => sysz_insn::SYSZ_INS_JGNL, 256 => sysz_insn::SYSZ_INS_LOCNL, 257 => sysz_insn::SYSZ_INS_LOCGNL, 258 => sysz_insn::SYSZ_INS_LOCGRNL, 259 => sysz_insn::SYSZ_INS_LOCRNL, 260 => sysz_insn::SYSZ_INS_STOCNL, 261 => sysz_insn::SYSZ_INS_STOCGNL, 262 => sysz_insn::SYSZ_INS_BNOR, 263 => sysz_insn::SYSZ_INS_JNO, 264 => sysz_insn::SYSZ_INS_JGNO, 265 => sysz_insn::SYSZ_INS_LOCNO, 266 => sysz_insn::SYSZ_INS_LOCGNO, 267 => sysz_insn::SYSZ_INS_LOCGRNO, 268 => sysz_insn::SYSZ_INS_LOCRNO, 269 => sysz_insn::SYSZ_INS_STOCNO, 270 => sysz_insn::SYSZ_INS_STOCGNO, 271 => sysz_insn::SYSZ_INS_BOR, 272 => sysz_insn::SYSZ_INS_JO, 273 => sysz_insn::SYSZ_INS_JGO, 274 => sysz_insn::SYSZ_INS_LOCO, 275 => sysz_insn::SYSZ_INS_LOCGO, 276 => sysz_insn::SYSZ_INS_LOCGRO, 277 => sysz_insn::SYSZ_INS_LOCRO, 278 => sysz_insn::SYSZ_INS_STOCO, 279 => sysz_insn::SYSZ_INS_STOCGO, 280 => sysz_insn::SYSZ_INS_STOC, 281 => sysz_insn::SYSZ_INS_STOCG, 282 => sysz_insn::SYSZ_INS_BASR, 283 => sysz_insn::SYSZ_INS_BR, 284 => sysz_insn::SYSZ_INS_BRAS, 285 => sysz_insn::SYSZ_INS_BRASL, 286 => sysz_insn::SYSZ_INS_J, 287 => sysz_insn::SYSZ_INS_JG, 288 => sysz_insn::SYSZ_INS_BRCT, 289 => sysz_insn::SYSZ_INS_BRCTG, 290 => sysz_insn::SYSZ_INS_C, 291 => sysz_insn::SYSZ_INS_CDB, 292 => sysz_insn::SYSZ_INS_CDBR, 293 => sysz_insn::SYSZ_INS_CDFBR, 294 => sysz_insn::SYSZ_INS_CDGBR, 295 => sysz_insn::SYSZ_INS_CDLFBR, 296 => sysz_insn::SYSZ_INS_CDLGBR, 297 => sysz_insn::SYSZ_INS_CEB, 298 => sysz_insn::SYSZ_INS_CEBR, 299 => sysz_insn::SYSZ_INS_CEFBR, 300 => sysz_insn::SYSZ_INS_CEGBR, 301 => sysz_insn::SYSZ_INS_CELFBR, 302 => sysz_insn::SYSZ_INS_CELGBR, 303 => sysz_insn::SYSZ_INS_CFDBR, 304 => sysz_insn::SYSZ_INS_CFEBR, 305 => sysz_insn::SYSZ_INS_CFI, 306 => sysz_insn::SYSZ_INS_CFXBR, 307 => sysz_insn::SYSZ_INS_CG, 308 => sysz_insn::SYSZ_INS_CGDBR, 309 => sysz_insn::SYSZ_INS_CGEBR, 310 => sysz_insn::SYSZ_INS_CGF, 311 => sysz_insn::SYSZ_INS_CGFI, 312 => sysz_insn::SYSZ_INS_CGFR, 313 => sysz_insn::SYSZ_INS_CGFRL, 314 => sysz_insn::SYSZ_INS_CGH, 315 => sysz_insn::SYSZ_INS_CGHI, 316 => sysz_insn::SYSZ_INS_CGHRL, 317 => sysz_insn::SYSZ_INS_CGHSI, 318 => sysz_insn::SYSZ_INS_CGR, 319 => sysz_insn::SYSZ_INS_CGRL, 320 => sysz_insn::SYSZ_INS_CGXBR, 321 => sysz_insn::SYSZ_INS_CH, 322 => sysz_insn::SYSZ_INS_CHF, 323 => sysz_insn::SYSZ_INS_CHHSI, 324 => sysz_insn::SYSZ_INS_CHI, 325 => sysz_insn::SYSZ_INS_CHRL, 326 => sysz_insn::SYSZ_INS_CHSI, 327 => sysz_insn::SYSZ_INS_CHY, 328 => sysz_insn::SYSZ_INS_CIH, 329 => sysz_insn::SYSZ_INS_CL, 330 => sysz_insn::SYSZ_INS_CLC, 331 => sysz_insn::SYSZ_INS_CLFDBR, 332 => sysz_insn::SYSZ_INS_CLFEBR, 333 => sysz_insn::SYSZ_INS_CLFHSI, 334 => sysz_insn::SYSZ_INS_CLFI, 335 => sysz_insn::SYSZ_INS_CLFXBR, 336 => sysz_insn::SYSZ_INS_CLG, 337 => sysz_insn::SYSZ_INS_CLGDBR, 338 => sysz_insn::SYSZ_INS_CLGEBR, 339 => sysz_insn::SYSZ_INS_CLGF, 340 => sysz_insn::SYSZ_INS_CLGFI, 341 => sysz_insn::SYSZ_INS_CLGFR, 342 => sysz_insn::SYSZ_INS_CLGFRL, 343 => sysz_insn::SYSZ_INS_CLGHRL, 344 => sysz_insn::SYSZ_INS_CLGHSI, 345 => sysz_insn::SYSZ_INS_CLGR, 346 => sysz_insn::SYSZ_INS_CLGRL, 347 => sysz_insn::SYSZ_INS_CLGXBR, 348 => sysz_insn::SYSZ_INS_CLHF, 349 => sysz_insn::SYSZ_INS_CLHHSI, 350 => sysz_insn::SYSZ_INS_CLHRL, 351 => sysz_insn::SYSZ_INS_CLI, 352 => sysz_insn::SYSZ_INS_CLIH, 353 => sysz_insn::SYSZ_INS_CLIY, 354 => sysz_insn::SYSZ_INS_CLR, 355 => sysz_insn::SYSZ_INS_CLRL, 356 => sysz_insn::SYSZ_INS_CLST, 357 => sysz_insn::SYSZ_INS_CLY, 358 => sysz_insn::SYSZ_INS_CPSDR, 359 => sysz_insn::SYSZ_INS_CR, 360 => sysz_insn::SYSZ_INS_CRL, 361 => sysz_insn::SYSZ_INS_CS, 362 => sysz_insn::SYSZ_INS_CSG, 363 => sysz_insn::SYSZ_INS_CSY, 364 => sysz_insn::SYSZ_INS_CXBR, 365 => sysz_insn::SYSZ_INS_CXFBR, 366 => sysz_insn::SYSZ_INS_CXGBR, 367 => sysz_insn::SYSZ_INS_CXLFBR, 368 => sysz_insn::SYSZ_INS_CXLGBR, 369 => sysz_insn::SYSZ_INS_CY, 370 => sysz_insn::SYSZ_INS_DDB, 371 => sysz_insn::SYSZ_INS_DDBR, 372 => sysz_insn::SYSZ_INS_DEB, 373 => sysz_insn::SYSZ_INS_DEBR, 374 => sysz_insn::SYSZ_INS_DL, 375 => sysz_insn::SYSZ_INS_DLG, 376 => sysz_insn::SYSZ_INS_DLGR, 377 => sysz_insn::SYSZ_INS_DLR, 378 => sysz_insn::SYSZ_INS_DSG, 379 => sysz_insn::SYSZ_INS_DSGF, 380 => sysz_insn::SYSZ_INS_DSGFR, 381 => sysz_insn::SYSZ_INS_DSGR, 382 => sysz_insn::SYSZ_INS_DXBR, 383 => sysz_insn::SYSZ_INS_EAR, 384 => sysz_insn::SYSZ_INS_FIDBR, 385 => sysz_insn::SYSZ_INS_FIDBRA, 386 => sysz_insn::SYSZ_INS_FIEBR, 387 => sysz_insn::SYSZ_INS_FIEBRA, 388 => sysz_insn::SYSZ_INS_FIXBR, 389 => sysz_insn::SYSZ_INS_FIXBRA, 390 => sysz_insn::SYSZ_INS_FLOGR, 391 => sysz_insn::SYSZ_INS_IC, 392 => sysz_insn::SYSZ_INS_ICY, 393 => sysz_insn::SYSZ_INS_IIHF, 394 => sysz_insn::SYSZ_INS_IIHH, 395 => sysz_insn::SYSZ_INS_IIHL, 396 => sysz_insn::SYSZ_INS_IILF, 397 => sysz_insn::SYSZ_INS_IILH, 398 => sysz_insn::SYSZ_INS_IILL, 399 => sysz_insn::SYSZ_INS_IPM, 400 => sysz_insn::SYSZ_INS_L, 401 => sysz_insn::SYSZ_INS_LA, 402 => sysz_insn::SYSZ_INS_LAA, 403 => sysz_insn::SYSZ_INS_LAAG, 404 => sysz_insn::SYSZ_INS_LAAL, 405 => sysz_insn::SYSZ_INS_LAALG, 406 => sysz_insn::SYSZ_INS_LAN, 407 => sysz_insn::SYSZ_INS_LANG, 408 => sysz_insn::SYSZ_INS_LAO, 409 => sysz_insn::SYSZ_INS_LAOG, 410 => sysz_insn::SYSZ_INS_LARL, 411 => sysz_insn::SYSZ_INS_LAX, 412 => sysz_insn::SYSZ_INS_LAXG, 413 => sysz_insn::SYSZ_INS_LAY, 414 => sysz_insn::SYSZ_INS_LB, 415 => sysz_insn::SYSZ_INS_LBH, 416 => sysz_insn::SYSZ_INS_LBR, 417 => sysz_insn::SYSZ_INS_LCDBR, 418 => sysz_insn::SYSZ_INS_LCEBR, 419 => sysz_insn::SYSZ_INS_LCGFR, 420 => sysz_insn::SYSZ_INS_LCGR, 421 => sysz_insn::SYSZ_INS_LCR, 422 => sysz_insn::SYSZ_INS_LCXBR, 423 => sysz_insn::SYSZ_INS_LD, 424 => sysz_insn::SYSZ_INS_LDEB, 425 => sysz_insn::SYSZ_INS_LDEBR, 426 => sysz_insn::SYSZ_INS_LDGR, 427 => sysz_insn::SYSZ_INS_LDR, 428 => sysz_insn::SYSZ_INS_LDXBR, 429 => sysz_insn::SYSZ_INS_LDXBRA, 430 => sysz_insn::SYSZ_INS_LDY, 431 => sysz_insn::SYSZ_INS_LE, 432 => sysz_insn::SYSZ_INS_LEDBR, 433 => sysz_insn::SYSZ_INS_LEDBRA, 434 => sysz_insn::SYSZ_INS_LER, 435 => sysz_insn::SYSZ_INS_LEXBR, 436 => sysz_insn::SYSZ_INS_LEXBRA, 437 => sysz_insn::SYSZ_INS_LEY, 438 => sysz_insn::SYSZ_INS_LFH, 439 => sysz_insn::SYSZ_INS_LG, 440 => sysz_insn::SYSZ_INS_LGB, 441 => sysz_insn::SYSZ_INS_LGBR, 442 => sysz_insn::SYSZ_INS_LGDR, 443 => sysz_insn::SYSZ_INS_LGF, 444 => sysz_insn::SYSZ_INS_LGFI, 445 => sysz_insn::SYSZ_INS_LGFR, 446 => sysz_insn::SYSZ_INS_LGFRL, 447 => sysz_insn::SYSZ_INS_LGH, 448 => sysz_insn::SYSZ_INS_LGHI, 449 => sysz_insn::SYSZ_INS_LGHR, 450 => sysz_insn::SYSZ_INS_LGHRL, 451 => sysz_insn::SYSZ_INS_LGR, 452 => sysz_insn::SYSZ_INS_LGRL, 453 => sysz_insn::SYSZ_INS_LH, 454 => sysz_insn::SYSZ_INS_LHH, 455 => sysz_insn::SYSZ_INS_LHI, 456 => sysz_insn::SYSZ_INS_LHR, 457 => sysz_insn::SYSZ_INS_LHRL, 458 => sysz_insn::SYSZ_INS_LHY, 459 => sysz_insn::SYSZ_INS_LLC, 460 => sysz_insn::SYSZ_INS_LLCH, 461 => sysz_insn::SYSZ_INS_LLCR, 462 => sysz_insn::SYSZ_INS_LLGC, 463 => sysz_insn::SYSZ_INS_LLGCR, 464 => sysz_insn::SYSZ_INS_LLGF, 465 => sysz_insn::SYSZ_INS_LLGFR, 466 => sysz_insn::SYSZ_INS_LLGFRL, 467 => sysz_insn::SYSZ_INS_LLGH, 468 => sysz_insn::SYSZ_INS_LLGHR, 469 => sysz_insn::SYSZ_INS_LLGHRL, 470 => sysz_insn::SYSZ_INS_LLH, 471 => sysz_insn::SYSZ_INS_LLHH, 472 => sysz_insn::SYSZ_INS_LLHR, 473 => sysz_insn::SYSZ_INS_LLHRL, 474 => sysz_insn::SYSZ_INS_LLIHF, 475 => sysz_insn::SYSZ_INS_LLIHH, 476 => sysz_insn::SYSZ_INS_LLIHL, 477 => sysz_insn::SYSZ_INS_LLILF, 478 => sysz_insn::SYSZ_INS_LLILH, 479 => sysz_insn::SYSZ_INS_LLILL, 480 => sysz_insn::SYSZ_INS_LMG, 481 => sysz_insn::SYSZ_INS_LNDBR, 482 => sysz_insn::SYSZ_INS_LNEBR, 483 => sysz_insn::SYSZ_INS_LNGFR, 484 => sysz_insn::SYSZ_INS_LNGR, 485 => sysz_insn::SYSZ_INS_LNR, 486 => sysz_insn::SYSZ_INS_LNXBR, 487 => sysz_insn::SYSZ_INS_LPDBR, 488 => sysz_insn::SYSZ_INS_LPEBR, 489 => sysz_insn::SYSZ_INS_LPGFR, 490 => sysz_insn::SYSZ_INS_LPGR, 491 => sysz_insn::SYSZ_INS_LPR, 492 => sysz_insn::SYSZ_INS_LPXBR, 493 => sysz_insn::SYSZ_INS_LR, 494 => sysz_insn::SYSZ_INS_LRL, 495 => sysz_insn::SYSZ_INS_LRV, 496 => sysz_insn::SYSZ_INS_LRVG, 497 => sysz_insn::SYSZ_INS_LRVGR, 498 => sysz_insn::SYSZ_INS_LRVR, 499 => sysz_insn::SYSZ_INS_LT, 500 => sysz_insn::SYSZ_INS_LTDBR, 501 => sysz_insn::SYSZ_INS_LTEBR, 502 => sysz_insn::SYSZ_INS_LTG, 503 => sysz_insn::SYSZ_INS_LTGF, 504 => sysz_insn::SYSZ_INS_LTGFR, 505 => sysz_insn::SYSZ_INS_LTGR, 506 => sysz_insn::SYSZ_INS_LTR, 507 => sysz_insn::SYSZ_INS_LTXBR, 508 => sysz_insn::SYSZ_INS_LXDB, 509 => sysz_insn::SYSZ_INS_LXDBR, 510 => sysz_insn::SYSZ_INS_LXEB, 511 => sysz_insn::SYSZ_INS_LXEBR, 512 => sysz_insn::SYSZ_INS_LXR, 513 => sysz_insn::SYSZ_INS_LY, 514 => sysz_insn::SYSZ_INS_LZDR, 515 => sysz_insn::SYSZ_INS_LZER, 516 => sysz_insn::SYSZ_INS_LZXR, 517 => sysz_insn::SYSZ_INS_MADB, 518 => sysz_insn::SYSZ_INS_MADBR, 519 => sysz_insn::SYSZ_INS_MAEB, 520 => sysz_insn::SYSZ_INS_MAEBR, 521 => sysz_insn::SYSZ_INS_MDB, 522 => sysz_insn::SYSZ_INS_MDBR, 523 => sysz_insn::SYSZ_INS_MDEB, 524 => sysz_insn::SYSZ_INS_MDEBR, 525 => sysz_insn::SYSZ_INS_MEEB, 526 => sysz_insn::SYSZ_INS_MEEBR, 527 => sysz_insn::SYSZ_INS_MGHI, 528 => sysz_insn::SYSZ_INS_MH, 529 => sysz_insn::SYSZ_INS_MHI, 530 => sysz_insn::SYSZ_INS_MHY, 531 => sysz_insn::SYSZ_INS_MLG, 532 => sysz_insn::SYSZ_INS_MLGR, 533 => sysz_insn::SYSZ_INS_MS, 534 => sysz_insn::SYSZ_INS_MSDB, 535 => sysz_insn::SYSZ_INS_MSDBR, 536 => sysz_insn::SYSZ_INS_MSEB, 537 => sysz_insn::SYSZ_INS_MSEBR, 538 => sysz_insn::SYSZ_INS_MSFI, 539 => sysz_insn::SYSZ_INS_MSG, 540 => sysz_insn::SYSZ_INS_MSGF, 541 => sysz_insn::SYSZ_INS_MSGFI, 542 => sysz_insn::SYSZ_INS_MSGFR, 543 => sysz_insn::SYSZ_INS_MSGR, 544 => sysz_insn::SYSZ_INS_MSR, 545 => sysz_insn::SYSZ_INS_MSY, 546 => sysz_insn::SYSZ_INS_MVC, 547 => sysz_insn::SYSZ_INS_MVGHI, 548 => sysz_insn::SYSZ_INS_MVHHI, 549 => sysz_insn::SYSZ_INS_MVHI, 550 => sysz_insn::SYSZ_INS_MVI, 551 => sysz_insn::SYSZ_INS_MVIY, 552 => sysz_insn::SYSZ_INS_MVST, 553 => sysz_insn::SYSZ_INS_MXBR, 554 => sysz_insn::SYSZ_INS_MXDB, 555 => sysz_insn::SYSZ_INS_MXDBR, 556 => sysz_insn::SYSZ_INS_N, 557 => sysz_insn::SYSZ_INS_NC, 558 => sysz_insn::SYSZ_INS_NG, 559 => sysz_insn::SYSZ_INS_NGR, 560 => sysz_insn::SYSZ_INS_NGRK, 561 => sysz_insn::SYSZ_INS_NI, 562 => sysz_insn::SYSZ_INS_NIHF, 563 => sysz_insn::SYSZ_INS_NIHH, 564 => sysz_insn::SYSZ_INS_NIHL, 565 => sysz_insn::SYSZ_INS_NILF, 566 => sysz_insn::SYSZ_INS_NILH, 567 => sysz_insn::SYSZ_INS_NILL, 568 => sysz_insn::SYSZ_INS_NIY, 569 => sysz_insn::SYSZ_INS_NR, 570 => sysz_insn::SYSZ_INS_NRK, 571 => sysz_insn::SYSZ_INS_NY, 572 => sysz_insn::SYSZ_INS_O, 573 => sysz_insn::SYSZ_INS_OC, 574 => sysz_insn::SYSZ_INS_OG, 575 => sysz_insn::SYSZ_INS_OGR, 576 => sysz_insn::SYSZ_INS_OGRK, 577 => sysz_insn::SYSZ_INS_OI, 578 => sysz_insn::SYSZ_INS_OIHF, 579 => sysz_insn::SYSZ_INS_OIHH, 580 => sysz_insn::SYSZ_INS_OIHL, 581 => sysz_insn::SYSZ_INS_OILF, 582 => sysz_insn::SYSZ_INS_OILH, 583 => sysz_insn::SYSZ_INS_OILL, 584 => sysz_insn::SYSZ_INS_OIY, 585 => sysz_insn::SYSZ_INS_OR, 586 => sysz_insn::SYSZ_INS_ORK, 587 => sysz_insn::SYSZ_INS_OY, 588 => sysz_insn::SYSZ_INS_PFD, 589 => sysz_insn::SYSZ_INS_PFDRL, 590 => sysz_insn::SYSZ_INS_RISBG, 591 => sysz_insn::SYSZ_INS_RISBHG, 592 => sysz_insn::SYSZ_INS_RISBLG, 593 => sysz_insn::SYSZ_INS_RLL, 594 => sysz_insn::SYSZ_INS_RLLG, 595 => sysz_insn::SYSZ_INS_RNSBG, 596 => sysz_insn::SYSZ_INS_ROSBG, 597 => sysz_insn::SYSZ_INS_RXSBG, 598 => sysz_insn::SYSZ_INS_S, 599 => sysz_insn::SYSZ_INS_SDB, 600 => sysz_insn::SYSZ_INS_SDBR, 601 => sysz_insn::SYSZ_INS_SEB, 602 => sysz_insn::SYSZ_INS_SEBR, 603 => sysz_insn::SYSZ_INS_SG, 604 => sysz_insn::SYSZ_INS_SGF, 605 => sysz_insn::SYSZ_INS_SGFR, 606 => sysz_insn::SYSZ_INS_SGR, 607 => sysz_insn::SYSZ_INS_SGRK, 608 => sysz_insn::SYSZ_INS_SH, 609 => sysz_insn::SYSZ_INS_SHY, 610 => sysz_insn::SYSZ_INS_SL, 611 => sysz_insn::SYSZ_INS_SLB, 612 => sysz_insn::SYSZ_INS_SLBG, 613 => sysz_insn::SYSZ_INS_SLBR, 614 => sysz_insn::SYSZ_INS_SLFI, 615 => sysz_insn::SYSZ_INS_SLG, 616 => sysz_insn::SYSZ_INS_SLBGR, 617 => sysz_insn::SYSZ_INS_SLGF, 618 => sysz_insn::SYSZ_INS_SLGFI, 619 => sysz_insn::SYSZ_INS_SLGFR, 620 => sysz_insn::SYSZ_INS_SLGR, 621 => sysz_insn::SYSZ_INS_SLGRK, 622 => sysz_insn::SYSZ_INS_SLL, 623 => sysz_insn::SYSZ_INS_SLLG, 624 => sysz_insn::SYSZ_INS_SLLK, 625 => sysz_insn::SYSZ_INS_SLR, 626 => sysz_insn::SYSZ_INS_SLRK, 627 => sysz_insn::SYSZ_INS_SLY, 628 => sysz_insn::SYSZ_INS_SQDB, 629 => sysz_insn::SYSZ_INS_SQDBR, 630 => sysz_insn::SYSZ_INS_SQEB, 631 => sysz_insn::SYSZ_INS_SQEBR, 632 => sysz_insn::SYSZ_INS_SQXBR, 633 => sysz_insn::SYSZ_INS_SR, 634 => sysz_insn::SYSZ_INS_SRA, 635 => sysz_insn::SYSZ_INS_SRAG, 636 => sysz_insn::SYSZ_INS_SRAK, 637 => sysz_insn::SYSZ_INS_SRK, 638 => sysz_insn::SYSZ_INS_SRL, 639 => sysz_insn::SYSZ_INS_SRLG, 640 => sysz_insn::SYSZ_INS_SRLK, 641 => sysz_insn::SYSZ_INS_SRST, 642 => sysz_insn::SYSZ_INS_ST, 643 => sysz_insn::SYSZ_INS_STC, 644 => sysz_insn::SYSZ_INS_STCH, 645 => sysz_insn::SYSZ_INS_STCY, 646 => sysz_insn::SYSZ_INS_STD, 647 => sysz_insn::SYSZ_INS_STDY, 648 => sysz_insn::SYSZ_INS_STE, 649 => sysz_insn::SYSZ_INS_STEY, 650 => sysz_insn::SYSZ_INS_STFH, 651 => sysz_insn::SYSZ_INS_STG, 652 => sysz_insn::SYSZ_INS_STGRL, 653 => sysz_insn::SYSZ_INS_STH, 654 => sysz_insn::SYSZ_INS_STHH, 655 => sysz_insn::SYSZ_INS_STHRL, 656 => sysz_insn::SYSZ_INS_STHY, 657 => sysz_insn::SYSZ_INS_STMG, 658 => sysz_insn::SYSZ_INS_STRL, 659 => sysz_insn::SYSZ_INS_STRV, 660 => sysz_insn::SYSZ_INS_STRVG, 661 => sysz_insn::SYSZ_INS_STY, 662 => sysz_insn::SYSZ_INS_SXBR, 663 => sysz_insn::SYSZ_INS_SY, 664 => sysz_insn::SYSZ_INS_TM, 665 => sysz_insn::SYSZ_INS_TMHH, 666 => sysz_insn::SYSZ_INS_TMHL, 667 => sysz_insn::SYSZ_INS_TMLH, 668 => sysz_insn::SYSZ_INS_TMLL, 669 => sysz_insn::SYSZ_INS_TMY, 670 => sysz_insn::SYSZ_INS_X, 671 => sysz_insn::SYSZ_INS_XC, 672 => sysz_insn::SYSZ_INS_XG, 673 => sysz_insn::SYSZ_INS_XGR, 674 => sysz_insn::SYSZ_INS_XGRK, 675 => sysz_insn::SYSZ_INS_XI, 676 => sysz_insn::SYSZ_INS_XIHF, 677 => sysz_insn::SYSZ_INS_XILF, 678 => sysz_insn::SYSZ_INS_XIY, 679 => sysz_insn::SYSZ_INS_XR, 680 => sysz_insn::SYSZ_INS_XRK, 681 => sysz_insn::SYSZ_INS_XY, 682 => sysz_insn::SYSZ_INS_ENDING, _ => sysz_insn::SYSZ_INS_INVALID, } } } impl From for tms320c64x_insn { fn from(id: u32) -> Self { match id { 0 => tms320c64x_insn::TMS320C64X_INS_INVALID, 1 => tms320c64x_insn::TMS320C64X_INS_ABS, 2 => tms320c64x_insn::TMS320C64X_INS_ABS2, 3 => tms320c64x_insn::TMS320C64X_INS_ADD, 4 => tms320c64x_insn::TMS320C64X_INS_ADD2, 5 => tms320c64x_insn::TMS320C64X_INS_ADD4, 6 => tms320c64x_insn::TMS320C64X_INS_ADDAB, 7 => tms320c64x_insn::TMS320C64X_INS_ADDAD, 8 => tms320c64x_insn::TMS320C64X_INS_ADDAH, 9 => tms320c64x_insn::TMS320C64X_INS_ADDAW, 10 => tms320c64x_insn::TMS320C64X_INS_ADDK, 11 => tms320c64x_insn::TMS320C64X_INS_ADDKPC, 12 => tms320c64x_insn::TMS320C64X_INS_ADDU, 13 => tms320c64x_insn::TMS320C64X_INS_AND, 14 => tms320c64x_insn::TMS320C64X_INS_ANDN, 15 => tms320c64x_insn::TMS320C64X_INS_AVG2, 16 => tms320c64x_insn::TMS320C64X_INS_AVGU4, 17 => tms320c64x_insn::TMS320C64X_INS_B, 18 => tms320c64x_insn::TMS320C64X_INS_BDEC, 19 => tms320c64x_insn::TMS320C64X_INS_BITC4, 20 => tms320c64x_insn::TMS320C64X_INS_BNOP, 21 => tms320c64x_insn::TMS320C64X_INS_BPOS, 22 => tms320c64x_insn::TMS320C64X_INS_CLR, 23 => tms320c64x_insn::TMS320C64X_INS_CMPEQ, 24 => tms320c64x_insn::TMS320C64X_INS_CMPEQ2, 25 => tms320c64x_insn::TMS320C64X_INS_CMPEQ4, 26 => tms320c64x_insn::TMS320C64X_INS_CMPGT, 27 => tms320c64x_insn::TMS320C64X_INS_CMPGT2, 28 => tms320c64x_insn::TMS320C64X_INS_CMPGTU4, 29 => tms320c64x_insn::TMS320C64X_INS_CMPLT, 30 => tms320c64x_insn::TMS320C64X_INS_CMPLTU, 31 => tms320c64x_insn::TMS320C64X_INS_DEAL, 32 => tms320c64x_insn::TMS320C64X_INS_DOTP2, 33 => tms320c64x_insn::TMS320C64X_INS_DOTPN2, 34 => tms320c64x_insn::TMS320C64X_INS_DOTPNRSU2, 35 => tms320c64x_insn::TMS320C64X_INS_DOTPRSU2, 36 => tms320c64x_insn::TMS320C64X_INS_DOTPSU4, 37 => tms320c64x_insn::TMS320C64X_INS_DOTPU4, 38 => tms320c64x_insn::TMS320C64X_INS_EXT, 39 => tms320c64x_insn::TMS320C64X_INS_EXTU, 40 => tms320c64x_insn::TMS320C64X_INS_GMPGTU, 41 => tms320c64x_insn::TMS320C64X_INS_GMPY4, 42 => tms320c64x_insn::TMS320C64X_INS_LDB, 43 => tms320c64x_insn::TMS320C64X_INS_LDBU, 44 => tms320c64x_insn::TMS320C64X_INS_LDDW, 45 => tms320c64x_insn::TMS320C64X_INS_LDH, 46 => tms320c64x_insn::TMS320C64X_INS_LDHU, 47 => tms320c64x_insn::TMS320C64X_INS_LDNDW, 48 => tms320c64x_insn::TMS320C64X_INS_LDNW, 49 => tms320c64x_insn::TMS320C64X_INS_LDW, 50 => tms320c64x_insn::TMS320C64X_INS_LMBD, 51 => tms320c64x_insn::TMS320C64X_INS_MAX2, 52 => tms320c64x_insn::TMS320C64X_INS_MAXU4, 53 => tms320c64x_insn::TMS320C64X_INS_MIN2, 54 => tms320c64x_insn::TMS320C64X_INS_MINU4, 55 => tms320c64x_insn::TMS320C64X_INS_MPY, 56 => tms320c64x_insn::TMS320C64X_INS_MPY2, 57 => tms320c64x_insn::TMS320C64X_INS_MPYH, 58 => tms320c64x_insn::TMS320C64X_INS_MPYHI, 59 => tms320c64x_insn::TMS320C64X_INS_MPYHIR, 60 => tms320c64x_insn::TMS320C64X_INS_MPYHL, 61 => tms320c64x_insn::TMS320C64X_INS_MPYHLU, 62 => tms320c64x_insn::TMS320C64X_INS_MPYHSLU, 63 => tms320c64x_insn::TMS320C64X_INS_MPYHSU, 64 => tms320c64x_insn::TMS320C64X_INS_MPYHU, 65 => tms320c64x_insn::TMS320C64X_INS_MPYHULS, 66 => tms320c64x_insn::TMS320C64X_INS_MPYHUS, 67 => tms320c64x_insn::TMS320C64X_INS_MPYLH, 68 => tms320c64x_insn::TMS320C64X_INS_MPYLHU, 69 => tms320c64x_insn::TMS320C64X_INS_MPYLI, 70 => tms320c64x_insn::TMS320C64X_INS_MPYLIR, 71 => tms320c64x_insn::TMS320C64X_INS_MPYLSHU, 72 => tms320c64x_insn::TMS320C64X_INS_MPYLUHS, 73 => tms320c64x_insn::TMS320C64X_INS_MPYSU, 74 => tms320c64x_insn::TMS320C64X_INS_MPYSU4, 75 => tms320c64x_insn::TMS320C64X_INS_MPYU, 76 => tms320c64x_insn::TMS320C64X_INS_MPYU4, 77 => tms320c64x_insn::TMS320C64X_INS_MPYUS, 78 => tms320c64x_insn::TMS320C64X_INS_MVC, 79 => tms320c64x_insn::TMS320C64X_INS_MVD, 80 => tms320c64x_insn::TMS320C64X_INS_MVK, 81 => tms320c64x_insn::TMS320C64X_INS_MVKL, 82 => tms320c64x_insn::TMS320C64X_INS_MVKLH, 83 => tms320c64x_insn::TMS320C64X_INS_NOP, 84 => tms320c64x_insn::TMS320C64X_INS_NORM, 85 => tms320c64x_insn::TMS320C64X_INS_OR, 86 => tms320c64x_insn::TMS320C64X_INS_PACK2, 87 => tms320c64x_insn::TMS320C64X_INS_PACKH2, 88 => tms320c64x_insn::TMS320C64X_INS_PACKH4, 89 => tms320c64x_insn::TMS320C64X_INS_PACKHL2, 90 => tms320c64x_insn::TMS320C64X_INS_PACKL4, 91 => tms320c64x_insn::TMS320C64X_INS_PACKLH2, 92 => tms320c64x_insn::TMS320C64X_INS_ROTL, 93 => tms320c64x_insn::TMS320C64X_INS_SADD, 94 => tms320c64x_insn::TMS320C64X_INS_SADD2, 95 => tms320c64x_insn::TMS320C64X_INS_SADDU4, 96 => tms320c64x_insn::TMS320C64X_INS_SADDUS2, 97 => tms320c64x_insn::TMS320C64X_INS_SAT, 98 => tms320c64x_insn::TMS320C64X_INS_SET, 99 => tms320c64x_insn::TMS320C64X_INS_SHFL, 100 => tms320c64x_insn::TMS320C64X_INS_SHL, 101 => tms320c64x_insn::TMS320C64X_INS_SHLMB, 102 => tms320c64x_insn::TMS320C64X_INS_SHR, 103 => tms320c64x_insn::TMS320C64X_INS_SHR2, 104 => tms320c64x_insn::TMS320C64X_INS_SHRMB, 105 => tms320c64x_insn::TMS320C64X_INS_SHRU, 106 => tms320c64x_insn::TMS320C64X_INS_SHRU2, 107 => tms320c64x_insn::TMS320C64X_INS_SMPY, 108 => tms320c64x_insn::TMS320C64X_INS_SMPY2, 109 => tms320c64x_insn::TMS320C64X_INS_SMPYH, 110 => tms320c64x_insn::TMS320C64X_INS_SMPYHL, 111 => tms320c64x_insn::TMS320C64X_INS_SMPYLH, 112 => tms320c64x_insn::TMS320C64X_INS_SPACK2, 113 => tms320c64x_insn::TMS320C64X_INS_SPACKU4, 114 => tms320c64x_insn::TMS320C64X_INS_SSHL, 115 => tms320c64x_insn::TMS320C64X_INS_SSHVL, 116 => tms320c64x_insn::TMS320C64X_INS_SSHVR, 117 => tms320c64x_insn::TMS320C64X_INS_SSUB, 118 => tms320c64x_insn::TMS320C64X_INS_STB, 119 => tms320c64x_insn::TMS320C64X_INS_STDW, 120 => tms320c64x_insn::TMS320C64X_INS_STH, 121 => tms320c64x_insn::TMS320C64X_INS_STNDW, 122 => tms320c64x_insn::TMS320C64X_INS_STNW, 123 => tms320c64x_insn::TMS320C64X_INS_STW, 124 => tms320c64x_insn::TMS320C64X_INS_SUB, 125 => tms320c64x_insn::TMS320C64X_INS_SUB2, 126 => tms320c64x_insn::TMS320C64X_INS_SUB4, 127 => tms320c64x_insn::TMS320C64X_INS_SUBAB, 128 => tms320c64x_insn::TMS320C64X_INS_SUBABS4, 129 => tms320c64x_insn::TMS320C64X_INS_SUBAH, 130 => tms320c64x_insn::TMS320C64X_INS_SUBAW, 131 => tms320c64x_insn::TMS320C64X_INS_SUBC, 132 => tms320c64x_insn::TMS320C64X_INS_SUBU, 133 => tms320c64x_insn::TMS320C64X_INS_SWAP4, 134 => tms320c64x_insn::TMS320C64X_INS_UNPKHU4, 135 => tms320c64x_insn::TMS320C64X_INS_UNPKLU4, 136 => tms320c64x_insn::TMS320C64X_INS_XOR, 137 => tms320c64x_insn::TMS320C64X_INS_XPND2, 138 => tms320c64x_insn::TMS320C64X_INS_XPND4, 139 => tms320c64x_insn::TMS320C64X_INS_IDLE, 140 => tms320c64x_insn::TMS320C64X_INS_MV, 141 => tms320c64x_insn::TMS320C64X_INS_NEG, 142 => tms320c64x_insn::TMS320C64X_INS_NOT, 143 => tms320c64x_insn::TMS320C64X_INS_SWAP2, 144 => tms320c64x_insn::TMS320C64X_INS_ZERO, 145 => tms320c64x_insn::TMS320C64X_INS_ENDING, _ => tms320c64x_insn::TMS320C64X_INS_INVALID, } } } impl From for x86_insn { fn from(id: u32) -> Self { match id { 0 => x86_insn::X86_INS_INVALID, 1 => x86_insn::X86_INS_AAA, 2 => x86_insn::X86_INS_AAD, 3 => x86_insn::X86_INS_AAM, 4 => x86_insn::X86_INS_AAS, 5 => x86_insn::X86_INS_FABS, 6 => x86_insn::X86_INS_ADC, 7 => x86_insn::X86_INS_ADCX, 8 => x86_insn::X86_INS_ADD, 9 => x86_insn::X86_INS_ADDPD, 10 => x86_insn::X86_INS_ADDPS, 11 => x86_insn::X86_INS_ADDSD, 12 => x86_insn::X86_INS_ADDSS, 13 => x86_insn::X86_INS_ADDSUBPD, 14 => x86_insn::X86_INS_ADDSUBPS, 15 => x86_insn::X86_INS_FADD, 16 => x86_insn::X86_INS_FIADD, 17 => x86_insn::X86_INS_FADDP, 18 => x86_insn::X86_INS_ADOX, 19 => x86_insn::X86_INS_AESDECLAST, 20 => x86_insn::X86_INS_AESDEC, 21 => x86_insn::X86_INS_AESENCLAST, 22 => x86_insn::X86_INS_AESENC, 23 => x86_insn::X86_INS_AESIMC, 24 => x86_insn::X86_INS_AESKEYGENASSIST, 25 => x86_insn::X86_INS_AND, 26 => x86_insn::X86_INS_ANDN, 27 => x86_insn::X86_INS_ANDNPD, 28 => x86_insn::X86_INS_ANDNPS, 29 => x86_insn::X86_INS_ANDPD, 30 => x86_insn::X86_INS_ANDPS, 31 => x86_insn::X86_INS_ARPL, 32 => x86_insn::X86_INS_BEXTR, 33 => x86_insn::X86_INS_BLCFILL, 34 => x86_insn::X86_INS_BLCI, 35 => x86_insn::X86_INS_BLCIC, 36 => x86_insn::X86_INS_BLCMSK, 37 => x86_insn::X86_INS_BLCS, 38 => x86_insn::X86_INS_BLENDPD, 39 => x86_insn::X86_INS_BLENDPS, 40 => x86_insn::X86_INS_BLENDVPD, 41 => x86_insn::X86_INS_BLENDVPS, 42 => x86_insn::X86_INS_BLSFILL, 43 => x86_insn::X86_INS_BLSI, 44 => x86_insn::X86_INS_BLSIC, 45 => x86_insn::X86_INS_BLSMSK, 46 => x86_insn::X86_INS_BLSR, 47 => x86_insn::X86_INS_BOUND, 48 => x86_insn::X86_INS_BSF, 49 => x86_insn::X86_INS_BSR, 50 => x86_insn::X86_INS_BSWAP, 51 => x86_insn::X86_INS_BT, 52 => x86_insn::X86_INS_BTC, 53 => x86_insn::X86_INS_BTR, 54 => x86_insn::X86_INS_BTS, 55 => x86_insn::X86_INS_BZHI, 56 => x86_insn::X86_INS_CALL, 57 => x86_insn::X86_INS_CBW, 58 => x86_insn::X86_INS_CDQ, 59 => x86_insn::X86_INS_CDQE, 60 => x86_insn::X86_INS_FCHS, 61 => x86_insn::X86_INS_CLAC, 62 => x86_insn::X86_INS_CLC, 63 => x86_insn::X86_INS_CLD, 64 => x86_insn::X86_INS_CLFLUSH, 65 => x86_insn::X86_INS_CLFLUSHOPT, 66 => x86_insn::X86_INS_CLGI, 67 => x86_insn::X86_INS_CLI, 68 => x86_insn::X86_INS_CLTS, 69 => x86_insn::X86_INS_CLWB, 70 => x86_insn::X86_INS_CMC, 71 => x86_insn::X86_INS_CMOVA, 72 => x86_insn::X86_INS_CMOVAE, 73 => x86_insn::X86_INS_CMOVB, 74 => x86_insn::X86_INS_CMOVBE, 75 => x86_insn::X86_INS_FCMOVBE, 76 => x86_insn::X86_INS_FCMOVB, 77 => x86_insn::X86_INS_CMOVE, 78 => x86_insn::X86_INS_FCMOVE, 79 => x86_insn::X86_INS_CMOVG, 80 => x86_insn::X86_INS_CMOVGE, 81 => x86_insn::X86_INS_CMOVL, 82 => x86_insn::X86_INS_CMOVLE, 83 => x86_insn::X86_INS_FCMOVNBE, 84 => x86_insn::X86_INS_FCMOVNB, 85 => x86_insn::X86_INS_CMOVNE, 86 => x86_insn::X86_INS_FCMOVNE, 87 => x86_insn::X86_INS_CMOVNO, 88 => x86_insn::X86_INS_CMOVNP, 89 => x86_insn::X86_INS_FCMOVNU, 90 => x86_insn::X86_INS_CMOVNS, 91 => x86_insn::X86_INS_CMOVO, 92 => x86_insn::X86_INS_CMOVP, 93 => x86_insn::X86_INS_FCMOVU, 94 => x86_insn::X86_INS_CMOVS, 95 => x86_insn::X86_INS_CMP, 96 => x86_insn::X86_INS_CMPSB, 97 => x86_insn::X86_INS_CMPSQ, 98 => x86_insn::X86_INS_CMPSW, 99 => x86_insn::X86_INS_CMPXCHG16B, 100 => x86_insn::X86_INS_CMPXCHG, 101 => x86_insn::X86_INS_CMPXCHG8B, 102 => x86_insn::X86_INS_COMISD, 103 => x86_insn::X86_INS_COMISS, 104 => x86_insn::X86_INS_FCOMP, 105 => x86_insn::X86_INS_FCOMIP, 106 => x86_insn::X86_INS_FCOMI, 107 => x86_insn::X86_INS_FCOM, 108 => x86_insn::X86_INS_FCOS, 109 => x86_insn::X86_INS_CPUID, 110 => x86_insn::X86_INS_CQO, 111 => x86_insn::X86_INS_CRC32, 112 => x86_insn::X86_INS_CVTDQ2PD, 113 => x86_insn::X86_INS_CVTDQ2PS, 114 => x86_insn::X86_INS_CVTPD2DQ, 115 => x86_insn::X86_INS_CVTPD2PS, 116 => x86_insn::X86_INS_CVTPS2DQ, 117 => x86_insn::X86_INS_CVTPS2PD, 118 => x86_insn::X86_INS_CVTSD2SI, 119 => x86_insn::X86_INS_CVTSD2SS, 120 => x86_insn::X86_INS_CVTSI2SD, 121 => x86_insn::X86_INS_CVTSI2SS, 122 => x86_insn::X86_INS_CVTSS2SD, 123 => x86_insn::X86_INS_CVTSS2SI, 124 => x86_insn::X86_INS_CVTTPD2DQ, 125 => x86_insn::X86_INS_CVTTPS2DQ, 126 => x86_insn::X86_INS_CVTTSD2SI, 127 => x86_insn::X86_INS_CVTTSS2SI, 128 => x86_insn::X86_INS_CWD, 129 => x86_insn::X86_INS_CWDE, 130 => x86_insn::X86_INS_DAA, 131 => x86_insn::X86_INS_DAS, 132 => x86_insn::X86_INS_DATA16, 133 => x86_insn::X86_INS_DEC, 134 => x86_insn::X86_INS_DIV, 135 => x86_insn::X86_INS_DIVPD, 136 => x86_insn::X86_INS_DIVPS, 137 => x86_insn::X86_INS_FDIVR, 138 => x86_insn::X86_INS_FIDIVR, 139 => x86_insn::X86_INS_FDIVRP, 140 => x86_insn::X86_INS_DIVSD, 141 => x86_insn::X86_INS_DIVSS, 142 => x86_insn::X86_INS_FDIV, 143 => x86_insn::X86_INS_FIDIV, 144 => x86_insn::X86_INS_FDIVP, 145 => x86_insn::X86_INS_DPPD, 146 => x86_insn::X86_INS_DPPS, 147 => x86_insn::X86_INS_RET, 148 => x86_insn::X86_INS_ENCLS, 149 => x86_insn::X86_INS_ENCLU, 150 => x86_insn::X86_INS_ENTER, 151 => x86_insn::X86_INS_EXTRACTPS, 152 => x86_insn::X86_INS_EXTRQ, 153 => x86_insn::X86_INS_F2XM1, 154 => x86_insn::X86_INS_LCALL, 155 => x86_insn::X86_INS_LJMP, 156 => x86_insn::X86_INS_FBLD, 157 => x86_insn::X86_INS_FBSTP, 158 => x86_insn::X86_INS_FCOMPP, 159 => x86_insn::X86_INS_FDECSTP, 160 => x86_insn::X86_INS_FEMMS, 161 => x86_insn::X86_INS_FFREE, 162 => x86_insn::X86_INS_FICOM, 163 => x86_insn::X86_INS_FICOMP, 164 => x86_insn::X86_INS_FINCSTP, 165 => x86_insn::X86_INS_FLDCW, 166 => x86_insn::X86_INS_FLDENV, 167 => x86_insn::X86_INS_FLDL2E, 168 => x86_insn::X86_INS_FLDL2T, 169 => x86_insn::X86_INS_FLDLG2, 170 => x86_insn::X86_INS_FLDLN2, 171 => x86_insn::X86_INS_FLDPI, 172 => x86_insn::X86_INS_FNCLEX, 173 => x86_insn::X86_INS_FNINIT, 174 => x86_insn::X86_INS_FNOP, 175 => x86_insn::X86_INS_FNSTCW, 176 => x86_insn::X86_INS_FNSTSW, 177 => x86_insn::X86_INS_FPATAN, 178 => x86_insn::X86_INS_FPREM, 179 => x86_insn::X86_INS_FPREM1, 180 => x86_insn::X86_INS_FPTAN, 181 => x86_insn::X86_INS_FFREEP, 182 => x86_insn::X86_INS_FRNDINT, 183 => x86_insn::X86_INS_FRSTOR, 184 => x86_insn::X86_INS_FNSAVE, 185 => x86_insn::X86_INS_FSCALE, 186 => x86_insn::X86_INS_FSETPM, 187 => x86_insn::X86_INS_FSINCOS, 188 => x86_insn::X86_INS_FNSTENV, 189 => x86_insn::X86_INS_FXAM, 190 => x86_insn::X86_INS_FXRSTOR, 191 => x86_insn::X86_INS_FXRSTOR64, 192 => x86_insn::X86_INS_FXSAVE, 193 => x86_insn::X86_INS_FXSAVE64, 194 => x86_insn::X86_INS_FXTRACT, 195 => x86_insn::X86_INS_FYL2X, 196 => x86_insn::X86_INS_FYL2XP1, 197 => x86_insn::X86_INS_MOVAPD, 198 => x86_insn::X86_INS_MOVAPS, 199 => x86_insn::X86_INS_ORPD, 200 => x86_insn::X86_INS_ORPS, 201 => x86_insn::X86_INS_VMOVAPD, 202 => x86_insn::X86_INS_VMOVAPS, 203 => x86_insn::X86_INS_XORPD, 204 => x86_insn::X86_INS_XORPS, 205 => x86_insn::X86_INS_GETSEC, 206 => x86_insn::X86_INS_HADDPD, 207 => x86_insn::X86_INS_HADDPS, 208 => x86_insn::X86_INS_HLT, 209 => x86_insn::X86_INS_HSUBPD, 210 => x86_insn::X86_INS_HSUBPS, 211 => x86_insn::X86_INS_IDIV, 212 => x86_insn::X86_INS_FILD, 213 => x86_insn::X86_INS_IMUL, 214 => x86_insn::X86_INS_IN, 215 => x86_insn::X86_INS_INC, 216 => x86_insn::X86_INS_INSB, 217 => x86_insn::X86_INS_INSERTPS, 218 => x86_insn::X86_INS_INSERTQ, 219 => x86_insn::X86_INS_INSD, 220 => x86_insn::X86_INS_INSW, 221 => x86_insn::X86_INS_INT, 222 => x86_insn::X86_INS_INT1, 223 => x86_insn::X86_INS_INT3, 224 => x86_insn::X86_INS_INTO, 225 => x86_insn::X86_INS_INVD, 226 => x86_insn::X86_INS_INVEPT, 227 => x86_insn::X86_INS_INVLPG, 228 => x86_insn::X86_INS_INVLPGA, 229 => x86_insn::X86_INS_INVPCID, 230 => x86_insn::X86_INS_INVVPID, 231 => x86_insn::X86_INS_IRET, 232 => x86_insn::X86_INS_IRETD, 233 => x86_insn::X86_INS_IRETQ, 234 => x86_insn::X86_INS_FISTTP, 235 => x86_insn::X86_INS_FIST, 236 => x86_insn::X86_INS_FISTP, 237 => x86_insn::X86_INS_UCOMISD, 238 => x86_insn::X86_INS_UCOMISS, 239 => x86_insn::X86_INS_VCOMISD, 240 => x86_insn::X86_INS_VCOMISS, 241 => x86_insn::X86_INS_VCVTSD2SS, 242 => x86_insn::X86_INS_VCVTSI2SD, 243 => x86_insn::X86_INS_VCVTSI2SS, 244 => x86_insn::X86_INS_VCVTSS2SD, 245 => x86_insn::X86_INS_VCVTTSD2SI, 246 => x86_insn::X86_INS_VCVTTSD2USI, 247 => x86_insn::X86_INS_VCVTTSS2SI, 248 => x86_insn::X86_INS_VCVTTSS2USI, 249 => x86_insn::X86_INS_VCVTUSI2SD, 250 => x86_insn::X86_INS_VCVTUSI2SS, 251 => x86_insn::X86_INS_VUCOMISD, 252 => x86_insn::X86_INS_VUCOMISS, 253 => x86_insn::X86_INS_JAE, 254 => x86_insn::X86_INS_JA, 255 => x86_insn::X86_INS_JBE, 256 => x86_insn::X86_INS_JB, 257 => x86_insn::X86_INS_JCXZ, 258 => x86_insn::X86_INS_JECXZ, 259 => x86_insn::X86_INS_JE, 260 => x86_insn::X86_INS_JGE, 261 => x86_insn::X86_INS_JG, 262 => x86_insn::X86_INS_JLE, 263 => x86_insn::X86_INS_JL, 264 => x86_insn::X86_INS_JMP, 265 => x86_insn::X86_INS_JNE, 266 => x86_insn::X86_INS_JNO, 267 => x86_insn::X86_INS_JNP, 268 => x86_insn::X86_INS_JNS, 269 => x86_insn::X86_INS_JO, 270 => x86_insn::X86_INS_JP, 271 => x86_insn::X86_INS_JRCXZ, 272 => x86_insn::X86_INS_JS, 273 => x86_insn::X86_INS_KANDB, 274 => x86_insn::X86_INS_KANDD, 275 => x86_insn::X86_INS_KANDNB, 276 => x86_insn::X86_INS_KANDND, 277 => x86_insn::X86_INS_KANDNQ, 278 => x86_insn::X86_INS_KANDNW, 279 => x86_insn::X86_INS_KANDQ, 280 => x86_insn::X86_INS_KANDW, 281 => x86_insn::X86_INS_KMOVB, 282 => x86_insn::X86_INS_KMOVD, 283 => x86_insn::X86_INS_KMOVQ, 284 => x86_insn::X86_INS_KMOVW, 285 => x86_insn::X86_INS_KNOTB, 286 => x86_insn::X86_INS_KNOTD, 287 => x86_insn::X86_INS_KNOTQ, 288 => x86_insn::X86_INS_KNOTW, 289 => x86_insn::X86_INS_KORB, 290 => x86_insn::X86_INS_KORD, 291 => x86_insn::X86_INS_KORQ, 292 => x86_insn::X86_INS_KORTESTB, 293 => x86_insn::X86_INS_KORTESTD, 294 => x86_insn::X86_INS_KORTESTQ, 295 => x86_insn::X86_INS_KORTESTW, 296 => x86_insn::X86_INS_KORW, 297 => x86_insn::X86_INS_KSHIFTLB, 298 => x86_insn::X86_INS_KSHIFTLD, 299 => x86_insn::X86_INS_KSHIFTLQ, 300 => x86_insn::X86_INS_KSHIFTLW, 301 => x86_insn::X86_INS_KSHIFTRB, 302 => x86_insn::X86_INS_KSHIFTRD, 303 => x86_insn::X86_INS_KSHIFTRQ, 304 => x86_insn::X86_INS_KSHIFTRW, 305 => x86_insn::X86_INS_KUNPCKBW, 306 => x86_insn::X86_INS_KXNORB, 307 => x86_insn::X86_INS_KXNORD, 308 => x86_insn::X86_INS_KXNORQ, 309 => x86_insn::X86_INS_KXNORW, 310 => x86_insn::X86_INS_KXORB, 311 => x86_insn::X86_INS_KXORD, 312 => x86_insn::X86_INS_KXORQ, 313 => x86_insn::X86_INS_KXORW, 314 => x86_insn::X86_INS_LAHF, 315 => x86_insn::X86_INS_LAR, 316 => x86_insn::X86_INS_LDDQU, 317 => x86_insn::X86_INS_LDMXCSR, 318 => x86_insn::X86_INS_LDS, 319 => x86_insn::X86_INS_FLDZ, 320 => x86_insn::X86_INS_FLD1, 321 => x86_insn::X86_INS_FLD, 322 => x86_insn::X86_INS_LEA, 323 => x86_insn::X86_INS_LEAVE, 324 => x86_insn::X86_INS_LES, 325 => x86_insn::X86_INS_LFENCE, 326 => x86_insn::X86_INS_LFS, 327 => x86_insn::X86_INS_LGDT, 328 => x86_insn::X86_INS_LGS, 329 => x86_insn::X86_INS_LIDT, 330 => x86_insn::X86_INS_LLDT, 331 => x86_insn::X86_INS_LMSW, 332 => x86_insn::X86_INS_OR, 333 => x86_insn::X86_INS_SUB, 334 => x86_insn::X86_INS_XOR, 335 => x86_insn::X86_INS_LODSB, 336 => x86_insn::X86_INS_LODSD, 337 => x86_insn::X86_INS_LODSQ, 338 => x86_insn::X86_INS_LODSW, 339 => x86_insn::X86_INS_LOOP, 340 => x86_insn::X86_INS_LOOPE, 341 => x86_insn::X86_INS_LOOPNE, 342 => x86_insn::X86_INS_RETF, 343 => x86_insn::X86_INS_RETFQ, 344 => x86_insn::X86_INS_LSL, 345 => x86_insn::X86_INS_LSS, 346 => x86_insn::X86_INS_LTR, 347 => x86_insn::X86_INS_XADD, 348 => x86_insn::X86_INS_LZCNT, 349 => x86_insn::X86_INS_MASKMOVDQU, 350 => x86_insn::X86_INS_MAXPD, 351 => x86_insn::X86_INS_MAXPS, 352 => x86_insn::X86_INS_MAXSD, 353 => x86_insn::X86_INS_MAXSS, 354 => x86_insn::X86_INS_MFENCE, 355 => x86_insn::X86_INS_MINPD, 356 => x86_insn::X86_INS_MINPS, 357 => x86_insn::X86_INS_MINSD, 358 => x86_insn::X86_INS_MINSS, 359 => x86_insn::X86_INS_CVTPD2PI, 360 => x86_insn::X86_INS_CVTPI2PD, 361 => x86_insn::X86_INS_CVTPI2PS, 362 => x86_insn::X86_INS_CVTPS2PI, 363 => x86_insn::X86_INS_CVTTPD2PI, 364 => x86_insn::X86_INS_CVTTPS2PI, 365 => x86_insn::X86_INS_EMMS, 366 => x86_insn::X86_INS_MASKMOVQ, 367 => x86_insn::X86_INS_MOVD, 368 => x86_insn::X86_INS_MOVDQ2Q, 369 => x86_insn::X86_INS_MOVNTQ, 370 => x86_insn::X86_INS_MOVQ2DQ, 371 => x86_insn::X86_INS_MOVQ, 372 => x86_insn::X86_INS_PABSB, 373 => x86_insn::X86_INS_PABSD, 374 => x86_insn::X86_INS_PABSW, 375 => x86_insn::X86_INS_PACKSSDW, 376 => x86_insn::X86_INS_PACKSSWB, 377 => x86_insn::X86_INS_PACKUSWB, 378 => x86_insn::X86_INS_PADDB, 379 => x86_insn::X86_INS_PADDD, 380 => x86_insn::X86_INS_PADDQ, 381 => x86_insn::X86_INS_PADDSB, 382 => x86_insn::X86_INS_PADDSW, 383 => x86_insn::X86_INS_PADDUSB, 384 => x86_insn::X86_INS_PADDUSW, 385 => x86_insn::X86_INS_PADDW, 386 => x86_insn::X86_INS_PALIGNR, 387 => x86_insn::X86_INS_PANDN, 388 => x86_insn::X86_INS_PAND, 389 => x86_insn::X86_INS_PAVGB, 390 => x86_insn::X86_INS_PAVGW, 391 => x86_insn::X86_INS_PCMPEQB, 392 => x86_insn::X86_INS_PCMPEQD, 393 => x86_insn::X86_INS_PCMPEQW, 394 => x86_insn::X86_INS_PCMPGTB, 395 => x86_insn::X86_INS_PCMPGTD, 396 => x86_insn::X86_INS_PCMPGTW, 397 => x86_insn::X86_INS_PEXTRW, 398 => x86_insn::X86_INS_PHADDSW, 399 => x86_insn::X86_INS_PHADDW, 400 => x86_insn::X86_INS_PHADDD, 401 => x86_insn::X86_INS_PHSUBD, 402 => x86_insn::X86_INS_PHSUBSW, 403 => x86_insn::X86_INS_PHSUBW, 404 => x86_insn::X86_INS_PINSRW, 405 => x86_insn::X86_INS_PMADDUBSW, 406 => x86_insn::X86_INS_PMADDWD, 407 => x86_insn::X86_INS_PMAXSW, 408 => x86_insn::X86_INS_PMAXUB, 409 => x86_insn::X86_INS_PMINSW, 410 => x86_insn::X86_INS_PMINUB, 411 => x86_insn::X86_INS_PMOVMSKB, 412 => x86_insn::X86_INS_PMULHRSW, 413 => x86_insn::X86_INS_PMULHUW, 414 => x86_insn::X86_INS_PMULHW, 415 => x86_insn::X86_INS_PMULLW, 416 => x86_insn::X86_INS_PMULUDQ, 417 => x86_insn::X86_INS_POR, 418 => x86_insn::X86_INS_PSADBW, 419 => x86_insn::X86_INS_PSHUFB, 420 => x86_insn::X86_INS_PSHUFW, 421 => x86_insn::X86_INS_PSIGNB, 422 => x86_insn::X86_INS_PSIGND, 423 => x86_insn::X86_INS_PSIGNW, 424 => x86_insn::X86_INS_PSLLD, 425 => x86_insn::X86_INS_PSLLQ, 426 => x86_insn::X86_INS_PSLLW, 427 => x86_insn::X86_INS_PSRAD, 428 => x86_insn::X86_INS_PSRAW, 429 => x86_insn::X86_INS_PSRLD, 430 => x86_insn::X86_INS_PSRLQ, 431 => x86_insn::X86_INS_PSRLW, 432 => x86_insn::X86_INS_PSUBB, 433 => x86_insn::X86_INS_PSUBD, 434 => x86_insn::X86_INS_PSUBQ, 435 => x86_insn::X86_INS_PSUBSB, 436 => x86_insn::X86_INS_PSUBSW, 437 => x86_insn::X86_INS_PSUBUSB, 438 => x86_insn::X86_INS_PSUBUSW, 439 => x86_insn::X86_INS_PSUBW, 440 => x86_insn::X86_INS_PUNPCKHBW, 441 => x86_insn::X86_INS_PUNPCKHDQ, 442 => x86_insn::X86_INS_PUNPCKHWD, 443 => x86_insn::X86_INS_PUNPCKLBW, 444 => x86_insn::X86_INS_PUNPCKLDQ, 445 => x86_insn::X86_INS_PUNPCKLWD, 446 => x86_insn::X86_INS_PXOR, 447 => x86_insn::X86_INS_MONITOR, 448 => x86_insn::X86_INS_MONTMUL, 449 => x86_insn::X86_INS_MOV, 450 => x86_insn::X86_INS_MOVABS, 451 => x86_insn::X86_INS_MOVBE, 452 => x86_insn::X86_INS_MOVDDUP, 453 => x86_insn::X86_INS_MOVDQA, 454 => x86_insn::X86_INS_MOVDQU, 455 => x86_insn::X86_INS_MOVHLPS, 456 => x86_insn::X86_INS_MOVHPD, 457 => x86_insn::X86_INS_MOVHPS, 458 => x86_insn::X86_INS_MOVLHPS, 459 => x86_insn::X86_INS_MOVLPD, 460 => x86_insn::X86_INS_MOVLPS, 461 => x86_insn::X86_INS_MOVMSKPD, 462 => x86_insn::X86_INS_MOVMSKPS, 463 => x86_insn::X86_INS_MOVNTDQA, 464 => x86_insn::X86_INS_MOVNTDQ, 465 => x86_insn::X86_INS_MOVNTI, 466 => x86_insn::X86_INS_MOVNTPD, 467 => x86_insn::X86_INS_MOVNTPS, 468 => x86_insn::X86_INS_MOVNTSD, 469 => x86_insn::X86_INS_MOVNTSS, 470 => x86_insn::X86_INS_MOVSB, 471 => x86_insn::X86_INS_MOVSD, 472 => x86_insn::X86_INS_MOVSHDUP, 473 => x86_insn::X86_INS_MOVSLDUP, 474 => x86_insn::X86_INS_MOVSQ, 475 => x86_insn::X86_INS_MOVSS, 476 => x86_insn::X86_INS_MOVSW, 477 => x86_insn::X86_INS_MOVSX, 478 => x86_insn::X86_INS_MOVSXD, 479 => x86_insn::X86_INS_MOVUPD, 480 => x86_insn::X86_INS_MOVUPS, 481 => x86_insn::X86_INS_MOVZX, 482 => x86_insn::X86_INS_MPSADBW, 483 => x86_insn::X86_INS_MUL, 484 => x86_insn::X86_INS_MULPD, 485 => x86_insn::X86_INS_MULPS, 486 => x86_insn::X86_INS_MULSD, 487 => x86_insn::X86_INS_MULSS, 488 => x86_insn::X86_INS_MULX, 489 => x86_insn::X86_INS_FMUL, 490 => x86_insn::X86_INS_FIMUL, 491 => x86_insn::X86_INS_FMULP, 492 => x86_insn::X86_INS_MWAIT, 493 => x86_insn::X86_INS_NEG, 494 => x86_insn::X86_INS_NOP, 495 => x86_insn::X86_INS_NOT, 496 => x86_insn::X86_INS_OUT, 497 => x86_insn::X86_INS_OUTSB, 498 => x86_insn::X86_INS_OUTSD, 499 => x86_insn::X86_INS_OUTSW, 500 => x86_insn::X86_INS_PACKUSDW, 501 => x86_insn::X86_INS_PAUSE, 502 => x86_insn::X86_INS_PAVGUSB, 503 => x86_insn::X86_INS_PBLENDVB, 504 => x86_insn::X86_INS_PBLENDW, 505 => x86_insn::X86_INS_PCLMULQDQ, 506 => x86_insn::X86_INS_PCMPEQQ, 507 => x86_insn::X86_INS_PCMPESTRI, 508 => x86_insn::X86_INS_PCMPESTRM, 509 => x86_insn::X86_INS_PCMPGTQ, 510 => x86_insn::X86_INS_PCMPISTRI, 511 => x86_insn::X86_INS_PCMPISTRM, 512 => x86_insn::X86_INS_PCOMMIT, 513 => x86_insn::X86_INS_PDEP, 514 => x86_insn::X86_INS_PEXT, 515 => x86_insn::X86_INS_PEXTRB, 516 => x86_insn::X86_INS_PEXTRD, 517 => x86_insn::X86_INS_PEXTRQ, 518 => x86_insn::X86_INS_PF2ID, 519 => x86_insn::X86_INS_PF2IW, 520 => x86_insn::X86_INS_PFACC, 521 => x86_insn::X86_INS_PFADD, 522 => x86_insn::X86_INS_PFCMPEQ, 523 => x86_insn::X86_INS_PFCMPGE, 524 => x86_insn::X86_INS_PFCMPGT, 525 => x86_insn::X86_INS_PFMAX, 526 => x86_insn::X86_INS_PFMIN, 527 => x86_insn::X86_INS_PFMUL, 528 => x86_insn::X86_INS_PFNACC, 529 => x86_insn::X86_INS_PFPNACC, 530 => x86_insn::X86_INS_PFRCPIT1, 531 => x86_insn::X86_INS_PFRCPIT2, 532 => x86_insn::X86_INS_PFRCP, 533 => x86_insn::X86_INS_PFRSQIT1, 534 => x86_insn::X86_INS_PFRSQRT, 535 => x86_insn::X86_INS_PFSUBR, 536 => x86_insn::X86_INS_PFSUB, 537 => x86_insn::X86_INS_PHMINPOSUW, 538 => x86_insn::X86_INS_PI2FD, 539 => x86_insn::X86_INS_PI2FW, 540 => x86_insn::X86_INS_PINSRB, 541 => x86_insn::X86_INS_PINSRD, 542 => x86_insn::X86_INS_PINSRQ, 543 => x86_insn::X86_INS_PMAXSB, 544 => x86_insn::X86_INS_PMAXSD, 545 => x86_insn::X86_INS_PMAXUD, 546 => x86_insn::X86_INS_PMAXUW, 547 => x86_insn::X86_INS_PMINSB, 548 => x86_insn::X86_INS_PMINSD, 549 => x86_insn::X86_INS_PMINUD, 550 => x86_insn::X86_INS_PMINUW, 551 => x86_insn::X86_INS_PMOVSXBD, 552 => x86_insn::X86_INS_PMOVSXBQ, 553 => x86_insn::X86_INS_PMOVSXBW, 554 => x86_insn::X86_INS_PMOVSXDQ, 555 => x86_insn::X86_INS_PMOVSXWD, 556 => x86_insn::X86_INS_PMOVSXWQ, 557 => x86_insn::X86_INS_PMOVZXBD, 558 => x86_insn::X86_INS_PMOVZXBQ, 559 => x86_insn::X86_INS_PMOVZXBW, 560 => x86_insn::X86_INS_PMOVZXDQ, 561 => x86_insn::X86_INS_PMOVZXWD, 562 => x86_insn::X86_INS_PMOVZXWQ, 563 => x86_insn::X86_INS_PMULDQ, 564 => x86_insn::X86_INS_PMULHRW, 565 => x86_insn::X86_INS_PMULLD, 566 => x86_insn::X86_INS_POP, 567 => x86_insn::X86_INS_POPAW, 568 => x86_insn::X86_INS_POPAL, 569 => x86_insn::X86_INS_POPCNT, 570 => x86_insn::X86_INS_POPF, 571 => x86_insn::X86_INS_POPFD, 572 => x86_insn::X86_INS_POPFQ, 573 => x86_insn::X86_INS_PREFETCH, 574 => x86_insn::X86_INS_PREFETCHNTA, 575 => x86_insn::X86_INS_PREFETCHT0, 576 => x86_insn::X86_INS_PREFETCHT1, 577 => x86_insn::X86_INS_PREFETCHT2, 578 => x86_insn::X86_INS_PREFETCHW, 579 => x86_insn::X86_INS_PSHUFD, 580 => x86_insn::X86_INS_PSHUFHW, 581 => x86_insn::X86_INS_PSHUFLW, 582 => x86_insn::X86_INS_PSLLDQ, 583 => x86_insn::X86_INS_PSRLDQ, 584 => x86_insn::X86_INS_PSWAPD, 585 => x86_insn::X86_INS_PTEST, 586 => x86_insn::X86_INS_PUNPCKHQDQ, 587 => x86_insn::X86_INS_PUNPCKLQDQ, 588 => x86_insn::X86_INS_PUSH, 589 => x86_insn::X86_INS_PUSHAW, 590 => x86_insn::X86_INS_PUSHAL, 591 => x86_insn::X86_INS_PUSHF, 592 => x86_insn::X86_INS_PUSHFD, 593 => x86_insn::X86_INS_PUSHFQ, 594 => x86_insn::X86_INS_RCL, 595 => x86_insn::X86_INS_RCPPS, 596 => x86_insn::X86_INS_RCPSS, 597 => x86_insn::X86_INS_RCR, 598 => x86_insn::X86_INS_RDFSBASE, 599 => x86_insn::X86_INS_RDGSBASE, 600 => x86_insn::X86_INS_RDMSR, 601 => x86_insn::X86_INS_RDPMC, 602 => x86_insn::X86_INS_RDRAND, 603 => x86_insn::X86_INS_RDSEED, 604 => x86_insn::X86_INS_RDTSC, 605 => x86_insn::X86_INS_RDTSCP, 606 => x86_insn::X86_INS_ROL, 607 => x86_insn::X86_INS_ROR, 608 => x86_insn::X86_INS_RORX, 609 => x86_insn::X86_INS_ROUNDPD, 610 => x86_insn::X86_INS_ROUNDPS, 611 => x86_insn::X86_INS_ROUNDSD, 612 => x86_insn::X86_INS_ROUNDSS, 613 => x86_insn::X86_INS_RSM, 614 => x86_insn::X86_INS_RSQRTPS, 615 => x86_insn::X86_INS_RSQRTSS, 616 => x86_insn::X86_INS_SAHF, 617 => x86_insn::X86_INS_SAL, 618 => x86_insn::X86_INS_SALC, 619 => x86_insn::X86_INS_SAR, 620 => x86_insn::X86_INS_SARX, 621 => x86_insn::X86_INS_SBB, 622 => x86_insn::X86_INS_SCASB, 623 => x86_insn::X86_INS_SCASD, 624 => x86_insn::X86_INS_SCASQ, 625 => x86_insn::X86_INS_SCASW, 626 => x86_insn::X86_INS_SETAE, 627 => x86_insn::X86_INS_SETA, 628 => x86_insn::X86_INS_SETBE, 629 => x86_insn::X86_INS_SETB, 630 => x86_insn::X86_INS_SETE, 631 => x86_insn::X86_INS_SETGE, 632 => x86_insn::X86_INS_SETG, 633 => x86_insn::X86_INS_SETLE, 634 => x86_insn::X86_INS_SETL, 635 => x86_insn::X86_INS_SETNE, 636 => x86_insn::X86_INS_SETNO, 637 => x86_insn::X86_INS_SETNP, 638 => x86_insn::X86_INS_SETNS, 639 => x86_insn::X86_INS_SETO, 640 => x86_insn::X86_INS_SETP, 641 => x86_insn::X86_INS_SETS, 642 => x86_insn::X86_INS_SFENCE, 643 => x86_insn::X86_INS_SGDT, 644 => x86_insn::X86_INS_SHA1MSG1, 645 => x86_insn::X86_INS_SHA1MSG2, 646 => x86_insn::X86_INS_SHA1NEXTE, 647 => x86_insn::X86_INS_SHA1RNDS4, 648 => x86_insn::X86_INS_SHA256MSG1, 649 => x86_insn::X86_INS_SHA256MSG2, 650 => x86_insn::X86_INS_SHA256RNDS2, 651 => x86_insn::X86_INS_SHL, 652 => x86_insn::X86_INS_SHLD, 653 => x86_insn::X86_INS_SHLX, 654 => x86_insn::X86_INS_SHR, 655 => x86_insn::X86_INS_SHRD, 656 => x86_insn::X86_INS_SHRX, 657 => x86_insn::X86_INS_SHUFPD, 658 => x86_insn::X86_INS_SHUFPS, 659 => x86_insn::X86_INS_SIDT, 660 => x86_insn::X86_INS_FSIN, 661 => x86_insn::X86_INS_SKINIT, 662 => x86_insn::X86_INS_SLDT, 663 => x86_insn::X86_INS_SMSW, 664 => x86_insn::X86_INS_SQRTPD, 665 => x86_insn::X86_INS_SQRTPS, 666 => x86_insn::X86_INS_SQRTSD, 667 => x86_insn::X86_INS_SQRTSS, 668 => x86_insn::X86_INS_FSQRT, 669 => x86_insn::X86_INS_STAC, 670 => x86_insn::X86_INS_STC, 671 => x86_insn::X86_INS_STD, 672 => x86_insn::X86_INS_STGI, 673 => x86_insn::X86_INS_STI, 674 => x86_insn::X86_INS_STMXCSR, 675 => x86_insn::X86_INS_STOSB, 676 => x86_insn::X86_INS_STOSD, 677 => x86_insn::X86_INS_STOSQ, 678 => x86_insn::X86_INS_STOSW, 679 => x86_insn::X86_INS_STR, 680 => x86_insn::X86_INS_FST, 681 => x86_insn::X86_INS_FSTP, 682 => x86_insn::X86_INS_FSTPNCE, 683 => x86_insn::X86_INS_FXCH, 684 => x86_insn::X86_INS_SUBPD, 685 => x86_insn::X86_INS_SUBPS, 686 => x86_insn::X86_INS_FSUBR, 687 => x86_insn::X86_INS_FISUBR, 688 => x86_insn::X86_INS_FSUBRP, 689 => x86_insn::X86_INS_SUBSD, 690 => x86_insn::X86_INS_SUBSS, 691 => x86_insn::X86_INS_FSUB, 692 => x86_insn::X86_INS_FISUB, 693 => x86_insn::X86_INS_FSUBP, 694 => x86_insn::X86_INS_SWAPGS, 695 => x86_insn::X86_INS_SYSCALL, 696 => x86_insn::X86_INS_SYSENTER, 697 => x86_insn::X86_INS_SYSEXIT, 698 => x86_insn::X86_INS_SYSRET, 699 => x86_insn::X86_INS_T1MSKC, 700 => x86_insn::X86_INS_TEST, 701 => x86_insn::X86_INS_UD2, 702 => x86_insn::X86_INS_FTST, 703 => x86_insn::X86_INS_TZCNT, 704 => x86_insn::X86_INS_TZMSK, 705 => x86_insn::X86_INS_FUCOMIP, 706 => x86_insn::X86_INS_FUCOMI, 707 => x86_insn::X86_INS_FUCOMPP, 708 => x86_insn::X86_INS_FUCOMP, 709 => x86_insn::X86_INS_FUCOM, 710 => x86_insn::X86_INS_UD2B, 711 => x86_insn::X86_INS_UNPCKHPD, 712 => x86_insn::X86_INS_UNPCKHPS, 713 => x86_insn::X86_INS_UNPCKLPD, 714 => x86_insn::X86_INS_UNPCKLPS, 715 => x86_insn::X86_INS_VADDPD, 716 => x86_insn::X86_INS_VADDPS, 717 => x86_insn::X86_INS_VADDSD, 718 => x86_insn::X86_INS_VADDSS, 719 => x86_insn::X86_INS_VADDSUBPD, 720 => x86_insn::X86_INS_VADDSUBPS, 721 => x86_insn::X86_INS_VAESDECLAST, 722 => x86_insn::X86_INS_VAESDEC, 723 => x86_insn::X86_INS_VAESENCLAST, 724 => x86_insn::X86_INS_VAESENC, 725 => x86_insn::X86_INS_VAESIMC, 726 => x86_insn::X86_INS_VAESKEYGENASSIST, 727 => x86_insn::X86_INS_VALIGND, 728 => x86_insn::X86_INS_VALIGNQ, 729 => x86_insn::X86_INS_VANDNPD, 730 => x86_insn::X86_INS_VANDNPS, 731 => x86_insn::X86_INS_VANDPD, 732 => x86_insn::X86_INS_VANDPS, 733 => x86_insn::X86_INS_VBLENDMPD, 734 => x86_insn::X86_INS_VBLENDMPS, 735 => x86_insn::X86_INS_VBLENDPD, 736 => x86_insn::X86_INS_VBLENDPS, 737 => x86_insn::X86_INS_VBLENDVPD, 738 => x86_insn::X86_INS_VBLENDVPS, 739 => x86_insn::X86_INS_VBROADCASTF128, 740 => x86_insn::X86_INS_VBROADCASTI32X4, 741 => x86_insn::X86_INS_VBROADCASTI64X4, 742 => x86_insn::X86_INS_VBROADCASTSD, 743 => x86_insn::X86_INS_VBROADCASTSS, 744 => x86_insn::X86_INS_VCOMPRESSPD, 745 => x86_insn::X86_INS_VCOMPRESSPS, 746 => x86_insn::X86_INS_VCVTDQ2PD, 747 => x86_insn::X86_INS_VCVTDQ2PS, 748 => x86_insn::X86_INS_VCVTPD2DQX, 749 => x86_insn::X86_INS_VCVTPD2DQ, 750 => x86_insn::X86_INS_VCVTPD2PSX, 751 => x86_insn::X86_INS_VCVTPD2PS, 752 => x86_insn::X86_INS_VCVTPD2UDQ, 753 => x86_insn::X86_INS_VCVTPH2PS, 754 => x86_insn::X86_INS_VCVTPS2DQ, 755 => x86_insn::X86_INS_VCVTPS2PD, 756 => x86_insn::X86_INS_VCVTPS2PH, 757 => x86_insn::X86_INS_VCVTPS2UDQ, 758 => x86_insn::X86_INS_VCVTSD2SI, 759 => x86_insn::X86_INS_VCVTSD2USI, 760 => x86_insn::X86_INS_VCVTSS2SI, 761 => x86_insn::X86_INS_VCVTSS2USI, 762 => x86_insn::X86_INS_VCVTTPD2DQX, 763 => x86_insn::X86_INS_VCVTTPD2DQ, 764 => x86_insn::X86_INS_VCVTTPD2UDQ, 765 => x86_insn::X86_INS_VCVTTPS2DQ, 766 => x86_insn::X86_INS_VCVTTPS2UDQ, 767 => x86_insn::X86_INS_VCVTUDQ2PD, 768 => x86_insn::X86_INS_VCVTUDQ2PS, 769 => x86_insn::X86_INS_VDIVPD, 770 => x86_insn::X86_INS_VDIVPS, 771 => x86_insn::X86_INS_VDIVSD, 772 => x86_insn::X86_INS_VDIVSS, 773 => x86_insn::X86_INS_VDPPD, 774 => x86_insn::X86_INS_VDPPS, 775 => x86_insn::X86_INS_VERR, 776 => x86_insn::X86_INS_VERW, 777 => x86_insn::X86_INS_VEXP2PD, 778 => x86_insn::X86_INS_VEXP2PS, 779 => x86_insn::X86_INS_VEXPANDPD, 780 => x86_insn::X86_INS_VEXPANDPS, 781 => x86_insn::X86_INS_VEXTRACTF128, 782 => x86_insn::X86_INS_VEXTRACTF32X4, 783 => x86_insn::X86_INS_VEXTRACTF64X4, 784 => x86_insn::X86_INS_VEXTRACTI128, 785 => x86_insn::X86_INS_VEXTRACTI32X4, 786 => x86_insn::X86_INS_VEXTRACTI64X4, 787 => x86_insn::X86_INS_VEXTRACTPS, 788 => x86_insn::X86_INS_VFMADD132PD, 789 => x86_insn::X86_INS_VFMADD132PS, 790 => x86_insn::X86_INS_VFMADDPD, 791 => x86_insn::X86_INS_VFMADD213PD, 792 => x86_insn::X86_INS_VFMADD231PD, 793 => x86_insn::X86_INS_VFMADDPS, 794 => x86_insn::X86_INS_VFMADD213PS, 795 => x86_insn::X86_INS_VFMADD231PS, 796 => x86_insn::X86_INS_VFMADDSD, 797 => x86_insn::X86_INS_VFMADD213SD, 798 => x86_insn::X86_INS_VFMADD132SD, 799 => x86_insn::X86_INS_VFMADD231SD, 800 => x86_insn::X86_INS_VFMADDSS, 801 => x86_insn::X86_INS_VFMADD213SS, 802 => x86_insn::X86_INS_VFMADD132SS, 803 => x86_insn::X86_INS_VFMADD231SS, 804 => x86_insn::X86_INS_VFMADDSUB132PD, 805 => x86_insn::X86_INS_VFMADDSUB132PS, 806 => x86_insn::X86_INS_VFMADDSUBPD, 807 => x86_insn::X86_INS_VFMADDSUB213PD, 808 => x86_insn::X86_INS_VFMADDSUB231PD, 809 => x86_insn::X86_INS_VFMADDSUBPS, 810 => x86_insn::X86_INS_VFMADDSUB213PS, 811 => x86_insn::X86_INS_VFMADDSUB231PS, 812 => x86_insn::X86_INS_VFMSUB132PD, 813 => x86_insn::X86_INS_VFMSUB132PS, 814 => x86_insn::X86_INS_VFMSUBADD132PD, 815 => x86_insn::X86_INS_VFMSUBADD132PS, 816 => x86_insn::X86_INS_VFMSUBADDPD, 817 => x86_insn::X86_INS_VFMSUBADD213PD, 818 => x86_insn::X86_INS_VFMSUBADD231PD, 819 => x86_insn::X86_INS_VFMSUBADDPS, 820 => x86_insn::X86_INS_VFMSUBADD213PS, 821 => x86_insn::X86_INS_VFMSUBADD231PS, 822 => x86_insn::X86_INS_VFMSUBPD, 823 => x86_insn::X86_INS_VFMSUB213PD, 824 => x86_insn::X86_INS_VFMSUB231PD, 825 => x86_insn::X86_INS_VFMSUBPS, 826 => x86_insn::X86_INS_VFMSUB213PS, 827 => x86_insn::X86_INS_VFMSUB231PS, 828 => x86_insn::X86_INS_VFMSUBSD, 829 => x86_insn::X86_INS_VFMSUB213SD, 830 => x86_insn::X86_INS_VFMSUB132SD, 831 => x86_insn::X86_INS_VFMSUB231SD, 832 => x86_insn::X86_INS_VFMSUBSS, 833 => x86_insn::X86_INS_VFMSUB213SS, 834 => x86_insn::X86_INS_VFMSUB132SS, 835 => x86_insn::X86_INS_VFMSUB231SS, 836 => x86_insn::X86_INS_VFNMADD132PD, 837 => x86_insn::X86_INS_VFNMADD132PS, 838 => x86_insn::X86_INS_VFNMADDPD, 839 => x86_insn::X86_INS_VFNMADD213PD, 840 => x86_insn::X86_INS_VFNMADD231PD, 841 => x86_insn::X86_INS_VFNMADDPS, 842 => x86_insn::X86_INS_VFNMADD213PS, 843 => x86_insn::X86_INS_VFNMADD231PS, 844 => x86_insn::X86_INS_VFNMADDSD, 845 => x86_insn::X86_INS_VFNMADD213SD, 846 => x86_insn::X86_INS_VFNMADD132SD, 847 => x86_insn::X86_INS_VFNMADD231SD, 848 => x86_insn::X86_INS_VFNMADDSS, 849 => x86_insn::X86_INS_VFNMADD213SS, 850 => x86_insn::X86_INS_VFNMADD132SS, 851 => x86_insn::X86_INS_VFNMADD231SS, 852 => x86_insn::X86_INS_VFNMSUB132PD, 853 => x86_insn::X86_INS_VFNMSUB132PS, 854 => x86_insn::X86_INS_VFNMSUBPD, 855 => x86_insn::X86_INS_VFNMSUB213PD, 856 => x86_insn::X86_INS_VFNMSUB231PD, 857 => x86_insn::X86_INS_VFNMSUBPS, 858 => x86_insn::X86_INS_VFNMSUB213PS, 859 => x86_insn::X86_INS_VFNMSUB231PS, 860 => x86_insn::X86_INS_VFNMSUBSD, 861 => x86_insn::X86_INS_VFNMSUB213SD, 862 => x86_insn::X86_INS_VFNMSUB132SD, 863 => x86_insn::X86_INS_VFNMSUB231SD, 864 => x86_insn::X86_INS_VFNMSUBSS, 865 => x86_insn::X86_INS_VFNMSUB213SS, 866 => x86_insn::X86_INS_VFNMSUB132SS, 867 => x86_insn::X86_INS_VFNMSUB231SS, 868 => x86_insn::X86_INS_VFRCZPD, 869 => x86_insn::X86_INS_VFRCZPS, 870 => x86_insn::X86_INS_VFRCZSD, 871 => x86_insn::X86_INS_VFRCZSS, 872 => x86_insn::X86_INS_VORPD, 873 => x86_insn::X86_INS_VORPS, 874 => x86_insn::X86_INS_VXORPD, 875 => x86_insn::X86_INS_VXORPS, 876 => x86_insn::X86_INS_VGATHERDPD, 877 => x86_insn::X86_INS_VGATHERDPS, 878 => x86_insn::X86_INS_VGATHERPF0DPD, 879 => x86_insn::X86_INS_VGATHERPF0DPS, 880 => x86_insn::X86_INS_VGATHERPF0QPD, 881 => x86_insn::X86_INS_VGATHERPF0QPS, 882 => x86_insn::X86_INS_VGATHERPF1DPD, 883 => x86_insn::X86_INS_VGATHERPF1DPS, 884 => x86_insn::X86_INS_VGATHERPF1QPD, 885 => x86_insn::X86_INS_VGATHERPF1QPS, 886 => x86_insn::X86_INS_VGATHERQPD, 887 => x86_insn::X86_INS_VGATHERQPS, 888 => x86_insn::X86_INS_VHADDPD, 889 => x86_insn::X86_INS_VHADDPS, 890 => x86_insn::X86_INS_VHSUBPD, 891 => x86_insn::X86_INS_VHSUBPS, 892 => x86_insn::X86_INS_VINSERTF128, 893 => x86_insn::X86_INS_VINSERTF32X4, 894 => x86_insn::X86_INS_VINSERTF32X8, 895 => x86_insn::X86_INS_VINSERTF64X2, 896 => x86_insn::X86_INS_VINSERTF64X4, 897 => x86_insn::X86_INS_VINSERTI128, 898 => x86_insn::X86_INS_VINSERTI32X4, 899 => x86_insn::X86_INS_VINSERTI32X8, 900 => x86_insn::X86_INS_VINSERTI64X2, 901 => x86_insn::X86_INS_VINSERTI64X4, 902 => x86_insn::X86_INS_VINSERTPS, 903 => x86_insn::X86_INS_VLDDQU, 904 => x86_insn::X86_INS_VLDMXCSR, 905 => x86_insn::X86_INS_VMASKMOVDQU, 906 => x86_insn::X86_INS_VMASKMOVPD, 907 => x86_insn::X86_INS_VMASKMOVPS, 908 => x86_insn::X86_INS_VMAXPD, 909 => x86_insn::X86_INS_VMAXPS, 910 => x86_insn::X86_INS_VMAXSD, 911 => x86_insn::X86_INS_VMAXSS, 912 => x86_insn::X86_INS_VMCALL, 913 => x86_insn::X86_INS_VMCLEAR, 914 => x86_insn::X86_INS_VMFUNC, 915 => x86_insn::X86_INS_VMINPD, 916 => x86_insn::X86_INS_VMINPS, 917 => x86_insn::X86_INS_VMINSD, 918 => x86_insn::X86_INS_VMINSS, 919 => x86_insn::X86_INS_VMLAUNCH, 920 => x86_insn::X86_INS_VMLOAD, 921 => x86_insn::X86_INS_VMMCALL, 922 => x86_insn::X86_INS_VMOVQ, 923 => x86_insn::X86_INS_VMOVDDUP, 924 => x86_insn::X86_INS_VMOVD, 925 => x86_insn::X86_INS_VMOVDQA32, 926 => x86_insn::X86_INS_VMOVDQA64, 927 => x86_insn::X86_INS_VMOVDQA, 928 => x86_insn::X86_INS_VMOVDQU16, 929 => x86_insn::X86_INS_VMOVDQU32, 930 => x86_insn::X86_INS_VMOVDQU64, 931 => x86_insn::X86_INS_VMOVDQU8, 932 => x86_insn::X86_INS_VMOVDQU, 933 => x86_insn::X86_INS_VMOVHLPS, 934 => x86_insn::X86_INS_VMOVHPD, 935 => x86_insn::X86_INS_VMOVHPS, 936 => x86_insn::X86_INS_VMOVLHPS, 937 => x86_insn::X86_INS_VMOVLPD, 938 => x86_insn::X86_INS_VMOVLPS, 939 => x86_insn::X86_INS_VMOVMSKPD, 940 => x86_insn::X86_INS_VMOVMSKPS, 941 => x86_insn::X86_INS_VMOVNTDQA, 942 => x86_insn::X86_INS_VMOVNTDQ, 943 => x86_insn::X86_INS_VMOVNTPD, 944 => x86_insn::X86_INS_VMOVNTPS, 945 => x86_insn::X86_INS_VMOVSD, 946 => x86_insn::X86_INS_VMOVSHDUP, 947 => x86_insn::X86_INS_VMOVSLDUP, 948 => x86_insn::X86_INS_VMOVSS, 949 => x86_insn::X86_INS_VMOVUPD, 950 => x86_insn::X86_INS_VMOVUPS, 951 => x86_insn::X86_INS_VMPSADBW, 952 => x86_insn::X86_INS_VMPTRLD, 953 => x86_insn::X86_INS_VMPTRST, 954 => x86_insn::X86_INS_VMREAD, 955 => x86_insn::X86_INS_VMRESUME, 956 => x86_insn::X86_INS_VMRUN, 957 => x86_insn::X86_INS_VMSAVE, 958 => x86_insn::X86_INS_VMULPD, 959 => x86_insn::X86_INS_VMULPS, 960 => x86_insn::X86_INS_VMULSD, 961 => x86_insn::X86_INS_VMULSS, 962 => x86_insn::X86_INS_VMWRITE, 963 => x86_insn::X86_INS_VMXOFF, 964 => x86_insn::X86_INS_VMXON, 965 => x86_insn::X86_INS_VPABSB, 966 => x86_insn::X86_INS_VPABSD, 967 => x86_insn::X86_INS_VPABSQ, 968 => x86_insn::X86_INS_VPABSW, 969 => x86_insn::X86_INS_VPACKSSDW, 970 => x86_insn::X86_INS_VPACKSSWB, 971 => x86_insn::X86_INS_VPACKUSDW, 972 => x86_insn::X86_INS_VPACKUSWB, 973 => x86_insn::X86_INS_VPADDB, 974 => x86_insn::X86_INS_VPADDD, 975 => x86_insn::X86_INS_VPADDQ, 976 => x86_insn::X86_INS_VPADDSB, 977 => x86_insn::X86_INS_VPADDSW, 978 => x86_insn::X86_INS_VPADDUSB, 979 => x86_insn::X86_INS_VPADDUSW, 980 => x86_insn::X86_INS_VPADDW, 981 => x86_insn::X86_INS_VPALIGNR, 982 => x86_insn::X86_INS_VPANDD, 983 => x86_insn::X86_INS_VPANDND, 984 => x86_insn::X86_INS_VPANDNQ, 985 => x86_insn::X86_INS_VPANDN, 986 => x86_insn::X86_INS_VPANDQ, 987 => x86_insn::X86_INS_VPAND, 988 => x86_insn::X86_INS_VPAVGB, 989 => x86_insn::X86_INS_VPAVGW, 990 => x86_insn::X86_INS_VPBLENDD, 991 => x86_insn::X86_INS_VPBLENDMB, 992 => x86_insn::X86_INS_VPBLENDMD, 993 => x86_insn::X86_INS_VPBLENDMQ, 994 => x86_insn::X86_INS_VPBLENDMW, 995 => x86_insn::X86_INS_VPBLENDVB, 996 => x86_insn::X86_INS_VPBLENDW, 997 => x86_insn::X86_INS_VPBROADCASTB, 998 => x86_insn::X86_INS_VPBROADCASTD, 999 => x86_insn::X86_INS_VPBROADCASTMB2Q, 1000 => x86_insn::X86_INS_VPBROADCASTMW2D, 1001 => x86_insn::X86_INS_VPBROADCASTQ, 1002 => x86_insn::X86_INS_VPBROADCASTW, 1003 => x86_insn::X86_INS_VPCLMULQDQ, 1004 => x86_insn::X86_INS_VPCMOV, 1005 => x86_insn::X86_INS_VPCMPB, 1006 => x86_insn::X86_INS_VPCMPD, 1007 => x86_insn::X86_INS_VPCMPEQB, 1008 => x86_insn::X86_INS_VPCMPEQD, 1009 => x86_insn::X86_INS_VPCMPEQQ, 1010 => x86_insn::X86_INS_VPCMPEQW, 1011 => x86_insn::X86_INS_VPCMPESTRI, 1012 => x86_insn::X86_INS_VPCMPESTRM, 1013 => x86_insn::X86_INS_VPCMPGTB, 1014 => x86_insn::X86_INS_VPCMPGTD, 1015 => x86_insn::X86_INS_VPCMPGTQ, 1016 => x86_insn::X86_INS_VPCMPGTW, 1017 => x86_insn::X86_INS_VPCMPISTRI, 1018 => x86_insn::X86_INS_VPCMPISTRM, 1019 => x86_insn::X86_INS_VPCMPQ, 1020 => x86_insn::X86_INS_VPCMPUB, 1021 => x86_insn::X86_INS_VPCMPUD, 1022 => x86_insn::X86_INS_VPCMPUQ, 1023 => x86_insn::X86_INS_VPCMPUW, 1024 => x86_insn::X86_INS_VPCMPW, 1025 => x86_insn::X86_INS_VPCOMB, 1026 => x86_insn::X86_INS_VPCOMD, 1027 => x86_insn::X86_INS_VPCOMPRESSD, 1028 => x86_insn::X86_INS_VPCOMPRESSQ, 1029 => x86_insn::X86_INS_VPCOMQ, 1030 => x86_insn::X86_INS_VPCOMUB, 1031 => x86_insn::X86_INS_VPCOMUD, 1032 => x86_insn::X86_INS_VPCOMUQ, 1033 => x86_insn::X86_INS_VPCOMUW, 1034 => x86_insn::X86_INS_VPCOMW, 1035 => x86_insn::X86_INS_VPCONFLICTD, 1036 => x86_insn::X86_INS_VPCONFLICTQ, 1037 => x86_insn::X86_INS_VPERM2F128, 1038 => x86_insn::X86_INS_VPERM2I128, 1039 => x86_insn::X86_INS_VPERMD, 1040 => x86_insn::X86_INS_VPERMI2D, 1041 => x86_insn::X86_INS_VPERMI2PD, 1042 => x86_insn::X86_INS_VPERMI2PS, 1043 => x86_insn::X86_INS_VPERMI2Q, 1044 => x86_insn::X86_INS_VPERMIL2PD, 1045 => x86_insn::X86_INS_VPERMIL2PS, 1046 => x86_insn::X86_INS_VPERMILPD, 1047 => x86_insn::X86_INS_VPERMILPS, 1048 => x86_insn::X86_INS_VPERMPD, 1049 => x86_insn::X86_INS_VPERMPS, 1050 => x86_insn::X86_INS_VPERMQ, 1051 => x86_insn::X86_INS_VPERMT2D, 1052 => x86_insn::X86_INS_VPERMT2PD, 1053 => x86_insn::X86_INS_VPERMT2PS, 1054 => x86_insn::X86_INS_VPERMT2Q, 1055 => x86_insn::X86_INS_VPEXPANDD, 1056 => x86_insn::X86_INS_VPEXPANDQ, 1057 => x86_insn::X86_INS_VPEXTRB, 1058 => x86_insn::X86_INS_VPEXTRD, 1059 => x86_insn::X86_INS_VPEXTRQ, 1060 => x86_insn::X86_INS_VPEXTRW, 1061 => x86_insn::X86_INS_VPGATHERDD, 1062 => x86_insn::X86_INS_VPGATHERDQ, 1063 => x86_insn::X86_INS_VPGATHERQD, 1064 => x86_insn::X86_INS_VPGATHERQQ, 1065 => x86_insn::X86_INS_VPHADDBD, 1066 => x86_insn::X86_INS_VPHADDBQ, 1067 => x86_insn::X86_INS_VPHADDBW, 1068 => x86_insn::X86_INS_VPHADDDQ, 1069 => x86_insn::X86_INS_VPHADDD, 1070 => x86_insn::X86_INS_VPHADDSW, 1071 => x86_insn::X86_INS_VPHADDUBD, 1072 => x86_insn::X86_INS_VPHADDUBQ, 1073 => x86_insn::X86_INS_VPHADDUBW, 1074 => x86_insn::X86_INS_VPHADDUDQ, 1075 => x86_insn::X86_INS_VPHADDUWD, 1076 => x86_insn::X86_INS_VPHADDUWQ, 1077 => x86_insn::X86_INS_VPHADDWD, 1078 => x86_insn::X86_INS_VPHADDWQ, 1079 => x86_insn::X86_INS_VPHADDW, 1080 => x86_insn::X86_INS_VPHMINPOSUW, 1081 => x86_insn::X86_INS_VPHSUBBW, 1082 => x86_insn::X86_INS_VPHSUBDQ, 1083 => x86_insn::X86_INS_VPHSUBD, 1084 => x86_insn::X86_INS_VPHSUBSW, 1085 => x86_insn::X86_INS_VPHSUBWD, 1086 => x86_insn::X86_INS_VPHSUBW, 1087 => x86_insn::X86_INS_VPINSRB, 1088 => x86_insn::X86_INS_VPINSRD, 1089 => x86_insn::X86_INS_VPINSRQ, 1090 => x86_insn::X86_INS_VPINSRW, 1091 => x86_insn::X86_INS_VPLZCNTD, 1092 => x86_insn::X86_INS_VPLZCNTQ, 1093 => x86_insn::X86_INS_VPMACSDD, 1094 => x86_insn::X86_INS_VPMACSDQH, 1095 => x86_insn::X86_INS_VPMACSDQL, 1096 => x86_insn::X86_INS_VPMACSSDD, 1097 => x86_insn::X86_INS_VPMACSSDQH, 1098 => x86_insn::X86_INS_VPMACSSDQL, 1099 => x86_insn::X86_INS_VPMACSSWD, 1100 => x86_insn::X86_INS_VPMACSSWW, 1101 => x86_insn::X86_INS_VPMACSWD, 1102 => x86_insn::X86_INS_VPMACSWW, 1103 => x86_insn::X86_INS_VPMADCSSWD, 1104 => x86_insn::X86_INS_VPMADCSWD, 1105 => x86_insn::X86_INS_VPMADDUBSW, 1106 => x86_insn::X86_INS_VPMADDWD, 1107 => x86_insn::X86_INS_VPMASKMOVD, 1108 => x86_insn::X86_INS_VPMASKMOVQ, 1109 => x86_insn::X86_INS_VPMAXSB, 1110 => x86_insn::X86_INS_VPMAXSD, 1111 => x86_insn::X86_INS_VPMAXSQ, 1112 => x86_insn::X86_INS_VPMAXSW, 1113 => x86_insn::X86_INS_VPMAXUB, 1114 => x86_insn::X86_INS_VPMAXUD, 1115 => x86_insn::X86_INS_VPMAXUQ, 1116 => x86_insn::X86_INS_VPMAXUW, 1117 => x86_insn::X86_INS_VPMINSB, 1118 => x86_insn::X86_INS_VPMINSD, 1119 => x86_insn::X86_INS_VPMINSQ, 1120 => x86_insn::X86_INS_VPMINSW, 1121 => x86_insn::X86_INS_VPMINUB, 1122 => x86_insn::X86_INS_VPMINUD, 1123 => x86_insn::X86_INS_VPMINUQ, 1124 => x86_insn::X86_INS_VPMINUW, 1125 => x86_insn::X86_INS_VPMOVDB, 1126 => x86_insn::X86_INS_VPMOVDW, 1127 => x86_insn::X86_INS_VPMOVM2B, 1128 => x86_insn::X86_INS_VPMOVM2D, 1129 => x86_insn::X86_INS_VPMOVM2Q, 1130 => x86_insn::X86_INS_VPMOVM2W, 1131 => x86_insn::X86_INS_VPMOVMSKB, 1132 => x86_insn::X86_INS_VPMOVQB, 1133 => x86_insn::X86_INS_VPMOVQD, 1134 => x86_insn::X86_INS_VPMOVQW, 1135 => x86_insn::X86_INS_VPMOVSDB, 1136 => x86_insn::X86_INS_VPMOVSDW, 1137 => x86_insn::X86_INS_VPMOVSQB, 1138 => x86_insn::X86_INS_VPMOVSQD, 1139 => x86_insn::X86_INS_VPMOVSQW, 1140 => x86_insn::X86_INS_VPMOVSXBD, 1141 => x86_insn::X86_INS_VPMOVSXBQ, 1142 => x86_insn::X86_INS_VPMOVSXBW, 1143 => x86_insn::X86_INS_VPMOVSXDQ, 1144 => x86_insn::X86_INS_VPMOVSXWD, 1145 => x86_insn::X86_INS_VPMOVSXWQ, 1146 => x86_insn::X86_INS_VPMOVUSDB, 1147 => x86_insn::X86_INS_VPMOVUSDW, 1148 => x86_insn::X86_INS_VPMOVUSQB, 1149 => x86_insn::X86_INS_VPMOVUSQD, 1150 => x86_insn::X86_INS_VPMOVUSQW, 1151 => x86_insn::X86_INS_VPMOVZXBD, 1152 => x86_insn::X86_INS_VPMOVZXBQ, 1153 => x86_insn::X86_INS_VPMOVZXBW, 1154 => x86_insn::X86_INS_VPMOVZXDQ, 1155 => x86_insn::X86_INS_VPMOVZXWD, 1156 => x86_insn::X86_INS_VPMOVZXWQ, 1157 => x86_insn::X86_INS_VPMULDQ, 1158 => x86_insn::X86_INS_VPMULHRSW, 1159 => x86_insn::X86_INS_VPMULHUW, 1160 => x86_insn::X86_INS_VPMULHW, 1161 => x86_insn::X86_INS_VPMULLD, 1162 => x86_insn::X86_INS_VPMULLQ, 1163 => x86_insn::X86_INS_VPMULLW, 1164 => x86_insn::X86_INS_VPMULUDQ, 1165 => x86_insn::X86_INS_VPORD, 1166 => x86_insn::X86_INS_VPORQ, 1167 => x86_insn::X86_INS_VPOR, 1168 => x86_insn::X86_INS_VPPERM, 1169 => x86_insn::X86_INS_VPROTB, 1170 => x86_insn::X86_INS_VPROTD, 1171 => x86_insn::X86_INS_VPROTQ, 1172 => x86_insn::X86_INS_VPROTW, 1173 => x86_insn::X86_INS_VPSADBW, 1174 => x86_insn::X86_INS_VPSCATTERDD, 1175 => x86_insn::X86_INS_VPSCATTERDQ, 1176 => x86_insn::X86_INS_VPSCATTERQD, 1177 => x86_insn::X86_INS_VPSCATTERQQ, 1178 => x86_insn::X86_INS_VPSHAB, 1179 => x86_insn::X86_INS_VPSHAD, 1180 => x86_insn::X86_INS_VPSHAQ, 1181 => x86_insn::X86_INS_VPSHAW, 1182 => x86_insn::X86_INS_VPSHLB, 1183 => x86_insn::X86_INS_VPSHLD, 1184 => x86_insn::X86_INS_VPSHLQ, 1185 => x86_insn::X86_INS_VPSHLW, 1186 => x86_insn::X86_INS_VPSHUFB, 1187 => x86_insn::X86_INS_VPSHUFD, 1188 => x86_insn::X86_INS_VPSHUFHW, 1189 => x86_insn::X86_INS_VPSHUFLW, 1190 => x86_insn::X86_INS_VPSIGNB, 1191 => x86_insn::X86_INS_VPSIGND, 1192 => x86_insn::X86_INS_VPSIGNW, 1193 => x86_insn::X86_INS_VPSLLDQ, 1194 => x86_insn::X86_INS_VPSLLD, 1195 => x86_insn::X86_INS_VPSLLQ, 1196 => x86_insn::X86_INS_VPSLLVD, 1197 => x86_insn::X86_INS_VPSLLVQ, 1198 => x86_insn::X86_INS_VPSLLW, 1199 => x86_insn::X86_INS_VPSRAD, 1200 => x86_insn::X86_INS_VPSRAQ, 1201 => x86_insn::X86_INS_VPSRAVD, 1202 => x86_insn::X86_INS_VPSRAVQ, 1203 => x86_insn::X86_INS_VPSRAW, 1204 => x86_insn::X86_INS_VPSRLDQ, 1205 => x86_insn::X86_INS_VPSRLD, 1206 => x86_insn::X86_INS_VPSRLQ, 1207 => x86_insn::X86_INS_VPSRLVD, 1208 => x86_insn::X86_INS_VPSRLVQ, 1209 => x86_insn::X86_INS_VPSRLW, 1210 => x86_insn::X86_INS_VPSUBB, 1211 => x86_insn::X86_INS_VPSUBD, 1212 => x86_insn::X86_INS_VPSUBQ, 1213 => x86_insn::X86_INS_VPSUBSB, 1214 => x86_insn::X86_INS_VPSUBSW, 1215 => x86_insn::X86_INS_VPSUBUSB, 1216 => x86_insn::X86_INS_VPSUBUSW, 1217 => x86_insn::X86_INS_VPSUBW, 1218 => x86_insn::X86_INS_VPTESTMD, 1219 => x86_insn::X86_INS_VPTESTMQ, 1220 => x86_insn::X86_INS_VPTESTNMD, 1221 => x86_insn::X86_INS_VPTESTNMQ, 1222 => x86_insn::X86_INS_VPTEST, 1223 => x86_insn::X86_INS_VPUNPCKHBW, 1224 => x86_insn::X86_INS_VPUNPCKHDQ, 1225 => x86_insn::X86_INS_VPUNPCKHQDQ, 1226 => x86_insn::X86_INS_VPUNPCKHWD, 1227 => x86_insn::X86_INS_VPUNPCKLBW, 1228 => x86_insn::X86_INS_VPUNPCKLDQ, 1229 => x86_insn::X86_INS_VPUNPCKLQDQ, 1230 => x86_insn::X86_INS_VPUNPCKLWD, 1231 => x86_insn::X86_INS_VPXORD, 1232 => x86_insn::X86_INS_VPXORQ, 1233 => x86_insn::X86_INS_VPXOR, 1234 => x86_insn::X86_INS_VRCP14PD, 1235 => x86_insn::X86_INS_VRCP14PS, 1236 => x86_insn::X86_INS_VRCP14SD, 1237 => x86_insn::X86_INS_VRCP14SS, 1238 => x86_insn::X86_INS_VRCP28PD, 1239 => x86_insn::X86_INS_VRCP28PS, 1240 => x86_insn::X86_INS_VRCP28SD, 1241 => x86_insn::X86_INS_VRCP28SS, 1242 => x86_insn::X86_INS_VRCPPS, 1243 => x86_insn::X86_INS_VRCPSS, 1244 => x86_insn::X86_INS_VRNDSCALEPD, 1245 => x86_insn::X86_INS_VRNDSCALEPS, 1246 => x86_insn::X86_INS_VRNDSCALESD, 1247 => x86_insn::X86_INS_VRNDSCALESS, 1248 => x86_insn::X86_INS_VROUNDPD, 1249 => x86_insn::X86_INS_VROUNDPS, 1250 => x86_insn::X86_INS_VROUNDSD, 1251 => x86_insn::X86_INS_VROUNDSS, 1252 => x86_insn::X86_INS_VRSQRT14PD, 1253 => x86_insn::X86_INS_VRSQRT14PS, 1254 => x86_insn::X86_INS_VRSQRT14SD, 1255 => x86_insn::X86_INS_VRSQRT14SS, 1256 => x86_insn::X86_INS_VRSQRT28PD, 1257 => x86_insn::X86_INS_VRSQRT28PS, 1258 => x86_insn::X86_INS_VRSQRT28SD, 1259 => x86_insn::X86_INS_VRSQRT28SS, 1260 => x86_insn::X86_INS_VRSQRTPS, 1261 => x86_insn::X86_INS_VRSQRTSS, 1262 => x86_insn::X86_INS_VSCATTERDPD, 1263 => x86_insn::X86_INS_VSCATTERDPS, 1264 => x86_insn::X86_INS_VSCATTERPF0DPD, 1265 => x86_insn::X86_INS_VSCATTERPF0DPS, 1266 => x86_insn::X86_INS_VSCATTERPF0QPD, 1267 => x86_insn::X86_INS_VSCATTERPF0QPS, 1268 => x86_insn::X86_INS_VSCATTERPF1DPD, 1269 => x86_insn::X86_INS_VSCATTERPF1DPS, 1270 => x86_insn::X86_INS_VSCATTERPF1QPD, 1271 => x86_insn::X86_INS_VSCATTERPF1QPS, 1272 => x86_insn::X86_INS_VSCATTERQPD, 1273 => x86_insn::X86_INS_VSCATTERQPS, 1274 => x86_insn::X86_INS_VSHUFPD, 1275 => x86_insn::X86_INS_VSHUFPS, 1276 => x86_insn::X86_INS_VSQRTPD, 1277 => x86_insn::X86_INS_VSQRTPS, 1278 => x86_insn::X86_INS_VSQRTSD, 1279 => x86_insn::X86_INS_VSQRTSS, 1280 => x86_insn::X86_INS_VSTMXCSR, 1281 => x86_insn::X86_INS_VSUBPD, 1282 => x86_insn::X86_INS_VSUBPS, 1283 => x86_insn::X86_INS_VSUBSD, 1284 => x86_insn::X86_INS_VSUBSS, 1285 => x86_insn::X86_INS_VTESTPD, 1286 => x86_insn::X86_INS_VTESTPS, 1287 => x86_insn::X86_INS_VUNPCKHPD, 1288 => x86_insn::X86_INS_VUNPCKHPS, 1289 => x86_insn::X86_INS_VUNPCKLPD, 1290 => x86_insn::X86_INS_VUNPCKLPS, 1291 => x86_insn::X86_INS_VZEROALL, 1292 => x86_insn::X86_INS_VZEROUPPER, 1293 => x86_insn::X86_INS_WAIT, 1294 => x86_insn::X86_INS_WBINVD, 1295 => x86_insn::X86_INS_WRFSBASE, 1296 => x86_insn::X86_INS_WRGSBASE, 1297 => x86_insn::X86_INS_WRMSR, 1298 => x86_insn::X86_INS_XABORT, 1299 => x86_insn::X86_INS_XACQUIRE, 1300 => x86_insn::X86_INS_XBEGIN, 1301 => x86_insn::X86_INS_XCHG, 1302 => x86_insn::X86_INS_XCRYPTCBC, 1303 => x86_insn::X86_INS_XCRYPTCFB, 1304 => x86_insn::X86_INS_XCRYPTCTR, 1305 => x86_insn::X86_INS_XCRYPTECB, 1306 => x86_insn::X86_INS_XCRYPTOFB, 1307 => x86_insn::X86_INS_XEND, 1308 => x86_insn::X86_INS_XGETBV, 1309 => x86_insn::X86_INS_XLATB, 1310 => x86_insn::X86_INS_XRELEASE, 1311 => x86_insn::X86_INS_XRSTOR, 1312 => x86_insn::X86_INS_XRSTOR64, 1313 => x86_insn::X86_INS_XRSTORS, 1314 => x86_insn::X86_INS_XRSTORS64, 1315 => x86_insn::X86_INS_XSAVE, 1316 => x86_insn::X86_INS_XSAVE64, 1317 => x86_insn::X86_INS_XSAVEC, 1318 => x86_insn::X86_INS_XSAVEC64, 1319 => x86_insn::X86_INS_XSAVEOPT, 1320 => x86_insn::X86_INS_XSAVEOPT64, 1321 => x86_insn::X86_INS_XSAVES, 1322 => x86_insn::X86_INS_XSAVES64, 1323 => x86_insn::X86_INS_XSETBV, 1324 => x86_insn::X86_INS_XSHA1, 1325 => x86_insn::X86_INS_XSHA256, 1326 => x86_insn::X86_INS_XSTORE, 1327 => x86_insn::X86_INS_XTEST, 1328 => x86_insn::X86_INS_FDISI8087_NOP, 1329 => x86_insn::X86_INS_FENI8087_NOP, 1330 => x86_insn::X86_INS_CMPSS, 1331 => x86_insn::X86_INS_CMPEQSS, 1332 => x86_insn::X86_INS_CMPLTSS, 1333 => x86_insn::X86_INS_CMPLESS, 1334 => x86_insn::X86_INS_CMPUNORDSS, 1335 => x86_insn::X86_INS_CMPNEQSS, 1336 => x86_insn::X86_INS_CMPNLTSS, 1337 => x86_insn::X86_INS_CMPNLESS, 1338 => x86_insn::X86_INS_CMPORDSS, 1339 => x86_insn::X86_INS_CMPSD, 1340 => x86_insn::X86_INS_CMPEQSD, 1341 => x86_insn::X86_INS_CMPLTSD, 1342 => x86_insn::X86_INS_CMPLESD, 1343 => x86_insn::X86_INS_CMPUNORDSD, 1344 => x86_insn::X86_INS_CMPNEQSD, 1345 => x86_insn::X86_INS_CMPNLTSD, 1346 => x86_insn::X86_INS_CMPNLESD, 1347 => x86_insn::X86_INS_CMPORDSD, 1348 => x86_insn::X86_INS_CMPPS, 1349 => x86_insn::X86_INS_CMPEQPS, 1350 => x86_insn::X86_INS_CMPLTPS, 1351 => x86_insn::X86_INS_CMPLEPS, 1352 => x86_insn::X86_INS_CMPUNORDPS, 1353 => x86_insn::X86_INS_CMPNEQPS, 1354 => x86_insn::X86_INS_CMPNLTPS, 1355 => x86_insn::X86_INS_CMPNLEPS, 1356 => x86_insn::X86_INS_CMPORDPS, 1357 => x86_insn::X86_INS_CMPPD, 1358 => x86_insn::X86_INS_CMPEQPD, 1359 => x86_insn::X86_INS_CMPLTPD, 1360 => x86_insn::X86_INS_CMPLEPD, 1361 => x86_insn::X86_INS_CMPUNORDPD, 1362 => x86_insn::X86_INS_CMPNEQPD, 1363 => x86_insn::X86_INS_CMPNLTPD, 1364 => x86_insn::X86_INS_CMPNLEPD, 1365 => x86_insn::X86_INS_CMPORDPD, 1366 => x86_insn::X86_INS_VCMPSS, 1367 => x86_insn::X86_INS_VCMPEQSS, 1368 => x86_insn::X86_INS_VCMPLTSS, 1369 => x86_insn::X86_INS_VCMPLESS, 1370 => x86_insn::X86_INS_VCMPUNORDSS, 1371 => x86_insn::X86_INS_VCMPNEQSS, 1372 => x86_insn::X86_INS_VCMPNLTSS, 1373 => x86_insn::X86_INS_VCMPNLESS, 1374 => x86_insn::X86_INS_VCMPORDSS, 1375 => x86_insn::X86_INS_VCMPEQ_UQSS, 1376 => x86_insn::X86_INS_VCMPNGESS, 1377 => x86_insn::X86_INS_VCMPNGTSS, 1378 => x86_insn::X86_INS_VCMPFALSESS, 1379 => x86_insn::X86_INS_VCMPNEQ_OQSS, 1380 => x86_insn::X86_INS_VCMPGESS, 1381 => x86_insn::X86_INS_VCMPGTSS, 1382 => x86_insn::X86_INS_VCMPTRUESS, 1383 => x86_insn::X86_INS_VCMPEQ_OSSS, 1384 => x86_insn::X86_INS_VCMPLT_OQSS, 1385 => x86_insn::X86_INS_VCMPLE_OQSS, 1386 => x86_insn::X86_INS_VCMPUNORD_SSS, 1387 => x86_insn::X86_INS_VCMPNEQ_USSS, 1388 => x86_insn::X86_INS_VCMPNLT_UQSS, 1389 => x86_insn::X86_INS_VCMPNLE_UQSS, 1390 => x86_insn::X86_INS_VCMPORD_SSS, 1391 => x86_insn::X86_INS_VCMPEQ_USSS, 1392 => x86_insn::X86_INS_VCMPNGE_UQSS, 1393 => x86_insn::X86_INS_VCMPNGT_UQSS, 1394 => x86_insn::X86_INS_VCMPFALSE_OSSS, 1395 => x86_insn::X86_INS_VCMPNEQ_OSSS, 1396 => x86_insn::X86_INS_VCMPGE_OQSS, 1397 => x86_insn::X86_INS_VCMPGT_OQSS, 1398 => x86_insn::X86_INS_VCMPTRUE_USSS, 1399 => x86_insn::X86_INS_VCMPSD, 1400 => x86_insn::X86_INS_VCMPEQSD, 1401 => x86_insn::X86_INS_VCMPLTSD, 1402 => x86_insn::X86_INS_VCMPLESD, 1403 => x86_insn::X86_INS_VCMPUNORDSD, 1404 => x86_insn::X86_INS_VCMPNEQSD, 1405 => x86_insn::X86_INS_VCMPNLTSD, 1406 => x86_insn::X86_INS_VCMPNLESD, 1407 => x86_insn::X86_INS_VCMPORDSD, 1408 => x86_insn::X86_INS_VCMPEQ_UQSD, 1409 => x86_insn::X86_INS_VCMPNGESD, 1410 => x86_insn::X86_INS_VCMPNGTSD, 1411 => x86_insn::X86_INS_VCMPFALSESD, 1412 => x86_insn::X86_INS_VCMPNEQ_OQSD, 1413 => x86_insn::X86_INS_VCMPGESD, 1414 => x86_insn::X86_INS_VCMPGTSD, 1415 => x86_insn::X86_INS_VCMPTRUESD, 1416 => x86_insn::X86_INS_VCMPEQ_OSSD, 1417 => x86_insn::X86_INS_VCMPLT_OQSD, 1418 => x86_insn::X86_INS_VCMPLE_OQSD, 1419 => x86_insn::X86_INS_VCMPUNORD_SSD, 1420 => x86_insn::X86_INS_VCMPNEQ_USSD, 1421 => x86_insn::X86_INS_VCMPNLT_UQSD, 1422 => x86_insn::X86_INS_VCMPNLE_UQSD, 1423 => x86_insn::X86_INS_VCMPORD_SSD, 1424 => x86_insn::X86_INS_VCMPEQ_USSD, 1425 => x86_insn::X86_INS_VCMPNGE_UQSD, 1426 => x86_insn::X86_INS_VCMPNGT_UQSD, 1427 => x86_insn::X86_INS_VCMPFALSE_OSSD, 1428 => x86_insn::X86_INS_VCMPNEQ_OSSD, 1429 => x86_insn::X86_INS_VCMPGE_OQSD, 1430 => x86_insn::X86_INS_VCMPGT_OQSD, 1431 => x86_insn::X86_INS_VCMPTRUE_USSD, 1432 => x86_insn::X86_INS_VCMPPS, 1433 => x86_insn::X86_INS_VCMPEQPS, 1434 => x86_insn::X86_INS_VCMPLTPS, 1435 => x86_insn::X86_INS_VCMPLEPS, 1436 => x86_insn::X86_INS_VCMPUNORDPS, 1437 => x86_insn::X86_INS_VCMPNEQPS, 1438 => x86_insn::X86_INS_VCMPNLTPS, 1439 => x86_insn::X86_INS_VCMPNLEPS, 1440 => x86_insn::X86_INS_VCMPORDPS, 1441 => x86_insn::X86_INS_VCMPEQ_UQPS, 1442 => x86_insn::X86_INS_VCMPNGEPS, 1443 => x86_insn::X86_INS_VCMPNGTPS, 1444 => x86_insn::X86_INS_VCMPFALSEPS, 1445 => x86_insn::X86_INS_VCMPNEQ_OQPS, 1446 => x86_insn::X86_INS_VCMPGEPS, 1447 => x86_insn::X86_INS_VCMPGTPS, 1448 => x86_insn::X86_INS_VCMPTRUEPS, 1449 => x86_insn::X86_INS_VCMPEQ_OSPS, 1450 => x86_insn::X86_INS_VCMPLT_OQPS, 1451 => x86_insn::X86_INS_VCMPLE_OQPS, 1452 => x86_insn::X86_INS_VCMPUNORD_SPS, 1453 => x86_insn::X86_INS_VCMPNEQ_USPS, 1454 => x86_insn::X86_INS_VCMPNLT_UQPS, 1455 => x86_insn::X86_INS_VCMPNLE_UQPS, 1456 => x86_insn::X86_INS_VCMPORD_SPS, 1457 => x86_insn::X86_INS_VCMPEQ_USPS, 1458 => x86_insn::X86_INS_VCMPNGE_UQPS, 1459 => x86_insn::X86_INS_VCMPNGT_UQPS, 1460 => x86_insn::X86_INS_VCMPFALSE_OSPS, 1461 => x86_insn::X86_INS_VCMPNEQ_OSPS, 1462 => x86_insn::X86_INS_VCMPGE_OQPS, 1463 => x86_insn::X86_INS_VCMPGT_OQPS, 1464 => x86_insn::X86_INS_VCMPTRUE_USPS, 1465 => x86_insn::X86_INS_VCMPPD, 1466 => x86_insn::X86_INS_VCMPEQPD, 1467 => x86_insn::X86_INS_VCMPLTPD, 1468 => x86_insn::X86_INS_VCMPLEPD, 1469 => x86_insn::X86_INS_VCMPUNORDPD, 1470 => x86_insn::X86_INS_VCMPNEQPD, 1471 => x86_insn::X86_INS_VCMPNLTPD, 1472 => x86_insn::X86_INS_VCMPNLEPD, 1473 => x86_insn::X86_INS_VCMPORDPD, 1474 => x86_insn::X86_INS_VCMPEQ_UQPD, 1475 => x86_insn::X86_INS_VCMPNGEPD, 1476 => x86_insn::X86_INS_VCMPNGTPD, 1477 => x86_insn::X86_INS_VCMPFALSEPD, 1478 => x86_insn::X86_INS_VCMPNEQ_OQPD, 1479 => x86_insn::X86_INS_VCMPGEPD, 1480 => x86_insn::X86_INS_VCMPGTPD, 1481 => x86_insn::X86_INS_VCMPTRUEPD, 1482 => x86_insn::X86_INS_VCMPEQ_OSPD, 1483 => x86_insn::X86_INS_VCMPLT_OQPD, 1484 => x86_insn::X86_INS_VCMPLE_OQPD, 1485 => x86_insn::X86_INS_VCMPUNORD_SPD, 1486 => x86_insn::X86_INS_VCMPNEQ_USPD, 1487 => x86_insn::X86_INS_VCMPNLT_UQPD, 1488 => x86_insn::X86_INS_VCMPNLE_UQPD, 1489 => x86_insn::X86_INS_VCMPORD_SPD, 1490 => x86_insn::X86_INS_VCMPEQ_USPD, 1491 => x86_insn::X86_INS_VCMPNGE_UQPD, 1492 => x86_insn::X86_INS_VCMPNGT_UQPD, 1493 => x86_insn::X86_INS_VCMPFALSE_OSPD, 1494 => x86_insn::X86_INS_VCMPNEQ_OSPD, 1495 => x86_insn::X86_INS_VCMPGE_OQPD, 1496 => x86_insn::X86_INS_VCMPGT_OQPD, 1497 => x86_insn::X86_INS_VCMPTRUE_USPD, 1498 => x86_insn::X86_INS_UD0, 1499 => x86_insn::X86_INS_ENDBR32, 1500 => x86_insn::X86_INS_ENDBR64, 1501 => x86_insn::X86_INS_ENDING, _ => x86_insn::X86_INS_INVALID, } } } impl From for xcore_insn { fn from(id: u32) -> Self { match id { 0 => xcore_insn::XCORE_INS_INVALID, 1 => xcore_insn::XCORE_INS_ADD, 2 => xcore_insn::XCORE_INS_ANDNOT, 3 => xcore_insn::XCORE_INS_AND, 4 => xcore_insn::XCORE_INS_ASHR, 5 => xcore_insn::XCORE_INS_BAU, 6 => xcore_insn::XCORE_INS_BITREV, 7 => xcore_insn::XCORE_INS_BLA, 8 => xcore_insn::XCORE_INS_BLAT, 9 => xcore_insn::XCORE_INS_BL, 10 => xcore_insn::XCORE_INS_BF, 11 => xcore_insn::XCORE_INS_BT, 12 => xcore_insn::XCORE_INS_BU, 13 => xcore_insn::XCORE_INS_BRU, 14 => xcore_insn::XCORE_INS_BYTEREV, 15 => xcore_insn::XCORE_INS_CHKCT, 16 => xcore_insn::XCORE_INS_CLRE, 17 => xcore_insn::XCORE_INS_CLRPT, 18 => xcore_insn::XCORE_INS_CLRSR, 19 => xcore_insn::XCORE_INS_CLZ, 20 => xcore_insn::XCORE_INS_CRC8, 21 => xcore_insn::XCORE_INS_CRC32, 22 => xcore_insn::XCORE_INS_DCALL, 23 => xcore_insn::XCORE_INS_DENTSP, 24 => xcore_insn::XCORE_INS_DGETREG, 25 => xcore_insn::XCORE_INS_DIVS, 26 => xcore_insn::XCORE_INS_DIVU, 27 => xcore_insn::XCORE_INS_DRESTSP, 28 => xcore_insn::XCORE_INS_DRET, 29 => xcore_insn::XCORE_INS_ECALLF, 30 => xcore_insn::XCORE_INS_ECALLT, 31 => xcore_insn::XCORE_INS_EDU, 32 => xcore_insn::XCORE_INS_EEF, 33 => xcore_insn::XCORE_INS_EET, 34 => xcore_insn::XCORE_INS_EEU, 35 => xcore_insn::XCORE_INS_ENDIN, 36 => xcore_insn::XCORE_INS_ENTSP, 37 => xcore_insn::XCORE_INS_EQ, 38 => xcore_insn::XCORE_INS_EXTDP, 39 => xcore_insn::XCORE_INS_EXTSP, 40 => xcore_insn::XCORE_INS_FREER, 41 => xcore_insn::XCORE_INS_FREET, 42 => xcore_insn::XCORE_INS_GETD, 43 => xcore_insn::XCORE_INS_GET, 44 => xcore_insn::XCORE_INS_GETN, 45 => xcore_insn::XCORE_INS_GETR, 46 => xcore_insn::XCORE_INS_GETSR, 47 => xcore_insn::XCORE_INS_GETST, 48 => xcore_insn::XCORE_INS_GETTS, 49 => xcore_insn::XCORE_INS_INCT, 50 => xcore_insn::XCORE_INS_INIT, 51 => xcore_insn::XCORE_INS_INPW, 52 => xcore_insn::XCORE_INS_INSHR, 53 => xcore_insn::XCORE_INS_INT, 54 => xcore_insn::XCORE_INS_IN, 55 => xcore_insn::XCORE_INS_KCALL, 56 => xcore_insn::XCORE_INS_KENTSP, 57 => xcore_insn::XCORE_INS_KRESTSP, 58 => xcore_insn::XCORE_INS_KRET, 59 => xcore_insn::XCORE_INS_LADD, 60 => xcore_insn::XCORE_INS_LD16S, 61 => xcore_insn::XCORE_INS_LD8U, 62 => xcore_insn::XCORE_INS_LDA16, 63 => xcore_insn::XCORE_INS_LDAP, 64 => xcore_insn::XCORE_INS_LDAW, 65 => xcore_insn::XCORE_INS_LDC, 66 => xcore_insn::XCORE_INS_LDW, 67 => xcore_insn::XCORE_INS_LDIVU, 68 => xcore_insn::XCORE_INS_LMUL, 69 => xcore_insn::XCORE_INS_LSS, 70 => xcore_insn::XCORE_INS_LSUB, 71 => xcore_insn::XCORE_INS_LSU, 72 => xcore_insn::XCORE_INS_MACCS, 73 => xcore_insn::XCORE_INS_MACCU, 74 => xcore_insn::XCORE_INS_MJOIN, 75 => xcore_insn::XCORE_INS_MKMSK, 76 => xcore_insn::XCORE_INS_MSYNC, 77 => xcore_insn::XCORE_INS_MUL, 78 => xcore_insn::XCORE_INS_NEG, 79 => xcore_insn::XCORE_INS_NOT, 80 => xcore_insn::XCORE_INS_OR, 81 => xcore_insn::XCORE_INS_OUTCT, 82 => xcore_insn::XCORE_INS_OUTPW, 83 => xcore_insn::XCORE_INS_OUTSHR, 84 => xcore_insn::XCORE_INS_OUTT, 85 => xcore_insn::XCORE_INS_OUT, 86 => xcore_insn::XCORE_INS_PEEK, 87 => xcore_insn::XCORE_INS_REMS, 88 => xcore_insn::XCORE_INS_REMU, 89 => xcore_insn::XCORE_INS_RETSP, 90 => xcore_insn::XCORE_INS_SETCLK, 91 => xcore_insn::XCORE_INS_SET, 92 => xcore_insn::XCORE_INS_SETC, 93 => xcore_insn::XCORE_INS_SETD, 94 => xcore_insn::XCORE_INS_SETEV, 95 => xcore_insn::XCORE_INS_SETN, 96 => xcore_insn::XCORE_INS_SETPSC, 97 => xcore_insn::XCORE_INS_SETPT, 98 => xcore_insn::XCORE_INS_SETRDY, 99 => xcore_insn::XCORE_INS_SETSR, 100 => xcore_insn::XCORE_INS_SETTW, 101 => xcore_insn::XCORE_INS_SETV, 102 => xcore_insn::XCORE_INS_SEXT, 103 => xcore_insn::XCORE_INS_SHL, 104 => xcore_insn::XCORE_INS_SHR, 105 => xcore_insn::XCORE_INS_SSYNC, 106 => xcore_insn::XCORE_INS_ST16, 107 => xcore_insn::XCORE_INS_ST8, 108 => xcore_insn::XCORE_INS_STW, 109 => xcore_insn::XCORE_INS_SUB, 110 => xcore_insn::XCORE_INS_SYNCR, 111 => xcore_insn::XCORE_INS_TESTCT, 112 => xcore_insn::XCORE_INS_TESTLCL, 113 => xcore_insn::XCORE_INS_TESTWCT, 114 => xcore_insn::XCORE_INS_TSETMR, 115 => xcore_insn::XCORE_INS_START, 116 => xcore_insn::XCORE_INS_WAITEF, 117 => xcore_insn::XCORE_INS_WAITET, 118 => xcore_insn::XCORE_INS_WAITEU, 119 => xcore_insn::XCORE_INS_XOR, 120 => xcore_insn::XCORE_INS_ZEXT, 121 => xcore_insn::XCORE_INS_ENDING, _ => xcore_insn::XCORE_INS_INVALID, } } } capstone-sys-0.11.0/pre_generated/update-bindings.md010066400017500001750000000010601363402464200206500ustar0000000000000000# Update bindings In order to update the pre-generated bindings: 1. Update pre-generated bindings ~~~ UPDATE_CAPSTONE_BINDINGS=1 cargo build --features use_bindgen ~~~ 2. If needed, format the result (might be necessary; sometimes the source has been one big line). ~~~ rustfmt pre_generated/*.rs ~~~ 3. Commit bindings update. ~~~ git commit "pre_generated/*.rs" ~~~ ## Notes * We used to separately fix-up the documentation after updating the pre-generated bindings, but now bindgen correctly parses comments. capstone-sys-0.11.0/scripts/list_capstone_functions.sh010077500017500001750000000004221343144727300214370ustar0000000000000000#!/bin/sh # # Lists capstone types from capstone includes (enums and structs) set -eu SCRIPT_DIR="$(dirname "$0")" CAPSTONE_INCLUDE="$SCRIPT_DIR/../capstone/include" grep -A1 '^CAPSTONE_EXPORT' "$CAPSTONE_INCLUDE"/capstone.h \ | grep -oE '[^( ]+\(' \ | tr -d '(' capstone-sys-0.11.0/scripts/list_capstone_types.sh010077500017500001750000000004331343144727300205750ustar0000000000000000#!/bin/sh # # Lists capstone types from capstone includes (enums and structs) set -eu SCRIPT_DIR="$(dirname "$0")" CAPSTONE_INCLUDE="$SCRIPT_DIR/../capstone/include" grep -Ehro 'typedef (enum|struct) \S+' "$CAPSTONE_INCLUDE" \ | sed 's/\S\+ \S\+ \(\S\+\)/\1/' \ | sort -u capstone-sys-0.11.0/scripts/tag_release.sh010077500017500001750000000015551346122303200167470ustar0000000000000000#!/bin/sh # # Tag the HEAD based on version in Cargo.toml set -eu cd "$(dirname $0)/.." extract_toml_value() { grep "^$1" Cargo.toml | sed 's/^[^ =].*=.*"\([^"]\+\)"$/\1/' | head -n1 } PACKAGE_NAME="$(extract_toml_value name)" PACKAGE_VERSION="${PACKAGE_VERSION:-$(extract_toml_value version)}" DESCRIPTION="${PACKAGE_NAME} v${PACKAGE_VERSION}" TAG_NAME="${PACKAGE_NAME}-v${PACKAGE_VERSION}" GIT_COMMIT="${GIT_COMMIT:-$(git rev-parse HEAD)}" echo "Commit log:" git log -1 $GIT_COMMIT | cat echo echo -n "Create git tag: TAG_NAME=\"$TAG_NAME\" DESCRIPTION=\"$DESCRIPTION\" at $GIT_COMMIT? (y/N) " read -r answer case "$answer" in y|Y) ;; *) echo "Exiting" exit 1 ;; esac set -x git tag -s -m "${DESCRIPTION}" "${TAG_NAME}" "${GIT_COMMIT}" set +x echo echo "Don't forget to push tags upstream:" echo echo " git push origin --tags" capstone-sys-0.11.0/scripts/update_capstone.sh010077500017500001750000000014231363403403300176470ustar0000000000000000#!/bin/sh # # Update the bundled capstone library # Modify value to update capstone CAPSTONE_REVISION="154f91a5ff9a124e9ecf1d6ebb3648ba20fa5a64" set -eux cd "$(dirname "$0")"/../ CAPSTONE_DIR=capstone TEMP_DIR="$(mktemp -d /tmp/capstone-sys.XXXXXXXXXX)" ARCHIVE="$TEMP_DIR/archive.zip" URL="https://github.com/aquynh/capstone/archive/$CAPSTONE_REVISION.zip" wget "$URL" -O "$ARCHIVE" CS_TEMP_DIR="$TEMP_DIR/capstone" unzip "$ARCHIVE" -d "$CS_TEMP_DIR" CREATED_CS_DIR="$(find "$CS_TEMP_DIR" -mindepth 1 -maxdepth 1 -type d)" num_lines=$(echo "$CREATED_CS_DIR" | wc -l) if [ $num_lines -ne 1 ]; then echo "Expected only 1 subdirectory, found $num_lines" 1>&2 exit 1 fi rm -rf "$CAPSTONE_DIR" cp -r "$CREATED_CS_DIR" "$CAPSTONE_DIR" # cleanup temp dir rm -rf "$TEMP_DIR" capstone-sys-0.11.0/src/lib.rs010066400017500001750000000042131363402464200143530ustar0000000000000000//! Low-level, unsafe Rust bindings for the [`Capstone`][capstone] disassembly library. //! //! //! We recommend against using this crate directly. //! Instead, consider using [capstone-rs], which provides a high-level, safe, "Rusty" interface. //! //! [capstone]: https://github.com/aquynh/capstone //! [capstone-rs]: https://github.com/capstone-rust/capstone-rs //! //! # Supported disassembly architectures //! //! * `arm`: ARM //! * `arm64`: ARM64 (also known as AArch64) //! * `mips`: MIPS //! * `ppc`: PowerPC //! * `sparc`: SPARC //! * `sysz`: System z //! * `x86`: x86 family (includes 16, 32, and 64 bit modes) //! * `xcore`: XCore //! //! For each architecture, *at least* the following types are defined (replace `ARCH` with //! architecture names shown above): //! //! * `enum ARCH_insn`: instruction ids //! * `enum ARCH_insn_group`: architecture-specific group ids //! * `enum ARCH_op_type`: instruction operand types ids //! * `enum ARCH_reg`1: register ids //! * `struct ARCH_op_mem`: operand referring to memory //! * `struct cs_ARCH_op`: instruction operand //! * `struct cs_ARCH`: instruction //! //! **Note**: documentation for functions/types was taken directly from //! [Capstone C headers][capstone headers]. //! //! [capstone headers]: https://github.com/capstone-rust/capstone-sys/blob/master/capstone/include/capstone.h //! 1: Defined as a ["constified" enum modules](https://docs.rs/bindgen/0.30.0/bindgen/struct.Builder.html#method.constified_enum_module) //! because discriminant values are not unique. Rust requires discriminant values to be unique. // Suppress errors from Capstone names #![allow(non_upper_case_globals)] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![allow(improper_ctypes)] #![no_std] extern crate libc; use libc::c_int; // Bindings should be copied here include!(concat!(env!("OUT_DIR"), "/capstone.rs")); include!(concat!(env!("OUT_DIR"), "/capstone_archs_impl.rs")); pub const CS_SUPPORT_DIET: c_int = (cs_arch::CS_ARCH_ALL as c_int) + 1; pub const CS_SUPPORT_X86_REDUCE: c_int = (cs_arch::CS_ARCH_ALL as c_int) + 2; include!(concat!(env!("CARGO_MANIFEST_DIR"), "/common.rs")); capstone-sys-0.11.0/.cargo_vcs_info.json0000644000000001121363403656000136410ustar00{ "git": { "sha1": "dd9bc9afc5536fa77e740efad88ce720e9b6b258" } }